arch/arc/kernel/setup.c

576

struct clk *cpu_clk;

arch/arm/common/sa1111.c

1009

clk_disable(sachip->clk);

arch/arm/common/sa1111.c

104

struct clk *clk;

arch/arm/common/sa1111.c

649

clk_enable(sachip->clk);

arch/arm/common/sa1111.c

807

sachip->clk = devm_clk_get(me, "SA1111_CLK");

arch/arm/common/sa1111.c

808

if (IS_ERR(sachip->clk))

arch/arm/common/sa1111.c

809

return PTR_ERR(sachip->clk);

arch/arm/common/sa1111.c

811

ret = clk_prepare(sachip->clk);

arch/arm/common/sa1111.c

910

clk_disable(sachip->clk);

arch/arm/common/sa1111.c

914

clk_unprepare(sachip->clk);

arch/arm/common/sa1111.c

935

clk_disable(sachip->clk);

arch/arm/common/sa1111.c

936

clk_unprepare(sachip->clk);

arch/arm/kernel/smp_twd.c

220

struct clock_event_device *clk = raw_cpu_ptr(twd_evt);

arch/arm/kernel/smp_twd.c

229

clockevents_register_device(clk);

arch/arm/kernel/smp_twd.c

230

enable_percpu_irq(clk->irq, 0);

arch/arm/kernel/smp_twd.c

243

clk->name = "local_timer";

arch/arm/kernel/smp_twd.c

244

clk->features = twd_features;

arch/arm/kernel/smp_twd.c

245

clk->rating = 350;

arch/arm/kernel/smp_twd.c

246

clk->set_state_shutdown = twd_shutdown;

arch/arm/kernel/smp_twd.c

247

clk->set_state_periodic = twd_set_periodic;

arch/arm/kernel/smp_twd.c

248

clk->set_state_oneshot = twd_set_oneshot;

arch/arm/kernel/smp_twd.c

249

clk->tick_resume = twd_shutdown;

arch/arm/kernel/smp_twd.c

250

clk->set_next_event = twd_set_next_event;

arch/arm/kernel/smp_twd.c

251

clk->irq = twd_ppi;

arch/arm/kernel/smp_twd.c

252

clk->cpumask = cpumask_of(cpu);

arch/arm/kernel/smp_twd.c

254

clockevents_config_and_register(clk, twd_timer_rate,

arch/arm/kernel/smp_twd.c

256

enable_percpu_irq(clk->irq, 0);

arch/arm/kernel/smp_twd.c

28

static struct clk *twd_clk;

arch/arm/kernel/smp_twd.c

37

static int twd_shutdown(struct clock_event_device *clk)

arch/arm/kernel/smp_twd.c

43

static int twd_set_oneshot(struct clock_event_device *clk)

arch/arm/kernel/smp_twd.c

51

static int twd_set_periodic(struct clock_event_device *clk)

arch/arm/kernel/smp_twd.c

94

struct clock_event_device *clk = raw_cpu_ptr(twd_evt);

arch/arm/kernel/smp_twd.c

96

disable_percpu_irq(clk->irq);

arch/arm/mach-at91/pm.c

1226

clks[AT91_PM_ETH_PCLK].clk = of_clk_get_by_name(np, "pclk");

arch/arm/mach-at91/pm.c

1227

if (IS_ERR(clks[AT91_PM_ETH_PCLK].clk))

arch/arm/mach-at91/pm.c

1228

return PTR_ERR(clks[AT91_PM_ETH_PCLK].clk);

arch/arm/mach-at91/pm.c

1230

clks[AT91_PM_ETH_HCLK].clk = of_clk_get_by_name(np, "hclk");

arch/arm/mach-at91/pm.c

1231

if (IS_ERR(clks[AT91_PM_ETH_HCLK].clk))

arch/arm/mach-at91/pm.c

1232

return PTR_ERR(clks[AT91_PM_ETH_HCLK].clk);

arch/arm/mach-at91/pm.c

1239

return IS_ERR(clks[AT91_PM_ETH_PCLK].clk) ||

arch/arm/mach-at91/pm.c

1240

IS_ERR(clks[AT91_PM_ETH_HCLK].clk);

arch/arm/mach-dove/common.c

71

static struct clk *tclk;

arch/arm/mach-dove/common.c

73

static struct clk __init *dove_register_gate(const char *name,

arch/arm/mach-dove/common.c

83

struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;

arch/arm/mach-dove/common.c

84

struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;

arch/arm/mach-dove/common.c

85

struct clk *xor0, *xor1, *ge;

arch/arm/mach-dove/pcie.c

198

struct clk *clk = clk_get_sys("pcie", (index ? "1" : "0"));

arch/arm/mach-dove/pcie.c

200

if (!IS_ERR(clk))

arch/arm/mach-dove/pcie.c

201

clk_prepare_enable(clk);

arch/arm/mach-imx/common.h

15

struct clk;

arch/arm/mach-imx/mach-imx6q.c

82

struct clk *ptp_clk, *fec_enet_ref;

arch/arm/mach-imx/mach-imx6q.c

83

struct clk *enet_ref;

arch/arm/mach-imx/mmdc.c

108

struct clk *mmdc_ipg_clk;

arch/arm/mach-imx/mmdc.c

474

struct clk *mmdc_ipg_clk)

arch/arm/mach-imx/mmdc.c

547

struct clk *mmdc_ipg_clk;

arch/arm/mach-imx/pm-imx5.c

378

struct clk *gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");

arch/arm/mach-imx/system.c

27

static struct clk *wdog_clk;

arch/arm/mach-lpc32xx/serial.c

101

clk = clk_get(NULL, uartinit_data[i].uart_ck_name);

arch/arm/mach-lpc32xx/serial.c

102

if (!IS_ERR(clk)) {

arch/arm/mach-lpc32xx/serial.c

103

clk_enable(clk);

arch/arm/mach-lpc32xx/serial.c

96

struct clk *clk;

arch/arm/mach-milbeaut/platsmp.c

138

struct clk *m10v_clclk_register(struct device *cpu_dev);

arch/arm/mach-mmp/time.c

193

struct clk *clk;

arch/arm/mach-mmp/time.c

197

clk = of_clk_get(np, 0);

arch/arm/mach-mmp/time.c

198

if (!IS_ERR(clk)) {

arch/arm/mach-mmp/time.c

199

ret = clk_prepare_enable(clk);

arch/arm/mach-mmp/time.c

202

rate = clk_get_rate(clk);

arch/arm/mach-mv78xx0/common.c

165

static struct clk *tclk;

arch/arm/mach-mvebu/kirkwood.c

107

clk_prepare_enable(clk);

arch/arm/mach-mvebu/kirkwood.c

137

clk_disable_unprepare(clk);

arch/arm/mach-mvebu/kirkwood.c

139

clk_put(clk);

arch/arm/mach-mvebu/kirkwood.c

83

struct clk *clk;

arch/arm/mach-mvebu/kirkwood.c

98

clk = of_clk_get(pnp, 0);

arch/arm/mach-mvebu/kirkwood.c

99

if (IS_ERR(clk))

arch/arm/mach-mvebu/mvebu-soc-id.c

120

clk_disable_unprepare(clk);

arch/arm/mach-mvebu/mvebu-soc-id.c

121

clk_put(clk);

arch/arm/mach-mvebu/mvebu-soc-id.c

60

struct clk *clk;

arch/arm/mach-mvebu/mvebu-soc-id.c

78

clk = of_clk_get_by_name(child, NULL);

arch/arm/mach-mvebu/mvebu-soc-id.c

79

if (IS_ERR(clk)) {

arch/arm/mach-mvebu/mvebu-soc-id.c

85

ret = clk_prepare_enable(clk);

arch/arm/mach-mvebu/platsmp.c

101

struct clk *cpu_clk = get_cpu_clk(cpu);

arch/arm/mach-mvebu/platsmp.c

35

static struct clk *boot_cpu_clk;

arch/arm/mach-mvebu/platsmp.c

37

static struct clk *get_cpu_clk(int cpu)

arch/arm/mach-mvebu/platsmp.c

39

struct clk *cpu_clk;

arch/arm/mach-mxs/mach-mxs.c

234

struct clk *clk = clk_get_sys("enet_out", NULL);

arch/arm/mach-mxs/mach-mxs.c

236

if (!IS_ERR(clk))

arch/arm/mach-mxs/mach-mxs.c

237

clk_prepare_enable(clk);

arch/arm/mach-omap1/ams-delta-fiq.c

124

clk = gpiod;

arch/arm/mach-omap1/ams-delta-fiq.c

125

gpiod_direction_input(clk);

arch/arm/mach-omap1/ams-delta-fiq.c

132

if (!data || !clk)

arch/arm/mach-omap1/ams-delta-fiq.c

204

serio->resource[0].start = gpiod_to_irq(clk);

arch/arm/mach-omap1/ams-delta-fiq.c

225

if (clk)

arch/arm/mach-omap1/ams-delta-fiq.c

226

gpiochip_free_own_desc(clk);

arch/arm/mach-omap1/ams-delta-fiq.c

87

struct gpio_desc *gpiod, *data = NULL, *clk = NULL;

arch/arm/mach-omap1/clock.c

166

unsigned long omap1_ckctl_recalc(struct omap1_clk *clk, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

169

int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));

arch/arm/mach-omap1/clock.c

172

clk->rate = p_rate / dsor;

arch/arm/mach-omap1/clock.c

173

return clk->rate;

arch/arm/mach-omap1/clock.c

178

struct omap1_clk *clk = to_omap1_clk(hw);

arch/arm/mach-omap1/clock.c

183

if (!clk->ops) /* no gate -- always enabled */

arch/arm/mach-omap1/clock.c

186

if (clk->ops == &clkops_dspck) {

arch/arm/mach-omap1/clock.c

193

if (clk->flags & ENABLE_REG_32BIT)

arch/arm/mach-omap1/clock.c

194

regval32 = __raw_readl(clk->enable_reg);

arch/arm/mach-omap1/clock.c

196

regval32 = __raw_readw(clk->enable_reg);

arch/arm/mach-omap1/clock.c

198

ret = regval32 & (1 << clk->enable_bit);

arch/arm/mach-omap1/clock.c

207

unsigned long omap1_ckctl_recalc_dsp_domain(struct omap1_clk *clk, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

222

dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));

arch/arm/mach-omap1/clock.c

230

int omap1_select_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

265

int omap1_clk_set_rate_dsp_domain(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

277

regval &= ~(3 << clk->rate_offset);

arch/arm/mach-omap1/clock.c

278

regval |= dsor_exp << clk->rate_offset;

arch/arm/mach-omap1/clock.c

280

clk->rate = p_rate / (1 << dsor_exp);

arch/arm/mach-omap1/clock.c

285

long omap1_clk_round_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate,

arch/arm/mach-omap1/clock.c

297

int omap1_clk_set_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

313

regval &= ~(3 << clk->rate_offset);

arch/arm/mach-omap1/clock.c

314

regval |= dsor_exp << clk->rate_offset;

arch/arm/mach-omap1/clock.c

317

clk->rate = p_rate / (1 << dsor_exp);

arch/arm/mach-omap1/clock.c

324

long omap1_round_to_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate)

arch/arm/mach-omap1/clock.c

375

long omap1_round_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate)

arch/arm/mach-omap1/clock.c

380

int omap1_set_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

388

val = 1 << clk->enable_bit;

arch/arm/mach-omap1/clock.c

395

val |= __raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit);

arch/arm/mach-omap1/clock.c

396

__raw_writel(val, clk->enable_reg);

arch/arm/mach-omap1/clock.c

400

clk->rate = rate;

arch/arm/mach-omap1/clock.c

406

int omap1_set_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

413

clk->rate = 96000000 / dsor;

arch/arm/mach-omap1/clock.c

422

ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd;

arch/arm/mach-omap1/clock.c

423

__raw_writew(ratio_bits, clk->enable_reg);

arch/arm/mach-omap1/clock.c

440

long omap1_round_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate)

arch/arm/mach-omap1/clock.c

453

int omap1_set_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

47

unsigned long omap1_uart_recalc(struct omap1_clk *clk, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

471

clk->rate = p_rate / (div + 1);

arch/arm/mach-omap1/clock.c

478

long omap1_round_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate)

arch/arm/mach-omap1/clock.c

483

int omap1_init_ext_clk(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

489

ratio_bits = __raw_readw(clk->enable_reg) & ~1;

arch/arm/mach-omap1/clock.c

49

unsigned int val = __raw_readl(clk->enable_reg);

arch/arm/mach-omap1/clock.c

490

__raw_writew(ratio_bits, clk->enable_reg);

arch/arm/mach-omap1/clock.c

498

clk-> rate = 96000000 / dsor;

arch/arm/mach-omap1/clock.c

50

return val & 1 << clk->enable_bit ? 48000000 : 12000000;

arch/arm/mach-omap1/clock.c

505

struct omap1_clk *clk = to_omap1_clk(hw), *parent = to_omap1_clk(clk_hw_get_parent(hw));

arch/arm/mach-omap1/clock.c

508

if (parent && clk->flags & CLOCK_NO_IDLE_PARENT)

arch/arm/mach-omap1/clock.c

511

if (clk->ops && !(WARN_ON(!clk->ops->enable)))

arch/arm/mach-omap1/clock.c

512

ret = clk->ops->enable(clk);

arch/arm/mach-omap1/clock.c

519

struct omap1_clk *clk = to_omap1_clk(hw), *parent = to_omap1_clk(clk_hw_get_parent(hw));

arch/arm/mach-omap1/clock.c

521

if (clk->ops && !(WARN_ON(!clk->ops->disable)))

arch/arm/mach-omap1/clock.c

522

clk->ops->disable(clk);

arch/arm/mach-omap1/clock.c

524

if (likely(parent) && clk->flags & CLOCK_NO_IDLE_PARENT)

arch/arm/mach-omap1/clock.c

528

static int omap1_clk_enable_generic(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

53

unsigned long omap1_sossi_recalc(struct omap1_clk *clk, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

534

if (unlikely(clk->enable_reg == NULL)) {

arch/arm/mach-omap1/clock.c

536

clk_hw_get_name(&clk->hw));

arch/arm/mach-omap1/clock.c

541

if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))

arch/arm/mach-omap1/clock.c

543

else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))

arch/arm/mach-omap1/clock.c

545

else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))

arch/arm/mach-omap1/clock.c

547

else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))

arch/arm/mach-omap1/clock.c

549

else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))

arch/arm/mach-omap1/clock.c

552

if (clk->flags & ENABLE_REG_32BIT) {

arch/arm/mach-omap1/clock.c

553

regval32 = __raw_readl(clk->enable_reg);

arch/arm/mach-omap1/clock.c

554

regval32 |= (1 << clk->enable_bit);

arch/arm/mach-omap1/clock.c

555

__raw_writel(regval32, clk->enable_reg);

arch/arm/mach-omap1/clock.c

557

regval16 = __raw_readw(clk->enable_reg);

arch/arm/mach-omap1/clock.c

558

regval16 |= (1 << clk->enable_bit);

arch/arm/mach-omap1/clock.c

559

__raw_writew(regval16, clk->enable_reg);

arch/arm/mach-omap1/clock.c

562

if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))

arch/arm/mach-omap1/clock.c

564

else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))

arch/arm/mach-omap1/clock.c

566

else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))

arch/arm/mach-omap1/clock.c

568

else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))

arch/arm/mach-omap1/clock.c

570

else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))

arch/arm/mach-omap1/clock.c

576

static void omap1_clk_disable_generic(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

582

if (clk->enable_reg == NULL)

arch/arm/mach-omap1/clock.c

586

if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))

arch/arm/mach-omap1/clock.c

588

else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))

arch/arm/mach-omap1/clock.c

590

else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))

arch/arm/mach-omap1/clock.c

592

else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))

arch/arm/mach-omap1/clock.c

594

else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))

arch/arm/mach-omap1/clock.c

597

if (clk->flags & ENABLE_REG_32BIT) {

arch/arm/mach-omap1/clock.c

598

regval32 = __raw_readl(clk->enable_reg);

arch/arm/mach-omap1/clock.c

599

regval32 &= ~(1 << clk->enable_bit);

arch/arm/mach-omap1/clock.c

600

__raw_writel(regval32, clk->enable_reg);

arch/arm/mach-omap1/clock.c

602

regval16 = __raw_readw(clk->enable_reg);

arch/arm/mach-omap1/clock.c

603

regval16 &= ~(1 << clk->enable_bit);

arch/arm/mach-omap1/clock.c

604

__raw_writew(regval16, clk->enable_reg);

arch/arm/mach-omap1/clock.c

607

if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL))

arch/arm/mach-omap1/clock.c

609

else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2))

arch/arm/mach-omap1/clock.c

611

else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0))

arch/arm/mach-omap1/clock.c

613

else if (clk->enable_reg == OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1))

arch/arm/mach-omap1/clock.c

615

else if (clk->enable_reg == OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL))

arch/arm/mach-omap1/clock.c

624

static int omap1_clk_enable_dsp_domain(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

63

static void omap1_clk_allow_idle(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

634

retval = omap1_clk_enable_generic(clk);

arch/arm/mach-omap1/clock.c

643

static void omap1_clk_disable_dsp_domain(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

65

struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;

arch/arm/mach-omap1/clock.c

652

omap1_clk_disable_generic(clk);

arch/arm/mach-omap1/clock.c

664

static int omap1_clk_enable_uart_functional_16xx(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

669

ret = omap1_clk_enable_generic(clk);

arch/arm/mach-omap1/clock.c

67

if (!(clk->flags & CLOCK_IDLE_CONTROL))

arch/arm/mach-omap1/clock.c

672

uclk = (struct uart_clk *)clk;

arch/arm/mach-omap1/clock.c

681

static void omap1_clk_disable_uart_functional_16xx(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

686

uclk = (struct uart_clk *)clk;

arch/arm/mach-omap1/clock.c

689

omap1_clk_disable_generic(clk);

arch/arm/mach-omap1/clock.c

700

struct omap1_clk *clk = to_omap1_clk(hw);

arch/arm/mach-omap1/clock.c

702

if (clk->recalc)

arch/arm/mach-omap1/clock.c

703

return clk->recalc(clk, p_rate);

arch/arm/mach-omap1/clock.c

705

return clk->rate;

arch/arm/mach-omap1/clock.c

711

struct omap1_clk *clk = to_omap1_clk(hw);

arch/arm/mach-omap1/clock.c

713

if (clk->round_rate != NULL) {

arch/arm/mach-omap1/clock.c

714

req->rate = clk->round_rate(clk, req->rate,

arch/arm/mach-omap1/clock.c

727

struct omap1_clk *clk = to_omap1_clk(hw);

arch/arm/mach-omap1/clock.c

730

if (clk->set_rate)

arch/arm/mach-omap1/clock.c

731

ret = clk->set_rate(clk, rate, p_rate);

arch/arm/mach-omap1/clock.c

74

static void omap1_clk_deny_idle(struct omap1_clk *clk)

arch/arm/mach-omap1/clock.c

741

struct omap1_clk *clk = to_omap1_clk(hw);

arch/arm/mach-omap1/clock.c

743

if (clk->init)

arch/arm/mach-omap1/clock.c

744

return clk->init(clk);

arch/arm/mach-omap1/clock.c

753

struct omap1_clk *clk = to_omap1_clk(hw);

arch/arm/mach-omap1/clock.c

758

if (clk->enable_reg == DSP_IDLECT2) {

arch/arm/mach-omap1/clock.c

76

struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;

arch/arm/mach-omap1/clock.c

78

if (!(clk->flags & CLOCK_IDLE_CONTROL))

arch/arm/mach-omap1/clock.c

804

unsigned long followparent_recalc(struct omap1_clk *clk, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

813

unsigned long omap_fixed_divisor_recalc(struct omap1_clk *clk, unsigned long p_rate)

arch/arm/mach-omap1/clock.c

815

WARN_ON(!clk->fixed_div);

arch/arm/mach-omap1/clock.c

817

return p_rate / clk->fixed_div;

arch/arm/mach-omap1/clock.c

823

struct clk *clkp;

arch/arm/mach-omap1/clock.h

103

unsigned long omap1_ckctl_recalc(struct omap1_clk *clk, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

104

long omap1_round_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);

arch/arm/mach-omap1/clock.h

105

int omap1_set_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

106

unsigned long omap1_sossi_recalc(struct omap1_clk *clk, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

107

unsigned long omap1_ckctl_recalc_dsp_domain(struct omap1_clk *clk, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

108

int omap1_clk_set_rate_dsp_domain(struct omap1_clk *clk, unsigned long rate,

arch/arm/mach-omap1/clock.h

110

long omap1_round_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);

arch/arm/mach-omap1/clock.h

111

int omap1_set_uart_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

112

unsigned long omap1_uart_recalc(struct omap1_clk *clk, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

113

int omap1_set_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

114

long omap1_round_ext_clk_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);

arch/arm/mach-omap1/clock.h

115

int omap1_init_ext_clk(struct omap1_clk *clk);

arch/arm/mach-omap1/clock.h

116

int omap1_select_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

117

long omap1_round_to_table_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);

arch/arm/mach-omap1/clock.h

118

int omap1_clk_set_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

119

long omap1_clk_round_rate_ckctl_arm(struct omap1_clk *clk, unsigned long rate,

arch/arm/mach-omap1/clock.h

123

struct omap1_clk clk;

arch/arm/mach-omap1/clock.h

129

struct omap1_clk clk;

arch/arm/mach-omap1/clock.h

49

int (*enable)(struct omap1_clk *clk);

arch/arm/mach-omap1/clock.h

50

void (*disable)(struct omap1_clk *clk);

arch/arm/mach-omap1/clock.h

82

unsigned long (*recalc)(struct omap1_clk *clk, unsigned long rate);

arch/arm/mach-omap1/clock.h

83

int (*set_rate)(struct omap1_clk *clk, unsigned long rate,

arch/arm/mach-omap1/clock.h

85

long (*round_rate)(struct omap1_clk *clk, unsigned long rate,

arch/arm/mach-omap1/clock.h

87

int (*init)(struct omap1_clk *clk);

arch/arm/mach-omap1/clock.h

95

void propagate_rate(struct omap1_clk *clk);

arch/arm/mach-omap1/clock.h

96

unsigned long followparent_recalc(struct omap1_clk *clk, unsigned long p_rate);

arch/arm/mach-omap1/clock.h

97

unsigned long omap_fixed_divisor_recalc(struct omap1_clk *clk, unsigned long p_rate);

arch/arm/mach-omap1/clock_data.c

125

.clk = {

arch/arm/mach-omap1/clock_data.c

152

.clk = {

arch/arm/mach-omap1/clock_data.c

164

.clk = {

arch/arm/mach-omap1/clock_data.c

176

.clk = {

arch/arm/mach-omap1/clock_data.c

242

.clk = {

arch/arm/mach-omap1/clock_data.c

303

.clk = {

arch/arm/mach-omap1/clock_data.c

314

.clk = {

arch/arm/mach-omap1/clock_data.c

344

.clk = {

arch/arm/mach-omap1/clock_data.c

383

.clk = {

arch/arm/mach-omap1/clock_data.c

436

.clk = {

arch/arm/mach-omap1/clock_data.c

606

CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk.hw, CK_16XX),

arch/arm/mach-omap1/clock_data.c

609

CLK(NULL, "armper_ck", &armper_ck.clk.hw, CK_16XX | CK_1510 | CK_310),

arch/arm/mach-omap1/clock_data.c

611

CLK(NULL, "armxor_ck", &armxor_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX),

arch/arm/mach-omap1/clock_data.c

612

CLK(NULL, "armtim_ck", &armtim_ck.clk.hw, CK_16XX | CK_1510 | CK_310),

arch/arm/mach-omap1/clock_data.c

613

CLK("omap_wdt", "fck", &armwdt_ck.clk.hw, CK_16XX | CK_1510 | CK_310),

arch/arm/mach-omap1/clock_data.c

614

CLK("omap_wdt", "ick", &armper_ck.clk.hw, CK_16XX),

arch/arm/mach-omap1/clock_data.c

625

CLK(NULL, "tc_ck", &tc_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX),

arch/arm/mach-omap1/clock_data.c

632

CLK(NULL, "api_ck", &api_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX),

arch/arm/mach-omap1/clock_data.c

633

CLK(NULL, "lb_ck", &lb_ck.clk.hw, CK_1510 | CK_310),

arch/arm/mach-omap1/clock_data.c

637

CLK(NULL, "lcd_ck", &lcd_ck_1510.clk.hw, CK_1510 | CK_310),

arch/arm/mach-omap1/clock_data.c

640

CLK(NULL, "uart1_ck", &uart1_16xx.clk.hw, CK_16XX),

arch/arm/mach-omap1/clock_data.c

645

CLK(NULL, "uart3_ck", &uart3_16xx.clk.hw, CK_16XX),

arch/arm/mach-omap1/clock_data.c

656

CLK("mmci-omap.0", "ick", &armper_ck.clk.hw, CK_16XX | CK_1510 | CK_310 | CK_7XX),

arch/arm/mach-omap1/clock_data.c

658

CLK("mmci-omap.1", "ick", &armper_ck.clk.hw, CK_16XX),

arch/arm/mach-omap1/clock_data.c

668

CLK("omap_uwire", "fck", &armxor_ck.clk.hw, CK_16XX | CK_1510 | CK_310),

arch/arm/mach-omap1/clock_data.c

671

CLK("omap-mcbsp.2", "ick", &armper_ck.clk.hw, CK_16XX),

arch/arm/mach-omap1/clock_data.c

676

CLK("omap-mcbsp.2", "fck", &armper_ck.clk.hw, CK_16XX | CK_1510 | CK_310),

arch/arm/mach-omap1/clock_data.c

727

api_ck_p = &api_ck.clk;

arch/arm/mach-omap1/clock_data.c

95

.clk = {

arch/arm/mach-omap1/mcbsp.c

31

static struct clk *api_clk;

arch/arm/mach-omap1/mcbsp.c

32

static struct clk *dsp_clk;

arch/arm/mach-omap1/ocpi.c

41

static struct clk *ocpi_ck;

arch/arm/mach-omap1/serial.c

29

static struct clk * uart1_ck;

arch/arm/mach-omap1/serial.c

30

static struct clk * uart2_ck;

arch/arm/mach-omap1/serial.c

31

static struct clk * uart3_ck;

arch/arm/mach-omap1/time.c

200

struct clk *ck_ref = clk_get(NULL, "ck_ref");

arch/arm/mach-omap1/timer32k.c

263

struct clk *sync32k_ick;

arch/arm/mach-omap2/clkt2xxx_dpll.c

29

static void _allow_idle(struct clk_hw_omap *clk)

arch/arm/mach-omap2/clkt2xxx_dpll.c

31

if (!clk || !clk->dpll_data)

arch/arm/mach-omap2/clkt2xxx_dpll.c

43

static void _deny_idle(struct clk_hw_omap *clk)

arch/arm/mach-omap2/clkt2xxx_dpll.c

45

if (!clk || !clk->dpll_data)

arch/arm/mach-omap2/clkt2xxx_dpllcore.c

112

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

arch/arm/mach-omap2/clkt2xxx_dpllcore.c

135

dd = clk->dpll_data;

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

202

struct clk *c;

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

234

struct clk *clk;

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

250

clk = clk_register(NULL, &hw->hw);

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

251

if (IS_ERR(clk)) {

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

257

clkdev_create(clk, "cpufreq_ck", NULL);

arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c

60

static unsigned long omap2_table_mpu_recalc(struct clk_hw *clk,

arch/arm/mach-omap2/clockdomain.c

1124

int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *unused)

arch/arm/mach-omap2/clockdomain.c

1164

int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)

arch/arm/mach-omap2/clockdomain.c

1172

if (clk && (__clk_get_enable_count(clk) == 0) && clkdm->usecount == 0)

arch/arm/mach-omap2/clockdomain.h

211

int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);

arch/arm/mach-omap2/clockdomain.h

212

int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);

arch/arm/mach-omap2/io.c

380

struct clk *dpll3_m2_ck;

arch/arm/mach-omap2/mcbsp.c

34

static int omap3_mcbsp_force_ick_on(struct clk *clk, bool force_on)

arch/arm/mach-omap2/mcbsp.c

36

if (!clk)

arch/arm/mach-omap2/mcbsp.c

40

return omap2_clk_deny_idle(clk);

arch/arm/mach-omap2/mcbsp.c

42

return omap2_clk_allow_idle(clk);

arch/arm/mach-omap2/omap-iommu.c

55

struct clk *clk;

arch/arm/mach-omap2/omap-iommu.c

77

clk = of_clk_get(dev->of_node->parent, 0);

arch/arm/mach-omap2/omap-iommu.c

78

if (IS_ERR(clk)) {

arch/arm/mach-omap2/omap-iommu.c

83

hwclk = to_clk_hw_omap(__clk_get_hw(clk));

arch/arm/mach-omap2/omap-iommu.c

84

clk_put(clk);

arch/arm/mach-omap2/omap2-restart.c

21

static struct clk *reset_virt_prcm_set_ck, *reset_sys_ck;

arch/arm/mach-omap2/omap_device.c

119

_add_clkdev(od, oh->opt_clks[i].role, oh->opt_clks[i].clk);

arch/arm/mach-omap2/omap_device.c

53

struct clk *r;

arch/arm/mach-omap2/omap_hwmod.c

628

struct clk_hw_omap *clk;

arch/arm/mach-omap2/omap_hwmod.c

638

clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));

arch/arm/mach-omap2/omap_hwmod.c

639

return clk->clkdm;

arch/arm/mach-omap2/omap_hwmod.c

771

static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)

arch/arm/mach-omap2/omap_hwmod.c

774

struct clk *clk;

arch/arm/mach-omap2/omap_hwmod.c

799

clk = of_clk_get_from_provider(&clkspec);

arch/arm/mach-omap2/omap_hwmod.c

802

__func__, oh->name, clk,

arch/arm/mach-omap2/omap_hwmod.c

805

return clk;

arch/arm/mach-omap2/omap_hwmod.c

824

struct clk *clk = NULL;

arch/arm/mach-omap2/omap_hwmod.c

826

clk = _lookup_clkctrl_clk(oh);

arch/arm/mach-omap2/omap_hwmod.c

828

if (!IS_ERR_OR_NULL(clk)) {

arch/arm/mach-omap2/omap_hwmod.c

830

__clk_get_name(clk), oh->name);

arch/arm/mach-omap2/omap_hwmod.c

831

oh->main_clk = __clk_get_name(clk);

arch/arm/mach-omap2/omap_hwmod.c

832

oh->_clk = clk;

arch/arm/mach-omap2/omap_hwmod.c

873

struct clk *c;

arch/arm/mach-omap2/omap_hwmod.c

877

if (!os->clk)

arch/arm/mach-omap2/omap_hwmod.c

880

c = clk_get(NULL, os->clk);

arch/arm/mach-omap2/omap_hwmod.c

883

oh->name, os->clk);

arch/arm/mach-omap2/omap_hwmod.c

912

struct clk *c;

arch/arm/mach-omap2/omap_hwmod.c

917

c = clk_get(NULL, oc->clk);

arch/arm/mach-omap2/omap_hwmod.c

920

oh->name, oc->clk);

arch/arm/mach-omap2/omap_hwmod.h

180

const char *clk;

arch/arm/mach-omap2/omap_hwmod.h

181

struct clk *_clk;

arch/arm/mach-omap2/omap_hwmod.h

243

const char *clk;

arch/arm/mach-omap2/omap_hwmod.h

244

struct clk *_clk;

arch/arm/mach-omap2/omap_hwmod.h

585

struct clk *_clk;

arch/arm/mach-omap2/omap_hwmod_2420_data.c

151

{ .role = "pad_fck", .clk = "mcbsp_clks" },

arch/arm/mach-omap2/omap_hwmod_2420_data.c

152

{ .role = "prcm_fck", .clk = "func_96m_ck" },

arch/arm/mach-omap2/omap_hwmod_2420_data.c

238

.clk = "i2c1_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

246

.clk = "i2c2_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

254

.clk = "core_l3_ck",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

262

.clk = "dsp_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

270

.clk = "mpu_wdt_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

278

.clk = "gpios_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

286

.clk = "gpios_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

294

.clk = "gpios_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

302

.clk = "gpios_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

317

.clk = "mcbsp1_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

325

.clk = "mcbsp2_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

333

.clk = "mmc_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

341

.clk = "hdq_ick",

arch/arm/mach-omap2/omap_hwmod_2420_data.c

349

.clk = "core_l3_ck",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

208

{ .role = "pad_fck", .clk = "mcbsp_clks" },

arch/arm/mach-omap2/omap_hwmod_2430_data.c

209

{ .role = "prcm_fck", .clk = "func_96m_ck" },

arch/arm/mach-omap2/omap_hwmod_2430_data.c

311

{ .role = "dbck", .clk = "mmchsdb1_fck" },

arch/arm/mach-omap2/omap_hwmod_2430_data.c

337

{ .role = "dbck", .clk = "mmchsdb2_fck" },

arch/arm/mach-omap2/omap_hwmod_2430_data.c

379

.clk = "core_l3_ck",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

387

.clk = "i2c1_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

395

.clk = "i2c2_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

403

.clk = "usb_l4_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

411

.clk = "mmchs1_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

419

.clk = "mmchs2_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

427

.clk = "mcspi3_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

435

.clk = "core_l3_ck",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

443

.clk = "mpu_wdt_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

451

.clk = "gpios_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

459

.clk = "gpios_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

467

.clk = "gpios_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

475

.clk = "gpios_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

483

.clk = "gpio5_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

498

.clk = "mcbsp1_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

506

.clk = "mcbsp2_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

514

.clk = "mcbsp3_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

522

.clk = "mcbsp4_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

530

.clk = "mcbsp5_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

538

.clk = "hdq_ick",

arch/arm/mach-omap2/omap_hwmod_2430_data.c

546

.clk = "core_l3_ck",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

101

.clk = "gpt3_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

109

.clk = "gpt4_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

117

.clk = "gpt5_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

125

.clk = "gpt6_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

133

.clk = "gpt7_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

141

.clk = "gpt8_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

149

.clk = "gpt9_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

157

.clk = "gpt10_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

165

.clk = "gpt11_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

173

.clk = "gpt12_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

181

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

195

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

209

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

223

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

238

.clk = "rng_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

246

.clk = "sha_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

254

.clk = "aes_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

61

.clk = "uart1_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

69

.clk = "uart2_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

77

.clk = "uart3_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

85

.clk = "mcspi1_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

93

.clk = "mcspi2_ick",

arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c

411

{ .role = "tv_clk", .clk = "dss_54m_fck" },

arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c

412

{ .role = "sys_clk", .clk = "dss2_fck" },

arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c

445

{ .role = "ick", .clk = "dss_ick" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1159

{ .role = "dbck", .clk = "omap_32k_fck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1209

{ .role = "dbck", .clk = "omap_32k_fck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1253

{ .role = "dbck", .clk = "omap_32k_fck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1508

.clk = "core_l3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1523

.clk = "mmchs1_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1531

.clk = "mmchs1_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1540

.clk = "mmchs2_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1548

.clk = "mmchs2_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1558

.clk = "mmchs3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1568

.clk = "uart1_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1577

.clk = "uart2_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1586

.clk = "uart3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1595

.clk = "uart4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1604

.clk = "uart4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1612

.clk = "i2c1_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1627

.clk = "i2c2_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1643

.clk = "i2c3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1658

.clk = "sr_l4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1665

.clk = "sr_l4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1674

.clk = "sr_l4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1681

.clk = "sr_l4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1696

.clk = "core_l3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1704

.clk = "gpt3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1713

.clk = "gpt4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1722

.clk = "gpt5_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1731

.clk = "gpt6_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1740

.clk = "gpt7_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1749

.clk = "gpt8_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1758

.clk = "gpt9_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1766

.clk = "gpt10_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1774

.clk = "gpt11_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1783

.clk = "wdt2_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1791

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1805

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1820

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1835

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1850

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1865

.clk = "dss_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

1999

.clk = "mcbsp1_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2008

.clk = "mcbsp2_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2017

.clk = "mcbsp3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2026

.clk = "mcbsp4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2035

.clk = "mcbsp5_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2044

.clk = "mcbsp2_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2053

.clk = "mcbsp3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2068

.clk = "mcspi1_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2076

.clk = "mcspi2_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2084

.clk = "mcspi3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2093

.clk = "mcspi4_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2100

.clk = "core_l3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2108

.clk = "usbhost_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2116

.clk = "usbtll_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2124

.clk = "hdq_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2148

.clk = "emac_fck",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2161

.clk = "emac_fck",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2189

.clk = "emac_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2202

.clk = "emac_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2209

.clk = "core_l3_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2247

.clk = "sha12_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

2289

.clk = "ssi_ick",

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

415

{ .role = "softreset_uart1_fck", .clk = "uart1_fck" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

446

{ .role = "sys_clk", .clk = "dss2_alwon_fck" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

447

{ .role = "tv_clk", .clk = "dss_tv_fck" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

449

{ .role = "tv_dac_clk", .clk = "dss_96m_fck" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

541

{ .role = "sys_clk", .clk = "dss2_alwon_fck" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

559

{ .role = "ick", .clk = "dss_ick" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

578

{ .role = "tv_dac_clk", .clk = "dss_96m_fck" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

663

{ .role = "dbclk", .clk = "gpio1_dbck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

684

{ .role = "dbclk", .clk = "gpio2_dbck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

705

{ .role = "dbclk", .clk = "gpio3_dbck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

726

{ .role = "dbclk", .clk = "gpio4_dbck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

748

{ .role = "dbclk", .clk = "gpio5_dbck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

770

{ .role = "dbclk", .clk = "gpio6_dbck", },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

810

{ .role = "pad_fck", .clk = "mcbsp_clks" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

811

{ .role = "prcm_fck", .clk = "core_96m_fck" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

815

{ .role = "pad_fck", .clk = "mcbsp_clks" },

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

816

{ .role = "prcm_fck", .clk = "per_96m_fck" },

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

1011

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

1087

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

1094

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

1101

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

1108

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

1143

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

1178

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

247

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

286

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

307

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

328

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

365

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

402

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

422

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

452

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

474

{ .role = "dbclk", .clk = "sysclk18_ck" },

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

495

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

500

{ .role = "dbclk", .clk = "sysclk18_ck" },

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

521

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

526

{ .role = "dbclk", .clk = "sysclk18_ck" },

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

547

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

552

{ .role = "dbclk", .clk = "sysclk18_ck" },

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

573

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

645

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

665

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

700

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

720

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

740

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

760

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

780

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

811

.clk = "sysclk5_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

861

.clk = "sysclk5_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

894

.clk = "sysclk5_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

915

{ .role = "dbck", .clk = "sysclk18_ck", },

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

940

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

964

.clk = "sysclk6_ck",

arch/arm/mach-omap2/omap_hwmod_81xx_data.c

988

.clk = "sysclk4_ck",

arch/arm/mach-omap2/pdata-quirks.c

300

static struct clockdomain *ti_sysc_find_one_clockdomain(struct clk *clk)

arch/arm/mach-omap2/pdata-quirks.c

302

struct clk_hw *hw = __clk_get_hw(clk);

arch/arm/mach-omap2/pdata-quirks.c

331

struct clk *fck, struct clk *ick,

arch/arm/mach-omap2/timer.c

61

static struct clk *sys_clk;

arch/arm/mach-omap2/usb-tusb6010.c

80

dev_t.clk = 11100;

arch/arm/mach-omap2/voltage.c

247

struct clk *sys_ck;

arch/arm/mach-orion5x/common.c

62

static struct clk *tclk;

arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c

25

struct clk *xusbxti;

arch/arm/mach-sa1100/clock.c

130

clk_set_rate(hw->clk, 3686400);

arch/arm/mach-spear/spear13xx.c

101

struct clk *gpt_clk, *pclk;

arch/arm/mach-spear/spear3xx.c

74

struct clk *gpt_clk, *pclk;

arch/arm/mach-spear/spear6xx.c

371

struct clk *gpt_clk, *pclk;

arch/arm/mach-spear/time.c

64

static struct clk *gpt_clk;

arch/arm/mach-versatile/spc.c

523

static struct clk *ve_spc_clk_register(struct device *cpu_dev)

arch/arm/mach-versatile/spc.c

548

struct clk *clk;

arch/arm/mach-versatile/spc.c

565

clk = ve_spc_clk_register(cpu_dev);

arch/arm/mach-versatile/spc.c

566

if (IS_ERR(clk)) {

arch/arm/mach-versatile/spc.c

570

if (clk_register_clkdev(clk, NULL, dev_name(cpu_dev))) {

arch/arm/plat-orion/common.c

128

struct clk *clk)

arch/arm/plat-orion/common.c

131

membase, mapbase, irq, clk);

arch/arm/plat-orion/common.c

156

struct clk *clk)

arch/arm/plat-orion/common.c

159

membase, mapbase, irq, clk);

arch/arm/plat-orion/common.c

184

struct clk *clk)

arch/arm/plat-orion/common.c

187

membase, mapbase, irq, clk);

arch/arm/plat-orion/common.c

212

struct clk *clk)

arch/arm/plat-orion/common.c

215

membase, mapbase, irq, clk);

arch/arm/plat-orion/common.c

28

struct clk *clk)

arch/arm/plat-orion/common.c

30

clkdev_create(clk, con_id, "%s", dev_id);

arch/arm/plat-orion/common.c

37

void __init orion_clkdev_init(struct clk *tclk)

arch/arm/plat-orion/common.c

81

static unsigned long __init uart_get_clk_rate(struct clk *clk)

arch/arm/plat-orion/common.c

83

clk_prepare_enable(clk);

arch/arm/plat-orion/common.c

84

return clk_get_rate(clk);

arch/arm/plat-orion/common.c

94

struct clk *clk)

arch/arm/plat-orion/common.c

99

data->uartclk = uart_get_clk_rate(clk);

arch/arm/plat-orion/include/plat/common.h

101

struct clk *clk);

arch/arm/plat-orion/include/plat/common.h

103

void __init orion_clkdev_init(struct clk *tclk);

arch/arm/plat-orion/include/plat/common.h

20

struct clk *clk);

arch/arm/plat-orion/include/plat/common.h

25

struct clk *clk);

arch/arm/plat-orion/include/plat/common.h

30

struct clk *clk);

arch/arm/plat-orion/include/plat/common.h

35

struct clk *clk);

arch/loongarch/kernel/env.c

65

struct clk *clk;

arch/loongarch/kernel/env.c

72

clk = of_clk_get(np, 0);

arch/loongarch/kernel/env.c

76

if (IS_ERR(clk)) {

arch/loongarch/kernel/env.c

81

cpu_clock_freq = clk_get_rate(clk);

arch/loongarch/kernel/env.c

82

clk_put(clk);

arch/loongarch/kernel/time.c

199

static u64 read_const_counter(struct clocksource *clk)

arch/m68k/coldfire/clk.c

100

if ((--clk->enabled == 0) && clk->clk_ops)

arch/m68k/coldfire/clk.c

101

clk->clk_ops->disable(clk);

arch/m68k/coldfire/clk.c

106

unsigned long clk_get_rate(struct clk *clk)

arch/m68k/coldfire/clk.c

108

if (!clk)

arch/m68k/coldfire/clk.c

111

return clk->rate;

arch/m68k/coldfire/clk.c

116

long clk_round_rate(struct clk *clk, unsigned long rate)

arch/m68k/coldfire/clk.c

118

WARN_ON(clk);

arch/m68k/coldfire/clk.c

123

int clk_set_rate(struct clk *clk, unsigned long rate)

arch/m68k/coldfire/clk.c

125

WARN_ON(clk);

arch/m68k/coldfire/clk.c

130

int clk_set_parent(struct clk *clk, struct clk *parent)

arch/m68k/coldfire/clk.c

132

WARN_ON(clk);

arch/m68k/coldfire/clk.c

137

struct clk *clk_get_parent(struct clk *clk)

arch/m68k/coldfire/clk.c

139

WARN_ON(clk);

arch/m68k/coldfire/clk.c

31

void __clk_init_enabled(struct clk *clk)

arch/m68k/coldfire/clk.c

33

clk->enabled = 1;

arch/m68k/coldfire/clk.c

34

clk->clk_ops->enable(clk);

arch/m68k/coldfire/clk.c

37

void __clk_init_disabled(struct clk *clk)

arch/m68k/coldfire/clk.c

39

clk->enabled = 0;

arch/m68k/coldfire/clk.c

40

clk->clk_ops->disable(clk);

arch/m68k/coldfire/clk.c

43

static void __clk_enable0(struct clk *clk)

arch/m68k/coldfire/clk.c

45

__raw_writeb(clk->slot, MCFPM_PPMCR0);

arch/m68k/coldfire/clk.c

48

static void __clk_disable0(struct clk *clk)

arch/m68k/coldfire/clk.c

50

__raw_writeb(clk->slot, MCFPM_PPMSR0);

arch/m68k/coldfire/clk.c

59

static void __clk_enable1(struct clk *clk)

arch/m68k/coldfire/clk.c

61

__raw_writeb(clk->slot, MCFPM_PPMCR1);

arch/m68k/coldfire/clk.c

64

static void __clk_disable1(struct clk *clk)

arch/m68k/coldfire/clk.c

66

__raw_writeb(clk->slot, MCFPM_PPMSR1);

arch/m68k/coldfire/clk.c

76

int clk_enable(struct clk *clk)

arch/m68k/coldfire/clk.c

80

if (!clk)

arch/m68k/coldfire/clk.c

84

if ((clk->enabled++ == 0) && clk->clk_ops)

arch/m68k/coldfire/clk.c

85

clk->clk_ops->enable(clk);

arch/m68k/coldfire/clk.c

92

void clk_disable(struct clk *clk)

arch/m68k/coldfire/clk.c

96

if (!clk)

arch/m68k/coldfire/m520x.c

77

static struct clk * const enable_clks[] __initconst = {

arch/m68k/coldfire/m520x.c

94

static struct clk * const disable_clks[] __initconst = {

arch/m68k/coldfire/m53xx.c

107

static struct clk * const enable_clks[] __initconst = {

arch/m68k/coldfire/m53xx.c

126

static struct clk * const disable_clks[] __initconst = {

arch/m68k/coldfire/m5441x.c

143

static struct clk * const enable_clks[] __initconst = {

arch/m68k/coldfire/m5441x.c

166

static struct clk * const disable_clks[] __initconst = {

arch/m68k/coldfire/m5441x.c

202

static void __clk_enable2(struct clk *clk)

arch/m68k/coldfire/m5441x.c

204

__raw_writel(__raw_readl(MCFSDHC_CLK) | (1 << clk->slot), MCFSDHC_CLK);

arch/m68k/coldfire/m5441x.c

207

static void __clk_disable2(struct clk *clk)

arch/m68k/coldfire/m5441x.c

209

__raw_writel(__raw_readl(MCFSDHC_CLK) & ~(1 << clk->slot), MCFSDHC_CLK);

arch/m68k/include/asm/mcfclk.h

10

struct clk;

arch/m68k/include/asm/mcfclk.h

13

void (*enable)(struct clk *);

arch/m68k/include/asm/mcfclk.h

14

void (*disable)(struct clk *);

arch/m68k/include/asm/mcfclk.h

33

static struct clk __clk_##clk_bank##_##clk_slot = { \

arch/m68k/include/asm/mcfclk.h

39

void __clk_init_enabled(struct clk *);

arch/m68k/include/asm/mcfclk.h

40

void __clk_init_disabled(struct clk *);

arch/m68k/include/asm/mcfclk.h

43

static struct clk clk_##clk_ref = { \

arch/microblaze/kernel/cpu/cpuinfo.c

127

struct clk *clk;

arch/microblaze/kernel/cpu/cpuinfo.c

129

clk = of_clk_get(cpu, 0);

arch/microblaze/kernel/cpu/cpuinfo.c

130

if (IS_ERR(clk)) {

arch/microblaze/kernel/cpu/cpuinfo.c

135

cpuinfo.cpu_clock_freq = clk_get_rate(clk);

arch/microblaze/kernel/timer.c

248

struct clk *clk;

arch/microblaze/kernel/timer.c

292

clk = of_clk_get(timer, 0);

arch/microblaze/kernel/timer.c

293

if (IS_ERR(clk)) {

arch/microblaze/kernel/timer.c

299

timer_clock_freq = clk_get_rate(clk);

arch/mips/alchemy/common/clock.c

1053

struct clk *c;

arch/mips/alchemy/common/clock.c

150

static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name,

arch/mips/alchemy/common/clock.c

155

struct clk *clk;

arch/mips/alchemy/common/clock.c

168

clk = clk_register(NULL, h);

arch/mips/alchemy/common/clock.c

169

if (IS_ERR(clk)) {

arch/mips/alchemy/common/clock.c

174

return clk;

arch/mips/alchemy/common/clock.c

244

static struct clk __init *alchemy_clk_setup_aux(const char *parent_name,

arch/mips/alchemy/common/clock.c

249

struct clk *c;

arch/mips/alchemy/common/clock.c

277

static struct clk __init *alchemy_clk_setup_sysbus(const char *pn)

arch/mips/alchemy/common/clock.c

280

struct clk *c;

arch/mips/alchemy/common/clock.c

291

static struct clk __init *alchemy_clk_setup_periph(const char *pn)

arch/mips/alchemy/common/clock.c

294

struct clk *c;

arch/mips/alchemy/common/clock.c

305

static struct clk __init *alchemy_clk_setup_mem(const char *pn, int ct)

arch/mips/alchemy/common/clock.c

309

struct clk *c;

arch/mips/alchemy/common/clock.c

339

static struct clk __init *alchemy_clk_setup_lrclk(const char *pn, int t)

arch/mips/alchemy/common/clock.c

348

struct clk *c;

arch/mips/alchemy/common/clock.c

756

struct clk *c;

arch/mips/alchemy/common/clock.c

967

struct clk *c;

arch/mips/alchemy/common/platform.c

107

struct clk *clk = clk_get(NULL, ALCHEMY_PERIPH_CLK);

arch/mips/alchemy/common/platform.c

109

if (IS_ERR(clk))

arch/mips/alchemy/common/platform.c

111

if (clk_prepare_enable(clk)) {

arch/mips/alchemy/common/platform.c

112

clk_put(clk);

arch/mips/alchemy/common/platform.c

115

uartclk = clk_get_rate(clk);

arch/mips/alchemy/common/platform.c

116

clk_put(clk);

arch/mips/alchemy/common/usb.c

396

struct clk *c;

arch/mips/alchemy/common/usb.c

429

struct clk *c = clk_get(NULL, "usbh_clk");

arch/mips/alchemy/devboards/db1000.c

456

struct clk *c, *p;

arch/mips/alchemy/devboards/db1200.c

804

struct clk *c;

arch/mips/alchemy/devboards/db1300.c

789

struct clk *c;

arch/mips/alchemy/devboards/db1550.c

585

struct clk *c;

arch/mips/ath79/clock.c

31

static struct clk *clks[ATH79_CLK_END];

arch/mips/ath79/clock.c

51

static void __init __ath79_set_clk(int type, const char *name, struct clk *clk)

arch/mips/ath79/clock.c

53

if (IS_ERR(clk))

arch/mips/ath79/clock.c

56

clks[type] = clk;

arch/mips/ath79/clock.c

57

clk_register_clkdev(clk, name, NULL);

arch/mips/ath79/clock.c

60

static struct clk * __init ath79_set_clk(int type, unsigned long rate)

arch/mips/ath79/clock.c

620

struct clk *ref_clk;

arch/mips/ath79/clock.c

63

struct clk *clk;

arch/mips/ath79/clock.c

65

clk = clk_register_fixed_rate(NULL, name, NULL, 0, rate);

arch/mips/ath79/clock.c

66

__ath79_set_clk(type, name, clk);

arch/mips/ath79/clock.c

67

return clk;

arch/mips/ath79/clock.c

70

static struct clk * __init ath79_set_ff_clk(int type, const char *parent,

arch/mips/ath79/clock.c

74

struct clk *clk;

arch/mips/ath79/clock.c

76

clk = clk_register_fixed_factor(NULL, name, parent, 0, mult, div);

arch/mips/ath79/clock.c

77

__ath79_set_clk(type, name, clk);

arch/mips/ath79/clock.c

78

return clk;

arch/mips/ath79/clock.c

83

struct clk *clk = clks[ATH79_CLK_REF];

arch/mips/ath79/clock.c

85

if (clk)

arch/mips/ath79/clock.c

86

rate = clk_get_rate(clk);

arch/mips/ath79/clock.c

88

clk = ath79_set_clk(ATH79_CLK_REF, rate);

arch/mips/ath79/setup.c

241

struct clk *clk;

arch/mips/ath79/setup.c

252

clk = of_clk_get(np, 0);

arch/mips/ath79/setup.c

253

if (IS_ERR(clk)) {

arch/mips/ath79/setup.c

254

pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));

arch/mips/ath79/setup.c

258

cpu_clk_rate = clk_get_rate(clk);

arch/mips/ath79/setup.c

265

clk_put(clk);

arch/mips/bcm63xx/clk.c

100

static struct clk clk_enet0 = {

arch/mips/bcm63xx/clk.c

105

static struct clk clk_enet1 = {

arch/mips/bcm63xx/clk.c

113

static void ephy_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

120

static struct clk clk_ephy = {

arch/mips/bcm63xx/clk.c

127

static void swpkt_sar_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

135

static struct clk clk_swpkt_sar = {

arch/mips/bcm63xx/clk.c

142

static void swpkt_usb_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

150

static struct clk clk_swpkt_usb = {

arch/mips/bcm63xx/clk.c

157

static void enetsw_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

185

static struct clk clk_enetsw = {

arch/mips/bcm63xx/clk.c

192

static void pcm_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

200

static struct clk clk_pcm = {

arch/mips/bcm63xx/clk.c

207

static void usbh_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

219

static struct clk clk_usbh = {

arch/mips/bcm63xx/clk.c

22

void (*set)(struct clk *, int);

arch/mips/bcm63xx/clk.c

226

static void usbd_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

236

static struct clk clk_usbd = {

arch/mips/bcm63xx/clk.c

243

static void spi_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

261

static struct clk clk_spi = {

arch/mips/bcm63xx/clk.c

268

static void hsspi_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

282

static struct clk clk_hsspi = {

arch/mips/bcm63xx/clk.c

289

static struct clk clk_hsspi_pll;

arch/mips/bcm63xx/clk.c

294

static void xtm_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

31

static void clk_enable_unlocked(struct clk *clk)

arch/mips/bcm63xx/clk.c

316

static struct clk clk_xtm = {

arch/mips/bcm63xx/clk.c

323

static void ipsec_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

33

if (clk->set && (clk->usage++) == 0)

arch/mips/bcm63xx/clk.c

331

static struct clk clk_ipsec = {

arch/mips/bcm63xx/clk.c

339

static void pcie_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

34

clk->set(clk, 1);

arch/mips/bcm63xx/clk.c

347

static struct clk clk_pcie = {

arch/mips/bcm63xx/clk.c

354

static struct clk clk_periph = {

arch/mips/bcm63xx/clk.c

362

int clk_enable(struct clk *clk)

arch/mips/bcm63xx/clk.c

364

if (!clk)

arch/mips/bcm63xx/clk.c

367

clk_enable_unlocked(clk);

arch/mips/bcm63xx/clk.c

37

static void clk_disable_unlocked(struct clk *clk)

arch/mips/bcm63xx/clk.c

374

void clk_disable(struct clk *clk)

arch/mips/bcm63xx/clk.c

376

if (!clk)

arch/mips/bcm63xx/clk.c

380

clk_disable_unlocked(clk);

arch/mips/bcm63xx/clk.c

386

struct clk *clk_get_parent(struct clk *clk)

arch/mips/bcm63xx/clk.c

39

if (clk->set && (--clk->usage) == 0)

arch/mips/bcm63xx/clk.c

392

int clk_set_parent(struct clk *clk, struct clk *parent)

arch/mips/bcm63xx/clk.c

398

unsigned long clk_get_rate(struct clk *clk)

arch/mips/bcm63xx/clk.c

40

clk->set(clk, 0);

arch/mips/bcm63xx/clk.c

400

if (!clk)

arch/mips/bcm63xx/clk.c

403

return clk->rate;

arch/mips/bcm63xx/clk.c

408

int clk_set_rate(struct clk *clk, unsigned long rate)

arch/mips/bcm63xx/clk.c

414

long clk_round_rate(struct clk *clk, unsigned long rate)

arch/mips/bcm63xx/clk.c

58

static void enet_misc_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

74

static struct clk clk_enet_misc = {

arch/mips/bcm63xx/clk.c

82

static void enetx_set(struct clk *clk, int enable)

arch/mips/bcm63xx/clk.c

92

if (clk->id == 0)

arch/mips/bcm63xx/timer.c

23

static struct clk *periph_clk;

arch/mips/generic/init.c

154

struct clk *clk;

arch/mips/generic/init.c

169

clk = of_clk_get(np, 0);

arch/mips/generic/init.c

170

if (IS_ERR(clk)) {

arch/mips/generic/init.c

171

pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));

arch/mips/generic/init.c

175

mips_hpt_frequency = clk_get_rate(clk);

arch/mips/generic/init.c

176

clk_put(clk);

arch/mips/include/asm/mach-lantiq/lantiq.h

38

extern int clk_activate(struct clk *clk);

arch/mips/include/asm/mach-lantiq/lantiq.h

39

extern void clk_deactivate(struct clk *clk);

arch/mips/include/asm/mach-lantiq/lantiq.h

40

extern struct clk *clk_get_cpu(void);

arch/mips/include/asm/mach-lantiq/lantiq.h

41

extern struct clk *clk_get_fpi(void);

arch/mips/include/asm/mach-lantiq/lantiq.h

42

extern struct clk *clk_get_io(void);

arch/mips/include/asm/mach-lantiq/lantiq.h

43

extern struct clk *clk_get_ppe(void);

arch/mips/include/asm/octeon/cvmx-dpi-defs.h

117

uint64_t clk:1;

arch/mips/include/asm/octeon/cvmx-dpi-defs.h

121

uint64_t clk:1;

arch/mips/include/asm/octeon/cvmx-lmcx-defs.h

1403

uint64_t clk:5;

arch/mips/include/asm/octeon/cvmx-lmcx-defs.h

1405

uint64_t clk:5;

arch/mips/include/asm/octeon/cvmx-lmcx-defs.h

1418

uint64_t clk:4;

arch/mips/include/asm/octeon/cvmx-lmcx-defs.h

1420

uint64_t clk:4;

arch/mips/lantiq/clk.c

101

long clk_round_rate(struct clk *clk, unsigned long rate)

arch/mips/lantiq/clk.c

103

if (unlikely(!clk_good(clk)))

arch/mips/lantiq/clk.c

105

if (clk->rates && *clk->rates) {

arch/mips/lantiq/clk.c

106

unsigned long *r = clk->rates;

arch/mips/lantiq/clk.c

111

return clk->rate;

arch/mips/lantiq/clk.c

118

int clk_enable(struct clk *clk)

arch/mips/lantiq/clk.c

120

if (unlikely(!clk_good(clk)))

arch/mips/lantiq/clk.c

123

if (clk->enable)

arch/mips/lantiq/clk.c

124

return clk->enable(clk);

arch/mips/lantiq/clk.c

130

void clk_disable(struct clk *clk)

arch/mips/lantiq/clk.c

132

if (unlikely(!clk_good(clk)))

arch/mips/lantiq/clk.c

135

if (clk->disable)

arch/mips/lantiq/clk.c

136

clk->disable(clk);

arch/mips/lantiq/clk.c

140

int clk_activate(struct clk *clk)

arch/mips/lantiq/clk.c

142

if (unlikely(!clk_good(clk)))

arch/mips/lantiq/clk.c

145

if (clk->activate)

arch/mips/lantiq/clk.c

146

return clk->activate(clk);

arch/mips/lantiq/clk.c

152

void clk_deactivate(struct clk *clk)

arch/mips/lantiq/clk.c

154

if (unlikely(!clk_good(clk)))

arch/mips/lantiq/clk.c

157

if (clk->deactivate)

arch/mips/lantiq/clk.c

158

clk->deactivate(clk);

arch/mips/lantiq/clk.c

162

struct clk *clk_get_parent(struct clk *clk)

arch/mips/lantiq/clk.c

168

int clk_set_parent(struct clk *clk, struct clk *parent)

arch/mips/lantiq/clk.c

192

struct clk *clk;

arch/mips/lantiq/clk.c

196

clk = clk_get_cpu();

arch/mips/lantiq/clk.c

197

mips_hpt_frequency = clk_get_rate(clk) / get_counter_resolution();

arch/mips/lantiq/clk.c

199

pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);

arch/mips/lantiq/clk.c

200

clk_put(clk);

arch/mips/lantiq/clk.c

27

static struct clk cpu_clk_generic[4];

arch/mips/lantiq/clk.c

38

struct clk *clk_get_cpu(void)

arch/mips/lantiq/clk.c

43

struct clk *clk_get_fpi(void)

arch/mips/lantiq/clk.c

49

struct clk *clk_get_io(void)

arch/mips/lantiq/clk.c

55

struct clk *clk_get_ppe(void)

arch/mips/lantiq/clk.c

61

static inline int clk_good(struct clk *clk)

arch/mips/lantiq/clk.c

63

return clk && !IS_ERR(clk);

arch/mips/lantiq/clk.c

66

unsigned long clk_get_rate(struct clk *clk)

arch/mips/lantiq/clk.c

68

if (unlikely(!clk_good(clk)))

arch/mips/lantiq/clk.c

71

if (clk->rate != 0)

arch/mips/lantiq/clk.c

72

return clk->rate;

arch/mips/lantiq/clk.c

74

if (clk->get_rate != NULL)

arch/mips/lantiq/clk.c

75

return clk->get_rate();

arch/mips/lantiq/clk.c

81

int clk_set_rate(struct clk *clk, unsigned long rate)

arch/mips/lantiq/clk.c

83

if (unlikely(!clk_good(clk)))

arch/mips/lantiq/clk.c

85

if (clk->rates && *clk->rates) {

arch/mips/lantiq/clk.c

86

unsigned long *r = clk->rates;

arch/mips/lantiq/clk.c

92

clk->cl.dev_id, clk->cl.con_id, rate);

arch/mips/lantiq/clk.c

96

clk->rate = rate;

arch/mips/lantiq/clk.h

65

int (*enable) (struct clk *clk);

arch/mips/lantiq/clk.h

66

void (*disable) (struct clk *clk);

arch/mips/lantiq/clk.h

67

int (*activate) (struct clk *clk);

arch/mips/lantiq/clk.h

68

void (*deactivate) (struct clk *clk);

arch/mips/lantiq/clk.h

69

void (*reboot) (struct clk *clk);

arch/mips/lantiq/falcon/sysctrl.c

100

sysctl_w32(clk->module, clk->bits, SYSCTL_DEACT);

arch/mips/lantiq/falcon/sysctrl.c

101

sysctl_wait(clk, 0, SYSCTL_ACTS);

arch/mips/lantiq/falcon/sysctrl.c

104

static int sysctl_clken(struct clk *clk)

arch/mips/lantiq/falcon/sysctrl.c

106

sysctl_w32(clk->module, clk->bits, SYSCTL_CLKEN);

arch/mips/lantiq/falcon/sysctrl.c

107

sysctl_w32(clk->module, clk->bits, SYSCTL_ACT);

arch/mips/lantiq/falcon/sysctrl.c

108

sysctl_wait(clk, clk->bits, SYSCTL_CLKS);

arch/mips/lantiq/falcon/sysctrl.c

112

static void sysctl_clkdis(struct clk *clk)

arch/mips/lantiq/falcon/sysctrl.c

114

sysctl_w32(clk->module, clk->bits, SYSCTL_CLKCLR);

arch/mips/lantiq/falcon/sysctrl.c

115

sysctl_wait(clk, 0, SYSCTL_CLKS);

arch/mips/lantiq/falcon/sysctrl.c

118

static void sysctl_reboot(struct clk *clk)

arch/mips/lantiq/falcon/sysctrl.c

123

act = sysctl_r32(clk->module, SYSCTL_ACT);

arch/mips/lantiq/falcon/sysctrl.c

124

bits = ~act & clk->bits;

arch/mips/lantiq/falcon/sysctrl.c

126

sysctl_w32(clk->module, bits, SYSCTL_CLKEN);

arch/mips/lantiq/falcon/sysctrl.c

127

sysctl_w32(clk->module, bits, SYSCTL_ACT);

arch/mips/lantiq/falcon/sysctrl.c

128

sysctl_wait(clk, bits, SYSCTL_ACTS);

arch/mips/lantiq/falcon/sysctrl.c

130

sysctl_w32(clk->module, act & clk->bits, SYSCTL_RBT);

arch/mips/lantiq/falcon/sysctrl.c

131

sysctl_wait(clk, clk->bits, SYSCTL_ACTS);

arch/mips/lantiq/falcon/sysctrl.c

164

struct clk *clk = kzalloc_obj(struct clk);

arch/mips/lantiq/falcon/sysctrl.c

166

if (!clk)

arch/mips/lantiq/falcon/sysctrl.c

168

clk->cl.dev_id = dev;

arch/mips/lantiq/falcon/sysctrl.c

169

clk->cl.con_id = NULL;

arch/mips/lantiq/falcon/sysctrl.c

170

clk->cl.clk = clk;

arch/mips/lantiq/falcon/sysctrl.c

171

clk->module = module;

arch/mips/lantiq/falcon/sysctrl.c

172

clk->bits = bits;

arch/mips/lantiq/falcon/sysctrl.c

173

clk->activate = sysctl_activate;

arch/mips/lantiq/falcon/sysctrl.c

174

clk->deactivate = sysctl_deactivate;

arch/mips/lantiq/falcon/sysctrl.c

175

clk->enable = sysctl_clken;

arch/mips/lantiq/falcon/sysctrl.c

176

clk->disable = sysctl_clkdis;

arch/mips/lantiq/falcon/sysctrl.c

177

clk->reboot = sysctl_reboot;

arch/mips/lantiq/falcon/sysctrl.c

178

clkdev_add(&clk->cl);

arch/mips/lantiq/falcon/sysctrl.c

76

static inline void sysctl_wait(struct clk *clk,

arch/mips/lantiq/falcon/sysctrl.c

81

do {} while (--err && ((sysctl_r32(clk->module, reg)

arch/mips/lantiq/falcon/sysctrl.c

82

& clk->bits) != test));

arch/mips/lantiq/falcon/sysctrl.c

85

clk->module, clk->bits, test,

arch/mips/lantiq/falcon/sysctrl.c

86

sysctl_r32(clk->module, reg) & clk->bits);

arch/mips/lantiq/falcon/sysctrl.c

89

static int sysctl_activate(struct clk *clk)

arch/mips/lantiq/falcon/sysctrl.c

91

sysctl_w32(clk->module, clk->bits, SYSCTL_CLKEN);

arch/mips/lantiq/falcon/sysctrl.c

92

sysctl_w32(clk->module, clk->bits, SYSCTL_ACT);

arch/mips/lantiq/falcon/sysctrl.c

93

sysctl_wait(clk, clk->bits, SYSCTL_ACTS);

arch/mips/lantiq/falcon/sysctrl.c

97

static void sysctl_deactivate(struct clk *clk)

arch/mips/lantiq/falcon/sysctrl.c

99

sysctl_w32(clk->module, clk->bits, SYSCTL_CLKCLR);

arch/mips/lantiq/xway/clk.c

105

unsigned long clk;

arch/mips/lantiq/xway/clk.c

111

clk = CLOCK_600M;

arch/mips/lantiq/xway/clk.c

114

clk = CLOCK_500M;

arch/mips/lantiq/xway/clk.c

117

clk = CLOCK_393M;

arch/mips/lantiq/xway/clk.c

120

clk = CLOCK_333M;

arch/mips/lantiq/xway/clk.c

124

clk = CLOCK_196_608M;

arch/mips/lantiq/xway/clk.c

127

clk = CLOCK_167M;

arch/mips/lantiq/xway/clk.c

132

clk = CLOCK_125M;

arch/mips/lantiq/xway/clk.c

135

clk = 0;

arch/mips/lantiq/xway/clk.c

139

return clk;

arch/mips/lantiq/xway/clk.c

145

unsigned long clk;

arch/mips/lantiq/xway/clk.c

153

clk = cpu_clk;

arch/mips/lantiq/xway/clk.c

157

clk = cpu_clk / 2;

arch/mips/lantiq/xway/clk.c

161

clk = (cpu_clk * 2) / 5;

arch/mips/lantiq/xway/clk.c

165

clk = cpu_clk / 3;

arch/mips/lantiq/xway/clk.c

168

clk = 0;

arch/mips/lantiq/xway/clk.c

172

return clk;

arch/mips/lantiq/xway/clk.c

178

unsigned long clk;

arch/mips/lantiq/xway/clk.c

182

clk = CLOCK_500M;

arch/mips/lantiq/xway/clk.c

185

clk = CLOCK_432M;

arch/mips/lantiq/xway/clk.c

188

clk = CLOCK_288M;

arch/mips/lantiq/xway/clk.c

191

clk = CLOCK_500M;

arch/mips/lantiq/xway/clk.c

195

return clk;

arch/mips/lantiq/xway/clk.c

250

unsigned long clk;

arch/mips/lantiq/xway/clk.c

254

clk = CLOCK_250M;

arch/mips/lantiq/xway/clk.c

257

clk = CLOCK_400M;

arch/mips/lantiq/xway/clk.c

260

clk = CLOCK_250M;

arch/mips/lantiq/xway/clk.c

264

return clk;

arch/mips/lantiq/xway/clk.c

334

unsigned long clk;

arch/mips/lantiq/xway/clk.c

338

clk = CLOCK_250M;

arch/mips/lantiq/xway/clk.c

341

clk = CLOCK_432M;

arch/mips/lantiq/xway/clk.c

344

clk = CLOCK_400M;

arch/mips/lantiq/xway/clk.c

347

clk = CLOCK_250M;

arch/mips/lantiq/xway/clk.c

350

return clk;

arch/mips/lantiq/xway/clk.c

57

unsigned long clk;

arch/mips/lantiq/xway/clk.c

61

clk = CLOCK_240M;

arch/mips/lantiq/xway/clk.c

64

clk = CLOCK_222M;

arch/mips/lantiq/xway/clk.c

67

clk = CLOCK_133M;

arch/mips/lantiq/xway/clk.c

70

clk = CLOCK_266M;

arch/mips/lantiq/xway/clk.c

74

return clk;

arch/mips/lantiq/xway/dma.c

241

struct clk *clk;

arch/mips/lantiq/xway/dma.c

250

clk = clk_get(&pdev->dev, NULL);

arch/mips/lantiq/xway/dma.c

251

if (IS_ERR(clk))

arch/mips/lantiq/xway/dma.c

254

clk_enable(clk);

arch/mips/lantiq/xway/gptu.c

105

GPTU_CON(clk->bits));

arch/mips/lantiq/xway/gptu.c

106

gptu_w32(1, GPTU_RLD(clk->bits));

arch/mips/lantiq/xway/gptu.c

107

gptu_w32(gptu_r32(GPTU_IRNEN) | BIT(clk->bits), GPTU_IRNEN);

arch/mips/lantiq/xway/gptu.c

108

gptu_w32(RUN_SEN | RUN_RL, GPTU_RUN(clk->bits));

arch/mips/lantiq/xway/gptu.c

112

static void gptu_disable(struct clk *clk)

arch/mips/lantiq/xway/gptu.c

114

gptu_w32(0, GPTU_RUN(clk->bits));

arch/mips/lantiq/xway/gptu.c

115

gptu_w32(0, GPTU_CON(clk->bits));

arch/mips/lantiq/xway/gptu.c

116

gptu_w32(0, GPTU_RLD(clk->bits));

arch/mips/lantiq/xway/gptu.c

117

gptu_w32(gptu_r32(GPTU_IRNEN) & ~BIT(clk->bits), GPTU_IRNEN);

arch/mips/lantiq/xway/gptu.c

118

free_irq(irqres[clk->bits].start, NULL);

arch/mips/lantiq/xway/gptu.c

124

struct clk *clk = kzalloc_obj(struct clk);

arch/mips/lantiq/xway/gptu.c

126

if (!clk)

arch/mips/lantiq/xway/gptu.c

128

clk->cl.dev_id = dev_name(dev);

arch/mips/lantiq/xway/gptu.c

129

clk->cl.con_id = con;

arch/mips/lantiq/xway/gptu.c

130

clk->cl.clk = clk;

arch/mips/lantiq/xway/gptu.c

131

clk->enable = gptu_enable;

arch/mips/lantiq/xway/gptu.c

132

clk->disable = gptu_disable;

arch/mips/lantiq/xway/gptu.c

133

clk->bits = timer;

arch/mips/lantiq/xway/gptu.c

134

clkdev_add(&clk->cl);

arch/mips/lantiq/xway/gptu.c

139

struct clk *clk;

arch/mips/lantiq/xway/gptu.c

152

clk = clk_get(&pdev->dev, NULL);

arch/mips/lantiq/xway/gptu.c

153

if (IS_ERR(clk)) {

arch/mips/lantiq/xway/gptu.c

157

clk_enable(clk);

arch/mips/lantiq/xway/gptu.c

166

clk_disable(clk);

arch/mips/lantiq/xway/gptu.c

167

clk_put(clk);

arch/mips/lantiq/xway/gptu.c

95

static int gptu_enable(struct clk *clk)

arch/mips/lantiq/xway/gptu.c

97

int ret = request_irq(irqres[clk->bits].start, timer_irq_handler,

arch/mips/lantiq/xway/sysctrl.c

189

static int cgu_enable(struct clk *clk)

arch/mips/lantiq/xway/sysctrl.c

191

ltq_cgu_w32(ltq_cgu_r32(ifccr) | clk->bits, ifccr);

arch/mips/lantiq/xway/sysctrl.c

196

static void cgu_disable(struct clk *clk)

arch/mips/lantiq/xway/sysctrl.c

198

ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~clk->bits, ifccr);

arch/mips/lantiq/xway/sysctrl.c

202

static int pmu_enable(struct clk *clk)

arch/mips/lantiq/xway/sysctrl.c

208

pmu_w32(clk->bits, PWDCR_EN_XRX(clk->module));

arch/mips/lantiq/xway/sysctrl.c

210

(!(pmu_r32(PWDSR_XRX(clk->module)) & clk->bits)));

arch/mips/lantiq/xway/sysctrl.c

214

pmu_w32(pmu_r32(PWDCR(clk->module)) & ~clk->bits,

arch/mips/lantiq/xway/sysctrl.c

215

PWDCR(clk->module));

arch/mips/lantiq/xway/sysctrl.c

217

(pmu_r32(PWDSR(clk->module)) & clk->bits));

arch/mips/lantiq/xway/sysctrl.c

228

static void pmu_disable(struct clk *clk)

arch/mips/lantiq/xway/sysctrl.c

234

pmu_w32(clk->bits, PWDCR_DIS_XRX(clk->module));

arch/mips/lantiq/xway/sysctrl.c

236

(pmu_r32(PWDSR_XRX(clk->module)) & clk->bits));

arch/mips/lantiq/xway/sysctrl.c

239

pmu_w32(pmu_r32(PWDCR(clk->module)) | clk->bits,

arch/mips/lantiq/xway/sysctrl.c

240

PWDCR(clk->module));

arch/mips/lantiq/xway/sysctrl.c

242

(!(pmu_r32(PWDSR(clk->module)) & clk->bits)));

arch/mips/lantiq/xway/sysctrl.c

270

static int pci_enable(struct clk *clk)

arch/mips/lantiq/xway/sysctrl.c

277

if (clk->rate == CLOCK_33M)

arch/mips/lantiq/xway/sysctrl.c

283

if (clk->rate == CLOCK_33M)

arch/mips/lantiq/xway/sysctrl.c

289

pmu_enable(clk);

arch/mips/lantiq/xway/sysctrl.c

294

static int pci_ext_enable(struct clk *clk)

arch/mips/lantiq/xway/sysctrl.c

302

static void pci_ext_disable(struct clk *clk)

arch/mips/lantiq/xway/sysctrl.c

309

static int clkout_enable(struct clk *clk)

arch/mips/lantiq/xway/sysctrl.c

315

if (clk->rates[i] == clk->rate) {

arch/mips/lantiq/xway/sysctrl.c

316

int shift = 14 - (2 * clk->module);

arch/mips/lantiq/xway/sysctrl.c

317

int enable = 7 - clk->module;

arch/mips/lantiq/xway/sysctrl.c

334

struct clk *clk = kzalloc_obj(struct clk);

arch/mips/lantiq/xway/sysctrl.c

336

if (!clk)

arch/mips/lantiq/xway/sysctrl.c

338

clk->cl.dev_id = dev;

arch/mips/lantiq/xway/sysctrl.c

339

clk->cl.con_id = con;

arch/mips/lantiq/xway/sysctrl.c

340

clk->cl.clk = clk;

arch/mips/lantiq/xway/sysctrl.c

341

clk->enable = pmu_enable;

arch/mips/lantiq/xway/sysctrl.c

342

clk->disable = pmu_disable;

arch/mips/lantiq/xway/sysctrl.c

343

clk->module = module;

arch/mips/lantiq/xway/sysctrl.c

344

clk->bits = bits;

arch/mips/lantiq/xway/sysctrl.c

350

pmu_disable(clk);

arch/mips/lantiq/xway/sysctrl.c

352

clkdev_add(&clk->cl);

arch/mips/lantiq/xway/sysctrl.c

359

struct clk *clk = kzalloc_obj(struct clk);

arch/mips/lantiq/xway/sysctrl.c

361

if (!clk)

arch/mips/lantiq/xway/sysctrl.c

363

clk->cl.dev_id = dev;

arch/mips/lantiq/xway/sysctrl.c

364

clk->cl.con_id = con;

arch/mips/lantiq/xway/sysctrl.c

365

clk->cl.clk = clk;

arch/mips/lantiq/xway/sysctrl.c

366

clk->enable = cgu_enable;

arch/mips/lantiq/xway/sysctrl.c

367

clk->disable = cgu_disable;

arch/mips/lantiq/xway/sysctrl.c

368

clk->bits = bits;

arch/mips/lantiq/xway/sysctrl.c

369

clkdev_add(&clk->cl);

arch/mips/lantiq/xway/sysctrl.c

377

struct clk *clk = kzalloc_obj(struct clk);

arch/mips/lantiq/xway/sysctrl.c

378

struct clk *clk_ext = kzalloc_obj(struct clk);

arch/mips/lantiq/xway/sysctrl.c

381

if (clk) {

arch/mips/lantiq/xway/sysctrl.c

382

clk->cl.dev_id = "17000000.pci";

arch/mips/lantiq/xway/sysctrl.c

383

clk->cl.con_id = NULL;

arch/mips/lantiq/xway/sysctrl.c

384

clk->cl.clk = clk;

arch/mips/lantiq/xway/sysctrl.c

385

clk->rate = CLOCK_33M;

arch/mips/lantiq/xway/sysctrl.c

386

clk->rates = valid_pci_rates;

arch/mips/lantiq/xway/sysctrl.c

387

clk->enable = pci_enable;

arch/mips/lantiq/xway/sysctrl.c

388

clk->disable = pmu_disable;

arch/mips/lantiq/xway/sysctrl.c

389

clk->module = 0;

arch/mips/lantiq/xway/sysctrl.c

390

clk->bits = PMU_PCI;

arch/mips/lantiq/xway/sysctrl.c

391

clkdev_add(&clk->cl);

arch/mips/lantiq/xway/sysctrl.c

398

clk_ext->cl.clk = clk_ext;

arch/mips/lantiq/xway/sysctrl.c

418

struct clk *clk;

arch/mips/lantiq/xway/sysctrl.c

426

clk = kzalloc_obj(struct clk);

arch/mips/lantiq/xway/sysctrl.c

427

if (!clk) {

arch/mips/lantiq/xway/sysctrl.c

431

clk->cl.dev_id = "1f103000.cgu";

arch/mips/lantiq/xway/sysctrl.c

432

clk->cl.con_id = name;

arch/mips/lantiq/xway/sysctrl.c

433

clk->cl.clk = clk;

arch/mips/lantiq/xway/sysctrl.c

434

clk->rate = 0;

arch/mips/lantiq/xway/sysctrl.c

435

clk->rates = valid_clkout_rates[i];

arch/mips/lantiq/xway/sysctrl.c

436

clk->enable = clkout_enable;

arch/mips/lantiq/xway/sysctrl.c

437

clk->module = i;

arch/mips/lantiq/xway/sysctrl.c

438

clkdev_add(&clk->cl);

arch/mips/loongson2ef/common/serial.c

22

#define PORT(int, clk) \

arch/mips/loongson2ef/common/serial.c

25

.uartclk = clk, \

arch/mips/loongson2ef/common/serial.c

31

#define PORT_M(int, clk) \

arch/mips/loongson2ef/common/serial.c

34

.uartclk = clk, \

arch/mips/loongson64/env.c

67

fdt32_t *clk;

arch/mips/loongson64/env.c

76

clk = fdt_getprop_w(fdt, node, "clock-frequency", &len);

arch/mips/loongson64/env.c

77

if (!clk) {

arch/mips/loongson64/env.c

87

fdt32_st(clk, uart_clk);

arch/mips/loongson64/time.c

19

struct clk *clk;

arch/mips/loongson64/time.c

31

clk = of_clk_get(np, 0);

arch/mips/loongson64/time.c

32

if (IS_ERR(clk)) {

arch/mips/loongson64/time.c

33

pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));

arch/mips/loongson64/time.c

37

cpu_clock_freq = clk_get_rate(clk);

arch/mips/loongson64/time.c

38

clk_put(clk);

arch/mips/pci/pci-alchemy.c

373

struct clk *c;

arch/mips/pci/pci-bcm63xx.c

148

static struct clk *pcie_clk;

arch/mips/pci/pci-lantiq.c

66

static struct clk *clk_pci, *clk_external;

arch/mips/ralink/clk.c

66

struct clk *clk;

arch/mips/ralink/clk.c

79

clk = of_clk_get_from_provider(&clkspec);

arch/mips/ralink/clk.c

80

if (IS_ERR(clk))

arch/mips/ralink/clk.c

81

panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));

arch/mips/ralink/clk.c

82

pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);

arch/mips/ralink/clk.c

83

mips_hpt_frequency = clk_get_rate(clk) / 2;

arch/mips/ralink/clk.c

84

clk_put(clk);

arch/mips/ralink/timer.c

104

struct clk *clk;

arch/mips/ralink/timer.c

120

clk = devm_clk_get(&pdev->dev, NULL);

arch/mips/ralink/timer.c

121

if (IS_ERR(clk)) {

arch/mips/ralink/timer.c

123

return PTR_ERR(clk);

arch/mips/ralink/timer.c

126

rt->timer_freq = clk_get_rate(clk) / TMR0CTL_PRESCALE_DIV;

arch/powerpc/include/asm/cpm2.h

106

extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src);

arch/powerpc/kernel/legacy_serial.c

83

const __be32 *clk, *spd, *rs;

arch/powerpc/kernel/legacy_serial.c

89

clk = of_get_property(np, "clock-frequency", NULL);

arch/powerpc/kernel/legacy_serial.c

90

if (clk && *clk)

arch/powerpc/kernel/legacy_serial.c

91

clock = be32_to_cpup(clk);

arch/powerpc/platforms/512x/clock-commonclk.c

1002

clkname, devname, clk); \

arch/powerpc/platforms/512x/clock-commonclk.c

1004

clk_put(clk); \

arch/powerpc/platforms/512x/clock-commonclk.c

218

static inline struct clk *mpc512x_clk_fixed(const char *name, int rate)

arch/powerpc/platforms/512x/clock-commonclk.c

223

static inline struct clk *mpc512x_clk_factor(

arch/powerpc/platforms/512x/clock-commonclk.c

234

static inline struct clk *mpc512x_clk_divider(

arch/powerpc/platforms/512x/clock-commonclk.c

243

static inline struct clk *mpc512x_clk_divtable(

arch/powerpc/platforms/512x/clock-commonclk.c

256

static inline struct clk *mpc512x_clk_gated(

arch/powerpc/platforms/512x/clock-commonclk.c

269

static inline struct clk *mpc512x_clk_muxed(const char *name,

arch/powerpc/platforms/512x/clock-commonclk.c

425

struct clk *osc_clk;

arch/powerpc/platforms/512x/clock-commonclk.c

70

static struct clk *clks[MPC512x_CLK_LAST_PRIVATE];

arch/powerpc/platforms/512x/clock-commonclk.c

993

struct clk *clk; \

arch/powerpc/platforms/512x/clock-commonclk.c

994

clk = of_clk_get_by_name(np, clkname); \

arch/powerpc/platforms/512x/clock-commonclk.c

995

if (IS_ERR(clk)) { \

arch/powerpc/platforms/512x/clock-commonclk.c

996

clk = clkitem; \

arch/powerpc/platforms/512x/clock-commonclk.c

997

clk_register_clkdev(clk, clkname, devname); \

arch/powerpc/platforms/512x/clock-commonclk.c

999

clk_register_clkdev(clk, clkname, np->name); \

arch/powerpc/platforms/512x/mpc512x_shared.c

58

struct clk *clk_diu;

arch/powerpc/sysdev/cpm2.c

112

void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src)

arch/powerpc/sysdev/cpm2.c

127

val = (((clk * 2 / rate) - 1) & ~1) | CPM_BRG_EN | src;

arch/s390/boot/startup.c

105

union tod_clock clk;

arch/s390/boot/startup.c

107

if (store_tod_clock_ext_cc(&clk) == 0)

arch/s390/boot/startup.c

110

if (set_tod_clock(TOD_UNIX_EPOCH) || store_tod_clock_ext_cc(&clk))

arch/s390/include/asm/timex.h

186

union tod_clock clk;

arch/s390/include/asm/timex.h

188

store_tod_clock_ext(&clk);

arch/s390/include/asm/timex.h

189

return clk.tod;

arch/s390/include/asm/timex.h

194

unsigned long clk;

arch/s390/include/asm/timex.h

196

asm volatile("stckf %0" : "=Q" (clk) : : "cc");

arch/s390/include/asm/timex.h

197

return clk;

arch/s390/include/asm/timex.h

57

static inline int store_tod_clock_ext_cc(union tod_clock *clk)

arch/s390/include/asm/timex.h

64

: CC_OUT(cc, cc), [clk] "=Q" (*clk)

arch/s390/kernel/debug.c

1088

union tod_clock clk;

arch/s390/kernel/debug.c

1090

store_tod_clock_ext(&clk);

arch/s390/kernel/debug.c

1091

timestamp = clk.us;

arch/s390/kernel/time.c

111

static void ext_to_timespec64(union tod_clock *clk, struct timespec64 *xt)

arch/s390/kernel/time.c

115

sec = clk->us;

arch/s390/kernel/time.c

117

nsec = ((clk->sus + (rem << 12)) * 125) >> 9;

arch/s390/kernel/time.c

197

union tod_clock clk;

arch/s390/kernel/time.c

201

store_tod_clock_ext(&clk);

arch/s390/kernel/time.c

202

clk.eitod -= delta;

arch/s390/kernel/time.c

203

ext_to_timespec64(&clk, ts);

arch/s390/kernel/time.c

210

union tod_clock clk;

arch/s390/kernel/time.c

214

clk = tod_clock_base;

arch/s390/kernel/time.c

215

clk.eitod -= delta;

arch/s390/kernel/time.c

216

ext_to_timespec64(&clk, &boot_time);

arch/s390/kernel/vdso/getcpu.c

10

union tod_clock clk;

arch/s390/kernel/vdso/getcpu.c

13

store_tod_clock_ext(&clk);

arch/s390/kernel/vdso/getcpu.c

15

*cpu = clk.pf;

arch/s390/kvm/kvm-s390.c

1330

union tod_clock clk;

arch/s390/kvm/kvm-s390.c

1334

store_tod_clock_ext(&clk);

arch/s390/kvm/kvm-s390.c

1336

gtod->tod = clk.tod + kvm->arch.epoch;

arch/s390/kvm/kvm-s390.c

1339

gtod->epoch_idx = clk.ei + kvm->arch.epdx;

arch/s390/kvm/kvm-s390.c

1340

if (gtod->tod < clk.tod)

arch/s390/kvm/kvm-s390.c

4338

union tod_clock clk;

arch/s390/kvm/kvm-s390.c

4343

store_tod_clock_ext(&clk);

arch/s390/kvm/kvm-s390.c

4345

kvm->arch.epoch = gtod->tod - clk.tod;

arch/s390/kvm/kvm-s390.c

4348

kvm->arch.epdx = gtod->epoch_idx - clk.ei;

arch/sh/boards/board-apsh4a3a.c

122

struct clk *clk;

arch/sh/boards/board-apsh4a3a.c

125

clk = clk_get(NULL, "extal");

arch/sh/boards/board-apsh4a3a.c

126

if (IS_ERR(clk))

arch/sh/boards/board-apsh4a3a.c

127

return PTR_ERR(clk);

arch/sh/boards/board-apsh4a3a.c

128

ret = clk_set_rate(clk, 33333000);

arch/sh/boards/board-apsh4a3a.c

129

clk_put(clk);

arch/sh/boards/board-apsh4ad0a.c

100

struct clk *clk;

arch/sh/boards/board-apsh4ad0a.c

103

clk = clk_get(NULL, "extal");

arch/sh/boards/board-apsh4ad0a.c

104

if (IS_ERR(clk))

arch/sh/boards/board-apsh4ad0a.c

105

return PTR_ERR(clk);

arch/sh/boards/board-apsh4ad0a.c

106

ret = clk_set_rate(clk, 33333000);

arch/sh/boards/board-apsh4ad0a.c

107

clk_put(clk);

arch/sh/boards/board-sh7785lcr.c

306

struct clk *clk;

arch/sh/boards/board-sh7785lcr.c

309

clk = clk_get(NULL, "extal");

arch/sh/boards/board-sh7785lcr.c

310

if (IS_ERR(clk))

arch/sh/boards/board-sh7785lcr.c

311

return PTR_ERR(clk);

arch/sh/boards/board-sh7785lcr.c

312

ret = clk_set_rate(clk, 33333333);

arch/sh/boards/board-sh7785lcr.c

313

clk_put(clk);

arch/sh/boards/board-urquell.c

180

struct clk *clk;

arch/sh/boards/board-urquell.c

190

clk = clk_get(NULL, "extal");

arch/sh/boards/board-urquell.c

191

if (IS_ERR(clk))

arch/sh/boards/board-urquell.c

192

return PTR_ERR(clk);

arch/sh/boards/board-urquell.c

193

ret = clk_set_rate(clk, 33333333);

arch/sh/boards/board-urquell.c

194

clk_put(clk);

arch/sh/boards/mach-ecovec24/setup.c

1105

struct clk *clk;

arch/sh/boards/mach-ecovec24/setup.c

1371

clk = clk_get(NULL, "spu_clk");

arch/sh/boards/mach-ecovec24/setup.c

1372

if (!IS_ERR(clk)) {

arch/sh/boards/mach-ecovec24/setup.c

1373

clk_set_rate(clk, clk_round_rate(clk, 83333333));

arch/sh/boards/mach-ecovec24/setup.c

1374

clk_put(clk);

arch/sh/boards/mach-ecovec24/setup.c

1378

clk = clk_get(NULL, "fsib_clk");

arch/sh/boards/mach-ecovec24/setup.c

1379

if (!IS_ERR(clk)) {

arch/sh/boards/mach-ecovec24/setup.c

1382

clk_set_parent(clk, &sh7724_fsimckb_clk);

arch/sh/boards/mach-ecovec24/setup.c

1383

clk_set_rate(clk, 48000);

arch/sh/boards/mach-ecovec24/setup.c

1384

clk_put(clk);

arch/sh/boards/mach-ecovec24/setup.c

1396

clk = clk_get(NULL, "vpu_clk");

arch/sh/boards/mach-ecovec24/setup.c

1397

if (!IS_ERR(clk)) {

arch/sh/boards/mach-ecovec24/setup.c

1398

clk_set_rate(clk, clk_round_rate(clk, 166000000));

arch/sh/boards/mach-ecovec24/setup.c

1399

clk_put(clk);

arch/sh/boards/mach-highlander/setup.c

311

static int ivdr_clk_enable(struct clk *clk)

arch/sh/boards/mach-highlander/setup.c

317

static void ivdr_clk_disable(struct clk *clk)

arch/sh/boards/mach-highlander/setup.c

327

static struct clk ivdr_clk = {

arch/sh/boards/mach-highlander/setup.c

331

static struct clk *r7780rp_clocks[] = {

arch/sh/boards/mach-highlander/setup.c

370

struct clk *clk = r7780rp_clocks[i];

arch/sh/boards/mach-highlander/setup.c

372

clk_register(clk);

arch/sh/boards/mach-highlander/setup.c

373

clk_enable(clk);

arch/sh/boards/mach-kfr2r09/setup.c

480

struct clk *camera_clk;

arch/sh/boards/mach-migor/setup.c

447

struct clk *video_clk;

arch/sh/boards/mach-sdk7786/setup.c

164

static int sdk7786_pcie_clk_enable(struct clk *clk)

arch/sh/boards/mach-sdk7786/setup.c

170

static void sdk7786_pcie_clk_disable(struct clk *clk)

arch/sh/boards/mach-sdk7786/setup.c

180

static struct clk sdk7786_pcie_clk = {

arch/sh/boards/mach-sdk7786/setup.c

186

.clk = &sdk7786_pcie_clk,

arch/sh/boards/mach-sdk7786/setup.c

191

struct clk *clk;

arch/sh/boards/mach-sdk7786/setup.c

201

clk = clk_get(NULL, "extal");

arch/sh/boards/mach-sdk7786/setup.c

202

if (IS_ERR(clk))

arch/sh/boards/mach-sdk7786/setup.c

203

return PTR_ERR(clk);

arch/sh/boards/mach-sdk7786/setup.c

204

ret = clk_set_rate(clk, 33333333);

arch/sh/boards/mach-sdk7786/setup.c

205

clk_put(clk);

arch/sh/boards/mach-se/7724/setup.c

681

struct clk *clk;

arch/sh/boards/mach-se/7724/setup.c

843

clk = clk_get(NULL, "spu_clk");

arch/sh/boards/mach-se/7724/setup.c

844

if (!IS_ERR(clk)) {

arch/sh/boards/mach-se/7724/setup.c

845

clk_set_rate(clk, clk_round_rate(clk, 83333333));

arch/sh/boards/mach-se/7724/setup.c

846

clk_put(clk);

arch/sh/boards/mach-se/7724/setup.c

850

clk = clk_get(NULL, "fsia_clk");

arch/sh/boards/mach-se/7724/setup.c

851

if (!IS_ERR(clk)) {

arch/sh/boards/mach-se/7724/setup.c

854

clk_set_parent(clk, &sh7724_fsimcka_clk);

arch/sh/boards/mach-se/7724/setup.c

855

clk_set_rate(clk, 48000);

arch/sh/boards/mach-se/7724/setup.c

856

clk_put(clk);

arch/sh/drivers/pci/pcie-sh7786.c

132

static struct clk fixed_pciexclkp = {

arch/sh/drivers/pci/pcie-sh7786.c

206

struct clk *clk;

arch/sh/drivers/pci/pcie-sh7786.c

235

clk = &port->phy_clk;

arch/sh/drivers/pci/pcie-sh7786.c

237

memset(clk, 0, sizeof(struct clk));

arch/sh/drivers/pci/pcie-sh7786.c

239

clk->parent = &fixed_pciexclkp;

arch/sh/drivers/pci/pcie-sh7786.c

240

clk->enable_reg = (void __iomem *)(chan->reg_base + SH4A_PCIEPHYCTLR);

arch/sh/drivers/pci/pcie-sh7786.c

241

clk->enable_bit = BITS_CKE;

arch/sh/drivers/pci/pcie-sh7786.c

243

ret = sh_clk_mstp_register(clk, 1);

arch/sh/drivers/pci/pcie-sh7786.c

26

struct clk *fclk, phy_clk;

arch/sh/drivers/pci/pcie-sh7786.c

547

struct clk *platclk;

arch/sh/include/asm/hw_breakpoint.h

40

struct clk *clk; /* optional interface clock / MSTP bit */

arch/sh/include/cpu-sh4/cpu/sh7724.h

315

extern struct clk sh7724_fsimcka_clk;

arch/sh/include/cpu-sh4/cpu/sh7724.h

316

extern struct clk sh7724_fsimckb_clk;

arch/sh/include/cpu-sh4/cpu/sh7724.h

317

extern struct clk sh7724_dv_clki;

arch/sh/kernel/cpu/clock-cpg.c

14

static struct clk peripheral_clk = {

arch/sh/kernel/cpu/clock-cpg.c

19

static struct clk bus_clk = {

arch/sh/kernel/cpu/clock-cpg.c

24

static struct clk cpu_clk = {

arch/sh/kernel/cpu/clock-cpg.c

32

static struct clk *onchip_clocks[] = {

arch/sh/kernel/cpu/clock-cpg.c

52

struct clk *clk = onchip_clocks[i];

arch/sh/kernel/cpu/clock-cpg.c

53

arch_init_clk_ops(&clk->ops, i);

arch/sh/kernel/cpu/clock-cpg.c

54

if (clk->ops)

arch/sh/kernel/cpu/clock-cpg.c

55

ret |= clk_register(clk);

arch/sh/kernel/cpu/clock-cpg.c

9

static struct clk master_clk = {

arch/sh/kernel/cpu/sh2/clock-sh7619.c

23

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh2/clock-sh7619.c

25

clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];

arch/sh/kernel/cpu/sh2/clock-sh7619.c

32

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2/clock-sh7619.c

35

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh2/clock-sh7619.c

42

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2/clock-sh7619.c

44

return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

24

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

26

clk->rate = 10000000 * pll2_mult *

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

34

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

37

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

44

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

47

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

54

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7201.c

57

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh2a/clock-sh7203.c

27

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7203.c

29

clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult;

arch/sh/kernel/cpu/sh2a/clock-sh7203.c

36

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7203.c

39

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh2a/clock-sh7203.c

46

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7203.c

49

return clk->parent->rate / pfc_divisors[idx-2];

arch/sh/kernel/cpu/sh2a/clock-sh7206.c

24

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7206.c

26

clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];

arch/sh/kernel/cpu/sh2a/clock-sh7206.c

33

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7206.c

36

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh2a/clock-sh7206.c

43

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7206.c

45

return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];

arch/sh/kernel/cpu/sh2a/clock-sh7206.c

52

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7206.c

55

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

29

static struct clk r_clk = {

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

37

static struct clk extal_clk = {

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

41

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

43

unsigned long rate = clk->parent->rate / pll1_div;

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

51

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

57

struct clk *main_clks[] = {

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

81

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

92

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

109

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

122

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

26

static struct clk r_clk = {

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

34

static struct clk extal_clk = {

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

38

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

40

return clk->parent->rate * PLL_RATE;

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

47

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

53

static unsigned long peripheral0_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

55

return clk->parent->rate / 8;

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

62

static struct clk peripheral0_clk = {

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

68

static unsigned long peripheral1_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

70

return clk->parent->rate / 4;

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

77

static struct clk peripheral1_clk = {

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

83

struct clk *main_clks[] = {

arch/sh/kernel/cpu/sh3/clock-sh3.c

26

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh3.c

31

clk->rate *= pfc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh3.c

38

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh3.c

43

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh3.c

50

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh3.c

55

return clk->parent->rate / stc_multipliers[idx];

arch/sh/kernel/cpu/sh3/clock-sh3.c

62

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh3.c

67

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7705.c

30

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7705.c

32

clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];

arch/sh/kernel/cpu/sh3/clock-sh7705.c

39

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7705.c

42

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7705.c

49

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7705.c

52

return clk->parent->rate / stc_multipliers[idx];

arch/sh/kernel/cpu/sh3/clock-sh7705.c

59

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7705.c

62

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7706.c

22

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7706.c

27

clk->rate *= pfc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7706.c

34

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7706.c

39

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7706.c

46

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7706.c

51

return clk->parent->rate / stc_multipliers[idx];

arch/sh/kernel/cpu/sh3/clock-sh7706.c

58

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7706.c

63

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7709.c

22

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7709.c

27

clk->rate *= pfc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7709.c

34

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7709.c

39

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7709.c

46

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7709.c

52

return clk->parent->rate * stc_multipliers[idx];

arch/sh/kernel/cpu/sh3/clock-sh7709.c

59

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7709.c

64

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7710.c

24

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7710.c

26

clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];

arch/sh/kernel/cpu/sh3/clock-sh7710.c

33

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7710.c

36

return clk->parent->rate / md_table[idx];

arch/sh/kernel/cpu/sh3/clock-sh7710.c

43

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7710.c

46

return clk->parent->rate / md_table[idx];

arch/sh/kernel/cpu/sh3/clock-sh7710.c

53

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7710.c

56

return clk->parent->rate / md_table[idx];

arch/sh/kernel/cpu/sh3/clock-sh7712.c

21

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7712.c

26

clk->rate *= multipliers[idx];

arch/sh/kernel/cpu/sh3/clock-sh7712.c

33

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7712.c

38

return clk->parent->rate / divisors[idx];

arch/sh/kernel/cpu/sh3/clock-sh7712.c

45

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh3/clock-sh7712.c

50

return clk->parent->rate / divisors[idx];

arch/sh/kernel/cpu/sh4/clock-sh4.c

26

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh4/clock-sh4.c

28

clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];

arch/sh/kernel/cpu/sh4/clock-sh4.c

35

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4/clock-sh4.c

38

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh4/clock-sh4.c

45

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4/clock-sh4.c

48

return clk->parent->rate / bfc_divisors[idx];

arch/sh/kernel/cpu/sh4/clock-sh4.c

55

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4/clock-sh4.c

58

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

108

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

121

struct clk div6_clks[DIV6_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

138

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

27

static struct clk r_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

35

struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

40

static unsigned long dll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

49

return clk->parent->rate * mult;

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

56

static struct clk dll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

62

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

69

return clk->parent->rate * mult;

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

76

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

81

struct clk *main_clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

111

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

124

struct clk div6_clks[DIV6_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

140

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

27

static struct clk r_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

35

struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

40

static unsigned long dll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

49

return clk->parent->rate * mult;

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

56

static struct clk dll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

62

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

72

return (clk->parent->rate * mult) / div;

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

79

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

84

struct clk *main_clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

113

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

124

struct clk div4_enable_clks[DIV4_ENABLE_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

130

struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

137

struct clk div6_clks[DIV6_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

141

static struct clk mstp_clks[HWBLK_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

30

static struct clk r_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

38

struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

43

static unsigned long dll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

52

return clk->parent->rate * mult;

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

59

static struct clk dll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

65

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

75

return (clk->parent->rate * mult) / div;

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

82

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7722.c

87

struct clk *main_clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

114

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

125

struct clk div4_enable_clks[DIV4_ENABLE_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

131

struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

137

struct clk div6_clks[DIV6_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

141

static struct clk mstp_clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

31

static struct clk r_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

39

struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

44

static unsigned long dll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

53

return clk->parent->rate * mult;

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

60

static struct clk dll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

66

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

76

return (clk->parent->rate * mult) / div;

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

83

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7723.c

88

struct clk *main_clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

100

static struct clk div3_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

106

struct clk sh7724_fsimcka_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

109

struct clk sh7724_fsimckb_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

112

struct clk sh7724_dv_clki = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

115

static struct clk *main_clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

126

static void div4_kick(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

153

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

164

static struct clk *common_parent[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

169

static struct clk *vclkcr_parent[8] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

175

static struct clk *fclkacr_parent[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

182

static struct clk *fclkbcr_parent[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

189

static struct clk div6_clks[DIV6_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

202

static struct clk mstp_clks[HWBLK_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

34

static struct clk r_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

42

static struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

47

static unsigned long fll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

58

return (clk->parent->rate * mult) / div;

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

65

static struct clk fll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

71

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

78

return clk->parent->rate * mult;

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

85

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

91

static unsigned long div3_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

93

return clk->parent->rate / 3;

arch/sh/kernel/cpu/sh4a/clock-sh7734.c

124

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7734.c

19

static struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7734.c

27

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7734.c

35

return clk->parent->rate * mode;

arch/sh/kernel/cpu/sh4a/clock-sh7734.c

42

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7734.c

48

static struct clk *main_clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7734.c

72

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

20

static struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

24

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

30

return clk->parent->rate * multiplier;

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

37

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

43

static struct clk *clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

65

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

83

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

103

clk = clk_get(NULL, "master_clk");

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

105

struct clk *clkp = sh7763_onchip_clocks[i];

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

107

clkp->parent = clk;

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

111

clk_put(clk);

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

22

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

24

clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

31

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

34

return clk->parent->rate / p0fc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

41

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

44

return clk->parent->rate / bfc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

68

static unsigned long shyway_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

71

return clk->parent->rate / cfc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

78

static struct clk sh7763_shyway_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

87

static struct clk *sh7763_onchip_clocks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7763.c

98

struct clk *clk;

arch/sh/kernel/cpu/sh4a/clock-sh7770.c

19

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7770.c

21

clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];

arch/sh/kernel/cpu/sh4a/clock-sh7770.c

28

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7770.c

31

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7770.c

38

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7770.c

41

return clk->parent->rate / bfc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7770.c

48

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7770.c

51

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

104

struct clk *clk;

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

109

clk = clk_get(NULL, "master_clk");

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

111

struct clk *clkp = sh7780_onchip_clocks[i];

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

113

clkp->parent = clk;

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

117

clk_put(clk);

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

22

static void master_clk_init(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

24

clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

31

static unsigned long module_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

34

return clk->parent->rate / pfc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

41

static unsigned long bus_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

44

return clk->parent->rate / bfc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

51

static unsigned long cpu_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

54

return clk->parent->rate / ifc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

74

static unsigned long shyway_clk_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

77

return clk->parent->rate / cfc_divisors[idx];

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

84

static struct clk sh7780_shyway_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7780.c

93

static struct clk *sh7780_onchip_clocks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

23

static struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

27

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

33

return clk->parent->rate * multiplier;

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

40

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

46

static struct clk *clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

69

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

89

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

21

static struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

25

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

35

return clk->parent->rate * multiplier;

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

42

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

48

static struct clk *clks[] = {

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

70

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

90

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh4a/clock-shx3.c

22

static struct clk extal_clk = {

arch/sh/kernel/cpu/sh4a/clock-shx3.c

26

static unsigned long pll_recalc(struct clk *clk)

arch/sh/kernel/cpu/sh4a/clock-shx3.c

29

return clk->parent->rate * 72;

arch/sh/kernel/cpu/sh4a/clock-shx3.c

36

static struct clk pll_clk = {

arch/sh/kernel/cpu/sh4a/clock-shx3.c

42

static struct clk *clks[] = {

arch/sh/kernel/cpu/sh4a/clock-shx3.c

64

struct clk div4_clks[DIV4_NR] = {

arch/sh/kernel/cpu/sh4a/clock-shx3.c

81

static struct clk mstp_clks[MSTP_NR] = {

arch/sh/kernel/cpu/sh4a/ubc.c

100

struct clk *ubc_iclk = clk_get(NULL, "ubc0");

arch/sh/kernel/cpu/sh4a/ubc.c

126

sh4a_ubc.clk = ubc_iclk;

arch/sh/kernel/hw_breakpoint.c

64

clk_enable(sh_ubc->clk);

arch/sh/kernel/hw_breakpoint.c

97

clk_disable(sh_ubc->clk);

arch/sh/kernel/setup.c

178

struct clk *clk = clk_get(NULL, "cpu_clk");

arch/sh/kernel/setup.c

180

if (IS_ERR(clk))

arch/sh/kernel/setup.c

183

loops_per_jiffy = (clk_get_rate(clk) >> 1) / HZ;

arch/xtensa/kernel/time.c

148

struct clk *clk;

arch/xtensa/kernel/time.c

152

clk = of_clk_get(cpu, 0);

arch/xtensa/kernel/time.c

154

if (!IS_ERR(clk)) {

arch/xtensa/kernel/time.c

155

ccount_freq = clk_get_rate(clk);

arch/xtensa/platforms/xtfpga/setup.c

102

if (of_clk_add_provider(np, of_clk_src_simple_get, clk)) {

arch/xtensa/platforms/xtfpga/setup.c

85

struct clk *clk;

arch/xtensa/platforms/xtfpga/setup.c

95

clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq);

arch/xtensa/platforms/xtfpga/setup.c

97

if (IS_ERR(clk)) {

drivers/accel/ethosu/ethosu_device.h

16

struct clk;

drivers/acpi/acpi_apd.c

38

struct clk *clk;

drivers/acpi/acpi_apd.c

49

struct clk *clk;

drivers/acpi/acpi_apd.c

52

clk = clk_register_fixed_rate(&pdata->adev->dev,

drivers/acpi/acpi_apd.c

55

clk_register_clkdev(clk, NULL, dev_name(&pdata->adev->dev));

drivers/acpi/acpi_apd.c

56

pdata->clk = clk;

drivers/acpi/arm64/amba.c

30

struct clk *amba_dummy_clk;

drivers/acpi/x86/lpss.c

100

struct clk *clk;

drivers/acpi/x86/lpss.c

410

struct clk *clk;

drivers/acpi/x86/lpss.c

424

clk = clk_data->clk;

drivers/acpi/x86/lpss.c

434

clk = clk_register_fixed_rate(NULL, devname, parent, 0,

drivers/acpi/x86/lpss.c

440

clk = clk_register_gate(NULL, devname, parent, 0,

drivers/acpi/x86/lpss.c

453

clk = clk_register_fractional_divider(NULL, clk_name, parent,

drivers/acpi/x86/lpss.c

464

clk = clk_register_gate(NULL, clk_name, parent,

drivers/acpi/x86/lpss.c

471

if (IS_ERR(clk))

drivers/acpi/x86/lpss.c

472

return PTR_ERR(clk);

drivers/acpi/x86/lpss.c

474

pdata->clk = clk;

drivers/acpi/x86/lpss.c

475

clk_register_clkdev(clk, dev_desc->clk_con_id, devname);

drivers/ata/ahci_da850.c

195

mpy = ahci_da850_calculate_mpy(clk_get_rate(hpriv->clks[1].clk));

drivers/ata/ahci_dm816.c

77

refclk_rate = clk_get_rate(hpriv->clks[1].clk);

drivers/ata/ahci_dwc.c

230

struct clk *aclk;

drivers/ata/ahci_imx.c

64

struct clk *sata_clk;

drivers/ata/ahci_imx.c

65

struct clk *sata_ref_clk;

drivers/ata/ahci_imx.c

66

struct clk *ahb_clk;

drivers/ata/ahci_tegra.c

177

struct clk *sata_clk;

drivers/ata/libahci_platform.c

117

struct clk *ahci_platform_find_clk(struct ahci_host_priv *hpriv, const char *con_id)

drivers/ata/libahci_platform.c

123

return hpriv->clks[i].clk;

drivers/ata/libahci_platform.c

533

hpriv->clks->clk = devm_clk_get_optional(dev, NULL);

drivers/ata/libahci_platform.c

534

if (IS_ERR(hpriv->clks->clk)) {

drivers/ata/libahci_platform.c

535

rc = PTR_ERR(hpriv->clks->clk);

drivers/ata/libahci_platform.c

537

} else if (hpriv->clks->clk) {

drivers/ata/pata_arasan_cf.c

190

struct clk *clk;

drivers/ata/pata_arasan_cf.c

313

ret = clk_prepare_enable(acdev->clk);

drivers/ata/pata_arasan_cf.c

319

ret = clk_set_rate(acdev->clk, 166000000);

drivers/ata/pata_arasan_cf.c

322

clk_disable_unprepare(acdev->clk);

drivers/ata/pata_arasan_cf.c

354

clk_disable_unprepare(acdev->clk);

drivers/ata/pata_arasan_cf.c

847

acdev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/ata/pata_arasan_cf.c

848

if (IS_ERR(acdev->clk)) {

drivers/ata/pata_arasan_cf.c

850

return PTR_ERR(acdev->clk);

drivers/ata/pata_atp867x.c

139

unsigned int clk)

drivers/ata/pata_atp867x.c

142

unsigned char clocks = clk;

drivers/ata/pata_atp867x.c

159

"Using 12clk.\n", clk);

drivers/ata/pata_atp867x.c

175

unsigned int clk)

drivers/ata/pata_atp867x.c

177

unsigned char clocks = clk;

drivers/ata/pata_atp867x.c

193

"Using default 12clk.\n", clk);

drivers/ata/pata_ftide010.c

44

struct clk *pclk;

drivers/ata/pata_imx.c

144

priv->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/ata/pata_imx.c

145

if (IS_ERR(priv->clk)) {

drivers/ata/pata_imx.c

147

return PTR_ERR(priv->clk);

drivers/ata/pata_imx.c

214

clk_disable_unprepare(priv->clk);

drivers/ata/pata_imx.c

224

int ret = clk_prepare_enable(priv->clk);

drivers/ata/pata_imx.c

49

struct clk *clk;

drivers/ata/pata_imx.c

62

clkrate = clk_get_rate(priv->clk);

drivers/ata/sata_gemini.c

191

struct clk *pclk;

drivers/ata/sata_gemini.c

38

struct clk *sata0_pclk;

drivers/ata/sata_gemini.c

39

struct clk *sata1_pclk;

drivers/ata/sata_mv.c

4074

n_ports, sizeof(struct clk *),

drivers/ata/sata_mv.c

4094

hpriv->clk = clk_get(&pdev->dev, NULL);

drivers/ata/sata_mv.c

4095

if (IS_ERR(hpriv->clk)) {

drivers/ata/sata_mv.c

4098

rc = clk_prepare_enable(hpriv->clk);

drivers/ata/sata_mv.c

4162

if (!IS_ERR(hpriv->clk)) {

drivers/ata/sata_mv.c

4163

clk_disable_unprepare(hpriv->clk);

drivers/ata/sata_mv.c

4164

clk_put(hpriv->clk);

drivers/ata/sata_mv.c

4192

if (!IS_ERR(hpriv->clk)) {

drivers/ata/sata_mv.c

4193

clk_disable_unprepare(hpriv->clk);

drivers/ata/sata_mv.c

4194

clk_put(hpriv->clk);

drivers/ata/sata_mv.c

558

struct clk *clk;

drivers/ata/sata_mv.c

559

struct clk **port_clks;

drivers/base/arch_topology.c

271

struct clk *cpu_clk;

drivers/base/power/clock_ops.c

153

ret = clk_prepare_enable(ce->clk);

drivers/base/power/clock_ops.c

156

ret = clk_enable(ce->clk);

drivers/base/power/clock_ops.c

165

__func__, ce->clk, ret);

drivers/base/power/clock_ops.c

175

if (!ce->clk)

drivers/base/power/clock_ops.c

176

ce->clk = clk_get(dev, ce->con_id);

drivers/base/power/clock_ops.c

177

if (IS_ERR(ce->clk)) {

drivers/base/power/clock_ops.c

180

} else if (clk_is_enabled_when_prepared(ce->clk)) {

drivers/base/power/clock_ops.c

184

} else if (clk_prepare(ce->clk)) {

drivers/base/power/clock_ops.c

192

ce->clk, ce->con_id);

drivers/base/power/clock_ops.c

196

struct clk *clk)

drivers/base/power/clock_ops.c

215

if (IS_ERR(clk)) {

drivers/base/power/clock_ops.c

219

ce->clk = clk;

drivers/base/power/clock_ops.c

256

int pm_clk_add_clk(struct device *dev, struct clk *clk)

drivers/base/power/clock_ops.c

258

return __pm_clk_add(dev, NULL, clk);

drivers/base/power/clock_ops.c

274

struct clk **clks;

drivers/base/power/clock_ops.c

328

clk_disable(ce->clk);

drivers/base/power/clock_ops.c

331

clk_unprepare(ce->clk);

drivers/base/power/clock_ops.c

335

if (!IS_ERR(ce->clk))

drivers/base/power/clock_ops.c

336

clk_put(ce->clk);

drivers/base/power/clock_ops.c

34

struct clk *clk;

drivers/base/power/clock_ops.c

354

void pm_clk_remove_clk(struct device *dev, struct clk *clk)

drivers/base/power/clock_ops.c

359

if (!psd || !clk)

drivers/base/power/clock_ops.c

365

if (clk == ce->clk)

drivers/base/power/clock_ops.c

489

clk_disable_unprepare(ce->clk);

drivers/base/power/clock_ops.c

492

clk_disable(ce->clk);

drivers/base/power/clock_ops.c

639

struct clk *clk;

drivers/base/power/clock_ops.c

641

clk = clk_get(dev, con_id);

drivers/base/power/clock_ops.c

642

if (!IS_ERR(clk)) {

drivers/base/power/clock_ops.c

643

clk_prepare_enable(clk);

drivers/base/power/clock_ops.c

644

clk_put(clk);

drivers/base/power/clock_ops.c

656

struct clk *clk;

drivers/base/power/clock_ops.c

658

clk = clk_get(dev, con_id);

drivers/base/power/clock_ops.c

659

if (!IS_ERR(clk)) {

drivers/base/power/clock_ops.c

660

clk_disable_unprepare(clk);

drivers/base/power/clock_ops.c

661

clk_put(clk);

drivers/base/regmap/regmap-mmio.c

156

if (!IS_ERR(ctx->clk)) {

drivers/base/regmap/regmap-mmio.c

157

ret = clk_enable(ctx->clk);

drivers/base/regmap/regmap-mmio.c

164

if (!IS_ERR(ctx->clk))

drivers/base/regmap/regmap-mmio.c

165

clk_disable(ctx->clk);

drivers/base/regmap/regmap-mmio.c

177

if (!IS_ERR(ctx->clk)) {

drivers/base/regmap/regmap-mmio.c

178

ret = clk_enable(ctx->clk);

drivers/base/regmap/regmap-mmio.c

227

if (!IS_ERR(ctx->clk))

drivers/base/regmap/regmap-mmio.c

228

clk_disable(ctx->clk);

drivers/base/regmap/regmap-mmio.c

23

struct clk *clk;

drivers/base/regmap/regmap-mmio.c

316

if (!IS_ERR(ctx->clk)) {

drivers/base/regmap/regmap-mmio.c

317

ret = clk_enable(ctx->clk);

drivers/base/regmap/regmap-mmio.c

324

if (!IS_ERR(ctx->clk))

drivers/base/regmap/regmap-mmio.c

325

clk_disable(ctx->clk);

drivers/base/regmap/regmap-mmio.c

336

if (!IS_ERR(ctx->clk)) {

drivers/base/regmap/regmap-mmio.c

337

ret = clk_enable(ctx->clk);

drivers/base/regmap/regmap-mmio.c

378

if (!IS_ERR(ctx->clk))

drivers/base/regmap/regmap-mmio.c

379

clk_disable(ctx->clk);

drivers/base/regmap/regmap-mmio.c

389

if (!IS_ERR(ctx->clk)) {

drivers/base/regmap/regmap-mmio.c

390

clk_unprepare(ctx->clk);

drivers/base/regmap/regmap-mmio.c

392

clk_put(ctx->clk);

drivers/base/regmap/regmap-mmio.c

439

ctx->clk = ERR_PTR(-ENODEV);

drivers/base/regmap/regmap-mmio.c

535

ctx->clk = clk_get(dev, clk_id);

drivers/base/regmap/regmap-mmio.c

536

if (IS_ERR(ctx->clk)) {

drivers/base/regmap/regmap-mmio.c

537

ret = PTR_ERR(ctx->clk);

drivers/base/regmap/regmap-mmio.c

541

ret = clk_prepare(ctx->clk);

drivers/base/regmap/regmap-mmio.c

543

clk_put(ctx->clk);

drivers/base/regmap/regmap-mmio.c

590

int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk)

drivers/base/regmap/regmap-mmio.c

594

ctx->clk = clk;

drivers/base/regmap/regmap-mmio.c

597

return clk_prepare(ctx->clk);

drivers/base/regmap/regmap-mmio.c

605

clk_unprepare(ctx->clk);

drivers/base/regmap/regmap-mmio.c

608

ctx->clk = NULL;

drivers/bluetooth/btmtkuart.c

453

err = clk_prepare_enable(bdev->clk);

drivers/bluetooth/btmtkuart.c

475

clk_disable_unprepare(bdev->clk);

drivers/bluetooth/btmtkuart.c

59

struct clk *clk;

drivers/bluetooth/btmtkuart.c

60

struct clk *osc;

drivers/bluetooth/btmtkuart.c

820

bdev->clk = devm_clk_get(&serdev->dev, "ref");

drivers/bluetooth/btmtkuart.c

821

if (IS_ERR(bdev->clk))

drivers/bluetooth/btmtkuart.c

822

return PTR_ERR(bdev->clk);

drivers/bluetooth/hci_aml.c

100

struct clk *lpo_clk;

drivers/bluetooth/hci_bcm.c

1062

static struct clk *bcm_get_txco(struct device *dev)

drivers/bluetooth/hci_bcm.c

1064

struct clk *clk;

drivers/bluetooth/hci_bcm.c

1067

clk = devm_clk_get_optional(dev, "txco");

drivers/bluetooth/hci_bcm.c

1068

if (clk)

drivers/bluetooth/hci_bcm.c

1069

return clk;

drivers/bluetooth/hci_bcm.c

1072

clk = devm_clk_get_optional(dev, "extclk");

drivers/bluetooth/hci_bcm.c

1073

if (clk)

drivers/bluetooth/hci_bcm.c

1074

return clk;

drivers/bluetooth/hci_bcm.c

131

struct clk *txco_clk;

drivers/bluetooth/hci_bcm.c

132

struct clk *lpo_clk;

drivers/bluetooth/hci_ll.c

69

struct clk *ext_clk;

drivers/bluetooth/hci_nokia.c

682

struct clk *sysclk;

drivers/bluetooth/hci_qca.c

227

struct clk *susclk;

drivers/bus/bt1-apb.c

55

struct clk *pclk;

drivers/bus/bt1-axi.c

51

struct clk *aclk;

drivers/bus/imx-weim.c

268

struct clk *clk;

drivers/bus/imx-weim.c

285

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/bus/imx-weim.c

286

if (IS_ERR(clk))

drivers/bus/imx-weim.c

287

return PTR_ERR(clk);

drivers/bus/omap_l3_smx.h

182

struct clk *ick;

drivers/bus/qcom-ebi2.c

299

struct clk *ebi2xclk;

drivers/bus/qcom-ebi2.c

300

struct clk *ebi2clk;

drivers/bus/qcom-ssc-block-bus.c

36

struct clk *xo_clk;

drivers/bus/qcom-ssc-block-bus.c

37

struct clk *aggre2_clk;

drivers/bus/qcom-ssc-block-bus.c

38

struct clk *gcc_im_sleep_clk;

drivers/bus/qcom-ssc-block-bus.c

39

struct clk *aggre2_north_clk;

drivers/bus/qcom-ssc-block-bus.c

40

struct clk *ssc_xo_clk;

drivers/bus/qcom-ssc-block-bus.c

41

struct clk *ssc_ahbs_clk;

drivers/bus/sunxi-rsb.c

122

struct clk *clk;

drivers/bus/sunxi-rsb.c

655

ret = clk_prepare_enable(rsb->clk);

drivers/bus/sunxi-rsb.c

679

p_clk_freq = clk_get_rate(rsb->clk);

drivers/bus/sunxi-rsb.c

697

clk_disable_unprepare(rsb->clk);

drivers/bus/sunxi-rsb.c

708

clk_disable_unprepare(rsb->clk);

drivers/bus/sunxi-rsb.c

715

clk_disable_unprepare(rsb->clk);

drivers/bus/sunxi-rsb.c

724

return clk_prepare_enable(rsb->clk);

drivers/bus/sunxi-rsb.c

772

rsb->clk = devm_clk_get(dev, NULL);

drivers/bus/sunxi-rsb.c

773

if (IS_ERR(rsb->clk))

drivers/bus/sunxi-rsb.c

774

return dev_err_probe(dev, PTR_ERR(rsb->clk),

drivers/bus/tegra-aconnect.c

18

struct clk *ape_clk;

drivers/bus/tegra-aconnect.c

19

struct clk *apb2ape_clk;

drivers/bus/tegra-gmi.c

227

gmi->clk = devm_clk_get(dev, "gmi");

drivers/bus/tegra-gmi.c

228

if (IS_ERR(gmi->clk)) {

drivers/bus/tegra-gmi.c

230

return PTR_ERR(gmi->clk);

drivers/bus/tegra-gmi.c

274

err = clk_prepare_enable(gmi->clk);

drivers/bus/tegra-gmi.c

287

clk_disable_unprepare(gmi->clk);

drivers/bus/tegra-gmi.c

47

struct clk *clk;

drivers/bus/ti-sysc.c

146

struct clk **clocks;

drivers/bus/ti-sysc.c

2067

struct clk *fck = NULL, *ick = NULL;

drivers/bus/ti-sysc.c

2330

struct clk *clk;

drivers/bus/ti-sysc.c

2337

clk = clk_get(child, name);

drivers/bus/ti-sysc.c

2338

if (!IS_ERR(clk)) {

drivers/bus/ti-sysc.c

2343

clk = clk_get(ddata->dev, name);

drivers/bus/ti-sysc.c

2344

if (IS_ERR(clk))

drivers/bus/ti-sysc.c

2347

l = clkdev_create(clk, name, dev_name(child));

drivers/bus/ti-sysc.c

2351

clk_put(clk);

drivers/bus/ti-sysc.c

328

struct clk *clock;

drivers/bus/ti-sysc.c

363

cl->clk = clock;

drivers/bus/ti-sysc.c

510

struct clk *clock;

drivers/bus/ti-sysc.c

546

struct clk *clock;

drivers/bus/ti-sysc.c

563

struct clk *clock;

drivers/bus/ti-sysc.c

597

struct clk *clock;

drivers/char/ds1620.c

51

static inline void netwinder_ds1620_set_clk(int clk)

drivers/char/ds1620.c

53

nw_gpio_modify_op(GPIO_DSCLK, clk ? GPIO_DSCLK : 0);

drivers/char/hw_random/atmel-rng.c

112

clk_disable_unprepare(trng->clk);

drivers/char/hw_random/atmel-rng.c

129

trng->clk = devm_clk_get(&pdev->dev, NULL);

drivers/char/hw_random/atmel-rng.c

130

if (IS_ERR(trng->clk))

drivers/char/hw_random/atmel-rng.c

131

return PTR_ERR(trng->clk);

drivers/char/hw_random/atmel-rng.c

37

struct clk *clk;

drivers/char/hw_random/atmel-rng.c

92

ret = clk_prepare_enable(trng->clk);

drivers/char/hw_random/atmel-rng.c

97

rate = clk_get_rate(trng->clk);

drivers/char/hw_random/bcm2835-rng.c

123

clk_disable_unprepare(priv->clk);

drivers/char/hw_random/bcm2835-rng.c

159

priv->clk = devm_clk_get_optional(dev, NULL);

drivers/char/hw_random/bcm2835-rng.c

160

if (IS_ERR(priv->clk))

drivers/char/hw_random/bcm2835-rng.c

161

return PTR_ERR(priv->clk);

drivers/char/hw_random/bcm2835-rng.c

34

struct clk *clk;

drivers/char/hw_random/bcm2835-rng.c

92

ret = clk_prepare_enable(priv->clk);

drivers/char/hw_random/bcm2835-rng.c

98

clk_disable_unprepare(priv->clk);

drivers/char/hw_random/cctrng.c

500

drvdata->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/char/hw_random/cctrng.c

501

if (IS_ERR(drvdata->clk))

drivers/char/hw_random/cctrng.c

502

return dev_err_probe(dev, PTR_ERR(drvdata->clk),

drivers/char/hw_random/cctrng.c

54

struct clk *clk;

drivers/char/hw_random/cctrng.c

582

clk_disable_unprepare(drvdata->clk);

drivers/char/hw_random/cctrng.c

615

rc = clk_prepare_enable(drvdata->clk);

drivers/char/hw_random/cctrng.c

624

clk_disable_unprepare(drvdata->clk);

drivers/char/hw_random/exynos-trng.c

139

sss_rate = clk_get_rate(trng->clk);

drivers/char/hw_random/exynos-trng.c

224

trng->clk = devm_clk_get_enabled(&pdev->dev, "secss");

drivers/char/hw_random/exynos-trng.c

225

if (IS_ERR(trng->clk)) {

drivers/char/hw_random/exynos-trng.c

226

ret = dev_err_probe(&pdev->dev, PTR_ERR(trng->clk),

drivers/char/hw_random/exynos-trng.c

76

struct clk *clk; /* operating clock */

drivers/char/hw_random/exynos-trng.c

77

struct clk *pclk; /* bus clock */

drivers/char/hw_random/imx-rngc.c

262

rngc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/char/hw_random/imx-rngc.c

263

if (IS_ERR(rngc->clk))

drivers/char/hw_random/imx-rngc.c

264

return dev_err_probe(&pdev->dev, PTR_ERR(rngc->clk), "Cannot get rng_clk\n");

drivers/char/hw_random/imx-rngc.c

270

clk_prepare_enable(rngc->clk);

drivers/char/hw_random/imx-rngc.c

279

clk_disable_unprepare(rngc->clk);

drivers/char/hw_random/imx-rngc.c

299

clk_disable_unprepare(rngc->clk);

drivers/char/hw_random/imx-rngc.c

306

clk_disable_unprepare(rngc->clk);

drivers/char/hw_random/imx-rngc.c

331

clk_disable_unprepare(rngc->clk);

drivers/char/hw_random/imx-rngc.c

340

clk_prepare_enable(rngc->clk);

drivers/char/hw_random/imx-rngc.c

65

struct clk *clk;

drivers/char/hw_random/ingenic-trng.c

79

struct clk *clk;

drivers/char/hw_random/ingenic-trng.c

91

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/char/hw_random/ingenic-trng.c

92

if (IS_ERR(clk))

drivers/char/hw_random/ingenic-trng.c

93

return dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/char/hw_random/jh7110-trng.c

98

struct clk *hclk;

drivers/char/hw_random/jh7110-trng.c

99

struct clk *ahb;

drivers/char/hw_random/ks-sa-rng.c

116

unsigned long clk_rate = clk_get_rate(ks_sa_rng->clk);

drivers/char/hw_random/ks-sa-rng.c

234

ks_sa_rng->clk = devm_clk_get_enabled(dev, NULL);

drivers/char/hw_random/ks-sa-rng.c

235

if (IS_ERR(ks_sa_rng->clk))

drivers/char/hw_random/ks-sa-rng.c

236

return dev_err_probe(dev, PTR_ERR(ks_sa_rng->clk), "Failed to get clock\n");

drivers/char/hw_random/ks-sa-rng.c

85

struct clk *clk;

drivers/char/hw_random/meson-rng.c

90

struct clk *core_clk;

drivers/char/hw_random/mtk-rng.c

124

priv->clk = devm_clk_get(&pdev->dev, "rng");

drivers/char/hw_random/mtk-rng.c

125

if (IS_ERR(priv->clk)) {

drivers/char/hw_random/mtk-rng.c

126

ret = PTR_ERR(priv->clk);

drivers/char/hw_random/mtk-rng.c

37

struct clk *clk;

drivers/char/hw_random/mtk-rng.c

48

err = clk_prepare_enable(priv->clk);

drivers/char/hw_random/mtk-rng.c

68

clk_disable_unprepare(priv->clk);

drivers/char/hw_random/mxc-rnga.c

150

mxc_rng->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/char/hw_random/mxc-rnga.c

151

if (IS_ERR(mxc_rng->clk)) {

drivers/char/hw_random/mxc-rnga.c

153

return PTR_ERR(mxc_rng->clk);

drivers/char/hw_random/mxc-rnga.c

58

struct clk *clk;

drivers/char/hw_random/nomadik-rng.c

37

struct clk *rng_clk;

drivers/char/hw_random/omap-rng.c

157

struct clk *clk;

drivers/char/hw_random/omap-rng.c

158

struct clk *clk_reg;

drivers/char/hw_random/omap-rng.c

461

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/char/hw_random/omap-rng.c

462

if (PTR_ERR(priv->clk) == -EPROBE_DEFER)

drivers/char/hw_random/omap-rng.c

464

if (!IS_ERR(priv->clk)) {

drivers/char/hw_random/omap-rng.c

465

ret = clk_prepare_enable(priv->clk);

drivers/char/hw_random/omap-rng.c

506

clk_disable_unprepare(priv->clk);

drivers/char/hw_random/omap-rng.c

522

clk_disable_unprepare(priv->clk);

drivers/char/hw_random/omap3-rom-rng.c

137

ddata->clk = devm_clk_get(ddata->dev, "ick");

drivers/char/hw_random/omap3-rom-rng.c

138

if (IS_ERR(ddata->clk)) {

drivers/char/hw_random/omap3-rom-rng.c

140

return PTR_ERR(ddata->clk);

drivers/char/hw_random/omap3-rom-rng.c

31

struct clk *clk;

drivers/char/hw_random/omap3-rom-rng.c

75

clk_disable_unprepare(ddata->clk);

drivers/char/hw_random/omap3-rom-rng.c

87

r = clk_prepare_enable(ddata->clk);

drivers/char/hw_random/omap3-rom-rng.c

93

clk_disable_unprepare(ddata->clk);

drivers/char/hw_random/pic32-rng.c

80

struct clk *clk;

drivers/char/hw_random/pic32-rng.c

90

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/char/hw_random/pic32-rng.c

91

if (IS_ERR(clk))

drivers/char/hw_random/pic32-rng.c

92

return PTR_ERR(clk);

drivers/char/hw_random/st-rng.c

75

struct clk *clk;

drivers/char/hw_random/st-rng.c

87

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/char/hw_random/st-rng.c

88

if (IS_ERR(clk))

drivers/char/hw_random/st-rng.c

89

return PTR_ERR(clk);

drivers/char/hw_random/stm32-rng.c

270

clock_rate = clk_get_rate(priv->clk_bulk[0].clk);

drivers/char/hw_random/stm32-rng.c

280

pr_debug("RNG clk rate : %lu\n", clk_get_rate(priv->clk_bulk[0].clk) >> clock_div);

drivers/char/hw_random/stm32-rng.c

578

struct clk *clk = priv->clk_bulk[1].clk;

drivers/char/hw_random/stm32-rng.c

585

priv->clk_bulk[1].clk = priv->clk_bulk[0].clk;

drivers/char/hw_random/stm32-rng.c

587

priv->clk_bulk[0].clk = clk;

drivers/char/hw_random/xgene-rng.c

316

struct clk *clk;

drivers/char/hw_random/xgene-rng.c

343

clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/char/hw_random/xgene-rng.c

344

if (IS_ERR(clk))

drivers/char/hw_random/xgene-rng.c

345

return dev_err_probe(&pdev->dev, PTR_ERR(clk), "Couldn't get the clock for RNG\n");

drivers/clk/actions/owl-factor.c

165

__clk_get_name(common->hw.clk));

drivers/clk/aspeed/clk-aspeed.c

187

u32 clk = BIT(gate->clock_idx);

drivers/clk/aspeed/clk-aspeed.c

189

u32 enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;

drivers/clk/aspeed/clk-aspeed.c

206

return ((reg & clk) == enval) ? 1 : 0;

drivers/clk/aspeed/clk-aspeed.c

213

u32 clk = BIT(gate->clock_idx);

drivers/clk/aspeed/clk-aspeed.c

233

enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;

drivers/clk/aspeed/clk-aspeed.c

234

regmap_update_bits(gate->map, ASPEED_CLK_STOP_CTRL, clk, enval);

drivers/clk/aspeed/clk-aspeed.c

253

u32 clk = BIT(gate->clock_idx);

drivers/clk/aspeed/clk-aspeed.c

258

enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? clk : 0;

drivers/clk/aspeed/clk-aspeed.c

259

regmap_update_bits(gate->map, ASPEED_CLK_STOP_CTRL, clk, enval);

drivers/clk/aspeed/clk-ast2600.c

290

u32 clk = get_bit(gate->clock_idx);

drivers/clk/aspeed/clk-ast2600.c

310

enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;

drivers/clk/aspeed/clk-ast2600.c

312

return ((reg & clk) == enval) ? 1 : 0;

drivers/clk/aspeed/clk-ast2600.c

319

u32 clk = get_bit(gate->clock_idx);

drivers/clk/aspeed/clk-ast2600.c

339

regmap_write(gate->map, get_clock_reg(gate) + 0x04, clk);

drivers/clk/aspeed/clk-ast2600.c

342

regmap_write(gate->map, get_clock_reg(gate), clk);

drivers/clk/aspeed/clk-ast2600.c

361

u32 clk = get_bit(gate->clock_idx);

drivers/clk/aspeed/clk-ast2600.c

366

regmap_write(gate->map, get_clock_reg(gate), clk);

drivers/clk/aspeed/clk-ast2600.c

369

regmap_write(gate->map, get_clock_reg(gate) + 0x4, clk);

drivers/clk/aspeed/clk-ast2700.c

1000

hws[id] = ast2700_clk_hw_register_gate(dev, clk->name, phw, reg, gate->bit,

drivers/clk/aspeed/clk-ast2700.c

1003

const struct ast2700_clk_gate_data *gate = &clk->data.gate;

drivers/clk/aspeed/clk-ast2700.c

1007

hws[id] = devm_clk_hw_register_gate_parent_hw(dev, clk->name, phw,

drivers/clk/aspeed/clk-ast2700.c

779

u32 clk = BIT(gate->bit_idx);

drivers/clk/aspeed/clk-ast2700.c

784

return !(reg & clk);

drivers/clk/aspeed/clk-ast2700.c

790

u32 clk = BIT(gate->bit_idx);

drivers/clk/aspeed/clk-ast2700.c

792

if (readl(gate->reg) & clk)

drivers/clk/aspeed/clk-ast2700.c

793

writel(clk, gate->reg + 0x04);

drivers/clk/aspeed/clk-ast2700.c

801

u32 clk = BIT(gate->bit_idx);

drivers/clk/aspeed/clk-ast2700.c

804

writel(clk, gate->reg);

drivers/clk/aspeed/clk-ast2700.c

917

const struct ast2700_clk_info *clk = &clk_data->clk_info[i];

drivers/clk/aspeed/clk-ast2700.c

919

unsigned int id = clk->id;

drivers/clk/aspeed/clk-ast2700.c

923

dev_err(dev, "clk id %u invalid for %s\n", id, clk->name);

drivers/clk/aspeed/clk-ast2700.c

927

if (clk->type == CLK_FIXED) {

drivers/clk/aspeed/clk-ast2700.c

928

const struct ast2700_clk_fixed_rate_data *fixed_rate = &clk->data.rate;

drivers/clk/aspeed/clk-ast2700.c

930

hws[id] = devm_clk_hw_register_fixed_rate(dev, clk->name, NULL, 0,

drivers/clk/aspeed/clk-ast2700.c

932

} else if (clk->type == CLK_FIXED_FACTOR) {

drivers/clk/aspeed/clk-ast2700.c

933

const struct ast2700_clk_fixed_factor_data *factor = &clk->data.factor;

drivers/clk/aspeed/clk-ast2700.c

936

hws[id] = devm_clk_hw_register_fixed_factor_parent_hw(dev, clk->name,

drivers/clk/aspeed/clk-ast2700.c

939

} else if (clk->type == CLK_FIXED_DISPLAY) {

drivers/clk/aspeed/clk-ast2700.c

940

reg = clk_ctrl->base + clk->data.display_rate.reg;

drivers/clk/aspeed/clk-ast2700.c

942

hws[id] = ast2700_clk_hw_register_fixed_display(reg, clk->name, clk_ctrl);

drivers/clk/aspeed/clk-ast2700.c

943

} else if (clk->type == CLK_HPLL) {

drivers/clk/aspeed/clk-ast2700.c

944

const struct ast2700_clk_pll_data *pll = &clk->data.pll;

drivers/clk/aspeed/clk-ast2700.c

948

hws[id] = ast2700_clk_hw_register_hpll(reg, clk->name, phw, clk_ctrl);

drivers/clk/aspeed/clk-ast2700.c

949

} else if (clk->type == CLK_PLL) {

drivers/clk/aspeed/clk-ast2700.c

950

const struct ast2700_clk_pll_data *pll = &clk->data.pll;

drivers/clk/aspeed/clk-ast2700.c

954

hws[id] = ast2700_clk_hw_register_pll(id, reg, clk->name, phw, clk_ctrl);

drivers/clk/aspeed/clk-ast2700.c

955

} else if (clk->type == CLK_UART_PLL) {

drivers/clk/aspeed/clk-ast2700.c

956

const struct ast2700_clk_pll_data *pll = &clk->data.pll;

drivers/clk/aspeed/clk-ast2700.c

960

hws[id] = ast2700_clk_hw_register_uartpll(reg, clk->name, phw, clk_ctrl);

drivers/clk/aspeed/clk-ast2700.c

961

} else if (clk->type == CLK_MUX) {

drivers/clk/aspeed/clk-ast2700.c

962

const struct ast2700_clk_mux_data *mux = &clk->data.mux;

drivers/clk/aspeed/clk-ast2700.c

971

hws[id] = devm_clk_hw_register_mux_parent_hws(dev, clk->name,

drivers/clk/aspeed/clk-ast2700.c

977

} else if (clk->type == CLK_MISC) {

drivers/clk/aspeed/clk-ast2700.c

978

const struct ast2700_clk_pll_data *pll = &clk->data.pll;

drivers/clk/aspeed/clk-ast2700.c

982

hws[id] = ast2700_clk_hw_register_misc(id, reg, clk->name, phw, clk_ctrl);

drivers/clk/aspeed/clk-ast2700.c

983

} else if (clk->type == CLK_DIVIDER) {

drivers/clk/aspeed/clk-ast2700.c

984

const struct ast2700_clk_div_data *divider = &clk->data.div;

drivers/clk/aspeed/clk-ast2700.c

988

hws[id] = clk_hw_register_divider_table_parent_hw(dev, clk->name,

drivers/clk/aspeed/clk-ast2700.c

995

} else if (clk->type == CLK_GATE_ASPEED) {

drivers/clk/aspeed/clk-ast2700.c

996

const struct ast2700_clk_gate_data *gate = &clk->data.gate;

drivers/clk/at91/clk-audio-pll.c

343

best_parent_rate = clk_round_rate(pclk->clk, 1);

drivers/clk/at91/clk-audio-pll.c

346

best_parent_rate = clk_round_rate(pclk->clk, req->rate * div);

drivers/clk/at91/clk-generated.c

209

__clk_get_name((req->best_parent_hw)->clk),

drivers/clk/at91/clk-master.c

570

clk_notifier_register(hw->clk,

drivers/clk/at91/clk-master.c

651

__clk_get_name((req->best_parent_hw)->clk),

drivers/clk/at91/clk-peripheral.c

331

__clk_get_name((req->best_parent_hw)->clk),

drivers/clk/at91/clk-sam9x60-pll.c

791

clk_notifier_register(hw->clk, &sam9x60_div_pll_notifier);

drivers/clk/axis/clk-artpec6.c

121

struct clk **clks = clkdata->clk_table;

drivers/clk/axis/clk-artpec6.c

20

struct clk *clk_table[ARTPEC6_CLK_NUMCLOCKS];

drivers/clk/axis/clk-artpec6.c

43

struct clk **clks;

drivers/clk/axs10x/i2s_pll_clock.c

101

struct i2s_pll_clk *clk = to_i2s_pll_clk(hw);

drivers/clk/axs10x/i2s_pll_clock.c

104

idiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_IDIV_REG));

drivers/clk/axs10x/i2s_pll_clock.c

105

fbdiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_FBDIV_REG));

drivers/clk/axs10x/i2s_pll_clock.c

106

odiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_ODIV0_REG));

drivers/clk/axs10x/i2s_pll_clock.c

114

struct i2s_pll_clk *clk = to_i2s_pll_clk(hw);

drivers/clk/axs10x/i2s_pll_clock.c

119

dev_err(clk->dev, "invalid parent rate=%ld\n", req->best_parent_rate);

drivers/clk/axs10x/i2s_pll_clock.c

133

struct i2s_pll_clk *clk = to_i2s_pll_clk(hw);

drivers/clk/axs10x/i2s_pll_clock.c

138

dev_err(clk->dev, "invalid parent rate=%ld\n", parent_rate);

drivers/clk/axs10x/i2s_pll_clock.c

144

i2s_pll_write(clk, PLL_IDIV_REG, pll_cfg[i].idiv);

drivers/clk/axs10x/i2s_pll_clock.c

145

i2s_pll_write(clk, PLL_FBDIV_REG, pll_cfg[i].fbdiv);

drivers/clk/axs10x/i2s_pll_clock.c

146

i2s_pll_write(clk, PLL_ODIV0_REG, pll_cfg[i].odiv0);

drivers/clk/axs10x/i2s_pll_clock.c

147

i2s_pll_write(clk, PLL_ODIV1_REG, pll_cfg[i].odiv1);

drivers/clk/axs10x/i2s_pll_clock.c

152

dev_err(clk->dev, "invalid rate=%ld, parent_rate=%ld\n", rate,

drivers/clk/axs10x/i2s_pll_clock.c

169

struct clk *clk;

drivers/clk/axs10x/i2s_pll_clock.c

191

clk = devm_clk_register(dev, &pll_clk->hw);

drivers/clk/axs10x/i2s_pll_clock.c

192

if (IS_ERR(clk)) {

drivers/clk/axs10x/i2s_pll_clock.c

194

clk_name, PTR_ERR(clk));

drivers/clk/axs10x/i2s_pll_clock.c

195

return PTR_ERR(clk);

drivers/clk/axs10x/i2s_pll_clock.c

198

return of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/axs10x/i2s_pll_clock.c

64

static inline void i2s_pll_write(struct i2s_pll_clk *clk, unsigned int reg,

drivers/clk/axs10x/i2s_pll_clock.c

67

writel_relaxed(val, clk->base + reg);

drivers/clk/axs10x/i2s_pll_clock.c

70

static inline unsigned int i2s_pll_read(struct i2s_pll_clk *clk,

drivers/clk/axs10x/i2s_pll_clock.c

73

return readl_relaxed(clk->base + reg);

drivers/clk/axs10x/pll_clock.c

101

iowrite32(val, clk->base + reg);

drivers/clk/axs10x/pll_clock.c

104

static inline u32 axs10x_pll_read(struct axs10x_pll_clk *clk, u32 reg)

drivers/clk/axs10x/pll_clock.c

106

return ioread32(clk->base + reg);

drivers/clk/axs10x/pll_clock.c

140

struct axs10x_pll_clk *clk = to_axs10x_pll_clk(hw);

drivers/clk/axs10x/pll_clock.c

142

idiv = axs10x_div_get_value(axs10x_pll_read(clk, PLL_REG_IDIV));

drivers/clk/axs10x/pll_clock.c

143

fbdiv = axs10x_div_get_value(axs10x_pll_read(clk, PLL_REG_FBDIV));

drivers/clk/axs10x/pll_clock.c

144

odiv = axs10x_div_get_value(axs10x_pll_read(clk, PLL_REG_ODIV));

drivers/clk/axs10x/pll_clock.c

157

struct axs10x_pll_clk *clk = to_axs10x_pll_clk(hw);

drivers/clk/axs10x/pll_clock.c

158

const struct axs10x_pll_cfg *pll_cfg = clk->pll_cfg;

drivers/clk/axs10x/pll_clock.c

179

struct axs10x_pll_clk *clk = to_axs10x_pll_clk(hw);

drivers/clk/axs10x/pll_clock.c

180

const struct axs10x_pll_cfg *pll_cfg = clk->pll_cfg;

drivers/clk/axs10x/pll_clock.c

184

axs10x_pll_write(clk, PLL_REG_IDIV,

drivers/clk/axs10x/pll_clock.c

186

axs10x_pll_write(clk, PLL_REG_FBDIV,

drivers/clk/axs10x/pll_clock.c

188

axs10x_pll_write(clk, PLL_REG_ODIV,

drivers/clk/axs10x/pll_clock.c

196

if (!(ioread32(clk->lock) & PLL_LOCK))

drivers/clk/axs10x/pll_clock.c

199

if (ioread32(clk->lock) & PLL_ERROR)

drivers/clk/axs10x/pll_clock.c

206

dev_err(clk->dev, "invalid rate=%ld, parent_rate=%ld\n", rate,

drivers/clk/axs10x/pll_clock.c

98

static inline void axs10x_pll_write(struct axs10x_pll_clk *clk, u32 reg,

drivers/clk/bcm/clk-bcm2835-aux.c

21

struct clk *parent_clk;

drivers/clk/bcm/clk-bcm2835.c

2257

static int bcm2835_mark_sdc_parent_critical(struct clk *sdc)

drivers/clk/bcm/clk-bcm2835.c

2259

struct clk *parent = clk_get_parent(sdc);

drivers/clk/bcm/clk-bcm2835.c

2323

ret = bcm2835_mark_sdc_parent_critical(hws[BCM2835_CLOCK_SDRAM]->clk);

drivers/clk/bcm/clk-bcm63268-timer.c

153

struct clk_hw *clk;

drivers/clk/bcm/clk-bcm63268-timer.c

179

clk = devm_clk_hw_register_gate(dev, entry->name, NULL, 0,

drivers/clk/bcm/clk-bcm63268-timer.c

183

if (IS_ERR(clk))

drivers/clk/bcm/clk-bcm63268-timer.c

184

return PTR_ERR(clk);

drivers/clk/bcm/clk-bcm63268-timer.c

186

hw->data.hws[entry->bit] = clk;

drivers/clk/bcm/clk-bcm63xx-gate.c

517

struct clk_hw *clk;

drivers/clk/bcm/clk-bcm63xx-gate.c

519

clk = clk_hw_register_gate(&pdev->dev, entry->name, NULL,

drivers/clk/bcm/clk-bcm63xx-gate.c

522

if (IS_ERR(clk)) {

drivers/clk/bcm/clk-bcm63xx-gate.c

523

ret = PTR_ERR(clk);

drivers/clk/bcm/clk-bcm63xx-gate.c

527

hw->data.hws[entry->bit] = clk;

drivers/clk/bcm/clk-iproc-asiu.c

127

struct iproc_asiu_clk *clk = to_asiu_clk(hw);

drivers/clk/bcm/clk-iproc-asiu.c

128

struct iproc_asiu *asiu = clk->asiu;

drivers/clk/bcm/clk-iproc-asiu.c

137

val = readl(asiu->div_base + clk->div.offset);

drivers/clk/bcm/clk-iproc-asiu.c

138

val &= ~(1 << clk->div.en_shift);

drivers/clk/bcm/clk-iproc-asiu.c

139

writel(val, asiu->div_base + clk->div.offset);

drivers/clk/bcm/clk-iproc-asiu.c

151

val = readl(asiu->div_base + clk->div.offset);

drivers/clk/bcm/clk-iproc-asiu.c

152

val |= 1 << clk->div.en_shift;

drivers/clk/bcm/clk-iproc-asiu.c

154

val &= ~(bit_mask(clk->div.high_width)

drivers/clk/bcm/clk-iproc-asiu.c

155

<< clk->div.high_shift);

drivers/clk/bcm/clk-iproc-asiu.c

156

val |= div_h << clk->div.high_shift;

drivers/clk/bcm/clk-iproc-asiu.c

158

val &= ~(bit_mask(clk->div.high_width)

drivers/clk/bcm/clk-iproc-asiu.c

159

<< clk->div.high_shift);

drivers/clk/bcm/clk-iproc-asiu.c

162

val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift);

drivers/clk/bcm/clk-iproc-asiu.c

163

val |= div_l << clk->div.low_shift;

drivers/clk/bcm/clk-iproc-asiu.c

165

val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift);

drivers/clk/bcm/clk-iproc-asiu.c

167

writel(val, asiu->div_base + clk->div.offset);

drivers/clk/bcm/clk-iproc-asiu.c

38

struct iproc_asiu_clk *clk = to_asiu_clk(hw);

drivers/clk/bcm/clk-iproc-asiu.c

39

struct iproc_asiu *asiu = clk->asiu;

drivers/clk/bcm/clk-iproc-asiu.c

43

if (clk->gate.offset == IPROC_CLK_INVALID_OFFSET)

drivers/clk/bcm/clk-iproc-asiu.c

46

val = readl(asiu->gate_base + clk->gate.offset);

drivers/clk/bcm/clk-iproc-asiu.c

47

val |= (1 << clk->gate.en_shift);

drivers/clk/bcm/clk-iproc-asiu.c

48

writel(val, asiu->gate_base + clk->gate.offset);

drivers/clk/bcm/clk-iproc-asiu.c

55

struct iproc_asiu_clk *clk = to_asiu_clk(hw);

drivers/clk/bcm/clk-iproc-asiu.c

56

struct iproc_asiu *asiu = clk->asiu;

drivers/clk/bcm/clk-iproc-asiu.c

60

if (clk->gate.offset == IPROC_CLK_INVALID_OFFSET)

drivers/clk/bcm/clk-iproc-asiu.c

63

val = readl(asiu->gate_base + clk->gate.offset);

drivers/clk/bcm/clk-iproc-asiu.c

64

val &= ~(1 << clk->gate.en_shift);

drivers/clk/bcm/clk-iproc-asiu.c

65

writel(val, asiu->gate_base + clk->gate.offset);

drivers/clk/bcm/clk-iproc-asiu.c

71

struct iproc_asiu_clk *clk = to_asiu_clk(hw);

drivers/clk/bcm/clk-iproc-asiu.c

72

struct iproc_asiu *asiu = clk->asiu;

drivers/clk/bcm/clk-iproc-asiu.c

77

clk->rate = 0;

drivers/clk/bcm/clk-iproc-asiu.c

82

val = readl(asiu->div_base + clk->div.offset);

drivers/clk/bcm/clk-iproc-asiu.c

83

if ((val & (1 << clk->div.en_shift)) == 0) {

drivers/clk/bcm/clk-iproc-asiu.c

84

clk->rate = parent_rate;

drivers/clk/bcm/clk-iproc-asiu.c

89

div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width);

drivers/clk/bcm/clk-iproc-asiu.c

91

div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width);

drivers/clk/bcm/clk-iproc-asiu.c

94

clk->rate = parent_rate / (div_h + div_l);

drivers/clk/bcm/clk-iproc-asiu.c

96

__func__, clk->rate, parent_rate, div_h, div_l);

drivers/clk/bcm/clk-iproc-asiu.c

98

return clk->rate;

drivers/clk/bcm/clk-iproc-pll.c

305

static int pll_set_rate(struct iproc_clk *clk, struct iproc_pll_vco_param *vco,

drivers/clk/bcm/clk-iproc-pll.c

308

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

315

const char *clk_name = clk_hw_get_name(&clk->hw);

drivers/clk/bcm/clk-iproc-pll.c

354

if (pll_fractional_change_only(clk->pll, vco)) {

drivers/clk/bcm/clk-iproc-pll.c

429

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

430

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

437

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

438

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

450

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

451

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

500

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

501

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

545

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

546

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

563

ret = pll_set_rate(clk, &vco_param, parent_rate);

drivers/clk/bcm/clk-iproc-pll.c

577

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

578

const struct iproc_clk_ctrl *ctrl = clk->ctrl;

drivers/clk/bcm/clk-iproc-pll.c

579

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

597

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

598

const struct iproc_clk_ctrl *ctrl = clk->ctrl;

drivers/clk/bcm/clk-iproc-pll.c

599

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

613

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

614

const struct iproc_clk_ctrl *ctrl = clk->ctrl;

drivers/clk/bcm/clk-iproc-pll.c

615

struct iproc_pll *pll = clk->pll;

drivers/clk/bcm/clk-iproc-pll.c

661

struct iproc_clk *clk = to_iproc_clk(hw);

drivers/clk/bcm/clk-iproc-pll.c

662

const struct iproc_clk_ctrl *ctrl = clk->ctrl;

drivers/clk/bcm/clk-iproc-pll.c

663

struct iproc_pll *pll = clk->pll;

drivers/clk/berlin/bg2.c

496

struct clk *clk;

drivers/clk/berlin/bg2.c

516

clk = of_clk_get_by_name(np, clk_names[REFCLK]);

drivers/clk/berlin/bg2.c

517

if (!IS_ERR(clk)) {

drivers/clk/berlin/bg2.c

518

clk_names[REFCLK] = __clk_get_name(clk);

drivers/clk/berlin/bg2.c

519

clk_put(clk);

drivers/clk/berlin/bg2.c

522

clk = of_clk_get_by_name(np, clk_names[VIDEO_EXT0]);

drivers/clk/berlin/bg2.c

523

if (!IS_ERR(clk)) {

drivers/clk/berlin/bg2.c

524

clk_names[VIDEO_EXT0] = __clk_get_name(clk);

drivers/clk/berlin/bg2.c

525

clk_put(clk);

drivers/clk/berlin/bg2q.c

284

struct clk *clk;

drivers/clk/berlin/bg2q.c

313

clk = of_clk_get_by_name(np, clk_names[REFCLK]);

drivers/clk/berlin/bg2q.c

314

if (!IS_ERR(clk)) {

drivers/clk/berlin/bg2q.c

315

clk_names[REFCLK] = __clk_get_name(clk);

drivers/clk/berlin/bg2q.c

316

clk_put(clk);

drivers/clk/clk-axi-clkgen.c

572

struct clk *axi_clk;

drivers/clk/clk-bulk.c

164

clk_unprepare(clks[num_clks].clk);

drivers/clk/clk-bulk.c

183

ret = clk_prepare(clks[i].clk);

drivers/clk/clk-bulk.c

215

clk_disable(clks[num_clks].clk);

drivers/clk/clk-bulk.c

23

clks[i].clk = NULL;

drivers/clk/clk-bulk.c

233

ret = clk_enable(clks[i].clk);

drivers/clk/clk-bulk.c

28

clks[i].clk = of_clk_get(np, i);

drivers/clk/clk-bulk.c

29

if (IS_ERR(clks[i].clk)) {

drivers/clk/clk-bulk.c

30

ret = PTR_ERR(clks[i].clk);

drivers/clk/clk-bulk.c

33

clks[i].clk = NULL;

drivers/clk/clk-bulk.c

75

clk_put(clks[num_clks].clk);

drivers/clk/clk-bulk.c

76

clks[num_clks].clk = NULL;

drivers/clk/clk-bulk.c

88

clks[i].clk = NULL;

drivers/clk/clk-bulk.c

91

clks[i].clk = clk_get(dev, clks[i].id);

drivers/clk/clk-bulk.c

92

if (IS_ERR(clks[i].clk)) {

drivers/clk/clk-bulk.c

93

ret = PTR_ERR(clks[i].clk);

drivers/clk/clk-bulk.c

94

clks[i].clk = NULL;

drivers/clk/clk-cdce706.c

314

struct clk *gp_clk = cdce->clkin_clk[cdce->clkin[0].parent];

drivers/clk/clk-cdce706.c

488

struct clk *parent = devm_clk_get(&cdce->client->dev,

drivers/clk/clk-cdce706.c

80

struct clk *clkin_clk[2];

drivers/clk/clk-cdce925.c

189

struct clk *parent = clk_get_parent(hw->clk);

drivers/clk/clk-cdce925.c

385

struct clk *pll = clk_get_parent(hw->clk);

drivers/clk/clk-cdce925.c

386

struct clk *root = clk_get_parent(pll);

drivers/clk/clk-cdce925.c

591

if (idx >= ARRAY_SIZE(data->clk)) {

drivers/clk/clk-cdce925.c

596

return &data->clk[idx].hw;

drivers/clk/clk-cdce925.c

706

err = clk_set_rate(data->pll[i].hw.clk, value);

drivers/clk/clk-cdce925.c

73

struct clk_cdce925_output clk[MAX_NUMBER_OF_OUTPUTS];

drivers/clk/clk-cdce925.c

736

data->clk[0].chip = data;

drivers/clk/clk-cdce925.c

737

data->clk[0].hw.init = &init;

drivers/clk/clk-cdce925.c

738

data->clk[0].index = 0;

drivers/clk/clk-cdce925.c

739

data->clk[0].pdiv = 1;

drivers/clk/clk-cdce925.c

740

err = devm_clk_hw_register(&client->dev, &data->clk[0].hw);

drivers/clk/clk-cdce925.c

758

data->clk[i].chip = data;

drivers/clk/clk-cdce925.c

759

data->clk[i].hw.init = &init;

drivers/clk/clk-cdce925.c

760

data->clk[i].index = i;

drivers/clk/clk-cdce925.c

761

data->clk[i].pdiv = 1;

drivers/clk/clk-cdce925.c

784

err = devm_clk_hw_register(&client->dev, &data->clk[i].hw);

drivers/clk/clk-composite.c

339

composite->mux_hw->clk = hw->clk;

drivers/clk/clk-composite.c

342

composite->rate_hw->clk = hw->clk;

drivers/clk/clk-composite.c

345

composite->gate_hw->clk = hw->clk;

drivers/clk/clk-composite.c

383

struct clk *clk_register_composite(struct device *dev, const char *name,

drivers/clk/clk-composite.c

397

return hw->clk;

drivers/clk/clk-composite.c

401

struct clk *clk_register_composite_pdata(struct device *dev, const char *name,

drivers/clk/clk-composite.c

416

return hw->clk;

drivers/clk/clk-composite.c

419

void clk_unregister_composite(struct clk *clk)

drivers/clk/clk-composite.c

424

hw = __clk_get_hw(clk);

drivers/clk/clk-composite.c

430

clk_unregister(clk);

drivers/clk/clk-conf.c

138

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/clk-conf.c

140

if (IS_ERR(clk)) {

drivers/clk/clk-conf.c

141

if (PTR_ERR(clk) != -EPROBE_DEFER)

drivers/clk/clk-conf.c

144

return PTR_ERR(clk);

drivers/clk/clk-conf.c

147

rc = clk_set_rate(clk, rate);

drivers/clk/clk-conf.c

150

__clk_get_name(clk), rate, rc,

drivers/clk/clk-conf.c

151

clk_get_rate(clk));

drivers/clk/clk-conf.c

152

clk_put(clk);

drivers/clk/clk-conf.c

19

struct clk *clk, *pclk;

drivers/clk/clk-conf.c

59

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/clk-conf.c

61

if (IS_ERR(clk)) {

drivers/clk/clk-conf.c

62

if (PTR_ERR(clk) != -EPROBE_DEFER)

drivers/clk/clk-conf.c

65

rc = PTR_ERR(clk);

drivers/clk/clk-conf.c

69

rc = clk_set_parent(clk, pclk);

drivers/clk/clk-conf.c

72

__clk_get_name(clk), __clk_get_name(pclk), rc);

drivers/clk/clk-conf.c

73

clk_put(clk);

drivers/clk/clk-conf.c

86

struct clk *clk;

drivers/clk/clk-cs2000-cp.c

105

struct clk *clk_in;

drivers/clk/clk-cs2000-cp.c

106

struct clk *ref_clk;

drivers/clk/clk-cs2000-cp.c

446

struct clk *clk_in, *ref_clk;

drivers/clk/clk-devres.c

102

struct clk *devm_clk_get_optional_enabled_with_rate(struct device *dev,

drivers/clk/clk-devres.c

106

struct clk *clk;

drivers/clk/clk-devres.c

109

clk = __devm_clk_get(dev, id, clk_get_optional, NULL,

drivers/clk/clk-devres.c

111

if (IS_ERR(clk))

drivers/clk/clk-devres.c

112

return ERR_CAST(clk);

drivers/clk/clk-devres.c

114

ret = clk_set_rate(clk, rate);

drivers/clk/clk-devres.c

118

ret = clk_prepare_enable(clk);

drivers/clk/clk-devres.c

122

return clk;

drivers/clk/clk-devres.c

125

devm_clk_put(dev, clk);

drivers/clk/clk-devres.c

17

state->exit(state->clk);

drivers/clk/clk-devres.c

19

clk_put(state->clk);

drivers/clk/clk-devres.c

22

static struct clk *__devm_clk_get(struct device *dev, const char *id,

drivers/clk/clk-devres.c

23

struct clk *(*get)(struct device *dev, const char *id),

drivers/clk/clk-devres.c

24

int (*init)(struct clk *clk),

drivers/clk/clk-devres.c

25

void (*exit)(struct clk *clk))

drivers/clk/clk-devres.c

28

struct clk *clk;

drivers/clk/clk-devres.c

306

struct clk **c = res;

drivers/clk/clk-devres.c

314

void devm_clk_put(struct device *dev, struct clk *clk)

drivers/clk/clk-devres.c

318

ret = devres_release(dev, devm_clk_release, devm_clk_match, clk);

drivers/clk/clk-devres.c

324

struct clk *devm_get_clk_from_child(struct device *dev,

drivers/clk/clk-devres.c

328

struct clk *clk;

drivers/clk/clk-devres.c

334

clk = of_clk_get_by_name(np, con_id);

drivers/clk/clk-devres.c

335

if (!IS_ERR(clk)) {

drivers/clk/clk-devres.c

336

state->clk = clk;

drivers/clk/clk-devres.c

342

return clk;

drivers/clk/clk-devres.c

35

clk = get(dev, id);

drivers/clk/clk-devres.c

36

if (IS_ERR(clk)) {

drivers/clk/clk-devres.c

37

ret = PTR_ERR(clk);

drivers/clk/clk-devres.c

42

ret = init(clk);

drivers/clk/clk-devres.c

47

state->clk = clk;

drivers/clk/clk-devres.c

52

return clk;

drivers/clk/clk-devres.c

56

clk_put(clk);

drivers/clk/clk-devres.c

63

struct clk *devm_clk_get(struct device *dev, const char *id)

drivers/clk/clk-devres.c

69

struct clk *devm_clk_get_prepared(struct device *dev, const char *id)

drivers/clk/clk-devres.c

75

struct clk *devm_clk_get_enabled(struct device *dev, const char *id)

drivers/clk/clk-devres.c

8

struct clk *clk;

drivers/clk/clk-devres.c

82

struct clk *devm_clk_get_optional(struct device *dev, const char *id)

drivers/clk/clk-devres.c

88

struct clk *devm_clk_get_optional_prepared(struct device *dev, const char *id)

drivers/clk/clk-devres.c

9

void (*exit)(struct clk *clk);

drivers/clk/clk-devres.c

95

struct clk *devm_clk_get_optional_enabled(struct device *dev, const char *id)

drivers/clk/clk-divider.c

594

struct clk *clk_register_divider_table(struct device *dev, const char *name,

drivers/clk/clk-divider.c

607

return hw->clk;

drivers/clk/clk-divider.c

611

void clk_unregister_divider(struct clk *clk)

drivers/clk/clk-divider.c

616

hw = __clk_get_hw(clk);

drivers/clk/clk-divider.c

622

clk_unregister(clk);

drivers/clk/clk-ep93xx.c

103

static struct ep93xx_clk_priv *ep93xx_priv_from(struct ep93xx_clk *clk)

drivers/clk/clk-ep93xx.c

105

return container_of(clk, struct ep93xx_clk_priv, reg[clk->idx]);

drivers/clk/clk-ep93xx.c

117

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

118

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

121

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

123

return !!(val & BIT(clk->bit_idx));

drivers/clk/clk-ep93xx.c

128

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

129

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

134

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

135

val |= BIT(clk->bit_idx);

drivers/clk/clk-ep93xx.c

137

ep93xx_clk_write(priv, clk->reg, val);

drivers/clk/clk-ep93xx.c

144

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

145

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

150

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

151

val &= ~BIT(clk->bit_idx);

drivers/clk/clk-ep93xx.c

153

ep93xx_clk_write(priv, clk->reg, val);

drivers/clk/clk-ep93xx.c

162

static int ep93xx_clk_register_gate(struct ep93xx_clk *clk,

drivers/clk/clk-ep93xx.c

169

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

178

clk->reg = reg;

drivers/clk/clk-ep93xx.c

179

clk->bit_idx = bit_idx;

drivers/clk/clk-ep93xx.c

180

clk->hw.init = &init;

drivers/clk/clk-ep93xx.c

182

return devm_clk_hw_register(priv->dev, &clk->hw);

drivers/clk/clk-ep93xx.c

187

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

188

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

191

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

207

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

208

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

216

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

221

ep93xx_clk_write(priv, clk->reg, val);

drivers/clk/clk-ep93xx.c

286

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

287

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

291

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

303

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

304

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

309

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

337

ep93xx_clk_write(priv, clk->reg, val);

drivers/clk/clk-ep93xx.c

353

static int ep93xx_clk_register_ddiv(struct ep93xx_clk *clk,

drivers/clk/clk-ep93xx.c

360

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

369

clk->reg = reg;

drivers/clk/clk-ep93xx.c

370

clk->bit_idx = bit_idx;

drivers/clk/clk-ep93xx.c

371

clk->hw.init = &init;

drivers/clk/clk-ep93xx.c

373

return devm_clk_hw_register(priv->dev, &clk->hw);

drivers/clk/clk-ep93xx.c

379

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

380

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

384

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

385

index = (val & clk->mask) >> clk->shift;

drivers/clk/clk-ep93xx.c

386

if (index >= clk->num_div)

drivers/clk/clk-ep93xx.c

389

return DIV_ROUND_CLOSEST(parent_rate, clk->div[index]);

drivers/clk/clk-ep93xx.c

395

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

399

for (i = 0; i < clk->num_div; i++) {

drivers/clk/clk-ep93xx.c

400

if (req->rate * clk->div[i] == req->best_parent_rate)

drivers/clk/clk-ep93xx.c

403

now = DIV_ROUND_CLOSEST(req->best_parent_rate, clk->div[i]);

drivers/clk/clk-ep93xx.c

416

struct ep93xx_clk *clk = ep93xx_clk_from(hw);

drivers/clk/clk-ep93xx.c

417

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

421

regmap_read(priv->map, clk->reg, &val);

drivers/clk/clk-ep93xx.c

422

val &= ~clk->mask;

drivers/clk/clk-ep93xx.c

423

for (i = 0; i < clk->num_div; i++)

drivers/clk/clk-ep93xx.c

424

if (rate == DIV_ROUND_CLOSEST(parent_rate, clk->div[i]))

drivers/clk/clk-ep93xx.c

427

if (i == clk->num_div)

drivers/clk/clk-ep93xx.c

430

val |= i << clk->shift;

drivers/clk/clk-ep93xx.c

432

ep93xx_clk_write(priv, clk->reg, val);

drivers/clk/clk-ep93xx.c

446

static int ep93xx_register_div(struct ep93xx_clk *clk,

drivers/clk/clk-ep93xx.c

456

struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);

drivers/clk/clk-ep93xx.c

465

clk->reg = reg;

drivers/clk/clk-ep93xx.c

466

clk->bit_idx = enable_bit;

drivers/clk/clk-ep93xx.c

467

clk->mask = GENMASK(shift + width - 1, shift);

drivers/clk/clk-ep93xx.c

468

clk->shift = shift;

drivers/clk/clk-ep93xx.c

469

clk->div = clk_divisors;

drivers/clk/clk-ep93xx.c

470

clk->num_div = num_div;

drivers/clk/clk-ep93xx.c

471

clk->hw.init = &init;

drivers/clk/clk-ep93xx.c

473

return devm_clk_hw_register(priv->dev, &clk->hw);

drivers/clk/clk-ep93xx.c

492

struct ep93xx_clk *clk;

drivers/clk/clk-ep93xx.c

511

clk = &priv->reg[idx];

drivers/clk/clk-ep93xx.c

512

clk->idx = idx;

drivers/clk/clk-ep93xx.c

513

ret = ep93xx_clk_register_gate(clk,

drivers/clk/clk-ep93xx.c

669

struct ep93xx_clk *clk;

drivers/clk/clk-ep93xx.c

741

clk = &priv->reg[idx];

drivers/clk/clk-ep93xx.c

742

clk->idx = idx;

drivers/clk/clk-ep93xx.c

743

ret = ep93xx_register_div(clk, "ep93xx-adc", &xtali,

drivers/clk/clk-ep93xx.c

754

clk = &priv->reg[idx];

drivers/clk/clk-ep93xx.c

755

clk->idx = idx;

drivers/clk/clk-ep93xx.c

756

ret = ep93xx_register_div(clk, "ep93xx-keypad", &xtali,

drivers/clk/clk-ep93xx.c

792

clk = &priv->reg[idx];

drivers/clk/clk-ep93xx.c

793

clk->idx = idx;

drivers/clk/clk-ep93xx.c

794

ret = ep93xx_clk_register_ddiv(clk, "ep93xx-fb",

drivers/clk/clk-ep93xx.c

801

clk = &priv->reg[idx];

drivers/clk/clk-ep93xx.c

802

clk->idx = idx;

drivers/clk/clk-ep93xx.c

803

ret = ep93xx_clk_register_ddiv(clk, "mclk",

drivers/clk/clk-ep93xx.c

810

clk = &priv->reg[idx];

drivers/clk/clk-ep93xx.c

811

clk->idx = idx;

drivers/clk/clk-ep93xx.c

813

ret = ep93xx_register_div(clk, "sclk", &pdata,

drivers/clk/clk-ep93xx.c

823

clk = &priv->reg[idx];

drivers/clk/clk-ep93xx.c

824

clk->idx = idx;

drivers/clk/clk-ep93xx.c

826

ret = ep93xx_register_div(clk, "lrclk", &pdata,

drivers/clk/clk-fixed-factor.c

257

struct clk *clk_register_fixed_factor(struct device *dev, const char *name,

drivers/clk/clk-fixed-factor.c

267

return hw->clk;

drivers/clk/clk-fixed-factor.c

271

void clk_unregister_fixed_factor(struct clk *clk)

drivers/clk/clk-fixed-factor.c

275

hw = __clk_get_hw(clk);

drivers/clk/clk-fixed-factor.c

279

clk_unregister(clk);

drivers/clk/clk-fixed-factor.c

386

struct clk_hw *clk = platform_get_drvdata(pdev);

drivers/clk/clk-fixed-factor.c

389

clk_hw_unregister_fixed_factor(clk);

drivers/clk/clk-fixed-factor.c

394

struct clk_hw *clk;

drivers/clk/clk-fixed-factor.c

400

clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);

drivers/clk/clk-fixed-factor.c

401

if (IS_ERR(clk))

drivers/clk/clk-fixed-factor.c

402

return PTR_ERR(clk);

drivers/clk/clk-fixed-factor.c

404

platform_set_drvdata(pdev, clk);

drivers/clk/clk-fixed-mmio.c

20

struct clk_hw *clk;

drivers/clk/clk-fixed-mmio.c

36

clk = clk_hw_register_fixed_rate(NULL, clk_name, NULL, 0, freq);

drivers/clk/clk-fixed-mmio.c

37

if (IS_ERR(clk)) {

drivers/clk/clk-fixed-mmio.c

39

return clk;

drivers/clk/clk-fixed-mmio.c

42

ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, clk);

drivers/clk/clk-fixed-mmio.c

45

clk_hw_unregister(clk);

drivers/clk/clk-fixed-mmio.c

46

clk = ERR_PTR(ret);

drivers/clk/clk-fixed-mmio.c

49

return clk;

drivers/clk/clk-fixed-mmio.c

63

struct clk_hw *clk;

drivers/clk/clk-fixed-mmio.c

65

clk = fixed_mmio_clk_setup(pdev->dev.of_node);

drivers/clk/clk-fixed-mmio.c

66

if (IS_ERR(clk))

drivers/clk/clk-fixed-mmio.c

67

return PTR_ERR(clk);

drivers/clk/clk-fixed-mmio.c

69

platform_set_drvdata(pdev, clk);

drivers/clk/clk-fixed-mmio.c

76

struct clk_hw *clk = platform_get_drvdata(pdev);

drivers/clk/clk-fixed-mmio.c

79

clk_hw_unregister_fixed_rate(clk);

drivers/clk/clk-fixed-rate.c

121

struct clk *clk_register_fixed_rate(struct device *dev, const char *name,

drivers/clk/clk-fixed-rate.c

131

return hw->clk;

drivers/clk/clk-fixed-rate.c

135

void clk_unregister_fixed_rate(struct clk *clk)

drivers/clk/clk-fixed-rate.c

139

hw = __clk_get_hw(clk);

drivers/clk/clk-fixed-rate.c

143

clk_unregister(clk);

drivers/clk/clk-fixed-rate_test.c

126

struct clk *clk;

drivers/clk/clk-fixed-rate_test.c

133

clk = clk_hw_get_clk_prepared_enabled_kunit(test, hw, __func__);

drivers/clk/clk-fixed-rate_test.c

134

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);

drivers/clk/clk-fixed-rate_test.c

136

KUNIT_EXPECT_EQ(test, fixed_rate, clk_get_rate(clk));

drivers/clk/clk-fixed-rate_test.c

146

struct clk *clk;

drivers/clk/clk-fixed-rate_test.c

155

clk = clk_hw_get_clk_kunit(test, hw, __func__);

drivers/clk/clk-fixed-rate_test.c

156

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);

drivers/clk/clk-fixed-rate_test.c

158

KUNIT_EXPECT_EQ(test, fixed_accuracy, clk_get_accuracy(clk));

drivers/clk/clk-fixed-rate_test.c

179

struct clk *expected_parent, *actual_parent;

drivers/clk/clk-fixed-rate_test.c

180

struct clk *clk;

drivers/clk/clk-fixed-rate_test.c

197

clk = clk_hw_get_clk_kunit(test, hw, __func__);

drivers/clk/clk-fixed-rate_test.c

198

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);

drivers/clk/clk-fixed-rate_test.c

200

actual_parent = clk_get_parent(clk);

drivers/clk/clk-fixed-rate_test.c

210

struct clk *clk;

drivers/clk/clk-fixed-rate_test.c

228

clk = clk_hw_get_clk_prepared_enabled_kunit(test, hw, __func__);

drivers/clk/clk-fixed-rate_test.c

229

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);

drivers/clk/clk-fixed-rate_test.c

231

KUNIT_EXPECT_EQ(test, expected_rate, clk_get_rate(clk));

drivers/clk/clk-fixed-rate_test.c

240

struct clk *clk;

drivers/clk/clk-fixed-rate_test.c

259

clk = clk_hw_get_clk_kunit(test, hw, __func__);

drivers/clk/clk-fixed-rate_test.c

260

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);

drivers/clk/clk-fixed-rate_test.c

262

KUNIT_EXPECT_EQ(test, expected_accuracy, clk_get_accuracy(clk));

drivers/clk/clk-fixed-rate_test.c

300

struct clk *clk;

drivers/clk/clk-fixed-rate_test.c

302

clk = clk_get_kunit(test, dev, NULL);

drivers/clk/clk-fixed-rate_test.c

303

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);

drivers/clk/clk-fixed-rate_test.c

305

KUNIT_ASSERT_EQ(test, 0, clk_prepare_enable_kunit(test, clk));

drivers/clk/clk-fixed-rate_test.c

306

KUNIT_EXPECT_EQ(test, TEST_FIXED_FREQUENCY, clk_get_rate(clk));

drivers/clk/clk-fixed-rate_test.c

317

struct clk *clk;

drivers/clk/clk-fixed-rate_test.c

319

clk = clk_get_kunit(test, dev, NULL);

drivers/clk/clk-fixed-rate_test.c

320

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);

drivers/clk/clk-fixed-rate_test.c

322

KUNIT_EXPECT_EQ(test, TEST_FIXED_ACCURACY, clk_get_accuracy(clk));

drivers/clk/clk-fractional-divider.c

308

struct clk *clk_register_fractional_divider(struct device *dev,

drivers/clk/clk-fractional-divider.c

320

return hw->clk;

drivers/clk/clk-gate.c

185

struct clk *clk_register_gate(struct device *dev, const char *name,

drivers/clk/clk-gate.c

196

return hw->clk;

drivers/clk/clk-gate.c

200

void clk_unregister_gate(struct clk *clk)

drivers/clk/clk-gate.c

205

hw = __clk_get_hw(clk);

drivers/clk/clk-gate.c

211

clk_unregister(clk);

drivers/clk/clk-gate_test.c

164

struct clk *clk = hw->clk;

drivers/clk/clk-gate_test.c

167

KUNIT_ASSERT_EQ(test, clk_prepare_enable(clk), 0);

drivers/clk/clk-gate_test.c

181

struct clk *clk = hw->clk;

drivers/clk/clk-gate_test.c

185

KUNIT_ASSERT_EQ(test, clk_prepare_enable(clk), 0);

drivers/clk/clk-gate_test.c

188

clk_disable_unprepare(clk);

drivers/clk/clk-gate_test.c

244

struct clk *clk = hw->clk;

drivers/clk/clk-gate_test.c

247

KUNIT_ASSERT_EQ(test, clk_prepare_enable(clk), 0);

drivers/clk/clk-gate_test.c

261

struct clk *clk = hw->clk;

drivers/clk/clk-gate_test.c

265

KUNIT_ASSERT_EQ(test, clk_prepare_enable(clk), 0);

drivers/clk/clk-gate_test.c

268

clk_disable_unprepare(clk);

drivers/clk/clk-gate_test.c

317

struct clk *clk = hw->clk;

drivers/clk/clk-gate_test.c

320

KUNIT_ASSERT_EQ(test, clk_prepare_enable(clk), 0);

drivers/clk/clk-gate_test.c

334

struct clk *clk = hw->clk;

drivers/clk/clk-gate_test.c

338

KUNIT_ASSERT_EQ(test, clk_prepare_enable(clk), 0);

drivers/clk/clk-gate_test.c

341

clk_disable_unprepare(clk);

drivers/clk/clk-gpio.c

100

struct clk_gpio *clk = to_clk_gpio(hw);

drivers/clk/clk-gpio.c

102

return gpiod_get_value_cansleep(clk->gpiod);

drivers/clk/clk-gpio.c

121

struct clk_gpio *clk = to_clk_gpio(hw);

drivers/clk/clk-gpio.c

123

return gpiod_get_value_cansleep(clk->gpiod);

drivers/clk/clk-gpio.c

128

struct clk_gpio *clk = to_clk_gpio(hw);

drivers/clk/clk-gpio.c

130

gpiod_set_value_cansleep(clk->gpiod, index);

drivers/clk/clk-gpio.c

276

struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw));

drivers/clk/clk-gpio.c

278

if (!clk->supply)

drivers/clk/clk-gpio.c

281

return regulator_enable(clk->supply);

drivers/clk/clk-gpio.c

286

struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw));

drivers/clk/clk-gpio.c

288

if (!clk->supply)

drivers/clk/clk-gpio.c

291

regulator_disable(clk->supply);

drivers/clk/clk-gpio.c

296

struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw));

drivers/clk/clk-gpio.c

298

if (!clk->supply)

drivers/clk/clk-gpio.c

301

return regulator_is_enabled(clk->supply);

drivers/clk/clk-gpio.c

359

struct clk_gated_fixed *clk;

drivers/clk/clk-gpio.c

365

clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);

drivers/clk/clk-gpio.c

366

if (!clk)

drivers/clk/clk-gpio.c

372

clk->rate = rate;

drivers/clk/clk-gpio.c

378

clk->supply = devm_regulator_get_optional(dev, "vdd");

drivers/clk/clk-gpio.c

379

if (IS_ERR(clk->supply)) {

drivers/clk/clk-gpio.c

380

if (PTR_ERR(clk->supply) != -ENODEV)

drivers/clk/clk-gpio.c

381

return dev_err_probe(dev, PTR_ERR(clk->supply),

drivers/clk/clk-gpio.c

383

clk->supply = NULL;

drivers/clk/clk-gpio.c

386

clk->clk_gpio.gpiod = devm_gpiod_get_optional(dev, "enable",

drivers/clk/clk-gpio.c

388

if (IS_ERR(clk->clk_gpio.gpiod))

drivers/clk/clk-gpio.c

389

return dev_err_probe(dev, PTR_ERR(clk->clk_gpio.gpiod),

drivers/clk/clk-gpio.c

392

if (gpiod_cansleep(clk->clk_gpio.gpiod))

drivers/clk/clk-gpio.c

397

clk->clk_gpio.hw.init = CLK_HW_INIT_NO_PARENT(clk_name, ops, 0);

drivers/clk/clk-gpio.c

400

ret = devm_clk_hw_register(dev, &clk->clk_gpio.hw);

drivers/clk/clk-gpio.c

406

&clk->clk_gpio.hw);

drivers/clk/clk-gpio.c

55

struct clk_gpio *clk = to_clk_gpio(hw);

drivers/clk/clk-gpio.c

57

gpiod_set_value(clk->gpiod, 1);

drivers/clk/clk-gpio.c

64

struct clk_gpio *clk = to_clk_gpio(hw);

drivers/clk/clk-gpio.c

66

gpiod_set_value(clk->gpiod, 0);

drivers/clk/clk-gpio.c

71

struct clk_gpio *clk = to_clk_gpio(hw);

drivers/clk/clk-gpio.c

73

return gpiod_get_value(clk->gpiod);

drivers/clk/clk-gpio.c

84

struct clk_gpio *clk = to_clk_gpio(hw);

drivers/clk/clk-gpio.c

86

gpiod_set_value_cansleep(clk->gpiod, 1);

drivers/clk/clk-gpio.c

93

struct clk_gpio *clk = to_clk_gpio(hw);

drivers/clk/clk-gpio.c

95

gpiod_set_value_cansleep(clk->gpiod, 0);

drivers/clk/clk-hsdk-pll.c

121

static inline void hsdk_pll_write(struct hsdk_pll_clk *clk, u32 reg, u32 val)

drivers/clk/clk-hsdk-pll.c

123

iowrite32(val, clk->regs + reg);

drivers/clk/clk-hsdk-pll.c

126

static inline u32 hsdk_pll_read(struct hsdk_pll_clk *clk, u32 reg)

drivers/clk/clk-hsdk-pll.c

128

return ioread32(clk->regs + reg);

drivers/clk/clk-hsdk-pll.c

131

static inline void hsdk_pll_set_cfg(struct hsdk_pll_clk *clk,

drivers/clk/clk-hsdk-pll.c

137

val = hsdk_pll_read(clk, CGU_PLL_CTRL);

drivers/clk/clk-hsdk-pll.c

147

dev_dbg(clk->dev, "write configuration: %#x\n", val);

drivers/clk/clk-hsdk-pll.c

149

hsdk_pll_write(clk, CGU_PLL_CTRL, val);

drivers/clk/clk-hsdk-pll.c

152

static inline bool hsdk_pll_is_locked(struct hsdk_pll_clk *clk)

drivers/clk/clk-hsdk-pll.c

154

return !!(hsdk_pll_read(clk, CGU_PLL_STATUS) & CGU_PLL_STATUS_LOCK);

drivers/clk/clk-hsdk-pll.c

157

static inline bool hsdk_pll_is_err(struct hsdk_pll_clk *clk)

drivers/clk/clk-hsdk-pll.c

159

return !!(hsdk_pll_read(clk, CGU_PLL_STATUS) & CGU_PLL_STATUS_ERR);

drivers/clk/clk-hsdk-pll.c

173

struct hsdk_pll_clk *clk = to_hsdk_pll_clk(hw);

drivers/clk/clk-hsdk-pll.c

175

val = hsdk_pll_read(clk, CGU_PLL_CTRL);

drivers/clk/clk-hsdk-pll.c

177

dev_dbg(clk->dev, "current configuration: %#x\n", val);

drivers/clk/clk-hsdk-pll.c

205

struct hsdk_pll_clk *clk = to_hsdk_pll_clk(hw);

drivers/clk/clk-hsdk-pll.c

206

const struct hsdk_pll_cfg *pll_cfg = clk->pll_devdata->pll_cfg;

drivers/clk/clk-hsdk-pll.c

218

dev_dbg(clk->dev, "chosen best rate: %lu\n", best_rate);

drivers/clk/clk-hsdk-pll.c

225

static int hsdk_pll_comm_update_rate(struct hsdk_pll_clk *clk,

drivers/clk/clk-hsdk-pll.c

229

hsdk_pll_set_cfg(clk, cfg);

drivers/clk/clk-hsdk-pll.c

236

if (!hsdk_pll_is_locked(clk))

drivers/clk/clk-hsdk-pll.c

239

if (hsdk_pll_is_err(clk))

drivers/clk/clk-hsdk-pll.c

245

static int hsdk_pll_core_update_rate(struct hsdk_pll_clk *clk,

drivers/clk/clk-hsdk-pll.c

254

iowrite32(CREG_CORE_IF_CLK_DIV_2, clk->spec_regs);

drivers/clk/clk-hsdk-pll.c

256

hsdk_pll_set_cfg(clk, cfg);

drivers/clk/clk-hsdk-pll.c

263

if (!hsdk_pll_is_locked(clk))

drivers/clk/clk-hsdk-pll.c

266

if (hsdk_pll_is_err(clk))

drivers/clk/clk-hsdk-pll.c

274

iowrite32(CREG_CORE_IF_CLK_DIV_1, clk->spec_regs);

drivers/clk/clk-hsdk-pll.c

283

struct hsdk_pll_clk *clk = to_hsdk_pll_clk(hw);

drivers/clk/clk-hsdk-pll.c

284

const struct hsdk_pll_cfg *pll_cfg = clk->pll_devdata->pll_cfg;

drivers/clk/clk-hsdk-pll.c

288

return clk->pll_devdata->update_rate(clk, rate,

drivers/clk/clk-hsdk-pll.c

293

dev_err(clk->dev, "invalid rate=%ld, parent_rate=%ld\n", rate,

drivers/clk/clk-hsdk-pll.c

97

int (*update_rate)(struct hsdk_pll_clk *clk, unsigned long rate,

drivers/clk/clk-lmk04832.c

1521

ret = clk_set_rate(lmk->vco.clk, lmk->vco_rate);

drivers/clk/clk-lmk04832.c

260

struct clk *oscin;

drivers/clk/clk-loongson2.c

285

struct loongson2_clk_data *clk = to_loongson2_clk(hw);

drivers/clk/clk-loongson2.c

287

val = readq(clk->reg);

drivers/clk/clk-loongson2.c

288

mult = loongson2_rate_part(val, clk->mult_shift, clk->mult_width);

drivers/clk/clk-loongson2.c

289

div = loongson2_rate_part(val, clk->div_shift, clk->div_width);

drivers/clk/clk-loongson2.c

303

struct loongson2_clk_data *clk = to_loongson2_clk(hw);

drivers/clk/clk-loongson2.c

305

val = readq(clk->reg);

drivers/clk/clk-loongson2.c

306

scale = loongson2_rate_part(val, clk->div_shift, clk->div_width) + 1;

drivers/clk/clk-loongson2.c

308

if (clk->bit_idx)

drivers/clk/clk-loongson2.c

309

mode = val & BIT(clk->bit_idx - 1);

drivers/clk/clk-loongson2.c

326

struct loongson2_clk_data *clk;

drivers/clk/clk-loongson2.c

329

clk = devm_kzalloc(clp->dev, sizeof(*clk), GFP_KERNEL);

drivers/clk/clk-loongson2.c

330

if (!clk)

drivers/clk/clk-loongson2.c

339

clk->reg = clp->base + cld->reg_offset;

drivers/clk/clk-loongson2.c

340

clk->div_shift = cld->div_shift;

drivers/clk/clk-loongson2.c

341

clk->div_width = cld->div_width;

drivers/clk/clk-loongson2.c

342

clk->mult_shift = cld->mult_shift;

drivers/clk/clk-loongson2.c

343

clk->mult_width = cld->mult_width;

drivers/clk/clk-loongson2.c

344

clk->bit_idx = cld->bit_idx;

drivers/clk/clk-loongson2.c

345

clk->hw.init = &init;

drivers/clk/clk-loongson2.c

347

hw = &clk->hw;

drivers/clk/clk-loongson2.c

350

clk = ERR_PTR(ret);

drivers/clk/clk-max9485.c

78

struct clk *xclk;

drivers/clk/clk-moxart.c

20

struct clk *ref_clk;

drivers/clk/clk-moxart.c

59

struct clk *pll_clk;

drivers/clk/clk-mux.c

244

struct clk *clk_register_mux_table(struct device *dev, const char *name,

drivers/clk/clk-mux.c

256

return hw->clk;

drivers/clk/clk-mux.c

260

void clk_unregister_mux(struct clk *clk)

drivers/clk/clk-mux.c

265

hw = __clk_get_hw(clk);

drivers/clk/clk-mux.c

271

clk_unregister(clk);

drivers/clk/clk-nspire.c

41

static void nspire_clkinfo_cx(u32 val, struct nspire_clk_info *clk)

drivers/clk/clk-nspire.c

44

clk->base_clock = 48 * MHZ;

drivers/clk/clk-nspire.c

46

clk->base_clock = 6 * EXTRACT(val, CX_BASE) * MHZ;

drivers/clk/clk-nspire.c

48

clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * EXTRACT(val, CX_UNKNOWN);

drivers/clk/clk-nspire.c

49

clk->base_ahb_ratio = clk->base_cpu_ratio * (EXTRACT(val, CPU_AHB) + 1);

drivers/clk/clk-nspire.c

52

static void nspire_clkinfo_classic(u32 val, struct nspire_clk_info *clk)

drivers/clk/clk-nspire.c

55

clk->base_clock = 27 * MHZ;

drivers/clk/clk-nspire.c

57

clk->base_clock = (300 - 6 * EXTRACT(val, CLASSIC_BASE)) * MHZ;

drivers/clk/clk-nspire.c

59

clk->base_cpu_ratio = EXTRACT(val, BASE_CPU) * 2;

drivers/clk/clk-nspire.c

60

clk->base_ahb_ratio = clk->base_cpu_ratio * (EXTRACT(val, CPU_AHB) + 1);

drivers/clk/clk-palmas.c

211

ret = clk_prepare(cinfo->hw.clk);

drivers/clk/clk-palmas.c

223

clk_unprepare(cinfo->hw.clk);

drivers/clk/clk-qoriq.c

1004

max_rate = clk_get_rate(div->clk);

drivers/clk/clk-qoriq.c

1008

plat_rate = clk_get_rate(cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk);

drivers/clk/clk-qoriq.c

1019

static struct clk * __init create_one_hwaccel(struct clockgen *cg, int idx)

drivers/clk/clk-qoriq.c

1077

struct clk *clk;

drivers/clk/clk-qoriq.c

1087

clk = clockgen.cmux[idx];

drivers/clk/clk-qoriq.c

1089

rc = of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/clk-qoriq.c

1097

static struct clk __init

drivers/clk/clk-qoriq.c

1108

static struct clk __init *input_clock(const char *name, struct clk *clk)

drivers/clk/clk-qoriq.c

1113

input_name = __clk_get_name(clk);

drivers/clk/clk-qoriq.c

1114

clk = clk_register_fixed_factor(NULL, name, input_name,

drivers/clk/clk-qoriq.c

1116

if (IS_ERR(clk))

drivers/clk/clk-qoriq.c

1118

PTR_ERR(clk));

drivers/clk/clk-qoriq.c

1120

return clk;

drivers/clk/clk-qoriq.c

1123

static struct clk __init *input_clock_by_name(const char *name,

drivers/clk/clk-qoriq.c

1126

struct clk *clk;

drivers/clk/clk-qoriq.c

1128

clk = of_clk_get_by_name(clockgen.node, dtname);

drivers/clk/clk-qoriq.c

1129

if (IS_ERR(clk))

drivers/clk/clk-qoriq.c

1130

return clk;

drivers/clk/clk-qoriq.c

1132

return input_clock(name, clk);

drivers/clk/clk-qoriq.c

1135

static struct clk __init *input_clock_by_index(const char *name, int idx)

drivers/clk/clk-qoriq.c

1137

struct clk *clk;

drivers/clk/clk-qoriq.c

1139

clk = of_clk_get(clockgen.node, 0);

drivers/clk/clk-qoriq.c

1140

if (IS_ERR(clk))

drivers/clk/clk-qoriq.c

1141

return clk;

drivers/clk/clk-qoriq.c

1143

return input_clock(name, clk);

drivers/clk/clk-qoriq.c

1146

static struct clk * __init create_sysclk(const char *name)

drivers/clk/clk-qoriq.c

1149

struct clk *clk;

drivers/clk/clk-qoriq.c

1151

clk = sysclk_from_fixed(clockgen.node, name);

drivers/clk/clk-qoriq.c

1152

if (!IS_ERR(clk))

drivers/clk/clk-qoriq.c

1153

return clk;

drivers/clk/clk-qoriq.c

1155

clk = input_clock_by_name(name, "sysclk");

drivers/clk/clk-qoriq.c

1156

if (!IS_ERR(clk))

drivers/clk/clk-qoriq.c

1157

return clk;

drivers/clk/clk-qoriq.c

1159

clk = input_clock_by_index(name, 0);

drivers/clk/clk-qoriq.c

1160

if (!IS_ERR(clk))

drivers/clk/clk-qoriq.c

1161

return clk;

drivers/clk/clk-qoriq.c

1165

clk = sysclk_from_fixed(sysclk, name);

drivers/clk/clk-qoriq.c

1167

if (!IS_ERR(clk))

drivers/clk/clk-qoriq.c

1168

return clk;

drivers/clk/clk-qoriq.c

1175

static struct clk * __init create_coreclk(const char *name)

drivers/clk/clk-qoriq.c

1177

struct clk *clk;

drivers/clk/clk-qoriq.c

1179

clk = input_clock_by_name(name, "coreclk");

drivers/clk/clk-qoriq.c

1180

if (!IS_ERR(clk))

drivers/clk/clk-qoriq.c

1181

return clk;

drivers/clk/clk-qoriq.c

1189

if (WARN_ON(PTR_ERR(clk) == -EPROBE_DEFER))

drivers/clk/clk-qoriq.c

1190

return clk;

drivers/clk/clk-qoriq.c

1198

struct clk *clk;

drivers/clk/clk-qoriq.c

1202

clk = clockgen.sysclk;

drivers/clk/clk-qoriq.c

1203

if (clk)

drivers/clk/clk-qoriq.c

1204

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/clk-qoriq.c

1271

struct clk *clk;

drivers/clk/clk-qoriq.c

1284

clk = clk_register_fixed_factor(NULL,

drivers/clk/clk-qoriq.c

1286

if (IS_ERR(clk)) {

drivers/clk/clk-qoriq.c

1288

__func__, pll->div[i].name, PTR_ERR(clk));

drivers/clk/clk-qoriq.c

1292

pll->div[i].clk = clk;

drivers/clk/clk-qoriq.c

1293

ret = clk_register_clkdev(clk, pll->div[i].name, NULL);

drivers/clk/clk-qoriq.c

1313

struct clk **subclks;

drivers/clk/clk-qoriq.c

1322

subclks = kzalloc_objs(struct clk *, 4);

drivers/clk/clk-qoriq.c

1331

subclks[0] = pll->div[0].clk;

drivers/clk/clk-qoriq.c

1332

subclks[1] = pll->div[1].clk;

drivers/clk/clk-qoriq.c

1333

subclks[2] = pll->div[3].clk;

drivers/clk/clk-qoriq.c

1335

subclks[0] = pll->div[0].clk;

drivers/clk/clk-qoriq.c

1336

subclks[1] = pll->div[1].clk;

drivers/clk/clk-qoriq.c

1337

subclks[2] = pll->div[2].clk;

drivers/clk/clk-qoriq.c

1338

subclks[3] = pll->div[3].clk;

drivers/clk/clk-qoriq.c

1385

static struct clk *clockgen_clk_get(struct of_phandle_args *clkspec, void *data)

drivers/clk/clk-qoriq.c

1388

struct clk *clk;

drivers/clk/clk-qoriq.c

1404

clk = cg->sysclk;

drivers/clk/clk-qoriq.c

1409

clk = cg->cmux[idx];

drivers/clk/clk-qoriq.c

1414

clk = cg->hwaccel[idx];

drivers/clk/clk-qoriq.c

1419

clk = cg->fman[idx];

drivers/clk/clk-qoriq.c

1425

clk = pll->div[idx].clk;

drivers/clk/clk-qoriq.c

1430

clk = cg->coreclk;

drivers/clk/clk-qoriq.c

1431

if (IS_ERR(clk))

drivers/clk/clk-qoriq.c

1432

clk = NULL;

drivers/clk/clk-qoriq.c

1438

if (!clk)

drivers/clk/clk-qoriq.c

1440

return clk;

drivers/clk/clk-qoriq.c

40

struct clk *clk;

drivers/clk/clk-qoriq.c

477

cg->fman[0] = cg->pll[CGA_PLL2].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

479

cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

489

cg->fman[0] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

491

cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

494

cg->fman[1] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

496

cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

509

cg->fman[0] = cg->pll[CGA_PLL2].div[div].clk;

drivers/clk/clk-qoriq.c

511

cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

524

cg->fman[0] = cg->pll[CGA_PLL3].div[div].clk;

drivers/clk/clk-qoriq.c

526

cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

529

cg->fman[1] = cg->pll[CGA_PLL3].div[div].clk;

drivers/clk/clk-qoriq.c

531

cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;

drivers/clk/clk-qoriq.c

541

cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk;

drivers/clk/clk-qoriq.c

910

static struct clk * __init create_mux_common(struct clockgen *cg,

drivers/clk/clk-qoriq.c

919

struct clk *clk;

drivers/clk/clk-qoriq.c

92

struct clk *sysclk, *coreclk;

drivers/clk/clk-qoriq.c

936

rate = clk_get_rate(div->clk);

drivers/clk/clk-qoriq.c

94

struct clk *cmux[NUM_CMUX];

drivers/clk/clk-qoriq.c

95

struct clk *hwaccel[NUM_HWACCEL];

drivers/clk/clk-qoriq.c

96

struct clk *fman[2];

drivers/clk/clk-qoriq.c

960

clk = clk_register(NULL, &hwc->hw);

drivers/clk/clk-qoriq.c

961

if (IS_ERR(clk)) {

drivers/clk/clk-qoriq.c

963

PTR_ERR(clk));

drivers/clk/clk-qoriq.c

968

return clk;

drivers/clk/clk-qoriq.c

971

static struct clk * __init create_one_cmux(struct clockgen *cg, int idx)

drivers/clk/clk-rpmi.c

21

#define to_rpmi_clk(clk) container_of(clk, struct rpmi_clk, hw)

drivers/clk/clk-s2mps11.c

177

s2mps11_clks[i].clk = devm_clk_register(&pdev->dev,

drivers/clk/clk-s2mps11.c

179

if (IS_ERR(s2mps11_clks[i].clk)) {

drivers/clk/clk-s2mps11.c

182

ret = PTR_ERR(s2mps11_clks[i].clk);

drivers/clk/clk-s2mps11.c

27

struct clk *clk;

drivers/clk/clk-scmi.c

103

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

105

return scmi_proto_clk_ops->parent_set(clk->ph, clk->id, parent_index);

drivers/clk/clk-scmi.c

110

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

114

ret = scmi_proto_clk_ops->parent_get(clk->ph, clk->id, &parent_id);

drivers/clk/clk-scmi.c

118

for (p_idx = 0; p_idx < clk->info->num_parents; p_idx++) {

drivers/clk/clk-scmi.c

119

if (clk->parent_data[p_idx].index == parent_id)

drivers/clk/clk-scmi.c

123

if (p_idx == clk->info->num_parents)

drivers/clk/clk-scmi.c

131

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

133

return scmi_proto_clk_ops->enable(clk->ph, clk->id, NOT_ATOMIC);

drivers/clk/clk-scmi.c

138

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

140

scmi_proto_clk_ops->disable(clk->ph, clk->id, NOT_ATOMIC);

drivers/clk/clk-scmi.c

145

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

147

return scmi_proto_clk_ops->enable(clk->ph, clk->id, ATOMIC);

drivers/clk/clk-scmi.c

152

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

154

scmi_proto_clk_ops->disable(clk->ph, clk->id, ATOMIC);

drivers/clk/clk-scmi.c

161

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

163

ret = scmi_proto_clk_ops->state_get(clk->ph, clk->id, &enabled, atomic);

drivers/clk/clk-scmi.c

165

dev_warn(clk->dev,

drivers/clk/clk-scmi.c

166

"Failed to get state for clock ID %d\n", clk->id);

drivers/clk/clk-scmi.c

185

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

187

ret = scmi_proto_clk_ops->config_oem_get(clk->ph, clk->id,

drivers/clk/clk-scmi.c

194

dev_warn(clk->dev,

drivers/clk/clk-scmi.c

195

"Failed to get duty cycle for clock ID %d\n", clk->id);

drivers/clk/clk-scmi.c

205

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

209

ret = scmi_proto_clk_ops->config_oem_set(clk->ph, clk->id,

drivers/clk/clk-scmi.c

213

dev_warn(clk->dev,

drivers/clk/clk-scmi.c

215

duty->num, duty->den, clk->id);

drivers/clk/clk-scmi.c

42

#define to_scmi_clk(clk) container_of(clk, struct scmi_clk, hw)

drivers/clk/clk-scmi.c

49

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

51

ret = scmi_proto_clk_ops->rate_get(clk->ph, clk->id, &rate);

drivers/clk/clk-scmi.c

61

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

69

if (clk->info->rate_discrete)

drivers/clk/clk-scmi.c

72

fmin = clk->info->range.min_rate;

drivers/clk/clk-scmi.c

73

fmax = clk->info->range.max_rate;

drivers/clk/clk-scmi.c

85

ftmp += clk->info->range.step_size - 1; /* to round up */

drivers/clk/clk-scmi.c

86

do_div(ftmp, clk->info->range.step_size);

drivers/clk/clk-scmi.c

88

req->rate = ftmp * clk->info->range.step_size + fmin;

drivers/clk/clk-scmi.c

96

struct scmi_clk *clk = to_scmi_clk(hw);

drivers/clk/clk-scmi.c

98

return scmi_proto_clk_ops->rate_set(clk->ph, clk->id, rate);

drivers/clk/clk-scpi.c

100

req->rate = __scpi_dvfs_round_rate(clk, req->rate);

drivers/clk/clk-scpi.c

105

static int __scpi_find_dvfs_index(struct scpi_clk *clk, unsigned long rate)

drivers/clk/clk-scpi.c

107

int idx, max_opp = clk->info->count;

drivers/clk/clk-scpi.c

108

const struct scpi_opp *opp = clk->info->opps;

drivers/clk/clk-scpi.c

119

struct scpi_clk *clk = to_scpi_clk(hw);

drivers/clk/clk-scpi.c

120

int ret = __scpi_find_dvfs_index(clk, rate);

drivers/clk/clk-scpi.c

124

return clk->scpi_ops->dvfs_set_idx(clk->id, (u8)ret);

drivers/clk/clk-scpi.c

172

struct scpi_clk **clk;

drivers/clk/clk-scpi.c

184

sclk = clk_data->clk[count];

drivers/clk/clk-scpi.c

209

clk_data->clk = devm_kcalloc(dev, count, sizeof(*clk_data->clk),

drivers/clk/clk-scpi.c

211

if (!clk_data->clk)

drivers/clk/clk-scpi.c

23

#define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw)

drivers/clk/clk-scpi.c

244

clk_data->clk[idx] = sclk;

drivers/clk/clk-scpi.c

30

struct scpi_clk *clk = to_scpi_clk(hw);

drivers/clk/clk-scpi.c

32

return clk->scpi_ops->clk_get_val(clk->id);

drivers/clk/clk-scpi.c

50

struct scpi_clk *clk = to_scpi_clk(hw);

drivers/clk/clk-scpi.c

52

return clk->scpi_ops->clk_set_val(clk->id, rate);

drivers/clk/clk-scpi.c

62

static long __scpi_dvfs_round_rate(struct scpi_clk *clk, unsigned long rate)

drivers/clk/clk-scpi.c

66

const struct scpi_opp *opp = clk->info->opps;

drivers/clk/clk-scpi.c

68

for (idx = 0; idx < clk->info->count; idx++, opp++) {

drivers/clk/clk-scpi.c

84

struct scpi_clk *clk = to_scpi_clk(hw);

drivers/clk/clk-scpi.c

85

int idx = clk->scpi_ops->dvfs_get_idx(clk->id);

drivers/clk/clk-scpi.c

91

opp = clk->info->opps + idx;

drivers/clk/clk-scpi.c

98

struct scpi_clk *clk = to_scpi_clk(hw);

drivers/clk/clk-si521xx.c

256

struct si_clk *clk)

drivers/clk/clk-si521xx.c

266

clk->reg = SI521XX_REG_OE(oe);

drivers/clk/clk-si521xx.c

267

clk->bit = 7 - b;

drivers/clk/clk-si5341.c

1355

if (data->clk[num].vddo_reg) {

drivers/clk/clk-si5341.c

1356

int vdd = regulator_get_voltage(data->clk[num].vddo_reg);

drivers/clk/clk-si5341.c

1561

struct clk *input;

drivers/clk/clk-si5341.c

1597

data->clk[i].vddo_reg = devm_regulator_get_optional(

drivers/clk/clk-si5341.c

1599

if (IS_ERR(data->clk[i].vddo_reg)) {

drivers/clk/clk-si5341.c

1600

err = PTR_ERR(data->clk[i].vddo_reg);

drivers/clk/clk-si5341.c

1601

data->clk[i].vddo_reg = NULL;

drivers/clk/clk-si5341.c

1606

err = regulator_enable(data->clk[i].vddo_reg);

drivers/clk/clk-si5341.c

1611

data->clk[i].vddo_reg = NULL;

drivers/clk/clk-si5341.c

1734

data->clk[i].index = i;

drivers/clk/clk-si5341.c

1735

data->clk[i].data = data;

drivers/clk/clk-si5341.c

1736

data->clk[i].hw.init = &init;

drivers/clk/clk-si5341.c

1739

SI5341_OUT_FORMAT(&data->clk[i]),

drivers/clk/clk-si5341.c

1742

SI5341_OUT_CM(&data->clk[i]),

drivers/clk/clk-si5341.c

1745

SI5341_OUT_MUX_SEL(&data->clk[i]),

drivers/clk/clk-si5341.c

1749

err = devm_clk_hw_register(&client->dev, &data->clk[i].hw);

drivers/clk/clk-si5341.c

1757

clk_prepare(data->clk[i].hw.clk);

drivers/clk/clk-si5341.c

1807

if (data->clk[i].vddo_reg)

drivers/clk/clk-si5341.c

1808

regulator_disable(data->clk[i].vddo_reg);

drivers/clk/clk-si5341.c

1822

if (data->clk[i].vddo_reg)

drivers/clk/clk-si5341.c

1823

regulator_disable(data->clk[i].vddo_reg);

drivers/clk/clk-si5341.c

74

struct clk_si5341_output clk[SI5341_MAX_NUM_OUTPUTS];

drivers/clk/clk-si5341.c

75

struct clk *input_clk[SI5341_NUM_INPUTS];

drivers/clk/clk-si5341.c

979

return &data->clk[idx].hw;

drivers/clk/clk-si5351.c

1692

ret = clk_set_rate(drvdata->clkout[n].hw.clk,

drivers/clk/clk-si5351.c

54

struct clk *pxtal;

drivers/clk/clk-si5351.c

57

struct clk *pclkin;

drivers/clk/clk-si570.c

484

err = clk_set_rate(data->hw.clk, initial_fout);

drivers/clk/clk-sp7021.c

140

static long plltv_integer_div(struct sp_pll *clk, unsigned long freq)

drivers/clk/clk-sp7021.c

172

clk->p[SEL_FRA] = 0;

drivers/clk/clk-sp7021.c

173

clk->p[DIVR] = r;

drivers/clk/clk-sp7021.c

174

clk->p[DIVN] = n;

drivers/clk/clk-sp7021.c

175

clk->p[DIVM] = m_table[m];

drivers/clk/clk-sp7021.c

181

__func__, clk_hw_get_name(&clk->hw), freq);

drivers/clk/clk-sp7021.c

208

static long plltv_fractional_div(struct sp_pll *clk, unsigned long freq)

drivers/clk/clk-sp7021.c

272

clk->p[SEL_FRA] = 1;

drivers/clk/clk-sp7021.c

273

clk->p[SDM_MOD] = sdm;

drivers/clk/clk-sp7021.c

274

clk->p[PH_SEL] = ph;

drivers/clk/clk-sp7021.c

275

clk->p[NFRA] = nfra;

drivers/clk/clk-sp7021.c

276

clk->p[DIVR] = r;

drivers/clk/clk-sp7021.c

277

clk->p[DIVM] = m;

drivers/clk/clk-sp7021.c

289

__func__, clk_hw_get_name(&clk->hw), freq);

drivers/clk/clk-sp7021.c

296

static long plltv_div(struct sp_pll *clk, unsigned long freq)

drivers/clk/clk-sp7021.c

299

return plltv_fractional_div(clk, freq);

drivers/clk/clk-sp7021.c

301

return plltv_integer_div(clk, freq);

drivers/clk/clk-sp7021.c

304

static int plltv_set_rate(struct sp_pll *clk)

drivers/clk/clk-sp7021.c

309

r0 = BIT(clk->bp_bit + 16);

drivers/clk/clk-sp7021.c

310

r0 |= FIELD_PREP_WM16(MASK_SEL_FRA, clk->p[SEL_FRA]);

drivers/clk/clk-sp7021.c

311

r0 |= FIELD_PREP_WM16(MASK_SDM_MOD, clk->p[SDM_MOD]);

drivers/clk/clk-sp7021.c

312

r0 |= FIELD_PREP_WM16(MASK_PH_SEL, clk->p[PH_SEL]);

drivers/clk/clk-sp7021.c

313

r0 |= FIELD_PREP_WM16(MASK_NFRA, clk->p[NFRA]);

drivers/clk/clk-sp7021.c

315

r1 = FIELD_PREP_WM16(MASK_DIVR, clk->p[DIVR]);

drivers/clk/clk-sp7021.c

317

r2 = FIELD_PREP_WM16(MASK_DIVN, clk->p[DIVN] - 1);

drivers/clk/clk-sp7021.c

318

r2 |= FIELD_PREP_WM16(MASK_DIVM, clk->p[DIVM] - 1);

drivers/clk/clk-sp7021.c

320

spin_lock_irqsave(&clk->lock, flags);

drivers/clk/clk-sp7021.c

321

writel(r0, clk->reg);

drivers/clk/clk-sp7021.c

322

writel(r1, clk->reg + 4);

drivers/clk/clk-sp7021.c

323

writel(r2, clk->reg + 8);

drivers/clk/clk-sp7021.c

324

spin_unlock_irqrestore(&clk->lock, flags);

drivers/clk/clk-sp7021.c

368

static int plla_set_rate(struct sp_pll *clk)

drivers/clk/clk-sp7021.c

370

const u32 *pp = pa[clk->p[0]].regs;

drivers/clk/clk-sp7021.c

374

spin_lock_irqsave(&clk->lock, flags);

drivers/clk/clk-sp7021.c

376

writel(0xffff0000 | pp[i], clk->reg + (i * 4));

drivers/clk/clk-sp7021.c

377

spin_unlock_irqrestore(&clk->lock, flags);

drivers/clk/clk-sp7021.c

382

static long plla_round_rate(struct sp_pll *clk, unsigned long rate)

drivers/clk/clk-sp7021.c

390

clk->p[0] = i;

drivers/clk/clk-sp7021.c

397

static long sp_pll_calc_div(struct sp_pll *clk, unsigned long rate)

drivers/clk/clk-sp7021.c

400

u32 max = 1 << clk->div_width;

drivers/clk/clk-sp7021.c

402

fbdiv = DIV_ROUND_CLOSEST(rate, clk->brate);

drivers/clk/clk-sp7021.c

412

struct sp_pll *clk = to_sp_pll(hw);

drivers/clk/clk-sp7021.c

417

} else if (clk->div_width == DIV_A) {

drivers/clk/clk-sp7021.c

418

ret = plla_round_rate(clk, req->rate);

drivers/clk/clk-sp7021.c

419

} else if (clk->div_width == DIV_TV) {

drivers/clk/clk-sp7021.c

420

ret = plltv_div(clk, req->rate);

drivers/clk/clk-sp7021.c

424

ret = sp_pll_calc_div(clk, req->rate) * clk->brate;

drivers/clk/clk-sp7021.c

435

struct sp_pll *clk = to_sp_pll(hw);

drivers/clk/clk-sp7021.c

436

u32 reg = readl(clk->reg);

drivers/clk/clk-sp7021.c

439

if (reg & BIT(clk->bp_bit)) {

drivers/clk/clk-sp7021.c

441

} else if (clk->div_width == DIV_A) {

drivers/clk/clk-sp7021.c

442

ret = pa[clk->p[0]].rate;

drivers/clk/clk-sp7021.c

443

} else if (clk->div_width == DIV_TV) {

drivers/clk/clk-sp7021.c

446

r = FIELD_GET(MASK_DIVR, readl(clk->reg + 4));

drivers/clk/clk-sp7021.c

447

reg2 = readl(clk->reg + 8);

drivers/clk/clk-sp7021.c

469

u32 fbdiv = ((reg >> clk->div_shift) & ((1 << clk->div_width) - 1)) + 1;

drivers/clk/clk-sp7021.c

471

ret = clk->brate * fbdiv;

drivers/clk/clk-sp7021.c

480

struct sp_pll *clk = to_sp_pll(hw);

drivers/clk/clk-sp7021.c

484

reg = BIT(clk->bp_bit + 16); /* HIWORD_MASK */

drivers/clk/clk-sp7021.c

487

reg |= BIT(clk->bp_bit); /* bypass */

drivers/clk/clk-sp7021.c

488

} else if (clk->div_width == DIV_A) {

drivers/clk/clk-sp7021.c

489

return plla_set_rate(clk);

drivers/clk/clk-sp7021.c

490

} else if (clk->div_width == DIV_TV) {

drivers/clk/clk-sp7021.c

491

return plltv_set_rate(clk);

drivers/clk/clk-sp7021.c

492

} else if (clk->div_width) {

drivers/clk/clk-sp7021.c

493

u32 fbdiv = sp_pll_calc_div(clk, rate);

drivers/clk/clk-sp7021.c

494

u32 mask = GENMASK(clk->div_shift + clk->div_width - 1, clk->div_shift);

drivers/clk/clk-sp7021.c

497

reg |= ((fbdiv - 1) << clk->div_shift) & mask;

drivers/clk/clk-sp7021.c

500

spin_lock_irqsave(&clk->lock, flags);

drivers/clk/clk-sp7021.c

501

writel(reg, clk->reg);

drivers/clk/clk-sp7021.c

502

spin_unlock_irqrestore(&clk->lock, flags);

drivers/clk/clk-sp7021.c

509

struct sp_pll *clk = to_sp_pll(hw);

drivers/clk/clk-sp7021.c

511

writel(BIT(clk->pd_bit + 16) | BIT(clk->pd_bit), clk->reg);

drivers/clk/clk-sp7021.c

518

struct sp_pll *clk = to_sp_pll(hw);

drivers/clk/clk-sp7021.c

520

writel(BIT(clk->pd_bit + 16), clk->reg);

drivers/clk/clk-sp7021.c

525

struct sp_pll *clk = to_sp_pll(hw);

drivers/clk/clk-sp7021.c

527

return readl(clk->reg) & BIT(clk->pd_bit);

drivers/clk/clk-stm32f4.c

484

static struct clk *clk_register_apb_mul(struct device *dev, const char *name,

drivers/clk/clk-stm32f4.c

490

struct clk *clk;

drivers/clk/clk-stm32f4.c

505

clk = clk_register(dev, &am->hw);

drivers/clk/clk-stm32f4.c

507

if (IS_ERR(clk))

drivers/clk/clk-stm32f4.c

510

return clk;

drivers/clk/clk-versaclock5.c

190

struct clk *pin_xin;

drivers/clk/clk-versaclock5.c

191

struct clk *pin_clkin;

drivers/clk/clk-versaclock7.c

1138

vc7->clk_apll.clk = clk_register_fixed_rate(&client->dev, apll_name,

drivers/clk/clk-versaclock7.c

1142

if (IS_ERR(vc7->clk_apll.clk)) {

drivers/clk/clk-versaclock7.c

1143

return dev_err_probe(&client->dev, PTR_ERR(vc7->clk_apll.clk),

drivers/clk/clk-versaclock7.c

1153

parent_names[0] = __clk_get_name(vc7->clk_apll.clk);

drivers/clk/clk-versaclock7.c

1170

parent_names[0] = __clk_get_name(vc7->clk_apll.clk);

drivers/clk/clk-versaclock7.c

123

struct clk *clk;

drivers/clk/clk-versaclock7.c

1240

clk_unregister_fixed_rate(vc7->clk_apll.clk);

drivers/clk/clk-versaclock7.c

1249

clk_unregister_fixed_rate(vc7->clk_apll.clk);

drivers/clk/clk-versaclock7.c

159

struct clk *pin_xin;

drivers/clk/clk-xgene.c

124

static struct clk *xgene_register_clk_pll(struct device *dev,

drivers/clk/clk-xgene.c

130

struct clk *clk;

drivers/clk/clk-xgene.c

152

clk = clk_register(dev, &apmclk->hw);

drivers/clk/clk-xgene.c

153

if (IS_ERR(clk)) {

drivers/clk/clk-xgene.c

158

return clk;

drivers/clk/clk-xgene.c

173

struct clk *clk;

drivers/clk/clk-xgene.c

183

clk = xgene_register_clk_pll(NULL,

drivers/clk/clk-xgene.c

187

if (!IS_ERR(clk)) {

drivers/clk/clk-xgene.c

188

of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/clk-xgene.c

189

clk_register_clkdev(clk, clk_name, NULL);

drivers/clk/clk-xgene.c

345

static struct clk *

drivers/clk/clk-xgene.c

353

struct clk *clk;

drivers/clk/clk-xgene.c

373

clk = clk_register(dev, &fd->hw);

drivers/clk/clk-xgene.c

374

if (IS_ERR(clk)) {

drivers/clk/clk-xgene.c

380

return clk;

drivers/clk/clk-xgene.c

388

struct clk *clk;

drivers/clk/clk-xgene.c

413

clk = xgene_register_clk_pmd(NULL, clk_name,

drivers/clk/clk-xgene.c

418

if (!IS_ERR(clk)) {

drivers/clk/clk-xgene.c

419

of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/clk-xgene.c

420

clk_register_clkdev(clk, clk_name, NULL);

drivers/clk/clk-xgene.c

631

static struct clk *xgene_register_clk(struct device *dev,

drivers/clk/clk-xgene.c

636

struct clk *clk;

drivers/clk/clk-xgene.c

656

clk = clk_register(dev, &apmclk->hw);

drivers/clk/clk-xgene.c

657

if (IS_ERR(clk)) {

drivers/clk/clk-xgene.c

660

return clk;

drivers/clk/clk-xgene.c

664

rc = clk_register_clkdev(clk, name, NULL);

drivers/clk/clk-xgene.c

669

return clk;

drivers/clk/clk-xgene.c

675

struct clk *clk;

drivers/clk/clk-xgene.c

728

clk = xgene_register_clk(NULL, clk_name,

drivers/clk/clk-xgene.c

730

if (IS_ERR(clk))

drivers/clk/clk-xgene.c

733

rc = of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/clk.c

1007

int clk_rate_exclusive_get(struct clk *clk)

drivers/clk/clk.c

1009

if (!clk)

drivers/clk/clk.c

1013

clk_core_rate_protect(clk->core);

drivers/clk/clk.c

1014

clk->exclusive_count++;

drivers/clk/clk.c

1023

struct clk *clk = data;

drivers/clk/clk.c

1025

clk_rate_exclusive_put(clk);

drivers/clk/clk.c

1028

int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk)

drivers/clk/clk.c

1032

ret = clk_rate_exclusive_get(clk);

drivers/clk/clk.c

1036

return devm_add_action_or_reset(dev, devm_clk_rate_exclusive_put, clk);

drivers/clk/clk.c

1091

void clk_unprepare(struct clk *clk)

drivers/clk/clk.c

1093

if (IS_ERR_OR_NULL(clk))

drivers/clk/clk.c

1096

clk_core_unprepare_lock(clk->core);

drivers/clk/clk.c

1172

int clk_prepare(struct clk *clk)

drivers/clk/clk.c

1174

if (!clk)

drivers/clk/clk.c

1177

return clk_core_prepare_lock(clk->core);

drivers/clk/clk.c

1229

void clk_disable(struct clk *clk)

drivers/clk/clk.c

1231

if (IS_ERR_OR_NULL(clk))

drivers/clk/clk.c

1234

clk_core_disable_lock(clk->core);

drivers/clk/clk.c

1344

struct clk_core *clk;

drivers/clk/clk.c

1347

hlist_for_each_entry(clk, &clk_root_list, child_node) {

drivers/clk/clk.c

1348

ret = clk_core_save_context(clk);

drivers/clk/clk.c

1353

hlist_for_each_entry(clk, &clk_orphan_list, child_node) {

drivers/clk/clk.c

1354

ret = clk_core_save_context(clk);

drivers/clk/clk.c

1394

int clk_enable(struct clk *clk)

drivers/clk/clk.c

1396

if (!clk)

drivers/clk/clk.c

1399

return clk_core_enable_lock(clk->core);

drivers/clk/clk.c

1418

bool clk_is_enabled_when_prepared(struct clk *clk)

drivers/clk/clk.c

1420

return clk && !(clk->core->ops->enable && clk->core->ops->disable);

drivers/clk/clk.c

1787

long clk_round_rate(struct clk *clk, unsigned long rate)

drivers/clk/clk.c

1792

if (!clk)

drivers/clk/clk.c

1797

if (clk->exclusive_count)

drivers/clk/clk.c

1798

clk_core_rate_unprotect(clk->core);

drivers/clk/clk.c

1800

clk_core_init_rate_req(clk->core, &req, rate);

drivers/clk/clk.c

1804

ret = clk_core_round_rate_nolock(clk->core, &req);

drivers/clk/clk.c

1808

if (clk->exclusive_count)

drivers/clk/clk.c

1809

clk_core_rate_protect(clk->core);

drivers/clk/clk.c

1845

if (cn->clk->core == core) {

drivers/clk/clk.c

1846

cnd.clk = cn->clk;

drivers/clk/clk.c

1903

long clk_get_accuracy(struct clk *clk)

drivers/clk/clk.c

1907

if (!clk)

drivers/clk/clk.c

1911

accuracy = clk_core_get_accuracy_recalc(clk->core);

drivers/clk/clk.c

1989

unsigned long clk_get_rate(struct clk *clk)

drivers/clk/clk.c

1993

if (!clk)

drivers/clk/clk.c

1997

rate = clk_core_get_rate_recalc(clk->core);

drivers/clk/clk.c

2584

int clk_set_rate(struct clk *clk, unsigned long rate)

drivers/clk/clk.c

2588

if (!clk)

drivers/clk/clk.c

2594

if (clk->exclusive_count)

drivers/clk/clk.c

2595

clk_core_rate_unprotect(clk->core);

drivers/clk/clk.c

2597

ret = clk_core_set_rate_nolock(clk->core, rate);

drivers/clk/clk.c

2599

if (clk->exclusive_count)

drivers/clk/clk.c

2600

clk_core_rate_protect(clk->core);

drivers/clk/clk.c

2627

int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)

drivers/clk/clk.c

2631

if (!clk)

drivers/clk/clk.c

2643

ret = clk_core_set_rate_nolock(clk->core, rate);

drivers/clk/clk.c

2645

clk_core_rate_protect(clk->core);

drivers/clk/clk.c

2646

clk->exclusive_count++;

drivers/clk/clk.c

2655

static int clk_set_rate_range_nolock(struct clk *clk,

drivers/clk/clk.c

2664

if (!clk)

drivers/clk/clk.c

2667

trace_clk_set_rate_range(clk->core, min, max);

drivers/clk/clk.c

2671

__func__, clk->core->name, clk->dev_id, clk->con_id,

drivers/clk/clk.c

2676

if (clk->exclusive_count)

drivers/clk/clk.c

2677

clk_core_rate_unprotect(clk->core);

drivers/clk/clk.c

2680

old_min = clk->min_rate;

drivers/clk/clk.c

2681

old_max = clk->max_rate;

drivers/clk/clk.c

2682

clk->min_rate = min;

drivers/clk/clk.c

2683

clk->max_rate = max;

drivers/clk/clk.c

2685

if (!clk_core_check_boundaries(clk->core, min, max)) {

drivers/clk/clk.c

2690

rate = clk->core->req_rate;

drivers/clk/clk.c

2691

if (clk->core->flags & CLK_GET_RATE_NOCACHE)

drivers/clk/clk.c

2692

rate = clk_core_get_rate_recalc(clk->core);

drivers/clk/clk.c

2712

ret = clk_core_set_rate_nolock(clk->core, rate);

drivers/clk/clk.c

2715

clk->min_rate = old_min;

drivers/clk/clk.c

2716

clk->max_rate = old_max;

drivers/clk/clk.c

2720

if (clk->exclusive_count)

drivers/clk/clk.c

2721

clk_core_rate_protect(clk->core);

drivers/clk/clk.c

2734

int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)

drivers/clk/clk.c

2738

if (!clk)

drivers/clk/clk.c

2743

ret = clk_set_rate_range_nolock(clk, min, max);

drivers/clk/clk.c

2758

int clk_set_min_rate(struct clk *clk, unsigned long rate)

drivers/clk/clk.c

2760

if (!clk)

drivers/clk/clk.c

2763

trace_clk_set_min_rate(clk->core, rate);

drivers/clk/clk.c

2765

return clk_set_rate_range(clk, rate, clk->max_rate);

drivers/clk/clk.c

2776

int clk_set_max_rate(struct clk *clk, unsigned long rate)

drivers/clk/clk.c

2778

if (!clk)

drivers/clk/clk.c

2781

trace_clk_set_max_rate(clk->core, rate);

drivers/clk/clk.c

2783

return clk_set_rate_range(clk, clk->min_rate, rate);

drivers/clk/clk.c

2793

struct clk *clk_get_parent(struct clk *clk)

drivers/clk/clk.c

2795

struct clk *parent;

drivers/clk/clk.c

2797

if (!clk)

drivers/clk/clk.c

2802

parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;

drivers/clk/clk.c

2845

bool clk_has_parent(const struct clk *clk, const struct clk *parent)

drivers/clk/clk.c

2848

if (!clk || !parent)

drivers/clk/clk.c

2851

return clk_core_has_parent(clk->core, parent->core);

drivers/clk/clk.c

2943

int clk_set_parent(struct clk *clk, struct clk *parent)

drivers/clk/clk.c

2947

if (!clk)

drivers/clk/clk.c

2952

if (clk->exclusive_count)

drivers/clk/clk.c

2953

clk_core_rate_unprotect(clk->core);

drivers/clk/clk.c

2955

ret = clk_core_set_parent_nolock(clk->core,

drivers/clk/clk.c

2958

if (clk->exclusive_count)

drivers/clk/clk.c

2959

clk_core_rate_protect(clk->core);

drivers/clk/clk.c

3012

int clk_set_phase(struct clk *clk, int degrees)

drivers/clk/clk.c

3016

if (!clk)

drivers/clk/clk.c

3026

if (clk->exclusive_count)

drivers/clk/clk.c

3027

clk_core_rate_unprotect(clk->core);

drivers/clk/clk.c

3029

ret = clk_core_set_phase_nolock(clk->core, degrees);

drivers/clk/clk.c

3031

if (clk->exclusive_count)

drivers/clk/clk.c

3032

clk_core_rate_protect(clk->core);

drivers/clk/clk.c

3063

int clk_get_phase(struct clk *clk)

drivers/clk/clk.c

3067

if (!clk)

drivers/clk/clk.c

3071

ret = clk_core_get_phase(clk->core);

drivers/clk/clk.c

3179

int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)

drivers/clk/clk.c

3184

if (!clk)

drivers/clk/clk.c

3196

if (clk->exclusive_count)

drivers/clk/clk.c

3197

clk_core_rate_unprotect(clk->core);

drivers/clk/clk.c

3199

ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);

drivers/clk/clk.c

3201

if (clk->exclusive_count)

drivers/clk/clk.c

3202

clk_core_rate_protect(clk->core);

drivers/clk/clk.c

3235

int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)

drivers/clk/clk.c

3237

if (!clk)

drivers/clk/clk.c

3240

return clk_core_get_scaled_duty_cycle(clk->core, scale);

drivers/clk/clk.c

3255

bool clk_is_match(const struct clk *p, const struct clk *q)

drivers/clk/clk.c

3289

struct clk *clk_user;

drivers/clk/clk.c

3475

ret = clk_prepare_enable(core->hw->clk);

drivers/clk/clk.c

3477

clk_disable_unprepare(core->hw->clk);

drivers/clk/clk.c

363

const char *__clk_get_name(const struct clk *clk)

drivers/clk/clk.c

365

return !clk ? NULL : clk->core->name;

drivers/clk/clk.c

387

struct clk_hw *__clk_get_hw(struct clk *clk)

drivers/clk/clk.c

389

return !clk ? NULL : clk->core->hw;

drivers/clk/clk.c

4094

static void clk_core_link_consumer(struct clk_core *core, struct clk *clk)

drivers/clk/clk.c

4097

hlist_add_head(&clk->clks_node, &core->clks);

drivers/clk/clk.c

4105

static void clk_core_unlink_consumer(struct clk *clk)

drivers/clk/clk.c

4108

hlist_del(&clk->clks_node);

drivers/clk/clk.c

4119

static struct clk *alloc_clk(struct clk_core *core, const char *dev_id,

drivers/clk/clk.c

4122

struct clk *clk;

drivers/clk/clk.c

4124

clk = kzalloc_obj(*clk);

drivers/clk/clk.c

4125

if (!clk)

drivers/clk/clk.c

4128

clk->core = core;

drivers/clk/clk.c

4129

clk->dev_id = dev_id;

drivers/clk/clk.c

4130

clk->con_id = kstrdup_const(con_id, GFP_KERNEL);

drivers/clk/clk.c

4131

clk->max_rate = ULONG_MAX;

drivers/clk/clk.c

4133

return clk;

drivers/clk/clk.c

4143

static void free_clk(struct clk *clk)

drivers/clk/clk.c

4145

kfree_const(clk->con_id);

drivers/clk/clk.c

4146

kfree(clk);

drivers/clk/clk.c

4161

struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,

drivers/clk/clk.c

4164

struct clk *clk;

drivers/clk/clk.c

4172

clk = alloc_clk(core, dev_id, con_id);

drivers/clk/clk.c

4173

if (IS_ERR(clk))

drivers/clk/clk.c

4174

return clk;

drivers/clk/clk.c

4175

clk->dev = dev;

drivers/clk/clk.c

4178

free_clk(clk);

drivers/clk/clk.c

4183

clk_core_link_consumer(core, clk);

drivers/clk/clk.c

4185

return clk;

drivers/clk/clk.c

4198

struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id)

drivers/clk/clk.c

4317

static struct clk *

drivers/clk/clk.c

4372

hw->clk = alloc_clk(core, NULL, NULL);

drivers/clk/clk.c

4373

if (IS_ERR(hw->clk)) {

drivers/clk/clk.c

4374

ret = PTR_ERR(hw->clk);

drivers/clk/clk.c

4378

clk_core_link_consumer(core, hw->clk);

drivers/clk/clk.c

4382

return hw->clk;

drivers/clk/clk.c

4385

clk_core_unlink_consumer(hw->clk);

drivers/clk/clk.c

4388

free_clk(hw->clk);

drivers/clk/clk.c

4389

hw->clk = NULL;

drivers/clk/clk.c

4442

struct clk *clk_register(struct device *dev, struct clk_hw *hw)

drivers/clk/clk.c

4556

void clk_unregister(struct clk *clk)

drivers/clk/clk.c

4561

if (!clk || WARN_ON_ONCE(IS_ERR(clk)))

drivers/clk/clk.c

4564

clk_debug_unregister(clk->core);

drivers/clk/clk.c

4568

ops = clk->core->ops;

drivers/clk/clk.c

4571

clk->core->name);

drivers/clk/clk.c

4580

clk->core->ops = &clk_nodrv_ops;

drivers/clk/clk.c

4584

ops->terminate(clk->core->hw);

drivers/clk/clk.c

4586

if (!hlist_empty(&clk->core->children)) {

drivers/clk/clk.c

4591

hlist_for_each_entry_safe(child, t, &clk->core->children,

drivers/clk/clk.c

4596

clk_core_evict_parent_cache(clk->core);

drivers/clk/clk.c

4598

hash_del(&clk->core->hashtable_node);

drivers/clk/clk.c

4599

hlist_del_init(&clk->core->child_node);

drivers/clk/clk.c

4601

if (clk->core->prepare_count)

drivers/clk/clk.c

4603

__func__, clk->core->name);

drivers/clk/clk.c

4605

if (clk->core->protect_count)

drivers/clk/clk.c

4607

__func__, clk->core->name);

drivers/clk/clk.c

4610

kref_put(&clk->core->ref, __clk_release);

drivers/clk/clk.c

4611

free_clk(clk);

drivers/clk/clk.c

4621

clk_unregister(hw->clk);

drivers/clk/clk.c

4627

clk_unregister(*(struct clk **)res);

drivers/clk/clk.c

4645

struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)

drivers/clk/clk.c

4647

struct clk *clk;

drivers/clk/clk.c

4648

struct clk **clkp;

drivers/clk/clk.c

4654

clk = clk_register(dev, hw);

drivers/clk/clk.c

4655

if (!IS_ERR(clk)) {

drivers/clk/clk.c

4656

*clkp = clk;

drivers/clk/clk.c

4662

return clk;

drivers/clk/clk.c

4698

clk_put(*(struct clk **)res);

drivers/clk/clk.c

4711

struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw,

drivers/clk/clk.c

4714

struct clk *clk;

drivers/clk/clk.c

4715

struct clk **clkp;

drivers/clk/clk.c

4727

clk = clk_hw_get_clk(hw, con_id);

drivers/clk/clk.c

4728

if (!IS_ERR(clk)) {

drivers/clk/clk.c

4729

*clkp = clk;

drivers/clk/clk.c

4735

return clk;

drivers/clk/clk.c

4743

void __clk_put(struct clk *clk)

drivers/clk/clk.c

4747

if (!clk || WARN_ON_ONCE(IS_ERR(clk)))

drivers/clk/clk.c

4757

if (WARN_ON(clk->exclusive_count)) {

drivers/clk/clk.c

4759

clk->core->protect_count -= (clk->exclusive_count - 1);

drivers/clk/clk.c

4760

clk_core_rate_unprotect(clk->core);

drivers/clk/clk.c

4761

clk->exclusive_count = 0;

drivers/clk/clk.c

4764

clk_core_unlink_consumer(clk);

drivers/clk/clk.c

4767

if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX)

drivers/clk/clk.c

4768

clk_set_rate_range_nolock(clk, 0, ULONG_MAX);

drivers/clk/clk.c

4772

owner = clk->core->owner;

drivers/clk/clk.c

4773

kref_put(&clk->core->ref, __clk_release);

drivers/clk/clk.c

4775

free_clk(clk);

drivers/clk/clk.c

4800

int clk_notifier_register(struct clk *clk, struct notifier_block *nb)

drivers/clk/clk.c

4805

if (!clk || !nb)

drivers/clk/clk.c

4812

if (cn->clk == clk)

drivers/clk/clk.c

4820

cn->clk = clk;

drivers/clk/clk.c

4828

clk->core->notifier_count++;

drivers/clk/clk.c

4848

int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)

drivers/clk/clk.c

4853

if (!clk || !nb)

drivers/clk/clk.c

4859

if (cn->clk == clk) {

drivers/clk/clk.c

4862

clk->core->notifier_count--;

drivers/clk/clk.c

4881

struct clk *clk;

drivers/clk/clk.c

4889

clk_notifier_unregister(devres->clk, devres->nb);

drivers/clk/clk.c

4892

int devm_clk_notifier_register(struct device *dev, struct clk *clk,

drivers/clk/clk.c

4904

ret = clk_notifier_register(clk, nb);

drivers/clk/clk.c

4906

devres->clk = clk;

drivers/clk/clk.c

4939

struct clk *(*get)(struct of_phandle_args *clkspec, void *data);

drivers/clk/clk.c

4951

struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,

drivers/clk/clk.c

4964

struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)

drivers/clk/clk.c

5002

struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,

drivers/clk/clk.c

5246

struct clk *clk;

drivers/clk/clk.c

5251

clk = provider->get(clkspec, provider->data);

drivers/clk/clk.c

5252

if (IS_ERR(clk))

drivers/clk/clk.c

5253

return ERR_CAST(clk);

drivers/clk/clk.c

5254

return __clk_get_hw(clk);

drivers/clk/clk.c

5291

struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)

drivers/clk/clk.c

5316

static struct clk *__of_clk_get(struct device_node *np,

drivers/clk/clk.c

5325

struct clk *of_clk_get(struct device_node *np, int index)

drivers/clk/clk.c

5340

struct clk *of_clk_get_by_name(struct device_node *np, const char *name)

drivers/clk/clk.c

5375

struct clk *clk;

drivers/clk/clk.c

5411

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/clk.c

5412

if (IS_ERR(clk)) {

drivers/clk/clk.c

5418

clk_name = __clk_get_name(clk);

drivers/clk/clk.c

5419

clk_put(clk);

drivers/clk/clk.c

5466

struct clk *clk = of_clk_get(np, i);

drivers/clk/clk.c

5469

if (!IS_ERR(clk)) {

drivers/clk/clk.c

5470

clk_put(clk);

drivers/clk/clk.c

5476

if (PTR_ERR(clk) == -EPROBE_DEFER)

drivers/clk/clk.c

558

unsigned int __clk_get_enable_count(struct clk *clk)

drivers/clk/clk.c

560

return !clk ? 0 : clk->core->enable_count;

drivers/clk/clk.c

611

bool __clk_is_enabled(struct clk *clk)

drivers/clk/clk.c

613

if (!clk)

drivers/clk/clk.c

616

return clk_core_is_enabled(clk->core);

drivers/clk/clk.c

774

struct clk *__clk_lookup(const char *name)

drivers/clk/clk.c

778

return !core ? NULL : core->hw->clk;

drivers/clk/clk.c

785

struct clk *clk_user;

drivers/clk/clk.c

819

struct clk *user;

drivers/clk/clk.c

941

void clk_rate_exclusive_put(struct clk *clk)

drivers/clk/clk.c

943

if (!clk)

drivers/clk/clk.c

952

if (WARN_ON(clk->exclusive_count <= 0))

drivers/clk/clk.c

955

clk_core_rate_unprotect(clk->core);

drivers/clk/clk.c

956

clk->exclusive_count--;

drivers/clk/clk.h

25

struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,

drivers/clk/clk.h

27

void __clk_put(struct clk *clk);

drivers/clk/clk.h

30

static inline struct clk *

drivers/clk/clk.h

34

return (struct clk *)hw;

drivers/clk/clk.h

36

static inline void __clk_put(struct clk *clk) { }

drivers/clk/clk_kunit_helpers.c

107

struct clk *

drivers/clk/clk_kunit_helpers.c

110

struct clk *clk;

drivers/clk/clk_kunit_helpers.c

112

clk = clk_hw_get_clk(hw, con_id);

drivers/clk/clk_kunit_helpers.c

114

return __clk_get_kunit(test, clk);

drivers/clk/clk_kunit_helpers.c

137

struct clk *

drivers/clk/clk_kunit_helpers.c

142

struct clk *clk;

drivers/clk/clk_kunit_helpers.c

144

clk = clk_hw_get_clk_kunit(test, hw, con_id);

drivers/clk/clk_kunit_helpers.c

145

if (IS_ERR(clk))

drivers/clk/clk_kunit_helpers.c

146

return clk;

drivers/clk/clk_kunit_helpers.c

148

ret = clk_prepare_enable_kunit(test, clk);

drivers/clk/clk_kunit_helpers.c

15

clk_disable_unprepare, struct clk *);

drivers/clk/clk_kunit_helpers.c

152

return clk;

drivers/clk/clk_kunit_helpers.c

23

int clk_prepare_enable_kunit(struct kunit *test, struct clk *clk)

drivers/clk/clk_kunit_helpers.c

27

ret = clk_prepare_enable(clk);

drivers/clk/clk_kunit_helpers.c

32

clk);

drivers/clk/clk_kunit_helpers.c

36

KUNIT_DEFINE_ACTION_WRAPPER(clk_put_wrapper, clk_put, struct clk *);

drivers/clk/clk_kunit_helpers.c

38

static struct clk *__clk_get_kunit(struct kunit *test, struct clk *clk)

drivers/clk/clk_kunit_helpers.c

42

if (IS_ERR(clk))

drivers/clk/clk_kunit_helpers.c

43

return clk;

drivers/clk/clk_kunit_helpers.c

45

ret = kunit_add_action_or_reset(test, clk_put_wrapper, clk);

drivers/clk/clk_kunit_helpers.c

49

return clk;

drivers/clk/clk_kunit_helpers.c

63

struct clk *

drivers/clk/clk_kunit_helpers.c

66

struct clk *clk;

drivers/clk/clk_kunit_helpers.c

68

clk = clk_get(dev, con_id);

drivers/clk/clk_kunit_helpers.c

70

return __clk_get_kunit(test, clk);

drivers/clk/clk_kunit_helpers.c

85

struct clk *

drivers/clk/clk_kunit_helpers.c

88

struct clk *clk;

drivers/clk/clk_kunit_helpers.c

90

clk = of_clk_get(np, index);

drivers/clk/clk_kunit_helpers.c

92

return __clk_get_kunit(test, clk);

drivers/clk/clk_test.c

1002

clk_put(clk);

drivers/clk/clk_test.c

1014

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1015

struct clk *parent = clk_hw_get_clk(&ctx->parent_ctx.hw, NULL);

drivers/clk/clk_test.c

1017

KUNIT_EXPECT_TRUE(test, clk_has_parent(clk, parent));

drivers/clk/clk_test.c

1020

clk_put(clk);

drivers/clk/clk_test.c

1037

struct clk *clk = clk_hw_get_clk_kunit(test, hw, NULL);

drivers/clk/clk_test.c

1038

struct clk *parent;

drivers/clk/clk_test.c

1043

parent = clk_get_parent(clk);

drivers/clk/clk_test.c

1049

ret = clk_set_rate_range(clk, 3000, 4000);

drivers/clk/clk_test.c

1067

struct clk *clk = clk_hw_get_clk_kunit(test, hw, NULL);

drivers/clk/clk_test.c

1068

struct clk *parent;

drivers/clk/clk_test.c

1073

parent = clk_get_parent(clk);

drivers/clk/clk_test.c

1076

ret = clk_set_rate_range(clk, 1000, 2000);

drivers/clk/clk_test.c

1094

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1095

struct clk *parent;

drivers/clk/clk_test.c

1099

parent = clk_get_parent(clk);

drivers/clk/clk_test.c

1105

rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);

drivers/clk/clk_test.c

1110

clk_put(clk);

drivers/clk/clk_test.c

1124

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1125

struct clk *parent;

drivers/clk/clk_test.c

1129

parent = clk_get_parent(clk);

drivers/clk/clk_test.c

1135

ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1 + 1000, DUMMY_CLOCK_RATE_2 - 1000);

drivers/clk/clk_test.c

1138

rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);

drivers/clk/clk_test.c

1143

rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);

drivers/clk/clk_test.c

1148

clk_put(clk);

drivers/clk/clk_test.c

1162

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1163

struct clk *parent;

drivers/clk/clk_test.c

1167

parent = clk_get_parent(clk);

drivers/clk/clk_test.c

1173

ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);

drivers/clk/clk_test.c

1176

rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);

drivers/clk/clk_test.c

1181

rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);

drivers/clk/clk_test.c

1186

clk_put(clk);

drivers/clk/clk_test.c

1261

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1264

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1268

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1273

new_rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1277

clk_put(clk);

drivers/clk/clk_test.c

1365

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1368

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1371

clk_put(clk);

drivers/clk/clk_test.c

1387

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1391

ret = clk_set_rate_range(clk,

drivers/clk/clk_test.c

1396

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1400

clk_put(clk);

drivers/clk/clk_test.c

1439

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1443

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1448

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1453

clk_put(clk);

drivers/clk/clk_test.c

1464

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1467

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1472

clk_put(clk);

drivers/clk/clk_test.c

1483

struct clk *user1, *user2;

drivers/clk/clk_test.c

1511

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1515

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1520

rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);

drivers/clk/clk_test.c

1525

clk_put(clk);

drivers/clk/clk_test.c

1536

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1540

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1546

clk_set_rate(clk, DUMMY_CLOCK_RATE_1 - 1000),

drivers/clk/clk_test.c

1549

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1554

clk_put(clk);

drivers/clk/clk_test.c

1567

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1571

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1576

rounded = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);

drivers/clk/clk_test.c

1580

clk_set_rate(clk, DUMMY_CLOCK_RATE_1 - 1000),

drivers/clk/clk_test.c

1583

KUNIT_EXPECT_EQ(test, rounded, clk_get_rate(clk));

drivers/clk/clk_test.c

1585

clk_put(clk);

drivers/clk/clk_test.c

1596

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1600

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1605

rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);

drivers/clk/clk_test.c

1610

clk_put(clk);

drivers/clk/clk_test.c

1621

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1625

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1631

clk_set_rate(clk, DUMMY_CLOCK_RATE_2 + 1000),

drivers/clk/clk_test.c

1634

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1639

clk_put(clk);

drivers/clk/clk_test.c

1652

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1656

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1661

rounded = clk_round_rate(clk, DUMMY_CLOCK_RATE_2 + 1000);

drivers/clk/clk_test.c

1665

clk_set_rate(clk, DUMMY_CLOCK_RATE_2 + 1000),

drivers/clk/clk_test.c

1668

KUNIT_EXPECT_EQ(test, rounded, clk_get_rate(clk));

drivers/clk/clk_test.c

1670

clk_put(clk);

drivers/clk/clk_test.c

1685

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1689

clk_set_rate(clk, DUMMY_CLOCK_RATE_1 - 1000),

drivers/clk/clk_test.c

1693

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1698

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1702

clk_put(clk);

drivers/clk/clk_test.c

1717

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1721

clk_set_rate(clk, DUMMY_CLOCK_RATE_2 + 1000),

drivers/clk/clk_test.c

1725

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1730

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1734

clk_put(clk);

drivers/clk/clk_test.c

1777

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1781

clk_set_rate(clk, DUMMY_CLOCK_RATE_2 + 1000),

drivers/clk/clk_test.c

1785

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1790

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1795

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1800

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1805

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1810

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1814

clk_put(clk);

drivers/clk/clk_test.c

1829

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1830

struct clk *user1, *user2;

drivers/clk/clk_test.c

1840

clk_set_rate(clk, DUMMY_CLOCK_RATE_2 + 1000),

drivers/clk/clk_test.c

1849

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1859

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1867

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1873

clk_put(clk);

drivers/clk/clk_test.c

1888

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1889

struct clk *user1, *user2;

drivers/clk/clk_test.c

1899

clk_set_rate(clk, DUMMY_CLOCK_RATE_2 + 1000),

drivers/clk/clk_test.c

1908

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1918

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1924

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1929

clk_put(clk);

drivers/clk/clk_test.c

1965

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

1969

clk_set_rate(clk, DUMMY_CLOCK_RATE_1 - 1000),

drivers/clk/clk_test.c

1973

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1978

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1983

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1988

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

1993

clk_set_rate_range(clk,

drivers/clk/clk_test.c

1998

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2002

clk_put(clk);

drivers/clk/clk_test.c

2017

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

2018

struct clk *user1, *user2;

drivers/clk/clk_test.c

2033

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2043

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2051

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2057

clk_put(clk);

drivers/clk/clk_test.c

2072

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

2073

struct clk *user1, *user2;

drivers/clk/clk_test.c

2088

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2098

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2104

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2109

clk_put(clk);

drivers/clk/clk_test.c

2296

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

230

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

2305

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2307

KUNIT_ASSERT_EQ(test, DUMMY_CLOCK_RATE_2, clk_round_rate(clk, DUMMY_CLOCK_RATE_2));

drivers/clk/clk_test.c

2313

clk_put(clk);

drivers/clk/clk_test.c

233

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2347

struct clk *clk;

drivers/clk/clk_test.c

237

clk_put(clk);

drivers/clk/clk_test.c

2418

ctx->clk = clk_hw_get_clk(&ctx->mux_ctx.hw, NULL);

drivers/clk/clk_test.c

2419

ret = clk_notifier_register(ctx->clk, &ctx->clk_nb);

drivers/clk/clk_test.c

2429

struct clk *clk = ctx->clk;

drivers/clk/clk_test.c

2431

clk_notifier_unregister(clk, &ctx->clk_nb);

drivers/clk/clk_test.c

2432

clk_put(clk);

drivers/clk/clk_test.c

2448

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

2449

struct clk *new_parent = clk_hw_get_clk(&ctx->mux_ctx.parents_ctx[1].hw, NULL);

drivers/clk/clk_test.c

2452

ret = clk_set_parent(clk, new_parent);

drivers/clk/clk_test.c

2472

clk_put(clk);

drivers/clk/clk_test.c

251

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

255

clk_set_rate(clk, DUMMY_CLOCK_RATE_1),

drivers/clk/clk_test.c

2551

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

2552

struct clk *other_parent, *parent;

drivers/clk/clk_test.c

2557

parent = clk_get_parent(clk);

drivers/clk/clk_test.c

2571

rounded_rate = clk_round_rate(clk, other_parent_rate);

drivers/clk/clk_test.c

2575

clk_put(clk);

drivers/clk/clk_test.c

258

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2587

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

2588

struct clk *other_parent, *parent;

drivers/clk/clk_test.c

2594

parent = clk_get_parent(clk);

drivers/clk/clk_test.c

2608

ret = clk_set_rate(clk, other_parent_rate);

drivers/clk/clk_test.c

2611

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

2615

clk_put(clk);

drivers/clk/clk_test.c

262

clk_put(clk);

drivers/clk/clk_test.c

2756

struct clk *expected_parent, *actual_parent;

drivers/clk/clk_test.c

276

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

280

clk_set_rate(clk, DUMMY_CLOCK_RATE_1),

drivers/clk/clk_test.c

284

clk_set_rate(clk, DUMMY_CLOCK_RATE_2),

drivers/clk/clk_test.c

287

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

291

clk_put(clk);

drivers/clk/clk_test.c

2917

struct clk *expected_parent, *actual_parent;

drivers/clk/clk_test.c

302

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

306

rounded_rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1);

drivers/clk/clk_test.c

311

clk_set_rate(clk, DUMMY_CLOCK_RATE_1),

drivers/clk/clk_test.c

314

set_rate = clk_get_rate(clk);

drivers/clk/clk_test.c

318

clk_put(clk);

drivers/clk/clk_test.c

372

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

375

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

381

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

385

clk_put(clk);

drivers/clk/clk_test.c

396

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

400

clk_set_rate_range(clk,

drivers/clk/clk_test.c

405

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

410

clk_put(clk);

drivers/clk/clk_test.c

425

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

431

clk_set_rate_range(clk,

drivers/clk/clk_test.c

436

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

440

clk_put(clk);

drivers/clk/clk_test.c

510

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

511

struct clk *parent = clk_hw_get_clk(&ctx->parents_ctx[0].hw, NULL);

drivers/clk/clk_test.c

513

KUNIT_EXPECT_TRUE(test, clk_is_match(clk_get_parent(clk), parent));

drivers/clk/clk_test.c

516

clk_put(clk);

drivers/clk/clk_test.c

528

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

529

struct clk *parent;

drivers/clk/clk_test.c

532

KUNIT_EXPECT_TRUE(test, clk_has_parent(clk, parent));

drivers/clk/clk_test.c

536

KUNIT_EXPECT_TRUE(test, clk_has_parent(clk, parent));

drivers/clk/clk_test.c

539

clk_put(clk);

drivers/clk/clk_test.c

556

struct clk *clk = clk_hw_get_clk_kunit(test, hw, NULL);

drivers/clk/clk_test.c

557

struct clk *parent1, *parent2;

drivers/clk/clk_test.c

565

KUNIT_ASSERT_TRUE(test, clk_is_match(clk_get_parent(clk), parent1));

drivers/clk/clk_test.c

576

ret = clk_set_rate_range(clk,

drivers/clk/clk_test.c

581

ret = clk_set_parent(clk, parent2);

drivers/clk/clk_test.c

584

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

650

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

652

KUNIT_EXPECT_PTR_EQ(test, clk_get_parent(clk), NULL);

drivers/clk/clk_test.c

654

clk_put(clk);

drivers/clk/clk_test.c

667

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

668

struct clk *parent, *new_parent;

drivers/clk/clk_test.c

674

ret = clk_set_parent(clk, parent);

drivers/clk/clk_test.c

677

new_parent = clk_get_parent(clk);

drivers/clk/clk_test.c

682

clk_put(clk);

drivers/clk/clk_test.c

695

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

696

struct clk *parent;

drivers/clk/clk_test.c

706

ret = clk_set_parent(clk, parent);

drivers/clk/clk_test.c

709

ret = clk_drop_range(clk);

drivers/clk/clk_test.c

712

new_parent_rate = clk_get_rate(clk);

drivers/clk/clk_test.c

717

clk_put(clk);

drivers/clk/clk_test.c

729

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

730

struct clk *parent;

drivers/clk/clk_test.c

740

ret = clk_set_parent(clk, parent);

drivers/clk/clk_test.c

743

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

748

clk_put(clk);

drivers/clk/clk_test.c

759

struct clk *clk, *parent;

drivers/clk/clk_test.c

766

clk = clk_hw_get_clk(&ctx->hw, NULL);

drivers/clk/clk_test.c

767

KUNIT_ASSERT_NOT_ERR_OR_NULL(test, clk);

drivers/clk/clk_test.c

772

ret = clk_set_parent(clk, parent);

drivers/clk/clk_test.c

775

clk_put(clk);

drivers/clk/clk_test.c

794

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

795

struct clk *parent;

drivers/clk/clk_test.c

802

ret = clk_set_parent(clk, parent);

drivers/clk/clk_test.c

805

ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);

drivers/clk/clk_test.c

808

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

814

clk_put(clk);

drivers/clk/clk_test.c

827

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

828

struct clk *parent;

drivers/clk/clk_test.c

838

ret = clk_set_parent(clk, parent);

drivers/clk/clk_test.c

841

ret = clk_set_rate_range(clk,

drivers/clk/clk_test.c

851

clk_put(clk);

drivers/clk/clk_test.c

864

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

868

ret = clk_set_rate_range(clk, DUMMY_CLOCK_RATE_1, DUMMY_CLOCK_RATE_2);

drivers/clk/clk_test.c

871

rate = clk_round_rate(clk, DUMMY_CLOCK_RATE_1 - 1000);

drivers/clk/clk_test.c

876

clk_put(clk);

drivers/clk/clk_test.c

893

struct clk *clk = clk_hw_get_clk_kunit(test, hw, NULL);

drivers/clk/clk_test.c

894

struct clk *parent;

drivers/clk/clk_test.c

905

ret = clk_set_parent(clk, parent);

drivers/clk/clk_test.c

908

rate = clk_get_rate(clk);

drivers/clk/clk_test.c

996

struct clk *clk = clk_hw_get_clk(hw, NULL);

drivers/clk/clk_test.c

997

struct clk *parent = clk_hw_get_clk(&ctx->parent_ctx.hw, NULL);

drivers/clk/clk_test.c

999

KUNIT_EXPECT_TRUE(test, clk_is_match(clk_get_parent(clk), parent));

drivers/clk/clkdev.c

100

struct clk *clk_get(struct device *dev, const char *con_id)

drivers/clk/clkdev.c

115

void clk_put(struct clk *clk)

drivers/clk/clkdev.c

117

__clk_put(clk);

drivers/clk/clkdev.c

131

cl->clk_hw = __clk_get_hw(cl->clk);

drivers/clk/clkdev.c

140

cl->clk_hw = __clk_get_hw(cl->clk);

drivers/clk/clkdev.c

240

struct clk_lookup *clkdev_create(struct clk *clk, const char *con_id,

drivers/clk/clkdev.c

247

cl = vclkdev_create(__clk_get_hw(clk), con_id, dev_fmt, ap);

drivers/clk/clkdev.c

280

struct clk *r = clk_get(dev, con_id);

drivers/clk/clkdev.c

350

int clk_register_clkdev(struct clk *clk, const char *con_id,

drivers/clk/clkdev.c

355

if (IS_ERR(clk))

drivers/clk/clkdev.c

356

return PTR_ERR(clk);

drivers/clk/clkdev.c

358

return do_clk_register_clkdev(__clk_get_hw(clk), &cl, con_id,

drivers/clk/clkdev.c

86

static struct clk *__clk_get_sys(struct device *dev, const char *dev_id,

drivers/clk/clkdev.c

94

struct clk *clk_get_sys(const char *dev_id, const char *con_id)

drivers/clk/davinci/da8xx-cfgchip.c

215

struct da8xx_cfgchip_mux_clk *clk = to_da8xx_cfgchip_mux_clk(hw);

drivers/clk/davinci/da8xx-cfgchip.c

216

unsigned int val = index ? clk->mask : 0;

drivers/clk/davinci/da8xx-cfgchip.c

218

return regmap_write_bits(clk->regmap, clk->reg, clk->mask, val);

drivers/clk/davinci/da8xx-cfgchip.c

223

struct da8xx_cfgchip_mux_clk *clk = to_da8xx_cfgchip_mux_clk(hw);

drivers/clk/davinci/da8xx-cfgchip.c

226

regmap_read(clk->regmap, clk->reg, &val);

drivers/clk/davinci/da8xx-cfgchip.c

228

return (val & clk->mask) ? 1 : 0;

drivers/clk/davinci/da8xx-cfgchip.c

314

clk_set_parent(mux->hw.clk, parent->clk);

drivers/clk/davinci/da8xx-cfgchip.c

349

struct clk *fck;

drivers/clk/davinci/da8xx-cfgchip.c

44

struct da8xx_cfgchip_gate_clk *clk = to_da8xx_cfgchip_gate_clk(hw);

drivers/clk/davinci/da8xx-cfgchip.c

46

return regmap_write_bits(clk->regmap, clk->reg, clk->mask, clk->mask);

drivers/clk/davinci/da8xx-cfgchip.c

509

struct clk *fck_clk;

drivers/clk/davinci/da8xx-cfgchip.c

51

struct da8xx_cfgchip_gate_clk *clk = to_da8xx_cfgchip_gate_clk(hw);

drivers/clk/davinci/da8xx-cfgchip.c

53

regmap_write_bits(clk->regmap, clk->reg, clk->mask, 0);

drivers/clk/davinci/da8xx-cfgchip.c

58

struct da8xx_cfgchip_gate_clk *clk = to_da8xx_cfgchip_gate_clk(hw);

drivers/clk/davinci/da8xx-cfgchip.c

61

regmap_read(clk->regmap, clk->reg, &val);

drivers/clk/davinci/da8xx-cfgchip.c

624

clk_set_parent(usb0->hw.clk, parent->clk);

drivers/clk/davinci/da8xx-cfgchip.c

63

return !!(val & clk->mask);

drivers/clk/davinci/da8xx-cfgchip.c

638

clk_set_parent(usb1->hw.clk, parent->clk);

drivers/clk/davinci/da8xx-cfgchip.c

91

struct clk *parent;

drivers/clk/davinci/pll-da850.c

100

clk_register_clkdev(clk, "pll0_sysclk2", "da850-psc1");

drivers/clk/davinci/pll-da850.c

101

clk_register_clkdev(clk, "pll0_sysclk2", "da850-async3-clksrc");

drivers/clk/davinci/pll-da850.c

103

clk = davinci_pll_sysclk_register(dev, &pll0_sysclk3, base);

drivers/clk/davinci/pll-da850.c

104

clk_register_clkdev(clk, "pll0_sysclk3", "da850-async1-clksrc");

drivers/clk/davinci/pll-da850.c

106

clk = davinci_pll_sysclk_register(dev, &pll0_sysclk4, base);

drivers/clk/davinci/pll-da850.c

107

clk_register_clkdev(clk, "pll0_sysclk4", "da850-psc0");

drivers/clk/davinci/pll-da850.c

108

clk_register_clkdev(clk, "pll0_sysclk4", "da850-psc1");

drivers/clk/davinci/pll-da850.c

112

clk = davinci_pll_sysclk_register(dev, &pll0_sysclk6, base);

drivers/clk/davinci/pll-da850.c

113

clk_register_clkdev(clk, "pll0_sysclk6", "da850-psc0");

drivers/clk/davinci/pll-da850.c

119

clk = clk_register_fixed_factor(dev, "async2", "pll0_auxclk",

drivers/clk/davinci/pll-da850.c

122

clk_register_clkdev(clk, NULL, "i2c_davinci.1");

drivers/clk/davinci/pll-da850.c

123

clk_register_clkdev(clk, "timer0", NULL);

drivers/clk/davinci/pll-da850.c

124

clk_register_clkdev(clk, NULL, "davinci-wdt");

drivers/clk/davinci/pll-da850.c

200

struct clk *clk;

drivers/clk/davinci/pll-da850.c

206

clk = davinci_pll_sysclk_register(dev, &pll1_sysclk2, base);

drivers/clk/davinci/pll-da850.c

207

clk_register_clkdev(clk, "pll1_sysclk2", "da850-async3-clksrc");

drivers/clk/davinci/pll-da850.c

91

struct clk *clk;

drivers/clk/davinci/pll-da850.c

95

clk = davinci_pll_sysclk_register(dev, &pll0_sysclk1, base);

drivers/clk/davinci/pll-da850.c

96

clk_register_clkdev(clk, "pll0_sysclk1", "da850-psc0");

drivers/clk/davinci/pll-da850.c

98

clk = davinci_pll_sysclk_register(dev, &pll0_sysclk2, base);

drivers/clk/davinci/pll-da850.c

99

clk_register_clkdev(clk, "pll0_sysclk2", "da850-psc0");

drivers/clk/davinci/pll.c

232

static struct clk *davinci_pll_div_register(struct device *dev,

drivers/clk/davinci/pll.c

243

struct clk *clk;

drivers/clk/davinci/pll.c

268

clk = clk_register_composite(dev, name, parent_names, num_parents,

drivers/clk/davinci/pll.c

271

if (IS_ERR(clk)) {

drivers/clk/davinci/pll.c

272

ret = PTR_ERR(clk);

drivers/clk/davinci/pll.c

276

return clk;

drivers/clk/davinci/pll.c

308

struct clk_hw *hw = __clk_get_hw(cnd->clk);

drivers/clk/davinci/pll.c

364

struct clk *davinci_pll_clk_register(struct device *dev,

drivers/clk/davinci/pll.c

377

struct clk *oscin_clk = NULL;

drivers/clk/davinci/pll.c

378

struct clk *prediv_clk = NULL;

drivers/clk/davinci/pll.c

379

struct clk *pllout_clk;

drivers/clk/davinci/pll.c

380

struct clk *postdiv_clk = NULL;

drivers/clk/davinci/pll.c

381

struct clk *pllen_clk;

drivers/clk/davinci/pll.c

541

struct clk *davinci_pll_auxclk_register(struct device *dev,

drivers/clk/davinci/pll.c

555

struct clk *davinci_pll_sysclkbp_clk_register(struct device *dev,

drivers/clk/davinci/pll.c

570

struct clk *

drivers/clk/davinci/pll.c

578

struct clk *clk;

drivers/clk/davinci/pll.c

614

clk = clk_register_composite(dev, info->name, info->parent_names,

drivers/clk/davinci/pll.c

620

if (IS_ERR(clk)) {

drivers/clk/davinci/pll.c

621

ret = PTR_ERR(clk);

drivers/clk/davinci/pll.c

625

return clk;

drivers/clk/davinci/pll.c

642

struct clk_hw *hw = __clk_get_hw(clk_get_parent(cnd->clk));

drivers/clk/davinci/pll.c

674

struct clk *

drivers/clk/davinci/pll.c

682

struct clk *clk;

drivers/clk/davinci/pll.c

723

clk = clk_register_composite(dev, info->name, &info->parent_name, 1,

drivers/clk/davinci/pll.c

726

if (IS_ERR(clk)) {

drivers/clk/davinci/pll.c

727

ret = PTR_ERR(clk);

drivers/clk/davinci/pll.c

731

clk_notifier_register(clk, &davinci_pll_sysclk_notifier);

drivers/clk/davinci/pll.c

733

return clk;

drivers/clk/davinci/pll.c

753

struct clk *clk;

drivers/clk/davinci/pll.c

760

clk = davinci_pll_clk_register(dev, info, parent_name, base, cfgchip);

drivers/clk/davinci/pll.c

761

if (IS_ERR(clk)) {

drivers/clk/davinci/pll.c

763

return PTR_ERR(clk);

drivers/clk/davinci/pll.c

768

of_clk_add_provider(child, of_clk_src_simple_get, clk);

drivers/clk/davinci/pll.c

775

struct clk **clks;

drivers/clk/davinci/pll.c

799

clk = davinci_pll_sysclk_register(dev, *div_info, base);

drivers/clk/davinci/pll.c

800

if (IS_ERR(clk))

drivers/clk/davinci/pll.c

802

(*div_info)->name, PTR_ERR(clk));

drivers/clk/davinci/pll.c

804

clks[(*div_info)->id] = clk;

drivers/clk/davinci/pll.c

816

clk = davinci_pll_auxclk_register(dev, child_name, base);

drivers/clk/davinci/pll.c

817

if (IS_ERR(clk))

drivers/clk/davinci/pll.c

819

child_name, PTR_ERR(clk));

drivers/clk/davinci/pll.c

821

of_clk_add_provider(child, of_clk_src_simple_get, clk);

drivers/clk/davinci/pll.c

829

clk = davinci_pll_obsclk_register(dev, obsclk_info, base);

drivers/clk/davinci/pll.c

831

clk = ERR_PTR(-EINVAL);

drivers/clk/davinci/pll.c

833

if (IS_ERR(clk))

drivers/clk/davinci/pll.c

835

PTR_ERR(clk));

drivers/clk/davinci/pll.c

837

of_clk_add_provider(child, of_clk_src_simple_get, clk);

drivers/clk/davinci/pll.h

100

struct clk *davinci_pll_auxclk_register(struct device *dev,

drivers/clk/davinci/pll.h

103

struct clk *davinci_pll_sysclkbp_clk_register(struct device *dev,

drivers/clk/davinci/pll.h

106

struct clk *

drivers/clk/davinci/pll.h

110

struct clk *

drivers/clk/davinci/pll.h

95

struct clk *davinci_pll_clk_register(struct device *dev,

drivers/clk/davinci/psc.c

180

struct clk *clk;

drivers/clk/davinci/psc.c

187

clk = clk_get_sys(best_dev_name(lpsc->dev), clk_hw_get_name(&lpsc->hw));

drivers/clk/davinci/psc.c

188

if (IS_ERR(clk))

drivers/clk/davinci/psc.c

189

return (PTR_ERR(clk));

drivers/clk/davinci/psc.c

195

ret = pm_clk_add_clk(dev, clk);

drivers/clk/davinci/psc.c

199

lpsc->genpd_clk = clk;

drivers/clk/davinci/psc.c

206

clk_put(clk);

drivers/clk/davinci/psc.c

295

static int davinci_lpsc_clk_reset(struct clk *clk, bool reset)

drivers/clk/davinci/psc.c

297

struct clk_hw *hw = __clk_get_hw(clk);

drivers/clk/davinci/psc.c

314

struct clk *clk = psc->clk_data.clks[id];

drivers/clk/davinci/psc.c

316

return davinci_lpsc_clk_reset(clk, true);

drivers/clk/davinci/psc.c

323

struct clk *clk = psc->clk_data.clks[id];

drivers/clk/davinci/psc.c

325

return davinci_lpsc_clk_reset(clk, false);

drivers/clk/davinci/psc.c

337

struct clk *clk;

drivers/clk/davinci/psc.c

342

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/davinci/psc.c

343

if (IS_ERR(clk))

drivers/clk/davinci/psc.c

344

return PTR_ERR(clk);

drivers/clk/davinci/psc.c

346

hw = __clk_get_hw(clk);

drivers/clk/davinci/psc.c

348

clk_put(clk);

drivers/clk/davinci/psc.c

370

struct clk **clks;

drivers/clk/davinci/psc.c

422

clks[info->md] = lpsc->hw.clk;

drivers/clk/davinci/psc.c

470

struct clk *clk = psc->clk_data.clks[info->md];

drivers/clk/davinci/psc.c

472

if (!cdevs || IS_ERR_OR_NULL(clk))

drivers/clk/davinci/psc.c

476

clk_register_clkdev(clk, cdevs->con_id, cdevs->dev_id);

drivers/clk/davinci/psc.c

79

struct clk *genpd_clk;

drivers/clk/hisilicon/clk-hi3559a.c

376

struct hi3559av100_clk_pll *clk = to_pll_clk(hw);

drivers/clk/hisilicon/clk-hi3559a.c

385

val = readl_relaxed(clk->ctrl_reg1);

drivers/clk/hisilicon/clk-hi3559a.c

386

val &= ~(((1 << clk->frac_width) - 1) << clk->frac_shift);

drivers/clk/hisilicon/clk-hi3559a.c

387

val &= ~(((1 << clk->postdiv1_width) - 1) << clk->postdiv1_shift);

drivers/clk/hisilicon/clk-hi3559a.c

388

val &= ~(((1 << clk->postdiv2_width) - 1) << clk->postdiv2_shift);

drivers/clk/hisilicon/clk-hi3559a.c

390

val |= frac_val << clk->frac_shift;

drivers/clk/hisilicon/clk-hi3559a.c

391

val |= postdiv1_val << clk->postdiv1_shift;

drivers/clk/hisilicon/clk-hi3559a.c

392

val |= postdiv2_val << clk->postdiv2_shift;

drivers/clk/hisilicon/clk-hi3559a.c

393

writel_relaxed(val, clk->ctrl_reg1);

drivers/clk/hisilicon/clk-hi3559a.c

395

val = readl_relaxed(clk->ctrl_reg2);

drivers/clk/hisilicon/clk-hi3559a.c

396

val &= ~(((1 << clk->fbdiv_width) - 1) << clk->fbdiv_shift);

drivers/clk/hisilicon/clk-hi3559a.c

397

val &= ~(((1 << clk->refdiv_width) - 1) << clk->refdiv_shift);

drivers/clk/hisilicon/clk-hi3559a.c

399

val |= fbdiv_val << clk->fbdiv_shift;

drivers/clk/hisilicon/clk-hi3559a.c

400

val |= refdiv_val << clk->refdiv_shift;

drivers/clk/hisilicon/clk-hi3559a.c

401

writel_relaxed(val, clk->ctrl_reg2);

drivers/clk/hisilicon/clk-hi3559a.c

409

struct hi3559av100_clk_pll *clk = to_pll_clk(hw);

drivers/clk/hisilicon/clk-hi3559a.c

415

val = readl_relaxed(clk->ctrl_reg1);

drivers/clk/hisilicon/clk-hi3559a.c

416

val = val >> clk->frac_shift;

drivers/clk/hisilicon/clk-hi3559a.c

417

val &= ((1 << clk->frac_width) - 1);

drivers/clk/hisilicon/clk-hi3559a.c

420

val = readl_relaxed(clk->ctrl_reg1);

drivers/clk/hisilicon/clk-hi3559a.c

421

val = val >> clk->postdiv1_shift;

drivers/clk/hisilicon/clk-hi3559a.c

422

val &= ((1 << clk->postdiv1_width) - 1);

drivers/clk/hisilicon/clk-hi3559a.c

425

val = readl_relaxed(clk->ctrl_reg1);

drivers/clk/hisilicon/clk-hi3559a.c

426

val = val >> clk->postdiv2_shift;

drivers/clk/hisilicon/clk-hi3559a.c

427

val &= ((1 << clk->postdiv2_width) - 1);

drivers/clk/hisilicon/clk-hi3559a.c

430

val = readl_relaxed(clk->ctrl_reg2);

drivers/clk/hisilicon/clk-hi3559a.c

431

val = val >> clk->fbdiv_shift;

drivers/clk/hisilicon/clk-hi3559a.c

432

val &= ((1 << clk->fbdiv_width) - 1);

drivers/clk/hisilicon/clk-hi3559a.c

435

val = readl_relaxed(clk->ctrl_reg2);

drivers/clk/hisilicon/clk-hi3559a.c

436

val = val >> clk->refdiv_shift;

drivers/clk/hisilicon/clk-hi3559a.c

437

val &= ((1 << clk->refdiv_width) - 1);

drivers/clk/hisilicon/clk-hi3559a.c

459

struct clk *clk = NULL;

drivers/clk/hisilicon/clk-hi3559a.c

490

clk = clk_register(NULL, &p_clk->hw);

drivers/clk/hisilicon/clk-hi3559a.c

491

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk-hi3559a.c

497

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk-hi3620.c

410

static struct clk *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk,

drivers/clk/hisilicon/clk-hi3620.c

414

struct clk *clk;

drivers/clk/hisilicon/clk-hi3620.c

441

clk = clk_register(NULL, &mclk->hw);

drivers/clk/hisilicon/clk-hi3620.c

442

if (WARN_ON(IS_ERR(clk)))

drivers/clk/hisilicon/clk-hi3620.c

444

return clk;

drivers/clk/hisilicon/clk-hi3660.c

562

struct clk **clks;

drivers/clk/hisilicon/clk-hi6220-stub.c

200

struct clk *clk;

drivers/clk/hisilicon/clk-hi6220-stub.c

238

clk = devm_clk_register(dev, &stub_clk->hw);

drivers/clk/hisilicon/clk-hi6220-stub.c

239

if (IS_ERR(clk))

drivers/clk/hisilicon/clk-hi6220-stub.c

240

return PTR_ERR(clk);

drivers/clk/hisilicon/clk-hi6220-stub.c

242

ret = of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/hisilicon/clk-hisi-phase.c

93

struct clk *clk_register_hisi_phase(struct device *dev,

drivers/clk/hisilicon/clk-hix5hd2.c

171

struct hix5hd2_clk_complex *clk = to_complex_clk(hw);

drivers/clk/hisilicon/clk-hix5hd2.c

174

val = readl_relaxed(clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

175

val |= clk->ctrl_clk_mask | clk->ctrl_rst_mask;

drivers/clk/hisilicon/clk-hix5hd2.c

176

writel_relaxed(val, clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

177

val &= ~(clk->ctrl_rst_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

178

writel_relaxed(val, clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

180

val = readl_relaxed(clk->phy_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

181

val |= clk->phy_clk_mask;

drivers/clk/hisilicon/clk-hix5hd2.c

182

val &= ~(clk->phy_rst_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

183

writel_relaxed(val, clk->phy_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

186

val &= ~(clk->phy_clk_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

187

val |= clk->phy_rst_mask;

drivers/clk/hisilicon/clk-hix5hd2.c

188

writel_relaxed(val, clk->phy_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

191

val |= clk->phy_clk_mask;

drivers/clk/hisilicon/clk-hix5hd2.c

192

val &= ~(clk->phy_rst_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

193

writel_relaxed(val, clk->phy_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

200

struct hix5hd2_clk_complex *clk = to_complex_clk(hw);

drivers/clk/hisilicon/clk-hix5hd2.c

203

val = readl_relaxed(clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

204

val &= ~(clk->ctrl_clk_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

205

writel_relaxed(val, clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

215

struct hix5hd2_clk_complex *clk = to_complex_clk(hw);

drivers/clk/hisilicon/clk-hix5hd2.c

218

val = readl_relaxed(clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

219

val |= clk->ctrl_clk_mask;

drivers/clk/hisilicon/clk-hix5hd2.c

220

val &= ~(clk->ctrl_rst_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

221

writel_relaxed(val, clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

223

val = readl_relaxed(clk->phy_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

224

val |= clk->phy_clk_mask;

drivers/clk/hisilicon/clk-hix5hd2.c

225

val &= ~(clk->phy_rst_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

226

writel_relaxed(val, clk->phy_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

233

struct hix5hd2_clk_complex *clk = to_complex_clk(hw);

drivers/clk/hisilicon/clk-hix5hd2.c

236

val = readl_relaxed(clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

237

val |= clk->ctrl_rst_mask;

drivers/clk/hisilicon/clk-hix5hd2.c

238

val &= ~(clk->ctrl_clk_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

239

writel_relaxed(val, clk->ctrl_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

241

val = readl_relaxed(clk->phy_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

242

val |= clk->phy_rst_mask;

drivers/clk/hisilicon/clk-hix5hd2.c

243

val &= ~(clk->phy_clk_mask);

drivers/clk/hisilicon/clk-hix5hd2.c

244

writel_relaxed(val, clk->phy_reg);

drivers/clk/hisilicon/clk-hix5hd2.c

261

struct clk *clk;

drivers/clk/hisilicon/clk-hix5hd2.c

287

clk = clk_register(NULL, &p_clk->hw);

drivers/clk/hisilicon/clk-hix5hd2.c

288

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk-hix5hd2.c

295

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

102

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk.c

107

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

116

return PTR_ERR(clk);

drivers/clk/hisilicon/clk.c

124

struct clk *clk;

drivers/clk/hisilicon/clk.c

128

clk = clk_register_fixed_factor(NULL, clks[i].name,

drivers/clk/hisilicon/clk.c

132

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk.c

137

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

146

return PTR_ERR(clk);

drivers/clk/hisilicon/clk.c

153

struct clk *clk;

drivers/clk/hisilicon/clk.c

160

clk = clk_register_mux_table(NULL, clks[i].name,

drivers/clk/hisilicon/clk.c

166

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk.c

173

clk_register_clkdev(clk, clks[i].alias, NULL);

drivers/clk/hisilicon/clk.c

175

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

184

return PTR_ERR(clk);

drivers/clk/hisilicon/clk.c

193

struct clk *clk;

drivers/clk/hisilicon/clk.c

197

clk = clk_register_hisi_phase(dev, &clks[i], base,

drivers/clk/hisilicon/clk.c

199

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk.c

202

return PTR_ERR(clk);

drivers/clk/hisilicon/clk.c

205

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

215

struct clk *clk;

drivers/clk/hisilicon/clk.c

220

clk = clk_register_divider_table(NULL, clks[i].name,

drivers/clk/hisilicon/clk.c

228

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk.c

235

clk_register_clkdev(clk, clks[i].alias, NULL);

drivers/clk/hisilicon/clk.c

237

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

246

return PTR_ERR(clk);

drivers/clk/hisilicon/clk.c

253

struct clk *clk;

drivers/clk/hisilicon/clk.c

258

clk = clk_register_gate(NULL, clks[i].name,

drivers/clk/hisilicon/clk.c

265

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk.c

272

clk_register_clkdev(clk, clks[i].alias, NULL);

drivers/clk/hisilicon/clk.c

274

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

283

return PTR_ERR(clk);

drivers/clk/hisilicon/clk.c

290

struct clk *clk;

drivers/clk/hisilicon/clk.c

295

clk = hisi_register_clkgate_sep(NULL, clks[i].name,

drivers/clk/hisilicon/clk.c

302

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk.c

309

clk_register_clkdev(clk, clks[i].alias, NULL);

drivers/clk/hisilicon/clk.c

31

struct clk **clk_table;

drivers/clk/hisilicon/clk.c

311

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

319

struct clk *clk;

drivers/clk/hisilicon/clk.c

324

clk = hi6220_register_clkdiv(NULL, clks[i].name,

drivers/clk/hisilicon/clk.c

332

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clk.c

339

clk_register_clkdev(clk, clks[i].alias, NULL);

drivers/clk/hisilicon/clk.c

341

data->clk_data.clks[clks[i].id] = clk;

drivers/clk/hisilicon/clk.c

62

struct clk **clk_table;

drivers/clk/hisilicon/clk.c

94

struct clk *clk;

drivers/clk/hisilicon/clk.c

98

clk = clk_register_fixed_rate(NULL, clks[i].name,

drivers/clk/hisilicon/clk.h

106

struct clk *hisi_register_clkgate_sep(struct device *, const char *,

drivers/clk/hisilicon/clk.h

110

struct clk *hi6220_register_clkdiv(struct device *dev, const char *name,

drivers/clk/hisilicon/clk.h

122

struct clk *clk_register_hisi_phase(struct device *dev,

drivers/clk/hisilicon/clk.h

142

struct clk **clocks = data->clk_data.clks; \

drivers/clk/hisilicon/clkdivider-hi6220.c

100

struct clk *hi6220_register_clkdiv(struct device *dev, const char *name,

drivers/clk/hisilicon/clkdivider-hi6220.c

105

struct clk *clk;

drivers/clk/hisilicon/clkdivider-hi6220.c

147

clk = clk_register(dev, &div->hw);

drivers/clk/hisilicon/clkdivider-hi6220.c

148

if (IS_ERR(clk)) {

drivers/clk/hisilicon/clkdivider-hi6220.c

153

return clk;

drivers/clk/hisilicon/clkgate-separated.c

109

clk = clk_register(dev, &sclk->hw);

drivers/clk/hisilicon/clkgate-separated.c

110

if (IS_ERR(clk))

drivers/clk/hisilicon/clkgate-separated.c

112

return clk;

drivers/clk/hisilicon/clkgate-separated.c

83

struct clk *hisi_register_clkgate_sep(struct device *dev, const char *name,

drivers/clk/hisilicon/clkgate-separated.c

90

struct clk *clk;

drivers/clk/imx/clk-cpu.c

14

struct clk *div;

drivers/clk/imx/clk-cpu.c

15

struct clk *mux;

drivers/clk/imx/clk-cpu.c

16

struct clk *pll;

drivers/clk/imx/clk-cpu.c

17

struct clk *step;

drivers/clk/imx/clk-cpu.c

76

struct clk *div, struct clk *mux, struct clk *pll,

drivers/clk/imx/clk-cpu.c

77

struct clk *step)

drivers/clk/imx/clk-imx1.c

25

static struct clk *clk[IMX1_CLK_MAX];

drivers/clk/imx/clk-imx1.c

40

clk[IMX1_CLK_DUMMY] = imx_clk_fixed("dummy", 0);

drivers/clk/imx/clk-imx1.c

41

clk[IMX1_CLK_CLK32] = imx_obtain_fixed_clock("clk32", 32768);

drivers/clk/imx/clk-imx1.c

42

clk[IMX1_CLK_CLK16M_EXT] = imx_clk_fixed("clk16m_ext", 16000000);

drivers/clk/imx/clk-imx1.c

43

clk[IMX1_CLK_CLK16M] = imx_clk_gate("clk16m", "clk16m_ext", CCM_CSCR, 17);

drivers/clk/imx/clk-imx1.c

44

clk[IMX1_CLK_CLK32_PREMULT] = imx_clk_fixed_factor("clk32_premult", "clk32", 512, 1);

drivers/clk/imx/clk-imx1.c

45

clk[IMX1_CLK_PREM] = imx_clk_mux("prem", CCM_CSCR, 16, 1, prem_sel_clks, ARRAY_SIZE(prem_sel_clks));

drivers/clk/imx/clk-imx1.c

46

clk[IMX1_CLK_MPLL] = imx_clk_pllv1(IMX_PLLV1_IMX1, "mpll", "clk32_premult", CCM_MPCTL0);

drivers/clk/imx/clk-imx1.c

47

clk[IMX1_CLK_MPLL_GATE] = imx_clk_gate("mpll_gate", "mpll", CCM_CSCR, 0);

drivers/clk/imx/clk-imx1.c

48

clk[IMX1_CLK_SPLL] = imx_clk_pllv1(IMX_PLLV1_IMX1, "spll", "prem", CCM_SPCTL0);

drivers/clk/imx/clk-imx1.c

49

clk[IMX1_CLK_SPLL_GATE] = imx_clk_gate("spll_gate", "spll", CCM_CSCR, 1);

drivers/clk/imx/clk-imx1.c

50

clk[IMX1_CLK_MCU] = imx_clk_divider("mcu", "clk32_premult", CCM_CSCR, 15, 1);

drivers/clk/imx/clk-imx1.c

51

clk[IMX1_CLK_FCLK] = imx_clk_divider("fclk", "mpll_gate", CCM_CSCR, 15, 1);

drivers/clk/imx/clk-imx1.c

52

clk[IMX1_CLK_HCLK] = imx_clk_divider("hclk", "spll_gate", CCM_CSCR, 10, 4);

drivers/clk/imx/clk-imx1.c

53

clk[IMX1_CLK_CLK48M] = imx_clk_divider("clk48m", "spll_gate", CCM_CSCR, 26, 3);

drivers/clk/imx/clk-imx1.c

54

clk[IMX1_CLK_PER1] = imx_clk_divider("per1", "spll_gate", CCM_PCDR, 0, 4);

drivers/clk/imx/clk-imx1.c

55

clk[IMX1_CLK_PER2] = imx_clk_divider("per2", "spll_gate", CCM_PCDR, 4, 4);

drivers/clk/imx/clk-imx1.c

56

clk[IMX1_CLK_PER3] = imx_clk_divider("per3", "spll_gate", CCM_PCDR, 16, 7);

drivers/clk/imx/clk-imx1.c

57

clk[IMX1_CLK_CLKO] = imx_clk_mux("clko", CCM_CSCR, 29, 3, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));

drivers/clk/imx/clk-imx1.c

58

clk[IMX1_CLK_UART3_GATE] = imx_clk_gate("uart3_gate", "hclk", SCM_GCCR, 6);

drivers/clk/imx/clk-imx1.c

59

clk[IMX1_CLK_SSI2_GATE] = imx_clk_gate("ssi2_gate", "hclk", SCM_GCCR, 5);

drivers/clk/imx/clk-imx1.c

60

clk[IMX1_CLK_BROM_GATE] = imx_clk_gate("brom_gate", "hclk", SCM_GCCR, 4);

drivers/clk/imx/clk-imx1.c

61

clk[IMX1_CLK_DMA_GATE] = imx_clk_gate("dma_gate", "hclk", SCM_GCCR, 3);

drivers/clk/imx/clk-imx1.c

62

clk[IMX1_CLK_CSI_GATE] = imx_clk_gate("csi_gate", "hclk", SCM_GCCR, 2);

drivers/clk/imx/clk-imx1.c

63

clk[IMX1_CLK_MMA_GATE] = imx_clk_gate("mma_gate", "hclk", SCM_GCCR, 1);

drivers/clk/imx/clk-imx1.c

64

clk[IMX1_CLK_USBD_GATE] = imx_clk_gate("usbd_gate", "clk48m", SCM_GCCR, 0);

drivers/clk/imx/clk-imx1.c

66

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-imx1.c

68

clk_data.clks = clk;

drivers/clk/imx/clk-imx1.c

69

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk-imx25.c

100

clk[per10_sel] = imx_clk_mux("per10_sel", ccm(CCM_MCR), 10, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

101

clk[per11_sel] = imx_clk_mux("per11_sel", ccm(CCM_MCR), 11, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

102

clk[per12_sel] = imx_clk_mux("per12_sel", ccm(CCM_MCR), 12, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

103

clk[per13_sel] = imx_clk_mux("per13_sel", ccm(CCM_MCR), 13, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

104

clk[per14_sel] = imx_clk_mux("per14_sel", ccm(CCM_MCR), 14, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

105

clk[per15_sel] = imx_clk_mux("per15_sel", ccm(CCM_MCR), 15, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

106

clk[cko_div] = imx_clk_divider("cko_div", "cko_sel", ccm(CCM_MCR), 24, 6);

drivers/clk/imx/clk-imx25.c

107

clk[cko_sel] = imx_clk_mux("cko_sel", ccm(CCM_MCR), 20, 4, cko_sel_clks, ARRAY_SIZE(cko_sel_clks));

drivers/clk/imx/clk-imx25.c

108

clk[cko] = imx_clk_gate("cko", "cko_div", ccm(CCM_MCR), 30);

drivers/clk/imx/clk-imx25.c

109

clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6);

drivers/clk/imx/clk-imx25.c

110

clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6);

drivers/clk/imx/clk-imx25.c

111

clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6);

drivers/clk/imx/clk-imx25.c

112

clk[per3] = imx_clk_divider("per3", "per3_sel", ccm(CCM_PCDR0), 24, 6);

drivers/clk/imx/clk-imx25.c

113

clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6);

drivers/clk/imx/clk-imx25.c

114

clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6);

drivers/clk/imx/clk-imx25.c

115

clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6);

drivers/clk/imx/clk-imx25.c

116

clk[per7] = imx_clk_divider("per7", "per7_sel", ccm(CCM_PCDR1), 24, 6);

drivers/clk/imx/clk-imx25.c

117

clk[per8] = imx_clk_divider("per8", "per8_sel", ccm(CCM_PCDR2), 0, 6);

drivers/clk/imx/clk-imx25.c

118

clk[per9] = imx_clk_divider("per9", "per9_sel", ccm(CCM_PCDR2), 8, 6);

drivers/clk/imx/clk-imx25.c

119

clk[per10] = imx_clk_divider("per10", "per10_sel", ccm(CCM_PCDR2), 16, 6);

drivers/clk/imx/clk-imx25.c

120

clk[per11] = imx_clk_divider("per11", "per11_sel", ccm(CCM_PCDR2), 24, 6);

drivers/clk/imx/clk-imx25.c

121

clk[per12] = imx_clk_divider("per12", "per12_sel", ccm(CCM_PCDR3), 0, 6);

drivers/clk/imx/clk-imx25.c

122

clk[per13] = imx_clk_divider("per13", "per13_sel", ccm(CCM_PCDR3), 8, 6);

drivers/clk/imx/clk-imx25.c

123

clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6);

drivers/clk/imx/clk-imx25.c

124

clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6);

drivers/clk/imx/clk-imx25.c

125

clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0);

drivers/clk/imx/clk-imx25.c

126

clk[epit_ipg_per] = imx_clk_gate("epit_ipg_per", "per1", ccm(CCM_CGCR0), 1);

drivers/clk/imx/clk-imx25.c

127

clk[esai_ipg_per] = imx_clk_gate("esai_ipg_per", "per2", ccm(CCM_CGCR0), 2);

drivers/clk/imx/clk-imx25.c

128

clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0), 3);

drivers/clk/imx/clk-imx25.c

129

clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4);

drivers/clk/imx/clk-imx25.c

130

clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5);

drivers/clk/imx/clk-imx25.c

131

clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6);

drivers/clk/imx/clk-imx25.c

132

clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7);

drivers/clk/imx/clk-imx25.c

133

clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8);

drivers/clk/imx/clk-imx25.c

134

clk[owire_ipg_per] = imx_clk_gate("owire_ipg_per", "per9", ccm(CCM_CGCR0), 9);

drivers/clk/imx/clk-imx25.c

135

clk[pwm_ipg_per] = imx_clk_gate("pwm_ipg_per", "per10", ccm(CCM_CGCR0), 10);

drivers/clk/imx/clk-imx25.c

136

clk[sim1_ipg_per] = imx_clk_gate("sim1_ipg_per", "per11", ccm(CCM_CGCR0), 11);

drivers/clk/imx/clk-imx25.c

137

clk[sim2_ipg_per] = imx_clk_gate("sim2_ipg_per", "per12", ccm(CCM_CGCR0), 12);

drivers/clk/imx/clk-imx25.c

138

clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);

drivers/clk/imx/clk-imx25.c

139

clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);

drivers/clk/imx/clk-imx25.c

140

clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);

drivers/clk/imx/clk-imx25.c

141

clk[ata_ahb] = imx_clk_gate("ata_ahb", "ahb", ccm(CCM_CGCR0), 16);

drivers/clk/imx/clk-imx25.c

143

clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18);

drivers/clk/imx/clk-imx25.c

144

clk[emi_ahb] = imx_clk_gate("emi_ahb", "ahb", ccm(CCM_CGCR0), 19);

drivers/clk/imx/clk-imx25.c

145

clk[esai_ahb] = imx_clk_gate("esai_ahb", "ahb", ccm(CCM_CGCR0), 20);

drivers/clk/imx/clk-imx25.c

146

clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21);

drivers/clk/imx/clk-imx25.c

147

clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22);

drivers/clk/imx/clk-imx25.c

148

clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23);

drivers/clk/imx/clk-imx25.c

149

clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24);

drivers/clk/imx/clk-imx25.c

150

clk[rtic_ahb] = imx_clk_gate("rtic_ahb", "ahb", ccm(CCM_CGCR0), 25);

drivers/clk/imx/clk-imx25.c

151

clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26);

drivers/clk/imx/clk-imx25.c

152

clk[slcdc_ahb] = imx_clk_gate("slcdc_ahb", "ahb", ccm(CCM_CGCR0), 27);

drivers/clk/imx/clk-imx25.c

153

clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28);

drivers/clk/imx/clk-imx25.c

156

clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2);

drivers/clk/imx/clk-imx25.c

157

clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3);

drivers/clk/imx/clk-imx25.c

158

clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4);

drivers/clk/imx/clk-imx25.c

159

clk[cspi1_ipg] = imx_clk_gate("cspi1_ipg", "ipg", ccm(CCM_CGCR1), 5);

drivers/clk/imx/clk-imx25.c

160

clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6);

drivers/clk/imx/clk-imx25.c

161

clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7);

drivers/clk/imx/clk-imx25.c

162

clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8);

drivers/clk/imx/clk-imx25.c

163

clk[ect_ipg] = imx_clk_gate("ect_ipg", "ipg", ccm(CCM_CGCR1), 9);

drivers/clk/imx/clk-imx25.c

164

clk[epit1_ipg] = imx_clk_gate("epit1_ipg", "ipg", ccm(CCM_CGCR1), 10);

drivers/clk/imx/clk-imx25.c

165

clk[epit2_ipg] = imx_clk_gate("epit2_ipg", "ipg", ccm(CCM_CGCR1), 11);

drivers/clk/imx/clk-imx25.c

167

clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13);

drivers/clk/imx/clk-imx25.c

168

clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14);

drivers/clk/imx/clk-imx25.c

169

clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15);

drivers/clk/imx/clk-imx25.c

173

clk[gpt1_ipg] = imx_clk_gate("gpt1_ipg", "ipg", ccm(CCM_CGCR1), 19);

drivers/clk/imx/clk-imx25.c

174

clk[gpt2_ipg] = imx_clk_gate("gpt2_ipg", "ipg", ccm(CCM_CGCR1), 20);

drivers/clk/imx/clk-imx25.c

175

clk[gpt3_ipg] = imx_clk_gate("gpt3_ipg", "ipg", ccm(CCM_CGCR1), 21);

drivers/clk/imx/clk-imx25.c

176

clk[gpt4_ipg] = imx_clk_gate("gpt4_ipg", "ipg", ccm(CCM_CGCR1), 22);

drivers/clk/imx/clk-imx25.c

180

clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26);

drivers/clk/imx/clk-imx25.c

183

clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28);

drivers/clk/imx/clk-imx25.c

184

clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29);

drivers/clk/imx/clk-imx25.c

186

clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31);

drivers/clk/imx/clk-imx25.c

187

clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2), 0);

drivers/clk/imx/clk-imx25.c

188

clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2), 1);

drivers/clk/imx/clk-imx25.c

189

clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2), 2);

drivers/clk/imx/clk-imx25.c

190

clk[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", ccm(CCM_CGCR2), 3);

drivers/clk/imx/clk-imx25.c

192

clk[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", ccm(CCM_CGCR2), 5);

drivers/clk/imx/clk-imx25.c

193

clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2), 6);

drivers/clk/imx/clk-imx25.c

194

clk[sim1_ipg] = imx_clk_gate("sim1_ipg", "ipg", ccm(CCM_CGCR2), 7);

drivers/clk/imx/clk-imx25.c

195

clk[sim2_ipg] = imx_clk_gate("sim2_ipg", "ipg", ccm(CCM_CGCR2), 8);

drivers/clk/imx/clk-imx25.c

196

clk[slcdc_ipg] = imx_clk_gate("slcdc_ipg", "ipg", ccm(CCM_CGCR2), 9);

drivers/clk/imx/clk-imx25.c

197

clk[spba_ipg] = imx_clk_gate("spba_ipg", "ipg", ccm(CCM_CGCR2), 10);

drivers/clk/imx/clk-imx25.c

198

clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11);

drivers/clk/imx/clk-imx25.c

199

clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12);

drivers/clk/imx/clk-imx25.c

200

clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13);

drivers/clk/imx/clk-imx25.c

201

clk[uart1_ipg] = imx_clk_gate("uart1_ipg", "ipg", ccm(CCM_CGCR2), 14);

drivers/clk/imx/clk-imx25.c

202

clk[uart2_ipg] = imx_clk_gate("uart2_ipg", "ipg", ccm(CCM_CGCR2), 15);

drivers/clk/imx/clk-imx25.c

203

clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16);

drivers/clk/imx/clk-imx25.c

204

clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17);

drivers/clk/imx/clk-imx25.c

205

clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18);

drivers/clk/imx/clk-imx25.c

207

clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19);

drivers/clk/imx/clk-imx25.c

209

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-imx25.c

211

clk_prepare_enable(clk[emi_ahb]);

drivers/clk/imx/clk-imx25.c

214

clk_set_parent(clk[per5_sel], clk[ahb]);

drivers/clk/imx/clk-imx25.c

220

clk_set_parent(clk[cko_sel], clk[ipg]);

drivers/clk/imx/clk-imx25.c

234

clk_data.clks = clk;

drivers/clk/imx/clk-imx25.c

235

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk-imx25.c

75

static struct clk *clk[clk_max];

drivers/clk/imx/clk-imx25.c

81

clk[dummy] = imx_clk_fixed("dummy", 0);

drivers/clk/imx/clk-imx25.c

82

clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "mpll", "osc", ccm(CCM_MPCTL));

drivers/clk/imx/clk-imx25.c

83

clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "upll", "osc", ccm(CCM_UPCTL));

drivers/clk/imx/clk-imx25.c

84

clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4);

drivers/clk/imx/clk-imx25.c

85

clk[cpu_sel] = imx_clk_mux("cpu_sel", ccm(CCM_CCTL), 14, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));

drivers/clk/imx/clk-imx25.c

86

clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2);

drivers/clk/imx/clk-imx25.c

87

clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2);

drivers/clk/imx/clk-imx25.c

88

clk[usb_div] = imx_clk_divider("usb_div", "upll", ccm(CCM_CCTL), 16, 6);

drivers/clk/imx/clk-imx25.c

89

clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);

drivers/clk/imx/clk-imx25.c

90

clk[per0_sel] = imx_clk_mux("per0_sel", ccm(CCM_MCR), 0, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

91

clk[per1_sel] = imx_clk_mux("per1_sel", ccm(CCM_MCR), 1, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

92

clk[per2_sel] = imx_clk_mux("per2_sel", ccm(CCM_MCR), 2, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

93

clk[per3_sel] = imx_clk_mux("per3_sel", ccm(CCM_MCR), 3, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

94

clk[per4_sel] = imx_clk_mux("per4_sel", ccm(CCM_MCR), 4, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

95

clk[per5_sel] = imx_clk_mux("per5_sel", ccm(CCM_MCR), 5, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

96

clk[per6_sel] = imx_clk_mux("per6_sel", ccm(CCM_MCR), 6, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

97

clk[per7_sel] = imx_clk_mux("per7_sel", ccm(CCM_MCR), 7, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

98

clk[per8_sel] = imx_clk_mux("per8_sel", ccm(CCM_MCR), 8, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx25.c

99

clk[per9_sel] = imx_clk_mux("per9_sel", ccm(CCM_MCR), 9, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));

drivers/clk/imx/clk-imx27.c

100

clk[IMX27_CLK_SSI1_IPG_GATE] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1);

drivers/clk/imx/clk-imx27.c

101

clk[IMX27_CLK_SLCDC_IPG_GATE] = imx_clk_gate("slcdc_ipg_gate", "ipg", CCM_PCCR0, 2);

drivers/clk/imx/clk-imx27.c

102

clk[IMX27_CLK_SDHC3_IPG_GATE] = imx_clk_gate("sdhc3_ipg_gate", "ipg", CCM_PCCR0, 3);

drivers/clk/imx/clk-imx27.c

103

clk[IMX27_CLK_SDHC2_IPG_GATE] = imx_clk_gate("sdhc2_ipg_gate", "ipg", CCM_PCCR0, 4);

drivers/clk/imx/clk-imx27.c

104

clk[IMX27_CLK_SDHC1_IPG_GATE] = imx_clk_gate("sdhc1_ipg_gate", "ipg", CCM_PCCR0, 5);

drivers/clk/imx/clk-imx27.c

105

clk[IMX27_CLK_SCC_IPG_GATE] = imx_clk_gate("scc_ipg_gate", "ipg", CCM_PCCR0, 6);

drivers/clk/imx/clk-imx27.c

106

clk[IMX27_CLK_SAHARA_IPG_GATE] = imx_clk_gate("sahara_ipg_gate", "ipg", CCM_PCCR0, 7);

drivers/clk/imx/clk-imx27.c

107

clk[IMX27_CLK_RTIC_IPG_GATE] = imx_clk_gate("rtic_ipg_gate", "ipg", CCM_PCCR0, 8);

drivers/clk/imx/clk-imx27.c

108

clk[IMX27_CLK_RTC_IPG_GATE] = imx_clk_gate("rtc_ipg_gate", "ipg", CCM_PCCR0, 9);

drivers/clk/imx/clk-imx27.c

109

clk[IMX27_CLK_PWM_IPG_GATE] = imx_clk_gate("pwm_ipg_gate", "ipg", CCM_PCCR0, 11);

drivers/clk/imx/clk-imx27.c

110

clk[IMX27_CLK_OWIRE_IPG_GATE] = imx_clk_gate("owire_ipg_gate", "ipg", CCM_PCCR0, 12);

drivers/clk/imx/clk-imx27.c

111

clk[IMX27_CLK_MSHC_IPG_GATE] = imx_clk_gate("mshc_ipg_gate", "ipg", CCM_PCCR0, 13);

drivers/clk/imx/clk-imx27.c

112

clk[IMX27_CLK_LCDC_IPG_GATE] = imx_clk_gate("lcdc_ipg_gate", "ipg", CCM_PCCR0, 14);

drivers/clk/imx/clk-imx27.c

113

clk[IMX27_CLK_KPP_IPG_GATE] = imx_clk_gate("kpp_ipg_gate", "ipg", CCM_PCCR0, 15);

drivers/clk/imx/clk-imx27.c

114

clk[IMX27_CLK_IIM_IPG_GATE] = imx_clk_gate("iim_ipg_gate", "ipg", CCM_PCCR0, 16);

drivers/clk/imx/clk-imx27.c

115

clk[IMX27_CLK_I2C2_IPG_GATE] = imx_clk_gate("i2c2_ipg_gate", "ipg", CCM_PCCR0, 17);

drivers/clk/imx/clk-imx27.c

116

clk[IMX27_CLK_I2C1_IPG_GATE] = imx_clk_gate("i2c1_ipg_gate", "ipg", CCM_PCCR0, 18);

drivers/clk/imx/clk-imx27.c

117

clk[IMX27_CLK_GPT6_IPG_GATE] = imx_clk_gate("gpt6_ipg_gate", "ipg", CCM_PCCR0, 19);

drivers/clk/imx/clk-imx27.c

118

clk[IMX27_CLK_GPT5_IPG_GATE] = imx_clk_gate("gpt5_ipg_gate", "ipg", CCM_PCCR0, 20);

drivers/clk/imx/clk-imx27.c

119

clk[IMX27_CLK_GPT4_IPG_GATE] = imx_clk_gate("gpt4_ipg_gate", "ipg", CCM_PCCR0, 21);

drivers/clk/imx/clk-imx27.c

120

clk[IMX27_CLK_GPT3_IPG_GATE] = imx_clk_gate("gpt3_ipg_gate", "ipg", CCM_PCCR0, 22);

drivers/clk/imx/clk-imx27.c

121

clk[IMX27_CLK_GPT2_IPG_GATE] = imx_clk_gate("gpt2_ipg_gate", "ipg", CCM_PCCR0, 23);

drivers/clk/imx/clk-imx27.c

122

clk[IMX27_CLK_GPT1_IPG_GATE] = imx_clk_gate("gpt1_ipg_gate", "ipg", CCM_PCCR0, 24);

drivers/clk/imx/clk-imx27.c

123

clk[IMX27_CLK_GPIO_IPG_GATE] = imx_clk_gate("gpio_ipg_gate", "ipg", CCM_PCCR0, 25);

drivers/clk/imx/clk-imx27.c

124

clk[IMX27_CLK_FEC_IPG_GATE] = imx_clk_gate("fec_ipg_gate", "ipg", CCM_PCCR0, 26);

drivers/clk/imx/clk-imx27.c

125

clk[IMX27_CLK_EMMA_IPG_GATE] = imx_clk_gate("emma_ipg_gate", "ipg", CCM_PCCR0, 27);

drivers/clk/imx/clk-imx27.c

126

clk[IMX27_CLK_DMA_IPG_GATE] = imx_clk_gate("dma_ipg_gate", "ipg", CCM_PCCR0, 28);

drivers/clk/imx/clk-imx27.c

127

clk[IMX27_CLK_CSPI3_IPG_GATE] = imx_clk_gate("cspi3_ipg_gate", "ipg", CCM_PCCR0, 29);

drivers/clk/imx/clk-imx27.c

128

clk[IMX27_CLK_CSPI2_IPG_GATE] = imx_clk_gate("cspi2_ipg_gate", "ipg", CCM_PCCR0, 30);

drivers/clk/imx/clk-imx27.c

129

clk[IMX27_CLK_CSPI1_IPG_GATE] = imx_clk_gate("cspi1_ipg_gate", "ipg", CCM_PCCR0, 31);

drivers/clk/imx/clk-imx27.c

130

clk[IMX27_CLK_MSHC_BAUD_GATE] = imx_clk_gate("mshc_baud_gate", "mshc_div", CCM_PCCR1, 2);

drivers/clk/imx/clk-imx27.c

131

clk[IMX27_CLK_NFC_BAUD_GATE] = imx_clk_gate("nfc_baud_gate", "nfc_div", CCM_PCCR1, 3);

drivers/clk/imx/clk-imx27.c

132

clk[IMX27_CLK_SSI2_BAUD_GATE] = imx_clk_gate("ssi2_baud_gate", "ssi2_div", CCM_PCCR1, 4);

drivers/clk/imx/clk-imx27.c

133

clk[IMX27_CLK_SSI1_BAUD_GATE] = imx_clk_gate("ssi1_baud_gate", "ssi1_div", CCM_PCCR1, 5);

drivers/clk/imx/clk-imx27.c

134

clk[IMX27_CLK_VPU_BAUD_GATE] = imx_clk_gate("vpu_baud_gate", "vpu_div", CCM_PCCR1, 6);

drivers/clk/imx/clk-imx27.c

135

clk[IMX27_CLK_PER4_GATE] = imx_clk_gate("per4_gate", "per4_div", CCM_PCCR1, 7);

drivers/clk/imx/clk-imx27.c

136

clk[IMX27_CLK_PER3_GATE] = imx_clk_gate("per3_gate", "per3_div", CCM_PCCR1, 8);

drivers/clk/imx/clk-imx27.c

137

clk[IMX27_CLK_PER2_GATE] = imx_clk_gate("per2_gate", "per2_div", CCM_PCCR1, 9);

drivers/clk/imx/clk-imx27.c

138

clk[IMX27_CLK_PER1_GATE] = imx_clk_gate("per1_gate", "per1_div", CCM_PCCR1, 10);

drivers/clk/imx/clk-imx27.c

139

clk[IMX27_CLK_USB_AHB_GATE] = imx_clk_gate("usb_ahb_gate", "ahb", CCM_PCCR1, 11);

drivers/clk/imx/clk-imx27.c

140

clk[IMX27_CLK_SLCDC_AHB_GATE] = imx_clk_gate("slcdc_ahb_gate", "ahb", CCM_PCCR1, 12);

drivers/clk/imx/clk-imx27.c

141

clk[IMX27_CLK_SAHARA_AHB_GATE] = imx_clk_gate("sahara_ahb_gate", "ahb", CCM_PCCR1, 13);

drivers/clk/imx/clk-imx27.c

142

clk[IMX27_CLK_RTIC_AHB_GATE] = imx_clk_gate("rtic_ahb_gate", "ahb", CCM_PCCR1, 14);

drivers/clk/imx/clk-imx27.c

143

clk[IMX27_CLK_LCDC_AHB_GATE] = imx_clk_gate("lcdc_ahb_gate", "ahb", CCM_PCCR1, 15);

drivers/clk/imx/clk-imx27.c

144

clk[IMX27_CLK_VPU_AHB_GATE] = imx_clk_gate("vpu_ahb_gate", "ahb", CCM_PCCR1, 16);

drivers/clk/imx/clk-imx27.c

145

clk[IMX27_CLK_FEC_AHB_GATE] = imx_clk_gate("fec_ahb_gate", "ahb", CCM_PCCR1, 17);

drivers/clk/imx/clk-imx27.c

146

clk[IMX27_CLK_EMMA_AHB_GATE] = imx_clk_gate("emma_ahb_gate", "ahb", CCM_PCCR1, 18);

drivers/clk/imx/clk-imx27.c

147

clk[IMX27_CLK_EMI_AHB_GATE] = imx_clk_gate("emi_ahb_gate", "ahb", CCM_PCCR1, 19);

drivers/clk/imx/clk-imx27.c

148

clk[IMX27_CLK_DMA_AHB_GATE] = imx_clk_gate("dma_ahb_gate", "ahb", CCM_PCCR1, 20);

drivers/clk/imx/clk-imx27.c

149

clk[IMX27_CLK_CSI_AHB_GATE] = imx_clk_gate("csi_ahb_gate", "ahb", CCM_PCCR1, 21);

drivers/clk/imx/clk-imx27.c

150

clk[IMX27_CLK_BROM_AHB_GATE] = imx_clk_gate("brom_ahb_gate", "ahb", CCM_PCCR1, 22);

drivers/clk/imx/clk-imx27.c

151

clk[IMX27_CLK_ATA_AHB_GATE] = imx_clk_gate("ata_ahb_gate", "ahb", CCM_PCCR1, 23);

drivers/clk/imx/clk-imx27.c

152

clk[IMX27_CLK_WDOG_IPG_GATE] = imx_clk_gate("wdog_ipg_gate", "ipg", CCM_PCCR1, 24);

drivers/clk/imx/clk-imx27.c

153

clk[IMX27_CLK_USB_IPG_GATE] = imx_clk_gate("usb_ipg_gate", "ipg", CCM_PCCR1, 25);

drivers/clk/imx/clk-imx27.c

154

clk[IMX27_CLK_UART6_IPG_GATE] = imx_clk_gate("uart6_ipg_gate", "ipg", CCM_PCCR1, 26);

drivers/clk/imx/clk-imx27.c

155

clk[IMX27_CLK_UART5_IPG_GATE] = imx_clk_gate("uart5_ipg_gate", "ipg", CCM_PCCR1, 27);

drivers/clk/imx/clk-imx27.c

156

clk[IMX27_CLK_UART4_IPG_GATE] = imx_clk_gate("uart4_ipg_gate", "ipg", CCM_PCCR1, 28);

drivers/clk/imx/clk-imx27.c

157

clk[IMX27_CLK_UART3_IPG_GATE] = imx_clk_gate("uart3_ipg_gate", "ipg", CCM_PCCR1, 29);

drivers/clk/imx/clk-imx27.c

158

clk[IMX27_CLK_UART2_IPG_GATE] = imx_clk_gate("uart2_ipg_gate", "ipg", CCM_PCCR1, 30);

drivers/clk/imx/clk-imx27.c

159

clk[IMX27_CLK_UART1_IPG_GATE] = imx_clk_gate("uart1_ipg_gate", "ipg", CCM_PCCR1, 31);

drivers/clk/imx/clk-imx27.c

161

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-imx27.c

163

clk_register_clkdev(clk[IMX27_CLK_CPU_DIV], NULL, "cpu0");

drivers/clk/imx/clk-imx27.c

165

clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]);

drivers/clk/imx/clk-imx27.c

188

clk_data.clks = clk;

drivers/clk/imx/clk-imx27.c

189

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk-imx27.c

48

static struct clk *clk[IMX27_CLK_MAX];

drivers/clk/imx/clk-imx27.c

55

clk[IMX27_CLK_DUMMY] = imx_clk_fixed("dummy", 0);

drivers/clk/imx/clk-imx27.c

56

clk[IMX27_CLK_CKIH] = imx_clk_fixed("ckih", fref);

drivers/clk/imx/clk-imx27.c

57

clk[IMX27_CLK_CKIL] = imx_clk_fixed("ckil", 32768);

drivers/clk/imx/clk-imx27.c

58

clk[IMX27_CLK_FPM] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1);

drivers/clk/imx/clk-imx27.c

59

clk[IMX27_CLK_CKIH_DIV1P5] = imx_clk_fixed_factor("ckih_div1p5", "ckih_gate", 2, 3);

drivers/clk/imx/clk-imx27.c

60

clk[IMX27_CLK_CKIH_GATE] = imx_clk_gate_dis("ckih_gate", "ckih", CCM_CSCR, 3);

drivers/clk/imx/clk-imx27.c

61

clk[IMX27_CLK_MPLL_OSC_SEL] = imx_clk_mux("mpll_osc_sel", CCM_CSCR, 4, 1, mpll_osc_sel_clks, ARRAY_SIZE(mpll_osc_sel_clks));

drivers/clk/imx/clk-imx27.c

62

clk[IMX27_CLK_MPLL_SEL] = imx_clk_mux("mpll_sel", CCM_CSCR, 16, 1, mpll_sel_clks, ARRAY_SIZE(mpll_sel_clks));

drivers/clk/imx/clk-imx27.c

63

clk[IMX27_CLK_MPLL] = imx_clk_pllv1(IMX_PLLV1_IMX27, "mpll", "mpll_sel", CCM_MPCTL0);

drivers/clk/imx/clk-imx27.c

64

clk[IMX27_CLK_SPLL] = imx_clk_pllv1(IMX_PLLV1_IMX27, "spll", "ckih_gate", CCM_SPCTL0);

drivers/clk/imx/clk-imx27.c

65

clk[IMX27_CLK_SPLL_GATE] = imx_clk_gate("spll_gate", "spll", CCM_CSCR, 1);

drivers/clk/imx/clk-imx27.c

66

clk[IMX27_CLK_MPLL_MAIN2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3);

drivers/clk/imx/clk-imx27.c

69

clk[IMX27_CLK_AHB] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 8, 2);

drivers/clk/imx/clk-imx27.c

70

clk[IMX27_CLK_IPG] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);

drivers/clk/imx/clk-imx27.c

72

clk[IMX27_CLK_AHB] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 9, 4);

drivers/clk/imx/clk-imx27.c

73

clk[IMX27_CLK_IPG] = imx_clk_divider("ipg", "ahb", CCM_CSCR, 8, 1);

drivers/clk/imx/clk-imx27.c

76

clk[IMX27_CLK_MSHC_DIV] = imx_clk_divider("mshc_div", "ahb", CCM_PCDR0, 0, 6);

drivers/clk/imx/clk-imx27.c

77

clk[IMX27_CLK_NFC_DIV] = imx_clk_divider("nfc_div", "ahb", CCM_PCDR0, 6, 4);

drivers/clk/imx/clk-imx27.c

78

clk[IMX27_CLK_PER1_DIV] = imx_clk_divider("per1_div", "mpll_main2", CCM_PCDR1, 0, 6);

drivers/clk/imx/clk-imx27.c

79

clk[IMX27_CLK_PER2_DIV] = imx_clk_divider("per2_div", "mpll_main2", CCM_PCDR1, 8, 6);

drivers/clk/imx/clk-imx27.c

80

clk[IMX27_CLK_PER3_DIV] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6);

drivers/clk/imx/clk-imx27.c

81

clk[IMX27_CLK_PER4_DIV] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);

drivers/clk/imx/clk-imx27.c

82

clk[IMX27_CLK_VPU_SEL] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));

drivers/clk/imx/clk-imx27.c

83

clk[IMX27_CLK_VPU_DIV] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6);

drivers/clk/imx/clk-imx27.c

84

clk[IMX27_CLK_USB_DIV] = imx_clk_divider("usb_div", "spll_gate", CCM_CSCR, 28, 3);

drivers/clk/imx/clk-imx27.c

85

clk[IMX27_CLK_CPU_SEL] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));

drivers/clk/imx/clk-imx27.c

86

clk[IMX27_CLK_CLKO_SEL] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));

drivers/clk/imx/clk-imx27.c

89

clk[IMX27_CLK_CPU_DIV] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 12, 2);

drivers/clk/imx/clk-imx27.c

91

clk[IMX27_CLK_CPU_DIV] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 13, 3);

drivers/clk/imx/clk-imx27.c

93

clk[IMX27_CLK_CLKO_DIV] = imx_clk_divider("clko_div", "clko_sel", CCM_PCDR0, 22, 3);

drivers/clk/imx/clk-imx27.c

94

clk[IMX27_CLK_SSI1_SEL] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));

drivers/clk/imx/clk-imx27.c

95

clk[IMX27_CLK_SSI2_SEL] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));

drivers/clk/imx/clk-imx27.c

96

clk[IMX27_CLK_SSI1_DIV] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6);

drivers/clk/imx/clk-imx27.c

97

clk[IMX27_CLK_SSI2_DIV] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 6);

drivers/clk/imx/clk-imx27.c

98

clk[IMX27_CLK_CLKO_EN] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0);

drivers/clk/imx/clk-imx27.c

99

clk[IMX27_CLK_SSI2_IPG_GATE] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0);

drivers/clk/imx/clk-imx31.c

100

clk[usb_gate] = imx_clk_gate2("usb_gate", "ahb", base + MXC_CCM_CGR1, 18);

drivers/clk/imx/clk-imx31.c

101

clk[kpp_gate] = imx_clk_gate2("kpp_gate", "ipg", base + MXC_CCM_CGR1, 20);

drivers/clk/imx/clk-imx31.c

102

clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MXC_CCM_CGR1, 22);

drivers/clk/imx/clk-imx31.c

103

clk[uart3_gate] = imx_clk_gate2("uart3_gate", "per", base + MXC_CCM_CGR1, 24);

drivers/clk/imx/clk-imx31.c

104

clk[uart4_gate] = imx_clk_gate2("uart4_gate", "per", base + MXC_CCM_CGR1, 26);

drivers/clk/imx/clk-imx31.c

105

clk[uart5_gate] = imx_clk_gate2("uart5_gate", "per", base + MXC_CCM_CGR1, 28);

drivers/clk/imx/clk-imx31.c

106

clk[owire_gate] = imx_clk_gate2("owire_gate", "per", base + MXC_CCM_CGR1, 30);

drivers/clk/imx/clk-imx31.c

107

clk[ssi2_gate] = imx_clk_gate2("ssi2_gate", "spll", base + MXC_CCM_CGR2, 0);

drivers/clk/imx/clk-imx31.c

108

clk[cspi1_gate] = imx_clk_gate2("cspi1_gate", "ipg", base + MXC_CCM_CGR2, 2);

drivers/clk/imx/clk-imx31.c

109

clk[cspi2_gate] = imx_clk_gate2("cspi2_gate", "ipg", base + MXC_CCM_CGR2, 4);

drivers/clk/imx/clk-imx31.c

110

clk[gacc_gate] = imx_clk_gate2("gacc_gate", "per", base + MXC_CCM_CGR2, 6);

drivers/clk/imx/clk-imx31.c

111

clk[emi_gate] = imx_clk_gate2("emi_gate", "ahb", base + MXC_CCM_CGR2, 8);

drivers/clk/imx/clk-imx31.c

112

clk[rtic_gate] = imx_clk_gate2("rtic_gate", "ahb", base + MXC_CCM_CGR2, 10);

drivers/clk/imx/clk-imx31.c

113

clk[firi_gate] = imx_clk_gate2("firi_gate", "upll", base+MXC_CCM_CGR2, 12);

drivers/clk/imx/clk-imx31.c

115

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-imx31.c

117

clk_set_parent(clk[csi], clk[upll]);

drivers/clk/imx/clk-imx31.c

118

clk_prepare_enable(clk[emi_gate]);

drivers/clk/imx/clk-imx31.c

119

clk_prepare_enable(clk[iim_gate]);

drivers/clk/imx/clk-imx31.c

121

clk_disable_unprepare(clk[iim_gate]);

drivers/clk/imx/clk-imx31.c

143

clk_data.clks = clk;

drivers/clk/imx/clk-imx31.c

144

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk-imx31.c

50

static struct clk *clk[clk_max];

drivers/clk/imx/clk-imx31.c

55

clk[dummy] = imx_clk_fixed("dummy", 0);

drivers/clk/imx/clk-imx31.c

56

clk[ckih] = imx_clk_fixed("ckih", fref);

drivers/clk/imx/clk-imx31.c

57

clk[ckil] = imx_clk_fixed("ckil", 32768);

drivers/clk/imx/clk-imx31.c

58

clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "mpll", "ckih", base + MXC_CCM_MPCTL);

drivers/clk/imx/clk-imx31.c

59

clk[spll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "spll", "ckih", base + MXC_CCM_SRPCTL);

drivers/clk/imx/clk-imx31.c

60

clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "upll", "ckih", base + MXC_CCM_UPCTL);

drivers/clk/imx/clk-imx31.c

61

clk[mcu_main] = imx_clk_mux("mcu_main", base + MXC_CCM_PMCR0, 31, 1, mcu_main_sel, ARRAY_SIZE(mcu_main_sel));

drivers/clk/imx/clk-imx31.c

62

clk[hsp] = imx_clk_divider("hsp", "mcu_main", base + MXC_CCM_PDR0, 11, 3);

drivers/clk/imx/clk-imx31.c

63

clk[ahb] = imx_clk_divider("ahb", "mcu_main", base + MXC_CCM_PDR0, 3, 3);

drivers/clk/imx/clk-imx31.c

64

clk[nfc] = imx_clk_divider("nfc", "ahb", base + MXC_CCM_PDR0, 8, 3);

drivers/clk/imx/clk-imx31.c

65

clk[ipg] = imx_clk_divider("ipg", "ahb", base + MXC_CCM_PDR0, 6, 2);

drivers/clk/imx/clk-imx31.c

66

clk[per_div] = imx_clk_divider("per_div", "upll", base + MXC_CCM_PDR0, 16, 5);

drivers/clk/imx/clk-imx31.c

67

clk[per] = imx_clk_mux("per", base + MXC_CCM_CCMR, 24, 1, per_sel, ARRAY_SIZE(per_sel));

drivers/clk/imx/clk-imx31.c

68

clk[csi] = imx_clk_mux("csi_sel", base + MXC_CCM_CCMR, 25, 1, csi_sel, ARRAY_SIZE(csi_sel));

drivers/clk/imx/clk-imx31.c

69

clk[fir] = imx_clk_mux("fir_sel", base + MXC_CCM_CCMR, 11, 2, fir_sel, ARRAY_SIZE(fir_sel));

drivers/clk/imx/clk-imx31.c

70

clk[csi_div] = imx_clk_divider("csi_div", "csi_sel", base + MXC_CCM_PDR0, 23, 9);

drivers/clk/imx/clk-imx31.c

71

clk[usb_div_pre] = imx_clk_divider("usb_div_pre", "upll", base + MXC_CCM_PDR1, 30, 2);

drivers/clk/imx/clk-imx31.c

72

clk[usb_div_post] = imx_clk_divider("usb_div_post", "usb_div_pre", base + MXC_CCM_PDR1, 27, 3);

drivers/clk/imx/clk-imx31.c

73

clk[fir_div_pre] = imx_clk_divider("fir_div_pre", "fir_sel", base + MXC_CCM_PDR1, 24, 3);

drivers/clk/imx/clk-imx31.c

74

clk[fir_div_post] = imx_clk_divider("fir_div_post", "fir_div_pre", base + MXC_CCM_PDR1, 23, 6);

drivers/clk/imx/clk-imx31.c

75

clk[sdhc1_gate] = imx_clk_gate2("sdhc1_gate", "per", base + MXC_CCM_CGR0, 0);

drivers/clk/imx/clk-imx31.c

76

clk[sdhc2_gate] = imx_clk_gate2("sdhc2_gate", "per", base + MXC_CCM_CGR0, 2);

drivers/clk/imx/clk-imx31.c

77

clk[gpt_gate] = imx_clk_gate2("gpt_gate", "per", base + MXC_CCM_CGR0, 4);

drivers/clk/imx/clk-imx31.c

78

clk[epit1_gate] = imx_clk_gate2("epit1_gate", "per", base + MXC_CCM_CGR0, 6);

drivers/clk/imx/clk-imx31.c

79

clk[epit2_gate] = imx_clk_gate2("epit2_gate", "per", base + MXC_CCM_CGR0, 8);

drivers/clk/imx/clk-imx31.c

80

clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MXC_CCM_CGR0, 10);

drivers/clk/imx/clk-imx31.c

81

clk[ata_gate] = imx_clk_gate2("ata_gate", "ipg", base + MXC_CCM_CGR0, 12);

drivers/clk/imx/clk-imx31.c

82

clk[sdma_gate] = imx_clk_gate2("sdma_gate", "ahb", base + MXC_CCM_CGR0, 14);

drivers/clk/imx/clk-imx31.c

83

clk[cspi3_gate] = imx_clk_gate2("cspi3_gate", "ipg", base + MXC_CCM_CGR0, 16);

drivers/clk/imx/clk-imx31.c

84

clk[rng_gate] = imx_clk_gate2("rng_gate", "ipg", base + MXC_CCM_CGR0, 18);

drivers/clk/imx/clk-imx31.c

85

clk[uart1_gate] = imx_clk_gate2("uart1_gate", "per", base + MXC_CCM_CGR0, 20);

drivers/clk/imx/clk-imx31.c

86

clk[uart2_gate] = imx_clk_gate2("uart2_gate", "per", base + MXC_CCM_CGR0, 22);

drivers/clk/imx/clk-imx31.c

87

clk[ssi1_gate] = imx_clk_gate2("ssi1_gate", "spll", base + MXC_CCM_CGR0, 24);

drivers/clk/imx/clk-imx31.c

88

clk[i2c1_gate] = imx_clk_gate2("i2c1_gate", "per", base + MXC_CCM_CGR0, 26);

drivers/clk/imx/clk-imx31.c

89

clk[i2c2_gate] = imx_clk_gate2("i2c2_gate", "per", base + MXC_CCM_CGR0, 28);

drivers/clk/imx/clk-imx31.c

90

clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per", base + MXC_CCM_CGR0, 30);

drivers/clk/imx/clk-imx31.c

91

clk[hantro_gate] = imx_clk_gate2("hantro_gate", "per", base + MXC_CCM_CGR1, 0);

drivers/clk/imx/clk-imx31.c

92

clk[mstick1_gate] = imx_clk_gate2("mstick1_gate", "per", base + MXC_CCM_CGR1, 2);

drivers/clk/imx/clk-imx31.c

93

clk[mstick2_gate] = imx_clk_gate2("mstick2_gate", "per", base + MXC_CCM_CGR1, 4);

drivers/clk/imx/clk-imx31.c

94

clk[csi_gate] = imx_clk_gate2("csi_gate", "csi_div", base + MXC_CCM_CGR1, 6);

drivers/clk/imx/clk-imx31.c

95

clk[rtc_gate] = imx_clk_gate2("rtc_gate", "ipg", base + MXC_CCM_CGR1, 8);

drivers/clk/imx/clk-imx31.c

96

clk[wdog_gate] = imx_clk_gate2("wdog_gate", "ipg", base + MXC_CCM_CGR1, 10);

drivers/clk/imx/clk-imx31.c

97

clk[pwm_gate] = imx_clk_gate2("pwm_gate", "per", base + MXC_CCM_CGR1, 12);

drivers/clk/imx/clk-imx31.c

98

clk[sim_gate] = imx_clk_gate2("sim_gate", "per", base + MXC_CCM_CGR1, 14);

drivers/clk/imx/clk-imx31.c

99

clk[ect_gate] = imx_clk_gate2("ect_gate", "per", base + MXC_CCM_CGR1, 16);

drivers/clk/imx/clk-imx35.c

106

clk[ckih] = imx_clk_fixed("ckih", 24000000);

drivers/clk/imx/clk-imx35.c

107

clk[ckil] = imx_clk_fixed("ckil", 32768);

drivers/clk/imx/clk-imx35.c

108

clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "mpll", "ckih", base + MX35_CCM_MPCTL);

drivers/clk/imx/clk-imx35.c

109

clk[ppll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "ppll", "ckih", base + MX35_CCM_PPCTL);

drivers/clk/imx/clk-imx35.c

111

clk[mpll] = imx_clk_fixed_factor("mpll_075", "mpll", 3, 4);

drivers/clk/imx/clk-imx35.c

114

clk[arm] = imx_clk_fixed_factor("arm", "mpll_075", 1, aad->arm);

drivers/clk/imx/clk-imx35.c

116

clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm);

drivers/clk/imx/clk-imx35.c

118

if (clk_get_rate(clk[arm]) > 400000000)

drivers/clk/imx/clk-imx35.c

129

clk[hsp] = imx_clk_fixed_factor("hsp", "arm", 1, hsp_div[hsp_sel]);

drivers/clk/imx/clk-imx35.c

131

clk[ahb] = imx_clk_fixed_factor("ahb", "arm", 1, aad->ahb);

drivers/clk/imx/clk-imx35.c

132

clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);

drivers/clk/imx/clk-imx35.c

134

clk[arm_per_div] = imx_clk_divider("arm_per_div", "arm", base + MX35_CCM_PDR4, 16, 6);

drivers/clk/imx/clk-imx35.c

135

clk[ahb_per_div] = imx_clk_divider("ahb_per_div", "ahb", base + MXC_CCM_PDR0, 12, 3);

drivers/clk/imx/clk-imx35.c

136

clk[ipg_per] = imx_clk_mux("ipg_per", base + MXC_CCM_PDR0, 26, 1, ipg_per_sel, ARRAY_SIZE(ipg_per_sel));

drivers/clk/imx/clk-imx35.c

138

clk[uart_sel] = imx_clk_mux("uart_sel", base + MX35_CCM_PDR3, 14, 1, std_sel, ARRAY_SIZE(std_sel));

drivers/clk/imx/clk-imx35.c

139

clk[uart_div] = imx_clk_divider("uart_div", "uart_sel", base + MX35_CCM_PDR4, 10, 6);

drivers/clk/imx/clk-imx35.c

141

clk[esdhc_sel] = imx_clk_mux("esdhc_sel", base + MX35_CCM_PDR4, 9, 1, std_sel, ARRAY_SIZE(std_sel));

drivers/clk/imx/clk-imx35.c

142

clk[esdhc1_div] = imx_clk_divider("esdhc1_div", "esdhc_sel", base + MX35_CCM_PDR3, 0, 6);

drivers/clk/imx/clk-imx35.c

143

clk[esdhc2_div] = imx_clk_divider("esdhc2_div", "esdhc_sel", base + MX35_CCM_PDR3, 8, 6);

drivers/clk/imx/clk-imx35.c

144

clk[esdhc3_div] = imx_clk_divider("esdhc3_div", "esdhc_sel", base + MX35_CCM_PDR3, 16, 6);

drivers/clk/imx/clk-imx35.c

146

clk[spdif_sel] = imx_clk_mux("spdif_sel", base + MX35_CCM_PDR3, 22, 1, std_sel, ARRAY_SIZE(std_sel));

drivers/clk/imx/clk-imx35.c

147

clk[spdif_div_pre] = imx_clk_divider("spdif_div_pre", "spdif_sel", base + MX35_CCM_PDR3, 29, 3); /* divide by 1 not allowed */

drivers/clk/imx/clk-imx35.c

148

clk[spdif_div_post] = imx_clk_divider("spdif_div_post", "spdif_div_pre", base + MX35_CCM_PDR3, 23, 6);

drivers/clk/imx/clk-imx35.c

150

clk[ssi_sel] = imx_clk_mux("ssi_sel", base + MX35_CCM_PDR2, 6, 1, std_sel, ARRAY_SIZE(std_sel));

drivers/clk/imx/clk-imx35.c

151

clk[ssi1_div_pre] = imx_clk_divider("ssi1_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 24, 3);

drivers/clk/imx/clk-imx35.c

152

clk[ssi1_div_post] = imx_clk_divider("ssi1_div_post", "ssi1_div_pre", base + MX35_CCM_PDR2, 0, 6);

drivers/clk/imx/clk-imx35.c

153

clk[ssi2_div_pre] = imx_clk_divider("ssi2_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 27, 3);

drivers/clk/imx/clk-imx35.c

154

clk[ssi2_div_post] = imx_clk_divider("ssi2_div_post", "ssi2_div_pre", base + MX35_CCM_PDR2, 8, 6);

drivers/clk/imx/clk-imx35.c

156

clk[usb_sel] = imx_clk_mux("usb_sel", base + MX35_CCM_PDR4, 9, 1, std_sel, ARRAY_SIZE(std_sel));

drivers/clk/imx/clk-imx35.c

157

clk[usb_div] = imx_clk_divider("usb_div", "usb_sel", base + MX35_CCM_PDR4, 22, 6);

drivers/clk/imx/clk-imx35.c

159

clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4);

drivers/clk/imx/clk-imx35.c

161

clk[csi_sel] = imx_clk_mux("csi_sel", base + MX35_CCM_PDR2, 7, 1, std_sel, ARRAY_SIZE(std_sel));

drivers/clk/imx/clk-imx35.c

162

clk[csi_div] = imx_clk_divider("csi_div", "csi_sel", base + MX35_CCM_PDR2, 16, 6);

drivers/clk/imx/clk-imx35.c

164

clk[asrc_gate] = imx_clk_gate2("asrc_gate", "ipg", base + MX35_CCM_CGR0, 0);

drivers/clk/imx/clk-imx35.c

165

clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", base + MX35_CCM_CGR0, 2);

drivers/clk/imx/clk-imx35.c

166

clk[audmux_gate] = imx_clk_gate2("audmux_gate", "ipg", base + MX35_CCM_CGR0, 4);

drivers/clk/imx/clk-imx35.c

167

clk[can1_gate] = imx_clk_gate2("can1_gate", "ipg", base + MX35_CCM_CGR0, 6);

drivers/clk/imx/clk-imx35.c

168

clk[can2_gate] = imx_clk_gate2("can2_gate", "ipg", base + MX35_CCM_CGR0, 8);

drivers/clk/imx/clk-imx35.c

169

clk[cspi1_gate] = imx_clk_gate2("cspi1_gate", "ipg", base + MX35_CCM_CGR0, 10);

drivers/clk/imx/clk-imx35.c

170

clk[cspi2_gate] = imx_clk_gate2("cspi2_gate", "ipg", base + MX35_CCM_CGR0, 12);

drivers/clk/imx/clk-imx35.c

171

clk[ect_gate] = imx_clk_gate2("ect_gate", "ipg", base + MX35_CCM_CGR0, 14);

drivers/clk/imx/clk-imx35.c

172

clk[edio_gate] = imx_clk_gate2("edio_gate", "ipg", base + MX35_CCM_CGR0, 16);

drivers/clk/imx/clk-imx35.c

173

clk[emi_gate] = imx_clk_gate2("emi_gate", "ipg", base + MX35_CCM_CGR0, 18);

drivers/clk/imx/clk-imx35.c

174

clk[epit1_gate] = imx_clk_gate2("epit1_gate", "ipg", base + MX35_CCM_CGR0, 20);

drivers/clk/imx/clk-imx35.c

175

clk[epit2_gate] = imx_clk_gate2("epit2_gate", "ipg", base + MX35_CCM_CGR0, 22);

drivers/clk/imx/clk-imx35.c

176

clk[esai_gate] = imx_clk_gate2("esai_gate", "ipg", base + MX35_CCM_CGR0, 24);

drivers/clk/imx/clk-imx35.c

177

clk[esdhc1_gate] = imx_clk_gate2("esdhc1_gate", "esdhc1_div", base + MX35_CCM_CGR0, 26);

drivers/clk/imx/clk-imx35.c

178

clk[esdhc2_gate] = imx_clk_gate2("esdhc2_gate", "esdhc2_div", base + MX35_CCM_CGR0, 28);

drivers/clk/imx/clk-imx35.c

179

clk[esdhc3_gate] = imx_clk_gate2("esdhc3_gate", "esdhc3_div", base + MX35_CCM_CGR0, 30);

drivers/clk/imx/clk-imx35.c

181

clk[fec_gate] = imx_clk_gate2("fec_gate", "ipg", base + MX35_CCM_CGR1, 0);

drivers/clk/imx/clk-imx35.c

182

clk[gpio1_gate] = imx_clk_gate2("gpio1_gate", "ipg", base + MX35_CCM_CGR1, 2);

drivers/clk/imx/clk-imx35.c

183

clk[gpio2_gate] = imx_clk_gate2("gpio2_gate", "ipg", base + MX35_CCM_CGR1, 4);

drivers/clk/imx/clk-imx35.c

184

clk[gpio3_gate] = imx_clk_gate2("gpio3_gate", "ipg", base + MX35_CCM_CGR1, 6);

drivers/clk/imx/clk-imx35.c

185

clk[gpt_gate] = imx_clk_gate2("gpt_gate", "ipg", base + MX35_CCM_CGR1, 8);

drivers/clk/imx/clk-imx35.c

186

clk[i2c1_gate] = imx_clk_gate2("i2c1_gate", "ipg_per", base + MX35_CCM_CGR1, 10);

drivers/clk/imx/clk-imx35.c

187

clk[i2c2_gate] = imx_clk_gate2("i2c2_gate", "ipg_per", base + MX35_CCM_CGR1, 12);

drivers/clk/imx/clk-imx35.c

188

clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "ipg_per", base + MX35_CCM_CGR1, 14);

drivers/clk/imx/clk-imx35.c

189

clk[iomuxc_gate] = imx_clk_gate2("iomuxc_gate", "ipg", base + MX35_CCM_CGR1, 16);

drivers/clk/imx/clk-imx35.c

190

clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MX35_CCM_CGR1, 18);

drivers/clk/imx/clk-imx35.c

191

clk[kpp_gate] = imx_clk_gate2("kpp_gate", "ipg", base + MX35_CCM_CGR1, 20);

drivers/clk/imx/clk-imx35.c

192

clk[mlb_gate] = imx_clk_gate2("mlb_gate", "ahb", base + MX35_CCM_CGR1, 22);

drivers/clk/imx/clk-imx35.c

193

clk[mshc_gate] = imx_clk_gate2("mshc_gate", "dummy", base + MX35_CCM_CGR1, 24);

drivers/clk/imx/clk-imx35.c

194

clk[owire_gate] = imx_clk_gate2("owire_gate", "ipg_per", base + MX35_CCM_CGR1, 26);

drivers/clk/imx/clk-imx35.c

195

clk[pwm_gate] = imx_clk_gate2("pwm_gate", "ipg_per", base + MX35_CCM_CGR1, 28);

drivers/clk/imx/clk-imx35.c

196

clk[rngc_gate] = imx_clk_gate2("rngc_gate", "ipg", base + MX35_CCM_CGR1, 30);

drivers/clk/imx/clk-imx35.c

198

clk[rtc_gate] = imx_clk_gate2("rtc_gate", "ipg", base + MX35_CCM_CGR2, 0);

drivers/clk/imx/clk-imx35.c

199

clk[rtic_gate] = imx_clk_gate2("rtic_gate", "ahb", base + MX35_CCM_CGR2, 2);

drivers/clk/imx/clk-imx35.c

200

clk[scc_gate] = imx_clk_gate2("scc_gate", "ipg", base + MX35_CCM_CGR2, 4);

drivers/clk/imx/clk-imx35.c

201

clk[sdma_gate] = imx_clk_gate2("sdma_gate", "ahb", base + MX35_CCM_CGR2, 6);

drivers/clk/imx/clk-imx35.c

202

clk[spba_gate] = imx_clk_gate2("spba_gate", "ipg", base + MX35_CCM_CGR2, 8);

drivers/clk/imx/clk-imx35.c

203

clk[spdif_gate] = imx_clk_gate2("spdif_gate", "spdif_div_post", base + MX35_CCM_CGR2, 10);

drivers/clk/imx/clk-imx35.c

204

clk[ssi1_gate] = imx_clk_gate2("ssi1_gate", "ssi1_div_post", base + MX35_CCM_CGR2, 12);

drivers/clk/imx/clk-imx35.c

205

clk[ssi2_gate] = imx_clk_gate2("ssi2_gate", "ssi2_div_post", base + MX35_CCM_CGR2, 14);

drivers/clk/imx/clk-imx35.c

206

clk[uart1_gate] = imx_clk_gate2("uart1_gate", "uart_div", base + MX35_CCM_CGR2, 16);

drivers/clk/imx/clk-imx35.c

207

clk[uart2_gate] = imx_clk_gate2("uart2_gate", "uart_div", base + MX35_CCM_CGR2, 18);

drivers/clk/imx/clk-imx35.c

208

clk[uart3_gate] = imx_clk_gate2("uart3_gate", "uart_div", base + MX35_CCM_CGR2, 20);

drivers/clk/imx/clk-imx35.c

209

clk[usbotg_gate] = imx_clk_gate2("usbotg_gate", "ahb", base + MX35_CCM_CGR2, 22);

drivers/clk/imx/clk-imx35.c

210

clk[wdog_gate] = imx_clk_gate2("wdog_gate", "ipg", base + MX35_CCM_CGR2, 24);

drivers/clk/imx/clk-imx35.c

211

clk[max_gate] = imx_clk_gate2("max_gate", "dummy", base + MX35_CCM_CGR2, 26);

drivers/clk/imx/clk-imx35.c

212

clk[admux_gate] = imx_clk_gate2("admux_gate", "ipg", base + MX35_CCM_CGR2, 30);

drivers/clk/imx/clk-imx35.c

214

clk[csi_gate] = imx_clk_gate2("csi_gate", "csi_div", base + MX35_CCM_CGR3, 0);

drivers/clk/imx/clk-imx35.c

215

clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MX35_CCM_CGR3, 2);

drivers/clk/imx/clk-imx35.c

216

clk[gpu2d_gate] = imx_clk_gate2("gpu2d_gate", "ahb", base + MX35_CCM_CGR3, 4);

drivers/clk/imx/clk-imx35.c

218

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-imx35.c

220

clk_prepare_enable(clk[spba_gate]);

drivers/clk/imx/clk-imx35.c

221

clk_prepare_enable(clk[gpio1_gate]);

drivers/clk/imx/clk-imx35.c

222

clk_prepare_enable(clk[gpio2_gate]);

drivers/clk/imx/clk-imx35.c

223

clk_prepare_enable(clk[gpio3_gate]);

drivers/clk/imx/clk-imx35.c

224

clk_prepare_enable(clk[iim_gate]);

drivers/clk/imx/clk-imx35.c

225

clk_prepare_enable(clk[emi_gate]);

drivers/clk/imx/clk-imx35.c

226

clk_prepare_enable(clk[max_gate]);

drivers/clk/imx/clk-imx35.c

227

clk_prepare_enable(clk[iomuxc_gate]);

drivers/clk/imx/clk-imx35.c

235

clk_prepare_enable(clk[scc_gate]);

drivers/clk/imx/clk-imx35.c

246

clk_data.clks = clk;

drivers/clk/imx/clk-imx35.c

247

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk-imx35.c

82

static struct clk *clk[clk_max];

drivers/clk/imx/clk-imx5.c

128

static struct clk *clk[IMX5_CLK_END];

drivers/clk/imx/clk-imx5.c

133

clk[IMX5_CLK_DUMMY] = imx_clk_fixed("dummy", 0);

drivers/clk/imx/clk-imx5.c

134

clk[IMX5_CLK_CKIL] = imx_obtain_fixed_clock("ckil", 0);

drivers/clk/imx/clk-imx5.c

135

clk[IMX5_CLK_OSC] = imx_obtain_fixed_clock("osc", 0);

drivers/clk/imx/clk-imx5.c

136

clk[IMX5_CLK_CKIH1] = imx_obtain_fixed_clock("ckih1", 0);

drivers/clk/imx/clk-imx5.c

137

clk[IMX5_CLK_CKIH2] = imx_obtain_fixed_clock("ckih2", 0);

drivers/clk/imx/clk-imx5.c

139

clk[IMX5_CLK_PER_LP_APM] = imx_clk_mux("per_lp_apm", MXC_CCM_CBCMR, 1, 1,

drivers/clk/imx/clk-imx5.c

141

clk[IMX5_CLK_PER_PRED1] = imx_clk_divider("per_pred1", "per_lp_apm", MXC_CCM_CBCDR, 6, 2);

drivers/clk/imx/clk-imx5.c

142

clk[IMX5_CLK_PER_PRED2] = imx_clk_divider("per_pred2", "per_pred1", MXC_CCM_CBCDR, 3, 3);

drivers/clk/imx/clk-imx5.c

143

clk[IMX5_CLK_PER_PODF] = imx_clk_divider("per_podf", "per_pred2", MXC_CCM_CBCDR, 0, 3);

drivers/clk/imx/clk-imx5.c

144

clk[IMX5_CLK_PER_ROOT] = imx_clk_mux("per_root", MXC_CCM_CBCMR, 0, 1,

drivers/clk/imx/clk-imx5.c

146

clk[IMX5_CLK_AHB] = imx_clk_divider("ahb", "main_bus", MXC_CCM_CBCDR, 10, 3);

drivers/clk/imx/clk-imx5.c

147

clk[IMX5_CLK_AHB_MAX] = imx_clk_gate2_flags("ahb_max", "ahb", MXC_CCM_CCGR0, 28, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

148

clk[IMX5_CLK_AIPS_TZ1] = imx_clk_gate2_flags("aips_tz1", "ahb", MXC_CCM_CCGR0, 24, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

149

clk[IMX5_CLK_AIPS_TZ2] = imx_clk_gate2_flags("aips_tz2", "ahb", MXC_CCM_CCGR0, 26, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

150

clk[IMX5_CLK_TMAX1] = imx_clk_gate2_flags("tmax1", "ahb", MXC_CCM_CCGR1, 0, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

151

clk[IMX5_CLK_TMAX2] = imx_clk_gate2_flags("tmax2", "ahb", MXC_CCM_CCGR1, 2, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

152

clk[IMX5_CLK_TMAX3] = imx_clk_gate2_flags("tmax3", "ahb", MXC_CCM_CCGR1, 4, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

153

clk[IMX5_CLK_SPBA] = imx_clk_gate2_flags("spba", "ipg", MXC_CCM_CCGR5, 0, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

154

clk[IMX5_CLK_IPG] = imx_clk_divider("ipg", "ahb", MXC_CCM_CBCDR, 8, 2);

drivers/clk/imx/clk-imx5.c

155

clk[IMX5_CLK_AXI_A] = imx_clk_divider("axi_a", "main_bus", MXC_CCM_CBCDR, 16, 3);

drivers/clk/imx/clk-imx5.c

156

clk[IMX5_CLK_AXI_B] = imx_clk_divider("axi_b", "main_bus", MXC_CCM_CBCDR, 19, 3);

drivers/clk/imx/clk-imx5.c

157

clk[IMX5_CLK_UART_SEL] = imx_clk_mux("uart_sel", MXC_CCM_CSCMR1, 24, 2,

drivers/clk/imx/clk-imx5.c

159

clk[IMX5_CLK_UART_PRED] = imx_clk_divider("uart_pred", "uart_sel", MXC_CCM_CSCDR1, 3, 3);

drivers/clk/imx/clk-imx5.c

160

clk[IMX5_CLK_UART_ROOT] = imx_clk_divider("uart_root", "uart_pred", MXC_CCM_CSCDR1, 0, 3);

drivers/clk/imx/clk-imx5.c

162

clk[IMX5_CLK_ESDHC_A_PRED] = imx_clk_divider("esdhc_a_pred", "esdhc_a_sel", MXC_CCM_CSCDR1, 16, 3);

drivers/clk/imx/clk-imx5.c

163

clk[IMX5_CLK_ESDHC_A_PODF] = imx_clk_divider("esdhc_a_podf", "esdhc_a_pred", MXC_CCM_CSCDR1, 11, 3);

drivers/clk/imx/clk-imx5.c

164

clk[IMX5_CLK_ESDHC_B_PRED] = imx_clk_divider("esdhc_b_pred", "esdhc_b_sel", MXC_CCM_CSCDR1, 22, 3);

drivers/clk/imx/clk-imx5.c

165

clk[IMX5_CLK_ESDHC_B_PODF] = imx_clk_divider("esdhc_b_podf", "esdhc_b_pred", MXC_CCM_CSCDR1, 19, 3);

drivers/clk/imx/clk-imx5.c

167

clk[IMX5_CLK_EMI_SEL] = imx_clk_mux("emi_sel", MXC_CCM_CBCDR, 26, 1,

drivers/clk/imx/clk-imx5.c

169

clk[IMX5_CLK_EMI_SLOW_PODF] = imx_clk_divider("emi_slow_podf", "emi_sel", MXC_CCM_CBCDR, 22, 3);

drivers/clk/imx/clk-imx5.c

170

clk[IMX5_CLK_NFC_PODF] = imx_clk_divider("nfc_podf", "emi_slow_podf", MXC_CCM_CBCDR, 13, 3);

drivers/clk/imx/clk-imx5.c

171

clk[IMX5_CLK_ECSPI_SEL] = imx_clk_mux("ecspi_sel", MXC_CCM_CSCMR1, 4, 2,

drivers/clk/imx/clk-imx5.c

173

clk[IMX5_CLK_ECSPI_PRED] = imx_clk_divider("ecspi_pred", "ecspi_sel", MXC_CCM_CSCDR2, 25, 3);

drivers/clk/imx/clk-imx5.c

174

clk[IMX5_CLK_ECSPI_PODF] = imx_clk_divider("ecspi_podf", "ecspi_pred", MXC_CCM_CSCDR2, 19, 6);

drivers/clk/imx/clk-imx5.c

175

clk[IMX5_CLK_USBOH3_SEL] = imx_clk_mux("usboh3_sel", MXC_CCM_CSCMR1, 22, 2,

drivers/clk/imx/clk-imx5.c

177

clk[IMX5_CLK_USBOH3_PRED] = imx_clk_divider("usboh3_pred", "usboh3_sel", MXC_CCM_CSCDR1, 8, 3);

drivers/clk/imx/clk-imx5.c

178

clk[IMX5_CLK_USBOH3_PODF] = imx_clk_divider("usboh3_podf", "usboh3_pred", MXC_CCM_CSCDR1, 6, 2);

drivers/clk/imx/clk-imx5.c

179

clk[IMX5_CLK_USB_PHY_PRED] = imx_clk_divider("usb_phy_pred", "pll3_sw", MXC_CCM_CDCDR, 3, 3);

drivers/clk/imx/clk-imx5.c

180

clk[IMX5_CLK_USB_PHY_PODF] = imx_clk_divider("usb_phy_podf", "usb_phy_pred", MXC_CCM_CDCDR, 0, 3);

drivers/clk/imx/clk-imx5.c

181

clk[IMX5_CLK_USB_PHY_SEL] = imx_clk_mux("usb_phy_sel", MXC_CCM_CSCMR1, 26, 1,

drivers/clk/imx/clk-imx5.c

183

clk[IMX5_CLK_STEP_SEL] = imx_clk_mux("step_sel", MXC_CCM_CCSR, 7, 2, step_sels, ARRAY_SIZE(step_sels));

drivers/clk/imx/clk-imx5.c

184

clk[IMX5_CLK_CPU_PODF_SEL] = imx_clk_mux("cpu_podf_sel", MXC_CCM_CCSR, 2, 1, cpu_podf_sels, ARRAY_SIZE(cpu_podf_sels));

drivers/clk/imx/clk-imx5.c

185

clk[IMX5_CLK_CPU_PODF] = imx_clk_divider("cpu_podf", "cpu_podf_sel", MXC_CCM_CACRR, 0, 3);

drivers/clk/imx/clk-imx5.c

186

clk[IMX5_CLK_DI_PRED] = imx_clk_divider("di_pred", "pll3_sw", MXC_CCM_CDCDR, 6, 3);

drivers/clk/imx/clk-imx5.c

187

clk[IMX5_CLK_IIM_GATE] = imx_clk_gate2("iim_gate", "ipg", MXC_CCM_CCGR0, 30);

drivers/clk/imx/clk-imx5.c

188

clk[IMX5_CLK_UART1_IPG_GATE] = imx_clk_gate2("uart1_ipg_gate", "ipg", MXC_CCM_CCGR1, 6);

drivers/clk/imx/clk-imx5.c

189

clk[IMX5_CLK_UART1_PER_GATE] = imx_clk_gate2("uart1_per_gate", "uart_root", MXC_CCM_CCGR1, 8);

drivers/clk/imx/clk-imx5.c

190

clk[IMX5_CLK_UART2_IPG_GATE] = imx_clk_gate2("uart2_ipg_gate", "ipg", MXC_CCM_CCGR1, 10);

drivers/clk/imx/clk-imx5.c

191

clk[IMX5_CLK_UART2_PER_GATE] = imx_clk_gate2("uart2_per_gate", "uart_root", MXC_CCM_CCGR1, 12);

drivers/clk/imx/clk-imx5.c

192

clk[IMX5_CLK_UART3_IPG_GATE] = imx_clk_gate2("uart3_ipg_gate", "ipg", MXC_CCM_CCGR1, 14);

drivers/clk/imx/clk-imx5.c

193

clk[IMX5_CLK_UART3_PER_GATE] = imx_clk_gate2("uart3_per_gate", "uart_root", MXC_CCM_CCGR1, 16);

drivers/clk/imx/clk-imx5.c

194

clk[IMX5_CLK_I2C1_GATE] = imx_clk_gate2("i2c1_gate", "per_root", MXC_CCM_CCGR1, 18);

drivers/clk/imx/clk-imx5.c

195

clk[IMX5_CLK_I2C2_GATE] = imx_clk_gate2("i2c2_gate", "per_root", MXC_CCM_CCGR1, 20);

drivers/clk/imx/clk-imx5.c

196

clk[IMX5_CLK_PWM1_IPG_GATE] = imx_clk_gate2("pwm1_ipg_gate", "ipg", MXC_CCM_CCGR2, 10);

drivers/clk/imx/clk-imx5.c

197

clk[IMX5_CLK_PWM1_HF_GATE] = imx_clk_gate2("pwm1_hf_gate", "per_root", MXC_CCM_CCGR2, 12);

drivers/clk/imx/clk-imx5.c

198

clk[IMX5_CLK_PWM2_IPG_GATE] = imx_clk_gate2("pwm2_ipg_gate", "ipg", MXC_CCM_CCGR2, 14);

drivers/clk/imx/clk-imx5.c

199

clk[IMX5_CLK_PWM2_HF_GATE] = imx_clk_gate2("pwm2_hf_gate", "per_root", MXC_CCM_CCGR2, 16);

drivers/clk/imx/clk-imx5.c

200

clk[IMX5_CLK_GPT_IPG_GATE] = imx_clk_gate2("gpt_ipg_gate", "ipg", MXC_CCM_CCGR2, 18);

drivers/clk/imx/clk-imx5.c

201

clk[IMX5_CLK_GPT_HF_GATE] = imx_clk_gate2("gpt_hf_gate", "per_root", MXC_CCM_CCGR2, 20);

drivers/clk/imx/clk-imx5.c

202

clk[IMX5_CLK_FEC_GATE] = imx_clk_gate2("fec_gate", "ipg", MXC_CCM_CCGR2, 24);

drivers/clk/imx/clk-imx5.c

203

clk[IMX5_CLK_USBOH3_GATE] = imx_clk_gate2("usboh3_gate", "ipg", MXC_CCM_CCGR2, 26);

drivers/clk/imx/clk-imx5.c

204

clk[IMX5_CLK_USBOH3_PER_GATE] = imx_clk_gate2("usboh3_per_gate", "usboh3_podf", MXC_CCM_CCGR2, 28);

drivers/clk/imx/clk-imx5.c

205

clk[IMX5_CLK_ESDHC1_IPG_GATE] = imx_clk_gate2("esdhc1_ipg_gate", "ipg", MXC_CCM_CCGR3, 0);

drivers/clk/imx/clk-imx5.c

206

clk[IMX5_CLK_ESDHC2_IPG_GATE] = imx_clk_gate2("esdhc2_ipg_gate", "ipg", MXC_CCM_CCGR3, 4);

drivers/clk/imx/clk-imx5.c

207

clk[IMX5_CLK_ESDHC3_IPG_GATE] = imx_clk_gate2("esdhc3_ipg_gate", "ipg", MXC_CCM_CCGR3, 8);

drivers/clk/imx/clk-imx5.c

208

clk[IMX5_CLK_ESDHC4_IPG_GATE] = imx_clk_gate2("esdhc4_ipg_gate", "ipg", MXC_CCM_CCGR3, 12);

drivers/clk/imx/clk-imx5.c

209

clk[IMX5_CLK_SSI1_IPG_GATE] = imx_clk_gate2("ssi1_ipg_gate", "ipg", MXC_CCM_CCGR3, 16);

drivers/clk/imx/clk-imx5.c

210

clk[IMX5_CLK_SSI2_IPG_GATE] = imx_clk_gate2("ssi2_ipg_gate", "ipg", MXC_CCM_CCGR3, 20);

drivers/clk/imx/clk-imx5.c

211

clk[IMX5_CLK_SSI3_IPG_GATE] = imx_clk_gate2("ssi3_ipg_gate", "ipg", MXC_CCM_CCGR3, 24);

drivers/clk/imx/clk-imx5.c

212

clk[IMX5_CLK_ECSPI1_IPG_GATE] = imx_clk_gate2("ecspi1_ipg_gate", "ipg", MXC_CCM_CCGR4, 18);

drivers/clk/imx/clk-imx5.c

213

clk[IMX5_CLK_ECSPI1_PER_GATE] = imx_clk_gate2("ecspi1_per_gate", "ecspi_podf", MXC_CCM_CCGR4, 20);

drivers/clk/imx/clk-imx5.c

214

clk[IMX5_CLK_ECSPI2_IPG_GATE] = imx_clk_gate2("ecspi2_ipg_gate", "ipg", MXC_CCM_CCGR4, 22);

drivers/clk/imx/clk-imx5.c

215

clk[IMX5_CLK_ECSPI2_PER_GATE] = imx_clk_gate2("ecspi2_per_gate", "ecspi_podf", MXC_CCM_CCGR4, 24);

drivers/clk/imx/clk-imx5.c

216

clk[IMX5_CLK_CSPI_IPG_GATE] = imx_clk_gate2("cspi_ipg_gate", "ipg", MXC_CCM_CCGR4, 26);

drivers/clk/imx/clk-imx5.c

217

clk[IMX5_CLK_SDMA_GATE] = imx_clk_gate2("sdma_gate", "ipg", MXC_CCM_CCGR4, 30);

drivers/clk/imx/clk-imx5.c

218

clk[IMX5_CLK_EMI_FAST_GATE] = imx_clk_gate2_flags("emi_fast_gate", "dummy", MXC_CCM_CCGR5, 14, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

219

clk[IMX5_CLK_EMI_SLOW_GATE] = imx_clk_gate2_flags("emi_slow_gate", "emi_slow_podf", MXC_CCM_CCGR5, 16, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

220

clk[IMX5_CLK_IPU_SEL] = imx_clk_mux("ipu_sel", MXC_CCM_CBCMR, 6, 2, ipu_sel, ARRAY_SIZE(ipu_sel));

drivers/clk/imx/clk-imx5.c

221

clk[IMX5_CLK_IPU_GATE] = imx_clk_gate2("ipu_gate", "ipu_sel", MXC_CCM_CCGR5, 10);

drivers/clk/imx/clk-imx5.c

222

clk[IMX5_CLK_NFC_GATE] = imx_clk_gate2("nfc_gate", "nfc_podf", MXC_CCM_CCGR5, 20);

drivers/clk/imx/clk-imx5.c

223

clk[IMX5_CLK_IPU_DI0_GATE] = imx_clk_gate2("ipu_di0_gate", "ipu_di0_sel", MXC_CCM_CCGR6, 10);

drivers/clk/imx/clk-imx5.c

224

clk[IMX5_CLK_IPU_DI1_GATE] = imx_clk_gate2("ipu_di1_gate", "ipu_di1_sel", MXC_CCM_CCGR6, 12);

drivers/clk/imx/clk-imx5.c

225

clk[IMX5_CLK_GPU3D_SEL] = imx_clk_mux("gpu3d_sel", MXC_CCM_CBCMR, 4, 2, gpu3d_sel, ARRAY_SIZE(gpu3d_sel));

drivers/clk/imx/clk-imx5.c

226

clk[IMX5_CLK_GPU2D_SEL] = imx_clk_mux("gpu2d_sel", MXC_CCM_CBCMR, 16, 2, gpu2d_sel, ARRAY_SIZE(gpu2d_sel));

drivers/clk/imx/clk-imx5.c

227

clk[IMX5_CLK_GPU3D_GATE] = imx_clk_gate2("gpu3d_gate", "gpu3d_sel", MXC_CCM_CCGR5, 2);

drivers/clk/imx/clk-imx5.c

228

clk[IMX5_CLK_GARB_GATE] = imx_clk_gate2("garb_gate", "axi_a", MXC_CCM_CCGR5, 4);

drivers/clk/imx/clk-imx5.c

229

clk[IMX5_CLK_GPU2D_GATE] = imx_clk_gate2("gpu2d_gate", "gpu2d_sel", MXC_CCM_CCGR6, 14);

drivers/clk/imx/clk-imx5.c

230

clk[IMX5_CLK_VPU_SEL] = imx_clk_mux("vpu_sel", MXC_CCM_CBCMR, 14, 2, vpu_sel, ARRAY_SIZE(vpu_sel));

drivers/clk/imx/clk-imx5.c

231

clk[IMX5_CLK_VPU_GATE] = imx_clk_gate2("vpu_gate", "vpu_sel", MXC_CCM_CCGR5, 6);

drivers/clk/imx/clk-imx5.c

232

clk[IMX5_CLK_VPU_REFERENCE_GATE] = imx_clk_gate2("vpu_reference_gate", "osc", MXC_CCM_CCGR5, 8);

drivers/clk/imx/clk-imx5.c

233

clk[IMX5_CLK_GPC_DVFS] = imx_clk_gate2_flags("gpc_dvfs", "dummy", MXC_CCM_CCGR5, 24, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

235

clk[IMX5_CLK_SSI_APM] = imx_clk_mux("ssi_apm", MXC_CCM_CSCMR1, 8, 2, ssi_apm_sels, ARRAY_SIZE(ssi_apm_sels));

drivers/clk/imx/clk-imx5.c

236

clk[IMX5_CLK_SSI1_ROOT_SEL] = imx_clk_mux("ssi1_root_sel", MXC_CCM_CSCMR1, 14, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));

drivers/clk/imx/clk-imx5.c

237

clk[IMX5_CLK_SSI2_ROOT_SEL] = imx_clk_mux("ssi2_root_sel", MXC_CCM_CSCMR1, 12, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));

drivers/clk/imx/clk-imx5.c

238

clk[IMX5_CLK_SSI3_ROOT_SEL] = imx_clk_mux("ssi3_root_sel", MXC_CCM_CSCMR1, 11, 1, ssi3_clk_sels, ARRAY_SIZE(ssi3_clk_sels));

drivers/clk/imx/clk-imx5.c

239

clk[IMX5_CLK_SSI_EXT1_SEL] = imx_clk_mux("ssi_ext1_sel", MXC_CCM_CSCMR1, 28, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));

drivers/clk/imx/clk-imx5.c

240

clk[IMX5_CLK_SSI_EXT2_SEL] = imx_clk_mux("ssi_ext2_sel", MXC_CCM_CSCMR1, 30, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));

drivers/clk/imx/clk-imx5.c

241

clk[IMX5_CLK_SSI_EXT1_COM_SEL] = imx_clk_mux("ssi_ext1_com_sel", MXC_CCM_CSCMR1, 0, 1, ssi_ext1_com_sels, ARRAY_SIZE(ssi_ext1_com_sels));

drivers/clk/imx/clk-imx5.c

242

clk[IMX5_CLK_SSI_EXT2_COM_SEL] = imx_clk_mux("ssi_ext2_com_sel", MXC_CCM_CSCMR1, 1, 1, ssi_ext2_com_sels, ARRAY_SIZE(ssi_ext2_com_sels));

drivers/clk/imx/clk-imx5.c

243

clk[IMX5_CLK_SSI1_ROOT_PRED] = imx_clk_divider("ssi1_root_pred", "ssi1_root_sel", MXC_CCM_CS1CDR, 6, 3);

drivers/clk/imx/clk-imx5.c

244

clk[IMX5_CLK_SSI1_ROOT_PODF] = imx_clk_divider("ssi1_root_podf", "ssi1_root_pred", MXC_CCM_CS1CDR, 0, 6);

drivers/clk/imx/clk-imx5.c

245

clk[IMX5_CLK_SSI2_ROOT_PRED] = imx_clk_divider("ssi2_root_pred", "ssi2_root_sel", MXC_CCM_CS2CDR, 6, 3);

drivers/clk/imx/clk-imx5.c

246

clk[IMX5_CLK_SSI2_ROOT_PODF] = imx_clk_divider("ssi2_root_podf", "ssi2_root_pred", MXC_CCM_CS2CDR, 0, 6);

drivers/clk/imx/clk-imx5.c

247

clk[IMX5_CLK_SSI_EXT1_PRED] = imx_clk_divider("ssi_ext1_pred", "ssi_ext1_sel", MXC_CCM_CS1CDR, 22, 3);

drivers/clk/imx/clk-imx5.c

248

clk[IMX5_CLK_SSI_EXT1_PODF] = imx_clk_divider("ssi_ext1_podf", "ssi_ext1_pred", MXC_CCM_CS1CDR, 16, 6);

drivers/clk/imx/clk-imx5.c

249

clk[IMX5_CLK_SSI_EXT2_PRED] = imx_clk_divider("ssi_ext2_pred", "ssi_ext2_sel", MXC_CCM_CS2CDR, 22, 3);

drivers/clk/imx/clk-imx5.c

250

clk[IMX5_CLK_SSI_EXT2_PODF] = imx_clk_divider("ssi_ext2_podf", "ssi_ext2_pred", MXC_CCM_CS2CDR, 16, 6);

drivers/clk/imx/clk-imx5.c

251

clk[IMX5_CLK_SSI1_ROOT_GATE] = imx_clk_gate2("ssi1_root_gate", "ssi1_root_podf", MXC_CCM_CCGR3, 18);

drivers/clk/imx/clk-imx5.c

252

clk[IMX5_CLK_SSI2_ROOT_GATE] = imx_clk_gate2("ssi2_root_gate", "ssi2_root_podf", MXC_CCM_CCGR3, 22);

drivers/clk/imx/clk-imx5.c

253

clk[IMX5_CLK_SSI3_ROOT_GATE] = imx_clk_gate2("ssi3_root_gate", "ssi3_root_sel", MXC_CCM_CCGR3, 26);

drivers/clk/imx/clk-imx5.c

254

clk[IMX5_CLK_SSI_EXT1_GATE] = imx_clk_gate2("ssi_ext1_gate", "ssi_ext1_com_sel", MXC_CCM_CCGR3, 28);

drivers/clk/imx/clk-imx5.c

255

clk[IMX5_CLK_SSI_EXT2_GATE] = imx_clk_gate2("ssi_ext2_gate", "ssi_ext2_com_sel", MXC_CCM_CCGR3, 30);

drivers/clk/imx/clk-imx5.c

256

clk[IMX5_CLK_EPIT1_IPG_GATE] = imx_clk_gate2("epit1_ipg_gate", "ipg", MXC_CCM_CCGR2, 2);

drivers/clk/imx/clk-imx5.c

257

clk[IMX5_CLK_EPIT1_HF_GATE] = imx_clk_gate2("epit1_hf_gate", "per_root", MXC_CCM_CCGR2, 4);

drivers/clk/imx/clk-imx5.c

258

clk[IMX5_CLK_EPIT2_IPG_GATE] = imx_clk_gate2("epit2_ipg_gate", "ipg", MXC_CCM_CCGR2, 6);

drivers/clk/imx/clk-imx5.c

259

clk[IMX5_CLK_EPIT2_HF_GATE] = imx_clk_gate2("epit2_hf_gate", "per_root", MXC_CCM_CCGR2, 8);

drivers/clk/imx/clk-imx5.c

260

clk[IMX5_CLK_OWIRE_GATE] = imx_clk_gate2("owire_gate", "per_root", MXC_CCM_CCGR2, 22);

drivers/clk/imx/clk-imx5.c

261

clk[IMX5_CLK_SRTC_GATE] = imx_clk_gate2("srtc_gate", "per_root", MXC_CCM_CCGR4, 28);

drivers/clk/imx/clk-imx5.c

262

clk[IMX5_CLK_PATA_GATE] = imx_clk_gate2("pata_gate", "ipg", MXC_CCM_CCGR4, 0);

drivers/clk/imx/clk-imx5.c

263

clk[IMX5_CLK_SPDIF0_SEL] = imx_clk_mux("spdif0_sel", MXC_CCM_CSCMR2, 0, 2, spdif_sel, ARRAY_SIZE(spdif_sel));

drivers/clk/imx/clk-imx5.c

264

clk[IMX5_CLK_SPDIF0_PRED] = imx_clk_divider("spdif0_pred", "spdif0_sel", MXC_CCM_CDCDR, 25, 3);

drivers/clk/imx/clk-imx5.c

265

clk[IMX5_CLK_SPDIF0_PODF] = imx_clk_divider("spdif0_podf", "spdif0_pred", MXC_CCM_CDCDR, 19, 6);

drivers/clk/imx/clk-imx5.c

266

clk[IMX5_CLK_SPDIF0_COM_SEL] = imx_clk_mux_flags("spdif0_com_sel", MXC_CCM_CSCMR2, 4, 1,

drivers/clk/imx/clk-imx5.c

268

clk[IMX5_CLK_SPDIF0_GATE] = imx_clk_gate2("spdif0_gate", "spdif0_com_sel", MXC_CCM_CCGR5, 26);

drivers/clk/imx/clk-imx5.c

269

clk[IMX5_CLK_SPDIF_IPG_GATE] = imx_clk_gate2("spdif_ipg_gate", "ipg", MXC_CCM_CCGR5, 30);

drivers/clk/imx/clk-imx5.c

270

clk[IMX5_CLK_SAHARA_IPG_GATE] = imx_clk_gate2("sahara_ipg_gate", "ipg", MXC_CCM_CCGR4, 14);

drivers/clk/imx/clk-imx5.c

271

clk[IMX5_CLK_SATA_REF] = imx_clk_fixed_factor("sata_ref", "usb_phy1_gate", 1, 1);

drivers/clk/imx/clk-imx5.c

273

clk_register_clkdev(clk[IMX5_CLK_CPU_PODF], NULL, "cpu0");

drivers/clk/imx/clk-imx5.c

274

clk_register_clkdev(clk[IMX5_CLK_GPC_DVFS], "gpc_dvfs", NULL);

drivers/clk/imx/clk-imx5.c

277

clk_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]);

drivers/clk/imx/clk-imx5.c

288

clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

292

clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

296

clk[IMX5_CLK_PLL3_SW] = imx_clk_pllv2("pll3_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

307

clk[IMX5_CLK_MAIN_BUS] = imx_clk_mux("main_bus", MXC_CCM_CBCDR, 25, 2,

drivers/clk/imx/clk-imx5.c

310

clk[IMX5_CLK_LP_APM] = imx_clk_mux("lp_apm", MXC_CCM_CCSR, 10, 1,

drivers/clk/imx/clk-imx5.c

312

clk[IMX5_CLK_ESDHC_A_SEL] = imx_clk_mux("esdhc_a_sel", MXC_CCM_CSCMR1, 21, 2,

drivers/clk/imx/clk-imx5.c

314

clk[IMX5_CLK_ESDHC_B_SEL] = imx_clk_mux("esdhc_b_sel", MXC_CCM_CSCMR1, 16, 2,

drivers/clk/imx/clk-imx5.c

316

clk[IMX5_CLK_ESDHC_C_SEL] = imx_clk_mux("esdhc_c_sel", MXC_CCM_CSCMR1, 20, 1, esdhc_c_sel, ARRAY_SIZE(esdhc_c_sel));

drivers/clk/imx/clk-imx5.c

317

clk[IMX5_CLK_ESDHC_D_SEL] = imx_clk_mux("esdhc_d_sel", MXC_CCM_CSCMR1, 19, 1, esdhc_d_sel, ARRAY_SIZE(esdhc_d_sel));

drivers/clk/imx/clk-imx5.c

318

clk[IMX5_CLK_ESDHC1_PER_GATE] = imx_clk_gate2("esdhc1_per_gate", "esdhc_a_podf", MXC_CCM_CCGR3, 2);

drivers/clk/imx/clk-imx5.c

319

clk[IMX5_CLK_ESDHC2_PER_GATE] = imx_clk_gate2("esdhc2_per_gate", "esdhc_c_sel", MXC_CCM_CCGR3, 6);

drivers/clk/imx/clk-imx5.c

320

clk[IMX5_CLK_ESDHC3_PER_GATE] = imx_clk_gate2("esdhc3_per_gate", "esdhc_b_podf", MXC_CCM_CCGR3, 10);

drivers/clk/imx/clk-imx5.c

321

clk[IMX5_CLK_ESDHC4_PER_GATE] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14);

drivers/clk/imx/clk-imx5.c

322

clk[IMX5_CLK_USB_PHY1_GATE] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10);

drivers/clk/imx/clk-imx5.c

323

clk[IMX5_CLK_USB_PHY2_GATE] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12);

drivers/clk/imx/clk-imx5.c

324

clk[IMX5_CLK_I2C3_GATE] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22);

drivers/clk/imx/clk-imx5.c

325

clk[IMX5_CLK_UART4_IPG_GATE] = imx_clk_gate2("uart4_ipg_gate", "ipg", MXC_CCM_CCGR7, 8);

drivers/clk/imx/clk-imx5.c

326

clk[IMX5_CLK_UART4_PER_GATE] = imx_clk_gate2("uart4_per_gate", "uart_root", MXC_CCM_CCGR7, 10);

drivers/clk/imx/clk-imx5.c

327

clk[IMX5_CLK_UART5_IPG_GATE] = imx_clk_gate2("uart5_ipg_gate", "ipg", MXC_CCM_CCGR7, 12);

drivers/clk/imx/clk-imx5.c

328

clk[IMX5_CLK_UART5_PER_GATE] = imx_clk_gate2("uart5_per_gate", "uart_root", MXC_CCM_CCGR7, 14);

drivers/clk/imx/clk-imx5.c

330

clk[IMX5_CLK_CKO1_SEL] = imx_clk_mux("cko1_sel", MXC_CCM_CCOSR, 0, 4,

drivers/clk/imx/clk-imx5.c

332

clk[IMX5_CLK_CKO1_PODF] = imx_clk_divider("cko1_podf", "cko1_sel", MXC_CCM_CCOSR, 4, 3);

drivers/clk/imx/clk-imx5.c

333

clk[IMX5_CLK_CKO1] = imx_clk_gate2("cko1", "cko1_podf", MXC_CCM_CCOSR, 7);

drivers/clk/imx/clk-imx5.c

335

clk[IMX5_CLK_CKO2_SEL] = imx_clk_mux("cko2_sel", MXC_CCM_CCOSR, 16, 5,

drivers/clk/imx/clk-imx5.c

337

clk[IMX5_CLK_CKO2_PODF] = imx_clk_divider("cko2_podf", "cko2_sel", MXC_CCM_CCOSR, 21, 3);

drivers/clk/imx/clk-imx5.c

338

clk[IMX5_CLK_CKO2] = imx_clk_gate2("cko2", "cko2_podf", MXC_CCM_CCOSR, 24);

drivers/clk/imx/clk-imx5.c

340

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-imx5.c

342

clk_data.clks = clk;

drivers/clk/imx/clk-imx5.c

343

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk-imx5.c

347

clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]);

drivers/clk/imx/clk-imx5.c

348

clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]);

drivers/clk/imx/clk-imx5.c

351

clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);

drivers/clk/imx/clk-imx5.c

352

clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);

drivers/clk/imx/clk-imx5.c

354

clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);

drivers/clk/imx/clk-imx5.c

356

clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);

drivers/clk/imx/clk-imx5.c

358

r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);

drivers/clk/imx/clk-imx5.c

359

clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);

drivers/clk/imx/clk-imx5.c

373

clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

377

clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

381

clk[IMX5_CLK_PLL3_SW] = imx_clk_pllv2("pll3_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

388

clk[IMX5_CLK_PERIPH_APM] = imx_clk_mux("periph_apm", MXC_CCM_CBCMR, 12, 2,

drivers/clk/imx/clk-imx5.c

390

clk[IMX5_CLK_MAIN_BUS] = imx_clk_mux("main_bus", MXC_CCM_CBCDR, 25, 1,

drivers/clk/imx/clk-imx5.c

392

clk[IMX5_CLK_LP_APM] = imx_clk_mux("lp_apm", MXC_CCM_CCSR, 9, 1,

drivers/clk/imx/clk-imx5.c

394

clk[IMX5_CLK_IPU_DI0_SEL] = imx_clk_mux_flags("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,

drivers/clk/imx/clk-imx5.c

396

clk[IMX5_CLK_IPU_DI1_SEL] = imx_clk_mux_flags("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,

drivers/clk/imx/clk-imx5.c

398

clk[IMX5_CLK_TVE_EXT_SEL] = imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,

drivers/clk/imx/clk-imx5.c

400

clk[IMX5_CLK_TVE_SEL] = imx_clk_mux("tve_sel", MXC_CCM_CSCMR1, 7, 1,

drivers/clk/imx/clk-imx5.c

402

clk[IMX5_CLK_TVE_GATE] = imx_clk_gate2("tve_gate", "tve_sel", MXC_CCM_CCGR2, 30);

drivers/clk/imx/clk-imx5.c

403

clk[IMX5_CLK_TVE_PRED] = imx_clk_divider("tve_pred", "pll3_sw", MXC_CCM_CDCDR, 28, 3);

drivers/clk/imx/clk-imx5.c

404

clk[IMX5_CLK_ESDHC_A_SEL] = imx_clk_mux("esdhc_a_sel", MXC_CCM_CSCMR1, 20, 2,

drivers/clk/imx/clk-imx5.c

406

clk[IMX5_CLK_ESDHC_B_SEL] = imx_clk_mux("esdhc_b_sel", MXC_CCM_CSCMR1, 16, 2,

drivers/clk/imx/clk-imx5.c

408

clk[IMX5_CLK_ESDHC_C_SEL] = imx_clk_mux("esdhc_c_sel", MXC_CCM_CSCMR1, 19, 1, esdhc_c_sel, ARRAY_SIZE(esdhc_c_sel));

drivers/clk/imx/clk-imx5.c

409

clk[IMX5_CLK_ESDHC_D_SEL] = imx_clk_mux("esdhc_d_sel", MXC_CCM_CSCMR1, 18, 1, esdhc_d_sel, ARRAY_SIZE(esdhc_d_sel));

drivers/clk/imx/clk-imx5.c

410

clk[IMX5_CLK_ESDHC1_PER_GATE] = imx_clk_gate2("esdhc1_per_gate", "esdhc_a_podf", MXC_CCM_CCGR3, 2);

drivers/clk/imx/clk-imx5.c

411

clk[IMX5_CLK_ESDHC2_PER_GATE] = imx_clk_gate2("esdhc2_per_gate", "esdhc_b_podf", MXC_CCM_CCGR3, 6);

drivers/clk/imx/clk-imx5.c

412

clk[IMX5_CLK_ESDHC3_PER_GATE] = imx_clk_gate2("esdhc3_per_gate", "esdhc_c_sel", MXC_CCM_CCGR3, 10);

drivers/clk/imx/clk-imx5.c

413

clk[IMX5_CLK_ESDHC4_PER_GATE] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14);

drivers/clk/imx/clk-imx5.c

414

clk[IMX5_CLK_USB_PHY_GATE] = imx_clk_gate2("usb_phy_gate", "usb_phy_sel", MXC_CCM_CCGR2, 0);

drivers/clk/imx/clk-imx5.c

415

clk[IMX5_CLK_HSI2C_GATE] = imx_clk_gate2("hsi2c_gate", "ipg", MXC_CCM_CCGR1, 22);

drivers/clk/imx/clk-imx5.c

416

clk[IMX5_CLK_SCC2_IPG_GATE] = imx_clk_gate2("scc2_gate", "ipg", MXC_CCM_CCGR1, 30);

drivers/clk/imx/clk-imx5.c

417

clk[IMX5_CLK_MIPI_HSC1_GATE] = imx_clk_gate2_flags("mipi_hsc1_gate", "ipg", MXC_CCM_CCGR4, 6, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

418

clk[IMX5_CLK_MIPI_HSC2_GATE] = imx_clk_gate2_flags("mipi_hsc2_gate", "ipg", MXC_CCM_CCGR4, 8, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

419

clk[IMX5_CLK_MIPI_ESC_GATE] = imx_clk_gate2_flags("mipi_esc_gate", "ipg", MXC_CCM_CCGR4, 10, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

420

clk[IMX5_CLK_MIPI_HSP_GATE] = imx_clk_gate2_flags("mipi_hsp_gate", "ipg", MXC_CCM_CCGR4, 12, CLK_IS_CRITICAL);

drivers/clk/imx/clk-imx5.c

421

clk[IMX5_CLK_SPDIF_XTAL_SEL] = imx_clk_mux("spdif_xtal_sel", MXC_CCM_CSCMR1, 2, 2,

drivers/clk/imx/clk-imx5.c

423

clk[IMX5_CLK_SPDIF1_SEL] = imx_clk_mux("spdif1_sel", MXC_CCM_CSCMR2, 2, 2,

drivers/clk/imx/clk-imx5.c

425

clk[IMX5_CLK_SPDIF1_PRED] = imx_clk_divider("spdif1_pred", "spdif1_sel", MXC_CCM_CDCDR, 16, 3);

drivers/clk/imx/clk-imx5.c

426

clk[IMX5_CLK_SPDIF1_PODF] = imx_clk_divider("spdif1_podf", "spdif1_pred", MXC_CCM_CDCDR, 9, 6);

drivers/clk/imx/clk-imx5.c

427

clk[IMX5_CLK_SPDIF1_COM_SEL] = imx_clk_mux("spdif1_com_sel", MXC_CCM_CSCMR2, 5, 1,

drivers/clk/imx/clk-imx5.c

429

clk[IMX5_CLK_SPDIF1_GATE] = imx_clk_gate2("spdif1_gate", "spdif1_com_sel", MXC_CCM_CCGR5, 28);

drivers/clk/imx/clk-imx5.c

431

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-imx5.c

433

clk_data.clks = clk;

drivers/clk/imx/clk-imx5.c

434

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk-imx5.c

438

clk_set_parent(clk[IMX5_CLK_USBOH3_SEL], clk[IMX5_CLK_PLL2_SW]);

drivers/clk/imx/clk-imx5.c

441

clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]);

drivers/clk/imx/clk-imx5.c

442

clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]);

drivers/clk/imx/clk-imx5.c

445

clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000);

drivers/clk/imx/clk-imx5.c

446

clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000);

drivers/clk/imx/clk-imx5.c

448

clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);

drivers/clk/imx/clk-imx5.c

450

clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);

drivers/clk/imx/clk-imx5.c

479

clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

483

clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

487

clk[IMX5_CLK_PLL3_SW] = imx_clk_pllv2("pll3_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

491

clk[IMX5_CLK_PLL4_SW] = imx_clk_pllv2("pll4_sw", "osc", pll_base);

drivers/clk/imx/clk-imx5.c

498

clk[IMX5_CLK_PERIPH_APM] = imx_clk_mux("periph_apm", MXC_CCM_CBCMR, 12, 2,

drivers/clk/imx/clk-imx5.c

500

clk[IMX5_CLK_MAIN_BUS] = imx_clk_mux("main_bus", MXC_CCM_CBCDR, 25, 1,

drivers/clk/imx/clk-imx5.c

502

clk[IMX5_CLK_LP_APM] = imx_clk_mux("lp_apm", MXC_CCM_CCSR, 10, 1,

drivers/clk/imx/clk-imx5.c

504

clk[IMX5_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);

drivers/clk/imx/clk-imx5.c

505

clk[IMX5_CLK_LDB_DI1_DIV] = imx_clk_divider_flags("ldb_di1_div", "ldb_di1_div_3_5", MXC_CCM_CSCMR2, 11, 1, 0);

drivers/clk/imx/clk-imx5.c

506

clk[IMX5_CLK_LDB_DI1_SEL] = imx_clk_mux_flags("ldb_di1_sel", MXC_CCM_CSCMR2, 9, 1,

drivers/clk/imx/clk-imx5.c

508

clk[IMX5_CLK_DI_PLL4_PODF] = imx_clk_divider("di_pll4_podf", "pll4_sw", MXC_CCM_CDCDR, 16, 3);

drivers/clk/imx/clk-imx5.c

509

clk[IMX5_CLK_LDB_DI0_DIV_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);

drivers/clk/imx/clk-imx5.c

510

clk[IMX5_CLK_LDB_DI0_DIV] = imx_clk_divider_flags("ldb_di0_div", "ldb_di0_div_3_5", MXC_CCM_CSCMR2, 10, 1, 0);

drivers/clk/imx/clk-imx5.c

511

clk[IMX5_CLK_LDB_DI0_SEL] = imx_clk_mux_flags("ldb_di0_sel", MXC_CCM_CSCMR2, 8, 1,

drivers/clk/imx/clk-imx5.c

513

clk[IMX5_CLK_LDB_DI0_GATE] = imx_clk_gate2("ldb_di0_gate", "ldb_di0_div", MXC_CCM_CCGR6, 28);

drivers/clk/imx/clk-imx5.c

514

clk[IMX5_CLK_LDB_DI1_GATE] = imx_clk_gate2("ldb_di1_gate", "ldb_di1_div", MXC_CCM_CCGR6, 30);

drivers/clk/imx/clk-imx5.c

515

clk[IMX5_CLK_IPU_DI0_SEL] = imx_clk_mux_flags("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,

drivers/clk/imx/clk-imx5.c

517

clk[IMX5_CLK_IPU_DI1_SEL] = imx_clk_mux_flags("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,

drivers/clk/imx/clk-imx5.c

519

clk[IMX5_CLK_TVE_EXT_SEL] = imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,

drivers/clk/imx/clk-imx5.c

521

clk[IMX5_CLK_TVE_GATE] = imx_clk_gate2("tve_gate", "tve_pred", MXC_CCM_CCGR2, 30);

drivers/clk/imx/clk-imx5.c

522

clk[IMX5_CLK_TVE_PRED] = imx_clk_divider("tve_pred", "tve_ext_sel", MXC_CCM_CDCDR, 28, 3);

drivers/clk/imx/clk-imx5.c

523

clk[IMX5_CLK_ESDHC_A_SEL] = imx_clk_mux("esdhc_a_sel", MXC_CCM_CSCMR1, 20, 2,

drivers/clk/imx/clk-imx5.c

525

clk[IMX5_CLK_ESDHC_B_SEL] = imx_clk_mux("esdhc_b_sel", MXC_CCM_CSCMR1, 16, 2,

drivers/clk/imx/clk-imx5.c

527

clk[IMX5_CLK_ESDHC_C_SEL] = imx_clk_mux("esdhc_c_sel", MXC_CCM_CSCMR1, 19, 1, esdhc_c_sel, ARRAY_SIZE(esdhc_c_sel));

drivers/clk/imx/clk-imx5.c

528

clk[IMX5_CLK_ESDHC_D_SEL] = imx_clk_mux("esdhc_d_sel", MXC_CCM_CSCMR1, 18, 1, esdhc_d_sel, ARRAY_SIZE(esdhc_d_sel));

drivers/clk/imx/clk-imx5.c

529

clk[IMX5_CLK_ESDHC1_PER_GATE] = imx_clk_gate2("esdhc1_per_gate", "esdhc_a_podf", MXC_CCM_CCGR3, 2);

drivers/clk/imx/clk-imx5.c

530

clk[IMX5_CLK_ESDHC2_PER_GATE] = imx_clk_gate2("esdhc2_per_gate", "esdhc_c_sel", MXC_CCM_CCGR3, 6);

drivers/clk/imx/clk-imx5.c

531

clk[IMX5_CLK_ESDHC3_PER_GATE] = imx_clk_gate2("esdhc3_per_gate", "esdhc_b_podf", MXC_CCM_CCGR3, 10);

drivers/clk/imx/clk-imx5.c

532

clk[IMX5_CLK_ESDHC4_PER_GATE] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14);

drivers/clk/imx/clk-imx5.c

533

clk[IMX5_CLK_USB_PHY1_GATE] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10);

drivers/clk/imx/clk-imx5.c

534

clk[IMX5_CLK_USB_PHY2_GATE] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12);

drivers/clk/imx/clk-imx5.c

535

clk[IMX5_CLK_CAN_SEL] = imx_clk_mux("can_sel", MXC_CCM_CSCMR2, 6, 2,

drivers/clk/imx/clk-imx5.c

537

clk[IMX5_CLK_CAN1_SERIAL_GATE] = imx_clk_gate2("can1_serial_gate", "can_sel", MXC_CCM_CCGR6, 22);

drivers/clk/imx/clk-imx5.c

538

clk[IMX5_CLK_CAN1_IPG_GATE] = imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR6, 20);

drivers/clk/imx/clk-imx5.c

539

clk[IMX5_CLK_OCRAM] = imx_clk_gate2("ocram", "ahb", MXC_CCM_CCGR6, 2);

drivers/clk/imx/clk-imx5.c

540

clk[IMX5_CLK_CAN2_SERIAL_GATE] = imx_clk_gate2("can2_serial_gate", "can_sel", MXC_CCM_CCGR4, 8);

drivers/clk/imx/clk-imx5.c

541

clk[IMX5_CLK_CAN2_IPG_GATE] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 6);

drivers/clk/imx/clk-imx5.c

542

clk[IMX5_CLK_I2C3_GATE] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22);

drivers/clk/imx/clk-imx5.c

543

clk[IMX5_CLK_SATA_GATE] = imx_clk_gate2("sata_gate", "ipg", MXC_CCM_CCGR4, 2);

drivers/clk/imx/clk-imx5.c

545

clk[IMX5_CLK_FIRI_SEL] = imx_clk_mux("firi_sel", MXC_CCM_CSCMR2, 12, 2,

drivers/clk/imx/clk-imx5.c

547

clk[IMX5_CLK_FIRI_PRED] = imx_clk_divider("firi_pred", "firi_sel", MXC_CCM_CSCDR3, 6, 3);

drivers/clk/imx/clk-imx5.c

548

clk[IMX5_CLK_FIRI_PODF] = imx_clk_divider("firi_podf", "firi_pred", MXC_CCM_CSCDR3, 0, 6);

drivers/clk/imx/clk-imx5.c

549

clk[IMX5_CLK_FIRI_SERIAL_GATE] = imx_clk_gate2("firi_serial_gate", "firi_podf", MXC_CCM_CCGR1, 28);

drivers/clk/imx/clk-imx5.c

550

clk[IMX5_CLK_FIRI_IPG_GATE] = imx_clk_gate2("firi_ipg_gate", "ipg", MXC_CCM_CCGR1, 26);

drivers/clk/imx/clk-imx5.c

552

clk[IMX5_CLK_CSI0_MCLK1_SEL] = imx_clk_mux("csi0_mclk1_sel", MXC_CCM_CSCMR2, 22, 2,

drivers/clk/imx/clk-imx5.c

554

clk[IMX5_CLK_CSI0_MCLK1_PRED] = imx_clk_divider("csi0_mclk1_pred", "csi0_mclk1_sel", MXC_CCM_CSCDR4, 6, 3);

drivers/clk/imx/clk-imx5.c

555

clk[IMX5_CLK_CSI0_MCLK1_PODF] = imx_clk_divider("csi0_mclk1_podf", "csi0_mclk1_pred", MXC_CCM_CSCDR4, 0, 6);

drivers/clk/imx/clk-imx5.c

556

clk[IMX5_CLK_CSI0_MCLK1_GATE] = imx_clk_gate2("csi0_mclk1_serial_gate", "csi0_mclk1_podf", MXC_CCM_CCGR6, 4);

drivers/clk/imx/clk-imx5.c

558

clk[IMX5_CLK_IEEE1588_SEL] = imx_clk_mux("ieee1588_sel", MXC_CCM_CSCMR2, 14, 2,

drivers/clk/imx/clk-imx5.c

560

clk[IMX5_CLK_IEEE1588_PRED] = imx_clk_divider("ieee1588_pred", "ieee1588_sel", MXC_CCM_CSCDR2, 6, 3);

drivers/clk/imx/clk-imx5.c

561

clk[IMX5_CLK_IEEE1588_PODF] = imx_clk_divider("ieee1588_podf", "ieee1588_pred", MXC_CCM_CSCDR2, 0, 6);

drivers/clk/imx/clk-imx5.c

562

clk[IMX5_CLK_IEEE1588_GATE] = imx_clk_gate2("ieee1588_serial_gate", "ieee1588_podf", MXC_CCM_CCGR7, 6);

drivers/clk/imx/clk-imx5.c

563

clk[IMX5_CLK_UART4_IPG_GATE] = imx_clk_gate2("uart4_ipg_gate", "ipg", MXC_CCM_CCGR7, 8);

drivers/clk/imx/clk-imx5.c

564

clk[IMX5_CLK_UART4_PER_GATE] = imx_clk_gate2("uart4_per_gate", "uart_root", MXC_CCM_CCGR7, 10);

drivers/clk/imx/clk-imx5.c

565

clk[IMX5_CLK_UART5_IPG_GATE] = imx_clk_gate2("uart5_ipg_gate", "ipg", MXC_CCM_CCGR7, 12);

drivers/clk/imx/clk-imx5.c

566

clk[IMX5_CLK_UART5_PER_GATE] = imx_clk_gate2("uart5_per_gate", "uart_root", MXC_CCM_CCGR7, 14);

drivers/clk/imx/clk-imx5.c

568

clk[IMX5_CLK_CKO1_SEL] = imx_clk_mux("cko1_sel", MXC_CCM_CCOSR, 0, 4,

drivers/clk/imx/clk-imx5.c

570

clk[IMX5_CLK_CKO1_PODF] = imx_clk_divider("cko1_podf", "cko1_sel", MXC_CCM_CCOSR, 4, 3);

drivers/clk/imx/clk-imx5.c

571

clk[IMX5_CLK_CKO1] = imx_clk_gate2("cko1", "cko1_podf", MXC_CCM_CCOSR, 7);

drivers/clk/imx/clk-imx5.c

573

clk[IMX5_CLK_CKO2_SEL] = imx_clk_mux("cko2_sel", MXC_CCM_CCOSR, 16, 5,

drivers/clk/imx/clk-imx5.c

575

clk[IMX5_CLK_CKO2_PODF] = imx_clk_divider("cko2_podf", "cko2_sel", MXC_CCM_CCOSR, 21, 3);

drivers/clk/imx/clk-imx5.c

576

clk[IMX5_CLK_CKO2] = imx_clk_gate2("cko2", "cko2_podf", MXC_CCM_CCOSR, 24);

drivers/clk/imx/clk-imx5.c

577

clk[IMX5_CLK_SPDIF_XTAL_SEL] = imx_clk_mux("spdif_xtal_sel", MXC_CCM_CSCMR1, 2, 2,

drivers/clk/imx/clk-imx5.c

579

clk[IMX5_CLK_ARM] = imx_clk_cpu("arm", "cpu_podf",

drivers/clk/imx/clk-imx5.c

580

clk[IMX5_CLK_CPU_PODF],

drivers/clk/imx/clk-imx5.c

581

clk[IMX5_CLK_CPU_PODF_SEL],

drivers/clk/imx/clk-imx5.c

582

clk[IMX5_CLK_PLL1_SW],

drivers/clk/imx/clk-imx5.c

583

clk[IMX5_CLK_STEP_SEL]);

drivers/clk/imx/clk-imx5.c

585

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-imx5.c

587

clk_data.clks = clk;

drivers/clk/imx/clk-imx5.c

588

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk-imx5.c

592

clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]);

drivers/clk/imx/clk-imx5.c

593

clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]);

drivers/clk/imx/clk-imx5.c

596

clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000);

drivers/clk/imx/clk-imx5.c

597

clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000);

drivers/clk/imx/clk-imx5.c

600

clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]);

drivers/clk/imx/clk-imx5.c

603

clk_set_parent(clk[IMX5_CLK_STEP_SEL], clk[IMX5_CLK_LP_APM]);

drivers/clk/imx/clk-imx5.c

605

clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]);

drivers/clk/imx/clk-imx5.c

607

clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]);

drivers/clk/imx/clk-imx5.c

609

r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);

drivers/clk/imx/clk-imx5.c

610

clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);

drivers/clk/imx/clk-imx6q.c

275

clk_set_parent(hws[IMX6QDL_CLK_PERIPH2_CLK2_SEL]->clk,

drivers/clk/imx/clk-imx6q.c

276

hws[IMX6QDL_CLK_PLL3_USB_OTG]->clk);

drivers/clk/imx/clk-imx6q.c

350

(clk_get_parent(hws[IMX6QDL_CLK_PERIPH_PRE]->clk) ==

drivers/clk/imx/clk-imx6q.c

351

hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk)) {

drivers/clk/imx/clk-imx6q.c

403

if (clk_get_parent(hws[IMX6QDL_CLK_PERIPH_PRE]->clk) ==

drivers/clk/imx/clk-imx6q.c

404

hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk)

drivers/clk/imx/clk-imx6q.c

425

struct clk *clk = of_clk_get_by_name(np, name);

drivers/clk/imx/clk-imx6q.c

428

if (IS_ERR(clk))

drivers/clk/imx/clk-imx6q.c

431

hw = __clk_get_hw(clk);

drivers/clk/imx/clk-imx6q.c

498

clk_set_parent(hws[IMX6QDL_PLL1_BYPASS]->clk, hws[IMX6QDL_CLK_PLL1]->clk);

drivers/clk/imx/clk-imx6q.c

499

clk_set_parent(hws[IMX6QDL_PLL2_BYPASS]->clk, hws[IMX6QDL_CLK_PLL2]->clk);

drivers/clk/imx/clk-imx6q.c

500

clk_set_parent(hws[IMX6QDL_PLL3_BYPASS]->clk, hws[IMX6QDL_CLK_PLL3]->clk);

drivers/clk/imx/clk-imx6q.c

501

clk_set_parent(hws[IMX6QDL_PLL4_BYPASS]->clk, hws[IMX6QDL_CLK_PLL4]->clk);

drivers/clk/imx/clk-imx6q.c

502

clk_set_parent(hws[IMX6QDL_PLL5_BYPASS]->clk, hws[IMX6QDL_CLK_PLL5]->clk);

drivers/clk/imx/clk-imx6q.c

503

clk_set_parent(hws[IMX6QDL_PLL6_BYPASS]->clk, hws[IMX6QDL_CLK_PLL6]->clk);

drivers/clk/imx/clk-imx6q.c

504

clk_set_parent(hws[IMX6QDL_PLL7_BYPASS]->clk, hws[IMX6QDL_CLK_PLL7]->clk);

drivers/clk/imx/clk-imx6q.c

927

clk_set_rate(hws[IMX6QDL_CLK_PLL3_PFD1_540M]->clk, 540000000);

drivers/clk/imx/clk-imx6q.c

929

clk_set_parent(hws[IMX6QDL_CLK_IPU1_SEL]->clk, hws[IMX6QDL_CLK_PLL3_PFD1_540M]->clk);

drivers/clk/imx/clk-imx6q.c

931

clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);

drivers/clk/imx/clk-imx6q.c

932

clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);

drivers/clk/imx/clk-imx6q.c

933

clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);

drivers/clk/imx/clk-imx6q.c

934

clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);

drivers/clk/imx/clk-imx6q.c

935

clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI0_SEL]->clk, hws[IMX6QDL_CLK_IPU1_DI0_PRE]->clk);

drivers/clk/imx/clk-imx6q.c

936

clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI1_SEL]->clk, hws[IMX6QDL_CLK_IPU1_DI1_PRE]->clk);

drivers/clk/imx/clk-imx6q.c

937

clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI0_SEL]->clk, hws[IMX6QDL_CLK_IPU2_DI0_PRE]->clk);

drivers/clk/imx/clk-imx6q.c

938

clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI1_SEL]->clk, hws[IMX6QDL_CLK_IPU2_DI1_PRE]->clk);

drivers/clk/imx/clk-imx6q.c

945

clk_set_parent(hws[IMX6QDL_CLK_ENFC_SEL]->clk, hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk);

drivers/clk/imx/clk-imx6q.c

948

clk_prepare_enable(hws[IMX6QDL_CLK_USBPHY1_GATE]->clk);

drivers/clk/imx/clk-imx6q.c

949

clk_prepare_enable(hws[IMX6QDL_CLK_USBPHY2_GATE]->clk);

drivers/clk/imx/clk-imx6q.c

956

ret = clk_set_parent(hws[IMX6QDL_CLK_CKO2_SEL]->clk, hws[IMX6QDL_CLK_OSC]->clk);

drivers/clk/imx/clk-imx6q.c

958

ret = clk_set_parent(hws[IMX6QDL_CLK_CKO]->clk, hws[IMX6QDL_CLK_CKO2]->clk);

drivers/clk/imx/clk-imx6q.c

963

clk_set_parent(hws[IMX6QDL_CLK_SPDIF_SEL]->clk, hws[IMX6QDL_CLK_PLL3_PFD3_454M]->clk);

drivers/clk/imx/clk-imx6q.c

967

clk_set_parent(hws[IMX6QDL_CLK_LVDS1_SEL]->clk, hws[IMX6QDL_CLK_SATA_REF_100M]->clk);

drivers/clk/imx/clk-imx6q.c

974

clk_set_parent(hws[IMX6QDL_CLK_GPU3D_CORE_SEL]->clk,

drivers/clk/imx/clk-imx6q.c

975

hws[IMX6QDL_CLK_PLL2_PFD1_594M]->clk);

drivers/clk/imx/clk-imx6q.c

976

clk_set_parent(hws[IMX6QDL_CLK_GPU2D_CORE_SEL]->clk,

drivers/clk/imx/clk-imx6q.c

977

hws[IMX6QDL_CLK_PLL2_PFD1_594M]->clk);

drivers/clk/imx/clk-imx6q.c

979

clk_set_parent(hws[IMX6QDL_CLK_GPU3D_CORE_SEL]->clk,

drivers/clk/imx/clk-imx6q.c

980

hws[IMX6QDL_CLK_MMDC_CH0_AXI]->clk);

drivers/clk/imx/clk-imx6q.c

981

clk_set_parent(hws[IMX6QDL_CLK_GPU3D_SHADER_SEL]->clk,

drivers/clk/imx/clk-imx6q.c

982

hws[IMX6QDL_CLK_PLL2_PFD1_594M]->clk);

drivers/clk/imx/clk-imx6q.c

983

clk_set_parent(hws[IMX6QDL_CLK_GPU2D_CORE_SEL]->clk,

drivers/clk/imx/clk-imx6q.c

984

hws[IMX6QDL_CLK_PLL3_USB_OTG]->clk);

drivers/clk/imx/clk-imx6q.c

987

clk_set_parent(hws[IMX6QDL_CLK_ENET_REF_SEL]->clk, hws[IMX6QDL_CLK_ENET_REF]->clk);

drivers/clk/imx/clk-imx6sl.c

233

clk_set_parent(hws[IMX6SL_PLL1_BYPASS]->clk, hws[IMX6SL_CLK_PLL1]->clk);

drivers/clk/imx/clk-imx6sl.c

234

clk_set_parent(hws[IMX6SL_PLL2_BYPASS]->clk, hws[IMX6SL_CLK_PLL2]->clk);

drivers/clk/imx/clk-imx6sl.c

235

clk_set_parent(hws[IMX6SL_PLL3_BYPASS]->clk, hws[IMX6SL_CLK_PLL3]->clk);

drivers/clk/imx/clk-imx6sl.c

236

clk_set_parent(hws[IMX6SL_PLL4_BYPASS]->clk, hws[IMX6SL_CLK_PLL4]->clk);

drivers/clk/imx/clk-imx6sl.c

237

clk_set_parent(hws[IMX6SL_PLL5_BYPASS]->clk, hws[IMX6SL_CLK_PLL5]->clk);

drivers/clk/imx/clk-imx6sl.c

238

clk_set_parent(hws[IMX6SL_PLL6_BYPASS]->clk, hws[IMX6SL_CLK_PLL6]->clk);

drivers/clk/imx/clk-imx6sl.c

239

clk_set_parent(hws[IMX6SL_PLL7_BYPASS]->clk, hws[IMX6SL_CLK_PLL7]->clk);

drivers/clk/imx/clk-imx6sl.c

422

ret = clk_set_rate(hws[IMX6SL_CLK_AHB]->clk, 132000000);

drivers/clk/imx/clk-imx6sl.c

428

clk_prepare_enable(hws[IMX6SL_CLK_USBPHY1_GATE]->clk);

drivers/clk/imx/clk-imx6sl.c

429

clk_prepare_enable(hws[IMX6SL_CLK_USBPHY2_GATE]->clk);

drivers/clk/imx/clk-imx6sl.c

433

clk_set_parent(hws[IMX6SL_CLK_SPDIF0_SEL]->clk, hws[IMX6SL_CLK_PLL3_PFD3]->clk);

drivers/clk/imx/clk-imx6sl.c

436

clk_set_parent(hws[IMX6SL_CLK_LCDIF_PIX_SEL]->clk,

drivers/clk/imx/clk-imx6sl.c

437

hws[IMX6SL_CLK_PLL5_VIDEO_DIV]->clk);

drivers/clk/imx/clk-imx6sl.c

439

clk_set_parent(hws[IMX6SL_CLK_LCDIF_AXI_SEL]->clk,

drivers/clk/imx/clk-imx6sl.c

440

hws[IMX6SL_CLK_PLL2_PFD2]->clk);

drivers/clk/imx/clk-imx6sll.c

345

clk_set_rate(hws[IMX6SLL_CLK_AHB]->clk, 99000000);

drivers/clk/imx/clk-imx6sll.c

348

clk_set_parent(hws[IMX6SLL_CLK_PERIPH_CLK2_SEL]->clk, hws[IMX6SLL_CLK_PLL3_USB_OTG]->clk);

drivers/clk/imx/clk-imx6sll.c

349

clk_set_parent(hws[IMX6SLL_CLK_PERIPH]->clk, hws[IMX6SLL_CLK_PERIPH_CLK2]->clk);

drivers/clk/imx/clk-imx6sll.c

350

clk_set_parent(hws[IMX6SLL_CLK_PERIPH_PRE]->clk, hws[IMX6SLL_CLK_PLL2_BUS]->clk);

drivers/clk/imx/clk-imx6sll.c

351

clk_set_parent(hws[IMX6SLL_CLK_PERIPH]->clk, hws[IMX6SLL_CLK_PERIPH_PRE]->clk);

drivers/clk/imx/clk-imx6sll.c

353

clk_set_rate(hws[IMX6SLL_CLK_AHB]->clk, 132000000);

drivers/clk/imx/clk-imx6sx.c

177

clk_set_parent(hws[IMX6SX_PLL1_BYPASS]->clk, hws[IMX6SX_CLK_PLL1]->clk);

drivers/clk/imx/clk-imx6sx.c

178

clk_set_parent(hws[IMX6SX_PLL2_BYPASS]->clk, hws[IMX6SX_CLK_PLL2]->clk);

drivers/clk/imx/clk-imx6sx.c

179

clk_set_parent(hws[IMX6SX_PLL3_BYPASS]->clk, hws[IMX6SX_CLK_PLL3]->clk);

drivers/clk/imx/clk-imx6sx.c

180

clk_set_parent(hws[IMX6SX_PLL4_BYPASS]->clk, hws[IMX6SX_CLK_PLL4]->clk);

drivers/clk/imx/clk-imx6sx.c

181

clk_set_parent(hws[IMX6SX_PLL5_BYPASS]->clk, hws[IMX6SX_CLK_PLL5]->clk);

drivers/clk/imx/clk-imx6sx.c

182

clk_set_parent(hws[IMX6SX_PLL6_BYPASS]->clk, hws[IMX6SX_CLK_PLL6]->clk);

drivers/clk/imx/clk-imx6sx.c

183

clk_set_parent(hws[IMX6SX_PLL7_BYPASS]->clk, hws[IMX6SX_CLK_PLL7]->clk);

drivers/clk/imx/clk-imx6sx.c

493

clk_prepare_enable(hws[IMX6SX_CLK_USBPHY1_GATE]->clk);

drivers/clk/imx/clk-imx6sx.c

494

clk_prepare_enable(hws[IMX6SX_CLK_USBPHY2_GATE]->clk);

drivers/clk/imx/clk-imx6sx.c

498

clk_set_parent(hws[IMX6SX_CLK_EIM_SLOW_SEL]->clk, hws[IMX6SX_CLK_PLL2_PFD2]->clk);

drivers/clk/imx/clk-imx6sx.c

499

clk_set_rate(hws[IMX6SX_CLK_EIM_SLOW]->clk, 132000000);

drivers/clk/imx/clk-imx6sx.c

506

clk_set_parent(hws[IMX6SX_CLK_LCDIF1_PRE_SEL]->clk,

drivers/clk/imx/clk-imx6sx.c

507

hws[IMX6SX_CLK_PLL5_VIDEO_DIV]->clk);

drivers/clk/imx/clk-imx6sx.c

508

clk_set_parent(hws[IMX6SX_CLK_LCDIF1_SEL]->clk,

drivers/clk/imx/clk-imx6sx.c

509

hws[IMX6SX_CLK_LCDIF1_PODF]->clk);

drivers/clk/imx/clk-imx6sx.c

513

if (clk_set_parent(hws[IMX6SX_CLK_LVDS1_SEL]->clk, hws[IMX6SX_CLK_PCIE_REF_125M]->clk))

drivers/clk/imx/clk-imx6sx.c

520

clk_set_parent(hws[IMX6SX_CLK_ENET_PRE_SEL]->clk, hws[IMX6SX_CLK_PLL2_PFD2]->clk);

drivers/clk/imx/clk-imx6sx.c

521

clk_set_parent(hws[IMX6SX_CLK_ENET_SEL]->clk, hws[IMX6SX_CLK_ENET_PODF]->clk);

drivers/clk/imx/clk-imx6sx.c

522

clk_set_rate(hws[IMX6SX_CLK_ENET_PODF]->clk, 200000000);

drivers/clk/imx/clk-imx6sx.c

523

clk_set_rate(hws[IMX6SX_CLK_ENET_REF]->clk, 125000000);

drivers/clk/imx/clk-imx6sx.c

524

clk_set_rate(hws[IMX6SX_CLK_ENET2_REF]->clk, 125000000);

drivers/clk/imx/clk-imx6sx.c

527

clk_set_rate(hws[IMX6SX_CLK_PLL4_AUDIO_DIV]->clk, 393216000);

drivers/clk/imx/clk-imx6sx.c

529

clk_set_parent(hws[IMX6SX_CLK_SPDIF_SEL]->clk, hws[IMX6SX_CLK_PLL4_AUDIO_DIV]->clk);

drivers/clk/imx/clk-imx6sx.c

530

clk_set_rate(hws[IMX6SX_CLK_SPDIF_PODF]->clk, 98304000);

drivers/clk/imx/clk-imx6sx.c

532

clk_set_parent(hws[IMX6SX_CLK_AUDIO_SEL]->clk, hws[IMX6SX_CLK_PLL3_USB_OTG]->clk);

drivers/clk/imx/clk-imx6sx.c

533

clk_set_rate(hws[IMX6SX_CLK_AUDIO_PODF]->clk, 24000000);

drivers/clk/imx/clk-imx6sx.c

535

clk_set_parent(hws[IMX6SX_CLK_SSI1_SEL]->clk, hws[IMX6SX_CLK_PLL4_AUDIO_DIV]->clk);

drivers/clk/imx/clk-imx6sx.c

536

clk_set_parent(hws[IMX6SX_CLK_SSI2_SEL]->clk, hws[IMX6SX_CLK_PLL4_AUDIO_DIV]->clk);

drivers/clk/imx/clk-imx6sx.c

537

clk_set_parent(hws[IMX6SX_CLK_SSI3_SEL]->clk, hws[IMX6SX_CLK_PLL4_AUDIO_DIV]->clk);

drivers/clk/imx/clk-imx6sx.c

538

clk_set_rate(hws[IMX6SX_CLK_SSI1_PODF]->clk, 24576000);

drivers/clk/imx/clk-imx6sx.c

539

clk_set_rate(hws[IMX6SX_CLK_SSI2_PODF]->clk, 24576000);

drivers/clk/imx/clk-imx6sx.c

540

clk_set_rate(hws[IMX6SX_CLK_SSI3_PODF]->clk, 24576000);

drivers/clk/imx/clk-imx6sx.c

542

clk_set_parent(hws[IMX6SX_CLK_ESAI_SEL]->clk, hws[IMX6SX_CLK_PLL4_AUDIO_DIV]->clk);

drivers/clk/imx/clk-imx6sx.c

543

clk_set_rate(hws[IMX6SX_CLK_ESAI_PODF]->clk, 24576000);

drivers/clk/imx/clk-imx6sx.c

546

clk_set_parent(hws[IMX6SX_CLK_VID_SEL]->clk, hws[IMX6SX_CLK_PLL3_USB_OTG]->clk);

drivers/clk/imx/clk-imx6sx.c

549

clk_set_parent(hws[IMX6SX_CLK_CAN_SEL]->clk, hws[IMX6SX_CLK_PLL3_60M]->clk);

drivers/clk/imx/clk-imx6sx.c

552

clk_set_parent(hws[IMX6SX_CLK_GPU_CORE_SEL]->clk, hws[IMX6SX_CLK_PLL3_PFD0]->clk);

drivers/clk/imx/clk-imx6sx.c

553

clk_set_parent(hws[IMX6SX_CLK_GPU_AXI_SEL]->clk, hws[IMX6SX_CLK_PLL3_PFD0]->clk);

drivers/clk/imx/clk-imx6sx.c

555

clk_set_parent(hws[IMX6SX_CLK_QSPI1_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk);

drivers/clk/imx/clk-imx6sx.c

556

clk_set_parent(hws[IMX6SX_CLK_QSPI2_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk);

drivers/clk/imx/clk-imx6ul.c

179

clk_set_parent(hws[IMX6UL_PLL1_BYPASS]->clk, hws[IMX6UL_CLK_PLL1]->clk);

drivers/clk/imx/clk-imx6ul.c

180

clk_set_parent(hws[IMX6UL_PLL2_BYPASS]->clk, hws[IMX6UL_CLK_PLL2]->clk);

drivers/clk/imx/clk-imx6ul.c

181

clk_set_parent(hws[IMX6UL_PLL3_BYPASS]->clk, hws[IMX6UL_CLK_PLL3]->clk);

drivers/clk/imx/clk-imx6ul.c

182

clk_set_parent(hws[IMX6UL_PLL4_BYPASS]->clk, hws[IMX6UL_CLK_PLL4]->clk);

drivers/clk/imx/clk-imx6ul.c

183

clk_set_parent(hws[IMX6UL_PLL5_BYPASS]->clk, hws[IMX6UL_CLK_PLL5]->clk);

drivers/clk/imx/clk-imx6ul.c

184

clk_set_parent(hws[IMX6UL_PLL6_BYPASS]->clk, hws[IMX6UL_CLK_PLL6]->clk);

drivers/clk/imx/clk-imx6ul.c

185

clk_set_parent(hws[IMX6UL_PLL7_BYPASS]->clk, hws[IMX6UL_CLK_PLL7]->clk);

drivers/clk/imx/clk-imx6ul.c

510

clk_set_rate(hws[IMX6UL_CLK_AHB]->clk, 99000000);

drivers/clk/imx/clk-imx6ul.c

513

clk_set_parent(hws[IMX6UL_CLK_PERIPH_CLK2_SEL]->clk, hws[IMX6UL_CLK_OSC]->clk);

drivers/clk/imx/clk-imx6ul.c

514

clk_set_parent(hws[IMX6UL_CLK_PERIPH]->clk, hws[IMX6UL_CLK_PERIPH_CLK2]->clk);

drivers/clk/imx/clk-imx6ul.c

515

clk_set_parent(hws[IMX6UL_CLK_PERIPH_PRE]->clk, hws[IMX6UL_CLK_PLL2_BUS]->clk);

drivers/clk/imx/clk-imx6ul.c

516

clk_set_parent(hws[IMX6UL_CLK_PERIPH]->clk, hws[IMX6UL_CLK_PERIPH_PRE]->clk);

drivers/clk/imx/clk-imx6ul.c

519

clk_set_rate(hws[IMX6UL_CLK_AHB]->clk, 132000000);

drivers/clk/imx/clk-imx6ul.c

522

clk_set_parent(hws[IMX6UL_CLK_PERCLK_SEL]->clk, hws[IMX6UL_CLK_OSC]->clk);

drivers/clk/imx/clk-imx6ul.c

524

clk_set_rate(hws[IMX6UL_CLK_ENET_REF]->clk, 50000000);

drivers/clk/imx/clk-imx6ul.c

525

clk_set_rate(hws[IMX6UL_CLK_ENET2_REF]->clk, 50000000);

drivers/clk/imx/clk-imx6ul.c

526

clk_set_rate(hws[IMX6UL_CLK_CSI]->clk, 24000000);

drivers/clk/imx/clk-imx6ul.c

529

clk_prepare_enable(hws[IMX6UL_CLK_AIPSTZ3]->clk);

drivers/clk/imx/clk-imx6ul.c

532

clk_prepare_enable(hws[IMX6UL_CLK_USBPHY1_GATE]->clk);

drivers/clk/imx/clk-imx6ul.c

533

clk_prepare_enable(hws[IMX6UL_CLK_USBPHY2_GATE]->clk);

drivers/clk/imx/clk-imx6ul.c

536

clk_set_parent(hws[IMX6UL_CLK_CAN_SEL]->clk, hws[IMX6UL_CLK_PLL3_80M]->clk);

drivers/clk/imx/clk-imx6ul.c

538

clk_set_parent(hws[IMX6UL_CLK_SIM_PRE_SEL]->clk, hws[IMX6UL_CLK_PLL3_USB_OTG]->clk);

drivers/clk/imx/clk-imx6ul.c

540

clk_set_parent(hws[IMX6ULL_CLK_EPDC_PRE_SEL]->clk, hws[IMX6UL_CLK_PLL3_PFD2]->clk);

drivers/clk/imx/clk-imx6ul.c

542

clk_set_parent(hws[IMX6UL_CLK_ENFC_SEL]->clk, hws[IMX6UL_CLK_PLL2_PFD2]->clk);

drivers/clk/imx/clk-imx6ul.c

544

clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET1_REF_125M]->clk);

drivers/clk/imx/clk-imx6ul.c

545

clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF_125M]->clk);

drivers/clk/imx/clk-imx7d.c

859

hws[IMX7D_ARM_A7_ROOT_CLK]->clk,

drivers/clk/imx/clk-imx7d.c

860

hws[IMX7D_ARM_A7_ROOT_SRC]->clk,

drivers/clk/imx/clk-imx7d.c

861

hws[IMX7D_PLL_ARM_MAIN_CLK]->clk,

drivers/clk/imx/clk-imx7d.c

862

hws[IMX7D_PLL_SYS_MAIN_CLK]->clk);

drivers/clk/imx/clk-imx7d.c

868

clk_set_parent(hws[IMX7D_PLL_ARM_MAIN_BYPASS]->clk, hws[IMX7D_PLL_ARM_MAIN]->clk);

drivers/clk/imx/clk-imx7d.c

869

clk_set_parent(hws[IMX7D_PLL_DRAM_MAIN_BYPASS]->clk, hws[IMX7D_PLL_DRAM_MAIN]->clk);

drivers/clk/imx/clk-imx7d.c

870

clk_set_parent(hws[IMX7D_PLL_SYS_MAIN_BYPASS]->clk, hws[IMX7D_PLL_SYS_MAIN]->clk);

drivers/clk/imx/clk-imx7d.c

871

clk_set_parent(hws[IMX7D_PLL_ENET_MAIN_BYPASS]->clk, hws[IMX7D_PLL_ENET_MAIN]->clk);

drivers/clk/imx/clk-imx7d.c

872

clk_set_parent(hws[IMX7D_PLL_AUDIO_MAIN_BYPASS]->clk, hws[IMX7D_PLL_AUDIO_MAIN]->clk);

drivers/clk/imx/clk-imx7d.c

873

clk_set_parent(hws[IMX7D_PLL_VIDEO_MAIN_BYPASS]->clk, hws[IMX7D_PLL_VIDEO_MAIN]->clk);

drivers/clk/imx/clk-imx7d.c

875

clk_set_parent(hws[IMX7D_MIPI_CSI_ROOT_SRC]->clk, hws[IMX7D_PLL_SYS_PFD3_CLK]->clk);

drivers/clk/imx/clk-imx7d.c

878

clk_set_parent(hws[IMX7D_GPT1_ROOT_SRC]->clk, hws[IMX7D_OSC_24M_CLK]->clk);

drivers/clk/imx/clk-imx7ulp.c

110

hws[IMX7ULP_CLK_CORE] = imx_clk_hw_cpu("core", "divcore", hws[IMX7ULP_CLK_CORE_DIV]->clk, hws[IMX7ULP_CLK_SYS_SEL]->clk, hws[IMX7ULP_CLK_SPLL_SEL]->clk, hws[IMX7ULP_CLK_FIRC]->clk);

drivers/clk/imx/clk-imx7ulp.c

112

hws[IMX7ULP_CLK_HSRUN_CORE] = imx_clk_hw_cpu("hsrun_core", "hsrun_divcore", hws[IMX7ULP_CLK_HSRUN_CORE_DIV]->clk, hws[IMX7ULP_CLK_HSRUN_SYS_SEL]->clk, hws[IMX7ULP_CLK_SPLL_SEL]->clk, hws[IMX7ULP_CLK_FIRC]->clk);

drivers/clk/imx/clk-imx8mm.c

598

hws[IMX8MM_CLK_A53_CORE]->clk,

drivers/clk/imx/clk-imx8mm.c

599

hws[IMX8MM_CLK_A53_CORE]->clk,

drivers/clk/imx/clk-imx8mm.c

600

hws[IMX8MM_ARM_PLL_OUT]->clk,

drivers/clk/imx/clk-imx8mm.c

601

hws[IMX8MM_CLK_A53_DIV]->clk);

drivers/clk/imx/clk-imx8mn.c

593

hws[IMX8MN_CLK_A53_CORE]->clk,

drivers/clk/imx/clk-imx8mn.c

594

hws[IMX8MN_CLK_A53_CORE]->clk,

drivers/clk/imx/clk-imx8mn.c

595

hws[IMX8MN_ARM_PLL_OUT]->clk,

drivers/clk/imx/clk-imx8mn.c

596

hws[IMX8MN_CLK_A53_DIV]->clk);

drivers/clk/imx/clk-imx8mp.c

852

hws[IMX8MP_CLK_A53_CORE]->clk,

drivers/clk/imx/clk-imx8mp.c

853

hws[IMX8MP_CLK_A53_CORE]->clk,

drivers/clk/imx/clk-imx8mp.c

854

hws[IMX8MP_ARM_PLL_OUT]->clk,

drivers/clk/imx/clk-imx8mp.c

855

hws[IMX8MP_CLK_A53_DIV]->clk);

drivers/clk/imx/clk-imx8mq.c

594

hws[IMX8MQ_CLK_A53_CORE]->clk,

drivers/clk/imx/clk-imx8mq.c

595

hws[IMX8MQ_CLK_A53_CORE]->clk,

drivers/clk/imx/clk-imx8mq.c

596

hws[IMX8MQ_ARM_PLL_OUT]->clk,

drivers/clk/imx/clk-imx8mq.c

597

hws[IMX8MQ_CLK_A53_DIV]->clk);

drivers/clk/imx/clk-imx93.c

162

u32 clk;

drivers/clk/imx/clk-imx93.c

333

clks[root->clk] = imx93_clk_composite_flags(root->name,

drivers/clk/imx/clk-imx93.c

342

clks[ccgr->clk] = imx93_clk_gate(NULL,

drivers/clk/imx/clk-imx93.c

351

clks[IMX93_CLK_A55_SEL]->clk,

drivers/clk/imx/clk-imx93.c

352

clks[IMX93_CLK_A55_SEL]->clk,

drivers/clk/imx/clk-imx93.c

353

clks[IMX93_CLK_ARM_PLL]->clk,

drivers/clk/imx/clk-imx93.c

354

clks[IMX93_CLK_A55_GATE]->clk);

drivers/clk/imx/clk-imx93.c

57

u32 clk;

drivers/clk/imx/clk-imx95-blk-ctl.c

34

struct clk *clk_apb;

drivers/clk/imx/clk-lpcg-scu.c

101

reg = readl_relaxed(clk->reg);

drivers/clk/imx/clk-lpcg-scu.c

102

reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx);

drivers/clk/imx/clk-lpcg-scu.c

103

lpcg_e10858_writel(clk_hw_get_rate(hw), clk->reg, reg);

drivers/clk/imx/clk-lpcg-scu.c

117

struct clk_lpcg_scu *clk;

drivers/clk/imx/clk-lpcg-scu.c

122

clk = kzalloc_obj(*clk);

drivers/clk/imx/clk-lpcg-scu.c

123

if (!clk)

drivers/clk/imx/clk-lpcg-scu.c

126

clk->reg = reg;

drivers/clk/imx/clk-lpcg-scu.c

127

clk->bit_idx = bit_idx;

drivers/clk/imx/clk-lpcg-scu.c

128

clk->hw_gate = hw_gate;

drivers/clk/imx/clk-lpcg-scu.c

136

clk->hw.init = &init;

drivers/clk/imx/clk-lpcg-scu.c

138

hw = &clk->hw;

drivers/clk/imx/clk-lpcg-scu.c

141

kfree(clk);

drivers/clk/imx/clk-lpcg-scu.c

147

dev_set_drvdata(dev, clk);

drivers/clk/imx/clk-lpcg-scu.c

154

struct clk_lpcg_scu *clk = to_clk_lpcg_scu(hw);

drivers/clk/imx/clk-lpcg-scu.c

156

clk_hw_unregister(&clk->hw);

drivers/clk/imx/clk-lpcg-scu.c

157

kfree(clk);

drivers/clk/imx/clk-lpcg-scu.c

162

struct clk_lpcg_scu *clk = dev_get_drvdata(dev);

drivers/clk/imx/clk-lpcg-scu.c

164

if (!strncmp("hdmi_lpcg", clk_hw_get_name(&clk->hw), strlen("hdmi_lpcg")))

drivers/clk/imx/clk-lpcg-scu.c

167

clk->state = readl_relaxed(clk->reg);

drivers/clk/imx/clk-lpcg-scu.c

168

dev_dbg(dev, "save lpcg state 0x%x\n", clk->state);

drivers/clk/imx/clk-lpcg-scu.c

175

struct clk_lpcg_scu *clk = dev_get_drvdata(dev);

drivers/clk/imx/clk-lpcg-scu.c

177

if (!strncmp("hdmi_lpcg", clk_hw_get_name(&clk->hw), strlen("hdmi_lpcg")))

drivers/clk/imx/clk-lpcg-scu.c

180

writel(clk->state, clk->reg);

drivers/clk/imx/clk-lpcg-scu.c

181

lpcg_e10858_writel(0, clk->reg, clk->state);

drivers/clk/imx/clk-lpcg-scu.c

182

dev_dbg(dev, "restore lpcg state 0x%x\n", clk->state);

drivers/clk/imx/clk-lpcg-scu.c

71

struct clk_lpcg_scu *clk = to_clk_lpcg_scu(hw);

drivers/clk/imx/clk-lpcg-scu.c

77

reg = readl_relaxed(clk->reg);

drivers/clk/imx/clk-lpcg-scu.c

78

reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx);

drivers/clk/imx/clk-lpcg-scu.c

81

if (clk->hw_gate)

drivers/clk/imx/clk-lpcg-scu.c

84

reg |= val << clk->bit_idx;

drivers/clk/imx/clk-lpcg-scu.c

86

lpcg_e10858_writel(clk_hw_get_rate(hw), clk->reg, reg);

drivers/clk/imx/clk-lpcg-scu.c

95

struct clk_lpcg_scu *clk = to_clk_lpcg_scu(hw);

drivers/clk/imx/clk-pllv1.c

30

#define to_clk_pllv1(clk) (container_of(clk, struct clk_pllv1, clk))

drivers/clk/imx/clk-pllv2.c

14

#define to_clk_pllv2(clk) (container_of(clk, struct clk_pllv2, clk))

drivers/clk/imx/clk-scu.c

131

u8 clk;

drivers/clk/imx/clk-scu.c

149

u8 clk;

drivers/clk/imx/clk-scu.c

166

u8 clk;

drivers/clk/imx/clk-scu.c

242

struct clk_scu *clk = to_clk_scu(hw);

drivers/clk/imx/clk-scu.c

252

msg.data.req.resource = cpu_to_le16(clk->rsrc_id);

drivers/clk/imx/clk-scu.c

253

msg.data.req.clk = clk->clk_type;

drivers/clk/imx/clk-scu.c

285

struct clk_scu *clk = to_clk_scu(hw);

drivers/clk/imx/clk-scu.c

289

if (clk->rsrc_id == IMX_SC_R_A35 || clk->rsrc_id == IMX_SC_R_A53)

drivers/clk/imx/clk-scu.c

291

else if (clk->rsrc_id == IMX_SC_R_A72)

drivers/clk/imx/clk-scu.c

315

struct clk_scu *clk = to_clk_scu(hw);

drivers/clk/imx/clk-scu.c

325

msg.resource = cpu_to_le16(clk->rsrc_id);

drivers/clk/imx/clk-scu.c

326

msg.clk = clk->clk_type;

drivers/clk/imx/clk-scu.c

333

struct clk_scu *clk = to_clk_scu(hw);

drivers/clk/imx/clk-scu.c

343

msg.data.req.resource = cpu_to_le16(clk->rsrc_id);

drivers/clk/imx/clk-scu.c

344

msg.data.req.clk = clk->clk_type;

drivers/clk/imx/clk-scu.c

353

clk->parent_index = msg.data.resp.parent;

drivers/clk/imx/clk-scu.c

360

struct clk_scu *clk = to_clk_scu(hw);

drivers/clk/imx/clk-scu.c

370

msg.resource = cpu_to_le16(clk->rsrc_id);

drivers/clk/imx/clk-scu.c

371

msg.clk = clk->clk_type;

drivers/clk/imx/clk-scu.c

381

clk->parent_index = index;

drivers/clk/imx/clk-scu.c

387

u8 clk, bool enable, bool autog)

drivers/clk/imx/clk-scu.c

398

msg.clk = clk;

drivers/clk/imx/clk-scu.c

413

struct clk_scu *clk = to_clk_scu(hw);

drivers/clk/imx/clk-scu.c

415

return sc_pm_clock_enable(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

416

clk->clk_type, true, false);

drivers/clk/imx/clk-scu.c

427

struct clk_scu *clk = to_clk_scu(hw);

drivers/clk/imx/clk-scu.c

430

ret = sc_pm_clock_enable(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

431

clk->clk_type, false, false);

drivers/clk/imx/clk-scu.c

466

struct clk_scu *clk;

drivers/clk/imx/clk-scu.c

470

clk = kzalloc_obj(*clk);

drivers/clk/imx/clk-scu.c

471

if (!clk)

drivers/clk/imx/clk-scu.c

474

clk->rsrc_id = rsrc_id;

drivers/clk/imx/clk-scu.c

475

clk->clk_type = clk_type;

drivers/clk/imx/clk-scu.c

496

clk->hw.init = &init;

drivers/clk/imx/clk-scu.c

498

hw = &clk->hw;

drivers/clk/imx/clk-scu.c

501

kfree(clk);

drivers/clk/imx/clk-scu.c

507

dev_set_drvdata(dev, clk);

drivers/clk/imx/clk-scu.c

518

struct imx_scu_clk_node *clk;

drivers/clk/imx/clk-scu.c

520

list_for_each_entry(clk, &scu_clks[rsrc], node) {

drivers/clk/imx/clk-scu.c

521

if (clk->clk_type == idx)

drivers/clk/imx/clk-scu.c

522

return clk->hw;

drivers/clk/imx/clk-scu.c

531

struct imx_scu_clk_node *clk = dev_get_platdata(dev);

drivers/clk/imx/clk-scu.c

535

if (!((clk->rsrc == IMX_SC_R_A35) || (clk->rsrc == IMX_SC_R_A53) ||

drivers/clk/imx/clk-scu.c

536

(clk->rsrc == IMX_SC_R_A72))) {

drivers/clk/imx/clk-scu.c

550

hw = __imx_clk_scu(dev, clk->name, clk->parents, clk->num_parents,

drivers/clk/imx/clk-scu.c

551

clk->rsrc, clk->clk_type);

drivers/clk/imx/clk-scu.c

557

clk->hw = hw;

drivers/clk/imx/clk-scu.c

558

list_add_tail(&clk->node, &imx_scu_clks[clk->rsrc]);

drivers/clk/imx/clk-scu.c

560

if (!((clk->rsrc == IMX_SC_R_A35) || (clk->rsrc == IMX_SC_R_A53) ||

drivers/clk/imx/clk-scu.c

561

(clk->rsrc == IMX_SC_R_A72))) {

drivers/clk/imx/clk-scu.c

565

dev_dbg(dev, "register SCU clock rsrc:%d type:%d\n", clk->rsrc,

drivers/clk/imx/clk-scu.c

566

clk->clk_type);

drivers/clk/imx/clk-scu.c

573

struct clk_scu *clk = dev_get_drvdata(dev);

drivers/clk/imx/clk-scu.c

574

u32 rsrc_id = clk->rsrc_id;

drivers/clk/imx/clk-scu.c

580

clk->parent = clk_hw_get_parent(&clk->hw);

drivers/clk/imx/clk-scu.c

583

if (clk->rsrc_id == IMX_SC_R_DC_0_VIDEO0 ||

drivers/clk/imx/clk-scu.c

584

clk->rsrc_id == IMX_SC_R_DC_0_VIDEO1 ||

drivers/clk/imx/clk-scu.c

585

clk->rsrc_id == IMX_SC_R_DC_1_VIDEO0 ||

drivers/clk/imx/clk-scu.c

586

clk->rsrc_id == IMX_SC_R_DC_1_VIDEO1)

drivers/clk/imx/clk-scu.c

587

clk->rate = clk_scu_recalc_rate(&clk->hw, 0);

drivers/clk/imx/clk-scu.c

589

clk->rate = clk_hw_get_rate(&clk->hw);

drivers/clk/imx/clk-scu.c

590

clk->is_enabled = clk_hw_is_prepared(&clk->hw);

drivers/clk/imx/clk-scu.c

592

if (clk->parent)

drivers/clk/imx/clk-scu.c

593

dev_dbg(dev, "save parent %s idx %u\n", clk_hw_get_name(clk->parent),

drivers/clk/imx/clk-scu.c

594

clk->parent_index);

drivers/clk/imx/clk-scu.c

596

if (clk->rate)

drivers/clk/imx/clk-scu.c

597

dev_dbg(dev, "save rate %d\n", clk->rate);

drivers/clk/imx/clk-scu.c

599

if (clk->is_enabled)

drivers/clk/imx/clk-scu.c

607

struct clk_scu *clk = dev_get_drvdata(dev);

drivers/clk/imx/clk-scu.c

608

u32 rsrc_id = clk->rsrc_id;

drivers/clk/imx/clk-scu.c

615

if (clk->parent) {

drivers/clk/imx/clk-scu.c

616

ret = clk_scu_set_parent(&clk->hw, clk->parent_index);

drivers/clk/imx/clk-scu.c

618

clk_hw_get_name(clk->parent),

drivers/clk/imx/clk-scu.c

619

clk->parent_index, !ret ? "success" : "failed");

drivers/clk/imx/clk-scu.c

622

if (clk->rate) {

drivers/clk/imx/clk-scu.c

623

ret = clk_scu_set_rate(&clk->hw, clk->rate, 0);

drivers/clk/imx/clk-scu.c

624

dev_dbg(dev, "restore rate %d %s\n", clk->rate,

drivers/clk/imx/clk-scu.c

628

if (clk->is_enabled && rsrc_id != IMX_SC_R_PI_0_PLL) {

drivers/clk/imx/clk-scu.c

629

ret = clk_scu_prepare(&clk->hw);

drivers/clk/imx/clk-scu.c

682

struct imx_scu_clk_node clk = {

drivers/clk/imx/clk-scu.c

705

ret = platform_device_add_data(pdev, &clk, sizeof(clk));

drivers/clk/imx/clk-scu.c

732

struct imx_scu_clk_node *clk, *n;

drivers/clk/imx/clk-scu.c

736

list_for_each_entry_safe(clk, n, &imx_scu_clks[i], node) {

drivers/clk/imx/clk-scu.c

737

clk_hw_unregister(clk->hw);

drivers/clk/imx/clk-scu.c

738

kfree(clk);

drivers/clk/imx/clk-scu.c

746

struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);

drivers/clk/imx/clk-scu.c

751

err = imx_sc_misc_get_control(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

752

clk->gpr_id, &val);

drivers/clk/imx/clk-scu.c

773

struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);

drivers/clk/imx/clk-scu.c

778

err = imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

779

clk->gpr_id, val);

drivers/clk/imx/clk-scu.c

792

struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);

drivers/clk/imx/clk-scu.c

795

imx_sc_misc_get_control(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

796

clk->gpr_id, &val);

drivers/clk/imx/clk-scu.c

803

struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);

drivers/clk/imx/clk-scu.c

805

return imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

806

clk->gpr_id, index);

drivers/clk/imx/clk-scu.c

817

struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);

drivers/clk/imx/clk-scu.c

819

return imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

820

clk->gpr_id, !clk->gate_invert);

drivers/clk/imx/clk-scu.c

825

struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);

drivers/clk/imx/clk-scu.c

828

ret = imx_sc_misc_set_control(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

829

clk->gpr_id, clk->gate_invert);

drivers/clk/imx/clk-scu.c

837

struct clk_gpr_scu *clk = to_clk_gpr_scu(hw);

drivers/clk/imx/clk-scu.c

841

ret = imx_sc_misc_get_control(ccm_ipc_handle, clk->rsrc_id,

drivers/clk/imx/clk-scu.c

842

clk->gpr_id, &val);

drivers/clk/imx/clk-scu.c

846

return clk->gate_invert ? !val : val;

drivers/clk/imx/clk-scu.c

860

struct clk_gpr_scu *clk;

drivers/clk/imx/clk-scu.c

882

clk = kzalloc_obj(*clk);

drivers/clk/imx/clk-scu.c

883

if (!clk) {

drivers/clk/imx/clk-scu.c

888

clk->rsrc_id = rsrc_id;

drivers/clk/imx/clk-scu.c

889

clk->gpr_id = gpr_id;

drivers/clk/imx/clk-scu.c

890

clk->flags = flags;

drivers/clk/imx/clk-scu.c

891

clk->gate_invert = invert;

drivers/clk/imx/clk-scu.c

90

u8 clk;

drivers/clk/imx/clk-scu.c

907

clk->hw.init = &init;

drivers/clk/imx/clk-scu.c

909

hw = &clk->hw;

drivers/clk/imx/clk-scu.c

912

kfree(clk);

drivers/clk/imx/clk-scu.c

95

u8 clk;

drivers/clk/imx/clk-vf610.c

113

static struct clk *clk[VF610_CLK_END];

drivers/clk/imx/clk-vf610.c

131

static struct clk * __init vf610_get_fixed_clock(

drivers/clk/imx/clk-vf610.c

134

struct clk *clk = of_clk_get_by_name(ccm_node, name);

drivers/clk/imx/clk-vf610.c

137

if (IS_ERR(clk))

drivers/clk/imx/clk-vf610.c

138

clk = imx_obtain_fixed_clock(name, 0);

drivers/clk/imx/clk-vf610.c

139

return clk;

drivers/clk/imx/clk-vf610.c

188

clk[VF610_CLK_DUMMY] = imx_clk_fixed("dummy", 0);

drivers/clk/imx/clk-vf610.c

189

clk[VF610_CLK_SIRC_128K] = imx_clk_fixed("sirc_128k", 128000);

drivers/clk/imx/clk-vf610.c

190

clk[VF610_CLK_SIRC_32K] = imx_clk_fixed("sirc_32k", 32000);

drivers/clk/imx/clk-vf610.c

191

clk[VF610_CLK_FIRC] = imx_clk_fixed("firc", 24000000);

drivers/clk/imx/clk-vf610.c

193

clk[VF610_CLK_SXOSC] = vf610_get_fixed_clock(ccm_node, "sxosc");

drivers/clk/imx/clk-vf610.c

194

clk[VF610_CLK_FXOSC] = vf610_get_fixed_clock(ccm_node, "fxosc");

drivers/clk/imx/clk-vf610.c

195

clk[VF610_CLK_AUDIO_EXT] = vf610_get_fixed_clock(ccm_node, "audio_ext");

drivers/clk/imx/clk-vf610.c

196

clk[VF610_CLK_ENET_EXT] = vf610_get_fixed_clock(ccm_node, "enet_ext");

drivers/clk/imx/clk-vf610.c

199

clk[VF610_CLK_ANACLK1] = vf610_get_fixed_clock(ccm_node, "anaclk1");

drivers/clk/imx/clk-vf610.c

201

clk[VF610_CLK_FXOSC_HALF] = imx_clk_fixed_factor("fxosc_half", "fxosc", 1, 2);

drivers/clk/imx/clk-vf610.c

212

clk[VF610_CLK_SLOW_CLK_SEL] = imx_clk_mux("slow_clk_sel", CCM_CCSR, 4, 1, slow_sels, ARRAY_SIZE(slow_sels));

drivers/clk/imx/clk-vf610.c

213

clk[VF610_CLK_FASK_CLK_SEL] = imx_clk_mux("fast_clk_sel", CCM_CCSR, 5, 1, fast_sels, ARRAY_SIZE(fast_sels));

drivers/clk/imx/clk-vf610.c

215

clk[VF610_CLK_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", PLL1_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));

drivers/clk/imx/clk-vf610.c

216

clk[VF610_CLK_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", PLL2_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));

drivers/clk/imx/clk-vf610.c

217

clk[VF610_CLK_PLL3_BYPASS_SRC] = imx_clk_mux("pll3_bypass_src", PLL3_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));

drivers/clk/imx/clk-vf610.c

218

clk[VF610_CLK_PLL4_BYPASS_SRC] = imx_clk_mux("pll4_bypass_src", PLL4_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));

drivers/clk/imx/clk-vf610.c

219

clk[VF610_CLK_PLL5_BYPASS_SRC] = imx_clk_mux("pll5_bypass_src", PLL5_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));

drivers/clk/imx/clk-vf610.c

220

clk[VF610_CLK_PLL6_BYPASS_SRC] = imx_clk_mux("pll6_bypass_src", PLL6_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));

drivers/clk/imx/clk-vf610.c

221

clk[VF610_CLK_PLL7_BYPASS_SRC] = imx_clk_mux("pll7_bypass_src", PLL7_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));

drivers/clk/imx/clk-vf610.c

223

clk[VF610_CLK_PLL1] = imx_clk_pllv3(IMX_PLLV3_SYS_VF610, "pll1", "pll1_bypass_src", PLL1_CTRL, 0x1);

drivers/clk/imx/clk-vf610.c

224

clk[VF610_CLK_PLL2] = imx_clk_pllv3(IMX_PLLV3_SYS_VF610, "pll2", "pll2_bypass_src", PLL2_CTRL, 0x1);

drivers/clk/imx/clk-vf610.c

225

clk[VF610_CLK_PLL3] = imx_clk_pllv3(IMX_PLLV3_USB_VF610, "pll3", "pll3_bypass_src", PLL3_CTRL, 0x2);

drivers/clk/imx/clk-vf610.c

226

clk[VF610_CLK_PLL4] = imx_clk_pllv3(IMX_PLLV3_AV, "pll4", "pll4_bypass_src", PLL4_CTRL, 0x7f);

drivers/clk/imx/clk-vf610.c

227

clk[VF610_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll5", "pll5_bypass_src", PLL5_CTRL, 0x3);

drivers/clk/imx/clk-vf610.c

228

clk[VF610_CLK_PLL6] = imx_clk_pllv3(IMX_PLLV3_AV, "pll6", "pll6_bypass_src", PLL6_CTRL, 0x7f);

drivers/clk/imx/clk-vf610.c

229

clk[VF610_CLK_PLL7] = imx_clk_pllv3(IMX_PLLV3_USB_VF610, "pll7", "pll7_bypass_src", PLL7_CTRL, 0x2);

drivers/clk/imx/clk-vf610.c

231

clk[VF610_PLL1_BYPASS] = imx_clk_mux_flags("pll1_bypass", PLL1_CTRL, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);

drivers/clk/imx/clk-vf610.c

232

clk[VF610_PLL2_BYPASS] = imx_clk_mux_flags("pll2_bypass", PLL2_CTRL, 16, 1, pll2_bypass_sels, ARRAY_SIZE(pll2_bypass_sels), CLK_SET_RATE_PARENT);

drivers/clk/imx/clk-vf610.c

233

clk[VF610_PLL3_BYPASS] = imx_clk_mux_flags("pll3_bypass", PLL3_CTRL, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);

drivers/clk/imx/clk-vf610.c

234

clk[VF610_PLL4_BYPASS] = imx_clk_mux_flags("pll4_bypass", PLL4_CTRL, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT);

drivers/clk/imx/clk-vf610.c

235

clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);

drivers/clk/imx/clk-vf610.c

236

clk[VF610_PLL6_BYPASS] = imx_clk_mux_flags("pll6_bypass", PLL6_CTRL, 16, 1, pll6_bypass_sels, ARRAY_SIZE(pll6_bypass_sels), CLK_SET_RATE_PARENT);

drivers/clk/imx/clk-vf610.c

237

clk[VF610_PLL7_BYPASS] = imx_clk_mux_flags("pll7_bypass", PLL7_CTRL, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels), CLK_SET_RATE_PARENT);

drivers/clk/imx/clk-vf610.c

240

clk_set_parent(clk[VF610_PLL1_BYPASS], clk[VF610_CLK_PLL1]);

drivers/clk/imx/clk-vf610.c

241

clk_set_parent(clk[VF610_PLL2_BYPASS], clk[VF610_CLK_PLL2]);

drivers/clk/imx/clk-vf610.c

242

clk_set_parent(clk[VF610_PLL3_BYPASS], clk[VF610_CLK_PLL3]);

drivers/clk/imx/clk-vf610.c

243

clk_set_parent(clk[VF610_PLL4_BYPASS], clk[VF610_CLK_PLL4]);

drivers/clk/imx/clk-vf610.c

244

clk_set_parent(clk[VF610_PLL5_BYPASS], clk[VF610_CLK_PLL5]);

drivers/clk/imx/clk-vf610.c

245

clk_set_parent(clk[VF610_PLL6_BYPASS], clk[VF610_CLK_PLL6]);

drivers/clk/imx/clk-vf610.c

246

clk_set_parent(clk[VF610_PLL7_BYPASS], clk[VF610_CLK_PLL7]);

drivers/clk/imx/clk-vf610.c

248

clk[VF610_CLK_PLL1_SYS] = imx_clk_gate("pll1_sys", "pll1_bypass", PLL1_CTRL, 13);

drivers/clk/imx/clk-vf610.c

249

clk[VF610_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", PLL2_CTRL, 13);

drivers/clk/imx/clk-vf610.c

250

clk[VF610_CLK_PLL3_USB_OTG] = imx_clk_gate("pll3_usb_otg", "pll3_bypass", PLL3_CTRL, 13);

drivers/clk/imx/clk-vf610.c

251

clk[VF610_CLK_PLL4_AUDIO] = imx_clk_gate("pll4_audio", "pll4_bypass", PLL4_CTRL, 13);

drivers/clk/imx/clk-vf610.c

252

clk[VF610_CLK_PLL5_ENET] = imx_clk_gate("pll5_enet", "pll5_bypass", PLL5_CTRL, 13);

drivers/clk/imx/clk-vf610.c

253

clk[VF610_CLK_PLL6_VIDEO] = imx_clk_gate("pll6_video", "pll6_bypass", PLL6_CTRL, 13);

drivers/clk/imx/clk-vf610.c

254

clk[VF610_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", PLL7_CTRL, 13);

drivers/clk/imx/clk-vf610.c

256

clk[VF610_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", ANA_MISC1, 12, BIT(10));

drivers/clk/imx/clk-vf610.c

258

clk[VF610_CLK_PLL1_PFD1] = imx_clk_pfd("pll1_pfd1", "pll1_sys", PFD_PLL1_BASE, 0);

drivers/clk/imx/clk-vf610.c

259

clk[VF610_CLK_PLL1_PFD2] = imx_clk_pfd("pll1_pfd2", "pll1_sys", PFD_PLL1_BASE, 1);

drivers/clk/imx/clk-vf610.c

260

clk[VF610_CLK_PLL1_PFD3] = imx_clk_pfd("pll1_pfd3", "pll1_sys", PFD_PLL1_BASE, 2);

drivers/clk/imx/clk-vf610.c

261

clk[VF610_CLK_PLL1_PFD4] = imx_clk_pfd("pll1_pfd4", "pll1_sys", PFD_PLL1_BASE, 3);

drivers/clk/imx/clk-vf610.c

263

clk[VF610_CLK_PLL2_PFD1] = imx_clk_pfd("pll2_pfd1", "pll2_bus", PFD_PLL2_BASE, 0);

drivers/clk/imx/clk-vf610.c

264

clk[VF610_CLK_PLL2_PFD2] = imx_clk_pfd("pll2_pfd2", "pll2_bus", PFD_PLL2_BASE, 1);

drivers/clk/imx/clk-vf610.c

265

clk[VF610_CLK_PLL2_PFD3] = imx_clk_pfd("pll2_pfd3", "pll2_bus", PFD_PLL2_BASE, 2);

drivers/clk/imx/clk-vf610.c

266

clk[VF610_CLK_PLL2_PFD4] = imx_clk_pfd("pll2_pfd4", "pll2_bus", PFD_PLL2_BASE, 3);

drivers/clk/imx/clk-vf610.c

268

clk[VF610_CLK_PLL3_PFD1] = imx_clk_pfd("pll3_pfd1", "pll3_usb_otg", PFD_PLL3_BASE, 0);

drivers/clk/imx/clk-vf610.c

269

clk[VF610_CLK_PLL3_PFD2] = imx_clk_pfd("pll3_pfd2", "pll3_usb_otg", PFD_PLL3_BASE, 1);

drivers/clk/imx/clk-vf610.c

270

clk[VF610_CLK_PLL3_PFD3] = imx_clk_pfd("pll3_pfd3", "pll3_usb_otg", PFD_PLL3_BASE, 2);

drivers/clk/imx/clk-vf610.c

271

clk[VF610_CLK_PLL3_PFD4] = imx_clk_pfd("pll3_pfd4", "pll3_usb_otg", PFD_PLL3_BASE, 3);

drivers/clk/imx/clk-vf610.c

273

clk[VF610_CLK_PLL1_PFD_SEL] = imx_clk_mux("pll1_pfd_sel", CCM_CCSR, 16, 3, pll1_sels, 5);

drivers/clk/imx/clk-vf610.c

274

clk[VF610_CLK_PLL2_PFD_SEL] = imx_clk_mux("pll2_pfd_sel", CCM_CCSR, 19, 3, pll2_sels, 5);

drivers/clk/imx/clk-vf610.c

275

clk[VF610_CLK_SYS_SEL] = imx_clk_mux("sys_sel", CCM_CCSR, 0, 3, sys_sels, ARRAY_SIZE(sys_sels));

drivers/clk/imx/clk-vf610.c

276

clk[VF610_CLK_DDR_SEL] = imx_clk_mux("ddr_sel", CCM_CCSR, 6, 1, ddr_sels, ARRAY_SIZE(ddr_sels));

drivers/clk/imx/clk-vf610.c

277

clk[VF610_CLK_SYS_BUS] = imx_clk_divider("sys_bus", "sys_sel", CCM_CACRR, 0, 3);

drivers/clk/imx/clk-vf610.c

278

clk[VF610_CLK_PLATFORM_BUS] = imx_clk_divider("platform_bus", "sys_bus", CCM_CACRR, 3, 3);

drivers/clk/imx/clk-vf610.c

279

clk[VF610_CLK_IPG_BUS] = imx_clk_divider("ipg_bus", "platform_bus", CCM_CACRR, 11, 2);

drivers/clk/imx/clk-vf610.c

281

clk[VF610_CLK_PLL3_MAIN_DIV] = imx_clk_divider("pll3_usb_otg_div", "pll3_usb_otg", CCM_CACRR, 20, 1);

drivers/clk/imx/clk-vf610.c

282

clk[VF610_CLK_PLL4_MAIN_DIV] = clk_register_divider_table(NULL, "pll4_audio_div", "pll4_audio", 0, CCM_CACRR, 6, 3, 0, pll4_audio_div_table, &imx_ccm_lock);

drivers/clk/imx/clk-vf610.c

283

clk[VF610_CLK_PLL6_MAIN_DIV] = imx_clk_divider("pll6_video_div", "pll6_video", CCM_CACRR, 21, 1);

drivers/clk/imx/clk-vf610.c

285

clk[VF610_CLK_DDRMC] = imx_clk_gate2_cgr("ddrmc", "ddr_sel", CCM_CCGR6, CCM_CCGRx_CGn(14), 0x2);

drivers/clk/imx/clk-vf610.c

286

clk[VF610_CLK_WKPU] = imx_clk_gate2_cgr("wkpu", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(10), 0x2);

drivers/clk/imx/clk-vf610.c

288

clk[VF610_CLK_USBPHY0] = imx_clk_gate("usbphy0", "pll3_usb_otg", PLL3_CTRL, 6);

drivers/clk/imx/clk-vf610.c

289

clk[VF610_CLK_USBPHY1] = imx_clk_gate("usbphy1", "pll7_usb_host", PLL7_CTRL, 6);

drivers/clk/imx/clk-vf610.c

291

clk[VF610_CLK_USBC0] = imx_clk_gate2("usbc0", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(4));

drivers/clk/imx/clk-vf610.c

292

clk[VF610_CLK_USBC1] = imx_clk_gate2("usbc1", "ipg_bus", CCM_CCGR7, CCM_CCGRx_CGn(4));

drivers/clk/imx/clk-vf610.c

294

clk[VF610_CLK_QSPI0_SEL] = imx_clk_mux("qspi0_sel", CCM_CSCMR1, 22, 2, qspi_sels, 4);

drivers/clk/imx/clk-vf610.c

295

clk[VF610_CLK_QSPI0_EN] = imx_clk_gate("qspi0_en", "qspi0_sel", CCM_CSCDR3, 4);

drivers/clk/imx/clk-vf610.c

296

clk[VF610_CLK_QSPI0_X4_DIV] = imx_clk_divider("qspi0_x4", "qspi0_en", CCM_CSCDR3, 0, 2);

drivers/clk/imx/clk-vf610.c

297

clk[VF610_CLK_QSPI0_X2_DIV] = imx_clk_divider("qspi0_x2", "qspi0_x4", CCM_CSCDR3, 2, 1);

drivers/clk/imx/clk-vf610.c

298

clk[VF610_CLK_QSPI0_X1_DIV] = imx_clk_divider("qspi0_x1", "qspi0_x2", CCM_CSCDR3, 3, 1);

drivers/clk/imx/clk-vf610.c

299

clk[VF610_CLK_QSPI0] = imx_clk_gate2("qspi0", "qspi0_x1", CCM_CCGR2, CCM_CCGRx_CGn(4));

drivers/clk/imx/clk-vf610.c

301

clk[VF610_CLK_QSPI1_SEL] = imx_clk_mux("qspi1_sel", CCM_CSCMR1, 24, 2, qspi_sels, 4);

drivers/clk/imx/clk-vf610.c

302

clk[VF610_CLK_QSPI1_EN] = imx_clk_gate("qspi1_en", "qspi1_sel", CCM_CSCDR3, 12);

drivers/clk/imx/clk-vf610.c

303

clk[VF610_CLK_QSPI1_X4_DIV] = imx_clk_divider("qspi1_x4", "qspi1_en", CCM_CSCDR3, 8, 2);

drivers/clk/imx/clk-vf610.c

304

clk[VF610_CLK_QSPI1_X2_DIV] = imx_clk_divider("qspi1_x2", "qspi1_x4", CCM_CSCDR3, 10, 1);

drivers/clk/imx/clk-vf610.c

305

clk[VF610_CLK_QSPI1_X1_DIV] = imx_clk_divider("qspi1_x1", "qspi1_x2", CCM_CSCDR3, 11, 1);

drivers/clk/imx/clk-vf610.c

306

clk[VF610_CLK_QSPI1] = imx_clk_gate2("qspi1", "qspi1_x1", CCM_CCGR8, CCM_CCGRx_CGn(4));

drivers/clk/imx/clk-vf610.c

308

clk[VF610_CLK_ENET_50M] = imx_clk_fixed_factor("enet_50m", "pll5_enet", 1, 10);

drivers/clk/imx/clk-vf610.c

309

clk[VF610_CLK_ENET_25M] = imx_clk_fixed_factor("enet_25m", "pll5_enet", 1, 20);

drivers/clk/imx/clk-vf610.c

310

clk[VF610_CLK_ENET_SEL] = imx_clk_mux("enet_sel", CCM_CSCMR2, 4, 2, rmii_sels, 4);

drivers/clk/imx/clk-vf610.c

311

clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);

drivers/clk/imx/clk-vf610.c

312

clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);

drivers/clk/imx/clk-vf610.c

313

clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23);

drivers/clk/imx/clk-vf610.c

314

clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(0));

drivers/clk/imx/clk-vf610.c

315

clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(1));

drivers/clk/imx/clk-vf610.c

317

clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7));

drivers/clk/imx/clk-vf610.c

319

clk[VF610_CLK_UART0] = imx_clk_gate2_cgr("uart0", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(7), 0x2);

drivers/clk/imx/clk-vf610.c

320

clk[VF610_CLK_UART1] = imx_clk_gate2_cgr("uart1", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(8), 0x2);

drivers/clk/imx/clk-vf610.c

321

clk[VF610_CLK_UART2] = imx_clk_gate2_cgr("uart2", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(9), 0x2);

drivers/clk/imx/clk-vf610.c

322

clk[VF610_CLK_UART3] = imx_clk_gate2_cgr("uart3", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(10), 0x2);

drivers/clk/imx/clk-vf610.c

323

clk[VF610_CLK_UART4] = imx_clk_gate2_cgr("uart4", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(9), 0x2);

drivers/clk/imx/clk-vf610.c

324

clk[VF610_CLK_UART5] = imx_clk_gate2_cgr("uart5", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(10), 0x2);

drivers/clk/imx/clk-vf610.c

326

clk[VF610_CLK_I2C0] = imx_clk_gate2("i2c0", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(6));

drivers/clk/imx/clk-vf610.c

327

clk[VF610_CLK_I2C1] = imx_clk_gate2("i2c1", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(7));

drivers/clk/imx/clk-vf610.c

328

clk[VF610_CLK_I2C2] = imx_clk_gate2("i2c2", "ipg_bus", CCM_CCGR10, CCM_CCGRx_CGn(6));

drivers/clk/imx/clk-vf610.c

329

clk[VF610_CLK_I2C3] = imx_clk_gate2("i2c3", "ipg_bus", CCM_CCGR10, CCM_CCGRx_CGn(7));

drivers/clk/imx/clk-vf610.c

331

clk[VF610_CLK_DSPI0] = imx_clk_gate2("dspi0", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(12));

drivers/clk/imx/clk-vf610.c

332

clk[VF610_CLK_DSPI1] = imx_clk_gate2("dspi1", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(13));

drivers/clk/imx/clk-vf610.c

333

clk[VF610_CLK_DSPI2] = imx_clk_gate2("dspi2", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(12));

drivers/clk/imx/clk-vf610.c

334

clk[VF610_CLK_DSPI3] = imx_clk_gate2("dspi3", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(13));

drivers/clk/imx/clk-vf610.c

336

clk[VF610_CLK_CRC] = imx_clk_gate2("crc", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(3));

drivers/clk/imx/clk-vf610.c

337

clk[VF610_CLK_WDT] = imx_clk_gate2("wdt", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(14));

drivers/clk/imx/clk-vf610.c

339

clk[VF610_CLK_ESDHC0_SEL] = imx_clk_mux("esdhc0_sel", CCM_CSCMR1, 16, 2, esdhc_sels, 4);

drivers/clk/imx/clk-vf610.c

340

clk[VF610_CLK_ESDHC0_EN] = imx_clk_gate("esdhc0_en", "esdhc0_sel", CCM_CSCDR2, 28);

drivers/clk/imx/clk-vf610.c

341

clk[VF610_CLK_ESDHC0_DIV] = imx_clk_divider("esdhc0_div", "esdhc0_en", CCM_CSCDR2, 16, 4);

drivers/clk/imx/clk-vf610.c

342

clk[VF610_CLK_ESDHC0] = imx_clk_gate2("eshc0", "esdhc0_div", CCM_CCGR7, CCM_CCGRx_CGn(1));

drivers/clk/imx/clk-vf610.c

344

clk[VF610_CLK_ESDHC1_SEL] = imx_clk_mux("esdhc1_sel", CCM_CSCMR1, 18, 2, esdhc_sels, 4);

drivers/clk/imx/clk-vf610.c

345

clk[VF610_CLK_ESDHC1_EN] = imx_clk_gate("esdhc1_en", "esdhc1_sel", CCM_CSCDR2, 29);

drivers/clk/imx/clk-vf610.c

346

clk[VF610_CLK_ESDHC1_DIV] = imx_clk_divider("esdhc1_div", "esdhc1_en", CCM_CSCDR2, 20, 4);

drivers/clk/imx/clk-vf610.c

347

clk[VF610_CLK_ESDHC1] = imx_clk_gate2("eshc1", "esdhc1_div", CCM_CCGR7, CCM_CCGRx_CGn(2));

drivers/clk/imx/clk-vf610.c

355

clk[VF610_CLK_FTM0_EXT_SEL] = imx_clk_mux("ftm0_ext_sel", CCM_CSCMR2, 6, 2, ftm_ext_sels, 4);

drivers/clk/imx/clk-vf610.c

356

clk[VF610_CLK_FTM0_FIX_SEL] = imx_clk_mux("ftm0_fix_sel", CCM_CSCMR2, 14, 1, ftm_fix_sels, 2);

drivers/clk/imx/clk-vf610.c

357

clk[VF610_CLK_FTM0_EXT_FIX_EN] = imx_clk_gate("ftm0_ext_fix_en", "dummy", CCM_CSCDR1, 25);

drivers/clk/imx/clk-vf610.c

358

clk[VF610_CLK_FTM1_EXT_SEL] = imx_clk_mux("ftm1_ext_sel", CCM_CSCMR2, 8, 2, ftm_ext_sels, 4);

drivers/clk/imx/clk-vf610.c

359

clk[VF610_CLK_FTM1_FIX_SEL] = imx_clk_mux("ftm1_fix_sel", CCM_CSCMR2, 15, 1, ftm_fix_sels, 2);

drivers/clk/imx/clk-vf610.c

360

clk[VF610_CLK_FTM1_EXT_FIX_EN] = imx_clk_gate("ftm1_ext_fix_en", "dummy", CCM_CSCDR1, 26);

drivers/clk/imx/clk-vf610.c

361

clk[VF610_CLK_FTM2_EXT_SEL] = imx_clk_mux("ftm2_ext_sel", CCM_CSCMR2, 10, 2, ftm_ext_sels, 4);

drivers/clk/imx/clk-vf610.c

362

clk[VF610_CLK_FTM2_FIX_SEL] = imx_clk_mux("ftm2_fix_sel", CCM_CSCMR2, 16, 1, ftm_fix_sels, 2);

drivers/clk/imx/clk-vf610.c

363

clk[VF610_CLK_FTM2_EXT_FIX_EN] = imx_clk_gate("ftm2_ext_fix_en", "dummy", CCM_CSCDR1, 27);

drivers/clk/imx/clk-vf610.c

364

clk[VF610_CLK_FTM3_EXT_SEL] = imx_clk_mux("ftm3_ext_sel", CCM_CSCMR2, 12, 2, ftm_ext_sels, 4);

drivers/clk/imx/clk-vf610.c

365

clk[VF610_CLK_FTM3_FIX_SEL] = imx_clk_mux("ftm3_fix_sel", CCM_CSCMR2, 17, 1, ftm_fix_sels, 2);

drivers/clk/imx/clk-vf610.c

366

clk[VF610_CLK_FTM3_EXT_FIX_EN] = imx_clk_gate("ftm3_ext_fix_en", "dummy", CCM_CSCDR1, 28);

drivers/clk/imx/clk-vf610.c

369

clk[VF610_CLK_FTM0] = imx_clk_gate2("ftm0", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(8));

drivers/clk/imx/clk-vf610.c

370

clk[VF610_CLK_FTM1] = imx_clk_gate2("ftm1", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(9));

drivers/clk/imx/clk-vf610.c

371

clk[VF610_CLK_FTM2] = imx_clk_gate2("ftm2", "ipg_bus", CCM_CCGR7, CCM_CCGRx_CGn(8));

drivers/clk/imx/clk-vf610.c

372

clk[VF610_CLK_FTM3] = imx_clk_gate2("ftm3", "ipg_bus", CCM_CCGR7, CCM_CCGRx_CGn(9));

drivers/clk/imx/clk-vf610.c

374

clk[VF610_CLK_DCU0_SEL] = imx_clk_mux("dcu0_sel", CCM_CSCMR1, 28, 1, dcu_sels, 2);

drivers/clk/imx/clk-vf610.c

375

clk[VF610_CLK_DCU0_EN] = imx_clk_gate("dcu0_en", "dcu0_sel", CCM_CSCDR3, 19);

drivers/clk/imx/clk-vf610.c

376

clk[VF610_CLK_DCU0_DIV] = imx_clk_divider("dcu0_div", "dcu0_en", CCM_CSCDR3, 16, 3);

drivers/clk/imx/clk-vf610.c

377

clk[VF610_CLK_DCU0] = imx_clk_gate2("dcu0", "ipg_bus", CCM_CCGR3, CCM_CCGRx_CGn(8));

drivers/clk/imx/clk-vf610.c

378

clk[VF610_CLK_DCU1_SEL] = imx_clk_mux("dcu1_sel", CCM_CSCMR1, 29, 1, dcu_sels, 2);

drivers/clk/imx/clk-vf610.c

379

clk[VF610_CLK_DCU1_EN] = imx_clk_gate("dcu1_en", "dcu1_sel", CCM_CSCDR3, 23);

drivers/clk/imx/clk-vf610.c

380

clk[VF610_CLK_DCU1_DIV] = imx_clk_divider("dcu1_div", "dcu1_en", CCM_CSCDR3, 20, 3);

drivers/clk/imx/clk-vf610.c

381

clk[VF610_CLK_DCU1] = imx_clk_gate2("dcu1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(8));

drivers/clk/imx/clk-vf610.c

383

clk[VF610_CLK_TCON0] = imx_clk_gate2("tcon0", "platform_bus", CCM_CCGR1, CCM_CCGRx_CGn(13));

drivers/clk/imx/clk-vf610.c

384

clk[VF610_CLK_TCON1] = imx_clk_gate2("tcon1", "platform_bus", CCM_CCGR7, CCM_CCGRx_CGn(13));

drivers/clk/imx/clk-vf610.c

386

clk[VF610_CLK_ESAI_SEL] = imx_clk_mux("esai_sel", CCM_CSCMR1, 20, 2, esai_sels, 4);

drivers/clk/imx/clk-vf610.c

387

clk[VF610_CLK_ESAI_EN] = imx_clk_gate("esai_en", "esai_sel", CCM_CSCDR2, 30);

drivers/clk/imx/clk-vf610.c

388

clk[VF610_CLK_ESAI_DIV] = imx_clk_divider("esai_div", "esai_en", CCM_CSCDR2, 24, 4);

drivers/clk/imx/clk-vf610.c

389

clk[VF610_CLK_ESAI] = imx_clk_gate2("esai", "esai_div", CCM_CCGR4, CCM_CCGRx_CGn(2));

drivers/clk/imx/clk-vf610.c

391

clk[VF610_CLK_SAI0_SEL] = imx_clk_mux("sai0_sel", CCM_CSCMR1, 0, 2, sai_sels, 4);

drivers/clk/imx/clk-vf610.c

392

clk[VF610_CLK_SAI0_EN] = imx_clk_gate("sai0_en", "sai0_sel", CCM_CSCDR1, 16);

drivers/clk/imx/clk-vf610.c

393

clk[VF610_CLK_SAI0_DIV] = imx_clk_divider("sai0_div", "sai0_en", CCM_CSCDR1, 0, 4);

drivers/clk/imx/clk-vf610.c

394

clk[VF610_CLK_SAI0] = imx_clk_gate2("sai0", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(15));

drivers/clk/imx/clk-vf610.c

396

clk[VF610_CLK_SAI1_SEL] = imx_clk_mux("sai1_sel", CCM_CSCMR1, 2, 2, sai_sels, 4);

drivers/clk/imx/clk-vf610.c

397

clk[VF610_CLK_SAI1_EN] = imx_clk_gate("sai1_en", "sai1_sel", CCM_CSCDR1, 17);

drivers/clk/imx/clk-vf610.c

398

clk[VF610_CLK_SAI1_DIV] = imx_clk_divider("sai1_div", "sai1_en", CCM_CSCDR1, 4, 4);

drivers/clk/imx/clk-vf610.c

399

clk[VF610_CLK_SAI1] = imx_clk_gate2("sai1", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(0));

drivers/clk/imx/clk-vf610.c

401

clk[VF610_CLK_SAI2_SEL] = imx_clk_mux("sai2_sel", CCM_CSCMR1, 4, 2, sai_sels, 4);

drivers/clk/imx/clk-vf610.c

402

clk[VF610_CLK_SAI2_EN] = imx_clk_gate("sai2_en", "sai2_sel", CCM_CSCDR1, 18);

drivers/clk/imx/clk-vf610.c

403

clk[VF610_CLK_SAI2_DIV] = imx_clk_divider("sai2_div", "sai2_en", CCM_CSCDR1, 8, 4);

drivers/clk/imx/clk-vf610.c

404

clk[VF610_CLK_SAI2] = imx_clk_gate2("sai2", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(1));

drivers/clk/imx/clk-vf610.c

406

clk[VF610_CLK_SAI3_SEL] = imx_clk_mux("sai3_sel", CCM_CSCMR1, 6, 2, sai_sels, 4);

drivers/clk/imx/clk-vf610.c

407

clk[VF610_CLK_SAI3_EN] = imx_clk_gate("sai3_en", "sai3_sel", CCM_CSCDR1, 19);

drivers/clk/imx/clk-vf610.c

408

clk[VF610_CLK_SAI3_DIV] = imx_clk_divider("sai3_div", "sai3_en", CCM_CSCDR1, 12, 4);

drivers/clk/imx/clk-vf610.c

409

clk[VF610_CLK_SAI3] = imx_clk_gate2("sai3", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(2));

drivers/clk/imx/clk-vf610.c

411

clk[VF610_CLK_NFC_SEL] = imx_clk_mux("nfc_sel", CCM_CSCMR1, 12, 2, nfc_sels, 4);

drivers/clk/imx/clk-vf610.c

412

clk[VF610_CLK_NFC_EN] = imx_clk_gate("nfc_en", "nfc_sel", CCM_CSCDR2, 9);

drivers/clk/imx/clk-vf610.c

413

clk[VF610_CLK_NFC_PRE_DIV] = imx_clk_divider("nfc_pre_div", "nfc_en", CCM_CSCDR3, 13, 3);

drivers/clk/imx/clk-vf610.c

414

clk[VF610_CLK_NFC_FRAC_DIV] = imx_clk_divider("nfc_frac_div", "nfc_pre_div", CCM_CSCDR2, 4, 4);

drivers/clk/imx/clk-vf610.c

415

clk[VF610_CLK_NFC] = imx_clk_gate2("nfc", "nfc_frac_div", CCM_CCGR10, CCM_CCGRx_CGn(0));

drivers/clk/imx/clk-vf610.c

417

clk[VF610_CLK_GPU_SEL] = imx_clk_mux("gpu_sel", CCM_CSCMR1, 14, 1, gpu_sels, 2);

drivers/clk/imx/clk-vf610.c

418

clk[VF610_CLK_GPU_EN] = imx_clk_gate("gpu_en", "gpu_sel", CCM_CSCDR2, 10);

drivers/clk/imx/clk-vf610.c

419

clk[VF610_CLK_GPU2D] = imx_clk_gate2("gpu", "gpu_en", CCM_CCGR8, CCM_CCGRx_CGn(15));

drivers/clk/imx/clk-vf610.c

421

clk[VF610_CLK_VADC_SEL] = imx_clk_mux("vadc_sel", CCM_CSCMR1, 8, 2, vadc_sels, 3);

drivers/clk/imx/clk-vf610.c

422

clk[VF610_CLK_VADC_EN] = imx_clk_gate("vadc_en", "vadc_sel", CCM_CSCDR1, 22);

drivers/clk/imx/clk-vf610.c

423

clk[VF610_CLK_VADC_DIV] = imx_clk_divider("vadc_div", "vadc_en", CCM_CSCDR1, 20, 2);

drivers/clk/imx/clk-vf610.c

424

clk[VF610_CLK_VADC_DIV_HALF] = imx_clk_fixed_factor("vadc_div_half", "vadc_div", 1, 2);

drivers/clk/imx/clk-vf610.c

425

clk[VF610_CLK_VADC] = imx_clk_gate2("vadc", "vadc_div", CCM_CCGR8, CCM_CCGRx_CGn(7));

drivers/clk/imx/clk-vf610.c

427

clk[VF610_CLK_ADC0] = imx_clk_gate2("adc0", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(11));

drivers/clk/imx/clk-vf610.c

428

clk[VF610_CLK_ADC1] = imx_clk_gate2("adc1", "ipg_bus", CCM_CCGR7, CCM_CCGRx_CGn(11));

drivers/clk/imx/clk-vf610.c

429

clk[VF610_CLK_DAC0] = imx_clk_gate2("dac0", "ipg_bus", CCM_CCGR8, CCM_CCGRx_CGn(12));

drivers/clk/imx/clk-vf610.c

430

clk[VF610_CLK_DAC1] = imx_clk_gate2("dac1", "ipg_bus", CCM_CCGR8, CCM_CCGRx_CGn(13));

drivers/clk/imx/clk-vf610.c

432

clk[VF610_CLK_ASRC] = imx_clk_gate2("asrc", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(1));

drivers/clk/imx/clk-vf610.c

434

clk[VF610_CLK_FLEXCAN0_EN] = imx_clk_gate("flexcan0_en", "ipg_bus", CCM_CSCDR2, 11);

drivers/clk/imx/clk-vf610.c

435

clk[VF610_CLK_FLEXCAN0] = imx_clk_gate2("flexcan0", "flexcan0_en", CCM_CCGR0, CCM_CCGRx_CGn(0));

drivers/clk/imx/clk-vf610.c

436

clk[VF610_CLK_FLEXCAN1_EN] = imx_clk_gate("flexcan1_en", "ipg_bus", CCM_CSCDR2, 12);

drivers/clk/imx/clk-vf610.c

437

clk[VF610_CLK_FLEXCAN1] = imx_clk_gate2("flexcan1", "flexcan1_en", CCM_CCGR9, CCM_CCGRx_CGn(4));

drivers/clk/imx/clk-vf610.c

439

clk[VF610_CLK_DMAMUX0] = imx_clk_gate2("dmamux0", "platform_bus", CCM_CCGR0, CCM_CCGRx_CGn(4));

drivers/clk/imx/clk-vf610.c

440

clk[VF610_CLK_DMAMUX1] = imx_clk_gate2("dmamux1", "platform_bus", CCM_CCGR0, CCM_CCGRx_CGn(5));

drivers/clk/imx/clk-vf610.c

441

clk[VF610_CLK_DMAMUX2] = imx_clk_gate2("dmamux2", "platform_bus", CCM_CCGR6, CCM_CCGRx_CGn(1));

drivers/clk/imx/clk-vf610.c

442

clk[VF610_CLK_DMAMUX3] = imx_clk_gate2("dmamux3", "platform_bus", CCM_CCGR6, CCM_CCGRx_CGn(2));

drivers/clk/imx/clk-vf610.c

444

clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(7));

drivers/clk/imx/clk-vf610.c

445

clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus", CCM_CCSR, 24);

drivers/clk/imx/clk-vf610.c

446

clk[VF610_CLK_OCOTP] = imx_clk_gate("ocotp", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(5));

drivers/clk/imx/clk-vf610.c

447

clk[VF610_CLK_CAAM] = imx_clk_gate2("caam", "ipg_bus", CCM_CCGR11, CCM_CCGRx_CGn(0));

drivers/clk/imx/clk-vf610.c

449

imx_check_clocks(clk, ARRAY_SIZE(clk));

drivers/clk/imx/clk-vf610.c

451

clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]);

drivers/clk/imx/clk-vf610.c

452

clk_set_rate(clk[VF610_CLK_QSPI0_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2);

drivers/clk/imx/clk-vf610.c

453

clk_set_rate(clk[VF610_CLK_QSPI0_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2);

drivers/clk/imx/clk-vf610.c

454

clk_set_rate(clk[VF610_CLK_QSPI0_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2);

drivers/clk/imx/clk-vf610.c

456

clk_set_parent(clk[VF610_CLK_QSPI1_SEL], clk[VF610_CLK_PLL1_PFD4]);

drivers/clk/imx/clk-vf610.c

457

clk_set_rate(clk[VF610_CLK_QSPI1_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2);

drivers/clk/imx/clk-vf610.c

458

clk_set_rate(clk[VF610_CLK_QSPI1_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);

drivers/clk/imx/clk-vf610.c

459

clk_set_rate(clk[VF610_CLK_QSPI1_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);

drivers/clk/imx/clk-vf610.c

461

clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]);

drivers/clk/imx/clk-vf610.c

462

clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]);

drivers/clk/imx/clk-vf610.c

463

clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]);

drivers/clk/imx/clk-vf610.c

464

clk_set_parent(clk[VF610_CLK_SAI3_SEL], clk[VF610_CLK_AUDIO_EXT]);

drivers/clk/imx/clk-vf610.c

467

clk_prepare_enable(clk[clks_init_on[i]]);

drivers/clk/imx/clk-vf610.c

472

clk_data.clks = clk;

drivers/clk/imx/clk-vf610.c

473

clk_data.clk_num = ARRAY_SIZE(clk);

drivers/clk/imx/clk.c

100

if (IS_ERR(clk))

drivers/clk/imx/clk.c

101

clk = imx_clk_fixed(name, rate);

drivers/clk/imx/clk.c

102

return __clk_get_hw(clk);

drivers/clk/imx/clk.c

108

struct clk *clk = of_clk_get_by_name(np, name);

drivers/clk/imx/clk.c

111

if (IS_ERR(clk))

drivers/clk/imx/clk.c

114

hw = __clk_get_hw(clk);

drivers/clk/imx/clk.c

121

struct clk *clk;

drivers/clk/imx/clk.c

123

clk = of_clk_get_by_name(np, name);

drivers/clk/imx/clk.c

124

if (IS_ERR(clk))

drivers/clk/imx/clk.c

127

return __clk_get_hw(clk);

drivers/clk/imx/clk.c

161

static struct clk **imx_uart_clocks;

drivers/clk/imx/clk.c

192

imx_uart_clocks = kzalloc_objs(struct clk *, num);

drivers/clk/imx/clk.c

42

void imx_check_clocks(struct clk *clks[], unsigned int count)

drivers/clk/imx/clk.c

63

static struct clk *imx_obtain_fixed_clock_from_dt(const char *name)

drivers/clk/imx/clk.c

66

struct clk *clk = ERR_PTR(-ENODEV);

drivers/clk/imx/clk.c

77

clk = of_clk_get_from_provider(&phandle);

drivers/clk/imx/clk.c

80

return clk;

drivers/clk/imx/clk.c

83

struct clk *imx_obtain_fixed_clock(

drivers/clk/imx/clk.c

86

struct clk *clk;

drivers/clk/imx/clk.c

88

clk = imx_obtain_fixed_clock_from_dt(name);

drivers/clk/imx/clk.c

89

if (IS_ERR(clk))

drivers/clk/imx/clk.c

90

clk = imx_clk_fixed(name, rate);

drivers/clk/imx/clk.c

91

return clk;

drivers/clk/imx/clk.c

97

struct clk *clk;

drivers/clk/imx/clk.c

99

clk = imx_obtain_fixed_clock_from_dt(name);

drivers/clk/imx/clk.h

12

void imx_check_clocks(struct clk *clks[], unsigned int count);

drivers/clk/imx/clk.h

289

struct clk * imx_obtain_fixed_clock(

drivers/clk/imx/clk.h

337

static inline struct clk *to_clk(struct clk_hw *hw)

drivers/clk/imx/clk.h

341

return hw->clk;

drivers/clk/imx/clk.h

402

struct clk *div, struct clk *mux, struct clk *pll,

drivers/clk/imx/clk.h

403

struct clk *step);

drivers/clk/ingenic/cgu.c

28

to_clk_info(struct ingenic_clk *clk)

drivers/clk/ingenic/cgu.c

30

return &clk->cgu->clock_info[clk->idx];

drivers/clk/ingenic/cgu.c

649

struct clk *clk, *parent;

drivers/clk/ingenic/cgu.c

657

clk = of_clk_get_by_name(cgu->np, clk_info->name);

drivers/clk/ingenic/cgu.c

658

if (IS_ERR(clk)) {

drivers/clk/ingenic/cgu.c

664

err = clk_register_clkdev(clk, clk_info->name, NULL);

drivers/clk/ingenic/cgu.c

666

clk_put(clk);

drivers/clk/ingenic/cgu.c

669

cgu->clocks.clks[idx] = clk;

drivers/clk/ingenic/cgu.c

768

clk = clk_register(NULL, &ingenic_clk->hw);

drivers/clk/ingenic/cgu.c

769

if (IS_ERR(clk)) {

drivers/clk/ingenic/cgu.c

772

err = PTR_ERR(clk);

drivers/clk/ingenic/cgu.c

776

err = clk_register_clkdev(clk, clk_info->name, NULL);

drivers/clk/ingenic/cgu.c

780

cgu->clocks.clks[idx] = clk;

drivers/clk/ingenic/cgu.c

822

cgu->clocks.clks = kzalloc_objs(struct clk *, cgu->clocks.clk_num);

drivers/clk/ingenic/tcu.c

355

tcu->clk = of_clk_get_by_name(np, "tcu");

drivers/clk/ingenic/tcu.c

356

if (IS_ERR(tcu->clk)) {

drivers/clk/ingenic/tcu.c

357

ret = PTR_ERR(tcu->clk);

drivers/clk/ingenic/tcu.c

368

tcu->clk = NULL;

drivers/clk/ingenic/tcu.c

374

ret = clk_prepare_enable(tcu->clk);

drivers/clk/ingenic/tcu.c

447

if (tcu->clk)

drivers/clk/ingenic/tcu.c

448

clk_disable_unprepare(tcu->clk);

drivers/clk/ingenic/tcu.c

450

if (tcu->clk)

drivers/clk/ingenic/tcu.c

451

clk_put(tcu->clk);

drivers/clk/ingenic/tcu.c

461

if (tcu->clk)

drivers/clk/ingenic/tcu.c

462

clk_disable(tcu->clk);

drivers/clk/ingenic/tcu.c

471

if (tcu->clk)

drivers/clk/ingenic/tcu.c

472

clk_enable(tcu->clk);

drivers/clk/ingenic/tcu.c

53

struct clk *clk;

drivers/clk/keystone/gate.c

161

static struct clk *clk_register_psc(struct device *dev,

drivers/clk/keystone/gate.c

169

struct clk *clk;

drivers/clk/keystone/gate.c

185

clk = clk_register(NULL, &psc->hw);

drivers/clk/keystone/gate.c

186

if (IS_ERR(clk))

drivers/clk/keystone/gate.c

189

return clk;

drivers/clk/keystone/gate.c

202

struct clk *clk;

drivers/clk/keystone/gate.c

238

clk = clk_register_psc(NULL, clk_name, parent_name, data, lock);

drivers/clk/keystone/gate.c

239

if (!IS_ERR(clk)) {

drivers/clk/keystone/gate.c

240

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/keystone/pll.c

120

static struct clk *clk_register_pll(struct device *dev,

drivers/clk/keystone/pll.c

127

struct clk *clk;

drivers/clk/keystone/pll.c

142

clk = clk_register(NULL, &pll->hw);

drivers/clk/keystone/pll.c

143

if (IS_ERR(clk))

drivers/clk/keystone/pll.c

146

return clk;

drivers/clk/keystone/pll.c

162

struct clk *clk;

drivers/clk/keystone/pll.c

211

clk = clk_register_pll(NULL, node->name, parent_name, pll_data);

drivers/clk/keystone/pll.c

212

if (!IS_ERR_OR_NULL(clk)) {

drivers/clk/keystone/pll.c

213

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/keystone/pll.c

253

struct clk *clk;

drivers/clk/keystone/pll.c

282

clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift,

drivers/clk/keystone/pll.c

284

if (IS_ERR(clk)) {

drivers/clk/keystone/pll.c

290

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/keystone/pll.c

302

struct clk *clk;

drivers/clk/keystone/pll.c

329

clk = clk_register_mux(NULL, clk_name, (const char **)&parents,

drivers/clk/keystone/pll.c

332

if (IS_ERR(clk)) {

drivers/clk/keystone/pll.c

337

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/keystone/sci-clk.c

100

clk->dev_id, clk->clk_id, ret);

drivers/clk/keystone/sci-clk.c

112

struct sci_clk *clk = to_sci_clk(hw);

drivers/clk/keystone/sci-clk.c

116

ret = clk->provider->ops->is_on(clk->provider->sci, clk->dev_id,

drivers/clk/keystone/sci-clk.c

117

clk->clk_id, &req_state,

drivers/clk/keystone/sci-clk.c

120

dev_err(clk->provider->dev,

drivers/clk/keystone/sci-clk.c

122

clk->dev_id, clk->clk_id, ret);

drivers/clk/keystone/sci-clk.c

140

struct sci_clk *clk = to_sci_clk(hw);

drivers/clk/keystone/sci-clk.c

144

ret = clk->provider->ops->get_freq(clk->provider->sci, clk->dev_id,

drivers/clk/keystone/sci-clk.c

145

clk->clk_id, &freq);

drivers/clk/keystone/sci-clk.c

147

dev_err(clk->provider->dev,

drivers/clk/keystone/sci-clk.c

149

clk->dev_id, clk->clk_id, ret);

drivers/clk/keystone/sci-clk.c

169

struct sci_clk *clk = to_sci_clk(hw);

drivers/clk/keystone/sci-clk.c

173

if (clk->cached_req && clk->cached_req == req->rate) {

drivers/clk/keystone/sci-clk.c

174

req->rate = clk->cached_res;

drivers/clk/keystone/sci-clk.c

178

ret = clk->provider->ops->get_best_match_freq(clk->provider->sci,

drivers/clk/keystone/sci-clk.c

179

clk->dev_id,

drivers/clk/keystone/sci-clk.c

180

clk->clk_id,

drivers/clk/keystone/sci-clk.c

186

dev_err(clk->provider->dev,

drivers/clk/keystone/sci-clk.c

188

clk->dev_id, clk->clk_id, ret);

drivers/clk/keystone/sci-clk.c

192

clk->cached_req = req->rate;

drivers/clk/keystone/sci-clk.c

193

clk->cached_res = new_rate;

drivers/clk/keystone/sci-clk.c

212

struct sci_clk *clk = to_sci_clk(hw);

drivers/clk/keystone/sci-clk.c

214

return clk->provider->ops->set_freq(clk->provider->sci, clk->dev_id,

drivers/clk/keystone/sci-clk.c

215

clk->clk_id, rate / 10 * 9, rate,

drivers/clk/keystone/sci-clk.c

227

struct sci_clk *clk = to_sci_clk(hw);

drivers/clk/keystone/sci-clk.c

231

ret = clk->provider->ops->get_parent(clk->provider->sci, clk->dev_id,

drivers/clk/keystone/sci-clk.c

232

clk->clk_id, (void *)&parent_id);

drivers/clk/keystone/sci-clk.c

234

dev_err(clk->provider->dev,

drivers/clk/keystone/sci-clk.c

236

clk->dev_id, clk->clk_id, ret);

drivers/clk/keystone/sci-clk.c

240

parent_id = parent_id - clk->clk_id - 1;

drivers/clk/keystone/sci-clk.c

254

struct sci_clk *clk = to_sci_clk(hw);

drivers/clk/keystone/sci-clk.c

256

clk->cached_req = 0;

drivers/clk/keystone/sci-clk.c

258

return clk->provider->ops->set_parent(clk->provider->sci, clk->dev_id,

drivers/clk/keystone/sci-clk.c

259

clk->clk_id,

drivers/clk/keystone/sci-clk.c

260

index + 1 + clk->clk_id);

drivers/clk/keystone/sci-clk.c

381

struct sci_clk **clk;

drivers/clk/keystone/sci-clk.c

390

clk = bsearch(&key, provider->clocks, provider->num_clocks,

drivers/clk/keystone/sci-clk.c

391

sizeof(clk), _cmp_sci_clk);

drivers/clk/keystone/sci-clk.c

393

if (!clk)

drivers/clk/keystone/sci-clk.c

396

return &(*clk)->hw;

drivers/clk/keystone/sci-clk.c

73

struct sci_clk *clk = to_sci_clk(hw);

drivers/clk/keystone/sci-clk.c

74

bool enable_ssc = clk->flags & SCI_CLK_SSC_ENABLE;

drivers/clk/keystone/sci-clk.c

75

bool allow_freq_change = clk->flags & SCI_CLK_ALLOW_FREQ_CHANGE;

drivers/clk/keystone/sci-clk.c

76

bool input_termination = clk->flags & SCI_CLK_INPUT_TERMINATION;

drivers/clk/keystone/sci-clk.c

78

return clk->provider->ops->get_clock(clk->provider->sci, clk->dev_id,

drivers/clk/keystone/sci-clk.c

79

clk->clk_id, enable_ssc,

drivers/clk/keystone/sci-clk.c

92

struct sci_clk *clk = to_sci_clk(hw);

drivers/clk/keystone/sci-clk.c

95

ret = clk->provider->ops->put_clock(clk->provider->sci, clk->dev_id,

drivers/clk/keystone/sci-clk.c

96

clk->clk_id);

drivers/clk/keystone/sci-clk.c

98

dev_err(clk->provider->dev,

drivers/clk/mediatek/clk-gate.h

12

struct clk;

drivers/clk/mediatek/clk-mt7629.c

571

clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk);

drivers/clk/mediatek/clk-mt7629.c

572

clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk);

drivers/clk/mediatek/clk-mt7629.c

573

clk_prepare_enable(clk_data->hws[CLK_TOP_DDRPHYCFG_SEL]->clk);

drivers/clk/mediatek/clk-mt7629.c

623

clk_prepare_enable(clk_data->hws[CLK_PERI_UART0_PD]->clk);

drivers/clk/mediatek/clk-mt7629.c

643

clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk);

drivers/clk/mediatek/clk-mt7629.c

644

clk_prepare_enable(clk_data->hws[CLK_APMIXED_MAIN_CORE_EN]->clk);

drivers/clk/mediatek/clk-mt8183.c

837

static int clk_mt8183_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)

drivers/clk/mediatek/clk-mt8183.c

855

return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);

drivers/clk/mediatek/clk-mt8186-topckgen.c

685

static int clk_mt8186_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)

drivers/clk/mediatek/clk-mt8186-topckgen.c

703

return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);

drivers/clk/mediatek/clk-mt8188-topckgen.c

1242

static int clk_mt8188_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)

drivers/clk/mediatek/clk-mt8188-topckgen.c

1253

return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);

drivers/clk/mediatek/clk-mt8188-topckgen.c

1299

top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF]->clk);

drivers/clk/mediatek/clk-mt8192.c

967

static int clk_mt8192_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)

drivers/clk/mediatek/clk-mt8192.c

985

return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);

drivers/clk/mediatek/clk-mt8195-topckgen.c

1246

static int clk_mt8195_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)

drivers/clk/mediatek/clk-mt8195-topckgen.c

1257

return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);

drivers/clk/mediatek/clk-mt8195-topckgen.c

1303

top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF]->clk);

drivers/clk/mediatek/clk-mtk.c

572

struct clk *mfg_mux = clk_data->hws[mcd->mfg_clk_idx]->clk;

drivers/clk/mediatek/clk-mtk.h

259

int (*clk_notifier_func)(struct device *dev, struct clk *clk);

drivers/clk/mediatek/clk-mux.c

415

struct clk_hw *hw = __clk_get_hw(data->clk);

drivers/clk/mediatek/clk-mux.c

433

int devm_mtk_clk_mux_notifier_register(struct device *dev, struct clk *clk,

drivers/clk/mediatek/clk-mux.c

438

return devm_clk_notifier_register(dev, clk, &mux_nb->nb);

drivers/clk/mediatek/clk-mux.h

14

struct clk;

drivers/clk/mediatek/clk-mux.h

227

int devm_mtk_clk_mux_notifier_register(struct device *dev, struct clk *clk,

drivers/clk/meson/axg-audio.c

1334

struct clk *clk;

drivers/clk/meson/axg-audio.c

1353

clk = devm_clk_get_enabled(dev, "pclk");

drivers/clk/meson/axg-audio.c

1354

if (IS_ERR(clk))

drivers/clk/meson/axg-audio.c

1355

return PTR_ERR(clk);

drivers/clk/meson/clk-cpu-dyndiv.c

14

meson_clk_cpu_dyndiv_data(struct clk_regmap *clk)

drivers/clk/meson/clk-cpu-dyndiv.c

16

return (struct meson_clk_cpu_dyndiv_data *)clk->data;

drivers/clk/meson/clk-cpu-dyndiv.c

22

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-cpu-dyndiv.c

23

struct meson_clk_cpu_dyndiv_data *data = meson_clk_cpu_dyndiv_data(clk);

drivers/clk/meson/clk-cpu-dyndiv.c

26

meson_parm_read(clk->map, &data->div),

drivers/clk/meson/clk-cpu-dyndiv.c

33

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-cpu-dyndiv.c

34

struct meson_clk_cpu_dyndiv_data *data = meson_clk_cpu_dyndiv_data(clk);

drivers/clk/meson/clk-cpu-dyndiv.c

42

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-cpu-dyndiv.c

43

struct meson_clk_cpu_dyndiv_data *data = meson_clk_cpu_dyndiv_data(clk);

drivers/clk/meson/clk-cpu-dyndiv.c

54

meson_parm_write(clk->map, &data->dyn, 1);

drivers/clk/meson/clk-cpu-dyndiv.c

57

return regmap_update_bits(clk->map, data->div.reg_off,

drivers/clk/meson/clk-dualdiv.c

111

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-dualdiv.c

112

struct meson_clk_dualdiv_data *dualdiv = meson_clk_dualdiv_data(clk);

drivers/clk/meson/clk-dualdiv.c

119

meson_parm_write(clk->map, &dualdiv->dual, setting->dual);

drivers/clk/meson/clk-dualdiv.c

120

meson_parm_write(clk->map, &dualdiv->n1, setting->n1 - 1);

drivers/clk/meson/clk-dualdiv.c

121

meson_parm_write(clk->map, &dualdiv->m1, setting->m1 - 1);

drivers/clk/meson/clk-dualdiv.c

122

meson_parm_write(clk->map, &dualdiv->n2, setting->n2 - 1);

drivers/clk/meson/clk-dualdiv.c

123

meson_parm_write(clk->map, &dualdiv->m2, setting->m2 - 1);

drivers/clk/meson/clk-dualdiv.c

31

meson_clk_dualdiv_data(struct clk_regmap *clk)

drivers/clk/meson/clk-dualdiv.c

33

return (struct meson_clk_dualdiv_data *)clk->data;

drivers/clk/meson/clk-dualdiv.c

50

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-dualdiv.c

51

struct meson_clk_dualdiv_data *dualdiv = meson_clk_dualdiv_data(clk);

drivers/clk/meson/clk-dualdiv.c

54

setting.dual = meson_parm_read(clk->map, &dualdiv->dual);

drivers/clk/meson/clk-dualdiv.c

55

setting.n1 = meson_parm_read(clk->map, &dualdiv->n1) + 1;

drivers/clk/meson/clk-dualdiv.c

56

setting.m1 = meson_parm_read(clk->map, &dualdiv->m1) + 1;

drivers/clk/meson/clk-dualdiv.c

57

setting.n2 = meson_parm_read(clk->map, &dualdiv->n2) + 1;

drivers/clk/meson/clk-dualdiv.c

58

setting.m2 = meson_parm_read(clk->map, &dualdiv->m2) + 1;

drivers/clk/meson/clk-dualdiv.c

92

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-dualdiv.c

93

struct meson_clk_dualdiv_data *dualdiv = meson_clk_dualdiv_data(clk);

drivers/clk/meson/clk-mpll.c

112

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-mpll.c

113

struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk);

drivers/clk/meson/clk-mpll.c

119

meson_parm_write(clk->map, &mpll->sdm, sdm);

drivers/clk/meson/clk-mpll.c

122

meson_parm_write(clk->map, &mpll->n2, n2);

drivers/clk/meson/clk-mpll.c

129

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-mpll.c

130

struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk);

drivers/clk/meson/clk-mpll.c

138

regmap_multi_reg_write(clk->map, mpll->init_regs,

drivers/clk/meson/clk-mpll.c

142

meson_parm_write(clk->map, &mpll->sdm_en, 1);

drivers/clk/meson/clk-mpll.c

148

meson_parm_write(clk->map, &mpll->ssen, ss);

drivers/clk/meson/clk-mpll.c

153

meson_parm_write(clk->map, &mpll->misc, 1);

drivers/clk/meson/clk-mpll.c

26

meson_clk_mpll_data(struct clk_regmap *clk)

drivers/clk/meson/clk-mpll.c

28

return (struct meson_clk_mpll_data *)clk->data;

drivers/clk/meson/clk-mpll.c

78

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-mpll.c

79

struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk);

drivers/clk/meson/clk-mpll.c

83

sdm = meson_parm_read(clk->map, &mpll->sdm);

drivers/clk/meson/clk-mpll.c

84

n2 = meson_parm_read(clk->map, &mpll->n2);

drivers/clk/meson/clk-mpll.c

92

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-mpll.c

93

struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk);

drivers/clk/meson/clk-phase.c

103

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-phase.c

104

struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);

drivers/clk/meson/clk-phase.c

108

val = meson_parm_read(clk->map, &tph->ph0);

drivers/clk/meson/clk-phase.c

115

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-phase.c

116

struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);

drivers/clk/meson/clk-phase.c

120

meson_parm_write(clk->map, &tph->ph0, val);

drivers/clk/meson/clk-phase.c

121

meson_parm_write(clk->map, &tph->ph1, val);

drivers/clk/meson/clk-phase.c

122

meson_parm_write(clk->map, &tph->ph2, val);

drivers/clk/meson/clk-phase.c

141

meson_sclk_ws_inv_data(struct clk_regmap *clk)

drivers/clk/meson/clk-phase.c

143

return (struct meson_sclk_ws_inv_data *)clk->data;

drivers/clk/meson/clk-phase.c

148

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-phase.c

149

struct meson_sclk_ws_inv_data *tph = meson_sclk_ws_inv_data(clk);

drivers/clk/meson/clk-phase.c

158

val = meson_parm_read(clk->map, &tph->ph);

drivers/clk/meson/clk-phase.c

159

meson_parm_write(clk->map, &tph->ws, val ? 0 : 1);

drivers/clk/meson/clk-phase.c

16

meson_clk_phase_data(struct clk_regmap *clk)

drivers/clk/meson/clk-phase.c

166

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-phase.c

167

struct meson_sclk_ws_inv_data *tph = meson_sclk_ws_inv_data(clk);

drivers/clk/meson/clk-phase.c

170

val = meson_parm_read(clk->map, &tph->ph);

drivers/clk/meson/clk-phase.c

177

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-phase.c

178

struct meson_sclk_ws_inv_data *tph = meson_sclk_ws_inv_data(clk);

drivers/clk/meson/clk-phase.c

18

return (struct meson_clk_phase_data *)clk->data;

drivers/clk/meson/clk-phase.c

182

meson_parm_write(clk->map, &tph->ph, val);

drivers/clk/meson/clk-phase.c

183

meson_parm_write(clk->map, &tph->ws, val ? 0 : 1);

drivers/clk/meson/clk-phase.c

39

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-phase.c

40

struct meson_clk_phase_data *phase = meson_clk_phase_data(clk);

drivers/clk/meson/clk-phase.c

43

val = meson_parm_read(clk->map, &phase->ph);

drivers/clk/meson/clk-phase.c

50

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-phase.c

51

struct meson_clk_phase_data *phase = meson_clk_phase_data(clk);

drivers/clk/meson/clk-phase.c

55

meson_parm_write(clk->map, &phase->ph, val);

drivers/clk/meson/clk-phase.c

77

meson_clk_triphase_data(struct clk_regmap *clk)

drivers/clk/meson/clk-phase.c

79

return (struct meson_clk_triphase_data *)clk->data;

drivers/clk/meson/clk-phase.c

84

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-phase.c

85

struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);

drivers/clk/meson/clk-phase.c

94

val = meson_parm_read(clk->map, &tph->ph0);

drivers/clk/meson/clk-phase.c

95

meson_parm_write(clk->map, &tph->ph1, val);

drivers/clk/meson/clk-phase.c

96

meson_parm_write(clk->map, &tph->ph2, val);

drivers/clk/meson/clk-pll.c

249

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-pll.c

250

struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

drivers/clk/meson/clk-pll.c

279

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-pll.c

280

struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

drivers/clk/meson/clk-pll.c

285

if (meson_parm_read(clk->map, &pll->l))

drivers/clk/meson/clk-pll.c

296

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-pll.c

297

struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

drivers/clk/meson/clk-pll.c

300

meson_parm_read(clk->map, &pll->rst))

drivers/clk/meson/clk-pll.c

303

if (!meson_parm_read(clk->map, &pll->en) ||

drivers/clk/meson/clk-pll.c

304

!meson_parm_read(clk->map, &pll->l))

drivers/clk/meson/clk-pll.c

312

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-pll.c

313

struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

drivers/clk/meson/clk-pll.c

330

meson_parm_write(clk->map, &pll->rst, 1);

drivers/clk/meson/clk-pll.c

332

regmap_multi_reg_write(clk->map, pll->init_regs,

drivers/clk/meson/clk-pll.c

336

meson_parm_write(clk->map, &pll->rst, 0);

drivers/clk/meson/clk-pll.c

358

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-pll.c

359

struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

drivers/clk/meson/clk-pll.c

367

meson_parm_write(clk->map, &pll->rst, 1);

drivers/clk/meson/clk-pll.c

370

meson_parm_write(clk->map, &pll->en, 1);

drivers/clk/meson/clk-pll.c

374

meson_parm_write(clk->map, &pll->rst, 0);

drivers/clk/meson/clk-pll.c

386

meson_parm_write(clk->map, &pll->current_en, 1);

drivers/clk/meson/clk-pll.c

391

meson_parm_write(clk->map, &pll->l_detect, 1);

drivers/clk/meson/clk-pll.c

392

meson_parm_write(clk->map, &pll->l_detect, 0);

drivers/clk/meson/clk-pll.c

40

meson_clk_pll_data(struct clk_regmap *clk)

drivers/clk/meson/clk-pll.c

403

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-pll.c

404

struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

drivers/clk/meson/clk-pll.c

408

meson_parm_write(clk->map, &pll->rst, 1);

drivers/clk/meson/clk-pll.c

411

meson_parm_write(clk->map, &pll->en, 0);

drivers/clk/meson/clk-pll.c

415

meson_parm_write(clk->map, &pll->current_en, 0);

drivers/clk/meson/clk-pll.c

42

return (struct meson_clk_pll_data *)clk->data;

drivers/clk/meson/clk-pll.c

421

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-pll.c

422

struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

drivers/clk/meson/clk-pll.c

436

enabled = meson_parm_read(clk->map, &pll->en);

drivers/clk/meson/clk-pll.c

440

meson_parm_write(clk->map, &pll->n, n);

drivers/clk/meson/clk-pll.c

441

meson_parm_write(clk->map, &pll->m, m);

drivers/clk/meson/clk-pll.c

445

meson_parm_write(clk->map, &pll->frac, frac);

drivers/clk/meson/clk-pll.c

75

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-pll.c

76

struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

drivers/clk/meson/clk-pll.c

79

n = meson_parm_read(clk->map, &pll->n);

drivers/clk/meson/clk-pll.c

89

m = meson_parm_read(clk->map, &pll->m);

drivers/clk/meson/clk-pll.c

92

meson_parm_read(clk->map, &pll->frac) :

drivers/clk/meson/clk-regmap.c

107

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

108

struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);

drivers/clk/meson/clk-regmap.c

112

ret = regmap_read(clk->map, div->offset, &val);

drivers/clk/meson/clk-regmap.c

126

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

127

struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);

drivers/clk/meson/clk-regmap.c

133

ret = regmap_read(clk->map, div->offset, &val);

drivers/clk/meson/clk-regmap.c

14

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

151

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

152

struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);

drivers/clk/meson/clk-regmap.c

162

return regmap_update_bits(clk->map, div->offset,

drivers/clk/meson/clk-regmap.c

185

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

186

struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);

drivers/clk/meson/clk-regmap.c

19

if (clk->map)

drivers/clk/meson/clk-regmap.c

190

ret = regmap_read(clk->map, mux->offset, &val);

drivers/clk/meson/clk-regmap.c

201

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

202

struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);

drivers/clk/meson/clk-regmap.c

205

return regmap_update_bits(clk->map, mux->offset,

drivers/clk/meson/clk-regmap.c

213

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

214

struct clk_regmap_mux_data *mux = clk_get_regmap_mux_data(clk);

drivers/clk/meson/clk-regmap.c

32

clk->map = dev_get_regmap(dev, NULL);

drivers/clk/meson/clk-regmap.c

33

if (clk->map)

drivers/clk/meson/clk-regmap.c

41

clk->map = syscon_node_to_regmap(parent_np);

drivers/clk/meson/clk-regmap.c

44

if (!IS_ERR_OR_NULL(clk->map))

drivers/clk/meson/clk-regmap.c

55

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

56

struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);

drivers/clk/meson/clk-regmap.c

61

return regmap_update_bits(clk->map, gate->offset, BIT(gate->bit_idx),

drivers/clk/meson/clk-regmap.c

77

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/clk-regmap.c

78

struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);

drivers/clk/meson/clk-regmap.c

81

regmap_read(clk->map, gate->offset, &val);

drivers/clk/meson/clk-regmap.h

113

clk_get_regmap_mux_data(struct clk_regmap *clk)

drivers/clk/meson/clk-regmap.h

115

return (struct clk_regmap_mux_data *)clk->data;

drivers/clk/meson/clk-regmap.h

55

clk_get_regmap_gate_data(struct clk_regmap *clk)

drivers/clk/meson/clk-regmap.h

57

return (struct clk_regmap_gate_data *)clk->data;

drivers/clk/meson/clk-regmap.h

83

clk_get_regmap_div_data(struct clk_regmap *clk)

drivers/clk/meson/clk-regmap.h

85

return (struct clk_regmap_div_data *)clk->data;

drivers/clk/meson/g12a.c

5245

struct clk *notifier_clk;

drivers/clk/meson/g12a.c

5279

struct clk *notifier_clk;

drivers/clk/meson/g12a.c

5357

struct clk *notifier_clk;

drivers/clk/meson/meson8b.c

3637

struct clk *notifier_clk;

drivers/clk/meson/sclk-div.c

102

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

103

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

112

static void sclk_apply_ratio(struct clk_regmap *clk,

drivers/clk/meson/sclk-div.c

122

meson_parm_write(clk->map, &sclk->hi, hi);

drivers/clk/meson/sclk-div.c

128

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

129

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

133

sclk_apply_ratio(clk, sclk);

drivers/clk/meson/sclk-div.c

142

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

143

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

152

hi = meson_parm_read(clk->map, &sclk->hi);

drivers/clk/meson/sclk-div.c

158

static void sclk_apply_divider(struct clk_regmap *clk,

drivers/clk/meson/sclk-div.c

162

sclk_apply_ratio(clk, sclk);

drivers/clk/meson/sclk-div.c

164

meson_parm_write(clk->map, &sclk->div, sclk->cached_div - 1);

drivers/clk/meson/sclk-div.c

170

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

171

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

177

sclk_apply_divider(clk, sclk);

drivers/clk/meson/sclk-div.c

185

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

186

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

193

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

194

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

196

sclk_apply_divider(clk, sclk);

drivers/clk/meson/sclk-div.c

203

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

204

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

206

meson_parm_write(clk->map, &sclk->div, 0);

drivers/clk/meson/sclk-div.c

211

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

212

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

214

if (meson_parm_read(clk->map, &sclk->div))

drivers/clk/meson/sclk-div.c

222

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/sclk-div.c

223

struct meson_sclk_div_data *sclk = meson_sclk_div_data(clk);

drivers/clk/meson/sclk-div.c

231

val = meson_parm_read(clk->map, &sclk->div);

drivers/clk/meson/sclk-div.c

26

meson_sclk_div_data(struct clk_regmap *clk)

drivers/clk/meson/sclk-div.c

28

return (struct meson_sclk_div_data *)clk->data;

drivers/clk/meson/vclk.c

102

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

103

struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk);

drivers/clk/meson/vclk.c

106

meson_parm_write(clk->map, &vclk->reset, 0);

drivers/clk/meson/vclk.c

107

meson_parm_write(clk->map, &vclk->enable, 1);

drivers/clk/meson/vclk.c

114

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

115

struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk);

drivers/clk/meson/vclk.c

118

meson_parm_write(clk->map, &vclk->enable, 0);

drivers/clk/meson/vclk.c

119

meson_parm_write(clk->map, &vclk->reset, 1);

drivers/clk/meson/vclk.c

12

clk_get_meson_vclk_gate_data(struct clk_regmap *clk)

drivers/clk/meson/vclk.c

124

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

125

struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk);

drivers/clk/meson/vclk.c

127

return meson_parm_read(clk->map, &vclk->enable);

drivers/clk/meson/vclk.c

14

return (struct meson_vclk_gate_data *)clk->data;

drivers/clk/meson/vclk.c

19

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

20

struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk);

drivers/clk/meson/vclk.c

22

meson_parm_write(clk->map, &vclk->enable, 1);

drivers/clk/meson/vclk.c

25

meson_parm_write(clk->map, &vclk->reset, 1);

drivers/clk/meson/vclk.c

26

meson_parm_write(clk->map, &vclk->reset, 0);

drivers/clk/meson/vclk.c

33

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

34

struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk);

drivers/clk/meson/vclk.c

36

meson_parm_write(clk->map, &vclk->enable, 0);

drivers/clk/meson/vclk.c

41

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

42

struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk);

drivers/clk/meson/vclk.c

44

return meson_parm_read(clk->map, &vclk->enable);

drivers/clk/meson/vclk.c

58

clk_get_meson_vclk_div_data(struct clk_regmap *clk)

drivers/clk/meson/vclk.c

60

return (struct meson_vclk_div_data *)clk->data;

drivers/clk/meson/vclk.c

66

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

67

struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk);

drivers/clk/meson/vclk.c

69

return divider_recalc_rate(hw, prate, meson_parm_read(clk->map, &vclk->div),

drivers/clk/meson/vclk.c

76

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

77

struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk);

drivers/clk/meson/vclk.c

86

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vclk.c

87

struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk);

drivers/clk/meson/vclk.c

95

meson_parm_write(clk->map, &vclk->div, ret);

drivers/clk/meson/vid-pll-div.c

14

meson_vid_pll_div_data(struct clk_regmap *clk)

drivers/clk/meson/vid-pll-div.c

16

return (struct meson_vid_pll_div_data *)clk->data;

drivers/clk/meson/vid-pll-div.c

78

struct clk_regmap *clk = to_clk_regmap(hw);

drivers/clk/meson/vid-pll-div.c

79

struct meson_vid_pll_div_data *pll_div = meson_vid_pll_div_data(clk);

drivers/clk/meson/vid-pll-div.c

82

div = _get_table_val(meson_parm_read(clk->map, &pll_div->val),

drivers/clk/meson/vid-pll-div.c

83

meson_parm_read(clk->map, &pll_div->sel));

drivers/clk/microchip/clk-core.c

1001

struct clk *pic32_sosc_clk_register(const struct pic32_sec_osc_data *data,

drivers/clk/microchip/clk-core.c

215

struct clk *pic32_periph_clk_register(const struct pic32_periph_clk_data *desc,

drivers/clk/microchip/clk-core.c

219

struct clk *clk;

drivers/clk/microchip/clk-core.c

229

clk = devm_clk_register(core->dev, &pbclk->hw);

drivers/clk/microchip/clk-core.c

230

if (IS_ERR(clk)) {

drivers/clk/microchip/clk-core.c

235

return clk;

drivers/clk/microchip/clk-core.c

553

struct clk *pic32_refo_clk_register(const struct pic32_ref_osc_data *data,

drivers/clk/microchip/clk-core.c

557

struct clk *clk;

drivers/clk/microchip/clk-core.c

568

clk = devm_clk_register(core->dev, &refo->hw);

drivers/clk/microchip/clk-core.c

569

if (IS_ERR(clk))

drivers/clk/microchip/clk-core.c

572

return clk;

drivers/clk/microchip/clk-core.c

730

struct clk *pic32_spll_clk_register(const struct pic32_sys_pll_data *data,

drivers/clk/microchip/clk-core.c

734

struct clk *clk;

drivers/clk/microchip/clk-core.c

750

clk = devm_clk_register(core->dev, &spll->hw);

drivers/clk/microchip/clk-core.c

751

if (IS_ERR(clk))

drivers/clk/microchip/clk-core.c

754

return clk;

drivers/clk/microchip/clk-core.c

918

struct clk *pic32_sys_clk_register(const struct pic32_sys_clk_data *data,

drivers/clk/microchip/clk-core.c

922

struct clk *clk;

drivers/clk/microchip/clk-core.c

935

clk = devm_clk_register(core->dev, &sclk->hw);

drivers/clk/microchip/clk-core.c

936

if (IS_ERR(clk))

drivers/clk/microchip/clk-core.c

939

return clk;

drivers/clk/microchip/clk-core.h

65

struct clk *pic32_periph_clk_register(const struct pic32_periph_clk_data *data,

drivers/clk/microchip/clk-core.h

67

struct clk *pic32_refo_clk_register(const struct pic32_ref_osc_data *data,

drivers/clk/microchip/clk-core.h

69

struct clk *pic32_sys_clk_register(const struct pic32_sys_clk_data *data,

drivers/clk/microchip/clk-core.h

71

struct clk *pic32_spll_clk_register(const struct pic32_sys_pll_data *data,

drivers/clk/microchip/clk-core.h

73

struct clk *pic32_sosc_clk_register(const struct pic32_sec_osc_data *data,

drivers/clk/microchip/clk-pic32mzda.c

128

struct clk *clks[MAXCLKS];

drivers/clk/microchip/clk-pic32mzda.c

156

struct clk *pll_mux_clk, *clk;

drivers/clk/microchip/clk-pic32mzda.c

157

struct clk **clks;

drivers/clk/microchip/clk-pic32mzda.c

236

clk = clks[pic32mzda_critical_clks[i]];

drivers/clk/microchip/clk-pic32mzda.c

237

if (clk_prepare_enable(clk))

drivers/clk/microchip/clk-pic32mzda.c

239

__clk_get_name(clk));

drivers/clk/mmp/clk-apbc.c

119

struct clk *mmp_clk_register_apbc(const char *name, const char *parent_name,

drivers/clk/mmp/clk-apbc.c

124

struct clk *clk;

drivers/clk/mmp/clk-apbc.c

143

clk = clk_register(NULL, &apbc->hw);

drivers/clk/mmp/clk-apbc.c

144

if (IS_ERR(clk))

drivers/clk/mmp/clk-apbc.c

147

return clk;

drivers/clk/mmp/clk-apmu.c

17

#define to_clk_apmu(clk) (container_of(clk, struct clk_apmu, clk))

drivers/clk/mmp/clk-apmu.c

65

struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name,

drivers/clk/mmp/clk-apmu.c

69

struct clk *clk;

drivers/clk/mmp/clk-apmu.c

87

clk = clk_register(NULL, &apmu->hw);

drivers/clk/mmp/clk-apmu.c

89

if (IS_ERR(clk))

drivers/clk/mmp/clk-apmu.c

92

return clk;

drivers/clk/mmp/clk-frac.c

169

struct clk *mmp_clk_register_factor(const char *name, const char *parent_name,

drivers/clk/mmp/clk-frac.c

176

struct clk *clk;

drivers/clk/mmp/clk-frac.c

201

clk = clk_register(NULL, &factor->hw);

drivers/clk/mmp/clk-frac.c

202

if (IS_ERR_OR_NULL(clk))

drivers/clk/mmp/clk-frac.c

205

return clk;

drivers/clk/mmp/clk-gate.c

121

clk = clk_register(dev, &gate->hw);

drivers/clk/mmp/clk-gate.c

123

if (IS_ERR(clk))

drivers/clk/mmp/clk-gate.c

126

return clk;

drivers/clk/mmp/clk-gate.c

92

struct clk *mmp_clk_register_gate(struct device *dev, const char *name,

drivers/clk/mmp/clk-gate.c

98

struct clk *clk;

drivers/clk/mmp/clk-mix.c

439

struct clk *mmp_clk_register_mix(struct device *dev,

drivers/clk/mmp/clk-mix.c

448

struct clk *clk;

drivers/clk/mmp/clk-mix.c

491

clk = clk_register(dev, &mix->hw);

drivers/clk/mmp/clk-mix.c

493

if (IS_ERR(clk)) {

drivers/clk/mmp/clk-mix.c

499

return clk;

drivers/clk/mmp/clk-of-mmp2.c

181

struct clk *clk;

drivers/clk/mmp/clk-of-mmp2.c

200

clk = mmp_clk_register_factor("uart_pll", "pll1_4",

drivers/clk/mmp/clk-of-mmp2.c

205

mmp_clk_add(unit, MMP2_CLK_UART_PLL, clk);

drivers/clk/mmp/clk-of-mmp2.c

397

struct clk *clk;

drivers/clk/mmp/clk-of-mmp2.c

401

clk = mmp_clk_register_mix(NULL, "sdh_mix_clk", sdh_parent_names,

drivers/clk/mmp/clk-of-mmp2.c

407

clk = mmp_clk_register_mix(NULL, "ccic0_mix_clk", ccic_parent_names,

drivers/clk/mmp/clk-of-mmp2.c

411

mmp_clk_add(unit, MMP2_CLK_CCIC0_MIX, clk);

drivers/clk/mmp/clk-of-mmp2.c

414

clk = mmp_clk_register_mix(NULL, "ccic1_mix_clk", ccic_parent_names,

drivers/clk/mmp/clk-of-mmp2.c

418

mmp_clk_add(unit, MMP2_CLK_CCIC1_MIX, clk);

drivers/clk/mmp/clk-of-pxa168.c

115

struct clk *clk;

drivers/clk/mmp/clk-of-pxa168.c

124

clk = mmp_clk_register_factor("uart_pll", "pll1_4",

drivers/clk/mmp/clk-of-pxa168.c

129

mmp_clk_add(unit, PXA168_CLK_UART_PLL, clk);

drivers/clk/mmp/clk-of-pxa910.c

104

clk = mmp_clk_register_factor("uart_pll", "pll1_4",

drivers/clk/mmp/clk-of-pxa910.c

109

mmp_clk_add(unit, PXA910_CLK_UART_PLL, clk);

drivers/clk/mmp/clk-of-pxa910.c

95

struct clk *clk;

drivers/clk/mmp/clk-pll.c

100

static struct clk *mmp_clk_register_pll(char *name,

drivers/clk/mmp/clk-pll.c

108

struct clk *clk;

drivers/clk/mmp/clk-pll.c

133

clk = clk_register(NULL, &pll->hw);

drivers/clk/mmp/clk-pll.c

135

if (IS_ERR(clk))

drivers/clk/mmp/clk-pll.c

138

return clk;

drivers/clk/mmp/clk-pll.c

145

struct clk *clk;

drivers/clk/mmp/clk-pll.c

154

clk = mmp_clk_register_pll(clks[i].name,

drivers/clk/mmp/clk-pll.c

162

if (IS_ERR(clk)) {

drivers/clk/mmp/clk-pll.c

168

unit->clk_table[clks[i].id] = clk;

drivers/clk/mmp/clk-pxa1908-apbc.c

75

struct clk *clk;

drivers/clk/mmp/clk-pxa1908-apbc.c

85

clk = mmp_clk_register_apbc("swjtag", NULL,

drivers/clk/mmp/clk-pxa1908-apbc.c

87

mmp_clk_add(unit, PXA1908_CLK_SWJTAG, clk);

drivers/clk/mmp/clk.c

100

struct clk *clk;

drivers/clk/mmp/clk.c

104

clk = mmp_clk_register_gate(NULL, clks[i].name,

drivers/clk/mmp/clk.c

114

if (IS_ERR(clk)) {

drivers/clk/mmp/clk.c

120

unit->clk_table[clks[i].id] = clk;

drivers/clk/mmp/clk.c

128

struct clk *clk;

drivers/clk/mmp/clk.c

13

struct clk **clk_table;

drivers/clk/mmp/clk.c

132

clk = clk_register_mux(NULL, clks[i].name,

drivers/clk/mmp/clk.c

142

if (IS_ERR(clk)) {

drivers/clk/mmp/clk.c

148

unit->clk_table[clks[i].id] = clk;

drivers/clk/mmp/clk.c

15

clk_table = kzalloc_objs(struct clk *, nr_clks);

drivers/clk/mmp/clk.c

156

struct clk *clk;

drivers/clk/mmp/clk.c

160

clk = clk_register_divider(NULL, clks[i].name,

drivers/clk/mmp/clk.c

169

if (IS_ERR(clk)) {

drivers/clk/mmp/clk.c

175

unit->clk_table[clks[i].id] = clk;

drivers/clk/mmp/clk.c

180

struct clk *clk)

drivers/clk/mmp/clk.c

182

if (IS_ERR_OR_NULL(clk)) {

drivers/clk/mmp/clk.c

183

pr_err("CLK %d has invalid pointer %p\n", id, clk);

drivers/clk/mmp/clk.c

191

unit->clk_table[id] = clk;

drivers/clk/mmp/clk.c

31

struct clk *clk;

drivers/clk/mmp/clk.c

34

clk = clk_register_fixed_rate(NULL, clks[i].name,

drivers/clk/mmp/clk.c

38

if (IS_ERR(clk)) {

drivers/clk/mmp/clk.c

44

unit->clk_table[clks[i].id] = clk;

drivers/clk/mmp/clk.c

52

struct clk *clk;

drivers/clk/mmp/clk.c

56

clk = clk_register_fixed_factor(NULL, clks[i].name,

drivers/clk/mmp/clk.c

60

if (IS_ERR(clk)) {

drivers/clk/mmp/clk.c

66

unit->clk_table[clks[i].id] = clk;

drivers/clk/mmp/clk.c

74

struct clk *clk;

drivers/clk/mmp/clk.c

78

clk = clk_register_gate(NULL, clks[i].name,

drivers/clk/mmp/clk.c

86

if (IS_ERR(clk)) {

drivers/clk/mmp/clk.c

92

unit->clk_table[clks[i].id] = clk;

drivers/clk/mmp/clk.h

119

extern struct clk *mmp_clk_register_gate(struct device *dev, const char *name,

drivers/clk/mmp/clk.h

125

extern struct clk *mmp_clk_register_apbc(const char *name,

drivers/clk/mmp/clk.h

128

extern struct clk *mmp_clk_register_apmu(const char *name,

drivers/clk/mmp/clk.h

134

struct clk **clk_table;

drivers/clk/mmp/clk.h

251

struct clk *clk);

drivers/clk/mmp/clk.h

33

extern struct clk *mmp_clk_register_factor(const char *name,

drivers/clk/mmp/clk.h

96

extern struct clk *mmp_clk_register_mix(struct device *dev,

drivers/clk/mvebu/ap-cpu-clk.c

146

struct ap_cpu_clk *clk = to_ap_cpu_clk(hw);

drivers/clk/mvebu/ap-cpu-clk.c

150

cpu_clkdiv_reg = clk->pll_regs->divider_reg +

drivers/clk/mvebu/ap-cpu-clk.c

151

(clk->cluster * clk->pll_regs->cluster_offset);

drivers/clk/mvebu/ap-cpu-clk.c

152

regmap_read(clk->pll_cr_base, cpu_clkdiv_reg, &cpu_clkdiv_ratio);

drivers/clk/mvebu/ap-cpu-clk.c

153

cpu_clkdiv_ratio &= clk->pll_regs->divider_mask;

drivers/clk/mvebu/ap-cpu-clk.c

154

cpu_clkdiv_ratio >>= clk->pll_regs->divider_offset;

drivers/clk/mvebu/ap-cpu-clk.c

162

struct ap_cpu_clk *clk = to_ap_cpu_clk(hw);

drivers/clk/mvebu/ap-cpu-clk.c

166

cpu_clkdiv_reg = clk->pll_regs->divider_reg +

drivers/clk/mvebu/ap-cpu-clk.c

167

(clk->cluster * clk->pll_regs->cluster_offset);

drivers/clk/mvebu/ap-cpu-clk.c

168

cpu_force_reg = clk->pll_regs->force_reg +

drivers/clk/mvebu/ap-cpu-clk.c

169

(clk->cluster * clk->pll_regs->cluster_offset);

drivers/clk/mvebu/ap-cpu-clk.c

170

cpu_ratio_reg = clk->pll_regs->ratio_reg +

drivers/clk/mvebu/ap-cpu-clk.c

171

(clk->cluster * clk->pll_regs->cluster_offset);

drivers/clk/mvebu/ap-cpu-clk.c

173

regmap_read(clk->pll_cr_base, cpu_clkdiv_reg, &reg);

drivers/clk/mvebu/ap-cpu-clk.c

174

reg &= ~(clk->pll_regs->divider_mask);

drivers/clk/mvebu/ap-cpu-clk.c

175

reg |= (divider << clk->pll_regs->divider_offset);

drivers/clk/mvebu/ap-cpu-clk.c

181

if (clk->pll_regs->divider_ratio) {

drivers/clk/mvebu/ap-cpu-clk.c

183

reg |= ((divider * clk->pll_regs->divider_ratio) <<

drivers/clk/mvebu/ap-cpu-clk.c

186

regmap_write(clk->pll_cr_base, cpu_clkdiv_reg, reg);

drivers/clk/mvebu/ap-cpu-clk.c

189

regmap_update_bits(clk->pll_cr_base, cpu_force_reg,

drivers/clk/mvebu/ap-cpu-clk.c

190

clk->pll_regs->force_mask,

drivers/clk/mvebu/ap-cpu-clk.c

191

clk->pll_regs->force_mask);

drivers/clk/mvebu/ap-cpu-clk.c

193

regmap_update_bits(clk->pll_cr_base, cpu_ratio_reg,

drivers/clk/mvebu/ap-cpu-clk.c

194

BIT(clk->pll_regs->ratio_offset),

drivers/clk/mvebu/ap-cpu-clk.c

195

BIT(clk->pll_regs->ratio_offset));

drivers/clk/mvebu/ap-cpu-clk.c

197

stable_bit = BIT(clk->pll_regs->ratio_state_offset +

drivers/clk/mvebu/ap-cpu-clk.c

198

clk->cluster *

drivers/clk/mvebu/ap-cpu-clk.c

199

clk->pll_regs->ratio_state_cluster_offset);

drivers/clk/mvebu/ap-cpu-clk.c

200

ret = regmap_read_poll_timeout(clk->pll_cr_base,

drivers/clk/mvebu/ap-cpu-clk.c

201

clk->pll_regs->ratio_state_reg, reg,

drivers/clk/mvebu/ap-cpu-clk.c

207

regmap_update_bits(clk->pll_cr_base, cpu_ratio_reg,

drivers/clk/mvebu/ap-cpu-clk.c

208

BIT(clk->pll_regs->ratio_offset), 0);

drivers/clk/mvebu/ap-cpu-clk.c

291

struct clk *parent;

drivers/clk/mvebu/ap806-system-controller.c

26

static struct clk *ap806_clks[AP806_CLK_NUM];

drivers/clk/mvebu/armada-37xx-tbg.c

87

struct clk *parent;

drivers/clk/mvebu/clk-corediv.c

258

struct clk **clks;

drivers/clk/mvebu/clk-corediv.c

273

clks = kzalloc_objs(struct clk *, clk_data.clk_num);

drivers/clk/mvebu/clk-cpu.c

156

if (__clk_is_enabled(hwclk->clk))

drivers/clk/mvebu/clk-cpu.c

196

struct clk *clk;

drivers/clk/mvebu/clk-cpu.c

218

clk = clk_register(NULL, &cpuclk[cpu].hw);

drivers/clk/mvebu/clk-cpu.c

219

if (WARN_ON(IS_ERR(clk)))

drivers/clk/mvebu/clk-cpu.c

221

clks[cpu] = clk;

drivers/clk/mvebu/clk-cpu.c

42

static struct clk **clks;

drivers/clk/mvebu/common.c

192

struct clk **gates;

drivers/clk/mvebu/common.c

200

static struct clk *clk_gating_get_src(

drivers/clk/mvebu/common.c

240

struct clk *clk;

drivers/clk/mvebu/common.c

254

clk = of_clk_get(np, 0);

drivers/clk/mvebu/common.c

255

if (!IS_ERR(clk)) {

drivers/clk/mvebu/common.c

256

default_parent = __clk_get_name(clk);

drivers/clk/mvebu/common.c

257

clk_put(clk);

drivers/clk/mvebu/dove-divider.c

161

static struct clk *clk_register_dove_divider(struct device *dev,

drivers/clk/mvebu/dove-divider.c

220

struct clk **clks)

drivers/clk/mvebu/dove-divider.c

222

struct clk *clk;

drivers/clk/mvebu/dove-divider.c

229

clk = clk_register_fixed_rate(dev, core_pll[0], NULL, 0, 2000000000UL);

drivers/clk/mvebu/dove-divider.c

230

if (IS_ERR(clk))

drivers/clk/mvebu/dove-divider.c

231

return PTR_ERR(clk);

drivers/clk/mvebu/dove-divider.c

241

static struct clk *dove_divider_clocks[4];

drivers/clk/mvebu/kirkwood.c

256

struct clk **muxes;

drivers/clk/mvebu/kirkwood.c

271

static struct clk *clk_muxing_get_src(

drivers/clk/mvebu/kirkwood.c

312

ctrl->muxes = kzalloc_objs(struct clk *, ctrl->num_muxes);

drivers/clk/mxs/clk-div.c

102

return clk;

drivers/clk/mxs/clk-div.c

70

struct clk *mxs_clk_div(const char *name, const char *parent_name,

drivers/clk/mxs/clk-div.c

74

struct clk *clk;

drivers/clk/mxs/clk-div.c

98

clk = clk_register(NULL, &div->divider.hw);

drivers/clk/mxs/clk-div.c

99

if (IS_ERR(clk))

drivers/clk/mxs/clk-frac.c

112

struct clk *mxs_clk_frac(const char *name, const char *parent_name,

drivers/clk/mxs/clk-frac.c

116

struct clk *clk;

drivers/clk/mxs/clk-frac.c

135

clk = clk_register(NULL, &frac->hw);

drivers/clk/mxs/clk-frac.c

136

if (IS_ERR(clk))

drivers/clk/mxs/clk-frac.c

139

return clk;

drivers/clk/mxs/clk-imx23.c

90

static struct clk *clks[clk_max];

drivers/clk/mxs/clk-imx28.c

145

static struct clk *clks[clk_max];

drivers/clk/mxs/clk-pll.c

104

clk = clk_register(NULL, &pll->hw);

drivers/clk/mxs/clk-pll.c

105

if (IS_ERR(clk))

drivers/clk/mxs/clk-pll.c

108

return clk;

drivers/clk/mxs/clk-pll.c

82

struct clk *mxs_clk_pll(const char *name, const char *parent_name,

drivers/clk/mxs/clk-pll.c

86

struct clk *clk;

drivers/clk/mxs/clk-ref.c

113

struct clk *mxs_clk_ref(const char *name, const char *parent_name,

drivers/clk/mxs/clk-ref.c

117

struct clk *clk;

drivers/clk/mxs/clk-ref.c

134

clk = clk_register(NULL, &ref->hw);

drivers/clk/mxs/clk-ref.c

135

if (IS_ERR(clk))

drivers/clk/mxs/clk-ref.c

138

return clk;

drivers/clk/mxs/clk-ssp.c

27

ssp_clk = clk_get_rate(ssp->clk);

drivers/clk/mxs/clk.h

21

struct clk *mxs_clk_pll(const char *name, const char *parent_name,

drivers/clk/mxs/clk.h

24

struct clk *mxs_clk_ref(const char *name, const char *parent_name,

drivers/clk/mxs/clk.h

27

struct clk *mxs_clk_div(const char *name, const char *parent_name,

drivers/clk/mxs/clk.h

30

struct clk *mxs_clk_frac(const char *name, const char *parent_name,

drivers/clk/mxs/clk.h

33

static inline struct clk *mxs_clk_fixed(const char *name, int rate)

drivers/clk/mxs/clk.h

38

static inline struct clk *mxs_clk_gate(const char *name,

drivers/clk/mxs/clk.h

46

static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,

drivers/clk/mxs/clk.h

54

static inline struct clk *mxs_clk_fixed_factor(const char *name,

drivers/clk/mxs/clk.h

9

struct clk;

drivers/clk/nxp/clk-lpc18xx-ccu.c

112

static struct clk *lpc18xx_ccu_branch_clk_get(struct of_phandle_args *clkspec,

drivers/clk/nxp/clk-lpc18xx-ccu.c

125

return clk_branches[i].clk;

drivers/clk/nxp/clk-lpc18xx-ccu.c

227

branch->clk = clk_register_composite(NULL, branch->name, &parent, 1,

drivers/clk/nxp/clk-lpc18xx-ccu.c

231

if (IS_ERR(branch->clk)) {

drivers/clk/nxp/clk-lpc18xx-ccu.c

243

clk_prepare_enable(branch->clk);

drivers/clk/nxp/clk-lpc18xx-ccu.c

39

struct clk *clk;

drivers/clk/nxp/clk-lpc18xx-cgu.c

531

static struct clk *lpc18xx_cgu_register_div(struct lpc18xx_cgu_src_clk_div *clk,

drivers/clk/nxp/clk-lpc18xx-cgu.c

535

const char *name = clk_src_names[clk->clk_id];

drivers/clk/nxp/clk-lpc18xx-cgu.c

538

clk->div.reg = reg;

drivers/clk/nxp/clk-lpc18xx-cgu.c

539

clk->mux.reg = reg;

drivers/clk/nxp/clk-lpc18xx-cgu.c

540

clk->gate.reg = reg;

drivers/clk/nxp/clk-lpc18xx-cgu.c

542

lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents);

drivers/clk/nxp/clk-lpc18xx-cgu.c

544

return clk_register_composite(NULL, name, parents, clk->n_parents,

drivers/clk/nxp/clk-lpc18xx-cgu.c

545

&clk->mux.hw, &clk_mux_ops,

drivers/clk/nxp/clk-lpc18xx-cgu.c

546

&clk->div.hw, &clk_divider_ops,

drivers/clk/nxp/clk-lpc18xx-cgu.c

547

&clk->gate.hw, &lpc18xx_gate_ops, 0);

drivers/clk/nxp/clk-lpc18xx-cgu.c

551

static struct clk *lpc18xx_register_base_clk(struct lpc18xx_cgu_base_clk *clk,

drivers/clk/nxp/clk-lpc18xx-cgu.c

555

const char *name = clk_base_names[clk->clk_id];

drivers/clk/nxp/clk-lpc18xx-cgu.c

558

if (clk->n_parents == 0)

drivers/clk/nxp/clk-lpc18xx-cgu.c

561

clk->mux.reg = reg;

drivers/clk/nxp/clk-lpc18xx-cgu.c

562

clk->gate.reg = reg;

drivers/clk/nxp/clk-lpc18xx-cgu.c

564

lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents);

drivers/clk/nxp/clk-lpc18xx-cgu.c

568

return clk_register_composite(NULL, name, parents, clk->n_parents,

drivers/clk/nxp/clk-lpc18xx-cgu.c

569

&clk->mux.hw, &clk_mux_ops,

drivers/clk/nxp/clk-lpc18xx-cgu.c

572

return clk_register_composite(NULL, name, parents, clk->n_parents,

drivers/clk/nxp/clk-lpc18xx-cgu.c

573

&clk->mux.hw, &clk_mux_ops,

drivers/clk/nxp/clk-lpc18xx-cgu.c

575

&clk->gate.hw, &lpc18xx_gate_ops, 0);

drivers/clk/nxp/clk-lpc18xx-cgu.c

579

static struct clk *lpc18xx_cgu_register_pll(struct lpc18xx_cgu_pll_clk *clk,

drivers/clk/nxp/clk-lpc18xx-cgu.c

582

const char *name = clk_src_names[clk->clk_id];

drivers/clk/nxp/clk-lpc18xx-cgu.c

585

clk->pll.reg = base;

drivers/clk/nxp/clk-lpc18xx-cgu.c

586

clk->mux.reg = base + clk->reg_offset + LPC18XX_CGU_PLL_CTRL_OFFSET;

drivers/clk/nxp/clk-lpc18xx-cgu.c

587

clk->gate.reg = base + clk->reg_offset + LPC18XX_CGU_PLL_CTRL_OFFSET;

drivers/clk/nxp/clk-lpc18xx-cgu.c

589

lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents);

drivers/clk/nxp/clk-lpc18xx-cgu.c

591

return clk_register_composite(NULL, name, parents, clk->n_parents,

drivers/clk/nxp/clk-lpc18xx-cgu.c

592

&clk->mux.hw, &clk_mux_ops,

drivers/clk/nxp/clk-lpc18xx-cgu.c

593

&clk->pll.hw, clk->pll_ops,

drivers/clk/nxp/clk-lpc18xx-cgu.c

594

&clk->gate.hw, &lpc18xx_gate_ops, 0);

drivers/clk/nxp/clk-lpc18xx-cgu.c

601

struct clk *clk;

drivers/clk/nxp/clk-lpc18xx-cgu.c

605

clk = clk_register_fixed_rate(NULL, clk_src_names[CLK_SRC_IRC],

drivers/clk/nxp/clk-lpc18xx-cgu.c

607

if (IS_ERR(clk))

drivers/clk/nxp/clk-lpc18xx-cgu.c

612

clk = clk_register_gate(NULL, clk_src_names[CLK_SRC_OSC], parents[0],

drivers/clk/nxp/clk-lpc18xx-cgu.c

615

if (IS_ERR(clk))

drivers/clk/nxp/clk-lpc18xx-cgu.c

620

clk = lpc18xx_cgu_register_pll(&lpc18xx_cgu_src_clk_plls[i],

drivers/clk/nxp/clk-lpc18xx-cgu.c

622

if (IS_ERR(clk))

drivers/clk/nxp/clk-lpc18xx-cgu.c

628

clk = lpc18xx_cgu_register_div(&lpc18xx_cgu_src_clk_divs[i],

drivers/clk/nxp/clk-lpc18xx-cgu.c

630

if (IS_ERR(clk))

drivers/clk/nxp/clk-lpc18xx-cgu.c

635

static struct clk *clk_base[BASE_CLK_MAX];

drivers/clk/nxp/clk-lpc18xx-creg.c

136

static struct clk *clk_register_creg_clk(struct device *dev,

drivers/clk/nxp/clk-lpc18xx-creg.c

158

static struct clk *clk_creg_early[CREG_CLK_MAX];

drivers/clk/nxp/clk-lpc18xx-creg.c

187

static struct clk *clk_creg[CREG_CLK_MAX];

drivers/clk/nxp/clk-lpc32xx.c

1063

struct lpc32xx_clk clk;

drivers/clk/nxp/clk-lpc32xx.c

1177

.clk = { \

drivers/clk/nxp/clk-lpc32xx.c

1386

static struct clk * __init lpc32xx_clk_register(u32 id)

drivers/clk/nxp/clk-lpc32xx.c

1391

struct clk *clk;

drivers/clk/nxp/clk-lpc32xx.c

1418

hw = &clk_hw->hw0.clk.hw;

drivers/clk/nxp/clk-lpc32xx.c

1433

clk = clk_register(NULL, hw);

drivers/clk/nxp/clk-lpc32xx.c

1447

mux_hw = &mux0->clk.hw;

drivers/clk/nxp/clk-lpc32xx.c

1451

div_hw = &div0->clk.hw;

drivers/clk/nxp/clk-lpc32xx.c

1455

gate_hw = &gate0->clk.hw;

drivers/clk/nxp/clk-lpc32xx.c

1458

clk = clk_register_composite(NULL, lpc32xx_clk->name,

drivers/clk/nxp/clk-lpc32xx.c

1468

clk = clk_register_fixed_rate(NULL, lpc32xx_clk->name,

drivers/clk/nxp/clk-lpc32xx.c

1473

clk = ERR_PTR(-EINVAL);

drivers/clk/nxp/clk-lpc32xx.c

1476

return clk;

drivers/clk/nxp/clk-lpc32xx.c

1496

struct clk *clk_osc, *clk_32k;

drivers/clk/nxp/clk-lpc32xx.c

1544

clk[i] = lpc32xx_clk_register(i);

drivers/clk/nxp/clk-lpc32xx.c

1545

if (IS_ERR(clk[i])) {

drivers/clk/nxp/clk-lpc32xx.c

1547

clk_proto[i].name, PTR_ERR(clk[i]));

drivers/clk/nxp/clk-lpc32xx.c

1548

clk[i] = NULL;

drivers/clk/nxp/clk-lpc32xx.c

1555

clk_set_rate(clk[LPC32XX_CLK_USB_PLL], 48000000);

drivers/clk/nxp/clk-lpc32xx.c

1558

clk_prepare_enable(clk[LPC32XX_CLK_ARM]);

drivers/clk/nxp/clk-lpc32xx.c

1559

clk_prepare_enable(clk[LPC32XX_CLK_HCLK]);

drivers/clk/nxp/clk-lpc32xx.c

1562

clk_prepare_enable(clk[LPC32XX_CLK_ARM_VFP]);

drivers/clk/nxp/clk-lpc32xx.c

1565

clk_mask_disable(&clk_hw_proto[LPC32XX_CLK_SLC].hw0.clk.hw);

drivers/clk/nxp/clk-lpc32xx.c

1566

clk_mask_disable(&clk_hw_proto[LPC32XX_CLK_MLC].hw0.clk.hw);

drivers/clk/nxp/clk-lpc32xx.c

164

static struct clk *clk[LPC32XX_CLK_MAX];

drivers/clk/nxp/clk-lpc32xx.c

166

.clks = clk,

drivers/clk/nxp/clk-lpc32xx.c

170

static struct clk *usb_clk[LPC32XX_USB_CLK_MAX];

drivers/clk/nxp/clk-lpc32xx.c

377

static inline u32 lpc32xx_usb_clk_read(struct lpc32xx_usb_clk *clk)

drivers/clk/nxp/clk-lpc32xx.c

382

static inline void lpc32xx_usb_clk_write(struct lpc32xx_usb_clk *clk, u32 val)

drivers/clk/nxp/clk-lpc32xx.c

389

struct lpc32xx_clk *clk = to_lpc32xx_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

392

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

394

if (clk->busy_mask && (val & clk->busy_mask) == clk->busy)

drivers/clk/nxp/clk-lpc32xx.c

397

return regmap_update_bits(clk_regmap, clk->reg,

drivers/clk/nxp/clk-lpc32xx.c

398

clk->enable_mask, clk->enable);

drivers/clk/nxp/clk-lpc32xx.c

403

struct lpc32xx_clk *clk = to_lpc32xx_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

405

regmap_update_bits(clk_regmap, clk->reg,

drivers/clk/nxp/clk-lpc32xx.c

406

clk->disable_mask, clk->disable);

drivers/clk/nxp/clk-lpc32xx.c

411

struct lpc32xx_clk *clk = to_lpc32xx_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

414

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

416

return ((val & clk->enable_mask) == clk->enable);

drivers/clk/nxp/clk-lpc32xx.c

427

struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

430

regmap_update_bits(clk_regmap, clk->reg, clk->enable, clk->enable);

drivers/clk/nxp/clk-lpc32xx.c

433

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

446

struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

448

regmap_update_bits(clk_regmap, clk->reg, clk->enable, 0x0);

drivers/clk/nxp/clk-lpc32xx.c

453

struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

456

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

458

val &= clk->enable | PLL_CTRL_LOCK;

drivers/clk/nxp/clk-lpc32xx.c

459

if (val == (clk->enable | PLL_CTRL_LOCK))

drivers/clk/nxp/clk-lpc32xx.c

474

struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

479

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

484

clk->m_div = ((val & PLL_CTRL_FEEDDIV) >> 1) + 1;

drivers/clk/nxp/clk-lpc32xx.c

485

clk->n_div = ((val & PLL_CTRL_PREDIV) >> 9) + 1;

drivers/clk/nxp/clk-lpc32xx.c

486

clk->p_div = ((val & PLL_CTRL_POSTDIV) >> 11) + 1;

drivers/clk/nxp/clk-lpc32xx.c

489

clk->p_div = 0;

drivers/clk/nxp/clk-lpc32xx.c

490

clk->mode = PLL_DIRECT_BYPASS;

drivers/clk/nxp/clk-lpc32xx.c

494

clk->mode = PLL_BYPASS;

drivers/clk/nxp/clk-lpc32xx.c

495

return parent_rate / (1 << clk->p_div);

drivers/clk/nxp/clk-lpc32xx.c

498

clk->p_div = 0;

drivers/clk/nxp/clk-lpc32xx.c

499

clk->mode = PLL_DIRECT;

drivers/clk/nxp/clk-lpc32xx.c

502

ref_rate = parent_rate / clk->n_div;

drivers/clk/nxp/clk-lpc32xx.c

503

rate = cco_rate = ref_rate * clk->m_div;

drivers/clk/nxp/clk-lpc32xx.c

507

cco_rate *= (1 << clk->p_div);

drivers/clk/nxp/clk-lpc32xx.c

508

clk->mode = PLL_INTEGER;

drivers/clk/nxp/clk-lpc32xx.c

510

rate /= (1 << clk->p_div);

drivers/clk/nxp/clk-lpc32xx.c

511

clk->mode = PLL_NON_INTEGER;

drivers/clk/nxp/clk-lpc32xx.c

518

clk->n_div, clk->m_div, (1 << clk->p_div), rate);

drivers/clk/nxp/clk-lpc32xx.c

534

struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

539

switch (clk->mode) {

drivers/clk/nxp/clk-lpc32xx.c

542

val |= (clk->m_div - 1) << 1;

drivers/clk/nxp/clk-lpc32xx.c

543

val |= (clk->n_div - 1) << 9;

drivers/clk/nxp/clk-lpc32xx.c

544

new_rate = (parent_rate * clk->m_div) / clk->n_div;

drivers/clk/nxp/clk-lpc32xx.c

548

val |= (clk->p_div - 1) << 11;

drivers/clk/nxp/clk-lpc32xx.c

549

new_rate = parent_rate / (1 << (clk->p_div));

drivers/clk/nxp/clk-lpc32xx.c

557

val |= (clk->m_div - 1) << 1;

drivers/clk/nxp/clk-lpc32xx.c

558

val |= (clk->n_div - 1) << 9;

drivers/clk/nxp/clk-lpc32xx.c

559

val |= (clk->p_div - 1) << 11;

drivers/clk/nxp/clk-lpc32xx.c

560

new_rate = (parent_rate * clk->m_div) / clk->n_div;

drivers/clk/nxp/clk-lpc32xx.c

564

val |= (clk->m_div - 1) << 1;

drivers/clk/nxp/clk-lpc32xx.c

565

val |= (clk->n_div - 1) << 9;

drivers/clk/nxp/clk-lpc32xx.c

566

val |= (clk->p_div - 1) << 11;

drivers/clk/nxp/clk-lpc32xx.c

567

new_rate = (parent_rate * clk->m_div) /

drivers/clk/nxp/clk-lpc32xx.c

568

(clk->n_div * (1 << clk->p_div));

drivers/clk/nxp/clk-lpc32xx.c

578

return regmap_update_bits(clk_regmap, clk->reg, 0x1FFFF, val);

drivers/clk/nxp/clk-lpc32xx.c

584

struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

622

clk->m_div = m;

drivers/clk/nxp/clk-lpc32xx.c

623

clk->n_div = n;

drivers/clk/nxp/clk-lpc32xx.c

624

clk->p_div = p;

drivers/clk/nxp/clk-lpc32xx.c

628

clk->mode = PLL_DIRECT;

drivers/clk/nxp/clk-lpc32xx.c

630

clk->mode = PLL_NON_INTEGER;

drivers/clk/nxp/clk-lpc32xx.c

649

struct lpc32xx_pll_clk *clk = to_lpc32xx_pll_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

686

clk->n_div = n_i;

drivers/clk/nxp/clk-lpc32xx.c

687

clk->m_div = m;

drivers/clk/nxp/clk-lpc32xx.c

688

clk->p_div = 2;

drivers/clk/nxp/clk-lpc32xx.c

689

clk->mode = PLL_NON_INTEGER;

drivers/clk/nxp/clk-lpc32xx.c

717

struct lpc32xx_clk *clk = to_lpc32xx_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

720

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

721

val &= clk->enable_mask | clk->busy_mask;

drivers/clk/nxp/clk-lpc32xx.c

729

struct lpc32xx_clk *clk = to_lpc32xx_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

732

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

733

hclk_div = val & clk->busy_mask;

drivers/clk/nxp/clk-lpc32xx.c

743

return regmap_update_bits(clk_regmap, clk->reg,

drivers/clk/nxp/clk-lpc32xx.c

744

clk->enable_mask, hclk_div << 7);

drivers/clk/nxp/clk-lpc32xx.c

750

struct lpc32xx_clk *clk = to_lpc32xx_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

756

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

757

val &= clk->enable_mask;

drivers/clk/nxp/clk-lpc32xx.c

772

struct lpc32xx_clk *clk = to_lpc32xx_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

775

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

801

struct lpc32xx_usb_clk *clk = to_lpc32xx_usb_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

804

pr_debug("%s: 0x%x\n", clk_hw_get_name(hw), clk->enable);

drivers/clk/nxp/clk-lpc32xx.c

806

if (clk->ctrl_mask) {

drivers/clk/nxp/clk-lpc32xx.c

809

clk->ctrl_mask, clk->ctrl_enable);

drivers/clk/nxp/clk-lpc32xx.c

812

val = lpc32xx_usb_clk_read(clk);

drivers/clk/nxp/clk-lpc32xx.c

813

if (clk->busy && (val & clk->busy) == clk->busy) {

drivers/clk/nxp/clk-lpc32xx.c

814

if (clk->ctrl_mask)

drivers/clk/nxp/clk-lpc32xx.c

820

val |= clk->enable;

drivers/clk/nxp/clk-lpc32xx.c

821

lpc32xx_usb_clk_write(clk, val);

drivers/clk/nxp/clk-lpc32xx.c

824

val = lpc32xx_usb_clk_read(clk);

drivers/clk/nxp/clk-lpc32xx.c

825

if ((val & clk->enable) == clk->enable)

drivers/clk/nxp/clk-lpc32xx.c

829

if ((val & clk->enable) == clk->enable)

drivers/clk/nxp/clk-lpc32xx.c

832

if (clk->ctrl_mask)

drivers/clk/nxp/clk-lpc32xx.c

840

struct lpc32xx_usb_clk *clk = to_lpc32xx_usb_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

841

u32 val = lpc32xx_usb_clk_read(clk);

drivers/clk/nxp/clk-lpc32xx.c

843

val &= ~clk->enable;

drivers/clk/nxp/clk-lpc32xx.c

844

lpc32xx_usb_clk_write(clk, val);

drivers/clk/nxp/clk-lpc32xx.c

846

if (clk->ctrl_mask)

drivers/clk/nxp/clk-lpc32xx.c

848

clk->ctrl_mask, clk->ctrl_disable);

drivers/clk/nxp/clk-lpc32xx.c

853

struct lpc32xx_usb_clk *clk = to_lpc32xx_usb_clk(hw);

drivers/clk/nxp/clk-lpc32xx.c

856

if (clk->ctrl_mask) {

drivers/clk/nxp/clk-lpc32xx.c

858

if ((ctrl_val & clk->ctrl_mask) != clk->ctrl_enable)

drivers/clk/nxp/clk-lpc32xx.c

862

val = lpc32xx_usb_clk_read(clk);

drivers/clk/nxp/clk-lpc32xx.c

864

return ((val & clk->enable) == clk->enable);

drivers/clk/nxp/clk-lpc32xx.c

870

return clk_get_rate(clk[LPC32XX_CLK_PERIPH]);

drivers/clk/nxp/clk-lpc32xx.c

888

struct lpc32xx_clk_gate *clk = to_lpc32xx_gate(hw);

drivers/clk/nxp/clk-lpc32xx.c

889

u32 mask = BIT(clk->bit_idx);

drivers/clk/nxp/clk-lpc32xx.c

890

u32 val = (clk->flags & CLK_GATE_SET_TO_DISABLE ? 0x0 : mask);

drivers/clk/nxp/clk-lpc32xx.c

892

return regmap_update_bits(clk_regmap, clk->reg, mask, val);

drivers/clk/nxp/clk-lpc32xx.c

897

struct lpc32xx_clk_gate *clk = to_lpc32xx_gate(hw);

drivers/clk/nxp/clk-lpc32xx.c

898

u32 mask = BIT(clk->bit_idx);

drivers/clk/nxp/clk-lpc32xx.c

899

u32 val = (clk->flags & CLK_GATE_SET_TO_DISABLE ? mask : 0x0);

drivers/clk/nxp/clk-lpc32xx.c

901

regmap_update_bits(clk_regmap, clk->reg, mask, val);

drivers/clk/nxp/clk-lpc32xx.c

906

struct lpc32xx_clk_gate *clk = to_lpc32xx_gate(hw);

drivers/clk/nxp/clk-lpc32xx.c

910

regmap_read(clk_regmap, clk->reg, &val);

drivers/clk/nxp/clk-lpc32xx.c

911

is_set = val & BIT(clk->bit_idx);

drivers/clk/nxp/clk-lpc32xx.c

913

return (clk->flags & CLK_GATE_SET_TO_DISABLE ? !is_set : is_set);

drivers/clk/pistachio/clk-pistachio.c

173

struct clk *debug_clk;

drivers/clk/pistachio/clk-pll.c

450

static struct clk *pll_register(const char *name, const char *parent_name,

drivers/clk/pistachio/clk-pll.c

458

struct clk *clk;

drivers/clk/pistachio/clk-pll.c

493

clk = clk_register(NULL, &pll->hw);

drivers/clk/pistachio/clk-pll.c

494

if (IS_ERR(clk))

drivers/clk/pistachio/clk-pll.c

497

return clk;

drivers/clk/pistachio/clk-pll.c

504

struct clk *clk;

drivers/clk/pistachio/clk-pll.c

508

clk = pll_register(pll[i].name, pll[i].parent,

drivers/clk/pistachio/clk-pll.c

512

p->clk_data.clks[pll[i].id] = clk;

drivers/clk/pistachio/clk.c

103

p->clk_data.clks[div[i].id] = clk;

drivers/clk/pistachio/clk.c

111

struct clk *clk;

drivers/clk/pistachio/clk.c

115

clk = clk_register_fixed_factor(NULL, ff[i].name, ff[i].parent,

drivers/clk/pistachio/clk.c

117

p->clk_data.clks[ff[i].id] = clk;

drivers/clk/pistachio/clk.c

128

struct clk *clk = p->clk_data.clks[clk_ids[i]];

drivers/clk/pistachio/clk.c

130

if (IS_ERR(clk))

drivers/clk/pistachio/clk.c

133

err = clk_prepare_enable(clk);

drivers/clk/pistachio/clk.c

136

__clk_get_name(clk), err);

drivers/clk/pistachio/clk.c

24

p->clk_data.clks = kzalloc_objs(struct clk *, num_clks);

drivers/clk/pistachio/clk.c

61

struct clk *clk;

drivers/clk/pistachio/clk.c

65

clk = clk_register_gate(NULL, gate[i].name, gate[i].parent,

drivers/clk/pistachio/clk.c

69

p->clk_data.clks[gate[i].id] = clk;

drivers/clk/pistachio/clk.c

77

struct clk *clk;

drivers/clk/pistachio/clk.c

81

clk = clk_register_mux(NULL, mux[i].name, mux[i].parents,

drivers/clk/pistachio/clk.c

87

p->clk_data.clks[mux[i].id] = clk;

drivers/clk/pistachio/clk.c

95

struct clk *clk;

drivers/clk/pistachio/clk.c

99

clk = clk_register_divider(NULL, div[i].name, div[i].parent,

drivers/clk/pxa/clk-pxa.c

104

struct clk *clk;

drivers/clk/pxa/clk-pxa.c

116

clk = clk_register_composite(NULL, clks[i].name,

drivers/clk/pxa/clk-pxa.c

123

clks[i].dev_id, clk);

drivers/clk/pxa/clk-pxa.c

41

static struct clk *pxa_clocks[CLK_MAX];

drivers/clk/pxa/clk-pxa.c

91

const char *dev_id, struct clk *clk)

drivers/clk/pxa/clk-pxa.c

93

if (!IS_ERR(clk) && (ckid != CLK_NONE))

drivers/clk/pxa/clk-pxa.c

94

pxa_clocks[ckid] = clk;

drivers/clk/pxa/clk-pxa.c

95

if (!IS_ERR(clk))

drivers/clk/pxa/clk-pxa.c

96

clk_register_clkdev(clk, con_id, dev_id);

drivers/clk/pxa/clk-pxa.h

150

const char *dev_id, struct clk *clk);

drivers/clk/pxa/clk-pxa.h

29

static struct clk * __init clk_register_ ## name(void) \

drivers/clk/pxa/clk-pxa.h

44

static struct clk * __init clk_register_ ## name(void) \

drivers/clk/pxa/clk-pxa.h

61

static struct clk * __init clk_register_ ## name(void) \

drivers/clk/pxa/clk-pxa.h

78

static struct clk * __init clk_register_ ## name(void) \

drivers/clk/pxa/clk-pxa25x.c

309

struct clk *clk;

drivers/clk/pxa/clk-pxa25x.c

322

clk = clk_register_fixed_factor(NULL, name, d->parent, 0, 1, 1);

drivers/clk/pxa/clk-pxa25x.c

323

clk_register_clkdev(clk, d->con_id, d->dev_id);

drivers/clk/pxa/clk-pxa25x.c

74

struct clk *clk;

drivers/clk/pxa/clk-pxa25x.c

79

clk = clk_get(NULL, get_freq_khz[i]);

drivers/clk/pxa/clk-pxa25x.c

80

if (IS_ERR(clk)) {

drivers/clk/pxa/clk-pxa25x.c

83

clks[i] = clk_get_rate(clk);

drivers/clk/pxa/clk-pxa25x.c

84

clk_put(clk);

drivers/clk/pxa/clk-pxa27x.c

447

struct clk *clk;

drivers/clk/pxa/clk-pxa27x.c

455

clk = clk_register_fixed_factor(NULL, name, d->parent, 0, 1, 1);

drivers/clk/pxa/clk-pxa27x.c

456

clk_register_clkdev(clk, d->con_id, d->dev_id);

drivers/clk/pxa/clk-pxa27x.c

77

struct clk *clk;

drivers/clk/pxa/clk-pxa27x.c

82

clk = clk_get(NULL, get_freq_khz[i]);

drivers/clk/pxa/clk-pxa27x.c

83

if (IS_ERR(clk)) {

drivers/clk/pxa/clk-pxa27x.c

86

clks[i] = clk_get_rate(clk);

drivers/clk/pxa/clk-pxa27x.c

87

clk_put(clk);

drivers/clk/pxa/clk-pxa3xx.c

134

struct clk *clk;

drivers/clk/pxa/clk-pxa3xx.c

139

clk = clk_get(NULL, get_freq_khz[i]);

drivers/clk/pxa/clk-pxa3xx.c

140

if (IS_ERR(clk)) {

drivers/clk/pxa/clk-pxa3xx.c

143

clks[i] = clk_get_rate(clk);

drivers/clk/pxa/clk-pxa3xx.c

144

clk_put(clk);

drivers/clk/pxa/clk-pxa3xx.c

409

struct clk *clk;

drivers/clk/pxa/clk-pxa3xx.c

417

clk = clk_register_fixed_factor(NULL, name, d->parent, 0, 1, 1);

drivers/clk/pxa/clk-pxa3xx.c

418

clk_register_clkdev(clk, d->con_id, d->dev_id);

drivers/clk/pxa/clk-pxa3xx.c

424

struct clk *clk;

drivers/clk/pxa/clk-pxa3xx.c

431

clk = clk_register_gate(NULL, "CLK_POUT",

drivers/clk/pxa/clk-pxa3xx.c

433

clk_register_clkdev(clk, "CLK_POUT", NULL);

drivers/clk/qcom/a53-pll.c

43

struct clk *xo_clk;

drivers/clk/qcom/apss-ipq6018.c

143

ret = devm_clk_notifier_register(&pdev->dev, hw->clk, cpu_clk_notifier);

drivers/clk/qcom/clk-branch.h

100

static inline void qcom_branch_set_sleep(struct regmap *regmap, struct clk_branch clk, u32 val)

drivers/clk/qcom/clk-branch.h

102

regmap_update_bits(regmap, clk.halt_reg, CBCR_SLEEP,

drivers/clk/qcom/clk-branch.h

74

struct clk_branch clk, bool on)

drivers/clk/qcom/clk-branch.h

76

regmap_update_bits(regmap, clk.halt_reg, CBCR_FORCE_MEM_CORE_ON,

drivers/clk/qcom/clk-branch.h

81

struct clk_branch clk, bool on)

drivers/clk/qcom/clk-branch.h

83

regmap_update_bits(regmap, clk.halt_reg, CBCR_FORCE_MEM_PERIPH_ON,

drivers/clk/qcom/clk-branch.h

88

struct clk_branch clk, bool on)

drivers/clk/qcom/clk-branch.h

90

regmap_update_bits(regmap, clk.halt_reg, CBCR_FORCE_MEM_PERIPH_OFF,

drivers/clk/qcom/clk-branch.h

94

static inline void qcom_branch_set_wakeup(struct regmap *regmap, struct clk_branch clk, u32 val)

drivers/clk/qcom/clk-branch.h

96

regmap_update_bits(regmap, clk.halt_reg, CBCR_WAKEUP,

drivers/clk/qcom/clk-cbf-8996.c

226

struct clk *clk = devm_clk_hw_get_clk(dev, cbf_hw, "cbf");

drivers/clk/qcom/clk-cbf-8996.c

229

.clk = clk,

drivers/clk/qcom/clk-cbf-8996.c

323

ret = devm_clk_notifier_register(dev, cbf_mux.clkr.hw.clk, &cbf_mux.nb);

drivers/clk/qcom/clk-cpu-8996.c

497

clk_prepare_enable(pwrcl_alt_pll.clkr.hw.clk);

drivers/clk/qcom/clk-cpu-8996.c

498

clk_prepare_enable(perfcl_alt_pll.clkr.hw.clk);

drivers/clk/qcom/clk-cpu-8996.c

500

devm_clk_notifier_register(dev, pwrcl_pmux.clkr.hw.clk, &pwrcl_pmux.nb);

drivers/clk/qcom/clk-cpu-8996.c

501

devm_clk_notifier_register(dev, perfcl_pmux.clkr.hw.clk, &perfcl_pmux.nb);

drivers/clk/qcom/clk-hfpll.c

169

enabled = __clk_is_enabled(hw->clk);

drivers/clk/qcom/clk-hfpll.c

223

__clk_get_name(hw->clk));

drivers/clk/qcom/clk-krait.c

71

if (__clk_is_enabled(hw->clk))

drivers/clk/qcom/clk-rcg.c

211

enabled = __clk_is_enabled(hw->clk);

drivers/clk/qcom/clk-rcg.c

774

if (__clk_is_enabled(hw->clk))

drivers/clk/qcom/clk-rcg2.c

492

parent_rate = clk_get_rate(parent->clk);

drivers/clk/qcom/clk-regmap-mux-div.h

37

struct clk *pclk;

drivers/clk/qcom/clk-spmi-pmic-div.c

202

struct clk *cxo;

drivers/clk/qcom/common.c

279

icd[i].clk = devm_clk_hw_get_clk(dev, hws, "icc");

drivers/clk/qcom/common.c

280

if (IS_ERR(icd[i].clk))

drivers/clk/qcom/common.c

281

return dev_err_probe(dev, PTR_ERR(icd[i].clk),

drivers/clk/qcom/gcc-ipq4019.c

1745

return devm_clk_notifier_register(&pdev->dev, apps_clk_src.clkr.hw.clk,

drivers/clk/qcom/krait-cc.c

112

clk = ERR_PTR(-ENOMEM);

drivers/clk/qcom/krait-cc.c

121

clk = ERR_PTR(ret);

drivers/clk/qcom/krait-cc.c

125

clk = &div->hw;

drivers/clk/qcom/krait-cc.c

130

clk_prepare_enable(div->hw.clk);

drivers/clk/qcom/krait-cc.c

132

clk_prepare_enable(div->hw.clk);

drivers/clk/qcom/krait-cc.c

139

return clk;

drivers/clk/qcom/krait-cc.c

158

struct clk_hw *clk;

drivers/clk/qcom/krait-cc.c

188

clk = ERR_PTR(-ENOMEM);

drivers/clk/qcom/krait-cc.c

199

clk = ERR_PTR(ret);

drivers/clk/qcom/krait-cc.c

203

clk = &mux->hw;

drivers/clk/qcom/krait-cc.c

205

ret = krait_notifier_register(dev, mux->hw.clk, mux);

drivers/clk/qcom/krait-cc.c

207

clk = ERR_PTR(ret);

drivers/clk/qcom/krait-cc.c

214

clk_prepare_enable(mux->hw.clk);

drivers/clk/qcom/krait-cc.c

216

clk_prepare_enable(mux->hw.clk);

drivers/clk/qcom/krait-cc.c

223

return clk;

drivers/clk/qcom/krait-cc.c

239

struct clk_hw *clk;

drivers/clk/qcom/krait-cc.c

260

clk = ERR_PTR(-ENOMEM);

drivers/clk/qcom/krait-cc.c

272

clk = ERR_PTR(ret);

drivers/clk/qcom/krait-cc.c

276

clk = &mux->hw;

drivers/clk/qcom/krait-cc.c

278

ret = krait_notifier_register(dev, mux->hw.clk, mux);

drivers/clk/qcom/krait-cc.c

280

clk = ERR_PTR(ret);

drivers/clk/qcom/krait-cc.c

286

return clk;

drivers/clk/qcom/krait-cc.c

326

static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data)

drivers/clk/qcom/krait-cc.c

329

struct clk **clks = data;

drivers/clk/qcom/krait-cc.c

352

struct clk *clk, **clks;

drivers/clk/qcom/krait-cc.c

356

clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);

drivers/clk/qcom/krait-cc.c

357

if (IS_ERR(clk))

drivers/clk/qcom/krait-cc.c

358

return PTR_ERR(clk);

drivers/clk/qcom/krait-cc.c

361

clk = clk_register_fixed_factor(dev, "acpu_aux",

drivers/clk/qcom/krait-cc.c

363

if (IS_ERR(clk))

drivers/clk/qcom/krait-cc.c

364

return PTR_ERR(clk);

drivers/clk/qcom/krait-cc.c

376

clks[cpu] = mux->clk;

drivers/clk/qcom/krait-cc.c

382

clks[l2_mux] = l2_pri_mux->clk;

drivers/clk/qcom/krait-cc.c

419

clk = clks[cpu];

drivers/clk/qcom/krait-cc.c

420

cur_rate = clk_get_rate(clk);

drivers/clk/qcom/krait-cc.c

426

clk_set_rate(clk, aux_rate);

drivers/clk/qcom/krait-cc.c

427

clk_set_rate(clk, 2);

drivers/clk/qcom/krait-cc.c

428

clk_set_rate(clk, cur_rate);

drivers/clk/qcom/krait-cc.c

429

pr_info("CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000);

drivers/clk/qcom/krait-cc.c

68

static int krait_notifier_register(struct device *dev, struct clk *clk,

drivers/clk/qcom/krait-cc.c

74

ret = devm_clk_notifier_register(dev, clk, &mux->clk_nb);

drivers/clk/qcom/krait-cc.c

91

struct clk_hw *clk;

drivers/clk/qcom/lpass-gfm-sm8250.c

40

struct clk_gfm *clk = to_clk_gfm(hw);

drivers/clk/qcom/lpass-gfm-sm8250.c

42

return readl(clk->gfm_mux) & clk->mux_mask;

drivers/clk/qcom/lpass-gfm-sm8250.c

47

struct clk_gfm *clk = to_clk_gfm(hw);

drivers/clk/qcom/lpass-gfm-sm8250.c

50

val = readl(clk->gfm_mux);

drivers/clk/qcom/lpass-gfm-sm8250.c

53

val |= clk->mux_mask;

drivers/clk/qcom/lpass-gfm-sm8250.c

55

val &= ~clk->mux_mask;

drivers/clk/qcom/lpass-gfm-sm8250.c

58

writel(val, clk->gfm_mux);

drivers/clk/qcom/mmcc-msm8960.c

579

ret = clk_prepare_enable(p->clk);

drivers/clk/qcom/mmcc-msm8960.c

609

clk_disable_unprepare(p->clk);

drivers/clk/qcom/nsscc-qca8k.c

2171

struct clk *clk;

drivers/clk/qcom/nsscc-qca8k.c

2173

clk = devm_clk_get_enabled(dev, NULL);

drivers/clk/qcom/nsscc-qca8k.c

2174

if (IS_ERR(clk))

drivers/clk/qcom/nsscc-qca8k.c

2175

return PTR_ERR(clk);

drivers/clk/ralink/clk-mt7621.c

239

struct mt7621_clk *clk = to_mt7621_clk(hw);

drivers/clk/ralink/clk-mt7621.c

240

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mt7621.c

258

struct mt7621_clk *clk = to_mt7621_clk(hw);

drivers/clk/ralink/clk-mt7621.c

259

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mt7621.c

260

struct regmap *memc = clk->priv->memc;

drivers/clk/ralink/clk-mtmips.c

394

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

395

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

408

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

409

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

439

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

440

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

459

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

460

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

479

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

480

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

503

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

504

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

529

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

530

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

565

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

566

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

605

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

606

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

629

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

630

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

653

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

654

struct regmap *sysc = clk->priv->sysc;

drivers/clk/ralink/clk-mtmips.c

667

struct mtmips_clk *clk = to_mtmips_clk(hw);

drivers/clk/ralink/clk-mtmips.c

668

struct regmap *sysc = clk->priv->sysc;

drivers/clk/renesas/clk-div6.c

224

if (__clk_get_enable_count(clock->hw.clk))

drivers/clk/renesas/clk-div6.c

242

struct clk * __init cpg_div6_register(const char *name,

drivers/clk/renesas/clk-div6.c

251

struct clk *clk;

drivers/clk/renesas/clk-div6.c

282

clk = ERR_PTR(-EINVAL);

drivers/clk/renesas/clk-div6.c

303

clk = clk_register(NULL, &clock->hw);

drivers/clk/renesas/clk-div6.c

304

if (IS_ERR(clk))

drivers/clk/renesas/clk-div6.c

312

return clk;

drivers/clk/renesas/clk-div6.c

316

return clk;

drivers/clk/renesas/clk-div6.c

325

struct clk *clk;

drivers/clk/renesas/clk-div6.c

353

clk = cpg_div6_register(clk_name, num_parents, parent_names, reg, NULL);

drivers/clk/renesas/clk-div6.c

354

if (IS_ERR(clk)) {

drivers/clk/renesas/clk-div6.c

356

__func__, np, PTR_ERR(clk));

drivers/clk/renesas/clk-div6.c

360

of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/renesas/clk-div6.h

5

struct clk *cpg_div6_register(const char *name, unsigned int num_parents,

drivers/clk/renesas/clk-emev2.c

67

struct clk *clk;

drivers/clk/renesas/clk-emev2.c

73

clk = clk_register_divider(NULL, np->name, parent_name, 0,

drivers/clk/renesas/clk-emev2.c

75

of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/renesas/clk-emev2.c

76

pr_debug("## %s %pOFn %p\n", __func__, np, clk);

drivers/clk/renesas/clk-emev2.c

84

struct clk *clk;

drivers/clk/renesas/clk-emev2.c

90

clk = clk_register_gate(NULL, np->name, parent_name, 0,

drivers/clk/renesas/clk-emev2.c

92

of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/renesas/clk-emev2.c

93

pr_debug("## %s %pOFn %p\n", __func__, np, clk);

drivers/clk/renesas/clk-mstp.c

145

static struct clk * __init cpg_mstp_clock_register(const char *name,

drivers/clk/renesas/clk-mstp.c

151

struct clk *clk;

drivers/clk/renesas/clk-mstp.c

172

clk = clk_register(NULL, &clock->hw);

drivers/clk/renesas/clk-mstp.c

174

if (IS_ERR(clk))

drivers/clk/renesas/clk-mstp.c

177

return clk;

drivers/clk/renesas/clk-mstp.c

184

struct clk **clks;

drivers/clk/renesas/clk-mstp.c

256

struct clk *clk;

drivers/clk/renesas/clk-mstp.c

277

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/renesas/clk-mstp.c

280

if (IS_ERR(clk))

drivers/clk/renesas/clk-mstp.c

281

return PTR_ERR(clk);

drivers/clk/renesas/clk-mstp.c

287

error = pm_clk_add_clk(dev, clk);

drivers/clk/renesas/clk-mstp.c

296

clk_put(clk);

drivers/clk/renesas/clk-mstp.c

47

struct clk *clks[];

drivers/clk/renesas/clk-r8a73a4.c

189

struct clk **clks;

drivers/clk/renesas/clk-r8a73a4.c

219

struct clk *clk;

drivers/clk/renesas/clk-r8a73a4.c

224

clk = r8a73a4_cpg_register_clock(np, cpg, base, name);

drivers/clk/renesas/clk-r8a73a4.c

225

if (IS_ERR(clk))

drivers/clk/renesas/clk-r8a73a4.c

227

__func__, np, name, PTR_ERR(clk));

drivers/clk/renesas/clk-r8a73a4.c

229

cpg->data.clks[i] = clk;

drivers/clk/renesas/clk-r8a73a4.c

57

static struct clk * __init

drivers/clk/renesas/clk-r8a7740.c

145

struct clk **clks;

drivers/clk/renesas/clk-r8a7740.c

178

struct clk *clk;

drivers/clk/renesas/clk-r8a7740.c

183

clk = r8a7740_cpg_register_clock(np, cpg, base, name);

drivers/clk/renesas/clk-r8a7740.c

184

if (IS_ERR(clk))

drivers/clk/renesas/clk-r8a7740.c

186

__func__, np, name, PTR_ERR(clk));

drivers/clk/renesas/clk-r8a7740.c

188

cpg->data.clks[i] = clk;

drivers/clk/renesas/clk-r8a7740.c

58

static struct clk * __init

drivers/clk/renesas/clk-r8a7778.c

109

struct clk *clk;

drivers/clk/renesas/clk-r8a7778.c

114

clk = r8a7778_cpg_register_clock(np, name);

drivers/clk/renesas/clk-r8a7778.c

115

if (IS_ERR(clk))

drivers/clk/renesas/clk-r8a7778.c

117

__func__, np, name, PTR_ERR(clk));

drivers/clk/renesas/clk-r8a7778.c

119

data->clks[i] = clk;

drivers/clk/renesas/clk-r8a7778.c

43

static struct clk * __init

drivers/clk/renesas/clk-r8a7778.c

73

struct clk **clks;

drivers/clk/renesas/clk-r8a7779.c

117

struct clk **clks;

drivers/clk/renesas/clk-r8a7779.c

148

struct clk *clk;

drivers/clk/renesas/clk-r8a7779.c

153

clk = r8a7779_cpg_register_clock(np, config, plla_mult, name);

drivers/clk/renesas/clk-r8a7779.c

154

if (IS_ERR(clk))

drivers/clk/renesas/clk-r8a7779.c

156

__func__, np, name, PTR_ERR(clk));

drivers/clk/renesas/clk-r8a7779.c

158

data->clks[i] = clk;

drivers/clk/renesas/clk-r8a7779.c

83

static struct clk * __init

drivers/clk/renesas/clk-rz.c

105

struct clk *clk;

drivers/clk/renesas/clk-rz.c

109

clk = rz_cpg_register_clock(np, base, name);

drivers/clk/renesas/clk-rz.c

110

if (IS_ERR(clk))

drivers/clk/renesas/clk-rz.c

112

__func__, np, name, PTR_ERR(clk));

drivers/clk/renesas/clk-rz.c

114

data->clks[i] = clk;

drivers/clk/renesas/clk-rz.c

46

static struct clk * __init

drivers/clk/renesas/clk-rz.c

85

struct clk **clks;

drivers/clk/renesas/clk-sh73a0.c

163

struct clk **clks;

drivers/clk/renesas/clk-sh73a0.c

198

struct clk *clk;

drivers/clk/renesas/clk-sh73a0.c

203

clk = sh73a0_cpg_register_clock(np, cpg, base, name);

drivers/clk/renesas/clk-sh73a0.c

204

if (IS_ERR(clk))

drivers/clk/renesas/clk-sh73a0.c

206

__func__, np, name, PTR_ERR(clk));

drivers/clk/renesas/clk-sh73a0.c

208

cpg->data.clks[i] = clk;

drivers/clk/renesas/clk-sh73a0.c

71

static struct clk * __init

drivers/clk/renesas/r7s9210-cpg-mssr.c

113

static void __init r7s9210_update_clk_table(struct clk *extal_clk,

drivers/clk/renesas/r7s9210-cpg-mssr.c

160

static struct clk * __init rza2_cpg_clk_register(struct device *dev,

drivers/clk/renesas/r7s9210-cpg-mssr.c

165

struct clk **clks = pub->clks;

drivers/clk/renesas/r7s9210-cpg-mssr.c

168

struct clk *parent;

drivers/clk/renesas/r8a77970-cpg-mssr.c

220

static struct clk * __init r8a77970_cpg_clk_register(struct device *dev,

drivers/clk/renesas/r8a77970-cpg-mssr.c

226

struct clk **clks = pub->clks;

drivers/clk/renesas/r8a77970-cpg-mssr.c

227

const struct clk *parent;

drivers/clk/renesas/r9a06g032-clocks.c

1001

clk->min, DIV_ROUND_UP(req->best_parent_rate, clk->min),

drivers/clk/renesas/r9a06g032-clocks.c

1002

clk->max, DIV_ROUND_UP(req->best_parent_rate, clk->max));

drivers/clk/renesas/r9a06g032-clocks.c

1004

div = r9a06g032_div_clamp_div(clk, req->rate, req->best_parent_rate);

drivers/clk/renesas/r9a06g032-clocks.c

1014

if (clk->index == R9A06G032_DIV_UART ||

drivers/clk/renesas/r9a06g032-clocks.c

1015

clk->index == R9A06G032_DIV_P2_PG) {

drivers/clk/renesas/r9a06g032-clocks.c

1017

req->rate = clk_get_rate(hw->clk);

drivers/clk/renesas/r9a06g032-clocks.c

1021

pr_devel("%s %pC %ld / %u = %ld\n", __func__, hw->clk,

drivers/clk/renesas/r9a06g032-clocks.c

1030

struct r9a06g032_clk_div *clk = to_r9a06g032_div(hw);

drivers/clk/renesas/r9a06g032-clocks.c

1033

u32 __iomem *reg = clk->clocks->reg + (4 * clk->reg);

drivers/clk/renesas/r9a06g032-clocks.c

1035

pr_devel("%s %pC rate %ld parent %ld div %d\n", __func__, hw->clk,

drivers/clk/renesas/r9a06g032-clocks.c

1056

static struct clk *

drivers/clk/renesas/r9a06g032-clocks.c

1062

struct clk *clk;

drivers/clk/renesas/r9a06g032-clocks.c

1088

clk = clk_register(NULL, &div->hw);

drivers/clk/renesas/r9a06g032-clocks.c

1089

if (IS_ERR(clk)) {

drivers/clk/renesas/r9a06g032-clocks.c

1093

return clk;

drivers/clk/renesas/r9a06g032-clocks.c

1141

static struct clk *

drivers/clk/renesas/r9a06g032-clocks.c

1146

struct clk *clk;

drivers/clk/renesas/r9a06g032-clocks.c

1170

clk = clk_register(NULL, &g->hw);

drivers/clk/renesas/r9a06g032-clocks.c

1171

if (IS_ERR(clk)) {

drivers/clk/renesas/r9a06g032-clocks.c

1175

return clk;

drivers/clk/renesas/r9a06g032-clocks.c

1231

static struct clk *

drivers/clk/renesas/r9a06g032-clocks.c

1238

struct clk *clk;

drivers/clk/renesas/r9a06g032-clocks.c

1269

clk = clk_register(NULL, &g->hw);

drivers/clk/renesas/r9a06g032-clocks.c

1270

if (IS_ERR(clk)) {

drivers/clk/renesas/r9a06g032-clocks.c

1274

return clk;

drivers/clk/renesas/r9a06g032-clocks.c

1315

struct clk **clks;

drivers/clk/renesas/r9a06g032-clocks.c

1316

struct clk *mclk;

drivers/clk/renesas/r9a06g032-clocks.c

1322

clks = devm_kcalloc(dev, R9A06G032_CLOCK_COUNT, sizeof(struct clk *),

drivers/clk/renesas/r9a06g032-clocks.c

1359

struct clk *clk = NULL;

drivers/clk/renesas/r9a06g032-clocks.c

1363

clk = clk_register_fixed_factor(NULL, d->name,

drivers/clk/renesas/r9a06g032-clocks.c

1369

clk = r9a06g032_register_gate(clocks, parent_name, d);

drivers/clk/renesas/r9a06g032-clocks.c

1372

clk = r9a06g032_register_div(clocks, parent_name, d);

drivers/clk/renesas/r9a06g032-clocks.c

1377

clk = r9a06g032_register_bitsel(clocks, parent_name, d);

drivers/clk/renesas/r9a06g032-clocks.c

1380

clk = r9a06g032_register_dualgate(clocks, parent_name,

drivers/clk/renesas/r9a06g032-clocks.c

1385

clocks->data.clks[d->index] = clk;

drivers/clk/renesas/r9a06g032-clocks.c

748

struct clk *clk;

drivers/clk/renesas/r9a06g032-clocks.c

751

clk = of_clk_get_from_provider(clkspec);

drivers/clk/renesas/r9a06g032-clocks.c

752

if (IS_ERR(clk))

drivers/clk/renesas/r9a06g032-clocks.c

753

return PTR_ERR(clk);

drivers/clk/renesas/r9a06g032-clocks.c

757

clk_put(clk);

drivers/clk/renesas/r9a06g032-clocks.c

761

error = pm_clk_add_clk(dev, clk);

drivers/clk/renesas/r9a06g032-clocks.c

764

clk_put(clk);

drivers/clk/renesas/r9a06g032-clocks.c

885

static struct clk *

drivers/clk/renesas/r9a06g032-clocks.c

890

struct clk *clk;

drivers/clk/renesas/r9a06g032-clocks.c

919

clk = clk_register(NULL, &g->hw);

drivers/clk/renesas/r9a06g032-clocks.c

920

if (IS_ERR(clk)) {

drivers/clk/renesas/r9a06g032-clocks.c

924

return clk;

drivers/clk/renesas/r9a06g032-clocks.c

944

struct r9a06g032_clk_div *clk = to_r9a06g032_div(hw);

drivers/clk/renesas/r9a06g032-clocks.c

945

u32 __iomem *reg = clk->clocks->reg + (4 * clk->reg);

drivers/clk/renesas/r9a06g032-clocks.c

948

if (div < clk->min)

drivers/clk/renesas/r9a06g032-clocks.c

949

div = clk->min;

drivers/clk/renesas/r9a06g032-clocks.c

950

else if (div > clk->max)

drivers/clk/renesas/r9a06g032-clocks.c

951

div = clk->max;

drivers/clk/renesas/r9a06g032-clocks.c

962

r9a06g032_div_clamp_div(struct r9a06g032_clk_div *clk,

drivers/clk/renesas/r9a06g032-clocks.c

969

if (div <= clk->min)

drivers/clk/renesas/r9a06g032-clocks.c

970

return clk->min;

drivers/clk/renesas/r9a06g032-clocks.c

971

if (div >= clk->max)

drivers/clk/renesas/r9a06g032-clocks.c

972

return clk->max;

drivers/clk/renesas/r9a06g032-clocks.c

974

for (i = 0; clk->table_size && i < clk->table_size - 1; i++) {

drivers/clk/renesas/r9a06g032-clocks.c

975

if (div >= clk->table[i] && div <= clk->table[i + 1]) {

drivers/clk/renesas/r9a06g032-clocks.c

977

DIV_ROUND_UP(prate, clk->table[i]);

drivers/clk/renesas/r9a06g032-clocks.c

979

DIV_ROUND_UP(prate, clk->table[i + 1]) -

drivers/clk/renesas/r9a06g032-clocks.c

985

div = p >= m ? clk->table[i] : clk->table[i + 1];

drivers/clk/renesas/r9a06g032-clocks.c

995

struct r9a06g032_clk_div *clk = to_r9a06g032_div(hw);

drivers/clk/renesas/r9a06g032-clocks.c

999

hw->clk, req->rate, req->best_parent_rate, div);

drivers/clk/renesas/r9a09g077-cpg.c

278

static struct clk * __init

drivers/clk/renesas/r9a09g077-cpg.c

283

const struct clk *parent;

drivers/clk/renesas/r9a09g077-cpg.c

315

return clk_hw->clk;

drivers/clk/renesas/r9a09g077-cpg.c

318

static struct clk * __init

drivers/clk/renesas/r9a09g077-cpg.c

335

return clk_hw->clk;

drivers/clk/renesas/r9a09g077-cpg.c

429

static struct clk * __init

drivers/clk/renesas/r9a09g077-cpg.c

437

const struct clk *parent;

drivers/clk/renesas/r9a09g077-cpg.c

480

return hw->clk;

drivers/clk/renesas/r9a09g077-cpg.c

483

static struct clk * __init

drivers/clk/renesas/rcar-cpg-lib.c

103

clk = clk_register_divider_table(NULL, name, parent_name, 0, sdnckcr,

drivers/clk/renesas/rcar-cpg-lib.c

106

if (IS_ERR(clk)) {

drivers/clk/renesas/rcar-cpg-lib.c

108

return clk;

drivers/clk/renesas/rcar-cpg-lib.c

112

return clk;

drivers/clk/renesas/rcar-cpg-lib.c

119

struct clk * __init cpg_sd_clk_register(const char *name,

drivers/clk/renesas/rcar-cpg-lib.c

140

struct clk * __init cpg_rpc_clk_register(const char *name,

drivers/clk/renesas/rcar-cpg-lib.c

145

struct clk *clk;

drivers/clk/renesas/rcar-cpg-lib.c

163

clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,

drivers/clk/renesas/rcar-cpg-lib.c

167

if (IS_ERR(clk)) {

drivers/clk/renesas/rcar-cpg-lib.c

169

return clk;

drivers/clk/renesas/rcar-cpg-lib.c

173

return clk;

drivers/clk/renesas/rcar-cpg-lib.c

181

struct clk * __init cpg_rpcd2_clk_register(const char *name,

drivers/clk/renesas/rcar-cpg-lib.c

186

struct clk *clk;

drivers/clk/renesas/rcar-cpg-lib.c

200

clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,

drivers/clk/renesas/rcar-cpg-lib.c

204

if (IS_ERR(clk))

drivers/clk/renesas/rcar-cpg-lib.c

207

return clk;

drivers/clk/renesas/rcar-cpg-lib.c

90

struct clk * __init cpg_sdh_clk_register(const char *name,

drivers/clk/renesas/rcar-cpg-lib.c

95

struct clk *clk;

drivers/clk/renesas/rcar-cpg-lib.h

29

struct clk * __init cpg_sdh_clk_register(const char *name,

drivers/clk/renesas/rcar-cpg-lib.h

33

struct clk * __init cpg_sd_clk_register(const char *name,

drivers/clk/renesas/rcar-cpg-lib.h

36

struct clk * __init cpg_rpc_clk_register(const char *name,

drivers/clk/renesas/rcar-cpg-lib.h

40

struct clk * __init cpg_rpcd2_clk_register(const char *name,

drivers/clk/renesas/rcar-gen2-cpg.c

136

static struct clk * __init cpg_z_clk_register(const char *name,

drivers/clk/renesas/rcar-gen2-cpg.c

142

struct clk *clk;

drivers/clk/renesas/rcar-gen2-cpg.c

157

clk = clk_register(NULL, &zclk->hw);

drivers/clk/renesas/rcar-gen2-cpg.c

158

if (IS_ERR(clk))

drivers/clk/renesas/rcar-gen2-cpg.c

161

return clk;

drivers/clk/renesas/rcar-gen2-cpg.c

164

static struct clk * __init cpg_rcan_clk_register(const char *name,

drivers/clk/renesas/rcar-gen2-cpg.c

170

struct clk *clk;

drivers/clk/renesas/rcar-gen2-cpg.c

190

clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,

drivers/clk/renesas/rcar-gen2-cpg.c

193

if (IS_ERR(clk)) {

drivers/clk/renesas/rcar-gen2-cpg.c

198

return clk;

drivers/clk/renesas/rcar-gen2-cpg.c

208

static struct clk * __init cpg_adsp_clk_register(const char *name,

drivers/clk/renesas/rcar-gen2-cpg.c

214

struct clk *clk;

drivers/clk/renesas/rcar-gen2-cpg.c

236

clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL,

drivers/clk/renesas/rcar-gen2-cpg.c

239

if (IS_ERR(clk)) {

drivers/clk/renesas/rcar-gen2-cpg.c

244

return clk;

drivers/clk/renesas/rcar-gen2-cpg.c

275

struct clk * __init rcar_gen2_cpg_clk_register(struct device *dev,

drivers/clk/renesas/rcar-gen2-cpg.c

281

struct clk **clks = pub->clks;

drivers/clk/renesas/rcar-gen2-cpg.c

282

const struct clk *parent;

drivers/clk/renesas/rcar-gen2-cpg.h

33

struct clk *rcar_gen2_cpg_clk_register(struct device *dev,

drivers/clk/renesas/rcar-gen3-cpg.c

114

static struct clk * __init cpg_pll_clk_register(const char *name,

drivers/clk/renesas/rcar-gen3-cpg.c

124

struct clk *clk;

drivers/clk/renesas/rcar-gen3-cpg.c

141

clk = clk_register(NULL, &pll_clk->hw);

drivers/clk/renesas/rcar-gen3-cpg.c

142

if (IS_ERR(clk))

drivers/clk/renesas/rcar-gen3-cpg.c

145

return clk;

drivers/clk/renesas/rcar-gen3-cpg.c

262

static struct clk * __init __cpg_z_clk_register(const char *name,

drivers/clk/renesas/rcar-gen3-cpg.c

272

struct clk *clk;

drivers/clk/renesas/rcar-gen3-cpg.c

290

clk = clk_register(NULL, &zclk->hw);

drivers/clk/renesas/rcar-gen3-cpg.c

291

if (IS_ERR(clk)) {

drivers/clk/renesas/rcar-gen3-cpg.c

293

return clk;

drivers/clk/renesas/rcar-gen3-cpg.c

298

return clk;

drivers/clk/renesas/rcar-gen3-cpg.c

301

static struct clk * __init cpg_z_clk_register(const char *name,

drivers/clk/renesas/rcar-gen3-cpg.c

311

static struct clk * __init cpg_zg_clk_register(const char *name,

drivers/clk/renesas/rcar-gen3-cpg.c

341

struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev,

drivers/clk/renesas/rcar-gen3-cpg.c

347

struct clk **clks = pub->clks;

drivers/clk/renesas/rcar-gen3-cpg.c

348

const struct clk *parent;

drivers/clk/renesas/rcar-gen3-cpg.h

82

struct clk *rcar_gen3_cpg_clk_register(struct device *dev,

drivers/clk/renesas/rcar-gen4-cpg.c

220

static struct clk * __init cpg_pll_clk_register(const char *name,

drivers/clk/renesas/rcar-gen4-cpg.c

235

struct clk *clk;

drivers/clk/renesas/rcar-gen4-cpg.c

252

clk = clk_register(NULL, &pll_clk->hw);

drivers/clk/renesas/rcar-gen4-cpg.c

253

if (IS_ERR(clk))

drivers/clk/renesas/rcar-gen4-cpg.c

256

return clk;

drivers/clk/renesas/rcar-gen4-cpg.c

367

static struct clk * __init cpg_z_clk_register(const char *name,

drivers/clk/renesas/rcar-gen4-cpg.c

375

struct clk *clk;

drivers/clk/renesas/rcar-gen4-cpg.c

403

clk = clk_register(NULL, &zclk->hw);

drivers/clk/renesas/rcar-gen4-cpg.c

404

if (IS_ERR(clk)) {

drivers/clk/renesas/rcar-gen4-cpg.c

406

return clk;

drivers/clk/renesas/rcar-gen4-cpg.c

411

return clk;

drivers/clk/renesas/rcar-gen4-cpg.c

421

struct clk * __init rcar_gen4_cpg_clk_register(struct device *dev,

drivers/clk/renesas/rcar-gen4-cpg.c

427

struct clk **clks = pub->clks;

drivers/clk/renesas/rcar-gen4-cpg.c

428

const struct clk *parent;

drivers/clk/renesas/rcar-gen4-cpg.h

79

struct clk *rcar_gen4_cpg_clk_register(struct device *dev,

drivers/clk/renesas/rcar-usb2-clock-sel.c

141

struct clk *clk;

drivers/clk/renesas/rcar-usb2-clock-sel.c

162

clk = devm_clk_get(dev, "usb_extal");

drivers/clk/renesas/rcar-usb2-clock-sel.c

163

if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {

drivers/clk/renesas/rcar-usb2-clock-sel.c

164

priv->extal = !!clk_get_rate(clk);

drivers/clk/renesas/rcar-usb2-clock-sel.c

165

clk_disable_unprepare(clk);

drivers/clk/renesas/rcar-usb2-clock-sel.c

167

clk = devm_clk_get(dev, "usb_xtal");

drivers/clk/renesas/rcar-usb2-clock-sel.c

168

if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {

drivers/clk/renesas/rcar-usb2-clock-sel.c

169

priv->xtal = !!clk_get_rate(clk);

drivers/clk/renesas/rcar-usb2-clock-sel.c

170

clk_disable_unprepare(clk);

drivers/clk/renesas/renesas-cpg-mssr.c

221

struct clk *clks[];

drivers/clk/renesas/renesas-cpg-mssr.c

268

dev_dbg(dev, "MSTP %u%02u/%pC %s\n", reg, bit, hw->clk,

drivers/clk/renesas/renesas-cpg-mssr.c

362

struct clk *cpg_mssr_clk_src_twocell_get(struct of_phandle_args *clkspec,

drivers/clk/renesas/renesas-cpg-mssr.c

370

struct clk *clk;

drivers/clk/renesas/renesas-cpg-mssr.c

381

clk = priv->clks[clkidx];

drivers/clk/renesas/renesas-cpg-mssr.c

398

clk = priv->clks[priv->num_core_clks + idx];

drivers/clk/renesas/renesas-cpg-mssr.c

406

if (IS_ERR(clk))

drivers/clk/renesas/renesas-cpg-mssr.c

408

PTR_ERR(clk));

drivers/clk/renesas/renesas-cpg-mssr.c

411

clkspec->args[0], clkspec->args[1], clk,

drivers/clk/renesas/renesas-cpg-mssr.c

412

clk_get_rate(clk));

drivers/clk/renesas/renesas-cpg-mssr.c

413

return clk;

drivers/clk/renesas/renesas-cpg-mssr.c

420

struct clk *clk = ERR_PTR(-ENOTSUPP), *parent;

drivers/clk/renesas/renesas-cpg-mssr.c

430

clk = of_clk_get_by_name(priv->np, core->name);

drivers/clk/renesas/renesas-cpg-mssr.c

439

clk = parent;

drivers/clk/renesas/renesas-cpg-mssr.c

450

clk = cpg_div6_register(core->name, 1, &parent_name,

drivers/clk/renesas/renesas-cpg-mssr.c

454

clk = clk_register_fixed_factor(NULL, core->name,

drivers/clk/renesas/renesas-cpg-mssr.c

461

clk = clk_register_fixed_rate(NULL, core->name, NULL, 0,

drivers/clk/renesas/renesas-cpg-mssr.c

467

clk = info->cpg_clk_register(dev, core, info,

drivers/clk/renesas/renesas-cpg-mssr.c

475

if (IS_ERR(clk))

drivers/clk/renesas/renesas-cpg-mssr.c

478

dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));

drivers/clk/renesas/renesas-cpg-mssr.c

479

priv->pub.clks[id] = clk;

drivers/clk/renesas/renesas-cpg-mssr.c

484

core->name, PTR_ERR(clk));

drivers/clk/renesas/renesas-cpg-mssr.c

495

struct clk *parent, *clk;

drivers/clk/renesas/renesas-cpg-mssr.c

511

clk = parent;

drivers/clk/renesas/renesas-cpg-mssr.c

517

clk = ERR_PTR(-ENOMEM);

drivers/clk/renesas/renesas-cpg-mssr.c

554

clk = clk_register(NULL, &clock->hw);

drivers/clk/renesas/renesas-cpg-mssr.c

555

if (IS_ERR(clk))

drivers/clk/renesas/renesas-cpg-mssr.c

558

dev_dbg(dev, "Module clock %pC at %lu Hz\n", clk, clk_get_rate(clk));

drivers/clk/renesas/renesas-cpg-mssr.c

559

priv->clks[id] = clk;

drivers/clk/renesas/renesas-cpg-mssr.c

565

mod->name, PTR_ERR(clk));

drivers/clk/renesas/renesas-cpg-mssr.c

605

struct clk *clk;

drivers/clk/renesas/renesas-cpg-mssr.c

626

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/renesas/renesas-cpg-mssr.c

629

if (IS_ERR(clk))

drivers/clk/renesas/renesas-cpg-mssr.c

630

return PTR_ERR(clk);

drivers/clk/renesas/renesas-cpg-mssr.c

636

error = pm_clk_add_clk(dev, clk);

drivers/clk/renesas/renesas-cpg-mssr.c

645

clk_put(clk);

drivers/clk/renesas/renesas-cpg-mssr.h

181

struct clk *(*cpg_clk_register)(struct device *dev,

drivers/clk/renesas/renesas-cpg-mssr.h

56

struct clk **clks;

drivers/clk/renesas/rzg2l-cpg.c

1022

static struct clk * __init

drivers/clk/renesas/rzg2l-cpg.c

1026

const struct clk *parent;

drivers/clk/renesas/rzg2l-cpg.c

1064

return clk_hw->clk;

drivers/clk/renesas/rzg2l-cpg.c

1140

static struct clk * __init

drivers/clk/renesas/rzg2l-cpg.c

1146

const struct clk *parent;

drivers/clk/renesas/rzg2l-cpg.c

1178

return pll_clk->hw.clk;

drivers/clk/renesas/rzg2l-cpg.c

1181

static struct clk

drivers/clk/renesas/rzg2l-cpg.c

1189

struct clk *clk;

drivers/clk/renesas/rzg2l-cpg.c

1198

clk = priv->clks[clkidx];

drivers/clk/renesas/rzg2l-cpg.c

1208

clk = priv->clks[priv->num_core_clks + clkidx];

drivers/clk/renesas/rzg2l-cpg.c

1216

if (IS_ERR(clk))

drivers/clk/renesas/rzg2l-cpg.c

1218

PTR_ERR(clk));

drivers/clk/renesas/rzg2l-cpg.c

1221

clkspec->args[0], clkspec->args[1], clk,

drivers/clk/renesas/rzg2l-cpg.c

1222

clk_get_rate(clk));

drivers/clk/renesas/rzg2l-cpg.c

1223

return clk;

drivers/clk/renesas/rzg2l-cpg.c

1231

struct clk *clk = ERR_PTR(-EOPNOTSUPP), *parent;

drivers/clk/renesas/rzg2l-cpg.c

1242

clk = of_clk_get_by_name(priv->dev->of_node, core->name);

drivers/clk/renesas/rzg2l-cpg.c

1248

clk = parent;

drivers/clk/renesas/rzg2l-cpg.c

1257

clk = ERR_CAST(clk_hw);

drivers/clk/renesas/rzg2l-cpg.c

1259

clk = clk_hw->clk;

drivers/clk/renesas/rzg2l-cpg.c

1262

clk = rzg2l_cpg_pll_clk_register(core, priv, &rzg2l_cpg_pll_ops);

drivers/clk/renesas/rzg2l-cpg.c

1265

clk = rzg2l_cpg_pll_clk_register(core, priv, &rzg3s_cpg_pll_ops);

drivers/clk/renesas/rzg2l-cpg.c

1268

clk = rzg2l_cpg_sipll5_register(core, priv);

drivers/clk/renesas/rzg2l-cpg.c

1271

clk = rzg2l_cpg_div_clk_register(core, priv);

drivers/clk/renesas/rzg2l-cpg.c

1274

clk = rzg3s_cpg_div_clk_register(core, priv);

drivers/clk/renesas/rzg2l-cpg.c

1277

clk = rzg2l_cpg_mux_clk_register(core, priv);

drivers/clk/renesas/rzg2l-cpg.c

1280

clk = rzg2l_cpg_sd_mux_clk_register(core, priv);

drivers/clk/renesas/rzg2l-cpg.c

1283

clk = rzg2l_cpg_pll5_4_mux_clk_register(core, priv);

drivers/clk/renesas/rzg2l-cpg.c

1286

clk = rzg2l_cpg_dsi_div_clk_register(core, priv);

drivers/clk/renesas/rzg2l-cpg.c

1292

if (IS_ERR(clk))

drivers/clk/renesas/rzg2l-cpg.c

1295

dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));

drivers/clk/renesas/rzg2l-cpg.c

1296

priv->clks[id] = clk;

drivers/clk/renesas/rzg2l-cpg.c

1301

core->name, PTR_ERR(clk));

drivers/clk/renesas/rzg2l-cpg.c

1367

struct mod_clock *clk = clock->shared_mstop_clks[i];

drivers/clk/renesas/rzg2l-cpg.c

1369

if (clk_hw_get_flags(&clk->hw) & CLK_IS_CRITICAL)

drivers/clk/renesas/rzg2l-cpg.c

1409

struct mod_clock *clk;

drivers/clk/renesas/rzg2l-cpg.c

1419

for_each_mod_clock(clk, hw, priv) {

drivers/clk/renesas/rzg2l-cpg.c

1422

if (!clk->mstop)

drivers/clk/renesas/rzg2l-cpg.c

1425

val = readl(priv->base + MSTOP_OFF(clk->mstop->conf)) &

drivers/clk/renesas/rzg2l-cpg.c

1426

MSTOP_MASK(clk->mstop->conf);

drivers/clk/renesas/rzg2l-cpg.c

1429

__clk_get_enable_count(hw->clk), atomic_read(&clk->mstop->usecnt),

drivers/clk/renesas/rzg2l-cpg.c

1430

MSTOP_OFF(clk->mstop->conf), val);

drivers/clk/renesas/rzg2l-cpg.c

1432

for (unsigned int i = 0; i < clk->num_shared_mstop_clks; i++)

drivers/clk/renesas/rzg2l-cpg.c

1433

seq_printf(s, " %pC", clk->shared_mstop_clks[i]->hw.clk);

drivers/clk/renesas/rzg2l-cpg.c

1453

dev_dbg(dev, "%pC does not support ON/OFF\n", hw->clk);

drivers/clk/renesas/rzg2l-cpg.c

1457

dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", CLK_ON_R(reg), hw->clk,

drivers/clk/renesas/rzg2l-cpg.c

1484

CLK_ON_R(reg), hw->clk);

drivers/clk/renesas/rzg2l-cpg.c

1537

dev_dbg(priv->dev, "%pC does not support ON/OFF\n", hw->clk);

drivers/clk/renesas/rzg2l-cpg.c

1562

struct mod_clock *clk;

drivers/clk/renesas/rzg2l-cpg.c

1565

for_each_mod_clock(clk, hw, priv) {

drivers/clk/renesas/rzg2l-cpg.c

1566

if (clock->off == clk->off && clock->bit == clk->bit)

drivers/clk/renesas/rzg2l-cpg.c

1567

return clk;

drivers/clk/renesas/rzg2l-cpg.c

1575

struct mod_clock *clk;

drivers/clk/renesas/rzg2l-cpg.c

1578

for_each_mod_clock(clk, hw, priv) {

drivers/clk/renesas/rzg2l-cpg.c

1579

if (!clk->mstop)

drivers/clk/renesas/rzg2l-cpg.c

1582

if (clk->mstop->conf == conf)

drivers/clk/renesas/rzg2l-cpg.c

1583

return clk->mstop;

drivers/clk/renesas/rzg2l-cpg.c

1591

struct mod_clock *clk;

drivers/clk/renesas/rzg2l-cpg.c

1594

for_each_mod_clock(clk, hw, priv) {

drivers/clk/renesas/rzg2l-cpg.c

1595

if (!clk->mstop)

drivers/clk/renesas/rzg2l-cpg.c

1604

if (!rzg2l_mod_clock_is_enabled(&clk->hw))

drivers/clk/renesas/rzg2l-cpg.c

1605

rzg2l_mod_clock_module_set_state(clk, true);

drivers/clk/renesas/rzg2l-cpg.c

1613

struct mod_clock *clk;

drivers/clk/renesas/rzg2l-cpg.c

1619

for_each_mod_clock(clk, hw, priv) {

drivers/clk/renesas/rzg2l-cpg.c

1623

if (clk->mstop != clock->mstop)

drivers/clk/renesas/rzg2l-cpg.c

1626

num_shared_mstop_clks = clk->num_shared_mstop_clks;

drivers/clk/renesas/rzg2l-cpg.c

1630

new_clks = devm_krealloc(priv->dev, clk->shared_mstop_clks,

drivers/clk/renesas/rzg2l-cpg.c

1637

new_clks[num_shared_mstop_clks++] = clk;

drivers/clk/renesas/rzg2l-cpg.c

1659

struct clk *parent, *clk;

drivers/clk/renesas/rzg2l-cpg.c

1671

clk = parent;

drivers/clk/renesas/rzg2l-cpg.c

1677

clk = ERR_PTR(-ENOMEM);

drivers/clk/renesas/rzg2l-cpg.c

1707

clk = ERR_PTR(-ENOMEM);

drivers/clk/renesas/rzg2l-cpg.c

1718

clk = ERR_PTR(ret);

drivers/clk/renesas/rzg2l-cpg.c

1736

clk = ERR_PTR(ret);

drivers/clk/renesas/rzg2l-cpg.c

1740

clk = clock->hw.clk;

drivers/clk/renesas/rzg2l-cpg.c

1741

dev_dbg(dev, "Module clock %pC at %lu Hz\n", clk, clk_get_rate(clk));

drivers/clk/renesas/rzg2l-cpg.c

1742

priv->clks[id] = clk;

drivers/clk/renesas/rzg2l-cpg.c

1748

mod->name, PTR_ERR(clk));

drivers/clk/renesas/rzg2l-cpg.c

178

struct clk **clks;

drivers/clk/renesas/rzg2l-cpg.c

1909

struct clk *clk;

drivers/clk/renesas/rzg2l-cpg.c

1927

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/renesas/rzg2l-cpg.c

1929

if (IS_ERR(clk)) {

drivers/clk/renesas/rzg2l-cpg.c

1930

error = PTR_ERR(clk);

drivers/clk/renesas/rzg2l-cpg.c

1934

error = pm_clk_add_clk(dev, clk);

drivers/clk/renesas/rzg2l-cpg.c

1944

clk_put(clk);

drivers/clk/renesas/rzg2l-cpg.c

1993

struct clk **clks;

drivers/clk/renesas/rzg2l-cpg.c

215

struct clk_hw *hw = __clk_get_hw(cnd->clk);

drivers/clk/renesas/rzg2l-cpg.c

258

struct clk_hw *hw = __clk_get_hw(cnd->clk);

drivers/clk/renesas/rzg2l-cpg.c

315

return clk_notifier_register(hw->clk, nb);

drivers/clk/renesas/rzg2l-cpg.c

376

static struct clk * __init

drivers/clk/renesas/rzg2l-cpg.c

383

const struct clk *parent;

drivers/clk/renesas/rzg2l-cpg.c

432

return clk_hw->clk;

drivers/clk/renesas/rzg2l-cpg.c

435

static struct clk * __init

drivers/clk/renesas/rzg2l-cpg.c

441

const struct clk *parent;

drivers/clk/renesas/rzg2l-cpg.c

471

return clk_hw->clk;

drivers/clk/renesas/rzg2l-cpg.c

474

static struct clk * __init

drivers/clk/renesas/rzg2l-cpg.c

490

return clk_hw->clk;

drivers/clk/renesas/rzg2l-cpg.c

541

static struct clk * __init

drivers/clk/renesas/rzg2l-cpg.c

579

return clk_hw->clk;

drivers/clk/renesas/rzg2l-cpg.c

792

static struct clk * __init

drivers/clk/renesas/rzg2l-cpg.c

797

const struct clk *parent;

drivers/clk/renesas/rzg2l-cpg.c

827

return clk_hw->clk;

drivers/clk/renesas/rzg2l-cpg.c

888

static struct clk * __init

drivers/clk/renesas/rzg2l-cpg.c

917

return clk_hw->clk;

drivers/clk/renesas/rzv2h-cpg.c

1007

clk = priv->clks[priv->num_core_clks + clkidx];

drivers/clk/renesas/rzv2h-cpg.c

1015

if (IS_ERR(clk))

drivers/clk/renesas/rzv2h-cpg.c

1017

PTR_ERR(clk));

drivers/clk/renesas/rzv2h-cpg.c

1020

clkspec->args[0], clkspec->args[1], clk,

drivers/clk/renesas/rzv2h-cpg.c

1021

clk_get_rate(clk));

drivers/clk/renesas/rzv2h-cpg.c

1022

return clk;

drivers/clk/renesas/rzv2h-cpg.c

1029

struct clk *clk = ERR_PTR(-EOPNOTSUPP), *parent;

drivers/clk/renesas/rzv2h-cpg.c

1040

clk = of_clk_get_by_name(priv->dev->of_node, core->name);

drivers/clk/renesas/rzv2h-cpg.c

1046

clk = parent;

drivers/clk/renesas/rzv2h-cpg.c

1055

clk = ERR_CAST(clk_hw);

drivers/clk/renesas/rzv2h-cpg.c

1057

clk = clk_hw->clk;

drivers/clk/renesas/rzv2h-cpg.c

1064

clk = ERR_PTR(-ENOMEM);

drivers/clk/renesas/rzv2h-cpg.c

1071

clk = rzv2h_cpg_fixed_mod_status_clk_register(core, priv);

drivers/clk/renesas/rzv2h-cpg.c

1074

clk = rzv2h_cpg_pll_clk_register(core, priv, &rzv2h_cpg_pll_ops);

drivers/clk/renesas/rzv2h-cpg.c

1077

clk = rzv2h_cpg_ddiv_clk_register(core, priv);

drivers/clk/renesas/rzv2h-cpg.c

1080

clk = rzv2h_cpg_mux_clk_register(core, priv);

drivers/clk/renesas/rzv2h-cpg.c

1083

clk = rzv2h_cpg_pll_clk_register(core, priv, &rzv2h_cpg_plldsi_ops);

drivers/clk/renesas/rzv2h-cpg.c

1086

clk = rzv2h_cpg_plldsi_div_clk_register(core, priv);

drivers/clk/renesas/rzv2h-cpg.c

1092

if (IS_ERR(clk))

drivers/clk/renesas/rzv2h-cpg.c

1095

dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));

drivers/clk/renesas/rzv2h-cpg.c

1096

priv->clks[id] = clk;

drivers/clk/renesas/rzv2h-cpg.c

1101

core->name, PTR_ERR(clk));

drivers/clk/renesas/rzv2h-cpg.c

114

struct clk **clks;

drivers/clk/renesas/rzv2h-cpg.c

1149

struct clk *parent_clk;

drivers/clk/renesas/rzv2h-cpg.c

1154

parent_clk = clk_get_parent(hw->clk);

drivers/clk/renesas/rzv2h-cpg.c

1201

dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", reg, hw->clk,

drivers/clk/renesas/rzv2h-cpg.c

1228

GET_CLK_ON_OFFSET(clock->on_index), hw->clk);

drivers/clk/renesas/rzv2h-cpg.c

1256

struct clk *parent, *clk;

drivers/clk/renesas/rzv2h-cpg.c

1268

clk = parent;

drivers/clk/renesas/rzv2h-cpg.c

1274

clk = ERR_PTR(-ENOMEM);

drivers/clk/renesas/rzv2h-cpg.c

1300

clk = ERR_PTR(ret);

drivers/clk/renesas/rzv2h-cpg.c

1304

priv->clks[id] = clock->hw.clk;

drivers/clk/renesas/rzv2h-cpg.c

1344

mod->name, PTR_ERR(clk));

drivers/clk/renesas/rzv2h-cpg.c

1494

struct clk *clk;

drivers/clk/renesas/rzv2h-cpg.c

1512

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/renesas/rzv2h-cpg.c

1514

if (IS_ERR(clk)) {

drivers/clk/renesas/rzv2h-cpg.c

1515

error = PTR_ERR(clk);

drivers/clk/renesas/rzv2h-cpg.c

1519

error = pm_clk_add_clk(dev, clk);

drivers/clk/renesas/rzv2h-cpg.c

1530

clk_put(clk);

drivers/clk/renesas/rzv2h-cpg.c

1588

struct clk **clks;

drivers/clk/renesas/rzv2h-cpg.c

520

static struct clk * __init

drivers/clk/renesas/rzv2h-cpg.c

525

struct clk **clks = priv->clks;

drivers/clk/renesas/rzv2h-cpg.c

527

const struct clk *parent;

drivers/clk/renesas/rzv2h-cpg.c

558

return clk_hw->clk;

drivers/clk/renesas/rzv2h-cpg.c

695

stby_offset, hw->clk);

drivers/clk/renesas/rzv2h-cpg.c

734

static struct clk * __init

drivers/clk/renesas/rzv2h-cpg.c

741

const struct clk *parent;

drivers/clk/renesas/rzv2h-cpg.c

773

return pll_clk->hw.clk;

drivers/clk/renesas/rzv2h-cpg.c

849

static struct clk * __init

drivers/clk/renesas/rzv2h-cpg.c

858

const struct clk *parent;

drivers/clk/renesas/rzv2h-cpg.c

901

return div->hw.clk;

drivers/clk/renesas/rzv2h-cpg.c

904

static struct clk * __init

drivers/clk/renesas/rzv2h-cpg.c

919

return clk_hw->clk;

drivers/clk/renesas/rzv2h-cpg.c

935

static struct clk * __init

drivers/clk/renesas/rzv2h-cpg.c

942

const struct clk *parent;

drivers/clk/renesas/rzv2h-cpg.c

978

return clk_hw_data->fix.hw.clk;

drivers/clk/renesas/rzv2h-cpg.c

981

static struct clk

drivers/clk/renesas/rzv2h-cpg.c

989

struct clk *clk;

drivers/clk/renesas/rzv2h-cpg.c

998

clk = priv->clks[clkidx];

drivers/clk/rockchip/clk-cpu.c

300

struct clk *rockchip_clk_register_cpuclk(const char *name,

drivers/clk/rockchip/clk-cpu.c

308

struct clk *clk, *cclk;

drivers/clk/rockchip/clk-cpu.c

354

clk = __clk_lookup(parent_names[reg_data->mux_core_main]);

drivers/clk/rockchip/clk-cpu.c

355

if (!clk) {

drivers/clk/rockchip/clk-cpu.c

363

ret = clk_notifier_register(clk, &cpuclk->clk_nb);

drivers/clk/rockchip/clk-cpu.c

392

clk_notifier_unregister(clk, &cpuclk->clk_nb);

drivers/clk/rockchip/clk-cpu.c

463

struct clk *rockchip_clk_register_cpuclk_multi_pll(const char *name,

drivers/clk/rockchip/clk-cpu.c

533

ret = clk_notifier_register(hw->clk, &cpuclk->clk_nb);

drivers/clk/rockchip/clk-cpu.c

54

struct clk *alt_parent;

drivers/clk/rockchip/clk-cpu.c

551

return hw->clk;

drivers/clk/rockchip/clk-ddr.c

101

struct clk *clk;

drivers/clk/rockchip/clk-ddr.c

134

clk = clk_register(NULL, &ddrclk->hw);

drivers/clk/rockchip/clk-ddr.c

135

if (IS_ERR(clk))

drivers/clk/rockchip/clk-ddr.c

138

return clk;

drivers/clk/rockchip/clk-ddr.c

91

struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,

drivers/clk/rockchip/clk-gate-grf.c

100

clk = clk_register(NULL, &gate->hw);

drivers/clk/rockchip/clk-gate-grf.c

101

if (IS_ERR(clk))

drivers/clk/rockchip/clk-gate-grf.c

104

return clk;

drivers/clk/rockchip/clk-gate-grf.c

70

struct clk *rockchip_clk_register_gate_grf(const char *name,

drivers/clk/rockchip/clk-gate-grf.c

77

struct clk *clk;

drivers/clk/rockchip/clk-half-divider.c

160

struct clk *rockchip_clk_register_halfdiv(const char *name,

drivers/clk/rockchip/clk-half-divider.c

225

return hw->clk;

drivers/clk/rockchip/clk-inverter.c

102

return clk;

drivers/clk/rockchip/clk-inverter.c

73

struct clk *rockchip_clk_register_inverter(const char *name,

drivers/clk/rockchip/clk-inverter.c

80

struct clk *clk;

drivers/clk/rockchip/clk-inverter.c

98

clk = clk_register(NULL, &inv_clock->hw);

drivers/clk/rockchip/clk-inverter.c

99

if (IS_ERR(clk))

drivers/clk/rockchip/clk-mmc-phase.c

202

struct clk *rockchip_clk_register_mmc(const char *name,

drivers/clk/rockchip/clk-mmc-phase.c

210

struct clk *clk;

drivers/clk/rockchip/clk-mmc-phase.c

229

clk = clk_register(NULL, &mmc_clock->hw);

drivers/clk/rockchip/clk-mmc-phase.c

230

if (IS_ERR(clk)) {

drivers/clk/rockchip/clk-mmc-phase.c

231

ret = PTR_ERR(clk);

drivers/clk/rockchip/clk-mmc-phase.c

237

ret = clk_notifier_register(clk, &mmc_clock->clk_rate_change_nb);

drivers/clk/rockchip/clk-mmc-phase.c

241

return clk;

drivers/clk/rockchip/clk-mmc-phase.c

243

clk_unregister(clk);

drivers/clk/rockchip/clk-muxgrf.c

56

struct clk *rockchip_clk_register_muxgrf(const char *name,

drivers/clk/rockchip/clk-muxgrf.c

63

struct clk *clk;

drivers/clk/rockchip/clk-muxgrf.c

87

clk = clk_register(NULL, &muxgrf_clock->hw);

drivers/clk/rockchip/clk-muxgrf.c

88

if (IS_ERR(clk))

drivers/clk/rockchip/clk-muxgrf.c

91

return clk;

drivers/clk/rockchip/clk-pll.c

1001

drate, __clk_get_name(hw->clk));

drivers/clk/rockchip/clk-pll.c

1055

struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,

drivers/clk/rockchip/clk-pll.c

1067

struct clk *pll_clk, *mux_clk;

drivers/clk/rockchip/clk-pll.c

262

__func__, __clk_get_name(hw->clk), drate, prate);

drivers/clk/rockchip/clk-pll.c

268

drate, __clk_get_name(hw->clk));

drivers/clk/rockchip/clk-pll.c

322

pr_debug("%s: pll %s@%lu: Hz\n", __func__, __clk_get_name(hw->clk),

drivers/clk/rockchip/clk-pll.c

335

struct clk *parent = clk_get_parent(hw->clk);

drivers/clk/rockchip/clk-pll.c

339

__func__, __clk_get_name(hw->clk));

drivers/clk/rockchip/clk-pll.c

344

__func__, __clk_get_name(hw->clk));

drivers/clk/rockchip/clk-pll.c

746

__func__, __clk_get_name(hw->clk), drate, prate);

drivers/clk/rockchip/clk-pll.c

752

drate, __clk_get_name(hw->clk));

drivers/clk/rockchip/clk-pll.c

806

pr_debug("%s: pll %s@%lu: Hz\n", __func__, __clk_get_name(hw->clk),

drivers/clk/rockchip/clk-pll.c

819

struct clk *parent = clk_get_parent(hw->clk);

drivers/clk/rockchip/clk-pll.c

823

__func__, __clk_get_name(hw->clk));

drivers/clk/rockchip/clk-pll.c

828

__func__, __clk_get_name(hw->clk));

drivers/clk/rockchip/clk-pll.c

995

__func__, __clk_get_name(hw->clk), drate, prate);

drivers/clk/rockchip/clk-rk3188.c

823

struct clk *clk1, *clk2;

drivers/clk/rockchip/clk.c

118

return hw->clk;

drivers/clk/rockchip/clk.c

201

static struct clk *rockchip_clk_register_frac_branch(

drivers/clk/rockchip/clk.c

261

struct clk *mux_clk;

drivers/clk/rockchip/clk.c

296

ret = clk_notifier_register(hw->clk, &frac->clk_nb);

drivers/clk/rockchip/clk.c

306

return hw->clk;

drivers/clk/rockchip/clk.c

309

static struct clk *rockchip_clk_register_factor_branch(const char *name,

drivers/clk/rockchip/clk.c

354

return hw->clk;

drivers/clk/rockchip/clk.c

362

struct clk **clk_table;

drivers/clk/rockchip/clk.c

363

struct clk *default_clk_val;

drivers/clk/rockchip/clk.c

372

clk_table = kzalloc_objs(struct clk *, nr_clks);

drivers/clk/rockchip/clk.c

39

static struct clk *rockchip_clk_register_branch(const char *name,

drivers/clk/rockchip/clk.c

436

struct clk *clk;

drivers/clk/rockchip/clk.c

440

clk = rockchip_clk_register_pll(ctx, list->type, list->name,

drivers/clk/rockchip/clk.c

446

if (IS_ERR(clk)) {

drivers/clk/rockchip/clk.c

452

rockchip_clk_set_lookup(ctx, clk, list->id);

drivers/clk/rockchip/clk.c

503

struct clk *clk;

drivers/clk/rockchip/clk.c

509

clk = NULL;

drivers/clk/rockchip/clk.c

528

clk = clk_register_mux_table(NULL, list->name,

drivers/clk/rockchip/clk.c

536

clk = clk_register_mux(NULL, list->name,

drivers/clk/rockchip/clk.c

544

clk = rockchip_clk_register_muxgrf(list->name,

drivers/clk/rockchip/clk.c

552

clk = clk_register_divider_table(NULL,

drivers/clk/rockchip/clk.c

560

clk = clk_register_divider(NULL, list->name,

drivers/clk/rockchip/clk.c

567

clk = rockchip_clk_register_frac_branch(ctx, list->name,

drivers/clk/rockchip/clk.c

576

clk = rockchip_clk_register_halfdiv(list->name,

drivers/clk/rockchip/clk.c

588

clk = clk_register_gate(NULL, list->name,

drivers/clk/rockchip/clk.c

595

clk = rockchip_clk_register_gate_grf(list->name,

drivers/clk/rockchip/clk.c

601

clk = rockchip_clk_register_branch(list->name,

drivers/clk/rockchip/clk.c

613

clk = rockchip_clk_register_mmc(

drivers/clk/rockchip/clk.c

622

clk = rockchip_clk_register_mmc(

drivers/clk/rockchip/clk.c

631

clk = rockchip_clk_register_inverter(

drivers/clk/rockchip/clk.c

638

clk = rockchip_clk_register_factor_branch(

drivers/clk/rockchip/clk.c

646

clk = rockchip_clk_register_ddrclk(

drivers/clk/rockchip/clk.c

660

if (!clk) {

drivers/clk/rockchip/clk.c

666

if (IS_ERR(clk)) {

drivers/clk/rockchip/clk.c

668

__func__, list->name, PTR_ERR(clk));

drivers/clk/rockchip/clk.c

672

rockchip_clk_set_lookup(ctx, clk, list->id);

drivers/clk/rockchip/clk.c

710

struct clk *clk;

drivers/clk/rockchip/clk.c

712

clk = rockchip_clk_register_cpuclk(name, parent_names, num_parents,

drivers/clk/rockchip/clk.c

715

if (IS_ERR(clk)) {

drivers/clk/rockchip/clk.c

717

__func__, name, PTR_ERR(clk));

drivers/clk/rockchip/clk.c

721

rockchip_clk_set_lookup(ctx, clk, lookup_id);

drivers/clk/rockchip/clk.c

730

struct clk *clk;

drivers/clk/rockchip/clk.c

732

clk = rockchip_clk_register_cpuclk_multi_pll(list->name, list->parent_names,

drivers/clk/rockchip/clk.c

739

if (IS_ERR(clk)) {

drivers/clk/rockchip/clk.c

741

__func__, list->name, PTR_ERR(clk));

drivers/clk/rockchip/clk.c

745

rockchip_clk_set_lookup(ctx, clk, list->id);

drivers/clk/rockchip/clk.c

756

struct clk *clk = __clk_lookup(clocks[i]);

drivers/clk/rockchip/clk.c

758

clk_prepare_enable(clk);

drivers/clk/rockchip/clk.h

1259

static inline struct clk *rockchip_clk_get_lookup(struct rockchip_clk_provider *ctx,

drivers/clk/rockchip/clk.h

1266

struct clk *clk, unsigned int id)

drivers/clk/rockchip/clk.h

1268

ctx->clk_data.clks[id] = clk;

drivers/clk/rockchip/clk.h

1311

struct clk *rockchip_clk_register_halfdiv(const char *name,

drivers/clk/rockchip/clk.h

24

struct clk;

drivers/clk/rockchip/clk.h

652

struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx,

drivers/clk/rockchip/clk.h

698

struct clk *rockchip_clk_register_cpuclk(const char *name,

drivers/clk/rockchip/clk.h

704

struct clk *rockchip_clk_register_cpuclk_multi_pll(const char *name,

drivers/clk/rockchip/clk.h

715

struct clk *rockchip_clk_register_mmc(const char *name,

drivers/clk/rockchip/clk.h

727

struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,

drivers/clk/rockchip/clk.h

737

struct clk *rockchip_clk_register_inverter(const char *name,

drivers/clk/rockchip/clk.h

742

struct clk *rockchip_clk_register_muxgrf(const char *name,

drivers/clk/rockchip/clk.h

747

struct clk *rockchip_clk_register_gate_grf(const char *name,

drivers/clk/rockchip/gate-link.c

19

struct clk *clk;

drivers/clk/rockchip/gate-link.c

21

clk = clk_register_gate(dev, clkbr->name, clkbr->parent_names[0],

drivers/clk/rockchip/gate-link.c

26

if (IS_ERR(clk))

drivers/clk/rockchip/gate-link.c

27

return PTR_ERR(clk);

drivers/clk/rockchip/gate-link.c

29

rockchip_clk_set_lookup(ctx, clk, clkbr->id);

drivers/clk/rockchip/gate-link.c

37

struct clk *linked_clk;

drivers/clk/samsung/clk-acpm.c

36

#define to_acpm_clk(clk) container_of(clk, struct acpm_clk, hw)

drivers/clk/samsung/clk-acpm.c

69

struct acpm_clk *clk = to_acpm_clk(hw);

drivers/clk/samsung/clk-acpm.c

71

return clk->handle->ops.dvfs_ops.get_rate(clk->handle,

drivers/clk/samsung/clk-acpm.c

72

clk->mbox_chan_id, clk->id);

drivers/clk/samsung/clk-acpm.c

90

struct acpm_clk *clk = to_acpm_clk(hw);

drivers/clk/samsung/clk-acpm.c

92

return clk->handle->ops.dvfs_ops.set_rate(clk->handle,

drivers/clk/samsung/clk-acpm.c

93

clk->mbox_chan_id, clk->id, rate);

drivers/clk/samsung/clk-cpu.c

467

ret = clk_set_rate(alt_parent->clk, div_rate);

drivers/clk/samsung/clk-cpu.c

683

ret = clk_notifier_register(parent->clk, &cpuclk->clk_nb);

drivers/clk/samsung/clk-cpu.c

714

clk_notifier_unregister(parent->clk, &cpuclk->clk_nb);

drivers/clk/samsung/clk-exynos-arm64.c

151

struct clk *parent_clk;

drivers/clk/samsung/clk-exynos-arm64.c

162

data->clk = parent_clk;

drivers/clk/samsung/clk-exynos-arm64.c

205

data->pclks = devm_kcalloc(dev, sizeof(struct clk *), data->nr_pclks,

drivers/clk/samsung/clk-exynos-arm64.c

213

struct clk *clk = of_clk_get(dev->of_node, i);

drivers/clk/samsung/clk-exynos-arm64.c

215

if (IS_ERR(clk)) {

drivers/clk/samsung/clk-exynos-arm64.c

218

ret = PTR_ERR(clk);

drivers/clk/samsung/clk-exynos-arm64.c

221

data->pclks[i] = clk;

drivers/clk/samsung/clk-exynos-arm64.c

355

clk_disable_unprepare(data->clk);

drivers/clk/samsung/clk-exynos-arm64.c

365

clk_prepare_enable(data->clk);

drivers/clk/samsung/clk-exynos-arm64.c

53

struct clk *clk;

drivers/clk/samsung/clk-exynos-arm64.c

54

struct clk **pclks;

drivers/clk/samsung/clk-exynos-audss.c

129

struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in;

drivers/clk/samsung/clk-exynos-audss.c

30

static struct clk *epll;

drivers/clk/samsung/clk-exynos-clkout.c

116

struct clk *parents[EXYNOS_CLKOUT_PARENTS];

drivers/clk/samsung/clk-exynos5410.c

270

struct clk *xxti = of_clk_get(np, 0);

drivers/clk/samsung/clk-exynos5420.c

1672

clk_prepare_enable(hws[CLK_MOUT_SW_ACLK_G3D]->clk);

drivers/clk/samsung/clk-exynos5420.c

1677

clk_prepare_enable(hws[CLK_MOUT_BPLL]->clk);

drivers/clk/samsung/clk-s5pv210-audss.c

75

struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio;

drivers/clk/sophgo/clk-sg2042-clkgen.c

1039

ret = devm_clk_notifier_register(dev, hw->clk, &mux->clk_nb);

drivers/clk/sophgo/clk-sg2042-clkgen.c

958

hw = __clk_get_hw(ndata->clk);

drivers/clk/sophgo/clk-sg2044.c

1721

ret = devm_clk_notifier_register(dev, hw->clk,

drivers/clk/sophgo/clk-sg2044.c

268

struct clk_hw *hw = __clk_get_hw(ndata->clk);

drivers/clk/spear/clk-aux-synth.c

136

struct clk *clk_register_aux(const char *aux_name, const char *gate_name,

drivers/clk/spear/clk-aux-synth.c

139

u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk)

drivers/clk/spear/clk-aux-synth.c

143

struct clk *clk;

drivers/clk/spear/clk-aux-synth.c

172

clk = clk_register(NULL, &aux->hw);

drivers/clk/spear/clk-aux-synth.c

173

if (IS_ERR_OR_NULL(clk))

drivers/clk/spear/clk-aux-synth.c

177

struct clk *tgate_clk;

drivers/clk/spear/clk-aux-synth.c

189

return clk;

drivers/clk/spear/clk-frac-synth.c

124

struct clk *clk_register_frac(const char *name, const char *parent_name,

drivers/clk/spear/clk-frac-synth.c

130

struct clk *clk;

drivers/clk/spear/clk-frac-synth.c

154

clk = clk_register(NULL, &frac->hw);

drivers/clk/spear/clk-frac-synth.c

155

if (!IS_ERR_OR_NULL(clk))

drivers/clk/spear/clk-frac-synth.c

156

return clk;

drivers/clk/spear/clk-gpt-synth.c

113

struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned

drivers/clk/spear/clk-gpt-synth.c

119

struct clk *clk;

drivers/clk/spear/clk-gpt-synth.c

143

clk = clk_register(NULL, &gpt->hw);

drivers/clk/spear/clk-gpt-synth.c

144

if (!IS_ERR_OR_NULL(clk))

drivers/clk/spear/clk-gpt-synth.c

145

return clk;

drivers/clk/spear/clk-vco-pll.c

277

struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,

drivers/clk/spear/clk-vco-pll.c

281

spinlock_t *lock, struct clk **pll_clk,

drivers/clk/spear/clk-vco-pll.c

282

struct clk **vco_gate_clk)

drivers/clk/spear/clk-vco-pll.c

286

struct clk *vco_clk, *tpll_clk, *tvco_gate_clk;

drivers/clk/spear/clk.h

110

struct clk *clk_register_aux(const char *aux_name, const char *gate_name,

drivers/clk/spear/clk.h

113

u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk);

drivers/clk/spear/clk.h

114

struct clk *clk_register_frac(const char *name, const char *parent_name,

drivers/clk/spear/clk.h

117

struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned

drivers/clk/spear/clk.h

120

struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,

drivers/clk/spear/clk.h

124

spinlock_t *lock, struct clk **pll_clk,

drivers/clk/spear/clk.h

125

struct clk **vco_gate_clk);

drivers/clk/spear/spear1310_clock.c

1003

clk_register_clkdev(clk, "i2c1_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1005

clk = clk_register_gate(NULL, "i2c1_clk", "i2c1_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1008

clk_register_clkdev(clk, NULL, "5cd00000.i2c");

drivers/clk/spear/spear1310_clock.c

1010

clk = clk_register_mux(NULL, "i2c2_mclk", i2c_parents,

drivers/clk/spear/spear1310_clock.c

1014

clk_register_clkdev(clk, "i2c2_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1016

clk = clk_register_gate(NULL, "i2c2_clk", "i2c2_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1019

clk_register_clkdev(clk, NULL, "5ce00000.i2c");

drivers/clk/spear/spear1310_clock.c

1021

clk = clk_register_mux(NULL, "i2c3_mclk", i2c_parents,

drivers/clk/spear/spear1310_clock.c

1025

clk_register_clkdev(clk, "i2c3_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1027

clk = clk_register_gate(NULL, "i2c3_clk", "i2c3_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1030

clk_register_clkdev(clk, NULL, "5cf00000.i2c");

drivers/clk/spear/spear1310_clock.c

1032

clk = clk_register_mux(NULL, "i2c4_mclk", i2c_parents,

drivers/clk/spear/spear1310_clock.c

1036

clk_register_clkdev(clk, "i2c4_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1038

clk = clk_register_gate(NULL, "i2c4_clk", "i2c4_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1041

clk_register_clkdev(clk, NULL, "5d000000.i2c");

drivers/clk/spear/spear1310_clock.c

1043

clk = clk_register_mux(NULL, "i2c5_mclk", i2c_parents,

drivers/clk/spear/spear1310_clock.c

1047

clk_register_clkdev(clk, "i2c5_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1049

clk = clk_register_gate(NULL, "i2c5_clk", "i2c5_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1052

clk_register_clkdev(clk, NULL, "5d100000.i2c");

drivers/clk/spear/spear1310_clock.c

1054

clk = clk_register_mux(NULL, "i2c6_mclk", i2c_parents,

drivers/clk/spear/spear1310_clock.c

1058

clk_register_clkdev(clk, "i2c6_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1060

clk = clk_register_gate(NULL, "i2c6_clk", "i2c6_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1063

clk_register_clkdev(clk, NULL, "5d200000.i2c");

drivers/clk/spear/spear1310_clock.c

1065

clk = clk_register_mux(NULL, "i2c7_mclk", i2c_parents,

drivers/clk/spear/spear1310_clock.c

1069

clk_register_clkdev(clk, "i2c7_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1071

clk = clk_register_gate(NULL, "i2c7_clk", "i2c7_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1074

clk_register_clkdev(clk, NULL, "5d300000.i2c");

drivers/clk/spear/spear1310_clock.c

1076

clk = clk_register_mux(NULL, "ssp1_mclk", ssp1_parents,

drivers/clk/spear/spear1310_clock.c

1080

clk_register_clkdev(clk, "ssp1_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1082

clk = clk_register_gate(NULL, "ssp1_clk", "ssp1_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1085

clk_register_clkdev(clk, NULL, "5d400000.spi");

drivers/clk/spear/spear1310_clock.c

1087

clk = clk_register_mux(NULL, "pci_mclk", pci_parents,

drivers/clk/spear/spear1310_clock.c

1091

clk_register_clkdev(clk, "pci_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1093

clk = clk_register_gate(NULL, "pci_clk", "pci_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1096

clk_register_clkdev(clk, NULL, "pci");

drivers/clk/spear/spear1310_clock.c

1098

clk = clk_register_mux(NULL, "tdm1_mclk", tdm_parents,

drivers/clk/spear/spear1310_clock.c

1102

clk_register_clkdev(clk, "tdm1_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1104

clk = clk_register_gate(NULL, "tdm1_clk", "tdm1_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1107

clk_register_clkdev(clk, NULL, "tdm_hdlc.0");

drivers/clk/spear/spear1310_clock.c

1109

clk = clk_register_mux(NULL, "tdm2_mclk", tdm_parents,

drivers/clk/spear/spear1310_clock.c

1113

clk_register_clkdev(clk, "tdm2_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

1115

clk = clk_register_gate(NULL, "tdm2_clk", "tdm2_mclk", 0,

drivers/clk/spear/spear1310_clock.c

1118

clk_register_clkdev(clk, NULL, "tdm_hdlc.1");

drivers/clk/spear/spear1310_clock.c

384

struct clk *clk, *clk1;

drivers/clk/spear/spear1310_clock.c

386

clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);

drivers/clk/spear/spear1310_clock.c

387

clk_register_clkdev(clk, "osc_32k_clk", NULL);

drivers/clk/spear/spear1310_clock.c

389

clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);

drivers/clk/spear/spear1310_clock.c

390

clk_register_clkdev(clk, "osc_24m_clk", NULL);

drivers/clk/spear/spear1310_clock.c

392

clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);

drivers/clk/spear/spear1310_clock.c

393

clk_register_clkdev(clk, "osc_25m_clk", NULL);

drivers/clk/spear/spear1310_clock.c

395

clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);

drivers/clk/spear/spear1310_clock.c

396

clk_register_clkdev(clk, "gmii_pad_clk", NULL);

drivers/clk/spear/spear1310_clock.c

398

clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,

drivers/clk/spear/spear1310_clock.c

400

clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);

drivers/clk/spear/spear1310_clock.c

403

clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,

drivers/clk/spear/spear1310_clock.c

406

clk_register_clkdev(clk, NULL, "e0580000.rtc");

drivers/clk/spear/spear1310_clock.c

410

clk = clk_register_mux(NULL, "vco1_mclk", vco_parents,

drivers/clk/spear/spear1310_clock.c

414

clk_register_clkdev(clk, "vco1_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

415

clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mclk",

drivers/clk/spear/spear1310_clock.c

418

clk_register_clkdev(clk, "vco1_clk", NULL);

drivers/clk/spear/spear1310_clock.c

421

clk = clk_register_mux(NULL, "vco2_mclk", vco_parents,

drivers/clk/spear/spear1310_clock.c

425

clk_register_clkdev(clk, "vco2_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

426

clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk",

drivers/clk/spear/spear1310_clock.c

429

clk_register_clkdev(clk, "vco2_clk", NULL);

drivers/clk/spear/spear1310_clock.c

432

clk = clk_register_mux(NULL, "vco3_mclk", vco_parents,

drivers/clk/spear/spear1310_clock.c

436

clk_register_clkdev(clk, "vco3_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

437

clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mclk",

drivers/clk/spear/spear1310_clock.c

440

clk_register_clkdev(clk, "vco3_clk", NULL);

drivers/clk/spear/spear1310_clock.c

443

clk = clk_register_vco_pll("vco4_clk", "pll4_clk", NULL, "osc_24m_clk",

drivers/clk/spear/spear1310_clock.c

446

clk_register_clkdev(clk, "vco4_clk", NULL);

drivers/clk/spear/spear1310_clock.c

449

clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0,

drivers/clk/spear/spear1310_clock.c

451

clk_register_clkdev(clk, "pll5_clk", NULL);

drivers/clk/spear/spear1310_clock.c

453

clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0,

drivers/clk/spear/spear1310_clock.c

455

clk_register_clkdev(clk, "pll6_clk", NULL);

drivers/clk/spear/spear1310_clock.c

458

clk = clk_register_fixed_factor(NULL, "vco1div2_clk", "vco1_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

460

clk_register_clkdev(clk, "vco1div2_clk", NULL);

drivers/clk/spear/spear1310_clock.c

462

clk = clk_register_fixed_factor(NULL, "vco1div4_clk", "vco1_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

464

clk_register_clkdev(clk, "vco1div4_clk", NULL);

drivers/clk/spear/spear1310_clock.c

466

clk = clk_register_fixed_factor(NULL, "vco2div2_clk", "vco2_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

468

clk_register_clkdev(clk, "vco2div2_clk", NULL);

drivers/clk/spear/spear1310_clock.c

470

clk = clk_register_fixed_factor(NULL, "vco3div2_clk", "vco3_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

472

clk_register_clkdev(clk, "vco3div2_clk", NULL);

drivers/clk/spear/spear1310_clock.c

477

clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0,

drivers/clk/spear/spear1310_clock.c

480

clk_register_clkdev(clk, NULL, "spear_thermal");

drivers/clk/spear/spear1310_clock.c

483

clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

485

clk_register_clkdev(clk, "ddr_clk", NULL);

drivers/clk/spear/spear1310_clock.c

488

clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk",

drivers/clk/spear/spear1310_clock.c

490

clk_register_clkdev(clk, "cpu_clk", NULL);

drivers/clk/spear/spear1310_clock.c

492

clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

494

clk_register_clkdev(clk, NULL, "ec800620.wdt");

drivers/clk/spear/spear1310_clock.c

496

clk = clk_register_fixed_factor(NULL, "smp_twd_clk", "cpu_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

498

clk_register_clkdev(clk, NULL, "smp_twd");

drivers/clk/spear/spear1310_clock.c

500

clk = clk_register_fixed_factor(NULL, "ahb_clk", "pll1_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

502

clk_register_clkdev(clk, "ahb_clk", NULL);

drivers/clk/spear/spear1310_clock.c

504

clk = clk_register_fixed_factor(NULL, "apb_clk", "pll1_clk", 0, 1,

drivers/clk/spear/spear1310_clock.c

506

clk_register_clkdev(clk, "apb_clk", NULL);

drivers/clk/spear/spear1310_clock.c

509

clk = clk_register_mux(NULL, "gpt0_mclk", gpt_parents,

drivers/clk/spear/spear1310_clock.c

513

clk_register_clkdev(clk, "gpt0_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

514

clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mclk", 0,

drivers/clk/spear/spear1310_clock.c

517

clk_register_clkdev(clk, NULL, "gpt0");

drivers/clk/spear/spear1310_clock.c

519

clk = clk_register_mux(NULL, "gpt1_mclk", gpt_parents,

drivers/clk/spear/spear1310_clock.c

523

clk_register_clkdev(clk, "gpt1_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

524

clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,

drivers/clk/spear/spear1310_clock.c

527

clk_register_clkdev(clk, NULL, "gpt1");

drivers/clk/spear/spear1310_clock.c

529

clk = clk_register_mux(NULL, "gpt2_mclk", gpt_parents,

drivers/clk/spear/spear1310_clock.c

533

clk_register_clkdev(clk, "gpt2_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

534

clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,

drivers/clk/spear/spear1310_clock.c

537

clk_register_clkdev(clk, NULL, "gpt2");

drivers/clk/spear/spear1310_clock.c

539

clk = clk_register_mux(NULL, "gpt3_mclk", gpt_parents,

drivers/clk/spear/spear1310_clock.c

543

clk_register_clkdev(clk, "gpt3_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

544

clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0,

drivers/clk/spear/spear1310_clock.c

547

clk_register_clkdev(clk, NULL, "gpt3");

drivers/clk/spear/spear1310_clock.c

550

clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "vco1div2_clk",

drivers/clk/spear/spear1310_clock.c

553

clk_register_clkdev(clk, "uart_syn_clk", NULL);

drivers/clk/spear/spear1310_clock.c

556

clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,

drivers/clk/spear/spear1310_clock.c

561

clk_register_clkdev(clk, "uart0_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

563

clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk",

drivers/clk/spear/spear1310_clock.c

566

clk_register_clkdev(clk, NULL, "e0000000.serial");

drivers/clk/spear/spear1310_clock.c

568

clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk",

drivers/clk/spear/spear1310_clock.c

571

clk_register_clkdev(clk, "sdhci_syn_clk", NULL);

drivers/clk/spear/spear1310_clock.c

574

clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk",

drivers/clk/spear/spear1310_clock.c

577

clk_register_clkdev(clk, NULL, "b3000000.sdhci");

drivers/clk/spear/spear1310_clock.c

579

clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk",

drivers/clk/spear/spear1310_clock.c

582

clk_register_clkdev(clk, "cfxd_syn_clk", NULL);

drivers/clk/spear/spear1310_clock.c

585

clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk",

drivers/clk/spear/spear1310_clock.c

588

clk_register_clkdev(clk, NULL, "b2800000.cf");

drivers/clk/spear/spear1310_clock.c

589

clk_register_clkdev(clk, NULL, "arasan_xd");

drivers/clk/spear/spear1310_clock.c

591

clk = clk_register_aux("c3_syn_clk", "c3_syn_gclk", "vco1div2_clk",

drivers/clk/spear/spear1310_clock.c

594

clk_register_clkdev(clk, "c3_syn_clk", NULL);

drivers/clk/spear/spear1310_clock.c

597

clk = clk_register_mux(NULL, "c3_mclk", c3_parents,

drivers/clk/spear/spear1310_clock.c

602

clk_register_clkdev(clk, "c3_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

604

clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0,

drivers/clk/spear/spear1310_clock.c

607

clk_register_clkdev(clk, NULL, "c3");

drivers/clk/spear/spear1310_clock.c

610

clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents,

drivers/clk/spear/spear1310_clock.c

615

clk_register_clkdev(clk, "phy_input_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

617

clk = clk_register_aux("phy_syn_clk", "phy_syn_gclk", "phy_input_mclk",

drivers/clk/spear/spear1310_clock.c

620

clk_register_clkdev(clk, "phy_syn_clk", NULL);

drivers/clk/spear/spear1310_clock.c

623

clk = clk_register_mux(NULL, "phy_mclk", gmac_phy_parents,

drivers/clk/spear/spear1310_clock.c

627

clk_register_clkdev(clk, "stmmacphy.0", NULL);

drivers/clk/spear/spear1310_clock.c

630

clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents,

drivers/clk/spear/spear1310_clock.c

635

clk_register_clkdev(clk, "clcd_syn_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

637

clk = clk_register_frac("clcd_syn_clk", "clcd_syn_mclk", 0,

drivers/clk/spear/spear1310_clock.c

640

clk_register_clkdev(clk, "clcd_syn_clk", NULL);

drivers/clk/spear/spear1310_clock.c

642

clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents,

drivers/clk/spear/spear1310_clock.c

647

clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

649

clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,

drivers/clk/spear/spear1310_clock.c

652

clk_register_clkdev(clk, NULL, "e1000000.clcd");

drivers/clk/spear/spear1310_clock.c

655

clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents,

drivers/clk/spear/spear1310_clock.c

659

clk_register_clkdev(clk, "i2s_src_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

661

clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,

drivers/clk/spear/spear1310_clock.c

664

clk_register_clkdev(clk, "i2s_prs1_clk", NULL);

drivers/clk/spear/spear1310_clock.c

666

clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents,

drivers/clk/spear/spear1310_clock.c

671

clk_register_clkdev(clk, "i2s_ref_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

673

clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,

drivers/clk/spear/spear1310_clock.c

676

clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL);

drivers/clk/spear/spear1310_clock.c

678

clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gclk",

drivers/clk/spear/spear1310_clock.c

682

clk_register_clkdev(clk, "i2s_sclk_clk", NULL);

drivers/clk/spear/spear1310_clock.c

686

clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

689

clk_register_clkdev(clk, NULL, "e0280000.i2c");

drivers/clk/spear/spear1310_clock.c

691

clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

694

clk_register_clkdev(clk, NULL, "ea800000.dma");

drivers/clk/spear/spear1310_clock.c

695

clk_register_clkdev(clk, NULL, "eb000000.dma");

drivers/clk/spear/spear1310_clock.c

697

clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

700

clk_register_clkdev(clk, NULL, "b2000000.jpeg");

drivers/clk/spear/spear1310_clock.c

702

clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

705

clk_register_clkdev(clk, NULL, "e2000000.eth");

drivers/clk/spear/spear1310_clock.c

707

clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

710

clk_register_clkdev(clk, NULL, "b0000000.flash");

drivers/clk/spear/spear1310_clock.c

712

clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

715

clk_register_clkdev(clk, NULL, "ea000000.flash");

drivers/clk/spear/spear1310_clock.c

717

clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

720

clk_register_clkdev(clk, NULL, "e4000000.ohci");

drivers/clk/spear/spear1310_clock.c

721

clk_register_clkdev(clk, NULL, "e4800000.ehci");

drivers/clk/spear/spear1310_clock.c

723

clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

726

clk_register_clkdev(clk, NULL, "e5000000.ohci");

drivers/clk/spear/spear1310_clock.c

727

clk_register_clkdev(clk, NULL, "e5800000.ehci");

drivers/clk/spear/spear1310_clock.c

729

clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

732

clk_register_clkdev(clk, NULL, "e3800000.otg");

drivers/clk/spear/spear1310_clock.c

734

clk = clk_register_gate(NULL, "pcie_sata_0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

737

clk_register_clkdev(clk, NULL, "b1000000.pcie");

drivers/clk/spear/spear1310_clock.c

738

clk_register_clkdev(clk, NULL, "b1000000.ahci");

drivers/clk/spear/spear1310_clock.c

740

clk = clk_register_gate(NULL, "pcie_sata_1_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

743

clk_register_clkdev(clk, NULL, "b1800000.pcie");

drivers/clk/spear/spear1310_clock.c

744

clk_register_clkdev(clk, NULL, "b1800000.ahci");

drivers/clk/spear/spear1310_clock.c

746

clk = clk_register_gate(NULL, "pcie_sata_2_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

749

clk_register_clkdev(clk, NULL, "b4000000.pcie");

drivers/clk/spear/spear1310_clock.c

750

clk_register_clkdev(clk, NULL, "b4000000.ahci");

drivers/clk/spear/spear1310_clock.c

752

clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

755

clk_register_clkdev(clk, "sysram0_clk", NULL);

drivers/clk/spear/spear1310_clock.c

757

clk = clk_register_gate(NULL, "sysram1_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

760

clk_register_clkdev(clk, "sysram1_clk", NULL);

drivers/clk/spear/spear1310_clock.c

762

clk = clk_register_aux("adc_syn_clk", "adc_syn_gclk", "ahb_clk",

drivers/clk/spear/spear1310_clock.c

765

clk_register_clkdev(clk, "adc_syn_clk", NULL);

drivers/clk/spear/spear1310_clock.c

768

clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk",

drivers/clk/spear/spear1310_clock.c

771

clk_register_clkdev(clk, NULL, "e0080000.adc");

drivers/clk/spear/spear1310_clock.c

774

clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

777

clk_register_clkdev(clk, NULL, "e0100000.spi");

drivers/clk/spear/spear1310_clock.c

779

clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

782

clk_register_clkdev(clk, NULL, "e0600000.gpio");

drivers/clk/spear/spear1310_clock.c

784

clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

787

clk_register_clkdev(clk, NULL, "e0680000.gpio");

drivers/clk/spear/spear1310_clock.c

789

clk = clk_register_gate(NULL, "i2s0_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

792

clk_register_clkdev(clk, NULL, "e0180000.i2s");

drivers/clk/spear/spear1310_clock.c

794

clk = clk_register_gate(NULL, "i2s1_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

797

clk_register_clkdev(clk, NULL, "e0200000.i2s");

drivers/clk/spear/spear1310_clock.c

799

clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

802

clk_register_clkdev(clk, NULL, "e0300000.kbd");

drivers/clk/spear/spear1310_clock.c

805

clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents,

drivers/clk/spear/spear1310_clock.c

810

clk_register_clkdev(clk, "gen_syn0_1_clk", NULL);

drivers/clk/spear/spear1310_clock.c

812

clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents,

drivers/clk/spear/spear1310_clock.c

817

clk_register_clkdev(clk, "gen_syn2_3_clk", NULL);

drivers/clk/spear/spear1310_clock.c

819

clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_clk", 0,

drivers/clk/spear/spear1310_clock.c

822

clk_register_clkdev(clk, "gen_syn0_clk", NULL);

drivers/clk/spear/spear1310_clock.c

824

clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_clk", 0,

drivers/clk/spear/spear1310_clock.c

827

clk_register_clkdev(clk, "gen_syn1_clk", NULL);

drivers/clk/spear/spear1310_clock.c

829

clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_clk", 0,

drivers/clk/spear/spear1310_clock.c

832

clk_register_clkdev(clk, "gen_syn2_clk", NULL);

drivers/clk/spear/spear1310_clock.c

834

clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_clk", 0,

drivers/clk/spear/spear1310_clock.c

837

clk_register_clkdev(clk, "gen_syn3_clk", NULL);

drivers/clk/spear/spear1310_clock.c

839

clk = clk_register_gate(NULL, "ras_osc_24m_clk", "osc_24m_clk", 0,

drivers/clk/spear/spear1310_clock.c

842

clk_register_clkdev(clk, "ras_osc_24m_clk", NULL);

drivers/clk/spear/spear1310_clock.c

844

clk = clk_register_gate(NULL, "ras_osc_25m_clk", "osc_25m_clk", 0,

drivers/clk/spear/spear1310_clock.c

847

clk_register_clkdev(clk, "ras_osc_25m_clk", NULL);

drivers/clk/spear/spear1310_clock.c

849

clk = clk_register_gate(NULL, "ras_osc_32k_clk", "osc_32k_clk", 0,

drivers/clk/spear/spear1310_clock.c

852

clk_register_clkdev(clk, "ras_osc_32k_clk", NULL);

drivers/clk/spear/spear1310_clock.c

854

clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0,

drivers/clk/spear/spear1310_clock.c

857

clk_register_clkdev(clk, "ras_pll2_clk", NULL);

drivers/clk/spear/spear1310_clock.c

859

clk = clk_register_gate(NULL, "ras_pll3_clk", "pll3_clk", 0,

drivers/clk/spear/spear1310_clock.c

862

clk_register_clkdev(clk, "ras_pll3_clk", NULL);

drivers/clk/spear/spear1310_clock.c

864

clk = clk_register_gate(NULL, "ras_tx125_clk", "gmii_pad_clk", 0,

drivers/clk/spear/spear1310_clock.c

867

clk_register_clkdev(clk, "ras_tx125_clk", NULL);

drivers/clk/spear/spear1310_clock.c

869

clk = clk_register_fixed_rate(NULL, "ras_30m_fixed_clk", "pll5_clk", 0,

drivers/clk/spear/spear1310_clock.c

871

clk = clk_register_gate(NULL, "ras_30m_clk", "ras_30m_fixed_clk", 0,

drivers/clk/spear/spear1310_clock.c

874

clk_register_clkdev(clk, "ras_30m_clk", NULL);

drivers/clk/spear/spear1310_clock.c

876

clk = clk_register_fixed_rate(NULL, "ras_48m_fixed_clk", "pll5_clk", 0,

drivers/clk/spear/spear1310_clock.c

878

clk = clk_register_gate(NULL, "ras_48m_clk", "ras_48m_fixed_clk", 0,

drivers/clk/spear/spear1310_clock.c

881

clk_register_clkdev(clk, "ras_48m_clk", NULL);

drivers/clk/spear/spear1310_clock.c

883

clk = clk_register_gate(NULL, "ras_ahb_clk", "ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

886

clk_register_clkdev(clk, "ras_ahb_clk", NULL);

drivers/clk/spear/spear1310_clock.c

888

clk = clk_register_gate(NULL, "ras_apb_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

891

clk_register_clkdev(clk, "ras_apb_clk", NULL);

drivers/clk/spear/spear1310_clock.c

893

clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, 0,

drivers/clk/spear/spear1310_clock.c

896

clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, 0, 50000000);

drivers/clk/spear/spear1310_clock.c

898

clk = clk_register_gate(NULL, "can0_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

901

clk_register_clkdev(clk, NULL, "c_can_platform.0");

drivers/clk/spear/spear1310_clock.c

903

clk = clk_register_gate(NULL, "can1_clk", "apb_clk", 0,

drivers/clk/spear/spear1310_clock.c

906

clk_register_clkdev(clk, NULL, "c_can_platform.1");

drivers/clk/spear/spear1310_clock.c

908

clk = clk_register_gate(NULL, "ras_smii0_clk", "ras_ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

911

clk_register_clkdev(clk, NULL, "5c400000.eth");

drivers/clk/spear/spear1310_clock.c

913

clk = clk_register_gate(NULL, "ras_smii1_clk", "ras_ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

916

clk_register_clkdev(clk, NULL, "5c500000.eth");

drivers/clk/spear/spear1310_clock.c

918

clk = clk_register_gate(NULL, "ras_smii2_clk", "ras_ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

921

clk_register_clkdev(clk, NULL, "5c600000.eth");

drivers/clk/spear/spear1310_clock.c

923

clk = clk_register_gate(NULL, "ras_rgmii_clk", "ras_ahb_clk", 0,

drivers/clk/spear/spear1310_clock.c

926

clk_register_clkdev(clk, NULL, "5c700000.eth");

drivers/clk/spear/spear1310_clock.c

928

clk = clk_register_mux(NULL, "smii_rgmii_phy_mclk",

drivers/clk/spear/spear1310_clock.c

934

clk_register_clkdev(clk, "stmmacphy.1", NULL);

drivers/clk/spear/spear1310_clock.c

935

clk_register_clkdev(clk, "stmmacphy.2", NULL);

drivers/clk/spear/spear1310_clock.c

936

clk_register_clkdev(clk, "stmmacphy.4", NULL);

drivers/clk/spear/spear1310_clock.c

938

clk = clk_register_mux(NULL, "rmii_phy_mclk", rmii_phy_parents,

drivers/clk/spear/spear1310_clock.c

942

clk_register_clkdev(clk, "stmmacphy.3", NULL);

drivers/clk/spear/spear1310_clock.c

944

clk = clk_register_mux(NULL, "uart1_mclk", uart_parents,

drivers/clk/spear/spear1310_clock.c

948

clk_register_clkdev(clk, "uart1_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

950

clk = clk_register_gate(NULL, "uart1_clk", "uart1_mclk", 0,

drivers/clk/spear/spear1310_clock.c

953

clk_register_clkdev(clk, NULL, "5c800000.serial");

drivers/clk/spear/spear1310_clock.c

955

clk = clk_register_mux(NULL, "uart2_mclk", uart_parents,

drivers/clk/spear/spear1310_clock.c

959

clk_register_clkdev(clk, "uart2_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

961

clk = clk_register_gate(NULL, "uart2_clk", "uart2_mclk", 0,

drivers/clk/spear/spear1310_clock.c

964

clk_register_clkdev(clk, NULL, "5c900000.serial");

drivers/clk/spear/spear1310_clock.c

966

clk = clk_register_mux(NULL, "uart3_mclk", uart_parents,

drivers/clk/spear/spear1310_clock.c

970

clk_register_clkdev(clk, "uart3_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

972

clk = clk_register_gate(NULL, "uart3_clk", "uart3_mclk", 0,

drivers/clk/spear/spear1310_clock.c

975

clk_register_clkdev(clk, NULL, "5ca00000.serial");

drivers/clk/spear/spear1310_clock.c

977

clk = clk_register_mux(NULL, "uart4_mclk", uart_parents,

drivers/clk/spear/spear1310_clock.c

981

clk_register_clkdev(clk, "uart4_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

983

clk = clk_register_gate(NULL, "uart4_clk", "uart4_mclk", 0,

drivers/clk/spear/spear1310_clock.c

986

clk_register_clkdev(clk, NULL, "5cb00000.serial");

drivers/clk/spear/spear1310_clock.c

988

clk = clk_register_mux(NULL, "uart5_mclk", uart_parents,

drivers/clk/spear/spear1310_clock.c

992

clk_register_clkdev(clk, "uart5_mclk", NULL);

drivers/clk/spear/spear1310_clock.c

994

clk = clk_register_gate(NULL, "uart5_clk", "uart5_mclk", 0,

drivers/clk/spear/spear1310_clock.c

997

clk_register_clkdev(clk, NULL, "5cc00000.serial");

drivers/clk/spear/spear1310_clock.c

999

clk = clk_register_mux(NULL, "i2c1_mclk", i2c_parents,

drivers/clk/spear/spear1340_clock.c

1001

clk_register_clkdev(clk, NULL, "d0400000.cam2");

drivers/clk/spear/spear1340_clock.c

1003

clk = clk_register_gate(NULL, "cam3_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

1006

clk_register_clkdev(clk, NULL, "d0500000.cam3");

drivers/clk/spear/spear1340_clock.c

1008

clk = clk_register_gate(NULL, "pwm_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

1011

clk_register_clkdev(clk, NULL, "e0180000.pwm");

drivers/clk/spear/spear1340_clock.c

441

struct clk *clk, *clk1;

drivers/clk/spear/spear1340_clock.c

443

clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);

drivers/clk/spear/spear1340_clock.c

444

clk_register_clkdev(clk, "osc_32k_clk", NULL);

drivers/clk/spear/spear1340_clock.c

446

clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);

drivers/clk/spear/spear1340_clock.c

447

clk_register_clkdev(clk, "osc_24m_clk", NULL);

drivers/clk/spear/spear1340_clock.c

449

clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);

drivers/clk/spear/spear1340_clock.c

450

clk_register_clkdev(clk, "osc_25m_clk", NULL);

drivers/clk/spear/spear1340_clock.c

452

clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);

drivers/clk/spear/spear1340_clock.c

453

clk_register_clkdev(clk, "gmii_pad_clk", NULL);

drivers/clk/spear/spear1340_clock.c

455

clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,

drivers/clk/spear/spear1340_clock.c

457

clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);

drivers/clk/spear/spear1340_clock.c

460

clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,

drivers/clk/spear/spear1340_clock.c

463

clk_register_clkdev(clk, NULL, "e0580000.rtc");

drivers/clk/spear/spear1340_clock.c

467

clk = clk_register_mux(NULL, "vco1_mclk", vco_parents,

drivers/clk/spear/spear1340_clock.c

471

clk_register_clkdev(clk, "vco1_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

472

clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mclk", 0,

drivers/clk/spear/spear1340_clock.c

475

clk_register_clkdev(clk, "vco1_clk", NULL);

drivers/clk/spear/spear1340_clock.c

478

clk = clk_register_mux(NULL, "vco2_mclk", vco_parents,

drivers/clk/spear/spear1340_clock.c

482

clk_register_clkdev(clk, "vco2_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

483

clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk", 0,

drivers/clk/spear/spear1340_clock.c

486

clk_register_clkdev(clk, "vco2_clk", NULL);

drivers/clk/spear/spear1340_clock.c

489

clk = clk_register_mux(NULL, "vco3_mclk", vco_parents,

drivers/clk/spear/spear1340_clock.c

493

clk_register_clkdev(clk, "vco3_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

494

clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mclk", 0,

drivers/clk/spear/spear1340_clock.c

497

clk_register_clkdev(clk, "vco3_clk", NULL);

drivers/clk/spear/spear1340_clock.c

500

clk = clk_register_vco_pll("vco4_clk", "pll4_clk", NULL, "osc_24m_clk",

drivers/clk/spear/spear1340_clock.c

503

clk_register_clkdev(clk, "vco4_clk", NULL);

drivers/clk/spear/spear1340_clock.c

506

clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0,

drivers/clk/spear/spear1340_clock.c

508

clk_register_clkdev(clk, "pll5_clk", NULL);

drivers/clk/spear/spear1340_clock.c

510

clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0,

drivers/clk/spear/spear1340_clock.c

512

clk_register_clkdev(clk, "pll6_clk", NULL);

drivers/clk/spear/spear1340_clock.c

515

clk = clk_register_fixed_factor(NULL, "vco1div2_clk", "vco1_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

517

clk_register_clkdev(clk, "vco1div2_clk", NULL);

drivers/clk/spear/spear1340_clock.c

519

clk = clk_register_fixed_factor(NULL, "vco1div4_clk", "vco1_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

521

clk_register_clkdev(clk, "vco1div4_clk", NULL);

drivers/clk/spear/spear1340_clock.c

523

clk = clk_register_fixed_factor(NULL, "vco2div2_clk", "vco2_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

525

clk_register_clkdev(clk, "vco2div2_clk", NULL);

drivers/clk/spear/spear1340_clock.c

527

clk = clk_register_fixed_factor(NULL, "vco3div2_clk", "vco3_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

529

clk_register_clkdev(clk, "vco3div2_clk", NULL);

drivers/clk/spear/spear1340_clock.c

534

clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0,

drivers/clk/spear/spear1340_clock.c

537

clk_register_clkdev(clk, NULL, "e07008c4.thermal");

drivers/clk/spear/spear1340_clock.c

540

clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

542

clk_register_clkdev(clk, "ddr_clk", NULL);

drivers/clk/spear/spear1340_clock.c

545

clk = clk_register_frac("sys_syn_clk", "vco1div2_clk", 0,

drivers/clk/spear/spear1340_clock.c

548

clk_register_clkdev(clk, "sys_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

550

clk = clk_register_frac("amba_syn_clk", "vco1div2_clk", 0,

drivers/clk/spear/spear1340_clock.c

553

clk_register_clkdev(clk, "amba_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

555

clk = clk_register_mux(NULL, "sys_mclk", sys_parents,

drivers/clk/spear/spear1340_clock.c

559

clk_register_clkdev(clk, "sys_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

561

clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mclk", 0, 1,

drivers/clk/spear/spear1340_clock.c

563

clk_register_clkdev(clk, "cpu_clk", NULL);

drivers/clk/spear/spear1340_clock.c

565

clk = clk_register_fixed_factor(NULL, "cpu_div3_clk", "cpu_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

567

clk_register_clkdev(clk, "cpu_div3_clk", NULL);

drivers/clk/spear/spear1340_clock.c

569

clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

571

clk_register_clkdev(clk, NULL, "ec800620.wdt");

drivers/clk/spear/spear1340_clock.c

573

clk = clk_register_fixed_factor(NULL, "smp_twd_clk", "cpu_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

575

clk_register_clkdev(clk, NULL, "smp_twd");

drivers/clk/spear/spear1340_clock.c

577

clk = clk_register_mux(NULL, "ahb_clk", ahb_parents,

drivers/clk/spear/spear1340_clock.c

581

clk_register_clkdev(clk, "ahb_clk", NULL);

drivers/clk/spear/spear1340_clock.c

583

clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1,

drivers/clk/spear/spear1340_clock.c

585

clk_register_clkdev(clk, "apb_clk", NULL);

drivers/clk/spear/spear1340_clock.c

588

clk = clk_register_mux(NULL, "gpt0_mclk", gpt_parents,

drivers/clk/spear/spear1340_clock.c

592

clk_register_clkdev(clk, "gpt0_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

593

clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mclk", 0,

drivers/clk/spear/spear1340_clock.c

596

clk_register_clkdev(clk, NULL, "gpt0");

drivers/clk/spear/spear1340_clock.c

598

clk = clk_register_mux(NULL, "gpt1_mclk", gpt_parents,

drivers/clk/spear/spear1340_clock.c

602

clk_register_clkdev(clk, "gpt1_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

603

clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,

drivers/clk/spear/spear1340_clock.c

606

clk_register_clkdev(clk, NULL, "gpt1");

drivers/clk/spear/spear1340_clock.c

608

clk = clk_register_mux(NULL, "gpt2_mclk", gpt_parents,

drivers/clk/spear/spear1340_clock.c

612

clk_register_clkdev(clk, "gpt2_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

613

clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,

drivers/clk/spear/spear1340_clock.c

616

clk_register_clkdev(clk, NULL, "gpt2");

drivers/clk/spear/spear1340_clock.c

618

clk = clk_register_mux(NULL, "gpt3_mclk", gpt_parents,

drivers/clk/spear/spear1340_clock.c

622

clk_register_clkdev(clk, "gpt3_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

623

clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0,

drivers/clk/spear/spear1340_clock.c

626

clk_register_clkdev(clk, NULL, "gpt3");

drivers/clk/spear/spear1340_clock.c

629

clk = clk_register_aux("uart0_syn_clk", "uart0_syn_gclk",

drivers/clk/spear/spear1340_clock.c

632

clk_register_clkdev(clk, "uart0_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

635

clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,

drivers/clk/spear/spear1340_clock.c

640

clk_register_clkdev(clk, "uart0_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

642

clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk",

drivers/clk/spear/spear1340_clock.c

645

clk_register_clkdev(clk, NULL, "e0000000.serial");

drivers/clk/spear/spear1340_clock.c

647

clk = clk_register_aux("uart1_syn_clk", "uart1_syn_gclk",

drivers/clk/spear/spear1340_clock.c

650

clk_register_clkdev(clk, "uart1_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

653

clk = clk_register_mux(NULL, "uart1_mclk", uart1_parents,

drivers/clk/spear/spear1340_clock.c

657

clk_register_clkdev(clk, "uart1_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

659

clk = clk_register_gate(NULL, "uart1_clk", "uart1_mclk", 0,

drivers/clk/spear/spear1340_clock.c

662

clk_register_clkdev(clk, NULL, "b4100000.serial");

drivers/clk/spear/spear1340_clock.c

664

clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk",

drivers/clk/spear/spear1340_clock.c

667

clk_register_clkdev(clk, "sdhci_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

670

clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk",

drivers/clk/spear/spear1340_clock.c

673

clk_register_clkdev(clk, NULL, "b3000000.sdhci");

drivers/clk/spear/spear1340_clock.c

675

clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk",

drivers/clk/spear/spear1340_clock.c

678

clk_register_clkdev(clk, "cfxd_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

681

clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk",

drivers/clk/spear/spear1340_clock.c

684

clk_register_clkdev(clk, NULL, "b2800000.cf");

drivers/clk/spear/spear1340_clock.c

685

clk_register_clkdev(clk, NULL, "arasan_xd");

drivers/clk/spear/spear1340_clock.c

687

clk = clk_register_aux("c3_syn_clk", "c3_syn_gclk", "vco1div2_clk", 0,

drivers/clk/spear/spear1340_clock.c

690

clk_register_clkdev(clk, "c3_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

693

clk = clk_register_mux(NULL, "c3_mclk", c3_parents,

drivers/clk/spear/spear1340_clock.c

698

clk_register_clkdev(clk, "c3_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

700

clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", CLK_SET_RATE_PARENT,

drivers/clk/spear/spear1340_clock.c

703

clk_register_clkdev(clk, NULL, "e1800000.c3");

drivers/clk/spear/spear1340_clock.c

706

clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents,

drivers/clk/spear/spear1340_clock.c

711

clk_register_clkdev(clk, "phy_input_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

713

clk = clk_register_aux("phy_syn_clk", "phy_syn_gclk", "phy_input_mclk",

drivers/clk/spear/spear1340_clock.c

716

clk_register_clkdev(clk, "phy_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

719

clk = clk_register_mux(NULL, "phy_mclk", gmac_phy_parents,

drivers/clk/spear/spear1340_clock.c

723

clk_register_clkdev(clk, "stmmacphy.0", NULL);

drivers/clk/spear/spear1340_clock.c

726

clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents,

drivers/clk/spear/spear1340_clock.c

731

clk_register_clkdev(clk, "clcd_syn_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

733

clk = clk_register_frac("clcd_syn_clk", "clcd_syn_mclk", 0,

drivers/clk/spear/spear1340_clock.c

736

clk_register_clkdev(clk, "clcd_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

738

clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents,

drivers/clk/spear/spear1340_clock.c

743

clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

745

clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,

drivers/clk/spear/spear1340_clock.c

748

clk_register_clkdev(clk, NULL, "e1000000.clcd");

drivers/clk/spear/spear1340_clock.c

751

clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents,

drivers/clk/spear/spear1340_clock.c

755

clk_register_clkdev(clk, "i2s_src_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

757

clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk",

drivers/clk/spear/spear1340_clock.c

761

clk_register_clkdev(clk, "i2s_prs1_clk", NULL);

drivers/clk/spear/spear1340_clock.c

763

clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents,

drivers/clk/spear/spear1340_clock.c

768

clk_register_clkdev(clk, "i2s_ref_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

770

clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,

drivers/clk/spear/spear1340_clock.c

773

clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL);

drivers/clk/spear/spear1340_clock.c

775

clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gclk", "i2s_ref_mclk",

drivers/clk/spear/spear1340_clock.c

779

clk_register_clkdev(clk, "i2s_sclk_clk", NULL);

drivers/clk/spear/spear1340_clock.c

783

clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

786

clk_register_clkdev(clk, NULL, "e0280000.i2c");

drivers/clk/spear/spear1340_clock.c

788

clk = clk_register_gate(NULL, "i2c1_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

791

clk_register_clkdev(clk, NULL, "b4000000.i2c");

drivers/clk/spear/spear1340_clock.c

793

clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

796

clk_register_clkdev(clk, NULL, "ea800000.dma");

drivers/clk/spear/spear1340_clock.c

797

clk_register_clkdev(clk, NULL, "eb000000.dma");

drivers/clk/spear/spear1340_clock.c

799

clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

802

clk_register_clkdev(clk, NULL, "e2000000.eth");

drivers/clk/spear/spear1340_clock.c

804

clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

807

clk_register_clkdev(clk, NULL, "b0000000.flash");

drivers/clk/spear/spear1340_clock.c

809

clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

812

clk_register_clkdev(clk, NULL, "ea000000.flash");

drivers/clk/spear/spear1340_clock.c

814

clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

817

clk_register_clkdev(clk, NULL, "e4000000.ohci");

drivers/clk/spear/spear1340_clock.c

818

clk_register_clkdev(clk, NULL, "e4800000.ehci");

drivers/clk/spear/spear1340_clock.c

820

clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

823

clk_register_clkdev(clk, NULL, "e5000000.ohci");

drivers/clk/spear/spear1340_clock.c

824

clk_register_clkdev(clk, NULL, "e5800000.ehci");

drivers/clk/spear/spear1340_clock.c

826

clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

829

clk_register_clkdev(clk, NULL, "e3800000.otg");

drivers/clk/spear/spear1340_clock.c

831

clk = clk_register_gate(NULL, "pcie_sata_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

834

clk_register_clkdev(clk, NULL, "b1000000.pcie");

drivers/clk/spear/spear1340_clock.c

835

clk_register_clkdev(clk, NULL, "b1000000.ahci");

drivers/clk/spear/spear1340_clock.c

837

clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

840

clk_register_clkdev(clk, "sysram0_clk", NULL);

drivers/clk/spear/spear1340_clock.c

842

clk = clk_register_gate(NULL, "sysram1_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

845

clk_register_clkdev(clk, "sysram1_clk", NULL);

drivers/clk/spear/spear1340_clock.c

847

clk = clk_register_aux("adc_syn_clk", "adc_syn_gclk", "ahb_clk",

drivers/clk/spear/spear1340_clock.c

850

clk_register_clkdev(clk, "adc_syn_clk", NULL);

drivers/clk/spear/spear1340_clock.c

853

clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk",

drivers/clk/spear/spear1340_clock.c

856

clk_register_clkdev(clk, NULL, "e0080000.adc");

drivers/clk/spear/spear1340_clock.c

859

clk = clk_register_gate(NULL, "ssp_clk", "apb_clk", 0,

drivers/clk/spear/spear1340_clock.c

862

clk_register_clkdev(clk, NULL, "e0100000.spi");

drivers/clk/spear/spear1340_clock.c

864

clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0,

drivers/clk/spear/spear1340_clock.c

867

clk_register_clkdev(clk, NULL, "e0600000.gpio");

drivers/clk/spear/spear1340_clock.c

869

clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0,

drivers/clk/spear/spear1340_clock.c

872

clk_register_clkdev(clk, NULL, "e0680000.gpio");

drivers/clk/spear/spear1340_clock.c

874

clk = clk_register_gate(NULL, "i2s_play_clk", "apb_clk", 0,

drivers/clk/spear/spear1340_clock.c

877

clk_register_clkdev(clk, NULL, "b2400000.i2s-play");

drivers/clk/spear/spear1340_clock.c

879

clk = clk_register_gate(NULL, "i2s_rec_clk", "apb_clk", 0,

drivers/clk/spear/spear1340_clock.c

882

clk_register_clkdev(clk, NULL, "b2000000.i2s-rec");

drivers/clk/spear/spear1340_clock.c

884

clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0,

drivers/clk/spear/spear1340_clock.c

887

clk_register_clkdev(clk, NULL, "e0300000.kbd");

drivers/clk/spear/spear1340_clock.c

890

clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents,

drivers/clk/spear/spear1340_clock.c

895

clk_register_clkdev(clk, "gen_syn0_1_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

897

clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents,

drivers/clk/spear/spear1340_clock.c

902

clk_register_clkdev(clk, "gen_syn2_3_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

904

clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_mclk", 0,

drivers/clk/spear/spear1340_clock.c

907

clk_register_clkdev(clk, "gen_syn0_clk", NULL);

drivers/clk/spear/spear1340_clock.c

909

clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_mclk", 0,

drivers/clk/spear/spear1340_clock.c

912

clk_register_clkdev(clk, "gen_syn1_clk", NULL);

drivers/clk/spear/spear1340_clock.c

914

clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_mclk", 0,

drivers/clk/spear/spear1340_clock.c

917

clk_register_clkdev(clk, "gen_syn2_clk", NULL);

drivers/clk/spear/spear1340_clock.c

919

clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_mclk", 0,

drivers/clk/spear/spear1340_clock.c

922

clk_register_clkdev(clk, "gen_syn3_clk", NULL);

drivers/clk/spear/spear1340_clock.c

924

clk = clk_register_gate(NULL, "mali_clk", "gen_syn3_clk",

drivers/clk/spear/spear1340_clock.c

927

clk_register_clkdev(clk, NULL, "mali");

drivers/clk/spear/spear1340_clock.c

929

clk = clk_register_gate(NULL, "cec0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

932

clk_register_clkdev(clk, NULL, "spear_cec.0");

drivers/clk/spear/spear1340_clock.c

934

clk = clk_register_gate(NULL, "cec1_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

937

clk_register_clkdev(clk, NULL, "spear_cec.1");

drivers/clk/spear/spear1340_clock.c

939

clk = clk_register_mux(NULL, "spdif_out_mclk", spdif_out_parents,

drivers/clk/spear/spear1340_clock.c

944

clk_register_clkdev(clk, "spdif_out_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

946

clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mclk",

drivers/clk/spear/spear1340_clock.c

949

clk_register_clkdev(clk, NULL, "d0000000.spdif-out");

drivers/clk/spear/spear1340_clock.c

951

clk = clk_register_mux(NULL, "spdif_in_mclk", spdif_in_parents,

drivers/clk/spear/spear1340_clock.c

956

clk_register_clkdev(clk, "spdif_in_mclk", NULL);

drivers/clk/spear/spear1340_clock.c

958

clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mclk",

drivers/clk/spear/spear1340_clock.c

961

clk_register_clkdev(clk, NULL, "d0100000.spdif-in");

drivers/clk/spear/spear1340_clock.c

963

clk = clk_register_gate(NULL, "acp_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

966

clk_register_clkdev(clk, NULL, "acp_clk");

drivers/clk/spear/spear1340_clock.c

968

clk = clk_register_gate(NULL, "plgpio_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

971

clk_register_clkdev(clk, NULL, "e2800000.gpio");

drivers/clk/spear/spear1340_clock.c

973

clk = clk_register_gate(NULL, "video_dec_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

976

clk_register_clkdev(clk, NULL, "video_dec");

drivers/clk/spear/spear1340_clock.c

978

clk = clk_register_gate(NULL, "video_enc_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

981

clk_register_clkdev(clk, NULL, "video_enc");

drivers/clk/spear/spear1340_clock.c

983

clk = clk_register_gate(NULL, "video_in_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

986

clk_register_clkdev(clk, NULL, "spear_vip");

drivers/clk/spear/spear1340_clock.c

988

clk = clk_register_gate(NULL, "cam0_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

991

clk_register_clkdev(clk, NULL, "d0200000.cam0");

drivers/clk/spear/spear1340_clock.c

993

clk = clk_register_gate(NULL, "cam1_clk", "ahb_clk", 0,

drivers/clk/spear/spear1340_clock.c

996

clk_register_clkdev(clk, NULL, "d0300000.cam1");

drivers/clk/spear/spear1340_clock.c

998

clk = clk_register_gate(NULL, "cam2_clk", "ahb_clk", 0,

drivers/clk/spear/spear3xx_clock.c

141

struct clk *clk;

drivers/clk/spear/spear3xx_clock.c

143

clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,

drivers/clk/spear/spear3xx_clock.c

145

clk_register_clkdev(clk, NULL, "60000000.clcd");

drivers/clk/spear/spear3xx_clock.c

147

clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

149

clk_register_clkdev(clk, NULL, "94000000.flash");

drivers/clk/spear/spear3xx_clock.c

151

clk = clk_register_fixed_factor(NULL, "sdhci_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

153

clk_register_clkdev(clk, NULL, "70000000.sdhci");

drivers/clk/spear/spear3xx_clock.c

155

clk = clk_register_fixed_factor(NULL, "gpio1_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

157

clk_register_clkdev(clk, NULL, "a9000000.gpio");

drivers/clk/spear/spear3xx_clock.c

159

clk = clk_register_fixed_factor(NULL, "kbd_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

161

clk_register_clkdev(clk, NULL, "a0000000.kbd");

drivers/clk/spear/spear3xx_clock.c

171

struct clk *clk;

drivers/clk/spear/spear3xx_clock.c

173

clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

175

clk_register_clkdev(clk, "emi", NULL);

drivers/clk/spear/spear3xx_clock.c

177

clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

179

clk_register_clkdev(clk, NULL, "44000000.flash");

drivers/clk/spear/spear3xx_clock.c

181

clk = clk_register_fixed_factor(NULL, "tdm_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

183

clk_register_clkdev(clk, NULL, "tdm");

drivers/clk/spear/spear3xx_clock.c

185

clk = clk_register_fixed_factor(NULL, "uart1_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

187

clk_register_clkdev(clk, NULL, "b2000000.serial");

drivers/clk/spear/spear3xx_clock.c

189

clk = clk_register_fixed_factor(NULL, "uart2_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

191

clk_register_clkdev(clk, NULL, "b2080000.serial");

drivers/clk/spear/spear3xx_clock.c

193

clk = clk_register_fixed_factor(NULL, "uart3_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

195

clk_register_clkdev(clk, NULL, "b2100000.serial");

drivers/clk/spear/spear3xx_clock.c

197

clk = clk_register_fixed_factor(NULL, "uart4_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

199

clk_register_clkdev(clk, NULL, "b2180000.serial");

drivers/clk/spear/spear3xx_clock.c

201

clk = clk_register_fixed_factor(NULL, "uart5_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

203

clk_register_clkdev(clk, NULL, "b2200000.serial");

drivers/clk/spear/spear3xx_clock.c

247

struct clk *ras_apb_clk)

drivers/clk/spear/spear3xx_clock.c

249

struct clk *clk;

drivers/clk/spear/spear3xx_clock.c

251

clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL,

drivers/clk/spear/spear3xx_clock.c

253

clk_register_clkdev(clk, "smii_125m_pad", NULL);

drivers/clk/spear/spear3xx_clock.c

255

clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,

drivers/clk/spear/spear3xx_clock.c

257

clk_register_clkdev(clk, NULL, "90000000.clcd");

drivers/clk/spear/spear3xx_clock.c

259

clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

261

clk_register_clkdev(clk, "emi", NULL);

drivers/clk/spear/spear3xx_clock.c

263

clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

265

clk_register_clkdev(clk, NULL, "4c000000.flash");

drivers/clk/spear/spear3xx_clock.c

267

clk = clk_register_fixed_factor(NULL, "i2c1_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

269

clk_register_clkdev(clk, NULL, "a7000000.i2c");

drivers/clk/spear/spear3xx_clock.c

271

clk = clk_register_fixed_factor(NULL, "pwm_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

273

clk_register_clkdev(clk, NULL, "a8000000.pwm");

drivers/clk/spear/spear3xx_clock.c

275

clk = clk_register_fixed_factor(NULL, "ssp1_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

277

clk_register_clkdev(clk, NULL, "a5000000.spi");

drivers/clk/spear/spear3xx_clock.c

279

clk = clk_register_fixed_factor(NULL, "ssp2_clk", "ras_ahb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

281

clk_register_clkdev(clk, NULL, "a6000000.spi");

drivers/clk/spear/spear3xx_clock.c

283

clk = clk_register_fixed_factor(NULL, "can0_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

285

clk_register_clkdev(clk, NULL, "c_can_platform.0");

drivers/clk/spear/spear3xx_clock.c

287

clk = clk_register_fixed_factor(NULL, "can1_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

289

clk_register_clkdev(clk, NULL, "c_can_platform.1");

drivers/clk/spear/spear3xx_clock.c

291

clk = clk_register_fixed_factor(NULL, "i2s_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

293

clk_register_clkdev(clk, NULL, "a9400000.i2s");

drivers/clk/spear/spear3xx_clock.c

295

clk = clk_register_mux(NULL, "i2s_ref_clk", i2s_ref_parents,

drivers/clk/spear/spear3xx_clock.c

300

clk_register_clkdev(clk, "i2s_ref_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

302

clk = clk_register_fixed_factor(NULL, "i2s_sclk", "i2s_ref_clk",

drivers/clk/spear/spear3xx_clock.c

305

clk_register_clkdev(clk, "i2s_sclk", NULL);

drivers/clk/spear/spear3xx_clock.c

307

clk = clk_register_fixed_factor(NULL, "macb1_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

309

clk_register_clkdev(clk, "hclk", "aa000000.eth");

drivers/clk/spear/spear3xx_clock.c

311

clk = clk_register_fixed_factor(NULL, "macb2_clk", "ras_apb_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

313

clk_register_clkdev(clk, "hclk", "ab000000.eth");

drivers/clk/spear/spear3xx_clock.c

315

clk = clk_register_mux(NULL, "rs485_clk", uartx_parents,

drivers/clk/spear/spear3xx_clock.c

320

clk_register_clkdev(clk, NULL, "a9300000.serial");

drivers/clk/spear/spear3xx_clock.c

322

clk = clk_register_mux(NULL, "sdhci_clk", sdhci_parents,

drivers/clk/spear/spear3xx_clock.c

327

clk_register_clkdev(clk, NULL, "70000000.sdhci");

drivers/clk/spear/spear3xx_clock.c

329

clk = clk_register_mux(NULL, "smii_pclk", smii0_parents,

drivers/clk/spear/spear3xx_clock.c

333

clk_register_clkdev(clk, NULL, "smii_pclk");

drivers/clk/spear/spear3xx_clock.c

335

clk = clk_register_fixed_factor(NULL, "smii_clk", "smii_pclk", 0, 1, 1);

drivers/clk/spear/spear3xx_clock.c

336

clk_register_clkdev(clk, NULL, "smii");

drivers/clk/spear/spear3xx_clock.c

338

clk = clk_register_mux(NULL, "uart1_clk", uartx_parents,

drivers/clk/spear/spear3xx_clock.c

343

clk_register_clkdev(clk, NULL, "a3000000.serial");

drivers/clk/spear/spear3xx_clock.c

345

clk_set_parent(clk, ras_apb_clk);

drivers/clk/spear/spear3xx_clock.c

347

clk = clk_register_mux(NULL, "uart2_clk", uartx_parents,

drivers/clk/spear/spear3xx_clock.c

352

clk_register_clkdev(clk, NULL, "a4000000.serial");

drivers/clk/spear/spear3xx_clock.c

354

clk_set_parent(clk, ras_apb_clk);

drivers/clk/spear/spear3xx_clock.c

356

clk = clk_register_mux(NULL, "uart3_clk", uartx_parents,

drivers/clk/spear/spear3xx_clock.c

361

clk_register_clkdev(clk, NULL, "a9100000.serial");

drivers/clk/spear/spear3xx_clock.c

363

clk = clk_register_mux(NULL, "uart4_clk", uartx_parents,

drivers/clk/spear/spear3xx_clock.c

368

clk_register_clkdev(clk, NULL, "a9200000.serial");

drivers/clk/spear/spear3xx_clock.c

370

clk = clk_register_mux(NULL, "uart5_clk", uartx_parents,

drivers/clk/spear/spear3xx_clock.c

375

clk_register_clkdev(clk, NULL, "60000000.serial");

drivers/clk/spear/spear3xx_clock.c

377

clk = clk_register_mux(NULL, "uart6_clk", uartx_parents,

drivers/clk/spear/spear3xx_clock.c

382

clk_register_clkdev(clk, NULL, "60100000.serial");

drivers/clk/spear/spear3xx_clock.c

385

static inline void spear320_clk_init(void __iomem *sb, struct clk *rc) { }

drivers/clk/spear/spear3xx_clock.c

390

struct clk *clk, *clk1, *ras_apb_clk;

drivers/clk/spear/spear3xx_clock.c

392

clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);

drivers/clk/spear/spear3xx_clock.c

393

clk_register_clkdev(clk, "osc_32k_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

395

clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);

drivers/clk/spear/spear3xx_clock.c

396

clk_register_clkdev(clk, "osc_24m_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

399

clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,

drivers/clk/spear/spear3xx_clock.c

401

clk_register_clkdev(clk, NULL, "fc900000.rtc");

drivers/clk/spear/spear3xx_clock.c

404

clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0,

drivers/clk/spear/spear3xx_clock.c

406

clk_register_clkdev(clk, "pll3_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

408

clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_24m_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

410

clk_register_clkdev(clk, NULL, "fc880000.wdt");

drivers/clk/spear/spear3xx_clock.c

412

clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL,

drivers/clk/spear/spear3xx_clock.c

415

clk_register_clkdev(clk, "vco1_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

418

clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL,

drivers/clk/spear/spear3xx_clock.c

421

clk_register_clkdev(clk, "vco2_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

425

clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk",

drivers/clk/spear/spear3xx_clock.c

427

clk_register_clkdev(clk, "cpu_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

429

clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",

drivers/clk/spear/spear3xx_clock.c

432

clk_register_clkdev(clk, "ahb_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

434

clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "pll1_clk", 0,

drivers/clk/spear/spear3xx_clock.c

437

clk_register_clkdev(clk, "uart_syn_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

440

clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,

drivers/clk/spear/spear3xx_clock.c

445

clk_register_clkdev(clk, "uart0_mclk", NULL);

drivers/clk/spear/spear3xx_clock.c

447

clk = clk_register_gate(NULL, "uart0", "uart0_mclk",

drivers/clk/spear/spear3xx_clock.c

450

clk_register_clkdev(clk, NULL, "d0000000.serial");

drivers/clk/spear/spear3xx_clock.c

452

clk = clk_register_aux("firda_syn_clk", "firda_syn_gclk", "pll1_clk", 0,

drivers/clk/spear/spear3xx_clock.c

455

clk_register_clkdev(clk, "firda_syn_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

458

clk = clk_register_mux(NULL, "firda_mclk", firda_parents,

drivers/clk/spear/spear3xx_clock.c

463

clk_register_clkdev(clk, "firda_mclk", NULL);

drivers/clk/spear/spear3xx_clock.c

465

clk = clk_register_gate(NULL, "firda_clk", "firda_mclk",

drivers/clk/spear/spear3xx_clock.c

468

clk_register_clkdev(clk, NULL, "firda");

drivers/clk/spear/spear3xx_clock.c

473

clk = clk_register_mux(NULL, "gpt0_clk", gpt0_parents,

drivers/clk/spear/spear3xx_clock.c

477

clk_register_clkdev(clk, NULL, "gpt0");

drivers/clk/spear/spear3xx_clock.c

481

clk = clk_register_mux(NULL, "gpt1_mclk", gpt1_parents,

drivers/clk/spear/spear3xx_clock.c

485

clk_register_clkdev(clk, "gpt1_mclk", NULL);

drivers/clk/spear/spear3xx_clock.c

486

clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk",

drivers/clk/spear/spear3xx_clock.c

489

clk_register_clkdev(clk, NULL, "gpt1");

drivers/clk/spear/spear3xx_clock.c

493

clk = clk_register_mux(NULL, "gpt2_mclk", gpt2_parents,

drivers/clk/spear/spear3xx_clock.c

497

clk_register_clkdev(clk, "gpt2_mclk", NULL);

drivers/clk/spear/spear3xx_clock.c

498

clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk",

drivers/clk/spear/spear3xx_clock.c

501

clk_register_clkdev(clk, NULL, "gpt2");

drivers/clk/spear/spear3xx_clock.c

504

clk = clk_register_aux("gen0_syn_clk", "gen0_syn_gclk", "pll1_clk",

drivers/clk/spear/spear3xx_clock.c

507

clk_register_clkdev(clk, "gen0_syn_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

510

clk = clk_register_aux("gen1_syn_clk", "gen1_syn_gclk", "pll1_clk",

drivers/clk/spear/spear3xx_clock.c

513

clk_register_clkdev(clk, "gen1_syn_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

516

clk = clk_register_mux(NULL, "gen2_3_par_clk", gen2_3_parents,

drivers/clk/spear/spear3xx_clock.c

520

clk_register_clkdev(clk, "gen2_3_par_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

522

clk = clk_register_aux("gen2_syn_clk", "gen2_syn_gclk",

drivers/clk/spear/spear3xx_clock.c

525

clk_register_clkdev(clk, "gen2_syn_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

528

clk = clk_register_aux("gen3_syn_clk", "gen3_syn_gclk",

drivers/clk/spear/spear3xx_clock.c

531

clk_register_clkdev(clk, "gen3_syn_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

535

clk = clk_register_gate(NULL, "usbh_clk", "pll3_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

537

clk_register_clkdev(clk, NULL, "e1800000.ehci");

drivers/clk/spear/spear3xx_clock.c

538

clk_register_clkdev(clk, NULL, "e1900000.ohci");

drivers/clk/spear/spear3xx_clock.c

539

clk_register_clkdev(clk, NULL, "e2100000.ohci");

drivers/clk/spear/spear3xx_clock.c

541

clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

543

clk_register_clkdev(clk, "usbh.0_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

545

clk = clk_register_fixed_factor(NULL, "usbh.1_clk", "usbh_clk", 0, 1,

drivers/clk/spear/spear3xx_clock.c

547

clk_register_clkdev(clk, "usbh.1_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

549

clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

551

clk_register_clkdev(clk, NULL, "e1100000.usbd");

drivers/clk/spear/spear3xx_clock.c

554

clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2,

drivers/clk/spear/spear3xx_clock.c

556

clk_register_clkdev(clk, "ahbmult2_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

558

clk = clk_register_mux(NULL, "ddr_clk", ddr_parents,

drivers/clk/spear/spear3xx_clock.c

561

clk_register_clkdev(clk, "ddr_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

563

clk = clk_register_divider(NULL, "apb_clk", "ahb_clk",

drivers/clk/spear/spear3xx_clock.c

566

clk_register_clkdev(clk, "apb_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

568

clk = clk_register_gate(NULL, "amem_clk", "ahb_clk", 0, AMEM_CLK_CFG,

drivers/clk/spear/spear3xx_clock.c

570

clk_register_clkdev(clk, "amem_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

572

clk = clk_register_gate(NULL, "c3_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

574

clk_register_clkdev(clk, NULL, "c3_clk");

drivers/clk/spear/spear3xx_clock.c

576

clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

578

clk_register_clkdev(clk, NULL, "fc400000.dma");

drivers/clk/spear/spear3xx_clock.c

580

clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

582

clk_register_clkdev(clk, NULL, "e0800000.eth");

drivers/clk/spear/spear3xx_clock.c

584

clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

586

clk_register_clkdev(clk, NULL, "d0180000.i2c");

drivers/clk/spear/spear3xx_clock.c

588

clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

590

clk_register_clkdev(clk, NULL, "jpeg");

drivers/clk/spear/spear3xx_clock.c

592

clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

594

clk_register_clkdev(clk, NULL, "fc000000.flash");

drivers/clk/spear/spear3xx_clock.c

597

clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

599

clk_register_clkdev(clk, NULL, "d0080000.adc");

drivers/clk/spear/spear3xx_clock.c

601

clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

603

clk_register_clkdev(clk, NULL, "fc980000.gpio");

drivers/clk/spear/spear3xx_clock.c

605

clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

607

clk_register_clkdev(clk, NULL, "d0100000.spi");

drivers/clk/spear/spear3xx_clock.c

610

clk = clk_register_gate(NULL, "ras_ahb_clk", "ahb_clk", 0, RAS_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

612

clk_register_clkdev(clk, "ras_ahb_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

614

clk = clk_register_gate(NULL, "ras_apb_clk", "apb_clk", 0, RAS_CLK_ENB,

drivers/clk/spear/spear3xx_clock.c

616

clk_register_clkdev(clk, "ras_apb_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

617

ras_apb_clk = clk;

drivers/clk/spear/spear3xx_clock.c

619

clk = clk_register_gate(NULL, "ras_32k_clk", "osc_32k_clk", 0,

drivers/clk/spear/spear3xx_clock.c

621

clk_register_clkdev(clk, "ras_32k_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

623

clk = clk_register_gate(NULL, "ras_24m_clk", "osc_24m_clk", 0,

drivers/clk/spear/spear3xx_clock.c

625

clk_register_clkdev(clk, "ras_24m_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

627

clk = clk_register_gate(NULL, "ras_pll1_clk", "pll1_clk", 0,

drivers/clk/spear/spear3xx_clock.c

629

clk_register_clkdev(clk, "ras_pll1_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

631

clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0,

drivers/clk/spear/spear3xx_clock.c

633

clk_register_clkdev(clk, "ras_pll2_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

635

clk = clk_register_gate(NULL, "ras_pll3_clk", "pll3_clk", 0,

drivers/clk/spear/spear3xx_clock.c

637

clk_register_clkdev(clk, "ras_pll3_clk", NULL);

drivers/clk/spear/spear3xx_clock.c

639

clk = clk_register_gate(NULL, "ras_syn0_gclk", "gen0_syn_gclk",

drivers/clk/spear/spear3xx_clock.c

642

clk_register_clkdev(clk, "ras_syn0_gclk", NULL);

drivers/clk/spear/spear3xx_clock.c

644

clk = clk_register_gate(NULL, "ras_syn1_gclk", "gen1_syn_gclk",

drivers/clk/spear/spear3xx_clock.c

647

clk_register_clkdev(clk, "ras_syn1_gclk", NULL);

drivers/clk/spear/spear3xx_clock.c

649

clk = clk_register_gate(NULL, "ras_syn2_gclk", "gen2_syn_gclk",

drivers/clk/spear/spear3xx_clock.c

652

clk_register_clkdev(clk, "ras_syn2_gclk", NULL);

drivers/clk/spear/spear3xx_clock.c

654

clk = clk_register_gate(NULL, "ras_syn3_gclk", "gen3_syn_gclk",

drivers/clk/spear/spear3xx_clock.c

657

clk_register_clkdev(clk, "ras_syn3_gclk", NULL);

drivers/clk/spear/spear6xx_clock.c

116

struct clk *clk, *clk1;

drivers/clk/spear/spear6xx_clock.c

118

clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);

drivers/clk/spear/spear6xx_clock.c

119

clk_register_clkdev(clk, "osc_32k_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

121

clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, 0, 30000000);

drivers/clk/spear/spear6xx_clock.c

122

clk_register_clkdev(clk, "osc_30m_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

125

clk = clk_register_gate(NULL, "rtc_spear", "osc_32k_clk", 0,

drivers/clk/spear/spear6xx_clock.c

127

clk_register_clkdev(clk, NULL, "rtc-spear");

drivers/clk/spear/spear6xx_clock.c

130

clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0,

drivers/clk/spear/spear6xx_clock.c

132

clk_register_clkdev(clk, "pll3_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

134

clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "osc_30m_clk",

drivers/clk/spear/spear6xx_clock.c

137

clk_register_clkdev(clk, "vco1_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

140

clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "osc_30m_clk",

drivers/clk/spear/spear6xx_clock.c

143

clk_register_clkdev(clk, "vco2_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

146

clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_30m_clk", 0, 1,

drivers/clk/spear/spear6xx_clock.c

148

clk_register_clkdev(clk, NULL, "fc880000.wdt");

drivers/clk/spear/spear6xx_clock.c

151

clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk",

drivers/clk/spear/spear6xx_clock.c

153

clk_register_clkdev(clk, "cpu_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

155

clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",

drivers/clk/spear/spear6xx_clock.c

158

clk_register_clkdev(clk, "ahb_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

160

clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "pll1_clk", 0,

drivers/clk/spear/spear6xx_clock.c

163

clk_register_clkdev(clk, "uart_syn_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

166

clk = clk_register_mux(NULL, "uart_mclk", uart_parents,

drivers/clk/spear/spear6xx_clock.c

170

clk_register_clkdev(clk, "uart_mclk", NULL);

drivers/clk/spear/spear6xx_clock.c

172

clk = clk_register_gate(NULL, "uart0", "uart_mclk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

174

clk_register_clkdev(clk, NULL, "d0000000.serial");

drivers/clk/spear/spear6xx_clock.c

176

clk = clk_register_gate(NULL, "uart1", "uart_mclk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

178

clk_register_clkdev(clk, NULL, "d0080000.serial");

drivers/clk/spear/spear6xx_clock.c

180

clk = clk_register_aux("firda_syn_clk", "firda_syn_gclk", "pll1_clk",

drivers/clk/spear/spear6xx_clock.c

183

clk_register_clkdev(clk, "firda_syn_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

186

clk = clk_register_mux(NULL, "firda_mclk", firda_parents,

drivers/clk/spear/spear6xx_clock.c

190

clk_register_clkdev(clk, "firda_mclk", NULL);

drivers/clk/spear/spear6xx_clock.c

192

clk = clk_register_gate(NULL, "firda_clk", "firda_mclk", 0,

drivers/clk/spear/spear6xx_clock.c

194

clk_register_clkdev(clk, NULL, "firda");

drivers/clk/spear/spear6xx_clock.c

196

clk = clk_register_aux("clcd_syn_clk", "clcd_syn_gclk", "pll1_clk",

drivers/clk/spear/spear6xx_clock.c

199

clk_register_clkdev(clk, "clcd_syn_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

202

clk = clk_register_mux(NULL, "clcd_mclk", clcd_parents,

drivers/clk/spear/spear6xx_clock.c

206

clk_register_clkdev(clk, "clcd_mclk", NULL);

drivers/clk/spear/spear6xx_clock.c

208

clk = clk_register_gate(NULL, "clcd_clk", "clcd_mclk", 0,

drivers/clk/spear/spear6xx_clock.c

210

clk_register_clkdev(clk, NULL, "fc200000.clcd");

drivers/clk/spear/spear6xx_clock.c

213

clk = clk_register_gpt("gpt0_1_syn_clk", "pll1_clk", 0, PRSC0_CLK_CFG,

drivers/clk/spear/spear6xx_clock.c

215

clk_register_clkdev(clk, "gpt0_1_syn_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

217

clk = clk_register_mux(NULL, "gpt0_mclk", gpt0_1_parents,

drivers/clk/spear/spear6xx_clock.c

220

clk_register_clkdev(clk, NULL, "gpt0");

drivers/clk/spear/spear6xx_clock.c

222

clk = clk_register_mux(NULL, "gpt1_mclk", gpt0_1_parents,

drivers/clk/spear/spear6xx_clock.c

225

clk_register_clkdev(clk, "gpt1_mclk", NULL);

drivers/clk/spear/spear6xx_clock.c

227

clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,

drivers/clk/spear/spear6xx_clock.c

229

clk_register_clkdev(clk, NULL, "gpt1");

drivers/clk/spear/spear6xx_clock.c

231

clk = clk_register_gpt("gpt2_syn_clk", "pll1_clk", 0, PRSC1_CLK_CFG,

drivers/clk/spear/spear6xx_clock.c

233

clk_register_clkdev(clk, "gpt2_syn_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

235

clk = clk_register_mux(NULL, "gpt2_mclk", gpt2_parents,

drivers/clk/spear/spear6xx_clock.c

238

clk_register_clkdev(clk, "gpt2_mclk", NULL);

drivers/clk/spear/spear6xx_clock.c

240

clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,

drivers/clk/spear/spear6xx_clock.c

242

clk_register_clkdev(clk, NULL, "gpt2");

drivers/clk/spear/spear6xx_clock.c

244

clk = clk_register_gpt("gpt3_syn_clk", "pll1_clk", 0, PRSC2_CLK_CFG,

drivers/clk/spear/spear6xx_clock.c

246

clk_register_clkdev(clk, "gpt3_syn_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

248

clk = clk_register_mux(NULL, "gpt3_mclk", gpt3_parents,

drivers/clk/spear/spear6xx_clock.c

251

clk_register_clkdev(clk, "gpt3_mclk", NULL);

drivers/clk/spear/spear6xx_clock.c

253

clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0,

drivers/clk/spear/spear6xx_clock.c

255

clk_register_clkdev(clk, NULL, "gpt3");

drivers/clk/spear/spear6xx_clock.c

258

clk = clk_register_gate(NULL, "usbh0_clk", "pll3_clk", 0,

drivers/clk/spear/spear6xx_clock.c

260

clk_register_clkdev(clk, NULL, "e1800000.ehci");

drivers/clk/spear/spear6xx_clock.c

261

clk_register_clkdev(clk, NULL, "e1900000.ohci");

drivers/clk/spear/spear6xx_clock.c

263

clk = clk_register_gate(NULL, "usbh1_clk", "pll3_clk", 0,

drivers/clk/spear/spear6xx_clock.c

265

clk_register_clkdev(clk, NULL, "e2000000.ehci");

drivers/clk/spear/spear6xx_clock.c

266

clk_register_clkdev(clk, NULL, "e2100000.ohci");

drivers/clk/spear/spear6xx_clock.c

268

clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

270

clk_register_clkdev(clk, NULL, "designware_udc");

drivers/clk/spear/spear6xx_clock.c

273

clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2,

drivers/clk/spear/spear6xx_clock.c

275

clk_register_clkdev(clk, "ahbmult2_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

277

clk = clk_register_mux(NULL, "ddr_clk", ddr_parents,

drivers/clk/spear/spear6xx_clock.c

280

clk_register_clkdev(clk, "ddr_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

282

clk = clk_register_divider(NULL, "apb_clk", "ahb_clk",

drivers/clk/spear/spear6xx_clock.c

285

clk_register_clkdev(clk, "apb_clk", NULL);

drivers/clk/spear/spear6xx_clock.c

287

clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

289

clk_register_clkdev(clk, NULL, "fc400000.dma");

drivers/clk/spear/spear6xx_clock.c

291

clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

293

clk_register_clkdev(clk, NULL, "d1800000.flash");

drivers/clk/spear/spear6xx_clock.c

295

clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

297

clk_register_clkdev(clk, NULL, "e0800000.ethernet");

drivers/clk/spear/spear6xx_clock.c

299

clk = clk_register_gate(NULL, "i2c_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

301

clk_register_clkdev(clk, NULL, "d0200000.i2c");

drivers/clk/spear/spear6xx_clock.c

303

clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

305

clk_register_clkdev(clk, NULL, "jpeg");

drivers/clk/spear/spear6xx_clock.c

307

clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

309

clk_register_clkdev(clk, NULL, "fc000000.flash");

drivers/clk/spear/spear6xx_clock.c

312

clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

314

clk_register_clkdev(clk, NULL, "d820b000.adc");

drivers/clk/spear/spear6xx_clock.c

316

clk = clk_register_fixed_factor(NULL, "gpio0_clk", "apb_clk", 0, 1, 1);

drivers/clk/spear/spear6xx_clock.c

317

clk_register_clkdev(clk, NULL, "f0100000.gpio");

drivers/clk/spear/spear6xx_clock.c

319

clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

321

clk_register_clkdev(clk, NULL, "fc980000.gpio");

drivers/clk/spear/spear6xx_clock.c

323

clk = clk_register_gate(NULL, "gpio2_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

325

clk_register_clkdev(clk, NULL, "d8100000.gpio");

drivers/clk/spear/spear6xx_clock.c

327

clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

329

clk_register_clkdev(clk, NULL, "d0100000.spi");

drivers/clk/spear/spear6xx_clock.c

331

clk = clk_register_gate(NULL, "ssp1_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

333

clk_register_clkdev(clk, NULL, "d0180000.spi");

drivers/clk/spear/spear6xx_clock.c

335

clk = clk_register_gate(NULL, "ssp2_clk", "apb_clk", 0, PERIP1_CLK_ENB,

drivers/clk/spear/spear6xx_clock.c

337

clk_register_clkdev(clk, NULL, "d8180000.spi");

drivers/clk/st/clk-flexgen.c

206

static struct clk *clk_register_flexgen(const char *name,

drivers/clk/st/clk-flexgen.c

211

struct clk *clk;

drivers/clk/st/clk-flexgen.c

267

clk = clk_register(NULL, &fgxbar->hw);

drivers/clk/st/clk-flexgen.c

268

if (IS_ERR(clk))

drivers/clk/st/clk-flexgen.c

272

__clk_get_name(clk),

drivers/clk/st/clk-flexgen.c

273

__clk_get_name(clk_get_parent(clk)),

drivers/clk/st/clk-flexgen.c

274

(unsigned int)clk_get_rate(clk));

drivers/clk/st/clk-flexgen.c

275

return clk;

drivers/clk/st/clk-flexgen.c

615

clk_data->clks = kzalloc_objs(struct clk *, clk_data->clk_num);

drivers/clk/st/clk-flexgen.c

626

struct clk *clk;

drivers/clk/st/clk-flexgen.c

646

clk = clk_register_flexgen(clk_name, parents, num_parents,

drivers/clk/st/clk-flexgen.c

649

if (IS_ERR(clk))

drivers/clk/st/clk-flexgen.c

652

clk_data->clks[i] = clk;

drivers/clk/st/clkgen-fsyn.c

1021

clk = st_clk_register_quadfs_pll(pll_name, clk_parent_name, datac->data,

drivers/clk/st/clkgen-fsyn.c

1023

if (IS_ERR(clk)) {

drivers/clk/st/clkgen-fsyn.c

1028

__clk_get_name(clk),

drivers/clk/st/clkgen-fsyn.c

1029

__clk_get_name(clk_get_parent(clk)),

drivers/clk/st/clkgen-fsyn.c

1030

(unsigned int)clk_get_rate(clk));

drivers/clk/st/clkgen-fsyn.c

442

static struct clk * __init st_clk_register_quadfs_pll(

drivers/clk/st/clkgen-fsyn.c

448

struct clk *clk;

drivers/clk/st/clkgen-fsyn.c

472

clk = clk_register(NULL, &pll->hw);

drivers/clk/st/clkgen-fsyn.c

474

if (IS_ERR(clk))

drivers/clk/st/clkgen-fsyn.c

477

return clk;

drivers/clk/st/clkgen-fsyn.c

882

static struct clk * __init st_clk_register_quadfs_fsynth(

drivers/clk/st/clkgen-fsyn.c

888

struct clk *clk;

drivers/clk/st/clkgen-fsyn.c

913

clk = clk_register(NULL, &fs->hw);

drivers/clk/st/clkgen-fsyn.c

915

if (IS_ERR(clk))

drivers/clk/st/clkgen-fsyn.c

918

return clk;

drivers/clk/st/clkgen-fsyn.c

934

clk_data->clks = kzalloc_objs(struct clk *, QUADFS_MAX_CHAN);

drivers/clk/st/clkgen-fsyn.c

942

struct clk *clk;

drivers/clk/st/clkgen-fsyn.c

963

clk = st_clk_register_quadfs_fsynth(clk_name, pll_name,

drivers/clk/st/clkgen-fsyn.c

971

if (!IS_ERR(clk)) {

drivers/clk/st/clkgen-fsyn.c

972

clk_data->clks[fschan] = clk;

drivers/clk/st/clkgen-fsyn.c

974

__clk_get_name(clk),

drivers/clk/st/clkgen-fsyn.c

975

__clk_get_name(clk_get_parent(clk)),

drivers/clk/st/clkgen-fsyn.c

976

(unsigned int)clk_get_rate(clk));

drivers/clk/st/clkgen-fsyn.c

986

struct clk *clk;

drivers/clk/st/clkgen-mux.c

55

struct clk *clk;

drivers/clk/st/clkgen-mux.c

83

clk = clk_register_mux(NULL, np->name, parents, num_parents,

drivers/clk/st/clkgen-mux.c

88

if (IS_ERR(clk))

drivers/clk/st/clkgen-mux.c

92

__clk_get_name(clk),

drivers/clk/st/clkgen-mux.c

93

__clk_get_name(clk_get_parent(clk)),

drivers/clk/st/clkgen-mux.c

94

(unsigned int)clk_get_rate(clk));

drivers/clk/st/clkgen-mux.c

97

of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/st/clkgen-pll.c

263

pr_debug("%s:%s enabled\n", __clk_get_name(hw->clk), __func__);

drivers/clk/st/clkgen-pll.c

298

pr_debug("%s:%s disabled\n", __clk_get_name(hw->clk), __func__);

drivers/clk/st/clkgen-pll.c

408

__clk_get_name(hw->clk), req->rate);

drivers/clk/st/clkgen-pll.c

415

__func__, __clk_get_name(hw->clk),

drivers/clk/st/clkgen-pll.c

437

__func__, __clk_get_name(hw->clk),

drivers/clk/st/clkgen-pll.c

550

pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate);

drivers/clk/st/clkgen-pll.c

565

__clk_get_name(hw->clk), req->rate);

drivers/clk/st/clkgen-pll.c

572

__func__, __clk_get_name(hw->clk),

drivers/clk/st/clkgen-pll.c

594

__clk_get_name(hw->clk), rate);

drivers/clk/st/clkgen-pll.c

599

__func__, __clk_get_name(hw->clk),

drivers/clk/st/clkgen-pll.c

650

static struct clk * __init clkgen_pll_register(const char *parent_name,

drivers/clk/st/clkgen-pll.c

656

struct clk *clk;

drivers/clk/st/clkgen-pll.c

675

clk = clk_register(NULL, &pll->hw);

drivers/clk/st/clkgen-pll.c

676

if (IS_ERR(clk)) {

drivers/clk/st/clkgen-pll.c

678

return clk;

drivers/clk/st/clkgen-pll.c

682

__clk_get_name(clk),

drivers/clk/st/clkgen-pll.c

683

__clk_get_name(clk_get_parent(clk)),

drivers/clk/st/clkgen-pll.c

684

clk_get_rate(clk));

drivers/clk/st/clkgen-pll.c

686

return clk;

drivers/clk/st/clkgen-pll.c

705

static struct clk * __init clkgen_odf_register(const char *parent_name,

drivers/clk/st/clkgen-pll.c

712

struct clk *clk;

drivers/clk/st/clkgen-pll.c

740

clk = clk_register_composite(NULL, odf_name, &parent_name, 1,

drivers/clk/st/clkgen-pll.c

745

if (IS_ERR(clk))

drivers/clk/st/clkgen-pll.c

746

return clk;

drivers/clk/st/clkgen-pll.c

749

__clk_get_name(clk),

drivers/clk/st/clkgen-pll.c

750

__clk_get_name(clk_get_parent(clk)),

drivers/clk/st/clkgen-pll.c

751

clk_get_rate(clk));

drivers/clk/st/clkgen-pll.c

752

return clk;

drivers/clk/st/clkgen-pll.c

759

struct clk *clk;

drivers/clk/st/clkgen-pll.c

777

clk = clkgen_pll_register(parent_name, datac->data, pll_base, pll_flags,

drivers/clk/st/clkgen-pll.c

779

if (IS_ERR(clk))

drivers/clk/st/clkgen-pll.c

782

pll_name = __clk_get_name(clk);

drivers/clk/st/clkgen-pll.c

791

clk_data->clks = kzalloc_objs(struct clk *, clk_data->clk_num);

drivers/clk/st/clkgen-pll.c

797

struct clk *clk;

drivers/clk/st/clkgen-pll.c

813

clk = clkgen_odf_register(pll_name, pll_base, datac->data,

drivers/clk/st/clkgen-pll.c

816

if (IS_ERR(clk))

drivers/clk/st/clkgen-pll.c

819

clk_data->clks[odf] = clk;

drivers/clk/starfive/clk-starfive-jh7100-audio.c

114

struct jh71x0_clk *clk = &priv->reg[idx];

drivers/clk/starfive/clk-starfive-jh7100-audio.c

130

clk->hw.init = &init;

drivers/clk/starfive/clk-starfive-jh7100-audio.c

131

clk->idx = idx;

drivers/clk/starfive/clk-starfive-jh7100-audio.c

132

clk->max_div = max & JH71X0_CLK_DIV_MASK;

drivers/clk/starfive/clk-starfive-jh7100-audio.c

134

ret = devm_clk_hw_register(priv->dev, &clk->hw);

drivers/clk/starfive/clk-starfive-jh7100.c

325

struct jh71x0_clk *clk = &priv->reg[idx];

drivers/clk/starfive/clk-starfive-jh7100.c

345

clk->hw.init = &init;

drivers/clk/starfive/clk-starfive-jh7100.c

346

clk->idx = idx;

drivers/clk/starfive/clk-starfive-jh7100.c

347

clk->max_div = max & JH71X0_CLK_DIV_MASK;

drivers/clk/starfive/clk-starfive-jh7100.c

349

ret = devm_clk_hw_register(priv->dev, &clk->hw);

drivers/clk/starfive/clk-starfive-jh7110-aon.c

111

clk->hw.init = &init;

drivers/clk/starfive/clk-starfive-jh7110-aon.c

112

clk->idx = idx;

drivers/clk/starfive/clk-starfive-jh7110-aon.c

113

clk->max_div = max & JH71X0_CLK_DIV_MASK;

drivers/clk/starfive/clk-starfive-jh7110-aon.c

115

ret = devm_clk_hw_register(&pdev->dev, &clk->hw);

drivers/clk/starfive/clk-starfive-jh7110-aon.c

87

struct jh71x0_clk *clk = &priv->reg[idx];

drivers/clk/starfive/clk-starfive-jh7110-isp.c

152

struct jh71x0_clk *clk = &priv->reg[idx];

drivers/clk/starfive/clk-starfive-jh7110-isp.c

170

clk->hw.init = &init;

drivers/clk/starfive/clk-starfive-jh7110-isp.c

171

clk->idx = idx;

drivers/clk/starfive/clk-starfive-jh7110-isp.c

172

clk->max_div = max & JH71X0_CLK_DIV_MASK;

drivers/clk/starfive/clk-starfive-jh7110-isp.c

174

ret = devm_clk_hw_register(&pdev->dev, &clk->hw);

drivers/clk/starfive/clk-starfive-jh7110-stg.c

107

struct jh71x0_clk *clk = &priv->reg[idx];

drivers/clk/starfive/clk-starfive-jh7110-stg.c

129

clk->hw.init = &init;

drivers/clk/starfive/clk-starfive-jh7110-stg.c

130

clk->idx = idx;

drivers/clk/starfive/clk-starfive-jh7110-stg.c

131

clk->max_div = max & JH71X0_CLK_DIV_MASK;

drivers/clk/starfive/clk-starfive-jh7110-stg.c

133

ret = devm_clk_hw_register(&pdev->dev, &clk->hw);

drivers/clk/starfive/clk-starfive-jh7110-sys.c

387

struct clk *cpu_root = priv->reg[JH7110_SYSCLK_CPU_ROOT].hw.clk;

drivers/clk/starfive/clk-starfive-jh7110-sys.c

391

struct clk *osc = clk_get(priv->dev, "osc");

drivers/clk/starfive/clk-starfive-jh7110-sys.c

408

struct clk *pllclk;

drivers/clk/starfive/clk-starfive-jh7110-sys.c

474

struct jh71x0_clk *clk = &priv->reg[idx];

drivers/clk/starfive/clk-starfive-jh7110-sys.c

510

clk->hw.init = &init;

drivers/clk/starfive/clk-starfive-jh7110-sys.c

511

clk->idx = idx;

drivers/clk/starfive/clk-starfive-jh7110-sys.c

512

clk->max_div = max & JH71X0_CLK_DIV_MASK;

drivers/clk/starfive/clk-starfive-jh7110-sys.c

514

ret = devm_clk_hw_register(&pdev->dev, &clk->hw);

drivers/clk/starfive/clk-starfive-jh7110-vout.c

157

struct jh71x0_clk *clk = &priv->reg[idx];

drivers/clk/starfive/clk-starfive-jh7110-vout.c

177

clk->hw.init = &init;

drivers/clk/starfive/clk-starfive-jh7110-vout.c

178

clk->idx = idx;

drivers/clk/starfive/clk-starfive-jh7110-vout.c

179

clk->max_div = max & JH71X0_CLK_DIV_MASK;

drivers/clk/starfive/clk-starfive-jh7110-vout.c

181

ret = devm_clk_hw_register(&pdev->dev, &clk->hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

109

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

111

1UL, (unsigned long)clk->max_div);

drivers/clk/starfive/clk-starfive-jh71x0.c

113

jh71x0_clk_reg_rmw(clk, JH71X0_CLK_DIV_MASK, div);

drivers/clk/starfive/clk-starfive-jh71x0.c

120

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

121

u32 reg = jh71x0_clk_reg_get(clk);

drivers/clk/starfive/clk-starfive-jh71x0.c

151

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

156

jh71x0_clk_reg_rmw(clk, JH71X0_CLK_DIV_MASK, value);

drivers/clk/starfive/clk-starfive-jh71x0.c

162

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

163

u32 value = jh71x0_clk_reg_get(clk);

drivers/clk/starfive/clk-starfive-jh71x0.c

170

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

173

jh71x0_clk_reg_rmw(clk, JH71X0_CLK_MUX_MASK, value);

drivers/clk/starfive/clk-starfive-jh71x0.c

179

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

180

u32 value = jh71x0_clk_reg_get(clk);

drivers/clk/starfive/clk-starfive-jh71x0.c

187

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

197

jh71x0_clk_reg_rmw(clk, JH71X0_CLK_INVERT, value);

drivers/clk/starfive/clk-starfive-jh71x0.c

20

static struct jh71x0_clk_priv *jh71x0_priv_from(struct jh71x0_clk *clk)

drivers/clk/starfive/clk-starfive-jh71x0.c

208

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

209

struct jh71x0_clk_priv *priv = jh71x0_priv_from(clk);

drivers/clk/starfive/clk-starfive-jh71x0.c

218

regset->base = priv->base + 4 * clk->idx;

drivers/clk/starfive/clk-starfive-jh71x0.c

22

return container_of(clk, struct jh71x0_clk_priv, reg[clk->idx]);

drivers/clk/starfive/clk-starfive-jh71x0.c

25

static u32 jh71x0_clk_reg_get(struct jh71x0_clk *clk)

drivers/clk/starfive/clk-starfive-jh71x0.c

27

struct jh71x0_clk_priv *priv = jh71x0_priv_from(clk);

drivers/clk/starfive/clk-starfive-jh71x0.c

28

void __iomem *reg = priv->base + 4 * clk->idx;

drivers/clk/starfive/clk-starfive-jh71x0.c

33

static void jh71x0_clk_reg_rmw(struct jh71x0_clk *clk, u32 mask, u32 value)

drivers/clk/starfive/clk-starfive-jh71x0.c

35

struct jh71x0_clk_priv *priv = jh71x0_priv_from(clk);

drivers/clk/starfive/clk-starfive-jh71x0.c

36

void __iomem *reg = priv->base + 4 * clk->idx;

drivers/clk/starfive/clk-starfive-jh71x0.c

47

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

49

jh71x0_clk_reg_rmw(clk, JH71X0_CLK_ENABLE, JH71X0_CLK_ENABLE);

drivers/clk/starfive/clk-starfive-jh71x0.c

55

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

57

jh71x0_clk_reg_rmw(clk, JH71X0_CLK_ENABLE, 0);

drivers/clk/starfive/clk-starfive-jh71x0.c

62

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

64

return !!(jh71x0_clk_reg_get(clk) & JH71X0_CLK_ENABLE);

drivers/clk/starfive/clk-starfive-jh71x0.c

70

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

71

u32 div = jh71x0_clk_reg_get(clk) & JH71X0_CLK_DIV_MASK;

drivers/clk/starfive/clk-starfive-jh71x0.c

79

struct jh71x0_clk *clk = jh71x0_clk_from(hw);

drivers/clk/starfive/clk-starfive-jh71x0.c

82

unsigned long div = min_t(unsigned long, DIV_ROUND_UP(parent, rate), clk->max_div);

drivers/clk/starfive/clk-starfive-jh71x0.h

117

struct clk *original_clk;

drivers/clk/stm32/clk-stm32-core.c

494

return (__clk_get_enable_count(hw->clk) > 0);

drivers/clk/stm32/clk-stm32mp1.c

2309

size_t deps_size = sizeof(struct clk *) * ARRAY_SIZE(clock_deps_name);

drivers/clk/stm32/clk-stm32mp1.c

2310

struct clk **clk_deps;

drivers/clk/stm32/clk-stm32mp1.c

2318

struct clk *clk = of_clk_get_by_name(dev_of_node(dev),

drivers/clk/stm32/clk-stm32mp1.c

2321

if (IS_ERR(clk)) {

drivers/clk/stm32/clk-stm32mp1.c

2322

if (PTR_ERR(clk) != -EINVAL && PTR_ERR(clk) != -ENOENT)

drivers/clk/stm32/clk-stm32mp1.c

2323

return PTR_ERR(clk);

drivers/clk/stm32/clk-stm32mp1.c

2326

clk_deps[i] = devm_clk_get(dev, __clk_get_name(clk));

drivers/clk/stm32/clk-stm32mp1.c

2327

clk_put(clk);

drivers/clk/sunxi-ng/ccu-sun20i-d1.c

1393

ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun50i-a100.c

1257

ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun50i-a64.c

970

ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun50i-h6.c

1267

ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun50i-h616.c

1239

ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun50i-h616.c

1246

ccu_mux_notifier_register(pll_gpu_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

1264

ccu_mux_notifier_register(pll_cpu_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun6i-rtc.c

355

struct clk *ext_osc32k_clk = NULL;

drivers/clk/sunxi-ng/ccu-sun8i-a33.c

816

ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun8i-de2.c

255

struct clk *bus_clk, *mod_clk;

drivers/clk/sunxi-ng/ccu-sun8i-h3.c

1068

ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun8i-r40.c

1356

ccu_mux_notifier_register(pll_cpu_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu-sun9i-a80-de.c

206

struct clk *bus_clk;

drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c

95

struct clk *bus_clk;

drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c

558

ccu_mux_notifier_register(pll_cpu_clk.common.hw.clk,

drivers/clk/sunxi-ng/ccu_common.c

107

return clk_notifier_register(pll_nb->common->hw.clk,

drivers/clk/sunxi-ng/ccu_mmc_timing.c

20

int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)

drivers/clk/sunxi-ng/ccu_mmc_timing.c

22

struct clk_hw *hw = __clk_get_hw(clk);

drivers/clk/sunxi-ng/ccu_mmc_timing.c

53

int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)

drivers/clk/sunxi-ng/ccu_mmc_timing.c

55

struct clk_hw *hw = __clk_get_hw(clk);

drivers/clk/sunxi-ng/ccu_mux.c

318

int ccu_mux_notifier_register(struct clk *clk, struct ccu_mux_nb *mux_nb)

drivers/clk/sunxi-ng/ccu_mux.c

322

return clk_notifier_register(clk, &mux_nb->clk_nb);

drivers/clk/sunxi-ng/ccu_mux.h

162

int ccu_mux_notifier_register(struct clk *clk, struct ccu_mux_nb *mux_nb);

drivers/clk/sunxi/clk-a10-codec.c

16

struct clk *clk;

drivers/clk/sunxi/clk-a10-codec.c

27

clk = clk_register_gate(NULL, clk_name, parent_name,

drivers/clk/sunxi/clk-a10-codec.c

31

if (!IS_ERR(clk))

drivers/clk/sunxi/clk-a10-codec.c

32

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-a10-hosc.c

19

struct clk *clk;

drivers/clk/sunxi/clk-a10-hosc.c

44

clk = clk_register_composite(NULL, clk_name,

drivers/clk/sunxi/clk-a10-hosc.c

50

if (IS_ERR(clk))

drivers/clk/sunxi/clk-a10-hosc.c

53

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-a10-mod1.c

23

struct clk *clk;

drivers/clk/sunxi/clk-a10-mod1.c

54

clk = clk_register_composite(NULL, clk_name, parents, i,

drivers/clk/sunxi/clk-a10-mod1.c

58

if (IS_ERR(clk))

drivers/clk/sunxi/clk-a10-mod1.c

61

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-a10-pll2.c

42

struct clk **clks, *base_clk, *prediv_clk;

drivers/clk/sunxi/clk-a10-pll2.c

57

clks = kzalloc_objs(struct clk *, SUN4I_PLL2_OUTPUTS);

drivers/clk/sunxi/clk-a10-ve.c

120

clk = clk_register_composite(NULL, clk_name, &parent, 1,

drivers/clk/sunxi/clk-a10-ve.c

125

if (IS_ERR(clk))

drivers/clk/sunxi/clk-a10-ve.c

128

err = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-a10-ve.c

154

clk_unregister(clk);

drivers/clk/sunxi/clk-a10-ve.c

87

struct clk *clk;

drivers/clk/sunxi/clk-a20-gmac.c

101

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-a20-gmac.c

55

struct clk *clk;

drivers/clk/sunxi/clk-a20-gmac.c

91

clk = clk_register_composite(NULL, clk_name,

drivers/clk/sunxi/clk-a20-gmac.c

98

if (IS_ERR(clk))

drivers/clk/sunxi/clk-factors.c

176

static struct clk *__sunxi_factors_register(struct device_node *node,

drivers/clk/sunxi/clk-factors.c

181

struct clk *clk;

drivers/clk/sunxi/clk-factors.c

245

clk = clk_register_composite(NULL, clk_name,

drivers/clk/sunxi/clk-factors.c

250

if (IS_ERR(clk))

drivers/clk/sunxi/clk-factors.c

253

ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-factors.c

257

return clk;

drivers/clk/sunxi/clk-factors.c

261

clk_unregister(clk);

drivers/clk/sunxi/clk-factors.c

272

struct clk *sunxi_factors_register(struct device_node *node,

drivers/clk/sunxi/clk-factors.c

280

struct clk *sunxi_factors_register_critical(struct device_node *node,

drivers/clk/sunxi/clk-factors.c

288

void sunxi_factors_unregister(struct device_node *node, struct clk *clk)

drivers/clk/sunxi/clk-factors.c

290

struct clk_hw *hw = __clk_get_hw(clk);

drivers/clk/sunxi/clk-factors.c

300

clk_unregister(clk);

drivers/clk/sunxi/clk-factors.h

54

struct clk *sunxi_factors_register(struct device_node *node,

drivers/clk/sunxi/clk-factors.h

58

struct clk *sunxi_factors_register_critical(struct device_node *node,

drivers/clk/sunxi/clk-factors.h

63

void sunxi_factors_unregister(struct device_node *node, struct clk *clk);

drivers/clk/sunxi/clk-mod0.c

172

struct clk *mmc, *mmc_parent, *clk = hw->clk;

drivers/clk/sunxi/clk-mod0.c

186

mmc = clk_get_parent(clk);

drivers/clk/sunxi/clk-mod0.c

214

struct clk *mmc, *mmc_parent, *clk = hw->clk;

drivers/clk/sunxi/clk-mod0.c

222

mmc = clk_get_parent(clk);

drivers/clk/sunxi/clk-simple-gates.c

44

clk_data->clks = kzalloc_objs(struct clk *, number + 1);

drivers/clk/sunxi/clk-sun4i-display.c

112

struct clk *clk;

drivers/clk/sunxi/clk-sun4i-display.c

157

clk = clk_register_composite(NULL, clk_name,

drivers/clk/sunxi/clk-sun4i-display.c

164

if (IS_ERR(clk)) {

drivers/clk/sunxi/clk-sun4i-display.c

169

ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-sun4i-display.c

209

clk_unregister_composite(clk);

drivers/clk/sunxi/clk-sun4i-pll3.c

28

struct clk *clk;

drivers/clk/sunxi/clk-sun4i-pll3.c

57

clk = clk_register_composite(NULL, clk_name,

drivers/clk/sunxi/clk-sun4i-pll3.c

63

if (IS_ERR(clk)) {

drivers/clk/sunxi/clk-sun4i-pll3.c

68

ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-sun4i-pll3.c

78

clk_unregister_composite(clk);

drivers/clk/sunxi/clk-sun4i-tcon-ch1.c

231

struct clk *clk;

drivers/clk/sunxi/clk-sun4i-tcon-ch1.c

263

clk = clk_register(NULL, &tclk->hw);

drivers/clk/sunxi/clk-sun4i-tcon-ch1.c

264

if (IS_ERR(clk)) {

drivers/clk/sunxi/clk-sun4i-tcon-ch1.c

269

ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-sun4i-tcon-ch1.c

278

clk_unregister(clk);

drivers/clk/sunxi/clk-sun6i-apb0-gates.c

70

sizeof(struct clk *), GFP_KERNEL);

drivers/clk/sunxi/clk-sun6i-apb0.c

36

struct clk *clk;

drivers/clk/sunxi/clk-sun6i-apb0.c

48

clk = clk_register_divider_table(&pdev->dev, clk_name, clk_parent,

drivers/clk/sunxi/clk-sun6i-apb0.c

51

if (IS_ERR(clk))

drivers/clk/sunxi/clk-sun6i-apb0.c

52

return PTR_ERR(clk);

drivers/clk/sunxi/clk-sun6i-apb0.c

54

return of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-sun6i-ar100.c

75

struct clk *clk;

drivers/clk/sunxi/clk-sun6i-ar100.c

81

clk = sunxi_factors_register(np, &sun6i_ar100_data, &sun6i_ar100_lock,

drivers/clk/sunxi/clk-sun6i-ar100.c

83

if (!clk)

drivers/clk/sunxi/clk-sun6i-ar100.c

86

platform_set_drvdata(pdev, clk);

drivers/clk/sunxi/clk-sun8i-apb0.c

22

static struct clk *sun8i_a23_apb0_register(struct device_node *node,

drivers/clk/sunxi/clk-sun8i-apb0.c

27

struct clk *clk;

drivers/clk/sunxi/clk-sun8i-apb0.c

37

clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg,

drivers/clk/sunxi/clk-sun8i-apb0.c

39

if (IS_ERR(clk))

drivers/clk/sunxi/clk-sun8i-apb0.c

40

return clk;

drivers/clk/sunxi/clk-sun8i-apb0.c

42

ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-sun8i-apb0.c

46

return clk;

drivers/clk/sunxi/clk-sun8i-apb0.c

49

clk_unregister_divider(clk);

drivers/clk/sunxi/clk-sun8i-apb0.c

58

struct clk *clk;

drivers/clk/sunxi/clk-sun8i-apb0.c

73

clk = sun8i_a23_apb0_register(node, reg);

drivers/clk/sunxi/clk-sun8i-apb0.c

74

if (IS_ERR(clk))

drivers/clk/sunxi/clk-sun8i-apb0.c

91

struct clk *clk;

drivers/clk/sunxi/clk-sun8i-apb0.c

97

clk = sun8i_a23_apb0_register(np, reg);

drivers/clk/sunxi/clk-sun8i-apb0.c

98

return PTR_ERR_OR_ZERO(clk);

drivers/clk/sunxi/clk-sun8i-bus-gates.c

54

clk_data->clks = kzalloc_objs(struct clk *, number + 1);

drivers/clk/sunxi/clk-sun8i-mbus.c

33

struct clk *clk;

drivers/clk/sunxi/clk-sun8i-mbus.c

77

clk = clk_register_composite(NULL, clk_name, parents, num_parents,

drivers/clk/sunxi/clk-sun8i-mbus.c

82

if (IS_ERR(clk))

drivers/clk/sunxi/clk-sun8i-mbus.c

85

err = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-sun8i-mbus.c

95

clk_unregister(clk);

drivers/clk/sunxi/clk-sun9i-cpus.c

110

static int sun9i_a80_cpus_clk_determine_rate(struct clk_hw *clk,

drivers/clk/sunxi/clk-sun9i-cpus.c

119

num_parents = clk_hw_get_num_parents(clk);

drivers/clk/sunxi/clk-sun9i-cpus.c

121

parent = clk_hw_get_parent_by_index(clk, i);

drivers/clk/sunxi/clk-sun9i-cpus.c

124

if (clk_hw_get_flags(clk) & CLK_SET_RATE_PARENT)

drivers/clk/sunxi/clk-sun9i-cpus.c

191

struct clk *clk;

drivers/clk/sunxi/clk-sun9i-cpus.c

218

clk = clk_register_composite(NULL, clk_name, parents, ret,

drivers/clk/sunxi/clk-sun9i-cpus.c

222

if (IS_ERR(clk))

drivers/clk/sunxi/clk-sun9i-cpus.c

225

ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/sunxi/clk-sun9i-cpus.c

232

clk_unregister(clk);

drivers/clk/sunxi/clk-sun9i-mmc.c

119

clk_data->clks = devm_kcalloc(&pdev->dev, count, sizeof(struct clk *),

drivers/clk/sunxi/clk-sun9i-mmc.c

124

data->clk = devm_clk_get(&pdev->dev, NULL);

drivers/clk/sunxi/clk-sun9i-mmc.c

125

if (IS_ERR(data->clk)) {

drivers/clk/sunxi/clk-sun9i-mmc.c

127

return PTR_ERR(data->clk);

drivers/clk/sunxi/clk-sun9i-mmc.c

142

clk_parent = __clk_get_name(data->clk);

drivers/clk/sunxi/clk-sun9i-mmc.c

28

struct clk *clk;

drivers/clk/sunxi/clk-sun9i-mmc.c

44

clk_prepare_enable(data->clk);

drivers/clk/sunxi/clk-sun9i-mmc.c

51

clk_disable_unprepare(data->clk);

drivers/clk/sunxi/clk-sun9i-mmc.c

66

clk_prepare_enable(data->clk);

drivers/clk/sunxi/clk-sun9i-mmc.c

73

clk_disable_unprepare(data->clk);

drivers/clk/sunxi/clk-sunxi.c

556

static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,

drivers/clk/sunxi/clk-sunxi.c

650

static struct clk * __init sunxi_mux_clk_setup(struct device_node *node,

drivers/clk/sunxi/clk-sunxi.c

654

struct clk *clk;

drivers/clk/sunxi/clk-sunxi.c

673

clk = clk_register_mux(NULL, clk_name, parents, i,

drivers/clk/sunxi/clk-sunxi.c

678

if (IS_ERR(clk)) {

drivers/clk/sunxi/clk-sunxi.c

680

clk_name, PTR_ERR(clk));

drivers/clk/sunxi/clk-sunxi.c

684

if (of_clk_add_provider(node, of_clk_src_simple_get, clk)) {

drivers/clk/sunxi/clk-sunxi.c

687

clk_unregister_divider(clk);

drivers/clk/sunxi/clk-sunxi.c

691

return clk;

drivers/clk/sunxi/clk-sunxi.c

778

struct clk *clk;

drivers/clk/sunxi/clk-sunxi.c

797

clk = clk_register_divider_table(NULL, clk_name, clk_parent, 0,

drivers/clk/sunxi/clk-sunxi.c

801

if (IS_ERR(clk)) {

drivers/clk/sunxi/clk-sunxi.c

803

__func__, clk_name, PTR_ERR(clk));

drivers/clk/sunxi/clk-sunxi.c

807

if (of_clk_add_provider(node, of_clk_src_simple_get, clk)) {

drivers/clk/sunxi/clk-sunxi.c

813

if (clk_register_clkdev(clk, clk_name, NULL)) {

drivers/clk/sunxi/clk-sunxi.c

820

clk_unregister_divider(clk);

drivers/clk/sunxi/clk-sunxi.c

932

static struct clk ** __init sunxi_divs_clk_setup(struct device_node *node,

drivers/clk/sunxi/clk-sunxi.c

938

struct clk **clks, *pclk;

drivers/clk/sunxi/clk-usb.c

120

clk_data->clks = kzalloc_objs(struct clk *, qty + 1);

drivers/clk/sunxi/clk-usb.c

152

reset_data->clk = of_clk_get(node, 0);

drivers/clk/sunxi/clk-usb.c

153

if (IS_ERR(reset_data->clk)) {

drivers/clk/sunxi/clk-usb.c

25

struct clk *clk;

drivers/clk/sunxi/clk-usb.c

38

clk_prepare_enable(data->clk);

drivers/clk/sunxi/clk-usb.c

45

clk_disable_unprepare(data->clk);

drivers/clk/sunxi/clk-usb.c

59

clk_prepare_enable(data->clk);

drivers/clk/sunxi/clk-usb.c

66

clk_disable_unprepare(data->clk);

drivers/clk/tegra/clk-audio-sync.c

46

struct clk *tegra_clk_register_sync_source(const char *name,

drivers/clk/tegra/clk-audio-sync.c

51

struct clk *clk;

drivers/clk/tegra/clk-audio-sync.c

70

clk = clk_register(NULL, &sync->hw);

drivers/clk/tegra/clk-audio-sync.c

71

if (IS_ERR(clk))

drivers/clk/tegra/clk-audio-sync.c

74

return clk;

drivers/clk/tegra/clk-bpmp.c

102

msg.id = clk->id;

drivers/clk/tegra/clk-bpmp.c

104

return tegra_bpmp_clk_transfer(clk->bpmp, &msg);

drivers/clk/tegra/clk-bpmp.c

109

struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);

drivers/clk/tegra/clk-bpmp.c

115

msg.id = clk->id;

drivers/clk/tegra/clk-bpmp.c

117

err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);

drivers/clk/tegra/clk-bpmp.c

119

dev_err(clk->bpmp->dev, "failed to disable clock %s: %d\n",

drivers/clk/tegra/clk-bpmp.c

125

struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);

drivers/clk/tegra/clk-bpmp.c

132

msg.id = clk->id;

drivers/clk/tegra/clk-bpmp.c

136

err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);

drivers/clk/tegra/clk-bpmp.c

146

struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);

drivers/clk/tegra/clk-bpmp.c

154

msg.id = clk->id;

drivers/clk/tegra/clk-bpmp.c

160

err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);

drivers/clk/tegra/clk-bpmp.c

170

struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);

drivers/clk/tegra/clk-bpmp.c

184

msg.id = clk->id;

drivers/clk/tegra/clk-bpmp.c

190

err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);

drivers/clk/tegra/clk-bpmp.c

201

struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);

drivers/clk/tegra/clk-bpmp.c

208

request.parent_id = clk->parents[index];

drivers/clk/tegra/clk-bpmp.c

212

msg.id = clk->id;

drivers/clk/tegra/clk-bpmp.c

218

err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);

drivers/clk/tegra/clk-bpmp.c

229

struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);

drivers/clk/tegra/clk-bpmp.c

237

msg.id = clk->id;

drivers/clk/tegra/clk-bpmp.c

241

err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);

drivers/clk/tegra/clk-bpmp.c

243

dev_err(clk->bpmp->dev, "failed to get parent for %s: %d\n",

drivers/clk/tegra/clk-bpmp.c

248

for (i = 0; i < clk->num_parents; i++)

drivers/clk/tegra/clk-bpmp.c

249

if (clk->parents[i] == response.parent_id)

drivers/clk/tegra/clk-bpmp.c

258

struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);

drivers/clk/tegra/clk-bpmp.c

268

msg.id = clk->id;

drivers/clk/tegra/clk-bpmp.c

274

return tegra_bpmp_clk_transfer(clk->bpmp, &msg);

drivers/clk/tegra/clk-bpmp.c

507

struct tegra_bpmp_clk *clk;

drivers/clk/tegra/clk-bpmp.c

513

clk = devm_kzalloc(bpmp->dev, sizeof(*clk), GFP_KERNEL);

drivers/clk/tegra/clk-bpmp.c

514

if (!clk)

drivers/clk/tegra/clk-bpmp.c

517

clk->id = info->id;

drivers/clk/tegra/clk-bpmp.c

518

clk->bpmp = bpmp;

drivers/clk/tegra/clk-bpmp.c

520

clk->parents = devm_kcalloc(bpmp->dev, info->num_parents,

drivers/clk/tegra/clk-bpmp.c

521

sizeof(*clk->parents), GFP_KERNEL);

drivers/clk/tegra/clk-bpmp.c

522

if (!clk->parents)

drivers/clk/tegra/clk-bpmp.c

525

clk->num_parents = info->num_parents;

drivers/clk/tegra/clk-bpmp.c

530

clk->hw.init = &init;

drivers/clk/tegra/clk-bpmp.c

568

clk->parents[i] = info->parents[i];

drivers/clk/tegra/clk-bpmp.c

583

err = devm_clk_hw_register(bpmp->dev, &clk->hw);

drivers/clk/tegra/clk-bpmp.c

590

return clk;

drivers/clk/tegra/clk-bpmp.c

60

const struct tegra_bpmp_clk_message *clk)

drivers/clk/tegra/clk-bpmp.c

600

struct tegra_bpmp_clk *clk;

drivers/clk/tegra/clk-bpmp.c

616

clk = tegra_bpmp_clk_register(bpmp, info, infos, count);

drivers/clk/tegra/clk-bpmp.c

617

if (IS_ERR(clk)) {

drivers/clk/tegra/clk-bpmp.c

620

info->id, info->name, PTR_ERR(clk));

drivers/clk/tegra/clk-bpmp.c

627

bpmp->clocks[i] = clk;

drivers/clk/tegra/clk-bpmp.c

664

struct tegra_bpmp_clk *clk = bpmp->clocks[i];

drivers/clk/tegra/clk-bpmp.c

666

if (!clk)

drivers/clk/tegra/clk-bpmp.c

669

if (clk->id == id)

drivers/clk/tegra/clk-bpmp.c

670

return &clk->hw;

drivers/clk/tegra/clk-bpmp.c

68

request.cmd_and_id = (clk->cmd << 24) | clk->id;

drivers/clk/tegra/clk-bpmp.c

77

memcpy(req + 4, clk->tx.data, clk->tx.size);

drivers/clk/tegra/clk-bpmp.c

83

msg.rx.data = clk->rx.data;

drivers/clk/tegra/clk-bpmp.c

84

msg.rx.size = clk->rx.size;

drivers/clk/tegra/clk-bpmp.c

97

struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);

drivers/clk/tegra/clk-device.c

115

struct clk *clk;

drivers/clk/tegra/clk-device.c

125

clk = devm_clk_get(dev, NULL);

drivers/clk/tegra/clk-device.c

126

if (IS_ERR(clk))

drivers/clk/tegra/clk-device.c

127

return PTR_ERR(clk);

drivers/clk/tegra/clk-device.c

130

clk_dev->hw = __clk_get_hw(clk);

drivers/clk/tegra/clk-device.c

147

err = clk_notifier_register(clk, &clk_dev->clk_nb);

drivers/clk/tegra/clk-device.c

165

clk_notifier_unregister(clk, &clk_dev->clk_nb);

drivers/clk/tegra/clk-dfll.c

270

struct clk *soc_clk;

drivers/clk/tegra/clk-dfll.c

271

struct clk *ref_clk;

drivers/clk/tegra/clk-dfll.c

272

struct clk *i2c_clk;

drivers/clk/tegra/clk-dfll.c

273

struct clk *dfll_clk;

drivers/clk/tegra/clk-divider.c

142

struct clk *tegra_clk_register_divider(const char *name,

drivers/clk/tegra/clk-divider.c

148

struct clk *clk;

drivers/clk/tegra/clk-divider.c

174

clk = clk_register(NULL, &divider->hw);

drivers/clk/tegra/clk-divider.c

175

if (IS_ERR(clk))

drivers/clk/tegra/clk-divider.c

178

return clk;

drivers/clk/tegra/clk-divider.c

187

struct clk *tegra_clk_register_mc(const char *name, const char *parent_name,

drivers/clk/tegra/clk-periph-fixed.c

105

clk = clk_register(NULL, &fixed->hw);

drivers/clk/tegra/clk-periph-fixed.c

106

if (IS_ERR(clk))

drivers/clk/tegra/clk-periph-fixed.c

109

return clk;

drivers/clk/tegra/clk-periph-fixed.c

70

struct clk *tegra_clk_register_periph_fixed(const char *name,

drivers/clk/tegra/clk-periph-fixed.c

81

struct clk *clk;

drivers/clk/tegra/clk-periph-gate.c

136

struct clk *tegra_clk_register_periph_gate(const char *name,

drivers/clk/tegra/clk-periph-gate.c

141

struct clk *clk;

drivers/clk/tegra/clk-periph-gate.c

171

clk = clk_register(NULL, &gate->hw);

drivers/clk/tegra/clk-periph-gate.c

172

if (IS_ERR(clk))

drivers/clk/tegra/clk-periph-gate.c

175

return clk;

drivers/clk/tegra/clk-periph.c

162

static struct clk *_tegra_clk_register_periph(const char *name,

drivers/clk/tegra/clk-periph.c

168

struct clk *clk;

drivers/clk/tegra/clk-periph.c

199

clk = clk_register(NULL, &periph->hw);

drivers/clk/tegra/clk-periph.c

200

if (IS_ERR(clk))

drivers/clk/tegra/clk-periph.c

201

return clk;

drivers/clk/tegra/clk-periph.c

203

periph->mux.hw.clk = clk;

drivers/clk/tegra/clk-periph.c

204

periph->divider.hw.clk = div ? clk : NULL;

drivers/clk/tegra/clk-periph.c

205

periph->gate.hw.clk = clk;

drivers/clk/tegra/clk-periph.c

207

return clk;

drivers/clk/tegra/clk-periph.c

210

struct clk *tegra_clk_register_periph(const char *name,

drivers/clk/tegra/clk-periph.c

219

struct clk *tegra_clk_register_periph_nodiv(const char *name,

drivers/clk/tegra/clk-periph.c

229

struct clk *tegra_clk_register_periph_data(void __iomem *clk_base,

drivers/clk/tegra/clk-pll-out.c

115

clk = clk_register(NULL, &pll_out->hw);

drivers/clk/tegra/clk-pll-out.c

116

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll-out.c

119

return clk;

drivers/clk/tegra/clk-pll-out.c

74

if (!__clk_get_enable_count(hw->clk))

drivers/clk/tegra/clk-pll-out.c

87

struct clk *tegra_clk_register_pll_out(const char *name,

drivers/clk/tegra/clk-pll-out.c

93

struct clk *clk;

drivers/clk/tegra/clk-pll.c

1054

if (!__clk_get_enable_count(hw->clk))

drivers/clk/tegra/clk-pll.c

1754

struct clk *osc = __clk_lookup("osc");

drivers/clk/tegra/clk-pll.c

1901

static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll,

drivers/clk/tegra/clk-pll.c

1930

struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

1936

struct clk *clk;

drivers/clk/tegra/clk-pll.c

1944

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

1946

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

1949

return clk;

drivers/clk/tegra/clk-pll.c

1961

struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

1967

struct clk *clk;

drivers/clk/tegra/clk-pll.c

1978

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

1980

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

1983

return clk;

drivers/clk/tegra/clk-pll.c

1986

struct clk *tegra_clk_register_pllu(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

1991

struct clk *clk;

drivers/clk/tegra/clk-pll.c

1999

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2001

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2004

return clk;

drivers/clk/tegra/clk-pll.c

2052

struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

2059

struct clk *clk, *parent;

drivers/clk/tegra/clk-pll.c

2108

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2110

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2113

return clk;

drivers/clk/tegra/clk-pll.c

2116

struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

2124

struct clk *clk;

drivers/clk/tegra/clk-pll.c

2157

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2159

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2162

return clk;

drivers/clk/tegra/clk-pll.c

2165

struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

2172

struct clk *clk, *parent;

drivers/clk/tegra/clk-pll.c

2199

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2201

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2204

return clk;

drivers/clk/tegra/clk-pll.c

2207

struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

2213

struct clk *parent, *clk;

drivers/clk/tegra/clk-pll.c

2273

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2275

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2278

return clk;

drivers/clk/tegra/clk-pll.c

2281

struct clk *tegra_clk_register_plle_tegra114(const char *name,

drivers/clk/tegra/clk-pll.c

2288

struct clk *clk;

drivers/clk/tegra/clk-pll.c

2296

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2298

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2301

return clk;

drivers/clk/tegra/clk-pll.c

2304

struct clk *

drivers/clk/tegra/clk-pll.c

2311

struct clk *clk;

drivers/clk/tegra/clk-pll.c

2319

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2321

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2324

return clk;

drivers/clk/tegra/clk-pll.c

2339

struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

2345

struct clk *clk, *parent;

drivers/clk/tegra/clk-pll.c

2410

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2413

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2416

return clk;

drivers/clk/tegra/clk-pll.c

2421

struct clk *tegra_clk_register_pllre_tegra210(const char *name,

drivers/clk/tegra/clk-pll.c

2428

struct clk *clk;

drivers/clk/tegra/clk-pll.c

2440

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2442

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2445

return clk;

drivers/clk/tegra/clk-pll.c

2584

struct clk *tegra_clk_register_plle_tegra210(const char *name,

drivers/clk/tegra/clk-pll.c

2591

struct clk *clk;

drivers/clk/tegra/clk-pll.c

2599

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2601

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2604

return clk;

drivers/clk/tegra/clk-pll.c

2607

struct clk *tegra_clk_register_pllc_tegra210(const char *name,

drivers/clk/tegra/clk-pll.c

2613

struct clk *parent, *clk;

drivers/clk/tegra/clk-pll.c

2641

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2643

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2646

return clk;

drivers/clk/tegra/clk-pll.c

2649

struct clk *tegra_clk_register_pllss_tegra210(const char *name,

drivers/clk/tegra/clk-pll.c

2656

struct clk *clk, *parent;

drivers/clk/tegra/clk-pll.c

2689

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2692

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2695

return clk;

drivers/clk/tegra/clk-pll.c

2698

struct clk *tegra_clk_register_pllmb(const char *name, const char *parent_name,

drivers/clk/tegra/clk-pll.c

2705

struct clk *clk, *parent;

drivers/clk/tegra/clk-pll.c

2732

clk = _tegra_clk_register_pll(pll, name, parent_name, flags,

drivers/clk/tegra/clk-pll.c

2734

if (IS_ERR(clk))

drivers/clk/tegra/clk-pll.c

2737

return clk;

drivers/clk/tegra/clk-sdmmc-mux.c

234

struct clk *tegra_clk_register_sdmmc_mux_div(const char *name,

drivers/clk/tegra/clk-sdmmc-mux.c

238

struct clk *clk;

drivers/clk/tegra/clk-sdmmc-mux.c

269

clk = clk_register(NULL, &sdmmc_mux->hw);

drivers/clk/tegra/clk-sdmmc-mux.c

270

if (IS_ERR(clk)) {

drivers/clk/tegra/clk-sdmmc-mux.c

272

return clk;

drivers/clk/tegra/clk-sdmmc-mux.c

275

sdmmc_mux->gate.hw.clk = clk;

drivers/clk/tegra/clk-sdmmc-mux.c

277

return clk;

drivers/clk/tegra/clk-super.c

201

struct clk *tegra_clk_register_super_mux(const char *name,

drivers/clk/tegra/clk-super.c

207

struct clk *clk;

drivers/clk/tegra/clk-super.c

230

clk = tegra_clk_dev_register(&super->hw);

drivers/clk/tegra/clk-super.c

231

if (IS_ERR(clk))

drivers/clk/tegra/clk-super.c

234

return clk;

drivers/clk/tegra/clk-super.c

237

struct clk *tegra_clk_register_super_clk(const char *name,

drivers/clk/tegra/clk-super.c

243

struct clk *clk;

drivers/clk/tegra/clk-super.c

270

clk = clk_register(NULL, &super->hw);

drivers/clk/tegra/clk-super.c

271

if (IS_ERR(clk))

drivers/clk/tegra/clk-super.c

274

return clk;

drivers/clk/tegra/clk-tegra-audio.c

135

struct clk *clk;

drivers/clk/tegra/clk-tegra-audio.c

136

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-audio.c

145

clk = clk_register_mux(NULL, data->mux_name, mux_names,

drivers/clk/tegra/clk-tegra-audio.c

150

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-audio.c

156

clk = clk_register_gate(NULL, data->gate_name, data->mux_name,

drivers/clk/tegra/clk-tegra-audio.c

159

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-audio.c

168

struct clk *clk;

drivers/clk/tegra/clk-tegra-audio.c

169

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-audio.c

183

clk = tegra_clk_register_pll(info->name, info->parent,

drivers/clk/tegra/clk-tegra-audio.c

186

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-audio.c

193

clk = tegra_clk_register_divider("pll_a_out0_div", "pll_a",

drivers/clk/tegra/clk-tegra-audio.c

196

clk = tegra_clk_register_pll_out("pll_a_out0", "pll_a_out0_div",

drivers/clk/tegra/clk-tegra-audio.c

199

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-audio.c

211

clk = tegra_clk_register_sync_source(data->name, sync_max_rate);

drivers/clk/tegra/clk-tegra-audio.c

212

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-audio.c

235

clk = clk_register_fixed_factor(NULL, data->name_2x,

drivers/clk/tegra/clk-tegra-audio.c

237

clk = tegra_clk_register_divider(data->div_name,

drivers/clk/tegra/clk-tegra-audio.c

241

clk = tegra_clk_register_periph_gate(data->gate_name,

drivers/clk/tegra/clk-tegra-audio.c

245

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-fixed.c

100

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-fixed.c

105

clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);

drivers/clk/tegra/clk-tegra-fixed.c

106

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-fixed.c

30

struct clk *clk, *osc;

drivers/clk/tegra/clk-tegra-fixed.c

31

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-fixed.c

59

clk = clk_register_fixed_factor(NULL, "osc_div2", "osc",

drivers/clk/tegra/clk-tegra-fixed.c

61

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-fixed.c

67

clk = clk_register_fixed_factor(NULL, "osc_div4", "osc",

drivers/clk/tegra/clk-tegra-fixed.c

69

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-fixed.c

76

clk = clk_register_fixed_factor(NULL, "clk_m", "osc",

drivers/clk/tegra/clk-tegra-fixed.c

78

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-fixed.c

87

clk = clk_register_fixed_factor(NULL, "pll_ref", "osc",

drivers/clk/tegra/clk-tegra-fixed.c

89

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-fixed.c

99

struct clk *clk;

drivers/clk/tegra/clk-tegra-periph.c

1004

clk = clk_register_gate(NULL, "pll_p_out_hsio", "pll_p",

drivers/clk/tegra/clk-tegra-periph.c

1007

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-periph.c

1013

clk = clk_register_gate(NULL, "pll_p_out_xusb",

drivers/clk/tegra/clk-tegra-periph.c

1017

clk_register_clkdev(clk, "pll_p_out_xusb", NULL);

drivers/clk/tegra/clk-tegra-periph.c

1018

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-periph.c

864

struct clk *clk;

drivers/clk/tegra/clk-tegra-periph.c

865

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-periph.c

882

clk = tegra_clk_register_periph_data(clk_base, data);

drivers/clk/tegra/clk-tegra-periph.c

883

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-periph.c

891

struct clk *clk;

drivers/clk/tegra/clk-tegra-periph.c

892

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-periph.c

903

clk = tegra_clk_register_periph_gate(data->name,

drivers/clk/tegra/clk-tegra-periph.c

908

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-periph.c

916

struct clk *clk;

drivers/clk/tegra/clk-tegra-periph.c

917

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-periph.c

928

clk = tegra_clk_register_divider(data->name,

drivers/clk/tegra/clk-tegra-periph.c

935

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-periph.c

943

struct clk *clk;

drivers/clk/tegra/clk-tegra-periph.c

944

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-periph.c

950

clk = tegra_clk_register_pll("pll_p", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra-periph.c

952

clk_register_clkdev(clk, "pll_p", NULL);

drivers/clk/tegra/clk-tegra-periph.c

953

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-periph.c

965

clk = tegra_clk_register_divider(data->div_name, "pll_p",

drivers/clk/tegra/clk-tegra-periph.c

968

clk = tegra_clk_register_pll_out(data->pll_out_name,

drivers/clk/tegra/clk-tegra-periph.c

973

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-periph.c

986

clk = tegra_clk_register_divider("pll_p_out4_div",

drivers/clk/tegra/clk-tegra-periph.c

992

clk = tegra_clk_register_pll_out("pll_p_out4",

drivers/clk/tegra/clk-tegra-periph.c

997

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-cclk.c

132

struct clk *tegra_clk_register_super_cclk(const char *name,

drivers/clk/tegra/clk-tegra-super-cclk.c

138

struct clk *clk;

drivers/clk/tegra/clk-tegra-super-cclk.c

200

clk = clk_register(NULL, &super->hw);

drivers/clk/tegra/clk-tegra-super-cclk.c

201

if (IS_ERR(clk))

drivers/clk/tegra/clk-tegra-super-cclk.c

206

return clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

100

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

105

clk = tegra_clk_register_super_mux("sclk_mux",

drivers/clk/tegra/clk-tegra-super-gen4.c

111

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

117

clk = clk_register_divider(NULL, "sclk", "sclk_mux",

drivers/clk/tegra/clk-tegra-super-gen4.c

121

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

127

clk = tegra_clk_register_super_mux("sclk",

drivers/clk/tegra/clk-tegra-super-gen4.c

134

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

141

clk = clk_register_divider(NULL, "hclk_div", "sclk", 0,

drivers/clk/tegra/clk-tegra-super-gen4.c

144

clk = clk_register_gate(NULL, "hclk", "hclk_div",

drivers/clk/tegra/clk-tegra-super-gen4.c

148

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

156

clk = clk_register_divider(NULL, "pclk_div", "hclk", 0,

drivers/clk/tegra/clk-tegra-super-gen4.c

159

clk = clk_register_gate(NULL, "pclk", "pclk_div", CLK_SET_RATE_PARENT |

drivers/clk/tegra/clk-tegra-super-gen4.c

162

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

171

struct clk *clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

172

struct clk **dt_clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

178

clk = tegra_clk_register_super_mux("cclk_g",

drivers/clk/tegra/clk-tegra-super-gen4.c

185

clk = tegra_clk_register_super_mux("cclk_g",

drivers/clk/tegra/clk-tegra-super-gen4.c

192

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

204

clk = tegra_clk_register_super_mux("cclk_lp",

drivers/clk/tegra/clk-tegra-super-gen4.c

211

clk = tegra_clk_register_super_mux("cclk_lp",

drivers/clk/tegra/clk-tegra-super-gen4.c

218

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

233

clk = tegra_clk_register_pllc_tegra210("pll_x", "pll_ref",

drivers/clk/tegra/clk-tegra-super-gen4.c

237

clk = tegra_clk_register_pllxc("pll_x", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra-super-gen4.c

240

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

247

clk = clk_register_fixed_factor(NULL, "pll_x_out0", "pll_x",

drivers/clk/tegra/clk-tegra-super-gen4.c

249

*dt_clk = clk;

drivers/clk/tegra/clk-tegra-super-gen4.c

99

struct clk *clk;

drivers/clk/tegra/clk-tegra114.c

1000

clks[TEGRA114_CLK_PLL_RE_OUT] = clk;

drivers/clk/tegra/clk-tegra114.c

1003

clk = tegra_clk_register_plle_tegra114("pll_e_out0", "pll_ref",

drivers/clk/tegra/clk-tegra114.c

1005

clks[TEGRA114_CLK_PLL_E_OUT0] = clk;

drivers/clk/tegra/clk-tegra114.c

1017

struct clk *clk;

drivers/clk/tegra/clk-tegra114.c

1022

clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0,

drivers/clk/tegra/clk-tegra114.c

1024

clks[TEGRA114_CLK_XUSB_SS_DIV2] = clk;

drivers/clk/tegra/clk-tegra114.c

1027

clk = clk_register_mux(NULL, "dsia_mux", mux_plld_out0_plld2_out0,

drivers/clk/tegra/clk-tegra114.c

1031

clks[TEGRA114_CLK_DSIA_MUX] = clk;

drivers/clk/tegra/clk-tegra114.c

1034

clk = clk_register_mux(NULL, "dsib_mux", mux_plld_out0_plld2_out0,

drivers/clk/tegra/clk-tegra114.c

1038

clks[TEGRA114_CLK_DSIB_MUX] = clk;

drivers/clk/tegra/clk-tegra114.c

1040

clk = tegra_clk_register_periph_gate("dsia", "dsia_mux", 0, clk_base,

drivers/clk/tegra/clk-tegra114.c

1042

clks[TEGRA114_CLK_DSIA] = clk;

drivers/clk/tegra/clk-tegra114.c

1044

clk = tegra_clk_register_periph_gate("dsib", "dsib_mux", 0, clk_base,

drivers/clk/tegra/clk-tegra114.c

1046

clks[TEGRA114_CLK_DSIB] = clk;

drivers/clk/tegra/clk-tegra114.c

1049

clk = tegra_clk_register_periph_gate("csus", "vi_sensor", 0,

drivers/clk/tegra/clk-tegra114.c

1052

clks[TEGRA114_CLK_CSUS] = clk;

drivers/clk/tegra/clk-tegra114.c

1055

clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,

drivers/clk/tegra/clk-tegra114.c

1061

clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC,

drivers/clk/tegra/clk-tegra114.c

1063

clks[TEGRA114_CLK_MC] = clk;

drivers/clk/tegra/clk-tegra114.c

1065

clk = tegra_clk_register_periph_gate("mipi-cal", "clk_m", 0, clk_base,

drivers/clk/tegra/clk-tegra114.c

1068

clks[TEGRA114_CLK_MIPI_CAL] = clk;

drivers/clk/tegra/clk-tegra114.c

1072

clk = tegra_clk_register_periph_data(clk_base, data);

drivers/clk/tegra/clk-tegra114.c

1073

clks[data->clk_id] = clk;

drivers/clk/tegra/clk-tegra114.c

885

static struct clk **clks;

drivers/clk/tegra/clk-tegra114.c

892

struct clk *clk;

drivers/clk/tegra/clk-tegra114.c

895

clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);

drivers/clk/tegra/clk-tegra114.c

896

clks[TEGRA114_CLK_CLK_32K] = clk;

drivers/clk/tegra/clk-tegra114.c

902

struct clk *clk;

drivers/clk/tegra/clk-tegra114.c

905

clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra114.c

907

clks[TEGRA114_CLK_PLL_C] = clk;

drivers/clk/tegra/clk-tegra114.c

910

clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",

drivers/clk/tegra/clk-tegra114.c

913

clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",

drivers/clk/tegra/clk-tegra114.c

916

clks[TEGRA114_CLK_PLL_C_OUT1] = clk;

drivers/clk/tegra/clk-tegra114.c

919

clk = tegra_clk_register_pllc("pll_c2", "pll_ref", clk_base, pmc, 0,

drivers/clk/tegra/clk-tegra114.c

921

clks[TEGRA114_CLK_PLL_C2] = clk;

drivers/clk/tegra/clk-tegra114.c

924

clk = tegra_clk_register_pllc("pll_c3", "pll_ref", clk_base, pmc, 0,

drivers/clk/tegra/clk-tegra114.c

926

clks[TEGRA114_CLK_PLL_C3] = clk;

drivers/clk/tegra/clk-tegra114.c

929

clk = tegra_clk_register_pllm("pll_m", "pll_ref", clk_base, pmc,

drivers/clk/tegra/clk-tegra114.c

931

clks[TEGRA114_CLK_PLL_M] = clk;

drivers/clk/tegra/clk-tegra114.c

934

clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m",

drivers/clk/tegra/clk-tegra114.c

937

clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div",

drivers/clk/tegra/clk-tegra114.c

940

clks[TEGRA114_CLK_PLL_M_OUT1] = clk;

drivers/clk/tegra/clk-tegra114.c

943

clk = clk_register_fixed_factor(NULL, "pll_m_ud", "pll_m",

drivers/clk/tegra/clk-tegra114.c

947

clk = tegra_clk_register_pllu_tegra114("pll_u", "pll_ref", clk_base, 0,

drivers/clk/tegra/clk-tegra114.c

949

clks[TEGRA114_CLK_PLL_U] = clk;

drivers/clk/tegra/clk-tegra114.c

952

clk = clk_register_gate(NULL, "pll_u_480M", "pll_u",

drivers/clk/tegra/clk-tegra114.c

955

clks[TEGRA114_CLK_PLL_U_480M] = clk;

drivers/clk/tegra/clk-tegra114.c

958

clk = clk_register_fixed_factor(NULL, "pll_u_60M", "pll_u",

drivers/clk/tegra/clk-tegra114.c

960

clks[TEGRA114_CLK_PLL_U_60M] = clk;

drivers/clk/tegra/clk-tegra114.c

963

clk = clk_register_fixed_factor(NULL, "pll_u_48M", "pll_u",

drivers/clk/tegra/clk-tegra114.c

965

clks[TEGRA114_CLK_PLL_U_48M] = clk;

drivers/clk/tegra/clk-tegra114.c

968

clk = clk_register_fixed_factor(NULL, "pll_u_12M", "pll_u",

drivers/clk/tegra/clk-tegra114.c

970

clks[TEGRA114_CLK_PLL_U_12M] = clk;

drivers/clk/tegra/clk-tegra114.c

973

clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc, 0,

drivers/clk/tegra/clk-tegra114.c

975

clks[TEGRA114_CLK_PLL_D] = clk;

drivers/clk/tegra/clk-tegra114.c

978

clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",

drivers/clk/tegra/clk-tegra114.c

980

clks[TEGRA114_CLK_PLL_D_OUT0] = clk;

drivers/clk/tegra/clk-tegra114.c

983

clk = tegra_clk_register_pll("pll_d2", "pll_ref", clk_base, pmc, 0,

drivers/clk/tegra/clk-tegra114.c

985

clks[TEGRA114_CLK_PLL_D2] = clk;

drivers/clk/tegra/clk-tegra114.c

988

clk = clk_register_fixed_factor(NULL, "pll_d2_out0", "pll_d2",

drivers/clk/tegra/clk-tegra114.c

990

clks[TEGRA114_CLK_PLL_D2_OUT0] = clk;

drivers/clk/tegra/clk-tegra114.c

993

clk = tegra_clk_register_pllre("pll_re_vco", "pll_ref", clk_base, pmc,

drivers/clk/tegra/clk-tegra114.c

995

clks[TEGRA114_CLK_PLL_RE_VCO] = clk;

drivers/clk/tegra/clk-tegra114.c

997

clk = clk_register_divider_table(NULL, "pll_re_out", "pll_re_vco", 0,

drivers/clk/tegra/clk-tegra124-emc.c

485

struct clk *tegra124_clk_register_emc(void __iomem *base, struct device_node *np,

drivers/clk/tegra/clk-tegra124-emc.c

492

struct clk *clk;

drivers/clk/tegra/clk-tegra124-emc.c

538

clk = clk_register(NULL, &tegra->hw);

drivers/clk/tegra/clk-tegra124-emc.c

539

if (IS_ERR(clk)) {

drivers/clk/tegra/clk-tegra124-emc.c

541

return clk;

drivers/clk/tegra/clk-tegra124-emc.c

545

&tegra->hw, emc_get_parent(&tegra->hw))->clk;

drivers/clk/tegra/clk-tegra124-emc.c

549

clk_register_clkdev(clk, "emc", "tegra-clk-debug");

drivers/clk/tegra/clk-tegra124-emc.c

551

return clk;

drivers/clk/tegra/clk-tegra124-emc.c

557

struct clk *clk = __clk_lookup("emc");

drivers/clk/tegra/clk-tegra124-emc.c

561

if (clk) {

drivers/clk/tegra/clk-tegra124-emc.c

562

hw = __clk_get_hw(clk);

drivers/clk/tegra/clk-tegra124-emc.c

68

struct clk *parent;

drivers/clk/tegra/clk-tegra124-emc.c

75

struct clk *prev_parent;

drivers/clk/tegra/clk-tegra124.c

1022

static struct clk **clks;

drivers/clk/tegra/clk-tegra124.c

1027

struct clk *clk;

drivers/clk/tegra/clk-tegra124.c

1031

clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0,

drivers/clk/tegra/clk-tegra124.c

1033

clks[TEGRA124_CLK_XUSB_SS_DIV2] = clk;

drivers/clk/tegra/clk-tegra124.c

1035

clk = tegra_clk_register_periph_fixed("dpaux", "pll_p", 0, clk_base,

drivers/clk/tegra/clk-tegra124.c

1037

clks[TEGRA124_CLK_DPAUX] = clk;

drivers/clk/tegra/clk-tegra124.c

1039

clk = clk_register_gate(NULL, "pll_d_dsi_out", "pll_d_out0", 0,

drivers/clk/tegra/clk-tegra124.c

1041

clks[TEGRA124_CLK_PLL_D_DSI_OUT] = clk;

drivers/clk/tegra/clk-tegra124.c

1043

clk = tegra_clk_register_periph_gate("dsia", "pll_d_dsi_out", 0,

drivers/clk/tegra/clk-tegra124.c

1046

clks[TEGRA124_CLK_DSIA] = clk;

drivers/clk/tegra/clk-tegra124.c

1048

clk = tegra_clk_register_periph_gate("dsib", "pll_d_dsi_out", 0,

drivers/clk/tegra/clk-tegra124.c

1051

clks[TEGRA124_CLK_DSIB] = clk;

drivers/clk/tegra/clk-tegra124.c

1053

clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC,

drivers/clk/tegra/clk-tegra124.c

1055

clks[TEGRA124_CLK_MC] = clk;

drivers/clk/tegra/clk-tegra124.c

1058

clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,

drivers/clk/tegra/clk-tegra124.c

1060

clk_register_clkdev(clk, "cml0", NULL);

drivers/clk/tegra/clk-tegra124.c

1061

clks[TEGRA124_CLK_CML0] = clk;

drivers/clk/tegra/clk-tegra124.c

1064

clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,

drivers/clk/tegra/clk-tegra124.c

1066

clk_register_clkdev(clk, "cml1", NULL);

drivers/clk/tegra/clk-tegra124.c

1067

clks[TEGRA124_CLK_CML1] = clk;

drivers/clk/tegra/clk-tegra124.c

1071

struct clk **clkp;

drivers/clk/tegra/clk-tegra124.c

1079

clk = tegra_clk_register_periph_data(clk_base, init);

drivers/clk/tegra/clk-tegra124.c

1080

*clkp = clk;

drivers/clk/tegra/clk-tegra124.c

1089

struct clk *clk;

drivers/clk/tegra/clk-tegra124.c

1092

clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra124.c

1094

clk_register_clkdev(clk, "pll_c", NULL);

drivers/clk/tegra/clk-tegra124.c

1095

clks[TEGRA124_CLK_PLL_C] = clk;

drivers/clk/tegra/clk-tegra124.c

1098

clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",

drivers/clk/tegra/clk-tegra124.c

1101

clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",

drivers/clk/tegra/clk-tegra124.c

1104

clk_register_clkdev(clk, "pll_c_out1", NULL);

drivers/clk/tegra/clk-tegra124.c

1105

clks[TEGRA124_CLK_PLL_C_OUT1] = clk;

drivers/clk/tegra/clk-tegra124.c

1108

clk = clk_register_fixed_factor(NULL, "pll_c_ud", "pll_c",

drivers/clk/tegra/clk-tegra124.c

1110

clk_register_clkdev(clk, "pll_c_ud", NULL);

drivers/clk/tegra/clk-tegra124.c

1111

clks[TEGRA124_CLK_PLL_C_UD] = clk;

drivers/clk/tegra/clk-tegra124.c

1114

clk = tegra_clk_register_pllc("pll_c2", "pll_ref", clk_base, pmc, 0,

drivers/clk/tegra/clk-tegra124.c

1116

clk_register_clkdev(clk, "pll_c2", NULL);

drivers/clk/tegra/clk-tegra124.c

1117

clks[TEGRA124_CLK_PLL_C2] = clk;

drivers/clk/tegra/clk-tegra124.c

1120

clk = tegra_clk_register_pllc("pll_c3", "pll_ref", clk_base, pmc, 0,

drivers/clk/tegra/clk-tegra124.c

1122

clk_register_clkdev(clk, "pll_c3", NULL);

drivers/clk/tegra/clk-tegra124.c

1123

clks[TEGRA124_CLK_PLL_C3] = clk;

drivers/clk/tegra/clk-tegra124.c

1126

clk = tegra_clk_register_pllm("pll_m", "pll_ref", clk_base, pmc,

drivers/clk/tegra/clk-tegra124.c

1128

clk_register_clkdev(clk, "pll_m", NULL);

drivers/clk/tegra/clk-tegra124.c

1129

clks[TEGRA124_CLK_PLL_M] = clk;

drivers/clk/tegra/clk-tegra124.c

1132

clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m",

drivers/clk/tegra/clk-tegra124.c

1135

clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div",

drivers/clk/tegra/clk-tegra124.c

1138

clk_register_clkdev(clk, "pll_m_out1", NULL);

drivers/clk/tegra/clk-tegra124.c

1139

clks[TEGRA124_CLK_PLL_M_OUT1] = clk;

drivers/clk/tegra/clk-tegra124.c

1142

clk = clk_register_fixed_factor(NULL, "pll_m_ud", "pll_m",

drivers/clk/tegra/clk-tegra124.c

1144

clk_register_clkdev(clk, "pll_m_ud", NULL);

drivers/clk/tegra/clk-tegra124.c

1145

clks[TEGRA124_CLK_PLL_M_UD] = clk;

drivers/clk/tegra/clk-tegra124.c

1148

clk = tegra_clk_register_pllu_tegra114("pll_u", "pll_ref", clk_base, 0,

drivers/clk/tegra/clk-tegra124.c

1150

clk_register_clkdev(clk, "pll_u", NULL);

drivers/clk/tegra/clk-tegra124.c

1151

clks[TEGRA124_CLK_PLL_U] = clk;

drivers/clk/tegra/clk-tegra124.c

1154

clk = clk_register_gate(NULL, "pll_u_480M", "pll_u",

drivers/clk/tegra/clk-tegra124.c

1157

clk_register_clkdev(clk, "pll_u_480M", NULL);

drivers/clk/tegra/clk-tegra124.c

1158

clks[TEGRA124_CLK_PLL_U_480M] = clk;

drivers/clk/tegra/clk-tegra124.c

1161

clk = clk_register_fixed_factor(NULL, "pll_u_60M", "pll_u",

drivers/clk/tegra/clk-tegra124.c

1163

clk_register_clkdev(clk, "pll_u_60M", NULL);

drivers/clk/tegra/clk-tegra124.c

1164

clks[TEGRA124_CLK_PLL_U_60M] = clk;

drivers/clk/tegra/clk-tegra124.c

1167

clk = clk_register_fixed_factor(NULL, "pll_u_48M", "pll_u",

drivers/clk/tegra/clk-tegra124.c

1169

clk_register_clkdev(clk, "pll_u_48M", NULL);

drivers/clk/tegra/clk-tegra124.c

1170

clks[TEGRA124_CLK_PLL_U_48M] = clk;

drivers/clk/tegra/clk-tegra124.c

1173

clk = clk_register_fixed_factor(NULL, "pll_u_12M", "pll_u",

drivers/clk/tegra/clk-tegra124.c

1175

clk_register_clkdev(clk, "pll_u_12M", NULL);

drivers/clk/tegra/clk-tegra124.c

1176

clks[TEGRA124_CLK_PLL_U_12M] = clk;

drivers/clk/tegra/clk-tegra124.c

1179

clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc, 0,

drivers/clk/tegra/clk-tegra124.c

1181

clk_register_clkdev(clk, "pll_d", NULL);

drivers/clk/tegra/clk-tegra124.c

1182

clks[TEGRA124_CLK_PLL_D] = clk;

drivers/clk/tegra/clk-tegra124.c

1185

clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",

drivers/clk/tegra/clk-tegra124.c

1187

clk_register_clkdev(clk, "pll_d_out0", NULL);

drivers/clk/tegra/clk-tegra124.c

1188

clks[TEGRA124_CLK_PLL_D_OUT0] = clk;

drivers/clk/tegra/clk-tegra124.c

1191

clk = tegra_clk_register_pllre("pll_re_vco", "pll_ref", clk_base, pmc,

drivers/clk/tegra/clk-tegra124.c

1193

clk_register_clkdev(clk, "pll_re_vco", NULL);

drivers/clk/tegra/clk-tegra124.c

1194

clks[TEGRA124_CLK_PLL_RE_VCO] = clk;

drivers/clk/tegra/clk-tegra124.c

1196

clk = clk_register_divider_table(NULL, "pll_re_out", "pll_re_vco", 0,

drivers/clk/tegra/clk-tegra124.c

1199

clk_register_clkdev(clk, "pll_re_out", NULL);

drivers/clk/tegra/clk-tegra124.c

1200

clks[TEGRA124_CLK_PLL_RE_OUT] = clk;

drivers/clk/tegra/clk-tegra124.c

1203

clk = tegra_clk_register_plle_tegra114("pll_e", "pll_ref",

drivers/clk/tegra/clk-tegra124.c

1205

clk_register_clkdev(clk, "pll_e", NULL);

drivers/clk/tegra/clk-tegra124.c

1206

clks[TEGRA124_CLK_PLL_E] = clk;

drivers/clk/tegra/clk-tegra124.c

1209

clk = tegra_clk_register_pllss("pll_c4", "pll_ref", clk_base, 0,

drivers/clk/tegra/clk-tegra124.c

1211

clk_register_clkdev(clk, "pll_c4", NULL);

drivers/clk/tegra/clk-tegra124.c

1212

clks[TEGRA124_CLK_PLL_C4] = clk;

drivers/clk/tegra/clk-tegra124.c

1215

clk = tegra_clk_register_pllss("pll_dp", "pll_ref", clk_base, 0,

drivers/clk/tegra/clk-tegra124.c

1217

clk_register_clkdev(clk, "pll_dp", NULL);

drivers/clk/tegra/clk-tegra124.c

1218

clks[TEGRA124_CLK_PLL_DP] = clk;

drivers/clk/tegra/clk-tegra124.c

1221

clk = tegra_clk_register_pllss("pll_d2", "pll_ref", clk_base, 0,

drivers/clk/tegra/clk-tegra124.c

1223

clk_register_clkdev(clk, "pll_d2", NULL);

drivers/clk/tegra/clk-tegra124.c

1224

clks[TEGRA124_CLK_PLL_D2] = clk;

drivers/clk/tegra/clk-tegra124.c

1227

clk = clk_register_fixed_factor(NULL, "pll_d2_out0", "pll_d2",

drivers/clk/tegra/clk-tegra124.c

1229

clk_register_clkdev(clk, "pll_d2_out0", NULL);

drivers/clk/tegra/clk-tegra124.c

1230

clks[TEGRA124_CLK_PLL_D2_OUT0] = clk;

drivers/clk/tegra/clk-tegra124.c

1505

static struct clk *tegra124_clk_src_onecell_get(struct of_phandle_args *clkspec,

drivers/clk/tegra/clk-tegra124.c

1509

struct clk *clk;

drivers/clk/tegra/clk-tegra124.c

1511

clk = of_clk_src_onecell_get(clkspec, data);

drivers/clk/tegra/clk-tegra124.c

1512

if (IS_ERR(clk))

drivers/clk/tegra/clk-tegra124.c

1513

return clk;

drivers/clk/tegra/clk-tegra124.c

1515

hw = __clk_get_hw(clk);

drivers/clk/tegra/clk-tegra124.c

1522

return clk;

drivers/clk/tegra/clk-tegra20-emc.c

227

struct clk *clk = __clk_lookup("emc");

drivers/clk/tegra/clk-tegra20-emc.c

231

if (clk) {

drivers/clk/tegra/clk-tegra20-emc.c

232

hw = __clk_get_hw(clk);

drivers/clk/tegra/clk-tegra20-emc.c

246

struct clk *tegra20_clk_register_emc(void __iomem *ioaddr, bool low_jitter)

drivers/clk/tegra/clk-tegra20-emc.c

250

struct clk *clk;

drivers/clk/tegra/clk-tegra20-emc.c

273

clk = clk_register(NULL, &emc->hw);

drivers/clk/tegra/clk-tegra20-emc.c

274

if (IS_ERR(clk)) {

drivers/clk/tegra/clk-tegra20-emc.c

279

return clk;

drivers/clk/tegra/clk-tegra20-emc.c

282

int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same)

drivers/clk/tegra/clk-tegra20.c

1077

static struct clk *tegra20_clk_src_onecell_get(struct of_phandle_args *clkspec,

drivers/clk/tegra/clk-tegra20.c

1082

struct clk *clk;

drivers/clk/tegra/clk-tegra20.c

1094

clk = of_clk_src_onecell_get(clkspec, data);

drivers/clk/tegra/clk-tegra20.c

1095

if (IS_ERR(clk))

drivers/clk/tegra/clk-tegra20.c

1096

return clk;

drivers/clk/tegra/clk-tegra20.c

1098

hw = __clk_get_hw(clk);

drivers/clk/tegra/clk-tegra20.c

1120

return clk;

drivers/clk/tegra/clk-tegra20.c

1178

struct clk *clk;

drivers/clk/tegra/clk-tegra20.c

1180

clk = tegra_clk_register_super_mux("sclk", sclk_parents,

drivers/clk/tegra/clk-tegra20.c

1184

clks[TEGRA20_CLK_SCLK] = clk;

drivers/clk/tegra/clk-tegra20.c

157

static struct clk **clks;

drivers/clk/tegra/clk-tegra20.c

626

struct clk *clk;

drivers/clk/tegra/clk-tegra20.c

629

clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0,

drivers/clk/tegra/clk-tegra20.c

631

clks[TEGRA20_CLK_PLL_C] = clk;

drivers/clk/tegra/clk-tegra20.c

634

clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",

drivers/clk/tegra/clk-tegra20.c

637

clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",

drivers/clk/tegra/clk-tegra20.c

640

clks[TEGRA20_CLK_PLL_C_OUT1] = clk;

drivers/clk/tegra/clk-tegra20.c

643

clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, NULL,

drivers/clk/tegra/clk-tegra20.c

645

clks[TEGRA20_CLK_PLL_M] = clk;

drivers/clk/tegra/clk-tegra20.c

648

clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m",

drivers/clk/tegra/clk-tegra20.c

651

clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div",

drivers/clk/tegra/clk-tegra20.c

654

clks[TEGRA20_CLK_PLL_M_OUT1] = clk;

drivers/clk/tegra/clk-tegra20.c

657

clk = tegra_clk_register_pll("pll_x", "pll_ref", clk_base, NULL, 0,

drivers/clk/tegra/clk-tegra20.c

659

clks[TEGRA20_CLK_PLL_X] = clk;

drivers/clk/tegra/clk-tegra20.c

662

clk = tegra_clk_register_pll("pll_u", "pll_ref", clk_base, NULL, 0,

drivers/clk/tegra/clk-tegra20.c

664

clks[TEGRA20_CLK_PLL_U] = clk;

drivers/clk/tegra/clk-tegra20.c

667

clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, NULL, 0,

drivers/clk/tegra/clk-tegra20.c

669

clks[TEGRA20_CLK_PLL_D] = clk;

drivers/clk/tegra/clk-tegra20.c

672

clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",

drivers/clk/tegra/clk-tegra20.c

674

clks[TEGRA20_CLK_PLL_D_OUT0] = clk;

drivers/clk/tegra/clk-tegra20.c

677

clk = tegra_clk_register_pll("pll_a", "pll_p_out1", clk_base, NULL, 0,

drivers/clk/tegra/clk-tegra20.c

679

clks[TEGRA20_CLK_PLL_A] = clk;

drivers/clk/tegra/clk-tegra20.c

682

clk = tegra_clk_register_divider("pll_a_out0_div", "pll_a",

drivers/clk/tegra/clk-tegra20.c

685

clk = tegra_clk_register_pll_out("pll_a_out0", "pll_a_out0_div",

drivers/clk/tegra/clk-tegra20.c

688

clks[TEGRA20_CLK_PLL_A_OUT0] = clk;

drivers/clk/tegra/clk-tegra20.c

691

clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, pmc_base,

drivers/clk/tegra/clk-tegra20.c

693

clks[TEGRA20_CLK_PLL_E] = clk;

drivers/clk/tegra/clk-tegra20.c

705

struct clk *clk;

drivers/clk/tegra/clk-tegra20.c

708

clk = tegra_clk_register_super_cclk("cclk", cclk_parents,

drivers/clk/tegra/clk-tegra20.c

712

clks[TEGRA20_CLK_CCLK] = clk;

drivers/clk/tegra/clk-tegra20.c

715

clk = clk_register_fixed_factor(NULL, "twd", "cclk", 0, 1, 4);

drivers/clk/tegra/clk-tegra20.c

716

clks[TEGRA20_CLK_TWD] = clk;

drivers/clk/tegra/clk-tegra20.c

725

struct clk *clk;

drivers/clk/tegra/clk-tegra20.c

728

clk = clk_register_mux(NULL, "audio_mux", audio_parents,

drivers/clk/tegra/clk-tegra20.c

732

clk = clk_register_gate(NULL, "audio", "audio_mux", 0,

drivers/clk/tegra/clk-tegra20.c

735

clks[TEGRA20_CLK_AUDIO] = clk;

drivers/clk/tegra/clk-tegra20.c

738

clk = clk_register_fixed_factor(NULL, "audio_doubler", "audio",

drivers/clk/tegra/clk-tegra20.c

740

clk = tegra_clk_register_periph_gate("audio_2x", "audio_doubler",

drivers/clk/tegra/clk-tegra20.c

744

clks[TEGRA20_CLK_AUDIO_2X] = clk;

drivers/clk/tegra/clk-tegra20.c

785

struct clk *clk;

drivers/clk/tegra/clk-tegra20.c

789

clk = tegra_clk_register_periph_gate("ac97", "pll_a_out0",

drivers/clk/tegra/clk-tegra20.c

792

clks[TEGRA20_CLK_AC97] = clk;

drivers/clk/tegra/clk-tegra20.c

795

clk = tegra20_clk_register_emc(clk_base + CLK_SOURCE_EMC, false);

drivers/clk/tegra/clk-tegra20.c

797

clks[TEGRA20_CLK_EMC] = clk;

drivers/clk/tegra/clk-tegra20.c

799

clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC,

drivers/clk/tegra/clk-tegra20.c

801

clks[TEGRA20_CLK_MC] = clk;

drivers/clk/tegra/clk-tegra20.c

804

clk = tegra_clk_register_periph_gate("dsi", "pll_d_out0", 0,

drivers/clk/tegra/clk-tegra20.c

807

clks[TEGRA20_CLK_DSI] = clk;

drivers/clk/tegra/clk-tegra20.c

810

clk = tegra_clk_register_periph_gate("pex", "clk_m", 0, clk_base, 0, 70,

drivers/clk/tegra/clk-tegra20.c

812

clks[TEGRA20_CLK_PEX] = clk;

drivers/clk/tegra/clk-tegra20.c

827

clk = tegra_clk_register_periph_gate("cdev1", "cdev1_mux", 0,

drivers/clk/tegra/clk-tegra20.c

829

clks[TEGRA20_CLK_CDEV1] = clk;

drivers/clk/tegra/clk-tegra20.c

832

clk = tegra_clk_register_periph_gate("cdev2", "cdev2_mux", 0,

drivers/clk/tegra/clk-tegra20.c

834

clks[TEGRA20_CLK_CDEV2] = clk;

drivers/clk/tegra/clk-tegra20.c

837

clk = tegra_clk_register_periph_gate("csus", "csus_mux", 0,

drivers/clk/tegra/clk-tegra20.c

840

clks[TEGRA20_CLK_CSUS] = clk;

drivers/clk/tegra/clk-tegra20.c

844

clk = tegra_clk_register_periph_data(clk_base, data);

drivers/clk/tegra/clk-tegra20.c

845

clks[data->clk_id] = clk;

drivers/clk/tegra/clk-tegra20.c

850

clk = tegra_clk_register_periph_nodiv(data->name,

drivers/clk/tegra/clk-tegra20.c

854

clks[data->clk_id] = clk;

drivers/clk/tegra/clk-tegra20.c

862

struct clk *clk;

drivers/clk/tegra/clk-tegra20.c

869

clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IGNORE_UNUSED,

drivers/clk/tegra/clk-tegra20.c

871

clks[TEGRA20_CLK_CLK_M] = clk;

drivers/clk/tegra/clk-tegra20.c

875

clk = clk_register_fixed_factor(NULL, "pll_ref", "clk_m",

drivers/clk/tegra/clk-tegra20.c

877

clks[TEGRA20_CLK_PLL_REF] = clk;

drivers/clk/tegra/clk-tegra210-emc.c

115

static struct clk *tegra210_clk_emc_find_parent(struct tegra210_clk_emc *emc,

drivers/clk/tegra/clk-tegra210-emc.c

135

struct clk *clk;

drivers/clk/tegra/clk-tegra210-emc.c

198

clk = tegra210_clk_emc_find_parent(emc, index);

drivers/clk/tegra/clk-tegra210-emc.c

199

if (IS_ERR(clk)) {

drivers/clk/tegra/clk-tegra210-emc.c

200

err = PTR_ERR(clk);

drivers/clk/tegra/clk-tegra210-emc.c

207

if (clk_get_rate(clk) != config->parent_rate) {

drivers/clk/tegra/clk-tegra210-emc.c

208

err = clk_set_rate(clk, config->parent_rate);

drivers/clk/tegra/clk-tegra210-emc.c

211

config->parent_rate, clk, err);

drivers/clk/tegra/clk-tegra210-emc.c

218

err = clk_prepare_enable(clk);

drivers/clk/tegra/clk-tegra210-emc.c

221

clk, err);

drivers/clk/tegra/clk-tegra210-emc.c

244

clk_disable_unprepare(clk);

drivers/clk/tegra/clk-tegra210-emc.c

251

clk = tegra210_clk_emc_find_parent(emc, old_idx);

drivers/clk/tegra/clk-tegra210-emc.c

252

if (IS_ERR(clk)) {

drivers/clk/tegra/clk-tegra210-emc.c

253

err = PTR_ERR(clk);

drivers/clk/tegra/clk-tegra210-emc.c

261

clk_disable_unprepare(clk);

drivers/clk/tegra/clk-tegra210-emc.c

274

struct clk *tegra210_clk_register_emc(struct device_node *np,

drivers/clk/tegra/clk-tegra210-emc.c

279

struct clk *clk;

drivers/clk/tegra/clk-tegra210-emc.c

294

clk = clk_register(NULL, &emc->hw);

drivers/clk/tegra/clk-tegra210-emc.c

295

if (IS_ERR(clk)) {

drivers/clk/tegra/clk-tegra210-emc.c

297

return clk;

drivers/clk/tegra/clk-tegra210-emc.c

300

return clk;

drivers/clk/tegra/clk-tegra210-emc.c

303

int tegra210_clk_emc_attach(struct clk *clk,

drivers/clk/tegra/clk-tegra210-emc.c

306

struct clk_hw *hw = __clk_get_hw(clk);

drivers/clk/tegra/clk-tegra210-emc.c

37

struct clk *parents[8];

drivers/clk/tegra/clk-tegra210-emc.c

372

void tegra210_clk_emc_detach(struct clk *clk)

drivers/clk/tegra/clk-tegra210-emc.c

374

struct tegra210_clk_emc *emc = to_tegra210_clk_emc(__clk_get_hw(clk));

drivers/clk/tegra/clk-tegra210.c

1114

if (!IS_ERR_OR_NULL(hw->clk))

drivers/clk/tegra/clk-tegra210.c

1463

__clk_get_name(pllx->hw.clk), cfg->m, cfg->n, cfg->p,

drivers/clk/tegra/clk-tegra210.c

296

static struct clk **clks;

drivers/clk/tegra/clk-tegra210.c

3037

struct clk *clk;

drivers/clk/tegra/clk-tegra210.c

3039

clk = clk_register_divider_table(NULL, name, parent_name,

drivers/clk/tegra/clk-tegra210.c

3044

clks[TEGRA210_CLK_MC] = clk;

drivers/clk/tegra/clk-tegra210.c

3093

struct clk *clk;

drivers/clk/tegra/clk-tegra210.c

3097

clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0,

drivers/clk/tegra/clk-tegra210.c

3099

clks[TEGRA210_CLK_XUSB_SS_DIV2] = clk;

drivers/clk/tegra/clk-tegra210.c

3101

clk = tegra_clk_register_periph_fixed("sor_safe", "pll_p", 0, clk_base,

drivers/clk/tegra/clk-tegra210.c

3103

clks[TEGRA210_CLK_SOR_SAFE] = clk;

drivers/clk/tegra/clk-tegra210.c

3105

clk = tegra_clk_register_periph_fixed("dpaux", "sor_safe", 0, clk_base,

drivers/clk/tegra/clk-tegra210.c

3107

clks[TEGRA210_CLK_DPAUX] = clk;

drivers/clk/tegra/clk-tegra210.c

3109

clk = tegra_clk_register_periph_fixed("dpaux1", "sor_safe", 0, clk_base,

drivers/clk/tegra/clk-tegra210.c

3111

clks[TEGRA210_CLK_DPAUX1] = clk;

drivers/clk/tegra/clk-tegra210.c

3114

clk = clk_register_gate(NULL, "pll_d_dsi_out", "pll_d_out0", 0,

drivers/clk/tegra/clk-tegra210.c

3116

clks[TEGRA210_CLK_PLL_D_DSI_OUT] = clk;

drivers/clk/tegra/clk-tegra210.c

3119

clk = tegra_clk_register_periph_gate("dsia", "pll_d_dsi_out", 0,

drivers/clk/tegra/clk-tegra210.c

3122

clks[TEGRA210_CLK_DSIA] = clk;

drivers/clk/tegra/clk-tegra210.c

3125

clk = tegra_clk_register_periph_gate("dsib", "pll_d_dsi_out", 0,

drivers/clk/tegra/clk-tegra210.c

3128

clks[TEGRA210_CLK_DSIB] = clk;

drivers/clk/tegra/clk-tegra210.c

3131

clk = clk_register_gate(NULL, "csi_tpg", "pll_d",

drivers/clk/tegra/clk-tegra210.c

3134

clk_register_clkdev(clk, "csi_tpg", NULL);

drivers/clk/tegra/clk-tegra210.c

3135

clks[TEGRA210_CLK_CSI_TPG] = clk;

drivers/clk/tegra/clk-tegra210.c

3138

clk = tegra_clk_register_periph("la", la_parents,

drivers/clk/tegra/clk-tegra210.c

3141

clks[TEGRA210_CLK_LA] = clk;

drivers/clk/tegra/clk-tegra210.c

3144

clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,

drivers/clk/tegra/clk-tegra210.c

3146

clk_register_clkdev(clk, "cml0", NULL);

drivers/clk/tegra/clk-tegra210.c

3147

clks[TEGRA210_CLK_CML0] = clk;

drivers/clk/tegra/clk-tegra210.c

3150

clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,

drivers/clk/tegra/clk-tegra210.c

3152

clk_register_clkdev(clk, "cml1", NULL);

drivers/clk/tegra/clk-tegra210.c

3153

clks[TEGRA210_CLK_CML1] = clk;

drivers/clk/tegra/clk-tegra210.c

3155

clk = tegra_clk_register_super_clk("aclk", aclk_parents,

drivers/clk/tegra/clk-tegra210.c

3158

clks[TEGRA210_CLK_ACLK] = clk;

drivers/clk/tegra/clk-tegra210.c

3160

clk = tegra_clk_register_sdmmc_mux_div("sdmmc2", clk_base,

drivers/clk/tegra/clk-tegra210.c

3163

clks[TEGRA210_CLK_SDMMC2] = clk;

drivers/clk/tegra/clk-tegra210.c

3165

clk = tegra_clk_register_sdmmc_mux_div("sdmmc4", clk_base,

drivers/clk/tegra/clk-tegra210.c

3168

clks[TEGRA210_CLK_SDMMC4] = clk;

drivers/clk/tegra/clk-tegra210.c

3172

struct clk **clkp;

drivers/clk/tegra/clk-tegra210.c

3180

clk = tegra_clk_register_periph_data(clk_base, init);

drivers/clk/tegra/clk-tegra210.c

3181

*clkp = clk;

drivers/clk/tegra/clk-tegra210.c

3187

clk = tegra210_clk_register_emc(np, clk_base);

drivers/clk/tegra/clk-tegra210.c

3188

clks[TEGRA210_CLK_EMC] = clk;

drivers/clk/tegra/clk-tegra210.c

3197

struct clk *clk;

drivers/clk/tegra/clk-tegra210.c

3200

clk = tegra_clk_register_pllc_tegra210("pll_c", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra210.c

3202

if (!WARN_ON(IS_ERR(clk)))

drivers/clk/tegra/clk-tegra210.c

3203

clk_register_clkdev(clk, "pll_c", NULL);

drivers/clk/tegra/clk-tegra210.c

3204

clks[TEGRA210_CLK_PLL_C] = clk;

drivers/clk/tegra/clk-tegra210.c

3207

clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",

drivers/clk/tegra/clk-tegra210.c

3210

clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",

drivers/clk/tegra/clk-tegra210.c

3213

clk_register_clkdev(clk, "pll_c_out1", NULL);

drivers/clk/tegra/clk-tegra210.c

3214

clks[TEGRA210_CLK_PLL_C_OUT1] = clk;

drivers/clk/tegra/clk-tegra210.c

3217

clk = clk_register_fixed_factor(NULL, "pll_c_ud", "pll_c",

drivers/clk/tegra/clk-tegra210.c

3219

clk_register_clkdev(clk, "pll_c_ud", NULL);

drivers/clk/tegra/clk-tegra210.c

3220

clks[TEGRA210_CLK_PLL_C_UD] = clk;

drivers/clk/tegra/clk-tegra210.c

3223

clk = tegra_clk_register_pllc_tegra210("pll_c2", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra210.c

3225

clk_register_clkdev(clk, "pll_c2", NULL);

drivers/clk/tegra/clk-tegra210.c

3226

clks[TEGRA210_CLK_PLL_C2] = clk;

drivers/clk/tegra/clk-tegra210.c

3229

clk = tegra_clk_register_pllc_tegra210("pll_c3", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra210.c

3231

clk_register_clkdev(clk, "pll_c3", NULL);

drivers/clk/tegra/clk-tegra210.c

3232

clks[TEGRA210_CLK_PLL_C3] = clk;

drivers/clk/tegra/clk-tegra210.c

3235

clk = tegra_clk_register_pllm("pll_m", "osc", clk_base, pmc,

drivers/clk/tegra/clk-tegra210.c

3237

clk_register_clkdev(clk, "pll_m", NULL);

drivers/clk/tegra/clk-tegra210.c

3238

clks[TEGRA210_CLK_PLL_M] = clk;

drivers/clk/tegra/clk-tegra210.c

3241

clk = tegra_clk_register_pllmb("pll_mb", "osc", clk_base, pmc,

drivers/clk/tegra/clk-tegra210.c

3243

clk_register_clkdev(clk, "pll_mb", NULL);

drivers/clk/tegra/clk-tegra210.c

3244

clks[TEGRA210_CLK_PLL_MB] = clk;

drivers/clk/tegra/clk-tegra210.c

3247

clk = clk_register_fixed_factor(NULL, "pll_m_ud", "pll_m",

drivers/clk/tegra/clk-tegra210.c

3249

clk_register_clkdev(clk, "pll_m_ud", NULL);

drivers/clk/tegra/clk-tegra210.c

3250

clks[TEGRA210_CLK_PLL_M_UD] = clk;

drivers/clk/tegra/clk-tegra210.c

3253

clk = clk_register_fixed_factor(NULL, "pll_mb_ud", "pll_mb",

drivers/clk/tegra/clk-tegra210.c

3255

clk_register_clkdev(clk, "pll_mb_ud", NULL);

drivers/clk/tegra/clk-tegra210.c

3256

clks[TEGRA210_CLK_PLL_MB_UD] = clk;

drivers/clk/tegra/clk-tegra210.c

3259

clk = clk_register_fixed_factor(NULL, "pll_p_ud", "pll_p",

drivers/clk/tegra/clk-tegra210.c

3261

clks[TEGRA210_CLK_PLL_P_UD] = clk;

drivers/clk/tegra/clk-tegra210.c

3265

clk = clk_register_fixed_rate(NULL, "pll_u_vco", "pll_ref", 0,

drivers/clk/tegra/clk-tegra210.c

3267

clk_register_clkdev(clk, "pll_u_vco", NULL);

drivers/clk/tegra/clk-tegra210.c

3268

clks[TEGRA210_CLK_PLL_U] = clk;

drivers/clk/tegra/clk-tegra210.c

3272

clk = clk_register_divider_table(NULL, "pll_u_out", "pll_u_vco", 0,

drivers/clk/tegra/clk-tegra210.c

3275

clk_register_clkdev(clk, "pll_u_out", NULL);

drivers/clk/tegra/clk-tegra210.c

3276

clks[TEGRA210_CLK_PLL_U_OUT] = clk;

drivers/clk/tegra/clk-tegra210.c

3279

clk = tegra_clk_register_divider("pll_u_out1_div", "pll_u_out",

drivers/clk/tegra/clk-tegra210.c

3283

clk = tegra_clk_register_pll_out("pll_u_out1", "pll_u_out1_div",

drivers/clk/tegra/clk-tegra210.c

3286

clk_register_clkdev(clk, "pll_u_out1", NULL);

drivers/clk/tegra/clk-tegra210.c

3287

clks[TEGRA210_CLK_PLL_U_OUT1] = clk;

drivers/clk/tegra/clk-tegra210.c

3290

clk = tegra_clk_register_divider("pll_u_out2_div", "pll_u_out",

drivers/clk/tegra/clk-tegra210.c

3294

clk = tegra_clk_register_pll_out("pll_u_out2", "pll_u_out2_div",

drivers/clk/tegra/clk-tegra210.c

3297

clk_register_clkdev(clk, "pll_u_out2", NULL);

drivers/clk/tegra/clk-tegra210.c

3298

clks[TEGRA210_CLK_PLL_U_OUT2] = clk;

drivers/clk/tegra/clk-tegra210.c

3301

clk = clk_register_gate(NULL, "pll_u_480M", "pll_u_vco",

drivers/clk/tegra/clk-tegra210.c

3304

clk_register_clkdev(clk, "pll_u_480M", NULL);

drivers/clk/tegra/clk-tegra210.c

3305

clks[TEGRA210_CLK_PLL_U_480M] = clk;

drivers/clk/tegra/clk-tegra210.c

3308

clk = clk_register_gate(NULL, "pll_u_60M", "pll_u_out2",

drivers/clk/tegra/clk-tegra210.c

3311

clk_register_clkdev(clk, "pll_u_60M", NULL);

drivers/clk/tegra/clk-tegra210.c

3312

clks[TEGRA210_CLK_PLL_U_60M] = clk;

drivers/clk/tegra/clk-tegra210.c

3315

clk = clk_register_gate(NULL, "pll_u_48M", "pll_u_out1",

drivers/clk/tegra/clk-tegra210.c

3318

clk_register_clkdev(clk, "pll_u_48M", NULL);

drivers/clk/tegra/clk-tegra210.c

3319

clks[TEGRA210_CLK_PLL_U_48M] = clk;

drivers/clk/tegra/clk-tegra210.c

3322

clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc, 0,

drivers/clk/tegra/clk-tegra210.c

3324

clk_register_clkdev(clk, "pll_d", NULL);

drivers/clk/tegra/clk-tegra210.c

3325

clks[TEGRA210_CLK_PLL_D] = clk;

drivers/clk/tegra/clk-tegra210.c

3328

clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",

drivers/clk/tegra/clk-tegra210.c

3330

clk_register_clkdev(clk, "pll_d_out0", NULL);

drivers/clk/tegra/clk-tegra210.c

3331

clks[TEGRA210_CLK_PLL_D_OUT0] = clk;

drivers/clk/tegra/clk-tegra210.c

3334

clk = tegra_clk_register_pllre_tegra210("pll_re_vco", "pll_ref",

drivers/clk/tegra/clk-tegra210.c

3338

clk_register_clkdev(clk, "pll_re_vco", NULL);

drivers/clk/tegra/clk-tegra210.c

3339

clks[TEGRA210_CLK_PLL_RE_VCO] = clk;

drivers/clk/tegra/clk-tegra210.c

3341

clk = clk_register_divider_table(NULL, "pll_re_out", "pll_re_vco", 0,

drivers/clk/tegra/clk-tegra210.c

3344

clk_register_clkdev(clk, "pll_re_out", NULL);

drivers/clk/tegra/clk-tegra210.c

3345

clks[TEGRA210_CLK_PLL_RE_OUT] = clk;

drivers/clk/tegra/clk-tegra210.c

3347

clk = tegra_clk_register_divider("pll_re_out1_div", "pll_re_vco",

drivers/clk/tegra/clk-tegra210.c

3351

clk = tegra_clk_register_pll_out("pll_re_out1", "pll_re_out1_div",

drivers/clk/tegra/clk-tegra210.c

3354

clks[TEGRA210_CLK_PLL_RE_OUT1] = clk;

drivers/clk/tegra/clk-tegra210.c

3357

clk = tegra_clk_register_plle_tegra210("pll_e", "pll_ref",

drivers/clk/tegra/clk-tegra210.c

3359

clk_register_clkdev(clk, "pll_e", NULL);

drivers/clk/tegra/clk-tegra210.c

3360

clks[TEGRA210_CLK_PLL_E] = clk;

drivers/clk/tegra/clk-tegra210.c

3363

clk = tegra_clk_register_pllre("pll_c4_vco", "pll_ref", clk_base, pmc,

drivers/clk/tegra/clk-tegra210.c

3365

clk_register_clkdev(clk, "pll_c4_vco", NULL);

drivers/clk/tegra/clk-tegra210.c

3366

clks[TEGRA210_CLK_PLL_C4] = clk;

drivers/clk/tegra/clk-tegra210.c

3369

clk = clk_register_divider_table(NULL, "pll_c4_out0", "pll_c4_vco", 0,

drivers/clk/tegra/clk-tegra210.c

3372

clk_register_clkdev(clk, "pll_c4_out0", NULL);

drivers/clk/tegra/clk-tegra210.c

3373

clks[TEGRA210_CLK_PLL_C4_OUT0] = clk;

drivers/clk/tegra/clk-tegra210.c

3376

clk = clk_register_fixed_factor(NULL, "pll_c4_out1", "pll_c4_vco",

drivers/clk/tegra/clk-tegra210.c

3378

clk_register_clkdev(clk, "pll_c4_out1", NULL);

drivers/clk/tegra/clk-tegra210.c

3379

clks[TEGRA210_CLK_PLL_C4_OUT1] = clk;

drivers/clk/tegra/clk-tegra210.c

3382

clk = clk_register_fixed_factor(NULL, "pll_c4_out2", "pll_c4_vco",

drivers/clk/tegra/clk-tegra210.c

3384

clk_register_clkdev(clk, "pll_c4_out2", NULL);

drivers/clk/tegra/clk-tegra210.c

3385

clks[TEGRA210_CLK_PLL_C4_OUT2] = clk;

drivers/clk/tegra/clk-tegra210.c

3388

clk = tegra_clk_register_divider("pll_c4_out3_div", "pll_c4_out0",

drivers/clk/tegra/clk-tegra210.c

3391

clk = tegra_clk_register_pll_out("pll_c4_out3", "pll_c4_out3_div",

drivers/clk/tegra/clk-tegra210.c

3394

clk_register_clkdev(clk, "pll_c4_out3", NULL);

drivers/clk/tegra/clk-tegra210.c

3395

clks[TEGRA210_CLK_PLL_C4_OUT3] = clk;

drivers/clk/tegra/clk-tegra210.c

3398

clk = tegra_clk_register_pllss_tegra210("pll_dp", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra210.c

3400

clk_register_clkdev(clk, "pll_dp", NULL);

drivers/clk/tegra/clk-tegra210.c

3401

clks[TEGRA210_CLK_PLL_DP] = clk;

drivers/clk/tegra/clk-tegra210.c

3404

clk = tegra_clk_register_pllss_tegra210("pll_d2", "pll_ref", clk_base,

drivers/clk/tegra/clk-tegra210.c

3406

clk_register_clkdev(clk, "pll_d2", NULL);

drivers/clk/tegra/clk-tegra210.c

3407

clks[TEGRA210_CLK_PLL_D2] = clk;

drivers/clk/tegra/clk-tegra210.c

3410

clk = clk_register_fixed_factor(NULL, "pll_d2_out0", "pll_d2",

drivers/clk/tegra/clk-tegra210.c

3412

clk_register_clkdev(clk, "pll_d2_out0", NULL);

drivers/clk/tegra/clk-tegra210.c

3413

clks[TEGRA210_CLK_PLL_D2_OUT0] = clk;

drivers/clk/tegra/clk-tegra210.c

3416

clk = clk_register_fixed_factor(NULL, "pll_p_out2", "pll_p",

drivers/clk/tegra/clk-tegra210.c

3418

clk_register_clkdev(clk, "pll_p_out2", NULL);

drivers/clk/tegra/clk-tegra210.c

3419

clks[TEGRA210_CLK_PLL_P_OUT2] = clk;

drivers/clk/tegra/clk-tegra210.c

3715

struct clk *clk = clks[clk_id];

drivers/clk/tegra/clk-tegra210.c

3717

if (WARN(IS_ERR(clk), "clk_id: %d\n", clk_id)) {

drivers/clk/tegra/clk-tegra210.c

3722

clk_data[j].clk = clk;

drivers/clk/tegra/clk-tegra30.c

1004

struct clk *clk;

drivers/clk/tegra/clk-tegra30.c

1008

clk = tegra_clk_register_periph_gate("dsia", "pll_d_out0", 0, clk_base,

drivers/clk/tegra/clk-tegra30.c

1010

clks[TEGRA30_CLK_DSIA] = clk;

drivers/clk/tegra/clk-tegra30.c

1013

clk = clk_register_gate(NULL, "csia_pad", "pll_d", CLK_SET_RATE_PARENT,

drivers/clk/tegra/clk-tegra30.c

1015

clks[TEGRA30_CLK_CSIA_PAD] = clk;

drivers/clk/tegra/clk-tegra30.c

1018

clk = clk_register_gate(NULL, "csib_pad", "pll_d2", CLK_SET_RATE_PARENT,

drivers/clk/tegra/clk-tegra30.c

1020

clks[TEGRA30_CLK_CSIB_PAD] = clk;

drivers/clk/tegra/clk-tegra30.c

1023

clk = tegra_clk_register_periph_gate("csus", "vi_sensor", 0,

drivers/clk/tegra/clk-tegra30.c

1026

clks[TEGRA30_CLK_CSUS] = clk;

drivers/clk/tegra/clk-tegra30.c

1029

clk = tegra_clk_register_periph_gate("pcie", "clk_m", 0, clk_base, 0,

drivers/clk/tegra/clk-tegra30.c

1031

clks[TEGRA30_CLK_PCIE] = clk;

drivers/clk/tegra/clk-tegra30.c

1034

clk = tegra_clk_register_periph_gate("afi", "clk_m", 0, clk_base, 0, 72,

drivers/clk/tegra/clk-tegra30.c

1036

clks[TEGRA30_CLK_AFI] = clk;

drivers/clk/tegra/clk-tegra30.c

1039

clk = tegra20_clk_register_emc(clk_base + CLK_SOURCE_EMC, true);

drivers/clk/tegra/clk-tegra30.c

1041

clks[TEGRA30_CLK_EMC] = clk;

drivers/clk/tegra/clk-tegra30.c

1043

clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC,

drivers/clk/tegra/clk-tegra30.c

1045

clks[TEGRA30_CLK_MC] = clk;

drivers/clk/tegra/clk-tegra30.c

1048

clk = clk_register_gate(NULL, "cml0", "pll_e", 0, clk_base + PLLE_AUX,

drivers/clk/tegra/clk-tegra30.c

1050

clks[TEGRA30_CLK_CML0] = clk;

drivers/clk/tegra/clk-tegra30.c

1053

clk = clk_register_gate(NULL, "cml1", "pll_e", 0, clk_base + PLLE_AUX,

drivers/clk/tegra/clk-tegra30.c

1055

clks[TEGRA30_CLK_CML1] = clk;

drivers/clk/tegra/clk-tegra30.c

1059

clk = tegra_clk_register_periph_data(clk_base, data);

drivers/clk/tegra/clk-tegra30.c

1060

clks[data->clk_id] = clk;

drivers/clk/tegra/clk-tegra30.c

1065

clk = tegra_clk_register_periph_nodiv(data->name,

drivers/clk/tegra/clk-tegra30.c

1069

clks[data->clk_id] = clk;

drivers/clk/tegra/clk-tegra30.c

1293

static struct clk *tegra30_clk_src_onecell_get(struct of_phandle_args *clkspec,

drivers/clk/tegra/clk-tegra30.c

1297

struct clk *clk;

drivers/clk/tegra/clk-tegra30.c

1309

clk = of_clk_src_onecell_get(clkspec, data);

drivers/clk/tegra/clk-tegra30.c

1310

if (IS_ERR(clk))

drivers/clk/tegra/clk-tegra30.c

1311

return clk;

drivers/clk/tegra/clk-tegra30.c

1313

hw = __clk_get_hw(clk);

drivers/clk/tegra/clk-tegra30.c

1320

return clk;

drivers/clk/tegra/clk-tegra30.c

1383

struct clk *clk;

drivers/clk/tegra/clk-tegra30.c

1386

clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0,

drivers/clk/tegra/clk-tegra30.c

1388

clks[TEGRA30_CLK_PLL_C] = clk;

drivers/clk/tegra/clk-tegra30.c

1391

clk = tegra_clk_register_plle("pll_e", "pll_e_mux", clk_base, pmc_base,

drivers/clk/tegra/clk-tegra30.c

1393

clks[TEGRA30_CLK_PLL_E] = clk;

drivers/clk/tegra/clk-tegra30.c

1396

clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, pmc_base,

drivers/clk/tegra/clk-tegra30.c

1398

clks[TEGRA30_CLK_PLL_M] = clk;

drivers/clk/tegra/clk-tegra30.c

1401

clk = tegra_clk_register_super_mux("sclk", sclk_parents,

drivers/clk/tegra/clk-tegra30.c

1406

clks[TEGRA30_CLK_SCLK] = clk;

drivers/clk/tegra/clk-tegra30.c

186

static struct clk **clks;

drivers/clk/tegra/clk-tegra30.c

816

struct clk *clk;

drivers/clk/tegra/clk-tegra30.c

819

clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c",

drivers/clk/tegra/clk-tegra30.c

822

clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div",

drivers/clk/tegra/clk-tegra30.c

825

clks[TEGRA30_CLK_PLL_C_OUT1] = clk;

drivers/clk/tegra/clk-tegra30.c

828

clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m",

drivers/clk/tegra/clk-tegra30.c

831

clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div",

drivers/clk/tegra/clk-tegra30.c

834

clks[TEGRA30_CLK_PLL_M_OUT1] = clk;

drivers/clk/tegra/clk-tegra30.c

837

clk = tegra_clk_register_pll("pll_x", "pll_ref", clk_base, pmc_base, 0,

drivers/clk/tegra/clk-tegra30.c

839

clks[TEGRA30_CLK_PLL_X] = clk;

drivers/clk/tegra/clk-tegra30.c

842

clk = clk_register_fixed_factor(NULL, "pll_x_out0", "pll_x",

drivers/clk/tegra/clk-tegra30.c

844

clks[TEGRA30_CLK_PLL_X_OUT0] = clk;

drivers/clk/tegra/clk-tegra30.c

847

clk = tegra_clk_register_pllu("pll_u", "pll_ref", clk_base, 0,

drivers/clk/tegra/clk-tegra30.c

849

clks[TEGRA30_CLK_PLL_U] = clk;

drivers/clk/tegra/clk-tegra30.c

852

clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, pmc_base, 0,

drivers/clk/tegra/clk-tegra30.c

854

clks[TEGRA30_CLK_PLL_D] = clk;

drivers/clk/tegra/clk-tegra30.c

857

clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d",

drivers/clk/tegra/clk-tegra30.c

859

clks[TEGRA30_CLK_PLL_D_OUT0] = clk;

drivers/clk/tegra/clk-tegra30.c

862

clk = tegra_clk_register_pll("pll_d2", "pll_ref", clk_base, pmc_base, 0,

drivers/clk/tegra/clk-tegra30.c

864

clks[TEGRA30_CLK_PLL_D2] = clk;

drivers/clk/tegra/clk-tegra30.c

867

clk = clk_register_fixed_factor(NULL, "pll_d2_out0", "pll_d2",

drivers/clk/tegra/clk-tegra30.c

869

clks[TEGRA30_CLK_PLL_D2_OUT0] = clk;

drivers/clk/tegra/clk-tegra30.c

872

clk = clk_register_mux(NULL, "pll_e_mux", pll_e_parents,

drivers/clk/tegra/clk-tegra30.c

891

struct clk *clk;

drivers/clk/tegra/clk-tegra30.c

897

clk = tegra_clk_register_divider("pll_p_cclkg", "pll_p",

drivers/clk/tegra/clk-tegra30.c

900

clk_register_clkdev(clk, "pll_p_cclkg", NULL);

drivers/clk/tegra/clk-tegra30.c

906

clk = tegra_clk_register_divider("pll_p_out3_cclkg", "pll_p_out3",

drivers/clk/tegra/clk-tegra30.c

909

clk_register_clkdev(clk, "pll_p_out3_cclkg", NULL);

drivers/clk/tegra/clk-tegra30.c

915

clk = tegra_clk_register_divider("pll_p_out4_cclkg", "pll_p_out4",

drivers/clk/tegra/clk-tegra30.c

918

clk_register_clkdev(clk, "pll_p_out4_cclkg", NULL);

drivers/clk/tegra/clk-tegra30.c

921

clk = tegra_clk_register_super_cclk("cclk_g", cclk_g_parents,

drivers/clk/tegra/clk-tegra30.c

926

clks[TEGRA30_CLK_CCLK_G] = clk;

drivers/clk/tegra/clk-tegra30.c

932

clk = tegra_clk_register_divider("pll_p_cclklp", "pll_p",

drivers/clk/tegra/clk-tegra30.c

935

clk_register_clkdev(clk, "pll_p_cclklp", NULL);

drivers/clk/tegra/clk-tegra30.c

941

clk = tegra_clk_register_divider("pll_p_out3_cclklp", "pll_p_out3",

drivers/clk/tegra/clk-tegra30.c

944

clk_register_clkdev(clk, "pll_p_out3_cclklp", NULL);

drivers/clk/tegra/clk-tegra30.c

950

clk = tegra_clk_register_divider("pll_p_out4_cclklp", "pll_p_out4",

drivers/clk/tegra/clk-tegra30.c

953

clk_register_clkdev(clk, "pll_p_out4_cclklp", NULL);

drivers/clk/tegra/clk-tegra30.c

956

clk = tegra_clk_register_super_mux("cclk_lp", cclk_lp_parents,

drivers/clk/tegra/clk-tegra30.c

962

clks[TEGRA30_CLK_CCLK_LP] = clk;

drivers/clk/tegra/clk-tegra30.c

965

clk = clk_register_fixed_factor(NULL, "twd", "cclk_g",

drivers/clk/tegra/clk-tegra30.c

967

clks[TEGRA30_CLK_TWD] = clk;

drivers/clk/tegra/clk.c

223

struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks)

drivers/clk/tegra/clk.c

236

clks = kzalloc_objs(struct clk *, num);

drivers/clk/tegra/clk.c

256

struct clk *clks[], int clk_max)

drivers/clk/tegra/clk.c

258

struct clk *clk;

drivers/clk/tegra/clk.c

261

clk = clks[dup_list->clk_id];

drivers/clk/tegra/clk.c

262

dup_list->lookup.clk = clk;

drivers/clk/tegra/clk.c

268

struct clk *clks[], int clk_max)

drivers/clk/tegra/clk.c

270

struct clk *clk;

drivers/clk/tegra/clk.c

273

clk = clks[tbl->clk_id];

drivers/clk/tegra/clk.c

274

if (IS_ERR_OR_NULL(clk)) {

drivers/clk/tegra/clk.c

276

__func__, PTR_ERR(clk), tbl->clk_id);

drivers/clk/tegra/clk.c

283

struct clk *parent = clks[tbl->parent_id];

drivers/clk/tegra/clk.c

284

if (clk_set_parent(clk, parent)) {

drivers/clk/tegra/clk.c

287

__clk_get_name(clk));

drivers/clk/tegra/clk.c

293

if (clk_set_rate(clk, tbl->rate)) {

drivers/clk/tegra/clk.c

296

__clk_get_name(clk));

drivers/clk/tegra/clk.c

301

if (clk_prepare_enable(clk)) {

drivers/clk/tegra/clk.c

303

__clk_get_name(clk));

drivers/clk/tegra/clk.c

31

static struct clk **clks;

drivers/clk/tegra/clk.c

371

struct clk ** __init tegra_lookup_dt_id(int clk_id,

drivers/clk/tegra/clk.c

399

struct clk *tegra_clk_dev_register(struct clk_hw *hw)

drivers/clk/tegra/clk.h

134

struct clk *tegra_clk_register_divider(const char *name,

drivers/clk/tegra/clk.h

138

struct clk *tegra_clk_register_mc(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

404

struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

409

struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

414

struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

420

struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

426

struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

432

struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

438

struct clk *tegra_clk_register_pllre_tegra210(const char *name,

drivers/clk/tegra/clk.h

444

struct clk *tegra_clk_register_plle_tegra114(const char *name,

drivers/clk/tegra/clk.h

450

struct clk *tegra_clk_register_plle_tegra210(const char *name,

drivers/clk/tegra/clk.h

456

struct clk *tegra_clk_register_pllc_tegra210(const char *name,

drivers/clk/tegra/clk.h

462

struct clk *tegra_clk_register_pllss_tegra210(const char *name,

drivers/clk/tegra/clk.h

468

struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

473

struct clk *tegra_clk_register_pllmb(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

479

struct clk *tegra_clk_register_pllu(const char *name, const char *parent_name,

drivers/clk/tegra/clk.h

484

struct clk *tegra_clk_register_pllu_tegra114(const char *name,

drivers/clk/tegra/clk.h

490

struct clk *tegra_clk_register_pllu_tegra210(const char *name,

drivers/clk/tegra/clk.h

518

struct clk *tegra_clk_register_pll_out(const char *name,

drivers/clk/tegra/clk.h

583

struct clk *tegra_clk_register_periph_gate(const char *name,

drivers/clk/tegra/clk.h

596

struct clk *tegra_clk_register_periph_fixed(const char *name,

drivers/clk/tegra/clk.h

632

struct clk *tegra_clk_register_periph(const char *name,

drivers/clk/tegra/clk.h

636

struct clk *tegra_clk_register_periph_nodiv(const char *name,

drivers/clk/tegra/clk.h

715

struct clk *tegra_clk_register_periph_data(void __iomem *clk_base,

drivers/clk/tegra/clk.h

757

struct clk *tegra_clk_register_super_mux(const char *name,

drivers/clk/tegra/clk.h

761

struct clk *tegra_clk_register_super_clk(const char *name,

drivers/clk/tegra/clk.h

765

struct clk *tegra_clk_register_super_cclk(const char *name,

drivers/clk/tegra/clk.h

793

struct clk *tegra_clk_register_sdmmc_mux_div(const char *name,

drivers/clk/tegra/clk.h

845

struct clk *clks[], int clk_max);

drivers/clk/tegra/clk.h

848

struct clk *clks[], int clk_max);

drivers/clk/tegra/clk.h

851

struct clk **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks);

drivers/clk/tegra/clk.h

853

struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);

drivers/clk/tegra/clk.h

880

struct clk *tegra124_clk_register_emc(void __iomem *base, struct device_node *np,

drivers/clk/tegra/clk.h

884

static inline struct clk *

drivers/clk/tegra/clk.h

91

struct clk *tegra_clk_register_sync_source(const char *name,

drivers/clk/tegra/clk.h

922

struct clk *tegra20_clk_register_emc(void __iomem *ioaddr, bool low_jitter);

drivers/clk/tegra/clk.h

924

struct clk *tegra210_clk_register_emc(struct device_node *np,

drivers/clk/tegra/clk.h

927

struct clk *tegra_clk_dev_register(struct clk_hw *hw);

drivers/clk/thead/clk-th1520-ap.c

1489

clk_set_rate(c910_bus_clk.common.hw.clk,

drivers/clk/thead/clk-th1520-ap.c

1498

clk_set_rate(c910_bus_clk.common.hw.clk,

drivers/clk/thead/clk-th1520-ap.c

1516

struct clk *notifier_clk;

drivers/clk/thead/clk-th1520-ap.c

530

clk_set_rate(parent->clk, parent_rate);

drivers/clk/ti/adpll.c

145

struct clk *clk;

drivers/clk/ti/adpll.c

147

void (*unregister)(struct clk *clk);

drivers/clk/ti/adpll.c

169

struct clk *parent_clocks[MAX_ADPLL_INPUTS];

drivers/clk/ti/adpll.c

199

static int ti_adpll_setup_clock(struct ti_adpll_data *d, struct clk *clock,

drivers/clk/ti/adpll.c

201

void (*unregister)(struct clk *clk))

drivers/clk/ti/adpll.c

207

d->clocks[index].clk = clock;

drivers/clk/ti/adpll.c

237

struct clk *parent_clock,

drivers/clk/ti/adpll.c

244

struct clk *clock;

drivers/clk/ti/adpll.c

266

char *name, struct clk *clk0,

drivers/clk/ti/adpll.c

267

struct clk *clk1,

drivers/clk/ti/adpll.c

273

struct clk *clock;

drivers/clk/ti/adpll.c

295

struct clk *parent_clock,

drivers/clk/ti/adpll.c

302

struct clk *clock;

drivers/clk/ti/adpll.c

325

struct clk *parent_clock,

drivers/clk/ti/adpll.c

331

struct clk *clock;

drivers/clk/ti/adpll.c

487

struct clk *clock;

drivers/clk/ti/adpll.c

493

sizeof(struct clk *),

drivers/clk/ti/adpll.c

575

char *name, struct clk *clk0,

drivers/clk/ti/adpll.c

576

struct clk *clk1)

drivers/clk/ti/adpll.c

583

struct clk *clock;

drivers/clk/ti/adpll.c

642

d->clocks[TI_ADPLL_N2].clk,

drivers/clk/ti/adpll.c

651

d->clocks[TI_ADPLL_DCO].clk,

drivers/clk/ti/adpll.c

661

d->clocks[TI_ADPLL_M2].clk,

drivers/clk/ti/adpll.c

669

d->clocks[TI_ADPLL_DIV2].clk,

drivers/clk/ti/adpll.c

670

d->clocks[TI_ADPLL_BYPASS].clk);

drivers/clk/ti/adpll.c

676

"clkout2", d->clocks[TI_ADPLL_M2].clk,

drivers/clk/ti/adpll.c

677

d->clocks[TI_ADPLL_BYPASS].clk);

drivers/clk/ti/adpll.c

684

d->clocks[TI_ADPLL_DCO].clk,

drivers/clk/ti/adpll.c

694

d->clocks[TI_ADPLL_HIF].clk,

drivers/clk/ti/adpll.c

716

"clkdcoldo", d->clocks[TI_ADPLL_DCO].clk,

drivers/clk/ti/adpll.c

724

"m2", d->clocks[TI_ADPLL_DCO].clk,

drivers/clk/ti/adpll.c

734

"clkoutldo", d->clocks[TI_ADPLL_M2].clk,

drivers/clk/ti/adpll.c

743

d->clocks[TI_ADPLL_N2].clk,

drivers/clk/ti/adpll.c

753

d->clocks[TI_ADPLL_M2].clk,

drivers/clk/ti/adpll.c

754

d->clocks[TI_ADPLL_BYPASS].clk);

drivers/clk/ti/adpll.c

768

if (!ac || IS_ERR_OR_NULL(ac->clk))

drivers/clk/ti/adpll.c

773

ac->unregister(ac->clk);

drivers/clk/ti/adpll.c

804

struct clk *clock;

drivers/clk/ti/apll.c

102

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/apll.c

106

ad = clk->dpll_data;

drivers/clk/ti/apll.c

135

struct clk *clk;

drivers/clk/ti/apll.c

138

clk = of_clk_get(node, 0);

drivers/clk/ti/apll.c

139

if (IS_ERR(clk)) {

drivers/clk/ti/apll.c

148

ad->clk_ref = __clk_get_hw(clk);

drivers/clk/ti/apll.c

150

clk = of_clk_get(node, 1);

drivers/clk/ti/apll.c

151

if (IS_ERR(clk)) {

drivers/clk/ti/apll.c

160

ad->clk_bypass = __clk_get_hw(clk);

drivers/clk/ti/apll.c

163

clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);

drivers/clk/ti/apll.c

164

if (!IS_ERR(clk)) {

drivers/clk/ti/apll.c

165

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/apll.c

237

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/apll.c

238

struct dpll_data *ad = clk->dpll_data;

drivers/clk/ti/apll.c

252

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/apll.c

255

return clk->fixed_rate;

drivers/clk/ti/apll.c

262

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/apll.c

263

struct dpll_data *ad = clk->dpll_data;

drivers/clk/ti/apll.c

284

clk_hw_get_name(&clk->hw));

drivers/clk/ti/apll.c

293

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/apll.c

294

struct dpll_data *ad = clk->dpll_data;

drivers/clk/ti/apll.c

310

static void omap2_apll_set_autoidle(struct clk_hw_omap *clk, u32 val)

drivers/clk/ti/apll.c

312

struct dpll_data *ad = clk->dpll_data;

drivers/clk/ti/apll.c

324

static void omap2_apll_allow_idle(struct clk_hw_omap *clk)

drivers/clk/ti/apll.c

326

omap2_apll_set_autoidle(clk, OMAP2_APLL_AUTOIDLE_LOW_POWER_STOP);

drivers/clk/ti/apll.c

329

static void omap2_apll_deny_idle(struct clk_hw_omap *clk)

drivers/clk/ti/apll.c

331

omap2_apll_set_autoidle(clk, OMAP2_APLL_AUTOIDLE_DISABLE);

drivers/clk/ti/apll.c

34

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/apll.c

345

struct clk *clk;

drivers/clk/ti/apll.c

398

clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);

drivers/clk/ti/apll.c

399

if (!IS_ERR(clk)) {

drivers/clk/ti/apll.c

400

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/apll.c

41

ad = clk->dpll_data;

drivers/clk/ti/apll.c

45

clk_name = clk_hw_get_name(&clk->hw);

drivers/clk/ti/apll.c

85

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/apll.c

90

ad = clk->dpll_data;

drivers/clk/ti/autoidle.c

103

if (!clk)

drivers/clk/ti/autoidle.c

106

hw = __clk_get_hw(clk);

drivers/clk/ti/autoidle.c

117

static void _allow_autoidle(struct clk_ti_autoidle *clk)

drivers/clk/ti/autoidle.c

121

val = ti_clk_ll_ops->clk_readl(&clk->reg);

drivers/clk/ti/autoidle.c

123

if (clk->flags & AUTOIDLE_LOW)

drivers/clk/ti/autoidle.c

124

val &= ~(1 << clk->shift);

drivers/clk/ti/autoidle.c

126

val |= (1 << clk->shift);

drivers/clk/ti/autoidle.c

128

ti_clk_ll_ops->clk_writel(val, &clk->reg);

drivers/clk/ti/autoidle.c

131

static void _deny_autoidle(struct clk_ti_autoidle *clk)

drivers/clk/ti/autoidle.c

135

val = ti_clk_ll_ops->clk_readl(&clk->reg);

drivers/clk/ti/autoidle.c

137

if (clk->flags & AUTOIDLE_LOW)

drivers/clk/ti/autoidle.c

138

val |= (1 << clk->shift);

drivers/clk/ti/autoidle.c

140

val &= ~(1 << clk->shift);

drivers/clk/ti/autoidle.c

142

ti_clk_ll_ops->clk_writel(val, &clk->reg);

drivers/clk/ti/autoidle.c

187

struct clk_ti_autoidle *clk;

drivers/clk/ti/autoidle.c

194

clk = kzalloc_obj(*clk);

drivers/clk/ti/autoidle.c

196

if (!clk)

drivers/clk/ti/autoidle.c

199

clk->shift = shift;

drivers/clk/ti/autoidle.c

200

clk->name = ti_dt_clk_name(node);

drivers/clk/ti/autoidle.c

201

ret = ti_clk_get_reg_addr(node, 0, &clk->reg);

drivers/clk/ti/autoidle.c

203

kfree(clk);

drivers/clk/ti/autoidle.c

208

clk->flags |= AUTOIDLE_LOW;

drivers/clk/ti/autoidle.c

210

list_add(&clk->node, &autoidle_clks);

drivers/clk/ti/autoidle.c

39

static int _omap2_clk_deny_idle(struct clk_hw_omap *clk)

drivers/clk/ti/autoidle.c

41

if (clk->ops && clk->ops->deny_idle) {

drivers/clk/ti/autoidle.c

45

clk->autoidle_count++;

drivers/clk/ti/autoidle.c

46

if (clk->autoidle_count == 1)

drivers/clk/ti/autoidle.c

47

clk->ops->deny_idle(clk);

drivers/clk/ti/autoidle.c

54

static int _omap2_clk_allow_idle(struct clk_hw_omap *clk)

drivers/clk/ti/autoidle.c

56

if (clk->ops && clk->ops->allow_idle) {

drivers/clk/ti/autoidle.c

60

clk->autoidle_count--;

drivers/clk/ti/autoidle.c

61

if (clk->autoidle_count == 0)

drivers/clk/ti/autoidle.c

62

clk->ops->allow_idle(clk);

drivers/clk/ti/autoidle.c

75

int omap2_clk_deny_idle(struct clk *clk)

drivers/clk/ti/autoidle.c

79

if (!clk)

drivers/clk/ti/autoidle.c

82

hw = __clk_get_hw(clk);

drivers/clk/ti/autoidle.c

99

int omap2_clk_allow_idle(struct clk *clk)

drivers/clk/ti/clk-33xx.c

274

struct clk *clk1, *clk2;

drivers/clk/ti/clk-3xxx.c

117

omap3430es2_clk_hsotgusb_find_idlest(struct clk_hw_omap *clk,

drivers/clk/ti/clk-3xxx.c

122

memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));

drivers/clk/ti/clk-3xxx.c

147

static void am35xx_clk_find_idlest(struct clk_hw_omap *clk,

drivers/clk/ti/clk-3xxx.c

152

memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));

drivers/clk/ti/clk-3xxx.c

153

*idlest_bit = clk->enable_bit + AM35XX_IPSS_ICK_EN_ACK_OFFSET;

drivers/clk/ti/clk-3xxx.c

171

static void am35xx_clk_find_companion(struct clk_hw_omap *clk,

drivers/clk/ti/clk-3xxx.c

175

memcpy(other_reg, &clk->enable_reg, sizeof(*other_reg));

drivers/clk/ti/clk-3xxx.c

176

if (clk->enable_bit & AM35XX_IPSS_ICK_MASK)

drivers/clk/ti/clk-3xxx.c

177

*other_bit = clk->enable_bit + AM35XX_IPSS_ICK_FCK_OFFSET;

drivers/clk/ti/clk-3xxx.c

179

*other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET;

drivers/clk/ti/clk-3xxx.c

198

static void am35xx_clk_ipss_find_idlest(struct clk_hw_omap *clk,

drivers/clk/ti/clk-3xxx.c

203

memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));

drivers/clk/ti/clk-3xxx.c

277

struct clk *dpll5_clk;

drivers/clk/ti/clk-3xxx.c

278

struct clk *dpll5_m2_clk;

drivers/clk/ti/clk-3xxx.c

46

static void omap3430es2_clk_ssi_find_idlest(struct clk_hw_omap *clk,

drivers/clk/ti/clk-3xxx.c

51

memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));

drivers/clk/ti/clk-3xxx.c

80

omap3430es2_clk_dss_usbhost_find_idlest(struct clk_hw_omap *clk,

drivers/clk/ti/clk-3xxx.c

84

memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));

drivers/clk/ti/clk-43xx.c

275

struct clk *clk1, *clk2;

drivers/clk/ti/clk-44xx.c

797

struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll;

drivers/clk/ti/clk-54xx.c

614

struct clk *abe_dpll_ref, *abe_dpll, *abe_dpll_byp, *sys_32k_ck, *usb_dpll;

drivers/clk/ti/clk-7xx.c

947

struct clk *dpll_ck, *hdcp_ck;

drivers/clk/ti/clk-814x.c

93

struct clk *clock;

drivers/clk/ti/clk-dra7-atl.c

171

struct clk *clk;

drivers/clk/ti/clk-dra7-atl.c

194

clk = of_ti_clk_register(node, &clk_hw->hw, name);

drivers/clk/ti/clk-dra7-atl.c

196

if (!IS_ERR(clk)) {

drivers/clk/ti/clk-dra7-atl.c

197

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/clk-dra7-atl.c

231

struct clk *clk;

drivers/clk/ti/clk-dra7-atl.c

244

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/ti/clk-dra7-atl.c

246

if (IS_ERR(clk)) {

drivers/clk/ti/clk-dra7-atl.c

249

ret = PTR_ERR(clk);

drivers/clk/ti/clk-dra7-atl.c

253

cdesc = to_atl_desc(__clk_get_hw(clk));

drivers/clk/ti/clk-dra7-atl.c

281

atl_clk_enable(__clk_get_hw(clk));

drivers/clk/ti/clk-dra7-atl.c

39

struct clk *clk;

drivers/clk/ti/clk.c

160

struct clk *clk;

drivers/clk/ti/clk.c

219

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/ti/clk.c

221

if (!IS_ERR(clk)) {

drivers/clk/ti/clk.c

222

c->lk.clk = clk;

drivers/clk/ti/clk.c

242

c->node_name, PTR_ERR(clk));

drivers/clk/ti/clk.c

501

struct clk *clk;

drivers/clk/ti/clk.c

507

clk = of_clk_get_from_provider(&clkspec);

drivers/clk/ti/clk.c

509

ti_clk_add_alias(clk, ti_dt_clk_name(np));

drivers/clk/ti/clk.c

548

struct clk *init_clk;

drivers/clk/ti/clk.c

569

int ti_clk_add_alias(struct clk *clk, const char *con)

drivers/clk/ti/clk.c

573

if (!clk)

drivers/clk/ti/clk.c

576

if (IS_ERR(clk))

drivers/clk/ti/clk.c

577

return PTR_ERR(clk);

drivers/clk/ti/clk.c

584

cl->clk = clk;

drivers/clk/ti/clk.c

601

struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,

drivers/clk/ti/clk.c

604

struct clk *clk;

drivers/clk/ti/clk.c

611

clk = hw->clk;

drivers/clk/ti/clk.c

612

ret = ti_clk_add_alias(clk, con);

drivers/clk/ti/clk.c

614

clk_unregister(clk);

drivers/clk/ti/clk.c

618

return clk;

drivers/clk/ti/clk.c

632

struct clk *of_ti_clk_register_omap_hw(struct device_node *node,

drivers/clk/ti/clk.c

635

struct clk *clk;

drivers/clk/ti/clk.c

638

clk = of_ti_clk_register(node, hw, con);

drivers/clk/ti/clk.c

639

if (IS_ERR(clk))

drivers/clk/ti/clk.c

640

return clk;

drivers/clk/ti/clk.c

646

return clk;

drivers/clk/ti/clkctrl.c

132

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/clkctrl.c

137

if (clk->clkdm) {

drivers/clk/ti/clkctrl.c

138

ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);

drivers/clk/ti/clkctrl.c

143

clk->clkdm_name, ret);

drivers/clk/ti/clkctrl.c

148

if (!clk->enable_bit)

drivers/clk/ti/clkctrl.c

151

val = ti_clk_ll_ops->clk_readl(&clk->enable_reg);

drivers/clk/ti/clkctrl.c

154

val |= clk->enable_bit;

drivers/clk/ti/clkctrl.c

156

ti_clk_ll_ops->clk_writel(val, &clk->enable_reg);

drivers/clk/ti/clkctrl.c

158

if (test_bit(NO_IDLEST, &clk->flags))

drivers/clk/ti/clkctrl.c

162

while (!_omap4_is_ready(ti_clk_ll_ops->clk_readl(&clk->enable_reg))) {

drivers/clk/ti/clkctrl.c

174

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/clkctrl.c

178

if (!clk->enable_bit)

drivers/clk/ti/clkctrl.c

181

val = ti_clk_ll_ops->clk_readl(&clk->enable_reg);

drivers/clk/ti/clkctrl.c

185

ti_clk_ll_ops->clk_writel(val, &clk->enable_reg);

drivers/clk/ti/clkctrl.c

187

if (test_bit(NO_IDLEST, &clk->flags))

drivers/clk/ti/clkctrl.c

191

while (!_omap4_is_idle(ti_clk_ll_ops->clk_readl(&clk->enable_reg))) {

drivers/clk/ti/clkctrl.c

200

if (clk->clkdm)

drivers/clk/ti/clkctrl.c

201

ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);

drivers/clk/ti/clkctrl.c

206

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/clkctrl.c

209

val = ti_clk_ll_ops->clk_readl(&clk->enable_reg);

drivers/clk/ti/clkctrl.c

211

if (val & clk->enable_bit)

drivers/clk/ti/clkctrl.c

247

return entry->clk;

drivers/clk/ti/clkctrl.c

292

struct clk *clk;

drivers/clk/ti/clkctrl.c

312

clk = of_ti_clk_register(node, clk_hw, init.name);

drivers/clk/ti/clkctrl.c

313

if (IS_ERR_OR_NULL(clk)) {

drivers/clk/ti/clkctrl.c

320

clkctrl_clk->clk = clk_hw;

drivers/clk/ti/clkctrl.c

50

struct clk_hw *clk;

drivers/clk/ti/clkctrl.c

517

struct clk *clk;

drivers/clk/ti/clkctrl.c

693

clk = of_ti_clk_register_omap_hw(node, &hw->hw, init.name);

drivers/clk/ti/clkctrl.c

694

if (IS_ERR_OR_NULL(clk))

drivers/clk/ti/clkctrl.c

698

clkctrl_clk->clk = &hw->hw;

drivers/clk/ti/clkctrl.c

730

bool ti_clk_is_in_standby(struct clk *clk)

drivers/clk/ti/clkctrl.c

736

hw = __clk_get_hw(clk);

drivers/clk/ti/clkt_dflt.c

100

clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);

drivers/clk/ti/clkt_dflt.c

105

_wait_idlest_generic(clk, &idlest_reg, (1 << idlest_bit),

drivers/clk/ti/clkt_dflt.c

106

idlest_val, clk_hw_get_name(&clk->hw));

drivers/clk/ti/clkt_dflt.c

134

void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,

drivers/clk/ti/clkt_dflt.c

138

memcpy(other_reg, &clk->enable_reg, sizeof(*other_reg));

drivers/clk/ti/clkt_dflt.c

146

*other_bit = clk->enable_bit;

drivers/clk/ti/clkt_dflt.c

163

void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,

drivers/clk/ti/clkt_dflt.c

167

memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));

drivers/clk/ti/clkt_dflt.c

172

*idlest_bit = clk->enable_bit;

drivers/clk/ti/clkt_dflt.c

196

struct clk_hw_omap *clk;

drivers/clk/ti/clkt_dflt.c

206

clk = to_clk_hw_omap(hw);

drivers/clk/ti/clkt_dflt.c

208

if (clkdm_control && clk->clkdm) {

drivers/clk/ti/clkt_dflt.c

209

ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);

drivers/clk/ti/clkt_dflt.c

214

clk->clkdm_name, ret);

drivers/clk/ti/clkt_dflt.c

220

v = ti_clk_ll_ops->clk_readl(&clk->enable_reg);

drivers/clk/ti/clkt_dflt.c

221

if (clk->flags & INVERT_ENABLE)

drivers/clk/ti/clkt_dflt.c

222

v &= ~(1 << clk->enable_bit);

drivers/clk/ti/clkt_dflt.c

224

v |= (1 << clk->enable_bit);

drivers/clk/ti/clkt_dflt.c

225

ti_clk_ll_ops->clk_writel(v, &clk->enable_reg);

drivers/clk/ti/clkt_dflt.c

226

v = ti_clk_ll_ops->clk_readl(&clk->enable_reg); /* OCP barrier */

drivers/clk/ti/clkt_dflt.c

228

if (clk->ops && clk->ops->find_idlest)

drivers/clk/ti/clkt_dflt.c

229

_omap2_module_wait_ready(clk);

drivers/clk/ti/clkt_dflt.c

245

struct clk_hw_omap *clk;

drivers/clk/ti/clkt_dflt.c

248

clk = to_clk_hw_omap(hw);

drivers/clk/ti/clkt_dflt.c

250

v = ti_clk_ll_ops->clk_readl(&clk->enable_reg);

drivers/clk/ti/clkt_dflt.c

251

if (clk->flags & INVERT_ENABLE)

drivers/clk/ti/clkt_dflt.c

252

v |= (1 << clk->enable_bit);

drivers/clk/ti/clkt_dflt.c

254

v &= ~(1 << clk->enable_bit);

drivers/clk/ti/clkt_dflt.c

255

ti_clk_ll_ops->clk_writel(v, &clk->enable_reg);

drivers/clk/ti/clkt_dflt.c

259

clk->clkdm)

drivers/clk/ti/clkt_dflt.c

260

ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);

drivers/clk/ti/clkt_dflt.c

273

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/clkt_dflt.c

276

v = ti_clk_ll_ops->clk_readl(&clk->enable_reg);

drivers/clk/ti/clkt_dflt.c

278

if (clk->flags & INVERT_ENABLE)

drivers/clk/ti/clkt_dflt.c

279

v ^= BIT(clk->enable_bit);

drivers/clk/ti/clkt_dflt.c

281

v &= BIT(clk->enable_bit);

drivers/clk/ti/clkt_dflt.c

50

static int _wait_idlest_generic(struct clk_hw_omap *clk,

drivers/clk/ti/clkt_dflt.c

85

static void _omap2_module_wait_ready(struct clk_hw_omap *clk)

drivers/clk/ti/clkt_dflt.c

93

if (clk->ops->find_companion) {

drivers/clk/ti/clkt_dflt.c

94

clk->ops->find_companion(clk, &companion_reg, &other_bit);

drivers/clk/ti/clkt_dpll.c

205

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/clkt_dpll.c

209

dd = clk->dpll_data;

drivers/clk/ti/clkt_dpll.c

238

unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)

drivers/clk/ti/clkt_dpll.c

244

dd = clk->dpll_data;

drivers/clk/ti/clkt_dpll.c

284

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/clkt_dpll.c

295

if (!clk || !clk->dpll_data)

drivers/clk/ti/clkt_dpll.c

298

dd = clk->dpll_data;

drivers/clk/ti/clkt_dpll.c

315

r = _dpll_test_fint(clk, n);

drivers/clk/ti/clkt_dpll.c

67

static int _dpll_test_fint(struct clk_hw_omap *clk, unsigned int n)

drivers/clk/ti/clkt_dpll.c

73

dd = clk->dpll_data;

drivers/clk/ti/clkt_dpll.c

76

fint = clk_hw_get_rate(clk_hw_get_parent(&clk->hw)) / n;

drivers/clk/ti/clkt_iclk.c

28

void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk)

drivers/clk/ti/clkt_iclk.c

33

memcpy(&r, &clk->enable_reg, sizeof(r));

drivers/clk/ti/clkt_iclk.c

37

v |= (1 << clk->enable_bit);

drivers/clk/ti/clkt_iclk.c

42

void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk)

drivers/clk/ti/clkt_iclk.c

47

memcpy(&r, &clk->enable_reg, sizeof(r));

drivers/clk/ti/clkt_iclk.c

52

v &= ~(1 << clk->enable_bit);

drivers/clk/ti/clkt_iclk.c

68

static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk,

drivers/clk/ti/clkt_iclk.c

73

memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg));

drivers/clk/ti/clkt_iclk.c

75

*idlest_bit = clk->enable_bit;

drivers/clk/ti/clock.h

102

struct clk *clk;

drivers/clk/ti/clock.h

202

struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,

drivers/clk/ti/clock.h

204

struct clk *of_ti_clk_register_omap_hw(struct device_node *node,

drivers/clk/ti/clock.h

207

int ti_clk_add_alias(struct clk *clk, const char *con);

drivers/clk/ti/clock.h

254

void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,

drivers/clk/ti/clock.h

257

void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,

drivers/clk/ti/clock.h

261

void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk);

drivers/clk/ti/clock.h

262

void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk);

drivers/clk/ti/clock.h

288

int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate,

drivers/clk/ti/clock.h

93

.clk = ck, \

drivers/clk/ti/clockdomain.c

100

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/clockdomain.c

104

if (!clk->clkdm_name)

drivers/clk/ti/clockdomain.c

107

clk_name = __clk_get_name(hw->clk);

drivers/clk/ti/clockdomain.c

109

clkdm = ti_clk_ll_ops->clkdm_lookup(clk->clkdm_name);

drivers/clk/ti/clockdomain.c

112

clk_name, clk->clkdm_name);

drivers/clk/ti/clockdomain.c

113

clk->clkdm = clkdm;

drivers/clk/ti/clockdomain.c

116

clk_name, clk->clkdm_name);

drivers/clk/ti/clockdomain.c

124

struct clk *clk;

drivers/clk/ti/clockdomain.c

133

clk = of_clk_get(node, i);

drivers/clk/ti/clockdomain.c

134

if (IS_ERR(clk)) {

drivers/clk/ti/clockdomain.c

136

__func__, node, i, PTR_ERR(clk));

drivers/clk/ti/clockdomain.c

139

clk_hw = __clk_get_hw(clk);

drivers/clk/ti/clockdomain.c

142

__clk_get_name(clk));

drivers/clk/ti/clockdomain.c

143

clk_put(clk);

drivers/clk/ti/clockdomain.c

148

clk_put(clk);

drivers/clk/ti/clockdomain.c

36

struct clk_hw_omap *clk;

drivers/clk/ti/clockdomain.c

39

clk = to_clk_hw_omap(hw);

drivers/clk/ti/clockdomain.c

41

if (unlikely(!clk->clkdm)) {

drivers/clk/ti/clockdomain.c

53

ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);

drivers/clk/ti/clockdomain.c

55

__func__, clk_hw_get_name(hw), clk->clkdm_name, ret);

drivers/clk/ti/clockdomain.c

71

struct clk_hw_omap *clk;

drivers/clk/ti/clockdomain.c

73

clk = to_clk_hw_omap(hw);

drivers/clk/ti/clockdomain.c

75

if (unlikely(!clk->clkdm)) {

drivers/clk/ti/clockdomain.c

87

ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);

drivers/clk/ti/composite.c

100

if (!clk)

drivers/clk/ti/composite.c

103

if (!clk->comp_clks[idx])

drivers/clk/ti/composite.c

106

return clk->comp_clks[idx]->hw;

drivers/clk/ti/composite.c

115

struct clk *clk;

drivers/clk/ti/composite.c

169

clk = clk_register_composite(NULL, name,

drivers/clk/ti/composite.c

178

if (!IS_ERR(clk)) {

drivers/clk/ti/composite.c

179

ret = ti_clk_add_alias(clk, name);

drivers/clk/ti/composite.c

181

clk_unregister(clk);

drivers/clk/ti/composite.c

184

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/composite.c

241

struct component_clk *clk;

drivers/clk/ti/composite.c

256

clk = kzalloc_obj(*clk);

drivers/clk/ti/composite.c

257

if (!clk) {

drivers/clk/ti/composite.c

262

clk->num_parents = num_parents;

drivers/clk/ti/composite.c

263

clk->parent_names = parent_names;

drivers/clk/ti/composite.c

264

clk->hw = hw;

drivers/clk/ti/composite.c

265

clk->node = node;

drivers/clk/ti/composite.c

266

clk->type = type;

drivers/clk/ti/composite.c

267

list_add(&clk->link, &component_clks);

drivers/clk/ti/composite.c

98

static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)

drivers/clk/ti/divider.c

310

static struct clk *_register_divider(struct device_node *node,

drivers/clk/ti/divider.c

516

struct clk *clk;

drivers/clk/ti/divider.c

527

clk = _register_divider(node, flags, div);

drivers/clk/ti/divider.c

528

if (!IS_ERR(clk)) {

drivers/clk/ti/divider.c

529

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/dpll.c

152

struct clk *clk;

drivers/clk/ti/dpll.c

155

clk = of_clk_get(node, 0);

drivers/clk/ti/dpll.c

156

if (IS_ERR(clk)) {

drivers/clk/ti/dpll.c

165

dd->clk_ref = __clk_get_hw(clk);

drivers/clk/ti/dpll.c

167

clk = of_clk_get(node, 1);

drivers/clk/ti/dpll.c

169

if (IS_ERR(clk)) {

drivers/clk/ti/dpll.c

178

dd->clk_bypass = __clk_get_hw(clk);

drivers/clk/ti/dpll.c

182

clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);

drivers/clk/ti/dpll.c

184

if (!IS_ERR(clk)) {

drivers/clk/ti/dpll.c

185

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/dpll.c

213

struct clk *clk;

drivers/clk/ti/dpll.c

254

clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);

drivers/clk/ti/dpll.c

256

if (IS_ERR(clk))

drivers/clk/ti/dpll.c

259

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/dpll3xxx.c

1076

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

1091

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

1095

omap3_noncore_dpll_program(clk, 0);

drivers/clk/ti/dpll3xxx.c

138

static int _omap3_noncore_dpll_lock(struct clk_hw_omap *clk)

drivers/clk/ti/dpll3xxx.c

145

pr_debug("clock: locking DPLL %s\n", clk_hw_get_name(&clk->hw));

drivers/clk/ti/dpll3xxx.c

147

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

155

ai = omap3_dpll_autoidle_read(clk);

drivers/clk/ti/dpll3xxx.c

158

omap3_dpll_deny_idle(clk);

drivers/clk/ti/dpll3xxx.c

160

_omap3_dpll_write_clken(clk, DPLL_LOCKED);

drivers/clk/ti/dpll3xxx.c

162

r = _omap3_wait_dpll_status(clk, 1);

drivers/clk/ti/dpll3xxx.c

165

omap3_dpll_allow_idle(clk);

drivers/clk/ti/dpll3xxx.c

184

static int _omap3_noncore_dpll_bypass(struct clk_hw_omap *clk)

drivers/clk/ti/dpll3xxx.c

189

if (!(clk->dpll_data->modes & (1 << DPLL_LOW_POWER_BYPASS)))

drivers/clk/ti/dpll3xxx.c

193

clk_hw_get_name(&clk->hw));

drivers/clk/ti/dpll3xxx.c

195

ai = omap3_dpll_autoidle_read(clk);

drivers/clk/ti/dpll3xxx.c

197

_omap3_dpll_write_clken(clk, DPLL_LOW_POWER_BYPASS);

drivers/clk/ti/dpll3xxx.c

199

r = _omap3_wait_dpll_status(clk, 0);

drivers/clk/ti/dpll3xxx.c

202

omap3_dpll_allow_idle(clk);

drivers/clk/ti/dpll3xxx.c

216

static int _omap3_noncore_dpll_stop(struct clk_hw_omap *clk)

drivers/clk/ti/dpll3xxx.c

220

if (!(clk->dpll_data->modes & (1 << DPLL_LOW_POWER_STOP)))

drivers/clk/ti/dpll3xxx.c

223

pr_debug("clock: stopping DPLL %s\n", clk_hw_get_name(&clk->hw));

drivers/clk/ti/dpll3xxx.c

225

ai = omap3_dpll_autoidle_read(clk);

drivers/clk/ti/dpll3xxx.c

227

_omap3_dpll_write_clken(clk, DPLL_LOW_POWER_STOP);

drivers/clk/ti/dpll3xxx.c

230

omap3_dpll_allow_idle(clk);

drivers/clk/ti/dpll3xxx.c

247

static void _lookup_dco(struct clk_hw_omap *clk, u8 *dco, u16 m, u8 n)

drivers/clk/ti/dpll3xxx.c

251

clkinp = clk_hw_get_rate(clk_hw_get_parent(&clk->hw));

drivers/clk/ti/dpll3xxx.c

272

static void _lookup_sddiv(struct clk_hw_omap *clk, u8 *sd_div, u16 m, u8 n)

drivers/clk/ti/dpll3xxx.c

277

clkinp = clk_hw_get_rate(clk_hw_get_parent(&clk->hw));

drivers/clk/ti/dpll3xxx.c

301

static void omap3_noncore_dpll_ssc_program(struct clk_hw_omap *clk)

drivers/clk/ti/dpll3xxx.c

303

struct dpll_data *dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

323

__clk_get_name(clk->hw.clk), ref_rate / 70);

drivers/clk/ti/dpll3xxx.c

362

__clk_get_name(clk->hw.clk));

drivers/clk/ti/dpll3xxx.c

384

static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)

drivers/clk/ti/dpll3xxx.c

386

struct dpll_data *dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

392

_omap3_noncore_dpll_bypass(clk);

drivers/clk/ti/dpll3xxx.c

40

static u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk);

drivers/clk/ti/dpll3xxx.c

41

static void omap3_dpll_deny_idle(struct clk_hw_omap *clk);

drivers/clk/ti/dpll3xxx.c

42

static void omap3_dpll_allow_idle(struct clk_hw_omap *clk);

drivers/clk/ti/dpll3xxx.c

422

_lookup_dco(clk, &dco, dd->last_rounded_m, dd->last_rounded_n);

drivers/clk/ti/dpll3xxx.c

427

_lookup_sddiv(clk, &sd_div, dd->last_rounded_m,

drivers/clk/ti/dpll3xxx.c

443

ai = omap3_dpll_autoidle_read(clk);

drivers/clk/ti/dpll3xxx.c

445

omap3_dpll_deny_idle(clk);

drivers/clk/ti/dpll3xxx.c

448

omap3_dpll_autoidle_read(clk);

drivers/clk/ti/dpll3xxx.c

47

static void _omap3_dpll_write_clken(struct clk_hw_omap *clk, u8 clken_bits)

drivers/clk/ti/dpll3xxx.c

476

omap3_noncore_dpll_ssc_program(clk);

drivers/clk/ti/dpll3xxx.c

482

_omap3_noncore_dpll_lock(clk);

drivers/clk/ti/dpll3xxx.c

485

omap3_dpll_allow_idle(clk);

drivers/clk/ti/dpll3xxx.c

501

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

503

return omap2_get_dpll_rate(clk);

drivers/clk/ti/dpll3xxx.c

52

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

524

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

529

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

533

if (clk->clkdm) {

drivers/clk/ti/dpll3xxx.c

534

r = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);

drivers/clk/ti/dpll3xxx.c

539

clk->clkdm_name, r);

drivers/clk/ti/dpll3xxx.c

548

r = _omap3_noncore_dpll_bypass(clk);

drivers/clk/ti/dpll3xxx.c

551

r = _omap3_noncore_dpll_lock(clk);

drivers/clk/ti/dpll3xxx.c

566

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

568

_omap3_noncore_dpll_stop(clk);

drivers/clk/ti/dpll3xxx.c

569

if (clk->clkdm)

drivers/clk/ti/dpll3xxx.c

570

ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);

drivers/clk/ti/dpll3xxx.c

588

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

595

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

61

static int _omap3_wait_dpll_status(struct clk_hw_omap *clk, u8 state)

drivers/clk/ti/dpll3xxx.c

625

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

632

ret = _omap3_noncore_dpll_bypass(clk);

drivers/clk/ti/dpll3xxx.c

634

ret = _omap3_noncore_dpll_lock(clk);

drivers/clk/ti/dpll3xxx.c

653

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

661

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

673

freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n);

drivers/clk/ti/dpll3xxx.c

68

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

680

ret = omap3_noncore_dpll_program(clk, freqsel);

drivers/clk/ti/dpll3xxx.c

69

clk_name = clk_hw_get_name(&clk->hw);

drivers/clk/ti/dpll3xxx.c

731

static u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk)

drivers/clk/ti/dpll3xxx.c

736

if (!clk || !clk->dpll_data)

drivers/clk/ti/dpll3xxx.c

739

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

760

static void omap3_dpll_allow_idle(struct clk_hw_omap *clk)

drivers/clk/ti/dpll3xxx.c

765

if (!clk || !clk->dpll_data)

drivers/clk/ti/dpll3xxx.c

768

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

790

static void omap3_dpll_deny_idle(struct clk_hw_omap *clk)

drivers/clk/ti/dpll3xxx.c

795

if (!clk || !clk->dpll_data)

drivers/clk/ti/dpll3xxx.c

798

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

881

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

885

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

888

clk->context = (v & dd->enable_mask) >> __ffs(dd->enable_mask);

drivers/clk/ti/dpll3xxx.c

890

if (clk->context == DPLL_LOCKED) {

drivers/clk/ti/dpll3xxx.c

910

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

914

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

916

if (clk->context == DPLL_LOCKED) {

drivers/clk/ti/dpll3xxx.c

917

_omap3_dpll_write_clken(clk, 0x4);

drivers/clk/ti/dpll3xxx.c

918

_omap3_wait_dpll_status(clk, 0);

drivers/clk/ti/dpll3xxx.c

926

_omap3_dpll_write_clken(clk, DPLL_LOCKED);

drivers/clk/ti/dpll3xxx.c

927

_omap3_wait_dpll_status(clk, 1);

drivers/clk/ti/dpll3xxx.c

929

_omap3_dpll_write_clken(clk, clk->context);

drivers/clk/ti/dpll3xxx.c

93

static u16 _omap3_dpll_compute_freqsel(struct clk_hw_omap *clk, u8 n)

drivers/clk/ti/dpll3xxx.c

942

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

946

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

949

clk->context = (v & dd->enable_mask) >> __ffs(dd->enable_mask);

drivers/clk/ti/dpll3xxx.c

951

if (clk->context == DPLL_LOCKED) {

drivers/clk/ti/dpll3xxx.c

971

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll3xxx.c

975

dd = clk->dpll_data;

drivers/clk/ti/dpll3xxx.c

98

fint = clk_hw_get_rate(clk->dpll_data->clk_ref) / n;

drivers/clk/ti/dpll3xxx.c

980

if (clk->context == ((ctrl & dd->enable_mask) >>

drivers/clk/ti/dpll3xxx.c

990

if (clk->context == DPLL_LOCKED)

drivers/clk/ti/dpll3xxx.c

991

omap3_noncore_dpll_program(clk, 0);

drivers/clk/ti/dpll3xxx.c

993

_omap3_dpll_write_clken(clk, clk->context);

drivers/clk/ti/dpll44xx.c

116

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll44xx.c

121

if (!clk || !clk->dpll_data)

drivers/clk/ti/dpll44xx.c

124

dd = clk->dpll_data;

drivers/clk/ti/dpll44xx.c

126

rate = omap2_get_dpll_rate(clk);

drivers/clk/ti/dpll44xx.c

149

struct clk_hw_omap *clk = to_clk_hw_omap(hw);

drivers/clk/ti/dpll44xx.c

155

dd = clk->dpll_data;

drivers/clk/ti/dpll44xx.c

37

static void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)

drivers/clk/ti/dpll44xx.c

42

if (!clk)

drivers/clk/ti/dpll44xx.c

45

mask = clk->flags & CLOCK_CLKOUTX2 ?

drivers/clk/ti/dpll44xx.c

49

v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg);

drivers/clk/ti/dpll44xx.c

52

ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg);

drivers/clk/ti/dpll44xx.c

55

static void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk)

drivers/clk/ti/dpll44xx.c

60

if (!clk)

drivers/clk/ti/dpll44xx.c

63

mask = clk->flags & CLOCK_CLKOUTX2 ?

drivers/clk/ti/dpll44xx.c

67

v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg);

drivers/clk/ti/dpll44xx.c

70

ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg);

drivers/clk/ti/fapll.c

490

static struct clk * __init ti_fapll_synth_setup(struct fapll_data *fd,

drivers/clk/ti/fapll.c

496

struct clk *pll_clk)

drivers/clk/ti/fapll.c

500

struct clk *clk = ERR_PTR(-ENOMEM);

drivers/clk/ti/fapll.c

523

clk = clk_register(NULL, &synth->hw);

drivers/clk/ti/fapll.c

524

if (IS_ERR(clk)) {

drivers/clk/ti/fapll.c

529

return clk;

drivers/clk/ti/fapll.c

535

return clk;

drivers/clk/ti/fapll.c

543

struct clk *pll_clk;

drivers/clk/ti/fapll.c

551

fd->outputs.clks = kzalloc(sizeof(struct clk *) *

drivers/clk/ti/fapll.c

616

struct clk *synth_clk;

drivers/clk/ti/fapll.c

63

struct clk *clk_ref;

drivers/clk/ti/fapll.c

64

struct clk *clk_bypass;

drivers/clk/ti/fapll.c

76

struct clk *clk_pll;

drivers/clk/ti/fixed-factor.c

30

struct clk *clk;

drivers/clk/ti/fixed-factor.c

51

clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags,

drivers/clk/ti/fixed-factor.c

54

if (!IS_ERR(clk)) {

drivers/clk/ti/fixed-factor.c

55

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/fixed-factor.c

57

ti_clk_add_alias(clk, clk_name);

drivers/clk/ti/gate.c

118

clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);

drivers/clk/ti/gate.c

120

if (IS_ERR(clk))

drivers/clk/ti/gate.c

123

return clk;

drivers/clk/ti/gate.c

130

struct clk *clk;

drivers/clk/ti/gate.c

159

clk = _register_gate(node, name, parent_name, flags, &reg,

drivers/clk/ti/gate.c

162

if (!IS_ERR(clk))

drivers/clk/ti/gate.c

163

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/gate.c

22

static int omap36xx_gate_clk_enable_with_hsdiv_restore(struct clk_hw *clk);

drivers/clk/ti/gate.c

88

static struct clk *_register_gate(struct device_node *node, const char *name,

drivers/clk/ti/gate.c

96

struct clk *clk;

drivers/clk/ti/interface.c

27

static struct clk *_register_interface(struct device_node *node,

drivers/clk/ti/interface.c

35

struct clk *clk;

drivers/clk/ti/interface.c

53

clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name);

drivers/clk/ti/interface.c

55

if (IS_ERR(clk))

drivers/clk/ti/interface.c

58

return clk;

drivers/clk/ti/interface.c

64

struct clk *clk;

drivers/clk/ti/interface.c

82

clk = _register_interface(node, name, parent_name, &reg,

drivers/clk/ti/interface.c

85

if (!IS_ERR(clk))

drivers/clk/ti/interface.c

86

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ti/mux.c

121

static struct clk *_register_mux(struct device_node *node, const char *name,

drivers/clk/ti/mux.c

128

struct clk *clk;

drivers/clk/ti/mux.c

151

clk = of_ti_clk_register(node, &mux->hw, name);

drivers/clk/ti/mux.c

153

if (IS_ERR(clk))

drivers/clk/ti/mux.c

156

return clk;

drivers/clk/ti/mux.c

167

struct clk *clk;

drivers/clk/ti/mux.c

210

clk = _register_mux(node, name, parent_names, num_parents,

drivers/clk/ti/mux.c

214

if (!IS_ERR(clk))

drivers/clk/ti/mux.c

215

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/clk/ux500/abx500-clk.c

23

static struct clk *ab8500_clks[AB8500_NUM_CLKS];

drivers/clk/ux500/abx500-clk.c

30

struct clk *clk;

drivers/clk/ux500/abx500-clk.c

46

clk = clk_reg_sysctrl_gate(dev , "ab8500_sysclk2", "ab8500_sysclk",

drivers/clk/ux500/abx500-clk.c

49

ab8500_clks[AB8500_SYSCLK_BUF2] = clk;

drivers/clk/ux500/abx500-clk.c

52

clk = clk_reg_sysctrl_gate(dev , "ab8500_sysclk3", "ab8500_sysclk",

drivers/clk/ux500/abx500-clk.c

55

ab8500_clks[AB8500_SYSCLK_BUF3] = clk;

drivers/clk/ux500/abx500-clk.c

58

clk = clk_reg_sysctrl_gate(dev , "ab8500_sysclk4", "ab8500_sysclk",

drivers/clk/ux500/abx500-clk.c

61

ab8500_clks[AB8500_SYSCLK_BUF4] = clk;

drivers/clk/ux500/abx500-clk.c

64

clk = clk_reg_sysctrl_gate_fixed_rate(dev, "ulpclk", NULL,

drivers/clk/ux500/abx500-clk.c

68

ab8500_clks[AB8500_SYSCLK_ULP] = clk;

drivers/clk/ux500/abx500-clk.c

71

clk = clk_reg_sysctrl_set_parent(dev , "intclk", intclk_parents, 2,

drivers/clk/ux500/abx500-clk.c

73

ab8500_clks[AB8500_SYSCLK_INT] = clk;

drivers/clk/ux500/abx500-clk.c

76

clk = clk_reg_sysctrl_gate(dev , "audioclk", "intclk",

drivers/clk/ux500/abx500-clk.c

79

ab8500_clks[AB8500_SYSCLK_AUDIO] = clk;

drivers/clk/ux500/clk-prcc.c

100

struct clk_prcc *clk;

drivers/clk/ux500/clk-prcc.c

102

struct clk *clk_reg;

drivers/clk/ux500/clk-prcc.c

109

clk = kzalloc_obj(*clk);

drivers/clk/ux500/clk-prcc.c

110

if (!clk)

drivers/clk/ux500/clk-prcc.c

113

clk->base = ioremap(phy_base, SZ_4K);

drivers/clk/ux500/clk-prcc.c

114

if (!clk->base)

drivers/clk/ux500/clk-prcc.c

117

clk->cg_sel = cg_sel;

drivers/clk/ux500/clk-prcc.c

118

clk->is_enabled = 1;

drivers/clk/ux500/clk-prcc.c

125

clk->hw.init = &clk_prcc_init;

drivers/clk/ux500/clk-prcc.c

127

clk_reg = clk_register(NULL, &clk->hw);

drivers/clk/ux500/clk-prcc.c

134

iounmap(clk->base);

drivers/clk/ux500/clk-prcc.c

136

kfree(clk);

drivers/clk/ux500/clk-prcc.c

141

struct clk *clk_reg_prcc_pclk(const char *name,

drivers/clk/ux500/clk-prcc.c

151

struct clk *clk_reg_prcc_kclk(const char *name,

drivers/clk/ux500/clk-prcc.c

37

struct clk_prcc *clk = to_clk_prcc(hw);

drivers/clk/ux500/clk-prcc.c

39

writel(clk->cg_sel, (clk->base + PRCC_PCKEN));

drivers/clk/ux500/clk-prcc.c

40

while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))

drivers/clk/ux500/clk-prcc.c

43

clk->is_enabled = 1;

drivers/clk/ux500/clk-prcc.c

49

struct clk_prcc *clk = to_clk_prcc(hw);

drivers/clk/ux500/clk-prcc.c

51

writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));

drivers/clk/ux500/clk-prcc.c

52

clk->is_enabled = 0;

drivers/clk/ux500/clk-prcc.c

57

struct clk_prcc *clk = to_clk_prcc(hw);

drivers/clk/ux500/clk-prcc.c

59

writel(clk->cg_sel, (clk->base + PRCC_KCKEN));

drivers/clk/ux500/clk-prcc.c

60

while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))

drivers/clk/ux500/clk-prcc.c

63

clk->is_enabled = 1;

drivers/clk/ux500/clk-prcc.c

69

struct clk_prcc *clk = to_clk_prcc(hw);

drivers/clk/ux500/clk-prcc.c

71

writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));

drivers/clk/ux500/clk-prcc.c

72

clk->is_enabled = 0;

drivers/clk/ux500/clk-prcc.c

77

struct clk_prcc *clk = to_clk_prcc(hw);

drivers/clk/ux500/clk-prcc.c

78

return clk->is_enabled;

drivers/clk/ux500/clk-prcc.c

93

static struct clk *clk_reg_prcc(const char *name,

drivers/clk/ux500/clk-prcmu.c

102

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

104

if (prcmu_request_clock(clk->cg_sel, false)) {

drivers/clk/ux500/clk-prcmu.c

110

if (clk->opp_requested) {

drivers/clk/ux500/clk-prcmu.c

113

clk->opp_requested = 0;

drivers/clk/ux500/clk-prcmu.c

120

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

122

if (!clk->opp_requested) {

drivers/clk/ux500/clk-prcmu.c

129

clk->opp_requested = 1;

drivers/clk/ux500/clk-prcmu.c

132

err = prcmu_request_clock(clk->cg_sel, true);

drivers/clk/ux500/clk-prcmu.c

135

clk->opp_requested = 0;

drivers/clk/ux500/clk-prcmu.c

144

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

146

if (prcmu_request_clock(clk->cg_sel, false)) {

drivers/clk/ux500/clk-prcmu.c

152

if (clk->opp_requested) {

drivers/clk/ux500/clk-prcmu.c

154

clk->opp_requested = 0;

drivers/clk/ux500/clk-prcmu.c

203

struct clk_prcmu *clk;

drivers/clk/ux500/clk-prcmu.c

212

clk = kzalloc_obj(*clk);

drivers/clk/ux500/clk-prcmu.c

213

if (!clk)

drivers/clk/ux500/clk-prcmu.c

216

clk->cg_sel = cg_sel;

drivers/clk/ux500/clk-prcmu.c

217

clk->opp_requested = 0;

drivers/clk/ux500/clk-prcmu.c

227

clk->hw.init = &clk_prcmu_init;

drivers/clk/ux500/clk-prcmu.c

229

ret = clk_hw_register(NULL, &clk->hw);

drivers/clk/ux500/clk-prcmu.c

233

return &clk->hw;

drivers/clk/ux500/clk-prcmu.c

236

kfree(clk);

drivers/clk/ux500/clk-prcmu.c

302

struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);

drivers/clk/ux500/clk-prcmu.c

304

return prcmu_config_clkout(clk->clkout_id, clk->source, clk->divider);

drivers/clk/ux500/clk-prcmu.c

309

struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);

drivers/clk/ux500/clk-prcmu.c

313

ret = prcmu_config_clkout(clk->clkout_id, clk->source, 0);

drivers/clk/ux500/clk-prcmu.c

322

struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);

drivers/clk/ux500/clk-prcmu.c

324

return (parent_rate / clk->divider);

drivers/clk/ux500/clk-prcmu.c

329

struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);

drivers/clk/ux500/clk-prcmu.c

331

return clk->source;

drivers/clk/ux500/clk-prcmu.c

336

struct clk_prcmu_clkout *clk = to_clk_prcmu_clkout(hw);

drivers/clk/ux500/clk-prcmu.c

338

clk->source = index;

drivers/clk/ux500/clk-prcmu.c

36

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

360

struct clk_prcmu_clkout *clk;

drivers/clk/ux500/clk-prcmu.c

379

clk = kzalloc_obj(*clk);

drivers/clk/ux500/clk-prcmu.c

38

return prcmu_request_clock(clk->cg_sel, true);

drivers/clk/ux500/clk-prcmu.c

380

if (!clk)

drivers/clk/ux500/clk-prcmu.c

383

clk->clkout_id = clkout_id;

drivers/clk/ux500/clk-prcmu.c

384

clk->source = source;

drivers/clk/ux500/clk-prcmu.c

385

clk->divider = divider;

drivers/clk/ux500/clk-prcmu.c

392

clk->hw.init = &clk_prcmu_clkout_init;

drivers/clk/ux500/clk-prcmu.c

394

ret = clk_hw_register(NULL, &clk->hw);

drivers/clk/ux500/clk-prcmu.c

398

return &clk->hw;

drivers/clk/ux500/clk-prcmu.c

400

kfree(clk);

drivers/clk/ux500/clk-prcmu.c

43

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

44

if (prcmu_request_clock(clk->cg_sel, false))

drivers/clk/ux500/clk-prcmu.c

52

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

53

return prcmu_clock_rate(clk->cg_sel);

drivers/clk/ux500/clk-prcmu.c

59

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

60

req->rate = prcmu_round_clock_rate(clk->cg_sel, req->rate);

drivers/clk/ux500/clk-prcmu.c

68

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

69

return prcmu_set_clock_rate(clk->cg_sel, rate);

drivers/clk/ux500/clk-prcmu.c

75

struct clk_prcmu *clk = to_clk_prcmu(hw);

drivers/clk/ux500/clk-prcmu.c

77

if (!clk->opp_requested) {

drivers/clk/ux500/clk-prcmu.c

86

clk->opp_requested = 1;

drivers/clk/ux500/clk-prcmu.c

89

err = prcmu_request_clock(clk->cg_sel, true);

drivers/clk/ux500/clk-prcmu.c

93

clk->opp_requested = 0;

drivers/clk/ux500/clk-sysctrl.c

118

static struct clk *clk_reg_sysctrl(struct device *dev,

drivers/clk/ux500/clk-sysctrl.c

130

struct clk_sysctrl *clk;

drivers/clk/ux500/clk-sysctrl.c

132

struct clk *clk_reg;

drivers/clk/ux500/clk-sysctrl.c

143

clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);

drivers/clk/ux500/clk-sysctrl.c

144

if (!clk)

drivers/clk/ux500/clk-sysctrl.c

148

clk->reg_sel[0] = reg_sel[0];

drivers/clk/ux500/clk-sysctrl.c

149

clk->reg_bits[0] = reg_bits[0];

drivers/clk/ux500/clk-sysctrl.c

150

clk->reg_mask[0] = reg_mask[0];

drivers/clk/ux500/clk-sysctrl.c

154

clk->reg_sel[i] = reg_sel[i];

drivers/clk/ux500/clk-sysctrl.c

155

clk->reg_bits[i] = reg_bits[i];

drivers/clk/ux500/clk-sysctrl.c

156

clk->reg_mask[i] = reg_mask[i];

drivers/clk/ux500/clk-sysctrl.c

159

clk->parent_index = 0;

drivers/clk/ux500/clk-sysctrl.c

160

clk->rate = rate;

drivers/clk/ux500/clk-sysctrl.c

161

clk->enable_delay_us = enable_delay_us;

drivers/clk/ux500/clk-sysctrl.c

162

clk->dev = dev;

drivers/clk/ux500/clk-sysctrl.c

169

clk->hw.init = &clk_sysctrl_init;

drivers/clk/ux500/clk-sysctrl.c

171

clk_reg = devm_clk_register(clk->dev, &clk->hw);

drivers/clk/ux500/clk-sysctrl.c

178

struct clk *clk_reg_sysctrl_gate(struct device *dev,

drivers/clk/ux500/clk-sysctrl.c

195

struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,

drivers/clk/ux500/clk-sysctrl.c

214

struct clk *clk_reg_sysctrl_set_parent(struct device *dev,

drivers/clk/ux500/clk-sysctrl.c

38

struct clk_sysctrl *clk = to_clk_sysctrl(hw);

drivers/clk/ux500/clk-sysctrl.c

40

ret = ab8500_sysctrl_write(clk->reg_sel[0], clk->reg_mask[0],

drivers/clk/ux500/clk-sysctrl.c

41

clk->reg_bits[0]);

drivers/clk/ux500/clk-sysctrl.c

43

if (!ret && clk->enable_delay_us)

drivers/clk/ux500/clk-sysctrl.c

44

usleep_range(clk->enable_delay_us, clk->enable_delay_us +

drivers/clk/ux500/clk-sysctrl.c

45

(clk->enable_delay_us >> 2));

drivers/clk/ux500/clk-sysctrl.c

52

struct clk_sysctrl *clk = to_clk_sysctrl(hw);

drivers/clk/ux500/clk-sysctrl.c

53

if (ab8500_sysctrl_clear(clk->reg_sel[0], clk->reg_mask[0]))

drivers/clk/ux500/clk-sysctrl.c

54

dev_err(clk->dev, "clk_sysctrl: %s fail to clear %s.\n",

drivers/clk/ux500/clk-sysctrl.c

61

struct clk_sysctrl *clk = to_clk_sysctrl(hw);

drivers/clk/ux500/clk-sysctrl.c

62

return clk->rate;

drivers/clk/ux500/clk-sysctrl.c

67

struct clk_sysctrl *clk = to_clk_sysctrl(hw);

drivers/clk/ux500/clk-sysctrl.c

68

u8 old_index = clk->parent_index;

drivers/clk/ux500/clk-sysctrl.c

71

if (clk->reg_sel[old_index]) {

drivers/clk/ux500/clk-sysctrl.c

72

ret = ab8500_sysctrl_clear(clk->reg_sel[old_index],

drivers/clk/ux500/clk-sysctrl.c

73

clk->reg_mask[old_index]);

drivers/clk/ux500/clk-sysctrl.c

78

if (clk->reg_sel[index]) {

drivers/clk/ux500/clk-sysctrl.c

79

ret = ab8500_sysctrl_write(clk->reg_sel[index],

drivers/clk/ux500/clk-sysctrl.c

80

clk->reg_mask[index],

drivers/clk/ux500/clk-sysctrl.c

81

clk->reg_bits[index]);

drivers/clk/ux500/clk-sysctrl.c

83

if (clk->reg_sel[old_index])

drivers/clk/ux500/clk-sysctrl.c

84

ab8500_sysctrl_write(clk->reg_sel[old_index],

drivers/clk/ux500/clk-sysctrl.c

85

clk->reg_mask[old_index],

drivers/clk/ux500/clk-sysctrl.c

86

clk->reg_bits[old_index]);

drivers/clk/ux500/clk-sysctrl.c

90

clk->parent_index = index;

drivers/clk/ux500/clk-sysctrl.c

97

struct clk_sysctrl *clk = to_clk_sysctrl(hw);

drivers/clk/ux500/clk-sysctrl.c

98

return clk->parent_index;

drivers/clk/ux500/clk.h

15

struct clk;

drivers/clk/ux500/clk.h

18

struct clk *clk_reg_prcc_pclk(const char *name,

drivers/clk/ux500/clk.h

24

struct clk *clk_reg_prcc_kclk(const char *name,

drivers/clk/ux500/clk.h

68

struct clk *clk_reg_sysctrl_gate(struct device *dev,

drivers/clk/ux500/clk.h

77

struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,

drivers/clk/ux500/clk.h

87

struct clk *clk_reg_sysctrl_set_parent(struct device *dev,

drivers/clk/ux500/u8500_of_clk.c

130

struct clk *clk, *rtc_clk, *twd_clk;

drivers/clk/ux500/u8500_of_clk.c

18

static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];

drivers/clk/ux500/u8500_of_clk.c

19

static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];

drivers/clk/ux500/u8500_of_clk.c

22

#define PRCC_SHOW(clk, base, bit) \

drivers/clk/ux500/u8500_of_clk.c

23

clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]

drivers/clk/ux500/u8500_of_clk.c

24

#define PRCC_PCLK_STORE(clk, base, bit) \

drivers/clk/ux500/u8500_of_clk.c

25

prcc_pclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk

drivers/clk/ux500/u8500_of_clk.c

26

#define PRCC_KCLK_STORE(clk, base, bit) \

drivers/clk/ux500/u8500_of_clk.c

27

prcc_kclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk

drivers/clk/ux500/u8500_of_clk.c

29

static struct clk *ux500_twocell_get(struct of_phandle_args *clkspec,

drivers/clk/ux500/u8500_of_clk.c

303

clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

305

PRCC_PCLK_STORE(clk, 1, 0);

drivers/clk/ux500/u8500_of_clk.c

307

clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

309

PRCC_PCLK_STORE(clk, 1, 1);

drivers/clk/ux500/u8500_of_clk.c

311

clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

313

PRCC_PCLK_STORE(clk, 1, 2);

drivers/clk/ux500/u8500_of_clk.c

315

clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

317

PRCC_PCLK_STORE(clk, 1, 3);

drivers/clk/ux500/u8500_of_clk.c

319

clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

32

struct clk **clk_data = data;

drivers/clk/ux500/u8500_of_clk.c

321

PRCC_PCLK_STORE(clk, 1, 4);

drivers/clk/ux500/u8500_of_clk.c

323

clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

325

PRCC_PCLK_STORE(clk, 1, 5);

drivers/clk/ux500/u8500_of_clk.c

327

clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

329

PRCC_PCLK_STORE(clk, 1, 6);

drivers/clk/ux500/u8500_of_clk.c

331

clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

333

PRCC_PCLK_STORE(clk, 1, 7);

drivers/clk/ux500/u8500_of_clk.c

335

clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

337

PRCC_PCLK_STORE(clk, 1, 8);

drivers/clk/ux500/u8500_of_clk.c

339

clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

341

PRCC_PCLK_STORE(clk, 1, 9);

drivers/clk/ux500/u8500_of_clk.c

343

clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

345

PRCC_PCLK_STORE(clk, 1, 10);

drivers/clk/ux500/u8500_of_clk.c

347

clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", bases[CLKRST1_INDEX],

drivers/clk/ux500/u8500_of_clk.c

349

PRCC_PCLK_STORE(clk, 1, 11);

drivers/clk/ux500/u8500_of_clk.c

351

clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

353

PRCC_PCLK_STORE(clk, 2, 0);

drivers/clk/ux500/u8500_of_clk.c

355

clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

357

PRCC_PCLK_STORE(clk, 2, 1);

drivers/clk/ux500/u8500_of_clk.c

359

clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

361

PRCC_PCLK_STORE(clk, 2, 2);

drivers/clk/ux500/u8500_of_clk.c

363

clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

365

PRCC_PCLK_STORE(clk, 2, 3);

drivers/clk/ux500/u8500_of_clk.c

367

clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

369

PRCC_PCLK_STORE(clk, 2, 4);

drivers/clk/ux500/u8500_of_clk.c

371

clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

373

PRCC_PCLK_STORE(clk, 2, 5);

drivers/clk/ux500/u8500_of_clk.c

375

clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

377

PRCC_PCLK_STORE(clk, 2, 6);

drivers/clk/ux500/u8500_of_clk.c

379

clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

381

PRCC_PCLK_STORE(clk, 2, 7);

drivers/clk/ux500/u8500_of_clk.c

383

clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

385

PRCC_PCLK_STORE(clk, 2, 8);

drivers/clk/ux500/u8500_of_clk.c

387

clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

389

PRCC_PCLK_STORE(clk, 2, 9);

drivers/clk/ux500/u8500_of_clk.c

391

clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

393

PRCC_PCLK_STORE(clk, 2, 10);

drivers/clk/ux500/u8500_of_clk.c

395

clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

397

PRCC_PCLK_STORE(clk, 2, 11);

drivers/clk/ux500/u8500_of_clk.c

399

clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", bases[CLKRST2_INDEX],

drivers/clk/ux500/u8500_of_clk.c

401

PRCC_PCLK_STORE(clk, 2, 12);

drivers/clk/ux500/u8500_of_clk.c

403

clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

405

PRCC_PCLK_STORE(clk, 3, 0);

drivers/clk/ux500/u8500_of_clk.c

407

clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

409

PRCC_PCLK_STORE(clk, 3, 1);

drivers/clk/ux500/u8500_of_clk.c

411

clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

413

PRCC_PCLK_STORE(clk, 3, 2);

drivers/clk/ux500/u8500_of_clk.c

415

clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

417

PRCC_PCLK_STORE(clk, 3, 3);

drivers/clk/ux500/u8500_of_clk.c

419

clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

421

PRCC_PCLK_STORE(clk, 3, 4);

drivers/clk/ux500/u8500_of_clk.c

423

clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

425

PRCC_PCLK_STORE(clk, 3, 5);

drivers/clk/ux500/u8500_of_clk.c

427

clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

429

PRCC_PCLK_STORE(clk, 3, 6);

drivers/clk/ux500/u8500_of_clk.c

431

clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

433

PRCC_PCLK_STORE(clk, 3, 7);

drivers/clk/ux500/u8500_of_clk.c

435

clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", bases[CLKRST3_INDEX],

drivers/clk/ux500/u8500_of_clk.c

437

PRCC_PCLK_STORE(clk, 3, 8);

drivers/clk/ux500/u8500_of_clk.c

439

clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", bases[CLKRST5_INDEX],

drivers/clk/ux500/u8500_of_clk.c

441

PRCC_PCLK_STORE(clk, 5, 0);

drivers/clk/ux500/u8500_of_clk.c

443

clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", bases[CLKRST5_INDEX],

drivers/clk/ux500/u8500_of_clk.c

445

PRCC_PCLK_STORE(clk, 5, 1);

drivers/clk/ux500/u8500_of_clk.c

447

clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", bases[CLKRST6_INDEX],

drivers/clk/ux500/u8500_of_clk.c

449

PRCC_PCLK_STORE(clk, 6, 0);

drivers/clk/ux500/u8500_of_clk.c

451

clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", bases[CLKRST6_INDEX],

drivers/clk/ux500/u8500_of_clk.c

453

PRCC_PCLK_STORE(clk, 6, 1);

drivers/clk/ux500/u8500_of_clk.c

455

clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", bases[CLKRST6_INDEX],

drivers/clk/ux500/u8500_of_clk.c

457

PRCC_PCLK_STORE(clk, 6, 2);

drivers/clk/ux500/u8500_of_clk.c

459

clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", bases[CLKRST6_INDEX],

drivers/clk/ux500/u8500_of_clk.c

461

PRCC_PCLK_STORE(clk, 6, 3);

drivers/clk/ux500/u8500_of_clk.c

463

clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", bases[CLKRST6_INDEX],

drivers/clk/ux500/u8500_of_clk.c

465

PRCC_PCLK_STORE(clk, 6, 4);

drivers/clk/ux500/u8500_of_clk.c

467

clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", bases[CLKRST6_INDEX],

drivers/clk/ux500/u8500_of_clk.c

469

PRCC_PCLK_STORE(clk, 6, 5);

drivers/clk/ux500/u8500_of_clk.c

471

clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", bases[CLKRST6_INDEX],

drivers/clk/ux500/u8500_of_clk.c

473

PRCC_PCLK_STORE(clk, 6, 6);

drivers/clk/ux500/u8500_of_clk.c

475

clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", bases[CLKRST6_INDEX],

drivers/clk/ux500/u8500_of_clk.c

477

PRCC_PCLK_STORE(clk, 6, 7);

drivers/clk/ux500/u8500_of_clk.c

488

clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",

drivers/clk/ux500/u8500_of_clk.c

490

PRCC_KCLK_STORE(clk, 1, 0);

drivers/clk/ux500/u8500_of_clk.c

492

clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",

drivers/clk/ux500/u8500_of_clk.c

494

PRCC_KCLK_STORE(clk, 1, 1);

drivers/clk/ux500/u8500_of_clk.c

496

clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk",

drivers/clk/ux500/u8500_of_clk.c

498

PRCC_KCLK_STORE(clk, 1, 2);

drivers/clk/ux500/u8500_of_clk.c

500

clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk",

drivers/clk/ux500/u8500_of_clk.c

502

PRCC_KCLK_STORE(clk, 1, 3);

drivers/clk/ux500/u8500_of_clk.c

504

clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk",

drivers/clk/ux500/u8500_of_clk.c

506

PRCC_KCLK_STORE(clk, 1, 4);

drivers/clk/ux500/u8500_of_clk.c

508

clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk",

drivers/clk/ux500/u8500_of_clk.c

510

PRCC_KCLK_STORE(clk, 1, 5);

drivers/clk/ux500/u8500_of_clk.c

512

clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk",

drivers/clk/ux500/u8500_of_clk.c

514

PRCC_KCLK_STORE(clk, 1, 6);

drivers/clk/ux500/u8500_of_clk.c

516

clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk",

drivers/clk/ux500/u8500_of_clk.c

518

PRCC_KCLK_STORE(clk, 1, 8);

drivers/clk/ux500/u8500_of_clk.c

520

clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk",

drivers/clk/ux500/u8500_of_clk.c

522

PRCC_KCLK_STORE(clk, 1, 9);

drivers/clk/ux500/u8500_of_clk.c

524

clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk",

drivers/clk/ux500/u8500_of_clk.c

526

PRCC_KCLK_STORE(clk, 1, 10);

drivers/clk/ux500/u8500_of_clk.c

529

clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk",

drivers/clk/ux500/u8500_of_clk.c

531

PRCC_KCLK_STORE(clk, 2, 0);

drivers/clk/ux500/u8500_of_clk.c

533

clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk",

drivers/clk/ux500/u8500_of_clk.c

535

PRCC_KCLK_STORE(clk, 2, 2);

drivers/clk/ux500/u8500_of_clk.c

537

clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk",

drivers/clk/ux500/u8500_of_clk.c

539

PRCC_KCLK_STORE(clk, 2, 3);

drivers/clk/ux500/u8500_of_clk.c

541

clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk",

drivers/clk/ux500/u8500_of_clk.c

543

PRCC_KCLK_STORE(clk, 2, 4);

drivers/clk/ux500/u8500_of_clk.c

545

clk = clk_reg_prcc_kclk("p2_sdi3_kclk", "sdmmcclk",

drivers/clk/ux500/u8500_of_clk.c

547

PRCC_KCLK_STORE(clk, 2, 5);

drivers/clk/ux500/u8500_of_clk.c

550

clk = clk_reg_prcc_kclk("p2_ssirx_kclk", "hsirxclk",

drivers/clk/ux500/u8500_of_clk.c

553

PRCC_KCLK_STORE(clk, 2, 6);

drivers/clk/ux500/u8500_of_clk.c

555

clk = clk_reg_prcc_kclk("p2_ssitx_kclk", "hsitxclk",

drivers/clk/ux500/u8500_of_clk.c

558

PRCC_KCLK_STORE(clk, 2, 7);

drivers/clk/ux500/u8500_of_clk.c

561

clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk",

drivers/clk/ux500/u8500_of_clk.c

563

PRCC_KCLK_STORE(clk, 3, 1);

drivers/clk/ux500/u8500_of_clk.c

565

clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk",

drivers/clk/ux500/u8500_of_clk.c

567

PRCC_KCLK_STORE(clk, 3, 2);

drivers/clk/ux500/u8500_of_clk.c

569

clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk",

drivers/clk/ux500/u8500_of_clk.c

571

PRCC_KCLK_STORE(clk, 3, 3);

drivers/clk/ux500/u8500_of_clk.c

573

clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk",

drivers/clk/ux500/u8500_of_clk.c

575

PRCC_KCLK_STORE(clk, 3, 4);

drivers/clk/ux500/u8500_of_clk.c

577

clk = clk_reg_prcc_kclk("p3_ske_kclk", "rtc32k",

drivers/clk/ux500/u8500_of_clk.c

579

PRCC_KCLK_STORE(clk, 3, 5);

drivers/clk/ux500/u8500_of_clk.c

581

clk = clk_reg_prcc_kclk("p3_uart2_kclk", "uartclk",

drivers/clk/ux500/u8500_of_clk.c

583

PRCC_KCLK_STORE(clk, 3, 6);

drivers/clk/ux500/u8500_of_clk.c

585

clk = clk_reg_prcc_kclk("p3_sdi5_kclk", "sdmmcclk",

drivers/clk/ux500/u8500_of_clk.c

587

PRCC_KCLK_STORE(clk, 3, 7);

drivers/clk/ux500/u8500_of_clk.c

590

clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk",

drivers/clk/ux500/u8500_of_clk.c

592

PRCC_KCLK_STORE(clk, 6, 0);

drivers/clk/versatile/clk-icst.c

354

struct clk *icst_clk_setup(struct device *dev,

drivers/clk/versatile/clk-icst.c

361

struct clk *clk;

drivers/clk/versatile/clk-icst.c

388

clk = clk_register(dev, &icst->hw);

drivers/clk/versatile/clk-icst.c

389

if (IS_ERR(clk)) {

drivers/clk/versatile/clk-icst.c

394

return clk;

drivers/clk/versatile/clk-icst.c

398

struct clk *icst_clk_register(struct device *dev,

drivers/clk/versatile/clk-icst.c

507

struct clk *regclk;

drivers/clk/versatile/clk-icst.h

30

struct clk *icst_clk_register(struct device *dev,

drivers/clk/versatile/clk-icst.h

36

struct clk *icst_clk_setup(struct device *dev,

drivers/clk/versatile/clk-impd1.c

67

struct clk *clk = ERR_PTR(-EINVAL);

drivers/clk/versatile/clk-impd1.c

90

clk = icst_clk_setup(NULL, desc, name, parent_name, map,

drivers/clk/versatile/clk-impd1.c

92

if (!IS_ERR(clk)) {

drivers/clk/versatile/clk-impd1.c

93

of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/versatile/clk-impd1.c

97

ret = PTR_ERR(clk);

drivers/clk/versatile/clk-sp810.c

131

sp810->timerclken[i].clk = clk_register(NULL,

drivers/clk/versatile/clk-sp810.c

133

WARN_ON(IS_ERR(sp810->timerclken[i].clk));

drivers/clk/versatile/clk-sp810.c

23

struct clk *clk;

drivers/clk/versatile/clk-sp810.c

71

static struct clk *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec,

drivers/clk/versatile/clk-sp810.c

80

return sp810->timerclken[clkspec->args[0]].clk;

drivers/clk/versatile/clk-versatile.c

59

struct clk *clk;

drivers/clk/versatile/clk-versatile.c

81

clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base);

drivers/clk/versatile/clk-versatile.c

82

if (!IS_ERR(clk))

drivers/clk/versatile/clk-versatile.c

83

of_clk_add_provider(np, of_clk_src_simple_get, clk);

drivers/clk/visconti/clkc.c

31

u32 clk = BIT(gate->ck_idx);

drivers/clk/visconti/clkc.c

35

return (val & clk) ? 1 : 0;

drivers/clk/visconti/clkc.c

41

u32 clk = BIT(gate->ck_idx);

drivers/clk/visconti/clkc.c

51

regmap_update_bits(gate->regmap, gate->ckoff_offset, clk, clk);

drivers/clk/visconti/clkc.c

58

u32 clk = BIT(gate->ck_idx);

drivers/clk/visconti/clkc.c

62

regmap_update_bits(gate->regmap, gate->ckon_offset, clk, clk);

drivers/clk/visconti/pll.c

309

struct clk_hw *clk;

drivers/clk/visconti/pll.c

311

clk = visconti_register_pll(ctx,

drivers/clk/visconti/pll.c

317

if (IS_ERR(clk)) {

drivers/clk/visconti/pll.c

322

visconti_pll_add_lookup(ctx, clk, list->id);

drivers/clk/x86/clk-fch.c

71

clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk);

drivers/clk/x86/clk-lpss-atom.c

19

struct clk *clk;

drivers/clk/x86/clk-lpss-atom.c

27

clk = clk_register_fixed_rate(&pdev->dev, drvdata->name, NULL,

drivers/clk/x86/clk-lpss-atom.c

29

if (IS_ERR(clk))

drivers/clk/x86/clk-lpss-atom.c

30

return PTR_ERR(clk);

drivers/clk/x86/clk-lpss-atom.c

32

drvdata->clk = clk;

drivers/clk/x86/clk-pmc-atom.c

106

struct clk_plt *clk = to_clk_plt(hw);

drivers/clk/x86/clk-pmc-atom.c

109

value = readl(clk->reg);

drivers/clk/x86/clk-pmc-atom.c

116

struct clk_plt *clk = to_clk_plt(hw);

drivers/clk/x86/clk-pmc-atom.c

118

plt_clk_reg_update(clk, PMC_MASK_CLK_CTL, PMC_CLK_CTL_FORCE_ON);

drivers/clk/x86/clk-pmc-atom.c

125

struct clk_plt *clk = to_clk_plt(hw);

drivers/clk/x86/clk-pmc-atom.c

127

plt_clk_reg_update(clk, PMC_MASK_CLK_CTL, PMC_CLK_CTL_FORCE_OFF);

drivers/clk/x86/clk-pmc-atom.c

132

struct clk_plt *clk = to_clk_plt(hw);

drivers/clk/x86/clk-pmc-atom.c

135

value = readl(clk->reg);

drivers/clk/x86/clk-pmc-atom.c

21

struct clk_hw *clk;

drivers/clk/x86/clk-pmc-atom.c

213

pclk->clk = clk_hw_register_fixed_rate(&pdev->dev, name, parent_name,

drivers/clk/x86/clk-pmc-atom.c

215

if (IS_ERR(pclk->clk))

drivers/clk/x86/clk-pmc-atom.c

216

return ERR_CAST(pclk->clk);

drivers/clk/x86/clk-pmc-atom.c

218

pclk->lookup = clkdev_hw_create(pclk->clk, name, NULL);

drivers/clk/x86/clk-pmc-atom.c

220

clk_hw_unregister_fixed_rate(pclk->clk);

drivers/clk/x86/clk-pmc-atom.c

230

clk_hw_unregister_fixed_rate(pclk->clk);

drivers/clk/x86/clk-pmc-atom.c

81

static void plt_clk_reg_update(struct clk_plt *clk, u32 mask, u32 val)

drivers/clk/x86/clk-pmc-atom.c

86

spin_lock_irqsave(&clk->lock, flags);

drivers/clk/x86/clk-pmc-atom.c

88

tmp = readl(clk->reg);

drivers/clk/x86/clk-pmc-atom.c

90

writel(tmp, clk->reg);

drivers/clk/x86/clk-pmc-atom.c

92

spin_unlock_irqrestore(&clk->lock, flags);

drivers/clk/x86/clk-pmc-atom.c

97

struct clk_plt *clk = to_clk_plt(hw);

drivers/clk/x86/clk-pmc-atom.c

99

plt_clk_reg_update(clk, PMC_MASK_CLK_FREQ, plt_parent_to_reg(index));

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

139

struct clk *clk_in1;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

140

struct clk *axi_clk;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

939

if (ndata->clk == clk_wzrd->clk_in1)

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

941

else if (ndata->clk == clk_wzrd->axi_clk)

drivers/clk/xilinx/xlnx_vcu.c

64

struct clk *pll_ref;

drivers/clk/xilinx/xlnx_vcu.c

65

struct clk *aclk;

drivers/clk/zynq/clkc.c

61

static struct clk *ps_clk;

drivers/clk/zynq/clkc.c

62

static struct clk *clks[clk_max];

drivers/clk/zynq/pll.c

101

struct zynq_pll *clk = to_zynq_pll(hw);

drivers/clk/zynq/pll.c

103

spin_lock_irqsave(clk->lock, flags);

drivers/clk/zynq/pll.c

105

reg = readl(clk->pll_ctrl);

drivers/clk/zynq/pll.c

107

spin_unlock_irqrestore(clk->lock, flags);

drivers/clk/zynq/pll.c

121

struct zynq_pll *clk = to_zynq_pll(hw);

drivers/clk/zynq/pll.c

129

spin_lock_irqsave(clk->lock, flags);

drivers/clk/zynq/pll.c

131

reg = readl(clk->pll_ctrl);

drivers/clk/zynq/pll.c

133

writel(reg, clk->pll_ctrl);

drivers/clk/zynq/pll.c

134

while (!(readl(clk->pll_status) & (1 << clk->lockbit)))

drivers/clk/zynq/pll.c

137

spin_unlock_irqrestore(clk->lock, flags);

drivers/clk/zynq/pll.c

151

struct zynq_pll *clk = to_zynq_pll(hw);

drivers/clk/zynq/pll.c

159

spin_lock_irqsave(clk->lock, flags);

drivers/clk/zynq/pll.c

161

reg = readl(clk->pll_ctrl);

drivers/clk/zynq/pll.c

163

writel(reg, clk->pll_ctrl);

drivers/clk/zynq/pll.c

165

spin_unlock_irqrestore(clk->lock, flags);

drivers/clk/zynq/pll.c

186

struct clk *clk_register_zynq_pll(const char *name, const char *parent,

drivers/clk/zynq/pll.c

191

struct clk *clk;

drivers/clk/zynq/pll.c

222

clk = clk_register(NULL, &pll->hw);

drivers/clk/zynq/pll.c

223

if (WARN_ON(IS_ERR(clk)))

drivers/clk/zynq/pll.c

226

return clk;

drivers/clk/zynq/pll.c

231

return clk;

drivers/clk/zynq/pll.c

76

struct zynq_pll *clk = to_zynq_pll(hw);

drivers/clk/zynq/pll.c

83

fbdiv = (readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >>

drivers/clk/zynqmp/pll.c

135

struct zynqmp_pll *clk = to_zynqmp_pll(hw);

drivers/clk/zynqmp/pll.c

136

u32 clk_id = clk->clk_id;

drivers/clk/zynqmp/pll.c

179

struct zynqmp_pll *clk = to_zynqmp_pll(hw);

drivers/clk/zynqmp/pll.c

180

u32 clk_id = clk->clk_id;

drivers/clk/zynqmp/pll.c

226

struct zynqmp_pll *clk = to_zynqmp_pll(hw);

drivers/clk/zynqmp/pll.c

228

u32 clk_id = clk->clk_id;

drivers/clk/zynqmp/pll.c

250

struct zynqmp_pll *clk = to_zynqmp_pll(hw);

drivers/clk/zynqmp/pll.c

252

u32 clk_id = clk->clk_id;

drivers/clk/zynqmp/pll.c

259

if (zynqmp_pll_is_enabled(hw) && (!clk->set_pll_mode))

drivers/clk/zynqmp/pll.c

262

clk->set_pll_mode = false;

drivers/clk/zynqmp/pll.c

278

struct zynqmp_pll *clk = to_zynqmp_pll(hw);

drivers/clk/zynqmp/pll.c

280

u32 clk_id = clk->clk_id;

drivers/clk/zynqmp/pll.c

51

struct zynqmp_pll *clk = to_zynqmp_pll(hw);

drivers/clk/zynqmp/pll.c

52

u32 clk_id = clk->clk_id;

drivers/clk/zynqmp/pll.c

74

struct zynqmp_pll *clk = to_zynqmp_pll(hw);

drivers/clk/zynqmp/pll.c

75

u32 clk_id = clk->clk_id;

drivers/clk/zynqmp/pll.c

90

clk->set_pll_mode = true;

drivers/clocksource/arc_timer.c

34

struct clk *clk;

drivers/clocksource/arc_timer.c

37

clk = of_clk_get(node, 0);

drivers/clocksource/arc_timer.c

38

if (IS_ERR(clk)) {

drivers/clocksource/arc_timer.c

40

return PTR_ERR(clk);

drivers/clocksource/arc_timer.c

43

ret = clk_prepare_enable(clk);

drivers/clocksource/arc_timer.c

49

arc_timer_freq = clk_get_rate(clk);

drivers/clocksource/arm_arch_timer.c

321

struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

342

struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

344

erratum_set_next_event_generic(ARCH_TIMER_VIRT_ACCESS, evt, clk);

drivers/clocksource/arm_arch_timer.c

349

struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

351

erratum_set_next_event_generic(ARCH_TIMER_PHYS_ACCESS, evt, clk);

drivers/clocksource/arm_arch_timer.c

595

struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

606

static int arch_timer_shutdown_virt(struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

608

return arch_timer_shutdown(ARCH_TIMER_VIRT_ACCESS, clk);

drivers/clocksource/arm_arch_timer.c

611

static int arch_timer_shutdown_phys(struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

613

return arch_timer_shutdown(ARCH_TIMER_PHYS_ACCESS, clk);

drivers/clocksource/arm_arch_timer.c

617

struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

636

struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

638

set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);

drivers/clocksource/arm_arch_timer.c

643

struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

645

set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);

drivers/clocksource/arm_arch_timer.c

674

static void __arch_timer_setup(struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

676

typeof(clk->set_next_event) sne;

drivers/clocksource/arm_arch_timer.c

679

clk->features = CLOCK_EVT_FEAT_ONESHOT;

drivers/clocksource/arm_arch_timer.c

684

clk->features |= CLOCK_EVT_FEAT_C3STOP;

drivers/clocksource/arm_arch_timer.c

685

clk->name = "arch_sys_timer";

drivers/clocksource/arm_arch_timer.c

686

clk->rating = 450;

drivers/clocksource/arm_arch_timer.c

687

clk->cpumask = cpumask_of(smp_processor_id());

drivers/clocksource/arm_arch_timer.c

688

clk->irq = arch_timer_ppi[arch_timer_uses_ppi];

drivers/clocksource/arm_arch_timer.c

691

clk->set_state_shutdown = arch_timer_shutdown_virt;

drivers/clocksource/arm_arch_timer.c

692

clk->set_state_oneshot_stopped = arch_timer_shutdown_virt;

drivers/clocksource/arm_arch_timer.c

698

clk->set_state_shutdown = arch_timer_shutdown_phys;

drivers/clocksource/arm_arch_timer.c

699

clk->set_state_oneshot_stopped = arch_timer_shutdown_phys;

drivers/clocksource/arm_arch_timer.c

706

clk->set_next_event = sne;

drivers/clocksource/arm_arch_timer.c

709

clk->set_state_shutdown(clk);

drivers/clocksource/arm_arch_timer.c

711

clockevents_config_and_register(clk, arch_timer_rate, 0xf, max_delta);

drivers/clocksource/arm_arch_timer.c

828

struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt);

drivers/clocksource/arm_arch_timer.c

831

__arch_timer_setup(clk);

drivers/clocksource/arm_arch_timer.c

952

static void arch_timer_stop(struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer.c

954

pr_debug("disable IRQ%d cpu #%d\n", clk->irq, smp_processor_id());

drivers/clocksource/arm_arch_timer.c

963

struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt);

drivers/clocksource/arm_arch_timer.c

965

arch_timer_stop(clk);

drivers/clocksource/arm_arch_timer_mmio.c

140

static int arch_timer_mmio_shutdown(struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer_mmio.c

142

struct arch_timer *at = evt_to_arch_timer(clk);

drivers/clocksource/arm_arch_timer_mmio.c

153

struct clock_event_device *clk)

drivers/clocksource/arm_arch_timer_mmio.c

155

struct arch_timer *timer = evt_to_arch_timer(clk);

drivers/clocksource/arm_global_timer.c

175

struct clock_event_device *clk = this_cpu_ptr(gt_evt);

drivers/clocksource/arm_global_timer.c

177

clk->name = "arm_global_timer";

drivers/clocksource/arm_global_timer.c

178

clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |

drivers/clocksource/arm_global_timer.c

180

clk->set_state_shutdown = gt_clockevent_shutdown;

drivers/clocksource/arm_global_timer.c

181

clk->set_state_periodic = gt_clockevent_set_periodic;

drivers/clocksource/arm_global_timer.c

182

clk->set_state_oneshot = gt_clockevent_shutdown;

drivers/clocksource/arm_global_timer.c

183

clk->set_state_oneshot_stopped = gt_clockevent_shutdown;

drivers/clocksource/arm_global_timer.c

184

clk->set_next_event = gt_clockevent_set_next_event;

drivers/clocksource/arm_global_timer.c

185

clk->cpumask = cpumask_of(cpu);

drivers/clocksource/arm_global_timer.c

186

clk->rating = 300;

drivers/clocksource/arm_global_timer.c

187

clk->irq = gt_ppi;

drivers/clocksource/arm_global_timer.c

188

clockevents_config_and_register(clk, gt_target_rate,

drivers/clocksource/arm_global_timer.c

190

enable_percpu_irq(clk->irq, IRQ_TYPE_NONE);

drivers/clocksource/arm_global_timer.c

196

struct clock_event_device *clk = this_cpu_ptr(gt_evt);

drivers/clocksource/arm_global_timer.c

198

disable_percpu_irq(clk->irq);

drivers/clocksource/arm_global_timer.c

375

struct clk *gt_clk;

drivers/clocksource/armv7m_systick.c

27

struct clk *clk = NULL;

drivers/clocksource/armv7m_systick.c

40

clk = of_clk_get(np, 0);

drivers/clocksource/armv7m_systick.c

41

if (IS_ERR(clk)) {

drivers/clocksource/armv7m_systick.c

42

ret = PTR_ERR(clk);

drivers/clocksource/armv7m_systick.c

46

ret = clk_prepare_enable(clk);

drivers/clocksource/armv7m_systick.c

50

rate = clk_get_rate(clk);

drivers/clocksource/armv7m_systick.c

64

if (clk)

drivers/clocksource/armv7m_systick.c

75

clk_disable_unprepare(clk);

drivers/clocksource/armv7m_systick.c

77

clk_put(clk);

drivers/clocksource/asm9260_timer.c

186

struct clk *clk;

drivers/clocksource/asm9260_timer.c

196

clk = of_clk_get(np, 0);

drivers/clocksource/asm9260_timer.c

197

if (IS_ERR(clk)) {

drivers/clocksource/asm9260_timer.c

199

return PTR_ERR(clk);

drivers/clocksource/asm9260_timer.c

202

ret = clk_prepare_enable(clk);

drivers/clocksource/asm9260_timer.c

213

clk_disable_unprepare(clk);

drivers/clocksource/asm9260_timer.c

226

rate = clk_get_rate(clk);

drivers/clocksource/bcm_kona_timer.c

156

struct clk *external_clk;

drivers/clocksource/clksrc_st_lpc.c

120

clk_disable_unprepare(ddata.clk);

drivers/clocksource/clksrc_st_lpc.c

121

clk_put(ddata.clk);

drivers/clocksource/clksrc_st_lpc.c

127

clk_get_rate(ddata.clk));

drivers/clocksource/clksrc_st_lpc.c

26

struct clk *clk;

drivers/clocksource/clksrc_st_lpc.c

50

rate = clk_get_rate(ddata.clk);

drivers/clocksource/clksrc_st_lpc.c

67

struct clk *clk;

drivers/clocksource/clksrc_st_lpc.c

69

clk = of_clk_get(np, 0);

drivers/clocksource/clksrc_st_lpc.c

70

if (IS_ERR(clk)) {

drivers/clocksource/clksrc_st_lpc.c

72

return PTR_ERR(clk);

drivers/clocksource/clksrc_st_lpc.c

75

if (clk_prepare_enable(clk)) {

drivers/clocksource/clksrc_st_lpc.c

80

if (!clk_get_rate(clk)) {

drivers/clocksource/clksrc_st_lpc.c

82

clk_disable_unprepare(clk);

drivers/clocksource/clksrc_st_lpc.c

86

ddata.clk = clk;

drivers/clocksource/clps711x-timer.c

30

static void __init clps711x_clksrc_init(struct clk *clock, void __iomem *base)

drivers/clocksource/clps711x-timer.c

51

static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base,

drivers/clocksource/clps711x-timer.c

79

struct clk *clock = of_clk_get(np, 0);

drivers/clocksource/dw_apb_timer_of.c

20

struct clk *timer_clk;

drivers/clocksource/dw_apb_timer_of.c

21

struct clk *pclk;

drivers/clocksource/em_sti.c

27

struct clk *clk;

drivers/clocksource/em_sti.c

309

p->clk = devm_clk_get(&pdev->dev, "sclk");

drivers/clocksource/em_sti.c

310

if (IS_ERR(p->clk)) {

drivers/clocksource/em_sti.c

312

return PTR_ERR(p->clk);

drivers/clocksource/em_sti.c

315

ret = clk_prepare(p->clk);

drivers/clocksource/em_sti.c

321

ret = clk_enable(p->clk);

drivers/clocksource/em_sti.c

324

clk_unprepare(p->clk);

drivers/clocksource/em_sti.c

327

p->rate = clk_get_rate(p->clk);

drivers/clocksource/em_sti.c

328

clk_disable(p->clk);

drivers/clocksource/em_sti.c

69

ret = clk_enable(p->clk);

drivers/clocksource/em_sti.c

95

clk_disable(p->clk);

drivers/clocksource/exynos_mct.c

511

struct clk *mct_clk, *tick_clk;

drivers/clocksource/ingenic-ost.c

109

rate = clk_get_rate(ost->clk);

drivers/clocksource/ingenic-ost.c

143

clk_disable(ost->clk);

drivers/clocksource/ingenic-ost.c

152

return clk_enable(ost->clk);

drivers/clocksource/ingenic-ost.c

37

struct clk *clk;

drivers/clocksource/ingenic-ost.c

96

ost->clk = devm_clk_get_enabled(dev, "ost");

drivers/clocksource/ingenic-ost.c

97

if (IS_ERR(ost->clk))

drivers/clocksource/ingenic-ost.c

98

return PTR_ERR(ost->clk);

drivers/clocksource/ingenic-sysost.c

307

static struct clk * __init ingenic_ost_get_clock(struct device_node *np, int id)

drivers/clocksource/ingenic-sysost.c

446

ost->clk = of_clk_get_by_name(np, "ost");

drivers/clocksource/ingenic-sysost.c

447

if (IS_ERR(ost->clk)) {

drivers/clocksource/ingenic-sysost.c

448

ret = PTR_ERR(ost->clk);

drivers/clocksource/ingenic-sysost.c

453

ret = clk_prepare_enable(ost->clk);

drivers/clocksource/ingenic-sysost.c

494

clk_disable_unprepare(ost->clk);

drivers/clocksource/ingenic-sysost.c

496

clk_put(ost->clk);

drivers/clocksource/ingenic-sysost.c

76

struct clk *clk, *percpu_timer_clk, *global_timer_clk;

drivers/clocksource/ingenic-timer.c

129

static struct clk *ingenic_tcu_get_clock(struct device_node *np, int id)

drivers/clocksource/ingenic-timer.c

149

timer->clk = ingenic_tcu_get_clock(tcu->np, timer->channel);

drivers/clocksource/ingenic-timer.c

150

if (IS_ERR(timer->clk))

drivers/clocksource/ingenic-timer.c

151

return PTR_ERR(timer->clk);

drivers/clocksource/ingenic-timer.c

153

err = clk_prepare_enable(timer->clk);

drivers/clocksource/ingenic-timer.c

157

rate = clk_get_rate(timer->clk);

drivers/clocksource/ingenic-timer.c

197

clk_disable_unprepare(timer->clk);

drivers/clocksource/ingenic-timer.c

199

clk_put(timer->clk);

drivers/clocksource/ingenic-timer.c

35

struct clk *clk;

drivers/clocksource/ingenic-timer.c

379

clk_disable(tcu->timers[cpu].clk);

drivers/clocksource/ingenic-timer.c

391

ret = clk_enable(tcu->timers[cpu].clk);

drivers/clocksource/ingenic-timer.c

404

clk_disable(tcu->timers[cpu - 1].clk);

drivers/clocksource/ingenic-timer.c

42

struct clk *cs_clk;

drivers/clocksource/mips-gic-timer.c

248

struct clk *clk;

drivers/clocksource/mips-gic-timer.c

257

clk = of_clk_get(node, 0);

drivers/clocksource/mips-gic-timer.c

258

if (!IS_ERR(clk)) {

drivers/clocksource/mips-gic-timer.c

259

ret = clk_prepare_enable(clk);

drivers/clocksource/mips-gic-timer.c

262

clk_put(clk);

drivers/clocksource/mips-gic-timer.c

266

gic_frequency = clk_get_rate(clk);

drivers/clocksource/mips-gic-timer.c

283

if (!ret && !IS_ERR(clk)) {

drivers/clocksource/mips-gic-timer.c

284

if (clk_notifier_register(clk, &gic_clk_nb) < 0)

drivers/clocksource/mps2-timer.c

101

struct clk *clk = NULL;

drivers/clocksource/mps2-timer.c

109

clk = of_clk_get(np, 0);

drivers/clocksource/mps2-timer.c

110

if (IS_ERR(clk)) {

drivers/clocksource/mps2-timer.c

111

ret = PTR_ERR(clk);

drivers/clocksource/mps2-timer.c

116

ret = clk_prepare_enable(clk);

drivers/clocksource/mps2-timer.c

122

rate = clk_get_rate(clk);

drivers/clocksource/mps2-timer.c

176

clk_disable_unprepare(clk);

drivers/clocksource/mps2-timer.c

178

clk_put(clk);

drivers/clocksource/mps2-timer.c

186

struct clk *clk = NULL;

drivers/clocksource/mps2-timer.c

193

clk = of_clk_get(np, 0);

drivers/clocksource/mps2-timer.c

194

if (IS_ERR(clk)) {

drivers/clocksource/mps2-timer.c

195

ret = PTR_ERR(clk);

drivers/clocksource/mps2-timer.c

200

ret = clk_prepare_enable(clk);

drivers/clocksource/mps2-timer.c

206

rate = clk_get_rate(clk);

drivers/clocksource/mps2-timer.c

242

clk_disable_unprepare(clk);

drivers/clocksource/mps2-timer.c

244

clk_put(clk);

drivers/clocksource/mxs_timer.c

162

static int __init mxs_clockevent_init(struct clk *timer_clk)

drivers/clocksource/mxs_timer.c

188

static int __init mxs_clocksource_init(struct clk *timer_clk)

drivers/clocksource/mxs_timer.c

205

struct clk *timer_clk;

drivers/clocksource/nomadik-mtu.c

185

struct clk *pclk, struct clk *clk)

drivers/clocksource/nomadik-mtu.c

194

BUG_ON(clk_prepare_enable(clk));

drivers/clocksource/nomadik-mtu.c

205

rate = clk_get_rate(clk);

drivers/clocksource/nomadik-mtu.c

251

struct clk *pclk;

drivers/clocksource/nomadik-mtu.c

252

struct clk *clk;

drivers/clocksource/nomadik-mtu.c

268

clk = of_clk_get_by_name(node, "timclk");

drivers/clocksource/nomadik-mtu.c

269

if (IS_ERR(clk)) {

drivers/clocksource/nomadik-mtu.c

271

return PTR_ERR(clk);

drivers/clocksource/nomadik-mtu.c

280

return nmdk_timer_init(base, irq, pclk, clk);

drivers/clocksource/samsung_pwm_timer.c

68

struct clk *timerclk;

drivers/clocksource/sh_cmt.c

1054

cmt->clk = clk_get(&cmt->pdev->dev, "fck");

drivers/clocksource/sh_cmt.c

1055

if (IS_ERR(cmt->clk)) {

drivers/clocksource/sh_cmt.c

1057

return PTR_ERR(cmt->clk);

drivers/clocksource/sh_cmt.c

1060

ret = clk_prepare(cmt->clk);

drivers/clocksource/sh_cmt.c

1065

ret = clk_enable(cmt->clk);

drivers/clocksource/sh_cmt.c

1069

rate = clk_get_rate(cmt->clk);

drivers/clocksource/sh_cmt.c

1118

clk_disable(cmt->clk);

drivers/clocksource/sh_cmt.c

1120

clk_unprepare(cmt->clk);

drivers/clocksource/sh_cmt.c

1122

clk_put(cmt->clk);

drivers/clocksource/sh_cmt.c

117

struct clk *clk;

drivers/clocksource/sh_cmt.c

817

clk_unprepare(ch->cmt->clk);

drivers/clocksource/sh_cmt.c

824

clk_prepare(ch->cmt->clk);

drivers/clocksource/sh_mtu2.c

214

ret = clk_enable(ch->mtu->clk);

drivers/clocksource/sh_mtu2.c

224

rate = clk_get_rate(ch->mtu->clk) / 64;

drivers/clocksource/sh_mtu2.c

251

clk_disable(ch->mtu->clk);

drivers/clocksource/sh_mtu2.c

398

mtu->clk = clk_get(&mtu->pdev->dev, "fck");

drivers/clocksource/sh_mtu2.c

399

if (IS_ERR(mtu->clk)) {

drivers/clocksource/sh_mtu2.c

401

return PTR_ERR(mtu->clk);

drivers/clocksource/sh_mtu2.c

404

ret = clk_prepare(mtu->clk);

drivers/clocksource/sh_mtu2.c

443

clk_unprepare(mtu->clk);

drivers/clocksource/sh_mtu2.c

445

clk_put(mtu->clk);

drivers/clocksource/sh_mtu2.c

45

struct clk *clk;

drivers/clocksource/sh_tmu.c

524

tmu->clk = clk_get(&tmu->pdev->dev, "fck");

drivers/clocksource/sh_tmu.c

525

if (IS_ERR(tmu->clk)) {

drivers/clocksource/sh_tmu.c

527

return PTR_ERR(tmu->clk);

drivers/clocksource/sh_tmu.c

530

ret = clk_prepare(tmu->clk);

drivers/clocksource/sh_tmu.c

535

ret = clk_enable(tmu->clk);

drivers/clocksource/sh_tmu.c

539

tmu->rate = clk_get_rate(tmu->clk) / 4;

drivers/clocksource/sh_tmu.c

56

struct clk *clk;

drivers/clocksource/sh_tmu.c

574

clk_unprepare(tmu->clk);

drivers/clocksource/sh_tmu.c

576

clk_put(tmu->clk);

drivers/clocksource/timer-armada-370-xp.c

338

struct clk *clk = of_clk_get_by_name(np, "fixed");

drivers/clocksource/timer-armada-370-xp.c

341

if (IS_ERR(clk)) {

drivers/clocksource/timer-armada-370-xp.c

343

return PTR_ERR(clk);

drivers/clocksource/timer-armada-370-xp.c

346

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-armada-370-xp.c

350

timer_clk = clk_get_rate(clk);

drivers/clocksource/timer-armada-370-xp.c

359

struct clk *clk;

drivers/clocksource/timer-armada-370-xp.c

362

clk = of_clk_get_by_name(np, "fixed");

drivers/clocksource/timer-armada-370-xp.c

363

if (!IS_ERR(clk)) {

drivers/clocksource/timer-armada-370-xp.c

364

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-armada-370-xp.c

367

timer_clk = clk_get_rate(clk);

drivers/clocksource/timer-armada-370-xp.c

374

clk = of_clk_get(np, 0);

drivers/clocksource/timer-armada-370-xp.c

377

if (IS_ERR(clk)) {

drivers/clocksource/timer-armada-370-xp.c

379

return PTR_ERR(clk);

drivers/clocksource/timer-armada-370-xp.c

382

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-armada-370-xp.c

386

timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;

drivers/clocksource/timer-armada-370-xp.c

397

struct clk *clk;

drivers/clocksource/timer-armada-370-xp.c

400

clk = of_clk_get(np, 0);

drivers/clocksource/timer-armada-370-xp.c

401

if (IS_ERR(clk)) {

drivers/clocksource/timer-armada-370-xp.c

403

return PTR_ERR(clk);

drivers/clocksource/timer-armada-370-xp.c

406

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-armada-370-xp.c

410

timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;

drivers/clocksource/timer-atmel-pit.c

46

struct clk *mck;

drivers/clocksource/timer-atmel-st.c

185

struct clk *sclk;

drivers/clocksource/timer-atmel-tcb.c

148

struct clk *clk;

drivers/clocksource/timer-atmel-tcb.c

168

clk_disable(tcd->clk);

drivers/clocksource/timer-atmel-tcb.c

181

clk_enable(tcd->clk);

drivers/clocksource/timer-atmel-tcb.c

203

clk_enable(tcd->clk);

drivers/clocksource/timer-atmel-tcb.c

259

struct clk *t2_clk = tc->clk[2];

drivers/clocksource/timer-atmel-tcb.c

269

clkevt.clk = t2_clk;

drivers/clocksource/timer-atmel-tcb.c

378

struct clk *t0_clk;

drivers/clocksource/timer-atmel-tcb.c

403

tc.clk[0] = t0_clk;

drivers/clocksource/timer-atmel-tcb.c

404

tc.clk[1] = of_clk_get_by_name(node->parent, "t1_clk");

drivers/clocksource/timer-atmel-tcb.c

405

if (IS_ERR(tc.clk[1]))

drivers/clocksource/timer-atmel-tcb.c

406

tc.clk[1] = t0_clk;

drivers/clocksource/timer-atmel-tcb.c

407

tc.clk[2] = of_clk_get_by_name(node->parent, "t2_clk");

drivers/clocksource/timer-atmel-tcb.c

408

if (IS_ERR(tc.clk[2]))

drivers/clocksource/timer-atmel-tcb.c

409

tc.clk[2] = t0_clk;

drivers/clocksource/timer-atmel-tcb.c

469

ret = clk_prepare_enable(tc.clk[1]);

drivers/clocksource/timer-atmel-tcb.c

502

clk_disable_unprepare(tc.clk[1]);

drivers/clocksource/timer-cadence-ttc.c

331

static int __init ttc_setup_clocksource(struct clk *clk, void __iomem *base,

drivers/clocksource/timer-cadence-ttc.c

341

ttccs->ttc.clk = clk;

drivers/clocksource/timer-cadence-ttc.c

343

err = clk_prepare_enable(ttccs->ttc.clk);

drivers/clocksource/timer-cadence-ttc.c

349

ttccs->ttc.freq = clk_get_rate(ttccs->ttc.clk);

drivers/clocksource/timer-cadence-ttc.c

355

err = clk_notifier_register(ttccs->ttc.clk,

drivers/clocksource/timer-cadence-ttc.c

414

static int __init ttc_setup_clockevent(struct clk *clk,

drivers/clocksource/timer-cadence-ttc.c

424

ttcce->ttc.clk = clk;

drivers/clocksource/timer-cadence-ttc.c

426

err = clk_prepare_enable(ttcce->ttc.clk);

drivers/clocksource/timer-cadence-ttc.c

434

err = clk_notifier_register(ttcce->ttc.clk,

drivers/clocksource/timer-cadence-ttc.c

441

ttcce->ttc.freq = clk_get_rate(ttcce->ttc.clk);

drivers/clocksource/timer-cadence-ttc.c

476

clk_disable_unprepare(ttcce->ttc.clk);

drivers/clocksource/timer-cadence-ttc.c

486

struct clk *clk_cs, *clk_ce;

drivers/clocksource/timer-cadence-ttc.c

77

struct clk *clk;

drivers/clocksource/timer-davinci.c

242

int __init davinci_timer_register(struct clk *clk,

drivers/clocksource/timer-davinci.c

250

rv = clk_prepare_enable(clk);

drivers/clocksource/timer-davinci.c

272

tick_rate = clk_get_rate(clk);

drivers/clocksource/timer-davinci.c

349

clk_disable_unprepare(clk);

drivers/clocksource/timer-davinci.c

356

struct clk *clk;

drivers/clocksource/timer-davinci.c

372

clk = of_clk_get(np, 0);

drivers/clocksource/timer-davinci.c

373

if (IS_ERR(clk)) {

drivers/clocksource/timer-davinci.c

375

return PTR_ERR(clk);

drivers/clocksource/timer-davinci.c

378

rv = davinci_timer_register(clk, &timer_cfg);

drivers/clocksource/timer-davinci.c

380

clk_put(clk);

drivers/clocksource/timer-digicolor.c

152

struct clk *clk;

drivers/clocksource/timer-digicolor.c

171

clk = of_clk_get(node, 0);

drivers/clocksource/timer-digicolor.c

172

if (IS_ERR(clk)) {

drivers/clocksource/timer-digicolor.c

174

return PTR_ERR(clk);

drivers/clocksource/timer-digicolor.c

176

clk_prepare_enable(clk);

drivers/clocksource/timer-digicolor.c

177

rate = clk_get_rate(clk);

drivers/clocksource/timer-econet-en751221.c

174

struct clk *clk;

drivers/clocksource/timer-econet-en751221.c

177

clk = of_clk_get(np, 0);

drivers/clocksource/timer-econet-en751221.c

178

if (IS_ERR(clk)) {

drivers/clocksource/timer-econet-en751221.c

179

pr_err("%pOFn: Failed to get CPU clock from DT %ld\n", np, PTR_ERR(clk));

drivers/clocksource/timer-econet-en751221.c

180

return PTR_ERR(clk);

drivers/clocksource/timer-econet-en751221.c

183

econet_timer.freq_hz = clk_get_rate(clk);

drivers/clocksource/timer-fsl-ftm.c

233

struct clk *clk;

drivers/clocksource/timer-fsl-ftm.c

236

clk = of_clk_get_by_name(np, cnt_name);

drivers/clocksource/timer-fsl-ftm.c

237

if (IS_ERR(clk)) {

drivers/clocksource/timer-fsl-ftm.c

238

pr_err("ftm: Cannot get \"%s\": %ld\n", cnt_name, PTR_ERR(clk));

drivers/clocksource/timer-fsl-ftm.c

239

return PTR_ERR(clk);

drivers/clocksource/timer-fsl-ftm.c

241

err = clk_prepare_enable(clk);

drivers/clocksource/timer-fsl-ftm.c

248

clk = of_clk_get_by_name(np, ftm_name);

drivers/clocksource/timer-fsl-ftm.c

249

if (IS_ERR(clk)) {

drivers/clocksource/timer-fsl-ftm.c

250

pr_err("ftm: Cannot get \"%s\": %ld\n", ftm_name, PTR_ERR(clk));

drivers/clocksource/timer-fsl-ftm.c

251

return PTR_ERR(clk);

drivers/clocksource/timer-fsl-ftm.c

253

err = clk_prepare_enable(clk);

drivers/clocksource/timer-fsl-ftm.c

258

return clk_get_rate(clk);

drivers/clocksource/timer-fttmr010.c

278

struct clk *clk;

drivers/clocksource/timer-fttmr010.c

287

clk = of_clk_get_by_name(np, "PCLK");

drivers/clocksource/timer-fttmr010.c

288

if (IS_ERR(clk)) {

drivers/clocksource/timer-fttmr010.c

290

return PTR_ERR(clk);

drivers/clocksource/timer-fttmr010.c

292

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-fttmr010.c

303

fttmr010->tick_rate = clk_get_rate(clk);

drivers/clocksource/timer-fttmr010.c

434

clk_disable_unprepare(clk);

drivers/clocksource/timer-gxp.c

124

freq = clk_get_rate(clk);

drivers/clocksource/timer-gxp.c

158

clk_disable_unprepare(clk);

drivers/clocksource/timer-gxp.c

160

clk_put(clk);

drivers/clocksource/timer-gxp.c

75

struct clk *clk;

drivers/clocksource/timer-gxp.c

86

clk = of_clk_get(node, 0);

drivers/clocksource/timer-gxp.c

87

if (IS_ERR(clk)) {

drivers/clocksource/timer-gxp.c

88

ret = PTR_ERR(clk);

drivers/clocksource/timer-gxp.c

93

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-imx-gpt.c

71

struct clk *clk_per;

drivers/clocksource/timer-imx-gpt.c

72

struct clk *clk_ipg;

drivers/clocksource/timer-imx-tpm.c

185

struct clk *ipg;

drivers/clocksource/timer-integrator-ap.c

164

struct clk *clk;

drivers/clocksource/timer-integrator-ap.c

172

clk = of_clk_get(node, 0);

drivers/clocksource/timer-integrator-ap.c

173

if (IS_ERR(clk)) {

drivers/clocksource/timer-integrator-ap.c

175

return PTR_ERR(clk);

drivers/clocksource/timer-integrator-ap.c

177

clk_prepare_enable(clk);

drivers/clocksource/timer-integrator-ap.c

178

rate = clk_get_rate(clk);

drivers/clocksource/timer-integrator-ap.c

219

clk_disable_unprepare(clk);

drivers/clocksource/timer-keystone.c

147

struct clk *clk;

drivers/clocksource/timer-keystone.c

162

clk = of_clk_get(np, 0);

drivers/clocksource/timer-keystone.c

163

if (IS_ERR(clk)) {

drivers/clocksource/timer-keystone.c

166

return PTR_ERR(clk);

drivers/clocksource/timer-keystone.c

169

error = clk_prepare_enable(clk);

drivers/clocksource/timer-keystone.c

175

rate = clk_get_rate(clk);

drivers/clocksource/timer-keystone.c

220

clk_put(clk);

drivers/clocksource/timer-lpc32xx.c

159

struct clk *clk;

drivers/clocksource/timer-lpc32xx.c

162

clk = of_clk_get_by_name(np, "timerclk");

drivers/clocksource/timer-lpc32xx.c

163

if (IS_ERR(clk)) {

drivers/clocksource/timer-lpc32xx.c

164

pr_err("clock get failed (%ld)\n", PTR_ERR(clk));

drivers/clocksource/timer-lpc32xx.c

165

return PTR_ERR(clk);

drivers/clocksource/timer-lpc32xx.c

168

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-lpc32xx.c

192

rate = clk_get_rate(clk);

drivers/clocksource/timer-lpc32xx.c

210

clk_disable_unprepare(clk);

drivers/clocksource/timer-lpc32xx.c

212

clk_put(clk);

drivers/clocksource/timer-lpc32xx.c

220

struct clk *clk;

drivers/clocksource/timer-lpc32xx.c

223

clk = of_clk_get_by_name(np, "timerclk");

drivers/clocksource/timer-lpc32xx.c

224

if (IS_ERR(clk)) {

drivers/clocksource/timer-lpc32xx.c

225

pr_err("clock get failed (%ld)\n", PTR_ERR(clk));

drivers/clocksource/timer-lpc32xx.c

226

return PTR_ERR(clk);

drivers/clocksource/timer-lpc32xx.c

229

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-lpc32xx.c

258

rate = clk_get_rate(clk);

drivers/clocksource/timer-lpc32xx.c

277

clk_disable_unprepare(clk);

drivers/clocksource/timer-lpc32xx.c

279

clk_put(clk);

drivers/clocksource/timer-mediatek.c

176

static int mtk_gpt_clkevt_shutdown(struct clock_event_device *clk)

drivers/clocksource/timer-mediatek.c

178

mtk_gpt_clkevt_time_stop(to_timer_of(clk), TIMER_CLK_EVT);

drivers/clocksource/timer-mediatek.c

183

static int mtk_gpt_clkevt_set_periodic(struct clock_event_device *clk)

drivers/clocksource/timer-mediatek.c

185

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-mediatek.c

195

struct clock_event_device *clk)

drivers/clocksource/timer-mediatek.c

197

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-mediatek.c

248

static void mtk_gpt_resume(struct clock_event_device *clk)

drivers/clocksource/timer-mediatek.c

250

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-mediatek.c

255

static void mtk_gpt_suspend(struct clock_event_device *clk)

drivers/clocksource/timer-mediatek.c

257

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-microchip-pit64b.c

59

struct clk *pclk;

drivers/clocksource/timer-microchip-pit64b.c

60

struct clk *gclk;

drivers/clocksource/timer-milbeaut.c

106

static int mlb_set_state_shutdown(struct clock_event_device *clk)

drivers/clocksource/timer-milbeaut.c

108

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-milbeaut.c

115

struct clock_event_device *clk)

drivers/clocksource/timer-milbeaut.c

117

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-milbeaut.c

51

struct clock_event_device *clk = dev_id;

drivers/clocksource/timer-milbeaut.c

52

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-milbeaut.c

59

clk->event_handler(clk);

drivers/clocksource/timer-milbeaut.c

87

static int mlb_set_state_periodic(struct clock_event_device *clk)

drivers/clocksource/timer-milbeaut.c

89

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-milbeaut.c

97

static int mlb_set_state_oneshot(struct clock_event_device *clk)

drivers/clocksource/timer-milbeaut.c

99

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-msc313e.c

185

to->of_clk.rate = clk_get_rate(to->of_clk.clk) / MSC313E_CLK_DIVIDER;

drivers/clocksource/timer-npcm7xx.c

109

struct clock_event_device *clk)

drivers/clocksource/timer-npcm7xx.c

111

struct timer_of *to = to_timer_of(clk);

drivers/clocksource/timer-npcm7xx.c

191

struct clk *clk;

drivers/clocksource/timer-npcm7xx.c

204

clk = of_clk_get(np, 1);

drivers/clocksource/timer-npcm7xx.c

205

if (clk) {

drivers/clocksource/timer-npcm7xx.c

206

if (!IS_ERR(clk))

drivers/clocksource/timer-npcm7xx.c

207

clk_prepare_enable(clk);

drivers/clocksource/timer-npcm7xx.c

209

pr_warn("%pOF: Failed to get clock for timer1: %pe", np, clk);

drivers/clocksource/timer-nxp-pit.c

273

struct clk *pit_clk;

drivers/clocksource/timer-nxp-stm.c

188

const char *name, void __iomem *base, struct clk *clk)

drivers/clocksource/timer-nxp-stm.c

193

stm_timer->rate = clk_get_rate(clk);

drivers/clocksource/timer-nxp-stm.c

301

struct clk *clk, int cpu)

drivers/clocksource/timer-nxp-stm.c

304

stm_timer->rate = clk_get_rate(clk);

drivers/clocksource/timer-nxp-stm.c

395

struct clk *clk;

drivers/clocksource/timer-nxp-stm.c

433

clk = devm_clk_get_enabled(dev, NULL);

drivers/clocksource/timer-nxp-stm.c

434

if (IS_ERR(clk))

drivers/clocksource/timer-nxp-stm.c

435

return dev_err_probe(dev, PTR_ERR(clk), "Clock not found\n");

drivers/clocksource/timer-nxp-stm.c

446

ret = nxp_stm_clocksource_init(dev, stm_timer, name, base, clk);

drivers/clocksource/timer-nxp-stm.c

456

base, irq, clk,

drivers/clocksource/timer-of.c

106

of_clk->clk = of_clk->name ? of_clk_get_by_name(np, of_clk->name) :

drivers/clocksource/timer-of.c

108

if (IS_ERR(of_clk->clk)) {

drivers/clocksource/timer-of.c

109

ret = PTR_ERR(of_clk->clk);

drivers/clocksource/timer-of.c

115

ret = clk_prepare_enable(of_clk->clk);

drivers/clocksource/timer-of.c

121

of_clk->rate = clk_get_rate(of_clk->clk);

drivers/clocksource/timer-of.c

133

clk_disable_unprepare(of_clk->clk);

drivers/clocksource/timer-of.c

135

clk_put(of_clk->clk);

drivers/clocksource/timer-of.c

88

clk_disable_unprepare(of_clk->clk);

drivers/clocksource/timer-of.c

89

clk_put(of_clk->clk);

drivers/clocksource/timer-of.h

26

struct clk *clk;

drivers/clocksource/timer-orion.c

117

struct clk *clk;

drivers/clocksource/timer-orion.c

127

clk = of_clk_get(np, 0);

drivers/clocksource/timer-orion.c

128

if (IS_ERR(clk)) {

drivers/clocksource/timer-orion.c

130

return PTR_ERR(clk);

drivers/clocksource/timer-orion.c

133

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-orion.c

147

rate = clk_get_rate(clk);

drivers/clocksource/timer-orion.c

174

ticks_per_jiffy = (clk_get_rate(clk) + HZ/2) / HZ;

drivers/clocksource/timer-orion.c

186

clk_disable_unprepare(clk);

drivers/clocksource/timer-owl.c

118

struct clk *clk;

drivers/clocksource/timer-owl.c

137

clk = of_clk_get(node, 0);

drivers/clocksource/timer-owl.c

138

if (IS_ERR(clk)) {

drivers/clocksource/timer-owl.c

139

ret = PTR_ERR(clk);

drivers/clocksource/timer-owl.c

144

rate = clk_get_rate(clk);

drivers/clocksource/timer-pistachio.c

151

struct clk *sys_clk, *fast_clk;

drivers/clocksource/timer-pxa.c

179

struct clk *clk;

drivers/clocksource/timer-pxa.c

189

clk = of_clk_get(np, 0);

drivers/clocksource/timer-pxa.c

190

if (IS_ERR(clk)) {

drivers/clocksource/timer-pxa.c

192

return PTR_ERR(clk);

drivers/clocksource/timer-pxa.c

195

ret = clk_prepare_enable(clk);

drivers/clocksource/timer-pxa.c

208

return pxa_timer_common_init(irq, clk_get_rate(clk));

drivers/clocksource/timer-pxa.c

217

struct clk *clk;

drivers/clocksource/timer-pxa.c

220

clk = clk_get(NULL, "OSTIMER0");

drivers/clocksource/timer-pxa.c

221

if (clk && !IS_ERR(clk)) {

drivers/clocksource/timer-pxa.c

222

clk_prepare_enable(clk);

drivers/clocksource/timer-pxa.c

223

pxa_timer_common_init(irq, clk_get_rate(clk));

drivers/clocksource/timer-rockchip.c

130

struct clk *timer_clk;

drivers/clocksource/timer-rockchip.c

131

struct clk *pclk;

drivers/clocksource/timer-rockchip.c

172

timer->clk = timer_clk;

drivers/clocksource/timer-rockchip.c

200

clk_disable_unprepare(timer->clk);

drivers/clocksource/timer-rockchip.c

36

struct clk *clk;

drivers/clocksource/timer-rockchip.c

37

struct clk *pclk;

drivers/clocksource/timer-sp804.c

119

static void sp804_register_delay_timer(struct sp804_clkevt *clk, int freq)

drivers/clocksource/timer-sp804.c

121

delay_clkevt = clk;

drivers/clocksource/timer-sp804.c

127

static inline void sp804_register_delay_timer(struct sp804_clkevt *clk, int freq) {}

drivers/clocksource/timer-sp804.c

132

struct clk *clk,

drivers/clocksource/timer-sp804.c

138

rate = sp804_get_clock_rate(clk, name);

drivers/clocksource/timer-sp804.c

232

struct clk *clk, const char *name)

drivers/clocksource/timer-sp804.c

237

rate = sp804_get_clock_rate(clk, name);

drivers/clocksource/timer-sp804.c

286

struct clk *clk1, *clk2;

drivers/clocksource/timer-sp804.c

375

struct clk *clk;

drivers/clocksource/timer-sp804.c

383

clk = of_clk_get(np, 0);

drivers/clocksource/timer-sp804.c

384

if (IS_ERR(clk)) {

drivers/clocksource/timer-sp804.c

386

return PTR_ERR(clk);

drivers/clocksource/timer-sp804.c

399

name, clk, 0);

drivers/clocksource/timer-sp804.c

407

ret = sp804_clockevents_init(base, irq, clk, name);

drivers/clocksource/timer-sp804.c

66

static long __init sp804_get_clock_rate(struct clk *clk, const char *name)

drivers/clocksource/timer-sp804.c

70

if (!clk)

drivers/clocksource/timer-sp804.c

71

clk = clk_get_sys("sp804", name);

drivers/clocksource/timer-sp804.c

72

if (IS_ERR(clk)) {

drivers/clocksource/timer-sp804.c

73

pr_err("%s clock not found: %ld\n", name, PTR_ERR(clk));

drivers/clocksource/timer-sp804.c

74

return PTR_ERR(clk);

drivers/clocksource/timer-sp804.c

77

err = clk_prepare_enable(clk);

drivers/clocksource/timer-sp804.c

80

clk_put(clk);

drivers/clocksource/timer-sp804.c

84

return clk_get_rate(clk);

drivers/clocksource/timer-stm32-lp.c

187

clk_disable_unprepare(priv->clk);

drivers/clocksource/timer-stm32-lp.c

194

clk_prepare_enable(priv->clk);

drivers/clocksource/timer-stm32-lp.c

233

priv->clk = ddata->clk;

drivers/clocksource/timer-stm32-lp.c

234

ret = clk_prepare_enable(priv->clk);

drivers/clocksource/timer-stm32-lp.c

238

rate = clk_get_rate(priv->clk);

drivers/clocksource/timer-stm32-lp.c

272

clk_disable_unprepare(priv->clk);

drivers/clocksource/timer-stm32-lp.c

30

struct clk *clk;

drivers/clocksource/timer-sun5i.c

244

struct clk *clk;

drivers/clocksource/timer-sun5i.c

264

clk = devm_clk_get_enabled(dev, NULL);

drivers/clocksource/timer-sun5i.c

265

if (IS_ERR(clk)) {

drivers/clocksource/timer-sun5i.c

267

return PTR_ERR(clk);

drivers/clocksource/timer-sun5i.c

270

rate = clk_get_rate(clk);

drivers/clocksource/timer-sun5i.c

278

st->clk = clk;

drivers/clocksource/timer-sun5i.c

282

ret = devm_clk_notifier_register(dev, clk, &st->clk_rate_cb);

drivers/clocksource/timer-sun5i.c

38

struct clk *clk;

drivers/clocksource/timer-ti-32k.c

83

struct clk *clock;

drivers/clocksource/timer-ti-dm-systimer.c

328

struct clk *clock;

drivers/clocksource/timer-ti-dm-systimer.c

48

struct clk *fck;

drivers/clocksource/timer-ti-dm-systimer.c

49

struct clk *ick;

drivers/clocksource/timer-ti-dm.c

123

struct clk *fclk;

drivers/clocksource/timer-ti-dm.c

413

struct clk *parent;

drivers/clocksource/timer-ti-dm.c

685

static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *cookie)

drivers/clocksource/timer-ti-dm.c

725

static struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *cookie)

drivers/clocksource/timer-zevio.c

134

timer->clk = of_clk_get(node, 0);

drivers/clocksource/timer-zevio.c

135

if (IS_ERR(timer->clk)) {

drivers/clocksource/timer-zevio.c

136

ret = PTR_ERR(timer->clk);

drivers/clocksource/timer-zevio.c

182

clk_get_rate(timer->clk), 0x0001, 0xffff);

drivers/clocksource/timer-zevio.c

194

clk_get_rate(timer->clk),

drivers/clocksource/timer-zevio.c

54

struct clk *clk;

drivers/comedi/drivers/amplc_dio200_common.c

778

unsigned int clk;

drivers/comedi/drivers/amplc_dio200_common.c

780

clk = dio200_read32(dev, DIO200_TS_CONFIG) & TS_CONFIG_CLK_SRC_MASK;

drivers/comedi/drivers/amplc_dio200_common.c

781

*src = clk;

drivers/comedi/drivers/amplc_dio200_common.c

782

*period = (clk < ARRAY_SIZE(ts_clock_period)) ?

drivers/comedi/drivers/amplc_dio200_common.c

783

ts_clock_period[clk] : 0;

drivers/counter/microchip-tcb-capture.c

473

clk_disable_unprepare((struct clk *)ptr);

drivers/counter/microchip-tcb-capture.c

485

struct clk *clk[3];

drivers/counter/microchip-tcb-capture.c

522

clk[i] = of_clk_get_by_name(np->parent, clk_name);

drivers/counter/microchip-tcb-capture.c

523

if (IS_ERR(clk[i])) {

drivers/counter/microchip-tcb-capture.c

525

clk[i] = of_clk_get_by_name(np->parent, "t0_clk");

drivers/counter/microchip-tcb-capture.c

526

if (IS_ERR(clk[i]))

drivers/counter/microchip-tcb-capture.c

527

return PTR_ERR(clk[i]);

drivers/counter/microchip-tcb-capture.c

530

ret = clk_prepare_enable(clk[i]);

drivers/counter/microchip-tcb-capture.c

536

clk[i]);

drivers/counter/rz-mtu3-cnt.c

76

struct clk *clk;

drivers/counter/rz-mtu3-cnt.c

809

struct clk *const clk = dev_get_drvdata(dev);

drivers/counter/rz-mtu3-cnt.c

811

clk_disable_unprepare(clk);

drivers/counter/rz-mtu3-cnt.c

818

struct clk *const clk = dev_get_drvdata(dev);

drivers/counter/rz-mtu3-cnt.c

820

clk_prepare_enable(clk);

drivers/counter/rz-mtu3-cnt.c

852

priv->clk = ddata->clk;

drivers/counter/rz-mtu3-cnt.c

863

platform_set_drvdata(pdev, priv->clk);

drivers/counter/rz-mtu3-cnt.c

864

clk_prepare_enable(priv->clk);

drivers/counter/rz-mtu3-cnt.c

891

clk_disable_unprepare(priv->clk);

drivers/counter/stm32-lptimer-cnt.c

25

struct clk *clk;

drivers/counter/stm32-lptimer-cnt.c

433

priv->clk = ddata->clk;

drivers/counter/stm32-lptimer-cnt.c

56

clk_disable(priv->clk);

drivers/counter/stm32-lptimer-cnt.c

61

ret = clk_enable(priv->clk);

drivers/counter/stm32-lptimer-cnt.c

93

clk_disable(priv->clk);

drivers/counter/stm32-timer-cnt.c

222

ret = clk_enable(priv->clk);

drivers/counter/stm32-timer-cnt.c

235

clk_disable(priv->clk);

drivers/counter/stm32-timer-cnt.c

41

struct clk *clk;

drivers/counter/stm32-timer-cnt.c

535

*freq = clk_get_rate(priv->clk);

drivers/counter/stm32-timer-cnt.c

736

priv->clk = ddata->clk;

drivers/counter/stm32-timer-cnt.c

812

clk_disable(priv->clk);

drivers/counter/stm32-timer-cnt.c

828

ret = clk_enable(priv->clk);

drivers/counter/ti-ecap-capture.c

230

*freq = clk_get_rate(ecap_dev->clk);

drivers/counter/ti-ecap-capture.c

493

ecap_dev->clk = devm_clk_get_enabled(dev, "fck");

drivers/counter/ti-ecap-capture.c

494

if (IS_ERR(ecap_dev->clk))

drivers/counter/ti-ecap-capture.c

495

return dev_err_probe(dev, PTR_ERR(ecap_dev->clk), "failed to get clock\n");

drivers/counter/ti-ecap-capture.c

497

clk_rate = clk_get_rate(ecap_dev->clk);

drivers/counter/ti-ecap-capture.c

560

clk_disable(ecap_dev->clk);

drivers/counter/ti-ecap-capture.c

571

ret = clk_enable(ecap_dev->clk);

drivers/counter/ti-ecap-capture.c

91

struct clk *clk;

drivers/counter/ti-eqep.c

501

struct clk *clk;

drivers/counter/ti-eqep.c

550

clk = devm_clk_get_enabled(dev, NULL);

drivers/counter/ti-eqep.c

551

if (IS_ERR(clk))

drivers/counter/ti-eqep.c

552

return dev_err_probe(dev, PTR_ERR(clk), "failed to enable clock\n");

drivers/cpufreq/armada-37xx-cpufreq.c

407

struct clk *clk, *parent;

drivers/cpufreq/armada-37xx-cpufreq.c

442

clk = clk_get(cpu_dev, NULL);

drivers/cpufreq/armada-37xx-cpufreq.c

443

if (IS_ERR(clk)) {

drivers/cpufreq/armada-37xx-cpufreq.c

445

return PTR_ERR(clk);

drivers/cpufreq/armada-37xx-cpufreq.c

448

parent = clk_get_parent(clk);

drivers/cpufreq/armada-37xx-cpufreq.c

451

clk_put(clk);

drivers/cpufreq/armada-37xx-cpufreq.c

460

clk_put(clk);

drivers/cpufreq/armada-37xx-cpufreq.c

466

clk_put(clk);

drivers/cpufreq/armada-37xx-cpufreq.c

472

clk_put(clk);

drivers/cpufreq/armada-37xx-cpufreq.c

482

clk_put(clk);

drivers/cpufreq/armada-8k-cpufreq.c

158

struct clk *clk;

drivers/cpufreq/armada-8k-cpufreq.c

167

clk = clk_get(cpu_dev, NULL);

drivers/cpufreq/armada-8k-cpufreq.c

169

if (IS_ERR(clk)) {

drivers/cpufreq/armada-8k-cpufreq.c

171

ret = PTR_ERR(clk);

drivers/cpufreq/armada-8k-cpufreq.c

175

ret = armada_8k_add_opp(clk, cpu_dev, freq_tables, opps_index);

drivers/cpufreq/armada-8k-cpufreq.c

177

clk_put(clk);

drivers/cpufreq/armada-8k-cpufreq.c

183

armada_8k_get_sharing_cpus(clk, &shared_cpus);

drivers/cpufreq/armada-8k-cpufreq.c

186

clk_put(clk);

drivers/cpufreq/armada-8k-cpufreq.c

45

static void __init armada_8k_get_sharing_cpus(struct clk *cur_clk,

drivers/cpufreq/armada-8k-cpufreq.c

52

struct clk *clk;

drivers/cpufreq/armada-8k-cpufreq.c

60

clk = clk_get(cpu_dev, NULL);

drivers/cpufreq/armada-8k-cpufreq.c

61

if (IS_ERR(clk)) {

drivers/cpufreq/armada-8k-cpufreq.c

64

if (clk_is_match(clk, cur_clk))

drivers/cpufreq/armada-8k-cpufreq.c

67

clk_put(clk);

drivers/cpufreq/armada-8k-cpufreq.c

72

static int __init armada_8k_add_opp(struct clk *clk, struct device *cpu_dev,

drivers/cpufreq/armada-8k-cpufreq.c

81

cur_frequency = clk_get_rate(clk);

drivers/cpufreq/cpufreq-dt.c

111

policy->clk = cpu_clk;

drivers/cpufreq/cpufreq-dt.c

137

clk_put(policy->clk);

drivers/cpufreq/cpufreq-dt.c

87

struct clk *cpu_clk;

drivers/cpufreq/cpufreq.c

211

if (!policy || IS_ERR(policy->clk)) {

drivers/cpufreq/cpufreq.c

217

return clk_get_rate(policy->clk) / 1000;

drivers/cpufreq/davinci-cpufreq.c

109

struct clk *asyncclk;

drivers/cpufreq/davinci-cpufreq.c

29

struct clk *armclk;

drivers/cpufreq/davinci-cpufreq.c

30

struct clk *asyncclk;

drivers/cpufreq/davinci-cpufreq.c

38

struct clk *armclk = cpufreq.armclk;

drivers/cpufreq/davinci-cpufreq.c

85

policy->clk = cpufreq.armclk;

drivers/cpufreq/highbank-cpufreq.c

62

struct clk *cpu_clk;

drivers/cpufreq/imx-cpufreq-dt.c

58

return clk_get_rate(imx7ulp_clks[FIRC].clk);

drivers/cpufreq/imx-cpufreq-dt.c

66

clk_set_parent(imx7ulp_clks[SCS_SEL].clk, imx7ulp_clks[FIRC].clk);

drivers/cpufreq/imx-cpufreq-dt.c

67

clk_set_parent(imx7ulp_clks[HSRUN_SCS_SEL].clk, imx7ulp_clks[FIRC].clk);

drivers/cpufreq/imx-cpufreq-dt.c

70

clk_set_parent(imx7ulp_clks[ARM].clk,

drivers/cpufreq/imx-cpufreq-dt.c

71

imx7ulp_clks[HSRUN_CORE].clk);

drivers/cpufreq/imx-cpufreq-dt.c

73

clk_set_parent(imx7ulp_clks[ARM].clk, imx7ulp_clks[CORE].clk);

drivers/cpufreq/imx6q-cpufreq.c

129

clk_set_rate(clks[ARM].clk, (old_freq >> 1) * 1000);

drivers/cpufreq/imx6q-cpufreq.c

130

clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk);

drivers/cpufreq/imx6q-cpufreq.c

131

if (freq_hz > clk_get_rate(clks[PLL2_PFD2_396M].clk))

drivers/cpufreq/imx6q-cpufreq.c

132

clk_set_parent(clks[SECONDARY_SEL].clk,

drivers/cpufreq/imx6q-cpufreq.c

133

clks[PLL2_BUS].clk);

drivers/cpufreq/imx6q-cpufreq.c

135

clk_set_parent(clks[SECONDARY_SEL].clk,

drivers/cpufreq/imx6q-cpufreq.c

136

clks[PLL2_PFD2_396M].clk);

drivers/cpufreq/imx6q-cpufreq.c

137

clk_set_parent(clks[STEP].clk, clks[SECONDARY_SEL].clk);

drivers/cpufreq/imx6q-cpufreq.c

138

clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk);

drivers/cpufreq/imx6q-cpufreq.c

139

if (freq_hz > clk_get_rate(clks[PLL2_BUS].clk)) {

drivers/cpufreq/imx6q-cpufreq.c

140

clk_set_rate(clks[PLL1_SYS].clk, new_freq * 1000);

drivers/cpufreq/imx6q-cpufreq.c

141

clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk);

drivers/cpufreq/imx6q-cpufreq.c

144

clk_set_parent(clks[STEP].clk, clks[PLL2_PFD2_396M].clk);

drivers/cpufreq/imx6q-cpufreq.c

145

clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk);

drivers/cpufreq/imx6q-cpufreq.c

146

if (freq_hz > clk_get_rate(clks[PLL2_PFD2_396M].clk)) {

drivers/cpufreq/imx6q-cpufreq.c

147

clk_set_rate(clks[PLL1_SYS].clk, new_freq * 1000);

drivers/cpufreq/imx6q-cpufreq.c

148

clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk);

drivers/cpufreq/imx6q-cpufreq.c

152

clk_prepare_enable(clks[PLL1_SYS].clk);

drivers/cpufreq/imx6q-cpufreq.c

157

ret = clk_set_rate(clks[ARM].clk, new_freq * 1000);

drivers/cpufreq/imx6q-cpufreq.c

171

clk_disable_unprepare(clks[PLL1_SYS].clk);

drivers/cpufreq/imx6q-cpufreq.c

194

policy->clk = clks[ARM].clk;

drivers/cpufreq/imx6q-cpufreq.c

70

old_freq = clk_get_rate(clks[ARM].clk) / 1000;

drivers/cpufreq/kirkwood-cpufreq.c

21

struct clk *cpu_clk;

drivers/cpufreq/kirkwood-cpufreq.c

22

struct clk *ddr_clk;

drivers/cpufreq/kirkwood-cpufreq.c

23

struct clk *powersave_clk;

drivers/cpufreq/mediatek-cpufreq.c

204

struct clk *cpu_clk = policy->clk;

drivers/cpufreq/mediatek-cpufreq.c

205

struct clk *armpll = clk_get_parent(cpu_clk);

drivers/cpufreq/mediatek-cpufreq.c

45

struct clk *cpu_clk;

drivers/cpufreq/mediatek-cpufreq.c

46

struct clk *inter_clk;

drivers/cpufreq/mediatek-cpufreq.c

605

policy->clk = info->cpu_clk;

drivers/cpufreq/mvebu-cpufreq.c

61

struct clk *clk;

drivers/cpufreq/mvebu-cpufreq.c

70

clk = clk_get(cpu_dev, NULL);

drivers/cpufreq/mvebu-cpufreq.c

71

if (IS_ERR(clk)) {

drivers/cpufreq/mvebu-cpufreq.c

73

return PTR_ERR(clk);

drivers/cpufreq/mvebu-cpufreq.c

76

ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk), 0);

drivers/cpufreq/mvebu-cpufreq.c

78

clk_put(clk);

drivers/cpufreq/mvebu-cpufreq.c

82

ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk) / 2, 0);

drivers/cpufreq/mvebu-cpufreq.c

84

dev_pm_opp_remove(cpu_dev, clk_get_rate(clk));

drivers/cpufreq/mvebu-cpufreq.c

85

clk_put(clk);

drivers/cpufreq/mvebu-cpufreq.c

95

clk_put(clk);

drivers/cpufreq/pxa2xx-cpufreq.c

46

struct clk *clk_core;

drivers/cpufreq/qcom-cpufreq-hw.c

639

struct clk *clk;

drivers/cpufreq/qcom-cpufreq-hw.c

642

clk = clk_get(dev, "xo");

drivers/cpufreq/qcom-cpufreq-hw.c

643

if (IS_ERR(clk))

drivers/cpufreq/qcom-cpufreq-hw.c

644

return PTR_ERR(clk);

drivers/cpufreq/qcom-cpufreq-hw.c

646

xo_rate = clk_get_rate(clk);

drivers/cpufreq/qcom-cpufreq-hw.c

647

clk_put(clk);

drivers/cpufreq/qcom-cpufreq-hw.c

649

clk = clk_get(dev, "alternate");

drivers/cpufreq/qcom-cpufreq-hw.c

650

if (IS_ERR(clk))

drivers/cpufreq/qcom-cpufreq-hw.c

651

return PTR_ERR(clk);

drivers/cpufreq/qcom-cpufreq-hw.c

653

cpu_hw_rate = clk_get_rate(clk) / CLK_HW_DIV;

drivers/cpufreq/qcom-cpufreq-hw.c

654

clk_put(clk);

drivers/cpufreq/qoriq-cpufreq.c

160

struct clk *clk;

drivers/cpufreq/qoriq-cpufreq.c

175

policy->clk = of_clk_get(np, 0);

drivers/cpufreq/qoriq-cpufreq.c

176

if (IS_ERR(policy->clk)) {

drivers/cpufreq/qoriq-cpufreq.c

181

hwclk = __clk_get_hw(policy->clk);

drivers/cpufreq/qoriq-cpufreq.c

184

data->pclk = kzalloc_objs(struct clk *, count);

drivers/cpufreq/qoriq-cpufreq.c

193

clk = clk_hw_get_parent_by_index(hwclk, i)->clk;

drivers/cpufreq/qoriq-cpufreq.c

194

data->pclk[i] = clk;

drivers/cpufreq/qoriq-cpufreq.c

195

freq = clk_get_rate(clk);

drivers/cpufreq/qoriq-cpufreq.c

241

struct clk *parent;

drivers/cpufreq/qoriq-cpufreq.c

245

return clk_set_parent(policy->clk, parent);

drivers/cpufreq/qoriq-cpufreq.c

29

struct clk **pclk;

drivers/cpufreq/qoriq-cpufreq.c

45

struct clk *pltclk;

drivers/cpufreq/qoriq-cpufreq.c

68

static struct clk *cpu_to_clk(int cpu)

drivers/cpufreq/qoriq-cpufreq.c

71

struct clk *clk;

drivers/cpufreq/qoriq-cpufreq.c

80

clk = of_clk_get(np, 0);

drivers/cpufreq/qoriq-cpufreq.c

82

return clk;

drivers/cpufreq/qoriq-cpufreq.c

89

struct clk *clk;

drivers/cpufreq/qoriq-cpufreq.c

93

clk = cpu_to_clk(i);

drivers/cpufreq/qoriq-cpufreq.c

94

if (IS_ERR(clk)) {

drivers/cpufreq/qoriq-cpufreq.c

99

if (clk_is_match(policy->clk, clk))

drivers/cpufreq/raspberrypi-cpufreq.c

24

struct clk *clk;

drivers/cpufreq/raspberrypi-cpufreq.c

33

clk = clk_get(cpu_dev, NULL);

drivers/cpufreq/raspberrypi-cpufreq.c

34

if (IS_ERR(clk)) {

drivers/cpufreq/raspberrypi-cpufreq.c

36

return PTR_ERR(clk);

drivers/cpufreq/raspberrypi-cpufreq.c

43

min = roundup(clk_round_rate(clk, 0), RASPBERRYPI_FREQ_INTERVAL);

drivers/cpufreq/raspberrypi-cpufreq.c

44

max = roundup(clk_round_rate(clk, ULONG_MAX), RASPBERRYPI_FREQ_INTERVAL);

drivers/cpufreq/raspberrypi-cpufreq.c

45

clk_put(clk);

drivers/cpufreq/s3c64xx-cpufreq.c

102

clk_get_rate(policy->clk) / 1000);

drivers/cpufreq/s3c64xx-cpufreq.c

153

policy->clk = clk_get(NULL, "armclk");

drivers/cpufreq/s3c64xx-cpufreq.c

154

if (IS_ERR(policy->clk)) {

drivers/cpufreq/s3c64xx-cpufreq.c

156

PTR_ERR(policy->clk));

drivers/cpufreq/s3c64xx-cpufreq.c

157

return PTR_ERR(policy->clk);

drivers/cpufreq/s3c64xx-cpufreq.c

175

r = clk_round_rate(policy->clk, freq->frequency * 1000);

drivers/cpufreq/s3c64xx-cpufreq.c

185

if (!vddarm && freq->frequency > clk_get_rate(policy->clk) / 1000)

drivers/cpufreq/s3c64xx-cpufreq.c

63

old_freq = clk_get_rate(policy->clk) / 1000;

drivers/cpufreq/s3c64xx-cpufreq.c

78

ret = clk_set_rate(policy->clk, new_freq * 1000);

drivers/cpufreq/s3c64xx-cpufreq.c

93

if (clk_set_rate(policy->clk, old_freq * 1000) < 0)

drivers/cpufreq/s5pv210-cpufreq.c

503

policy->clk = clk_get(NULL, "armclk");

drivers/cpufreq/s5pv210-cpufreq.c

504

if (IS_ERR(policy->clk))

drivers/cpufreq/s5pv210-cpufreq.c

505

return PTR_ERR(policy->clk);

drivers/cpufreq/s5pv210-cpufreq.c

552

clk_put(policy->clk);

drivers/cpufreq/s5pv210-cpufreq.c

83

static struct clk *dmc0_clk;

drivers/cpufreq/s5pv210-cpufreq.c

84

static struct clk *dmc1_clk;

drivers/cpufreq/scpi-cpufreq.c

144

priv->clk = clk_get(cpu_dev, NULL);

drivers/cpufreq/scpi-cpufreq.c

145

if (IS_ERR(priv->clk)) {

drivers/cpufreq/scpi-cpufreq.c

148

ret = PTR_ERR(priv->clk);

drivers/cpufreq/scpi-cpufreq.c

182

clk_put(priv->clk);

drivers/cpufreq/scpi-cpufreq.c

24

struct clk *clk;

drivers/cpufreq/scpi-cpufreq.c

41

rate = clk_get_rate(priv->clk);

drivers/cpufreq/scpi-cpufreq.c

54

ret = clk_set_rate(priv->clk, rate);

drivers/cpufreq/scpi-cpufreq.c

59

if (clk_get_rate(priv->clk) / 1000 != freq_khz)

drivers/cpufreq/sh-cpufreq.c

108

struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu);

drivers/cpufreq/sh-cpufreq.c

139

struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu);

drivers/cpufreq/sh-cpufreq.c

30

static DEFINE_PER_CPU(struct clk, sh_cpuclk);

drivers/cpufreq/sh-cpufreq.c

47

struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu);

drivers/cpufreq/sh-cpufreq.c

91

struct clk *cpuclk = &per_cpu(sh_cpuclk, policy->cpu);

drivers/cpufreq/spear-cpufreq.c

107

struct clk *srcclk;

drivers/cpufreq/spear-cpufreq.c

133

srcclk = spear_cpufreq.clk;

drivers/cpufreq/spear-cpufreq.c

145

ret = clk_set_rate(spear_cpufreq.clk, newfreq);

drivers/cpufreq/spear-cpufreq.c

155

policy->clk = spear_cpufreq.clk;

drivers/cpufreq/spear-cpufreq.c

209

spear_cpufreq.clk = clk_get(NULL, "cpu_clk");

drivers/cpufreq/spear-cpufreq.c

210

if (IS_ERR(spear_cpufreq.clk)) {

drivers/cpufreq/spear-cpufreq.c

212

ret = PTR_ERR(spear_cpufreq.clk);

drivers/cpufreq/spear-cpufreq.c

221

clk_put(spear_cpufreq.clk);

drivers/cpufreq/spear-cpufreq.c

28

struct clk *clk;

drivers/cpufreq/spear-cpufreq.c

34

static struct clk *spear1340_cpu_get_possible_parent(unsigned long newfreq)

drivers/cpufreq/spear-cpufreq.c

36

struct clk *sys_pclk;

drivers/cpufreq/spear-cpufreq.c

76

static int spear1340_set_cpu_rate(struct clk *sys_pclk, unsigned long newfreq)

drivers/cpufreq/spear-cpufreq.c

78

struct clk *sys_clk;

drivers/cpufreq/spear-cpufreq.c

81

sys_clk = clk_get_parent(spear_cpufreq.clk);

drivers/cpufreq/tegra124-cpufreq.c

24

struct clk *cpu_clk;

drivers/cpufreq/tegra124-cpufreq.c

25

struct clk *pllp_clk;

drivers/cpufreq/tegra124-cpufreq.c

26

struct clk *pllx_clk;

drivers/cpufreq/tegra124-cpufreq.c

27

struct clk *dfll_clk;

drivers/cpufreq/tegra124-cpufreq.c

33

struct clk *orig_parent;

drivers/cpufreq/vexpress-spc-cpufreq.c

127

ret = clk_set_rate(clk[new_cluster], new_rate * 1000);

drivers/cpufreq/vexpress-spc-cpufreq.c

137

if (clk_get_rate(clk[new_cluster]) != new_rate * 1000)

drivers/cpufreq/vexpress-spc-cpufreq.c

166

clk_set_rate(clk[old_cluster], new_rate * 1000)) {

drivers/cpufreq/vexpress-spc-cpufreq.c

287

clk_put(clk[cluster]);

drivers/cpufreq/vexpress-spc-cpufreq.c

337

clk[cluster] = clk_get(cpu_dev, NULL);

drivers/cpufreq/vexpress-spc-cpufreq.c

338

if (!IS_ERR(clk[cluster]))

drivers/cpufreq/vexpress-spc-cpufreq.c

343

ret = PTR_ERR(clk[cluster]);

drivers/cpufreq/vexpress-spc-cpufreq.c

48

static struct clk *clk[MAX_CLUSTERS];

drivers/cpufreq/vexpress-spc-cpufreq.c

90

u32 rate = clk_get_rate(clk[cur_cluster]) / 1000;

drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h

146

struct clk *busclk;

drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h

147

struct clk *ssclk;

drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h

223

struct clk *ceclks[CE_MAX_CLOCKS];

drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h

159

struct clk *ssclks[SS_MAX_CLOCKS];

drivers/crypto/amlogic/amlogic-gxl.h

94

struct clk *busclk;

drivers/crypto/aspeed/aspeed-acry.c

740

acry_dev->clk = devm_clk_get_enabled(dev, NULL);

drivers/crypto/aspeed/aspeed-acry.c

741

if (IS_ERR(acry_dev->clk)) {

drivers/crypto/aspeed/aspeed-acry.c

743

return PTR_ERR(acry_dev->clk);

drivers/crypto/aspeed/aspeed-acry.c

89

struct clk *clk;

drivers/crypto/aspeed/aspeed-hace.c

140

hace_dev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/crypto/aspeed/aspeed-hace.c

141

if (IS_ERR(hace_dev->clk)) {

drivers/crypto/aspeed/aspeed-hace.c

146

rc = clk_prepare_enable(hace_dev->clk);

drivers/crypto/aspeed/aspeed-hace.c

243

clk_disable_unprepare(hace_dev->clk);

drivers/crypto/aspeed/aspeed-hace.c

262

clk_disable_unprepare(hace_dev->clk);

drivers/crypto/aspeed/aspeed-hace.h

238

struct clk *clk;

drivers/crypto/atmel-aes.c

185

struct clk *iclk;

drivers/crypto/atmel-sha.c

134

struct clk *iclk;

drivers/crypto/atmel-tdes.c

91

struct clk *iclk;

drivers/crypto/ccree/cc_driver.c

315

struct clk *clk;

drivers/crypto/ccree/cc_driver.c

343

clk = devm_clk_get_optional(dev, NULL);

drivers/crypto/ccree/cc_driver.c

344

if (IS_ERR(clk))

drivers/crypto/ccree/cc_driver.c

345

return dev_err_probe(dev, PTR_ERR(clk), "Error getting clock\n");

drivers/crypto/ccree/cc_driver.c

346

new_drvdata->clk = clk;

drivers/crypto/ccree/cc_driver.c

381

rc = clk_prepare_enable(new_drvdata->clk);

drivers/crypto/ccree/cc_driver.c

573

clk_disable_unprepare(new_drvdata->clk);

drivers/crypto/ccree/cc_driver.c

600

clk_disable_unprepare(drvdata->clk);

drivers/crypto/ccree/cc_driver.h

146

struct clk *clk;

drivers/crypto/ccree/cc_pm.c

25

clk_disable_unprepare(drvdata->clk);

drivers/crypto/ccree/cc_pm.c

36

rc = clk_prepare_enable(drvdata->clk);

drivers/crypto/ccree/cc_pm.c

44

clk_disable_unprepare(drvdata->clk);

drivers/crypto/ccree/cc_pm.c

52

clk_disable_unprepare(drvdata->clk);

drivers/crypto/exynos-rng.c

203

ret = clk_prepare_enable(rng->clk);

drivers/crypto/exynos-rng.c

220

clk_disable_unprepare(rng->clk);

drivers/crypto/exynos-rng.c

232

ret = clk_prepare_enable(rng->clk);

drivers/crypto/exynos-rng.c

240

clk_disable_unprepare(rng->clk);

drivers/crypto/exynos-rng.c

285

rng->clk = devm_clk_get(&pdev->dev, "secss");

drivers/crypto/exynos-rng.c

286

if (IS_ERR(rng->clk)) {

drivers/crypto/exynos-rng.c

288

return PTR_ERR(rng->clk);

drivers/crypto/exynos-rng.c

326

ret = clk_prepare_enable(rng->clk);

drivers/crypto/exynos-rng.c

341

clk_disable_unprepare(rng->clk);

drivers/crypto/exynos-rng.c

355

ret = clk_prepare_enable(rng->clk);

drivers/crypto/exynos-rng.c

365

clk_disable_unprepare(rng->clk);

drivers/crypto/exynos-rng.c

74

struct clk *clk;

drivers/crypto/gemini/sl3516-ce.h

231

struct clk *clks;

drivers/crypto/img-hash.c

120

struct clk *hash_clk;

drivers/crypto/img-hash.c

121

struct clk *sys_clk;

drivers/crypto/inside-secure/eip93/eip93-main.h

101

struct clk *clk;

drivers/crypto/inside-secure/safexcel.c

1753

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/crypto/inside-secure/safexcel.c

1754

ret = PTR_ERR_OR_ZERO(priv->clk);

drivers/crypto/inside-secure/safexcel.c

1760

ret = clk_prepare_enable(priv->clk);

drivers/crypto/inside-secure/safexcel.c

1795

clk_disable_unprepare(priv->clk);

drivers/crypto/inside-secure/safexcel.c

1808

clk_disable_unprepare(priv->clk);

drivers/crypto/inside-secure/safexcel.h

820

struct clk *clk;

drivers/crypto/inside-secure/safexcel.h

821

struct clk *reg_clk;

drivers/crypto/marvell/cesa/cesa.c

491

engine->clk = devm_clk_get_optional_enabled(dev, res_name);

drivers/crypto/marvell/cesa/cesa.c

492

if (IS_ERR(engine->clk)) {

drivers/crypto/marvell/cesa/cesa.c

493

engine->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/crypto/marvell/cesa/cesa.c

494

if (IS_ERR(engine->clk)) {

drivers/crypto/marvell/cesa/cesa.c

495

ret = PTR_ERR(engine->clk);

drivers/crypto/marvell/cesa/cesa.h

461

struct clk *clk;

drivers/crypto/marvell/cesa/cesa.h

462

struct clk *zclk;

drivers/crypto/mxs-dcp.c

83

struct clk *dcp_clk;

drivers/crypto/qce/core.h

40

struct clk *core, *iface, *bus;

drivers/crypto/qcom-rng.c

102

clk_disable_unprepare(rng->clk);

drivers/crypto/qcom-rng.c

128

ret = clk_prepare_enable(rng->clk);

drivers/crypto/qcom-rng.c

147

clk_disable_unprepare(rng->clk);

drivers/crypto/qcom-rng.c

195

rng->clk = devm_clk_get_optional(&pdev->dev, "core");

drivers/crypto/qcom-rng.c

196

if (IS_ERR(rng->clk))

drivers/crypto/qcom-rng.c

197

return PTR_ERR(rng->clk);

drivers/crypto/qcom-rng.c

37

struct clk *clk;

drivers/crypto/qcom-rng.c

93

ret = clk_prepare_enable(rng->clk);

drivers/crypto/rockchip/rk3288_crypto.c

74

cr = clk_get_rate(dev->clks[i].clk);

drivers/crypto/rockchip/rk3288_crypto.c

81

err = clk_set_rate(dev->clks[i].clk,

drivers/crypto/s5p-sss.c

2178

pdata->clk = devm_clk_get(dev, variant->clk_names[0]);

drivers/crypto/s5p-sss.c

2179

if (IS_ERR(pdata->clk))

drivers/crypto/s5p-sss.c

2180

return dev_err_probe(dev, PTR_ERR(pdata->clk),

drivers/crypto/s5p-sss.c

2184

err = clk_prepare_enable(pdata->clk);

drivers/crypto/s5p-sss.c

2288

clk_disable_unprepare(pdata->clk);

drivers/crypto/s5p-sss.c

2314

clk_disable_unprepare(pdata->clk);

drivers/crypto/s5p-sss.c

297

struct clk *clk;

drivers/crypto/s5p-sss.c

298

struct clk *pclk;

drivers/crypto/sahara.c

189

struct clk *clk_ipg;

drivers/crypto/sahara.c

190

struct clk *clk_ahb;

drivers/crypto/starfive/jh7110-cryp.h

179

struct clk *hclk;

drivers/crypto/starfive/jh7110-cryp.h

180

struct clk *ahb;

drivers/crypto/stm32/stm32-cryp.c

195

struct clk *clk;

drivers/crypto/stm32/stm32-cryp.c

2604

cryp->clk = devm_clk_get(dev, NULL);

drivers/crypto/stm32/stm32-cryp.c

2605

if (IS_ERR(cryp->clk)) {

drivers/crypto/stm32/stm32-cryp.c

2606

dev_err_probe(dev, PTR_ERR(cryp->clk), "Could not get clock\n");

drivers/crypto/stm32/stm32-cryp.c

2608

return PTR_ERR(cryp->clk);

drivers/crypto/stm32/stm32-cryp.c

2611

ret = clk_prepare_enable(cryp->clk);

drivers/crypto/stm32/stm32-cryp.c

2703

clk_disable_unprepare(cryp->clk);

drivers/crypto/stm32/stm32-cryp.c

2735

clk_disable_unprepare(cryp->clk);

drivers/crypto/stm32/stm32-cryp.c

2743

clk_disable_unprepare(cryp->clk);

drivers/crypto/stm32/stm32-cryp.c

2753

ret = clk_prepare_enable(cryp->clk);

drivers/crypto/stm32/stm32-hash.c

196

struct clk *clk;

drivers/crypto/stm32/stm32-hash.c

2374

hdev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/crypto/stm32/stm32-hash.c

2375

if (IS_ERR(hdev->clk))

drivers/crypto/stm32/stm32-hash.c

2376

return dev_err_probe(dev, PTR_ERR(hdev->clk),

drivers/crypto/stm32/stm32-hash.c

2379

ret = clk_prepare_enable(hdev->clk);

drivers/crypto/stm32/stm32-hash.c

2468

clk_disable_unprepare(hdev->clk);

drivers/crypto/stm32/stm32-hash.c

2495

clk_disable_unprepare(hdev->clk);

drivers/crypto/stm32/stm32-hash.c

2503

clk_disable_unprepare(hdev->clk);

drivers/crypto/stm32/stm32-hash.c

2513

ret = clk_prepare_enable(hdev->clk);

drivers/crypto/tegra/tegra-se-main.c

300

se->clk = devm_clk_get_enabled(se->dev, NULL);

drivers/crypto/tegra/tegra-se-main.c

301

if (IS_ERR(se->clk))

drivers/crypto/tegra/tegra-se-main.c

302

return dev_err_probe(dev, PTR_ERR(se->clk),

drivers/crypto/tegra/tegra-se.h

430

struct clk *clk;

drivers/devfreq/event/exynos-nocp.c

212

nocp->clk = devm_clk_get(dev, "nocp");

drivers/devfreq/event/exynos-nocp.c

213

if (IS_ERR(nocp->clk))

drivers/devfreq/event/exynos-nocp.c

214

nocp->clk = NULL;

drivers/devfreq/event/exynos-nocp.c

26

struct clk *clk;

drivers/devfreq/event/exynos-nocp.c

266

ret = clk_prepare_enable(nocp->clk);

drivers/devfreq/event/exynos-nocp.c

282

clk_disable_unprepare(nocp->clk);

drivers/devfreq/event/exynos-ppmu.c

30

struct clk *clk;

drivers/devfreq/event/exynos-ppmu.c

629

info->ppmu.clk = devm_clk_get(dev, "ppmu");

drivers/devfreq/event/exynos-ppmu.c

630

if (IS_ERR(info->ppmu.clk)) {

drivers/devfreq/event/exynos-ppmu.c

631

info->ppmu.clk = NULL;

drivers/devfreq/event/exynos-ppmu.c

686

ret = clk_prepare_enable(info->ppmu.clk);

drivers/devfreq/event/exynos-ppmu.c

699

clk_disable_unprepare(info->ppmu.clk);

drivers/devfreq/event/rockchip-dfi.c

101

struct clk *clk;

drivers/devfreq/event/rockchip-dfi.c

181

ret = clk_prepare_enable(dfi->clk);

drivers/devfreq/event/rockchip-dfi.c

243

clk_disable_unprepare(dfi->clk);

drivers/devfreq/event/rockchip-dfi.c

719

dfi->clk = devm_clk_get(dfi->dev, "pclk_ddr_mon");

drivers/devfreq/event/rockchip-dfi.c

720

if (IS_ERR(dfi->clk))

drivers/devfreq/event/rockchip-dfi.c

721

return dev_err_probe(dfi->dev, PTR_ERR(dfi->clk),

drivers/devfreq/exynos-bus.c

247

bus->clk = devm_clk_get_enabled(dev, "bus");

drivers/devfreq/exynos-bus.c

248

if (IS_ERR(bus->clk))

drivers/devfreq/exynos-bus.c

249

return dev_err_probe(dev, PTR_ERR(bus->clk),

drivers/devfreq/exynos-bus.c

259

rate = clk_get_rate(bus->clk);

drivers/devfreq/exynos-bus.c

37

struct clk *clk;

drivers/devfreq/imx-bus.c

106

priv->clk = devm_clk_get(dev, NULL);

drivers/devfreq/imx-bus.c

107

if (IS_ERR(priv->clk)) {

drivers/devfreq/imx-bus.c

108

ret = PTR_ERR(priv->clk);

drivers/devfreq/imx-bus.c

123

priv->profile.initial_freq = clk_get_rate(priv->clk);

drivers/devfreq/imx-bus.c

18

struct clk *clk;

drivers/devfreq/imx-bus.c

43

*freq = clk_get_rate(priv->clk);

drivers/devfreq/imx8m-ddrc.c

119

static struct clk *clk_get_parent_by_index(struct clk *clk, int index)

drivers/devfreq/imx8m-ddrc.c

123

hw = clk_hw_get_parent_by_index(__clk_get_hw(clk), index);

drivers/devfreq/imx8m-ddrc.c

125

return hw ? hw->clk : NULL;

drivers/devfreq/imx8m-ddrc.c

131

struct clk *new_dram_core_parent;

drivers/devfreq/imx8m-ddrc.c

132

struct clk *new_dram_alt_parent;

drivers/devfreq/imx8m-ddrc.c

133

struct clk *new_dram_apb_parent;

drivers/devfreq/imx8m-ddrc.c

70

struct clk *dram_core;

drivers/devfreq/imx8m-ddrc.c

71

struct clk *dram_pll;

drivers/devfreq/imx8m-ddrc.c

72

struct clk *dram_alt;

drivers/devfreq/imx8m-ddrc.c

73

struct clk *dram_apb;

drivers/devfreq/mtk-cci-devfreq.c

129

struct clk *cci_pll;

drivers/devfreq/mtk-cci-devfreq.c

28

struct clk *cci_clk;

drivers/devfreq/mtk-cci-devfreq.c

29

struct clk *inter_clk;

drivers/devfreq/rk3399_dmc.c

45

struct clk *dmc_clk;

drivers/devfreq/sun8i-a33-mbus.c

82

struct clk *clk_bus;

drivers/devfreq/sun8i-a33-mbus.c

83

struct clk *clk_dram;

drivers/devfreq/sun8i-a33-mbus.c

84

struct clk *clk_mbus;

drivers/devfreq/tegra30-devfreq.c

183

struct clk *clock;

drivers/devfreq/tegra30-devfreq.c

186

struct clk *emc_clock;

drivers/dma/at_hdmac.c

1983

atdma->clk = devm_clk_get(&pdev->dev, "dma_clk");

drivers/dma/at_hdmac.c

1984

if (IS_ERR(atdma->clk))

drivers/dma/at_hdmac.c

1985

return PTR_ERR(atdma->clk);

drivers/dma/at_hdmac.c

1987

err = clk_prepare_enable(atdma->clk);

drivers/dma/at_hdmac.c

2114

clk_disable_unprepare(atdma->clk);

drivers/dma/at_hdmac.c

2139

clk_disable_unprepare(atdma->clk);

drivers/dma/at_hdmac.c

2147

clk_disable_unprepare(atdma->clk);

drivers/dma/at_hdmac.c

2202

clk_disable_unprepare(atdma->clk);

drivers/dma/at_hdmac.c

2231

clk_prepare_enable(atdma->clk);

drivers/dma/at_hdmac.c

350

struct clk *clk;

drivers/dma/at_xdmac.c

2167

clk_disable_unprepare(atxdmac->clk);

drivers/dma/at_xdmac.c

2180

ret = clk_prepare_enable(atxdmac->clk);

drivers/dma/at_xdmac.c

2238

clk_disable(atxdmac->clk);

drivers/dma/at_xdmac.c

2247

return clk_enable(atxdmac->clk);

drivers/dma/at_xdmac.c

2314

atxdmac->clk = devm_clk_get(&pdev->dev, "dma_clk");

drivers/dma/at_xdmac.c

2315

if (IS_ERR(atxdmac->clk)) {

drivers/dma/at_xdmac.c

2317

return PTR_ERR(atxdmac->clk);

drivers/dma/at_xdmac.c

2327

ret = clk_prepare_enable(atxdmac->clk);

drivers/dma/at_xdmac.c

2437

clk_disable_unprepare(atxdmac->clk);

drivers/dma/at_xdmac.c

2454

clk_disable_unprepare(atxdmac->clk);

drivers/dma/at_xdmac.c

247

struct clk *clk;

drivers/dma/dma-axi-dmac.c

1092

dmac->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/dma/dma-axi-dmac.c

1093

if (IS_ERR(dmac->clk))

drivers/dma/dma-axi-dmac.c

1094

return PTR_ERR(dmac->clk);

drivers/dma/dma-axi-dmac.c

171

struct clk *clk;

drivers/dma/dma-jz4780.c

1007

clk_disable_unprepare(jzdma->clk);

drivers/dma/dma-jz4780.c

1018

clk_disable_unprepare(jzdma->clk);

drivers/dma/dma-jz4780.c

152

struct clk *clk;

drivers/dma/dma-jz4780.c

899

jzdma->clk = devm_clk_get(dev, NULL);

drivers/dma/dma-jz4780.c

900

if (IS_ERR(jzdma->clk)) {

drivers/dma/dma-jz4780.c

902

ret = PTR_ERR(jzdma->clk);

drivers/dma/dma-jz4780.c

906

clk_prepare_enable(jzdma->clk);

drivers/dma/dw-axi-dmac/dw-axi-dmac.h

71

struct clk *core_clk;

drivers/dma/dw-axi-dmac/dw-axi-dmac.h

72

struct clk *cfgr_clk;

drivers/dma/dw/platform.c

109

clk_disable_unprepare(chip->clk);

drivers/dma/dw/platform.c

130

clk_disable_unprepare(chip->clk);

drivers/dma/dw/platform.c

164

clk_disable_unprepare(chip->clk);

drivers/dma/dw/platform.c

175

ret = clk_prepare_enable(chip->clk);

drivers/dma/dw/platform.c

67

chip->clk = devm_clk_get_optional(chip->dev, "hclk");

drivers/dma/dw/platform.c

68

if (IS_ERR(chip->clk))

drivers/dma/dw/platform.c

69

return PTR_ERR(chip->clk);

drivers/dma/dw/platform.c

70

ret = clk_prepare_enable(chip->clk);

drivers/dma/dw/platform.c

90

clk_disable_unprepare(chip->clk);

drivers/dma/ep93xx_dma.c

1022

clk_disable_unprepare(edmac->clk);

drivers/dma/ep93xx_dma.c

1413

edmac->clk = devm_clk_get(dev, dma_clk_name);

drivers/dma/ep93xx_dma.c

1414

if (IS_ERR(edmac->clk)) {

drivers/dma/ep93xx_dma.c

1415

dev_err_probe(dev, PTR_ERR(edmac->clk),

drivers/dma/ep93xx_dma.c

1417

return ERR_CAST(edmac->clk);

drivers/dma/ep93xx_dma.c

199

struct clk *clk;

drivers/dma/ep93xx_dma.c

950

ret = clk_prepare_enable(edmac->clk);

drivers/dma/ep93xx_dma.c

989

clk_disable_unprepare(edmac->clk);

drivers/dma/fsl-edma-common.c

848

clk_prepare_enable(fsl_chan->clk);

drivers/dma/fsl-edma-common.c

876

clk_disable_unprepare(fsl_chan->clk);

drivers/dma/fsl-edma-common.c

909

clk_disable_unprepare(fsl_chan->clk);

drivers/dma/fsl-edma-common.h

186

struct clk *clk;

drivers/dma/fsl-edma-common.h

258

struct clk *muxclk[DMAMUX_NR];

drivers/dma/fsl-edma-common.h

259

struct clk *dmaclk;

drivers/dma/fsl-edma-main.c

817

fsl_chan->clk = devm_clk_get_enabled(&pdev->dev,

drivers/dma/fsl-edma-main.c

820

if (IS_ERR(fsl_chan->clk))

drivers/dma/fsl-edma-main.c

821

return PTR_ERR(fsl_chan->clk);

drivers/dma/fsl-edma-main.c

829

clk_disable_unprepare(fsl_chan->clk);

drivers/dma/img-mdc-dma.c

135

struct clk *clk;

drivers/dma/img-mdc-dma.c

873

clk_disable_unprepare(mdma->clk);

drivers/dma/img-mdc-dma.c

882

return clk_prepare_enable(mdma->clk);

drivers/dma/img-mdc-dma.c

908

mdma->clk = devm_clk_get(&pdev->dev, "sys");

drivers/dma/img-mdc-dma.c

909

if (IS_ERR(mdma->clk))

drivers/dma/img-mdc-dma.c

910

return PTR_ERR(mdma->clk);

drivers/dma/imx-dma.c

178

struct clk *dma_ahb;

drivers/dma/imx-dma.c

179

struct clk *dma_ipg;

drivers/dma/imx-sdma.c

531

struct clk *clk_ipg;

drivers/dma/imx-sdma.c

532

struct clk *clk_ahb;

drivers/dma/k3dma.c

1007

ret = clk_prepare_enable(d->clk);

drivers/dma/k3dma.c

106

struct clk *clk;

drivers/dma/k3dma.c

863

d->clk = devm_clk_get(&op->dev, NULL);

drivers/dma/k3dma.c

864

if (IS_ERR(d->clk)) {

drivers/dma/k3dma.c

866

return PTR_ERR(d->clk);

drivers/dma/k3dma.c

935

ret = clk_prepare_enable(d->clk);

drivers/dma/k3dma.c

963

clk_disable_unprepare(d->clk);

drivers/dma/k3dma.c

982

clk_disable_unprepare(d->clk);

drivers/dma/k3dma.c

998

clk_disable_unprepare(d->clk);

drivers/dma/lgm/lgm-dma.c

248

struct clk *core_clk;

drivers/dma/loongson2-apb-dma.c

142

struct clk *dma_clk;

drivers/dma/mediatek/mtk-cqdma.c

140

struct clk *clk;

drivers/dma/mediatek/mtk-cqdma.c

695

err = clk_prepare_enable(cqdma->clk);

drivers/dma/mediatek/mtk-cqdma.c

710

clk_disable_unprepare(cqdma->clk);

drivers/dma/mediatek/mtk-cqdma.c

734

clk_disable_unprepare(cqdma->clk);

drivers/dma/mediatek/mtk-cqdma.c

760

cqdma->clk = devm_clk_get(&pdev->dev, "cqdma");

drivers/dma/mediatek/mtk-cqdma.c

761

if (IS_ERR(cqdma->clk)) {

drivers/dma/mediatek/mtk-cqdma.c

764

return PTR_ERR(cqdma->clk);

drivers/dma/mediatek/mtk-hsdma.c

234

struct clk *clk;

drivers/dma/mediatek/mtk-hsdma.c

854

err = clk_prepare_enable(hsdma->clk);

drivers/dma/mediatek/mtk-hsdma.c

868

clk_disable_unprepare(hsdma->clk);

drivers/dma/mediatek/mtk-hsdma.c

916

hsdma->clk = devm_clk_get(&pdev->dev, "hsdma");

drivers/dma/mediatek/mtk-hsdma.c

917

if (IS_ERR(hsdma->clk)) {

drivers/dma/mediatek/mtk-hsdma.c

920

return PTR_ERR(hsdma->clk);

drivers/dma/mediatek/mtk-uart-apdma.c

491

mtkd->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/mediatek/mtk-uart-apdma.c

492

if (IS_ERR(mtkd->clk)) {

drivers/dma/mediatek/mtk-uart-apdma.c

494

rc = PTR_ERR(mtkd->clk);

drivers/dma/mediatek/mtk-uart-apdma.c

595

clk_disable_unprepare(mtkd->clk);

drivers/dma/mediatek/mtk-uart-apdma.c

606

ret = clk_prepare_enable(mtkd->clk);

drivers/dma/mediatek/mtk-uart-apdma.c

620

clk_disable_unprepare(mtkd->clk);

drivers/dma/mediatek/mtk-uart-apdma.c

629

return clk_prepare_enable(mtkd->clk);

drivers/dma/mediatek/mtk-uart-apdma.c

79

struct clk *clk;

drivers/dma/milbeaut-hdmac.c

479

mdev->clk = devm_clk_get(dev, NULL);

drivers/dma/milbeaut-hdmac.c

480

if (IS_ERR(mdev->clk)) {

drivers/dma/milbeaut-hdmac.c

482

return PTR_ERR(mdev->clk);

drivers/dma/milbeaut-hdmac.c

485

ret = clk_prepare_enable(mdev->clk);

drivers/dma/milbeaut-hdmac.c

529

clk_disable_unprepare(mdev->clk);

drivers/dma/milbeaut-hdmac.c

563

clk_disable_unprepare(mdev->clk);

drivers/dma/milbeaut-hdmac.c

78

struct clk *clk;

drivers/dma/mmp_pdma.c

1229

struct clk *clk;

drivers/dma/mmp_pdma.c

1249

clk = devm_clk_get_optional_enabled(pdev->dev, NULL);

drivers/dma/mmp_pdma.c

1250

if (IS_ERR(clk))

drivers/dma/mmp_pdma.c

1251

return PTR_ERR(clk);

drivers/dma/mv_xor.c

1365

xordev->clk = clk_get(&pdev->dev, NULL);

drivers/dma/mv_xor.c

1366

if (!IS_ERR(xordev->clk))

drivers/dma/mv_xor.c

1367

clk_prepare_enable(xordev->clk);

drivers/dma/mv_xor.c

1455

if (!IS_ERR(xordev->clk)) {

drivers/dma/mv_xor.c

1456

clk_disable_unprepare(xordev->clk);

drivers/dma/mv_xor.c

1457

clk_put(xordev->clk);

drivers/dma/mv_xor.h

80

struct clk *clk;

drivers/dma/mv_xor_v2.c

159

struct clk *clk;

drivers/dma/mv_xor_v2.c

160

struct clk *reg_clk;

drivers/dma/mv_xor_v2.c

746

xor_dev->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/dma/mv_xor_v2.c

747

if (IS_ERR(xor_dev->clk))

drivers/dma/mv_xor_v2.c

748

return PTR_ERR(xor_dev->clk);

drivers/dma/mxs-dma.c

141

struct clk *clk;

drivers/dma/mxs-dma.c

414

ret = clk_prepare_enable(mxs_dma->clk);

drivers/dma/mxs-dma.c

449

clk_disable_unprepare(mxs_dma->clk);

drivers/dma/mxs-dma.c

676

ret = clk_prepare_enable(mxs_dma->clk);

drivers/dma/mxs-dma.c

697

clk_disable_unprepare(mxs_dma->clk);

drivers/dma/mxs-dma.c

768

mxs_dma->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/mxs-dma.c

769

if (IS_ERR(mxs_dma->clk))

drivers/dma/mxs-dma.c

770

return PTR_ERR(mxs_dma->clk);

drivers/dma/nbpfaxi.c

1336

nbpf->clk = devm_clk_get(dev, NULL);

drivers/dma/nbpfaxi.c

1337

if (IS_ERR(nbpf->clk))

drivers/dma/nbpfaxi.c

1338

return PTR_ERR(nbpf->clk);

drivers/dma/nbpfaxi.c

1445

ret = clk_prepare_enable(nbpf->clk);

drivers/dma/nbpfaxi.c

1464

clk_disable_unprepare(nbpf->clk);

drivers/dma/nbpfaxi.c

1486

clk_disable_unprepare(nbpf->clk);

drivers/dma/nbpfaxi.c

1506

clk_disable_unprepare(nbpf->clk);

drivers/dma/nbpfaxi.c

1513

return clk_prepare_enable(nbpf->clk);

drivers/dma/nbpfaxi.c

233

struct clk *clk;

drivers/dma/owl-dma.c

1152

od->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/owl-dma.c

1153

if (IS_ERR(od->clk)) {

drivers/dma/owl-dma.c

1155

return PTR_ERR(od->clk);

drivers/dma/owl-dma.c

1207

clk_prepare_enable(od->clk);

drivers/dma/owl-dma.c

1228

clk_disable_unprepare(od->clk);

drivers/dma/owl-dma.c

1249

clk_disable_unprepare(od->clk);

drivers/dma/owl-dma.c

228

struct clk *clk;

drivers/dma/qcom/bam_dma.c

397

struct clk *bamclk;

drivers/dma/qcom/qcom_adm.c

166

struct clk *core_clk;

drivers/dma/qcom/qcom_adm.c

167

struct clk *iface_clk;

drivers/dma/sprd-dma.c

1143

sdev->clk = devm_clk_get(&pdev->dev, "enable");

drivers/dma/sprd-dma.c

1144

if (IS_ERR(sdev->clk)) {

drivers/dma/sprd-dma.c

1146

return PTR_ERR(sdev->clk);

drivers/dma/sprd-dma.c

211

struct clk *clk;

drivers/dma/sprd-dma.c

212

struct clk *ashb_clk;

drivers/dma/sprd-dma.c

265

ret = clk_prepare_enable(sdev->clk);

drivers/dma/sprd-dma.c

281

clk_disable_unprepare(sdev->clk);

drivers/dma/ste_dma40.c

3128

struct clk *clk;

drivers/dma/ste_dma40.c

3140

clk = devm_clk_get_enabled(dev, NULL);

drivers/dma/ste_dma40.c

3141

if (IS_ERR(clk))

drivers/dma/ste_dma40.c

3142

return PTR_ERR(clk);

drivers/dma/ste_dma40.c

3209

base->clk = clk;

drivers/dma/ste_dma40.c

597

struct clk *clk;

drivers/dma/stm32/stm32-dma.c

1584

dmadev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/stm32/stm32-dma.c

1585

if (IS_ERR(dmadev->clk))

drivers/dma/stm32/stm32-dma.c

1586

return dev_err_probe(&pdev->dev, PTR_ERR(dmadev->clk), "Can't get clock\n");

drivers/dma/stm32/stm32-dma.c

1588

ret = clk_prepare_enable(dmadev->clk);

drivers/dma/stm32/stm32-dma.c

1702

clk_disable_unprepare(dmadev->clk);

drivers/dma/stm32/stm32-dma.c

1712

clk_disable_unprepare(dmadev->clk);

drivers/dma/stm32/stm32-dma.c

1722

ret = clk_prepare_enable(dmadev->clk);

drivers/dma/stm32/stm32-dma.c

230

struct clk *clk;

drivers/dma/stm32/stm32-dma3.c

1752

ddata->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/stm32/stm32-dma3.c

1753

if (IS_ERR(ddata->clk))

drivers/dma/stm32/stm32-dma3.c

1754

return dev_err_probe(&pdev->dev, PTR_ERR(ddata->clk), "Failed to get clk\n");

drivers/dma/stm32/stm32-dma3.c

1760

ret = clk_prepare_enable(ddata->clk);

drivers/dma/stm32/stm32-dma3.c

1922

clk_disable_unprepare(ddata->clk);

drivers/dma/stm32/stm32-dma3.c

1936

clk_disable_unprepare(ddata->clk);

drivers/dma/stm32/stm32-dma3.c

1946

ret = clk_prepare_enable(ddata->clk);

drivers/dma/stm32/stm32-dma3.c

308

struct clk *clk;

drivers/dma/stm32/stm32-dmamux.c

255

stm32_dmamux->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/stm32/stm32-dmamux.c

256

if (IS_ERR(stm32_dmamux->clk))

drivers/dma/stm32/stm32-dmamux.c

257

return dev_err_probe(&pdev->dev, PTR_ERR(stm32_dmamux->clk),

drivers/dma/stm32/stm32-dmamux.c

260

ret = clk_prepare_enable(stm32_dmamux->clk);

drivers/dma/stm32/stm32-dmamux.c

303

clk_disable_unprepare(stm32_dmamux->clk);

drivers/dma/stm32/stm32-dmamux.c

314

clk_disable_unprepare(stm32_dmamux->clk);

drivers/dma/stm32/stm32-dmamux.c

325

ret = clk_prepare_enable(stm32_dmamux->clk);

drivers/dma/stm32/stm32-dmamux.c

39

struct clk *clk;

drivers/dma/stm32/stm32-mdma.c

1641

dmadev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/stm32/stm32-mdma.c

1642

if (IS_ERR(dmadev->clk))

drivers/dma/stm32/stm32-mdma.c

1643

return dev_err_probe(&pdev->dev, PTR_ERR(dmadev->clk),

drivers/dma/stm32/stm32-mdma.c

1646

ret = clk_prepare_enable(dmadev->clk);

drivers/dma/stm32/stm32-mdma.c

1743

clk_disable_unprepare(dmadev->clk);

drivers/dma/stm32/stm32-mdma.c

1753

clk_disable_unprepare(dmadev->clk);

drivers/dma/stm32/stm32-mdma.c

1763

ret = clk_prepare_enable(dmadev->clk);

drivers/dma/stm32/stm32-mdma.c

252

struct clk *clk;

drivers/dma/sun4i-dma.c

1252

priv->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/dma/sun4i-dma.c

1253

if (IS_ERR(priv->clk))

drivers/dma/sun4i-dma.c

1254

return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk),

drivers/dma/sun4i-dma.c

227

struct clk *clk;

drivers/dma/sun6i-dma.c

1330

sdc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/sun6i-dma.c

1331

if (IS_ERR(sdc->clk)) {

drivers/dma/sun6i-dma.c

1333

return PTR_ERR(sdc->clk);

drivers/dma/sun6i-dma.c

1444

ret = clk_prepare_enable(sdc->clk);

drivers/dma/sun6i-dma.c

1490

clk_disable_unprepare(sdc->clk);

drivers/dma/sun6i-dma.c

1508

clk_disable_unprepare(sdc->clk);

drivers/dma/sun6i-dma.c

199

struct clk *clk;

drivers/dma/sun6i-dma.c

200

struct clk *clk_mbus;

drivers/dma/tegra20-apb-dma.c

213

struct clk *dma_clk;

drivers/dma/tegra210-adma.c

191

struct clk *ahub_clk;

drivers/dma/uniphier-mdmac.c

404

mdev->clk = devm_clk_get(dev, NULL);

drivers/dma/uniphier-mdmac.c

405

if (IS_ERR(mdev->clk)) {

drivers/dma/uniphier-mdmac.c

407

return PTR_ERR(mdev->clk);

drivers/dma/uniphier-mdmac.c

410

ret = clk_prepare_enable(mdev->clk);

drivers/dma/uniphier-mdmac.c

451

clk_disable_unprepare(mdev->clk);

drivers/dma/uniphier-mdmac.c

485

clk_disable_unprepare(mdev->clk);

drivers/dma/uniphier-mdmac.c

69

struct clk *clk;

drivers/dma/xgene-dma.c

1716

pdma->clk = devm_clk_get(&pdev->dev, NULL);

drivers/dma/xgene-dma.c

1717

if (IS_ERR(pdma->clk) && !ACPI_COMPANION(&pdev->dev)) {

drivers/dma/xgene-dma.c

1719

return PTR_ERR(pdma->clk);

drivers/dma/xgene-dma.c

1723

if (!IS_ERR(pdma->clk)) {

drivers/dma/xgene-dma.c

1724

ret = clk_prepare_enable(pdma->clk);

drivers/dma/xgene-dma.c

1773

if (!IS_ERR(pdma->clk))

drivers/dma/xgene-dma.c

1774

clk_disable_unprepare(pdma->clk);

drivers/dma/xgene-dma.c

1798

if (!IS_ERR(pdma->clk))

drivers/dma/xgene-dma.c

1799

clk_disable_unprepare(pdma->clk);

drivers/dma/xgene-dma.c

304

struct clk *clk;

drivers/dma/xilinx/xilinx_dma.c

2753

static int axidma_clk_init(struct platform_device *pdev, struct clk **axi_clk,

drivers/dma/xilinx/xilinx_dma.c

2754

struct clk **tx_clk, struct clk **rx_clk,

drivers/dma/xilinx/xilinx_dma.c

2755

struct clk **sg_clk, struct clk **tmp_clk)

drivers/dma/xilinx/xilinx_dma.c

2813

static int axicdma_clk_init(struct platform_device *pdev, struct clk **axi_clk,

drivers/dma/xilinx/xilinx_dma.c

2814

struct clk **dev_clk, struct clk **tmp_clk,

drivers/dma/xilinx/xilinx_dma.c

2815

struct clk **tmp1_clk, struct clk **tmp2_clk)

drivers/dma/xilinx/xilinx_dma.c

2851

static int axivdma_clk_init(struct platform_device *pdev, struct clk **axi_clk,

drivers/dma/xilinx/xilinx_dma.c

2852

struct clk **tx_clk, struct clk **txs_clk,

drivers/dma/xilinx/xilinx_dma.c

2853

struct clk **rx_clk, struct clk **rxs_clk)

drivers/dma/xilinx/xilinx_dma.c

3192

int (*clk_init)(struct platform_device *, struct clk **, struct clk **,

drivers/dma/xilinx/xilinx_dma.c

3193

struct clk **, struct clk **, struct clk **)

drivers/dma/xilinx/xilinx_dma.c

480

int (*clk_init)(struct platform_device *pdev, struct clk **axi_clk,

drivers/dma/xilinx/xilinx_dma.c

481

struct clk **tx_clk, struct clk **txs_clk,

drivers/dma/xilinx/xilinx_dma.c

482

struct clk **rx_clk, struct clk **rxs_clk);

drivers/dma/xilinx/xilinx_dma.c

516

struct clk *axi_clk;

drivers/dma/xilinx/xilinx_dma.c

517

struct clk *tx_clk;

drivers/dma/xilinx/xilinx_dma.c

518

struct clk *txs_clk;

drivers/dma/xilinx/xilinx_dma.c

519

struct clk *rx_clk;

drivers/dma/xilinx/xilinx_dma.c

520

struct clk *rxs_clk;

drivers/dma/xilinx/xilinx_dpdma.c

267

struct clk *axi_clk;

drivers/dma/xilinx/zynqmp_dma.c

257

struct clk *clk_main;

drivers/dma/xilinx/zynqmp_dma.c

258

struct clk *clk_apb;

drivers/firmware/arm_scmi/clock.c

1083

cinfo->clk = devm_kcalloc(ph->dev, cinfo->num_clocks,

drivers/firmware/arm_scmi/clock.c

1084

sizeof(*cinfo->clk), GFP_KERNEL);

drivers/firmware/arm_scmi/clock.c

1085

if (!cinfo->clk)

drivers/firmware/arm_scmi/clock.c

1089

struct scmi_clock_info *clk = cinfo->clk + clkid;

drivers/firmware/arm_scmi/clock.c

1093

scmi_clock_describe_rates_get(ph, clkid, clk);

drivers/firmware/arm_scmi/clock.c

165

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

187

return ci->clk + clk_id;

drivers/firmware/arm_scmi/clock.c

229

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

260

p->clk->num_parents = st->num_returned + st->num_remaining;

drivers/firmware/arm_scmi/clock.c

261

p->clk->parents = devm_kcalloc(dev, p->clk->num_parents,

drivers/firmware/arm_scmi/clock.c

262

sizeof(*p->clk->parents),

drivers/firmware/arm_scmi/clock.c

264

if (!p->clk->parents) {

drivers/firmware/arm_scmi/clock.c

265

p->clk->num_parents = 0;

drivers/firmware/arm_scmi/clock.c

282

u32 *parent = &p->clk->parents[st->desc_index + st->loop_idx];

drivers/firmware/arm_scmi/clock.c

290

struct scmi_clock_info *clk)

drivers/firmware/arm_scmi/clock.c

300

.clk = clk,

drivers/firmware/arm_scmi/clock.c

320

struct scmi_clock_info *clk)

drivers/firmware/arm_scmi/clock.c

337

clk->state_ctrl_forbidden = !(perm & CLOCK_STATE_CONTROL_ALLOWED);

drivers/firmware/arm_scmi/clock.c

338

clk->rate_ctrl_forbidden = !(perm & CLOCK_RATE_CONTROL_ALLOWED);

drivers/firmware/arm_scmi/clock.c

339

clk->parent_ctrl_forbidden = !(perm & CLOCK_PARENT_CONTROL_ALLOWED);

drivers/firmware/arm_scmi/clock.c

354

struct scmi_clock_info *clk = cinfo->clk + clk_id;

drivers/firmware/arm_scmi/clock.c

369

strscpy(clk->name, attr->name, SCMI_SHORT_NAME_MAX_SIZE);

drivers/firmware/arm_scmi/clock.c

373

clk->enable_latency = latency ? : U32_MAX;

drivers/firmware/arm_scmi/clock.c

385

NULL, clk->name,

drivers/firmware/arm_scmi/clock.c

390

clk->rate_changed_notifications = true;

drivers/firmware/arm_scmi/clock.c

393

clk->rate_change_requested_notifications = true;

drivers/firmware/arm_scmi/clock.c

396

scmi_clock_possible_parents(ph, clk_id, clk);

drivers/firmware/arm_scmi/clock.c

398

scmi_clock_get_permissions(ph, clk_id, clk);

drivers/firmware/arm_scmi/clock.c

400

clk->extended_config = true;

drivers/firmware/arm_scmi/clock.c

459

p->clk->rate_discrete = RATE_DISCRETE(flags);

drivers/firmware/arm_scmi/clock.c

462

if (!p->clk->rate_discrete &&

drivers/firmware/arm_scmi/clock.c

466

p->clk->name, st->num_returned, st->num_remaining,

drivers/firmware/arm_scmi/clock.c

485

if (!p->clk->rate_discrete) {

drivers/firmware/arm_scmi/clock.c

488

p->clk->range.min_rate = RATE_TO_U64(r->rate[0]);

drivers/firmware/arm_scmi/clock.c

491

p->clk->range.max_rate = RATE_TO_U64(r->rate[1]);

drivers/firmware/arm_scmi/clock.c

494

p->clk->range.step_size = RATE_TO_U64(r->rate[2]);

drivers/firmware/arm_scmi/clock.c

501

u64 *rate = &p->clk->list.rates[st->desc_index + st->loop_idx];

drivers/firmware/arm_scmi/clock.c

504

p->clk->list.num_rates++;

drivers/firmware/arm_scmi/clock.c

512

struct scmi_clock_info *clk)

drivers/firmware/arm_scmi/clock.c

523

.clk = clk,

drivers/firmware/arm_scmi/clock.c

538

if (!clk->rate_discrete) {

drivers/firmware/arm_scmi/clock.c

540

clk->range.min_rate, clk->range.max_rate,

drivers/firmware/arm_scmi/clock.c

541

clk->range.step_size);

drivers/firmware/arm_scmi/clock.c

542

} else if (clk->list.num_rates) {

drivers/firmware/arm_scmi/clock.c

543

sort(clk->list.rates, clk->list.num_rates,

drivers/firmware/arm_scmi/clock.c

544

sizeof(clk->list.rates[0]), rate_cmp_func, NULL);

drivers/firmware/arm_scmi/clock.c

580

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

582

clk = scmi_clock_domain_lookup(ci, clk_id);

drivers/firmware/arm_scmi/clock.c

583

if (IS_ERR(clk))

drivers/firmware/arm_scmi/clock.c

584

return PTR_ERR(clk);

drivers/firmware/arm_scmi/clock.c

586

if (clk->rate_ctrl_forbidden)

drivers/firmware/arm_scmi/clock.c

665

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

667

clk = scmi_clock_domain_lookup(ci, clk_id);

drivers/firmware/arm_scmi/clock.c

668

if (IS_ERR(clk))

drivers/firmware/arm_scmi/clock.c

669

return PTR_ERR(clk);

drivers/firmware/arm_scmi/clock.c

671

if (parent_id >= clk->num_parents)

drivers/firmware/arm_scmi/clock.c

674

if (clk->parent_ctrl_forbidden)

drivers/firmware/arm_scmi/clock.c

686

cfg->parent_id = cpu_to_le32(clk->parents[parent_id]);

drivers/firmware/arm_scmi/clock.c

761

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

763

clk = scmi_clock_domain_lookup(ci, clk_id);

drivers/firmware/arm_scmi/clock.c

764

if (IS_ERR(clk))

drivers/firmware/arm_scmi/clock.c

765

return PTR_ERR(clk);

drivers/firmware/arm_scmi/clock.c

767

if (clk->state_ctrl_forbidden)

drivers/firmware/arm_scmi/clock.c

778

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

780

clk = scmi_clock_domain_lookup(ci, clk_id);

drivers/firmware/arm_scmi/clock.c

781

if (IS_ERR(clk))

drivers/firmware/arm_scmi/clock.c

782

return PTR_ERR(clk);

drivers/firmware/arm_scmi/clock.c

784

if (clk->state_ctrl_forbidden)

drivers/firmware/arm_scmi/clock.c

879

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

881

clk = scmi_clock_domain_lookup(ci, clk_id);

drivers/firmware/arm_scmi/clock.c

882

if (IS_ERR(clk))

drivers/firmware/arm_scmi/clock.c

883

return PTR_ERR(clk);

drivers/firmware/arm_scmi/clock.c

885

if (!clk->extended_config)

drivers/firmware/arm_scmi/clock.c

898

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

900

clk = scmi_clock_domain_lookup(ci, clk_id);

drivers/firmware/arm_scmi/clock.c

901

if (IS_ERR(clk))

drivers/firmware/arm_scmi/clock.c

902

return PTR_ERR(clk);

drivers/firmware/arm_scmi/clock.c

904

if (!clk->extended_config)

drivers/firmware/arm_scmi/clock.c

921

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

924

clk = scmi_clock_domain_lookup(ci, clk_id);

drivers/firmware/arm_scmi/clock.c

925

if (IS_ERR(clk))

drivers/firmware/arm_scmi/clock.c

928

if (!clk->name[0])

drivers/firmware/arm_scmi/clock.c

931

return clk;

drivers/firmware/arm_scmi/clock.c

952

struct scmi_clock_info *clk;

drivers/firmware/arm_scmi/clock.c

958

clk = scmi_clock_domain_lookup(ci, src_id);

drivers/firmware/arm_scmi/clock.c

959

if (IS_ERR(clk))

drivers/firmware/arm_scmi/clock.c

963

supported = clk->rate_changed_notifications;

drivers/firmware/arm_scmi/clock.c

965

supported = clk->rate_change_requested_notifications;

drivers/firmware/arm_scpi.c

539

struct clk_get_info clk;

drivers/firmware/arm_scpi.c

543

sizeof(le_clk_id), &clk, sizeof(clk));

drivers/firmware/arm_scpi.c

545

*min = le32_to_cpu(clk.min_rate);

drivers/firmware/arm_scpi.c

546

*max = le32_to_cpu(clk.max_rate);

drivers/firmware/arm_scpi.c

568

struct clk_set_value clk = {

drivers/firmware/arm_scpi.c

573

return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk),

drivers/firmware/arm_scpi.c

580

struct legacy_clk_set_value clk = {

drivers/firmware/arm_scpi.c

585

return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk),

drivers/firmware/qcom/qcom_scm.c

48

struct clk *core_clk;

drivers/firmware/qcom/qcom_scm.c

49

struct clk *iface_clk;

drivers/firmware/qcom/qcom_scm.c

50

struct clk *bus_clk;

drivers/fpga/altera-hps2fpga.c

152

priv->clk = devm_clk_get(dev, NULL);

drivers/fpga/altera-hps2fpga.c

153

if (IS_ERR(priv->clk)) {

drivers/fpga/altera-hps2fpga.c

155

return PTR_ERR(priv->clk);

drivers/fpga/altera-hps2fpga.c

158

ret = clk_prepare_enable(priv->clk);

drivers/fpga/altera-hps2fpga.c

189

clk_disable_unprepare(priv->clk);

drivers/fpga/altera-hps2fpga.c

201

clk_disable_unprepare(priv->clk);

drivers/fpga/altera-hps2fpga.c

47

struct clk *clk;

drivers/fpga/socfpga-a10.c

496

priv->clk = devm_clk_get(dev, NULL);

drivers/fpga/socfpga-a10.c

497

if (IS_ERR(priv->clk)) {

drivers/fpga/socfpga-a10.c

499

return PTR_ERR(priv->clk);

drivers/fpga/socfpga-a10.c

502

ret = clk_prepare_enable(priv->clk);

drivers/fpga/socfpga-a10.c

511

clk_disable_unprepare(priv->clk);

drivers/fpga/socfpga-a10.c

526

clk_disable_unprepare(priv->clk);

drivers/fpga/socfpga-a10.c

73

struct clk *clk;

drivers/fpga/xilinx-pr-decoupler.c

121

priv->clk = devm_clk_get(&pdev->dev, "aclk");

drivers/fpga/xilinx-pr-decoupler.c

122

if (IS_ERR(priv->clk))

drivers/fpga/xilinx-pr-decoupler.c

123

return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk),

drivers/fpga/xilinx-pr-decoupler.c

126

err = clk_prepare_enable(priv->clk);

drivers/fpga/xilinx-pr-decoupler.c

132

clk_disable(priv->clk);

drivers/fpga/xilinx-pr-decoupler.c

148

clk_unprepare(priv->clk);

drivers/fpga/xilinx-pr-decoupler.c

160

clk_unprepare(p->clk);

drivers/fpga/xilinx-pr-decoupler.c

30

struct clk *clk;

drivers/fpga/xilinx-pr-decoupler.c

50

err = clk_enable(priv->clk);

drivers/fpga/xilinx-pr-decoupler.c

59

clk_disable(priv->clk);

drivers/fpga/xilinx-pr-decoupler.c

70

err = clk_enable(priv->clk);

drivers/fpga/xilinx-pr-decoupler.c

76

clk_disable(priv->clk);

drivers/fpga/zynq-fpga.c

124

struct clk *clk;

drivers/fpga/zynq-fpga.c

261

err = clk_enable(priv->clk);

drivers/fpga/zynq-fpga.c

374

clk_disable(priv->clk);

drivers/fpga/zynq-fpga.c

379

clk_disable(priv->clk);

drivers/fpga/zynq-fpga.c

416

err = clk_enable(priv->clk);

drivers/fpga/zynq-fpga.c

478

clk_disable(priv->clk);

drivers/fpga/zynq-fpga.c

492

err = clk_enable(priv->clk);

drivers/fpga/zynq-fpga.c

505

clk_disable(priv->clk);

drivers/fpga/zynq-fpga.c

532

err = clk_enable(priv->clk);

drivers/fpga/zynq-fpga.c

537

clk_disable(priv->clk);

drivers/fpga/zynq-fpga.c

582

priv->clk = devm_clk_get(dev, "ref_clk");

drivers/fpga/zynq-fpga.c

583

if (IS_ERR(priv->clk))

drivers/fpga/zynq-fpga.c

584

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/fpga/zynq-fpga.c

587

err = clk_prepare_enable(priv->clk);

drivers/fpga/zynq-fpga.c

602

clk_disable_unprepare(priv->clk);

drivers/fpga/zynq-fpga.c

606

clk_disable(priv->clk);

drivers/fpga/zynq-fpga.c

612

clk_unprepare(priv->clk);

drivers/fpga/zynq-fpga.c

631

clk_unprepare(priv->clk);

drivers/fsi/fsi-master-aspeed.c

26

struct clk *clk;

drivers/fsi/fsi-master-aspeed.c

561

aspeed->clk = devm_clk_get(aspeed->dev, NULL);

drivers/fsi/fsi-master-aspeed.c

562

if (IS_ERR(aspeed->clk)) {

drivers/fsi/fsi-master-aspeed.c

564

rc = PTR_ERR(aspeed->clk);

drivers/fsi/fsi-master-aspeed.c

567

rc = clk_prepare_enable(aspeed->clk);

drivers/fsi/fsi-master-aspeed.c

643

clk_disable_unprepare(aspeed->clk);

drivers/fsi/fsi-master-aspeed.c

654

clk_disable_unprepare(aspeed->clk);

drivers/gpio/gpio-aspeed-sgpio.c

61

struct clk *pclk;

drivers/gpio/gpio-aspeed.c

1326

gpio->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/gpio/gpio-aspeed.c

1327

if (IS_ERR(gpio->clk)) {

drivers/gpio/gpio-aspeed.c

1330

gpio->clk = NULL;

drivers/gpio/gpio-aspeed.c

712

rate = clk_get_rate(gpio->clk);

drivers/gpio/gpio-aspeed.c

792

if (!gpio->clk)

drivers/gpio/gpio-aspeed.c

798

usecs, clk_get_rate(gpio->clk), rc);

drivers/gpio/gpio-aspeed.c

87

struct clk *clk;

drivers/gpio/gpio-cadence.c

190

struct clk *clk;

drivers/gpio/gpio-cadence.c

251

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/gpio/gpio-cadence.c

252

if (IS_ERR(clk)) {

drivers/gpio/gpio-cadence.c

253

ret = PTR_ERR(clk);

drivers/gpio/gpio-davinci.c

466

struct clk *clk;

drivers/gpio/gpio-davinci.c

486

clk = devm_clk_get_enabled(dev, "gpio");

drivers/gpio/gpio-davinci.c

487

if (IS_ERR(clk)) {

drivers/gpio/gpio-davinci.c

488

dev_err(dev, "Error %ld getting gpio clock\n", PTR_ERR(clk));

drivers/gpio/gpio-davinci.c

489

return PTR_ERR(clk);

drivers/gpio/gpio-ftgpio010.c

183

pclk_freq = clk_get_rate(g->clk);

drivers/gpio/gpio-ftgpio010.c

259

g->clk = devm_clk_get_enabled(dev, NULL);

drivers/gpio/gpio-ftgpio010.c

260

if (IS_ERR(g->clk) && PTR_ERR(g->clk) == -EPROBE_DEFER)

drivers/gpio/gpio-ftgpio010.c

265

return PTR_ERR(g->clk);

drivers/gpio/gpio-ftgpio010.c

287

if (!IS_ERR(g->clk))

drivers/gpio/gpio-ftgpio010.c

53

struct clk *clk;

drivers/gpio/gpio-lpc18xx.c

341

struct clk *clk;

drivers/gpio/gpio-lpc18xx.c

366

clk = devm_clk_get_enabled(dev, NULL);

drivers/gpio/gpio-lpc18xx.c

367

if (IS_ERR(clk)) {

drivers/gpio/gpio-lpc18xx.c

369

return PTR_ERR(clk);

drivers/gpio/gpio-mb86s7x.c

159

struct clk *clk;

drivers/gpio/gpio-mb86s7x.c

172

clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/gpio/gpio-mb86s7x.c

173

if (IS_ERR(clk))

drivers/gpio/gpio-mb86s7x.c

174

return PTR_ERR(clk);

drivers/gpio/gpio-mpfs.c

121

struct clk *clk;

drivers/gpio/gpio-mpfs.c

140

clk = devm_clk_get_enabled(dev, NULL);

drivers/gpio/gpio-mpfs.c

141

if (IS_ERR(clk))

drivers/gpio/gpio-mpfs.c

142

return dev_err_probe(dev, PTR_ERR(clk), "failed to get and enable clock\n");

drivers/gpio/gpio-mvebu.c

1155

mvchip->clk = devm_clk_get(&pdev->dev, NULL);

drivers/gpio/gpio-mvebu.c

1157

if (!IS_ERR(mvchip->clk))

drivers/gpio/gpio-mvebu.c

1158

clk_prepare_enable(mvchip->clk);

drivers/gpio/gpio-mvebu.c

122

struct clk *clk;

drivers/gpio/gpio-mvebu.c

807

if (IS_ERR(mvchip->clk))

drivers/gpio/gpio-mvebu.c

808

return PTR_ERR(mvchip->clk);

drivers/gpio/gpio-mvebu.c

861

mvpwm->clk_rate = clk_get_rate(mvchip->clk);

drivers/gpio/gpio-mxc.c

451

port->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/gpio/gpio-mxc.c

452

if (IS_ERR(port->clk))

drivers/gpio/gpio-mxc.c

453

return PTR_ERR(port->clk);

drivers/gpio/gpio-mxc.c

627

clk_disable_unprepare(port->clk);

drivers/gpio/gpio-mxc.c

639

ret = clk_prepare_enable(port->clk);

drivers/gpio/gpio-mxc.c

64

struct clk *clk;

drivers/gpio/gpio-mxc.c

685

ret = clk_prepare_enable(port->clk);

drivers/gpio/gpio-mxc.c

689

clk_disable_unprepare(port->clk);

drivers/gpio/gpio-mxc.c

702

ret = clk_prepare_enable(port->clk);

drivers/gpio/gpio-mxc.c

708

clk_disable_unprepare(port->clk);

drivers/gpio/gpio-nomadik.c

159

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

170

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

201

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

215

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

233

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

257

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

267

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

278

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

289

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

297

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

312

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

316

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

328

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

332

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

342

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

346

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

356

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

360

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

370

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

374

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

389

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

394

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

425

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

481

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

516

struct clk *clk;

drivers/gpio/gpio-nomadik.c

578

clk = clk_get_optional(gpio_dev, NULL);

drivers/gpio/gpio-nomadik.c

579

if (IS_ERR(clk)) {

drivers/gpio/gpio-nomadik.c

581

return ERR_CAST(clk);

drivers/gpio/gpio-nomadik.c

583

clk_prepare(clk);

drivers/gpio/gpio-nomadik.c

584

nmk_chip->clk = clk;

drivers/gpio/gpio-nomadik.c

589

clk_unprepare(clk);

drivers/gpio/gpio-nomadik.c

590

clk_put(clk);

drivers/gpio/gpio-nomadik.c

605

clk_unprepare(clk);

drivers/gpio/gpio-nomadik.c

606

clk_put(clk);

drivers/gpio/gpio-nomadik.c

702

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

704

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

83

clk_enable(nmk_chip->clk);

drivers/gpio/gpio-nomadik.c

85

clk_disable(nmk_chip->clk);

drivers/gpio/gpio-npcm-sgpio.c

59

struct clk *pclk;

drivers/gpio/gpio-omap.c

62

struct clk *dbck;

drivers/gpio/gpio-pxa.c

614

struct clk *clk;

drivers/gpio/gpio-pxa.c

660

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/gpio/gpio-pxa.c

661

if (IS_ERR(clk)) {

drivers/gpio/gpio-pxa.c

663

PTR_ERR(clk));

drivers/gpio/gpio-pxa.c

664

return PTR_ERR(clk);

drivers/gpio/gpio-rockchip.c

659

bank->clk = of_clk_get(bank->of_node, 0);

drivers/gpio/gpio-rockchip.c

660

if (IS_ERR(bank->clk))

drivers/gpio/gpio-rockchip.c

661

return PTR_ERR(bank->clk);

drivers/gpio/gpio-rockchip.c

663

clk_prepare_enable(bank->clk);

drivers/gpio/gpio-rockchip.c

675

clk_disable_unprepare(bank->clk);

drivers/gpio/gpio-rockchip.c

754

clk_disable_unprepare(bank->clk);

drivers/gpio/gpio-rockchip.c

795

clk_disable_unprepare(bank->clk);

drivers/gpio/gpio-spacemit-k1.c

272

struct clk *core_clk, *bus_clk;

drivers/gpio/gpio-stp-xway.c

237

struct clk *clk;

drivers/gpio/gpio-stp-xway.c

299

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/gpio/gpio-stp-xway.c

300

if (IS_ERR(clk)) {

drivers/gpio/gpio-stp-xway.c

302

return PTR_ERR(clk);

drivers/gpio/gpio-vf610.c

37

struct clk *clk_port;

drivers/gpio/gpio-vf610.c

38

struct clk *clk_gpio;

drivers/gpio/gpio-viperboard.c

150

gamsg->clk = 0x00;

drivers/gpio/gpio-viperboard.c

190

gamsg->clk = gpioa_clk;

drivers/gpio/gpio-viperboard.c

231

gamsg->clk = 0x00;

drivers/gpio/gpio-viperboard.c

44

u8 clk;

drivers/gpio/gpio-viperboard.c

96

gamsg->clk = 0x00;

drivers/gpio/gpio-xilinx.c

350

clk_disable(gpio->clk);

drivers/gpio/gpio-xilinx.c

359

return clk_enable(gpio->clk);

drivers/gpio/gpio-xilinx.c

619

chip->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/gpio/gpio-xilinx.c

620

if (IS_ERR(chip->clk))

drivers/gpio/gpio-xilinx.c

621

return dev_err_probe(dev, PTR_ERR(chip->clk), "input clock not found.\n");

drivers/gpio/gpio-xilinx.c

71

struct clk *clk;

drivers/gpio/gpio-zynq.c

129

struct clk *clk;

drivers/gpio/gpio-zynq.c

786

clk_disable_unprepare(gpio->clk);

drivers/gpio/gpio-zynq.c

795

return clk_prepare_enable(gpio->clk);

drivers/gpio/gpio-zynq.c

942

gpio->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/gpio/gpio-zynq.c

943

if (IS_ERR(gpio->clk))

drivers/gpio/gpio-zynq.c

944

return dev_err_probe(&pdev->dev, PTR_ERR(gpio->clk), "input clock not found.\n");

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1349

dc_state->bw_ctx.bw.dcn.clk.p_state_change_support = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1350

dc_state->bw_ctx.bw.dcn.clk.dramclk_khz = clk_mgr->dc_mode_softmax_enabled ?

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

1352

dc_state->bw_ctx.bw.dcn.clk.idle_dramclk_khz = dc_state->bw_ctx.bw.dcn.clk.dramclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

491

TP_PROTO(const struct dc_clocks *clk),

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

492

TP_ARGS(clk),

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

514

__entry->dispclk_khz = clk->dispclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

515

__entry->dppclk_khz = clk->dppclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

516

__entry->dcfclk_khz = clk->dcfclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

517

__entry->socclk_khz = clk->socclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

518

__entry->dcfclk_deep_sleep_khz = clk->dcfclk_deep_sleep_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

519

__entry->fclk_khz = clk->fclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

520

__entry->phyclk_khz = clk->phyclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

521

__entry->dramclk_khz = clk->dramclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

522

__entry->p_state_change_support = clk->p_state_change_support;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

523

__entry->prev_p_state_change_support = clk->prev_p_state_change_support;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

524

__entry->pwr_state = clk->pwr_state;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

525

__entry->prev_p_state_change_support = clk->prev_p_state_change_support;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

526

__entry->dtm_level = clk->dtm_level;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

527

__entry->max_supported_dppclk_khz = clk->max_supported_dppclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

528

__entry->max_supported_dispclk_khz = clk->max_supported_dispclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

529

__entry->bw_dppclk_khz = clk->bw_dppclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

530

__entry->bw_dispclk_khz = clk->bw_dispclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

560

TP_PROTO(const struct dce_bw_output *clk),

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

561

TP_ARGS(clk),

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

576

__entry->cpuc_state_change_enable = clk->cpuc_state_change_enable;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

577

__entry->cpup_state_change_enable = clk->cpup_state_change_enable;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

578

__entry->stutter_mode_enable = clk->stutter_mode_enable;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

579

__entry->nbp_state_change_enable = clk->nbp_state_change_enable;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

580

__entry->all_displays_in_sync = clk->all_displays_in_sync;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

581

__entry->sclk_khz = clk->sclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

582

__entry->sclk_deep_sleep_khz = clk->sclk_deep_sleep_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

583

__entry->yclk_khz = clk->yclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

584

__entry->dispclk_khz = clk->dispclk_khz;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

585

__entry->blackout_recovery_time_us = clk->blackout_recovery_time_us;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1055

SET_PIXEL_CLOCK_PS_ALLOCATION_V5 clk;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1059

memset(&clk, 0, sizeof(clk));

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1064

clk.sPCLKInput.ucCRTC = controller_id;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1065

clk.sPCLKInput.ucPpll = (uint8_t)pll_id;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1066

clk.sPCLKInput.ucRefDiv =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1068

clk.sPCLKInput.usFbDiv =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1070

clk.sPCLKInput.ulFbDivDecFrac =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1072

clk.sPCLKInput.ucPostDiv =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1074

clk.sPCLKInput.ucTransmitterID =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1078

clk.sPCLKInput.ucEncoderMode =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1083

clk.sPCLKInput.usPixelClock =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1087

clk.sPCLKInput.ucMiscInfo |=

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1091

clk.sPCLKInput.ucMiscInfo |=

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1103

clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_32BPP;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1107

clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1113

if (EXEC_BIOS_CMD_TABLE(SetPixelClock, clk))

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1125

SET_PIXEL_CLOCK_PS_ALLOCATION_V6 clk;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1129

memset(&clk, 0, sizeof(clk));

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1153

clk.sPCLKInput.ulCrtcPclkFreq.ucCRTC = controller_id;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1154

clk.sPCLKInput.ucPpll = (uint8_t) pll_id;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1155

clk.sPCLKInput.ucRefDiv =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1157

clk.sPCLKInput.usFbDiv =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1159

clk.sPCLKInput.ulFbDivDecFrac =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1161

clk.sPCLKInput.ucPostDiv =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1163

clk.sPCLKInput.ucTransmitterID =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1167

clk.sPCLKInput.ucEncoderMode =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1172

clk.sPCLKInput.ulCrtcPclkFreq.ulPixelClock =

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1176

clk.sPCLKInput.ucMiscInfo |=

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1181

clk.sPCLKInput.ucMiscInfo |=

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1193

clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_30BPP_V6;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1196

clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_36BPP_V6;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1199

clk.sPCLKInput.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_48BPP;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1205

if (EXEC_BIOS_CMD_TABLE(SetPixelClock, clk))

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1217

PIXEL_CLOCK_PARAMETERS_V7 clk;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1221

memset(&clk, 0, sizeof(clk));

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1244

clk.ucCRTC = controller_id;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1245

clk.ucPpll = (uint8_t) pll_id;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1246

clk.ucTransmitterID = bp->cmd_helper->encoder_id_to_atom(dal_graphics_object_id_get_encoder_id(bp_params->encoder_object_id));

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1247

clk.ucEncoderMode = (uint8_t) bp->cmd_helper->encoder_mode_bp_to_atom(bp_params->signal_type, false);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1249

clk.ulPixelClock = cpu_to_le32(bp_params->target_pixel_clock_100hz);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1251

clk.ucDeepColorRatio = (uint8_t) bp->cmd_helper->transmitter_color_depth_to_atom(bp_params->color_depth);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1254

clk.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1257

clk.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_REF_DIV_SRC;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1260

clk.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_PROG_PHYPLL;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1263

clk.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_YUV420_MODE;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1266

clk.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1269

clk.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1272

clk.ucMiscInfo |= PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN;

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1274

if (EXEC_BIOS_CMD_TABLE(SetPixelClock, clk))

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

463

struct set_pixel_clock_parameter_v1_7 *clk)

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

474

cmd.set_pixel_clock.pixel_clock.clk = *clk;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

484

struct set_pixel_clock_parameter_v1_7 clk;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

488

memset(&clk, 0, sizeof(clk));

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

512

clk.crtc_id = controller_id;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

513

clk.pll_id = (uint8_t) pll_id;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

514

clk.encoderobjid =

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

519

clk.encoder_mode = (uint8_t) bp->

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

523

clk.pixclk_100hz = cpu_to_le32(bp_params->target_pixel_clock_100hz);

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

525

clk.deep_color_ratio =

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

536

clk.miscinfo |= PIXEL_CLOCK_V7_MISC_FORCE_PROG_PPLL;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

539

clk.miscinfo |= PIXEL_CLOCK_V7_MISC_PROG_PHYPLL;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

542

clk.miscinfo |= PIXEL_CLOCK_V7_MISC_YUV420_MODE;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

545

clk.miscinfo |= PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_XTALIN;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

548

clk.miscinfo |= PIXEL_CLOCK_V7_MISC_REF_DIV_SRC_GENLK;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

551

clk.miscinfo |= PIXEL_CLOCK_V7_MISC_DVI_DUALLINK_EN;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

555

set_pixel_clock_dmcub(bp->base.ctx->dmub_srv, &clk);

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

559

if (EXEC_BIOS_CMD_TABLE(setpixelclock, clk))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c

194

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

221

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

349

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

456

clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

459

clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dispclk_khz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

462

clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

465

clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dppclk_khz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c

89

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

136

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

198

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

81

static void dcn3_init_single_clock(struct clk_mgr_internal *clk_mgr, uint32_t clk, unsigned int *entry_0, unsigned int *num_levels)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

85

uint32_t ret = dcn30_smu_get_dpm_freq_by_index(clk_mgr, clk, 0xFF);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

97

*((unsigned int *)entry_i) = (dcn30_smu_get_dpm_freq_by_index(clk_mgr, clk, i) & 0xFFFF);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

212

unsigned int dcn30_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

217

uint32_t param = (clk << 16) | freq_mhz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

219

smu_print("SMU Set hard min by freq: clk = %d, freq_mhz = %d MHz\n", clk, freq_mhz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

230

unsigned int dcn30_smu_set_hard_max_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

235

uint32_t param = (clk << 16) | freq_mhz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

237

smu_print("SMU Set hard max by freq: clk = %d, freq_mhz = %d MHz\n", clk, freq_mhz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

261

unsigned int dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

266

uint32_t param = (clk << 16) | dpm_level;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

268

smu_print("SMU Get dpm freq by index: clk = %d, dpm_level = %d\n", clk, dpm_level);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

279

unsigned int dcn30_smu_get_dc_mode_max_dpm_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

284

uint32_t param = clk << 16;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c

286

smu_print("SMU Get DC mode max DPM freq: clk = %d\n", clk);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h

41

unsigned int dcn30_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h

42

unsigned int dcn30_smu_set_hard_max_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h

43

unsigned int dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h

44

unsigned int dcn30_smu_get_dc_mode_max_dpm_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

100

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

140

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

243

if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

211

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

322

if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

131

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

230

if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

141

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

238

if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

132

static void dcn32_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *entry_0,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

138

uint32_t ret = dcn30_smu_get_dpm_freq_by_index(clk_mgr, clk, 0xFF);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

150

*((unsigned int *)entry_i) = (dcn30_smu_get_dpm_freq_by_index(clk_mgr, clk, i) & 0xFFFF);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

626

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

729

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

227

uint32_t clk)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

237

if (clk == PPCLK_DISPCLK)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

239

if (clk == PPCLK_DPPCLK)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

241

if (clk == PPCLK_DCFCLK)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

243

if (clk == PPCLK_DTBCLK)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

245

if (clk == PPCLK_UCLK)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

281

unsigned int dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

287

uint32_t param = (clk << 16) | freq_mhz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

289

smu_print("SMU Set hard min by freq: clk = %d, freq_mhz = %d MHz\n", clk, freq_mhz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.c

295

hard_min_done = dcn32_smu_wait_get_hard_min_status(clk_mgr, clk);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h

43

unsigned int dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1232

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

344

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

383

struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

120

static bool dcn401_is_ppclk_idle_dpm_enabled(struct clk_mgr_internal *clk_mgr, PPCLK_e clk)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1229

&context->bw_ctx.bw.dcn.clk,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1238

&context->bw_ctx.bw.dcn.clk,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

124

switch (clk) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1245

dcn401_auto_dpm_test_log(&context->bw_ctx.bw.dcn.clk, TO_CLK_MGR_INTERNAL(clk_mgr_base), context);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1342

new_clocks.dramclk_khz = context->bw_ctx.bw.dcn.clk.dramclk_khz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1343

new_clocks.idle_dramclk_khz = context->bw_ctx.bw.dcn.clk.idle_dramclk_khz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1344

new_clocks.p_state_change_support = context->bw_ctx.bw.dcn.clk.p_state_change_support;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1364

return clk_mgr->base.ctx->dc->current_state->bw_ctx.bw.dcn.clk.dramclk_khz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1371

return clk_mgr->base.ctx->dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

159

static void dcn401_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *entry_0,

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

165

uint32_t ret = dcn401_smu_get_dpm_freq_by_index(clk_mgr, clk, 0xFF);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

177

*((unsigned int *)entry_i) = (dcn401_smu_get_dpm_freq_by_index(clk_mgr, clk, i) & 0xFFFF);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

590

static int dcn401_set_hard_min_by_freq_optimized(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, int requested_clk_khz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

592

if (!clk_mgr->smu_present || !dcn401_is_ppclk_dpm_enabled(clk_mgr, clk))

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

605

int actual_clk_khz = dcn401_smu_set_hard_min_by_freq(clk_mgr, clk, khz_to_mhz_floor(requested_clk_khz));

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

608

actual_clk_khz = dcn401_smu_set_hard_min_by_freq(clk_mgr, clk, khz_to_mhz_ceil(requested_clk_khz));

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

75

static bool dcn401_is_ppclk_dpm_enabled(struct clk_mgr_internal *clk_mgr, PPCLK_e clk)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

79

switch (clk) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

301

unsigned int dcn401_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

307

uint32_t param = (clk << 16) | freq_mhz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

309

smu_print("SMU Set hard min by freq: clk = %d, freq_mhz = %d MHz\n", clk, freq_mhz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

315

hard_min_done = dcn401_smu_wait_hard_min_status(clk_mgr, clk);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

439

unsigned int dcn401_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

444

uint32_t param = (clk << 16) | dpm_level;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

446

smu_print("SMU Get dpm freq by index: clk = %d, dpm_level = %d\n", clk, dpm_level);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

457

unsigned int dcn401_smu_get_dc_mode_max_dpm_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

462

uint32_t param = clk << 16;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

464

smu_print("SMU Get DC mode max DPM freq: clk = %d\n", clk);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h

23

unsigned int dcn401_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h

38

unsigned int dcn401_smu_get_dc_mode_max_dpm_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h

39

unsigned int dcn401_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level);

drivers/gpu/drm/amd/display/dc/core/dc.c

2325

TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk);

drivers/gpu/drm/amd/display/dc/core/dc.c

2587

TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk);

drivers/gpu/drm/amd/display/dc/core/dc.c

5904

dc->current_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching_shut_down = true;

drivers/gpu/drm/amd/display/dc/core/dc.c

6485

profile.power_level = !context->bw_ctx.bw.dcn.clk.p_state_change_support;

drivers/gpu/drm/amd/display/dc/core/dc.c

6590

out_data->fams = dc->current_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching;

drivers/gpu/drm/amd/display/dc/core/dc.c

7161

const struct dc_clocks *clk = &dc->current_state->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/core/dc.c

7180

info->dcn_bandwidth_ub_in_mbps = (uint32_t)(clk->fclk_khz / 1000 * 64);

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

191

context->bw_ctx.bw.dcn.clk.dispclk_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

192

context->bw_ctx.bw.dcn.clk.dppclk_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

193

context->bw_ctx.bw.dcn.clk.dcfclk_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

194

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

195

context->bw_ctx.bw.dcn.clk.fclk_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

196

context->bw_ctx.bw.dcn.clk.socclk_khz);

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

199

context->bw_ctx.bw.dcn.clk.dispclk_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

200

context->bw_ctx.bw.dcn.clk.dppclk_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

201

context->bw_ctx.bw.dcn.clk.dcfclk_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

202

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

203

context->bw_ctx.bw.dcn.clk.fclk_khz,

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

204

context->bw_ctx.bw.dcn.clk.socclk_khz);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

656

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

478

dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

479

dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

480

dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

481

dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

482

dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

483

dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1157

context->bw_ctx.bw.dcn.clk.fclk_khz = (int)(bw_consumed * 1000000 /

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1160

context->bw_ctx.bw.dcn.clk.fclk_khz = (int)(bw_consumed * 1000000 / 32);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1162

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (int)(v->dcf_clk_deep_sleep * 1000);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1163

context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1165

context->bw_ctx.bw.dcn.clk.dispclk_khz = (int)(v->dispclk * 1000);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1167

context->bw_ctx.bw.dcn.clk.dispclk_khz = (int)(dc->dcn_soc->max_dispclk_vmax0p9 * 1000);

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1169

if (context->bw_ctx.bw.dcn.clk.dispclk_khz <

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1171

context->bw_ctx.bw.dcn.clk.dispclk_khz =

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1175

context->bw_ctx.bw.dcn.clk.dppclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz /

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1177

context->bw_ctx.bw.dcn.clk.phyclk_khz = v->phyclk_per_state[v->voltage_level];

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1180

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz =

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1184

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz =

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1188

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz =

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1192

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1153

context->bw_ctx.bw.dcn.clk.dispclk_khz = context->bw_ctx.dml.vba.DISPCLK * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1154

context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1155

context->bw_ctx.bw.dcn.clk.socclk_khz = context->bw_ctx.dml.vba.SOCCLK * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1156

context->bw_ctx.bw.dcn.clk.dramclk_khz = context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1158

if (dc->debug.min_dram_clk_khz > context->bw_ctx.bw.dcn.clk.dramclk_khz)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1159

context->bw_ctx.bw.dcn.clk.dramclk_khz = dc->debug.min_dram_clk_khz;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1161

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = context->bw_ctx.dml.vba.DCFCLKDeepSleep * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1162

context->bw_ctx.bw.dcn.clk.fclk_khz = context->bw_ctx.dml.vba.FabricClock * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1163

context->bw_ctx.bw.dcn.clk.p_state_change_support =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1170

context->bw_ctx.bw.dcn.clk.p_state_change_support |= context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1172

context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1174

context->bw_ctx.bw.dcn.clk.dtbclk_en = is_dtbclk_required(dc, context);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1176

if (context->bw_ctx.bw.dcn.clk.dispclk_khz < dc->debug.min_disp_clk_khz)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1177

context->bw_ctx.bw.dcn.clk.dispclk_khz = dc->debug.min_disp_clk_khz;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1198

if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000)

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1199

context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1213

context->bw_ctx.bw.dcn.clk.p_state_change_support = true;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1216

context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1217

context->bw_ctx.bw.dcn.clk.bw_dispclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1218

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel].dppclk_mhz * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1219

context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel].dispclk_mhz * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1241

context->bw_ctx.bw.dcn.clk.p_state_change_support,

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1249

context->bw_ctx.bw.dcn.clk.zstate_support = decide_zstate_support(dc, context);

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2102

full_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2106

context->bw_ctx.bw.dcn.clk.p_state_change_support = full_pstate_supported;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2115

dummy_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2118

context->bw_ctx.bw.dcn.clk.p_state_change_support = false;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

295

if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching ||

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

318

context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

329

context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching =

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

332

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

423

if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

498

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching &&

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

518

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching)

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

502

context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

561

context->bw_ctx.bw.dcn.clk.p_state_change_support =

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

565

context->bw_ctx.bw.dcn.clk.socclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

566

context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

567

context->bw_ctx.bw.dcn.clk.dcfclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

568

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

569

context->bw_ctx.bw.dcn.clk.dramclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

570

context->bw_ctx.bw.dcn.clk.fclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

571

context->bw_ctx.bw.dcn.clk.p_state_change_support = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1659

context->bw_ctx.bw.dcn.clk.dispclk_khz = context->bw_ctx.dml.vba.DISPCLK * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1660

context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1661

context->bw_ctx.bw.dcn.clk.socclk_khz = context->bw_ctx.dml.vba.SOCCLK * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1662

context->bw_ctx.bw.dcn.clk.dramclk_khz = context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1663

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = context->bw_ctx.dml.vba.DCFCLKDeepSleep * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1664

context->bw_ctx.bw.dcn.clk.fclk_khz = context->bw_ctx.dml.vba.FabricClock * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1665

context->bw_ctx.bw.dcn.clk.p_state_change_support =

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1672

context->bw_ctx.bw.dcn.clk.p_state_change_support |= context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1674

context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1675

context->bw_ctx.bw.dcn.clk.dtbclk_en = is_dtbclk_required(dc, context);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1676

context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = context->bw_ctx.dml.vba.DTBCLKPerState[vlevel] * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1678

context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = false;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1680

context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1685

if (context->bw_ctx.bw.dcn.clk.dispclk_khz < dc->debug.min_disp_clk_khz)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1686

context->bw_ctx.bw.dcn.clk.dispclk_khz = dc->debug.min_disp_clk_khz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1724

if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000)

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1725

context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1768

context->bw_ctx.bw.dcn.clk.socclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1769

context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1770

context->bw_ctx.bw.dcn.clk.dcfclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1771

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1772

context->bw_ctx.bw.dcn.clk.dramclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1773

context->bw_ctx.bw.dcn.clk.fclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1774

context->bw_ctx.bw.dcn.clk.p_state_change_support = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1775

context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1778

context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1779

context->bw_ctx.bw.dcn.clk.bw_dispclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1780

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel].dppclk_mhz

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1782

context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel].dispclk_mhz

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1785

context->bw_ctx.bw.dcn.clk.num_ways = dcn32_helper_calculate_num_ways_for_subvp(dc, context);

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2355

context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2372

context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2375

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2407

context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2504

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2523

if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching && !subvp_in_use) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3603

if ((context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dcn32_subvp_in_use(dc, context)) &&

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

3610

context->bw_ctx.bw.dcn.clk.dramclk_khz = context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16;

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

619

context->bw_ctx.bw.dcn.clk.zstate_support = support;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

638

context->bw_ctx.bw.dcn.clk.zstate_support = support;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

807

context->bw_ctx.bw.dcn.clk.dispclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dispclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

808

context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.dcfclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

809

context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.uclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

810

context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.fclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

811

context->bw_ctx.bw.dcn.clk.idle_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.idle.uclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

812

context->bw_ctx.bw.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.idle.fclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

813

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.deepsleep_dcfclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

814

context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = in_ctx->v21.mode_programming.programming->fclk_pstate_supported;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

815

context->bw_ctx.bw.dcn.clk.p_state_change_support = in_ctx->v21.mode_programming.programming->uclk_pstate_supported;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

816

context->bw_ctx.bw.dcn.clk.dtbclk_en = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz > 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

817

context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

818

context->bw_ctx.bw.dcn.clk.socclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.socclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

819

context->bw_ctx.bw.dcn.clk.subvp_prefetch_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.svp_prefetch_no_throttle.uclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

820

context->bw_ctx.bw.dcn.clk.subvp_prefetch_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.svp_prefetch_no_throttle.fclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

821

context->bw_ctx.bw.dcn.clk.stutter_efficiency.base_efficiency = in_ctx->v21.mode_programming.programming->stutter.base_percent_efficiency;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

822

context->bw_ctx.bw.dcn.clk.stutter_efficiency.low_power_efficiency = in_ctx->v21.mode_programming.programming->stutter.low_power_percent_efficiency;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

231

if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipe_ctx->plane_res.bw.dppclk_khz)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

232

context->bw_ctx.bw.dcn.clk.dppclk_khz = pipe_ctx->plane_res.bw.dppclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

511

context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = context->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

151

context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

152

context->bw_ctx.bw.dcn.clk.bw_dispclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

154

context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz =

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

157

context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.dispclk.clk_values_khz[0] * 1000;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

161

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz =

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

164

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.dppclk.clk_values_khz[0] * 1000;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

169

context->bw_ctx.bw.dcn.clk.num_ways = dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, context->bw_ctx.bw.dcn.mall_subvp_size_bytes);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

171

context->bw_ctx.bw.dcn.clk.num_ways = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_wrapper.c

98

context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

184

context->bw_ctx.bw.dcn.clk.dispclk_khz = out_clks->dispclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

185

context->bw_ctx.bw.dcn.clk.dcfclk_khz = out_clks->dcfclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

186

context->bw_ctx.bw.dcn.clk.dramclk_khz = out_clks->uclk_mts / 16;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

187

context->bw_ctx.bw.dcn.clk.fclk_khz = out_clks->fclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

188

context->bw_ctx.bw.dcn.clk.phyclk_khz = out_clks->phyclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

189

context->bw_ctx.bw.dcn.clk.socclk_khz = out_clks->socclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

190

context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = out_clks->ref_dtbclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

191

context->bw_ctx.bw.dcn.clk.p_state_change_support = out_clks->p_state_supported;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

285

context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = (unsigned int)in_ctx->v20.dml_core_ctx.mp.DCFCLKDeepSleep * 1000;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

286

context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

289

context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

291

context->bw_ctx.bw.dcn.clk.fclk_p_state_change_support = true;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

293

if (context->bw_ctx.bw.dcn.clk.dispclk_khz < dc->debug.min_disp_clk_khz)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

294

context->bw_ctx.bw.dcn.clk.dispclk_khz = dc->debug.min_disp_clk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

336

if (context->bw_ctx.bw.dcn.clk.dppclk_khz < context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_res.bw.dppclk_khz)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

337

context->bw_ctx.bw.dcn.clk.dppclk_khz = context->res_ctx.pipe_ctx[dc_pipe_ctx_index].plane_res.bw.dppclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

361

context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

362

context->bw_ctx.bw.dcn.clk.bw_dispclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

364

context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx->v20.dml_core_ctx.states.state_array[in_ctx->v20.scratch.mode_support_params.out_lowest_state_idx].dppclk_mhz

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

366

context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = in_ctx->v20.dml_core_ctx.states.state_array[in_ctx->v20.scratch.mode_support_params.out_lowest_state_idx].dispclk_mhz

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

370

context->bw_ctx.bw.dcn.clk.bw_dispclk_khz = context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

371

context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz ;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

420

context->bw_ctx.bw.dcn.clk.dtbclk_en = false;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

478

context->bw_ctx.bw.dcn.clk.dtbclk_en = is_dtbclk_required(in_dc, context);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1777

dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz = dc->clk_mgr->clks.dispclk_khz;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1778

dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz = dc->clk_mgr->clks.dppclk_khz;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3021

if (context->bw_ctx.bw.dcn.clk.dispclk_khz <

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3026

context->bw_ctx.bw.dcn.clk.dppclk_khz <=

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3346

context->bw_ctx.bw.dcn.clk.phyclk_khz = 0;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3384

context->bw_ctx.bw.dcn.clk.phyclk_khz = 0;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4065

struct dc_clocks *current_clocks = &context->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

742

dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

743

dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

744

dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

745

dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

746

dc->current_state->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

747

dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

748

dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2438

context->bw_ctx.bw.dcn.clk.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2445

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2448

context->bw_ctx.bw.dcn.clk.p_state_change_support = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2458

if (context->bw_ctx.bw.dcn.clk.zstate_support == DCN_ZSTATE_SUPPORT_ALLOW &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1172

dc->current_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) &&

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1193

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching && !dc->clk_mgr->clks.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1195

context->bw_ctx.bw.dcn.clk.p_state_change_support = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1200

context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1799

bool p_state_change_support = context->bw_ctx.bw.dcn.clk.p_state_change_support;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1803

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1805

context->bw_ctx.bw.dcn.clk.p_state_change_support = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1810

context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1815

if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1818

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switching) {

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1822

context->bw_ctx.bw.dcn.clk.p_state_change_support = p_state_change_support;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

758

struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1385

bool p_state_change_support = context->bw_ctx.bw.dcn.clk.p_state_change_support;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1391

context->bw_ctx.bw.dcn.clk.p_state_change_support = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1396

context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1432

if (p_state_change_support != context->bw_ctx.bw.dcn.clk.p_state_change_support) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1435

context->bw_ctx.bw.dcn.clk.p_state_change_support = p_state_change_support;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1465

context->bw_ctx.bw.dcn.clk.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1476

if (context->bw_ctx.bw.dcn.clk.zstate_support == DCN_ZSTATE_SUPPORT_ALLOW) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1802

dc->current_state->bw_ctx.bw.dcn.clk.p_state_change_support = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

60

struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

563

struct dc_clocks clk;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

930

unsigned int clk;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

942

clk = 300000;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

945

eng_clks.data[i].clocks_in_khz = clk;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

946

clk += 100000;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

975

clk = 250000;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

979

mem_clks.data[i].clocks_in_khz = clk;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

981

clk += 500000;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2010

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching_shut_down)

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1846

return !context->bw_ctx.bw.dcn.clk.p_state_change_support;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1794

context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2053

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || subvp_in_use)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

533

if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching_shut_down)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

778

if (dcn32_subvp_in_use(dc, context) && context->bw_ctx.bw.dcn.clk.dcfclk_khz <= MIN_SUBVP_DCFCLK_KHZ)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

779

context->bw_ctx.bw.dcn.clk.dcfclk_khz = MIN_SUBVP_DCFCLK_KHZ;

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1795

int uclk_mhz = context->bw_ctx.bw.dcn.clk.dramclk_khz / 1000;

drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h

2867

struct set_pixel_clock_parameter_v1_7 clk; /**< payload */

drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h

117

u32 clk;

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1043

pi->samu_level[i].Frequency = cpu_to_be32(table->entries[i].clk);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1047

(u8)kv_get_clk_bypass(adev, table->entries[i].clk);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1050

table->entries[i].clk, false, &dividers);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1105

pi->acp_level[i].Frequency = cpu_to_be32(table->entries[i].clk);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1109

table->entries[i].clk, false, &dividers);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1159

if (kv_get_clock_difference(table->entries[i].clk, 40000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1161

else if (kv_get_clock_difference(table->entries[i].clk, 30000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1163

else if (kv_get_clock_difference(table->entries[i].clk, 26600) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1165

else if (kv_get_clock_difference(table->entries[i].clk, 20000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1167

else if (kv_get_clock_difference(table->entries[i].clk, 10000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1774

if ((table->entries[i].clk >= new_ps->levels[0].sclk) ||

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1782

if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1788

if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) >

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

1789

(table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

2227

if (stable_p_state_sclk >= table->entries[i].clk) {

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

2228

stable_p_state_sclk = table->entries[i].clk;

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

2234

stable_p_state_sclk = table->entries[0].clk;

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

2257

ps->levels[i].sclk = table->entries[limit].clk;

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

2423

kv_set_divider_value(adev, i, table->entries[i].clk);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

797

if (table->entries[i].clk == pi->boot_pl.sclk)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

866

static u32 kv_get_clk_bypass(struct amdgpu_device *adev, u32 clk)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

872

if (kv_get_clock_difference(clk, 40000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

874

else if (kv_get_clock_difference(clk, 30000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

876

else if (kv_get_clock_difference(clk, 20000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

878

else if (kv_get_clock_difference(clk, 15000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

880

else if (kv_get_clock_difference(clk, 10000) < 200)

drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c

173

amdgpu_table->entries[i].clk = le16_to_cpu(entry->usClockLow) |

drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c

491

adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk =

drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c

545

adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk =

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3272

if (clock < table->entries[i].clk)

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3273

clock = table->entries[i].clk;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3287

if (clock <= table->entries[i].clk) {

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5693

adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) {

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7452

adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7454

adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7456

adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7458

adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

162

u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

164

if (!(rst & RST_REG) && !(clk & CK_DISABLE))

drivers/gpu/drm/amd/pm/powerplay/hwmgr/hwmgr_ppt.h

32

uint32_t clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c

759

cpu_to_le32(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[entry_id].clk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0.c

334

table->values[i] = (uint32_t)dep_record->clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0.c

391

mclk_table_record->clk = le32_to_cpu(mclk_dep_record->ulMclk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0.c

433

sclk_table_record->clk = le32_to_cpu(sclk_dep_record->ulSclk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0.c

462

sclk_table_record->clk = le32_to_cpu(sclk_dep_record->ulSclk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c

392

dep_table->entries[i].clk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/processpptables.c

418

clock_table->values[i] = (unsigned long)table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1010

mclk_table->entries[low].clk/100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1015

mclk_table->entries[high].clk/100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1069

mclk_table->entries[i].clk / 100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1070

((mclk_table->entries[i].clk / 100) == now) ?

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1132

level->memory_clock = data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1136

data->clock_vol_info.vdd_dep_on_fclk->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1219

if (pclk_vol_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1221

pclk_vol_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1224

pclk_vol_table->entries[i].clk) :

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1273

if (pclk_vol_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

1274

clocks->data[clocks->num_levels].clocks_in_khz = pclk_vol_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

144

table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

146

table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

148

table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_2;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

150

table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_3;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

152

table_clk_vlt->entries[4].clk = PP_DAL_POWERLEVEL_4;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

154

table_clk_vlt->entries[5].clk = PP_DAL_POWERLEVEL_5;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

156

table_clk_vlt->entries[6].clk = PP_DAL_POWERLEVEL_6;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

158

table_clk_vlt->entries[7].clk = PP_DAL_POWERLEVEL_7;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

482

ptable->entries[i].clk = pclk_dependency_table->Freq * 100;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

785

(data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk / 100) :

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

791

data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk / 100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

804

data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk / 100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

808

data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk / 100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

861

return data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

864

data->clock_vol_info.vdd_dep_on_fclk->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.h

188

uint32_t clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1525

if (tmp_sclk >= vddc_dependency_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1526

hwmgr->pstate_sclk = vddc_dependency_on_sclk->entries[count].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1531

hwmgr->pstate_sclk = vddc_dependency_on_sclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1534

vddc_dependency_on_sclk->entries[vddc_dependency_on_sclk->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1542

if (tmp_sclk >= vdd_dep_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1543

hwmgr->pstate_sclk = vdd_dep_on_sclk->entries[count].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1548

hwmgr->pstate_sclk = vdd_dep_on_sclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1551

vdd_dep_on_sclk->entries[vdd_dep_on_sclk->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2074

if (sclk_table->entries[j].clk == sclk &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2108

if (sclk_table->entries[j].clk == sclk &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2471

allowed_sclk_vdd_table->entries[allowed_sclk_vdd_table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2473

allowed_mclk_vdd_table->entries[allowed_mclk_vdd_table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2867

allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2869

allowed_mclk_vddc_table->entries[allowed_mclk_vddc_table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3197

if (tmp_sclk >= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3212

if (tmp_sclk >= table_info->vdd_dep_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3367

table_info->vdd_dep_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3369

table_info->vdd_dep_on_sclk->entries[count].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3375

stable_pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3712

if (dep_mclk_table->entries[0].clk !=

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3860

if (dep_mclk_table->entries[0].clk !=

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5210

clocks->clock[i] = dep_sclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5215

clocks->clock[i] = sclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5222

static uint32_t smu7_get_mem_latency(struct pp_hwmgr *hwmgr, uint32_t clk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5226

if (clk >= MEM_FREQ_LOW_LATENCY && clk < MEM_FREQ_HIGH_LATENCY)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5228

else if (clk >= MEM_FREQ_HIGH_LATENCY)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5247

clocks->clock[i] = dep_mclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5249

dep_mclk_table->entries[i].clk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5255

clocks->clock[i] = mclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5289

if (dep_sclk_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5291

dep_sclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5312

if (dep_mclk_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5314

dep_mclk_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5316

dep_mclk_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5319

smu7_get_mem_latency(hwmgr, dep_mclk_table->entries[i].clk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5375

if (dep_sclk_table->entries[i].clk >= watermarks->wm_clk_ranges[k].wm_min_eng_clk_in_khz / 10 &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5376

dep_sclk_table->entries[i].clk < watermarks->wm_clk_ranges[k].wm_max_eng_clk_in_khz / 10 &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5377

dep_mclk_table->entries[i].clk >= watermarks->wm_clk_ranges[k].wm_min_mem_clk_in_khz / 10 &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5378

dep_mclk_table->entries[i].clk < watermarks->wm_clk_ranges[k].wm_max_mem_clk_in_khz / 10) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5479

uint32_t clk,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5492

if (data->golden_dpm_table.sclk_table.dpm_levels[0].value > clk ||

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5493

hwmgr->platform_descriptor.overdriveLimit.engineClock < clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5500

if (data->golden_dpm_table.mclk_table.dpm_levels[0].value > clk ||

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5501

hwmgr->platform_descriptor.overdriveLimit.memoryClock < clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5569

podn_vdd_dep_in_backend->entries[input_level].clk = input_clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

808

allowed_vdd_sclk_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

810

allowed_vdd_sclk_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

822

allowed_vdd_mclk_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

824

allowed_vdd_mclk_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

901

dep_sclk_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

904

dep_sclk_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

912

hwmgr->platform_descriptor.overdriveLimit.engineClock = dep_sclk_table->entries[i-1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

918

dep_mclk_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

920

dep_mclk_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

928

hwmgr->platform_descriptor.overdriveLimit.memoryClock = dep_mclk_table->entries[i-1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1032

hwmgr->pstate_sclk = table->entries[0].clk / 100;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1035

hwmgr->pstate_sclk_peak = table->entries[table->count - 1].clk / 100;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

110

if (clock <= table->entries[i].clk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

118

if (clock >= table->entries[i].clk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1192

data->sclk_dpm.soft_min_clk = table->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1193

data->sclk_dpm.hard_min_clk = table->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1198

clock = table->entries[level].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1200

clock = table->entries[table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1401

smu8_ps->levels[index].engineClock = table->entries[clock_info_index].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1538

info->level = table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1586

sclk_table->entries[i].clk / 100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1679

clocks->clock[i] = table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1707

clocks->engine_max_clock = table->entries[level].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1709

clocks->engine_max_clock = table->entries[table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1764

sclk = table->entries[sclk_index].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

265

table->sclk = dep_table->entries[dep_table->count-1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

287

table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

289

table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

291

table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_2;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

293

table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_3;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

295

table_clk_vlt->entries[4].clk = PP_DAL_POWERLEVEL_4;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

297

table_clk_vlt->entries[5].clk = PP_DAL_POWERLEVEL_5;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

299

table_clk_vlt->entries[6].clk = PP_DAL_POWERLEVEL_6;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

301

table_clk_vlt->entries[7].clk = PP_DAL_POWERLEVEL_7;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

481

(i < vddc_table->count) ? vddc_table->entries[i].clk : 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

563

data->sclk_dpm.soft_min_clk = table->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

564

data->sclk_dpm.hard_min_clk = table->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

569

clock = table->entries[level].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

571

clock = table->entries[table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

702

data->sclk_dpm.soft_min_clk = table->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

706

data->sclk_dpm.soft_max_clk = table->entries[level].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

708

data->sclk_dpm.soft_max_clk = table->entries[table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

482

*sclk = table_info->vdd_dep_on_sclk->entries[entry_id].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

505

table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_ULTRALOW;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

511

table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_LOW;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

517

table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_NOMINAL;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

523

table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_PERFORMANCE;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

559

if (dal_power_level == table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

698

dep_table->entries[i].clk = allowed_dep_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1249

dep_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1251

dep_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1639

if (dep_on_sclk->entries[i].clk == gfx_clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1694

if (dep_on_soc->entries[i].clk >= soc_clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1700

if (dep_on_soc->entries[i].clk == soc_clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1843

if (dep_on_mclk->entries[i].clk == mem_clock)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1929

uint16_t clk = 0, vddc = 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1954

clk = (uint16_t)(dep_table->entries[i].clk / 100);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1959

cpu_to_le16(clk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1966

cpu_to_le16(clk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3032

hwmgr->pstate_sclk = table_info->vdd_dep_on_sclk->entries[VEGA10_UMD_PSTATE_GFXCLK_LEVEL].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3033

hwmgr->pstate_mclk = table_info->vdd_dep_on_mclk->entries[VEGA10_UMD_PSTATE_MCLK_LEVEL].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3035

hwmgr->pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3036

hwmgr->pstate_mclk = table_info->vdd_dep_on_mclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3039

hwmgr->pstate_sclk_peak = table_info->vdd_dep_on_sclk->entries[table_info->vdd_dep_on_sclk->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3040

hwmgr->pstate_mclk_peak = table_info->vdd_dep_on_mclk->entries[table_info->vdd_dep_on_mclk->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3346

table_info->vdd_dep_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3348

table_info->vdd_dep_on_sclk->entries[count].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3354

stable_pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

347

od_table[2]->entries[i].clk = hwmgr->platform_descriptor.overdriveLimit.memoryClock > od_table[2]->entries[i].clk ?

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

349

od_table[2]->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3495

dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3501

dpm_table->mem_table.dpm_levels[count].value = odn_clk_table->entries[count].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4088

if(mclk_table->entries[i].clk >= frequency)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4414

if (dep_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4416

dep_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4435

if (dep_table->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4438

dep_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4440

dep_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4459

clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4475

clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4535

clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4791

i, podn_vdd_dep->entries[i].clk / 100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4802

i, podn_vdd_dep->entries[i].clk/100,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5279

uint32_t clk,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5293

if (golden_table->dpm_levels[0].value > clk ||

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5294

hwmgr->platform_descriptor.overdriveLimit.engineClock < clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5302

if (golden_table->dpm_levels[0].value > clk ||

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5303

hwmgr->platform_descriptor.overdriveLimit.memoryClock < clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5417

dep_table->entries[i].clk < podn_vdd_dep->entries[podn_vdd_dep->count-1].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5420

(dep_table->entries[i].clk < podn_vdd_dep->entries[podn_vdd_dep->count - 1].clk); i++) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5421

podn_vdd_dep_on_socclk->entries[i].clk = podn_vdd_dep->entries[podn_vdd_dep->count-1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5422

dpm_table->dpm_levels[i].value = podn_vdd_dep_on_socclk->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5426

dpm_table->dpm_levels[i].value = dep_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5429

podn_vdd_dep_on_socclk->entries[i].clk = dep_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5432

if (podn_vdd_dep_on_socclk->entries[podn_vdd_dep_on_socclk->count - 1].clk <

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5433

podn_vdd_dep->entries[podn_vdd_dep->count - 1].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5435

podn_vdd_dep_on_socclk->entries[podn_vdd_dep_on_socclk->count - 1].clk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5436

podn_vdd_dep->entries[podn_vdd_dep->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5438

podn_vdd_dep->entries[podn_vdd_dep->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

548

*socclk = table_info->vdd_dep_on_socclk->entries[entry_id].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5506

podn_vdd_dep_table->entries[input_level].clk = input_clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

580

if (socclk_table->entries[j].clk == sclk &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

795

allowed_sclk_vdd_table->entries[allowed_sclk_vdd_table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

797

allowed_mclk_vdd_table->entries[allowed_mclk_vdd_table->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

586

clk_table->entries[i].clk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

620

mclk_table->entries[i].clk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

654

clk_table->entries[i].clk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

669

clk_table->entries[i].clk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

715

clk_table->entries[i].clk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

767

clk_table->entries[i].clk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

773

clk_table->entries[i].clk = 90000;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

862

table->values[i] = (uint32_t)clk_volt_pp_table->entries[i].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

614

uint32_t i, num_of_levels, clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

624

ret = vega12_get_dpm_frequency_by_index(hwmgr, clk_id, i, &clk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

628

dpm_table->dpm_levels[i].value = clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

553

PPCLK_e clk_id, uint32_t index, uint32_t *clk)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

560

clk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

572

uint32_t i, num_of_levels, clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

582

ret = vega20_get_dpm_frequency_by_index(hwmgr, clk_id, i, &clk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

586

dpm_table->dpm_levels[i].value = clk;

drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h

98

uint32_t clk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1360

if (mclk <= hwmgr->dyn_state.mvdd_dependency_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1863

if (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[level].clk

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1873

if (hwmgr->dyn_state.vddc_dependency_on_mclk->entries[level].clk

drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

287

if (allowed_clock_voltage_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1282

if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1641

if (table_info->vdd_dep_on_sclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1650

if (table_info->vdd_dep_on_mclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1704

(sclk_table->entries[i].clk/100) / 10000 + 3571 + 75 - ro) * 1000 /

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1705

(4026 - (13924 * (sclk_table->entries[i].clk/100) / 10000)));

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1707

(sclk_table->entries[i].clk/100) / 10000 + 3320 + 45 - ro) * 1000 /

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1708

(3664 - (11454 * (sclk_table->entries[i].clk/100) / 10000)));

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

368

if (dep_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1405

if (mclk <= hwmgr->dyn_state.mvdd_dependency_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1829

if (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[level].clk

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1839

if (hwmgr->dyn_state.vddc_dependency_on_mclk->entries[level].clk

drivers/gpu/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

518

if (allowed_clock_voltage_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1263

if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1628

if (table_info->vdd_dep_on_sclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1637

if (table_info->vdd_dep_on_mclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1675

volt_without_cks = (uint32_t)((2753594000U + (sclk_table->entries[i].clk/100) * 136418 - (ro - 70) * 1000000) / \

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1676

(2424180 - (sclk_table->entries[i].clk/100) * 1132925/1000));

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1677

volt_with_cks = (uint32_t)((2797202000U + sclk_table->entries[i].clk/100 * 3232 - (ro - 65) * 1000000) / \

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1678

(2522480 - sclk_table->entries[i].clk/100 * 115764/100));

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1680

volt_without_cks = (uint32_t)((2416794800U + (sclk_table->entries[i].clk/100) * 1476925/10 - (ro - 50) * 1000000) / \

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1681

(2625416 - (sclk_table->entries[i].clk/100) * (12586807/10000)));

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1682

volt_with_cks = (uint32_t)((2999656000U - sclk_table->entries[i].clk/100 * 392803 - (ro - 44) * 1000000) / \

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1683

(3422454 - sclk_table->entries[i].clk/100 * (18886376/10000)));

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

369

if (dep_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1154

if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1625

(sclk_table->entries[i].clk/100) / 10000) * 1000 /

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1626

(8730 - (5301 * (sclk_table->entries[i].clk/100) / 1000)));

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1628

(sclk_table->entries[i].clk/100) / 100000) * 1000 /

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1629

(6146 - (3193 * (sclk_table->entries[i].clk/100) / 1000)));

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1632

(sclk_table->entries[i].clk/100) / 10000 + 3571 + 75 - ro) * 1000 /

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1633

(4026 - (13924 * (sclk_table->entries[i].clk/100) / 10000)));

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1635

(sclk_table->entries[i].clk/100) / 10000 + 3320 + 45 - ro) * 1000 /

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1636

(3664 - (11454 * (sclk_table->entries[i].clk/100) / 10000)));

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

261

if (allowed_clock_voltage_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1096

if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1412

if (table_info->vdd_dep_on_sclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1421

if (table_info->vdd_dep_on_mclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1512

volt_without_cks = (uint32_t)((2753594000U + (sclk_table->entries[i].clk/100) *

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1514

(2424180 - (sclk_table->entries[i].clk/100) * 1132925/1000));

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1515

volt_with_cks = (uint32_t)((2797202000U + sclk_table->entries[i].clk/100 *

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1517

(2522480 - sclk_table->entries[i].clk/100 * 115764/100));

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

616

if (dep_table->entries[i].clk >= clock) {

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

3389

static int smu_set_deep_sleep_dcefclk(void *handle, uint32_t clk)

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

3396

return smu_set_min_dcef_deep_sleep(smu, clk);

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

463

static void smu_set_user_clk_dependencies(struct smu_context *smu, enum smu_clk_type clk)

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

468

if (clk == SMU_MCLK) {

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

471

} else if (clk == SMU_FCLK) {

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

478

} else if (clk == SMU_SOCCLK) {

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

1281

int (*set_min_dcef_deep_sleep)(struct smu_context *smu, uint32_t clk);

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

1731

#define CLK_MAP(clk, index) \

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

1732

[SMU_##clk] = {1, (index)}

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h

183

int smu_v11_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

2030

uint32_t clk;

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

2045

&clk);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

2051

single_dpm_table->dpm_levels[i].value = clk;

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

673

int smu_v11_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

678

SMU_MSG_SetMinDeepSleepDcefclk, clk, NULL);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1908

uint32_t clk;

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1935

&clk);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1941

single_dpm_table->dpm_levels[i].value = clk;

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

1520

uint32_t clk;

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

1545

&clk);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

1551

single_dpm_table->dpm_levels[i].value = clk;

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

1410

uint32_t clk;

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

1433

&clk);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

1439

single_dpm_table->dpm_levels[i].value = clk;

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

1443

single_dpm_table->min = clk;

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

1445

single_dpm_table->max = clk;

drivers/gpu/drm/amd/pm/swsmu/smu_internal.h

44

#define smu_set_min_dcef_deep_sleep(smu, clk) smu_ppt_funcs(set_min_dcef_deep_sleep, 0, smu, clk)

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

111

struct clk *clk;

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

113

clk = of_clk_get_by_name(np, "pxclk");

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

114

if (IS_ERR(clk)) {

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

116

return PTR_ERR(clk);

drivers/gpu/drm/arm/display/komeda/komeda_dev.c

118

pipe->pxlclk = clk;

drivers/gpu/drm/arm/display/komeda/komeda_dev.h

172

struct clk *aclk;

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

393

struct clk *pxlclk;

drivers/gpu/drm/arm/hdlcd_crtc.c

174

clk_set_rate(hdlcd->clk, m->crtc_clock * 1000);

drivers/gpu/drm/arm/hdlcd_crtc.c

182

clk_prepare_enable(hdlcd->clk);

drivers/gpu/drm/arm/hdlcd_crtc.c

195

clk_disable_unprepare(hdlcd->clk);

drivers/gpu/drm/arm/hdlcd_crtc.c

204

rate = clk_round_rate(hdlcd->clk, clk_rate);

drivers/gpu/drm/arm/hdlcd_drv.c

108

hdlcd->clk = devm_clk_get(drm->dev, "pxlclk");

drivers/gpu/drm/arm/hdlcd_drv.c

109

if (IS_ERR(hdlcd->clk))

drivers/gpu/drm/arm/hdlcd_drv.c

110

return PTR_ERR(hdlcd->clk);

drivers/gpu/drm/arm/hdlcd_drv.c

214

unsigned long clkrate = clk_get_rate(hdlcd->clk);

drivers/gpu/drm/arm/hdlcd_drv.h

12

struct clk *clk;

drivers/gpu/drm/arm/malidp_hw.h

16

struct clk;

drivers/gpu/drm/arm/malidp_hw.h

234

struct clk *pclk;

drivers/gpu/drm/arm/malidp_hw.h

236

struct clk *aclk;

drivers/gpu/drm/arm/malidp_hw.h

238

struct clk *mclk;

drivers/gpu/drm/arm/malidp_hw.h

240

struct clk *pxlclk;

drivers/gpu/drm/armada/armada_510.c

115

ret = clk_prepare_enable(res.clk);

drivers/gpu/drm/armada/armada_510.c

120

clk_set_rate(res.clk, res.desired_clk_hz);

drivers/gpu/drm/armada/armada_510.c

125

v->sel_clk = res.clk;

drivers/gpu/drm/armada/armada_510.c

126

swap(dcrtc->clk, res.clk);

drivers/gpu/drm/armada/armada_510.c

129

clk_disable_unprepare(res.clk);

drivers/gpu/drm/armada/armada_510.c

136

if (dcrtc->clk) {

drivers/gpu/drm/armada/armada_510.c

137

clk_disable_unprepare(dcrtc->clk);

drivers/gpu/drm/armada/armada_510.c

138

dcrtc->clk = NULL;

drivers/gpu/drm/armada/armada_510.c

147

if (!dcrtc->clk && v->sel_clk) {

drivers/gpu/drm/armada/armada_510.c

149

dcrtc->clk = v->sel_clk;

drivers/gpu/drm/armada/armada_510.c

16

struct clk *clks[4];

drivers/gpu/drm/armada/armada_510.c

17

struct clk *sel_clk;

drivers/gpu/drm/armada/armada_510.c

23

struct clk *clk;

drivers/gpu/drm/armada/armada_510.c

49

clk = devm_clk_get(dev, s);

drivers/gpu/drm/armada/armada_510.c

50

if (IS_ERR(clk))

drivers/gpu/drm/armada/armada_510.c

51

return PTR_ERR(clk) == -ENOENT ? -EPROBE_DEFER :

drivers/gpu/drm/armada/armada_510.c

52

PTR_ERR(clk);

drivers/gpu/drm/armada/armada_510.c

53

v->clks[idx] = clk;

drivers/gpu/drm/armada/armada_510.c

56

clk = devm_clk_get(dev, "ext_ref_clk1");

drivers/gpu/drm/armada/armada_510.c

57

if (IS_ERR(clk))

drivers/gpu/drm/armada/armada_510.c

58

return PTR_ERR(clk) == -ENOENT ? -EPROBE_DEFER :

drivers/gpu/drm/armada/armada_510.c

59

PTR_ERR(clk);

drivers/gpu/drm/armada/armada_510.c

61

v->clks[1] = clk;

drivers/gpu/drm/armada/armada_crtc.c

836

struct clk *clks[], size_t num_clks,

drivers/gpu/drm/armada/armada_crtc.c

844

struct clk *clk;

drivers/gpu/drm/armada/armada_crtc.c

852

clk = clks[i];

drivers/gpu/drm/armada/armada_crtc.c

853

if (!clk)

drivers/gpu/drm/armada/armada_crtc.c

857

real_clk_hz = clk_round_rate(clk, desired_hz);

drivers/gpu/drm/armada/armada_crtc.c

860

real_clk_hz = clk_get_rate(clk);

drivers/gpu/drm/armada/armada_crtc.c

904

res->clk = clk;

drivers/gpu/drm/armada/armada_crtc.h

42

struct clk *clk;

drivers/gpu/drm/armada/armada_crtc.h

84

struct clk *clk;

drivers/gpu/drm/armada/armada_crtc.h

91

struct clk *clks[], size_t num_clks,

drivers/gpu/drm/armada/armada_drm.h

17

struct clk;

drivers/gpu/drm/aspeed/aspeed_gfx.h

10

struct clk *clk;

drivers/gpu/drm/aspeed/aspeed_gfx_drv.c

193

priv->clk = devm_clk_get(drm->dev, NULL);

drivers/gpu/drm/aspeed/aspeed_gfx_drv.c

194

if (IS_ERR(priv->clk)) {

drivers/gpu/drm/aspeed/aspeed_gfx_drv.c

197

return PTR_ERR(priv->clk);

drivers/gpu/drm/aspeed/aspeed_gfx_drv.c

199

clk_prepare_enable(priv->clk);

drivers/gpu/drm/bridge/adv7511/adv7511.h

394

struct clk *cec_clk;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.h

160

struct clk *clock;

drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h

18

struct clk;

drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h

74

struct clk *dsi_p_clk;

drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h

76

struct clk *dsi_sys_clk;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

2391

struct clk *clk;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

2400

clk = devm_clk_get_enabled(dev, NULL);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

2401

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

2402

dev_err(dev, "couldn't get and enable clk: %ld\n", PTR_ERR(clk));

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

2403

return PTR_ERR(clk);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

2406

mhdp->clk = clk;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

2458

rate = clk_get_rate(clk);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h

22

struct clk;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h

360

struct clk *clk;

drivers/gpu/drm/bridge/chipone-icn6211.c

155

struct clk *refclk;

drivers/gpu/drm/bridge/fsl-ldb.c

180

clk_set_rate(fsl_ldb->clk, requested_link_freq);

drivers/gpu/drm/bridge/fsl-ldb.c

182

configured_link_freq = clk_get_rate(fsl_ldb->clk);

drivers/gpu/drm/bridge/fsl-ldb.c

186

fsl_ldb->clk, configured_link_freq, requested_link_freq);

drivers/gpu/drm/bridge/fsl-ldb.c

188

clk_prepare_enable(fsl_ldb->clk);

drivers/gpu/drm/bridge/fsl-ldb.c

241

clk_disable_unprepare(fsl_ldb->clk);

drivers/gpu/drm/bridge/fsl-ldb.c

312

fsl_ldb->clk = devm_clk_get(dev, "ldb");

drivers/gpu/drm/bridge/fsl-ldb.c

313

if (IS_ERR(fsl_ldb->clk))

drivers/gpu/drm/bridge/fsl-ldb.c

314

return PTR_ERR(fsl_ldb->clk);

drivers/gpu/drm/bridge/fsl-ldb.c

90

struct clk *clk;

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c

19

struct clk *pixclk;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

51

struct clk *clk_pixel;

drivers/gpu/drm/bridge/imx/imx8qm-ldb.c

52

struct clk *clk_bypass;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

48

struct clk *clk_pixel;

drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c

49

struct clk *clk_bypass;

drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c

70

struct clk *clk_apb;

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

95

struct clk *clk_pixel;

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

96

struct clk *clk_ref;

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

97

struct clk *clk_cfg;

drivers/gpu/drm/bridge/inno-hdmi.c

400

struct clk *pclk;

drivers/gpu/drm/bridge/inno-hdmi.c

401

struct clk *refclk;

drivers/gpu/drm/bridge/microchip-lvds.c

58

struct clk *pclk;

drivers/gpu/drm/bridge/nwl-dsi.c

1004

dsi->core_clk = clk;

drivers/gpu/drm/bridge/nwl-dsi.c

1006

clk = devm_clk_get(dsi->dev, "phy_ref");

drivers/gpu/drm/bridge/nwl-dsi.c

1007

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/nwl-dsi.c

1008

ret = PTR_ERR(clk);

drivers/gpu/drm/bridge/nwl-dsi.c

1013

dsi->phy_ref_clk = clk;

drivers/gpu/drm/bridge/nwl-dsi.c

1015

clk = devm_clk_get(dsi->dev, "rx_esc");

drivers/gpu/drm/bridge/nwl-dsi.c

1016

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/nwl-dsi.c

1017

ret = PTR_ERR(clk);

drivers/gpu/drm/bridge/nwl-dsi.c

1022

dsi->rx_esc_clk = clk;

drivers/gpu/drm/bridge/nwl-dsi.c

1024

clk = devm_clk_get(dsi->dev, "tx_esc");

drivers/gpu/drm/bridge/nwl-dsi.c

1025

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/nwl-dsi.c

1026

ret = PTR_ERR(clk);

drivers/gpu/drm/bridge/nwl-dsi.c

103

struct clk *lcdif_clk;

drivers/gpu/drm/bridge/nwl-dsi.c

1031

dsi->tx_esc_clk = clk;

drivers/gpu/drm/bridge/nwl-dsi.c

95

struct clk *phy_ref_clk;

drivers/gpu/drm/bridge/nwl-dsi.c

96

struct clk *rx_esc_clk;

drivers/gpu/drm/bridge/nwl-dsi.c

97

struct clk *tx_esc_clk;

drivers/gpu/drm/bridge/nwl-dsi.c

976

struct clk *clk;

drivers/gpu/drm/bridge/nwl-dsi.c

98

struct clk *core_clk;

drivers/gpu/drm/bridge/nwl-dsi.c

988

clk = devm_clk_get(dsi->dev, "lcdif");

drivers/gpu/drm/bridge/nwl-dsi.c

989

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/nwl-dsi.c

990

ret = PTR_ERR(clk);

drivers/gpu/drm/bridge/nwl-dsi.c

995

dsi->lcdif_clk = clk;

drivers/gpu/drm/bridge/nwl-dsi.c

997

clk = devm_clk_get(dsi->dev, "core");

drivers/gpu/drm/bridge/nwl-dsi.c

998

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/nwl-dsi.c

999

ret = PTR_ERR(clk);

drivers/gpu/drm/bridge/sii902x.c

190

struct clk *mclk;

drivers/gpu/drm/bridge/sil-sii8620.c

1189

int clk = mode->clock * (ctx->use_packed_pixel ? 2 : 3);

drivers/gpu/drm/bridge/sil-sii8620.c

1193

if (clk < clk_spec[i].max_clk)

drivers/gpu/drm/bridge/sil-sii8620.c

1196

if (100 * clk >= 98 * clk_spec[i].max_clk)

drivers/gpu/drm/bridge/sil-sii8620.c

68

struct clk *clk_xtal;

drivers/gpu/drm/bridge/ssd2825.c

129

struct clk *tx_clk;

drivers/gpu/drm/bridge/synopsys/dw-dp.c

313

struct clk *apb_clk;

drivers/gpu/drm/bridge/synopsys/dw-dp.c

314

struct clk *aux_clk;

drivers/gpu/drm/bridge/synopsys/dw-dp.c

315

struct clk *i2s_clk;

drivers/gpu/drm/bridge/synopsys/dw-dp.c

316

struct clk *spdif_clk;

drivers/gpu/drm/bridge/synopsys/dw-dp.c

317

struct clk *hdcp_clk;

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3343

struct clk *clk;

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3423

clk = devm_clk_get_enabled(hdmi->dev, "isfr");

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3424

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3425

ret = PTR_ERR(clk);

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3430

clk = devm_clk_get_enabled(hdmi->dev, "iahb");

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3431

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3432

ret = PTR_ERR(clk);

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3437

clk = devm_clk_get_optional_enabled(hdmi->dev, "cec");

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3438

if (IS_ERR(clk)) {

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

3439

ret = PTR_ERR(clk);

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c

251

struct clk *pclk;

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

198

struct clk *pclk;

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

199

struct clk *sys_clk;

drivers/gpu/drm/bridge/tc358767.c

390

struct clk *refclk;

drivers/gpu/drm/bridge/tc358767.c

635

u32 clk, iclk;

drivers/gpu/drm/bridge/tc358767.c

652

clk = (refclk / ext_div[i_pre] / div) * mul;

drivers/gpu/drm/bridge/tc358767.c

653

if ((clk > clk_max) || (clk < clk_min))

drivers/gpu/drm/bridge/tc358767.c

656

clk = clk / ext_div[i_post];

drivers/gpu/drm/bridge/tc358767.c

657

delta = clk - pixelclock;

drivers/gpu/drm/bridge/tc358767.c

665

best_pixelclock = clk;

drivers/gpu/drm/bridge/tc358768.c

146

struct clk *refclk;

drivers/gpu/drm/bridge/ti-sn65dsi86.c

198

struct clk *refclk;

drivers/gpu/drm/display/drm_dp_helper.c

1678

int clk;

drivers/gpu/drm/display/drm_dp_helper.c

1732

clk = drm_dp_downstream_max_dotclock(dpcd, port_cap);

drivers/gpu/drm/display/drm_dp_helper.c

1733

if (clk > 0)

drivers/gpu/drm/display/drm_dp_helper.c

1734

seq_printf(m, "\t\tMax dot clock: %d kHz\n", clk);

drivers/gpu/drm/display/drm_dp_helper.c

1736

clk = drm_dp_downstream_max_tmds_clock(dpcd, port_cap, drm_edid);

drivers/gpu/drm/display/drm_dp_helper.c

1737

if (clk > 0)

drivers/gpu/drm/display/drm_dp_helper.c

1738

seq_printf(m, "\t\tMax TMDS clock: %d kHz\n", clk);

drivers/gpu/drm/display/drm_dp_helper.c

1740

clk = drm_dp_downstream_min_tmds_clock(dpcd, port_cap, drm_edid);

drivers/gpu/drm/display/drm_dp_helper.c

1741

if (clk > 0)

drivers/gpu/drm/display/drm_dp_helper.c

1742

seq_printf(m, "\t\tMin TMDS clock: %d kHz\n", clk);

drivers/gpu/drm/etnaviv/etnaviv_gpu.h

158

struct clk *clk_bus;

drivers/gpu/drm/etnaviv/etnaviv_gpu.h

159

struct clk *clk_reg;

drivers/gpu/drm/etnaviv/etnaviv_gpu.h

160

struct clk *clk_core;

drivers/gpu/drm/etnaviv/etnaviv_gpu.h

161

struct clk *clk_shader;

drivers/gpu/drm/etnaviv/etnaviv_gpu.h

95

struct clk;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

66

struct clk *clks[ARRAY_SIZE(decon_clks_name)];

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

809

struct clk *clk;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

811

clk = devm_clk_get(ctx->dev, decon_clks_name[i]);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

812

if (IS_ERR(clk))

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

813

return PTR_ERR(clk);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

815

ctx->clks[i] = clk;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

66

struct clk *pclk;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

67

struct clk *aclk;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

68

struct clk *eclk;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

69

struct clk *vclk;

drivers/gpu/drm/exynos/exynos_drm_drv.h

157

void (*enable)(struct exynos_drm_clk *clk, bool enable);

drivers/gpu/drm/exynos/exynos_drm_fimc.c

107

struct clk *clocks[FIMC_CLKS_MAX];

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1047

static void fimd_dp_clock_enable(struct exynos_drm_clk *clk, bool enable)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

1049

struct fimd_context *ctx = container_of(clk, struct fimd_context,

drivers/gpu/drm/exynos/exynos_drm_fimd.c

180

struct clk *bus_clk;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

181

struct clk *lcd_clk;

drivers/gpu/drm/exynos/exynos_drm_g2d.c

239

struct clk *gate_clk;

drivers/gpu/drm/exynos/exynos_drm_gsc.c

108

struct clk *clocks[GSC_MAX_CLOCKS];

drivers/gpu/drm/exynos/exynos_drm_mic.c

100

struct clk *clks[NUM_CLKS];

drivers/gpu/drm/exynos/exynos_drm_rotator.c

62

struct clk *clock;

drivers/gpu/drm/exynos/exynos_drm_scaler.c

46

struct clk *clock[SCALER_MAX_CLK];

drivers/gpu/drm/exynos/exynos_drm_scaler.c

551

static int clk_disable_unprepare_wrapper(struct clk *clk)

drivers/gpu/drm/exynos/exynos_drm_scaler.c

553

clk_disable_unprepare(clk);

drivers/gpu/drm/exynos/exynos_drm_scaler.c

560

int (*clk_fun)(struct clk *clk), i;

drivers/gpu/drm/exynos/exynos_hdmi.c

135

struct clk **clk_gates;

drivers/gpu/drm/exynos/exynos_hdmi.c

136

struct clk **clk_muxes;

drivers/gpu/drm/exynos/exynos_hdmi.c

1703

struct clk **clks)

drivers/gpu/drm/exynos/exynos_hdmi.c

1709

struct clk *clk = devm_clk_get(dev, names->data[i]);

drivers/gpu/drm/exynos/exynos_hdmi.c

1711

if (IS_ERR(clk)) {

drivers/gpu/drm/exynos/exynos_hdmi.c

1712

int ret = PTR_ERR(clk);

drivers/gpu/drm/exynos/exynos_hdmi.c

1720

clks[i] = clk;

drivers/gpu/drm/exynos/exynos_hdmi.c

1731

struct clk **clks;

drivers/gpu/drm/exynos/exynos_hdmi.c

1752

static void hdmiphy_clk_enable(struct exynos_drm_clk *clk, bool enable)

drivers/gpu/drm/exynos/exynos_hdmi.c

1754

struct hdmi_context *hdata = container_of(clk, struct hdmi_context,

drivers/gpu/drm/exynos/exynos_hdmi.c

781

struct clk **c = &hdata->clk_muxes[i];

drivers/gpu/drm/exynos/exynos_mixer.c

109

struct clk *mixer;

drivers/gpu/drm/exynos/exynos_mixer.c

110

struct clk *vp;

drivers/gpu/drm/exynos/exynos_mixer.c

111

struct clk *hdmi;

drivers/gpu/drm/exynos/exynos_mixer.c

112

struct clk *sclk_mixer;

drivers/gpu/drm/exynos/exynos_mixer.c

113

struct clk *sclk_hdmi;

drivers/gpu/drm/exynos/exynos_mixer.c

114

struct clk *mout_mixer;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

198

clk_disable_unprepare(fsl_dev->clk);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

211

ret = clk_prepare_enable(fsl_dev->clk);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

264

struct clk *pix_clk_in;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

297

fsl_dev->clk = devm_clk_get(dev, "dcu");

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

298

if (IS_ERR(fsl_dev->clk)) {

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

300

return PTR_ERR(fsl_dev->clk);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

302

ret = clk_prepare_enable(fsl_dev->clk);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

311

pix_clk_in = fsl_dev->clk;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

355

clk_disable_unprepare(fsl_dev->clk);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

365

clk_disable_unprepare(fsl_dev->clk);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h

169

struct clk;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h

187

struct clk *clk;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h

188

struct clk *pix_clk;

drivers/gpu/drm/fsl-dcu/fsl_tcon.h

20

struct clk *ipg_clk;

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c

80

struct clk *pclk;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

47

struct clk *ade_core_clk;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

48

struct clk *media_noc_clk;

drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

49

struct clk *ade_pix_clk;

drivers/gpu/drm/i915/display/intel_bw.c

150

points[i].clk = val & 0xff;

drivers/gpu/drm/i915/display/intel_bw.c

353

i, qi->psf_points[i].clk);

drivers/gpu/drm/i915/display/intel_bw.c

359

static int adl_calc_psf_bw(int clk)

drivers/gpu/drm/i915/display/intel_bw.c

366

return DIV_ROUND_CLOSEST(64 * clk * 100, 6);

drivers/gpu/drm/i915/display/intel_bw.c

59

u8 clk; /* clock in multiples of 16.6666 MHz */

drivers/gpu/drm/i915/display/intel_bw.c

621

bi->psf_bw[j] = adl_calc_psf_bw(sp->clk);

drivers/gpu/drm/i915/display/intel_display_regs.h

2575

#define DPLL_CTRL2_DDI_CLK_SEL(clk, port) ((clk) << ((port) * 3 + 1))

drivers/gpu/drm/i915/display/intel_lt_phy.c

1695

int clk = 0;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1746

clk = div_u64((temp1 + temp0), d8 * 10);

drivers/gpu/drm/i915/display/intel_lt_phy.c

1748

return clk;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1756

int clk;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1772

clk = intel_lt_phy_get_dp_clock(rate);

drivers/gpu/drm/i915/display/intel_lt_phy.c

1774

clk = intel_lt_phy_calc_hdmi_port_clock(crtc_state);

drivers/gpu/drm/i915/display/intel_lt_phy.c

1777

clk = xe3plpd_lt_hdmi_252.clock;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1780

return clk;

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

1373

u64 clk = guc->timestamp.gt_stamp - stats->start_gt_clk;

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

1375

total += intel_gt_clock_interval_to_ns(gt, clk);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

1458

u64 clk = guc->timestamp.gt_stamp - stats->start_gt_clk;

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

1460

stats->total_gt_clks += clk;

drivers/gpu/drm/imagination/pvr_device.c

100

struct clk *core_clk;

drivers/gpu/drm/imagination/pvr_device.c

101

struct clk *sys_clk;

drivers/gpu/drm/imagination/pvr_device.c

102

struct clk *mem_clk;

drivers/gpu/drm/imagination/pvr_device.h

133

struct clk *core_clk;

drivers/gpu/drm/imagination/pvr_device.h

141

struct clk *sys_clk;

drivers/gpu/drm/imagination/pvr_device.h

149

struct clk *mem_clk;

drivers/gpu/drm/imagination/pvr_device.h

34

struct clk;

drivers/gpu/drm/imx/dc/dc-de.h

22

struct clk *clk_disp;

drivers/gpu/drm/imx/dc/dc-drv.c

34

struct clk *clk_cfg;

drivers/gpu/drm/imx/dc/dc-ic.c

33

struct clk *clk_axi;

drivers/gpu/drm/imx/dc/dc-pe.h

70

struct clk *clk_axi;

drivers/gpu/drm/imx/dcss/dcss-dev.c

133

struct clk **clk;

drivers/gpu/drm/imx/dcss/dcss-dev.c

143

*clks[i].clk = devm_clk_get(dcss->dev, clks[i].id);

drivers/gpu/drm/imx/dcss/dcss-dev.c

144

if (IS_ERR(*clks[i].clk)) {

drivers/gpu/drm/imx/dcss/dcss-dev.c

147

return PTR_ERR(*clks[i].clk);

drivers/gpu/drm/imx/dcss/dcss-dev.h

81

struct clk *apb_clk;

drivers/gpu/drm/imx/dcss/dcss-dev.h

82

struct clk *axi_clk;

drivers/gpu/drm/imx/dcss/dcss-dev.h

83

struct clk *pix_clk;

drivers/gpu/drm/imx/dcss/dcss-dev.h

84

struct clk *rtrm_clk;

drivers/gpu/drm/imx/dcss/dcss-dev.h

85

struct clk *dtrc_clk;

drivers/gpu/drm/imx/dcss/dcss-dev.h

86

struct clk *pll_src_clk;

drivers/gpu/drm/imx/dcss/dcss-dev.h

87

struct clk *pll_phy_ref_clk;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

133

clk_get_rate(ldb->clk[chno]),

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

135

clk_set_rate(ldb->clk[chno], di_clk);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

138

clk_get_rate(ldb->clk[chno]));

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

141

ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

161

clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

162

clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

164

clk_prepare_enable(ldb->clk[0]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

165

clk_prepare_enable(ldb->clk[1]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

167

clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

282

clk_disable_unprepare(ldb->clk[0]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

283

clk_disable_unprepare(ldb->clk[1]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

358

ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

359

if (IS_ERR(ldb->clk[chno]))

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

360

return PTR_ERR(ldb->clk[chno]);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

86

struct clk *clk[2]; /* our own clock */

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

87

struct clk *clk_sel[4]; /* parent of display clock */

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

88

struct clk *clk_parent[4]; /* original parent of clk_sel */

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

89

struct clk *clk_pll[2]; /* upstream clock we can adjust */

drivers/gpu/drm/imx/ipuv3/imx-tve.c

118

struct clk *clk;

drivers/gpu/drm/imx/ipuv3/imx-tve.c

119

struct clk *di_sel_clk;

drivers/gpu/drm/imx/ipuv3/imx-tve.c

121

struct clk *di_clk;

drivers/gpu/drm/imx/ipuv3/imx-tve.c

136

clk_prepare_enable(tve->clk);

drivers/gpu/drm/imx/ipuv3/imx-tve.c

155

clk_disable_unprepare(tve->clk);

drivers/gpu/drm/imx/ipuv3/imx-tve.c

226

rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000;

drivers/gpu/drm/imx/ipuv3/imx-tve.c

231

rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000;

drivers/gpu/drm/imx/ipuv3/imx-tve.c

257

clk_set_rate(tve->clk, rate);

drivers/gpu/drm/imx/ipuv3/imx-tve.c

258

rounded_rate = clk_get_rate(tve->clk);

drivers/gpu/drm/imx/ipuv3/imx-tve.c

430

tve_di_parent[0] = __clk_get_name(tve->clk);

drivers/gpu/drm/imx/ipuv3/imx-tve.c

628

tve->clk = devm_clk_get(dev, "tve");

drivers/gpu/drm/imx/ipuv3/imx-tve.c

629

if (IS_ERR(tve->clk)) {

drivers/gpu/drm/imx/ipuv3/imx-tve.c

631

PTR_ERR(tve->clk));

drivers/gpu/drm/imx/ipuv3/imx-tve.c

632

return PTR_ERR(tve->clk);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

109

struct clk *clk_ipg;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

110

struct clk *clk_ahb;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

111

struct clk *clk_per;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1093

struct clk *parent_clk;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

1436

struct clk *parent_clk = clk_get_parent(priv->pix_clk);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

96

struct clk *lcd_clk, *pix_clk;

drivers/gpu/drm/ingenic/ingenic-ipu.c

345

err = clk_enable(ipu->clk);

drivers/gpu/drm/ingenic/ingenic-ipu.c

59

struct clk *clk;

drivers/gpu/drm/ingenic/ingenic-ipu.c

666

clk_disable(ipu->clk);

drivers/gpu/drm/ingenic/ingenic-ipu.c

836

ipu->clk = devm_clk_get(dev, "ipu");

drivers/gpu/drm/ingenic/ingenic-ipu.c

837

if (IS_ERR(ipu->clk)) {

drivers/gpu/drm/ingenic/ingenic-ipu.c

839

return PTR_ERR(ipu->clk);

drivers/gpu/drm/ingenic/ingenic-ipu.c

884

err = clk_prepare(ipu->clk);

drivers/gpu/drm/ingenic/ingenic-ipu.c

902

clk_unprepare(ipu->clk);

drivers/gpu/drm/ingenic/ingenic-ipu.c

912

clk_unprepare(ipu->clk);

drivers/gpu/drm/kmb/kmb_drv.h

44

struct clk *clk_lcd;

drivers/gpu/drm/kmb/kmb_drv.h

45

struct clk *clk_pll0;

drivers/gpu/drm/kmb/kmb_dsi.c

1513

unsigned long clk;

drivers/gpu/drm/kmb/kmb_dsi.c

1541

clk = clk_get_rate(kmb_dsi->clk_mipi_ecfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1542

if (clk != KMB_MIPI_DEFAULT_CFG_CLK) {

drivers/gpu/drm/kmb/kmb_dsi.c

1545

clk = clk_get_rate(kmb_dsi->clk_mipi_ecfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1546

if (clk != KMB_MIPI_DEFAULT_CFG_CLK) {

drivers/gpu/drm/kmb/kmb_dsi.c

1553

clk = clk_get_rate(kmb_dsi->clk_mipi_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1554

if (clk != KMB_MIPI_DEFAULT_CFG_CLK) {

drivers/gpu/drm/kmb/kmb_dsi.c

1557

clk = clk_get_rate(kmb_dsi->clk_mipi_cfg);

drivers/gpu/drm/kmb/kmb_dsi.c

1558

if (clk != KMB_MIPI_DEFAULT_CFG_CLK) {

drivers/gpu/drm/kmb/kmb_dsi.h

75

struct clk *clk_mipi;

drivers/gpu/drm/kmb/kmb_dsi.h

76

struct clk *clk_mipi_ecfg;

drivers/gpu/drm/kmb/kmb_dsi.h

77

struct clk *clk_mipi_cfg;

drivers/gpu/drm/lima/lima_device.h

88

struct clk *clk_bus;

drivers/gpu/drm/lima/lima_device.h

89

struct clk *clk_gpu;

drivers/gpu/drm/logicvc/logicvc_drm.c

153

struct clk **clk;

drivers/gpu/drm/logicvc/logicvc_drm.c

158

.clk = &logicvc->vclk,

drivers/gpu/drm/logicvc/logicvc_drm.c

163

.clk = &logicvc->vclk2,

drivers/gpu/drm/logicvc/logicvc_drm.c

168

.clk = &logicvc->lvdsclk,

drivers/gpu/drm/logicvc/logicvc_drm.c

173

.clk = &logicvc->lvdsclkn,

drivers/gpu/drm/logicvc/logicvc_drm.c

182

struct clk *clk;

drivers/gpu/drm/logicvc/logicvc_drm.c

184

clk = devm_clk_get(dev, clocks_map[i].name);

drivers/gpu/drm/logicvc/logicvc_drm.c

185

if (IS_ERR(clk)) {

drivers/gpu/drm/logicvc/logicvc_drm.c

186

if (PTR_ERR(clk) == -ENOENT && clocks_map[i].optional)

drivers/gpu/drm/logicvc/logicvc_drm.c

192

ret = PTR_ERR(clk);

drivers/gpu/drm/logicvc/logicvc_drm.c

196

ret = clk_prepare_enable(clk);

drivers/gpu/drm/logicvc/logicvc_drm.c

204

*clocks_map[i].clk = clk;

drivers/gpu/drm/logicvc/logicvc_drm.c

211

if (!*clocks_map[i].clk)

drivers/gpu/drm/logicvc/logicvc_drm.c

214

clk_disable_unprepare(*clocks_map[i].clk);

drivers/gpu/drm/logicvc/logicvc_drm.c

215

*clocks_map[i].clk = NULL;

drivers/gpu/drm/logicvc/logicvc_drm.c

223

struct clk **clocks[] = {

drivers/gpu/drm/logicvc/logicvc_drm.h

57

struct clk *vclk;

drivers/gpu/drm/logicvc/logicvc_drm.h

58

struct clk *vclk2;

drivers/gpu/drm/logicvc/logicvc_drm.h

59

struct clk *lvdsclk;

drivers/gpu/drm/logicvc/logicvc_drm.h

60

struct clk *lvdsclkn;

drivers/gpu/drm/mcde/mcde_clk_div.c

183

mcde->fifoa_clk = fifoa->hw.clk;

drivers/gpu/drm/mcde/mcde_clk_div.c

193

mcde->fifob_clk = fifob->hw.clk;

drivers/gpu/drm/mcde/mcde_drm.h

85

struct clk *mcde_clk;

drivers/gpu/drm/mcde/mcde_drm.h

86

struct clk *lcd_clk;

drivers/gpu/drm/mcde/mcde_drm.h

87

struct clk *hdmi_clk;

drivers/gpu/drm/mcde/mcde_drm.h

89

struct clk *fifoa_clk;

drivers/gpu/drm/mcde/mcde_drm.h

90

struct clk *fifob_clk;

drivers/gpu/drm/mcde/mcde_dsi.c

47

struct clk *hs_clk;

drivers/gpu/drm/mcde/mcde_dsi.c

48

struct clk *lp_clk;

drivers/gpu/drm/mediatek/mtk_cec.c

203

cec->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_cec.c

204

if (IS_ERR(cec->clk))

drivers/gpu/drm/mediatek/mtk_cec.c

205

return dev_err_probe(dev, PTR_ERR(cec->clk),

drivers/gpu/drm/mediatek/mtk_cec.c

219

ret = clk_prepare_enable(cec->clk);

drivers/gpu/drm/mediatek/mtk_cec.c

234

clk_disable_unprepare(cec->clk);

drivers/gpu/drm/mediatek/mtk_cec.c

53

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

118

return clk_prepare_enable(priv->clk);

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

125

clk_disable_unprepare(priv->clk);

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

633

struct clk *clk = _clk;

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

635

clk_put(clk);

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

64

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

693

priv->clk = of_clk_get(node, 0);

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

694

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

695

return PTR_ERR(priv->clk);

drivers/gpu/drm/mediatek/mtk_ddp_comp.c

697

ret = devm_add_action_or_reset(dev, mtk_ddp_comp_clk_put, priv->clk);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

177

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

178

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_disp_aal.c

179

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_disp_aal.c

47

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_disp_aal.c

57

return clk_prepare_enable(aal->clk);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

64

clk_disable_unprepare(aal->clk);

drivers/gpu/drm/mediatek/mtk_disp_ccorr.c

141

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_disp_ccorr.c

142

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_disp_ccorr.c

143

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_disp_ccorr.c

37

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_disp_ccorr.c

47

return clk_prepare_enable(ccorr->clk);

drivers/gpu/drm/mediatek/mtk_disp_ccorr.c

54

clk_disable_unprepare(ccorr->clk);

drivers/gpu/drm/mediatek/mtk_disp_color.c

105

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_disp_color.c

106

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_disp_color.c

107

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_disp_color.c

40

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_disp_color.c

50

return clk_prepare_enable(color->clk);

drivers/gpu/drm/mediatek/mtk_disp_color.c

57

clk_disable_unprepare(color->clk);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

265

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

266

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

267

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

61

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

71

return clk_prepare_enable(gamma->clk);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

78

clk_disable_unprepare(gamma->clk);

drivers/gpu/drm/mediatek/mtk_disp_merge.c

199

ret = clk_prepare_enable(priv->clk);

drivers/gpu/drm/mediatek/mtk_disp_merge.c

208

clk_disable_unprepare(priv->clk);

drivers/gpu/drm/mediatek/mtk_disp_merge.c

222

clk_disable_unprepare(priv->clk);

drivers/gpu/drm/mediatek/mtk_disp_merge.c

231

rate = clk_get_rate(priv->clk);

drivers/gpu/drm/mediatek/mtk_disp_merge.c

321

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_disp_merge.c

322

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_disp_merge.c

323

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_disp_merge.c

65

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_disp_merge.c

66

struct clk *async_clk;

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

162

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

250

return clk_prepare_enable(ovl->clk);

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

257

clk_disable_unprepare(ovl->clk);

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

625

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

626

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

627

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

163

return clk_prepare_enable(rdma->clk);

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

170

clk_disable_unprepare(rdma->clk);

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

327

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

328

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

329

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

82

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_dpi.c

74

struct clk *engine_clk;

drivers/gpu/drm/mediatek/mtk_dpi.c

75

struct clk *pixel_clk;

drivers/gpu/drm/mediatek/mtk_dpi.c

76

struct clk *tvd_clk;

drivers/gpu/drm/mediatek/mtk_dsi.c

210

struct clk *engine_clk;

drivers/gpu/drm/mediatek/mtk_dsi.c

211

struct clk *digital_clk;

drivers/gpu/drm/mediatek/mtk_dsi.c

212

struct clk *hs_clk;

drivers/gpu/drm/mediatek/mtk_hdmi.c

1010

clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_HDMI_PIXEL]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

1011

clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

1063

clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

1064

clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PIXEL]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

582

ret = clk_set_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL], clock);

drivers/gpu/drm/mediatek/mtk_hdmi.c

589

rate = clk_get_rate(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

861

ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

865

ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_AUD_SPDIF]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

867

clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

876

clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_BCLK]);

drivers/gpu/drm/mediatek/mtk_hdmi.c

877

clk_disable_unprepare(hdmi->clk[MTK_HDMI_CLK_AUD_SPDIF]);

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

208

hdmi->clk[i] = of_clk_get_by_name(np, clock_names[i]);

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

210

if (IS_ERR(hdmi->clk[i]))

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

211

return PTR_ERR(hdmi->clk[i]);

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

412

hdmi->clk = devm_kcalloc(dev, ver_conf->num_clocks, sizeof(*hdmi->clk), GFP_KERNEL);

drivers/gpu/drm/mediatek/mtk_hdmi_common.c

413

if (!hdmi->clk)

drivers/gpu/drm/mediatek/mtk_hdmi_common.h

159

struct clk **clk;

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

280

ddc->clk = devm_clk_get(dev, "ddc-i2c");

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

281

if (IS_ERR(ddc->clk))

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

282

return dev_err_probe(dev, PTR_ERR(ddc->clk),

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

289

ret = clk_prepare_enable(ddc->clk);

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

303

clk_disable_unprepare(ddc->clk);

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

310

dev_dbg(dev, "ddc->clk: %p\n", ddc->clk);

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

322

clk_disable_unprepare(ddc->clk);

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

60

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

360

ddc->clk = devm_clk_get_enabled(dev, NULL);

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

361

if (IS_ERR(ddc->clk))

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

362

return dev_err_probe(dev, PTR_ERR(ddc->clk), "Cannot get DDC clock\n");

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

40

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

793

ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_SEL]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

797

ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_24M_SEL]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

801

ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_V2_CLK_HDMI_APB_SEL]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

805

ret = clk_prepare_enable(hdmi->clk[MTK_HDMI_V2_CLK_VPP_SPLIT_HDMI]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

812

clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDMI_APB_SEL]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

814

clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_24M_SEL]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

816

clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_SEL]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

823

clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_VPP_SPLIT_HDMI]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

824

clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDMI_APB_SEL]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

825

clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_24M_SEL]);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

826

clk_disable_unprepare(hdmi->clk[MTK_HDMI_V2_CLK_HDCP_SEL]);

drivers/gpu/drm/mediatek/mtk_mdp_rdma.c

265

return clk_prepare_enable(rdma->clk);

drivers/gpu/drm/mediatek/mtk_mdp_rdma.c

272

clk_disable_unprepare(rdma->clk);

drivers/gpu/drm/mediatek/mtk_mdp_rdma.c

306

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_mdp_rdma.c

307

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_mdp_rdma.c

308

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_mdp_rdma.c

95

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_padding.c

105

priv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/mediatek/mtk_padding.c

106

if (IS_ERR(priv->clk))

drivers/gpu/drm/mediatek/mtk_padding.c

107

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/gpu/drm/mediatek/mtk_padding.c

36

struct clk *clk;

drivers/gpu/drm/mediatek/mtk_padding.c

45

return clk_prepare_enable(padding->clk);

drivers/gpu/drm/mediatek/mtk_padding.c

52

clk_disable_unprepare(padding->clk);

drivers/gpu/drm/meson/meson_dw_hdmi.c

653

struct clk *clk;

drivers/gpu/drm/meson/meson_dw_hdmi.c

656

clk = devm_clk_get(dev, name);

drivers/gpu/drm/meson/meson_dw_hdmi.c

657

if (IS_ERR(clk)) {

drivers/gpu/drm/meson/meson_dw_hdmi.c

659

return PTR_ERR(clk);

drivers/gpu/drm/meson/meson_dw_hdmi.c

662

ret = clk_prepare_enable(clk);

drivers/gpu/drm/meson/meson_dw_hdmi.c

664

ret = devm_add_action_or_reset(dev, meson_disable_clk, clk);

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

46

struct clk *bit_clk;

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

47

struct clk *px_clk;

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

91

struct clk *core_clk;

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

92

struct clk *hub_clk;

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

264

u32 clk, *ptr;

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

275

clk = gpu_read(gpu, REG_A6XX_VBIF_CLKON);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

279

clk | A6XX_VBIF_CLKON_FORCE_ON_TESTBUS);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

311

gpu_write(gpu, REG_A6XX_VBIF_CLKON, clk);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

1131

struct clk *clk;

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

1133

clk = msm_clk_bulk_get_clock(dpu_kms->clocks, dpu_kms->num_clocks, clock_name);

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

1134

if (!clk)

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

1137

return clk_get_rate(clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

14

struct clk *hdmi_clk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c

15

struct clk *mdp_clk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

167

clk_disable_unprepare(mdp4_kms->clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

179

clk_prepare_enable(mdp4_kms->clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

23

unsigned long clk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

37

clk = clk_get_rate(mdp4_kms->clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

39

if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

423

clk_set_rate(mdp4_kms->clk, max_clk);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

535

mdp4_kms->clk = devm_clk_get(&pdev->dev, "core_clk");

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

536

if (IS_ERR(mdp4_kms->clk))

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c

537

return dev_err_probe(dev, PTR_ERR(mdp4_kms->clk), "failed to get core_clk\n");

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

205

struct clk *mdp4_get_lcdc_clock(struct drm_device *dev);

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

30

struct clk *clk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

31

struct clk *pclk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

32

struct clk *lut_clk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h

33

struct clk *axi_clk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c

18

struct clk *lcdc_clk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c

162

struct clk *mdp4_get_lcdc_clock(struct drm_device *dev)

drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c

165

struct clk *clk;

drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c

175

clk = devm_clk_get(dev->dev, "lcdc_clk");

drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c

176

if (clk == ERR_PTR(-ENOENT)) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c

182

return clk;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

477

static int get_clk(struct platform_device *pdev, struct clk **clkp,

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

481

struct clk *clk = msm_clk_get(pdev, name);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

482

if (IS_ERR(clk) && mandatory) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

483

DRM_DEV_ERROR(dev, "failed to get %s (%ld)\n", name, PTR_ERR(clk));

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

484

return PTR_ERR(clk);

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

486

if (IS_ERR(clk))

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

489

*clkp = clk;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

51

struct clk *axi_clk;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

52

struct clk *ahb_clk;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

53

struct clk *core_clk;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

54

struct clk *lut_clk;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

55

struct clk *tbu_clk;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

56

struct clk *tbu_rt_clk;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

57

struct clk *vsync_clk;

drivers/gpu/drm/msm/dp/dp_ctrl.c

130

struct clk *pixel_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

117

struct clk *byte_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

118

struct clk *esc_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

119

struct clk *pixel_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

120

struct clk *byte_intf_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

126

struct clk *byte_src_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

127

struct clk *pixel_src_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

128

struct clk *dsi_pll_byte_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

129

struct clk *dsi_pll_pixel_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

137

struct clk *src_clk;

drivers/gpu/drm/msm/dsi/dsi_host.c

206

struct clk *ahb_clk;

drivers/gpu/drm/msm/hdmi/hdmi.h

155

struct clk **clks;

drivers/gpu/drm/msm/hdmi/hdmi.h

54

struct clk *extp_clk;

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

39

struct clk *clk;

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

41

clk = msm_clk_get(phy->pdev, cfg->clk_names[i]);

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

42

if (IS_ERR(clk)) {

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

43

ret = PTR_ERR(clk);

drivers/gpu/drm/msm/hdmi/hdmi_phy.c

49

phy->clks[i] = clk;

drivers/gpu/drm/msm/msm_drv.h

457

struct clk *msm_clk_get(struct platform_device *pdev, const char *name);

drivers/gpu/drm/msm/msm_drv.h

459

struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,

drivers/gpu/drm/msm/msm_gpu.h

234

struct clk *ebi1_clk, *core_clk, *rbbmtimer_clk;

drivers/gpu/drm/msm/msm_io_utils.c

17

struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,

drivers/gpu/drm/msm/msm_io_utils.c

27

return bulk[i].clk;

drivers/gpu/drm/msm/msm_io_utils.c

34

struct clk *msm_clk_get(struct platform_device *pdev, const char *name)

drivers/gpu/drm/msm/msm_io_utils.c

36

struct clk *clk;

drivers/gpu/drm/msm/msm_io_utils.c

39

clk = devm_clk_get(&pdev->dev, name);

drivers/gpu/drm/msm/msm_io_utils.c

40

if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)

drivers/gpu/drm/msm/msm_io_utils.c

41

return clk;

drivers/gpu/drm/msm/msm_io_utils.c

45

clk = devm_clk_get(&pdev->dev, name2);

drivers/gpu/drm/msm/msm_io_utils.c

46

if (!IS_ERR(clk))

drivers/gpu/drm/msm/msm_io_utils.c

50

return clk;

drivers/gpu/drm/mxsfb/lcdif_drv.c

150

lcdif->clk = devm_clk_get(drm->dev, "pix");

drivers/gpu/drm/mxsfb/lcdif_drv.c

151

if (IS_ERR(lcdif->clk))

drivers/gpu/drm/mxsfb/lcdif_drv.c

152

return PTR_ERR(lcdif->clk);

drivers/gpu/drm/mxsfb/lcdif_drv.c

312

clk_disable_unprepare(lcdif->clk);

drivers/gpu/drm/mxsfb/lcdif_drv.c

331

clk_prepare_enable(lcdif->clk);

drivers/gpu/drm/mxsfb/lcdif_drv.h

16

struct clk;

drivers/gpu/drm/mxsfb/lcdif_drv.h

20

struct clk *clk;

drivers/gpu/drm/mxsfb/lcdif_drv.h

21

struct clk *clk_axi;

drivers/gpu/drm/mxsfb/lcdif_drv.h

22

struct clk *clk_disp_axi;

drivers/gpu/drm/mxsfb/lcdif_kms.c

411

m->clock, (int)(clk_get_rate(lcdif->clk) / 1000));

drivers/gpu/drm/mxsfb/lcdif_kms.c

541

clk_set_rate(lcdif->clk, m->clock * 1000);

drivers/gpu/drm/mxsfb/mxsfb_drv.c

228

mxsfb->clk = devm_clk_get(drm->dev, NULL);

drivers/gpu/drm/mxsfb/mxsfb_drv.c

229

if (IS_ERR(mxsfb->clk))

drivers/gpu/drm/mxsfb/mxsfb_drv.c

230

return PTR_ERR(mxsfb->clk);

drivers/gpu/drm/mxsfb/mxsfb_drv.h

16

struct clk;

drivers/gpu/drm/mxsfb/mxsfb_drv.h

33

struct clk *clk;

drivers/gpu/drm/mxsfb/mxsfb_drv.h

34

struct clk *clk_axi;

drivers/gpu/drm/mxsfb/mxsfb_drv.h

35

struct clk *clk_disp_axi;

drivers/gpu/drm/mxsfb/mxsfb_kms.c

158

clk_prepare_enable(mxsfb->clk);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

225

clk_disable_unprepare(mxsfb->clk);

drivers/gpu/drm/mxsfb/mxsfb_kms.c

295

(int)(clk_get_rate(mxsfb->clk) / 1000));

drivers/gpu/drm/mxsfb/mxsfb_kms.c

307

clk_set_rate(mxsfb->clk, m->crtc_clock * 1000);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

122

struct nvkm_clk *clk = nvxx_clk(drm);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

150

if (!clk->pll_calc(clk, &pll_lim, dot_clock, pv))

drivers/gpu/drm/nouveau/dispnv04/hw.c

261

struct nvkm_clk *clk = nvxx_clk(drm);

drivers/gpu/drm/nouveau/dispnv04/hw.c

282

clk->pll_prog(clk, pll_lim.reg, &pv);

drivers/gpu/drm/nouveau/dispnv04/hw.c

472

struct nvkm_clk *clk = nvxx_clk(drm);

drivers/gpu/drm/nouveau/dispnv04/hw.c

480

clk->pll_prog(clk, pllreg, &regp->pllvals);

drivers/gpu/drm/nouveau/include/nvkm/core/layout.h

28

NVKM_LAYOUT_ONCE(NVKM_SUBDEV_CLK , struct nvkm_clk , clk)

drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h

15

struct clk *clk;

drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h

16

struct clk *clk_ref;

drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h

17

struct clk *clk_pwr;

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

115

int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk,

drivers/gpu/drm/nouveau/nouveau_drv.h

398

#define nvxx_clk(a) nvxx_device(a)->clk

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1009

.clk = { 0x00000001, g84_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

103

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1040

.clk = { 0x00000001, g84_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1071

.clk = { 0x00000001, g84_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1102

.clk = { 0x00000001, gt215_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1135

.clk = { 0x00000001, gt215_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1167

.clk = { 0x00000001, gt215_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1199

.clk = { 0x00000001, mcp77_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

123

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1230

.clk = { 0x00000001, mcp77_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1261

.clk = { 0x00000001, gt215_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1293

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1328

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1363

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1398

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1433

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

145

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1468

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1503

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1538

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1572

.clk = { 0x00000001, gf100_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1607

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1643

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

167

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1679

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1714

.clk = { 0x00000001, gk20a_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1739

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1775

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1811

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1847

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1883

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

189

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

1918

.clk = { 0x00000001, gk104_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

2056

.clk = { 0x00000001, gm20b_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

211

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

2283

.clk = { 0x00000001, gp10b_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

233

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

255

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

277

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

299

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

321

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

343

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

365

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

388

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

411

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

433

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

456

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

481

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

506

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

531

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

556

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

581

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

606

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

61

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

631

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

656

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

681

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

706

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

731

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

756

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

782

.clk = { 0x00000001, nv50_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

809

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

82

.clk = { 0x00000001, nv04_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

834

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

859

.clk = { 0x00000001, nv40_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

885

.clk = { 0x00000001, g84_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

916

.clk = { 0x00000001, g84_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

947

.clk = { 0x00000001, g84_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

978

.clk = { 0x00000001, g84_clk_new },

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

106

list_for_each_entry(pstate, &clk->states, head) {

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

120

lo = max(nvkm_clk_read(clk, domain->name), 0);

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

146

struct nvkm_clk *clk = ctrl->device->clk;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

154

if (!clk)

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

160

ret |= nvkm_clk_ustate(clk, args->v0.ustate, args->v0.pwrsrc);

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

162

ret |= nvkm_clk_ustate(clk, args->v0.ustate, 0);

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

163

ret |= nvkm_clk_ustate(clk, args->v0.ustate, 1);

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

40

struct nvkm_clk *clk = ctrl->device->clk;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

50

if (clk) {

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

51

args->v0.count = clk->state_nr;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

52

args->v0.ustate_ac = clk->ustate_ac;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

53

args->v0.ustate_dc = clk->ustate_dc;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

54

args->v0.pwrsrc = clk->pwrsrc;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

55

args->v0.pstate = clk->pstate;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

73

struct nvkm_clk *clk = ctrl->device->clk;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

86

if (!clk)

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

90

if (args->v0.state >= clk->state_nr)

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

94

domain = clk->domains;

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

280

tdev->clk = devm_clk_get(&pdev->dev, "gpu");

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

281

if (IS_ERR(tdev->clk)) {

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

282

ret = PTR_ERR(tdev->clk);

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

286

rate = clk_get_rate(tdev->clk);

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

288

ret = clk_set_rate(tdev->clk, ULONG_MAX);

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

292

rate = clk_get_rate(tdev->clk);

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

41

ret = clk_prepare_enable(tdev->clk);

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

73

clk_disable_unprepare(tdev->clk);

drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c

88

clk_disable_unprepare(tdev->clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

112

nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

115

struct nvkm_device *device = clk->subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

128

nvkm_volt_map(volt, volt->max0_id, clk->temp));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

131

nvkm_volt_map(volt, volt->max1_id, clk->temp));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

134

nvkm_volt_map(volt, volt->max2_id, clk->temp));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

137

if (nvkm_cstate_valid(clk, cstate, max_volt, clk->temp))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

145

nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

160

nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

162

struct nvkm_subdev *subdev = &clk->subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

170

cstate = nvkm_cstate_get(clk, pstate, cstatei);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

171

cstate = nvkm_cstate_find_best(clk, pstate, cstate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

188

pstate->base.voltage, clk->temp, +1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

195

ret = clk->func->calc(clk, cstate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

197

ret = clk->func->prog(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

198

clk->func->tidy(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

203

pstate->base.voltage, clk->temp, -1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

225

nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

227

struct nvkm_bios *bios = clk->subdev.device->bios;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

228

struct nvkm_volt *volt = clk->subdev.device->volt;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

229

const struct nvkm_domain *domain = clk->domains;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

252

u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

267

nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

269

struct nvkm_subdev *subdev = &clk->subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

275

list_for_each_entry(pstate, &clk->states, head) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

281

clk->pstate = pstatei;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

296

return nvkm_cstate_prog(clk, pstate, NVKM_CLK_CSTATE_HIGHEST);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

302

struct nvkm_clk *clk = container_of(work, typeof(*clk), work);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

303

struct nvkm_subdev *subdev = &clk->subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

306

if (!atomic_xchg(&clk->waiting, 0))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

308

clk->pwrsrc = power_supply_is_system_supplied();

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

311

clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

312

clk->astate, clk->temp, clk->dstate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

314

pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

315

if (clk->state_nr && pstate != -1) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

316

pstate = (pstate < 0) ? clk->astate : pstate;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

317

pstate = min(pstate, clk->state_nr - 1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

318

pstate = max(pstate, clk->dstate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

320

pstate = clk->pstate = -1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

324

if (pstate != clk->pstate) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

325

int ret = nvkm_pstate_prog(clk, pstate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

332

wake_up_all(&clk->wait);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

336

nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

338

atomic_set(&clk->waiting, 1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

339

schedule_work(&clk->work);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

341

wait_event(clk->wait, !atomic_read(&clk->waiting));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

346

nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

348

const struct nvkm_domain *clock = clk->domains - 1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

350

struct nvkm_subdev *subdev = &clk->subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

402

nvkm_pstate_new(struct nvkm_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

404

struct nvkm_bios *bios = clk->subdev.device->bios;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

405

const struct nvkm_domain *domain = clk->domains - 1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

41

nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

44

struct nvkm_bios *bios = clk->subdev.device->bios;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

446

perfS.v40.freq = nvkm_clk_adjust(clk, false,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

459

nvkm_cstate_new(clk, idx, pstate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

463

nvkm_pstate_info(clk, pstate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

464

list_add_tail(&pstate->head, &clk->states);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

465

clk->state_nr++;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

473

nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

478

if (!clk->allow_reclock)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

482

list_for_each_entry(pstate, &clk->states, head) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

497

nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

501

if (clk->allow_reclock && !strncasecmpz(mode, "auto", arglen))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

510

ret = nvkm_clk_ustate_update(clk, v);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

521

nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

523

int ret = nvkm_clk_ustate_update(clk, req);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

525

if (ret -= 2, pwr) clk->ustate_ac = ret;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

526

else clk->ustate_dc = ret;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

527

return nvkm_pstate_calc(clk, true);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

533

nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

535

if (!rel) clk->astate = req;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

536

if ( rel) clk->astate += rel;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

537

clk->astate = min(clk->astate, clk->state_nr - 1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

538

clk->astate = max(clk->astate, 0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

539

return nvkm_pstate_calc(clk, wait);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

543

nvkm_clk_tstate(struct nvkm_clk *clk, u8 temp)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

545

if (clk->temp == temp)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

547

clk->temp = temp;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

548

return nvkm_pstate_calc(clk, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

552

nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

554

if (!rel) clk->dstate = req;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

555

if ( rel) clk->dstate += rel;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

556

clk->dstate = min(clk->dstate, clk->state_nr - 1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

557

clk->dstate = max(clk->dstate, 0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

558

return nvkm_pstate_calc(clk, true);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

564

if (device->clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

565

return nvkm_pstate_calc(device->clk, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

574

nvkm_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

576

return clk->func->read(clk, src);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

582

struct nvkm_clk *clk = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

583

flush_work(&clk->work);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

584

if (clk->func->fini)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

585

clk->func->fini(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

592

struct nvkm_clk *clk = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

593

const struct nvkm_domain *clock = clk->domains;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

596

memset(&clk->bstate, 0x00, sizeof(clk->bstate));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

597

INIT_LIST_HEAD(&clk->bstate.list);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

598

clk->bstate.pstate = 0xff;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

601

ret = nvkm_clk_read(clk, clock->name);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

606

clk->bstate.base.domain[clock->name] = ret;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

610

nvkm_pstate_info(clk, &clk->bstate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

612

if (clk->func->init)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

613

return clk->func->init(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

615

clk->astate = clk->state_nr - 1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

616

clk->dstate = 0;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

617

clk->pstate = -1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

618

clk->temp = 90; /* reasonable default value */

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

619

nvkm_pstate_calc(clk, true);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

626

struct nvkm_clk *clk = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

630

if (clk->func->pstates)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

631

return clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

633

list_for_each_entry_safe(pstate, temp, &clk->states, head) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

637

return clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

649

enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

651

struct nvkm_subdev *subdev = &clk->subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

662

clk->boost_khz = boost.clock_mhz * 1000;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

664

clk->base_khz = base.clock_mhz * 1000;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

667

clk->func = func;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

668

INIT_LIST_HEAD(&clk->states);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

669

clk->domains = func->domains;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

670

clk->ustate_ac = -1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

671

clk->ustate_dc = -1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

672

clk->allow_reclock = allow_reclock;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

674

INIT_WORK(&clk->work, nvkm_pstate_work);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

675

init_waitqueue_head(&clk->wait);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

676

atomic_set(&clk->waiting, 0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

682

ret = nvkm_pstate_new(clk, idx++);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

686

list_add_tail(&func->pstates[idx].head, &clk->states);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

687

clk->state_nr = func->nr_pstates;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

692

clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

693

clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

698

clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

702

clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

704

clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost",

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

79

nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

82

const struct nvkm_domain *domain = clk->domains;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

83

struct nvkm_volt *volt = clk->subdev.device->volt;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

89

switch (clk->boost_mode) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

91

if (clk->base_khz && freq > clk->base_khz)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

95

if (clk->boost_khz && freq > clk->boost_khz)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

100

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

112

sclk = read_vco(clk, dsrc + (doff * 4));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

133

read_clk(struct gf100_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

135

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

142

sclk = read_pll(clk, 0x137000 + (idx * 0x20));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

144

sclk = read_pll(clk, 0x1370e0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

147

sclk = read_div(clk, idx, 0x137160, 0x1371d0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

160

struct gf100_clk *clk = gf100_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

161

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

170

return read_pll(clk, 0x00e800);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

172

return read_pll(clk, 0x00e820);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

175

return read_div(clk, 0, 0x137320, 0x137330);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

177

return read_pll(clk, 0x132020);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

179

return read_pll(clk, 0x132000);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

181

return read_div(clk, 0, 0x137300, 0x137310);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

184

return nvkm_clk_read(&clk->base, nv_clk_src_mpll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

185

return nvkm_clk_read(&clk->base, nv_clk_src_mdiv);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

188

return read_clk(clk, 0x00);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

190

return read_clk(clk, 0x01);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

192

return read_clk(clk, 0x02);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

194

return read_clk(clk, 0x07);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

196

return read_clk(clk, 0x08);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

198

return read_clk(clk, 0x09);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

200

return read_clk(clk, 0x0c);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

202

return read_clk(clk, 0x0e);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

210

calc_div(struct gf100_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

221

calc_src(struct gf100_clk *clk, int idx, u32 freq, u32 *dsrc, u32 *ddiv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

243

sclk = read_vco(clk, 0x137160 + (idx * 4));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

245

sclk = calc_div(clk, idx, sclk, freq, ddiv);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

250

calc_pll(struct gf100_clk *clk, int idx, u32 freq, u32 *coef)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

252

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

261

limits.refclk = read_div(clk, idx, 0x137120, 0x137140);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

274

calc_clk(struct gf100_clk *clk, struct nvkm_cstate *cstate, int idx, int dom)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

276

struct gf100_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

286

clk0 = calc_src(clk, idx, freq, &src0, &div0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

287

clk0 = calc_div(clk, idx, clk0, freq, &div1D);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

292

clk1 = calc_pll(clk, idx, freq, &info->coef);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

295

clk1 = calc_div(clk, idx, clk1, freq, &div1P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

327

struct gf100_clk *clk = gf100_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

330

if ((ret = calc_clk(clk, cstate, 0x00, nv_clk_src_gpc)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

331

(ret = calc_clk(clk, cstate, 0x01, nv_clk_src_rop)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

332

(ret = calc_clk(clk, cstate, 0x02, nv_clk_src_hubk07)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

333

(ret = calc_clk(clk, cstate, 0x07, nv_clk_src_hubk06)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

334

(ret = calc_clk(clk, cstate, 0x08, nv_clk_src_hubk01)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

335

(ret = calc_clk(clk, cstate, 0x09, nv_clk_src_copy)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

336

(ret = calc_clk(clk, cstate, 0x0c, nv_clk_src_pmu)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

337

(ret = calc_clk(clk, cstate, 0x0e, nv_clk_src_vdec)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

344

gf100_clk_prog_0(struct gf100_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

346

struct gf100_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

347

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

355

gf100_clk_prog_1(struct gf100_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

357

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

366

gf100_clk_prog_2(struct gf100_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

368

struct gf100_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

369

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

393

gf100_clk_prog_3(struct gf100_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

395

struct gf100_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

396

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

408

gf100_clk_prog_4(struct gf100_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

410

struct gf100_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

411

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

418

struct gf100_clk *clk = gf100_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

431

for (j = 0; j < ARRAY_SIZE(clk->eng); j++) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

432

if (!clk->eng[j].freq)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

434

stage[i].exec(clk, j);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

444

struct gf100_clk *clk = gf100_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

445

memset(clk->eng, 0x00, sizeof(clk->eng));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

474

struct gf100_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

476

if (!(clk = kzalloc_obj(*clk)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

478

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

480

return nvkm_clk_ctor(&gf100_clk, device, type, inst, false, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

49

read_vco(struct gf100_clk *clk, u32 dsrc)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

51

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

54

return nvkm_clk_read(&clk->base, nv_clk_src_sppll0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

55

return nvkm_clk_read(&clk->base, nv_clk_src_sppll1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

59

read_pll(struct gf100_clk *clk, u32 pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

61

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

79

sclk = nvkm_clk_read(&clk->base, nv_clk_src_mpllsrc);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

82

sclk = nvkm_clk_read(&clk->base, nv_clk_src_mpllsrcref);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

88

sclk = read_div(clk, (pll & 0xff) / 0x20, 0x137120, 0x137140);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

98

read_div(struct gf100_clk *clk, int doff, u32 dsrc, u32 dctl)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

106

read_div(struct gk104_clk *clk, int doff, u32 dsrc, u32 dctl)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

108

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

121

u32 sclk = read_vco(clk, dsrc + (doff * 4));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

126

return read_vco(clk, dsrc + (doff * 4));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

133

read_mem(struct gk104_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

135

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

137

case 1: return read_pll(clk, 0x132020);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

138

case 2: return read_pll(clk, 0x132000);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

145

read_clk(struct gk104_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

147

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

154

sclk = read_pll(clk, 0x137000 + (idx * 0x20));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

157

sclk = read_div(clk, idx, 0x137160, 0x1371d0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

163

sclk = read_div(clk, idx, 0x137160, 0x1371d0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

166

sclk = read_pll(clk, 0x1370e0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

172

sclk = read_div(clk, idx, 0x137160, 0x1371d0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

191

struct gk104_clk *clk = gk104_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

192

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

201

return read_mem(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

203

return read_clk(clk, 0x00);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

205

return read_clk(clk, 0x01);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

207

return read_clk(clk, 0x02);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

209

return read_clk(clk, 0x07);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

211

return read_clk(clk, 0x08);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

213

return read_clk(clk, 0x0c);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

215

return read_clk(clk, 0x0e);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

223

calc_div(struct gk104_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

234

calc_src(struct gk104_clk *clk, int idx, u32 freq, u32 *dsrc, u32 *ddiv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

256

sclk = read_vco(clk, 0x137160 + (idx * 4));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

258

sclk = calc_div(clk, idx, sclk, freq, ddiv);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

263

calc_pll(struct gk104_clk *clk, int idx, u32 freq, u32 *coef)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

265

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

274

limits.refclk = read_div(clk, idx, 0x137120, 0x137140);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

287

calc_clk(struct gk104_clk *clk,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

290

struct gk104_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

300

clk0 = calc_src(clk, idx, freq, &src0, &div0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

301

clk0 = calc_div(clk, idx, clk0, freq, &div1D);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

306

clk1 = calc_pll(clk, idx, freq, &info->coef);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

309

clk1 = calc_div(clk, idx, clk1, freq, &div1P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

341

struct gk104_clk *clk = gk104_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

344

if ((ret = calc_clk(clk, cstate, 0x00, nv_clk_src_gpc)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

345

(ret = calc_clk(clk, cstate, 0x01, nv_clk_src_rop)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

346

(ret = calc_clk(clk, cstate, 0x02, nv_clk_src_hubk07)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

347

(ret = calc_clk(clk, cstate, 0x07, nv_clk_src_hubk06)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

348

(ret = calc_clk(clk, cstate, 0x08, nv_clk_src_hubk01)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

349

(ret = calc_clk(clk, cstate, 0x0c, nv_clk_src_pmu)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

350

(ret = calc_clk(clk, cstate, 0x0e, nv_clk_src_vdec)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

357

gk104_clk_prog_0(struct gk104_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

359

struct gk104_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

360

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

368

gk104_clk_prog_1_0(struct gk104_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

370

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

379

gk104_clk_prog_1_1(struct gk104_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

381

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

386

gk104_clk_prog_2(struct gk104_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

388

struct gk104_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

389

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

411

gk104_clk_prog_3(struct gk104_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

413

struct gk104_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

414

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

422

gk104_clk_prog_4_0(struct gk104_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

424

struct gk104_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

425

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

437

gk104_clk_prog_4_1(struct gk104_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

439

struct gk104_clk_info *info = &clk->eng[idx];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

440

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

450

struct gk104_clk *clk = gk104_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

466

for (j = 0; j < ARRAY_SIZE(clk->eng); j++) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

469

if (!clk->eng[j].freq)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

471

stage[i].exec(clk, j);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

481

struct gk104_clk *clk = gk104_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

482

memset(clk->eng, 0x00, sizeof(clk->eng));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

50

read_vco(struct gk104_clk *clk, u32 dsrc)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

510

struct gk104_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

512

if (!(clk = kzalloc_obj(*clk)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

514

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

516

return nvkm_clk_ctor(&gk104_clk, device, type, inst, true, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

52

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

55

return read_pll(clk, 0x00e800);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

56

return read_pll(clk, 0x00e820);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

60

read_pll(struct gk104_clk *clk, u32 pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

62

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

81

sclk = read_pll(clk, 0x132020);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

85

sclk = read_div(clk, 0, 0x137320, 0x137330);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

92

sclk = read_div(clk, (pll & 0xff) / 0x20, 0x137120, 0x137140);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

102

gk20a_pllg_calc_mnp(struct gk20a_clk *clk, unsigned long rate,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

105

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

115

ref_clk_f = clk->parent_rate / KHZ;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

118

max_vco_f = max(clk->params->max_vco, target_vco_f);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

119

min_vco_f = clk->params->min_vco;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

120

best_m = clk->params->max_m;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

121

best_n = clk->params->min_n;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

122

best_pl = clk->params->min_pl;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

126

high_pl = min(high_pl, clk->params->max_pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

127

high_pl = max(high_pl, clk->params->min_pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

128

high_pl = clk->div_to_pl(high_pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

132

low_pl = min(low_pl, clk->params->max_pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

133

low_pl = max(low_pl, clk->params->min_pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

134

low_pl = clk->div_to_pl(low_pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

137

clk->pl_to_div(low_pl), high_pl, clk->pl_to_div(high_pl));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

143

target_vco_f = target_clk_f * clk->pl_to_div(pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

145

for (m = clk->params->min_m; m <= clk->params->max_m; m++) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

148

if (u_f < clk->params->min_u)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

150

if (u_f > clk->params->max_u)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

156

if (n > clk->params->max_n)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

162

if (n < clk->params->min_n)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

164

if (n > clk->params->max_n)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

172

lwv = (vco_f + (clk->pl_to_div(pl) / 2))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

173

/ clk->pl_to_div(pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

202

target_freq = gk20a_pllg_calc_rate(clk, pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

207

clk->pl_to_div(pll->pl));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

212

gk20a_pllg_slide(struct gk20a_clk *clk, u32 n)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

214

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

220

gk20a_pllg_read_mnp(clk, &pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

233

gk20a_pllg_write_mnp(clk, &pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

257

gk20a_pllg_enable(struct gk20a_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

259

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

285

gk20a_pllg_disable(struct gk20a_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

287

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

297

gk20a_pllg_program_mnp(struct gk20a_clk *clk, const struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

299

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

304

gk20a_pllg_read_mnp(clk, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

315

gk20a_pllg_disable(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

317

gk20a_pllg_write_mnp(clk, pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

319

ret = gk20a_pllg_enable(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

336

gk20a_pllg_program_mnp_slide(struct gk20a_clk *clk, const struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

341

if (gk20a_pllg_is_enabled(clk)) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

342

gk20a_pllg_read_mnp(clk, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

346

return gk20a_pllg_slide(clk, pll->n);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

349

cur_pll.n = gk20a_pllg_n_lo(clk, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

350

ret = gk20a_pllg_slide(clk, cur_pll.n);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

357

cur_pll.n = gk20a_pllg_n_lo(clk, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

358

ret = gk20a_pllg_program_mnp(clk, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

363

return gk20a_pllg_slide(clk, pll->n);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

463

struct gk20a_clk *clk = gk20a_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

464

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

472

gk20a_pllg_read_mnp(clk, &pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

473

return gk20a_pllg_calc_rate(clk, &pll) / GK20A_CLK_GPC_MDIV;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

483

struct gk20a_clk *clk = gk20a_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

485

return gk20a_pllg_calc_mnp(clk, cstate->domain[nv_clk_src_gpc] *

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

486

GK20A_CLK_GPC_MDIV, &clk->pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

492

struct gk20a_clk *clk = gk20a_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

495

ret = gk20a_pllg_program_mnp_slide(clk, &clk->pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

497

ret = gk20a_pllg_program_mnp(clk, &clk->pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

508

gk20a_clk_setup_slide(struct gk20a_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

510

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

514

switch (clk->parent_rate) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

531

clk->parent_rate / KHZ);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

547

struct gk20a_clk *clk = gk20a_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

550

if (gk20a_pllg_is_enabled(clk)) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

554

gk20a_pllg_read_mnp(clk, &pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

555

n_lo = gk20a_pllg_n_lo(clk, &pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

556

gk20a_pllg_slide(clk, n_lo);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

559

gk20a_pllg_disable(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

568

struct gk20a_clk *clk = gk20a_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

569

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

581

ret = gk20a_clk_setup_slide(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

587

ret = base->func->prog(&clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

593

ret = gk20a_devfreq_init(base, &clk->devfreq);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

620

struct gk20a_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

632

clk->params = params;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

633

clk->parent_rate = clk_get_rate(tdev->clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

635

ret = nvkm_clk_ctor(func, device, type, inst, true, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

639

nvkm_debug(&clk->base.subdev, "parent clock rate: %d Khz\n",

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

640

clk->parent_rate / KHZ);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

649

struct gk20a_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

652

clk = kzalloc_obj(*clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

653

if (!clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

655

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

657

ret = gk20a_clk_ctor(device, type, inst, &gk20a_clk, &gk20a_pllg_params, clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

659

clk->pl_to_div = pl_to_div;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

66

gk20a_pllg_read_mnp(struct gk20a_clk *clk, struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

660

clk->div_to_pl = div_to_pl;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

68

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

78

gk20a_pllg_write_mnp(struct gk20a_clk *clk, const struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

80

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

90

gk20a_pllg_calc_rate(struct gk20a_clk *clk, struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

95

rate = clk->parent_rate * pll->n;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

96

divider = pll->m * clk->pl_to_div(pll->pl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

134

gk20a_pllg_is_enabled(struct gk20a_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

136

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

144

gk20a_pllg_n_lo(struct gk20a_clk *clk, struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

146

return DIV_ROUND_UP(pll->m * clk->params->min_vco,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

147

clk->parent_rate / KHZ);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1012

clk->safe_fmax_vmin = fmax * (100 - 10) / 100;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1013

nvkm_debug(subdev, "safe fmax @ vmin = %u Khz\n", clk->safe_fmax_vmin);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1023

struct gm20b_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1033

clk = kzalloc(sizeof(*clk) + sizeof(*clk_params), GFP_KERNEL);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1034

if (!clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1036

*pclk = &clk->base.base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1037

subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1040

clk_params = (void *) (clk + 1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1042

ret = gk20a_clk_ctor(device, type, inst, &gm20b_clk, clk_params, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1051

(clk->base.parent_rate / KHZ));

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1054

kfree(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1058

clk->base.pl_to_div = pl_to_div;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1059

clk->base.div_to_pl = div_to_pl;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1061

clk->dvfs_params = &gm20b_dvfs_params;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1063

ret = gm20b_clk_init_fused_params(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1071

ret = gm20b_clk_init_safe_fmax(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

161

gm20b_pllg_read_mnp(struct gm20b_clk *clk, struct gm20b_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

163

struct nvkm_subdev *subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

167

gk20a_pllg_read_mnp(&clk->base, &pll->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

174

gm20b_pllg_write_mnp(struct gm20b_clk *clk, const struct gm20b_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

176

struct nvkm_device *device = clk->base.base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

180

gk20a_pllg_write_mnp(&clk->base, &pll->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

190

gm20b_dvfs_calc_det_coeff(struct gm20b_clk *clk, s32 uv,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

193

struct nvkm_subdev *subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

194

const struct gm20b_clk_dvfs_params *p = clk->dvfs_params;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

204

dvfs->dfs_ext_cal = DIV_ROUND_CLOSEST(uv - clk->uvdet_offs,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

205

clk->uvdet_slope);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

226

gm20b_dvfs_calc_ndiv(struct gm20b_clk *clk, u32 n_eff, u32 *n_int, u32 *sdm_din)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

228

struct nvkm_subdev *subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

229

const struct gk20a_clk_pllg_params *p = clk->base.params;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

235

det_delta = DIV_ROUND_CLOSEST(((s32)clk->uv) - clk->uvdet_offs,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

236

clk->uvdet_slope);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

237

det_delta -= clk->dvfs.dfs_ext_cal;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

238

det_delta = min(det_delta, clk->dvfs.dfs_det_max);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

239

det_delta *= clk->dvfs.dfs_coeff;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

267

gm20b_pllg_slide(struct gm20b_clk *clk, u32 n)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

269

struct nvkm_subdev *subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

276

gm20b_dvfs_calc_ndiv(clk, n, &n_int, &sdm_din);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

279

gm20b_pllg_read_mnp(clk, &pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

295

gk20a_pllg_write_mnp(&clk->base, &pll.base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

323

gm20b_pllg_enable(struct gm20b_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

325

struct nvkm_device *device = clk->base.base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

346

gm20b_pllg_disable(struct gm20b_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

348

struct nvkm_device *device = clk->base.base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

361

gm20b_pllg_program_mnp(struct gm20b_clk *clk, const struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

363

struct nvkm_subdev *subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

371

gm20b_dvfs_calc_ndiv(clk, pll->n, &n_int, &sdm_din);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

372

gm20b_pllg_read_mnp(clk, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

377

if (!gk20a_pllg_is_enabled(&clk->base))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

402

gk20a_pllg_write_mnp(&clk->base, &cur_pll.base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

406

gk20a_pllg_write_mnp(&clk->base, &cur_pll.base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

409

gm20b_pllg_disable(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

414

gm20b_pllg_write_mnp(clk, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

416

ret = gm20b_pllg_enable(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

434

gm20b_pllg_program_mnp_slide(struct gm20b_clk *clk, const struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

439

if (gk20a_pllg_is_enabled(&clk->base)) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

440

gk20a_pllg_read_mnp(&clk->base, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

444

return gm20b_pllg_slide(clk, pll->n);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

447

cur_pll.n = gk20a_pllg_n_lo(&clk->base, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

448

ret = gm20b_pllg_slide(clk, cur_pll.n);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

455

cur_pll.n = gk20a_pllg_n_lo(&clk->base, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

456

ret = gm20b_pllg_program_mnp(clk, &cur_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

461

return gm20b_pllg_slide(clk, pll->n);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

467

struct gm20b_clk *clk = gm20b_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

472

ret = gk20a_pllg_calc_mnp(&clk->base, cstate->domain[nv_clk_src_gpc] *

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

473

GK20A_CLK_GPC_MDIV, &clk->new_pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

477

clk->new_uv = volt->vid[cstate->voltage].uv;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

478

gm20b_dvfs_calc_det_coeff(clk, clk->new_uv, &clk->new_dvfs);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

480

nvkm_debug(subdev, "%s uv: %d uv\n", __func__, clk->new_uv);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

489

gm20b_dvfs_calc_safe_pll(struct gm20b_clk *clk, struct gk20a_pll *pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

491

u32 rate = gk20a_pllg_calc_rate(&clk->base, pll) / KHZ;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

492

u32 parent_rate = clk->base.parent_rate / KHZ;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

496

if (rate > clk->safe_fmax_vmin)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

502

nmin = DIV_ROUND_UP(pll->m * clk->base.params->min_vco, parent_rate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

503

nsafe = pll->m * rate / (clk->base.parent_rate);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

514

gm20b_dvfs_program_coeff(struct gm20b_clk *clk, u32 coeff)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

516

struct nvkm_device *device = clk->base.base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

532

gm20b_dvfs_program_ext_cal(struct gm20b_clk *clk, u32 dfs_det_cal)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

534

struct nvkm_device *device = clk->base.base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

550

gm20b_dvfs_program_dfs_detection(struct gm20b_clk *clk,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

553

struct nvkm_device *device = clk->base.base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

569

gm20b_dvfs_program_ext_cal(clk, dvfs->dfs_ext_cal);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

575

struct gm20b_clk *clk = gm20b_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

580

if (clk->uv == clk->new_uv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

602

cur_freq = nvkm_clk_read(&clk->base.base, nv_clk_src_gpc);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

603

if (cur_freq > clk->safe_fmax_vmin) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

606

if (clk->uv < clk->new_uv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

608

pll_safe = clk->base.pll;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

611

pll_safe = clk->new_pll;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

613

gm20b_dvfs_calc_safe_pll(clk, &pll_safe);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

614

ret = gm20b_pllg_program_mnp_slide(clk, &pll_safe);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

625

gm20b_dvfs_program_coeff(clk, 0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

626

gm20b_dvfs_program_ext_cal(clk, clk->new_dvfs.dfs_ext_cal);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

627

gm20b_dvfs_program_coeff(clk, clk->new_dvfs.dfs_coeff);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

628

gm20b_dvfs_program_dfs_detection(clk, &clk->new_dvfs);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

631

clk->uv = clk->new_uv;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

632

clk->dvfs = clk->new_dvfs;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

633

clk->base.pll = clk->new_pll;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

635

return gm20b_pllg_program_mnp_slide(clk, &clk->base.pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

724

struct gm20b_clk *clk = gm20b_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

727

if (gk20a_pllg_is_enabled(&clk->base)) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

731

gk20a_pllg_read_mnp(&clk->base, &pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

732

n_lo = gk20a_pllg_n_lo(&clk->base, &pll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

733

gm20b_pllg_slide(clk, n_lo);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

736

gm20b_pllg_disable(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

743

gm20b_clk_init_dvfs(struct gm20b_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

745

struct nvkm_subdev *subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

747

bool fused = clk->uvdet_offs && clk->uvdet_slope;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

757

if (clk->dvfs_params->vco_ctrl)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

759

clk->dvfs_params->vco_ctrl << GPCPLL_CFG3_VCO_CTRL_SHIFT);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

791

clk->uvdet_slope = ADC_SLOPE_UV;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

792

clk->uvdet_offs = ((s32)clk->uv) - data * ADC_SLOPE_UV;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

795

clk->uvdet_offs, clk->uvdet_slope);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

799

gm20b_dvfs_calc_det_coeff(clk, clk->uv, &clk->dvfs);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

800

gm20b_dvfs_program_coeff(clk, 0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

801

gm20b_dvfs_program_ext_cal(clk, clk->dvfs.dfs_ext_cal);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

802

gm20b_dvfs_program_coeff(clk, clk->dvfs.dfs_coeff);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

803

gm20b_dvfs_program_dfs_detection(clk, &clk->new_dvfs);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

814

struct gk20a_clk *clk = gk20a_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

815

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

833

ret = gk20a_clk_setup_slide(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

852

if (clk->base.func == &gm20b_clk) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

873

ret = gk20a_devfreq_init(base, &clk->devfreq);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

919

struct gk20a_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

922

clk = kzalloc_obj(*clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

923

if (!clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

925

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

927

ret = gk20a_clk_ctor(device, type, inst, &gm20b_clk_speedo0, &gm20b_pllg_params, clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

928

clk->pl_to_div = pl_to_div;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

929

clk->div_to_pl = div_to_pl;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

947

gm20b_clk_init_fused_params(struct gm20b_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

949

struct nvkm_subdev *subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

964

clk->uvdet_slope = ((val >> FUSE_RESERVED_CALIB0_SLOPE_INT_SHIFT) &

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

970

clk->uvdet_offs = ((val >> FUSE_RESERVED_CALIB0_INTERCEPT_INT_SHIFT) &

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

976

clk->uvdet_slope, clk->uvdet_offs);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

981

gm20b_clk_init_safe_fmax(struct gm20b_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

983

struct nvkm_subdev *subdev = &clk->base.base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

985

struct nvkm_pstate *pstates = clk->base.base.func->pstates;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

986

int nr_pstates = clk->base.base.func->nr_pstates;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

15

struct gp10b_clk *clk = gp10b_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

16

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

165

struct gp10b_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

168

clk = kzalloc_obj(*clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

169

if (!clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

171

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

172

clk->clk = tdev->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

180

ret = nvkm_clk_ctor(func, device, type, inst, true, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

27

ret = gk20a_devfreq_init(base, &clk->devfreq);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

37

struct gp10b_clk *clk = gp10b_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

38

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

42

return clk_get_rate(clk->clk) / GK20A_CLK_GPC_MDIV;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

52

struct gp10b_clk *clk = gp10b_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

55

clk->new_rate = clk_round_rate(clk->clk, target_rate) / GK20A_CLK_GPC_MDIV;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

63

struct gp10b_clk *clk = gp10b_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

66

ret = clk_set_rate(clk->clk, clk->new_rate * GK20A_CLK_GPC_MDIV);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

70

clk->rate = clk_get_rate(clk->clk) / GK20A_CLK_GPC_MDIV;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.h

9

struct clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

108

read_pll(struct gt215_clk *clk, int idx, u32 pll)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

110

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

128

sclk = read_clk(clk, 0x00 + idx, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

131

sclk = read_clk(clk, 0x10 + idx, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

145

struct gt215_clk *clk = gt215_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

146

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

155

return read_pll(clk, 0x00, 0x4200);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

157

return read_pll(clk, 0x01, 0x4220);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

159

return read_pll(clk, 0x02, 0x4000);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

161

return read_clk(clk, 0x20, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

163

return read_clk(clk, 0x21, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

165

return read_clk(clk, 0x25, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

170

return read_clk(clk, 0x1d, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

190

struct gt215_clk *clk = gt215_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

194

info->clk = 0;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

198

info->clk = 0x00000100;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

201

info->clk = 0x00002100;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

204

info->clk = 0x00002140;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

207

sclk = read_vco(clk, idx);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

224

info->clk = (((sdiv - 2) << 16) | 0x00003100);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

238

struct gt215_clk *clk = gt215_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

239

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

248

ret = gt215_clk_info(&clk->base, idx, khz, info);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

259

ret = gt215_clk_info(&clk->base, idx - 0x10, limits.refclk, info);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

274

calc_clk(struct gt215_clk *clk, struct nvkm_cstate *cstate,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

277

int ret = gt215_pll_info(&clk->base, idx, pll, cstate->domain[dom],

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

278

&clk->eng[dom]);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

285

calc_host(struct gt215_clk *clk, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

289

struct gt215_clk_info *info = &clk->eng[nv_clk_src_host];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

292

info->clk = 0;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

299

ret = gt215_clk_info(&clk->base, 0x1d, kHz, info);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

307

gt215_clk_pre(struct nvkm_clk *clk, unsigned long *flags)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

309

struct nvkm_device *device = clk->subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

342

gt215_clk_post(struct nvkm_clk *clk, unsigned long *flags)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

344

struct nvkm_device *device = clk->subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

355

disable_clk_src(struct gt215_clk *clk, u32 src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

357

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

363

prog_pll(struct gt215_clk *clk, int idx, u32 pll, int dom)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

365

struct gt215_clk_info *info = &clk->eng[dom];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

366

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

382

nvkm_mask(device, src0, 0x003f3141, 0x00000101 | info->clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

396

disable_clk_src(clk, src1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

398

nvkm_mask(device, src1, 0x003f3141, 0x00000101 | info->clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

402

disable_clk_src(clk, src0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

407

prog_clk(struct gt215_clk *clk, int idx, int dom)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

409

struct gt215_clk_info *info = &clk->eng[dom];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

410

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

411

nvkm_mask(device, 0x004120 + (idx * 4), 0x003f3141, 0x00000101 | info->clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

415

prog_host(struct gt215_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

417

struct gt215_clk_info *info = &clk->eng[nv_clk_src_host];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

418

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

425

disable_clk_src(clk, 0x4194);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

429

prog_clk(clk, 0x1d, nv_clk_src_host);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

43

read_vco(struct gt215_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

443

prog_core(struct gt215_clk *clk, int dom)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

445

struct gt215_clk_info *info = &clk->eng[dom];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

446

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

45

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

452

prog_pll(clk, 0x00, 0x004200, dom);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

461

struct gt215_clk *clk = gt215_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

462

struct gt215_clk_info *core = &clk->eng[nv_clk_src_core];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

465

if ((ret = calc_clk(clk, cstate, 0x10, 0x4200, nv_clk_src_core)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

466

(ret = calc_clk(clk, cstate, 0x11, 0x4220, nv_clk_src_shader)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

467

(ret = calc_clk(clk, cstate, 0x20, 0x0000, nv_clk_src_disp)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

468

(ret = calc_clk(clk, cstate, 0x21, 0x0000, nv_clk_src_vdec)) ||

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

469

(ret = calc_host(clk, cstate)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

475

ret = gt215_clk_info(&clk->base, 0x10,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

477

&clk->eng[nv_clk_src_core_intm]);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

488

struct gt215_clk *clk = gt215_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

489

struct gt215_clk_info *core = &clk->eng[nv_clk_src_core];

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

494

ret = gt215_clk_pre(&clk->base, f);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

499

prog_core(clk, nv_clk_src_core_intm);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

501

prog_core(clk, nv_clk_src_core);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

502

prog_pll(clk, 0x01, 0x004220, nv_clk_src_shader);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

503

prog_clk(clk, 0x20, nv_clk_src_disp);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

504

prog_clk(clk, 0x21, nv_clk_src_vdec);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

505

prog_host(clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

511

gt215_clk_post(&clk->base, f);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

52

return read_pll(clk, 0x41, 0x00e820);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

54

return read_pll(clk, 0x42, 0x00e8a0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

543

struct gt215_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

545

if (!(clk = kzalloc_obj(*clk)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

547

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

549

return nvkm_clk_ctor(&gt215_clk, device, type, inst, true, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

61

read_clk(struct gt215_clk *clk, int idx, bool ignore_en)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

63

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

99

sclk = read_vco(clk, idx);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.h

7

u32 clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

100

case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm2d3);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

102

case 0x00080000: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

103

case 0x000c0000: return nvkm_clk_read(&clk->base, nv_clk_src_cclk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

110

case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

112

case 0x00000002: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

113

case 0x00000003: return read_pll(clk, 0x004028) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

118

return nvkm_clk_read(&clk->base, nv_clk_src_core);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

121

return nvkm_clk_read(&clk->base, nv_clk_src_core);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

124

case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_href);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

125

case 0x00000400: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

126

case 0x00000800: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm2d3);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

134

return nvkm_clk_read(&clk->base, nv_clk_src_href) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

135

return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

137

case 0x00000020: return read_pll(clk, 0x004028) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

138

case 0x00000030: return read_pll(clk, 0x004020) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

144

P = (read_div(clk) & 0x00000700) >> 8;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

148

return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

162

calc_pll(struct mcp77_clk *clk, u32 reg,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

165

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

174

pll.refclk = nvkm_clk_read(&clk->base, nv_clk_src_href);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

202

struct mcp77_clk *clk = mcp77_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

206

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

212

if (core < nvkm_clk_read(&clk->base, nv_clk_src_hclkm4))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

213

out = calc_P(nvkm_clk_read(&clk->base, nv_clk_src_hclkm4), core, &divs);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

216

clock = calc_pll(clk, 0x4028, (core << 1), &N, &M, &P1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

219

clk->csrc = nv_clk_src_hclkm4;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

220

clk->cctrl = divs << 16;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

230

clk->csrc = nv_clk_src_core;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

231

clk->ccoef = (N << 8) | M;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

233

clk->cctrl = (P2 + 1) << 16;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

234

clk->cpost = (1 << P1) << 16;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

239

if (shader == nvkm_clk_read(&clk->base, nv_clk_src_href)) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

240

clk->ssrc = nv_clk_src_href;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

242

clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

243

if (clk->csrc == nv_clk_src_core)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

249

clk->ssrc = nv_clk_src_core;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

250

clk->sctrl = (divs + P2) << 16;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

252

clk->ssrc = nv_clk_src_shader;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

253

clk->scoef = (N << 8) | M;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

254

clk->sctrl = P1 << 16;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

262

clk->vsrc = nv_clk_src_cclk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

263

clk->vdiv = divs << 16;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

265

clk->vsrc = nv_clk_src_vdec;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

266

clk->vdiv = P1 << 16;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

271

clk->ccoef, clk->cpost, clk->cctrl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

273

clk->scoef, clk->spost, clk->sctrl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

274

nvkm_debug(subdev, " vdiv: %08x\n", clk->vdiv);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

275

if (clk->csrc == nv_clk_src_hclkm4)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

280

if (clk->ssrc == nv_clk_src_hclkm4)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

282

else if (clk->ssrc == nv_clk_src_core)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

287

if (clk->vsrc == nv_clk_src_hclkm4)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

298

struct mcp77_clk *clk = mcp77_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

299

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

306

ret = gt215_clk_pre(&clk->base, f);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

315

switch (clk->csrc) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

317

nvkm_mask(device, 0x4028, 0x00070000, clk->cctrl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

321

nvkm_wr32(device, 0x402c, clk->ccoef);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

322

nvkm_wr32(device, 0x4028, 0x80000000 | clk->cctrl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

323

nvkm_wr32(device, 0x4040, clk->cpost);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

332

switch (clk->ssrc) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

338

nvkm_mask(device, 0x4020, 0x00070000, clk->sctrl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

342

nvkm_wr32(device, 0x4024, clk->scoef);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

343

nvkm_wr32(device, 0x4020, 0x80000000 | clk->sctrl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

344

nvkm_wr32(device, 0x4070, clk->spost);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

360

switch (clk->vsrc) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

365

nvkm_wr32(device, 0x4600, clk->vdiv);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

372

if (clk->csrc != nv_clk_src_core) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

377

if (clk->ssrc != nv_clk_src_shader) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

386

gt215_clk_post(&clk->base, f);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

415

struct mcp77_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

417

if (!(clk = kzalloc_obj(*clk)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

419

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

42

read_div(struct mcp77_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

421

return nvkm_clk_ctor(&mcp77_clk, device, type, inst, true, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

44

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

49

read_pll(struct mcp77_clk *clk, u32 base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

51

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

54

u32 ref = nvkm_clk_read(&clk->base, nv_clk_src_href);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

83

struct mcp77_clk *clk = mcp77_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

84

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

95

return nvkm_clk_read(&clk->base, nv_clk_src_href) * 4;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

97

return nvkm_clk_read(&clk->base, nv_clk_src_href) * 2 / 3;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

33

int clk, struct nvkm_pll_vals *pv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

36

int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

49

nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

51

struct nvkm_device *device = clk->subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

100

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

110

return read_clk(clk, (mast & 0x00000003) >> 0);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

112

return read_clk(clk, (mast & 0x00000030) >> 4);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

114

return read_pll_2(clk, 0x4020);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

124

nv40_clk_calc_pll(struct nv40_clk *clk, u32 reg, u32 khz,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

127

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

148

struct nv40_clk *clk = nv40_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

155

ret = nv40_clk_calc_pll(clk, 0x004000, gclk,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

161

clk->npll_ctrl = 0x80000100 | (log2P << 16);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

162

clk->npll_coef = (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

164

clk->npll_ctrl = 0xc0000000 | (log2P << 16);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

165

clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

170

ret = nv40_clk_calc_pll(clk, 0x004008, sclk,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

175

clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

176

clk->ctrl = 0x00000223;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

178

clk->spll = 0x00000000;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

179

clk->ctrl = 0x00000333;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

188

struct nv40_clk *clk = nv40_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

189

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

191

nvkm_wr32(device, 0x004004, clk->npll_coef);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

192

nvkm_mask(device, 0x004000, 0xc0070100, clk->npll_ctrl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

193

nvkm_mask(device, 0x004008, 0xc007ffff, clk->spll);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

195

nvkm_mask(device, 0x00c040, 0x00000333, clk->ctrl);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

224

struct nv40_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

226

if (!(clk = kzalloc_obj(*clk)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

228

clk->base.pll_calc = nv04_clk_pll_calc;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

229

clk->base.pll_prog = nv04_clk_pll_prog;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

230

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

232

return nvkm_clk_ctor(&nv40_clk, device, type, inst, true, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

40

read_pll_1(struct nv40_clk *clk, u32 reg)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

42

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

56

read_pll_2(struct nv40_clk *clk, u32 reg)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

58

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

82

read_clk(struct nv40_clk *clk, u32 src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

86

return read_pll_2(clk, 0x004000);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

88

return read_pll_1(clk, 0x004008);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

99

struct nv40_clk *clk = nv40_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

103

case 1: return nvkm_clk_read(&clk->base, nv_clk_src_crystal);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

104

case 2: return nvkm_clk_read(&clk->base, nv_clk_src_href);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

125

read_pll_ref(struct nv50_clk *clk, u32 base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

127

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

145

return nvkm_clk_read(&clk->base, nv_clk_src_crystal);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

152

return nvkm_clk_read(&clk->base, nv_clk_src_href);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

154

return read_pll_src(clk, base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

158

read_pll(struct nv50_clk *clk, u32 base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

160

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

164

u32 ref = read_pll_ref(clk, base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

171

return nvkm_clk_read(&clk->base, nv_clk_src_dom6);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

194

struct nv50_clk *clk = nv50_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

195

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

206

return div_u64((u64)nvkm_clk_read(&clk->base, nv_clk_src_href) * 27778, 10000);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

208

return nvkm_clk_read(&clk->base, nv_clk_src_hclk) * 3;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

210

return nvkm_clk_read(&clk->base, nv_clk_src_hclk) * 3 / 2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

213

case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_href);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

216

case 0x30000000: return nvkm_clk_read(&clk->base, nv_clk_src_hclk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

223

case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

224

case 0x00000001: return nvkm_clk_read(&clk->base, nv_clk_src_dom6);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

225

case 0x00000002: return read_pll(clk, 0x004020) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

226

case 0x00000003: return read_pll(clk, 0x004028) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

234

return nvkm_clk_read(&clk->base, nv_clk_src_host) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

235

return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

237

case 0x00000020: return read_pll(clk, 0x004028) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

238

case 0x00000030: return read_pll(clk, 0x004020) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

246

return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

249

return nvkm_clk_read(&clk->base, nv_clk_src_href) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

252

return read_pll(clk, 0x004008) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

256

P = (read_div(clk) & 0x00000700) >> 8;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

267

return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

268

return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

273

return read_pll(clk, 0x004028) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

274

return read_pll(clk, 0x004030) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

276

return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

282

return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

286

return nvkm_clk_read(&clk->base, nv_clk_src_hclkm3d2) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

288

return nvkm_clk_read(&clk->base, nv_clk_src_mem) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

297

return read_pll(clk, 0x00e810) >> 2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

304

P = (read_div(clk) & 0x00000007) >> 0;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

306

case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_href);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

308

case 0x08000000: return nvkm_clk_read(&clk->base, nv_clk_src_hclk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

310

return nvkm_clk_read(&clk->base, nv_clk_src_hclkm3) >> P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

32

read_div(struct nv50_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

326

calc_pll(struct nv50_clk *clk, u32 reg, u32 idx, int *N, int *M, int *P)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

328

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

337

pll.refclk = read_pll_ref(clk, reg);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

34

struct nvkm_device *device = clk->base.subdev.device;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

371

struct nv50_clk *clk = nv50_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

372

struct nv50_clk_hwsq *hwsq = &clk->hwsq;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

373

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

404

out = read_pll(clk, 0x004030);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

406

out = nvkm_clk_read(&clk->base, nv_clk_src_hclkm3d2);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

427

if (clk_same(dom6, nvkm_clk_read(&clk->base, nv_clk_src_href))) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

430

if (clk_same(dom6, nvkm_clk_read(&clk->base, nv_clk_src_hclk))) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

433

freq = nvkm_clk_read(&clk->base, nv_clk_src_hclk) * 3;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

460

freq = calc_pll(clk, 0x4028, core, &N, &M, &P1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

478

freq = calc_pll(clk, 0x4020, shader, &N, &M, &P1);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

498

struct nv50_clk *clk = nv50_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

499

return clk_exec(&clk->hwsq, true);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

505

struct nv50_clk *clk = nv50_clk(base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

506

clk_exec(&clk->hwsq, false);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

513

struct nv50_clk *clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

516

if (!(clk = kzalloc_obj(*clk)))

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

518

ret = nvkm_clk_ctor(func, device, type, inst, allow_reclock, &clk->base);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

519

*pclk = &clk->base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

52

read_pll_src(struct nv50_clk *clk, u32 base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

523

clk->hwsq.r_fifo = hwsq_reg(0x002504);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

524

clk->hwsq.r_spll[0] = hwsq_reg(0x004020);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

525

clk->hwsq.r_spll[1] = hwsq_reg(0x004024);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

526

clk->hwsq.r_nvpll[0] = hwsq_reg(0x004028);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

527

clk->hwsq.r_nvpll[1] = hwsq_reg(0x00402c);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

532

clk->hwsq.r_divs = hwsq_reg(0x004800);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

535

clk->hwsq.r_divs = hwsq_reg(0x004700);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

538

clk->hwsq.r_mast = hwsq_reg(0x00c040);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

54

struct nvkm_subdev *subdev = &clk->base.subdev;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

56

u32 coef, ref = nvkm_clk_read(&clk->base, nv_clk_src_crystal);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

108

delta = abs(calcclk - clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

128

getMNP_double(struct nvkm_subdev *subdev, struct nvbios_pll *info, int clk,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

157

for (log2P = 0; clk && log2P < maxlog2P && clk <= (vco2 >> log2P); log2P++)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

159

clkP = clk << log2P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

161

if (maxvco2 < clk + clk/200) /* +0.5% */

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

162

maxvco2 = clk + clk/200;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

204

delta = abs(calcclkout - clk);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

29

getMNP_single(struct nvkm_subdev *subdev, struct nvbios_pll *info, int clk,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

59

if (clk > 250000)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

61

if (clk > 340000)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

64

if (clk > 150000)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

66

if (clk > 200000)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

68

if (clk > 340000)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

74

if ((clk * P) < minvco) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

75

minvco = clk * maxP;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

79

if (clk + clk/200 > maxvco) /* +0.5% */

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

80

maxvco = clk + clk/200;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

85

clkP = clk * P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

24

int nv04_clk_pll_calc(struct nvkm_clk *, struct nvbios_pll *, int clk,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

133

struct nvkm_clk *clk = device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

189

ref = nvkm_clk_read(clk, nv_clk_src_sppll0);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

191

ref = nvkm_clk_read(clk, nv_clk_src_sppll1);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1115

struct nvkm_clk *clk = ram->base.fb->subdev.device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1122

nvkm_clk_read(clk, nv_clk_src_mem),

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

982

gk104_calc_pll_output(int fN, int M, int N, int P, int clk)

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

984

return ((clk * N) + (((u16)(fN + 4096) * clk) >> 13)) / (M * P);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

161

struct nvkm_clk *clk = device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

187

clk_current = nvkm_clk_read(clk, nv_clk_src_mem);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

189

ret = gt215_clk_pre(clk, f);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

244

gt215_clk_post(clk, f);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

266

gt215_clk_post(clk, f);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

551

ret = gt215_pll_info(device->clk, 0x12, 0x4000, freq, &mclk);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

616

ram_mask(fuc, 0x004128, 0x003f3141, mclk.clk | 0x00000101);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

699

ram_mask(fuc, 0x004168, 0x003f3141, mclk.clk | 0x00000101);

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

122

struct nvkm_clk *clk = device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

132

if (!clk || !volt)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

53

struct nvkm_clk *clk = pmu->base.subdev.device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

55

return nvkm_clk_astate(clk, *state, 0, false);

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

61

struct nvkm_clk *clk = pmu->base.subdev.device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

63

*state = clk->pstate;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

71

struct nvkm_clk *clk = pmu->base.subdev.device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

75

level = cur_level = clk->pstate;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

78

level = min(clk->state_nr - 1, level + (clk->state_nr / 3));

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

83

level = min(clk->state_nr - 1, level);

drivers/gpu/drm/omapdrm/dss/dsi.c

4260

struct clk *clk;

drivers/gpu/drm/omapdrm/dss/dsi.c

4262

clk = devm_clk_get(dsi->dev, "fck");

drivers/gpu/drm/omapdrm/dss/dsi.c

4263

if (IS_ERR(clk)) {

drivers/gpu/drm/omapdrm/dss/dsi.c

4265

return PTR_ERR(clk);

drivers/gpu/drm/omapdrm/dss/dsi.c

4268

dsi->dss_clk = clk;

drivers/gpu/drm/omapdrm/dss/dsi.c

4531

struct clk *clk;

drivers/gpu/drm/omapdrm/dss/dsi.c

4534

clk = devm_clk_get(dsi->dev, "sys_clk");

drivers/gpu/drm/omapdrm/dss/dsi.c

4535

if (IS_ERR(clk)) {

drivers/gpu/drm/omapdrm/dss/dsi.c

4537

return PTR_ERR(clk);

drivers/gpu/drm/omapdrm/dss/dsi.c

4542

pll->clkin = clk;

drivers/gpu/drm/omapdrm/dss/dsi.h

352

struct clk *dss_clk;

drivers/gpu/drm/omapdrm/dss/dss.c

1481

dss->debugfs.clk = dss_debugfs_create_file(dss, "clk",

drivers/gpu/drm/omapdrm/dss/dss.c

1507

dss_debugfs_remove_file(dss->debugfs.clk);

drivers/gpu/drm/omapdrm/dss/dss.c

1538

dss_debugfs_remove_file(dss->debugfs.clk);

drivers/gpu/drm/omapdrm/dss/dss.c

823

struct clk *clk;

drivers/gpu/drm/omapdrm/dss/dss.c

825

clk = devm_clk_get(&dss->pdev->dev, "fck");

drivers/gpu/drm/omapdrm/dss/dss.c

826

if (IS_ERR(clk)) {

drivers/gpu/drm/omapdrm/dss/dss.c

828

return PTR_ERR(clk);

drivers/gpu/drm/omapdrm/dss/dss.c

831

dss->dss_clk = clk;

drivers/gpu/drm/omapdrm/dss/dss.c

834

clk = clk_get(NULL, dss->feat->parent_clk_name);

drivers/gpu/drm/omapdrm/dss/dss.c

835

if (IS_ERR(clk)) {

drivers/gpu/drm/omapdrm/dss/dss.c

838

return PTR_ERR(clk);

drivers/gpu/drm/omapdrm/dss/dss.c

841

clk = NULL;

drivers/gpu/drm/omapdrm/dss/dss.c

844

dss->parent_clk = clk;

drivers/gpu/drm/omapdrm/dss/dss.h

182

struct clk *clkin;

drivers/gpu/drm/omapdrm/dss/dss.h

232

struct clk *parent_clk;

drivers/gpu/drm/omapdrm/dss/dss.h

233

struct clk *dss_clk;

drivers/gpu/drm/omapdrm/dss/dss.h

251

struct dss_debugfs_entry *clk;

drivers/gpu/drm/omapdrm/dss/hdmi_pll.c

133

struct clk *clk;

drivers/gpu/drm/omapdrm/dss/hdmi_pll.c

136

clk = devm_clk_get(&pdev->dev, "sys_clk");

drivers/gpu/drm/omapdrm/dss/hdmi_pll.c

137

if (IS_ERR(clk)) {

drivers/gpu/drm/omapdrm/dss/hdmi_pll.c

139

return PTR_ERR(clk);

drivers/gpu/drm/omapdrm/dss/hdmi_pll.c

145

pll->clkin = clk;

drivers/gpu/drm/omapdrm/dss/venc.c

255

struct clk *tv_dac_clk;

drivers/gpu/drm/omapdrm/dss/venc.c

519

struct clk *clk;

drivers/gpu/drm/omapdrm/dss/venc.c

522

clk = devm_clk_get(&venc->pdev->dev, "tv_dac_clk");

drivers/gpu/drm/omapdrm/dss/venc.c

523

if (IS_ERR(clk)) {

drivers/gpu/drm/omapdrm/dss/venc.c

525

return PTR_ERR(clk);

drivers/gpu/drm/omapdrm/dss/venc.c

528

clk = NULL;

drivers/gpu/drm/omapdrm/dss/venc.c

531

venc->tv_dac_clk = clk;

drivers/gpu/drm/omapdrm/dss/video-pll.c

142

struct clk *clk;

drivers/gpu/drm/omapdrm/dss/video-pll.c

160

clk = devm_clk_get(&pdev->dev, clkin_name[id]);

drivers/gpu/drm/omapdrm/dss/video-pll.c

161

if (IS_ERR(clk)) {

drivers/gpu/drm/omapdrm/dss/video-pll.c

163

return ERR_CAST(clk);

drivers/gpu/drm/omapdrm/dss/video-pll.c

177

pll->clkin = clk;

drivers/gpu/drm/panfrost/panfrost_device.h

137

struct clk *clock;

drivers/gpu/drm/panfrost/panfrost_device.h

138

struct clk *bus_clock;

drivers/gpu/drm/panthor/panthor_device.h

121

struct clk *core;

drivers/gpu/drm/panthor/panthor_device.h

124

struct clk *stacks;

drivers/gpu/drm/panthor/panthor_device.h

127

struct clk *coregroup;

drivers/gpu/drm/pl111/pl111_display.c

139

ret = clk_set_rate(priv->clk, mode->clock * 1000);

drivers/gpu/drm/pl111/pl111_display.c

146

clk_prepare_enable(priv->clk);

drivers/gpu/drm/pl111/pl111_display.c

387

clk_disable_unprepare(priv->clk);

drivers/gpu/drm/pl111/pl111_display.c

543

struct clk *parent = devm_clk_get(drm->dev, "clcdclk");

drivers/gpu/drm/pl111/pl111_display.c

564

priv->clk = parent;

drivers/gpu/drm/pl111/pl111_display.c

572

priv->clk = div->clk;

drivers/gpu/drm/pl111/pl111_drm.h

145

struct clk *clk;

drivers/gpu/drm/radeon/btc_dpm.c

1155

if (clock < table->entries[i].clk)

drivers/gpu/drm/radeon/btc_dpm.c

1156

clock = table->entries[i].clk;

drivers/gpu/drm/radeon/btc_dpm.c

1170

if (clock <= table->entries[i].clk) {

drivers/gpu/drm/radeon/btc_dpm.c

2561

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;

drivers/gpu/drm/radeon/btc_dpm.c

2563

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;

drivers/gpu/drm/radeon/btc_dpm.c

2565

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;

drivers/gpu/drm/radeon/btc_dpm.c

2567

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;

drivers/gpu/drm/radeon/ci_dpm.c

2271

if (mclk <= rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries[i].clk) {

drivers/gpu/drm/radeon/ci_dpm.c

2397

if (allowed_clock_voltage_table->entries[i].clk >= clock) {

drivers/gpu/drm/radeon/ci_dpm.c

2550

if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[level].clk >=

drivers/gpu/drm/radeon/ci_dpm.c

2558

if (rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries[level].clk >=

drivers/gpu/drm/radeon/ci_dpm.c

2692

rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[count].clk;

drivers/gpu/drm/radeon/ci_dpm.c

2724

rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[count].clk;

drivers/gpu/drm/radeon/ci_dpm.c

3437

allowed_sclk_vddc_table->entries[i].clk)) {

drivers/gpu/drm/radeon/ci_dpm.c

3439

allowed_sclk_vddc_table->entries[i].clk;

drivers/gpu/drm/radeon/ci_dpm.c

3450

allowed_mclk_table->entries[i].clk)) {

drivers/gpu/drm/radeon/ci_dpm.c

3452

allowed_mclk_table->entries[i].clk;

drivers/gpu/drm/radeon/ci_dpm.c

3748

if (rdev->clock.current_dispclk == disp_voltage_table->entries[i].clk)

drivers/gpu/drm/radeon/ci_dpm.c

4893

allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk;

drivers/gpu/drm/radeon/ci_dpm.c

4895

allowed_mclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk;

drivers/gpu/drm/radeon/ci_dpm.c

5749

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;

drivers/gpu/drm/radeon/ci_dpm.c

5751

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;

drivers/gpu/drm/radeon/ci_dpm.c

5753

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;

drivers/gpu/drm/radeon/ci_dpm.c

5755

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;

drivers/gpu/drm/radeon/ci_smc.c

157

u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);

drivers/gpu/drm/radeon/ci_smc.c

160

if (!(clk & CK_DISABLE) && (0x20100 <= pc_c))

drivers/gpu/drm/radeon/kv_dpm.c

1374

if (table->entries[i].clk >= 0) /* XXX */

drivers/gpu/drm/radeon/kv_dpm.c

1536

if ((table->entries[i].clk >= new_ps->levels[0].sclk) ||

drivers/gpu/drm/radeon/kv_dpm.c

1544

if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)

drivers/gpu/drm/radeon/kv_dpm.c

1550

if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) >

drivers/gpu/drm/radeon/kv_dpm.c

1551

(table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))

drivers/gpu/drm/radeon/kv_dpm.c

1965

if (stable_p_state_sclk >= table->entries[i].clk) {

drivers/gpu/drm/radeon/kv_dpm.c

1966

stable_p_state_sclk = table->entries[i].clk;

drivers/gpu/drm/radeon/kv_dpm.c

1972

stable_p_state_sclk = table->entries[0].clk;

drivers/gpu/drm/radeon/kv_dpm.c

1995

ps->levels[i].sclk = table->entries[limit].clk;

drivers/gpu/drm/radeon/kv_dpm.c

2161

kv_set_divider_value(rdev, i, table->entries[i].clk);

drivers/gpu/drm/radeon/kv_dpm.c

565

if (table->entries[i].clk == pi->boot_pl.sclk)

drivers/gpu/drm/radeon/kv_dpm.c

634

static u32 kv_get_clk_bypass(struct radeon_device *rdev, u32 clk)

drivers/gpu/drm/radeon/kv_dpm.c

640

if (kv_get_clock_difference(clk, 40000) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

642

else if (kv_get_clock_difference(clk, 30000) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

644

else if (kv_get_clock_difference(clk, 20000) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

646

else if (kv_get_clock_difference(clk, 15000) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

648

else if (kv_get_clock_difference(clk, 10000) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

811

pi->samu_level[i].Frequency = cpu_to_be32(table->entries[i].clk);

drivers/gpu/drm/radeon/kv_dpm.c

815

(u8)kv_get_clk_bypass(rdev, table->entries[i].clk);

drivers/gpu/drm/radeon/kv_dpm.c

818

table->entries[i].clk, false, &dividers);

drivers/gpu/drm/radeon/kv_dpm.c

873

pi->acp_level[i].Frequency = cpu_to_be32(table->entries[i].clk);

drivers/gpu/drm/radeon/kv_dpm.c

877

table->entries[i].clk, false, &dividers);

drivers/gpu/drm/radeon/kv_dpm.c

927

if (kv_get_clock_difference(table->entries[i].clk, 40000) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

929

else if (kv_get_clock_difference(table->entries[i].clk, 30000) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

931

else if (kv_get_clock_difference(table->entries[i].clk, 26600) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

933

else if (kv_get_clock_difference(table->entries[i].clk, 20000) < 200)

drivers/gpu/drm/radeon/kv_dpm.c

935

else if (kv_get_clock_difference(table->entries[i].clk, 10000) < 200)

drivers/gpu/drm/radeon/ni_dpm.c

4086

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;

drivers/gpu/drm/radeon/ni_dpm.c

4088

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;

drivers/gpu/drm/radeon/ni_dpm.c

4090

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;

drivers/gpu/drm/radeon/ni_dpm.c

4092

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;

drivers/gpu/drm/radeon/r600_dpm.c

1185

rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk =

drivers/gpu/drm/radeon/r600_dpm.c

1243

rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk =

drivers/gpu/drm/radeon/r600_dpm.c

831

radeon_table->entries[i].clk = le16_to_cpu(entry->usClockLow) |

drivers/gpu/drm/radeon/radeon.h

1380

u32 clk;

drivers/gpu/drm/radeon/radeon_atombios.c

3320

cpu_to_le32(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk);

drivers/gpu/drm/radeon/radeon_combios.c

632

u8 id, blocks, clk, data;

drivers/gpu/drm/radeon/radeon_combios.c

643

clk = RBIOS8(offset + 3 + (i * 5) + 3);

drivers/gpu/drm/radeon/radeon_combios.c

647

(1 << clk), (1 << data));

drivers/gpu/drm/radeon/si_dpm.c

5106

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) {

drivers/gpu/drm/radeon/si_dpm.c

6909

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;

drivers/gpu/drm/radeon/si_dpm.c

6911

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;

drivers/gpu/drm/radeon/si_dpm.c

6913

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;

drivers/gpu/drm/radeon/si_dpm.c

6915

rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;

drivers/gpu/drm/radeon/si_smc.c

164

u32 clk = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);

drivers/gpu/drm/radeon/si_smc.c

166

if (!(rst & RST_REG) && !(clk & CK_DISABLE))

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1241

struct clk *clk;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1262

clk = devm_clk_get(rcdu->dev, clk_name);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1263

if (!IS_ERR(clk)) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1264

rcrtc->extclock = clk;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1265

} else if (PTR_ERR(clk) == -EPROBE_DEFER) {

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

1272

ret = PTR_ERR(clk);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

167

struct clk *clk;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

173

static void rcar_du_escr_divider(struct clk *clk, unsigned long target,

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

191

rate = clk_round_rate(clk, target);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

200

params->clk = clk;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

264

mode_clock, params.clk == rcrtc->clock ? "cpg" : "ext",

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.c

267

clk_set_rate(params.clk, params.rate);

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h

51

struct clk *clock;

drivers/gpu/drm/renesas/rcar-du/rcar_du_crtc.h

52

struct clk *extclock;

drivers/gpu/drm/renesas/rcar-du/rcar_du_drv.h

23

struct clk;

drivers/gpu/drm/renesas/rcar-du/rcar_du_regs.h

265

#define DIDSR_PDCS_CLK(n, clk) (clk << ((n) * 2))

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

141

static void rcar_lvds_d3_e3_pll_calc(struct rcar_lvds *lvds, struct clk *clk,

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

153

if (!clk)

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

186

fin = clk_get_rate(clk);

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

267

clk, fin, output, target, error / 100,

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

74

struct clk *mod; /* CPG module clock */

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

75

struct clk *extal; /* External clock */

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

76

struct clk *dotclkin[2]; /* External DU clocks */

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

816

static struct clk *rcar_lvds_get_clock(struct rcar_lvds *lvds, const char *name,

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

819

struct clk *clk;

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

821

clk = devm_clk_get(lvds->dev, name);

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

822

if (!IS_ERR(clk))

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

823

return clk;

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

825

if (PTR_ERR(clk) == -ENOENT && optional)

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

828

dev_err_probe(lvds->dev, PTR_ERR(clk), "failed to get %s clock\n",

drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c

831

return clk;

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

1206

static struct clk *rcar_mipi_dsi_get_clock(struct rcar_mipi_dsi *dsi,

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

1210

struct clk *clk;

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

1212

clk = devm_clk_get(dsi->dev, name);

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

1213

if (!IS_ERR(clk))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

1214

return clk;

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

1216

if (PTR_ERR(clk) == -ENOENT && optional)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

1219

dev_err_probe(dsi->dev, PTR_ERR(clk), "failed to get %s clock\n",

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

1222

return clk;

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

385

struct clk *clk, unsigned long target,

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

413

fin_rate = clk_get_rate(clk);

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

69

struct clk *mod;

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

70

struct clk *pll;

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c

71

struct clk *dsi;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h

23

struct clk;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h

59

struct clk *aclk;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h

60

struct clk *pclk;

drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.h

61

struct clk *dclk;

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

83

struct clk *vclk;

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

84

struct clk *lpclk;

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

43

struct clk *clk;

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

63

clk = devm_clk_get(sdev->dev, clkname);

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

64

if (IS_ERR(clk)) {

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

66

return PTR_ERR(clk);

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

69

sdev->clock = clk;

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.h

19

struct clk;

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.h

34

struct clk *clock;

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

73

struct clk *pclk;

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

74

struct clk *grfclk;

drivers/gpu/drm/rockchip/cdn-dp-core.h

86

struct clk *core_clk;

drivers/gpu/drm/rockchip/cdn-dp-core.h

87

struct clk *pclk;

drivers/gpu/drm/rockchip/cdn-dp-core.h

88

struct clk *spdif_clk;

drivers/gpu/drm/rockchip/cdn-dp-core.h

89

struct clk *grf_clk;

drivers/gpu/drm/rockchip/cdn-dp-reg.c

26

void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk)

drivers/gpu/drm/rockchip/cdn-dp-reg.c

28

writel(clk / 1000000, dp->regs + SW_CLK_H);

drivers/gpu/drm/rockchip/cdn-dp-reg.h

456

void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk);

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

279

struct clk *pclk;

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

280

struct clk *pllref_clk;

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

281

struct clk *grf_clk;

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

282

struct clk *phy_cfg_clk;

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

78

struct clk *hdmiphy_clk;

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

79

struct clk *ref_clk;

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

80

struct clk *grf_clk;

drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c

474

struct clk *ref_clk;

drivers/gpu/drm/rockchip/rk3066_hdmi.c

50

struct clk *hclk;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

176

struct clk *hclk;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

178

struct clk *dclk;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

180

struct clk *aclk;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

239

struct clk *dclk;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

240

struct clk *dclk_src;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

327

struct clk *hclk;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

328

struct clk *aclk;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

329

struct clk *pclk;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

330

struct clk *pll_hdmiphy0;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

331

struct clk *pll_hdmiphy1;

drivers/gpu/drm/rockchip/rockchip_lvds.c

52

struct clk *pclk;

drivers/gpu/drm/sti/sti_compositor.h

70

struct clk *clk_compo_main;

drivers/gpu/drm/sti/sti_compositor.h

71

struct clk *clk_compo_aux;

drivers/gpu/drm/sti/sti_compositor.h

72

struct clk *clk_pix_main;

drivers/gpu/drm/sti/sti_compositor.h

73

struct clk *clk_pix_aux;

drivers/gpu/drm/sti/sti_crtc.c

54

struct clk *compo_clk, *pix_clk;

drivers/gpu/drm/sti/sti_dvo.c

230

clk_disable_unprepare(dvo->clk);

drivers/gpu/drm/sti/sti_dvo.c

263

if (clk_prepare_enable(dvo->clk))

drivers/gpu/drm/sti/sti_dvo.c

287

struct clk *clkp;

drivers/gpu/drm/sti/sti_dvo.c

303

clk_set_parent(dvo->clk, clkp);

drivers/gpu/drm/sti/sti_dvo.c

313

ret = clk_set_rate(dvo->clk, rate);

drivers/gpu/drm/sti/sti_dvo.c

528

dvo->clk = devm_clk_get(dev, "dvo");

drivers/gpu/drm/sti/sti_dvo.c

529

if (IS_ERR(dvo->clk)) {

drivers/gpu/drm/sti/sti_dvo.c

531

return PTR_ERR(dvo->clk);

drivers/gpu/drm/sti/sti_dvo.c

91

struct clk *clk_pix;

drivers/gpu/drm/sti/sti_dvo.c

92

struct clk *clk;

drivers/gpu/drm/sti/sti_dvo.c

93

struct clk *clk_main_parent;

drivers/gpu/drm/sti/sti_dvo.c

94

struct clk *clk_aux_parent;

drivers/gpu/drm/sti/sti_gdp.c

127

struct clk *clk_pix;

drivers/gpu/drm/sti/sti_gdp.c

128

struct clk *clk_main_parent;

drivers/gpu/drm/sti/sti_gdp.c

129

struct clk *clk_aux_parent;

drivers/gpu/drm/sti/sti_gdp.c

672

struct clk *clkp;

drivers/gpu/drm/sti/sti_hda.c

252

struct clk *clk_pix;

drivers/gpu/drm/sti/sti_hda.c

253

struct clk *clk_hddac;

drivers/gpu/drm/sti/sti_hdmi.h

72

struct clk *clk_pix;

drivers/gpu/drm/sti/sti_hdmi.h

73

struct clk *clk_tmds;

drivers/gpu/drm/sti/sti_hdmi.h

74

struct clk *clk_phy;

drivers/gpu/drm/sti/sti_hdmi.h

75

struct clk *clk_audio;

drivers/gpu/drm/sti/sti_hqvdp.c

1007

clk_disable_unprepare(hqvdp->clk);

drivers/gpu/drm/sti/sti_hqvdp.c

1377

hqvdp->clk = devm_clk_get(dev, "hqvdp");

drivers/gpu/drm/sti/sti_hqvdp.c

1379

if (IS_ERR(hqvdp->clk) || IS_ERR(hqvdp->clk_pix_main)) {

drivers/gpu/drm/sti/sti_hqvdp.c

351

struct clk *clk;

drivers/gpu/drm/sti/sti_hqvdp.c

352

struct clk *clk_pix_main;

drivers/gpu/drm/sti/sti_hqvdp.c

743

lfw = mode->htotal * (clk_get_rate(hqvdp->clk) / 1000000);

drivers/gpu/drm/sti/sti_hqvdp.c

956

if (clk_prepare_enable(hqvdp->clk))

drivers/gpu/drm/sti/sti_hqvdp.c

970

clk_disable_unprepare(hqvdp->clk);

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

204

#define clk_to_dw_mipi_dsi_stm(clk) \

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

205

container_of(clk, struct dw_mipi_dsi_stm, txbyte_clk)

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

207

static void dw_mipi_dsi_clk_disable(struct clk_hw *clk)

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

209

struct dw_mipi_dsi_stm *dsi = clk_to_dw_mipi_dsi_stm(clk);

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

220

static int dw_mipi_dsi_clk_enable(struct clk_hw *clk)

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

222

struct dw_mipi_dsi_stm *dsi = clk_to_dw_mipi_dsi_stm(clk);

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

394

ret = clk_prepare_enable(dsi->txbyte_clk.clk);

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

414

clk_disable_unprepare(dsi->txbyte_clk.clk);

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

448

ret = clk_set_rate((dsi->txbyte_clk.clk), pll_out_khz * 1000);

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

83

struct clk *pllref_clk;

drivers/gpu/drm/stm/dw_mipi_dsi-stm.c

84

struct clk *pclk;

drivers/gpu/drm/stm/ltdc.h

50

struct clk *pixel_clk; /* lcd pixel clock */

drivers/gpu/drm/stm/ltdc.h

51

struct clk *lvds_clk; /* lvds pixel clock */

drivers/gpu/drm/stm/ltdc.h

52

struct clk *bus_clk; /* bus clock */

drivers/gpu/drm/stm/lvds.c

258

struct clk *pclk; /* APB peripheral clock */

drivers/gpu/drm/stm/lvds.c

259

struct clk *pllref_clk; /* Reference clock for the internal PLL */

drivers/gpu/drm/sun4i/sun4i_backend.h

175

struct clk *bus_clk;

drivers/gpu/drm/sun4i/sun4i_backend.h

176

struct clk *mod_clk;

drivers/gpu/drm/sun4i/sun4i_backend.h

177

struct clk *ram_clk;

drivers/gpu/drm/sun4i/sun4i_backend.h

179

struct clk *sat_clk;

drivers/gpu/drm/sun4i/sun4i_frontend.h

110

struct clk;

drivers/gpu/drm/sun4i/sun4i_frontend.h

127

struct clk *bus_clk;

drivers/gpu/drm/sun4i/sun4i_frontend.h

128

struct clk *mod_clk;

drivers/gpu/drm/sun4i/sun4i_frontend.h

129

struct clk *ram_clk;

drivers/gpu/drm/sun4i/sun4i_hdmi.h

257

struct clk *bus_clk;

drivers/gpu/drm/sun4i/sun4i_hdmi.h

258

struct clk *mod_clk;

drivers/gpu/drm/sun4i/sun4i_hdmi.h

259

struct clk *ddc_parent_clk;

drivers/gpu/drm/sun4i/sun4i_hdmi.h

260

struct clk *pll0_clk;

drivers/gpu/drm/sun4i/sun4i_hdmi.h

261

struct clk *pll1_clk;

drivers/gpu/drm/sun4i/sun4i_hdmi.h

264

struct clk *ddc_clk;

drivers/gpu/drm/sun4i/sun4i_hdmi.h

265

struct clk *tmds_clk;

drivers/gpu/drm/sun4i/sun4i_hdmi.h

293

int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *clk);

drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c

110

int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *parent)

drivers/gpu/drm/sun4i/sun4i_tcon.c

102

clk = tcon->sclk1;

drivers/gpu/drm/sun4i/sun4i_tcon.c

110

clk_prepare_enable(clk);

drivers/gpu/drm/sun4i/sun4i_tcon.c

111

clk_rate_exclusive_get(clk);

drivers/gpu/drm/sun4i/sun4i_tcon.c

113

clk_rate_exclusive_put(clk);

drivers/gpu/drm/sun4i/sun4i_tcon.c

114

clk_disable_unprepare(clk);

drivers/gpu/drm/sun4i/sun4i_tcon.c

787

tcon->clk = devm_clk_get_enabled(dev, "ahb");

drivers/gpu/drm/sun4i/sun4i_tcon.c

788

if (IS_ERR(tcon->clk)) {

drivers/gpu/drm/sun4i/sun4i_tcon.c

790

return PTR_ERR(tcon->clk);

drivers/gpu/drm/sun4i/sun4i_tcon.c

87

struct clk *clk;

drivers/gpu/drm/sun4i/sun4i_tcon.c

95

clk = tcon->dclk;

drivers/gpu/drm/sun4i/sun4i_tcon.h

261

struct clk *clk;

drivers/gpu/drm/sun4i/sun4i_tcon.h

264

struct clk *sclk0;

drivers/gpu/drm/sun4i/sun4i_tcon.h

265

struct clk *sclk1;

drivers/gpu/drm/sun4i/sun4i_tcon.h

268

struct clk *lvds_pll;

drivers/gpu/drm/sun4i/sun4i_tcon.h

271

struct clk *dclk;

drivers/gpu/drm/sun4i/sun4i_tv.c

166

struct clk *clk;

drivers/gpu/drm/sun4i/sun4i_tv.c

467

tv->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/sun4i/sun4i_tv.c

468

if (IS_ERR(tv->clk)) {

drivers/gpu/drm/sun4i/sun4i_tv.c

470

ret = PTR_ERR(tv->clk);

drivers/gpu/drm/sun4i/sun4i_tv.c

473

clk_prepare_enable(tv->clk);

drivers/gpu/drm/sun4i/sun4i_tv.c

522

clk_disable_unprepare(tv->clk);

drivers/gpu/drm/sun4i/sun4i_tv.c

535

clk_disable_unprepare(tv->clk);

drivers/gpu/drm/sun4i/sun6i_drc.c

17

struct clk *bus_clk;

drivers/gpu/drm/sun4i/sun6i_drc.c

18

struct clk *mod_clk;

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h

28

struct clk *bus_clk;

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h

29

struct clk *mod_clk;

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h

161

struct clk *clk_bus;

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h

162

struct clk *clk_mod;

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h

163

struct clk *clk_phy;

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h

164

struct clk *clk_pll0;

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h

165

struct clk *clk_pll1;

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h

181

struct clk *clk_tmds;

drivers/gpu/drm/sun4i/sun8i_mixer.h

215

struct clk *bus_clk;

drivers/gpu/drm/sun4i/sun8i_mixer.h

216

struct clk *mod_clk;

drivers/gpu/drm/sun4i/sun8i_tcon_top.h

27

struct clk *bus;

drivers/gpu/drm/sysfb/simpledrm.c

211

struct clk **clks;

drivers/gpu/drm/sysfb/simpledrm.c

275

struct clk *clock;

drivers/gpu/drm/tegra/dc.c

1414

copy->clk = state->clk;

drivers/gpu/drm/tegra/dc.c

1865

struct clk *clk, unsigned long pclk,

drivers/gpu/drm/tegra/dc.c

1870

if (!clk_has_parent(dc->clk, clk))

drivers/gpu/drm/tegra/dc.c

1873

state->clk = clk;

drivers/gpu/drm/tegra/dc.c

1891

rate = DIV_ROUND_UP(clk_get_rate(dc->clk) * 2, state->div + 2);

drivers/gpu/drm/tegra/dc.c

1931

err = clk_set_parent(dc->clk, state->clk);

drivers/gpu/drm/tegra/dc.c

1944

err = clk_set_rate(state->clk, state->pclk);

drivers/gpu/drm/tegra/dc.c

1950

err = clk_set_rate(dc->clk, state->pclk);

drivers/gpu/drm/tegra/dc.c

1953

dc->clk, state->pclk, err);

drivers/gpu/drm/tegra/dc.c

1956

DRM_DEBUG_KMS("rate: %lu, div: %u\n", clk_get_rate(dc->clk),

drivers/gpu/drm/tegra/dc.c

2785

clk_disable_unprepare(dc->clk);

drivers/gpu/drm/tegra/dc.c

2804

err = tegra_powergate_sequence_power_up(dc->powergate, dc->clk,

drivers/gpu/drm/tegra/dc.c

2811

err = clk_prepare_enable(dc->clk);

drivers/gpu/drm/tegra/dc.c

2827

clk_disable_unprepare(dc->clk);

drivers/gpu/drm/tegra/dc.c

3204

dc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/gpu/drm/tegra/dc.c

3205

if (IS_ERR(dc->clk)) {

drivers/gpu/drm/tegra/dc.c

3207

return PTR_ERR(dc->clk);

drivers/gpu/drm/tegra/dc.c

3217

err = clk_prepare_enable(dc->clk);

drivers/gpu/drm/tegra/dc.c

3225

clk_disable_unprepare(dc->clk);

drivers/gpu/drm/tegra/dc.c

3231

clk_disable_unprepare(dc->clk);

drivers/gpu/drm/tegra/dc.h

165

struct clk *clk, unsigned long pclk,

drivers/gpu/drm/tegra/dc.h

23

struct clk *clk;

drivers/gpu/drm/tegra/dc.h

91

struct clk *clk;

drivers/gpu/drm/tegra/dpaux.c

481

dpaux->clk = devm_clk_get(&pdev->dev, NULL);

drivers/gpu/drm/tegra/dpaux.c

482

if (IS_ERR(dpaux->clk)) {

drivers/gpu/drm/tegra/dpaux.c

484

PTR_ERR(dpaux->clk));

drivers/gpu/drm/tegra/dpaux.c

485

return PTR_ERR(dpaux->clk);

drivers/gpu/drm/tegra/dpaux.c

51

struct clk *clk_parent;

drivers/gpu/drm/tegra/dpaux.c

52

struct clk *clk;

drivers/gpu/drm/tegra/dpaux.c

614

clk_disable_unprepare(dpaux->clk);

drivers/gpu/drm/tegra/dpaux.c

624

err = clk_prepare_enable(dpaux->clk);

drivers/gpu/drm/tegra/dpaux.c

653

clk_disable_unprepare(dpaux->clk);

drivers/gpu/drm/tegra/dsi.c

1103

clk_disable_unprepare(dsi->clk);

drivers/gpu/drm/tegra/dsi.c

1129

err = clk_prepare_enable(dsi->clk);

drivers/gpu/drm/tegra/dsi.c

1156

clk_disable_unprepare(dsi->clk);

drivers/gpu/drm/tegra/dsi.c

1173

struct clk *parent;

drivers/gpu/drm/tegra/dsi.c

1176

parent = clk_get_parent(dsi->clk);

drivers/gpu/drm/tegra/dsi.c

1455

struct clk *parent;

drivers/gpu/drm/tegra/dsi.c

1459

parent = clk_get_parent(dsi->slave->clk);

drivers/gpu/drm/tegra/dsi.c

1595

dsi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/gpu/drm/tegra/dsi.c

1596

if (IS_ERR(dsi->clk)) {

drivers/gpu/drm/tegra/dsi.c

1597

err = dev_err_probe(&pdev->dev, PTR_ERR(dsi->clk),

drivers/gpu/drm/tegra/dsi.c

64

struct clk *clk_parent;

drivers/gpu/drm/tegra/dsi.c

65

struct clk *clk_lp;

drivers/gpu/drm/tegra/dsi.c

66

struct clk *clk;

drivers/gpu/drm/tegra/gr2d.c

254

gr2d->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/tegra/gr2d.c

255

if (IS_ERR(gr2d->clk)) {

drivers/gpu/drm/tegra/gr2d.c

257

return PTR_ERR(gr2d->clk);

drivers/gpu/drm/tegra/gr2d.c

333

clk_disable_unprepare(gr2d->clk);

drivers/gpu/drm/tegra/gr2d.c

34

struct clk *clk;

drivers/gpu/drm/tegra/gr2d.c

355

err = clk_prepare_enable(gr2d->clk);

drivers/gpu/drm/tegra/gr2d.c

377

clk_disable_unprepare(gr2d->clk);

drivers/gpu/drm/tegra/gr3d.c

313

struct clk *clk;

drivers/gpu/drm/tegra/gr3d.c

326

clk = gr3d->clocks[0].clk;

drivers/gpu/drm/tegra/gr3d.c

333

clk = gr3d->clocks[i].clk;

drivers/gpu/drm/tegra/gr3d.c

356

err = tegra_powergate_sequence_power_up(id, clk, reset);

drivers/gpu/drm/tegra/gr3d.c

368

clk_disable_unprepare(clk);

drivers/gpu/drm/tegra/hdmi.c

1147

struct clk *parent;

drivers/gpu/drm/tegra/hdmi.c

1247

DRM_DEBUG_KMS("HDMI clock rate: %lu Hz\n", clk_get_rate(hdmi->clk));

drivers/gpu/drm/tegra/hdmi.c

1296

div82 = clk_get_rate(hdmi->clk) / 1000000 * 4;

drivers/gpu/drm/tegra/hdmi.c

1671

clk_disable_unprepare(hdmi->clk);

drivers/gpu/drm/tegra/hdmi.c

1689

err = clk_prepare_enable(hdmi->clk);

drivers/gpu/drm/tegra/hdmi.c

1706

clk_disable_unprepare(hdmi->clk);

drivers/gpu/drm/tegra/hdmi.c

1814

hdmi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/gpu/drm/tegra/hdmi.c

1815

if (IS_ERR(hdmi->clk)) {

drivers/gpu/drm/tegra/hdmi.c

1817

return PTR_ERR(hdmi->clk);

drivers/gpu/drm/tegra/hdmi.c

1830

err = clk_set_parent(hdmi->clk, hdmi->clk_parent);

drivers/gpu/drm/tegra/hdmi.c

76

struct clk *clk_parent;

drivers/gpu/drm/tegra/hdmi.c

77

struct clk *clk;

drivers/gpu/drm/tegra/hub.c

1055

struct clk *clk;

drivers/gpu/drm/tegra/hub.c

1122

hub->clk_heads = devm_kcalloc(&pdev->dev, hub->num_heads, sizeof(clk),

drivers/gpu/drm/tegra/hub.c

1135

clk = devm_get_clk_from_child(&pdev->dev, child, "dc");

drivers/gpu/drm/tegra/hub.c

1136

if (IS_ERR(clk)) {

drivers/gpu/drm/tegra/hub.c

1140

return PTR_ERR(clk);

drivers/gpu/drm/tegra/hub.c

1143

hub->clk_heads[i] = clk;

drivers/gpu/drm/tegra/hub.c

874

if (!hub_state->clk || dc->pclk > hub_state->rate) {

drivers/gpu/drm/tegra/hub.c

876

hub_state->clk = hub_state->dc->clk;

drivers/gpu/drm/tegra/hub.c

923

if (hub_state->clk) {

drivers/gpu/drm/tegra/hub.c

924

err = clk_set_rate(hub_state->clk, hub_state->rate);

drivers/gpu/drm/tegra/hub.c

927

hub_state->clk, hub_state->rate);

drivers/gpu/drm/tegra/hub.c

929

err = clk_set_parent(hub->clk_disp, hub_state->clk);

drivers/gpu/drm/tegra/hub.c

932

hub->clk_disp, hub_state->clk, err);

drivers/gpu/drm/tegra/hub.h

43

struct clk *clk_disp;

drivers/gpu/drm/tegra/hub.h

44

struct clk *clk_dsc;

drivers/gpu/drm/tegra/hub.h

45

struct clk *clk_hub;

drivers/gpu/drm/tegra/hub.h

49

struct clk **clk_heads;

drivers/gpu/drm/tegra/hub.h

66

struct clk *clk;

drivers/gpu/drm/tegra/nvdec.c

466

err = clk_set_rate(nvdec->clks[0].clk, ULONG_MAX);

drivers/gpu/drm/tegra/nvjpg.c

178

err = clk_prepare_enable(nvjpg->clk);

drivers/gpu/drm/tegra/nvjpg.c

195

clk_disable_unprepare(nvjpg->clk);

drivers/gpu/drm/tegra/nvjpg.c

203

clk_disable_unprepare(nvjpg->clk);

drivers/gpu/drm/tegra/nvjpg.c

256

nvjpg->clk = devm_clk_get(dev, "nvjpg");

drivers/gpu/drm/tegra/nvjpg.c

257

if (IS_ERR(nvjpg->clk)) {

drivers/gpu/drm/tegra/nvjpg.c

259

return PTR_ERR(nvjpg->clk);

drivers/gpu/drm/tegra/nvjpg.c

262

err = clk_set_rate(nvjpg->clk, ULONG_MAX);

drivers/gpu/drm/tegra/nvjpg.c

27

struct clk *clk;

drivers/gpu/drm/tegra/rgb.c

183

div = ((clk_get_rate(rgb->clk) * 2) / pclk) - 2;

drivers/gpu/drm/tegra/rgb.c

21

struct clk *pll_d_out0;

drivers/gpu/drm/tegra/rgb.c

22

struct clk *pll_d2_out0;

drivers/gpu/drm/tegra/rgb.c

23

struct clk *clk_parent;

drivers/gpu/drm/tegra/rgb.c

237

rgb->clk = devm_clk_get(dc->dev, NULL);

drivers/gpu/drm/tegra/rgb.c

238

if (IS_ERR(rgb->clk)) {

drivers/gpu/drm/tegra/rgb.c

24

struct clk *clk;

drivers/gpu/drm/tegra/rgb.c

240

err = PTR_ERR(rgb->clk);

drivers/gpu/drm/tegra/rgb.c

251

err = clk_set_parent(rgb->clk, rgb->clk_parent);

drivers/gpu/drm/tegra/sor.c

2278

div = clk_get_rate(sor->clk) / 1000000 * 4;

drivers/gpu/drm/tegra/sor.c

2416

err = clk_set_parent(sor->clk, sor->clk_parent);

drivers/gpu/drm/tegra/sor.c

2431

clk_set_rate(sor->clk, rate);

drivers/gpu/drm/tegra/sor.c

2860

err = clk_set_parent(sor->clk, sor->clk_parent);

drivers/gpu/drm/tegra/sor.c

3133

err = clk_prepare_enable(sor->clk);

drivers/gpu/drm/tegra/sor.c

3146

clk_disable_unprepare(sor->clk);

drivers/gpu/drm/tegra/sor.c

3156

clk_disable_unprepare(sor->clk);

drivers/gpu/drm/tegra/sor.c

3163

clk_disable_unprepare(sor->clk);

drivers/gpu/drm/tegra/sor.c

3193

clk_disable_unprepare(sor->clk);

drivers/gpu/drm/tegra/sor.c

3216

clk_disable_unprepare(sor->clk);

drivers/gpu/drm/tegra/sor.c

3234

err = clk_prepare_enable(sor->clk);

drivers/gpu/drm/tegra/sor.c

3261

clk_disable_unprepare(sor->clk);

drivers/gpu/drm/tegra/sor.c

3825

sor->clk = devm_clk_get(&pdev->dev, NULL);

drivers/gpu/drm/tegra/sor.c

3826

if (IS_ERR(sor->clk)) {

drivers/gpu/drm/tegra/sor.c

3827

err = PTR_ERR(sor->clk);

drivers/gpu/drm/tegra/sor.c

3855

sor->clk_out = sor->clk;

drivers/gpu/drm/tegra/sor.c

418

struct clk *clk_parent;

drivers/gpu/drm/tegra/sor.c

419

struct clk *clk_safe;

drivers/gpu/drm/tegra/sor.c

420

struct clk *clk_out;

drivers/gpu/drm/tegra/sor.c

421

struct clk *clk_pad;

drivers/gpu/drm/tegra/sor.c

422

struct clk *clk_dp;

drivers/gpu/drm/tegra/sor.c

423

struct clk *clk;

drivers/gpu/drm/tegra/sor.c

503

static int tegra_sor_set_parent_clock(struct tegra_sor *sor, struct clk *parent)

drivers/gpu/drm/tegra/sor.c

507

clk_disable_unprepare(sor->clk);

drivers/gpu/drm/tegra/sor.c

513

err = clk_prepare_enable(sor->clk);

drivers/gpu/drm/tegra/sor.c

597

static struct clk *tegra_clk_sor_pad_register(struct tegra_sor *sor,

drivers/gpu/drm/tegra/sor.c

602

struct clk *clk;

drivers/gpu/drm/tegra/sor.c

618

clk = devm_clk_register(sor->dev, &pad->hw);

drivers/gpu/drm/tegra/sor.c

620

return clk;

drivers/gpu/drm/tegra/vic.c

311

err = clk_prepare_enable(vic->clk);

drivers/gpu/drm/tegra/vic.c

336

clk_disable_unprepare(vic->clk);

drivers/gpu/drm/tegra/vic.c

353

clk_disable_unprepare(vic->clk);

drivers/gpu/drm/tegra/vic.c

36

struct clk *clk;

drivers/gpu/drm/tegra/vic.c

476

vic->clk = devm_clk_get(dev, NULL);

drivers/gpu/drm/tegra/vic.c

477

if (IS_ERR(vic->clk)) {

drivers/gpu/drm/tegra/vic.c

479

return PTR_ERR(vic->clk);

drivers/gpu/drm/tegra/vic.c

482

err = clk_set_rate(vic->clk, ULONG_MAX);

drivers/gpu/drm/tidss/tidss_dispc.c

3022

struct clk *clk;

drivers/gpu/drm/tidss/tidss_dispc.c

3034

clk = devm_clk_get(dev, dispc->feat->vpclk_name[i]);

drivers/gpu/drm/tidss/tidss_dispc.c

3035

if (IS_ERR(clk)) {

drivers/gpu/drm/tidss/tidss_dispc.c

3037

dispc->feat->vpclk_name[i], PTR_ERR(clk));

drivers/gpu/drm/tidss/tidss_dispc.c

3038

return PTR_ERR(clk);

drivers/gpu/drm/tidss/tidss_dispc.c

3040

dispc->vp_clk[i] = clk;

drivers/gpu/drm/tidss/tidss_dispc.c

464

struct clk *vp_clk[TIDSS_MAX_PORTS];

drivers/gpu/drm/tidss/tidss_dispc.c

468

struct clk *fclk;

drivers/gpu/drm/tidss/tidss_oldi.c

36

struct clk *serial;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

216

ret = clk_set_rate(priv->clk, pclk_rate * clkdiv);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

217

clk_rate = clk_get_rate(priv->clk);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

884

if (tilcdc_crtc->lcd_fck_rate != clk_get_rate(priv->clk)) {

drivers/gpu/drm/tilcdc/tilcdc_drv.c

182

if (priv->clk)

drivers/gpu/drm/tilcdc/tilcdc_drv.c

183

clk_put(priv->clk);

drivers/gpu/drm/tilcdc/tilcdc_drv.c

232

priv->clk = clk_get(dev, "fck");

drivers/gpu/drm/tilcdc/tilcdc_drv.c

233

if (IS_ERR(priv->clk)) {

drivers/gpu/drm/tilcdc/tilcdc_drv.c

395

clk_put(priv->clk);

drivers/gpu/drm/tilcdc/tilcdc_drv.h

15

struct clk;

drivers/gpu/drm/tilcdc/tilcdc_drv.h

46

struct clk *clk; /* functional clock */

drivers/gpu/drm/tiny/arcpgu.c

149

rate = clk_round_rate(arcpgu->clk, clk_rate);

drivers/gpu/drm/tiny/arcpgu.c

194

clk_set_rate(arcpgu->clk, m->crtc_clock * 1000);

drivers/gpu/drm/tiny/arcpgu.c

205

clk_prepare_enable(arcpgu->clk);

drivers/gpu/drm/tiny/arcpgu.c

215

clk_disable_unprepare(arcpgu->clk);

drivers/gpu/drm/tiny/arcpgu.c

258

arcpgu->clk = devm_clk_get(drm->dev, "pxlclk");

drivers/gpu/drm/tiny/arcpgu.c

259

if (IS_ERR(arcpgu->clk))

drivers/gpu/drm/tiny/arcpgu.c

260

return PTR_ERR(arcpgu->clk);

drivers/gpu/drm/tiny/arcpgu.c

343

unsigned long clkrate = clk_get_rate(arcpgu->clk);

drivers/gpu/drm/tiny/arcpgu.c

54

struct clk *clk;

drivers/gpu/drm/tve200/tve200_display.c

137

clk_prepare_enable(priv->clk);

drivers/gpu/drm/tve200/tve200_display.c

255

clk_disable_unprepare(priv->clk);

drivers/gpu/drm/tve200/tve200_drm.h

113

struct clk *pclk;

drivers/gpu/drm/tve200/tve200_drm.h

114

struct clk *clk;

drivers/gpu/drm/tve200/tve200_drm.h

20

struct clk;

drivers/gpu/drm/tve200/tve200_drv.c

189

priv->clk = devm_clk_get(dev, "TVE");

drivers/gpu/drm/tve200/tve200_drv.c

190

if (IS_ERR(priv->clk)) {

drivers/gpu/drm/tve200/tve200_drv.c

192

ret = PTR_ERR(priv->clk);

drivers/gpu/drm/v3d/v3d_drv.c

363

v3d->clk = devm_clk_get_optional(dev, NULL);

drivers/gpu/drm/v3d/v3d_drv.c

364

if (IS_ERR(v3d->clk))

drivers/gpu/drm/v3d/v3d_drv.c

365

return dev_err_probe(dev, PTR_ERR(v3d->clk), "Failed to get V3D clock\n");

drivers/gpu/drm/v3d/v3d_drv.c

367

ret = clk_prepare_enable(v3d->clk);

drivers/gpu/drm/v3d/v3d_drv.c

458

clk_disable_unprepare(v3d->clk);

drivers/gpu/drm/v3d/v3d_drv.c

479

clk_disable_unprepare(v3d->clk);

drivers/gpu/drm/v3d/v3d_drv.h

136

struct clk *clk;

drivers/gpu/drm/v3d/v3d_drv.h

18

struct clk;

drivers/gpu/drm/vc4/vc4_dpi.c

95

struct clk *pixel_clock;

drivers/gpu/drm/vc4/vc4_dpi.c

96

struct clk *core_clock;

drivers/gpu/drm/vc4/vc4_drv.h

296

struct clk *clk;

drivers/gpu/drm/vc4/vc4_drv.h

322

struct clk *core_clk;

drivers/gpu/drm/vc4/vc4_drv.h

323

struct clk *disp_clk;

drivers/gpu/drm/vc4/vc4_dsi.c

580

struct clk *escape_clock;

drivers/gpu/drm/vc4/vc4_dsi.c

585

struct clk *pll_phy_clock;

drivers/gpu/drm/vc4/vc4_dsi.c

595

struct clk *pixel_clock;

drivers/gpu/drm/vc4/vc4_dsi.c

843

struct clk *phy_parent = clk_get_parent(dsi->pll_phy_clock);

drivers/gpu/drm/vc4/vc4_hdmi.h

154

struct clk *cec_clock;

drivers/gpu/drm/vc4/vc4_hdmi.h

155

struct clk *pixel_clock;

drivers/gpu/drm/vc4/vc4_hdmi.h

156

struct clk *hsm_clock;

drivers/gpu/drm/vc4/vc4_hdmi.h

157

struct clk *audio_clock;

drivers/gpu/drm/vc4/vc4_hdmi.h

158

struct clk *pixel_bvb_clock;

drivers/gpu/drm/vc4/vc4_v3d.c

381

clk_disable_unprepare(v3d->clk);

drivers/gpu/drm/vc4/vc4_v3d.c

392

ret = clk_prepare_enable(v3d->clk);

drivers/gpu/drm/vc4/vc4_v3d.c

446

v3d->clk = devm_clk_get_optional(dev, NULL);

drivers/gpu/drm/vc4/vc4_v3d.c

447

if (IS_ERR(v3d->clk))

drivers/gpu/drm/vc4/vc4_v3d.c

448

return dev_err_probe(dev, PTR_ERR(v3d->clk), "Failed to get V3D clock\n");

drivers/gpu/drm/vc4/vc4_vec.c

204

struct clk *clock;

drivers/gpu/drm/xlnx/zynqmp_dpsub.h

17

struct clk;

drivers/gpu/drm/xlnx/zynqmp_dpsub.h

68

struct clk *apb_clk;

drivers/gpu/drm/xlnx/zynqmp_dpsub.h

69

struct clk *vid_clk;

drivers/gpu/drm/xlnx/zynqmp_dpsub.h

71

struct clk *aud_clk;

drivers/gpu/host1x/dev.c

596

host->clk = devm_clk_get(&pdev->dev, NULL);

drivers/gpu/host1x/dev.c

597

if (IS_ERR(host->clk))

drivers/gpu/host1x/dev.c

598

return dev_err_probe(&pdev->dev, PTR_ERR(host->clk), "failed to get clock\n");

drivers/gpu/host1x/dev.c

720

clk_disable_unprepare(host->clk);

drivers/gpu/host1x/dev.c

744

err = clk_prepare_enable(host->clk);

drivers/gpu/host1x/dev.c

763

clk_disable_unprepare(host->clk);

drivers/gpu/host1x/dev.h

140

struct clk *clk;

drivers/gpu/host1x/intr.c

140

u32 hz = clk_get_rate(host->clk);

drivers/gpu/host1x/mipi.c

124

struct clk *clk;

drivers/gpu/host1x/mipi.c

153

err = clk_enable(mipi->clk);

drivers/gpu/host1x/mipi.c

169

clk_disable(mipi->clk);

drivers/gpu/host1x/mipi.c

179

err = clk_enable(mipi->clk);

drivers/gpu/host1x/mipi.c

308

clk_disable(device->mipi->clk);

drivers/gpu/host1x/mipi.c

321

err = clk_enable(device->mipi->clk);

drivers/gpu/host1x/mipi.c

339

u32 clk = 0, data = 0;

drivers/gpu/host1x/mipi.c

346

clk = MIPI_CAL_CONFIG_SELECT |

drivers/gpu/host1x/mipi.c

353

if (soc->has_clk_lane && soc->pads[i].clk != 0)

drivers/gpu/host1x/mipi.c

354

tegra_mipi_writel(device->mipi, clk, soc->pads[i].clk);

drivers/gpu/host1x/mipi.c

419

{ .data = MIPI_CAL_CONFIG_CSIA, .clk = MIPI_CAL_CONFIG_CSIAB_CLK },

drivers/gpu/host1x/mipi.c

420

{ .data = MIPI_CAL_CONFIG_CSIB, .clk = MIPI_CAL_CONFIG_CSIAB_CLK },

drivers/gpu/host1x/mipi.c

421

{ .data = MIPI_CAL_CONFIG_CSIC, .clk = MIPI_CAL_CONFIG_CSICD_CLK },

drivers/gpu/host1x/mipi.c

422

{ .data = MIPI_CAL_CONFIG_CSID, .clk = MIPI_CAL_CONFIG_CSICD_CLK },

drivers/gpu/host1x/mipi.c

423

{ .data = MIPI_CAL_CONFIG_CSIE, .clk = MIPI_CAL_CONFIG_CSIE_CLK },

drivers/gpu/host1x/mipi.c

424

{ .data = MIPI_CAL_CONFIG_DSIA, .clk = MIPI_CAL_CONFIG_DSIA_CLK },

drivers/gpu/host1x/mipi.c

425

{ .data = MIPI_CAL_CONFIG_DSIB, .clk = MIPI_CAL_CONFIG_DSIB_CLK },

drivers/gpu/host1x/mipi.c

463

{ .data = MIPI_CAL_CONFIG_CSIA, .clk = 0 },

drivers/gpu/host1x/mipi.c

464

{ .data = MIPI_CAL_CONFIG_CSIB, .clk = 0 },

drivers/gpu/host1x/mipi.c

465

{ .data = MIPI_CAL_CONFIG_CSIC, .clk = 0 },

drivers/gpu/host1x/mipi.c

466

{ .data = MIPI_CAL_CONFIG_CSID, .clk = 0 },

drivers/gpu/host1x/mipi.c

467

{ .data = MIPI_CAL_CONFIG_CSIE, .clk = 0 },

drivers/gpu/host1x/mipi.c

468

{ .data = MIPI_CAL_CONFIG_CSIF, .clk = 0 },

drivers/gpu/host1x/mipi.c

469

{ .data = MIPI_CAL_CONFIG_DSIA, .clk = MIPI_CAL_CONFIG_DSIA_CLK },

drivers/gpu/host1x/mipi.c

470

{ .data = MIPI_CAL_CONFIG_DSIB, .clk = MIPI_CAL_CONFIG_DSIB_CLK },

drivers/gpu/host1x/mipi.c

471

{ .data = MIPI_CAL_CONFIG_DSIC, .clk = MIPI_CAL_CONFIG_DSIC_CLK },

drivers/gpu/host1x/mipi.c

472

{ .data = MIPI_CAL_CONFIG_DSID, .clk = MIPI_CAL_CONFIG_DSID_CLK },

drivers/gpu/host1x/mipi.c

522

mipi->clk = devm_clk_get_prepared(&pdev->dev, NULL);

drivers/gpu/host1x/mipi.c

523

if (IS_ERR(mipi->clk)) {

drivers/gpu/host1x/mipi.c

525

return PTR_ERR(mipi->clk);

drivers/gpu/host1x/mipi.c

91

unsigned long clk;

drivers/gpu/ipu-v3/ipu-common.c

1354

ipu->clk = devm_clk_get(&pdev->dev, "bus");

drivers/gpu/ipu-v3/ipu-common.c

1355

if (IS_ERR(ipu->clk)) {

drivers/gpu/ipu-v3/ipu-common.c

1356

ret = PTR_ERR(ipu->clk);

drivers/gpu/ipu-v3/ipu-common.c

1363

ret = clk_prepare_enable(ipu->clk);

drivers/gpu/ipu-v3/ipu-common.c

1390

ret = ipu_submodules_init(ipu, pdev, ipu_base, ipu->clk);

drivers/gpu/ipu-v3/ipu-common.c

1411

clk_disable_unprepare(ipu->clk);

drivers/gpu/ipu-v3/ipu-common.c

1423

clk_disable_unprepare(ipu->clk);

drivers/gpu/ipu-v3/ipu-common.c

846

struct clk *ipu_clk)

drivers/gpu/ipu-v3/ipu-csi.c

26

struct clk *clk_ipu; /* IPU bus clock */

drivers/gpu/ipu-v3/ipu-csi.c

679

unsigned long base, u32 module, struct clk *clk_ipu)

drivers/gpu/ipu-v3/ipu-di.c

21

struct clk *clk_di; /* display input clock */

drivers/gpu/ipu-v3/ipu-di.c

22

struct clk *clk_ipu; /* IPU bus clock */

drivers/gpu/ipu-v3/ipu-di.c

23

struct clk *clk_di_pixel; /* resulting pixel clock */

drivers/gpu/ipu-v3/ipu-di.c

392

struct clk *clk;

drivers/gpu/ipu-v3/ipu-di.c

402

clk = di->clk_di;

drivers/gpu/ipu-v3/ipu-di.c

424

clk_set_rate(clk, sig->mode.pixelclock);

drivers/gpu/ipu-v3/ipu-di.c

426

in_rate = clk_get_rate(clk);

drivers/gpu/ipu-v3/ipu-di.c

456

clk = di->clk_ipu;

drivers/gpu/ipu-v3/ipu-di.c

463

clk = di->clk_di;

drivers/gpu/ipu-v3/ipu-di.c

465

clk_set_rate(clk, sig->mode.pixelclock);

drivers/gpu/ipu-v3/ipu-di.c

467

in_rate = clk_get_rate(clk);

drivers/gpu/ipu-v3/ipu-di.c

475

di->clk_di_pixel = clk;

drivers/gpu/ipu-v3/ipu-di.c

490

if (clk == di->clk_di)

drivers/gpu/ipu-v3/ipu-di.c

498

clk == di->clk_di ? "DI" : "IPU",

drivers/gpu/ipu-v3/ipu-di.c

713

u32 module, struct clk *clk_ipu)

drivers/gpu/ipu-v3/ipu-dmfc.c

173

struct clk *ipu_clk)

drivers/gpu/ipu-v3/ipu-pre.c

95

struct clk *clk_axi;

drivers/gpu/ipu-v3/ipu-prg.c

74

struct clk *clk_ipg, *clk_axi;

drivers/gpu/ipu-v3/ipu-prv.h

184

struct clk *clk;

drivers/gpu/ipu-v3/ipu-prv.h

220

unsigned long base, u32 module, struct clk *clk_ipu);

drivers/gpu/ipu-v3/ipu-prv.h

235

unsigned long base, u32 module, struct clk *ipu_clk);

drivers/gpu/ipu-v3/ipu-prv.h

239

struct clk *ipu_clk);

drivers/hsi/controllers/omap_ssi.h

141

struct clk *fck;

drivers/hwmon/aspeed-g6-pwm-tach.c

136

struct clk *clk;

drivers/hwmon/aspeed-g6-pwm-tach.c

470

priv->clk = devm_clk_get_enabled(dev, NULL);

drivers/hwmon/aspeed-g6-pwm-tach.c

471

if (IS_ERR(priv->clk))

drivers/hwmon/aspeed-g6-pwm-tach.c

472

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/hwmon/aspeed-g6-pwm-tach.c

474

priv->clk_rate = clk_get_rate(priv->clk);

drivers/hwmon/aspeed-pwm-tacho.c

506

u32 clk;

drivers/hwmon/aspeed-pwm-tacho.c

510

clk = priv->clk_freq;

drivers/hwmon/aspeed-pwm-tacho.c

524

return clk / (clk_unit * div_h * div_l * tacho_div * tacho_unit);

drivers/hwmon/aspeed-pwm-tacho.c

914

struct clk *clk;

drivers/hwmon/aspeed-pwm-tacho.c

945

clk = devm_clk_get(dev, NULL);

drivers/hwmon/aspeed-pwm-tacho.c

946

if (IS_ERR(clk))

drivers/hwmon/aspeed-pwm-tacho.c

948

priv->clk_freq = clk_get_rate(clk);

drivers/hwmon/axi-fan-control.c

450

struct clk *clk;

drivers/hwmon/axi-fan-control.c

468

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/hwmon/axi-fan-control.c

469

if (IS_ERR(clk))

drivers/hwmon/axi-fan-control.c

470

return dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/hwmon/axi-fan-control.c

473

ctl->clk_rate = clk_get_rate(clk);

drivers/hwmon/bt1-pvt.c

666

rate = clk_get_rate(pvt->clks[PVT_CLOCK_REF].clk);

drivers/hwmon/bt1-pvt.c

977

rate = clk_get_rate(pvt->clks[PVT_CLOCK_REF].clk);

drivers/hwmon/g760a.c

114

rpm = rpm_from_cnt(data->act_cnt, data->clk, data->fan_div);

drivers/hwmon/g760a.c

191

data->clk = G760A_DEFAULT_CLK;

drivers/hwmon/g760a.c

40

u32 clk; /* default 32kHz */

drivers/hwmon/g760a.c

61

static inline unsigned int rpm_from_cnt(u8 val, u32 clk, u16 div)

drivers/hwmon/g760a.c

63

return ((val == 0x00) ? 0 : ((clk*30)/(val*div)));

drivers/hwmon/g762.c

121

struct clk *clk;

drivers/hwmon/g762.c

590

clk_disable_unprepare(g762->clk);

drivers/hwmon/g762.c

591

clk_put(g762->clk);

drivers/hwmon/g762.c

598

struct clk *clk;

drivers/hwmon/g762.c

619

clk = of_clk_get(client->dev.of_node, 0);

drivers/hwmon/g762.c

620

if (IS_ERR(clk)) {

drivers/hwmon/g762.c

622

return PTR_ERR(clk);

drivers/hwmon/g762.c

625

ret = clk_prepare_enable(clk);

drivers/hwmon/g762.c

631

clk_freq = clk_get_rate(clk);

drivers/hwmon/g762.c

638

data->clk = clk;

drivers/hwmon/g762.c

649

clk_disable_unprepare(clk);

drivers/hwmon/g762.c

652

clk_put(clk);

drivers/hwmon/lan966x-hwmon.c

348

hwmon->clk = devm_clk_get_enabled(dev, NULL);

drivers/hwmon/lan966x-hwmon.c

349

if (IS_ERR(hwmon->clk))

drivers/hwmon/lan966x-hwmon.c

350

return dev_err_probe(dev, PTR_ERR(hwmon->clk),

drivers/hwmon/lan966x-hwmon.c

353

hwmon->clk_rate = clk_get_rate(hwmon->clk);

drivers/hwmon/lan966x-hwmon.c

74

struct clk *clk;

drivers/hwmon/ltc2947-core.c

935

struct clk *extclk;

drivers/hwmon/ltc4282.c

1133

struct clk *clkin;

drivers/hwmon/mr75203.c

172

struct clk *clk;

drivers/hwmon/mr75203.c

401

sys_freq = clk_get_rate(pvt->clk) / HZ_PER_MHZ;

drivers/hwmon/mr75203.c

426

pvt->ip_freq = clk_get_rate(pvt->clk) / (key + 2);

drivers/hwmon/mr75203.c

784

pvt->clk = devm_clk_get_enabled(dev, NULL);

drivers/hwmon/mr75203.c

785

if (IS_ERR(pvt->clk))

drivers/hwmon/mr75203.c

786

return dev_err_probe(dev, PTR_ERR(pvt->clk), "failed to get clock\n");

drivers/hwmon/npcm750-pwm-fan.c

198

struct clk *pwm_clk;

drivers/hwmon/npcm750-pwm-fan.c

199

struct clk *fan_clk;

drivers/hwmon/nsa320-hwmon.c

171

hwmon->clk = devm_gpiod_get(&pdev->dev, "clk", GPIOD_OUT_HIGH);

drivers/hwmon/nsa320-hwmon.c

172

if (IS_ERR(hwmon->clk))

drivers/hwmon/nsa320-hwmon.c

173

return PTR_ERR(hwmon->clk);

drivers/hwmon/nsa320-hwmon.c

43

struct gpio_desc *clk;

drivers/hwmon/nsa320-hwmon.c

82

gpiod_set_value(hwmon->clk, 0);

drivers/hwmon/nsa320-hwmon.c

84

gpiod_set_value(hwmon->clk, 1);

drivers/hwmon/sfctemp.c

52

struct clk *clk_sense;

drivers/hwmon/sfctemp.c

53

struct clk *clk_bus;

drivers/hwmon/sparx5-temp.c

118

hwmon->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/hwmon/sparx5-temp.c

119

if (IS_ERR(hwmon->clk))

drivers/hwmon/sparx5-temp.c

120

return PTR_ERR(hwmon->clk);

drivers/hwmon/sparx5-temp.c

26

struct clk *clk;

drivers/hwmon/sparx5-temp.c

32

u32 clk = clk_get_rate(hwmon->clk) / USEC_PER_SEC;

drivers/hwmon/sparx5-temp.c

35

val |= FIELD_PREP(TEMP_CFG_CYCLES, clk);

drivers/hwspinlock/sprd_hwspinlock.c

105

sprd_hwlock->clk = devm_clk_get(&pdev->dev, "enable");

drivers/hwspinlock/sprd_hwspinlock.c

106

if (IS_ERR(sprd_hwlock->clk)) {

drivers/hwspinlock/sprd_hwspinlock.c

108

return PTR_ERR(sprd_hwlock->clk);

drivers/hwspinlock/sprd_hwspinlock.c

111

ret = clk_prepare_enable(sprd_hwlock->clk);

drivers/hwspinlock/sprd_hwspinlock.c

35

struct clk *clk;

drivers/hwspinlock/sprd_hwspinlock.c

83

clk_disable_unprepare(sprd_hwlock->clk);

drivers/hwspinlock/stm32_hwspinlock.c

125

clk_disable_unprepare(hw->clk);

drivers/hwspinlock/stm32_hwspinlock.c

134

clk_prepare_enable(hw->clk);

drivers/hwspinlock/stm32_hwspinlock.c

24

struct clk *clk;

drivers/hwspinlock/stm32_hwspinlock.c

68

clk_disable_unprepare(hw->clk);

drivers/hwspinlock/stm32_hwspinlock.c

86

hw->clk = devm_clk_get(dev, "hsem");

drivers/hwspinlock/stm32_hwspinlock.c

87

if (IS_ERR(hw->clk))

drivers/hwspinlock/stm32_hwspinlock.c

88

return PTR_ERR(hw->clk);

drivers/hwspinlock/stm32_hwspinlock.c

90

ret = clk_prepare_enable(hw->clk);

drivers/hwspinlock/sun6i_hwspinlock.c

32

struct clk *ahb_clk;

drivers/hwtracing/coresight/coresight-catu.h

64

struct clk *pclk;

drivers/hwtracing/coresight/coresight-catu.h

65

struct clk *atclk;

drivers/hwtracing/coresight/coresight-core.c

1721

int coresight_get_enable_clocks(struct device *dev, struct clk **pclk,

drivers/hwtracing/coresight/coresight-core.c

1722

struct clk **atclk)

drivers/hwtracing/coresight/coresight-cpu-debug.c

89

struct clk *pclk;

drivers/hwtracing/coresight/coresight-ctcu.h

30

struct clk *apb_clk;

drivers/hwtracing/coresight/coresight-etb10.c

84

struct clk *atclk;

drivers/hwtracing/coresight/coresight-etm.h

233

struct clk *atclk;

drivers/hwtracing/coresight/coresight-etm4x.h

1033

struct clk *pclk;

drivers/hwtracing/coresight/coresight-etm4x.h

1034

struct clk *atclk;

drivers/hwtracing/coresight/coresight-funnel.c

46

struct clk *atclk;

drivers/hwtracing/coresight/coresight-funnel.c

47

struct clk *pclk;

drivers/hwtracing/coresight/coresight-replicator.c

41

struct clk *atclk;

drivers/hwtracing/coresight/coresight-replicator.c

42

struct clk *pclk;

drivers/hwtracing/coresight/coresight-stm.c

135

struct clk *atclk;

drivers/hwtracing/coresight/coresight-stm.c

136

struct clk *pclk;

drivers/hwtracing/coresight/coresight-tmc.h

250

struct clk *atclk;

drivers/hwtracing/coresight/coresight-tmc.h

251

struct clk *pclk;

drivers/hwtracing/coresight/coresight-tnoc.c

45

struct clk *pclk;

drivers/hwtracing/coresight/coresight-tpiu.c

62

struct clk *atclk;

drivers/hwtracing/coresight/coresight-tpiu.c

63

struct clk *pclk;

drivers/i2c/busses/i2c-altera.c

82

struct clk *i2c_clk;

drivers/i2c/busses/i2c-aspeed.c

1002

struct clk *parent_clk;

drivers/i2c/busses/i2c-at91-core.c

224

dev->clk = devm_clk_get_enabled(dev->dev, NULL);

drivers/i2c/busses/i2c-at91-core.c

225

if (IS_ERR(dev->clk))

drivers/i2c/busses/i2c-at91-core.c

226

return dev_err_probe(dev->dev, PTR_ERR(dev->clk),

drivers/i2c/busses/i2c-at91-core.c

281

clk_disable_unprepare(twi_dev->clk);

drivers/i2c/busses/i2c-at91-core.c

294

return clk_prepare_enable(twi_dev->clk);

drivers/i2c/busses/i2c-at91-master.c

114

* (clk_get_rate(dev->clk) / 1000), 1000000);

drivers/i2c/busses/i2c-at91-master.c

77

div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),

drivers/i2c/busses/i2c-at91-master.c

96

* (clk_get_rate(dev->clk) / 1000), 1000000);

drivers/i2c/busses/i2c-at91.h

141

struct clk *clk;

drivers/i2c/busses/i2c-axxia.c

147

struct clk *i2c_clk;

drivers/i2c/busses/i2c-bcm-kona.c

149

struct clk *external_clk;

drivers/i2c/busses/i2c-bcm2835.c

165

static struct clk *bcm2835_i2c_register_div(struct device *dev,

drivers/i2c/busses/i2c-bcm2835.c

166

struct clk *mclk,

drivers/i2c/busses/i2c-bcm2835.c

413

struct clk *mclk;

drivers/i2c/busses/i2c-bcm2835.c

66

struct clk *bus_clk;

drivers/i2c/busses/i2c-cadence.c

1543

id->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-cadence.c

1544

if (IS_ERR(id->clk))

drivers/i2c/busses/i2c-cadence.c

1545

return dev_err_probe(&pdev->dev, PTR_ERR(id->clk),

drivers/i2c/busses/i2c-cadence.c

1564

if (clk_notifier_register(id->clk, &id->clk_rate_change_nb))

drivers/i2c/busses/i2c-cadence.c

1566

id->input_clk = clk_get_rate(id->clk);

drivers/i2c/busses/i2c-cadence.c

1610

clk_notifier_unregister(id->clk, &id->clk_rate_change_nb);

drivers/i2c/busses/i2c-cadence.c

1634

clk_notifier_unregister(id->clk, &id->clk_rate_change_nb);

drivers/i2c/busses/i2c-cadence.c

211

struct clk *clk;

drivers/i2c/busses/i2c-cadence.c

268

clk_disable(xi2c->clk);

drivers/i2c/busses/i2c-cadence.c

286

ret = clk_enable(xi2c->clk);

drivers/i2c/busses/i2c-cbus-gpio.c

147

gpiod_set_value(host->clk, 1);

drivers/i2c/busses/i2c-cbus-gpio.c

158

gpiod_set_value(host->clk, 1);

drivers/i2c/busses/i2c-cbus-gpio.c

159

gpiod_set_value(host->clk, 0);

drivers/i2c/busses/i2c-cbus-gpio.c

226

chost->clk = devm_gpiod_get_index(&pdev->dev, NULL, 0, GPIOD_OUT_LOW);

drivers/i2c/busses/i2c-cbus-gpio.c

227

if (IS_ERR(chost->clk))

drivers/i2c/busses/i2c-cbus-gpio.c

228

return PTR_ERR(chost->clk);

drivers/i2c/busses/i2c-cbus-gpio.c

235

gpiod_set_consumer_name(chost->clk, "CBUS clk");

drivers/i2c/busses/i2c-cbus-gpio.c

40

struct gpio_desc *clk;

drivers/i2c/busses/i2c-cbus-gpio.c

53

gpiod_set_value(host->clk, 1);

drivers/i2c/busses/i2c-cbus-gpio.c

54

gpiod_set_value(host->clk, 0);

drivers/i2c/busses/i2c-cbus-gpio.c

79

gpiod_set_value(host->clk, 1);

drivers/i2c/busses/i2c-cbus-gpio.c

81

gpiod_set_value(host->clk, 0);

drivers/i2c/busses/i2c-davinci.c

126

struct clk *clk;

drivers/i2c/busses/i2c-davinci.c

171

u32 clk;

drivers/i2c/busses/i2c-davinci.c

175

u32 input_clock = clk_get_rate(dev->clk);

drivers/i2c/busses/i2c-davinci.c

212

clk = ((input_clock / (psc + 1)) / (dev->bus_freq * 1000));

drivers/i2c/busses/i2c-davinci.c

214

if (input_clock / (psc + 1) / clk > dev->bus_freq * 1000)

drivers/i2c/busses/i2c-davinci.c

215

clk++;

drivers/i2c/busses/i2c-davinci.c

222

clkl = (clk << 1) / 3;

drivers/i2c/busses/i2c-davinci.c

224

clkl = (clk >> 1);

drivers/i2c/busses/i2c-davinci.c

233

if (clk > clkl + d) {

drivers/i2c/busses/i2c-davinci.c

234

clkh = clk - clkl - d;

drivers/i2c/busses/i2c-davinci.c

238

clkl = clk - (d << 1);

drivers/i2c/busses/i2c-davinci.c

245

dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);

drivers/i2c/busses/i2c-davinci.c

769

dev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/i2c/busses/i2c-davinci.c

770

if (IS_ERR(dev->clk))

drivers/i2c/busses/i2c-davinci.c

771

return PTR_ERR(dev->clk);

drivers/i2c/busses/i2c-designware-common.c

703

ret = clk_prepare_enable(dev->clk);

drivers/i2c/busses/i2c-designware-common.c

710

clk_disable_unprepare(dev->clk);

drivers/i2c/busses/i2c-designware-core.h

202

struct clk;

drivers/i2c/busses/i2c-designware-core.h

277

struct clk *clk;

drivers/i2c/busses/i2c-designware-core.h

278

struct clk *pclk;

drivers/i2c/busses/i2c-designware-platdrv.c

182

dev->clk = devm_clk_get_optional(device, NULL);

drivers/i2c/busses/i2c-designware-platdrv.c

183

if (IS_ERR(dev->clk))

drivers/i2c/busses/i2c-designware-platdrv.c

184

return dev_err_probe(device, PTR_ERR(dev->clk), "failed to acquire clock\n");

drivers/i2c/busses/i2c-designware-platdrv.c

190

if (dev->clk) {

drivers/i2c/busses/i2c-designware-platdrv.c

37

return clk_get_rate(dev->clk) / HZ_PER_KHZ;

drivers/i2c/busses/i2c-digicolor.c

259

unsigned long clk_rate = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-digicolor.c

308

i2c->clk = devm_clk_get(&pdev->dev, NULL);

drivers/i2c/busses/i2c-digicolor.c

309

if (IS_ERR(i2c->clk))

drivers/i2c/busses/i2c-digicolor.c

310

return PTR_ERR(i2c->clk);

drivers/i2c/busses/i2c-digicolor.c

337

ret = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-digicolor.c

343

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-digicolor.c

355

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-digicolor.c

50

struct clk *clk;

drivers/i2c/busses/i2c-emev2.c

363

struct clk *sclk;

drivers/i2c/busses/i2c-exynos5.c

1010

ret = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

1019

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

1026

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

184

struct clk *clk; /* operating clock */

drivers/i2c/busses/i2c-exynos5.c

185

struct clk *pclk; /* bus clock */

drivers/i2c/busses/i2c-exynos5.c

300

unsigned int clkin = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

844

ret = clk_enable(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

854

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

906

i2c->clk = devm_clk_get(&pdev->dev, "hsi2c");

drivers/i2c/busses/i2c-exynos5.c

907

if (IS_ERR(i2c->clk)) {

drivers/i2c/busses/i2c-exynos5.c

922

ret = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

967

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

973

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

986

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-exynos5.c

995

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-hisi.c

487

ctlr->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-hisi.c

488

if (IS_ERR_OR_NULL(ctlr->clk)) {

drivers/i2c/busses/i2c-hisi.c

493

clk_rate_hz = clk_get_rate(ctlr->clk);

drivers/i2c/busses/i2c-hisi.c

94

struct clk *clk;

drivers/i2c/busses/i2c-hix5hd2.c

130

sysclock = clk_get_rate(priv->clk);

drivers/i2c/busses/i2c-hix5hd2.c

152

clk_disable_unprepare(priv->clk);

drivers/i2c/busses/i2c-hix5hd2.c

154

clk_prepare_enable(priv->clk);

drivers/i2c/busses/i2c-hix5hd2.c

422

priv->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-hix5hd2.c

423

if (IS_ERR(priv->clk)) {

drivers/i2c/busses/i2c-hix5hd2.c

425

return PTR_ERR(priv->clk);

drivers/i2c/busses/i2c-hix5hd2.c

481

clk_disable_unprepare(priv->clk);

drivers/i2c/busses/i2c-hix5hd2.c

490

clk_prepare_enable(priv->clk);

drivers/i2c/busses/i2c-hix5hd2.c

87

struct clk *clk;

drivers/i2c/busses/i2c-img-scb.c

374

struct clk *scb_clk, *sys_clk;

drivers/i2c/busses/i2c-imx-lpi2c.c

1518

ret = devm_clk_rate_exclusive_get(&pdev->dev, lpi2c_imx->clks[0].clk);

drivers/i2c/busses/i2c-imx-lpi2c.c

1523

lpi2c_imx->rate_per = clk_get_rate(lpi2c_imx->clks[0].clk);

drivers/i2c/busses/i2c-imx.c

1665

result = clk_enable(i2c_imx->clk);

drivers/i2c/busses/i2c-imx.c

1671

clk_disable(i2c_imx->clk);

drivers/i2c/busses/i2c-imx.c

1756

i2c_imx->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-imx.c

1757

if (IS_ERR(i2c_imx->clk))

drivers/i2c/busses/i2c-imx.c

1758

return dev_err_probe(&pdev->dev, PTR_ERR(i2c_imx->clk),

drivers/i2c/busses/i2c-imx.c

1800

clk_notifier_register(i2c_imx->clk, &i2c_imx->clk_change_nb);

drivers/i2c/busses/i2c-imx.c

1801

ret = i2c_imx_set_clk(i2c_imx, clk_get_rate(i2c_imx->clk));

drivers/i2c/busses/i2c-imx.c

1849

clk_notifier_unregister(i2c_imx->clk, &i2c_imx->clk_change_nb);

drivers/i2c/busses/i2c-imx.c

1883

clk_notifier_unregister(i2c_imx->clk, &i2c_imx->clk_change_nb);

drivers/i2c/busses/i2c-imx.c

1896

clk_disable(i2c_imx->clk);

drivers/i2c/busses/i2c-imx.c

1909

ret = clk_enable(i2c_imx->clk);

drivers/i2c/busses/i2c-imx.c

240

struct clk *clk;

drivers/i2c/busses/i2c-jz4780.c

143

struct clk *clk;

drivers/i2c/busses/i2c-jz4780.c

249

int dev_clk_khz = clk_get_rate(i2c->clk) / 1000;

drivers/i2c/busses/i2c-jz4780.c

795

i2c->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-jz4780.c

796

if (IS_ERR(i2c->clk))

drivers/i2c/busses/i2c-jz4780.c

797

return PTR_ERR(i2c->clk);

drivers/i2c/busses/i2c-k1.c

534

struct clk *clk;

drivers/i2c/busses/i2c-k1.c

575

clk = devm_clk_get_enabled(dev, "func");

drivers/i2c/busses/i2c-k1.c

576

if (IS_ERR(clk))

drivers/i2c/busses/i2c-k1.c

577

return dev_err_probe(dev, PTR_ERR(clk), "failed to enable func clock");

drivers/i2c/busses/i2c-k1.c

579

clk = devm_clk_get_enabled(dev, "bus");

drivers/i2c/busses/i2c-k1.c

580

if (IS_ERR(clk))

drivers/i2c/busses/i2c-k1.c

581

return dev_err_probe(dev, PTR_ERR(clk), "failed to enable bus clock");

drivers/i2c/busses/i2c-lpc2k.c

367

i2c->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-lpc2k.c

368

if (IS_ERR(i2c->clk)) {

drivers/i2c/busses/i2c-lpc2k.c

370

return PTR_ERR(i2c->clk);

drivers/i2c/busses/i2c-lpc2k.c

390

clkrate = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-lpc2k.c

437

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-lpc2k.c

447

ret = clk_enable(i2c->clk);

drivers/i2c/busses/i2c-lpc2k.c

73

struct clk *clk;

drivers/i2c/busses/i2c-meson.c

141

unsigned long clk_rate = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-meson.c

189

unsigned long clk_rate = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-meson.c

478

i2c->clk = devm_clk_get(&pdev->dev, NULL);

drivers/i2c/busses/i2c-meson.c

479

if (IS_ERR(i2c->clk)) {

drivers/i2c/busses/i2c-meson.c

481

return PTR_ERR(i2c->clk);

drivers/i2c/busses/i2c-meson.c

498

ret = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-meson.c

523

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-meson.c

530

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-meson.c

542

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-meson.c

90

struct clk *clk;

drivers/i2c/busses/i2c-microchip-corei2c.c

114

struct clk *i2c_clk;

drivers/i2c/busses/i2c-mpc.c

778

struct clk *clk;

drivers/i2c/busses/i2c-mpc.c

810

clk = devm_clk_get_optional_enabled(&op->dev, NULL);

drivers/i2c/busses/i2c-mpc.c

811

if (IS_ERR(clk)) {

drivers/i2c/busses/i2c-mpc.c

813

return PTR_ERR(clk);

drivers/i2c/busses/i2c-mt65xx.c

1427

i2c->clocks[I2C_MT65XX_CLK_MAIN].clk = devm_clk_get(&pdev->dev, "main");

drivers/i2c/busses/i2c-mt65xx.c

1428

if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_MAIN].clk)) {

drivers/i2c/busses/i2c-mt65xx.c

1430

return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_MAIN].clk);

drivers/i2c/busses/i2c-mt65xx.c

1433

i2c->clocks[I2C_MT65XX_CLK_DMA].clk = devm_clk_get(&pdev->dev, "dma");

drivers/i2c/busses/i2c-mt65xx.c

1434

if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_DMA].clk)) {

drivers/i2c/busses/i2c-mt65xx.c

1436

return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_DMA].clk);

drivers/i2c/busses/i2c-mt65xx.c

1439

i2c->clocks[I2C_MT65XX_CLK_ARB].clk = devm_clk_get_optional(&pdev->dev, "arb");

drivers/i2c/busses/i2c-mt65xx.c

1440

if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_ARB].clk))

drivers/i2c/busses/i2c-mt65xx.c

1441

return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_ARB].clk);

drivers/i2c/busses/i2c-mt65xx.c

1443

i2c->clocks[I2C_MT65XX_CLK_PMIC].clk = devm_clk_get_optional(&pdev->dev, "pmic");

drivers/i2c/busses/i2c-mt65xx.c

1444

if (IS_ERR(i2c->clocks[I2C_MT65XX_CLK_PMIC].clk)) {

drivers/i2c/busses/i2c-mt65xx.c

1446

return PTR_ERR(i2c->clocks[I2C_MT65XX_CLK_PMIC].clk);

drivers/i2c/busses/i2c-mt65xx.c

1450

if (!i2c->clocks[I2C_MT65XX_CLK_PMIC].clk) {

drivers/i2c/busses/i2c-mt65xx.c

1461

mtk_i2c_set_speed(i2c, clk_get_rate(i2c->clocks[speed_clk].clk));

drivers/i2c/busses/i2c-mt7621.c

259

i2c->clk_div = clk_get_rate(i2c->clk) / i2c->bus_freq - 1;

drivers/i2c/busses/i2c-mt7621.c

282

i2c->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-mt7621.c

283

if (IS_ERR(i2c->clk)) {

drivers/i2c/busses/i2c-mt7621.c

285

return PTR_ERR(i2c->clk);

drivers/i2c/busses/i2c-mt7621.c

67

struct clk *clk;

drivers/i2c/busses/i2c-mv64xxx.c

1002

drv_data->clk = devm_clk_get(&pd->dev, NULL);

drivers/i2c/busses/i2c-mv64xxx.c

1003

if (IS_ERR(drv_data->clk)) {

drivers/i2c/busses/i2c-mv64xxx.c

1004

if (PTR_ERR(drv_data->clk) == -EPROBE_DEFER)

drivers/i2c/busses/i2c-mv64xxx.c

1006

drv_data->clk = NULL;

drivers/i2c/busses/i2c-mv64xxx.c

137

struct clk *clk;

drivers/i2c/busses/i2c-mv64xxx.c

138

struct clk *reg_clk;

drivers/i2c/busses/i2c-mv64xxx.c

863

if (!drv_data->clk) {

drivers/i2c/busses/i2c-mv64xxx.c

867

tclk = clk_get_rate(drv_data->clk);

drivers/i2c/busses/i2c-mv64xxx.c

957

clk_disable_unprepare(drv_data->clk);

drivers/i2c/busses/i2c-mv64xxx.c

967

clk_prepare_enable(drv_data->clk);

drivers/i2c/busses/i2c-mxs.c

701

const uint32_t clk = 24000000;

drivers/i2c/busses/i2c-mxs.c

707

divider = DIV_ROUND_UP(clk, speed);

drivers/i2c/busses/i2c-mxs.c

718

clk / divider / 1000, clk / divider % 1000);

drivers/i2c/busses/i2c-mxs.c

728

clk / divider / 1000, clk / divider % 1000);

drivers/i2c/busses/i2c-mxs.c

749

leadin = DIV_ROUND_UP(600 * (clk / 1000000), 1000);

drivers/i2c/busses/i2c-mxs.c

750

bus_free = DIV_ROUND_UP(1300 * (clk / 1000000), 1000);

drivers/i2c/busses/i2c-mxs.c

755

leadin = DIV_ROUND_UP(4700 * (clk / 1000000), 1000);

drivers/i2c/busses/i2c-mxs.c

756

bus_free = DIV_ROUND_UP(4700 * (clk / 1000000), 1000);

drivers/i2c/busses/i2c-mxs.c

763

speed, clk / divider, divider, low_count, high_count,

drivers/i2c/busses/i2c-nomadik.c

1143

priv->clk = devm_clk_get_enabled(dev, NULL);

drivers/i2c/busses/i2c-nomadik.c

1144

if (IS_ERR(priv->clk))

drivers/i2c/busses/i2c-nomadik.c

1145

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/i2c/busses/i2c-nomadik.c

204

struct clk *clk;

drivers/i2c/busses/i2c-nomadik.c

412

i2c_clk = clk_get_rate(priv->clk);

drivers/i2c/busses/i2c-nomadik.c

961

clk_disable_unprepare(priv->clk);

drivers/i2c/busses/i2c-nomadik.c

972

ret = clk_prepare_enable(priv->clk);

drivers/i2c/busses/i2c-nomadik.c

982

clk_disable_unprepare(priv->clk);

drivers/i2c/busses/i2c-npcm7xx.c

2499

struct clk *i2c_clk;

drivers/i2c/busses/i2c-ocores.c

45

struct clk *clk;

drivers/i2c/busses/i2c-ocores.c

544

i2c->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-ocores.c

545

if (IS_ERR(i2c->clk))

drivers/i2c/busses/i2c-ocores.c

546

return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk),

drivers/i2c/busses/i2c-ocores.c

549

i2c->ip_clock_khz = clk_get_rate(i2c->clk) / 1000;

drivers/i2c/busses/i2c-ocores.c

748

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-ocores.c

758

ret = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-ocores.c

761

rate = clk_get_rate(i2c->clk) / 1000;

drivers/i2c/busses/i2c-octeon-core.h

128

struct clk *clk;

drivers/i2c/busses/i2c-omap.c

357

struct clk *fclk;

drivers/i2c/busses/i2c-owl.c

465

i2c_dev->clk = devm_clk_get_enabled(dev, NULL);

drivers/i2c/busses/i2c-owl.c

466

if (IS_ERR(i2c_dev->clk)) {

drivers/i2c/busses/i2c-owl.c

468

return PTR_ERR(i2c_dev->clk);

drivers/i2c/busses/i2c-owl.c

471

i2c_dev->clk_rate = clk_get_rate(i2c_dev->clk);

drivers/i2c/busses/i2c-owl.c

98

struct clk *clk;

drivers/i2c/busses/i2c-pasemi-platform.c

20

struct clk *clk_ref;

drivers/i2c/busses/i2c-pnx.c

43

struct clk *clk;

drivers/i2c/busses/i2c-pnx.c

591

clk_disable_unprepare(alg_data->clk);

drivers/i2c/busses/i2c-pnx.c

600

return clk_prepare_enable(alg_data->clk);

drivers/i2c/busses/i2c-pnx.c

646

alg_data->clk = devm_clk_get(&pdev->dev, NULL);

drivers/i2c/busses/i2c-pnx.c

647

if (IS_ERR(alg_data->clk))

drivers/i2c/busses/i2c-pnx.c

648

return PTR_ERR(alg_data->clk);

drivers/i2c/busses/i2c-pnx.c

658

ret = clk_prepare_enable(alg_data->clk);

drivers/i2c/busses/i2c-pnx.c

662

freq = clk_get_rate(alg_data->clk);

drivers/i2c/busses/i2c-pnx.c

709

clk_disable_unprepare(alg_data->clk);

drivers/i2c/busses/i2c-pnx.c

718

clk_disable_unprepare(alg_data->clk);

drivers/i2c/busses/i2c-pxa.c

1470

i2c->clk = devm_clk_get(&dev->dev, NULL);

drivers/i2c/busses/i2c-pxa.c

1471

if (IS_ERR(i2c->clk))

drivers/i2c/busses/i2c-pxa.c

1472

return dev_err_probe(&dev->dev, PTR_ERR(i2c->clk),

drivers/i2c/busses/i2c-pxa.c

1504

clk_set_rate(i2c->clk, i2c->rate);

drivers/i2c/busses/i2c-pxa.c

1506

i2c->adap.name, clk_get_rate(i2c->clk));

drivers/i2c/busses/i2c-pxa.c

1512

ret = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-pxa.c

1556

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-pxa.c

1566

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-pxa.c

1573

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-pxa.c

1582

clk_enable(i2c->clk);

drivers/i2c/busses/i2c-pxa.c

236

struct clk *clk;

drivers/i2c/busses/i2c-qcom-geni.c

1006

gi2c->se.clk = devm_clk_get(dev, "se");

drivers/i2c/busses/i2c-qcom-geni.c

1007

if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev))

drivers/i2c/busses/i2c-qcom-geni.c

1008

return PTR_ERR(gi2c->se.clk);

drivers/i2c/busses/i2c-qcom-geni.c

110

struct clk *core_clk;

drivers/i2c/busses/i2c-qcom-geni.c

191

if (clk_get_rate(gi2c->se.clk) == 32 * HZ_PER_MHZ)

drivers/i2c/busses/i2c-qup.c

1662

clk_prepare_enable(qup->clk);

drivers/i2c/busses/i2c-qup.c

1671

clk_disable_unprepare(qup->clk);

drivers/i2c/busses/i2c-qup.c

1813

qup->clk = devm_clk_get(qup->dev, "core");

drivers/i2c/busses/i2c-qup.c

1814

if (IS_ERR(qup->clk)) {

drivers/i2c/busses/i2c-qup.c

1816

ret = PTR_ERR(qup->clk);

drivers/i2c/busses/i2c-qup.c

1827

src_clk_freq = clk_get_rate(qup->clk);

drivers/i2c/busses/i2c-qup.c

231

struct clk *clk;

drivers/i2c/busses/i2c-qup.c

232

struct clk *pclk;

drivers/i2c/busses/i2c-rcar.c

1134

priv->clk = devm_clk_get(dev, NULL);

drivers/i2c/busses/i2c-rcar.c

1135

if (IS_ERR(priv->clk)) {

drivers/i2c/busses/i2c-rcar.c

1137

return PTR_ERR(priv->clk);

drivers/i2c/busses/i2c-rcar.c

148

struct clk *clk;

drivers/i2c/busses/i2c-rcar.c

320

rate = clk_get_rate(priv->clk);

drivers/i2c/busses/i2c-riic.c

121

struct clk *clk;

drivers/i2c/busses/i2c-riic.c

369

rate = clk_get_rate(riic->clk);

drivers/i2c/busses/i2c-riic.c

534

riic->clk = devm_clk_get(dev, NULL);

drivers/i2c/busses/i2c-riic.c

535

if (IS_ERR(riic->clk))

drivers/i2c/busses/i2c-riic.c

536

return dev_err_probe(dev, PTR_ERR(riic->clk),

drivers/i2c/busses/i2c-rk3x.c

1071

clk_enable(i2c->clk);

drivers/i2c/busses/i2c-rk3x.c

1129

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-rk3x.c

1152

rk3x_i2c_adapt_div(i2c, clk_get_rate(i2c->clk));

drivers/i2c/busses/i2c-rk3x.c

1328

i2c->clk = devm_clk_get(&pdev->dev, NULL);

drivers/i2c/busses/i2c-rk3x.c

1329

i2c->pclk = i2c->clk;

drivers/i2c/busses/i2c-rk3x.c

1331

i2c->clk = devm_clk_get(&pdev->dev, "i2c");

drivers/i2c/busses/i2c-rk3x.c

1335

if (IS_ERR(i2c->clk))

drivers/i2c/busses/i2c-rk3x.c

1336

return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk),

drivers/i2c/busses/i2c-rk3x.c

1343

ret = clk_prepare(i2c->clk);

drivers/i2c/busses/i2c-rk3x.c

1355

ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb);

drivers/i2c/busses/i2c-rk3x.c

1361

ret = clk_enable(i2c->clk);

drivers/i2c/busses/i2c-rk3x.c

1367

clk_rate = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-rk3x.c

1369

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-rk3x.c

1378

clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb);

drivers/i2c/busses/i2c-rk3x.c

1382

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-rk3x.c

1392

clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb);

drivers/i2c/busses/i2c-rk3x.c

1394

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-rk3x.c

202

struct clk *clk;

drivers/i2c/busses/i2c-rk3x.c

203

struct clk *pclk;

drivers/i2c/busses/i2c-rzv2m.c

111

pclk_hz = clk_get_rate(priv->clk);

drivers/i2c/busses/i2c-rzv2m.c

426

priv->clk = devm_clk_get(dev, NULL);

drivers/i2c/busses/i2c-rzv2m.c

427

if (IS_ERR(priv->clk))

drivers/i2c/busses/i2c-rzv2m.c

428

return dev_err_probe(dev, PTR_ERR(priv->clk), "Can't get clock\n");

drivers/i2c/busses/i2c-rzv2m.c

56

struct clk *clk;

drivers/i2c/busses/i2c-s3c2410.c

1044

i2c->clk = devm_clk_get(&pdev->dev, "i2c");

drivers/i2c/busses/i2c-s3c2410.c

1045

if (IS_ERR(i2c->clk)) {

drivers/i2c/busses/i2c-s3c2410.c

1050

dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

1072

ret = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

1079

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

1082

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

1093

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

1101

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

112

struct clk *clk;

drivers/i2c/busses/i2c-s3c2410.c

1122

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

1134

clk_unprepare(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

1161

ret = clk_enable(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

1165

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

756

ret = clk_enable(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

765

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

774

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-s3c2410.c

843

unsigned long clkin = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-sh7760.c

394

struct clk *mclk;

drivers/i2c/busses/i2c-sh_mobile.c

120

struct clk *clk;

drivers/i2c/busses/i2c-sh_mobile.c

270

i2c_clk_khz = clk_get_rate(pd->clk) / 1000 / pd->clks_per_count;

drivers/i2c/busses/i2c-sh_mobile.c

297

clks_per_cycle = clk_get_rate(pd->clk) / pd->bus_speed;

drivers/i2c/busses/i2c-sh_mobile.c

877

pd->clk = devm_clk_get(&dev->dev, NULL);

drivers/i2c/busses/i2c-sh_mobile.c

878

if (IS_ERR(pd->clk)) {

drivers/i2c/busses/i2c-sh_mobile.c

880

return PTR_ERR(pd->clk);

drivers/i2c/busses/i2c-sprd.c

447

struct clk *clk_i2c, *clk_parent;

drivers/i2c/busses/i2c-sprd.c

471

i2c_dev->clk = devm_clk_get(i2c_dev->dev, "enable");

drivers/i2c/busses/i2c-sprd.c

472

if (IS_ERR(i2c_dev->clk)) {

drivers/i2c/busses/i2c-sprd.c

475

return PTR_ERR(i2c_dev->clk);

drivers/i2c/busses/i2c-sprd.c

531

ret = clk_prepare_enable(i2c_dev->clk);

drivers/i2c/busses/i2c-sprd.c

567

clk_disable_unprepare(i2c_dev->clk);

drivers/i2c/busses/i2c-sprd.c

583

clk_disable_unprepare(i2c_dev->clk);

drivers/i2c/busses/i2c-sprd.c

609

clk_disable_unprepare(i2c_dev->clk);

drivers/i2c/busses/i2c-sprd.c

619

ret = clk_prepare_enable(i2c_dev->clk);

drivers/i2c/busses/i2c-sprd.c

83

struct clk *clk;

drivers/i2c/busses/i2c-st.c

191

struct clk *clk;

drivers/i2c/busses/i2c-st.c

288

rate = clk_get_rate(i2c_dev->clk);

drivers/i2c/busses/i2c-st.c

712

ret = clk_prepare_enable(i2c_dev->clk);

drivers/i2c/busses/i2c-st.c

727

clk_disable_unprepare(i2c_dev->clk);

drivers/i2c/busses/i2c-st.c

816

i2c_dev->clk = of_clk_get_by_name(np, "ssc");

drivers/i2c/busses/i2c-st.c

817

if (IS_ERR(i2c_dev->clk)) {

drivers/i2c/busses/i2c-st.c

819

return PTR_ERR(i2c_dev->clk);

drivers/i2c/busses/i2c-stm32f4.c

128

struct clk *clk;

drivers/i2c/busses/i2c-stm32f4.c

156

i2c_dev->parent_rate = clk_get_rate(i2c_dev->clk);

drivers/i2c/busses/i2c-stm32f4.c

731

ret = clk_enable(i2c_dev->clk);

drivers/i2c/busses/i2c-stm32f4.c

741

clk_disable(i2c_dev->clk);

drivers/i2c/busses/i2c-stm32f4.c

786

i2c_dev->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-stm32f4.c

787

if (IS_ERR(i2c_dev->clk)) {

drivers/i2c/busses/i2c-stm32f4.c

789

return PTR_ERR(i2c_dev->clk);

drivers/i2c/busses/i2c-stm32f4.c

846

clk_disable(i2c_dev->clk);

drivers/i2c/busses/i2c-stm32f7.c

2196

i2c_dev->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-stm32f7.c

2197

if (IS_ERR(i2c_dev->clk))

drivers/i2c/busses/i2c-stm32f7.c

2198

return dev_err_probe(&pdev->dev, PTR_ERR(i2c_dev->clk),

drivers/i2c/busses/i2c-stm32f7.c

2398

clk_disable(i2c_dev->clk);

drivers/i2c/busses/i2c-stm32f7.c

2409

ret = clk_enable(i2c_dev->clk);

drivers/i2c/busses/i2c-stm32f7.c

341

struct clk *clk;

drivers/i2c/busses/i2c-stm32f7.c

687

setup->clock_src = clk_get_rate(i2c_dev->clk);

drivers/i2c/busses/i2c-sun6i-p2wi.c

247

p2wi->clk = devm_clk_get_enabled(dev, NULL);

drivers/i2c/busses/i2c-sun6i-p2wi.c

248

if (IS_ERR(p2wi->clk)) {

drivers/i2c/busses/i2c-sun6i-p2wi.c

249

ret = PTR_ERR(p2wi->clk);

drivers/i2c/busses/i2c-sun6i-p2wi.c

254

parent_clk_freq = clk_get_rate(p2wi->clk);

drivers/i2c/busses/i2c-sun6i-p2wi.c

89

struct clk *clk;

drivers/i2c/busses/i2c-synquacer.c

538

struct clk *pclk;

drivers/i2c/busses/i2c-tegra.c

1949

i2c_dev->div_clk = i2c_dev->clocks[0].clk;

drivers/i2c/busses/i2c-tegra.c

304

struct clk *div_clk;

drivers/i2c/busses/i2c-thunderx-pcidrv.c

100

i2c->sys_freq = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-thunderx-pcidrv.c

112

static void thunder_i2c_clock_disable(struct device *dev, struct clk *clk)

drivers/i2c/busses/i2c-thunderx-pcidrv.c

114

if (!clk)

drivers/i2c/busses/i2c-thunderx-pcidrv.c

116

clk_disable_unprepare(clk);

drivers/i2c/busses/i2c-thunderx-pcidrv.c

117

clk_put(clk);

drivers/i2c/busses/i2c-thunderx-pcidrv.c

246

thunder_i2c_clock_disable(dev, i2c->clk);

drivers/i2c/busses/i2c-thunderx-pcidrv.c

255

thunder_i2c_clock_disable(&pdev->dev, i2c->clk);

drivers/i2c/busses/i2c-thunderx-pcidrv.c

91

i2c->clk = clk_get(dev, NULL);

drivers/i2c/busses/i2c-thunderx-pcidrv.c

92

if (IS_ERR(i2c->clk)) {

drivers/i2c/busses/i2c-thunderx-pcidrv.c

93

i2c->clk = NULL;

drivers/i2c/busses/i2c-thunderx-pcidrv.c

97

ret = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-uniphier-f.c

538

priv->clk = devm_clk_get_enabled(dev, NULL);

drivers/i2c/busses/i2c-uniphier-f.c

539

if (IS_ERR(priv->clk))

drivers/i2c/busses/i2c-uniphier-f.c

540

return dev_err_probe(dev, PTR_ERR(priv->clk), "failed to enable clock\n");

drivers/i2c/busses/i2c-uniphier-f.c

542

clk_rate = clk_get_rate(priv->clk);

drivers/i2c/busses/i2c-uniphier-f.c

579

clk_disable_unprepare(priv->clk);

drivers/i2c/busses/i2c-uniphier-f.c

589

ret = clk_prepare_enable(priv->clk);

drivers/i2c/busses/i2c-uniphier-f.c

82

struct clk *clk;

drivers/i2c/busses/i2c-uniphier.c

333

priv->clk = devm_clk_get_enabled(dev, NULL);

drivers/i2c/busses/i2c-uniphier.c

334

if (IS_ERR(priv->clk))

drivers/i2c/busses/i2c-uniphier.c

335

return dev_err_probe(dev, PTR_ERR(priv->clk), "failed to enable clock\n");

drivers/i2c/busses/i2c-uniphier.c

337

clk_rate = clk_get_rate(priv->clk);

drivers/i2c/busses/i2c-uniphier.c

373

clk_disable_unprepare(priv->clk);

drivers/i2c/busses/i2c-uniphier.c

383

ret = clk_prepare_enable(priv->clk);

drivers/i2c/busses/i2c-uniphier.c

42

struct clk *clk;

drivers/i2c/busses/i2c-viai2c-common.h

68

struct clk *clk;

drivers/i2c/busses/i2c-viai2c-wmt.c

120

i2c->clk = of_clk_get(np, 0);

drivers/i2c/busses/i2c-viai2c-wmt.c

121

if (IS_ERR(i2c->clk))

drivers/i2c/busses/i2c-viai2c-wmt.c

122

return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk),

drivers/i2c/busses/i2c-viai2c-wmt.c

144

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-viai2c-wmt.c

155

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-viai2c-wmt.c

46

err = clk_prepare_enable(i2c->clk);

drivers/i2c/busses/i2c-viai2c-wmt.c

50

err = clk_set_rate(i2c->clk, 20000000);

drivers/i2c/busses/i2c-viai2c-wmt.c

52

clk_disable_unprepare(i2c->clk);

drivers/i2c/busses/i2c-xiic.c

1467

i2c->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/i2c/busses/i2c-xiic.c

1468

if (IS_ERR(i2c->clk))

drivers/i2c/busses/i2c-xiic.c

1469

return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk),

drivers/i2c/busses/i2c-xiic.c

1479

i2c->input_clk = clk_get_rate(i2c->clk);

drivers/i2c/busses/i2c-xiic.c

255

clk_disable(i2c->clk);

drivers/i2c/busses/i2c-xiic.c

265

ret = clk_enable(i2c->clk);

drivers/i2c/busses/i2c-xiic.c

95

struct clk *clk;

drivers/i2c/busses/i2c-xlp9xx.c

462

struct clk *clk;

drivers/i2c/busses/i2c-xlp9xx.c

466

clk = devm_clk_get(&pdev->dev, NULL);

drivers/i2c/busses/i2c-xlp9xx.c

467

if (IS_ERR(clk)) {

drivers/i2c/busses/i2c-xlp9xx.c

472

priv->ip_clk_hz = clk_get_rate(clk);

drivers/i3c/master/adi-i3c-master.c

118

struct clk *clk;

drivers/i3c/master/adi-i3c-master.c

937

struct clk_bulk_data *clk;

drivers/i3c/master/adi-i3c-master.c

949

ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &clk);

drivers/i3c/master/dw-i3c-master.h

40

struct clk *core_clk;

drivers/i3c/master/dw-i3c-master.h

41

struct clk *pclk;

drivers/i3c/master/i3c-master-cdns.c

1553

struct clk *pclk;

drivers/i3c/master/i3c-master-cdns.c

416

struct clk *sysclk;

drivers/i3c/master/renesas-i3c.c

548

i3c->rate = clk_get_rate(i3c->clks[RENESAS_I3C_TCLK_IDX].clk);

drivers/i3c/master/svc-i3c-master.c

2012

master->fclk = master->clks[i].clk;

drivers/i3c/master/svc-i3c-master.c

241

struct clk *fclk;

drivers/iio/adc/ad4080.c

604

struct clk *clk;

drivers/iio/adc/ad4080.c

641

clk = devm_clk_get_enabled(&spi->dev, "cnv");

drivers/iio/adc/ad4080.c

642

if (IS_ERR(clk))

drivers/iio/adc/ad4080.c

643

return PTR_ERR(clk);

drivers/iio/adc/ad4080.c

645

st->clk_rate = clk_get_rate(clk);

drivers/iio/adc/ad4130.c

1779

static void ad4130_clk_disable_unprepare(void *clk)

drivers/iio/adc/ad4130.c

1781

clk_disable_unprepare(clk);

drivers/iio/adc/ad4130.c

270

struct clk *mclk;

drivers/iio/adc/ad4134.c

381

struct clk *xtal_clk, *clkin_clk;

drivers/iio/adc/ad4170-4.c

2494

struct clk *ext_clk;

drivers/iio/adc/ad7124.c

1329

struct clk *mclk;

drivers/iio/adc/ad7124.c

1406

struct clk *clk;

drivers/iio/adc/ad7124.c

1408

clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/iio/adc/ad7124.c

1409

if (IS_ERR(clk))

drivers/iio/adc/ad7124.c

1410

return dev_err_probe(dev, PTR_ERR(clk),

drivers/iio/adc/ad7124.c

1413

if (clk) {

drivers/iio/adc/ad7124.c

1416

clk_hz = clk_get_rate(clk);

drivers/iio/adc/ad7173.c

1983

struct clk *clk;

drivers/iio/adc/ad7173.c

1987

clk = devm_clk_get_enabled(dev, ad7173_clk_sel[ret]);

drivers/iio/adc/ad7173.c

1988

if (IS_ERR(clk))

drivers/iio/adc/ad7173.c

1989

return dev_err_probe(dev, PTR_ERR(clk),

drivers/iio/adc/ad7191.c

69

struct clk *mclk;

drivers/iio/adc/ad7192.c

205

struct clk *mclk;

drivers/iio/adc/ad7405.c

171

struct clk *clk;

drivers/iio/adc/ad7405.c

189

clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/adc/ad7405.c

190

if (IS_ERR(clk))

drivers/iio/adc/ad7405.c

191

return PTR_ERR(clk);

drivers/iio/adc/ad7405.c

193

st->ref_frequency = clk_get_rate(clk);

drivers/iio/adc/ad7625.c

461

struct clk *ref_clk;

drivers/iio/adc/ad7766.c

38

struct clk *mclk;

drivers/iio/adc/ad7768-1.c

291

struct clk *mclk;

drivers/iio/adc/ad7779.c

144

struct clk *mclk;

drivers/iio/adc/ad9467.c

1323

st->clk = devm_clk_get_enabled(&spi->dev, "adc-clk");

drivers/iio/adc/ad9467.c

1324

if (IS_ERR(st->clk))

drivers/iio/adc/ad9467.c

1325

return PTR_ERR(st->clk);

drivers/iio/adc/ad9467.c

176

struct clk *clk;

drivers/iio/adc/ad9467.c

805

unsigned long sample_rate = clk_get_rate(st->clk);

drivers/iio/adc/ad9467.c

911

*val = clk_get_rate(st->clk);

drivers/iio/adc/ad9467.c

923

ret = clk_set_rate(st->clk, r_clk);

drivers/iio/adc/ad9467.c

947

r_clk = clk_round_rate(st->clk, val);

drivers/iio/adc/ad9467.c

954

sample_rate = clk_get_rate(st->clk);

drivers/iio/adc/ade9000.c

305

struct clk *clkin;

drivers/iio/adc/adi-axi-adc.c

676

struct clk *clk;

drivers/iio/adc/adi-axi-adc.c

697

clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/adc/adi-axi-adc.c

698

if (IS_ERR(clk))

drivers/iio/adc/adi-axi-adc.c

699

return dev_err_probe(dev, PTR_ERR(clk),

drivers/iio/adc/aspeed_adc.c

269

clk_set_rate(data->clk_scaler->clk, rate * ASPEED_CLOCKS_PER_SAMPLE);

drivers/iio/adc/aspeed_adc.c

270

rate = clk_get_rate(data->clk_scaler->clk);

drivers/iio/adc/aspeed_adc.c

325

*val = clk_get_rate(data->clk_scaler->clk) /

drivers/iio/adc/aspeed_adc.c

379

struct clk_hw *clk = data;

drivers/iio/adc/aspeed_adc.c

381

clk_hw_unregister_fixed_factor(clk);

drivers/iio/adc/aspeed_adc.c

393

struct clk *clk = data;

drivers/iio/adc/aspeed_adc.c

395

clk_disable_unprepare(clk);

drivers/iio/adc/aspeed_adc.c

573

ret = clk_prepare_enable(data->clk_scaler->clk);

drivers/iio/adc/aspeed_adc.c

577

data->clk_scaler->clk);

drivers/iio/adc/at91-sama5d2_adc.c

592

struct clk *per_clk;

drivers/iio/adc/at91_adc.c

1082

st->clk = devm_clk_get_enabled(&pdev->dev, "adc_clk");

drivers/iio/adc/at91_adc.c

1083

if (IS_ERR(st->clk))

drivers/iio/adc/at91_adc.c

1084

return dev_err_probe(&pdev->dev, PTR_ERR(st->clk),

drivers/iio/adc/at91_adc.c

1097

mstrclk = clk_get_rate(st->clk);

drivers/iio/adc/at91_adc.c

1203

clk_disable_unprepare(st->clk);

drivers/iio/adc/at91_adc.c

1213

clk_prepare_enable(st->clk);

drivers/iio/adc/at91_adc.c

216

struct clk *adc_clk;

drivers/iio/adc/at91_adc.c

219

struct clk *clk;

drivers/iio/adc/bcm_iproc_adc.c

110

struct clk *adc_clk;

drivers/iio/adc/cc10001_adc.c

56

struct clk *adc_clk;

drivers/iio/adc/ep93xx_adc.c

159

struct clk *pclk;

drivers/iio/adc/ep93xx_adc.c

181

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/iio/adc/ep93xx_adc.c

182

if (IS_ERR(priv->clk)) {

drivers/iio/adc/ep93xx_adc.c

184

return PTR_ERR(priv->clk);

drivers/iio/adc/ep93xx_adc.c

187

pclk = clk_get_parent(priv->clk);

drivers/iio/adc/ep93xx_adc.c

198

ret = clk_set_rate(priv->clk, clk_get_rate(pclk) / 16);

drivers/iio/adc/ep93xx_adc.c

207

ret = clk_prepare_enable(priv->clk);

drivers/iio/adc/ep93xx_adc.c

215

clk_disable_unprepare(priv->clk);

drivers/iio/adc/ep93xx_adc.c

226

clk_disable_unprepare(priv->clk);

drivers/iio/adc/ep93xx_adc.c

46

struct clk *clk;

drivers/iio/adc/exynos_adc.c

104

struct clk *clk;

drivers/iio/adc/exynos_adc.c

105

struct clk *sclk;

drivers/iio/adc/exynos_adc.c

142

clk_unprepare(info->clk);

drivers/iio/adc/exynos_adc.c

149

ret = clk_prepare(info->clk);

drivers/iio/adc/exynos_adc.c

158

clk_unprepare(info->clk);

drivers/iio/adc/exynos_adc.c

172

clk_disable(info->clk);

drivers/iio/adc/exynos_adc.c

179

ret = clk_enable(info->clk);

drivers/iio/adc/exynos_adc.c

188

clk_disable(info->clk);

drivers/iio/adc/exynos_adc.c

582

info->clk = devm_clk_get(dev, "adc");

drivers/iio/adc/exynos_adc.c

583

if (IS_ERR(info->clk))

drivers/iio/adc/exynos_adc.c

584

return dev_err_probe(dev, PTR_ERR(info->clk), "failed getting clock\n");

drivers/iio/adc/fsl-imx25-gcq.c

289

static void mx25_gcq_clk_disable(void *clk)

drivers/iio/adc/fsl-imx25-gcq.c

291

clk_disable_unprepare(clk);

drivers/iio/adc/fsl-imx25-gcq.c

341

priv->clk = tsadc->clk;

drivers/iio/adc/fsl-imx25-gcq.c

342

ret = clk_prepare_enable(priv->clk);

drivers/iio/adc/fsl-imx25-gcq.c

347

priv->clk);

drivers/iio/adc/fsl-imx25-gcq.c

40

struct clk *clk;

drivers/iio/adc/gehc-pmc-adc.c

166

struct clk *clk;

drivers/iio/adc/gehc-pmc-adc.c

175

clk = devm_clk_get_optional_enabled(&client->dev, "osc");

drivers/iio/adc/gehc-pmc-adc.c

176

if (IS_ERR(clk))

drivers/iio/adc/gehc-pmc-adc.c

177

return dev_err_probe(&client->dev, PTR_ERR(clk), "Failed to get osc clock\n");

drivers/iio/adc/imx7d_adc.c

111

struct clk *clk;

drivers/iio/adc/imx7d_adc.c

445

ret = clk_prepare_enable(info->clk);

drivers/iio/adc/imx7d_adc.c

465

clk_disable_unprepare(info->clk);

drivers/iio/adc/imx7d_adc.c

499

info->clk = devm_clk_get(dev, "adc");

drivers/iio/adc/imx7d_adc.c

500

if (IS_ERR(info->clk))

drivers/iio/adc/imx7d_adc.c

501

return dev_err_probe(dev, PTR_ERR(info->clk), "Failed getting clock\n");

drivers/iio/adc/imx8qxp-adc.c

257

*val = clk_get_rate(adc->clk) / 3;

drivers/iio/adc/imx8qxp-adc.c

331

adc->clk = devm_clk_get(dev, "per");

drivers/iio/adc/imx8qxp-adc.c

332

if (IS_ERR(adc->clk))

drivers/iio/adc/imx8qxp-adc.c

333

return dev_err_probe(dev, PTR_ERR(adc->clk), "Failed getting clock\n");

drivers/iio/adc/imx8qxp-adc.c

359

ret = clk_prepare_enable(adc->clk);

drivers/iio/adc/imx8qxp-adc.c

396

clk_disable_unprepare(adc->clk);

drivers/iio/adc/imx8qxp-adc.c

415

clk_disable_unprepare(adc->clk);

drivers/iio/adc/imx8qxp-adc.c

430

clk_disable_unprepare(adc->clk);

drivers/iio/adc/imx8qxp-adc.c

449

ret = clk_prepare_enable(adc->clk);

drivers/iio/adc/imx8qxp-adc.c

466

clk_disable_unprepare(adc->clk);

drivers/iio/adc/imx8qxp-adc.c

94

struct clk *clk;

drivers/iio/adc/imx8qxp-adc.c

95

struct clk *ipg_clk;

drivers/iio/adc/imx93_adc.c

77

struct clk *ipg_clk;

drivers/iio/adc/ingenic-adc.c

107

struct clk *clk;

drivers/iio/adc/ingenic-adc.c

254

ret = clk_enable(adc->clk);

drivers/iio/adc/ingenic-adc.c

273

clk_disable(adc->clk);

drivers/iio/adc/ingenic-adc.c

316

struct clk *parent_clk;

drivers/iio/adc/ingenic-adc.c

320

parent_clk = clk_get_parent(adc->clk);

drivers/iio/adc/ingenic-adc.c

352

struct clk *parent_clk;

drivers/iio/adc/ingenic-adc.c

356

parent_clk = clk_get_parent(adc->clk);

drivers/iio/adc/ingenic-adc.c

638

ret = clk_enable(adc->clk);

drivers/iio/adc/ingenic-adc.c

681

clk_disable(adc->clk);

drivers/iio/adc/ingenic-adc.c

749

ret = clk_enable(adc->clk);

drivers/iio/adc/ingenic-adc.c

789

clk_disable(adc->clk);

drivers/iio/adc/ingenic-adc.c

856

adc->clk = devm_clk_get_prepared(dev, "adc");

drivers/iio/adc/ingenic-adc.c

857

if (IS_ERR(adc->clk)) {

drivers/iio/adc/ingenic-adc.c

859

return PTR_ERR(adc->clk);

drivers/iio/adc/ingenic-adc.c

862

ret = clk_enable(adc->clk);

drivers/iio/adc/ingenic-adc.c

872

clk_disable_unprepare(adc->clk);

drivers/iio/adc/ingenic-adc.c

889

clk_disable(adc->clk);

drivers/iio/adc/lpc18xx_adc.c

149

adc->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/iio/adc/lpc18xx_adc.c

150

if (IS_ERR(adc->clk))

drivers/iio/adc/lpc18xx_adc.c

151

return dev_err_probe(&pdev->dev, PTR_ERR(adc->clk),

drivers/iio/adc/lpc18xx_adc.c

175

rate = clk_get_rate(adc->clk);

drivers/iio/adc/lpc18xx_adc.c

46

struct clk *clk;

drivers/iio/adc/lpc32xx_adc.c

172

st->clk = devm_clk_get(&pdev->dev, NULL);

drivers/iio/adc/lpc32xx_adc.c

173

if (IS_ERR(st->clk)) {

drivers/iio/adc/lpc32xx_adc.c

175

return PTR_ERR(st->clk);

drivers/iio/adc/lpc32xx_adc.c

50

struct clk *clk;

drivers/iio/adc/lpc32xx_adc.c

71

ret = clk_prepare_enable(st->clk);

drivers/iio/adc/lpc32xx_adc.c

84

clk_disable_unprepare(st->clk);

drivers/iio/adc/mcp3911.c

123

struct clk *clki;

drivers/iio/adc/meson_saradc.c

346

struct clk *clkin;

drivers/iio/adc/meson_saradc.c

347

struct clk *core_clk;

drivers/iio/adc/meson_saradc.c

348

struct clk *adc_sel_clk;

drivers/iio/adc/meson_saradc.c

349

struct clk *adc_clk;

drivers/iio/adc/meson_saradc.c

351

struct clk *adc_div_clk;

drivers/iio/adc/mt6577_auxadc.c

44

struct clk *adc_clk;

drivers/iio/adc/npcm_adc.c

32

struct clk *adc_clk;

drivers/iio/adc/nxp-sar-adc.c

138

struct clk *clk;

drivers/iio/adc/nxp-sar-adc.c

224

ndelay(div64_u64(NSEC_PER_SEC, clk_get_rate(info->clk) * 3));

drivers/iio/adc/nxp-sar-adc.c

471

ndelay(div64_u64(NSEC_PER_SEC, clk_get_rate(info->clk)) * 80);

drivers/iio/adc/nxp-sar-adc.c

546

*val = clk_get_rate(info->clk) / (inpsamp + NXP_SAR_ADC_CONV_TIME);

drivers/iio/adc/nxp-sar-adc.c

570

inpsamp = clk_get_rate(info->clk) / val - NXP_SAR_ADC_CONV_TIME;

drivers/iio/adc/nxp-sar-adc.c

923

info->clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/adc/nxp-sar-adc.c

924

if (IS_ERR(info->clk))

drivers/iio/adc/nxp-sar-adc.c

925

return dev_err_probe(dev, PTR_ERR(info->clk),

drivers/iio/adc/nxp-sar-adc.c

969

clk_disable_unprepare(info->clk);

drivers/iio/adc/nxp-sar-adc.c

979

ret = clk_prepare_enable(info->clk);

drivers/iio/adc/rcar-gyroadc.c

489

priv->clk = devm_clk_get(dev, "fck");

drivers/iio/adc/rcar-gyroadc.c

490

if (IS_ERR(priv->clk))

drivers/iio/adc/rcar-gyroadc.c

491

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/iio/adc/rcar-gyroadc.c

510

ret = clk_prepare_enable(priv->clk);

drivers/iio/adc/rcar-gyroadc.c

543

clk_disable_unprepare(priv->clk);

drivers/iio/adc/rcar-gyroadc.c

562

clk_disable_unprepare(priv->clk);

drivers/iio/adc/rcar-gyroadc.c

67

struct clk *clk;

drivers/iio/adc/rcar-gyroadc.c

77

const unsigned long clk_mhz = clk_get_rate(priv->clk) / 1000000;

drivers/iio/adc/rockchip_saradc.c

534

info->clk = devm_clk_get_enabled(dev, "saradc");

drivers/iio/adc/rockchip_saradc.c

535

if (IS_ERR(info->clk))

drivers/iio/adc/rockchip_saradc.c

536

return dev_err_probe(dev, PTR_ERR(info->clk),

drivers/iio/adc/rockchip_saradc.c

542

ret = clk_set_rate(info->clk, info->data->clk_rate);

drivers/iio/adc/rockchip_saradc.c

581

clk_disable_unprepare(info->clk);

drivers/iio/adc/rockchip_saradc.c

602

ret = clk_prepare_enable(info->clk);

drivers/iio/adc/rockchip_saradc.c

70

struct clk *pclk;

drivers/iio/adc/rockchip_saradc.c

71

struct clk *clk;

drivers/iio/adc/rzn1-adc.c

399

struct clk *clk;

drivers/iio/adc/rzn1-adc.c

417

clk = devm_clk_get_enabled(dev, "pclk");

drivers/iio/adc/rzn1-adc.c

418

if (IS_ERR(clk))

drivers/iio/adc/rzn1-adc.c

419

return dev_err_probe(dev, PTR_ERR(clk), "Failed to get pclk\n");

drivers/iio/adc/rzn1-adc.c

421

clk = devm_clk_get_enabled(dev, "adc");

drivers/iio/adc/rzn1-adc.c

422

if (IS_ERR(clk))

drivers/iio/adc/rzn1-adc.c

423

return dev_err_probe(dev, PTR_ERR(clk), "Failed to get adc clk\n");

drivers/iio/adc/sophgo-cv1800b-adc.c

128

unsigned int freq = clk_get_rate(saradc->clk) / clk_div;

drivers/iio/adc/sophgo-cv1800b-adc.c

177

saradc->clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/adc/sophgo-cv1800b-adc.c

178

if (IS_ERR(saradc->clk))

drivers/iio/adc/sophgo-cv1800b-adc.c

179

return PTR_ERR(saradc->clk);

drivers/iio/adc/sophgo-cv1800b-adc.c

62

struct clk *clk;

drivers/iio/adc/spear_adc.c

108

u32 apb_clk = clk_get_rate(st->clk);

drivers/iio/adc/spear_adc.c

116

&st->adc_base_spear6xx->clk);

drivers/iio/adc/spear_adc.c

253

__raw_writel(0, &st->adc_base_spear6xx->clk);

drivers/iio/adc/spear_adc.c

297

st->clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/adc/spear_adc.c

298

if (IS_ERR(st->clk))

drivers/iio/adc/spear_adc.c

299

return dev_err_probe(dev, PTR_ERR(st->clk),

drivers/iio/adc/spear_adc.c

52

u32 clk; /* Not avail for 1340 & 1310 */

drivers/iio/adc/spear_adc.c

65

u32 clk;

drivers/iio/adc/spear_adc.c

77

struct clk *clk;

drivers/iio/adc/stm32-adc-core.c

108

struct clk *aclk;

drivers/iio/adc/stm32-adc-core.c

109

struct clk *bclk;

drivers/iio/adc/stm32-adc.c

2554

adc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/iio/adc/stm32-adc.c

2555

if (IS_ERR(adc->clk)) {

drivers/iio/adc/stm32-adc.c

2556

ret = PTR_ERR(adc->clk);

drivers/iio/adc/stm32-adc.c

2558

adc->clk = NULL;

drivers/iio/adc/stm32-adc.c

271

struct clk *clk;

drivers/iio/adc/stm32-adc.c

706

clk_disable_unprepare(adc->clk);

drivers/iio/adc/stm32-adc.c

717

ret = clk_prepare_enable(adc->clk);

drivers/iio/adc/stm32-adc.c

732

clk_disable_unprepare(adc->clk);

drivers/iio/adc/stm32-dfsdm-core.c

100

struct clk *clk; /* DFSDM clock */

drivers/iio/adc/stm32-dfsdm-core.c

101

struct clk *aclk; /* audio clock */

drivers/iio/adc/stm32-dfsdm-core.c

114

ret = clk_prepare_enable(priv->clk);

drivers/iio/adc/stm32-dfsdm-core.c

120

clk_disable_unprepare(priv->clk);

drivers/iio/adc/stm32-dfsdm-core.c

130

clk_disable_unprepare(priv->clk);

drivers/iio/adc/stm32-dfsdm-core.c

248

priv->clk = devm_clk_get(&pdev->dev, "dfsdm");

drivers/iio/adc/stm32-dfsdm-core.c

249

if (IS_ERR(priv->clk))

drivers/iio/adc/stm32-dfsdm-core.c

250

return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk),

drivers/iio/adc/stm32-dfsdm-core.c

260

clk_freq = clk_get_rate(priv->clk);

drivers/iio/adc/stm32-dfsdm-core.c

463

clk_unprepare(priv->clk);

drivers/iio/adc/stm32-dfsdm-core.c

478

ret = clk_prepare(priv->clk);

drivers/iio/adc/stmpe-adc.c

48

struct clk *clk;

drivers/iio/adc/sun20i-gpadc-iio.c

183

struct clk *clk;

drivers/iio/adc/sun20i-gpadc-iio.c

208

clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/adc/sun20i-gpadc-iio.c

209

if (IS_ERR(clk))

drivers/iio/adc/sun20i-gpadc-iio.c

210

return dev_err_probe(dev, PTR_ERR(clk), "failed to enable bus clock\n");

drivers/iio/adc/ti-adc12138.c

401

struct clk *cclk;

drivers/iio/adc/ti-ads1298.c

106

struct clk *clk;

drivers/iio/adc/ti-ads1298.c

231

if (priv->clk)

drivers/iio/adc/ti-ads1298.c

232

rate = clk_get_rate(priv->clk);

drivers/iio/adc/ti-ads1298.c

255

if (priv->clk)

drivers/iio/adc/ti-ads1298.c

256

rate = clk_get_rate(priv->clk);

drivers/iio/adc/ti-ads1298.c

676

priv->clk = devm_clk_get_optional_enabled(dev, "clk");

drivers/iio/adc/ti-ads1298.c

677

if (IS_ERR(priv->clk))

drivers/iio/adc/ti-ads1298.c

678

return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to get clk\n");

drivers/iio/adc/ti-ads131e08.c

94

struct clk *adc_clk;

drivers/iio/adc/ti-ads131m02.c

848

struct clk *clk;

drivers/iio/adc/ti-ads131m02.c

851

clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/adc/ti-ads131m02.c

852

if (IS_ERR_OR_NULL(clk)) {

drivers/iio/adc/ti-ads131m02.c

853

if (IS_ERR(clk))

drivers/iio/adc/ti-ads131m02.c

854

ret = PTR_ERR(clk);

drivers/iio/adc/vf610_adc.c

156

struct clk *clk;

drivers/iio/adc/vf610_adc.c

188

unsigned long adck_rate, ipg_rate = clk_get_rate(info->clk);

drivers/iio/adc/vf610_adc.c

856

info->clk = devm_clk_get_enabled(&pdev->dev, "adc");

drivers/iio/adc/vf610_adc.c

857

if (IS_ERR(info->clk))

drivers/iio/adc/vf610_adc.c

858

return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), "failed getting clock\n");

drivers/iio/adc/vf610_adc.c

917

clk_disable_unprepare(info->clk);

drivers/iio/adc/vf610_adc.c

933

ret = clk_prepare_enable(info->clk);

drivers/iio/adc/xilinx-ams.c

1387

ams->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/iio/adc/xilinx-ams.c

1388

if (IS_ERR(ams->clk))

drivers/iio/adc/xilinx-ams.c

1389

return PTR_ERR(ams->clk);

drivers/iio/adc/xilinx-ams.c

1424

clk_disable_unprepare(ams->clk);

drivers/iio/adc/xilinx-ams.c

1433

return clk_prepare_enable(ams->clk);

drivers/iio/adc/xilinx-ams.c

285

struct clk *clk;

drivers/iio/adc/xilinx-xadc-core.c

1377

xadc->clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/adc/xilinx-xadc-core.c

1378

if (IS_ERR(xadc->clk))

drivers/iio/adc/xilinx-xadc-core.c

1379

return PTR_ERR(xadc->clk);

drivers/iio/adc/xilinx-xadc-core.c

361

pcap_rate = clk_get_rate(xadc->clk);

drivers/iio/adc/xilinx-xadc-core.c

366

ret = clk_set_rate(xadc->clk,

drivers/iio/adc/xilinx-xadc-core.c

398

ret = clk_set_rate(xadc->clk, pcap_rate);

drivers/iio/adc/xilinx-xadc-core.c

428

return clk_get_rate(xadc->clk) / div;

drivers/iio/adc/xilinx-xadc-core.c

560

return clk_get_rate(xadc->clk);

drivers/iio/adc/xilinx-xadc.h

17

struct clk;

drivers/iio/adc/xilinx-xadc.h

46

struct clk *clk;

drivers/iio/dac/ad8460.c

80

struct clk *sync_clk;

drivers/iio/dac/ad9739a.c

368

struct clk *clk;

drivers/iio/dac/ad9739a.c

377

clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/dac/ad9739a.c

378

if (IS_ERR(clk))

drivers/iio/dac/ad9739a.c

379

return dev_err_probe(dev, PTR_ERR(clk), "Could not get clkin\n");

drivers/iio/dac/ad9739a.c

381

st->sample_rate = clk_get_rate(clk);

drivers/iio/dac/adi-axi-dac.c

892

struct clk *clk;

drivers/iio/dac/adi-axi-dac.c

902

clk = devm_clk_get_enabled(dev, "s_axi_aclk");

drivers/iio/dac/adi-axi-dac.c

903

if (IS_ERR(clk)) {

drivers/iio/dac/adi-axi-dac.c

905

clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/dac/adi-axi-dac.c

906

if (IS_ERR(clk))

drivers/iio/dac/adi-axi-dac.c

907

return dev_err_probe(dev, PTR_ERR(clk),

drivers/iio/dac/adi-axi-dac.c

912

struct clk *dac_clk;

drivers/iio/dac/lpc18xx_dac.c

122

dac->clk = devm_clk_get(&pdev->dev, NULL);

drivers/iio/dac/lpc18xx_dac.c

123

if (IS_ERR(dac->clk))

drivers/iio/dac/lpc18xx_dac.c

124

return dev_err_probe(&pdev->dev, PTR_ERR(dac->clk),

drivers/iio/dac/lpc18xx_dac.c

144

ret = clk_prepare_enable(dac->clk);

drivers/iio/dac/lpc18xx_dac.c

162

clk_disable_unprepare(dac->clk);

drivers/iio/dac/lpc18xx_dac.c

176

clk_disable_unprepare(dac->clk);

drivers/iio/dac/lpc18xx_dac.c

36

struct clk *clk;

drivers/iio/dac/ltc2688.c

686

static void ltc2688_clk_disable(void *clk)

drivers/iio/dac/ltc2688.c

688

clk_disable_unprepare(clk);

drivers/iio/dac/ltc2688.c

701

struct clk *clk;

drivers/iio/dac/ltc2688.c

704

clk = devm_get_clk_from_child(dev, to_of_node(node), NULL);

drivers/iio/dac/ltc2688.c

705

if (IS_ERR(clk))

drivers/iio/dac/ltc2688.c

706

return dev_err_probe(dev, PTR_ERR(clk), "failed to get tgp clk.\n");

drivers/iio/dac/ltc2688.c

708

ret = clk_prepare_enable(clk);

drivers/iio/dac/ltc2688.c

712

ret = devm_add_action_or_reset(dev, ltc2688_clk_disable, clk);

drivers/iio/dac/ltc2688.c

720

rate = clk_get_rate(clk);

drivers/iio/dac/stm32-dac-core.c

30

struct clk *pclk;

drivers/iio/dac/vf610_dac.c

191

info->clk = devm_clk_get_enabled(&pdev->dev, "dac");

drivers/iio/dac/vf610_dac.c

192

if (IS_ERR(info->clk))

drivers/iio/dac/vf610_dac.c

193

return dev_err_probe(&pdev->dev, PTR_ERR(info->clk),

drivers/iio/dac/vf610_dac.c

237

clk_disable_unprepare(info->clk);

drivers/iio/dac/vf610_dac.c

248

ret = clk_prepare_enable(info->clk);

drivers/iio/dac/vf610_dac.c

36

struct clk *clk;

drivers/iio/filter/admv8818.c

98

struct clk *clkin;

drivers/iio/frequency/adf4350.c

287

if (st->clk) {

drivers/iio/frequency/adf4350.c

288

tmp = clk_round_rate(st->clk, readin);

drivers/iio/frequency/adf4350.c

293

ret = clk_set_rate(st->clk, tmp);

drivers/iio/frequency/adf4350.c

345

if (st->clk)

drivers/iio/frequency/adf4350.c

346

st->clkin = clk_get_rate(st->clk);

drivers/iio/frequency/adf4350.c

39

struct clk *clk;

drivers/iio/frequency/adf4350.c

40

struct clk *clkout;

drivers/iio/frequency/adf4350.c

466

struct clk *clk;

drivers/iio/frequency/adf4350.c

490

clk = devm_clk_register(&spi->dev, &st->hw);

drivers/iio/frequency/adf4350.c

491

if (IS_ERR(clk))

drivers/iio/frequency/adf4350.c

492

return PTR_ERR(clk);

drivers/iio/frequency/adf4350.c

494

ret = of_clk_add_provider(spi->dev.of_node, of_clk_src_simple_get, clk);

drivers/iio/frequency/adf4350.c

498

st->clkout = clk;

drivers/iio/frequency/adf4350.c

604

struct clk *clk = NULL;

drivers/iio/frequency/adf4350.c

621

clk = devm_clk_get_enabled(&spi->dev, "clkin");

drivers/iio/frequency/adf4350.c

622

if (IS_ERR(clk))

drivers/iio/frequency/adf4350.c

623

return PTR_ERR(clk);

drivers/iio/frequency/adf4350.c

648

if (clk) {

drivers/iio/frequency/adf4350.c

649

st->clk = clk;

drivers/iio/frequency/adf4350.c

650

st->clkin = clk_get_rate(clk);

drivers/iio/frequency/adf4371.c

579

struct clk *clkin;

drivers/iio/frequency/adf4377.c

1038

st->clkout = st->hw.clk;

drivers/iio/frequency/adf4377.c

414

struct clk *clkin;

drivers/iio/frequency/adf4377.c

440

struct clk *clk;

drivers/iio/frequency/adf4377.c

441

struct clk *clkout;

drivers/iio/frequency/admv1013.c

95

struct clk *clkin;

drivers/iio/frequency/admv1014.c

121

struct clk *clkin;

drivers/iio/frequency/adrf6780.c

75

struct clk *clkin;

drivers/iio/imu/adis16475.c

1806

struct clk *clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/imu/adis16475.c

1808

if (IS_ERR(clk))

drivers/iio/imu/adis16475.c

1809

return PTR_ERR(clk);

drivers/iio/imu/adis16475.c

1811

st->clk_freq = clk_get_rate(clk);

drivers/iio/imu/adis16480.c

176

struct clk *ext_clk;

drivers/iio/imu/adis16550.c

913

struct clk *clk;

drivers/iio/imu/adis16550.c

917

clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/iio/imu/adis16550.c

918

if (IS_ERR(clk))

drivers/iio/imu/adis16550.c

919

return PTR_ERR(clk);

drivers/iio/imu/adis16550.c

920

if (!clk) {

drivers/iio/imu/adis16550.c

925

st->clk_freq_hz = clk_get_rate(clk);

drivers/iio/imu/bno055/bno055.c

1586

priv->clk = devm_clk_get_optional_enabled(dev, "clk");

drivers/iio/imu/bno055/bno055.c

1587

if (IS_ERR(priv->clk))

drivers/iio/imu/bno055/bno055.c

1588

return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to get CLK\n");

drivers/iio/imu/bno055/bno055.c

206

struct clk *clk;

drivers/iio/imu/bno055/bno055.c

369

priv->clk ? BNO055_SYS_TRIGGER_CLK_SEL : 0);

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

110

.clk = INV_CLK_INTERNAL,

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

127

.clk = INV_CLK_PLL,

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

323

clock = st->chip_config.clk;

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

352

st->chip_config.clk = clock;

drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h

120

unsigned int clk:3;

drivers/iio/industrialio-core.c

1475

const clockid_t clk = iio_device_get_clock(indio_dev);

drivers/iio/industrialio-core.c

1477

switch (clk) {

drivers/iio/industrialio-core.c

1490

return sysfs_emit(buf, "%s\n", clock_names[clk]);

drivers/iio/industrialio-core.c

1497

clockid_t clk;

drivers/iio/industrialio-core.c

1503

clk = ret;

drivers/iio/industrialio-core.c

1505

switch (clk) {

drivers/iio/industrialio-core.c

1518

ret = iio_device_set_clock(dev_to_iio_dev(dev), clk);

drivers/iio/industrialio-core.c

1551

struct attribute **attr, *clk = NULL;

drivers/iio/industrialio-core.c

1570

clk = &dev_attr_current_timestamp_clock.attr;

drivers/iio/industrialio-core.c

1579

clk = &dev_attr_current_timestamp_clock.attr;

drivers/iio/industrialio-core.c

1585

if (clk)

drivers/iio/industrialio-core.c

1614

if (clk)

drivers/iio/industrialio-core.c

1615

iio_dev_opaque->chan_attr_group.attrs[attrn++] = clk;

drivers/iio/resolver/ad2s1210.c

1411

struct clk *clk;

drivers/iio/resolver/ad2s1210.c

1413

clk = devm_clk_get_enabled(dev, NULL);

drivers/iio/resolver/ad2s1210.c

1414

if (IS_ERR(clk))

drivers/iio/resolver/ad2s1210.c

1415

return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");

drivers/iio/resolver/ad2s1210.c

1417

st->clkin_hz = clk_get_rate(clk);

drivers/iio/trigger/stm32-timer-trigger.c

130

div = (unsigned long long)clk_get_rate(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

160

ret = clk_enable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

213

clk_disable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

255

freq = (unsigned long long)clk_get_rate(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

334

ret = clk_enable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

506

ret = clk_enable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

515

clk_disable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

625

ret = clk_enable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

808

priv->clk = ddata->clk;

drivers/iio/trigger/stm32-timer-trigger.c

839

clk_disable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

858

clk_disable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

870

ret = clk_enable(priv->clk);

drivers/iio/trigger/stm32-timer-trigger.c

95

struct clk *clk;

drivers/input/keyboard/bcm-keypad.c

137

if (kp->clk) {

drivers/input/keyboard/bcm-keypad.c

138

error = clk_prepare_enable(kp->clk);

drivers/input/keyboard/bcm-keypad.c

176

clk_disable_unprepare(kp->clk);

drivers/input/keyboard/bcm-keypad.c

360

kp->clk = devm_clk_get_optional(&pdev->dev, "peri_clk");

drivers/input/keyboard/bcm-keypad.c

361

if (IS_ERR(kp->clk)) {

drivers/input/keyboard/bcm-keypad.c

362

return dev_err_probe(&pdev->dev, PTR_ERR(kp->clk), "Failed to get clock\n");

drivers/input/keyboard/bcm-keypad.c

363

} else if (!kp->clk) {

drivers/input/keyboard/bcm-keypad.c

374

actual_rate = clk_round_rate(kp->clk, desired_rate);

drivers/input/keyboard/bcm-keypad.c

378

error = clk_set_rate(kp->clk, actual_rate);

drivers/input/keyboard/bcm-keypad.c

382

error = clk_prepare_enable(kp->clk);

drivers/input/keyboard/bcm-keypad.c

69

struct clk *clk;

drivers/input/keyboard/ep93xx_keypad.c

147

clk_prepare_enable(keypad->clk);

drivers/input/keyboard/ep93xx_keypad.c

159

clk_disable_unprepare(keypad->clk);

drivers/input/keyboard/ep93xx_keypad.c

174

clk_disable(keypad->clk);

drivers/input/keyboard/ep93xx_keypad.c

192

clk_enable(keypad->clk);

drivers/input/keyboard/ep93xx_keypad.c

222

keypad->clk = devm_clk_get(&pdev->dev, NULL);

drivers/input/keyboard/ep93xx_keypad.c

223

if (IS_ERR(keypad->clk))

drivers/input/keyboard/ep93xx_keypad.c

224

return PTR_ERR(keypad->clk);

drivers/input/keyboard/ep93xx_keypad.c

63

struct clk *clk;

drivers/input/keyboard/imx_keypad.c

379

clk_disable_unprepare(keypad->clk);

drivers/input/keyboard/imx_keypad.c

390

error = clk_prepare_enable(keypad->clk);

drivers/input/keyboard/imx_keypad.c

452

keypad->clk = devm_clk_get(&pdev->dev, NULL);

drivers/input/keyboard/imx_keypad.c

453

if (IS_ERR(keypad->clk)) {

drivers/input/keyboard/imx_keypad.c

455

return PTR_ERR(keypad->clk);

drivers/input/keyboard/imx_keypad.c

47

struct clk *clk;

drivers/input/keyboard/imx_keypad.c

492

error = clk_prepare_enable(keypad->clk);

drivers/input/keyboard/imx_keypad.c

496

clk_disable_unprepare(keypad->clk);

drivers/input/keyboard/imx_keypad.c

528

clk_disable_unprepare(kbd->clk);

drivers/input/keyboard/imx_keypad.c

557

error = clk_prepare_enable(kbd->clk);

drivers/input/keyboard/lpc32xx-keys.c

113

error = clk_prepare_enable(kscandat->clk);

drivers/input/keyboard/lpc32xx-keys.c

127

clk_disable_unprepare(kscandat->clk);

drivers/input/keyboard/lpc32xx-keys.c

221

kscandat->clk = devm_clk_get(&pdev->dev, NULL);

drivers/input/keyboard/lpc32xx-keys.c

222

if (IS_ERR(kscandat->clk)) {

drivers/input/keyboard/lpc32xx-keys.c

224

return PTR_ERR(kscandat->clk);

drivers/input/keyboard/lpc32xx-keys.c

228

error = clk_prepare_enable(kscandat->clk);

drivers/input/keyboard/lpc32xx-keys.c

239

clk_disable_unprepare(kscandat->clk);

drivers/input/keyboard/lpc32xx-keys.c

270

clk_disable_unprepare(kscandat->clk);

drivers/input/keyboard/lpc32xx-keys.c

287

error = clk_prepare_enable(kscandat->clk);

drivers/input/keyboard/lpc32xx-keys.c

58

struct clk *clk;

drivers/input/keyboard/mt6779-keypad.c

211

keypad->clk = devm_clk_get_enabled(&pdev->dev, "kpd");

drivers/input/keyboard/mt6779-keypad.c

212

if (IS_ERR(keypad->clk))

drivers/input/keyboard/mt6779-keypad.c

213

return PTR_ERR(keypad->clk);

drivers/input/keyboard/mt6779-keypad.c

33

struct clk *clk;

drivers/input/keyboard/nspire-keypad.c

102

error = clk_prepare_enable(keypad->clk);

drivers/input/keyboard/nspire-keypad.c

106

cycles_per_us = (clk_get_rate(keypad->clk) / 1000000);

drivers/input/keyboard/nspire-keypad.c

142

clk_disable_unprepare(keypad->clk);

drivers/input/keyboard/nspire-keypad.c

183

keypad->clk = devm_clk_get(&pdev->dev, NULL);

drivers/input/keyboard/nspire-keypad.c

184

if (IS_ERR(keypad->clk)) {

drivers/input/keyboard/nspire-keypad.c

186

return PTR_ERR(keypad->clk);

drivers/input/keyboard/nspire-keypad.c

199

error = clk_prepare_enable(keypad->clk);

drivers/input/keyboard/nspire-keypad.c

216

clk_disable_unprepare(keypad->clk);

drivers/input/keyboard/nspire-keypad.c

36

struct clk *clk;

drivers/input/keyboard/omap4-keypad.c

87

struct clk *fck;

drivers/input/keyboard/pxa27x_keypad.c

118

struct clk *clk;

drivers/input/keyboard/pxa27x_keypad.c

545

ret = clk_prepare_enable(keypad->clk);

drivers/input/keyboard/pxa27x_keypad.c

559

clk_disable_unprepare(keypad->clk);

drivers/input/keyboard/pxa27x_keypad.c

574

clk_disable_unprepare(keypad->clk);

drivers/input/keyboard/pxa27x_keypad.c

597

error = clk_prepare_enable(keypad->clk);

drivers/input/keyboard/pxa27x_keypad.c

638

keypad->clk = devm_clk_get(&pdev->dev, NULL);

drivers/input/keyboard/pxa27x_keypad.c

639

if (IS_ERR(keypad->clk)) {

drivers/input/keyboard/pxa27x_keypad.c

641

return PTR_ERR(keypad->clk);

drivers/input/keyboard/samsung-keypad.c

175

clk_enable(keypad->clk);

drivers/input/keyboard/samsung-keypad.c

207

clk_disable(keypad->clk);

drivers/input/keyboard/samsung-keypad.c

362

keypad->clk = devm_clk_get_prepared(&pdev->dev, "keypad");

drivers/input/keyboard/samsung-keypad.c

363

if (IS_ERR(keypad->clk)) {

drivers/input/keyboard/samsung-keypad.c

365

return PTR_ERR(keypad->clk);

drivers/input/keyboard/samsung-keypad.c

460

clk_disable(keypad->clk);

drivers/input/keyboard/samsung-keypad.c

474

clk_enable(keypad->clk);

drivers/input/keyboard/samsung-keypad.c

491

clk_enable(keypad->clk);

drivers/input/keyboard/samsung-keypad.c

505

clk_disable(keypad->clk);

drivers/input/keyboard/samsung-keypad.c

65

struct clk *clk;

drivers/input/keyboard/snvs_pwrkey.c

118

struct clk *clk;

drivers/input/keyboard/snvs_pwrkey.c

144

clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/input/keyboard/snvs_pwrkey.c

145

if (IS_ERR(clk)) {

drivers/input/keyboard/snvs_pwrkey.c

146

dev_err(&pdev->dev, "Failed to get snvs clock (%pe)\n", clk);

drivers/input/keyboard/snvs_pwrkey.c

147

return PTR_ERR(clk);

drivers/input/keyboard/spear-keyboard.c

108

error = clk_enable(kbd->clk);

drivers/input/keyboard/spear-keyboard.c

113

val = clk_get_rate(kbd->clk) / 1000000 - 1;

drivers/input/keyboard/spear-keyboard.c

140

clk_disable(kbd->clk);

drivers/input/keyboard/spear-keyboard.c

183

kbd->clk = devm_clk_get_prepared(&pdev->dev, NULL);

drivers/input/keyboard/spear-keyboard.c

184

if (IS_ERR(kbd->clk))

drivers/input/keyboard/spear-keyboard.c

185

return PTR_ERR(kbd->clk);

drivers/input/keyboard/spear-keyboard.c

238

clk_enable(kbd->clk);

drivers/input/keyboard/spear-keyboard.c

253

rate = clk_get_rate(kbd->clk) / 1000000 - 1;

drivers/input/keyboard/spear-keyboard.c

265

clk_disable(kbd->clk);

drivers/input/keyboard/spear-keyboard.c

274

clk_disable(kbd->clk);

drivers/input/keyboard/spear-keyboard.c

294

clk_enable(kbd->clk);

drivers/input/keyboard/spear-keyboard.c

57

struct clk *clk;

drivers/input/keyboard/st-keyscan.c

175

keypad_data->clk = devm_clk_get(&pdev->dev, NULL);

drivers/input/keyboard/st-keyscan.c

176

if (IS_ERR(keypad_data->clk)) {

drivers/input/keyboard/st-keyscan.c

178

return PTR_ERR(keypad_data->clk);

drivers/input/keyboard/st-keyscan.c

181

error = clk_enable(keypad_data->clk);

drivers/input/keyboard/st-keyscan.c

33

struct clk *clk;

drivers/input/keyboard/st-keyscan.c

65

error = clk_enable(keypad->clk);

drivers/input/keyboard/st-keyscan.c

69

writel(keypad->debounce_us * (clk_get_rate(keypad->clk) / 1000000),

drivers/input/keyboard/st-keyscan.c

85

clk_disable(keypad->clk);

drivers/input/keyboard/sun4i-lradc-keys.c

161

error = clk_prepare_enable(lradc->clk);

drivers/input/keyboard/sun4i-lradc-keys.c

196

clk_disable_unprepare(lradc->clk);

drivers/input/keyboard/sun4i-lradc-keys.c

274

lradc->clk = devm_clk_get(dev, NULL);

drivers/input/keyboard/sun4i-lradc-keys.c

275

if (IS_ERR(lradc->clk))

drivers/input/keyboard/sun4i-lradc-keys.c

276

return PTR_ERR(lradc->clk);

drivers/input/keyboard/sun4i-lradc-keys.c

98

struct clk *clk;

drivers/input/keyboard/tegra-kbc.c

105

struct clk *clk;

drivers/input/keyboard/tegra-kbc.c

356

ret = clk_prepare_enable(kbc->clk);

drivers/input/keyboard/tegra-kbc.c

421

clk_disable_unprepare(kbc->clk);

drivers/input/keyboard/tegra-kbc.c

619

kbc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/input/keyboard/tegra-kbc.c

620

if (IS_ERR(kbc->clk)) {

drivers/input/keyboard/tegra-kbc.c

622

return PTR_ERR(kbc->clk);

drivers/input/serio/ambakmi.c

103

clk_disable_unprepare(kmi->clk);

drivers/input/serio/ambakmi.c

141

kmi->clk = clk_get(&dev->dev, "KMIREFCLK");

drivers/input/serio/ambakmi.c

142

if (IS_ERR(kmi->clk)) {

drivers/input/serio/ambakmi.c

143

ret = PTR_ERR(kmi->clk);

drivers/input/serio/ambakmi.c

167

clk_put(kmi->clk);

drivers/input/serio/ambakmi.c

28

struct clk *clk;

drivers/input/serio/ambakmi.c

70

ret = clk_prepare_enable(kmi->clk);

drivers/input/serio/ambakmi.c

74

divisor = clk_get_rate(kmi->clk) / 8000000 - 1;

drivers/input/serio/ambakmi.c

91

clk_disable_unprepare(kmi->clk);

drivers/input/serio/sun4i-ps2.c

160

src_clk = clk_get_rate(drvdata->clk);

drivers/input/serio/sun4i-ps2.c

236

drvdata->clk = clk_get(dev, NULL);

drivers/input/serio/sun4i-ps2.c

237

if (IS_ERR(drvdata->clk)) {

drivers/input/serio/sun4i-ps2.c

238

error = PTR_ERR(drvdata->clk);

drivers/input/serio/sun4i-ps2.c

243

error = clk_prepare_enable(drvdata->clk);

drivers/input/serio/sun4i-ps2.c

285

clk_disable_unprepare(drvdata->clk);

drivers/input/serio/sun4i-ps2.c

287

clk_put(drvdata->clk);

drivers/input/serio/sun4i-ps2.c

304

clk_disable_unprepare(drvdata->clk);

drivers/input/serio/sun4i-ps2.c

305

clk_put(drvdata->clk);

drivers/input/serio/sun4i-ps2.c

88

struct clk *clk;

drivers/input/touchscreen/bcm_iproc_tsc.c

144

struct clk *tsc_clk;

drivers/input/touchscreen/fsl-imx25-tcq.c

36

struct clk *clk;

drivers/input/touchscreen/fsl-imx25-tcq.c

380

adc_period /= clk_get_rate(priv->clk) / 1000 + 1;

drivers/input/touchscreen/fsl-imx25-tcq.c

471

error = clk_prepare_enable(priv->clk);

drivers/input/touchscreen/fsl-imx25-tcq.c

480

clk_disable_unprepare(priv->clk);

drivers/input/touchscreen/fsl-imx25-tcq.c

496

clk_disable_unprepare(priv->clk);

drivers/input/touchscreen/fsl-imx25-tcq.c

553

priv->clk = tsadc->clk;

drivers/input/touchscreen/fsl-imx25-tcq.c

554

if (!priv->clk)

drivers/input/touchscreen/hideep.c

273

#define SW_RESET_IN_PGM(clk) \

drivers/input/touchscreen/hideep.c

276

hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \

drivers/input/touchscreen/imx6ul_tsc.c

93

struct clk *tsc_clk;

drivers/input/touchscreen/imx6ul_tsc.c

94

struct clk *adc_clk;

drivers/input/touchscreen/lpc32xx_ts.c

133

clk_disable_unprepare(tsc->clk);

drivers/input/touchscreen/lpc32xx_ts.c

141

err = clk_prepare_enable(tsc->clk);

drivers/input/touchscreen/lpc32xx_ts.c

221

tsc->clk = devm_clk_get(dev, NULL);

drivers/input/touchscreen/lpc32xx_ts.c

222

if (IS_ERR(tsc->clk)) {

drivers/input/touchscreen/lpc32xx_ts.c

224

return PTR_ERR(tsc->clk);

drivers/input/touchscreen/lpc32xx_ts.c

68

struct clk *clk;

drivers/interconnect/icc-clk.c

110

qp->clocks[i].clk = data[i].clk;

drivers/interconnect/icc-clk.c

12

struct clk *clk;

drivers/interconnect/icc-clk.c

196

clk_disable_unprepare(qn->clk);

drivers/interconnect/icc-clk.c

30

if (!qn || !qn->clk)

drivers/interconnect/icc-clk.c

35

clk_disable_unprepare(qn->clk);

drivers/interconnect/icc-clk.c

42

ret = clk_prepare_enable(qn->clk);

drivers/interconnect/icc-clk.c

48

return clk_set_rate(qn->clk, icc_units_to_bps(src->peak_bw));

drivers/interconnect/icc-clk.c

55

if (!qn || !qn->clk)

drivers/interconnect/icc-clk.c

58

*peak = Bps_to_icc(clk_get_rate(qn->clk));

drivers/interconnect/qcom/icc-rpm.h

168

int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, int ctx, u32 rate);

drivers/interconnect/qcom/icc-rpm.h

66

struct clk *bus_clk;

drivers/interconnect/qcom/msm8974.c

625

ret = clk_set_rate(qp->bus_clks[i].clk, rate);

drivers/interconnect/qcom/osm-l3.c

155

struct clk *clk;

drivers/interconnect/qcom/osm-l3.c

158

clk = clk_get(&pdev->dev, "xo");

drivers/interconnect/qcom/osm-l3.c

159

if (IS_ERR(clk))

drivers/interconnect/qcom/osm-l3.c

160

return PTR_ERR(clk);

drivers/interconnect/qcom/osm-l3.c

162

xo_rate = clk_get_rate(clk);

drivers/interconnect/qcom/osm-l3.c

163

clk_put(clk);

drivers/interconnect/qcom/osm-l3.c

165

clk = clk_get(&pdev->dev, "alternate");

drivers/interconnect/qcom/osm-l3.c

166

if (IS_ERR(clk))

drivers/interconnect/qcom/osm-l3.c

167

return PTR_ERR(clk);

drivers/interconnect/qcom/osm-l3.c

169

hw_rate = clk_get_rate(clk) / CLK_HW_DIV;

drivers/interconnect/qcom/osm-l3.c

170

clk_put(clk);

drivers/interconnect/qcom/smd-rpm.c

45

int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, int ctx, u32 rate)

drivers/interconnect/qcom/smd-rpm.c

53

if (clk->branch)

drivers/interconnect/qcom/smd-rpm.c

59

clk->resource_type,

drivers/interconnect/qcom/smd-rpm.c

60

clk->clock_id,

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

284

ret = clk_prepare_enable(tbu->clk);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

341

clk_disable_unprepare(tbu->clk);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

505

tbu->clk = devm_clk_get_optional(dev, NULL);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

506

if (IS_ERR(tbu->clk))

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

507

return PTR_ERR(tbu->clk);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

52

struct clk *clk;

drivers/iommu/arm/arm-smmu/qcom_iommu.c

779

struct clk *clk;

drivers/iommu/arm/arm-smmu/qcom_iommu.c

802

clk = devm_clk_get(dev, "iface");

drivers/iommu/arm/arm-smmu/qcom_iommu.c

803

if (IS_ERR(clk)) {

drivers/iommu/arm/arm-smmu/qcom_iommu.c

805

return PTR_ERR(clk);

drivers/iommu/arm/arm-smmu/qcom_iommu.c

807

qcom_iommu->clks[CLK_IFACE].clk = clk;

drivers/iommu/arm/arm-smmu/qcom_iommu.c

809

clk = devm_clk_get(dev, "bus");

drivers/iommu/arm/arm-smmu/qcom_iommu.c

810

if (IS_ERR(clk)) {

drivers/iommu/arm/arm-smmu/qcom_iommu.c

812

return PTR_ERR(clk);

drivers/iommu/arm/arm-smmu/qcom_iommu.c

814

qcom_iommu->clks[CLK_BUS].clk = clk;

drivers/iommu/arm/arm-smmu/qcom_iommu.c

816

clk = devm_clk_get_optional(dev, "tbu");

drivers/iommu/arm/arm-smmu/qcom_iommu.c

817

if (IS_ERR(clk)) {

drivers/iommu/arm/arm-smmu/qcom_iommu.c

819

return PTR_ERR(clk);

drivers/iommu/arm/arm-smmu/qcom_iommu.c

821

qcom_iommu->clks[CLK_TBU].clk = clk;

drivers/iommu/exynos-iommu.c

292

struct clk *clk; /* SYSMMU's clock */

drivers/iommu/exynos-iommu.c

293

struct clk *aclk; /* SYSMMU's aclk clock */

drivers/iommu/exynos-iommu.c

294

struct clk *pclk; /* SYSMMU's pclk clock */

drivers/iommu/exynos-iommu.c

295

struct clk *clk_master; /* master's device clock */

drivers/iommu/exynos-iommu.c

489

BUG_ON(clk_prepare_enable(data->clk));

drivers/iommu/exynos-iommu.c

498

clk_disable_unprepare(data->clk);

drivers/iommu/exynos-iommu.c

754

data->clk = devm_clk_get_optional(dev, "sysmmu");

drivers/iommu/exynos-iommu.c

755

if (IS_ERR(data->clk))

drivers/iommu/exynos-iommu.c

756

return PTR_ERR(data->clk);

drivers/iommu/exynos-iommu.c

766

if (!data->clk && (!data->aclk || !data->pclk)) {

drivers/iommu/msm_iommu.c

62

if (iommu->clk) {

drivers/iommu/msm_iommu.c

63

ret = clk_enable(iommu->clk);

drivers/iommu/msm_iommu.c

73

if (iommu->clk)

drivers/iommu/msm_iommu.c

733

iommu->clk = devm_clk_get_prepared(iommu->dev, "iommu_clk");

drivers/iommu/msm_iommu.c

734

if (IS_ERR(iommu->clk))

drivers/iommu/msm_iommu.c

735

return dev_err_probe(iommu->dev, PTR_ERR(iommu->clk),

drivers/iommu/msm_iommu.c

74

clk_disable(iommu->clk);

drivers/iommu/msm_iommu.h

53

struct clk *clk;

drivers/iommu/msm_iommu.h

54

struct clk *pclk;

drivers/iommu/mtk_iommu.c

258

struct clk *bclk;

drivers/iommu/mtk_iommu_v1.c

110

struct clk *bclk;

drivers/iommu/sprd-iommu.c

441

struct clk *eb;

drivers/iommu/sprd-iommu.c

73

struct clk *eb;

drivers/iommu/sun50i-iommu.c

1031

iommu->clk = devm_clk_get(&pdev->dev, NULL);

drivers/iommu/sun50i-iommu.c

1032

if (IS_ERR(iommu->clk)) {

drivers/iommu/sun50i-iommu.c

1034

ret = PTR_ERR(iommu->clk);

drivers/iommu/sun50i-iommu.c

109

struct clk *clk;

drivers/iommu/sun50i-iommu.c

441

ret = clk_prepare_enable(iommu->clk);

drivers/iommu/sun50i-iommu.c

501

clk_disable_unprepare(iommu->clk);

drivers/iommu/sun50i-iommu.c

520

clk_disable_unprepare(iommu->clk);

drivers/irqchip/irq-imx-intmux.c

74

struct clk *ipg_clk;

drivers/irqchip/irq-imx-irqsteer.c

31

struct clk *ipg_clk;

drivers/irqchip/irq-imx-mu-msi.c

338

msi_data->clk = devm_clk_get(dev, NULL);

drivers/irqchip/irq-imx-mu-msi.c

339

if (IS_ERR(msi_data->clk))

drivers/irqchip/irq-imx-mu-msi.c

340

return PTR_ERR(msi_data->clk);

drivers/irqchip/irq-imx-mu-msi.c

395

clk_disable_unprepare(priv->clk);

drivers/irqchip/irq-imx-mu-msi.c

405

ret = clk_prepare_enable(priv->clk);

drivers/irqchip/irq-imx-mu-msi.c

70

struct clk *clk;

drivers/irqchip/irq-ingenic-tcu.c

18

struct clk *clk;

drivers/irqchip/irq-mchp-eic.c

121

clk_disable_unprepare(eic->clk);

drivers/irqchip/irq-mchp-eic.c

131

clk_prepare_enable(eic->clk);

drivers/irqchip/irq-mchp-eic.c

228

eic->clk = of_clk_get_by_name(node, "pclk");

drivers/irqchip/irq-mchp-eic.c

229

if (IS_ERR(eic->clk)) {

drivers/irqchip/irq-mchp-eic.c

230

ret = PTR_ERR(eic->clk);

drivers/irqchip/irq-mchp-eic.c

234

ret = clk_prepare_enable(eic->clk);

drivers/irqchip/irq-mchp-eic.c

272

clk_disable_unprepare(eic->clk);

drivers/irqchip/irq-mchp-eic.c

38

struct clk *clk;

drivers/irqchip/irq-starfive-jh8100-intc.c

122

struct clk *clk;

drivers/irqchip/irq-starfive-jh8100-intc.c

144

clk = of_clk_get(intc, 0);

drivers/irqchip/irq-starfive-jh8100-intc.c

145

if (IS_ERR(clk)) {

drivers/irqchip/irq-starfive-jh8100-intc.c

146

pr_err("Unable to get clock %pe\n", clk);

drivers/irqchip/irq-starfive-jh8100-intc.c

147

ret = PTR_ERR(clk);

drivers/irqchip/irq-starfive-jh8100-intc.c

155

ret = clk_prepare_enable(clk);

drivers/irqchip/irq-starfive-jh8100-intc.c

187

clk_disable_unprepare(clk);

drivers/irqchip/irq-starfive-jh8100-intc.c

191

clk_put(clk);

drivers/leds/blink/leds-lgm-sso.c

809

priv->fpid_clkrate = clk_get_rate(priv->clocks[1].clk);

drivers/leds/leds-lp55xx-common.c

967

struct clk *clk;

drivers/leds/leds-lp55xx-common.c

969

clk = devm_clk_get_enabled(&chip->cl->dev, "32k_clk");

drivers/leds/leds-lp55xx-common.c

970

if (IS_ERR(clk))

drivers/leds/leds-lp55xx-common.c

973

if (clk_get_rate(clk) != LP55XX_CLK_32K)

drivers/leds/leds-sun50i-a100.c

76

struct clk *bus_clk;

drivers/leds/leds-sun50i-a100.c

77

struct clk *mod_clk;

drivers/mailbox/exynos-mailbox.c

101

struct clk *pclk;

drivers/mailbox/imx-mailbox.c

1071

if (!priv->clk) {

drivers/mailbox/imx-mailbox.c

1095

if (!priv->clk && !imx_mu_read(priv, priv->dcfg->xCR[0])) {

drivers/mailbox/imx-mailbox.c

1110

clk_disable_unprepare(priv->clk);

drivers/mailbox/imx-mailbox.c

1120

ret = clk_prepare_enable(priv->clk);

drivers/mailbox/imx-mailbox.c

905

priv->clk = devm_clk_get(dev, NULL);

drivers/mailbox/imx-mailbox.c

906

if (IS_ERR(priv->clk)) {

drivers/mailbox/imx-mailbox.c

907

if (PTR_ERR(priv->clk) != -ENOENT)

drivers/mailbox/imx-mailbox.c

908

return PTR_ERR(priv->clk);

drivers/mailbox/imx-mailbox.c

910

priv->clk = NULL;

drivers/mailbox/imx-mailbox.c

913

ret = clk_prepare_enable(priv->clk);

drivers/mailbox/imx-mailbox.c

954

clk_disable_unprepare(priv->clk);

drivers/mailbox/imx-mailbox.c

961

clk_disable_unprepare(priv->clk);

drivers/mailbox/imx-mailbox.c

98

struct clk *clk;

drivers/mailbox/mtk-cmdq-mailbox.c

651

clks->clk = devm_clk_get(dev, NULL);

drivers/mailbox/mtk-cmdq-mailbox.c

652

if (IS_ERR(clks->clk))

drivers/mailbox/mtk-cmdq-mailbox.c

653

return dev_err_probe(dev, PTR_ERR(clks->clk),

drivers/mailbox/mtk-cmdq-mailbox.c

676

clks->clk = of_clk_get(node, 0);

drivers/mailbox/mtk-cmdq-mailbox.c

677

if (IS_ERR(clks->clk))

drivers/mailbox/mtk-cmdq-mailbox.c

678

return dev_err_probe(dev, PTR_ERR(clks->clk),

drivers/mailbox/mtk-gpueb-mailbox.c

157

ret = clk_enable(ch->ebm->clk);

drivers/mailbox/mtk-gpueb-mailbox.c

178

clk_disable(ch->ebm->clk);

drivers/mailbox/mtk-gpueb-mailbox.c

193

clk_disable(ch->ebm->clk);

drivers/mailbox/mtk-gpueb-mailbox.c

227

ebm->clk = devm_clk_get_prepared(ebm->dev, NULL);

drivers/mailbox/mtk-gpueb-mailbox.c

228

if (IS_ERR(ebm->clk))

drivers/mailbox/mtk-gpueb-mailbox.c

229

return dev_err_probe(ebm->dev, PTR_ERR(ebm->clk),

drivers/mailbox/mtk-gpueb-mailbox.c

34

struct clk *clk;

drivers/mailbox/qcom-apcs-ipc-mailbox.c

128

apcs->clk = platform_device_register_full(&pdevinfo);

drivers/mailbox/qcom-apcs-ipc-mailbox.c

130

if (IS_ERR(apcs->clk))

drivers/mailbox/qcom-apcs-ipc-mailbox.c

142

struct platform_device *clk = apcs->clk;

drivers/mailbox/qcom-apcs-ipc-mailbox.c

144

platform_device_unregister(clk);

drivers/mailbox/qcom-apcs-ipc-mailbox.c

24

struct platform_device *clk;

drivers/mailbox/rockchip-mailbox.c

43

struct clk *pclk;

drivers/mailbox/sprd-mailbox.c

336

struct clk *clk;

drivers/mailbox/sprd-mailbox.c

368

clk = devm_clk_get_enabled(dev, "enable");

drivers/mailbox/sprd-mailbox.c

369

if (IS_ERR(clk)) {

drivers/mailbox/sprd-mailbox.c

371

return PTR_ERR(clk);

drivers/mailbox/stm32-ipcc.c

172

ret = clk_prepare_enable(ipcc->clk);

drivers/mailbox/stm32-ipcc.c

195

clk_disable_unprepare(ipcc->clk);

drivers/mailbox/stm32-ipcc.c

245

ipcc->clk = devm_clk_get(dev, NULL);

drivers/mailbox/stm32-ipcc.c

246

if (IS_ERR(ipcc->clk))

drivers/mailbox/stm32-ipcc.c

247

return PTR_ERR(ipcc->clk);

drivers/mailbox/stm32-ipcc.c

249

ret = clk_prepare_enable(ipcc->clk);

drivers/mailbox/stm32-ipcc.c

321

clk_disable_unprepare(ipcc->clk);

drivers/mailbox/stm32-ipcc.c

330

clk_disable_unprepare(ipcc->clk);

drivers/mailbox/stm32-ipcc.c

53

struct clk *clk;

drivers/mailbox/sun6i-msgbox.c

214

mbox->clk = devm_clk_get(dev, NULL);

drivers/mailbox/sun6i-msgbox.c

215

if (IS_ERR(mbox->clk)) {

drivers/mailbox/sun6i-msgbox.c

216

ret = PTR_ERR(mbox->clk);

drivers/mailbox/sun6i-msgbox.c

221

ret = clk_prepare_enable(mbox->clk);

drivers/mailbox/sun6i-msgbox.c

285

clk_disable_unprepare(mbox->clk);

drivers/mailbox/sun6i-msgbox.c

296

clk_disable_unprepare(mbox->clk);

drivers/mailbox/sun6i-msgbox.c

48

struct clk *clk;

drivers/media/cec/platform/meson/ao-cec-g12a.c

184

struct clk *oscin;

drivers/media/cec/platform/meson/ao-cec-g12a.c

185

struct clk *core;

drivers/media/cec/platform/meson/ao-cec-g12a.c

339

struct clk *clk;

drivers/media/cec/platform/meson/ao-cec-g12a.c

360

clk = devm_clk_register(dev, &dualdiv_clk->hw);

drivers/media/cec/platform/meson/ao-cec-g12a.c

362

if (IS_ERR(clk)) {

drivers/media/cec/platform/meson/ao-cec-g12a.c

364

return PTR_ERR(clk);

drivers/media/cec/platform/meson/ao-cec-g12a.c

367

ao_cec->core = clk;

drivers/media/cec/platform/meson/ao-cec.c

221

struct clk *core;

drivers/media/cec/platform/s5p/s5p_cec.c

207

cec->clk = devm_clk_get(dev, "hdmicec");

drivers/media/cec/platform/s5p/s5p_cec.c

208

if (IS_ERR(cec->clk))

drivers/media/cec/platform/s5p/s5p_cec.c

209

return PTR_ERR(cec->clk);

drivers/media/cec/platform/s5p/s5p_cec.c

265

clk_disable_unprepare(cec->clk);

drivers/media/cec/platform/s5p/s5p_cec.c

274

ret = clk_prepare_enable(cec->clk);

drivers/media/cec/platform/s5p/s5p_cec.h

63

struct clk *clk;

drivers/media/cec/platform/sti/stih-cec.c

126

struct clk *clk;

drivers/media/cec/platform/sti/stih-cec.c

139

unsigned long clk_freq = clk_get_rate(cec->clk);

drivers/media/cec/platform/sti/stih-cec.c

332

cec->clk = devm_clk_get(dev, "cec-clk");

drivers/media/cec/platform/sti/stih-cec.c

333

if (IS_ERR(cec->clk)) {

drivers/media/cec/platform/sti/stih-cec.c

335

return PTR_ERR(cec->clk);

drivers/media/cec/platform/stm32/stm32-cec.c

68

struct clk *clk_cec;

drivers/media/cec/platform/stm32/stm32-cec.c

69

struct clk *clk_hdmi_cec;

drivers/media/cec/platform/tegra/tegra_cec.c

362

cec->clk = devm_clk_get(&pdev->dev, "cec");

drivers/media/cec/platform/tegra/tegra_cec.c

364

if (IS_ERR_OR_NULL(cec->clk)) {

drivers/media/cec/platform/tegra/tegra_cec.c

369

ret = clk_prepare_enable(cec->clk);

drivers/media/cec/platform/tegra/tegra_cec.c

38

struct clk *clk;

drivers/media/cec/platform/tegra/tegra_cec.c

420

clk_disable_unprepare(cec->clk);

drivers/media/cec/platform/tegra/tegra_cec.c

428

clk_disable_unprepare(cec->clk);

drivers/media/cec/platform/tegra/tegra_cec.c

439

clk_disable_unprepare(cec->clk);

drivers/media/cec/platform/tegra/tegra_cec.c

451

return clk_prepare_enable(cec->clk);

drivers/media/dvb-frontends/af9013.c

128

if (coeff_lut[i].clock == state->clk &&

drivers/media/dvb-frontends/af9013.c

1461

state->clk = pdata->clk;

drivers/media/dvb-frontends/af9013.c

162

while (sampling_freq > (state->clk / 2))

drivers/media/dvb-frontends/af9013.c

163

sampling_freq -= state->clk;

drivers/media/dvb-frontends/af9013.c

173

state->clk);

drivers/media/dvb-frontends/af9013.c

18

u32 clk;

drivers/media/dvb-frontends/af9013.c

861

switch (state->clk) {

drivers/media/dvb-frontends/af9013.c

883

utmp = div_u64((u64)state->clk * 0x80000, 1000000);

drivers/media/dvb-frontends/af9013.h

39

u32 clk;

drivers/media/dvb-frontends/m88ds3103.c

1680

pdata.clk = cfg->clock;

drivers/media/dvb-frontends/m88ds3103.c

1785

dev->config.clock = pdata->clk;

drivers/media/dvb-frontends/m88ds3103.h

67

u32 clk;

drivers/media/dvb-frontends/mn88443x.c

190

struct clk *mclk;

drivers/media/dvb-frontends/mn88443x.h

19

struct clk *mclk;

drivers/media/dvb-frontends/mn88472.c

316

utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, dev->clk);

drivers/media/dvb-frontends/mn88472.c

596

dev->clk = pdata->xtal;

drivers/media/dvb-frontends/mn88472_priv.h

24

unsigned int clk;

drivers/media/dvb-frontends/mn88473.c

103

uitmp = DIV_ROUND_CLOSEST_ULL((u64) if_frequency * 0x1000000, dev->clk);

drivers/media/dvb-frontends/mn88473.c

641

dev->clk = config->xtal;

drivers/media/dvb-frontends/mn88473.c

643

dev->clk = 25000000;

drivers/media/dvb-frontends/mn88473_priv.h

26

u32 clk;

drivers/media/dvb-frontends/mxl5xx.c

1786

cfg_dev_xtal(state, cfg->clk, cfg->cap, 0);

drivers/media/dvb-frontends/mxl5xx.h

26

u32 clk;

drivers/media/dvb-frontends/rtl2830.c

226

num = if_frequency % dev->pdata->clk;

drivers/media/dvb-frontends/rtl2830.c

228

num = div_u64(num, dev->pdata->clk);

drivers/media/dvb-frontends/rtl2830.h

26

u32 clk;

drivers/media/dvb-frontends/rtl2832.c

223

pset_iffreq = if_freq % dev->pdata->clk;

drivers/media/dvb-frontends/rtl2832.c

225

pset_iffreq = div_u64(pset_iffreq, dev->pdata->clk);

drivers/media/dvb-frontends/rtl2832.c

488

num = dev->pdata->clk * 7ULL;

drivers/media/dvb-frontends/rtl2832.c

501

num2 = dev->pdata->clk * 7ULL;

drivers/media/dvb-frontends/rtl2832.h

26

u32 clk;

drivers/media/dvb-frontends/rtl2832_sdr.c

524

u64tmp = f_if % pdata->clk;

drivers/media/dvb-frontends/rtl2832_sdr.c

526

u64tmp = div_u64(u64tmp, pdata->clk);

drivers/media/dvb-frontends/rtl2832_sdr.c

563

u32tmp = div_u64(pdata->clk * 0x400000ULL, f_sr * 4U);

drivers/media/dvb-frontends/rtl2832_sdr.h

28

u32 clk;

drivers/media/dvb-frontends/stv090x.c

1658

static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)

drivers/media/dvb-frontends/stv090x.c

1670

int_1 = clk >> 16;

drivers/media/dvb-frontends/stv090x.c

1673

tmp_1 = clk % 0x10000;

drivers/media/dvb-frontends/stv090x.c

4274

static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)

drivers/media/dvb-frontends/stv090x.c

880

static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)

drivers/media/dvb-frontends/stv090x.c

914

static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)

drivers/media/dvb-frontends/stv0910.c

1797

base->extclk = cfg->clk ? cfg->clk : 30000000;

drivers/media/dvb-frontends/stv0910.h

17

u32 clk;

drivers/media/dvb-frontends/tda10071.c

1167

dev->clk = pdata->clk;

drivers/media/dvb-frontends/tda10071.c

942

cmd.args[1] = ((dev->clk / 1000) >> 8) & 0xff;

drivers/media/dvb-frontends/tda10071.c

943

cmd.args[2] = ((dev->clk / 1000) >> 0) & 0xff;

drivers/media/dvb-frontends/tda10071.h

29

u32 clk;

drivers/media/dvb-frontends/tda10071_priv.h

21

u32 clk;

drivers/media/i2c/ar0521.c

117

struct clk *extclk;

drivers/media/i2c/ccs/ccs.h

218

struct clk *ext_clk;

drivers/media/i2c/ccs/ccs.h

43

#define SMIAPP_RESET_DELAY(clk) \

drivers/media/i2c/ccs/ccs.h

45

+ (clk) / 1000 - 1) / ((clk) / 1000))

drivers/media/i2c/ds90ub913.c

70

struct clk *clkin;

drivers/media/i2c/ds90ub953.c

68

struct clk *clkin;

drivers/media/i2c/ds90ub960.c

556

struct clk *refclk;

drivers/media/i2c/et8ek8/et8ek8_driver.c

46

struct clk *ext_clk;

drivers/media/i2c/gc0308.c

1302

gc0308->clk = devm_clk_get_optional(dev, NULL);

drivers/media/i2c/gc0308.c

1303

if (IS_ERR(gc0308->clk))

drivers/media/i2c/gc0308.c

1304

return dev_err_probe(dev, PTR_ERR(gc0308->clk),

drivers/media/i2c/gc0308.c

1355

if (gc0308->clk) {

drivers/media/i2c/gc0308.c

1356

clkrate = clk_get_rate(gc0308->clk);

drivers/media/i2c/gc0308.c

432

struct clk *clk;

drivers/media/i2c/gc0308.c

778

ret = clk_prepare_enable(gc0308->clk);

drivers/media/i2c/gc0308.c

802

clk_disable_unprepare(gc0308->clk);

drivers/media/i2c/gc05a2.c

88

struct clk *xclk;

drivers/media/i2c/gc08a3.c

88

struct clk *xclk;

drivers/media/i2c/gc2145.c

636

struct clk *xclk;

drivers/media/i2c/hi556.c

1287

clk_disable_unprepare(hi556->clk);

drivers/media/i2c/hi556.c

1297

ret = clk_prepare_enable(hi556->clk);

drivers/media/i2c/hi556.c

1305

clk_disable_unprepare(hi556->clk);

drivers/media/i2c/hi556.c

1344

hi556->clk = devm_v4l2_sensor_clk_get(hi556->dev, "clk");

drivers/media/i2c/hi556.c

1345

if (IS_ERR(hi556->clk))

drivers/media/i2c/hi556.c

1346

return dev_err_probe(hi556->dev, PTR_ERR(hi556->clk),

drivers/media/i2c/hi556.c

1349

freq = clk_get_rate(hi556->clk);

drivers/media/i2c/hi556.c

650

struct clk *clk;

drivers/media/i2c/hi846.c

1157

struct clk *clock;

drivers/media/i2c/hi847.c

2172

struct clk *clk;

drivers/media/i2c/hi847.c

2867

hi847->clk = devm_v4l2_sensor_clk_get(hi847->dev, NULL);

drivers/media/i2c/hi847.c

2868

if (IS_ERR(hi847->clk))

drivers/media/i2c/hi847.c

2869

return dev_err_probe(hi847->dev, PTR_ERR(hi847->clk),

drivers/media/i2c/hi847.c

2872

freq = clk_get_rate(hi847->clk);

drivers/media/i2c/imx111.c

174

struct clk *extclk;

drivers/media/i2c/imx208.c

274

struct clk *clk;

drivers/media/i2c/imx208.c

949

imx208->clk = devm_v4l2_sensor_clk_get(imx208->dev, NULL);

drivers/media/i2c/imx208.c

950

if (IS_ERR(imx208->clk))

drivers/media/i2c/imx208.c

951

return dev_err_probe(imx208->dev, PTR_ERR(imx208->clk),

drivers/media/i2c/imx208.c

954

freq = clk_get_rate(imx208->clk);

drivers/media/i2c/imx214.c

250

struct clk *xclk;

drivers/media/i2c/imx219.c

343

struct clk *xclk; /* system clock to IMX219 */

drivers/media/i2c/imx258.c

1115

ret = clk_prepare_enable(imx258->clk);

drivers/media/i2c/imx258.c

1129

clk_disable_unprepare(imx258->clk);

drivers/media/i2c/imx258.c

1378

imx258->clk = devm_v4l2_sensor_clk_get_legacy(imx258->dev, NULL, false,

drivers/media/i2c/imx258.c

1380

if (IS_ERR(imx258->clk))

drivers/media/i2c/imx258.c

1381

return dev_err_probe(imx258->dev, PTR_ERR(imx258->clk),

drivers/media/i2c/imx258.c

1384

val = clk_get_rate(imx258->clk);

drivers/media/i2c/imx258.c

682

struct clk *clk;

drivers/media/i2c/imx274.c

578

struct clk *inck;

drivers/media/i2c/imx283.c

556

struct clk *xclk;

drivers/media/i2c/imx290.c

231

struct clk *xclk;

drivers/media/i2c/imx296.c

1046

sensor->clk = devm_v4l2_sensor_clk_get(sensor->dev, "inck");

drivers/media/i2c/imx296.c

1047

if (IS_ERR(sensor->clk))

drivers/media/i2c/imx296.c

1048

return dev_err_probe(sensor->dev, PTR_ERR(sensor->clk),

drivers/media/i2c/imx296.c

1051

clk_rate = clk_get_rate(sensor->clk);

drivers/media/i2c/imx296.c

196

struct clk *clk;

drivers/media/i2c/imx296.c

268

ret = clk_prepare_enable(sensor->clk);

drivers/media/i2c/imx296.c

292

clk_disable_unprepare(sensor->clk);

drivers/media/i2c/imx319.c

2372

struct clk *clk;

drivers/media/i2c/imx319.c

2384

clk = devm_v4l2_sensor_clk_get(imx319->dev, NULL);

drivers/media/i2c/imx319.c

2385

if (IS_ERR(clk))

drivers/media/i2c/imx319.c

2386

return dev_err_probe(imx319->dev, PTR_ERR(clk),

drivers/media/i2c/imx319.c

2389

freq = clk_get_rate(clk);

drivers/media/i2c/imx334.c

200

struct clk *inclk;

drivers/media/i2c/imx335.c

229

struct clk *inclk;

drivers/media/i2c/imx355.c

102

struct clk *clk;

drivers/media/i2c/imx355.c

1681

imx355->clk = devm_v4l2_sensor_clk_get(imx355->dev, NULL);

drivers/media/i2c/imx355.c

1682

if (IS_ERR(imx355->clk))

drivers/media/i2c/imx355.c

1683

return dev_err_probe(imx355->dev, PTR_ERR(imx355->clk),

drivers/media/i2c/imx355.c

1686

freq = clk_get_rate(imx355->clk);

drivers/media/i2c/imx412.c

137

struct clk *inclk;

drivers/media/i2c/imx415.c

1145

ret = clk_prepare_enable(sensor->clk);

drivers/media/i2c/imx415.c

1166

clk_disable_unprepare(sensor->clk);

drivers/media/i2c/imx415.c

1253

sensor->clk = devm_v4l2_sensor_clk_get(sensor->dev, NULL);

drivers/media/i2c/imx415.c

1254

if (IS_ERR(sensor->clk))

drivers/media/i2c/imx415.c

1255

return dev_err_probe(sensor->dev, PTR_ERR(sensor->clk),

drivers/media/i2c/imx415.c

1289

inck = clk_get_rate(sensor->clk);

drivers/media/i2c/imx415.c

551

struct clk *clk;

drivers/media/i2c/max2175.c

1283

struct clk *clk;

drivers/media/i2c/max2175.c

1308

clk = devm_clk_get(&client->dev, NULL);

drivers/media/i2c/max2175.c

1309

if (IS_ERR(clk)) {

drivers/media/i2c/max2175.c

1310

ret = PTR_ERR(clk);

drivers/media/i2c/max2175.c

1332

ctx->xtal_freq = clk_get_rate(clk);

drivers/media/i2c/mt9m001.c

451

ret = clk_prepare_enable(mt9m001->clk);

drivers/media/i2c/mt9m001.c

476

clk_disable_unprepare(mt9m001->clk);

drivers/media/i2c/mt9m001.c

746

mt9m001->clk = devm_v4l2_sensor_clk_get(&client->dev, NULL);

drivers/media/i2c/mt9m001.c

747

if (IS_ERR(mt9m001->clk))

drivers/media/i2c/mt9m001.c

748

return dev_err_probe(&client->dev, PTR_ERR(mt9m001->clk),

drivers/media/i2c/mt9m001.c

98

struct clk *clk;

drivers/media/i2c/mt9m111.c

1002

clk_disable_unprepare(mt9m111->clk);

drivers/media/i2c/mt9m111.c

1282

mt9m111->clk = devm_v4l2_sensor_clk_get(&client->dev, "mclk");

drivers/media/i2c/mt9m111.c

1283

if (IS_ERR(mt9m111->clk))

drivers/media/i2c/mt9m111.c

1284

return dev_err_probe(&client->dev, PTR_ERR(mt9m111->clk),

drivers/media/i2c/mt9m111.c

234

struct clk *clk;

drivers/media/i2c/mt9m111.c

973

ret = clk_prepare_enable(mt9m111->clk);

drivers/media/i2c/mt9m111.c

991

clk_disable_unprepare(mt9m111->clk);

drivers/media/i2c/mt9m114.c

2224

ret = clk_prepare_enable(sensor->clk);

drivers/media/i2c/mt9m114.c

2230

long freq = clk_get_rate(sensor->clk);

drivers/media/i2c/mt9m114.c

2294

clk_disable_unprepare(sensor->clk);

drivers/media/i2c/mt9m114.c

2306

duration = DIV_ROUND_UP(2 * 10 * 1000000, clk_get_rate(sensor->clk));

drivers/media/i2c/mt9m114.c

2309

clk_disable_unprepare(sensor->clk);

drivers/media/i2c/mt9m114.c

2396

pixrate = clk_get_rate(sensor->clk) / 2;

drivers/media/i2c/mt9m114.c

2404

sensor->pll.ext_clock = clk_get_rate(sensor->clk);

drivers/media/i2c/mt9m114.c

2536

sensor->clk = devm_v4l2_sensor_clk_get(dev, NULL);

drivers/media/i2c/mt9m114.c

2537

if (IS_ERR(sensor->clk)) {

drivers/media/i2c/mt9m114.c

2538

ret = dev_err_probe(dev, PTR_ERR(sensor->clk),

drivers/media/i2c/mt9m114.c

386

struct clk *clk;

drivers/media/i2c/mt9p031.c

126

struct clk *clk;

drivers/media/i2c/mt9p031.c

236

mt9p031->clk = devm_v4l2_sensor_clk_get(&client->dev, NULL);

drivers/media/i2c/mt9p031.c

237

if (IS_ERR(mt9p031->clk))

drivers/media/i2c/mt9p031.c

238

return dev_err_probe(&client->dev, PTR_ERR(mt9p031->clk),

drivers/media/i2c/mt9p031.c

241

ret = clk_set_rate(mt9p031->clk, mt9p031->ext_freq);

drivers/media/i2c/mt9p031.c

245

ext_freq = clk_get_rate(mt9p031->clk);

drivers/media/i2c/mt9p031.c

327

if (mt9p031->clk) {

drivers/media/i2c/mt9p031.c

328

ret = clk_prepare_enable(mt9p031->clk);

drivers/media/i2c/mt9p031.c

340

rate = clk_get_rate(mt9p031->clk);

drivers/media/i2c/mt9p031.c

360

clk_disable_unprepare(mt9p031->clk);

drivers/media/i2c/mt9t112.c

1081

priv->clk = devm_v4l2_sensor_clk_get(&client->dev, "extclk");

drivers/media/i2c/mt9t112.c

1082

if (PTR_ERR(priv->clk) == -ENOENT)

drivers/media/i2c/mt9t112.c

1083

priv->clk = NULL;

drivers/media/i2c/mt9t112.c

1084

else if (IS_ERR(priv->clk))

drivers/media/i2c/mt9t112.c

1085

return dev_err_probe(&client->dev, PTR_ERR(priv->clk),

drivers/media/i2c/mt9t112.c

1106

clk_disable_unprepare(priv->clk);

drivers/media/i2c/mt9t112.c

278

u32 vco, clk;

drivers/media/i2c/mt9t112.c

311

clk = vco / (p1 + 1) / (p2 + 1);

drivers/media/i2c/mt9t112.c

312

enable = (clk > 96000) ? "X" : "";

drivers/media/i2c/mt9t112.c

313

dev_dbg(&client->dev, "PIXCLK : %10u K %s\n", clk, enable);

drivers/media/i2c/mt9t112.c

315

clk = vco / (p3 + 1);

drivers/media/i2c/mt9t112.c

316

enable = (clk > 768000) ? "X" : "";

drivers/media/i2c/mt9t112.c

317

dev_dbg(&client->dev, "MIPICLK : %10u K %s\n", clk, enable);

drivers/media/i2c/mt9t112.c

319

clk = vco / (p6 + 1);

drivers/media/i2c/mt9t112.c

320

enable = (clk > 96000) ? "X" : "";

drivers/media/i2c/mt9t112.c

321

dev_dbg(&client->dev, "MCU CLK : %10u K %s\n", clk, enable);

drivers/media/i2c/mt9t112.c

323

clk = vco / (p5 + 1);

drivers/media/i2c/mt9t112.c

324

enable = (clk > 54000) ? "X" : "";

drivers/media/i2c/mt9t112.c

325

dev_dbg(&client->dev, "SOC CLK : %10u K %s\n", clk, enable);

drivers/media/i2c/mt9t112.c

327

clk = vco / (p4 + 1);

drivers/media/i2c/mt9t112.c

328

enable = (clk > 70000) ? "X" : "";

drivers/media/i2c/mt9t112.c

329

dev_dbg(&client->dev, "Sensor CLK : %10u K %s\n", clk, enable);

drivers/media/i2c/mt9t112.c

331

clk = vco / (p7 + 1);

drivers/media/i2c/mt9t112.c

332

dev_dbg(&client->dev, "External sensor : %10u K\n", clk);

drivers/media/i2c/mt9t112.c

334

clk = ext / (n + 1);

drivers/media/i2c/mt9t112.c

335

enable = ((clk < 2000) || (clk > 24000)) ? "X" : "";

drivers/media/i2c/mt9t112.c

336

dev_dbg(&client->dev, "PFD : %10u K %s\n", clk, enable);

drivers/media/i2c/mt9t112.c

751

ret = clk_prepare_enable(priv->clk);

drivers/media/i2c/mt9t112.c

765

clk_disable_unprepare(priv->clk);

drivers/media/i2c/mt9t112.c

95

struct clk *clk;

drivers/media/i2c/mt9v032.c

1059

mt9v032->clk = devm_v4l2_sensor_clk_get(mt9v032->dev, NULL);

drivers/media/i2c/mt9v032.c

1060

if (IS_ERR(mt9v032->clk))

drivers/media/i2c/mt9v032.c

1061

return dev_err_probe(mt9v032->dev, PTR_ERR(mt9v032->clk),

drivers/media/i2c/mt9v032.c

212

struct clk *clk;

drivers/media/i2c/mt9v032.c

278

ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk);

drivers/media/i2c/mt9v032.c

283

ret = clk_prepare_enable(mt9v032->clk);

drivers/media/i2c/mt9v032.c

317

clk_disable_unprepare(mt9v032->clk);

drivers/media/i2c/mt9v032.c

323

clk_disable_unprepare(mt9v032->clk);

drivers/media/i2c/mt9v111.c

1130

mt9v111->clk = devm_v4l2_sensor_clk_get(&client->dev, NULL);

drivers/media/i2c/mt9v111.c

1131

if (IS_ERR(mt9v111->clk))

drivers/media/i2c/mt9v111.c

1132

return dev_err_probe(&client->dev, PTR_ERR(mt9v111->clk),

drivers/media/i2c/mt9v111.c

1135

mt9v111->sysclk = clk_get_rate(mt9v111->clk);

drivers/media/i2c/mt9v111.c

148

struct clk *clk;

drivers/media/i2c/mt9v111.c

364

ret = clk_prepare_enable(mt9v111->clk);

drivers/media/i2c/mt9v111.c

387

clk_disable_unprepare(mt9v111->clk);

drivers/media/i2c/og01a1b.c

426

struct clk *xvclk;

drivers/media/i2c/og0ve1b.c

89

struct clk *xvclk;

drivers/media/i2c/os05b10.c

461

struct clk *xclk;

drivers/media/i2c/ov01a10.c

266

struct clk *clk;

drivers/media/i2c/ov01a10.c

831

ov01a10->clk = devm_v4l2_sensor_clk_get(ov01a10->dev, NULL);

drivers/media/i2c/ov01a10.c

832

if (IS_ERR(ov01a10->clk))

drivers/media/i2c/ov01a10.c

833

return dev_err_probe(ov01a10->dev, PTR_ERR(ov01a10->clk),

drivers/media/i2c/ov01a10.c

836

freq = clk_get_rate(ov01a10->clk);

drivers/media/i2c/ov01a10.c

872

ret = clk_prepare_enable(ov01a10->clk);

drivers/media/i2c/ov01a10.c

882

clk_disable_unprepare(ov01a10->clk);

drivers/media/i2c/ov01a10.c

908

clk_disable_unprepare(ov01a10->clk);

drivers/media/i2c/ov02a10.c

108

struct clk *eclk;

drivers/media/i2c/ov02c10.c

385

struct clk *img_clk;

drivers/media/i2c/ov02e10.c

245

struct clk *img_clk;

drivers/media/i2c/ov08d10.c

1390

ov08d10->clk = devm_v4l2_sensor_clk_get(ov08d10->dev, NULL);

drivers/media/i2c/ov08d10.c

1391

if (IS_ERR(ov08d10->clk))

drivers/media/i2c/ov08d10.c

1392

return dev_err_probe(ov08d10->dev, PTR_ERR(ov08d10->clk),

drivers/media/i2c/ov08d10.c

1395

freq = clk_get_rate(ov08d10->clk);

drivers/media/i2c/ov08d10.c

519

struct clk *clk;

drivers/media/i2c/ov08x40.c

1322

struct clk *xvclk;

drivers/media/i2c/ov13858.c

1033

struct clk *clk;

drivers/media/i2c/ov13858.c

1670

ov13858->clk = devm_v4l2_sensor_clk_get(ov13858->dev, NULL);

drivers/media/i2c/ov13858.c

1671

if (IS_ERR(ov13858->clk))

drivers/media/i2c/ov13858.c

1672

return dev_err_probe(ov13858->dev, PTR_ERR(ov13858->clk),

drivers/media/i2c/ov13858.c

1675

freq = clk_get_rate(ov13858->clk);

drivers/media/i2c/ov13b10.c

710

struct clk *img_clk;

drivers/media/i2c/ov2640.c

1204

priv->clk = devm_clk_get_enabled(&client->dev, "xvclk");

drivers/media/i2c/ov2640.c

1205

if (IS_ERR(priv->clk))

drivers/media/i2c/ov2640.c

1206

return PTR_ERR(priv->clk);

drivers/media/i2c/ov2640.c

299

struct clk *clk;

drivers/media/i2c/ov2659.c

1266

clk_disable_unprepare(ov2659->clk);

drivers/media/i2c/ov2659.c

1280

ret = clk_prepare_enable(ov2659->clk);

drivers/media/i2c/ov2659.c

1440

ov2659->clk = devm_v4l2_sensor_clk_get(&client->dev, "xvclk");

drivers/media/i2c/ov2659.c

1441

if (IS_ERR(ov2659->clk))

drivers/media/i2c/ov2659.c

1442

return dev_err_probe(&client->dev, PTR_ERR(ov2659->clk),

drivers/media/i2c/ov2659.c

1445

ov2659->xvclk_frequency = clk_get_rate(ov2659->clk);

drivers/media/i2c/ov2659.c

207

struct clk *clk;

drivers/media/i2c/ov2680.c

155

struct clk *xvclk;

drivers/media/i2c/ov2685.c

90

struct clk *xvclk;

drivers/media/i2c/ov2735.c

203

struct clk *xclk;

drivers/media/i2c/ov2740.c

1295

clk_disable_unprepare(ov2740->clk);

drivers/media/i2c/ov2740.c

1312

ret = clk_prepare_enable(ov2740->clk);

drivers/media/i2c/ov2740.c

1368

ov2740->clk = devm_v4l2_sensor_clk_get(dev, "clk");

drivers/media/i2c/ov2740.c

1369

if (IS_ERR(ov2740->clk))

drivers/media/i2c/ov2740.c

1370

return dev_err_probe(dev, PTR_ERR(ov2740->clk),

drivers/media/i2c/ov2740.c

1373

freq = clk_get_rate(ov2740->clk);

drivers/media/i2c/ov2740.c

538

struct clk *clk;

drivers/media/i2c/ov4689.c

126

struct clk *xvclk;

drivers/media/i2c/ov5640.c

441

struct clk *xclk; /* system clock to OV5640 */

drivers/media/i2c/ov5645.c

92

struct clk *xclk;

drivers/media/i2c/ov5647.c

121

struct clk *xclk;

drivers/media/i2c/ov5648.c

652

struct clk *xvclk;

drivers/media/i2c/ov5670.c

1876

struct clk *xvclk;

drivers/media/i2c/ov5675.c

502

struct clk *xvclk;

drivers/media/i2c/ov5693.c

145

struct clk *xvclk;

drivers/media/i2c/ov5695.c

97

struct clk *xvclk;

drivers/media/i2c/ov6211.c

89

struct clk *xvclk;

drivers/media/i2c/ov64a40.c

2841

struct clk *xclk;

drivers/media/i2c/ov7251.c

133

struct clk *xclk;

drivers/media/i2c/ov7670.c

1658

clk_prepare_enable(info->clk);

drivers/media/i2c/ov7670.c

1667

if (info->pwdn_gpio || info->resetb_gpio || info->clk)

drivers/media/i2c/ov7670.c

1680

clk_disable_unprepare(info->clk);

drivers/media/i2c/ov7670.c

1868

info->clk = devm_clk_get_optional(&client->dev, "xclk");

drivers/media/i2c/ov7670.c

1869

if (IS_ERR(info->clk))

drivers/media/i2c/ov7670.c

1870

return PTR_ERR(info->clk);

drivers/media/i2c/ov7670.c

1878

if (info->clk) {

drivers/media/i2c/ov7670.c

1879

info->clock_speed = clk_get_rate(info->clk) / 1000000;

drivers/media/i2c/ov7670.c

236

struct clk *clk;

drivers/media/i2c/ov772x.c

1482

priv->clk = clk_get(&client->dev, NULL);

drivers/media/i2c/ov772x.c

1483

if (IS_ERR(priv->clk)) {

drivers/media/i2c/ov772x.c

1485

ret = PTR_ERR(priv->clk);

drivers/media/i2c/ov772x.c

1527

clk_put(priv->clk);

drivers/media/i2c/ov772x.c

1540

clk_put(priv->clk);

drivers/media/i2c/ov772x.c

419

struct clk *clk;

drivers/media/i2c/ov772x.c

644

unsigned long fin = clk_get_rate(priv->clk);

drivers/media/i2c/ov772x.c

880

if (priv->clk) {

drivers/media/i2c/ov772x.c

881

ret = clk_prepare_enable(priv->clk);

drivers/media/i2c/ov772x.c

901

clk_disable_unprepare(priv->clk);

drivers/media/i2c/ov772x.c

919

clk_disable_unprepare(priv->clk);

drivers/media/i2c/ov7740.c

91

struct clk *xvclk;

drivers/media/i2c/ov8856.c

1424

struct clk *xvclk;

drivers/media/i2c/ov8858.c

106

struct clk *xvclk;

drivers/media/i2c/ov8865.c

697

struct clk *extclk;

drivers/media/i2c/ov9282.c

214

struct clk *inclk;

drivers/media/i2c/ov9640.c

336

ret = clk_prepare_enable(priv->clk);

drivers/media/i2c/ov9640.c

342

clk_disable_unprepare(priv->clk);

drivers/media/i2c/ov9640.c

721

priv->clk = devm_v4l2_sensor_clk_get(&client->dev, "mclk");

drivers/media/i2c/ov9640.c

722

if (IS_ERR(priv->clk)) {

drivers/media/i2c/ov9640.c

723

ret = dev_err_probe(&client->dev, PTR_ERR(priv->clk),

drivers/media/i2c/ov9640.h

199

struct clk *clk;

drivers/media/i2c/ov9650.c

1497

ov965x->clk = devm_v4l2_sensor_clk_get(&client->dev, NULL);

drivers/media/i2c/ov9650.c

1498

if (IS_ERR(ov965x->clk))

drivers/media/i2c/ov9650.c

1499

return dev_err_probe(&client->dev, PTR_ERR(ov965x->clk),

drivers/media/i2c/ov9650.c

1501

ov965x->mclk_frequency = clk_get_rate(ov965x->clk);

drivers/media/i2c/ov9650.c

253

struct clk *clk;

drivers/media/i2c/ov9650.c

509

int ret = clk_prepare_enable(ov965x->clk);

drivers/media/i2c/ov9650.c

521

clk_disable_unprepare(ov965x->clk);

drivers/media/i2c/ov9734.c

327

struct clk *clk;

drivers/media/i2c/ov9734.c

907

ov9734->clk = devm_v4l2_sensor_clk_get(ov9734->dev, NULL);

drivers/media/i2c/ov9734.c

908

if (IS_ERR(ov9734->clk))

drivers/media/i2c/ov9734.c

909

return dev_err_probe(ov9734->dev, PTR_ERR(ov9734->clk),

drivers/media/i2c/ov9734.c

912

freq = clk_get_rate(ov9734->clk);

drivers/media/i2c/rj54n1cb0c.c

1174

return clk_prepare_enable(rj54n1->clk);

drivers/media/i2c/rj54n1cb0c.c

1177

clk_disable_unprepare(rj54n1->clk);

drivers/media/i2c/rj54n1cb0c.c

1351

rj54n1->clk = clk_get(&client->dev, NULL);

drivers/media/i2c/rj54n1cb0c.c

1352

if (IS_ERR(rj54n1->clk)) {

drivers/media/i2c/rj54n1cb0c.c

1353

ret = PTR_ERR(rj54n1->clk);

drivers/media/i2c/rj54n1cb0c.c

1393

clk_put(rj54n1->clk);

drivers/media/i2c/rj54n1cb0c.c

1410

clk_put(rj54n1->clk);

drivers/media/i2c/rj54n1cb0c.c

154

struct clk *clk;

drivers/media/i2c/s5c73m3/s5c73m3.h

383

struct clk *clock;

drivers/media/i2c/s5k3m5.c

103

struct clk *mclk;

drivers/media/i2c/s5k5baf.c

286

struct clk *clock;

drivers/media/i2c/s5k6a3.c

64

struct clk *clock;

drivers/media/i2c/s5kjn1.c

95

struct clk *mclk;

drivers/media/i2c/st-mipid02.c

93

struct clk *xclk;

drivers/media/i2c/tc358743.c

2012

struct clk *refclk;

drivers/media/i2c/tc358746.c

150

struct clk *refclk;

drivers/media/i2c/thp7312.c

257

struct clk *iclk;

drivers/media/i2c/tw9910.c

225

struct clk *clk;

drivers/media/i2c/tw9910.c

595

if (priv->clk) {

drivers/media/i2c/tw9910.c

596

ret = clk_prepare_enable(priv->clk);

drivers/media/i2c/tw9910.c

613

clk_disable_unprepare(priv->clk);

drivers/media/i2c/tw9910.c

630

clk_disable_unprepare(priv->clk);

drivers/media/i2c/tw9910.c

953

priv->clk = clk_get(&client->dev, "xti");

drivers/media/i2c/tw9910.c

954

if (PTR_ERR(priv->clk) == -ENOENT) {

drivers/media/i2c/tw9910.c

955

priv->clk = NULL;

drivers/media/i2c/tw9910.c

956

} else if (IS_ERR(priv->clk)) {

drivers/media/i2c/tw9910.c

958

return PTR_ERR(priv->clk);

drivers/media/i2c/tw9910.c

983

clk_put(priv->clk);

drivers/media/i2c/tw9910.c

994

clk_put(priv->clk);

drivers/media/i2c/vd55g1.c

540

struct clk *xclk;

drivers/media/i2c/vd56g3.c

219

struct clk *xclk;

drivers/media/i2c/vgxy61.c

388

struct clk *xclk;

drivers/media/pci/bt8xx/bttv-cards.c

3080

btv->tea_gpio.clk = 8;

drivers/media/pci/bt8xx/bttv-cards.c

3377

btv->tea_gpio.clk = 3;

drivers/media/pci/bt8xx/bttv-cards.c

3746

val |= (pins & TEA575X_CLK) ? (1 << gpio.clk) : 0;

drivers/media/pci/bt8xx/bttv-cards.c

3749

gpio_bits((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren), val);

drivers/media/pci/bt8xx/bttv-cards.c

3791

u32 mask = (1 << gpio.clk) | (1 << gpio.wren) | (1 << gpio.data) |

drivers/media/pci/bt8xx/bttv-cards.c

3795

gpio_inout(mask, (1 << gpio.data) | (1 << gpio.clk) |

drivers/media/pci/bt8xx/bttv-cards.c

3798

gpio_inout(mask, (1 << gpio.clk) | (1 << gpio.wren));

drivers/media/pci/bt8xx/bttv-cards.c

3831

btv->tea_gpio.clk = 3;

drivers/media/pci/bt8xx/bttvp.h

309

u8 data, clk, wren, most;

drivers/media/pci/cobalt/cobalt-v4l2.c

150

u64 clk = bt->pixelclock;

drivers/media/pci/cobalt/cobalt-v4l2.c

153

clk = div_u64(clk * 1000ULL, 1001);

drivers/media/pci/cobalt/cobalt-v4l2.c

154

if (!cobalt_cpld_set_freq(cobalt, clk)) {

drivers/media/pci/cx23885/cx23885-dvb.c

2093

m88ds3103_pdata.clk = 27000000;

drivers/media/pci/cx23885/cx23885-dvb.c

877

.clk = 40444000, /* 40.444 MHz */

drivers/media/pci/ddbridge/ddbridge-core.c

1172

.clk = 30000000,

drivers/media/pci/ddbridge/ddbridge-max.c

393

.clk = 27000000,

drivers/media/pci/ngene/ngene-cards.c

316

.clk = 30000000,

drivers/media/pci/pt1/pt1.c

191

static int config_demod(struct i2c_client *cl, enum pt1_fe_clk clk)

drivers/media/pci/pt1/pt1.c

222

if (clk == PT1_FE_CLK_20MHZ) {

drivers/media/platform/allegro-dvt/allegro-core.c

157

struct clk *clk_core;

drivers/media/platform/allegro-dvt/allegro-core.c

158

struct clk *clk_mcu;

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

1018

clk_disable_unprepare(ge2d->clk);

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

1030

clk_disable_unprepare(ge2d->clk);

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

958

ge2d->clk = devm_clk_get(ge2d->dev, NULL);

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

959

if (IS_ERR(ge2d->clk)) {

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

961

return PTR_ERR(ge2d->clk);

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

968

ret = clk_prepare_enable(ge2d->clk);

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

97

struct clk *clk;

drivers/media/platform/aspeed/aspeed-video.c

312

struct clk *eclk;

drivers/media/platform/aspeed/aspeed-video.c

313

struct clk *vclk;

drivers/media/platform/atmel/atmel-isi.c

110

struct clk *pclk;

drivers/media/platform/broadcom/bcm2835-unicam.c

190

struct clk *clock;

drivers/media/platform/broadcom/bcm2835-unicam.c

192

struct clk *vpu_clock;

drivers/media/platform/cadence/cdns-csi2rx.c

135

struct clk *sys_clk;

drivers/media/platform/cadence/cdns-csi2rx.c

136

struct clk *p_clk;

drivers/media/platform/cadence/cdns-csi2rx.c

137

struct clk *pixel_clk[CSI2RX_STREAMS_MAX];

drivers/media/platform/cadence/cdns-csi2tx.c

106

struct clk *esc_clk;

drivers/media/platform/cadence/cdns-csi2tx.c

107

struct clk *p_clk;

drivers/media/platform/cadence/cdns-csi2tx.c

108

struct clk *pixel_clk[CSI2TX_STREAMS_MAX];

drivers/media/platform/chips-media/coda/coda.h

87

struct clk *clk_per;

drivers/media/platform/chips-media/coda/coda.h

88

struct clk *clk_ahb;

drivers/media/platform/chips-media/coda/imx-vdoa.c

80

struct clk *vdoa_clk;

drivers/media/platform/imagination/e5010-jpeg-enc.c

1095

e5010->clk = devm_clk_get(dev, NULL);

drivers/media/platform/imagination/e5010-jpeg-enc.c

1096

if (IS_ERR(e5010->clk)) {

drivers/media/platform/imagination/e5010-jpeg-enc.c

1097

ret = PTR_ERR(e5010->clk);

drivers/media/platform/imagination/e5010-jpeg-enc.c

1498

ret = clk_prepare_enable(e5010->clk);

drivers/media/platform/imagination/e5010-jpeg-enc.c

1511

clk_disable_unprepare(e5010->clk);

drivers/media/platform/imagination/e5010-jpeg-enc.h

98

struct clk *clk;

drivers/media/platform/intel/pxa_camera.c

1083

lcdclk = clk_get_rate(pcdev->clk);

drivers/media/platform/intel/pxa_camera.c

1142

clk_prepare_enable(pcdev->clk);

drivers/media/platform/intel/pxa_camera.c

1147

clk_disable_unprepare(pcdev->clk);

drivers/media/platform/intel/pxa_camera.c

2286

pcdev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/media/platform/intel/pxa_camera.c

2287

if (IS_ERR(pcdev->clk))

drivers/media/platform/intel/pxa_camera.c

2288

return PTR_ERR(pcdev->clk);

drivers/media/platform/intel/pxa_camera.c

664

struct clk *clk;

drivers/media/platform/marvell/mcam-core.c

905

clk_prepare(cam->clk[0]);

drivers/media/platform/marvell/mcam-core.c

913

clk_unprepare(cam->clk[0]);

drivers/media/platform/marvell/mcam-core.c

938

ret = clk_enable(cam->clk[0]);

drivers/media/platform/marvell/mcam-core.c

955

clk_disable(cam->clk[0]);

drivers/media/platform/marvell/mcam-core.h

129

struct clk *clk[NR_MCAM_CLK];

drivers/media/platform/marvell/mcam-core.h

131

struct clk *mclk;

drivers/media/platform/marvell/mmp-driver.c

169

mcam->clk[i] = devm_clk_get(mcam->dev, mcam_clks[i]);

drivers/media/platform/marvell/mmp-driver.c

170

if (IS_ERR(mcam->clk[i]))

drivers/media/platform/marvell/mmp-driver.c

323

if (!IS_ERR(mcam->clk[i]))

drivers/media/platform/marvell/mmp-driver.c

324

clk_prepare_enable(mcam->clk[i]);

drivers/media/platform/marvell/mmp-driver.c

337

if (!IS_ERR(mcam->clk[i]))

drivers/media/platform/marvell/mmp-driver.c

338

clk_disable_unprepare(mcam->clk[i]);

drivers/media/platform/marvell/mmp-driver.c

42

struct clk *mipi_clk;

drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c

1631

ret = clk_prepare_enable(comp_jpeg[hw_id]->venc_clk.clks->clk);

drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c

1741

ret = clk_prepare_enable(comp_jpeg[hw_id]->jdec_clk.clks->clk);

drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c

1779

clk_disable_unprepare(comp_jpeg[hw_id]->jdec_clk.clks->clk);

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

536

clk_disable_unprepare(cjpeg->jdec_clk.clks->clk);

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

584

clk_disable_unprepare(jpeg->jdec_clk.clks->clk);

drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c

267

clk_disable_unprepare(cjpeg->venc_clk.clks->clk);

drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c

308

clk_disable_unprepare(jpeg->venc_clk.clks->clk);

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

18

for (i = 0; i < ARRAY_SIZE(comp->clk); i++) {

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

19

if (IS_ERR(comp->clk[i]))

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

21

err = clk_prepare_enable(comp->clk[i]);

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

33

for (i = 0; i < ARRAY_SIZE(comp->clk); i++) {

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

34

if (IS_ERR(comp->clk[i]))

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

36

clk_disable_unprepare(comp->clk[i]);

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

50

for (i = 0; i < ARRAY_SIZE(comp->clk); i++) {

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

51

comp->clk[i] = of_clk_get(node, i);

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

52

if (IS_ERR(comp->clk[i])) {

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.c

53

ret = dev_err_probe(dev, PTR_ERR(comp->clk[i]),

drivers/media/platform/mediatek/mdp/mtk_mdp_comp.h

34

struct clk *clk[2];

drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c

1757

comp->clks = devm_kzalloc(dev, sizeof(struct clk *) * comp->clk_num,

drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.h

221

struct clk **clks;

drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_cmn_drv.h

59

struct clk *vcodec_clk;

drivers/media/platform/mediatek/vpu/mtk_vpu.c

1008

clk_unprepare(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

1018

clk_prepare(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

1021

clk_unprepare(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

218

struct clk *clk;

drivers/media/platform/mediatek/vpu/mtk_vpu.c

252

clk_disable(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

259

ret = clk_enable(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

788

ret = clk_enable(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

803

clk_disable(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

834

vpu->clk = devm_clk_get(dev, "main");

drivers/media/platform/mediatek/vpu/mtk_vpu.c

835

if (IS_ERR(vpu->clk)) {

drivers/media/platform/mediatek/vpu/mtk_vpu.c

837

return PTR_ERR(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

842

ret = clk_prepare(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

945

clk_unprepare(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

970

clk_unprepare(vpu->clk);

drivers/media/platform/mediatek/vpu/mtk_vpu.c

987

clk_unprepare(vpu->clk);

drivers/media/platform/microchip/microchip-csi2dc.c

187

struct clk *pclk;

drivers/media/platform/microchip/microchip-csi2dc.c

188

struct clk *scck;

drivers/media/platform/microchip/microchip-isc-clk.c

167

__clk_get_name((req->best_parent_hw)->clk),

drivers/media/platform/microchip/microchip-isc-clk.c

269

isc_clk->clk = clk_register(isc->dev, &isc_clk->hw);

drivers/media/platform/microchip/microchip-isc-clk.c

270

if (IS_ERR(isc_clk->clk)) {

drivers/media/platform/microchip/microchip-isc-clk.c

272

return PTR_ERR(isc_clk->clk);

drivers/media/platform/microchip/microchip-isc-clk.c

274

of_clk_add_provider(np, of_clk_src_simple_get, isc_clk->clk);

drivers/media/platform/microchip/microchip-isc-clk.c

286

isc->isc_clks[i].clk = ERR_PTR(-EINVAL);

drivers/media/platform/microchip/microchip-isc-clk.c

307

if (!IS_ERR(isc_clk->clk))

drivers/media/platform/microchip/microchip-isc-clk.c

308

clk_unregister(isc_clk->clk);

drivers/media/platform/microchip/microchip-isc.h

283

struct clk *hclock;

drivers/media/platform/microchip/microchip-isc.h

284

struct clk *ispck;

drivers/media/platform/microchip/microchip-isc.h

29

struct clk *clk;

drivers/media/platform/microchip/microchip-sama5d2-isc.c

561

isc->ispck = isc->isc_clks[ISC_ISPCK].clk;

drivers/media/platform/nvidia/tegra-vde/vde.c

171

clk_disable_unprepare(vde->clk);

drivers/media/platform/nvidia/tegra-vde/vde.c

197

vde->clk, vde->rst);

drivers/media/platform/nvidia/tegra-vde/vde.c

207

err = clk_prepare_enable(vde->clk);

drivers/media/platform/nvidia/tegra-vde/vde.c

275

vde->clk = devm_clk_get(dev, NULL);

drivers/media/platform/nvidia/tegra-vde/vde.c

276

if (IS_ERR(vde->clk)) {

drivers/media/platform/nvidia/tegra-vde/vde.c

277

err = PTR_ERR(vde->clk);

drivers/media/platform/nvidia/tegra-vde/vde.c

404

clk_disable_unprepare(vde->clk);

drivers/media/platform/nvidia/tegra-vde/vde.h

112

struct clk *clk;

drivers/media/platform/nvidia/tegra-vde/vde.h

42

struct clk;

drivers/media/platform/nxp/imx-mipi-csis.c

752

ret = clk_set_rate(csis->clks[MIPI_CSIS_CLK_WRAP].clk,

drivers/media/platform/nxp/imx-pxp.c

1786

dev->clk = devm_clk_get(&pdev->dev, "axi");

drivers/media/platform/nxp/imx-pxp.c

1787

if (IS_ERR(dev->clk)) {

drivers/media/platform/nxp/imx-pxp.c

1788

ret = PTR_ERR(dev->clk);

drivers/media/platform/nxp/imx-pxp.c

1815

ret = clk_prepare_enable(dev->clk);

drivers/media/platform/nxp/imx-pxp.c

1894

clk_disable_unprepare(dev->clk);

drivers/media/platform/nxp/imx-pxp.c

1906

clk_disable_unprepare(dev->clk);

drivers/media/platform/nxp/imx-pxp.c

216

struct clk *clk;

drivers/media/platform/nxp/imx7-media-csi.c

229

struct clk *mclk;

drivers/media/platform/nxp/imx8mq-mipi-csi2.c

460

esc_clk_rate = clk_get_rate(state->clks[CSI2_CLK_ESC].clk);

drivers/media/platform/nxp/mx2_emmaprp.c

204

struct clk *clk_emma_ahb, *clk_emma_ipg;

drivers/media/platform/qcom/camss/camss-csid.c

1162

clock->clk = devm_clk_get(dev, res->clock[i]);

drivers/media/platform/qcom/camss/camss-csid.c

1163

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-csid.c

1164

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-csid.c

579

rate = clk_round_rate(clock->clk, clock->freq[j]);

drivers/media/platform/qcom/camss/camss-csid.c

586

ret = clk_set_rate(clock->clk, rate);

drivers/media/platform/qcom/camss/camss-csid.c

592

clk_set_rate(clock->clk, clock->freq[0]);

drivers/media/platform/qcom/camss/camss-csiphy.c

176

round_rate = clk_round_rate(clock->clk, clock->freq[j]);

drivers/media/platform/qcom/camss/camss-csiphy.c

185

ret = clk_set_rate(clock->clk, csiphy->timer_clk_rate);

drivers/media/platform/qcom/camss/camss-csiphy.c

654

clock->clk = devm_clk_get(dev, res->clock[i]);

drivers/media/platform/qcom/camss/camss-csiphy.c

655

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-csiphy.c

656

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-csiphy.h

38

struct csiphy_lane clk;

drivers/media/platform/qcom/camss/camss-ispif.c

1200

clock->clk = devm_clk_get(dev, res->clock[i]);

drivers/media/platform/qcom/camss/camss-ispif.c

1201

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-ispif.c

1202

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-ispif.c

1222

clock->clk = devm_clk_get(dev, res->clock_for_reset[i]);

drivers/media/platform/qcom/camss/camss-ispif.c

1223

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-ispif.c

1224

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss-vfe.c

1003

rate = clk_round_rate(clock->clk, clock->freq[j]);

drivers/media/platform/qcom/camss/camss-vfe.c

1010

ret = clk_set_rate(clock->clk, rate);

drivers/media/platform/qcom/camss/camss-vfe.c

1069

rate = clk_get_rate(clock->clk);

drivers/media/platform/qcom/camss/camss-vfe.c

1873

clock->clk = devm_clk_get(dev, res->clock[i]);

drivers/media/platform/qcom/camss/camss-vfe.c

1874

if (IS_ERR(clock->clk))

drivers/media/platform/qcom/camss/camss-vfe.c

1875

return PTR_ERR(clock->clk);

drivers/media/platform/qcom/camss/camss.c

4224

ret = clk_prepare_enable(clock[i].clk);

drivers/media/platform/qcom/camss/camss.c

4235

clk_disable_unprepare(clock[i].clk);

drivers/media/platform/qcom/camss/camss.c

4250

clk_disable_unprepare(clock[i].clk);

drivers/media/platform/qcom/camss/camss.c

4426

lncfg->clk.pos = mipi_csi2->clock_lane;

drivers/media/platform/qcom/camss/camss.c

4427

lncfg->clk.pol = mipi_csi2->lane_polarities[0];

drivers/media/platform/qcom/camss/camss.h

148

struct clk *clk;

drivers/media/platform/qcom/iris/iris_resources.c

101

static struct clk *iris_get_clk_by_type(struct iris_core *core, enum platform_clk_type clk_type)

drivers/media/platform/qcom/iris/iris_resources.c

113

return core->clock_tbl[j].clk;

drivers/media/platform/qcom/iris/iris_resources.c

123

struct clk *clock;

drivers/media/platform/qcom/iris/iris_resources.c

134

struct clk *clock;

drivers/media/platform/qcom/venus/core.h

196

struct clk *clks[VIDC_CLKS_NUM_MAX];

drivers/media/platform/qcom/venus/core.h

197

struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX];

drivers/media/platform/qcom/venus/core.h

198

struct clk *vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX];

drivers/media/platform/qcom/venus/pm_helpers.c

110

struct clk **clks, const char * const *id)

drivers/media/platform/qcom/venus/pm_helpers.c

126

static int vcodec_clks_enable(struct venus_core *core, struct clk **clks)

drivers/media/platform/qcom/venus/pm_helpers.c

146

static void vcodec_clks_disable(struct venus_core *core, struct clk **clks)

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1622

clk_disable_unprepare(pispbe->clk);

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1632

ret = clk_prepare_enable(pispbe->clk);

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1639

__func__, clk_get_rate(pispbe->clk));

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1720

pispbe->clk = devm_clk_get(&pdev->dev, NULL);

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1721

if (IS_ERR(pispbe->clk))

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

1722

return dev_err_probe(&pdev->dev, PTR_ERR(pispbe->clk),

drivers/media/platform/raspberrypi/pisp_be/pisp_be.c

210

struct clk *clk;

drivers/media/platform/raspberrypi/rp1-cfe/cfe.c

2345

cfe->clk = devm_clk_get(&pdev->dev, NULL);

drivers/media/platform/raspberrypi/rp1-cfe/cfe.c

2346

if (IS_ERR(cfe->clk)) {

drivers/media/platform/raspberrypi/rp1-cfe/cfe.c

2347

ret = dev_err_probe(&pdev->dev, PTR_ERR(cfe->clk),

drivers/media/platform/raspberrypi/rp1-cfe/cfe.c

2458

clk_disable_unprepare(cfe->clk);

drivers/media/platform/raspberrypi/rp1-cfe/cfe.c

2469

ret = clk_prepare_enable(cfe->clk);

drivers/media/platform/raspberrypi/rp1-cfe/cfe.c

277

struct clk *clk;

drivers/media/platform/renesas/rcar_drif.c

1385

ch->clk = devm_clk_get(&pdev->dev, "fck");

drivers/media/platform/renesas/rcar_drif.c

1386

if (IS_ERR(ch->clk)) {

drivers/media/platform/renesas/rcar_drif.c

1387

ret = PTR_ERR(ch->clk);

drivers/media/platform/renesas/rcar_drif.c

199

struct clk *clk; /* Module clock */

drivers/media/platform/renesas/rcar_drif.c

779

ret = clk_prepare_enable(sdr->ch[i]->clk);

drivers/media/platform/renesas/rcar_drif.c

825

clk_disable_unprepare(sdr->ch[i]->clk);

drivers/media/platform/renesas/rcar_drif.c

853

clk_disable_unprepare(sdr->ch[i]->clk);

drivers/media/platform/renesas/rcar_fdp1.c

2253

struct clk *clk;

drivers/media/platform/renesas/rcar_fdp1.c

2308

clk = clk_get(&pdev->dev, NULL);

drivers/media/platform/renesas/rcar_fdp1.c

2309

if (IS_ERR(clk)) {

drivers/media/platform/renesas/rcar_fdp1.c

2310

ret = PTR_ERR(clk);

drivers/media/platform/renesas/rcar_fdp1.c

2314

fdp1->clk_rate = clk_get_rate(clk);

drivers/media/platform/renesas/rcar_fdp1.c

2315

clk_put(clk);

drivers/media/platform/renesas/rcar_jpu.c

1247

ret = clk_prepare_enable(jpu->clk);

drivers/media/platform/renesas/rcar_jpu.c

1262

clk_disable_unprepare(jpu->clk);

drivers/media/platform/renesas/rcar_jpu.c

1285

clk_disable_unprepare(jpu->clk);

drivers/media/platform/renesas/rcar_jpu.c

1603

jpu->clk = devm_clk_get(&pdev->dev, NULL);

drivers/media/platform/renesas/rcar_jpu.c

1604

if (IS_ERR(jpu->clk)) {

drivers/media/platform/renesas/rcar_jpu.c

1606

return PTR_ERR(jpu->clk);

drivers/media/platform/renesas/rcar_jpu.c

1703

clk_disable_unprepare(jpu->clk);

drivers/media/platform/renesas/rcar_jpu.c

1715

clk_prepare_enable(jpu->clk);

drivers/media/platform/renesas/rcar_jpu.c

202

struct clk *clk;

drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h

143

struct clk *vclk;

drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c

113

struct clk *sysclk;

drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c

114

struct clk *vclk;

drivers/media/platform/renesas/vsp1/vsp1.h

22

struct clk;

drivers/media/platform/rockchip/rga/rga.h

84

struct clk *sclk;

drivers/media/platform/rockchip/rga/rga.h

85

struct clk *aclk;

drivers/media/platform/rockchip/rga/rga.h

86

struct clk *hclk;

drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c

604

struct clk *clk;

drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c

606

clk = devm_clk_get_optional(rkisp1->dev, "pclk");

drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c

607

if (IS_ERR(clk))

drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c

608

return dev_err_probe(rkisp1->dev, PTR_ERR(clk),

drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c

611

if (clk)

drivers/media/platform/rockchip/rkisp1/rkisp1-dev.c

612

rkisp1->clks[rkisp1->clk_size++].clk = clk;

drivers/media/platform/rockchip/rkvdec/rkvdec.h

136

struct clk *axi_clk;

drivers/media/platform/samsung/exynos-gsc/gsc-core.h

334

struct clk *clock[GSC_MAX_CLOCKS];

drivers/media/platform/samsung/exynos4-is/fimc-core.h

424

struct clk *clock[MAX_FIMC_CLOCKS];

drivers/media/platform/samsung/exynos4-is/fimc-is-i2c.c

20

struct clk *clock;

drivers/media/platform/samsung/exynos4-is/fimc-is.h

277

struct clk *clocks[ISS_CLKS_MAX];

drivers/media/platform/samsung/exynos4-is/fimc-lite.h

157

struct clk *clock;

drivers/media/platform/samsung/exynos4-is/media-dev.c

1075

struct clk *clock;

drivers/media/platform/samsung/exynos4-is/media-dev.h

123

struct clk *wbclk[FIMC_MAX_WBCLKS];

drivers/media/platform/samsung/exynos4-is/media-dev.h

134

struct clk *clks[FIMC_MAX_CAMCLKS];

drivers/media/platform/samsung/exynos4-is/media-dev.h

69

struct clk *clock;

drivers/media/platform/samsung/exynos4-is/mipi-csis.c

209

struct clk *clock[NUM_CSIS_CLOCKS];

drivers/media/platform/samsung/s3c-camif/camif-core.h

303

struct clk *clock[CLK_MAX_NUM];

drivers/media/platform/samsung/s5p-g2d/g2d.c

637

dev->clk = clk_get(&pdev->dev, "sclk_fimg2d");

drivers/media/platform/samsung/s5p-g2d/g2d.c

638

if (IS_ERR(dev->clk)) {

drivers/media/platform/samsung/s5p-g2d/g2d.c

643

ret = clk_prepare(dev->clk);

drivers/media/platform/samsung/s5p-g2d/g2d.c

732

clk_unprepare(dev->clk);

drivers/media/platform/samsung/s5p-g2d/g2d.c

734

clk_put(dev->clk);

drivers/media/platform/samsung/s5p-g2d/g2d.c

750

clk_unprepare(dev->clk);

drivers/media/platform/samsung/s5p-g2d/g2d.c

751

clk_put(dev->clk);

drivers/media/platform/samsung/s5p-g2d/g2d.h

25

struct clk *clk;

drivers/media/platform/samsung/s5p-g2d/g2d.h

26

struct clk *gate;

drivers/media/platform/samsung/s5p-jpeg/jpeg-core.h

123

struct clk *clocks[JPEG_MAX_CLOCKS];

drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h

197

struct clk *clock_gate;

drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h

199

struct clk *clocks[MFC_MAX_CLOCKS];

drivers/media/platform/st/sti/bdisp/bdisp.h

195

struct clk *clock;

drivers/media/platform/st/sti/delta/delta.h

498

struct clk *clk_delta;

drivers/media/platform/st/sti/delta/delta.h

499

struct clk *clk_st231;

drivers/media/platform/st/sti/delta/delta.h

500

struct clk *clk_flash_promip;

drivers/media/platform/st/sti/hva/hva-hw.c

326

hva->clk = devm_clk_get(dev, "clk_hva");

drivers/media/platform/st/sti/hva/hva-hw.c

327

if (IS_ERR(hva->clk)) {

drivers/media/platform/st/sti/hva/hva-hw.c

329

return PTR_ERR(hva->clk);

drivers/media/platform/st/sti/hva/hva-hw.c

332

ret = clk_prepare(hva->clk);

drivers/media/platform/st/sti/hva/hva-hw.c

335

hva->clk = ERR_PTR(-EINVAL);

drivers/media/platform/st/sti/hva/hva-hw.c

409

clk_unprepare(hva->clk);

drivers/media/platform/st/sti/hva/hva-hw.c

429

clk_disable_unprepare(hva->clk);

drivers/media/platform/st/sti/hva/hva-hw.c

438

if (clk_prepare_enable(hva->clk)) {

drivers/media/platform/st/sti/hva/hva-hw.c

444

if (clk_set_rate(hva->clk, CLK_RATE)) {

drivers/media/platform/st/sti/hva/hva-hw.c

447

clk_disable_unprepare(hva->clk);

drivers/media/platform/st/sti/hva/hva.h

348

struct clk *clk;

drivers/media/platform/st/stm32/dma2d/dma2d.h

116

struct clk *gate;

drivers/media/platform/st/stm32/stm32-csi.c

507

phy_clk_frate = clk_get_rate(csidev->clks[STM32_CSI_CLK_CSI2PHY].clk);

drivers/media/platform/st/stm32/stm32-dcmi.c

156

struct clk *mclk;

drivers/media/platform/st/stm32/stm32-dcmi.c

1891

struct clk *mclk;

drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-core.c

43

struct clk *mclk;

drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-core.c

44

struct clk *kclk;

drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-core.c

469

struct clk *kclk, *mclk;

drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.h

115

struct clk *bus_clk;

drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.h

116

struct clk *isp_clk;

drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.h

117

struct clk *ram_clk;

drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h

47

struct clk *clock_mod;

drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h

48

struct clk *clock_ram;

drivers/media/platform/sunxi/sun6i-mipi-csi2/sun6i_mipi_csi2.h

45

struct clk *clock_mod;

drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/sun8i_a83t_mipi_csi2.h

46

struct clk *clock_mod;

drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/sun8i_a83t_mipi_csi2.h

47

struct clk *clock_mipi;

drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/sun8i_a83t_mipi_csi2.h

48

struct clk *clock_misc;

drivers/media/platform/sunxi/sun8i-di/sun8i-di.h

230

struct clk *bus_clk;

drivers/media/platform/sunxi/sun8i-di/sun8i-di.h

231

struct clk *mod_clk;

drivers/media/platform/sunxi/sun8i-di/sun8i-di.h

232

struct clk *ram_clk;

drivers/media/platform/sunxi/sun8i-rotate/sun8i-rotate.h

129

struct clk *bus_clk;

drivers/media/platform/sunxi/sun8i-rotate/sun8i-rotate.h

130

struct clk *mod_clk;

drivers/media/platform/ti/cal/cal.h

192

struct clk *fclk;

drivers/media/platform/ti/omap3isp/isp.c

1268

u32 clk = 0;

drivers/media/platform/ti/omap3isp/isp.c

1273

clk |= ISPCTRL_H3A_CLK_EN;

drivers/media/platform/ti/omap3isp/isp.c

1276

clk |= ISPCTRL_HIST_CLK_EN;

drivers/media/platform/ti/omap3isp/isp.c

1279

clk |= ISPCTRL_RSZ_CLK_EN;

drivers/media/platform/ti/omap3isp/isp.c

1285

clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;

drivers/media/platform/ti/omap3isp/isp.c

1288

clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;

drivers/media/platform/ti/omap3isp/isp.c

1291

ISPCTRL_CLKS_MASK, clk);

drivers/media/platform/ti/omap3isp/isp.c

1377

struct clk *clk;

drivers/media/platform/ti/omap3isp/isp.c

1381

clk = devm_clk_get(isp->dev, isp_clocks[i]);

drivers/media/platform/ti/omap3isp/isp.c

1382

if (IS_ERR(clk)) {

drivers/media/platform/ti/omap3isp/isp.c

1384

return PTR_ERR(clk);

drivers/media/platform/ti/omap3isp/isp.c

1387

isp->clock[i] = clk;

drivers/media/platform/ti/omap3isp/isp.c

2056

buscfg->bus.csi2.lanecfg.clk.pos = vep->bus.mipi_csi2.clock_lane;

drivers/media/platform/ti/omap3isp/isp.c

2057

buscfg->bus.csi2.lanecfg.clk.pol =

drivers/media/platform/ti/omap3isp/isp.c

2060

buscfg->bus.csi2.lanecfg.clk.pol,

drivers/media/platform/ti/omap3isp/isp.c

2061

buscfg->bus.csi2.lanecfg.clk.pos);

drivers/media/platform/ti/omap3isp/isp.c

2086

buscfg->bus.ccp2.lanecfg.clk.pos = vep->bus.mipi_csi1.clock_lane;

drivers/media/platform/ti/omap3isp/isp.c

2087

buscfg->bus.ccp2.lanecfg.clk.pol = vep->bus.mipi_csi1.lane_polarity[0];

drivers/media/platform/ti/omap3isp/isp.c

2089

buscfg->bus.ccp2.lanecfg.clk.pol,

drivers/media/platform/ti/omap3isp/isp.c

2090

buscfg->bus.ccp2.lanecfg.clk.pos);

drivers/media/platform/ti/omap3isp/isp.c

284

static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)

drivers/media/platform/ti/omap3isp/isp.c

292

return isp->xclks[idx].clk;

drivers/media/platform/ti/omap3isp/isp.c

302

isp->xclks[i].clk = ERR_PTR(-EINVAL);

drivers/media/platform/ti/omap3isp/isp.c

324

xclk->clk = clk_register(NULL, &xclk->hw);

drivers/media/platform/ti/omap3isp/isp.c

325

if (IS_ERR(xclk->clk))

drivers/media/platform/ti/omap3isp/isp.c

326

return PTR_ERR(xclk->clk);

drivers/media/platform/ti/omap3isp/isp.c

346

if (!IS_ERR(xclk->clk))

drivers/media/platform/ti/omap3isp/isp.c

347

clk_unregister(xclk->clk);

drivers/media/platform/ti/omap3isp/isp.h

128

struct clk *clk;

drivers/media/platform/ti/omap3isp/isp.h

202

struct clk *clock[4];

drivers/media/platform/ti/omap3isp/ispcsiphy.c

200

if (lanes->clk.pol > 1 || lanes->clk.pos > 3)

drivers/media/platform/ti/omap3isp/ispcsiphy.c

203

if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos))

drivers/media/platform/ti/omap3isp/ispcsiphy.c

257

reg |= lanes->clk.pol << ISPCSI2_PHY_CFG_CLOCK_POL_SHIFT;

drivers/media/platform/ti/omap3isp/ispcsiphy.c

258

reg |= lanes->clk.pos << ISPCSI2_PHY_CFG_CLOCK_POSITION_SHIFT;

drivers/media/platform/ti/omap3isp/omap3isp.h

83

struct isp_csiphy_lane clk;

drivers/media/platform/verisilicon/hantro_drv.c

1126

vpu->clocks[0].clk = devm_clk_get(&pdev->dev, NULL);

drivers/media/platform/verisilicon/hantro_drv.c

1127

if (IS_ERR(vpu->clocks[0].clk))

drivers/media/platform/verisilicon/hantro_drv.c

1128

return PTR_ERR(vpu->clocks[0].clk);

drivers/media/platform/verisilicon/rockchip_vpu_hw.c

444

clk_set_rate(vpu->clocks[0].clk, RK3066_ACLK_MAX_FREQ);

drivers/media/platform/verisilicon/rockchip_vpu_hw.c

451

clk_set_rate(vpu->clocks[0].clk, RK3066_ACLK_MAX_FREQ);

drivers/media/platform/verisilicon/rockchip_vpu_hw.c

452

clk_set_rate(vpu->clocks[2].clk, RK3066_ACLK_MAX_FREQ);

drivers/media/platform/verisilicon/rockchip_vpu_hw.c

459

clk_set_rate(vpu->clocks[0].clk, RK3288_ACLK_MAX_FREQ);

drivers/media/platform/verisilicon/sunxi_vpu_hw.c

85

clk_set_rate(vpu->clocks[0].clk, 300000000);

drivers/media/platform/xilinx/xilinx-vip.c

215

xvip->clk = devm_clk_get(xvip->dev, NULL);

drivers/media/platform/xilinx/xilinx-vip.c

216

if (IS_ERR(xvip->clk))

drivers/media/platform/xilinx/xilinx-vip.c

217

return PTR_ERR(xvip->clk);

drivers/media/platform/xilinx/xilinx-vip.c

219

clk_prepare_enable(xvip->clk);

drivers/media/platform/xilinx/xilinx-vip.c

226

clk_disable_unprepare(xvip->clk);

drivers/media/platform/xilinx/xilinx-vip.h

100

struct clk *clk;

drivers/media/platform/xilinx/xilinx-vip.h

19

struct clk;

drivers/media/platform/xilinx/xilinx-vtc.c

182

ret = clk_prepare_enable(xvtc->xvip.clk);

drivers/media/platform/xilinx/xilinx-vtc.c

245

clk_disable_unprepare(xvtc->xvip.clk);

drivers/media/radio/radio-maxiradio.c

63

static const int clk = 1, data = 2, wren = 4, mo_st = 8, power = 16;

drivers/media/radio/radio-maxiradio.c

90

bits |= (pins & TEA575X_CLK) ? clk : 0;

drivers/media/rc/img-ir/img-ir-core.c

101

priv->clk = devm_clk_get(&pdev->dev, "core");

drivers/media/rc/img-ir/img-ir-core.c

102

if (IS_ERR(priv->clk))

drivers/media/rc/img-ir/img-ir-core.c

163

if (!IS_ERR(priv->clk))

drivers/media/rc/img-ir/img-ir-core.c

164

clk_disable_unprepare(priv->clk);

drivers/media/rc/img-ir/img-ir-core.c

57

if (!IS_ERR(priv->clk))

drivers/media/rc/img-ir/img-ir-core.c

58

clk_prepare_enable(priv->clk);

drivers/media/rc/img-ir/img-ir-hw.c

1059

if (!IS_ERR(priv->clk)) {

drivers/media/rc/img-ir/img-ir-hw.c

1060

hw->clk_hz = clk_get_rate(priv->clk);

drivers/media/rc/img-ir/img-ir-hw.c

1063

error = clk_notifier_register(priv->clk, &hw->clk_nb);

drivers/media/rc/img-ir/img-ir-hw.c

1109

if (!IS_ERR(priv->clk))

drivers/media/rc/img-ir/img-ir-hw.c

1110

clk_notifier_unregister(priv->clk, &hw->clk_nb);

drivers/media/rc/img-ir/img-ir-hw.c

1125

if (!IS_ERR(priv->clk))

drivers/media/rc/img-ir/img-ir-hw.c

1126

clk_notifier_unregister(priv->clk, &hw->clk_nb);

drivers/media/rc/img-ir/img-ir.h

130

struct clk;

drivers/media/rc/img-ir/img-ir.h

146

struct clk *clk;

drivers/media/rc/img-ir/img-ir.h

147

struct clk *sys_clk;

drivers/media/rc/ir-hix5hd2.c

89

struct clk *clock;

drivers/media/rc/mceusb.c

1033

int clk = 10000000;

drivers/media/rc/mceusb.c

1051

divisor = (clk >> (2 * prescaler)) / carrier;

drivers/media/rc/meson-ir-tx.c

286

struct clk *clock;

drivers/media/rc/mtk-cir.c

143

struct clk *clk;

drivers/media/rc/mtk-cir.c

144

struct clk *bus;

drivers/media/rc/mtk-cir.c

310

ir->clk = devm_clk_get(dev, "clk");

drivers/media/rc/mtk-cir.c

311

if (IS_ERR(ir->clk)) {

drivers/media/rc/mtk-cir.c

313

return PTR_ERR(ir->clk);

drivers/media/rc/mtk-cir.c

322

ir->bus = ir->clk;

drivers/media/rc/mtk-cir.c

362

if (clk_prepare_enable(ir->clk)) {

drivers/media/rc/mtk-cir.c

420

clk_disable_unprepare(ir->clk);

drivers/media/rc/mtk-cir.c

438

clk_disable_unprepare(ir->clk);

drivers/media/rc/st_rc.c

22

struct clk *sys_clock;

drivers/media/rc/sunxi-cir.c

159

unsigned int base_clk = clk_get_rate(ir->clk);

drivers/media/rc/sunxi-cir.c

190

ret = clk_prepare_enable(ir->clk);

drivers/media/rc/sunxi-cir.c

234

clk_disable_unprepare(ir->clk);

drivers/media/rc/sunxi-cir.c

281

ir->clk = devm_clk_get(dev, "ir");

drivers/media/rc/sunxi-cir.c

282

if (IS_ERR(ir->clk)) {

drivers/media/rc/sunxi-cir.c

284

return PTR_ERR(ir->clk);

drivers/media/rc/sunxi-cir.c

297

ret = clk_set_rate(ir->clk, b_clk_freq);

drivers/media/rc/sunxi-cir.c

95

struct clk *clk;

drivers/media/rc/sunxi-cir.c

96

struct clk *apb_clk;

drivers/media/test-drivers/vidtv/vidtv_mux.c

127

m->timing.clk += (CLOCK_UNIT_27MHZ / USEC_PER_SEC) * elapsed_time;

drivers/media/test-drivers/vidtv/vidtv_mux.c

234

args.pcr = m->timing.clk;

drivers/media/test-drivers/vidtv/vidtv_mux.c

305

args.pcr = m->timing.clk;

drivers/media/test-drivers/vidtv/vidtv_mux.h

45

u64 clk;

drivers/media/tuners/e4000.c

139

#define F_REF dev->clk

drivers/media/tuners/e4000.c

630

dev->clk = cfg->clock;

drivers/media/tuners/e4000_priv.h

20

u32 clk;

drivers/media/tuners/fc2580.c

240

uitmp = div64_u64((u64) dev->clk * uitmp, 1000000000000ULL);

drivers/media/tuners/fc2580.c

527

if (pdata->clk)

drivers/media/tuners/fc2580.c

528

dev->clk = pdata->clk;

drivers/media/tuners/fc2580.c

530

dev->clk = 16384000; /* internal clock */

drivers/media/tuners/fc2580.c

67

#define F_REF dev->clk

drivers/media/tuners/fc2580.h

27

u32 clk;

drivers/media/tuners/fc2580_priv.h

120

u32 clk;

drivers/media/usb/dvb-usb-v2/af9015.c

431

state->af9013_pdata[i].clk = 28800000;

drivers/media/usb/dvb-usb-v2/af9015.c

434

state->af9013_pdata[i].clk = 20480000;

drivers/media/usb/dvb-usb-v2/af9015.c

437

state->af9013_pdata[i].clk = 28000000;

drivers/media/usb/dvb-usb-v2/af9015.c

440

state->af9013_pdata[i].clk = 25000000;

drivers/media/usb/dvb-usb-v2/af9015.c

444

i, val, state->af9013_pdata[i].clk);

drivers/media/usb/dvb-usb-v2/dvbsky.c

283

m88ds3103_pdata.clk = 27000000;

drivers/media/usb/dvb-usb-v2/dvbsky.c

386

m88ds3103_pdata.clk = 27000000;

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

1382

pdata.clk = dev->rtl2832_platform_data.clk;

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

675

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

684

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

692

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

756

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

761

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

766

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

771

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

776

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

781

.clk = 28800000,

drivers/media/usb/dvb-usb-v2/rtl28xxu.c

786

.clk = 28800000,

drivers/media/usb/dvb-usb/dw2102.c

1660

m88ds3103_pdata.clk = 27000000;

drivers/media/usb/em28xx/em28xx-dvb.c

1137

tda10071_pdata.clk = 40444000; /* 40.444 MHz */

drivers/media/usb/em28xx/em28xx-dvb.c

1174

m88ds3103_pdata.clk = 27000000;

drivers/media/usb/em28xx/em28xx-dvb.c

1234

m88ds3103_pdata.clk = 27000000;

drivers/media/v4l2-core/v4l2-common.c

740

struct clk *__devm_v4l2_sensor_clk_get(struct device *dev, const char *id,

drivers/media/v4l2-core/v4l2-common.c

747

struct clk *clk;

drivers/media/v4l2-core/v4l2-common.c

751

clk = devm_clk_get_optional(dev, id);

drivers/media/v4l2-core/v4l2-common.c

752

if (IS_ERR(clk))

drivers/media/v4l2-core/v4l2-common.c

753

return clk;

drivers/media/v4l2-core/v4l2-common.c

767

if (clk) {

drivers/media/v4l2-core/v4l2-common.c

774

ret = clk_set_rate(clk, rate);

drivers/media/v4l2-core/v4l2-common.c

781

return clk;

drivers/media/v4l2-core/v4l2-common.c

806

return clk_hw->clk;

drivers/memory/atmel-ebi.c

118

unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);

drivers/memory/atmel-ebi.c

524

struct clk *clk;

drivers/memory/atmel-ebi.c

539

clk = devm_clk_get(dev, NULL);

drivers/memory/atmel-ebi.c

54

struct clk *clk;

drivers/memory/atmel-ebi.c

540

if (IS_ERR(clk))

drivers/memory/atmel-ebi.c

541

return PTR_ERR(clk);

drivers/memory/atmel-ebi.c

543

ebi->clk = clk;

drivers/memory/atmel-ebi.c

556

ebi->smc.clk = of_clk_get(smc_np, 0);

drivers/memory/atmel-ebi.c

557

if (IS_ERR(ebi->smc.clk)) {

drivers/memory/atmel-ebi.c

558

if (PTR_ERR(ebi->smc.clk) != -ENOENT)

drivers/memory/atmel-ebi.c

559

return PTR_ERR(ebi->smc.clk);

drivers/memory/atmel-ebi.c

561

ebi->smc.clk = NULL;

drivers/memory/atmel-ebi.c

563

ret = clk_prepare_enable(ebi->smc.clk);

drivers/memory/atmel-ebi.c

58

struct clk *clk;

drivers/memory/jz4780-nemc.c

145

rate = clk_get_rate(nemc->clk);

drivers/memory/jz4780-nemc.c

315

nemc->clk = devm_clk_get(dev, NULL);

drivers/memory/jz4780-nemc.c

316

if (IS_ERR(nemc->clk)) {

drivers/memory/jz4780-nemc.c

318

return PTR_ERR(nemc->clk);

drivers/memory/jz4780-nemc.c

321

ret = clk_prepare_enable(nemc->clk);

drivers/memory/jz4780-nemc.c

330

clk_disable_unprepare(nemc->clk);

drivers/memory/jz4780-nemc.c

391

clk_disable_unprepare(nemc->clk);

drivers/memory/jz4780-nemc.c

55

struct clk *clk;

drivers/memory/mtk-smi.c

143

struct clk *clk_async; /*only needed by mt2701*/

drivers/memory/mvebu-devbus.c

270

struct clk *clk;

drivers/memory/mvebu-devbus.c

283

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/memory/mvebu-devbus.c

284

if (IS_ERR(clk))

drivers/memory/mvebu-devbus.c

285

return PTR_ERR(clk);

drivers/memory/mvebu-devbus.c

292

rate = clk_get_rate(clk) / 1000;

drivers/memory/omap-gpmc.c

1252

dev_t.clk = min_gpmc_clk_period;

drivers/memory/omap-gpmc.c

1253

dev_t.t_bacc = dev_t.clk;

drivers/memory/omap-gpmc.c

1743

gpmc_t->sync_clk = gpmc_calc_divider(dev_t->clk) *

drivers/memory/omap-gpmc.c

264

static struct clk *gpmc_l3_clk;

drivers/memory/pl172.c

226

pl172->clk = devm_clk_get_enabled(dev, "mpmcclk");

drivers/memory/pl172.c

227

if (IS_ERR(pl172->clk))

drivers/memory/pl172.c

228

return dev_err_probe(dev, PTR_ERR(pl172->clk),

drivers/memory/pl172.c

231

pl172->rate = clk_get_rate(pl172->clk) / MSEC_PER_SEC;

drivers/memory/pl172.c

53

struct clk *clk;

drivers/memory/pl353-smc.c

24

struct clk *memclk;

drivers/memory/pl353-smc.c

25

struct clk *aclk;

drivers/memory/renesas-rpc-if.c

70

struct clk *spi_clk;

drivers/memory/renesas-rpc-if.c

71

struct clk *spix2_clk;

drivers/memory/samsung/exynos5422-dmc.c

176

struct clk *fout_spll;

drivers/memory/samsung/exynos5422-dmc.c

177

struct clk *fout_bpll;

drivers/memory/samsung/exynos5422-dmc.c

178

struct clk *mout_spll;

drivers/memory/samsung/exynos5422-dmc.c

179

struct clk *mout_bpll;

drivers/memory/samsung/exynos5422-dmc.c

180

struct clk *mout_mclk_cdrex;

drivers/memory/samsung/exynos5422-dmc.c

181

struct clk *mout_mx_mspll_ccore;

drivers/memory/stm32-fmc2-ebi.c

1652

ebi->clk = devm_clk_get(dev, NULL);

drivers/memory/stm32-fmc2-ebi.c

1653

if (IS_ERR(ebi->clk))

drivers/memory/stm32-fmc2-ebi.c

1654

return PTR_ERR(ebi->clk);

drivers/memory/stm32-fmc2-ebi.c

1731

clk_disable_unprepare(ebi->clk);

drivers/memory/stm32-fmc2-ebi.c

1740

return clk_prepare_enable(ebi->clk);

drivers/memory/stm32-fmc2-ebi.c

195

struct clk *clk;

drivers/memory/stm32-fmc2-ebi.c

416

unsigned long hclk = clk_get_rate(ebi->clk);

drivers/memory/stm32_omm.c

131

ret = clk_prepare_enable(omm->clk_bulk[i + 1].clk);

drivers/memory/stm32_omm.c

137

clk_disable_unprepare(omm->clk_bulk[i + 1].clk);

drivers/memory/stm32_omm.c

145

clk_disable_unprepare(omm->clk_bulk[i + 1].clk);

drivers/memory/stm32_omm.c

213

clk_rate = clk_get_rate(omm->clk_bulk[i].clk);

drivers/memory/stm32_omm.c

399

clk_disable_unprepare(omm->clk_bulk[0].clk);

drivers/memory/stm32_omm.c

408

return clk_prepare_enable(omm->clk_bulk[0].clk);

drivers/memory/tegra/mc.c

396

tick = (unsigned long long)mc->tick * clk_get_rate(mc->clk);

drivers/memory/tegra/mc.c

511

mc->clk = devm_clk_get_optional(mc->dev, "mc");

drivers/memory/tegra/mc.c

512

if (IS_ERR(mc->clk)) {

drivers/memory/tegra/mc.c

513

dev_err(mc->dev, "failed to get MC clock: %ld\n", PTR_ERR(mc->clk));

drivers/memory/tegra/mc.c

514

return PTR_ERR(mc->clk);

drivers/memory/tegra/tegra124-emc.c

1253

emc->debugfs.min_rate = clk_get_rate(emc->clk);

drivers/memory/tegra/tegra124-emc.c

1257

err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,

drivers/memory/tegra/tegra124-emc.c

1262

emc->clk);

drivers/memory/tegra/tegra124-emc.c

1409

hw_version, clk_get_rate(emc->clk) / 1000000);

drivers/memory/tegra/tegra124-emc.c

1412

err = dev_pm_opp_set_rate(emc->dev, clk_get_rate(emc->clk));

drivers/memory/tegra/tegra124-emc.c

1481

emc->clk = devm_clk_get(&pdev->dev, "emc");

drivers/memory/tegra/tegra124-emc.c

1482

if (IS_ERR(emc->clk))

drivers/memory/tegra/tegra124-emc.c

1483

return dev_err_probe(&pdev->dev, PTR_ERR(emc->clk),

drivers/memory/tegra/tegra124-emc.c

488

struct clk *clk;

drivers/memory/tegra/tegra186-emc.c

110

err = clk_set_min_rate(emc->clk, rate);

drivers/memory/tegra/tegra186-emc.c

140

err = clk_set_max_rate(emc->clk, rate);

drivers/memory/tegra/tegra186-emc.c

202

err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate, emc->debugfs.max_rate);

drivers/memory/tegra/tegra186-emc.c

205

emc->debugfs.min_rate, emc->debugfs.max_rate, emc->clk);

drivers/memory/tegra/tegra186-emc.c

24

struct clk *clk;

drivers/memory/tegra/tegra186-emc.c

324

emc->clk = devm_clk_get(&pdev->dev, "emc");

drivers/memory/tegra/tegra186-emc.c

325

if (IS_ERR(emc->clk)) {

drivers/memory/tegra/tegra186-emc.c

326

err = dev_err_probe(&pdev->dev, PTR_ERR(emc->clk),

drivers/memory/tegra/tegra20-emc.c

1067

clk_notifier_unregister(emc->clk, &emc->clk_nb);

drivers/memory/tegra/tegra20-emc.c

1081

emc->clk = devm_clk_get(emc->dev, NULL);

drivers/memory/tegra/tegra20-emc.c

1082

if (IS_ERR(emc->clk))

drivers/memory/tegra/tegra20-emc.c

1083

return dev_err_probe(emc->dev, PTR_ERR(emc->clk),

drivers/memory/tegra/tegra20-emc.c

1086

err = clk_notifier_register(emc->clk, &emc->clk_nb);

drivers/memory/tegra/tegra20-emc.c

1131

stat->current_frequency = clk_get_rate(emc->clk);

drivers/memory/tegra/tegra20-emc.c

202

struct clk *clk;

drivers/memory/tegra/tegra20-emc.c

682

return clk_get_rate(emc->clk);

drivers/memory/tegra/tegra20-emc.c

921

emc->debugfs.min_rate = clk_get_rate(emc->clk);

drivers/memory/tegra/tegra20-emc.c

925

err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,

drivers/memory/tegra/tegra20-emc.c

930

emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

1222

u32 tegra210_emc_dvfs_power_ramp_up(struct tegra210_emc *emc, u32 clk,

drivers/memory/tegra/tegra210-emc-core.c

1241

if (clk < 1000000 / DVFS_FGCG_MID_SPEED_THRESHOLD) {

drivers/memory/tegra/tegra210-emc-core.c

1246

(100000 / clk) + 1);

drivers/memory/tegra/tegra210-emc-core.c

1253

if (clk < 1000000 / DVFS_FGCG_HIGH_SPEED_THRESHOLD) {

drivers/memory/tegra/tegra210-emc-core.c

1254

if (clk < 1000000 / IOBRICK_DCC_THRESHOLD) {

drivers/memory/tegra/tegra210-emc-core.c

1263

(100000 / clk) + 1);

drivers/memory/tegra/tegra210-emc-core.c

1279

(100000 / clk) + 1);

drivers/memory/tegra/tegra210-emc-core.c

1284

EMC_PMACRO_BRICK_CTRL_RFU1, (100000 / clk) + 1);

drivers/memory/tegra/tegra210-emc-core.c

1287

if (clk < 1000000 / IOBRICK_DCC_THRESHOLD) {

drivers/memory/tegra/tegra210-emc-core.c

1295

(100000 / clk) + 1);

drivers/memory/tegra/tegra210-emc-core.c

1310

(100000 / clk) + 1);

drivers/memory/tegra/tegra210-emc-core.c

1315

EMC_FBIO_CFG5, (100000 / clk) + 10);

drivers/memory/tegra/tegra210-emc-core.c

1316

ramp_up_wait += 100000 + (10 * clk);

drivers/memory/tegra/tegra210-emc-core.c

1317

} else if (clk < 1000000 / DVFS_FGCG_MID_SPEED_THRESHOLD) {

drivers/memory/tegra/tegra210-emc-core.c

1319

EMC_PMACRO_BRICK_CTRL_RFU1, (100000 / clk) + 1);

drivers/memory/tegra/tegra210-emc-core.c

1321

EMC_FBIO_CFG5, (100000 / clk) + 10);

drivers/memory/tegra/tegra210-emc-core.c

1322

ramp_up_wait += 100000 + 10 * clk;

drivers/memory/tegra/tegra210-emc-core.c

1328

ramp_up_wait += 12 * clk;

drivers/memory/tegra/tegra210-emc-core.c

1337

u32 tegra210_emc_dvfs_power_ramp_down(struct tegra210_emc *emc, u32 clk,

drivers/memory/tegra/tegra210-emc-core.c

1360

ramp_down_wait = 12 * clk;

drivers/memory/tegra/tegra210-emc-core.c

1362

seq_wait = (100000 / clk) + 1;

drivers/memory/tegra/tegra210-emc-core.c

1364

if (clk < (1000000 / DVFS_FGCG_HIGH_SPEED_THRESHOLD)) {

drivers/memory/tegra/tegra210-emc-core.c

1365

if (clk < (1000000 / IOBRICK_DCC_THRESHOLD)) {

drivers/memory/tegra/tegra210-emc-core.c

1396

if (clk < (1000000 / IOBRICK_DCC_THRESHOLD)) {

drivers/memory/tegra/tegra210-emc-core.c

1423

ramp_down_wait += 100000 + (20 * clk);

drivers/memory/tegra/tegra210-emc-core.c

1426

if (clk < (1000000 / DVFS_FGCG_MID_SPEED_THRESHOLD)) {

drivers/memory/tegra/tegra210-emc-core.c

1644

err = clk_set_min_rate(emc->clk, rate);

drivers/memory/tegra/tegra210-emc-core.c

1674

err = clk_set_max_rate(emc->clk, rate);

drivers/memory/tegra/tegra210-emc-core.c

1736

emc->debugfs.min_rate = clk_get_rate(emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

1740

err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,

drivers/memory/tegra/tegra210-emc-core.c

1745

emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

1824

emc->clk = devm_clk_get(&pdev->dev, "emc");

drivers/memory/tegra/tegra210-emc-core.c

1825

if (IS_ERR(emc->clk))

drivers/memory/tegra/tegra210-emc-core.c

1826

return PTR_ERR(emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

1882

current_rate = clk_get_rate(emc->clk) / 1000;

drivers/memory/tegra/tegra210-emc-core.c

1950

err = tegra210_clk_emc_attach(emc->clk, &emc->provider);

drivers/memory/tegra/tegra210-emc-core.c

1982

tegra210_clk_emc_detach(emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

1994

tegra210_clk_emc_detach(emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

2003

err = clk_rate_exclusive_get(emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

2009

emc->resume_rate = clk_get_rate(emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

2011

clk_set_rate(emc->clk, 204000000);

drivers/memory/tegra/tegra210-emc-core.c

2012

tegra210_clk_emc_detach(emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

2014

dev_dbg(dev, "suspending at %lu Hz\n", clk_get_rate(emc->clk));

drivers/memory/tegra/tegra210-emc-core.c

2024

err = tegra210_clk_emc_attach(emc->clk, &emc->provider);

drivers/memory/tegra/tegra210-emc-core.c

2030

clk_set_rate(emc->clk, emc->resume_rate);

drivers/memory/tegra/tegra210-emc-core.c

2031

clk_rate_exclusive_put(emc->clk);

drivers/memory/tegra/tegra210-emc-core.c

2033

dev_dbg(dev, "resuming at %lu Hz\n", clk_get_rate(emc->clk));

drivers/memory/tegra/tegra210-emc.h

1009

u32 tegra210_emc_dvfs_power_ramp_down(struct tegra210_emc *emc, u32 clk,

drivers/memory/tegra/tegra210-emc.h

1011

u32 tegra210_emc_dvfs_power_ramp_up(struct tegra210_emc *emc, u32 clk,

drivers/memory/tegra/tegra210-emc.h

889

struct clk *clk;

drivers/memory/tegra/tegra30-emc.c

1200

return clk_get_rate(emc->clk);

drivers/memory/tegra/tegra30-emc.c

1439

emc->debugfs.min_rate = clk_get_rate(emc->clk);

drivers/memory/tegra/tegra30-emc.c

1443

err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,

drivers/memory/tegra/tegra30-emc.c

1448

emc->clk);

drivers/memory/tegra/tegra30-emc.c

1579

clk_notifier_unregister(emc->clk, &emc->clk_nb);

drivers/memory/tegra/tegra30-emc.c

1593

emc->clk = devm_clk_get(emc->dev, NULL);

drivers/memory/tegra/tegra30-emc.c

1594

if (IS_ERR(emc->clk))

drivers/memory/tegra/tegra30-emc.c

1595

return dev_err_probe(emc->dev, PTR_ERR(emc->clk),

drivers/memory/tegra/tegra30-emc.c

1598

err = clk_notifier_register(emc->clk, &emc->clk_nb);

drivers/memory/tegra/tegra30-emc.c

1687

err = clk_rate_exclusive_get(emc->clk);

drivers/memory/tegra/tegra30-emc.c

1709

clk_rate_exclusive_put(emc->clk);

drivers/memory/tegra/tegra30-emc.c

360

struct clk *clk;

drivers/memory/tegra/tegra30-emc.c

517

return tegra20_clk_prepare_emc_mc_same_freq(emc->clk, same);

drivers/memory/ti-aemif.c

112

struct clk *clk;

drivers/memory/ti-aemif.c

204

static u32 aemif_calc_rate(struct platform_device *pdev, int wanted, unsigned long clk)

drivers/memory/ti-aemif.c

208

result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;

drivers/memory/ti-aemif.c

211

clk, wanted);

drivers/memory/ti-aemif.c

379

aemif->clk = devm_clk_get_enabled(dev, NULL);

drivers/memory/ti-aemif.c

380

if (IS_ERR(aemif->clk))

drivers/memory/ti-aemif.c

381

return dev_err_probe(dev, PTR_ERR(aemif->clk),

drivers/memory/ti-aemif.c

384

aemif->clk_rate = clk_get_rate(aemif->clk) / MSEC_PER_SEC;

drivers/mfd/atmel-flexcom.c

101

clk_disable_unprepare(ddata->clk);

drivers/mfd/atmel-flexcom.c

34

struct clk *clk;

drivers/mfd/atmel-flexcom.c

61

ddata->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mfd/atmel-flexcom.c

62

if (IS_ERR(ddata->clk))

drivers/mfd/atmel-flexcom.c

63

return PTR_ERR(ddata->clk);

drivers/mfd/atmel-flexcom.c

65

err = clk_prepare_enable(ddata->clk);

drivers/mfd/atmel-flexcom.c

77

clk_disable_unprepare(ddata->clk);

drivers/mfd/atmel-flexcom.c

94

err = clk_prepare_enable(ddata->clk);

drivers/mfd/exynos-lpass.c

54

struct clk *sfr0_clk;

drivers/mfd/fsl-imx25-tsadc.c

111

clk_get_rate(tsadc->clk));

drivers/mfd/fsl-imx25-tsadc.c

113

clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000);

drivers/mfd/fsl-imx25-tsadc.c

127

clk_get_rate(tsadc->clk) / (2 * clk_div + 2));

drivers/mfd/fsl-imx25-tsadc.c

156

tsadc->clk = devm_clk_get(dev, "ipg");

drivers/mfd/fsl-imx25-tsadc.c

157

if (IS_ERR(tsadc->clk)) {

drivers/mfd/fsl-imx25-tsadc.c

159

return PTR_ERR(tsadc->clk);

drivers/mfd/intel-lpss.c

286

static void intel_lpss_unregister_clock_tree(struct clk *clk)

drivers/mfd/intel-lpss.c

288

struct clk *parent;

drivers/mfd/intel-lpss.c

290

while (clk) {

drivers/mfd/intel-lpss.c

291

parent = clk_get_parent(clk);

drivers/mfd/intel-lpss.c

292

clk_unregister(clk);

drivers/mfd/intel-lpss.c

293

clk = parent;

drivers/mfd/intel-lpss.c

299

struct clk **clk)

drivers/mfd/intel-lpss.c

302

struct clk *tmp = *clk;

drivers/mfd/intel-lpss.c

318

*clk = tmp;

drivers/mfd/intel-lpss.c

331

*clk = tmp;

drivers/mfd/intel-lpss.c

339

struct clk *clk;

drivers/mfd/intel-lpss.c

347

clk = clk_register_fixed_rate(NULL, dev_name(lpss->dev), NULL, 0,

drivers/mfd/intel-lpss.c

349

if (IS_ERR(clk))

drivers/mfd/intel-lpss.c

350

return PTR_ERR(clk);

drivers/mfd/intel-lpss.c

359

ret = intel_lpss_register_clock_divider(lpss, devname, &clk);

drivers/mfd/intel-lpss.c

367

lpss->clock = clkdev_create(clk, lpss->info->clk_con_id, "%s", devname);

drivers/mfd/intel-lpss.c

371

lpss->clk = clk;

drivers/mfd/intel-lpss.c

376

intel_lpss_unregister_clock_tree(clk);

drivers/mfd/intel-lpss.c

383

if (IS_ERR_OR_NULL(lpss->clk))

drivers/mfd/intel-lpss.c

387

intel_lpss_unregister_clock_tree(lpss->clk);

drivers/mfd/intel-lpss.c

83

struct clk *clk;

drivers/mfd/intel_quark_i2c_gpio.c

164

struct clk *i2c_clk;

drivers/mfd/intel_quark_i2c_gpio.c

39

struct clk *i2c_clk;

drivers/mfd/madera-core.c

490

if (!madera->mclk[MADERA_MCLK2].clk)

drivers/mfd/madera-core.c

717

ret = clk_prepare_enable(madera->mclk[MADERA_MCLK2].clk);

drivers/mfd/madera-core.c

751

clk_disable_unprepare(madera->mclk[MADERA_MCLK2].clk);

drivers/mfd/madera-core.c

786

clk_disable_unprepare(madera->mclk[MADERA_MCLK2].clk);

drivers/mfd/mxs-lradc.c

142

lradc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mfd/mxs-lradc.c

143

if (IS_ERR(lradc->clk)) {

drivers/mfd/mxs-lradc.c

145

return PTR_ERR(lradc->clk);

drivers/mfd/mxs-lradc.c

148

ret = clk_prepare_enable(lradc->clk);

drivers/mfd/mxs-lradc.c

228

clk_disable_unprepare(lradc->clk);

drivers/mfd/mxs-lradc.c

237

clk_disable_unprepare(lradc->clk);

drivers/mfd/omap-usb-host.c

615

i = sizeof(struct clk *) * omap->nports;

drivers/mfd/omap-usb-host.c

86

struct clk **utmi_clk;

drivers/mfd/omap-usb-host.c

87

struct clk **hsic60m_clk;

drivers/mfd/omap-usb-host.c

88

struct clk **hsic480m_clk;

drivers/mfd/omap-usb-host.c

90

struct clk *xclk60mhsp1_ck;

drivers/mfd/omap-usb-host.c

91

struct clk *xclk60mhsp2_ck;

drivers/mfd/omap-usb-host.c

92

struct clk *utmi_p1_gfclk;

drivers/mfd/omap-usb-host.c

93

struct clk *utmi_p2_gfclk;

drivers/mfd/omap-usb-host.c

94

struct clk *init_60m_fclk;

drivers/mfd/omap-usb-host.c

95

struct clk *ehci_logic_fck;

drivers/mfd/omap-usb-tll.c

102

struct clk *ch_clk[] __counted_by(nch);

drivers/mfd/qcom_rpm.c

46

struct clk *ramclk;

drivers/mfd/rz-mtu3.c

347

ddata->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mfd/rz-mtu3.c

348

if (IS_ERR(ddata->clk))

drivers/mfd/rz-mtu3.c

349

return PTR_ERR(ddata->clk);

drivers/mfd/stm32-lptimer.c

102

ddata->clk = devm_clk_get(dev, NULL);

drivers/mfd/stm32-lptimer.c

103

if (IS_ERR(ddata->clk))

drivers/mfd/stm32-lptimer.c

104

return PTR_ERR(ddata->clk);

drivers/mfd/stm32-timers.c

311

ddata->clk = devm_clk_get(dev, NULL);

drivers/mfd/stm32-timers.c

312

if (IS_ERR(ddata->clk))

drivers/mfd/stm32-timers.c

313

return PTR_ERR(ddata->clk);

drivers/mfd/syscon.c

126

clk = of_clk_get(np, 0);

drivers/mfd/syscon.c

127

if (IS_ERR(clk)) {

drivers/mfd/syscon.c

128

ret = PTR_ERR(clk);

drivers/mfd/syscon.c

133

ret = regmap_mmio_attach_clk(regmap, clk);

drivers/mfd/syscon.c

159

if (!IS_ERR(clk))

drivers/mfd/syscon.c

160

clk_put(clk);

drivers/mfd/syscon.c

42

struct clk *clk;

drivers/mfd/ti_am335x_tscadc.c

119

struct clk *clk;

drivers/mfd/ti_am335x_tscadc.c

230

clk = devm_clk_get(&pdev->dev, NULL);

drivers/mfd/ti_am335x_tscadc.c

231

if (IS_ERR(clk)) {

drivers/mfd/ti_am335x_tscadc.c

233

err = PTR_ERR(clk);

drivers/mfd/ti_am335x_tscadc.c

237

tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1;

drivers/mfd/twl-core.c

635

struct clk *osc;

drivers/misc/atmel-ssc.c

221

ssc->clk = devm_clk_get(&pdev->dev, "pclk");

drivers/misc/atmel-ssc.c

222

if (IS_ERR(ssc->clk)) {

drivers/misc/atmel-ssc.c

228

clk_prepare_enable(ssc->clk);

drivers/misc/atmel-ssc.c

231

clk_disable_unprepare(ssc->clk);

drivers/misc/atmel-ssc.c

60

clk_prepare(ssc->clk);

drivers/misc/atmel-ssc.c

80

clk_unprepare(ssc->clk);

drivers/misc/cardreader/rts5228.c

566

int err, clk;

drivers/misc/cardreader/rts5228.c

591

clk = card_clock;

drivers/misc/cardreader/rts5228.c

593

clk = card_clock * 2;

drivers/misc/cardreader/rts5228.c

595

clk, pcr->cur_clock);

drivers/misc/cardreader/rts5228.c

597

if (clk == pcr->cur_clock)

drivers/misc/cardreader/rts5228.c

601

n = pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N);

drivers/misc/cardreader/rts5228.c

603

n = clk - 4;

drivers/misc/cardreader/rts5228.c

604

if ((clk <= 4) || (n > 396))

drivers/misc/cardreader/rts5228.c

607

mcu_cnt = 125/clk + 3;

drivers/misc/cardreader/rts5228.c

684

pcr->cur_clock = clk;

drivers/misc/cardreader/rts5261.c

634

int err, clk;

drivers/misc/cardreader/rts5261.c

664

clk = card_clock;

drivers/misc/cardreader/rts5261.c

666

clk = card_clock * 2;

drivers/misc/cardreader/rts5261.c

668

clk, pcr->cur_clock);

drivers/misc/cardreader/rts5261.c

670

if (clk == pcr->cur_clock)

drivers/misc/cardreader/rts5261.c

674

n = pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N);

drivers/misc/cardreader/rts5261.c

676

n = clk - 4;

drivers/misc/cardreader/rts5261.c

677

if ((clk <= 4) || (n > 396))

drivers/misc/cardreader/rts5261.c

680

mcu_cnt = 125/clk + 3;

drivers/misc/cardreader/rts5261.c

757

pcr->cur_clock = clk;

drivers/misc/cardreader/rts5264.c

793

int err, clk;

drivers/misc/cardreader/rts5264.c

818

clk = card_clock;

drivers/misc/cardreader/rts5264.c

820

clk = card_clock * 2;

drivers/misc/cardreader/rts5264.c

822

clk, pcr->cur_clock);

drivers/misc/cardreader/rts5264.c

824

if (clk == pcr->cur_clock)

drivers/misc/cardreader/rts5264.c

828

n = pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N);

drivers/misc/cardreader/rts5264.c

830

n = clk - 4;

drivers/misc/cardreader/rts5264.c

831

if ((clk <= 4) || (n > 396))

drivers/misc/cardreader/rts5264.c

834

mcu_cnt = 125/clk + 3;

drivers/misc/cardreader/rts5264.c

921

pcr->cur_clock = clk;

drivers/misc/cardreader/rtsx_pcr.c

684

int err, clk;

drivers/misc/cardreader/rtsx_pcr.c

726

clk = card_clock;

drivers/misc/cardreader/rtsx_pcr.c

728

clk = card_clock * 2;

drivers/misc/cardreader/rtsx_pcr.c

730

clk, pcr->cur_clock);

drivers/misc/cardreader/rtsx_pcr.c

732

if (clk == pcr->cur_clock)

drivers/misc/cardreader/rtsx_pcr.c

736

n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N);

drivers/misc/cardreader/rtsx_pcr.c

738

n = (u8)(clk - 2);

drivers/misc/cardreader/rtsx_pcr.c

739

if ((clk <= 2) || (n > MAX_DIV_N_PCR))

drivers/misc/cardreader/rtsx_pcr.c

742

mcu_cnt = (u8)(125/clk + 3);

drivers/misc/cardreader/rtsx_pcr.c

795

pcr->cur_clock = clk;

drivers/misc/sram.c

382

struct clk *clk;

drivers/misc/sram.c

411

clk = devm_clk_get_optional_enabled(sram->dev, NULL);

drivers/misc/sram.c

412

if (IS_ERR(clk))

drivers/misc/sram.c

413

return PTR_ERR(clk);

drivers/misc/xilinx_sdfec.c

180

struct clk *core_clk;

drivers/misc/xilinx_sdfec.c

181

struct clk *axi_clk;

drivers/misc/xilinx_sdfec.c

182

struct clk *din_words_clk;

drivers/misc/xilinx_sdfec.c

183

struct clk *din_clk;

drivers/misc/xilinx_sdfec.c

184

struct clk *dout_clk;

drivers/misc/xilinx_sdfec.c

185

struct clk *dout_words_clk;

drivers/misc/xilinx_sdfec.c

186

struct clk *ctrl_clk;

drivers/misc/xilinx_sdfec.c

187

struct clk *status_clk;

drivers/mmc/core/pwrseq_simple.c

32

struct clk *ext_clk;

drivers/mmc/host/atmel-mci.c

370

struct clk *mck;

drivers/mmc/host/au1xmmc.c

1013

host->clk = clk_get(&pdev->dev, ALCHEMY_PERIPH_CLK);

drivers/mmc/host/au1xmmc.c

1014

if (IS_ERR(host->clk)) {

drivers/mmc/host/au1xmmc.c

1016

ret = PTR_ERR(host->clk);

drivers/mmc/host/au1xmmc.c

1020

ret = clk_prepare_enable(host->clk);

drivers/mmc/host/au1xmmc.c

1101

clk_disable_unprepare(host->clk);

drivers/mmc/host/au1xmmc.c

1103

clk_put(host->clk);

drivers/mmc/host/au1xmmc.c

1143

clk_disable_unprepare(host->clk);

drivers/mmc/host/au1xmmc.c

1144

clk_put(host->clk);

drivers/mmc/host/au1xmmc.c

122

struct clk *clk;

drivers/mmc/host/au1xmmc.c

589

unsigned int pbus = clk_get_rate(host->clk);

drivers/mmc/host/bcm2835.c

1351

clk_disable_unprepare(host->clk);

drivers/mmc/host/bcm2835.c

1360

return clk_prepare_enable(host->clk);

drivers/mmc/host/bcm2835.c

1426

host->clk = devm_clk_get(dev, NULL);

drivers/mmc/host/bcm2835.c

1427

if (IS_ERR(host->clk)) {

drivers/mmc/host/bcm2835.c

1428

ret = dev_err_probe(dev, PTR_ERR(host->clk), "could not get clk\n");

drivers/mmc/host/bcm2835.c

1432

ret = clk_prepare_enable(host->clk);

drivers/mmc/host/bcm2835.c

1436

host->max_clk = clk_get_rate(host->clk);

drivers/mmc/host/bcm2835.c

1449

clk_disable_unprepare(host->clk);

drivers/mmc/host/bcm2835.c

1472

clk_disable_unprepare(host->clk);

drivers/mmc/host/bcm2835.c

152

struct clk *clk;

drivers/mmc/host/cavium-thunderx.c

100

host->sys_freq = clk_get_rate(host->clk);

drivers/mmc/host/cavium-thunderx.c

166

clk_disable_unprepare(host->clk);

drivers/mmc/host/cavium-thunderx.c

184

clk_disable_unprepare(host->clk);

drivers/mmc/host/cavium-thunderx.c

91

host->clk = devm_clk_get(dev, NULL);

drivers/mmc/host/cavium-thunderx.c

92

if (IS_ERR(host->clk)) {

drivers/mmc/host/cavium-thunderx.c

93

ret = PTR_ERR(host->clk);

drivers/mmc/host/cavium-thunderx.c

97

ret = clk_prepare_enable(host->clk);

drivers/mmc/host/cavium.h

64

struct clk *clk;

drivers/mmc/host/davinci_mmc.c

1066

mmc_pclk = clk_get_rate(host->clk);

drivers/mmc/host/davinci_mmc.c

1218

host->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/davinci_mmc.c

1219

if (IS_ERR(host->clk))

drivers/mmc/host/davinci_mmc.c

1220

return PTR_ERR(host->clk);

drivers/mmc/host/davinci_mmc.c

1222

ret = clk_prepare_enable(host->clk);

drivers/mmc/host/davinci_mmc.c

1226

host->mmc_input_clk = clk_get_rate(host->clk);

drivers/mmc/host/davinci_mmc.c

1335

clk_disable_unprepare(host->clk);

drivers/mmc/host/davinci_mmc.c

1347

clk_disable_unprepare(host->clk);

drivers/mmc/host/davinci_mmc.c

1356

clk_disable(host->clk);

drivers/mmc/host/davinci_mmc.c

1366

ret = clk_enable(host->clk);

drivers/mmc/host/davinci_mmc.c

170

struct clk *clk;

drivers/mmc/host/dw_mmc-hi3798cv200.c

22

struct clk *sample_clk;

drivers/mmc/host/dw_mmc-hi3798cv200.c

23

struct clk *drive_clk;

drivers/mmc/host/dw_mmc-hi3798mv200.c

29

struct clk *sample_clk;

drivers/mmc/host/dw_mmc-hi3798mv200.c

30

struct clk *drive_clk;

drivers/mmc/host/dw_mmc-rockchip.c

171

struct clk *clock = sample ? priv->sample_clk : priv->drv_clk;

drivers/mmc/host/dw_mmc-rockchip.c

34

struct clk *drv_clk;

drivers/mmc/host/dw_mmc-rockchip.c

35

struct clk *sample_clk;

drivers/mmc/host/dw_mmc-rockchip.c

82

struct clk *clock = sample ? priv->sample_clk : priv->drv_clk;

drivers/mmc/host/dw_mmc.h

213

struct clk *biu_clk;

drivers/mmc/host/dw_mmc.h

214

struct clk *ciu_clk;

drivers/mmc/host/jz4740_mmc.c

1068

host->clk = devm_clk_get(&pdev->dev, "mmc");

drivers/mmc/host/jz4740_mmc.c

1069

if (IS_ERR(host->clk))

drivers/mmc/host/jz4740_mmc.c

1070

return dev_err_probe(&pdev->dev, PTR_ERR(host->clk),

drivers/mmc/host/jz4740_mmc.c

152

struct clk *clk;

drivers/mmc/host/jz4740_mmc.c

895

clk_set_rate(host->clk, host->mmc->f_max);

drivers/mmc/host/jz4740_mmc.c

897

real_rate = clk_get_rate(host->clk);

drivers/mmc/host/jz4740_mmc.c

954

clk_prepare_enable(host->clk);

drivers/mmc/host/jz4740_mmc.c

972

clk_disable_unprepare(host->clk);

drivers/mmc/host/litex_mmc.c

514

struct clk *clk;

drivers/mmc/host/litex_mmc.c

531

clk = devm_clk_get(dev, NULL);

drivers/mmc/host/litex_mmc.c

532

if (IS_ERR(clk))

drivers/mmc/host/litex_mmc.c

533

return dev_err_probe(dev, PTR_ERR(clk), "can't get clock\n");

drivers/mmc/host/litex_mmc.c

534

host->ref_clk = clk_get_rate(clk);

drivers/mmc/host/loongson2-mmc.c

1000

clk_disable_unprepare(host->clk);

drivers/mmc/host/loongson2-mmc.c

1010

return clk_prepare_enable(host->clk);

drivers/mmc/host/loongson2-mmc.c

234

struct clk *clk;

drivers/mmc/host/loongson2-mmc.c

883

host->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/mmc/host/loongson2-mmc.c

884

if (IS_ERR(host->clk))

drivers/mmc/host/loongson2-mmc.c

885

return PTR_ERR(host->clk);

drivers/mmc/host/loongson2-mmc.c

887

if (host->clk) {

drivers/mmc/host/loongson2-mmc.c

888

ret = devm_clk_rate_exclusive_get(dev, host->clk);

drivers/mmc/host/loongson2-mmc.c

892

host->current_clk = clk_get_rate(host->clk);

drivers/mmc/host/meson-gx-mmc.c

1143

struct clk *core_clk;

drivers/mmc/host/meson-gx-mmc.c

158

struct clk *mux_clk;

drivers/mmc/host/meson-gx-mmc.c

159

struct clk *mmc_clk;

drivers/mmc/host/meson-gx-mmc.c

442

struct clk *clk;

drivers/mmc/host/meson-gx-mmc.c

446

clk = devm_clk_get(host->dev, name);

drivers/mmc/host/meson-gx-mmc.c

447

if (IS_ERR(clk))

drivers/mmc/host/meson-gx-mmc.c

448

return dev_err_probe(host->dev, PTR_ERR(clk),

drivers/mmc/host/meson-gx-mmc.c

451

mux_parent_names[i] = __clk_get_name(clk);

drivers/mmc/host/meson-mx-sdhc-clkc.c

86

clk_bulk_data[bulk_index].clk = devm_clk_hw_get_clk(dev, hw, name_suffix);

drivers/mmc/host/meson-mx-sdhc-clkc.c

88

return PTR_ERR_OR_ZERO(clk_bulk_data[bulk_index].clk);

drivers/mmc/host/meson-mx-sdhc-mmc.c

53

struct clk *pclk;

drivers/mmc/host/meson-mx-sdhc-mmc.c

54

struct clk *sd_clk;

drivers/mmc/host/meson-mx-sdhc-mmc.c

807

host->sd_clk = host->bulk_clks[1].clk;

drivers/mmc/host/meson-mx-sdio.c

110

struct clk *cfg_div_clk;

drivers/mmc/host/meson-mx-sdio.c

571

static struct clk *meson_mx_mmc_register_clk(struct device *dev,

drivers/mmc/host/meson-mx-sdio.c

576

struct clk *clk;

drivers/mmc/host/meson-mx-sdio.c

621

clk = devm_clk_hw_get_clk(dev, &host_clkc->cfg_div.hw, "cfg_div_clk");

drivers/mmc/host/meson-mx-sdio.c

622

if (IS_ERR(clk))

drivers/mmc/host/meson-mx-sdio.c

623

return dev_err_ptr_probe(dev, PTR_ERR(clk),

drivers/mmc/host/meson-mx-sdio.c

626

return clk;

drivers/mmc/host/meson-mx-sdio.c

640

struct clk *core_clk;

drivers/mmc/host/mmci.c

1263

u32 clk;

drivers/mmc/host/mmci.c

1276

clk = host->clk_reg & ~variant->clkreg_enable;

drivers/mmc/host/mmci.c

1278

clk = host->clk_reg | variant->clkreg_enable;

drivers/mmc/host/mmci.c

1280

mmci_write_clkreg(host, clk);

drivers/mmc/host/mmci.c

2010

ret = clk_set_rate(host->clk, ios->clock);

drivers/mmc/host/mmci.c

2015

host->mclk = clk_get_rate(host->clk);

drivers/mmc/host/mmci.c

2260

host->clk = devm_clk_get(&dev->dev, NULL);

drivers/mmc/host/mmci.c

2261

if (IS_ERR(host->clk))

drivers/mmc/host/mmci.c

2262

return PTR_ERR(host->clk);

drivers/mmc/host/mmci.c

2264

ret = clk_prepare_enable(host->clk);

drivers/mmc/host/mmci.c

2275

host->mclk = clk_get_rate(host->clk);

drivers/mmc/host/mmci.c

2282

ret = clk_set_rate(host->clk, variant->f_max);

drivers/mmc/host/mmci.c

2285

host->mclk = clk_get_rate(host->clk);

drivers/mmc/host/mmci.c

2311

mmc->f_min = clk_round_rate(host->clk, 100000);

drivers/mmc/host/mmci.c

2486

clk_disable_unprepare(host->clk);

drivers/mmc/host/mmci.c

2515

clk_disable_unprepare(host->clk);

drivers/mmc/host/mmci.c

2563

clk_disable_unprepare(host->clk);

drivers/mmc/host/mmci.c

2576

clk_prepare_enable(host->clk);

drivers/mmc/host/mmci.c

403

void mmci_write_clkreg(struct mmci_host *host, u32 clk)

drivers/mmc/host/mmci.c

405

if (host->clk_reg != clk) {

drivers/mmc/host/mmci.c

406

host->clk_reg = clk;

drivers/mmc/host/mmci.c

407

writel(clk, host->base + MMCICLOCK);

drivers/mmc/host/mmci.c

443

u32 clk = variant->clkreg;

drivers/mmc/host/mmci.c

452

clk = MCI_CLK_BYPASS;

drivers/mmc/host/mmci.c

454

clk |= MCI_ST_UX500_NEG_EDGE;

drivers/mmc/host/mmci.c

463

clk = DIV_ROUND_UP(host->mclk, desired) - 2;

drivers/mmc/host/mmci.c

464

if (clk >= 256)

drivers/mmc/host/mmci.c

465

clk = 255;

drivers/mmc/host/mmci.c

466

host->cclk = host->mclk / (clk + 2);

drivers/mmc/host/mmci.c

472

clk = host->mclk / (2 * desired) - 1;

drivers/mmc/host/mmci.c

473

if (clk >= 256)

drivers/mmc/host/mmci.c

474

clk = 255;

drivers/mmc/host/mmci.c

475

host->cclk = host->mclk / (2 * (clk + 1));

drivers/mmc/host/mmci.c

478

clk |= variant->clkreg_enable;

drivers/mmc/host/mmci.c

479

clk |= MCI_CLK_ENABLE;

drivers/mmc/host/mmci.c

488

clk |= MCI_4BIT_BUS;

drivers/mmc/host/mmci.c

490

clk |= variant->clkreg_8bit_bus_enable;

drivers/mmc/host/mmci.c

494

clk |= variant->clkreg_neg_edge_enable;

drivers/mmc/host/mmci.c

496

mmci_write_clkreg(host, clk);

drivers/mmc/host/mmci.h

263

struct clk;

drivers/mmc/host/mmci.h

417

struct clk *clk;

drivers/mmc/host/mmci.h

467

void mmci_write_clkreg(struct mmci_host *host, u32 clk);

drivers/mmc/host/mmci_stm32_sdmmc.c

300

unsigned int clk = 0, ddr = 0;

drivers/mmc/host/mmci_stm32_sdmmc.c

315

clk = DIV_ROUND_UP(host->mclk, 2 * desired);

drivers/mmc/host/mmci_stm32_sdmmc.c

316

if (clk > MCI_STM32_CLK_CLKDIV_MSK)

drivers/mmc/host/mmci_stm32_sdmmc.c

317

clk = MCI_STM32_CLK_CLKDIV_MSK;

drivers/mmc/host/mmci_stm32_sdmmc.c

318

host->cclk = host->mclk / (2 * clk);

drivers/mmc/host/mmci_stm32_sdmmc.c

326

clk = MCI_STM32_CLK_CLKDIV_MSK;

drivers/mmc/host/mmci_stm32_sdmmc.c

327

host->cclk = host->mclk / (2 * clk);

drivers/mmc/host/mmci_stm32_sdmmc.c

337

clk |= MCI_STM32_CLK_WIDEBUS_4;

drivers/mmc/host/mmci_stm32_sdmmc.c

339

clk |= MCI_STM32_CLK_WIDEBUS_8;

drivers/mmc/host/mmci_stm32_sdmmc.c

341

clk |= MCI_STM32_CLK_HWFCEN;

drivers/mmc/host/mmci_stm32_sdmmc.c

342

clk |= host->clk_reg_add;

drivers/mmc/host/mmci_stm32_sdmmc.c

343

clk |= ddr;

drivers/mmc/host/mmci_stm32_sdmmc.c

346

clk |= MCI_STM32_CLK_BUSSPEED;

drivers/mmc/host/mmci_stm32_sdmmc.c

348

mmci_write_clkreg(host, clk);

drivers/mmc/host/mmci_stm32_sdmmc.c

626

u32 clk;

drivers/mmc/host/mmci_stm32_sdmmc.c

645

clk = host->clk_reg;

drivers/mmc/host/mmci_stm32_sdmmc.c

646

clk &= ~MCI_STM32_CLK_SEL_MSK;

drivers/mmc/host/mmci_stm32_sdmmc.c

647

clk |= MCI_STM32_CLK_SELFBCK;

drivers/mmc/host/mmci_stm32_sdmmc.c

648

mmci_write_clkreg(host, clk);

drivers/mmc/host/moxart-mmc.c

556

struct clk *clk;

drivers/mmc/host/moxart-mmc.c

577

clk = devm_clk_get(dev, NULL);

drivers/mmc/host/moxart-mmc.c

578

if (IS_ERR(clk))

drivers/mmc/host/moxart-mmc.c

579

return PTR_ERR(clk);

drivers/mmc/host/moxart-mmc.c

594

host->sysclk = clk_get_rate(clk);

drivers/mmc/host/mtk-sd.c

496

struct clk *src_clk; /* msdc source clock */

drivers/mmc/host/mtk-sd.c

497

struct clk *h_clk; /* msdc h_clk */

drivers/mmc/host/mtk-sd.c

498

struct clk *bus_clk; /* bus clock which used to access register */

drivers/mmc/host/mtk-sd.c

499

struct clk *src_clk_cg; /* msdc source clock control gate */

drivers/mmc/host/mtk-sd.c

500

struct clk *sys_clk_cg; /* msdc subsys clock control gate */

drivers/mmc/host/mtk-sd.c

501

struct clk *crypto_clk; /* msdc crypto clock control gate */

drivers/mmc/host/mvsdio.c

50

struct clk *clk;

drivers/mmc/host/mvsdio.c

724

host->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/mvsdio.c

725

if (IS_ERR(host->clk))

drivers/mmc/host/mvsdio.c

728

clk_prepare_enable(host->clk);

drivers/mmc/host/mvsdio.c

744

host->base_clock = clk_get_rate(host->clk) / 2;

drivers/mmc/host/mvsdio.c

786

clk_disable_unprepare(host->clk);

drivers/mmc/host/mvsdio.c

800

if (!IS_ERR(host->clk))

drivers/mmc/host/mvsdio.c

801

clk_disable_unprepare(host->clk);

drivers/mmc/host/mxcmmc.c

142

struct clk *clk_ipg;

drivers/mmc/host/mxcmmc.c

143

struct clk *clk_per;

drivers/mmc/host/mxs-mmc.c

601

ssp->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/mxs-mmc.c

602

if (IS_ERR(ssp->clk))

drivers/mmc/host/mxs-mmc.c

603

return PTR_ERR(ssp->clk);

drivers/mmc/host/mxs-mmc.c

605

ret = clk_prepare_enable(ssp->clk);

drivers/mmc/host/mxs-mmc.c

665

clk_disable_unprepare(ssp->clk);

drivers/mmc/host/mxs-mmc.c

680

clk_disable_unprepare(ssp->clk);

drivers/mmc/host/mxs-mmc.c

689

clk_disable_unprepare(ssp->clk);

drivers/mmc/host/mxs-mmc.c

699

return clk_prepare_enable(ssp->clk);

drivers/mmc/host/omap.c

130

struct clk * iclk;

drivers/mmc/host/omap.c

131

struct clk * fclk;

drivers/mmc/host/omap_hsmmc.c

175

struct clk *fclk;

drivers/mmc/host/omap_hsmmc.c

176

struct clk *dbclk;

drivers/mmc/host/owl-mmc.c

102

struct clk *clk;

drivers/mmc/host/owl-mmc.c

421

clk_rate = clk_round_rate(owl_host->clk, rate << 1);

drivers/mmc/host/owl-mmc.c

422

ret = clk_set_rate(owl_host->clk, clk_rate);

drivers/mmc/host/owl-mmc.c

495

clk_prepare_enable(owl_host->clk);

drivers/mmc/host/owl-mmc.c

509

clk_disable_unprepare(owl_host->clk);

drivers/mmc/host/owl-mmc.c

586

owl_host->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/owl-mmc.c

587

if (IS_ERR(owl_host->clk))

drivers/mmc/host/owl-mmc.c

588

return dev_err_probe(&pdev->dev, PTR_ERR(owl_host->clk),

drivers/mmc/host/pxamci.c

446

unsigned int clk = rate / ios->clock;

drivers/mmc/host/pxamci.c

449

clk_prepare_enable(host->clk);

drivers/mmc/host/pxamci.c

456

if (!clk)

drivers/mmc/host/pxamci.c

457

clk = 1;

drivers/mmc/host/pxamci.c

464

if (rate / clk > ios->clock)

drivers/mmc/host/pxamci.c

465

clk <<= 1;

drivers/mmc/host/pxamci.c

466

host->clkrt = fls(clk) - 1;

drivers/mmc/host/pxamci.c

476

clk_disable_unprepare(host->clk);

drivers/mmc/host/pxamci.c

54

struct clk *clk;

drivers/mmc/host/pxamci.c

654

host->clk = devm_clk_get(dev, NULL);

drivers/mmc/host/pxamci.c

655

if (IS_ERR(host->clk))

drivers/mmc/host/pxamci.c

656

return dev_err_probe(dev, PTR_ERR(host->clk),

drivers/mmc/host/pxamci.c

659

host->clkrate = clk_get_rate(host->clk);

drivers/mmc/host/renesas_sdhi.h

76

struct clk *clk;

drivers/mmc/host/renesas_sdhi.h

77

struct clk *clkh;

drivers/mmc/host/renesas_sdhi.h

78

struct clk *clk_cd;

drivers/mmc/host/renesas_sdhi_core.c

1084

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/renesas_sdhi_core.c

1085

if (IS_ERR(priv->clk))

drivers/mmc/host/renesas_sdhi_core.c

1086

return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk), "cannot get clock");

drivers/mmc/host/renesas_sdhi_core.c

113

mmc->f_max = clk_get_rate(priv->clk);

drivers/mmc/host/renesas_sdhi_core.c

1137

priv->clkh = clk_get_parent(clk_get_parent(priv->clk));

drivers/mmc/host/renesas_sdhi_core.c

119

mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L);

drivers/mmc/host/renesas_sdhi_core.c

131

struct clk *ref_clk = priv->clk;

drivers/mmc/host/renesas_sdhi_core.c

143

return clk_get_rate(priv->clk);

drivers/mmc/host/renesas_sdhi_core.c

187

clk_set_rate(priv->clk, best_freq >> clkh_shift);

drivers/mmc/host/renesas_sdhi_core.c

189

return clk_get_rate(priv->clk);

drivers/mmc/host/renesas_sdhi_core.c

196

u32 clk = 0, clock;

drivers/mmc/host/renesas_sdhi_core.c

215

for (clk = 0x80000080; new_clock + clk_margin >= (clock << 1); clk >>= 1)

drivers/mmc/host/renesas_sdhi_core.c

219

if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1)) {

drivers/mmc/host/renesas_sdhi_core.c

221

clk |= 0xff;

drivers/mmc/host/renesas_sdhi_core.c

223

clk &= ~0xff;

drivers/mmc/host/renesas_sdhi_core.c

226

clock = clk & CLK_CTL_DIV_MASK;

drivers/mmc/host/sdhci-bcm-kona.c

236

pltfm_priv->clk = devm_clk_get(dev, NULL);

drivers/mmc/host/sdhci-bcm-kona.c

237

if (IS_ERR(pltfm_priv->clk)) {

drivers/mmc/host/sdhci-bcm-kona.c

239

ret = PTR_ERR(pltfm_priv->clk);

drivers/mmc/host/sdhci-bcm-kona.c

243

ret = clk_set_rate(pltfm_priv->clk, host->mmc->f_max);

drivers/mmc/host/sdhci-bcm-kona.c

249

ret = clk_prepare_enable(pltfm_priv->clk);

drivers/mmc/host/sdhci-bcm-kona.c

304

clk_disable_unprepare(pltfm_priv->clk);

drivers/mmc/host/sdhci-bcm-kona.c

315

struct clk *clk = pltfm_host->clk;

drivers/mmc/host/sdhci-bcm-kona.c

318

clk_disable_unprepare(clk);

drivers/mmc/host/sdhci-brcmstb.c

227

u16 clk;

drivers/mmc/host/sdhci-brcmstb.c

231

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-brcmstb.c

232

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-brcmstb.c

237

sdhci_enable_clk(host, clk);

drivers/mmc/host/sdhci-brcmstb.c

494

struct clk *clk;

drivers/mmc/host/sdhci-brcmstb.c

495

struct clk *base_clk = NULL;

drivers/mmc/host/sdhci-brcmstb.c

503

clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/mmc/host/sdhci-brcmstb.c

504

if (IS_ERR(clk))

drivers/mmc/host/sdhci-brcmstb.c

505

return dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/mmc/host/sdhci-brcmstb.c

611

pltfm_host->clk = clk;

drivers/mmc/host/sdhci-brcmstb.c

79

struct clk *base_clk;

drivers/mmc/host/sdhci-cadence.c

551

struct clk *clk;

drivers/mmc/host/sdhci-cadence.c

557

clk = devm_clk_get_enabled(dev, NULL);

drivers/mmc/host/sdhci-cadence.c

558

if (IS_ERR(clk))

drivers/mmc/host/sdhci-cadence.c

559

return PTR_ERR(clk);

drivers/mmc/host/sdhci-cadence.c

572

pltfm_host->clk = clk;

drivers/mmc/host/sdhci-cadence.c

621

ret = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-cadence.c

636

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-dove.c

78

pltfm_host->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/mmc/host/sdhci-esdhc-imx.c

1869

pltfm_host->clk = imx_data->clk_per;

drivers/mmc/host/sdhci-esdhc-imx.c

1880

pltfm_host->clock = clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-esdhc-imx.c

370

struct clk *clk_ipg;

drivers/mmc/host/sdhci-esdhc-imx.c

371

struct clk *clk_ahb;

drivers/mmc/host/sdhci-esdhc-imx.c

372

struct clk *clk_per;

drivers/mmc/host/sdhci-esdhc-mcf.c

26

struct clk *clk_ipg;

drivers/mmc/host/sdhci-esdhc-mcf.c

27

struct clk *clk_ahb;

drivers/mmc/host/sdhci-esdhc-mcf.c

28

struct clk *clk_per;

drivers/mmc/host/sdhci-esdhc-mcf.c

440

pltfm_host->clk = mcf_data->clk_per;

drivers/mmc/host/sdhci-esdhc-mcf.c

441

pltfm_host->clock = clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-iproc.c

161

if (pltfm_host->clk)

drivers/mmc/host/sdhci-iproc.c

389

pltfm_host->clk = devm_clk_get_enabled(dev, NULL);

drivers/mmc/host/sdhci-iproc.c

390

if (IS_ERR(pltfm_host->clk))

drivers/mmc/host/sdhci-iproc.c

391

return PTR_ERR(pltfm_host->clk);

drivers/mmc/host/sdhci-milbeaut.c

105

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-milbeaut.c

106

if (clk & SDHCI_CLOCK_INT_STABLE)

drivers/mmc/host/sdhci-milbeaut.c

146

u32 val, clk;

drivers/mmc/host/sdhci-milbeaut.c

153

clk = MLB_CAL_TOCLKFREQ_MHZ(rate);

drivers/mmc/host/sdhci-milbeaut.c

154

clk = min_t(u32, MLB_TOCLKFREQ_MAX, clk);

drivers/mmc/host/sdhci-milbeaut.c

156

(clk << MLB_CR_SET_CR_TOCLKFREQ_SFT);

drivers/mmc/host/sdhci-milbeaut.c

158

clk = MLB_CAL_TOCLKFREQ_KHZ(rate);

drivers/mmc/host/sdhci-milbeaut.c

159

clk = min_t(u32, MLB_TOCLKFREQ_MAX, clk);

drivers/mmc/host/sdhci-milbeaut.c

160

clk = max_t(u32, MLB_TOCLKFREQ_MIN, clk);

drivers/mmc/host/sdhci-milbeaut.c

161

val |= clk << MLB_CR_SET_CR_TOCLKFREQ_SFT;

drivers/mmc/host/sdhci-milbeaut.c

164

clk = MLB_CAL_BCLKFREQ(rate);

drivers/mmc/host/sdhci-milbeaut.c

165

clk = min_t(u32, MLB_BCLKFREQ_MAX, clk);

drivers/mmc/host/sdhci-milbeaut.c

166

clk = max_t(u32, MLB_BCLKFREQ_MIN, clk);

drivers/mmc/host/sdhci-milbeaut.c

167

val |= clk << MLB_CR_SET_CR_BCLKFREQ_SFT;

drivers/mmc/host/sdhci-milbeaut.c

213

int rate = clk_get_rate(priv->clk);

drivers/mmc/host/sdhci-milbeaut.c

284

priv->clk = devm_clk_get(&pdev->dev, "core");

drivers/mmc/host/sdhci-milbeaut.c

285

if (IS_ERR(priv->clk)) {

drivers/mmc/host/sdhci-milbeaut.c

286

ret = PTR_ERR(priv->clk);

drivers/mmc/host/sdhci-milbeaut.c

290

ret = clk_prepare_enable(priv->clk);

drivers/mmc/host/sdhci-milbeaut.c

304

clk_disable_unprepare(priv->clk);

drivers/mmc/host/sdhci-milbeaut.c

319

clk_disable_unprepare(priv->clk);

drivers/mmc/host/sdhci-milbeaut.c

54

struct clk *clk_iface;

drivers/mmc/host/sdhci-milbeaut.c

55

struct clk *clk;

drivers/mmc/host/sdhci-milbeaut.c

88

u16 clk;

drivers/mmc/host/sdhci-milbeaut.c

92

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-milbeaut.c

93

clk = (clk & ~SDHCI_CLOCK_CARD_EN) | SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci-milbeaut.c

94

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-milbeaut.c

98

clk |= SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-milbeaut.c

99

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-msm.c

1828

struct clk *core_clk = msm_host->bulk_clks[0].clk;

drivers/mmc/host/sdhci-msm.c

1848

u16 clk;

drivers/mmc/host/sdhci-msm.c

1860

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-msm.c

1861

sdhci_enable_clk(host, clk);

drivers/mmc/host/sdhci-msm.c

2540

struct clk *clk;

drivers/mmc/host/sdhci-msm.c

2598

clk = devm_clk_get(&pdev->dev, "iface");

drivers/mmc/host/sdhci-msm.c

2599

if (IS_ERR(clk)) {

drivers/mmc/host/sdhci-msm.c

2600

ret = PTR_ERR(clk);

drivers/mmc/host/sdhci-msm.c

2604

msm_host->bulk_clks[1].clk = clk;

drivers/mmc/host/sdhci-msm.c

2607

clk = devm_clk_get(&pdev->dev, "core");

drivers/mmc/host/sdhci-msm.c

2608

if (IS_ERR(clk)) {

drivers/mmc/host/sdhci-msm.c

2609

ret = PTR_ERR(clk);

drivers/mmc/host/sdhci-msm.c

2613

msm_host->bulk_clks[0].clk = clk;

drivers/mmc/host/sdhci-msm.c

2636

clk = devm_clk_get(&pdev->dev, "cal");

drivers/mmc/host/sdhci-msm.c

2637

if (IS_ERR(clk))

drivers/mmc/host/sdhci-msm.c

2638

clk = NULL;

drivers/mmc/host/sdhci-msm.c

2639

msm_host->bulk_clks[2].clk = clk;

drivers/mmc/host/sdhci-msm.c

2641

clk = devm_clk_get(&pdev->dev, "sleep");

drivers/mmc/host/sdhci-msm.c

2642

if (IS_ERR(clk))

drivers/mmc/host/sdhci-msm.c

2643

clk = NULL;

drivers/mmc/host/sdhci-msm.c

2644

msm_host->bulk_clks[3].clk = clk;

drivers/mmc/host/sdhci-msm.c

273

struct clk *bus_clk; /* SDHC bus voter clock */

drivers/mmc/host/sdhci-msm.c

274

struct clk *xo_clk; /* TCXO clk needed for FLL feature of cm_dll*/

drivers/mmc/host/sdhci-msm.c

372

struct clk *core_clk = msm_host->bulk_clks[0].clk;

drivers/mmc/host/sdhci-npcm.c

49

pltfm_host->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/mmc/host/sdhci-npcm.c

50

if (IS_ERR(pltfm_host->clk)) {

drivers/mmc/host/sdhci-npcm.c

51

return PTR_ERR(pltfm_host->clk);

drivers/mmc/host/sdhci-of-arasan.c

1126

u16 clk;

drivers/mmc/host/sdhci-of-arasan.c

1128

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-arasan.c

1129

clk &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);

drivers/mmc/host/sdhci-of-arasan.c

1130

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-arasan.c

1135

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-arasan.c

1137

sdhci_enable_clk(host, clk);

drivers/mmc/host/sdhci-of-arasan.c

1229

u32 mhz = DIV_ROUND_CLOSEST_ULL(clk_get_rate(pltfm_host->clk), 1000000);

drivers/mmc/host/sdhci-of-arasan.c

1585

struct clk *clk_xin,

drivers/mmc/host/sdhci-of-arasan.c

162

struct clk *sdcardclk;

drivers/mmc/host/sdhci-of-arasan.c

1637

struct clk *clk_xin,

drivers/mmc/host/sdhci-of-arasan.c

164

struct clk *sampleclk;

drivers/mmc/host/sdhci-of-arasan.c

1748

struct clk *clk_xin,

drivers/mmc/host/sdhci-of-arasan.c

1806

mhz = DIV_ROUND_CLOSEST_ULL(clk_get_rate(pltfm_host->clk), 1000000);

drivers/mmc/host/sdhci-of-arasan.c

188

struct clk *clk_ahb;

drivers/mmc/host/sdhci-of-arasan.c

1881

struct clk *clk_xin;

drivers/mmc/host/sdhci-of-arasan.c

1882

struct clk *clk_dll;

drivers/mmc/host/sdhci-of-arasan.c

1960

pltfm_host->clk = clk_xin;

drivers/mmc/host/sdhci-of-arasan.c

2059

struct clk *clk_ahb = sdhci_arasan->clk_ahb;

drivers/mmc/host/sdhci-of-arasan.c

2060

struct clk *clk_xin = pltfm_host->clk;

drivers/mmc/host/sdhci-of-arasan.c

648

clk_disable(pltfm_host->clk);

drivers/mmc/host/sdhci-of-arasan.c

675

ret = clk_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-of-aspeed.c

242

u16 clk;

drivers/mmc/host/sdhci-of-aspeed.c

247

parent = clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-of-aspeed.c

281

clk = div << SDHCI_DIVIDER_SHIFT;

drivers/mmc/host/sdhci-of-aspeed.c

285

sdhci_enable_clk(host, clk);

drivers/mmc/host/sdhci-of-aspeed.c

40

struct clk *clk;

drivers/mmc/host/sdhci-of-aspeed.c

423

pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/sdhci-of-aspeed.c

424

if (IS_ERR(pltfm_host->clk))

drivers/mmc/host/sdhci-of-aspeed.c

425

return PTR_ERR(pltfm_host->clk);

drivers/mmc/host/sdhci-of-aspeed.c

427

ret = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-of-aspeed.c

445

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-of-aspeed.c

459

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-of-aspeed.c

532

sdc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/sdhci-of-aspeed.c

533

if (IS_ERR(sdc->clk))

drivers/mmc/host/sdhci-of-aspeed.c

534

return PTR_ERR(sdc->clk);

drivers/mmc/host/sdhci-of-aspeed.c

536

ret = clk_prepare_enable(sdc->clk);

drivers/mmc/host/sdhci-of-aspeed.c

565

clk_disable_unprepare(sdc->clk);

drivers/mmc/host/sdhci-of-aspeed.c

573

clk_disable_unprepare(sdc->clk);

drivers/mmc/host/sdhci-of-at91.c

437

struct clk *gck = priv->gck;

drivers/mmc/host/sdhci-of-at91.c

438

struct clk *hclock = priv->hclock;

drivers/mmc/host/sdhci-of-at91.c

439

struct clk *mainck = priv->mainck;

drivers/mmc/host/sdhci-of-at91.c

46

struct clk *hclock;

drivers/mmc/host/sdhci-of-at91.c

47

struct clk *gck;

drivers/mmc/host/sdhci-of-at91.c

48

struct clk *mainck;

drivers/mmc/host/sdhci-of-at91.c

64

u16 clk;

drivers/mmc/host/sdhci-of-at91.c

76

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-at91.c

77

clk &= SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci-of-at91.c

78

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-at91.c

83

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-of-at91.c

85

clk |= SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci-of-at91.c

86

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-at91.c

89

if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE),

drivers/mmc/host/sdhci-of-at91.c

96

clk |= SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-of-at91.c

97

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1066

u16 clk;

drivers/mmc/host/sdhci-of-dwcmshc.c

1069

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1070

clk &= ~SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-of-dwcmshc.c

1071

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1084

clk |= SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-of-dwcmshc.c

1085

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1251

u16 clk;

drivers/mmc/host/sdhci-of-dwcmshc.c

1260

clk_set_rate(pltfm_host->clk, clock);

drivers/mmc/host/sdhci-of-dwcmshc.c

1262

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1263

clk |= SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci-of-dwcmshc.c

1264

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1851

u16 clk;

drivers/mmc/host/sdhci-of-dwcmshc.c

1865

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1866

clk |= SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci-of-dwcmshc.c

1867

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1868

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1869

if (!(clk & SDHCI_CLOCK_INT_EN)) {

drivers/mmc/host/sdhci-of-dwcmshc.c

1897

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1898

clk &= ~SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci-of-dwcmshc.c

1899

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-of-dwcmshc.c

1993

pltfm_host->clk = devm_clk_get(dev, "core");

drivers/mmc/host/sdhci-of-dwcmshc.c

1994

if (IS_ERR(pltfm_host->clk))

drivers/mmc/host/sdhci-of-dwcmshc.c

1995

return dev_err_probe(dev, PTR_ERR(pltfm_host->clk),

drivers/mmc/host/sdhci-of-dwcmshc.c

1998

err = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-of-dwcmshc.c

2070

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-of-dwcmshc.c

2101

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-of-dwcmshc.c

2125

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-of-dwcmshc.c

2141

ret = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-of-dwcmshc.c

2173

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-of-dwcmshc.c

274

struct clk *bus_clk;

drivers/mmc/host/sdhci-of-dwcmshc.c

372

if (pltfm_host->clk)

drivers/mmc/host/sdhci-of-dwcmshc.c

382

return clk_round_rate(pltfm_host->clk, ULONG_MAX);

drivers/mmc/host/sdhci-of-dwcmshc.c

728

err = clk_set_rate(pltfm_host->clk, clock);

drivers/mmc/host/sdhci-of-esdhc.c

1070

unsigned int clk;

drivers/mmc/host/sdhci-of-esdhc.c

1076

clk = esdhc->peripheral_clock / 3;

drivers/mmc/host/sdhci-of-esdhc.c

1077

if (host->clock > clk)

drivers/mmc/host/sdhci-of-esdhc.c

1078

esdhc_of_set_clock(host, clk);

drivers/mmc/host/sdhci-of-esdhc.c

1151

clk = host->max_clk / (esdhc->div_ratio + 1);

drivers/mmc/host/sdhci-of-esdhc.c

1152

esdhc_of_set_clock(host, clk);

drivers/mmc/host/sdhci-of-esdhc.c

1344

struct clk *clk;

drivers/mmc/host/sdhci-of-esdhc.c

1380

clk = of_clk_get(np, 0);

drivers/mmc/host/sdhci-of-esdhc.c

1381

if (!IS_ERR(clk)) {

drivers/mmc/host/sdhci-of-esdhc.c

1392

esdhc->peripheral_clock = clk_get_rate(clk) / 2;

drivers/mmc/host/sdhci-of-esdhc.c

1394

esdhc->peripheral_clock = clk_get_rate(clk);

drivers/mmc/host/sdhci-of-esdhc.c

1396

clk_put(clk);

drivers/mmc/host/sdhci-of-k1.c

173

return clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-of-k1.c

221

pltfm_host->clk = sdhst->clk_io;

drivers/mmc/host/sdhci-of-k1.c

64

struct clk *clk_core;

drivers/mmc/host/sdhci-of-k1.c

65

struct clk *clk_io;

drivers/mmc/host/sdhci-of-ma35d1.c

213

pltfm_host->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/mmc/host/sdhci-of-ma35d1.c

214

if (IS_ERR(pltfm_host->clk))

drivers/mmc/host/sdhci-of-ma35d1.c

215

return dev_err_probe(dev, PTR_ERR(pltfm_host->clk),

drivers/mmc/host/sdhci-of-sparx5.c

187

pltfm_host->clk = devm_clk_get_enabled(&pdev->dev, "core");

drivers/mmc/host/sdhci-of-sparx5.c

188

if (IS_ERR(pltfm_host->clk))

drivers/mmc/host/sdhci-of-sparx5.c

189

return dev_err_probe(&pdev->dev, PTR_ERR(pltfm_host->clk),

drivers/mmc/host/sdhci-omap.c

1276

pltfm_host->clk = devm_clk_get(dev, "fck");

drivers/mmc/host/sdhci-omap.c

1277

if (IS_ERR(pltfm_host->clk))

drivers/mmc/host/sdhci-omap.c

1278

return PTR_ERR(pltfm_host->clk);

drivers/mmc/host/sdhci-omap.c

1280

ret = clk_set_rate(pltfm_host->clk, mmc->f_max);

drivers/mmc/host/sdhci-omap.c

672

dsor = DIV_ROUND_UP(clk_get_rate(host->clk), clock);

drivers/mmc/host/sdhci-omap.c

761

return clk_get_rate(pltfm_host->clk) / SYSCTL_CLKD_MAX;

drivers/mmc/host/sdhci-pci-arasan.c

190

u8 drv_type, u8 itap, u8 trim, u8 clk)

drivers/mmc/host/sdhci-pci-arasan.c

234

ret = arasan_phy_write(host, FREQSEL(clk), DLL_STATUS);

drivers/mmc/host/sdhci-pci-arasan.c

248

u8 clk;

drivers/mmc/host/sdhci-pci-arasan.c

255

clk = 0x0;

drivers/mmc/host/sdhci-pci-arasan.c

257

clk = 0x2;

drivers/mmc/host/sdhci-pci-arasan.c

259

clk = 0x1;

drivers/mmc/host/sdhci-pci-arasan.c

261

clk = 0x0;

drivers/mmc/host/sdhci-pci-arasan.c

265

DLLTRM_ICP, clk);

drivers/mmc/host/sdhci-pci-arasan.c

275

DLLTRM_ICP, clk);

drivers/mmc/host/sdhci-pci-arasan.c

281

DLLTRM_ICP, clk);

drivers/mmc/host/sdhci-pci-arasan.c

286

0x0, DLLTRM_ICP, clk);

drivers/mmc/host/sdhci-pci-arasan.c

291

DLLTRM_ICP, clk);

drivers/mmc/host/sdhci-pci-core.c

684

u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-core.c

687

if (clk & SDHCI_CLOCK_CARD_EN)

drivers/mmc/host/sdhci-pci-core.c

688

sdhci_writew(host, clk & ~SDHCI_CLOCK_CARD_EN, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-dwc-mshc.c

33

u16 clk;

drivers/mmc/host/sdhci-pci-dwc-mshc.c

68

clk = SDHCI_PROG_CLOCK_MODE | SDHCI_CLOCK_INT_EN |

drivers/mmc/host/sdhci-pci-dwc-mshc.c

70

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-gli.c

1257

u16 clk;

drivers/mmc/host/sdhci-pci-gli.c

1271

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-pci-gli.c

1277

sdhci_enable_clk(host, clk);

drivers/mmc/host/sdhci-pci-gli.c

608

u16 clk;

drivers/mmc/host/sdhci-pci-gli.c

618

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-pci-gli.c

628

sdhci_enable_clk(host, clk);

drivers/mmc/host/sdhci-pci-gli.c

801

u16 clk;

drivers/mmc/host/sdhci-pci-gli.c

812

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-pci-gli.c

822

sdhci_enable_clk(host, clk);

drivers/mmc/host/sdhci-pci-gli.c

990

u16 clk = 0;

drivers/mmc/host/sdhci-pci-gli.c

992

if (read_poll_timeout_atomic(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE),

drivers/mmc/host/sdhci-pci-o2micro.c

565

static void sdhci_o2_enable_clk(struct sdhci_host *host, u16 clk)

drivers/mmc/host/sdhci-pci-o2micro.c

568

clk |= SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci-pci-o2micro.c

569

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-o2micro.c

573

clk |= SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-pci-o2micro.c

574

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-pci-o2micro.c

580

u16 clk;

drivers/mmc/host/sdhci-pci-o2micro.c

631

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci-pci-o2micro.c

632

sdhci_o2_enable_clk(host, clk);

drivers/mmc/host/sdhci-pic32.c

47

struct clk *sys_clk;

drivers/mmc/host/sdhci-pic32.c

48

struct clk *base_clk;

drivers/mmc/host/sdhci-pltfm.c

188

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-pltfm.c

200

ret = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-pltfm.c

206

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-pltfm.c

31

return clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-pltfm.h

22

struct clk *clk;

drivers/mmc/host/sdhci-pxav2.c

261

struct clk *clk, *clk_core;

drivers/mmc/host/sdhci-pxav2.c

270

clk = devm_clk_get_optional_enabled(dev, "io");

drivers/mmc/host/sdhci-pxav2.c

271

if (!clk)

drivers/mmc/host/sdhci-pxav2.c

272

clk = devm_clk_get_enabled(dev, NULL);

drivers/mmc/host/sdhci-pxav2.c

273

if (IS_ERR(clk))

drivers/mmc/host/sdhci-pxav2.c

274

return dev_err_probe(dev, PTR_ERR(clk), "failed to get io clock\n");

drivers/mmc/host/sdhci-pxav2.c

275

pltfm_host->clk = clk;

drivers/mmc/host/sdhci-pxav3.c

424

pltfm_host->clk = pxa->clk_io;

drivers/mmc/host/sdhci-pxav3.c

52

struct clk *clk_core;

drivers/mmc/host/sdhci-pxav3.c

53

struct clk *clk_io;

drivers/mmc/host/sdhci-s3c.c

122

struct clk *clk_io;

drivers/mmc/host/sdhci-s3c.c

123

struct clk *clk_bus[MAX_BUS_CLK];

drivers/mmc/host/sdhci-s3c.c

182

struct clk *clksrc = ourhost->clk_bus[src];

drivers/mmc/host/sdhci-s3c.c

256

struct clk *clk = ourhost->clk_bus[best_src];

drivers/mmc/host/sdhci-s3c.c

258

clk_prepare_enable(clk);

drivers/mmc/host/sdhci-s3c.c

330

struct clk *clk;

drivers/mmc/host/sdhci-s3c.c

332

clk = ourhost->clk_bus[src];

drivers/mmc/host/sdhci-s3c.c

333

if (IS_ERR(clk))

drivers/mmc/host/sdhci-s3c.c

336

rate = clk_round_rate(clk, ULONG_MAX);

drivers/mmc/host/sdhci-s3c.c

352

struct clk *clk;

drivers/mmc/host/sdhci-s3c.c

354

clk = ourhost->clk_bus[src];

drivers/mmc/host/sdhci-s3c.c

355

if (IS_ERR(clk))

drivers/mmc/host/sdhci-s3c.c

358

rate = clk_round_rate(clk, 0);

drivers/mmc/host/sdhci-s3c.c

372

u16 clk = 0;

drivers/mmc/host/sdhci-s3c.c

386

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-s3c.c

387

clk &= ~SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-s3c.c

388

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-s3c.c

397

clk = SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci-s3c.c

398

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-s3c.c

402

while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))

drivers/mmc/host/sdhci-s3c.c

413

clk |= SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-s3c.c

414

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-s3c.c

705

struct clk *busclk = ourhost->clk_io;

drivers/mmc/host/sdhci-s3c.c

722

struct clk *busclk = ourhost->clk_io;

drivers/mmc/host/sdhci-spear.c

112

clk_disable_unprepare(sdhci->clk);

drivers/mmc/host/sdhci-spear.c

130

clk_disable_unprepare(sdhci->clk);

drivers/mmc/host/sdhci-spear.c

144

clk_disable(sdhci->clk);

drivers/mmc/host/sdhci-spear.c

155

ret = clk_enable(sdhci->clk);

drivers/mmc/host/sdhci-spear.c

32

struct clk *clk;

drivers/mmc/host/sdhci-spear.c

77

sdhci->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/sdhci-spear.c

78

if (IS_ERR(sdhci->clk)) {

drivers/mmc/host/sdhci-spear.c

79

ret = PTR_ERR(sdhci->clk);

drivers/mmc/host/sdhci-spear.c

84

ret = clk_prepare_enable(sdhci->clk);

drivers/mmc/host/sdhci-spear.c

90

ret = clk_set_rate(sdhci->clk, 50000000);

drivers/mmc/host/sdhci-spear.c

93

clk_get_rate(sdhci->clk));

drivers/mmc/host/sdhci-sprd.c

205

static inline u32 sdhci_sprd_calc_div(u32 base_clk, u32 clk)

drivers/mmc/host/sdhci-sprd.c

210

if (base_clk <= clk * 2)

drivers/mmc/host/sdhci-sprd.c

213

div = (u32) (base_clk / (clk * 2));

drivers/mmc/host/sdhci-sprd.c

215

if ((base_clk / div) > (clk * 2))

drivers/mmc/host/sdhci-sprd.c

230

unsigned int clk)

drivers/mmc/host/sdhci-sprd.c

237

div = sdhci_sprd_calc_div(sprd_host->base_rate, clk);

drivers/mmc/host/sdhci-sprd.c

244

if (clk > 400000) {

drivers/mmc/host/sdhci-sprd.c

736

struct clk *clk;

drivers/mmc/host/sdhci-sprd.c

790

clk = devm_clk_get(&pdev->dev, "sdio");

drivers/mmc/host/sdhci-sprd.c

791

if (IS_ERR(clk))

drivers/mmc/host/sdhci-sprd.c

792

return PTR_ERR(clk);

drivers/mmc/host/sdhci-sprd.c

793

sprd_host->clk_sdio = clk;

drivers/mmc/host/sdhci-sprd.c

798

clk = devm_clk_get(&pdev->dev, "enable");

drivers/mmc/host/sdhci-sprd.c

799

if (IS_ERR(clk))

drivers/mmc/host/sdhci-sprd.c

800

return PTR_ERR(clk);

drivers/mmc/host/sdhci-sprd.c

801

sprd_host->clk_enable = clk;

drivers/mmc/host/sdhci-sprd.c

803

clk = devm_clk_get(&pdev->dev, "2x_enable");

drivers/mmc/host/sdhci-sprd.c

804

if (!IS_ERR(clk))

drivers/mmc/host/sdhci-sprd.c

805

sprd_host->clk_2x_enable = clk;

drivers/mmc/host/sdhci-sprd.c

83

struct clk *clk_sdio;

drivers/mmc/host/sdhci-sprd.c

84

struct clk *clk_enable;

drivers/mmc/host/sdhci-sprd.c

85

struct clk *clk_2x_enable;

drivers/mmc/host/sdhci-st.c

164

clk_set_rate(pltfm_host->clk, mhost->f_max);

drivers/mmc/host/sdhci-st.c

168

clk_set_rate(pltfm_host->clk, mhost->f_max);

drivers/mmc/host/sdhci-st.c

172

clk_set_rate(pltfm_host->clk, 50000000);

drivers/mmc/host/sdhci-st.c

22

struct clk *icnclk;

drivers/mmc/host/sdhci-st.c

348

struct clk *clk, *icnclk;

drivers/mmc/host/sdhci-st.c

353

clk = devm_clk_get(&pdev->dev, "mmc");

drivers/mmc/host/sdhci-st.c

354

if (IS_ERR(clk)) {

drivers/mmc/host/sdhci-st.c

356

return PTR_ERR(clk);

drivers/mmc/host/sdhci-st.c

386

ret = clk_prepare_enable(clk);

drivers/mmc/host/sdhci-st.c

403

pltfm_host->clk = clk;

drivers/mmc/host/sdhci-st.c

425

clk_disable_unprepare(clk);

drivers/mmc/host/sdhci-st.c

438

struct clk *clk = pltfm_host->clk;

drivers/mmc/host/sdhci-st.c

443

clk_disable_unprepare(clk);

drivers/mmc/host/sdhci-st.c

465

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-st.c

478

ret = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-st.c

484

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-tegra.c

164

struct clk *tmclk;

drivers/mmc/host/sdhci-tegra.c

1655

struct clk *clk;

drivers/mmc/host/sdhci-tegra.c

1738

clk = devm_clk_get(&pdev->dev, "tmclk");

drivers/mmc/host/sdhci-tegra.c

1739

if (IS_ERR(clk)) {

drivers/mmc/host/sdhci-tegra.c

1740

rc = PTR_ERR(clk);

drivers/mmc/host/sdhci-tegra.c

1745

clk = NULL;

drivers/mmc/host/sdhci-tegra.c

1748

clk_set_rate(clk, 12000000);

drivers/mmc/host/sdhci-tegra.c

1749

rc = clk_prepare_enable(clk);

drivers/mmc/host/sdhci-tegra.c

1756

tegra_host->tmclk = clk;

drivers/mmc/host/sdhci-tegra.c

1759

clk = devm_clk_get(mmc_dev(host->mmc), NULL);

drivers/mmc/host/sdhci-tegra.c

1760

if (IS_ERR(clk)) {

drivers/mmc/host/sdhci-tegra.c

1761

rc = dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/mmc/host/sdhci-tegra.c

1765

pltfm_host->clk = clk;

drivers/mmc/host/sdhci-tegra.c

1839

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-tegra.c

1849

return clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-tegra.c

778

tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-tegra.c

782

host->max_clk = clk_get_rate(pltfm_host->clk);

drivers/mmc/host/sdhci-tegra.c

822

return clk_round_rate(pltfm_host->clk, UINT_MAX);

drivers/mmc/host/sdhci-uhs2.c

446

u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-uhs2.c

448

clk &= ~SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-uhs2.c

449

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-uhs2.c

457

u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-uhs2.c

461

clk |= SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci-uhs2.c

462

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci-xenon.c

252

if (pltfm_host->clk)

drivers/mmc/host/sdhci-xenon.c

534

pltfm_host->clk = devm_clk_get(&pdev->dev, "core");

drivers/mmc/host/sdhci-xenon.c

535

if (IS_ERR(pltfm_host->clk))

drivers/mmc/host/sdhci-xenon.c

536

return dev_err_probe(&pdev->dev, PTR_ERR(pltfm_host->clk),

drivers/mmc/host/sdhci-xenon.c

539

err = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-xenon.c

604

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-xenon.c

622

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-xenon.c

649

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-xenon.c

666

ret = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci-xenon.c

682

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci-xenon.h

91

struct clk *axi_clk;

drivers/mmc/host/sdhci.c

1921

u16 clk = 0;

drivers/mmc/host/sdhci.c

1928

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci.c

1933

clk = SDHCI_PROG_CLOCK_MODE;

drivers/mmc/host/sdhci.c

1957

clk = SDHCI_PROG_CLOCK_MODE;

drivers/mmc/host/sdhci.c

2000

clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;

drivers/mmc/host/sdhci.c

2001

clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)

drivers/mmc/host/sdhci.c

2004

return clk;

drivers/mmc/host/sdhci.c

2008

void sdhci_enable_clk(struct sdhci_host *host, u16 clk)

drivers/mmc/host/sdhci.c

2012

clk |= SDHCI_CLOCK_INT_EN;

drivers/mmc/host/sdhci.c

2013

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci.c

2020

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci.c

2021

if (clk & SDHCI_CLOCK_INT_STABLE)

drivers/mmc/host/sdhci.c

2034

clk |= SDHCI_CLOCK_PLL_EN;

drivers/mmc/host/sdhci.c

2035

clk &= ~SDHCI_CLOCK_INT_STABLE;

drivers/mmc/host/sdhci.c

2036

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci.c

2043

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci.c

2044

if (clk & SDHCI_CLOCK_INT_STABLE)

drivers/mmc/host/sdhci.c

2057

clk |= SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci.c

2058

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci.c

2064

u16 clk;

drivers/mmc/host/sdhci.c

2073

clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);

drivers/mmc/host/sdhci.c

2074

sdhci_enable_clk(host, clk);

drivers/mmc/host/sdhci.c

2452

u16 clk, ctrl_2;

drivers/mmc/host/sdhci.c

2460

clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci.c

2461

if (clk & SDHCI_CLOCK_CARD_EN) {

drivers/mmc/host/sdhci.c

2462

clk &= ~SDHCI_CLOCK_CARD_EN;

drivers/mmc/host/sdhci.c

2463

sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

drivers/mmc/host/sdhci.h

845

void sdhci_enable_clk(struct sdhci_host *host, u16 clk);

drivers/mmc/host/sdhci_am654.c

1013

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci_am654.c

1033

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci_am654.c

1098

clk_disable_unprepare(pltfm_host->clk);

drivers/mmc/host/sdhci_am654.c

1109

ret = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci_am654.c

936

struct clk *clk_xin;

drivers/mmc/host/sdhci_am654.c

964

pltfm_host->clk = clk_xin;

drivers/mmc/host/sdhci_am654.c

998

ret = clk_prepare_enable(pltfm_host->clk);

drivers/mmc/host/sdhci_f_sdh30.c

149

priv->clk = devm_clk_get(&pdev->dev, "core");

drivers/mmc/host/sdhci_f_sdh30.c

150

if (IS_ERR(priv->clk)) {

drivers/mmc/host/sdhci_f_sdh30.c

151

ret = PTR_ERR(priv->clk);

drivers/mmc/host/sdhci_f_sdh30.c

155

ret = clk_prepare_enable(priv->clk);

drivers/mmc/host/sdhci_f_sdh30.c

198

clk_disable_unprepare(priv->clk);

drivers/mmc/host/sdhci_f_sdh30.c

208

struct clk *clk_iface = priv->clk_iface;

drivers/mmc/host/sdhci_f_sdh30.c

210

struct clk *clk = priv->clk;

drivers/mmc/host/sdhci_f_sdh30.c

215

clk_disable_unprepare(clk);

drivers/mmc/host/sdhci_f_sdh30.c

24

struct clk *clk_iface;

drivers/mmc/host/sdhci_f_sdh30.c

25

struct clk *clk;

drivers/mmc/host/sh_mmcif.c

1041

f_min = clk_round_rate(host->clk, f_min_old / 2);

drivers/mmc/host/sh_mmcif.c

1055

unsigned int clk = clk_get_rate(host->clk);

drivers/mmc/host/sh_mmcif.c

1057

host->mmc->f_max = clk / 2;

drivers/mmc/host/sh_mmcif.c

1058

host->mmc->f_min = clk / 512;

drivers/mmc/host/sh_mmcif.c

1087

clk_prepare_enable(host->clk);

drivers/mmc/host/sh_mmcif.c

1101

clk_disable_unprepare(host->clk);

drivers/mmc/host/sh_mmcif.c

1483

host->clk = devm_clk_get(dev, NULL);

drivers/mmc/host/sh_mmcif.c

1484

if (IS_ERR(host->clk))

drivers/mmc/host/sh_mmcif.c

1485

return dev_err_probe(dev, PTR_ERR(host->clk),

drivers/mmc/host/sh_mmcif.c

1488

ret = clk_prepare_enable(host->clk);

drivers/mmc/host/sh_mmcif.c

1533

clk_get_rate(host->clk) / 1000000UL);

drivers/mmc/host/sh_mmcif.c

1536

clk_disable_unprepare(host->clk);

drivers/mmc/host/sh_mmcif.c

1540

clk_disable_unprepare(host->clk);

drivers/mmc/host/sh_mmcif.c

1551

clk_prepare_enable(host->clk);

drivers/mmc/host/sh_mmcif.c

1566

clk_disable_unprepare(host->clk);

drivers/mmc/host/sh_mmcif.c

223

struct clk *clk;

drivers/mmc/host/sh_mmcif.c

479

static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)

drivers/mmc/host/sh_mmcif.c

484

unsigned int current_clk = clk_get_rate(host->clk);

drivers/mmc/host/sh_mmcif.c

490

if (!clk)

drivers/mmc/host/sh_mmcif.c

510

freq = clk_round_rate(host->clk, clk * div);

drivers/mmc/host/sh_mmcif.c

512

diff = (myclk > clk) ? myclk - clk : clk - myclk;

drivers/mmc/host/sh_mmcif.c

522

(best_freq >> (clkdiv + 1)), clk, best_freq, clkdiv);

drivers/mmc/host/sh_mmcif.c

524

clk_set_rate(host->clk, best_freq);

drivers/mmc/host/sh_mmcif.c

526

} else if (sup_pclk && clk == current_clk) {

drivers/mmc/host/sh_mmcif.c

529

clkdiv = (fls(DIV_ROUND_UP(current_clk, clk) - 1) - 1) << 16;

drivers/mmc/host/sunplus-mmc.c

165

struct clk *clk;

drivers/mmc/host/sunplus-mmc.c

231

static void spmmc_set_bus_clk(struct spmmc_host *host, int clk)

drivers/mmc/host/sunplus-mmc.c

238

if (clk < f_min)

drivers/mmc/host/sunplus-mmc.c

239

clk = f_min;

drivers/mmc/host/sunplus-mmc.c

240

if (clk > f_max)

drivers/mmc/host/sunplus-mmc.c

241

clk = f_max;

drivers/mmc/host/sunplus-mmc.c

243

clkdiv = (clk_get_rate(host->clk) + clk) / clk - 1;

drivers/mmc/host/sunplus-mmc.c

879

host->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mmc/host/sunplus-mmc.c

880

if (IS_ERR(host->clk))

drivers/mmc/host/sunplus-mmc.c

881

return dev_err_probe(&pdev->dev, PTR_ERR(host->clk), "clk get fail\n");

drivers/mmc/host/sunplus-mmc.c

897

ret = clk_prepare_enable(host->clk);

drivers/mmc/host/sunplus-mmc.c

938

clk_disable_unprepare(host->clk);

drivers/mmc/host/sunplus-mmc.c

948

clk_disable_unprepare(host->clk);

drivers/mmc/host/sunplus-mmc.c

958

clk_disable_unprepare(host->clk);

drivers/mmc/host/sunplus-mmc.c

969

return clk_prepare_enable(host->clk);

drivers/mmc/host/sunxi-mmc.c

279

struct clk *clk_ahb;

drivers/mmc/host/sunxi-mmc.c

280

struct clk *clk_mmc;

drivers/mmc/host/sunxi-mmc.c

281

struct clk *clk_sample;

drivers/mmc/host/sunxi-mmc.c

282

struct clk *clk_output;

drivers/mmc/host/toshsd.c

83

u16 clk;

drivers/mmc/host/toshsd.c

89

clk = div >> 2;

drivers/mmc/host/toshsd.c

94

clk |= SD_CARDCLK_DIV_DISABLE;

drivers/mmc/host/toshsd.c

98

clk |= SD_CARDCLK_ENABLE_CLOCK;

drivers/mmc/host/toshsd.c

99

iowrite16(clk, host->ioaddr + SD_CARDCLOCKCTRL);

drivers/mmc/host/uniphier-sd.c

369

ret = clk_prepare_enable(priv->clk);

drivers/mmc/host/uniphier-sd.c

373

ret = clk_set_rate(priv->clk, ULONG_MAX);

drivers/mmc/host/uniphier-sd.c

377

priv->clk_rate = clk_get_rate(priv->clk);

drivers/mmc/host/uniphier-sd.c

405

clk_disable_unprepare(priv->clk);

drivers/mmc/host/uniphier-sd.c

416

clk_disable_unprepare(priv->clk);

drivers/mmc/host/uniphier-sd.c

633

priv->clk = devm_clk_get(dev, NULL);

drivers/mmc/host/uniphier-sd.c

634

if (IS_ERR(priv->clk)) {

drivers/mmc/host/uniphier-sd.c

636

return PTR_ERR(priv->clk);

drivers/mmc/host/uniphier-sd.c

70

struct clk *clk;

drivers/mmc/host/usdhi6rol0.c

162

struct clk *clk;

drivers/mmc/host/usdhi6rol0.c

1797

host->clk = devm_clk_get(dev, NULL);

drivers/mmc/host/usdhi6rol0.c

1798

if (IS_ERR(host->clk))

drivers/mmc/host/usdhi6rol0.c

1799

return PTR_ERR(host->clk);

drivers/mmc/host/usdhi6rol0.c

1801

host->imclk = clk_get_rate(host->clk);

drivers/mmc/host/usdhi6rol0.c

1803

ret = clk_prepare_enable(host->clk);

drivers/mmc/host/usdhi6rol0.c

1874

clk_disable_unprepare(host->clk);

drivers/mmc/host/usdhi6rol0.c

1887

clk_disable_unprepare(host->clk);

drivers/mmc/host/ushc.c

348

static int ushc_set_bus_freq(struct ushc_data *ushc, int clk, bool enable_hs)

drivers/mmc/host/ushc.c

353

if (clk == 0)

drivers/mmc/host/ushc.c

354

clk = 400000;

drivers/mmc/host/ushc.c

363

clk & 0xffff, (clk >> 16) & 0xffff, NULL, 0, 100);

drivers/mmc/host/ushc.c

367

ushc->clock_freq = clk;

drivers/mmc/host/wbsd.c

152

host->clk = wbsd_read_index(host, WBSD_IDX_CLK);

drivers/mmc/host/wbsd.c

840

u8 clk, setup, pwr;

drivers/mmc/host/wbsd.c

852

clk = WBSD_CLK_24M;

drivers/mmc/host/wbsd.c

854

clk = WBSD_CLK_16M;

drivers/mmc/host/wbsd.c

856

clk = WBSD_CLK_12M;

drivers/mmc/host/wbsd.c

858

clk = WBSD_CLK_375K;

drivers/mmc/host/wbsd.c

864

if (clk != host->clk) {

drivers/mmc/host/wbsd.c

865

wbsd_write_index(host, WBSD_IDX_CLK, clk);

drivers/mmc/host/wbsd.c

866

host->clk = clk;

drivers/mmc/host/wbsd.h

162

u8 clk; /* Current clock speed */

drivers/mmc/host/wmt-sdmmc.c

203

struct clk *clk_sdmmc;

drivers/mtd/devices/spear_smi.c

1058

if (sdev && sdev->clk)

drivers/mtd/devices/spear_smi.c

1059

clk_disable_unprepare(sdev->clk);

drivers/mtd/devices/spear_smi.c

1069

if (sdev && sdev->clk)

drivers/mtd/devices/spear_smi.c

1070

ret = clk_prepare_enable(sdev->clk);

drivers/mtd/devices/spear_smi.c

170

struct clk *clk;

drivers/mtd/devices/spear_smi.c

330

rate = clk_get_rate(dev->clk);

drivers/mtd/devices/spear_smi.c

996

dev->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/mtd/devices/spear_smi.c

997

if (IS_ERR(dev->clk)) {

drivers/mtd/devices/spear_smi.c

998

ret = PTR_ERR(dev->clk);

drivers/mtd/devices/st_spi_fsm.c

1901

emi_freq = clk_get_rate(fsm->clk);

drivers/mtd/devices/st_spi_fsm.c

2039

fsm->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/mtd/devices/st_spi_fsm.c

2040

if (IS_ERR(fsm->clk)) {

drivers/mtd/devices/st_spi_fsm.c

2042

return PTR_ERR(fsm->clk);

drivers/mtd/devices/st_spi_fsm.c

2111

clk_disable_unprepare(fsm->clk);

drivers/mtd/devices/st_spi_fsm.c

2120

return clk_prepare_enable(fsm->clk);

drivers/mtd/devices/st_spi_fsm.c

261

struct clk *clk;

drivers/mtd/nand/ecc-mtk.c

250

clk_disable_unprepare(ecc->clk);

drivers/mtd/nand/ecc-mtk.c

279

clk_prepare_enable(ecc->clk);

drivers/mtd/nand/ecc-mtk.c

547

ecc->clk = devm_clk_get(dev, NULL);

drivers/mtd/nand/ecc-mtk.c

548

if (IS_ERR(ecc->clk)) {

drivers/mtd/nand/ecc-mtk.c

549

dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(ecc->clk));

drivers/mtd/nand/ecc-mtk.c

550

return PTR_ERR(ecc->clk);

drivers/mtd/nand/ecc-mtk.c

582

clk_disable_unprepare(ecc->clk);

drivers/mtd/nand/ecc-mtk.c

592

ret = clk_prepare_enable(ecc->clk);

drivers/mtd/nand/ecc-mtk.c

62

struct clk *clk;

drivers/mtd/nand/raw/arasan-nand-controller.c

1044

anand->clk = ANFC_XLNX_SDR_DFLT_CORE_CLK;

drivers/mtd/nand/raw/arasan-nand-controller.c

1047

anand->clk = div_u64((u64)NSEC_PER_SEC * 1000,

drivers/mtd/nand/raw/arasan-nand-controller.c

1059

anand->clk = ANFC_XLNX_SDR_HS_CORE_CLK;

drivers/mtd/nand/raw/arasan-nand-controller.c

176

unsigned long clk;

drivers/mtd/nand/raw/arasan-nand-controller.c

212

struct clk *controller_clk;

drivers/mtd/nand/raw/arasan-nand-controller.c

213

struct clk *bus_clk;

drivers/mtd/nand/raw/arasan-nand-controller.c

349

if (nfc->cur_clk != anand->clk) {

drivers/mtd/nand/raw/arasan-nand-controller.c

351

ret = clk_set_rate(nfc->bus_clk, anand->clk);

drivers/mtd/nand/raw/arasan-nand-controller.c

364

nfc->cur_clk = anand->clk;

drivers/mtd/nand/raw/atmel/nand-controller.c

2175

nc->clk = of_clk_get(nfc_np, 0);

drivers/mtd/nand/raw/atmel/nand-controller.c

2176

if (IS_ERR(nc->clk)) {

drivers/mtd/nand/raw/atmel/nand-controller.c

2177

ret = PTR_ERR(nc->clk);

drivers/mtd/nand/raw/atmel/nand-controller.c

2183

ret = clk_prepare_enable(nc->clk);

drivers/mtd/nand/raw/atmel/nand-controller.c

226

struct clk *mck;

drivers/mtd/nand/raw/atmel/nand-controller.c

2341

if (hsmc_nc->clk) {

drivers/mtd/nand/raw/atmel/nand-controller.c

2342

clk_disable_unprepare(hsmc_nc->clk);

drivers/mtd/nand/raw/atmel/nand-controller.c

2343

clk_put(hsmc_nc->clk);

drivers/mtd/nand/raw/atmel/nand-controller.c

268

struct clk *clk;

drivers/mtd/nand/raw/brcmnand/brcmnand.c

254

struct clk *clk;

drivers/mtd/nand/raw/brcmnand/brcmnand.c

3336

ctrl->clk = devm_clk_get(dev, "nand");

drivers/mtd/nand/raw/brcmnand/brcmnand.c

3337

if (!IS_ERR(ctrl->clk)) {

drivers/mtd/nand/raw/brcmnand/brcmnand.c

3338

ret = clk_prepare_enable(ctrl->clk);

drivers/mtd/nand/raw/brcmnand/brcmnand.c

3342

ret = PTR_ERR(ctrl->clk);

drivers/mtd/nand/raw/brcmnand/brcmnand.c

3346

ctrl->clk = NULL;

drivers/mtd/nand/raw/brcmnand/brcmnand.c

3555

clk_disable_unprepare(ctrl->clk);

drivers/mtd/nand/raw/brcmnand/brcmnand.c

3575

clk_disable_unprepare(ctrl->clk);

drivers/mtd/nand/raw/cadence-nand-controller.c

3246

struct clk *clk;

drivers/mtd/nand/raw/cadence-nand-controller.c

3303

dt->clk = devm_clk_get(cdns_ctrl->dev, "nf_clk");

drivers/mtd/nand/raw/cadence-nand-controller.c

3304

if (IS_ERR(dt->clk))

drivers/mtd/nand/raw/cadence-nand-controller.c

3305

return PTR_ERR(dt->clk);

drivers/mtd/nand/raw/cadence-nand-controller.c

3307

cdns_ctrl->nf_clk_rate = clk_get_rate(dt->clk);

drivers/mtd/nand/raw/davinci_nand.c

127

struct clk *clk;

drivers/mtd/nand/raw/davinci_nand.c

831

cyc_ns = 1000000000 / clk_get_rate(info->clk);

drivers/mtd/nand/raw/davinci_nand.c

951

info->clk = devm_clk_get_enabled(&pdev->dev, "aemif");

drivers/mtd/nand/raw/davinci_nand.c

952

if (IS_ERR(info->clk))

drivers/mtd/nand/raw/davinci_nand.c

953

return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), "failed to get clock");

drivers/mtd/nand/raw/denali_dt.c

147

dt->clk = devm_clk_get_enabled(dev, "nand");

drivers/mtd/nand/raw/denali_dt.c

148

if (IS_ERR(dt->clk))

drivers/mtd/nand/raw/denali_dt.c

149

return PTR_ERR(dt->clk);

drivers/mtd/nand/raw/denali_dt.c

167

denali->clk_rate = clk_get_rate(dt->clk);

drivers/mtd/nand/raw/denali_dt.c

23

struct clk *clk; /* core clock */

drivers/mtd/nand/raw/denali_dt.c

24

struct clk *clk_x; /* bus interface clock */

drivers/mtd/nand/raw/denali_dt.c

25

struct clk *clk_ecc; /* ECC circuit clock */

drivers/mtd/nand/raw/fsmc_nand.c

1075

host->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/mtd/nand/raw/fsmc_nand.c

1076

if (IS_ERR(host->clk)) {

drivers/mtd/nand/raw/fsmc_nand.c

1078

return PTR_ERR(host->clk);

drivers/mtd/nand/raw/fsmc_nand.c

1195

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/fsmc_nand.c

1206

ret = clk_prepare_enable(host->clk);

drivers/mtd/nand/raw/fsmc_nand.c

151

struct clk *clk;

drivers/mtd/nand/raw/fsmc_nand.c

287

unsigned long hclk = clk_get_rate(host->clk);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

123

struct clk *clk;

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

1270

struct clk *clk;

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

1274

clk = devm_clk_get(this->dev, this->devdata->clks[i]);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

1275

if (IS_ERR(clk)) {

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

1276

err = PTR_ERR(clk);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

128

clk = this->resources.clock[i];

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

1280

r->clock[i] = clk;

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

129

if (!clk)

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

133

ret = clk_prepare_enable(clk);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

137

clk_disable_unprepare(clk);

drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h

22

struct clk *clock[GPMI_CLK_MAX];

drivers/mtd/nand/raw/ingenic/ingenic_ecc.c

123

clk_disable_unprepare(ecc->clk);

drivers/mtd/nand/raw/ingenic/ingenic_ecc.c

146

ecc->clk = devm_clk_get(dev, NULL);

drivers/mtd/nand/raw/ingenic/ingenic_ecc.c

147

if (IS_ERR(ecc->clk)) {

drivers/mtd/nand/raw/ingenic/ingenic_ecc.c

148

dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(ecc->clk));

drivers/mtd/nand/raw/ingenic/ingenic_ecc.c

149

return PTR_ERR(ecc->clk);

drivers/mtd/nand/raw/ingenic/ingenic_ecc.c

81

clk_prepare_enable(ecc->clk);

drivers/mtd/nand/raw/ingenic/ingenic_ecc.h

11

struct clk;

drivers/mtd/nand/raw/ingenic/ingenic_ecc.h

77

struct clk *clk;

drivers/mtd/nand/raw/ingenic/jz4780_bch.c

242

clk_set_rate(bch->clk, BCH_CLK_RATE);

drivers/mtd/nand/raw/intel-nand-controller.c

121

struct clk *clk;

drivers/mtd/nand/raw/intel-nand-controller.c

201

unsigned int rate = clk_get_rate(ctrl->clk) / HZ_PER_MHZ;

drivers/mtd/nand/raw/intel-nand-controller.c

634

ebu_host->clk = devm_clk_get_enabled(dev, NULL);

drivers/mtd/nand/raw/intel-nand-controller.c

635

if (IS_ERR(ebu_host->clk)) {

drivers/mtd/nand/raw/intel-nand-controller.c

636

ret = dev_err_probe(dev, PTR_ERR(ebu_host->clk),

drivers/mtd/nand/raw/lpc32xx_mlc.c

178

struct clk *clk;

drivers/mtd/nand/raw/lpc32xx_mlc.c

240

clkrate = clk_get_rate(host->clk);

drivers/mtd/nand/raw/lpc32xx_mlc.c

739

host->clk = clk_get(&pdev->dev, NULL);

drivers/mtd/nand/raw/lpc32xx_mlc.c

740

if (IS_ERR(host->clk)) {

drivers/mtd/nand/raw/lpc32xx_mlc.c

745

res = clk_prepare_enable(host->clk);

drivers/mtd/nand/raw/lpc32xx_mlc.c

821

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/lpc32xx_mlc.c

823

clk_put(host->clk);

drivers/mtd/nand/raw/lpc32xx_mlc.c

848

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/lpc32xx_mlc.c

849

clk_put(host->clk);

drivers/mtd/nand/raw/lpc32xx_mlc.c

861

ret = clk_prepare_enable(host->clk);

drivers/mtd/nand/raw/lpc32xx_mlc.c

882

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/lpc32xx_slc.c

1000

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/lpc32xx_slc.c

217

struct clk *clk;

drivers/mtd/nand/raw/lpc32xx_slc.c

251

clkrate = clk_get_rate(host->clk);

drivers/mtd/nand/raw/lpc32xx_slc.c

878

host->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/mtd/nand/raw/lpc32xx_slc.c

879

if (IS_ERR(host->clk)) {

drivers/mtd/nand/raw/lpc32xx_slc.c

973

ret = clk_prepare_enable(host->clk);

drivers/mtd/nand/raw/marvell_nand.c

413

struct clk *core_clk;

drivers/mtd/nand/raw/marvell_nand.c

414

struct clk *reg_clk;

drivers/mtd/nand/raw/meson_nand.c

170

struct clk *core_clk;

drivers/mtd/nand/raw/meson_nand.c

171

struct clk *device_clk;

drivers/mtd/nand/raw/meson_nand.c

172

struct clk *nand_clk;

drivers/mtd/nand/raw/mpc5121_nfc.c

111

struct clk *clk;

drivers/mtd/nand/raw/mpc5121_nfc.c

618

struct clk *clk;

drivers/mtd/nand/raw/mpc5121_nfc.c

718

clk = devm_clk_get_enabled(dev, "ipg");

drivers/mtd/nand/raw/mpc5121_nfc.c

719

if (IS_ERR(clk)) {

drivers/mtd/nand/raw/mpc5121_nfc.c

721

retval = PTR_ERR(clk);

drivers/mtd/nand/raw/mpc5121_nfc.c

724

prv->clk = clk;

drivers/mtd/nand/raw/mtk_nand.c

138

struct clk *nfi_clk;

drivers/mtd/nand/raw/mtk_nand.c

139

struct clk *pad_clk;

drivers/mtd/nand/raw/mtk_nand.c

145

struct mtk_nfc_clk clk;

drivers/mtd/nand/raw/mtk_nand.c

1538

nfc->clk.nfi_clk = devm_clk_get_enabled(dev, "nfi_clk");

drivers/mtd/nand/raw/mtk_nand.c

1539

if (IS_ERR(nfc->clk.nfi_clk)) {

drivers/mtd/nand/raw/mtk_nand.c

1541

ret = PTR_ERR(nfc->clk.nfi_clk);

drivers/mtd/nand/raw/mtk_nand.c

1545

nfc->clk.pad_clk = devm_clk_get_enabled(dev, "pad_clk");

drivers/mtd/nand/raw/mtk_nand.c

1546

if (IS_ERR(nfc->clk.pad_clk)) {

drivers/mtd/nand/raw/mtk_nand.c

1548

ret = PTR_ERR(nfc->clk.pad_clk);

drivers/mtd/nand/raw/mtk_nand.c

1599

clk_disable_unprepare(nfc->clk.nfi_clk);

drivers/mtd/nand/raw/mtk_nand.c

1600

clk_disable_unprepare(nfc->clk.pad_clk);

drivers/mtd/nand/raw/mtk_nand.c

1615

ret = clk_prepare_enable(nfc->clk.nfi_clk);

drivers/mtd/nand/raw/mtk_nand.c

1621

ret = clk_prepare_enable(nfc->clk.pad_clk);

drivers/mtd/nand/raw/mtk_nand.c

1624

clk_disable_unprepare(nfc->clk.nfi_clk);

drivers/mtd/nand/raw/mtk_nand.c

548

rate = clk_get_rate(nfc->clk.nfi_clk);

drivers/mtd/nand/raw/mxc_nand.c

1051

rate_round = clk_round_rate(host->clk, rate);

drivers/mtd/nand/raw/mxc_nand.c

1056

rate_round = clk_round_rate(host->clk, rate);

drivers/mtd/nand/raw/mxc_nand.c

1087

ret = clk_set_rate(host->clk, rate);

drivers/mtd/nand/raw/mxc_nand.c

1719

host->clk = devm_clk_get(&pdev->dev, NULL);

drivers/mtd/nand/raw/mxc_nand.c

1720

if (IS_ERR(host->clk))

drivers/mtd/nand/raw/mxc_nand.c

1721

return PTR_ERR(host->clk);

drivers/mtd/nand/raw/mxc_nand.c

174

struct clk *clk;

drivers/mtd/nand/raw/mxc_nand.c

1769

err = clk_prepare_enable(host->clk);

drivers/mtd/nand/raw/mxc_nand.c

1803

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/mxc_nand.c

1818

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/mxc_nand.c

850

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/mxc_nand.c

858

clk_prepare_enable(host->clk);

drivers/mtd/nand/raw/mxc_nand.c

870

clk_disable_unprepare(host->clk);

drivers/mtd/nand/raw/mxc_nand.c

878

clk_prepare_enable(host->clk);

drivers/mtd/nand/raw/mxic_nand.c

174

struct clk *ps_clk;

drivers/mtd/nand/raw/mxic_nand.c

175

struct clk *send_clk;

drivers/mtd/nand/raw/mxic_nand.c

176

struct clk *send_dly_clk;

drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c

100

struct clk *clk;

drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c

972

nand->clk = devm_clk_get_enabled(&pdev->dev, "nand_gate");

drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c

973

if (IS_ERR(nand->clk))

drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c

974

return dev_err_probe(&pdev->dev, PTR_ERR(nand->clk),

drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c

996

clk_disable(nand->clk);

drivers/mtd/nand/raw/orion_nand.c

172

info->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/mtd/nand/raw/orion_nand.c

173

if (IS_ERR(info->clk))

drivers/mtd/nand/raw/orion_nand.c

174

return dev_err_probe(&pdev->dev, PTR_ERR(info->clk),

drivers/mtd/nand/raw/orion_nand.c

27

struct clk *clk;

drivers/mtd/nand/raw/pl35x-nand-controller.c

792

struct clk *mclk;

drivers/mtd/nand/raw/renesas-nand-controller.c

1322

struct clk *eclk;

drivers/mtd/nand/raw/rockchip-nand-controller.c

170

struct clk *nfc_clk;

drivers/mtd/nand/raw/rockchip-nand-controller.c

171

struct clk *ahb_clk;

drivers/mtd/nand/raw/stm32_fmc2_nand.c

1419

unsigned long hclk = clk_get_rate(nfc->clk);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

1989

nfc->clk = devm_clk_get_enabled(nfc->cdev, NULL);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

1990

if (IS_ERR(nfc->clk)) {

drivers/mtd/nand/raw/stm32_fmc2_nand.c

1992

return PTR_ERR(nfc->clk);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

2084

clk_disable_unprepare(nfc->clk);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

2101

ret = clk_prepare_enable(nfc->clk);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

265

struct clk *clk;

drivers/mtd/nand/raw/sunxi_nand.c

351

struct clk *ahb_clk;

drivers/mtd/nand/raw/sunxi_nand.c

352

struct clk *mod_clk;

drivers/mtd/nand/raw/sunxi_nand.c

353

struct clk *ecc_clk;

drivers/mtd/nand/raw/sunxi_nand.c

354

struct clk *mbus_clk;

drivers/mtd/nand/raw/tegra_nand.c

1169

ctrl->clk = devm_clk_get(&pdev->dev, "nand");

drivers/mtd/nand/raw/tegra_nand.c

1170

if (IS_ERR(ctrl->clk))

drivers/mtd/nand/raw/tegra_nand.c

1171

return PTR_ERR(ctrl->clk);

drivers/mtd/nand/raw/tegra_nand.c

1246

err = clk_prepare_enable(ctrl->clk);

drivers/mtd/nand/raw/tegra_nand.c

1259

clk_disable_unprepare(ctrl->clk);

drivers/mtd/nand/raw/tegra_nand.c

174

struct clk *clk;

drivers/mtd/nand/raw/tegra_nand.c

788

unsigned int rate = clk_get_rate(ctrl->clk) / 1000000;

drivers/mtd/nand/raw/vf610_nfc.c

159

struct clk *clk;

drivers/mtd/nand/raw/vf610_nfc.c

836

nfc->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/mtd/nand/raw/vf610_nfc.c

837

if (IS_ERR(nfc->clk)) {

drivers/mtd/nand/raw/vf610_nfc.c

839

return PTR_ERR(nfc->clk);

drivers/mtd/nand/raw/vf610_nfc.c

914

clk_disable_unprepare(nfc->clk);

drivers/mtd/nand/raw/vf610_nfc.c

923

err = clk_prepare_enable(nfc->clk);

drivers/mtd/spi-nor/controllers/hisi-sfc.c

155

ret = clk_set_rate(host->clk, priv->clkrate);

drivers/mtd/spi-nor/controllers/hisi-sfc.c

159

ret = clk_prepare_enable(host->clk);

drivers/mtd/spi-nor/controllers/hisi-sfc.c

175

clk_disable_unprepare(host->clk);

drivers/mtd/spi-nor/controllers/hisi-sfc.c

438

host->clk = devm_clk_get(dev, NULL);

drivers/mtd/spi-nor/controllers/hisi-sfc.c

439

if (IS_ERR(host->clk))

drivers/mtd/spi-nor/controllers/hisi-sfc.c

440

return PTR_ERR(host->clk);

drivers/mtd/spi-nor/controllers/hisi-sfc.c

453

ret = clk_prepare_enable(host->clk);

drivers/mtd/spi-nor/controllers/hisi-sfc.c

463

clk_disable_unprepare(host->clk);

drivers/mtd/spi-nor/controllers/hisi-sfc.c

95

struct clk *clk;

drivers/mtd/spi-nor/controllers/nxp-spifi.c

54

struct clk *clk_spifi;

drivers/mtd/spi-nor/controllers/nxp-spifi.c

55

struct clk *clk_reg;

drivers/net/can/at91_can.c

1053

struct clk *clk;

drivers/net/can/at91_can.c

1064

clk = clk_get(&pdev->dev, "can_clk");

drivers/net/can/at91_can.c

1065

if (IS_ERR(clk)) {

drivers/net/can/at91_can.c

1111

priv->can.clock.freq = clk_get_rate(clk);

drivers/net/can/at91_can.c

1119

priv->clk = clk;

drivers/net/can/at91_can.c

1155

clk_put(clk);

drivers/net/can/at91_can.c

1173

clk_put(priv->clk);

drivers/net/can/at91_can.c

162

struct clk *clk;

drivers/net/can/at91_can.c

886

err = clk_prepare_enable(priv->clk);

drivers/net/can/at91_can.c

904

clk_disable_unprepare(priv->clk);

drivers/net/can/at91_can.c

924

clk_disable_unprepare(priv->clk);

drivers/net/can/bxcan.c

1000

priv->can.clock.freq = clk_get_rate(clk);

drivers/net/can/bxcan.c

1040

clk_disable_unprepare(priv->clk);

drivers/net/can/bxcan.c

1058

clk_disable_unprepare(priv->clk);

drivers/net/can/bxcan.c

1070

clk_prepare_enable(priv->clk);

drivers/net/can/bxcan.c

176

struct clk *clk;

drivers/net/can/bxcan.c

743

err = clk_prepare_enable(priv->clk);

drivers/net/can/bxcan.c

799

clk_disable_unprepare(priv->clk);

drivers/net/can/bxcan.c

830

clk_disable_unprepare(priv->clk);

drivers/net/can/bxcan.c

918

err = clk_prepare_enable(priv->clk);

drivers/net/can/bxcan.c

925

clk_disable_unprepare(priv->clk);

drivers/net/can/bxcan.c

935

struct clk *clk = NULL;

drivers/net/can/bxcan.c

960

clk = devm_clk_get(dev, NULL);

drivers/net/can/bxcan.c

961

if (IS_ERR(clk)) {

drivers/net/can/bxcan.c

963

return PTR_ERR(clk);

drivers/net/can/bxcan.c

996

priv->clk = clk;

drivers/net/can/c_can/c_can_platform.c

264

struct clk *clk;

drivers/net/can/c_can/c_can_platform.c

271

clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/can/c_can/c_can_platform.c

272

if (IS_ERR(clk))

drivers/net/can/c_can/c_can_platform.c

273

return PTR_ERR(clk);

drivers/net/can/c_can/c_can_platform.c

358

priv->can.clock.freq = clk_get_rate(clk);

drivers/net/can/cc770/cc770_isa.c

220

if (clk[idx])

drivers/net/can/cc770/cc770_isa.c

221

clktmp = clk[idx];

drivers/net/can/cc770/cc770_isa.c

222

else if (clk[0])

drivers/net/can/cc770/cc770_isa.c

223

clktmp = clk[0];

drivers/net/can/cc770/cc770_isa.c

71

static int clk[MAXDEV];

drivers/net/can/cc770/cc770_isa.c

89

module_param_array(clk, int, NULL, 0444);

drivers/net/can/cc770/cc770_isa.c

90

MODULE_PARM_DESC(clk, "External oscillator clock frequency "

drivers/net/can/ctucanfd/ctucanfd.h

46

struct clk *can_clk;

drivers/net/can/flexcan/flexcan-core.c

2094

struct clk *clk_ipg = NULL, *clk_per = NULL;

drivers/net/can/flexcan/flexcan.h

106

struct clk *clk_ipg;

drivers/net/can/flexcan/flexcan.h

107

struct clk *clk_per;

drivers/net/can/m_can/m_can.h

87

struct clk *hclk;

drivers/net/can/m_can/m_can.h

88

struct clk *cclk;

drivers/net/can/mscan/mpc5xxx_can.c

120

struct clk *clk_in, *clk_can;

drivers/net/can/mscan/mpc5xxx_can.c

123

struct clk *clk_ipg;

drivers/net/can/mscan/mscan.h

275

struct clk *clk_ipg; /* clock for registers */

drivers/net/can/mscan/mscan.h

276

struct clk *clk_can; /* clock for bitrates */

drivers/net/can/peak_canfd/peak_pciefd_main.c

577

u32 clk;

drivers/net/can/peak_canfd/peak_pciefd_main.c

638

clk = pciefd_can_readreg(priv, PCIEFD_REG_CAN_CLK_SEL);

drivers/net/can/peak_canfd/peak_pciefd_main.c

639

switch (clk) {

drivers/net/can/rcar/rcar_can.c

98

struct clk *can_clk;

drivers/net/can/rcar/rcar_canfd.c

469

struct clk *clkp; /* Peripheral clock */

drivers/net/can/rcar/rcar_canfd.c

470

struct clk *can_clk; /* fCAN clock */

drivers/net/can/rcar/rcar_canfd.c

471

struct clk *clk_ram; /* Clock RAM */

drivers/net/can/rockchip/rockchip_canfd-core.c

899

priv->can.clock.freq = clk_get_rate(priv->clks[0].clk);

drivers/net/can/sja1000/sja1000_isa.c

176

if (clk[idx])

drivers/net/can/sja1000/sja1000_isa.c

177

priv->can.clock.freq = clk[idx] / 2;

drivers/net/can/sja1000/sja1000_isa.c

178

else if (clk[0])

drivers/net/can/sja1000/sja1000_isa.c

179

priv->can.clock.freq = clk[0] / 2;

drivers/net/can/sja1000/sja1000_isa.c

34

static int clk[MAXDEV];

drivers/net/can/sja1000/sja1000_isa.c

52

module_param_array(clk, int, NULL, 0444);

drivers/net/can/sja1000/sja1000_isa.c

53

MODULE_PARM_DESC(clk, "External oscillator clock frequency "

drivers/net/can/sja1000/sja1000_platform.c

225

struct clk *clk;

drivers/net/can/sja1000/sja1000_platform.c

242

clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/net/can/sja1000/sja1000_platform.c

243

if (IS_ERR(clk))

drivers/net/can/sja1000/sja1000_platform.c

244

return dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/net/can/sja1000/sja1000_platform.c

277

if (clk) {

drivers/net/can/sja1000/sja1000_platform.c

278

priv->can.clock.freq = clk_get_rate(clk) / 2;

drivers/net/can/spi/hi311x.c

172

struct clk *clk;

drivers/net/can/spi/hi311x.c

834

struct clk *clk;

drivers/net/can/spi/hi311x.c

838

clk = devm_clk_get_optional(&spi->dev, NULL);

drivers/net/can/spi/hi311x.c

839

if (IS_ERR(clk))

drivers/net/can/spi/hi311x.c

840

return dev_err_probe(dev, PTR_ERR(clk), "no CAN clock source defined\n");

drivers/net/can/spi/hi311x.c

842

if (clk) {

drivers/net/can/spi/hi311x.c

843

freq = clk_get_rate(clk);

drivers/net/can/spi/hi311x.c

859

ret = clk_prepare_enable(clk);

drivers/net/can/spi/hi311x.c

879

priv->clk = clk;

drivers/net/can/spi/hi311x.c

951

clk_disable_unprepare(clk);

drivers/net/can/spi/hi311x.c

971

clk_disable_unprepare(priv->clk);

drivers/net/can/spi/mcp251x.c

1335

struct clk *clk;

drivers/net/can/spi/mcp251x.c

1339

clk = devm_clk_get_optional(&spi->dev, NULL);

drivers/net/can/spi/mcp251x.c

1340

if (IS_ERR(clk))

drivers/net/can/spi/mcp251x.c

1341

return dev_err_probe(&spi->dev, PTR_ERR(clk), "Cannot get clock\n");

drivers/net/can/spi/mcp251x.c

1343

freq = clk_get_rate(clk);

drivers/net/can/spi/mcp251x.c

1356

ret = clk_prepare_enable(clk);

drivers/net/can/spi/mcp251x.c

1374

priv->clk = clk;

drivers/net/can/spi/mcp251x.c

1468

clk_disable_unprepare(clk);

drivers/net/can/spi/mcp251x.c

1488

clk_disable_unprepare(priv->clk);

drivers/net/can/spi/mcp251x.c

255

struct clk *clk;

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

196

err = clk_prepare_enable(priv->clk);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2015

clk_rate = clk_get_rate(priv->clk);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

202

clk_disable_unprepare(priv->clk);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2185

struct clk *clk;

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

219

clk_disable_unprepare(priv->clk);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2214

clk = devm_clk_get_optional(&spi->dev, NULL);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2215

if (IS_ERR(clk))

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2216

return dev_err_probe(&spi->dev, PTR_ERR(clk),

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2218

if (clk) {

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2219

freq = clk_get_rate(clk);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

2270

priv->clk = clk;

drivers/net/can/spi/mcp251xfd/mcp251xfd.h

673

struct clk *clk;

drivers/net/can/sun4i_can.c

219

struct clk *clk;

drivers/net/can/sun4i_can.c

315

err = clk_prepare_enable(priv->clk);

drivers/net/can/sun4i_can.c

326

clk_disable_unprepare(priv->clk);

drivers/net/can/sun4i_can.c

725

err = clk_prepare_enable(priv->clk);

drivers/net/can/sun4i_can.c

742

clk_disable_unprepare(priv->clk);

drivers/net/can/sun4i_can.c

758

clk_disable_unprepare(priv->clk);

drivers/net/can/sun4i_can.c

823

struct clk *clk;

drivers/net/can/sun4i_can.c

847

clk = of_clk_get(np, 0);

drivers/net/can/sun4i_can.c

848

if (IS_ERR(clk)) {

drivers/net/can/sun4i_can.c

880

priv->can.clock.freq = clk_get_rate(clk);

drivers/net/can/sun4i_can.c

889

priv->clk = clk;

drivers/net/can/ti_hecc.c

1001

err = clk_prepare_enable(priv->clk);

drivers/net/can/ti_hecc.c

181

struct clk *clk;

drivers/net/can/ti_hecc.c

917

priv->clk = clk_get(&pdev->dev, "hecc_ck");

drivers/net/can/ti_hecc.c

918

if (IS_ERR(priv->clk)) {

drivers/net/can/ti_hecc.c

920

err = PTR_ERR(priv->clk);

drivers/net/can/ti_hecc.c

921

priv->clk = NULL;

drivers/net/can/ti_hecc.c

924

priv->can.clock.freq = clk_get_rate(priv->clk);

drivers/net/can/ti_hecc.c

926

err = clk_prepare_enable(priv->clk);

drivers/net/can/ti_hecc.c

955

clk_disable_unprepare(priv->clk);

drivers/net/can/ti_hecc.c

957

clk_put(priv->clk);

drivers/net/can/ti_hecc.c

970

clk_disable_unprepare(priv->clk);

drivers/net/can/ti_hecc.c

971

clk_put(priv->clk);

drivers/net/can/ti_hecc.c

990

clk_disable_unprepare(priv->clk);

drivers/net/can/xilinx_can.c

252

struct clk *bus_clk;

drivers/net/can/xilinx_can.c

253

struct clk *can_clk;

drivers/net/dsa/bcm_sf2.c

1465

priv->clk = devm_clk_get_optional(&pdev->dev, "sw_switch");

drivers/net/dsa/bcm_sf2.c

1466

if (IS_ERR(priv->clk))

drivers/net/dsa/bcm_sf2.c

1467

return PTR_ERR(priv->clk);

drivers/net/dsa/bcm_sf2.c

1469

ret = clk_prepare_enable(priv->clk);

drivers/net/dsa/bcm_sf2.c

1566

clk_disable_unprepare(priv->clk);

drivers/net/dsa/bcm_sf2.c

1584

clk_disable_unprepare(priv->clk);

drivers/net/dsa/bcm_sf2.c

967

clk_disable_unprepare(priv->clk);

drivers/net/dsa/bcm_sf2.c

978

clk_prepare_enable(priv->clk);

drivers/net/dsa/bcm_sf2.c

984

clk_disable_unprepare(priv->clk);

drivers/net/dsa/bcm_sf2.c

993

clk_disable_unprepare(priv->clk);

drivers/net/dsa/bcm_sf2.h

100

struct clk *clk;

drivers/net/dsa/bcm_sf2.h

101

struct clk *clk_mdiv;

drivers/net/dsa/lantiq/lantiq_gswip.h

272

struct clk *clk_gate;

drivers/net/dsa/lantiq/mxl-gsw1xx.c

33

struct regmap *clk;

drivers/net/dsa/lantiq/mxl-gsw1xx.c

432

ret = regmap_update_bits(priv->clk, GSW1XX_CLK_NCO_CTRL,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

732

priv->clk = gsw1xx_regmap_init(priv, "clk", GSW1XX_CLK_BASE, 0xff);

drivers/net/dsa/lantiq/mxl-gsw1xx.c

733

if (IS_ERR(priv->clk))

drivers/net/dsa/lantiq/mxl-gsw1xx.c

734

return PTR_ERR(priv->clk);

drivers/net/dsa/rzn1_a5psw.c

1239

a5psw->clk = devm_clk_get_enabled(dev, "clk");

drivers/net/dsa/rzn1_a5psw.c

1240

if (IS_ERR(a5psw->clk)) {

drivers/net/dsa/rzn1_a5psw.c

1242

ret = PTR_ERR(a5psw->clk);

drivers/net/dsa/rzn1_a5psw.c

307

rate = clk_get_rate(a5psw->clk);

drivers/net/dsa/rzn1_a5psw.h

252

struct clk *hclk;

drivers/net/dsa/rzn1_a5psw.h

253

struct clk *clk;

drivers/net/ethernet/actions/owl-emac.c

1458

ret = clk_set_rate(priv->clks[OWL_EMAC_CLK_RMII].clk, rate);

drivers/net/ethernet/allwinner/sun4i-emac.c

1008

db->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/allwinner/sun4i-emac.c

1009

if (IS_ERR(db->clk)) {

drivers/net/ethernet/allwinner/sun4i-emac.c

1010

ret = PTR_ERR(db->clk);

drivers/net/ethernet/allwinner/sun4i-emac.c

1014

ret = clk_prepare_enable(db->clk);

drivers/net/ethernet/allwinner/sun4i-emac.c

1072

clk_disable_unprepare(db->clk);

drivers/net/ethernet/allwinner/sun4i-emac.c

1098

clk_disable_unprepare(db->clk);

drivers/net/ethernet/allwinner/sun4i-emac.c

73

struct clk *clk;

drivers/net/ethernet/amd/xgbe/xgbe.h

1138

struct clk *sysclk;

drivers/net/ethernet/amd/xgbe/xgbe.h

1140

struct clk *ptpclk;

drivers/net/ethernet/apm/xgene/xgene_enet_hw.c

423

struct clk *parent = clk_get_parent(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_hw.c

701

clk_prepare_enable(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_hw.c

703

clk_disable_unprepare(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_hw.c

705

clk_prepare_enable(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_hw.c

747

if (!IS_ERR(pdata->clk))

drivers/net/ethernet/apm/xgene/xgene_enet_hw.c

748

clk_disable_unprepare(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_main.c

1769

pdata->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/apm/xgene/xgene_enet_main.c

1770

if (IS_ERR(pdata->clk)) {

drivers/net/ethernet/apm/xgene/xgene_enet_main.c

1776

if (PTR_ERR(pdata->clk) != -ENOENT || dev->of_node)

drivers/net/ethernet/apm/xgene/xgene_enet_main.c

1777

return PTR_ERR(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_main.h

188

struct clk *clk;

drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c

453

if (!IS_ERR(p->clk)) {

drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c

454

clk_prepare_enable(p->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c

456

clk_disable_unprepare(p->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c

458

clk_prepare_enable(p->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c

529

if (!IS_ERR(p->clk))

drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c

530

clk_disable_unprepare(p->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c

394

clk_prepare_enable(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c

396

clk_disable_unprepare(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c

398

clk_prepare_enable(pdata->clk);

drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c

445

if (!IS_ERR(pdata->clk))

drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c

446

clk_disable_unprepare(pdata->clk);

drivers/net/ethernet/arc/emac.h

141

struct clk *clk;

drivers/net/ethernet/arc/emac_main.c

1018

if (priv->clk)

drivers/net/ethernet/arc/emac_main.c

1019

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/arc/emac_main.c

1036

if (!IS_ERR(priv->clk))

drivers/net/ethernet/arc/emac_main.c

1037

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/arc/emac_main.c

906

if (priv->clk) {

drivers/net/ethernet/arc/emac_main.c

907

err = clk_prepare_enable(priv->clk);

drivers/net/ethernet/arc/emac_main.c

913

clock_frequency = clk_get_rate(priv->clk);

drivers/net/ethernet/arc/emac_rockchip.c

139

priv->emac.clk = devm_clk_get(dev, "hclk");

drivers/net/ethernet/arc/emac_rockchip.c

140

if (IS_ERR(priv->emac.clk)) {

drivers/net/ethernet/arc/emac_rockchip.c

142

PTR_ERR(priv->emac.clk));

drivers/net/ethernet/arc/emac_rockchip.c

143

err = PTR_ERR(priv->emac.clk);

drivers/net/ethernet/arc/emac_rockchip.c

32

struct clk *refclk;

drivers/net/ethernet/arc/emac_rockchip.c

33

struct clk *macclk;

drivers/net/ethernet/atheros/ag71xx.c

1799

struct clk *clk_eth;

drivers/net/ethernet/atheros/ag71xx.c

382

struct clk *clk_mdio;

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1252

priv->clk = devm_clk_get_optional(dev, "sw_asp");

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1253

if (IS_ERR(priv->clk))

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1254

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1280

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1364

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1373

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1405

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1416

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1427

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

1443

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp.h

367

struct clk *clk;

drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c

1077

ret = clk_prepare_enable(intf->parent->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c

1083

clk_disable_unprepare(intf->parent->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c

1341

clk_disable_unprepare(intf->parent->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c

1370

ret = clk_prepare_enable(intf->parent->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c

1385

clk_disable_unprepare(intf->parent->clk);

drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c

913

clk_disable_unprepare(intf->parent->clk);

drivers/net/ethernet/broadcom/bcm63xx_enet.h

320

struct clk *mac_clk;

drivers/net/ethernet/broadcom/bcm63xx_enet.h

323

struct clk *phy_clk;

drivers/net/ethernet/broadcom/bcmsysport.c

169

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

183

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

1935

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

2055

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

2114

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

2483

priv->clk = devm_clk_get_optional(&pdev->dev, "sw_sysport");

drivers/net/ethernet/broadcom/bcmsysport.c

2484

if (IS_ERR(priv->clk)) {

drivers/net/ethernet/broadcom/bcmsysport.c

2485

ret = PTR_ERR(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

2597

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

2611

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

2771

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

2786

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.c

2874

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/bcmsysport.h

754

struct clk *clk;

drivers/net/ethernet/broadcom/bcmsysport.h

755

struct clk *wol_clk;

drivers/net/ethernet/broadcom/genet/bcmgenet.c

3309

clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

3377

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

3431

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4009

priv->clk = devm_clk_get_optional(&priv->pdev->dev, "enet");

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4010

if (IS_ERR(priv->clk)) {

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4012

err = PTR_ERR(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4016

err = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4093

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4104

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4137

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4255

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

4333

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

756

return clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

764

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

800

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.c

808

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/broadcom/genet/bcmgenet.h

632

struct clk *clk_eee;

drivers/net/ethernet/broadcom/genet/bcmgenet.h

658

struct clk *clk;

drivers/net/ethernet/broadcom/genet/bcmgenet.h

663

struct clk *clk_wol;

drivers/net/ethernet/broadcom/genet/bcmmii.c

472

ppd.clk = priv->clk;

drivers/net/ethernet/cadence/macb.h

1219

int (*clk_init)(struct platform_device *pdev, struct clk **pclk,

drivers/net/ethernet/cadence/macb.h

1220

struct clk **hclk, struct clk **tx_clk,

drivers/net/ethernet/cadence/macb.h

1221

struct clk **rx_clk, struct clk **tsu_clk);

drivers/net/ethernet/cadence/macb.h

1301

struct clk *pclk;

drivers/net/ethernet/cadence/macb.h

1302

struct clk *hclk;

drivers/net/ethernet/cadence/macb.h

1303

struct clk *tx_clk;

drivers/net/ethernet/cadence/macb.h

1304

struct clk *rx_clk;

drivers/net/ethernet/cadence/macb.h

1305

struct clk *tsu_clk;

drivers/net/ethernet/cadence/macb.h

1455

struct clk *pclk;

drivers/net/ethernet/cadence/macb.h

1456

struct clk *hclk;

drivers/net/ethernet/cadence/macb_main.c

3624

struct clk *tsu_clk;

drivers/net/ethernet/cadence/macb_main.c

4486

static void macb_clks_disable(struct clk *pclk, struct clk *hclk, struct clk *tx_clk,

drivers/net/ethernet/cadence/macb_main.c

4487

struct clk *rx_clk, struct clk *tsu_clk)

drivers/net/ethernet/cadence/macb_main.c

4490

{ .clk = tsu_clk, },

drivers/net/ethernet/cadence/macb_main.c

4491

{ .clk = rx_clk, },

drivers/net/ethernet/cadence/macb_main.c

4492

{ .clk = pclk, },

drivers/net/ethernet/cadence/macb_main.c

4493

{ .clk = hclk, },

drivers/net/ethernet/cadence/macb_main.c

4494

{ .clk = tx_clk },

drivers/net/ethernet/cadence/macb_main.c

4500

static int macb_clk_init(struct platform_device *pdev, struct clk **pclk,

drivers/net/ethernet/cadence/macb_main.c

4501

struct clk **hclk, struct clk **tx_clk,

drivers/net/ethernet/cadence/macb_main.c

4502

struct clk **rx_clk, struct clk **tsu_clk)

drivers/net/ethernet/cadence/macb_main.c

5080

static int at91ether_clk_init(struct platform_device *pdev, struct clk **pclk,

drivers/net/ethernet/cadence/macb_main.c

5081

struct clk **hclk, struct clk **tx_clk,

drivers/net/ethernet/cadence/macb_main.c

5082

struct clk **rx_clk, struct clk **tsu_clk)

drivers/net/ethernet/cadence/macb_main.c

5186

static int fu540_c000_clk_init(struct platform_device *pdev, struct clk **pclk,

drivers/net/ethernet/cadence/macb_main.c

5187

struct clk **hclk, struct clk **tx_clk,

drivers/net/ethernet/cadence/macb_main.c

5188

struct clk **rx_clk, struct clk **tsu_clk)

drivers/net/ethernet/cadence/macb_main.c

5540

struct clk *pclk, *hclk = NULL, *tx_clk = NULL, *rx_clk = NULL;

drivers/net/ethernet/cadence/macb_main.c

5543

struct clk *tsu_clk = NULL;

drivers/net/ethernet/cadence/macb_pci.c

112

struct clk *pclk = plat_data->pclk;

drivers/net/ethernet/cadence/macb_pci.c

113

struct clk *hclk = plat_data->hclk;

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

2975

unsigned int clk = adap->params.vpd.cclk * 1000;

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

2981

tps = clk / cpt;

drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c

944

DEFINE_SHOW_ATTRIBUTE(clk);

drivers/net/ethernet/cortina/gemini.c

113

struct clk *pclk;

drivers/net/ethernet/ethoc.c

1175

struct clk *clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/ethoc.c

1177

if (!IS_ERR(clk)) {

drivers/net/ethernet/ethoc.c

1178

priv->clk = clk;

drivers/net/ethernet/ethoc.c

1179

clk_prepare_enable(clk);

drivers/net/ethernet/ethoc.c

1180

eth_clkfreq = clk_get_rate(clk);

drivers/net/ethernet/ethoc.c

1246

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/ethoc.c

1270

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/ethoc.c

220

struct clk *clk;

drivers/net/ethernet/faraday/ftgmac100.c

114

struct clk *clk;

drivers/net/ethernet/faraday/ftgmac100.c

117

struct clk *rclk;

drivers/net/ethernet/faraday/ftgmac100.c

1807

struct clk *clk;

drivers/net/ethernet/faraday/ftgmac100.c

1810

clk = devm_clk_get_enabled(priv->dev, NULL /* MACCLK */);

drivers/net/ethernet/faraday/ftgmac100.c

1811

if (IS_ERR(clk))

drivers/net/ethernet/faraday/ftgmac100.c

1812

return PTR_ERR(clk);

drivers/net/ethernet/faraday/ftgmac100.c

1813

priv->clk = clk;

drivers/net/ethernet/faraday/ftgmac100.c

1819

rc = clk_set_rate(priv->clk, priv->use_ncsi ? FTGMAC_25MHZ :

drivers/net/ethernet/freescale/enetc/enetc.h

486

struct clk *ref_clk; /* RGMII/RMII reference clock */

drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c

758

struct clk *ipg_clk;

drivers/net/ethernet/freescale/fec.h

595

struct clk *clk_ipg;

drivers/net/ethernet/freescale/fec.h

596

struct clk *clk_ahb;

drivers/net/ethernet/freescale/fec.h

597

struct clk *clk_ref;

drivers/net/ethernet/freescale/fec.h

598

struct clk *clk_enet_out;

drivers/net/ethernet/freescale/fec.h

599

struct clk *clk_ptp;

drivers/net/ethernet/freescale/fec.h

600

struct clk *clk_2x_txclk;

drivers/net/ethernet/freescale/fman/fman.c

2697

struct clk *clk;

drivers/net/ethernet/freescale/fman/fman.c

2726

clk = of_clk_get(fm_node, 0);

drivers/net/ethernet/freescale/fman/fman.c

2727

if (IS_ERR(clk)) {

drivers/net/ethernet/freescale/fman/fman.c

2728

err = PTR_ERR(clk);

drivers/net/ethernet/freescale/fman/fman.c

2734

clk_rate = clk_get_rate(clk);

drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c

863

struct clk *clk;

drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c

898

clk = devm_clk_get_optional_enabled(&ofdev->dev, "per");

drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c

899

if (IS_ERR(clk))

drivers/net/ethernet/freescale/xgmac_mdio.c

55

struct clk *enet_clk;

drivers/net/ethernet/hisilicon/hisi_femac.c

111

struct clk *clk;

drivers/net/ethernet/hisilicon/hisi_femac.c

800

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/hisilicon/hisi_femac.c

801

if (IS_ERR(priv->clk)) {

drivers/net/ethernet/hisilicon/hisi_femac.c

807

ret = clk_prepare_enable(priv->clk);

drivers/net/ethernet/hisilicon/hisi_femac.c

889

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/hisilicon/hisi_femac.c

905

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/hisilicon/hisi_femac.c

922

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/hisilicon/hisi_femac.c

932

clk_prepare_enable(priv->clk);

drivers/net/ethernet/hisilicon/hix5hd2_gmac.c

265

struct clk *mac_core_clk;

drivers/net/ethernet/hisilicon/hix5hd2_gmac.c

266

struct clk *mac_ifc_clk;

drivers/net/ethernet/intel/ice/ice_ptp.c

1697

u64 clk, period, start, phase;

drivers/net/ethernet/intel/ice/ice_ptp.c

1738

clk = ice_ptp_read_src_clk_reg(pf, NULL) + NSEC_PER_MSEC * 500;

drivers/net/ethernet/intel/ice/ice_ptp.c

1739

if (rq->flags & PTP_PEROUT_PHASE || start <= clk - prop_delay_ns)

drivers/net/ethernet/intel/ice/ice_ptp.c

1740

start = div64_u64(clk + period - 1, period) * period + phase;

drivers/net/ethernet/korina.c

1290

struct clk *clk;

drivers/net/ethernet/korina.c

1306

clk = devm_clk_get_optional_enabled(&pdev->dev, "mdioclk");

drivers/net/ethernet/korina.c

1307

if (IS_ERR(clk))

drivers/net/ethernet/korina.c

1308

return PTR_ERR(clk);

drivers/net/ethernet/korina.c

1309

if (clk) {

drivers/net/ethernet/korina.c

1310

lp->mii_clock_freq = clk_get_rate(clk);

drivers/net/ethernet/lantiq_xrx200.c

593

priv->clk = devm_clk_get(dev, NULL);

drivers/net/ethernet/lantiq_xrx200.c

594

if (IS_ERR(priv->clk)) {

drivers/net/ethernet/lantiq_xrx200.c

596

return PTR_ERR(priv->clk);

drivers/net/ethernet/lantiq_xrx200.c

609

err = clk_prepare_enable(priv->clk);

drivers/net/ethernet/lantiq_xrx200.c

636

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/lantiq_xrx200.c

658

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/lantiq_xrx200.c

79

struct clk *clk;

drivers/net/ethernet/marvell/mv643xx_eth.c

277

struct clk *clk;

drivers/net/ethernet/marvell/mv643xx_eth.c

2867

msp->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

drivers/net/ethernet/marvell/mv643xx_eth.c

2868

if (IS_ERR(msp->clk))

drivers/net/ethernet/marvell/mv643xx_eth.c

2869

return PTR_ERR(msp->clk);

drivers/net/ethernet/marvell/mv643xx_eth.c

3162

mp->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/marvell/mv643xx_eth.c

3163

if (!IS_ERR(mp->clk)) {

drivers/net/ethernet/marvell/mv643xx_eth.c

3164

clk_prepare_enable(mp->clk);

drivers/net/ethernet/marvell/mv643xx_eth.c

3165

mp->t_clk = clk_get_rate(mp->clk);

drivers/net/ethernet/marvell/mv643xx_eth.c

3166

} else if (!IS_ERR(mp->shared->clk)) {

drivers/net/ethernet/marvell/mv643xx_eth.c

3167

mp->t_clk = clk_get_rate(mp->shared->clk);

drivers/net/ethernet/marvell/mv643xx_eth.c

3265

if (!IS_ERR(mp->clk))

drivers/net/ethernet/marvell/mv643xx_eth.c

3266

clk_disable_unprepare(mp->clk);

drivers/net/ethernet/marvell/mv643xx_eth.c

3282

if (!IS_ERR(mp->clk))

drivers/net/ethernet/marvell/mv643xx_eth.c

3283

clk_disable_unprepare(mp->clk);

drivers/net/ethernet/marvell/mv643xx_eth.c

413

struct clk *clk;

drivers/net/ethernet/marvell/mvmdio.c

238

struct clk *mg_core;

drivers/net/ethernet/marvell/mvmdio.c

331

for (i = 0; i < ARRAY_SIZE(dev->clk); i++) {

drivers/net/ethernet/marvell/mvmdio.c

332

dev->clk[i] = of_clk_get(pdev->dev.of_node, i);

drivers/net/ethernet/marvell/mvmdio.c

333

if (PTR_ERR(dev->clk[i]) == -EPROBE_DEFER) {

drivers/net/ethernet/marvell/mvmdio.c

337

if (IS_ERR(dev->clk[i]))

drivers/net/ethernet/marvell/mvmdio.c

339

clk_prepare_enable(dev->clk[i]);

drivers/net/ethernet/marvell/mvmdio.c

343

ARRAY_SIZE(dev->clk))))

drivers/net/ethernet/marvell/mvmdio.c

346

__stringify(ARRAY_SIZE(dev->clk)) "\n");

drivers/net/ethernet/marvell/mvmdio.c

351

dev->clk[0] = clk_get_optional(&pdev->dev, NULL);

drivers/net/ethernet/marvell/mvmdio.c

352

if (IS_ERR(dev->clk[0])) {

drivers/net/ethernet/marvell/mvmdio.c

353

ret = PTR_ERR(dev->clk[0]);

drivers/net/ethernet/marvell/mvmdio.c

356

clk_prepare_enable(dev->clk[0]);

drivers/net/ethernet/marvell/mvmdio.c

403

for (i = 0; i < ARRAY_SIZE(dev->clk); i++) {

drivers/net/ethernet/marvell/mvmdio.c

404

if (IS_ERR(dev->clk[i]))

drivers/net/ethernet/marvell/mvmdio.c

406

clk_disable_unprepare(dev->clk[i]);

drivers/net/ethernet/marvell/mvmdio.c

407

clk_put(dev->clk[i]);

drivers/net/ethernet/marvell/mvmdio.c

423

for (i = 0; i < ARRAY_SIZE(dev->clk); i++) {

drivers/net/ethernet/marvell/mvmdio.c

424

clk_disable_unprepare(dev->clk[i]);

drivers/net/ethernet/marvell/mvmdio.c

425

clk_put(dev->clk[i]);

drivers/net/ethernet/marvell/mvmdio.c

72

struct clk *clk[4];

drivers/net/ethernet/marvell/mvneta.c

1701

clk_rate = clk_get_rate(pp->clk);

drivers/net/ethernet/marvell/mvneta.c

4130

unsigned long rate = clk_get_rate(pp->clk);

drivers/net/ethernet/marvell/mvneta.c

4200

u32 val, clk;

drivers/net/ethernet/marvell/mvneta.c

4204

clk = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);

drivers/net/ethernet/marvell/mvneta.c

4205

clk &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE;

drivers/net/ethernet/marvell/mvneta.c

4206

mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, clk);

drivers/net/ethernet/marvell/mvneta.c

5183

core_clk_rate = clk_get_rate(pp->clk);

drivers/net/ethernet/marvell/mvneta.c

528

struct clk *clk;

drivers/net/ethernet/marvell/mvneta.c

530

struct clk *clk_bus;

drivers/net/ethernet/marvell/mvneta.c

5545

pp->clk = devm_clk_get(&pdev->dev, "core");

drivers/net/ethernet/marvell/mvneta.c

5546

if (IS_ERR(pp->clk))

drivers/net/ethernet/marvell/mvneta.c

5547

pp->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/marvell/mvneta.c

5548

if (IS_ERR(pp->clk)) {

drivers/net/ethernet/marvell/mvneta.c

5549

err = PTR_ERR(pp->clk);

drivers/net/ethernet/marvell/mvneta.c

5553

clk_prepare_enable(pp->clk);

drivers/net/ethernet/marvell/mvneta.c

5766

clk_disable_unprepare(pp->clk);

drivers/net/ethernet/marvell/mvneta.c

5780

clk_disable_unprepare(pp->clk);

drivers/net/ethernet/marvell/mvneta.c

5834

clk_disable_unprepare(pp->clk);

drivers/net/ethernet/marvell/mvneta.c

5846

clk_prepare_enable(pp->clk);

drivers/net/ethernet/marvell/mvneta_bm.c

424

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/marvell/mvneta_bm.c

425

if (IS_ERR(priv->clk))

drivers/net/ethernet/marvell/mvneta_bm.c

426

return PTR_ERR(priv->clk);

drivers/net/ethernet/marvell/mvneta_bm.c

427

err = clk_prepare_enable(priv->clk);

drivers/net/ethernet/marvell/mvneta_bm.c

456

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/marvell/mvneta_bm.c

477

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/marvell/mvneta_bm.h

97

struct clk *clk;

drivers/net/ethernet/marvell/mvpp2/mvpp2.h

1053

struct clk *pp_clk;

drivers/net/ethernet/marvell/mvpp2/mvpp2.h

1054

struct clk *gop_clk;

drivers/net/ethernet/marvell/mvpp2/mvpp2.h

1055

struct clk *mg_clk;

drivers/net/ethernet/marvell/mvpp2/mvpp2.h

1056

struct clk *mg_core_clk;

drivers/net/ethernet/marvell/mvpp2/mvpp2.h

1057

struct clk *axi_clk;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

1850

u64 clk;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

1855

u64 clk;

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

359

static int ptp_get_clock(struct ptp *ptp, u64 *clk)

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

362

*clk = ptp->read_ptp_tstmp(ptp);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

430

static int ptp_get_tstmp(struct ptp *ptp, u64 *clk)

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

436

*clk = (timestamp >> 32) * NSEC_PER_SEC + (timestamp & 0xFFFFFFFF);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

438

*clk = readq(ptp->reg_base + PTP_TIMESTAMP);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

639

err = ptp_get_clock(rvu->ptp, &rsp->clk);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

642

err = ptp_get_tstmp(rvu->ptp, &rsp->clk);

drivers/net/ethernet/marvell/octeontx2/af/ptp.c

654

ptp_atomic_update(rvu->ptp, (u64)req->clk);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c

135

req->clk = nsec;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c

227

return rsp->clk;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c

96

return rsp->clk;

drivers/net/ethernet/marvell/pxa168_eth.c

1391

struct clk *clk;

drivers/net/ethernet/marvell/pxa168_eth.c

1397

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/net/ethernet/marvell/pxa168_eth.c

1398

if (IS_ERR(clk)) {

drivers/net/ethernet/marvell/pxa168_eth.c

1410

pep->clk = clk;

drivers/net/ethernet/marvell/pxa168_eth.c

241

struct clk *clk;

drivers/net/ethernet/marvell/sky2.c

3114

static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)

drivers/net/ethernet/marvell/sky2.c

3116

return clk / sky2_mhz(hw);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

3794

int clk;

drivers/net/ethernet/mediatek/mtk_eth_soc.c

3796

for (clk = MTK_CLK_MAX - 1; clk >= 0; clk--)

drivers/net/ethernet/mediatek/mtk_eth_soc.c

3797

clk_disable_unprepare(eth->clks[clk]);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

3802

int clk, ret;

drivers/net/ethernet/mediatek/mtk_eth_soc.c

3804

for (clk = 0; clk < MTK_CLK_MAX ; clk++) {

drivers/net/ethernet/mediatek/mtk_eth_soc.c

3805

ret = clk_prepare_enable(eth->clks[clk]);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

3813

while (--clk >= 0)

drivers/net/ethernet/mediatek/mtk_eth_soc.c

3814

clk_disable_unprepare(eth->clks[clk]);

drivers/net/ethernet/mediatek/mtk_eth_soc.h

1320

struct clk *clks[MTK_CLK_MAX];

drivers/net/ethernet/nxp/lpc_eth.c

1027

clk_disable_unprepare(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1162

ret = clk_prepare_enable(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1269

pldat->clk = clk_get(dev, NULL);

drivers/net/ethernet/nxp/lpc_eth.c

1270

if (IS_ERR(pldat->clk)) {

drivers/net/ethernet/nxp/lpc_eth.c

1272

ret = PTR_ERR(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1277

ret = clk_prepare_enable(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1410

clk_disable_unprepare(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1412

clk_put(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1436

clk_disable_unprepare(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1437

clk_put(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1455

clk_disable_unprepare(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

1482

ret = clk_enable(pldat->clk);

drivers/net/ethernet/nxp/lpc_eth.c

403

struct clk *clk;

drivers/net/ethernet/qualcomm/emac/emac.c

439

struct clk *clk = devm_clk_get(&pdev->dev, emac_clk_name[i]);

drivers/net/ethernet/qualcomm/emac/emac.c

441

if (IS_ERR(clk)) {

drivers/net/ethernet/qualcomm/emac/emac.c

444

emac_clk_name[i], PTR_ERR(clk));

drivers/net/ethernet/qualcomm/emac/emac.c

446

return PTR_ERR(clk);

drivers/net/ethernet/qualcomm/emac/emac.c

449

adpt->clk[i] = clk;

drivers/net/ethernet/qualcomm/emac/emac.c

471

ret = clk_prepare_enable(adpt->clk[EMAC_CLK_AXI]);

drivers/net/ethernet/qualcomm/emac/emac.c

475

ret = clk_prepare_enable(adpt->clk[EMAC_CLK_CFG_AHB]);

drivers/net/ethernet/qualcomm/emac/emac.c

479

ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 19200000);

drivers/net/ethernet/qualcomm/emac/emac.c

483

ret = clk_prepare_enable(adpt->clk[EMAC_CLK_HIGH_SPEED]);

drivers/net/ethernet/qualcomm/emac/emac.c

490

clk_disable_unprepare(adpt->clk[EMAC_CLK_CFG_AHB]);

drivers/net/ethernet/qualcomm/emac/emac.c

492

clk_disable_unprepare(adpt->clk[EMAC_CLK_AXI]);

drivers/net/ethernet/qualcomm/emac/emac.c

506

ret = clk_set_rate(adpt->clk[EMAC_CLK_TX], 125000000);

drivers/net/ethernet/qualcomm/emac/emac.c

510

ret = clk_prepare_enable(adpt->clk[EMAC_CLK_TX]);

drivers/net/ethernet/qualcomm/emac/emac.c

514

ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 125000000);

drivers/net/ethernet/qualcomm/emac/emac.c

518

ret = clk_set_rate(adpt->clk[EMAC_CLK_MDIO], 25000000);

drivers/net/ethernet/qualcomm/emac/emac.c

522

ret = clk_prepare_enable(adpt->clk[EMAC_CLK_MDIO]);

drivers/net/ethernet/qualcomm/emac/emac.c

526

ret = clk_prepare_enable(adpt->clk[EMAC_CLK_RX]);

drivers/net/ethernet/qualcomm/emac/emac.c

530

return clk_prepare_enable(adpt->clk[EMAC_CLK_SYS]);

drivers/net/ethernet/qualcomm/emac/emac.c

539

clk_disable_unprepare(adpt->clk[i]);

drivers/net/ethernet/qualcomm/emac/emac.h

337

struct clk *clk[EMAC_CLK_CNT];

drivers/net/ethernet/qualcomm/ppe/ppe.c

118

struct clk *clk;

drivers/net/ethernet/qualcomm/ppe/ppe.c

147

clk = devm_clk_get(dev, "ppe");

drivers/net/ethernet/qualcomm/ppe/ppe.c

148

if (IS_ERR(clk))

drivers/net/ethernet/qualcomm/ppe/ppe.c

149

return PTR_ERR(clk);

drivers/net/ethernet/qualcomm/ppe/ppe.c

151

ret = clk_set_rate(clk, ppe_rate);

drivers/net/ethernet/realtek/r8169_main.c

5201

clk_disable_unprepare(tp->clk);

drivers/net/ethernet/realtek/r8169_main.c

5212

clk_prepare_enable(tp->clk);

drivers/net/ethernet/realtek/r8169_main.c

5621

tp->clk = devm_clk_get_optional_enabled(&pdev->dev, "ether_clk");

drivers/net/ethernet/realtek/r8169_main.c

5622

if (IS_ERR(tp->clk))

drivers/net/ethernet/realtek/r8169_main.c

5623

return dev_err_probe(&pdev->dev, PTR_ERR(tp->clk), "failed to get ether_clk\n");

drivers/net/ethernet/realtek/r8169_main.c

748

struct clk *clk;

drivers/net/ethernet/renesas/ravb.h

1082

struct clk *clk;

drivers/net/ethernet/renesas/ravb.h

1083

struct clk *refclk;

drivers/net/ethernet/renesas/ravb.h

1084

struct clk *gptp_clk;

drivers/net/ethernet/renesas/ravb_main.c

1865

rate = clk_get_rate(priv->clk);

drivers/net/ethernet/renesas/ravb_main.c

2954

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/renesas/ravb_main.c

2955

if (IS_ERR(priv->clk)) {

drivers/net/ethernet/renesas/ravb_main.c

2956

error = PTR_ERR(priv->clk);

drivers/net/ethernet/renesas/rswitch.h

1061

struct clk *clk;

drivers/net/ethernet/renesas/rswitch_main.c

1930

etha->psmcs = clk_get_rate(priv->clk) / 100000 / (25 * 2) - 1;

drivers/net/ethernet/renesas/rswitch_main.c

2061

err = rcar_gen4_ptp_register(priv->ptp_priv, clk_get_rate(priv->clk));

drivers/net/ethernet/renesas/rswitch_main.c

2145

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/renesas/rswitch_main.c

2146

if (IS_ERR(priv->clk))

drivers/net/ethernet/renesas/rswitch_main.c

2147

return PTR_ERR(priv->clk);

drivers/net/ethernet/renesas/rtsn.c

1239

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/renesas/rtsn.c

1240

if (IS_ERR(priv->clk)) {

drivers/net/ethernet/renesas/rtsn.c

1241

ret = PTR_ERR(priv->clk);

drivers/net/ethernet/renesas/rtsn.c

1306

ret = rcar_gen4_ptp_register(priv->ptp_priv, clk_get_rate(priv->clk));

drivers/net/ethernet/renesas/rtsn.c

32

struct clk *clk;

drivers/net/ethernet/renesas/sh_eth.h

535

struct clk *clk;

drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h

488

struct clk *sxgbe_clk;

drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c

256

unsigned long clk = clk_get_rate(priv->sxgbe_clk);

drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c

258

if (!clk)

drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c

261

return (riwt * 256) / (clk / 1000000);

drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c

266

unsigned long clk = clk_get_rate(priv->sxgbe_clk);

drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c

268

if (!clk)

drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c

271

return (usec * (clk / 1000000)) / 256;

drivers/net/ethernet/smsc/smsc911x.c

141

struct clk *clk;

drivers/net/ethernet/smsc/smsc911x.c

381

if (!IS_ERR(pdata->clk)) {

drivers/net/ethernet/smsc/smsc911x.c

382

ret = clk_prepare_enable(pdata->clk);

drivers/net/ethernet/smsc/smsc911x.c

402

if (!IS_ERR(pdata->clk))

drivers/net/ethernet/smsc/smsc911x.c

403

clk_disable_unprepare(pdata->clk);

drivers/net/ethernet/smsc/smsc911x.c

444

pdata->clk = clk_get(&pdev->dev, NULL);

drivers/net/ethernet/smsc/smsc911x.c

445

if (IS_ERR(pdata->clk))

drivers/net/ethernet/smsc/smsc911x.c

447

PTR_ERR(pdata->clk));

drivers/net/ethernet/smsc/smsc911x.c

466

if (!IS_ERR(pdata->clk)) {

drivers/net/ethernet/smsc/smsc911x.c

467

clk_put(pdata->clk);

drivers/net/ethernet/smsc/smsc911x.c

468

pdata->clk = NULL;

drivers/net/ethernet/socionext/netsec.c

1878

priv->clk = devm_clk_get(&pdev->dev, NULL); /* get by 'phy_ref_clk' */

drivers/net/ethernet/socionext/netsec.c

1879

if (IS_ERR(priv->clk))

drivers/net/ethernet/socionext/netsec.c

1880

return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk),

drivers/net/ethernet/socionext/netsec.c

1882

priv->freq = clk_get_rate(priv->clk);

drivers/net/ethernet/socionext/netsec.c

2179

clk_disable_unprepare(priv->clk);

drivers/net/ethernet/socionext/netsec.c

2188

clk_prepare_enable(priv->clk);

drivers/net/ethernet/socionext/netsec.c

305

struct clk *clk;

drivers/net/ethernet/socionext/sni_ave.c

1175

ret = clk_prepare_enable(priv->clk[nc]);

drivers/net/ethernet/socionext/sni_ave.c

1244

clk_disable_unprepare(priv->clk[nc]);

drivers/net/ethernet/socionext/sni_ave.c

1261

clk_disable_unprepare(priv->clk[i]);

drivers/net/ethernet/socionext/sni_ave.c

1642

priv->clk[i] = devm_clk_get(dev, name);

drivers/net/ethernet/socionext/sni_ave.c

1643

if (IS_ERR(priv->clk[i]))

drivers/net/ethernet/socionext/sni_ave.c

1644

return PTR_ERR(priv->clk[i]);

drivers/net/ethernet/socionext/sni_ave.c

257

struct clk *clk[AVE_MAX_CLKS];

drivers/net/ethernet/spacemit/k1_emac.c

112

struct clk *bus_clk;

drivers/net/ethernet/spacemit/k1_emac.c

113

struct clk *ref_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c

153

static int imx_dwmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c

56

struct clk *clk_tx;

drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c

57

struct clk *clk_mem;

drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c

20

struct clk *tx_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

111

struct clk *core_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

259

static int ipq806x_gmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

76

struct clk *rmii_internal_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c

25

static int meson6_dwmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

117

static struct clk *meson8b_dwmac_register_clk(struct meson8b_dwmac *dwmac,

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

143

struct clk *clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

169

clk = meson8b_dwmac_register_clk(dwmac, "m250_sel", mux_parents,

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

172

if (WARN_ON(IS_ERR(clk)))

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

173

return PTR_ERR(clk);

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

182

clk = meson8b_dwmac_register_clk(dwmac, "m250_div", &parent_data, 1,

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

185

if (WARN_ON(IS_ERR(clk)))

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

186

return PTR_ERR(clk);

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

191

clk = meson8b_dwmac_register_clk(dwmac, "fixed_div2", &parent_data, 1,

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

194

if (WARN_ON(IS_ERR(clk)))

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

195

return PTR_ERR(clk);

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

200

clk = meson8b_dwmac_register_clk(dwmac, "rgmii_tx_en", &parent_data, 1,

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

203

if (WARN_ON(IS_ERR(clk)))

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

204

return PTR_ERR(clk);

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

206

dwmac->rgmii_tx_clk = clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

262

struct clk *clk)

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

266

ret = clk_prepare_enable(clk);

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

271

meson8b_clk_disable_unprepare, clk);

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

92

struct clk *rgmii_tx_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

95

struct clk *timing_adj_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c

106

struct clk *link_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

104

struct clk *clk_phy;

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

1491

static int rk_set_clk_tx_rate(void *bsp_priv_, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c

233

struct clk *clk_mac_speed = bsp_priv->clks[RK_CLK_MAC_SPEED].clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c

41

struct clk *tx_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c

42

struct clk *rx_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c

76

struct clk *clk_gtx;

drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c

143

clk_set_rate(dwmac->clk, freq);

drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c

223

dwmac->clk = devm_clk_get(dev, "sti-ethclk");

drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c

224

if (IS_ERR(dwmac->clk)) {

drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c

226

dwmac->clk = NULL;

drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c

236

return clk_prepare_enable(dwmac->clk);

drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c

243

clk_disable_unprepare(dwmac->clk);

drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c

88

struct clk *clk; /* PHY clock */

drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

88

struct clk *clk_tx;

drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

89

struct clk *clk_rx;

drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

90

struct clk *clk_eth_ck;

drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

91

struct clk *clk_ethstp;

drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

92

struct clk *syscfg_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c

110

struct clk *clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c

129

clk = devm_clk_get_enabled(dev, "mbus");

drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c

130

if (IS_ERR(clk))

drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c

131

return dev_err_probe(dev, PTR_ERR(clk),

drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c

67

struct clk *ephy_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c

23

struct clk *tx_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c

75

static int sun7i_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

104

static int thead_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

221

struct clk *apb_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c

47

struct clk *phy_ref_clk;

drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c

51

static int visconti_eth_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/stmmac.h

408

int stmmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

755

unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

757

if (!clk) {

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

758

clk = priv->plat->clk_ref_rate;

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

759

if (!clk)

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

763

return (usec * (clk / 1000000)) / 256;

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

768

unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

770

if (!clk) {

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

771

clk = priv->plat->clk_ref_rate;

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

772

if (!clk)

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

776

return (riwt * 256) / (clk / 1000000);

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

194

int stmmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c

689

struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat,

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c

694

return plat_dat->clks[i].clk;

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h

17

struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat,

drivers/net/ethernet/sunplus/spl2sw_define.h

227

struct clk *clk;

drivers/net/ethernet/sunplus/spl2sw_driver.c

359

comm->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/ethernet/sunplus/spl2sw_driver.c

360

if (IS_ERR(comm->clk)) {

drivers/net/ethernet/sunplus/spl2sw_driver.c

361

dev_err_probe(&pdev->dev, PTR_ERR(comm->clk),

drivers/net/ethernet/sunplus/spl2sw_driver.c

363

return PTR_ERR(comm->clk);

drivers/net/ethernet/sunplus/spl2sw_driver.c

375

ret = clk_prepare_enable(comm->clk);

drivers/net/ethernet/sunplus/spl2sw_driver.c

510

clk_disable_unprepare(comm->clk);

drivers/net/ethernet/sunplus/spl2sw_driver.c

540

clk_disable_unprepare(comm->clk);

drivers/net/ethernet/ti/am65-cpsw-nuss.c

3526

struct clk *clk;

drivers/net/ethernet/ti/am65-cpsw-nuss.c

3577

clk = devm_clk_get(dev, "fck");

drivers/net/ethernet/ti/am65-cpsw-nuss.c

3578

if (IS_ERR(clk))

drivers/net/ethernet/ti/am65-cpsw-nuss.c

3579

return dev_err_probe(dev, PTR_ERR(clk), "getting fck clock\n");

drivers/net/ethernet/ti/am65-cpsw-nuss.c

3580

common->bus_freq = clk_get_rate(clk);

drivers/net/ethernet/ti/am65-cpts.c

164

struct clk *refclk;

drivers/net/ethernet/ti/cpsw.c

1544

struct clk *clk;

drivers/net/ethernet/ti/cpsw.c

1572

clk = devm_clk_get(dev, "fck");

drivers/net/ethernet/ti/cpsw.c

1573

if (IS_ERR(clk)) {

drivers/net/ethernet/ti/cpsw.c

1574

ret = PTR_ERR(clk);

drivers/net/ethernet/ti/cpsw.c

1578

cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000;

drivers/net/ethernet/ti/cpsw_new.c

1896

struct clk *clk;

drivers/net/ethernet/ti/cpsw_new.c

1921

clk = devm_clk_get(dev, "fck");

drivers/net/ethernet/ti/cpsw_new.c

1922

if (IS_ERR(clk)) {

drivers/net/ethernet/ti/cpsw_new.c

1923

ret = PTR_ERR(clk);

drivers/net/ethernet/ti/cpsw_new.c

1927

cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000;

drivers/net/ethernet/ti/cpts.c

641

static void cpts_clk_unregister(void *clk)

drivers/net/ethernet/ti/cpts.c

643

clk_hw_unregister_mux(clk);

drivers/net/ethernet/ti/cpts.h

112

struct clk *refclk;

drivers/net/ethernet/ti/davinci_emac.c

1813

struct clk *emac_clk;

drivers/net/ethernet/ti/davinci_mdio.c

114

mdio_in = clk_get_rate(data->clk);

drivers/net/ethernet/ti/davinci_mdio.c

613

data->clk = devm_clk_get(dev, "fck");

drivers/net/ethernet/ti/davinci_mdio.c

614

if (IS_ERR(data->clk)) {

drivers/net/ethernet/ti/davinci_mdio.c

616

return PTR_ERR(data->clk);

drivers/net/ethernet/ti/davinci_mdio.c

97

struct clk *clk;

drivers/net/ethernet/ti/icssg/icss_iep.c

844

struct clk *iep_clk;

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

426

struct clk *clk;

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

431

clk = clk_register_fixed_rate(NULL, clk_name, NULL, 0, 156250000);

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

432

if (IS_ERR(clk))

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

433

return PTR_ERR(clk);

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

435

clock = clkdev_create(clk, NULL, "%s", clk_name);

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

437

clk_unregister(clk);

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

441

txgbe->clk = clk;

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

640

clk_unregister(txgbe->clk);

drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c

672

clk_unregister(txgbe->clk);

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

464

struct clk *clk;

drivers/net/ethernet/xilinx/xilinx_axienet.h

561

struct clk *axi_clk;

drivers/net/ethernet/xilinx/xilinx_emaclite.c

1095

struct clk *clkin;

drivers/net/ieee802154/ca8210.c

2745

priv->clk = clk_register_fixed_rate(

drivers/net/ieee802154/ca8210.c

2753

if (IS_ERR(priv->clk)) {

drivers/net/ieee802154/ca8210.c

2755

return PTR_ERR(priv->clk);

drivers/net/ieee802154/ca8210.c

2758

return of_clk_add_provider(np, of_clk_src_simple_get, priv->clk);

drivers/net/ieee802154/ca8210.c

2770

if (IS_ERR_OR_NULL(priv->clk))

drivers/net/ieee802154/ca8210.c

2774

clk_unregister(priv->clk);

drivers/net/ieee802154/ca8210.c

322

struct clk *clk;

drivers/net/ipa/ipa_power.c

240

struct clk *clk;

drivers/net/ipa/ipa_power.c

244

clk = clk_get(dev, "core");

drivers/net/ipa/ipa_power.c

245

if (IS_ERR(clk))

drivers/net/ipa/ipa_power.c

246

return dev_err_cast_probe(dev, clk, "error getting core clock\n");

drivers/net/ipa/ipa_power.c

248

ret = clk_set_rate(clk, data->core_clock_rate);

drivers/net/ipa/ipa_power.c

262

power->core = clk;

drivers/net/ipa/ipa_power.c

284

clk_put(clk);

drivers/net/ipa/ipa_power.c

293

struct clk *clk = power->core;

drivers/net/ipa/ipa_power.c

300

clk_put(clk);

drivers/net/ipa/ipa_power.c

47

struct clk *core;

drivers/net/mdio/mdio-airoha.c

225

priv->clk = devm_clk_get_enabled(dev, NULL);

drivers/net/mdio/mdio-airoha.c

226

if (IS_ERR(priv->clk))

drivers/net/mdio/mdio-airoha.c

227

return PTR_ERR(priv->clk);

drivers/net/mdio/mdio-airoha.c

247

ret = clk_set_rate(priv->clk, freq);

drivers/net/mdio/mdio-airoha.c

43

struct clk *clk;

drivers/net/mdio/mdio-bcm-unimac.c

126

clk_disable_unprepare(priv->clk);

drivers/net/mdio/mdio-bcm-unimac.c

137

ret = clk_prepare_enable(priv->clk);

drivers/net/mdio/mdio-bcm-unimac.c

149

clk_disable_unprepare(priv->clk);

drivers/net/mdio/mdio-bcm-unimac.c

208

ret = clk_prepare_enable(priv->clk);

drivers/net/mdio/mdio-bcm-unimac.c

212

rate = clk_get_rate(priv->clk);

drivers/net/mdio/mdio-bcm-unimac.c

233

clk_disable_unprepare(priv->clk);

drivers/net/mdio/mdio-bcm-unimac.c

279

priv->clk = pdata->clk;

drivers/net/mdio/mdio-bcm-unimac.c

284

priv->clk = devm_clk_get_optional(&pdev->dev, NULL);

drivers/net/mdio/mdio-bcm-unimac.c

287

if (IS_ERR(priv->clk)) {

drivers/net/mdio/mdio-bcm-unimac.c

288

ret = PTR_ERR(priv->clk);

drivers/net/mdio/mdio-bcm-unimac.c

43

struct clk *clk;

drivers/net/mdio/mdio-bcm-unimac.c

97

ret = clk_prepare_enable(priv->clk);

drivers/net/mdio/mdio-hisi-femac.c

102

ret = clk_prepare_enable(data->clk);

drivers/net/mdio/mdio-hisi-femac.c

115

clk_disable_unprepare(data->clk);

drivers/net/mdio/mdio-hisi-femac.c

127

clk_disable_unprepare(data->clk);

drivers/net/mdio/mdio-hisi-femac.c

24

struct clk *clk;

drivers/net/mdio/mdio-hisi-femac.c

96

data->clk = devm_clk_get(&pdev->dev, NULL);

drivers/net/mdio/mdio-hisi-femac.c

97

if (IS_ERR(data->clk)) {

drivers/net/mdio/mdio-hisi-femac.c

98

ret = PTR_ERR(data->clk);

drivers/net/mdio/mdio-ipq4019.c

54

struct clk *mdio_clk;

drivers/net/mdio/mdio-mscc-miim.c

258

rate = clk_get_rate(miim->clk);

drivers/net/mdio/mdio-mscc-miim.c

312

miim->clk = devm_clk_get_optional(dev, NULL);

drivers/net/mdio/mdio-mscc-miim.c

313

if (IS_ERR(miim->clk))

drivers/net/mdio/mdio-mscc-miim.c

314

return PTR_ERR(miim->clk);

drivers/net/mdio/mdio-mscc-miim.c

318

if (miim->bus_freq && !miim->clk) {

drivers/net/mdio/mdio-mscc-miim.c

323

ret = clk_prepare_enable(miim->clk);

drivers/net/mdio/mdio-mscc-miim.c

342

clk_disable_unprepare(miim->clk);

drivers/net/mdio/mdio-mscc-miim.c

351

clk_disable_unprepare(miim->clk);

drivers/net/mdio/mdio-mscc-miim.c

59

struct clk *clk;

drivers/net/mdio/mdio-mux-bcm-iproc.c

56

struct clk *core_clk;

drivers/net/mdio/mdio-mux-meson-g12a.c

229

struct clk *clk;

drivers/net/mdio/mdio-mux-meson-g12a.c

238

clk = devm_clk_get(dev, in_name);

drivers/net/mdio/mdio-mux-meson-g12a.c

239

if (IS_ERR(clk))

drivers/net/mdio/mdio-mux-meson-g12a.c

240

return dev_err_probe(dev, PTR_ERR(clk),

drivers/net/mdio/mdio-mux-meson-g12a.c

243

parent_names[i] = __clk_get_name(clk);

drivers/net/mdio/mdio-mux-meson-g12a.c

266

clk = devm_clk_register(dev, &mux->hw);

drivers/net/mdio/mdio-mux-meson-g12a.c

268

if (IS_ERR(clk)) {

drivers/net/mdio/mdio-mux-meson-g12a.c

270

return PTR_ERR(clk);

drivers/net/mdio/mdio-mux-meson-g12a.c

285

parent_names[0] = __clk_get_name(clk);

drivers/net/mdio/mdio-mux-meson-g12a.c

292

clk = devm_clk_register(dev, &pll->hw);

drivers/net/mdio/mdio-mux-meson-g12a.c

294

if (IS_ERR(clk)) {

drivers/net/mdio/mdio-mux-meson-g12a.c

296

return PTR_ERR(clk);

drivers/net/mdio/mdio-mux-meson-g12a.c

299

priv->pll = clk;

drivers/net/mdio/mdio-mux-meson-g12a.c

308

struct clk *pclk;

drivers/net/mdio/mdio-mux-meson-g12a.c

58

struct clk *pll;

drivers/net/mdio/mdio-mux-meson-gxl.c

119

struct clk *rclk;

drivers/net/mdio/mdio-xgene.c

171

clk_prepare_enable(pdata->clk);

drivers/net/mdio/mdio-xgene.c

173

clk_disable_unprepare(pdata->clk);

drivers/net/mdio/mdio-xgene.c

175

clk_prepare_enable(pdata->clk);

drivers/net/mdio/mdio-xgene.c

187

clk_disable_unprepare(pdata->clk);

drivers/net/mdio/mdio-xgene.c

356

pdata->clk = devm_clk_get(dev, NULL);

drivers/net/mdio/mdio-xgene.c

357

if (IS_ERR(pdata->clk)) {

drivers/net/mdio/mdio-xgene.c

359

return PTR_ERR(pdata->clk);

drivers/net/mdio/mdio-xgene.c

419

clk_disable_unprepare(pdata->clk);

drivers/net/mdio/mdio-xgene.c

434

clk_disable_unprepare(pdata->clk);

drivers/net/pcs/pcs-xpcs-plat.c

33

struct clk *cclk;

drivers/net/phy/bcm7xxx.c

813

struct clk *clk;

drivers/net/phy/bcm7xxx.c

828

clk = devm_clk_get_optional_enabled(&phydev->mdio.dev, NULL);

drivers/net/phy/bcm7xxx.c

829

if (IS_ERR(clk))

drivers/net/phy/bcm7xxx.c

830

return PTR_ERR(clk);

drivers/net/phy/micrel.c

2450

if (!priv->clk_enable && priv->clk) {

drivers/net/phy/micrel.c

2451

clk_prepare_enable(priv->clk);

drivers/net/phy/micrel.c

2460

if (priv->clk_enable && priv->clk) {

drivers/net/phy/micrel.c

2461

clk_disable_unprepare(priv->clk);

drivers/net/phy/micrel.c

2646

struct clk *clk;

drivers/net/phy/micrel.c

2658

clk = devm_clk_get_optional(&phydev->mdio.dev, "rmii-ref");

drivers/net/phy/micrel.c

2660

if (!IS_ERR_OR_NULL(clk)) {

drivers/net/phy/micrel.c

2665

err = clk_prepare_enable(clk);

drivers/net/phy/micrel.c

2671

rate = clk_get_rate(clk);

drivers/net/phy/micrel.c

2672

clk_disable_unprepare(clk);

drivers/net/phy/micrel.c

2688

} else if (!clk) {

drivers/net/phy/micrel.c

2690

clk = devm_clk_get_optional(&phydev->mdio.dev, NULL);

drivers/net/phy/micrel.c

2693

if (IS_ERR(clk))

drivers/net/phy/micrel.c

2694

return PTR_ERR(clk);

drivers/net/phy/micrel.c

2696

priv->clk = clk;

drivers/net/phy/micrel.c

459

struct clk *clk;

drivers/net/phy/realtek/realtek_main.c

215

struct clk *clk;

drivers/net/phy/realtek/realtek_main.c

269

priv->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/net/phy/realtek/realtek_main.c

270

if (IS_ERR(priv->clk))

drivers/net/phy/realtek/realtek_main.c

271

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/net/phy/realtek/realtek_main.c

744

clk_disable_unprepare(priv->clk);

drivers/net/phy/realtek/realtek_main.c

802

clk_prepare_enable(priv->clk);

drivers/net/phy/smsc.c

662

struct clk *refclk;

drivers/net/phy/xilinx_gmii2rgmii.c

90

struct clk *clkin;

drivers/net/wan/framer/pef2256/pef2256.c

41

struct clk *mclk;

drivers/net/wan/framer/pef2256/pef2256.c

42

struct clk *sclkr;

drivers/net/wan/framer/pef2256/pef2256.c

43

struct clk *sclkx;

drivers/net/wan/ixp4xx_hss.c

1314

int clk;

drivers/net/wan/ixp4xx_hss.c

1338

clk = new_line.clock_type;

drivers/net/wan/ixp4xx_hss.c

1339

hss_hdlc_set_clock(port, clk);

drivers/net/wan/ixp4xx_hss.c

1341

if (clk != CLOCK_EXT && clk != CLOCK_INT)

drivers/net/wan/ixp4xx_hss.c

1347

port->clock_type = clk; /* Update settings */

drivers/net/wan/ixp4xx_hss.c

1348

if (clk == CLOCK_INT) {

drivers/net/wireless/ath/ath10k/ahb.h

21

struct clk *cmd_clk;

drivers/net/wireless/ath/ath10k/ahb.h

22

struct clk *ref_clk;

drivers/net/wireless/ath/ath10k/ahb.h

23

struct clk *rtc_clk;

drivers/net/wireless/ath/ath12k/ahb.h

56

struct clk *xo_clk;

drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c

118

clk = devm_clk_get_optional_enabled_with_rate(dev, "lpo", 32768);

drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c

119

if (IS_ERR(clk))

drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c

120

return PTR_ERR(clk);

drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c

122

brcmf_dbg(INFO, "%s LPO clock\n", clk ? "enable" : "no");

drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c

75

struct clk *clk;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1235

if (wlc_hw->clk) {

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1277

if (wlc_hw->forcefastclk && wlc_hw->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1350

if (wlc_hw->clk && (band->mhfs[idx] != save)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1744

void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1750

if (ON == clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1757

void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1759

if (ON == clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1913

wlc_hw->clk = false;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1927

bool v, clk, xtal;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1935

clk = wlc_hw->clk;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1936

if (!clk) {

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

1960

if (!clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

2037

wlc_hw->clk = false;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

2039

wlc_hw->clk = true;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

2390

if (!wlc_hw->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

2407

if (!wlc_hw->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

2730

if (wlc_hw->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

2871

wlc_hw->clk = false;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

3852

if (wlc_hw->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

387

if (!wlc->hw->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

4037

if (!wlc->clk) {

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

4975

if (!wlc->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

5043

wlc->clk = true;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

5119

wlc_hw->clk = false;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

5195

wlc->clk = false;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

750

static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

752

brcms_dbg_info(wlc_hw->d11core, "wl%d: clk %d\n", wlc_hw->unit, clk);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

754

wlc_hw->phyclk = clk;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c

756

if (OFF == clk) { /* clear gmode bit, put phy into reset */

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h

364

bool clk; /* core is out of reset and has clock */

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h

468

bool clk;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h

663

void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h

664

void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c

1621

if (!pi->sh->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c

1851

if (!pi->sh->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c

687

pi->sh->clk = newstate;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h

477

bool clk;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

19636

if (!pi->sh->clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.c

155

void wlapi_bmac_phyclk_fgc(struct phy_shim_info *physhim, bool clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.c

157

brcms_b_phyclk_fgc(physhim->wlc_hw, clk);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.c

160

void wlapi_bmac_macphyclk_set(struct phy_shim_info *physhim, bool clk)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.c

162

brcms_b_macphyclk_set(physhim->wlc_hw, clk);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.h

154

void wlapi_bmac_phyclk_fgc(struct phy_shim_info *physhim, bool clk);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.h

155

void wlapi_bmac_macphyclk_set(struct phy_shim_info *physhim, bool clk);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/stf.c

183

if (wlc->clk) {

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

1194

struct clk *mcu_clk, *ap_conn_clk;

drivers/net/wireless/microchip/wilc1000/netdev.h

213

struct clk *rtc_clk;

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

2442

return clk_get_rate(rt2x00dev->clk) == 20000000;

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

6274

struct clk *clk = clk_get_sys("bus", NULL);

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

6277

if (IS_ERR(clk)) {

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

6278

clk = clk_get_sys("cpu", NULL);

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

6280

if (IS_ERR(clk)) {

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

6283

rate = clk_get_rate(clk) / 3000000;

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

6284

clk_put(clk);

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

6287

rate = clk_get_rate(clk) / 1000000;

drivers/net/wireless/ralink/rt2x00/rt2800lib.c

6288

clk_put(clk);

drivers/net/wireless/ralink/rt2x00/rt2800soc.c

268

struct clk *clk;

drivers/net/wireless/ralink/rt2x00/rt2800soc.c

282

clk = devm_clk_get_optional(&pdev->dev, NULL);

drivers/net/wireless/ralink/rt2x00/rt2800soc.c

283

if (IS_ERR(clk))

drivers/net/wireless/ralink/rt2x00/rt2800soc.c

284

return PTR_ERR(clk);

drivers/net/wireless/ralink/rt2x00/rt2800soc.c

305

rt2x00dev->clk = clk;

drivers/net/wireless/ralink/rt2x00/rt2x00.h

1016

struct clk *clk;

drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h

1019

__le16 clk;

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

2907

u32 clk = 0x0;

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

2913

clk = 0x1;

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

2917

clk = 0x2;

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

2925

B_P0_TSSI_ADC_CLK, clk);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

2931

B_P1_TSSI_ADC_CLK, clk);

drivers/net/wireless/st/cw1200/fwio.h

34

u32 cw1200_dpll_from_clk(u16 clk);

drivers/net/wireless/st/cw1200/sta.c

1096

u16 clk = le16_to_cpu(*((__le16 *)(p + 2)));

drivers/net/wireless/st/cw1200/sta.c

1097

if (clk != priv->hw_refclk)

drivers/net/wireless/st/cw1200/sta.c

1099

clk, priv->hw_refclk);

drivers/net/wireless/ti/wl12xx/main.c

1017

ret = wlcore_write32(wl, WL12XX_PLL_PARAMETERS, clk);

drivers/net/wireless/ti/wl12xx/main.c

1083

u32 clk;

drivers/net/wireless/ti/wl12xx/main.c

1111

ret = wlcore_read32(wl, WL12XX_DRPW_SCRATCH_START, &clk);

drivers/net/wireless/ti/wl12xx/main.c

1115

wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk);

drivers/net/wireless/ti/wl12xx/main.c

1118

clk |= ((selected_clock & 0x3) << 1) << 4;

drivers/net/wireless/ti/wl12xx/main.c

1120

clk |= (priv->ref_clock << 1) << 4;

drivers/net/wireless/ti/wl12xx/main.c

1122

ret = wlcore_write32(wl, WL12XX_DRPW_SCRATCH_START, clk);

drivers/net/wireless/ti/wl12xx/main.c

863

static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)

drivers/net/wireless/ti/wl12xx/main.c

889

input_freq = (clk & 1) + 1;

drivers/net/wireless/ti/wl12xx/main.c

963

u32 clk;

drivers/net/wireless/ti/wl12xx/main.c

973

clk = 0x3;

drivers/net/wireless/ti/wl12xx/main.c

978

clk = 0x5;

drivers/nfc/nfcmrvl/fw_dnld.c

201

&priv->fw_dnld.binary_config->i2c.clk,

drivers/nfc/nfcmrvl/fw_dnld.c

208

&priv->fw_dnld.binary_config->spi.clk,

drivers/nfc/nfcmrvl/fw_dnld.h

33

uint32_t clk;

drivers/nfc/nfcmrvl/fw_dnld.h

37

uint32_t clk;

drivers/nfc/nfcmrvl/spi.c

96

drv_data->nci_spi->xfer_speed_hz = config->clk;

drivers/nfc/s3fwrn5/i2c.c

217

phy->clk = devm_clk_get_optional_enabled(&client->dev, NULL);

drivers/nfc/s3fwrn5/i2c.c

218

if (IS_ERR(phy->clk))

drivers/nfc/s3fwrn5/i2c.c

219

return dev_err_probe(&client->dev, PTR_ERR(phy->clk),

drivers/nfc/s3fwrn5/i2c.c

26

struct clk *clk;

drivers/nvmem/imx-iim.c

114

iim->clk = devm_clk_get(dev, NULL);

drivers/nvmem/imx-iim.c

115

if (IS_ERR(iim->clk))

drivers/nvmem/imx-iim.c

116

return PTR_ERR(iim->clk);

drivers/nvmem/imx-iim.c

29

struct clk *clk;

drivers/nvmem/imx-iim.c

39

ret = clk_prepare_enable(iim->clk);

drivers/nvmem/imx-iim.c

50

clk_disable_unprepare(iim->clk);

drivers/nvmem/imx-ocotp.c

182

ret = clk_prepare_enable(priv->clk);

drivers/nvmem/imx-ocotp.c

216

clk_disable_unprepare(priv->clk);

drivers/nvmem/imx-ocotp.c

274

clk_rate = clk_get_rate(priv->clk);

drivers/nvmem/imx-ocotp.c

301

clk_rate = clk_get_rate(priv->clk);

drivers/nvmem/imx-ocotp.c

331

ret = clk_prepare_enable(priv->clk);

drivers/nvmem/imx-ocotp.c

475

clk_disable_unprepare(priv->clk);

drivers/nvmem/imx-ocotp.c

612

priv->clk = devm_clk_get(dev, NULL);

drivers/nvmem/imx-ocotp.c

613

if (IS_ERR(priv->clk))

drivers/nvmem/imx-ocotp.c

614

return PTR_ERR(priv->clk);

drivers/nvmem/imx-ocotp.c

625

clk_prepare_enable(priv->clk);

drivers/nvmem/imx-ocotp.c

627

clk_disable_unprepare(priv->clk);

drivers/nvmem/imx-ocotp.c

82

struct clk *clk;

drivers/nvmem/jz4780-efuse.c

164

efuse->clk = devm_clk_get(&pdev->dev, NULL);

drivers/nvmem/jz4780-efuse.c

165

if (IS_ERR(efuse->clk))

drivers/nvmem/jz4780-efuse.c

166

return PTR_ERR(efuse->clk);

drivers/nvmem/jz4780-efuse.c

168

ret = clk_prepare_enable(efuse->clk);

drivers/nvmem/jz4780-efuse.c

174

efuse->clk);

drivers/nvmem/jz4780-efuse.c

178

clk_rate = clk_get_rate(efuse->clk);

drivers/nvmem/jz4780-efuse.c

65

struct clk *clk;

drivers/nvmem/lpc18xx_eeprom.c

185

eeprom->clk = devm_clk_get(&pdev->dev, "eeprom");

drivers/nvmem/lpc18xx_eeprom.c

186

if (IS_ERR(eeprom->clk)) {

drivers/nvmem/lpc18xx_eeprom.c

188

return PTR_ERR(eeprom->clk);

drivers/nvmem/lpc18xx_eeprom.c

191

ret = clk_prepare_enable(eeprom->clk);

drivers/nvmem/lpc18xx_eeprom.c

217

clk_rate = clk_get_rate(eeprom->clk);

drivers/nvmem/lpc18xx_eeprom.c

247

clk_disable_unprepare(eeprom->clk);

drivers/nvmem/lpc18xx_eeprom.c

256

clk_disable_unprepare(eeprom->clk);

drivers/nvmem/lpc18xx_eeprom.c

45

struct clk *clk;

drivers/nvmem/meson-efuse.c

53

struct clk *clk;

drivers/nvmem/meson-efuse.c

67

clk = devm_clk_get_enabled(dev, NULL);

drivers/nvmem/meson-efuse.c

68

if (IS_ERR(clk))

drivers/nvmem/meson-efuse.c

69

return dev_err_probe(dev, PTR_ERR(clk), "failed to get efuse gate");

drivers/nvmem/meson-mx-efuse.c

45

struct clk *core_clk;

drivers/nvmem/mxs-ocotp.c

103

clk_disable(otp->clk);

drivers/nvmem/mxs-ocotp.c

158

otp->clk = devm_clk_get(&pdev->dev, NULL);

drivers/nvmem/mxs-ocotp.c

159

if (IS_ERR(otp->clk))

drivers/nvmem/mxs-ocotp.c

160

return PTR_ERR(otp->clk);

drivers/nvmem/mxs-ocotp.c

162

ret = clk_prepare(otp->clk);

drivers/nvmem/mxs-ocotp.c

168

ret = devm_add_action_or_reset(&pdev->dev, mxs_ocotp_action, otp->clk);

drivers/nvmem/mxs-ocotp.c

32

struct clk *clk;

drivers/nvmem/mxs-ocotp.c

66

ret = clk_enable(otp->clk);

drivers/nvmem/qfprom.c

78

struct clk *secclk;

drivers/nvmem/rockchip-efuse.c

104

ret = clk_prepare_enable(efuse->clk);

drivers/nvmem/rockchip-efuse.c

145

clk_disable_unprepare(efuse->clk);

drivers/nvmem/rockchip-efuse.c

159

ret = clk_prepare_enable(efuse->clk);

drivers/nvmem/rockchip-efuse.c

173

clk_disable_unprepare(efuse->clk);

drivers/nvmem/rockchip-efuse.c

201

clk_disable_unprepare(efuse->clk);

drivers/nvmem/rockchip-efuse.c

276

efuse->clk = devm_clk_get(dev, "pclk_efuse");

drivers/nvmem/rockchip-efuse.c

277

if (IS_ERR(efuse->clk))

drivers/nvmem/rockchip-efuse.c

278

return PTR_ERR(efuse->clk);

drivers/nvmem/rockchip-efuse.c

52

struct clk *clk;

drivers/nvmem/rockchip-efuse.c

62

ret = clk_prepare_enable(efuse->clk);

drivers/nvmem/rockchip-efuse.c

90

clk_disable_unprepare(efuse->clk);

drivers/nvmem/sprd-efuse.c

307

ret = clk_prepare_enable(efuse->clk);

drivers/nvmem/sprd-efuse.c

317

clk_disable_unprepare(efuse->clk);

drivers/nvmem/sprd-efuse.c

335

ret = clk_prepare_enable(efuse->clk);

drivers/nvmem/sprd-efuse.c

354

clk_disable_unprepare(efuse->clk);

drivers/nvmem/sprd-efuse.c

396

efuse->clk = devm_clk_get(&pdev->dev, "enable");

drivers/nvmem/sprd-efuse.c

397

if (IS_ERR(efuse->clk)) {

drivers/nvmem/sprd-efuse.c

399

return PTR_ERR(efuse->clk);

drivers/nvmem/sprd-efuse.c

65

struct clk *clk;

drivers/nvmem/sunplus-ocotp.c

125

ret = clk_enable(otp->clk);

drivers/nvmem/sunplus-ocotp.c

141

clk_disable(otp->clk);

drivers/nvmem/sunplus-ocotp.c

178

otp->clk = devm_clk_get(&pdev->dev, NULL);

drivers/nvmem/sunplus-ocotp.c

179

if (IS_ERR(otp->clk))

drivers/nvmem/sunplus-ocotp.c

180

return dev_err_probe(&pdev->dev, PTR_ERR(otp->clk),

drivers/nvmem/sunplus-ocotp.c

183

ret = clk_prepare(otp->clk);

drivers/nvmem/sunplus-ocotp.c

207

clk_unprepare(otp->clk);

drivers/nvmem/sunplus-ocotp.c

67

struct clk *clk;

drivers/nvmem/vf610-ocotp.c

120

clk_rate = clk_get_rate(ocotp_dev->clk);

drivers/nvmem/vf610-ocotp.c

226

ocotp_dev->clk = devm_clk_get(dev, NULL);

drivers/nvmem/vf610-ocotp.c

227

if (IS_ERR(ocotp_dev->clk)) {

drivers/nvmem/vf610-ocotp.c

229

PTR_ERR(ocotp_dev->clk));

drivers/nvmem/vf610-ocotp.c

230

return PTR_ERR(ocotp_dev->clk);

drivers/nvmem/vf610-ocotp.c

91

struct clk *clk;

drivers/opp/core.c

1075

ret = clk_set_rate(opp_table->clk, freq);

drivers/opp/core.c

1245

if (!IS_ERR(opp_table->clk)) {

drivers/opp/core.c

1246

freq = clk_get_rate(opp_table->clk);

drivers/opp/core.c

1440

freq = clk_round_rate(opp_table->clk, target_freq);

drivers/opp/core.c

1543

opp_table->clk = ERR_PTR(-ENODEV);

drivers/opp/core.c

1591

if (!getclk || IS_ERR(opp_table) || !IS_ERR(opp_table->clk) ||

drivers/opp/core.c

1596

opp_table->clk = clk_get(dev, NULL);

drivers/opp/core.c

1598

ret = PTR_ERR_OR_ZERO(opp_table->clk);

drivers/opp/core.c

1723

if (!IS_ERR(opp_table->clk))

drivers/opp/core.c

1724

clk_put(opp_table->clk);

drivers/opp/core.c

2344

struct clk *clk;

drivers/opp/core.c

2371

clk = clk_get(dev, names[i]);

drivers/opp/core.c

2372

if (IS_ERR(clk)) {

drivers/opp/core.c

2373

ret = dev_err_probe(dev, PTR_ERR(clk),

drivers/opp/core.c

2379

opp_table->clks[i] = clk;

drivers/opp/core.c

2402

opp_table->clk = opp_table->clks[0];

drivers/opp/core.c

2418

opp_table->clk = ERR_PTR(-ENODEV);

drivers/opp/opp.h

23

struct clk;

drivers/opp/opp.h

235

struct clk **clks;

drivers/opp/opp.h

236

struct clk *clk;

drivers/pci/controller/cadence/pci-j721e.c

58

struct clk *refclk;

drivers/pci/controller/dwc/pci-dra7xx.c

738

dra7xx->clk = devm_clk_get_optional(dev, NULL);

drivers/pci/controller/dwc/pci-dra7xx.c

739

if (IS_ERR(dra7xx->clk))

drivers/pci/controller/dwc/pci-dra7xx.c

740

return dev_err_probe(dev, PTR_ERR(dra7xx->clk),

drivers/pci/controller/dwc/pci-dra7xx.c

743

ret = clk_prepare_enable(dra7xx->clk);

drivers/pci/controller/dwc/pci-dra7xx.c

938

clk_disable_unprepare(dra7xx->clk);

drivers/pci/controller/dwc/pci-dra7xx.c

94

struct clk *clk;

drivers/pci/controller/dwc/pci-imx6.c

530

phy_rate = clk_get_rate(clks[i].clk);

drivers/pci/controller/dwc/pci-meson.c

178

struct clk *clk = data;

drivers/pci/controller/dwc/pci-meson.c

180

clk_disable_unprepare(clk);

drivers/pci/controller/dwc/pci-meson.c

183

static inline struct clk *meson_pcie_probe_clock(struct device *dev,

drivers/pci/controller/dwc/pci-meson.c

186

struct clk *clk;

drivers/pci/controller/dwc/pci-meson.c

189

clk = devm_clk_get(dev, id);

drivers/pci/controller/dwc/pci-meson.c

190

if (IS_ERR(clk))

drivers/pci/controller/dwc/pci-meson.c

191

return clk;

drivers/pci/controller/dwc/pci-meson.c

194

ret = clk_set_rate(clk, rate);

drivers/pci/controller/dwc/pci-meson.c

201

ret = clk_prepare_enable(clk);

drivers/pci/controller/dwc/pci-meson.c

207

devm_add_action_or_reset(dev, meson_pcie_disable_clock, clk);

drivers/pci/controller/dwc/pci-meson.c

209

return clk;

drivers/pci/controller/dwc/pci-meson.c

225

res->clk = meson_pcie_probe_clock(dev, "pclk", 0);

drivers/pci/controller/dwc/pci-meson.c

226

if (IS_ERR(res->clk))

drivers/pci/controller/dwc/pci-meson.c

227

return PTR_ERR(res->clk);

drivers/pci/controller/dwc/pci-meson.c

55

struct clk *clk;

drivers/pci/controller/dwc/pci-meson.c

56

struct clk *port_clk;

drivers/pci/controller/dwc/pci-meson.c

57

struct clk *general_clk;

drivers/pci/controller/dwc/pcie-armada8k.c

287

pcie->clk = devm_clk_get(dev, NULL);

drivers/pci/controller/dwc/pcie-armada8k.c

288

if (IS_ERR(pcie->clk))

drivers/pci/controller/dwc/pcie-armada8k.c

289

return PTR_ERR(pcie->clk);

drivers/pci/controller/dwc/pcie-armada8k.c

291

ret = clk_prepare_enable(pcie->clk);

drivers/pci/controller/dwc/pcie-armada8k.c

31

struct clk *clk;

drivers/pci/controller/dwc/pcie-armada8k.c

32

struct clk *clk_reg;

drivers/pci/controller/dwc/pcie-armada8k.c

331

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/dwc/pcie-bt1.c

344

if (!btpci->dw.app_clks[bt1_pcie_app_clks[i]].clk) {

drivers/pci/controller/dwc/pcie-bt1.c

351

if (!btpci->dw.core_clks[bt1_pcie_core_clks[i]].clk) {

drivers/pci/controller/dwc/pcie-fu740.c

37

struct clk *pcie_aux;

drivers/pci/controller/dwc/pcie-histb.c

54

struct clk *aux_clk;

drivers/pci/controller/dwc/pcie-histb.c

55

struct clk *pipe_clk;

drivers/pci/controller/dwc/pcie-histb.c

56

struct clk *sys_clk;

drivers/pci/controller/dwc/pcie-histb.c

57

struct clk *bus_clk;

drivers/pci/controller/dwc/pcie-intel-gw.c

67

struct clk *core_clk;

drivers/pci/controller/dwc/pcie-keembay.c

153

struct clk *clk = data;

drivers/pci/controller/dwc/pcie-keembay.c

155

clk_disable_unprepare(clk);

drivers/pci/controller/dwc/pcie-keembay.c

158

static inline struct clk *keembay_pcie_probe_clock(struct device *dev,

drivers/pci/controller/dwc/pcie-keembay.c

161

struct clk *clk;

drivers/pci/controller/dwc/pcie-keembay.c

164

clk = devm_clk_get(dev, id);

drivers/pci/controller/dwc/pcie-keembay.c

165

if (IS_ERR(clk))

drivers/pci/controller/dwc/pcie-keembay.c

166

return clk;

drivers/pci/controller/dwc/pcie-keembay.c

169

ret = clk_set_rate(clk, rate);

drivers/pci/controller/dwc/pcie-keembay.c

174

ret = clk_prepare_enable(clk);

drivers/pci/controller/dwc/pcie-keembay.c

178

ret = devm_add_action_or_reset(dev, keembay_pcie_disable_clock, clk);

drivers/pci/controller/dwc/pcie-keembay.c

182

return clk;

drivers/pci/controller/dwc/pcie-keembay.c

63

struct clk *clk_master;

drivers/pci/controller/dwc/pcie-keembay.c

64

struct clk *clk_aux;

drivers/pci/controller/dwc/pcie-kirin.c

129

struct clk *apb_sys_clk;

drivers/pci/controller/dwc/pcie-kirin.c

130

struct clk *apb_phy_clk;

drivers/pci/controller/dwc/pcie-kirin.c

131

struct clk *phy_ref_clk;

drivers/pci/controller/dwc/pcie-kirin.c

132

struct clk *aclk;

drivers/pci/controller/dwc/pcie-kirin.c

133

struct clk *aux_clk;

drivers/pci/controller/dwc/pcie-spear13xx.c

221

spear13xx_pcie->clk = devm_clk_get(dev, NULL);

drivers/pci/controller/dwc/pcie-spear13xx.c

222

if (IS_ERR(spear13xx_pcie->clk)) {

drivers/pci/controller/dwc/pcie-spear13xx.c

224

return PTR_ERR(spear13xx_pcie->clk);

drivers/pci/controller/dwc/pcie-spear13xx.c

226

ret = clk_prepare_enable(spear13xx_pcie->clk);

drivers/pci/controller/dwc/pcie-spear13xx.c

244

clk_disable_unprepare(spear13xx_pcie->clk);

drivers/pci/controller/dwc/pcie-spear13xx.c

28

struct clk *clk;

drivers/pci/controller/dwc/pcie-stm32-ep.c

103

ret = clk_prepare_enable(stm32_pcie->clk);

drivers/pci/controller/dwc/pcie-stm32-ep.c

112

clk_disable_unprepare(stm32_pcie->clk);

drivers/pci/controller/dwc/pcie-stm32-ep.c

259

stm32_pcie->clk = devm_clk_get(dev, NULL);

drivers/pci/controller/dwc/pcie-stm32-ep.c

26

struct clk *clk;

drivers/pci/controller/dwc/pcie-stm32-ep.c

260

if (IS_ERR(stm32_pcie->clk))

drivers/pci/controller/dwc/pcie-stm32-ep.c

261

return dev_err_probe(dev, PTR_ERR(stm32_pcie->clk),

drivers/pci/controller/dwc/pcie-stm32.c

120

ret = clk_prepare_enable(stm32_pcie->clk);

drivers/pci/controller/dwc/pcie-stm32.c

136

clk_disable_unprepare(stm32_pcie->clk);

drivers/pci/controller/dwc/pcie-stm32.c

271

stm32_pcie->clk = devm_clk_get(dev, NULL);

drivers/pci/controller/dwc/pcie-stm32.c

272

if (IS_ERR(stm32_pcie->clk))

drivers/pci/controller/dwc/pcie-stm32.c

273

return dev_err_probe(dev, PTR_ERR(stm32_pcie->clk),

drivers/pci/controller/dwc/pcie-stm32.c

294

ret = clk_prepare_enable(stm32_pcie->clk);

drivers/pci/controller/dwc/pcie-stm32.c

324

clk_disable_unprepare(stm32_pcie->clk);

drivers/pci/controller/dwc/pcie-stm32.c

342

clk_disable_unprepare(stm32_pcie->clk);

drivers/pci/controller/dwc/pcie-stm32.c

40

struct clk *clk;

drivers/pci/controller/dwc/pcie-stm32.c

88

clk_disable_unprepare(stm32_pcie->clk);

drivers/pci/controller/dwc/pcie-tegra194.c

245

struct clk *core_clk;

drivers/pci/controller/dwc/pcie-uniphier-ep.c

295

ret = clk_prepare_enable(priv->clk);

drivers/pci/controller/dwc/pcie-uniphier-ep.c

339

clk_disable_unprepare(priv->clk);

drivers/pci/controller/dwc/pcie-uniphier-ep.c

380

priv->clk = devm_clk_get(dev, "link");

drivers/pci/controller/dwc/pcie-uniphier-ep.c

381

if (IS_ERR(priv->clk))

drivers/pci/controller/dwc/pcie-uniphier-ep.c

382

return PTR_ERR(priv->clk);

drivers/pci/controller/dwc/pcie-uniphier-ep.c

75

struct clk *clk, *clk_gio;

drivers/pci/controller/dwc/pcie-uniphier.c

321

ret = clk_prepare_enable(pcie->clk);

drivers/pci/controller/dwc/pcie-uniphier.c

346

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/dwc/pcie-uniphier.c

374

pcie->clk = devm_clk_get(dev, NULL);

drivers/pci/controller/dwc/pcie-uniphier.c

375

if (IS_ERR(pcie->clk))

drivers/pci/controller/dwc/pcie-uniphier.c

376

return PTR_ERR(pcie->clk);

drivers/pci/controller/dwc/pcie-uniphier.c

67

struct clk *clk;

drivers/pci/controller/dwc/pcie-visconti.c

32

struct clk *refclk;

drivers/pci/controller/dwc/pcie-visconti.c

33

struct clk *coreclk;

drivers/pci/controller/dwc/pcie-visconti.c

34

struct clk *auxclk;

drivers/pci/controller/pci-ftpci100.c

119

struct clk *bus_clk;

drivers/pci/controller/pci-ftpci100.c

415

struct clk *clk;

drivers/pci/controller/pci-ftpci100.c

431

clk = devm_clk_get_enabled(dev, "PCLK");

drivers/pci/controller/pci-ftpci100.c

432

if (IS_ERR(clk))

drivers/pci/controller/pci-ftpci100.c

433

return PTR_ERR(clk);

drivers/pci/controller/pci-mvebu.c

111

struct clk *clk;

drivers/pci/controller/pci-mvebu.c

1236

clk_put(port->clk);

drivers/pci/controller/pci-mvebu.c

1337

port->clk = of_clk_get_by_name(child, NULL);

drivers/pci/controller/pci-mvebu.c

1338

if (IS_ERR(port->clk)) {

drivers/pci/controller/pci-mvebu.c

1371

ret = clk_prepare_enable(port->clk);

drivers/pci/controller/pci-mvebu.c

1398

clk_disable_unprepare(port->clk);

drivers/pci/controller/pci-tegra.c

334

struct clk *pex_clk;

drivers/pci/controller/pci-tegra.c

335

struct clk *afi_clk;

drivers/pci/controller/pci-tegra.c

336

struct clk *pll_e;

drivers/pci/controller/pci-tegra.c

337

struct clk *cml_clk;

drivers/pci/controller/pci-v3-semi.c

712

struct clk *clk;

drivers/pci/controller/pci-v3-semi.c

727

clk = devm_clk_get(dev, NULL);

drivers/pci/controller/pci-v3-semi.c

728

if (IS_ERR(clk)) {

drivers/pci/controller/pci-v3-semi.c

730

return PTR_ERR(clk);

drivers/pci/controller/pci-v3-semi.c

732

ret = clk_prepare_enable(clk);

drivers/pci/controller/pci-xgene.c

326

port->clk = clk_get(dev, NULL);

drivers/pci/controller/pci-xgene.c

327

if (IS_ERR(port->clk)) {

drivers/pci/controller/pci-xgene.c

332

rc = clk_prepare_enable(port->clk);

drivers/pci/controller/pci-xgene.c

63

struct clk *clk;

drivers/pci/controller/pcie-aspeed.c

164

struct clk *clk;

drivers/pci/controller/pcie-aspeed.c

757

ret = clk_prepare_enable(port->clk);

drivers/pci/controller/pcie-aspeed.c

928

port->clk = devm_get_clk_from_child(dev, node, NULL);

drivers/pci/controller/pcie-aspeed.c

929

if (IS_ERR(port->clk))

drivers/pci/controller/pcie-aspeed.c

930

return dev_err_probe(dev, PTR_ERR(port->clk),

drivers/pci/controller/pcie-brcmstb.c

1686

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

1699

ret = clk_prepare_enable(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

1764

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

1889

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

2070

pcie->clk = devm_clk_get_optional(&pdev->dev, "sw_pcie");

drivers/pci/controller/pcie-brcmstb.c

2071

if (IS_ERR(pcie->clk))

drivers/pci/controller/pcie-brcmstb.c

2072

return PTR_ERR(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

2095

ret = clk_prepare_enable(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

2107

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

2117

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

2125

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

2132

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/pcie-brcmstb.c

327

struct clk *clk;

drivers/pci/controller/pcie-mediatek.c

202

struct clk *sys_ck;

drivers/pci/controller/pcie-mediatek.c

203

struct clk *ahb_ck;

drivers/pci/controller/pcie-mediatek.c

204

struct clk *axi_ck;

drivers/pci/controller/pcie-mediatek.c

205

struct clk *aux_ck;

drivers/pci/controller/pcie-mediatek.c

206

struct clk *obff_ck;

drivers/pci/controller/pcie-mediatek.c

207

struct clk *pipe_ck;

drivers/pci/controller/pcie-mediatek.c

230

struct clk *free_ck;

drivers/pci/controller/pcie-mt7621.c

216

port->clk = devm_get_clk_from_child(dev, node, NULL);

drivers/pci/controller/pcie-mt7621.c

217

if (IS_ERR(port->clk)) {

drivers/pci/controller/pcie-mt7621.c

219

return PTR_ERR(port->clk);

drivers/pci/controller/pcie-mt7621.c

441

err = clk_prepare_enable(port->clk);

drivers/pci/controller/pcie-mt7621.c

82

struct clk *clk;

drivers/pci/controller/pcie-rcar-host.c

51

struct clk *bus_clk;

drivers/pci/controller/pcie-rzg3s-host.c

224

struct clk *refclk;

drivers/pci/controller/pcie-xilinx-nwl.c

172

struct clk *clk;

drivers/pci/controller/pcie-xilinx-nwl.c

852

pcie->clk = devm_clk_get(dev, NULL);

drivers/pci/controller/pcie-xilinx-nwl.c

853

if (IS_ERR(pcie->clk))

drivers/pci/controller/pcie-xilinx-nwl.c

854

return PTR_ERR(pcie->clk);

drivers/pci/controller/pcie-xilinx-nwl.c

856

err = clk_prepare_enable(pcie->clk);

drivers/pci/controller/pcie-xilinx-nwl.c

898

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/pcie-xilinx-nwl.c

907

clk_disable_unprepare(pcie->clk);

drivers/pci/controller/plda/pcie-microchip-host.c

504

struct clk *clk = data;

drivers/pci/controller/plda/pcie-microchip-host.c

506

clk_disable_unprepare(clk);

drivers/pci/controller/plda/pcie-microchip-host.c

509

static inline struct clk *mc_pcie_init_clk(struct device *dev, const char *id)

drivers/pci/controller/plda/pcie-microchip-host.c

511

struct clk *clk;

drivers/pci/controller/plda/pcie-microchip-host.c

514

clk = devm_clk_get_optional(dev, id);

drivers/pci/controller/plda/pcie-microchip-host.c

515

if (IS_ERR(clk))

drivers/pci/controller/plda/pcie-microchip-host.c

516

return clk;

drivers/pci/controller/plda/pcie-microchip-host.c

517

if (!clk)

drivers/pci/controller/plda/pcie-microchip-host.c

518

return clk;

drivers/pci/controller/plda/pcie-microchip-host.c

520

ret = clk_prepare_enable(clk);

drivers/pci/controller/plda/pcie-microchip-host.c

524

devm_add_action_or_reset(dev, mc_pcie_deinit_clk, clk);

drivers/pci/controller/plda/pcie-microchip-host.c

526

return clk;

drivers/pci/controller/plda/pcie-microchip-host.c

532

struct clk *fic;

drivers/pci/pwrctrl/slot.c

22

struct clk *clk;

drivers/pci/pwrctrl/slot.c

43

return clk_prepare_enable(slot->clk);

drivers/pci/pwrctrl/slot.c

57

clk_disable_unprepare(slot->clk);

drivers/pci/pwrctrl/slot.c

97

slot->clk = devm_clk_get_optional(dev, NULL);

drivers/pci/pwrctrl/slot.c

98

if (IS_ERR(slot->clk)) {

drivers/pci/pwrctrl/slot.c

99

return dev_err_probe(dev, PTR_ERR(slot->clk),

drivers/pcmcia/pxa2xx_base.c

161

unsigned long clk = clk_get_rate(skt->clk) / 10000;

drivers/pcmcia/pxa2xx_base.c

168

pxa2xx_pcmcia_mcmem(sock, timing.mem, clk),

drivers/pcmcia/pxa2xx_base.c

169

pxa2xx_pcmcia_mcatt(sock, timing.attr, clk),

drivers/pcmcia/pxa2xx_base.c

170

pxa2xx_pcmcia_mcio(sock, timing.io, clk));

drivers/pcmcia/pxa2xx_base.c

263

struct clk *clk;

drivers/pcmcia/pxa2xx_base.c

277

clk = devm_clk_get(&dev->dev, NULL);

drivers/pcmcia/pxa2xx_base.c

278

if (IS_ERR(clk))

drivers/pcmcia/pxa2xx_base.c

295

skt->clk = clk;

drivers/pcmcia/sa1100_generic.c

151

skt->clk = devm_clk_get(dev, NULL);

drivers/pcmcia/sa1100_generic.c

152

if (IS_ERR(skt->clk))

drivers/pcmcia/sa1100_generic.c

153

return PTR_ERR(skt->clk);

drivers/pcmcia/sa1111_generic.c

140

struct clk *clk;

drivers/pcmcia/sa1111_generic.c

143

clk = devm_clk_get(&dev->dev, NULL);

drivers/pcmcia/sa1111_generic.c

144

if (IS_ERR(clk))

drivers/pcmcia/sa1111_generic.c

145

return PTR_ERR(clk);

drivers/pcmcia/sa1111_generic.c

161

s->soc.clk = clk;

drivers/pcmcia/sa11xx_base.c

138

unsigned long clk = clk_get_rate(skt->clk);

drivers/pcmcia/sa11xx_base.c

140

return sa1100_pcmcia_set_mecr(skt, clk / 1000);

drivers/pcmcia/sa11xx_base.c

147

unsigned int clock = clk_get_rate(skt->clk) / 1000;

drivers/pcmcia/sa11xx_base.c

223

struct clk *clk;

drivers/pcmcia/sa11xx_base.c

225

clk = devm_clk_get(dev, NULL);

drivers/pcmcia/sa11xx_base.c

226

if (IS_ERR(clk))

drivers/pcmcia/sa11xx_base.c

227

return PTR_ERR(clk);

drivers/pcmcia/sa11xx_base.c

242

skt->clk = clk;

drivers/pcmcia/soc_common.c

157

clk_disable_unprepare(skt->clk);

drivers/pcmcia/soc_common.c

193

ret = clk_prepare_enable(skt->clk);

drivers/pcmcia/soc_common.c

200

clk_disable_unprepare(skt->clk);

drivers/peci/controller/peci-aspeed.c

131

struct clk *clk;

drivers/peci/controller/peci-aspeed.c

194

ret = clk_set_rate(priv->clk, priv->clk_frequency);

drivers/peci/controller/peci-aspeed.c

412

static struct clk *devm_aspeed_peci_register_clk_div(struct device *dev, struct clk *parent,

drivers/peci/controller/peci-aspeed.c

442

return peci_clk->hw.clk;

drivers/peci/controller/peci-aspeed.c

499

static int devm_aspeed_peci_clk_enable(struct device *dev, struct clk *clk)

drivers/peci/controller/peci-aspeed.c

503

ret = clk_prepare_enable(clk);

drivers/peci/controller/peci-aspeed.c

507

return devm_add_action_or_reset(dev, aspeed_peci_clk_release, clk);

drivers/peci/controller/peci-aspeed.c

514

struct clk *ref_clk;

drivers/peci/controller/peci-aspeed.c

557

priv->clk = devm_aspeed_peci_register_clk_div(priv->dev, ref_clk, priv);

drivers/peci/controller/peci-aspeed.c

558

if (IS_ERR(priv->clk))

drivers/peci/controller/peci-aspeed.c

559

return dev_err_probe(priv->dev, PTR_ERR(priv->clk), "cannot register clock\n");

drivers/peci/controller/peci-aspeed.c

561

ret = clk_set_rate(priv->clk, priv->clk_frequency);

drivers/peci/controller/peci-aspeed.c

565

ret = devm_aspeed_peci_clk_enable(priv->dev, priv->clk);

drivers/peci/controller/peci-npcm.c

183

priv->clk = devm_clk_get_enabled(priv->dev, NULL);

drivers/peci/controller/peci-npcm.c

184

if (IS_ERR(priv->clk)) {

drivers/peci/controller/peci-npcm.c

186

return PTR_ERR(priv->clk);

drivers/peci/controller/peci-npcm.c

69

struct clk *clk;

drivers/phy/allwinner/phy-sun4i-usb.c

123

struct clk *clk;

drivers/phy/allwinner/phy-sun4i-usb.c

124

struct clk *clk2;

drivers/phy/allwinner/phy-sun4i-usb.c

263

ret = clk_prepare_enable(phy->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

269

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

276

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

284

ret = clk_prepare_enable(phy2->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

288

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

294

clk_disable_unprepare(phy2->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

297

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

308

clk_disable_unprepare(phy2->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

311

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

390

clk_disable_unprepare(phy2->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

397

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun4i-usb.c

816

phy->clk = devm_clk_get(dev, name);

drivers/phy/allwinner/phy-sun4i-usb.c

817

if (IS_ERR(phy->clk)) {

drivers/phy/allwinner/phy-sun4i-usb.c

819

return PTR_ERR(phy->clk);

drivers/phy/allwinner/phy-sun50i-usb3.c

103

ret = clk_prepare_enable(phy->clk);

drivers/phy/allwinner/phy-sun50i-usb3.c

109

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun50i-usb3.c

122

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun50i-usb3.c

143

phy->clk = devm_clk_get(dev, NULL);

drivers/phy/allwinner/phy-sun50i-usb3.c

144

if (IS_ERR(phy->clk)) {

drivers/phy/allwinner/phy-sun50i-usb3.c

145

if (PTR_ERR(phy->clk) != -EPROBE_DEFER)

drivers/phy/allwinner/phy-sun50i-usb3.c

147

return PTR_ERR(phy->clk);

drivers/phy/allwinner/phy-sun50i-usb3.c

59

struct clk *clk;

drivers/phy/allwinner/phy-sun6i-mipi-dphy.c

188

struct clk *bus_clk;

drivers/phy/allwinner/phy-sun6i-mipi-dphy.c

189

struct clk *mod_clk;

drivers/phy/allwinner/phy-sun9i-usb.c

103

clk_disable_unprepare(phy->clk);

drivers/phy/allwinner/phy-sun9i-usb.c

127

phy->clk = devm_clk_get(dev, "hsic_480M");

drivers/phy/allwinner/phy-sun9i-usb.c

128

if (IS_ERR(phy->clk)) {

drivers/phy/allwinner/phy-sun9i-usb.c

130

return PTR_ERR(phy->clk);

drivers/phy/allwinner/phy-sun9i-usb.c

145

phy->clk = devm_clk_get(dev, "phy");

drivers/phy/allwinner/phy-sun9i-usb.c

146

if (IS_ERR(phy->clk)) {

drivers/phy/allwinner/phy-sun9i-usb.c

148

return PTR_ERR(phy->clk);

drivers/phy/allwinner/phy-sun9i-usb.c

39

struct clk *clk;

drivers/phy/allwinner/phy-sun9i-usb.c

40

struct clk *hsic_clk;

drivers/phy/allwinner/phy-sun9i-usb.c

71

ret = clk_prepare_enable(phy->clk);

drivers/phy/allwinner/phy-sun9i-usb.c

90

clk_disable_unprepare(phy->clk);

drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c

170

struct clk *clk;

drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c

359

priv->clk = devm_clk_get(dev, "pclk");

drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c

360

if (IS_ERR(priv->clk))

drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c

361

return PTR_ERR(priv->clk);

drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c

371

ret = clk_prepare_enable(priv->clk);

drivers/phy/amlogic/phy-meson-g12a-usb2.c

157

struct clk *clk;

drivers/phy/amlogic/phy-meson-g12a-usb2.c

175

ret = clk_prepare_enable(priv->clk);

drivers/phy/amlogic/phy-meson-g12a-usb2.c

181

clk_disable_unprepare(priv->clk);

drivers/phy/amlogic/phy-meson-g12a-usb2.c

290

clk_disable_unprepare(priv->clk);

drivers/phy/amlogic/phy-meson-g12a-usb2.c

329

priv->clk = devm_clk_get(dev, "xtal");

drivers/phy/amlogic/phy-meson-g12a-usb2.c

330

if (IS_ERR(priv->clk))

drivers/phy/amlogic/phy-meson-g12a-usb2.c

331

return PTR_ERR(priv->clk);

drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c

58

struct clk *clk_ref;

drivers/phy/amlogic/phy-meson-gxl-usb2.c

116

ret = clk_prepare_enable(priv->clk);

drivers/phy/amlogic/phy-meson-gxl-usb2.c

129

clk_disable_unprepare(priv->clk);

drivers/phy/amlogic/phy-meson-gxl-usb2.c

259

priv->clk = devm_clk_get_optional(dev, "phy");

drivers/phy/amlogic/phy-meson-gxl-usb2.c

260

if (IS_ERR(priv->clk))

drivers/phy/amlogic/phy-meson-gxl-usb2.c

261

return PTR_ERR(priv->clk);

drivers/phy/amlogic/phy-meson-gxl-usb2.c

96

struct clk *clk;

drivers/phy/amlogic/phy-meson8-hdmi-tx.c

37

struct clk *tmds_clk;

drivers/phy/amlogic/phy-meson8b-usb2.c

126

struct clk *clk_usb_general;

drivers/phy/amlogic/phy-meson8b-usb2.c

127

struct clk *clk_usb;

drivers/phy/broadcom/phy-bcm-ns-usb2.c

23

struct clk *ref_clk;

drivers/phy/broadcom/phy-bcm63xx-usbh.c

100

struct clk *usb_ref_clk;

drivers/phy/broadcom/phy-bcm63xx-usbh.c

99

struct clk *usbh_clk;

drivers/phy/broadcom/phy-brcm-usb.c

66

struct clk *usb_20_clk;

drivers/phy/broadcom/phy-brcm-usb.c

67

struct clk *usb_30_clk;

drivers/phy/broadcom/phy-brcm-usb.c

68

struct clk *suspend_clk;

drivers/phy/cadence/cdns-dphy.c

103

struct clk *psm_clk;

drivers/phy/cadence/cdns-dphy.c

104

struct clk *pll_ref_clk;

drivers/phy/cadence/phy-cadence-salvo.c

136

struct clk *clk;

drivers/phy/cadence/phy-cadence-salvo.c

253

ret = clk_prepare_enable(salvo_phy->clk);

drivers/phy/cadence/phy-cadence-salvo.c

283

clk_disable_unprepare(salvo_phy->clk);

drivers/phy/cadence/phy-cadence-salvo.c

292

return clk_prepare_enable(salvo_phy->clk);

drivers/phy/cadence/phy-cadence-salvo.c

299

clk_disable_unprepare(salvo_phy->clk);

drivers/phy/cadence/phy-cadence-salvo.c

343

salvo_phy->clk = devm_clk_get_optional(dev, "salvo_phy_clk");

drivers/phy/cadence/phy-cadence-salvo.c

344

if (IS_ERR(salvo_phy->clk))

drivers/phy/cadence/phy-cadence-salvo.c

345

return PTR_ERR(salvo_phy->clk);

drivers/phy/cadence/phy-cadence-sierra.c

1157

struct clk *clk;

drivers/phy/cadence/phy-cadence-sierra.c

1160

clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div");

drivers/phy/cadence/phy-cadence-sierra.c

1161

if (IS_ERR(clk)) {

drivers/phy/cadence/phy-cadence-sierra.c

1163

ret = PTR_ERR(clk);

drivers/phy/cadence/phy-cadence-sierra.c

1166

sp->input_clks[CMN_REFCLK_DIG_DIV] = clk;

drivers/phy/cadence/phy-cadence-sierra.c

1168

clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div");

drivers/phy/cadence/phy-cadence-sierra.c

1169

if (IS_ERR(clk)) {

drivers/phy/cadence/phy-cadence-sierra.c

1171

ret = PTR_ERR(clk);

drivers/phy/cadence/phy-cadence-sierra.c

1174

sp->input_clks[CMN_REFCLK1_DIG_DIV] = clk;

drivers/phy/cadence/phy-cadence-sierra.c

1182

struct clk *clk;

drivers/phy/cadence/phy-cadence-sierra.c

1185

clk = devm_clk_get_optional(dev, "phy_clk");

drivers/phy/cadence/phy-cadence-sierra.c

1186

if (IS_ERR(clk)) {

drivers/phy/cadence/phy-cadence-sierra.c

1188

return PTR_ERR(clk);

drivers/phy/cadence/phy-cadence-sierra.c

1190

sp->input_clks[PHY_CLK] = clk;

drivers/phy/cadence/phy-cadence-sierra.c

405

struct clk *input_clks[CDNS_SIERRA_INPUT_CLOCKS];

drivers/phy/cadence/phy-cadence-sierra.c

410

struct clk *pll_clks[SIERRA_NUM_CMN_PLLC];

drivers/phy/cadence/phy-cadence-torrent.c

1863

struct clk *clk;

drivers/phy/cadence/phy-cadence-torrent.c

1873

clk = devm_clk_get_optional(dev, "phy_en_refclk");

drivers/phy/cadence/phy-cadence-torrent.c

1874

if (IS_ERR(clk)) {

drivers/phy/cadence/phy-cadence-torrent.c

1876

return PTR_ERR(clk);

drivers/phy/cadence/phy-cadence-torrent.c

1881

if (clk) {

drivers/phy/cadence/phy-cadence-torrent.c

1882

parent_name = __clk_get_name(clk);

drivers/phy/cadence/phy-cadence-torrent.c

1946

struct clk *clk;

drivers/phy/cadence/phy-cadence-torrent.c

1956

clk = devm_clk_get_optional(dev, "phy_en_refclk");

drivers/phy/cadence/phy-cadence-torrent.c

1957

if (IS_ERR(clk)) {

drivers/phy/cadence/phy-cadence-torrent.c

1959

return PTR_ERR(clk);

drivers/phy/cadence/phy-cadence-torrent.c

1964

if (clk) {

drivers/phy/cadence/phy-cadence-torrent.c

1965

parent_name = __clk_get_name(clk);

drivers/phy/cadence/phy-cadence-torrent.c

2813

cdns_phy->clk = devm_clk_get(cdns_phy->dev, "refclk");

drivers/phy/cadence/phy-cadence-torrent.c

2814

if (IS_ERR(cdns_phy->clk))

drivers/phy/cadence/phy-cadence-torrent.c

2815

return dev_err_probe(cdns_phy->dev, PTR_ERR(cdns_phy->clk),

drivers/phy/cadence/phy-cadence-torrent.c

2833

ret = clk_prepare_enable(cdns_phy->clk);

drivers/phy/cadence/phy-cadence-torrent.c

2839

ref_clk_rate = clk_get_rate(cdns_phy->clk);

drivers/phy/cadence/phy-cadence-torrent.c

2906

clk_disable_unprepare(cdns_phy->clk);

drivers/phy/cadence/phy-cadence-torrent.c

3167

clk_disable_unprepare(cdns_phy->clk);

drivers/phy/cadence/phy-cadence-torrent.c

3186

clk_disable_unprepare(cdns_phy->clk);

drivers/phy/cadence/phy-cadence-torrent.c

3368

clk_disable_unprepare(cdns_phy->clk);

drivers/phy/cadence/phy-cadence-torrent.c

3405

clk_disable_unprepare(cdns_phy->clk);

drivers/phy/cadence/phy-cadence-torrent.c

364

struct clk *clk;

drivers/phy/cadence/phy-cadence-torrent.c

365

struct clk *clk1;

drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c

127

struct clk *phy_ref_clk;

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

174

return clk_prepare_enable(imx8_phy->clk);

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

181

clk_disable_unprepare(imx8_phy->clk);

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

241

imx8_phy->clk = devm_clk_get(dev, "ref");

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

242

if (IS_ERR(imx8_phy->clk))

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

243

return dev_err_probe(dev, PTR_ERR(imx8_phy->clk),

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

61

struct clk *clk;

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

116

struct clk *clk;

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

117

struct clk *alt_clk;

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

144

ret = clk_prepare_enable(imx_phy->clk);

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

149

clk_disable_unprepare(imx_phy->clk);

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

628

ret = clk_prepare_enable(imx_phy->clk);

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

634

clk_disable_unprepare(imx_phy->clk);

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

657

clk_disable_unprepare(imx_phy->clk);

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

701

imx_phy->clk = devm_clk_get(dev, "phy");

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

702

if (IS_ERR(imx_phy->clk)) {

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

704

return PTR_ERR(imx_phy->clk);

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

298

clk_disable_unprepare(lane->clks[0].clk);

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

300

ret = clk_prepare_enable(lane->clks[0].clk);

drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c

62

struct clk *phy_ref_clk;

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

314

struct clk *apbclk;

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

315

struct clk *refclk;

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

615

struct clk *phyclk;

drivers/phy/hisilicon/phy-hi3670-pcie.c

164

struct clk *apb_sys_clk;

drivers/phy/hisilicon/phy-hi3670-pcie.c

165

struct clk *apb_phy_clk;

drivers/phy/hisilicon/phy-hi3670-pcie.c

166

struct clk *phy_ref_clk;

drivers/phy/hisilicon/phy-hi3670-pcie.c

167

struct clk *aclk;

drivers/phy/hisilicon/phy-hi3670-pcie.c

168

struct clk *aux_clk;

drivers/phy/hisilicon/phy-hisi-inno-usb2.c

52

struct clk *ref_clk;

drivers/phy/hisilicon/phy-histb-combphy.c

48

struct clk *ref_clk;

drivers/phy/ingenic/phy-ingenic-usb.c

105

err = clk_prepare_enable(priv->clk);

drivers/phy/ingenic/phy-ingenic-usb.c

126

clk_disable_unprepare(priv->clk);

drivers/phy/ingenic/phy-ingenic-usb.c

339

priv->clk = devm_clk_get(dev, NULL);

drivers/phy/ingenic/phy-ingenic-usb.c

340

if (IS_ERR(priv->clk)) {

drivers/phy/ingenic/phy-ingenic-usb.c

341

err = PTR_ERR(priv->clk);

drivers/phy/ingenic/phy-ingenic-usb.c

95

struct clk *clk;

drivers/phy/intel/phy-intel-keembay-emmc.c

44

struct clk *emmcclk;

drivers/phy/intel/phy-intel-lgm-combo.c

88

struct clk *core_clk;

drivers/phy/intel/phy-intel-lgm-emmc.c

48

struct clk *emmcclk;

drivers/phy/lantiq/phy-lantiq-rcu-usb2.c

41

struct clk *phy_gate_clk;

drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c

90

struct clk *pdi_clk;

drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c

91

struct clk *phy_clk;

drivers/phy/marvell/phy-berlin-sata.c

129

clk_disable_unprepare(priv->clk);

drivers/phy/marvell/phy-berlin-sata.c

140

clk_prepare_enable(priv->clk);

drivers/phy/marvell/phy-berlin-sata.c

152

clk_disable_unprepare(priv->clk);

drivers/phy/marvell/phy-berlin-sata.c

211

priv->clk = devm_clk_get(dev, NULL);

drivers/phy/marvell/phy-berlin-sata.c

212

if (IS_ERR(priv->clk))

drivers/phy/marvell/phy-berlin-sata.c

213

return PTR_ERR(priv->clk);

drivers/phy/marvell/phy-berlin-sata.c

60

struct clk *clk;

drivers/phy/marvell/phy-berlin-sata.c

88

clk_prepare_enable(priv->clk);

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1247

struct clk *clk;

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1284

clk = clk_get(&pdev->dev, "xtal");

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1285

if (IS_ERR(clk)) {

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1286

if (PTR_ERR(clk) == -EPROBE_DEFER)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1289

PTR_ERR(clk));

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1291

ret = clk_prepare_enable(clk);

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1296

if (clk_get_rate(clk) == 40000000)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1298

clk_disable_unprepare(clk);

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

1300

clk_put(clk);

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

262

struct clk *mg_domain_clk;

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

263

struct clk *mg_core_clk;

drivers/phy/marvell/phy-mvebu-cp110-comphy.c

264

struct clk *axi_clk;

drivers/phy/marvell/phy-mvebu-sata.c

17

struct clk *clk;

drivers/phy/marvell/phy-mvebu-sata.c

34

clk_prepare_enable(priv->clk);

drivers/phy/marvell/phy-mvebu-sata.c

47

clk_disable_unprepare(priv->clk);

drivers/phy/marvell/phy-mvebu-sata.c

57

clk_prepare_enable(priv->clk);

drivers/phy/marvell/phy-mvebu-sata.c

70

clk_disable_unprepare(priv->clk);

drivers/phy/marvell/phy-mvebu-sata.c

95

priv->clk = devm_clk_get(&pdev->dev, "sata");

drivers/phy/marvell/phy-mvebu-sata.c

96

if (IS_ERR(priv->clk))

drivers/phy/marvell/phy-mvebu-sata.c

97

return PTR_ERR(priv->clk);

drivers/phy/marvell/phy-pxa-28nm-hsic.c

148

clk_disable_unprepare(mv_phy->clk);

drivers/phy/marvell/phy-pxa-28nm-hsic.c

172

mv_phy->clk = devm_clk_get(&pdev->dev, NULL);

drivers/phy/marvell/phy-pxa-28nm-hsic.c

173

if (IS_ERR(mv_phy->clk)) {

drivers/phy/marvell/phy-pxa-28nm-hsic.c

175

return PTR_ERR(mv_phy->clk);

drivers/phy/marvell/phy-pxa-28nm-hsic.c

45

struct clk *clk;

drivers/phy/marvell/phy-pxa-28nm-hsic.c

63

clk_prepare_enable(mv_phy->clk);

drivers/phy/marvell/phy-pxa-28nm-hsic.c

81

clk_disable_unprepare(mv_phy->clk);

drivers/phy/marvell/phy-pxa-28nm-usb2.c

138

struct clk *clk;

drivers/phy/marvell/phy-pxa-28nm-usb2.c

157

clk_prepare_enable(mv_phy->clk);

drivers/phy/marvell/phy-pxa-28nm-usb2.c

230

clk_disable_unprepare(mv_phy->clk);

drivers/phy/marvell/phy-pxa-28nm-usb2.c

280

clk_disable_unprepare(mv_phy->clk);

drivers/phy/marvell/phy-pxa-28nm-usb2.c

303

mv_phy->clk = devm_clk_get(&pdev->dev, NULL);

drivers/phy/marvell/phy-pxa-28nm-usb2.c

304

if (IS_ERR(mv_phy->clk)) {

drivers/phy/marvell/phy-pxa-28nm-usb2.c

306

return PTR_ERR(mv_phy->clk);

drivers/phy/mediatek/phy-mtk-hdmi.c

104

struct clk *ref_clk;

drivers/phy/mediatek/phy-mtk-hdmi.h

36

struct clk *pll;

drivers/phy/mediatek/phy-mtk-mipi-dsi.c

110

struct clk *ref_clk;

drivers/phy/mediatek/phy-mtk-mipi-dsi.c

39

ret = clk_prepare_enable(mipi_tx->pll_hw.clk);

drivers/phy/mediatek/phy-mtk-mipi-dsi.c

56

clk_disable_unprepare(mipi_tx->pll_hw.clk);

drivers/phy/mediatek/phy-mtk-xsphy.c

96

struct clk *ref_clk; /* reference clock of anolog phy */

drivers/phy/microchip/sparx5_serdes.c

2658

struct clk *clk;

drivers/phy/microchip/sparx5_serdes.c

2679

clk = devm_clk_get(priv->dev, NULL);

drivers/phy/microchip/sparx5_serdes.c

2680

if (IS_ERR(clk)) {

drivers/phy/microchip/sparx5_serdes.c

2682

return PTR_ERR(clk);

drivers/phy/microchip/sparx5_serdes.c

2684

clock = clk_get_rate(clk);

drivers/phy/nuvoton/phy-ma35d1-usb2.c

108

p_phy->clk = of_clk_get(pdev->dev.of_node, 0);

drivers/phy/nuvoton/phy-ma35d1-usb2.c

109

if (IS_ERR(p_phy->clk))

drivers/phy/nuvoton/phy-ma35d1-usb2.c

110

return dev_err_probe(&pdev->dev, PTR_ERR(p_phy->clk),

drivers/phy/nuvoton/phy-ma35d1-usb2.c

25

struct clk *clk;

drivers/phy/nuvoton/phy-ma35d1-usb2.c

36

ret = clk_prepare_enable(p_phy->clk);

drivers/phy/nuvoton/phy-ma35d1-usb2.c

69

clk_disable_unprepare(p_phy->clk);

drivers/phy/nuvoton/phy-ma35d1-usb2.c

80

clk_disable_unprepare(p_phy->clk);

drivers/phy/phy-lpc18xx-usb-otg.c

108

lpc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/phy/phy-lpc18xx-usb-otg.c

109

if (IS_ERR(lpc->clk)) {

drivers/phy/phy-lpc18xx-usb-otg.c

111

return PTR_ERR(lpc->clk);

drivers/phy/phy-lpc18xx-usb-otg.c

23

struct clk *clk;

drivers/phy/phy-lpc18xx-usb-otg.c

33

ret = clk_set_rate(lpc->clk, 480000000);

drivers/phy/phy-lpc18xx-usb-otg.c

37

return clk_prepare(lpc->clk);

drivers/phy/phy-lpc18xx-usb-otg.c

44

clk_unprepare(lpc->clk);

drivers/phy/phy-lpc18xx-usb-otg.c

54

ret = clk_enable(lpc->clk);

drivers/phy/phy-lpc18xx-usb-otg.c

62

clk_disable(lpc->clk);

drivers/phy/phy-lpc18xx-usb-otg.c

80

clk_disable(lpc->clk);

drivers/phy/phy-pistachio-usb.c

37

struct clk *phy_clk;

drivers/phy/phy-snps-eusb2.c

167

struct clk *ref_clk;

drivers/phy/phy-snps-eusb2.c

569

phy->ref_clk = phy->clks[i].clk;

drivers/phy/phy-spacemit-k1-pcie.c

63

struct clk *pll;

drivers/phy/phy-xgene.c

1593

if (!IS_ERR(ctx->clk)) {

drivers/phy/phy-xgene.c

1595

clk_prepare_enable(ctx->clk);

drivers/phy/phy-xgene.c

1596

clk_disable_unprepare(ctx->clk);

drivers/phy/phy-xgene.c

1597

clk_prepare_enable(ctx->clk);

drivers/phy/phy-xgene.c

1670

ctx->clk = clk_get(&pdev->dev, NULL);

drivers/phy/phy-xgene.c

537

struct clk *clk; /* Optional clock */

drivers/phy/qualcomm/phy-qcom-apq8064-sata.c

71

struct clk *cfg_clk;

drivers/phy/qualcomm/phy-qcom-edp.c

1070

clk_set_rate(edp->dp_link_hw.clk, edp->dp_opts.link_rate * 100000);

drivers/phy/qualcomm/phy-qcom-edp.c

1071

clk_set_rate(edp->dp_pixel_hw.clk, pixel_freq);

drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c

20

struct clk *cfg_clk;

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

121

struct clk *xo_clk;

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

122

struct clk *ref_clk;

drivers/phy/qualcomm/phy-qcom-m31-eusb2.c

122

struct clk *clk;

drivers/phy/qualcomm/phy-qcom-m31-eusb2.c

199

ret = clk_prepare_enable(phy->clk);

drivers/phy/qualcomm/phy-qcom-m31-eusb2.c

231

clk_disable_unprepare(phy->clk);

drivers/phy/qualcomm/phy-qcom-m31-eusb2.c

270

phy->clk = devm_clk_get(dev, NULL);

drivers/phy/qualcomm/phy-qcom-m31-eusb2.c

271

if (IS_ERR(phy->clk))

drivers/phy/qualcomm/phy-qcom-m31-eusb2.c

272

return dev_err_probe(dev, PTR_ERR(phy->clk),

drivers/phy/qualcomm/phy-qcom-m31.c

205

struct clk *clk;

drivers/phy/qualcomm/phy-qcom-m31.c

223

ret = clk_prepare_enable(qphy->clk);

drivers/phy/qualcomm/phy-qcom-m31.c

259

clk_disable_unprepare(qphy->clk);

drivers/phy/qualcomm/phy-qcom-m31.c

291

qphy->clk = devm_clk_get(dev, NULL);

drivers/phy/qualcomm/phy-qcom-m31.c

292

if (IS_ERR(qphy->clk))

drivers/phy/qualcomm/phy-qcom-m31.c

293

return dev_err_probe(dev, PTR_ERR(qphy->clk),

drivers/phy/qualcomm/phy-qcom-pcie2.c

47

struct clk *pipe_clk;

drivers/phy/qualcomm/phy-qcom-qmp-combo.c

2289

struct clk *pipe_clk;

drivers/phy/qualcomm/phy-qcom-qmp-combo.c

3224

clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000);

drivers/phy/qualcomm/phy-qcom-qmp-combo.c

3225

clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq);

drivers/phy/qualcomm/phy-qcom-qmp-combo.c

3416

clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000);

drivers/phy/qualcomm/phy-qcom-qmp-combo.c

3417

clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq);

drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c

189

struct clk *pipe_clk;

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

5166

struct clk *clk;

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

5227

clk = devm_get_clk_from_child(dev, np, NULL);

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

5228

if (IS_ERR(clk)) {

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

5229

return dev_err_probe(dev, PTR_ERR(clk),

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

5235

qmp->pipe_clks[0].clk = clk;

drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c

538

struct clk *pipe_clk;

drivers/phy/qualcomm/phy-qcom-qmp-usb.c

1428

struct clk *pipe_clk;

drivers/phy/qualcomm/phy-qcom-qmp-usbc.c

447

struct clk *pipe_clk;

drivers/phy/qualcomm/phy-qcom-qmp-usbc.c

861

clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000);

drivers/phy/qualcomm/phy-qcom-qmp-usbc.c

862

clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq);

drivers/phy/qualcomm/phy-qcom-qusb2.c

456

struct clk *cfg_ahb_clk;

drivers/phy/qualcomm/phy-qcom-qusb2.c

457

struct clk *ref_clk;

drivers/phy/qualcomm/phy-qcom-qusb2.c

458

struct clk *iface_clk;

drivers/phy/qualcomm/phy-qcom-sgmii-eth.c

30

struct clk *refclk;

drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

155

hsphy->clks[0].clk = devm_clk_get_optional(dev, "cfg_ahb");

drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

156

if (IS_ERR(hsphy->clks[0].clk))

drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

157

return dev_err_probe(dev, PTR_ERR(hsphy->clks[0].clk),

drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

161

hsphy->clks[1].clk = devm_clk_get(dev, "ref");

drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

162

if (IS_ERR(hsphy->clks[1].clk))

drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

163

return dev_err_probe(dev, PTR_ERR(hsphy->clks[1].clk),

drivers/phy/qualcomm/phy-qcom-usb-hs.c

206

struct clk *clk;

drivers/phy/qualcomm/phy-qcom-usb-hs.c

232

uphy->ref_clk = clk = devm_clk_get(&ulpi->dev, "ref");

drivers/phy/qualcomm/phy-qcom-usb-hs.c

233

if (IS_ERR(clk))

drivers/phy/qualcomm/phy-qcom-usb-hs.c

234

return PTR_ERR(clk);

drivers/phy/qualcomm/phy-qcom-usb-hs.c

236

uphy->sleep_clk = clk = devm_clk_get(&ulpi->dev, "sleep");

drivers/phy/qualcomm/phy-qcom-usb-hs.c

237

if (IS_ERR(clk))

drivers/phy/qualcomm/phy-qcom-usb-hs.c

238

return PTR_ERR(clk);

drivers/phy/qualcomm/phy-qcom-usb-hs.c

32

struct clk *ref_clk;

drivers/phy/qualcomm/phy-qcom-usb-hs.c

33

struct clk *sleep_clk;

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

108

struct clk *clk;

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

120

uphy->phy_clk = clk = devm_clk_get(&ulpi->dev, "phy");

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

121

if (IS_ERR(clk))

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

122

return PTR_ERR(clk);

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

124

uphy->cal_clk = clk = devm_clk_get(&ulpi->dev, "cal");

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

125

if (IS_ERR(clk))

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

126

return PTR_ERR(clk);

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

128

uphy->cal_sleep_clk = clk = devm_clk_get(&ulpi->dev, "cal_sleep");

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

129

if (IS_ERR(clk))

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

130

return PTR_ERR(clk);

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

21

struct clk *phy_clk;

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

22

struct clk *cal_clk;

drivers/phy/qualcomm/phy-qcom-usb-hsic.c

23

struct clk *cal_sleep_clk;

drivers/phy/ralink/phy-mt7621-pci.c

80

struct clk *sys_clk;

drivers/phy/ralink/phy-ralink-usb.c

136

phy->clk, 0);

drivers/phy/ralink/phy-ralink-usb.c

180

phy->clk = (uintptr_t)device_get_match_data(&pdev->dev);

drivers/phy/ralink/phy-ralink-usb.c

55

u32 clk;

drivers/phy/ralink/phy-ralink-usb.c

98

phy->clk, phy->clk);

drivers/phy/renesas/phy-rcar-gen2.c

109

clk_disable_unprepare(channel->drv->clk);

drivers/phy/renesas/phy-rcar-gen2.c

341

struct clk *clk;

drivers/phy/renesas/phy-rcar-gen2.c

351

clk = devm_clk_get(dev, "usbhs");

drivers/phy/renesas/phy-rcar-gen2.c

352

if (IS_ERR(clk)) {

drivers/phy/renesas/phy-rcar-gen2.c

354

return PTR_ERR(clk);

drivers/phy/renesas/phy-rcar-gen2.c

367

drv->clk = clk;

drivers/phy/renesas/phy-rcar-gen2.c

64

struct clk *clk;

drivers/phy/renesas/phy-rcar-gen2.c

93

clk_prepare_enable(drv->clk);

drivers/phy/renesas/phy-rcar-gen3-usb3.c

137

struct clk *clk;

drivers/phy/renesas/phy-rcar-gen3-usb3.c

152

clk = devm_clk_get(dev, "usb3s_clk");

drivers/phy/renesas/phy-rcar-gen3-usb3.c

153

if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {

drivers/phy/renesas/phy-rcar-gen3-usb3.c

154

r->usb3s_clk = !!clk_get_rate(clk);

drivers/phy/renesas/phy-rcar-gen3-usb3.c

155

clk_disable_unprepare(clk);

drivers/phy/renesas/phy-rcar-gen3-usb3.c

157

clk = devm_clk_get(dev, "usb_extal");

drivers/phy/renesas/phy-rcar-gen3-usb3.c

158

if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {

drivers/phy/renesas/phy-rcar-gen3-usb3.c

159

r->usb_extal = !!clk_get_rate(clk);

drivers/phy/renesas/phy-rcar-gen3-usb3.c

160

clk_disable_unprepare(clk);

drivers/phy/rockchip/phy-rockchip-dp.c

29

struct clk *phy_24m;

drivers/phy/rockchip/phy-rockchip-emmc.c

88

struct clk *emmcclk;

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

147

struct clk *pclk;

drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c

229

struct clk *ref_clk;

drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c

230

struct clk *pclk_phy;

drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c

231

struct clk *pclk_host;

drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c

239

struct clk *pll_clk;

drivers/phy/rockchip/phy-rockchip-inno-hdmi.c

235

struct clk *sysclk;

drivers/phy/rockchip/phy-rockchip-inno-hdmi.c

236

struct clk *refoclk;

drivers/phy/rockchip/phy-rockchip-inno-hdmi.c

237

struct clk *refpclk;

drivers/phy/rockchip/phy-rockchip-inno-hdmi.c

245

struct clk *phyclk;

drivers/phy/rockchip/phy-rockchip-inno-usb2.c

251

struct clk *clk480m;

drivers/phy/rockchip/phy-rockchip-inno-usb2.c

388

struct clk *refclk = NULL;

drivers/phy/rockchip/phy-rockchip-inno-usb2.c

402

refclk = rphy->clks[i].clk;

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

213

struct clk *refclk;

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

351

priv->refclk = priv->clks[i].clk;

drivers/phy/rockchip/phy-rockchip-pcie.c

60

struct clk *clk_pciephy_ref;

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

286

struct clk *ref_clk;

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

287

struct clk *pclk;

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

2378

struct clk *refclk;

drivers/phy/rockchip/phy-rockchip-typec.c

376

struct clk *clk_core;

drivers/phy/rockchip/phy-rockchip-typec.c

377

struct clk *clk_ref;

drivers/phy/rockchip/phy-rockchip-usb.c

195

if (rk_phy->clk)

drivers/phy/rockchip/phy-rockchip-usb.c

196

clk_put(rk_phy->clk);

drivers/phy/rockchip/phy-rockchip-usb.c

227

rk_phy->clk = of_clk_get_by_name(child, "phyclk");

drivers/phy/rockchip/phy-rockchip-usb.c

228

if (IS_ERR(rk_phy->clk))

drivers/phy/rockchip/phy-rockchip-usb.c

229

rk_phy->clk = NULL;

drivers/phy/rockchip/phy-rockchip-usb.c

250

if (rk_phy->clk) {

drivers/phy/rockchip/phy-rockchip-usb.c

251

clk_name = __clk_get_name(rk_phy->clk);

drivers/phy/rockchip/phy-rockchip-usb.c

300

return clk_prepare_enable(rk_phy->clk);

drivers/phy/rockchip/phy-rockchip-usb.c

308

if (rk_phy->clk)

drivers/phy/rockchip/phy-rockchip-usb.c

309

clk_put(rk_phy->clk);

drivers/phy/rockchip/phy-rockchip-usb.c

68

struct clk *clk;

drivers/phy/rockchip/phy-rockchip-usb.c

69

struct clk *clk480m;

drivers/phy/rockchip/phy-rockchip-usbdp.c

168

struct clk *refclk;

drivers/phy/rockchip/phy-rockchip-usbdp.c

436

udphy->refclk = udphy->clks[i].clk;

drivers/phy/samsung/phy-exynos4210-usb2.c

153

u32 clk;

drivers/phy/samsung/phy-exynos4210-usb2.c

182

clk = readl(drv->reg_phy + EXYNOS_4210_UPHYCLK);

drivers/phy/samsung/phy-exynos4210-usb2.c

183

clk &= ~EXYNOS_4210_UPHYCLK_PHYFSEL_MASK;

drivers/phy/samsung/phy-exynos4210-usb2.c

184

clk |= drv->ref_reg_val << EXYNOS_4210_UPHYCLK_PHYFSEL_OFFSET;

drivers/phy/samsung/phy-exynos4210-usb2.c

185

writel(clk, drv->reg_phy + EXYNOS_4210_UPHYCLK);

drivers/phy/samsung/phy-exynos4x12-usb2.c

195

u32 clk;

drivers/phy/samsung/phy-exynos4x12-usb2.c

197

clk = readl(drv->reg_phy + EXYNOS_4x12_UPHYCLK);

drivers/phy/samsung/phy-exynos4x12-usb2.c

198

clk &= ~EXYNOS_4x12_UPHYCLK_PHYFSEL_MASK;

drivers/phy/samsung/phy-exynos4x12-usb2.c

201

clk = EXYNOS_3250_UPHYCLK_REFCLKSEL;

drivers/phy/samsung/phy-exynos4x12-usb2.c

203

clk |= drv->ref_reg_val << EXYNOS_4x12_UPHYCLK_PHYFSEL_OFFSET;

drivers/phy/samsung/phy-exynos4x12-usb2.c

204

clk |= EXYNOS_4x12_UPHYCLK_PHY1_COMMON_ON;

drivers/phy/samsung/phy-exynos4x12-usb2.c

205

writel(clk, drv->reg_phy + EXYNOS_4x12_UPHYCLK);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1777

struct clk *ref_clk;

drivers/phy/samsung/phy-exynos5-usbdrd.c

1814

ref_clk = phy_drd->core_clks[i].clk;

drivers/phy/samsung/phy-exynos5250-sata.c

50

struct clk *phyclk;

drivers/phy/samsung/phy-samsung-usb2.c

193

drv->clk = devm_clk_get(dev, "phy");

drivers/phy/samsung/phy-samsung-usb2.c

194

if (IS_ERR(drv->clk)) {

drivers/phy/samsung/phy-samsung-usb2.c

196

return PTR_ERR(drv->clk);

drivers/phy/samsung/phy-samsung-usb2.c

33

ret = clk_prepare_enable(drv->clk);

drivers/phy/samsung/phy-samsung-usb2.c

52

clk_disable_unprepare(drv->clk);

drivers/phy/samsung/phy-samsung-usb2.c

76

clk_disable_unprepare(drv->clk);

drivers/phy/samsung/phy-samsung-usb2.h

36

struct clk *clk;

drivers/phy/samsung/phy-samsung-usb2.h

37

struct clk *ref_clk;

drivers/phy/socionext/phy-uniphier-ahci.c

22

struct clk *clk, *clk_parent, *clk_parent_gio;

drivers/phy/socionext/phy-uniphier-ahci.c

341

ret = clk_prepare_enable(priv->clk);

drivers/phy/socionext/phy-uniphier-ahci.c

360

clk_disable_unprepare(priv->clk);

drivers/phy/socionext/phy-uniphier-ahci.c

374

clk_disable_unprepare(priv->clk);

drivers/phy/socionext/phy-uniphier-ahci.c

412

priv->clk = devm_clk_get(dev, "phy");

drivers/phy/socionext/phy-uniphier-ahci.c

413

if (IS_ERR(priv->clk))

drivers/phy/socionext/phy-uniphier-ahci.c

414

return PTR_ERR(priv->clk);

drivers/phy/socionext/phy-uniphier-pcie.c

147

ret = clk_prepare_enable(priv->clk);

drivers/phy/socionext/phy-uniphier-pcie.c

195

clk_disable_unprepare(priv->clk);

drivers/phy/socionext/phy-uniphier-pcie.c

209

clk_disable_unprepare(priv->clk);

drivers/phy/socionext/phy-uniphier-pcie.c

252

priv->clk = devm_clk_get(dev, "link");

drivers/phy/socionext/phy-uniphier-pcie.c

253

if (IS_ERR(priv->clk))

drivers/phy/socionext/phy-uniphier-pcie.c

254

return PTR_ERR(priv->clk);

drivers/phy/socionext/phy-uniphier-pcie.c

260

priv->clk = devm_clk_get(dev, NULL);

drivers/phy/socionext/phy-uniphier-pcie.c

261

if (IS_ERR(priv->clk))

drivers/phy/socionext/phy-uniphier-pcie.c

262

return PTR_ERR(priv->clk);

drivers/phy/socionext/phy-uniphier-pcie.c

62

struct clk *clk, *clk_gio;

drivers/phy/socionext/phy-uniphier-usb3hs.c

212

ret = clk_prepare_enable(priv->clk);

drivers/phy/socionext/phy-uniphier-usb3hs.c

231

clk_disable_unprepare(priv->clk);

drivers/phy/socionext/phy-uniphier-usb3hs.c

246

clk_disable_unprepare(priv->clk);

drivers/phy/socionext/phy-uniphier-usb3hs.c

345

priv->clk = devm_clk_get(dev, "phy");

drivers/phy/socionext/phy-uniphier-usb3hs.c

346

if (IS_ERR(priv->clk))

drivers/phy/socionext/phy-uniphier-usb3hs.c

347

return PTR_ERR(priv->clk);

drivers/phy/socionext/phy-uniphier-usb3hs.c

71

struct clk *clk, *clk_parent, *clk_ext, *clk_parent_gio;

drivers/phy/socionext/phy-uniphier-usb3ss.c

116

ret = clk_prepare_enable(priv->clk);

drivers/phy/socionext/phy-uniphier-usb3ss.c

135

clk_disable_unprepare(priv->clk);

drivers/phy/socionext/phy-uniphier-usb3ss.c

150

clk_disable_unprepare(priv->clk);

drivers/phy/socionext/phy-uniphier-usb3ss.c

237

priv->clk = devm_clk_get(dev, "phy");

drivers/phy/socionext/phy-uniphier-usb3ss.c

238

if (IS_ERR(priv->clk))

drivers/phy/socionext/phy-uniphier-usb3ss.c

239

return PTR_ERR(priv->clk);

drivers/phy/socionext/phy-uniphier-usb3ss.c

57

struct clk *clk, *clk_ext, *clk_parent, *clk_parent_gio;

drivers/phy/sophgo/phy-cv1800-usb2.c

36

struct clk *usb_app_clk;

drivers/phy/sophgo/phy-cv1800-usb2.c

37

struct clk *usb_lpm_clk;

drivers/phy/sophgo/phy-cv1800-usb2.c

38

struct clk *usb_stb_clk;

drivers/phy/spacemit/phy-k1-usb2.c

100

clk_disable(sphy->clk);

drivers/phy/spacemit/phy-k1-usb2.c

121

clk_disable(sphy->clk);

drivers/phy/spacemit/phy-k1-usb2.c

143

clk_disable(sphy->clk);

drivers/phy/spacemit/phy-k1-usb2.c

176

sphy->clk = devm_clk_get_prepared(&pdev->dev, NULL);

drivers/phy/spacemit/phy-k1-usb2.c

177

if (IS_ERR(sphy->clk))

drivers/phy/spacemit/phy-k1-usb2.c

178

return dev_err_probe(dev, PTR_ERR(sphy->clk), "Failed to get clock\n");

drivers/phy/spacemit/phy-k1-usb2.c

79

struct clk *clk;

drivers/phy/spacemit/phy-k1-usb2.c

97

ret = clk_enable(sphy->clk);

drivers/phy/st/phy-stm32-combophy.c

180

struct clk *clk;

drivers/phy/st/phy-stm32-combophy.c

184

clk = combophy->clks[PAD_CLK].clk;

drivers/phy/st/phy-stm32-combophy.c

186

clk = combophy->clks[KER_CLK].clk;

drivers/phy/st/phy-stm32-combophy.c

188

clk_rate = clk_get_rate(clk);

drivers/phy/st/phy-stm32-combophy.c

510

if (combophy->clks[combophy->num_clks].clk != NULL) {

drivers/phy/st/phy-stm32-usbphyc.c

148

struct clk *clk;

drivers/phy/st/phy-stm32-usbphyc.c

234

u32 clk_rate = clk_get_rate(usbphyc->clk);

drivers/phy/st/phy-stm32-usbphyc.c

636

usbphyc->clk = devm_clk_get(dev, NULL);

drivers/phy/st/phy-stm32-usbphyc.c

637

if (IS_ERR(usbphyc->clk))

drivers/phy/st/phy-stm32-usbphyc.c

638

return dev_err_probe(dev, PTR_ERR(usbphyc->clk), "clk get_failed\n");

drivers/phy/st/phy-stm32-usbphyc.c

640

ret = clk_prepare_enable(usbphyc->clk);

drivers/phy/st/phy-stm32-usbphyc.c

768

clk_disable_unprepare(usbphyc->clk);

drivers/phy/st/phy-stm32-usbphyc.c

785

clk_disable_unprepare(usbphyc->clk);

drivers/phy/starfive/phy-jh7110-dphy-rx.c

64

struct clk *cfg_clk;

drivers/phy/starfive/phy-jh7110-dphy-rx.c

65

struct clk *ref_clk;

drivers/phy/starfive/phy-jh7110-dphy-rx.c

66

struct clk *tx_clk;

drivers/phy/starfive/phy-jh7110-dphy-tx.c

191

struct clk *txesc_clk;

drivers/phy/starfive/phy-jh7110-usb.c

33

struct clk *usb_125m_clk;

drivers/phy/starfive/phy-jh7110-usb.c

34

struct clk *app_125m;

drivers/phy/sunplus/phy-sunplus-usb2.c

72

struct clk *phy_clk;

drivers/phy/tegra/xusb-tegra186.c

274

struct clk *usb2_trk_clk;

drivers/phy/tegra/xusb-tegra210.c

2073

err = clk_prepare_enable(pad->clk);

drivers/phy/tegra/xusb-tegra210.c

2100

clk_disable_unprepare(pad->clk);

drivers/phy/tegra/xusb-tegra210.c

2202

usb2->clk = devm_clk_get(&pad->dev, "trk");

drivers/phy/tegra/xusb-tegra210.c

2203

if (IS_ERR(usb2->clk)) {

drivers/phy/tegra/xusb-tegra210.c

2204

err = PTR_ERR(usb2->clk);

drivers/phy/tegra/xusb-tegra210.c

2368

err = clk_prepare_enable(pad->clk);

drivers/phy/tegra/xusb-tegra210.c

2391

clk_disable_unprepare(pad->clk);

drivers/phy/tegra/xusb-tegra210.c

2456

hsic->clk = devm_clk_get(&pad->dev, "trk");

drivers/phy/tegra/xusb-tegra210.c

2457

if (IS_ERR(hsic->clk)) {

drivers/phy/tegra/xusb-tegra210.c

2458

err = PTR_ERR(hsic->clk);

drivers/phy/tegra/xusb.h

207

struct clk *clk;

drivers/phy/tegra/xusb.h

232

struct clk *clk;

drivers/phy/tegra/xusb.h

245

struct clk *pll;

drivers/phy/tegra/xusb.h

260

struct clk *pll;

drivers/phy/tegra/xusb.h

460

struct clk *clk;

drivers/phy/ti/phy-am654-serdes.c

242

struct clk *clks[SERDES_NUM_CLOCKS];

drivers/phy/ti/phy-am654-serdes.c

653

struct clk *clk;

drivers/phy/ti/phy-am654-serdes.c

699

clk = devm_clk_register(dev, &mux->hw);

drivers/phy/ti/phy-am654-serdes.c

700

if (IS_ERR(clk))

drivers/phy/ti/phy-am654-serdes.c

701

return PTR_ERR(clk);

drivers/phy/ti/phy-am654-serdes.c

703

am654_phy->clks[clock_num] = clk;

drivers/phy/ti/phy-da8xx-usb.c

27

struct clk *usb11_clk;

drivers/phy/ti/phy-da8xx-usb.c

28

struct clk *usb20_clk;

drivers/phy/ti/phy-dm816x-usb.c

46

struct clk *refclk;

drivers/phy/ti/phy-j721e-wiz.c

1003

clk = devm_clk_register(dev, &div->hw);

drivers/phy/ti/phy-j721e-wiz.c

1004

if (IS_ERR(clk))

drivers/phy/ti/phy-j721e-wiz.c

1005

return PTR_ERR(clk);

drivers/phy/ti/phy-j721e-wiz.c

1007

ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/phy/ti/phy-j721e-wiz.c

1130

struct clk *clk;

drivers/phy/ti/phy-j721e-wiz.c

1134

clk = devm_clk_get(dev, "core_ref_clk");

drivers/phy/ti/phy-j721e-wiz.c

1135

if (IS_ERR(clk))

drivers/phy/ti/phy-j721e-wiz.c

1136

return dev_err_probe(dev, PTR_ERR(clk),

drivers/phy/ti/phy-j721e-wiz.c

1139

wiz->input_clks[WIZ_CORE_REFCLK] = clk;

drivers/phy/ti/phy-j721e-wiz.c

1142

clk = devm_clk_get(dev, "core_ref1_clk");

drivers/phy/ti/phy-j721e-wiz.c

1143

if (IS_ERR(clk))

drivers/phy/ti/phy-j721e-wiz.c

1144

return dev_err_probe(dev, PTR_ERR(clk),

drivers/phy/ti/phy-j721e-wiz.c

1147

wiz->input_clks[WIZ_CORE_REFCLK1] = clk;

drivers/phy/ti/phy-j721e-wiz.c

1150

clk = devm_clk_get(dev, "ext_ref_clk");

drivers/phy/ti/phy-j721e-wiz.c

1151

if (IS_ERR(clk))

drivers/phy/ti/phy-j721e-wiz.c

1152

return dev_err_probe(dev, PTR_ERR(clk),

drivers/phy/ti/phy-j721e-wiz.c

1155

wiz->input_clks[WIZ_EXT_REFCLK] = clk;

drivers/phy/ti/phy-j721e-wiz.c

392

struct clk *input_clks[WIZ_MAX_INPUT_CLOCKS];

drivers/phy/ti/phy-j721e-wiz.c

393

struct clk *output_clks[WIZ_MAX_OUTPUT_CLOCKS];

drivers/phy/ti/phy-j721e-wiz.c

747

struct clk *clk;

drivers/phy/ti/phy-j721e-wiz.c

772

clk = devm_clk_register(dev, &wiz_phy_en_refclk->hw);

drivers/phy/ti/phy-j721e-wiz.c

776

if (IS_ERR(clk))

drivers/phy/ti/phy-j721e-wiz.c

777

return PTR_ERR(clk);

drivers/phy/ti/phy-j721e-wiz.c

779

wiz->output_clks[TI_WIZ_PHY_EN_REFCLK] = clk;

drivers/phy/ti/phy-j721e-wiz.c

819

struct clk *clk;

drivers/phy/ti/phy-j721e-wiz.c

833

clk = wiz->input_clks[mux_sel->parents[i]];

drivers/phy/ti/phy-j721e-wiz.c

834

if (IS_ERR_OR_NULL(clk)) {

drivers/phy/ti/phy-j721e-wiz.c

840

parent_names[i] = __clk_get_name(clk);

drivers/phy/ti/phy-j721e-wiz.c

857

clk = devm_clk_register(dev, &mux->hw);

drivers/phy/ti/phy-j721e-wiz.c

858

if (IS_ERR(clk)) {

drivers/phy/ti/phy-j721e-wiz.c

859

ret = PTR_ERR(clk);

drivers/phy/ti/phy-j721e-wiz.c

863

wiz->output_clks[clk_index] = clk;

drivers/phy/ti/phy-j721e-wiz.c

880

struct clk *clk;

drivers/phy/ti/phy-j721e-wiz.c

915

clk = devm_clk_register(dev, &mux->hw);

drivers/phy/ti/phy-j721e-wiz.c

916

if (IS_ERR(clk))

drivers/phy/ti/phy-j721e-wiz.c

917

return PTR_ERR(clk);

drivers/phy/ti/phy-j721e-wiz.c

919

ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/phy/ti/phy-j721e-wiz.c

975

struct clk *clk;

drivers/phy/ti/phy-omap-usb2.c

61

struct clk *wkupclk;

drivers/phy/ti/phy-omap-usb2.c

62

struct clk *optclk;

drivers/phy/ti/phy-ti-pipe3.c

170

struct clk *wkupclk;

drivers/phy/ti/phy-ti-pipe3.c

171

struct clk *sys_clk;

drivers/phy/ti/phy-ti-pipe3.c

172

struct clk *refclk;

drivers/phy/ti/phy-ti-pipe3.c

173

struct clk *div_clk;

drivers/phy/ti/phy-ti-pipe3.c

605

struct clk *clk;

drivers/phy/ti/phy-ti-pipe3.c

637

clk = devm_clk_get(dev, "dpll_ref");

drivers/phy/ti/phy-ti-pipe3.c

638

if (IS_ERR(clk)) {

drivers/phy/ti/phy-ti-pipe3.c

640

return PTR_ERR(clk);

drivers/phy/ti/phy-ti-pipe3.c

642

clk_set_rate(clk, 1500000000);

drivers/phy/ti/phy-ti-pipe3.c

644

clk = devm_clk_get(dev, "dpll_ref_m2");

drivers/phy/ti/phy-ti-pipe3.c

645

if (IS_ERR(clk)) {

drivers/phy/ti/phy-ti-pipe3.c

647

return PTR_ERR(clk);

drivers/phy/ti/phy-ti-pipe3.c

649

clk_set_rate(clk, 100000000);

drivers/phy/ti/phy-ti-pipe3.c

651

clk = devm_clk_get(dev, "phy-div");

drivers/phy/ti/phy-ti-pipe3.c

652

if (IS_ERR(clk)) {

drivers/phy/ti/phy-ti-pipe3.c

654

return PTR_ERR(clk);

drivers/phy/ti/phy-ti-pipe3.c

656

clk_set_rate(clk, 100000000);

drivers/phy/xilinx/phy-zynqmp.c

237

struct clk *clk[NUM_LANES];

drivers/phy/xilinx/phy-zynqmp.c

403

struct clk *clk;

drivers/phy/xilinx/phy-zynqmp.c

406

clk = gtr_phy->dev->clk[gtr_phy->refclk];

drivers/phy/xilinx/phy-zynqmp.c

407

rate = clk_get_rate(clk);

drivers/phy/xilinx/phy-zynqmp.c

666

if (clk_prepare_enable(gtr_dev->clk[gtr_phy->refclk]))

drivers/phy/xilinx/phy-zynqmp.c

721

clk_disable_unprepare(gtr_dev->clk[gtr_phy->refclk]);

drivers/phy/xilinx/phy-zynqmp.c

856

if (refclk >= ARRAY_SIZE(gtr_dev->clk)) {

drivers/phy/xilinx/phy-zynqmp.c

883

struct clk *clk;

drivers/phy/xilinx/phy-zynqmp.c

888

clk = gtr_phy->dev->clk[gtr_phy->refclk];

drivers/phy/xilinx/phy-zynqmp.c

894

seq_printf(seq, "Reference clock: %u (%pC)\n", gtr_phy->refclk, clk);

drivers/phy/xilinx/phy-zynqmp.c

895

seq_printf(seq, "Reference rate: %lu\n", clk_get_rate(clk));

drivers/phy/xilinx/phy-zynqmp.c

960

for (refclk = 0; refclk < ARRAY_SIZE(gtr_dev->clk); ++refclk) {

drivers/phy/xilinx/phy-zynqmp.c

961

struct clk *clk;

drivers/phy/xilinx/phy-zynqmp.c

965

clk = devm_clk_get_optional(gtr_dev->dev, name);

drivers/phy/xilinx/phy-zynqmp.c

966

if (IS_ERR(clk)) {

drivers/phy/xilinx/phy-zynqmp.c

967

return dev_err_probe(gtr_dev->dev, PTR_ERR(clk),

drivers/phy/xilinx/phy-zynqmp.c

972

if (!clk)

drivers/phy/xilinx/phy-zynqmp.c

975

gtr_dev->clk[refclk] = clk;

drivers/pinctrl/actions/pinctrl-owl.c

1009

clk_disable_unprepare(pctrl->clk);

drivers/pinctrl/actions/pinctrl-owl.c

51

struct clk *clk;

drivers/pinctrl/actions/pinctrl-owl.c

944

pctrl->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pinctrl/actions/pinctrl-owl.c

945

if (IS_ERR(pctrl->clk)) {

drivers/pinctrl/actions/pinctrl-owl.c

947

return PTR_ERR(pctrl->clk);

drivers/pinctrl/actions/pinctrl-owl.c

950

ret = clk_prepare_enable(pctrl->clk);

drivers/pinctrl/mvebu/pinctrl-dove.c

750

static struct clk *clk;

drivers/pinctrl/mvebu/pinctrl-dove.c

778

clk = devm_clk_get(&pdev->dev, NULL);

drivers/pinctrl/mvebu/pinctrl-dove.c

779

if (IS_ERR(clk)) {

drivers/pinctrl/mvebu/pinctrl-dove.c

781

return PTR_ERR(clk);

drivers/pinctrl/mvebu/pinctrl-dove.c

783

clk_prepare_enable(clk);

drivers/pinctrl/mvebu/pinctrl-dove.c

861

clk_disable_unprepare(clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

1024

ret = clk_enable(nmk_chip->clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

1029

clk_disable(nmk_chip->clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

1139

ret = clk_enable(nmk_chip->clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

1155

clk_disable(nmk_chip->clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

453

ret = clk_enable(chip->clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

457

clk_disable(chip->clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

482

clk_disable(chip->clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

956

ret = clk_enable(nmk_chip->clk);

drivers/pinctrl/nomadik/pinctrl-nomadik.c

971

clk_disable(nmk_chip->clk);

drivers/pinctrl/nuvoton/pinctrl-ma35.c

107

struct clk *clk;

drivers/pinctrl/nuvoton/pinctrl-ma35.c

568

bank->clk = of_clk_get(to_of_node(bank->fwnode), 0);

drivers/pinctrl/nuvoton/pinctrl-ma35.c

569

if (IS_ERR(bank->clk))

drivers/pinctrl/nuvoton/pinctrl-ma35.c

570

return PTR_ERR(bank->clk);

drivers/pinctrl/nuvoton/pinctrl-ma35.c

572

return clk_prepare_enable(bank->clk);

drivers/pinctrl/pinctrl-at91-pio4.c

1123

atmel_pioctrl->clk = devm_clk_get_enabled(dev, NULL);

drivers/pinctrl/pinctrl-at91-pio4.c

1124

if (IS_ERR(atmel_pioctrl->clk))

drivers/pinctrl/pinctrl-at91-pio4.c

1125

return dev_err_probe(dev, PTR_ERR(atmel_pioctrl->clk), "failed to get clock\n");

drivers/pinctrl/pinctrl-at91-pio4.c

131

struct clk *clk;

drivers/pinctrl/pinctrl-at91.c

58

struct clk *clock;

drivers/pinctrl/pinctrl-falcon.c

454

falcon_info.clk[*bank] = clk_get(&ppdev->dev, NULL);

drivers/pinctrl/pinctrl-falcon.c

456

if (IS_ERR(falcon_info.clk[*bank])) {

drivers/pinctrl/pinctrl-falcon.c

459

return PTR_ERR(falcon_info.clk[*bank]);

drivers/pinctrl/pinctrl-falcon.c

473

clk_enable(falcon_info.clk[*bank]);

drivers/pinctrl/pinctrl-k210.c

926

struct clk *clk, *pclk;

drivers/pinctrl/pinctrl-k210.c

941

clk = devm_clk_get_enabled(dev, "ref");

drivers/pinctrl/pinctrl-k210.c

942

if (IS_ERR(clk))

drivers/pinctrl/pinctrl-k210.c

943

return PTR_ERR(clk);

drivers/pinctrl/pinctrl-lantiq.h

100

struct clk *clk[5];

drivers/pinctrl/pinctrl-lpc18xx.c

1339

scu->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pinctrl/pinctrl-lpc18xx.c

1340

if (IS_ERR(scu->clk)) {

drivers/pinctrl/pinctrl-lpc18xx.c

1342

return PTR_ERR(scu->clk);

drivers/pinctrl/pinctrl-lpc18xx.c

1351

ret = clk_prepare_enable(scu->clk);

drivers/pinctrl/pinctrl-lpc18xx.c

1362

clk_disable_unprepare(scu->clk);

drivers/pinctrl/pinctrl-lpc18xx.c

191

struct clk *clk;

drivers/pinctrl/pinctrl-microchip-sgpio.c

909

struct clk *clk;

drivers/pinctrl/pinctrl-microchip-sgpio.c

930

clk = devm_clk_get(dev, NULL);

drivers/pinctrl/pinctrl-microchip-sgpio.c

931

if (IS_ERR(clk))

drivers/pinctrl/pinctrl-microchip-sgpio.c

932

return dev_err_probe(dev, PTR_ERR(clk), "Failed to get clock\n");

drivers/pinctrl/pinctrl-microchip-sgpio.c

934

div_clock = clk_get_rate(clk);

drivers/pinctrl/pinctrl-pic32.c

2177

pctl->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pinctrl/pinctrl-pic32.c

2178

if (IS_ERR(pctl->clk)) {

drivers/pinctrl/pinctrl-pic32.c

2179

ret = PTR_ERR(pctl->clk);

drivers/pinctrl/pinctrl-pic32.c

2184

ret = clk_prepare_enable(pctl->clk);

drivers/pinctrl/pinctrl-pic32.c

2242

bank->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pinctrl/pinctrl-pic32.c

2243

if (IS_ERR(bank->clk)) {

drivers/pinctrl/pinctrl-pic32.c

2244

ret = PTR_ERR(bank->clk);

drivers/pinctrl/pinctrl-pic32.c

2249

ret = clk_prepare_enable(bank->clk);

drivers/pinctrl/pinctrl-pic32.c

64

struct clk *clk;

drivers/pinctrl/pinctrl-pic32.c

79

struct clk *clk;

drivers/pinctrl/pinctrl-rockchip.h

325

struct clk *clk;

drivers/pinctrl/pinctrl-rockchip.h

326

struct clk *db_clk;

drivers/pinctrl/pinctrl-st.c

549

int clk = ST_PINCONF_UNPACK_RT_CLK(config);

drivers/pinctrl/pinctrl-st.c

561

((clk) << RT_D_CFG_CLK_SHIFT) |

drivers/pinctrl/pinctrl-th1520.c

855

struct clk *clk;

drivers/pinctrl/pinctrl-th1520.c

867

clk = devm_clk_get_enabled(dev, NULL);

drivers/pinctrl/pinctrl-th1520.c

868

if (IS_ERR(clk))

drivers/pinctrl/pinctrl-th1520.c

869

return dev_err_probe(dev, PTR_ERR(clk), "error getting clock\n");

drivers/pinctrl/renesas/pfc-r8a7778.c

1292

#define CAN_PFC_CLK(name, clk) SH_PFC_MUX1(name, clk)

drivers/pinctrl/renesas/pfc-r8a7778.c

1366

#define HSPI_PFC_DAT(name, clk, cs, rx, tx) SH_PFC_MUX4(name, clk, cs, rx, tx)

drivers/pinctrl/renesas/pfc-r8a7778.c

1447

#define MMC_PFC_CTRL(name, clk, cmd) SH_PFC_MUX2(name, clk, cmd)

drivers/pinctrl/renesas/pfc-r8a7778.c

1544

#define SDHI_PFC_CTRL(name, clk, cmd) SH_PFC_MUX2(name, clk, cmd)

drivers/pinctrl/renesas/pfc-r8a7778.c

1673

#define VIN_PFC_CLK(name, clk) SH_PFC_MUX1(name, clk)

drivers/pinctrl/renesas/pinctrl-rzg2l.c

2979

pctrl->clk = devm_clk_get_enabled(pctrl->dev, NULL);

drivers/pinctrl/renesas/pinctrl-rzg2l.c

2980

if (IS_ERR(pctrl->clk)) {

drivers/pinctrl/renesas/pinctrl-rzg2l.c

2981

return dev_err_probe(pctrl->dev, PTR_ERR(pctrl->clk),

drivers/pinctrl/renesas/pinctrl-rzg2l.c

3208

clk_disable_unprepare(pctrl->clk);

drivers/pinctrl/renesas/pinctrl-rzg2l.c

3225

ret = clk_prepare_enable(pctrl->clk);

drivers/pinctrl/renesas/pinctrl-rzg2l.c

354

struct clk *clk;

drivers/pinctrl/renesas/pinctrl-rzn1.c

113

struct clk *clk;

drivers/pinctrl/renesas/pinctrl-rzn1.c

874

ipctl->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pinctrl/renesas/pinctrl-rzn1.c

875

if (IS_ERR(ipctl->clk))

drivers/pinctrl/renesas/pinctrl-rzn1.c

876

return PTR_ERR(ipctl->clk);

drivers/pinctrl/renesas/pinctrl-rzn1.c

877

ret = clk_prepare_enable(ipctl->clk);

drivers/pinctrl/renesas/pinctrl-rzn1.c

908

clk_disable_unprepare(ipctl->clk);

drivers/pinctrl/renesas/pinctrl-rzn1.c

917

clk_disable_unprepare(ipctl->clk);

drivers/pinctrl/renesas/pinctrl-rzv2m.c

1053

struct clk *clk;

drivers/pinctrl/renesas/pinctrl-rzv2m.c

1070

clk = devm_clk_get_enabled(pctrl->dev, NULL);

drivers/pinctrl/renesas/pinctrl-rzv2m.c

1071

if (IS_ERR(clk))

drivers/pinctrl/renesas/pinctrl-rzv2m.c

1072

return dev_err_probe(pctrl->dev, PTR_ERR(clk),

drivers/pinctrl/samsung/pinctrl-samsung.h

325

struct clk *pclk;

drivers/pinctrl/spacemit/pinctrl-k1.c

915

struct clk *func_clk, *bus_clk;

drivers/pinctrl/spear/pinctrl-plgpio.c

220

if (!IS_ERR(plgpio->clk)) {

drivers/pinctrl/spear/pinctrl-plgpio.c

221

ret = clk_enable(plgpio->clk);

drivers/pinctrl/spear/pinctrl-plgpio.c

251

if (!IS_ERR(plgpio->clk))

drivers/pinctrl/spear/pinctrl-plgpio.c

252

clk_disable(plgpio->clk);

drivers/pinctrl/spear/pinctrl-plgpio.c

281

if (!IS_ERR(plgpio->clk))

drivers/pinctrl/spear/pinctrl-plgpio.c

282

clk_disable(plgpio->clk);

drivers/pinctrl/spear/pinctrl-plgpio.c

563

plgpio->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pinctrl/spear/pinctrl-plgpio.c

564

if (IS_ERR(plgpio->clk))

drivers/pinctrl/spear/pinctrl-plgpio.c

590

if (!IS_ERR(plgpio->clk)) {

drivers/pinctrl/spear/pinctrl-plgpio.c

591

ret = clk_prepare(plgpio->clk);

drivers/pinctrl/spear/pinctrl-plgpio.c

628

if (!IS_ERR(plgpio->clk))

drivers/pinctrl/spear/pinctrl-plgpio.c

629

clk_unprepare(plgpio->clk);

drivers/pinctrl/spear/pinctrl-plgpio.c

70

struct clk *clk;

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

1220

struct clk *clk;

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

1236

clk = devm_clk_get(dev, NULL);

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

1237

if (IS_ERR(clk))

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

1238

return dev_err_probe(dev, PTR_ERR(clk), "could not get clock\n");

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

1244

ret = clk_prepare_enable(clk);

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

1248

ret = devm_add_action_or_reset(dev, starfive_disable_clock, clk);

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

848

struct clk *clk;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

875

clk = devm_clk_get_optional(dev, NULL);

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

876

if (IS_ERR(clk))

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

877

return dev_err_probe(dev, PTR_ERR(clk), "could not get clock\n");

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

892

if (clk) {

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

893

ret = clk_prepare_enable(clk);

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

897

ret = devm_add_action_or_reset(dev, jh7110_disable_clock, clk);

drivers/pinctrl/stm32/pinctrl-stm32-hdp.c

47

struct clk *clk;

drivers/pinctrl/stm32/pinctrl-stm32-hdp.c

628

hdp->clk = devm_clk_get_enabled(dev, NULL);

drivers/pinctrl/stm32/pinctrl-stm32-hdp.c

629

if (IS_ERR(hdp->clk))

drivers/pinctrl/stm32/pinctrl-stm32-hdp.c

630

return dev_err_probe(dev, PTR_ERR(hdp->clk), "No HDP clock provided\n");

drivers/pinctrl/stm32/pinctrl-stm32-hdp.c

685

clk_disable_unprepare(hdp->clk);

drivers/pinctrl/stm32/pinctrl-stm32-hdp.c

695

err = clk_prepare_enable(hdp->clk);

drivers/pinctrl/stm32/pinctrl-stm32.c

1976

pctl->clks[i].clk = of_clk_get_by_name(np, NULL);

drivers/pinctrl/stm32/pinctrl-stm32.c

1977

if (IS_ERR(pctl->clks[i].clk)) {

drivers/pinctrl/stm32/pinctrl-stm32.c

1979

return dev_err_probe(dev, PTR_ERR(pctl->clks[i].clk),

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1482

static int sunxi_pinctrl_get_debounce_div(struct clk *clk, int freq, int *diff)

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1484

unsigned long clock = clk_get_rate(clk);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1509

struct clk *hosc, *losc;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1576

struct clk *clk;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1703

clk = devm_clk_get_enabled(&pdev->dev, ret == 1 ? NULL : "apb");

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1704

if (IS_ERR(clk)) {

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1705

ret = PTR_ERR(clk);

drivers/pinctrl/tegra/pinctrl-tegra114.c

1461

FUNCTION(clk),

drivers/pinctrl/tegra/pinctrl-tegra124.c

1621

FUNCTION(clk),

drivers/pinctrl/tegra/pinctrl-tegra210.c

1197

FUNCTION(clk),

drivers/platform/x86/intel/int3472/clk_and_regulator.c

106

struct int3472_clock *clk = to_int3472_clk(hw);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

108

return clk->frequency;

drivers/platform/x86/intel/int3472/clk_and_regulator.c

134

int3472->clock.clk = clk_register(&adev->dev, &int3472->clock.clk_hw);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

135

if (IS_ERR(int3472->clock.clk)) {

drivers/platform/x86/intel/int3472/clk_and_regulator.c

136

ret = PTR_ERR(int3472->clock.clk);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

140

int3472->clock.cl = clkdev_create(int3472->clock.clk, NULL, int3472->sensor_name);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

150

clk_unregister(int3472->clock.clk);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

184

clk_unregister(int3472->clock.clk);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

22

static void skl_int3472_enable_clk(struct int3472_clock *clk, int enable)

drivers/platform/x86/intel/int3472/clk_and_regulator.c

24

struct int3472_discrete_device *int3472 = to_int3472_device(clk);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

28

if (clk->ena_gpio) {

drivers/platform/x86/intel/int3472/clk_and_regulator.c

29

gpiod_set_value_cansleep(clk->ena_gpio, enable);

drivers/platform/x86/intel/int3472/clk_and_regulator.c

34

args[0].integer.value = clk->imgclk_index;

drivers/pmdomain/bcm/bcm2835-power.c

137

struct clk *clk;

drivers/pmdomain/bcm/bcm2835-power.c

293

ret = clk_prepare_enable(pd->clk);

drivers/pmdomain/bcm/bcm2835-power.c

303

clk_disable_unprepare(pd->clk);

drivers/pmdomain/bcm/bcm2835-power.c

308

ret = clk_prepare_enable(pd->clk);

drivers/pmdomain/bcm/bcm2835-power.c

333

clk_disable_unprepare(pd->clk);

drivers/pmdomain/bcm/bcm2835-power.c

362

clk_disable_unprepare(pd->clk);

drivers/pmdomain/bcm/bcm2835-power.c

512

dom->clk = devm_clk_get_optional(dev->parent, name);

drivers/pmdomain/bcm/bcm2835-power.c

513

if (IS_ERR(dom->clk))

drivers/pmdomain/bcm/bcm2835-power.c

514

return dev_err_probe(dev, PTR_ERR(dom->clk), "Failed to get clock %s\n",

drivers/pmdomain/imx/gpc.c

105

clk_prepare_enable(pd->clk[i]);

drivers/pmdomain/imx/gpc.c

126

clk_disable_unprepare(pd->clk[i]);

drivers/pmdomain/imx/gpc.c

136

struct clk *clk = of_clk_get(dev->of_node, i);

drivers/pmdomain/imx/gpc.c

137

if (IS_ERR(clk))

drivers/pmdomain/imx/gpc.c

144

domain->clk[i] = clk;

drivers/pmdomain/imx/gpc.c

152

clk_put(domain->clk[i]);

drivers/pmdomain/imx/gpc.c

162

clk_put(domain->clk[i]);

drivers/pmdomain/imx/gpc.c

456

struct clk *ipg_clk;

drivers/pmdomain/imx/gpc.c

47

struct clk *clk[GPC_CLK_MAX];

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

102

struct clk_hsio_pll *clk = to_clk_hsio_pll(hw);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

106

regmap_update_bits(clk->regmap, GPR_REG2,

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

113

regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

116

regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

118

return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val,

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

124

struct clk_hsio_pll *clk = to_clk_hsio_pll(hw);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

126

regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

131

struct clk_hsio_pll *clk = to_clk_hsio_pll(hw);

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

133

return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK);

drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c

258

struct clk *clk_eb;

drivers/pmdomain/mediatek/mtk-pm-domains.c

727

struct clk *clk;

drivers/pmdomain/mediatek/mtk-pm-domains.c

809

clk = of_clk_get(node, i);

drivers/pmdomain/mediatek/mtk-pm-domains.c

810

if (IS_ERR(clk)) {

drivers/pmdomain/mediatek/mtk-pm-domains.c

811

ret = PTR_ERR(clk);

drivers/pmdomain/mediatek/mtk-pm-domains.c

817

pd->clks[clk_ind++].clk = clk;

drivers/pmdomain/mediatek/mtk-pm-domains.c

821

clk = of_clk_get(node, i + clk_ind);

drivers/pmdomain/mediatek/mtk-pm-domains.c

822

if (IS_ERR(clk)) {

drivers/pmdomain/mediatek/mtk-pm-domains.c

823

ret = PTR_ERR(clk);

drivers/pmdomain/mediatek/mtk-pm-domains.c

830

pd->subsys_clks[i].clk = clk;

drivers/pmdomain/mediatek/mtk-scpsys.c

138

struct clk *clk[MAX_CLKS];

drivers/pmdomain/mediatek/mtk-scpsys.c

210

static void scpsys_clk_disable(struct clk *clk[], int max_num)

drivers/pmdomain/mediatek/mtk-scpsys.c

215

clk_disable_unprepare(clk[i]);

drivers/pmdomain/mediatek/mtk-scpsys.c

218

static int scpsys_clk_enable(struct clk *clk[], int max_num)

drivers/pmdomain/mediatek/mtk-scpsys.c

222

for (i = 0; i < max_num && clk[i]; i++) {

drivers/pmdomain/mediatek/mtk-scpsys.c

223

ret = clk_prepare_enable(clk[i]);

drivers/pmdomain/mediatek/mtk-scpsys.c

225

scpsys_clk_disable(clk, i);

drivers/pmdomain/mediatek/mtk-scpsys.c

315

ret = scpsys_clk_enable(scpd->clk, MAX_CLKS);

drivers/pmdomain/mediatek/mtk-scpsys.c

352

scpsys_clk_disable(scpd->clk, MAX_CLKS);

drivers/pmdomain/mediatek/mtk-scpsys.c

400

scpsys_clk_disable(scpd->clk, MAX_CLKS);

drivers/pmdomain/mediatek/mtk-scpsys.c

414

static void init_clks(struct platform_device *pdev, struct clk **clk)

drivers/pmdomain/mediatek/mtk-scpsys.c

419

clk[i] = devm_clk_get(&pdev->dev, clk_names[i]);

drivers/pmdomain/mediatek/mtk-scpsys.c

430

struct clk *clk[CLK_MAX];

drivers/pmdomain/mediatek/mtk-scpsys.c

482

init_clks(pdev, clk);

drivers/pmdomain/mediatek/mtk-scpsys.c

495

struct clk *c = clk[data->clk_id[j]];

drivers/pmdomain/mediatek/mtk-scpsys.c

503

scpd->clk[j] = c;

drivers/pmdomain/qcom/cpr.c

1265

struct clk *clk;

drivers/pmdomain/qcom/cpr.c

1267

clk = clk_get(drv->dev, "ref");

drivers/pmdomain/qcom/cpr.c

1268

if (IS_ERR(clk))

drivers/pmdomain/qcom/cpr.c

1269

return PTR_ERR(clk);

drivers/pmdomain/qcom/cpr.c

1271

drv->ref_clk_khz = clk_get_rate(clk) / 1000;

drivers/pmdomain/qcom/cpr.c

1272

clk_put(clk);

drivers/pmdomain/qcom/cpr.c

236

struct clk *cpu_clk;

drivers/pmdomain/rockchip/pm-domains.c

736

struct clk *clk;

drivers/pmdomain/rockchip/pm-domains.c

749

while ((clk = of_clk_get(dev->of_node, i++)) && !IS_ERR(clk)) {

drivers/pmdomain/rockchip/pm-domains.c

750

dev_dbg(dev, "adding clock '%pC' to list of PM clocks\n", clk);

drivers/pmdomain/rockchip/pm-domains.c

751

error = pm_clk_add_clk(dev, clk);

drivers/pmdomain/rockchip/pm-domains.c

754

clk_put(clk);

drivers/pmdomain/rockchip/pm-domains.c

826

pd->clks[i].clk = of_clk_get(node, i);

drivers/pmdomain/rockchip/pm-domains.c

827

if (IS_ERR(pd->clks[i].clk)) {

drivers/pmdomain/rockchip/pm-domains.c

828

error = PTR_ERR(pd->clks[i].clk);

drivers/pmdomain/sunxi/sun20i-ppu.c

110

struct clk *clk;

drivers/pmdomain/sunxi/sun20i-ppu.c

137

clk = devm_clk_get_enabled(dev, NULL);

drivers/pmdomain/sunxi/sun20i-ppu.c

138

if (IS_ERR(clk))

drivers/pmdomain/sunxi/sun20i-ppu.c

139

return PTR_ERR(clk);

drivers/pmdomain/sunxi/sun55i-pck600.c

130

struct clk *clk;

drivers/pmdomain/sunxi/sun55i-pck600.c

158

clk = devm_clk_get_enabled(dev, NULL);

drivers/pmdomain/sunxi/sun55i-pck600.c

159

if (IS_ERR(clk))

drivers/pmdomain/sunxi/sun55i-pck600.c

160

return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");

drivers/power/reset/at91-poweroff.c

55

struct clk *sclk;

drivers/power/reset/at91-reset.c

85

struct clk *sclk;

drivers/power/reset/at91-sama5d2_shdwc.c

94

struct clk *sclk;

drivers/power/reset/qnap-poweroff.c

101

tclk = clk_get_rate(clk);

drivers/power/reset/qnap-poweroff.c

76

struct clk *clk;

drivers/power/reset/qnap-poweroff.c

95

clk = devm_clk_get(&pdev->dev, NULL);

drivers/power/reset/qnap-poweroff.c

96

if (IS_ERR(clk)) {

drivers/power/reset/qnap-poweroff.c

98

return PTR_ERR(clk);

drivers/power/sequencing/pwrseq-qcom-wcn.c

103

return clk_prepare_enable(ctx->clk);

drivers/power/sequencing/pwrseq-qcom-wcn.c

110

clk_disable_unprepare(ctx->clk);

drivers/power/sequencing/pwrseq-qcom-wcn.c

40

struct clk *clk;

drivers/power/sequencing/pwrseq-qcom-wcn.c

526

ctx->clk = devm_clk_get_optional(dev, NULL);

drivers/power/sequencing/pwrseq-qcom-wcn.c

527

if (IS_ERR(ctx->clk))

drivers/power/sequencing/pwrseq-qcom-wcn.c

528

return dev_err_probe(dev, PTR_ERR(ctx->clk),

drivers/ptp/ptp_chardev.c

135

struct ptp_clock *ptp = container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_chardev.c

170

container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_chardev.c

503

struct ptp_clock *ptp = container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_chardev.c

583

container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_chardev.c

600

struct ptp_clock *ptp = container_of(pccontext->clk, struct ptp_clock, clock);

drivers/ptp/ptp_netc.c

851

struct clk *clk;

drivers/ptp/ptp_netc.c

862

clk = devm_clk_get_optional_enabled(dev, timer_clk_src[i]);

drivers/ptp/ptp_netc.c

863

if (IS_ERR(clk))

drivers/ptp/ptp_netc.c

864

return dev_err_probe(dev, PTR_ERR(clk),

drivers/ptp/ptp_netc.c

867

if (clk) {

drivers/ptp/ptp_netc.c

868

priv->clk_freq = clk_get_rate(clk);

drivers/ptp/ptp_ocp.c

2003

struct clk_hw *clk;

drivers/ptp/ptp_ocp.c

2011

clk = clk_hw_register_fixed_rate(&pdev->dev, buf, NULL, 0,

drivers/ptp/ptp_ocp.c

2013

if (IS_ERR(clk))

drivers/ptp/ptp_ocp.c

2014

return PTR_ERR(clk);

drivers/ptp/ptp_ocp.c

2015

bp->i2c_clk = clk;

drivers/ptp/ptp_ocp.c

2018

devm_clk_hw_register_clkdev(&pdev->dev, clk, NULL, buf);

drivers/ptp/ptp_qoriq.c

417

struct clk *clk;

drivers/ptp/ptp_qoriq.c

426

clk = of_clk_get(node, 0);

drivers/ptp/ptp_qoriq.c

427

if (!IS_ERR(clk)) {

drivers/ptp/ptp_qoriq.c

428

clk_src = clk_get_rate(clk);

drivers/ptp/ptp_qoriq.c

429

clk_put(clk);

drivers/ptp/ptp_s390.c

23

static struct timespec64 eitod_to_timespec64(union tod_clock *clk)

drivers/ptp/ptp_s390.c

25

return ns_to_timespec64(eitod_to_ns(clk->eitod - TOD_UNIX_EPOCH));

drivers/ptp/ptp_s390.c

66

union tod_clock clk;

drivers/ptp/ptp_s390.c

68

store_tod_clock_ext(&clk);

drivers/ptp/ptp_s390.c

69

*device_time = ns_to_ktime(tod_to_ns(clk.tod - TOD_UNIX_EPOCH));

drivers/ptp/ptp_s390.c

70

system_counter->cycles = clk.tod;

drivers/ptp/ptp_vmclock.c

117

seq = le32_to_cpu(st->clk->seq_count) & ~1ULL;

drivers/ptp/ptp_vmclock.c

125

if (st->clk->clock_status == VMCLOCK_STATUS_UNRELIABLE)

drivers/ptp/ptp_vmclock.c

154

delta = cycle - le64_to_cpu(st->clk->counter_value);

drivers/ptp/ptp_vmclock.c

157

le64_to_cpu(st->clk->counter_period_frac_sec),

drivers/ptp/ptp_vmclock.c

158

st->clk->counter_period_shift,

drivers/ptp/ptp_vmclock.c

159

le64_to_cpu(st->clk->time_frac_sec));

drivers/ptp/ptp_vmclock.c

161

tspec->tv_sec += le64_to_cpu(st->clk->time_sec);

drivers/ptp/ptp_vmclock.c

163

if (!tai_adjust(st->clk, &tspec->tv_sec))

drivers/ptp/ptp_vmclock.c

171

if (seq == le32_to_cpu(st->clk->seq_count))

drivers/ptp/ptp_vmclock.c

343

st->clk->counter_id == VMCLOCK_COUNTER_ARM_VCNT) {

drivers/ptp/ptp_vmclock.c

347

st->clk->counter_id == VMCLOCK_COUNTER_X86_TSC) {

drivers/ptp/ptp_vmclock.c

354

if (!tai_adjust(st->clk, NULL)) {

drivers/ptp/ptp_vmclock.c

409

seq = le32_to_cpu(st->clk->seq_count) & ~1U;

drivers/ptp/ptp_vmclock.c

413

if (copy_to_user(buf, ((char *)st->clk) + *ppos, count))

drivers/ptp/ptp_vmclock.c

418

if (seq == le32_to_cpu(st->clk->seq_count)) {

drivers/ptp/ptp_vmclock.c

447

if (!(le64_to_cpu(st->clk->flags) & VMCLOCK_FLAG_NOTIFICATION_PRESENT))

drivers/ptp/ptp_vmclock.c

452

seq = le32_to_cpu(st->clk->seq_count);

drivers/ptp/ptp_vmclock.c

46

struct vmclock_abi *clk;

drivers/ptp/ptp_vmclock.c

511

resource_size(res) < sizeof(st->clk))

drivers/ptp/ptp_vmclock.c

618

if (!(le64_to_cpu(st->clk->flags) & VMCLOCK_FLAG_NOTIFICATION_PRESENT))

drivers/ptp/ptp_vmclock.c

688

st->clk = devm_memremap(dev, st->res.start, resource_size(&st->res),

drivers/ptp/ptp_vmclock.c

690

if (IS_ERR(st->clk)) {

drivers/ptp/ptp_vmclock.c

691

ret = PTR_ERR(st->clk);

drivers/ptp/ptp_vmclock.c

693

st->clk = NULL;

drivers/ptp/ptp_vmclock.c

697

if (le32_to_cpu(st->clk->magic) != VMCLOCK_MAGIC ||

drivers/ptp/ptp_vmclock.c

698

le32_to_cpu(st->clk->size) > resource_size(&st->res) ||

drivers/ptp/ptp_vmclock.c

699

le16_to_cpu(st->clk->version) != 1) {

drivers/ptp/ptp_vmclock.c

736

if (le32_to_cpu(st->clk->size) >= PAGE_SIZE) {

drivers/ptp/ptp_vmclock.c

746

if (VMCLOCK_FIELD_PRESENT(st->clk, time_frac_sec)) {

drivers/ptp/ptp_vmclock.c

84

static bool tai_adjust(struct vmclock_abi *clk, uint64_t *sec)

drivers/ptp/ptp_vmclock.c

86

if (clk->time_type == VMCLOCK_TIME_TAI)

drivers/ptp/ptp_vmclock.c

89

if (clk->time_type == VMCLOCK_TIME_UTC &&

drivers/ptp/ptp_vmclock.c

90

(le64_to_cpu(clk->flags) & VMCLOCK_FLAG_TAI_OFFSET_VALID)) {

drivers/ptp/ptp_vmclock.c

92

*sec -= (int16_t)le16_to_cpu(clk->tai_offset_sec);

drivers/pwm/pwm-apple.c

107

struct clk *clk;

drivers/pwm/pwm-apple.c

120

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/pwm/pwm-apple.c

121

if (IS_ERR(clk))

drivers/pwm/pwm-apple.c

122

return dev_err_probe(&pdev->dev, PTR_ERR(clk), "unable to get the clock");

drivers/pwm/pwm-apple.c

130

fpwm->clkrate = clk_get_rate(clk);

drivers/pwm/pwm-atmel-hlcdc.c

32

struct clk *cur_clk;

drivers/pwm/pwm-atmel-hlcdc.c

50

struct clk *new_clk = hlcdc->slow_clk;

drivers/pwm/pwm-atmel-tcb.c

119

clk_disable_unprepare(tcbpwmc->clk);

drivers/pwm/pwm-atmel-tcb.c

269

unsigned rate = clk_get_rate(tcbpwmc->clk);

drivers/pwm/pwm-atmel-tcb.c

414

tcbpwmc->clk = of_clk_get_by_name(np->parent, clk_name);

drivers/pwm/pwm-atmel-tcb.c

415

if (IS_ERR(tcbpwmc->clk))

drivers/pwm/pwm-atmel-tcb.c

416

tcbpwmc->clk = of_clk_get_by_name(np->parent, "t0_clk");

drivers/pwm/pwm-atmel-tcb.c

417

if (IS_ERR(tcbpwmc->clk)) {

drivers/pwm/pwm-atmel-tcb.c

418

err = PTR_ERR(tcbpwmc->clk);

drivers/pwm/pwm-atmel-tcb.c

458

clk_put(tcbpwmc->clk);

drivers/pwm/pwm-atmel-tcb.c

475

clk_put(tcbpwmc->clk);

drivers/pwm/pwm-atmel-tcb.c

54

struct clk *clk;

drivers/pwm/pwm-atmel-tcb.c

55

struct clk *gclk;

drivers/pwm/pwm-atmel-tcb.c

56

struct clk *slow_clk;

drivers/pwm/pwm-atmel-tcb.c

76

ret = clk_prepare_enable(tcbpwmc->clk);

drivers/pwm/pwm-atmel.c

278

clk_disable(atmel_pwm->clk);

drivers/pwm/pwm-atmel.c

290

unsigned long clkrate = clk_get_rate(atmel_pwm->clk);

drivers/pwm/pwm-atmel.c

319

ret = clk_enable(atmel_pwm->clk);

drivers/pwm/pwm-atmel.c

353

unsigned long rate = clk_get_rate(atmel_pwm->clk);

drivers/pwm/pwm-atmel.c

467

ret = clk_enable(atmel_pwm->clk);

drivers/pwm/pwm-atmel.c

482

clk_disable(atmel_pwm->clk);

drivers/pwm/pwm-atmel.c

506

atmel_pwm->clk = devm_clk_get_prepared(&pdev->dev, NULL);

drivers/pwm/pwm-atmel.c

507

if (IS_ERR(atmel_pwm->clk))

drivers/pwm/pwm-atmel.c

508

return dev_err_probe(&pdev->dev, PTR_ERR(atmel_pwm->clk),

drivers/pwm/pwm-atmel.c

80

struct clk *clk;

drivers/pwm/pwm-axi-pwmgen.c

260

struct clk *axi_clk, *clk;

drivers/pwm/pwm-axi-pwmgen.c

292

clk = devm_clk_get_optional_enabled(dev, "ext");

drivers/pwm/pwm-axi-pwmgen.c

293

if (IS_ERR(clk))

drivers/pwm/pwm-axi-pwmgen.c

294

return dev_err_probe(dev, PTR_ERR(clk), "failed to get ext clock\n");

drivers/pwm/pwm-axi-pwmgen.c

301

if (!clk)

drivers/pwm/pwm-axi-pwmgen.c

302

clk = axi_clk;

drivers/pwm/pwm-axi-pwmgen.c

304

ret = devm_clk_rate_exclusive_get(dev, clk);

drivers/pwm/pwm-axi-pwmgen.c

308

ddata->clk_rate_hz = clk_get_rate(clk);

drivers/pwm/pwm-bcm-iproc.c

121

rate = clk_get_rate(ip->clk);

drivers/pwm/pwm-bcm-iproc.c

208

ip->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/pwm/pwm-bcm-iproc.c

209

if (IS_ERR(ip->clk))

drivers/pwm/pwm-bcm-iproc.c

210

return dev_err_probe(&pdev->dev, PTR_ERR(ip->clk),

drivers/pwm/pwm-bcm-iproc.c

38

struct clk *clk;

drivers/pwm/pwm-bcm-iproc.c

89

rate = clk_get_rate(ip->clk);

drivers/pwm/pwm-bcm-kona.c

119

rate = clk_get_rate(kp->clk);

drivers/pwm/pwm-bcm-kona.c

164

ret = clk_prepare_enable(kp->clk);

drivers/pwm/pwm-bcm-kona.c

183

clk_disable_unprepare(kp->clk);

drivers/pwm/pwm-bcm-kona.c

193

ret = clk_prepare_enable(kp->clk);

drivers/pwm/pwm-bcm-kona.c

221

clk_disable_unprepare(kp->clk);

drivers/pwm/pwm-bcm-kona.c

264

clk_disable_unprepare(kp->clk);

drivers/pwm/pwm-bcm-kona.c

292

kp->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-bcm-kona.c

293

if (IS_ERR(kp->clk)) {

drivers/pwm/pwm-bcm-kona.c

295

PTR_ERR(kp->clk));

drivers/pwm/pwm-bcm-kona.c

296

return PTR_ERR(kp->clk);

drivers/pwm/pwm-bcm-kona.c

299

ret = clk_prepare_enable(kp->clk);

drivers/pwm/pwm-bcm-kona.c

311

clk_disable_unprepare(kp->clk);

drivers/pwm/pwm-bcm-kona.c

60

struct clk *clk;

drivers/pwm/pwm-bcm2835.c

121

pc->clk = devm_clk_get_enabled(dev, NULL);

drivers/pwm/pwm-bcm2835.c

122

if (IS_ERR(pc->clk))

drivers/pwm/pwm-bcm2835.c

123

return dev_err_probe(dev, PTR_ERR(pc->clk),

drivers/pwm/pwm-bcm2835.c

126

ret = devm_clk_rate_exclusive_get(dev, pc->clk);

drivers/pwm/pwm-bcm2835.c

131

pc->rate = clk_get_rate(pc->clk);

drivers/pwm/pwm-bcm2835.c

152

clk_disable_unprepare(pc->clk);

drivers/pwm/pwm-bcm2835.c

161

return clk_prepare_enable(pc->clk);

drivers/pwm/pwm-bcm2835.c

28

struct clk *clk;

drivers/pwm/pwm-berlin.c

213

bpc->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/pwm/pwm-berlin.c

214

if (IS_ERR(bpc->clk))

drivers/pwm/pwm-berlin.c

215

return PTR_ERR(bpc->clk);

drivers/pwm/pwm-berlin.c

243

clk_disable_unprepare(bpc->clk);

drivers/pwm/pwm-berlin.c

255

ret = clk_prepare_enable(bpc->clk);

drivers/pwm/pwm-berlin.c

52

struct clk *clk;

drivers/pwm/pwm-berlin.c

83

cycles = clk_get_rate(bpc->clk);

drivers/pwm/pwm-brcmstb.c

121

rate = (u64)clk_get_rate(p->clk) * (u64)cword;

drivers/pwm/pwm-brcmstb.c

241

p->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/pwm/pwm-brcmstb.c

242

if (IS_ERR(p->clk))

drivers/pwm/pwm-brcmstb.c

243

return dev_err_probe(&pdev->dev, PTR_ERR(p->clk),

drivers/pwm/pwm-brcmstb.c

265

clk_disable_unprepare(p->clk);

drivers/pwm/pwm-brcmstb.c

274

return clk_prepare_enable(p->clk);

drivers/pwm/pwm-brcmstb.c

56

struct clk *clk;

drivers/pwm/pwm-clk.c

118

clk_disable(pcchip->clk);

drivers/pwm/pwm-clk.c

31

struct clk *clk;

drivers/pwm/pwm-clk.c

51

clk_disable(pcchip->clk);

drivers/pwm/pwm-clk.c

56

ret = clk_enable(pcchip->clk);

drivers/pwm/pwm-clk.c

70

ret = clk_set_rate(pcchip->clk, rate);

drivers/pwm/pwm-clk.c

77

return clk_set_duty_cycle(pcchip->clk, duty_cycle, period);

drivers/pwm/pwm-clk.c

95

pcchip->clk = devm_clk_get_prepared(&pdev->dev, NULL);

drivers/pwm/pwm-clk.c

96

if (IS_ERR(pcchip->clk))

drivers/pwm/pwm-clk.c

97

return dev_err_probe(&pdev->dev, PTR_ERR(pcchip->clk),

drivers/pwm/pwm-clps711x.c

16

struct clk *clk;

drivers/pwm/pwm-clps711x.c

27

unsigned int freq = clk_get_rate(priv->clk);

drivers/pwm/pwm-clps711x.c

84

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-clps711x.c

85

if (IS_ERR(priv->clk))

drivers/pwm/pwm-clps711x.c

86

return PTR_ERR(priv->clk);

drivers/pwm/pwm-ep93xx.c

126

clk_disable_unprepare(ep93xx_pwm->clk);

drivers/pwm/pwm-ep93xx.c

132

ret = clk_prepare_enable(ep93xx_pwm->clk);

drivers/pwm/pwm-ep93xx.c

161

ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk");

drivers/pwm/pwm-ep93xx.c

162

if (IS_ERR(ep93xx_pwm->clk))

drivers/pwm/pwm-ep93xx.c

163

return PTR_ERR(ep93xx_pwm->clk);

drivers/pwm/pwm-ep93xx.c

37

struct clk *clk;

drivers/pwm/pwm-ep93xx.c

60

clk_disable_unprepare(ep93xx_pwm->clk);

drivers/pwm/pwm-ep93xx.c

68

ret = clk_prepare_enable(ep93xx_pwm->clk);

drivers/pwm/pwm-ep93xx.c

77

clk_disable_unprepare(ep93xx_pwm->clk);

drivers/pwm/pwm-ep93xx.c

83

clk_disable_unprepare(ep93xx_pwm->clk);

drivers/pwm/pwm-ep93xx.c

94

ret = clk_prepare_enable(ep93xx_pwm->clk);

drivers/pwm/pwm-ep93xx.c

99

c = clk_get_rate(ep93xx_pwm->clk);

drivers/pwm/pwm-fsl-ftm.c

115

rate = clk_get_rate(fpc->clk[fpc->period.clk_select]);

drivers/pwm/pwm-fsl-ftm.c

134

c = clk_get_rate(fpc->clk[index]);

drivers/pwm/pwm-fsl-ftm.c

165

fix_rate = clk_get_rate(fpc->clk[FSL_PWM_CLK_FIX]);

drivers/pwm/pwm-fsl-ftm.c

166

ext_rate = clk_get_rate(fpc->clk[FSL_PWM_CLK_EXT]);

drivers/pwm/pwm-fsl-ftm.c

260

ret = clk_prepare_enable(fpc->clk[newclk]);

drivers/pwm/pwm-fsl-ftm.c

263

clk_disable_unprepare(fpc->clk[oldclk]);

drivers/pwm/pwm-fsl-ftm.c

317

clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);

drivers/pwm/pwm-fsl-ftm.c

318

clk_disable_unprepare(fpc->clk[fpc->period.clk_select]);

drivers/pwm/pwm-fsl-ftm.c

330

ret = clk_prepare_enable(fpc->clk[fpc->period.clk_select]);

drivers/pwm/pwm-fsl-ftm.c

334

ret = clk_prepare_enable(fpc->clk[FSL_PWM_CLK_CNTEN]);

drivers/pwm/pwm-fsl-ftm.c

336

clk_disable_unprepare(fpc->clk[fpc->period.clk_select]);

drivers/pwm/pwm-fsl-ftm.c

432

fpc->clk[FSL_PWM_CLK_SYS] = devm_clk_get(&pdev->dev, "ftm_sys");

drivers/pwm/pwm-fsl-ftm.c

433

if (IS_ERR(fpc->clk[FSL_PWM_CLK_SYS])) {

drivers/pwm/pwm-fsl-ftm.c

435

return PTR_ERR(fpc->clk[FSL_PWM_CLK_SYS]);

drivers/pwm/pwm-fsl-ftm.c

438

fpc->clk[FSL_PWM_CLK_FIX] = devm_clk_get(&pdev->dev, "ftm_fix");

drivers/pwm/pwm-fsl-ftm.c

439

if (IS_ERR(fpc->clk[FSL_PWM_CLK_FIX]))

drivers/pwm/pwm-fsl-ftm.c

440

return PTR_ERR(fpc->clk[FSL_PWM_CLK_FIX]);

drivers/pwm/pwm-fsl-ftm.c

442

fpc->clk[FSL_PWM_CLK_EXT] = devm_clk_get(&pdev->dev, "ftm_ext");

drivers/pwm/pwm-fsl-ftm.c

443

if (IS_ERR(fpc->clk[FSL_PWM_CLK_EXT]))

drivers/pwm/pwm-fsl-ftm.c

444

return PTR_ERR(fpc->clk[FSL_PWM_CLK_EXT]);

drivers/pwm/pwm-fsl-ftm.c

446

fpc->clk[FSL_PWM_CLK_CNTEN] =

drivers/pwm/pwm-fsl-ftm.c

448

if (IS_ERR(fpc->clk[FSL_PWM_CLK_CNTEN]))

drivers/pwm/pwm-fsl-ftm.c

449

return PTR_ERR(fpc->clk[FSL_PWM_CLK_CNTEN]);

drivers/pwm/pwm-fsl-ftm.c

457

fpc->ipg_clk = fpc->clk[FSL_PWM_CLK_SYS];

drivers/pwm/pwm-fsl-ftm.c

493

clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);

drivers/pwm/pwm-fsl-ftm.c

494

clk_disable_unprepare(fpc->clk[fpc->period.clk_select]);

drivers/pwm/pwm-fsl-ftm.c

50

struct clk *ipg_clk;

drivers/pwm/pwm-fsl-ftm.c

51

struct clk *clk[FSL_PWM_CLK_MAX];

drivers/pwm/pwm-fsl-ftm.c

517

clk_prepare_enable(fpc->clk[fpc->period.clk_select]);

drivers/pwm/pwm-fsl-ftm.c

518

clk_prepare_enable(fpc->clk[FSL_PWM_CLK_CNTEN]);

drivers/pwm/pwm-hibvt.c

104

freq = div_u64(clk_get_rate(hi_pwm_chip->clk), 1000000);

drivers/pwm/pwm-hibvt.c

137

freq = div_u64(clk_get_rate(hi_pwm_chip->clk), 1000000);

drivers/pwm/pwm-hibvt.c

202

hi_pwm_chip->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-hibvt.c

203

if (IS_ERR(hi_pwm_chip->clk)) {

drivers/pwm/pwm-hibvt.c

205

PTR_ERR(hi_pwm_chip->clk));

drivers/pwm/pwm-hibvt.c

206

return PTR_ERR(hi_pwm_chip->clk);

drivers/pwm/pwm-hibvt.c

216

ret = clk_prepare_enable(hi_pwm_chip->clk);

drivers/pwm/pwm-hibvt.c

222

clk_disable_unprepare(hi_pwm_chip->clk);

drivers/pwm/pwm-hibvt.c

232

clk_disable_unprepare(hi_pwm_chip->clk);

drivers/pwm/pwm-hibvt.c

257

clk_disable_unprepare(hi_pwm_chip->clk);

drivers/pwm/pwm-hibvt.c

36

struct clk *clk;

drivers/pwm/pwm-img.c

62

struct clk *pwm_clk;

drivers/pwm/pwm-img.c

63

struct clk *sys_clk;

drivers/pwm/pwm-imx-tpm.c

149

rate = clk_get_rate(tpm->clk);

drivers/pwm/pwm-imx-tpm.c

352

struct clk *clk;

drivers/pwm/pwm-imx-tpm.c

362

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/pwm/pwm-imx-tpm.c

363

if (IS_ERR(clk))

drivers/pwm/pwm-imx-tpm.c

364

return dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/pwm/pwm-imx-tpm.c

379

tpm->clk = clk;

drivers/pwm/pwm-imx-tpm.c

407

clk_disable_unprepare(tpm->clk);

drivers/pwm/pwm-imx-tpm.c

411

clk_prepare_enable(tpm->clk);

drivers/pwm/pwm-imx-tpm.c

425

ret = clk_prepare_enable(tpm->clk);

drivers/pwm/pwm-imx-tpm.c

61

struct clk *clk;

drivers/pwm/pwm-imx-tpm.c

96

rate = clk_get_rate(tpm->clk);

drivers/pwm/pwm-imx1.c

28

struct clk *clk_ipg;

drivers/pwm/pwm-imx1.c

29

struct clk *clk_per;

drivers/pwm/pwm-imx27.c

135

pwm_clk = clk_get_rate(imx->clks[PWM_IMX27_PER].clk);

drivers/pwm/pwm-imx27.c

212

clkrate = clk_get_rate(imx->clks[PWM_IMX27_PER].clk);

drivers/pwm/pwm-intel-lgm.c

132

struct clk *clk = data;

drivers/pwm/pwm-intel-lgm.c

134

clk_disable_unprepare(clk);

drivers/pwm/pwm-intel-lgm.c

137

static int lgm_clk_enable(struct device *dev, struct clk *clk)

drivers/pwm/pwm-intel-lgm.c

141

ret = clk_prepare_enable(clk);

drivers/pwm/pwm-intel-lgm.c

145

return devm_add_action_or_reset(dev, lgm_clk_release, clk);

drivers/pwm/pwm-intel-lgm.c

173

struct clk *clk;

drivers/pwm/pwm-intel-lgm.c

190

clk = devm_clk_get(dev, NULL);

drivers/pwm/pwm-intel-lgm.c

191

if (IS_ERR(clk))

drivers/pwm/pwm-intel-lgm.c

192

return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");

drivers/pwm/pwm-intel-lgm.c

194

ret = lgm_clk_enable(dev, clk);

drivers/pwm/pwm-jz4740.c

128

struct clk *clk = jz->clk[pwm->hwpwm];

drivers/pwm/pwm-jz4740.c

150

rate = clk_round_rate(clk, tmp);

drivers/pwm/pwm-jz4740.c

171

err = clk_set_rate(clk, rate);

drivers/pwm/pwm-jz4740.c

233

chip = devm_pwmchip_alloc(dev, info->num_pwms, struct_size(jz, clk, info->num_pwms));

drivers/pwm/pwm-jz4740.c

29

struct clk *clk[];

drivers/pwm/pwm-jz4740.c

52

struct clk *clk;

drivers/pwm/pwm-jz4740.c

61

clk = clk_get(pwmchip_parent(chip), name);

drivers/pwm/pwm-jz4740.c

62

if (IS_ERR(clk)) {

drivers/pwm/pwm-jz4740.c

64

"error %pe: Failed to get clock\n", clk);

drivers/pwm/pwm-jz4740.c

65

return PTR_ERR(clk);

drivers/pwm/pwm-jz4740.c

68

err = clk_prepare_enable(clk);

drivers/pwm/pwm-jz4740.c

70

clk_put(clk);

drivers/pwm/pwm-jz4740.c

74

jz->clk[pwm->hwpwm] = clk;

drivers/pwm/pwm-jz4740.c

82

struct clk *clk = jz->clk[pwm->hwpwm];

drivers/pwm/pwm-jz4740.c

84

clk_disable_unprepare(clk);

drivers/pwm/pwm-jz4740.c

85

clk_put(clk);

drivers/pwm/pwm-keembay.c

153

clk_rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-keembay.c

196

priv->clk = devm_clk_get(dev, NULL);

drivers/pwm/pwm-keembay.c

197

if (IS_ERR(priv->clk))

drivers/pwm/pwm-keembay.c

198

return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to get clock\n");

drivers/pwm/pwm-keembay.c

204

ret = keembay_clk_enable(dev, priv->clk);

drivers/pwm/pwm-keembay.c

40

struct clk *clk;

drivers/pwm/pwm-keembay.c

54

static int keembay_clk_enable(struct device *dev, struct clk *clk)

drivers/pwm/pwm-keembay.c

58

ret = clk_prepare_enable(clk);

drivers/pwm/pwm-keembay.c

62

return devm_add_action_or_reset(dev, keembay_clk_unprepare, clk);

drivers/pwm/pwm-keembay.c

99

clk_rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-loongson.c

207

ddata->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/pwm/pwm-loongson.c

208

if (IS_ERR(ddata->clk))

drivers/pwm/pwm-loongson.c

209

return dev_err_probe(dev, PTR_ERR(ddata->clk),

drivers/pwm/pwm-loongson.c

211

if (ddata->clk) {

drivers/pwm/pwm-loongson.c

212

ret = devm_clk_rate_exclusive_get(dev, ddata->clk);

drivers/pwm/pwm-loongson.c

217

ddata->clk_rate = clk_get_rate(ddata->clk);

drivers/pwm/pwm-loongson.c

249

clk_disable_unprepare(ddata->clk);

drivers/pwm/pwm-loongson.c

259

return clk_prepare_enable(ddata->clk);

drivers/pwm/pwm-loongson.c

55

struct clk *clk;

drivers/pwm/pwm-lpc18xx-sct.c

96

struct clk *pwm_clk;

drivers/pwm/pwm-lpc32xx.c

137

lpc32xx->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-lpc32xx.c

138

if (IS_ERR(lpc32xx->clk))

drivers/pwm/pwm-lpc32xx.c

139

return PTR_ERR(lpc32xx->clk);

drivers/pwm/pwm-lpc32xx.c

18

struct clk *clk;

drivers/pwm/pwm-lpc32xx.c

37

c = clk_get_rate(lpc32xx->clk);

drivers/pwm/pwm-lpc32xx.c

69

ret = clk_prepare_enable(lpc32xx->clk);

drivers/pwm/pwm-lpc32xx.c

89

clk_disable_unprepare(lpc32xx->clk);

drivers/pwm/pwm-mediatek.c

106

clk_disable_unprepare(pc->clk_pwms[hwpwm].clk);

drivers/pwm/pwm-mediatek.c

118

clk_disable_unprepare(pc->clk_pwms[hwpwm].clk);

drivers/pwm/pwm-mediatek.c

164

struct clk *clk = pc->clk_pwms[pwm->hwpwm].clk;

drivers/pwm/pwm-mediatek.c

166

ret = clk_prepare_enable(clk);

drivers/pwm/pwm-mediatek.c

170

pc->clk_pwms[pwm->hwpwm].rate = clk_get_rate(clk);

drivers/pwm/pwm-mediatek.c

172

clk_disable_unprepare(clk);

drivers/pwm/pwm-mediatek.c

473

pc->clk_pwms[i].clk = devm_clk_get(&pdev->dev, name);

drivers/pwm/pwm-mediatek.c

474

if (IS_ERR(pc->clk_pwms[i].clk))

drivers/pwm/pwm-mediatek.c

475

return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk_pwms[i].clk),

drivers/pwm/pwm-mediatek.c

478

ret = devm_clk_rate_exclusive_get(&pdev->dev, pc->clk_pwms[i].clk);

drivers/pwm/pwm-mediatek.c

57

struct clk *clk_top;

drivers/pwm/pwm-mediatek.c

58

struct clk *clk_main;

drivers/pwm/pwm-mediatek.c

61

struct clk *clk;

drivers/pwm/pwm-mediatek.c

85

ret = clk_prepare_enable(pc->clk_pwms[hwpwm].clk);

drivers/pwm/pwm-mediatek.c

90

pc->clk_pwms[hwpwm].rate = clk_get_rate(pc->clk_pwms[hwpwm].clk);

drivers/pwm/pwm-meson.c

108

struct clk *clk;

drivers/pwm/pwm-meson.c

141

err = clk_prepare_enable(channel->clk);

drivers/pwm/pwm-meson.c

144

__clk_get_name(channel->clk), err);

drivers/pwm/pwm-meson.c

156

clk_disable_unprepare(channel->clk);

drivers/pwm/pwm-meson.c

184

fin_freq = clk_round_rate(channel->clk, freq);

drivers/pwm/pwm-meson.c

235

err = clk_set_rate(channel->clk, channel->rate);

drivers/pwm/pwm-meson.c

349

fin_freq = clk_get_rate(meson->channels[pwm->hwpwm].clk);

drivers/pwm/pwm-meson.c

454

channel->clk = devm_clk_hw_get_clk(dev, &channel->gate.hw, NULL);

drivers/pwm/pwm-meson.c

455

if (IS_ERR(channel->clk))

drivers/pwm/pwm-meson.c

456

return dev_err_probe(dev, PTR_ERR(channel->clk),

drivers/pwm/pwm-meson.c

501

struct clk *clk = data;

drivers/pwm/pwm-meson.c

503

clk_put(clk);

drivers/pwm/pwm-meson.c

514

meson->channels[i].clk = of_clk_get(np, i);

drivers/pwm/pwm-meson.c

515

if (IS_ERR(meson->channels[i].clk))

drivers/pwm/pwm-meson.c

517

PTR_ERR(meson->channels[i].clk),

drivers/pwm/pwm-meson.c

521

meson->channels[i].clk);

drivers/pwm/pwm-microchip-core.c

291

clk_rate = clk_get_rate(mchp_core_pwm->clk);

drivers/pwm/pwm-microchip-core.c

382

rate = clk_get_rate(mchp_core_pwm->clk);

drivers/pwm/pwm-microchip-core.c

450

mchp_core_pwm->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/pwm/pwm-microchip-core.c

451

if (IS_ERR(mchp_core_pwm->clk))

drivers/pwm/pwm-microchip-core.c

452

return dev_err_probe(&pdev->dev, PTR_ERR(mchp_core_pwm->clk),

drivers/pwm/pwm-microchip-core.c

56

struct clk *clk;

drivers/pwm/pwm-mtk-disp.c

46

struct clk *clk_main;

drivers/pwm/pwm-mtk-disp.c

47

struct clk *clk_mm;

drivers/pwm/pwm-mxs.c

113

clk_disable_unprepare(mxs->clk);

drivers/pwm/pwm-mxs.c

145

mxs->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-mxs.c

146

if (IS_ERR(mxs->clk))

drivers/pwm/pwm-mxs.c

147

return PTR_ERR(mxs->clk);

drivers/pwm/pwm-mxs.c

40

struct clk *clk;

drivers/pwm/pwm-mxs.c

65

ret = clk_prepare_enable(mxs->clk);

drivers/pwm/pwm-mxs.c

73

rate = clk_get_rate(mxs->clk);

drivers/pwm/pwm-omap-dmtimer.c

154

struct clk *fclk;

drivers/pwm/pwm-pxa.c

113

err = clk_prepare_enable(pc->clk);

drivers/pwm/pwm-pxa.c

121

clk_disable_unprepare(pc->clk);

drivers/pwm/pwm-pxa.c

128

clk_disable_unprepare(pc->clk);

drivers/pwm/pwm-pxa.c

131

clk_disable_unprepare(pc->clk);

drivers/pwm/pwm-pxa.c

180

pc->clk = devm_clk_get(dev, NULL);

drivers/pwm/pwm-pxa.c

181

if (IS_ERR(pc->clk))

drivers/pwm/pwm-pxa.c

182

return dev_err_probe(dev, PTR_ERR(pc->clk), "Failed to get clock\n");

drivers/pwm/pwm-pxa.c

55

struct clk *clk;

drivers/pwm/pwm-pxa.c

78

c = clk_get_rate(pc->clk);

drivers/pwm/pwm-rcar.c

110

unsigned long clk_rate = clk_get_rate(rp->clk);

drivers/pwm/pwm-rcar.c

219

rcar_pwm->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-rcar.c

220

if (IS_ERR(rcar_pwm->clk)) {

drivers/pwm/pwm-rcar.c

222

return PTR_ERR(rcar_pwm->clk);

drivers/pwm/pwm-rcar.c

43

struct clk *clk;

drivers/pwm/pwm-rcar.c

75

unsigned long clk_rate = clk_get_rate(rp->clk);

drivers/pwm/pwm-renesas-tpu.c

153

ret = clk_prepare_enable(tpd->tpu->clk);

drivers/pwm/pwm-renesas-tpu.c

202

clk_disable_unprepare(tpd->tpu->clk);

drivers/pwm/pwm-renesas-tpu.c

254

clk_rate = clk_get_rate(tpu->clk);

drivers/pwm/pwm-renesas-tpu.c

460

tpu->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-renesas-tpu.c

461

if (IS_ERR(tpu->clk))

drivers/pwm/pwm-renesas-tpu.c

462

return dev_err_probe(&pdev->dev, PTR_ERR(tpu->clk), "Failed to get clock\n");

drivers/pwm/pwm-renesas-tpu.c

85

struct clk *clk;

drivers/pwm/pwm-rockchip.c

114

clk_rate = clk_get_rate(pc->clk);

drivers/pwm/pwm-rockchip.c

173

ret = clk_enable(pc->clk);

drivers/pwm/pwm-rockchip.c

188

clk_disable(pc->clk);

drivers/pwm/pwm-rockchip.c

205

ret = clk_enable(pc->clk);

drivers/pwm/pwm-rockchip.c

228

clk_disable(pc->clk);

drivers/pwm/pwm-rockchip.c

320

pc->clk = devm_clk_get(&pdev->dev, "pwm");

drivers/pwm/pwm-rockchip.c

321

if (IS_ERR(pc->clk)) {

drivers/pwm/pwm-rockchip.c

322

pc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-rockchip.c

323

if (IS_ERR(pc->clk))

drivers/pwm/pwm-rockchip.c

324

return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),

drivers/pwm/pwm-rockchip.c

333

pc->pclk = pc->clk;

drivers/pwm/pwm-rockchip.c

338

ret = clk_prepare_enable(pc->clk);

drivers/pwm/pwm-rockchip.c

35

struct clk *clk;

drivers/pwm/pwm-rockchip.c

36

struct clk *pclk;

drivers/pwm/pwm-rockchip.c

365

clk_disable(pc->clk);

drivers/pwm/pwm-rockchip.c

374

clk_disable_unprepare(pc->clk);

drivers/pwm/pwm-rockchip.c

387

clk_unprepare(pc->clk);

drivers/pwm/pwm-rockchip.c

77

ret = clk_enable(pc->clk);

drivers/pwm/pwm-rockchip.c

81

clk_rate = clk_get_rate(pc->clk);

drivers/pwm/pwm-rockchip.c

99

clk_disable(pc->clk);

drivers/pwm/pwm-rz-mtu3.c

446

clk_disable_unprepare(rz_mtu3_pwm->clk);

drivers/pwm/pwm-rz-mtu3.c

456

return clk_prepare_enable(rz_mtu3_pwm->clk);

drivers/pwm/pwm-rz-mtu3.c

468

clk_rate_exclusive_put(rz_mtu3_pwm->clk);

drivers/pwm/pwm-rz-mtu3.c

488

rz_mtu3_pwm->clk = parent_ddata->clk;

drivers/pwm/pwm-rz-mtu3.c

502

ret = clk_prepare_enable(rz_mtu3_pwm->clk);

drivers/pwm/pwm-rz-mtu3.c

506

clk_rate_exclusive_get(rz_mtu3_pwm->clk);

drivers/pwm/pwm-rz-mtu3.c

508

rz_mtu3_pwm->rate = clk_get_rate(rz_mtu3_pwm->clk);

drivers/pwm/pwm-rz-mtu3.c

515

clk_rate_exclusive_put(rz_mtu3_pwm->clk);

drivers/pwm/pwm-rz-mtu3.c

536

clk_disable_unprepare(rz_mtu3_pwm->clk);

drivers/pwm/pwm-rz-mtu3.c

74

struct clk *clk;

drivers/pwm/pwm-rzg2l-gpt.c

385

struct clk *clk;

drivers/pwm/pwm-rzg2l-gpt.c

401

clk = devm_clk_get_enabled(dev, NULL);

drivers/pwm/pwm-rzg2l-gpt.c

402

if (IS_ERR(clk))

drivers/pwm/pwm-rzg2l-gpt.c

403

return dev_err_probe(dev, PTR_ERR(clk), "Cannot get clock\n");

drivers/pwm/pwm-rzg2l-gpt.c

405

ret = devm_clk_rate_exclusive_get(dev, clk);

drivers/pwm/pwm-rzg2l-gpt.c

409

rate = clk_get_rate(clk);

drivers/pwm/pwm-samsung.c

188

struct clk *clk;

drivers/pwm/pwm-samsung.c

192

clk = (chan < 2) ? our_chip->tclk0 : our_chip->tclk1;

drivers/pwm/pwm-samsung.c

193

if (!IS_ERR(clk)) {

drivers/pwm/pwm-samsung.c

194

rate = clk_get_rate(clk);

drivers/pwm/pwm-samsung.c

87

struct clk *base_clk;

drivers/pwm/pwm-samsung.c

88

struct clk *tclk0;

drivers/pwm/pwm-samsung.c

89

struct clk *tclk1;

drivers/pwm/pwm-sifive.c

202

pwm_sifive_update_clock(ddata, clk_get_rate(ddata->clk));

drivers/pwm/pwm-sifive.c

212

ret = clk_enable(ddata->clk);

drivers/pwm/pwm-sifive.c

222

clk_disable(ddata->clk);

drivers/pwm/pwm-sifive.c

272

ddata->clk = devm_clk_get_prepared(dev, NULL);

drivers/pwm/pwm-sifive.c

273

if (IS_ERR(ddata->clk))

drivers/pwm/pwm-sifive.c

274

return dev_err_probe(dev, PTR_ERR(ddata->clk),

drivers/pwm/pwm-sifive.c

277

ret = clk_enable(ddata->clk);

drivers/pwm/pwm-sifive.c

298

ret = clk_enable(ddata->clk);

drivers/pwm/pwm-sifive.c

306

clk_disable(ddata->clk);

drivers/pwm/pwm-sifive.c

312

ret = clk_notifier_register(ddata->clk, &ddata->notifier);

drivers/pwm/pwm-sifive.c

330

clk_notifier_unregister(ddata->clk, &ddata->notifier);

drivers/pwm/pwm-sifive.c

333

clk_disable(ddata->clk);

drivers/pwm/pwm-sifive.c

348

clk_notifier_unregister(ddata->clk, &ddata->notifier);

drivers/pwm/pwm-sifive.c

353

clk_disable(ddata->clk);

drivers/pwm/pwm-sifive.c

64

struct clk *clk;

drivers/pwm/pwm-sophgo-sg2042.c

245

struct clk *clk;

drivers/pwm/pwm-sophgo-sg2042.c

261

clk = devm_clk_get_enabled(dev, "apb");

drivers/pwm/pwm-sophgo-sg2042.c

262

if (IS_ERR(clk))

drivers/pwm/pwm-sophgo-sg2042.c

263

return dev_err_probe(dev, PTR_ERR(clk), "Failed to get base clk\n");

drivers/pwm/pwm-sophgo-sg2042.c

265

ret = devm_clk_rate_exclusive_get(dev, clk);

drivers/pwm/pwm-sophgo-sg2042.c

269

ddata->clk_rate_hz = clk_get_rate(clk);

drivers/pwm/pwm-spear.c

122

ret = clk_enable(pc->clk);

drivers/pwm/pwm-spear.c

130

clk_disable(pc->clk);

drivers/pwm/pwm-spear.c

141

rc = clk_enable(pc->clk);

drivers/pwm/pwm-spear.c

161

clk_disable(pc->clk);

drivers/pwm/pwm-spear.c

209

pc->clk = devm_clk_get_prepared(&pdev->dev, NULL);

drivers/pwm/pwm-spear.c

210

if (IS_ERR(pc->clk))

drivers/pwm/pwm-spear.c

211

return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),

drivers/pwm/pwm-spear.c

217

ret = clk_enable(pc->clk);

drivers/pwm/pwm-spear.c

230

clk_disable(pc->clk);

drivers/pwm/pwm-spear.c

54

struct clk *clk;

drivers/pwm/pwm-spear.c

93

clk_rate = clk_get_rate(pc->clk);

drivers/pwm/pwm-sprd.c

218

struct clk *clk_pwm;

drivers/pwm/pwm-sprd.c

238

clk_pwm = chn[i].clks[SPRD_PWM_CHN_OUTPUT_CLK].clk;

drivers/pwm/pwm-sti.c

78

struct clk *pwm_clk;

drivers/pwm/pwm-sti.c

79

struct clk *cpt_clk;

drivers/pwm/pwm-stm32-lp.c

112

rate = clk_get_rate(priv->clk) >> presc;

drivers/pwm/pwm-stm32-lp.c

160

clk_disable(priv->clk);

drivers/pwm/pwm-stm32-lp.c

166

div = (unsigned long long)clk_get_rate(priv->clk) * state->period;

drivers/pwm/pwm-stm32-lp.c

208

ret = clk_enable(priv->clk);

drivers/pwm/pwm-stm32-lp.c

21

struct clk *clk;

drivers/pwm/pwm-stm32-lp.c

289

clk_disable(priv->clk);

drivers/pwm/pwm-stm32-lp.c

299

unsigned long rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-stm32-lp.c

318

int ret = clk_enable(priv->clk);

drivers/pwm/pwm-stm32-lp.c

375

priv->clk = ddata->clk;

drivers/pwm/pwm-stm32.c

189

clk_disable(priv->clk);

drivers/pwm/pwm-stm32.c

217

unsigned long rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-stm32.c

262

ret = clk_enable(priv->clk);

drivers/pwm/pwm-stm32.c

291

clk_disable(priv->clk);

drivers/pwm/pwm-stm32.c

305

ret = clk_enable(priv->clk);

drivers/pwm/pwm-stm32.c

32

struct clk *clk;

drivers/pwm/pwm-stm32.c

383

ret = clk_enable(priv->clk);

drivers/pwm/pwm-stm32.c

423

clk_disable(priv->clk);

drivers/pwm/pwm-stm32.c

428

clk_disable(priv->clk);

drivers/pwm/pwm-stm32.c

550

ret = clk_enable(priv->clk);

drivers/pwm/pwm-stm32.c

556

rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-stm32.c

683

clk_disable(priv->clk);

drivers/pwm/pwm-stm32.c

82

ret = clk_enable(priv->clk);

drivers/pwm/pwm-stm32.c

852

priv->clk = ddata->clk;

drivers/pwm/pwm-stm32.c

855

if (!priv->regmap || !priv->clk)

drivers/pwm/pwm-stm32.c

866

ret = devm_clk_rate_exclusive_get(dev, priv->clk);

drivers/pwm/pwm-stm32.c

874

if (clk_get_rate(priv->clk) > 1000000000)

drivers/pwm/pwm-stm32.c

876

clk_get_rate(priv->clk));

drivers/pwm/pwm-stm32.c

882

ret = clk_enable(priv->clk);

drivers/pwm/pwm-stm32.c

90

rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-sun4i.c

116

clk_rate = clk_get_rate(sun4ichip->clk);

drivers/pwm/pwm-sun4i.c

175

clk_rate = clk_get_rate(sun4ichip->clk);

drivers/pwm/pwm-sun4i.c

243

ret = clk_prepare_enable(sun4ichip->clk);

drivers/pwm/pwm-sun4i.c

255

clk_disable_unprepare(sun4ichip->clk);

drivers/pwm/pwm-sun4i.c

311

clk_disable_unprepare(sun4ichip->clk);

drivers/pwm/pwm-sun4i.c

408

sun4ichip->clk = devm_clk_get_optional(&pdev->dev, "mod");

drivers/pwm/pwm-sun4i.c

409

if (IS_ERR(sun4ichip->clk))

drivers/pwm/pwm-sun4i.c

410

return dev_err_probe(&pdev->dev, PTR_ERR(sun4ichip->clk),

drivers/pwm/pwm-sun4i.c

413

if (!sun4ichip->clk) {

drivers/pwm/pwm-sun4i.c

414

sun4ichip->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-sun4i.c

415

if (IS_ERR(sun4ichip->clk))

drivers/pwm/pwm-sun4i.c

416

return dev_err_probe(&pdev->dev, PTR_ERR(sun4ichip->clk),

drivers/pwm/pwm-sun4i.c

83

struct clk *bus_clk;

drivers/pwm/pwm-sun4i.c

84

struct clk *clk;

drivers/pwm/pwm-sunplus.c

137

clk_rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-sunplus.c

169

struct clk *clk = data;

drivers/pwm/pwm-sunplus.c

171

clk_disable_unprepare(clk);

drivers/pwm/pwm-sunplus.c

190

priv->clk = devm_clk_get(dev, NULL);

drivers/pwm/pwm-sunplus.c

191

if (IS_ERR(priv->clk))

drivers/pwm/pwm-sunplus.c

192

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/pwm/pwm-sunplus.c

195

ret = clk_prepare_enable(priv->clk);

drivers/pwm/pwm-sunplus.c

201

ret = devm_add_action_or_reset(dev, sunplus_pwm_clk_release, priv->clk);

drivers/pwm/pwm-sunplus.c

47

struct clk *clk;

drivers/pwm/pwm-sunplus.c

77

clk_rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-tegra.c

147

if (required_clk_rate > clk_round_rate(pc->clk, required_clk_rate))

drivers/pwm/pwm-tegra.c

163

pc->clk_rate = clk_get_rate(pc->clk);

drivers/pwm/pwm-tegra.c

292

pc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/pwm/pwm-tegra.c

293

if (IS_ERR(pc->clk))

drivers/pwm/pwm-tegra.c

294

return PTR_ERR(pc->clk);

drivers/pwm/pwm-tegra.c

317

pc->clk_rate = clk_get_rate(pc->clk);

drivers/pwm/pwm-tegra.c

368

clk_disable_unprepare(pc->clk);

drivers/pwm/pwm-tegra.c

372

clk_prepare_enable(pc->clk);

drivers/pwm/pwm-tegra.c

389

err = clk_prepare_enable(pc->clk);

drivers/pwm/pwm-tegra.c

68

struct clk *clk;

drivers/pwm/pwm-tiecap.c

225

struct clk *clk;

drivers/pwm/pwm-tiecap.c

233

clk = devm_clk_get(&pdev->dev, "fck");

drivers/pwm/pwm-tiecap.c

234

if (IS_ERR(clk)) {

drivers/pwm/pwm-tiecap.c

237

clk = devm_clk_get(pdev->dev.parent, "fck");

drivers/pwm/pwm-tiecap.c

241

if (IS_ERR(clk)) {

drivers/pwm/pwm-tiecap.c

243

return PTR_ERR(clk);

drivers/pwm/pwm-tiecap.c

246

pc->clk_rate = clk_get_rate(clk);

drivers/pwm/pwm-tiehrpwm.c

107

struct clk *tbclk;

drivers/pwm/pwm-tiehrpwm.c

419

struct clk *clk;

drivers/pwm/pwm-tiehrpwm.c

427

clk = devm_clk_get(&pdev->dev, "fck");

drivers/pwm/pwm-tiehrpwm.c

428

if (IS_ERR(clk)) {

drivers/pwm/pwm-tiehrpwm.c

431

clk = devm_clk_get(pdev->dev.parent, "fck");

drivers/pwm/pwm-tiehrpwm.c

435

if (IS_ERR(clk))

drivers/pwm/pwm-tiehrpwm.c

436

return dev_err_probe(&pdev->dev, PTR_ERR(clk), "Failed to get fck\n");

drivers/pwm/pwm-tiehrpwm.c

438

pc->clk_rate = clk_get_rate(clk);

drivers/pwm/pwm-vt8500.c

100

clk_disable(vt8500->clk);

drivers/pwm/pwm-vt8500.c

122

clk_disable(vt8500->clk);

drivers/pwm/pwm-vt8500.c

132

err = clk_enable(vt8500->clk);

drivers/pwm/pwm-vt8500.c

156

clk_disable(vt8500->clk);

drivers/pwm/pwm-vt8500.c

252

vt8500->clk = devm_clk_get_prepared(&pdev->dev, NULL);

drivers/pwm/pwm-vt8500.c

253

if (IS_ERR(vt8500->clk))

drivers/pwm/pwm-vt8500.c

254

return dev_err_probe(&pdev->dev, PTR_ERR(vt8500->clk), "clock source not specified\n");

drivers/pwm/pwm-vt8500.c

49

struct clk *clk;

drivers/pwm/pwm-vt8500.c

81

err = clk_enable(vt8500->clk);

drivers/pwm/pwm-vt8500.c

87

c = clk_get_rate(vt8500->clk);

drivers/pwm/pwm-xilinx.c

113

rate = clk_get_rate(priv->clk);

drivers/pwm/pwm-xilinx.c

265

priv->clk = devm_clk_get_enabled(dev, "s_axi_aclk");

drivers/pwm/pwm-xilinx.c

266

if (IS_ERR(priv->clk))

drivers/pwm/pwm-xilinx.c

267

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/pwm/pwm-xilinx.c

270

ret = devm_clk_rate_exclusive_get(dev, priv->clk);

drivers/pwm/pwm-xilinx.c

56

clk_get_rate(priv->clk));

drivers/regulator/fixed.c

40

struct clk *enable_clock;

drivers/regulator/raa215300.c

54

struct clk *clk;

drivers/regulator/raa215300.c

56

clk = devm_clk_get_optional(&client->dev, name);

drivers/regulator/raa215300.c

57

if (IS_ERR(clk))

drivers/regulator/raa215300.c

58

return PTR_ERR(clk);

drivers/regulator/raa215300.c

60

return !!clk;

drivers/regulator/stm32-vrefbuf.c

184

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/regulator/stm32-vrefbuf.c

185

if (IS_ERR(priv->clk))

drivers/regulator/stm32-vrefbuf.c

186

return PTR_ERR(priv->clk);

drivers/regulator/stm32-vrefbuf.c

195

ret = clk_prepare_enable(priv->clk);

drivers/regulator/stm32-vrefbuf.c

221

clk_disable_unprepare(priv->clk);

drivers/regulator/stm32-vrefbuf.c

237

clk_disable_unprepare(priv->clk);

drivers/regulator/stm32-vrefbuf.c

248

clk_disable_unprepare(priv->clk);

drivers/regulator/stm32-vrefbuf.c

258

return clk_prepare_enable(priv->clk);

drivers/regulator/stm32-vrefbuf.c

32

struct clk *clk;

drivers/regulator/ti-abb-regulator.c

442

abb->clk = devm_clk_get(dev, NULL);

drivers/regulator/ti-abb-regulator.c

443

if (IS_ERR(abb->clk)) {

drivers/regulator/ti-abb-regulator.c

444

ret = PTR_ERR(abb->clk);

drivers/regulator/ti-abb-regulator.c

473

clk_rate = DIV_ROUND_CLOSEST(clk_get_rate(abb->clk), 1000000);

drivers/regulator/ti-abb-regulator.c

482

clk_get_rate(abb->clk), sr2_wt_cnt_val);

drivers/regulator/ti-abb-regulator.c

93

struct clk *clk;

drivers/regulator/tps68470-regulator.c

151

data->clk = devm_clk_get(dev, "tps68470-clk");

drivers/regulator/tps68470-regulator.c

152

if (IS_ERR(data->clk))

drivers/regulator/tps68470-regulator.c

153

return dev_err_probe(dev, PTR_ERR(data->clk), "getting tps68470-clk\n");

drivers/regulator/tps68470-regulator.c

29

struct clk *clk;

drivers/regulator/tps68470-regulator.c

64

ret = clk_prepare_enable(data->clk);

drivers/regulator/tps68470-regulator.c

79

clk_disable_unprepare(data->clk);

drivers/regulator/uniphier-regulator.c

113

clk_bulk_disable_unprepare(priv->data->nclks, priv->clk);

drivers/regulator/uniphier-regulator.c

126

clk_bulk_disable_unprepare(priv->data->nclks, priv->clk);

drivers/regulator/uniphier-regulator.c

30

struct clk_bulk_data clk[MAX_CLKS];

drivers/regulator/uniphier-regulator.c

65

priv->clk[i].id = priv->data->clock_names[i];

drivers/regulator/uniphier-regulator.c

66

ret = devm_clk_bulk_get(dev, priv->data->nclks, priv->clk);

drivers/regulator/uniphier-regulator.c

77

ret = clk_bulk_prepare_enable(priv->data->nclks, priv->clk);

drivers/remoteproc/da8xx_remoteproc.c

137

struct clk *dsp_clk = drproc->dsp_clk;

drivers/remoteproc/da8xx_remoteproc.c

249

struct clk *dsp_clk;

drivers/remoteproc/da8xx_remoteproc.c

70

struct clk *dsp_clk;

drivers/remoteproc/imx_rproc.c

114

struct clk *clk;

drivers/remoteproc/imx_rproc.c

1282

priv->clk = devm_clk_get_enabled(dev, NULL);

drivers/remoteproc/imx_rproc.c

1283

if (IS_ERR(priv->clk))

drivers/remoteproc/imx_rproc.c

1284

return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to enable clock\n");

drivers/remoteproc/meson_mx_ao_arc.c

54

struct clk *arc_pclk;

drivers/remoteproc/mtk_common.h

134

struct clk *clk;

drivers/remoteproc/mtk_scp.c

1608

clk_unprepare(scp->clk);

drivers/remoteproc/mtk_scp.c

1625

return clk_prepare(scp->clk);

drivers/remoteproc/mtk_scp.c

286

ret = clk_enable(scp->clk);

drivers/remoteproc/mtk_scp.c

294

clk_disable(scp->clk);

drivers/remoteproc/mtk_scp.c

386

scp->clk = devm_clk_get(dev, "main");

drivers/remoteproc/mtk_scp.c

387

if (IS_ERR(scp->clk)) {

drivers/remoteproc/mtk_scp.c

389

ret = PTR_ERR(scp->clk);

drivers/remoteproc/mtk_scp.c

402

scp->clk = NULL;

drivers/remoteproc/mtk_scp.c

668

ret = clk_enable(scp->clk);

drivers/remoteproc/mtk_scp.c

683

clk_disable(scp->clk);

drivers/remoteproc/mtk_scp.c

694

ret = clk_enable(scp->clk);

drivers/remoteproc/mtk_scp.c

701

clk_disable(scp->clk);

drivers/remoteproc/mtk_scp.c

712

ret = clk_enable(scp->clk);

drivers/remoteproc/mtk_scp.c

737

clk_disable(scp->clk);

drivers/remoteproc/mtk_scp.c

744

clk_disable(scp->clk);

drivers/remoteproc/mtk_scp.c

912

ret = clk_enable(scp->clk);

drivers/remoteproc/mtk_scp.c

920

clk_disable(scp->clk);

drivers/remoteproc/mtk_scp.c

929

return clk_prepare(scp->clk);

drivers/remoteproc/mtk_scp.c

936

clk_unprepare(scp->clk);

drivers/remoteproc/mtk_scp_ipi.c

174

ret = clk_enable(scp->clk);

drivers/remoteproc/mtk_scp_ipi.c

214

clk_disable(scp->clk);

drivers/remoteproc/omap_remoteproc.c

121

struct clk *fck;

drivers/remoteproc/qcom_q6v5_adsp.c

86

struct clk *xo;

drivers/remoteproc/qcom_q6v5_mss.c

1877

static int q6v5_init_clocks(struct device *dev, struct clk **clks,

drivers/remoteproc/qcom_q6v5_mss.c

205

struct clk *active_clks[8];

drivers/remoteproc/qcom_q6v5_mss.c

206

struct clk *reset_clks[4];

drivers/remoteproc/qcom_q6v5_mss.c

207

struct clk *proxy_clks[4];

drivers/remoteproc/qcom_q6v5_mss.c

360

struct clk **clks, int count)

drivers/remoteproc/qcom_q6v5_mss.c

382

struct clk **clks, int count)

drivers/remoteproc/qcom_q6v5_pas.c

71

struct clk *xo;

drivers/remoteproc/qcom_q6v5_pas.c

72

struct clk *aggre2_clk;

drivers/remoteproc/qcom_q6v5_wcss.c

118

struct clk *xo;

drivers/remoteproc/qcom_q6v5_wcss.c

119

struct clk *ahbfabric_cbcr_clk;

drivers/remoteproc/qcom_q6v5_wcss.c

120

struct clk *gcc_abhs_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

121

struct clk *gcc_axim_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

122

struct clk *lcc_csr_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

123

struct clk *ahbs_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

124

struct clk *tcm_slave_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

125

struct clk *qdsp6ss_abhm_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

126

struct clk *qdsp6ss_sleep_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

127

struct clk *qdsp6ss_axim_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

128

struct clk *qdsp6ss_xo_cbcr;

drivers/remoteproc/qcom_q6v5_wcss.c

129

struct clk *qdsp6ss_core_gfmux;

drivers/remoteproc/qcom_q6v5_wcss.c

130

struct clk *lcc_bcr_sleep;

drivers/remoteproc/qcom_wcnss_iris.c

23

struct clk *xo_clk;

drivers/remoteproc/st_remoteproc.c

171

err = clk_enable(ddata->clk);

drivers/remoteproc/st_remoteproc.c

202

clk_disable(ddata->clk);

drivers/remoteproc/st_remoteproc.c

224

clk_disable(ddata->clk);

drivers/remoteproc/st_remoteproc.c

304

ddata->clk = devm_clk_get(dev, NULL);

drivers/remoteproc/st_remoteproc.c

305

if (IS_ERR(ddata->clk))

drivers/remoteproc/st_remoteproc.c

306

return dev_err_probe(dev, PTR_ERR(ddata->clk),

drivers/remoteproc/st_remoteproc.c

321

err = clk_prepare(ddata->clk);

drivers/remoteproc/st_remoteproc.c

364

clk_set_rate(ddata->clk, ddata->clk_rate);

drivers/remoteproc/st_remoteproc.c

427

clk_unprepare(ddata->clk);

drivers/remoteproc/st_remoteproc.c

440

clk_disable_unprepare(ddata->clk);

drivers/remoteproc/st_remoteproc.c

46

struct clk *clk;

drivers/remoteproc/st_slim_rproc.c

102

while (--clk >= 0)

drivers/remoteproc/st_slim_rproc.c

103

clk_disable_unprepare(slim_rproc->clks[clk]);

drivers/remoteproc/st_slim_rproc.c

315

int clk;

drivers/remoteproc/st_slim_rproc.c

322

for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++)

drivers/remoteproc/st_slim_rproc.c

323

clk_put(slim_rproc->clks[clk]);

drivers/remoteproc/st_slim_rproc.c

59

int clk, err;

drivers/remoteproc/st_slim_rproc.c

61

for (clk = 0; clk < ST_SLIM_MAX_CLK; clk++) {

drivers/remoteproc/st_slim_rproc.c

62

slim_rproc->clks[clk] = of_clk_get(dev->of_node, clk);

drivers/remoteproc/st_slim_rproc.c

63

if (IS_ERR(slim_rproc->clks[clk])) {

drivers/remoteproc/st_slim_rproc.c

64

err = PTR_ERR(slim_rproc->clks[clk]);

drivers/remoteproc/st_slim_rproc.c

67

slim_rproc->clks[clk] = NULL;

drivers/remoteproc/st_slim_rproc.c

75

while (--clk >= 0)

drivers/remoteproc/st_slim_rproc.c

76

clk_put(slim_rproc->clks[clk]);

drivers/remoteproc/st_slim_rproc.c

83

int clk;

drivers/remoteproc/st_slim_rproc.c

85

for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++)

drivers/remoteproc/st_slim_rproc.c

86

clk_disable_unprepare(slim_rproc->clks[clk]);

drivers/remoteproc/st_slim_rproc.c

91

int clk, ret;

drivers/remoteproc/st_slim_rproc.c

93

for (clk = 0; clk < ST_SLIM_MAX_CLK && slim_rproc->clks[clk]; clk++) {

drivers/remoteproc/st_slim_rproc.c

94

ret = clk_prepare_enable(slim_rproc->clks[clk]);

drivers/reset/amlogic/reset-meson-audio-arb.c

149

arb->clk = devm_clk_get_enabled(dev, NULL);

drivers/reset/amlogic/reset-meson-audio-arb.c

150

if (IS_ERR(arb->clk))

drivers/reset/amlogic/reset-meson-audio-arb.c

151

return dev_err_probe(dev, PTR_ERR(arb->clk), "failed to get clock\n");

drivers/reset/amlogic/reset-meson-audio-arb.c

18

struct clk *clk;

drivers/reset/reset-lpc18xx.c

35

struct clk *clk_delay;

drivers/reset/reset-lpc18xx.c

36

struct clk *clk_reg;

drivers/reset/reset-uniphier-glue.c

25

struct clk_bulk_data clk[MAX_CLKS];

drivers/reset/reset-uniphier-glue.c

35

clk_bulk_disable_unprepare(priv->data->nclks, priv->clk);

drivers/reset/reset-uniphier-glue.c

59

priv->clk[i].id = priv->data->clock_names[i];

drivers/reset/reset-uniphier-glue.c

60

ret = devm_clk_bulk_get(dev, priv->data->nclks, priv->clk);

drivers/reset/reset-uniphier-glue.c

64

ret = clk_bulk_prepare_enable(priv->data->nclks, priv->clk);

drivers/rtc/rtc-ac100.c

122

struct ac100_clkout *clk = to_ac100_clkout(hw);

drivers/rtc/rtc-ac100.c

125

regmap_read(clk->regmap, clk->offset, &reg);

drivers/rtc/rtc-ac100.c

226

struct ac100_clkout *clk = to_ac100_clkout(hw);

drivers/rtc/rtc-ac100.c

243

regmap_update_bits(clk->regmap, clk->offset,

drivers/rtc/rtc-ac100.c

254

struct ac100_clkout *clk = to_ac100_clkout(hw);

drivers/rtc/rtc-ac100.c

256

return regmap_update_bits(clk->regmap, clk->offset, AC100_CLKOUT_EN,

drivers/rtc/rtc-ac100.c

262

struct ac100_clkout *clk = to_ac100_clkout(hw);

drivers/rtc/rtc-ac100.c

264

regmap_update_bits(clk->regmap, clk->offset, AC100_CLKOUT_EN, 0);

drivers/rtc/rtc-ac100.c

269

struct ac100_clkout *clk = to_ac100_clkout(hw);

drivers/rtc/rtc-ac100.c

272

regmap_read(clk->regmap, clk->offset, &reg);

drivers/rtc/rtc-ac100.c

279

struct ac100_clkout *clk = to_ac100_clkout(hw);

drivers/rtc/rtc-ac100.c

282

regmap_read(clk->regmap, clk->offset, &reg);

drivers/rtc/rtc-ac100.c

289

struct ac100_clkout *clk = to_ac100_clkout(hw);

drivers/rtc/rtc-ac100.c

291

return regmap_update_bits(clk->regmap, clk->offset,

drivers/rtc/rtc-ac100.c

338

struct ac100_clkout *clk = &chip->clks[i];

drivers/rtc/rtc-ac100.c

349

clk->regmap = chip->regmap;

drivers/rtc/rtc-ac100.c

350

clk->offset = AC100_CLKOUT_CTRL1 + i;

drivers/rtc/rtc-ac100.c

351

clk->hw.init = &init;

drivers/rtc/rtc-ac100.c

353

ret = devm_clk_hw_register(chip->dev, &clk->hw);

drivers/rtc/rtc-ac100.c

360

chip->clk_data->hws[i] = &clk->hw;

drivers/rtc/rtc-ac100.c

371

clk_unregister_fixed_rate(chip->rtc_32k_clk->clk);

drivers/rtc/rtc-ac100.c

379

clk_unregister_fixed_rate(chip->rtc_32k_clk->clk);

drivers/rtc/rtc-amlogic-a4.c

69

struct clk *rtc_clk;

drivers/rtc/rtc-amlogic-a4.c

70

struct clk *sys_clk;

drivers/rtc/rtc-asm9260.c

110

struct clk *clk;

drivers/rtc/rtc-asm9260.c

266

priv->clk = devm_clk_get(dev, "ahb");

drivers/rtc/rtc-asm9260.c

267

if (IS_ERR(priv->clk))

drivers/rtc/rtc-asm9260.c

268

return PTR_ERR(priv->clk);

drivers/rtc/rtc-asm9260.c

270

ret = clk_prepare_enable(priv->clk);

drivers/rtc/rtc-asm9260.c

307

clk_disable_unprepare(priv->clk);

drivers/rtc/rtc-asm9260.c

317

clk_disable_unprepare(priv->clk);

drivers/rtc/rtc-at91rm9200.c

107

static struct clk *sclk;

drivers/rtc/rtc-at91sam9.c

75

struct clk *sclk;

drivers/rtc/rtc-brcmstb-waketimer.c

305

timer->clk = devm_clk_get(dev, NULL);

drivers/rtc/rtc-brcmstb-waketimer.c

306

if (!IS_ERR(timer->clk)) {

drivers/rtc/rtc-brcmstb-waketimer.c

307

ret = clk_prepare_enable(timer->clk);

drivers/rtc/rtc-brcmstb-waketimer.c

310

timer->rate = clk_get_rate(timer->clk);

drivers/rtc/rtc-brcmstb-waketimer.c

315

timer->clk = NULL;

drivers/rtc/rtc-brcmstb-waketimer.c

32

struct clk *clk;

drivers/rtc/rtc-brcmstb-waketimer.c

352

clk_disable_unprepare(timer->clk);

drivers/rtc/rtc-brcmstb-waketimer.c

362

clk_disable_unprepare(timer->clk);

drivers/rtc/rtc-cadence.c

81

struct clk *pclk;

drivers/rtc/rtc-cadence.c

82

struct clk *ref_clk;

drivers/rtc/rtc-cv1800.c

176

rtc->clk = devm_clk_get_enabled(pdev->dev.parent, "rtc");

drivers/rtc/rtc-cv1800.c

177

if (IS_ERR(rtc->clk))

drivers/rtc/rtc-cv1800.c

178

return dev_err_probe(&pdev->dev, PTR_ERR(rtc->clk),

drivers/rtc/rtc-cv1800.c

38

struct clk *clk;

drivers/rtc/rtc-ds1307.c

1427

#define clk_sqw_to_ds1307(clk) \

drivers/rtc/rtc-ds1307.c

1428

container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])

drivers/rtc/rtc-ds1307.c

1429

#define clk_32khz_to_ds1307(clk) \

drivers/rtc/rtc-ds1307.c

1430

container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])

drivers/rtc/rtc-ftrtc010.c

33

struct clk *pclk;

drivers/rtc/rtc-ftrtc010.c

34

struct clk *extclk;

drivers/rtc/rtc-hym8563.c

375

static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)

drivers/rtc/rtc-hym8563.c

379

struct clk *clk;

drivers/rtc/rtc-hym8563.c

399

clk = clk_register(&client->dev, &hym8563->clkout_hw);

drivers/rtc/rtc-hym8563.c

401

if (!IS_ERR(clk))

drivers/rtc/rtc-hym8563.c

402

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/rtc/rtc-hym8563.c

404

return clk;

drivers/rtc/rtc-imxdi.c

113

struct clk *clk;

drivers/rtc/rtc-imxdi.c

781

imxdi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/rtc/rtc-imxdi.c

782

if (IS_ERR(imxdi->clk))

drivers/rtc/rtc-imxdi.c

783

return PTR_ERR(imxdi->clk);

drivers/rtc/rtc-imxdi.c

784

rc = clk_prepare_enable(imxdi->clk);

drivers/rtc/rtc-imxdi.c

828

clk_disable_unprepare(imxdi->clk);

drivers/rtc/rtc-imxdi.c

842

clk_disable_unprepare(imxdi->clk);

drivers/rtc/rtc-isl1208.c

846

struct clk *clk;

drivers/rtc/rtc-isl1208.c

848

clk = devm_clk_get_optional(&client->dev, name);

drivers/rtc/rtc-isl1208.c

849

if (IS_ERR(clk))

drivers/rtc/rtc-isl1208.c

850

return PTR_ERR(clk);

drivers/rtc/rtc-isl1208.c

852

return !!clk;

drivers/rtc/rtc-jz4740.c

345

struct clk *clk;

drivers/rtc/rtc-jz4740.c

362

clk = devm_clk_get_enabled(dev, "rtc");

drivers/rtc/rtc-jz4740.c

363

if (IS_ERR(clk))

drivers/rtc/rtc-jz4740.c

364

return dev_err_probe(dev, PTR_ERR(clk), "Failed to get RTC clock\n");

drivers/rtc/rtc-jz4740.c

384

rate = clk_get_rate(clk);

drivers/rtc/rtc-jz4740.c

409

rtc->clk32k.init = CLK_HW_INIT_HW("clk32k", __clk_get_hw(clk),

drivers/rtc/rtc-lpc24xx.c

64

struct clk *clk_rtc;

drivers/rtc/rtc-lpc24xx.c

65

struct clk *clk_reg;

drivers/rtc/rtc-m41t80.c

572

static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)

drivers/rtc/rtc-m41t80.c

577

struct clk *clk;

drivers/rtc/rtc-m41t80.c

613

clk = clk_register(&client->dev, &m41t80->sqw);

drivers/rtc/rtc-m41t80.c

614

if (!IS_ERR(clk))

drivers/rtc/rtc-m41t80.c

615

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/rtc/rtc-m41t80.c

617

return clk;

drivers/rtc/rtc-ma35d1.c

213

struct clk *clk;

drivers/rtc/rtc-ma35d1.c

224

clk = of_clk_get(pdev->dev.of_node, 0);

drivers/rtc/rtc-ma35d1.c

225

if (IS_ERR(clk))

drivers/rtc/rtc-ma35d1.c

226

return dev_err_probe(&pdev->dev, PTR_ERR(clk), "failed to find rtc clock\n");

drivers/rtc/rtc-ma35d1.c

228

ret = clk_prepare_enable(clk);

drivers/rtc/rtc-max31335.c

222

struct clk *clkin;

drivers/rtc/rtc-max31335.c

664

max31335->clkout.clk = devm_clk_get_enabled(dev, NULL);

drivers/rtc/rtc-max31335.c

665

if (IS_ERR(max31335->clkout.clk))

drivers/rtc/rtc-max31335.c

666

return dev_err_probe(dev, PTR_ERR(max31335->clkout.clk),

drivers/rtc/rtc-mpfs.c

218

struct clk *clk;

drivers/rtc/rtc-mpfs.c

237

clk = devm_clk_get_enabled(&pdev->dev, "rtc");

drivers/rtc/rtc-mpfs.c

238

if (IS_ERR(clk))

drivers/rtc/rtc-mpfs.c

239

return PTR_ERR(clk);

drivers/rtc/rtc-msc313.c

185

struct clk *clk;

drivers/rtc/rtc-msc313.c

215

clk = devm_clk_get_enabled(dev, NULL);

drivers/rtc/rtc-msc313.c

216

if (IS_ERR(clk)) {

drivers/rtc/rtc-msc313.c

218

return PTR_ERR(clk);

drivers/rtc/rtc-msc313.c

221

rate = clk_get_rate(clk);

drivers/rtc/rtc-mt7622.c

105

struct clk *clk;

drivers/rtc/rtc-mt7622.c

318

hw->clk = devm_clk_get(&pdev->dev, "rtc");

drivers/rtc/rtc-mt7622.c

319

if (IS_ERR(hw->clk)) {

drivers/rtc/rtc-mt7622.c

321

return PTR_ERR(hw->clk);

drivers/rtc/rtc-mt7622.c

324

ret = clk_prepare_enable(hw->clk);

drivers/rtc/rtc-mt7622.c

355

clk_disable_unprepare(hw->clk);

drivers/rtc/rtc-mt7622.c

364

clk_disable_unprepare(hw->clk);

drivers/rtc/rtc-mv.c

222

pdata->clk = devm_clk_get(&pdev->dev, NULL);

drivers/rtc/rtc-mv.c

224

if (!IS_ERR(pdata->clk))

drivers/rtc/rtc-mv.c

225

clk_prepare_enable(pdata->clk);

drivers/rtc/rtc-mv.c

279

if (!IS_ERR(pdata->clk))

drivers/rtc/rtc-mv.c

280

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-mv.c

292

if (!IS_ERR(pdata->clk))

drivers/rtc/rtc-mv.c

293

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-mv.c

43

struct clk *clk;

drivers/rtc/rtc-mxc.c

66

struct clk *clk_ref;

drivers/rtc/rtc-mxc.c

67

struct clk *clk_ipg;

drivers/rtc/rtc-mxc_v2.c

105

clk_disable(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

119

ret = clk_enable(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

129

clk_disable(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

144

const int clk_failed = clk_enable(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

150

clk_disable(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

294

pdata->clk = devm_clk_get(&pdev->dev, NULL);

drivers/rtc/rtc-mxc_v2.c

295

if (IS_ERR(pdata->clk)) {

drivers/rtc/rtc-mxc_v2.c

297

return PTR_ERR(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

310

ret = clk_prepare_enable(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

324

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

334

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

340

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

347

clk_disable(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

354

clk_unprepare(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

360

clk_unprepare(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

369

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-mxc_v2.c

42

struct clk *clk;

drivers/rtc/rtc-mxc_v2.c

81

if (clk_enable(pdata->clk)) {

drivers/rtc/rtc-nct3018y.c

458

static struct clk *nct3018y_clkout_register_clk(struct nct3018y *nct3018y)

drivers/rtc/rtc-nct3018y.c

462

struct clk *clk;

drivers/rtc/rtc-nct3018y.c

476

clk = devm_clk_register(&client->dev, &nct3018y->clkout_hw);

drivers/rtc/rtc-nct3018y.c

478

if (!IS_ERR(clk))

drivers/rtc/rtc-nct3018y.c

479

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/rtc/rtc-nct3018y.c

481

return clk;

drivers/rtc/rtc-nxp-bbnsm.c

39

struct clk *clk;

drivers/rtc/rtc-omap.c

144

struct clk *clk;

drivers/rtc/rtc-omap.c

755

rtc->clk = devm_clk_get(&pdev->dev, "ext-clk");

drivers/rtc/rtc-omap.c

756

if (!IS_ERR(rtc->clk))

drivers/rtc/rtc-omap.c

759

rtc->clk = devm_clk_get(&pdev->dev, "int-clk");

drivers/rtc/rtc-omap.c

761

if (!IS_ERR(rtc->clk))

drivers/rtc/rtc-omap.c

762

clk_prepare_enable(rtc->clk);

drivers/rtc/rtc-omap.c

766

clk_disable_unprepare(rtc->clk);

drivers/rtc/rtc-omap.c

903

clk_disable_unprepare(rtc->clk);

drivers/rtc/rtc-omap.c

925

if (!IS_ERR(rtc->clk))

drivers/rtc/rtc-omap.c

926

clk_disable_unprepare(rtc->clk);

drivers/rtc/rtc-pcf85063.c

498

static struct clk *pcf85063_clkout_register_clk(struct pcf85063 *pcf85063)

drivers/rtc/rtc-pcf85063.c

500

struct clk *clk;

drivers/rtc/rtc-pcf85063.c

527

clk = devm_clk_register(&pcf85063->rtc->dev, &pcf85063->clkout_hw);

drivers/rtc/rtc-pcf85063.c

529

if (!IS_ERR(clk))

drivers/rtc/rtc-pcf85063.c

530

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/rtc/rtc-pcf85063.c

532

return clk;

drivers/rtc/rtc-pcf8563.c

425

static struct clk *pcf8563_clkout_register_clk(struct pcf8563 *pcf8563)

drivers/rtc/rtc-pcf8563.c

429

struct clk *clk;

drivers/rtc/rtc-pcf8563.c

449

clk = devm_clk_register(&pcf8563->rtc->dev, &pcf8563->clkout_hw);

drivers/rtc/rtc-pcf8563.c

451

if (!IS_ERR(clk))

drivers/rtc/rtc-pcf8563.c

452

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/rtc/rtc-pcf8563.c

454

return clk;

drivers/rtc/rtc-pic32.c

102

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

108

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

120

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

126

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

137

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

166

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

177

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

184

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

196

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

217

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

227

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

235

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

245

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

251

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

271

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

283

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

291

clk_unprepare(pdata->clk);

drivers/rtc/rtc-pic32.c

292

pdata->clk = NULL;

drivers/rtc/rtc-pic32.c

314

pdata->clk = devm_clk_get(&pdev->dev, NULL);

drivers/rtc/rtc-pic32.c

315

if (IS_ERR(pdata->clk)) {

drivers/rtc/rtc-pic32.c

317

ret = PTR_ERR(pdata->clk);

drivers/rtc/rtc-pic32.c

318

pdata->clk = NULL;

drivers/rtc/rtc-pic32.c

328

clk_prepare_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

352

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

358

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-pic32.c

58

struct clk *clk;

drivers/rtc/rtc-pic32.c

72

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

77

clk_disable(pdata->clk);

drivers/rtc/rtc-pic32.c

88

clk_enable(pdata->clk);

drivers/rtc/rtc-pic32.c

90

clk_disable(pdata->clk);

drivers/rtc/rtc-renesas-rtca3.c

567

static int rtca3_initial_setup(struct clk *clk, struct rtca3_priv *priv)

drivers/rtc/rtc-renesas-rtca3.c

574

osc32k_rate = clk_get_rate(clk);

drivers/rtc/rtc-renesas-rtca3.c

714

struct clk *clk;

drivers/rtc/rtc-renesas-rtca3.c

752

clk = devm_clk_get_enabled(dev, "counter");

drivers/rtc/rtc-renesas-rtca3.c

753

if (IS_ERR(clk))

drivers/rtc/rtc-renesas-rtca3.c

754

return PTR_ERR(clk);

drivers/rtc/rtc-renesas-rtca3.c

760

ret = rtca3_initial_setup(clk, priv);

drivers/rtc/rtc-rtd119x.c

183

data->clk = of_clk_get(pdev->dev.of_node, 0);

drivers/rtc/rtc-rtd119x.c

184

if (IS_ERR(data->clk))

drivers/rtc/rtc-rtd119x.c

185

return PTR_ERR(data->clk);

drivers/rtc/rtc-rtd119x.c

187

ret = clk_prepare_enable(data->clk);

drivers/rtc/rtc-rtd119x.c

189

clk_put(data->clk);

drivers/rtc/rtc-rtd119x.c

211

clk_disable_unprepare(data->clk);

drivers/rtc/rtc-rtd119x.c

212

clk_put(data->clk);

drivers/rtc/rtc-rtd119x.c

225

clk_disable_unprepare(data->clk);

drivers/rtc/rtc-rtd119x.c

226

clk_put(data->clk);

drivers/rtc/rtc-rtd119x.c

44

struct clk *clk;

drivers/rtc/rtc-rv3028.c

818

struct clk *clk;

drivers/rtc/rtc-rv3028.c

838

clk = devm_clk_register(&client->dev, &rv3028->clkout_hw);

drivers/rtc/rtc-rv3028.c

839

if (!IS_ERR(clk))

drivers/rtc/rtc-rv3028.c

840

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/rtc/rtc-rv3032.c

754

struct clk *clk;

drivers/rtc/rtc-rv3032.c

779

clk = devm_clk_register(&client->dev, &rv3032->clkout_hw);

drivers/rtc/rtc-rv3032.c

780

if (!IS_ERR(clk))

drivers/rtc/rtc-rv3032.c

781

of_clk_add_provider(node, of_clk_src_simple_get, clk);

drivers/rtc/rtc-rzn1.c

384

struct clk *xtal;

drivers/rtc/rtc-s32g.c

60

struct clk *ipg;

drivers/rtc/rtc-s32g.c

61

struct clk *clk_src;

drivers/rtc/rtc-s3c.c

37

struct clk *rtc_clk;

drivers/rtc/rtc-s3c.c

38

struct clk *rtc_src_clk;

drivers/rtc/rtc-sa1100.c

178

info->clk = devm_clk_get(&pdev->dev, NULL);

drivers/rtc/rtc-sa1100.c

179

if (IS_ERR(info->clk)) {

drivers/rtc/rtc-sa1100.c

181

return PTR_ERR(info->clk);

drivers/rtc/rtc-sa1100.c

184

ret = clk_prepare_enable(info->clk);

drivers/rtc/rtc-sa1100.c

207

clk_disable_unprepare(info->clk);

drivers/rtc/rtc-sa1100.c

305

clk_disable_unprepare(info->clk);

drivers/rtc/rtc-sa1100.h

19

struct clk *clk;

drivers/rtc/rtc-sa1100.h

7

struct clk;

drivers/rtc/rtc-sh.c

379

rtc->clk = devm_clk_get(&pdev->dev, clk_name);

drivers/rtc/rtc-sh.c

380

if (IS_ERR(rtc->clk)) {

drivers/rtc/rtc-sh.c

387

rtc->clk = NULL;

drivers/rtc/rtc-sh.c

394

clk_enable(rtc->clk);

drivers/rtc/rtc-sh.c

443

clk_disable(rtc->clk);

drivers/rtc/rtc-sh.c

454

clk_disable(rtc->clk);

drivers/rtc/rtc-sh.c

91

struct clk *clk;

drivers/rtc/rtc-snvs.c

166

ret = clk_enable(data->clk);

drivers/rtc/rtc-snvs.c

173

clk_disable(data->clk);

drivers/rtc/rtc-snvs.c

184

ret = clk_enable(data->clk);

drivers/rtc/rtc-snvs.c

200

clk_disable(data->clk);

drivers/rtc/rtc-snvs.c

211

ret = clk_enable(data->clk);

drivers/rtc/rtc-snvs.c

221

clk_disable(data->clk);

drivers/rtc/rtc-snvs.c

231

ret = clk_enable(data->clk);

drivers/rtc/rtc-snvs.c

241

clk_disable(data->clk);

drivers/rtc/rtc-snvs.c

252

ret = clk_enable(data->clk);

drivers/rtc/rtc-snvs.c

265

clk_disable(data->clk);

drivers/rtc/rtc-snvs.c

285

clk_enable(data->clk);

drivers/rtc/rtc-snvs.c

301

clk_disable(data->clk);

drivers/rtc/rtc-snvs.c

355

data->clk = devm_clk_get(&pdev->dev, "snvs-rtc");

drivers/rtc/rtc-snvs.c

356

if (IS_ERR(data->clk)) {

drivers/rtc/rtc-snvs.c

357

data->clk = NULL;

drivers/rtc/rtc-snvs.c

359

ret = clk_prepare_enable(data->clk);

drivers/rtc/rtc-snvs.c

367

ret = devm_add_action_or_reset(&pdev->dev, snvs_rtc_action, data->clk);

drivers/rtc/rtc-snvs.c

409

clk_disable(data->clk);

drivers/rtc/rtc-snvs.c

418

if (data->clk)

drivers/rtc/rtc-snvs.c

419

return clk_enable(data->clk);

drivers/rtc/rtc-snvs.c

48

struct clk *clk;

drivers/rtc/rtc-spear.c

378

config->clk = devm_clk_get(&pdev->dev, NULL);

drivers/rtc/rtc-spear.c

379

if (IS_ERR(config->clk))

drivers/rtc/rtc-spear.c

380

return PTR_ERR(config->clk);

drivers/rtc/rtc-spear.c

382

status = clk_prepare_enable(config->clk);

drivers/rtc/rtc-spear.c

403

clk_disable_unprepare(config->clk);

drivers/rtc/rtc-spear.c

413

clk_disable_unprepare(config->clk);

drivers/rtc/rtc-spear.c

430

clk_disable(config->clk);

drivers/rtc/rtc-spear.c

450

clk_enable(config->clk);

drivers/rtc/rtc-spear.c

465

clk_disable(config->clk);

drivers/rtc/rtc-spear.c

79

struct clk *clk;

drivers/rtc/rtc-st-lpc.c

230

rtc->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/rtc/rtc-st-lpc.c

231

if (IS_ERR(rtc->clk))

drivers/rtc/rtc-st-lpc.c

232

return dev_err_probe(&pdev->dev, PTR_ERR(rtc->clk),

drivers/rtc/rtc-st-lpc.c

235

rtc->clkrate = clk_get_rate(rtc->clk);

drivers/rtc/rtc-st-lpc.c

44

struct clk *clk;

drivers/rtc/rtc-stm32.c

172

struct clk *pclk;

drivers/rtc/rtc-stm32.c

173

struct clk *rtc_ck;

drivers/rtc/rtc-stm32.c

176

struct clk *clk_lsco;

drivers/rtc/rtc-sun6i.c

154

struct clk *losc;

drivers/rtc/rtc-sun6i.c

155

struct clk *ext_losc;

drivers/rtc/rtc-sun6i.c

741

struct clk *bus_clk = data;

drivers/rtc/rtc-sun6i.c

750

struct clk *bus_clk;

drivers/rtc/rtc-sunplus.c

59

struct clk *rtcclk;

drivers/rtc/rtc-tegra.c

310

info->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/rtc/rtc-tegra.c

311

if (IS_ERR(info->clk))

drivers/rtc/rtc-tegra.c

312

return PTR_ERR(info->clk);

drivers/rtc/rtc-tegra.c

52

struct clk *clk;

drivers/rtc/rtc-ti-k3.c

518

struct clk *clk;

drivers/rtc/rtc-ti-k3.c

520

clk = devm_clk_get_enabled(dev, "osc32k");

drivers/rtc/rtc-ti-k3.c

521

if (IS_ERR(clk))

drivers/rtc/rtc-ti-k3.c

522

return PTR_ERR(clk);

drivers/rtc/rtc-ti-k3.c

524

priv->rate_32k = clk_get_rate(clk);

drivers/rtc/rtc-ti-k3.c

543

struct clk *clk;

drivers/rtc/rtc-ti-k3.c

546

clk = devm_clk_get_enabled(dev, "vbus");

drivers/rtc/rtc-ti-k3.c

547

if (IS_ERR(clk))

drivers/rtc/rtc-ti-k3.c

548

return PTR_ERR(clk);

drivers/rtc/rtc-xgene.c

165

pdata->clk = devm_clk_get(&pdev->dev, NULL);

drivers/rtc/rtc-xgene.c

166

if (IS_ERR(pdata->clk)) {

drivers/rtc/rtc-xgene.c

170

ret = clk_prepare_enable(pdata->clk);

drivers/rtc/rtc-xgene.c

179

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-xgene.c

188

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-xgene.c

201

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-xgene.c

223

clk_disable_unprepare(pdata->clk);

drivers/rtc/rtc-xgene.c

243

rc = clk_prepare_enable(pdata->clk);

drivers/rtc/rtc-xgene.c

38

struct clk *clk;

drivers/rtc/rtc-zynqmp.c

53

struct clk *rtc_clk;

drivers/s390/block/dasd_3990_erp.c

2214

unsigned long clk;

drivers/s390/block/dasd_3990_erp.c

2219

clk = get_tod_clock();

drivers/s390/block/dasd_3990_erp.c

2224

if ((tod_to_ns(clk - device->path[pos].errorclk) / NSEC_PER_SEC)

drivers/s390/block/dasd_3990_erp.c

2230

device->path[pos].errorclk = clk;

drivers/scsi/hisi_sas/hisi_sas_main.c

2416

struct clk *refclk;

drivers/scsi/ncr53c8xx.c

5278

u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */

drivers/scsi/ncr53c8xx.c

5296

kpc = per * clk;

drivers/scsi/sym53c8xx_2/sym_hipd.c

471

u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */

drivers/scsi/sym53c8xx_2/sym_hipd.c

488

kpc = per * clk;

drivers/sh/clk/core.c

137

long clk_rate_table_round(struct clk *clk,

drivers/sh/clk/core.c

143

.max = clk->nr_freqs - 1,

drivers/sh/clk/core.c

149

if (clk->nr_freqs < 1)

drivers/sh/clk/core.c

161

long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,

drivers/sh/clk/core.c

168

.arg = clk_get_parent(clk),

drivers/sh/clk/core.c

181

long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min,

drivers/sh/clk/core.c

188

.arg = clk_get_parent(clk),

drivers/sh/clk/core.c

195

int clk_rate_table_find(struct clk *clk,

drivers/sh/clk/core.c

210

unsigned long followparent_recalc(struct clk *clk)

drivers/sh/clk/core.c

212

return clk->parent ? clk->parent->rate : 0;

drivers/sh/clk/core.c

215

int clk_reparent(struct clk *child, struct clk *parent)

drivers/sh/clk/core.c

226

void propagate_rate(struct clk *tclk)

drivers/sh/clk/core.c

228

struct clk *clkp;

drivers/sh/clk/core.c

238

static void __clk_disable(struct clk *clk)

drivers/sh/clk/core.c

240

if (WARN(!clk->usecount, "Trying to disable clock %p with 0 usecount\n",

drivers/sh/clk/core.c

241

clk))

drivers/sh/clk/core.c

244

if (!(--clk->usecount)) {

drivers/sh/clk/core.c

245

if (likely(allow_disable && clk->ops && clk->ops->disable))

drivers/sh/clk/core.c

246

clk->ops->disable(clk);

drivers/sh/clk/core.c

247

if (likely(clk->parent))

drivers/sh/clk/core.c

248

__clk_disable(clk->parent);

drivers/sh/clk/core.c

252

void clk_disable(struct clk *clk)

drivers/sh/clk/core.c

256

if (!clk)

drivers/sh/clk/core.c

260

__clk_disable(clk);

drivers/sh/clk/core.c

265

static int __clk_enable(struct clk *clk)

drivers/sh/clk/core.c

269

if (clk->usecount++ == 0) {

drivers/sh/clk/core.c

270

if (clk->parent) {

drivers/sh/clk/core.c

271

ret = __clk_enable(clk->parent);

drivers/sh/clk/core.c

276

if (clk->ops && clk->ops->enable) {

drivers/sh/clk/core.c

277

ret = clk->ops->enable(clk);

drivers/sh/clk/core.c

279

if (clk->parent)

drivers/sh/clk/core.c

280

__clk_disable(clk->parent);

drivers/sh/clk/core.c

288

clk->usecount--;

drivers/sh/clk/core.c

292

int clk_enable(struct clk *clk)

drivers/sh/clk/core.c

297

if (!clk)

drivers/sh/clk/core.c

301

ret = __clk_enable(clk);

drivers/sh/clk/core.c

319

struct clk *clkp;

drivers/sh/clk/core.c

330

static struct clk *lookup_root_clock(struct clk *clk)

drivers/sh/clk/core.c

332

while (clk->parent)

drivers/sh/clk/core.c

333

clk = clk->parent;

drivers/sh/clk/core.c

335

return clk;

drivers/sh/clk/core.c

338

static int clk_establish_mapping(struct clk *clk)

drivers/sh/clk/core.c

340

struct clk_mapping *mapping = clk->mapping;

drivers/sh/clk/core.c

346

struct clk *clkp;

drivers/sh/clk/core.c

351

if (!clk->parent) {

drivers/sh/clk/core.c

352

clk->mapping = &dummy_mapping;

drivers/sh/clk/core.c

360

clkp = lookup_root_clock(clk);

drivers/sh/clk/core.c

381

clk->mapping = mapping;

drivers/sh/clk/core.c

383

clk->mapped_reg = clk->mapping->base;

drivers/sh/clk/core.c

384

clk->mapped_reg += (phys_addr_t)clk->enable_reg - clk->mapping->phys;

drivers/sh/clk/core.c

39

void clk_rate_table_build(struct clk *clk,

drivers/sh/clk/core.c

397

static void clk_teardown_mapping(struct clk *clk)

drivers/sh/clk/core.c

399

struct clk_mapping *mapping = clk->mapping;

drivers/sh/clk/core.c

406

clk->mapping = NULL;

drivers/sh/clk/core.c

408

clk->mapped_reg = NULL;

drivers/sh/clk/core.c

411

int clk_register(struct clk *clk)

drivers/sh/clk/core.c

415

if (IS_ERR_OR_NULL(clk))

drivers/sh/clk/core.c

421

if (clk->node.next || clk->node.prev)

drivers/sh/clk/core.c

426

INIT_LIST_HEAD(&clk->children);

drivers/sh/clk/core.c

427

clk->usecount = 0;

drivers/sh/clk/core.c

429

ret = clk_establish_mapping(clk);

drivers/sh/clk/core.c

433

if (clk->parent)

drivers/sh/clk/core.c

434

list_add(&clk->sibling, &clk->parent->children);

drivers/sh/clk/core.c

436

list_add(&clk->sibling, &root_clks);

drivers/sh/clk/core.c

438

list_add(&clk->node, &clock_list);

drivers/sh/clk/core.c

441

if (clk->ops && clk->ops->init)

drivers/sh/clk/core.c

442

clk->ops->init(clk);

drivers/sh/clk/core.c

452

void clk_unregister(struct clk *clk)

drivers/sh/clk/core.c

455

list_del(&clk->sibling);

drivers/sh/clk/core.c

456

list_del(&clk->node);

drivers/sh/clk/core.c

457

clk_teardown_mapping(clk);

drivers/sh/clk/core.c

464

struct clk *clkp;

drivers/sh/clk/core.c

471

unsigned long clk_get_rate(struct clk *clk)

drivers/sh/clk/core.c

473

if (!clk)

drivers/sh/clk/core.c

476

return clk->rate;

drivers/sh/clk/core.c

480

int clk_set_rate(struct clk *clk, unsigned long rate)

drivers/sh/clk/core.c

485

if (!clk)

drivers/sh/clk/core.c

49

clk->nr_freqs = nr_freqs;

drivers/sh/clk/core.c

490

if (likely(clk->ops && clk->ops->set_rate)) {

drivers/sh/clk/core.c

491

ret = clk->ops->set_rate(clk, rate);

drivers/sh/clk/core.c

495

clk->rate = rate;

drivers/sh/clk/core.c

499

if (clk->ops && clk->ops->recalc)

drivers/sh/clk/core.c

500

clk->rate = clk->ops->recalc(clk);

drivers/sh/clk/core.c

502

propagate_rate(clk);

drivers/sh/clk/core.c

511

int clk_set_parent(struct clk *clk, struct clk *parent)

drivers/sh/clk/core.c

516

if (!parent || !clk)

drivers/sh/clk/core.c

518

if (clk->parent == parent)

drivers/sh/clk/core.c

522

if (clk->usecount == 0) {

drivers/sh/clk/core.c

523

if (clk->ops->set_parent)

drivers/sh/clk/core.c

524

ret = clk->ops->set_parent(clk, parent);

drivers/sh/clk/core.c

526

ret = clk_reparent(clk, parent);

drivers/sh/clk/core.c

529

if (clk->ops->recalc)

drivers/sh/clk/core.c

530

clk->rate = clk->ops->recalc(clk);

drivers/sh/clk/core.c

532

clk, clk->parent, clk->rate);

drivers/sh/clk/core.c

533

propagate_rate(clk);

drivers/sh/clk/core.c

543

struct clk *clk_get_parent(struct clk *clk)

drivers/sh/clk/core.c

545

if (!clk)

drivers/sh/clk/core.c

548

return clk->parent;

drivers/sh/clk/core.c

552

long clk_round_rate(struct clk *clk, unsigned long rate)

drivers/sh/clk/core.c

554

if (!clk)

drivers/sh/clk/core.c

557

if (likely(clk->ops && clk->ops->round_rate)) {

drivers/sh/clk/core.c

561

rounded = clk->ops->round_rate(clk, rate);

drivers/sh/clk/core.c

567

return clk_get_rate(clk);

drivers/sh/clk/core.c

574

struct clk *clkp;

drivers/sh/clk/core.c

611

struct clk *clk;

drivers/sh/clk/core.c

617

list_for_each_entry(clk, &clock_list, node)

drivers/sh/clk/core.c

618

if (!clk->usecount && clk->ops && clk->ops->disable)

drivers/sh/clk/core.c

619

clk->ops->disable(clk);

drivers/sh/clk/core.c

64

freq = clk->parent->rate * mult / div;

drivers/sh/clk/cpg.c

100

static inline struct clk_div_table *clk_to_div_table(struct clk *clk)

drivers/sh/clk/cpg.c

102

return clk->priv;

drivers/sh/clk/cpg.c

105

static inline struct clk_div_mult_table *clk_to_div_mult_table(struct clk *clk)

drivers/sh/clk/cpg.c

107

return clk_to_div_table(clk)->div_mult_table;

drivers/sh/clk/cpg.c

113

static long sh_clk_div_round_rate(struct clk *clk, unsigned long rate)

drivers/sh/clk/cpg.c

115

return clk_rate_table_round(clk, clk->freq_table, rate);

drivers/sh/clk/cpg.c

118

static unsigned long sh_clk_div_recalc(struct clk *clk)

drivers/sh/clk/cpg.c

120

struct clk_div_mult_table *table = clk_to_div_mult_table(clk);

drivers/sh/clk/cpg.c

123

clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,

drivers/sh/clk/cpg.c

124

table, clk->arch_flags ? &clk->arch_flags : NULL);

drivers/sh/clk/cpg.c

126

idx = (sh_clk_read(clk) >> clk->enable_bit) & clk->div_mask;

drivers/sh/clk/cpg.c

128

return clk->freq_table[idx].frequency;

drivers/sh/clk/cpg.c

131

static int sh_clk_div_set_rate(struct clk *clk, unsigned long rate)

drivers/sh/clk/cpg.c

133

struct clk_div_table *dt = clk_to_div_table(clk);

drivers/sh/clk/cpg.c

137

idx = clk_rate_table_find(clk, clk->freq_table, rate);

drivers/sh/clk/cpg.c

141

value = sh_clk_read(clk);

drivers/sh/clk/cpg.c

142

value &= ~(clk->div_mask << clk->enable_bit);

drivers/sh/clk/cpg.c

143

value |= (idx << clk->enable_bit);

drivers/sh/clk/cpg.c

144

sh_clk_write(value, clk);

drivers/sh/clk/cpg.c

148

dt->kick(clk);

drivers/sh/clk/cpg.c

153

static int sh_clk_div_enable(struct clk *clk)

drivers/sh/clk/cpg.c

155

if (clk->div_mask == SH_CLK_DIV6_MSK) {

drivers/sh/clk/cpg.c

156

int ret = sh_clk_div_set_rate(clk, clk->rate);

drivers/sh/clk/cpg.c

161

sh_clk_write(sh_clk_read(clk) & ~CPG_CKSTP_BIT, clk);

drivers/sh/clk/cpg.c

165

static void sh_clk_div_disable(struct clk *clk)

drivers/sh/clk/cpg.c

169

val = sh_clk_read(clk);

drivers/sh/clk/cpg.c

177

if (clk->flags & CLK_MASK_DIV_ON_DISABLE)

drivers/sh/clk/cpg.c

178

val |= clk->div_mask;

drivers/sh/clk/cpg.c

180

sh_clk_write(val, clk);

drivers/sh/clk/cpg.c

19

static unsigned int sh_clk_read(struct clk *clk)

drivers/sh/clk/cpg.c

197

static int __init sh_clk_init_parent(struct clk *clk)

drivers/sh/clk/cpg.c

201

if (clk->parent)

drivers/sh/clk/cpg.c

204

if (!clk->parent_table || !clk->parent_num)

drivers/sh/clk/cpg.c

207

if (!clk->src_width) {

drivers/sh/clk/cpg.c

21

if (clk->flags & CLK_ENABLE_REG_8BIT)

drivers/sh/clk/cpg.c

212

val = (sh_clk_read(clk) >> clk->src_shift);

drivers/sh/clk/cpg.c

213

val &= (1 << clk->src_width) - 1;

drivers/sh/clk/cpg.c

215

if (val >= clk->parent_num) {

drivers/sh/clk/cpg.c

22

return ioread8(clk->mapped_reg);

drivers/sh/clk/cpg.c

220

clk_reparent(clk, clk->parent_table[val]);

drivers/sh/clk/cpg.c

221

if (!clk->parent) {

drivers/sh/clk/cpg.c

229

static int __init sh_clk_div_register_ops(struct clk *clks, int nr,

drivers/sh/clk/cpg.c

23

else if (clk->flags & CLK_ENABLE_REG_16BIT)

drivers/sh/clk/cpg.c

232

struct clk *clkp;

drivers/sh/clk/cpg.c

24

return ioread16(clk->mapped_reg);

drivers/sh/clk/cpg.c

26

return ioread32(clk->mapped_reg);

drivers/sh/clk/cpg.c

282

static int sh_clk_div6_set_parent(struct clk *clk, struct clk *parent)

drivers/sh/clk/cpg.c

284

struct clk_div_mult_table *table = clk_to_div_mult_table(clk);

drivers/sh/clk/cpg.c

288

if (!clk->parent_table || !clk->parent_num)

drivers/sh/clk/cpg.c

29

static unsigned int sh_clk_read_status(struct clk *clk)

drivers/sh/clk/cpg.c

292

for (i = 0; i < clk->parent_num; i++)

drivers/sh/clk/cpg.c

293

if (clk->parent_table[i] == parent)

drivers/sh/clk/cpg.c

296

if (i == clk->parent_num)

drivers/sh/clk/cpg.c

299

ret = clk_reparent(clk, parent);

drivers/sh/clk/cpg.c

303

value = sh_clk_read(clk) &

drivers/sh/clk/cpg.c

304

~(((1 << clk->src_width) - 1) << clk->src_shift);

drivers/sh/clk/cpg.c

306

sh_clk_write(value | (i << clk->src_shift), clk);

drivers/sh/clk/cpg.c

309

clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,

drivers/sh/clk/cpg.c

31

void __iomem *mapped_status = (phys_addr_t)clk->status_reg -

drivers/sh/clk/cpg.c

32

(phys_addr_t)clk->enable_reg + clk->mapped_reg;

drivers/sh/clk/cpg.c

324

int __init sh_clk_div6_register(struct clk *clks, int nr)

drivers/sh/clk/cpg.c

330

int __init sh_clk_div6_reparent_register(struct clk *clks, int nr)

drivers/sh/clk/cpg.c

339

static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)

drivers/sh/clk/cpg.c

34

if (clk->flags & CLK_ENABLE_REG_8BIT)

drivers/sh/clk/cpg.c

341

struct clk_div_mult_table *table = clk_to_div_mult_table(clk);

drivers/sh/clk/cpg.c

351

value = sh_clk_read(clk) & ~(1 << 7);

drivers/sh/clk/cpg.c

353

value = sh_clk_read(clk) | (1 << 7);

drivers/sh/clk/cpg.c

355

ret = clk_reparent(clk, parent);

drivers/sh/clk/cpg.c

359

sh_clk_write(value, clk);

drivers/sh/clk/cpg.c

36

else if (clk->flags & CLK_ENABLE_REG_16BIT)

drivers/sh/clk/cpg.c

362

clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,

drivers/sh/clk/cpg.c

363

table, &clk->arch_flags);

drivers/sh/clk/cpg.c

377

int __init sh_clk_div4_register(struct clk *clks, int nr,

drivers/sh/clk/cpg.c

383

int __init sh_clk_div4_enable_register(struct clk *clks, int nr,

drivers/sh/clk/cpg.c

390

int __init sh_clk_div4_reparent_register(struct clk *clks, int nr,

drivers/sh/clk/cpg.c

398

static unsigned long fsidiv_recalc(struct clk *clk)

drivers/sh/clk/cpg.c

402

value = __raw_readl(clk->mapping->base);

drivers/sh/clk/cpg.c

406

return clk->parent->rate;

drivers/sh/clk/cpg.c

408

return clk->parent->rate / value;

drivers/sh/clk/cpg.c

411

static long fsidiv_round_rate(struct clk *clk, unsigned long rate)

drivers/sh/clk/cpg.c

413

return clk_rate_div_range_round(clk, 1, 0xffff, rate);

drivers/sh/clk/cpg.c

416

static void fsidiv_disable(struct clk *clk)

drivers/sh/clk/cpg.c

418

__raw_writel(0, clk->mapping->base);

drivers/sh/clk/cpg.c

42

static void sh_clk_write(int value, struct clk *clk)

drivers/sh/clk/cpg.c

421

static int fsidiv_enable(struct clk *clk)

drivers/sh/clk/cpg.c

425

value = __raw_readl(clk->mapping->base) >> 16;

drivers/sh/clk/cpg.c

429

__raw_writel((value << 16) | 0x3, clk->mapping->base);

drivers/sh/clk/cpg.c

434

static int fsidiv_set_rate(struct clk *clk, unsigned long rate)

drivers/sh/clk/cpg.c

438

idx = (clk->parent->rate / rate) & 0xffff;

drivers/sh/clk/cpg.c

44

if (clk->flags & CLK_ENABLE_REG_8BIT)

drivers/sh/clk/cpg.c

440

__raw_writel(0, clk->mapping->base);

drivers/sh/clk/cpg.c

442

__raw_writel(idx << 16, clk->mapping->base);

drivers/sh/clk/cpg.c

45

iowrite8(value, clk->mapped_reg);

drivers/sh/clk/cpg.c

455

int __init sh_clk_fsidiv_register(struct clk *clks, int nr)

drivers/sh/clk/cpg.c

46

else if (clk->flags & CLK_ENABLE_REG_16BIT)

drivers/sh/clk/cpg.c

47

iowrite16(value, clk->mapped_reg);

drivers/sh/clk/cpg.c

49

iowrite32(value, clk->mapped_reg);

drivers/sh/clk/cpg.c

52

static int sh_clk_mstp_enable(struct clk *clk)

drivers/sh/clk/cpg.c

54

sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk);

drivers/sh/clk/cpg.c

55

if (clk->status_reg) {

drivers/sh/clk/cpg.c

59

(sh_clk_read_status(clk) & (1 << clk->enable_bit)) && i;

drivers/sh/clk/cpg.c

64

clk->enable_reg, clk->enable_bit);

drivers/sh/clk/cpg.c

71

static void sh_clk_mstp_disable(struct clk *clk)

drivers/sh/clk/cpg.c

73

sh_clk_write(sh_clk_read(clk) | (1 << clk->enable_bit), clk);

drivers/sh/clk/cpg.c

82

int __init sh_clk_mstp_register(struct clk *clks, int nr)

drivers/sh/clk/cpg.c

84

struct clk *clkp;

drivers/soc/aspeed/aspeed-lpc-ctrl.c

300

lpc_ctrl->clk = devm_clk_get(dev, NULL);

drivers/soc/aspeed/aspeed-lpc-ctrl.c

301

if (IS_ERR(lpc_ctrl->clk))

drivers/soc/aspeed/aspeed-lpc-ctrl.c

302

return dev_err_probe(dev, PTR_ERR(lpc_ctrl->clk),

drivers/soc/aspeed/aspeed-lpc-ctrl.c

304

rc = clk_prepare_enable(lpc_ctrl->clk);

drivers/soc/aspeed/aspeed-lpc-ctrl.c

323

clk_disable_unprepare(lpc_ctrl->clk);

drivers/soc/aspeed/aspeed-lpc-ctrl.c

332

clk_disable_unprepare(lpc_ctrl->clk);

drivers/soc/aspeed/aspeed-lpc-ctrl.c

35

struct clk *clk;

drivers/soc/aspeed/aspeed-lpc-snoop.c

321

lpc_snoop->clk = devm_clk_get_enabled(dev, NULL);

drivers/soc/aspeed/aspeed-lpc-snoop.c

322

if (IS_ERR(lpc_snoop->clk))

drivers/soc/aspeed/aspeed-lpc-snoop.c

323

return dev_err_probe(dev, PTR_ERR(lpc_snoop->clk), "couldn't get clock");

drivers/soc/aspeed/aspeed-lpc-snoop.c

85

struct clk *clk;

drivers/soc/canaan/k210-sysctl.c

17

struct clk *pclk;

drivers/soc/fsl/dpio/dpio-cmd.h

51

__le32 clk;

drivers/soc/fsl/dpio/dpio-driver.c

164

desc.qman_clk = dpio_attrs.clk;

drivers/soc/fsl/dpio/dpio.c

165

attr->clk = le32_to_cpu(dpio_rsp->clk);

drivers/soc/fsl/dpio/dpio.h

72

u32 clk;

drivers/soc/fsl/qe/tsa.c

140

struct clk *l1rclk_clk;

drivers/soc/fsl/qe/tsa.c

141

struct clk *l1rsync_clk;

drivers/soc/fsl/qe/tsa.c

142

struct clk *l1tclk_clk;

drivers/soc/fsl/qe/tsa.c

143

struct clk *l1tsync_clk;

drivers/soc/fsl/qe/tsa.c

684

struct clk *clk;

drivers/soc/fsl/qe/tsa.c

784

clk = of_clk_get_by_name(tdm_np, tsa_is_qe(tsa) ? "rsync" : "l1rsync");

drivers/soc/fsl/qe/tsa.c

785

if (IS_ERR(clk)) {

drivers/soc/fsl/qe/tsa.c

786

ret = PTR_ERR(clk);

drivers/soc/fsl/qe/tsa.c

789

ret = clk_prepare_enable(clk);

drivers/soc/fsl/qe/tsa.c

791

clk_put(clk);

drivers/soc/fsl/qe/tsa.c

794

tdm->l1rsync_clk = clk;

drivers/soc/fsl/qe/tsa.c

796

clk = of_clk_get_by_name(tdm_np, tsa_is_qe(tsa) ? "rclk" : "l1rclk");

drivers/soc/fsl/qe/tsa.c

797

if (IS_ERR(clk)) {

drivers/soc/fsl/qe/tsa.c

798

ret = PTR_ERR(clk);

drivers/soc/fsl/qe/tsa.c

801

ret = clk_prepare_enable(clk);

drivers/soc/fsl/qe/tsa.c

803

clk_put(clk);

drivers/soc/fsl/qe/tsa.c

806

tdm->l1rclk_clk = clk;

drivers/soc/fsl/qe/tsa.c

809

clk = of_clk_get_by_name(tdm_np, tsa_is_qe(tsa) ? "tsync" : "l1tsync");

drivers/soc/fsl/qe/tsa.c

810

if (IS_ERR(clk)) {

drivers/soc/fsl/qe/tsa.c

811

ret = PTR_ERR(clk);

drivers/soc/fsl/qe/tsa.c

814

ret = clk_prepare_enable(clk);

drivers/soc/fsl/qe/tsa.c

816

clk_put(clk);

drivers/soc/fsl/qe/tsa.c

819

tdm->l1tsync_clk = clk;

drivers/soc/fsl/qe/tsa.c

821

clk = of_clk_get_by_name(tdm_np, tsa_is_qe(tsa) ? "tclk" : "l1tclk");

drivers/soc/fsl/qe/tsa.c

822

if (IS_ERR(clk)) {

drivers/soc/fsl/qe/tsa.c

823

ret = PTR_ERR(clk);

drivers/soc/fsl/qe/tsa.c

826

ret = clk_prepare_enable(clk);

drivers/soc/fsl/qe/tsa.c

828

clk_put(clk);

drivers/soc/fsl/qe/tsa.c

831

tdm->l1tclk_clk = clk;

drivers/soc/fsl/qe/usb.c

19

int qe_usb_clock_set(enum qe_clock clk, int rate)

drivers/soc/fsl/qe/usb.c

25

switch (clk) {

drivers/soc/fsl/qe/usb.c

37

pr_err("%s: requested unknown clock %d\n", __func__, clk);

drivers/soc/fsl/qe/usb.c

41

if (qe_clock_is_brg(clk))

drivers/soc/fsl/qe/usb.c

42

qe_setbrg(clk, rate, 1);

drivers/soc/imx/soc-imx8m.c

145

drvdata->clk = of_clk_get_by_name(np, NULL);

drivers/soc/imx/soc-imx8m.c

146

if (IS_ERR(drvdata->clk)) {

drivers/soc/imx/soc-imx8m.c

147

ret = PTR_ERR(drvdata->clk);

drivers/soc/imx/soc-imx8m.c

151

ret = clk_prepare_enable(drvdata->clk);

drivers/soc/imx/soc-imx8m.c

166

clk_disable_unprepare(drvdata->clk);

drivers/soc/imx/soc-imx8m.c

167

clk_put(drvdata->clk);

drivers/soc/imx/soc-imx8m.c

41

struct clk *clk;

drivers/soc/mediatek/mtk-devapc.c

55

struct clk *infra_clk;

drivers/soc/mediatek/mtk-dvfsrc.c

667

dvfsrc->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/soc/mediatek/mtk-dvfsrc.c

668

if (IS_ERR(dvfsrc->clk))

drivers/soc/mediatek/mtk-dvfsrc.c

669

return dev_err_probe(&pdev->dev, PTR_ERR(dvfsrc->clk),

drivers/soc/mediatek/mtk-dvfsrc.c

81

struct clk *clk;

drivers/soc/mediatek/mtk-mutex.c

1110

mtx->clk = devm_clk_get(dev, NULL);

drivers/soc/mediatek/mtk-mutex.c

1111

if (IS_ERR(mtx->clk))

drivers/soc/mediatek/mtk-mutex.c

1112

return dev_err_probe(dev, PTR_ERR(mtx->clk), "Failed to get clock\n");

drivers/soc/mediatek/mtk-mutex.c

363

struct clk *clk;

drivers/soc/mediatek/mtk-mutex.c

878

return clk_prepare_enable(mtx->clk);

drivers/soc/mediatek/mtk-mutex.c

886

clk_disable_unprepare(mtx->clk);

drivers/soc/mediatek/mtk-pmic-wrap.c

2471

struct clk_bulk_data *clk;

drivers/soc/mediatek/mtk-pmic-wrap.c

2521

ret = devm_clk_bulk_get_all_enabled(wrp->dev, &clk);

drivers/soc/mediatek/mtk-svs.c

391

struct clk *main_clk;

drivers/soc/pxa/ssp.c

123

ssp->clk = devm_clk_get(dev, NULL);

drivers/soc/pxa/ssp.c

124

if (IS_ERR(ssp->clk))

drivers/soc/pxa/ssp.c

125

return PTR_ERR(ssp->clk);

drivers/soc/qcom/ice.c

110

struct clk *core_clk;

drivers/soc/qcom/ocmem.c

59

struct clk *core_clk;

drivers/soc/qcom/ocmem.c

60

struct clk *iface_clk;

drivers/soc/qcom/qcom-geni-se.c

583

clk_disable_unprepare(se->clk);

drivers/soc/qcom/qcom-geni-se.c

619

ret = clk_prepare_enable(se->clk);

drivers/soc/qcom/qcom-geni-se.c

681

freq = clk_round_rate(se->clk, freq + 1);

drivers/soc/qcom/qcom_gsbi.c

111

struct clk *hclk;

drivers/soc/tegra/common.c

36

struct clk *clk;

drivers/soc/tegra/common.c

40

clk = devm_clk_get(dev, NULL);

drivers/soc/tegra/common.c

41

if (IS_ERR(clk)) {

drivers/soc/tegra/common.c

42

dev_err(dev, "failed to get clk: %pe\n", clk);

drivers/soc/tegra/common.c

43

return PTR_ERR(clk);

drivers/soc/tegra/common.c

46

rate = clk_get_rate(clk);

drivers/soc/tegra/fuse/fuse-tegra.c

115

fuse->clk = NULL;

drivers/soc/tegra/fuse/fuse-tegra.c

191

fuse->clk = devm_clk_get_optional(&pdev->dev, "fuse");

drivers/soc/tegra/fuse/fuse-tegra.c

192

if (IS_ERR(fuse->clk))

drivers/soc/tegra/fuse/fuse-tegra.c

193

return dev_err_probe(&pdev->dev, PTR_ERR(fuse->clk), "failed to get FUSE clock\n");

drivers/soc/tegra/fuse/fuse-tegra.c

264

err = clk_prepare_enable(fuse->clk);

drivers/soc/tegra/fuse/fuse-tegra.c

275

clk_disable_unprepare(fuse->clk);

drivers/soc/tegra/fuse/fuse-tegra.c

352

if (is_of_node(dev_fwnode(fuse->dev)) && !fuse->clk)

drivers/soc/tegra/fuse/fuse-tegra.c

358

if (IS_ERR(fuse->clk))

drivers/soc/tegra/fuse/fuse-tegra.c

359

return PTR_ERR(fuse->clk);

drivers/soc/tegra/fuse/fuse.h

49

struct clk *clk;

drivers/soc/tegra/pmc.c

1125

unsigned int id, struct clk *clk,

drivers/soc/tegra/pmc.c

1145

pg->clks = &clk;

drivers/soc/tegra/pmc.c

1170

int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk,

drivers/soc/tegra/pmc.c

1173

return tegra_pmc_powergate_sequence_power_up(pmc, id, clk, rst);

drivers/soc/tegra/pmc.c

1336

struct clk *clk;

drivers/soc/tegra/pmc.c

1344

pg->clks = kzalloc_objs(clk, count);

drivers/soc/tegra/pmc.c

1706

if (pmc->clk) {

drivers/soc/tegra/pmc.c

1744

if (pmc->clk)

drivers/soc/tegra/pmc.c

2783

struct pmc_clk *clk = to_pmc_clk(hw);

drivers/soc/tegra/pmc.c

2786

val = tegra_pmc_readl(clk->pmc, clk->offs) >> clk->mux_shift;

drivers/soc/tegra/pmc.c

2794

struct pmc_clk *clk = to_pmc_clk(hw);

drivers/soc/tegra/pmc.c

2797

val = tegra_pmc_readl(clk->pmc, clk->offs);

drivers/soc/tegra/pmc.c

2798

val &= ~(PMC_CLK_OUT_MUX_MASK << clk->mux_shift);

drivers/soc/tegra/pmc.c

2799

val |= index << clk->mux_shift;

drivers/soc/tegra/pmc.c

2800

tegra_pmc_writel(clk->pmc, val, clk->offs);

drivers/soc/tegra/pmc.c

2801

pmc_clk_fence_udelay(clk->pmc, clk->offs);

drivers/soc/tegra/pmc.c

2808

struct pmc_clk *clk = to_pmc_clk(hw);

drivers/soc/tegra/pmc.c

2811

val = tegra_pmc_readl(clk->pmc, clk->offs) & BIT(clk->force_en_shift);

drivers/soc/tegra/pmc.c

2829

struct pmc_clk *clk = to_pmc_clk(hw);

drivers/soc/tegra/pmc.c

2831

pmc_clk_set_state(clk->pmc, clk->offs, clk->force_en_shift, 1);

drivers/soc/tegra/pmc.c

2838

struct pmc_clk *clk = to_pmc_clk(hw);

drivers/soc/tegra/pmc.c

2840

pmc_clk_set_state(clk->pmc, clk->offs, clk->force_en_shift, 0);

drivers/soc/tegra/pmc.c

2852

static struct clk *

drivers/soc/tegra/pmc.c

286

struct clk **clks;

drivers/soc/tegra/pmc.c

2910

static struct clk *

drivers/soc/tegra/pmc.c

2939

struct clk *clk;

drivers/soc/tegra/pmc.c

2970

clk = tegra_pmc_clk_out_register(pmc, data, PMC_CLK_OUT_CNTRL);

drivers/soc/tegra/pmc.c

2971

if (IS_ERR(clk)) {

drivers/soc/tegra/pmc.c

2973

data->name, PTR_ERR_OR_ZERO(clk));

drivers/soc/tegra/pmc.c

2977

err = clk_register_clkdev(clk, data->name, NULL);

drivers/soc/tegra/pmc.c

2985

clk_data->clks[data->clk_id] = clk;

drivers/soc/tegra/pmc.c

2990

clk = tegra_pmc_clk_gate_register(pmc,

drivers/soc/tegra/pmc.c

2995

if (IS_ERR(clk)) {

drivers/soc/tegra/pmc.c

2998

PTR_ERR_OR_ZERO(clk));

drivers/soc/tegra/pmc.c

3002

clk = tegra_pmc_clk_gate_register(pmc, "pmc_blink",

drivers/soc/tegra/pmc.c

3006

if (IS_ERR(clk)) {

drivers/soc/tegra/pmc.c

3009

PTR_ERR_OR_ZERO(clk));

drivers/soc/tegra/pmc.c

3013

err = clk_register_clkdev(clk, "pmc_blink", NULL);

drivers/soc/tegra/pmc.c

3021

clk_data->clks[TEGRA_PMC_CLK_BLINK] = clk;

drivers/soc/tegra/pmc.c

3158

pmc->clk = devm_clk_get_optional(&pdev->dev, "pclk");

drivers/soc/tegra/pmc.c

3159

if (IS_ERR(pmc->clk))

drivers/soc/tegra/pmc.c

3160

return dev_err_probe(&pdev->dev, PTR_ERR(pmc->clk),

drivers/soc/tegra/pmc.c

3211

if (pmc->clk) {

drivers/soc/tegra/pmc.c

3213

err = devm_clk_notifier_register(&pdev->dev, pmc->clk,

drivers/soc/tegra/pmc.c

3221

pmc->rate = clk_get_rate(pmc->clk);

drivers/soc/tegra/pmc.c

448

struct clk *clk;

drivers/soc/ti/pm33xx.c

45

static struct clk *rtc_fck;

drivers/soc/ti/pruss.c

302

static int pruss_clk_mux_setup(struct pruss *pruss, struct clk *clk_mux,

drivers/soundwire/qcom.c

203

struct clk *hclk;

drivers/spi/atmel-quadspi.c

276

struct clk *pclk;

drivers/spi/atmel-quadspi.c

277

struct clk *qspick;

drivers/spi/atmel-quadspi.c

278

struct clk *gclk;

drivers/spi/spi-airoha-snfi.c

225

struct clk *spi_clk;

drivers/spi/spi-amlogic-spifc-a1.c

107

struct clk *clk;

drivers/spi/spi-amlogic-spifc-a1.c

246

ret = clk_set_rate(spifc->clk, freq);

drivers/spi/spi-amlogic-spifc-a1.c

347

spifc->clk = devm_clk_get_enabled(spifc->dev, NULL);

drivers/spi/spi-amlogic-spifc-a1.c

348

if (IS_ERR(spifc->clk))

drivers/spi/spi-amlogic-spifc-a1.c

349

return dev_err_probe(spifc->dev, PTR_ERR(spifc->clk),

drivers/spi/spi-amlogic-spifc-a1.c

389

clk_disable_unprepare(spifc->clk);

drivers/spi/spi-amlogic-spifc-a1.c

400

ret = clk_prepare_enable(spifc->clk);

drivers/spi/spi-amlogic-spifc-a1.c

409

clk_disable_unprepare(spifc->clk);

drivers/spi/spi-amlogic-spifc-a1.c

420

clk_disable_unprepare(spifc->clk);

drivers/spi/spi-amlogic-spifc-a1.c

430

ret = clk_prepare_enable(spifc->clk);

drivers/spi/spi-amlogic-spifc-a4.c

187

struct clk *gate_clk;

drivers/spi/spi-amlogic-spifc-a4.c

188

struct clk *core_clk;

drivers/spi/spi-amlogic-spisg.c

150

struct clk *core;

drivers/spi/spi-amlogic-spisg.c

151

struct clk *pclk;

drivers/spi/spi-amlogic-spisg.c

152

struct clk *sclk;

drivers/spi/spi-apple.c

125

struct clk *clk; /* bus clock */

drivers/spi/spi-apple.c

201

cr = DIV_ROUND_UP(clk_get_rate(spi->clk), t->speed_hz);

drivers/spi/spi-apple.c

474

spi->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-apple.c

475

if (IS_ERR(spi->clk))

drivers/spi/spi-apple.c

476

return dev_err_probe(&pdev->dev, PTR_ERR(spi->clk),

drivers/spi/spi-ar934x.c

170

struct clk *clk;

drivers/spi/spi-ar934x.c

176

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-ar934x.c

177

if (IS_ERR(clk)) {

drivers/spi/spi-ar934x.c

179

return PTR_ERR(clk);

drivers/spi/spi-ar934x.c

204

sp->clk = clk;

drivers/spi/spi-ar934x.c

205

sp->clk_freq = clk_get_rate(clk);

drivers/spi/spi-ar934x.c

47

struct clk *clk;

drivers/spi/spi-armada-3700.c

104

struct clk *clk;

drivers/spi/spi-armada-3700.c

223

prescale = DIV_ROUND_UP(clk_get_rate(a3700_spi->clk), speed_hz);

drivers/spi/spi-armada-3700.c

574

ret = clk_enable(a3700_spi->clk);

drivers/spi/spi-armada-3700.c

801

clk_disable(a3700_spi->clk);

drivers/spi/spi-armada-3700.c

866

spi->clk = devm_clk_get_prepared(dev, NULL);

drivers/spi/spi-armada-3700.c

867

if (IS_ERR(spi->clk)) {

drivers/spi/spi-armada-3700.c

868

dev_err(dev, "could not find clk: %ld\n", PTR_ERR(spi->clk));

drivers/spi/spi-armada-3700.c

873

clk_get_rate(spi->clk));

drivers/spi/spi-armada-3700.c

874

host->min_speed_hz = DIV_ROUND_UP(clk_get_rate(spi->clk),

drivers/spi/spi-aspeed-smc.c

109

struct clk *clk;

drivers/spi/spi-aspeed-smc.c

992

aspi->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-aspeed-smc.c

993

if (IS_ERR(aspi->clk)) {

drivers/spi/spi-aspeed-smc.c

995

return PTR_ERR(aspi->clk);

drivers/spi/spi-aspeed-smc.c

998

aspi->clk_freq = clk_get_rate(aspi->clk);

drivers/spi/spi-at91-usart.c

482

struct clk *clk;

drivers/spi/spi-at91-usart.c

495

clk = devm_clk_get(pdev->dev.parent, "usart");

drivers/spi/spi-at91-usart.c

496

if (IS_ERR(clk))

drivers/spi/spi-at91-usart.c

497

return PTR_ERR(clk);

drivers/spi/spi-at91-usart.c

518

controller->max_speed_hz = DIV_ROUND_UP(clk_get_rate(clk),

drivers/spi/spi-at91-usart.c

520

controller->min_speed_hz = DIV_ROUND_UP(clk_get_rate(clk),

drivers/spi/spi-at91-usart.c

534

aus->clk = clk;

drivers/spi/spi-at91-usart.c

541

ret = clk_prepare_enable(clk);

drivers/spi/spi-at91-usart.c

545

aus->spi_clk = clk_get_rate(clk);

drivers/spi/spi-at91-usart.c

573

clk_disable_unprepare(clk);

drivers/spi/spi-at91-usart.c

584

clk_disable_unprepare(aus->clk);

drivers/spi/spi-at91-usart.c

597

return clk_prepare_enable(aus->clk);

drivers/spi/spi-at91-usart.c

638

clk_disable_unprepare(aus->clk);

drivers/spi/spi-at91-usart.c

83

struct clk *clk;

drivers/spi/spi-atcspi200.c

115

struct clk *clk;

drivers/spi/spi-atcspi200.c

497

spi->clk = devm_clk_get(spi->dev, NULL);

drivers/spi/spi-atcspi200.c

498

if (IS_ERR(spi->clk))

drivers/spi/spi-atcspi200.c

499

return dev_err_probe(spi->dev, PTR_ERR(spi->clk),

drivers/spi/spi-atcspi200.c

525

ret = clk_prepare_enable(spi->clk);

drivers/spi/spi-atcspi200.c

530

spi->clk_rate = clk_get_rate(spi->clk);

drivers/spi/spi-atcspi200.c

605

clk_disable_unprepare(spi->clk);

drivers/spi/spi-atcspi200.c

619

clk_disable_unprepare(spi->clk);

drivers/spi/spi-atcspi200.c

630

ret = clk_prepare_enable(spi->clk);

drivers/spi/spi-atcspi200.c

645

clk_disable_unprepare(spi->clk);

drivers/spi/spi-ath79.c

202

sp->clk = devm_clk_get_enabled(&pdev->dev, "ahb");

drivers/spi/spi-ath79.c

203

if (IS_ERR(sp->clk)) {

drivers/spi/spi-ath79.c

204

ret = PTR_ERR(sp->clk);

drivers/spi/spi-ath79.c

208

rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ);

drivers/spi/spi-ath79.c

45

struct clk *clk;

drivers/spi/spi-atmel.c

1514

struct clk *clk;

drivers/spi/spi-atmel.c

1526

clk = devm_clk_get(&pdev->dev, "spi_clk");

drivers/spi/spi-atmel.c

1527

if (IS_ERR(clk))

drivers/spi/spi-atmel.c

1528

return PTR_ERR(clk);

drivers/spi/spi-atmel.c

1564

as->clk = clk;

drivers/spi/spi-atmel.c

1626

ret = clk_prepare_enable(clk);

drivers/spi/spi-atmel.c

1641

as->spi_clk = clk_get_rate(clk);

drivers/spi/spi-atmel.c

1679

clk_disable_unprepare(clk);

drivers/spi/spi-atmel.c

1713

clk_disable_unprepare(as->clk);

drivers/spi/spi-atmel.c

1726

clk_disable_unprepare(as->clk);

drivers/spi/spi-atmel.c

1742

ret = clk_prepare_enable(as->clk);

drivers/spi/spi-atmel.c

1776

ret = clk_prepare_enable(as->clk);

drivers/spi/spi-atmel.c

1787

clk_disable_unprepare(as->clk);

drivers/spi/spi-atmel.c

258

struct clk *clk;

drivers/spi/spi-atmel.c

259

struct clk *gclk;

drivers/spi/spi-axi-spi-engine.c

1164

spi_engine->clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk");

drivers/spi/spi-axi-spi-engine.c

1165

if (IS_ERR(spi_engine->clk))

drivers/spi/spi-axi-spi-engine.c

1166

return PTR_ERR(spi_engine->clk);

drivers/spi/spi-axi-spi-engine.c

163

struct clk *clk;

drivers/spi/spi-axi-spi-engine.c

164

struct clk *ref_clk;

drivers/spi/spi-axiado.h

116

struct clk *ref_clk;

drivers/spi/spi-axiado.h

117

struct clk *pclk;

drivers/spi/spi-bcm-qspi.c

1515

qspi->clk = devm_clk_get_optional(&pdev->dev, NULL);

drivers/spi/spi-bcm-qspi.c

1516

if (IS_ERR(qspi->clk))

drivers/spi/spi-bcm-qspi.c

1517

return PTR_ERR(qspi->clk);

drivers/spi/spi-bcm-qspi.c

1583

if (qspi->clk) {

drivers/spi/spi-bcm-qspi.c

1584

ret = clk_prepare_enable(qspi->clk);

drivers/spi/spi-bcm-qspi.c

1589

qspi->base_clk = clk_get_rate(qspi->clk);

drivers/spi/spi-bcm-qspi.c

1671

clk_disable_unprepare(qspi->clk);

drivers/spi/spi-bcm-qspi.c

1685

clk_disable_unprepare(qspi->clk);

drivers/spi/spi-bcm-qspi.c

1702

clk_disable_unprepare(qspi->clk);

drivers/spi/spi-bcm-qspi.c

1720

ret = clk_prepare_enable(qspi->clk);

drivers/spi/spi-bcm-qspi.c

224

struct clk *clk;

drivers/spi/spi-bcm2835.c

122

struct clk *clk;

drivers/spi/spi-bcm2835.c

1379

bs->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-bcm2835.c

1380

if (IS_ERR(bs->clk))

drivers/spi/spi-bcm2835.c

1381

return dev_err_probe(&pdev->dev, PTR_ERR(bs->clk),

drivers/spi/spi-bcm2835.c

1384

ctlr->max_speed_hz = clk_get_rate(bs->clk) / 2;

drivers/spi/spi-bcm2835.c

1390

bs->clk_hz = clk_get_rate(bs->clk);

drivers/spi/spi-bcm2835aux.c

358

clk_hz = clk_get_rate(bs->clk);

drivers/spi/spi-bcm2835aux.c

514

bs->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-bcm2835aux.c

515

if (IS_ERR(bs->clk)) {

drivers/spi/spi-bcm2835aux.c

516

err = PTR_ERR(bs->clk);

drivers/spi/spi-bcm2835aux.c

526

clk_hz = clk_get_rate(bs->clk);

drivers/spi/spi-bcm2835aux.c

88

struct clk *clk;

drivers/spi/spi-bcm63xx-hsspi.c

135

struct clk *clk;

drivers/spi/spi-bcm63xx-hsspi.c

136

struct clk *pll_clk;

drivers/spi/spi-bcm63xx-hsspi.c

748

struct clk *clk, *pll_clk = NULL;

drivers/spi/spi-bcm63xx-hsspi.c

761

clk = devm_clk_get(dev, "hsspi");

drivers/spi/spi-bcm63xx-hsspi.c

763

if (IS_ERR(clk))

drivers/spi/spi-bcm63xx-hsspi.c

764

return PTR_ERR(clk);

drivers/spi/spi-bcm63xx-hsspi.c

770

ret = clk_prepare_enable(clk);

drivers/spi/spi-bcm63xx-hsspi.c

780

rate = clk_get_rate(clk);

drivers/spi/spi-bcm63xx-hsspi.c

808

bs->clk = clk;

drivers/spi/spi-bcm63xx-hsspi.c

893

clk_disable_unprepare(clk);

drivers/spi/spi-bcm63xx-hsspi.c

906

clk_disable_unprepare(bs->clk);

drivers/spi/spi-bcm63xx-hsspi.c

918

clk_disable_unprepare(bs->clk);

drivers/spi/spi-bcm63xx-hsspi.c

929

ret = clk_prepare_enable(bs->clk);

drivers/spi/spi-bcm63xx-hsspi.c

936

clk_disable_unprepare(bs->clk);

drivers/spi/spi-bcm63xx.c

150

struct clk *clk;

drivers/spi/spi-bcm63xx.c

499

struct clk *clk;

drivers/spi/spi-bcm63xx.c

534

clk = devm_clk_get(dev, "spi");

drivers/spi/spi-bcm63xx.c

535

if (IS_ERR(clk)) {

drivers/spi/spi-bcm63xx.c

537

return PTR_ERR(clk);

drivers/spi/spi-bcm63xx.c

563

bs->clk = clk;

drivers/spi/spi-bcm63xx.c

588

ret = clk_prepare_enable(bs->clk);

drivers/spi/spi-bcm63xx.c

617

clk_disable_unprepare(clk);

drivers/spi/spi-bcm63xx.c

632

clk_disable_unprepare(bs->clk);

drivers/spi/spi-bcm63xx.c

642

clk_disable_unprepare(bs->clk);

drivers/spi/spi-bcm63xx.c

653

ret = clk_prepare_enable(bs->clk);

drivers/spi/spi-bcmbca-hsspi.c

116

struct clk *clk;

drivers/spi/spi-bcmbca-hsspi.c

117

struct clk *pll_clk;

drivers/spi/spi-bcmbca-hsspi.c

439

struct clk *clk, *pll_clk = NULL;

drivers/spi/spi-bcmbca-hsspi.c

455

clk = devm_clk_get(dev, "hsspi");

drivers/spi/spi-bcmbca-hsspi.c

456

if (IS_ERR(clk))

drivers/spi/spi-bcmbca-hsspi.c

457

return PTR_ERR(clk);

drivers/spi/spi-bcmbca-hsspi.c

459

ret = clk_prepare_enable(clk);

drivers/spi/spi-bcmbca-hsspi.c

463

rate = clk_get_rate(clk);

drivers/spi/spi-bcmbca-hsspi.c

491

bs->clk = clk;

drivers/spi/spi-bcmbca-hsspi.c

565

clk_disable_unprepare(clk);

drivers/spi/spi-bcmbca-hsspi.c

577

clk_disable_unprepare(bs->clk);

drivers/spi/spi-bcmbca-hsspi.c

589

clk_disable_unprepare(bs->clk);

drivers/spi/spi-bcmbca-hsspi.c

600

ret = clk_prepare_enable(bs->clk);

drivers/spi/spi-bcmbca-hsspi.c

607

clk_disable_unprepare(bs->clk);

drivers/spi/spi-cadence-quadspi.c

1837

if (!cqspi->clks[CLK_QSPI_REF].clk) {

drivers/spi/spi-cadence-quadspi.c

1909

cqspi->master_ref_clk_hz = clk_get_rate(cqspi->clks[CLK_QSPI_REF].clk);

drivers/spi/spi-cadence.c

120

struct clk *ref_clk;

drivers/spi/spi-cadence.c

121

struct clk *pclk;

drivers/spi/spi-cavium-thunderx.c

52

p->clk = devm_clk_get_enabled(dev, NULL);

drivers/spi/spi-cavium-thunderx.c

53

if (IS_ERR(p->clk)) {

drivers/spi/spi-cavium-thunderx.c

54

ret = PTR_ERR(p->clk);

drivers/spi/spi-cavium-thunderx.c

58

p->sys_freq = clk_get_rate(p->clk);

drivers/spi/spi-cavium.h

23

struct clk *clk;

drivers/spi/spi-clps711x.c

28

struct clk *spi_clk;

drivers/spi/spi-coldfire-qspi.c

384

mcfqspi->clk = devm_clk_get_enabled(&pdev->dev, "qspi_clk");

drivers/spi/spi-coldfire-qspi.c

385

if (IS_ERR(mcfqspi->clk)) {

drivers/spi/spi-coldfire-qspi.c

387

status = PTR_ERR(mcfqspi->clk);

drivers/spi/spi-coldfire-qspi.c

457

clk_disable(mcfqspi->clk);

drivers/spi/spi-coldfire-qspi.c

467

clk_enable(mcfqspi->clk);

drivers/spi/spi-coldfire-qspi.c

479

clk_disable(mcfqspi->clk);

drivers/spi/spi-coldfire-qspi.c

489

clk_enable(mcfqspi->clk);

drivers/spi/spi-coldfire-qspi.c

62

struct clk *clk;

drivers/spi/spi-davinci.c

166

struct clk *clk;

drivers/spi/spi-davinci.c

307

ret = DIV_ROUND_UP(clk_get_rate(dspi->clk), max_speed_hz) - 1;

drivers/spi/spi-davinci.c

984

dspi->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-davinci.c

985

if (IS_ERR(dspi->clk)) {

drivers/spi/spi-dw-mmio.c

30

struct clk *clk;

drivers/spi/spi-dw-mmio.c

31

struct clk *pclk;

drivers/spi/spi-dw-mmio.c

340

dwsmmio->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-dw-mmio.c

341

if (IS_ERR(dwsmmio->clk))

drivers/spi/spi-dw-mmio.c

342

return PTR_ERR(dwsmmio->clk);

drivers/spi/spi-dw-mmio.c

360

dws->max_freq = clk_get_rate(dwsmmio->clk);

drivers/spi/spi-dw-mmio.c

405

clk_disable_unprepare(dwsmmio->clk);

drivers/spi/spi-dw-mmio.c

414

clk_prepare_enable(dwsmmio->clk);

drivers/spi/spi-ep93xx.c

112

unsigned long spi_clk_rate = clk_get_rate(espi->clk);

drivers/spi/spi-ep93xx.c

549

ret = clk_prepare_enable(espi->clk);

drivers/spi/spi-ep93xx.c

569

clk_disable_unprepare(espi->clk);

drivers/spi/spi-ep93xx.c

654

espi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-ep93xx.c

655

if (IS_ERR(espi->clk)) {

drivers/spi/spi-ep93xx.c

657

error = PTR_ERR(espi->clk);

drivers/spi/spi-ep93xx.c

665

host->max_speed_hz = clk_get_rate(espi->clk) / 2;

drivers/spi/spi-ep93xx.c

666

host->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256);

drivers/spi/spi-ep93xx.c

85

struct clk *clk;

drivers/spi/spi-fsl-dspi.c

1332

clkrate = clk_get_rate(dspi->clk);

drivers/spi/spi-fsl-dspi.c

1471

clk_disable_unprepare(dspi->clk);

drivers/spi/spi-fsl-dspi.c

1485

ret = clk_prepare_enable(dspi->clk);

drivers/spi/spi-fsl-dspi.c

1637

dspi->clk = devm_clk_get_enabled(&pdev->dev, "dspi");

drivers/spi/spi-fsl-dspi.c

1638

if (IS_ERR(dspi->clk)) {

drivers/spi/spi-fsl-dspi.c

1639

ret = PTR_ERR(dspi->clk);

drivers/spi/spi-fsl-dspi.c

1676

clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor;

drivers/spi/spi-fsl-dspi.c

345

struct clk *clk;

drivers/spi/spi-fsl-lpspi.c

107

struct clk *clk_ipg;

drivers/spi/spi-fsl-lpspi.c

108

struct clk *clk_per;

drivers/spi/spi-fsl-qspi.c

288

struct clk *clk, *clk_en;

drivers/spi/spi-fsl-qspi.c

502

ret = clk_prepare_enable(q->clk);

drivers/spi/spi-fsl-qspi.c

519

clk_disable_unprepare(q->clk);

drivers/spi/spi-fsl-qspi.c

563

ret = clk_set_rate(q->clk, rate);

drivers/spi/spi-fsl-qspi.c

758

ret = clk_set_rate(q->clk, 66000000);

drivers/spi/spi-fsl-qspi.c

943

q->clk = devm_clk_get(dev, "qspi");

drivers/spi/spi-fsl-qspi.c

944

if (IS_ERR(q->clk))

drivers/spi/spi-fsl-qspi.c

945

return PTR_ERR(q->clk);

drivers/spi/spi-geni-qcom.c

1024

struct clk *clk;

drivers/spi/spi-geni-qcom.c

1039

clk = devm_clk_get(dev, "se");

drivers/spi/spi-geni-qcom.c

1040

if (IS_ERR(clk))

drivers/spi/spi-geni-qcom.c

1041

return PTR_ERR(clk);

drivers/spi/spi-geni-qcom.c

1058

mas->se.clk = clk;

drivers/spi/spi-img-spfi.c

95

struct clk *spfi_clk;

drivers/spi/spi-img-spfi.c

96

struct clk *sys_clk;

drivers/spi/spi-imx.c

1002

unsigned int clk;

drivers/spi/spi-imx.c

1004

reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, spi_imx->spi_bus_clk, max, &clk)

drivers/spi/spi-imx.c

1006

spi_imx->spi_bus_clk = clk;

drivers/spi/spi-imx.c

1076

unsigned int clk;

drivers/spi/spi-imx.c

1078

reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) <<

drivers/spi/spi-imx.c

1080

spi_imx->spi_bus_clk = clk;

drivers/spi/spi-imx.c

117

struct clk *clk_per;

drivers/spi/spi-imx.c

118

struct clk *clk_ipg;

drivers/spi/spi-imx.c

727

u32 clk;

drivers/spi/spi-imx.c

744

ctrl |= mx51_ecspi_clkdiv(spi_imx, spi_imx->spi_bus_clk, &clk);

drivers/spi/spi-imx.c

745

spi_imx->spi_bus_clk = clk;

drivers/spi/spi-imx.c

897

unsigned int clk;

drivers/spi/spi-imx.c

899

reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) <<

drivers/spi/spi-imx.c

901

spi_imx->spi_bus_clk = clk;

drivers/spi/spi-ingenic.c

104

unsigned long clk_hz = clk_get_rate(priv->clk);

drivers/spi/spi-ingenic.c

306

ret = clk_prepare_enable(priv->clk);

drivers/spi/spi-ingenic.c

324

clk_disable_unprepare(priv->clk);

drivers/spi/spi-ingenic.c

407

priv->clk = devm_clk_get(dev, NULL);

drivers/spi/spi-ingenic.c

408

if (IS_ERR(priv->clk)) {

drivers/spi/spi-ingenic.c

409

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/spi/spi-ingenic.c

64

struct clk *clk;

drivers/spi/spi-jcore.c

148

struct clk *clk;

drivers/spi/spi-jcore.c

188

clk = devm_clk_get(&pdev->dev, "ref_clk");

drivers/spi/spi-jcore.c

189

if (!IS_ERR(clk)) {

drivers/spi/spi-jcore.c

190

if (clk_prepare_enable(clk) == 0) {

drivers/spi/spi-jcore.c

191

clock_freq = clk_get_rate(clk);

drivers/spi/spi-jcore.c

192

clk_disable_unprepare(clk);

drivers/spi/spi-lantiq-ssc.c

169

struct clk *spi_clk;

drivers/spi/spi-lantiq-ssc.c

170

struct clk *fpi_clk;

drivers/spi/spi-loongson-core.c

200

struct clk *clk;

drivers/spi/spi-loongson-core.c

219

clk = devm_clk_get_optional(dev, NULL);

drivers/spi/spi-loongson-core.c

220

if (IS_ERR(clk))

drivers/spi/spi-loongson-core.c

221

return dev_err_probe(dev, PTR_ERR(clk), "unable to get clock\n");

drivers/spi/spi-loongson-core.c

223

spi->clk_rate = clk_get_rate(clk);

drivers/spi/spi-meson-spicc.c

182

struct clk *core;

drivers/spi/spi-meson-spicc.c

183

struct clk *pclk;

drivers/spi/spi-meson-spicc.c

185

struct clk *clk;

drivers/spi/spi-meson-spicc.c

510

hz = clk_get_rate(spicc->clk);

drivers/spi/spi-meson-spicc.c

550

clk_set_rate(spicc->clk, xfer->speed_hz);

drivers/spi/spi-meson-spicc.c

834

struct clk *clk;

drivers/spi/spi-meson-spicc.c

865

clk = devm_clk_register(dev, &pow2_fixed_div->hw);

drivers/spi/spi-meson-spicc.c

866

if (WARN_ON(IS_ERR(clk)))

drivers/spi/spi-meson-spicc.c

867

return PTR_ERR(clk);

drivers/spi/spi-meson-spicc.c

886

spicc->clk = devm_clk_register(dev, &spicc->pow2_div.hw);

drivers/spi/spi-meson-spicc.c

887

if (WARN_ON(IS_ERR(spicc->clk)))

drivers/spi/spi-meson-spicc.c

888

return PTR_ERR(spicc->clk);

drivers/spi/spi-meson-spicc.c

900

struct clk *clk;

drivers/spi/spi-meson-spicc.c

931

clk = devm_clk_register(dev, &enh_fixed_div->hw);

drivers/spi/spi-meson-spicc.c

932

if (WARN_ON(IS_ERR(clk)))

drivers/spi/spi-meson-spicc.c

933

return PTR_ERR(clk);

drivers/spi/spi-meson-spicc.c

951

clk = devm_clk_register(dev, &enh_div->hw);

drivers/spi/spi-meson-spicc.c

952

if (WARN_ON(IS_ERR(clk)))

drivers/spi/spi-meson-spicc.c

953

return PTR_ERR(clk);

drivers/spi/spi-meson-spicc.c

972

spicc->clk = devm_clk_register(dev, &mux->hw);

drivers/spi/spi-meson-spicc.c

973

if (WARN_ON(IS_ERR(spicc->clk)))

drivers/spi/spi-meson-spicc.c

974

return PTR_ERR(spicc->clk);

drivers/spi/spi-meson-spifc.c

170

parent = clk_get_rate(spifc->clk);

drivers/spi/spi-meson-spifc.c

315

spifc->clk = devm_clk_get_enabled(spifc->dev, NULL);

drivers/spi/spi-meson-spifc.c

316

if (IS_ERR(spifc->clk)) {

drivers/spi/spi-meson-spifc.c

318

ret = PTR_ERR(spifc->clk);

drivers/spi/spi-meson-spifc.c

322

rate = clk_get_rate(spifc->clk);

drivers/spi/spi-meson-spifc.c

368

clk_disable_unprepare(spifc->clk);

drivers/spi/spi-meson-spifc.c

380

ret = clk_prepare_enable(spifc->clk);

drivers/spi/spi-meson-spifc.c

389

clk_disable_unprepare(spifc->clk);

drivers/spi/spi-meson-spifc.c

401

clk_disable_unprepare(spifc->clk);

drivers/spi/spi-meson-spifc.c

411

return clk_prepare_enable(spifc->clk);

drivers/spi/spi-meson-spifc.c

78

struct clk *clk;

drivers/spi/spi-microchip-core-qspi.c

116

struct clk *clk;

drivers/spi/spi-microchip-core-qspi.c

355

clk_hz = clk_get_rate(qspi->clk);

drivers/spi/spi-microchip-core-qspi.c

702

qspi->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-microchip-core-qspi.c

703

if (IS_ERR(qspi->clk))

drivers/spi/spi-microchip-core-qspi.c

704

return dev_err_probe(&pdev->dev, PTR_ERR(qspi->clk),

drivers/spi/spi-microchip-core-qspi.c

728

ctlr->min_speed_hz = clk_get_rate(qspi->clk) / 30;

drivers/spi/spi-microchip-core-spi.c

234

pclk_hz = clk_get_rate(spi->clk);

drivers/spi/spi-microchip-core-spi.c

381

spi->clk = devm_clk_get_enabled(dev, NULL);

drivers/spi/spi-microchip-core-spi.c

382

if (IS_ERR(spi->clk))

drivers/spi/spi-microchip-core-spi.c

383

return dev_err_probe(dev, PTR_ERR(spi->clk), "could not get clk\n");

drivers/spi/spi-microchip-core-spi.c

72

struct clk *clk;

drivers/spi/spi-mpc512x-psc.c

465

struct clk *clk;

drivers/spi/spi-mpc512x-psc.c

500

clk = devm_clk_get_enabled(dev, "mclk");

drivers/spi/spi-mpc512x-psc.c

501

if (IS_ERR(clk))

drivers/spi/spi-mpc512x-psc.c

502

return PTR_ERR(clk);

drivers/spi/spi-mpc512x-psc.c

504

mps->mclk_rate = clk_get_rate(clk);

drivers/spi/spi-mpc512x-psc.c

506

clk = devm_clk_get_enabled(dev, "ipg");

drivers/spi/spi-mpc512x-psc.c

507

if (IS_ERR(clk))

drivers/spi/spi-mpc512x-psc.c

508

return PTR_ERR(clk);

drivers/spi/spi-mpfs.c

104

struct clk *clk;

drivers/spi/spi-mpfs.c

336

clk_hz = clk_get_rate(spi->clk);

drivers/spi/spi-mpfs.c

446

clk_hz = clk_get_rate(spi->clk);

drivers/spi/spi-mpfs.c

570

spi->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-mpfs.c

571

if (IS_ERR(spi->clk))

drivers/spi/spi-mpfs.c

572

return dev_err_probe(&pdev->dev, PTR_ERR(spi->clk),

drivers/spi/spi-mt65xx.c

164

struct clk *parent_clk, *sel_clk, *spi_clk, *spi_hclk;

drivers/spi/spi-mt7621.c

322

struct clk *clk;

drivers/spi/spi-mt7621.c

333

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-mt7621.c

334

if (IS_ERR(clk))

drivers/spi/spi-mt7621.c

335

return dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/spi/spi-mt7621.c

360

rs->sys_freq = clk_get_rate(clk);

drivers/spi/spi-mtk-nor.c

119

struct clk *spi_clk;

drivers/spi/spi-mtk-nor.c

120

struct clk *ctlr_clk;

drivers/spi/spi-mtk-nor.c

121

struct clk *axi_clk;

drivers/spi/spi-mtk-nor.c

122

struct clk *axi_s_clk;

drivers/spi/spi-mtk-nor.c

140

static inline int mtk_nor_cmd_exec(struct mtk_nor *sp, u32 cmd, ulong clk)

drivers/spi/spi-mtk-nor.c

142

ulong delay = CLK_TO_US(sp, clk);

drivers/spi/spi-mtk-nor.c

816

struct clk *spi_clk, *ctlr_clk, *axi_clk, *axi_s_clk;

drivers/spi/spi-mtk-snfi.c

304

struct clk *nfi_clk;

drivers/spi/spi-mtk-snfi.c

305

struct clk *pad_clk;

drivers/spi/spi-mtk-snfi.c

306

struct clk *nfi_hclk;

drivers/spi/spi-mxic.c

173

struct clk *ps_clk;

drivers/spi/spi-mxic.c

174

struct clk *send_clk;

drivers/spi/spi-mxic.c

175

struct clk *send_dly_clk;

drivers/spi/spi-mxs.c

450

clk_disable_unprepare(ssp->clk);

drivers/spi/spi-mxs.c

454

int ret2 = clk_prepare_enable(ssp->clk);

drivers/spi/spi-mxs.c

475

ret = clk_prepare_enable(ssp->clk);

drivers/spi/spi-mxs.c

536

struct clk *clk;

drivers/spi/spi-mxs.c

556

clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-mxs.c

557

if (IS_ERR(clk))

drivers/spi/spi-mxs.c

558

return PTR_ERR(clk);

drivers/spi/spi-mxs.c

583

ssp->clk = clk;

drivers/spi/spi-mxs.c

616

clk_set_rate(ssp->clk, clk_freq);

drivers/spi/spi-npcm-fiu.c

255

struct clk *clk;

drivers/spi/spi-npcm-fiu.c

555

ret = clk_set_rate(fiu->clk, chip->clkrate);

drivers/spi/spi-npcm-fiu.c

671

fiu->clkrate = clk_get_rate(fiu->clk);

drivers/spi/spi-npcm-fiu.c

734

fiu->clk = devm_clk_get_enabled(dev, NULL);

drivers/spi/spi-npcm-fiu.c

735

if (IS_ERR(fiu->clk))

drivers/spi/spi-npcm-fiu.c

736

return PTR_ERR(fiu->clk);

drivers/spi/spi-npcm-pspi.c

152

ckdiv = DIV_ROUND_CLOSEST(clk_get_rate(priv->clk), (2 * speed)) - 1;

drivers/spi/spi-npcm-pspi.c

30

struct clk *clk;

drivers/spi/spi-npcm-pspi.c

364

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-npcm-pspi.c

365

if (IS_ERR(priv->clk)) {

drivers/spi/spi-npcm-pspi.c

367

ret = PTR_ERR(priv->clk);

drivers/spi/spi-npcm-pspi.c

371

ret = clk_prepare_enable(priv->clk);

drivers/spi/spi-npcm-pspi.c

399

clk_hz = clk_get_rate(priv->clk);

drivers/spi/spi-npcm-pspi.c

425

clk_disable_unprepare(priv->clk);

drivers/spi/spi-npcm-pspi.c

438

clk_disable_unprepare(priv->clk);

drivers/spi/spi-nxp-fspi.c

1145

ret = clk_set_rate(f->clk, 20000000);

drivers/spi/spi-nxp-fspi.c

1338

f->clk = devm_clk_get(dev, "fspi");

drivers/spi/spi-nxp-fspi.c

1339

if (IS_ERR(f->clk))

drivers/spi/spi-nxp-fspi.c

1340

return PTR_ERR(f->clk);

drivers/spi/spi-nxp-fspi.c

397

struct clk *clk, *clk_en;

drivers/spi/spi-nxp-fspi.c

645

ret = clk_prepare_enable(f->clk);

drivers/spi/spi-nxp-fspi.c

659

clk_disable_unprepare(f->clk);

drivers/spi/spi-nxp-fspi.c

838

ret = clk_set_rate(f->clk, rate);

drivers/spi/spi-nxp-xspi.c

1250

xspi->clk = devm_clk_get(dev, "per");

drivers/spi/spi-nxp-xspi.c

1251

if (IS_ERR(xspi->clk))

drivers/spi/spi-nxp-xspi.c

1252

return PTR_ERR(xspi->clk);

drivers/spi/spi-nxp-xspi.c

1306

clk_disable_unprepare(xspi->clk);

drivers/spi/spi-nxp-xspi.c

1317

ret = clk_prepare_enable(xspi->clk);

drivers/spi/spi-nxp-xspi.c

332

struct clk *clk;

drivers/spi/spi-nxp-xspi.c

735

clk_disable_unprepare(xspi->clk);

drivers/spi/spi-nxp-xspi.c

737

ret = clk_set_rate(xspi->clk, root_clk_rate);

drivers/spi/spi-nxp-xspi.c

741

ret = clk_prepare_enable(xspi->clk);

drivers/spi/spi-offload-trigger-adi-util-sigma-delta.c

36

struct clk *clk;

drivers/spi/spi-offload-trigger-adi-util-sigma-delta.c

38

clk = devm_clk_get_enabled(dev, NULL);

drivers/spi/spi-offload-trigger-adi-util-sigma-delta.c

39

if (IS_ERR(clk))

drivers/spi/spi-offload-trigger-adi-util-sigma-delta.c

40

return dev_err_probe(dev, PTR_ERR(clk), "Failed to get clock\n");

drivers/spi/spi-omap-uwire.c

90

struct clk *ck;

drivers/spi/spi-omap2-mcspi.c

130

struct clk *ref_clk;

drivers/spi/spi-orion.c

147

tclk_hz = clk_get_rate(orion_spi->clk);

drivers/spi/spi-orion.c

279

if (clk_get_rate(orion_spi->clk) == 250000000 &&

drivers/spi/spi-orion.c

691

spi->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-orion.c

692

if (IS_ERR(spi->clk)) {

drivers/spi/spi-orion.c

693

status = PTR_ERR(spi->clk);

drivers/spi/spi-orion.c

706

tclk_hz = clk_get_rate(spi->clk);

drivers/spi/spi-orion.c

820

clk_disable_unprepare(spi->clk);

drivers/spi/spi-orion.c

831

return clk_prepare_enable(spi->clk);

drivers/spi/spi-orion.c

95

struct clk *clk;

drivers/spi/spi-orion.c

96

struct clk *axi_clk;

drivers/spi/spi-pic32-sqi.c

140

struct clk *sys_clk;

drivers/spi/spi-pic32-sqi.c

141

struct clk *base_clk; /* drives spi clock */

drivers/spi/spi-pic32.c

102

struct clk *clk;

drivers/spi/spi-pic32.c

141

div = DIV_ROUND_CLOSEST(clk_get_rate(pic32s->clk), 2 * spi_ck) - 1;

drivers/spi/spi-pic32.c

733

pic32s->clk = devm_clk_get_enabled(&pdev->dev, "mck0");

drivers/spi/spi-pic32.c

734

if (IS_ERR(pic32s->clk)) {

drivers/spi/spi-pic32.c

736

ret = PTR_ERR(pic32s->clk);

drivers/spi/spi-pic32.c

769

host->max_speed_hz = clk_get_rate(pic32s->clk);

drivers/spi/spi-pl022.c

1494

rate = clk_get_rate(pl022->clk);

drivers/spi/spi-pl022.c

1922

pl022->clk = devm_clk_get_enabled(&adev->dev, NULL);

drivers/spi/spi-pl022.c

1923

if (IS_ERR(pl022->clk)) {

drivers/spi/spi-pl022.c

1924

status = PTR_ERR(pl022->clk);

drivers/spi/spi-pl022.c

2058

clk_disable_unprepare(pl022->clk);

drivers/spi/spi-pl022.c

2069

clk_prepare_enable(pl022->clk);

drivers/spi/spi-pl022.c

366

struct clk *clk;

drivers/spi/spi-ppc4xx.c

345

const unsigned int *clk;

drivers/spi/spi-ppc4xx.c

386

clk = of_get_property(opbnp, "clock-frequency", NULL);

drivers/spi/spi-ppc4xx.c

387

if (clk == NULL) {

drivers/spi/spi-ppc4xx.c

393

hw->opb_freq = *clk;

drivers/spi/spi-pxa2xx-pci.c

62

static void pxa2xx_spi_pci_clk_unregister(void *clk)

drivers/spi/spi-pxa2xx-pci.c

64

clk_unregister(clk);

drivers/spi/spi-pxa2xx-pci.c

73

ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate);

drivers/spi/spi-pxa2xx-pci.c

74

if (IS_ERR(ssp->clk))

drivers/spi/spi-pxa2xx-pci.c

75

return PTR_ERR(ssp->clk);

drivers/spi/spi-pxa2xx-pci.c

77

return devm_add_action_or_reset(&dev->dev, pxa2xx_spi_pci_clk_unregister, ssp->clk);

drivers/spi/spi-pxa2xx-platform.c

35

ssp->clk = devm_clk_get(dev, NULL);

drivers/spi/spi-pxa2xx-platform.c

36

if (IS_ERR(ssp->clk))

drivers/spi/spi-pxa2xx-platform.c

37

return PTR_ERR(ssp->clk);

drivers/spi/spi-pxa2xx.c

1356

status = clk_prepare_enable(ssp->clk);

drivers/spi/spi-pxa2xx.c

1360

controller->max_speed_hz = clk_get_rate(ssp->clk);

drivers/spi/spi-pxa2xx.c

1453

clk_disable_unprepare(ssp->clk);

drivers/spi/spi-pxa2xx.c

1472

clk_disable_unprepare(ssp->clk);

drivers/spi/spi-pxa2xx.c

1496

clk_disable_unprepare(ssp->clk);

drivers/spi/spi-pxa2xx.c

1509

status = clk_prepare_enable(ssp->clk);

drivers/spi/spi-pxa2xx.c

1522

clk_disable_unprepare(drv_data->ssp->clk);

drivers/spi/spi-pxa2xx.c

1530

return clk_prepare_enable(drv_data->ssp->clk);

drivers/spi/spi-qpic-snand.c

104

struct clk *iomacro_clk;

drivers/spi/spi-qup.c

1026

struct clk *iclk, *cclk;

drivers/spi/spi-qup.c

132

struct clk *cclk; /* core clock */

drivers/spi/spi-qup.c

133

struct clk *iclk; /* interface clock */

drivers/spi/spi-rb4xx.c

146

struct clk *ahb_clk;

drivers/spi/spi-rb4xx.c

173

rbspi->clk = ahb_clk;

drivers/spi/spi-rb4xx.c

32

struct clk *clk;

drivers/spi/spi-rockchip-sfc.c

177

struct clk *hclk;

drivers/spi/spi-rockchip-sfc.c

178

struct clk *clk;

drivers/spi/spi-rockchip-sfc.c

224

return clk_set_rate(sfc->clk, speed * 2);

drivers/spi/spi-rockchip-sfc.c

226

return clk_set_rate(sfc->clk, speed);

drivers/spi/spi-rockchip-sfc.c

232

return clk_get_rate(sfc->clk) / 2;

drivers/spi/spi-rockchip-sfc.c

234

return clk_get_rate(sfc->clk);

drivers/spi/spi-rockchip-sfc.c

638

sfc->clk = devm_clk_get(&pdev->dev, "clk_sfc");

drivers/spi/spi-rockchip-sfc.c

639

if (IS_ERR(sfc->clk))

drivers/spi/spi-rockchip-sfc.c

640

return dev_err_probe(&pdev->dev, PTR_ERR(sfc->clk),

drivers/spi/spi-rockchip-sfc.c

666

ret = clk_prepare_enable(sfc->clk);

drivers/spi/spi-rockchip-sfc.c

733

clk_disable_unprepare(sfc->clk);

drivers/spi/spi-rockchip-sfc.c

750

clk_disable_unprepare(sfc->clk);

drivers/spi/spi-rockchip-sfc.c

759

clk_disable_unprepare(sfc->clk);

drivers/spi/spi-rockchip-sfc.c

774

ret = clk_prepare_enable(sfc->clk);

drivers/spi/spi-rockchip.c

172

struct clk *spiclk;

drivers/spi/spi-rockchip.c

173

struct clk *apb_pclk;

drivers/spi/spi-rspi.c

1316

rspi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-rspi.c

1317

if (IS_ERR(rspi->clk)) {

drivers/spi/spi-rspi.c

1319

ret = PTR_ERR(rspi->clk);

drivers/spi/spi-rspi.c

1337

clksrc = clk_get_rate(rspi->clk);

drivers/spi/spi-rspi.c

188

struct clk *clk;

drivers/spi/spi-rspi.c

258

clksrc = clk_get_rate(rspi->clk);

drivers/spi/spi-rspi.c

347

clksrc = clk_get_rate(rspi->clk);

drivers/spi/spi-rzv2h-rspi.c

104

struct clk *tclk;

drivers/spi/spi-rzv2h-rspi.c

105

struct clk *pclk;

drivers/spi/spi-rzv2h-rspi.c

414

static void rzv2h_rspi_find_rate_variable(struct clk *clk, u32 hz,

drivers/spi/spi-rzv2h-rspi.c

430

clk_min_rate = clk_round_rate(clk, 0);

drivers/spi/spi-rzv2h-rspi.c

434

clk_max_rate = clk_round_rate(clk, ULONG_MAX);

drivers/spi/spi-rzv2h-rspi.c

488

clk_rate = clk_round_rate(clk, clk_rate);

drivers/spi/spi-rzv2h-rspi.c

499

.clk = clk,

drivers/spi/spi-rzv2h-rspi.c

513

static void rzv2h_rspi_find_rate_fixed(struct clk *clk, u32 hz,

drivers/spi/spi-rzv2h-rspi.c

532

clk_rate = clk_get_rate(clk);

drivers/spi/spi-rzv2h-rspi.c

550

.clk = clk,

drivers/spi/spi-rzv2h-rspi.c

580

ret = clk_set_rate(best_clock.clk, best_clock.clk_rate);

drivers/spi/spi-rzv2h-rspi.c

584

rspi->use_pclk = best_clock.clk == rspi->pclk;

drivers/spi/spi-rzv2h-rspi.c

721

rspi->tclk = clks[i].clk;

drivers/spi/spi-rzv2h-rspi.c

724

rspi->pclk = clks[i].clk;

drivers/spi/spi-rzv2h-rspi.c

81

struct clk *clk;

drivers/spi/spi-rzv2h-rspi.c

90

void (*find_tclk_rate)(struct clk *clk, u32 hz, u8 spr_min, u8 spr_max,

drivers/spi/spi-rzv2h-rspi.c

92

void (*find_pclk_rate)(struct clk *clk, u32 hz, u8 spr_low, u8 spr_high,

drivers/spi/spi-rzv2m-csi.c

95

struct clk *csiclk;

drivers/spi/spi-rzv2m-csi.c

96

struct clk *pclk;

drivers/spi/spi-s3c64xx.c

1329

sdd->clk = devm_clk_get_enabled(&pdev->dev, "spi");

drivers/spi/spi-s3c64xx.c

1330

if (IS_ERR(sdd->clk))

drivers/spi/spi-s3c64xx.c

1331

return dev_err_probe(&pdev->dev, PTR_ERR(sdd->clk),

drivers/spi/spi-s3c64xx.c

1458

clk_disable_unprepare(sdd->clk);

drivers/spi/spi-s3c64xx.c

1481

ret = clk_prepare_enable(sdd->clk);

drivers/spi/spi-s3c64xx.c

208

struct clk *clk;

drivers/spi/spi-s3c64xx.c

209

struct clk *src_clk;

drivers/spi/spi-s3c64xx.c

210

struct clk *ioclk;

drivers/spi/spi-sg2044-nor.c

446

spifmc->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/spi/spi-sg2044-nor.c

447

if (IS_ERR(spifmc->clk))

drivers/spi/spi-sg2044-nor.c

448

return dev_err_probe(dev, PTR_ERR(spifmc->clk), "Cannot get and enable AHB clock\n");

drivers/spi/spi-sg2044-nor.c

98

struct clk *clk;

drivers/spi/spi-sh-hspi.c

111

rate = clk_get_rate(hspi->clk);

drivers/spi/spi-sh-hspi.c

217

struct clk *clk;

drivers/spi/spi-sh-hspi.c

231

clk = clk_get(&pdev->dev, NULL);

drivers/spi/spi-sh-hspi.c

232

if (IS_ERR(clk)) {

drivers/spi/spi-sh-hspi.c

244

hspi->clk = clk;

drivers/spi/spi-sh-hspi.c

271

clk_put(clk);

drivers/spi/spi-sh-hspi.c

284

clk_put(hspi->clk);

drivers/spi/spi-sh-hspi.c

40

struct clk *clk;

drivers/spi/spi-sh-msiof.c

1234

p->clk = devm_clk_get(dev, NULL);

drivers/spi/spi-sh-msiof.c

1235

if (IS_ERR(p->clk)) {

drivers/spi/spi-sh-msiof.c

1237

ret = PTR_ERR(p->clk);

drivers/spi/spi-sh-msiof.c

1273

clksrc = clk_get_rate(p->clk);

drivers/spi/spi-sh-msiof.c

133

unsigned long parent_rate = clk_get_rate(p->clk);

drivers/spi/spi-sh-msiof.c

47

struct clk *clk;

drivers/spi/spi-sifive.c

174

cr = DIV_ROUND_UP(clk_get_rate(spi->clk) >> 1, t->speed_hz) - 1;

drivers/spi/spi-sifive.c

315

spi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-sifive.c

316

if (IS_ERR(spi->clk)) {

drivers/spi/spi-sifive.c

318

ret = PTR_ERR(spi->clk);

drivers/spi/spi-sifive.c

346

ret = clk_prepare_enable(spi->clk);

drivers/spi/spi-sifive.c

410

clk_disable_unprepare(spi->clk);

drivers/spi/spi-sifive.c

424

clk_disable_unprepare(spi->clk);

drivers/spi/spi-sifive.c

440

clk_disable_unprepare(spi->clk);

drivers/spi/spi-sifive.c

451

ret = clk_prepare_enable(spi->clk);

drivers/spi/spi-sifive.c

456

clk_disable_unprepare(spi->clk);

drivers/spi/spi-sifive.c

93

struct clk *clk; /* bus clock */

drivers/spi/spi-slave-mt27xx.c

69

struct clk *spi_clk;

drivers/spi/spi-sn-f-ospi.c

113

struct clk *clk;

drivers/spi/spi-sn-f-ospi.c

193

long rate_hz = clk_get_rate(ospi->clk);

drivers/spi/spi-sn-f-ospi.c

641

ospi->clk = devm_clk_get_enabled(dev, NULL);

drivers/spi/spi-sn-f-ospi.c

642

if (IS_ERR(ospi->clk))

drivers/spi/spi-sn-f-ospi.c

643

return PTR_ERR(ospi->clk);

drivers/spi/spi-sprd.c

1016

clk_disable_unprepare(ss->clk);

drivers/spi/spi-sprd.c

1030

clk_disable_unprepare(ss->clk);

drivers/spi/spi-sprd.c

1041

ret = clk_prepare_enable(ss->clk);

drivers/spi/spi-sprd.c

1050

clk_disable_unprepare(ss->clk);

drivers/spi/spi-sprd.c

154

struct clk *clk;

drivers/spi/spi-sprd.c

861

struct clk *clk_spi, *clk_parent;

drivers/spi/spi-sprd.c

875

ss->clk = devm_clk_get(&pdev->dev, "enable");

drivers/spi/spi-sprd.c

876

if (IS_ERR(ss->clk)) {

drivers/spi/spi-sprd.c

878

return PTR_ERR(ss->clk);

drivers/spi/spi-sprd.c

962

ret = clk_prepare_enable(ss->clk);

drivers/spi/spi-sprd.c

992

clk_disable_unprepare(ss->clk);

drivers/spi/spi-st-ssc4.c

191

spi_st_clk = clk_get_rate(spi_st->clk);

drivers/spi/spi-st-ssc4.c

296

spi_st->clk = devm_clk_get(&pdev->dev, "ssc");

drivers/spi/spi-st-ssc4.c

297

if (IS_ERR(spi_st->clk)) {

drivers/spi/spi-st-ssc4.c

299

ret = PTR_ERR(spi_st->clk);

drivers/spi/spi-st-ssc4.c

303

ret = clk_prepare_enable(spi_st->clk);

drivers/spi/spi-st-ssc4.c

363

clk_disable_unprepare(spi_st->clk);

drivers/spi/spi-st-ssc4.c

376

clk_disable_unprepare(spi_st->clk);

drivers/spi/spi-st-ssc4.c

389

clk_disable_unprepare(spi_st->clk);

drivers/spi/spi-st-ssc4.c

400

ret = clk_prepare_enable(spi_st->clk);

drivers/spi/spi-st-ssc4.c

56

struct clk *clk;

drivers/spi/spi-stm32-ospi.c

1058

clk_disable_unprepare(ospi->clk);

drivers/spi/spi-stm32-ospi.c

1067

return clk_prepare_enable(ospi->clk);

drivers/spi/spi-stm32-ospi.c

114

struct clk *clk;

drivers/spi/spi-stm32-ospi.c

806

ospi->clk = devm_clk_get(dev, NULL);

drivers/spi/spi-stm32-ospi.c

807

if (IS_ERR(ospi->clk))

drivers/spi/spi-stm32-ospi.c

808

return dev_err_probe(dev, PTR_ERR(ospi->clk),

drivers/spi/spi-stm32-ospi.c

811

ospi->clk_rate = clk_get_rate(ospi->clk);

drivers/spi/spi-stm32-qspi.c

106

struct clk *clk;

drivers/spi/spi-stm32-qspi.c

822

qspi->clk = devm_clk_get(dev, NULL);

drivers/spi/spi-stm32-qspi.c

823

if (IS_ERR(qspi->clk))

drivers/spi/spi-stm32-qspi.c

824

return PTR_ERR(qspi->clk);

drivers/spi/spi-stm32-qspi.c

826

qspi->clk_rate = clk_get_rate(qspi->clk);

drivers/spi/spi-stm32-qspi.c

830

ret = clk_prepare_enable(qspi->clk);

drivers/spi/spi-stm32-qspi.c

890

clk_disable_unprepare(qspi->clk);

drivers/spi/spi-stm32-qspi.c

909

clk_disable_unprepare(qspi->clk);

drivers/spi/spi-stm32-qspi.c

916

clk_disable_unprepare(qspi->clk);

drivers/spi/spi-stm32-qspi.c

925

return clk_prepare_enable(qspi->clk);

drivers/spi/spi-stm32.c

2412

spi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-stm32.c

2413

if (IS_ERR(spi->clk)) {

drivers/spi/spi-stm32.c

2414

ret = PTR_ERR(spi->clk);

drivers/spi/spi-stm32.c

2419

ret = clk_prepare_enable(spi->clk);

drivers/spi/spi-stm32.c

2424

spi->clk_rate = clk_get_rate(spi->clk);

drivers/spi/spi-stm32.c

2583

clk_disable_unprepare(spi->clk);

drivers/spi/spi-stm32.c

2613

clk_disable_unprepare(spi->clk);

drivers/spi/spi-stm32.c

2624

clk_disable_unprepare(spi->clk);

drivers/spi/spi-stm32.c

2639

return clk_prepare_enable(spi->clk);

drivers/spi/spi-stm32.c

2666

clk_disable_unprepare(spi->clk);

drivers/spi/spi-stm32.c

350

struct clk *clk;

drivers/spi/spi-sun4i.c

80

struct clk *hclk;

drivers/spi/spi-sun4i.c

81

struct clk *mclk;

drivers/spi/spi-sun6i.c

104

struct clk *hclk;

drivers/spi/spi-sun6i.c

105

struct clk *mclk;

drivers/spi/spi-sunplus-sp7021.c

86

struct clk *spi_clk;

drivers/spi/spi-synquacer.c

131

struct clk *clk;

drivers/spi/spi-synquacer.c

633

sspi->clk = devm_clk_get(sspi->dev, "iHCLK");

drivers/spi/spi-synquacer.c

637

sspi->clk = devm_clk_get(sspi->dev, "iPCLK");

drivers/spi/spi-synquacer.c

644

if (IS_ERR(sspi->clk)) {

drivers/spi/spi-synquacer.c

645

ret = dev_err_probe(&pdev->dev, PTR_ERR(sspi->clk),

drivers/spi/spi-synquacer.c

650

ret = clk_prepare_enable(sspi->clk);

drivers/spi/spi-synquacer.c

657

host->max_speed_hz = clk_get_rate(sspi->clk);

drivers/spi/spi-synquacer.c

728

clk_disable_unprepare(sspi->clk);

drivers/spi/spi-synquacer.c

742

clk_disable_unprepare(sspi->clk);

drivers/spi/spi-synquacer.c

756

clk_disable_unprepare(sspi->clk);

drivers/spi/spi-synquacer.c

771

ret = clk_prepare_enable(sspi->clk);

drivers/spi/spi-synquacer.c

780

clk_disable_unprepare(sspi->clk);

drivers/spi/spi-synquacer.c

788

clk_disable_unprepare(sspi->clk);

drivers/spi/spi-tegra114.c

1357

tspi->clk = devm_clk_get(&pdev->dev, "spi");

drivers/spi/spi-tegra114.c

1358

if (IS_ERR(tspi->clk)) {

drivers/spi/spi-tegra114.c

1360

ret = PTR_ERR(tspi->clk);

drivers/spi/spi-tegra114.c

1493

clk_disable_unprepare(tspi->clk);

drivers/spi/spi-tegra114.c

1503

ret = clk_prepare_enable(tspi->clk);

drivers/spi/spi-tegra114.c

170

struct clk *clk;

drivers/spi/spi-tegra114.c

784

clk_set_rate(tspi->clk, speed);

drivers/spi/spi-tegra20-sflash.c

108

struct clk *clk;

drivers/spi/spi-tegra20-sflash.c

260

clk_set_rate(tsd->clk, speed);

drivers/spi/spi-tegra20-sflash.c

471

tsd->clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-tegra20-sflash.c

472

if (IS_ERR(tsd->clk)) {

drivers/spi/spi-tegra20-sflash.c

474

ret = PTR_ERR(tsd->clk);

drivers/spi/spi-tegra20-sflash.c

572

clk_disable_unprepare(tsd->clk);

drivers/spi/spi-tegra20-sflash.c

582

ret = clk_prepare_enable(tsd->clk);

drivers/spi/spi-tegra20-slink.c

1044

tspi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-tegra20-slink.c

1045

if (IS_ERR(tspi->clk)) {

drivers/spi/spi-tegra20-slink.c

1046

ret = PTR_ERR(tspi->clk);

drivers/spi/spi-tegra20-slink.c

1188

clk_disable_unprepare(tspi->clk);

drivers/spi/spi-tegra20-slink.c

1198

ret = clk_prepare_enable(tspi->clk);

drivers/spi/spi-tegra20-slink.c

159

struct clk *clk;

drivers/spi/spi-tegra210-quad.c

1745

tqspi->clk = devm_clk_get(&pdev->dev, "qspi");

drivers/spi/spi-tegra210-quad.c

1746

if (IS_ERR(tqspi->clk)) {

drivers/spi/spi-tegra210-quad.c

1747

ret = PTR_ERR(tqspi->clk);

drivers/spi/spi-tegra210-quad.c

1858

clk_disable_unprepare(tqspi->clk);

drivers/spi/spi-tegra210-quad.c

1872

ret = clk_prepare_enable(tqspi->clk);

drivers/spi/spi-tegra210-quad.c

190

struct clk *clk;

drivers/spi/spi-tegra210-quad.c

846

clk_set_rate(tqspi->clk, speed);

drivers/spi/spi-ti-qspi.c

49

struct clk *fclk;

drivers/spi/spi-uniphier.c

208

ckdiv = DIV_ROUND_UP(clk_get_rate(priv->clk), speed);

drivers/spi/spi-uniphier.c

28

struct clk *clk;

drivers/spi/spi-uniphier.c

669

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-uniphier.c

670

if (IS_ERR(priv->clk)) {

drivers/spi/spi-uniphier.c

672

ret = PTR_ERR(priv->clk);

drivers/spi/spi-uniphier.c

676

ret = clk_prepare_enable(priv->clk);

drivers/spi/spi-uniphier.c

695

clk_rate = clk_get_rate(priv->clk);

drivers/spi/spi-uniphier.c

770

clk_disable_unprepare(priv->clk);

drivers/spi/spi-uniphier.c

787

clk_disable_unprepare(priv->clk);

drivers/spi/spi-wpcm-fiu.c

456

fiu->clk = devm_clk_get_enabled(dev, NULL);

drivers/spi/spi-wpcm-fiu.c

457

if (IS_ERR(fiu->clk))

drivers/spi/spi-wpcm-fiu.c

458

return PTR_ERR(fiu->clk);

drivers/spi/spi-wpcm-fiu.c

479

ctrl->min_speed_hz = clk_get_rate(fiu->clk);

drivers/spi/spi-wpcm-fiu.c

480

ctrl->max_speed_hz = clk_get_rate(fiu->clk);

drivers/spi/spi-wpcm-fiu.c

59

struct clk *clk;

drivers/spi/spi-xlp.c

372

struct clk *clk;

drivers/spi/spi-xlp.c

393

clk = devm_clk_get(&pdev->dev, NULL);

drivers/spi/spi-xlp.c

394

if (IS_ERR(clk)) {

drivers/spi/spi-xlp.c

396

return PTR_ERR(clk);

drivers/spi/spi-xlp.c

399

xspi->spi_clk = clk_get_rate(clk);

drivers/spi/spi-zynq-qspi.c

136

struct clk *refclk;

drivers/spi/spi-zynq-qspi.c

137

struct clk *pclk;

drivers/spi/spi-zynqmp-gqspi.c

193

struct clk *refclk;

drivers/spi/spi-zynqmp-gqspi.c

194

struct clk *pclk;

drivers/spmi/spmi-mtk-pmif.c

728

pbus->clks[i].clk = of_clk_get_by_name(node, pbus->clks[i].id);

drivers/spmi/spmi-mtk-pmif.c

729

if (IS_ERR(pbus->clks[i].clk))

drivers/spmi/spmi-mtk-pmif.c

730

return dev_err_probe(&pdev->dev, PTR_ERR(pbus->clks[i].clk),

drivers/staging/greybus/arche-apb-ctrl.c

41

struct clk *clk;

drivers/staging/greybus/arche-platform.c

56

struct clk *svc_ref_clk;

drivers/staging/iio/frequency/ad9832.c

92

struct clk *mclk;

drivers/staging/iio/frequency/ad9834.c

72

struct clk *mclk;

drivers/staging/iio/impedance-analyzer/ad5933.c

87

struct clk *mclk;

drivers/staging/media/atomisp/pci/atomisp_csi2_bridge.c

243

struct clk *clk;

drivers/staging/media/atomisp/pci/atomisp_csi2_bridge.c

252

clk = clk_get(NULL, name);

drivers/staging/media/atomisp/pci/atomisp_csi2_bridge.c

253

if (IS_ERR(clk)) {

drivers/staging/media/atomisp/pci/atomisp_csi2_bridge.c

254

ret = PTR_ERR(clk);

drivers/staging/media/atomisp/pci/atomisp_csi2_bridge.c

264

ret = clk_prepare_enable(clk);

drivers/staging/media/atomisp/pci/atomisp_csi2_bridge.c

266

clk_disable_unprepare(clk);

drivers/staging/media/atomisp/pci/atomisp_csi2_bridge.c

268

ret = clk_set_rate(clk, PMC_CLK_RATE_19_2MHZ);

drivers/staging/media/atomisp/pci/atomisp_csi2_bridge.c

273

clk_put(clk);

drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c

72

struct clk *pmc_clk;

drivers/staging/media/deprecated/atmel/atmel-isc-clk.c

167

__clk_get_name((req->best_parent_hw)->clk),

drivers/staging/media/deprecated/atmel/atmel-isc-clk.c

269

isc_clk->clk = clk_register(isc->dev, &isc_clk->hw);

drivers/staging/media/deprecated/atmel/atmel-isc-clk.c

270

if (IS_ERR(isc_clk->clk)) {

drivers/staging/media/deprecated/atmel/atmel-isc-clk.c

272

return PTR_ERR(isc_clk->clk);

drivers/staging/media/deprecated/atmel/atmel-isc-clk.c

274

of_clk_add_provider(np, of_clk_src_simple_get, isc_clk->clk);

drivers/staging/media/deprecated/atmel/atmel-isc-clk.c

286

isc->isc_clks[i].clk = ERR_PTR(-EINVAL);

drivers/staging/media/deprecated/atmel/atmel-isc-clk.c

307

if (!IS_ERR(isc_clk->clk))

drivers/staging/media/deprecated/atmel/atmel-isc-clk.c

308

clk_unregister(isc_clk->clk);

drivers/staging/media/deprecated/atmel/atmel-isc.h

265

struct clk *hclock;

drivers/staging/media/deprecated/atmel/atmel-isc.h

266

struct clk *ispck;

drivers/staging/media/deprecated/atmel/atmel-isc.h

29

struct clk *clk;

drivers/staging/media/deprecated/atmel/atmel-sama5d2-isc.c

536

isc->ispck = isc->isc_clks[ISC_ISPCK].clk;

drivers/staging/media/imx/imx6-mipi-csi2.c

42

struct clk *dphy_clk;

drivers/staging/media/imx/imx6-mipi-csi2.c

43

struct clk *pllref_clk;

drivers/staging/media/imx/imx6-mipi-csi2.c

44

struct clk *pix_clk; /* what is this? */

drivers/staging/media/meson/vdec/vdec.h

81

struct clk *dos_parser_clk;

drivers/staging/media/meson/vdec/vdec.h

82

struct clk *dos_clk;

drivers/staging/media/meson/vdec/vdec.h

83

struct clk *vdec_1_clk;

drivers/staging/media/meson/vdec/vdec.h

84

struct clk *vdec_hevc_clk;

drivers/staging/media/meson/vdec/vdec.h

85

struct clk *vdec_hevcf_clk;

drivers/staging/media/sunxi/cedrus/cedrus.h

194

struct clk *mod_clk;

drivers/staging/media/sunxi/cedrus/cedrus.h

195

struct clk *ahb_clk;

drivers/staging/media/sunxi/cedrus/cedrus.h

196

struct clk *ram_clk;

drivers/staging/media/sunxi/sun6i-isp/sun6i_isp.h

61

struct clk *clock_mod;

drivers/staging/media/sunxi/sun6i-isp/sun6i_isp.h

62

struct clk *clock_ram;

drivers/staging/media/tegra-video/csi.c

272

cil_clk_mhz = clk_get_rate(csi->clks[clk_idx].clk) / MHZ;

drivers/staging/media/tegra-video/vi.c

1430

ret = clk_set_rate(vi->clk, vi->soc->vi_max_clk_hz);

drivers/staging/media/tegra-video/vi.c

1436

ret = clk_prepare_enable(vi->clk);

drivers/staging/media/tegra-video/vi.c

1453

clk_disable_unprepare(vi->clk);

drivers/staging/media/tegra-video/vi.c

1894

vi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/staging/media/tegra-video/vi.c

1895

if (IS_ERR(vi->clk)) {

drivers/staging/media/tegra-video/vi.c

1896

ret = PTR_ERR(vi->clk);

drivers/staging/media/tegra-video/vi.h

106

struct clk *clk;

drivers/staging/most/dim2/dim2.c

1003

clk_disable_unprepare(dev->clk);

drivers/staging/most/dim2/dim2.c

1015

dev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/staging/most/dim2/dim2.c

1016

if (IS_ERR(dev->clk)) {

drivers/staging/most/dim2/dim2.c

1018

return PTR_ERR(dev->clk);

drivers/staging/most/dim2/dim2.c

1021

ret = clk_prepare_enable(dev->clk);

drivers/staging/most/dim2/dim2.c

1043

clk_disable_unprepare(dev->clk);

drivers/staging/most/dim2/dim2.c

91

struct clk *clk;

drivers/staging/most/dim2/dim2.c

92

struct clk *clk_pll;

drivers/staging/most/dim2/dim2.c

927

dev->clk = devm_clk_get(&pdev->dev, "mlb");

drivers/staging/most/dim2/dim2.c

928

if (IS_ERR_OR_NULL(dev->clk)) {

drivers/staging/most/dim2/dim2.c

933

ret = clk_prepare_enable(dev->clk);

drivers/staging/most/dim2/dim2.c

944

clk_disable_unprepare(dev->clk);

drivers/staging/most/dim2/dim2.c

962

clk_disable_unprepare(dev->clk);

drivers/staging/most/dim2/dim2.c

970

dev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/staging/most/dim2/dim2.c

971

if (IS_ERR(dev->clk)) {

drivers/staging/most/dim2/dim2.c

973

return PTR_ERR(dev->clk);

drivers/staging/most/dim2/dim2.c

976

ret = clk_prepare_enable(dev->clk);

drivers/staging/nvec/nvec.c

782

struct clk *i2c_clk;

drivers/staging/nvec/nvec.h

139

struct clk *i2c_clk;

drivers/thermal/amlogic_thermal.c

100

struct clk *clk;

drivers/thermal/amlogic_thermal.c

160

ret = clk_prepare_enable(data->clk);

drivers/thermal/amlogic_thermal.c

174

clk_disable_unprepare(data->clk);

drivers/thermal/amlogic_thermal.c

270

pdata->clk = devm_clk_get(dev, NULL);

drivers/thermal/amlogic_thermal.c

271

if (IS_ERR(pdata->clk))

drivers/thermal/amlogic_thermal.c

272

return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get clock\n");

drivers/thermal/broadcom/bcm2835_thermal.c

184

data->clk = devm_clk_get_enabled(dev, NULL);

drivers/thermal/broadcom/bcm2835_thermal.c

185

if (IS_ERR(data->clk))

drivers/thermal/broadcom/bcm2835_thermal.c

186

return dev_err_probe(dev, PTR_ERR(data->clk), "Could not get clk\n");

drivers/thermal/broadcom/bcm2835_thermal.c

188

rate = clk_get_rate(data->clk);

drivers/thermal/broadcom/bcm2835_thermal.c

192

data->clk, rate);

drivers/thermal/broadcom/bcm2835_thermal.c

70

struct clk *clk;

drivers/thermal/hisi_thermal.c

313

clk_disable_unprepare(data->clk);

drivers/thermal/hisi_thermal.c

333

ret = clk_prepare_enable(data->clk);

drivers/thermal/hisi_thermal.c

392

data->clk = devm_clk_get(dev, "thermal_clk");

drivers/thermal/hisi_thermal.c

393

if (IS_ERR(data->clk))

drivers/thermal/hisi_thermal.c

394

return dev_err_probe(dev, PTR_ERR(data->clk), "failed to get thermal clk\n");

drivers/thermal/hisi_thermal.c

79

struct clk *clk;

drivers/thermal/imx8mm_thermal.c

314

tmu->clk = devm_clk_get(&pdev->dev, NULL);

drivers/thermal/imx8mm_thermal.c

315

if (IS_ERR(tmu->clk))

drivers/thermal/imx8mm_thermal.c

316

return dev_err_probe(&pdev->dev, PTR_ERR(tmu->clk),

drivers/thermal/imx8mm_thermal.c

319

ret = clk_prepare_enable(tmu->clk);

drivers/thermal/imx8mm_thermal.c

362

clk_disable_unprepare(tmu->clk);

drivers/thermal/imx8mm_thermal.c

373

clk_disable_unprepare(tmu->clk);

drivers/thermal/imx8mm_thermal.c

92

struct clk *clk;

drivers/thermal/imx91_thermal.c

250

tmu->clk = devm_clk_get_enabled(dev, NULL);

drivers/thermal/imx91_thermal.c

251

if (IS_ERR(tmu->clk))

drivers/thermal/imx91_thermal.c

252

return dev_err_probe(dev, PTR_ERR(tmu->clk), "failed to get tmu clock\n");

drivers/thermal/imx91_thermal.c

269

rate = clk_get_rate(tmu->clk);

drivers/thermal/imx91_thermal.c

344

clk_disable_unprepare(tmu->clk);

drivers/thermal/imx91_thermal.c

354

ret = clk_prepare_enable(tmu->clk);

drivers/thermal/imx91_thermal.c

76

struct clk *clk;

drivers/thermal/imx_thermal.c

214

struct clk *thermal_clk;

drivers/thermal/mediatek/auxadc_thermal.c

334

struct clk *clk_peri_therm;

drivers/thermal/mediatek/auxadc_thermal.c

335

struct clk *clk_auxadc;

drivers/thermal/mediatek/lvts_thermal.c

1461

lvts_td->clk = devm_clk_get_enabled(dev, NULL);

drivers/thermal/mediatek/lvts_thermal.c

1462

if (IS_ERR(lvts_td->clk))

drivers/thermal/mediatek/lvts_thermal.c

1463

return dev_err_probe(dev, PTR_ERR(lvts_td->clk), "Failed to retrieve clock\n");

drivers/thermal/mediatek/lvts_thermal.c

1570

clk_disable_unprepare(lvts_td->clk);

drivers/thermal/mediatek/lvts_thermal.c

1582

ret = clk_prepare_enable(lvts_td->clk);

drivers/thermal/mediatek/lvts_thermal.c

189

struct clk *clk;

drivers/thermal/qoriq_thermal.c

307

data->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/thermal/qoriq_thermal.c

308

if (IS_ERR(data->clk))

drivers/thermal/qoriq_thermal.c

309

return PTR_ERR(data->clk);

drivers/thermal/qoriq_thermal.c

352

clk_disable_unprepare(data->clk);

drivers/thermal/qoriq_thermal.c

362

ret = clk_prepare_enable(data->clk);

drivers/thermal/qoriq_thermal.c

80

struct clk *clk;

drivers/thermal/renesas/rzg3e_thermal.c

389

struct clk *clk;

drivers/thermal/renesas/rzg3e_thermal.c

423

clk = devm_clk_get(dev, NULL);

drivers/thermal/renesas/rzg3e_thermal.c

424

if (IS_ERR(clk))

drivers/thermal/renesas/rzg3e_thermal.c

425

return dev_err_probe(dev, PTR_ERR(clk),

drivers/thermal/renesas/rzg3e_thermal.c

428

if (clk_get_rate(clk) < TSU_MIN_CLOCK_RATE)

drivers/thermal/renesas/rzg3e_thermal.c

431

clk_get_rate(clk), TSU_MIN_CLOCK_RATE);

drivers/thermal/rockchip_thermal.c

166

struct clk *clk;

drivers/thermal/rockchip_thermal.c

167

struct clk *pclk;

drivers/thermal/rockchip_thermal.c

1730

thermal->clk = devm_clk_get_enabled(&pdev->dev, "tsadc");

drivers/thermal/rockchip_thermal.c

1731

if (IS_ERR(thermal->clk))

drivers/thermal/rockchip_thermal.c

1732

return dev_err_probe(&pdev->dev, PTR_ERR(thermal->clk),

drivers/thermal/rockchip_thermal.c

1821

clk_disable(thermal->clk);

drivers/thermal/rockchip_thermal.c

1837

error = clk_enable(thermal->clk);

drivers/thermal/rockchip_thermal.c

1843

clk_disable(thermal->clk);

drivers/thermal/samsung/exynos_tmu.c

1039

data->clk = devm_clk_get(dev, "tmu_apbif");

drivers/thermal/samsung/exynos_tmu.c

1040

if (IS_ERR(data->clk))

drivers/thermal/samsung/exynos_tmu.c

1041

return dev_err_probe(dev, PTR_ERR(data->clk), "Failed to get clock\n");

drivers/thermal/samsung/exynos_tmu.c

1056

ret = clk_prepare(data->clk);

drivers/thermal/samsung/exynos_tmu.c

1116

clk_unprepare(data->clk);

drivers/thermal/samsung/exynos_tmu.c

1130

clk_unprepare(data->clk);

drivers/thermal/samsung/exynos_tmu.c

179

struct clk *clk, *clk_sec, *sclk;

drivers/thermal/samsung/exynos_tmu.c

260

clk_enable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

274

clk_disable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

298

clk_enable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

302

clk_disable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

331

clk_enable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

334

clk_disable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

651

clk_enable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

659

clk_disable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

726

clk_enable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

728

clk_disable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

766

clk_enable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

771

clk_disable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

982

clk_enable(data->clk);

drivers/thermal/samsung/exynos_tmu.c

993

clk_disable(data->clk);

drivers/thermal/spear_thermal.c

110

stdev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/thermal/spear_thermal.c

111

if (IS_ERR(stdev->clk)) {

drivers/thermal/spear_thermal.c

113

return PTR_ERR(stdev->clk);

drivers/thermal/spear_thermal.c

116

ret = clk_enable(stdev->clk);

drivers/thermal/spear_thermal.c

148

clk_disable(stdev->clk);

drivers/thermal/spear_thermal.c

165

clk_disable(stdev->clk);

drivers/thermal/spear_thermal.c

26

struct clk *clk;

drivers/thermal/spear_thermal.c

58

clk_disable(stdev->clk);

drivers/thermal/spear_thermal.c

71

ret = clk_enable(stdev->clk);

drivers/thermal/sprd_thermal.c

362

thm->clk = devm_clk_get_enabled(&pdev->dev, "enable");

drivers/thermal/sprd_thermal.c

363

if (IS_ERR(thm->clk)) {

drivers/thermal/sprd_thermal.c

365

return PTR_ERR(thm->clk);

drivers/thermal/sprd_thermal.c

464

clk_disable_unprepare(thm->clk);

drivers/thermal/sprd_thermal.c

494

ret = clk_prepare_enable(thm->clk);

drivers/thermal/sprd_thermal.c

508

clk_disable_unprepare(thm->clk);

drivers/thermal/sprd_thermal.c

87

struct clk *clk;

drivers/thermal/st/st_thermal.c

178

sensor->clk = devm_clk_get(dev, "thermal");

drivers/thermal/st/st_thermal.c

179

if (IS_ERR(sensor->clk)) {

drivers/thermal/st/st_thermal.c

181

return PTR_ERR(sensor->clk);

drivers/thermal/st/st_thermal.c

54

ret = clk_prepare_enable(sensor->clk);

drivers/thermal/st/st_thermal.c

63

clk_disable_unprepare(sensor->clk);

drivers/thermal/st/st_thermal.c

77

clk_disable_unprepare(sensor->clk);

drivers/thermal/st/st_thermal.h

83

struct clk *clk;

drivers/thermal/st/stm_thermal.c

203

clk_freq = clk_get_rate(sensor->clk);

drivers/thermal/st/stm_thermal.c

280

*th = clk_get_rate(sensor->clk) * SAMPLING_TIME / freqM;

drivers/thermal/st/stm_thermal.c

367

freqM = (clk_get_rate(sensor->clk) * SAMPLING_TIME) / periods;

drivers/thermal/st/stm_thermal.c

414

clk_disable_unprepare(sensor->clk);

drivers/thermal/st/stm_thermal.c

423

ret = clk_prepare_enable(sensor->clk);

drivers/thermal/st/stm_thermal.c

438

clk_disable_unprepare(sensor->clk);

drivers/thermal/st/stm_thermal.c

510

sensor->clk = devm_clk_get(&pdev->dev, "pclk");

drivers/thermal/st/stm_thermal.c

511

if (IS_ERR(sensor->clk)) {

drivers/thermal/st/stm_thermal.c

514

return PTR_ERR(sensor->clk);

drivers/thermal/st/stm_thermal.c

91

struct clk *clk;

drivers/thermal/sun8i_thermal.c

91

struct clk *bus_clk;

drivers/thermal/sun8i_thermal.c

92

struct clk *mod_clk;

drivers/thermal/tegra/soctherm.c

332

struct clk *clock_tsensor;

drivers/thermal/tegra/soctherm.c

333

struct clk *clock_soctherm;

drivers/thermal/tegra/tegra30-tsensor.c

101

err = clk_prepare_enable(ts->clk);

drivers/thermal/tegra/tegra30-tsensor.c

134

clk_disable_unprepare(ts->clk);

drivers/thermal/tegra/tegra30-tsensor.c

149

clk_disable_unprepare(ts->clk);

drivers/thermal/tegra/tegra30-tsensor.c

557

ts->clk = devm_clk_get(&pdev->dev, NULL);

drivers/thermal/tegra/tegra30-tsensor.c

558

if (IS_ERR(ts->clk))

drivers/thermal/tegra/tegra30-tsensor.c

559

return dev_err_probe(&pdev->dev, PTR_ERR(ts->clk),

drivers/thermal/tegra/tegra30-tsensor.c

83

struct clk *clk;

drivers/thermal/ti-soc-thermal/ti-bandgap.h

204

struct clk *fclock;

drivers/thermal/ti-soc-thermal/ti-bandgap.h

205

struct clk *div_clk;

drivers/tty/serial/8250/8250_aspeed_vuart.c

425

struct clk *vclk;

drivers/tty/serial/8250/8250_bcm2835aux.c

113

data->clk = devm_clk_get_optional(&pdev->dev, NULL);

drivers/tty/serial/8250/8250_bcm2835aux.c

114

if (IS_ERR(data->clk))

drivers/tty/serial/8250/8250_bcm2835aux.c

115

return dev_err_probe(&pdev->dev, PTR_ERR(data->clk), "could not get clk\n");

drivers/tty/serial/8250/8250_bcm2835aux.c

142

ret = clk_prepare_enable(data->clk);

drivers/tty/serial/8250/8250_bcm2835aux.c

148

uartclk = clk_get_rate(data->clk);

drivers/tty/serial/8250/8250_bcm2835aux.c

170

clk_disable_unprepare(data->clk);

drivers/tty/serial/8250/8250_bcm2835aux.c

181

clk_disable_unprepare(data->clk);

drivers/tty/serial/8250/8250_bcm2835aux.c

240

clk_disable_unprepare(data->clk);

drivers/tty/serial/8250/8250_bcm2835aux.c

250

ret = clk_prepare_enable(data->clk);

drivers/tty/serial/8250/8250_bcm2835aux.c

44

struct clk *clk;

drivers/tty/serial/8250/8250_bcm7271.c

208

struct clk *baud_mux_clk;

drivers/tty/serial/8250/8250_bcm7271.c

959

struct clk *baud_mux_clk;

drivers/tty/serial/8250/8250_dw.c

493

rate = clk_get_rate(d->clk);

drivers/tty/serial/8250/8250_dw.c

547

clk_disable_unprepare(d->clk);

drivers/tty/serial/8250/8250_dw.c

548

rate = clk_round_rate(d->clk, newrate);

drivers/tty/serial/8250/8250_dw.c

554

ret = clk_set_rate(d->clk, newrate);

drivers/tty/serial/8250/8250_dw.c

558

clk_prepare_enable(d->clk);

drivers/tty/serial/8250/8250_dw.c

779

data->clk = devm_clk_get_optional_enabled(dev, "baudclk");

drivers/tty/serial/8250/8250_dw.c

780

if (data->clk == NULL)

drivers/tty/serial/8250/8250_dw.c

781

data->clk = devm_clk_get_optional_enabled(dev, NULL);

drivers/tty/serial/8250/8250_dw.c

782

if (IS_ERR(data->clk))

drivers/tty/serial/8250/8250_dw.c

783

return dev_err_probe(dev, PTR_ERR(data->clk),

drivers/tty/serial/8250/8250_dw.c

789

if (data->clk)

drivers/tty/serial/8250/8250_dw.c

790

p->uartclk = clk_get_rate(data->clk);

drivers/tty/serial/8250/8250_dw.c

851

if (data->clk) {

drivers/tty/serial/8250/8250_dw.c

852

err = clk_notifier_register(data->clk, &data->clk_notifier);

drivers/tty/serial/8250/8250_dw.c

87

struct clk *clk;

drivers/tty/serial/8250/8250_dw.c

872

if (data->clk) {

drivers/tty/serial/8250/8250_dw.c

873

clk_notifier_unregister(data->clk, &data->clk_notifier);

drivers/tty/serial/8250/8250_dw.c

88

struct clk *pclk;

drivers/tty/serial/8250/8250_dw.c

906

clk_disable_unprepare(data->clk);

drivers/tty/serial/8250/8250_dw.c

922

ret = clk_prepare_enable(data->clk);

drivers/tty/serial/8250/8250_em.c

159

struct clk *sclk;

drivers/tty/serial/8250/8250_ingenic.c

30

struct clk *clk_module;

drivers/tty/serial/8250/8250_ingenic.c

31

struct clk *clk_baud;

drivers/tty/serial/8250/8250_loongson.c

149

priv->clk = devm_clk_get_enabled(dev, NULL);

drivers/tty/serial/8250/8250_loongson.c

150

if (IS_ERR(priv->clk))

drivers/tty/serial/8250/8250_loongson.c

151

return dev_err_probe(dev, PTR_ERR(priv->clk),

drivers/tty/serial/8250/8250_loongson.c

153

port->uartclk = clk_get_rate(priv->clk);

drivers/tty/serial/8250/8250_loongson.c

192

clk_disable_unprepare(priv->clk);

drivers/tty/serial/8250/8250_loongson.c

204

ret = clk_prepare_enable(priv->clk);

drivers/tty/serial/8250/8250_loongson.c

48

struct clk *clk;

drivers/tty/serial/8250/8250_lpc18xx.c

30

struct clk *clk_uart;

drivers/tty/serial/8250/8250_lpc18xx.c

31

struct clk *clk_reg;

drivers/tty/serial/8250/8250_mtk.c

72

struct clk *uart_clk;

drivers/tty/serial/8250/8250_mtk.c

73

struct clk *bus_clk;

drivers/tty/serial/8250/8250_ni.c

339

data->clk = devm_clk_get_enabled(dev, NULL);

drivers/tty/serial/8250/8250_ni.c

340

if (!IS_ERR(data->clk))

drivers/tty/serial/8250/8250_ni.c

341

uart->port.uartclk = clk_get_rate(data->clk);

drivers/tty/serial/8250/8250_ni.c

78

struct clk *clk;

drivers/tty/serial/8250/8250_of.c

127

struct clk *bus_clk;

drivers/tty/serial/8250/8250_of.c

136

info->clk = devm_clk_get_enabled(dev, bus_clk ? "core" : NULL);

drivers/tty/serial/8250/8250_of.c

137

if (IS_ERR(info->clk)) {

drivers/tty/serial/8250/8250_of.c

138

ret = dev_err_probe(dev, PTR_ERR(info->clk), "failed to get clock\n");

drivers/tty/serial/8250/8250_of.c

143

port->uartclk = clk_get_rate(info->clk);

drivers/tty/serial/8250/8250_of.c

254

if (info->clk) {

drivers/tty/serial/8250/8250_of.c

256

ret = clk_notifier_register(info->clk, &info->clk_notifier);

drivers/tty/serial/8250/8250_of.c

26

struct clk *clk;

drivers/tty/serial/8250/8250_of.c

27

struct clk *bus_clk;

drivers/tty/serial/8250/8250_of.c

281

if (info->clk)

drivers/tty/serial/8250/8250_of.c

282

clk_notifier_unregister(info->clk, &info->clk_notifier);

drivers/tty/serial/8250/8250_of.c

303

clk_disable_unprepare(info->clk);

drivers/tty/serial/8250/8250_of.c

318

clk_prepare_enable(info->clk);

drivers/tty/serial/8250/8250_omap.c

1488

struct clk *clk;

drivers/tty/serial/8250/8250_omap.c

1490

clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/8250/8250_omap.c

1491

if (IS_ERR(clk)) {

drivers/tty/serial/8250/8250_omap.c

1492

if (PTR_ERR(clk) == -EPROBE_DEFER)

drivers/tty/serial/8250/8250_omap.c

1495

up.port.uartclk = clk_get_rate(clk);

drivers/tty/serial/8250/8250_pxa.c

105

data->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/8250/8250_pxa.c

106

if (IS_ERR(data->clk))

drivers/tty/serial/8250/8250_pxa.c

107

return PTR_ERR(data->clk);

drivers/tty/serial/8250/8250_pxa.c

109

ret = clk_prepare(data->clk);

drivers/tty/serial/8250/8250_pxa.c

117

uart.port.uartclk = clk_get_rate(data->clk);

drivers/tty/serial/8250/8250_pxa.c

142

clk_unprepare(data->clk);

drivers/tty/serial/8250/8250_pxa.c

152

clk_unprepare(data->clk);

drivers/tty/serial/8250/8250_pxa.c

30

struct clk *clk;

drivers/tty/serial/8250/8250_pxa.c

85

clk_prepare_enable(data->clk);

drivers/tty/serial/8250/8250_pxa.c

87

clk_disable_unprepare(data->clk);

drivers/tty/serial/8250/8250_tegra.c

118

clk_disable_unprepare(uart->clk);

drivers/tty/serial/8250/8250_tegra.c

129

clk_disable_unprepare(uart->clk);

drivers/tty/serial/8250/8250_tegra.c

142

clk_disable_unprepare(uart->clk);

drivers/tty/serial/8250/8250_tegra.c

154

clk_prepare_enable(uart->clk);

drivers/tty/serial/8250/8250_tegra.c

21

struct clk *clk;

drivers/tty/serial/8250/8250_tegra.c

89

uart->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/8250/8250_tegra.c

90

if (IS_ERR(uart->clk)) {

drivers/tty/serial/8250/8250_tegra.c

95

ret = clk_prepare_enable(uart->clk);

drivers/tty/serial/8250/8250_tegra.c

99

port->uartclk = clk_get_rate(uart->clk);

drivers/tty/serial/8250/8250_uniphier.c

183

priv->clk = devm_clk_get(dev, NULL);

drivers/tty/serial/8250/8250_uniphier.c

184

if (IS_ERR(priv->clk)) {

drivers/tty/serial/8250/8250_uniphier.c

186

return PTR_ERR(priv->clk);

drivers/tty/serial/8250/8250_uniphier.c

189

ret = clk_prepare_enable(priv->clk);

drivers/tty/serial/8250/8250_uniphier.c

193

up.port.uartclk = clk_get_rate(priv->clk);

drivers/tty/serial/8250/8250_uniphier.c

225

clk_disable_unprepare(priv->clk);

drivers/tty/serial/8250/8250_uniphier.c

240

clk_disable_unprepare(priv->clk);

drivers/tty/serial/8250/8250_uniphier.c

251

clk_disable_unprepare(priv->clk);

drivers/tty/serial/8250/8250_uniphier.c

263

ret = clk_prepare_enable(priv->clk);

drivers/tty/serial/8250/8250_uniphier.c

35

struct clk *clk;

drivers/tty/serial/amba-pl010.c

292

retval = clk_prepare_enable(uap->clk);

drivers/tty/serial/amba-pl010.c

296

port->uartclk = clk_get_rate(uap->clk);

drivers/tty/serial/amba-pl010.c

319

clk_disable_unprepare(uap->clk);

drivers/tty/serial/amba-pl010.c

347

clk_disable_unprepare(uap->clk);

drivers/tty/serial/amba-pl010.c

53

struct clk *clk;

drivers/tty/serial/amba-pl010.c

551

clk_enable(uap->clk);

drivers/tty/serial/amba-pl010.c

571

clk_disable(uap->clk);

drivers/tty/serial/amba-pl010.c

621

ret = clk_prepare(uap->clk);

drivers/tty/serial/amba-pl010.c

625

uap->port.uartclk = clk_get_rate(uap->clk);

drivers/tty/serial/amba-pl010.c

685

uap->clk = devm_clk_get(&dev->dev, NULL);

drivers/tty/serial/amba-pl010.c

686

if (IS_ERR(uap->clk))

drivers/tty/serial/amba-pl010.c

687

return PTR_ERR(uap->clk);

drivers/tty/serial/amba-pl011.c

1780

retval = clk_prepare_enable(uap->clk);

drivers/tty/serial/amba-pl011.c

1784

uap->port.uartclk = clk_get_rate(uap->clk);

drivers/tty/serial/amba-pl011.c

1937

clk_disable_unprepare(uap->clk);

drivers/tty/serial/amba-pl011.c

2028

clk_disable_unprepare(uap->clk);

drivers/tty/serial/amba-pl011.c

2429

ret = clk_prepare(uap->clk);

drivers/tty/serial/amba-pl011.c

2443

uap->port.uartclk = clk_get_rate(uap->clk);

drivers/tty/serial/amba-pl011.c

2527

clk_enable(uap->clk);

drivers/tty/serial/amba-pl011.c

2545

clk_disable(uap->clk);

drivers/tty/serial/amba-pl011.c

2559

clk_enable(uap->clk);

drivers/tty/serial/amba-pl011.c

2589

clk_disable(uap->clk);

drivers/tty/serial/amba-pl011.c

264

struct clk *clk;

drivers/tty/serial/amba-pl011.c

2893

uap->clk = devm_clk_get(&dev->dev, NULL);

drivers/tty/serial/amba-pl011.c

2894

if (IS_ERR(uap->clk))

drivers/tty/serial/amba-pl011.c

2895

return PTR_ERR(uap->clk);

drivers/tty/serial/ar933x_uart.c

236

static unsigned long ar933x_uart_get_baud(unsigned int clk,

drivers/tty/serial/ar933x_uart.c

244

t = clk;

drivers/tty/serial/ar933x_uart.c

252

static void ar933x_uart_get_scale_step(unsigned int clk,

drivers/tty/serial/ar933x_uart.c

270

do_div(tstep, clk);

drivers/tty/serial/ar933x_uart.c

275

diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);

drivers/tty/serial/ar933x_uart.c

52

struct clk *clk;

drivers/tty/serial/ar933x_uart.c

798

up->clk = devm_clk_get(&pdev->dev, "uart");

drivers/tty/serial/ar933x_uart.c

799

if (IS_ERR(up->clk)) {

drivers/tty/serial/ar933x_uart.c

801

return PTR_ERR(up->clk);

drivers/tty/serial/ar933x_uart.c

810

ret = clk_prepare_enable(up->clk);

drivers/tty/serial/ar933x_uart.c

814

port->uartclk = clk_get_rate(up->clk);

drivers/tty/serial/ar933x_uart.c

871

clk_disable_unprepare(up->clk);

drivers/tty/serial/ar933x_uart.c

883

clk_disable_unprepare(up->clk);

drivers/tty/serial/atmel_serial.c

114

struct clk *clk; /* uart clock */

drivers/tty/serial/atmel_serial.c

115

struct clk *gclk; /* uart generic clock */

drivers/tty/serial/atmel_serial.c

2077

clk_prepare_enable(atmel_port->clk);

drivers/tty/serial/atmel_serial.c

2091

clk_disable_unprepare(atmel_port->clk);

drivers/tty/serial/atmel_serial.c

2294

actual_baud = clk_get_rate(atmel_port->clk) / (16 * cd);

drivers/tty/serial/atmel_serial.c

2537

port->uartclk = clk_get_rate(atmel_port->clk);

drivers/tty/serial/atmel_serial.c

2897

atmel_port->clk = devm_clk_get(&pdev->dev, "usart");

drivers/tty/serial/atmel_serial.c

2898

if (IS_ERR(atmel_port->clk)) {

drivers/tty/serial/atmel_serial.c

2899

ret = PTR_ERR(atmel_port->clk);

drivers/tty/serial/atmel_serial.c

2902

ret = clk_prepare_enable(atmel_port->clk);

drivers/tty/serial/atmel_serial.c

2955

clk_disable_unprepare(atmel_port->clk);

drivers/tty/serial/atmel_serial.c

2963

clk_disable_unprepare(atmel_port->clk);

drivers/tty/serial/atmel_serial.c

340

mck_rate = (u64)clk_get_rate(atmel_port->clk);

drivers/tty/serial/atmel_serial.c

341

do_div(mck_rate, iso7816conf->clk);

drivers/tty/serial/bcm63xx_uart.c

812

struct clk *clk;

drivers/tty/serial/bcm63xx_uart.c

840

clk = clk_get(&pdev->dev, "refclk");

drivers/tty/serial/bcm63xx_uart.c

841

if (IS_ERR(clk) && pdev->dev.of_node)

drivers/tty/serial/bcm63xx_uart.c

842

clk = of_clk_get(pdev->dev.of_node, 0);

drivers/tty/serial/bcm63xx_uart.c

844

if (IS_ERR(clk))

drivers/tty/serial/bcm63xx_uart.c

852

port->uartclk = clk_get_rate(clk) / 2;

drivers/tty/serial/bcm63xx_uart.c

855

clk_put(clk);

drivers/tty/serial/clps711x.c

443

struct clk *uart_clk;

drivers/tty/serial/cpm_uart.c

1264

struct clk *clk = clk_get(NULL, (const char*)data);

drivers/tty/serial/cpm_uart.c

1265

if (!IS_ERR(clk))

drivers/tty/serial/cpm_uart.c

1266

pinfo->clk = clk;

drivers/tty/serial/cpm_uart.c

1268

if (!pinfo->clk) {

drivers/tty/serial/cpm_uart.c

608

if (pinfo->clk)

drivers/tty/serial/cpm_uart.c

609

clk_set_rate(pinfo->clk, baud);

drivers/tty/serial/cpm_uart.h

65

struct clk *clk;

drivers/tty/serial/digicolor-usart.c

455

struct clk *uart_clk;

drivers/tty/serial/esp32_uart.c

329

ret = clk_prepare_enable(sport->clk);

drivers/tty/serial/esp32_uart.c

335

clk_disable_unprepare(sport->clk);

drivers/tty/serial/esp32_uart.c

359

clk_disable_unprepare(sport->clk);

drivers/tty/serial/esp32_uart.c

483

return clk_prepare_enable(sport->clk);

drivers/tty/serial/esp32_uart.c

573

ret = clk_prepare_enable(sport->clk);

drivers/tty/serial/esp32_uart.c

587

clk_disable_unprepare(sport->clk);

drivers/tty/serial/esp32_uart.c

714

sport->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/esp32_uart.c

715

if (IS_ERR(sport->clk))

drivers/tty/serial/esp32_uart.c

716

return PTR_ERR(sport->clk);

drivers/tty/serial/esp32_uart.c

718

port->uartclk = clk_get_rate(sport->clk);

drivers/tty/serial/esp32_uart.c

94

struct clk *clk;

drivers/tty/serial/fsl_lpuart.c

2145

u32 clk = port->uartclk;

drivers/tty/serial/fsl_lpuart.c

2162

tmp_sbr = (clk / (baudrate * tmp_osr));

drivers/tty/serial/fsl_lpuart.c

2170

tmp_diff = clk / (tmp_osr * tmp_sbr) - baudrate;

drivers/tty/serial/fsl_lpuart.c

2173

baud = clk / (tmp_osr * (tmp_sbr + 1));

drivers/tty/serial/fsl_lpuart.c

266

struct clk *ipg_clk;

drivers/tty/serial/fsl_lpuart.c

267

struct clk *baud_clk;

drivers/tty/serial/imx.c

207

struct clk *clk_ipg;

drivers/tty/serial/imx.c

208

struct clk *clk_per;

drivers/tty/serial/lantiq.c

111

struct clk *freqclk;

drivers/tty/serial/lantiq.c

113

struct clk *clk;

drivers/tty/serial/lantiq.c

333

if (!IS_ERR(ltq_port->clk))

drivers/tty/serial/lantiq.c

334

clk_prepare_enable(ltq_port->clk);

drivers/tty/serial/lantiq.c

383

if (!IS_ERR(ltq_port->clk))

drivers/tty/serial/lantiq.c

384

clk_disable_unprepare(ltq_port->clk);

drivers/tty/serial/lantiq.c

635

if (!IS_ERR(ltq_port->clk))

drivers/tty/serial/lantiq.c

636

clk_prepare_enable(ltq_port->clk);

drivers/tty/serial/lantiq.c

875

ltq_port->clk = clk_get(&pdev->dev, NULL);

drivers/tty/serial/lantiq.c

877

ltq_port->clk = devm_clk_get(&pdev->dev, "asc");

drivers/tty/serial/ma35d1_serial.c

150

struct clk *clk;

drivers/tty/serial/ma35d1_serial.c

714

up->clk = of_clk_get(pdev->dev.of_node, 0);

drivers/tty/serial/ma35d1_serial.c

715

if (IS_ERR(up->clk)) {

drivers/tty/serial/ma35d1_serial.c

716

ret = PTR_ERR(up->clk);

drivers/tty/serial/ma35d1_serial.c

721

ret = clk_prepare_enable(up->clk);

drivers/tty/serial/ma35d1_serial.c

726

up->port.uartclk = clk_get_rate(up->clk);

drivers/tty/serial/ma35d1_serial.c

748

clk_disable_unprepare(up->clk);

drivers/tty/serial/ma35d1_serial.c

764

clk_disable_unprepare(up->clk);

drivers/tty/serial/max310x.c

1290

s->clk = devm_clk_get_optional(dev, "xtal");

drivers/tty/serial/max310x.c

1292

s->clk = devm_clk_get_optional(dev, "osc");

drivers/tty/serial/max310x.c

1293

if (IS_ERR(s->clk))

drivers/tty/serial/max310x.c

1294

return PTR_ERR(s->clk);

drivers/tty/serial/max310x.c

1296

ret = clk_prepare_enable(s->clk);

drivers/tty/serial/max310x.c

1300

freq = clk_get_rate(s->clk);

drivers/tty/serial/max310x.c

1452

clk_disable_unprepare(s->clk);

drivers/tty/serial/max310x.c

1473

clk_disable_unprepare(s->clk);

drivers/tty/serial/max310x.c

296

struct clk *clk;

drivers/tty/serial/meson_uart.c

668

struct clk *clk_xtal = NULL;

drivers/tty/serial/meson_uart.c

669

struct clk *clk_pclk = NULL;

drivers/tty/serial/meson_uart.c

670

struct clk *clk_baud = NULL;

drivers/tty/serial/milbeaut_usio.c

499

struct clk *clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/milbeaut_usio.c

505

if (IS_ERR(clk)) {

drivers/tty/serial/milbeaut_usio.c

507

return PTR_ERR(clk);

drivers/tty/serial/milbeaut_usio.c

509

ret = clk_prepare_enable(clk);

drivers/tty/serial/milbeaut_usio.c

517

port->private_data = (void *)clk;

drivers/tty/serial/milbeaut_usio.c

537

port->uartclk = clk_get_rate(clk);

drivers/tty/serial/milbeaut_usio.c

554

clk_disable_unprepare(clk);

drivers/tty/serial/milbeaut_usio.c

562

struct clk *clk = port->private_data;

drivers/tty/serial/milbeaut_usio.c

565

clk_disable_unprepare(clk);

drivers/tty/serial/mpc52xx_uart.c

420

static struct clk *psc_fifoc_clk;

drivers/tty/serial/mpc52xx_uart.c

570

struct clk *clk;

drivers/tty/serial/mpc52xx_uart.c

582

clk = of_clk_get(np, 0);

drivers/tty/serial/mpc52xx_uart.c

583

if (IS_ERR(clk)) {

drivers/tty/serial/mpc52xx_uart.c

585

clk = clk_get_sys(np->name, "ipg");

drivers/tty/serial/mpc52xx_uart.c

587

if (IS_ERR(clk)) {

drivers/tty/serial/mpc52xx_uart.c

589

err = PTR_ERR(clk);

drivers/tty/serial/mpc52xx_uart.c

592

if (clk_prepare_enable(clk)) {

drivers/tty/serial/mpc52xx_uart.c

594

clk_put(clk);

drivers/tty/serial/mpc52xx_uart.c

597

psc_fifoc_clk = clk;

drivers/tty/serial/mpc52xx_uart.c

655

static struct clk *psc_mclk_clk[MPC52xx_PSC_MAXNUM];

drivers/tty/serial/mpc52xx_uart.c

656

static struct clk *psc_ipg_clk[MPC52xx_PSC_MAXNUM];

drivers/tty/serial/mpc52xx_uart.c

662

struct clk *clk;

drivers/tty/serial/mpc52xx_uart.c

667

clk = devm_clk_get(port->dev, "mclk");

drivers/tty/serial/mpc52xx_uart.c

668

if (IS_ERR(clk)) {

drivers/tty/serial/mpc52xx_uart.c

670

err = PTR_ERR(clk);

drivers/tty/serial/mpc52xx_uart.c

673

err = clk_prepare_enable(clk);

drivers/tty/serial/mpc52xx_uart.c

678

psc_mclk_clk[psc_num] = clk;

drivers/tty/serial/mpc52xx_uart.c

680

clk = devm_clk_get(port->dev, "ipg");

drivers/tty/serial/mpc52xx_uart.c

681

if (IS_ERR(clk)) {

drivers/tty/serial/mpc52xx_uart.c

683

err = PTR_ERR(clk);

drivers/tty/serial/mpc52xx_uart.c

686

err = clk_prepare_enable(clk);

drivers/tty/serial/mpc52xx_uart.c

691

psc_ipg_clk[psc_num] = clk;

drivers/tty/serial/mpc52xx_uart.c

711

struct clk *clk;

drivers/tty/serial/mpc52xx_uart.c

714

clk = psc_mclk_clk[psc_num];

drivers/tty/serial/mpc52xx_uart.c

715

if (clk) {

drivers/tty/serial/mpc52xx_uart.c

716

clk_disable_unprepare(clk);

drivers/tty/serial/mpc52xx_uart.c

729

struct clk *psc_clk;

drivers/tty/serial/mps2-uart.c

553

mps_port->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/mps2-uart.c

554

if (IS_ERR(mps_port->clk))

drivers/tty/serial/mps2-uart.c

555

return PTR_ERR(mps_port->clk);

drivers/tty/serial/mps2-uart.c

557

ret = clk_prepare_enable(mps_port->clk);

drivers/tty/serial/mps2-uart.c

561

mps_port->port.uartclk = clk_get_rate(mps_port->clk);

drivers/tty/serial/mps2-uart.c

563

clk_disable_unprepare(mps_port->clk);

drivers/tty/serial/mps2-uart.c

72

struct clk *clk;

drivers/tty/serial/msm_serial.c

1086

target = clk_round_rate(msm_port->clk, 16 * baud);

drivers/tty/serial/msm_serial.c

1107

target = clk_round_rate(msm_port->clk, old + 1);

drivers/tty/serial/msm_serial.c

1196

clk_prepare_enable(msm_port->clk);

drivers/tty/serial/msm_serial.c

1248

clk_disable_unprepare(msm_port->clk);

drivers/tty/serial/msm_serial.c

1264

clk_disable_unprepare(msm_port->clk);

drivers/tty/serial/msm_serial.c

1432

clk_prepare_enable(msm_port->clk);

drivers/tty/serial/msm_serial.c

1436

clk_disable_unprepare(msm_port->clk);

drivers/tty/serial/msm_serial.c

180

struct clk *clk;

drivers/tty/serial/msm_serial.c

181

struct clk *pclk;

drivers/tty/serial/msm_serial.c

1828

msm_port->clk = devm_clk_get(&pdev->dev, "core");

drivers/tty/serial/msm_serial.c

1829

if (IS_ERR(msm_port->clk))

drivers/tty/serial/msm_serial.c

1830

return PTR_ERR(msm_port->clk);

drivers/tty/serial/msm_serial.c

1847

port->uartclk = clk_get_rate(msm_port->clk);

drivers/tty/serial/mvebu-uart.c

1327

struct clk *parent_clks[ARRAY_SIZE(parent_clk_names)];

drivers/tty/serial/mvebu-uart.c

155

struct clk *clk;

drivers/tty/serial/mvebu-uart.c

937

mvuart->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/mvebu-uart.c

938

if (IS_ERR(mvuart->clk)) {

drivers/tty/serial/mvebu-uart.c

939

if (PTR_ERR(mvuart->clk) == -EPROBE_DEFER)

drivers/tty/serial/mvebu-uart.c

940

return PTR_ERR(mvuart->clk);

drivers/tty/serial/mvebu-uart.c

944

return PTR_ERR(mvuart->clk);

drivers/tty/serial/mvebu-uart.c

947

if (!clk_prepare_enable(mvuart->clk))

drivers/tty/serial/mvebu-uart.c

948

port->uartclk = clk_get_rate(mvuart->clk);

drivers/tty/serial/mxs-auart.c

1170

ret = clk_prepare_enable(s->clk);

drivers/tty/serial/mxs-auart.c

1222

clk_disable_unprepare(s->clk);

drivers/tty/serial/mxs-auart.c

1321

clk_enable(s->clk);

drivers/tty/serial/mxs-auart.c

1350

clk_disable(s->clk);

drivers/tty/serial/mxs-auart.c

1409

ret = clk_prepare_enable(s->clk);

drivers/tty/serial/mxs-auart.c

1420

clk_disable_unprepare(s->clk);

drivers/tty/serial/mxs-auart.c

1462

s->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/mxs-auart.c

1463

return PTR_ERR_OR_ZERO(s->clk);

drivers/tty/serial/mxs-auart.c

1466

s->clk = devm_clk_get(s->dev, "mod");

drivers/tty/serial/mxs-auart.c

1467

if (IS_ERR(s->clk)) {

drivers/tty/serial/mxs-auart.c

1469

return PTR_ERR(s->clk);

drivers/tty/serial/mxs-auart.c

1484

err = clk_set_rate(s->clk, clk_get_rate(s->clk_ahb));

drivers/tty/serial/mxs-auart.c

1490

err = clk_prepare_enable(s->clk);

drivers/tty/serial/mxs-auart.c

1621

s->port.uartclk = clk_get_rate(s->clk);

drivers/tty/serial/mxs-auart.c

1685

clk_disable_unprepare(s->clk);

drivers/tty/serial/mxs-auart.c

1700

clk_disable_unprepare(s->clk);

drivers/tty/serial/mxs-auart.c

426

struct clk *clk;

drivers/tty/serial/mxs-auart.c

427

struct clk *clk_ahb;

drivers/tty/serial/owl-uart.c

304

clk_set_rate(owl_port->clk, baud * 8);

drivers/tty/serial/owl-uart.c

683

owl_port->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/owl-uart.c

684

if (IS_ERR(owl_port->clk)) {

drivers/tty/serial/owl-uart.c

686

return PTR_ERR(owl_port->clk);

drivers/tty/serial/owl-uart.c

689

ret = clk_prepare_enable(owl_port->clk);

drivers/tty/serial/owl-uart.c

701

owl_port->port.uartclk = clk_get_rate(owl_port->clk);

drivers/tty/serial/owl-uart.c

704

clk_disable_unprepare(owl_port->clk);

drivers/tty/serial/owl-uart.c

728

clk_disable_unprepare(owl_port->clk);

drivers/tty/serial/owl-uart.c

77

struct clk *clk;

drivers/tty/serial/pic32_uart.c

460

ret = clk_prepare_enable(sport->clk);

drivers/tty/serial/pic32_uart.c

569

clk_disable_unprepare(sport->clk);

drivers/tty/serial/pic32_uart.c

584

clk_disable_unprepare(sport->clk);

drivers/tty/serial/pic32_uart.c

68

struct clk *clk;

drivers/tty/serial/pic32_uart.c

808

ret = clk_prepare_enable(sport->clk);

drivers/tty/serial/pic32_uart.c

888

sport->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/pic32_uart.c

889

if (IS_ERR(sport->clk))

drivers/tty/serial/pic32_uart.c

890

return PTR_ERR(sport->clk);

drivers/tty/serial/pic32_uart.c

909

port->uartclk = clk_get_rate(sport->clk);

drivers/tty/serial/pic32_uart.c

924

clk_disable_unprepare(sport->clk);

drivers/tty/serial/pic32_uart.c

945

clk_disable_unprepare(sport->clk);

drivers/tty/serial/pxa.c

318

up->port.uartclk = clk_get_rate(up->clk);

drivers/tty/serial/pxa.c

48

struct clk *clk;

drivers/tty/serial/pxa.c

517

clk_prepare_enable(up->clk);

drivers/tty/serial/pxa.c

519

clk_disable_unprepare(up->clk);

drivers/tty/serial/pxa.c

606

clk_enable(up->clk);

drivers/tty/serial/pxa.c

629

clk_disable(up->clk);

drivers/tty/serial/pxa.c

818

sport->clk = clk_get(&dev->dev, NULL);

drivers/tty/serial/pxa.c

819

if (IS_ERR(sport->clk)) {

drivers/tty/serial/pxa.c

820

ret = PTR_ERR(sport->clk);

drivers/tty/serial/pxa.c

824

ret = clk_prepare(sport->clk);

drivers/tty/serial/pxa.c

826

clk_put(sport->clk);

drivers/tty/serial/pxa.c

838

sport->port.uartclk = clk_get_rate(sport->clk);

drivers/tty/serial/pxa.c

867

clk_unprepare(sport->clk);

drivers/tty/serial/pxa.c

868

clk_put(sport->clk);

drivers/tty/serial/qcom_geni_serial.c

1674

port->se.clk = devm_clk_get(port->se.dev, "se");

drivers/tty/serial/qcom_geni_serial.c

1675

if (IS_ERR(port->se.clk)) {

drivers/tty/serial/qcom_geni_serial.c

1676

ret = PTR_ERR(port->se.clk);

drivers/tty/serial/rda-uart.c

118

struct clk *clk;

drivers/tty/serial/rda-uart.c

236

clk_set_rate(rda_port->clk, baud * 8);

drivers/tty/serial/rda-uart.c

736

rda_port->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/rda-uart.c

737

if (IS_ERR(rda_port->clk)) {

drivers/tty/serial/rda-uart.c

739

return PTR_ERR(rda_port->clk);

drivers/tty/serial/rda-uart.c

749

rda_port->port.uartclk = clk_get_rate(rda_port->clk);

drivers/tty/serial/samsung_tty.c

1317

clk_disable_unprepare(ourport->clk);

drivers/tty/serial/samsung_tty.c

1321

clk_prepare_enable(ourport->clk);

drivers/tty/serial/samsung_tty.c

1377

unsigned int req_baud, struct clk **best_clk,

drivers/tty/serial/samsung_tty.c

1381

struct clk *clk;

drivers/tty/serial/samsung_tty.c

1395

clk = clk_get(ourport->port.dev, clkname);

drivers/tty/serial/samsung_tty.c

1396

if (IS_ERR(clk))

drivers/tty/serial/samsung_tty.c

1399

rate = clk_get_rate(clk);

drivers/tty/serial/samsung_tty.c

1403

clk_put(clk);

drivers/tty/serial/samsung_tty.c

1435

*best_clk = clk;

drivers/tty/serial/samsung_tty.c

1440

clk_put(clk);

drivers/tty/serial/samsung_tty.c

146

struct clk *clk;

drivers/tty/serial/samsung_tty.c

147

struct clk *baudclk;

drivers/tty/serial/samsung_tty.c

1477

struct clk *clk = ERR_PTR(-EINVAL);

drivers/tty/serial/samsung_tty.c

1495

quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel);

drivers/tty/serial/samsung_tty.c

1498

if (IS_ERR(clk))

drivers/tty/serial/samsung_tty.c

1503

if (ourport->baudclk != clk) {

drivers/tty/serial/samsung_tty.c

1504

clk_prepare_enable(clk);

drivers/tty/serial/samsung_tty.c

1513

ourport->baudclk = clk;

drivers/tty/serial/samsung_tty.c

1514

ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;

drivers/tty/serial/samsung_tty.c

1783

struct clk *clk;

drivers/tty/serial/samsung_tty.c

1793

clk = clk_get(dev, clk_name);

drivers/tty/serial/samsung_tty.c

1794

if (IS_ERR(clk))

drivers/tty/serial/samsung_tty.c

1797

ret = clk_prepare_enable(clk);

drivers/tty/serial/samsung_tty.c

1799

clk_put(clk);

drivers/tty/serial/samsung_tty.c

1803

ourport->baudclk = clk;

drivers/tty/serial/samsung_tty.c

1804

ourport->baudclk_rate = clk_get_rate(clk);

drivers/tty/serial/samsung_tty.c

1883

ourport->clk = clk_get(&platdev->dev, "uart");

drivers/tty/serial/samsung_tty.c

1884

if (IS_ERR(ourport->clk)) {

drivers/tty/serial/samsung_tty.c

1887

ret = PTR_ERR(ourport->clk);

drivers/tty/serial/samsung_tty.c

1891

ret = clk_prepare_enable(ourport->clk);

drivers/tty/serial/samsung_tty.c

1894

clk_put(ourport->clk);

drivers/tty/serial/samsung_tty.c

2056

clk_disable_unprepare(ourport->clk);

drivers/tty/serial/samsung_tty.c

2093

clk_prepare_enable(ourport->clk);

drivers/tty/serial/samsung_tty.c

2099

clk_disable_unprepare(ourport->clk);

drivers/tty/serial/samsung_tty.c

2122

clk_prepare_enable(ourport->clk);

drivers/tty/serial/samsung_tty.c

2128

clk_disable_unprepare(ourport->clk);

drivers/tty/serial/samsung_tty.c

2135

ret = clk_prepare_enable(ourport->clk);

drivers/tty/serial/samsung_tty.c

2144

clk_disable_unprepare(ourport->clk);

drivers/tty/serial/samsung_tty.c

2167

clk_disable_unprepare(ourport->clk);

drivers/tty/serial/samsung_tty.c

2296

struct clk *clk;

drivers/tty/serial/samsung_tty.c

2342

clk = clk_get(port->dev, clk_name);

drivers/tty/serial/samsung_tty.c

2343

if (!IS_ERR(clk))

drivers/tty/serial/samsung_tty.c

2344

rate = clk_get_rate(clk);

drivers/tty/serial/sc16is7xx.c

1568

s->clk = devm_clk_get_optional(dev, NULL);

drivers/tty/serial/sc16is7xx.c

1569

if (IS_ERR(s->clk))

drivers/tty/serial/sc16is7xx.c

1570

return PTR_ERR(s->clk);

drivers/tty/serial/sc16is7xx.c

1572

ret = clk_prepare_enable(s->clk);

drivers/tty/serial/sc16is7xx.c

1576

freq = clk_get_rate(s->clk);

drivers/tty/serial/sc16is7xx.c

1675

clk_disable_unprepare(s->clk);

drivers/tty/serial/sc16is7xx.c

1704

clk_disable_unprepare(s->clk);

drivers/tty/serial/sc16is7xx.c

304

struct clk *clk;

drivers/tty/serial/sc16is7xx.c

547

unsigned long clk = port->uartclk, div = clk / 16 / baud;

drivers/tty/serial/sc16is7xx.c

569

return DIV_ROUND_CLOSEST((clk / prescaler) / 16, div);

drivers/tty/serial/sccnxp.c

891

struct clk *clk;

drivers/tty/serial/sccnxp.c

919

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/tty/serial/sccnxp.c

920

if (IS_ERR(clk)) {

drivers/tty/serial/sccnxp.c

921

ret = PTR_ERR(clk);

drivers/tty/serial/sccnxp.c

926

uartclk = clk_get_rate(clk);

drivers/tty/serial/serial-tegra.c

110

struct clk *uart_clk;

drivers/tty/serial/serial-tegra.c

1294

struct clk *parent_clk = clk_get_parent(tup->uart_clk);

drivers/tty/serial/sh-sci-common.h

122

struct clk *clks[SCI_NUM_CLKS];

drivers/tty/serial/sh-sci.c

3179

struct clk *clk;

drivers/tty/serial/sh-sci.c

3195

clk = devm_clk_get_optional(dev, name);

drivers/tty/serial/sh-sci.c

3196

if (IS_ERR(clk))

drivers/tty/serial/sh-sci.c

3197

return PTR_ERR(clk);

drivers/tty/serial/sh-sci.c

3199

if (!clk && sci_port->type == RSCI_PORT_SCIF16 &&

drivers/tty/serial/sh-sci.c

3203

if (!clk && sci_port->type == RSCI_PORT_SCIF32 &&

drivers/tty/serial/sh-sci.c

3207

if (!clk && i == SCI_FCK) {

drivers/tty/serial/sh-sci.c

3213

clk = devm_clk_get(dev, "peripheral_clk");

drivers/tty/serial/sh-sci.c

3214

if (IS_ERR(clk))

drivers/tty/serial/sh-sci.c

3215

return dev_err_probe(dev, PTR_ERR(clk), "failed to get %s\n", name);

drivers/tty/serial/sh-sci.c

3218

if (!clk)

drivers/tty/serial/sh-sci.c

3221

dev_dbg(dev, "clk %s is %pC rate %lu\n", name, clk, clk_get_rate(clk));

drivers/tty/serial/sh-sci.c

3222

sci_port->clks[i] = clk;

drivers/tty/serial/sifive.c

1022

ssp->clk = clk;

drivers/tty/serial/sifive.c

1025

r = clk_notifier_register(ssp->clk, &ssp->clk_notifier);

drivers/tty/serial/sifive.c

1033

ssp->port.uartclk = clk_get_rate(ssp->clk);

drivers/tty/serial/sifive.c

1070

clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);

drivers/tty/serial/sifive.c

1082

clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);

drivers/tty/serial/sifive.c

153

struct clk *clk;

drivers/tty/serial/sifive.c

977

struct clk *clk;

drivers/tty/serial/sifive.c

989

clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/tty/serial/sifive.c

990

if (IS_ERR(clk)) {

drivers/tty/serial/sifive.c

992

return PTR_ERR(clk);

drivers/tty/serial/sprd_serial.c

1131

struct clk *clk_uart, *clk_parent;

drivers/tty/serial/sprd_serial.c

1159

u->clk = devm_clk_get(uport->dev, "enable");

drivers/tty/serial/sprd_serial.c

1160

if (IS_ERR(u->clk)) {

drivers/tty/serial/sprd_serial.c

1161

if (PTR_ERR(u->clk) == -EPROBE_DEFER)

drivers/tty/serial/sprd_serial.c

1169

return PTR_ERR(u->clk);

drivers/tty/serial/sprd_serial.c

1171

u->clk = NULL;

drivers/tty/serial/sprd_serial.c

133

struct clk *clk;

drivers/tty/serial/sprd_serial.c

911

clk_prepare_enable(sup->clk);

drivers/tty/serial/sprd_serial.c

914

clk_disable_unprepare(sup->clk);

drivers/tty/serial/st-asc.c

38

struct clk *clk;

drivers/tty/serial/st-asc.c

447

clk_prepare_enable(ascport->clk);

drivers/tty/serial/st-asc.c

459

clk_disable_unprepare(ascport->clk);

drivers/tty/serial/st-asc.c

479

port->uartclk = clk_get_rate(ascport->clk);

drivers/tty/serial/st-asc.c

709

ascport->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/st-asc.c

711

if (WARN_ON(IS_ERR(ascport->clk)))

drivers/tty/serial/st-asc.c

714

ret = clk_prepare_enable(ascport->clk);

drivers/tty/serial/st-asc.c

717

ascport->port.uartclk = clk_get_rate(ascport->clk);

drivers/tty/serial/st-asc.c

719

clk_disable_unprepare(ascport->clk);

drivers/tty/serial/stm32-usart.c

1169

uart_clk = clk_get_rate(stm32_port->clk);

drivers/tty/serial/stm32-usart.c

1450

return clk_prepare_enable(stm32_port->clk);

drivers/tty/serial/stm32-usart.c

1553

clk_disable_unprepare(stm32port->clk);

drivers/tty/serial/stm32-usart.c

1600

stm32port->clk = devm_clk_get(&pdev->dev, NULL);

drivers/tty/serial/stm32-usart.c

1601

if (IS_ERR(stm32port->clk))

drivers/tty/serial/stm32-usart.c

1602

return PTR_ERR(stm32port->clk);

drivers/tty/serial/stm32-usart.c

1605

ret = clk_prepare_enable(stm32port->clk);

drivers/tty/serial/stm32-usart.c

1609

stm32port->port.uartclk = clk_get_rate(stm32port->clk);

drivers/tty/serial/stm32-usart.c

1646

clk_disable_unprepare(stm32port->clk);

drivers/tty/serial/stm32-usart.c

2166

clk_disable_unprepare(stm32port->clk);

drivers/tty/serial/stm32-usart.c

2177

return clk_prepare_enable(stm32port->clk);

drivers/tty/serial/stm32-usart.h

200

struct clk *clk;

drivers/tty/serial/sunplus-uart.c

339

u32 clk = port->uartclk;

drivers/tty/serial/sunplus-uart.c

345

clk += baud >> 1;

drivers/tty/serial/sunplus-uart.c

346

div = clk / baud;

drivers/tty/serial/sunplus-uart.c

602

sup->clk = devm_clk_get_optional(&pdev->dev, NULL);

drivers/tty/serial/sunplus-uart.c

603

if (IS_ERR(sup->clk))

drivers/tty/serial/sunplus-uart.c

604

return dev_err_probe(&pdev->dev, PTR_ERR(sup->clk), "clk not found\n");

drivers/tty/serial/sunplus-uart.c

606

ret = clk_prepare_enable(sup->clk);

drivers/tty/serial/sunplus-uart.c

610

ret = devm_add_action_or_reset(&pdev->dev, sunplus_uart_disable_unprepare, sup->clk);

drivers/tty/serial/sunplus-uart.c

629

port->uartclk = clk_get_rate(sup->clk);

drivers/tty/serial/sunplus-uart.c

76

struct clk *clk;

drivers/tty/serial/uartlite.c

293

ret = clk_enable(pdata->clk);

drivers/tty/serial/uartlite.c

318

clk_disable(pdata->clk);

drivers/tty/serial/uartlite.c

741

clk_disable(pdata->clk);

drivers/tty/serial/uartlite.c

751

ret = clk_enable(pdata->clk);

drivers/tty/serial/uartlite.c

78

struct clk *clk;

drivers/tty/serial/uartlite.c

860

pdata->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");

drivers/tty/serial/uartlite.c

861

if (IS_ERR(pdata->clk)) {

drivers/tty/serial/uartlite.c

862

if (PTR_ERR(pdata->clk) != -ENOENT)

drivers/tty/serial/uartlite.c

863

return PTR_ERR(pdata->clk);

drivers/tty/serial/uartlite.c

869

pdata->clk = NULL;

drivers/tty/serial/uartlite.c

872

ret = clk_prepare_enable(pdata->clk);

drivers/tty/serial/uartlite.c

897

clk_disable_unprepare(pdata->clk);

drivers/tty/serial/vt8500_serial.c

650

vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);

drivers/tty/serial/vt8500_serial.c

651

if (IS_ERR(vt8500_port->clk)) {

drivers/tty/serial/vt8500_serial.c

656

ret = clk_prepare_enable(vt8500_port->clk);

drivers/tty/serial/vt8500_serial.c

664

clk_get_rate(vt8500_port->clk),

drivers/tty/serial/vt8500_serial.c

679

vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) /

drivers/tty/serial/vt8500_serial.c

98

struct clk *clk;

drivers/tty/serial/xilinx_uartps.c

204

struct clk *uartclk;

drivers/tty/serial/xilinx_uartps.c

205

struct clk *pclk;

drivers/tty/serial/xilinx_uartps.c

519

static unsigned int cdns_uart_calc_baud_divs(unsigned int clk,

drivers/tty/serial/xilinx_uartps.c

528

if (baud < clk / ((CDNS_UART_BDIV_MAX + 1) * CDNS_UART_CD_MAX)) {

drivers/tty/serial/xilinx_uartps.c

530

clk /= 8;

drivers/tty/serial/xilinx_uartps.c

536

cd = DIV_ROUND_CLOSEST(clk, baud * (bdiv + 1));

drivers/tty/serial/xilinx_uartps.c

540

calc_baud = clk / (cd * (bdiv + 1));

drivers/ufs/core/ufs_trace.h

107

TP_PROTO(struct ufs_hba *hba, const char *state, const char *clk,

drivers/ufs/core/ufs_trace.h

110

TP_ARGS(hba, state, clk, prev_state, curr_state),

drivers/ufs/core/ufs_trace.h

115

__string(clk, clk)

drivers/ufs/core/ufs_trace.h

123

__assign_str(clk);

drivers/ufs/core/ufs_trace.h

129

dev_name(__entry->hba->dev), __get_str(state), __get_str(clk),

drivers/ufs/core/ufshcd.c

1110

if (!IS_ERR_OR_NULL(clki->clk)) {

drivers/ufs/core/ufshcd.c

1115

ret = clk_set_rate(clki->clk, clki->max_freq);

drivers/ufs/core/ufshcd.c

1133

ret = clk_set_rate(clki->clk, clki->min_freq);

drivers/ufs/core/ufshcd.c

1148

clki->name, clk_get_rate(clki->clk));

drivers/ufs/core/ufshcd.c

1167

if (!IS_ERR_OR_NULL(clki->clk)) {

drivers/ufs/core/ufshcd.c

1174

ret = clk_set_rate(clki->clk, freq);

drivers/ufs/core/ufshcd.c

1272

if (!IS_ERR_OR_NULL(clki->clk)) {

drivers/ufs/core/ufshcd.c

1583

*freq = (unsigned long) clk_round_rate(clki->clk, *freq);

drivers/ufs/core/ufshcd.c

539

if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&

drivers/ufs/core/ufshcd.c

8875

void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)

drivers/ufs/core/ufshcd.c

9525

if (!IS_ERR_OR_NULL(clki->clk)) {

drivers/ufs/core/ufshcd.c

9536

ret = clk_prepare_enable(clki->clk);

drivers/ufs/core/ufshcd.c

9543

clk_disable_unprepare(clki->clk);

drivers/ufs/core/ufshcd.c

9560

if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)

drivers/ufs/core/ufshcd.c

9561

clk_disable_unprepare(clki->clk);

drivers/ufs/core/ufshcd.c

9604

clki->clk = devm_clk_get(dev, clki->name);

drivers/ufs/core/ufshcd.c

9605

if (IS_ERR(clki->clk)) {

drivers/ufs/core/ufshcd.c

9606

ret = PTR_ERR(clki->clk);

drivers/ufs/core/ufshcd.c

9618

ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);

drivers/ufs/core/ufshcd.c

9621

ret = clk_set_rate(clki->clk, clki->max_freq);

drivers/ufs/core/ufshcd.c

9631

clki->name, clk_get_rate(clki->clk));

drivers/ufs/host/cdns-pltfrm.c

120

if (IS_ERR_OR_NULL(clki->clk))

drivers/ufs/host/cdns-pltfrm.c

123

core_clk_rate = clk_get_rate(clki->clk);

drivers/ufs/host/ti-j721e-ufs.c

28

struct clk *clk;

drivers/ufs/host/ti-j721e-ufs.c

45

clk = devm_clk_get(dev, NULL);

drivers/ufs/host/ti-j721e-ufs.c

46

if (IS_ERR(clk)) {

drivers/ufs/host/ti-j721e-ufs.c

47

ret = PTR_ERR(clk);

drivers/ufs/host/ti-j721e-ufs.c

51

clk_rate = clk_get_rate(clk);

drivers/ufs/host/ti-j721e-ufs.c

54

devm_clk_put(dev, clk);

drivers/ufs/host/ufs-amd-versal2.c

312

host->host_clk = clk_get_rate(clki->clk);

drivers/ufs/host/ufs-exynos.c

464

if (!IS_ERR(clki->clk)) {

drivers/ufs/host/ufs-exynos.c

466

ufs->clk_hci_core = clki->clk;

drivers/ufs/host/ufs-exynos.c

468

ufs->clk_unipro_main = clki->clk;

drivers/ufs/host/ufs-exynos.c

534

unsigned long clk = 0, _clk, clk_period;

drivers/ufs/host/ufs-exynos.c

541

if (_clk > clk) {

drivers/ufs/host/ufs-exynos.c

543

clk = _clk;

drivers/ufs/host/ufs-exynos.h

219

struct clk *clk_hci_core;

drivers/ufs/host/ufs-exynos.h

220

struct clk *clk_unipro_main;

drivers/ufs/host/ufs-exynos.h

221

struct clk *clk_apb;

drivers/ufs/host/ufs-mediatek.c

2045

ret = clk_prepare_enable(clki->clk);

drivers/ufs/host/ufs-mediatek.c

2053

ret = clk_prepare_enable(fde_clki->clk);

drivers/ufs/host/ufs-mediatek.c

2071

ret = clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk);

drivers/ufs/host/ufs-mediatek.c

2078

ret = clk_set_parent(fde_clki->clk,

drivers/ufs/host/ufs-mediatek.c

2079

mclk->ufs_fde_max_clki->clk);

drivers/ufs/host/ufs-mediatek.c

2088

ret = clk_set_parent(fde_clki->clk,

drivers/ufs/host/ufs-mediatek.c

2089

mclk->ufs_fde_min_clki->clk);

drivers/ufs/host/ufs-mediatek.c

2098

ret = clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk);

drivers/ufs/host/ufs-mediatek.c

2115

clk_disable_unprepare(clki->clk);

drivers/ufs/host/ufs-mediatek.c

2118

clk_disable_unprepare(fde_clki->clk);

drivers/ufs/host/ufs-mediatek.c

2155

trace_ufs_mtk_clk_scale(clki->name, scale_up, clk_get_rate(clki->clk));

drivers/ufs/host/ufs-mediatek.c

548

struct clk **clk_out)

drivers/ufs/host/ufs-mediatek.c

550

struct clk *clk;

drivers/ufs/host/ufs-mediatek.c

553

clk = devm_clk_get(dev, name);

drivers/ufs/host/ufs-mediatek.c

554

if (IS_ERR(clk))

drivers/ufs/host/ufs-mediatek.c

555

err = PTR_ERR(clk);

drivers/ufs/host/ufs-mediatek.c

557

*clk_out = clk;

drivers/ufs/host/ufs-mediatek.c

619

struct clk **clk)

drivers/ufs/host/ufs-mediatek.c

623

ret = ufs_mtk_get_host_clk(hba->dev, name, clk);

drivers/ufs/host/ufs-mediatek.c

983

clk_disable_unprepare(clki->clk);

drivers/ufs/host/ufs-mediatek.c

987

clk_disable_unprepare(clki->clk);

drivers/ufs/host/ufs-mediatek.c

993

clk_disable_unprepare(clki->clk);

drivers/ufs/host/ufs-mediatek.c

997

clk_disable_unprepare(clki->clk);

drivers/ufs/host/ufs-mediatek.h

146

struct clk *clk_crypt_perf;

drivers/ufs/host/ufs-mediatek.h

147

struct clk *clk_crypt_mux;

drivers/ufs/host/ufs-mediatek.h

148

struct clk *clk_crypt_lp;

drivers/ufs/host/ufs-qcom.c

1611

if (!IS_ERR_OR_NULL(clki->clk) &&

drivers/ufs/host/ufs-qcom.c

1626

cycles_in_1us = ceil(clk_get_rate(clki->clk), HZ_PER_MHZ);

drivers/ufs/host/ufs-qcom.c

684

clk_freq = clk_get_rate(clki->clk);

drivers/ufs/host/ufs-rockchip.h

74

struct clk *ref_out_clk;

drivers/ufs/host/ufshcd-pltfrm.c

234

clki->clk = devm_clk_get(hba->dev, clki->name);

drivers/ufs/host/ufshcd-pltfrm.c

235

if (IS_ERR(clki->clk))

drivers/usb/cdns3/cdns3-ti.c

59

struct clk *usb2_refclk;

drivers/usb/cdns3/cdns3-ti.c

60

struct clk *lpm_clk;

drivers/usb/chipidea/ci_hdrc_imx.c

110

struct clk *clk;

drivers/usb/chipidea/ci_hdrc_imx.c

111

struct clk *clk_wakeup;

drivers/usb/chipidea/ci_hdrc_imx.c

122

struct clk *clk_ipg;

drivers/usb/chipidea/ci_hdrc_imx.c

123

struct clk *clk_ahb;

drivers/usb/chipidea/ci_hdrc_imx.c

124

struct clk *clk_per;

drivers/usb/chipidea/ci_hdrc_imx.c

217

data->clk = devm_clk_get(dev, NULL);

drivers/usb/chipidea/ci_hdrc_imx.c

218

if (IS_ERR(data->clk)) {

drivers/usb/chipidea/ci_hdrc_imx.c

219

ret = PTR_ERR(data->clk);

drivers/usb/chipidea/ci_hdrc_imx.c

222

PTR_ERR(data->clk), PTR_ERR(data->clk_ipg));

drivers/usb/chipidea/ci_hdrc_imx.c

288

ret = clk_prepare_enable(data->clk);

drivers/usb/chipidea/ci_hdrc_imx.c

309

clk_disable_unprepare(data->clk);

drivers/usb/chipidea/ci_hdrc_msm.c

176

struct clk *clk;

drivers/usb/chipidea/ci_hdrc_msm.c

199

ci->core_clk = clk = devm_clk_get(&pdev->dev, "core");

drivers/usb/chipidea/ci_hdrc_msm.c

200

if (IS_ERR(clk))

drivers/usb/chipidea/ci_hdrc_msm.c

201

return PTR_ERR(clk);

drivers/usb/chipidea/ci_hdrc_msm.c

203

ci->iface_clk = clk = devm_clk_get(&pdev->dev, "iface");

drivers/usb/chipidea/ci_hdrc_msm.c

204

if (IS_ERR(clk))

drivers/usb/chipidea/ci_hdrc_msm.c

205

return PTR_ERR(clk);

drivers/usb/chipidea/ci_hdrc_msm.c

207

ci->fs_clk = clk = devm_clk_get_optional(&pdev->dev, "fs");

drivers/usb/chipidea/ci_hdrc_msm.c

208

if (IS_ERR(clk))

drivers/usb/chipidea/ci_hdrc_msm.c

209

return PTR_ERR(clk);

drivers/usb/chipidea/ci_hdrc_msm.c

38

struct clk *core_clk;

drivers/usb/chipidea/ci_hdrc_msm.c

39

struct clk *iface_clk;

drivers/usb/chipidea/ci_hdrc_msm.c

40

struct clk *fs_clk;

drivers/usb/chipidea/ci_hdrc_npcm.c

17

struct clk *core_clk;

drivers/usb/chipidea/ci_hdrc_tegra.c

298

usb->clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/chipidea/ci_hdrc_tegra.c

299

if (IS_ERR(usb->clk))

drivers/usb/chipidea/ci_hdrc_tegra.c

300

return dev_err_probe(&pdev->dev, PTR_ERR(usb->clk),

drivers/usb/chipidea/ci_hdrc_tegra.c

32

struct clk *clk;

drivers/usb/chipidea/ci_hdrc_tegra.c

380

err = clk_prepare_enable(usb->clk);

drivers/usb/chipidea/ci_hdrc_tegra.c

393

clk_disable_unprepare(usb->clk);

drivers/usb/chipidea/ci_hdrc_usb2.c

104

clk_disable_unprepare(priv->clk);

drivers/usb/chipidea/ci_hdrc_usb2.c

114

clk_disable_unprepare(priv->clk);

drivers/usb/chipidea/ci_hdrc_usb2.c

23

struct clk *clk;

drivers/usb/chipidea/ci_hdrc_usb2.c

73

priv->clk = devm_clk_get_optional(dev, NULL);

drivers/usb/chipidea/ci_hdrc_usb2.c

74

if (IS_ERR(priv->clk))

drivers/usb/chipidea/ci_hdrc_usb2.c

75

return PTR_ERR(priv->clk);

drivers/usb/chipidea/ci_hdrc_usb2.c

77

ret = clk_prepare_enable(priv->clk);

drivers/usb/dwc2/core.h

1088

struct clk *clk;

drivers/usb/dwc2/core.h

1089

struct clk *utmi_clk;

drivers/usb/dwc2/drd.c

113

if (!hsotg->ll_hw_enabled && hsotg->clk) {

drivers/usb/dwc2/drd.c

114

int ret = clk_prepare_enable(hsotg->clk);

drivers/usb/dwc2/drd.c

163

if (!hsotg->ll_hw_enabled && hsotg->clk)

drivers/usb/dwc2/drd.c

164

clk_disable_unprepare(hsotg->clk);

drivers/usb/dwc2/platform.c

110

if (hsotg->clk) {

drivers/usb/dwc2/platform.c

111

ret = clk_prepare_enable(hsotg->clk);

drivers/usb/dwc2/platform.c

135

if (hsotg->clk)

drivers/usb/dwc2/platform.c

136

clk_disable_unprepare(hsotg->clk);

drivers/usb/dwc2/platform.c

181

if (hsotg->clk)

drivers/usb/dwc2/platform.c

182

clk_disable_unprepare(hsotg->clk);

drivers/usb/dwc2/platform.c

272

hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");

drivers/usb/dwc2/platform.c

273

if (IS_ERR(hsotg->clk))

drivers/usb/dwc2/platform.c

274

return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->clk), "cannot get otg clock\n");

drivers/usb/dwc3/core.h

1214

struct clk *bus_clk;

drivers/usb/dwc3/core.h

1215

struct clk *ref_clk;

drivers/usb/dwc3/core.h

1216

struct clk *susp_clk;

drivers/usb/dwc3/core.h

1217

struct clk *utmi_clk;

drivers/usb/dwc3/core.h

1218

struct clk *pipe_clk;

drivers/usb/dwc3/dwc3-am62.c

117

struct clk *usb2_refclk;

drivers/usb/dwc3/dwc3-exynos.c

32

struct clk *clks[DWC3_EXYNOS_MAX_CLOCKS];

drivers/usb/dwc3/dwc3-imx8mp.c

57

struct clk *hsio_clk;

drivers/usb/dwc3/dwc3-imx8mp.c

58

struct clk *suspend_clk;

drivers/usb/dwc3/dwc3-qcom-legacy.c

671

sizeof(struct clk *), GFP_KERNEL);

drivers/usb/dwc3/dwc3-qcom-legacy.c

676

struct clk *clk;

drivers/usb/dwc3/dwc3-qcom-legacy.c

679

clk = of_clk_get(np, i);

drivers/usb/dwc3/dwc3-qcom-legacy.c

680

if (IS_ERR(clk)) {

drivers/usb/dwc3/dwc3-qcom-legacy.c

683

return PTR_ERR(clk);

drivers/usb/dwc3/dwc3-qcom-legacy.c

686

ret = clk_prepare_enable(clk);

drivers/usb/dwc3/dwc3-qcom-legacy.c

692

clk_put(clk);

drivers/usb/dwc3/dwc3-qcom-legacy.c

697

qcom->clks[i] = clk;

drivers/usb/dwc3/dwc3-qcom-legacy.c

77

struct clk **clks;

drivers/usb/fotg210/fotg210-hcd.h

187

struct clk *pclk;

drivers/usb/fotg210/fotg210.h

15

struct clk *pclk;

drivers/usb/gadget/udc/aspeed-vhub/core.c

281

if (vhub->clk)

drivers/usb/gadget/udc/aspeed-vhub/core.c

282

clk_disable_unprepare(vhub->clk);

drivers/usb/gadget/udc/aspeed-vhub/core.c

344

vhub->clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/gadget/udc/aspeed-vhub/core.c

345

if (IS_ERR(vhub->clk)) {

drivers/usb/gadget/udc/aspeed-vhub/core.c

346

rc = PTR_ERR(vhub->clk);

drivers/usb/gadget/udc/aspeed-vhub/core.c

349

rc = clk_prepare_enable(vhub->clk);

drivers/usb/gadget/udc/aspeed-vhub/vhub.h

390

struct clk *clk;

drivers/usb/gadget/udc/aspeed_udc.c

1462

clk_disable_unprepare(udc->clk);

drivers/usb/gadget/udc/aspeed_udc.c

1503

udc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/gadget/udc/aspeed_udc.c

1504

if (IS_ERR(udc->clk)) {

drivers/usb/gadget/udc/aspeed_udc.c

1505

rc = PTR_ERR(udc->clk);

drivers/usb/gadget/udc/aspeed_udc.c

1508

rc = clk_prepare_enable(udc->clk);

drivers/usb/gadget/udc/aspeed_udc.c

206

struct clk *clk;

drivers/usb/gadget/udc/at91_udc.h

136

struct clk *iclk, *fclk;

drivers/usb/gadget/udc/atmel_usba_udc.c

2275

struct clk *pclk, *hclk;

drivers/usb/gadget/udc/atmel_usba_udc.h

341

struct clk *pclk;

drivers/usb/gadget/udc/atmel_usba_udc.h

342

struct clk *hclk;

drivers/usb/gadget/udc/bcm63xx_udc.c

297

struct clk *usbd_clk;

drivers/usb/gadget/udc/bcm63xx_udc.c

298

struct clk *usbh_clk;

drivers/usb/gadget/udc/bdc/bdc.h

455

struct clk *clk;

drivers/usb/gadget/udc/bdc/bdc_core.c

534

bdc->clk = devm_clk_get_optional(dev, "sw_usbd");

drivers/usb/gadget/udc/bdc/bdc_core.c

535

if (IS_ERR(bdc->clk))

drivers/usb/gadget/udc/bdc/bdc_core.c

536

return PTR_ERR(bdc->clk);

drivers/usb/gadget/udc/bdc/bdc_core.c

538

ret = clk_prepare_enable(bdc->clk);

drivers/usb/gadget/udc/bdc/bdc_core.c

581

clk_disable_unprepare(bdc->clk);

drivers/usb/gadget/udc/bdc/bdc_core.c

594

clk_disable_unprepare(bdc->clk);

drivers/usb/gadget/udc/bdc/bdc_core.c

606

clk_disable_unprepare(bdc->clk);

drivers/usb/gadget/udc/bdc/bdc_core.c

616

ret = clk_prepare_enable(bdc->clk);

drivers/usb/gadget/udc/bdc/bdc_core.c

624

clk_disable_unprepare(bdc->clk);

drivers/usb/gadget/udc/lpc32xx_udc.c

137

struct clk *usb_slv_clk;

drivers/usb/gadget/udc/m66592-udc.c

1526

clk_disable(m66592->clk);

drivers/usb/gadget/udc/m66592-udc.c

1527

clk_put(m66592->clk);

drivers/usb/gadget/udc/m66592-udc.c

1602

m66592->clk = clk_get(&pdev->dev, clk_name);

drivers/usb/gadget/udc/m66592-udc.c

1603

if (IS_ERR(m66592->clk)) {

drivers/usb/gadget/udc/m66592-udc.c

1606

ret = PTR_ERR(m66592->clk);

drivers/usb/gadget/udc/m66592-udc.c

1609

clk_enable(m66592->clk);

drivers/usb/gadget/udc/m66592-udc.c

1671

clk_disable(m66592->clk);

drivers/usb/gadget/udc/m66592-udc.c

1672

clk_put(m66592->clk);

drivers/usb/gadget/udc/m66592-udc.h

465

struct clk *clk;

drivers/usb/gadget/udc/omap_udc.c

2751

struct clk *dc_clk = NULL;

drivers/usb/gadget/udc/omap_udc.c

2752

struct clk *hhc_clk = NULL;

drivers/usb/gadget/udc/omap_udc.h

177

struct clk *dc_clk;

drivers/usb/gadget/udc/omap_udc.h

178

struct clk *hhc_clk;

drivers/usb/gadget/udc/pxa25x_udc.c

1153

clk_enable(udc->clk);

drivers/usb/gadget/udc/pxa25x_udc.c

1166

clk_disable(udc->clk);

drivers/usb/gadget/udc/pxa25x_udc.c

2335

dev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/gadget/udc/pxa25x_udc.c

2336

if (IS_ERR(dev->clk))

drivers/usb/gadget/udc/pxa25x_udc.c

2337

return PTR_ERR(dev->clk);

drivers/usb/gadget/udc/pxa25x_udc.c

237

#define clk_enable(clk) do { } while (0)

drivers/usb/gadget/udc/pxa25x_udc.c

238

#define clk_disable(clk) do { } while (0)

drivers/usb/gadget/udc/pxa25x_udc.c

239

#define clk_put(clk) do { } while (0)

drivers/usb/gadget/udc/pxa25x_udc.h

114

struct clk *clk;

drivers/usb/gadget/udc/pxa27x_udc.c

1645

clk_disable(udc->clk);

drivers/usb/gadget/udc/pxa27x_udc.c

1699

clk_enable(udc->clk);

drivers/usb/gadget/udc/pxa27x_udc.c

2403

udc->clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/gadget/udc/pxa27x_udc.c

2404

if (IS_ERR(udc->clk))

drivers/usb/gadget/udc/pxa27x_udc.c

2405

return PTR_ERR(udc->clk);

drivers/usb/gadget/udc/pxa27x_udc.c

2407

retval = clk_prepare(udc->clk);

drivers/usb/gadget/udc/pxa27x_udc.c

2441

clk_unprepare(udc->clk);

drivers/usb/gadget/udc/pxa27x_udc.c

2463

clk_unprepare(udc->clk);

drivers/usb/gadget/udc/pxa27x_udc.h

450

struct clk *clk;

drivers/usb/gadget/udc/r8a66597-udc.c

1817

clk_disable_unprepare(r8a66597->clk);

drivers/usb/gadget/udc/r8a66597-udc.c

1879

r8a66597->clk = devm_clk_get(dev, clk_name);

drivers/usb/gadget/udc/r8a66597-udc.c

1880

if (IS_ERR(r8a66597->clk)) {

drivers/usb/gadget/udc/r8a66597-udc.c

1882

return PTR_ERR(r8a66597->clk);

drivers/usb/gadget/udc/r8a66597-udc.c

1884

clk_prepare_enable(r8a66597->clk);

drivers/usb/gadget/udc/r8a66597-udc.c

1957

clk_disable_unprepare(r8a66597->clk);

drivers/usb/gadget/udc/r8a66597-udc.h

89

struct clk *clk;

drivers/usb/gadget/udc/udc-xilinx.c

191

struct clk *clk;

drivers/usb/gadget/udc/udc-xilinx.c

2110

udc->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");

drivers/usb/gadget/udc/udc-xilinx.c

2111

if (IS_ERR(udc->clk)) {

drivers/usb/gadget/udc/udc-xilinx.c

2112

if (PTR_ERR(udc->clk) != -ENOENT) {

drivers/usb/gadget/udc/udc-xilinx.c

2113

ret = PTR_ERR(udc->clk);

drivers/usb/gadget/udc/udc-xilinx.c

2122

udc->clk = NULL;

drivers/usb/gadget/udc/udc-xilinx.c

2125

ret = clk_prepare_enable(udc->clk);

drivers/usb/gadget/udc/udc-xilinx.c

2172

clk_disable_unprepare(udc->clk);

drivers/usb/gadget/udc/udc-xilinx.c

2187

clk_disable_unprepare(udc->clk);

drivers/usb/gadget/udc/udc-xilinx.c

2210

clk_disable(udc->clk);

drivers/usb/gadget/udc/udc-xilinx.c

2224

ret = clk_enable(udc->clk);

drivers/usb/host/ehci-atmel.c

36

struct clk *iclk;

drivers/usb/host/ehci-atmel.c

37

struct clk *uclk;

drivers/usb/host/ehci-brcm.c

157

priv->clk = devm_clk_get_optional(dev, NULL);

drivers/usb/host/ehci-brcm.c

158

if (IS_ERR(priv->clk)) {

drivers/usb/host/ehci-brcm.c

159

err = PTR_ERR(priv->clk);

drivers/usb/host/ehci-brcm.c

163

err = clk_prepare_enable(priv->clk);

drivers/usb/host/ehci-brcm.c

184

clk_disable_unprepare(priv->clk);

drivers/usb/host/ehci-brcm.c

197

clk_disable_unprepare(priv->clk);

drivers/usb/host/ehci-brcm.c

20

struct clk *clk;

drivers/usb/host/ehci-brcm.c

211

clk_disable_unprepare(priv->clk);

drivers/usb/host/ehci-brcm.c

222

err = clk_prepare_enable(priv->clk);

drivers/usb/host/ehci-exynos.c

159

exynos_ehci->clk = devm_clk_get_enabled(&pdev->dev, "usbhost");

drivers/usb/host/ehci-exynos.c

161

if (IS_ERR(exynos_ehci->clk)) {

drivers/usb/host/ehci-exynos.c

163

err = PTR_ERR(exynos_ehci->clk);

drivers/usb/host/ehci-exynos.c

249

clk_disable_unprepare(exynos_ehci->clk);

drivers/usb/host/ehci-exynos.c

260

ret = clk_prepare_enable(exynos_ehci->clk);

drivers/usb/host/ehci-exynos.c

267

clk_disable_unprepare(exynos_ehci->clk);

drivers/usb/host/ehci-exynos.c

40

struct clk *clk;

drivers/usb/host/ehci-mv.c

138

ehci_mv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/host/ehci-mv.c

139

if (IS_ERR(ehci_mv->clk)) {

drivers/usb/host/ehci-mv.c

141

retval = PTR_ERR(ehci_mv->clk);

drivers/usb/host/ehci-mv.c

38

struct clk *clk;

drivers/usb/host/ehci-mv.c

49

retval = clk_prepare_enable(ehci_mv->clk);

drivers/usb/host/ehci-mv.c

55

clk_disable_unprepare(ehci_mv->clk);

drivers/usb/host/ehci-mv.c

63

clk_disable_unprepare(ehci_mv->clk);

drivers/usb/host/ehci-orion.c

272

priv->clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/host/ehci-orion.c

273

if (!IS_ERR(priv->clk)) {

drivers/usb/host/ehci-orion.c

274

err = clk_prepare_enable(priv->clk);

drivers/usb/host/ehci-orion.c

321

if (!IS_ERR(priv->clk))

drivers/usb/host/ehci-orion.c

322

clk_disable_unprepare(priv->clk);

drivers/usb/host/ehci-orion.c

339

if (!IS_ERR(priv->clk))

drivers/usb/host/ehci-orion.c

340

clk_disable_unprepare(priv->clk);

drivers/usb/host/ehci-orion.c

62

struct clk *clk;

drivers/usb/host/ehci-platform.c

102

while (--clk >= 0)

drivers/usb/host/ehci-platform.c

103

clk_disable_unprepare(priv->clks[clk]);

drivers/usb/host/ehci-platform.c

112

int clk;

drivers/usb/host/ehci-platform.c

114

for (clk = EHCI_MAX_CLKS - 1; clk >= 0; clk--)

drivers/usb/host/ehci-platform.c

115

clk_disable_unprepare(priv->clks[clk]);

drivers/usb/host/ehci-platform.c

245

int err, irq, clk = 0;

drivers/usb/host/ehci-platform.c

316

for (clk = 0; clk < EHCI_MAX_CLKS; clk++) {

drivers/usb/host/ehci-platform.c

317

priv->clks[clk] = of_clk_get(dev->dev.of_node, clk);

drivers/usb/host/ehci-platform.c

318

if (IS_ERR(priv->clks[clk])) {

drivers/usb/host/ehci-platform.c

319

err = PTR_ERR(priv->clks[clk]);

drivers/usb/host/ehci-platform.c

322

priv->clks[clk] = NULL;

drivers/usb/host/ehci-platform.c

401

while (--clk >= 0)

drivers/usb/host/ehci-platform.c

402

clk_put(priv->clks[clk]);

drivers/usb/host/ehci-platform.c

417

int clk;

drivers/usb/host/ehci-platform.c

429

for (clk = 0; clk < EHCI_MAX_CLKS && priv->clks[clk]; clk++)

drivers/usb/host/ehci-platform.c

430

clk_put(priv->clks[clk]);

drivers/usb/host/ehci-platform.c

49

struct clk *clks[EHCI_MAX_CLKS];

drivers/usb/host/ehci-platform.c

91

int clk, ret;

drivers/usb/host/ehci-platform.c

93

for (clk = 0; clk < EHCI_MAX_CLKS && priv->clks[clk]; clk++) {

drivers/usb/host/ehci-platform.c

94

ret = clk_prepare_enable(priv->clks[clk]);

drivers/usb/host/ehci-sh.c

13

struct clk *iclk, *fclk;

drivers/usb/host/ehci-spear.c

103

sehci->clk = usbh_clk;

drivers/usb/host/ehci-spear.c

108

retval = clk_prepare_enable(sehci->clk);

drivers/usb/host/ehci-spear.c

119

clk_disable_unprepare(sehci->clk);

drivers/usb/host/ehci-spear.c

135

clk_disable_unprepare(sehci->clk);

drivers/usb/host/ehci-spear.c

28

struct clk *clk;

drivers/usb/host/ehci-spear.c

59

struct clk *usbh_clk;

drivers/usb/host/ehci-st.c

104

while (--clk >= 0)

drivers/usb/host/ehci-st.c

105

clk_disable_unprepare(priv->clks[clk]);

drivers/usb/host/ehci-st.c

118

int clk;

drivers/usb/host/ehci-st.c

128

for (clk = USB_MAX_CLKS - 1; clk >= 0; clk--)

drivers/usb/host/ehci-st.c

129

if (priv->clks[clk])

drivers/usb/host/ehci-st.c

130

clk_disable_unprepare(priv->clks[clk]);

drivers/usb/host/ehci-st.c

153

int err, irq, clk = 0;

drivers/usb/host/ehci-st.c

177

for (clk = 0; clk < USB_MAX_CLKS; clk++) {

drivers/usb/host/ehci-st.c

178

priv->clks[clk] = of_clk_get(dev->dev.of_node, clk);

drivers/usb/host/ehci-st.c

179

if (IS_ERR(priv->clks[clk])) {

drivers/usb/host/ehci-st.c

180

err = PTR_ERR(priv->clks[clk]);

drivers/usb/host/ehci-st.c

183

priv->clks[clk] = NULL;

drivers/usb/host/ehci-st.c

238

while (--clk >= 0)

drivers/usb/host/ehci-st.c

239

clk_put(priv->clks[clk]);

drivers/usb/host/ehci-st.c

254

int clk;

drivers/usb/host/ehci-st.c

261

for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++)

drivers/usb/host/ehci-st.c

262

clk_put(priv->clks[clk]);

drivers/usb/host/ehci-st.c

33

struct clk *clks[USB_MAX_CLKS];

drivers/usb/host/ehci-st.c

34

struct clk *clk48;

drivers/usb/host/ehci-st.c

67

int clk, ret;

drivers/usb/host/ehci-st.c

85

for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++) {

drivers/usb/host/ehci-st.c

86

ret = clk_prepare_enable(priv->clks[clk]);

drivers/usb/host/fsl-mph-dr-of.c

294

struct clk *clk;

drivers/usb/host/fsl-mph-dr-of.c

297

clk = devm_clk_get(pdev->dev.parent, "ipg");

drivers/usb/host/fsl-mph-dr-of.c

298

if (IS_ERR(clk)) {

drivers/usb/host/fsl-mph-dr-of.c

300

return PTR_ERR(clk);

drivers/usb/host/fsl-mph-dr-of.c

302

err = clk_prepare_enable(clk);

drivers/usb/host/fsl-mph-dr-of.c

307

pdata->clk = clk;

drivers/usb/host/fsl-mph-dr-of.c

330

clk_disable_unprepare(pdata->clk);

drivers/usb/host/ohci-at91.c

53

struct clk *iclk;

drivers/usb/host/ohci-at91.c

54

struct clk *fclk;

drivers/usb/host/ohci-at91.c

55

struct clk *hclk;

drivers/usb/host/ohci-da8xx.c

39

struct clk *usb11_clk;

drivers/usb/host/ohci-exynos.c

135

exynos_ohci->clk = devm_clk_get_enabled(&pdev->dev, "usbhost");

drivers/usb/host/ohci-exynos.c

137

if (IS_ERR(exynos_ohci->clk)) {

drivers/usb/host/ohci-exynos.c

139

err = PTR_ERR(exynos_ohci->clk);

drivers/usb/host/ohci-exynos.c

223

clk_disable_unprepare(exynos_ohci->clk);

drivers/usb/host/ohci-exynos.c

234

clk_prepare_enable(exynos_ohci->clk);

drivers/usb/host/ohci-exynos.c

239

clk_disable_unprepare(exynos_ohci->clk);

drivers/usb/host/ohci-exynos.c

31

struct clk *clk;

drivers/usb/host/ohci-nxp.c

156

struct clk *usb_host_clk;

drivers/usb/host/ohci-omap.c

45

struct clk *usb_host_ck;

drivers/usb/host/ohci-omap.c

46

struct clk *usb_dc_ck;

drivers/usb/host/ohci-platform.c

145

for (clk = 0; clk < OHCI_MAX_CLKS; clk++) {

drivers/usb/host/ohci-platform.c

146

priv->clks[clk] = of_clk_get(dev->dev.of_node, clk);

drivers/usb/host/ohci-platform.c

147

if (IS_ERR(priv->clks[clk])) {

drivers/usb/host/ohci-platform.c

148

err = PTR_ERR(priv->clks[clk]);

drivers/usb/host/ohci-platform.c

151

priv->clks[clk] = NULL;

drivers/usb/host/ohci-platform.c

229

while (--clk >= 0)

drivers/usb/host/ohci-platform.c

230

clk_put(priv->clks[clk]);

drivers/usb/host/ohci-platform.c

245

int clk;

drivers/usb/host/ohci-platform.c

255

for (clk = 0; clk < OHCI_MAX_CLKS && priv->clks[clk]; clk++)

drivers/usb/host/ohci-platform.c

256

clk_put(priv->clks[clk]);

drivers/usb/host/ohci-platform.c

40

struct clk *clks[OHCI_MAX_CLKS];

drivers/usb/host/ohci-platform.c

48

int clk, ret;

drivers/usb/host/ohci-platform.c

50

for (clk = 0; clk < OHCI_MAX_CLKS && priv->clks[clk]; clk++) {

drivers/usb/host/ohci-platform.c

51

ret = clk_prepare_enable(priv->clks[clk]);

drivers/usb/host/ohci-platform.c

59

while (--clk >= 0)

drivers/usb/host/ohci-platform.c

60

clk_disable_unprepare(priv->clks[clk]);

drivers/usb/host/ohci-platform.c

69

int clk;

drivers/usb/host/ohci-platform.c

71

for (clk = OHCI_MAX_CLKS - 1; clk >= 0; clk--)

drivers/usb/host/ohci-platform.c

72

clk_disable_unprepare(priv->clks[clk]);

drivers/usb/host/ohci-platform.c

95

int err, irq, clk = 0;

drivers/usb/host/ohci-pxa27x.c

119

struct clk *clk;

drivers/usb/host/ohci-pxa27x.c

274

retval = clk_prepare_enable(pxa_ohci->clk);

drivers/usb/host/ohci-pxa27x.c

292

clk_disable_unprepare(pxa_ohci->clk);

drivers/usb/host/ohci-pxa27x.c

322

clk_disable_unprepare(pxa_ohci->clk);

drivers/usb/host/ohci-pxa27x.c

411

struct clk *usb_clk;

drivers/usb/host/ohci-pxa27x.c

447

pxa_ohci->clk = usb_clk;

drivers/usb/host/ohci-s3c2410.c

374

clk = devm_clk_get(&dev->dev, "usb-host");

drivers/usb/host/ohci-s3c2410.c

375

if (IS_ERR(clk)) {

drivers/usb/host/ohci-s3c2410.c

377

retval = PTR_ERR(clk);

drivers/usb/host/ohci-s3c2410.c

42

static struct clk *clk;

drivers/usb/host/ohci-s3c2410.c

43

static struct clk *usb_clk;

drivers/usb/host/ohci-s3c2410.c

67

clk_prepare_enable(clk);

drivers/usb/host/ohci-s3c2410.c

92

clk_disable_unprepare(clk);

drivers/usb/host/ohci-spear.c

106

clk_disable_unprepare(sohci_p->clk);

drivers/usb/host/ohci-spear.c

129

clk_disable_unprepare(sohci_p->clk);

drivers/usb/host/ohci-spear.c

144

clk_prepare_enable(sohci_p->clk);

drivers/usb/host/ohci-spear.c

27

struct clk *clk;

drivers/usb/host/ohci-spear.c

38

struct clk *usbh_clk;

drivers/usb/host/ohci-spear.c

81

sohci_p->clk = usbh_clk;

drivers/usb/host/ohci-spear.c

83

clk_prepare_enable(sohci_p->clk);

drivers/usb/host/ohci-spear.c

91

clk_disable_unprepare(sohci_p->clk);

drivers/usb/host/ohci-st.c

109

for (clk = USB_MAX_CLKS - 1; clk >= 0; clk--)

drivers/usb/host/ohci-st.c

110

if (priv->clks[clk])

drivers/usb/host/ohci-st.c

111

clk_disable_unprepare(priv->clks[clk]);

drivers/usb/host/ohci-st.c

133

int err, irq, clk = 0;

drivers/usb/host/ohci-st.c

157

for (clk = 0; clk < USB_MAX_CLKS; clk++) {

drivers/usb/host/ohci-st.c

158

priv->clks[clk] = of_clk_get(dev->dev.of_node, clk);

drivers/usb/host/ohci-st.c

159

if (IS_ERR(priv->clks[clk])) {

drivers/usb/host/ohci-st.c

160

err = PTR_ERR(priv->clks[clk]);

drivers/usb/host/ohci-st.c

163

priv->clks[clk] = NULL;

drivers/usb/host/ohci-st.c

219

while (--clk >= 0)

drivers/usb/host/ohci-st.c

220

clk_put(priv->clks[clk]);

drivers/usb/host/ohci-st.c

235

int clk;

drivers/usb/host/ohci-st.c

243

for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++)

drivers/usb/host/ohci-st.c

244

clk_put(priv->clks[clk]);

drivers/usb/host/ohci-st.c

31

struct clk *clks[USB_MAX_CLKS];

drivers/usb/host/ohci-st.c

32

struct clk *clk48;

drivers/usb/host/ohci-st.c

47

int clk, ret;

drivers/usb/host/ohci-st.c

65

for (clk = 0; clk < USB_MAX_CLKS && priv->clks[clk]; clk++) {

drivers/usb/host/ohci-st.c

66

ret = clk_prepare_enable(priv->clks[clk]);

drivers/usb/host/ohci-st.c

84

while (--clk >= 0)

drivers/usb/host/ohci-st.c

85

clk_disable_unprepare(priv->clks[clk]);

drivers/usb/host/ohci-st.c

99

int clk;

drivers/usb/host/r8a66597-hcd.c

128

clk_disable_unprepare(r8a66597->clk);

drivers/usb/host/r8a66597-hcd.c

2391

clk_put(r8a66597->clk);

drivers/usb/host/r8a66597-hcd.c

2456

r8a66597->clk = clk_get(&pdev->dev, clk_name);

drivers/usb/host/r8a66597-hcd.c

2457

if (IS_ERR(r8a66597->clk)) {

drivers/usb/host/r8a66597-hcd.c

2460

ret = PTR_ERR(r8a66597->clk);

drivers/usb/host/r8a66597-hcd.c

2500

clk_put(r8a66597->clk);

drivers/usb/host/r8a66597-hcd.c

84

clk_prepare_enable(r8a66597->clk);

drivers/usb/host/r8a66597.h

108

struct clk *clk;

drivers/usb/host/uhci-hcd.h

447

struct clk *clk; /* (optional) clock source */

drivers/usb/host/uhci-platform.c

131

uhci->clk = devm_clk_get_optional(&pdev->dev, NULL);

drivers/usb/host/uhci-platform.c

132

if (IS_ERR(uhci->clk)) {

drivers/usb/host/uhci-platform.c

133

ret = PTR_ERR(uhci->clk);

drivers/usb/host/uhci-platform.c

136

ret = clk_prepare_enable(uhci->clk);

drivers/usb/host/uhci-platform.c

165

clk_disable_unprepare(uhci->clk);

drivers/usb/host/uhci-platform.c

178

clk_disable_unprepare(uhci->clk);

drivers/usb/host/xhci-histb.c

37

struct clk *bus_clk;

drivers/usb/host/xhci-histb.c

38

struct clk *utmi_clk;

drivers/usb/host/xhci-histb.c

39

struct clk *pipe_clk;

drivers/usb/host/xhci-histb.c

40

struct clk *suspend_clk;

drivers/usb/host/xhci-plat.c

219

xhci->clk = devm_clk_get_optional(&pdev->dev, NULL);

drivers/usb/host/xhci-plat.c

220

if (IS_ERR(xhci->clk)) {

drivers/usb/host/xhci-plat.c

221

ret = PTR_ERR(xhci->clk);

drivers/usb/host/xhci-plat.c

239

ret = clk_prepare_enable(xhci->clk);

drivers/usb/host/xhci-plat.c

377

clk_disable_unprepare(xhci->clk);

drivers/usb/host/xhci-plat.c

439

struct clk *clk = xhci->clk;

drivers/usb/host/xhci-plat.c

440

struct clk *reg_clk = xhci->reg_clk;

drivers/usb/host/xhci-plat.c

458

clk_disable_unprepare(clk);

drivers/usb/host/xhci-plat.c

490

clk_disable_unprepare(xhci->clk);

drivers/usb/host/xhci-plat.c

524

ret = clk_prepare_enable(xhci->clk);

drivers/usb/host/xhci-plat.c

530

clk_disable_unprepare(xhci->clk);

drivers/usb/host/xhci-plat.c

555

clk_disable_unprepare(xhci->clk);

drivers/usb/host/xhci-tegra.c

282

struct clk *host_clk;

drivers/usb/host/xhci-tegra.c

283

struct clk *falcon_clk;

drivers/usb/host/xhci-tegra.c

284

struct clk *ss_clk;

drivers/usb/host/xhci-tegra.c

285

struct clk *ss_src_clk;

drivers/usb/host/xhci-tegra.c

286

struct clk *hs_src_clk;

drivers/usb/host/xhci-tegra.c

287

struct clk *fs_src_clk;

drivers/usb/host/xhci-tegra.c

288

struct clk *pll_u_480m;

drivers/usb/host/xhci-tegra.c

289

struct clk *clk_m;

drivers/usb/host/xhci-tegra.c

290

struct clk *pll_e;

drivers/usb/host/xhci-tegra.c

417

struct clk *clk = tegra->ss_src_clk;

drivers/usb/host/xhci-tegra.c

421

if (clk_get_rate(clk) == rate)

drivers/usb/host/xhci-tegra.c

430

old_parent_rate = clk_get_rate(clk_get_parent(clk));

drivers/usb/host/xhci-tegra.c

434

err = clk_set_rate(clk, old_parent_rate / div);

drivers/usb/host/xhci-tegra.c

438

err = clk_set_parent(clk, tegra->pll_u_480m);

drivers/usb/host/xhci-tegra.c

446

err = clk_set_rate(clk, rate);

drivers/usb/host/xhci-tegra.c

454

err = clk_set_parent(clk, tegra->clk_m);

drivers/usb/host/xhci-tegra.c

458

err = clk_set_rate(clk, rate);

drivers/usb/host/xhci-tegra.c

469

if (clk_get_rate(clk) != rate) {

drivers/usb/host/xhci.h

1529

struct clk *clk;

drivers/usb/host/xhci.h

1530

struct clk *reg_clk;

drivers/usb/misc/onboard_usb_dev.c

121

clk_disable_unprepare(onboard_dev->clk);

drivers/usb/misc/onboard_usb_dev.c

139

clk_disable_unprepare(onboard_dev->clk);

drivers/usb/misc/onboard_usb_dev.c

452

onboard_dev->clk = devm_clk_get_optional(dev, NULL);

drivers/usb/misc/onboard_usb_dev.c

453

if (IS_ERR(onboard_dev->clk))

drivers/usb/misc/onboard_usb_dev.c

454

return dev_err_probe(dev, PTR_ERR(onboard_dev->clk),

drivers/usb/misc/onboard_usb_dev.c

67

struct clk *clk;

drivers/usb/misc/onboard_usb_dev.c

97

err = clk_prepare_enable(onboard_dev->clk);

drivers/usb/misc/usb3503.c

203

hub->clk = devm_clk_get_optional(dev, "refclk");

drivers/usb/misc/usb3503.c

204

if (IS_ERR(hub->clk)) {

drivers/usb/misc/usb3503.c

206

PTR_ERR(hub->clk));

drivers/usb/misc/usb3503.c

207

return PTR_ERR(hub->clk);

drivers/usb/misc/usb3503.c

211

err = clk_set_rate(hub->clk, rate);

drivers/usb/misc/usb3503.c

220

err = clk_prepare_enable(hub->clk);

drivers/usb/misc/usb3503.c

292

clk_disable_unprepare(hub->clk);

drivers/usb/misc/usb3503.c

322

clk_disable_unprepare(hub->clk);

drivers/usb/misc/usb3503.c

343

clk_disable_unprepare(hub->clk);

drivers/usb/misc/usb3503.c

349

clk_disable_unprepare(hub->clk);

drivers/usb/misc/usb3503.c

356

clk_prepare_enable(hub->clk);

drivers/usb/misc/usb3503.c

47

struct clk *clk;

drivers/usb/musb/da8xx.c

366

ret = clk_prepare_enable(glue->clk);

drivers/usb/musb/da8xx.c

415

clk_disable_unprepare(glue->clk);

drivers/usb/musb/da8xx.c

427

clk_disable_unprepare(glue->clk);

drivers/usb/musb/da8xx.c

520

struct clk *clk;

drivers/usb/musb/da8xx.c

528

clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/musb/da8xx.c

529

if (IS_ERR(clk)) {

drivers/usb/musb/da8xx.c

531

return PTR_ERR(clk);

drivers/usb/musb/da8xx.c

540

glue->clk = clk;

drivers/usb/musb/da8xx.c

607

clk_disable_unprepare(glue->clk);

drivers/usb/musb/da8xx.c

617

ret = clk_prepare_enable(glue->clk);

drivers/usb/musb/da8xx.c

72

struct clk *clk;

drivers/usb/musb/jz4740.c

24

struct clk *clk;

drivers/usb/musb/jz4740.c

241

struct clk *clk;

drivers/usb/musb/jz4740.c

260

clk = devm_clk_get(dev, "udc");

drivers/usb/musb/jz4740.c

261

if (IS_ERR(clk)) {

drivers/usb/musb/jz4740.c

263

ret = PTR_ERR(clk);

drivers/usb/musb/jz4740.c

267

ret = clk_prepare_enable(clk);

drivers/usb/musb/jz4740.c

279

glue->clk = clk;

drivers/usb/musb/jz4740.c

305

clk_disable_unprepare(clk);

drivers/usb/musb/jz4740.c

316

clk_disable_unprepare(glue->clk);

drivers/usb/musb/mpfs.c

262

struct clk *clk;

drivers/usb/musb/mpfs.c

275

clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/musb/mpfs.c

276

if (IS_ERR(clk)) {

drivers/usb/musb/mpfs.c

278

ret = PTR_ERR(clk);

drivers/usb/musb/mpfs.c

282

ret = clk_prepare_enable(clk);

drivers/usb/musb/mpfs.c

29

struct clk *clk;

drivers/usb/musb/mpfs.c

295

glue->clk = clk;

drivers/usb/musb/mpfs.c

346

clk_disable_unprepare(clk);

drivers/usb/musb/mpfs.c

358

clk_disable_unprepare(glue->clk);

drivers/usb/musb/sunxi.c

237

ret = clk_prepare_enable(glue->clk);

drivers/usb/musb/sunxi.c

270

clk_disable_unprepare(glue->clk);

drivers/usb/musb/sunxi.c

292

clk_disable_unprepare(glue->clk);

drivers/usb/musb/sunxi.c

740

glue->clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/musb/sunxi.c

741

if (IS_ERR(glue->clk)) {

drivers/usb/musb/sunxi.c

743

PTR_ERR(glue->clk));

drivers/usb/musb/sunxi.c

744

return PTR_ERR(glue->clk);

drivers/usb/musb/sunxi.c

84

struct clk *clk;

drivers/usb/musb/ux500.c

223

struct clk *clk;

drivers/usb/musb/ux500.c

249

clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/musb/ux500.c

250

if (IS_ERR(clk)) {

drivers/usb/musb/ux500.c

252

ret = PTR_ERR(clk);

drivers/usb/musb/ux500.c

256

ret = clk_prepare_enable(clk);

drivers/usb/musb/ux500.c

269

glue->clk = clk;

drivers/usb/musb/ux500.c

297

clk_disable_unprepare(clk);

drivers/usb/musb/ux500.c

30

struct clk *clk;

drivers/usb/musb/ux500.c

311

clk_disable_unprepare(glue->clk);

drivers/usb/musb/ux500.c

323

clk_disable_unprepare(glue->clk);

drivers/usb/musb/ux500.c

334

ret = clk_prepare_enable(glue->clk);

drivers/usb/phy/phy-ab8500-usb.c

133

struct clk *sysclk;

drivers/usb/phy/phy-generic.c

138

ret = clk_prepare_enable(nop->clk);

drivers/usb/phy/phy-generic.c

154

clk_disable_unprepare(nop->clk);

drivers/usb/phy/phy-generic.c

224

nop->clk = devm_clk_get_optional(dev, "main_clk");

drivers/usb/phy/phy-generic.c

225

if (IS_ERR(nop->clk))

drivers/usb/phy/phy-generic.c

226

return dev_err_probe(dev, PTR_ERR(nop->clk),

drivers/usb/phy/phy-generic.c

230

err = clk_set_rate(nop->clk, clk_rate);

drivers/usb/phy/phy-generic.c

52

clk_disable_unprepare(nop->clk);

drivers/usb/phy/phy-generic.c

58

clk_prepare_enable(nop->clk);

drivers/usb/phy/phy-generic.h

12

struct clk *clk;

drivers/usb/phy/phy-mv-usb.h

157

struct clk *clk;

drivers/usb/phy/phy-mxs-usb.c

226

struct clk *clk;

drivers/usb/phy/phy-mxs-usb.c

465

ret = clk_prepare_enable(mxs_phy->clk);

drivers/usb/phy/phy-mxs-usb.c

496

clk_disable_unprepare(mxs_phy->clk);

drivers/usb/phy/phy-mxs-usb.c

554

clk_disable_unprepare(mxs_phy->clk);

drivers/usb/phy/phy-mxs-usb.c

560

ret = clk_prepare_enable(mxs_phy->clk);

drivers/usb/phy/phy-mxs-usb.c

761

struct clk *clk;

drivers/usb/phy/phy-mxs-usb.c

771

clk = devm_clk_get(&pdev->dev, NULL);

drivers/usb/phy/phy-mxs-usb.c

772

if (IS_ERR(clk))

drivers/usb/phy/phy-mxs-usb.c

773

return dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/usb/phy/phy-mxs-usb.c

850

mxs_phy->clk = clk;

drivers/usb/phy/phy-tahvo.c

50

struct clk *ick;

drivers/usb/phy/phy-tegra-usb.c

1583

tegra_phy->clk = devm_clk_get(&pdev->dev, "ulpi-link");

drivers/usb/phy/phy-tegra-usb.c

1584

err = PTR_ERR_OR_ZERO(tegra_phy->clk);

drivers/usb/phy/phy-tegra-usb.c

789

err = clk_prepare_enable(phy->clk);

drivers/usb/phy/phy-tegra-usb.c

850

clk_disable_unprepare(phy->clk);

drivers/usb/phy/phy-tegra-usb.c

859

clk_disable_unprepare(phy->clk);

drivers/usb/renesas_usbhs/common.h

283

struct clk *clks[2];

drivers/usb/serial/iuu_phoenix.c

1003

priv->clk = IUU_CLK_6000000;

drivers/usb/serial/iuu_phoenix.c

1011

priv->clk = IUU_CLK_3579000;

drivers/usb/serial/iuu_phoenix.c

62

u32 clk;

drivers/usb/serial/iuu_phoenix.c

995

priv->clk = IUU_CLK_3680000;

drivers/usb/serial/keyspan.c

1924

clk, /* clock with 13/8 prescaler */

drivers/usb/serial/keyspan.c

1949

clk = (baudclk * 8) / (u32) i;

drivers/usb/serial/keyspan.c

1951

div = clk / b16;

drivers/usb/serial/keyspan.c

1955

res = clk / div;

drivers/usb/serial/keyspan.c

1967

clk = (baudclk * 8) / (u32) best_prescaler;

drivers/usb/serial/keyspan.c

1968

div = clk / b16;

drivers/usb/typec/mux/ps883x.c

50

struct clk *xo_clk;

drivers/video/fbdev/atmel_lcdfb.c

48

struct clk *bus_clk;

drivers/video/fbdev/atmel_lcdfb.c

49

struct clk *lcdc_clk;

drivers/video/fbdev/aty/atyfb_base.c

1862

struct atyclk clk = { 0 };

drivers/video/fbdev/aty/atyfb_base.c

1866

clk.ref_clk_per = par->ref_clk_per;

drivers/video/fbdev/aty/atyfb_base.c

1867

clk.pll_ref_div = pll->ct.pll_ref_div;

drivers/video/fbdev/aty/atyfb_base.c

1868

clk.mclk_fb_div = pll->ct.mclk_fb_div;

drivers/video/fbdev/aty/atyfb_base.c

1869

clk.mclk_post_div = pll->ct.mclk_post_div_real;

drivers/video/fbdev/aty/atyfb_base.c

1870

clk.mclk_fb_mult = pll->ct.mclk_fb_mult;

drivers/video/fbdev/aty/atyfb_base.c

1871

clk.xclk_post_div = pll->ct.xclk_post_div_real;

drivers/video/fbdev/aty/atyfb_base.c

1872

clk.vclk_fb_div = pll->ct.vclk_fb_div;

drivers/video/fbdev/aty/atyfb_base.c

1873

clk.vclk_post_div = pll->ct.vclk_post_div_real;

drivers/video/fbdev/aty/atyfb_base.c

1874

clk.dsp_xclks_per_row = dsp_config & 0x3fff;

drivers/video/fbdev/aty/atyfb_base.c

1875

clk.dsp_loop_latency = (dsp_config >> 16) & 0xf;

drivers/video/fbdev/aty/atyfb_base.c

1876

clk.dsp_precision = (dsp_config >> 20) & 7;

drivers/video/fbdev/aty/atyfb_base.c

1877

clk.dsp_off = dsp_on_off & 0x7ff;

drivers/video/fbdev/aty/atyfb_base.c

1878

clk.dsp_on = (dsp_on_off >> 16) & 0x7ff;

drivers/video/fbdev/aty/atyfb_base.c

1879

if (copy_to_user((struct atyclk __user *) arg, &clk,

drivers/video/fbdev/aty/atyfb_base.c

1880

sizeof(clk)))

drivers/video/fbdev/aty/atyfb_base.c

1887

struct atyclk clk;

drivers/video/fbdev/aty/atyfb_base.c

1889

if (copy_from_user(&clk, (struct atyclk __user *) arg,

drivers/video/fbdev/aty/atyfb_base.c

1890

sizeof(clk)))

drivers/video/fbdev/aty/atyfb_base.c

1892

par->ref_clk_per = clk.ref_clk_per;

drivers/video/fbdev/aty/atyfb_base.c

1893

pll->ct.pll_ref_div = clk.pll_ref_div;

drivers/video/fbdev/aty/atyfb_base.c

1894

pll->ct.mclk_fb_div = clk.mclk_fb_div;

drivers/video/fbdev/aty/atyfb_base.c

1895

pll->ct.mclk_post_div_real = clk.mclk_post_div;

drivers/video/fbdev/aty/atyfb_base.c

1896

pll->ct.mclk_fb_mult = clk.mclk_fb_mult;

drivers/video/fbdev/aty/atyfb_base.c

1897

pll->ct.xclk_post_div_real = clk.xclk_post_div;

drivers/video/fbdev/aty/atyfb_base.c

1898

pll->ct.vclk_fb_div = clk.vclk_fb_div;

drivers/video/fbdev/aty/atyfb_base.c

1899

pll->ct.vclk_post_div_real = clk.vclk_post_div;

drivers/video/fbdev/aty/atyfb_base.c

1900

pll->ct.dsp_config = (clk.dsp_xclks_per_row & 0x3fff) |

drivers/video/fbdev/aty/atyfb_base.c

1901

((clk.dsp_loop_latency & 0xf) << 16) |

drivers/video/fbdev/aty/atyfb_base.c

1902

((clk.dsp_precision & 7) << 20);

drivers/video/fbdev/aty/atyfb_base.c

1903

pll->ct.dsp_on_off = (clk.dsp_off & 0x7ff) |

drivers/video/fbdev/aty/atyfb_base.c

1904

((clk.dsp_on & 0x7ff) << 16);

drivers/video/fbdev/au1100fb.c

116

struct clk *lcdclk;

drivers/video/fbdev/au1100fb.c

732

struct clk *c;

drivers/video/fbdev/au1200fb.c

823

struct clk *c = clk_get(NULL, "lcd_intclk");

drivers/video/fbdev/clps711x-fb.c

131

pps = clk_get_rate(cfb->clk) / (PICOS2KHZ(info->var.pixclock) * 1000);

drivers/video/fbdev/clps711x-fb.c

246

cfb->clk = devm_clk_get(dev, NULL);

drivers/video/fbdev/clps711x-fb.c

247

if (IS_ERR(cfb->clk)) {

drivers/video/fbdev/clps711x-fb.c

248

ret = PTR_ERR(cfb->clk);

drivers/video/fbdev/clps711x-fb.c

34

struct clk *clk;

drivers/video/fbdev/controlfb.c

382

static int calc_clock_params(unsigned long clk, unsigned char *param)

drivers/video/fbdev/controlfb.c

386

if (clk > (CONTROL_PIXCLOCK_BASE << 3))

drivers/video/fbdev/controlfb.c

389

p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;

drivers/video/fbdev/controlfb.c

390

l = clk << p2;

drivers/video/fbdev/ep93xx-fb.c

111

struct clk *clk;

drivers/video/fbdev/ep93xx-fb.c

274

clk_set_rate(fbi->clk, 1000 * PICOS2KHZ(info->var.pixclock));

drivers/video/fbdev/ep93xx-fb.c

334

clk_disable(fbi->clk);

drivers/video/fbdev/ep93xx-fb.c

336

clk_enable(fbi->clk);

drivers/video/fbdev/ep93xx-fb.c

542

fbi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/video/fbdev/ep93xx-fb.c

543

if (IS_ERR(fbi->clk)) {

drivers/video/fbdev/ep93xx-fb.c

544

err = PTR_ERR(fbi->clk);

drivers/video/fbdev/ep93xx-fb.c

545

fbi->clk = NULL;

drivers/video/fbdev/ep93xx-fb.c

550

err = clk_prepare_enable(fbi->clk);

drivers/video/fbdev/ep93xx-fb.c

563

clk_disable_unprepare(fbi->clk);

drivers/video/fbdev/ep93xx-fb.c

583

clk_disable_unprepare(fbi->clk);

drivers/video/fbdev/imxfb.c

162

struct clk *clk_ipg;

drivers/video/fbdev/imxfb.c

163

struct clk *clk_ahb;

drivers/video/fbdev/imxfb.c

164

struct clk *clk_per;

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

127

int clk;

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

147

for (clk = 65536; clk; --clk) {

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

151

if (!clk)

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

616

int clk;

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

640

for (clk = 500000; clk; clk--) {

drivers/video/fbdev/matrox/matroxfb_DAC1064.c

645

if (!clk)

drivers/video/fbdev/matrox/matroxfb_Ti3026.c

300

static int Ti3026_setpclk(struct matrox_fb_info *minfo, int clk)

drivers/video/fbdev/matrox/matroxfb_Ti3026.c

308

f_pll = Ti3026_calcclock(minfo, clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost);

drivers/video/fbdev/mmp/hw/mmp_ctrl.c

300

sclk_src = clk_get_rate(path_to_ctrl(path)->clk);

drivers/video/fbdev/mmp/hw/mmp_ctrl.c

515

ctrl->clk = devm_clk_get_enabled(ctrl->dev, mi->clk_name);

drivers/video/fbdev/mmp/hw/mmp_ctrl.c

516

if (IS_ERR(ctrl->clk)) {

drivers/video/fbdev/mmp/hw/mmp_ctrl.c

517

ret = PTR_ERR(ctrl->clk);

drivers/video/fbdev/mmp/hw/mmp_ctrl.h

1397

struct clk *clk;

drivers/video/fbdev/mmp/hw/mmp_ctrl.h

390

#define CFG_CLKINV(clk) ((clk)<<7)

drivers/video/fbdev/omap/hwa742.c

130

struct clk *sys_ck;

drivers/video/fbdev/omap/lcdc.c

62

struct clk *lcd_ck;

drivers/video/fbdev/omap/lcdc.c

679

struct clk *tc_ck;

drivers/video/fbdev/omap/sossi.c

49

struct clk *fck;

drivers/video/fbdev/omap/sossi.c

563

struct clk *fck;

drivers/video/fbdev/omap/sossi.c

564

struct clk *dpll1out_ck;

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

303

struct clk *dss_clk;

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

4950

struct clk *clk;

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

4952

clk = devm_clk_get(&dsidev->dev, "fck");

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

4953

if (IS_ERR(clk)) {

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

4955

return PTR_ERR(clk);

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

4958

dsi->dss_clk = clk;

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

5213

struct clk *clk;

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

5216

clk = devm_clk_get(&dsidev->dev, "sys_clk");

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

5217

if (IS_ERR(clk)) {

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

5219

return PTR_ERR(clk);

drivers/video/fbdev/omap2/omapfb/dss/dsi.c

5224

pll->clkin = clk;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

734

struct clk *clk;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

736

clk = devm_clk_get(&dss.pdev->dev, "fck");

drivers/video/fbdev/omap2/omapfb/dss/dss.c

737

if (IS_ERR(clk)) {

drivers/video/fbdev/omap2/omapfb/dss/dss.c

739

return PTR_ERR(clk);

drivers/video/fbdev/omap2/omapfb/dss/dss.c

742

dss.dss_clk = clk;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

745

clk = clk_get(NULL, dss.feat->parent_clk_name);

drivers/video/fbdev/omap2/omapfb/dss/dss.c

746

if (IS_ERR(clk)) {

drivers/video/fbdev/omap2/omapfb/dss/dss.c

748

return PTR_ERR(clk);

drivers/video/fbdev/omap2/omapfb/dss/dss.c

751

clk = NULL;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

754

dss.parent_clk = clk;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

77

struct clk *parent_clk;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

78

struct clk *dss_clk;

drivers/video/fbdev/omap2/omapfb/dss/dss.h

152

struct clk *clkin;

drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c

175

struct clk *clk;

drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c

177

clk = devm_clk_get(&pdev->dev, "sys_clk");

drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c

178

if (IS_ERR(clk)) {

drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c

180

return PTR_ERR(clk);

drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c

186

pll->clkin = clk;

drivers/video/fbdev/omap2/omapfb/dss/venc.c

251

struct clk *tv_dac_clk;

drivers/video/fbdev/omap2/omapfb/dss/venc.c

662

struct clk *clk;

drivers/video/fbdev/omap2/omapfb/dss/venc.c

665

clk = devm_clk_get(&pdev->dev, "tv_dac_clk");

drivers/video/fbdev/omap2/omapfb/dss/venc.c

666

if (IS_ERR(clk)) {

drivers/video/fbdev/omap2/omapfb/dss/venc.c

668

return PTR_ERR(clk);

drivers/video/fbdev/omap2/omapfb/dss/venc.c

671

clk = NULL;

drivers/video/fbdev/omap2/omapfb/dss/venc.c

674

venc.tv_dac_clk = clk;

drivers/video/fbdev/omap2/omapfb/dss/video-pll.c

134

struct clk *clk;

drivers/video/fbdev/omap2/omapfb/dss/video-pll.c

156

clk = devm_clk_get(&pdev->dev, clkin_name[id]);

drivers/video/fbdev/omap2/omapfb/dss/video-pll.c

157

if (IS_ERR(clk)) {

drivers/video/fbdev/omap2/omapfb/dss/video-pll.c

159

return ERR_CAST(clk);

drivers/video/fbdev/omap2/omapfb/dss/video-pll.c

173

pll->clkin = clk;

drivers/video/fbdev/pm2fb.c

252

static void pm2_mnp(u32 clk, unsigned char *mm, unsigned char *nn,

drivers/video/fbdev/pm2fb.c

268

curr = (clk > f) ? clk - f : f - clk;

drivers/video/fbdev/pm2fb.c

281

static void pm2v_mnp(u32 clk, unsigned char *mm, unsigned char *nn,

drivers/video/fbdev/pm2fb.c

295

if (clk > f - delta && clk < f + delta) {

drivers/video/fbdev/pm2fb.c

296

delta = (clk > f) ? clk - f : f - clk;

drivers/video/fbdev/pm2fb.c

448

static void set_memclock(struct pm2fb_par *par, u32 clk)

drivers/video/fbdev/pm2fb.c

455

pm2v_mnp(clk/2, &m, &n, &p);

drivers/video/fbdev/pm2fb.c

470

pm2_mnp(clk, &m, &n, &p);

drivers/video/fbdev/pm2fb.c

485

static void set_pixclock(struct pm2fb_par *par, u32 clk)

drivers/video/fbdev/pm2fb.c

492

pm2_mnp(clk, &m, &n, &p);

drivers/video/fbdev/pm2fb.c

505

pm2v_mnp(clk/2, &m, &n, &p);

drivers/video/fbdev/pxa168fb.c

274

divider_int = clk_get_rate(fbi->clk) / needed_pixclk;

drivers/video/fbdev/pxa168fb.c

597

struct clk *clk;

drivers/video/fbdev/pxa168fb.c

606

clk = devm_clk_get(&pdev->dev, "LCDCLK");

drivers/video/fbdev/pxa168fb.c

607

if (IS_ERR(clk))

drivers/video/fbdev/pxa168fb.c

608

return dev_err_probe(&pdev->dev, PTR_ERR(clk),

drivers/video/fbdev/pxa168fb.c

629

fbi->clk = clk;

drivers/video/fbdev/pxa168fb.c

700

clk_prepare_enable(fbi->clk);

drivers/video/fbdev/pxa168fb.c

755

clk_disable_unprepare(fbi->clk);

drivers/video/fbdev/pxa168fb.c

792

clk_disable_unprepare(fbi->clk);

drivers/video/fbdev/pxa168fb.h

181

#define CFG_CLKINV(clk) ((clk) << 7)

drivers/video/fbdev/pxa3xx-gcu.c

607

priv->clk = devm_clk_get(dev, NULL);

drivers/video/fbdev/pxa3xx-gcu.c

608

if (IS_ERR(priv->clk))

drivers/video/fbdev/pxa3xx-gcu.c

609

return dev_err_probe(dev, PTR_ERR(priv->clk), "failed to get clock\n");

drivers/video/fbdev/pxa3xx-gcu.c

639

ret = clk_prepare_enable(priv->clk);

drivers/video/fbdev/pxa3xx-gcu.c

666

clk_disable_unprepare(priv->clk);

drivers/video/fbdev/pxa3xx-gcu.c

686

clk_disable_unprepare(priv->clk);

drivers/video/fbdev/pxa3xx-gcu.c

87

struct clk *clk;

drivers/video/fbdev/pxafb.c

1024

pcd = (unsigned long long)(clk_get_rate(fbi->clk) / 10000);

drivers/video/fbdev/pxafb.c

1046

htime = clk_get_rate(fbi->clk) / (pcd * fbi->fb.var.hsync_len);

drivers/video/fbdev/pxafb.c

1223

unsigned long lclk = clk_get_rate(fbi->clk);

drivers/video/fbdev/pxafb.c

1440

if (clk_prepare_enable(fbi->clk)) {

drivers/video/fbdev/pxafb.c

1483

clk_disable_unprepare(fbi->clk);

drivers/video/fbdev/pxafb.c

1793

fbi->clk = devm_clk_get(dev, NULL);

drivers/video/fbdev/pxafb.c

1794

if (IS_ERR(fbi->clk))

drivers/video/fbdev/pxafb.c

1795

return ERR_CAST(fbi->clk);

drivers/video/fbdev/pxafb.h

112

struct clk *clk;

drivers/video/fbdev/s3c-fb.c

206

struct clk *bus_clk;

drivers/video/fbdev/s3c-fb.c

207

struct clk *lcd_clk;

drivers/video/fbdev/s3c-fb.c

347

unsigned long clk;

drivers/video/fbdev/s3c-fb.c

352

clk = clk_get_rate(sfb->bus_clk);

drivers/video/fbdev/s3c-fb.c

354

clk = clk_get_rate(sfb->lcd_clk);

drivers/video/fbdev/s3c-fb.c

356

tmp = (unsigned long long)clk;

drivers/video/fbdev/s3c-fb.c

363

pixclk, clk, result, result ? clk / result : clk);

drivers/video/fbdev/sa1100fb.c

1164

fbi->clk = devm_clk_get(&pdev->dev, NULL);

drivers/video/fbdev/sa1100fb.c

1165

if (IS_ERR(fbi->clk))

drivers/video/fbdev/sa1100fb.c

1166

return PTR_ERR(fbi->clk);

drivers/video/fbdev/sa1100fb.c

419

clk_get_rate(fbi->clk) / 1000);

drivers/video/fbdev/sa1100fb.c

597

unsigned int pcd = clk_get_rate(fbi->clk) / 100 / 1000;

drivers/video/fbdev/sa1100fb.c

791

clk_prepare_enable(fbi->clk);

drivers/video/fbdev/sa1100fb.c

839

clk_disable_unprepare(fbi->clk);

drivers/video/fbdev/sa1100fb.h

73

struct clk *clk;

drivers/video/fbdev/sh_mobile_lcdcfb.c

210

struct clk *dot_clk;

drivers/video/fbdev/sh_mobile_lcdcfb.c

359

struct clk *clk;

drivers/video/fbdev/sh_mobile_lcdcfb.c

382

clk = clk_get(priv->dev, str);

drivers/video/fbdev/sh_mobile_lcdcfb.c

383

if (IS_ERR(clk)) {

drivers/video/fbdev/sh_mobile_lcdcfb.c

385

return PTR_ERR(clk);

drivers/video/fbdev/sh_mobile_lcdcfb.c

388

priv->dot_clk = clk;

drivers/video/fbdev/simplefb.c

242

struct clk *clock;

drivers/video/fbdev/simplefb.c

252

par->clks = kzalloc_objs(struct clk *, par->clk_count);

drivers/video/fbdev/simplefb.c

80

struct clk **clks;

drivers/video/fbdev/via/hw.c

1374

int clk)

drivers/video/fbdev/via/hw.c

1383

cur.multiplier = clk / ((f0 / cur.divisor)>>cur.rshift);

drivers/video/fbdev/via/hw.c

1384

f = abs(get_pll_output_frequency(f0, cur) - clk);

drivers/video/fbdev/via/hw.c

1388

if (abs(get_pll_output_frequency(f0, up) - clk) < f)

drivers/video/fbdev/via/hw.c

1390

else if (abs(get_pll_output_frequency(f0, down) - clk) < f)

drivers/video/fbdev/via/hw.c

1398

f = abs(get_pll_output_frequency(f0, cur) - clk);

drivers/video/fbdev/via/hw.c

1399

if (f < abs(get_pll_output_frequency(f0, best) - clk))

drivers/video/fbdev/via/hw.c

1406

static struct via_pll_config get_best_pll_config(int clk)

drivers/video/fbdev/via/hw.c

1414

ARRAY_SIZE(cle266_pll_limits), clk);

drivers/video/fbdev/via/hw.c

1420

ARRAY_SIZE(k800_pll_limits), clk);

drivers/video/fbdev/via/hw.c

1429

ARRAY_SIZE(cx700_pll_limits), clk);

drivers/video/fbdev/via/hw.c

1434

ARRAY_SIZE(vx855_pll_limits), clk);

drivers/video/fbdev/via/hw.c

1442

void viafb_set_vclock(u32 clk, int set_iga)

drivers/video/fbdev/via/hw.c

1444

struct via_pll_config config = get_best_pll_config(clk);

drivers/w1/masters/amd_axi_w1.c

299

struct clk *clk;

drivers/w1/masters/amd_axi_w1.c

323

clk = devm_clk_get_enabled(dev, NULL);

drivers/w1/masters/amd_axi_w1.c

324

if (IS_ERR(clk))

drivers/w1/masters/amd_axi_w1.c

325

return PTR_ERR(clk);

drivers/w1/masters/mxc_w1.c

103

mdev->clk = devm_clk_get(&pdev->dev, NULL);

drivers/w1/masters/mxc_w1.c

104

if (IS_ERR(mdev->clk))

drivers/w1/masters/mxc_w1.c

105

return PTR_ERR(mdev->clk);

drivers/w1/masters/mxc_w1.c

107

err = clk_prepare_enable(mdev->clk);

drivers/w1/masters/mxc_w1.c

111

clkrate = clk_get_rate(mdev->clk);

drivers/w1/masters/mxc_w1.c

147

clk_disable_unprepare(mdev->clk);

drivers/w1/masters/mxc_w1.c

160

clk_disable_unprepare(mdev->clk);

drivers/w1/masters/mxc_w1.c

31

struct clk *clk;

drivers/watchdog/airoha_wdt.c

132

struct clk *bus_clk;

drivers/watchdog/apple_wdt.c

161

struct clk *clk;

drivers/watchdog/apple_wdt.c

172

clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/apple_wdt.c

173

if (IS_ERR(clk))

drivers/watchdog/apple_wdt.c

174

return PTR_ERR(clk);

drivers/watchdog/apple_wdt.c

175

wdt->clk_rate = clk_get_rate(clk);

drivers/watchdog/armada_37xx_wdt.c

273

dev->clk = devm_clk_get_enabled(&pdev->dev, NULL);

drivers/watchdog/armada_37xx_wdt.c

274

if (IS_ERR(dev->clk))

drivers/watchdog/armada_37xx_wdt.c

275

return PTR_ERR(dev->clk);

drivers/watchdog/armada_37xx_wdt.c

277

dev->clk_rate = clk_get_rate(dev->clk);

drivers/watchdog/armada_37xx_wdt.c

81

struct clk *clk;

drivers/watchdog/asm9260_wdt.c

206

unsigned long clk;

drivers/watchdog/asm9260_wdt.c

208

priv->clk = devm_clk_get(priv->dev, "mod");

drivers/watchdog/asm9260_wdt.c

209

if (IS_ERR(priv->clk)) {

drivers/watchdog/asm9260_wdt.c

211

return PTR_ERR(priv->clk);

drivers/watchdog/asm9260_wdt.c

232

err = clk_set_rate(priv->clk, CLOCK_FREQ);

drivers/watchdog/asm9260_wdt.c

238

err = clk_prepare_enable(priv->clk);

drivers/watchdog/asm9260_wdt.c

245

priv->clk);

drivers/watchdog/asm9260_wdt.c

250

clk = clk_get_rate(priv->clk);

drivers/watchdog/asm9260_wdt.c

251

if (!clk) {

drivers/watchdog/asm9260_wdt.c

256

priv->wdt_freq = clk / 2;

drivers/watchdog/asm9260_wdt.c

57

struct clk *clk;

drivers/watchdog/asm9260_wdt.c

58

struct clk *clk_ahb;

drivers/watchdog/at91sam9_wdt.c

91

struct clk *sclk;

drivers/watchdog/ath79_wdt.c

65

static struct clk *wdt_clk;

drivers/watchdog/bcm7038_wdt.c

151

wdt->clk = devm_clk_get_enabled(dev, clk_name);

drivers/watchdog/bcm7038_wdt.c

153

if (!IS_ERR(wdt->clk)) {

drivers/watchdog/bcm7038_wdt.c

154

wdt->rate = clk_get_rate(wdt->clk);

drivers/watchdog/bcm7038_wdt.c

160

wdt->clk = NULL;

drivers/watchdog/bcm7038_wdt.c

33

struct clk *clk;

drivers/watchdog/cadence_wdt.c

180

unsigned long clock_f = clk_get_rate(wdt->clk);

drivers/watchdog/cadence_wdt.c

331

wdt->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/cadence_wdt.c

332

if (IS_ERR(wdt->clk))

drivers/watchdog/cadence_wdt.c

333

return dev_err_probe(dev, PTR_ERR(wdt->clk),

drivers/watchdog/cadence_wdt.c

336

clock_f = clk_get_rate(wdt->clk);

drivers/watchdog/cadence_wdt.c

372

clk_disable_unprepare(wdt->clk);

drivers/watchdog/cadence_wdt.c

390

ret = clk_prepare_enable(wdt->clk);

drivers/watchdog/cadence_wdt.c

77

struct clk *clk;

drivers/watchdog/davinci_wdt.c

129

freq = clk_get_rate(davinci_wdt->clk);

drivers/watchdog/davinci_wdt.c

202

davinci_wdt->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/davinci_wdt.c

203

if (IS_ERR(davinci_wdt->clk))

drivers/watchdog/davinci_wdt.c

204

return dev_err_probe(dev, PTR_ERR(davinci_wdt->clk),

drivers/watchdog/davinci_wdt.c

66

struct clk *clk;

drivers/watchdog/davinci_wdt.c

77

wdt_freq = clk_get_rate(davinci_wdt->clk);

drivers/watchdog/digicolor_wdt.c

130

wdt->clk = devm_clk_get(dev, NULL);

drivers/watchdog/digicolor_wdt.c

131

if (IS_ERR(wdt->clk))

drivers/watchdog/digicolor_wdt.c

132

return PTR_ERR(wdt->clk);

drivers/watchdog/digicolor_wdt.c

133

dc_wdt_wdd.max_timeout = U32_MAX / clk_get_rate(wdt->clk);

drivers/watchdog/digicolor_wdt.c

26

struct clk *clk;

drivers/watchdog/digicolor_wdt.c

64

dc_wdt_set(wdt, wdog->timeout * clk_get_rate(wdt->clk));

drivers/watchdog/digicolor_wdt.c

82

dc_wdt_set(wdt, t * clk_get_rate(wdt->clk));

drivers/watchdog/digicolor_wdt.c

93

return count / clk_get_rate(wdt->clk);

drivers/watchdog/dw_wdt.c

386

clk_disable_unprepare(dw_wdt->clk);

drivers/watchdog/dw_wdt.c

394

int err = clk_prepare_enable(dw_wdt->clk);

drivers/watchdog/dw_wdt.c

401

clk_disable_unprepare(dw_wdt->clk);

drivers/watchdog/dw_wdt.c

569

dw_wdt->clk = devm_clk_get_enabled(dev, "tclk");

drivers/watchdog/dw_wdt.c

570

if (IS_ERR(dw_wdt->clk)) {

drivers/watchdog/dw_wdt.c

571

dw_wdt->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/dw_wdt.c

572

if (IS_ERR(dw_wdt->clk))

drivers/watchdog/dw_wdt.c

573

return PTR_ERR(dw_wdt->clk);

drivers/watchdog/dw_wdt.c

576

dw_wdt->rate = clk_get_rate(dw_wdt->clk);

drivers/watchdog/dw_wdt.c

84

struct clk *clk;

drivers/watchdog/dw_wdt.c

85

struct clk *pclk;

drivers/watchdog/imgpdc_wdt.c

84

struct clk *wdt_clk;

drivers/watchdog/imgpdc_wdt.c

85

struct clk *sys_clk;

drivers/watchdog/imx2_wdt.c

291

wdev->clk = devm_clk_get(dev, NULL);

drivers/watchdog/imx2_wdt.c

292

if (IS_ERR(wdev->clk)) {

drivers/watchdog/imx2_wdt.c

294

return PTR_ERR(wdev->clk);

drivers/watchdog/imx2_wdt.c

313

ret = clk_prepare_enable(wdev->clk);

drivers/watchdog/imx2_wdt.c

317

ret = devm_add_action_or_reset(dev, imx2_wdt_action, wdev->clk);

drivers/watchdog/imx2_wdt.c

398

clk_disable_unprepare(wdev->clk);

drivers/watchdog/imx2_wdt.c

414

ret = clk_prepare_enable(wdev->clk);

drivers/watchdog/imx2_wdt.c

69

struct clk *clk;

drivers/watchdog/imx7ulp_wdt.c

328

imx7ulp_wdt->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/imx7ulp_wdt.c

329

if (IS_ERR(imx7ulp_wdt->clk)) {

drivers/watchdog/imx7ulp_wdt.c

331

return PTR_ERR(imx7ulp_wdt->clk);

drivers/watchdog/imx7ulp_wdt.c

366

clk_disable_unprepare(imx7ulp_wdt->clk);

drivers/watchdog/imx7ulp_wdt.c

377

ret = clk_prepare_enable(imx7ulp_wdt->clk);

drivers/watchdog/imx7ulp_wdt.c

65

struct clk *clk;

drivers/watchdog/ixp4xx_wdt.c

139

struct clk *clk;

drivers/watchdog/ixp4xx_wdt.c

158

clk = devm_clk_get_enabled(dev->parent, NULL);

drivers/watchdog/ixp4xx_wdt.c

159

if (!IS_ERR(clk))

drivers/watchdog/ixp4xx_wdt.c

160

iwdt->rate = clk_get_rate(clk);

drivers/watchdog/jz4740_wdt.c

101

clk_disable_unprepare(drvdata->clk);

drivers/watchdog/jz4740_wdt.c

150

drvdata->clk = devm_clk_get(&pdev->dev, "wdt");

drivers/watchdog/jz4740_wdt.c

151

if (IS_ERR(drvdata->clk)) {

drivers/watchdog/jz4740_wdt.c

153

return PTR_ERR(drvdata->clk);

drivers/watchdog/jz4740_wdt.c

157

rate = clk_round_rate(drvdata->clk, 1);

drivers/watchdog/jz4740_wdt.c

161

ret = clk_set_rate(drvdata->clk, rate);

drivers/watchdog/jz4740_wdt.c

42

struct clk *clk;

drivers/watchdog/jz4740_wdt.c

81

ret = clk_prepare_enable(drvdata->clk);

drivers/watchdog/keembay_wdt.c

203

wdt->clk = devm_clk_get(dev, NULL);

drivers/watchdog/keembay_wdt.c

204

if (IS_ERR(wdt->clk))

drivers/watchdog/keembay_wdt.c

205

return dev_err_probe(dev, PTR_ERR(wdt->clk), "Failed to get clock\n");

drivers/watchdog/keembay_wdt.c

207

wdt->rate = clk_get_rate(wdt->clk);

drivers/watchdog/keembay_wdt.c

52

struct clk *clk;

drivers/watchdog/lantiq_wdt.c

205

struct clk *clk;

drivers/watchdog/lantiq_wdt.c

219

clk = clk_get_io();

drivers/watchdog/lantiq_wdt.c

220

priv->clk_rate = clk_get_rate(clk) / LTQ_WDT_DIVIDER;

drivers/watchdog/loongson1_wdt.c

143

drvdata->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/loongson1_wdt.c

144

if (IS_ERR(drvdata->clk))

drivers/watchdog/loongson1_wdt.c

145

return PTR_ERR(drvdata->clk);

drivers/watchdog/loongson1_wdt.c

147

clk_rate = clk_get_rate(drvdata->clk);

drivers/watchdog/loongson1_wdt.c

49

struct clk *clk;

drivers/watchdog/lpc18xx_wdt.c

53

struct clk *reg_clk;

drivers/watchdog/lpc18xx_wdt.c

54

struct clk *wdt_clk;

drivers/watchdog/marvell_gti_wdt.c

78

struct clk *sclk;

drivers/watchdog/meson_gxbb_wdt.c

176

data->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/meson_gxbb_wdt.c

177

if (IS_ERR(data->clk))

drivers/watchdog/meson_gxbb_wdt.c

178

return PTR_ERR(data->clk);

drivers/watchdog/meson_gxbb_wdt.c

207

ctrl_reg |= ((clk_get_rate(data->clk) / 1000) &

drivers/watchdog/meson_gxbb_wdt.c

44

struct clk *clk;

drivers/watchdog/moxart_wdt.c

107

clk = devm_clk_get(dev, NULL);

drivers/watchdog/moxart_wdt.c

108

if (IS_ERR(clk)) {

drivers/watchdog/moxart_wdt.c

110

return PTR_ERR(clk);

drivers/watchdog/moxart_wdt.c

113

moxart_wdt->clock_frequency = clk_get_rate(clk);

drivers/watchdog/moxart_wdt.c

92

struct clk *clk;

drivers/watchdog/msc313e_wdt.c

110

priv->clk = devm_clk_get(dev, NULL);

drivers/watchdog/msc313e_wdt.c

111

if (IS_ERR(priv->clk)) {

drivers/watchdog/msc313e_wdt.c

113

return PTR_ERR(priv->clk);

drivers/watchdog/msc313e_wdt.c

120

priv->wdev.max_timeout = U32_MAX / clk_get_rate(priv->clk);

drivers/watchdog/msc313e_wdt.c

32

struct clk *clk;

drivers/watchdog/msc313e_wdt.c

41

err = clk_prepare_enable(priv->clk);

drivers/watchdog/msc313e_wdt.c

45

timeout = wdev->timeout * clk_get_rate(priv->clk);

drivers/watchdog/msc313e_wdt.c

67

clk_disable_unprepare(priv->clk);

drivers/watchdog/npcm_wdt.c

107

clk_disable_unprepare(wdt->clk);

drivers/watchdog/npcm_wdt.c

157

clk_prepare_enable(wdt->clk);

drivers/watchdog/npcm_wdt.c

203

wdt->clk = devm_clk_get_optional(&pdev->dev, NULL);

drivers/watchdog/npcm_wdt.c

204

if (IS_ERR(wdt->clk))

drivers/watchdog/npcm_wdt.c

205

return PTR_ERR(wdt->clk);

drivers/watchdog/npcm_wdt.c

47

struct clk *clk;

drivers/watchdog/npcm_wdt.c

71

clk_prepare_enable(wdt->clk);

drivers/watchdog/of_xilinx_wdt.c

190

xdev->clk = devm_clk_get_prepared(dev, NULL);

drivers/watchdog/of_xilinx_wdt.c

191

if (IS_ERR(xdev->clk)) {

drivers/watchdog/of_xilinx_wdt.c

192

if (PTR_ERR(xdev->clk) != -ENOENT)

drivers/watchdog/of_xilinx_wdt.c

193

return PTR_ERR(xdev->clk);

drivers/watchdog/of_xilinx_wdt.c

199

xdev->clk = NULL;

drivers/watchdog/of_xilinx_wdt.c

207

pfreq = clk_get_rate(xdev->clk);

drivers/watchdog/of_xilinx_wdt.c

221

rc = clk_enable(xdev->clk);

drivers/watchdog/of_xilinx_wdt.c

230

clk_disable(xdev->clk);

drivers/watchdog/of_xilinx_wdt.c

234

clk_disable(xdev->clk);

drivers/watchdog/of_xilinx_wdt.c

45

struct clk *clk;

drivers/watchdog/of_xilinx_wdt.c

54

ret = clk_enable(xdev->clk);

drivers/watchdog/of_xilinx_wdt.c

94

clk_disable(xdev->clk);

drivers/watchdog/orion_wdt.c

102

dev->clk = clk_get(&pdev->dev, NULL);

drivers/watchdog/orion_wdt.c

103

if (IS_ERR(dev->clk))

drivers/watchdog/orion_wdt.c

104

return PTR_ERR(dev->clk);

drivers/watchdog/orion_wdt.c

105

ret = clk_prepare_enable(dev->clk);

drivers/watchdog/orion_wdt.c

107

clk_put(dev->clk);

drivers/watchdog/orion_wdt.c

116

dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;

drivers/watchdog/orion_wdt.c

125

dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");

drivers/watchdog/orion_wdt.c

126

if (!IS_ERR(dev->clk)) {

drivers/watchdog/orion_wdt.c

127

ret = clk_prepare_enable(dev->clk);

drivers/watchdog/orion_wdt.c

129

clk_put(dev->clk);

drivers/watchdog/orion_wdt.c

136

dev->clk_rate = clk_get_rate(dev->clk);

drivers/watchdog/orion_wdt.c

142

dev->clk = clk_get(&pdev->dev, NULL);

drivers/watchdog/orion_wdt.c

143

if (IS_ERR(dev->clk))

drivers/watchdog/orion_wdt.c

144

return PTR_ERR(dev->clk);

drivers/watchdog/orion_wdt.c

146

ret = clk_prepare_enable(dev->clk);

drivers/watchdog/orion_wdt.c

148

clk_put(dev->clk);

drivers/watchdog/orion_wdt.c

155

dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;

drivers/watchdog/orion_wdt.c

166

dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");

drivers/watchdog/orion_wdt.c

167

if (IS_ERR(dev->clk))

drivers/watchdog/orion_wdt.c

168

return PTR_ERR(dev->clk);

drivers/watchdog/orion_wdt.c

169

ret = clk_prepare_enable(dev->clk);

drivers/watchdog/orion_wdt.c

171

clk_put(dev->clk);

drivers/watchdog/orion_wdt.c

179

dev->clk_rate = clk_get_rate(dev->clk);

drivers/watchdog/orion_wdt.c

645

clk_disable_unprepare(dev->clk);

drivers/watchdog/orion_wdt.c

646

clk_put(dev->clk);

drivers/watchdog/orion_wdt.c

656

clk_disable_unprepare(dev->clk);

drivers/watchdog/orion_wdt.c

657

clk_put(dev->clk);

drivers/watchdog/orion_wdt.c

75

struct clk *clk;

drivers/watchdog/orion_wdt.c

84

dev->clk = clk_get(&pdev->dev, NULL);

drivers/watchdog/orion_wdt.c

85

if (IS_ERR(dev->clk))

drivers/watchdog/orion_wdt.c

86

return PTR_ERR(dev->clk);

drivers/watchdog/orion_wdt.c

87

ret = clk_prepare_enable(dev->clk);

drivers/watchdog/orion_wdt.c

89

clk_put(dev->clk);

drivers/watchdog/orion_wdt.c

93

dev->clk_rate = clk_get_rate(dev->clk);

drivers/watchdog/pic32-dmt.c

180

dmt->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/pic32-dmt.c

181

if (IS_ERR(dmt->clk)) {

drivers/watchdog/pic32-dmt.c

183

return PTR_ERR(dmt->clk);

drivers/watchdog/pic32-dmt.c

43

struct clk *clk;

drivers/watchdog/pic32-dmt.c

99

rate = clk_get_rate(dmt->clk);

drivers/watchdog/pic32-wdt.c

182

wdt->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/pic32-wdt.c

183

if (IS_ERR(wdt->clk)) {

drivers/watchdog/pic32-wdt.c

185

return PTR_ERR(wdt->clk);

drivers/watchdog/pic32-wdt.c

40

struct clk *clk;

drivers/watchdog/pic32-wdt.c

76

rate = clk_get_rate(wdt->clk);

drivers/watchdog/pnx4008_wdt.c

81

static struct clk *wdt_clk;

drivers/watchdog/qcom-wdt.c

205

struct clk *clk;

drivers/watchdog/qcom-wdt.c

232

clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/qcom-wdt.c

233

if (IS_ERR(clk)) {

drivers/watchdog/qcom-wdt.c

235

return PTR_ERR(clk);

drivers/watchdog/qcom-wdt.c

246

wdt->rate = clk_get_rate(clk);

drivers/watchdog/realtek_otto_wdt.c

240

struct clk *clk;

drivers/watchdog/realtek_otto_wdt.c

242

clk = devm_clk_get_enabled(ctrl->dev, NULL);

drivers/watchdog/realtek_otto_wdt.c

243

if (IS_ERR(clk))

drivers/watchdog/realtek_otto_wdt.c

244

return dev_err_probe(ctrl->dev, PTR_ERR(clk), "Failed to get clock\n");

drivers/watchdog/realtek_otto_wdt.c

246

ctrl->clk_rate_khz = clk_get_rate(clk) / 1000;

drivers/watchdog/renesas_wdt.c

137

clk_prepare_enable(priv->clk);

drivers/watchdog/renesas_wdt.c

231

priv->clk = devm_clk_get(dev, NULL);

drivers/watchdog/renesas_wdt.c

232

if (IS_ERR(priv->clk))

drivers/watchdog/renesas_wdt.c

233

return PTR_ERR(priv->clk);

drivers/watchdog/renesas_wdt.c

237

priv->clk_rate = clk_get_rate(priv->clk);

drivers/watchdog/renesas_wdt.c

54

struct clk *clk;

drivers/watchdog/renesas_wwdt.c

77

struct clk *clk;

drivers/watchdog/renesas_wwdt.c

91

clk = devm_clk_get(dev, "cnt");

drivers/watchdog/renesas_wwdt.c

92

if (IS_ERR(clk))

drivers/watchdog/renesas_wwdt.c

93

return PTR_ERR(clk);

drivers/watchdog/renesas_wwdt.c

95

rate = clk_get_rate(clk);

drivers/watchdog/rt2880_wdt.c

155

drvdata->clk = devm_clk_get(dev, NULL);

drivers/watchdog/rt2880_wdt.c

156

if (IS_ERR(drvdata->clk))

drivers/watchdog/rt2880_wdt.c

157

return PTR_ERR(drvdata->clk);

drivers/watchdog/rt2880_wdt.c

163

drvdata->freq = clk_get_rate(drvdata->clk) / RALINK_WDT_PRESCALE;

drivers/watchdog/rt2880_wdt.c

46

struct clk *clk;

drivers/watchdog/rtd119x_wdt.c

110

data->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/rtd119x_wdt.c

111

if (IS_ERR(data->clk))

drivers/watchdog/rtd119x_wdt.c

112

return PTR_ERR(data->clk);

drivers/watchdog/rtd119x_wdt.c

117

data->wdt_dev.max_timeout = 0xffffffff / clk_get_rate(data->clk);

drivers/watchdog/rtd119x_wdt.c

30

struct clk *clk;

drivers/watchdog/rtd119x_wdt.c

72

writel(val * clk_get_rate(data->clk), data->base + RTD119X_TCWOV);

drivers/watchdog/rti_wdt.c

215

struct clk *clk;

drivers/watchdog/rti_wdt.c

226

clk = clk_get(dev, NULL);

drivers/watchdog/rti_wdt.c

227

if (IS_ERR(clk))

drivers/watchdog/rti_wdt.c

228

return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");

drivers/watchdog/rti_wdt.c

230

wdt->freq = clk_get_rate(clk);

drivers/watchdog/rti_wdt.c

232

clk_put(clk);

drivers/watchdog/rza_wdt.c

181

priv->clk = devm_clk_get(dev, NULL);

drivers/watchdog/rza_wdt.c

182

if (IS_ERR(priv->clk))

drivers/watchdog/rza_wdt.c

183

return PTR_ERR(priv->clk);

drivers/watchdog/rza_wdt.c

185

rate = clk_get_rate(priv->clk);

drivers/watchdog/rza_wdt.c

45

struct clk *clk;

drivers/watchdog/rza_wdt.c

52

unsigned long rate = clk_get_rate(priv->clk);

drivers/watchdog/rzg2l_wdt.c

57

struct clk *pclk;

drivers/watchdog/rzg2l_wdt.c

58

struct clk *osc_clk;

drivers/watchdog/rzn1_wdt.c

106

struct clk *clk;

drivers/watchdog/rzn1_wdt.c

130

clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/rzn1_wdt.c

131

if (IS_ERR(clk)) {

drivers/watchdog/rzn1_wdt.c

133

return PTR_ERR(clk);

drivers/watchdog/rzn1_wdt.c

136

clk_rate = clk_get_rate(clk);

drivers/watchdog/rzv2h_wdt.c

280

struct clk *count_clk;

drivers/watchdog/rzv2h_wdt.c

71

struct clk *pclk;

drivers/watchdog/rzv2h_wdt.c

72

struct clk *oscclk;

drivers/watchdog/s32g_wdt.c

218

struct clk *clk;

drivers/watchdog/s32g_wdt.c

232

clk = devm_clk_get_enabled(dev, "counter");

drivers/watchdog/s32g_wdt.c

233

if (IS_ERR(clk))

drivers/watchdog/s32g_wdt.c

234

return dev_err_probe(dev, PTR_ERR(clk), "Can't get Watchdog clock\n");

drivers/watchdog/s32g_wdt.c

236

wdev->rate = clk_get_rate(clk);

drivers/watchdog/s3c2410_wdt.c

197

struct clk *bus_clk; /* for register interface (PCLK) */

drivers/watchdog/s3c2410_wdt.c

198

struct clk *src_clk; /* for WDT counter */

drivers/watchdog/sa1100_wdt.c

181

static struct clk *clk;

drivers/watchdog/sa1100_wdt.c

196

clk = clk_get(NULL, "OSTIMER0");

drivers/watchdog/sa1100_wdt.c

197

if (IS_ERR(clk)) {

drivers/watchdog/sa1100_wdt.c

199

(int) PTR_ERR(clk));

drivers/watchdog/sa1100_wdt.c

200

return PTR_ERR(clk);

drivers/watchdog/sa1100_wdt.c

203

ret = clk_prepare_enable(clk);

drivers/watchdog/sa1100_wdt.c

210

oscr_freq = clk_get_rate(clk);

drivers/watchdog/sa1100_wdt.c

224

clk_disable_unprepare(clk);

drivers/watchdog/sa1100_wdt.c

226

clk_put(clk);

drivers/watchdog/sa1100_wdt.c

233

clk_disable_unprepare(clk);

drivers/watchdog/sa1100_wdt.c

234

clk_put(clk);

drivers/watchdog/sbsa_gwdt.c

162

sbsa_gwdt_reg_write((u64)gwdt->clk * timeout, gwdt);

drivers/watchdog/sbsa_gwdt.c

169

sbsa_gwdt_reg_write(((u64)gwdt->clk / 2) * timeout, gwdt);

drivers/watchdog/sbsa_gwdt.c

216

do_div(timeleft, gwdt->clk);

drivers/watchdog/sbsa_gwdt.c

319

gwdt->clk = arch_timer_get_cntfrq();

drivers/watchdog/sbsa_gwdt.c

333

wdd->max_hw_heartbeat_ms = U32_MAX / gwdt->clk * 1000;

drivers/watchdog/sbsa_gwdt.c

335

wdd->max_hw_heartbeat_ms = GENMASK_ULL(47, 0) / gwdt->clk * 1000;

drivers/watchdog/sbsa_gwdt.c

396

wdd->timeout, gwdt->clk, action,

drivers/watchdog/sbsa_gwdt.c

94

u32 clk;

drivers/watchdog/shwdt.c

140

clk_disable(wdt->clk);

drivers/watchdog/shwdt.c

234

wdt->clk = devm_clk_get(&pdev->dev, NULL);

drivers/watchdog/shwdt.c

235

if (IS_ERR(wdt->clk)) {

drivers/watchdog/shwdt.c

240

wdt->clk = NULL;

drivers/watchdog/shwdt.c

75

struct clk *clk;

drivers/watchdog/shwdt.c

88

clk_enable(wdt->clk);

drivers/watchdog/sp805_wdt.c

159

ret = clk_prepare_enable(wdt->clk);

drivers/watchdog/sp805_wdt.c

211

clk_disable_unprepare(wdt->clk);

drivers/watchdog/sp805_wdt.c

256

wdt->clk = devm_clk_get_optional(&adev->dev, NULL);

drivers/watchdog/sp805_wdt.c

257

if (IS_ERR(wdt->clk))

drivers/watchdog/sp805_wdt.c

258

return dev_err_probe(&adev->dev, PTR_ERR(wdt->clk), "Clock not found\n");

drivers/watchdog/sp805_wdt.c

260

wdt->rate = clk_get_rate(wdt->clk);

drivers/watchdog/sp805_wdt.c

71

struct clk *clk;

drivers/watchdog/sprd_wdt.c

62

struct clk *enable;

drivers/watchdog/sprd_wdt.c

63

struct clk *rtc_enable;

drivers/watchdog/st_lpc_wdt.c

155

struct clk *clk;

drivers/watchdog/st_lpc_wdt.c

186

clk = devm_clk_get(dev, NULL);

drivers/watchdog/st_lpc_wdt.c

187

if (IS_ERR(clk)) {

drivers/watchdog/st_lpc_wdt.c

189

return PTR_ERR(clk);

drivers/watchdog/st_lpc_wdt.c

194

st_wdog->clk = clk;

drivers/watchdog/st_lpc_wdt.c

197

st_wdog->clkrate = clk_get_rate(st_wdog->clk);

drivers/watchdog/st_lpc_wdt.c

206

ret = clk_prepare_enable(clk);

drivers/watchdog/st_lpc_wdt.c

211

ret = devm_add_action_or_reset(dev, st_clk_disable_unprepare, clk);

drivers/watchdog/st_lpc_wdt.c

251

clk_disable(st_wdog->clk);

drivers/watchdog/st_lpc_wdt.c

261

ret = clk_enable(st_wdog->clk);

drivers/watchdog/st_lpc_wdt.c

265

clk_unprepare(st_wdog->clk);

drivers/watchdog/st_lpc_wdt.c

45

struct clk *clk;

drivers/watchdog/starfive-wdt.c

104

struct clk *core_clk;

drivers/watchdog/starfive-wdt.c

105

struct clk *apb_clk;

drivers/watchdog/stm32_iwdg.c

82

struct clk *clk_lsi;

drivers/watchdog/stm32_iwdg.c

83

struct clk *clk_pclk;

drivers/watchdog/sunplus_wdt.c

154

priv->clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/sunplus_wdt.c

155

if (IS_ERR(priv->clk))

drivers/watchdog/sunplus_wdt.c

156

return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to enable clock\n");

drivers/watchdog/sunplus_wdt.c

47

struct clk *clk;

drivers/watchdog/txx9wdt.c

40

static struct clk *txx9_imclk;

drivers/watchdog/visconti_wdt.c

120

struct clk *clk;

drivers/watchdog/visconti_wdt.c

131

clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/visconti_wdt.c

132

if (IS_ERR(clk))

drivers/watchdog/visconti_wdt.c

133

return dev_err_probe(dev, PTR_ERR(clk), "Could not get clock\n");

drivers/watchdog/visconti_wdt.c

135

clk_freq = clk_get_rate(clk);

drivers/watchdog/xilinx_wwdt.c

142

struct clk *clk;

drivers/watchdog/xilinx_wwdt.c

160

clk = devm_clk_get_enabled(dev, NULL);

drivers/watchdog/xilinx_wwdt.c

161

if (IS_ERR(clk))

drivers/watchdog/xilinx_wwdt.c

162

return PTR_ERR(clk);

drivers/watchdog/xilinx_wwdt.c

164

xdev->freq = clk_get_rate(clk);

include/asm-generic/vmlinux.lds.h

339

#define CLK_OF_TABLES() OF_TABLE(CONFIG_COMMON_CLK, clk)

include/clocksource/timer-davinci.h

41

int __init davinci_timer_register(struct clk *clk,

include/clocksource/timer-xilinx.h

31

struct clk;

include/clocksource/timer-xilinx.h

43

struct clk *clk;

include/drm/bridge/samsung-dsim.h

108

struct clk *pll_clk;

include/kunit/clk.h

12

struct clk *

include/kunit/clk.h

14

struct clk *

include/kunit/clk.h

17

struct clk *

include/kunit/clk.h

19

struct clk *

include/kunit/clk.h

23

int clk_prepare_enable_kunit(struct kunit *test, struct clk *clk);

include/kunit/clk.h

5

struct clk;

include/linux/ahci_platform.h

16

struct clk;

include/linux/ahci_platform.h

25

struct clk *ahci_platform_find_clk(struct ahci_host_priv *hpriv,

include/linux/amba/bus.h

62

struct clk;

include/linux/amba/bus.h

67

struct clk *pclk;

include/linux/atmel-ssc.h

20

struct clk *clk;

include/linux/clk-provider.h

1040

struct clk *clk_register_mux_table(struct device *dev, const char *name,

include/linux/clk-provider.h

1113

void clk_unregister_mux(struct clk *clk);

include/linux/clk-provider.h

1149

struct clk *clk_register_fixed_factor(struct device *dev, const char *name,

include/linux/clk-provider.h

1152

void clk_unregister_fixed_factor(struct clk *clk);

include/linux/clk-provider.h

1237

struct clk *clk_register_fractional_divider(struct device *dev,

include/linux/clk-provider.h

1314

struct clk *clk_register_composite(struct device *dev, const char *name,

include/linux/clk-provider.h

1320

struct clk *clk_register_composite_pdata(struct device *dev, const char *name,

include/linux/clk-provider.h

1326

void clk_unregister_composite(struct clk *clk);

include/linux/clk-provider.h

1349

struct clk *clk_register(struct device *dev, struct clk_hw *hw);

include/linux/clk-provider.h

1350

struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw);

include/linux/clk-provider.h

1356

void clk_unregister(struct clk *clk);

include/linux/clk-provider.h

1361

const char *__clk_get_name(const struct clk *clk);

include/linux/clk-provider.h

1390

struct clk_hw *__clk_get_hw(struct clk *clk);

include/linux/clk-provider.h

1392

static inline struct clk_hw *__clk_get_hw(struct clk *clk)

include/linux/clk-provider.h

1394

return (struct clk_hw *)clk;

include/linux/clk-provider.h

1398

struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id);

include/linux/clk-provider.h

1399

struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw,

include/linux/clk-provider.h

1408

unsigned int __clk_get_enable_count(struct clk *clk);

include/linux/clk-provider.h

1416

bool __clk_is_enabled(struct clk *clk);

include/linux/clk-provider.h

1417

struct clk *__clk_lookup(const char *name);

include/linux/clk-provider.h

1436

dst->clk = src->clk;

include/linux/clk-provider.h

1466

struct clk **clks;

include/linux/clk-provider.h

1481

OF_DECLARE_1(clk, name, compat, __##name##_of_clk_init_declare)

include/linux/clk-provider.h

1493

OF_DECLARE_1(clk, name, compat, name##_of_clk_init_driver)

include/linux/clk-provider.h

1624

struct clk *(*clk_src_get)(struct of_phandle_args *args,

include/linux/clk-provider.h

1637

struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,

include/linux/clk-provider.h

1641

struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data);

include/linux/clk-provider.h

1652

struct clk *(*clk_src_get)(struct of_phandle_args *args,

include/linux/clk-provider.h

1674

static inline struct clk *of_clk_src_simple_get(

include/linux/clk-provider.h

1684

static inline struct clk *of_clk_src_onecell_get(

include/linux/clk-provider.h

328

struct clk *clk;

include/linux/clk-provider.h

36

struct clk;

include/linux/clk-provider.h

368

struct clk *clk_register_fixed_rate(struct device *dev, const char *name,

include/linux/clk-provider.h

498

void clk_unregister_fixed_rate(struct clk *clk);

include/linux/clk-provider.h

555

struct clk *clk_register_gate(struct device *dev, const char *name,

include/linux/clk-provider.h

662

void clk_unregister_gate(struct clk *clk);

include/linux/clk-provider.h

774

struct clk *clk_register_divider_table(struct device *dev, const char *name,

include/linux/clk-provider.h

972

void clk_unregister_divider(struct clk *clk);

include/linux/clk.h

1001

static inline struct clk *devm_clk_get(struct device *dev, const char *id)

include/linux/clk.h

1006

static inline struct clk *devm_clk_get_prepared(struct device *dev,

include/linux/clk.h

1012

static inline struct clk *devm_clk_get_enabled(struct device *dev,

include/linux/clk.h

1018

static inline struct clk *devm_clk_get_optional(struct device *dev,

include/linux/clk.h

1024

static inline struct clk *devm_clk_get_optional_prepared(struct device *dev,

include/linux/clk.h

103

int clk_notifier_register(struct clk *clk, struct notifier_block *nb);

include/linux/clk.h

1030

static inline struct clk *devm_clk_get_optional_enabled(struct device *dev,

include/linux/clk.h

1036

static inline struct clk *

include/linux/clk.h

1075

static inline struct clk *devm_get_clk_from_child(struct device *dev,

include/linux/clk.h

1081

static inline void clk_put(struct clk *clk) {}

include/linux/clk.h

1087

static inline void devm_clk_put(struct device *dev, struct clk *clk) {}

include/linux/clk.h

1089

static inline int clk_enable(struct clk *clk)

include/linux/clk.h

110

int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb);

include/linux/clk.h

1100

static inline void clk_disable(struct clk *clk) {}

include/linux/clk.h

1106

static inline unsigned long clk_get_rate(struct clk *clk)

include/linux/clk.h

1111

static inline int clk_set_rate(struct clk *clk, unsigned long rate)

include/linux/clk.h

1116

static inline int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)

include/linux/clk.h

1121

static inline long clk_round_rate(struct clk *clk, unsigned long rate)

include/linux/clk.h

1126

static inline bool clk_has_parent(struct clk *clk, struct clk *parent)

include/linux/clk.h

1131

static inline int clk_set_rate_range(struct clk *clk, unsigned long min,

include/linux/clk.h

1137

static inline int clk_set_min_rate(struct clk *clk, unsigned long rate)

include/linux/clk.h

1142

static inline int clk_set_max_rate(struct clk *clk, unsigned long rate)

include/linux/clk.h

1147

static inline int clk_set_parent(struct clk *clk, struct clk *parent)

include/linux/clk.h

1152

static inline struct clk *clk_get_parent(struct clk *clk)

include/linux/clk.h

1157

static inline struct clk *clk_get_sys(const char *dev_id, const char *con_id)

include/linux/clk.h

1165

static inline int clk_prepare_enable(struct clk *clk)

include/linux/clk.h

1169

ret = clk_prepare(clk);

include/linux/clk.h

1172

ret = clk_enable(clk);

include/linux/clk.h

1174

clk_unprepare(clk);

include/linux/clk.h

1180

static inline void clk_disable_unprepare(struct clk *clk)

include/linux/clk.h

1182

clk_disable(clk);

include/linux/clk.h

1183

clk_unprepare(clk);

include/linux/clk.h

120

int devm_clk_notifier_register(struct device *dev, struct clk *clk,

include/linux/clk.h

1214

static inline int clk_drop_range(struct clk *clk)

include/linux/clk.h

1216

return clk_set_rate_range(clk, 0, ULONG_MAX);

include/linux/clk.h

1228

static inline struct clk *clk_get_optional(struct device *dev, const char *id)

include/linux/clk.h

1230

struct clk *clk = clk_get(dev, id);

include/linux/clk.h

1232

if (clk == ERR_PTR(-ENOENT))

include/linux/clk.h

1235

return clk;

include/linux/clk.h

1239

struct clk *of_clk_get(struct device_node *np, int index);

include/linux/clk.h

1240

struct clk *of_clk_get_by_name(struct device_node *np, const char *name);

include/linux/clk.h

1241

struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec);

include/linux/clk.h

1243

static inline struct clk *of_clk_get(struct device_node *np, int index)

include/linux/clk.h

1247

static inline struct clk *of_clk_get_by_name(struct device_node *np,

include/linux/clk.h

1252

static inline struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)

include/linux/clk.h

131

long clk_get_accuracy(struct clk *clk);

include/linux/clk.h

141

int clk_set_phase(struct clk *clk, int degrees);

include/linux/clk.h

150

int clk_get_phase(struct clk *clk);

include/linux/clk.h

161

int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den);

include/linux/clk.h

17

struct clk;

include/linux/clk.h

171

int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale);

include/linux/clk.h

184

bool clk_is_match(const struct clk *p, const struct clk *q);

include/linux/clk.h

202

int clk_rate_exclusive_get(struct clk *clk);

include/linux/clk.h

214

int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk);

include/linux/clk.h

229

void clk_rate_exclusive_put(struct clk *clk);

include/linux/clk.h

250

static inline int clk_notifier_register(struct clk *clk,

include/linux/clk.h

256

static inline int clk_notifier_unregister(struct clk *clk,

include/linux/clk.h

263

struct clk *clk,

include/linux/clk.h

269

static inline long clk_get_accuracy(struct clk *clk)

include/linux/clk.h

274

static inline long clk_set_phase(struct clk *clk, int phase)

include/linux/clk.h

279

static inline long clk_get_phase(struct clk *clk)

include/linux/clk.h

284

static inline int clk_set_duty_cycle(struct clk *clk, unsigned int num,

include/linux/clk.h

290

static inline unsigned int clk_get_scaled_duty_cycle(struct clk *clk,

include/linux/clk.h

296

static inline bool clk_is_match(const struct clk *p, const struct clk *q)

include/linux/clk.h

301

static inline int clk_rate_exclusive_get(struct clk *clk)

include/linux/clk.h

306

static inline int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk)

include/linux/clk.h

311

static inline void clk_rate_exclusive_put(struct clk *clk) {}

include/linux/clk.h

331

int clk_prepare(struct clk *clk);

include/linux/clk.h

342

void clk_unprepare(struct clk *clk);

include/linux/clk.h

363

bool clk_is_enabled_when_prepared(struct clk *clk);

include/linux/clk.h

365

static inline int clk_prepare(struct clk *clk)

include/linux/clk.h

371

static inline void clk_unprepare(struct clk *clk)

include/linux/clk.h

389

static inline bool clk_is_enabled_when_prepared(struct clk *clk)

include/linux/clk.h

411

struct clk *clk_get(struct device *dev, const char *id);

include/linux/clk.h

55

struct clk *clk;

include/linux/clk.h

575

struct clk *devm_clk_get(struct device *dev, const char *id);

include/linux/clk.h

596

struct clk *devm_clk_get_prepared(struct device *dev, const char *id);

include/linux/clk.h

616

struct clk *devm_clk_get_enabled(struct device *dev, const char *id);

include/linux/clk.h

639

struct clk *devm_clk_get_optional(struct device *dev, const char *id);

include/linux/clk.h

661

struct clk *devm_clk_get_optional_prepared(struct device *dev, const char *id);

include/linux/clk.h

683

struct clk *devm_clk_get_optional_enabled(struct device *dev, const char *id);

include/linux/clk.h

707

struct clk *devm_clk_get_optional_enabled_with_rate(struct device *dev,

include/linux/clk.h

72

struct clk *clk;

include/linux/clk.h

725

struct clk *devm_get_clk_from_child(struct device *dev,

include/linux/clk.h

738

int clk_enable(struct clk *clk);

include/linux/clk.h

766

void clk_disable(struct clk *clk);

include/linux/clk.h

791

unsigned long clk_get_rate(struct clk *clk);

include/linux/clk.h

803

void clk_put(struct clk *clk);

include/linux/clk.h

842

void devm_clk_put(struct device *dev, struct clk *clk);

include/linux/clk.h

870

long clk_round_rate(struct clk *clk, unsigned long rate);

include/linux/clk.h

882

int clk_set_rate(struct clk *clk, unsigned long rate);

include/linux/clk.h

89

struct clk *clk;

include/linux/clk.h

899

int clk_set_rate_exclusive(struct clk *clk, unsigned long rate);

include/linux/clk.h

911

bool clk_has_parent(const struct clk *clk, const struct clk *parent);

include/linux/clk.h

921

int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max);

include/linux/clk.h

930

int clk_set_min_rate(struct clk *clk, unsigned long rate);

include/linux/clk.h

939

int clk_set_max_rate(struct clk *clk, unsigned long rate);

include/linux/clk.h

948

int clk_set_parent(struct clk *clk, struct clk *parent);

include/linux/clk.h

957

struct clk *clk_get_parent(struct clk *clk);

include/linux/clk.h

974

struct clk *clk_get_sys(const char *dev_id, const char *con_id);

include/linux/clk.h

978

static inline struct clk *clk_get(struct device *dev, const char *id)

include/linux/clk/sunxi-ng.h

10

int sunxi_ccu_get_mmc_timing_mode(struct clk *clk);

include/linux/clk/sunxi-ng.h

9

int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode);

include/linux/clk/tegra.h

148

struct clk;

include/linux/clk/tegra.h

183

int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same);

include/linux/clk/tegra.h

192

tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same)

include/linux/clk/tegra.h

224

int tegra210_clk_emc_attach(struct clk *clk,

include/linux/clk/tegra.h

226

void tegra210_clk_emc_detach(struct clk *clk);

include/linux/clk/tegra.h

244

tegra210_clk_emc_attach(struct clk *clk,

include/linux/clk/tegra.h

260

static inline void tegra210_clk_emc_detach(struct clk *clk) {}

include/linux/clk/ti.h

251

int (*clkdm_clk_enable)(struct clockdomain *clkdm, struct clk *clk);

include/linux/clk/ti.h

253

struct clk *clk);

include/linux/clk/ti.h

266

int omap2_clk_allow_idle(struct clk *clk);

include/linux/clk/ti.h

267

int omap2_clk_deny_idle(struct clk *clk);

include/linux/clk/ti.h

270

int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate,

include/linux/clk/ti.h

274

unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk);

include/linux/clk/ti.h

318

bool ti_clk_is_in_standby(struct clk *clk);

include/linux/clk/zynq.h

14

struct clk *clk_register_zynq_pll(const char *name, const char *parent,

include/linux/clkdev.h

14

struct clk;

include/linux/clkdev.h

22

struct clk *clk;

include/linux/clkdev.h

30

.clk = c, \

include/linux/clkdev.h

36

struct clk_lookup *clkdev_create(struct clk *clk, const char *con_id,

include/linux/clkdev.h

44

int clk_register_clkdev(struct clk *, const char *, const char *);

include/linux/coresight.h

707

int coresight_get_enable_clocks(struct device *dev, struct clk **pclk,

include/linux/coresight.h

708

struct clk **atclk);

include/linux/cpufreq.h

63

struct clk *clk;

include/linux/dma/dw.h

35

struct clk *clk;

include/linux/fsl_devices.h

71

struct clk;

include/linux/fsl_devices.h

85

struct clk *clk;

include/linux/gpio/gpio-nomadik.h

57

struct clk *clk;

include/linux/interconnect-clk.h

12

struct clk *clk;

include/linux/lantiq.h

18

static inline struct clk *clk_get_fpi(void)

include/linux/mdio/mdio-xgene.h

90

struct clk *clk;

include/linux/mfd/arizona/core.h

146

struct clk *mclk[ARIZONA_NUM_MCLK];

include/linux/mfd/atmel-hlcdc.h

78

struct clk *periph_clk;

include/linux/mfd/atmel-hlcdc.h

79

struct clk *sys_clk;

include/linux/mfd/atmel-hlcdc.h

80

struct clk *slow_clk;

include/linux/mfd/davinci_voicecodec.h

17

struct clk;

include/linux/mfd/davinci_voicecodec.h

93

struct clk *clk;

include/linux/mfd/imx25-tsadc.h

11

struct clk *clk;

include/linux/mfd/imx25-tsadc.h

6

struct clk;

include/linux/mfd/mxs-lradc.h

159

struct clk *clk;

include/linux/mfd/rz-mtu3.h

148

struct clk *clk;

include/linux/mfd/stm32-lptimer.h

92

struct clk *clk;

include/linux/mfd/stm32-timers.h

161

struct clk *clk;

include/linux/mfd/twl6040.h

186

struct clk *clk32k;

include/linux/mfd/twl6040.h

187

struct clk *mclk;

include/linux/mfd/wcd934x/wcd934x.h

26

struct clk *extclk;

include/linux/mtd/nand-qpic-common.h

389

struct clk *core_clk;

include/linux/mtd/nand-qpic-common.h

390

struct clk *aon_clk;

include/linux/phy/omap_control_phy.h

29

struct clk *sys_clk;

include/linux/platform_data/asoc-ti-mcbsp.h

29

int (*force_ick_on)(struct clk *clk, bool force_on);

include/linux/platform_data/dmtimer-omap.h

27

struct clk *(*get_fclk)(struct omap_dm_timer *timer);

include/linux/platform_data/gpmc-omap.h

104

u32 clk;

include/linux/platform_data/mdio-bcm-unimac.h

11

struct clk *clk;

include/linux/platform_data/mdio-bcm-unimac.h

4

struct clk;

include/linux/platform_data/ti-sysc.h

149

struct clk;

include/linux/platform_data/ti-sysc.h

154

int (*init_clockdomain)(struct device *dev, struct clk *fck,

include/linux/platform_data/ti-sysc.h

155

struct clk *ick, struct ti_sysc_cookie *cookie);

include/linux/platform_data/x86/clk-lpss.h

15

struct clk *clk;

include/linux/platform_data/x86/int3472.h

117

struct clk *clk;

include/linux/platform_data/x86/int3472.h

69

#define to_int3472_device(clk) \

include/linux/platform_data/x86/int3472.h

70

container_of(clk, struct int3472_discrete_device, clock)

include/linux/pm_clock.h

20

struct clk;

include/linux/pm_clock.h

43

extern int pm_clk_add_clk(struct device *dev, struct clk *clk);

include/linux/pm_clock.h

45

extern void pm_clk_remove_clk(struct device *dev, struct clk *clk);

include/linux/pm_clock.h

69

static inline int pm_clk_add_clk(struct device *dev, struct clk *clk)

include/linux/pm_clock.h

79

static inline void pm_clk_remove_clk(struct device *dev, struct clk *clk)

include/linux/pm_opp.h

19

struct clk;

include/linux/posix-clock.h

111

struct posix_clock *clk;

include/linux/posix-clock.h

129

int posix_clock_register(struct posix_clock *clk, struct device *dev);

include/linux/posix-clock.h

140

void posix_clock_unregister(struct posix_clock *clk);

include/linux/posix-timers.h

35

static inline int clockid_to_fd(const clockid_t clk)

include/linux/posix-timers.h

37

return ~(clk >> 3);

include/linux/power/smartreflex.h

158

struct clk *fck;

include/linux/pruss_driver.h

102

struct clk *core_clk_mux;

include/linux/pruss_driver.h

103

struct clk *iep_clk_mux;

include/linux/pxa2xx_ssp.h

239

struct clk *clk;

include/linux/pxa2xx_ssp.h

24

struct clk;

include/linux/regmap.h

1287

int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);

include/linux/regmap.h

24

struct clk;

include/linux/remoteproc/st_slim_rproc.h

47

struct clk *clks[ST_SLIM_MAX_CLK];

include/linux/rtsx_pci.h

1105

int (*conv_clk_and_div_n)(int clk, int dir);

include/linux/sh_clk.h

103

long clk_rate_table_round(struct clk *clk,

include/linux/sh_clk.h

107

int clk_rate_table_find(struct clk *clk,

include/linux/sh_clk.h

111

long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,

include/linux/sh_clk.h

114

long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min,

include/linux/sh_clk.h

13

struct clk;

include/linux/sh_clk.h

138

int sh_clk_mstp_register(struct clk *clks, int nr);

include/linux/sh_clk.h

146

static inline int __deprecated sh_clk_mstp32_register(struct clk *clks, int nr)

include/linux/sh_clk.h

163

void (*kick)(struct clk *clk);

include/linux/sh_clk.h

168

int sh_clk_div4_register(struct clk *clks, int nr,

include/linux/sh_clk.h

170

int sh_clk_div4_enable_register(struct clk *clks, int nr,

include/linux/sh_clk.h

172

int sh_clk_div4_reparent_register(struct clk *clks, int nr,

include/linux/sh_clk.h

197

int sh_clk_div6_register(struct clk *clks, int nr);

include/linux/sh_clk.h

198

int sh_clk_div6_reparent_register(struct clk *clks, int nr);

include/linux/sh_clk.h

200

#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }

include/linux/sh_clk.h

201

#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }

include/linux/sh_clk.h

202

#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }

include/linux/sh_clk.h

211

int sh_clk_fsidiv_register(struct clk *clks, int nr);

include/linux/sh_clk.h

24

void (*init)(struct clk *clk);

include/linux/sh_clk.h

26

int (*enable)(struct clk *clk);

include/linux/sh_clk.h

27

void (*disable)(struct clk *clk);

include/linux/sh_clk.h

28

unsigned long (*recalc)(struct clk *clk);

include/linux/sh_clk.h

29

int (*set_rate)(struct clk *clk, unsigned long rate);

include/linux/sh_clk.h

30

int (*set_parent)(struct clk *clk, struct clk *parent);

include/linux/sh_clk.h

31

long (*round_rate)(struct clk *clk, unsigned long rate);

include/linux/sh_clk.h

40

struct clk *parent;

include/linux/sh_clk.h

41

struct clk **parent_table; /* list of parents to */

include/linux/sh_clk.h

81

unsigned long followparent_recalc(struct clk *);

include/linux/sh_clk.h

83

void propagate_rate(struct clk *);

include/linux/sh_clk.h

84

int clk_reparent(struct clk *child, struct clk *parent);

include/linux/sh_clk.h

85

int clk_register(struct clk *);

include/linux/sh_clk.h

86

void clk_unregister(struct clk *);

include/linux/sh_clk.h

97

void clk_rate_table_build(struct clk *clk,

include/linux/soc/qcom/geni-se.h

44

struct clk;

include/linux/soc/qcom/geni-se.h

71

struct clk *clk;

include/linux/spi/at73c213.h

22

struct clk *dac_clk;

include/linux/spi/mxs-spi.h

123

struct clk *clk;

include/linux/stmmac.h

257

int (*set_clk_tx_rate)(void *priv, struct clk *clk_tx_i,

include/linux/stmmac.h

282

struct clk *stmmac_clk;

include/linux/stmmac.h

283

struct clk *pclk;

include/linux/stmmac.h

284

struct clk *clk_ptp_ref;

include/linux/stmmac.h

285

struct clk *clk_tx_i; /* clk_tx_i to MAC core */

include/linux/stmmac.h

81

struct clk;

include/linux/usb/musb.h

24

struct clk;

include/linux/usb/tegra_usb_phy.h

73

struct clk *clk;

include/linux/usb/tegra_usb_phy.h

74

struct clk *pll_u;

include/linux/usb/tegra_usb_phy.h

75

struct clk *pad_clk;

include/media/v4l2-common.h

100

struct clk;

include/media/v4l2-common.h

635

struct clk *__devm_v4l2_sensor_clk_get(struct device *dev, const char *id,

include/media/v4l2-common.h

671

static inline struct clk *

include/media/v4l2-common.h

701

static inline struct clk *

include/pcmcia/soc_common.h

33

struct clk *clk;

include/soc/at91/atmel_tcb.h

34

struct clk;

include/soc/at91/atmel_tcb.h

74

struct clk *clk[3];

include/soc/at91/atmel_tcb.h

75

struct clk *slow_clk;

include/soc/fsl/qe/qe.h

339

int qe_usb_clock_set(enum qe_clock clk, int rate);

include/soc/fsl/qe/qe.h

80

static inline bool qe_clock_is_brg(enum qe_clock clk)

include/soc/fsl/qe/qe.h

82

return clk >= QE_BRG1 && clk <= QE_BRG16;

include/soc/tegra/mc.h

18

struct clk;

include/soc/tegra/mc.h

208

struct clk *clk;

include/soc/tegra/pmc.h

161

unsigned int id, struct clk *clk,

include/soc/tegra/pmc.h

17

struct clk;

include/soc/tegra/pmc.h

171

int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk,

include/soc/tegra/pmc.h

209

struct clk *clk,

include/soc/tegra/pmc.h

243

struct clk *clk,

include/sound/ac97/codec.h

19

struct clk;

include/sound/ac97/codec.h

51

struct clk *clk;

include/sound/cs48l32.h

42

struct clk *mclk1;

include/sound/simple_card_utils.h

237

if (dai->clk)

include/sound/simple_card_utils.h

238

dev_dbg(dev, "%s clk %luHz\n", name, clk_get_rate(dai->clk));

include/sound/simple_card_utils.h

242

if (dai->clk || dai->sysclk)

include/sound/simple_card_utils.h

33

struct clk *clk;

include/sound/soc-dapm.h

567

struct clk *clk;

include/sound/wm8962.h

37

struct clk *mclk;

include/trace/events/clk.h

15

DECLARE_EVENT_CLASS(clk,

include/trace/events/clk.h

32

DEFINE_EVENT(clk, clk_enable,

include/trace/events/clk.h

39

DEFINE_EVENT(clk, clk_enable_complete,

include/trace/events/clk.h

46

DEFINE_EVENT(clk, clk_disable,

include/trace/events/clk.h

53

DEFINE_EVENT(clk, clk_disable_complete,

include/trace/events/clk.h

6

#define TRACE_SYSTEM clk

include/trace/events/clk.h

60

DEFINE_EVENT(clk, clk_prepare,

include/trace/events/clk.h

67

DEFINE_EVENT(clk, clk_prepare_complete,

include/trace/events/clk.h

74

DEFINE_EVENT(clk, clk_unprepare,

include/trace/events/clk.h

81

DEFINE_EVENT(clk, clk_unprepare_complete,

include/uapi/linux/serial.h

185

__u32 clk;

include/ufs/ufshcd.h

1308

void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);

include/ufs/ufshcd.h

261

struct clk *clk;

include/video/pxa168fb.h

64

struct clk *clk;

kernel/time/posix-clock.c

100

down_read(&clk->rwsem);

kernel/time/posix-clock.c

102

if (clk->zombie) {

kernel/time/posix-clock.c

111

pccontext->clk = clk;

kernel/time/posix-clock.c

113

if (clk->ops.open) {

kernel/time/posix-clock.c

114

err = clk->ops.open(pccontext, fp->f_mode);

kernel/time/posix-clock.c

122

get_device(clk->dev);

kernel/time/posix-clock.c

125

up_read(&clk->rwsem);

kernel/time/posix-clock.c

132

struct posix_clock *clk;

kernel/time/posix-clock.c

137

clk = pccontext->clk;

kernel/time/posix-clock.c

139

if (clk->ops.release)

kernel/time/posix-clock.c

140

err = clk->ops.release(pccontext);

kernel/time/posix-clock.c

142

put_device(clk->dev);

kernel/time/posix-clock.c

160

int posix_clock_register(struct posix_clock *clk, struct device *dev)

kernel/time/posix-clock.c

164

init_rwsem(&clk->rwsem);

kernel/time/posix-clock.c

166

cdev_init(&clk->cdev, &posix_clock_file_operations);

kernel/time/posix-clock.c

167

err = cdev_device_add(&clk->cdev, dev);

kernel/time/posix-clock.c

173

clk->cdev.owner = clk->ops.owner;

kernel/time/posix-clock.c

174

clk->dev = dev;

kernel/time/posix-clock.c

180

void posix_clock_unregister(struct posix_clock *clk)

kernel/time/posix-clock.c

182

cdev_device_del(&clk->cdev, clk->dev);

kernel/time/posix-clock.c

184

down_write(&clk->rwsem);

kernel/time/posix-clock.c

185

clk->zombie = true;

kernel/time/posix-clock.c

186

up_write(&clk->rwsem);

kernel/time/posix-clock.c

188

put_device(clk->dev);

kernel/time/posix-clock.c

194

struct posix_clock *clk;

kernel/time/posix-clock.c

209

cd->clk = get_posix_clock(fp);

kernel/time/posix-clock.c

211

err = cd->clk ? 0 : -ENODEV;

kernel/time/posix-clock.c

220

put_posix_clock(cd->clk);

kernel/time/posix-clock.c

23

struct posix_clock *clk = pccontext->clk;

kernel/time/posix-clock.c

238

if (cd.clk->ops.clock_adjtime)

kernel/time/posix-clock.c

239

err = cd.clk->ops.clock_adjtime(cd.clk, tx);

kernel/time/posix-clock.c

25

down_read(&clk->rwsem);

kernel/time/posix-clock.c

257

if (cd.clk->ops.clock_gettime)

kernel/time/posix-clock.c

258

err = cd.clk->ops.clock_gettime(cd.clk, ts);

kernel/time/posix-clock.c

27

if (!clk->zombie)

kernel/time/posix-clock.c

276

if (cd.clk->ops.clock_getres)

kernel/time/posix-clock.c

277

err = cd.clk->ops.clock_getres(cd.clk, ts);

kernel/time/posix-clock.c

28

return clk;

kernel/time/posix-clock.c

30

up_read(&clk->rwsem);

kernel/time/posix-clock.c

303

if (cd.clk->ops.clock_settime)

kernel/time/posix-clock.c

304

err = cd.clk->ops.clock_settime(cd.clk, ts);

kernel/time/posix-clock.c

35

static void put_posix_clock(struct posix_clock *clk)

kernel/time/posix-clock.c

37

up_read(&clk->rwsem);

kernel/time/posix-clock.c

44

struct posix_clock *clk = get_posix_clock(fp);

kernel/time/posix-clock.c

47

if (!clk)

kernel/time/posix-clock.c

50

if (clk->ops.read)

kernel/time/posix-clock.c

51

err = clk->ops.read(pccontext, fp->f_flags, buf, count);

kernel/time/posix-clock.c

53

put_posix_clock(clk);

kernel/time/posix-clock.c

61

struct posix_clock *clk = get_posix_clock(fp);

kernel/time/posix-clock.c

64

if (!clk)

kernel/time/posix-clock.c

67

if (clk->ops.poll)

kernel/time/posix-clock.c

68

result = clk->ops.poll(pccontext, fp, wait);

kernel/time/posix-clock.c

70

put_posix_clock(clk);

kernel/time/posix-clock.c

79

struct posix_clock *clk = get_posix_clock(fp);

kernel/time/posix-clock.c

82

if (!clk)

kernel/time/posix-clock.c

85

if (clk->ops.ioctl)

kernel/time/posix-clock.c

86

err = clk->ops.ioctl(pccontext, cmd, arg);

kernel/time/posix-clock.c

88

put_posix_clock(clk);

kernel/time/posix-clock.c

96

struct posix_clock *clk =

kernel/time/timekeeping.c

3090

struct kobject *clk = kobject_create_and_add(id, auxo);

kernel/time/timekeeping.c

3092

if (!clk) {

kernel/time/timekeeping.c

3097

ret = sysfs_create_group(clk, &aux_clock_enable_attr_group);

kernel/time/timer.c

1020

unsigned long clk = 0, flags, bucket_expiry;

kernel/time/timer.c

1068

clk = base->clk;

kernel/time/timer.c

1069

idx = calc_wheel_index(expires, clk, &bucket_expiry);

kernel/time/timer.c

1133

if (idx != UINT_MAX && clk == base->clk)

kernel/time/timer.c

1773

unsigned long baseclk = base->clk - 1;

kernel/time/timer.c

1810

unsigned long clk = base->clk = base->next_expiry;

kernel/time/timer.c

1816

idx = (clk & LVL_MASK) + i * LVL_SIZE;

kernel/time/timer.c

1824

if (clk & LVL_CLK_MASK)

kernel/time/timer.c

1827

clk >>= LVL_CLK_SHIFT;

kernel/time/timer.c

1838

unsigned clk)

kernel/time/timer.c

1840

unsigned pos, start = offset + clk;

kernel/time/timer.c

1859

unsigned long clk, next, adj;

kernel/time/timer.c

1862

next = base->clk + TIMER_NEXT_MAX_DELTA;

kernel/time/timer.c

1863

clk = base->clk;

kernel/time/timer.c

1865

int pos = next_pending_bucket(base, offset, clk & LVL_MASK);

kernel/time/timer.c

1866

unsigned long lvl_clk = clk & LVL_CLK_MASK;

kernel/time/timer.c

1869

unsigned long tmp = clk + (unsigned long) pos;

kernel/time/timer.c

1919

clk >>= LVL_CLK_SHIFT;

kernel/time/timer.c

1920

clk += adj;

kernel/time/timer.c

1925

base->timers_pending = !(next == base->clk + TIMER_NEXT_MAX_DELTA);

kernel/time/timer.c

2353

while (time_after_eq(jiffies, base->clk) &&

kernel/time/timer.c

2369

base->clk++;

kernel/time/timer.c

2505

base->clk = jiffies;

kernel/time/timer.c

2506

base->next_expiry = base->clk + TIMER_NEXT_MAX_DELTA;

kernel/time/timer.c

2560

base->clk = jiffies;

kernel/time/timer.c

2561

base->next_expiry = base->clk + TIMER_NEXT_MAX_DELTA;

kernel/time/timer.c

257

unsigned long clk;

kernel/time/timer.c

541

static int calc_wheel_index(unsigned long expires, unsigned long clk,

kernel/time/timer.c

544

unsigned long delta = expires - clk;

kernel/time/timer.c

564

idx = clk & LVL_MASK;

kernel/time/timer.c

565

*bucket_expiry = clk;

kernel/time/timer.c

572

expires = clk + WHEEL_TIMEOUT_MAX;

kernel/time/timer.c

644

idx = calc_wheel_index(timer->expires, base->clk, &bucket_expiry);

kernel/time/timer.c

954

if (time_before_eq(basej, base->clk))

kernel/time/timer.c

962

base->clk = basej;

kernel/time/timer.c

964

if (WARN_ON_ONCE(time_before(base->next_expiry, base->clk)))

kernel/time/timer.c

966

base->clk = base->next_expiry;

lib/vdso/gettimeofday.c

119

clockid_t clk, struct __kernel_timespec *ts)

lib/vdso/gettimeofday.c

122

const struct timens_offset *offs = &vcns->offset[clk];

lib/vdso/gettimeofday.c

128

if (clk != CLOCK_MONOTONIC_RAW)

lib/vdso/gettimeofday.c

136

if (!vdso_get_timestamp(vd, vc, clk, &sec, &ns))

lib/vdso/gettimeofday.c

151

clockid_t clk, struct __kernel_timespec *ts)

lib/vdso/gettimeofday.c

175

return do_hres_timens(vd, vc, clk, ts);

lib/vdso/gettimeofday.c

180

if (!vdso_get_timestamp(vd, vc, clk, &sec, &ns))

lib/vdso/gettimeofday.c

191

clockid_t clk, struct __kernel_timespec *ts)

lib/vdso/gettimeofday.c

194

const struct timens_offset *offs = &vcns->offset[clk];

lib/vdso/gettimeofday.c

201

vdso_ts = &vc->basetime[clk];

lib/vdso/gettimeofday.c

220

clockid_t clk, struct __kernel_timespec *ts)

lib/vdso/gettimeofday.c

222

const struct vdso_timestamp *vdso_ts = &vc->basetime[clk];

lib/vdso/gettimeofday.c

233

return do_coarse_timens(vd, vc, clk, ts);

lib/vsprintf.c

2029

char *clock(char *buf, char *end, struct clk *clk, struct printf_spec spec,

lib/vsprintf.c

2035

if (check_pointer(&buf, end, clk, spec))

lib/vsprintf.c

2039

return string(buf, end, __clk_get_name(clk), spec);

lib/vsprintf.c

2041

return ptr_to_id(buf, end, clk, spec);

net/rfkill/rfkill-gpio.c

131

rfkill->clk = devm_clk_get(&pdev->dev, NULL);

net/rfkill/rfkill-gpio.c

26

struct clk *clk;

net/rfkill/rfkill-gpio.c

35

if (!blocked && !IS_ERR(rfkill->clk) && !rfkill->clk_enabled) {

net/rfkill/rfkill-gpio.c

36

int ret = clk_enable(rfkill->clk);

net/rfkill/rfkill-gpio.c

45

if (blocked && !IS_ERR(rfkill->clk) && rfkill->clk_enabled)

net/rfkill/rfkill-gpio.c

46

clk_disable(rfkill->clk);

rust/helpers/clk.c

10

struct clk *rust_helper_clk_get(struct device *dev, const char *id)

rust/helpers/clk.c

15

void rust_helper_clk_put(struct clk *clk)

rust/helpers/clk.c

17

clk_put(clk);

rust/helpers/clk.c

20

int rust_helper_clk_enable(struct clk *clk)

rust/helpers/clk.c

22

return clk_enable(clk);

rust/helpers/clk.c

25

void rust_helper_clk_disable(struct clk *clk)

rust/helpers/clk.c

27

clk_disable(clk);

rust/helpers/clk.c

30

unsigned long rust_helper_clk_get_rate(struct clk *clk)

rust/helpers/clk.c

32

return clk_get_rate(clk);

rust/helpers/clk.c

35

int rust_helper_clk_set_rate(struct clk *clk, unsigned long rate)

rust/helpers/clk.c

37

return clk_set_rate(clk, rate);

rust/helpers/clk.c

42

int rust_helper_clk_prepare(struct clk *clk)

rust/helpers/clk.c

44

return clk_prepare(clk);

rust/helpers/clk.c

47

void rust_helper_clk_unprepare(struct clk *clk)

rust/helpers/clk.c

49

clk_unprepare(clk);

rust/helpers/clk.c

53

struct clk *rust_helper_clk_get_optional(struct device *dev, const char *id)

rust/helpers/clk.c

58

int rust_helper_clk_prepare_enable(struct clk *clk)

rust/helpers/clk.c

60

return clk_prepare_enable(clk);

rust/helpers/clk.c

63

void rust_helper_clk_disable_unprepare(struct clk *clk)

rust/helpers/clk.c

65

clk_disable_unprepare(clk);

sound/ac97/bus.c

393

clk_disable(codec->clk);

sound/ac97/bus.c

395

clk_disable_unprepare(codec->clk);

sound/ac97/bus.c

408

ret = clk_enable(codec->clk);

sound/ac97/bus.c

410

ret = clk_prepare_enable(codec->clk);

sound/ac97/bus.c

432

adev->clk = clk_get(&adev->dev, "ac97_clk");

sound/ac97/bus.c

433

if (IS_ERR(adev->clk))

sound/ac97/bus.c

434

return PTR_ERR(adev->clk);

sound/ac97/bus.c

436

ret = clk_prepare_enable(adev->clk);

sound/ac97/bus.c

438

clk_put(adev->clk);

sound/ac97/bus.c

445

clk_disable_unprepare(adev->clk);

sound/ac97/bus.c

446

clk_put(adev->clk);

sound/arm/pxa2xx-ac97-lib.c

30

static struct clk *ac97_clk;

sound/arm/pxa2xx-ac97-lib.c

31

static struct clk *ac97conf_clk;

sound/atmel/ac97c.c

36

struct clk *pclk;

sound/atmel/ac97c.c

698

struct clk *pclk;

sound/pci/asihpi/hpi_internal.h

1351

struct hpi_control_cache_sampleclock clk;

sound/pci/asihpi/hpicmn.c

436

phr->u.c.param1 = pC->u.clk.source;

sound/pci/asihpi/hpicmn.c

438

if (pC->u.clk.source_index ==

sound/pci/asihpi/hpicmn.c

444

phr->u.c.param1 = pC->u.clk.source_index;

sound/pci/asihpi/hpicmn.c

446

phr->u.c.param1 = pC->u.clk.sample_rate;

sound/pci/asihpi/hpicmn.c

602

pC->u.clk.source = (u16)phm->u.c.param1;

sound/pci/asihpi/hpicmn.c

604

pC->u.clk.source_index = (u16)phm->u.c.param1;

sound/pci/asihpi/hpicmn.c

606

pC->u.clk.sample_rate = phm->u.c.param1;

sound/pci/es1968.c

2463

u8 data, clk, wren, most;

sound/pci/es1968.c

2468

{ .data = 6, .clk = 7, .wren = 8, .most = 9, .name = "SF64-PCE2" },

sound/pci/es1968.c

2469

{ .data = 7, .clk = 8, .wren = 6, .most = 10, .name = "M56VAP" },

sound/pci/es1968.c

2483

val |= (pins & TEA575X_CLK) ? (1 << gpio.clk) : 0;

sound/pci/es1968.c

2512

outw(~((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren)),

sound/pci/es1968.c

2514

outw(odir | (1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren),

sound/pci/es1968.c

2517

outw(~((1 << gpio.clk) | (1 << gpio.wren) | (1 << gpio.data) | (1 << gpio.most)),

sound/pci/es1968.c

2520

| (1 << gpio.clk) | (1 << gpio.wren), io + IO_DIR);

sound/pci/fm801.c

739

u8 data, clk, wren, most;

sound/pci/fm801.c

744

{ .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },

sound/pci/fm801.c

745

{ .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },

sound/pci/fm801.c

746

{ .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },

sound/pci/fm801.c

759

FM801_GPIO_GP(gpio.clk) |

sound/pci/fm801.c

763

reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;

sound/pci/fm801.c

794

FM801_GPIO_GS(gpio.clk) |

sound/pci/fm801.c

801

FM801_GPIO_GD(gpio.clk) |

sound/pci/fm801.c

803

FM801_GPIO_GP(gpio.clk) |

sound/pci/fm801.c

815

FM801_GPIO_GD(gpio.clk) |

sound/pci/fm801.c

816

FM801_GPIO_GP(gpio.clk));

sound/pci/ice1712/aureon.c

474

unsigned int mosi, clk;

sound/pci/ice1712/aureon.c

482

clk = PRODIGY_SPI_CLK;

sound/pci/ice1712/aureon.c

487

clk = AUREON_SPI_CLK;

sound/pci/ice1712/aureon.c

497

tmp &= ~clk;

sound/pci/ice1712/aureon.c

506

tmp |= clk;

sound/pci/ice1712/aureon.c

511

tmp &= ~clk;

sound/pci/ice1712/aureon.c

515

tmp |= clk;

sound/pci/ice1712/ews.c

42

static void ewx_i2c_setlines(struct snd_i2c_bus *bus, int clk, int data)

sound/pci/ice1712/ews.c

46

if (clk)

sound/pci/ice1712/revo.c

110

static void revo_i2c_setlines(struct snd_i2c_bus *bus, int clk, int data)

sound/pci/ice1712/revo.c

115

if (clk)

sound/soc/adi/axi-i2s.c

211

i2s->clk = devm_clk_get(&pdev->dev, "axi");

sound/soc/adi/axi-i2s.c

212

if (IS_ERR(i2s->clk))

sound/soc/adi/axi-i2s.c

213

return PTR_ERR(i2s->clk);

sound/soc/adi/axi-i2s.c

219

ret = clk_prepare_enable(i2s->clk);

sound/soc/adi/axi-i2s.c

273

clk_disable_unprepare(i2s->clk);

sound/soc/adi/axi-i2s.c

281

clk_disable_unprepare(i2s->clk);

sound/soc/adi/axi-i2s.c

42

struct clk *clk;

sound/soc/adi/axi-i2s.c

43

struct clk *clk_ref;

sound/soc/adi/axi-spdif.c

202

spdif->clk = devm_clk_get(&pdev->dev, "axi");

sound/soc/adi/axi-spdif.c

203

if (IS_ERR(spdif->clk))

sound/soc/adi/axi-spdif.c

204

return PTR_ERR(spdif->clk);

sound/soc/adi/axi-spdif.c

210

ret = clk_prepare_enable(spdif->clk);

sound/soc/adi/axi-spdif.c

238

clk_disable_unprepare(spdif->clk);

sound/soc/adi/axi-spdif.c

246

clk_disable_unprepare(spdif->clk);

sound/soc/adi/axi-spdif.c

39

struct clk *clk;

sound/soc/adi/axi-spdif.c

40

struct clk *clk_ref;

sound/soc/amd/acp-da7219-max98357a.c

46

static struct clk *da7219_dai_wclk;

sound/soc/amd/acp-da7219-max98357a.c

47

static struct clk *da7219_dai_bclk;

sound/soc/amd/acp-da7219-max98357a.c

48

static struct clk *rt5682_dai_wclk;

sound/soc/amd/acp-da7219-max98357a.c

49

static struct clk *rt5682_dai_bclk;

sound/soc/amd/acp/acp-mach.h

75

struct clk *wclk;

sound/soc/amd/acp/acp-mach.h

76

struct clk *bclk;

sound/soc/amd/acp3x-rt5682-max9836.c

42

static struct clk *rt5682_dai_wclk;

sound/soc/amd/acp3x-rt5682-max9836.c

43

static struct clk *rt5682_dai_bclk;

sound/soc/apple/mca.c

133

struct clk *clk_parent;

sound/soc/atmel/atmel-classd.c

31

struct clk *pclk;

sound/soc/atmel/atmel-classd.c

32

struct clk *gclk;

sound/soc/atmel/atmel-i2s.c

199

struct clk *pclk;

sound/soc/atmel/atmel-i2s.c

200

struct clk *gclk;

sound/soc/atmel/atmel-i2s.c

577

struct clk *muxclk;

sound/soc/atmel/atmel-pdmic.c

30

struct clk *pclk;

sound/soc/atmel/atmel-pdmic.c

31

struct clk *gclk;

sound/soc/atmel/atmel_ssc_dai.c

283

ret = clk_enable(ssc_p->ssc->clk);

sound/soc/atmel/atmel_ssc_dai.c

287

ssc_p->mck_rate = clk_get_rate(ssc_p->ssc->clk);

sound/soc/atmel/atmel_ssc_dai.c

371

clk_disable(ssc_p->ssc->clk);

sound/soc/atmel/atmel_ssc_dai.c

689

clk_disable(ssc_p->ssc->clk);

sound/soc/atmel/mchp-i2s-mcc.c

250

struct clk *pclk;

sound/soc/atmel/mchp-i2s-mcc.c

251

struct clk *gclk;

sound/soc/atmel/mchp-i2s-mcc.c

402

static int mchp_i2s_mcc_clk_get_rate_diff(struct clk *clk,

sound/soc/atmel/mchp-i2s-mcc.c

404

struct clk **best_clk,

sound/soc/atmel/mchp-i2s-mcc.c

411

round_rate = clk_round_rate(clk, rate);

sound/soc/atmel/mchp-i2s-mcc.c

417

*best_clk = clk;

sound/soc/atmel/mchp-i2s-mcc.c

433

struct clk *best_clk = NULL;

sound/soc/atmel/mchp-pdmc.c

119

struct clk *pclk;

sound/soc/atmel/mchp-pdmc.c

120

struct clk *gclk;

sound/soc/atmel/mchp-spdifrx.c

305

struct clk *pclk;

sound/soc/atmel/mchp-spdifrx.c

306

struct clk *gclk;

sound/soc/atmel/mchp-spdiftx.c

195

struct clk *pclk;

sound/soc/atmel/mchp-spdiftx.c

196

struct clk *gclk;

sound/soc/bcm/bcm2835-i2s.c

123

struct clk *clk;

sound/soc/bcm/bcm2835-i2s.c

138

clk_prepare_enable(dev->clk);

sound/soc/bcm/bcm2835-i2s.c

149

clk_disable_unprepare(dev->clk);

sound/soc/bcm/bcm2835-i2s.c

421

ret = clk_set_rate(dev->clk, bclk_rate);

sound/soc/bcm/bcm2835-i2s.c

843

dev->clk = devm_clk_get(&pdev->dev, NULL);

sound/soc/bcm/bcm2835-i2s.c

844

if (IS_ERR(dev->clk))

sound/soc/bcm/bcm2835-i2s.c

845

return dev_err_probe(&pdev->dev, PTR_ERR(dev->clk),

sound/soc/bcm/bcm63xx-i2s-whistler.c

230

struct clk *i2s_clk;

sound/soc/bcm/bcm63xx-i2s.h

78

struct clk *i2s_clk;

sound/soc/bcm/cygnus-ssp.c

487

struct clk *ch_clk;

sound/soc/bcm/cygnus-ssp.h

115

struct clk *audio_clk[CYGNUS_AUIDO_MAX_NUM_CLKS];

sound/soc/cirrus/ep93xx-i2s.c

74

struct clk *mclk;

sound/soc/cirrus/ep93xx-i2s.c

75

struct clk *sclk;

sound/soc/cirrus/ep93xx-i2s.c

76

struct clk *lrclk;

sound/soc/codecs/adau1372.c

37

struct clk *mclk;

sound/soc/codecs/adau1373.c

845

const char *clk;

sound/soc/codecs/adau1373.c

853

clk = "SYSCLK1";

sound/soc/codecs/adau1373.c

855

clk = "SYSCLK2";

sound/soc/codecs/adau1373.c

857

return snd_soc_dapm_widget_name_cmp(source, clk) == 0;

sound/soc/codecs/adau17x1.h

33

struct clk;

sound/soc/codecs/adau17x1.h

38

struct clk *mclk;

sound/soc/codecs/adav80x.c

216

const char *clk;

sound/soc/codecs/adav80x.c

220

clk = "PLL1";

sound/soc/codecs/adav80x.c

223

clk = "PLL2";

sound/soc/codecs/adav80x.c

226

clk = "OSC";

sound/soc/codecs/adav80x.c

232

return snd_soc_dapm_widget_name_cmp(source, clk) == 0;

sound/soc/codecs/ak4642.c

145

struct clk *mcko;

sound/soc/codecs/ak4642.c

605

static struct clk *ak4642_of_parse_mcko(struct device *dev)

sound/soc/codecs/ak4642.c

608

struct clk *clk;

sound/soc/codecs/ak4642.c

621

clk = clk_register_fixed_rate(dev, clk_name, parent_clk_name, 0, rate);

sound/soc/codecs/ak4642.c

622

if (!IS_ERR(clk))

sound/soc/codecs/ak4642.c

623

of_clk_add_provider(np, of_clk_src_simple_get, clk);

sound/soc/codecs/ak4642.c

625

return clk;

sound/soc/codecs/ak4642.c

637

struct clk *mcko = NULL;

sound/soc/codecs/arizona.c

1275

unsigned int clk, unsigned int freq)

sound/soc/codecs/arizona.c

1282

switch (clk) {

sound/soc/codecs/arizona.c

1372

int *clk;

sound/soc/codecs/arizona.c

1378

clk = &priv->sysclk;

sound/soc/codecs/arizona.c

1384

clk = &priv->asyncclk;

sound/soc/codecs/arizona.c

1423

*clk = freq;

sound/soc/codecs/arizona.c

1429

*clk = freq;

sound/soc/codecs/arizona.c

1625

switch (dai_priv->clk) {

sound/soc/codecs/arizona.c

1714

switch (dai_priv->clk) {

sound/soc/codecs/arizona.c

1745

arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);

sound/soc/codecs/arizona.c

1925

if (clk_id == dai_priv->clk)

sound/soc/codecs/arizona.c

1941

routes[0].source = arizona_dai_clk_str(dai_priv->clk);

sound/soc/codecs/arizona.c

1942

routes[1].source = arizona_dai_clk_str(dai_priv->clk);

sound/soc/codecs/arizona.c

1949

dai_priv->clk = clk_id;

sound/soc/codecs/arizona.c

2044

dai_priv->clk = ARIZONA_CLK_SYSCLK;

sound/soc/codecs/arizona.c

2382

struct clk *clk;

sound/soc/codecs/arizona.c

2397

clk = arizona->mclk[ARIZONA_MCLK1];

sound/soc/codecs/arizona.c

2400

clk = arizona->mclk[ARIZONA_MCLK2];

sound/soc/codecs/arizona.c

2407

return clk_prepare_enable(clk);

sound/soc/codecs/arizona.c

2409

clk_disable_unprepare(clk);

sound/soc/codecs/arizona.h

71

int clk;

sound/soc/codecs/cs4234.c

36

struct clk *mclk;

sound/soc/codecs/cs4271.c

167

struct clk *clk;

sound/soc/codecs/cs4271.c

510

clk_disable_unprepare(cs4271->clk);

sound/soc/codecs/cs4271.c

528

ret = clk_prepare_enable(cs4271->clk);

sound/soc/codecs/cs4271.c

551

clk_disable_unprepare(cs4271->clk);

sound/soc/codecs/cs4271.c

594

ret = clk_prepare_enable(cs4271->clk);

sound/soc/codecs/cs4271.c

629

clk_disable_unprepare(cs4271->clk);

sound/soc/codecs/cs4271.c

644

clk_disable_unprepare(cs4271->clk);

sound/soc/codecs/cs4271.c

679

cs4271->clk = devm_clk_get_optional(dev, "mclk");

sound/soc/codecs/cs4271.c

680

if (IS_ERR(cs4271->clk))

sound/soc/codecs/cs4271.c

681

return dev_err_probe(dev, PTR_ERR(cs4271->clk), "Failed to get mclk\n");

sound/soc/codecs/cs42l42.c

664

int cs42l42_pll_config(struct snd_soc_component *component, unsigned int clk,

sound/soc/codecs/cs42l42.c

672

if (pll_ratio_table[cs42l42->pll_config].sclk == clk)

sound/soc/codecs/cs42l42.c

683

if (pll_ratio_table[i].sclk == clk) {

sound/soc/codecs/cs42l42.h

69

unsigned int clk, unsigned int sample_rate);

sound/soc/codecs/cs42l43.h

35

struct clk;

sound/soc/codecs/cs42l43.h

50

struct clk *mclk;

sound/soc/codecs/cs42l51.c

46

struct clk *mclk_handle;

sound/soc/codecs/cs42l52.c

828

u32 clk = 0;

sound/soc/codecs/cs42l52.c

835

clk |= (clk_map_table[index].speed << CLK_SPEED_SHIFT) |

sound/soc/codecs/cs42l52.c

841

snd_soc_component_write(component, CS42L52_CLK_CTL, clk);

sound/soc/codecs/cs42l84.c

370

u32 clk;

sound/soc/codecs/cs42l84.c

373

clk = cs42l84->bclk;

sound/soc/codecs/cs42l84.c

377

if (pll_ratio_table[cs42l84->pll_config].bclk == clk)

sound/soc/codecs/cs42l84.c

384

if (pll_ratio_table[i].bclk == clk) {

sound/soc/codecs/cs42l84.c

394

fsync = clk / cs42l84->srate;

sound/soc/codecs/cs42l84.c

395

if (((fsync * cs42l84->srate) != clk)

sound/soc/codecs/cs42l84.c

399

clk, cs42l84->srate);

sound/soc/codecs/cs42xx8.c

43

struct clk *clk;

sound/soc/codecs/cs42xx8.c

541

cs42xx8->clk = devm_clk_get(dev, "mclk");

sound/soc/codecs/cs42xx8.c

542

if (IS_ERR(cs42xx8->clk)) {

sound/soc/codecs/cs42xx8.c

544

PTR_ERR(cs42xx8->clk));

sound/soc/codecs/cs42xx8.c

548

cs42xx8->sysclk = clk_get_rate(cs42xx8->clk);

sound/soc/codecs/cs42xx8.c

614

ret = clk_prepare_enable(cs42xx8->clk);

sound/soc/codecs/cs42xx8.c

647

clk_disable_unprepare(cs42xx8->clk);

sound/soc/codecs/cs42xx8.c

663

clk_disable_unprepare(cs42xx8->clk);

sound/soc/codecs/cs47l92.c

198

ret = clk_prepare_enable(madera->mclk[val].clk);

sound/soc/codecs/cs47l92.c

203

clk_disable_unprepare(madera->mclk[val].clk);

sound/soc/codecs/cs48l32.c

1459

int clk_freq_sel, *clk;

sound/soc/codecs/cs48l32.c

1465

clk = &cs48l32_codec->sysclk;

sound/soc/codecs/cs48l32.c

1472

clk = &cs48l32_codec->dspclk;

sound/soc/codecs/cs48l32.c

1487

*clk = freq;

sound/soc/codecs/cs48l32.c

2037

switch (dai_priv->clk) {

sound/soc/codecs/cs48l32.c

2079

switch (dai_priv->clk) {

sound/soc/codecs/cs48l32.c

2248

if (clk_id == dai_priv->clk)

sound/soc/codecs/cs48l32.c

2273

dai_priv->clk = clk_id;

sound/soc/codecs/cs48l32.c

3467

dai_priv->clk = CS48L32_CLK_SYSCLK_1;

sound/soc/codecs/cs48l32.h

312

int clk;

sound/soc/codecs/cs53l30.c

35

struct clk *mclk;

sound/soc/codecs/cx2072x.c

39

struct clk *mclk;

sound/soc/codecs/da7213.h

601

struct clk *mclk;

sound/soc/codecs/da7218.h

1395

struct clk *mclk;

sound/soc/codecs/da7219.c

1429

struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX];

sound/soc/codecs/da7219.c

1430

struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];

sound/soc/codecs/da7219.c

1565

struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX];

sound/soc/codecs/da7219.c

1566

struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];

sound/soc/codecs/da7219.c

2197

da7219->dai_clks[i] = dai_clk_hw->clk;

sound/soc/codecs/da7219.c

802

struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];

sound/soc/codecs/da7219.h

823

struct clk *dai_clks[DA7219_DAI_NUM_CLKS];

sound/soc/codecs/da7219.h

825

struct clk *mclk;

sound/soc/codecs/es8311.c

31

struct clk *mclk;

sound/soc/codecs/es8316.c

36

struct clk *mclk;

sound/soc/codecs/es8316.c

480

unsigned int clk = es8316->sysclk / 2;

sound/soc/codecs/es8316.c

495

if (clk % ratio != 0)

sound/soc/codecs/es8316.c

497

if (clk / ratio == params_rate(params))

sound/soc/codecs/es8316.c

501

if (clk == es8316->sysclk)

sound/soc/codecs/es8316.c

503

clk = es8316->sysclk;

sound/soc/codecs/es8316.c

509

if (clk != es8316->sysclk) {

sound/soc/codecs/es8316.c

515

lrck_divider = clk / params_rate(params);

sound/soc/codecs/es8323.c

33

struct clk *mclk;

sound/soc/codecs/es8326.c

22

struct clk *mclk;

sound/soc/codecs/es8328.c

761

clk_disable_unprepare(es8328->clk);

sound/soc/codecs/es8328.c

777

ret = clk_prepare_enable(es8328->clk);

sound/soc/codecs/es8328.c

80

struct clk *clk;

sound/soc/codecs/es8328.c

802

clk_disable_unprepare(es8328->clk);

sound/soc/codecs/es8328.c

821

es8328->clk = devm_clk_get(component->dev, NULL);

sound/soc/codecs/es8328.c

822

if (IS_ERR(es8328->clk)) {

sound/soc/codecs/es8328.c

824

ret = PTR_ERR(es8328->clk);

sound/soc/codecs/es8328.c

828

ret = clk_prepare_enable(es8328->clk);

sound/soc/codecs/es8328.c

848

clk_disable_unprepare(es8328->clk);

sound/soc/codecs/es8375.c

28

struct clk *mclk;

sound/soc/codecs/es8389.c

34

struct clk *mclk;

sound/soc/codecs/fs210x.c

64

struct clk *clk_bclk;

sound/soc/codecs/inno_rk3036.c

29

struct clk *pclk;

sound/soc/codecs/jz4725b.c

163

struct clk *clk;

sound/soc/codecs/jz4725b.c

408

clk_prepare_enable(icdc->clk);

sound/soc/codecs/jz4725b.c

425

clk_disable_unprepare(icdc->clk);

sound/soc/codecs/jz4725b.c

636

icdc->clk = devm_clk_get(&pdev->dev, "aic");

sound/soc/codecs/jz4725b.c

637

if (IS_ERR(icdc->clk))

sound/soc/codecs/jz4725b.c

638

return PTR_ERR(icdc->clk);

sound/soc/codecs/jz4760.c

166

struct clk *clk;

sound/soc/codecs/jz4760.c

607

clk_prepare_enable(jz_codec->clk);

sound/soc/codecs/jz4760.c

618

clk_disable_unprepare(jz_codec->clk);

sound/soc/codecs/jz4760.c

838

codec->clk = devm_clk_get(dev, "aic");

sound/soc/codecs/jz4760.c

839

if (IS_ERR(codec->clk))

sound/soc/codecs/jz4760.c

840

return PTR_ERR(codec->clk);

sound/soc/codecs/jz4770.c

182

struct clk *clk;

sound/soc/codecs/jz4770.c

639

clk_prepare_enable(jz_codec->clk);

sound/soc/codecs/jz4770.c

650

clk_disable_unprepare(jz_codec->clk);

sound/soc/codecs/jz4770.c

885

codec->clk = devm_clk_get(dev, "aic");

sound/soc/codecs/jz4770.c

886

if (IS_ERR(codec->clk))

sound/soc/codecs/jz4770.c

887

return PTR_ERR(codec->clk);

sound/soc/codecs/lochnagar-sc.c

20

struct clk *mclk;

sound/soc/codecs/lpass-rx-macro.c

663

struct clk *mclk;

sound/soc/codecs/lpass-rx-macro.c

664

struct clk *npl;

sound/soc/codecs/lpass-rx-macro.c

665

struct clk *macro;

sound/soc/codecs/lpass-rx-macro.c

666

struct clk *dcodec;

sound/soc/codecs/lpass-rx-macro.c

667

struct clk *fsgen;

sound/soc/codecs/lpass-tx-macro.c

276

struct clk *mclk;

sound/soc/codecs/lpass-tx-macro.c

277

struct clk *npl;

sound/soc/codecs/lpass-tx-macro.c

278

struct clk *macro;

sound/soc/codecs/lpass-tx-macro.c

279

struct clk *dcodec;

sound/soc/codecs/lpass-tx-macro.c

280

struct clk *fsgen;

sound/soc/codecs/lpass-va-macro.c

1397

struct clk *parent = va->mclk;

sound/soc/codecs/lpass-va-macro.c

215

struct clk *mclk;

sound/soc/codecs/lpass-va-macro.c

216

struct clk *npl;

sound/soc/codecs/lpass-va-macro.c

217

struct clk *macro;

sound/soc/codecs/lpass-va-macro.c

218

struct clk *dcodec;

sound/soc/codecs/lpass-va-macro.c

219

struct clk *fsgen;

sound/soc/codecs/lpass-wsa-macro.c

417

struct clk *mclk;

sound/soc/codecs/lpass-wsa-macro.c

418

struct clk *npl;

sound/soc/codecs/lpass-wsa-macro.c

419

struct clk *macro;

sound/soc/codecs/lpass-wsa-macro.c

420

struct clk *dcodec;

sound/soc/codecs/lpass-wsa-macro.c

421

struct clk *fsgen;

sound/soc/codecs/madera.c

199

return clk_prepare_enable(madera->mclk[clk_idx].clk);

sound/soc/codecs/madera.c

201

clk_disable_unprepare(madera->mclk[clk_idx].clk);

sound/soc/codecs/madera.c

2489

unsigned int clk, unsigned int freq)

sound/soc/codecs/madera.c

2500

switch (clk) {

sound/soc/codecs/madera.c

2675

int clk_freq_sel, *clk;

sound/soc/codecs/madera.c

2682

clk = &priv->sysclk;

sound/soc/codecs/madera.c

2689

clk = &priv->asyncclk;

sound/soc/codecs/madera.c

2695

clk = &priv->dspclk;

sound/soc/codecs/madera.c

2714

*clk = freq;

sound/soc/codecs/madera.c

2939

switch (dai_priv->clk) {

sound/soc/codecs/madera.c

3002

switch (dai_priv->clk) {

sound/soc/codecs/madera.c

3024

madera_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);

sound/soc/codecs/madera.c

3243

if (is_sync == madera_is_syncclk(dai_priv->clk))

sound/soc/codecs/madera.c

3270

dai_priv->clk = clk_id;

sound/soc/codecs/madera.c

3369

dai_priv->clk = MADERA_CLK_SYSCLK_1;

sound/soc/codecs/madera.c

3835

struct clk *clk;

sound/soc/codecs/madera.c

3849

clk = madera->mclk[MADERA_MCLK1].clk;

sound/soc/codecs/madera.c

3852

clk = madera->mclk[MADERA_MCLK2].clk;

sound/soc/codecs/madera.c

3855

clk = madera->mclk[MADERA_MCLK3].clk;

sound/soc/codecs/madera.c

3862

return clk_prepare_enable(clk);

sound/soc/codecs/madera.c

3864

clk_disable_unprepare(clk);

sound/soc/codecs/madera.h

116

int clk;

sound/soc/codecs/max98088.c

43

struct clk *mclk;

sound/soc/codecs/max98090.h

1522

struct clk *mclk;

sound/soc/codecs/max98095.c

44

struct clk *mclk;

sound/soc/codecs/max9860.c

596

struct clk *mclk;

sound/soc/codecs/max9867.c

20

struct clk *mclk;

sound/soc/codecs/mc13783.c

245

int clk;

sound/soc/codecs/mc13783.c

249

for (clk = 0; clk < ARRAY_SIZE(mc13783_sysclk); clk++) {

sound/soc/codecs/mc13783.c

250

if (mc13783_sysclk[clk] < 0)

sound/soc/codecs/mc13783.c

252

if (mc13783_sysclk[clk] == freq)

sound/soc/codecs/mc13783.c

256

if (clk == ARRAY_SIZE(mc13783_sysclk))

sound/soc/codecs/mc13783.c

262

val |= AUDIO_CLK(clk);

sound/soc/codecs/msm8916-wcd-analog.c

296

struct clk *mclk;

sound/soc/codecs/msm8916-wcd-digital.c

228

struct clk *ahbclk, *mclk;

sound/soc/codecs/nau8822.h

218

struct clk *mclk;

sound/soc/codecs/nau8824.h

437

struct clk *mclk;

sound/soc/codecs/nau8825.h

500

struct clk *mclk;

sound/soc/codecs/ntp8835.c

67

struct clk *mclk;

sound/soc/codecs/ntp8918.c

60

struct clk *bck;

sound/soc/codecs/pcm3168a.c

60

struct clk *scki;

sound/soc/codecs/pcm512x.c

34

struct clk *sclk;

sound/soc/codecs/peb2466.c

40

struct clk *mclk;

sound/soc/codecs/rk3308_codec.c

44

struct clk *hclk;

sound/soc/codecs/rk3308_codec.c

45

struct clk *mclk_rx;

sound/soc/codecs/rk3308_codec.c

46

struct clk *mclk_tx;

sound/soc/codecs/rk3328_codec.c

35

struct clk *mclk;

sound/soc/codecs/rk3328_codec.c

36

struct clk *pclk;

sound/soc/codecs/rk817_codec.c

23

struct clk *mclk;

sound/soc/codecs/rt5514.h

274

struct clk *mclk, *dsp_calib_clk;

sound/soc/codecs/rt5616.c

145

struct clk *mclk;

sound/soc/codecs/rt5640.h

2139

struct clk *mclk;

sound/soc/codecs/rt5659.h

1800

struct clk *mclk;

sound/soc/codecs/rt5660.h

834

struct clk *mclk;

sound/soc/codecs/rt5682.h

1454

struct clk *mclk;

sound/soc/codecs/rt5682s.c

2644

struct clk *parent_clk;

sound/soc/codecs/rt5682s.c

2658

parent_clk = clk_get_parent(hw->clk);

sound/soc/codecs/rt5682s.h

1469

struct clk *mclk;

sound/soc/codecs/sgtl5000.c

148

struct clk *mclk;

sound/soc/codecs/sta32x.c

138

struct clk *xti_clk;

sound/soc/codecs/tas571x.c

49

struct clk *mclk;

sound/soc/codecs/tlv320adc3xxx.c

319

struct clk *mclk;

sound/soc/codecs/tlv320aic32x4-clk.c

453

static struct clk *aic32x4_register_clk(struct device *dev,

sound/soc/codecs/tlv320aic32x4-clk.c

468

return (struct clk *) -ENOMEM;

sound/soc/codecs/tlv320aic32x4.c

1019

clk_set_parent(clocks[0].clk, clocks[1].clk);

sound/soc/codecs/tlv320aic32x4.c

1020

clk_set_parent(clocks[2].clk, clocks[3].clk);

sound/soc/codecs/tlv320aic32x4.c

1176

clk_set_parent(clocks[0].clk, clocks[1].clk);

sound/soc/codecs/tlv320aic32x4.c

1177

clk_set_parent(clocks[2].clk, clocks[3].clk);

sound/soc/codecs/tlv320aic32x4.c

600

struct clk *mclk;

sound/soc/codecs/tlv320aic32x4.c

601

struct clk *pll;

sound/soc/codecs/tlv320aic32x4.c

787

if (clk_round_rate(clocks[0].clk, dac_clock_rate) == 0)

sound/soc/codecs/tlv320aic32x4.c

790

clk_set_rate(clocks[0].clk,

sound/soc/codecs/tlv320aic32x4.c

793

clk_set_rate(clocks[1].clk,

sound/soc/codecs/tlv320aic32x4.c

796

clk_set_rate(clocks[2].clk,

sound/soc/codecs/tlv320aic32x4.c

801

clk_set_rate(clocks[3].clk,

sound/soc/codecs/tlv320aic32x4.c

804

clk_set_rate(clocks[4].clk,

sound/soc/codecs/tlv320aic32x4.c

809

clk_set_rate(clocks[5].clk,

sound/soc/codecs/tlv320aic3x.c

1057

int clk;

sound/soc/codecs/tlv320aic3x.c

1169

clk = (10000 * j + d) / (10 * p);

sound/soc/codecs/tlv320aic3x.c

1173

if (abs(codec_clk - clk) < abs(codec_clk - last_clk)) {

sound/soc/codecs/tlv320aic3x.c

1175

last_clk = clk;

sound/soc/codecs/tlv320aic3x.c

1179

if (clk == codec_clk)

sound/soc/codecs/tscs42xx.c

45

struct clk *sysclk;

sound/soc/codecs/tscs454.c

140

struct clk *sysclk;

sound/soc/codecs/uda1380.c

535

u16 clk = uda1380_read_reg_cache(component, UDA1380_CLK);

sound/soc/codecs/uda1380.c

538

if (clk & R00_DAC_CLK) {

sound/soc/codecs/uda1380.c

541

clk &= ~0x3; /* clear SEL_LOOP_DIV */

sound/soc/codecs/uda1380.c

544

clk |= 0x0;

sound/soc/codecs/uda1380.c

547

clk |= 0x1;

sound/soc/codecs/uda1380.c

550

clk |= 0x2;

sound/soc/codecs/uda1380.c

553

clk |= 0x3;

sound/soc/codecs/uda1380.c

560

clk |= R00_EN_DAC | R00_EN_INT;

sound/soc/codecs/uda1380.c

562

clk |= R00_EN_ADC | R00_EN_DEC;

sound/soc/codecs/uda1380.c

564

uda1380_write(component, UDA1380_CLK, clk);

sound/soc/codecs/uda1380.c

572

u16 clk = uda1380_read_reg_cache(component, UDA1380_CLK);

sound/soc/codecs/uda1380.c

575

if (clk & R00_DAC_CLK) {

sound/soc/codecs/uda1380.c

581

clk &= ~(R00_EN_DAC | R00_EN_INT);

sound/soc/codecs/uda1380.c

583

clk &= ~(R00_EN_ADC | R00_EN_DEC);

sound/soc/codecs/uda1380.c

585

uda1380_write(component, UDA1380_CLK, clk);

sound/soc/codecs/wcd9335.c

300

struct clk *mclk;

sound/soc/codecs/wcd9335.c

301

struct clk *native_clk;

sound/soc/codecs/wcd934x.c

2132

static struct clk *wcd934x_register_mclk_output(struct wcd934x_codec *wcd)

sound/soc/codecs/wcd934x.c

2134

struct clk *parent = wcd->extclk;

sound/soc/codecs/wcd934x.c

525

struct clk *extclk;

sound/soc/codecs/wm2000.c

63

struct clk *mclk;

sound/soc/codecs/wm8510.c

388

u16 clk = snd_soc_component_read(component, WM8510_CLOCK) & 0x1fe;

sound/soc/codecs/wm8510.c

393

clk |= 0x0001;

sound/soc/codecs/wm8510.c

436

snd_soc_component_write(component, WM8510_CLOCK, clk);

sound/soc/codecs/wm8731.h

19

struct clk;

sound/soc/codecs/wm8731.h

48

struct clk *mclk;

sound/soc/codecs/wm8904.c

48

struct clk *mclk;

sound/soc/codecs/wm8940.c

343

u16 clk = snd_soc_component_read(component, WM8940_CLOCK) & 0x1fe;

sound/soc/codecs/wm8940.c

347

clk |= 1;

sound/soc/codecs/wm8940.c

354

snd_soc_component_write(component, WM8940_CLOCK, clk);

sound/soc/codecs/wm8960.c

133

struct clk *mclk;

sound/soc/codecs/wm8974.c

457

u16 clk = snd_soc_component_read(component, WM8974_CLOCK) & 0x1fe;

sound/soc/codecs/wm8974.c

462

clk |= 0x0001;

sound/soc/codecs/wm8974.c

509

snd_soc_component_write(component, WM8974_CLOCK, clk);

sound/soc/codecs/wm8978.c

657

u16 clk = snd_soc_component_read(component, WM8978_CLOCKING);

sound/soc/codecs/wm8978.c

664

clk |= 1;

sound/soc/codecs/wm8978.c

667

clk &= ~1;

sound/soc/codecs/wm8978.c

708

snd_soc_component_write(component, WM8978_CLOCKING, clk);

sound/soc/codecs/wm8994.c

1085

ret = clk_prepare_enable(wm8994->mclk[clk_idx].clk);

sound/soc/codecs/wm8994.c

1092

clk_disable_unprepare(wm8994->mclk[clk_idx].clk);

sound/soc/codecs/wm8994.c

2215

struct clk *mclk;

sound/soc/codecs/wm8994.c

2300

mclk = wm8994->mclk[WM8994_MCLK1].clk;

sound/soc/codecs/wm8994.c

2303

mclk = wm8994->mclk[WM8994_MCLK2].clk;

sound/soc/codecs/wm8994.c

2358

mclk = wm8994->mclk[WM8994_MCLK1].clk;

sound/soc/codecs/wm8994.c

2361

mclk = wm8994->mclk[WM8994_MCLK2].clk;

sound/soc/codecs/wm8994.c

2492

if (!wm8994->mclk[id].clk || *freq == wm8994->mclk_rate[id])

sound/soc/codecs/wm8994.c

2495

ret = clk_set_rate(wm8994->mclk[id].clk, *freq);

sound/soc/codecs/wm8994.c

2499

*freq = clk_get_rate(wm8994->mclk[id].clk);

sound/soc/codecs/wm8994.c

257

const char *clk;

sound/soc/codecs/wm8994.c

261

clk = "AIF2CLK";

sound/soc/codecs/wm8994.c

263

clk = "AIF1CLK";

sound/soc/codecs/wm8994.c

265

return snd_soc_dapm_widget_name_cmp(source, clk) == 0;

sound/soc/codecs/wm8995.c

536

const char *clk;

sound/soc/codecs/wm8995.c

541

clk = "AIF2CLK";

sound/soc/codecs/wm8995.c

543

clk = "AIF1CLK";

sound/soc/codecs/wm8995.c

544

return !snd_soc_dapm_widget_name_cmp(source, clk);

sound/soc/dwc/dwc-i2s.c

1000

ret = PTR_ERR(dev->clk);

sound/soc/dwc/dwc-i2s.c

338

ret = clk_set_rate(dev->clk, bitclk);

sound/soc/dwc/dwc-i2s.c

485

clk_disable(dw_dev->clk);

sound/soc/dwc/dwc-i2s.c

495

ret = clk_enable(dw_dev->clk);

sound/soc/dwc/dwc-i2s.c

508

clk_disable(dev->clk);

sound/soc/dwc/dwc-i2s.c

519

ret = clk_enable(dev->clk);

sound/soc/dwc/dwc-i2s.c

744

struct clk *pclk;

sound/soc/dwc/dwc-i2s.c

745

struct clk *bclk_mst;

sound/soc/dwc/dwc-i2s.c

746

struct clk *mclk;

sound/soc/dwc/dwc-i2s.c

747

struct clk *mclk_ext;

sound/soc/dwc/dwc-i2s.c

748

struct clk *mclk_inner;

sound/soc/dwc/dwc-i2s.c

757

mclk = clks[0].clk;

sound/soc/dwc/dwc-i2s.c

758

mclk_ext = clks[1].clk;

sound/soc/dwc/dwc-i2s.c

759

mclk_inner = clks[2].clk;

sound/soc/dwc/dwc-i2s.c

760

pclk = clks[3].clk;

sound/soc/dwc/dwc-i2s.c

761

bclk_mst = clks[4].clk;

sound/soc/dwc/dwc-i2s.c

818

struct clk *pclk;

sound/soc/dwc/dwc-i2s.c

819

struct clk *bclk_mst;

sound/soc/dwc/dwc-i2s.c

820

struct clk *bclk_ext;

sound/soc/dwc/dwc-i2s.c

821

struct clk *lrck_ext;

sound/soc/dwc/dwc-i2s.c

822

struct clk *bclk;

sound/soc/dwc/dwc-i2s.c

823

struct clk *lrck;

sound/soc/dwc/dwc-i2s.c

824

struct clk *mclk;

sound/soc/dwc/dwc-i2s.c

825

struct clk *mclk_ext;

sound/soc/dwc/dwc-i2s.c

826

struct clk *mclk_inner;

sound/soc/dwc/dwc-i2s.c

835

mclk = clks[0].clk;

sound/soc/dwc/dwc-i2s.c

836

mclk_ext = clks[1].clk;

sound/soc/dwc/dwc-i2s.c

837

pclk = clks[2].clk;

sound/soc/dwc/dwc-i2s.c

838

bclk_ext = clks[3].clk;

sound/soc/dwc/dwc-i2s.c

839

lrck_ext = clks[4].clk;

sound/soc/dwc/dwc-i2s.c

840

bclk = clks[5].clk;

sound/soc/dwc/dwc-i2s.c

841

lrck = clks[6].clk;

sound/soc/dwc/dwc-i2s.c

842

mclk_inner = clks[7].clk;

sound/soc/dwc/dwc-i2s.c

843

bclk_mst = clks[8].clk;

sound/soc/dwc/dwc-i2s.c

913

return clk_set_rate(dev->clk, bclk_rate);

sound/soc/dwc/dwc-i2s.c

997

dev->clk = devm_clk_get_enabled(&pdev->dev, clk_id);

sound/soc/dwc/dwc-i2s.c

999

if (IS_ERR(dev->clk)) {

sound/soc/dwc/local.h

113

struct clk *clk;

sound/soc/fsl/fsl-asoc-card.c

53

struct clk *mclk;

sound/soc/fsl/fsl-asoc-card.c

689

struct clk *codec_clk = clk_get(codec_dev[codec_idx], NULL);

sound/soc/fsl/fsl-asoc-card.c

908

struct clk *esai_clk = clk_get(&cpu_pdev->dev, "extal");

sound/soc/fsl/fsl_asrc.c

397

struct clk *clk;

sound/soc/fsl/fsl_asrc.c

475

clk = asrc_priv->asrck_clk[clk_index[ideal ? OUT : IN]];

sound/soc/fsl/fsl_asrc.c

477

clk_rate = clk_get_rate(clk);

sound/soc/fsl/fsl_asrc.c

495

clk = asrc_priv->asrck_clk[clk_index[OUT]];

sound/soc/fsl/fsl_asrc.c

496

clk_rate = clk_get_rate(clk);

sound/soc/fsl/fsl_asrc.h

477

struct clk *asrck_clk[ASRC_CLK_MAX_NUM];

sound/soc/fsl/fsl_asrc_common.h

136

struct clk *mem_clk;

sound/soc/fsl/fsl_asrc_common.h

137

struct clk *ipg_clk;

sound/soc/fsl/fsl_asrc_common.h

138

struct clk *spba_clk;

sound/soc/fsl/fsl_aud2htx.h

62

struct clk *bus_clk;

sound/soc/fsl/fsl_audmix.c

102

(*ctr) |= FSL_AUDMIX_CTR_MIXCLK(prm.clk - 1);

sound/soc/fsl/fsl_audmix.c

47

u8 clk;

sound/soc/fsl/fsl_audmix.c

53

{ .tdms = 0, .clk = 0, .msg = "" },

sound/soc/fsl/fsl_audmix.c

55

{ .tdms = 1, .clk = 1, .msg = "DIS->TDM1: TDM1 not started!\n" },

sound/soc/fsl/fsl_audmix.c

57

{ .tdms = 2, .clk = 2, .msg = "DIS->TDM2: TDM2 not started!\n" },

sound/soc/fsl/fsl_audmix.c

59

{ .tdms = 3, .clk = 0, .msg = "DIS->MIX: Please start both TDMs!\n" }

sound/soc/fsl/fsl_audmix.c

61

{ .tdms = 1, .clk = 0, .msg = "TDM1->DIS: TDM1 not started!\n" },

sound/soc/fsl/fsl_audmix.c

63

{ .tdms = 0, .clk = 0, .msg = "" },

sound/soc/fsl/fsl_audmix.c

65

{ .tdms = 3, .clk = 2, .msg = "TDM1->TDM2: Please start both TDMs!\n" },

sound/soc/fsl/fsl_audmix.c

67

{ .tdms = 3, .clk = 0, .msg = "TDM1->MIX: Please start both TDMs!\n" }

sound/soc/fsl/fsl_audmix.c

69

{ .tdms = 2, .clk = 0, .msg = "TDM2->DIS: TDM2 not started!\n" },

sound/soc/fsl/fsl_audmix.c

71

{ .tdms = 3, .clk = 1, .msg = "TDM2->TDM1: Please start both TDMs!\n" },

sound/soc/fsl/fsl_audmix.c

73

{ .tdms = 0, .clk = 0, .msg = "" },

sound/soc/fsl/fsl_audmix.c

75

{ .tdms = 3, .clk = 0, .msg = "TDM2->MIX: Please start both TDMs!\n" }

sound/soc/fsl/fsl_audmix.c

77

{ .tdms = 3, .clk = 0, .msg = "MIX->DIS: Please start both TDMs!\n" },

sound/soc/fsl/fsl_audmix.c

79

{ .tdms = 3, .clk = 1, .msg = "MIX->TDM1: Please start both TDMs!\n" },

sound/soc/fsl/fsl_audmix.c

81

{ .tdms = 3, .clk = 2, .msg = "MIX->TDM2: Please start both TDMs!\n" },

sound/soc/fsl/fsl_audmix.c

83

{ .tdms = 0, .clk = 0, .msg = "" }

sound/soc/fsl/fsl_audmix.c

97

switch (prm.clk) {

sound/soc/fsl/fsl_audmix.h

98

struct clk *ipg_clk;

sound/soc/fsl/fsl_esai.c

263

struct clk *clksrc = esai_priv->extalclk;

sound/soc/fsl/fsl_esai.c

64

struct clk *coreclk;

sound/soc/fsl/fsl_esai.c

65

struct clk *extalclk;

sound/soc/fsl/fsl_esai.c

66

struct clk *fsysclk;

sound/soc/fsl/fsl_esai.c

67

struct clk *spbaclk;

sound/soc/fsl/fsl_micfil.c

62

struct clk *busclk;

sound/soc/fsl/fsl_micfil.c

63

struct clk *mclk;

sound/soc/fsl/fsl_micfil.c

64

struct clk *pll8k_clk;

sound/soc/fsl/fsl_micfil.c

65

struct clk *pll11k_clk;

sound/soc/fsl/fsl_micfil.c

66

struct clk *clk_src[MICFIL_CLK_SRC_NUM];

sound/soc/fsl/fsl_micfil.c

840

struct clk *clk;

sound/soc/fsl/fsl_micfil.c

844

clk = micfil->mclk;

sound/soc/fsl/fsl_micfil.c

847

fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk,

sound/soc/fsl/fsl_micfil.c

849

ret = clk_prepare_enable(clk);

sound/soc/fsl/fsl_mqs.c

70

struct clk *mclk;

sound/soc/fsl/fsl_mqs.c

71

struct clk *ipg;

sound/soc/fsl/fsl_rpmsg.c

46

struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL;

sound/soc/fsl/fsl_rpmsg.c

52

struct clk *pp = clk_get_parent(p);

sound/soc/fsl/fsl_rpmsg.h

35

struct clk *ipg;

sound/soc/fsl/fsl_rpmsg.h

36

struct clk *mclk;

sound/soc/fsl/fsl_rpmsg.h

37

struct clk *dma;

sound/soc/fsl/fsl_rpmsg.h

38

struct clk *pll8k;

sound/soc/fsl/fsl_rpmsg.h

39

struct clk *pll11k;

sound/soc/fsl/fsl_sai.h

285

struct clk *bus_clk;

sound/soc/fsl/fsl_sai.h

286

struct clk *mclk_clk[FSL_SAI_MCLK_MAX];

sound/soc/fsl/fsl_sai.h

287

struct clk *pll8k_clk;

sound/soc/fsl/fsl_sai.h

288

struct clk *pll11k_clk;

sound/soc/fsl/fsl_spdif.c

137

struct clk *txclk[STC_TXCLK_SRC_MAX];

sound/soc/fsl/fsl_spdif.c

138

struct clk *rxclk;

sound/soc/fsl/fsl_spdif.c

139

struct clk *coreclk;

sound/soc/fsl/fsl_spdif.c

140

struct clk *sysclk;

sound/soc/fsl/fsl_spdif.c

141

struct clk *spbaclk;

sound/soc/fsl/fsl_spdif.c

1425

struct clk *clk, u64 savesub,

sound/soc/fsl/fsl_spdif.c

1430

bool is_sysclk = clk_is_match(clk, spdif_priv->sysclk);

sound/soc/fsl/fsl_spdif.c

1444

rate_actual = clk_round_rate(clk, rate_ideal);

sound/soc/fsl/fsl_spdif.c

1446

rate_actual = clk_get_rate(clk);

sound/soc/fsl/fsl_spdif.c

147

struct clk *pll8k_clk;

sound/soc/fsl/fsl_spdif.c

148

struct clk *pll11k_clk;

sound/soc/fsl/fsl_spdif.c

1494

struct clk *clk;

sound/soc/fsl/fsl_spdif.c

1498

clk = spdif_priv->txclk[i];

sound/soc/fsl/fsl_spdif.c

1499

if (IS_ERR(clk)) {

sound/soc/fsl/fsl_spdif.c

1501

return PTR_ERR(clk);

sound/soc/fsl/fsl_spdif.c

1503

if (!clk_get_rate(clk))

sound/soc/fsl/fsl_spdif.c

1506

ret = fsl_spdif_txclk_caldiv(spdif_priv, clk, savesub, index,

sound/soc/fsl/fsl_spdif.c

214

static inline bool fsl_spdif_can_set_clk_rate(struct fsl_spdif_priv *spdif, int clk)

sound/soc/fsl/fsl_spdif.c

216

return (clk == STC_TXCLK_SPDIF_ROOT) && !spdif->soc->shared_root_clock;

sound/soc/fsl/fsl_spdif.c

511

u8 clk, txclk_df;

sound/soc/fsl/fsl_spdif.c

556

clk = spdif_priv->txclk_src[rate];

sound/soc/fsl/fsl_spdif.c

557

if (clk >= STC_TXCLK_SRC_MAX) {

sound/soc/fsl/fsl_spdif.c

570

if (!fsl_spdif_can_set_clk_rate(spdif_priv, clk))

sound/soc/fsl/fsl_spdif.c

574

ret = clk_set_rate(spdif_priv->txclk[clk],

sound/soc/fsl/fsl_spdif.c

585

clk_get_rate(spdif_priv->txclk[clk]));

sound/soc/fsl/fsl_spdif.c

591

stc = STC_TXCLK_ALL_EN | STC_TXCLK_SRC_SET(clk) |

sound/soc/fsl/fsl_spdif.c

678

struct clk *clk;

sound/soc/fsl/fsl_spdif.c

686

clk = spdif_priv->txclk[STC_TXCLK_SPDIF_ROOT];

sound/soc/fsl/fsl_spdif.c

689

clk_disable_unprepare(clk);

sound/soc/fsl/fsl_spdif.c

690

fsl_asoc_reparent_pll_clocks(&pdev->dev, clk, spdif_priv->pll8k_clk,

sound/soc/fsl/fsl_spdif.c

692

ret = clk_prepare_enable(clk);

sound/soc/fsl/fsl_ssi.c

1223

ret = clk_prepare_enable(fsl_ac97_data->clk);

sound/soc/fsl/fsl_ssi.c

1240

clk_disable_unprepare(fsl_ac97_data->clk);

sound/soc/fsl/fsl_ssi.c

1257

ret = clk_prepare_enable(fsl_ac97_data->clk);

sound/soc/fsl/fsl_ssi.c

1273

clk_disable_unprepare(fsl_ac97_data->clk);

sound/soc/fsl/fsl_ssi.c

1354

ssi->clk = devm_clk_get(dev, "ipg");

sound/soc/fsl/fsl_ssi.c

1356

ssi->clk = devm_clk_get(dev, NULL);

sound/soc/fsl/fsl_ssi.c

1357

if (IS_ERR(ssi->clk)) {

sound/soc/fsl/fsl_ssi.c

1358

ret = PTR_ERR(ssi->clk);

sound/soc/fsl/fsl_ssi.c

1365

ret = clk_prepare_enable(ssi->clk);

sound/soc/fsl/fsl_ssi.c

1414

clk_disable_unprepare(ssi->clk);

sound/soc/fsl/fsl_ssi.c

1424

clk_disable_unprepare(ssi->clk);

sound/soc/fsl/fsl_ssi.c

268

struct clk *clk;

sound/soc/fsl/fsl_ssi.c

269

struct clk *baudclk;

sound/soc/fsl/fsl_ssi.c

641

ret = clk_prepare_enable(ssi->clk);

sound/soc/fsl/fsl_ssi.c

664

clk_disable_unprepare(ssi->clk);

sound/soc/fsl/fsl_ssi.c

718

if (freq * 5 > clk_get_rate(ssi->clk)) {

sound/soc/fsl/fsl_utils.c

121

void fsl_asoc_reparent_pll_clocks(struct device *dev, struct clk *clk,

sound/soc/fsl/fsl_utils.c

122

struct clk *pll8k_clk,

sound/soc/fsl/fsl_utils.c

123

struct clk *pll11k_clk, u64 ratio)

sound/soc/fsl/fsl_utils.c

125

struct clk *p, *pll = NULL, *npll = NULL;

sound/soc/fsl/fsl_utils.c

129

if (!clk || !pll8k_clk || !pll11k_clk)

sound/soc/fsl/fsl_utils.c

132

p = clk;

sound/soc/fsl/fsl_utils.c

134

struct clk *pp = clk_get_parent(p);

sound/soc/fsl/fsl_utils.c

169

struct clk *pll8k_clk, struct clk *pll11k_clk,

sound/soc/fsl/fsl_utils.c

170

struct clk *ext_clk, int *target_rates)

sound/soc/fsl/fsl_utils.c

97

void fsl_asoc_get_pll_clocks(struct device *dev, struct clk **pll8k_clk,

sound/soc/fsl/fsl_utils.c

98

struct clk **pll11k_clk)

sound/soc/fsl/fsl_utils.h

23

void fsl_asoc_get_pll_clocks(struct device *dev, struct clk **pll8k_clk,

sound/soc/fsl/fsl_utils.h

24

struct clk **pll11k_clk);

sound/soc/fsl/fsl_utils.h

26

void fsl_asoc_reparent_pll_clocks(struct device *dev, struct clk *clk,

sound/soc/fsl/fsl_utils.h

27

struct clk *pll8k_clk,

sound/soc/fsl/fsl_utils.h

28

struct clk *pll11k_clk, u64 ratio);

sound/soc/fsl/fsl_utils.h

32

struct clk *pll8k_clk, struct clk *pll11k_clk,

sound/soc/fsl/fsl_utils.h

33

struct clk *ext_clk, int *target_rates);

sound/soc/fsl/fsl_xcvr.c

43

struct clk *ipg_clk;

sound/soc/fsl/fsl_xcvr.c

44

struct clk *pll_ipg_clk;

sound/soc/fsl/fsl_xcvr.c

45

struct clk *phy_clk;

sound/soc/fsl/fsl_xcvr.c

46

struct clk *spba_clk;

sound/soc/fsl/fsl_xcvr.c

47

struct clk *pll8k_clk;

sound/soc/fsl/fsl_xcvr.c

48

struct clk *pll11k_clk;

sound/soc/fsl/imx-audmux.c

23

static struct clk *audmux_clk;

sound/soc/fsl/imx-rpmsg.c

169

struct clk *clk;

sound/soc/fsl/imx-rpmsg.c

177

clk = devm_get_clk_from_child(&pdev->dev, args.np, NULL);

sound/soc/fsl/imx-rpmsg.c

178

if (!IS_ERR(clk))

sound/soc/fsl/imx-rpmsg.c

179

data->sysclk = clk_get_rate(clk);

sound/soc/fsl/imx-sgtl5000.c

23

struct clk *codec_clk;

sound/soc/fsl/imx-ssi.h

193

struct clk *clk;

sound/soc/fsl/lpc3xxx-i2s.c

122

clk_disable_unprepare(i2s_info_p->clk);

sound/soc/fsl/lpc3xxx-i2s.c

325

i2s_info_p->clk = devm_clk_get(dev, NULL);

sound/soc/fsl/lpc3xxx-i2s.c

326

if (IS_ERR(i2s_info_p->clk))

sound/soc/fsl/lpc3xxx-i2s.c

327

return dev_err_probe(dev, PTR_ERR(i2s_info_p->clk), "Can't get clock\n");

sound/soc/fsl/lpc3xxx-i2s.c

329

i2s_info_p->clkrate = clk_get_rate(i2s_info_p->clk);

sound/soc/fsl/lpc3xxx-i2s.c

90

ret = clk_prepare_enable(i2s_info_p->clk);

sound/soc/fsl/lpc3xxx-i2s.h

18

struct clk *clk;

sound/soc/generic/simple-card-utils.c

249

return clk_prepare_enable(dai->clk);

sound/soc/generic/simple-card-utils.c

257

clk_disable_unprepare(dai->clk);

sound/soc/generic/simple-card-utils.c

265

struct clk *clk;

sound/soc/generic/simple-card-utils.c

274

clk = devm_get_clk_from_child(dev, node, NULL);

sound/soc/generic/simple-card-utils.c

277

if (!IS_ERR(clk)) {

sound/soc/generic/simple-card-utils.c

278

simple_dai->sysclk = clk_get_rate(clk);

sound/soc/generic/simple-card-utils.c

280

simple_dai->clk = clk;

sound/soc/generic/simple-card-utils.c

285

clk = devm_get_clk_from_child(dev, dlc->of_node, NULL);

sound/soc/generic/simple-card-utils.c

286

if (!IS_ERR(clk))

sound/soc/generic/simple-card-utils.c

287

simple_dai->sysclk = clk_get_rate(clk);

sound/soc/generic/simple-card-utils.c

417

if (!simple_dai->clk)

sound/soc/generic/simple-card-utils.c

420

if (clk_get_rate(simple_dai->clk) == rate)

sound/soc/generic/simple-card-utils.c

423

ret = clk_set_rate(simple_dai->clk, rate);

sound/soc/hisilicon/hi6210-i2s.c

103

ret = clk_prepare_enable(i2s->clk[n]);

sound/soc/hisilicon/hi6210-i2s.c

108

ret = clk_set_rate(i2s->clk[CLK_I2S_BASE], 49152000);

sound/soc/hisilicon/hi6210-i2s.c

167

clk_disable_unprepare(i2s->clk[n]);

sound/soc/hisilicon/hi6210-i2s.c

178

clk_disable_unprepare(i2s->clk[n]);

sound/soc/hisilicon/hi6210-i2s.c

36

struct clk *clk[8];

sound/soc/hisilicon/hi6210-i2s.c

573

i2s->clk[CLK_DACODEC] = devm_clk_get(dev, "dacodec");

sound/soc/hisilicon/hi6210-i2s.c

574

if (IS_ERR(i2s->clk[CLK_DACODEC]))

sound/soc/hisilicon/hi6210-i2s.c

575

return PTR_ERR(i2s->clk[CLK_DACODEC]);

sound/soc/hisilicon/hi6210-i2s.c

578

i2s->clk[CLK_I2S_BASE] = devm_clk_get(dev, "i2s-base");

sound/soc/hisilicon/hi6210-i2s.c

579

if (IS_ERR(i2s->clk[CLK_I2S_BASE]))

sound/soc/hisilicon/hi6210-i2s.c

580

return PTR_ERR(i2s->clk[CLK_I2S_BASE]);

sound/soc/img/img-i2s-in.c

54

struct clk *clk_sys;

sound/soc/img/img-i2s-out.c

53

struct clk *clk_sys;

sound/soc/img/img-i2s-out.c

54

struct clk *clk_ref;

sound/soc/img/img-parallel-out.c

37

struct clk *clk_sys;

sound/soc/img/img-parallel-out.c

38

struct clk *clk_ref;

sound/soc/img/img-spdif-in.c

73

struct clk *clk_sys;

sound/soc/img/img-spdif-out.c

42

struct clk *clk_sys;

sound/soc/img/img-spdif-out.c

43

struct clk *clk_ref;

sound/soc/intel/boards/bytcht_es8316.c

38

struct clk *mclk;

sound/soc/intel/boards/bytcr_rt5640.c

107

struct clk *mclk;

sound/soc/intel/boards/bytcr_rt5651.c

85

struct clk *mclk;

sound/soc/intel/boards/bytcr_wm5102.c

36

struct clk *mclk;

sound/soc/intel/boards/cht_bsw_max98090_ti.c

36

struct clk *mclk;

sound/soc/intel/boards/cht_bsw_rt5645.c

43

struct clk *mclk;

sound/soc/intel/boards/cht_bsw_rt5672.c

35

struct clk *mclk;

sound/soc/intel/boards/sof_board_helpers.h

106

struct clk *mclk;

sound/soc/intel/keembay/kmb_platform.c

490

static void kmb_disable_clk(void *clk)

sound/soc/intel/keembay/kmb_platform.c

492

clk_disable_unprepare(clk);

sound/soc/intel/keembay/kmb_platform.h

129

struct clk *clk_i2s;

sound/soc/intel/keembay/kmb_platform.h

130

struct clk *clk_apb;

sound/soc/jz4740/jz4740-i2s.c

85

struct clk *clk_aic;

sound/soc/jz4740/jz4740-i2s.c

86

struct clk *clk_i2s;

sound/soc/kirkwood/kirkwood-i2s.c

682

priv->clk = devm_clk_get(&pdev->dev, np ? "internal" : NULL);

sound/soc/kirkwood/kirkwood-i2s.c

683

if (IS_ERR(priv->clk)) {

sound/soc/kirkwood/kirkwood-i2s.c

685

return PTR_ERR(priv->clk);

sound/soc/kirkwood/kirkwood-i2s.c

693

if (clk_is_match(priv->extclk, priv->clk)) {

sound/soc/kirkwood/kirkwood-i2s.c

703

err = clk_prepare_enable(priv->clk);

sound/soc/kirkwood/kirkwood-i2s.c

734

clk_disable_unprepare(priv->clk);

sound/soc/kirkwood/kirkwood-i2s.c

746

clk_disable_unprepare(priv->clk);

sound/soc/kirkwood/kirkwood.h

136

struct clk *clk;

sound/soc/kirkwood/kirkwood.h

137

struct clk *extclk;

sound/soc/loongson/loongson_i2s_plat.c

118

struct clk *i2s_clk;

sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c

41

struct clk *i2s_ck;

sound/soc/mediatek/mt2701/mt2701-afe-common.h

77

struct clk *hop_ck[MTK_STREAM_NUM];

sound/soc/mediatek/mt2701/mt2701-afe-common.h

78

struct clk *sel_ck;

sound/soc/mediatek/mt2701/mt2701-afe-common.h

79

struct clk *div_ck;

sound/soc/mediatek/mt2701/mt2701-afe-common.h

80

struct clk *mclk_ck;

sound/soc/mediatek/mt2701/mt2701-afe-common.h

81

struct clk *asrco_ck;

sound/soc/mediatek/mt2701/mt2701-afe-common.h

91

struct clk *base_ck[MT2701_BASE_CLK_NUM];

sound/soc/mediatek/mt2701/mt2701-afe-common.h

92

struct clk *mrgif_ck;

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

102

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

104

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

106

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

108

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

117

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

118

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

119

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

120

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

39

afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

41

if (!afe_priv->clk)

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

45

afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

46

if (IS_ERR(afe_priv->clk[i])) {

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

49

PTR_ERR(afe_priv->clk[i]));

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

50

return PTR_ERR(afe_priv->clk[i]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

62

ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

69

ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

76

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

83

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD],

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

84

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt6797/mt6797-afe-clk.c

92

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);

sound/soc/mediatek/mt6797/mt6797-afe-common.h

44

struct clk;

sound/soc/mediatek/mt6797/mt6797-afe-common.h

47

struct clk **clk;

sound/soc/mediatek/mt8173/mt8173-afe-pcm.c

151

struct clk *clocks[MT8173_CLK_NUM];

sound/soc/mediatek/mt8173/mt8173-afe-pcm.c

241

struct clk *m_ck, struct clk *b_ck)

sound/soc/mediatek/mt8173/mt8173-afe-pcm.c

264

struct clk *m_ck, unsigned int mck_rate,

sound/soc/mediatek/mt8173/mt8173-afe-pcm.c

265

struct clk *b_ck, unsigned int bck_rate)

sound/soc/mediatek/mt8173/mt8173-afe-pcm.c

288

struct clk *m_ck, struct clk *b_ck)

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

103

afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

104

if (IS_ERR(afe_priv->clk[i])) {

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

107

PTR_ERR(afe_priv->clk[i]));

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

108

return PTR_ERR(afe_priv->clk[i]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

120

ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

127

ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIO]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

134

ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIO],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

135

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

143

ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

150

ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIOINTBUS],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

151

afe_priv->clk[CLK_TOP_SYSPLL_D2_D4]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

159

ret = clk_prepare_enable(afe_priv->clk[CLK_AFE]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

166

ret = clk_prepare_enable(afe_priv->clk[CLK_I2S1_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

173

ret = clk_prepare_enable(afe_priv->clk[CLK_I2S2_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

180

ret = clk_prepare_enable(afe_priv->clk[CLK_I2S3_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

187

ret = clk_prepare_enable(afe_priv->clk[CLK_I2S4_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

197

clk_disable_unprepare(afe_priv->clk[CLK_I2S3_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

199

clk_disable_unprepare(afe_priv->clk[CLK_I2S2_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

201

clk_disable_unprepare(afe_priv->clk[CLK_I2S1_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

203

clk_disable_unprepare(afe_priv->clk[CLK_AFE]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

205

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

207

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIO]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

209

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

218

clk_disable_unprepare(afe_priv->clk[CLK_I2S4_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

219

clk_disable_unprepare(afe_priv->clk[CLK_I2S3_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

220

clk_disable_unprepare(afe_priv->clk[CLK_I2S2_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

221

clk_disable_unprepare(afe_priv->clk[CLK_I2S1_BCLK_SW]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

222

clk_disable_unprepare(afe_priv->clk[CLK_AFE]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

223

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

224

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIO]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

225

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

237

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

243

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

244

afe_priv->clk[CLK_TOP_APLL1_CK]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

253

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

259

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

260

afe_priv->clk[CLK_TOP_APLL1_D8]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

268

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

269

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

276

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

278

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

279

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

286

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

292

clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

293

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

294

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

297

clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

298

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

299

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

311

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

317

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

318

afe_priv->clk[CLK_TOP_APLL2_CK]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

327

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

333

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

334

afe_priv->clk[CLK_TOP_APLL2_D8]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

342

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

343

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

350

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

352

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

353

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

360

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

366

clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

367

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

368

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

371

clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

372

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

373

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

387

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL22M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

394

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL1_TUNER]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

412

clk_disable_unprepare(afe_priv->clk[CLK_APLL22M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

427

clk_disable_unprepare(afe_priv->clk[CLK_APLL1_TUNER]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

428

clk_disable_unprepare(afe_priv->clk[CLK_APLL22M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

441

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL24M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

448

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL2_TUNER]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

466

clk_disable_unprepare(afe_priv->clk[CLK_APLL24M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

481

clk_disable_unprepare(afe_priv->clk[CLK_APLL2_TUNER]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

482

clk_disable_unprepare(afe_priv->clk[CLK_APLL24M]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

558

ret = clk_prepare_enable(afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

564

ret = clk_set_parent(afe_priv->clk[m_sel_id],

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

565

afe_priv->clk[apll_clk_id]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

575

ret = clk_prepare_enable(afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

581

ret = clk_set_rate(afe_priv->clk[div_clk_id], rate);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

592

clk_disable_unprepare(afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

596

clk_disable_unprepare(afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

611

clk_disable_unprepare(afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

613

clk_disable_unprepare(afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

97

afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),

sound/soc/mediatek/mt8183/mt8183-afe-clk.c

99

if (!afe_priv->clk)

sound/soc/mediatek/mt8183/mt8183-afe-common.h

75

struct clk;

sound/soc/mediatek/mt8183/mt8183-afe-common.h

78

struct clk **clk;

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

103

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

104

afe_priv->clk[CLK_TOP_APLL1_CK]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

113

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

119

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

120

afe_priv->clk[CLK_TOP_APLL1_D8]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

128

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

129

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

136

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

138

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

139

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

146

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

158

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

164

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

165

afe_priv->clk[CLK_TOP_APLL2_CK]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

174

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

180

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

181

afe_priv->clk[CLK_TOP_APLL2_D8]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

189

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

190

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

197

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

199

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

200

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

207

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

220

ret = clk_prepare_enable(afe_priv->clk[i]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

237

clk_disable_unprepare(afe_priv->clk[i]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

245

ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

252

ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_AUDIO_26M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

259

ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIO]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

265

ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIO],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

266

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

274

ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

285

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUDIO_H],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

286

afe_priv->clk[CLK_TOP_APLL2_CK]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

294

ret = clk_prepare_enable(afe_priv->clk[CLK_AFE]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

304

clk_disable_unprepare(afe_priv->clk[CLK_AFE]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

309

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

311

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIO]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

313

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

315

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_AUDIO_26M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

324

clk_disable_unprepare(afe_priv->clk[CLK_AFE]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

326

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

327

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIO]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

328

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_AUDIO_26M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

329

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

340

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL22M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

347

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL1_TUNER]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

363

clk_disable_unprepare(afe_priv->clk[CLK_APLL1_TUNER]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

365

clk_disable_unprepare(afe_priv->clk[CLK_APLL22M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

379

clk_disable_unprepare(afe_priv->clk[CLK_APLL1_TUNER]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

380

clk_disable_unprepare(afe_priv->clk[CLK_APLL22M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

393

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL24M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

400

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL2_TUNER]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

416

clk_disable_unprepare(afe_priv->clk[CLK_APLL2_TUNER]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

418

clk_disable_unprepare(afe_priv->clk[CLK_APLL24M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

432

clk_disable_unprepare(afe_priv->clk[CLK_APLL2_TUNER]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

433

clk_disable_unprepare(afe_priv->clk[CLK_APLL24M]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

497

ret = clk_prepare_enable(afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

503

ret = clk_set_parent(afe_priv->clk[m_sel_id],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

504

afe_priv->clk[apll_clk_id]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

514

ret = clk_prepare_enable(afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

520

ret = clk_set_rate(afe_priv->clk[div_clk_id], rate);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

536

clk_disable_unprepare(afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

538

clk_disable_unprepare(afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

549

afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

551

if (!afe_priv->clk)

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

555

afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

556

if (IS_ERR(afe_priv->clk[i])) {

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

559

aud_clks[i], PTR_ERR(afe_priv->clk[i]));

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

560

afe_priv->clk[i] = NULL;

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

79

ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIOINTBUS],

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

80

afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8186/mt8186-afe-clk.c

97

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8186/mt8186-afe-common.h

139

struct clk;

sound/soc/mediatek/mt8186/mt8186-afe-common.h

142

struct clk **clk;

sound/soc/mediatek/mt8186/mt8186-audsys-clk.c

103

clk = cl->clk;

sound/soc/mediatek/mt8186/mt8186-audsys-clk.c

104

clk_unregister_gate(clk);

sound/soc/mediatek/mt8186/mt8186-audsys-clk.c

113

struct clk *clk;

sound/soc/mediatek/mt8186/mt8186-audsys-clk.c

127

clk = clk_register_gate(afe->dev, gate->name, gate->parent_name,

sound/soc/mediatek/mt8186/mt8186-audsys-clk.c

131

if (IS_ERR(clk)) {

sound/soc/mediatek/mt8186/mt8186-audsys-clk.c

133

gate->name, PTR_ERR(clk));

sound/soc/mediatek/mt8186/mt8186-audsys-clk.c

142

cl->clk = clk;

sound/soc/mediatek/mt8186/mt8186-audsys-clk.c

91

struct clk *clk;

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

266

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

267

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

270

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

271

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

287

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

288

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

291

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

292

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

385

return clk_get_rate(afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

418

afe_priv->clk =

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

419

devm_kcalloc(afe->dev, MT8188_CLK_NUM, sizeof(*afe_priv->clk),

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

421

if (!afe_priv->clk)

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

425

afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

426

if (IS_ERR(afe_priv->clk[i])) {

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

429

PTR_ERR(afe_priv->clk[i]));

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

430

return PTR_ERR(afe_priv->clk[i]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

447

int mt8188_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

451

if (clk) {

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

452

ret = clk_prepare_enable(clk);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

465

void mt8188_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

467

if (clk)

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

468

clk_disable_unprepare(clk);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

474

int mt8188_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

479

if (clk) {

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

480

ret = clk_set_rate(clk, rate);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

491

int mt8188_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

492

struct clk *parent)

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

496

if (clk && parent) {

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

497

ret = clk_set_parent(clk, parent);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

585

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

588

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

591

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

594

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

595

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

596

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

605

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

606

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

607

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

608

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

609

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

610

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

632

ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

644

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

653

ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A2SYS]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

665

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A2SYS]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

674

ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

678

ret = mt8188_afe_set_clk_parent(afe, afe_priv->clk[MT8188_CLK_TOP_A1SYS_HP_SEL],

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

679

afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

696

mt8188_afe_set_clk_parent(afe, afe_priv->clk[MT8188_CLK_TOP_A1SYS_HP_SEL],

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

697

afe_priv->clk[MT8188_CLK_XTAL_26M]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

699

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

710

mt8188_afe_set_clk_parent(afe, afe_priv->clk[MT8188_CLK_TOP_A1SYS_HP_SEL],

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

711

afe_priv->clk[MT8188_CLK_XTAL_26M]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.c

712

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]);

sound/soc/mediatek/mt8188/mt8188-afe-clk.h

122

int mt8188_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8188/mt8188-afe-clk.h

123

void mt8188_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8188/mt8188-afe-clk.h

124

int mt8188_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8188/mt8188-afe-clk.h

126

int mt8188_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8188/mt8188-afe-clk.h

127

struct clk *parent);

sound/soc/mediatek/mt8188/mt8188-afe-common.h

122

struct clk;

sound/soc/mediatek/mt8188/mt8188-afe-common.h

125

struct clk **clk;

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

149

struct clk *clk;

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

161

clk = cl->clk;

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

162

clk_unregister_gate(clk);

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

171

struct clk *clk;

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

185

clk = clk_register_gate(afe->dev, gate->name, gate->parent_name,

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

189

if (IS_ERR(clk)) {

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

191

gate->name, PTR_ERR(clk));

sound/soc/mediatek/mt8188/mt8188-audsys-clk.c

200

cl->clk = clk;

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

337

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

338

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

339

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

340

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

343

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

344

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

345

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

346

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC4]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

372

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

373

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

374

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

375

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC4]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

378

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

379

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

380

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]);

sound/soc/mediatek/mt8188/mt8188-dai-dmic.c

381

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

422

mt8188_afe_enable_clk(afe, afe_priv->clk[clkmux_id]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

425

ret = mt8188_afe_set_clk_parent(afe, afe_priv->clk[clkmux_id],

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

426

afe_priv->clk[apll_clk_id]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

431

ret = mt8188_afe_set_clk_rate(afe, afe_priv->clk[clkdiv_id],

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

434

mt8188_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

448

mt8188_afe_disable_clk(afe, afe_priv->clk[clkdiv_id]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

449

mt8188_afe_disable_clk(afe, afe_priv->clk[clkmux_id]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

678

mt8188_afe_enable_clk(afe, afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

681

mt8188_afe_disable_clk(afe, afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

703

mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_HDMI_OUT]);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

706

mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_HDMI_OUT]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

102

void mt8189_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

104

if (clk)

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

105

clk_disable_unprepare(clk);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

111

static int mt8189_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

116

if (clk) {

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

117

ret = clk_set_rate(clk, rate);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

127

static int mt8189_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

128

struct clk *parent)

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

132

if (clk && parent) {

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

133

ret = clk_set_parent(clk, parent);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

270

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

274

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

275

afe_priv->clk[MT8189_CLK_TOP_APLL1_CK]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

280

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

284

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

285

afe_priv->clk[MT8189_CLK_TOP_APLL1_D4]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

289

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

293

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

294

afe_priv->clk[MT8189_CLK_TOP_APLL1_CK]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

298

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

299

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

301

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

303

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

304

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

306

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

307

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

308

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

309

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

315

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

317

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

318

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

320

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

322

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

323

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

325

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

338

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

342

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

343

afe_priv->clk[MT8189_CLK_TOP_APLL2_CK]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

348

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

352

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

353

afe_priv->clk[MT8189_CLK_TOP_APLL2_D4]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

357

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

361

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

362

afe_priv->clk[MT8189_CLK_TOP_APLL2_CK]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

366

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

367

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

369

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

371

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

372

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

374

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

375

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

376

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

377

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

383

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

385

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

386

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

388

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

390

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

391

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

393

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

403

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

407

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

411

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

412

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

416

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

420

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

421

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

425

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

426

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

427

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

428

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

429

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

434

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

436

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

437

afe_priv->clk[MT8189_CLK_TOP_APLL1_CK]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

439

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

441

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

565

return clk_get_rate(afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

601

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

605

ret = mt8189_afe_set_clk_parent(afe, afe_priv->clk[m_sel_id],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

606

afe_priv->clk[apll_clk_id]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

617

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

621

ret = mt8189_afe_set_clk_rate(afe, afe_priv->clk[div_clk_id], rate);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

650

mt8189_afe_disable_clk(afe, afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

653

mt8189_afe_disable_clk(afe, afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

663

mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

664

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIOINTBUS],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

665

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

667

mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

668

mt8189_afe_set_clk_parent(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H],

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

669

afe_priv->clk[MT8189_CLK_TOP_CLK26M]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

678

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIO_H]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

679

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_TOP_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

700

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_PERAO_INTBUS_CK_PERI]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

704

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_PERAO_AUDIO_SLV_CK_PERI]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

708

ret = mt8189_afe_enable_clk(afe, afe_priv->clk[MT8189_CLK_PERAO_AUDIO_MST_CK_PERI]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

715

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_PERAO_AUDIO_SLV_CK_PERI]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

717

mt8189_afe_disable_clk(afe, afe_priv->clk[MT8189_CLK_PERAO_INTBUS_CK_PERI]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

728

afe_priv->clk = devm_kcalloc(afe->dev, MT8189_CLK_NUM, sizeof(*afe_priv->clk),

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

730

if (!afe_priv->clk)

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

734

afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

735

if (IS_ERR(afe_priv->clk[i])) {

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

737

return PTR_ERR(afe_priv->clk[i]);

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

88

int mt8189_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8189/mt8189-afe-clk.c

92

ret = clk_prepare_enable(clk);

sound/soc/mediatek/mt8189/mt8189-afe-clk.h

65

int mt8189_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8189/mt8189-afe-clk.h

66

void mt8189_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8189/mt8189-afe-common.h

202

struct clk;

sound/soc/mediatek/mt8189/mt8189-afe-common.h

205

struct clk **clk;

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

102

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

108

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

109

afe_priv->clk[CLK_TOP_APLL1_D4]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

117

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

118

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

125

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

127

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

128

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

135

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

148

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

154

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

155

afe_priv->clk[CLK_TOP_APLL2_CK]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

164

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

170

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

171

afe_priv->clk[CLK_TOP_APLL2_D4]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

179

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

180

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

187

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

189

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

190

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

197

clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

209

ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

216

ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_AUDIO_26M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

223

ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIO]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

229

ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIO],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

230

afe_priv->clk[CLK_CLK26M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

238

ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

253

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUDIO_H],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

254

afe_priv->clk[CLK_TOP_APLL2_CK]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

262

ret = clk_prepare_enable(afe_priv->clk[CLK_AFE]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

277

clk_disable_unprepare(afe_priv->clk[CLK_AFE]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

279

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

280

clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIO]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

281

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_AUDIO_26M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

282

clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUDIO]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

293

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL22M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

300

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL1_TUNER]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

329

clk_disable_unprepare(afe_priv->clk[CLK_APLL1_TUNER]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

330

clk_disable_unprepare(afe_priv->clk[CLK_APLL22M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

343

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL24M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

350

ret = clk_prepare_enable(afe_priv->clk[CLK_APLL2_TUNER]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

379

clk_disable_unprepare(afe_priv->clk[CLK_APLL2_TUNER]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

380

clk_disable_unprepare(afe_priv->clk[CLK_APLL24M]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

574

ret = clk_prepare_enable(afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

580

ret = clk_set_parent(afe_priv->clk[m_sel_id],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

581

afe_priv->clk[apll_clk_id]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

591

ret = clk_prepare_enable(afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

597

ret = clk_set_rate(afe_priv->clk[div_clk_id], rate);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

614

clk_disable_unprepare(afe_priv->clk[div_clk_id]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

616

clk_disable_unprepare(afe_priv->clk[m_sel_id]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

625

afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

627

if (!afe_priv->clk)

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

631

afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

632

if (IS_ERR(afe_priv->clk[i])) {

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

635

aud_clks[i], PTR_ERR(afe_priv->clk[i]));

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

636

afe_priv->clk[i] = NULL;

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

69

ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIOINTBUS],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

70

afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

86

ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_1]);

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

92

ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1],

sound/soc/mediatek/mt8192/mt8192-afe-clk.c

93

afe_priv->clk[CLK_TOP_APLL1_CK]);

sound/soc/mediatek/mt8192/mt8192-afe-common.h

128

struct clk;

sound/soc/mediatek/mt8192/mt8192-afe-common.h

131

struct clk **clk;

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

247

mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

248

mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

251

mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

252

mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

268

mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

269

mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

272

mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

273

mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

368

return clk_get_rate(afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

384

afe_priv->clk =

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

385

devm_kcalloc(afe->dev, MT8195_CLK_NUM, sizeof(*afe_priv->clk),

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

387

if (!afe_priv->clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

391

afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

392

if (IS_ERR(afe_priv->clk[i])) {

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

395

PTR_ERR(afe_priv->clk[i]));

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

396

return PTR_ERR(afe_priv->clk[i]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

413

int mt8195_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

417

if (clk) {

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

418

ret = clk_prepare_enable(clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

431

void mt8195_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

433

if (clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

434

clk_disable_unprepare(clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

440

int mt8195_afe_prepare_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

444

if (clk) {

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

445

ret = clk_prepare(clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

457

void mt8195_afe_unprepare_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

459

if (clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

460

clk_unprepare(clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

465

int mt8195_afe_enable_clk_atomic(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

469

if (clk) {

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

470

ret = clk_enable(clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

482

void mt8195_afe_disable_clk_atomic(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

484

if (clk)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

485

clk_disable(clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

490

int mt8195_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

495

if (clk) {

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

496

ret = clk_set_rate(clk, rate);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

507

int mt8195_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

508

struct clk *parent)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

512

if (clk && parent) {

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

513

ret = clk_set_parent(clk, parent);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

610

mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

631

mt8195_afe_disable_clk(afe, afe_priv->clk[clk_array[i]]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

663

mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

689

mt8195_afe_disable_clk(afe, afe_priv->clk[clk_array[i]]);

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

104

int mt8195_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

105

void mt8195_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

106

int mt8195_afe_prepare_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

107

void mt8195_afe_unprepare_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

108

int mt8195_afe_enable_clk_atomic(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

109

void mt8195_afe_disable_clk_atomic(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

110

int mt8195_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

112

int mt8195_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8195/mt8195-afe-clk.h

113

struct clk *parent);

sound/soc/mediatek/mt8195/mt8195-afe-common.h

123

struct clk;

sound/soc/mediatek/mt8195/mt8195-afe-common.h

126

struct clk **clk;

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

295

mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

297

mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

300

mt8195_afe_unprepare_clk(afe, afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

302

mt8195_afe_unprepare_clk(afe, afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

325

mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

329

mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

333

mt8195_afe_disable_clk_atomic(afe, afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

336

mt8195_afe_disable_clk_atomic(afe, afe_priv->clk[clk_id]);

sound/soc/mediatek/mt8195/mt8195-audsys-clk.c

155

struct clk *clk;

sound/soc/mediatek/mt8195/mt8195-audsys-clk.c

167

clk = cl->clk;

sound/soc/mediatek/mt8195/mt8195-audsys-clk.c

168

clk_unregister_gate(clk);

sound/soc/mediatek/mt8195/mt8195-audsys-clk.c

177

struct clk *clk;

sound/soc/mediatek/mt8195/mt8195-audsys-clk.c

191

clk = clk_register_gate(afe->dev, gate->name, gate->parent_name,

sound/soc/mediatek/mt8195/mt8195-audsys-clk.c

195

if (IS_ERR(clk)) {

sound/soc/mediatek/mt8195/mt8195-audsys-clk.c

197

gate->name, PTR_ERR(clk));

sound/soc/mediatek/mt8195/mt8195-audsys-clk.c

206

cl->clk = clk;

sound/soc/mediatek/mt8195/mt8195-dai-adda.c

249

struct clk *clk = afe_priv->clk[MT8195_CLK_TOP_AUDIO_H_SEL];

sound/soc/mediatek/mt8195/mt8195-dai-adda.c

250

struct clk *clk_parent;

sound/soc/mediatek/mt8195/mt8195-dai-adda.c

257

clk_parent = afe_priv->clk[MT8195_CLK_TOP_APLL1];

sound/soc/mediatek/mt8195/mt8195-dai-adda.c

260

clk_parent = afe_priv->clk[MT8195_CLK_XTAL_26M];

sound/soc/mediatek/mt8195/mt8195-dai-adda.c

265

mt8195_afe_set_clk_parent(afe, clk, clk_parent);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1556

mt8195_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1569

mt8195_afe_disable_clk(afe, afe_priv->clk[clkdiv_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1594

mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1603

afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1610

mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1634

mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1642

afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1648

mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1946

ret = mt8195_afe_set_clk_parent(afe, afe_priv->clk[clk_id],

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1947

afe_priv->clk[apll_clk_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

1952

ret = mt8195_afe_set_clk_rate(afe, afe_priv->clk[clkdiv_id],

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

2302

mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

2319

mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);

sound/soc/mediatek/mt8195/mt8195-mt6359.c

457

priv->i2so1_mclk = afe_priv->clk[MT8195_CLK_TOP_APLL12_DIV2];

sound/soc/mediatek/mt8195/mt8195-mt6359.c

63

struct clk *i2so1_mclk;

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

50

void mt8365_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk)

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

52

clk_disable_unprepare(clk);

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

55

int mt8365_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

60

if (clk) {

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

61

ret = clk_set_rate(clk, rate);

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

70

int mt8365_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk,

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

71

struct clk *parent)

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

75

if (clk && parent) {

sound/soc/mediatek/mt8365/mt8365-afe-clk.c

76

ret = clk_set_parent(clk, parent);

sound/soc/mediatek/mt8365/mt8365-afe-clk.h

14

struct clk;

sound/soc/mediatek/mt8365/mt8365-afe-clk.h

17

void mt8365_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk);

sound/soc/mediatek/mt8365/mt8365-afe-clk.h

18

int mt8365_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk, unsigned int rate);

sound/soc/mediatek/mt8365/mt8365-afe-clk.h

19

int mt8365_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk, struct clk *parent);

sound/soc/mediatek/mt8365/mt8365-afe-common.h

333

struct clk *clocks[MT8365_CLK_NUM];

sound/soc/meson/aiu-encoder-i2s.c

153

fs = DIV_ROUND_CLOSEST(clk_get_rate(aiu->i2s.clks[MCLK].clk), srate);

sound/soc/meson/aiu-encoder-i2s.c

283

ret = clk_set_rate(aiu->i2s.clks[MCLK].clk, freq);

sound/soc/meson/aiu-encoder-spdif.c

144

ret = clk_set_rate(aiu->spdif.clks[MCLK].clk, mrate);

sound/soc/meson/aiu-encoder-spdif.c

183

ret = clk_set_parent(aiu->spdif.clks[MCLK].clk,

sound/soc/meson/aiu-fifo-i2s.c

169

fifo->pclk = aiu->i2s.clks[PCLK].clk;

sound/soc/meson/aiu-fifo-spdif.c

184

fifo->pclk = aiu->spdif.clks[PCLK].clk;

sound/soc/meson/aiu-fifo.h

13

struct clk;

sound/soc/meson/aiu-fifo.h

24

struct clk *pclk;

sound/soc/meson/aiu.c

215

struct clk *pclk;

sound/soc/meson/aiu.c

86

return clk_prepare_enable(aiu->i2s.clks[PCLK].clk);

sound/soc/meson/aiu.c

93

clk_disable_unprepare(aiu->i2s.clks[PCLK].clk);

sound/soc/meson/aiu.h

10

struct clk;

sound/soc/meson/aiu.h

36

struct clk *spdif_mclk;

sound/soc/meson/axg-fifo.h

10

struct clk;

sound/soc/meson/axg-fifo.h

62

struct clk *pclk;

sound/soc/meson/axg-pdm.c

94

struct clk *dclk;

sound/soc/meson/axg-pdm.c

95

struct clk *sysclk;

sound/soc/meson/axg-pdm.c

96

struct clk *pclk;

sound/soc/meson/axg-spdifin.c

55

struct clk *refclk;

sound/soc/meson/axg-spdifin.c

56

struct clk *pclk;

sound/soc/meson/axg-spdifout.c

61

struct clk *mclk;

sound/soc/meson/axg-spdifout.c

62

struct clk *pclk;

sound/soc/meson/axg-tdm-formatter.c

19

struct clk *pclk;

sound/soc/meson/axg-tdm-formatter.c

20

struct clk *sclk;

sound/soc/meson/axg-tdm-formatter.c

21

struct clk *lrclk;

sound/soc/meson/axg-tdm-formatter.c

22

struct clk *sclk_sel;

sound/soc/meson/axg-tdm-formatter.c

23

struct clk *lrclk_sel;

sound/soc/meson/axg-tdm.h

25

struct clk *sclk;

sound/soc/meson/axg-tdm.h

26

struct clk *lrclk;

sound/soc/meson/axg-tdm.h

27

struct clk *mclk;

sound/soc/meson/t9015.c

251

struct clk *pclk;

sound/soc/mxs/mxs-saif.c

191

ret = clk_prepare_enable(master_saif->clk);

sound/soc/mxs/mxs-saif.c

203

ret = clk_set_rate(master_saif->clk, 512 * rate);

sound/soc/mxs/mxs-saif.c

210

ret = clk_set_rate(master_saif->clk, 384 * rate);

sound/soc/mxs/mxs-saif.c

214

clk_disable_unprepare(master_saif->clk);

sound/soc/mxs/mxs-saif.c

218

ret = clk_set_rate(master_saif->clk, 512 * rate);

sound/soc/mxs/mxs-saif.c

222

clk_disable_unprepare(master_saif->clk);

sound/soc/mxs/mxs-saif.c

294

clk_disable_unprepare(saif->clk);

sound/soc/mxs/mxs-saif.c

330

ret = clk_prepare_enable(saif->clk);

sound/soc/mxs/mxs-saif.c

451

ret = clk_prepare(saif->clk);

sound/soc/mxs/mxs-saif.c

463

clk_unprepare(saif->clk);

sound/soc/mxs/mxs-saif.c

514

ret = clk_enable(saif->clk);

sound/soc/mxs/mxs-saif.c

518

ret = clk_set_rate(saif->clk, 24000000);

sound/soc/mxs/mxs-saif.c

519

clk_disable(saif->clk);

sound/soc/mxs/mxs-saif.c

523

ret = clk_prepare(master_saif->clk);

sound/soc/mxs/mxs-saif.c

594

ret = clk_enable(master_saif->clk);

sound/soc/mxs/mxs-saif.c

605

ret = clk_enable(saif->clk);

sound/soc/mxs/mxs-saif.c

608

clk_disable(master_saif->clk);

sound/soc/mxs/mxs-saif.c

669

clk_disable(master_saif->clk);

sound/soc/mxs/mxs-saif.c

675

clk_disable(saif->clk);

sound/soc/mxs/mxs-saif.c

759

struct clk *clk;

sound/soc/mxs/mxs-saif.c

762

clk = clk_register_divider(&pdev->dev, "mxs_saif_mclk",

sound/soc/mxs/mxs-saif.c

763

__clk_get_name(saif->clk), 0,

sound/soc/mxs/mxs-saif.c

767

if (IS_ERR(clk)) {

sound/soc/mxs/mxs-saif.c

768

ret = PTR_ERR(clk);

sound/soc/mxs/mxs-saif.c

772

return PTR_ERR(clk);

sound/soc/mxs/mxs-saif.c

775

ret = of_clk_add_provider(np, of_clk_src_simple_get, clk);

sound/soc/mxs/mxs-saif.c

828

saif->clk = devm_clk_get(&pdev->dev, NULL);

sound/soc/mxs/mxs-saif.c

829

if (IS_ERR(saif->clk)) {

sound/soc/mxs/mxs-saif.c

830

ret = PTR_ERR(saif->clk);

sound/soc/mxs/mxs-saif.h

102

struct clk *clk;

sound/soc/pxa/mmp-sspa.c

151

ret = clk_set_rate(sspa->clk, freq_out);

sound/soc/pxa/mmp-sspa.c

265

clk_set_rate(sspa->clk, params_rate(params) *

sound/soc/pxa/mmp-sspa.c

36

struct clk *clk;

sound/soc/pxa/mmp-sspa.c

37

struct clk *audio_clk;

sound/soc/pxa/mmp-sspa.c

38

struct clk *sysclk;

sound/soc/pxa/mmp-sspa.c

485

sspa->clk = devm_clk_get(&pdev->dev, "bitclk");

sound/soc/pxa/mmp-sspa.c

486

if (IS_ERR(sspa->clk))

sound/soc/pxa/mmp-sspa.c

487

return PTR_ERR(sspa->clk);

sound/soc/pxa/mmp-sspa.c

508

sspa->clk = devm_clk_get(&pdev->dev, NULL);

sound/soc/pxa/mmp-sspa.c

509

if (IS_ERR(sspa->clk))

sound/soc/pxa/mmp-sspa.c

510

return PTR_ERR(sspa->clk);

sound/soc/pxa/mmp-sspa.c

89

clk_prepare_enable(sspa->clk);

sound/soc/pxa/mmp-sspa.c

99

clk_disable_unprepare(sspa->clk);

sound/soc/pxa/pxa-ssp.c

107

clk_disable_unprepare(ssp->clk);

sound/soc/pxa/pxa-ssp.c

124

clk_prepare_enable(ssp->clk);

sound/soc/pxa/pxa-ssp.c

132

clk_disable_unprepare(ssp->clk);

sound/soc/pxa/pxa-ssp.c

142

clk_prepare_enable(ssp->clk);

sound/soc/pxa/pxa-ssp.c

153

clk_disable_unprepare(ssp->clk);

sound/soc/pxa/pxa-ssp.c

243

clk_disable_unprepare(ssp->clk);

sound/soc/pxa/pxa-ssp.c

246

clk_prepare_enable(ssp->clk);

sound/soc/pxa/pxa-ssp.c

40

struct clk *extclk;

sound/soc/pxa/pxa-ssp.c

82

clk_prepare_enable(ssp->clk);

sound/soc/pxa/pxa2xx-i2s.c

77

static struct clk *clk_i2s;

sound/soc/pxa/spitz.c

122

unsigned int clk = 0;

sound/soc/pxa/spitz.c

130

clk = 12288000;

sound/soc/pxa/spitz.c

135

clk = 11289600;

sound/soc/pxa/spitz.c

140

ret = snd_soc_dai_set_sysclk(codec_dai, WM8750_SYSCLK, clk,

sound/soc/qcom/lpass.h

101

struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS];

sound/soc/qcom/lpass.h

104

struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS];

sound/soc/qcom/lpass.h

106

struct clk *codec_mem0;

sound/soc/qcom/lpass.h

107

struct clk *codec_mem1;

sound/soc/qcom/lpass.h

108

struct clk *codec_mem2;

sound/soc/qcom/lpass.h

109

struct clk *va_mem0;

sound/soc/qcom/lpass.h

98

struct clk *ahbix_clk;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

100

cc->desc->lpass_unvote_clk(clk->dev, clk->q6dsp_clk_id, clk->handle);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

154

struct q6dsp_clk *clk;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

156

clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

157

if (!clk)

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

160

clk->dev = dev;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

161

clk->q6dsp_clk_id = q6dsp_clks[i].q6dsp_clk_id;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

162

clk->rate = q6dsp_clks[i].rate;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

163

clk->hw.init = &init;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

165

if (clk->rate)

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

170

cc->clks[id] = clk;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

172

ret = devm_clk_hw_register(dev, &clk->hw);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

38

struct q6dsp_clk *clk = to_q6dsp_clk(hw);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

39

struct q6dsp_cc *cc = dev_get_drvdata(clk->dev);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

41

return cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes,

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

42

Q6DSP_LPASS_CLK_ROOT_DEFAULT, clk->rate);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

47

struct q6dsp_clk *clk = to_q6dsp_clk(hw);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

48

struct q6dsp_cc *cc = dev_get_drvdata(clk->dev);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

50

cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes,

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

57

struct q6dsp_clk *clk = to_q6dsp_clk(hw);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

59

clk->rate = rate;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

67

struct q6dsp_clk *clk = to_q6dsp_clk(hw);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

69

return clk->rate;

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

88

struct q6dsp_clk *clk = to_q6dsp_clk(hw);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

89

struct q6dsp_cc *cc = dev_get_drvdata(clk->dev);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

91

return cc->desc->lpass_vote_clk(clk->dev, clk->q6dsp_clk_id,

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

92

clk_hw_get_name(&clk->hw), &clk->handle);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

97

struct q6dsp_clk *clk = to_q6dsp_clk(hw);

sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c

98

struct q6dsp_cc *cc = dev_get_drvdata(clk->dev);

sound/soc/renesas/fsi.c

1177

u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;

sound/soc/renesas/fsi.c

1185

fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);

sound/soc/renesas/fsi.c

1343

u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;

sound/soc/renesas/fsi.c

1351

fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);

sound/soc/renesas/fsi.c

235

struct clk *own;

sound/soc/renesas/fsi.c

236

struct clk *xck;

sound/soc/renesas/fsi.c

237

struct clk *ick;

sound/soc/renesas/fsi.c

238

struct clk *div;

sound/soc/renesas/fsi.c

914

struct clk *xck = fsi->clock.xck;

sound/soc/renesas/fsi.c

915

struct clk *ick = fsi->clock.ick;

sound/soc/renesas/fsi.c

946

struct clk *ick = fsi->clock.ick;

sound/soc/renesas/fsi.c

947

struct clk *div = fsi->clock.div;

sound/soc/renesas/migor.c

29

static unsigned long siumckb_recalc(struct clk *clk)

sound/soc/renesas/migor.c

38

static struct clk siumckb_clk = {

sound/soc/renesas/rcar/adg.c

315

struct clk *clk;

sound/soc/renesas/rcar/adg.c

328

for_each_rsnd_clkin(clk, adg, i)

sound/soc/renesas/rcar/adg.c

34

struct clk *adg;

sound/soc/renesas/rcar/adg.c

35

struct clk *clkin[CLKINMAX];

sound/soc/renesas/rcar/adg.c

36

struct clk *clkout[CLKOUTMAX];

sound/soc/renesas/rcar/adg.c

37

struct clk *null_clk;

sound/soc/renesas/rcar/adg.c

386

struct clk *clk;

sound/soc/renesas/rcar/adg.c

399

for_each_rsnd_clkin(clk, adg, i) {

sound/soc/renesas/rcar/adg.c

401

ret = clk_prepare_enable(clk);

sound/soc/renesas/rcar/adg.c

411

adg->clkin_rate[i] = clk_get_rate(clk);

sound/soc/renesas/rcar/adg.c

414

clk_disable_unprepare(clk);

sound/soc/renesas/rcar/adg.c

434

static struct clk *rsnd_adg_create_null_clk(struct rsnd_priv *priv,

sound/soc/renesas/rcar/adg.c

439

struct clk *clk;

sound/soc/renesas/rcar/adg.c

441

clk = clk_register_fixed_rate(dev, name, parent, 0, 0);

sound/soc/renesas/rcar/adg.c

442

if (IS_ERR_OR_NULL(clk)) {

sound/soc/renesas/rcar/adg.c

444

return ERR_CAST(clk);

sound/soc/renesas/rcar/adg.c

447

return clk;

sound/soc/renesas/rcar/adg.c

450

static struct clk *rsnd_adg_null_clk_get(struct rsnd_priv *priv)

sound/soc/renesas/rcar/adg.c

475

struct clk *clk;

sound/soc/renesas/rcar/adg.c

491

clk = devm_clk_get(dev, "adg");

sound/soc/renesas/rcar/adg.c

492

if (IS_ERR_OR_NULL(clk))

sound/soc/renesas/rcar/adg.c

493

clk = rsnd_adg_null_clk_get(priv);

sound/soc/renesas/rcar/adg.c

494

adg->adg = clk;

sound/soc/renesas/rcar/adg.c

498

clk = devm_clk_get(dev, clkin_name[i]);

sound/soc/renesas/rcar/adg.c

500

if (IS_ERR_OR_NULL(clk))

sound/soc/renesas/rcar/adg.c

501

clk = rsnd_adg_null_clk_get(priv);

sound/soc/renesas/rcar/adg.c

502

if (IS_ERR_OR_NULL(clk))

sound/soc/renesas/rcar/adg.c

505

adg->clkin[i] = clk;

sound/soc/renesas/rcar/adg.c

523

struct clk *clk;

sound/soc/renesas/rcar/adg.c

526

for_each_rsnd_clkout(clk, adg, i)

sound/soc/renesas/rcar/adg.c

527

clk_unregister_fixed_rate(clk);

sound/soc/renesas/rcar/adg.c

533

struct clk *clk;

sound/soc/renesas/rcar/adg.c

610

for_each_rsnd_clkin(clk, adg, i) {

sound/soc/renesas/rcar/adg.c

613

rate = clk_get_rate(clk);

sound/soc/renesas/rcar/adg.c

622

rate = (clk_get_rate(clk) / req_Hz[ADG_HZ_441]) * req_Hz[ADG_HZ_441];

sound/soc/renesas/rcar/adg.c

631

parent_clk_name = __clk_get_name(clk);

sound/soc/renesas/rcar/adg.c

641

rate = (clk_get_rate(clk) / req_Hz[ADG_HZ_48]) * req_Hz[ADG_HZ_48];

sound/soc/renesas/rcar/adg.c

650

parent_clk_name = __clk_get_name(clk);

sound/soc/renesas/rcar/adg.c

679

clk = clk_register_fixed_rate(dev, clkout_name[CLKOUT],

sound/soc/renesas/rcar/adg.c

681

if (IS_ERR_OR_NULL(clk))

sound/soc/renesas/rcar/adg.c

684

adg->clkout[CLKOUT] = clk;

sound/soc/renesas/rcar/adg.c

686

of_clk_add_provider(np, of_clk_src_simple_get, clk);

sound/soc/renesas/rcar/adg.c

693

clk = clk_register_fixed_rate(dev, clkout_name[i],

sound/soc/renesas/rcar/adg.c

696

if (IS_ERR_OR_NULL(clk))

sound/soc/renesas/rcar/adg.c

699

adg->clkout[i] = clk;

sound/soc/renesas/rcar/adg.c

748

struct clk *clk;

sound/soc/renesas/rcar/adg.c

751

for_each_rsnd_clkin(clk, adg, i)

sound/soc/renesas/rcar/adg.c

753

__clk_get_name(clk), clk, clk_get_rate(clk));

sound/soc/renesas/rcar/adg.c

764

for_each_rsnd_clkout(clk, adg, i)

sound/soc/renesas/rcar/adg.c

766

__clk_get_name(clk), clk, clk_get_rate(clk));

sound/soc/renesas/rcar/core.c

198

struct clk *clk,

sound/soc/renesas/rcar/core.c

202

int ret = clk_prepare(clk);

sound/soc/renesas/rcar/core.c

210

mod->clk = clk;

sound/soc/renesas/rcar/core.c

218

clk_unprepare(mod->clk);

sound/soc/renesas/rcar/core.c

219

mod->clk = NULL;

sound/soc/renesas/rcar/ctu.c

321

struct clk *clk;

sound/soc/renesas/rcar/ctu.c

356

clk = devm_clk_get(dev, name);

sound/soc/renesas/rcar/ctu.c

357

if (IS_ERR(clk)) {

sound/soc/renesas/rcar/ctu.c

358

ret = PTR_ERR(clk);

sound/soc/renesas/rcar/ctu.c

363

clk, RSND_MOD_CTU, i);

sound/soc/renesas/rcar/dvc.c

329

struct clk *clk;

sound/soc/renesas/rcar/dvc.c

360

clk = devm_clk_get(dev, name);

sound/soc/renesas/rcar/dvc.c

361

if (IS_ERR(clk)) {

sound/soc/renesas/rcar/dvc.c

362

ret = PTR_ERR(clk);

sound/soc/renesas/rcar/dvc.c

367

clk, RSND_MOD_DVC, i);

sound/soc/renesas/rcar/mix.c

293

struct clk *clk;

sound/soc/renesas/rcar/mix.c

324

clk = devm_clk_get(dev, name);

sound/soc/renesas/rcar/mix.c

325

if (IS_ERR(clk)) {

sound/soc/renesas/rcar/mix.c

326

ret = PTR_ERR(clk);

sound/soc/renesas/rcar/mix.c

331

clk, RSND_MOD_MIX, i);

sound/soc/renesas/rcar/rsnd.h

355

struct clk *clk;

sound/soc/renesas/rcar/rsnd.h

415

#define rsnd_mod_power_on(mod) clk_enable((mod)->clk)

sound/soc/renesas/rcar/rsnd.h

416

#define rsnd_mod_power_off(mod) clk_disable((mod)->clk)

sound/soc/renesas/rcar/rsnd.h

422

struct clk *clk,

sound/soc/renesas/rcar/src.c

717

struct clk *clk;

sound/soc/renesas/rcar/src.c

762

clk = devm_clk_get(dev, name);

sound/soc/renesas/rcar/src.c

763

if (IS_ERR(clk)) {

sound/soc/renesas/rcar/src.c

764

ret = PTR_ERR(clk);

sound/soc/renesas/rcar/src.c

769

&rsnd_src_ops, clk, RSND_MOD_SRC, i);

sound/soc/renesas/rcar/ssi.c

1164

struct clk *clk;

sound/soc/renesas/rcar/ssi.c

1204

clk = devm_clk_get(dev, name);

sound/soc/renesas/rcar/ssi.c

1205

if (IS_ERR(clk)) {

sound/soc/renesas/rcar/ssi.c

1206

ret = PTR_ERR(clk);

sound/soc/renesas/rcar/ssi.c

1227

ret = rsnd_mod_init(priv, rsnd_mod_get(ssi), ops, clk,

sound/soc/renesas/rz-ssi.c

108

struct clk *sfr_clk;

sound/soc/renesas/rz-ssi.c

109

struct clk *clk;

sound/soc/renesas/rz-ssi.c

1128

struct clk *audio_clk;

sound/soc/renesas/rz-ssi.c

1142

ssi->clk = devm_clk_get(dev, "ssi");

sound/soc/renesas/rz-ssi.c

1143

if (IS_ERR(ssi->clk))

sound/soc/renesas/rz-ssi.c

1144

return PTR_ERR(ssi->clk);

sound/soc/renesas/siu_dai.c

628

struct clk *siu_clk, *parent_clk;

sound/soc/rockchip/rockchip_i2s.c

34

struct clk *hclk;

sound/soc/rockchip/rockchip_i2s.c

35

struct clk *mclk;

sound/soc/rockchip/rockchip_i2s_tdm.c

51

struct clk *hclk;

sound/soc/rockchip/rockchip_i2s_tdm.c

52

struct clk *mclk_tx;

sound/soc/rockchip/rockchip_i2s_tdm.c

53

struct clk *mclk_rx;

sound/soc/rockchip/rockchip_i2s_tdm.c

653

struct clk *mclk;

sound/soc/rockchip/rockchip_pdm.c

102

if (!clk) {

sound/soc/rockchip/rockchip_pdm.c

103

clk = clk_round_rate(pdm->clk, PDM_SIGNOFF_CLK_RATE);

sound/soc/rockchip/rockchip_pdm.c

104

*clk_src = clk;

sound/soc/rockchip/rockchip_pdm.c

106

return clk;

sound/soc/rockchip/rockchip_pdm.c

125

static unsigned int get_pdm_cic_ratio(unsigned int clk)

sound/soc/rockchip/rockchip_pdm.c

127

switch (clk) {

sound/soc/rockchip/rockchip_pdm.c

215

ret = clk_set_rate(pdm->clk, clk_src);

sound/soc/rockchip/rockchip_pdm.c

32

struct clk *clk;

sound/soc/rockchip/rockchip_pdm.c

33

struct clk *hclk;

sound/soc/rockchip/rockchip_pdm.c

414

clk_disable_unprepare(pdm->clk);

sound/soc/rockchip/rockchip_pdm.c

42

unsigned int clk;

sound/soc/rockchip/rockchip_pdm.c

425

ret = clk_prepare_enable(pdm->clk);

sound/soc/rockchip/rockchip_pdm.c

433

clk_disable_unprepare(pdm->clk);

sound/soc/rockchip/rockchip_pdm.c

606

pdm->clk = devm_clk_get(&pdev->dev, "pdm_clk");

sound/soc/rockchip/rockchip_pdm.c

607

if (IS_ERR(pdm->clk))

sound/soc/rockchip/rockchip_pdm.c

608

return PTR_ERR(pdm->clk);

sound/soc/rockchip/rockchip_pdm.c

667

clk_disable_unprepare(pdm->clk);

sound/soc/rockchip/rockchip_pdm.c

80

unsigned int i, count, clk, div, rate;

sound/soc/rockchip/rockchip_pdm.c

82

clk = 0;

sound/soc/rockchip/rockchip_pdm.c

84

return clk;

sound/soc/rockchip/rockchip_pdm.c

93

rate = clk_round_rate(pdm->clk, clkref[i].clk);

sound/soc/rockchip/rockchip_pdm.c

94

if (rate != clkref[i].clk)

sound/soc/rockchip/rockchip_pdm.c

96

clk = clkref[i].clk;

sound/soc/rockchip/rockchip_pdm.c

97

*clk_src = clkref[i].clk;

sound/soc/rockchip/rockchip_sai.c

44

struct clk *hclk;

sound/soc/rockchip/rockchip_sai.c

45

struct clk *mclk;

sound/soc/rockchip/rockchip_spdif.c

55

struct clk *mclk;

sound/soc/rockchip/rockchip_spdif.c

56

struct clk *hclk;

sound/soc/samsung/i2s.c

102

struct clk *clk;

sound/soc/samsung/i2s.c

105

struct clk *op_clk;

sound/soc/samsung/i2s.c

1228

clk_disable_unprepare(priv->clk);

sound/soc/samsung/i2s.c

123

struct clk *clk_table[3];

sound/soc/samsung/i2s.c

1238

ret = clk_prepare_enable(priv->clk);

sound/soc/samsung/i2s.c

1245

clk_disable_unprepare(priv->clk);

sound/soc/samsung/i2s.c

1283

struct clk *rclksrc;

sound/soc/samsung/i2s.c

1468

priv->clk = devm_clk_get(&pdev->dev, "iis");

sound/soc/samsung/i2s.c

1469

if (IS_ERR(priv->clk)) {

sound/soc/samsung/i2s.c

1471

return PTR_ERR(priv->clk);

sound/soc/samsung/i2s.c

1474

ret = clk_prepare_enable(priv->clk);

sound/soc/samsung/i2s.c

1554

clk_disable_unprepare(priv->clk);

sound/soc/samsung/i2s.c

1571

clk_disable_unprepare(priv->clk);

sound/soc/samsung/i2s.c

731

struct clk *rclksrc;

sound/soc/samsung/odroid.c

16

struct clk *clk_i2s_bus;

sound/soc/samsung/odroid.c

17

struct clk *sclk_i2s;

sound/soc/samsung/pcm.c

127

struct clk *pclk;

sound/soc/samsung/pcm.c

128

struct clk *cclk;

sound/soc/samsung/pcm.c

266

struct clk *clk;

sound/soc/samsung/pcm.c

286

clk = pcm->pclk;

sound/soc/samsung/pcm.c

288

clk = pcm->cclk;

sound/soc/samsung/pcm.c

291

sclk_div = clk_get_rate(clk) / pcm->sclk_per_fs /

sound/soc/samsung/pcm.c

312

clk_get_rate(clk), pcm->sclk_per_fs,

sound/soc/samsung/smdk_spdif.c

20

struct clk *fout_epll, *mout_epll, *sclk_audio0, *sclk_spdif;

sound/soc/samsung/smdk_spdif.c

77

struct clk *fout_epll, *sclk_spdif;

sound/soc/samsung/snow.c

23

struct clk *clk_i2s_bus;

sound/soc/samsung/spdif.c

83

struct clk *pclk;

sound/soc/samsung/spdif.c

84

struct clk *sclk;

sound/soc/soc-dapm.c

1705

if (!w->clk)

sound/soc/soc-dapm.c

1711

return clk_prepare_enable(w->clk);

sound/soc/soc-dapm.c

1713

clk_disable_unprepare(w->clk);

sound/soc/soc-dapm.c

3796

w->clk = devm_clk_get(dev, widget->name);

sound/soc/soc-dapm.c

3797

if (IS_ERR(w->clk)) {

sound/soc/soc-dapm.c

3798

ret = PTR_ERR(w->clk);

sound/soc/sof/mediatek/adsp_helper.h

43

struct clk **clk;

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

30

priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL);

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

31

if (!priv->clk)

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

35

priv->clk[i] = devm_clk_get(dev, adsp_clks[i]);

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

37

if (IS_ERR(priv->clk[i]))

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

38

return PTR_ERR(priv->clk[i]);

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

50

ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIODSP]);

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

57

ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP_BUS]);

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

61

clk_disable_unprepare(priv->clk[CLK_TOP_AUDIODSP]);

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

72

clk_disable_unprepare(priv->clk[CLK_TOP_ADSP_BUS]);

sound/soc/sof/mediatek/mt8186/mt8186-clk.c

73

clk_disable_unprepare(priv->clk[CLK_TOP_AUDIODSP]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

105

clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_H]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

106

clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

107

clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

108

clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

109

clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

121

ret = clk_set_parent(priv->clk[CLK_TOP_ADSP],

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

122

priv->clk[CLK_TOP_CLK26M]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

128

ret = clk_set_parent(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS],

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

129

priv->clk[CLK_TOP_MAINPLL_D7_D2]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

135

ret = clk_set_parent(priv->clk[CLK_TOP_AUDIO_H],

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

136

priv->clk[CLK_TOP_CLK26M]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

32

priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

34

if (!priv->clk)

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

38

priv->clk[i] = devm_clk_get(dev, adsp_clks[i]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

39

if (IS_ERR(priv->clk[i]))

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

40

return PTR_ERR(priv->clk[i]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

52

ret = clk_prepare_enable(priv->clk[CLK_TOP_MAINPLL_D7_D2]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

59

ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

66

ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

73

ret = clk_prepare_enable(priv->clk[CLK_SCP_ADSP_AUDIODSP]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

80

ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_H]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

90

clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

92

clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

94

clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);

sound/soc/sof/mediatek/mt8195/mt8195-clk.c

96

clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);

sound/soc/sophgo/cv1800b-tdm.c

119

struct clk *clk;

sound/soc/sophgo/cv1800b-tdm.c

120

struct clk *sysclk;

sound/soc/sophgo/cv1800b-tdm.c

657

i2s->clk = devm_clk_get_enabled(dev, "i2s");

sound/soc/sophgo/cv1800b-tdm.c

658

if (IS_ERR(i2s->clk))

sound/soc/sophgo/cv1800b-tdm.c

659

return dev_err_probe(dev, PTR_ERR(i2s->clk),

sound/soc/spacemit/k1_i2s.c

394

struct clk *clk;

sound/soc/spacemit/k1_i2s.c

412

clk = devm_clk_get_enabled(i2s->dev, "sspa_bus");

sound/soc/spacemit/k1_i2s.c

413

if (IS_ERR(clk))

sound/soc/spacemit/k1_i2s.c

414

return dev_err_probe(i2s->dev, PTR_ERR(clk), "failed to enable sspa_bus clock\n");

sound/soc/spacemit/k1_i2s.c

53

struct clk *sysclk;

sound/soc/spacemit/k1_i2s.c

54

struct clk *bclk;

sound/soc/spacemit/k1_i2s.c

55

struct clk *sspa_clk;

sound/soc/spear/spdif_in.c

124

clk_enable(host->clk);

sound/soc/spear/spdif_in.c

144

clk_disable(host->clk);

sound/soc/spear/spdif_in.c

229

host->clk = devm_clk_get(&pdev->dev, NULL);

sound/soc/spear/spdif_in.c

230

if (IS_ERR(host->clk))

sound/soc/spear/spdif_in.c

231

return PTR_ERR(host->clk);

sound/soc/spear/spdif_in.c

35

struct clk *clk;

sound/soc/spear/spdif_out.c

296

host->clk = devm_clk_get(&pdev->dev, NULL);

sound/soc/spear/spdif_out.c

297

if (IS_ERR(host->clk))

sound/soc/spear/spdif_out.c

298

return PTR_ERR(host->clk);

sound/soc/spear/spdif_out.c

325

clk_disable(host->clk);

sound/soc/spear/spdif_out.c

336

clk_enable(host->clk);

sound/soc/spear/spdif_out.c

35

struct clk *clk;

sound/soc/spear/spdif_out.c

69

ret = clk_enable(host->clk);

sound/soc/spear/spdif_out.c

87

clk_disable(host->clk);

sound/soc/spear/spdif_out.c

96

clk_set_rate(host->clk, core_freq);

sound/soc/spear/spdif_out.c

97

divider = DIV_ROUND_CLOSEST(clk_get_rate(host->clk), (rate * 128));

sound/soc/starfive/jh7110_pwmdac.c

287

ret = clk_set_rate(dev->clks[1].clk, core_clk_rate);

sound/soc/starfive/jh7110_tdm.c

263

ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);

sound/soc/sti/uniperif.h

1314

struct clk *clk;

sound/soc/sti/uniperif_player.c

1076

player->clk = of_clk_get(pdev->dev.of_node, 0);

sound/soc/sti/uniperif_player.c

1077

if (IS_ERR(player->clk)) {

sound/soc/sti/uniperif_player.c

1079

return PTR_ERR(player->clk);

sound/soc/sti/uniperif_player.c

190

ret = clk_set_rate(player->clk, rate_adjusted);

sound/soc/sti/uniperif_player.c

194

rate_achieved = clk_get_rate(player->clk);

sound/soc/sti/uniperif_player.c

868

ret = clk_prepare_enable(player->clk);

sound/soc/sti/uniperif_player.c

889

clk_disable_unprepare(player->clk);

sound/soc/sti/uniperif_player.c

944

clk_disable_unprepare(player->clk);

sound/soc/stm/stm32_i2s.c

244

struct clk *i2sclk;

sound/soc/stm/stm32_i2s.c

245

struct clk *i2smclk;

sound/soc/stm/stm32_i2s.c

246

struct clk *pclk;

sound/soc/stm/stm32_i2s.c

247

struct clk *x8kclk;

sound/soc/stm/stm32_i2s.c

248

struct clk *x11kclk;

sound/soc/stm/stm32_i2s.c

367

struct clk *parent_clk;

sound/soc/stm/stm32_i2s.c

578

i2s->i2smclk = hw->clk;

sound/soc/stm/stm32_sai.h

300

struct clk *pclk;

sound/soc/stm/stm32_sai.h

301

struct clk *clk_x8k;

sound/soc/stm/stm32_sai.h

302

struct clk *clk_x11k;

sound/soc/stm/stm32_sai_sub.c

113

struct clk *sai_ck;

sound/soc/stm/stm32_sai_sub.c

114

struct clk *sai_mclk;

sound/soc/stm/stm32_sai_sub.c

385

struct clk *parent_clk = sai->pdata->clk_x8k;

sound/soc/stm/stm32_sai_sub.c

606

sai->sai_mclk = hw->clk;

sound/soc/stm/stm32_spdifrx.c

235

struct clk *kclk;

sound/soc/sunxi/sun4i-codec.c

331

struct clk *clk_apb;

sound/soc/sunxi/sun4i-codec.c

332

struct clk *clk_module;

sound/soc/sunxi/sun4i-i2s.c

212

struct clk *bus_clk;

sound/soc/sunxi/sun4i-i2s.c

213

struct clk *mod_clk;

sound/soc/sunxi/sun4i-spdif.c

187

struct clk *spdif_clk;

sound/soc/sunxi/sun4i-spdif.c

188

struct clk *apb_clk;

sound/soc/sunxi/sun50i-dmic.c

62

struct clk *dmic_clk;

sound/soc/sunxi/sun50i-dmic.c

63

struct clk *bus_clk;

sound/soc/sunxi/sun8i-codec.c

227

struct clk *clk_bus;

sound/soc/sunxi/sun8i-codec.c

228

struct clk *clk_module;

sound/soc/tegra/tegra186_dspk.h

66

struct clk *clk_dspk;

sound/soc/tegra/tegra20_ac97.h

78

struct clk *clk_ac97;

sound/soc/tegra/tegra20_i2s.c

275

struct clk *parent = clk_get_parent(i2s->clk_i2s);

sound/soc/tegra/tegra20_i2s.h

143

struct clk *clk_i2s;

sound/soc/tegra/tegra20_spdif.c

188

struct clk *parent = clk_get_parent(spdif->clk_spdif_out);

sound/soc/tegra/tegra20_spdif.h

450

struct clk *clk_spdif_out;

sound/soc/tegra/tegra210_ahub.c

2229

clk_disable_unprepare(ahub->clk);

sound/soc/tegra/tegra210_ahub.c

2239

err = clk_prepare_enable(ahub->clk);

sound/soc/tegra/tegra210_ahub.c

2267

ahub->clk = devm_clk_get(&pdev->dev, "ahub");

sound/soc/tegra/tegra210_ahub.c

2268

if (IS_ERR(ahub->clk)) {

sound/soc/tegra/tegra210_ahub.c

2270

return PTR_ERR(ahub->clk);

sound/soc/tegra/tegra210_ahub.h

198

struct clk *clk;

sound/soc/tegra/tegra210_dmic.h

72

struct clk *clk_dmic;

sound/soc/tegra/tegra210_i2s.h

162

struct clk *clk_i2s;

sound/soc/tegra/tegra210_i2s.h

163

struct clk *clk_sync_input;

sound/soc/tegra/tegra30_i2s.h

227

struct clk *clk_i2s;

sound/soc/tegra/tegra_asoc_machine.c

556

struct clk *clk_out_1, *clk_extern1;

sound/soc/tegra/tegra_asoc_machine.h

31

struct clk *clk_pll_a_out0;

sound/soc/tegra/tegra_asoc_machine.h

32

struct clk *clk_pll_a;

sound/soc/tegra/tegra_asoc_machine.h

33

struct clk *clk_cdev1;

sound/soc/tegra/tegra_asoc_machine.h

6

struct clk;

sound/soc/tegra/tegra_audio_graph_card.c

37

struct clk *clk_plla_out0;

sound/soc/tegra/tegra_audio_graph_card.c

38

struct clk *clk_plla;

sound/soc/ti/davinci-evm.c

181

struct clk *mclk;

sound/soc/ti/davinci-evm.c

25

struct clk *mclk;

sound/soc/ti/davinci-i2s.c

134

struct clk *clk;

sound/soc/ti/davinci-i2s.c

135

struct clk *ext_clk;

sound/soc/ti/davinci-i2s.c

511

freq = clk_get_rate(dev->clk);

sound/soc/ti/davinci-i2s.c

549

freq = clk_get_rate(dev->clk);

sound/soc/ti/davinci-i2s.c

849

dev->clk = devm_clk_get_optional(&pdev->dev, "fck");

sound/soc/ti/davinci-i2s.c

850

if (IS_ERR(dev->clk))

sound/soc/ti/davinci-i2s.c

851

return dev_err_probe(&pdev->dev, PTR_ERR(dev->clk), "Invalid functional clock\n");

sound/soc/ti/davinci-i2s.c

852

if (!dev->clk) {

sound/soc/ti/davinci-i2s.c

853

dev->clk = devm_clk_get(&pdev->dev, NULL);

sound/soc/ti/davinci-i2s.c

854

if (IS_ERR(dev->clk))

sound/soc/ti/davinci-i2s.c

855

return dev_err_probe(&pdev->dev, PTR_ERR(dev->clk),

sound/soc/ti/davinci-i2s.c

863

ret = clk_prepare_enable(dev->clk);

sound/soc/ti/davinci-i2s.c

897

clk_disable_unprepare(dev->clk);

sound/soc/ti/davinci-i2s.c

908

clk_disable_unprepare(dev->clk);

sound/soc/ti/davinci-mcasp.c

2080

struct clk *gfclk, *parent_clk;

sound/soc/ti/j721e-evm.c

464

struct clk *parent;

sound/soc/ti/j721e-evm.c

563

struct clk *pll;

sound/soc/ti/j721e-evm.c

60

struct clk *target;

sound/soc/ti/j721e-evm.c

61

struct clk *parent[2];

sound/soc/ti/n810.c

34

static struct clk *sys_clkout2;

sound/soc/ti/n810.c

35

static struct clk *sys_clkout2_src;

sound/soc/ti/n810.c

36

static struct clk *func96m_clk;

sound/soc/ti/omap-dmic.c

282

struct clk *parent_clk, *mux;

sound/soc/ti/omap-dmic.c

36

struct clk *fclk;

sound/soc/ti/omap-mcbsp-priv.h

243

struct clk *fclk;

sound/soc/ti/omap-mcbsp-st.c

55

struct clk *mcbsp_iclk;

sound/soc/ti/omap-mcbsp.c

59

struct clk *fck_src;

sound/soc/ti/osk5912.c

25

static struct clk *tlv320aic23_mclk;

sound/soc/uniphier/aio-cpu.c

535

clk_disable_unprepare(aio->chip->clk);

sound/soc/uniphier/aio-cpu.c

560

ret = clk_prepare_enable(aio->chip->clk);

sound/soc/uniphier/aio-cpu.c

597

clk_disable_unprepare(aio->chip->clk);

sound/soc/uniphier/aio-cpu.c

748

chip->clk = devm_clk_get(dev, "aio");

sound/soc/uniphier/aio-cpu.c

749

if (IS_ERR(chip->clk))

sound/soc/uniphier/aio-cpu.c

750

return PTR_ERR(chip->clk);

sound/soc/uniphier/aio-cpu.c

787

ret = clk_prepare_enable(chip->clk);

sound/soc/uniphier/aio-cpu.c

815

clk_disable_unprepare(chip->clk);

sound/soc/uniphier/aio-cpu.c

826

clk_disable_unprepare(chip->clk);

sound/soc/uniphier/aio.h

292

struct clk *clk;

sound/soc/uniphier/evea.c

337

clk_disable_unprepare(evea->clk);

sound/soc/uniphier/evea.c

347

ret = clk_prepare_enable(evea->clk);

sound/soc/uniphier/evea.c

382

clk_disable_unprepare(evea->clk);

sound/soc/uniphier/evea.c

460

evea->clk = devm_clk_get(&pdev->dev, "evea");

sound/soc/uniphier/evea.c

461

if (IS_ERR(evea->clk))

sound/soc/uniphier/evea.c

462

return PTR_ERR(evea->clk);

sound/soc/uniphier/evea.c

48

struct clk *clk, *clk_exiv;

sound/soc/uniphier/evea.c

485

ret = clk_prepare_enable(evea->clk);

sound/soc/uniphier/evea.c

534

clk_disable_unprepare(evea->clk);

sound/soc/uniphier/evea.c

548

clk_disable_unprepare(evea->clk);

sound/soc/ux500/mop500_ab8500.c

65

struct clk *clk_ptr_intclk;

sound/soc/ux500/mop500_ab8500.c

66

struct clk *clk_ptr_sysclk;

sound/soc/ux500/mop500_ab8500.c

67

struct clk *clk_ptr_ulpclk;

sound/soc/ux500/mop500_ab8500.c

86

struct clk *clk_ptr;

sound/soc/ux500/ux500_msp_dai.c

406

ret = clk_prepare_enable(drvdata->clk);

sound/soc/ux500/ux500_msp_dai.c

445

clk_disable_unprepare(drvdata->clk);

sound/soc/ux500/ux500_msp_dai.c

753

drvdata->clk = devm_clk_get(&pdev->dev, NULL);

sound/soc/ux500/ux500_msp_dai.c

754

if (IS_ERR(drvdata->clk)) {

sound/soc/ux500/ux500_msp_dai.c

755

ret = PTR_ERR(drvdata->clk);

sound/soc/ux500/ux500_msp_dai.h

57

struct clk *clk;

sound/soc/ux500/ux500_msp_dai.h

58

struct clk *pclk;

sound/soc/xilinx/xlnx_formatter_pcm.c

86

struct clk *axi_clk;

sound/soc/xilinx/xlnx_spdif.c

51

struct clk *axi_clk;

sound/soc/xtensa/xtfpga-i2s.c

296

err = clk_set_rate(i2s->clk, freq);

sound/soc/xtensa/xtfpga-i2s.c

513

clk_disable_unprepare(i2s->clk);

sound/soc/xtensa/xtfpga-i2s.c

522

ret = clk_prepare_enable(i2s->clk);

sound/soc/xtensa/xtfpga-i2s.c

558

i2s->clk = devm_clk_get(&pdev->dev, NULL);

sound/soc/xtensa/xtfpga-i2s.c

559

if (IS_ERR(i2s->clk)) {

sound/soc/xtensa/xtfpga-i2s.c

561

err = PTR_ERR(i2s->clk);

sound/soc/xtensa/xtfpga-i2s.c

59

struct clk *clk;

sound/spi/at73c213.c

1058

clk_disable(chip->ssc->clk);

sound/spi/at73c213.c

1073

retval = clk_enable(chip->ssc->clk);

sound/spi/at73c213.c

131

unsigned long ssc_rate = clk_get_rate(chip->ssc->clk);

sound/spi/at73c213.c

221

err = clk_enable(chip->ssc->clk);

sound/spi/at73c213.c

232

clk_disable(chip->ssc->clk);

sound/spi/at73c213.c

869

retval = clk_enable(chip->ssc->clk);

sound/spi/at73c213.c

911

clk_disable(chip->ssc->clk);

sound/spi/at73c213.c

990

retval = clk_enable(chip->ssc->clk);

sound/spi/at73c213.c

994

clk_disable(chip->ssc->clk);

tools/perf/bench/mem-functions.c

139

u64 clk;

tools/perf/bench/mem-functions.c

141

ret = read(cycles_fd, &clk, sizeof(u64));

tools/perf/bench/mem-functions.c

144

return clk;