/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved.
 * Copyright (c) 2023, Richard Acayan. All rights reserved.
 */

#ifndef _DPU_4_1_SDM670_H
#define _DPU_4_1_SDM670_H

static const struct dpu_mdp_cfg sdm670_mdp = {
        .name = "top_0",
        .base = 0x0, .len = 0x45c,
        .clk_ctrls = {
                [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
                [DPU_CLK_CTRL_VIG1] = { .reg_off = 0x2b4, .bit_off = 0 },
                [DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
                [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
                [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
        },
};

static const struct dpu_sspp_cfg sdm670_sspp[] = {
        {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1c8,
                .features = VIG_SDM845_MASK_SDMA,
                .sblk = &dpu_vig_sblk_qseed3_1_3,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
        }, {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x1c8,
                .features = VIG_SDM845_MASK_SDMA,
                .sblk = &dpu_vig_sblk_qseed3_1_3,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
                .clk_ctrl = DPU_CLK_CTRL_VIG0,
        }, {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1c8,
                .features = DMA_SDM845_MASK_SDMA,
                .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA0,
        }, {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1c8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
                .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA1,
        }, {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1c8,
                .features = DMA_CURSOR_SDM845_MASK_SDMA,
                .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
                .clk_ctrl = DPU_CLK_CTRL_DMA2,
        },
};

static const struct dpu_lm_cfg sdm670_lm[] = {
        {
                .name = "lm_0", .id = LM_0,
                .base = 0x44000, .len = 0x320,
                .features = MIXER_MSM8998_MASK,
                .sblk = &sdm845_lm_sblk,
                .lm_pair = LM_1,
                .pingpong = PINGPONG_0,
                .dspp = DSPP_0,
        }, {
                .name = "lm_1", .id = LM_1,
                .base = 0x45000, .len = 0x320,
                .features = MIXER_MSM8998_MASK,
                .sblk = &sdm845_lm_sblk,
                .lm_pair = LM_0,
                .pingpong = PINGPONG_1,
                .dspp = DSPP_1,
        }, {
                .name = "lm_2", .id = LM_2,
                .base = 0x46000, .len = 0x320,
                .features = MIXER_MSM8998_MASK,
                .sblk = &sdm845_lm_sblk,
                .lm_pair = LM_5,
                .pingpong = PINGPONG_2,
        }, {
                .name = "lm_5", .id = LM_5,
                .base = 0x49000, .len = 0x320,
                .features = MIXER_MSM8998_MASK,
                .sblk = &sdm845_lm_sblk,
                .lm_pair = LM_2,
                .pingpong = PINGPONG_3,
        },
};

static const struct dpu_dspp_cfg sdm670_dspp[] = {
        {
                .name = "dspp_0", .id = DSPP_0,
                .base = 0x54000, .len = 0x1800,
                .sblk = &sdm845_dspp_sblk,
        }, {
                .name = "dspp_1", .id = DSPP_1,
                .base = 0x56000, .len = 0x1800,
                .sblk = &sdm845_dspp_sblk,
        },
};

static const struct dpu_dsc_cfg sdm670_dsc[] = {
        {
                .name = "dsc_0", .id = DSC_0,
                .base = 0x80000, .len = 0x140,
        }, {
                .name = "dsc_1", .id = DSC_1,
                .base = 0x80400, .len = 0x140,
        },
};

static const struct dpu_mdss_version sdm670_mdss_ver = {
        .core_major_ver = 4,
        .core_minor_ver = 1,
};

const struct dpu_mdss_cfg dpu_sdm670_cfg = {
        .mdss_ver = &sdm670_mdss_ver,
        .caps = &sdm845_dpu_caps,
        .mdp = &sdm670_mdp,
        .cdm = &dpu_cdm_1_x_4_x,
        .ctl_count = ARRAY_SIZE(sdm845_ctl),
        .ctl = sdm845_ctl,
        .sspp_count = ARRAY_SIZE(sdm670_sspp),
        .sspp = sdm670_sspp,
        .mixer_count = ARRAY_SIZE(sdm670_lm),
        .mixer = sdm670_lm,
        .dspp_count = ARRAY_SIZE(sdm670_dspp),
        .dspp = sdm670_dspp,
        .pingpong_count = ARRAY_SIZE(sdm845_pp),
        .pingpong = sdm845_pp,
        .dsc_count = ARRAY_SIZE(sdm670_dsc),
        .dsc = sdm670_dsc,
        .intf_count = ARRAY_SIZE(sdm845_intf),
        .intf = sdm845_intf,
        .vbif = &sdm845_vbif,
        .perf = &sdm845_perf_data,
};

#endif