bin/chio/chio.c

192

int val;

bin/chio/chio.c

230

val = parse_special(*argv);

bin/chio/chio.c

231

switch (val) {

bin/chio/chio.c

254

int val;

bin/chio/chio.c

312

val = parse_special(*argv);

bin/chio/chio.c

314

switch (val) {

bin/chio/chio.c

340

int val;

bin/chio/chio.c

370

val = parse_special(*argv);

bin/chio/chio.c

371

switch (val) {

bin/chio/chio.c

784

int val;

bin/chio/chio.c

786

val = is_special(cp);

bin/chio/chio.c

787

if (val)

bin/chio/chio.c

788

return (val);

bin/csh/func.c

1016

Setenv(Char *name, Char *val)

bin/csh/func.c

1028

cp = Strspl(STRequal, val);

bin/csh/func.c

1037

blk[0] = strip(Strspl(cp, val));

bin/csh/set.c

481

set(Char *var, Char *val)

bin/csh/set.c

486

vec[0] = val;

bin/csh/set.c

692

exportpath(Char **val)

bin/csh/set.c

697

if (val)

bin/csh/set.c

698

while (*val) {

bin/csh/set.c

699

if (Strlen(*val) + Strlen(exppath) + 2 > BUFSIZE) {

bin/csh/set.c

704

(void)Strcat(exppath, *val++);

bin/csh/set.c

705

if (*val == 0 || eq(*val, STRRparen))

bin/date/date.c

146

val = strtoll(optarg, &buf, 0);

bin/date/date.c

155

tval = (time_t)val;

bin/date/date.c

223

badcanotime(const char *msg, const char *val, size_t where)

bin/date/date.c

226

warnx("%s", val);

bin/date/date.c

97

long long val;

bin/expr/expr.y

235

char *val;

bin/expr/expr.y

236

(void)asprintf(&val, "%lld", (long long int)res);

bin/expr/expr.y

237

if (val == NULL)

bin/expr/expr.y

239

return val;

bin/expr/expr.y

312

char *val;

bin/expr/expr.y

314

(void)asprintf(&val, "%.*s",

bin/expr/expr.y

318

(void)asprintf(&val, "%zu",

bin/expr/expr.y

321

if (val == NULL)

bin/expr/expr.y

323

return val;

bin/ksh/c_ksh.c

1027

afree((void*)ap->val.s, APERM);

bin/ksh/c_ksh.c

1038

afree((void*)ap->val.s, APERM);

bin/ksh/c_ksh.c

1053

long val;

bin/ksh/c_ksh.c

1059

if (!evaluate(*wp, &val, KSH_RETURN_ERROR)) {

bin/ksh/c_ksh.c

1063

rv = val == 0;

bin/ksh/c_ksh.c

1289

getopts_reset(val)

bin/ksh/c_ksh.c

1290

int val;

bin/ksh/c_ksh.c

1292

if (val >= 1) {

bin/ksh/c_ksh.c

1295

user_opt.optind = user_opt.uoptind = val;

bin/ksh/c_ksh.c

496

print_value_quoted(tp->val.s);

bin/ksh/c_ksh.c

531

shprintf("%s", tp->val.s);

bin/ksh/c_ksh.c

735

wp[i], f->val.t);

bin/ksh/c_ksh.c

755

vp->name, vp->val.t);

bin/ksh/c_ksh.c

932

print_value_quoted(ap->val.s);

bin/ksh/c_ksh.c

940

char *val = strchr(alias, '=');

bin/ksh/c_ksh.c

945

if (val)

bin/ksh/c_ksh.c

946

alias = str_nsave(alias, val++ - alias, ATEMP);

bin/ksh/c_ksh.c

948

if (val == NULL && !tflag && !xflag) {

bin/ksh/c_ksh.c

956

print_value_quoted(ap->val.s);

bin/ksh/c_ksh.c

968

if ((val && !tflag) || (!val && tflag && !Uflag)) {

bin/ksh/c_ksh.c

971

afree((void*)ap->val.s, APERM);

bin/ksh/c_ksh.c

975

: val;

bin/ksh/c_ksh.c

977

ap->val.s = str_save(newval, APERM);

bin/ksh/c_ksh.c

987

if (val)

bin/ksh/c_sh.c

36

long val;

bin/ksh/c_sh.c

44

evaluate(arg, &val, KSH_UNWIND_ERROR);

bin/ksh/c_sh.c

45

n = val;

bin/ksh/c_ulimit.c

129

rlim_t UNINITIALIZED(val);

bin/ksh/c_ulimit.c

180

val = KSH_RLIM_INFINITY;

bin/ksh/c_ulimit.c

197

val = (u_long)rval * l->factor;

bin/ksh/c_ulimit.c

210

val = limit.rlim_cur;

bin/ksh/c_ulimit.c

212

val = limit.rlim_max;

bin/ksh/c_ulimit.c

217

val = ulimit(l->gcmd, (rlim_t) 0);

bin/ksh/c_ulimit.c

224

if (val == RLIM_INFINITY)

bin/ksh/c_ulimit.c

229

val /= l->factor;

bin/ksh/c_ulimit.c

230

shprintf("%ld\n", (long) val);

bin/ksh/c_ulimit.c

243

limit.rlim_cur = val;

bin/ksh/c_ulimit.c

245

limit.rlim_max = val;

bin/ksh/c_ulimit.c

256

val = limit.rlim_cur;

bin/ksh/c_ulimit.c

258

val = limit.rlim_max;

bin/ksh/c_ulimit.c

268

} else if (ulimit(l->scmd, val) < 0) {

bin/ksh/c_ulimit.c

273

val = ulimit(l->gcmd, (rlim_t) 0);

bin/ksh/c_ulimit.c

280

if (val == RLIM_INFINITY)

bin/ksh/c_ulimit.c

285

val /= l->factor;

bin/ksh/c_ulimit.c

286

shprintf("%ld\n", (long) val);

bin/ksh/eval.c

1295

ap->val.s = str_nsave(pw->pw_dir, n + 1, APERM);

bin/ksh/eval.c

1296

ap->val.s[n] = '/';

bin/ksh/eval.c

1297

ap->val.s[n + 1] = '\0';

bin/ksh/eval.c

1299

ap->val.s = str_save(pw->pw_dir, APERM);

bin/ksh/eval.c

1303

return ap->val.s;

bin/ksh/exec.c

1003

if ((tp->flag&ISSET) && (all || !ISDIRSEP(tp->val.s[0]))) {

bin/ksh/exec.c

1006

afree(tp->val.s, APERM);

bin/ksh/exec.c

1102

rv = (*tp->val.f)(wp);

bin/ksh/exec.c

1238

else if (tp && tp->type == CSHELL && tp->val.f == c_exec) {

bin/ksh/exec.c

492

if (tp->val.f == c_builtin) {

bin/ksh/exec.c

501

} else if (tp->val.f == c_exec) {

bin/ksh/exec.c

506

} else if (tp->val.f == c_command) {

bin/ksh/exec.c

663

exstat = execute(tp->val.t, flags & XERROK);

bin/ksh/exec.c

676

tfree(tp->val.t, tp->areap);

bin/ksh/exec.c

722

tp->val.s, KSH_RETURN_ERROR);

bin/ksh/exec.c

736

texec.str = tp->val.s;

bin/ksh/exec.c

805

tp->val.t = (struct op *) 0;

bin/ksh/exec.c

842

tfree(tp->val.t, tp->areap);

bin/ksh/exec.c

850

tp->val.t = tcopy(t->left, tp->areap);

bin/ksh/exec.c

884

tp->val.f = func;

bin/ksh/exec.c

940

if (tp && (tp->flag & ISSET) && eaccess(tp->val.s, X_OK) != 0) {

bin/ksh/exec.c

943

afree(tp->val.s, APERM);

bin/ksh/exec.c

967

tp->val.s = npath;

bin/ksh/exec.c

969

tp->val.s = str_save(npath, APERM);

bin/ksh/expr.c

128

struct tbl *val; /* value from token() */

bin/ksh/expr.c

162

*rval = v.val.i;

bin/ksh/expr.c

205

es->val = tempvar();

bin/ksh/expr.c

237

s = es->val->name;

bin/ksh/expr.c

240

s = str_val(es->val);

bin/ksh/expr.c

300

vl->val.i = ~vl->val.i;

bin/ksh/expr.c

302

vl->val.i = !vl->val.i;

bin/ksh/expr.c

304

vl->val.i = -vl->val.i;

bin/ksh/expr.c

316

vl = do_ppmm(es, op, es->val, true);

bin/ksh/expr.c

319

vl = es->val;

bin/ksh/expr.c

345

|| op == O_MODASN) && vr->val.i == 0)

bin/ksh/expr.c

348

vr->val.i = 1;

bin/ksh/expr.c

355

res = vl->val.i * vr->val.i;

bin/ksh/expr.c

359

res = vl->val.i / vr->val.i;

bin/ksh/expr.c

363

res = vl->val.i % vr->val.i;

bin/ksh/expr.c

367

res = vl->val.i + vr->val.i;

bin/ksh/expr.c

371

res = vl->val.i - vr->val.i;

bin/ksh/expr.c

375

res = vl->val.i << vr->val.i;

bin/ksh/expr.c

379

res = vl->val.i >> vr->val.i;

bin/ksh/expr.c

382

res = vl->val.i < vr->val.i;

bin/ksh/expr.c

385

res = vl->val.i <= vr->val.i;

bin/ksh/expr.c

388

res = vl->val.i > vr->val.i;

bin/ksh/expr.c

391

res = vl->val.i >= vr->val.i;

bin/ksh/expr.c

394

res = vl->val.i == vr->val.i;

bin/ksh/expr.c

397

res = vl->val.i != vr->val.i;

bin/ksh/expr.c

401

res = vl->val.i & vr->val.i;

bin/ksh/expr.c

405

res = vl->val.i ^ vr->val.i;

bin/ksh/expr.c

409

res = vl->val.i | vr->val.i;

bin/ksh/expr.c

412

if (!vl->val.i)

bin/ksh/expr.c

415

res = vl->val.i && vr->val.i;

bin/ksh/expr.c

416

if (!vl->val.i)

bin/ksh/expr.c

420

if (vl->val.i)

bin/ksh/expr.c

423

res = vl->val.i || vr->val.i;

bin/ksh/expr.c

424

if (vl->val.i)

bin/ksh/expr.c

429

int ex = vl->val.i != 0;

bin/ksh/expr.c

447

res = vr->val.i;

bin/ksh/expr.c

450

res = vr->val.i;

bin/ksh/expr.c

454

vr->val.i = res;

bin/ksh/expr.c

461

vl->val.i = res;

bin/ksh/expr.c

502

es->val = tempvar();

bin/ksh/expr.c

503

es->val->flag |= EXPRLVALUE;

bin/ksh/expr.c

506

es->val = global(tvar);

bin/ksh/expr.c

514

es->val = tempvar();

bin/ksh/expr.c

515

es->val->flag &= ~INTEGER;

bin/ksh/expr.c

516

es->val->type = 0;

bin/ksh/expr.c

517

es->val->val.s = tvar;

bin/ksh/expr.c

518

if (setint_v(es->val, es->val) == NULL)

bin/ksh/expr.c

549

oval = op == O_PLUSPLUS ? vl->val.i++ : vl->val.i--;

bin/ksh/expr.c

553

setint(vasn, vl->val.i);

bin/ksh/expr.c

555

vl->val.i = oval;

bin/ksh/expr.c

581

vp->val.i = 0;

bin/ksh/lex.c

738

&& (!(cf & ESACONLY) || p->val.i == ESAC || p->val.i == '}'))

bin/ksh/lex.c

741

return p->val.i;

bin/ksh/lex.c

753

s->start = s->str = p->val.s;

bin/ksh/lex.c

929

} else if (*s->u.tblp->val.s

bin/ksh/lex.c

930

&& isspace((unsigned char)strchr(s->u.tblp->val.s, 0)[-1]))

bin/ksh/syn.c

648

short val;

bin/ksh/syn.c

701

p->val.i = tt->val;

bin/ksh/syn.c

742

if (tt->val == c)

bin/ksh/table.h

23

} val; /* value */

bin/ksh/var.c

1081

ksh_tmout = vp->val.i >= 0 ? vp->val.i : 0;

bin/ksh/var.c

1153

arraysearch(vp, val)

bin/ksh/var.c

1155

int val;

bin/ksh/var.c

1163

if (val == 0) {

bin/ksh/var.c

1169

while (curr && curr->index < val) {

bin/ksh/var.c

1173

if (curr && curr->index == val) {

bin/ksh/var.c

1186

new->index = val;

bin/ksh/var.c

182

int val;

bin/ksh/var.c

185

n = array_index_calc(n, &array, &val);

bin/ksh/var.c

211

vp->val.i = kshpid;

bin/ksh/var.c

215

if ((vp->val.i = j_async()) == 0)

bin/ksh/var.c

219

vp->val.i = exstat;

bin/ksh/var.c

222

vp->val.i = l->argc;

bin/ksh/var.c

226

vp->val.s = getoptions();

bin/ksh/var.c

237

return arraysearch(vp, val);

bin/ksh/var.c

246

vp = arraysearch(vp, val);

bin/ksh/var.c

263

int val;

bin/ksh/var.c

266

n = array_index_calc(n, &array, &val);

bin/ksh/var.c

292

vp = arraysearch(vp, val);

bin/ksh/var.c

30

static void export ARGS((struct tbl *vp, const char *val));

bin/ksh/var.c

311

s = vp->val.s + vp->type;

bin/ksh/var.c

324

n = (unsigned long) vp->val.i;

bin/ksh/var.c

326

n = (vp->val.i < 0) ? -vp->val.i : vp->val.i;

bin/ksh/var.c

340

if (!(vp->flag & INT_U) && vp->val.i < 0)

bin/ksh/var.c

386

if (s >= vq->val.s

bin/ksh/var.c

387

&& s <= vq->val.s + strlen(vq->val.s))

bin/ksh/var.c

391

afree((void*)vq->val.s, vq->areap);

bin/ksh/var.c

400

vq->val.s = str_save(s, vq->areap);

bin/ksh/var.c

425

vp->val.i = n;

bin/ksh/var.c

429

vq->val.i = n;

bin/ksh/var.c

449

if (!(vp->flag&ISSET) || (!(vp->flag&INTEGER) && vp->val.s == NULL))

bin/ksh/var.c

452

*nump = vp->val.i;

bin/ksh/var.c

455

s = vp->val.s + vp->type;

bin/ksh/var.c

512

afree(vq->val.s, vq->areap);

bin/ksh/var.c

514

vq->val.i = num;

bin/ksh/var.c

588

export(vp, val)

bin/ksh/var.c

590

const char *val;

bin/ksh/var.c

593

char *op = (vp->flag&ALLOC) ? vp->val.s : NULL;

bin/ksh/var.c

595

int vallen = strlen(val) + 1;

bin/ksh/var.c

599

memcpy(vp->val.s = xp, vp->name, namelen);

bin/ksh/var.c

602

vp->type = xp - vp->val.s; /* offset to value */

bin/ksh/var.c

603

memcpy(xp, val, vallen);

bin/ksh/var.c

622

const char *val;

bin/ksh/var.c

625

val = skip_varname(var, false);

bin/ksh/var.c

626

if (val == var)

bin/ksh/var.c

628

if (*val == '[') {

bin/ksh/var.c

631

len = array_ref_len(val);

bin/ksh/var.c

643

if (!digit(val[i]))

bin/ksh/var.c

646

val += len;

bin/ksh/var.c

648

if (*val == '=')

bin/ksh/var.c

649

tvar = str_nsave(var, val++ - var, ATEMP);

bin/ksh/var.c

655

val = NULL;

bin/ksh/var.c

675

&& (val || clr || (set & ~EXPORT)))

bin/ksh/var.c

678

if (val)

bin/ksh/var.c

692

fake_assign = (t->flag & ISSET) && (!val || t != vp)

bin/ksh/var.c

701

s = t->val.s + t->type;

bin/ksh/var.c

702

free_me = (t->flag & ALLOC) ? t->val.s

bin/ksh/var.c

715

if ((set & INTEGER) && base > 0 && (!val || t != vp))

bin/ksh/var.c

730

afree((void*) t->val.s,

bin/ksh/var.c

744

if (val != NULL) {

bin/ksh/var.c

747

setstr(vp, val, KSH_UNWIND_ERROR | 0x4);

bin/ksh/var.c

753

setstr(vp, val, KSH_RETURN_ERROR | 0x4);

bin/ksh/var.c

759

export(vpbase, (vpbase->flag&ISSET) ? vpbase->val.s : null);

bin/ksh/var.c

773

afree((void*)vp->val.s, vp->areap);

bin/ksh/var.c

782

afree((void *) tmp->val.s, tmp->areap);

bin/ksh/var.c

895

char *val;

bin/ksh/var.c

896

val = str_val(vp);

bin/ksh/var.c

899

setstr(vp, val, KSH_RETURN_ERROR);

bin/ksh/var.c

901

XPput(env, vp->val.s);

bin/ksh/vi.c

753

nlen = strlen(ap->val.s) + 1;

bin/ksh/vi.c

757

memcpy(nbuf, ap->val.s, nlen);

bin/pax/cpio.h

110

#define CHR_WR_0(val) ((char)(((val) >> 24) & 0xff))

bin/pax/cpio.h

111

#define CHR_WR_1(val) ((char)(((val) >> 16) & 0xff))

bin/pax/cpio.h

112

#define CHR_WR_2(val) ((char)(((val) >> 8) & 0xff))

bin/pax/cpio.h

113

#define CHR_WR_3(val) ((char)((val) & 0xff))

bin/pax/gen_subs.c

258

u32_asc(uintmax_t val, char *str, int len, int base)

bin/pax/gen_subs.c

264

p = val & TOP_HALF;

bin/pax/gen_subs.c

268

val &= BOTTOM_HALF;

bin/pax/gen_subs.c

282

if ((digit = (val & 0xf)) < 10)

bin/pax/gen_subs.c

286

if ((val = (val >> 4)) == (u_long)0)

bin/pax/gen_subs.c

291

*pt-- = '0' + (char)(val & 0x7);

bin/pax/gen_subs.c

292

if ((val = (val >> 3)) == 0)

bin/pax/gen_subs.c

302

if (val != 0)

bin/pax/gen_subs.c

383

umax_asc(uintmax_t val, char *str, int len, int base)

bin/pax/gen_subs.c

400

if ((digit = (val & 0xf)) < 10)

bin/pax/gen_subs.c

404

if ((val = (val >> 4)) == 0)

bin/pax/gen_subs.c

409

*pt-- = '0' + (char)(val & 0x7);

bin/pax/gen_subs.c

410

if ((val = (val >> 3)) == 0)

bin/pax/gen_subs.c

420

if (val != 0)

bin/pax/options.c

2021

str_offt(char *val)

bin/pax/options.c

2026

num = STRTOOFFT(val, &expr, 0);

bin/pax/options.c

2027

if ((num == OFFT_MAX) || (num <= 0) || (expr == val))

bin/pax/tables.c

1330

u_int val;

bin/pax/tables.c

1357

dest = (char *)&val;

bin/pax/tables.c

1360

key += val;

bin/pax/tables.c

1367

val = 0;

bin/pax/tables.c

1369

dest = (char *)&val;

bin/pax/tables.c

1372

key += val;

bin/pax/tar.c

222

u32_oct(uintmax_t val, char *str, int len, int term)

bin/pax/tar.c

227

p = val & TOP_HALF;

bin/pax/tar.c

231

val &= BOTTOM_HALF;

bin/pax/tar.c

259

*pt-- = '0' + (char)(val & 0x7);

bin/pax/tar.c

260

if ((val = val >> 3) == 0)

bin/pax/tar.c

266

if (val != 0)

bin/pax/tar.c

283

umax_oct(uintmax_t val, char *str, int len, int term)

bin/pax/tar.c

313

*pt-- = '0' + (char)(val & 0x7);

bin/pax/tar.c

314

if ((val = val >> 3) == 0)

bin/pax/tar.c

320

if (val != 0)

bin/ps/print.c

1235

int64_t val;

bin/ps/print.c

1238

val = 0; /* XXXGCC -Wuninitialized [hpcarm] */

bin/ps/print.c

1256

val = GET(char);

bin/ps/print.c

1264

val = GET(short);

bin/ps/print.c

1276

val = GET(int32_t);

bin/ps/print.c

1285

val = GET(int);

bin/ps/print.c

1294

val = GET(long);

bin/ps/print.c

1311

val = GET(int64_t);

bin/ps/print.c

1325

if (val < 0 && val < v->longestn) {

bin/ps/print.c

1326

v->longestn = val;

bin/ps/print.c

1327

fmtlen = iwidth(-val) + 1;

bin/ps/print.c

1330

} else if (val > 0 && val > v->longestp) {

bin/ps/print.c

1331

v->longestp = val;

bin/ps/print.c

1332

fmtlen = iwidth(val);

bin/ps/print.c

239

doubleprintorsetwidth(VAR *v, double val, int prec, enum mode mode)

bin/ps/print.c

244

if (val < 0.0 && val < v->longestnd) {

bin/ps/print.c

245

fmtlen = (int)log10(-val) + prec + 2;

bin/ps/print.c

246

v->longestnd = val;

bin/ps/print.c

249

} else if (val > 0.0 && val > v->longestpd) {

bin/ps/print.c

250

fmtlen = (int)log10(val) + prec + 1;

bin/ps/print.c

251

v->longestpd = val;

bin/ps/print.c

256

(void)printf("%*.*f", v->width, prec, val);

bin/ps/print.c

261

intprintorsetwidth(VAR *v, int val, enum mode mode)

bin/ps/print.c

266

if (val < 0 && val < v->longestn) {

bin/ps/print.c

267

v->longestn = val;

bin/ps/print.c

268

fmtlen = iwidth(-val) + 1;

bin/ps/print.c

271

} else if (val > 0 && val > v->longestp) {

bin/ps/print.c

272

v->longestp = val;

bin/ps/print.c

273

fmtlen = iwidth(val);

bin/ps/print.c

278

(void)printf("%*d", v->width, val);

bin/sh/alias.c

112

ckfree(ap->val);

bin/sh/alias.c

184

return ap->val;

bin/sh/alias.c

220

print_quoted(aliases[i]->val);

bin/sh/alias.c

282

print_quoted(ap->val);

bin/sh/alias.c

70

setalias(char *name, char *val)

bin/sh/alias.c

81

ap->val = savestr(val);

bin/sh/alias.h

42

char *val;

bin/sh/arith_token.c

100

a_t_val.val));

bin/sh/arith_token.c

89

a_t_val.val = strtoimax(buf, &end, 0);

bin/sh/arith_tokens.h

112

intmax_t val;

bin/sh/arithmetic.c

207

primary(int token, union a_token_val *val, int op, int noeval)

bin/sh/arithmetic.c

224

return val->val;

bin/sh/arithmetic.c

226

result = noeval ? val->val : arith_lookupvarint(val->name);

bin/sh/arithmetic.c

230

return val->val;

bin/sh/arithmetic.c

234

setvar(val->name, sresult, 0);

bin/sh/arithmetic.c

239

*val = a_t_val;

bin/sh/arithmetic.c

240

return primary(op, val, arith_token(), noeval);

bin/sh/arithmetic.c

242

*val = a_t_val;

bin/sh/arithmetic.c

243

return -primary(op, val, arith_token(), noeval);

bin/sh/arithmetic.c

245

*val = a_t_val;

bin/sh/arithmetic.c

246

return !primary(op, val, arith_token(), noeval);

bin/sh/arithmetic.c

248

*val = a_t_val;

bin/sh/arithmetic.c

249

return ~primary(op, val, arith_token(), noeval);

bin/sh/arithmetic.c

256

return val->val;

bin/sh/arithmetic.c

271

union a_token_val val;

bin/sh/arithmetic.c

281

val = a_t_val;

bin/sh/arithmetic.c

283

b = primary(token, &val, arith_token(), noeval);

bin/sh/arithmetic.c

303

binop(int token, union a_token_val *val, int op, int noeval)

bin/sh/arithmetic.c

305

intmax_t a = primary(token, val, op, noeval);

bin/sh/arithmetic.c

315

and(int token, union a_token_val *val, int op, int noeval)

bin/sh/arithmetic.c

317

intmax_t a = binop(token, val, op, noeval);

bin/sh/arithmetic.c

327

*val = a_t_val;

bin/sh/arithmetic.c

329

b = and(token, val, arith_token(), noeval | !a);

bin/sh/arithmetic.c

335

or(int token, union a_token_val *val, int op, int noeval)

bin/sh/arithmetic.c

337

intmax_t a = and(token, val, op, noeval);

bin/sh/arithmetic.c

347

*val = a_t_val;

bin/sh/arithmetic.c

349

b = or(token, val, arith_token(), noeval | !!a);

bin/sh/arithmetic.c

355

cond(int token, union a_token_val *val, int op, int noeval)

bin/sh/arithmetic.c

357

intmax_t a = or(token, val, op, noeval);

bin/sh/arithmetic.c

372

*val = a_t_val;

bin/sh/arithmetic.c

374

c = cond(token, val, arith_token(), noeval | !!a);

bin/sh/arithmetic.c

382

union a_token_val val = a_t_val;

bin/sh/arithmetic.c

389

return cond(var, &val, op, noeval);

bin/sh/arithmetic.c

392

return cond(var, &val, op, noeval);

bin/sh/arithmetic.c

394

VTRACE(DBG_ARITH, ("Arith: %s ASSIGN %d%s\n", val.name, op,

bin/sh/arithmetic.c

403

arith_lookupvarint(val.name), result);

bin/sh/arithmetic.c

405

setvar(val.name, sresult, 0);

bin/sh/error.h

122

#define longjmp(jmploc, val) siglongjmp((jmploc), (val))

bin/sh/exec.c

1159

if (strchr(ap->val, '\n')) {

bin/sh/exec.c

1165

out1fmt("%s\n", ap->val);

bin/sh/expand.c

1001

for (; (c = *val) != '\0'; val++) {

bin/sh/expand.c

1250

if (optlist[optorder[i]].val)

bin/sh/expand.c

2285

casematch(union node *pattern, char *val)

bin/sh/expand.c

2292

pattern->narg.text, val));

bin/sh/expand.c

2300

result = patmatch(p, val, 0);

bin/sh/expand.c

915

char *val;

bin/sh/expand.c

938

val = NULL;

bin/sh/expand.c

942

val = lookupvar(var);

bin/sh/expand.c

943

if (val == NULL || ((varflags & VSNUL) && val[0] == '\0')) {

bin/sh/expand.c

944

val = NULL;

bin/sh/expand.c

978

for (; *val; val++)

bin/sh/expand.c

989

for (; (c = *val) != '\0'; val++) {

bin/sh/input.c

461

if ((alen = strlen(sp->ap->val)) > 0 &&

bin/sh/input.c

462

(sp->ap->val[alen - 1] == ' ' ||

bin/sh/input.c

463

sp->ap->val[alen - 1] == '\t'))

bin/sh/miscbltin.c

656

rlim_t val = 0;

bin/sh/miscbltin.c

695

val = RLIM_INFINITY;

bin/sh/miscbltin.c

697

val = (rlim_t) 0;

bin/sh/miscbltin.c

700

if (val >= RLIM_INFINITY/10)

bin/sh/miscbltin.c

702

val = (val * 10);

bin/sh/miscbltin.c

703

if (val >= RLIM_INFINITY - (long)(c - '0'))

bin/sh/miscbltin.c

705

val += (long)(c - '0');

bin/sh/miscbltin.c

709

if (val > RLIM_INFINITY / l->factor)

bin/sh/miscbltin.c

711

val *= l->factor;

bin/sh/miscbltin.c

725

val = limit.rlim_cur;

bin/sh/miscbltin.c

728

val = limit.rlim_max;

bin/sh/miscbltin.c

732

if (val == RLIM_INFINITY)

bin/sh/miscbltin.c

735

val /= l->factor;

bin/sh/miscbltin.c

737

out1fmt("%9lld", (long long) val);

bin/sh/miscbltin.c

739

out1fmt("%9ld", (long) val);

bin/sh/miscbltin.c

752

limit.rlim_max = val;

bin/sh/miscbltin.c

754

limit.rlim_cur = val;

bin/sh/miscbltin.c

761

val = limit.rlim_cur;

bin/sh/miscbltin.c

763

val = limit.rlim_max;

bin/sh/miscbltin.c

765

if (val == RLIM_INFINITY)

bin/sh/miscbltin.c

769

val /= l->factor;

bin/sh/miscbltin.c

771

out1fmt("%lld\n", (long long) val);

bin/sh/miscbltin.c

773

out1fmt("%ld\n", (long) val);

bin/sh/options.c

104

optlist[i].val = 2;

bin/sh/options.c

138

if (optlist[i].val == 2)

bin/sh/options.c

139

optlist[i].val = optlist[i].dflt;

bin/sh/options.c

140

optlist[i].dflt = optlist[i].val;

bin/sh/options.c

196

int val;

bin/sh/options.c

204

val = 1;

bin/sh/options.c

217

val = 0;

bin/sh/options.c

223

if (val == 1 && c == 'c' && cmdline) {

bin/sh/options.c

228

minus_o(p, val + (cmdline ? val : 0));

bin/sh/options.c

231

val + (cmdline ? val : 0));

bin/sh/options.c

233

minus_o(NULL, val);

bin/sh/options.c

235

error("arg for %co missing", "+-"[val]);

bin/sh/options.c

240

set_debug(p, val);

bin/sh/options.c

243

set_debug(*argptr++, val);

bin/sh/options.c

245

set_debug("*$", val);

bin/sh/options.c

252

setoption(c, val);

bin/sh/options.c

259

set_opt_val(size_t i, int val)

bin/sh/options.c

264

if (val && (flag = optlist[i].opt_set)) {

bin/sh/options.c

268

optlist[j].val = 0;

bin/sh/options.c

272

xtracefdsetup(val);

bin/sh/options.c

274

optlist[i].val = val;

bin/sh/options.c

276

if (&optlist[i].val == &debug)

bin/sh/options.c

282

minus_o(char *name, int val)

bin/sh/options.c

288

if (val) {

bin/sh/options.c

293

"+-"[optlist[i].val],

bin/sh/options.c

302

optlist[i].val ? "on" : "off");

bin/sh/options.c

307

if (optlist[i].val == optlist[i].dflt)

bin/sh/options.c

311

"+-"[optlist[i].val], optlist[i].name);

bin/sh/options.c

313

out1fmt(" %c%c", "+-"[optlist[i].val],

bin/sh/options.c

319

if (val == 1 && equal(name, "default")) { /* special case */

bin/sh/options.c

324

if (val)

bin/sh/options.c

325

val = 1;

bin/sh/options.c

328

set_opt_val(i, val);

bin/sh/options.c

331

set_opt_val(_SH_OPT_xflag, val);

bin/sh/options.c

335

error("Unknown option %co %s", "+-"[val], name);

bin/sh/options.c

341

setoption(int flag, int val)

bin/sh/options.c

347

set_opt_val(i, val);

bin/sh/options.c

350

set_opt_val(_SH_OPT_xflag, val);

bin/sh/options.c

354

error("Unknown option %c%c", "+-"[val], flag);

bin/sh/options.c

367

optlist[i].val = 0;

bin/sh/options.h

54

unsigned char val; /* value of <letter>flag */

bin/sh/parser.c

1056

wordtext, ap->val));

bin/sh/parser.c

1057

pushstring(ap->val, strlen(ap->val), ap);

bin/sh/syntax.c

16

#define set(ch, val) [ndx(ch)] = val,

bin/sh/syntax.c

17

#define set_range(s, e, val) [ndx(s) ... ndx(e)] = val,

bin/sh/var.c

1846

set_locale_var(const char *val, int flags, struct var *vp)

bin/sh/var.c

1914

val = vp->text + vp->name_len + 1;

bin/sh/var.c

1916

val = "C";

bin/sh/var.c

1918

set_locale_var(val, 0, lv->vp);

bin/sh/var.c

1940

if (old != NULL && strcmp(old, val) != 0) {

bin/sh/var.c

1945

if (setlocale(lv->category, val) == NULL) {

bin/sh/var.c

1949

" setlocale(3)\n", lv->name, val);

bin/sh/var.c

430

setvarsafe(const char *name, const char *val, int flags)

bin/sh/var.c

440

setvar(name, val, flags);

bin/sh/var.c

473

setvar(const char *name, const char *val, int flags)

bin/sh/var.c

487

if (val == NULL) {

bin/sh/var.c

490

len += strlen(val);

bin/sh/var.c

498

if (val)

bin/sh/var.c

499

scopy(val, d);

bin/sleep/sleep.c

135

val = strtod(arg, &temp);

bin/sleep/sleep.c

137

val = strtod_l(arg, &temp, LC_C_LOCALE);

bin/sleep/sleep.c

138

if (val < 0 || temp == arg || *temp != '\0')

bin/sleep/sleep.c

141

ival = floor(val);

bin/sleep/sleep.c

142

fval = (1000000000 * (val-ival));

bin/sleep/sleep.c

76

double fval, ival, val;

bin/stty/cchar.c

101

long val;

bin/stty/cchar.c

125

val = strtol(arg, &ep, 10);

bin/stty/cchar.c

126

if (val == _POSIX_VDISABLE) {

bin/stty/cchar.c

128

val, name);

bin/stty/cchar.c

131

if (val > UCHAR_MAX) {

bin/stty/cchar.c

140

ip->t.c_cc[cp->sub] = (cc_t)val;

common/dist/zlib/crc32.c

511

uLong val;

common/dist/zlib/crc32.c

531

val = *buf++;

common/dist/zlib/crc32.c

532

__asm__ volatile("crc32b %w0, %w0, %w1" : "+r"(crc) : "r"(val));

common/dist/zlib/crc32.c

577

val = x2nmodp((int)last, 6);

common/dist/zlib/crc32.c

578

crc = multmodp(val, crc) ^ crc1;

common/dist/zlib/crc32.c

579

crc = multmodp(val, crc) ^ crc2;

common/dist/zlib/crc32.c

593

val = *buf++;

common/dist/zlib/crc32.c

594

__asm__ volatile("crc32b %w0, %w0, %w1" : "+r"(crc) : "r"(val));

common/dist/zlib/deflate.c

1149

int val;

common/dist/zlib/deflate.c

1160

val = s->gzhead->name[s->gzindex++];

common/dist/zlib/deflate.c

1161

put_byte(s, val);

common/dist/zlib/deflate.c

1162

} while (val != 0);

common/dist/zlib/deflate.c

1171

int val;

common/dist/zlib/deflate.c

1182

val = s->gzhead->comment[s->gzindex++];

common/dist/zlib/deflate.c

1183

put_byte(s, val);

common/dist/zlib/deflate.c

1184

} while (val != 0);

common/dist/zlib/examples/gzappend.c

225

unsigned long val;

common/dist/zlib/examples/gzappend.c

227

val = read1(in);

common/dist/zlib/examples/gzappend.c

228

val += (unsigned)read1(in) << 8;

common/dist/zlib/examples/gzappend.c

229

val += (unsigned long)read1(in) << 16;

common/dist/zlib/examples/gzappend.c

230

val += (unsigned long)read1(in) << 24;

common/dist/zlib/examples/gzappend.c

231

return val;

common/dist/zlib/examples/gzjoin.c

147

unsigned long val;

common/dist/zlib/examples/gzjoin.c

149

val = bget(in);

common/dist/zlib/examples/gzjoin.c

150

val += (unsigned long)(bget(in)) << 8;

common/dist/zlib/examples/gzjoin.c

151

val += (unsigned long)(bget(in)) << 16;

common/dist/zlib/examples/gzjoin.c

152

val += (unsigned long)(bget(in)) << 24;

common/dist/zlib/examples/gzjoin.c

153

return val;

common/dist/zlib/examples/gzjoin.c

245

local void put4(unsigned long val, FILE *out)

common/dist/zlib/examples/gzjoin.c

247

putc(val & 0xff, out);

common/dist/zlib/examples/gzjoin.c

248

putc((val >> 8) & 0xff, out);

common/dist/zlib/examples/gzjoin.c

249

putc((val >> 16) & 0xff, out);

common/dist/zlib/examples/gzjoin.c

250

putc((val >> 24) & 0xff, out);

common/dist/zlib/infback.c

344

if (here.val < 16) {

common/dist/zlib/infback.c

346

state->lens[state->have++] = here.val;

common/dist/zlib/infback.c

349

if (here.val == 16) {

common/dist/zlib/infback.c

362

else if (here.val == 17) {

common/dist/zlib/infback.c

444

here = state->lencode[last.val +

common/dist/zlib/infback.c

452

state->length = (unsigned)here.val;

common/dist/zlib/infback.c

456

Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?

common/dist/zlib/infback.c

458

"inflate: literal 0x%02x\n", here.val));

common/dist/zlib/infback.c

498

here = state->distcode[last.val +

common/dist/zlib/infback.c

511

state->offset = (unsigned)here.val;

common/dist/zlib/inffast.c

116

Tracevv((stderr, here->val >= 0x20 && here->val < 0x7f ?

common/dist/zlib/inffast.c

118

"inflate: literal 0x%02x\n", here->val));

common/dist/zlib/inffast.c

119

*out++ = (unsigned char)(here->val);

common/dist/zlib/inffast.c

122

len = (unsigned)(here->val);

common/dist/zlib/inffast.c

147

dist = (unsigned)(here->val);

common/dist/zlib/inffast.c

267

here = dcode + here->val + (hold & ((1U << op) - 1));

common/dist/zlib/inffast.c

277

here = lcode + here->val + (hold & ((1U << op) - 1));

common/dist/zlib/inflate.c

1008

state->offset = (unsigned)here.val;

common/dist/zlib/inflate.c

840

if (here.val < 16) {

common/dist/zlib/inflate.c

842

state->lens[state->have++] = here.val;

common/dist/zlib/inflate.c

845

if (here.val == 16) {

common/dist/zlib/inflate.c

858

else if (here.val == 17) {

common/dist/zlib/inflate.c

941

here = state->lencode[last.val +

common/dist/zlib/inflate.c

951

state->length = (unsigned)here.val;

common/dist/zlib/inflate.c

953

Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?

common/dist/zlib/inflate.c

955

"inflate: literal 0x%02x\n", here.val));

common/dist/zlib/inflate.c

993

here = state->distcode[last.val +

common/dist/zlib/inftrees.c

131

here.val = (unsigned short)0;

common/dist/zlib/inftrees.c

228

here.val = work[sym];

common/dist/zlib/inftrees.c

232

here.val = base[work[sym] - match];

common/dist/zlib/inftrees.c

236

here.val = 0;

common/dist/zlib/inftrees.c

295

(*table)[low].val = (unsigned short)(next - *table);

common/dist/zlib/inftrees.c

305

here.val = (unsigned short)0;

common/dist/zlib/inftrees.c

408

state.lencode[low].bits, state.lencode[low].val);

common/dist/zlib/inftrees.c

419

state.distcode[low].val);

common/dist/zlib/inftrees.h

27

unsigned short val; /* offset in table or code value */

common/dist/zlib/test/infcover.c

248

unsigned next, val;

common/dist/zlib/test/infcover.c

254

val = 1;

common/dist/zlib/test/infcover.c

257

val = (val << 4) + *hex - '0';

common/dist/zlib/test/infcover.c

259

val = (val << 4) + *hex - 'A' + 10;

common/dist/zlib/test/infcover.c

261

val = (val << 4) + *hex - 'a' + 10;

common/dist/zlib/test/infcover.c

262

else if (val != 1 && val < 32) /* one digit followed by delimiter */

common/dist/zlib/test/infcover.c

263

val += 240; /* make it look like two digits */

common/dist/zlib/test/infcover.c

264

if (val > 255) { /* have two digits */

common/dist/zlib/test/infcover.c

265

in[next++] = val & 0xff; /* save the decoded byte */

common/dist/zlib/test/infcover.c

266

val = 1; /* start over */

common/dist/zlib/trees.c

279

int val = (int)value;\

common/dist/zlib/trees.c

280

s->bi_buf |= (ush)val << s->bi_valid;\

common/dist/zlib/trees.c

282

s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\

common/include/x86emu/x86emu.h

158

void (*emu_wrb)(struct X86EMU *, uint32_t addr,uint8_t val);

common/include/x86emu/x86emu.h

159

void (*emu_wrw)(struct X86EMU *, uint32_t addr, uint16_t val);

common/include/x86emu/x86emu.h

160

void (*emu_wrl)(struct X86EMU *, uint32_t addr, uint32_t val);

common/include/x86emu/x86emu.h

165

void (*emu_outb)(struct X86EMU *, uint16_t addr, uint8_t val);

common/include/x86emu/x86emu.h

166

void (*emu_outw)(struct X86EMU *, uint16_t addr, uint16_t val);

common/include/x86emu/x86emu.h

167

void (*emu_outl)(struct X86EMU *, uint16_t addr, uint32_t val);

common/lib/libc/atomic/atomic_add_16_cas.c

42

fetch_and_add_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_add_16_cas.c

48

new = old + val;

common/lib/libc/atomic/atomic_add_16_cas.c

54

add_and_fetch_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_add_16_cas.c

60

new = old + val;

common/lib/libc/atomic/atomic_add_32_cas.c

44

fetch_and_add_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_add_32_cas.c

50

new = old + val;

common/lib/libc/atomic/atomic_add_32_cas.c

56

atomic_add_32(volatile uint32_t *addr, int32_t val)

common/lib/libc/atomic/atomic_add_32_cas.c

58

(void) fetch_and_add_4(addr, val);

common/lib/libc/atomic/atomic_add_32_nv_cas.c

37

atomic_add_32_nv(volatile uint32_t *addr, int32_t val)

common/lib/libc/atomic/atomic_add_32_nv_cas.c

43

new = old + val;

common/lib/libc/atomic/atomic_add_64_cas.c

42

fetch_and_add_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_add_64_cas.c

48

new = old + val;

common/lib/libc/atomic/atomic_add_64_cas.c

54

atomic_add_64(volatile uint64_t *addr, int64_t val)

common/lib/libc/atomic/atomic_add_64_cas.c

56

(void) fetch_and_add_8(addr, val);

common/lib/libc/atomic/atomic_add_64_nv_cas.c

39

atomic_add_64_nv(volatile uint64_t *addr, int64_t val)

common/lib/libc/atomic/atomic_add_64_nv_cas.c

45

new = old + val;

common/lib/libc/atomic/atomic_add_8_cas.c

42

fetch_and_add_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_add_8_cas.c

48

new = old + val;

common/lib/libc/atomic/atomic_add_8_cas.c

54

add_and_fetch_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_add_8_cas.c

60

new = old + val;

common/lib/libc/atomic/atomic_and_16_cas.c

40

fetch_and_and_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_and_16_cas.c

46

new = old & val;

common/lib/libc/atomic/atomic_and_16_nv_cas.c

36

uint16_t atomic_and_16_nv(volatile uint16_t *addr, uint16_t val);

common/lib/libc/atomic/atomic_and_16_nv_cas.c

39

atomic_and_16_nv(volatile uint16_t *addr, uint16_t val)

common/lib/libc/atomic/atomic_and_16_nv_cas.c

45

new = old & val;

common/lib/libc/atomic/atomic_and_32_cas.c

44

fetch_and_and_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_and_32_cas.c

50

new = old & val;

common/lib/libc/atomic/atomic_and_32_cas.c

56

atomic_and_32(volatile uint32_t *addr, uint32_t val)

common/lib/libc/atomic/atomic_and_32_cas.c

58

(void) fetch_and_and_4(addr, val);

common/lib/libc/atomic/atomic_and_32_nv_cas.c

37

atomic_and_32_nv(volatile uint32_t *addr, uint32_t val)

common/lib/libc/atomic/atomic_and_32_nv_cas.c

43

new = old & val;

common/lib/libc/atomic/atomic_and_64_cas.c

42

fetch_and_and_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_and_64_cas.c

48

new = old & val;

common/lib/libc/atomic/atomic_and_64_cas.c

54

atomic_and_64(volatile uint64_t *addr, uint64_t val)

common/lib/libc/atomic/atomic_and_64_cas.c

56

(void) fetch_and_and_8(addr, val);

common/lib/libc/atomic/atomic_and_64_nv_cas.c

39

atomic_and_64_nv(volatile uint64_t *addr, uint64_t val)

common/lib/libc/atomic/atomic_and_64_nv_cas.c

45

new = old & val;

common/lib/libc/atomic/atomic_and_8_cas.c

40

fetch_and_and_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_and_8_cas.c

46

new = old & val;

common/lib/libc/atomic/atomic_and_8_nv_cas.c

36

uint8_t atomic_and_8_nv(volatile uint8_t *addr, uint8_t val);

common/lib/libc/atomic/atomic_and_8_nv_cas.c

39

atomic_and_8_nv(volatile uint8_t *addr, uint8_t val)

common/lib/libc/atomic/atomic_and_8_nv_cas.c

45

new = old & val;

common/lib/libc/atomic/atomic_load.c

43

uint## b ##_t val; \

common/lib/libc/atomic/atomic_load.c

44

val = *(const volatile uint ## b ## _t *)ptr; \

common/lib/libc/atomic/atomic_load.c

46

return val; \

common/lib/libc/atomic/atomic_nand_16_cas.c

42

fetch_and_nand_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_nand_16_cas.c

48

new = ~(old & val);

common/lib/libc/atomic/atomic_nand_16_cas.c

54

nand_and_fetch_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_nand_16_cas.c

60

new = ~(old & val);

common/lib/libc/atomic/atomic_nand_32_cas.c

42

fetch_and_nand_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_nand_32_cas.c

48

new = ~(old & val);

common/lib/libc/atomic/atomic_nand_32_cas.c

54

nand_and_fetch_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_nand_32_cas.c

60

new = ~(old & val);

common/lib/libc/atomic/atomic_nand_64_cas.c

44

fetch_and_nand_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_nand_64_cas.c

50

new = ~(old & val);

common/lib/libc/atomic/atomic_nand_64_cas.c

56

nand_and_fetch_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_nand_64_cas.c

62

new = ~(old & val);

common/lib/libc/atomic/atomic_nand_8_cas.c

42

fetch_and_nand_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_nand_8_cas.c

48

new = ~(old & val);

common/lib/libc/atomic/atomic_nand_8_cas.c

54

nand_and_fetch_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_nand_8_cas.c

60

new = ~(old & val);

common/lib/libc/atomic/atomic_or_16_cas.c

42

fetch_and_or_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_or_16_cas.c

48

new = old | val;

common/lib/libc/atomic/atomic_or_16_cas.c

54

or_and_fetch_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_or_16_cas.c

60

new = old | val;

common/lib/libc/atomic/atomic_or_32_cas.c

44

fetch_and_or_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_or_32_cas.c

50

new = old | val;

common/lib/libc/atomic/atomic_or_32_cas.c

56

atomic_or_32(volatile uint32_t *addr, uint32_t val)

common/lib/libc/atomic/atomic_or_32_cas.c

58

(void) fetch_and_or_4(addr, val);

common/lib/libc/atomic/atomic_or_32_nv_cas.c

37

atomic_or_32_nv(volatile uint32_t *addr, uint32_t val)

common/lib/libc/atomic/atomic_or_32_nv_cas.c

43

new = old | val;

common/lib/libc/atomic/atomic_or_64_cas.c

38

uint64_t fetch_and_or_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_or_64_cas.c

42

fetch_and_or_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_or_64_cas.c

48

new = old | val;

common/lib/libc/atomic/atomic_or_64_cas.c

54

atomic_or_64(volatile uint64_t *addr, uint64_t val)

common/lib/libc/atomic/atomic_or_64_cas.c

56

(void) fetch_and_or_8(addr, val);

common/lib/libc/atomic/atomic_or_64_nv_cas.c

39

atomic_or_64_nv(volatile uint64_t *addr, uint64_t val)

common/lib/libc/atomic/atomic_or_64_nv_cas.c

45

new = old | val;

common/lib/libc/atomic/atomic_or_8_cas.c

42

fetch_and_or_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_or_8_cas.c

48

new = old | val;

common/lib/libc/atomic/atomic_or_8_cas.c

54

or_and_fetch_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_or_8_cas.c

60

new = old | val;

common/lib/libc/atomic/atomic_store.c

41

__atomic_store_ ## n(volatile void *ptr, uint ## b ## _t val, \

common/lib/libc/atomic/atomic_store.c

45

*(volatile uint ## b ## _t *)ptr = val; \

common/lib/libc/atomic/atomic_sub_16_cas.c

42

fetch_and_sub_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_sub_16_cas.c

48

new = old - val;

common/lib/libc/atomic/atomic_sub_16_cas.c

54

sub_and_fetch_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_sub_16_cas.c

60

new = old - val;

common/lib/libc/atomic/atomic_sub_32_cas.c

42

fetch_and_sub_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_sub_32_cas.c

48

new = old - val;

common/lib/libc/atomic/atomic_sub_32_cas.c

54

sub_and_fetch_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_sub_32_cas.c

60

new = old - val;

common/lib/libc/atomic/atomic_sub_64_cas.c

44

fetch_and_sub_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_sub_64_cas.c

50

new = old - val;

common/lib/libc/atomic/atomic_sub_64_cas.c

56

sub_and_fetch_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_sub_64_cas.c

62

new = old - val;

common/lib/libc/atomic/atomic_sub_8_cas.c

42

fetch_and_sub_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_sub_8_cas.c

48

new = old - val;

common/lib/libc/atomic/atomic_sub_8_cas.c

54

sub_and_fetch_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_sub_8_cas.c

60

new = old - val;

common/lib/libc/atomic/atomic_xor_16_cas.c

42

fetch_and_xor_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_xor_16_cas.c

48

new = old ^ val;

common/lib/libc/atomic/atomic_xor_16_cas.c

54

xor_and_fetch_2(volatile uint16_t *addr, uint16_t val, ...)

common/lib/libc/atomic/atomic_xor_16_cas.c

60

new = old ^ val;

common/lib/libc/atomic/atomic_xor_32_cas.c

42

fetch_and_xor_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_xor_32_cas.c

48

new = old ^ val;

common/lib/libc/atomic/atomic_xor_32_cas.c

54

xor_and_fetch_4(volatile uint32_t *addr, uint32_t val, ...)

common/lib/libc/atomic/atomic_xor_32_cas.c

60

new = old ^ val;

common/lib/libc/atomic/atomic_xor_64_cas.c

44

fetch_and_xor_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_xor_64_cas.c

50

new = old ^ val;

common/lib/libc/atomic/atomic_xor_64_cas.c

56

xor_and_fetch_8(volatile uint64_t *addr, uint64_t val, ...)

common/lib/libc/atomic/atomic_xor_64_cas.c

62

new = old ^ val;

common/lib/libc/atomic/atomic_xor_8_cas.c

42

fetch_and_xor_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_xor_8_cas.c

48

new = old ^ val;

common/lib/libc/atomic/atomic_xor_8_cas.c

54

xor_and_fetch_1(volatile uint8_t *addr, uint8_t val, ...)

common/lib/libc/atomic/atomic_xor_8_cas.c

60

new = old ^ val;

common/lib/libc/cdb/cdbr.c

57

#define SET_ERRNO(val)

common/lib/libc/cdb/cdbr.c

71

#define SET_ERRNO(val) errno = (val)

common/lib/libc/gen/rpst.c

400

rpst_node_on_edge_p(const struct rpst_node *n, uint64_t val, uint64_t mask)

common/lib/libc/gen/rpst.c

403

return ((n->n_x ^ val) & ((-mask) << 1)) == 0;

common/lib/libc/inet/inet_addr.c

111

struct in_addr val;

common/lib/libc/inet/inet_addr.c

113

if (inet_aton(cp, &val))

common/lib/libc/inet/inet_addr.c

114

return (val.s_addr);

common/lib/libc/inet/inet_addr.c

127

uint32_t val;

common/lib/libc/inet/inet_addr.c

144

val = 0; base = 10; digit = 0;

common/lib/libc/inet/inet_addr.c

158

val = (val * base) + (c - '0');

common/lib/libc/inet/inet_addr.c

163

val = (val << 4) |

common/lib/libc/inet/inet_addr.c

177

if (pp >= parts + 3 || val > 0xffU)

common/lib/libc/inet/inet_addr.c

179

*pp++ = val;

common/lib/libc/inet/inet_addr.c

204

if (val > 0xffffffU)

common/lib/libc/inet/inet_addr.c

206

val |= (uint32_t)parts[0] << 24;

common/lib/libc/inet/inet_addr.c

210

if (val > 0xffffU)

common/lib/libc/inet/inet_addr.c

212

val |= ((uint32_t)parts[0] << 24) | (parts[1] << 16);

common/lib/libc/inet/inet_addr.c

216

if (val > 0xffU)

common/lib/libc/inet/inet_addr.c

218

val |= ((uint32_t)parts[0] << 24) | (parts[1] << 16) |

common/lib/libc/inet/inet_addr.c

223

addr->s_addr = htonl(val);

common/lib/libprop/prop_array_util.c

107

intmax_t val)

common/lib/libprop/prop_array_util.c

110

prop_number_create_signed(val));

common/lib/libprop/prop_array_util.c

114

prop_array_add_signed_number(prop_array_t array, intmax_t val)

common/lib/libprop/prop_array_util.c

116

return prop_array_add_and_rel(array, prop_number_create_signed(val));

common/lib/libprop/prop_array_util.c

121

uintmax_t val)

common/lib/libprop/prop_array_util.c

124

prop_number_create_unsigned(val));

common/lib/libprop/prop_array_util.c

128

prop_array_add_unsigned_number(prop_array_t array, uintmax_t val)

common/lib/libprop/prop_array_util.c

130

return prop_array_add_and_rel(array, prop_number_create_unsigned(val));

common/lib/libprop/prop_array_util.c

137

typ val) \

common/lib/libprop/prop_array_util.c

140

return prop_array_set_ ## which ## _number(array, indx, val); \

common/lib/libprop/prop_array_util.c

145

typ val) \

common/lib/libprop/prop_array_util.c

148

return prop_array_add_ ## which ## _number(array, val); \

common/lib/libprop/prop_array_util.c

59

prop_array_set_bool(prop_array_t array, unsigned int indx, bool val)

common/lib/libprop/prop_array_util.c

62

return prop_array_set_and_rel(array, indx, prop_bool_create(val));

common/lib/libprop/prop_array_util.c

66

prop_array_add_bool(prop_array_t array, bool val)

common/lib/libprop/prop_array_util.c

69

return prop_array_add_and_rel(array, prop_bool_create(val));

common/lib/libprop/prop_bool.c

141

_prop_bool_alloc(bool val)

common/lib/libprop/prop_bool.c

146

pb = val ? &_prop_bool_true : &_prop_bool_false;

common/lib/libprop/prop_bool.c

158

prop_bool_create(bool val)

common/lib/libprop/prop_bool.c

161

return (_prop_bool_alloc(val));

common/lib/libprop/prop_bool.c

231

bool val;

common/lib/libprop/prop_bool.c

244

val = true;

common/lib/libprop/prop_bool.c

247

val = false;

common/lib/libprop/prop_bool.c

249

*obj = prop_bool_create(val);

common/lib/libprop/prop_dictionary_util.c

114

intmax_t val)

common/lib/libprop/prop_dictionary_util.c

117

prop_number_create_signed(val));

common/lib/libprop/prop_dictionary_util.c

122

uintmax_t val)

common/lib/libprop/prop_dictionary_util.c

126

prop_number_create_unsigned(val));

common/lib/libprop/prop_dictionary_util.c

133

typ val) \

common/lib/libprop/prop_dictionary_util.c

136

return prop_dictionary_set_ ## which ## _number(dict, key, val);\

common/lib/libprop/prop_dictionary_util.c

73

prop_dictionary_set_bool(prop_dictionary_t dict, const char *key, bool val)

common/lib/libprop/prop_dictionary_util.c

76

return prop_dictionary_set_and_rel(dict, key, prop_bool_create(val));

common/lib/libprop/prop_extern.c

102

struct _prop_object_externalize_context *ctx, uint16_t val)

common/lib/libprop/prop_extern.c

106

snprintf(tmpstr, sizeof(tmpstr), "\\u%04X", val);

common/lib/libprop/prop_intern.c

343

uint16_t val;

common/lib/libprop/prop_intern.c

350

for (val = 0, i = 2; i < 6; i++) {

common/lib/libprop/prop_intern.c

351

val <<= 4;

common/lib/libprop/prop_intern.c

354

val |= 10 + (c - 'A');

common/lib/libprop/prop_intern.c

356

val |= 10 + (c - 'a');

common/lib/libprop/prop_intern.c

358

val |= c - '0';

common/lib/libprop/prop_intern.c

364

*valp = val;

common/lib/libprop/prop_number.c

344

prop_number_create_signed(intmax_t val)

common/lib/libprop/prop_number.c

349

pnv.pnv_signed = val;

common/lib/libprop/prop_number.c

359

prop_number_create_integer(int64_t val)

common/lib/libprop/prop_number.c

361

return prop_number_create_signed(val);

common/lib/libprop/prop_number.c

370

prop_number_create_unsigned(uintmax_t val)

common/lib/libprop/prop_number.c

375

pnv.pnv_unsigned = val;

common/lib/libprop/prop_number.c

385

prop_number_create_unsigned_integer(uint64_t val)

common/lib/libprop/prop_number.c

387

return prop_number_create_unsigned(val);

common/lib/libprop/prop_number.c

578

prop_number_equals_signed(prop_number_t pn, intmax_t val)

common/lib/libprop/prop_number.c

585

(pn->pn_value.pnv_unsigned > INTMAX_MAX || val < 0))

common/lib/libprop/prop_number.c

588

return (pn->pn_value.pnv_signed == val);

common/lib/libprop/prop_number.c

595

prop_number_equals_integer(prop_number_t pn, int64_t val)

common/lib/libprop/prop_number.c

597

return prop_number_equals_signed(pn, val);

common/lib/libprop/prop_number.c

606

prop_number_equals_unsigned(prop_number_t pn, uintmax_t val)

common/lib/libprop/prop_number.c

613

(pn->pn_value.pnv_signed < 0 || val > INT64_MAX))

common/lib/libprop/prop_number.c

616

return (pn->pn_value.pnv_unsigned == val);

common/lib/libprop/prop_number.c

623

prop_number_equals_unsigned_integer(prop_number_t pn, uint64_t val)

common/lib/libprop/prop_number.c

625

return prop_number_equals_unsigned(pn, val);

common/lib/libutil/snprintb.c

125

store_num(s, s->num_fmt, s->val);

common/lib/libutil/snprintb.c

140

if (s->val & (1U << (bit - 1))) {

common/lib/libutil/snprintb.c

172

if (((s->val >> b_bit) & 1) == 0)

common/lib/libutil/snprintb.c

192

field = s->val >> f_lsb;

common/lib/libutil/snprintb.c

272

snprintb_m(char *buf, size_t bufsize, const char *bitfmt, uint64_t val,

common/lib/libutil/snprintb.c

283

.val = val,

common/lib/libutil/snprintb.c

302

store_num(&s, s.num_fmt, val);

common/lib/libutil/snprintb.c

318

snprintb(char *buf, size_t bufsize, const char *bitfmt, uint64_t val)

common/lib/libutil/snprintb.c

320

return snprintb_m(buf, bufsize, bitfmt, val, 0);

common/lib/libutil/snprintb.c

61

uint64_t const val;

common/lib/libx86emu/x86emu.c

1049

write_back_byte(struct X86EMU *emu, uint8_t val)

common/lib/libx86emu/x86emu.c

1052

store_data_byte(emu, emu->cur_offset, val);

common/lib/libx86emu/x86emu.c

1054

*decode_rl_byte_register(emu) = val;

common/lib/libx86emu/x86emu.c

1058

write_back_word(struct X86EMU *emu, uint16_t val)

common/lib/libx86emu/x86emu.c

1061

store_data_word(emu, emu->cur_offset, val);

common/lib/libx86emu/x86emu.c

1063

*decode_rl_word_register(emu) = val;

common/lib/libx86emu/x86emu.c

1067

write_back_long(struct X86EMU *emu, uint32_t val)

common/lib/libx86emu/x86emu.c

1070

store_data_long(emu, emu->cur_offset, val);

common/lib/libx86emu/x86emu.c

1072

*decode_rl_long_register(emu) = val;

common/lib/libx86emu/x86emu.c

2492

uint8_t val;

common/lib/libx86emu/x86emu.c

2509

val = fetch_data_byte(emu, emu->x86.R_SI);

common/lib/libx86emu/x86emu.c

2510

store_byte(emu, emu->x86.R_ES, emu->x86.R_DI, val);

common/lib/libx86emu/x86emu.c

2522

uint32_t val;

common/lib/libx86emu/x86emu.c

2544

val = fetch_data_long(emu, emu->x86.R_SI);

common/lib/libx86emu/x86emu.c

2545

store_long(emu, emu->x86.R_ES, emu->x86.R_DI, val);

common/lib/libx86emu/x86emu.c

2547

val = fetch_data_word(emu, emu->x86.R_SI);

common/lib/libx86emu/x86emu.c

2548

store_word(emu, emu->x86.R_ES, emu->x86.R_DI, (uint16_t) val);

common/lib/libx86emu/x86emu.c

2869

uint32_t val;

common/lib/libx86emu/x86emu.c

2884

val = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI);

common/lib/libx86emu/x86emu.c

2885

cmp_long(emu, emu->x86.R_EAX, val);

common/lib/libx86emu/x86emu.c

2887

val = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI);

common/lib/libx86emu/x86emu.c

2888

cmp_word(emu, emu->x86.R_AX, (uint16_t) val);

common/lib/libx86emu/x86emu.c

2901

val = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI);

common/lib/libx86emu/x86emu.c

2902

cmp_long(emu, emu->x86.R_EAX, val);

common/lib/libx86emu/x86emu.c

2904

val = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI);

common/lib/libx86emu/x86emu.c

2905

cmp_word(emu, emu->x86.R_AX, (uint16_t) val);

common/lib/libx86emu/x86emu.c

2915

val = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI);

common/lib/libx86emu/x86emu.c

2916

cmp_long(emu, emu->x86.R_EAX, val);

common/lib/libx86emu/x86emu.c

2918

val = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI);

common/lib/libx86emu/x86emu.c

2919

cmp_word(emu, emu->x86.R_AX, (uint16_t) val);

common/lib/libx86emu/x86emu.c

527

store_data_byte(struct X86EMU *emu, uint32_t offset, uint8_t val)

common/lib/libx86emu/x86emu.c

529

store_byte(emu, get_data_segment(emu), offset, val);

common/lib/libx86emu/x86emu.c

543

store_data_word(struct X86EMU *emu, uint32_t offset, uint16_t val)

common/lib/libx86emu/x86emu.c

545

store_word(emu, get_data_segment(emu), offset, val);

common/lib/libx86emu/x86emu.c

559

store_data_long(struct X86EMU *emu, uint32_t offset, uint32_t val)

common/lib/libx86emu/x86emu.c

561

store_long(emu, get_data_segment(emu), offset, val);

common/lib/libx86emu/x86emu.c

57

static void store_data_byte (struct X86EMU *, uint32_t offset, uint8_t val);

common/lib/libx86emu/x86emu.c

575

store_byte(struct X86EMU *emu, uint32_t segment, uint32_t offset, uint8_t val)

common/lib/libx86emu/x86emu.c

577

(*emu->emu_wrb) (emu, ((uint32_t) segment << 4) + offset, val);

common/lib/libx86emu/x86emu.c

58

static void store_byte (struct X86EMU *, uint32_t segment, uint32_t offset, uint8_t val);

common/lib/libx86emu/x86emu.c

59

static void store_data_word (struct X86EMU *, uint32_t offset, uint16_t val);

common/lib/libx86emu/x86emu.c

591

store_word(struct X86EMU *emu, uint32_t segment, uint32_t offset, uint16_t val)

common/lib/libx86emu/x86emu.c

593

(*emu->emu_wrw) (emu, ((uint32_t) segment << 4) + offset, val);

common/lib/libx86emu/x86emu.c

60

static void store_word (struct X86EMU *, uint32_t segment, uint32_t offset, uint16_t val);

common/lib/libx86emu/x86emu.c

607

store_long(struct X86EMU *emu, uint32_t segment, uint32_t offset, uint32_t val)

common/lib/libx86emu/x86emu.c

609

(*emu->emu_wrl) (emu, ((uint32_t) segment << 4) + offset, val);

common/lib/libx86emu/x86emu.c

61

static void store_data_long (struct X86EMU *, uint32_t offset, uint32_t val);

common/lib/libx86emu/x86emu.c

62

static void store_long (struct X86EMU *, uint32_t segment, uint32_t offset, uint32_t val);

common/lib/libx86emu/x86emu_i8254.c

174

x86emu_i8254_write_command(struct x86emu_i8254 *sc, uint8_t val)

common/lib/libx86emu/x86emu_i8254.c

179

if ((val >> 6) == 3) {

common/lib/libx86emu/x86emu_i8254.c

187

if ((val & (2 << i)) == 0)

common/lib/libx86emu/x86emu_i8254.c

189

if ((val & 0x10) != 0)

common/lib/libx86emu/x86emu_i8254.c

191

if ((val & 0x20) != 0)

common/lib/libx86emu/x86emu_i8254.c

197

timer = &sc->timer[val >> 6];

common/lib/libx86emu/x86emu_i8254.c

199

switch (val & 0x30) {

common/lib/libx86emu/x86emu_i8254.c

216

timer->rw_status = val & 0x30;

common/lib/libx86emu/x86emu_i8254.c

218

timer->new_mode = (val >> 1) & 0x7;

common/lib/libx86emu/x86emu_i8254.c

219

timer->new_is_bcd = (val & 1) == 1;

common/lib/libx86emu/x86emu_i8254.c

226

uint16_t val;

common/lib/libx86emu/x86emu_i8254.c

240

val = timer->latched_counter;

common/lib/libx86emu/x86emu_i8254.c

242

val = x86emu_i8254_counter(&sc->timer[2],

common/lib/libx86emu/x86emu_i8254.c

246

val = bin2bcd(val);

common/lib/libx86emu/x86emu_i8254.c

250

output = val & 0xff;

common/lib/libx86emu/x86emu_i8254.c

253

output = val >> 8;

common/lib/libx86emu/x86emu_i8254.c

267

struct x86emu_i8254_timer *timer, uint8_t val)

common/lib/libx86emu/x86emu_i8254.c

276

timer->new_counter |= val;

common/lib/libx86emu/x86emu_i8254.c

281

timer->new_counter |= val << 8;

common/lib/libx86emu/x86emu_i8254.c

301

uint8_t val;

common/lib/libx86emu/x86emu_i8254.c

303

val = (sc->timer[2].gate_high) ? 1 : 0;

common/lib/libx86emu/x86emu_i8254.c

305

val |= 0x20;

common/lib/libx86emu/x86emu_i8254.c

307

return val;

common/lib/libx86emu/x86emu_i8254.c

311

x86emu_i8254_write_nmi(struct x86emu_i8254 *sc, uint8_t val)

common/lib/libx86emu/x86emu_i8254.c

316

sc->timer[2].gate_high = (val & 1) == 1;

common/lib/libx86emu/x86emu_i8254.c

361

x86emu_i8254_outb(struct x86emu_i8254 *sc, uint16_t port, uint8_t val)

common/lib/libx86emu/x86emu_i8254.c

365

x86emu_i8254_write_counter(sc, &sc->timer[0], val);

common/lib/libx86emu/x86emu_i8254.c

367

x86emu_i8254_write_counter(sc, &sc->timer[1], val);

common/lib/libx86emu/x86emu_i8254.c

369

x86emu_i8254_write_counter(sc, &sc->timer[2], val);

common/lib/libx86emu/x86emu_i8254.c

371

x86emu_i8254_write_command(sc, val);

common/lib/libx86emu/x86emu_i8254.c

373

x86emu_i8254_write_nmi(sc, val);

common/lib/libx86emu/x86emu_util.c

103

emu->mem_base[addr] = val;

common/lib/libx86emu/x86emu_util.c

114

wrw(struct X86EMU *emu, uint32_t addr, uint16_t val)

common/lib/libx86emu/x86emu_util.c

118

le16enc(emu->mem_base + addr, val);

common/lib/libx86emu/x86emu_util.c

129

wrl(struct X86EMU *emu, uint32_t addr, uint32_t val)

common/lib/libx86emu/x86emu_util.c

133

le32enc(emu->mem_base + addr, val);

common/lib/libx86emu/x86emu_util.c

99

wrb(struct X86EMU *emu, uint32_t addr, uint8_t val)

crypto/dist/ipsec-tools/src/libipsec/pfkey_dump.c

118

int val;

crypto/dist/ipsec-tools/src/libipsec/pfkey_dump.c

99

if (p->val == (num)) \

crypto/dist/ipsec-tools/src/libipsec/policy_parse.y

135

} val;

crypto/dist/ipsec-tools/src/libipsec/policy_parse.y

141

%token <val> PRIO_OFFSET

crypto/dist/ipsec-tools/src/libipsec/policy_parse.y

146

%type <val> IPADDRESS LEVEL_SPECIFY PORT

crypto/dist/ipsec-tools/src/racoon/cfparse.y

288

vchar_t *val;

crypto/dist/ipsec-tools/src/racoon/cfparse.y

368

%type <val> QUOTEDSTRING HEXSTRING ADDRSTRING ADDRRANGE sainfo_id

crypto/dist/ipsec-tools/src/racoon/cfparse.y

369

%type <val> identifierstring

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

396

vchar_t *val = NULL;

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

438

val = vmalloc(len);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

439

if (!val)

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

441

memcpy(val->v, p, len);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

480

sa->dhgrp->prime = val;

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

484

vfree(val);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

498

vfree(val);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

512

sa->dhgrp->curve_a = val;

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

516

sa->dhgrp->curve_b = val;

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

544

sa->lifetime = ipsecdoi_set_ld(val);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

545

vfree(val);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

553

sa->lifebyte = ipsecdoi_set_ld(val);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

554

vfree(val);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

562

vfree(val);

crypto/dist/ipsec-tools/src/racoon/ipsec_doi.c

588

sa->dhgrp->order = val;

crypto/dist/ipsec-tools/src/racoon/isakmp.c

2374

isakmp_set_attr_v(caddr_t buf, int type, caddr_t val, int len)

crypto/dist/ipsec-tools/src/racoon/isakmp.c

2381

memcpy(data + 1, val, len);

crypto/dist/ipsec-tools/src/racoon/isakmp.c

2388

isakmp_set_attr_l(caddr_t buf, int type, uint32_t val)

crypto/dist/ipsec-tools/src/racoon/isakmp.c

2394

data->lorv = htons((uint16_t)val);

crypto/dist/ipsec-tools/src/racoon/isakmp.c

2401

isakmp_add_attr_v(vchar_t *buf0, int type, caddr_t val, int len)

crypto/dist/ipsec-tools/src/racoon/isakmp.c

2424

memcpy(data + 1, val, len);

crypto/dist/ipsec-tools/src/racoon/isakmp.c

2431

isakmp_add_attr_l(vchar_t *buf0, int type, uint32_t val)

crypto/dist/ipsec-tools/src/racoon/isakmp.c

2453

data->lorv = htons((uint16_t)val);

crypto/dist/ipsec-tools/src/racoon/strnames.c

591

s_ipsecdoi_attr_v(int type, int val)

crypto/dist/ipsec-tools/src/racoon/strnames.c

597

return (name_attr_ipsec[i].f)(val);

crypto/dist/ipsec-tools/src/racoon/strnames.c

598

return num2str(val);

crypto/dist/ipsec-tools/src/racoon/strnames.c

784

s_oakley_attr_v(int type, int val)

crypto/dist/ipsec-tools/src/racoon/strnames.c

790

return (name_oakley_attr[i].f)(val);

crypto/dist/ipsec-tools/src/racoon/strnames.c

791

return num2str(val);

crypto/dist/ipsec-tools/src/setkey/parse.y

112

vchar_t val;

crypto/dist/ipsec-tools/src/setkey/parse.y

143

%type <val> PL_REQUESTS portstr portstr_notempty key_string

crypto/dist/ipsec-tools/src/setkey/parse.y

144

%type <val> policy_requests

crypto/dist/ipsec-tools/src/setkey/parse.y

145

%type <val> QUOTEDSTRING HEXSTRING STRING

crypto/dist/ipsec-tools/src/setkey/parse.y

146

%type <val> F_AIFLAGS

crypto/dist/ipsec-tools/src/setkey/parse.y

147

%type <val> upper_misc_spec policy_spec

dist/pf/sbin/pfctl/parse.y

311

char *val;

dist/pf/sbin/pfctl/parse.y

5107

char *p, *val;

dist/pf/sbin/pfctl/parse.y

5137

val = symget(buf);

dist/pf/sbin/pfctl/parse.y

5138

if (val == NULL) {

dist/pf/sbin/pfctl/parse.y

5142

parsebuf = val;

dist/pf/sbin/pfctl/parse.y

5251

free(sym->val);

dist/pf/sbin/pfctl/parse.y

5264

symset(const char *nam, const char *val, int persist)

dist/pf/sbin/pfctl/parse.y

5277

free(sym->val);

dist/pf/sbin/pfctl/parse.y

5290

sym->val = strdup(val);

dist/pf/sbin/pfctl/parse.y

5291

if (sym->val == NULL) {

dist/pf/sbin/pfctl/parse.y

5305

char *sym, *val;

dist/pf/sbin/pfctl/parse.y

5308

if ((val = strrchr(s, '=')) == NULL)

dist/pf/sbin/pfctl/parse.y

5311

if ((sym = malloc(strlen(s) - strlen(val) + 1)) == NULL)

dist/pf/sbin/pfctl/parse.y

5314

strlcpy(sym, s, strlen(s) - strlen(val) + 1);

dist/pf/sbin/pfctl/parse.y

5316

ret = symset(sym, val + 1, 1);

dist/pf/sbin/pfctl/parse.y

5330

return (sym->val);

dist/pf/sbin/pfctl/pfctl_osfp.c

785

long val = 0;

dist/pf/sbin/pfctl/pfctl_osfp.c

849

val = val * 10 + field[i] - '0';

dist/pf/sbin/pfctl/pfctl_osfp.c

850

if (val < 0) {

dist/pf/sbin/pfctl/pfctl_osfp.c

857

if (val > max) {

dist/pf/sbin/pfctl/pfctl_osfp.c

859

name, val, max);

dist/pf/sbin/pfctl/pfctl_osfp.c

862

*var = (int)val;

distrib/utils/edlabel/edlabel.c

209

print_val_cts(struct disklabel *d, u_long val)

distrib/utils/edlabel/edlabel.c

215

marker = (val % d->d_secpercyl) ? '*' : ' ';

distrib/utils/edlabel/edlabel.c

216

sects = val % d->d_nsectors;

distrib/utils/edlabel/edlabel.c

217

cyls = val / d->d_nsectors;

distrib/utils/edlabel/edlabel.c

222

printf(" %9ld %16s", val, buf);

distrib/utils/edlabel/edlabel.c

89

void print_val_cts(struct disklabel *, u_long val);

distrib/utils/ssh/ssh.c

356

int val = 0;

distrib/utils/ssh/ssh.c

359

val = atoi(argv[0]);

distrib/utils/ssh/ssh.c

360

exit(val);

games/adventure/hdr.h

80

int val; /* word type &index (ktab) */

games/adventure/save.c

338

uint64_t val;

games/adventure/save.c

343

val = 0;

games/adventure/save.c

345

val = val ^ 0xbadc0ffee;

games/adventure/save.c

346

val = (val << 4) | (val >> 60);

games/adventure/save.c

347

val += udata[i] ^ 0xbeefU;

games/adventure/save.c

350

uval = (unsigned char *)&val;

games/adventure/save.c

354

if (valpos >= sizeof(val)) {

games/adventure/save.c

670

uint32_t val, sum;

games/adventure/save.c

706

val = *(save_ints[i]);

games/adventure/save.c

707

val = htonl(val);

games/adventure/save.c

708

if (savefile_cwrite(sf, &val, sizeof(val))) {

games/adventure/save.c

720

val = save_intarrays[i].ptr[j];

games/adventure/save.c

721

val = htonl(val);

games/adventure/save.c

722

if (savefile_cwrite(sf, &val, sizeof(val))) {

games/adventure/save.c

761

uint32_t val;

games/adventure/save.c

815

if (savefile_cread(sf, &val, sizeof(val))) {

games/adventure/save.c

819

val = ntohl(val);

games/adventure/save.c

820

*(save_ints[i]) = val;

games/adventure/save.c

829

if (savefile_cread(sf, &val, sizeof(val))) {

games/adventure/save.c

833

val = ntohl(val);

games/adventure/save.c

834

save_intarrays[i].ptr[j] = val;

games/adventure/vocab.c

151

if (h->val) /* already got an entry? */

games/adventure/vocab.c

153

h->val = value;

games/adventure/vocab.c

165

if (h->val == 0)

games/adventure/vocab.c

173

return (h->val);

games/adventure/vocab.c

175

if (h->val == 0)

games/adventure/vocab.c

181

if (h->val / 1000 != type)

games/adventure/vocab.c

183

return (h->val % 1000);

games/adventure/vocab.c

206

if (h->val == 0) {

games/backgammon/common_source/odds.c

44

odds(int r1, int r2, int val)

games/backgammon/common_source/odds.c

57

table[i][r1] += val;

games/backgammon/common_source/odds.c

58

table[r1][i] += val;

games/backgammon/common_source/odds.c

61

table[r2][r1] += val;

games/backgammon/common_source/odds.c

62

table[r1][r2] += val;

games/factor/factor.c

131

BIGNUM *val;

games/factor/factor.c

137

val = BN_new();

games/factor/factor.c

138

if (val == NULL)

games/factor/factor.c

167

convert_str2bn(&val, p);

games/factor/factor.c

168

pr_fact(val, hflag, xflag);

games/factor/factor.c

173

convert_str2bn(&val, p);

games/factor/factor.c

174

pr_fact(val, hflag, xflag);

games/factor/factor.c

206

pr_fact(BIGNUM *val, int hflag, int xflag)

games/factor/factor.c

212

if (BN_is_zero(val)) /* Historical practice; 0 just exits. */

games/factor/factor.c

214

if (BN_is_one(val)) {

games/factor/factor.c

223

BN_print_fp(stdout, val);

games/factor/factor.c

225

BN_print_dec_fp(stdout, val);

games/factor/factor.c

228

for (fact = &prime[0]; !BN_is_one(val); ++fact) {

games/factor/factor.c

231

if (BN_mod_word(val, (BN_ULONG)*fact) == 0)

games/factor/factor.c

244

if (BN_cmp(bnfact, val) > 0 ||

games/factor/factor.c

245

BN_is_prime_ex(val, PRIME_CHECKS, NULL, NULL) == 1)

games/factor/factor.c

246

pr_print(val, hflag, xflag);

games/factor/factor.c

248

pollard_pminus1(val, hflag, xflag);

games/factor/factor.c

250

pr_print(val, hflag, xflag);

games/factor/factor.c

262

BN_div_word(val, (BN_ULONG)*fact);

games/factor/factor.c

263

} while (BN_mod_word(val, (BN_ULONG)*fact) == 0);

games/factor/factor.c

278

pr_print(BIGNUM *val, int hflag, int xflag)

games/factor/factor.c

286

sval = BN_dup(val);

games/factor/factor.c

290

if (val != NULL && BN_cmp(val, sval) == 0) {

games/factor/factor.c

295

} else if (val == NULL) {

games/factor/factor.c

298

pval = val;

games/factor/factor.c

313

if (val != NULL) {

games/factor/factor.c

314

BN_copy(sval, val);

games/factor/factor.c

334

pollard_pminus1(BIGNUM *val, int hflag, int xflag)

games/factor/factor.c

352

BN_mod_exp(base, base, i, val, ctx);

games/factor/factor.c

358

if (!BN_gcd(x, x, val, ctx))

games/factor/factor.c

368

BN_div(num, NULL, val, x, ctx);

games/factor/factor.c

377

BN_copy(val, num);

games/factor/factor.c

455

convert_str2bn(BIGNUM **val, char *p)

games/factor/factor.c

463

n = BN_hex2bn(val, p + 2);

games/factor/factor.c

465

n = BN_dec2bn(val, p);

games/gomoku/makemove.c

130

int val = old_weight_value(fsp, r);

games/gomoku/makemove.c

140

sp->s_wval -= val;

games/gomoku/makemove.c

149

sp->s_wval -= val;

games/gomoku/makemove.c

174

val = weight[n];

games/gomoku/makemove.c

178

sp->s_wval += val;

games/gomoku/makemove.c

82

int val = 0;

games/gomoku/makemove.c

84

val += weight[5 - cb.cv_force - cb.cv_win];

games/gomoku/makemove.c

86

val += weight[5 - cb.cv_force - cb.cv_win];

games/gomoku/makemove.c

87

return val;

games/monop/prop.c

65

int val;

games/monop/prop.c

73

val = value(op->sqr);

games/monop/prop.c

75

for (tp = *head; tp && value(tp->sqr) < val; tp = tp->next)

games/monop/prop.c

76

if (val == value(tp->sqr)) {

games/number/number.c

232

int val, rval;

games/number/number.c

244

val = (p[1] - '0') + (p[0] - '0') * 10;

games/number/number.c

245

if (val) {

games/number/number.c

248

if (val < 20)

games/number/number.c

249

(void)printf("%s", name1[val]);

games/number/number.c

251

(void)printf("%s", name2[val / 10]);

games/number/number.c

252

if (val % 10)

games/number/number.c

253

(void)printf("-%s", name1[val % 10]);

games/primes/primes.c

181

uint64_t val;

games/primes/primes.c

196

val = strtoumax(buf, &p, 0);

games/primes/primes.c

201

return (val);

games/rain/rain.c

75

unsigned long val = 0;

games/rain/rain.c

83

val = strtoul(optarg, &ep, 0);

games/rain/rain.c

86

if (errno == ERANGE && val == ULONG_MAX)

games/rain/rain.c

88

if (val >= 1000)

games/rain/rain.c

90

delay = (unsigned int)val * 1000; /* ms -> us */

games/rogue/score.c

529

short row = 2, val;

games/rogue/score.c

540

val = get_value(obj);

games/rogue/score.c

541

rogue.gold += val;

games/rogue/score.c

545

mvprintw(row++, 0, "%5d %s", val, buf);

games/rogue/score.c

561

int val;

games/rogue/score.c

563

val = 0;

games/rogue/score.c

568

val = id_weapons[wc].value;

games/rogue/score.c

571

val *= obj->quantity;

games/rogue/score.c

573

val += (obj->d_enchant * 85);

games/rogue/score.c

574

val += (obj->hit_enchant * 85);

games/rogue/score.c

577

val = id_armors[wc].value;

games/rogue/score.c

578

val += (obj->d_enchant * 75);

games/rogue/score.c

580

val += 200;

games/rogue/score.c

584

val = id_wands[wc].value * (obj->class + 1);

games/rogue/score.c

587

val = id_scrolls[wc].value * obj->quantity;

games/rogue/score.c

590

val = id_potions[wc].value * obj->quantity;

games/rogue/score.c

593

val = 5000;

games/rogue/score.c

596

val = id_rings[wc].value * (obj->class + 1);

games/rogue/score.c

599

if (val <= 0) {

games/rogue/score.c

600

val = 10;

games/rogue/score.c

602

return(val);

games/sail/array.h

148

void ARRAY##_set(struct ARRAY *a, unsigned index_, T *val); \

games/sail/array.h

150

int ARRAY##_add(struct ARRAY *a, T *val, unsigned *index_ret); \

games/sail/array.h

201

ARRAY##_set(struct ARRAY *a, unsigned index_, T *val) \

games/sail/array.h

203

array_set(&a->arr, index_, (void *)val); \

games/sail/array.h

213

ARRAY##_add(struct ARRAY *a, T *val, unsigned *ret) \

games/sail/array.h

215

return array_add(&a->arr, (void *)val, ret); \

games/sail/array.h

56

void array_set(const struct array *, unsigned index_, void *val);

games/sail/array.h

58

int array_add(struct array *, void *val, unsigned *index_ret);

games/sail/array.h

83

array_set(const struct array *a, unsigned index_, void *val)

games/sail/array.h

86

a->v[index_] = val;

games/sail/array.h

90

array_add(struct array *a, void *val, unsigned *index_ret)

games/sail/array.h

96

a->v[index_] = val;

games/tetris/scores.c

268

read32(int32_t val, int doflip)

games/tetris/scores.c

271

val = bswap32(val);

games/tetris/scores.c

273

return val;

games/tetris/scores.c

277

read64(int64_t val, int doflip)

games/tetris/scores.c

280

val = bswap64(val);

games/tetris/scores.c

282

return val;

games/warp/util.c

198

const char *val;

games/warp/util.c

200

if ((val = getenv(nam)) == NULL || !*val)

games/warp/util.c

201

val = def;

games/warp/util.c

202

return __UNCONST(val);

include/getopt.h

56

int val;

include/ssp/string.h

97

#define memset(dst, val, len) __ssp_bos_check3(memset, dst, val, len)

include/vis_proto.h

1122

vis_u8 val;

include/vis_proto.h

1125

val = *((vis_u8 *)addr);

include/vis_proto.h

1126

*((vis_u8 *)&out) = val;

include/vis_proto.h

1135

vis_u16 val;

include/vis_proto.h

1138

val = *((vis_u16 *)addr);

include/vis_proto.h

1139

*((vis_u16 *)&out) = val;

lib/libarch/alpha/alpha_pci_conf.c

56

return (args.val);

lib/libarch/alpha/alpha_pci_conf.c

61

uint32_t val)

lib/libarch/alpha/alpha_pci_conf.c

70

args.val = val;

lib/libarch/alpha/alpha_pci_io.c

194

alpha_pci_io_swiz_outb(bus_addr_t ioaddr, uint8_t val)

lib/libarch/alpha/alpha_pci_io.c

198

uint32_t nval = ((uint32_t)val) << (uint32_t)(8 * offset);

lib/libarch/alpha/alpha_pci_io.c

205

alpha_pci_io_swiz_outw(bus_addr_t ioaddr, uint16_t val)

lib/libarch/alpha/alpha_pci_io.c

209

uint32_t nval = ((uint32_t)val) << (uint32_t)(8 * offset);

lib/libarch/alpha/alpha_pci_io.c

216

alpha_pci_io_swiz_outl(bus_addr_t ioaddr, uint32_t val)

lib/libarch/alpha/alpha_pci_io.c

220

*port = val;

lib/libarch/alpha/alpha_pci_io.c

271

alpha_pci_io_bwx_outb(bus_addr_t ioaddr, uint8_t val)

lib/libarch/alpha/alpha_pci_io.c

277

alpha_stb(port, val);

lib/libarch/alpha/alpha_pci_io.c

282

alpha_pci_io_bwx_outw(bus_addr_t ioaddr, uint16_t val)

lib/libarch/alpha/alpha_pci_io.c

289

alpha_stw(port, val);

lib/libarch/alpha/alpha_pci_io.c

294

alpha_pci_io_bwx_outl(bus_addr_t ioaddr, uint32_t val)

lib/libarch/alpha/alpha_pci_io.c

301

*port = val;

lib/libc/arch/alpha/gen/__longjmp14.c

46

__longjmp14(jmp_buf env, int val)

lib/libc/arch/alpha/gen/__longjmp14.c

56

if (val == 0)

lib/libc/arch/alpha/gen/__longjmp14.c

57

val = 1;

lib/libc/arch/alpha/gen/__longjmp14.c

66

uc.uc_mcontext.__gregs[_REG_V0] = val;

lib/libc/arch/hppa/gen/__longjmp14.c

49

__longjmp14(jmp_buf env, int val)

lib/libc/arch/hppa/gen/__longjmp14.c

61

if (val == 0)

lib/libc/arch/hppa/gen/__longjmp14.c

62

val = 1;

lib/libc/arch/hppa/gen/__longjmp14.c

88

uc.uc_mcontext.__gregs[_REG_RET0] = val;

lib/libc/arch/hppa/gen/fabs.c

18

fabs(double val)

lib/libc/arch/hppa/gen/fabs.c

21

__asm volatile("fabs,dbl %0,%0" : "+f" (val));

lib/libc/arch/hppa/gen/fabs.c

22

return (val);

lib/libc/arch/m68k/gen/longjmp.c

49

__longjmp14(jmp_buf env, int val)

lib/libc/arch/m68k/gen/longjmp.c

60

if (val == 0)

lib/libc/arch/m68k/gen/longjmp.c

61

val = 1;

lib/libc/arch/m68k/gen/longjmp.c

64

uc.uc_mcontext.__gregs[_REG_D0] = val;

lib/libc/arch/mips/gen/longjmp.c

46

__longjmp14(jmp_buf env, int val)

lib/libc/arch/mips/gen/longjmp.c

56

if (val == 0)

lib/libc/arch/mips/gen/longjmp.c

57

val = 1;

lib/libc/arch/mips/gen/longjmp.c

83

uc.uc_mcontext.__gregs[_REG_V0] = val;

lib/libc/arch/sparc/gen/longjmp.c

107

uc.uc_mcontext.__gregs[_REG_O0] = (val != 0 ? val : 1);

lib/libc/arch/sparc/gen/longjmp.c

62

__longjmp14(jmp_buf env, int val)

lib/libc/arch/sparc64/gen/longjmp.c

113

if (val == 0)

lib/libc/arch/sparc64/gen/longjmp.c

114

val = 1;

lib/libc/arch/sparc64/gen/longjmp.c

117

uc.uc_mcontext.__gregs[_REG_O0] = val;

lib/libc/arch/sparc64/gen/longjmp.c

65

__longjmp14(jmp_buf env, int val)

lib/libc/arch/vax/gen/__longjmp14.c

50

__longjmp14(jmp_buf env, int val)

lib/libc/arch/vax/gen/__longjmp14.c

60

if (val == 0)

lib/libc/arch/vax/gen/__longjmp14.c

61

val = 1;

lib/libc/arch/vax/gen/__longjmp14.c

70

uc.uc_mcontext.__gregs[_REG_R0] = val;

lib/libc/citrus/citrus_db.c

224

uint16_t val;

lib/libc/citrus/citrus_db.c

234

memcpy(&val, _region_head(&r), 2);

lib/libc/citrus/citrus_db.c

235

*rval = be16toh(val);

lib/libc/citrus/citrus_db.c

247

uint32_t val;

lib/libc/citrus/citrus_db.c

257

memcpy(&val, _region_head(&r), 4);

lib/libc/citrus/citrus_db.c

258

*rval = be32toh(val);

lib/libc/citrus/citrus_db_factory.c

160

const char *key, uint8_t val)

lib/libc/citrus/citrus_db_factory.c

168

*p = val;

lib/libc/citrus/citrus_db_factory.c

175

const char *key, uint16_t val)

lib/libc/citrus/citrus_db_factory.c

183

*p = htons(val);

lib/libc/citrus/citrus_db_factory.c

190

const char *key, uint32_t val)

lib/libc/citrus/citrus_db_factory.c

198

*p = htonl(val);

lib/libc/citrus/citrus_db_factory.c

231

put8(struct _region *r, size_t *rofs, uint8_t val)

lib/libc/citrus/citrus_db_factory.c

233

*(uint8_t *)_region_offset(r, *rofs) = val;

lib/libc/citrus/citrus_db_factory.c

238

put32(struct _region *r, size_t *rofs, uint32_t val)

lib/libc/citrus/citrus_db_factory.c

240

val = htonl(val);

lib/libc/citrus/citrus_db_factory.c

241

memcpy(_region_offset(r, *rofs), &val, 4);

lib/libc/citrus/citrus_pivot_factory.c

118

uint32_t val;

lib/libc/citrus/citrus_pivot_factory.c

149

val = strtoul(data, &ep, 0);

lib/libc/citrus/citrus_pivot_factory.c

158

return _db_factory_add32_by_s(se->se_df, key2, val);

lib/libc/citrus/citrus_region.h

84

uint16_t val;

lib/libc/citrus/citrus_region.h

85

memcpy(&val, _citrus_region_offset(r, pos), (size_t)2);

lib/libc/citrus/citrus_region.h

86

return val;

lib/libc/citrus/citrus_region.h

92

uint32_t val;

lib/libc/citrus/citrus_region.h

93

memcpy(&val, _citrus_region_offset(r, pos), (size_t)4);

lib/libc/citrus/citrus_region.h

94

return val;

lib/libc/compat/gen/compat_ldexp_ieee754.c

100

return underflow(val);

lib/libc/compat/gen/compat_ldexp_ieee754.c

133

return overflow(val);

lib/libc/compat/gen/compat_ldexp_ieee754.c

148

return underflow(val);

lib/libc/compat/gen/compat_ldexp_ieee754.c

48

underflow(double val)

lib/libc/compat/gen/compat_ldexp_ieee754.c

52

return (val < 0 ? -tiny*tiny : tiny*tiny);

lib/libc/compat/gen/compat_ldexp_ieee754.c

56

overflow(double val)

lib/libc/compat/gen/compat_ldexp_ieee754.c

60

return (val < 0 ? -huge*huge : huge*huge);

lib/libc/compat/gen/compat_ldexp_ieee754.c

67

ldexp(double val, int expon)

lib/libc/compat/gen/compat_ldexp_ieee754.c

72

u.dblu_d = val;

lib/libc/compat/gen/compat_ldexp_ieee754.c

82

return (val + val);

lib/libc/compat/gen/compat_ldexp_ieee754.c

95

return underflow(val);

lib/libc/compat/gen/compat_modf_ieee754.c

43

modf(double val, double *iptr)

lib/libc/compat/gen/compat_modf_ieee754.c

51

u.dblu_d = val;

lib/libc/db/hash/hash.c

574

hash_access(HTAB *hashp, ACTION action, DBT *key, DBT *val)

lib/libc/db/hash/hash.c

654

if (__addel(hashp, rbufp, key, val)) {

lib/libc/db/hash/hash.c

676

if (__big_return(hashp, rbufp, ndx, val, 0))

lib/libc/db/hash/hash.c

679

val->data = (uint8_t *)rbufp->page + (int)bp[ndx + 1];

lib/libc/db/hash/hash.c

680

val->size = bp[ndx] - bp[ndx + 1];

lib/libc/db/hash/hash.c

685

(__addel(hashp, rbufp, key, val))) {

lib/libc/db/hash/hash_bigkey.c

100

val_data = (char *)val->data;

lib/libc/db/hash/hash_bigkey.c

101

_DBFIT(val->size, int);

lib/libc/db/hash/hash_bigkey.c

102

val_size = val->size;

lib/libc/db/hash/hash_bigkey.c

142

if (space == val_size && val_size == val->size)

lib/libc/db/hash/hash_bigkey.c

177

if (space == val_size && val_size == val->size)

lib/libc/db/hash/hash_bigkey.c

385

__big_return(HTAB *hashp, BUFHEAD *bufp, int ndx, DBT *val, int set_current)

lib/libc/db/hash/hash_bigkey.c

431

val->data = (uint8_t *)tp + off;

lib/libc/db/hash/hash_bigkey.c

432

val->size = bp[1] - off;

lib/libc/db/hash/hash_bigkey.c

455

val->size = collect_data(hashp, bufp, (int)len, set_current);

lib/libc/db/hash/hash_bigkey.c

456

if (val->size == (size_t)-1)

lib/libc/db/hash/hash_bigkey.c

464

val->data = (uint8_t *)hashp->tmp_buf;

lib/libc/db/hash/hash_bigkey.c

526

__big_keydata(HTAB *hashp, BUFHEAD *bufp, DBT *key, DBT *val, int set)

lib/libc/db/hash/hash_bigkey.c

528

key->size = collect_key(hashp, bufp, 0, val, set);

lib/libc/db/hash/hash_bigkey.c

540

collect_key(HTAB *hashp, BUFHEAD *bufp, int len, DBT *val, int set)

lib/libc/db/hash/hash_bigkey.c

558

if (__big_return(hashp, bufp, 1, val, set))

lib/libc/db/hash/hash_bigkey.c

563

collect_key(hashp, xbp, totlen, val, set)) < 1))

lib/libc/db/hash/hash_bigkey.c

594

DBT key, val;

lib/libc/db/hash/hash_bigkey.c

602

if (__big_keydata(hashp, big_keyp, &key, &val, 0))

lib/libc/db/hash/hash_bigkey.c

86

__big_insert(HTAB *hashp, BUFHEAD *bufp, const DBT *key, const DBT *val)

lib/libc/db/hash/hash_page.c

115

_DIAGASSERT(off >= val->size);

lib/libc/db/hash/hash_page.c

116

off -= (uint16_t)val->size;

lib/libc/db/hash/hash_page.c

117

memmove(p + off, val->data, val->size);

lib/libc/db/hash/hash_page.c

192

DBT key, val;

lib/libc/db/hash/hash_page.c

241

val.data = (uint8_t *)op + ino[n + 1];

lib/libc/db/hash/hash_page.c

242

val.size = ino[n] - ino[n + 1];

lib/libc/db/hash/hash_page.c

243

putpair(np, &key, &val);

lib/libc/db/hash/hash_page.c

300

DBT key, val;

lib/libc/db/hash/hash_page.c

363

val.data = (uint8_t *)cino + ino[n + 1];

lib/libc/db/hash/hash_page.c

364

val.size = ino[n] - ino[n + 1];

lib/libc/db/hash/hash_page.c

369

if (PAIRFITS(op, (&key), (&val)))

lib/libc/db/hash/hash_page.c

370

putpair((char *)(void *)op, &key, &val);

lib/libc/db/hash/hash_page.c

377

putpair((char *)(void *)op, &key, &val);

lib/libc/db/hash/hash_page.c

382

if (PAIRFITS(np, (&key), (&val)))

lib/libc/db/hash/hash_page.c

383

putpair((char *)(void *)np, &key, &val);

lib/libc/db/hash/hash_page.c

390

putpair((char *)(void *)np, &key, &val);

lib/libc/db/hash/hash_page.c

409

__addel(HTAB *hashp, BUFHEAD *bufp, const DBT *key, const DBT *val)

lib/libc/db/hash/hash_page.c

434

FREESPACE(bp) >= PAIRSIZE(key, val)) {

lib/libc/db/hash/hash_page.c

435

squeeze_key(bp, key, val);

lib/libc/db/hash/hash_page.c

446

if (PAIRFITS(bp, key, val))

lib/libc/db/hash/hash_page.c

447

putpair(bufp->page, key, val);

lib/libc/db/hash/hash_page.c

455

if (PAIRFITS(sop, key, val))

lib/libc/db/hash/hash_page.c

456

putpair((char *)(void *)sop, key, val);

lib/libc/db/hash/hash_page.c

458

if (__big_insert(hashp, bufp, key, val))

lib/libc/db/hash/hash_page.c

869

squeeze_key(uint16_t *sp, const DBT *key, const DBT *val)

lib/libc/db/hash/hash_page.c

885

_DIAGASSERT(off >= val->size);

lib/libc/db/hash/hash_page.c

886

off -= (uint16_t)val->size;

lib/libc/db/hash/hash_page.c

888

memmove(p + off, val->data, val->size);

lib/libc/db/hash/hash_page.c

892

temp = PAIRSIZE(key, val);

lib/libc/db/hash/hash_page.c

98

putpair(char *p, const DBT *key, const DBT *val)

lib/libc/gen/Lint___setjmp14.c

19

__longjmp14(jmp_buf env, int val)

lib/libc/gen/Lint___sigsetjmp14.c

19

__siglongjmp14(sigjmp_buf env, int val)

lib/libc/gen/Lint__setjmp.c

19

_longjmp(jmp_buf env, int val)

lib/libc/gen/Lint_ldexp.c

12

ldexp(double val, int exp)

lib/libc/include/futex_private.h

44

__futex(volatile int *uaddr, int op, int val, const struct timespec *timeout,

lib/libc/include/futex_private.h

47

return _syscall(SYS___futex, uaddr, op, val, timeout, uaddr2,

lib/libc/inet/inet_cidr_pton.c

165

u_int val;

lib/libc/inet/inet_cidr_pton.c

177

val = 0;

lib/libc/inet/inet_cidr_pton.c

185

val <<= 4;

lib/libc/inet/inet_cidr_pton.c

186

val |= (int)(pch - xdigits);

lib/libc/inet/inet_cidr_pton.c

187

if (val > 0xffff)

lib/libc/inet/inet_cidr_pton.c

204

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_cidr_pton.c

205

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_cidr_pton.c

207

val = 0;

lib/libc/inet/inet_cidr_pton.c

227

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_cidr_pton.c

228

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_net_pton.c

198

int val;

lib/libc/inet/inet_net_pton.c

201

val = 0;

lib/libc/inet/inet_net_pton.c

208

if (n++ != 0 && val == 0) /* no leading zeros */

lib/libc/inet/inet_net_pton.c

210

val *= 10;

lib/libc/inet/inet_net_pton.c

211

val += (int)(pch - digits);

lib/libc/inet/inet_net_pton.c

212

if (val > 128) /* range */

lib/libc/inet/inet_net_pton.c

220

*bitsp = val;

lib/libc/inet/inet_net_pton.c

230

u_int val;

lib/libc/inet/inet_net_pton.c

233

val = 0;

lib/libc/inet/inet_net_pton.c

240

if (n++ != 0 && val == 0) /* no leading zeros */

lib/libc/inet/inet_net_pton.c

242

val *= 10;

lib/libc/inet/inet_net_pton.c

243

val += (int)(pch - digits);

lib/libc/inet/inet_net_pton.c

244

if (val > 255) /* range */

lib/libc/inet/inet_net_pton.c

251

*dst++ = val;

lib/libc/inet/inet_net_pton.c

254

val = 0;

lib/libc/inet/inet_net_pton.c

264

*dst++ = val;

lib/libc/inet/inet_net_pton.c

276

u_int val;

lib/libc/inet/inet_net_pton.c

292

val = 0;

lib/libc/inet/inet_net_pton.c

302

val <<= 4;

lib/libc/inet/inet_net_pton.c

303

val |= (int)(pch - xdigits);

lib/libc/inet/inet_net_pton.c

320

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_net_pton.c

321

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_net_pton.c

324

val = 0;

lib/libc/inet/inet_net_pton.c

341

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_net_pton.c

342

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_network.c

101

*pp++ = val, cp++;

lib/libc/inet/inet_network.c

106

*pp++ = val;

lib/libc/inet/inet_network.c

110

for (val = 0, i = 0; i < n; i++) {

lib/libc/inet/inet_network.c

111

val <<= 8;

lib/libc/inet/inet_network.c

112

val |= parts[i] & 0xff;

lib/libc/inet/inet_network.c

114

return (val);

lib/libc/inet/inet_network.c

64

in_addr_t val;

lib/libc/inet/inet_network.c

73

val = 0; base = 10; digit = 0;

lib/libc/inet/inet_network.c

83

val = (val * base) + (c - '0');

lib/libc/inet/inet_network.c

89

val = (val << 4) + (c + 10 - (islower(c) ? 'a' : 'A'));

lib/libc/inet/inet_network.c

98

if (pp >= parts + 4 || val > 0xff)

lib/libc/inet/inet_pton.c

102

u_int32_t val;

lib/libc/inet/inet_pton.c

121

val = 0; base = 10;

lib/libc/inet/inet_pton.c

137

val = (val * base) + digit;

lib/libc/inet/inet_pton.c

143

val = (val << 4) | digit;

lib/libc/inet/inet_pton.c

158

*pp++ = val;

lib/libc/inet/inet_pton.c

185

if (parts[0] > 0xff || val > 0xffffff)

lib/libc/inet/inet_pton.c

187

val |= parts[0] << 24;

lib/libc/inet/inet_pton.c

191

if ((parts[0] | parts[1]) > 0xff || val > 0xffff)

lib/libc/inet/inet_pton.c

193

val |= (parts[0] << 24) | (parts[1] << 16);

lib/libc/inet/inet_pton.c

197

if ((parts[0] | parts[1] | parts[2] | val) > 0xff)

lib/libc/inet/inet_pton.c

199

val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);

lib/libc/inet/inet_pton.c

203

val = htonl(val);

lib/libc/inet/inet_pton.c

204

memcpy(dst, &val, NS_INADDRSZ);

lib/libc/inet/inet_pton.c

230

u_int val;

lib/libc/inet/inet_pton.c

244

val = 0;

lib/libc/inet/inet_pton.c

251

val <<= 4;

lib/libc/inet/inet_pton.c

252

val |= (int)(pch - xdigits);

lib/libc/inet/inet_pton.c

268

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_pton.c

269

*tp++ = (u_char) val & 0xff;

lib/libc/inet/inet_pton.c

271

val = 0;

lib/libc/inet/inet_pton.c

285

*tp++ = (u_char) (val >> 8) & 0xff;

lib/libc/inet/inet_pton.c

286

*tp++ = (u_char) val & 0xff;

lib/libc/locale/_wcstod.h

107

val = _STRTOD_FUNC(buf, &end, loc);

lib/libc/locale/_wcstod.h

125

return val;

lib/libc/locale/_wcstod.h

64

_RETURN_TYPE val;

lib/libc/net/ip6opt.c

547

inet6_opt_set_val(void *databuf, int offset, void *val, socklen_t vallen)

lib/libc/net/ip6opt.c

550

memcpy((uint8_t *)databuf + offset, val, vallen);

lib/libc/net/ip6opt.c

650

inet6_opt_get_val(void *databuf, int offset, void *val, socklen_t vallen)

lib/libc/net/ip6opt.c

654

memcpy(val, (uint8_t *)databuf + offset, vallen);

lib/libc/net/sctp_sys_calls.c

955

uint32_t val;

lib/libc/net/sctp_sys_calls.c

957

val = assoc_id;

lib/libc/net/sctp_sys_calls.c

958

ret = ioctl(sd, SIOCPEELOFF, &val);

lib/libc/net/sctp_sys_calls.c

962

return (int) val;

lib/libc/net/sockatmark.c

47

int val;

lib/libc/net/sockatmark.c

51

if (ioctl(s, SIOCATMARK, &val) == -1)

lib/libc/net/sockatmark.c

54

return (val);

lib/libc/resolv/res_debug.c

776

unsigned long val;

lib/libc/resolv/res_debug.c

782

val = mantissa * poweroften[exponent];

lib/libc/resolv/res_debug.c

784

(void) snprintf(precsize_ntoa_retbuf, sizeof(precsize_ntoa_retbuf), "%lu.%.2lu", val/100, val%100);

lib/libc/rpc/getrpcent.c

178

interpret(char *val, size_t len)

lib/libc/rpc/getrpcent.c

184

_DIAGASSERT(val != NULL);

lib/libc/rpc/getrpcent.c

188

strncpy(d->line, val, sizeof(d->line) - 1);

lib/libc/rpc/getrpcent.c

82

static struct rpcent *interpret(char *val, size_t len);

lib/libc/rpc/svc.c

799

int val;

lib/libc/rpc/svc.c

803

val = *(int *)arg;

lib/libc/rpc/svc.c

804

if (val <= 0)

lib/libc/rpc/svc.c

806

__svc_maxrec = val;

lib/libc/ssp/memset_chk.c

44

__memset_chk(void * __restrict dst, int val, size_t len, size_t slen)

lib/libc/ssp/memset_chk.c

48

return memset(dst, val, len);

lib/libc/stdio/vfwprintf.c

262

__ultoa(u_long val, CHAR_T *endp, int base, int octzero, const char *xdigs,

lib/libc/stdio/vfwprintf.c

275

if (val < 10) { /* many numbers are 1 digit */

lib/libc/stdio/vfwprintf.c

276

*--cp = to_char(val);

lib/libc/stdio/vfwprintf.c

286

if (val > LONG_MAX) {

lib/libc/stdio/vfwprintf.c

287

*--cp = to_char(val % 10);

lib/libc/stdio/vfwprintf.c

289

sval = val / 10;

lib/libc/stdio/vfwprintf.c

291

sval = val;

lib/libc/stdio/vfwprintf.c

318

*--cp = to_char(val & 7);

lib/libc/stdio/vfwprintf.c

319

val >>= 3;

lib/libc/stdio/vfwprintf.c

320

} while (val);

lib/libc/stdio/vfwprintf.c

327

*--cp = xdigs[(size_t)val & 15];

lib/libc/stdio/vfwprintf.c

328

val >>= 4;

lib/libc/stdio/vfwprintf.c

329

} while (val);

lib/libc/stdio/vfwprintf.c

340

__ujtoa(uintmax_t val, CHAR_T *endp, int base, int octzero,

lib/libc/stdio/vfwprintf.c

349

if (val <= ULONG_MAX)

lib/libc/stdio/vfwprintf.c

350

return __ultoa((u_long)val, endp, base, octzero, xdigs,

lib/libc/stdio/vfwprintf.c

354

if (val < 10) {

lib/libc/stdio/vfwprintf.c

355

*--cp = to_char(val % 10);

lib/libc/stdio/vfwprintf.c

359

if (val > INTMAX_MAX) {

lib/libc/stdio/vfwprintf.c

360

*--cp = to_char(val % 10);

lib/libc/stdio/vfwprintf.c

362

sval = val / 10;

lib/libc/stdio/vfwprintf.c

364

sval = val;

lib/libc/stdio/vfwprintf.c

392

*--cp = to_char(val & 7);

lib/libc/stdio/vfwprintf.c

393

val >>= 3;

lib/libc/stdio/vfwprintf.c

394

} while (val);

lib/libc/stdio/vfwprintf.c

401

*--cp = xdigs[(size_t)val & 15];

lib/libc/stdio/vfwprintf.c

402

val >>= 4;

lib/libc/stdio/vfwprintf.c

403

} while (val);

lib/libc/stdio/vfwprintf.c

797

#define GETASTER(val) \

lib/libc/stdio/vfwprintf.c

812

val = GETARG (int); \

lib/libc/stdio/vfwprintf.c

816

val = GETARG (int); \

lib/libc/stdlib/getopt_long.c

349

long_options[(_x)].val == long_options[(_y)].val)

lib/libc/stdlib/getopt_long.c

426

optopt = long_options[match].val;

lib/libc/stdlib/getopt_long.c

457

optopt = long_options[match].val;

lib/libc/stdlib/getopt_long.c

470

*long_options[match].flag = long_options[match].val;

lib/libc/stdlib/getopt_long.c

473

retval = long_options[match].val;

lib/libc/stdlib/strsuftoll.c

119

strsuftoll(const char *desc, const char *val,

lib/libc/stdlib/strsuftoll.c

125

result = strsuftollx(desc, val, min, max, errbuf, sizeof(errbuf));

lib/libc/stdlib/strsuftoll.c

137

__strsuftollx(const char *desc, const char *val,

lib/libc/stdlib/strsuftoll.c

144

_DIAGASSERT(val != NULL);

lib/libc/stdlib/strsuftoll.c

152

while (isspace((unsigned char)*val)) /* Skip leading space */

lib/libc/stdlib/strsuftoll.c

153

val++;

lib/libc/stdlib/strsuftoll.c

156

num = strtoll(val, &expr, 10);

lib/libc/stdlib/strsuftoll.c

160

if (expr == val) /* No digits */

lib/libc/stdlib/strsuftoll.c

227

snprintf(ebuf, ebuflen, "%s `%s': illegal number", desc, val);

lib/libc/stdlib/strsuftoll.c

247

strsuftollx(const char *desc, const char *val,

lib/libc/stdlib/strsuftoll.c

250

return __strsuftollx(desc, val, min, max, ebuf, ebuflen, 0);

lib/libc/string/wcscspn_bloom.h

62

size_t val;

lib/libc/string/wcscspn_bloom.h

66

val = wcscspn_bloom1((size_t)*charset);

lib/libc/string/wcscspn_bloom.h

67

bloom[val / BLOOM_DIV] |= (size_t)1 << (val % BLOOM_DIV);

lib/libc/string/wcscspn_bloom.h

68

val = wcscspn_bloom2((size_t)*charset);

lib/libc/string/wcscspn_bloom.h

69

bloom[val / BLOOM_DIV] |= (size_t)1 << (val % BLOOM_DIV);

lib/libc/string/wcscspn_bloom.h

77

size_t val;

lib/libc/string/wcscspn_bloom.h

79

val = wcscspn_bloom1((size_t)ch);

lib/libc/string/wcscspn_bloom.h

80

if (bloom[val / BLOOM_DIV] & ((size_t)1 << (val % BLOOM_DIV)))

lib/libc/string/wcscspn_bloom.h

82

val = wcscspn_bloom2((size_t)ch);

lib/libc/string/wcscspn_bloom.h

83

if (bloom[val / BLOOM_DIV] & ((size_t)1 << (val % BLOOM_DIV)))

lib/libc/sys/eventfd_read.c

45

eventfd_t val;

lib/libc/sys/eventfd_read.c

47

switch (read(efd, &val, sizeof(val))) {

lib/libc/sys/eventfd_read.c

51

case sizeof(val):

lib/libc/sys/eventfd_read.c

52

*valp = val;

lib/libc/sys/eventfd_write.c

43

eventfd_write(int efd, eventfd_t val)

lib/libc/sys/eventfd_write.c

46

switch (write(efd, &val, sizeof(val))) {

lib/libc/sys/eventfd_write.c

50

case sizeof(val):

lib/libc/time/localtime.c

399

unsigned long val;

lib/libc/time/localtime.c

401

val = getauxval(AT_SECURE);

lib/libc/time/localtime.c

402

if (val || errno != ENOENT)

lib/libc/time/localtime.c

403

return !!val;

lib/libc/time/zdump.c

225

tzalloc(char const *val)

lib/libc/time/zdump.c

228

if (setenv("TZ", val, 1) != 0) {

lib/libc/time/zdump.c

241

ptrdiff_t valsize = strlen(val) + 1;

lib/libc/time/zdump.c

268

memcpy(env[0] + TZeqlen, val, valsize);

lib/libc/time/zic.c

2595

convert(uint_fast32_t val, char *buf)

lib/libc/time/zic.c

2602

b[i] = (val >> shift) & 0xff;

lib/libc/time/zic.c

2606

convert64(uint_fast64_t val, char *buf)

lib/libc/time/zic.c

2613

b[i] = (val >> shift) & 0xff;

lib/libc/time/zic.c

2617

puttzcode(zic_t val, FILE *fp)

lib/libc/time/zic.c

2621

convert(val, buf);

lib/libc/time/zic.c

2626

puttzcodepass(zic_t val, FILE *fp, int pass)

lib/libc/time/zic.c

2629

puttzcode(val, fp);

lib/libc/time/zic.c

2633

convert64(val, buf);

lib/libc/yp/xdryp.c

372

char key[YPMAXRECORD], val[YPMAXRECORD];

lib/libc/yp/xdryp.c

384

out.valdat.dptr = val;

lib/libc/yp/xdryp.c

385

out.valdat.dsize = sizeof(val);

lib/libc/yp/yp_match.c

103

if ((ep->val = malloc((size_t)vallen)) == NULL) {

lib/libc/yp/yp_match.c

113

(void)memcpy(ep->val, val, (size_t)ep->vallen);

lib/libc/yp/yp_match.c

131

ypmatch_find(const char *map, const char *key, int keylen, const char **val,

lib/libc/yp/yp_match.c

139

_DIAGASSERT(val != NULL);

lib/libc/yp/yp_match.c

156

*val = ep->val;

lib/libc/yp/yp_match.c

58

char *val;

lib/libc/yp/yp_match.c

68

ypmatch_add(const char *map, const char *key, int keylen, char *val, int vallen)

lib/libc/yp/yp_match.c

75

_DIAGASSERT(val != NULL);

lib/libc/yp/yp_match.c

95

if (ep->val) {

lib/libc/yp/yp_match.c

96

free(ep->val);

lib/libc/yp/yp_match.c

97

ep->val = NULL;

lib/libcompat/regexp/regexp.c

724

regtail(p, val)

lib/libcompat/regexp/regexp.c

726

char *val;

lib/libcompat/regexp/regexp.c

745

offset = scan - val;

lib/libcompat/regexp/regexp.c

747

offset = val - scan;

lib/libcompat/regexp/regexp.c

756

regoptail(p, val)

lib/libcompat/regexp/regexp.c

758

char *val;

lib/libcompat/regexp/regexp.c

763

regtail(OPERAND(p), val);

lib/libedit/keymacro.c

137

el->el_keymacro.val.cmd = (el_action_t) cmd;

lib/libedit/keymacro.c

138

return &el->el_keymacro.val;

lib/libedit/keymacro.c

149

el->el_keymacro.val.str = str;

lib/libedit/keymacro.c

150

return &el->el_keymacro.val;

lib/libedit/keymacro.c

179

keymacro_get(EditLine *el, wchar_t *ch, keymacro_value_t *val)

lib/libedit/keymacro.c

182

return node_trav(el, el->el_keymacro.map, ch, val);

lib/libedit/keymacro.c

193

keymacro_add(EditLine *el, const wchar_t *key, keymacro_value_t *val,

lib/libedit/keymacro.c

202

if (ntype == XK_CMD && val->cmd == ED_SEQUENCE_LEAD_IN) {

lib/libedit/keymacro.c

213

(void) node__try(el, el->el_keymacro.map, key, val, ntype);

lib/libedit/keymacro.c

283

keymacro_value_t *val)

lib/libedit/keymacro.c

292

return node_trav(el, ptr->next, ch, val);

lib/libedit/keymacro.c

294

*val = ptr->val;

lib/libedit/keymacro.c

303

return node_trav(el, ptr->sibling, ch, val);

lib/libedit/keymacro.c

306

val->str = NULL;

lib/libedit/keymacro.c

318

keymacro_value_t *val, int ntype)

lib/libedit/keymacro.c

343

if (ptr->val.str)

lib/libedit/keymacro.c

344

el_free(ptr->val.str);

lib/libedit/keymacro.c

353

ptr->val = *val;

lib/libedit/keymacro.c

356

if ((ptr->val.str = wcsdup(val->str)) == NULL)

lib/libedit/keymacro.c

366

(void) node__try(el, ptr->next, str, val, ntype);

lib/libedit/keymacro.c

440

if (ptr->val.str != NULL)

lib/libedit/keymacro.c

441

el_free(ptr->val.str);

lib/libedit/keymacro.c

463

ptr->val.str = NULL;

lib/libedit/keymacro.c

515

&ptr->val, ptr->type);

lib/libedit/keymacro.c

564

keymacro_kprint(el, el->el_keymacro.buf, &ptr->val, ptr->type);

lib/libedit/keymacro.c

580

keymacro_kprint(EditLine *el, const wchar_t *key, keymacro_value_t *val,

lib/libedit/keymacro.c

587

if (val != NULL)

lib/libedit/keymacro.c

590

(void) keymacro__decode_str(val->str, unparsbuf,

lib/libedit/keymacro.c

598

if (val->cmd == fp->func) {

lib/libedit/keymacro.c

79

keymacro_value_t val; /* command code or pointer to str, */

lib/libedit/keymacro.h

53

keymacro_value_t val; /* Local conversion buffer */

lib/libedit/read.c

256

keymacro_value_t val;

lib/libedit/read.c

257

switch (keymacro_get(el, ch, &val)) {

lib/libedit/read.c

259

cmd = val.cmd;

lib/libedit/read.c

262

el_wpush(el, val.str);

lib/libexecinfo/unwind_arm_ehabi_stub.c

40

_Unwind_Word val;

lib/libexecinfo/unwind_arm_ehabi_stub.c

42

&val);

lib/libexecinfo/unwind_arm_ehabi_stub.c

44

return val;

lib/libexecinfo/unwind_arm_ehabi_stub.c

61

_Unwind_SetGR(struct _Unwind_Context *context, int reg, _Unwind_Ptr val)

lib/libexecinfo/unwind_arm_ehabi_stub.c

64

&val);

lib/libkvm/kvm_x86_64.c

231

struct p2o key, *val;

lib/libkvm/kvm_x86_64.c

254

val = bsearch(&key, map, cpu_kh->nmemsegs, sizeof (key), cmp_p2o);

lib/libkvm/kvm_x86_64.c

255

if (val)

lib/libkvm/kvm_x86_64.c

256

off = val->off + pa - val->pa;

lib/libm/arch/hppa/fenv.c

75

writefpsr(uint32_t val)

lib/libm/arch/hppa/fenv.c

77

__asm__ __volatile__("fldw 0(%1),%%fr0" : : "m" (val), "r"(&val));

lib/libnpf/npf.c

491

npf_param_set(nl_config_t *ncf, const char *name, int val)

lib/libnpf/npf.c

509

nvlist_add_number(params, name, (uint64_t)val);

lib/libnpf/npf.c

515

npf_param_iterate(nl_config_t *ncf, nl_iter_t *iter, int *val, int *defval)

lib/libnpf/npf.c

546

*val = (int)nvlist_get_number(params, name);

lib/libnpf/npf.c

658

npf_ext_param_u32(nl_ext_t *ext, const char *key, uint32_t val)

lib/libnpf/npf.c

660

nvlist_add_number(ext->ext_dict, key, val);

lib/libnpf/npf.c

664

npf_ext_param_bool(nl_ext_t *ext, const char *key, bool val)

lib/libnpf/npf.c

666

nvlist_add_bool(ext->ext_dict, key, val);

lib/libnpf/npf.c

670

npf_ext_param_string(nl_ext_t *ext, const char *key, const char *val)

lib/libnpf/npf.c

672

nvlist_add_string(ext->ext_dict, key, val);

lib/libnvmm/libnvmm_x86.c

1991

sign_extend(uint64_t val, int size)

lib/libnvmm/libnvmm_x86.c

1994

if (val & __BIT(7))

lib/libnvmm/libnvmm_x86.c

1995

val |= 0xFFFFFFFFFFFFFF00;

lib/libnvmm/libnvmm_x86.c

1997

if (val & __BIT(15))

lib/libnvmm/libnvmm_x86.c

1998

val |= 0xFFFFFFFFFFFF0000;

lib/libnvmm/libnvmm_x86.c

2000

if (val & __BIT(31))

lib/libnvmm/libnvmm_x86.c

2001

val |= 0xFFFFFFFF00000000;

lib/libnvmm/libnvmm_x86.c

2003

return val;

lib/libnvmm/libnvmm_x86.c

3031

uint64_t val;

lib/libnvmm/libnvmm_x86.c

3033

val = state->gprs[gpr];

lib/libnvmm/libnvmm_x86.c

3034

val &= size_to_mask(instr->address_size);

lib/libnvmm/libnvmm_x86.c

3036

return val;

lib/libnvmm/libnvmm_x86.c

3295

uint64_t val;

lib/libnvmm/libnvmm_x86.c

3343

val = state->gprs[instr->src.u.reg->num];

lib/libnvmm/libnvmm_x86.c

3344

val = __SHIFTOUT(val, instr->src.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3345

memcpy(mem.data, &val, mem.size);

lib/libnvmm/libnvmm_x86.c

3364

val = state->gprs[instr->dst.u.reg->num];

lib/libnvmm/libnvmm_x86.c

3365

val = __SHIFTOUT(val, instr->dst.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3366

memcpy(mem.data, &val, mem.size);

lib/libnvmm/libnvmm_x86.c

3386

memcpy(&val, membuf, sizeof(uint64_t));

lib/libnvmm/libnvmm_x86.c

3387

val = __SHIFTIN(val, instr->dst.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3389

state->gprs[instr->dst.u.reg->num] |= val;

lib/libnvmm/libnvmm_x86.c

3401

memcpy(&val, membuf, sizeof(uint64_t));

lib/libnvmm/libnvmm_x86.c

3402

val = __SHIFTIN(val, instr->src.u.reg->mask);

lib/libnvmm/libnvmm_x86.c

3404

state->gprs[instr->src.u.reg->num] |= val;

lib/libpam/modules/pam_krb5/pam_krb5.c

1112

return princ->name.name_string.val[n];

lib/libpam/modules/pam_ssh/pam_ssh.c

250

char *line, *p, *key, *val;

lib/libpam/modules/pam_ssh/pam_ssh.c

266

for (val = ++p; p < line + len; ++p)

lib/libpam/modules/pam_ssh/pam_ssh.c

274

openpam_log(PAM_LOG_DEBUG, "got %s: %s", key, val);

lib/libpam/modules/pam_ssh/pam_ssh.c

275

pam_setenv(pamh, key, val, 1);

lib/libpam/modules/pam_unix/pam_unix.c

229

char *val;

lib/libpam/modules/pam_unix/pam_unix.c

232

val = NULL;

lib/libpam/modules/pam_unix/pam_unix.c

234

&val, &vallen);

lib/libpam/modules/pam_unix/pam_unix.c

236

if (val != NULL)

lib/libpam/modules/pam_unix/pam_unix.c

237

free(val);

lib/libpam/modules/pam_unix/pam_unix.c

240

free(val);

lib/libpci/pci_bus.c

75

*valp = bdfr.cfgreg.val;

lib/libpci/pci_bus.c

86

uint32_t val)

lib/libpci/pci_bus.c

94

bdfr.cfgreg.val = val;

lib/libpci/pci_device.c

71

*valp = r.val;

lib/libpci/pci_device.c

81

pcidev_conf_write(int fd, u_int reg, uint32_t val)

lib/libpci/pci_device.c

86

r.val = val;

lib/libpthread/pthread_mutex.c

122

uintptr_t type, proto, val, ceil;

lib/libpthread/pthread_mutex.c

141

val = (uintptr_t)attr->ptma_private;

lib/libpthread/pthread_mutex.c

143

type = MUTEX_GET_TYPE(val);

lib/libpthread/pthread_mutex.c

144

proto = MUTEX_GET_PROTOCOL(val);

lib/libpthread/pthread_mutex.c

145

ceil = MUTEX_GET_CEILING(val);

lib/libpthread/pthread_mutex.c

163

val = (uintptr_t)ptm->ptm_owner;

lib/libpthread/pthread_mutex.c

164

val |= MUTEX_PROTECT_BIT;

lib/libpthread/pthread_mutex.c

165

ptm->ptm_owner = (void *)val;

lib/libpthread/pthread_mutex.c

197

void *val;

lib/libpthread/pthread_mutex.c

206

val = atomic_cas_ptr(&ptm->ptm_owner, NULL, self);

lib/libpthread/pthread_mutex.c

207

if (__predict_true(val == NULL)) {

lib/libpthread/pthread_mutex.c

220

void *val;

lib/libpthread/pthread_mutex.c

226

val = atomic_cas_ptr(&ptm->ptm_owner, NULL, self);

lib/libpthread/pthread_mutex.c

227

if (__predict_true(val == NULL)) {

lib/libpthread/pthread_mutex.c

394

void *val, *new, *next;

lib/libpthread/pthread_mutex.c

403

val = atomic_cas_ptr(&ptm->ptm_owner, NULL, self);

lib/libpthread/pthread_mutex.c

404

if (__predict_true(val == NULL)) {

lib/libpthread/pthread_mutex.c

411

if (MUTEX_RECURSIVE(val)) {

lib/libpthread/pthread_mutex.c

412

if (MUTEX_OWNER(val) == 0) {

lib/libpthread/pthread_mutex.c

413

new = (void *)((uintptr_t)self | (uintptr_t)val);

lib/libpthread/pthread_mutex.c

414

next = atomic_cas_ptr(&ptm->ptm_owner, val, new);

lib/libpthread/pthread_mutex.c

415

if (__predict_true(next == val)) {

lib/libpthread/pthread_mutex.c

422

if (MUTEX_OWNER(val) == (uintptr_t)self) {

lib/libpthread/pthread_mutex.c

437

void *val, *newval;

lib/libpthread/pthread_mutex.c

453

val = atomic_cas_ptr(&ptm->ptm_owner, self, newval);

lib/libpthread/pthread_mutex.c

454

if (__predict_false(val != self)) {

lib/libpthread/pthread_mutex.c

455

bool weown = (MUTEX_OWNER(val) == (uintptr_t)self);

lib/libpthread/pthread_mutex.c

459

newval = val;

lib/libpthread/pthread_mutex.c

463

} else if (MUTEX_RECURSIVE(val)) {

lib/libpthread/pthread_mutex.c

466

newval = val;

lib/libpthread/pthread_mutex.c

469

newval = val;

lib/libpthread/pthread_mutex.c

475

"Unlocking unlocked mutex", (val != NULL));

lib/libpthread/pthread_mutex.c

485

if (newval != val) {

lib/libpthread/pthread_mutex.c

486

val = atomic_swap_ptr(&ptm->ptm_owner, newval);

lib/libpthread/pthread_mutex.c

487

if (__predict_false(MUTEX_PROTECT(val))) {

lib/libpthread/pthread_tsd.c

329

void *val;

lib/libpthread/pthread_tsd.c

372

val = pt->pts_value;

lib/libpthread/pthread_tsd.c

380

if (destructor != NULL && val != NULL) {

lib/libpthread/pthread_tsd.c

382

(*destructor)(val);

lib/libpthread/tss.c

70

tss_set(tss_t key, void *val)

lib/libpthread/tss.c

73

if (pthread_setspecific(key, val) == 0)

lib/libquota/quota_kernel.c

282

struct quotakey *key, struct quotaval *val)

lib/libquota/quota_kernel.c

286

ret = __quota_kernel_cursor_getn(qh, cursor, key, val, 1);

lib/libquota/quota_oldfiles.c

302

dqblk_getlimit(uint32_t val)

lib/libquota/quota_oldfiles.c

304

if (val == 0) {

lib/libquota/quota_oldfiles.c

307

return val - 1;

lib/libquota/quota_oldfiles.c

312

dqblk_setlimit(uint64_t val)

lib/libquota/quota_oldfiles.c

314

if (val == QUOTA_NOLIMIT && val >= 0xffffffffUL) {

lib/libquota/quota_oldfiles.c

317

return (uint32_t)val + 1;

lib/libquota/quota_oldfiles.c

782

struct quotakey *key, struct quotaval *val)

lib/libquota/quota_oldfiles.c

827

if (__quota_oldfiles_doget(qh, key, val, &isallzero)) {

lib/libresolv/dst_api.c

714

u_int16_t val;

lib/libresolv/dst_api.c

726

val = (u_int16_t)(key->dk_flags & 0xffff);

lib/libresolv/dst_api.c

727

dst_s_put_int16(out_storage, val);

lib/libresolv/dst_api.c

734

val = (u_int16_t)((key->dk_flags >> 16) & 0xffff);

lib/libresolv/dst_api.c

735

dst_s_put_int16(&out_storage[loc], val);

lib/libresolv/dst_internal.h

147

void dst_s_put_int16( u_int8_t *buf, const u_int16_t val);

lib/libresolv/dst_internal.h

150

void dst_s_put_int32( u_int8_t *buf, const u_int32_t val);

lib/libresolv/support.c

200

dst_s_put_int16(u_int8_t *buf, const u_int16_t val)

lib/libresolv/support.c

202

buf[0] = (u_int8_t)((uint32_t)val >> 8);

lib/libresolv/support.c

203

buf[1] = (u_int8_t)(val);

lib/libresolv/support.c

218

dst_s_put_int32(u_int8_t *buf, const u_int32_t val)

lib/libresolv/support.c

220

buf[0] = (u_int8_t)(val >> 24);

lib/libresolv/support.c

221

buf[1] = (u_int8_t)(val >> 16);

lib/libresolv/support.c

222

buf[2] = (u_int8_t)(val >> 8);

lib/libresolv/support.c

223

buf[3] = (u_int8_t)(val);

lib/librumphijack/hijack.c

1575

int val;

lib/librumphijack/hijack.c

1577

val = dup2vec[i] & DUP2FDMASK;

lib/librumphijack/hijack.c

1578

maxdup2 = MAX(val, maxdup2);

lib/libskey/skey.h

27

char *val;

lib/libskey/skeylogin.c

163

if ((mp->val = strtok_r(NULL, " \t", &last)) == NULL)

lib/libskey/skeylogin.c

223

if ((mp->val = strtok_r(NULL, " \t", &last)) == NULL)

lib/libskey/skeylogin.c

310

if ((mp->val = strtok_r(NULL, " \t", &last)) == NULL)

lib/libskey/skeylogin.c

313

atob8(filekey, mp->val);

lib/libskey/skeylogin.c

328

btoa8(mp->val, key);

lib/libskey/skeylogin.c

334

mp->logname, mp->n, mp->seed, mp->val, tbuf);

lib/libskey/skeylogin.c

338

mp->seed, mp->val, tbuf);

lib/libskey/skeysubr.c

374

int val;

lib/libskey/skeysubr.c

382

if ((val = htoi(*in++)) == -1)

lib/libskey/skeysubr.c

384

*out = val << 4;

lib/libskey/skeysubr.c

388

if ((val = htoi(*in++)) == -1)

lib/libskey/skeysubr.c

390

*out++ |= val;

lib/libterminfo/termcap.c

300

strval(const char *val)

lib/libterminfo/termcap.c

313

*ip++ = *val++;

lib/libterminfo/termcap.c

316

if (isdigit((unsigned char)*val)) {

lib/libterminfo/termcap.c

317

for (ps = pe = val;

lib/libterminfo/termcap.c

318

isdigit((unsigned char)*val) || *val == '.';

lib/libterminfo/termcap.c

319

val++)

lib/libterminfo/termcap.c

321

if (*val == '*') {

lib/libterminfo/termcap.c

322

val++;

lib/libterminfo/termcap.c

331

for (; *val != '\0'; val++) {

lib/libterminfo/termcap.c

334

if (*val != '%') {

lib/libterminfo/termcap.c

335

if (*val == ',') {

lib/libterminfo/termcap.c

341

*ip++ = *val;

lib/libterminfo/termcap.c

345

switch (c = *++(val)) {

lib/libterminfo/termcap.c

389

l += printchar(&ip, &val);

lib/libterminfo/termcap.c

407

l += printchar(&ip, &val);

lib/libterminfo/termcap.c

411

l += printchar(&ip, &val);

lib/libterminfo/termcap.c

491

char *info, *ip, *token, *val, *p, tok[3];

lib/libterminfo/termcap.c

514

val = p = NULL;

lib/libterminfo/termcap.c

523

val = NULL;

lib/libterminfo/termcap.c

526

val = token + 2;

lib/libterminfo/termcap.c

529

val = strval(token + 2);

lib/libterminfo/termcap.c

538

val = strval(p);

lib/libterminfo/termcap.c

553

if (val == NULL)

lib/libterminfo/termcap.c

556

vl = strlen(val);

lib/libterminfo/termcap.c

567

free(val);

lib/libterminfo/termcap.c

580

if (val != NULL) {

lib/libterminfo/termcap.c

581

strcpy(ip, val);

lib/libterminfo/termcap.c

584

free(val);

lib/libterminfo/tparm.c

192

long val, val2;

lib/libterminfo/tparm.c

270

val = 0;

lib/libterminfo/tparm.c

294

width = (size_t)val;

lib/libterminfo/tparm.c

297

val = 0;

lib/libterminfo/tparm.c

310

val = (val * 10) + (c - '0');

lib/libterminfo/tparm.c

311

if (val > 10000)

lib/libterminfo/tparm.c

328

width = (size_t)val;

lib/libterminfo/tparm.c

330

precision = (size_t)val;

lib/libterminfo/tparm.c

338

pop(&val, NULL, &stack);

lib/libterminfo/tparm.c

339

if (ochar(term, (unsigned char)val) == 0)

lib/libterminfo/tparm.c

375

pop(&val, NULL, &stack);

lib/libterminfo/tparm.c

376

if (onum(term, fmt, (int)val, olen) == 0)

lib/libterminfo/tparm.c

387

pop(&val, NULL, &stack);

lib/libterminfo/tparm.c

389

dnums[*str - 'a'] = val;

lib/libterminfo/tparm.c

391

term->_snums[*str - 'A'] = val;

lib/libterminfo/tparm.c

418

val = 0;

lib/libterminfo/tparm.c

420

val = (val * 10) + (*str - '0');

lib/libterminfo/tparm.c

421

if (push(val, NULL, &stack))

lib/libterminfo/tparm.c

441

pop(&val, NULL, &stack);

lib/libterminfo/tparm.c

445

val = val + val2;

lib/libterminfo/tparm.c

448

val = val2 - val;

lib/libterminfo/tparm.c

451

val = val * val2;

lib/libterminfo/tparm.c

454

val = val ? val2 / val : 0;

lib/libterminfo/tparm.c

457

val = val ? val2 % val : 0;

lib/libterminfo/tparm.c

460

val = val && val2;

lib/libterminfo/tparm.c

463

val = val || val2;

lib/libterminfo/tparm.c

466

val = val & val2;

lib/libterminfo/tparm.c

469

val = val | val2;

lib/libterminfo/tparm.c

472

val = val ^ val2;

lib/libterminfo/tparm.c

475

val = val == val2;

lib/libterminfo/tparm.c

478

val = val2 < val;

lib/libterminfo/tparm.c

481

val = val2 > val;

lib/libterminfo/tparm.c

484

if (push(val, NULL, &stack))

lib/libterminfo/tparm.c

489

pop(&val, NULL, &stack);

lib/libterminfo/tparm.c

492

val = !val;

lib/libterminfo/tparm.c

495

val = ~val;

lib/libterminfo/tparm.c

498

if (push(val, NULL, &stack))

lib/libterminfo/tparm.c

504

pop(&val, NULL, &stack);

lib/libterminfo/tparm.c

505

if (val == 0) {

lib/libukfs/ukfs.c

300

u_quad_t val;

lib/libukfs/ukfs.c

322

val = strtouq(nptr, &ep, 10);

lib/libukfs/ukfs.c

323

if (val == UQUAD_MAX) {

lib/libukfs/ukfs.c

331

part->part_devoff = val;

lib/libukfs/ukfs.c

341

val = strtouq(nptr, &ep, 10);

lib/libukfs/ukfs.c

342

if (val == UQUAD_MAX) {

lib/libukfs/ukfs.c

350

part->part_devsize = val;

lib/libutil/getmntopts.c

109

(*fun)(1, "Invalid %s argument `%s'", opt, val);

lib/libutil/getmntopts.c

88

const char *val = getmntoptstr(mp, opt);

lib/libutil/getmntopts.c

90

if (val == NULL) {

lib/libutil/getmntopts.c

98

rv = strtol(val, &ep, 0);

lib/libutil/if_media.c

117

lookup_media_word(struct ifmedia_description *desc, int type, const char *val)

lib/libutil/if_media.c

122

strcasecmp(desc->ifmt_string, val) == 0)

lib/libutil/if_media.c

129

get_media_mode(int type, const char *val)

lib/libutil/if_media.c

132

return lookup_media_word(ifm_mode_descriptions, type, val);

lib/libutil/if_media.c

136

get_media_subtype(int type, const char *val)

lib/libutil/if_media.c

139

return lookup_media_word(ifm_subtype_descriptions, type, val);

lib/libutil/if_media.c

143

get_media_options(int type, const char *val, char **invalid)

lib/libutil/if_media.c

149

optlist = strdup(val);

lib/lua/gpio/gpio.c

175

int *fd, val;

lib/lua/gpio/gpio.c

178

val = (int)luaL_checkinteger(L, 3);

lib/lua/gpio/gpio.c

179

if (val != GPIO_PIN_HIGH && val != GPIO_PIN_LOW)

lib/lua/gpio/gpio.c

180

gpio_error(L, "%d: invalid value", val);

lib/lua/gpio/gpio.c

183

req.gp_value = val;

lib/npf/ext_log/npfext_log.c

69

npfext_log_param(nl_ext_t *ext, const char *param, const char *val __unused)

lib/npf/ext_normalize/npfext_normalize.c

59

npfext_normalize_param(nl_ext_t *ext, const char *param, const char *val)

lib/npf/ext_normalize/npfext_normalize.c

82

if (val == NULL && params[i].reqval) {

lib/npf/ext_normalize/npfext_normalize.c

91

npf_ext_param_u32(ext, name, atol(val));

lib/npf/ext_rndblock/npfext_rndblock.c

59

npfext_rndblock_param(nl_ext_t *ext, const char *param, const char *val)

lib/npf/ext_rndblock/npfext_rndblock.c

72

if (val == NULL) {

lib/npf/ext_rndblock/npfext_rndblock.c

87

ival = (i == 1) ? atof(val) * 100 : atol(val);

lib/npf/ext_route/npfext_route.c

66

npfext_route_param(nl_ext_t *ext, const char *param, const char *val __unused)

libexec/comsat/comsat.c

191

intmax_t val;

libexec/comsat/comsat.c

197

offset = val = strtoimax(cp + 1, &fn, 10);

libexec/comsat/comsat.c

198

if (errno == ERANGE || offset != val)

libexec/httpd/auth-bozo.c

145

bozo_auth_check_headers(bozo_httpreq_t *request, char *val, char *str,

libexec/httpd/auth-bozo.c

150

if (strcasecmp(val, "authorization") == 0 &&

libexec/httpd/bozohttpd.c

291

char *val;

libexec/httpd/bozohttpd.c

298

val = bozostrnsep(&in, " \t\n\r", &len);

libexec/httpd/bozohttpd.c

299

if (len < 1 || val == NULL || in == NULL)

libexec/httpd/bozohttpd.c

301

*method = val;

libexec/httpd/bozohttpd.c

305

val = bozostrnsep(&in, " \t\n\r", &len);

libexec/httpd/bozohttpd.c

308

*file = val;

libexec/httpd/bozohttpd.c

312

*file = val;

libexec/httpd/bozohttpd.c

403

const char *target, const char *val)

libexec/httpd/bozohttpd.c

418

bozo_set_pref(httpd, prefs, *cur, val);

libexec/httpd/bozohttpd.c

436

const char *val, const char *str, ssize_t len)

libexec/httpd/bozohttpd.c

444

if (strcasecmp(*quirk, val) == 0)

libexec/httpd/bozohttpd.c

450

if (strcasecmp(val, hdr->h_header) == 0)

libexec/httpd/bozohttpd.c

466

hdr->h_header = bozostrdup(httpd, request, val);

libexec/httpd/bozohttpd.c

480

addmerge_reqheader(bozo_httpreq_t *request, const char *val, const char *str,

libexec/httpd/bozohttpd.c

484

return addmerge_header(request, &request->hr_headers, val, str, len);

libexec/httpd/bozohttpd.c

488

addmerge_replheader(bozo_httpreq_t *request, const char *val, const char *str,

libexec/httpd/bozohttpd.c

493

val, str, len);

libexec/httpd/bozohttpd.c

612

char *str, *val, *method, *file, *proto, *query;

libexec/httpd/bozohttpd.c

782

val = bozostrnsep(&str, ":", &len);

libexec/httpd/bozohttpd.c

785

str ? str : "<null>", val ? val : "<null>"));

libexec/httpd/bozohttpd.c

786

if (val == NULL || len == -1) {

libexec/httpd/bozohttpd.c

797

while (*val == ' ' || *val == '\t')

libexec/httpd/bozohttpd.c

798

val++;

libexec/httpd/bozohttpd.c

803

if (bozo_auth_check_headers(request, val, str, len))

libexec/httpd/bozohttpd.c

806

hdr = addmerge_reqheader(request, val, str, len);

libexec/httpd/bozohttpd.c

972

parse_http_date(const char *val, time_t *timestamp)

libexec/httpd/bozohttpd.c

977

if ((remainder = strptime(val, "%a, %d %b %Y %T GMT", &tm)) == NULL &&

libexec/httpd/bozohttpd.c

978

(remainder = strptime(val, "%a, %d-%b-%y %T GMT", &tm)) == NULL &&

libexec/httpd/bozohttpd.c

979

(remainder = strptime(val, "%a %b %d %T %Y", &tm)) == NULL)

libexec/httpd/cgi-bozo.c

353

bozo_setenv(bozohttpd_t *httpd, const char *env, const char *val,

libexec/httpd/cgi-bozo.c

356

char *s1 = bozomalloc(httpd, strlen(env) + strlen(val) + 2);

libexec/httpd/cgi-bozo.c

360

strcat(s1, val);

libexec/httpd/lua-bozo.c

252

char *v, *p, *val, *q;

libexec/httpd/lua-bozo.c

260

val = malloc(strlen(v) + 1);

libexec/httpd/lua-bozo.c

261

if (val == NULL)

libexec/httpd/lua-bozo.c

264

for (p = v, q = val; *p; p++) {

libexec/httpd/lua-bozo.c

268

free(val);

libexec/httpd/lua-bozo.c

285

lua_pushstring(L, val);

libexec/httpd/lua-bozo.c

287

free(val);

libexec/httpd/main.c

149

const char *val;

libexec/httpd/main.c

182

val = bozo_get_pref(&prefs, "background") == NULL ?

libexec/httpd/main.c

184

bozo_set_pref(&httpd, &prefs, "background", val);

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

180

store_ptr(void *where, Elf_Addr val)

libexec/ld.elf_so/arch/alpha/alpha_reloc.c

183

memcpy(where, &val, sizeof(val));

libexec/ld.elf_so/arch/arm/mdreloc.c

76

store_ptr(void *where, Elf_Addr val)

libexec/ld.elf_so/arch/arm/mdreloc.c

79

memcpy(where, &val, sizeof(val));

libexec/ld.elf_so/arch/hppa/hppa_reloc.c

100

(void)memcpy(where, &val, sizeof(val));

libexec/ld.elf_so/arch/hppa/hppa_reloc.c

95

store_ptr(void *where, Elf_Addr val)

libexec/ld.elf_so/arch/hppa/hppa_reloc.c

98

*(Elf_Addr *)where = val;

libexec/ld.elf_so/arch/mips/mips_reloc.c

101

Elf_Sxword val;

libexec/ld.elf_so/arch/mips/mips_reloc.c

111

val = 0;

libexec/ld.elf_so/arch/mips/mips_reloc.c

113

(void)memcpy(&val, where, len);

libexec/ld.elf_so/arch/mips/mips_reloc.c

116

uint8_t *valp = (void *)&val;

libexec/ld.elf_so/arch/mips/mips_reloc.c

117

(void)memcpy(valp + sizeof(val) - len, where, len);

libexec/ld.elf_so/arch/mips/mips_reloc.c

119

return (len == sizeof(Elf_Sxword)) ? val : (Elf_Sword)val;

libexec/ld.elf_so/arch/mips/mips_reloc.c

123

store_ptr(void *where, Elf_Sxword val, size_t len)

libexec/ld.elf_so/arch/mips/mips_reloc.c

128

*(Elf_Sxword *)where = val;

libexec/ld.elf_so/arch/mips/mips_reloc.c

132

*(Elf_Sword *)where = val;

libexec/ld.elf_so/arch/mips/mips_reloc.c

136

(void)memcpy(where, &val, len);

libexec/ld.elf_so/arch/mips/mips_reloc.c

139

const uint8_t *valp = (const void *)&val;

libexec/ld.elf_so/arch/mips/mips_reloc.c

140

(void)memcpy(where, valp + sizeof(val) - len, len);

libexec/ld.elf_so/arch/mips/mips_reloc.c

219

Elf_Sxword val = old;

libexec/ld.elf_so/arch/mips/mips_reloc.c

227

val += relocbase;

libexec/ld.elf_so/arch/mips/mips_reloc.c

228

store_ptr(where, val, sizeof(Elf_Sword));

libexec/ld.elf_so/arch/mips/mips_reloc.c

230

where, (void *)old, (void *)val));

libexec/ld.elf_so/arch/mips/mips_reloc.c

231

store_ptr(where, val, rlen);

libexec/ld.elf_so/arch/mips/mips_reloc.c

377

Elf_Sxword val = old;

libexec/ld.elf_so/arch/mips/mips_reloc.c

382

val += got[obj->local_gotno +

libexec/ld.elf_so/arch/mips/mips_reloc.c

385

where, (void *)old, (void *)val,

libexec/ld.elf_so/arch/mips/mips_reloc.c

411

val += (Elf_Addr)def->st_value;

libexec/ld.elf_so/arch/mips/mips_reloc.c

413

val += (Elf_Addr)obj->relocbase;

libexec/ld.elf_so/arch/mips/mips_reloc.c

416

where, (void *)old, (void *)val,

libexec/ld.elf_so/arch/mips/mips_reloc.c

419

store_ptr(where, val, rlen);

libexec/ld.elf_so/arch/mips/mips_reloc.c

430

Elf_Addr val = old;

libexec/ld.elf_so/arch/mips/mips_reloc.c

432

val += (Elf_Addr)defobj->tlsindex;

libexec/ld.elf_so/arch/mips/mips_reloc.c

434

store_ptr(where, val, ELFSIZE / 8);

libexec/ld.elf_so/arch/mips/mips_reloc.c

448

Elf_Addr val = old;

libexec/ld.elf_so/arch/mips/mips_reloc.c

450

val += (Elf_Addr)def->st_value - TLS_DTV_OFFSET;

libexec/ld.elf_so/arch/mips/mips_reloc.c

451

store_ptr(where, val, ELFSIZE / 8);

libexec/ld.elf_so/arch/mips/mips_reloc.c

466

Elf_Addr val = old;

libexec/ld.elf_so/arch/mips/mips_reloc.c

472

val += (Elf_Addr)(def->st_value + defobj->tlsoffset

libexec/ld.elf_so/arch/mips/mips_reloc.c

474

store_ptr(where, val, ELFSIZE / 8);

libexec/ld.elf_so/arch/riscv/mdreloc.c

146

const Elf_Addr val = (Elf_Addr)obj->relocbase +

libexec/ld.elf_so/arch/riscv/mdreloc.c

150

where, (void *)val,

libexec/ld.elf_so/arch/riscv/mdreloc.c

155

*where = val;

libexec/ld.elf_so/arch/riscv/mdreloc.c

160

const Elf_Addr val = (Elf_Addr)defobj->relocbase +

libexec/ld.elf_so/arch/riscv/mdreloc.c

164

where, (void *)val,

libexec/ld.elf_so/arch/riscv/mdreloc.c

170

*where = val;

libexec/ld.elf_so/arch/riscv/mdreloc.c

190

const Elf_Addr val = (Elf_Addr)defobj->tlsindex;

libexec/ld.elf_so/arch/riscv/mdreloc.c

193

where, (void *)val,

libexec/ld.elf_so/arch/riscv/mdreloc.c

198

*where = val;

libexec/ld.elf_so/arch/riscv/mdreloc.c

203

const Elf_Addr val = (Elf_Addr)(def->st_value +

libexec/ld.elf_so/arch/riscv/mdreloc.c

207

where, (void *)val,

libexec/ld.elf_so/arch/riscv/mdreloc.c

212

*where = val;

libexec/ld.elf_so/arch/riscv/mdreloc.c

93

Elf_Addr val = relocbase + rela->r_addend;

libexec/ld.elf_so/arch/riscv/mdreloc.c

94

*where = val;

libexec/ld.elf_so/arch/riscv/mdreloc.c

96

where, (void *)val));

libexec/ld.elf_so/load.c

241

} val;

libexec/ld.elf_so/load.c

273

j = sizeof(val);

libexec/ld.elf_so/load.c

274

if ((i = _rtld_sysctl(x->ctlname, &val, &j)) == -1) {

libexec/ld.elf_so/load.c

282

xsnprintf(val.s, sizeof(val.s), "%" PRIu64, val.q);

libexec/ld.elf_so/load.c

285

xsnprintf(val.s, sizeof(val.s), "%d", val.i);

libexec/ld.elf_so/load.c

294

dbg(("sysctl returns %s", val.s));

libexec/ld.elf_so/load.c

299

if (strcmp(x->entry[i].value, val.s) == 0)

libexec/ld.elf_so/load.c

305

val.s, name);

libexec/ld.elf_so/tls.c

169

#define SET_DTV_GENERATION(dtv, val) (dtv)[0] = (void *)(size_t)(val)

libexec/ld.elf_so/tls.c

170

#define SET_DTV_MAX_INDEX(dtv, val) (dtv)[-1] = (void *)(size_t)(val)

libexec/ld.elf_so/xprintf.c

150

unsigned long val = va_arg(ap, unsigned long);

libexec/ld.elf_so/xprintf.c

152

int bits = sizeof(val) * 8 - 4;

libexec/ld.elf_so/xprintf.c

159

if (val == 0) {

libexec/ld.elf_so/xprintf.c

165

while ((val & mask) == 0)

libexec/ld.elf_so/xprintf.c

170

*bp++ = hexdigits[(val & mask) >> bits];

libexec/telnetd/authenc.c

75

telnet_getenv(char *val)

libexec/telnetd/authenc.c

77

return(getenv(val));

libexec/telnetd/defs.h

98

cc_t val; /* the value of the special character */

libexec/telnetd/slc.c

119

spcset(i, &slctab[i].defset.val, &slctab[i].sptr);

libexec/telnetd/slc.c

121

slctab[i].current.val = 0;

libexec/telnetd/slc.c

133

add_slc(char func, char flag, cc_t val)

libexec/telnetd/slc.c

142

if ((*slcptr++ = (unsigned char)val) == 0xff)

libexec/telnetd/slc.c

221

process_slc(u_int func, u_int flag, cc_t val)

libexec/telnetd/slc.c

261

if (hislevel == mylevel && (val == slctab[func].current.val || ack)) {

libexec/telnetd/slc.c

273

change_slc(func, flag, val);

libexec/telnetd/slc.c

285

change_slc(int func, int flag, cc_t val)

libexec/telnetd/slc.c

298

slctab[func].current.val = (cc_t)_POSIX_VDISABLE;

libexec/telnetd/slc.c

300

add_slc(func, flag, val);

libexec/telnetd/slc.c

315

slctab[func].current.val = slctab[func].defset.val;

libexec/telnetd/slc.c

317

slctab[func].current.val);

libexec/telnetd/slc.c

335

slctab[func].current.val = val;

libexec/telnetd/slc.c

336

*(slctab[func].sptr) = val;

libexec/telnetd/slc.c

340

add_slc(func, flag, val);

libexec/telnetd/slc.c

358

slctab[func].current.val = val;

libexec/telnetd/slc.c

370

slctab[func].current.val =

libexec/telnetd/slc.c

371

slctab[func].defset.val;

libexec/telnetd/slc.c

372

val = slctab[func].current.val;

libexec/telnetd/slc.c

375

add_slc(func, flag, val);

libexec/telnetd/slc.c

414

(*(slctab[i].sptr) != slctab[i].current.val)) {

libexec/telnetd/slc.c

415

slctab[i].current.val = *(slctab[i].sptr);

libexec/telnetd/slc.c

421

slctab[i].current.val);

libexec/telnetd/slc.c

439

cc_t val;

libexec/telnetd/slc.c

448

val = (cc_t)*ptr++;

libexec/telnetd/slc.c

450

process_slc((u_int)func, (u_int)flag, val);

libexec/telnetd/slc.c

75

slctab[i].current.val);

libexec/telnetd/slc.c

91

slctab[i].current.val = slctab[i].defset.val;

libexec/telnetd/slc.c

92

if (slctab[i].current.val == (cc_t)(_POSIX_VDISABLE))

libexec/telnetd/slc.c

97

*(slctab[i].sptr) = slctab[i].defset.val;

libexec/telnetd/sys_term.c

405

tty_tspeed(int val)

libexec/telnetd/sys_term.c

407

cfsetospeed(&termbuf, val);

libexec/telnetd/sys_term.c

411

tty_rspeed(int val)

libexec/telnetd/sys_term.c

413

cfsetispeed(&termbuf, val);

libexec/telnetd/sys_term.c

678

addarg(char **argv, const char *val)

libexec/telnetd/sys_term.c

707

*cpp++ = __UNCONST(val);

libexec/tftpd/tftpd.c

448

blk_handler(struct tftphdr *tp, const char *val, char *ack, size_t asize,

libexec/tftpd/tftpd.c

460

bsize = strtoul(val, &endp, 10);

libexec/tftpd/tftpd.c

466

tp->th_stuff, val);

libexec/tftpd/tftpd.c

475

tp->th_stuff, val);

libexec/tftpd/tftpd.c

493

timeout_handler(struct tftphdr *tp, const char *val, char *ack, size_t asize,

libexec/tftpd/tftpd.c

501

tout = strtoul(val, &endp, 10);

libexec/tftpd/tftpd.c

507

tp->th_stuff, val);

libexec/tftpd/tftpd.c

516

tp->th_stuff, val);

libexec/tftpd/tftpd.c

542

tsize_handler(struct tftphdr *tp, const char *val, char *ack, size_t asize,

libexec/tftpd/tftpd.c

555

fsize = strtoul(val, &endp, 10);

libexec/tftpd/tftpd.c

561

tp->th_stuff, val);

libexec/tftpd/tftpd.c

570

tp->th_stuff, val);

regress/sys/kern/latency1/latency1.c

71

long val;

regress/sys/kern/latency1/latency1.c

80

val = (long)end.tv_sec * 1000000000 + (long)end.tv_nsec;

regress/sys/kern/latency1/latency1.c

81

printf("%ld\n", val);

regress/sys/kern/latency1/latency1.c

82

if (val > max)

regress/sys/kern/latency1/latency1.c

83

max = val;

regress/sys/kern/latency1/latency1.c

84

if (val < min)

regress/sys/kern/latency1/latency1.c

85

min = val;

regress/sys/kern/latency2/latency2.c

68

long val;

regress/sys/kern/latency2/latency2.c

79

val = (long)end.tv_sec * 1000000000 + (long)end.tv_nsec;

regress/sys/kern/latency2/latency2.c

80

printf("%ld\n", val);

regress/sys/kern/latency2/latency2.c

81

if (val > max)

regress/sys/kern/latency2/latency2.c

82

max = val;

regress/sys/kern/latency2/latency2.c

83

if (val < min)

regress/sys/kern/latency2/latency2.c

84

min = val;

regress/sys/kern/latency2/latency2.c

85

sum += val;

regress/sys/net/frag/ip4_frag_1.c

72

int s, val = 1;

regress/sys/net/frag/ip4_frag_1.c

78

if (setsockopt(s, IPPROTO_IP, IP_HDRINCL, &val, sizeof(val)) == -1) {

sbin/blkdiscard/blkdiscard.c

104

int64_t val;

sbin/blkdiscard/blkdiscard.c

115

if (dehumanize_number(optarg, &val) == -1 || val < 0)

sbin/blkdiscard/blkdiscard.c

117

length = val;

sbin/blkdiscard/blkdiscard.c

121

if (dehumanize_number(optarg, &val) == -1 || val < 0)

sbin/blkdiscard/blkdiscard.c

123

max_per_call = val;

sbin/blkdiscard/blkdiscard.c

127

if (dehumanize_number(optarg, &val) == -1 || val < 0)

sbin/blkdiscard/blkdiscard.c

129

first_byte = val;

sbin/brconfig/brconfig.c

498

u_long val;

sbin/brconfig/brconfig.c

501

val = strtoul(cp, &endptr, 0);

sbin/brconfig/brconfig.c

505

*valp = val;

sbin/brconfig/brconfig.c

717

u_long val;

sbin/brconfig/brconfig.c

719

if (get_val(argv[0], &val) < 0 || (val & ~0xffffffff) != 0)

sbin/brconfig/brconfig.c

722

param.ifbrp_csize = val & 0xffffffff;

sbin/brconfig/brconfig.c

733

u_long val;

sbin/brconfig/brconfig.c

735

if (get_val(argv[0], &val) < 0 || (val & ~0xff) != 0)

sbin/brconfig/brconfig.c

738

param.ifbrp_hellotime = val & 0xff;

sbin/brconfig/brconfig.c

749

u_long val;

sbin/brconfig/brconfig.c

751

if (get_val(argv[0], &val) < 0 || (val & ~0xff) != 0)

sbin/brconfig/brconfig.c

754

param.ifbrp_fwddelay = val & 0xff;

sbin/brconfig/brconfig.c

765

u_long val;

sbin/brconfig/brconfig.c

767

if (get_val(argv[0], &val) < 0 || (val & ~0xff) != 0)

sbin/brconfig/brconfig.c

770

param.ifbrp_maxage = val & 0xff;

sbin/brconfig/brconfig.c

781

u_long val;

sbin/brconfig/brconfig.c

783

if (get_val(argv[0], &val) < 0 || (val & ~0xffff) != 0)

sbin/brconfig/brconfig.c

786

param.ifbrp_prio = val & 0xffff;

sbin/brconfig/brconfig.c

797

u_long val;

sbin/brconfig/brconfig.c

801

if (get_val(argv[1], &val) < 0 || (val & ~0xff) != 0)

sbin/brconfig/brconfig.c

805

req.ifbr_priority = val & 0xff;

sbin/brconfig/brconfig.c

816

u_long val;

sbin/brconfig/brconfig.c

820

if (get_val(argv[1], &val) < 0 || (val & ~0xff) != 0)

sbin/brconfig/brconfig.c

824

req.ifbr_path_cost = val & 0xffff;

sbin/brconfig/brconfig.c

835

u_long val;

sbin/brconfig/brconfig.c

837

if (get_val(argv[0], &val) < 0 || (val & ~0xffffffff) != 0)

sbin/brconfig/brconfig.c

840

param.ifbrp_ctime = val & 0xffffffff;

sbin/canconfig/canconfig.c

414

u_long val;

sbin/canconfig/canconfig.c

417

val = strtoul(cp, &endptr, 0);

sbin/canconfig/canconfig.c

421

*valp = val;

sbin/canconfig/canconfig.c

490

u_long val;

sbin/canconfig/canconfig.c

492

if (get_val(argv[0], &val) < 0 || (val & ~0xffffffff) != 0)

sbin/canconfig/canconfig.c

494

if (val < g_cltc.cltc_brp_min || val > g_cltc.cltc_brp_max)

sbin/canconfig/canconfig.c

496

g_clt.clt_brp = val;

sbin/canconfig/canconfig.c

504

u_long val;

sbin/canconfig/canconfig.c

506

if (get_val(argv[0], &val) < 0 || (val & ~0xffffffff) != 0)

sbin/canconfig/canconfig.c

508

if (val < g_cltc.cltc_prop_min || val > g_cltc.cltc_prop_max)

sbin/canconfig/canconfig.c

510

g_clt.clt_prop = val;

sbin/canconfig/canconfig.c

518

u_long val;

sbin/canconfig/canconfig.c

520

if (get_val(argv[0], &val) < 0 || (val & ~0xffffffff) != 0)

sbin/canconfig/canconfig.c

522

if (val < g_cltc.cltc_ps1_min || val > g_cltc.cltc_ps1_max)

sbin/canconfig/canconfig.c

524

g_clt.clt_ps1 = val;

sbin/canconfig/canconfig.c

532

u_long val;

sbin/canconfig/canconfig.c

534

if (get_val(argv[0], &val) < 0 || (val & ~0xffffffff) != 0)

sbin/canconfig/canconfig.c

536

if (val < g_cltc.cltc_ps2_min || val > g_cltc.cltc_ps2_max)

sbin/canconfig/canconfig.c

538

g_clt.clt_ps2 = val;

sbin/canconfig/canconfig.c

546

u_long val;

sbin/canconfig/canconfig.c

548

if (get_val(argv[0], &val) < 0 || (val & ~0xffffffff) != 0)

sbin/canconfig/canconfig.c

550

if (val > g_cltc.cltc_sjw_max)

sbin/canconfig/canconfig.c

552

g_clt.clt_sjw = val;

sbin/ccdconfig/ccdconfig.c

825

int i, tmp, val = ~CCDF_USERMASK;

sbin/ccdconfig/ccdconfig.c

851

val = tmp;

sbin/ccdconfig/ccdconfig.c

862

val = (int)strtoi(flags, &cp, 0, 0, MAX_FLAG, &tmp);

sbin/ccdconfig/ccdconfig.c

866

return (((val & ~CCDF_USERMASK) == 0) ? val : -1);

sbin/cgdconfig/params.c

903

print_kvpair_cstr(FILE *f, int ts, const char *key, const char *val)

sbin/cgdconfig/params.c

907

(void)fprintf(f, "%s %s;\n", key, val);

sbin/cgdconfig/params.c

911

print_kvpair_string(FILE *f, int ts, const char *key, const string_t *val)

sbin/cgdconfig/params.c

914

print_kvpair_cstr(f, ts, key, string_tocharstar(val));

sbin/cgdconfig/params.c

918

print_kvpair_int(FILE *f, int ts, const char *key, size_t val)

sbin/cgdconfig/params.c

922

if (!key || val == (size_t)-1)

sbin/cgdconfig/params.c

925

if (asprintf(&tmp, "%zu", val) == -1)

sbin/cgdconfig/params.c

938

print_kvpair_b64(FILE *f, int curpos, int ts, const char *key, bits_t *val)

sbin/cgdconfig/params.c

946

if (!key || !val)

sbin/cgdconfig/params.c

949

str = bits_encode(val);

sbin/chown/chown.c

293

id_t val;

sbin/chown/chown.c

299

val = (id_t)strtoul(name, &ep, 10);

sbin/chown/chown.c

304

return (val);

sbin/disklabel/main.c

434

const char *val;

sbin/disklabel/main.c

436

if ((val = getenv("DISKLABELSECTOR")) == NULL)

sbin/disklabel/main.c

438

if ((nval = strtoul(val, &end, 10)) == ULONG_MAX && errno == ERANGE)

sbin/disklabel/main.c

448

const char *val;

sbin/disklabel/main.c

450

if ((val = getenv("DISKLABELOFFSET")) == NULL)

sbin/disklabel/main.c

452

if ((nval = strtoul(val, &end, 10)) == ULONG_MAX && errno == ERANGE)

sbin/disklabel/main.c

485

unsigned long val;

sbin/disklabel/main.c

562

val = strtoul(optarg, NULL, 10);

sbin/disklabel/main.c

563

if ((val == ULONG_MAX && errno == ERANGE) || val > UINT_MAX)

sbin/disklabel/main.c

565

labelsector = val;

sbin/disklabel/main.c

568

val = strtoul(optarg, NULL, 10);

sbin/disklabel/main.c

569

if ((val == ULONG_MAX && errno == ERANGE) || val > UINT_MAX)

sbin/disklabel/main.c

571

labeloffset = val;

sbin/disklabel/main.c

574

val = strtoul(optarg, NULL, 10);

sbin/disklabel/main.c

575

if ((val == ULONG_MAX && errno == ERANGE) || val < 1 || val > UINT_MAX)

sbin/disklabel/main.c

577

maxpartitions = val;

sbin/dump/dump.h

53

#define DIP_SET(dp, field, val) do { \

sbin/dump/dump.h

55

(dp)->dp2.di_##field = (val); \

sbin/dump/dump.h

57

(dp)->dp1.di_##field = (val); \

sbin/dump/main.c

736

long val;

sbin/dump/main.c

738

val = strtol(optarg, &p, 10);

sbin/dump/main.c

741

if (val < vmin || (vmax && val > vmax))

sbin/dump/main.c

744

return (val);

sbin/efi/devpath3.c

1201

uint16_t val;

sbin/efi/devpath3.c

1262

uint64_t val;

sbin/efi/devpath3.c

1279

p->NSID, p->EUI.val);

sbin/efi/devpath3.c

444

uint16_t val;

sbin/efi/main.c

301

uint32_t val;

sbin/efi/main.c

303

} byte_order = { .val = 0x01020304, };

sbin/efi/utils.c

375

uintmax_t val;

sbin/efi/utils.c

378

val = strtou(str, endptr, base, 0, USHRT_MAX, &rstatus);

sbin/efi/utils.c

397

return (uint16_t)val;

sbin/fdisk/fdisk.c

1003

val = *p;

sbin/fdisk/fdisk.c

1006

if (*p != val) {

sbin/fdisk/fdisk.c

1012

PBR_ERROR("All bytes are identical (0x%02x)\n", val);

sbin/fdisk/fdisk.c

974

unsigned char val;

sbin/fsck_ffs/fsck.h

132

#define IBLK_SET(bp, i, val) do { \

sbin/fsck_ffs/fsck.h

134

(bp)->b_un.b_indir2[i] = (val); \

sbin/fsck_ffs/fsck.h

136

(bp)->b_un.b_indir1[i] = (val); \

sbin/fsck_ffs/fsck.h

61

#define DIP_SET(dp, field, val) do { \

sbin/fsck_ffs/fsck.h

63

(dp)->dp2.di_##field = (val); \

sbin/fsck_ffs/fsck.h

65

(dp)->dp1.di_##field = (val); \

sbin/fsdb/fsdb.c

1036

char *p, *val;

sbin/fsdb/fsdb.c

1051

while ((val = strsep(&p, "/")) != NULL && *val == '\0');

sbin/fsdb/fsdb.c

1052

if (val) {

sbin/fsdb/fsdb.c

1053

printf("component `%s': ", val);

sbin/fsdb/fsdb.c

1055

if (!dolookup(val)) {

sbin/fsdb/fsdb.c

1611

char *p, *val;

sbin/fsdb/fsdb.c

1618

nsec = strtoul(++p, &val, 0);

sbin/fsdb/fsdb.c

1619

if (val == p || *val != '\0' || nsec >= 1000000000 || nsec < 0) {

sbin/fsdb/fsdbutil.c

63

char *p, *val;

sbin/fsdb/fsdbutil.c

65

while ((val = strsep(&p, " \t\n")) != NULL && *val == '\0')

sbin/fsdb/fsdbutil.c

67

if (val)

sbin/fsdb/fsdbutil.c

68

argv[i] = val;

sbin/gpt/show.c

307

uintmax_t val;

sbin/gpt/show.c

310

val = num % 1000;

sbin/gpt/show.c

312

val = num & 0x3FF;

sbin/gpt/show.c

314

if (u[1] == '\0' || val != 0) {

sbin/gpt/show.c

316

u[1] == '\0' ? num : val);

sbin/ifconfig/af_inet6.c

111

prefix(void *val, int size)

sbin/ifconfig/af_inet6.c

113

u_char *pname = (u_char *)val;

sbin/ifconfig/af_inet6.c

183

setia6lifetime(prop_dictionary_t env, int64_t val, time_t *timep,

sbin/ifconfig/af_inet6.c

195

*timep = t + val;

sbin/ifconfig/af_inet6.c

196

*ivalp = val;

sbin/ifconfig/ieee80211.c

195

set80211(prop_dictionary_t env, uint16_t type, int16_t val, int16_t len,

sbin/ifconfig/ieee80211.c

202

ireq.i_val = val;

sbin/ifconfig/ieee80211.c

305

int16_t val;

sbin/ifconfig/ieee80211.c

307

rc = prop_dictionary_get_int16(env, "rts", &val);

sbin/ifconfig/ieee80211.c

309

if (set80211(env, IEEE80211_IOC_RTSTHRESHOLD, val, 0, NULL) == -1)

sbin/ifconfig/ieee80211.c

318

int16_t val;

sbin/ifconfig/ieee80211.c

320

rc = prop_dictionary_get_int16(env, "frag", &val);

sbin/ifconfig/ieee80211.c

322

if (set80211(env, IEEE80211_IOC_FRAGTHRESHOLD, val, 0, NULL) == -1)

sbin/ifconfig/ieee80211.c

343

const char *val;

sbin/ifconfig/ieee80211.c

352

val = buf;

sbin/ifconfig/ieee80211.c

360

if (strcasecmp("persist", val) == 0) {

sbin/ifconfig/ieee80211.c

366

} else if (strncasecmp("persist:", val, 8) == 0) {

sbin/ifconfig/ieee80211.c

367

val += 8;

sbin/ifconfig/ieee80211.c

373

if (isdigit((unsigned char)val[0]) && val[1] == ':') {

sbin/ifconfig/ieee80211.c

375

nwkey.i_defkid = val[0] - '0';

sbin/ifconfig/ieee80211.c

376

val += 2;

sbin/ifconfig/ieee80211.c

378

val = get_string(val, ",", keybuf[i],

sbin/ifconfig/ieee80211.c

380

if (val == NULL) {

sbin/ifconfig/ieee80211.c

385

if (*val != '\0') {

sbin/ifconfig/ieee80211.c

389

val = get_string(val, NULL, keybuf[0],

sbin/ifconfig/ieee80211.c

391

if (val == NULL) {

sbin/ifconfig/media.c

100

media_error(int type, const char *val, const char *opt)

sbin/ifconfig/media.c

103

get_media_type_string(type), opt, val);

sbin/ifconfig/media.c

176

char *val;

sbin/ifconfig/media.c

195

val = strndup(prop_data_value(data), prop_data_size(data));

sbin/ifconfig/media.c

196

if (val == NULL)

sbin/ifconfig/media.c

200

subtype = get_media_subtype(type, val);

sbin/ifconfig/media.c

202

media_error(type, val, "subtype");

sbin/ifconfig/media.c

216

char *val;

sbin/ifconfig/media.c

226

val = strndup(prop_data_value(data), prop_data_size(data));

sbin/ifconfig/media.c

227

if (val == NULL)

sbin/ifconfig/media.c

230

mediaopt_set = get_media_options(media_current, val, &invalid);

sbin/ifconfig/media.c

231

free(val);

sbin/ifconfig/media.c

242

char *invalid, *val;

sbin/ifconfig/media.c

253

val = strndup(prop_data_value(data), prop_data_size(data));

sbin/ifconfig/media.c

254

if (val == NULL)

sbin/ifconfig/media.c

262

mediaopt_clear = get_media_options(media_current, val, &invalid);

sbin/ifconfig/media.c

263

free(val);

sbin/ifconfig/media.c

301

char *val;

sbin/ifconfig/media.c

313

val = strndup(prop_data_value(data), prop_data_size(data));

sbin/ifconfig/media.c

314

if (val == NULL)

sbin/ifconfig/media.c

317

mode = get_media_mode(type, val);

sbin/ifconfig/media.c

319

media_error(type, val, "mode");

sbin/ifconfig/media.c

321

free(val);

sbin/ifconfig/parse.c

190

int64_t val;

sbin/ifconfig/parse.c

197

val = strtoimax(arg, &end, pi->pi_base);

sbin/ifconfig/parse.c

198

if ((val == INTMAX_MIN || val == INTMAX_MAX) && errno == ERANGE)

sbin/ifconfig/parse.c

206

if (val < pi->pi_min || val > pi->pi_max) {

sbin/ifconfig/parse.c

211

o = (prop_object_t)prop_number_create_signed(val);

sbin/ifconfig/parse.c

239

uint8_t octet = 0, val;

sbin/ifconfig/parse.c

274

val = 10 + *p - 'a';

sbin/ifconfig/parse.c

276

val = 10 + *p - 'A';

sbin/ifconfig/parse.c

278

val = *p - '0';

sbin/ifconfig/parse.c

286

octet |= val;

sbin/ifconfig/parse.c

291

octet = val;

sbin/ifconfig/util.c

102

if (!isxdigit((u_char)val[0]) ||

sbin/ifconfig/util.c

103

!isxdigit((u_char)val[1])) {

sbin/ifconfig/util.c

117

*p++ = (tohex((u_char)val[0]) << 4) |

sbin/ifconfig/util.c

118

tohex((u_char)val[1]);

sbin/ifconfig/util.c

120

val += 2;

sbin/ifconfig/util.c

122

*p++ = *val++;

sbin/ifconfig/util.c

128

return val;

sbin/ifconfig/util.c

82

get_string(const char *val, const char *sep, u_int8_t *buf, int *lenp,

sbin/ifconfig/util.c

91

hexstr = hexok && val[0] == '0' && tolower((u_char)val[1]) == 'x';

sbin/ifconfig/util.c

93

val += 2;

sbin/ifconfig/util.c

95

if (*val == '\0')

sbin/ifconfig/util.c

97

if (sep != NULL && strchr(sep, *val) != NULL) {

sbin/ifconfig/util.c

98

val++;

sbin/iscsictl/iscsic_parse.c

130

int val;

sbin/iscsictl/iscsic_parse.c

135

if (!sscanf(sp, "%d", &val))

sbin/iscsictl/iscsic_parse.c

137

if (val < 0 || val > 0xffff)

sbin/iscsictl/iscsic_parse.c

140

return (uint16_t) val;

sbin/iscsictl/iscsic_parse.c

158

int val;

sbin/iscsictl/iscsic_parse.c

162

if (!sscanf(sp, "%d", &val))

sbin/iscsictl/iscsic_parse.c

164

if (val < 512 || val > 0xffffff)

sbin/iscsictl/iscsic_parse.c

167

return (uint32_t) val;

sbin/iscsictl/iscsic_parse.c

52

int val;

sbin/iscsictl/iscsic_parse.c

60

if (sscanf(sp + 1, "%d", &val) != 1)

sbin/iscsictl/iscsic_parse.c

62

if (val < 0 || val > 0xffff)

sbin/iscsictl/iscsic_parse.c

64

portal->group_tag = (uint16_t) val;

sbin/iscsictl/iscsic_parse.c

806

int val = 0;

sbin/iscsictl/iscsic_parse.c

820

if (!sscanf(sp, "%i", &val))

sbin/iscsictl/iscsic_parse.c

831

return val;

sbin/iscsictl/iscsic_parse.c

85

if (sscanf(sp + 1, "%d", &val) != 1)

sbin/iscsictl/iscsic_parse.c

853

int val = -1;

sbin/iscsictl/iscsic_parse.c

867

if (!sscanf(sp, "%i", &val))

sbin/iscsictl/iscsic_parse.c

87

if (val < 0 || val > 0xffff)

sbin/iscsictl/iscsic_parse.c

878

return val;

sbin/iscsictl/iscsic_parse.c

89

portal->port = (uint16_t) val;

sbin/iscsictl/iscsic_parse.c

900

uint64_t val = 0;

sbin/iscsictl/iscsic_parse.c

914

if (!sscanf(sp, "%qi", (long long *)(void *)&val))

sbin/iscsictl/iscsic_parse.c

925

return val;

sbin/iscsid/iscsid_targets.c

743

int val;

sbin/iscsid/iscsid_targets.c

746

for (sp = str + 1, val = 0; *sp && (*sp != ':' || val); sp++) {

sbin/iscsid/iscsid_targets.c

748

val = 1;

sbin/iscsid/iscsid_targets.c

750

val = 0;

sbin/iscsid/iscsid_targets.c

761

if (sscanf(sp, "%d", &val) != 1)

sbin/iscsid/iscsid_targets.c

763

if (val < 0 || val > 0xffff)

sbin/iscsid/iscsid_targets.c

765

portal->port = (uint16_t) val;

sbin/iscsid/iscsid_targets.c

776

if (sscanf(sp + 1, "%d", &val) != 1)

sbin/iscsid/iscsid_targets.c

778

if (val < 0 || val > 0xffff)

sbin/iscsid/iscsid_targets.c

780

portal->group_tag = (uint16_t) val;

sbin/mount_portal/conf.c

162

char *val;

sbin/mount_portal/conf.c

169

while ((val = strsep(&s, " \t\n")) != NULL && *val == '\0')

sbin/mount_portal/conf.c

171

if (val)

sbin/mount_portal/conf.c

189

char *val;

sbin/mount_portal/conf.c

191

while ((val = strsep(&s, " \t\n")) != NULL && *val == '\0')

sbin/mount_portal/conf.c

193

if (val) {

sbin/mount_portal/conf.c

194

*ap++ = val;

sbin/newfs/mkfs.c

1578

ilog2(int val)

sbin/newfs/mkfs.c

1583

if (1 << n == val)

sbin/newfs/mkfs.c

1585

errx(1, "ilog2: %d is not a power of 2", val);

sbin/newfs_ext2fs/mke2fs.c

1422

ilog2(uint val)

sbin/newfs_ext2fs/mke2fs.c

1425

if (val == 0 || !powerof2(val))

sbin/newfs_ext2fs/mke2fs.c

1427

__func__, val);

sbin/newfs_ext2fs/mke2fs.c

1429

return ffs(val) - 1;

sbin/newfs_msdos/mkfs_msdos.c

951

ckgeom(const char *fname, u_int val, const char *msg)

sbin/newfs_msdos/mkfs_msdos.c

953

if (!val) {

sbin/newfs_msdos/mkfs_msdos.c

957

if (val > MAXU16) {

sbin/newfs_udf/udf_core.h

104

#define UDF_ROUNDUP(val, gran) \

sbin/newfs_udf/udf_core.h

105

((uint64_t) (gran) * (((uint64_t)(val) + (gran)-1) / (gran)))

sbin/newfs_udf/udf_core.h

107

#define UDF_ROUNDDOWN(val, gran) \

sbin/newfs_udf/udf_core.h

108

((uint64_t) (gran) * (((uint64_t)(val)) / (gran)))

sbin/newfs_v7fs/main.c

162

uint32_t (*val32)(uint32_t) = fs->val.conv32;

sbin/newfs_v7fs/main.c

163

uint16_t (*val16)(uint16_t) = fs->val.conv16;

sbin/nvmectl/logpage.c

807

uint64_t val;

sbin/nvmectl/logpage.c

810

val = le64dec(walker);

sbin/nvmectl/logpage.c

812

printf(" %-30s: %ju\n", "Host Read Commands", val);

sbin/nvmectl/logpage.c

813

val = le64dec(walker);

sbin/nvmectl/logpage.c

815

printf(" %-30s: %ju\n", "Host Read Blocks", val);

sbin/nvmectl/logpage.c

816

val = le64dec(walker);

sbin/nvmectl/logpage.c

818

printf(" %-30s: %ju\n", "Host Cache Read Hits Commands", val);

sbin/nvmectl/logpage.c

819

val = le64dec(walker);

sbin/nvmectl/logpage.c

821

printf(" %-30s: %ju\n", "Host Cache Read Hits Blocks", val);

sbin/nvmectl/logpage.c

822

val = le64dec(walker);

sbin/nvmectl/logpage.c

824

printf(" %-30s: %ju\n", "Host Read Commands Stalled", val);

sbin/nvmectl/logpage.c

825

val = le64dec(walker);

sbin/nvmectl/logpage.c

827

printf(" %-30s: %ju\n", "Host Write Commands", val);

sbin/nvmectl/logpage.c

828

val = le64dec(walker);

sbin/nvmectl/logpage.c

830

printf(" %-30s: %ju\n", "Host Write Blocks", val);

sbin/nvmectl/logpage.c

831

val = le64dec(walker);

sbin/nvmectl/logpage.c

833

printf(" %-30s: %ju\n", "Host Write Odd Start Commands", val);

sbin/nvmectl/logpage.c

834

val = le64dec(walker);

sbin/nvmectl/logpage.c

836

printf(" %-30s: %ju\n", "Host Write Odd End Commands", val);

sbin/nvmectl/logpage.c

837

val = le64dec(walker);

sbin/nvmectl/logpage.c

839

printf(" %-30s: %ju\n", "Host Write Commands Stalled", val);

sbin/nvmectl/logpage.c

840

val = le64dec(walker);

sbin/nvmectl/logpage.c

842

printf(" %-30s: %ju\n", "NAND Read Commands", val);

sbin/nvmectl/logpage.c

843

val = le64dec(walker);

sbin/nvmectl/logpage.c

845

printf(" %-30s: %ju\n", "NAND Read Blocks", val);

sbin/nvmectl/logpage.c

846

val = le64dec(walker);

sbin/nvmectl/logpage.c

848

printf(" %-30s: %ju\n", "NAND Write Commands", val);

sbin/nvmectl/logpage.c

849

val = le64dec(walker);

sbin/nvmectl/logpage.c

851

printf(" %-30s: %ju\n", "NAND Write Blocks", val);

sbin/nvmectl/logpage.c

852

val = le64dec(walker);

sbin/nvmectl/logpage.c

854

printf(" %-30s: %ju\n", "NAND Read Before Writes", val);

sbin/raidctl/rf_configure.c

144

int numscanned, val, c, retcode, aa, bb, cc;

sbin/raidctl/rf_configure.c

224

if (sscanf(buf, "%64s %d", buf1, &val) != 2 || strlen(buf1) >= 60) {

sbin/raidctl/rf_configure.c

246

cfgPtr->maxOutstandingDiskReqs = val;

sbin/raidctl/rf_configure.c

247

if (cfgPtr->maxOutstandingDiskReqs != val) {

sbin/raidctl/rf_configure.c

250

buf1, val, cfgPtr->maxOutstandingDiskReqs);

sbin/raidctl/rf_configure.c

372

int b, v, k, r, lambda, norotate, i, val, distSpare;

sbin/raidctl/rf_configure.c

472

while (fscanf(fp, "%d", &val) == 1)

sbin/raidctl/rf_configure.c

473

*p++ = (char) val;

sbin/rcorder/hash.h

138

#define Hash_SetValue(h, val) ((h)->clientData = (void *) (val))

sbin/restore/dirs.c

73

#define INOHASH(val) (val % HASHSIZE)

sbin/route/route.c

788

u_int32_t val;

sbin/route/route.c

901

val = atoi (s);

sbin/route/route.c

902

if (val > 65535)

sbin/route/route.c

904

su->sat.sat_addr.s_net = val;

sbin/route/route.c

905

val = atoi (t);

sbin/route/route.c

906

if (val > 256)

sbin/route/route.c

908

su->sat.sat_addr.s_node = val;

sbin/route/route.c

938

if ((val = inet_addr(s)) != INADDR_NONE) {

sbin/route/route.c

939

inet_makenetandmask(htonl(val), &su->sin, soup);

sbin/route/route.c

943

if ((val = inet_network(s)) != INADDR_NONE) {

sbin/route/route.c

944

inet_makenetandmask(val, &su->sin, soup);

sbin/route/route.c

952

val = su->sin.sin_addr.s_addr;

sbin/route/route.c

956

val = ntohl(val);

sbin/route/route.c

960

if ((val = inet_network(s)) != INADDR_NONE ||

sbin/route/route.c

961

((np = getnetbyname(s)) != NULL && (val = np->n_net) != 0)) {

sbin/route/route.c

964

inet_makenetandmask(val, &su->sin, soup);

sbin/routed/parms.c

491

char *val,

sbin/routed/parms.c

516

val0 = val;

sbin/routed/parms.c

517

if (0 > parse_quote(&val, "| ,\n\r", &delim,

sbin/routed/parms.c

525

val0 = ++val;

sbin/routed/parms.c

527

if (0 > parse_quote(&val, "| ,\n\r", &delim, buf,sizeof(buf))

sbin/routed/parms.c

544

val0 = ++val;

sbin/routed/parms.c

545

if (0 != (p = parse_ts(&k.start, &val, val0, &delim,

sbin/routed/parms.c

550

val0 = ++val;

sbin/routed/parms.c

551

if (0 != (p = parse_ts(&k.end, &val, val0, &delim,

sbin/routed/parms.c

594

char delim, *val0 = 0, *tgt, *val, *p;

sbin/routed/parms.c

602

&& *(val = &line[sizeof("subnet=")-1]) != '\0') {

sbin/routed/parms.c

603

if (0 > parse_quote(&val, ",", &delim, buf, sizeof(buf)))

sbin/routed/parms.c

609

intnetp->intnet_metric = (int)strtol(val+1,&p,0);

sbin/routed/parms.c

634

&& *(val = &line[sizeof("ripv1_mask=")-1]) != '\0') {

sbin/routed/parms.c

635

if (0 > parse_quote(&val, ",", &delim, buf, sizeof(buf))

sbin/routed/parms.c

638

if ((i = (int)strtol(val+1, &p, 0)) <= 0

sbin/wsconsctl/util.c

249

int2name(int val, int uflag, struct nameint *tab, int len)

sbin/wsconsctl/util.c

255

if (tab[i].value == val)

sbin/wsconsctl/util.c

259

(void)snprintf(tmp, sizeof(tmp), "unknown_%d", val);

sbin/wsconsctl/util.c

266

name2int(char *val, struct nameint *tab, int len)

sbin/wsconsctl/util.c

271

if (strcmp(tab[i].name, val) == 0)

sbin/wsconsctl/util.c

392

rd_field(struct field *f, char *val, int merge)

sbin/wsconsctl/util.c

401

if (sscanf(val, "%u", &u) != 1)

sbin/wsconsctl/util.c

402

errx(EXIT_FAILURE, "%s: not a number", val);

sbin/wsconsctl/util.c

409

if (sscanf(val, "%d", &i) != 1)

sbin/wsconsctl/util.c

410

errx(EXIT_FAILURE, "%s: not a number", val);

sbin/wsconsctl/util.c

417

if ((*((char **) f->valp) = strdup(val)) == NULL)

sbin/wsconsctl/util.c

421

*((unsigned int *) f->valp) = rd_bitfield(val);

sbin/wsconsctl/util.c

424

p = strchr(val, '.');

sbin/wsconsctl/util.c

428

i = name2int(val, kbdenc_tab, TABLEN(kbdenc_tab));

sbin/wsconsctl/util.c

430

errx(EXIT_FAILURE, "%s: not a valid encoding", val);

sbin/wsconsctl/util.c

434

val = p;

sbin/wsconsctl/util.c

438

i = name2int(val, kbdvar_tab, TABLEN(kbdvar_tab));

sbin/wsconsctl/util.c

441

val);

sbin/wsconsctl/util.c

448

map_scan_setinput(val);

sbin/wsconsctl/util.c

468

i = name2int(val, color_tab, TABLEN(color_tab));

sbin/wsconsctl/util.c

470

errx(EXIT_FAILURE, "%s: not a valid color", val);

sbin/wsconsctl/util.c

474

p = val;

sbin/wsconsctl/util.c

476

val = p;

sbin/wsconsctl/util.c

480

i = name2int(val, attr_tab, TABLEN(attr_tab));

sbin/wsconsctl/util.c

483

val);

share/examples/puffs/pgfs/pgfs_db.c

102

fprintf(stderr, "%s: %s\n", fields[i].name, val);

share/examples/puffs/pgfs/pgfs_db.c

97

const char *val = PQresultErrorField(res, fields[i].code);

share/examples/puffs/pgfs/pgfs_db.c

99

if (val == NULL) {

share/examples/refuse/ian/libfetch/http.c

722

int val;

share/examples/refuse/ian/libfetch/http.c

724

val = 1;

share/examples/refuse/ian/libfetch/http.c

725

setsockopt(conn->sd, IPPROTO_TCP, TCP_NOPUSH, &val, sizeof(val));

share/examples/refuse/ian/libfetch/http.c

809

int e, i, n, val;

share/examples/refuse/ian/libfetch/http.c

938

val = 0;

share/examples/refuse/ian/libfetch/http.c

940

setsockopt(conn->sd, IPPROTO_TCP, TCP_NOPUSH, &val,

share/examples/refuse/ian/libfetch/http.c

941

sizeof(val));

share/examples/refuse/ian/libfetch/http.c

943

val = 1;

share/examples/refuse/ian/libfetch/http.c

944

setsockopt(conn->sd, IPPROTO_TCP, TCP_NODELAY, &val,

share/examples/refuse/ian/libfetch/http.c

945

sizeof(val));

share/examples/refuse/id3fs/id3fs.c

162

char *val;

share/examples/refuse/id3fs/id3fs.c

187

val = (char *) v.data;

share/examples/refuse/id3fs/id3fs.c

193

(void) snprintf(name, sizeof(name), "%s/%s/%s", d, val, slash);

share/examples/rump/sdread/sdread.c

63

int fd, val = 0, rounds = 0;

share/examples/rump/sdread/sdread.c

79

if (rump_sys_ioctl(fd, DIOCTUR, &val) == -1)

share/examples/rump/sdread/sdread.c

82

} while (val == 0 || rounds >= 30);

share/examples/rump/sdread/sdread.c

84

if (!val)

sys/altq/altq_red.c

1310

int val, f;

sys/altq/altq_red.c

1314

else if ((val = (p & BRTT_MASK)))

sys/altq/altq_red.c

1315

f = fv->fv_p2ftab[(val >> BRTT_SHIFT)];

sys/altq/altq_red.c

702

int32_t val;

sys/altq/altq_red.c

707

val = 1 << FP_SHIFT;

sys/altq/altq_red.c

709

return val;

sys/altq/altq_red.c

715

val = (val * w->w_tab[i]) >> FP_SHIFT;

sys/altq/altq_red.c

721

return val;

sys/altq/altq_subr.c

770

u_int64_t val;

sys/altq/altq_subr.c

773

val = (((u_int64_t)bt.sec << 32) + (bt.frac >> 32)) >> BINTIME_SHIFT;

sys/altq/altq_subr.c

774

return val;

sys/altq/altq_wfq.c

317

u_long val = 0;

sys/altq/altq_wfq.c

324

val = fp->fi_dst.s_addr ^ fp->fi_src.s_addr;

sys/altq/altq_wfq.c

325

val = val ^ (val >> 8) ^ (val >> 16) ^ (val >> 24);

sys/altq/altq_wfq.c

328

val = val ^ val2;

sys/altq/altq_wfq.c

334

val = ntohl(fp6->fi6_flowlabel);

sys/altq/altq_wfq.c

339

return (val % n);

sys/altq/altq_wfq.c

345

u_long val = 0;

sys/altq/altq_wfq.c

351

val = fp->fi_dst.s_addr;

sys/altq/altq_wfq.c

352

val = val ^ (val >> 8) ^ (val >> 16) ^ (val >> 24);

sys/altq/altq_wfq.c

358

val = ntohl(fp6->fi6_flowlabel);

sys/altq/altq_wfq.c

363

return (val % n);

sys/altq/altq_wfq.c

369

u_long val = 0;

sys/altq/altq_wfq.c

375

val = fp->fi_src.s_addr;

sys/altq/altq_wfq.c

376

val = val ^ (val >> 8) ^ (val >> 16) ^ (val >> 24);

sys/altq/altq_wfq.c

382

val = ntohl(fp6->fi6_flowlabel);

sys/altq/altq_wfq.c

387

return (val % n);

sys/altq/altq_wfq.c

393

u_long val = 0;

sys/altq/altq_wfq.c

399

val = fp->fi_sport;

sys/altq/altq_wfq.c

405

val = fp6->fi6_sport;

sys/altq/altq_wfq.c

409

val = val ^ (val >> 8);

sys/altq/altq_wfq.c

411

return (val % n);

sys/arch/aarch64/aarch64/aarch64_machdep.c

475

int error, cur, val;

sys/arch/aarch64/aarch64/aarch64_machdep.c

479

cur = val = (tcr & TCR_TBI0) ? 1 : 0;

sys/arch/aarch64/aarch64/aarch64_machdep.c

482

node.sysctl_data = &val;

sys/arch/aarch64/aarch64/aarch64_machdep.c

486

if (val < 0 || val > 1)

sys/arch/aarch64/aarch64/aarch64_machdep.c

489

if (cur != val) {

sys/arch/aarch64/aarch64/aarch64_machdep.c

491

UINT64TOPTR(val), NULL);

sys/arch/aarch64/aarch64/kobj_machdep.c

123

Elf_Addr saddr, addend, raddr, val;

sys/arch/aarch64/aarch64/kobj_machdep.c

249

val = saddr + addend;

sys/arch/aarch64/aarch64/kobj_machdep.c

250

if (checkalign(val, 1 << shift, where, off)) {

sys/arch/aarch64/aarch64/kobj_machdep.c

254

val &= WIDTHMASK(12);

sys/arch/aarch64/aarch64/kobj_machdep.c

255

val >>= shift;

sys/arch/aarch64/aarch64/kobj_machdep.c

257

(le32toh(*insn) & ~__BITS(21,10)) | (val << 10));

sys/arch/aarch64/aarch64/kobj_machdep.c

268

val = saddr + addend;

sys/arch/aarch64/aarch64/kobj_machdep.c

269

val = val >> 12;

sys/arch/aarch64/aarch64/kobj_machdep.c

270

raddr = val << 12;

sys/arch/aarch64/aarch64/kobj_machdep.c

271

val -= (uintptr_t)where >> 12;

sys/arch/aarch64/aarch64/kobj_machdep.c

272

if (!nc && checkoverflow(val, 21, raddr, " x 4k", where, off)) {

sys/arch/aarch64/aarch64/kobj_machdep.c

276

immlo = val & WIDTHMASK(2);

sys/arch/aarch64/aarch64/kobj_machdep.c

277

immhi = (val >> 2) & WIDTHMASK(19);

sys/arch/aarch64/aarch64/kobj_machdep.c

291

val = raddr - (uintptr_t)where;

sys/arch/aarch64/aarch64/kobj_machdep.c

292

if (checkalign(val, 4, where, off)) {

sys/arch/aarch64/aarch64/kobj_machdep.c

296

val = (intptr_t)val >> 2;

sys/arch/aarch64/aarch64/kobj_machdep.c

297

if (checkoverflow(val, 26, raddr, " word", where, off)) {

sys/arch/aarch64/aarch64/kobj_machdep.c

301

val &= WIDTHMASK(26);

sys/arch/aarch64/aarch64/kobj_machdep.c

302

*insn = htole32((le32toh(*insn) & ~__BITS(25,0)) | val);

sys/arch/aarch64/aarch64/kobj_machdep.c

311

val = raddr - (uintptr_t)where;

sys/arch/aarch64/aarch64/kobj_machdep.c

312

if (checkoverflow(val, 64, raddr, "", where, off)) {

sys/arch/aarch64/aarch64/kobj_machdep.c

316

*where = val;

sys/arch/aarch64/aarch64/kobj_machdep.c

324

val = raddr - (uintptr_t)where;

sys/arch/aarch64/aarch64/kobj_machdep.c

325

if (checkoverflow(val, 32, raddr, "", where, off)) {

sys/arch/aarch64/aarch64/kobj_machdep.c

329

*where32 = val;

sys/arch/aarch64/aarch64/kobj_machdep.c

337

val = raddr - (uintptr_t)where;

sys/arch/aarch64/aarch64/kobj_machdep.c

338

if (checkoverflow(val, 16, raddr, "", where, off)) {

sys/arch/aarch64/aarch64/kobj_machdep.c

342

*where16 = val;

sys/arch/aarch64/aarch64/pmap.c

2767

int val;

sys/arch/aarch64/aarch64/pmap.c

2821

val = *loc;

sys/arch/aarch64/aarch64/pmap.c

2829

val,

sys/arch/aarch64/aarch64/pmap.c

2853

val = *loc;

sys/arch/aarch64/aarch64/pmap.c

2861

val,

sys/arch/aarch64/aarch64/procfs_machdep.c

79

#define SO_EQ(reg, mask, val) (__SHIFTOUT((reg), (mask)) == (val))

sys/arch/aarch64/aarch64/trap.c

682

uint32_t val;

sys/arch/aarch64/aarch64/trap.c

690

val = tf->tf_reg[Rm];

sys/arch/aarch64/aarch64/trap.c

704

val = atomic_swap_8((uint8_t *)vaddr, val);

sys/arch/aarch64/aarch64/trap.c

707

val = atomic_swap_32((uint32_t *)vaddr, val);

sys/arch/aarch64/aarch64/trap.c

710

tf->tf_reg[Rd] = val;

sys/arch/aarch64/aarch64/trap.c

954

cpu_jump_onfault(struct trapframe *tf, const struct faultbuf *fb, int val)

sys/arch/aarch64/aarch64/trap.c

969

tf->tf_reg[0] = val;

sys/arch/aarch64/include/armreg.h

1765

gtmr_cntk_ctl_write(uint32_t val)

sys/arch/aarch64/include/armreg.h

1768

reg_cntkctl_el1_write(val);

sys/arch/aarch64/include/armreg.h

1799

gtmr_cntv_ctl_write(uint64_t val)

sys/arch/aarch64/include/armreg.h

1802

reg_cntv_ctl_el0_write(val);

sys/arch/aarch64/include/armreg.h

1816

gtmr_cntp_ctl_write(uint32_t val)

sys/arch/aarch64/include/armreg.h

1819

reg_cntp_ctl_el0_write(val);

sys/arch/aarch64/include/armreg.h

1833

gtmr_cntp_tval_write(uint32_t val)

sys/arch/aarch64/include/armreg.h

1836

reg_cntp_tval_el0_write(val);

sys/arch/aarch64/include/armreg.h

1850

gtmr_cntv_tval_write(uint32_t val)

sys/arch/aarch64/include/armreg.h

1853

reg_cntv_tval_el0_write(val);

sys/arch/aarch64/include/armreg.h

1867

gtmr_cntp_cval_write(uint64_t val)

sys/arch/aarch64/include/armreg.h

1870

reg_cntp_cval_el0_write(val);

sys/arch/aarch64/include/armreg.h

1884

gtmr_cntv_cval_write(uint64_t val)

sys/arch/aarch64/include/armreg.h

1887

reg_cntv_cval_el0_write(val);

sys/arch/acorn32/acorn32/rpc_machdep.c

1119

uint8_t val;

sys/arch/acorn32/acorn32/rpc_machdep.c

1122

location, &val, 1) != 0)

sys/arch/acorn32/acorn32/rpc_machdep.c

1124

return (val);

sys/arch/acorn32/acorn32/rpc_machdep.c

1131

uint8_t val = value;

sys/arch/acorn32/acorn32/rpc_machdep.c

1141

location, &val, 1) != 0)

sys/arch/acorn32/acorn32/rpc_machdep.c

1145

val = (uint8_t)oldsum - (uint8_t)oldvalue + val;

sys/arch/acorn32/acorn32/rpc_machdep.c

1147

RTC_ADDR_CHECKSUM, &val, 1));

sys/arch/acorn32/podulebus/podulebus.c

585

podloader_writebyte(struct podulebus_attach_args *pa, u_int addr, int val)

sys/arch/acorn32/podulebus/sbic.c

611

u_char val;

sys/arch/acorn32/podulebus/sbic.c

618

GET_SBIC_asr(regs,val);

sys/arch/acorn32/podulebus/sbic.c

619

while ((val & until) == 0) {

sys/arch/acorn32/podulebus/sbic.c

623

line, val, csr);

sys/arch/acorn32/podulebus/sbic.c

627

return val; /* Maybe I should abort */

sys/arch/acorn32/podulebus/sbic.c

631

GET_SBIC_asr(regs,val);

sys/arch/acorn32/podulebus/sbic.c

634

return val;

sys/arch/acorn32/podulebus/sbicreg.h

132

#define SBIC_TIMEOUT(val,clk) ((((val) * (clk)) / 800) + 1)

sys/arch/acorn32/podulebus/sbicreg.h

316

#define sbic_read_reg(regs,regno,val) do { \

sys/arch/acorn32/podulebus/sbicreg.h

321

(val) = bus_space_read_1((regs)->sc_sbiciot, (regs)->sc_sbicioh, \

sys/arch/acorn32/podulebus/sbicreg.h

327

#define sbic_write_reg(regs,regno,val) do { \

sys/arch/acorn32/podulebus/sbicreg.h

333

(val)); \

sys/arch/acorn32/podulebus/sbicreg.h

338

#define SET_SBIC_myid(regs,val) sbic_write_reg(regs,SBIC_myid,val)

sys/arch/acorn32/podulebus/sbicreg.h

339

#define GET_SBIC_myid(regs,val) sbic_read_reg(regs,SBIC_myid,val)

sys/arch/acorn32/podulebus/sbicreg.h

340

#define SET_SBIC_cdbsize(regs,val) sbic_write_reg(regs,SBIC_cdbsize,val)

sys/arch/acorn32/podulebus/sbicreg.h

341

#define GET_SBIC_cdbsize(regs,val) sbic_read_reg(regs,SBIC_cdbsize,val)

sys/arch/acorn32/podulebus/sbicreg.h

342

#define SET_SBIC_control(regs,val) sbic_write_reg(regs,SBIC_control,val)

sys/arch/acorn32/podulebus/sbicreg.h

343

#define GET_SBIC_control(regs,val) sbic_read_reg(regs,SBIC_control,val)

sys/arch/acorn32/podulebus/sbicreg.h

344

#define SET_SBIC_timeo(regs,val) sbic_write_reg(regs,SBIC_timeo,val)

sys/arch/acorn32/podulebus/sbicreg.h

345

#define GET_SBIC_timeo(regs,val) sbic_read_reg(regs,SBIC_timeo,val)

sys/arch/acorn32/podulebus/sbicreg.h

346

#define SET_SBIC_cdb1(regs,val) sbic_write_reg(regs,SBIC_cdb1,val)

sys/arch/acorn32/podulebus/sbicreg.h

347

#define GET_SBIC_cdb1(regs,val) sbic_read_reg(regs,SBIC_cdb1,val)

sys/arch/acorn32/podulebus/sbicreg.h

348

#define SET_SBIC_cdb2(regs,val) sbic_write_reg(regs,SBIC_cdb2,val)

sys/arch/acorn32/podulebus/sbicreg.h

349

#define GET_SBIC_cdb2(regs,val) sbic_read_reg(regs,SBIC_cdb2,val)

sys/arch/acorn32/podulebus/sbicreg.h

350

#define SET_SBIC_cdb3(regs,val) sbic_write_reg(regs,SBIC_cdb3,val)

sys/arch/acorn32/podulebus/sbicreg.h

351

#define GET_SBIC_cdb3(regs,val) sbic_read_reg(regs,SBIC_cdb3,val)

sys/arch/acorn32/podulebus/sbicreg.h

352

#define SET_SBIC_cdb4(regs,val) sbic_write_reg(regs,SBIC_cdb4,val)

sys/arch/acorn32/podulebus/sbicreg.h

353

#define GET_SBIC_cdb4(regs,val) sbic_read_reg(regs,SBIC_cdb4,val)

sys/arch/acorn32/podulebus/sbicreg.h

354

#define SET_SBIC_cdb5(regs,val) sbic_write_reg(regs,SBIC_cdb5,val)

sys/arch/acorn32/podulebus/sbicreg.h

355

#define GET_SBIC_cdb5(regs,val) sbic_read_reg(regs,SBIC_cdb5,val)

sys/arch/acorn32/podulebus/sbicreg.h

356

#define SET_SBIC_cdb6(regs,val) sbic_write_reg(regs,SBIC_cdb6,val)

sys/arch/acorn32/podulebus/sbicreg.h

357

#define GET_SBIC_cdb6(regs,val) sbic_read_reg(regs,SBIC_cdb6,val)

sys/arch/acorn32/podulebus/sbicreg.h

358

#define SET_SBIC_cdb7(regs,val) sbic_write_reg(regs,SBIC_cdb7,val)

sys/arch/acorn32/podulebus/sbicreg.h

359

#define GET_SBIC_cdb7(regs,val) sbic_read_reg(regs,SBIC_cdb7,val)

sys/arch/acorn32/podulebus/sbicreg.h

360

#define SET_SBIC_cdb8(regs,val) sbic_write_reg(regs,SBIC_cdb8,val)

sys/arch/acorn32/podulebus/sbicreg.h

361

#define GET_SBIC_cdb8(regs,val) sbic_read_reg(regs,SBIC_cdb8,val)

sys/arch/acorn32/podulebus/sbicreg.h

362

#define SET_SBIC_cdb9(regs,val) sbic_write_reg(regs,SBIC_cdb9,val)

sys/arch/acorn32/podulebus/sbicreg.h

363

#define GET_SBIC_cdb9(regs,val) sbic_read_reg(regs,SBIC_cdb9,val)

sys/arch/acorn32/podulebus/sbicreg.h

364

#define SET_SBIC_cdb10(regs,val) sbic_write_reg(regs,SBIC_cdb10,val)

sys/arch/acorn32/podulebus/sbicreg.h

365

#define GET_SBIC_cdb10(regs,val) sbic_read_reg(regs,SBIC_cdb10,val)

sys/arch/acorn32/podulebus/sbicreg.h

366

#define SET_SBIC_cdb11(regs,val) sbic_write_reg(regs,SBIC_cdb11,val)

sys/arch/acorn32/podulebus/sbicreg.h

367

#define GET_SBIC_cdb11(regs,val) sbic_read_reg(regs,SBIC_cdb11,val)

sys/arch/acorn32/podulebus/sbicreg.h

368

#define SET_SBIC_cdb12(regs,val) sbic_write_reg(regs,SBIC_cdb12,val)

sys/arch/acorn32/podulebus/sbicreg.h

369

#define GET_SBIC_cdb12(regs,val) sbic_read_reg(regs,SBIC_cdb12,val)

sys/arch/acorn32/podulebus/sbicreg.h

370

#define SET_SBIC_tlun(regs,val) sbic_write_reg(regs,SBIC_tlun,val)

sys/arch/acorn32/podulebus/sbicreg.h

371

#define GET_SBIC_tlun(regs,val) sbic_read_reg(regs,SBIC_tlun,val)

sys/arch/acorn32/podulebus/sbicreg.h

372

#define SET_SBIC_cmd_phase(regs,val) sbic_write_reg(regs,SBIC_cmd_phase,val)

sys/arch/acorn32/podulebus/sbicreg.h

373

#define GET_SBIC_cmd_phase(regs,val) sbic_read_reg(regs,SBIC_cmd_phase,val)

sys/arch/acorn32/podulebus/sbicreg.h

374

#define SET_SBIC_syn(regs,val) sbic_write_reg(regs,SBIC_syn,val)

sys/arch/acorn32/podulebus/sbicreg.h

375

#define GET_SBIC_syn(regs,val) sbic_read_reg(regs,SBIC_syn,val)

sys/arch/acorn32/podulebus/sbicreg.h

376

#define SET_SBIC_count_hi(regs,val) sbic_write_reg(regs,SBIC_count_hi,val)

sys/arch/acorn32/podulebus/sbicreg.h

377

#define GET_SBIC_count_hi(regs,val) sbic_read_reg(regs,SBIC_count_hi,val)

sys/arch/acorn32/podulebus/sbicreg.h

378

#define SET_SBIC_count_med(regs,val) sbic_write_reg(regs,SBIC_count_med,val)

sys/arch/acorn32/podulebus/sbicreg.h

379

#define GET_SBIC_count_med(regs,val) sbic_read_reg(regs,SBIC_count_med,val)

sys/arch/acorn32/podulebus/sbicreg.h

380

#define SET_SBIC_count_lo(regs,val) sbic_write_reg(regs,SBIC_count_lo,val)

sys/arch/acorn32/podulebus/sbicreg.h

381

#define GET_SBIC_count_lo(regs,val) sbic_read_reg(regs,SBIC_count_lo,val)

sys/arch/acorn32/podulebus/sbicreg.h

382

#define SET_SBIC_selid(regs,val) sbic_write_reg(regs,SBIC_selid,val)

sys/arch/acorn32/podulebus/sbicreg.h

383

#define GET_SBIC_selid(regs,val) sbic_read_reg(regs,SBIC_selid,val)

sys/arch/acorn32/podulebus/sbicreg.h

384

#define SET_SBIC_rselid(regs,val) sbic_write_reg(regs,SBIC_rselid,val)

sys/arch/acorn32/podulebus/sbicreg.h

385

#define GET_SBIC_rselid(regs,val) sbic_read_reg(regs,SBIC_rselid,val)

sys/arch/acorn32/podulebus/sbicreg.h

386

#define SET_SBIC_csr(regs,val) sbic_write_reg(regs,SBIC_csr,val)

sys/arch/acorn32/podulebus/sbicreg.h

387

#define GET_SBIC_csr(regs,val) sbic_read_reg(regs,SBIC_csr,val)

sys/arch/acorn32/podulebus/sbicreg.h

388

#define SET_SBIC_cmd(regs,val) sbic_write_reg(regs,SBIC_cmd,val)

sys/arch/acorn32/podulebus/sbicreg.h

389

#define GET_SBIC_cmd(regs,val) sbic_read_reg(regs,SBIC_cmd,val)

sys/arch/acorn32/podulebus/sbicreg.h

390

#define SET_SBIC_data(regs,val) sbic_write_reg(regs,SBIC_data,val)

sys/arch/acorn32/podulebus/sbicreg.h

391

#define GET_SBIC_data(regs,val) sbic_read_reg(regs,SBIC_data,val)

sys/arch/acorn32/podulebus/sbicreg.h

393

#define SBIC_TC_PUT(regs,val) do { \

sys/arch/acorn32/podulebus/sbicreg.h

394

sbic_write_reg(regs,SBIC_count_hi,((val)>>16)); \

sys/arch/acorn32/podulebus/sbicreg.h

396

(val) >> 8); \

sys/arch/acorn32/podulebus/sbicreg.h

400

(val)); \

sys/arch/acorn32/podulebus/sbicreg.h

405

#define SBIC_TC_GET(regs,val) do { \

sys/arch/acorn32/podulebus/sbicreg.h

406

sbic_read_reg(regs,SBIC_count_hi,(val)); \

sys/arch/acorn32/podulebus/sbicreg.h

407

(val) = ((val)<<8) | bus_space_read_1(regs->sc_sbiciot, \

sys/arch/acorn32/podulebus/sbicreg.h

411

(val) = ((val)<<8) | bus_space_read_1(regs->sc_sbiciot, \

sys/arch/acorn32/podulebus/sbicreg.h

426

#define GET_SBIC_asr(regs,val) \

sys/arch/acorn32/podulebus/sbicreg.h

427

((val) = bus_space_read_1((regs)->sc_sbiciot, (regs)->sc_sbicioh, \

sys/arch/acorn32/stand/lib/rmreloc.c

95

store_ptr(void *where, Elf_Addr val)

sys/arch/acorn32/stand/lib/rmreloc.c

98

memcpy(where, &val, sizeof(val));

sys/arch/algor/algor/algor_p4032_intr.c

240

REGVAL(p4032_irqregs[i].addr) = p4032_irqregs[i].val;

sys/arch/algor/algor/algor_p4032_intr.c

251

p4032_irqsteer[irqmap->xbarreg].val |=

sys/arch/algor/algor/algor_p4032_intr.c

260

REGVAL(p4032_irqsteer[i].addr) = p4032_irqsteer[i].val;

sys/arch/algor/algor/algor_p4032_intr.c

373

p4032_irqregs[irqmap->irqreg].val |= irqmap->irqbit;

sys/arch/algor/algor/algor_p4032_intr.c

375

p4032_irqregs[irqmap->irqreg].val;

sys/arch/algor/algor/algor_p4032_intr.c

404

p4032_irqregs[irqmap->irqreg].val &= ~irqmap->irqbit;

sys/arch/algor/algor/algor_p4032_intr.c

406

p4032_irqregs[irqmap->irqreg].val;

sys/arch/algor/algor/algor_p4032_intr.c

462

irr[i] = REGVAL(p4032_irqregs[i].addr) & p4032_irqregs[i].val;

sys/arch/algor/algor/algor_p4032_intr.c

72

u_int32_t val;

sys/arch/algor/algor/algor_p5064_intr.c

319

REGVAL(p5064_irqregs[i].addr) = p5064_irqregs[i].val;

sys/arch/algor/algor/algor_p5064_intr.c

330

p5064_irqsteer[irqmap->xbarreg].val |=

sys/arch/algor/algor/algor_p5064_intr.c

339

REGVAL(p5064_irqsteer[i].addr) = p5064_irqsteer[i].val;

sys/arch/algor/algor/algor_p5064_intr.c

466

p5064_irqregs[irqmap->irqreg].val |= irqmap->irqbit;

sys/arch/algor/algor/algor_p5064_intr.c

468

p5064_irqregs[irqmap->irqreg].val;

sys/arch/algor/algor/algor_p5064_intr.c

497

p5064_irqregs[irqmap->irqreg].val &= ~irqmap->irqbit;

sys/arch/algor/algor/algor_p5064_intr.c

499

p5064_irqregs[irqmap->irqreg].val;

sys/arch/algor/algor/algor_p5064_intr.c

550

irr[i] = REGVAL(p5064_irqregs[i].addr) & p5064_irqregs[i].val;

sys/arch/algor/algor/algor_p5064_intr.c

76

uint32_t val;

sys/arch/alpha/alpha/db_interface.c

156

db_alpha_regop(const struct db_variable *vp, db_expr_t *val, int opcode)

sys/arch/alpha/alpha/db_interface.c

172

*val = *tfaddr;

sys/arch/alpha/alpha/db_interface.c

176

*tfaddr = *val;

sys/arch/alpha/alpha/sys_machdep.c

218

args.val);

sys/arch/alpha/alpha/sys_machdep.c

220

args.val = pci_conf_read(alpha_pci_chipset, tag,

sys/arch/alpha/alpha/trap.c

1269

unsigned long val;

sys/arch/alpha/alpha/trap.c

1274

val = (regptr != NULL) ? *regptr : 0;

sys/arch/alpha/alpha/trap.c

1275

res = popcount64(val);

sys/arch/alpha/alpha/trap.c

1286

unsigned long val;

sys/arch/alpha/alpha/trap.c

1291

val = (regptr != NULL) ? *regptr : 0;

sys/arch/alpha/alpha/trap.c

1292

res = fls64(val);

sys/arch/alpha/alpha/trap.c

1304

unsigned long val;

sys/arch/alpha/alpha/trap.c

1309

val = (regptr != NULL) ? *regptr : 0;

sys/arch/alpha/alpha/trap.c

1310

res = ffs64(val);

sys/arch/alpha/eisa/eisa_machdep.c

321

uint32_t val = 0;

sys/arch/alpha/eisa/eisa_machdep.c

324

for (i = 0; i < sizeof(val); i++) {

sys/arch/alpha/eisa/eisa_machdep.c

325

val |= (uint32_t)*src << (i * 8);

sys/arch/alpha/eisa/eisa_machdep.c

329

*valp = val;

sys/arch/alpha/gbus/gbus_io.c

132

uint8_t val)

sys/arch/alpha/gbus/gbus_io.c

136

atomic_store_relaxed(addr, (uint32_t)val);

sys/arch/alpha/gbus/mcclock_gbus.c

101

bus_space_write_1(sc->sc_bst, sc->sc_bsh, reg, (uint8_t)val);

sys/arch/alpha/gbus/mcclock_gbus.c

99

mcclock_gbus_write(struct mc146818_softc *sc, u_int reg, u_int val)

sys/arch/alpha/include/alpha_cpu.h

586

alpha_pal_wrval(unsigned long val)

sys/arch/alpha/include/alpha_cpu.h

588

register unsigned long a0 __asm("$16") = val;

sys/arch/alpha/include/pio.h

54

#define outb(addr, val) (*alpha_pci_io_switch->apio_outb)((addr), (val))

sys/arch/alpha/include/pio.h

55

#define outw(addr, val) (*alpha_pci_io_switch->apio_outw)((addr), (val))

sys/arch/alpha/include/pio.h

56

#define outl(addr, val) (*alpha_pci_io_switch->apio_outl)((addr), (val))

sys/arch/alpha/include/sysarch.h

81

uint32_t val;

sys/arch/alpha/include/types.h

43

long val[10];

sys/arch/alpha/include/z8530var.h

112

void zs_write_reg(struct zs_chanstate *cs, u_int reg, u_int val);

sys/arch/alpha/include/z8530var.h

113

void zs_write_csr(struct zs_chanstate *cs, u_int val);

sys/arch/alpha/include/z8530var.h

114

void zs_write_data(struct zs_chanstate *cs, u_int val);

sys/arch/alpha/jensenio/jensenio_bus_intio.c

240

uint8_t val)

sys/arch/alpha/jensenio/jensenio_bus_intio.c

245

*port = val;

sys/arch/alpha/jensenio/jensenio_bus_intio.c

263

uint8_t val, bus_size_t c)

sys/arch/alpha/jensenio/jensenio_bus_intio.c

267

jensenio_intio_write_1(v, h, o, val);

sys/arch/alpha/jensenio/jensenio_bus_intio.c

268

jensenio_intio_barrier(v, h, o, sizeof val,

sys/arch/alpha/pci/apecsreg.h

337

uint64_t val;

sys/arch/alpha/pci/pci_2100_a500.c

654

#define ICIC_WRITE(tcp, val) \

sys/arch/alpha/pci/pci_2100_a500.c

657

T2GA((tcp), T2_DIR) = (val); \

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

672

uint8_t val)

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

677

alpha_stb((uint8_t *)addr, val);

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

686

uint16_t val)

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

696

alpha_stw((uint16_t *)addr, val);

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

705

uint32_t val)

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

715

*(uint32_t *)addr = val;

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

724

uint64_t val)

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

779

TYPE val, \

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

784

__C(__C(CHIP,_io_write_),BYTES)(v, h, o, val); \

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

785

__C(CHIP,_io_barrier)(v, h, o, sizeof val, \

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

800

TYPE val, \

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

805

__C(__C(CHIP,_io_write_),BYTES)(v, h, o, val); \

sys/arch/alpha/pci/pci_bwx_bus_io_chipdep.c

806

o += sizeof val; \

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

644

uint8_t val)

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

649

alpha_stb((uint8_t *)addr, val);

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

658

uint16_t val)

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

668

alpha_stw((uint16_t *)addr, val);

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

677

uint32_t val)

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

687

*(uint32_t *)addr = val;

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

696

uint64_t val)

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

751

TYPE val, \

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

756

__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

757

__C(CHIP,_mem_barrier)(v, h, o, sizeof val, \

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

772

TYPE val, \

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

777

__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \

sys/arch/alpha/pci/pci_bwx_bus_mem_chipdep.c

778

o += sizeof val; \

sys/arch/alpha/pci/pci_kn8ae.c

284

uint32_t val;

sys/arch/alpha/pci/pci_kn8ae.c

307

val = imaskcache[ionode][hose][hpc];

sys/arch/alpha/pci/pci_kn8ae.c

309

val |= busp;

sys/arch/alpha/pci/pci_kn8ae.c

311

val &= ~busp;

sys/arch/alpha/pci/pci_kn8ae.c

312

imaskcache[ionode][hose][hpc] = val;

sys/arch/alpha/pci/pci_kn8ae.c

315

onoff? "enable" : "disable", ihv, val, hpc, ionode + 4, hose);

sys/arch/alpha/pci/pci_kn8ae.c

318

REGVAL(PCIA_IMASK(hpc) + paddr) = val;

sys/arch/alpha/pci/pci_machdep.c

560

pcireg_t const val)

sys/arch/alpha/pci/pci_machdep.c

563

pc->pc_conf_write(pc->pc_conf_v, tag, reg, val);

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

644

register uint32_t *port, val;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

654

val = *port;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

655

rval = ((val) >> (8 * offset)) & 0xff;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

664

register uint32_t *port, val;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

674

val = *port;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

675

rval = ((val) >> (8 * offset)) & 0xffff;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

684

register uint32_t *port, val;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

692

val = *port;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

695

rval = ((val) >> (8 * offset)) & 0xffffffff;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

697

rval = val;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

744

bus_size_t off, uint8_t val)

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

752

nval = val << (8 * offset);

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

761

bus_size_t off, uint16_t val)

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

769

nval = val << (8 * offset);

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

778

bus_size_t off, uint32_t val)

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

788

nval = val /*<< (8 * offset)*/;

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

797

bus_size_t off, uint64_t val)

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

838

__C(__C(CHIP,_io_set_multi_),BYTES)(void *v, bus_space_handle_t h, bus_size_t o, TYPE val, bus_size_t c) \

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

842

__C(__C(CHIP,_io_write_),BYTES)(v, h, o, val); \

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

843

__C(CHIP,_io_barrier)(v, h, o, sizeof val, \

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

854

__C(__C(CHIP,_io_set_region_),BYTES)(void *v, bus_space_handle_t h, bus_size_t o, TYPE val, bus_size_t c) \

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

858

__C(__C(CHIP,_io_write_),BYTES)(v, h, o, val); \

sys/arch/alpha/pci/pci_swiz_bus_io_chipdep.c

859

o += sizeof val; \

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1001

register uint32_t *port, val;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1016

val = *port;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1017

rval = ((val) >> (8 * offset)) & 0xffff;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1026

register uint32_t *port, val;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1039

val = *port;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1043

rval = ((val) >> (8 * offset)) & 0xffffffff;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1045

rval = val;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1098

__C(CHIP,_mem_write_1)(void *v, bus_space_handle_t memh, bus_size_t off, uint8_t val)

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1106

(*(uint8_t *)(memh + off)) = val;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1112

nval = val << (8 * offset);

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1121

__C(CHIP,_mem_write_2)(void *v, bus_space_handle_t memh, bus_size_t off, uint16_t val)

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1129

(*(uint16_t *)(memh + off)) = val;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1135

nval = val << (8 * offset);

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1144

__C(CHIP,_mem_write_4)(void *v, bus_space_handle_t memh, bus_size_t off, uint32_t val)

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1151

(*(uint32_t *)(memh + off)) = val;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1160

nval = val /*<< (8 * offset)*/;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1169

__C(CHIP,_mem_write_8)(void *v, bus_space_handle_t memh, bus_size_t off, uint64_t val)

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1174

(*(uint64_t *)(memh + off)) = val;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1218

__C(__C(CHIP,_mem_set_multi_),BYTES)(void *v, bus_space_handle_t h, bus_size_t o, TYPE val, bus_size_t c) \

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1222

__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1223

__C(CHIP,_mem_barrier)(v, h, o, sizeof val, \

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1234

__C(__C(CHIP,_mem_set_region_),BYTES)(void *v, bus_space_handle_t h, bus_size_t o, TYPE val, bus_size_t c) \

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1238

__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

1239

o += sizeof val; \

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

976

register uint32_t *port, val;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

991

val = *port;

sys/arch/alpha/pci/pci_swiz_bus_mem_chipdep.c

992

rval = ((val) >> (8 * offset)) & 0xff;

sys/arch/alpha/pci/sio_pic.c

173

i82378_write_elcr(int elcr, uint8_t val)

sys/arch/alpha/pci/sio_pic.c

176

bus_space_write_1(sio_iot, sio_ioh_elcr, elcr, val);

sys/arch/alpha/pci/sio_pic.c

255

cy82c693_write_elcr(int elcr, uint8_t val)

sys/arch/alpha/pci/sio_pic.c

258

cy82c693_write(sio_cy82c693_handle, CONFIG_ELCR1 + elcr, val);

sys/arch/alpha/pci/tsciic.c

111

uint64_t val;

sys/arch/alpha/pci/tsciic.c

114

val = LDQP(TS_C_MPD);

sys/arch/alpha/pci/tsciic.c

115

bits = (val & MPD_DR ? MPD_BIT_SDA : 0) |

sys/arch/alpha/pci/tsciic.c

116

(val & MPD_CKR ? MPD_BIT_SCL : 0);

sys/arch/alpha/pci/tsciic.c

147

tsciic_write_byte(void *cookie, uint8_t val, int flags)

sys/arch/alpha/pci/tsciic.c

149

return (i2c_bitbang_write_byte(cookie, val, flags, &tsciicbb_ops));

sys/arch/alpha/pci/tsciic.c

93

uint64_t val;

sys/arch/alpha/pci/tsciic.c

95

val = (bits & MPD_BIT_SDA ? MPD_DS : 0) |

sys/arch/alpha/pci/tsciic.c

98

STQP(TS_C_MPD) = val;

sys/arch/alpha/tc/ioasic.c

270

ioasic_intrnull(void *val)

sys/arch/alpha/tc/ioasic.c

274

(u_long)val);

sys/arch/alpha/tc/ioasic.c

281

ioasic_intr(void *val)

sys/arch/alpha/tc/ioasic.c

283

register struct ioasic_softc *sc = val;

sys/arch/alpha/tc/tc_3000_300.c

207

tc_3000_300_intrnull(void *val)

sys/arch/alpha/tc/tc_3000_300.c

211

(u_long)val);

sys/arch/alpha/tc/tc_3000_500.c

205

tc_3000_500_intrnull(void *val)

sys/arch/alpha/tc/tc_3000_500.c

209

(u_long)val);

sys/arch/alpha/tc/tc_bus_mem.c

490

tc_mem_write_1(void *v, bus_space_handle_t memh, bus_size_t off, uint8_t val)

sys/arch/alpha/tc/tc_bus_mem.c

497

*p = TC_SPARSE_WR_PVAL(0x1, off & 3, val);

sys/arch/alpha/tc/tc_bus_mem.c

505

tc_mem_write_2(void *v, bus_space_handle_t memh, bus_size_t off, uint16_t val)

sys/arch/alpha/tc/tc_bus_mem.c

512

*p = TC_SPARSE_WR_PVAL(0x3, off & 2, val);

sys/arch/alpha/tc/tc_bus_mem.c

520

tc_mem_write_4(void *v, bus_space_handle_t memh, bus_size_t off, uint32_t val)

sys/arch/alpha/tc/tc_bus_mem.c

529

*p = val;

sys/arch/alpha/tc/tc_bus_mem.c

535

tc_mem_write_8(void *v, bus_space_handle_t memh, bus_size_t off, uint64_t val)

sys/arch/alpha/tc/tc_bus_mem.c

543

*p = val;

sys/arch/alpha/tc/tc_bus_mem.c

594

TYPE val, \

sys/arch/alpha/tc/tc_bus_mem.c

599

__C(tc_mem_write_,BYTES)(v, h, o, val); \

sys/arch/alpha/tc/tc_bus_mem.c

600

tc_mem_barrier(v, h, o, sizeof val, BUS_SPACE_BARRIER_WRITE); \

sys/arch/alpha/tc/tc_bus_mem.c

614

TYPE val, \

sys/arch/alpha/tc/tc_bus_mem.c

619

__C(tc_mem_write_,BYTES)(v, h, o, val); \

sys/arch/alpha/tc/tc_bus_mem.c

620

o += sizeof val; \

sys/arch/amd64/amd64/kobj_machdep.c

123

val = addr + addend;

sys/arch/amd64/amd64/kobj_machdep.c

124

memcpy(where, &val, sizeof(val));

sys/arch/amd64/amd64/kobj_machdep.c

157

val = addr;

sys/arch/amd64/amd64/kobj_machdep.c

158

memcpy(where, &val, sizeof(val));

sys/arch/amd64/amd64/kobj_machdep.c

76

Elf64_Addr *where, val;

sys/arch/amd64/include/types.h

45

long val[8];

sys/arch/amd64/stand/prekern/elf.c

196

Elf64_Addr *where, val;

sys/arch/amd64/stand/prekern/elf.c

234

val = addr + addend;

sys/arch/amd64/stand/prekern/elf.c

235

*where = val;

sys/arch/amd64/stand/prekern/elf.c

262

val = addr;

sys/arch/amd64/stand/prekern/elf.c

263

*where = val;

sys/arch/amd64/stand/prekern/prng.c

133

uint64_t buf[8], val;

sys/arch/amd64/stand/prekern/prng.c

152

val = rdtsc();

sys/arch/amd64/stand/prekern/prng.c

153

SHA512_Update(ctx, (uint8_t *)&val, sizeof(val));

sys/arch/amiga/amiga/cc.c

639

u_long val;

sys/arch/amiga/amiga/cc.c

642

val = 0;

sys/arch/amiga/amiga/cc.c

644

val = chip_total;

sys/arch/amiga/amiga/cc.c

648

if (mn->size > val)

sys/arch/amiga/amiga/cc.c

649

val = mn->size;

sys/arch/amiga/amiga/cc.c

653

return (val);

sys/arch/amiga/amiga/cc.h

101

#define MAKEBOOL(val) (val ? 1 : 0)

sys/arch/amiga/amiga/disksubr.c

545

u_long *blp, cnt, val;

sys/arch/amiga/amiga/disksubr.c

549

val = 0;

sys/arch/amiga/amiga/disksubr.c

552

val += *blp++;

sys/arch/amiga/amiga/disksubr.c

553

return(val);

sys/arch/amiga/amiga/gayle.c

121

gayle_intr_enable_write(uint8_t val)

sys/arch/amiga/amiga/gayle.c

124

aprint_normal("gayle: intr enable register write %x\n", val);

sys/arch/amiga/amiga/gayle.c

127

GAYLE_INTENA, val);

sys/arch/amiga/amiga/gayle.c

133

uint8_t val;

sys/arch/amiga/amiga/gayle.c

134

val = gayle_intr_enable_read();

sys/arch/amiga/amiga/gayle.c

135

gayle_intr_enable_write(val | bits);

sys/arch/amiga/amiga/gayle.c

139

gayle_intr_ack(uint8_t val)

sys/arch/amiga/amiga/gayle.c

142

aprint_normal("gayle: intr ack write %x\n", val);

sys/arch/amiga/amiga/gayle.c

145

GAYLE_INTREQ, val);

sys/arch/amiga/amiga/gayle.c

163

gayle_pcmcia_status_write(uint8_t val)

sys/arch/amiga/amiga/gayle.c

166

aprint_normal("gayle: pcmcia status write %x\n", val);

sys/arch/amiga/amiga/gayle.c

169

GAYLE_PCC_STATUS, val);

sys/arch/amiga/amiga/gayle.c

173

gayle_pcmcia_config_write(uint8_t val)

sys/arch/amiga/amiga/gayle.c

176

aprint_normal("gayle: pcmcia config write %x\n", val);

sys/arch/amiga/amiga/gayle.c

179

GAYLE_PCC_CONFIG, val);

sys/arch/amiga/dev/acafh.c

239

uint16_t val;

sys/arch/amiga/dev/acafh.c

241

val = bus_space_read_2(sc->sc_aca_iot, sc->sc_aca_ioh, reg * 0x4000);

sys/arch/amiga/dev/acafh.c

245

((unsigned) sc->sc_aca_ioh + reg * 0x4000)), val);

sys/arch/amiga/dev/acafh.c

248

return (val & ACAFH_MSB_MASK) >> ACAFH_MSB_SHIFT;

sys/arch/amiga/dev/bzivsc.c

255

bzivsc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/amiga/dev/bzivsc.c

258

uint8_t v = val;

sys/arch/amiga/dev/bzsc.c

263

bzsc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/amiga/dev/bzsc.c

266

uint8_t v = val;

sys/arch/amiga/dev/bztzsc.c

259

bztzsc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/amiga/dev/bztzsc.c

262

uint8_t v = val;

sys/arch/amiga/dev/cbiisc.c

251

cbiisc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/amiga/dev/cbiisc.c

254

uint8_t v = val;

sys/arch/amiga/dev/cbsc.c

255

cbsc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/amiga/dev/cbsc.c

258

uint8_t v = val;

sys/arch/amiga/dev/flsc.c

237

flsc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/amiga/dev/flsc.c

241

uint8_t v = val;

sys/arch/amiga/dev/grf_clreg.h

273

#define WGfx(ba, idx, val) \

sys/arch/amiga/dev/grf_clreg.h

276

vgaw(ba, GCT_ADDRESS_W , val); \

sys/arch/amiga/dev/grf_clreg.h

279

#define WSeq(ba, idx, val) \

sys/arch/amiga/dev/grf_clreg.h

282

vgaw(ba, SEQ_ADDRESS_W , val); \

sys/arch/amiga/dev/grf_clreg.h

287

#define WCrt(ba, idx, val) \

sys/arch/amiga/dev/grf_clreg.h

290

vgaw(ba, CRT_ADDRESS_W , val); \

sys/arch/amiga/dev/grf_clreg.h

293

#define WAttr(ba, idx, val) \

sys/arch/amiga/dev/grf_clreg.h

297

vgaw(ba, ACT_ADDRESS_W, val); \

sys/arch/amiga/dev/grf_clreg.h

74

#define vgaw(ba, reg, val) \

sys/arch/amiga/dev/grf_clreg.h

75

*(((volatile unsigned char *)ba)+reg) = ((val) & 0xff)

sys/arch/amiga/dev/grf_cv.c

1876

M2I(short val)

sys/arch/amiga/dev/grf_cv.c

1878

return ( ((val & 0xff00) >> 8) | ((val & 0xff) << 8));

sys/arch/amiga/dev/grf_cv.c

2365

uint16_t val;

sys/arch/amiga/dev/grf_cv.c

2371

val = 0x2000 | fillattr;

sys/arch/amiga/dev/grf_cv.c

2374

*cp = val;

sys/arch/amiga/dev/grf_cv.c

2422

uint16_t val;

sys/arch/amiga/dev/grf_cv.c

2428

val = 0x2000 | fillattr;

sys/arch/amiga/dev/grf_cv.c

2432

*cp = val;

sys/arch/amiga/dev/grf_cv3d.c

1739

M2I(short val)

sys/arch/amiga/dev/grf_cv3d.c

1741

return ( ((val & 0xff00) >> 8) | ((val & 0xff) << 8));

sys/arch/amiga/dev/grf_cv3d.c

2219

uint16_t val;

sys/arch/amiga/dev/grf_cv3d.c

2225

val = 0x2000 | fillattr;

sys/arch/amiga/dev/grf_cv3d.c

2228

*cp = val;

sys/arch/amiga/dev/grf_cv3d.c

2276

uint16_t val;

sys/arch/amiga/dev/grf_cv3d.c

2282

val = 0x2000 | fillattr;

sys/arch/amiga/dev/grf_cv3d.c

2286

*cp = val;

sys/arch/amiga/dev/grf_cv3dreg.h

101

#define vgaw16(ba, reg, val) \

sys/arch/amiga/dev/grf_cv3dreg.h

102

*((volatile unsigned short *) (((volatile char *)ba)+reg)) = val

sys/arch/amiga/dev/grf_cv3dreg.h

533

#define WGfx(ba, idx, val) \

sys/arch/amiga/dev/grf_cv3dreg.h

534

do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_cv3dreg.h

536

#define WSeq(ba, idx, val) \

sys/arch/amiga/dev/grf_cv3dreg.h

537

do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_cv3dreg.h

539

#define WCrt(ba, idx, val) \

sys/arch/amiga/dev/grf_cv3dreg.h

540

do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_cv3dreg.h

542

#define WAttr(ba, idx, val) \

sys/arch/amiga/dev/grf_cv3dreg.h

548

vgaw(ba, ACT_ADDRESS_W, val);\

sys/arch/amiga/dev/grf_cv3dreg.h

63

#define vgaw(ba, reg, val) \

sys/arch/amiga/dev/grf_cv3dreg.h

64

*(((volatile char *)ba)+(reg ^ 3)) = ((val) & 0xff)

sys/arch/amiga/dev/grf_cv3dreg.h

72

#define vgawio(ba, reg, val) \

sys/arch/amiga/dev/grf_cv3dreg.h

80

( ByteAccessIO(reg) & 0xffff )) = ((val) & 0xff); \

sys/arch/amiga/dev/grf_cv3dreg.h

93

#define vgaw32(ba, reg, val) \

sys/arch/amiga/dev/grf_cv3dreg.h

94

*((volatile unsigned long *) (((volatile char *)ba)+reg)) = val

sys/arch/amiga/dev/grf_cvreg.h

344

#define WGfx(ba, idx, val) \

sys/arch/amiga/dev/grf_cvreg.h

345

do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_cvreg.h

347

#define WSeq(ba, idx, val) \

sys/arch/amiga/dev/grf_cvreg.h

348

do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_cvreg.h

350

#define WCrt(ba, idx, val) \

sys/arch/amiga/dev/grf_cvreg.h

351

do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_cvreg.h

353

#define WAttr(ba, idx, val) \

sys/arch/amiga/dev/grf_cvreg.h

359

vgaw(ba, ACT_ADDRESS_W, val);\

sys/arch/amiga/dev/grf_cvreg.h

66

#define vgaw(ba, reg, val) \

sys/arch/amiga/dev/grf_cvreg.h

67

*(((volatile char *)ba)+reg) = ((val) & 0xff); \

sys/arch/amiga/dev/grf_cvreg.h

75

#define vgaw32(ba, reg, val) \

sys/arch/amiga/dev/grf_cvreg.h

76

*((unsigned long *) (((volatile char *)ba)+reg)) = val; \

sys/arch/amiga/dev/grf_cvreg.h

84

#define vgaw16(ba, reg, val) \

sys/arch/amiga/dev/grf_cvreg.h

85

*((volatile unsigned short *) (((volatile char *)ba)+reg)) = val; \

sys/arch/amiga/dev/grf_etreg.h

265

#define WGfx(ba, idx, val) \

sys/arch/amiga/dev/grf_etreg.h

266

do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_etreg.h

268

#define WSeq(ba, idx, val) \

sys/arch/amiga/dev/grf_etreg.h

269

do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_etreg.h

271

#define WCrt(ba, idx, val) \

sys/arch/amiga/dev/grf_etreg.h

272

do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_etreg.h

274

#define WIma(ba, idx, val) \

sys/arch/amiga/dev/grf_etreg.h

275

do { vgaw(ba, IMA_ADDRESS, idx); vgaw(ba, IMA_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_etreg.h

277

#define WAttr(ba, idx, val) \

sys/arch/amiga/dev/grf_etreg.h

281

vgaw(ba, ACT_ADDRESS_W, val); \

sys/arch/amiga/dev/grf_etreg.h

86

#define vgaw(ba, reg, val) \

sys/arch/amiga/dev/grf_etreg.h

87

*(((volatile unsigned char *)ba)+reg) = ((unsigned char)val)

sys/arch/amiga/dev/grf_rh.c

127

#define M2I(val) \

sys/arch/amiga/dev/grf_rh.c

130

rorw #8,%0 ; " : "=d" (val) : "0" (val));

sys/arch/amiga/dev/grf_rh.c

132

#define M2I(val) \

sys/arch/amiga/dev/grf_rh.c

133

val = ((val & 0xff000000) >> 24) | \

sys/arch/amiga/dev/grf_rh.c

134

((val & 0x00ff0000) >> 8 ) | \

sys/arch/amiga/dev/grf_rh.c

135

((val & 0x0000ff00) << 8 ) | \

sys/arch/amiga/dev/grf_rh.c

136

((val & 0x000000ff) << 24)

sys/arch/amiga/dev/grf_rhreg.h

426

#define vgaw(ba, reg, val) \

sys/arch/amiga/dev/grf_rhreg.h

427

*(((volatile unsigned char *)ba)+reg) = val

sys/arch/amiga/dev/grf_rhreg.h

634

#define WGfx(ba, idx, val) \

sys/arch/amiga/dev/grf_rhreg.h

635

do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_rhreg.h

637

#define WSeq(ba, idx, val) \

sys/arch/amiga/dev/grf_rhreg.h

638

do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_rhreg.h

640

#define WCrt(ba, idx, val) \

sys/arch/amiga/dev/grf_rhreg.h

641

do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_rhreg.h

643

#define WAttr(ba, idx, val) \

sys/arch/amiga/dev/grf_rhreg.h

644

do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0)

sys/arch/amiga/dev/grf_rhreg.h

649

#define WPLL(ba, idx, val) \

sys/arch/amiga/dev/grf_rhreg.h

651

vgaw(ba, PLL_ADDRESS_W, (val & 0xff));\

sys/arch/amiga/dev/grf_rhreg.h

652

vgaw(ba, PLL_ADDRESS_W, (val >> 8)); } while (0)

sys/arch/amiga/dev/grf_rtreg.h

316

#define vgaw(ba, reg, val) \

sys/arch/amiga/dev/grf_rtreg.h

317

*(((volatile unsigned char *)ba)+reg) = val

sys/arch/amiga/dev/grf_rtreg.h

490

#define WGfx(ba, idx, val) \

sys/arch/amiga/dev/grf_rtreg.h

491

do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_rtreg.h

493

#define WSeq(ba, idx, val) \

sys/arch/amiga/dev/grf_rtreg.h

494

do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_rtreg.h

496

#define WCrt(ba, idx, val) \

sys/arch/amiga/dev/grf_rtreg.h

497

do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)

sys/arch/amiga/dev/grf_rtreg.h

499

#define WAttr(ba, idx, val) \

sys/arch/amiga/dev/grf_rtreg.h

500

do { vgaw(ba, ACT_ADDRESS, idx); vgaw(ba, ACT_ADDRESS_W, val); } while (0)

sys/arch/amiga/dev/grfabs.c

63

#define ABS(type, val) \

sys/arch/amiga/dev/grfabs.c

64

(type) (((int)(val) < 0) ? -(val) : (val))

sys/arch/amiga/dev/if_le.c

157

ariadne_swapreg(u_int16_t val)

sys/arch/amiga/dev/if_le.c

160

return (((val & 0xff) << 8 ) | (( val >> 8) & 0xff));

sys/arch/amiga/dev/if_le.c

164

ariadne_wrcsr(struct lance_softc *sc, u_int16_t port, u_int16_t val)

sys/arch/amiga/dev/if_le.c

169

ler1->ler1_rdp = ariadne_swapreg(val);

sys/arch/amiga/dev/if_le.c

176

u_int16_t val;

sys/arch/amiga/dev/if_le.c

179

val = ariadne_swapreg(ler1->ler1_rdp);

sys/arch/amiga/dev/if_le.c

180

return (val);

sys/arch/amiga/dev/if_le.c

184

ariadne_wribcr(struct lance_softc *sc, u_int16_t port, u_int16_t val)

sys/arch/amiga/dev/if_le.c

189

ler1->ler1_idp = ariadne_swapreg(val);

sys/arch/amiga/dev/if_le.c

193

lewrcsr(struct lance_softc *sc, u_int16_t port, u_int16_t val)

sys/arch/amiga/dev/if_le.c

198

ler1->ler1_rdp = val;

sys/arch/amiga/dev/if_le.c

205

u_int16_t val;

sys/arch/amiga/dev/if_le.c

208

val = ler1->ler1_rdp;

sys/arch/amiga/dev/if_le.c

209

return (val);

sys/arch/amiga/dev/mntva.c

345

mntva_reg_write(struct mntva_softc *sc, uint32_t reg, uint32_t val)

sys/arch/amiga/dev/mntva.c

347

bus_space_write_2(sc->sc_iot, sc->sc_regh, reg, val);

sys/arch/amiga/dev/mntva.c

68

static void mntva_reg_write(struct mntva_softc *sc, uint32_t reg, uint32_t val);

sys/arch/amiga/dev/sbic.c

700

u_char val;

sys/arch/amiga/dev/sbic.c

707

GET_SBIC_asr(regs,val);

sys/arch/amiga/dev/sbic.c

708

while ((val & until) == 0) {

sys/arch/amiga/dev/sbic.c

712

line, val, csr);

sys/arch/amiga/dev/sbic.c

716

return(val); /* Maybe I should abort */

sys/arch/amiga/dev/sbic.c

720

GET_SBIC_asr(regs,val);

sys/arch/amiga/dev/sbic.c

723

return(val);

sys/arch/amiga/dev/sbicreg.h

132

#define SBIC_TIMEOUT(val,clk) ((((val) * (clk)) / 800) + 1)

sys/arch/amiga/dev/sbicreg.h

315

#define sbic_read_reg(regs,regno,val) do { \

sys/arch/amiga/dev/sbicreg.h

318

(val) = *((regs).sbic_value_p); \

sys/arch/amiga/dev/sbicreg.h

322

#define sbic_write_reg(regs,regno,val) do { \

sys/arch/amiga/dev/sbicreg.h

325

*((regs).sbic_value_p) = (val); \

sys/arch/amiga/dev/sbicreg.h

329

#define SET_SBIC_myid(regs,val) sbic_write_reg(regs,SBIC_myid,val)

sys/arch/amiga/dev/sbicreg.h

330

#define GET_SBIC_myid(regs,val) sbic_read_reg(regs,SBIC_myid,val)

sys/arch/amiga/dev/sbicreg.h

331

#define SET_SBIC_cdbsize(regs,val) sbic_write_reg(regs,SBIC_cdbsize,val)

sys/arch/amiga/dev/sbicreg.h

332

#define GET_SBIC_cdbsize(regs,val) sbic_read_reg(regs,SBIC_cdbsize,val)

sys/arch/amiga/dev/sbicreg.h

333

#define SET_SBIC_control(regs,val) sbic_write_reg(regs,SBIC_control,val)

sys/arch/amiga/dev/sbicreg.h

334

#define GET_SBIC_control(regs,val) sbic_read_reg(regs,SBIC_control,val)

sys/arch/amiga/dev/sbicreg.h

335

#define SET_SBIC_timeo(regs,val) sbic_write_reg(regs,SBIC_timeo,val)

sys/arch/amiga/dev/sbicreg.h

336

#define GET_SBIC_timeo(regs,val) sbic_read_reg(regs,SBIC_timeo,val)

sys/arch/amiga/dev/sbicreg.h

337

#define SET_SBIC_cdb1(regs,val) sbic_write_reg(regs,SBIC_cdb1,val)

sys/arch/amiga/dev/sbicreg.h

338

#define GET_SBIC_cdb1(regs,val) sbic_read_reg(regs,SBIC_cdb1,val)

sys/arch/amiga/dev/sbicreg.h

339

#define SET_SBIC_cdb2(regs,val) sbic_write_reg(regs,SBIC_cdb2,val)

sys/arch/amiga/dev/sbicreg.h

340

#define GET_SBIC_cdb2(regs,val) sbic_read_reg(regs,SBIC_cdb2,val)

sys/arch/amiga/dev/sbicreg.h

341

#define SET_SBIC_cdb3(regs,val) sbic_write_reg(regs,SBIC_cdb3,val)

sys/arch/amiga/dev/sbicreg.h

342

#define GET_SBIC_cdb3(regs,val) sbic_read_reg(regs,SBIC_cdb3,val)

sys/arch/amiga/dev/sbicreg.h

343

#define SET_SBIC_cdb4(regs,val) sbic_write_reg(regs,SBIC_cdb4,val)

sys/arch/amiga/dev/sbicreg.h

344

#define GET_SBIC_cdb4(regs,val) sbic_read_reg(regs,SBIC_cdb4,val)

sys/arch/amiga/dev/sbicreg.h

345

#define SET_SBIC_cdb5(regs,val) sbic_write_reg(regs,SBIC_cdb5,val)

sys/arch/amiga/dev/sbicreg.h

346

#define GET_SBIC_cdb5(regs,val) sbic_read_reg(regs,SBIC_cdb5,val)

sys/arch/amiga/dev/sbicreg.h

347

#define SET_SBIC_cdb6(regs,val) sbic_write_reg(regs,SBIC_cdb6,val)

sys/arch/amiga/dev/sbicreg.h

348

#define GET_SBIC_cdb6(regs,val) sbic_read_reg(regs,SBIC_cdb6,val)

sys/arch/amiga/dev/sbicreg.h

349

#define SET_SBIC_cdb7(regs,val) sbic_write_reg(regs,SBIC_cdb7,val)

sys/arch/amiga/dev/sbicreg.h

350

#define GET_SBIC_cdb7(regs,val) sbic_read_reg(regs,SBIC_cdb7,val)

sys/arch/amiga/dev/sbicreg.h

351

#define SET_SBIC_cdb8(regs,val) sbic_write_reg(regs,SBIC_cdb8,val)

sys/arch/amiga/dev/sbicreg.h

352

#define GET_SBIC_cdb8(regs,val) sbic_read_reg(regs,SBIC_cdb8,val)

sys/arch/amiga/dev/sbicreg.h

353

#define SET_SBIC_cdb9(regs,val) sbic_write_reg(regs,SBIC_cdb9,val)

sys/arch/amiga/dev/sbicreg.h

354

#define GET_SBIC_cdb9(regs,val) sbic_read_reg(regs,SBIC_cdb9,val)

sys/arch/amiga/dev/sbicreg.h

355

#define SET_SBIC_cdb10(regs,val) sbic_write_reg(regs,SBIC_cdb10,val)

sys/arch/amiga/dev/sbicreg.h

356

#define GET_SBIC_cdb10(regs,val) sbic_read_reg(regs,SBIC_cdb10,val)

sys/arch/amiga/dev/sbicreg.h

357

#define SET_SBIC_cdb11(regs,val) sbic_write_reg(regs,SBIC_cdb11,val)

sys/arch/amiga/dev/sbicreg.h

358

#define GET_SBIC_cdb11(regs,val) sbic_read_reg(regs,SBIC_cdb11,val)

sys/arch/amiga/dev/sbicreg.h

359

#define SET_SBIC_cdb12(regs,val) sbic_write_reg(regs,SBIC_cdb12,val)

sys/arch/amiga/dev/sbicreg.h

360

#define GET_SBIC_cdb12(regs,val) sbic_read_reg(regs,SBIC_cdb12,val)

sys/arch/amiga/dev/sbicreg.h

361

#define SET_SBIC_tlun(regs,val) sbic_write_reg(regs,SBIC_tlun,val)

sys/arch/amiga/dev/sbicreg.h

362

#define GET_SBIC_tlun(regs,val) sbic_read_reg(regs,SBIC_tlun,val)

sys/arch/amiga/dev/sbicreg.h

363

#define SET_SBIC_cmd_phase(regs,val) sbic_write_reg(regs,SBIC_cmd_phase,val)

sys/arch/amiga/dev/sbicreg.h

364

#define GET_SBIC_cmd_phase(regs,val) sbic_read_reg(regs,SBIC_cmd_phase,val)

sys/arch/amiga/dev/sbicreg.h

365

#define SET_SBIC_syn(regs,val) sbic_write_reg(regs,SBIC_syn,val)

sys/arch/amiga/dev/sbicreg.h

366

#define GET_SBIC_syn(regs,val) sbic_read_reg(regs,SBIC_syn,val)

sys/arch/amiga/dev/sbicreg.h

367

#define SET_SBIC_count_hi(regs,val) sbic_write_reg(regs,SBIC_count_hi,val)

sys/arch/amiga/dev/sbicreg.h

368

#define GET_SBIC_count_hi(regs,val) sbic_read_reg(regs,SBIC_count_hi,val)

sys/arch/amiga/dev/sbicreg.h

369

#define SET_SBIC_count_med(regs,val) sbic_write_reg(regs,SBIC_count_med,val)

sys/arch/amiga/dev/sbicreg.h

370

#define GET_SBIC_count_med(regs,val) sbic_read_reg(regs,SBIC_count_med,val)

sys/arch/amiga/dev/sbicreg.h

371

#define SET_SBIC_count_lo(regs,val) sbic_write_reg(regs,SBIC_count_lo,val)

sys/arch/amiga/dev/sbicreg.h

372

#define GET_SBIC_count_lo(regs,val) sbic_read_reg(regs,SBIC_count_lo,val)

sys/arch/amiga/dev/sbicreg.h

373

#define SET_SBIC_selid(regs,val) sbic_write_reg(regs,SBIC_selid,val)

sys/arch/amiga/dev/sbicreg.h

374

#define GET_SBIC_selid(regs,val) sbic_read_reg(regs,SBIC_selid,val)

sys/arch/amiga/dev/sbicreg.h

375

#define SET_SBIC_rselid(regs,val) sbic_write_reg(regs,SBIC_rselid,val)

sys/arch/amiga/dev/sbicreg.h

376

#define GET_SBIC_rselid(regs,val) sbic_read_reg(regs,SBIC_rselid,val)

sys/arch/amiga/dev/sbicreg.h

377

#define SET_SBIC_csr(regs,val) sbic_write_reg(regs,SBIC_csr,val)

sys/arch/amiga/dev/sbicreg.h

378

#define GET_SBIC_csr(regs,val) sbic_read_reg(regs,SBIC_csr,val)

sys/arch/amiga/dev/sbicreg.h

379

#define SET_SBIC_cmd(regs,val) sbic_write_reg(regs,SBIC_cmd,val)

sys/arch/amiga/dev/sbicreg.h

380

#define GET_SBIC_cmd(regs,val) sbic_read_reg(regs,SBIC_cmd,val)

sys/arch/amiga/dev/sbicreg.h

381

#define SET_SBIC_data(regs,val) sbic_write_reg(regs,SBIC_data,val)

sys/arch/amiga/dev/sbicreg.h

382

#define GET_SBIC_data(regs,val) sbic_read_reg(regs,SBIC_data,val)

sys/arch/amiga/dev/sbicreg.h

384

#define SBIC_TC_PUT(regs,val) do { \

sys/arch/amiga/dev/sbicreg.h

385

sbic_write_reg(regs,SBIC_count_hi,((val)>>16)); \

sys/arch/amiga/dev/sbicreg.h

386

*((regs).sbic_value_p) = (val)>>8; \

sys/arch/amiga/dev/sbicreg.h

387

*((regs).sbic_value_p) = (val); \

sys/arch/amiga/dev/sbicreg.h

389

#define SBIC_TC_GET(regs,val) do { \

sys/arch/amiga/dev/sbicreg.h

390

sbic_read_reg(regs,SBIC_count_hi,(val)); \

sys/arch/amiga/dev/sbicreg.h

391

(val) = ((val)<<8) | *((regs).sbic_value_p); \

sys/arch/amiga/dev/sbicreg.h

392

(val) = ((val)<<8) | *((regs).sbic_value_p); \

sys/arch/amiga/dev/sbicreg.h

402

#define GET_SBIC_asr(regs,val) (val) = *((regs).sbic_asr_p)

sys/arch/amiga/dev/serreg.h

58

#define SERBRD(val) ((3579545/val-1) < 32768 ? 3579545/val-1 : 0)

sys/arch/amiga/dev/zz9k_ax.c

275

zzax_set_param(struct zzax_softc *sc, uint16_t param, uint16_t val)

sys/arch/amiga/dev/zz9k_ax.c

278

ZZREG_W(ZZ9K_AUDIO_VAL, val);

sys/arch/amiga/dev/zz9k_ax.c

82

static void zzax_set_param(struct zzax_softc *sc, uint16_t param, uint16_t val);

sys/arch/amiga/pci/cv3dpb.c

168

cv3dpb_pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val)

sys/arch/amiga/pci/cv3dpb.c

178

(func << 5) + reg, val);

sys/arch/amiga/pci/cv3dpb.c

182

pc->pci_conf_datah, bus, dev, func, reg, val);

sys/arch/amiga/pci/em4k.c

332

em4k_pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val)

sys/arch/amiga/pci/em4k.c

342

EMPB_CONF_DEV_STRIDE*dev + EMPB_CONF_FUNC_STRIDE*func + reg, val);

sys/arch/amiga/pci/em4k.c

346

pc->pci_conf_datah, bus, dev, func, reg, val);

sys/arch/amiga/pci/empb.c

421

empb_pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val)

sys/arch/amiga/pci/empb.c

439

EMPB_CONF_DEV_STRIDE*dev + EMPB_CONF_FUNC_STRIDE*func + reg, val);

sys/arch/amiga/pci/empb.c

443

pc->pci_conf_datah, bus, dev, func, reg, val);

sys/arch/amiga/pci/mppb.c

213

mppb_pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val)

sys/arch/amiga/pci/mppb.c

223

(MPPB_CONF_STRIDE*dev) + reg, val);

sys/arch/amiga/pci/mppb.c

227

pc->pci_conf_datah, bus, dev, func, reg, val);

sys/arch/amiga/pci/p5pb.c

376

p5pb_pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val)

sys/arch/amiga/pci/p5pb.c

401

offset, val);

sys/arch/amiga/pci/p5pb.c

405

pc->pci_conf_datah, bus, dev, func, reg, val);

sys/arch/amiga/pci/p5pb.c

632

p5pb_conf_search(struct p5pb_softc *sc, uint16_t val)

sys/arch/amiga/pci/p5pb.c

645

if(readv == val)

sys/arch/amigappc/amigappc/p5reg.h

100

#define P5read(reg, val) \

sys/arch/amigappc/amigappc/p5reg.h

102

(val) = *(volatile unsigned char *)(P5BASE + (reg)); \

sys/arch/amigappc/amigappc/p5reg.h

106

#define P5write(reg, val) \

sys/arch/amigappc/amigappc/p5reg.h

108

*(volatile unsigned char *)(P5BASE + (reg)) = (val); \

sys/arch/arc/arc/autoconf.c

226

int val = 0;

sys/arch/arc/arc/autoconf.c

239

*np = val;

sys/arch/arc/arc/autoconf.c

242

val = val * 10 + *s - '0';

sys/arch/arc/arc/minidebug.c

172

gethex(u_int *val, u_int dotval)

sys/arch/arc/arc/minidebug.c

176

*val = 0;

sys/arch/arc/arc/minidebug.c

179

*val = (*val << 4) + c - '0';

sys/arch/arc/arc/minidebug.c

183

*val = (*val << 4) + c - 'a' + 10;

sys/arch/arc/arc/minidebug.c

187

*val = *val >> 4;

sys/arch/arc/arc/minidebug.c

195

*val = dotval;

sys/arch/arc/dev/pccons.c

362

kbc_put8042cmd(uint8_t val)

sys/arch/arc/dev/pccons.c

370

kbd_data_write_1(val);

sys/arch/arc/dev/pccons.c

378

kbd_cmd(uint8_t val, uint8_t polled)

sys/arch/arc/dev/pccons.c

386

kbd_data_write_1(val);

sys/arch/arc/dev/pccons.c

388

kb_oq[kb_oq_put] = val;

sys/arch/arc/dev/pccons.c

397

kbd_data_write_1(val);

sys/arch/arc/jazz/asc.c

259

asc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/arc/jazz/asc.c

263

bus_space_write_1(asc->sc_iot, asc->sc_ioh, reg, val);

sys/arch/arc/jazz/jazzio.c

170

jazzio_intr_establish(int intr, intr_handler_t handler, void *val)

sys/arch/arc/jazz/jazzio.c

182

jirp->ih_arg = val;

sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c

87

uint32_t val;

sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c

89

val = bus_space_read_4(pcie->bst, pcie->bsh, PAB_CTRL);

sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c

90

val &= ~PAB_CTRL_PAGE_SEL;

sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c

91

val |= __SHIFTIN(page_index, PAB_CTRL_PAGE_SEL);

sys/arch/arm/acpi/acpi_pci_layerscape_gen4.c

92

bus_space_write_4(pcie->bst, pcie->bsh, PAB_CTRL, val);

sys/arch/arm/acpi/acpi_pci_machdep.c

322

pcireg_t val;

sys/arch/arm/acpi/acpi_pci_machdep.c

328

ap->ap_conf_read(&ap->ap_pc, tag, offset, &val);

sys/arch/arm/acpi/acpi_pci_machdep.c

330

acpimcfg_conf_read(&ap->ap_pc, tag, offset, &val);

sys/arch/arm/acpi/acpi_pci_machdep.c

332

return val;

sys/arch/arm/acpi/acpi_pci_machdep.c

336

acpi_pci_md_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/acpi/acpi_pci_machdep.c

344

ap->ap_conf_write(&ap->ap_pc, tag, offset, val);

sys/arch/arm/acpi/acpi_pci_machdep.c

346

acpimcfg_conf_write(&ap->ap_pc, tag, offset, val);

sys/arch/arm/acpi/acpipchb.c

128

int val;

sys/arch/arm/acpi/acpipchb.c

156

BOOTOPT_TYPE_BOOLEAN, &val) && val) {

sys/arch/arm/acpi/acpipchb.c

196

int error, val;

sys/arch/arm/acpi/acpipchb.c

199

BOOTOPT_TYPE_BOOLEAN, &val) && val) {

sys/arch/arm/acpi/sbsawdt_acpi.c

85

#define REFRESH_WR4(sc, reg, val) \

sys/arch/arm/acpi/sbsawdt_acpi.c

86

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh_r, (reg), (val))

sys/arch/arm/acpi/sbsawdt_acpi.c

89

bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh_c, (reg), (val))

sys/arch/arm/acpi/sbsawdt_acpi.c

90

#define CONTROL_WR4(sc, reg, val) \

sys/arch/arm/acpi/sbsawdt_acpi.c

91

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh_c, (reg), (val))

sys/arch/arm/altera/cycv_clkmgr.c

517

cycv_clkmgr_clock_set(void *priv, struct clk *base_clk, int val)

sys/arch/arm/altera/cycv_clkmgr.c

526

tmp |= val << clk->gate_shift;

sys/arch/arm/altera/cycv_dwcmmc.c

174

int val;

sys/arch/arm/altera/cycv_dwcmmc.c

179

val = fdtbus_gpio_read(esc->sc_gpio_cd);

sys/arch/arm/altera/cycv_dwcmmc.c

181

val = !val;

sys/arch/arm/altera/cycv_dwcmmc.c

182

return val;

sys/arch/arm/altera/cycv_platform.c

156

uint32_t val;

sys/arch/arm/altera/cycv_platform.c

159

val = bus_space_read_4(bst, bsh, CYCV_RSTMGR_CTRL);

sys/arch/arm/altera/cycv_platform.c

161

val | CYCV_RSTMGR_CTRL_SWCOLDRSTREQ);

sys/arch/arm/altera/cycv_rstmgr.c

127

uint32_t val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, reset->address);

sys/arch/arm/altera/cycv_rstmgr.c

130

val |= reset->mask;

sys/arch/arm/altera/cycv_rstmgr.c

132

val &= ~reset->mask;

sys/arch/arm/altera/cycv_rstmgr.c

134

bus_space_write_4(sc->sc_bst, sc->sc_bsh, reset->address, val);

sys/arch/arm/amlogic/gxlphy.c

106

uint16_t val;

sys/arch/arm/amlogic/gxlphy.c

113

PHY_READ(sc, TSTREAD1, &val);

sys/arch/arm/amlogic/gxlphy.c

116

return val;

sys/arch/arm/amlogic/gxlphy.c

120

gxl_writereg(struct mii_softc *sc, u_int bank, u_int reg, uint16_t val)

sys/arch/arm/amlogic/gxlphy.c

123

PHY_WRITE(sc, TSTWRITE, val);

sys/arch/arm/amlogic/meson6_timer.c

59

#define TIMER_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson6_timer.c

60

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_clk.c

389

meson_clk_write(struct meson_clk_softc *sc, bus_size_t reg, uint32_t val)

sys/arch/arm/amlogic/meson_clk.c

392

syscon_write_4(sc->sc_syscon, reg, val);

sys/arch/arm/amlogic/meson_clk.c

394

bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg, val);

sys/arch/arm/amlogic/meson_clk.c

77

const uint32_t val = CLK_READ(sc, reset->reg);

sys/arch/arm/amlogic/meson_clk.c

78

CLK_WRITE(sc, reset->reg, val | reset->mask);

sys/arch/arm/amlogic/meson_clk.c

91

const uint32_t val = CLK_READ(sc, reset->reg);

sys/arch/arm/amlogic/meson_clk.c

92

CLK_WRITE(sc, reset->reg, val & ~reset->mask);

sys/arch/arm/amlogic/meson_clk.h

392

#define CLK_WRITE_BITS(sc, reg, mask, val) \

sys/arch/arm/amlogic/meson_clk.h

396

_cwb_tmp_ |= __SHIFTIN((val), (mask)); \

sys/arch/arm/amlogic/meson_clk_div.c

104

val = CLK_READ(sc, div->reg);

sys/arch/arm/amlogic/meson_clk_div.c

127

val &= ~div->div;

sys/arch/arm/amlogic/meson_clk_div.c

128

val |= __SHIFTIN(raw_div, div->div);

sys/arch/arm/amlogic/meson_clk_div.c

129

CLK_WRITE(sc, div->reg, val);

sys/arch/arm/amlogic/meson_clk_div.c

46

uint32_t val;

sys/arch/arm/amlogic/meson_clk_div.c

60

val = CLK_READ(sc, div->reg);

sys/arch/arm/amlogic/meson_clk_div.c

64

ratio = __SHIFTOUT(val, div->div);

sys/arch/arm/amlogic/meson_clk_div.c

86

uint32_t val, raw_div;

sys/arch/arm/amlogic/meson_clk_gate.c

44

uint32_t val;

sys/arch/arm/amlogic/meson_clk_gate.c

53

val = CLK_READ(sc, gate->reg);

sys/arch/arm/amlogic/meson_clk_gate.c

55

val |= gate->mask;

sys/arch/arm/amlogic/meson_clk_gate.c

57

val &= ~gate->mask;

sys/arch/arm/amlogic/meson_clk_gate.c

58

CLK_WRITE(sc, gate->reg, val);

sys/arch/arm/amlogic/meson_clk_mpll.c

48

uint32_t val;

sys/arch/arm/amlogic/meson_clk_mpll.c

63

val = CLK_READ(sc, mpll->sdm.reg);

sys/arch/arm/amlogic/meson_clk_mpll.c

64

sdm = __SHIFTOUT(val, mpll->sdm.mask);

sys/arch/arm/amlogic/meson_clk_mpll.c

66

val = CLK_READ(sc, mpll->n2.reg);

sys/arch/arm/amlogic/meson_clk_mpll.c

67

n2 = __SHIFTOUT(val, mpll->n2.mask);

sys/arch/arm/amlogic/meson_clk_mux.c

43

uint32_t val;

sys/arch/arm/amlogic/meson_clk_mux.c

49

val = CLK_READ(sc, mux->reg);

sys/arch/arm/amlogic/meson_clk_mux.c

52

sel = __SHIFTOUT(val, mux->sel);

sys/arch/arm/amlogic/meson_clk_pll.c

47

uint32_t val;

sys/arch/arm/amlogic/meson_clk_pll.c

62

val = CLK_READ(sc, pll->n.reg);

sys/arch/arm/amlogic/meson_clk_pll.c

63

n = __SHIFTOUT(val, pll->n.mask);

sys/arch/arm/amlogic/meson_clk_pll.c

65

val = CLK_READ(sc, pll->m.reg);

sys/arch/arm/amlogic/meson_clk_pll.c

66

m = __SHIFTOUT(val, pll->m.mask);

sys/arch/arm/amlogic/meson_clk_pll.c

69

val = CLK_READ(sc, pll->frac.reg);

sys/arch/arm/amlogic/meson_clk_pll.c

70

frac = __SHIFTOUT(val, pll->frac.mask);

sys/arch/arm/amlogic/meson_dwmac.c

106

int len, val;

sys/arch/arm/amlogic/meson_dwmac.c

125

val = reset_active_low ? 1 : 0;

sys/arch/arm/amlogic/meson_dwmac.c

127

fdtbus_gpio_write(pin_reset, val);

sys/arch/arm/amlogic/meson_dwmac.c

129

fdtbus_gpio_write(pin_reset, !val);

sys/arch/arm/amlogic/meson_dwmac.c

140

uint32_t val;

sys/arch/arm/amlogic/meson_dwmac.c

148

val = bus_space_read_4(bst, bsh, PRG_ETHERNET_ADDR0);

sys/arch/arm/amlogic/meson_dwmac.c

149

val |= PHY_INTERFACE_SEL;

sys/arch/arm/amlogic/meson_dwmac.c

150

val &= ~TX_CLK_DELAY;

sys/arch/arm/amlogic/meson_dwmac.c

151

val |= __SHIFTIN((tx_delay >> 1), TX_CLK_DELAY);

sys/arch/arm/amlogic/meson_dwmac.c

152

val &= ~MP2_CLK_OUT_DIV;

sys/arch/arm/amlogic/meson_dwmac.c

153

val |= __SHIFTIN(div, MP2_CLK_OUT_DIV);

sys/arch/arm/amlogic/meson_dwmac.c

154

val |= PHY_CLK_ENABLE;

sys/arch/arm/amlogic/meson_dwmac.c

155

val |= CLKGEN_ENABLE;

sys/arch/arm/amlogic/meson_dwmac.c

156

bus_space_write_4(bst, bsh, PRG_ETHERNET_ADDR0, val);

sys/arch/arm/amlogic/meson_dwmac.c

163

uint32_t val;

sys/arch/arm/amlogic/meson_dwmac.c

165

val = bus_space_read_4(bst, bsh, PRG_ETHERNET_ADDR0);

sys/arch/arm/amlogic/meson_dwmac.c

166

val &= ~PHY_INTERFACE_SEL;

sys/arch/arm/amlogic/meson_dwmac.c

167

val |= RMII_CLK_I_INVERTED;

sys/arch/arm/amlogic/meson_dwmac.c

168

val &= ~TX_CLK_DELAY;

sys/arch/arm/amlogic/meson_dwmac.c

169

val |= CLKGEN_ENABLE;

sys/arch/arm/amlogic/meson_dwmac.c

170

bus_space_write_4(bst, bsh, PRG_ETHERNET_ADDR0, val);

sys/arch/arm/amlogic/meson_dwmac.c

75

int len, val;

sys/arch/arm/amlogic/meson_dwmac.c

88

val = reset_active_low ? 1 : 0;

sys/arch/arm/amlogic/meson_dwmac.c

90

fdtbus_gpio_write(pin_reset, val);

sys/arch/arm/amlogic/meson_dwmac.c

92

fdtbus_gpio_write(pin_reset, !val);

sys/arch/arm/amlogic/meson_dwmac.c

94

fdtbus_gpio_write(pin_reset, val);

sys/arch/arm/amlogic/meson_genfb.c

163

#define VPU_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_genfb.c

164

bus_space_write_4((sc)->sc_bst, (sc)->sc_vpu_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_genfb.c

168

#define CAV_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_genfb.c

169

bus_space_write_4((sc)->sc_bst, (sc)->sc_cav_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_i2c.c

156

#define WR4(sc, reg, val) \

sys/arch/arm/amlogic/meson_i2c.c

157

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_pinctrl.c

104

#define MUX_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_pinctrl.c

105

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh_mux, (reg), (val))

sys/arch/arm/amlogic/meson_pinctrl.c

141

uint32_t val;

sys/arch/arm/amlogic/meson_pinctrl.c

143

val = MUX_READ(sc, group->reg);

sys/arch/arm/amlogic/meson_pinctrl.c

146

val |= __BIT(group->bit);

sys/arch/arm/amlogic/meson_pinctrl.c

148

val &= ~__BIT(group->bit);

sys/arch/arm/amlogic/meson_pinctrl.c

150

val &= ~group->mask;

sys/arch/arm/amlogic/meson_pinctrl.c

152

val |= __SHIFTIN(group->func, group->mask);

sys/arch/arm/amlogic/meson_pinctrl.c

154

MUX_WRITE(sc, group->reg, val);

sys/arch/arm/amlogic/meson_pinctrl.c

239

int val;

sys/arch/arm/amlogic/meson_pinctrl.c

245

val = __SHIFTOUT(data, gpio_reg->mask);

sys/arch/arm/amlogic/meson_pinctrl.c

247

return val;

sys/arch/arm/amlogic/meson_pinctrl.c

251

meson_pinctrl_pin_write(void *priv, int pin, int val)

sys/arch/arm/amlogic/meson_pinctrl.c

265

if (val)

sys/arch/arm/amlogic/meson_pinctrl.c

405

int val;

sys/arch/arm/amlogic/meson_pinctrl.c

407

val = meson_pinctrl_pin_read(sc, pin_def->id);

sys/arch/arm/amlogic/meson_pinctrl.c

409

val = !val;

sys/arch/arm/amlogic/meson_pinctrl.c

411

return val;

sys/arch/arm/amlogic/meson_pinctrl.c

415

meson_pinctrl_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/amlogic/meson_pinctrl.c

422

val = !val;

sys/arch/arm/amlogic/meson_pinctrl.c

424

meson_pinctrl_pin_write(sc, pin_def->id, val);

sys/arch/arm/amlogic/meson_pinctrl.c

494

int child, len, val;

sys/arch/arm/amlogic/meson_pinctrl.c

528

val = output_high;

sys/arch/arm/amlogic/meson_pinctrl.c

530

val = !val;

sys/arch/arm/amlogic/meson_pinctrl.c

532

line_name, pin_def->name, val ? "high" : "low");

sys/arch/arm/amlogic/meson_pinctrl.c

533

meson_pinctrl_pin_write(sc, pin_def->id, val);

sys/arch/arm/amlogic/meson_platform.c

465

uint32_t val;

sys/arch/arm/amlogic/meson_platform.c

469

val = MESONGX_WATCHDOG_CNTL_SYS_RESET_N_EN |

sys/arch/arm/amlogic/meson_platform.c

472

bus_space_write_4(bst, bsh, MESONGX_WATCHDOG_CNTL, val);

sys/arch/arm/amlogic/meson_pwm.c

104

val = PWM_READ_REG(sc, MESON_PWM_MISC_AB_REG);

sys/arch/arm/amlogic/meson_pwm.c

105

val &= ~MESON_PWM_MISC_AB_DS_A_EN;

sys/arch/arm/amlogic/meson_pwm.c

106

val |= MESON_PWM_MISC_AB_PWM_A_EN;

sys/arch/arm/amlogic/meson_pwm.c

107

PWM_WRITE_REG(sc, MESON_PWM_MISC_AB_REG, val);

sys/arch/arm/amlogic/meson_pwm.c

110

val = PWM_READ_REG(sc, MESON_PWM_MISC_AB_REG);

sys/arch/arm/amlogic/meson_pwm.c

111

val &= ~MESON_PWM_MISC_AB_DS_B_EN;

sys/arch/arm/amlogic/meson_pwm.c

112

val |= MESON_PWM_MISC_AB_PWM_B_EN;

sys/arch/arm/amlogic/meson_pwm.c

113

PWM_WRITE_REG(sc, MESON_PWM_MISC_AB_REG, val);

sys/arch/arm/amlogic/meson_pwm.c

126

uint32_t val;

sys/arch/arm/amlogic/meson_pwm.c

134

val = PWM_READ_REG(sc, MESON_PWM_MISC_AB_REG);

sys/arch/arm/amlogic/meson_pwm.c

135

clk_div = __SHIFTOUT(val, MESON_PWM_MISC_AB_A_CLK_DIV);

sys/arch/arm/amlogic/meson_pwm.c

136

val = PWM_READ_REG(sc, MESON_PWM_DUTYCYCLE_A_REG);

sys/arch/arm/amlogic/meson_pwm.c

137

hi = __SHIFTOUT(val, MESON_PWM_DUTYCYCLE_HIGH);

sys/arch/arm/amlogic/meson_pwm.c

138

lo = __SHIFTOUT(val, MESON_PWM_DUTYCYCLE_LOW);

sys/arch/arm/amlogic/meson_pwm.c

141

val = PWM_READ_REG(sc, MESON_PWM_MISC_AB_REG);

sys/arch/arm/amlogic/meson_pwm.c

142

clk_div = __SHIFTOUT(val, MESON_PWM_MISC_AB_B_CLK_DIV);

sys/arch/arm/amlogic/meson_pwm.c

143

val = PWM_READ_REG(sc, MESON_PWM_DUTYCYCLE_B_REG);

sys/arch/arm/amlogic/meson_pwm.c

144

hi = __SHIFTOUT(val, MESON_PWM_DUTYCYCLE_HIGH);

sys/arch/arm/amlogic/meson_pwm.c

145

lo = __SHIFTOUT(val, MESON_PWM_DUTYCYCLE_LOW);

sys/arch/arm/amlogic/meson_pwm.c

180

uint32_t val;

sys/arch/arm/amlogic/meson_pwm.c

218

val = PWM_READ_REG(sc, MESON_PWM_MISC_AB_REG);

sys/arch/arm/amlogic/meson_pwm.c

219

val &= ~MESON_PWM_MISC_AB_A_CLK_DIV;

sys/arch/arm/amlogic/meson_pwm.c

221

old_div = __SHIFTOUT(val, MESON_PWM_MISC_AB_A_CLK_DIV);

sys/arch/arm/amlogic/meson_pwm.c

223

val |= __SHIFTIN(clk_div, MESON_PWM_MISC_AB_A_CLK_DIV);

sys/arch/arm/amlogic/meson_pwm.c

224

val &= ~MESON_PWM_MISC_AB_A_CLK_SEL;

sys/arch/arm/amlogic/meson_pwm.c

225

val |= __SHIFTIN(sc->sc_clksource, MESON_PWM_MISC_AB_A_CLK_SEL);

sys/arch/arm/amlogic/meson_pwm.c

226

val |= MESON_PWM_MISC_AB_A_CLK_EN;

sys/arch/arm/amlogic/meson_pwm.c

227

PWM_WRITE_REG(sc, MESON_PWM_MISC_AB_REG, val);

sys/arch/arm/amlogic/meson_pwm.c

228

val = PWM_READ_REG(sc, MESON_PWM_DUTYCYCLE_A_REG);

sys/arch/arm/amlogic/meson_pwm.c

230

old_hi = __SHIFTOUT(val, MESON_PWM_DUTYCYCLE_HIGH);

sys/arch/arm/amlogic/meson_pwm.c

231

old_lo = __SHIFTOUT(val, MESON_PWM_DUTYCYCLE_LOW);

sys/arch/arm/amlogic/meson_pwm.c

238

val = PWM_READ_REG(sc, MESON_PWM_MISC_AB_REG);

sys/arch/arm/amlogic/meson_pwm.c

239

val &= ~MESON_PWM_MISC_AB_B_CLK_DIV;

sys/arch/arm/amlogic/meson_pwm.c

241

old_div = __SHIFTOUT(val, MESON_PWM_MISC_AB_B_CLK_DIV);

sys/arch/arm/amlogic/meson_pwm.c

243

val |= __SHIFTIN(clk_div, MESON_PWM_MISC_AB_B_CLK_DIV);

sys/arch/arm/amlogic/meson_pwm.c

244

val &= ~MESON_PWM_MISC_AB_B_CLK_SEL;

sys/arch/arm/amlogic/meson_pwm.c

245

val |= __SHIFTIN(sc->sc_clksource, MESON_PWM_MISC_AB_B_CLK_SEL);

sys/arch/arm/amlogic/meson_pwm.c

246

val |= MESON_PWM_MISC_AB_B_CLK_EN;

sys/arch/arm/amlogic/meson_pwm.c

247

PWM_WRITE_REG(sc, MESON_PWM_MISC_AB_REG, val);

sys/arch/arm/amlogic/meson_pwm.c

248

val = PWM_READ_REG(sc, MESON_PWM_DUTYCYCLE_B_REG);

sys/arch/arm/amlogic/meson_pwm.c

250

old_hi = __SHIFTOUT(val, MESON_PWM_DUTYCYCLE_HIGH);

sys/arch/arm/amlogic/meson_pwm.c

251

old_lo = __SHIFTOUT(val, MESON_PWM_DUTYCYCLE_LOW);

sys/arch/arm/amlogic/meson_pwm.c

65

#define PWM_WRITE_REG(sc, reg, val) \

sys/arch/arm/amlogic/meson_pwm.c

66

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg) * 4, (val))

sys/arch/arm/amlogic/meson_pwm.c

99

uint32_t val;

sys/arch/arm/amlogic/meson_resets.c

103

const uint32_t val = RESET_READ(sc, reset_reg);

sys/arch/arm/amlogic/meson_resets.c

104

RESET_WRITE(sc, reset_reg, val | reset_mask);

sys/arch/arm/amlogic/meson_resets.c

61

#define RESET_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_resets.c

62

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_resets.c

88

const uint32_t val = RESET_READ(sc, reset_reg);

sys/arch/arm/amlogic/meson_resets.c

89

RESET_WRITE(sc, reset_reg, val & ~reset_mask);

sys/arch/arm/amlogic/meson_rtc.c

71

#define RTC_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_rtc.c

72

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_sdhc.c

138

#define SDHC_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_sdhc.c

139

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_sdhc.c

549

int val;

sys/arch/arm/amlogic/meson_sdhc.c

554

val = fdtbus_gpio_read(sc->sc_gpio_cd);

sys/arch/arm/amlogic/meson_sdhc.c

556

val = !val;

sys/arch/arm/amlogic/meson_sdhc.c

557

return val;

sys/arch/arm/amlogic/meson_sdhc.c

567

int val;

sys/arch/arm/amlogic/meson_sdhc.c

570

val = fdtbus_gpio_read(sc->sc_gpio_wp);

sys/arch/arm/amlogic/meson_sdhc.c

572

val = !val;

sys/arch/arm/amlogic/meson_sdhc.c

573

return val;

sys/arch/arm/amlogic/meson_sdio.c

128

#define SDIO_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_sdio.c

129

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_sdio.c

399

int val;

sys/arch/arm/amlogic/meson_sdio.c

404

val = fdtbus_gpio_read(sc->sc_gpio_cd);

sys/arch/arm/amlogic/meson_sdio.c

406

val = !val;

sys/arch/arm/amlogic/meson_sdio.c

407

return val;

sys/arch/arm/amlogic/meson_sdio.c

417

int val;

sys/arch/arm/amlogic/meson_sdio.c

420

val = fdtbus_gpio_read(sc->sc_gpio_wp);

sys/arch/arm/amlogic/meson_sdio.c

422

val = !val;

sys/arch/arm/amlogic/meson_sdio.c

423

return val;

sys/arch/arm/amlogic/meson_thermal.c

113

uint32_t val;

sys/arch/arm/amlogic/meson_thermal.c

115

val = THERMAL_READ_REG(sc, TS_CFG_REG1);

sys/arch/arm/amlogic/meson_thermal.c

116

val |= TS_CFG_REG1_ANA_EN_VCM;

sys/arch/arm/amlogic/meson_thermal.c

117

val |= TS_CFG_REG1_ANA_EN_VBG;

sys/arch/arm/amlogic/meson_thermal.c

118

val |= TS_CFG_REG1_FILTER_EN;

sys/arch/arm/amlogic/meson_thermal.c

119

val |= TS_CFG_REG1_DEM_EN;

sys/arch/arm/amlogic/meson_thermal.c

120

val &= ~TS_CFG_REG1_ANA_CH_SEL;

sys/arch/arm/amlogic/meson_thermal.c

121

val |= __SHIFTIN(3, TS_CFG_REG1_ANA_CH_SEL);

sys/arch/arm/amlogic/meson_thermal.c

122

THERMAL_WRITE_REG(sc, TS_CFG_REG1, val);

sys/arch/arm/amlogic/meson_thermal.c

128

val = AOSECURE_READ(sc, sc->sc_conf->aosec_reg);

sys/arch/arm/amlogic/meson_thermal.c

129

if ((val & TS_AO_CALIB_VERSION_MASK) != 0) {

sys/arch/arm/amlogic/meson_thermal.c

130

sc->sc_ao_calib = (val & TS_AO_CALIB_TEMP_MASK);

sys/arch/arm/amlogic/meson_thermal.c

131

if ((val & TS_AO_CALIB_SIGN_MASK) != 0)

sys/arch/arm/amlogic/meson_thermal.c

141

int val, temp;

sys/arch/arm/amlogic/meson_thermal.c

144

val = THERMAL_READ_REG(sc, TS_STAT0_REG) & TS_STAT0_FILTER_OUT;

sys/arch/arm/amlogic/meson_thermal.c

151

factor = (val * CALIB_n_1024) / 1024;

sys/arch/arm/amlogic/meson_thermal.c

152

uptat = (val * CALIB_m_1024) / 1024;

sys/arch/arm/amlogic/meson_thermal.c

66

#define THERMAL_WRITE_REG(sc, reg, val) \

sys/arch/arm/amlogic/meson_thermal.c

67

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg) * 4, (val))

sys/arch/arm/amlogic/meson_thermal.c

71

#define AOSECURE_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_thermal.c

72

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh_ao, (reg), (val))

sys/arch/arm/amlogic/meson_usbctrl.c

104

#define USBCTRL_WRITE_REG(sc, reg, val) \

sys/arch/arm/amlogic/meson_usbctrl.c

105

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_usbctrl.c

109

#define USBCTRLGLUE_WRITE_REG(sc, reg, val) \

sys/arch/arm/amlogic/meson_usbctrl.c

110

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh + (sc)->sc_conf->glue_offset, (reg), (val))

sys/arch/arm/amlogic/meson_usbctrl.c

190

uint32_t val;

sys/arch/arm/amlogic/meson_usbctrl.c

192

val = USBCTRLGLUE_READ_REG(sc, USB_R1_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

193

val &= ~USB_R1_U3H_FLADJ_30MHZ_REG_MASK;

sys/arch/arm/amlogic/meson_usbctrl.c

194

val |= __SHIFTIN(0x20, USB_R1_U3H_FLADJ_30MHZ_REG_MASK);

sys/arch/arm/amlogic/meson_usbctrl.c

195

USBCTRLGLUE_WRITE_REG(sc, USB_R1_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

197

val = USBCTRLGLUE_READ_REG(sc, USB_R5_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

198

val |= USB_R5_ID_DIG_EN_0;

sys/arch/arm/amlogic/meson_usbctrl.c

199

USBCTRLGLUE_WRITE_REG(sc, USB_R5_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

201

val = USBCTRLGLUE_READ_REG(sc, USB_R5_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

202

val |= USB_R5_ID_DIG_EN_1;

sys/arch/arm/amlogic/meson_usbctrl.c

203

USBCTRLGLUE_WRITE_REG(sc, USB_R5_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

205

val = USBCTRLGLUE_READ_REG(sc, USB_R5_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

206

val &= ~USB_R5_ID_DIG_TH_MASK;

sys/arch/arm/amlogic/meson_usbctrl.c

207

val |= __SHIFTIN(0xff, USB_R5_ID_DIG_TH_MASK);

sys/arch/arm/amlogic/meson_usbctrl.c

208

USBCTRLGLUE_WRITE_REG(sc, USB_R5_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

214

uint32_t val;

sys/arch/arm/amlogic/meson_usbctrl.c

216

val = USBCTRLGLUE_READ_REG(sc, USB_R3_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

217

val &= ~USB_R3_P30_SSC_RANGE_MASK;

sys/arch/arm/amlogic/meson_usbctrl.c

218

val &= ~USB_R3_P30_SSC_ENABLE;

sys/arch/arm/amlogic/meson_usbctrl.c

219

val |= __SHIFTIN(2, USB_R3_P30_SSC_RANGE_MASK);

sys/arch/arm/amlogic/meson_usbctrl.c

220

val |= USB_R3_P30_REF_SSP_EN;

sys/arch/arm/amlogic/meson_usbctrl.c

221

USBCTRLGLUE_WRITE_REG(sc, USB_R3_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

225

val = USBCTRLGLUE_READ_REG(sc, USB_R2_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

226

val &= ~USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK;

sys/arch/arm/amlogic/meson_usbctrl.c

227

val |= __SHIFTIN(0x15, USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK);

sys/arch/arm/amlogic/meson_usbctrl.c

228

USBCTRLGLUE_WRITE_REG(sc, USB_R2_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

230

val = USBCTRLGLUE_READ_REG(sc, USB_R2_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

231

val &= ~USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK;

sys/arch/arm/amlogic/meson_usbctrl.c

232

val |= __SHIFTIN(0x20, USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK);

sys/arch/arm/amlogic/meson_usbctrl.c

233

USBCTRLGLUE_WRITE_REG(sc, USB_R2_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

237

val = USBCTRLGLUE_READ_REG(sc, USB_R1_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

238

val |= USB_R1_U3H_HOST_PORT_POWER_CONTROL_PRESENT;

sys/arch/arm/amlogic/meson_usbctrl.c

239

USBCTRLGLUE_WRITE_REG(sc, USB_R1_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

241

val = USBCTRLGLUE_READ_REG(sc, USB_R1_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

242

val &= ~USB_R1_P30_PCS_TX_SWING_FULL_MASK;

sys/arch/arm/amlogic/meson_usbctrl.c

243

val |= __SHIFTIN(127, USB_R1_P30_PCS_TX_SWING_FULL_MASK);

sys/arch/arm/amlogic/meson_usbctrl.c

244

USBCTRLGLUE_WRITE_REG(sc, USB_R1_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

247

val = USBCTRLGLUE_READ_REG(sc, USB_R0_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

248

val &= ~USB_R0_U2D_ACT;

sys/arch/arm/amlogic/meson_usbctrl.c

249

USBCTRLGLUE_WRITE_REG(sc, USB_R0_REG, val);

sys/arch/arm/amlogic/meson_usbctrl.c

251

val = USBCTRLGLUE_READ_REG(sc, USB_R4_REG);

sys/arch/arm/amlogic/meson_usbctrl.c

252

val &= ~USB_R4_P21_SLEEP_M0;

sys/arch/arm/amlogic/meson_usbctrl.c

253

USBCTRLGLUE_WRITE_REG(sc, USB_R4_REG, val);

sys/arch/arm/amlogic/meson_usbphy.c

123

uint32_t val;

sys/arch/arm/amlogic/meson_usbphy.c

140

val = PHY_READ(sc, PREI_USB_PHY_CFG_REG);

sys/arch/arm/amlogic/meson_usbphy.c

141

val |= PREI_USB_PHY_CFG_CLK_32K_ALT_SEL;

sys/arch/arm/amlogic/meson_usbphy.c

142

PHY_WRITE(sc, PREI_USB_PHY_CFG_REG, val);

sys/arch/arm/amlogic/meson_usbphy.c

144

val = PHY_READ(sc, PREI_USB_PHY_CTRL_REG);

sys/arch/arm/amlogic/meson_usbphy.c

145

val &= ~PREI_USB_PHY_CTRL_FSEL;

sys/arch/arm/amlogic/meson_usbphy.c

146

val |= __SHIFTIN(PREI_USB_PHY_CTRL_FSEL_24M,

sys/arch/arm/amlogic/meson_usbphy.c

148

val |= PREI_USB_PHY_CTRL_POR;

sys/arch/arm/amlogic/meson_usbphy.c

149

PHY_WRITE(sc, PREI_USB_PHY_CTRL_REG, val);

sys/arch/arm/amlogic/meson_usbphy.c

153

val = PHY_READ(sc, PREI_USB_PHY_CTRL_REG);

sys/arch/arm/amlogic/meson_usbphy.c

154

val &= ~PREI_USB_PHY_CTRL_POR;

sys/arch/arm/amlogic/meson_usbphy.c

155

PHY_WRITE(sc, PREI_USB_PHY_CTRL_REG, val);

sys/arch/arm/amlogic/meson_usbphy.c

159

val = PHY_READ(sc, PREI_USB_PHY_CTRL_REG);

sys/arch/arm/amlogic/meson_usbphy.c

160

if ((val & PREI_USB_PHY_CTRL_CLK_DET) == 0)

sys/arch/arm/amlogic/meson_usbphy.c

164

val = PHY_READ(sc, PREI_USB_PHY_ADP_BC_REG);

sys/arch/arm/amlogic/meson_usbphy.c

165

val |= PREI_USB_PHY_ADP_BC_ACA_ENABLE;

sys/arch/arm/amlogic/meson_usbphy.c

166

PHY_WRITE(sc, PREI_USB_PHY_ADP_BC_REG, val);

sys/arch/arm/amlogic/meson_usbphy.c

170

val = PHY_READ(sc, PREI_USB_PHY_ADP_BC_REG);

sys/arch/arm/amlogic/meson_usbphy.c

171

if ((val & PREI_USB_PHY_ADP_BC_ACA_FLOATING) != 0)

sys/arch/arm/amlogic/meson_usbphy.c

82

#define PHY_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_usbphy.c

83

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_wdt.c

131

uint32_t val;

sys/arch/arm/amlogic/meson_wdt.c

150

val = WDT_READ(sc, WATCHDOG_TC_REG);

sys/arch/arm/amlogic/meson_wdt.c

151

val &= ~WATCHDOG_TC_ENABLE;

sys/arch/arm/amlogic/meson_wdt.c

152

WDT_WRITE(sc, WATCHDOG_TC_REG, val);

sys/arch/arm/amlogic/meson_wdt.c

71

#define WDT_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/meson_wdt.c

72

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/meson_wdt.c

78

uint32_t val;

sys/arch/arm/amlogic/meson_wdt.c

82

val = WDT_READ(sc, WATCHDOG_TC_REG);

sys/arch/arm/amlogic/meson_wdt.c

83

val &= ~WATCHDOG_TC_ENABLE;

sys/arch/arm/amlogic/meson_wdt.c

84

WDT_WRITE(sc, WATCHDOG_TC_REG, val);

sys/arch/arm/amlogic/mesong12_clkc.c

1258

uint32_t val, m, n, div_shift, div;

sys/arch/arm/amlogic/mesong12_clkc.c

1301

val = CLK_READ(sc, reg_cntl0);

sys/arch/arm/amlogic/mesong12_clkc.c

1302

m = __SHIFTOUT(val, __BITS(7,0));

sys/arch/arm/amlogic/mesong12_clkc.c

1303

n = __SHIFTOUT(val, __BITS(14,10));

sys/arch/arm/amlogic/mesong12_clkc.c

1304

div_shift = __SHIFTOUT(val, __BITS(18,16));

sys/arch/arm/amlogic/mesong12_clkc.c

1317

uint32_t val;

sys/arch/arm/amlogic/mesong12_clkc.c

1351

val = CLK_READ(sc, clk->u.mux.reg);

sys/arch/arm/amlogic/mesong12_clkc.c

1352

CLK_WRITE(sc, clk->u.mux.reg, val & ~__BIT(11));

sys/arch/arm/amlogic/mesong12_clkc.c

1359

val = CLK_READ(sc, reg_cntl0);

sys/arch/arm/amlogic/mesong12_clkc.c

1360

CLK_WRITE(sc, reg_cntl0, val | MESON_PLL_CNTL_REG_RST);

sys/arch/arm/amlogic/mesong12_clkc.c

1361

val = CLK_READ(sc, reg_cntl0);

sys/arch/arm/amlogic/mesong12_clkc.c

1362

CLK_WRITE(sc, reg_cntl0, val & ~MESON_PLL_CNTL_REG_EN);

sys/arch/arm/amlogic/mesong12_clkc.c

1373

val = CLK_READ(sc, reg_cntl0);

sys/arch/arm/amlogic/mesong12_clkc.c

1374

val &= ~__BITS(7,0);

sys/arch/arm/amlogic/mesong12_clkc.c

1375

val |= __SHIFTIN(new_m, __BITS(7,0));

sys/arch/arm/amlogic/mesong12_clkc.c

1376

val &= ~__BITS(14,10);

sys/arch/arm/amlogic/mesong12_clkc.c

1377

val |= __SHIFTIN(new_n, __BITS(14,10));

sys/arch/arm/amlogic/mesong12_clkc.c

1378

val &= ~__BITS(18,16);

sys/arch/arm/amlogic/mesong12_clkc.c

1379

val |= __SHIFTIN(new_div, __BITS(18,16));

sys/arch/arm/amlogic/mesong12_clkc.c

1380

CLK_WRITE(sc, reg_cntl0, val);

sys/arch/arm/amlogic/mesong12_clkc.c

1383

val = CLK_READ(sc, reg_cntl0);

sys/arch/arm/amlogic/mesong12_clkc.c

1384

CLK_WRITE(sc, reg_cntl0, val | MESON_PLL_CNTL_REG_RST);

sys/arch/arm/amlogic/mesong12_clkc.c

1385

val = CLK_READ(sc, reg_cntl0);

sys/arch/arm/amlogic/mesong12_clkc.c

1386

CLK_WRITE(sc, reg_cntl0, val | MESON_PLL_CNTL_REG_EN);

sys/arch/arm/amlogic/mesong12_clkc.c

1388

val = CLK_READ(sc, reg_cntl0);

sys/arch/arm/amlogic/mesong12_clkc.c

1389

CLK_WRITE(sc, reg_cntl0, val & ~MESON_PLL_CNTL_REG_RST);

sys/arch/arm/amlogic/mesong12_clkc.c

1400

val = CLK_READ(sc, clk->u.mux.reg);

sys/arch/arm/amlogic/mesong12_clkc.c

1401

CLK_WRITE(sc, clk->u.mux.reg, val | __BIT(11));

sys/arch/arm/amlogic/mesong12_usb2phy.c

155

#define USB2PHY_WRITE_REG(sc, reg, val) \

sys/arch/arm/amlogic/mesong12_usb2phy.c

156

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

128

uint32_t val;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

131

val = PHY_READ_REG(sc, USB3PCIEPHY_R5_REG);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

132

if (!(val & USB3PCIEPHY_R5_PHY_CR_ACK) == !ack)

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

145

uint32_t val;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

147

val = __SHIFTIN(addr, USB3PCIEPHY_R4_PHY_CR_DATA_IN);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

148

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

149

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

150

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val |

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

155

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

163

uint32_t val;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

172

val = PHY_READ_REG(sc, USB3PCIEPHY_R5_REG);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

177

return __SHIFTOUT(val, USB3PCIEPHY_R5_PHY_CR_DATA_OUT);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

184

uint32_t val;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

188

val = __SHIFTIN(addr, USB3PCIEPHY_R4_PHY_CR_DATA_IN);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

189

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

190

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

191

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val |

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

195

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

199

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

200

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val |

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

204

PHY_WRITE_REG(sc, USB3PCIEPHY_R4_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

213

uint32_t val;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

226

val = PHY_READ_REG(sc, USB3PCIEPHY_R0_REG);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

227

val &= ~USB3PCIEPHY_R0_PCIE_USB3_SWITCH;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

228

val |= __SHIFTIN(3, USB3PCIEPHY_R0_PCIE_USB3_SWITCH);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

229

PHY_WRITE_REG(sc, USB3PCIEPHY_R0_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

234

val = mesong12_usb3pciephy_read(sc, 0x102d);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

235

val |= __BIT(7);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

236

mesong12_usb3pciephy_write(sc, 0x102d, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

239

val = mesong12_usb3pciephy_read(sc, 0x1010);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

240

val &= ~__BITS(11,4);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

241

val |= __SHIFTIN(2, __BITS(11,4));

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

242

mesong12_usb3pciephy_write(sc, 0x1010, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

246

val = mesong12_usb3pciephy_read(sc, 0x1006);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

247

val &= ~__BITS(7,6);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

248

val |= __SHIFTIN(2, __BITS(7,6));

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

249

val &= ~__BITS(10,8);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

250

val |= __SHIFTIN(3, __BITS(10,8));

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

251

val |= __BIT(11);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

252

mesong12_usb3pciephy_write(sc, 0x1006, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

256

val = mesong12_usb3pciephy_read(sc, 0x1002);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

257

val &= ~__BITS(13,7);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

258

val |= __SHIFTIN(0x16, __BITS(13,7));

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

259

val &= ~__BITS(6,0);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

260

val |= __SHIFTIN(0x7f, __BITS(6,0));

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

261

val |= __BIT(14);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

262

mesong12_usb3pciephy_write(sc, 0x1002, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

265

val = mesong12_usb3pciephy_read(sc, 0x30);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

266

val &= ~__BITS(7,4);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

267

val |= __SHIFTIN(8, __BITS(7,4));

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

268

mesong12_usb3pciephy_write(sc, 0x30, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

271

val = PHY_READ_REG(sc, USB3PCIEPHY_R2_REG);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

272

val &= ~USB3PCIEPHY_R2_PHY_TX_VBOOST_LVL;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

273

val |= __SHIFTIN(4, USB3PCIEPHY_R2_PHY_TX_VBOOST_LVL);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

274

PHY_WRITE_REG(sc, USB3PCIEPHY_R2_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

276

val = PHY_READ_REG(sc, USB3PCIEPHY_R1_REG);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

277

val &= ~USB3PCIEPHY_R1_PHY_LOS_BIAS;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

278

val |= __SHIFTIN(4, USB3PCIEPHY_R1_PHY_LOS_BIAS);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

279

val &= ~USB3PCIEPHY_R1_PHY_LOS_LEVEL;

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

280

val |= __SHIFTIN(9, USB3PCIEPHY_R1_PHY_LOS_LEVEL);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

281

PHY_WRITE_REG(sc, USB3PCIEPHY_R1_REG, val);

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

69

#define PHY_WRITE_REG(sc, reg, val) \

sys/arch/arm/amlogic/mesong12_usb3pciephy.c

70

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/mesongx_mmc.c

1030

val = MMC_READ(sc, SD_EMMC_IRQ_EN);

sys/arch/arm/amlogic/mesongx_mmc.c

1031

MMC_WRITE(sc, SD_EMMC_IRQ_EN, val & ~irq_mask);

sys/arch/arm/amlogic/mesongx_mmc.c

1055

uint32_t val;

sys/arch/arm/amlogic/mesongx_mmc.c

1059

val = MMC_READ(sc, SD_EMMC_IRQ_EN);

sys/arch/arm/amlogic/mesongx_mmc.c

1060

MMC_WRITE(sc, SD_EMMC_IRQ_EN, val | IRQ_EN_IRQ_SDIO);

sys/arch/arm/amlogic/mesongx_mmc.c

260

#define MMC_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/mesongx_mmc.c

261

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/mesongx_mmc.c

471

uint32_t val;

sys/arch/arm/amlogic/mesongx_mmc.c

499

val = MMC_READ(sc, SD_EMMC_CFG);

sys/arch/arm/amlogic/mesongx_mmc.c

500

val |= CFG_STOP_CLK;

sys/arch/arm/amlogic/mesongx_mmc.c

501

MMC_WRITE(sc, SD_EMMC_CFG, val);

sys/arch/arm/amlogic/mesongx_mmc.c

503

val = MMC_READ(sc, SD_EMMC_CFG);

sys/arch/arm/amlogic/mesongx_mmc.c

505

val |= CFG_DDR;

sys/arch/arm/amlogic/mesongx_mmc.c

507

val &= ~CFG_DDR;

sys/arch/arm/amlogic/mesongx_mmc.c

508

MMC_WRITE(sc, SD_EMMC_CFG, val);

sys/arch/arm/amlogic/mesongx_mmc.c

510

val = MMC_READ(sc, SD_EMMC_CLOCK);

sys/arch/arm/amlogic/mesongx_mmc.c

512

val |= CLOCK_CFG_V3_ALWAYS_ON;

sys/arch/arm/amlogic/mesongx_mmc.c

514

val |= CLOCK_CFG_V2_ALWAYS_ON;

sys/arch/arm/amlogic/mesongx_mmc.c

515

val &= ~CLOCK_CFG_RX_PHASE;

sys/arch/arm/amlogic/mesongx_mmc.c

516

val |= __SHIFTIN(0, CLOCK_CFG_RX_PHASE);

sys/arch/arm/amlogic/mesongx_mmc.c

517

val &= ~CLOCK_CFG_TX_PHASE;

sys/arch/arm/amlogic/mesongx_mmc.c

518

val |= __SHIFTIN(0, CLOCK_CFG_TX_PHASE);

sys/arch/arm/amlogic/mesongx_mmc.c

519

val &= ~CLOCK_CFG_CO_PHASE;

sys/arch/arm/amlogic/mesongx_mmc.c

520

val |= __SHIFTIN(2, CLOCK_CFG_CO_PHASE);

sys/arch/arm/amlogic/mesongx_mmc.c

521

val &= ~CLOCK_CFG_SRC;

sys/arch/arm/amlogic/mesongx_mmc.c

522

val |= __SHIFTIN(best_sel, CLOCK_CFG_SRC);

sys/arch/arm/amlogic/mesongx_mmc.c

523

val &= ~CLOCK_CFG_DIV;

sys/arch/arm/amlogic/mesongx_mmc.c

524

val |= __SHIFTIN(best_div, CLOCK_CFG_DIV);

sys/arch/arm/amlogic/mesongx_mmc.c

525

MMC_WRITE(sc, SD_EMMC_CLOCK, val);

sys/arch/arm/amlogic/mesongx_mmc.c

527

val = MMC_READ(sc, SD_EMMC_CFG);

sys/arch/arm/amlogic/mesongx_mmc.c

528

val &= ~CFG_STOP_CLK;

sys/arch/arm/amlogic/mesongx_mmc.c

529

MMC_WRITE(sc, SD_EMMC_CFG, val);

sys/arch/arm/amlogic/mesongx_mmc.c

676

uint32_t val;

sys/arch/arm/amlogic/mesongx_mmc.c

680

val = MMC_READ(sc, SD_EMMC_CFG);

sys/arch/arm/amlogic/mesongx_mmc.c

681

val &= ~CFG_RC_CC;

sys/arch/arm/amlogic/mesongx_mmc.c

682

val |= __SHIFTIN(ilog2(16), CFG_RC_CC);

sys/arch/arm/amlogic/mesongx_mmc.c

683

val |= CFG_SDCLK_ALWAYS_ON;

sys/arch/arm/amlogic/mesongx_mmc.c

684

MMC_WRITE(sc, SD_EMMC_CFG, val);

sys/arch/arm/amlogic/mesongx_mmc.c

707

int val;

sys/arch/arm/amlogic/mesongx_mmc.c

716

val = fdtbus_gpio_read(sc->sc_gpio_cd);

sys/arch/arm/amlogic/mesongx_mmc.c

718

val = !val;

sys/arch/arm/amlogic/mesongx_mmc.c

719

return val;

sys/arch/arm/amlogic/mesongx_mmc.c

729

int val;

sys/arch/arm/amlogic/mesongx_mmc.c

732

val = fdtbus_gpio_read(sc->sc_gpio_wp);

sys/arch/arm/amlogic/mesongx_mmc.c

734

val = !val;

sys/arch/arm/amlogic/mesongx_mmc.c

735

return val;

sys/arch/arm/amlogic/mesongx_mmc.c

759

uint32_t val;

sys/arch/arm/amlogic/mesongx_mmc.c

761

val = MMC_READ(sc, SD_EMMC_CFG);

sys/arch/arm/amlogic/mesongx_mmc.c

762

val &= ~CFG_BUS_WIDTH;

sys/arch/arm/amlogic/mesongx_mmc.c

766

val |= __SHIFTIN(CFG_BUS_WIDTH_1, CFG_BUS_WIDTH);

sys/arch/arm/amlogic/mesongx_mmc.c

769

val |= __SHIFTIN(CFG_BUS_WIDTH_4, CFG_BUS_WIDTH);

sys/arch/arm/amlogic/mesongx_mmc.c

772

val |= __SHIFTIN(CFG_BUS_WIDTH_8, CFG_BUS_WIDTH);

sys/arch/arm/amlogic/mesongx_mmc.c

778

MMC_WRITE(sc, SD_EMMC_CFG, val);

sys/arch/arm/amlogic/mesongx_mmc.c

950

uint32_t cmdflags, val;

sys/arch/arm/amlogic/mesongx_mmc.c

971

val = MMC_READ(sc, SD_EMMC_IRQ_EN);

sys/arch/arm/amlogic/mesongx_mmc.c

972

MMC_WRITE(sc, SD_EMMC_IRQ_EN, val | irq_mask);

sys/arch/arm/amlogic/mesongx_mmc.c

995

val = MMC_READ(sc, SD_EMMC_CFG);

sys/arch/arm/amlogic/mesongx_mmc.c

996

val &= ~CFG_BL_LEN;

sys/arch/arm/amlogic/mesongx_mmc.c

997

val |= __SHIFTIN(ilog2(cmd->c_blklen), CFG_BL_LEN);

sys/arch/arm/amlogic/mesongx_mmc.c

998

MMC_WRITE(sc, SD_EMMC_CFG, val);

sys/arch/arm/amlogic/mesongx_wdt.c

74

#define WDT_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/mesongx_wdt.c

75

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/mesongxl_usb2phy.c

101

val = PHY_READ(sc, USB2PHY_REG0);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

102

val |= REG0_DM_PULLDOWN;

sys/arch/arm/amlogic/mesongxl_usb2phy.c

103

val |= REG0_DP_PULLDOWN;

sys/arch/arm/amlogic/mesongxl_usb2phy.c

104

val &= ~REG0_ID_PULLUP;

sys/arch/arm/amlogic/mesongxl_usb2phy.c

105

PHY_WRITE(sc, USB2PHY_REG0, val);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

108

val = PHY_READ(sc, USB2PHY_REG0);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

109

val |= REG0_POWER_ON_RESET;

sys/arch/arm/amlogic/mesongxl_usb2phy.c

110

PHY_WRITE(sc, USB2PHY_REG0, val);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

112

val = PHY_READ(sc, USB2PHY_REG0);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

113

val &= ~REG0_POWER_ON_RESET;

sys/arch/arm/amlogic/mesongxl_usb2phy.c

114

PHY_WRITE(sc, USB2PHY_REG0, val);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

123

val = PHY_READ(sc, USB2PHY_REG0);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

124

val |= REG0_POWER_ON_RESET;

sys/arch/arm/amlogic/mesongxl_usb2phy.c

125

PHY_WRITE(sc, USB2PHY_REG0, val);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

68

#define PHY_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/mesongxl_usb2phy.c

69

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/mesongxl_usb2phy.c

92

uint32_t val;

sys/arch/arm/amlogic/mesongxl_usb2phy.c

96

val = PHY_READ(sc, USB2PHY_REG0);

sys/arch/arm/amlogic/mesongxl_usb2phy.c

97

val &= ~REG0_POWER_ON_RESET;

sys/arch/arm/amlogic/mesongxl_usb2phy.c

98

PHY_WRITE(sc, USB2PHY_REG0, val);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

103

val = PHY_READ(sc, USB3PHY_REG5);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

104

val |= REG5_ID_DIG_EN_0;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

105

val |= REG5_ID_DIG_EN_1;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

106

val &= ~REG5_ID_DIG_TH;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

107

val |= __SHIFTIN(0xff, REG5_ID_DIG_TH);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

108

PHY_WRITE(sc, USB3PHY_REG5, val);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

111

val = PHY_READ(sc, USB3PHY_REG0);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

112

val &= ~REG0_U2D_ACT;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

113

PHY_WRITE(sc, USB3PHY_REG0, val);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

115

val = PHY_READ(sc, USB3PHY_REG4);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

116

val &= ~REG4_P21_SLEEP_M0;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

117

PHY_WRITE(sc, USB3PHY_REG4, val);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

120

val = PHY_READ(sc, USB3PHY_REG5);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

121

val &= ~REG5_ID_DIG_EN_0;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

122

val &= ~REG5_ID_DIG_EN_1;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

123

PHY_WRITE(sc, USB3PHY_REG5, val);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

138

uint32_t val;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

140

val = PHY_READ(sc, USB3PHY_REG1);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

141

val &= ~REG1_U3H_FLADJ_30MHZ_REG;

sys/arch/arm/amlogic/mesongxl_usb3phy.c

142

val |= __SHIFTIN(0x20, REG1_U3H_FLADJ_30MHZ_REG);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

143

PHY_WRITE(sc, USB3PHY_REG1, val);

sys/arch/arm/amlogic/mesongxl_usb3phy.c

75

#define PHY_WRITE(sc, reg, val) \

sys/arch/arm/amlogic/mesongxl_usb3phy.c

76

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/amlogic/mesongxl_usb3phy.c

99

uint32_t val;

sys/arch/arm/apple/apple_dart.c

160

#define DART_WRITE(sc, reg, val) \

sys/arch/arm/apple/apple_dart.c

161

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/apple/apple_iic.c

80

#define IIC_WRITE(sc, reg, val) \

sys/arch/arm/apple/apple_iic.c

81

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/apple/apple_intc.c

120

#define AIC_WRITE(sc, reg, val) \

sys/arch/arm/apple/apple_intc.c

121

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/apple/apple_mbox.c

73

#define MBOX_WRITE4(sc, reg, val) \

sys/arch/arm/apple/apple_mbox.c

74

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/apple/apple_mbox.c

75

#define MBOX_WRITE8(sc, reg, val) \

sys/arch/arm/apple/apple_mbox.c

76

bus_space_write_8((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/apple/apple_pcie.c

131

#define RWRITE4(sc, reg, val) \

sys/arch/arm/apple/apple_pcie.c

132

bus_space_write_4((sc)->sc_rc_bst, (sc)->sc_rc_bsh, (reg), (val))

sys/arch/arm/apple/apple_pcie.c

173

#define PWRITE4(bst, bsh, reg, val) \

sys/arch/arm/apple/apple_pcie.c

174

bus_space_write_4((bst), (bsh), (reg), (val))

sys/arch/arm/apple/apple_pcie.c

529

uint32_t val;

sys/arch/arm/apple/apple_pcie.c

548

val = bus_space_read_4(bst, bsh,

sys/arch/arm/apple/apple_pcie.c

550

val &= ~PCI_MSIX_VECTCTL_MASK;

sys/arch/arm/apple/apple_pcie.c

552

val);

sys/arch/arm/apple/apple_pinctrl.c

176

int val = __SHIFTOUT(reg, GPIO_PIN_DATA);

sys/arch/arm/apple/apple_pinctrl.c

178

val = !val;

sys/arch/arm/apple/apple_pinctrl.c

180

return val;

sys/arch/arm/apple/apple_pinctrl.c

184

apple_pinctrl_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/apple/apple_pinctrl.c

192

val = !val;

sys/arch/arm/apple/apple_pinctrl.c

194

if (val)

sys/arch/arm/apple/apple_pinctrl.c

82

#define PINCTRL_WRITE(sc, reg, val) \

sys/arch/arm/apple/apple_pinctrl.c

83

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/apple/apple_pmgr.c

60

#define PMGR_WRITE(sc, reg, val) \

sys/arch/arm/apple/apple_pmgr.c

61

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/apple/apple_pmgr.c

85

uint32_t val = PMGR_READ(sc, off);

sys/arch/arm/apple/apple_pmgr.c

87

val &= ~PMGR_PS_TARGET_MASK;

sys/arch/arm/apple/apple_pmgr.c

88

val |= __SHIFTIN(pstate, PMGR_PS_TARGET_MASK);

sys/arch/arm/apple/apple_pmgr.c

89

PMGR_WRITE(sc, off, val);

sys/arch/arm/apple/apple_pmgr.c

92

val = PMGR_READ(sc, off);

sys/arch/arm/apple/apple_pmgr.c

93

if (__SHIFTOUT(val, PMGR_PS_ACTUAL_MASK) == pstate)

sys/arch/arm/apple/apple_smc.c

274

apple_smc_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/apple/apple_smc.c

287

val = !val;

sys/arch/arm/apple/apple_smc.c

288

data = SMC_GPIO_CMD_OUTPUT | !!val;

sys/arch/arm/apple/apple_wdog.c

62

#define WDOG_WRITE(sc, reg, val) \

sys/arch/arm/apple/apple_wdog.c

63

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/arm/bootconfig.c

171

match_bootconf_option(char *opts, const char *key, const char *val)

sys/arch/arm/arm/bootconfig.c

178

return strncmp(s, val, strlen(val)) == 0;

sys/arch/arm/arm/efi_runtime.c

72

int val;

sys/arch/arm/arm/efi_runtime.c

75

BOOTOPT_TYPE_BOOLEAN, &val) && val) {

sys/arch/arm/arm/trap.c

46

cpu_jump_onfault(struct trapframe *tf, const struct faultbuf *fb, int val)

sys/arch/arm/arm/trap.c

59

tf->tf_r0 = val;

sys/arch/arm/arm32/arm11_pmc.c

101

arm11_pmc_ctrl_write(val);

sys/arch/arm/arm32/arm11_pmc.c

62

uint32_t val;

sys/arch/arm/arm32/arm11_pmc.c

64

__asm volatile ("mrc p15, 0, %0, c15, c12, 0" : "=r" (val));

sys/arch/arm/arm32/arm11_pmc.c

66

return val;

sys/arch/arm/arm32/arm11_pmc.c

70

arm11_pmc_ctrl_write(uint32_t val)

sys/arch/arm/arm32/arm11_pmc.c

72

__asm volatile ("mcr p15, 0, %0, c15, c12, 0" :: "r" (val));

sys/arch/arm/arm32/arm11_pmc.c

78

uint32_t val;

sys/arch/arm/arm32/arm11_pmc.c

80

__asm volatile ("mrc p15, 0, %0, c15, c12, 1" : "=r" (val));

sys/arch/arm/arm32/arm11_pmc.c

82

return val;

sys/arch/arm/arm32/arm11_pmc.c

86

arm11_pmc_ccnt_write(uint32_t val)

sys/arch/arm/arm32/arm11_pmc.c

88

__asm volatile ("mcr p15, 0, %0, c15, c12, 1;" :: "r" (val));

sys/arch/arm/arm32/arm11_pmc.c

97

uint32_t val;

sys/arch/arm/arm32/arm11_pmc.c

99

val = ARM11_PMCCTL_E | ARM11_PMCCTL_P | ARM11_PMCCTL_C;

sys/arch/arm/arm32/sys_machdep.c

173

u_int val = (u_int)addr;

sys/arch/arm/arm32/sys_machdep.c

175

armreg_tpidruro_write(val);

sys/arch/arm/at91/at91emac.c

496

emac_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/arm/at91/at91emac.c

508

*val = EMAC_READ(ETH_MAN) & ETH_MAN_DATA;

sys/arch/arm/at91/at91emac.c

514

emac_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/arm/at91/at91emac.c

524

| (val & ETH_MAN_DATA)));

sys/arch/arm/at91/at91pio.c

444

at91pio_pin_write(void *arg, int pin, int val)

sys/arch/arm/at91/at91pio.c

452

if (val)

sys/arch/arm/at91/at91twi.c

137

at91twi_writereg(struct at91twi_softc *sc, int reg, u_int val)

sys/arch/arm/at91/at91twi.c

139

bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);

sys/arch/arm/at91/at91usart.c

219

at91usart_writereg(struct at91usart_softc *sc, int reg, u_int val)

sys/arch/arm/at91/at91usart.c

221

bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);

sys/arch/arm/broadcom/bcm2835_aux.c

207

uint32_t val;

sys/arch/arm/broadcom/bcm2835_aux.c

209

val = BCMAUX_READ(sc, BCMAUX_AUXENB_REG);

sys/arch/arm/broadcom/bcm2835_aux.c

210

val |= auxclk->mask;

sys/arch/arm/broadcom/bcm2835_aux.c

211

BCMAUX_WRITE(sc, BCMAUX_AUXENB_REG, val);

sys/arch/arm/broadcom/bcm2835_aux.c

221

uint32_t val;

sys/arch/arm/broadcom/bcm2835_aux.c

223

val = BCMAUX_READ(sc, BCMAUX_AUXENB_REG);

sys/arch/arm/broadcom/bcm2835_aux.c

224

val &= ~auxclk->mask;

sys/arch/arm/broadcom/bcm2835_aux.c

225

BCMAUX_WRITE(sc, BCMAUX_AUXENB_REG, val);

sys/arch/arm/broadcom/bcm2835_aux.c

94

#define BCMAUX_WRITE(sc, reg, val) \

sys/arch/arm/broadcom/bcm2835_aux.c

95

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/broadcom/bcm2835_cm.c

59

#define CM_WRITE(sc, reg, val) \

sys/arch/arm/broadcom/bcm2835_cm.c

60

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/broadcom/bcm2835_dmac.c

119

uint32_t val;

sys/arch/arm/broadcom/bcm2835_dmac.c

165

val = DMAC_READ(sc, DMAC_CS(index));

sys/arch/arm/broadcom/bcm2835_dmac.c

166

val |= DMAC_CS_RESET;

sys/arch/arm/broadcom/bcm2835_dmac.c

167

DMAC_WRITE(sc, DMAC_CS(index), val);

sys/arch/arm/broadcom/bcm2835_dmac.c

259

uint32_t val;

sys/arch/arm/broadcom/bcm2835_dmac.c

264

val = DMAC_READ(sc, DMAC_CS(ch->ch_index));

sys/arch/arm/broadcom/bcm2835_dmac.c

265

val |= DMAC_CS_RESET;

sys/arch/arm/broadcom/bcm2835_dmac.c

266

val &= ~DMAC_CS_ACTIVE;

sys/arch/arm/broadcom/bcm2835_dmac.c

267

DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);

sys/arch/arm/broadcom/bcm2835_dmac.c

289

uint32_t val;

sys/arch/arm/broadcom/bcm2835_dmac.c

291

val = DMAC_READ(sc, DMAC_CS(ch->ch_index));

sys/arch/arm/broadcom/bcm2835_dmac.c

292

if (val & DMAC_CS_ACTIVE)

sys/arch/arm/broadcom/bcm2835_dmac.c

295

val |= DMAC_CS_ACTIVE;

sys/arch/arm/broadcom/bcm2835_dmac.c

296

DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);

sys/arch/arm/broadcom/bcm2835_dmac.c

305

uint32_t val;

sys/arch/arm/broadcom/bcm2835_dmac.c

308

val = DMAC_READ(sc, DMAC_CS(ch->ch_index));

sys/arch/arm/broadcom/bcm2835_dmac.c

309

val &= ~DMAC_CS_ACTIVE;

sys/arch/arm/broadcom/bcm2835_dmac.c

310

DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);

sys/arch/arm/broadcom/bcm2835_dmac.c

318

val |= DMAC_CS_ACTIVE | DMAC_CS_ABORT;

sys/arch/arm/broadcom/bcm2835_dmac.c

319

DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);

sys/arch/arm/broadcom/bcm2835_dmac.c

84

#define DMAC_WRITE(sc, reg, val) \

sys/arch/arm/broadcom/bcm2835_dmac.c

85

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/broadcom/bcm2835_gpio.c

737

uint32_t val;

sys/arch/arm/broadcom/bcm2835_gpio.c

740

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh,

sys/arch/arm/broadcom/bcm2835_gpio.c

743

res = val & (1 << (pin % BCM2835_GPIO_GPLEV_PINS_PER_REGISTER)) ?

sys/arch/arm/broadcom/bcm2835_gpio.c

965

int val;

sys/arch/arm/broadcom/bcm2835_gpio.c

967

val = bcm2835gpio_gpio_pin_read(sc, gpin->pin_no);

sys/arch/arm/broadcom/bcm2835_gpio.c

970

val = !val;

sys/arch/arm/broadcom/bcm2835_gpio.c

972

return val;

sys/arch/arm/broadcom/bcm2835_gpio.c

976

bcmgpio_fdt_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/broadcom/bcm2835_gpio.c

982

val = !val;

sys/arch/arm/broadcom/bcm2835_gpio.c

984

bcm2835gpio_gpio_pin_write(sc, gpin->pin_no, val);

sys/arch/arm/broadcom/bcm2835_intr.c

705

uint32_t val = bus_space_read_4(iot, ioh,

sys/arch/arm/broadcom/bcm2835_intr.c

707

val |= mask;

sys/arch/arm/broadcom/bcm2835_intr.c

710

val);

sys/arch/arm/broadcom/bcm2835_intr.c

718

uint32_t val = bus_space_read_4(iot, ioh,

sys/arch/arm/broadcom/bcm2835_intr.c

720

val |= mask;

sys/arch/arm/broadcom/bcm2835_intr.c

723

val);

sys/arch/arm/broadcom/bcm2835_intr.c

752

uint32_t val = bus_space_read_4(iot, ioh,

sys/arch/arm/broadcom/bcm2835_intr.c

754

val &= ~mask;

sys/arch/arm/broadcom/bcm2835_intr.c

757

val);

sys/arch/arm/broadcom/bcm2835_intr.c

761

uint32_t val = bus_space_read_4(iot, ioh,

sys/arch/arm/broadcom/bcm2835_intr.c

763

val &= ~mask;

sys/arch/arm/broadcom/bcm2835_intr.c

766

val);

sys/arch/arm/broadcom/bcm2835_pwm.c

79

#define PWM_WRITE(sc, reg, val) \

sys/arch/arm/broadcom/bcm2835_pwm.c

80

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/broadcom/bcm2835_sdhost.c

172

#define SDHOST_WRITE(sc, reg, val) \

sys/arch/arm/broadcom/bcm2835_sdhost.c

173

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/broadcom/bcm283x_platform.c

1137

uint32_t val;

sys/arch/arm/broadcom/bcm283x_platform.c

1140

val = (cur->cmap.red[i] << 16 ) |

sys/arch/arm/broadcom/bcm283x_platform.c

1144

cursor_cmap[i + cur->cmap.index + 2] = val;

sys/arch/arm/broadcom/bcm53xx_board.c

656

bcm53xx_srab_write_4(u_int pageoffset, uint32_t val)

sys/arch/arm/broadcom/bcm53xx_board.c

664

bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_WDL, val);

sys/arch/arm/broadcom/bcm53xx_board.c

673

bcm53xx_srab_write_8(u_int pageoffset, uint64_t val)

sys/arch/arm/broadcom/bcm53xx_board.c

681

bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_WDL, val);

sys/arch/arm/broadcom/bcm53xx_board.c

682

bus_space_write_4(bst, bsh, SRAB_BASE + SRAB_WDH, val >> 32);

sys/arch/arm/broadcom/bcm53xx_mdio.c

146

int val = __SHIFTOUT(bcmmdio_read_4(sc, MIICMD), MIICMD_DATA);

sys/arch/arm/broadcom/bcm53xx_mdio.c

148

return val;

sys/arch/arm/broadcom/bcm53xx_mdio.c

152

bcmmdio_mii_writereg(device_t self, int phy, int reg, int val)

sys/arch/arm/broadcom/bcm53xx_mdio.c

156

KASSERT((val & 0xffff) == val);

sys/arch/arm/broadcom/bcm53xx_mdio.c

162

bcmmdio_write_4(sc, MIICMD, MIICMD_WR(phy, reg, val));

sys/arch/arm/broadcom/bcm53xx_pax.c

469

bcmpax_conf_write(void *v, pcitag_t tag, int reg, pcireg_t val)

sys/arch/arm/broadcom/bcm53xx_pax.c

483

bcmpax_write_4(sc, data_reg, val);

sys/arch/arm/clps711x/clpscom.c

1034

#define CLPSCOM_CNWRITE(val) \

sys/arch/arm/clps711x/clpscom.c

1035

(*(volatile uint8_t *)(clpscom_cnaddr + PS711X_UARTDR) = val)

sys/arch/arm/clps711x/clpscom.c

69

#define CLPSCOM_WRITE_CON(sc, val) \

sys/arch/arm/clps711x/clpscom.c

70

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, PS711X_SYSCON, (val))

sys/arch/arm/clps711x/clpscom.c

73

#define CLPSCOM_WRITE_FLG(sc, val) \

sys/arch/arm/clps711x/clpscom.c

74

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, PS711X_SYSFLG, (val))

sys/arch/arm/clps711x/clpscom.c

77

#define CLPSCOM_WRITE(sc, val) \

sys/arch/arm/clps711x/clpscom.c

78

bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, PS711X_UARTDR, (val))

sys/arch/arm/clps711x/clpscom.c

79

#define CLPSCOM_WRITE_MULTI(sc, val, n) \

sys/arch/arm/clps711x/clpscom.c

80

bus_space_write_multi_1((sc)->sc_iot, (sc)->sc_ioh, PS711X_UARTDR, (val), (n))

sys/arch/arm/clps711x/clpscom.c

83

#define CLPSCOM_WRITE_UBRLCR(sc, val) \

sys/arch/arm/clps711x/clpscom.c

84

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, PS711X_UBRLCR, (val))

sys/arch/arm/cortex/gic_v2m.c

186

uint32_t val;

sys/arch/arm/cortex/gic_v2m.c

202

val = bus_space_read_4(bst, bsh, entry_base + PCI_MSIX_TABLE_ENTRY_VECTCTL);

sys/arch/arm/cortex/gic_v2m.c

203

val &= ~PCI_MSIX_VECTCTL_MASK;

sys/arch/arm/cortex/gic_v2m.c

204

bus_space_write_4(bst, bsh, entry_base + PCI_MSIX_TABLE_ENTRY_VECTCTL, val);

sys/arch/arm/cortex/gicv3.c

101

bus_space_write_8(sc->sc_bst, sc->sc_bsh_d, reg, val);

sys/arch/arm/cortex/gicv3.c

112

gicr_write_4(struct gicv3_softc *sc, u_int index, bus_size_t reg, uint32_t val)

sys/arch/arm/cortex/gicv3.c

115

bus_space_write_4(sc->sc_bst, sc->sc_bsh_r[index], reg, val);

sys/arch/arm/cortex/gicv3.c

126

gicr_write_8(struct gicv3_softc *sc, u_int index, bus_size_t reg, uint64_t val)

sys/arch/arm/cortex/gicv3.c

129

bus_space_write_8(sc->sc_bst, sc->sc_bsh_r[index], reg, val);

sys/arch/arm/cortex/gicv3.c

85

gicd_write_4(struct gicv3_softc *sc, bus_size_t reg, uint32_t val)

sys/arch/arm/cortex/gicv3.c

87

bus_space_write_4(sc->sc_bst, sc->sc_bsh_d, reg, val);

sys/arch/arm/cortex/gicv3.c

99

gicd_write_8(struct gicv3_softc *sc, bus_size_t reg, uint64_t val)

sys/arch/arm/cortex/gicv3_its.c

105

gits_write_4(struct gicv3_its *its, bus_size_t reg, uint32_t val)

sys/arch/arm/cortex/gicv3_its.c

107

bus_space_write_4(its->its_bst, its->its_bsh, reg, val);

sys/arch/arm/cortex/gicv3_its.c

117

gits_write_8(struct gicv3_its *its, bus_size_t reg, uint64_t val)

sys/arch/arm/cortex/gicv3_its.c

119

bus_space_write_8(its->its_bst, its->its_bsh, reg, val);

sys/arch/arm/cortex/gicv3_its.c

605

uint32_t val;

sys/arch/arm/cortex/gicv3_its.c

619

val = bus_space_read_4(bst, bsh, entry_base + PCI_MSIX_TABLE_ENTRY_VECTCTL);

sys/arch/arm/cortex/gicv3_its.c

620

val &= ~PCI_MSIX_VECTCTL_MASK;

sys/arch/arm/cortex/gicv3_its.c

621

bus_space_write_4(bst, bsh, entry_base + PCI_MSIX_TABLE_ENTRY_VECTCTL, val);

sys/arch/arm/cortex/gtmr.c

192

uint64_t val;

sys/arch/arm/cortex/gtmr.c

195

val = sc->sc_physical ? gtmr_cntpct_read() : gtmr_cntvct_read();

sys/arch/arm/cortex/gtmr.c

196

bits = val & __BITS(9,0);

sys/arch/arm/cortex/gtmr.c

198

return val;

sys/arch/arm/cortex/gtmr.c

216

gtmr_write_ctl(struct gtmr_softc *sc, uint32_t val)

sys/arch/arm/cortex/gtmr.c

219

gtmr_cntp_ctl_write(val);

sys/arch/arm/cortex/gtmr.c

221

gtmr_cntv_ctl_write(val);

sys/arch/arm/cortex/gtmr.c

227

gtmr_write_tval(struct gtmr_softc *sc, uint32_t val)

sys/arch/arm/cortex/gtmr.c

230

gtmr_cntp_tval_write(val);

sys/arch/arm/cortex/gtmr.c

232

gtmr_cntv_tval_write(val);

sys/arch/arm/cortex/gtmr.c

238

gtmr_write_cval(struct gtmr_softc *sc, uint64_t val)

sys/arch/arm/cortex/gtmr.c

241

gtmr_cntp_cval_write(val);

sys/arch/arm/cortex/gtmr.c

243

gtmr_cntv_cval_write(val);

sys/arch/arm/cortex/pl310.c

211

arml2cc_cache_op(struct arml2cc_softc *sc, bus_size_t off, uint32_t val,

sys/arch/arm/cortex/pl310.c

214

arml2cc_write_4(sc, off, val);

sys/arch/arm/ep93xx/epe.c

435

epe_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/arm/ep93xx/epe.c

444

*val = EPE_READ(MIIData) & 0xffff;

sys/arch/arm/ep93xx/epe.c

450

epe_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/arm/ep93xx/epe.c

456

EPE_WRITE(MIIData, val);

sys/arch/arm/ep93xx/epgpio.c

135

int dir, val;

sys/arch/arm/ep93xx/epgpio.c

277

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, pi->pxdr) & 0xff;

sys/arch/arm/ep93xx/epgpio.c

299

if((val >> j) & 0x01)

sys/arch/arm/ep93xx/epgpio.c

615

epgpio_pin_write(void *arg, int pin, int val)

sys/arch/arm/ep93xx/epgpio.c

624

if (val)

sys/arch/arm/fdt/pcihost_fdt.c

441

pcihost_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/fdt/pcihost_fdt.c

464

bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg, val);

sys/arch/arm/fdt/plfb_fdt.c

109

#define FB_WRITE(sc, reg, val) \

sys/arch/arm/fdt/plfb_fdt.c

110

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/fdt/psci_fdt.c

111

uint32_t val;

sys/arch/arm/fdt/psci_fdt.c

135

if (of_getprop_uint32(phandle, "cpu_on", &val) == 0)

sys/arch/arm/fdt/psci_fdt.c

136

psci_setfunc(PSCI_FUNC_CPU_ON, val);

sys/arch/arm/footbridge/isa/dsrtc.c

128

ds1687_ram_write(struct dsrtc_softc *sc, int addr, int val)

sys/arch/arm/footbridge/isa/dsrtc.c

131

return(ds1687_write(sc, RTC_PC_RAM_START + addr, val));

sys/arch/arm/footbridge/isa/dsrtc.c

135

return(ds1687_write(sc, RTC_BANK0_RAM_START + addr, val));

sys/arch/arm/footbridge/isa/dsrtc.c

141

ds1687_write(sc, RTC_EXT_RAM_DATA, val);

sys/arch/arm/footbridge/isa/isa_machdep.c

530

isa_fillw(u_int val, void *addr, size_t len)

sys/arch/arm/footbridge/isa/isa_machdep.c

537

val, len);

sys/arch/arm/footbridge/isa/isa_machdep.c

542

*ptr++ = val;

sys/arch/arm/gemini/gemini_gmac.c

392

geminigmac_mii_readreg(device_t dv, int phy, int reg, uint16_t *val)

sys/arch/arm/gemini/gemini_gmac.c

400

reg, val);

sys/arch/arm/gemini/gemini_gmac.c

409

geminigmac_mii_writereg(device_t dv, int phy, int reg, uint16_t val)

sys/arch/arm/gemini/gemini_gmac.c

418

reg, val);

sys/arch/arm/gemini/gemini_gpio.c

107

#define GPIO_WRITE(gpio, reg, val) \

sys/arch/arm/gemini/gemini_gpio.c

108

bus_space_write_4((gpio)->gpio_memt, (gpio)->gpio_memh, (reg), (val))

sys/arch/arm/gemini/gemini_lpc.c

178

it8712_pnp_write(lpctag_t tag, int ldn, uint index, uint8_t val)

sys/arch/arm/gemini/gemini_lpc.c

189

bus_space_write_1(iot, ioh, IT8712_DATA, val);

sys/arch/arm/gemini/gemini_lpcvar.h

57

lpc_pnp_write(lpctag_t tag, int ldn, uint off, uint8_t val)

sys/arch/arm/gemini/gemini_lpcvar.h

60

return (*sc->sc_bus_ops->lpc_pnp_write)(tag, ldn, off, val);

sys/arch/arm/gemini/gemini_pci.c

330

gemini_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/gemini/gemini_pci.c

348

GEMINI_PCI_CFG_DATA, val);

sys/arch/arm/gemini/gemini_timer.c

192

_timer_reload(struct geminitmr_softc *sc, uint32_t val)

sys/arch/arm/gemini/gemini_timer.c

195

GEMINI_TIMERn_COUNTER(sc->sc_timerno), val);

sys/arch/arm/imx/if_enet.c

1051

enet_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/arch/arm/imx/if_enet.c

1078

*val = ENET_REG_READ(sc, ENET_MMFR) & ENET_MMFR_DATAMASK;

sys/arch/arm/imx/if_enet.c

1084

enet_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/arch/arm/imx/if_enet.c

1098

(ENET_MMFR_DATAMASK & val));

sys/arch/arm/imx/if_enet.c

1734

uint32_t val;

sys/arch/arm/imx/if_enet.c

1787

val = (sc->sc_clock + (5000000 - 1)) / 5000000 - 1;

sys/arch/arm/imx/if_enet.c

1788

ENET_REG_WRITE(sc, ENET_MSCR, __SHIFTIN(val, ENET_MSCR_MII_SPEED));

sys/arch/arm/imx/if_enet.c

1817

val = ENET_DEFAULT_PKT_LEN;

sys/arch/arm/imx/if_enet.c

1818

ENET_REG_WRITE(sc, ENET_FTRL, val); /* Frame Truncation Length */

sys/arch/arm/imx/if_enet.c

1830

ENET_RCR_MAX_FL(val));

sys/arch/arm/imx/if_enet.c

1848

val = ENET_EIR_TXF | ENET_EIR_RXF | ENET_EIR_EBERR;

sys/arch/arm/imx/if_enet.c

1850

val |= ENET_EIR_TXF2 | ENET_EIR_RXF2 | ENET_EIR_TXF1 |

sys/arch/arm/imx/if_enet.c

1852

ENET_REG_WRITE(sc, ENET_EIMR, val);

sys/arch/arm/imx/imx23_apbdma.c

329

uint8_t val;

sys/arch/arm/imx/imx23_apbdma.c

356

val = __SHIFTIN(1, HW_APBH_CH0_SEMA_INCREMENT_SEMA);

sys/arch/arm/imx/imx23_apbdma.c

359

val = __SHIFTIN(1, HW_APBX_CH0_SEMA_INCREMENT_SEMA);

sys/arch/arm/imx/imx23_apbdma.c

361

DMA_WR(sc, reg, val);

sys/arch/arm/imx/imx23_apbdma.c

92

#define DMA_WR(sc, reg, val) \

sys/arch/arm/imx/imx23_apbdma.c

93

bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val))

sys/arch/arm/imx/imx23_clkctrl.c

58

#define CLKCTRL_WR(sc, reg, val) \

sys/arch/arm/imx/imx23_clkctrl.c

59

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_digctl.c

68

#define DCTL_WR(sc, reg, val) \

sys/arch/arm/imx/imx23_digctl.c

69

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_digfilt.c

117

#define AO_WR(sc, reg, val) \

sys/arch/arm/imx/imx23_digfilt.c

118

bus_space_write_4(sc->sc_iot, sc->sc_aohdl, (reg), (val))

sys/arch/arm/imx/imx23_digfilt.c

388

uint32_t val;

sys/arch/arm/imx/imx23_digfilt.c

393

val = AO_RD(sc, HW_AUDIOOUT_DACVOLUME);

sys/arch/arm/imx/imx23_digfilt.c

394

val &= ~(HW_AUDIOOUT_DACVOLUME_VOLUME_LEFT |

sys/arch/arm/imx/imx23_digfilt.c

402

val |= __SHIFTIN(nvol, HW_AUDIOOUT_DACVOLUME_VOLUME_LEFT);

sys/arch/arm/imx/imx23_digfilt.c

408

val |= __SHIFTIN(nvol, HW_AUDIOOUT_DACVOLUME_VOLUME_RIGHT);

sys/arch/arm/imx/imx23_digfilt.c

410

AO_WR(sc, HW_AUDIOOUT_DACVOLUME, val);

sys/arch/arm/imx/imx23_digfilt.c

415

val = AO_RD(sc, HW_AUDIOOUT_HPVOL);

sys/arch/arm/imx/imx23_digfilt.c

416

val &= ~(HW_AUDIOOUT_HPVOL_VOL_LEFT |

sys/arch/arm/imx/imx23_digfilt.c

425

val |= __SHIFTIN(nvol, HW_AUDIOOUT_HPVOL_VOL_LEFT);

sys/arch/arm/imx/imx23_digfilt.c

432

val |= __SHIFTIN(nvol, HW_AUDIOOUT_HPVOL_VOL_RIGHT);

sys/arch/arm/imx/imx23_digfilt.c

434

AO_WR(sc, HW_AUDIOOUT_HPVOL, val);

sys/arch/arm/imx/imx23_digfilt.c

479

uint32_t val;

sys/arch/arm/imx/imx23_digfilt.c

484

val = AO_RD(sc, HW_AUDIOOUT_DACVOLUME);

sys/arch/arm/imx/imx23_digfilt.c

486

nvol = __SHIFTOUT(val, HW_AUDIOOUT_DACVOLUME_VOLUME_LEFT);

sys/arch/arm/imx/imx23_digfilt.c

489

nvol = __SHIFTOUT(val, HW_AUDIOOUT_DACVOLUME_VOLUME_RIGHT);

sys/arch/arm/imx/imx23_digfilt.c

495

val = AO_RD(sc, HW_AUDIOOUT_HPVOL);

sys/arch/arm/imx/imx23_digfilt.c

497

nvol = __SHIFTOUT(val, HW_AUDIOOUT_HPVOL_VOL_LEFT);

sys/arch/arm/imx/imx23_digfilt.c

500

nvol = __SHIFTOUT(val, HW_AUDIOOUT_HPVOL_VOL_RIGHT);

sys/arch/arm/imx/imx23_digfilt.c

512

val = AO_RD(sc, HW_AUDIOOUT_DACVOLUME);

sys/arch/arm/imx/imx23_digfilt.c

514

mc->un.ord = (val & (HW_AUDIOOUT_DACVOLUME_MUTE_LEFT |

sys/arch/arm/imx/imx23_digfilt.c

520

val = AO_RD(sc, HW_AUDIOOUT_HPVOL);

sys/arch/arm/imx/imx23_digfilt.c

522

mc->un.ord = (val & HW_AUDIOOUT_HPVOL_MUTE) ? 1 : 0;

sys/arch/arm/imx/imx23_digfilt.c

527

val = AO_RD(sc, HW_AUDIOOUT_SPEAKERCTRL);

sys/arch/arm/imx/imx23_digfilt.c

529

mc->un.ord = (val & HW_AUDIOOUT_SPEAKERCTRL_MUTE) ? 1 : 0;

sys/arch/arm/imx/imx23_digfilt.c

833

uint32_t val;

sys/arch/arm/imx/imx23_digfilt.c

836

val = AO_RD(sc, HW_AUDIOOUT_DACSRR);

sys/arch/arm/imx/imx23_digfilt.c

839

val &= ~(HW_AUDIOOUT_DACSRR_BASEMULT | HW_AUDIOOUT_DACSRR_SRC_HOLD |

sys/arch/arm/imx/imx23_digfilt.c

844

val |= (__SHIFTIN(0x1 ,HW_AUDIOOUT_DACSRR_BASEMULT) |

sys/arch/arm/imx/imx23_digfilt.c

850

val |= (__SHIFTIN(0x1 ,HW_AUDIOOUT_DACSRR_BASEMULT) |

sys/arch/arm/imx/imx23_digfilt.c

856

val |= (__SHIFTIN(0x1 ,HW_AUDIOOUT_DACSRR_BASEMULT) |

sys/arch/arm/imx/imx23_digfilt.c

862

val |= (__SHIFTIN(0x1 ,HW_AUDIOOUT_DACSRR_BASEMULT) |

sys/arch/arm/imx/imx23_digfilt.c

868

val |= (__SHIFTIN(0x1 ,HW_AUDIOOUT_DACSRR_BASEMULT) |

sys/arch/arm/imx/imx23_digfilt.c

874

val |= (__SHIFTIN(0x1 ,HW_AUDIOOUT_DACSRR_BASEMULT) |

sys/arch/arm/imx/imx23_digfilt.c

880

val |= (__SHIFTIN(0x1 ,HW_AUDIOOUT_DACSRR_BASEMULT) |

sys/arch/arm/imx/imx23_digfilt.c

888

val |= (__SHIFTIN(0x1 ,HW_AUDIOOUT_DACSRR_BASEMULT) |

sys/arch/arm/imx/imx23_digfilt.c

895

AO_WR(sc, HW_AUDIOOUT_DACSRR, val);

sys/arch/arm/imx/imx23_digfilt.c

897

val = AO_RD(sc, HW_AUDIOOUT_DACSRR);

sys/arch/arm/imx/imx23_icoll.c

57

#define ICOLL_WRITE(sc, reg, val) \

sys/arch/arm/imx/imx23_icoll.c

58

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_mmc.c

126

#define SSP_WR(sc, reg, val) \

sys/arch/arm/imx/imx23_mmc.c

127

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_pinctrl.c

306

#define PINCTRL_WR(sc, reg, val) \

sys/arch/arm/imx/imx23_pinctrl.c

307

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_pinctrl.c

432

int val;

sys/arch/arm/imx/imx23_pinctrl.c

434

val = gpiobus_pin_read(&sc->gc, pin->pin_nr);

sys/arch/arm/imx/imx23_pinctrl.c

437

val = !val;

sys/arch/arm/imx/imx23_pinctrl.c

439

return val;

sys/arch/arm/imx/imx23_pinctrl.c

443

imx23_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/imx/imx23_pinctrl.c

449

val = !val;

sys/arch/arm/imx/imx23_pinctrl.c

451

gpiobus_pin_write(&sc->gc, pin->pin_nr, val);

sys/arch/arm/imx/imx23_platform.c

56

#define REG_WR(reg, val) \

sys/arch/arm/imx/imx23_platform.c

58

*(volatile uint32_t *)((reg)) = val; \

sys/arch/arm/imx/imx23_rtc.c

65

#define RTC_WR(sc, reg, val) \

sys/arch/arm/imx/imx23_rtc.c

66

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_timrot.c

81

#define TIMROT_WRITE(sc, reg, val) \

sys/arch/arm/imx/imx23_timrot.c

82

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_timrot.c

84

#define TIMER_WRITE(sc, reg, val) \

sys/arch/arm/imx/imx23_timrot.c

85

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_timrot.c

86

#define TIMER_WRITE_2(sc, reg, val) \

sys/arch/arm/imx/imx23_timrot.c

87

bus_space_write_2(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx23_usbphy.c

61

#define PHY_WR(sc, reg, val) \

sys/arch/arm/imx/imx23_usbphy.c

62

bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val))

sys/arch/arm/imx/imx31_gpio.c

93

#define GPIO_WRITE(gpio, reg, val) \

sys/arch/arm/imx/imx31_gpio.c

94

bus_space_write_4((gpio)->gpio_memt, (gpio)->gpio_memh, (reg), (val))

sys/arch/arm/imx/imx31_icu.c

78

#define INTC_WRITE(avic, reg, val) \

sys/arch/arm/imx/imx31_icu.c

79

bus_space_write_4((avic)->avic_memt, (avic)->avic_memh, (reg), (val))

sys/arch/arm/imx/imx51_iomux.c

60

#define IOMUX_WRITE(iomux, reg, val) \

sys/arch/arm/imx/imx51_iomux.c

61

bus_space_write_4((iomux)->iomux_memt, (iomux)->iomux_memh, (reg), (val))

sys/arch/arm/imx/imx51_ipuv3.c

56

#define IPUV3_WRITE(ipuv3, module, reg, val) \

sys/arch/arm/imx/imx51_ipuv3.c

57

bus_space_write_4((ipuv3)->iot, (ipuv3)->module##_ioh, (reg), (val))

sys/arch/arm/imx/imx51_ipuv3.c

803

imx51_ipuv3_set_idma_param(uint32_t *params, uint32_t name, uint32_t val)

sys/arch/arm/imx/imx51_ipuv3.c

814

params[index] |= val << shift;

sys/arch/arm/imx/imx51_ipuv3.c

818

params[index+1] |= val >> shift;

sys/arch/arm/imx/imx51_tzic.c

92

#define INTC_WRITE(tzic, reg, val) \

sys/arch/arm/imx/imx51_tzic.c

93

bus_space_write_4((tzic)->sc_iot, (tzic)->sc_ioh, (reg), (val))

sys/arch/arm/imx/imxgpio.c

232

int val;

sys/arch/arm/imx/imxgpio.c

234

val = __SHIFTOUT(GPIO_READ(gpio, GPIO_DR), __BIT(pin));

sys/arch/arm/imx/imxgpio.c

236

return val;

sys/arch/arm/imx/imxgpio.c

85

#define GPIO_WRITE(gpio, reg, val) \

sys/arch/arm/imx/imxgpio.c

86

bus_space_write_4((gpio)->gpio_memt, (gpio)->gpio_memh, (reg), (val))

sys/arch/arm/imx/imxpwm.c

46

#define PWM_WRITE(sc, reg, val) \

sys/arch/arm/imx/imxpwm.c

47

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/imx/imxsnvs.c

54

#define SNVS_WRITE(sc, reg, val) \

sys/arch/arm/imx/imxsnvs.c

55

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, reg, val)

sys/arch/arm/imx/imxuart.c

1142

uint32_t val = oldval;

sys/arch/arm/imx/imxuart.c

1144

CLR(val,IMX_UCR2_WS|IMX_UCR2_PREN|IMX_UCR2_PROE|IMX_UCR2_STPB);

sys/arch/arm/imx/imxuart.c

1153

SET(val, IMX_UCR2_WS);

sys/arch/arm/imx/imxuart.c

1159

SET(val, IMX_UCR2_PREN);

sys/arch/arm/imx/imxuart.c

1163

SET(val, IMX_UCR2_PROE);

sys/arch/arm/imx/imxuart.c

1167

SET(val, IMX_UCR2_STPB);

sys/arch/arm/imx/imxuart.c

1169

val |= IMX_UCR2_TXEN| IMX_UCR2_RXEN|IMX_UCR2_SRST;

sys/arch/arm/imx/imxuart.c

1171

return val;

sys/arch/arm/include/armreg.h

1023

gtmr_cntv_ctl_write(uint32_t val)

sys/arch/arm/include/armreg.h

1026

armreg_cntv_ctl_write(val);

sys/arch/arm/include/armreg.h

1042

gtmr_cntp_ctl_write(uint32_t val)

sys/arch/arm/include/armreg.h

1045

armreg_cntp_ctl_write(val);

sys/arch/arm/include/armreg.h

1060

gtmr_cntp_tval_write(uint32_t val)

sys/arch/arm/include/armreg.h

1063

armreg_cntp_tval_write(val);

sys/arch/arm/include/armreg.h

1078

gtmr_cntv_tval_write(uint32_t val)

sys/arch/arm/include/armreg.h

1081

armreg_cntv_tval_write(val);

sys/arch/arm/include/armreg.h

1096

gtmr_cntp_cval_write(uint64_t val)

sys/arch/arm/include/armreg.h

1099

armreg_cntp_cval_write(val);

sys/arch/arm/include/armreg.h

1114

gtmr_cntv_cval_write(uint64_t val)

sys/arch/arm/include/armreg.h

1117

armreg_cntv_cval_write(val);

sys/arch/arm/include/armreg.h

989

gtmr_cntk_ctl_write(uint32_t val)

sys/arch/arm/include/armreg.h

992

armreg_cntk_ctl_write(val);

sys/arch/arm/include/isa_machdep.h

146

void isa_fillw(u_int val, void *addr, size_t len);

sys/arch/arm/include/types.h

43

int val[11];

sys/arch/arm/iomd/iomdreg.h

222

#define IOMD_WRITE_BYTE(reg, val) \

sys/arch/arm/iomd/iomdreg.h

223

(*((volatile unsigned char *)(IOMD_ADDRESS(reg))) = (val))

sys/arch/arm/iomd/iomdreg.h

224

#define IOMD_WRITE_WORD(reg, val) \

sys/arch/arm/iomd/iomdreg.h

225

(*((volatile unsigned int *)(IOMD_ADDRESS(reg))) = (val))

sys/arch/arm/ixp12x0/ixp12x0_pci.c

213

ixp12x0_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/ixp12x0/ixp12x0_pci.c

226

*(pcireg_t *) va = val;

sys/arch/arm/marvell/armadaxp.c

1113

uint32_t val;

sys/arch/arm/marvell/armadaxp.c

1118

val = read_miscreg(ARMADAXP_MISC_PMCGC);

sys/arch/arm/marvell/armadaxp.c

1119

if ((val & clkgatings[i].bits) == clkgatings[i].bits)

sys/arch/arm/marvell/armadaxp.c

71

#define MPIC_WRITE(reg, val) (bus_space_write_4(&mvsoc_bs_tag, \

sys/arch/arm/marvell/armadaxp.c

72

mpic_handle, reg, val))

sys/arch/arm/marvell/armadaxp.c

73

#define MPIC_CPU_WRITE(reg, val) (bus_space_write_4(&mvsoc_bs_tag, \

sys/arch/arm/marvell/armadaxp.c

74

mpic_cpu_handle, reg, val))

sys/arch/arm/marvell/armadaxp.c

81

#define L2_WRITE(reg, val) (bus_space_write_4(&mvsoc_bs_tag, \

sys/arch/arm/marvell/armadaxp.c

82

l2_handle, reg, val))

sys/arch/arm/marvell/dove.c

278

uint32_t val;

sys/arch/arm/marvell/dove.c

282

val = le32toh(*(volatile uint32_t *)(iobase + DOVE_MISC_BASE +

sys/arch/arm/marvell/dove.c

285

switch (val & 0x01800000) {

sys/arch/arm/marvell/dove.c

292

switch (val & 0x000001e0) {

sys/arch/arm/marvell/dove.c

308

switch (val & 0x0000f000) {

sys/arch/arm/marvell/dove.c

327

uint32_t val;

sys/arch/arm/marvell/dove.c

345

val = READ_PMUREG(pmu, DOVE_PMU_CGCR);

sys/arch/arm/marvell/dove.c

346

if ((val & clkgatings[i].bits) == clkgatings[i].bits)

sys/arch/arm/marvell/kirkwood.c

293

uint32_t val;

sys/arch/arm/marvell/kirkwood.c

298

val = read_mlmbreg(MVSOC_MLMB_CLKGATING);

sys/arch/arm/marvell/kirkwood.c

299

if ((val & clkgatings[i].bits) == clkgatings[i].bits)

sys/arch/arm/marvell/mvsoc.c

1387

uint32_t val;

sys/arch/arm/marvell/mvsoc.c

1405

val = le32toh(*(volatile uint32_t *)(regbase + MVSOC_AXI_MMAP1(cs)));

sys/arch/arm/marvell/mvsoc.c

1406

if (val & MVSOC_AXI_MMAP1_VALID) {

sys/arch/arm/marvell/mvsoc.c

1408

*base = MVSOC_AXI_MMAP1_STARTADDRESS(val);

sys/arch/arm/marvell/mvsoc.c

1410

*size = MVSOC_AXI_MMAP1_AREALENGTH(val);

sys/arch/arm/marvell/mvsocgpp.c

359

uint32_t val;

sys/arch/arm/marvell/mvsocgpp.c

363

val = MVSOCGPP_READ(sc, MVSOCGPP_GPIODI(pin));

sys/arch/arm/marvell/mvsocgpp.c

364

return (val & MVSOCGPP_GPIOPIN(pin)) != 0;

sys/arch/arm/marvell/mvsocgpp.c

62

#define MVSOCGPP_WRITE(sc, reg, val) \

sys/arch/arm/marvell/mvsocgpp.c

63

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/marvell/mvsocts.c

149

uint32_t val, uc, uk;

sys/arch/arm/marvell/mvsocts.c

151

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, TS_STATUS);

sys/arch/arm/marvell/mvsocts.c

152

if (!sc->sc_isvalid(val)) {

sys/arch/arm/marvell/mvsocts.c

156

uc = sc->sc_val2uc(STATUS_VAL(val)); /* uC */

sys/arch/arm/nvidia/tegra124_car.c

863

uint32_t val;

sys/arch/arm/nvidia/tegra124_car.c

871

val = __SHIFTIN(25, CAR_PLLREFE_BASE_DIVN) |

sys/arch/arm/nvidia/tegra124_car.c

873

bus_space_write_4(bst, bsh, CAR_PLLREFE_BASE_REG, val);

sys/arch/arm/nvidia/tegra124_car.c

884

val = bus_space_read_4(bst, bsh, CAR_PLLREFE_MISC_REG);

sys/arch/arm/nvidia/tegra124_car.c

885

} while ((val & CAR_PLLREFE_MISC_LOCK) == 0);

sys/arch/arm/nvidia/tegra124_car.c

896

val = bus_space_read_4(bst, bsh, CAR_PLLE_MISC_REG);

sys/arch/arm/nvidia/tegra124_car.c

897

} while ((val & CAR_PLLE_MISC_LOCK) == 0);

sys/arch/arm/nvidia/tegra124_xusbpad.c

180

uint32_t val;

sys/arch/arm/nvidia/tegra124_xusbpad.c

204

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_PAD_MUX_REG);

sys/arch/arm/nvidia/tegra124_xusbpad.c

205

device_printf(sc->sc_dev, "XUSB_PADCTL_USB2_PAD_MUX_REG is 0x%x\n", val);

sys/arch/arm/nvidia/tegra124_xusbpad.c

206

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_PORT_CAP_REG);

sys/arch/arm/nvidia/tegra124_xusbpad.c

207

device_printf(sc->sc_dev, "XUSB_PADCTL_USB2_PORT_CAP_REG is 0x%x\n", val);

sys/arch/arm/nvidia/tegra124_xusbpad.c

208

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_SS_PORT_MAP_REG);

sys/arch/arm/nvidia/tegra124_xusbpad.c

209

device_printf(sc->sc_dev, "XUSB_PADCTL_SS_PORT_MAP_REG is 0x%x\n", val);

sys/arch/arm/nvidia/tegra124_xusbpad.c

348

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_PAD_MUX_REG);

sys/arch/arm/nvidia/tegra124_xusbpad.c

349

device_printf(sc->sc_dev, "XUSB_PADCTL_USB2_PAD_MUX_REG is 0x%x\n", val);

sys/arch/arm/nvidia/tegra124_xusbpad.c

350

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_PORT_CAP_REG);

sys/arch/arm/nvidia/tegra124_xusbpad.c

351

device_printf(sc->sc_dev, "XUSB_PADCTL_USB2_PORT_CAP_REG is 0x%x\n", val);

sys/arch/arm/nvidia/tegra124_xusbpad.c

352

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_SS_PORT_MAP_REG);

sys/arch/arm/nvidia/tegra124_xusbpad.c

353

device_printf(sc->sc_dev, "XUSB_PADCTL_SS_PORT_MAP_REG is 0x%x\n", val);

sys/arch/arm/nvidia/tegra210_car.c

1005

val = bus_space_read_4(bst, bsh, CAR_PLLREFE_MISC_REG);

sys/arch/arm/nvidia/tegra210_car.c

1006

} while ((val & CAR_PLLREFE_MISC_LOCK) == 0);

sys/arch/arm/nvidia/tegra210_car.c

1028

val = bus_space_read_4(bst, bsh, CAR_PLLE_MISC_REG);

sys/arch/arm/nvidia/tegra210_car.c

1029

} while ((val & CAR_PLLE_MISC_LOCK) == 0);

sys/arch/arm/nvidia/tegra210_car.c

940

uint32_t val;

sys/arch/arm/nvidia/tegra210_car.c

959

val = bus_space_read_4(bst, bsh, CAR_PLLU_BASE_REG);

sys/arch/arm/nvidia/tegra210_car.c

960

} while ((val & CAR_PLLU_BASE_LOCK) == 0);

sys/arch/arm/nvidia/tegra210_xusbpad.c

220

#define WR4(sc, reg, val) \

sys/arch/arm/nvidia/tegra210_xusbpad.c

221

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nvidia/tegra210_xusbpad.c

232

uint32_t val;

sys/arch/arm/nvidia/tegra210_xusbpad.c

282

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

283

if ((val & XUSB_PADCTL_UPHY_PLL_P0_CTL_2_CAL_DONE) != 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

295

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_2_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

296

if ((val & XUSB_PADCTL_UPHY_PLL_P0_CTL_2_CAL_DONE) == 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

309

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_1_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

310

if ((val & XUSB_PADCTL_UPHY_PLL_P0_CTL_1_LOCKDET_STATUS) != 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

325

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

326

if ((val & XUSB_PADCTL_UPHY_PLL_P0_CTL_8_RCAL_DONE) != 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

338

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL_8_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

339

if ((val & XUSB_PADCTL_UPHY_PLL_P0_CTL_8_RCAL_DONE) == 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

430

uint32_t val;

sys/arch/arm/nvidia/tegra210_xusbpad.c

480

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_2_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

481

if ((val & XUSB_PADCTL_UPHY_PLL_S0_CTL_2_CAL_DONE) != 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

493

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_2_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

494

if ((val & XUSB_PADCTL_UPHY_PLL_S0_CTL_2_CAL_DONE) == 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

507

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_1_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

508

if ((val & XUSB_PADCTL_UPHY_PLL_S0_CTL_1_LOCKDET_STATUS) != 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

523

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_8_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

524

if ((val & XUSB_PADCTL_UPHY_PLL_S0_CTL_8_RCAL_DONE) != 0)

sys/arch/arm/nvidia/tegra210_xusbpad.c

536

val = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL_8_REG);

sys/arch/arm/nvidia/tegra210_xusbpad.c

537

if ((val & XUSB_PADCTL_UPHY_PLL_S0_CTL_8_RCAL_DONE) == 0)

sys/arch/arm/nvidia/tegra_apbdma.c

91

#define APBDMA_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_apbdma.c

92

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_cec.c

109

#define CEC_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_cec.c

110

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_cec.c

209

uint32_t val;

sys/arch/arm/nvidia/tegra_cec.c

216

val = CEC_READ(sc, CEC_RX_REGISTER_REG);

sys/arch/arm/nvidia/tegra_cec.c

218

__SHIFTOUT(val, CEC_RX_REGISTER_DATA);

sys/arch/arm/nvidia/tegra_cec.c

219

if ((val & CEC_RX_REGISTER_EOM) != 0 ||

sys/arch/arm/nvidia/tegra_cec.c

235

val = __SHIFTIN(sc->sc_txbuf[sc->sc_txcur],

sys/arch/arm/nvidia/tegra_cec.c

238

val |= CEC_TX_REGISTER_GENERATE_START_BIT;

sys/arch/arm/nvidia/tegra_cec.c

240

val |= CEC_TX_REGISTER_EOM;

sys/arch/arm/nvidia/tegra_cec.c

242

val |= CEC_TX_REGISTER_ADDRESS_MODE;

sys/arch/arm/nvidia/tegra_cec.c

244

CEC_WRITE(sc, CEC_TX_REGISTER_REG, val);

sys/arch/arm/nvidia/tegra_cec.c

285

uint32_t val;

sys/arch/arm/nvidia/tegra_cec.c

289

val = CEC_READ(sc, CEC_HW_CONTROL_REG);

sys/arch/arm/nvidia/tegra_cec.c

292

CEC_WRITE(sc, CEC_HW_CONTROL_REG, val);

sys/arch/arm/nvidia/tegra_cec.c

344

uint32_t val;

sys/arch/arm/nvidia/tegra_cec.c

350

val = CEC_READ(sc, CEC_HW_CONTROL_REG);

sys/arch/arm/nvidia/tegra_cec.c

352

__SHIFTOUT(val, CEC_HW_CONTROL_RX_LOGICAL_ADDRS);

sys/arch/arm/nvidia/tegra_cec.c

355

val = *(uint16_t *)data & 0x7fff;

sys/arch/arm/nvidia/tegra_cec.c

357

__SHIFTIN(val, CEC_HW_CONTROL_RX_LOGICAL_ADDRS),

sys/arch/arm/nvidia/tegra_drm.h

145

#define HDMI_WRITE(enc, reg, val) \

sys/arch/arm/nvidia/tegra_drm.h

146

bus_space_write_4((enc)->bst, (enc)->bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_drm.h

152

#define DC_WRITE(crtc, reg, val) \

sys/arch/arm/nvidia/tegra_drm.h

153

bus_space_write_4((crtc)->bst, (crtc)->bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_ehci.c

192

uint32_t val = bus_space_read_4(iot, ioh,

sys/arch/arm/nvidia/tegra_ehci.c

195

switch (__SHIFTOUT(val, TEGRA_EHCI_HOSTPC1_DEVLC_PSPD)) {

sys/arch/arm/nvidia/tegra_gpio.c

139

#define GPIO_WRITE(bank, reg, val) \

sys/arch/arm/nvidia/tegra_gpio.c

142

(bank)->bank_pb->base + (reg), (val))

sys/arch/arm/nvidia/tegra_gpio.c

262

tegra_gpio_pin_write(void *priv, int pin, int val)

sys/arch/arm/nvidia/tegra_gpio.c

268

v |= (val << pin);

sys/arch/arm/nvidia/tegra_gpio.c

335

int val;

sys/arch/arm/nvidia/tegra_gpio.c

337

val = tegra_gpio_read(gpin);

sys/arch/arm/nvidia/tegra_gpio.c

340

val = !val;

sys/arch/arm/nvidia/tegra_gpio.c

342

return val;

sys/arch/arm/nvidia/tegra_gpio.c

346

tegra_gpio_fdt_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/nvidia/tegra_gpio.c

351

val = !val;

sys/arch/arm/nvidia/tegra_gpio.c

353

tegra_gpio_write(gpin, val);

sys/arch/arm/nvidia/tegra_gpio.c

440

tegra_gpio_write(struct tegra_gpio_pin *gpin, int val)

sys/arch/arm/nvidia/tegra_gpio.c

444

tegra_gpio_pin_write(&gpin->pin_bank, gpin->pin_no, val);

sys/arch/arm/nvidia/tegra_i2c.c

79

#define I2C_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_i2c.c

80

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_mc.c

66

#define MC_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_mc.c

67

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_pcie.c

376

uint32_t val;

sys/arch/arm/nvidia/tegra_pcie.c

378

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PEXn_CTRL_REG(index));

sys/arch/arm/nvidia/tegra_pcie.c

379

val &= ~AFI_PEXn_CTRL_RST_L;

sys/arch/arm/nvidia/tegra_pcie.c

380

bus_space_write_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PEXn_CTRL_REG(index), val);

sys/arch/arm/nvidia/tegra_pcie.c

384

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PEXn_CTRL_REG(index));

sys/arch/arm/nvidia/tegra_pcie.c

385

val |= AFI_PEXn_CTRL_RST_L;

sys/arch/arm/nvidia/tegra_pcie.c

386

bus_space_write_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PEXn_CTRL_REG(index), val);

sys/arch/arm/nvidia/tegra_pcie.c

396

uint32_t val;

sys/arch/arm/nvidia/tegra_pcie.c

413

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PEXn_CTRL_REG(index));

sys/arch/arm/nvidia/tegra_pcie.c

414

val |= AFI_PEXn_CTRL_CLKREQ_EN;

sys/arch/arm/nvidia/tegra_pcie.c

415

val |= AFI_PEXn_CTRL_REFCLK_EN;

sys/arch/arm/nvidia/tegra_pcie.c

416

val |= AFI_PEXn_CTRL_REFCLK_OVERRIDE_EN;

sys/arch/arm/nvidia/tegra_pcie.c

417

bus_space_write_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PEXn_CTRL_REG(index), val);

sys/arch/arm/nvidia/tegra_pcie.c

429

uint32_t val, cfg, lanes;

sys/arch/arm/nvidia/tegra_pcie.c

435

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PLLE_CONTROL_REG);

sys/arch/arm/nvidia/tegra_pcie.c

436

val &= ~AFI_PLLE_CONTROL_BYPASS_PADS2PLLE_CONTROL;

sys/arch/arm/nvidia/tegra_pcie.c

437

val |= AFI_PLLE_CONTROL_PADS2PLLE_CONTROL_EN;

sys/arch/arm/nvidia/tegra_pcie.c

438

bus_space_write_4(sc->sc_bst, sc->sc_bsh_afi, AFI_PLLE_CONTROL_REG, val);

sys/arch/arm/nvidia/tegra_pcie.c

457

if (of_getprop_uint32(child, "nvidia,num-lanes", &val) != 0)

sys/arch/arm/nvidia/tegra_pcie.c

459

lanes |= (val << (index << 3));

sys/arch/arm/nvidia/tegra_pcie.c

697

tegra_pcie_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/nvidia/tegra_pcie.c

724

bus_space_write_4(sc->sc_bst, bsh, reg, val);

sys/arch/arm/nvidia/tegra_pinmux.c

130

u_int val;

sys/arch/arm/nvidia/tegra_pinmux.c

141

if (of_getprop_uint32(phandle, "nvidia,pull", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

143

cfg |= __SHIFTIN(val, PINMUX_PUPD);

sys/arch/arm/nvidia/tegra_pinmux.c

145

if (of_getprop_uint32(phandle, "nvidia,tristate", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

147

cfg |= __SHIFTIN(val, PINMUX_TRISTATE);

sys/arch/arm/nvidia/tegra_pinmux.c

149

if (of_getprop_uint32(phandle, "nvidia,open-drain", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

151

cfg |= __SHIFTIN(val, PINMUX_E_OD);

sys/arch/arm/nvidia/tegra_pinmux.c

153

if (of_getprop_uint32(phandle, "nvidia,lock", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

155

cfg |= __SHIFTIN(val, PINMUX_LOCK);

sys/arch/arm/nvidia/tegra_pinmux.c

157

if (of_getprop_uint32(phandle, "nvidia,io-hv", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

159

cfg |= __SHIFTIN(val, PINMUX_E_IO_HV);

sys/arch/arm/nvidia/tegra_pinmux.c

161

if (of_getprop_uint32(phandle, "nvidia,high-speed-mode", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

163

cfg |= __SHIFTIN(val, PINMUX_E_HSM);

sys/arch/arm/nvidia/tegra_pinmux.c

165

if (of_getprop_uint32(phandle, "nvidia,schmitt", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

167

cfg |= __SHIFTIN(val, PINMUX_E_SCHMT);

sys/arch/arm/nvidia/tegra_pinmux.c

169

if (of_getprop_uint32(phandle, "nvidia,drive-type", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

171

cfg |= __SHIFTIN(val, PINMUX_DRV_TYPE);

sys/arch/arm/nvidia/tegra_pinmux.c

182

if (of_getprop_uint32(phandle, "nvidia,pull-down-strength", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

184

cfg |= __SHIFTIN(val, pin_def->tpp_dg.drvdn_mask);

sys/arch/arm/nvidia/tegra_pinmux.c

186

if (of_getprop_uint32(phandle, "nvidia,pull-up-strength", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

188

cfg |= __SHIFTIN(val, pin_def->tpp_dg.drvup_mask);

sys/arch/arm/nvidia/tegra_pinmux.c

190

if (of_getprop_uint32(phandle, "nvidia,slew-rate-falling", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

192

cfg |= __SHIFTIN(val, pin_def->tpp_dg.slwrf_mask);

sys/arch/arm/nvidia/tegra_pinmux.c

194

if (of_getprop_uint32(phandle, "nvidia,slew-rate-rising", &val) == 0) {

sys/arch/arm/nvidia/tegra_pinmux.c

196

cfg |= __SHIFTIN(val, pin_def->tpp_dg.slwrr_mask);

sys/arch/arm/nvidia/tegra_pinmux.c

69

#define PADCTRL_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_pinmux.c

70

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh[0], (reg), (val))

sys/arch/arm/nvidia/tegra_pinmux.c

73

#define PINMUX_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_pinmux.c

74

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh[1], (reg), (val))

sys/arch/arm/nvidia/tegra_rtc.c

67

#define RTC_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_rtc.c

68

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_soctherm.c

150

#define SOCTHERM_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_soctherm.c

151

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_soctherm.c

157

#define SENSOR_WRITE(sc, s, reg, val) \

sys/arch/arm/nvidia/tegra_soctherm.c

158

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (s)->s_base + (reg), (val))

sys/arch/arm/nvidia/tegra_soctherm.c

277

uint32_t val;

sys/arch/arm/nvidia/tegra_soctherm.c

280

val = tegra_fuse_read(FUSE_TSENSOR8_CALIB_REG);

sys/arch/arm/nvidia/tegra_soctherm.c

281

sc->sc_base_cp = __SHIFTOUT(val, FUSE_TSENSOR8_CALIB_CP_TS_BASE);

sys/arch/arm/nvidia/tegra_soctherm.c

282

sc->sc_base_ft = __SHIFTOUT(val, FUSE_TSENSOR8_CALIB_FT_TS_BASE);

sys/arch/arm/nvidia/tegra_soctherm.c

283

val = tegra_fuse_read(FUSE_SPARE_REALIGNMENT_REG);

sys/arch/arm/nvidia/tegra_soctherm.c

284

const int calib_cp = tegra_soctherm_decodeint(val,

sys/arch/arm/nvidia/tegra_soctherm.c

286

const int calib_ft = tegra_soctherm_decodeint(val,

sys/arch/arm/nvidia/tegra_soctherm.c

315

uint32_t val;

sys/arch/arm/nvidia/tegra_soctherm.c

317

val = tegra_fuse_read(s->s_fuse);

sys/arch/arm/nvidia/tegra_soctherm.c

318

const int calib_cp = tegra_soctherm_decodeint(val,

sys/arch/arm/nvidia/tegra_soctherm.c

320

const int calib_ft = tegra_soctherm_decodeint(val,

sys/arch/arm/nvidia/tegra_soctherm.c

381

int64_t val = ((temp >> 8) & 0xff) * 1000000;

sys/arch/arm/nvidia/tegra_soctherm.c

383

val += 500000;

sys/arch/arm/nvidia/tegra_soctherm.c

385

val = -val;

sys/arch/arm/nvidia/tegra_soctherm.c

386

edata->value_cur = val + 273150000;

sys/arch/arm/nvidia/tegra_soctherm.c

394

tegra_soctherm_decodeint(uint32_t val, uint32_t bitmask)

sys/arch/arm/nvidia/tegra_soctherm.c

396

const uint32_t v = __SHIFTOUT(val, bitmask);

sys/arch/arm/nvidia/tegra_timer.c

69

#define TIMER_WRITE(sc, reg, val) \

sys/arch/arm/nvidia/tegra_timer.c

70

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nvidia/tegra_xusb.c

1001

"XUSB_CFG_ARU_MBOX_OWNER 0x%x\n", val);

sys/arch/arm/nvidia/tegra_xusb.c

1002

if (val != MAILBOX_OWNER_NONE) {

sys/arch/arm/nvidia/tegra_xusb.c

1004

"timeout, XUSB_CFG_ARU_MBOX_OWNER 0x%x\n", val);

sys/arch/arm/nvidia/tegra_xusb.c

431

uint32_t val;

sys/arch/arm/nvidia/tegra_xusb.c

436

val = bus_space_read_4(bst, ipfsh, 0x0);

sys/arch/arm/nvidia/tegra_xusb.c

437

DPRINTF(sc->sc_dev, "%s ipfs 0x0 = 0x%x\n", __func__, val);

sys/arch/arm/nvidia/tegra_xusb.c

455

val = bus_space_read_4(bst, ipfsh, 0x0);

sys/arch/arm/nvidia/tegra_xusb.c

456

DPRINTF(sc->sc_dev, "%s ipfs 0x0 = 0x%x\n", __func__, val);

sys/arch/arm/nvidia/tegra_xusb.c

467

val = csb_read_4(psc, XUSB_CSB_FALCON_CPUCTL_REG);

sys/arch/arm/nvidia/tegra_xusb.c

468

DPRINTF(sc->sc_dev, "XUSB_FALC_CPUCTL 0x%x\n", val);

sys/arch/arm/nvidia/tegra_xusb.c

470

val = bus_space_read_4(bst, psc->sc_bsh_fpci, PCI_USBREV)

sys/arch/arm/nvidia/tegra_xusb.c

472

switch (val) {

sys/arch/arm/nvidia/tegra_xusb.c

480

if (val < PCI_USBREV_3_0) {

sys/arch/arm/nvidia/tegra_xusb.c

481

aprint_error_dev(self, "Unknown revision (%02x)\n", val);

sys/arch/arm/nvidia/tegra_xusb.c

486

"Unknown revision (%02x). Set to 3.1.\n", val);

sys/arch/arm/nvidia/tegra_xusb.c

518

uint32_t val;

sys/arch/arm/nvidia/tegra_xusb.c

535

val = bus_space_read_4(bst, fpcih, T_XUSB_CFG_ARU_MAILBOX_CMD_REG);

sys/arch/arm/nvidia/tegra_xusb.c

536

DPRINTF(sc->sc_dev, "XUSB_CFG_ARU_MBOX_CMD 0x%x\n", val);

sys/arch/arm/nvidia/tegra_xusb.c

537

val &= ~T_XUSB_CFG_ARU_MAILBOX_CMD_DEST_SMI;

sys/arch/arm/nvidia/tegra_xusb.c

538

bus_space_write_4(bst, fpcih, T_XUSB_CFG_ARU_MAILBOX_CMD_REG, val);

sys/arch/arm/nvidia/tegra_xusb.c

951

uint32_t val;

sys/arch/arm/nvidia/tegra_xusb.c

957

val = bus_space_read_4(bst, fpcih,

sys/arch/arm/nvidia/tegra_xusb.c

960

val);

sys/arch/arm/nvidia/tegra_xusb.c

961

if (val != MAILBOX_OWNER_NONE) {

sys/arch/arm/nvidia/tegra_xusb.c

968

val = bus_space_read_4(bst, fpcih,

sys/arch/arm/nvidia/tegra_xusb.c

971

val);

sys/arch/arm/nvidia/tegra_xusb.c

972

if (val != MAILBOX_OWNER_SW) {

sys/arch/arm/nvidia/tegra_xusb.c

988

val = bus_space_read_4(bst, fpcih,

sys/arch/arm/nvidia/tegra_xusb.c

991

"XUSB_CFG_ARU_MBOX_OWNER 0x%x\n", val);

sys/arch/arm/nvidia/tegra_xusb.c

992

if (val == MAILBOX_OWNER_NONE) {

sys/arch/arm/nvidia/tegra_xusb.c

998

val = bus_space_read_4(bst, fpcih,

sys/arch/arm/nxp/imx6_pcie.c

259

imx6_pcie_gpr_write(void *cookie, uint32_t reg, uint32_t val)

sys/arch/arm/nxp/imx6_pcie.c

263

bus_space_write_4(sc->sc_iot, sc->sc_gpr_ioh, reg, val);

sys/arch/arm/nxp/imx6_usbphy.c

135

#define USBPHY_WRITE(sc, reg, val) \

sys/arch/arm/nxp/imx6_usbphy.c

136

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/nxp/imx7_gpc.c

153

uint32_t val;

sys/arch/arm/nxp/imx7_gpc.c

155

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GPC_PCG_CPU_0_1_MAPPING);

sys/arch/arm/nxp/imx7_gpc.c

156

val |= map;

sys/arch/arm/nxp/imx7_gpc.c

157

bus_space_write_4(sc->sc_iot, sc->sc_ioh, GPC_PCG_CPU_0_1_MAPPING, val);

sys/arch/arm/nxp/imx7_gpc.c

159

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GPC_PU_PGC_SW_PUP_REQ);

sys/arch/arm/nxp/imx7_gpc.c

160

val |= req;

sys/arch/arm/nxp/imx7_gpc.c

161

bus_space_write_4(sc->sc_iot, sc->sc_ioh, GPC_PU_PGC_SW_PUP_REQ, val);

sys/arch/arm/nxp/imx7_gpc.c

165

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GPC_PCG_CPU_0_1_MAPPING);

sys/arch/arm/nxp/imx7_gpc.c

166

val &= ~map;

sys/arch/arm/nxp/imx7_gpc.c

167

bus_space_write_4(sc->sc_iot, sc->sc_ioh, GPC_PCG_CPU_0_1_MAPPING, val);

sys/arch/arm/nxp/imx7_gpc.c

175

uint32_t val;

sys/arch/arm/nxp/imx7_gpc.c

178

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh,

sys/arch/arm/nxp/imx7_gpc.c

180

val |= __BIT(bit);

sys/arch/arm/nxp/imx7_gpc.c

182

GPC_IMRn_COREx(reg, cpu), val);

sys/arch/arm/nxp/imx7_gpc.c

191

uint32_t val;

sys/arch/arm/nxp/imx7_gpc.c

194

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh,

sys/arch/arm/nxp/imx7_gpc.c

196

val &= ~__BIT(bit);

sys/arch/arm/nxp/imx7_gpc.c

198

GPC_IMRn_COREx(reg, cpu), val);

sys/arch/arm/nxp/imx8mq_usbphy.c

112

val = PHY_READ(sc, PHY_CTL1_ADDR);

sys/arch/arm/nxp/imx8mq_usbphy.c

113

val &= ~PHY_VDATDATENB0;

sys/arch/arm/nxp/imx8mq_usbphy.c

114

val &= ~PHY_VDATSRCENB0;

sys/arch/arm/nxp/imx8mq_usbphy.c

115

val &= ~PHY_COMMONONN;

sys/arch/arm/nxp/imx8mq_usbphy.c

116

val |= PHY_RESET;

sys/arch/arm/nxp/imx8mq_usbphy.c

117

val |= PHY_ATERESET;

sys/arch/arm/nxp/imx8mq_usbphy.c

118

PHY_WRITE(sc, PHY_CTL1_ADDR, val);

sys/arch/arm/nxp/imx8mq_usbphy.c

120

val = PHY_READ(sc, PHY_CTL0_ADDR);

sys/arch/arm/nxp/imx8mq_usbphy.c

121

val |= REF_SSP_EN;

sys/arch/arm/nxp/imx8mq_usbphy.c

122

PHY_WRITE(sc, PHY_CTL0_ADDR, val);

sys/arch/arm/nxp/imx8mq_usbphy.c

124

val = PHY_READ(sc, PHY_CTL2_ADDR);

sys/arch/arm/nxp/imx8mq_usbphy.c

125

val |= PHY_TXENABLEN0;

sys/arch/arm/nxp/imx8mq_usbphy.c

126

PHY_WRITE(sc, PHY_CTL2_ADDR, val);

sys/arch/arm/nxp/imx8mq_usbphy.c

128

val = PHY_READ(sc, PHY_CTL1_ADDR);

sys/arch/arm/nxp/imx8mq_usbphy.c

129

val &= ~PHY_RESET;

sys/arch/arm/nxp/imx8mq_usbphy.c

130

val &= ~PHY_ATERESET;

sys/arch/arm/nxp/imx8mq_usbphy.c

131

PHY_WRITE(sc, PHY_CTL1_ADDR, val);

sys/arch/arm/nxp/imx8mq_usbphy.c

72

#define PHY_WRITE(sc, reg, val) \

sys/arch/arm/nxp/imx8mq_usbphy.c

73

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/nxp/imx8mq_usbphy.c

97

uint32_t val;

sys/arch/arm/nxp/imx_ahcisata.c

366

imx_ahcisata_search_regval(const int *values, int count, int val)

sys/arch/arm/nxp/imx_ahcisata.c

369

if (values[i] == val)

sys/arch/arm/nxp/imx_ahcisata.c

398

int val;

sys/arch/arm/nxp/imx_ahcisata.c

412

int val;

sys/arch/arm/nxp/imx_ahcisata.c

413

val = imx_ahcisata_search_regval(

sys/arch/arm/nxp/imx_ahcisata.c

416

gpr13_sata_phy_settings[i].val);

sys/arch/arm/nxp/imx_ahcisata.c

417

if (val == -1)

sys/arch/arm/nxp/imx_ahcisata.c

418

val = gpr13_sata_phy_settings[i].def_val;

sys/arch/arm/nxp/imx_ahcisata.c

419

v |= __SHIFTIN(val, gpr13_sata_phy_settings[i].mask);

sys/arch/arm/nxp/imx_ccm.h

348

#define CCM_WRITE(sc, idx, reg, val) \

sys/arch/arm/nxp/imx_ccm.h

349

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh[idx], (reg), (val))

sys/arch/arm/nxp/imx_ccm_composite.c

114

val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);

sys/arch/arm/nxp/imx_ccm_composite.c

115

const u_int mux = __SHIFTOUT(val, TARGET_ROOT_MUX);

sys/arch/arm/nxp/imx_ccm_composite.c

154

val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);

sys/arch/arm/nxp/imx_ccm_composite.c

155

val &= ~TARGET_ROOT_PRE_PODF;

sys/arch/arm/nxp/imx_ccm_composite.c

156

val |= __SHIFTIN(best_prediv - 1, TARGET_ROOT_PRE_PODF);

sys/arch/arm/nxp/imx_ccm_composite.c

157

val &= ~TARGET_ROOT_POST_PODF;

sys/arch/arm/nxp/imx_ccm_composite.c

158

val |= __SHIFTIN(best_postdiv - 1, TARGET_ROOT_POST_PODF);

sys/arch/arm/nxp/imx_ccm_composite.c

159

CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);

sys/arch/arm/nxp/imx_ccm_composite.c

172

const uint32_t val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);

sys/arch/arm/nxp/imx_ccm_composite.c

173

const u_int mux = __SHIFTOUT(val, TARGET_ROOT_MUX);

sys/arch/arm/nxp/imx_ccm_composite.c

186

uint32_t val;

sys/arch/arm/nxp/imx_ccm_composite.c

192

val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);

sys/arch/arm/nxp/imx_ccm_composite.c

193

val &= ~TARGET_ROOT_MUX;

sys/arch/arm/nxp/imx_ccm_composite.c

194

val |= __SHIFTIN(mux, TARGET_ROOT_MUX);

sys/arch/arm/nxp/imx_ccm_composite.c

195

CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);

sys/arch/arm/nxp/imx_ccm_composite.c

52

uint32_t val;

sys/arch/arm/nxp/imx_ccm_composite.c

56

val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);

sys/arch/arm/nxp/imx_ccm_composite.c

58

val |= TARGET_ROOT_ENABLE;

sys/arch/arm/nxp/imx_ccm_composite.c

60

val &= ~TARGET_ROOT_ENABLE;

sys/arch/arm/nxp/imx_ccm_composite.c

61

CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);

sys/arch/arm/nxp/imx_ccm_composite.c

84

const uint32_t val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);

sys/arch/arm/nxp/imx_ccm_composite.c

85

const u_int pre_div = __SHIFTOUT(val, TARGET_ROOT_PRE_PODF) + 1;

sys/arch/arm/nxp/imx_ccm_composite.c

86

const u_int post_div = __SHIFTOUT(val, TARGET_ROOT_POST_PODF) + 1;

sys/arch/arm/nxp/imx_ccm_composite.c

99

uint32_t val;

sys/arch/arm/nxp/imx_ccm_div.c

107

val = CCM_READ(sc, clk->regidx, div->reg);

sys/arch/arm/nxp/imx_ccm_div.c

108

val &= ~div->mask;

sys/arch/arm/nxp/imx_ccm_div.c

109

val |= __SHIFTIN(best_n, div->mask);

sys/arch/arm/nxp/imx_ccm_div.c

110

CCM_WRITE(sc, clk->regidx, div->reg, val);

sys/arch/arm/nxp/imx_ccm_div.c

59

const uint32_t val = CCM_READ(sc, clk->regidx, div->reg);

sys/arch/arm/nxp/imx_ccm_div.c

60

const u_int n = __SHIFTOUT(val, div->mask);

sys/arch/arm/nxp/imx_ccm_div.c

73

uint32_t val;

sys/arch/arm/nxp/imx_ccm_gate.c

44

uint32_t val;

sys/arch/arm/nxp/imx_ccm_gate.c

48

val = CCM_READ(sc, clk->regidx, gate->reg);

sys/arch/arm/nxp/imx_ccm_gate.c

50

val |= gate->mask;

sys/arch/arm/nxp/imx_ccm_gate.c

52

val &= ~gate->mask;

sys/arch/arm/nxp/imx_ccm_gate.c

53

CCM_WRITE(sc, clk->regidx, gate->reg, val);

sys/arch/arm/nxp/imx_ccm_mux.c

49

const uint32_t val = CCM_READ(sc, clk->regidx, mux->reg);

sys/arch/arm/nxp/imx_ccm_mux.c

50

const u_int sel = __SHIFTOUT(val, mux->sel);

sys/arch/arm/nxp/imx_ccm_mux.c

63

uint32_t val;

sys/arch/arm/nxp/imx_ccm_mux.c

69

val = CCM_READ(sc, clk->regidx, mux->reg);

sys/arch/arm/nxp/imx_ccm_mux.c

70

val &= ~mux->sel;

sys/arch/arm/nxp/imx_ccm_mux.c

71

val |= __SHIFTIN(sel, mux->sel);

sys/arch/arm/nxp/imx_ccm_mux.c

72

CCM_WRITE(sc, clk->regidx, mux->reg, val);

sys/arch/arm/nxp/imx_ccm_pll.c

49

uint32_t val, mask;

sys/arch/arm/nxp/imx_ccm_pll.c

58

val = CCM_READ(sc, clk->regidx, pll->reg);

sys/arch/arm/nxp/imx_ccm_pll.c

60

val &= ~mask;

sys/arch/arm/nxp/imx_ccm_pll.c

62

val |= mask;

sys/arch/arm/nxp/imx_ccm_pll.c

63

CCM_WRITE(sc, clk->regidx, pll->reg, val);

sys/arch/arm/nxp/imx_ccm_pll.c

91

const uint32_t val = CCM_READ(sc, clk->regidx, pll->reg);

sys/arch/arm/nxp/imx_ccm_pll.c

92

const u_int div = __SHIFTOUT(val, pll->div_mask);

sys/arch/arm/nxp/imx_gpio.c

200

int val;

sys/arch/arm/nxp/imx_gpio.c

202

val = imxgpio_pin_read(sc, gpin->pin_no);

sys/arch/arm/nxp/imx_gpio.c

205

val = !val;

sys/arch/arm/nxp/imx_gpio.c

207

return val;

sys/arch/arm/nxp/imx_gpio.c

211

imx6_gpio_fdt_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/nxp/imx_gpio.c

217

val = !val;

sys/arch/arm/nxp/imx_gpio.c

219

imxgpio_pin_write(sc, gpin->pin_no, val);

sys/arch/arm/nxp/imxpcie.c

352

uint32_t val;

sys/arch/arm/nxp/imxpcie.c

353

val = imxpcie_phy_read(sc, PCIE_PHY_MPLL_OVRD_IN_LO);

sys/arch/arm/nxp/imxpcie.c

354

val &= ~MPLL_MULTIPLIER;

sys/arch/arm/nxp/imxpcie.c

355

val |= __SHIFTIN(mult, MPLL_MULTIPLIER);

sys/arch/arm/nxp/imxpcie.c

356

val |= MPLL_MULTIPLIER_OVRD;

sys/arch/arm/nxp/imxpcie.c

357

imxpcie_phy_write(sc, PCIE_PHY_MPLL_OVRD_IN_LO, val);

sys/arch/arm/nxp/imxpcie.c

359

val = imxpcie_phy_read(sc, PCIE_PHY_ATEOVRD);

sys/arch/arm/nxp/imxpcie.c

360

val &= ~REF_CLKDIV2;

sys/arch/arm/nxp/imxpcie.c

361

val |= __SHIFTIN(div, REF_CLKDIV2);

sys/arch/arm/nxp/imxpcie.c

362

val |= ATEOVRD_EN;

sys/arch/arm/nxp/imxpcie.c

363

imxpcie_phy_write(sc, PCIE_PHY_ATEOVRD, val);

sys/arch/arm/nxp/imxpcie.c

72

#define PCIE_WRITE(sc, reg, val) \

sys/arch/arm/nxp/imxpcie.c

726

imxpcie_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/nxp/imxpcie.c

73

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, reg, val)

sys/arch/arm/nxp/imxpcie.c

759

bus_space_write_4(sc->sc_iot, bsh, offset & ~0x3, val);

sys/arch/arm/rockchip/rk3066_smp.c

117

val = bus_space_read_4(bst, bsh_pmu, PMU_PWRDN_CON);

sys/arch/arm/rockchip/rk3066_smp.c

118

val &= ~__BIT(cpuno);

sys/arch/arm/rockchip/rk3066_smp.c

119

bus_space_write_4(bst, bsh_pmu, PMU_PWRDN_CON, val);

sys/arch/arm/rockchip/rk3066_smp.c

123

val = bus_space_read_4(bst, bsh_pmu, PMU_PWRDN_ST);

sys/arch/arm/rockchip/rk3066_smp.c

124

} while ((val & __BIT(cpuno)) != 0);

sys/arch/arm/rockchip/rk3066_smp.c

87

uint32_t val;

sys/arch/arm/rockchip/rk3288_iomux.c

166

uint32_t val;

sys/arch/arm/rockchip/rk3288_iomux.c

184

val = RD4(reg, reg->pull_reg);

sys/arch/arm/rockchip/rk3288_iomux.c

185

val &= ~(GPIO_P_CTL_MASK << reg->pull_bit);

sys/arch/arm/rockchip/rk3288_iomux.c

187

val = GPIO_P_CTL_MASK << (reg->pull_bit + 16);

sys/arch/arm/rockchip/rk3288_iomux.c

189

val |= p << reg->pull_bit;

sys/arch/arm/rockchip/rk3288_iomux.c

190

WR4(reg, reg->pull_reg, val);

sys/arch/arm/rockchip/rk3288_iomux.c

197

uint32_t val;

sys/arch/arm/rockchip/rk3288_iomux.c

218

val = RD4(reg, reg->drv_reg);

sys/arch/arm/rockchip/rk3288_iomux.c

219

val &= ~(GPIO_E_CTL_MASK << reg->drv_bit);

sys/arch/arm/rockchip/rk3288_iomux.c

221

val = GPIO_E_CTL_MASK << (reg->drv_bit + 16);

sys/arch/arm/rockchip/rk3288_iomux.c

223

val = e << reg->drv_bit;

sys/arch/arm/rockchip/rk3288_iomux.c

224

WR4(reg, reg->drv_reg, val);

sys/arch/arm/rockchip/rk3288_iomux.c

231

uint32_t val;

sys/arch/arm/rockchip/rk3288_iomux.c

237

val = RD4(reg, reg->mux_reg);

sys/arch/arm/rockchip/rk3288_iomux.c

238

val &= ~(mask << reg->mux_bit);

sys/arch/arm/rockchip/rk3288_iomux.c

240

val = mask << (reg->mux_bit + 16);

sys/arch/arm/rockchip/rk3288_iomux.c

242

val |= mux << reg->mux_bit;

sys/arch/arm/rockchip/rk3288_iomux.c

243

WR4(reg, reg->mux_reg, val);

sys/arch/arm/rockchip/rk3288_iomux.c

85

#define WR4(reg, off, val) \

sys/arch/arm/rockchip/rk3288_iomux.c

86

syscon_write_4((reg)->syscon, (off), (val))

sys/arch/arm/rockchip/rk3328_iomux.c

135

#define WR4(sc, reg, val) \

sys/arch/arm/rockchip/rk3328_iomux.c

136

syscon_write_4((sc)->sc_syscon, (reg), (val))

sys/arch/arm/rockchip/rk3399_cru.c

149

.divs[0] = { .reg = (_reg0), .mask = (_reg0_mask), .val = (_reg0_val) },\

sys/arch/arm/rockchip/rk3399_cru.c

150

.divs[1] = { .reg = (_reg1), .mask = (_reg1_mask), .val = (_reg1_val) },\

sys/arch/arm/rockchip/rk3399_cru.c

281

uint32_t val;

sys/arch/arm/rockchip/rk3399_cru.c

303

val = __SHIFTIN(PLL_WORK_MODE_SLOW, PLL_WORK_MODE) | (PLL_WORK_MODE << 16);

sys/arch/arm/rockchip/rk3399_cru.c

304

CRU_WRITE(sc, pll->con_base + PLL_CON3, val);

sys/arch/arm/rockchip/rk3399_cru.c

315

val = CRU_READ(sc, pll->con_base + PLL_CON2);

sys/arch/arm/rockchip/rk3399_cru.c

316

val &= ~PLL_FRACDIV;

sys/arch/arm/rockchip/rk3399_cru.c

317

val |= __SHIFTIN(pll_rate->fracdiv, PLL_FRACDIV);

sys/arch/arm/rockchip/rk3399_cru.c

318

CRU_WRITE(sc, pll->con_base + PLL_CON2, val);

sys/arch/arm/rockchip/rk3399_cru.c

320

val = __SHIFTIN(pll_rate->dsmpd, PLL_DSMPD) | (PLL_DSMPD << 16);

sys/arch/arm/rockchip/rk3399_cru.c

321

CRU_WRITE(sc, pll->con_base + PLL_CON3, val);

sys/arch/arm/rockchip/rk3399_cru.c

334

val = __SHIFTIN(PLL_WORK_MODE_NORMAL, PLL_WORK_MODE) | (PLL_WORK_MODE << 16);

sys/arch/arm/rockchip/rk3399_cru.c

335

CRU_WRITE(sc, pll->con_base + PLL_CON3, val);

sys/arch/arm/rockchip/rk3399_iomux.c

202

#define WR4(syscon, reg, val) \

sys/arch/arm/rockchip/rk3399_iomux.c

203

syscon_write_4(syscon, (reg), (val))

sys/arch/arm/rockchip/rk3399_iomux.c

257

rk3399_iomux_map_drive_strength(struct rk3399_iomux_softc *sc, enum rk3399_drv_type drv_type, u_int val)

sys/arch/arm/rockchip/rk3399_iomux.c

260

if (rk3399_drv_strength[drv_type][n] == val)

sys/arch/arm/rockchip/rk3399_iomux.c

266

rk3399_iomux_set_drive_strength(struct rk3399_iomux_softc *sc, u_int bank, u_int idx, u_int val)

sys/arch/arm/rockchip/rk3399_iomux.c

277

const int drv = rk3399_iomux_map_drive_strength(sc, banks[bank].iomux[idx / 8].drv_type, val);

sys/arch/arm/rockchip/rk3399_iomux.c

333

drv_val = __SHIFTIN(val, drv_mask);

sys/arch/arm/rockchip/rk3399_iomux.c

340

printf("%s: bank %d idx %d val %d: %08x -> ", __func__, bank, idx, val, RD4(syscon, reg));

sys/arch/arm/rockchip/rk3399_iomux.c

462

uint32_t val;

sys/arch/arm/rockchip/rk3399_iomux.c

471

val = RD4(syscon, GRF_GPIO4B_IOMUX);

sys/arch/arm/rockchip/rk3399_iomux.c

472

val &= ~(GRF_GPIO4B_IOMUX_TCK | GRF_GPIO4B_IOMUX_TMS);

sys/arch/arm/rockchip/rk3399_iomux.c

473

val |= __SHIFTIN(0x2, GRF_GPIO4B_IOMUX_TCK);

sys/arch/arm/rockchip/rk3399_iomux.c

474

val |= __SHIFTIN(0x2, GRF_GPIO4B_IOMUX_TMS);

sys/arch/arm/rockchip/rk3399_iomux.c

475

WR4(syscon, GRF_GPIO4B_IOMUX, val);

sys/arch/arm/rockchip/rk3399_iomux.c

476

val = RD4(syscon, GRF_SOC_CON7);

sys/arch/arm/rockchip/rk3399_iomux.c

477

val |= GRF_SOC_CON7_FORCE_JTAG;

sys/arch/arm/rockchip/rk3399_iomux.c

478

WR4(syscon, GRF_SOC_CON7, val);

sys/arch/arm/rockchip/rk3399_pcie.c

121

#define HWRITE4(sc, reg, val) \

sys/arch/arm/rockchip/rk3399_pcie.c

122

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/rockchip/rk3399_pcie.c

125

#define AXIPOKE4(sc, reg, val) \

sys/arch/arm/rockchip/rk3399_pcie.c

126

bus_space_poke_4((sc)->sc_iot, (sc)->sc_axi_ioh, (reg), (val))

sys/arch/arm/rockchip/rk3399_pcie.c

580

int32_t val;

sys/arch/arm/rockchip/rk3399_pcie.c

591

val = HREAD4(sc, PCIE_RC_NORMAL_BASE + reg);

sys/arch/arm/rockchip/rk3399_pcie.c

601

if (AXIPEEK4(sc, reg, &val) != 0)

sys/arch/arm/rockchip/rk3399_pcie.c

602

val = 0xffffffff;

sys/arch/arm/rockchip/rk3399_pcie.c

608

return val;

sys/arch/arm/rockchip/rk3399_pmucru.c

209

uint32_t val;

sys/arch/arm/rockchip/rk3399_pmucru.c

225

val = __SHIFTIN(PLL_WORK_MODE_SLOW, PLL_WORK_MODE) | (PLL_WORK_MODE << 16);

sys/arch/arm/rockchip/rk3399_pmucru.c

226

CRU_WRITE(sc, pll->con_base + PLL_CON3, val);

sys/arch/arm/rockchip/rk3399_pmucru.c

238

val = CRU_READ(sc, pll->con_base + PLL_CON2);

sys/arch/arm/rockchip/rk3399_pmucru.c

239

val &= ~PLL_FRACDIV;

sys/arch/arm/rockchip/rk3399_pmucru.c

240

val |= __SHIFTIN(pll_rate->fracdiv, PLL_FRACDIV);

sys/arch/arm/rockchip/rk3399_pmucru.c

241

CRU_WRITE(sc, pll->con_base + PLL_CON2, val);

sys/arch/arm/rockchip/rk3399_pmucru.c

243

val = __SHIFTIN(pll_rate->dsmpd, PLL_DSMPD) | (PLL_DSMPD << 16);

sys/arch/arm/rockchip/rk3399_pmucru.c

244

CRU_WRITE(sc, pll->con_base + PLL_CON3, val);

sys/arch/arm/rockchip/rk3399_pmucru.c

261

val = __SHIFTIN(PLL_WORK_MODE_NORMAL, PLL_WORK_MODE) | (PLL_WORK_MODE << 16);

sys/arch/arm/rockchip/rk3399_pmucru.c

262

CRU_WRITE(sc, pll->con_base + PLL_CON3, val);

sys/arch/arm/rockchip/rk3588_cru.c

103

.val = \

sys/arch/arm/rockchip/rk3588_cru.c

113

.val = __SHIFTIN((periph) - 1, RK3588_PERIPH_DSU_DIV_MASK)\

sys/arch/arm/rockchip/rk3588_cru.c

122

.val = \

sys/arch/arm/rockchip/rk3588_cru.c

199

.val = __SHIFTIN((_apllcore), \

sys/arch/arm/rockchip/rk3588_cru.c

207

.val = __SHIFTIN((_apllcore), \

sys/arch/arm/rockchip/rk3588_cru.c

80

.val = __SHIFTIN((apllcore), RK3588_CLK_CORE_L_SEL_MASK)\

sys/arch/arm/rockchip/rk3588_cru.c

90

.val = \

sys/arch/arm/rockchip/rk3588_iomux.c

856

uint32_t val;

sys/arch/arm/rockchip/rk3588_iomux.c

860

val = RK3588_GPIO_P_CTL_Z;

sys/arch/arm/rockchip/rk3588_iomux.c

863

val = RK3588_GPIO_P_PULLUP;

sys/arch/arm/rockchip/rk3588_iomux.c

866

val = RK3588_GPIO_P_PULLDOWN;

sys/arch/arm/rockchip/rk3588_iomux.c

874

val = (mask << 16) | __SHIFTIN(val, mask);

sys/arch/arm/rockchip/rk3588_iomux.c

876

syscon_write_4(sc->sc_grf, reg, val);

sys/arch/arm/rockchip/rk3588_iomux.c

882

reg, val);

sys/arch/arm/rockchip/rk3588_iomux.c

895

uint32_t val = (mask << 16) | __SHIFTIN(drv, mask);

sys/arch/arm/rockchip/rk3588_iomux.c

897

syscon_write_4(sc->sc_grf, reg, val);

sys/arch/arm/rockchip/rk3588_iomux.c

901

rk3588_iomux_pinname(pin), drv, reg, val);

sys/arch/arm/rockchip/rk3588_iomux.c

911

uint32_t val;

sys/arch/arm/rockchip/rk3588_iomux.c

914

val = (mask << 16) | __SHIFTIN(__BIT(3), mask);

sys/arch/arm/rockchip/rk3588_iomux.c

915

syscon_write_4(sc->sc_grf, reg0, val);

sys/arch/arm/rockchip/rk3588_iomux.c

918

val = (mask << 16) | __SHIFTIN(mux, mask);

sys/arch/arm/rockchip/rk3588_iomux.c

919

syscon_write_4(sc->sc_grf, reg, val);

sys/arch/arm/rockchip/rk3588_iomux.c

923

rk3588_iomux_pinname(pin), mux, reg, val);

sys/arch/arm/rockchip/rk_cru.h

156

uint32_t val;

sys/arch/arm/rockchip/rk_cru.h

468

#define CRU_WRITE(sc, reg, val) \

sys/arch/arm/rockchip/rk_cru.h

469

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_cru_arm.c

159

cpu_rate->divs[i].val == 0)

sys/arch/arm/rockchip/rk_cru_arm.c

163

write_val = cpu_rate->divs[i].val;

sys/arch/arm/rockchip/rk_cru_arm.c

206

const uint32_t val = CRU_READ(sc, arm->mux_reg);

sys/arch/arm/rockchip/rk_cru_arm.c

207

const u_int mux = __SHIFTOUT(val, arm->mux_mask);

sys/arch/arm/rockchip/rk_cru_arm.c

57

const uint32_t val = CRU_READ(sc, arm->divs[0].reg);

sys/arch/arm/rockchip/rk_cru_arm.c

58

const u_int div = __SHIFTOUT(val, arm->divs[0].mask) + 1;

sys/arch/arm/rockchip/rk_cru_composite.c

221

uint32_t val;

sys/arch/arm/rockchip/rk_cru_composite.c

227

val = CRU_READ(sc, composite->muxdiv_reg);

sys/arch/arm/rockchip/rk_cru_composite.c

228

mux = __SHIFTOUT(val, composite->mux_mask);

sys/arch/arm/rockchip/rk_cru_composite.c

79

const uint32_t val = CRU_READ(sc, composite->frac_reg);

sys/arch/arm/rockchip/rk_cru_composite.c

80

const u_int num = (val >> 16) & 0xffff;

sys/arch/arm/rockchip/rk_cru_composite.c

81

const u_int den = val & 0xffff;

sys/arch/arm/rockchip/rk_cru_composite.c

85

const uint32_t val = CRU_READ(sc, composite->muxdiv_reg);

sys/arch/arm/rockchip/rk_cru_composite.c

89

div = 1U << __SHIFTOUT(val, composite->div_mask);

sys/arch/arm/rockchip/rk_cru_composite.c

91

div = __SHIFTOUT(val, composite->div_mask) * 2 + 3;

sys/arch/arm/rockchip/rk_cru_composite.c

95

? __SHIFTOUT(val, composite->div_mask) + 1 : 1;

sys/arch/arm/rockchip/rk_cru_mux.c

45

uint32_t val;

sys/arch/arm/rockchip/rk_cru_mux.c

53

val = syscon_read_4(sc->sc_grf, mux->reg);

sys/arch/arm/rockchip/rk_cru_mux.c

56

val = CRU_READ(sc, mux->reg);

sys/arch/arm/rockchip/rk_cru_mux.c

58

const u_int index = __SHIFTOUT(val, mux->mask);

sys/arch/arm/rockchip/rk_cru_pll.c

162

uint32_t val;

sys/arch/arm/rockchip/rk_cru_pll.c

246

val = CRU_READ(sc, pll->con_base + PLL_CON2);

sys/arch/arm/rockchip/rk_cru_pll.c

247

val &= ~PLL_FRACDIV;

sys/arch/arm/rockchip/rk_cru_pll.c

248

val |= __SHIFTIN(pll_rate->fracdiv, PLL_FRACDIV);

sys/arch/arm/rockchip/rk_cru_pll.c

249

CRU_WRITE(sc, pll->con_base + PLL_CON2, val);

sys/arch/arm/rockchip/rk_emmcphy.c

105

#define WR4(sc, reg, val) \

sys/arch/arm/rockchip/rk_emmcphy.c

106

syscon_write_4((sc)->sc_syscon, (sc)->sc_regbase + (reg), (val))

sys/arch/arm/rockchip/rk_emmcphy.c

137

uint32_t mask, val;

sys/arch/arm/rockchip/rk_emmcphy.c

145

val = __SHIFTIN(0, PHYCTRL_DR_TY);

sys/arch/arm/rockchip/rk_emmcphy.c

146

WR4(sc, GRF_EMMCPHY_CON6, (mask << 16) | val);

sys/arch/arm/rockchip/rk_emmcphy.c

150

val = PHYCTRL_OTAPDLYENA | __SHIFTIN(4, PHYCTRL_OTAPDLYSEL);

sys/arch/arm/rockchip/rk_emmcphy.c

151

WR4(sc, GRF_EMMCPHY_CON0, (mask << 16) | val);

sys/arch/arm/rockchip/rk_emmcphy.c

156

val = 0;

sys/arch/arm/rockchip/rk_emmcphy.c

157

WR4(sc, GRF_EMMCPHY_CON6, (mask << 16) | val);

sys/arch/arm/rockchip/rk_emmcphy.c

183

val = PHYCTRL_PDB;

sys/arch/arm/rockchip/rk_emmcphy.c

184

WR4(sc, GRF_EMMCPHY_CON6, (mask << 16) | val);

sys/arch/arm/rockchip/rk_emmcphy.c

188

val = RD4(sc, GRF_EMMCPHY_STATUS);

sys/arch/arm/rockchip/rk_emmcphy.c

189

if ((val & PHYCTRL_CALDONE) == 0) {

sys/arch/arm/rockchip/rk_emmcphy.c

197

val = __SHIFTIN(frqsel, PHYCTRL_FRQSEL);

sys/arch/arm/rockchip/rk_emmcphy.c

198

WR4(sc, GRF_EMMCPHY_CON0, (mask << 16) | val);

sys/arch/arm/rockchip/rk_emmcphy.c

202

val = PHYCTRL_ENDLL;

sys/arch/arm/rockchip/rk_emmcphy.c

203

WR4(sc, GRF_EMMCPHY_CON6, (mask << 16) | val);

sys/arch/arm/rockchip/rk_emmcphy.c

208

val = RD4(sc, GRF_EMMCPHY_STATUS);

sys/arch/arm/rockchip/rk_emmcphy.c

209

if ((val & PHYCTRL_DLLRDY) == 0) {

sys/arch/arm/rockchip/rk_gpio.c

114

#define WR4(sc, reg, val) \

sys/arch/arm/rockchip/rk_gpio.c

115

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_gpio.c

168

int val;

sys/arch/arm/rockchip/rk_gpio.c

172

val = sc->sc_gp.gp_pin_read(sc, pin->pin_nr);

sys/arch/arm/rockchip/rk_gpio.c

174

val = !val;

sys/arch/arm/rockchip/rk_gpio.c

176

return val;

sys/arch/arm/rockchip/rk_gpio.c

180

rk_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/rockchip/rk_gpio.c

188

val = !val;

sys/arch/arm/rockchip/rk_gpio.c

190

sc->sc_gp.gp_pin_write(sc, pin->pin_nr, val);

sys/arch/arm/rockchip/rk_gpio.c

205

int val;

sys/arch/arm/rockchip/rk_gpio.c

213

val = __SHIFTOUT(data, data_mask);

sys/arch/arm/rockchip/rk_gpio.c

215

return val;

sys/arch/arm/rockchip/rk_gpio.c

219

rk_gpio_pin_write(void *priv, int pin, int val)

sys/arch/arm/rockchip/rk_gpio.c

230

if (val)

sys/arch/arm/rockchip/rk_gpio.c

261

int val;

sys/arch/arm/rockchip/rk_gpio.c

269

val = __SHIFTOUT(data, data_mask);

sys/arch/arm/rockchip/rk_gpio.c

271

return val;

sys/arch/arm/rockchip/rk_gpio.c

275

rk_gpio_v2_pin_write(void *priv, int pin, int val)

sys/arch/arm/rockchip/rk_gpio.c

285

data = val ? GPIOV2_DATA_MASK(pin) : 0;

sys/arch/arm/rockchip/rk_gpio.c

335

uint32_t val;

sys/arch/arm/rockchip/rk_gpio.c

351

val = RD4(sc, GPIO_INTTYPE_LEVEL_REG);

sys/arch/arm/rockchip/rk_gpio.c

353

val |= 1 << pin;

sys/arch/arm/rockchip/rk_gpio.c

355

val &= ~(1 << pin);

sys/arch/arm/rockchip/rk_gpio.c

356

WR4(sc, GPIO_INTTYPE_LEVEL_REG, val);

sys/arch/arm/rockchip/rk_gpio.c

358

val = RD4(sc, GPIO_INT_POLARITY_REG);

sys/arch/arm/rockchip/rk_gpio.c

360

val |= 1 << pin;

sys/arch/arm/rockchip/rk_gpio.c

362

val &= ~(1 << pin);

sys/arch/arm/rockchip/rk_gpio.c

363

WR4(sc, GPIO_INT_POLARITY_REG, val);

sys/arch/arm/rockchip/rk_gpio.c

365

val = RD4(sc, GPIO_INTEN_REG);

sys/arch/arm/rockchip/rk_gpio.c

366

val |= 1 << pin;

sys/arch/arm/rockchip/rk_gpio.c

367

WR4(sc, GPIO_INTEN_REG, val);

sys/arch/arm/rockchip/rk_gpio.c

370

val = R4(sc, SUNXI_GPIO_INT_CFG, pin);

sys/arch/arm/rockchip/rk_gpio.c

371

val &= ~SUNXI_GPIO_INT_MODEMASK(eint->eint_num);

sys/arch/arm/rockchip/rk_gpio.c

372

val |= __SHIFTIN(mode, SUNXI_GPIO_INT_MODEMASK(eint->eint_num));

sys/arch/arm/rockchip/rk_gpio.c

373

GPIO_WRITE(sc, SUNXI_GPIO_INT_CFG(eint->eint_bank, eint->eint_num), val);

sys/arch/arm/rockchip/rk_gpio.c

375

val = SUNXI_GPIO_INT_DEBOUNCE_CLK_SEL;

sys/arch/arm/rockchip/rk_gpio.c

376

GPIO_WRITE(sc, SUNXI_GPIO_INT_DEBOUNCE(eint->eint_bank), val);

sys/arch/arm/rockchip/rk_gpio.c

379

val = GPIO_READ(sc, SUNXI_GPIO_INT_CTL(eint->eint_bank));

sys/arch/arm/rockchip/rk_gpio.c

380

val |= __BIT(eint->eint_num);

sys/arch/arm/rockchip/rk_gpio.c

381

GPIO_WRITE(sc, SUNXI_GPIO_INT_CTL(eint->eint_bank), val);

sys/arch/arm/rockchip/rk_gpio.c

391

uint32_t val;

sys/arch/arm/rockchip/rk_gpio.c

398

val = RD4(sc, GPIO_INTEN_REG);

sys/arch/arm/rockchip/rk_gpio.c

399

val &= ~__BIT(eint->eint_num);

sys/arch/arm/rockchip/rk_gpio.c

400

WR4(sc, GPIO_INTEN_REG, val);

sys/arch/arm/rockchip/rk_gpio.c

558

uint32_t val;

sys/arch/arm/rockchip/rk_gpio.c

560

val = RD4(sc, GPIO_INTMASK_REG);

sys/arch/arm/rockchip/rk_gpio.c

561

val |= 1 << eint->eint_num;

sys/arch/arm/rockchip/rk_gpio.c

562

WR4(sc, GPIO_INTEN_REG, val);

sys/arch/arm/rockchip/rk_gpio.c

570

uint32_t val;

sys/arch/arm/rockchip/rk_gpio.c

572

val = RD4(sc, GPIO_INTMASK_REG);

sys/arch/arm/rockchip/rk_gpio.c

573

val &= ~(1 << eint->eint_num);

sys/arch/arm/rockchip/rk_gpio.c

574

WR4(sc, GPIO_INTEN_REG, val);

sys/arch/arm/rockchip/rk_i2c.c

126

#define WR4(sc, reg, val) \

sys/arch/arm/rockchip/rk_i2c.c

127

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_i2c.c

170

uint32_t val;

sys/arch/arm/rockchip/rk_i2c.c

174

val = RD4(sc, RKI2C_IPD);

sys/arch/arm/rockchip/rk_i2c.c

175

if (val & ipdmask)

sys/arch/arm/rockchip/rk_i2c.c

180

WR4(sc, RKI2C_IPD, val & ipdmask);

sys/arch/arm/rockchip/rk_i2c.c

182

if ((val & RKI2C_IPD_NAKRCVIPD) != 0)

sys/arch/arm/rockchip/rk_i2c.c

184

if ((val & mask) != 0)

sys/arch/arm/rockchip/rk_i2s.c

166

#define WR4(sc, reg, val) \

sys/arch/arm/rockchip/rk_i2s.c

167

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_i2s.c

255

uint32_t val;

sys/arch/arm/rockchip/rk_i2s.c

258

val = RD4(sc, I2S_XFER);

sys/arch/arm/rockchip/rk_i2s.c

259

val |= (XFER_TXS | XFER_RXS);

sys/arch/arm/rockchip/rk_i2s.c

260

WR4(sc, I2S_XFER, val);

sys/arch/arm/rockchip/rk_i2s.c

265

val = RD4(sc, I2S_INTCR);

sys/arch/arm/rockchip/rk_i2s.c

266

val |= INTCR_TXEIE;

sys/arch/arm/rockchip/rk_i2s.c

267

val &= ~INTCR_TFT;

sys/arch/arm/rockchip/rk_i2s.c

268

val |= __SHIFTIN(RK_I2S_FIFO_DEPTH / 2, INTCR_TFT);

sys/arch/arm/rockchip/rk_i2s.c

269

WR4(sc, I2S_INTCR, val);

sys/arch/arm/rockchip/rk_i2s.c

293

uint32_t val;

sys/arch/arm/rockchip/rk_i2s.c

297

val = RD4(sc, I2S_XFER);

sys/arch/arm/rockchip/rk_i2s.c

298

val &= ~(XFER_TXS|XFER_RXS);

sys/arch/arm/rockchip/rk_i2s.c

299

WR4(sc, I2S_XFER, val);

sys/arch/arm/rockchip/rk_i2s.c

302

val = RD4(sc, I2S_INTCR);

sys/arch/arm/rockchip/rk_i2s.c

303

val &= ~INTCR_TXEIE;

sys/arch/arm/rockchip/rk_i2s.c

304

WR4(sc, I2S_INTCR, val);

sys/arch/arm/rockchip/rk_i2s.c

306

val = RD4(sc, I2S_CLR);

sys/arch/arm/rockchip/rk_i2s.c

307

val |= CLR_TXC;

sys/arch/arm/rockchip/rk_i2s.c

308

WR4(sc, I2S_CLR, val);

sys/arch/arm/rockchip/rk_i2s.c

324

uint32_t val;

sys/arch/arm/rockchip/rk_i2s.c

328

val = RD4(sc, I2S_XFER);

sys/arch/arm/rockchip/rk_i2s.c

329

val &= ~(XFER_TXS|XFER_RXS);

sys/arch/arm/rockchip/rk_i2s.c

330

WR4(sc, I2S_XFER, val);

sys/arch/arm/rockchip/rk_i2s.c

333

val = RD4(sc, I2S_INTCR);

sys/arch/arm/rockchip/rk_i2s.c

334

val &= ~INTCR_RXFIE;

sys/arch/arm/rockchip/rk_i2s.c

335

WR4(sc, I2S_INTCR, val);

sys/arch/arm/rockchip/rk_i2s.c

373

uint32_t sr, val;

sys/arch/arm/rockchip/rk_i2s.c

382

val = RD4(sc, I2S_RXFIFOLR);

sys/arch/arm/rockchip/rk_i2s.c

383

fifolr = __SHIFTOUT(val, RXFIFOLR_RFL(0));

sys/arch/arm/rockchip/rk_i2s.c

396

val = RD4(sc, I2S_TXFIFOLR);

sys/arch/arm/rockchip/rk_i2s.c

397

fifolr = __SHIFTOUT(val, TXFIFOLR_TFL(0));

sys/arch/arm/rockchip/rk_i2s.c

568

uint32_t val;

sys/arch/arm/rockchip/rk_i2s.c

597

val = __SHIFTIN(sc->sc_conf->oe_val, sc->sc_conf->oe_mask);

sys/arch/arm/rockchip/rk_i2s.c

598

val |= (sc->sc_conf->oe_mask << 16);

sys/arch/arm/rockchip/rk_i2s.c

599

syscon_write_4(sc->sc_grf, sc->sc_conf->oe_reg, val);

sys/arch/arm/rockchip/rk_pwm.c

84

#define PWM_WRITE(sc, reg, val) \

sys/arch/arm/rockchip/rk_pwm.c

85

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_spi.c

168

#define SPIREG_WRITE(sc, reg, val) \

sys/arch/arm/rockchip/rk_spi.c

169

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_tcphy.c

101

#define HWRITE4(sc, reg, val) \

sys/arch/arm/rockchip/rk_tcphy.c

102

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_tsadc.c

454

#define TSADC_WRITE(sc, reg, val) \

sys/arch/arm/rockchip/rk_tsadc.c

455

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_tsadc.c

670

uint32_t val = TSADC_READ(sc, TSADC_AUTO_CON);

sys/arch/arm/rockchip/rk_tsadc.c

703

val |= rks->s_comp_int_en;

sys/arch/arm/rockchip/rk_tsadc.c

705

TSADC_WRITE(sc, TSADC_AUTO_CON, val);

sys/arch/arm/rockchip/rk_tsadc.c

711

uint32_t val;

sys/arch/arm/rockchip/rk_tsadc.c

717

val = TSADC_READ(sc, TSADC_INT_EN);

sys/arch/arm/rockchip/rk_tsadc.c

719

val |= TSADC_INT_EN_TSHUT_2CRU_EN_SRC1 |

sys/arch/arm/rockchip/rk_tsadc.c

721

val &= ~(TSADC_INT_EN_TSHUT_2GPIO_EN_SRC1 |

sys/arch/arm/rockchip/rk_tsadc.c

725

val &= ~(TSADC_INT_EN_TSHUT_2CRU_EN_SRC1 |

sys/arch/arm/rockchip/rk_tsadc.c

727

val |= TSADC_INT_EN_TSHUT_2GPIO_EN_SRC1 |

sys/arch/arm/rockchip/rk_tsadc.c

730

TSADC_WRITE(sc, TSADC_INT_EN, val);

sys/arch/arm/rockchip/rk_tsadc.c

733

val = TSADC_READ(sc, TSADC_AUTO_CON);

sys/arch/arm/rockchip/rk_tsadc.c

735

val |= TSADC_AUTO_CON_TSHUT_POLARITY;

sys/arch/arm/rockchip/rk_tsadc.c

737

val &= ~TSADC_AUTO_CON_TSHUT_POLARITY;

sys/arch/arm/rockchip/rk_tsadc.c

738

TSADC_WRITE(sc, TSADC_AUTO_CON, val);

sys/arch/arm/rockchip/rk_tsadc.c

773

uint32_t val;

sys/arch/arm/rockchip/rk_tsadc.c

775

val = TSADC_READ(sc, TSADC_AUTO_CON);

sys/arch/arm/rockchip/rk_tsadc.c

776

val |= TSADC_AUTO_CON_AUTO_STATUS |

sys/arch/arm/rockchip/rk_tsadc.c

778

TSADC_WRITE(sc, TSADC_AUTO_CON, val);

sys/arch/arm/rockchip/rk_tsadc.c

783

val = TSADC_READ(sc, TSADC_AUTO_CON);

sys/arch/arm/rockchip/rk_tsadc.c

784

val |= TSADC_AUTO_CON_AUTO_EN;

sys/arch/arm/rockchip/rk_tsadc.c

786

val |= TSADC_AUTO_CON_Q_SEL;

sys/arch/arm/rockchip/rk_tsadc.c

788

TSADC_WRITE(sc, TSADC_AUTO_CON, val);

sys/arch/arm/rockchip/rk_tsadc.c

864

uint32_t val;

sys/arch/arm/rockchip/rk_tsadc.c

875

val = TSADC_READ(sc, TSADC_INT_PD);

sys/arch/arm/rockchip/rk_tsadc.c

878

val & ~TSADC_INT_PD_EOC_INT_PD_V3);

sys/arch/arm/rockchip/rk_tsadc.c

881

val & ~TSADC_INT_PD_EOC_INT_PD_V2);

sys/arch/arm/rockchip/rk_vop.c

186

#define WR4(sc, reg, val) \

sys/arch/arm/rockchip/rk_vop.c

187

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/rockchip/rk_vop.c

190

WR4_MASK(struct rk_vop_softc *sc, bus_size_t reg, uint16_t mask, uint16_t val)

sys/arch/arm/rockchip/rk_vop.c

193

KASSERT(val == (mask & val));

sys/arch/arm/rockchip/rk_vop.c

194

WR4(sc, reg, ((uint32_t)mask << 16) | val);

sys/arch/arm/rockchip/rk_vop.c

225

uint32_t mask, val;

sys/arch/arm/rockchip/rk_vop.c

245

val = RD4(sc, VOP_DSP_CTRL1);

sys/arch/arm/rockchip/rk_vop.c

246

val &= ~mask;

sys/arch/arm/rockchip/rk_vop.c

247

val |= __SHIFTIN(pol, mask);

sys/arch/arm/rockchip/rk_vop.c

248

WR4(sc, VOP_DSP_CTRL1, val);

sys/arch/arm/rockchip/rk_vop.c

254

uint32_t val;

sys/arch/arm/rockchip/rk_vop.c

256

val = RD4(sc, VOP_SYS_CTRL);

sys/arch/arm/rockchip/rk_vop.c

257

val |= RK3399_VOP_SYS_CTRL_ENABLE;

sys/arch/arm/rockchip/rk_vop.c

258

WR4(sc, VOP_SYS_CTRL, val);

sys/arch/arm/rockchip/rk_vop.c

319

uint32_t val;

sys/arch/arm/rockchip/rk_vop.c

323

val = __SHIFTIN(act_width - 1, WIN0_ACT_WIDTH) |

sys/arch/arm/rockchip/rk_vop.c

325

WR4(sc, VOP_WIN0_ACT_INFO, val);

sys/arch/arm/rockchip/rk_vop.c

329

val = __SHIFTIN(dsp_width - 1, WIN0_DSP_WIDTH) |

sys/arch/arm/rockchip/rk_vop.c

331

WR4(sc, VOP_WIN0_DSP_INFO, val);

sys/arch/arm/rockchip/rk_vop.c

337

val = __SHIFTIN(dst->x1 + htotal - hsync_start, WIN0_DSP_XST) |

sys/arch/arm/rockchip/rk_vop.c

339

WR4(sc, VOP_WIN0_DSP_ST, val);

sys/arch/arm/rockchip/rk_vop.c

351

val = __SHIFTIN(lb_mode, WIN0_LB_MODE) |

sys/arch/arm/rockchip/rk_vop.c

354

WR4(sc, VOP_WIN0_CTRL, val);

sys/arch/arm/rockchip/rk_vop.c

373

val = __SHIFTIN(sfb->base.pitches[0] / 4, WIN0_VIR_STRIDE);

sys/arch/arm/rockchip/rk_vop.c

374

WR4(sc, VOP_WIN0_VIR, val);

sys/arch/arm/rockchip/rk_vop.c

422

uint32_t val;

sys/arch/arm/rockchip/rk_vop.c

424

val = RD4(sc, VOP_SYS_CTRL);

sys/arch/arm/rockchip/rk_vop.c

428

val &= ~VOP_STANDBY_EN;

sys/arch/arm/rockchip/rk_vop.c

433

val |= VOP_STANDBY_EN;

sys/arch/arm/rockchip/rk_vop.c

437

WR4(sc, VOP_SYS_CTRL, val);

sys/arch/arm/rockchip/rk_vop.c

460

uint32_t val;

sys/arch/arm/rockchip/rk_vop.c

507

val = RD4(sc, VOP_SYS_CTRL);

sys/arch/arm/rockchip/rk_vop.c

508

val &= ~VOP_STANDBY_EN;

sys/arch/arm/rockchip/rk_vop.c

509

val &= ~(MIPI_OUT_EN|EDP_OUT_EN|HDMI_OUT_EN|RGB_OUT_EN);

sys/arch/arm/rockchip/rk_vop.c

513

val |= HDMI_OUT_EN;

sys/arch/arm/rockchip/rk_vop.c

516

val |= EDP_OUT_EN;

sys/arch/arm/rockchip/rk_vop.c

519

WR4(sc, VOP_SYS_CTRL, val);

sys/arch/arm/rockchip/rk_vop.c

521

val = RD4(sc, VOP_DSP_CTRL0);

sys/arch/arm/rockchip/rk_vop.c

522

val &= ~DSP_OUT_MODE;

sys/arch/arm/rockchip/rk_vop.c

523

val |= __SHIFTIN(sc->sc_conf->out_mode, DSP_OUT_MODE);

sys/arch/arm/rockchip/rk_vop.c

524

WR4(sc, VOP_DSP_CTRL0, val);

sys/arch/arm/rockchip/rk_vop.c

526

val = __SHIFTIN(hsync_len + hback_porch, DSP_HACT_ST_POST) |

sys/arch/arm/rockchip/rk_vop.c

528

WR4(sc, VOP_POST_DSP_HACT_INFO, val);

sys/arch/arm/rockchip/rk_vop.c

530

val = __SHIFTIN(hsync_len + hback_porch, DSP_HACT_ST) |

sys/arch/arm/rockchip/rk_vop.c

532

WR4(sc, VOP_DSP_HACT_ST_END, val);

sys/arch/arm/rockchip/rk_vop.c

534

val = __SHIFTIN(hsync_len, DSP_HTOTAL) |

sys/arch/arm/rockchip/rk_vop.c

536

WR4(sc, VOP_DSP_HTOTAL_HS_END, val);

sys/arch/arm/rockchip/rk_vop.c

538

val = __SHIFTIN(vsync_len + vback_porch, DSP_VACT_ST_POST) |

sys/arch/arm/rockchip/rk_vop.c

540

WR4(sc, VOP_POST_DSP_VACT_INFO, val);

sys/arch/arm/rockchip/rk_vop.c

542

val = __SHIFTIN(vsync_len + vback_porch, DSP_VACT_ST) |

sys/arch/arm/rockchip/rk_vop.c

544

WR4(sc, VOP_DSP_VACT_ST_END, val);

sys/arch/arm/rockchip/rk_vop.c

546

val = __SHIFTIN(vsync_len, DSP_VTOTAL) |

sys/arch/arm/rockchip/rk_vop.c

548

WR4(sc, VOP_DSP_VTOTAL_VS_END, val);

sys/arch/arm/rockchip/rk_vop.c

558

uint32_t val;

sys/arch/arm/rockchip/rk_vop.c

562

val = RD4(sc, VOP_SYS_CTRL);

sys/arch/arm/rockchip/rk_vop.c

563

val |= VOP_STANDBY_EN;

sys/arch/arm/rockchip/rk_vop.c

564

WR4(sc, VOP_SYS_CTRL, val);

sys/arch/arm/s3c2xx0/s3c2440reg.h

224

#define GPIO_SET_DATA(v,pin,val) \

sys/arch/arm/s3c2xx0/s3c2440reg.h

225

( ((v) & ~(1<<pin)) | (((val)&0x1)<<pin) )

sys/arch/arm/s3c2xx0/s3c2440reg.h

451

#define DMACON_TC(val) (val & DMACON_TC_MASK)

sys/arch/arm/s3c2xx0/s3c2440reg.h

502

#define IISMOD_SERIAL_FREQ(val) ((val << IISMOD_SERIAL_FREQ_SHIFT) & IISMOD_SERIAL_FREQ_MASK)

sys/arch/arm/s3c2xx0/s3c2440reg.h

515

#define IISMOD_MODE(val) ((val << IISMOD_MODE_SHIFT) & IISMOD_MODE_MASK)

sys/arch/arm/s3c2xx0/s3c2440reg.h

528

#define IISPSR_PRESCALER_A(val) (((val) << IISPSR_PRESCALER_A_SHIFT) & IISPSR_PRESCALER_A_MASK)

sys/arch/arm/s3c2xx0/s3c2440reg.h

531

#define IISPSR_PRESCALER_B(val) (((val) << IISPSR_PRESCALER_B_SHIFT) & IISPSR_PRESCALER_B_MASK)

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

194

uint32_t lcdcon1, val;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

203

case 1: val = LCDCON1_BPPMODE_STN1; break;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

204

case 2: val = LCDCON1_BPPMODE_STN2; break;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

205

case 4: val = LCDCON1_BPPMODE_STN4; break;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

206

case 8: val = LCDCON1_BPPMODE_STN8; break;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

210

val = LCDCON1_BPPMODE_STN12;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

215

val = LCDCON1_BPPMODE_TFT16;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

220

val = LCDCON1_BPPMODE_TFT24;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

227

val |= LCDCON1_BPPMODE_TFTX;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

231

lcdcon1 |= val;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

235

val = roundup(panel_width, 16 / depth);

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

238

(val - 1) << LCDCON3_HOZVAL_SHIFT);

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

257

val = bus_space_read_4(iot, ioh, LCDC_LCDCON5);

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

258

val &= ~(LCDCON5_BSWP|LCDCON5_HWSWP);

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

263

val |= LCDCON5_BSWP;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

266

val |= LCDCON5_HWSWP;

sys/arch/arm/s3c2xx0/s3c24x0_lcd.c

269

bus_space_write_4(iot, ioh, LCDC_LCDCON5, val);

sys/arch/arm/s3c2xx0/s3c2800_pci.c

490

s3c2800_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/s3c2xx0/s3c2800_pci.c

502

*(pcireg_t *) va = val;

sys/arch/arm/sa11x0/sa1111_kbc.c

334

sackbc_send_cmd(void *cookie, pckbport_slot_t slot, u_char val)

sys/arch/arm/sa11x0/sa1111_kbc.c

340

bus_space_write_1(sc->iot, sc->ioh, SACCKBD_DATA, val);

sys/arch/arm/samsung/exynos5410_clock.c

469

#define CLOCK_WRITE(sc, reg, val) \

sys/arch/arm/samsung/exynos5410_clock.c

470

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/samsung/exynos5422_clock.c

601

#define CLOCK_WRITE(sc, reg, val) \

sys/arch/arm/samsung/exynos5422_clock.c

602

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/samsung/exynos_gpio.c

241

#define GPIO_WRITE(bank, reg, val) \

sys/arch/arm/samsung/exynos_gpio.c

244

(bank)->bank_core_offset + (reg), (val))

sys/arch/arm/samsung/exynos_gpio.c

269

uint8_t val;

sys/arch/arm/samsung/exynos_gpio.c

272

val = bus_space_read_1(bank->bank_sc->sc_bst, bank->bank_sc->sc_bsh,

sys/arch/arm/samsung/exynos_gpio.c

275

return __SHIFTOUT(val, __BIT(pin));

sys/arch/arm/samsung/exynos_gpio.c

282

int val;

sys/arch/arm/samsung/exynos_gpio.c

285

val = bus_space_read_1(bank->bank_sc->sc_bst, bank->bank_sc->sc_bsh,

sys/arch/arm/samsung/exynos_gpio.c

287

val &= ~__BIT(pin);

sys/arch/arm/samsung/exynos_gpio.c

289

val |= __BIT(pin);

sys/arch/arm/samsung/exynos_gpio.c

291

EXYNOS_GPIO_DAT, val);

sys/arch/arm/samsung/exynos_gpio.c

327

uint32_t val;

sys/arch/arm/samsung/exynos_gpio.c

330

val = GPIO_READ(bank, EXYNOS_GPIO_CON);

sys/arch/arm/samsung/exynos_gpio.c

331

val &= ~(0xf << (pin * 4));

sys/arch/arm/samsung/exynos_gpio.c

332

val |= (cfg->cfg << (pin * 4));

sys/arch/arm/samsung/exynos_gpio.c

333

GPIO_WRITE(bank, EXYNOS_GPIO_CON, val);

sys/arch/arm/samsung/exynos_gpio.c

337

val = GPIO_READ(bank, EXYNOS_GPIO_PUD);

sys/arch/arm/samsung/exynos_gpio.c

338

val &= ~(0x3 << (pin * 2));

sys/arch/arm/samsung/exynos_gpio.c

339

val |= (cfg->pud << (pin * 2));

sys/arch/arm/samsung/exynos_gpio.c

340

GPIO_WRITE(bank, EXYNOS_GPIO_PUD, val);

sys/arch/arm/samsung/exynos_gpio.c

344

val = GPIO_READ(bank, EXYNOS_GPIO_DRV);

sys/arch/arm/samsung/exynos_gpio.c

345

val &= ~(0x3 << (pin * 2));

sys/arch/arm/samsung/exynos_gpio.c

346

val |= (cfg->drv << (pin * 2));

sys/arch/arm/samsung/exynos_gpio.c

347

GPIO_WRITE(bank, EXYNOS_GPIO_DRV, val);

sys/arch/arm/samsung/exynos_gpio.c

351

val = GPIO_READ(bank, EXYNOS_GPIO_CONPWD);

sys/arch/arm/samsung/exynos_gpio.c

352

val &= ~(0x3 << (pin * 2));

sys/arch/arm/samsung/exynos_gpio.c

353

val |= (cfg->conpwd << (pin * 2));

sys/arch/arm/samsung/exynos_gpio.c

354

GPIO_WRITE(bank, EXYNOS_GPIO_CONPWD, val);

sys/arch/arm/samsung/exynos_gpio.c

358

val = GPIO_READ(bank, EXYNOS_GPIO_PUDPWD);

sys/arch/arm/samsung/exynos_gpio.c

359

val &= ~(0x3 << (pin * 2));

sys/arch/arm/samsung/exynos_gpio.c

360

val |= (cfg->pudpwd << (pin * 2));

sys/arch/arm/samsung/exynos_gpio.c

361

GPIO_WRITE(bank, EXYNOS_GPIO_PUDPWD, val);

sys/arch/arm/samsung/exynos_gpio.c

502

int val;

sys/arch/arm/samsung/exynos_gpio.c

504

val = (bus_space_read_1(gpin->pin_sc->sc_bst,

sys/arch/arm/samsung/exynos_gpio.c

509

val = !val;

sys/arch/arm/samsung/exynos_gpio.c

511

return val;

sys/arch/arm/samsung/exynos_gpio.c

515

exynos_gpio_fdt_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/samsung/exynos_gpio.c

520

val = !val;

sys/arch/arm/samsung/exynos_gpio.c

522

val = bus_space_read_1(gpin->pin_sc->sc_bst,

sys/arch/arm/samsung/exynos_gpio.c

525

val &= ~__BIT(gpin->pin_no);

sys/arch/arm/samsung/exynos_gpio.c

526

if (val)

sys/arch/arm/samsung/exynos_gpio.c

527

val |= __BIT(gpin->pin_no);

sys/arch/arm/samsung/exynos_gpio.c

530

EXYNOS_GPIO_DAT, val);

sys/arch/arm/samsung/exynos_i2c.c

89

#define I2C_WRITE(sc, reg, val) \

sys/arch/arm/samsung/exynos_i2c.c

90

bus_space_write_1((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/samsung/exynos_platform.c

105

uint32_t val, started = 0;

sys/arch/arm/samsung/exynos_platform.c

127

val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_OPTION(0));

sys/arch/arm/samsung/exynos_platform.c

128

bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_OPTION(0), val | option);

sys/arch/arm/samsung/exynos_platform.c

129

val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_OPTION(1));

sys/arch/arm/samsung/exynos_platform.c

130

bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_OPTION(1), val | option);

sys/arch/arm/samsung/exynos_platform.c

159

val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_STATUS(cpu));

sys/arch/arm/samsung/exynos_platform.c

164

val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_STATUS(cpu));

sys/arch/arm/samsung/exynos_platform.c

165

if ((val & EXYNOS5800_PMU_CORE_POWER_EN) == EXYNOS5800_PMU_CORE_POWER_EN) {

sys/arch/arm/samsung/exynos_pwm.c

85

#define PWM_WRITE(sc, reg, val) \

sys/arch/arm/samsung/exynos_pwm.c

86

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/samsung/exynos_rtc.c

73

#define RTC_WRITE(sc, reg, val) \

sys/arch/arm/samsung/exynos_rtc.c

74

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/samsung/exynos_soc.c

248

int i, val;

sys/arch/arm/samsung/exynos_soc.c

254

val = cpu_freq_settings[i].freq;

sys/arch/arm/samsung/exynos_soc.c

255

snprintf(cpos, 6, "%d ", val);

sys/arch/arm/samsung/exynos_soc.c

256

cpos += (val < 1000) ? 4 : 5;

sys/arch/arm/samsung/exynos_uart.c

112

#define WR4(sc, reg, val) \

sys/arch/arm/samsung/exynos_uart.c

113

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/samsung/exynos_usbdrdphy.c

120

#define PHY_WRITE(sc, reg, val) \

sys/arch/arm/samsung/exynos_usbdrdphy.c

121

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/samsung/exynos_usbdrdphy.c

151

uint32_t val;

sys/arch/arm/samsung/exynos_usbdrdphy.c

154

val = syscon_read_4(sc->sc_pmureg, USBDRD_PHY_CTRL(phy->phy_index));

sys/arch/arm/samsung/exynos_usbdrdphy.c

156

val |= USBDRD_PHY_CTRL_EN;

sys/arch/arm/samsung/exynos_usbdrdphy.c

158

val &= ~USBDRD_PHY_CTRL_EN;

sys/arch/arm/samsung/exynos_usbdrdphy.c

159

syscon_write_4(sc->sc_pmureg, USBDRD_PHY_CTRL(phy->phy_index), val);

sys/arch/arm/samsung/exynos_usbdrdphy.c

174

uint32_t val;

sys/arch/arm/samsung/exynos_usbdrdphy.c

178

val = PHY_READ(sc, PHY_PARAM0);

sys/arch/arm/samsung/exynos_usbdrdphy.c

179

val &= ~PHY_PARAM0_REF_USE_PAD;

sys/arch/arm/samsung/exynos_usbdrdphy.c

180

val &= ~PHY_PARAM0_REF_LOSLEVEL;

sys/arch/arm/samsung/exynos_usbdrdphy.c

181

val |= __SHIFTIN(9, PHY_PARAM0_REF_LOSLEVEL);

sys/arch/arm/samsung/exynos_usbdrdphy.c

182

PHY_WRITE(sc, PHY_PARAM0, val);

sys/arch/arm/samsung/exynos_usbdrdphy.c

186

val = PHY_READ(sc, PHY_LINK_SYSTEM);

sys/arch/arm/samsung/exynos_usbdrdphy.c

187

val |= PHY_LINK_SYSTEM_XHCI_VERCTL;

sys/arch/arm/samsung/exynos_usbdrdphy.c

188

val &= ~PHY_LINK_SYSTEM_FLADJ;

sys/arch/arm/samsung/exynos_usbdrdphy.c

189

val |= __SHIFTIN(0x20, PHY_LINK_SYSTEM_FLADJ);

sys/arch/arm/samsung/exynos_usbdrdphy.c

190

PHY_WRITE(sc, PHY_LINK_SYSTEM, val);

sys/arch/arm/samsung/exynos_usbdrdphy.c

192

val = PHY_READ(sc, PHY_PARAM1);

sys/arch/arm/samsung/exynos_usbdrdphy.c

193

val &= ~PHY_PARAM1_TXDEEMPH;

sys/arch/arm/samsung/exynos_usbdrdphy.c

194

val |= __SHIFTIN(0x1c, PHY_PARAM1_TXDEEMPH);

sys/arch/arm/samsung/exynos_usbdrdphy.c

195

PHY_WRITE(sc, PHY_PARAM1, val);

sys/arch/arm/samsung/exynos_usbdrdphy.c

197

val = PHY_READ(sc, PHY_BATCHG);

sys/arch/arm/samsung/exynos_usbdrdphy.c

198

val |= PHY_BATCHG_UTMI_CLKSEL;

sys/arch/arm/samsung/exynos_usbdrdphy.c

199

PHY_WRITE(sc, PHY_BATCHG, val);

sys/arch/arm/samsung/exynos_usbdrdphy.c

201

val = PHY_READ(sc, PHY_TEST);

sys/arch/arm/samsung/exynos_usbdrdphy.c

202

val &= ~PHY_TEST_POWERDOWN_SSP;

sys/arch/arm/samsung/exynos_usbdrdphy.c

203

val &= ~PHY_TEST_POWERDOWN_HSP;

sys/arch/arm/samsung/exynos_usbdrdphy.c

204

PHY_WRITE(sc, PHY_TEST, val);

sys/arch/arm/samsung/exynos_usbdrdphy.c

208

val = __SHIFTIN(PHY_CLK_RST_REFCLKSEL_EXT, PHY_CLK_RST_REFCLKSEL);

sys/arch/arm/samsung/exynos_usbdrdphy.c

209

val |= __SHIFTIN(PHY_CLK_RST_FSEL_24M, PHY_CLK_RST_FSEL);

sys/arch/arm/samsung/exynos_usbdrdphy.c

210

val |= __SHIFTIN(PHY_CLK_RST_MPLL_MULT_24M, PHY_CLK_RST_MPLL_MULT);

sys/arch/arm/samsung/exynos_usbdrdphy.c

211

val |= __SHIFTIN(0x88, PHY_CLK_RST_SSC_REFCLKSEL);

sys/arch/arm/samsung/exynos_usbdrdphy.c

212

val |= PHY_CLK_RST_PORTRESET;

sys/arch/arm/samsung/exynos_usbdrdphy.c

213

val |= PHY_CLK_RST_RETENABLEN;

sys/arch/arm/samsung/exynos_usbdrdphy.c

214

val |= PHY_CLK_RST_REF_SSP_EN;

sys/arch/arm/samsung/exynos_usbdrdphy.c

215

val |= PHY_CLK_RST_SSC_EN;

sys/arch/arm/samsung/exynos_usbdrdphy.c

216

val |= PHY_CLK_RST_COMMONONN;

sys/arch/arm/samsung/exynos_usbdrdphy.c

217

PHY_WRITE(sc, PHY_CLK_RST, val);

sys/arch/arm/samsung/exynos_usbdrdphy.c

221

val &= ~PHY_CLK_RST_PORTRESET;

sys/arch/arm/samsung/exynos_usbdrdphy.c

222

PHY_WRITE(sc, PHY_CLK_RST, val);

sys/arch/arm/samsung/exynos_usbphy.c

101

#define PHY_WRITE(sc, reg, val) \

sys/arch/arm/samsung/exynos_usbphy.c

102

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/samsung/exynos_usbphy.c

133

uint32_t val;

sys/arch/arm/samsung/exynos_usbphy.c

145

val = syscon_read_4(sc->sc_sysreg, USB20PHY_CFG);

sys/arch/arm/samsung/exynos_usbphy.c

147

val |= USB20PHY_CFG_HOST_LINK_EN;

sys/arch/arm/samsung/exynos_usbphy.c

149

val &= ~USB20PHY_CFG_HOST_LINK_EN;

sys/arch/arm/samsung/exynos_usbphy.c

150

syscon_write_4(sc->sc_sysreg, USB20PHY_CFG, val);

sys/arch/arm/samsung/exynos_usbphy.c

154

val = syscon_read_4(sc->sc_pmureg, USBHOST_PHY_CTRL);

sys/arch/arm/samsung/exynos_usbphy.c

156

val |= USBHOST_PHY_CTRL_EN;

sys/arch/arm/samsung/exynos_usbphy.c

158

val &= ~USBHOST_PHY_CTRL_EN;

sys/arch/arm/samsung/exynos_usbphy.c

159

syscon_write_4(sc->sc_pmureg, USBHOST_PHY_CTRL, val);

sys/arch/arm/samsung/exynos_usbphy.c

163

val = PHY_READ(sc, USB_PHY_HOST_CTRL0);

sys/arch/arm/samsung/exynos_usbphy.c

164

val &= ~HOST_CTRL0_COMMONON_N;

sys/arch/arm/samsung/exynos_usbphy.c

165

val &= ~HOST_CTRL0_PHY_SWRST;

sys/arch/arm/samsung/exynos_usbphy.c

166

val &= ~HOST_CTRL0_PHY_SWRST_ALL;

sys/arch/arm/samsung/exynos_usbphy.c

167

val &= ~HOST_CTRL0_SIDDQ;

sys/arch/arm/samsung/exynos_usbphy.c

168

val &= ~HOST_CTRL0_FORCESUSPEND;

sys/arch/arm/samsung/exynos_usbphy.c

169

val &= ~HOST_CTRL0_FORCESLEEP;

sys/arch/arm/samsung/exynos_usbphy.c

170

val &= ~HOST_CTRL0_FSEL_MASK;

sys/arch/arm/samsung/exynos_usbphy.c

171

val |= __SHIFTIN(FSEL_CLKSEL_24M, HOST_CTRL0_FSEL_MASK);

sys/arch/arm/samsung/exynos_usbphy.c

172

val |= HOST_CTRL0_LINK_SWRST;

sys/arch/arm/samsung/exynos_usbphy.c

173

val |= HOST_CTRL0_UTMI_SWRST;

sys/arch/arm/samsung/exynos_usbphy.c

174

PHY_WRITE(sc, USB_PHY_HOST_CTRL0, val);

sys/arch/arm/samsung/exynos_usbphy.c

178

val &= ~HOST_CTRL0_LINK_SWRST;

sys/arch/arm/samsung/exynos_usbphy.c

179

val &= ~HOST_CTRL0_UTMI_SWRST;

sys/arch/arm/samsung/exynos_usbphy.c

180

PHY_WRITE(sc, USB_PHY_HOST_CTRL0, val);

sys/arch/arm/samsung/exynos_usbphy.c

193

val = HSIC_CTRL_PHY_SWRST;

sys/arch/arm/samsung/exynos_usbphy.c

194

val |= __SHIFTIN(HSIC_CTRL_REFCLKDIV_12, HSIC_CTRL_REFCLKDIV_MASK);

sys/arch/arm/samsung/exynos_usbphy.c

195

val |= __SHIFTIN(HSIC_CTRL_REFCLKSEL_DEFAULT, HSIC_CTRL_REFCLKSEL_MASK);

sys/arch/arm/samsung/exynos_usbphy.c

196

PHY_WRITE(sc, reg, val);

sys/arch/arm/samsung/exynos_usbphy.c

200

val &= ~HSIC_CTRL_PHY_SWRST;

sys/arch/arm/samsung/exynos_usbphy.c

201

PHY_WRITE(sc, reg, val);

sys/arch/arm/samsung/exynos_usbphy.c

210

val = PHY_READ(sc, USB_PHY_HOST_EHCICTRL);

sys/arch/arm/samsung/exynos_usbphy.c

211

val |= HOST_EHCICTRL_ENA_INCRXALIGN;

sys/arch/arm/samsung/exynos_usbphy.c

212

val |= HOST_EHCICTRL_ENA_INCR4;

sys/arch/arm/samsung/exynos_usbphy.c

213

val |= HOST_EHCICTRL_ENA_INCR8;

sys/arch/arm/samsung/exynos_usbphy.c

214

val |= HOST_EHCICTRL_ENA_INCR16;

sys/arch/arm/samsung/exynos_usbphy.c

215

PHY_WRITE(sc, USB_PHY_HOST_EHCICTRL, val);

sys/arch/arm/sociox/if_scx.c

1778

mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/arm/sociox/if_scx.c

1793

*val = mac_read(sc, GMACGDR);

sys/arch/arm/sociox/if_scx.c

1798

mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/arm/sociox/if_scx.c

1806

mac_write(sc, GMACGDR, val);

sys/arch/arm/sociox/if_scx.c

1917

uint16_t val;

sys/arch/arm/sociox/if_scx.c

1920

err = mii_readreg(d, sc->sc_phy_id, MII_BMCR, &val);

sys/arch/arm/sociox/if_scx.c

1925

if (val & BMCR_PDOWN)

sys/arch/arm/sociox/if_scx.c

1926

val &= ~BMCR_PDOWN;

sys/arch/arm/sociox/if_scx.c

1927

val |= BMCR_ISO;

sys/arch/arm/sociox/if_scx.c

1928

(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val);

sys/arch/arm/sociox/if_scx.c

1931

(void)mii_readreg(d, sc->sc_phy_id, MII_BMCR, &val);

sys/arch/arm/sociox/if_scx.c

1932

} while (loop-- > 0 && (val & (BMCR_PDOWN | BMCR_ISO)) != 0);

sys/arch/arm/sociox/if_scx.c

1933

(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val | BMCR_LOOP);

sys/arch/arm/sociox/if_scx.c

1936

(void)mii_readreg(d, sc->sc_phy_id, MII_BMSR, &val);

sys/arch/arm/sociox/if_scx.c

1937

} while (loop-- > 0 && (val & BMSR_LINK) != 0);

sys/arch/arm/sociox/if_scx.c

1944

uint16_t val;

sys/arch/arm/sociox/if_scx.c

1947

err = mii_readreg(d, sc->sc_phy_id, MII_BMCR, &val);

sys/arch/arm/sociox/if_scx.c

1951

val &= ~BMCR_LOOP;

sys/arch/arm/sociox/if_scx.c

1952

(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val);

sys/arch/arm/sociox/if_scx.c

1955

(void)mii_readreg(d, sc->sc_phy_id, MII_BMCR, &val);

sys/arch/arm/sociox/if_scx.c

1956

} while (loop-- > 0 && (val & BMCR_LOOP) != 0);

sys/arch/arm/sociox/if_scx.c

1957

(void)mii_writereg(d, sc->sc_phy_id, MII_BMCR, val | BMCR_RESET);

sys/arch/arm/sociox/if_scx.c

1960

(void)mii_readreg(d, sc->sc_phy_id, MII_BMCR, &val);

sys/arch/arm/sociox/if_scx.c

1961

} while (loop-- > 0 && (val & BMCR_RESET) != 0);

sys/arch/arm/sociox/if_scx.c

546

#define CSR_WRITE(sc,off,val) \

sys/arch/arm/sociox/if_scx.c

547

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (off), (val))

sys/arch/arm/sociox/if_scx.c

601

uint32_t val;

sys/arch/arm/sociox/if_scx.c

605

val = CSR_READ(sc, reg);

sys/arch/arm/sociox/if_scx.c

606

if ((val & set) || !(val & clr))

sys/arch/arm/sociox/if_scx.c

608

if (val & fail)

sys/arch/arm/sociox/if_scx.c

626

mac_write(struct scx_softc *sc, int reg, int val)

sys/arch/arm/sociox/if_scx.c

629

CSR_WRITE(sc, MACDATA, val);

sys/arch/arm/sociox/sni_i2c.c

139

#define CSR_WRITE(sc, reg, val) \

sys/arch/arm/sociox/sni_i2c.c

140

bus_space_write_4((sc)->sc_ioh,(sc)->sc_ioh,(reg),(val))

sys/arch/arm/sunxi/sun4i_a10_codec.c

110

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sun4i_a10_codec.c

111

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun4i_a10_codec.c

153

u_int val, shift;

sys/arch/arm/sunxi/sun4i_a10_codec.c

160

val = RD4(sc, mix->reg);

sys/arch/arm/sunxi/sun4i_a10_codec.c

163

val &= ~mix->mask;

sys/arch/arm/sunxi/sun4i_a10_codec.c

164

val |= __SHIFTIN(nvol, mix->mask);

sys/arch/arm/sunxi/sun4i_a10_codec.c

165

WR4(sc, mix->reg, val);

sys/arch/arm/sunxi/sun4i_a10_codec.c

176

u_int val, shift;

sys/arch/arm/sunxi/sun4i_a10_codec.c

183

val = RD4(sc, mix->reg);

sys/arch/arm/sunxi/sun4i_a10_codec.c

185

nvol = __SHIFTOUT(val, mix->mask) << shift;

sys/arch/arm/sunxi/sun4i_dma.c

128

#define DMA_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sun4i_dma.c

129

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun4i_dma.c

293

uint32_t val;

sys/arch/arm/sunxi/sun4i_dma.c

296

val = DMA_READ(sc, NDMA_CTRL_REG(ch->ch_index));

sys/arch/arm/sunxi/sun4i_dma.c

297

val &= ~NDMA_CTRL_LOAD;

sys/arch/arm/sunxi/sun4i_dma.c

298

DMA_WRITE(sc, NDMA_CTRL_REG(ch->ch_index), val);

sys/arch/arm/sunxi/sun4i_dma.c

300

val = DMA_READ(sc, DDMA_CTRL_REG(ch->ch_index));

sys/arch/arm/sunxi/sun4i_dma.c

301

val &= ~DDMA_CTRL_LOAD;

sys/arch/arm/sunxi/sun4i_dma.c

302

DMA_WRITE(sc, DDMA_CTRL_REG(ch->ch_index), val);

sys/arch/arm/sunxi/sun4i_emac.c

389

sun4i_emac_miibus_read_reg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/arm/sunxi/sun4i_emac.c

406

*val = sun4i_emac_read(sc, EMAC_MAC_MRDD_REG) & 0xffff;

sys/arch/arm/sunxi/sun4i_emac.c

412

sun4i_emac_miibus_write_reg(device_t self, int phy, int reg, uint16_t val)

sys/arch/arm/sunxi/sun4i_emac.c

429

sun4i_emac_write(sc, EMAC_MAC_MWTD_REG, val);

sys/arch/arm/sunxi/sun4i_spi.c

65

#define SPIREG_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sun4i_spi.c

66

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun50i_a64_acodec.c

155

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sun50i_a64_acodec.c

156

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun50i_a64_acodec.c

161

uint32_t val;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

164

val = RD4(sc, A64_PR_CFG);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

167

val |= A64_AC_PR_RST;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

168

WR4(sc, A64_PR_CFG, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

171

val &= ~A64_AC_PR_RW;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

172

WR4(sc, A64_PR_CFG, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

175

val &= ~A64_AC_PR_ADDR;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

176

val |= __SHIFTIN(addr, A64_AC_PR_ADDR);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

177

WR4(sc, A64_PR_CFG, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

186

uint32_t val;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

189

val = RD4(sc, A64_PR_CFG);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

192

val |= A64_AC_PR_RST;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

193

WR4(sc, A64_PR_CFG, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

196

val &= ~A64_AC_PR_ADDR;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

197

val |= __SHIFTIN(addr, A64_AC_PR_ADDR);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

198

WR4(sc, A64_PR_CFG, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

201

val &= ~A64_ACDA_PR_WDAT;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

202

val |= __SHIFTIN(data, A64_ACDA_PR_WDAT);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

203

WR4(sc, A64_PR_CFG, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

206

val |= A64_AC_PR_RW;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

207

WR4(sc, A64_PR_CFG, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

210

val &= ~A64_AC_PR_RW;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

211

WR4(sc, A64_PR_CFG, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

281

u_int val, shift;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

296

val = a64_acodec_pr_read(sc, mix->reg);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

299

val &= ~mix->mask;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

300

val |= __SHIFTIN(nvol, mix->mask);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

301

a64_acodec_pr_write(sc, mix->reg, val);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

370

u_int val, shift;

sys/arch/arm/sunxi/sun50i_a64_acodec.c

385

val = a64_acodec_pr_read(sc, mix->reg);

sys/arch/arm/sunxi/sun50i_a64_acodec.c

387

nvol = __SHIFTOUT(val, mix->mask) << shift;

sys/arch/arm/sunxi/sun6i_a31_codec.c

153

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sun6i_a31_codec.c

154

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun6i_a31_codec.c

214

u_int val, shift;

sys/arch/arm/sunxi/sun6i_a31_codec.c

221

val = RD4(sc, mix->reg);

sys/arch/arm/sunxi/sun6i_a31_codec.c

224

val &= ~mix->mask;

sys/arch/arm/sunxi/sun6i_a31_codec.c

225

val |= __SHIFTIN(nvol, mix->mask);

sys/arch/arm/sunxi/sun6i_a31_codec.c

226

WR4(sc, mix->reg, val);

sys/arch/arm/sunxi/sun6i_a31_codec.c

237

u_int val, shift;

sys/arch/arm/sunxi/sun6i_a31_codec.c

244

val = RD4(sc, mix->reg);

sys/arch/arm/sunxi/sun6i_a31_codec.c

246

nvol = __SHIFTOUT(val, mix->mask) << shift;

sys/arch/arm/sunxi/sun6i_dma.c

224

#define DMA_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sun6i_dma.c

225

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun6i_spi.c

69

#define SPIREG_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sun6i_spi.c

70

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/sunxi/sun8i_a23_apbclk.c

174

const uint32_t val = RD4(sc, 0);

sys/arch/arm/sunxi/sun8i_a23_apbclk.c

175

const u_int div = __SHIFTOUT(val, APB0_DIV);

sys/arch/arm/sunxi/sun8i_a23_apbclk.c

80

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sun8i_a23_apbclk.c

81

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

140

uint32_t val;

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

149

val = CCU_READ(sc, CPUX_AXI_CFG_REG);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

150

val &= ~Cx_CPUX_CLK_SRC_SEL(cluster);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

151

CCU_WRITE(sc, CPUX_AXI_CFG_REG, val);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

155

val = CCU_READ(sc, nkmp->reg);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

156

val &= ~PLL_CxCPUX_CTRL_PLL_FACTOR_N;

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

157

val |= __SHIFTIN(n, PLL_CxCPUX_CTRL_PLL_FACTOR_N);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

158

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

166

val = CCU_READ(sc, CPUX_AXI_CFG_REG);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

167

val |= Cx_CPUX_CLK_SRC_SEL(cluster);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

168

CCU_WRITE(sc, CPUX_AXI_CFG_REG, val);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

359

uint32_t val;

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

362

val = CCU_READ(sc, SDMMC2_CLK_REG);

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

363

val |= SDMMC2_CLK_MODE_SELECT;

sys/arch/arm/sunxi/sun8i_a83t_ccu.c

364

CCU_WRITE(sc, SDMMC2_CLK_REG, val);

sys/arch/arm/sunxi/sun8i_codec.c

131

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sun8i_codec.c

132

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun8i_codec.c

212

uint32_t val;

sys/arch/arm/sunxi/sun8i_codec.c

218

val = RD4(sc, AIF1CLK_CTRL);

sys/arch/arm/sunxi/sun8i_codec.c

220

val &= ~AIF1_DATA_FMT;

sys/arch/arm/sunxi/sun8i_codec.c

223

val |= __SHIFTIN(AIF1_DATA_FMT_I2S, AIF1_DATA_FMT);

sys/arch/arm/sunxi/sun8i_codec.c

226

val |= __SHIFTIN(AIF1_DATA_FMT_RJ, AIF1_DATA_FMT);

sys/arch/arm/sunxi/sun8i_codec.c

229

val |= __SHIFTIN(AIF1_DATA_FMT_LJ, AIF1_DATA_FMT);

sys/arch/arm/sunxi/sun8i_codec.c

233

val |= __SHIFTIN(AIF1_DATA_FMT_DSP, AIF1_DATA_FMT);

sys/arch/arm/sunxi/sun8i_codec.c

239

val &= ~(AIF1_BCLK_INV|AIF1_LRCK_INV);

sys/arch/arm/sunxi/sun8i_codec.c

242

val |= AIF1_LRCK_INV;

sys/arch/arm/sunxi/sun8i_codec.c

244

val |= AIF1_BCLK_INV;

sys/arch/arm/sunxi/sun8i_codec.c

248

val &= ~AIF1_MSTR_MOD; /* codec is master */

sys/arch/arm/sunxi/sun8i_codec.c

251

val |= AIF1_MSTR_MOD; /* codec is slave */

sys/arch/arm/sunxi/sun8i_codec.c

257

val &= ~AIF1_LRCK_DIV;

sys/arch/arm/sunxi/sun8i_codec.c

258

val |= __SHIFTIN(AIF1_LRCK_DIV_64, AIF1_LRCK_DIV);

sys/arch/arm/sunxi/sun8i_codec.c

260

val &= ~AIF1_BCLK_DIV;

sys/arch/arm/sunxi/sun8i_codec.c

261

val |= __SHIFTIN(AIF1_BCLK_DIV_16, AIF1_BCLK_DIV);

sys/arch/arm/sunxi/sun8i_codec.c

263

WR4(sc, AIF1CLK_CTRL, val);

sys/arch/arm/sunxi/sun8i_codec.c

288

uint32_t val;

sys/arch/arm/sunxi/sun8i_codec.c

290

val = RD4(sc, HMIC_CTRL1);

sys/arch/arm/sunxi/sun8i_codec.c

292

val |= mask;

sys/arch/arm/sunxi/sun8i_codec.c

294

val &= ~mask;

sys/arch/arm/sunxi/sun8i_codec.c

295

WR4(sc, HMIC_CTRL1, val);

sys/arch/arm/sunxi/sun8i_codec.c

306

uint32_t val;

sys/arch/arm/sunxi/sun8i_codec.c

308

val = RD4(sc, HMIC_STS);

sys/arch/arm/sunxi/sun8i_codec.c

309

if (val & mask) {

sys/arch/arm/sunxi/sun8i_codec.c

326

uint32_t val;

sys/arch/arm/sunxi/sun8i_codec.c

328

val = RD4(sc, HMIC_STS);

sys/arch/arm/sunxi/sun8i_codec.c

331

if (val & HMIC_STS_JACK_DET_OIRQ)

sys/arch/arm/sunxi/sun8i_codec.c

333

else if (val & HMIC_STS_JACK_DET_IIRQ)

sys/arch/arm/sunxi/sun8i_codec.c

336

if (val & HMIC_STS_MIC_DET_ST)

sys/arch/arm/sunxi/sun8i_codec.c

337

micdet = !!(val & HMIC_STS_MIC_PRESENT);

sys/arch/arm/sunxi/sun8i_codec.c

349

WR4(sc, HMIC_STS, val);

sys/arch/arm/sunxi/sun8i_codec.c

377

uint32_t val;

sys/arch/arm/sunxi/sun8i_codec.c

421

val = RD4(sc, SYSCLK_CTL);

sys/arch/arm/sunxi/sun8i_codec.c

422

val |= AIF1CLK_ENA;

sys/arch/arm/sunxi/sun8i_codec.c

423

val &= ~AIF1CLK_SRC;

sys/arch/arm/sunxi/sun8i_codec.c

424

val |= __SHIFTIN(AIF1CLK_SRC_PLL, AIF1CLK_SRC);

sys/arch/arm/sunxi/sun8i_codec.c

425

val |= SYSCLK_ENA;

sys/arch/arm/sunxi/sun8i_codec.c

426

val &= ~SYSCLK_SRC;

sys/arch/arm/sunxi/sun8i_codec.c

427

WR4(sc, SYSCLK_CTL, val);

sys/arch/arm/sunxi/sun8i_codec.c

436

val = RD4(sc, SYS_SR_CTRL);

sys/arch/arm/sunxi/sun8i_codec.c

437

val &= ~AIF1_FS;

sys/arch/arm/sunxi/sun8i_codec.c

438

val |= __SHIFTIN(AIF_FS_48KHZ, AIF1_FS);

sys/arch/arm/sunxi/sun8i_codec.c

439

WR4(sc, SYS_SR_CTRL, val);

sys/arch/arm/sunxi/sun8i_codec.c

442

val = RD4(sc, AIF1CLK_CTRL);

sys/arch/arm/sunxi/sun8i_codec.c

443

val &= ~AIF1_WORD_SIZ;

sys/arch/arm/sunxi/sun8i_codec.c

444

val |= __SHIFTIN(AIF1_WORD_SIZ_16, AIF1_WORD_SIZ);

sys/arch/arm/sunxi/sun8i_codec.c

445

WR4(sc, AIF1CLK_CTRL, val);

sys/arch/arm/sunxi/sun8i_codec.c

448

val = RD4(sc, AIF1_DACDAT_CTRL);

sys/arch/arm/sunxi/sun8i_codec.c

449

val |= AIF1_DAC0L_ENA;

sys/arch/arm/sunxi/sun8i_codec.c

450

val |= AIF1_DAC0R_ENA;

sys/arch/arm/sunxi/sun8i_codec.c

451

WR4(sc, AIF1_DACDAT_CTRL, val);

sys/arch/arm/sunxi/sun8i_codec.c

454

val = RD4(sc, DAC_MXR_SRC);

sys/arch/arm/sunxi/sun8i_codec.c

455

val &= ~DACL_MXR_SRC;

sys/arch/arm/sunxi/sun8i_codec.c

456

val |= __SHIFTIN(DACL_MXR_SRC_AIF1_DAC0L, DACL_MXR_SRC);

sys/arch/arm/sunxi/sun8i_codec.c

457

val &= ~DACR_MXR_SRC;

sys/arch/arm/sunxi/sun8i_codec.c

458

val |= __SHIFTIN(DACR_MXR_SRC_AIF1_DAC0R, DACR_MXR_SRC);

sys/arch/arm/sunxi/sun8i_codec.c

459

WR4(sc, DAC_MXR_SRC, val);

sys/arch/arm/sunxi/sun8i_codec.c

467

val = RD4(sc, HMIC_CTRL1);

sys/arch/arm/sunxi/sun8i_codec.c

468

val |= __SHIFTIN(0xff, HMIC_CTRL1_N);

sys/arch/arm/sunxi/sun8i_codec.c

469

WR4(sc, HMIC_CTRL1, val);

sys/arch/arm/sunxi/sun8i_codec.c

471

val = RD4(sc, HMIC_CTRL2);

sys/arch/arm/sunxi/sun8i_codec.c

472

val &= ~HMIC_CTRL2_MDATA_THRES;

sys/arch/arm/sunxi/sun8i_codec.c

473

val |= __SHIFTIN(0x17, HMIC_CTRL2_MDATA_THRES);

sys/arch/arm/sunxi/sun8i_codec.c

474

WR4(sc, HMIC_CTRL2, val);

sys/arch/arm/sunxi/sun8i_h3_ccu.c

509

uint32_t val;

sys/arch/arm/sunxi/sun8i_h3_ccu.c

512

val = CCU_READ(sc, AHB2_CFG_REG);

sys/arch/arm/sunxi/sun8i_h3_ccu.c

513

val &= ~AHB2_CLK_CFG;

sys/arch/arm/sunxi/sun8i_h3_ccu.c

514

val |= __SHIFTIN(AHB2_CLK_CFG_PLL_PERIPH0_2, AHB2_CLK_CFG);

sys/arch/arm/sunxi/sun8i_h3_ccu.c

515

CCU_WRITE(sc, AHB2_CFG_REG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

128

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sun8i_h3_codec.c

129

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun8i_h3_codec.c

150

uint32_t val;

sys/arch/arm/sunxi/sun8i_h3_codec.c

153

val = RD4(csc, H3_PR_CFG);

sys/arch/arm/sunxi/sun8i_h3_codec.c

156

val |= H3_AC_PR_RST;

sys/arch/arm/sunxi/sun8i_h3_codec.c

157

WR4(csc, H3_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

160

val &= ~H3_AC_PR_RW;

sys/arch/arm/sunxi/sun8i_h3_codec.c

161

WR4(csc, H3_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

164

val &= ~H3_AC_PR_ADDR;

sys/arch/arm/sunxi/sun8i_h3_codec.c

165

val |= __SHIFTIN(addr, H3_AC_PR_ADDR);

sys/arch/arm/sunxi/sun8i_h3_codec.c

166

WR4(csc, H3_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

175

uint32_t val;

sys/arch/arm/sunxi/sun8i_h3_codec.c

178

val = RD4(csc, H3_PR_CFG);

sys/arch/arm/sunxi/sun8i_h3_codec.c

181

val |= H3_AC_PR_RST;

sys/arch/arm/sunxi/sun8i_h3_codec.c

182

WR4(csc, H3_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

185

val &= ~H3_AC_PR_ADDR;

sys/arch/arm/sunxi/sun8i_h3_codec.c

186

val |= __SHIFTIN(addr, H3_AC_PR_ADDR);

sys/arch/arm/sunxi/sun8i_h3_codec.c

187

WR4(csc, H3_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

190

val &= ~H3_ACDA_PR_WDAT;

sys/arch/arm/sunxi/sun8i_h3_codec.c

191

val |= __SHIFTIN(data, H3_ACDA_PR_WDAT);

sys/arch/arm/sunxi/sun8i_h3_codec.c

192

WR4(csc, H3_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

195

val |= H3_AC_PR_RW;

sys/arch/arm/sunxi/sun8i_h3_codec.c

196

WR4(csc, H3_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

199

val &= ~H3_AC_PR_RW;

sys/arch/arm/sunxi/sun8i_h3_codec.c

200

WR4(csc, H3_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

285

u_int val, shift;

sys/arch/arm/sunxi/sun8i_h3_codec.c

296

val = h3_codec_pr_read(csc, mix->reg);

sys/arch/arm/sunxi/sun8i_h3_codec.c

299

val &= ~mix->mask;

sys/arch/arm/sunxi/sun8i_h3_codec.c

300

val |= __SHIFTIN(nvol, mix->mask);

sys/arch/arm/sunxi/sun8i_h3_codec.c

301

h3_codec_pr_write(csc, mix->reg, val);

sys/arch/arm/sunxi/sun8i_h3_codec.c

318

u_int val, shift;

sys/arch/arm/sunxi/sun8i_h3_codec.c

329

val = h3_codec_pr_read(csc, mix->reg);

sys/arch/arm/sunxi/sun8i_h3_codec.c

331

nvol = __SHIFTOUT(val, mix->mask) << shift;

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

375

uint32_t val;

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

378

val = CCU_READ(sc, AHB2_CFG_REG);

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

379

val &= ~AHB2_CLK_CFG;

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

380

val |= __SHIFTIN(AHB2_CLK_CFG_PLL_PERIPH0_2, AHB2_CLK_CFG);

sys/arch/arm/sunxi/sun8i_v3s_ccu.c

381

CCU_WRITE(sc, AHB2_CFG_REG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

115

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sun8i_v3s_codec.c

116

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun8i_v3s_codec.c

137

uint32_t val;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

140

val = RD4(csc, V3S_PR_CFG);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

143

val |= V3S_PR_RST;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

144

WR4(csc, V3S_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

147

val &= ~V3S_PR_RW;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

148

WR4(csc, V3S_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

151

val &= ~V3S_PR_ADDR;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

152

val |= __SHIFTIN(addr, V3S_PR_ADDR);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

153

WR4(csc, V3S_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

162

uint32_t val;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

165

val = RD4(csc, V3S_PR_CFG);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

168

val |= V3S_PR_RST;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

169

WR4(csc, V3S_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

172

val &= ~V3S_PR_ADDR;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

173

val |= __SHIFTIN(addr, V3S_PR_ADDR);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

174

WR4(csc, V3S_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

177

val &= ~V3S_ADDA_PR_WDAT;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

178

val |= __SHIFTIN(data, V3S_ADDA_PR_WDAT);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

179

WR4(csc, V3S_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

182

val |= V3S_PR_RW;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

183

WR4(csc, V3S_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

186

val &= ~V3S_PR_RW;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

187

WR4(csc, V3S_PR_CFG, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

270

u_int val, shift;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

278

val = v3s_codec_pr_read(csc, mix->reg);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

281

val &= ~mix->mask;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

282

val |= __SHIFTIN(nvol, mix->mask);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

283

v3s_codec_pr_write(csc, mix->reg, val);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

300

u_int val, shift;

sys/arch/arm/sunxi/sun8i_v3s_codec.c

308

val = v3s_codec_pr_read(csc, mix->reg);

sys/arch/arm/sunxi/sun8i_v3s_codec.c

310

nvol = __SHIFTOUT(val, mix->mask) << shift;

sys/arch/arm/sunxi/sun9i_a80_ccu.c

142

uint32_t val;

sys/arch/arm/sunxi/sun9i_a80_ccu.c

151

val = CCU_READ(sc, CPU_CLK_SRC_REG);

sys/arch/arm/sunxi/sun9i_a80_ccu.c

152

val &= ~CPU_CLK_SRC_SELECT(cluster);

sys/arch/arm/sunxi/sun9i_a80_ccu.c

153

CCU_WRITE(sc, CPU_CLK_SRC_REG, val);

sys/arch/arm/sunxi/sun9i_a80_ccu.c

157

val = CCU_READ(sc, nkmp->reg);

sys/arch/arm/sunxi/sun9i_a80_ccu.c

158

val &= ~nkmp->n;

sys/arch/arm/sunxi/sun9i_a80_ccu.c

159

val |= __SHIFTIN(n, nkmp->n);

sys/arch/arm/sunxi/sun9i_a80_ccu.c

160

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sun9i_a80_ccu.c

168

val = CCU_READ(sc, CPU_CLK_SRC_REG);

sys/arch/arm/sunxi/sun9i_a80_ccu.c

169

val |= CPU_CLK_SRC_SELECT(cluster);

sys/arch/arm/sunxi/sun9i_a80_ccu.c

170

CCU_WRITE(sc, CPU_CLK_SRC_SELECT(cluster), val);

sys/arch/arm/sunxi/sun9i_a80_cpusclk.c

176

const uint32_t val = RD4(sc, 0);

sys/arch/arm/sunxi/sun9i_a80_cpusclk.c

177

const u_int sel = __SHIFTOUT(val, CPUS_CLK_SRC_SEL);

sys/arch/arm/sunxi/sun9i_a80_cpusclk.c

178

const u_int post_div = __SHIFTOUT(val, CPUS_POST_DIV);

sys/arch/arm/sunxi/sun9i_a80_cpusclk.c

179

const u_int clk_ratio = __SHIFTOUT(val, CPUS_CLK_RATIO);

sys/arch/arm/sunxi/sun9i_a80_cpusclk.c

193

const uint32_t val = RD4(sc, 0);

sys/arch/arm/sunxi/sun9i_a80_cpusclk.c

194

const u_int sel = __SHIFTOUT(val, CPUS_CLK_SRC_SEL);

sys/arch/arm/sunxi/sun9i_a80_cpusclk.c

82

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sun9i_a80_cpusclk.c

83

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

100

uint32_t val;

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

123

val = PHY_READ(sc, PMU_CFG);

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

124

val |= passby_mask;

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

125

PHY_WRITE(sc, PMU_CFG, val);

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

127

val = PHY_READ(sc, PMU_CFG);

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

128

val &= ~passby_mask;

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

129

PHY_WRITE(sc, PMU_CFG, val);

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

76

#define PHY_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sun9i_a80_usbphy.c

77

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_can.c

624

uint32_t val;

sys/arch/arm/sunxi/sunxi_can.c

627

val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG);

sys/arch/arm/sunxi/sunxi_can.c

628

val |= SUNXI_CAN_MODSEL_RST;

sys/arch/arm/sunxi/sunxi_can.c

629

sunxi_can_write(sc, SUNXI_CAN_MODSEL_REG, val);

sys/arch/arm/sunxi/sunxi_can.c

630

val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG);

sys/arch/arm/sunxi/sunxi_can.c

631

if (val & SUNXI_CAN_MODSEL_RST)

sys/arch/arm/sunxi/sunxi_can.c

641

uint32_t val;

sys/arch/arm/sunxi/sunxi_can.c

644

val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG);

sys/arch/arm/sunxi/sunxi_can.c

645

val &= ~SUNXI_CAN_MODSEL_RST;

sys/arch/arm/sunxi/sunxi_can.c

646

sunxi_can_write(sc, SUNXI_CAN_MODSEL_REG, val);

sys/arch/arm/sunxi/sunxi_can.c

647

val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG);

sys/arch/arm/sunxi/sunxi_can.c

648

if ((val & SUNXI_CAN_MODSEL_RST) == 0)

sys/arch/arm/sunxi/sunxi_ccu.c

79

const uint32_t val = CCU_READ(sc, reset->reg);

sys/arch/arm/sunxi/sunxi_ccu.c

80

CCU_WRITE(sc, reset->reg, val & ~reset->mask);

sys/arch/arm/sunxi/sunxi_ccu.c

91

const uint32_t val = CCU_READ(sc, reset->reg);

sys/arch/arm/sunxi/sunxi_ccu.c

92

CCU_WRITE(sc, reset->reg, val | reset->mask);

sys/arch/arm/sunxi/sunxi_ccu.h

498

#define CCU_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_ccu.h

499

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_ccu_div.c

140

uint32_t val, raw_div;

sys/arch/arm/sunxi/sunxi_ccu_div.c

157

val = CCU_READ(sc, div->reg);

sys/arch/arm/sunxi/sunxi_ccu_div.c

176

val &= ~div->div;

sys/arch/arm/sunxi/sunxi_ccu_div.c

177

val |= __SHIFTIN(raw_div, div->div);

sys/arch/arm/sunxi/sunxi_ccu_div.c

178

CCU_WRITE(sc, div->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_div.c

188

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_div.c

204

val = CCU_READ(sc, div->reg);

sys/arch/arm/sunxi/sunxi_ccu_div.c

205

val &= ~div->sel;

sys/arch/arm/sunxi/sunxi_ccu_div.c

206

val |= __SHIFTIN(index, div->sel);

sys/arch/arm/sunxi/sunxi_ccu_div.c

207

CCU_WRITE(sc, div->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_div.c

218

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_div.c

225

val = CCU_READ(sc, div->reg);

sys/arch/arm/sunxi/sunxi_ccu_div.c

226

index = __SHIFTOUT(val, div->sel);

sys/arch/arm/sunxi/sunxi_ccu_div.c

44

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_div.c

51

val = CCU_READ(sc, div->reg);

sys/arch/arm/sunxi/sunxi_ccu_div.c

53

val |= div->enable;

sys/arch/arm/sunxi/sunxi_ccu_div.c

55

val &= ~div->enable;

sys/arch/arm/sunxi/sunxi_ccu_div.c

56

CCU_WRITE(sc, div->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_div.c

68

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_div.c

81

val = CCU_READ(sc, div->reg);

sys/arch/arm/sunxi/sunxi_ccu_div.c

83

ratio = __SHIFTOUT(val, div->div);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

113

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

125

val = CCU_READ(sc, fractional->reg);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

129

val &= ~fractional->prediv;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

130

val |= __SHIFTIN(fractional->prediv_val - 1,

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

133

parent_rate = parent_rate / (__SHIFTOUT(val, fractional->prediv) + 1);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

140

val &= ~fractional->prediv;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

141

val &= ~fractional->div_en;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

142

val &= ~fractional->frac_sel;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

143

val |= __SHIFTIN(i, fractional->frac_sel);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

145

val |= fractional->enable;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

146

CCU_WRITE(sc, fractional->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

150

val |= fractional->div_en;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

173

val &= ~fractional->m;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

174

val |= __SHIFTIN(best_m, fractional->m);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

176

val |= fractional->enable;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

177

CCU_WRITE(sc, fractional->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

192

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

204

val = CCU_READ(sc, fractional->reg);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

209

val = CCU_READ(sc, fractional->reg);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

210

parent_rate = parent_rate / (__SHIFTOUT(val, fractional->prediv) + 1);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

44

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

51

val = CCU_READ(sc, fractional->reg);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

53

val |= fractional->enable;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

55

val &= ~fractional->enable;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

56

CCU_WRITE(sc, fractional->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

68

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

81

val = CCU_READ(sc, fractional->reg);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

84

rate = rate / (__SHIFTOUT(val, fractional->prediv) + 1);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

89

if (fractional->enable && !(val & fractional->enable))

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

92

if ((val & fractional->div_en) == 0) {

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

93

int sel = __SHIFTOUT(val, fractional->frac_sel);

sys/arch/arm/sunxi/sunxi_ccu_fractional.c

96

m = __SHIFTOUT(val, fractional->m);

sys/arch/arm/sunxi/sunxi_ccu_gate.c

44

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_gate.c

48

val = CCU_READ(sc, gate->reg);

sys/arch/arm/sunxi/sunxi_ccu_gate.c

50

val |= gate->mask;

sys/arch/arm/sunxi/sunxi_ccu_gate.c

52

val &= ~gate->mask;

sys/arch/arm/sunxi/sunxi_ccu_gate.c

53

CCU_WRITE(sc, gate->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_mux.c

44

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_mux.c

60

val = CCU_READ(sc, mux->reg);

sys/arch/arm/sunxi/sunxi_ccu_mux.c

61

val &= ~mux->sel;

sys/arch/arm/sunxi/sunxi_ccu_mux.c

62

val |= __SHIFTIN(index, mux->sel);

sys/arch/arm/sunxi/sunxi_ccu_mux.c

63

CCU_WRITE(sc, mux->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_mux.c

74

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_mux.c

78

val = CCU_READ(sc, mux->reg);

sys/arch/arm/sunxi/sunxi_ccu_mux.c

79

index = __SHIFTOUT(val, mux->sel);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

103

m = __SHIFTOUT(val, nkmp->m);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

107

p = __SHIFTOUT(val, nkmp->p);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

111

if (nkmp->enable && !(val & nkmp->enable))

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

142

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

155

val = CCU_READ(sc, nkmp->reg);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

158

if (nkmp->p && __SHIFTOUT(val, nkmp->p) < tab->p) {

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

159

val &= ~nkmp->p;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

160

val |= __SHIFTIN(tab->p, nkmp->p);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

161

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

164

if (nkmp->m && __SHIFTOUT(val, nkmp->m) < tab->m) {

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

165

val &= ~nkmp->m;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

166

val |= __SHIFTIN(tab->m, nkmp->m);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

167

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

171

val &= ~nkmp->n;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

172

val |= __SHIFTIN(tab->n, nkmp->n);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

175

val &= ~nkmp->k;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

176

val |= __SHIFTIN(tab->k, nkmp->k);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

178

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

180

if (nkmp->m && __SHIFTOUT(val, nkmp->m) > tab->m) {

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

181

val &= ~nkmp->m;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

182

val |= __SHIFTIN(tab->m, nkmp->m);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

183

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

186

if (nkmp->p && __SHIFTOUT(val, nkmp->p) > tab->p) {

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

187

val &= ~nkmp->p;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

188

val |= __SHIFTIN(tab->p, nkmp->p);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

189

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

194

val &= ~nkmp->n;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

195

val |= __SHIFTIN(tab->n, nkmp->n);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

198

val &= ~nkmp->k;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

199

val |= __SHIFTIN(tab->k, nkmp->k);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

202

val &= ~nkmp->m;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

203

val |= __SHIFTIN(tab->m, nkmp->m);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

206

val &= ~nkmp->p;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

207

val |= __SHIFTIN(tab->p, nkmp->p);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

209

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

44

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

52

val = CCU_READ(sc, nkmp->reg);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

54

val |= nkmp->enable;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

56

val &= ~nkmp->enable;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

57

CCU_WRITE(sc, nkmp->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

61

val = CCU_READ(sc, nkmp->reg);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

62

if (val & nkmp->lock)

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

80

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

93

val = CCU_READ(sc, nkmp->reg);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

95

n = __SHIFTOUT(val, nkmp->n);

sys/arch/arm/sunxi/sunxi_ccu_nkmp.c

99

k = __SHIFTOUT(val, nkmp->k);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

110

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

130

val = CCU_READ(sc, nm->reg);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

131

val &= ~nm->sel;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

132

val |= __SHIFTIN(pindex, nm->sel);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

133

CCU_WRITE(sc, nm->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

177

val = CCU_READ(sc, nm->reg);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

178

val &= ~nm->sel;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

179

val |= __SHIFTIN(best_parent, nm->sel);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

180

val &= ~nm->n;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

181

val |= __SHIFTIN(best_n, nm->n);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

182

val &= ~nm->m;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

183

val |= __SHIFTIN(best_m, nm->m);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

184

CCU_WRITE(sc, nm->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

194

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

210

val = CCU_READ(sc, nm->reg);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

211

val &= ~nm->sel;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

212

val |= __SHIFTIN(index, nm->sel);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

213

CCU_WRITE(sc, nm->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

224

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

228

val = CCU_READ(sc, nm->reg);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

229

index = __SHIFTOUT(val, nm->sel);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

44

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

51

val = CCU_READ(sc, nm->reg);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

53

val |= nm->enable;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

55

val &= ~nm->enable;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

56

CCU_WRITE(sc, nm->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

68

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_nm.c

81

val = CCU_READ(sc, nm->reg);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

82

n = __SHIFTOUT(val, nm->n);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

83

m = __SHIFTOUT(val, nm->m);

sys/arch/arm/sunxi/sunxi_ccu_nm.c

85

if (nm->enable && !(val & nm->enable))

sys/arch/arm/sunxi/sunxi_ccu_phase.c

109

val = CCU_READ(sc, phase->reg);

sys/arch/arm/sunxi/sunxi_ccu_phase.c

110

val &= ~phase->mask;

sys/arch/arm/sunxi/sunxi_ccu_phase.c

111

val |= __SHIFTIN(delay, phase->mask);

sys/arch/arm/sunxi/sunxi_ccu_phase.c

112

CCU_WRITE(sc, phase->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_phase.c

64

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_phase.c

77

val = CCU_READ(sc, phase->reg);

sys/arch/arm/sunxi/sunxi_ccu_phase.c

78

delay = __SHIFTOUT(val, phase->mask);

sys/arch/arm/sunxi/sunxi_ccu_phase.c

90

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

101

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

117

val = CCU_READ(sc, prediv->reg);

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

118

val &= ~prediv->sel;

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

119

val |= __SHIFTIN(index, prediv->sel);

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

120

CCU_WRITE(sc, prediv->reg, val);

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

131

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

135

val = CCU_READ(sc, prediv->reg);

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

136

index = __SHIFTOUT(val, prediv->sel);

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

46

uint32_t val;

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

59

val = CCU_READ(sc, prediv->reg);

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

61

pre = __SHIFTOUT(val, prediv->prediv);

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

65

div = __SHIFTOUT(val, prediv->div);

sys/arch/arm/sunxi/sunxi_ccu_prediv.c

68

sel = __SHIFTOUT(val, prediv->sel);

sys/arch/arm/sunxi/sunxi_codec.c

102

#define CODEC_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_codec.c

103

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_codec.c

274

uint32_t val;

sys/arch/arm/sunxi/sunxi_codec.c

297

val = CODEC_READ(sc, AC_DAC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

298

CODEC_WRITE(sc, AC_DAC_FIFOC(sc), val | DAC_FIFOC_FIFO_FLUSH);

sys/arch/arm/sunxi/sunxi_codec.c

301

val = CODEC_READ(sc, AC_DAC_FIFOS(sc));

sys/arch/arm/sunxi/sunxi_codec.c

302

CODEC_WRITE(sc, AC_DAC_FIFOS(sc), val);

sys/arch/arm/sunxi/sunxi_codec.c

316

val = CODEC_READ(sc, AC_DAC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

317

CODEC_WRITE(sc, AC_DAC_FIFOC(sc), val | DAC_FIFOC_DRQ_EN);

sys/arch/arm/sunxi/sunxi_codec.c

339

uint32_t val;

sys/arch/arm/sunxi/sunxi_codec.c

362

val = CODEC_READ(sc, AC_ADC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

363

CODEC_WRITE(sc, AC_ADC_FIFOC(sc), val | ADC_FIFOC_FIFO_FLUSH);

sys/arch/arm/sunxi/sunxi_codec.c

366

val = CODEC_READ(sc, AC_ADC_FIFOS(sc));

sys/arch/arm/sunxi/sunxi_codec.c

367

CODEC_WRITE(sc, AC_ADC_FIFOS(sc), val);

sys/arch/arm/sunxi/sunxi_codec.c

380

val = CODEC_READ(sc, AC_ADC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

381

CODEC_WRITE(sc, AC_ADC_FIFOC(sc), val | ADC_FIFOC_DRQ_EN);

sys/arch/arm/sunxi/sunxi_codec.c

399

uint32_t val;

sys/arch/arm/sunxi/sunxi_codec.c

405

val = CODEC_READ(sc, AC_DAC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

406

CODEC_WRITE(sc, AC_DAC_FIFOC(sc), val | DAC_FIFOC_FIFO_FLUSH);

sys/arch/arm/sunxi/sunxi_codec.c

407

while (val & DAC_FIFOC_FIFO_FLUSH)

sys/arch/arm/sunxi/sunxi_codec.c

408

val = CODEC_READ(sc, AC_DAC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

415

val = CODEC_READ(sc, AC_DAC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

416

CODEC_WRITE(sc, AC_DAC_FIFOC(sc), val & ~DAC_FIFOC_DRQ_EN);

sys/arch/arm/sunxi/sunxi_codec.c

429

uint32_t val;

sys/arch/arm/sunxi/sunxi_codec.c

436

val = CODEC_READ(sc, AC_ADC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

437

CODEC_WRITE(sc, AC_ADC_FIFOC(sc), val | ADC_FIFOC_FIFO_FLUSH);

sys/arch/arm/sunxi/sunxi_codec.c

438

while (val & ADC_FIFOC_FIFO_FLUSH)

sys/arch/arm/sunxi/sunxi_codec.c

439

val = CODEC_READ(sc, AC_ADC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

445

val = CODEC_READ(sc, AC_ADC_FIFOC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

446

CODEC_WRITE(sc, AC_ADC_FIFOC(sc), val & ~ADC_FIFOC_DRQ_EN);

sys/arch/arm/sunxi/sunxi_codec.c

589

uint32_t val;

sys/arch/arm/sunxi/sunxi_codec.c

626

val = CODEC_READ(sc, AC_DAC_DPC(sc));

sys/arch/arm/sunxi/sunxi_codec.c

627

val |= DAC_DPC_EN_DA;

sys/arch/arm/sunxi/sunxi_codec.c

628

CODEC_WRITE(sc, AC_DAC_DPC(sc), val);

sys/arch/arm/sunxi/sunxi_debe.c

102

#define DEBE_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_debe.c

103

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_debe.c

443

uint32_t val;

sys/arch/arm/sunxi/sunxi_debe.c

450

val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);

sys/arch/arm/sunxi/sunxi_debe.c

452

val |= SUNXI_DEBE_MODCTL_HWC_EN;

sys/arch/arm/sunxi/sunxi_debe.c

454

val &= ~SUNXI_DEBE_MODCTL_HWC_EN;

sys/arch/arm/sunxi/sunxi_debe.c

455

DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);

sys/arch/arm/sunxi/sunxi_debe.c

510

val = DEBE_READ(sc,

sys/arch/arm/sunxi/sunxi_debe.c

512

val &= ~(3 << shift);

sys/arch/arm/sunxi/sunxi_debe.c

513

val |= (idx << shift);

sys/arch/arm/sunxi/sunxi_debe.c

515

SUNXI_DEBE_HWC_PATTERN_BLOCK + off, val);

sys/arch/arm/sunxi/sunxi_debe.c

527

uint32_t val;

sys/arch/arm/sunxi/sunxi_debe.c

537

val = DEBE_READ(sc, SUNXI_DEBE_REGBUFFCTL_REG);

sys/arch/arm/sunxi/sunxi_debe.c

538

val |= SUNXI_DEBE_REGBUFFCTL_REGLOADCTL;

sys/arch/arm/sunxi/sunxi_debe.c

539

DEBE_WRITE(sc, SUNXI_DEBE_REGBUFFCTL_REG, val);

sys/arch/arm/sunxi/sunxi_debe.c

541

val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);

sys/arch/arm/sunxi/sunxi_debe.c

542

val |= SUNXI_DEBE_MODCTL_START_CTL;

sys/arch/arm/sunxi/sunxi_debe.c

543

DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);

sys/arch/arm/sunxi/sunxi_debe.c

548

val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);

sys/arch/arm/sunxi/sunxi_debe.c

549

val &= ~SUNXI_DEBE_MODCTL_START_CTL;

sys/arch/arm/sunxi/sunxi_debe.c

550

DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);

sys/arch/arm/sunxi/sunxi_debe.c

572

uint32_t val;

sys/arch/arm/sunxi/sunxi_debe.c

615

val = DEBE_READ(sc, SUNXI_DEBE_ATTCTL1_REG);

sys/arch/arm/sunxi/sunxi_debe.c

616

val &= ~SUNXI_DEBE_ATTCTL1_LAY_FBFMT;

sys/arch/arm/sunxi/sunxi_debe.c

617

val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBFMT_XRGB8888,

sys/arch/arm/sunxi/sunxi_debe.c

619

val &= ~SUNXI_DEBE_ATTCTL1_LAY_BRSWAPEN;

sys/arch/arm/sunxi/sunxi_debe.c

620

val &= ~SUNXI_DEBE_ATTCTL1_LAY_FBPS;

sys/arch/arm/sunxi/sunxi_debe.c

627

val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBPS_32BPP_BGRA,

sys/arch/arm/sunxi/sunxi_debe.c

630

val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBPS_32BPP_ARGB,

sys/arch/arm/sunxi/sunxi_debe.c

633

DEBE_WRITE(sc, SUNXI_DEBE_ATTCTL1_REG, val);

sys/arch/arm/sunxi/sunxi_debe.c

635

val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);

sys/arch/arm/sunxi/sunxi_debe.c

636

val |= SUNXI_DEBE_MODCTL_LAY0_EN;

sys/arch/arm/sunxi/sunxi_debe.c

638

val |= SUNXI_DEBE_MODCTL_ITLMOD_EN;

sys/arch/arm/sunxi/sunxi_debe.c

640

val &= ~SUNXI_DEBE_MODCTL_ITLMOD_EN;

sys/arch/arm/sunxi/sunxi_debe.c

642

val &= ~SUNXI_DEBE_MODCTL_OUT_SEL;

sys/arch/arm/sunxi/sunxi_debe.c

644

val |= __SHIFTIN(SUNXI_DEBE_MODCTL_OUT_SEL_LCD1,

sys/arch/arm/sunxi/sunxi_debe.c

647

DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);

sys/arch/arm/sunxi/sunxi_debe.c

650

val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);

sys/arch/arm/sunxi/sunxi_debe.c

651

val &= ~SUNXI_DEBE_MODCTL_LAY0_EN;

sys/arch/arm/sunxi/sunxi_debe.c

652

val &= ~SUNXI_DEBE_MODCTL_START_CTL;

sys/arch/arm/sunxi/sunxi_debe.c

653

DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);

sys/arch/arm/sunxi/sunxi_debe.c

665

uint32_t val;

sys/arch/arm/sunxi/sunxi_debe.c

671

val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);

sys/arch/arm/sunxi/sunxi_debe.c

673

if (val & SUNXI_DEBE_MODCTL_START_CTL) {

sys/arch/arm/sunxi/sunxi_debe.c

678

if ((val & SUNXI_DEBE_MODCTL_START_CTL) == 0) {

sys/arch/arm/sunxi/sunxi_debe.c

685

val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);

sys/arch/arm/sunxi/sunxi_debe.c

686

*(int *)data = !!(val & SUNXI_DEBE_MODCTL_LAY0_EN);

sys/arch/arm/sunxi/sunxi_emac.c

202

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_emac.c

203

bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_emac.c

206

sunxi_emac_mii_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/arch/arm/sunxi/sunxi_emac.c

218

*val = RD4(sc, EMAC_MII_DATA) & 0xffff;

sys/arch/arm/sunxi/sunxi_emac.c

234

sunxi_emac_mii_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/arch/arm/sunxi/sunxi_emac.c

239

WR4(sc, EMAC_MII_DATA, val);

sys/arch/arm/sunxi/sunxi_emac.c

264

uint32_t val;

sys/arch/arm/sunxi/sunxi_emac.c

266

val = RD4(sc, EMAC_BASIC_CTL_0);

sys/arch/arm/sunxi/sunxi_emac.c

267

val &= ~(BASIC_CTL_SPEED | BASIC_CTL_DUPLEX);

sys/arch/arm/sunxi/sunxi_emac.c

271

val |= BASIC_CTL_SPEED_1000 << BASIC_CTL_SPEED_SHIFT;

sys/arch/arm/sunxi/sunxi_emac.c

273

val |= BASIC_CTL_SPEED_100 << BASIC_CTL_SPEED_SHIFT;

sys/arch/arm/sunxi/sunxi_emac.c

275

val |= BASIC_CTL_SPEED_10 << BASIC_CTL_SPEED_SHIFT;

sys/arch/arm/sunxi/sunxi_emac.c

278

val |= BASIC_CTL_DUPLEX;

sys/arch/arm/sunxi/sunxi_emac.c

280

WR4(sc, EMAC_BASIC_CTL_0, val);

sys/arch/arm/sunxi/sunxi_emac.c

282

val = RD4(sc, EMAC_RX_CTL_0);

sys/arch/arm/sunxi/sunxi_emac.c

283

val &= ~RX_FLOW_CTL_EN;

sys/arch/arm/sunxi/sunxi_emac.c

285

val |= RX_FLOW_CTL_EN;

sys/arch/arm/sunxi/sunxi_emac.c

286

WR4(sc, EMAC_RX_CTL_0, val);

sys/arch/arm/sunxi/sunxi_emac.c

288

val = RD4(sc, EMAC_TX_FLOW_CTL);

sys/arch/arm/sunxi/sunxi_emac.c

289

val &= ~(PAUSE_TIME | TX_FLOW_CTL_EN);

sys/arch/arm/sunxi/sunxi_emac.c

291

val |= TX_FLOW_CTL_EN;

sys/arch/arm/sunxi/sunxi_emac.c

293

val |= sunxi_emac_pause_time << PAUSE_TIME_SHIFT;

sys/arch/arm/sunxi/sunxi_emac.c

294

WR4(sc, EMAC_TX_FLOW_CTL, val);

sys/arch/arm/sunxi/sunxi_emac.c

445

uint32_t val;

sys/arch/arm/sunxi/sunxi_emac.c

487

val = RD4(sc, EMAC_TX_CTL_1);

sys/arch/arm/sunxi/sunxi_emac.c

488

WR4(sc, EMAC_TX_CTL_1, val | TX_DMA_START);

sys/arch/arm/sunxi/sunxi_emac.c

538

uint32_t val, crc, hashreg, hashbit, hash[2], machi, maclo;

sys/arch/arm/sunxi/sunxi_emac.c

545

val = 0;

sys/arch/arm/sunxi/sunxi_emac.c

549

val |= DIS_ADDR_FILTER;

sys/arch/arm/sunxi/sunxi_emac.c

551

val |= RX_ALL_MULTICAST;

sys/arch/arm/sunxi/sunxi_emac.c

554

val |= HASH_MULTICAST;

sys/arch/arm/sunxi/sunxi_emac.c

582

WR4(sc, EMAC_RX_FRM_FLT, val);

sys/arch/arm/sunxi/sunxi_emac.c

670

uint32_t val;

sys/arch/arm/sunxi/sunxi_emac.c

687

val = sunxi_emac_burst_len << BASIC_CTL_BURST_LEN_SHIFT;

sys/arch/arm/sunxi/sunxi_emac.c

689

val |= BASIC_CTL_RX_TX_PRI;

sys/arch/arm/sunxi/sunxi_emac.c

690

WR4(sc, EMAC_BASIC_CTL_1, val);

sys/arch/arm/sunxi/sunxi_emac.c

696

val = RD4(sc, EMAC_TX_CTL_1);

sys/arch/arm/sunxi/sunxi_emac.c

697

WR4(sc, EMAC_TX_CTL_1, val | TX_DMA_EN | TX_MD | TX_NEXT_FRAME);

sys/arch/arm/sunxi/sunxi_emac.c

700

val = RD4(sc, EMAC_RX_CTL_1);

sys/arch/arm/sunxi/sunxi_emac.c

701

WR4(sc, EMAC_RX_CTL_1, val | RX_DMA_EN | RX_MD);

sys/arch/arm/sunxi/sunxi_emac.c

704

val = RD4(sc, EMAC_TX_CTL_0);

sys/arch/arm/sunxi/sunxi_emac.c

705

WR4(sc, EMAC_TX_CTL_0, val | TX_EN);

sys/arch/arm/sunxi/sunxi_emac.c

708

val = RD4(sc, EMAC_RX_CTL_0);

sys/arch/arm/sunxi/sunxi_emac.c

709

WR4(sc, EMAC_RX_CTL_0, val | RX_EN | CHECK_CRC);

sys/arch/arm/sunxi/sunxi_emac.c

736

uint32_t val;

sys/arch/arm/sunxi/sunxi_emac.c

745

val = RD4(sc, EMAC_TX_CTL_1);

sys/arch/arm/sunxi/sunxi_emac.c

746

val &= ~TX_DMA_EN;

sys/arch/arm/sunxi/sunxi_emac.c

747

val |= FLUSH_TX_FIFO;

sys/arch/arm/sunxi/sunxi_emac.c

748

WR4(sc, EMAC_TX_CTL_1, val);

sys/arch/arm/sunxi/sunxi_emac.c

751

val = RD4(sc, EMAC_TX_CTL_0);

sys/arch/arm/sunxi/sunxi_emac.c

752

WR4(sc, EMAC_TX_CTL_0, val & ~TX_EN);

sys/arch/arm/sunxi/sunxi_emac.c

755

val = RD4(sc, EMAC_RX_CTL_0);

sys/arch/arm/sunxi/sunxi_emac.c

756

WR4(sc, EMAC_RX_CTL_0, val & ~RX_EN);

sys/arch/arm/sunxi/sunxi_emac.c

762

val = RD4(sc, EMAC_TX_CTL_1);

sys/arch/arm/sunxi/sunxi_emac.c

763

WR4(sc, EMAC_TX_CTL_1, val & ~TX_DMA_EN);

sys/arch/arm/sunxi/sunxi_emac.c

766

val = RD4(sc, EMAC_RX_CTL_1);

sys/arch/arm/sunxi/sunxi_emac.c

767

WR4(sc, EMAC_RX_CTL_1, val & ~RX_DMA_EN);

sys/arch/arm/sunxi/sunxi_emac.c

896

uint32_t val;

sys/arch/arm/sunxi/sunxi_emac.c

900

val = RD4(sc, EMAC_INT_STA);

sys/arch/arm/sunxi/sunxi_emac.c

901

WR4(sc, EMAC_INT_STA, val);

sys/arch/arm/sunxi/sunxi_emac.c

903

if (val & RX_INT)

sys/arch/arm/sunxi/sunxi_emac.c

906

if (val & (TX_INT | TX_BUF_UA_INT)) {

sys/arch/arm/sunxi/sunxi_gates.c

139

uint32_t val;

sys/arch/arm/sunxi/sunxi_gates.c

144

val = GATE_READ(sc, gate_reg);

sys/arch/arm/sunxi/sunxi_gates.c

145

val |= gate_mask;

sys/arch/arm/sunxi/sunxi_gates.c

146

GATE_WRITE(sc, gate_reg, val);

sys/arch/arm/sunxi/sunxi_gates.c

156

uint32_t val;

sys/arch/arm/sunxi/sunxi_gates.c

161

val = GATE_READ(sc, gate_reg);

sys/arch/arm/sunxi/sunxi_gates.c

162

val &= ~gate_mask;

sys/arch/arm/sunxi/sunxi_gates.c

163

GATE_WRITE(sc, gate_reg, val);

sys/arch/arm/sunxi/sunxi_gates.c

70

#define GATE_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_gates.c

71

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_gmac.c

67

int len, val;

sys/arch/arm/sunxi/sunxi_gmac.c

79

val = reset_active_low ? 1 : 0;

sys/arch/arm/sunxi/sunxi_gmac.c

81

fdtbus_gpio_write(pin_reset, val);

sys/arch/arm/sunxi/sunxi_gmac.c

83

fdtbus_gpio_write(pin_reset, !val);

sys/arch/arm/sunxi/sunxi_gmac.c

85

fdtbus_gpio_write(pin_reset, val);

sys/arch/arm/sunxi/sunxi_gmacclk.c

177

uint32_t val;

sys/arch/arm/sunxi/sunxi_gmacclk.c

179

val = RD4(sc, 0);

sys/arch/arm/sunxi/sunxi_gmacclk.c

180

val &= ~(GMAC_CLK_PIT|GMAC_CLK_SRC);

sys/arch/arm/sunxi/sunxi_gmacclk.c

183

val |= __SHIFTIN(GMAC_CLK_PIT_MII, GMAC_CLK_PIT);

sys/arch/arm/sunxi/sunxi_gmacclk.c

184

val |= __SHIFTIN(GMAC_CLK_SRC_MII, GMAC_CLK_SRC);

sys/arch/arm/sunxi/sunxi_gmacclk.c

187

val |= __SHIFTIN(GMAC_CLK_PIT_RGMII, GMAC_CLK_PIT);

sys/arch/arm/sunxi/sunxi_gmacclk.c

188

val |= __SHIFTIN(GMAC_CLK_SRC_RGMII, GMAC_CLK_SRC);

sys/arch/arm/sunxi/sunxi_gmacclk.c

192

WR4(sc, 0, val);

sys/arch/arm/sunxi/sunxi_gmacclk.c

209

uint32_t val;

sys/arch/arm/sunxi/sunxi_gmacclk.c

212

val = RD4(sc, 0);

sys/arch/arm/sunxi/sunxi_gmacclk.c

213

sel = __SHIFTOUT(val, GMAC_CLK_PIT);

sys/arch/arm/sunxi/sunxi_gmacclk.c

86

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_gmacclk.c

87

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_gpio.c

186

#define GPIO_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_gpio.c

187

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_gpio.c

384

int val;

sys/arch/arm/sunxi/sunxi_gpio.c

393

val = __SHIFTOUT(data, data_mask);

sys/arch/arm/sunxi/sunxi_gpio.c

395

val = !val;

sys/arch/arm/sunxi/sunxi_gpio.c

400

__SHIFTOUT(val, data_mask), val);

sys/arch/arm/sunxi/sunxi_gpio.c

403

return val;

sys/arch/arm/sunxi/sunxi_gpio.c

407

sunxi_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/sunxi/sunxi_gpio.c

420

val = !val;

sys/arch/arm/sunxi/sunxi_gpio.c

425

data |= __SHIFTIN(val, data_mask);

sys/arch/arm/sunxi/sunxi_gpio.c

477

uint32_t val;

sys/arch/arm/sunxi/sunxi_gpio.c

507

val = GPIO_READ(sc, SUNXI_GPIO_INT_CFG(eint->eint_bank, eint->eint_num));

sys/arch/arm/sunxi/sunxi_gpio.c

508

val &= ~SUNXI_GPIO_INT_MODEMASK(eint->eint_num);

sys/arch/arm/sunxi/sunxi_gpio.c

509

val |= __SHIFTIN(mode, SUNXI_GPIO_INT_MODEMASK(eint->eint_num));

sys/arch/arm/sunxi/sunxi_gpio.c

510

GPIO_WRITE(sc, SUNXI_GPIO_INT_CFG(eint->eint_bank, eint->eint_num), val);

sys/arch/arm/sunxi/sunxi_gpio.c

512

val = SUNXI_GPIO_INT_DEBOUNCE_CLK_SEL;

sys/arch/arm/sunxi/sunxi_gpio.c

513

GPIO_WRITE(sc, SUNXI_GPIO_INT_DEBOUNCE(eint->eint_bank), val);

sys/arch/arm/sunxi/sunxi_gpio.c

516

val = GPIO_READ(sc, SUNXI_GPIO_INT_CTL(eint->eint_bank));

sys/arch/arm/sunxi/sunxi_gpio.c

517

val |= __BIT(eint->eint_num);

sys/arch/arm/sunxi/sunxi_gpio.c

518

GPIO_WRITE(sc, SUNXI_GPIO_INT_CTL(eint->eint_bank), val);

sys/arch/arm/sunxi/sunxi_gpio.c

528

uint32_t val;

sys/arch/arm/sunxi/sunxi_gpio.c

535

val = GPIO_READ(sc, SUNXI_GPIO_INT_CTL(eint->eint_bank));

sys/arch/arm/sunxi/sunxi_gpio.c

536

val &= ~__BIT(eint->eint_num);

sys/arch/arm/sunxi/sunxi_gpio.c

537

GPIO_WRITE(sc, SUNXI_GPIO_INT_CTL(eint->eint_bank), val);

sys/arch/arm/sunxi/sunxi_gpio.c

760

int val;

sys/arch/arm/sunxi/sunxi_gpio.c

762

val = fdtbus_pinctrl_parse_drive_strength(phandle);

sys/arch/arm/sunxi/sunxi_gpio.c

763

if (val != -1)

sys/arch/arm/sunxi/sunxi_gpio.c

764

return val;

sys/arch/arm/sunxi/sunxi_gpio.c

766

if (of_getprop_uint32(phandle, "allwinner,drive", &val) == 0)

sys/arch/arm/sunxi/sunxi_gpio.c

767

return (val + 1) * 10;

sys/arch/arm/sunxi/sunxi_gpio.c

777

uint32_t val;

sys/arch/arm/sunxi/sunxi_gpio.c

810

val = 0x0; /* 1.8V */

sys/arch/arm/sunxi/sunxi_gpio.c

812

val = 0x6; /* 2.5V */

sys/arch/arm/sunxi/sunxi_gpio.c

814

val = 0x9; /* 2.8V */

sys/arch/arm/sunxi/sunxi_gpio.c

816

val = 0xa; /* 3.0V */

sys/arch/arm/sunxi/sunxi_gpio.c

818

val = 0xd; /* 3.3V */

sys/arch/arm/sunxi/sunxi_gpio.c

821

pin_def->port, val);

sys/arch/arm/sunxi/sunxi_gpio.c

822

val = GPIO_READ(sc, SUNXI_GPIO_GRP_CONFIG(pin_def->port));

sys/arch/arm/sunxi/sunxi_gpio.c

823

val &= ~SUNXI_GPIO_GRP_IO_BIAS_CONFIGMASK;

sys/arch/arm/sunxi/sunxi_gpio.c

824

val |= __SHIFTIN(val, SUNXI_GPIO_GRP_IO_BIAS_CONFIGMASK);

sys/arch/arm/sunxi/sunxi_gpio.c

825

GPIO_WRITE(sc, SUNXI_GPIO_GRP_CONFIG(pin_def->port), val);

sys/arch/arm/sunxi/sunxi_gpio.c

893

int val;

sys/arch/arm/sunxi/sunxi_gpio.c

902

val = __SHIFTOUT(data, data_mask);

sys/arch/arm/sunxi/sunxi_gpio.c

904

return val;

sys/arch/arm/sunxi/sunxi_gpio.c

908

sunxi_gpio_pin_write(void *priv, int pin, int val)

sys/arch/arm/sunxi/sunxi_gpio.c

921

if (val)

sys/arch/arm/sunxi/sunxi_hdmi.c

1000

uint32_t cts, n, val;

sys/arch/arm/sunxi/sunxi_hdmi.c

1007

val = HDMI_READ(sc, SUNXI_HDMI_AUD_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

1008

val &= ~SUNXI_HDMI_AUD_CTRL_EN;

sys/arch/arm/sunxi/sunxi_hdmi.c

1009

val |= SUNXI_HDMI_AUD_CTRL_RST;

sys/arch/arm/sunxi/sunxi_hdmi.c

1010

HDMI_WRITE(sc, SUNXI_HDMI_AUD_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

1012

val = HDMI_READ(sc, SUNXI_HDMI_AUD_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

1013

} while (val & SUNXI_HDMI_AUD_CTRL_RST);

sys/arch/arm/sunxi/sunxi_hdmi.c

102

#define HDMI_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_hdmi.c

1021

val = HDMI_READ(sc, SUNXI_HDMI_ADMA_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

1023

val |= SUNXI_HDMI_ADMA_CTRL_SRC_DMA_MODE; /* NDMA */

sys/arch/arm/sunxi/sunxi_hdmi.c

1025

val &= ~SUNXI_HDMI_ADMA_CTRL_SRC_DMA_MODE; /* DDMA */

sys/arch/arm/sunxi/sunxi_hdmi.c

1027

val &= ~SUNXI_HDMI_ADMA_CTRL_SRC_DMA_SAMPLE_RATE;

sys/arch/arm/sunxi/sunxi_hdmi.c

1028

val &= ~SUNXI_HDMI_ADMA_CTRL_SRC_SAMPLE_LAYOUT;

sys/arch/arm/sunxi/sunxi_hdmi.c

1029

val &= ~SUNXI_HDMI_ADMA_CTRL_SRC_WORD_LEN;

sys/arch/arm/sunxi/sunxi_hdmi.c

103

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val));

sys/arch/arm/sunxi/sunxi_hdmi.c

1030

val &= ~SUNXI_HDMI_ADMA_CTRL_DATA_SEL;

sys/arch/arm/sunxi/sunxi_hdmi.c

1031

HDMI_WRITE(sc, SUNXI_HDMI_ADMA_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

1034

val = HDMI_READ(sc, SUNXI_HDMI_AUD_FMT_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

1035

val &= ~SUNXI_HDMI_AUD_FMT_SRC_SEL;

sys/arch/arm/sunxi/sunxi_hdmi.c

1036

val &= ~SUNXI_HDMI_AUD_FMT_SEL;

sys/arch/arm/sunxi/sunxi_hdmi.c

1037

val &= ~SUNXI_HDMI_AUD_FMT_DSD_FMT;

sys/arch/arm/sunxi/sunxi_hdmi.c

1038

val &= ~SUNXI_HDMI_AUD_FMT_LAYOUT;

sys/arch/arm/sunxi/sunxi_hdmi.c

1039

val &= ~SUNXI_HDMI_AUD_FMT_SRC_CH_CFG;

sys/arch/arm/sunxi/sunxi_hdmi.c

1040

val |= __SHIFTIN(1, SUNXI_HDMI_AUD_FMT_SRC_CH_CFG);

sys/arch/arm/sunxi/sunxi_hdmi.c

1041

HDMI_WRITE(sc, SUNXI_HDMI_AUD_FMT_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

1053

val = __SHIFTIN(SUNXI_HDMI_AUD_CH_STATUS0_FS_FREQ_48,

sys/arch/arm/sunxi/sunxi_hdmi.c

1055

HDMI_WRITE(sc, SUNXI_HDMI_AUD_CH_STATUS0_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

1058

val = HDMI_READ(sc, SUNXI_HDMI_AUD_CH_STATUS1_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

1059

val &= ~SUNXI_HDMI_AUD_CH_STATUS1_CGMS_A;

sys/arch/arm/sunxi/sunxi_hdmi.c

1060

val &= ~SUNXI_HDMI_AUD_CH_STATUS1_ORIGINAL_FS;

sys/arch/arm/sunxi/sunxi_hdmi.c

1061

val &= ~SUNXI_HDMI_AUD_CH_STATUS1_WORD_LEN;

sys/arch/arm/sunxi/sunxi_hdmi.c

1062

val |= __SHIFTIN(5, SUNXI_HDMI_AUD_CH_STATUS1_WORD_LEN);

sys/arch/arm/sunxi/sunxi_hdmi.c

1063

val |= SUNXI_HDMI_AUD_CH_STATUS1_WORD_LEN_MAX;

sys/arch/arm/sunxi/sunxi_hdmi.c

1064

HDMI_WRITE(sc, SUNXI_HDMI_AUD_CH_STATUS1_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

1067

val = HDMI_READ(sc, SUNXI_HDMI_AUD_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

1068

val |= SUNXI_HDMI_AUD_CTRL_EN;

sys/arch/arm/sunxi/sunxi_hdmi.c

1069

HDMI_WRITE(sc, SUNXI_HDMI_AUD_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

337

uint32_t val;

sys/arch/arm/sunxi/sunxi_hdmi.c

340

val = HDMI_READ(sc, SUNXI_HDMI_DDC_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

341

val &= ~SUNXI_HDMI_DDC_CTRL_FIFO_DIR;

sys/arch/arm/sunxi/sunxi_hdmi.c

342

HDMI_WRITE(sc, SUNXI_HDMI_DDC_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

344

val |= __SHIFTIN(block, SUNXI_HDMI_DDC_SLAVE_ADDR_0);

sys/arch/arm/sunxi/sunxi_hdmi.c

345

val |= __SHIFTIN(0x60, SUNXI_HDMI_DDC_SLAVE_ADDR_1);

sys/arch/arm/sunxi/sunxi_hdmi.c

346

val |= __SHIFTIN(reg, SUNXI_HDMI_DDC_SLAVE_ADDR_2);

sys/arch/arm/sunxi/sunxi_hdmi.c

347

val |= __SHIFTIN(addr, SUNXI_HDMI_DDC_SLAVE_ADDR_3);

sys/arch/arm/sunxi/sunxi_hdmi.c

348

HDMI_WRITE(sc, SUNXI_HDMI_DDC_SLAVE_ADDR_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

350

val = HDMI_READ(sc, SUNXI_HDMI_DDC_FIFO_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

351

val |= SUNXI_HDMI_DDC_FIFO_CTRL_ADDR_CLEAR;

sys/arch/arm/sunxi/sunxi_hdmi.c

352

HDMI_WRITE(sc, SUNXI_HDMI_DDC_FIFO_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

358

val = HDMI_READ(sc, SUNXI_HDMI_DDC_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

359

val |= SUNXI_HDMI_DDC_CTRL_ACCESS_CMD_START;

sys/arch/arm/sunxi/sunxi_hdmi.c

360

HDMI_WRITE(sc, SUNXI_HDMI_DDC_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

364

val = HDMI_READ(sc, SUNXI_HDMI_DDC_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

365

if ((val & SUNXI_HDMI_DDC_CTRL_ACCESS_CMD_START) == 0)

sys/arch/arm/sunxi/sunxi_hdmi.c

372

val = HDMI_READ(sc, SUNXI_HDMI_DDC_INT_STATUS_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

373

if ((val & SUNXI_HDMI_DDC_INT_STATUS_TRANSFER_COMPLETE) == 0) {

sys/arch/arm/sunxi/sunxi_hdmi.c

374

device_printf(sc->sc_dev, "xfer failed, status=%08x\n", val);

sys/arch/arm/sunxi/sunxi_hdmi.c

386

uint32_t val;

sys/arch/arm/sunxi/sunxi_hdmi.c

389

val = HDMI_READ(sc, SUNXI_A31_HDMI_DDC_FIFO_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

390

val |= SUNXI_A31_HDMI_DDC_FIFO_CTRL_RST;

sys/arch/arm/sunxi/sunxi_hdmi.c

391

HDMI_WRITE(sc, SUNXI_A31_HDMI_DDC_FIFO_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

393

val = __SHIFTIN(block, SUNXI_A31_HDMI_DDC_SLAVE_ADDR_SEG_PTR);

sys/arch/arm/sunxi/sunxi_hdmi.c

394

val |= __SHIFTIN(0x60, SUNXI_A31_HDMI_DDC_SLAVE_ADDR_DDC_CMD);

sys/arch/arm/sunxi/sunxi_hdmi.c

395

val |= __SHIFTIN(reg, SUNXI_A31_HDMI_DDC_SLAVE_ADDR_OFF_ADR);

sys/arch/arm/sunxi/sunxi_hdmi.c

396

val |= __SHIFTIN(addr, SUNXI_A31_HDMI_DDC_SLAVE_ADDR_DEV_ADR);

sys/arch/arm/sunxi/sunxi_hdmi.c

397

HDMI_WRITE(sc, SUNXI_A31_HDMI_DDC_SLAVE_ADDR_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

403

val = HDMI_READ(sc, SUNXI_A31_HDMI_DDC_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

404

val |= SUNXI_A31_HDMI_DDC_CTRL_ACCESS_CMD_START;

sys/arch/arm/sunxi/sunxi_hdmi.c

405

HDMI_WRITE(sc, SUNXI_A31_HDMI_DDC_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

409

val = HDMI_READ(sc, SUNXI_A31_HDMI_DDC_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

410

if ((val & SUNXI_A31_HDMI_DDC_CTRL_ACCESS_CMD_START) == 0)

sys/arch/arm/sunxi/sunxi_hdmi.c

807

uint32_t val;

sys/arch/arm/sunxi/sunxi_hdmi.c

811

val = HDMI_READ(sc, SUNXI_HDMI_VID_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

812

val &= ~SUNXI_HDMI_VID_CTRL_SRC_SEL;

sys/arch/arm/sunxi/sunxi_hdmi.c

814

val |= __SHIFTIN(SUNXI_HDMI_VID_CTRL_SRC_SEL_CBGEN,

sys/arch/arm/sunxi/sunxi_hdmi.c

817

val |= __SHIFTIN(SUNXI_HDMI_VID_CTRL_SRC_SEL_RGB,

sys/arch/arm/sunxi/sunxi_hdmi.c

821

val |= SUNXI_HDMI_VID_CTRL_VIDEO_EN;

sys/arch/arm/sunxi/sunxi_hdmi.c

823

val &= ~SUNXI_HDMI_VID_CTRL_VIDEO_EN;

sys/arch/arm/sunxi/sunxi_hdmi.c

825

HDMI_WRITE(sc, SUNXI_HDMI_VID_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

836

uint32_t val;

sys/arch/arm/sunxi/sunxi_hdmi.c

933

val = HDMI_READ(sc, SUNXI_HDMI_VID_CTRL_REG);

sys/arch/arm/sunxi/sunxi_hdmi.c

934

val &= ~SUNXI_HDMI_VID_CTRL_HDMI_MODE;

sys/arch/arm/sunxi/sunxi_hdmi.c

936

val |= __SHIFTIN(SUNXI_HDMI_VID_CTRL_HDMI_MODE_DVI,

sys/arch/arm/sunxi/sunxi_hdmi.c

939

val |= __SHIFTIN(SUNXI_HDMI_VID_CTRL_HDMI_MODE_HDMI,

sys/arch/arm/sunxi/sunxi_hdmi.c

942

val &= ~SUNXI_HDMI_VID_CTRL_REPEATER_SEL;

sys/arch/arm/sunxi/sunxi_hdmi.c

944

val |= __SHIFTIN(SUNXI_HDMI_VID_CTRL_REPEATER_SEL_2X,

sys/arch/arm/sunxi/sunxi_hdmi.c

947

val &= ~SUNXI_HDMI_VID_CTRL_OUTPUT_FMT;

sys/arch/arm/sunxi/sunxi_hdmi.c

949

val |= __SHIFTIN(SUNXI_HDMI_VID_CTRL_OUTPUT_FMT_INTERLACE,

sys/arch/arm/sunxi/sunxi_hdmi.c

952

HDMI_WRITE(sc, SUNXI_HDMI_VID_CTRL_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

954

val = __SHIFTIN((mode->hdisplay << dblscan_p) - 1,

sys/arch/arm/sunxi/sunxi_hdmi.c

956

val |= __SHIFTIN(mode->vdisplay - 1,

sys/arch/arm/sunxi/sunxi_hdmi.c

958

HDMI_WRITE(sc, SUNXI_HDMI_VID_TIMING_0_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

960

val = __SHIFTIN((hbp << dblscan_p) - 1,

sys/arch/arm/sunxi/sunxi_hdmi.c

962

val |= __SHIFTIN(vbp - 1,

sys/arch/arm/sunxi/sunxi_hdmi.c

964

HDMI_WRITE(sc, SUNXI_HDMI_VID_TIMING_1_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

966

val = __SHIFTIN((hfp << dblscan_p) - 1,

sys/arch/arm/sunxi/sunxi_hdmi.c

968

val |= __SHIFTIN(vfp - 1,

sys/arch/arm/sunxi/sunxi_hdmi.c

970

HDMI_WRITE(sc, SUNXI_HDMI_VID_TIMING_2_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

972

val = __SHIFTIN((hspw << dblscan_p) - 1,

sys/arch/arm/sunxi/sunxi_hdmi.c

974

val |= __SHIFTIN(vspw - 1,

sys/arch/arm/sunxi/sunxi_hdmi.c

976

HDMI_WRITE(sc, SUNXI_HDMI_VID_TIMING_3_REG, val);

sys/arch/arm/sunxi/sunxi_hdmi.c

978

val = 0;

sys/arch/arm/sunxi/sunxi_hdmi.c

980

val |= SUNXI_HDMI_VID_TIMING_4_HSYNC_ACTIVE_SEL;

sys/arch/arm/sunxi/sunxi_hdmi.c

983

val |= SUNXI_HDMI_VID_TIMING_4_VSYNC_ACTIVE_SEL;

sys/arch/arm/sunxi/sunxi_hdmi.c

985

val |= __SHIFTIN(SUNXI_HDMI_VID_TIMING_4_TX_CLOCK_NORMAL,

sys/arch/arm/sunxi/sunxi_hdmi.c

987

HDMI_WRITE(sc, SUNXI_HDMI_VID_TIMING_4_REG, val);

sys/arch/arm/sunxi/sunxi_hdmiphy.c

144

#define PHY_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_hdmiphy.c

145

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_hdmiphy.c

205

uint32_t val;

sys/arch/arm/sunxi/sunxi_hdmiphy.c

261

val = PHY_READ(sc, ANA_STS);

sys/arch/arm/sunxi/sunxi_hdmiphy.c

262

sc->sc_rcalib = __SHIFTOUT(val, ANA_STS_RESDO2D);

sys/arch/arm/sunxi/sunxi_hdmiphy.c

310

uint32_t val, rcalib;

sys/arch/arm/sunxi/sunxi_hdmiphy.c

328

val = PHY_READ(sc, PLL_CFG2);

sys/arch/arm/sunxi/sunxi_hdmiphy.c

329

prediv = val & PLL_CFG2_PREDIV;

sys/arch/arm/sunxi/sunxi_hdmiphy.c

342

val = PHY_READ(sc, ANA_STS);

sys/arch/arm/sunxi/sunxi_hdmiphy.c

343

b_out = __SHIFTOUT(val, ANA_STS_B_OUT);

sys/arch/arm/sunxi/sunxi_hdmiphy.c

502

uint32_t val;

sys/arch/arm/sunxi/sunxi_hdmiphy.c

504

val = PHY_READ(sc, ANA_STS);

sys/arch/arm/sunxi/sunxi_hdmiphy.c

506

return ISSET(val, ANA_STS_HPDO);

sys/arch/arm/sunxi/sunxi_hstimer.c

98

#define TIMER_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_hstimer.c

99

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_i2s.c

208

#define I2S_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_i2s.c

209

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_i2s.c

401

uint32_t val;

sys/arch/arm/sunxi/sunxi_i2s.c

427

val = I2S_READ(sc, DA_FCTL);

sys/arch/arm/sunxi/sunxi_i2s.c

428

I2S_WRITE(sc, DA_FCTL, val | DA_FCTL_FTX);

sys/arch/arm/sunxi/sunxi_i2s.c

429

I2S_WRITE(sc, DA_FCTL, val & ~DA_FCTL_FTX);

sys/arch/arm/sunxi/sunxi_i2s.c

435

val = I2S_READ(sc, DA_CTL);

sys/arch/arm/sunxi/sunxi_i2s.c

436

I2S_WRITE(sc, DA_CTL, val | DA_CTL_TXEN);

sys/arch/arm/sunxi/sunxi_i2s.c

439

val = I2S_READ(sc, DA_INT);

sys/arch/arm/sunxi/sunxi_i2s.c

440

I2S_WRITE(sc, DA_INT, val | DA_INT_TX_DRQ);

sys/arch/arm/sunxi/sunxi_i2s.c

462

uint32_t val;

sys/arch/arm/sunxi/sunxi_i2s.c

488

val = I2S_READ(sc, DA_FCTL);

sys/arch/arm/sunxi/sunxi_i2s.c

489

I2S_WRITE(sc, DA_FCTL, val | DA_FCTL_FRX);

sys/arch/arm/sunxi/sunxi_i2s.c

490

I2S_WRITE(sc, DA_FCTL, val & ~DA_FCTL_FRX);

sys/arch/arm/sunxi/sunxi_i2s.c

496

val = I2S_READ(sc, DA_CTL);

sys/arch/arm/sunxi/sunxi_i2s.c

497

I2S_WRITE(sc, DA_CTL, val | DA_CTL_RXEN);

sys/arch/arm/sunxi/sunxi_i2s.c

500

val = I2S_READ(sc, DA_INT);

sys/arch/arm/sunxi/sunxi_i2s.c

501

I2S_WRITE(sc, DA_INT, val | DA_INT_RX_DRQ);

sys/arch/arm/sunxi/sunxi_i2s.c

519

uint32_t val;

sys/arch/arm/sunxi/sunxi_i2s.c

528

val = I2S_READ(sc, DA_CTL);

sys/arch/arm/sunxi/sunxi_i2s.c

529

I2S_WRITE(sc, DA_CTL, val & ~DA_CTL_TXEN);

sys/arch/arm/sunxi/sunxi_i2s.c

532

val = I2S_READ(sc, DA_INT);

sys/arch/arm/sunxi/sunxi_i2s.c

533

I2S_WRITE(sc, DA_INT, val & ~DA_INT_TX_DRQ);

sys/arch/arm/sunxi/sunxi_i2s.c

546

uint32_t val;

sys/arch/arm/sunxi/sunxi_i2s.c

555

val = I2S_READ(sc, DA_CTL);

sys/arch/arm/sunxi/sunxi_i2s.c

556

I2S_WRITE(sc, DA_CTL, val & ~DA_CTL_RXEN);

sys/arch/arm/sunxi/sunxi_i2s.c

559

val = I2S_READ(sc, DA_INT);

sys/arch/arm/sunxi/sunxi_i2s.c

560

I2S_WRITE(sc, DA_INT, val & ~DA_INT_RX_DRQ);

sys/arch/arm/sunxi/sunxi_i2s.c

637

uint32_t val;

sys/arch/arm/sunxi/sunxi_i2s.c

674

val = I2S_READ(sc, DA_CLKD);

sys/arch/arm/sunxi/sunxi_i2s.c

676

val |= DA_CLKD_MCLKO_EN_SUN4I;

sys/arch/arm/sunxi/sunxi_i2s.c

677

val &= ~DA_CLKD_BCLKDIV_SUN4I;

sys/arch/arm/sunxi/sunxi_i2s.c

678

val |= __SHIFTIN(bclk_val, DA_CLKD_BCLKDIV_SUN4I);

sys/arch/arm/sunxi/sunxi_i2s.c

680

val |= DA_CLKD_MCLKO_EN_SUN8I;

sys/arch/arm/sunxi/sunxi_i2s.c

681

val &= ~DA_CLKD_BCLKDIV_SUN8I;

sys/arch/arm/sunxi/sunxi_i2s.c

682

val |= __SHIFTIN(bclk_val, DA_CLKD_BCLKDIV_SUN8I);

sys/arch/arm/sunxi/sunxi_i2s.c

684

val &= ~DA_CLKD_MCLKDIV;

sys/arch/arm/sunxi/sunxi_i2s.c

685

val |= __SHIFTIN(mclk_val, DA_CLKD_MCLKDIV);

sys/arch/arm/sunxi/sunxi_i2s.c

686

I2S_WRITE(sc, DA_CLKD, val);

sys/arch/arm/sunxi/sunxi_i2s.c

874

uint32_t val;

sys/arch/arm/sunxi/sunxi_i2s.c

910

val = I2S_READ(sc, DA_CTL);

sys/arch/arm/sunxi/sunxi_i2s.c

911

val &= ~(DA_CTL_TXEN|DA_CTL_RXEN|DA_CTL_GEN);

sys/arch/arm/sunxi/sunxi_i2s.c

912

I2S_WRITE(sc, DA_CTL, val);

sys/arch/arm/sunxi/sunxi_i2s.c

914

val = I2S_READ(sc, DA_FCTL);

sys/arch/arm/sunxi/sunxi_i2s.c

915

val &= ~(DA_FCTL_FTX|DA_FCTL_FRX);

sys/arch/arm/sunxi/sunxi_i2s.c

916

I2S_WRITE(sc, DA_FCTL, val);

sys/arch/arm/sunxi/sunxi_i2s.c

922

val = I2S_READ(sc, DA_CTL);

sys/arch/arm/sunxi/sunxi_i2s.c

923

val |= DA_CTL_GEN;

sys/arch/arm/sunxi/sunxi_i2s.c

924

I2S_WRITE(sc, DA_CTL, val);

sys/arch/arm/sunxi/sunxi_i2s.c

925

val |= DA_CTL_SDO_EN;

sys/arch/arm/sunxi/sunxi_i2s.c

926

I2S_WRITE(sc, DA_CTL, val);

sys/arch/arm/sunxi/sunxi_i2s.c

930

val = I2S_READ(sc, sc->sc_cfg->txchsel);

sys/arch/arm/sunxi/sunxi_i2s.c

931

val &= ~DA_CHSEL_EN;

sys/arch/arm/sunxi/sunxi_i2s.c

932

val |= __SHIFTIN(3, DA_CHSEL_EN);

sys/arch/arm/sunxi/sunxi_i2s.c

933

val &= ~DA_CHSEL_SEL;

sys/arch/arm/sunxi/sunxi_i2s.c

934

val |= __SHIFTIN(1, DA_CHSEL_SEL);

sys/arch/arm/sunxi/sunxi_i2s.c

935

I2S_WRITE(sc, sc->sc_cfg->txchsel, val);

sys/arch/arm/sunxi/sunxi_i2s.c

937

val = I2S_READ(sc, sc->sc_cfg->rxchsel);

sys/arch/arm/sunxi/sunxi_i2s.c

938

val &= ~DA_CHSEL_EN;

sys/arch/arm/sunxi/sunxi_i2s.c

939

val |= __SHIFTIN(3, DA_CHSEL_EN);

sys/arch/arm/sunxi/sunxi_i2s.c

940

val &= ~DA_CHSEL_SEL;

sys/arch/arm/sunxi/sunxi_i2s.c

941

val |= __SHIFTIN(1, DA_CHSEL_SEL);

sys/arch/arm/sunxi/sunxi_i2s.c

942

I2S_WRITE(sc, sc->sc_cfg->rxchsel, val);

sys/arch/arm/sunxi/sunxi_i2s.c

945

val = I2S_READ(sc, DA_CHCFG);

sys/arch/arm/sunxi/sunxi_i2s.c

946

val &= ~DA_CHCFG_TX_SLOT_NUM;

sys/arch/arm/sunxi/sunxi_i2s.c

947

val |= __SHIFTIN(1, DA_CHCFG_TX_SLOT_NUM);

sys/arch/arm/sunxi/sunxi_i2s.c

948

val &= ~DA_CHCFG_RX_SLOT_NUM;

sys/arch/arm/sunxi/sunxi_i2s.c

949

val |= __SHIFTIN(1, DA_CHCFG_RX_SLOT_NUM);

sys/arch/arm/sunxi/sunxi_i2s.c

950

I2S_WRITE(sc, DA_CHCFG, val);

sys/arch/arm/sunxi/sunxi_intc.c

88

#define INTC_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_intc.c

89

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_lcdc.c

146

#define TCON_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_lcdc.c

147

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_lcdc.c

184

uint32_t val;

sys/arch/arm/sunxi/sunxi_lcdc.c

186

val = TCON_READ(sc, TCON_GCTL_REG);

sys/arch/arm/sunxi/sunxi_lcdc.c

187

val |= TCON_GCTL_TCON_EN;

sys/arch/arm/sunxi/sunxi_lcdc.c

188

val &= ~TCON_GCTL_IO_MAP_SEL;

sys/arch/arm/sunxi/sunxi_lcdc.c

189

TCON_WRITE(sc, TCON_GCTL_REG, val);

sys/arch/arm/sunxi/sunxi_lcdc.c

199

uint32_t val;

sys/arch/arm/sunxi/sunxi_lcdc.c

201

val = TCON_READ(sc, TCON_GCTL_REG);

sys/arch/arm/sunxi/sunxi_lcdc.c

202

val |= TCON_GCTL_TCON_EN;

sys/arch/arm/sunxi/sunxi_lcdc.c

203

TCON_WRITE(sc, TCON_GCTL_REG, val);

sys/arch/arm/sunxi/sunxi_lcdc.c

215

uint32_t val;

sys/arch/arm/sunxi/sunxi_lcdc.c

226

val = TCON0_CTL_TCON0_EN |

sys/arch/arm/sunxi/sunxi_lcdc.c

228

TCON_WRITE(sc, TCON0_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_lcdc.c

235

val = TCON_READ(sc, TCON0_IO_POL_REG);

sys/arch/arm/sunxi/sunxi_lcdc.c

236

val &= ~(TCON0_IO_POL_IO3_INV|TCON0_IO_POL_IO2_INV|

sys/arch/arm/sunxi/sunxi_lcdc.c

240

val |= TCON0_IO_POL_IO1_INV;

sys/arch/arm/sunxi/sunxi_lcdc.c

242

val |= TCON0_IO_POL_IO0_INV;

sys/arch/arm/sunxi/sunxi_lcdc.c

243

TCON_WRITE(sc, TCON0_IO_POL_REG, val);

sys/arch/arm/sunxi/sunxi_lcdc.c

268

uint32_t val;

sys/arch/arm/sunxi/sunxi_lcdc.c

279

val = TCON1_CTL_TCON1_EN |

sys/arch/arm/sunxi/sunxi_lcdc.c

281

TCON_WRITE(sc, TCON1_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_lcdc.c

440

uint32_t val;

sys/arch/arm/sunxi/sunxi_lcdc.c

447

val = TCON_READ(sc, TCON_GINT0_REG);

sys/arch/arm/sunxi/sunxi_lcdc.c

448

if ((val & status_mask) != 0) {

sys/arch/arm/sunxi/sunxi_lcdc.c

451

TCON_WRITE(sc, TCON_GINT0_REG, val & ~status_mask);

sys/arch/arm/sunxi/sunxi_lradc.c

317

int32_t val;

sys/arch/arm/sunxi/sunxi_lradc.c

327

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,

sys/arch/arm/sunxi/sunxi_lradc.c

333

curdiff = val - sc->sc_level[chan][i];

sys/arch/arm/sunxi/sunxi_lradc.c

68

#define ADC_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_lradc.c

69

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_mc_smp.c

118

uint32_t val;

sys/arch/arm/sunxi/sunxi_mc_smp.c

122

val = bus_space_read_4(bst, cpuxcfg, CPUXCFG_CL_RST(cluster));

sys/arch/arm/sunxi/sunxi_mc_smp.c

123

val &= ~__BIT(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

124

bus_space_write_4(bst, cpuxcfg, CPUXCFG_CL_RST(cluster), val);

sys/arch/arm/sunxi/sunxi_mc_smp.c

128

val = bus_space_read_4(bst, cpucfg, CPUCFG_CL_RST(cluster));

sys/arch/arm/sunxi/sunxi_mc_smp.c

129

val &= ~__BIT(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

130

bus_space_write_4(bst, cpucfg, CPUCFG_CL_RST(cluster), val);

sys/arch/arm/sunxi/sunxi_mc_smp.c

135

val = bus_space_read_4(bst, cpuxcfg, CPUXCFG_CL_CTRL0(cluster));

sys/arch/arm/sunxi/sunxi_mc_smp.c

136

val &= ~__BIT(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

137

bus_space_write_4(bst, cpuxcfg, CPUXCFG_CL_CTRL0(cluster), val);

sys/arch/arm/sunxi/sunxi_mc_smp.c

155

val = bus_space_read_4(bst, prcm, PRCM_CL_PWROFF(cluster));

sys/arch/arm/sunxi/sunxi_mc_smp.c

158

val &= ~__BIT(4);

sys/arch/arm/sunxi/sunxi_mc_smp.c

160

val &= ~__BIT(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

161

val &= ~__BIT(0); /* cluster power gate */

sys/arch/arm/sunxi/sunxi_mc_smp.c

163

val &= ~__BIT(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

164

val &= ~__BIT(4); /* cluster power gate */

sys/arch/arm/sunxi/sunxi_mc_smp.c

166

bus_space_write_4(bst, prcm, PRCM_CL_PWROFF(cluster), val);

sys/arch/arm/sunxi/sunxi_mc_smp.c

169

val = bus_space_read_4(bst, prcm, PRCM_CL_RST_CTRL(cluster));

sys/arch/arm/sunxi/sunxi_mc_smp.c

170

val |= __BIT(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

171

bus_space_write_4(bst, prcm, PRCM_CL_RST_CTRL(cluster), val);

sys/arch/arm/sunxi/sunxi_mc_smp.c

174

val = bus_space_read_4(bst, cpucfg, CPUCFG_CL_RST(cluster));

sys/arch/arm/sunxi/sunxi_mc_smp.c

175

val |= __BIT(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

176

bus_space_write_4(bst, cpucfg, CPUCFG_CL_RST(cluster), val);

sys/arch/arm/sunxi/sunxi_mc_smp.c

181

val = bus_space_read_4(bst, cpuxcfg, CPUXCFG_CL_RST(cluster));

sys/arch/arm/sunxi/sunxi_mc_smp.c

182

val |= __BIT(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

183

val |= CPUXCFG_CL_RST_SOC_DBG_RST;

sys/arch/arm/sunxi/sunxi_mc_smp.c

185

val |= CPUXCFG_CL_RST_ETM_RST(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

187

val |= CPUXCFG_CL_RST_CX_RST(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

188

val |= CPUXCFG_CL_RST_DBG_RST(cpu);

sys/arch/arm/sunxi/sunxi_mc_smp.c

189

val |= CPUXCFG_CL_RST_L2_RST;

sys/arch/arm/sunxi/sunxi_mc_smp.c

190

val |= CPUXCFG_CL_RST_H_RST;

sys/arch/arm/sunxi/sunxi_mc_smp.c

191

bus_space_write_4(bst, cpuxcfg, CPUXCFG_CL_RST(cluster), val);

sys/arch/arm/sunxi/sunxi_mc_smp.c

194

val = bus_space_read_4(bst, cpuxcfg, CPUXCFG_CL_CTRL1(cluster));

sys/arch/arm/sunxi/sunxi_mc_smp.c

195

val &= ~CPUXCFG_CL_CTRL1_ACINACTM;

sys/arch/arm/sunxi/sunxi_mc_smp.c

196

bus_space_write_4(bst, cpuxcfg, CPUXCFG_CL_CTRL1(cluster), val);

sys/arch/arm/sunxi/sunxi_mixer.c

246

#define GLB_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_mixer.c

247

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, GLB_BASE + (reg), (val))

sys/arch/arm/sunxi/sunxi_mixer.c

251

#define BLD_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_mixer.c

252

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, BLD_BASE + (reg), (val))

sys/arch/arm/sunxi/sunxi_mixer.c

256

#define OVL_V_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_mixer.c

257

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, OVL_BASE(0) + (reg), (val))

sys/arch/arm/sunxi/sunxi_mixer.c

261

#define OVL_UI_WRITE(sc, n, reg, val) \

sys/arch/arm/sunxi/sunxi_mixer.c

262

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, OVL_BASE((n) + 1) + (reg), (val))

sys/arch/arm/sunxi/sunxi_mixer.c

266

#define VSU_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_mixer.c

267

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, VSU_BASE + (reg), (val))

sys/arch/arm/sunxi/sunxi_mixer.c

271

#define CSC_WRITE(sc, n, reg, val) \

sys/arch/arm/sunxi/sunxi_mixer.c

272

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, CSC_BASE(n) + (reg), (val))

sys/arch/arm/sunxi/sunxi_mixer.c

306

uint32_t val;

sys/arch/arm/sunxi/sunxi_mixer.c

324

val = OVL_UI_ATTR_CTL_LAY_EN |

sys/arch/arm/sunxi/sunxi_mixer.c

327

OVL_UI_WRITE(sc, 0, OVL_UI_ATTR_CTL(0), val);

sys/arch/arm/sunxi/sunxi_mixer.c

333

val = OVL_UI_READ(sc, 0, OVL_UI_TOP_HADD);

sys/arch/arm/sunxi/sunxi_mixer.c

334

val &= ~OVL_UI_TOP_HADD_LAYER0;

sys/arch/arm/sunxi/sunxi_mixer.c

335

val |= __SHIFTIN(haddr, OVL_UI_TOP_HADD_LAYER0);

sys/arch/arm/sunxi/sunxi_mixer.c

336

OVL_UI_WRITE(sc, 0, OVL_UI_TOP_HADD, val);

sys/arch/arm/sunxi/sunxi_mixer.c

397

uint32_t val;

sys/arch/arm/sunxi/sunxi_mixer.c

406

val = BLD_READ(sc, BLD_FILL_COLOR_CTL);

sys/arch/arm/sunxi/sunxi_mixer.c

407

val |= BLD_FILL_COLOR_CTL_P0_EN;

sys/arch/arm/sunxi/sunxi_mixer.c

408

BLD_WRITE(sc, BLD_FILL_COLOR_CTL, val);

sys/arch/arm/sunxi/sunxi_mixer.c

415

val = BLD_READ(sc, BLD_CH_RTCTL);

sys/arch/arm/sunxi/sunxi_mixer.c

416

val &= ~BLD_CH_RTCTL_P0;

sys/arch/arm/sunxi/sunxi_mixer.c

417

val |= __SHIFTIN(1, BLD_CH_RTCTL_P0);

sys/arch/arm/sunxi/sunxi_mixer.c

418

BLD_WRITE(sc, BLD_CH_RTCTL, val);

sys/arch/arm/sunxi/sunxi_mmc.c

1016

uint32_t val;

sys/arch/arm/sunxi/sunxi_mmc.c

1089

val = MMC_READ(sc, SUNXI_MMC_GCTRL);

sys/arch/arm/sunxi/sunxi_mmc.c

1090

val |= SUNXI_MMC_GCTRL_DMAEN;

sys/arch/arm/sunxi/sunxi_mmc.c

1091

MMC_WRITE(sc, SUNXI_MMC_GCTRL, val);

sys/arch/arm/sunxi/sunxi_mmc.c

1092

val |= SUNXI_MMC_GCTRL_DMARESET;

sys/arch/arm/sunxi/sunxi_mmc.c

1093

MMC_WRITE(sc, SUNXI_MMC_GCTRL, val);

sys/arch/arm/sunxi/sunxi_mmc.c

1097

val = SUNXI_MMC_IDST_RECEIVE_INT;

sys/arch/arm/sunxi/sunxi_mmc.c

1099

val = 0;

sys/arch/arm/sunxi/sunxi_mmc.c

1100

MMC_WRITE(sc, SUNXI_MMC_IDIE, val);

sys/arch/arm/sunxi/sunxi_mmc.c

209

#define MMC_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_mmc.c

210

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_nand.c

152

#define NAND_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_nand.c

153

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_nand.c

166

sunxi_nand_wait_status(struct sunxi_nand_softc *sc, uint32_t mask, uint32_t val)

sys/arch/arm/sunxi/sunxi_nand.c

173

if ((status & mask) == val)

sys/arch/arm/sunxi/sunxi_nand.c

181

status, mask, val);

sys/arch/arm/sunxi/sunxi_nmi.c

121

#define NMI_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_nmi.c

122

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_nmi.c

127

uint32_t val;

sys/arch/arm/sunxi/sunxi_nmi.c

129

val = NMI_READ(sc, sc->sc_config->pend_reg);

sys/arch/arm/sunxi/sunxi_nmi.c

130

val |= NMI_PEND_IRQ_ACK;

sys/arch/arm/sunxi/sunxi_nmi.c

131

NMI_WRITE(sc, sc->sc_config->pend_reg, val);

sys/arch/arm/sunxi/sunxi_nmi.c

137

uint32_t val;

sys/arch/arm/sunxi/sunxi_nmi.c

139

val = NMI_READ(sc, sc->sc_config->enable_reg);

sys/arch/arm/sunxi/sunxi_nmi.c

141

val |= NMI_ENABLE_IRQEN;

sys/arch/arm/sunxi/sunxi_nmi.c

143

val &= ~NMI_ENABLE_IRQEN;

sys/arch/arm/sunxi/sunxi_nmi.c

144

NMI_WRITE(sc, sc->sc_config->enable_reg, val);

sys/arch/arm/sunxi/sunxi_nmi.c

150

uint32_t val;

sys/arch/arm/sunxi/sunxi_nmi.c

152

val = NMI_READ(sc, sc->sc_config->ctrl_reg);

sys/arch/arm/sunxi/sunxi_nmi.c

153

val &= ~NMI_CTRL_IRQ_TYPE;

sys/arch/arm/sunxi/sunxi_nmi.c

154

val |= __SHIFTIN(irq_type, NMI_CTRL_IRQ_TYPE);

sys/arch/arm/sunxi/sunxi_nmi.c

155

NMI_WRITE(sc, sc->sc_config->ctrl_reg, val);

sys/arch/arm/sunxi/sunxi_platform.c

205

int val;

sys/arch/arm/sunxi/sunxi_platform.c

233

if (get_bootconf_option(boot_args, "nomodeset", BOOTOPT_TYPE_BOOLEAN, &val))

sys/arch/arm/sunxi/sunxi_platform.c

234

if (val)

sys/arch/arm/sunxi/sunxi_platform.c

239

if (get_bootconf_option(boot_args, "nomodeset", BOOTOPT_TYPE_BOOLEAN, &val))

sys/arch/arm/sunxi/sunxi_platform.c

240

if (val)

sys/arch/arm/sunxi/sunxi_pwm.c

79

#define PWM_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_pwm.c

80

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_resets.c

100

RESET_WRITE(sc, reset_reg, val | reset_mask);

sys/arch/arm/sunxi/sunxi_resets.c

57

#define RESET_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_resets.c

58

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_resets.c

84

const uint32_t val = RESET_READ(sc, reset_reg);

sys/arch/arm/sunxi/sunxi_resets.c

85

RESET_WRITE(sc, reset_reg, val & ~reset_mask);

sys/arch/arm/sunxi/sunxi_resets.c

99

const uint32_t val = RESET_READ(sc, reset_reg);

sys/arch/arm/sunxi/sunxi_rsb.c

100

#define RSB_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_rsb.c

101

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_rtc.c

306

#define RTC_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_rtc.c

307

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_sata.c

55

uint32_t val;

sys/arch/arm/sunxi/sunxi_sata.c

57

val = AHCI_READ(sc, dma_reg);

sys/arch/arm/sunxi/sunxi_sata.c

58

val &= ~0xffff;

sys/arch/arm/sunxi/sunxi_sata.c

59

val |= 0x4433;

sys/arch/arm/sunxi/sunxi_sata.c

60

AHCI_WRITE(sc, dma_reg, val);

sys/arch/arm/sunxi/sunxi_sid.c

78

#define EFUSE_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_sid.c

79

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (sc)->sc_conf->efuse_offset + (reg), (val))

sys/arch/arm/sunxi/sunxi_sramc.c

118

#define SRAMC_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_sramc.c

119

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_sramc.c

184

sunxi_sramc_write_4(void *priv, bus_size_t reg, uint32_t val)

sys/arch/arm/sunxi/sunxi_sramc.c

190

SRAMC_WRITE(sc, reg, val);

sys/arch/arm/sunxi/sunxi_sramc.c

249

uint32_t val;

sys/arch/arm/sunxi/sunxi_sramc.c

260

val = SRAMC_READ(sc, node->area->reg);

sys/arch/arm/sunxi/sunxi_sramc.c

261

val &= ~node->area->mask;

sys/arch/arm/sunxi/sunxi_sramc.c

262

val |= __SHIFTIN(config, node->area->mask);

sys/arch/arm/sunxi/sunxi_sramc.c

263

SRAMC_WRITE(sc, node->area->reg, val);

sys/arch/arm/sunxi/sunxi_tcon.c

438

uint32_t val;

sys/arch/arm/sunxi/sunxi_tcon.c

514

val = __SHIFTIN(start_delay, SUNXI_TCONx_CTL_START_DELAY);

sys/arch/arm/sunxi/sunxi_tcon.c

519

val |= __SHIFTIN(SUNXI_TCONx_CTL_SRC_SEL_DE0,

sys/arch/arm/sunxi/sunxi_tcon.c

521

TCON_WRITE(sc, SUNXI_TCON0_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

523

val = (lcd_x - 1) << 16 | (lcd_y - 1);

sys/arch/arm/sunxi/sunxi_tcon.c

524

TCON_WRITE(sc, SUNXI_TCON0_BASIC0_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

525

val = (lcd_ht - 1) << 16 | (lcd_hbp - 1);

sys/arch/arm/sunxi/sunxi_tcon.c

526

TCON_WRITE(sc, SUNXI_TCON0_BASIC1_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

527

val = (lcd_vt * 2) << 16 | (lcd_vbp - 1);

sys/arch/arm/sunxi/sunxi_tcon.c

528

TCON_WRITE(sc, SUNXI_TCON0_BASIC2_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

529

val = ((lcd_hspw > 0) ? (lcd_hspw - 1) : 0) << 16;

sys/arch/arm/sunxi/sunxi_tcon.c

530

val |= ((lcd_vspw > 0) ? (lcd_vspw - 1) : 0);

sys/arch/arm/sunxi/sunxi_tcon.c

531

TCON_WRITE(sc, SUNXI_TCON0_BASIC3_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

533

val = 0;

sys/arch/arm/sunxi/sunxi_tcon.c

535

val |= SUNXI_TCON0_LVDS_IF_DUALCHAN;

sys/arch/arm/sunxi/sunxi_tcon.c

537

val |= SUNXI_TCON0_LVDS_IF_MODE_JEIDA;

sys/arch/arm/sunxi/sunxi_tcon.c

539

val |= SUNXI_TCON0_LVDS_IF_18BITS;

sys/arch/arm/sunxi/sunxi_tcon.c

540

TCON_WRITE(sc, SUNXI_TCON0_LVDS_IF_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

547

val = 0xf0000000;

sys/arch/arm/sunxi/sunxi_tcon.c

548

val &= ~SUNXI_TCON0_DCLK_DIV;

sys/arch/arm/sunxi/sunxi_tcon.c

549

val |= __SHIFTIN(best_div, SUNXI_TCON0_DCLK_DIV);

sys/arch/arm/sunxi/sunxi_tcon.c

550

TCON_WRITE(sc, SUNXI_TCON0_DCLK_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

571

val = TCON_READ(sc, SUNXI_TCON_LVDS_ANA0);

sys/arch/arm/sunxi/sunxi_tcon.c

572

val |= 0x3F310000;

sys/arch/arm/sunxi/sunxi_tcon.c

573

TCON_WRITE(sc, SUNXI_TCON_LVDS_ANA0, val);

sys/arch/arm/sunxi/sunxi_tcon.c

574

val = TCON_READ(sc, SUNXI_TCON_LVDS_ANA0);

sys/arch/arm/sunxi/sunxi_tcon.c

575

val |= 1 << 22;

sys/arch/arm/sunxi/sunxi_tcon.c

576

TCON_WRITE(sc, SUNXI_TCON_LVDS_ANA0, val);

sys/arch/arm/sunxi/sunxi_tcon.c

578

val = TCON_READ(sc, SUNXI_TCON_LVDS_ANA1);

sys/arch/arm/sunxi/sunxi_tcon.c

579

val |= (0x1f << 26 | 0x1f << 10);

sys/arch/arm/sunxi/sunxi_tcon.c

580

TCON_WRITE(sc, SUNXI_TCON_LVDS_ANA1, val);

sys/arch/arm/sunxi/sunxi_tcon.c

582

val = TCON_READ(sc, SUNXI_TCON_LVDS_ANA1);

sys/arch/arm/sunxi/sunxi_tcon.c

583

val |= (0x1f << 16 | 0x1f << 0);

sys/arch/arm/sunxi/sunxi_tcon.c

584

TCON_WRITE(sc, SUNXI_TCON_LVDS_ANA1, val);

sys/arch/arm/sunxi/sunxi_tcon.c

585

val = TCON_READ(sc, SUNXI_TCON_LVDS_ANA0);

sys/arch/arm/sunxi/sunxi_tcon.c

586

val |= 1 << 22;

sys/arch/arm/sunxi/sunxi_tcon.c

587

TCON_WRITE(sc, SUNXI_TCON_LVDS_ANA0, val);

sys/arch/arm/sunxi/sunxi_tcon.c

594

uint32_t val;

sys/arch/arm/sunxi/sunxi_tcon.c

613

val = TCON_READ(sc, SUNXI_TCON_GCTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

614

val |= SUNXI_TCON_GCTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

615

TCON_WRITE(sc, SUNXI_TCON_GCTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

616

val = TCON_READ(sc, SUNXI_TCON0_CTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

617

val |= SUNXI_TCONx_CTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

618

TCON_WRITE(sc, SUNXI_TCON0_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

619

val = TCON_READ(sc, SUNXI_TCON0_LVDS_IF_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

620

val |= SUNXI_TCON0_LVDS_IF_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

621

TCON_WRITE(sc, SUNXI_TCON0_LVDS_IF_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

625

val = TCON_READ(sc, SUNXI_TCON0_LVDS_IF_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

626

val &= ~SUNXI_TCON0_LVDS_IF_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

627

TCON_WRITE(sc, SUNXI_TCON0_LVDS_IF_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

628

val = TCON_READ(sc, SUNXI_TCON0_CTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

629

val &= ~SUNXI_TCONx_CTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

630

TCON_WRITE(sc, SUNXI_TCON0_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

631

val = TCON_READ(sc, SUNXI_TCON_GCTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

632

val &= ~SUNXI_TCON_GCTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

633

TCON_WRITE(sc, SUNXI_TCON_GCTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

649

uint32_t val;

sys/arch/arm/sunxi/sunxi_tcon.c

663

val = TCON_READ(sc, SUNXI_TCON_GCTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

664

val |= SUNXI_TCON_GCTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

665

TCON_WRITE(sc, SUNXI_TCON_GCTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

666

val = TCON_READ(sc, SUNXI_TCON1_CTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

667

val |= SUNXI_TCONx_CTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

668

TCON_WRITE(sc, SUNXI_TCON1_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

675

val = TCON_READ(sc, SUNXI_TCON1_CTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

676

val &= ~SUNXI_TCONx_CTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

677

TCON_WRITE(sc, SUNXI_TCON1_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

678

val = TCON_READ(sc, SUNXI_TCON_GCTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

679

val &= ~SUNXI_TCON_GCTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

680

TCON_WRITE(sc, SUNXI_TCON_GCTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

689

val = bus_space_read_4(sc->sc_bst, tcon_mux_bsh, 0);

sys/arch/arm/sunxi/sunxi_tcon.c

691

printf("sunxi_tcon1_enable(%d) %d val 0x%x", sc->sc_unit, enable, val);

sys/arch/arm/sunxi/sunxi_tcon.c

693

val &= ~ SUNXI_TCON_MUX_CTL_HDMI_OUTPUT_SRC;

sys/arch/arm/sunxi/sunxi_tcon.c

696

val |= __SHIFTIN(SUNXI_TCON_MUX_CTL_HDMI_OUTPUT_SRC_LCDC0_TCON1,

sys/arch/arm/sunxi/sunxi_tcon.c

700

val |= __SHIFTIN(SUNXI_TCON_MUX_CTL_HDMI_OUTPUT_SRC_LCDC1_TCON1,

sys/arch/arm/sunxi/sunxi_tcon.c

707

printf(" -> 0x%x", val);

sys/arch/arm/sunxi/sunxi_tcon.c

709

bus_space_write_4(sc->sc_bst, tcon_mux_bsh, 0, val);

sys/arch/arm/sunxi/sunxi_tcon.c

722

uint32_t val;

sys/arch/arm/sunxi/sunxi_tcon.c

743

val = TCON_READ(sc, SUNXI_TCON_GCTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

744

val |= SUNXI_TCON_GCTL_IO_MAP_SEL;

sys/arch/arm/sunxi/sunxi_tcon.c

745

TCON_WRITE(sc, SUNXI_TCON_GCTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

748

val = SUNXI_TCONx_CTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

750

val |= SUNXI_TCONx_CTL_INTERLACE_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

751

val |= __SHIFTIN(start_delay, SUNXI_TCONx_CTL_START_DELAY);

sys/arch/arm/sunxi/sunxi_tcon.c

753

val |= __SHIFTIN(SUNXI_TCONx_CTL_SRC_SEL_BLUEDATA,

sys/arch/arm/sunxi/sunxi_tcon.c

760

val |= __SHIFTIN(SUNXI_TCONx_CTL_SRC_SEL_DE0,

sys/arch/arm/sunxi/sunxi_tcon.c

763

TCON_WRITE(sc, SUNXI_TCON1_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

795

val = SUNXI_TCON_IO_POL_IO2_INV;

sys/arch/arm/sunxi/sunxi_tcon.c

797

val |= SUNXI_TCON_IO_POL_PHSYNC;

sys/arch/arm/sunxi/sunxi_tcon.c

799

val |= SUNXI_TCON_IO_POL_PVSYNC;

sys/arch/arm/sunxi/sunxi_tcon.c

800

TCON_WRITE(sc, SUNXI_TCON1_IO_POL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

820

val = TCON_READ(sc, SUNXI_TCON1_CTL_REG);

sys/arch/arm/sunxi/sunxi_tcon.c

821

val &= ~SUNXI_TCONx_CTL_EN;

sys/arch/arm/sunxi/sunxi_tcon.c

822

TCON_WRITE(sc, SUNXI_TCON1_CTL_REG, val);

sys/arch/arm/sunxi/sunxi_tcon.c

93

#define TCON_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_tcon.c

94

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_thermal.c

161

a83t_to_temp(u_int sensor, uint32_t val)

sys/arch/arm/sunxi/sunxi_thermal.c

163

return ((A83T_TEMP_BASE - (val * A83T_TEMP_MUL)) / A83T_TEMP_DIV);

sys/arch/arm/sunxi/sunxi_thermal.c

193

a64_to_temp(u_int sensor, uint32_t val)

sys/arch/arm/sunxi/sunxi_thermal.c

195

return ((A64_TEMP_BASE - (val * A64_TEMP_MUL)) / A64_TEMP_DIV);

sys/arch/arm/sunxi/sunxi_thermal.c

222

h3_to_temp(u_int sensor, uint32_t val)

sys/arch/arm/sunxi/sunxi_thermal.c

224

return (H3_TEMP_BASE - ((val * H3_TEMP_MUL) / H3_TEMP_DIV));

sys/arch/arm/sunxi/sunxi_thermal.c

228

h3_to_reg(u_int sensor, int val)

sys/arch/arm/sunxi/sunxi_thermal.c

230

return ((H3_TEMP_MINUS - (val * H3_TEMP_DIV)) / H3_TEMP_MUL);

sys/arch/arm/sunxi/sunxi_thermal.c

253

h5_to_temp(u_int sensor, uint32_t val)

sys/arch/arm/sunxi/sunxi_thermal.c

257

if (val >= 0x500) {

sys/arch/arm/sunxi/sunxi_thermal.c

265

return (base - val * mul) >> H5_TEMP_DIV;

sys/arch/arm/sunxi/sunxi_thermal.c

269

h5_to_reg(u_int sensor, int val)

sys/arch/arm/sunxi/sunxi_thermal.c

273

if (val <= 70) {

sys/arch/arm/sunxi/sunxi_thermal.c

281

return (base - (val << H5_TEMP_DIV)) / mul;

sys/arch/arm/sunxi/sunxi_thermal.c

340

#define WR4(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_thermal.c

341

bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_thermal.c

386

uint32_t val;

sys/arch/arm/sunxi/sunxi_thermal.c

388

val = RD4(sc, THS_DATA0 + (sensor * 4));

sys/arch/arm/sunxi/sunxi_thermal.c

390

return sc->conf->to_temp(sensor, val);

sys/arch/arm/sunxi/sunxi_thermal.c

396

uint32_t val;

sys/arch/arm/sunxi/sunxi_thermal.c

398

val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4));

sys/arch/arm/sunxi/sunxi_thermal.c

399

val = (val >> SHUT_T_HOT_SHIFT) & SHUT_T_HOT_MASK;

sys/arch/arm/sunxi/sunxi_thermal.c

401

return sc->conf->to_temp(sensor, val);

sys/arch/arm/sunxi/sunxi_thermal.c

407

uint32_t val;

sys/arch/arm/sunxi/sunxi_thermal.c

409

val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4));

sys/arch/arm/sunxi/sunxi_thermal.c

410

val &= ~(SHUT_T_HOT_MASK << SHUT_T_HOT_SHIFT);

sys/arch/arm/sunxi/sunxi_thermal.c

411

val |= (sc->conf->to_reg(sensor, temp) << SHUT_T_HOT_SHIFT);

sys/arch/arm/sunxi/sunxi_thermal.c

412

WR4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4), val);

sys/arch/arm/sunxi/sunxi_thermal.c

418

uint32_t val;

sys/arch/arm/sunxi/sunxi_thermal.c

420

val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));

sys/arch/arm/sunxi/sunxi_thermal.c

421

val = (val >> ALARM_T_HYST_SHIFT) & ALARM_T_HYST_MASK;

sys/arch/arm/sunxi/sunxi_thermal.c

423

return sc->conf->to_temp(sensor, val);

sys/arch/arm/sunxi/sunxi_thermal.c

429

uint32_t val;

sys/arch/arm/sunxi/sunxi_thermal.c

431

val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));

sys/arch/arm/sunxi/sunxi_thermal.c

432

val = (val >> ALARM_T_HOT_SHIFT) & ALARM_T_HOT_MASK;

sys/arch/arm/sunxi/sunxi_thermal.c

434

return sc->conf->to_temp(sensor, val);

sys/arch/arm/sunxi/sunxi_thermal.c

440

uint32_t val;

sys/arch/arm/sunxi/sunxi_thermal.c

442

val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));

sys/arch/arm/sunxi/sunxi_thermal.c

443

val &= ~(ALARM_T_HOT_MASK << ALARM_T_HOT_SHIFT);

sys/arch/arm/sunxi/sunxi_thermal.c

444

val |= (sc->conf->to_reg(sensor, temp) << ALARM_T_HOT_SHIFT);

sys/arch/arm/sunxi/sunxi_thermal.c

445

WR4(sc, THS_ALARM0_CTRL + (sensor * 4), val);

sys/arch/arm/sunxi/sunxi_timer.c

112

#define TIMER_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_timer.c

113

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_ts.c

178

#define TS_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_ts.c

179

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_ts.c

185

uint32_t val;

sys/arch/arm/sunxi/sunxi_ts.c

194

val = TS_READ(sc, TP_INT);

sys/arch/arm/sunxi/sunxi_ts.c

195

val |= TP_INT_DATA_IRQ_EN | TP_INT_FIFO_FLUSH | TP_INT_UP_IRQ_EN;

sys/arch/arm/sunxi/sunxi_ts.c

196

val &= ~TP_INT_FIFO_TRIG_LEVEL;

sys/arch/arm/sunxi/sunxi_ts.c

197

val |= __SHIFTIN(1, TP_INT_FIFO_TRIG_LEVEL);

sys/arch/arm/sunxi/sunxi_ts.c

198

TS_WRITE(sc, TP_INT, val);

sys/arch/arm/sunxi/sunxi_ts.c

207

uint32_t val;

sys/arch/arm/sunxi/sunxi_ts.c

210

val = TS_READ(sc, TP_INT);

sys/arch/arm/sunxi/sunxi_ts.c

211

val &= ~(TP_INT_DATA_IRQ_EN | TP_INT_FIFO_FLUSH | TP_INT_UP_IRQ_EN);

sys/arch/arm/sunxi/sunxi_ts.c

212

TS_WRITE(sc, TP_INT, val);

sys/arch/arm/sunxi/sunxi_usb3phy.c

116

uint32_t val;

sys/arch/arm/sunxi/sunxi_usb3phy.c

119

val = PHY_READ(phy, SUNXI_PHY_EXTERNAL_CONTROL);

sys/arch/arm/sunxi/sunxi_usb3phy.c

120

val |= PEC_EXTERN_VBUS;

sys/arch/arm/sunxi/sunxi_usb3phy.c

121

val |= PEC_SSC_EN;

sys/arch/arm/sunxi/sunxi_usb3phy.c

122

val |= PEC_REF_SSP_EN;

sys/arch/arm/sunxi/sunxi_usb3phy.c

123

PHY_WRITE(phy, SUNXI_PHY_EXTERNAL_CONTROL, val);

sys/arch/arm/sunxi/sunxi_usb3phy.c

125

val = PHY_READ(phy, SUNXI_PIPE_CLOCK_CONTROL);

sys/arch/arm/sunxi/sunxi_usb3phy.c

126

val |= PCC_PIPE_CLK_OPEN;

sys/arch/arm/sunxi/sunxi_usb3phy.c

127

PHY_WRITE(phy, SUNXI_PIPE_CLOCK_CONTROL, val);

sys/arch/arm/sunxi/sunxi_usb3phy.c

129

val = PHY_READ(phy, SUNXI_APP);

sys/arch/arm/sunxi/sunxi_usb3phy.c

130

val |= APP_FORCE_VBUS;

sys/arch/arm/sunxi/sunxi_usb3phy.c

131

PHY_WRITE(phy, SUNXI_APP, val);

sys/arch/arm/sunxi/sunxi_usb3phy.c

135

val = PHY_READ(phy, SUNXI_PHY_TUNE_HIGH);

sys/arch/arm/sunxi/sunxi_usb3phy.c

136

val |= PTH_TX_BOOST_LVL;

sys/arch/arm/sunxi/sunxi_usb3phy.c

137

val |= PTH_LOS_BIAS;

sys/arch/arm/sunxi/sunxi_usb3phy.c

138

val &= ~PTH_TX_SWING_FULL;

sys/arch/arm/sunxi/sunxi_usb3phy.c

139

val |= __SHIFTIN(0x55, PTH_TX_SWING_FULL);

sys/arch/arm/sunxi/sunxi_usb3phy.c

140

val &= ~PTH_TX_DEEMPH_6DB;

sys/arch/arm/sunxi/sunxi_usb3phy.c

141

val |= __SHIFTIN(0x20, PTH_TX_DEEMPH_6DB);

sys/arch/arm/sunxi/sunxi_usb3phy.c

142

val &= ~PTH_TX_DEEMPH_3P5DB;

sys/arch/arm/sunxi/sunxi_usb3phy.c

143

val |= __SHIFTIN(0x15, PTH_TX_DEEMPH_3P5DB);

sys/arch/arm/sunxi/sunxi_usb3phy.c

144

PHY_WRITE(phy, SUNXI_PHY_TUNE_HIGH, val);

sys/arch/arm/sunxi/sunxi_usb3phy.c

93

#define PHY_WRITE(phy, reg, val) \

sys/arch/arm/sunxi/sunxi_usb3phy.c

94

bus_space_write_4((phy)->phy_bst, (phy)->phy_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_usbphy.c

126

#define PHYCTL_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_usbphy.c

128

(sc)->sc_bsh_phy_ctrl, (reg), (val))

sys/arch/arm/sunxi/sunxi_usbphy.c

132

#define PMU_WRITE(sc, id, reg, val) \

sys/arch/arm/sunxi/sunxi_usbphy.c

134

(sc)->sc_phys[(id)].phy_bsh, (reg), (val))

sys/arch/arm/sunxi/sunxi_usbphy.c

146

uint32_t val;

sys/arch/arm/sunxi/sunxi_usbphy.c

170

val = PHYCTL_READ(sc, reg);

sys/arch/arm/sunxi/sunxi_usbphy.c

171

val &= ~PHYCTL_ADDR;

sys/arch/arm/sunxi/sunxi_usbphy.c

172

val |= __SHIFTIN(bit_addr, PHYCTL_ADDR);

sys/arch/arm/sunxi/sunxi_usbphy.c

173

PHYCTL_WRITE(sc, reg, val);

sys/arch/arm/sunxi/sunxi_usbphy.c

175

val = PHYCTL_READ(sc, reg);

sys/arch/arm/sunxi/sunxi_usbphy.c

176

val &= ~PHYCTL_DATA;

sys/arch/arm/sunxi/sunxi_usbphy.c

177

val |= __SHIFTIN(bits & 1, PHYCTL_DATA);

sys/arch/arm/sunxi/sunxi_usbphy.c

178

PHYCTL_WRITE(sc, reg, val);

sys/arch/arm/sunxi/sunxi_usbphy.c

181

val |= usbc_mask;

sys/arch/arm/sunxi/sunxi_usbphy.c

182

PHYCTL_WRITE(sc, reg, val);

sys/arch/arm/sunxi/sunxi_usbphy.c

185

val &= ~usbc_mask;

sys/arch/arm/sunxi/sunxi_usbphy.c

186

PHYCTL_WRITE(sc, reg, val);

sys/arch/arm/sunxi/sunxi_usbphy.c

225

uint32_t val;

sys/arch/arm/sunxi/sunxi_usbphy.c

258

val = PMU_READ(sc, phy->phy_index, PMU_CFG);

sys/arch/arm/sunxi/sunxi_usbphy.c

260

val |= mask;

sys/arch/arm/sunxi/sunxi_usbphy.c

262

val &= ~mask;

sys/arch/arm/sunxi/sunxi_usbphy.c

263

PMU_WRITE(sc, phy->phy_index, PMU_CFG, val);

sys/arch/arm/sunxi/sunxi_usbphy.c

270

val = PMU_READ(sc, phy->phy_index, PMU_UNK_H3);

sys/arch/arm/sunxi/sunxi_usbphy.c

271

val &= ~PMU_UNK_H3_CLR;

sys/arch/arm/sunxi/sunxi_usbphy.c

272

PMU_WRITE(sc, phy->phy_index, PMU_UNK_H3, val);

sys/arch/arm/sunxi/sunxi_usbphy.c

296

val = PHYCTL_READ(sc, PHYCTL_ICR);

sys/arch/arm/sunxi/sunxi_usbphy.c

299

val |= mask;

sys/arch/arm/sunxi/sunxi_usbphy.c

301

val &= ~mask;

sys/arch/arm/sunxi/sunxi_usbphy.c

304

val &= ~PHYCTL_ICR_FORCE_ID;

sys/arch/arm/sunxi/sunxi_usbphy.c

305

val |= __SHIFTIN(PHYCTL_ICR_FORCE_ID_LOW, PHYCTL_ICR_FORCE_ID);

sys/arch/arm/sunxi/sunxi_usbphy.c

306

val &= ~PHYCTL_ICR_FORCE_VBUS;

sys/arch/arm/sunxi/sunxi_usbphy.c

307

val |= __SHIFTIN(PHYCTL_ICR_FORCE_VBUS_HIGH, PHYCTL_ICR_FORCE_VBUS);

sys/arch/arm/sunxi/sunxi_usbphy.c

309

PHYCTL_WRITE(sc, PHYCTL_ICR, val);

sys/arch/arm/sunxi/sunxi_usbphy.c

312

val = PHYCTL_READ(sc, PHYCTL_OTG_CFG);

sys/arch/arm/sunxi/sunxi_usbphy.c

313

val &= ~PHYCTL_OTG_ROUTE_OTG;

sys/arch/arm/sunxi/sunxi_usbphy.c

314

PHYCTL_WRITE(sc, PHYCTL_OTG_CFG, val);

sys/arch/arm/sunxi/sunxi_wdt.c

106

#define WDT_WRITE(sc, reg, val) \

sys/arch/arm/sunxi/sunxi_wdt.c

107

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/am18xx_intc.c

84

#define INTC_WRITE(sc, reg, val) \

sys/arch/arm/ti/am18xx_intc.c

85

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, reg, val)

sys/arch/arm/ti/am18xx_pllc.c

100

#define PLLC_WRITE(sc, reg, val) \

sys/arch/arm/ti/am18xx_pllc.c

101

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, reg, val)

sys/arch/arm/ti/am18xx_psc.c

103

#define PSC_WRITE(sc, reg, val) \

sys/arch/arm/ti/am18xx_psc.c

104

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, reg, val)

sys/arch/arm/ti/am18xx_timer.c

72

#define TIMER_WRITE(sc, reg, val) \

sys/arch/arm/ti/am18xx_timer.c

73

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, reg, val)

sys/arch/arm/ti/am18xx_usbphy.c

120

uint32_t val;

sys/arch/arm/ti/am18xx_usbphy.c

133

val = syscon_read_4(sc->sc_syscon, AM18XX_CFGCHIP2);

sys/arch/arm/ti/am18xx_usbphy.c

136

val &= (~phy->phy_suspend_mask);

sys/arch/arm/ti/am18xx_usbphy.c

139

val |= phy->phy_suspend_mask & (~phy->phy_suspend_bits);

sys/arch/arm/ti/am18xx_usbphy.c

142

syscon_write_4(sc->sc_syscon, AM18XX_CFGCHIP2, val);

sys/arch/arm/ti/am18xx_usbphy.c

148

val = syscon_read_4(sc->sc_syscon, AM18XX_CFGCHIP2);

sys/arch/arm/ti/am18xx_usbphy.c

151

val &= (~phy->phy_suspend_mask);

sys/arch/arm/ti/am18xx_usbphy.c

154

val |= phy->phy_suspend_bits;

sys/arch/arm/ti/am18xx_usbphy.c

157

syscon_write_4(sc->sc_syscon, AM18XX_CFGCHIP2, val);

sys/arch/arm/ti/am18xx_usbphyclk.c

156

uint32_t val = syscon_read_4(sc->sc_syscon, AM18XX_CFGCHIP2);

sys/arch/arm/ti/am18xx_usbphyclk.c

157

val &= ~mask;

sys/arch/arm/ti/am18xx_usbphyclk.c

158

val |= mask & update;

sys/arch/arm/ti/am18xx_usbphyclk.c

159

syscon_write_4(sc->sc_syscon, AM18XX_CFGCHIP2, val);

sys/arch/arm/ti/am18xx_usbphyclk.c

390

uint32_t val = syscon_read_4(sc->sc_syscon, AM18XX_CFGCHIP2);

sys/arch/arm/ti/am18xx_usbphyclk.c

391

val &= ~AM18XX_CFGCHIP2_PHYREFFREQ;

sys/arch/arm/ti/am18xx_usbphyclk.c

392

val |= rate_val;

sys/arch/arm/ti/am18xx_usbphyclk.c

393

syscon_write_4(sc->sc_syscon, AM18XX_CFGCHIP2, val);

sys/arch/arm/ti/am3_prcm.c

103

val = PRCM_READ(sc, AM3_PRCM_CM_IDLEST_DPLL_DISP);

sys/arch/arm/ti/am3_prcm.c

104

if ((val & AM3_PRCM_CM_IDLEST_DPLL_DISP_ST_MN_BYPASS) != 0)

sys/arch/arm/ti/am3_prcm.c

110

val = __SHIFTIN(DPLL_DISP_RATE / 1000000, AM3_PRCM_CM_CLKSEL_DPLL_DISP_DPLL_MULT);

sys/arch/arm/ti/am3_prcm.c

111

val |= __SHIFTIN(24 - 1, AM3_PRCM_CM_CLKSEL_DPLL_DISP_DPLL_DIV);

sys/arch/arm/ti/am3_prcm.c

112

PRCM_WRITE(sc, AM3_PRCM_CM_CLKSEL_DPLL_DISP, val);

sys/arch/arm/ti/am3_prcm.c

119

val = PRCM_READ(sc, AM3_PRCM_CM_IDLEST_DPLL_DISP);

sys/arch/arm/ti/am3_prcm.c

120

if ((val & AM3_PRCM_CM_IDLEST_DPLL_DISP_ST_DPLL_CLK) != 0)

sys/arch/arm/ti/am3_prcm.c

79

uint32_t val;

sys/arch/arm/ti/am3_prcm.c

81

val = PRCM_READ(sc, tc->u.hwmod.reg);

sys/arch/arm/ti/am3_prcm.c

82

val &= ~AM3_PRCM_CLKCTRL_MODULEMODE;

sys/arch/arm/ti/am3_prcm.c

84

val |= __SHIFTIN(AM3_PRCM_CLKCTRL_MODULEMODE_ENABLE,

sys/arch/arm/ti/am3_prcm.c

86

PRCM_WRITE(sc, tc->u.hwmod.reg, val);

sys/arch/arm/ti/am3_prcm.c

94

uint32_t val;

sys/arch/arm/ti/if_cpsw.c

1425

cpsw_ale_entry_set(uint32_t *ale_entry, ale_entry_field_t field, uint32_t val)

sys/arch/arm/ti/if_cpsw.c

1431

ale_entry[1] |= (val & 0x3) << 28;

sys/arch/arm/ti/if_cpsw.c

1435

ale_entry[1] |= (val & 0x3) << 30;

sys/arch/arm/ti/if_cpsw.c

1439

ale_entry[2] |= (val & 0x7) << 2;

sys/arch/arm/ti/if_cpsw.c

1443

ale_entry[2] |= (val & 0x3) << 2;

sys/arch/arm/ti/if_cpsw.c

784

cpsw_mii_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/arch/arm/ti/if_cpsw.c

800

*val = v & 0xffff;

sys/arch/arm/ti/if_cpsw.c

808

cpsw_mii_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/arch/arm/ti/if_cpsw.c

813

KASSERT((val & 0xffff0000UL) == 0);

sys/arch/arm/ti/if_cpsw.c

819

((reg & 0x1F) << 21) | ((phy & 0x1F) << 16) | val);

sys/arch/arm/ti/if_cpswreg.h

163

#define MDIOCTL_HIGHEST_USER_CHANNEL(val) ((0xf & (val)) << 24)

sys/arch/arm/ti/if_cpswreg.h

168

#define MDIOCTL_CLKDIV(val) (0xff & (val))

sys/arch/arm/ti/if_cpswreg.h

189

#define GMIISEL_GMII2_SEL(val) ((0x3 & (val)) << 2)

sys/arch/arm/ti/if_cpswreg.h

190

#define GMIISEL_GMII1_SEL(val) ((0x3 & (val)) << 0)

sys/arch/arm/ti/omap2_nand.c

201

uint32_t val;

sys/arch/arm/ti/omap2_nand.c

238

val = gpmc_register_read(sc, GPMC_CONFIG);

sys/arch/arm/ti/omap2_nand.c

239

val |= NAND_WP_BIT;

sys/arch/arm/ti/omap2_nand.c

240

gpmc_register_write(sc, GPMC_CONFIG, val);

sys/arch/arm/ti/omap2_nand.c

251

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GPMC_CONFIG1_i);

sys/arch/arm/ti/omap2_nand.c

253

if ((val & DEVICESIZE) == MASKEDINT(DEVICESIZE, 0x01)) {

sys/arch/arm/ti/omap2_nand.c

256

} else if ((val & DEVICESIZE) == MASKEDINT(DEVICESIZE, 0x00)) {

sys/arch/arm/ti/omap2_nand.c

425

uint32_t val;

sys/arch/arm/ti/omap2_nand.c

427

val = gpmc_register_read(sc, GPMC_ECC_CONTROL);

sys/arch/arm/ti/omap2_nand.c

429

val &= ~ECCPOINTER;

sys/arch/arm/ti/omap2_nand.c

430

val |= ECCCLEAR | MASKEDINT(ECCPOINTER, 1);

sys/arch/arm/ti/omap2_nand.c

431

gpmc_register_write(sc, GPMC_ECC_CONTROL, val);

sys/arch/arm/ti/omap2_nand.c

435

val = gpmc_register_read(sc, GPMC_ECC_SIZE_CONFIG);

sys/arch/arm/ti/omap2_nand.c

436

val &= ~ECCSIZE1;

sys/arch/arm/ti/omap2_nand.c

437

val |= MASKEDINT(ECCSIZE1, 512) | 0x0f;

sys/arch/arm/ti/omap2_nand.c

438

gpmc_register_write(sc, GPMC_ECC_CONTROL, val);

sys/arch/arm/ti/omap2_nand.c

447

uint32_t val;

sys/arch/arm/ti/omap2_nand.c

450

val = gpmc_register_read(sc, GPMC_ECC1_RESULT);

sys/arch/arm/ti/omap2_nand.c

452

ecc[0] = val & 0xff;

sys/arch/arm/ti/omap2_nand.c

453

ecc[1] = (val >> 16) & 0xff;

sys/arch/arm/ti/omap2_nand.c

454

ecc[2] = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0);

sys/arch/arm/ti/omap2_nand.c

457

val = gpmc_register_read(sc, GPMC_ECC_CONFIG);

sys/arch/arm/ti/omap2_nand.c

458

val &= ~ECCENABLE;

sys/arch/arm/ti/omap2_nand.c

459

gpmc_register_write(sc, GPMC_ECC_CONFIG, val);

sys/arch/arm/ti/omap2_nand.c

468

uint32_t val;

sys/arch/arm/ti/omap2_nand.c

474

val = gpmc_register_read(sc, GPMC_ECC_CONTROL);

sys/arch/arm/ti/omap2_nand.c

476

val &= ~ECCPOINTER;

sys/arch/arm/ti/omap2_nand.c

477

val |= ECCCLEAR | MASKEDINT(ECCPOINTER, 1);

sys/arch/arm/ti/omap2_nand.c

478

gpmc_register_write(sc, GPMC_ECC_CONTROL, val);

sys/arch/arm/ti/omap2_nand.c

480

val = gpmc_register_read(sc, GPMC_ECC_CONFIG);

sys/arch/arm/ti/omap2_nand.c

481

val &= ~ECCCS;

sys/arch/arm/ti/omap2_nand.c

482

val |= ECCENABLE | MASKEDINT(ECCCS, sc->sc_cs);

sys/arch/arm/ti/omap2_nand.c

484

val |= ECC16B;

sys/arch/arm/ti/omap2_nand.c

486

val &= ~ECC16B;

sys/arch/arm/ti/omap2_nand.c

487

gpmc_register_write(sc, GPMC_ECC_CONFIG, val);

sys/arch/arm/ti/omap3_cm.c

172

uint32_t val;

sys/arch/arm/ti/omap3_cm.c

175

val = PRCM_READ(sc, CM_PER_BASE + CM_CLKSEL);

sys/arch/arm/ti/omap3_cm.c

176

val |= __BIT(0); /* CLKSEL_GPT2 0x1: source is SYS_CLK */

sys/arch/arm/ti/omap3_cm.c

177

val |= __BIT(1); /* CLKSEL_GPT3 0x1: source is SYS_CLK */

sys/arch/arm/ti/omap3_cm.c

178

PRCM_WRITE(sc, CM_PER_BASE + CM_CLKSEL, val);

sys/arch/arm/ti/omap3_cm.c

66

uint32_t val;

sys/arch/arm/ti/omap3_cm.c

68

val = PRCM_READ(sc, tc->u.hwmod.reg + CM_FCLKEN);

sys/arch/arm/ti/omap3_cm.c

70

val |= tc->u.hwmod.mask;

sys/arch/arm/ti/omap3_cm.c

72

val &= ~tc->u.hwmod.mask;

sys/arch/arm/ti/omap3_cm.c

73

PRCM_WRITE(sc, tc->u.hwmod.reg + CM_FCLKEN, val);

sys/arch/arm/ti/omap3_cm.c

75

val = PRCM_READ(sc, tc->u.hwmod.reg + CM_ICLKEN);

sys/arch/arm/ti/omap3_cm.c

77

val |= tc->u.hwmod.mask;

sys/arch/arm/ti/omap3_cm.c

79

val &= ~tc->u.hwmod.mask;

sys/arch/arm/ti/omap3_cm.c

80

PRCM_WRITE(sc, tc->u.hwmod.reg + CM_ICLKEN, val);

sys/arch/arm/ti/omap3_cm.c

83

val = PRCM_READ(sc, tc->u.hwmod.reg + CM_AUTOIDLE);

sys/arch/arm/ti/omap3_cm.c

84

val &= ~tc->u.hwmod.mask;

sys/arch/arm/ti/omap3_cm.c

85

PRCM_WRITE(sc, tc->u.hwmod.reg + CM_AUTOIDLE, val);

sys/arch/arm/ti/omap3_dss.c

1196

uint32_t val;

sys/arch/arm/ti/omap3_dss.c

1199

val = (cur->cmap.red[i] << 16 ) |

sys/arch/arm/ti/omap3_dss.c

1203

sc->sc_cursor_cmap[i + cur->cmap.index + 2] = val;

sys/arch/arm/ti/omap3_platform.c

361

uint32_t val;

sys/arch/arm/ti/omap3_platform.c

371

val = bus_space_read_4(bst, scu_bsh, SCU_DIAG_CONTROL);

sys/arch/arm/ti/omap3_platform.c

372

val |= SCU_DIAG_DISABLE_MIGBIT;

sys/arch/arm/ti/omap3_platform.c

373

bus_space_write_4(bst, scu_bsh, SCU_DIAG_CONTROL, val);

sys/arch/arm/ti/omap3_platform.c

375

val = bus_space_read_4(bst, scu_bsh, SCU_CTL);

sys/arch/arm/ti/omap3_platform.c

376

val |= SCU_CTL_SCU_ENA;

sys/arch/arm/ti/omap3_platform.c

377

bus_space_write_4(bst, scu_bsh, SCU_CTL, val);

sys/arch/arm/ti/omap3_platform.c

388

val = bus_space_read_4(bst, wugen_bsh, OMAP4_AUX_CORE_BOOT0);

sys/arch/arm/ti/omap3_platform.c

389

val |= __SHIFTIN(0xf, i * 4);

sys/arch/arm/ti/omap3_platform.c

390

bus_space_write_4(bst, wugen_bsh, OMAP4_AUX_CORE_BOOT0, val);

sys/arch/arm/ti/omap4_prcm.c

107

uint32_t val;

sys/arch/arm/ti/omap4_prcm.c

110

val = PRCM_READ(sc, tc->u.hwmod.reg);

sys/arch/arm/ti/omap4_prcm.c

111

val &= ~CLKCTRL_MODULEMODE;

sys/arch/arm/ti/omap4_prcm.c

113

val |= __SHIFTIN(CLKCTRL_MODULEMODE_AUTO,

sys/arch/arm/ti/omap4_prcm.c

116

val |= __SHIFTIN(CLKCTRL_MODULEMODE_DISABLE,

sys/arch/arm/ti/omap4_prcm.c

118

PRCM_WRITE(sc, tc->u.hwmod.reg, val);

sys/arch/arm/ti/omap4_prcm.c

121

val = PRCM_READ(sc, tc->u.hwmod.reg);

sys/arch/arm/ti/omap4_prcm.c

122

if ((val & CLKCTRL_IDLEST) == CLKCTRL_IDLEST_ENABLE)

sys/arch/arm/ti/omap4_prcm.c

81

uint32_t val;

sys/arch/arm/ti/omap4_prcm.c

84

val = PRCM_READ(sc, tc->u.hwmod.reg);

sys/arch/arm/ti/omap4_prcm.c

85

val &= ~CLKCTRL_MODULEMODE;

sys/arch/arm/ti/omap4_prcm.c

87

val |= __SHIFTIN(CLKCTRL_MODULEMODE_ENABLE,

sys/arch/arm/ti/omap4_prcm.c

90

val |= __SHIFTIN(CLKCTRL_MODULEMODE_DISABLE,

sys/arch/arm/ti/omap4_prcm.c

92

PRCM_WRITE(sc, tc->u.hwmod.reg, val);

sys/arch/arm/ti/omap4_prcm.c

95

val = PRCM_READ(sc, tc->u.hwmod.reg);

sys/arch/arm/ti/omap4_prcm.c

96

if ((val & CLKCTRL_IDLEST) == CLKCTRL_IDLEST_ENABLE)

sys/arch/arm/ti/ti_comp_clock.c

80

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_comp_clock.c

81

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/ti_div_clock.c

170

uint32_t val, max_val, mask;

sys/arch/arm/ti/ti_div_clock.c

197

val = RD4(sc);

sys/arch/arm/ti/ti_div_clock.c

198

div = __SHIFTOUT(val, mask) + (start_index ? 0 : 1);

sys/arch/arm/ti/ti_div_clock.c

83

#define WR4(sc, val) \

sys/arch/arm/ti/ti_div_clock.c

84

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, 0, (val))

sys/arch/arm/ti/ti_dpll_clock.c

160

#define WR4(sc, space, val) \

sys/arch/arm/ti/ti_dpll_clock.c

161

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh[(space)], 0, (val))

sys/arch/arm/ti/ti_dpll_clock.c

252

uint32_t val;

sys/arch/arm/ti/ti_dpll_clock.c

258

val = RD4(sc, REG_MULT_DIV1);

sys/arch/arm/ti/ti_dpll_clock.c

259

const u_int mult = __SHIFTOUT(val, DPLL_MULT);

sys/arch/arm/ti/ti_dpll_clock.c

260

const u_int div = __SHIFTOUT(val, DPLL_DIV) + 1;

sys/arch/arm/ti/ti_dpll_clock.c

362

uint32_t val;

sys/arch/arm/ti/ti_dpll_clock.c

368

val = RD4(sc, REG_MULT_DIV1);

sys/arch/arm/ti/ti_dpll_clock.c

369

const u_int mult = __SHIFTOUT(val, OMAP3_CORE_DPLL_MULT);

sys/arch/arm/ti/ti_dpll_clock.c

370

const u_int div = __SHIFTOUT(val, OMAP3_CORE_DPLL_DIV) + 1;

sys/arch/arm/ti/ti_dpll_clock.c

371

const u_int postdiv = __SHIFTOUT(val, OMAP3_CORE_DPLL_CLKOUT_DIV);

sys/arch/arm/ti/ti_dpll_clock.c

383

uint32_t val;

sys/arch/arm/ti/ti_dpll_clock.c

389

val = RD4(sc, REG_MULT_DIV1);

sys/arch/arm/ti/ti_dpll_clock.c

390

const u_int mult = __SHIFTOUT(val, DPLL_MULT);

sys/arch/arm/ti/ti_dpll_clock.c

391

const u_int div = __SHIFTOUT(val, DPLL_DIV) + 1;

sys/arch/arm/ti/ti_dpll_clock.c

392

const u_int postdiv = __SHIFTOUT(val, DPLL_CLKOUT_DIV);

sys/arch/arm/ti/ti_edma.c

177

uint32_t val;

sys/arch/arm/ti/ti_edma.c

180

val = EDMA_READ(sc, EDMA_CCCFG_REG);

sys/arch/arm/ti/ti_edma.c

181

if (val & EDMA_CCCFG_CHMAP_EXIST) {

sys/arch/arm/ti/ti_edma.c

96

#define EDMA_WRITE(sc, reg, val) \

sys/arch/arm/ti/ti_edma.c

97

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/ti/ti_gate_clock.c

170

uint32_t val;

sys/arch/arm/ti/ti_gate_clock.c

172

val = RD4(sc, 0);

sys/arch/arm/ti/ti_gate_clock.c

173

val |= __BIT(sc->sc_shift);

sys/arch/arm/ti/ti_gate_clock.c

174

WR4(sc, 0, val);

sys/arch/arm/ti/ti_gate_clock.c

184

uint32_t val;

sys/arch/arm/ti/ti_gate_clock.c

186

val = RD4(sc, 0);

sys/arch/arm/ti/ti_gate_clock.c

187

val &= ~__BIT(sc->sc_shift);

sys/arch/arm/ti/ti_gate_clock.c

188

WR4(sc, 0, val);

sys/arch/arm/ti/ti_gate_clock.c

80

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_gate_clock.c

81

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/ti_gpio.c

141

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_gpio.c

142

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, ti_gpio_regmap[(sc)->sc_type][(reg)], (val))

sys/arch/arm/ti/ti_gpio.c

221

int val;

sys/arch/arm/ti/ti_gpio.c

232

val = __SHIFTOUT(data, data_mask);

sys/arch/arm/ti/ti_gpio.c

234

val = !val;

sys/arch/arm/ti/ti_gpio.c

236

return val;

sys/arch/arm/ti/ti_gpio.c

240

ti_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/ti/ti_gpio.c

250

val = !val;

sys/arch/arm/ti/ti_gpio.c

252

const u_int data_reg = val ? GPIO_SETDATAOUT : GPIO_CLEARDATAOUT;

sys/arch/arm/ti/ti_gpio.c

269

uint32_t val;

sys/arch/arm/ti/ti_gpio.c

273

val = RD4(sc, GPIO_IRQENABLE1);

sys/arch/arm/ti/ti_gpio.c

274

WR4(sc, GPIO_IRQENABLE1, val & ~pin_mask);

sys/arch/arm/ti/ti_gpio.c

289

uint32_t val;

sys/arch/arm/ti/ti_gpio.c

322

val = RD4(sc, GPIO_LEVELDETECT0);

sys/arch/arm/ti/ti_gpio.c

324

val |= pin_mask;

sys/arch/arm/ti/ti_gpio.c

326

val &= ~pin_mask;

sys/arch/arm/ti/ti_gpio.c

327

WR4(sc, GPIO_LEVELDETECT0, val);

sys/arch/arm/ti/ti_gpio.c

329

val = RD4(sc, GPIO_LEVELDETECT1);

sys/arch/arm/ti/ti_gpio.c

331

val |= pin_mask;

sys/arch/arm/ti/ti_gpio.c

333

val &= ~pin_mask;

sys/arch/arm/ti/ti_gpio.c

334

WR4(sc, GPIO_LEVELDETECT1, val);

sys/arch/arm/ti/ti_gpio.c

336

val = RD4(sc, GPIO_RISINGDETECT);

sys/arch/arm/ti/ti_gpio.c

338

val |= pin_mask;

sys/arch/arm/ti/ti_gpio.c

340

val &= ~pin_mask;

sys/arch/arm/ti/ti_gpio.c

341

WR4(sc, GPIO_RISINGDETECT, val);

sys/arch/arm/ti/ti_gpio.c

343

val = RD4(sc, GPIO_FALLINGDETECT);

sys/arch/arm/ti/ti_gpio.c

345

val |= pin_mask;

sys/arch/arm/ti/ti_gpio.c

347

val &= ~pin_mask;

sys/arch/arm/ti/ti_gpio.c

348

WR4(sc, GPIO_FALLINGDETECT, val);

sys/arch/arm/ti/ti_gpio.c

352

val = RD4(sc, GPIO_IRQENABLE1);

sys/arch/arm/ti/ti_gpio.c

353

WR4(sc, GPIO_IRQENABLE1, val | pin_mask);

sys/arch/arm/ti/ti_gpio.c

397

int val;

sys/arch/arm/ti/ti_gpio.c

404

val = __SHIFTOUT(data, data_mask);

sys/arch/arm/ti/ti_gpio.c

406

return val;

sys/arch/arm/ti/ti_gpio.c

410

ti_gpio_pin_write(void *priv, int pin, int val)

sys/arch/arm/ti/ti_gpio.c

416

const u_int data_reg = val ? GPIO_SETDATAOUT : GPIO_CLEARDATAOUT;

sys/arch/arm/ti/ti_gpio.c

439

uint32_t val;

sys/arch/arm/ti/ti_gpio.c

470

val = RD4(sc, GPIO_LEVELDETECT0);

sys/arch/arm/ti/ti_gpio.c

472

val |= pin_mask;

sys/arch/arm/ti/ti_gpio.c

474

val &= ~pin_mask;

sys/arch/arm/ti/ti_gpio.c

475

WR4(sc, GPIO_LEVELDETECT0, val);

sys/arch/arm/ti/ti_gpio.c

477

val = RD4(sc, GPIO_LEVELDETECT1);

sys/arch/arm/ti/ti_gpio.c

479

val |= pin_mask;

sys/arch/arm/ti/ti_gpio.c

481

val &= ~pin_mask;

sys/arch/arm/ti/ti_gpio.c

482

WR4(sc, GPIO_LEVELDETECT1, val);

sys/arch/arm/ti/ti_gpio.c

484

val = RD4(sc, GPIO_RISINGDETECT);

sys/arch/arm/ti/ti_gpio.c

487

val |= pin_mask;

sys/arch/arm/ti/ti_gpio.c

489

val &= ~pin_mask;

sys/arch/arm/ti/ti_gpio.c

490

WR4(sc, GPIO_RISINGDETECT, val);

sys/arch/arm/ti/ti_gpio.c

492

val = RD4(sc, GPIO_FALLINGDETECT);

sys/arch/arm/ti/ti_gpio.c

495

val |= pin_mask;

sys/arch/arm/ti/ti_gpio.c

497

val &= ~pin_mask;

sys/arch/arm/ti/ti_gpio.c

498

WR4(sc, GPIO_FALLINGDETECT, val);

sys/arch/arm/ti/ti_gpio.c

502

val = RD4(sc, GPIO_IRQENABLE1);

sys/arch/arm/ti/ti_gpio.c

503

WR4(sc, GPIO_IRQENABLE1, val | pin_mask);

sys/arch/arm/ti/ti_iic.c

194

#define I2C_WRITE_REG(sc, reg, val) \

sys/arch/arm/ti/ti_iic.c

195

bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, ti_iic_regmap[(sc)->sc_type][(reg)], (val))

sys/arch/arm/ti/ti_iic.c

196

#define I2C_WRITE_DATA(sc, val) \

sys/arch/arm/ti/ti_iic.c

197

bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, ti_iic_regmap[(sc)->sc_type][I2C_DATA], (val))

sys/arch/arm/ti/ti_iic.c

637

ti_iic_wait(struct ti_iic_softc *sc, uint16_t mask, uint16_t val, int flags)

sys/arch/arm/ti/ti_iic.c

641

DPRINTF(("ti_iic_wait mask %#x val %#x flags %#x\n", mask, val, flags));

sys/arch/arm/ti/ti_iic.c

643

while (((v = I2C_READ_REG(sc, I2C_IRQSTATUS_RAW)) & mask) != val) {

sys/arch/arm/ti/ti_iic.c

648

mask, val, v);

sys/arch/arm/ti/ti_lcdc.c

161

uint32_t val;

sys/arch/arm/ti/ti_lcdc.c

188

val = CTRL_RASTER_MODE |

sys/arch/arm/ti/ti_lcdc.c

190

WR4(sc, LCD_CTRL, val);

sys/arch/arm/ti/ti_lcdc.c

192

val = RASTER_TIMING_0_HFP(hfp) |

sys/arch/arm/ti/ti_lcdc.c

196

WR4(sc, LCD_RASTER_TIMING_0, val);

sys/arch/arm/ti/ti_lcdc.c

198

val = RASTER_TIMING_1_VFP(vfp) |

sys/arch/arm/ti/ti_lcdc.c

202

WR4(sc, LCD_RASTER_TIMING_1, val);

sys/arch/arm/ti/ti_lcdc.c

204

val = RASTER_TIMING_2_HFP(hfp) |

sys/arch/arm/ti/ti_lcdc.c

209

val |= RASTER_TIMING_2_IPC;

sys/arch/arm/ti/ti_lcdc.c

210

val |= RASTER_TIMING_2_PHSVS;

sys/arch/arm/ti/ti_lcdc.c

211

val |= RASTER_TIMING_2_PHSVS_RISE;

sys/arch/arm/ti/ti_lcdc.c

212

val |= RASTER_TIMING_2_ACB(255);

sys/arch/arm/ti/ti_lcdc.c

213

val |= RASTER_TIMING_2_ACBI(0);

sys/arch/arm/ti/ti_lcdc.c

214

WR4(sc, LCD_RASTER_TIMING_2, val);

sys/arch/arm/ti/ti_lcdc.c

216

val = (4 << LCDDMA_CTRL_BURST_SIZE_SHIFT) |

sys/arch/arm/ti/ti_lcdc.c

219

WR4(sc, LCD_LCDDMA_CTRL, val);

sys/arch/arm/ti/ti_lcdc.c

222

val = RASTER_CTRL_LCDTFT |

sys/arch/arm/ti/ti_lcdc.c

227

WR4(sc, LCD_RASTER_CTRL, val);

sys/arch/arm/ti/ti_lcdc.c

267

uint32_t val;

sys/arch/arm/ti/ti_lcdc.c

274

val = RD4(sc, LCD_RASTER_CTRL);

sys/arch/arm/ti/ti_lcdc.c

275

WR4(sc, LCD_RASTER_CTRL, val | RASTER_CTRL_LCDEN);

sys/arch/arm/ti/ti_lcdc.h

124

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_lcdc.h

125

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/ti_motg.c

108

uint32_t val;

sys/arch/arm/ti/ti_motg.c

133

val = TIOTG_USBC_READ4(sc, USBCTRL_REV);

sys/arch/arm/ti/ti_motg.c

134

aprint_normal(": 0x%x version v%d.%d.%d", val,

sys/arch/arm/ti/ti_motg.c

135

(val >> 8) & 7, (val >> 6) & 3, val & 63);

sys/arch/arm/ti/ti_motg.c

151

val = TIOTG_USBC_READ4(sc, USBCTRL_MODE);

sys/arch/arm/ti/ti_motg.c

152

val |= USBCTRL_MODE_IDDIGMUX;

sys/arch/arm/ti/ti_motg.c

153

val &= ~USBCTRL_MODE_IDDIG;

sys/arch/arm/ti/ti_motg.c

154

TIOTG_USBC_WRITE4(sc, USBCTRL_MODE, val);

sys/arch/arm/ti/ti_motg.c

157

val = TIOTG_USBC_READ4(sc, USBCTRL_MODE);

sys/arch/arm/ti/ti_motg.c

158

val |= USBCTRL_MODE_IDDIGMUX;

sys/arch/arm/ti/ti_motg.c

159

val |= USBCTRL_MODE_IDDIG;

sys/arch/arm/ti/ti_motg.c

160

TIOTG_USBC_WRITE4(sc, USBCTRL_MODE, val);

sys/arch/arm/ti/ti_mux_clock.c

187

uint32_t val;

sys/arch/arm/ti/ti_mux_clock.c

190

val = RD4(sc, 0);

sys/arch/arm/ti/ti_mux_clock.c

191

sel = __SHIFTOUT(val, sc->sc_mask);

sys/arch/arm/ti/ti_mux_clock.c

200

uint32_t val;

sys/arch/arm/ti/ti_mux_clock.c

210

val = RD4(sc, 0);

sys/arch/arm/ti/ti_mux_clock.c

211

val &= ~sc->sc_mask;

sys/arch/arm/ti/ti_mux_clock.c

212

val |= __SHIFTIN(sel, sc->sc_mask);

sys/arch/arm/ti/ti_mux_clock.c

213

WR4(sc, 0, val);

sys/arch/arm/ti/ti_mux_clock.c

81

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_mux_clock.c

82

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/ti_omapmusb.c

129

uint32_t val;

sys/arch/arm/ti/ti_omapmusb.c

134

val = RD4(sc, OTG_SYSSTATUS);

sys/arch/arm/ti/ti_omapmusb.c

135

if (val & OTG_SYSSTATUS_RESETDONE)

sys/arch/arm/ti/ti_omapmusb.c

146

uint32_t val;

sys/arch/arm/ti/ti_omapmusb.c

150

val = __SHIFTIN(IDLEMODE_SMART, OTG_SYSCONFIG_MIDLEMODE) |

sys/arch/arm/ti/ti_omapmusb.c

153

WR4(sc, OTG_SYSCONFIG, val);

sys/arch/arm/ti/ti_omapmusb.c

77

#define WR1(sc, reg, val) \

sys/arch/arm/ti/ti_omapmusb.c

78

bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/ti/ti_omapmusb.c

81

#define WR2(sc, reg, val) \

sys/arch/arm/ti/ti_omapmusb.c

82

bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/ti/ti_omapmusb.c

85

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_omapmusb.c

86

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/ti/ti_omaptimer.c

117

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_omaptimer.c

118

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, omaptimer_regmap[(sc)->sc_type][(reg)], val)

sys/arch/arm/ti/ti_otg.c

115

val = TIOTG_USBSS_READ4(sc, USBSS_REVREG);

sys/arch/arm/ti/ti_otg.c

117

(val >> 11) & 15, (val >> 8) & 7, (val >> 6) & 3, val & 63);

sys/arch/arm/ti/ti_otg.c

79

uint32_t val;

sys/arch/arm/ti/ti_otgreg.h

30

#define TIOTG_USBSS_WRITE4(sc, reg, val) \

sys/arch/arm/ti/ti_otgreg.h

31

bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg) + TIOTG_USBSS_OFFSET, (val))

sys/arch/arm/ti/ti_otgreg.h

49

#define TIOTG_USBC_WRITE4(sc, reg, val) \

sys/arch/arm/ti/ti_otgreg.h

50

bus_space_write_4(sc->sc_ctrliot, sc->sc_ctrlioh, (reg), (val))

sys/arch/arm/ti/ti_prcm.h

171

#define PRCM_WRITE(sc, reg, val) \

sys/arch/arm/ti/ti_prcm.h

172

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/ti_rng.c

66

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_rng.c

67

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/ti/ti_sdhc.c

69

#define SDHC_WRITE(sc, reg, val) \

sys/arch/arm/ti/ti_sdhc.c

70

bus_space_write_4((sc)->sc_bst, (sc)->sc_sdhc_bsh, (reg), (val))

sys/arch/arm/ti/ti_usb.c

141

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_usb.c

142

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/ti_usb.c

146

ti_usb_hostconfig1(struct ti_usb_softc *sc, uint32_t val)

sys/arch/arm/ti/ti_usb.c

150

val &= ~ti_usb_portbits[port][CONNECT_STATUS];

sys/arch/arm/ti/ti_usb.c

152

val &= ~ti_usb_portbits[port][ULPI_BYPASS];

sys/arch/arm/ti/ti_usb.c

154

val |= ti_usb_portbits[port][ULPI_BYPASS];

sys/arch/arm/ti/ti_usb.c

156

return val;

sys/arch/arm/ti/ti_usb.c

160

ti_usb_hostconfig2(struct ti_usb_softc *sc, uint32_t val)

sys/arch/arm/ti/ti_usb.c

166

val &= ~UHH_HOSTCONFIG_PN_MODE_MASK(port);

sys/arch/arm/ti/ti_usb.c

172

val |= __SHIFTIN(mode, UHH_HOSTCONFIG_PN_MODE_MASK(port));

sys/arch/arm/ti/ti_usb.c

174

return val;

sys/arch/arm/ti/ti_usb.c

181

uint32_t val;

sys/arch/arm/ti/ti_usb.c

183

val = RD4(sc, UHH_SYSCONFIG);

sys/arch/arm/ti/ti_usb.c

186

val &= ~UHH_SYSCONFIG_SIDLEMODE_MASK;

sys/arch/arm/ti/ti_usb.c

187

val &= ~UHH_SYSCONFIG_MIDLEMODE_MASK;

sys/arch/arm/ti/ti_usb.c

188

val |= UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY;

sys/arch/arm/ti/ti_usb.c

189

val |= UHH_SYSCONFIG_CLOCKACTIVITY;

sys/arch/arm/ti/ti_usb.c

190

val |= UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE;

sys/arch/arm/ti/ti_usb.c

191

val |= UHH_SYSCONFIG_ENAWAKEUP;

sys/arch/arm/ti/ti_usb.c

192

val &= ~UHH_SYSCONFIG_AUTOIDLE;

sys/arch/arm/ti/ti_usb.c

195

val &= ~UHH_SYSCONFIG_IDLEMODE_MASK;

sys/arch/arm/ti/ti_usb.c

196

val |= __SHIFTIN(UHH_SYSCONFIG_IDLEMODE_NOIDLE, UHH_SYSCONFIG_IDLEMODE_MASK);

sys/arch/arm/ti/ti_usb.c

197

val &= ~UHH_SYSCONFIG_STANDBYMODE_MASK;

sys/arch/arm/ti/ti_usb.c

198

val |= __SHIFTIN(UHH_SYSCONFIG_STANDBYMODE_NOSTDBY, UHH_SYSCONFIG_STANDBYMODE_MASK);

sys/arch/arm/ti/ti_usb.c

201

WR4(sc, UHH_SYSCONFIG, val);

sys/arch/arm/ti/ti_usb.c

203

val = RD4(sc, UHH_HOSTCONFIG);

sys/arch/arm/ti/ti_usb.c

204

val |= UHH_HOSTCONFIG_ENA_INCR16;

sys/arch/arm/ti/ti_usb.c

205

val |= UHH_HOSTCONFIG_ENA_INCR8;

sys/arch/arm/ti/ti_usb.c

206

val |= UHH_HOSTCONFIG_ENA_INCR4;

sys/arch/arm/ti/ti_usb.c

207

val |= UHH_HOSTCONFIG_APP_START_CLK;

sys/arch/arm/ti/ti_usb.c

208

val &= ~UHH_HOSTCONFIG_ENA_INCR_ALIGN;

sys/arch/arm/ti/ti_usb.c

212

val = ti_usb_hostconfig1(sc, val);

sys/arch/arm/ti/ti_usb.c

216

val = ti_usb_hostconfig2(sc, val);

sys/arch/arm/ti/ti_usb.c

219

WR4(sc, UHH_HOSTCONFIG, val);

sys/arch/arm/ti/ti_usbtll.c

100

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/ti_usbtll.c

110

uint32_t val;

sys/arch/arm/ti/ti_usbtll.c

117

val = RD4(sc, USBTLL_CHANNEL_CONF(port));

sys/arch/arm/ti/ti_usbtll.c

118

val &= ~(USBTLL_CHANNEL_CONF_ULPINOBITSTUFF|

sys/arch/arm/ti/ti_usbtll.c

121

val |= USBTLL_CHANNEL_CONF_CHANEN;

sys/arch/arm/ti/ti_usbtll.c

122

WR4(sc, USBTLL_CHANNEL_CONF(port), val);

sys/arch/arm/ti/ti_usbtll.c

128

uint32_t val;

sys/arch/arm/ti/ti_usbtll.c

133

val = RD4(sc, USBTLL_SYSSTATUS);

sys/arch/arm/ti/ti_usbtll.c

134

if (val & USBTLL_SYSSTATUS_RESETDONE)

sys/arch/arm/ti/ti_usbtll.c

145

uint32_t val;

sys/arch/arm/ti/ti_usbtll.c

149

val = USBTLL_SYSCONFIG_ENAWAKEUP |

sys/arch/arm/ti/ti_usbtll.c

153

WR4(sc, USBTLL_SYSCONFIG, val);

sys/arch/arm/ti/ti_usbtll.c

155

val = RD4(sc, USBTLL_SHARED_CONF);

sys/arch/arm/ti/ti_usbtll.c

156

val |= (USBTLL_SHARED_CONF_FCLK_IS_ON | (1 << 2));

sys/arch/arm/ti/ti_usbtll.c

157

val &= ~USBTLL_SHARED_CONF_USB_90D_DDR_EN;

sys/arch/arm/ti/ti_usbtll.c

158

val &= ~USBTLL_SHARED_CONF_USB_180D_SDR_EN;

sys/arch/arm/ti/ti_usbtll.c

159

WR4(sc, USBTLL_SHARED_CONF, val);

sys/arch/arm/ti/ti_usbtll.c

99

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_wdt.c

100

val = RD4(sc, WDT_WWPS);

sys/arch/arm/ti/ti_wdt.c

101

if ((val & mask) == 0)

sys/arch/arm/ti/ti_wdt.c

106

"reg sync timeout, mask=%#x, wwps=%#x\n", mask, val);

sys/arch/arm/ti/ti_wdt.c

118

uint32_t val;

sys/arch/arm/ti/ti_wdt.c

121

val = RD4(sc, WDT_WDSC);

sys/arch/arm/ti/ti_wdt.c

122

val |= WDSC_SOFTRESET;

sys/arch/arm/ti/ti_wdt.c

123

WR4(sc, WDT_WDSC, val);

sys/arch/arm/ti/ti_wdt.c

125

val = RD4(sc, WDT_WDSC);

sys/arch/arm/ti/ti_wdt.c

126

if ((val & WDSC_SOFTRESET) == 0)

sys/arch/arm/ti/ti_wdt.c

191

uint32_t val;

sys/arch/arm/ti/ti_wdt.c

194

val = RD4(sc, WDT_WTGR);

sys/arch/arm/ti/ti_wdt.c

195

WR4(sc, WDT_WTGR, ~val);

sys/arch/arm/ti/ti_wdt.c

90

#define WR4(sc, reg, val) \

sys/arch/arm/ti/ti_wdt.c

91

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/ti/ti_wdt.c

96

uint32_t val;

sys/arch/arm/xilinx/zynq7000_clkc.c

172

uint32_t val;

sys/arch/arm/xilinx/zynq7000_clkc.c

175

val = syscon_read_4(sc->sc_syscon, reg);

sys/arch/arm/xilinx/zynq7000_clkc.c

178

return sc->sc_ps_clk_frequency * __SHIFTOUT(val, PLL_FDIV);

sys/arch/arm/xilinx/zynq7000_clkc.c

185

uint32_t val;

sys/arch/arm/xilinx/zynq7000_clkc.c

189

val = syscon_read_4(sc->sc_syscon, reg);

sys/arch/arm/xilinx/zynq7000_clkc.c

192

sel = __SHIFTOUT(val, CLK_CTRL_SRCSEL);

sys/arch/arm/xilinx/zynq7000_clkc.c

204

return prate / __SHIFTOUT(val, CLK_CTRL_DIVISOR);

sys/arch/arm/xilinx/zynq7000_clkc.c

211

uint32_t val;

sys/arch/arm/xilinx/zynq7000_clkc.c

222

val = syscon_read_4(sc->sc_syscon, CLK_621_TRUE);

sys/arch/arm/xilinx/zynq7000_clkc.c

224

return (val & CLK_621_TRUE_EN) != 0 ?

sys/arch/arm/xilinx/zynq7000_clkc.c

230

val = syscon_read_4(sc->sc_syscon, CLK_621_TRUE);

sys/arch/arm/xilinx/zynq7000_clkc.c

232

return (val & CLK_621_TRUE_EN) != 0 ?

sys/arch/arm/xilinx/zynq7000_clkc.c

242

val = syscon_read_4(sc->sc_syscon, ARM_CLK_CTRL);

sys/arch/arm/xilinx/zynq7000_clkc.c

244

return prate / __SHIFTOUT(val, ARM_CLK_CTRL_DIVISOR) / 6;

sys/arch/arm/xilinx/zynq7000_clkc.c

269

uint32_t val, mask;

sys/arch/arm/xilinx/zynq7000_clkc.c

322

val = syscon_read_4(sc->sc_syscon, reg);

sys/arch/arm/xilinx/zynq7000_clkc.c

323

syscon_write_4(sc->sc_syscon, reg, val | mask);

sys/arch/arm/xilinx/zynq_gpio.c

165

int val;

sys/arch/arm/xilinx/zynq_gpio.c

169

val = zynq_gpio_pin_read(sc, pin->pin_nr);

sys/arch/arm/xilinx/zynq_gpio.c

171

val = !val;

sys/arch/arm/xilinx/zynq_gpio.c

173

return val;

sys/arch/arm/xilinx/zynq_gpio.c

177

zynq_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/arm/xilinx/zynq_gpio.c

185

val = !val;

sys/arch/arm/xilinx/zynq_gpio.c

187

zynq_gpio_pin_write(sc, pin->pin_nr, val);

sys/arch/arm/xilinx/zynq_gpio.c

202

int val;

sys/arch/arm/xilinx/zynq_gpio.c

207

val = __SHIFTOUT(data, DATA_RO_BIT(pin));

sys/arch/arm/xilinx/zynq_gpio.c

209

return val;

sys/arch/arm/xilinx/zynq_gpio.c

213

zynq_gpio_pin_write(void *priv, int pin, int val)

sys/arch/arm/xilinx/zynq_gpio.c

221

if (val) {

sys/arch/arm/xilinx/zynq_gpio.c

80

#define WR4(sc, reg, val) \

sys/arch/arm/xilinx/zynq_gpio.c

81

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/xilinx/zynq_platform.c

173

uint32_t val;

sys/arch/arm/xilinx/zynq_platform.c

180

val = bus_space_read_4(bst, bsh, SCU_CTL);

sys/arch/arm/xilinx/zynq_platform.c

181

bus_space_write_4(bst, bsh, SCU_CTL, val | SCU_CTL_SCU_ENA);

sys/arch/arm/xilinx/zynq_uart.c

1103

uint32_t val = oldval;

sys/arch/arm/xilinx/zynq_uart.c

1105

CLR(val, MR_CHMODE | MR_NBSTOP | MR_PAR | MR_CHRL | MR_CLKS);

sys/arch/arm/xilinx/zynq_uart.c

1111

SET(val, CHRL_6BIT);

sys/arch/arm/xilinx/zynq_uart.c

1114

SET(val, CHRL_7BIT);

sys/arch/arm/xilinx/zynq_uart.c

1117

SET(val, CHRL_8BIT);

sys/arch/arm/xilinx/zynq_uart.c

1124

SET(val, PAR_ODD);

sys/arch/arm/xilinx/zynq_uart.c

1126

SET(val, PAR_EVEN);

sys/arch/arm/xilinx/zynq_uart.c

1128

SET(val, PAR_NONE);

sys/arch/arm/xilinx/zynq_uart.c

1132

SET(val, NBSTOP_2);

sys/arch/arm/xilinx/zynq_uart.c

1134

return val;

sys/arch/arm/xilinx/zynq_xadc.c

149

#define WR4(sc, reg, val) \

sys/arch/arm/xilinx/zynq_xadc.c

150

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/arm/xilinx/zynq_xadc.c

193

uint32_t val;

sys/arch/arm/xilinx/zynq_xadc.c

219

val = RD4(sc, XADCIF_RDFIFO);

sys/arch/arm/xilinx/zynq_xadc.c

220

val = RD4(sc, XADCIF_RDFIFO);

sys/arch/arm/xilinx/zynq_xadc.c

222

return val & 0xffff;

sys/arch/arm/xilinx/zynq_xadc.c

228

uint32_t val;

sys/arch/arm/xilinx/zynq_xadc.c

231

val = RD4(sc, XADCIF_CFG);

sys/arch/arm/xilinx/zynq_xadc.c

232

val |= CFG_ENABLE;

sys/arch/arm/xilinx/zynq_xadc.c

233

val &= ~CFG_TCKRATE;

sys/arch/arm/xilinx/zynq_xadc.c

234

val |= __SHIFTIN(CFG_TCKRATE_DIV4, CFG_TCKRATE);

sys/arch/arm/xilinx/zynq_xadc.c

235

val |= CFG_WEDGE | CFG_REDGE;

sys/arch/arm/xilinx/zynq_xadc.c

236

WR4(sc, XADCIF_CFG, val);

sys/arch/arm/xilinx/zynq_xadc.c

255

} val;

sys/arch/arm/xilinx/zynq_xadc.c

259

val.u16 = zynq_xadc_read(sc, zynq_xadc_sensors[edata->sensor].reg);

sys/arch/arm/xilinx/zynq_xadc.c

261

if (val.u16 == 0) {

sys/arch/arm/xilinx/zynq_xadc.c

264

temp = ((int64_t)(val.u16 >> 4) * 503975) / 4096;

sys/arch/arm/xilinx/zynq_xadc.c

269

val.u16 = zynq_xadc_read(sc, XADC_STATUS_FLAG);

sys/arch/arm/xilinx/zynq_xadc.c

270

if ((val.u16 & FLAG_OT) != 0) {

sys/arch/arm/xilinx/zynq_xadc.c

277

edata->value_cur = (((val.u16 >> 4) * 1000) / 4096) * 1000;

sys/arch/arm/xilinx/zynq_xadc.c

280

edata->value_cur = (((val.s16 >> 4) * 3000) / 4096) * 1000;

sys/arch/arm/xilinx/zynq_xadc.c

283

edata->value_cur = (((val.u16 >> 4) * 3000) / 4096) * 1000;

sys/arch/arm/xscale/becc.c

345

becc_pcicore_write(struct becc_softc *sc, bus_addr_t reg, uint32_t val)

sys/arch/arm/xscale/becc.c

349

*(volatile uint32_t *) va = val;

sys/arch/arm/xscale/becc_pci.c

311

becc_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/xscale/becc_pci.c

326

*(volatile pcireg_t *)va = val;

sys/arch/arm/xscale/i80312_gpio.c

59

i80312_gpio_set_direction(uint8_t which, uint8_t val)

sys/arch/arm/xscale/i80312_gpio.c

63

sc->sc_gpio_dir = (sc->sc_gpio_dir & ~which) | val;

sys/arch/arm/xscale/i80312_gpio.c

74

i80312_gpio_set_val(uint8_t which, uint8_t val)

sys/arch/arm/xscale/i80312_gpio.c

78

sc->sc_gpio_val = (sc->sc_gpio_val & ~which) | val;

sys/arch/arm/xscale/i80312_pci.c

262

i80312_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/xscale/i80312_pci.c

275

bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ps.ps_data_reg, val);

sys/arch/arm/xscale/i80321_gpio.c

56

i80321_gpio_set_direction(uint8_t which, uint8_t val)

sys/arch/arm/xscale/i80321_gpio.c

60

sc->sc_gpio_dir = (sc->sc_gpio_dir & ~which) | val;

sys/arch/arm/xscale/i80321_gpio.c

70

i80321_gpio_set_val(uint8_t which, uint8_t val)

sys/arch/arm/xscale/i80321_gpio.c

74

sc->sc_gpio_val = (sc->sc_gpio_val & ~which) | val;

sys/arch/arm/xscale/i80321_pci.c

261

i80321_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/xscale/i80321_pci.c

274

bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_OCCDR, val);

sys/arch/arm/xscale/i80321_timer.c

106

tcr0_write(uint32_t val)

sys/arch/arm/xscale/i80321_timer.c

111

: "r" (val));

sys/arch/arm/xscale/i80321_timer.c

115

trr0_write(uint32_t val)

sys/arch/arm/xscale/i80321_timer.c

120

: "r" (val));

sys/arch/arm/xscale/i80321_timer.c

134

tmr1_write(uint32_t val)

sys/arch/arm/xscale/i80321_timer.c

139

: "r" (val));

sys/arch/arm/xscale/i80321_timer.c

153

tcr1_write(uint32_t val)

sys/arch/arm/xscale/i80321_timer.c

158

: "r" (val));

sys/arch/arm/xscale/i80321_timer.c

162

trr1_write(uint32_t val)

sys/arch/arm/xscale/i80321_timer.c

167

: "r" (val));

sys/arch/arm/xscale/i80321_timer.c

171

tisr_write(uint32_t val)

sys/arch/arm/xscale/i80321_timer.c

176

: "r" (val));

sys/arch/arm/xscale/i80321_timer.c

87

tmr0_write(uint32_t val)

sys/arch/arm/xscale/i80321_timer.c

92

: "r" (val));

sys/arch/arm/xscale/i80321_wdog.c

66

wdtcr_write(uint32_t val)

sys/arch/arm/xscale/i80321_wdog.c

71

: "r" (val));

sys/arch/arm/xscale/ixp425_if_npe.c

1597

npe_miibus_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/arm/xscale/ixp425_if_npe.c

1615

*val = v & 0xffff;

sys/arch/arm/xscale/ixp425_if_npe.c

1621

npe_miibus_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/arm/xscale/ixp425_if_npe.c

1629

| val | NPE_MII_WRITE

sys/arch/arm/xscale/ixp425_if_npe.c

186

WR4(struct npe_softc *sc, bus_size_t off, uint32_t val)

sys/arch/arm/xscale/ixp425_if_npe.c

188

bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);

sys/arch/arm/xscale/ixp425_npe.c

224

npe_reg_write(struct ixpnpe_softc *sc, bus_size_t off, uint32_t val)

sys/arch/arm/xscale/ixp425_npe.c

226

DPRINTFn(9, sc->sc_dev, "%s(0x%lx, 0x%x)\n", __func__, off, val);

sys/arch/arm/xscale/ixp425_npe.c

227

bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);

sys/arch/arm/xscale/ixp425_npe.c

502

uint32_t val;

sys/arch/arm/xscale/ixp425_npe.c

504

val = npe_reg_read(sc, reg);

sys/arch/arm/xscale/ixp425_npe.c

506

__func__, reg, expectedBitsSet, val,

sys/arch/arm/xscale/ixp425_npe.c

507

(val & expectedBitsSet) == expectedBitsSet);

sys/arch/arm/xscale/ixp425_npe.c

508

return ((val & expectedBitsSet) == expectedBitsSet);

sys/arch/arm/xscale/ixp425_pci.c

225

ixp425_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/arm/xscale/ixp425_pci.c

239

tag, offset, val);

sys/arch/arm/xscale/ixp425_pci.c

242

PCI_CSR_WRITE_4(sc, PCI_NP_WDATA, val);

sys/arch/arm/xscale/ixp425_pci_space.c

319

uint8_t val)

sys/arch/arm/xscale/ixp425_pci_space.c

326

data = val << (8 * n);

sys/arch/arm/xscale/ixp425_pci_space.c

339

uint16_t val)

sys/arch/arm/xscale/ixp425_pci_space.c

346

data = val << (8 * n);

sys/arch/arm/xscale/ixp425_pci_space.c

359

uint32_t val)

sys/arch/arm/xscale/ixp425_pci_space.c

366

CSR_WRITE_4(PCI_NP_WDATA, val);

sys/arch/arm/xscale/ixp425_qmgr.c

195

aqm_reg_write(struct ixpqmgr_softc *sc, bus_size_t off, uint32_t val)

sys/arch/arm/xscale/ixp425_qmgr.c

197

DPRINTFn(9, sc->sc_dev, "%s(0x%x, 0x%x)\n", __func__, (int)off, val);

sys/arch/arm/xscale/ixp425_qmgr.c

198

bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);

sys/arch/arm/xscale/pxa2x0.c

466

pxa2x0_memctl_write(int reg, uint32_t val)

sys/arch/arm/xscale/pxa2x0.c

476

bus_space_write_4(iot, ioh, reg, val);

sys/arch/arm/xscale/pxa2x0.c

478

MEMCTL_BOOTSTRAP_REG(reg) = val;

sys/arch/arm/xscale/pxa2x0_ac97.c

199

acu_reg_write(struct acu_softc *sc, int reg, uint32_t val)

sys/arch/arm/xscale/pxa2x0_ac97.c

202

bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);

sys/arch/arm/xscale/pxa2x0_ac97.c

349

uint32_t val;

sys/arch/arm/xscale/pxa2x0_ac97.c

366

val = acu_reg_read(sc, AC97_GSR);

sys/arch/arm/xscale/pxa2x0_ac97.c

367

val |= GSR_RDCS | GSR_SDONE;

sys/arch/arm/xscale/pxa2x0_ac97.c

368

acu_reg_write(sc, AC97_GSR, val);

sys/arch/arm/xscale/pxa2x0_ac97.c

381

val = acu_reg_read(sc, AC97_GSR);

sys/arch/arm/xscale/pxa2x0_ac97.c

382

if (val & GSR_RDCS)

sys/arch/arm/xscale/pxa2x0_ac97.c

400

acu_codec_write(void *arg, uint8_t codec_reg, uint16_t val)

sys/arch/arm/xscale/pxa2x0_ac97.c

425

acu_reg_write(sc, AC97_CODEC_BASE(0) + codec_reg * 2, val);

sys/arch/arm/xscale/pxa2x0_dmac.c

247

dmac_reg_write(struct pxadmac_softc *sc, int reg, uint32_t val)

sys/arch/arm/xscale/pxa2x0_dmac.c

250

bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);

sys/arch/arm/xscale/pxa2x0_gpio.c

122

pxagpio_reg_write(struct pxagpio_softc *sc, int reg, uint32_t val)

sys/arch/arm/xscale/pxa2x0_gpio.c

125

bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);

sys/arch/arm/xscale/pxa2x0_gpio.c

128

GPIO_BOOTSTRAP_REG(reg) = val;

sys/arch/arm/xscale/pxa2x0_lcd.c

339

int val, save;

sys/arch/arm/xscale/pxa2x0_lcd.c

350

case 1: val = 0; break;

sys/arch/arm/xscale/pxa2x0_lcd.c

351

case 2: val = 1; break;

sys/arch/arm/xscale/pxa2x0_lcd.c

352

case 4: val = 2; break;

sys/arch/arm/xscale/pxa2x0_lcd.c

353

case 8: val = 3; break;

sys/arch/arm/xscale/pxa2x0_lcd.c

354

case 16: val = 4; break;

sys/arch/arm/xscale/pxa2x0_lcd.c

355

case 18: val = 5; break;

sys/arch/arm/xscale/pxa2x0_lcd.c

356

case 24: val = 33; break;

sys/arch/arm/xscale/pxa2x0_lcd.c

358

val = 4; break;

sys/arch/arm/xscale/pxa2x0_lcd.c

364

(tmp & ~(LCCR3_BPP|LCCR3_BPP3)) | (val << LCCR3_BPP_SHIFT));

sys/arch/arm/xscale/pxa2x0_lcd.c

367

(tmp & ~LCCR3_BPP) | (val << LCCR3_BPP_SHIFT));

sys/arch/arm/xscale/pxa2x0_mci.c

147

#define CSR_WRITE_1(sc, reg, val) \

sys/arch/arm/xscale/pxa2x0_mci.c

148

bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/xscale/pxa2x0_mci.c

151

#define CSR_WRITE_4(sc, reg, val) \

sys/arch/arm/xscale/pxa2x0_mci.c

152

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/arm/xscale/pxa2x0_mci.c

153

#define CSR_SET_4(sc, reg, val) \

sys/arch/arm/xscale/pxa2x0_mci.c

154

CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (val))

sys/arch/arm/xscale/pxa2x0_mci.c

155

#define CSR_CLR_4(sc, reg, val) \

sys/arch/arm/xscale/pxa2x0_mci.c

156

CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(val))

sys/arch/atari/dev/atari5380.c

136

set_scsi_dma(volatile uint8_t *addr, u_long val)

sys/arch/atari/dev/atari5380.c

141

__asm("movepl %0, %1@(0)": :"d" (val), "a" (address));

sys/arch/atari/dev/atari5380.c

194

#define SET_5380_REG(rnum,val) (SCSI_5380->scsi_5380[(rnum << 1) | 1] = val)

sys/arch/atari/dev/atari5380.c

238

#define SET_TT_REG(rnum,val) (SCSI_5380->scsi_5380[(rnum << 1) | 1] = val)

sys/arch/atari/dev/atari5380.c

301

set_tt_5380_reg(u_short rnum, u_short val)

sys/arch/atari/dev/atari5380.c

304

SCSI_5380->scsi_5380[(rnum << 1) | 1] = val;

sys/arch/atari/dev/atari5380.c

646

#define SET_5380_REG(rnum,val) set_falcon_5380_reg(rnum, val)

sys/arch/atari/dev/atari5380.c

708

set_falcon_5380_reg(u_short rnum, u_short val)

sys/arch/atari/dev/atari5380.c

712

DMA->dma_data = val;

sys/arch/atari/dev/fd.c

235

void write_fdreg(u_short regno, u_short val)

sys/arch/atari/dev/fd.c

239

DMA->dma_data = val;

sys/arch/atari/dev/grf_etreg.h

186

#define WGfx(ba, idx, val) \

sys/arch/atari/dev/grf_etreg.h

189

vgaw(ba, GCT_ADDRESS_W , val); \

sys/arch/atari/dev/grf_etreg.h

192

#define WSeq(ba, idx, val) \

sys/arch/atari/dev/grf_etreg.h

195

vgaw(ba, SEQ_ADDRESS_W , val); \

sys/arch/atari/dev/grf_etreg.h

198

#define WCrt(ba, idx, val) \

sys/arch/atari/dev/grf_etreg.h

201

vgaw(ba, CRT_ADDRESS_W , val); \

sys/arch/atari/dev/grf_etreg.h

204

#define WIma(ba, idx, val) \

sys/arch/atari/dev/grf_etreg.h

207

vgaw(ba, IMA_ADDRESS_W , val); \

sys/arch/atari/dev/grf_etreg.h

210

#define WAttr(ba, idx, val) \

sys/arch/atari/dev/grf_etreg.h

215

vgaw(ba, ACT_ADDRESS_W, val); \

sys/arch/atari/dev/grf_etreg.h

50

#define vgaw(ba, reg, val) *(((volatile u_char *)ba)+reg) = ((u_char)val)

sys/arch/atari/dev/hdfd.c

143

#define wrt_fdc_reg(reg, val) { fdio_addr[reg] = val; }

sys/arch/atari/dev/if_ne_mb.c

402

bus_size_t reg, uint8_t val)

sys/arch/atari/dev/if_ne_mb.c

412

wport += (u_int)val << ETHERNEC_WR_ADDR_SHIFT;

sys/arch/atari/dev/if_ne_mb.c

441

u_int val;

sys/arch/atari/dev/if_ne_mb.c

447

val = *a++;

sys/arch/atari/dev/if_ne_mb.c

448

wport = ba + (val << ETHERNEC_WR_ADDR_SHIFT);

sys/arch/atari/isa/isa_milan.c

59

#define WICU(icu, val) *(volatile u_int8_t*)(icu) = val

sys/arch/atari/stand/binpatch/binpatch.c

170

val = strtoull(optarg, NULL, 0);

sys/arch/atari/stand/binpatch/binpatch.c

298

uval8 = (uint8_t)val;

sys/arch/atari/stand/binpatch/binpatch.c

299

sval8 = (int8_t)val;

sys/arch/atari/stand/binpatch/binpatch.c

307

uval16 = (uint16_t)val;

sys/arch/atari/stand/binpatch/binpatch.c

308

sval16 = (int16_t)val;

sys/arch/atari/stand/binpatch/binpatch.c

316

uval32 = (uint32_t)val;

sys/arch/atari/stand/binpatch/binpatch.c

317

sval32 = (int32_t)val;

sys/arch/atari/stand/binpatch/binpatch.c

325

uval64 = (uint64_t)val;

sys/arch/atari/stand/binpatch/binpatch.c

326

sval64 = (int64_t)val;

sys/arch/atari/stand/binpatch/binpatch.c

88

uint64_t val;

sys/arch/atari/stand/bootpref/bootpref.c

326

u_char val;

sys/arch/atari/stand/bootpref/bootpref.c

331

if (read (fd, &val, (size_t)1) != 1) {

sys/arch/atari/stand/bootpref/bootpref.c

334

return (val);

sys/arch/atari/stand/bootpref/bootpref.c

338

writeNVRAM (int fd, int pos, u_char val)

sys/arch/atari/stand/bootpref/bootpref.c

343

if (write (fd, &val, (size_t)1) != 1) {

sys/arch/atari/stand/bootpref/bootpref.c

671

checkOS (u_char *val, char *str)

sys/arch/atari/stand/bootpref/bootpref.c

674

*val = BOOTPREF_NETBSD;

sys/arch/atari/stand/bootpref/bootpref.c

678

*val = BOOTPREF_TOS;

sys/arch/atari/stand/bootpref/bootpref.c

682

*val = BOOTPREF_MAGIC;

sys/arch/atari/stand/bootpref/bootpref.c

686

*val = BOOTPREF_LINUX;

sys/arch/atari/stand/bootpref/bootpref.c

690

*val = BOOTPREF_SYSV;

sys/arch/atari/stand/bootpref/bootpref.c

694

*val = BOOTPREF_NONE;

sys/arch/atari/stand/bootpref/bootpref.c

701

checkLang (u_char *val, char *str)

sys/arch/atari/stand/bootpref/bootpref.c

704

*val = LANG_GB;

sys/arch/atari/stand/bootpref/bootpref.c

708

*val = LANG_D;

sys/arch/atari/stand/bootpref/bootpref.c

712

*val = LANG_FR;

sys/arch/atari/stand/bootpref/bootpref.c

716

*val = LANG_ESP;

sys/arch/atari/stand/bootpref/bootpref.c

720

*val = LANG_I;

sys/arch/atari/stand/bootpref/bootpref.c

727

checkKbdLang (u_char *val, char *str)

sys/arch/atari/stand/bootpref/bootpref.c

730

*val = KBDLANG_USA;

sys/arch/atari/stand/bootpref/bootpref.c

734

*val = KBDLANG_D;

sys/arch/atari/stand/bootpref/bootpref.c

738

*val = KBDLANG_FR;

sys/arch/atari/stand/bootpref/bootpref.c

742

*val = KBDLANG_GB;

sys/arch/atari/stand/bootpref/bootpref.c

746

*val = KBDLANG_ESP;

sys/arch/atari/stand/bootpref/bootpref.c

750

*val = KBDLANG_I;

sys/arch/atari/stand/bootpref/bootpref.c

754

*val = KBDLANG_CHF;

sys/arch/atari/stand/bootpref/bootpref.c

758

*val = KBDLANG_CHD;

sys/arch/atari/stand/bootpref/bootpref.c

765

checkInt (u_char *val, char *str, int min, int max)

sys/arch/atari/stand/bootpref/bootpref.c

769

*val = num;

sys/arch/atari/stand/bootpref/bootpref.c

776

checkDateFmt (u_char *val, char *str)

sys/arch/atari/stand/bootpref/bootpref.c

779

*val |= DATIME_MMDDYY;

sys/arch/atari/stand/bootpref/bootpref.c

783

*val |= DATIME_DDMMYY;

sys/arch/atari/stand/bootpref/bootpref.c

787

*val |= DATIME_YYMMDD;

sys/arch/atari/stand/bootpref/bootpref.c

791

*val |= DATIME_YYDDMM;

sys/arch/atari/stand/bootpref/bootpref.c

798

checkDateSep (u_char *val, char *str)

sys/arch/atari/stand/bootpref/bootpref.c

801

*val = 0;

sys/arch/atari/stand/bootpref/bootpref.c

803

*val = str[0];

sys/arch/atari/stand/bootpref/bootpref.c

808

checkColours (u_char *val, char *str)

sys/arch/atari/stand/bootpref/bootpref.c

810

*val &= ~0x07;

sys/arch/atari/stand/bootpref/bootpref.c

812

*val |= VID2_65535COL;

sys/arch/atari/stand/bootpref/bootpref.c

816

*val |= VID2_256COL;

sys/arch/atari/stand/bootpref/bootpref.c

820

*val |= VID2_16COL;

sys/arch/atari/stand/bootpref/bootpref.c

824

*val |= VID2_4COL;

sys/arch/atari/stand/bootpref/bootpref.c

828

*val |= VID2_2COL;

sys/arch/atari/vme/if_le_vme.c

172

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/atari/vme/if_le_vme.c

179

bus_space_write_2(lesc->sc_iot, lesc->sc_ioh, LER_RDP, val);

sys/arch/atari/vme/if_le_vme.c

187

uint16_t val;

sys/arch/atari/vme/if_le_vme.c

192

val = bus_space_read_2(lesc->sc_iot, lesc->sc_ioh, LER_RDP);

sys/arch/atari/vme/if_le_vme.c

195

return val;

sys/arch/atari/vme/if_we_vme.c

425

bus_size_t reg, uint8_t val)

sys/arch/atari/vme/if_we_vme.c

430

*(volatile uint8_t *)(bh + bt->stride + (reg & ~0x01)) = val;

sys/arch/atari/vme/if_we_vme.c

433

*(volatile uint8_t *)(bh + reg) = val;

sys/arch/bebox/stand/boot/io.c

45

outb(int port, u_char val)

sys/arch/bebox/stand/boot/io.c

48

ISA_io[port] = val;

sys/arch/bebox/stand/boot/io.c

52

outw(int port, u_short val)

sys/arch/bebox/stand/boot/io.c

55

outb(port, val >> 8);

sys/arch/bebox/stand/boot/io.c

56

outb(port + 1, val);

sys/arch/bebox/stand/boot/io.c

81

writeb(u_long addr, u_char val)

sys/arch/bebox/stand/boot/io.c

84

PCI_mem[addr] = val;

sys/arch/bebox/stand/boot/io.c

88

writel(u_long addr, u_long val)

sys/arch/bebox/stand/boot/io.c

91

*((u_long *)&PCI_mem[addr]) = htole32(val);

sys/arch/bebox/stand/boot/vga.c

132

fillw(u_short val, u_short *buf, int num)

sys/arch/bebox/stand/boot/vga.c

137

tmp = val;

sys/arch/bebox/stand/boot/wdvar.h

54

#define WDC_WRITE_REG(chp, reg, val) outb((chp)->c_cmdreg[(reg)], (val))

sys/arch/bebox/stand/boot/wdvar.h

56

#define WDC_WRITE_CTLREG(chp, reg, val) outb((chp)->c_ctlbase, (val))

sys/arch/cesfic/dev/if_le.c

74

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/cesfic/dev/if_le.c

78

*(volatile int *)(lebase + 0) = val;

sys/arch/cesfic/dev/if_le.c

84

uint16_t val;

sys/arch/cesfic/dev/if_le.c

87

val = *(volatile int *)(lebase + 0);

sys/arch/cesfic/dev/if_le.c

88

return (val);

sys/arch/cesfic/dev/zs.c

216

uint8_t val;

sys/arch/cesfic/dev/zs.c

220

val = *cs->cs_reg_csr;

sys/arch/cesfic/dev/zs.c

222

return val;

sys/arch/cesfic/dev/zs.c

226

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/cesfic/dev/zs.c

230

*cs->cs_reg_csr = val;

sys/arch/cesfic/dev/zs.c

237

uint8_t val;

sys/arch/cesfic/dev/zs.c

239

val = *cs->cs_reg_csr;

sys/arch/cesfic/dev/zs.c

241

return val;

sys/arch/cesfic/dev/zs.c

245

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/cesfic/dev/zs.c

248

*cs->cs_reg_csr = val;

sys/arch/cesfic/dev/zs.c

255

uint8_t val;

sys/arch/cesfic/dev/zs.c

257

val = *cs->cs_reg_data;

sys/arch/cesfic/dev/zs.c

259

return val;

sys/arch/cesfic/dev/zs.c

263

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/cesfic/dev/zs.c

266

*cs->cs_reg_data = val;

sys/arch/cesfic/include/z8530var.h

16

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/cesfic/include/z8530var.h

17

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/cesfic/include/z8530var.h

18

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/cobalt/cobalt/interrupt.c

109

#define ICU1_WRITE(reg, val) \

sys/arch/cobalt/cobalt/interrupt.c

110

bus_space_write_1(icu_bst, icu1_bsh, (reg), (val))

sys/arch/cobalt/cobalt/interrupt.c

113

#define ICU2_WRITE(reg, val) \

sys/arch/cobalt/cobalt/interrupt.c

114

bus_space_write_1(icu_bst, icu2_bsh, (reg), (val))

sys/arch/cobalt/cobalt/interrupt.c

117

#define ELCR_WRITE(reg, val) \

sys/arch/cobalt/cobalt/interrupt.c

118

bus_space_write_1(icu_bst, elcr_bsh, (reg), (val))

sys/arch/cobalt/dev/zs.c

388

uint8_t val;

sys/arch/cobalt/dev/zs.c

392

val = *cs->cs_reg_csr;

sys/arch/cobalt/dev/zs.c

394

return val;

sys/arch/cobalt/dev/zs.c

398

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/cobalt/dev/zs.c

403

*cs->cs_reg_csr = val;

sys/arch/cobalt/dev/zs.c

410

uint8_t val;

sys/arch/cobalt/dev/zs.c

412

val = *cs->cs_reg_csr;

sys/arch/cobalt/dev/zs.c

414

return val;

sys/arch/cobalt/dev/zs.c

418

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/cobalt/dev/zs.c

421

*cs->cs_reg_csr = val;

sys/arch/cobalt/dev/zs.c

428

uint8_t val;

sys/arch/cobalt/dev/zs.c

430

val = *cs->cs_reg_data;

sys/arch/cobalt/dev/zs.c

432

return val;

sys/arch/cobalt/dev/zs.c

436

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/cobalt/dev/zs.c

439

*cs->cs_reg_data = val;

sys/arch/cobalt/include/z8530var.h

108

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/cobalt/include/z8530var.h

109

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/cobalt/include/z8530var.h

110

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/cobalt/stand/boot/lcd.c

44

#define CSR_WRITE(base, reg, val) \

sys/arch/cobalt/stand/boot/lcd.c

46

*(volatile uint32_t *)((base) + (reg)) = ((val) << 24); \

sys/arch/cobalt/stand/boot/ns16550.c

40

#define CSR_WRITE(base, reg, val) \

sys/arch/cobalt/stand/boot/ns16550.c

42

*(volatile uint8_t *)((base) + (reg)) = (val); \

sys/arch/cobalt/stand/boot/tlp.c

165

uint32_t val, tag;

sys/arch/cobalt/stand/boot/tlp.c

197

val = CSR_READ(l, TLP_BMR);

sys/arch/cobalt/stand/boot/tlp.c

198

CSR_WRITE(l, TLP_BMR, val | BMR_RST);

sys/arch/cobalt/stand/boot/tlp.c

200

CSR_WRITE(l, TLP_BMR, val);

sys/arch/cobalt/stand/boot/tlp.c

231

val = read_srom(l, SROM_MAC_OFFSET / 2 + 0);

sys/arch/cobalt/stand/boot/tlp.c

232

en[0] = val;

sys/arch/cobalt/stand/boot/tlp.c

233

en[1] = val >> 8;

sys/arch/cobalt/stand/boot/tlp.c

234

val = read_srom(l, SROM_MAC_OFFSET / 2 + 1);

sys/arch/cobalt/stand/boot/tlp.c

235

en[2] = val;

sys/arch/cobalt/stand/boot/tlp.c

236

en[3] = val >> 8;

sys/arch/cobalt/stand/boot/tlp.c

237

val = read_srom(l, SROM_MAC_OFFSET / 2 + 2);

sys/arch/cobalt/stand/boot/tlp.c

238

en[4] = val;

sys/arch/cobalt/stand/boot/tlp.c

239

en[5] = val >> 8;

sys/arch/cobalt/stand/boot/tlp.c

396

uint32_t val, x1, x0, bit;

sys/arch/cobalt/stand/boot/tlp.c

401

val = SROM_RD | SROM_SR;

sys/arch/cobalt/stand/boot/tlp.c

402

CSR_WRITE(l, TLP_APROM, val);

sys/arch/cobalt/stand/boot/tlp.c

403

val |= CS; /* hold CS */

sys/arch/cobalt/stand/boot/tlp.c

404

CSR_WRITE(l, TLP_APROM, val);

sys/arch/cobalt/stand/boot/tlp.c

406

x1 = val | D1; /* 1 */

sys/arch/cobalt/stand/boot/tlp.c

407

x0 = val | D0; /* 0 */

sys/arch/cobalt/stand/boot/tlp.c

419

CSR_WRITE(l, TLP_APROM, val);

sys/arch/cobalt/stand/boot/tlp.c

421

CSR_WRITE(l, TLP_APROM, val | CLK);

sys/arch/cobalt/stand/boot/tlp.c

425

val &= ~CS; /* turn off chip select */

sys/arch/cobalt/stand/boot/tlp.c

426

CSR_WRITE(l, TLP_APROM, val);

sys/arch/cobalt/stand/boot/tlp.c

441

tlp_mii_write(struct local *l, int phy, int reg, int val)

sys/arch/cobalt/stand/boot/wdvar.h

61

#define WDC_WRITE_REG(chp, reg, val) *(chp)->c_cmdreg[(reg)] = (val)

sys/arch/cobalt/stand/boot/wdvar.h

63

#define WDC_WRITE_CTLREG(chp, reg, val) (chp)->c_ctlbase[(reg)] = (val)

sys/arch/cobalt/stand/boot/zs.c

55

uint8_t val;

sys/arch/cobalt/stand/boot/zs.c

57

val = *(volatile uint8_t *)(zs + reg);

sys/arch/cobalt/stand/boot/zs.c

60

return val;

sys/arch/cobalt/stand/boot/zs.c

64

zs_write(void *dev, uint8_t reg, uint8_t val)

sys/arch/cobalt/stand/boot/zs.c

68

*(volatile uint8_t *)(zs + reg) = val;

sys/arch/cobalt/stand/boot/zs.c

73

zs_write_reg(void *dev, uint8_t reg, uint8_t val)

sys/arch/cobalt/stand/boot/zs.c

77

zs_write(dev, ZS_CSR, val);

sys/arch/dreamcast/dev/g1/g1bus_bus_mem.c

198

uint8_t val)

sys/arch/dreamcast/dev/g1/g1bus_bus_mem.c

201

*(volatile uint8_t *)(sh + off) = val;

sys/arch/dreamcast/dev/g1/g1bus_bus_mem.c

206

uint16_t val)

sys/arch/dreamcast/dev/g1/g1bus_bus_mem.c

209

*(volatile uint16_t *)(sh + off) = val;

sys/arch/dreamcast/dev/g1/g1bus_bus_mem.c

214

uint32_t val)

sys/arch/dreamcast/dev/g1/g1bus_bus_mem.c

217

*(volatile uint32_t *)(sh + off) = val;

sys/arch/dreamcast/dev/g1/g1bus_bus_mem.c

322

uint32_t val, bus_size_t len)

sys/arch/dreamcast/dev/g1/g1bus_bus_mem.c

327

*baddr++ = val;

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

235

uint8_t val)

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

241

*(volatile uint8_t *)(sh + off) = val;

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

248

uint16_t val)

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

254

*(volatile uint16_t *)(sh + off) = val;

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

261

uint32_t val)

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

267

*(volatile uint32_t *)(sh + off) = val;

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

364

uint32_t val, bus_size_t len)

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

372

*baddr++ = val;

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

445

uint8_t val)

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

451

*(volatile uint8_t *)(sh + (off * 4)) = val;

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

458

uint16_t val)

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

464

*(volatile uint16_t *)(sh + (off * 4)) = val;

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

471

uint32_t val)

sys/arch/dreamcast/dev/g2/g2bus_bus_mem.c

477

*(volatile uint32_t *)(sh + (off * 4)) = val;

sys/arch/dreamcast/dev/g2/gapspci_pci.c

177

gaps_conf_write(void *v, pcitag_t tag, int reg, pcireg_t val)

sys/arch/dreamcast/dev/g2/gapspci_pci.c

188

if (reg == (PCI_MAPREG_START + 4) && val != 0x01000000)

sys/arch/dreamcast/dev/g2/gapspci_pci.c

191

bus_space_write_4(sc->sc_memt, sc->sc_pci_memh, reg, val);

sys/arch/dreamcast/dev/microcode/aica_arm.c

43

#define REG_WRITE_1(off,val) \

sys/arch/dreamcast/dev/microcode/aica_arm.c

44

((*(volatile uint8_t *)(DC_REG_ADDR + (off))) = (val))

sys/arch/dreamcast/dev/microcode/aica_arm.c

45

#define REG_WRITE_2(off,val) \

sys/arch/dreamcast/dev/microcode/aica_arm.c

46

((*(volatile uint16_t *)(DC_REG_ADDR + (off))) = (val))

sys/arch/dreamcast/dev/microcode/aica_arm.c

47

#define REG_WRITE_4(off,val) \

sys/arch/dreamcast/dev/microcode/aica_arm.c

48

((*(volatile uint32_t *)((DC_REG_ADDR)+(off))) = (val))

sys/arch/dreamcast/dev/microcode/aica_arm.c

53

#define CH_WRITE_1(ch,off,val) REG_WRITE_1(((ch) << 7) + (off), val)

sys/arch/dreamcast/dev/microcode/aica_arm.c

54

#define CH_WRITE_2(ch,off,val) REG_WRITE_2(((ch) << 7) + (off), val)

sys/arch/dreamcast/dev/microcode/aica_arm.c

55

#define CH_WRITE_4(ch,off,val) REG_WRITE_4(((ch) << 7) + (off), val)

sys/arch/dreamcast/dev/pvr.c

126

#define PVR_REG_WRITE(dc, reg, val) \

sys/arch/dreamcast/dev/pvr.c

127

((volatile uint32_t *)(dc)->dc_regvaddr)[(reg) >> 2] = (val)

sys/arch/epoc32/windermere/windermere.c

70

#define TC_WRITE(base, off, val) (*((base) + (off)) = (val))

sys/arch/epoc32/windermere/wmcom.c

852

#define WMCOM_CNWRITE_1(offset, val) \

sys/arch/epoc32/windermere/wmcom.c

853

(*(volatile uint8_t *)(wmcom_cnaddr + ((offset) << 2)) = val)

sys/arch/epoc32/windermere/wmcom.c

854

#define WMCOM_CNWRITE_4(offset, val) \

sys/arch/epoc32/windermere/wmcom.c

855

(*(volatile uint32_t *)(wmcom_cnaddr + ((offset) << 2)) = val)

sys/arch/evbarm/armadillo/armadillo9_machdep.c

374

uint32_t val = EP93XX_WDOG_ENABLE;

sys/arch/evbarm/armadillo/armadillo9_machdep.c

378

: "r" (ctrl), "r" (val)

sys/arch/evbarm/dev/plcom.c

286

pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val)

sys/arch/evbarm/dev/plcom.c

289

bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val);

sys/arch/evbarm/dev/plcom.c

294

tmp = (val << shift) | (tmp & ~(0xff << shift));

sys/arch/evbarm/dev/plcom.c

300

pwrite2(struct plcom_instance *pi, bus_size_t o, uint16_t val)

sys/arch/evbarm/dev/plcom.c

303

bus_space_write_2(pi->pi_iot, pi->pi_ioh, o, val);

sys/arch/evbarm/dev/plcom.c

308

tmp = (val << shift) | (tmp & ~(0xffff << shift));

sys/arch/evbarm/dev/plcom.c

332

#define PWRITE1(pi, reg, val) pwrite1(pi, reg, val)

sys/arch/evbarm/dev/plcom.c

334

#define PWRITE2(pi, reg, val) pwrite2(pi, reg, val)

sys/arch/evbarm/dev/plcom.c

335

#define PWRITE4(pi, reg, val) \

sys/arch/evbarm/dev/plcom.c

336

bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val))

sys/arch/evbarm/g42xxeb/g42xxeb_kmkbd.c

340

int val;

sys/arch/evbarm/g42xxeb/g42xxeb_kmkbd.c

343

val = pckbc_poll_data(t->t_kbctag, t->t_kbcslot);

sys/arch/evbarm/g42xxeb/g42xxeb_kmkbd.c

344

if ((val != -1) && kmkbd_decode(t, val, type, data))

sys/arch/evbarm/g42xxeb/gb225.c

242

do_debounce(struct opio_softc *sc, int intr, int val, int count)

sys/arch/evbarm/g42xxeb/gb225.c

249

if (p->last_state != val) {

sys/arch/evbarm/g42xxeb/gb225.c

251

p->last_state = val;

sys/arch/evbarm/g42xxeb/gb225.c

258

if (p->reported_state != val) {

sys/arch/evbarm/g42xxeb/gb225.c

259

p->reported_state = val;

sys/arch/evbarm/g42xxeb/gb225.c

262

p->func(p->arg, val);

sys/arch/evbarm/g42xxeb/gb225_pcic.c

211

opcic_card_detect(void *arg, int val)

sys/arch/evbarm/g42xxeb/gb225_pcic.c

222

if (HAVE_CARD(val)) {

sys/arch/evbarm/g42xxeb/gb225_pcic.c

243

HAVE_CARD(val) ? "inserted" : "removed"));

sys/arch/evbarm/gemini/gemini_machdep.c

514

gemini_puthex(unsigned int val)

sys/arch/evbarm/gemini/gemini_machdep.c

520

gemini_putchar(hexc[(val >> 28) & 0xf]);

sys/arch/evbarm/gemini/gemini_machdep.c

521

gemini_putchar(hexc[(val >> 24) & 0xf]);

sys/arch/evbarm/gemini/gemini_machdep.c

522

gemini_putchar(hexc[(val >> 20) & 0xf]);

sys/arch/evbarm/gemini/gemini_machdep.c

523

gemini_putchar(hexc[(val >> 16) & 0xf]);

sys/arch/evbarm/gemini/gemini_machdep.c

524

gemini_putchar(hexc[(val >> 12) & 0xf]);

sys/arch/evbarm/gemini/gemini_machdep.c

525

gemini_putchar(hexc[(val >> 8) & 0xf]);

sys/arch/evbarm/gemini/gemini_machdep.c

526

gemini_putchar(hexc[(val >> 4) & 0xf]);

sys/arch/evbarm/gemini/gemini_machdep.c

527

gemini_putchar(hexc[(val >> 0) & 0xf]);

sys/arch/evbarm/gumstix/if_smsh_gxio.c

67

uint32_t val;

sys/arch/evbarm/gumstix/if_smsh_gxio.c

80

val = bus_space_read_4(iot, ioh, LAN9118_BYTE_TEST);

sys/arch/evbarm/gumstix/if_smsh_gxio.c

81

if (val == LAN9118_BYTE_TEST_VALUE)

sys/arch/evbarm/imx31/imx31lk_pcic.c

171

imx31lk_pcic_write(struct imx_pcic_socket *so, int reg, u_int val)

sys/arch/evbarm/imx31/imx31lk_pcic.c

186

if (val == PXAPCIC_POWER_3V)

sys/arch/evbarm/imx31/imx31lk_pcic.c

188

else if (val == PXAPCIC_POWER_5V)

sys/arch/evbarm/imx31/imx31lk_pcic.c

196

val ? SCP_CCR_RESET : 0);

sys/arch/evbarm/ixm1200/nappi_nppb.c

65

#define CSR_WRITE_1(sc, reg, val) \

sys/arch/evbarm/ixm1200/nappi_nppb.c

66

bus_space_write_1(sc->sc_st, sc->sc_sh, reg, val)

sys/arch/evbarm/ixm1200/nappi_nppb.c

67

#define CSR_WRITE_2(sc, reg, val) \

sys/arch/evbarm/ixm1200/nappi_nppb.c

68

bus_space_write_2(sc->sc_st, sc->sc_sh, reg, val)

sys/arch/evbarm/ixm1200/nappi_nppb.c

69

#define CSR_WRITE_4(sc, reg, val) \

sys/arch/evbarm/ixm1200/nappi_nppb.c

70

bus_space_write_4(sc->sc_st, sc->sc_sh, reg, val)

sys/arch/evbarm/kobo/kobo_machdep.c

223

uint16_t val;

sys/arch/evbarm/kobo/kobo_machdep.c

239

.val = (value), \

sys/arch/evbarm/kobo/kobo_machdep.c

381

p->val);

sys/arch/evbarm/mini2440/audio_mini2440.c

423

#define WRITE_GPIO(val) bus_space_write_4(s3sc->sc_iot, s3sc->sc_gpio_ioh, GPIO_PBDAT, val)

sys/arch/evbarm/mini2440/mini2440_lcd.c

225

#define _(field, val) (((val)-1) << (field##_SHIFT))

sys/arch/evbarm/mpcsa/mpcsa_leds.c

203

mpcsa_leds_pin_write(void *arg, int pin, int val)

sys/arch/evbarm/mpcsa/mpcsa_leds.c

213

if (val)

sys/arch/evbarm/netwalker/netwalker_backlight.c

278

netwalker_set_pwm(struct netwalker_backlight_softc *sc, int val)

sys/arch/evbarm/netwalker/netwalker_backlight.c

285

conf.duty_cycle = (conf.period * val) / BRIGHTNESS_MAX;

sys/arch/evbarm/netwalker/netwalker_machdep.c

362

uint16_t val;

sys/arch/evbarm/netwalker/netwalker_machdep.c

379

.val = (value), \

sys/arch/evbarm/netwalker/netwalker_machdep.c

625

p->val);

sys/arch/evbarm/rpi/rpi_vcmbox.c

153

vcmbox_read_temp(struct vcmbox_softc *sc, uint32_t tag, int id, uint32_t *val)

sys/arch/evbarm/rpi/rpi_vcmbox.c

169

*val = le32toh(vb.vbt_temp.value);

sys/arch/evbarm/rpi/rpi_vcmbox.c

176

uint32_t *val)

sys/arch/evbarm/rpi/rpi_vcmbox.c

192

*val = le32toh(vb.vbt_clockrate.rate);

sys/arch/evbarm/rpi/rpi_vcmbox.c

199

uint32_t val)

sys/arch/evbarm/rpi/rpi_vcmbox.c

208

vb.vbt_clockrate.rate = htole32(val);

sys/arch/evbarm/rpi/rpi_vcmbox.c

358

uint32_t val;

sys/arch/evbarm/rpi/rpi_vcmbox.c

369

vcmbox_sensor_id[VCMBOX_SENSOR_TEMP], &val) == 0) {

sys/arch/evbarm/rpi/rpi_vcmbox.c

371

val * 1000 + 273150000;

sys/arch/evbarm/rpi/rpi_vcmbox.c

383

uint32_t val;

sys/arch/evbarm/rpi/rpi_vcmbox.c

389

vcmbox_sensor_id[edata->sensor], &val))

sys/arch/evbarm/rpi/rpi_vcmbox.c

392

limits->sel_critmax = val * 1000 + 273150000;

sys/arch/evbarm/rpi/rpi_vcmbox.c

400

uint32_t val;

sys/arch/evbarm/rpi/rpi_vcmbox.c

406

vcmbox_sensor_id[edata->sensor], &val))

sys/arch/evbarm/rpi/rpi_vcmbox.c

409

edata->value_cur = val * 1000 + 273150000;

sys/arch/evbarm/smdk2xx0/smdk2410_lcd.c

198

#define _(field, val) (((val)-1) << (field##_SHIFT))

sys/arch/evbarm/stand/boot2440/dm9000.c

167

int val;

sys/arch/evbarm/stand/boot2440/dm9000.c

170

val = CSR_READ_1(l, PID0);

sys/arch/evbarm/stand/boot2440/dm9000.c

171

val |= CSR_READ_1(l, PID1) << 8;

sys/arch/evbarm/stand/boot2440/dm9000.c

172

val |= CSR_READ_1(l, VID0) << 16;

sys/arch/evbarm/stand/boot2440/dm9000.c

173

val |= CSR_READ_1(l, VID1) << 24;

sys/arch/evbarm/stand/boot2440/dm9000.c

174

if (val != 0x0a469000) {

sys/arch/evbarm/stand/boot2440/dm9000.c

193

unsigned int val, fdx;

sys/arch/evbarm/stand/boot2440/dm9000.c

195

val = CSR_READ_1(l, CHIPR);

sys/arch/evbarm/stand/boot2440/dm9000.c

196

printf("DM9000 rev. %#x", val);

sys/arch/evbarm/stand/boot2440/dm9000.c

197

val = CSR_READ_1(l, ISR);

sys/arch/evbarm/stand/boot2440/dm9000.c

198

printf(", %d bit mode\n", (val & 1<<7) ? 8 : 16);

sys/arch/evbarm/stand/boot2440/dm9000.c

251

val = CSR_READ_1(l, NSR);

sys/arch/evbarm/stand/boot2440/dm9000.c

252

if ((val & NSR_LINKST) == 0) {

sys/arch/evbarm/stand/boot2440/dm9000.c

265

val = mii_read(l, l->phy, 17);

sys/arch/evbarm/stand/boot2440/dm9000.c

266

if (val & (03 << 14))

sys/arch/evbarm/stand/boot2440/dm9000.c

268

if (val & (03 << 12))

sys/arch/evbarm/stand/boot2440/dm9000.c

270

fdx = !!(val & (05 << 13));

sys/arch/evbarm/stand/boot2440/dm9000.c

273

val = CSR_READ_1(l, FCR);

sys/arch/evbarm/stand/boot2440/dm9000.c

274

CSR_WRITE_1(l, FCR, val | FCR_FLCE);

sys/arch/evbarm/stand/boot2440/dm9000.c

298

unsigned int val, cnt, bound;

sys/arch/evbarm/stand/boot2440/dm9000.c

307

val = (buf[1] << 8) | buf[0];

sys/arch/evbarm/stand/boot2440/dm9000.c

308

CSR_WRITE_2(l, MWCMD, val);

sys/arch/evbarm/stand/boot2440/dm9000.c

317

val = CSR_READ_1(l, TCR);

sys/arch/evbarm/stand/boot2440/dm9000.c

318

if ((val & TCR_TXREQ) == 0)

sys/arch/evbarm/stand/boot2440/dm9000.c

331

unsigned int bound, val, mark, stat, len, upto, cnt;

sys/arch/evbarm/stand/boot2440/dm9000.c

338

val = CSR_READ_1(l, ISR);

sys/arch/evbarm/stand/boot2440/dm9000.c

339

if (val & ISR_PRS)

sys/arch/evbarm/stand/boot2440/dm9000.c

373

val = CSR_READ_2(l, MRCMD);

sys/arch/evbarm/stand/boot2440/dm9000.c

374

ptr[0] = val;

sys/arch/evbarm/stand/boot2440/dm9000.c

375

ptr[1] = val >> 8;

sys/arch/evbarm/stand/boot2440/main.c

46

#define CSR_WRITE(reg, val) do { \

sys/arch/evbarm/stand/boot2440/main.c

47

*(volatile uint32_t *)((reg)) = val; \

sys/arch/evbarm/tsarm/tspld.c

128

uint16_t val;

sys/arch/evbarm/tsarm/tspld.c

133

val = SSP_GET(SSPDR) & 0xffff;

sys/arch/evbarm/tsarm/tspld.c

134

sc->boardtemp = ((int16_t)val >> 3) * 62500;

sys/arch/evbcf/include/bus_space.h

441

#define bus_space_set_multi_1(t, h, o, val, c) do { \

sys/arch/evbcf/include/bus_space.h

451

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/evbcf/include/bus_space.h

455

#define bus_space_set_multi_2(t, h, o, val, c) do { \

sys/arch/evbcf/include/bus_space.h

465

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/evbcf/include/bus_space.h

469

#define bus_space_set_multi_4(t, h, o, val, c) do { \

sys/arch/evbcf/include/bus_space.h

479

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/evbcf/include/bus_space.h

492

#define bus_space_set_region_1(t, h, o, val, c) do { \

sys/arch/evbcf/include/bus_space.h

502

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/evbcf/include/bus_space.h

506

#define bus_space_set_region_2(t, h, o, val, c) do { \

sys/arch/evbcf/include/bus_space.h

516

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/evbcf/include/bus_space.h

520

#define bus_space_set_region_4(t, h, o, val, c) do { \

sys/arch/evbcf/include/bus_space.h

530

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/evbmips/adm5120/machdep.c

198

char *key, *val, *valend;

sys/arch/evbmips/adm5120/machdep.c

209

val = buf;

sys/arch/evbmips/adm5120/machdep.c

210

key = strsep(&val, "=");

sys/arch/evbmips/adm5120/machdep.c

211

if (val == NULL)

sys/arch/evbmips/adm5120/machdep.c

214

tmp = strtoul(val, &valend, 10);

sys/arch/evbmips/adm5120/machdep.c

215

if (val == valend || *valend != 'M')

sys/arch/evbmips/adm5120/machdep.c

224

tmp = strtoul(val, &valend, 10);

sys/arch/evbmips/adm5120/machdep.c

225

if (val == valend || *valend != '\0')

sys/arch/evbmips/adm5120/machdep.c

245

(void)ether_aton_r(enaddr, sizeof(enaddr), val);

sys/arch/evbmips/adm5120/machdep.c

259

printf("Routerboard %s\n", val);

sys/arch/evbmips/adm5120/machdep.c

338

uint32_t val;

sys/arch/evbmips/adm5120/machdep.c

341

val = SW_READ(SW_MEMCONT_REG);

sys/arch/evbmips/adm5120/machdep.c

342

printf("SW_MEMCONT_REG: 0x%08" PRIx32 "\n", val);

sys/arch/evbmips/adm5120/machdep.c

343

switch (val & SDRAM_SIZE_MASK) {

sys/arch/evbmips/evbmips/yamon.c

106

return (yev->val);

sys/arch/evbmips/include/yamon.h

82

char *val;

sys/arch/evbmips/loongson/dev/kb3310.c

234

u_int val;

sys/arch/evbmips/loongson/dev/kb3310.c

236

val = ykbec_read(mcsc, reg);

sys/arch/evbmips/loongson/dev/kb3310.c

237

return (val << 8) | ykbec_read(mcsc, reg + 1);

sys/arch/evbmips/loongson/dev/kb3310.c

337

u_int val, bat_charge, bat_status, charge_status, bat_state, power_flag;

sys/arch/evbmips/loongson/dev/kb3310.c

344

val = ykbec_read16(sc, REG_FAN_SPEED_HIGH) & 0xfffff;

sys/arch/evbmips/loongson/dev/kb3310.c

345

if (val != 0) {

sys/arch/evbmips/loongson/dev/kb3310.c

346

val = KB3310_FAN_SPEED_DIVIDER / val;

sys/arch/evbmips/loongson/dev/kb3310.c

347

sc->sc_sensor[YKBEC_FAN].value = val;

sys/arch/evbmips/loongson/dev/kb3310.c

352

val = ykbec_read(sc, ECTEMP_CURRENT_REG);

sys/arch/evbmips/loongson/dev/kb3310.c

353

sc->sc_sensor[YKBEC_ITEMP].value = val * 1000000 + 273150000;

sys/arch/evbmips/loongson/dev/kb3310.c

366

val = ykbec_read16(sc, REG_TEMPERATURE_HIGH);

sys/arch/evbmips/loongson/dev/kb3310.c

367

sc->sc_sensor[YKBEC_BTEMP].value = val * 1000000 + 273150000;

sys/arch/evbmips/loongson/dev/stvii.c

202

stvii_writereg(struct stvii_softc *sc, int reg, uint8_t val)

sys/arch/evbmips/loongson/dev/stvii.c

204

uint8_t out[2] = {reg, val};

sys/arch/evbmips/malta/leds.c

48

led_bar(uint8_t val)

sys/arch/evbmips/malta/leds.c

52

*ledbar = val;

sys/arch/evbmips/malta/leds.c

56

led_display_word(uint32_t val)

sys/arch/evbmips/malta/leds.c

60

*ledbar = val;

sys/arch/evbmips/malta/leds.c

77

led_display_char(int pos, uint8_t val)

sys/arch/evbmips/malta/leds.c

84

leds[pos * 8] = val;

sys/arch/evbmips/rasoc/console.c

52

sysctl_write(const u_int offset, uint32_t val)

sys/arch/evbmips/rasoc/console.c

54

*RA_IOREG_VADDR(RA_SYSCTL_BASE, offset) = val;

sys/arch/evbmips/rasoc/console.c

64

uart_write(const u_int offset, const uint32_t val)

sys/arch/evbmips/rasoc/console.c

66

*RA_IOREG_VADDR(RALINK_CONADDR, offset) = val;

sys/arch/evbmips/rasoc/machdep.c

71

sysctl_write(u_int offset, uint32_t val)

sys/arch/evbmips/rasoc/machdep.c

73

*RA_IOREG_VADDR(RA_SYSCTL_BASE, offset) = val;

sys/arch/evbmips/sbmips/rtc.c

421

#define WRITE_REG(rp, val) mips3_sd((register_t)(MIPS_PHYS_TO_KSEG1(rp)), (val))

sys/arch/evbmips/sbmips/rtc.c

87

#define WRITERTC(sc, dev, val) \

sys/arch/evbmips/sbmips/rtc.c

88

time_writertc((sc)->sc_smbus_chan, (sc)->sc_smbus_addr, (dev), (sc)->sc_type, (val))

sys/arch/evbmips/sbmips/sb1250_icu.c

94

#define WRITE_REG(rp, val) mips3_sd((register_t)(rp), (val))

sys/arch/evbmips/stand/sbmips/common/cfe_api.c

156

cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)

sys/arch/evbmips/stand/sbmips/common/cfe_api.c

168

xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);

sys/arch/evbmips/stand/sbmips/common/cfe_api.c

471

cfe_setenv(char *name, char *val)

sys/arch/evbmips/stand/sbmips/common/cfe_api.c

483

xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);

sys/arch/evbmips/stand/sbmips/common/cfe_api.c

484

xiocb.plist.xiocb_envbuf.val_length = cfe_strlen(val);

sys/arch/evbmips/stand/sbmips/common/cfe_api.h

188

int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen);

sys/arch/evbmips/stand/sbmips/common/cfe_api.h

204

int cfe_setenv(char *name, char *val);

sys/arch/evbppc/dht/machdep.c

144

uint32_t val, addr;

sys/arch/evbppc/dht/machdep.c

148

val = mfdcr(DCR_SDRAM0_CFGDATA);

sys/arch/evbppc/dht/machdep.c

149

if (val & SDRAM0_BnCR_EN)

sys/arch/evbppc/dht/machdep.c

150

total += SDRAM0_BnCR_SZ(val);

sys/arch/evbppc/explora/dev/le_elb.c

195

uint16_t val;

sys/arch/evbppc/explora/dev/le_elb.c

198

val = bus_space_read_4(iot, ioh, LE_RDP);

sys/arch/evbppc/explora/dev/le_elb.c

200

return val;

sys/arch/evbppc/explora/dev/le_elb.c

207

le_wrcsr(struct lance_softc *sc, uint16_t reg, uint16_t val)

sys/arch/evbppc/explora/dev/le_elb.c

214

bus_space_write_4(iot, ioh, LE_RDP, val);

sys/arch/evbppc/include/wii.h

179

uint32_t val;

sys/arch/evbppc/include/wii.h

181

for (val = in32(HW_GPIOB_OUT); ; val ^= __BIT(GPIO_SLOT_LED)) {

sys/arch/evbppc/include/wii.h

183

out32(HW_GPIOB_OUT, val);

sys/arch/evbppc/include/wii.h

191

uint32_t val;

sys/arch/evbppc/include/wii.h

193

val = in32(HW_GPIOB_OUT);

sys/arch/evbppc/include/wii.h

195

val |= __BIT(GPIO_SLOT_LED);

sys/arch/evbppc/include/wii.h

197

val &= ~__BIT(GPIO_SLOT_LED);

sys/arch/evbppc/include/wii.h

199

out32(HW_GPIOB_OUT, val);

sys/arch/evbppc/nintendo/dev/ahb.c

111

uint32_t val;

sys/arch/evbppc/nintendo/dev/ahb.c

117

val = RD4(LT_CHIPREVID);

sys/arch/evbppc/nintendo/dev/ahb.c

120

(unsigned)(val & (LT_CHIPREVID_VERHI | LT_CHIPREVID_VERLO)));

sys/arch/evbppc/nintendo/dev/ahb.c

122

val = RD4(HW_VERSION);

sys/arch/evbppc/nintendo/dev/ahb.c

125

(unsigned)__SHIFTOUT(val, HWVER_MASK) + 1,

sys/arch/evbppc/nintendo/dev/ahb.c

126

(unsigned)__SHIFTOUT(val, HWREV_MASK));

sys/arch/evbppc/nintendo/dev/ahb.c

214

uint32_t val;

sys/arch/evbppc/nintendo/dev/ahb.c

217

val = RD4(HW_ARMIRQMASK);

sys/arch/evbppc/nintendo/dev/ahb.c

218

val &= ~__BIT(irq);

sys/arch/evbppc/nintendo/dev/ahb.c

219

WR4(HW_ARMIRQMASK, val);

sys/arch/evbppc/nintendo/dev/ahb.c

276

uint32_t val;

sys/arch/evbppc/nintendo/dev/ahb.c

279

val = RD4(reg_en);

sys/arch/evbppc/nintendo/dev/ahb.c

280

val &= ~__BIT(irq % 32);

sys/arch/evbppc/nintendo/dev/ahb.c

281

WR4(reg_en, val);

sys/arch/evbppc/nintendo/dev/ahb.c

48

#define WR4(reg, val) out32(reg, val)

sys/arch/evbppc/nintendo/dev/ahcisata_ahb.c

54

#define WR4(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/ahcisata_ahb.c

55

bus_space_write_4((sc)->sc_ahcit, (sc)->sc_ahcih, (reg), (val))

sys/arch/evbppc/nintendo/dev/ahcisata_ahb.c

61

uint32_t val;

sys/arch/evbppc/nintendo/dev/ahcisata_ahb.c

64

val = RD4(sc, SATA_HCCFG_INT_REG);

sys/arch/evbppc/nintendo/dev/ahcisata_ahb.c

66

if ((val & SATA_HCCFG_INT_PORT0) != 0) {

sys/arch/evbppc/nintendo/dev/ahcisata_ahb.c

69

if ((val & SATA_HCCFG_INT_PORT1) != 0) {

sys/arch/evbppc/nintendo/dev/ahcisata_ahb.c

73

if (val != 0) {

sys/arch/evbppc/nintendo/dev/ahcisata_ahb.c

75

WR4(sc, SATA_HCCFG_INT_REG, val);

sys/arch/evbppc/nintendo/dev/avenc.c

103

vbuf[0] = (val >> 8) & 0xff;

sys/arch/evbppc/nintendo/dev/avenc.c

104

vbuf[1] = val & 0xff;

sys/arch/evbppc/nintendo/dev/avenc.c

111

avenc_write_4(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint32_t val)

sys/arch/evbppc/nintendo/dev/avenc.c

115

vbuf[0] = (val >> 24) & 0xff;

sys/arch/evbppc/nintendo/dev/avenc.c

116

vbuf[1] = (val >> 16) & 0xff;

sys/arch/evbppc/nintendo/dev/avenc.c

117

vbuf[2] = (val >> 8) & 0xff;

sys/arch/evbppc/nintendo/dev/avenc.c

118

vbuf[3] = val & 0xff;

sys/arch/evbppc/nintendo/dev/avenc.c

135

uint16_t val;

sys/arch/evbppc/nintendo/dev/avenc.c

143

val = RD2(avenc_tag, avenc_addr, AVENC_VOLUME);

sys/arch/evbppc/nintendo/dev/avenc.c

146

*left = __SHIFTOUT(val, AVENC_VOLUME_LEFT);

sys/arch/evbppc/nintendo/dev/avenc.c

147

*right = __SHIFTOUT(val, AVENC_VOLUME_RIGHT);

sys/arch/evbppc/nintendo/dev/avenc.c

153

uint16_t val;

sys/arch/evbppc/nintendo/dev/avenc.c

159

val = __SHIFTIN(left, AVENC_VOLUME_LEFT) |

sys/arch/evbppc/nintendo/dev/avenc.c

163

WR2(avenc_tag, avenc_addr, AVENC_VOLUME, val);

sys/arch/evbppc/nintendo/dev/avenc.c

70

uint8_t val;

sys/arch/evbppc/nintendo/dev/avenc.c

72

if (iic_smbus_read_byte(tag, addr, reg, &val, 0) != 0) {

sys/arch/evbppc/nintendo/dev/avenc.c

73

val = 0xff;

sys/arch/evbppc/nintendo/dev/avenc.c

76

return val;

sys/arch/evbppc/nintendo/dev/avenc.c

93

avenc_write_1(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val)

sys/arch/evbppc/nintendo/dev/avenc.c

95

iic_smbus_write_byte(tag, addr, reg, val, 0);

sys/arch/evbppc/nintendo/dev/avenc.c

99

avenc_write_2(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint16_t val)

sys/arch/evbppc/nintendo/dev/bwai.c

214

uint32_t val;

sys/arch/evbppc/nintendo/dev/bwai.c

219

val = RD4(sc, AI_CONTROL);

sys/arch/evbppc/nintendo/dev/bwai.c

220

if ((val & AI_CONTROL_PSTAT) != 0) {

sys/arch/evbppc/nintendo/dev/bwai.c

228

val = AI_CONTROL_SCRESET |

sys/arch/evbppc/nintendo/dev/bwai.c

232

WR4(sc, AI_CONTROL, val);

sys/arch/evbppc/nintendo/dev/bwai.c

234

val |= AI_CONTROL_PSTAT;

sys/arch/evbppc/nintendo/dev/bwai.c

235

WR4(sc, AI_CONTROL, val);

sys/arch/evbppc/nintendo/dev/bwai.c

86

#define WR4(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/bwai.c

87

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/bwai.c

93

uint32_t val;

sys/arch/evbppc/nintendo/dev/bwai.c

95

val = RD4(sc, AI_CONTROL);

sys/arch/evbppc/nintendo/dev/bwai.c

96

if ((val & AI_CONTROL_AIINT) != 0) {

sys/arch/evbppc/nintendo/dev/bwai.c

99

WR4(sc, AI_CONTROL, val);

sys/arch/evbppc/nintendo/dev/bwdsp.c

91

#define WR2(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/bwdsp.c

92

bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/di.c

140

#define WR4(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/di.c

141

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/di.c

475

uint32_t val;

sys/arch/evbppc/nintendo/dev/di.c

488

val = in32(HW_RESETS);

sys/arch/evbppc/nintendo/dev/di.c

489

out32(HW_RESETS, val & ~RSTB_IODI);

sys/arch/evbppc/nintendo/dev/di.c

491

out32(HW_RESETS, val | RSTB_IODI);

sys/arch/evbppc/nintendo/dev/exi.c

201

uint32_t val;

sys/arch/evbppc/nintendo/dev/exi.c

209

val = RD4(exi_softc, EXI_CSR(chan));

sys/arch/evbppc/nintendo/dev/exi.c

210

val &= ~EXI_CSR_CS;

sys/arch/evbppc/nintendo/dev/exi.c

211

val |= __SHIFTIN(__BIT(dev), EXI_CSR_CS);

sys/arch/evbppc/nintendo/dev/exi.c

212

val &= ~EXI_CSR_CLK;

sys/arch/evbppc/nintendo/dev/exi.c

213

val |= __SHIFTIN(freq, EXI_CSR_CLK);

sys/arch/evbppc/nintendo/dev/exi.c

214

WR4(exi_softc, EXI_CSR(chan), val);

sys/arch/evbppc/nintendo/dev/exi.c

221

uint32_t val;

sys/arch/evbppc/nintendo/dev/exi.c

227

val = RD4(exi_softc, EXI_CSR(chan));

sys/arch/evbppc/nintendo/dev/exi.c

228

val &= ~EXI_CSR_CS;

sys/arch/evbppc/nintendo/dev/exi.c

229

WR4(exi_softc, EXI_CSR(chan), val);

sys/arch/evbppc/nintendo/dev/exi.c

237

uint32_t val;

sys/arch/evbppc/nintendo/dev/exi.c

242

val = RD4(exi_softc, EXI_CR(chan));

sys/arch/evbppc/nintendo/dev/exi.c

243

} while ((val & EXI_CR_TSTART) != 0);

sys/arch/evbppc/nintendo/dev/exi.c

250

uint32_t val = 0;

sys/arch/evbppc/nintendo/dev/exi.c

261

val = *(const uint8_t *)data << 24;

sys/arch/evbppc/nintendo/dev/exi.c

264

val = *(const uint16_t *)data << 16;

sys/arch/evbppc/nintendo/dev/exi.c

267

val = *(const uint32_t *)data;

sys/arch/evbppc/nintendo/dev/exi.c

271

WR4(exi_softc, EXI_DATA(chan), val);

sys/arch/evbppc/nintendo/dev/exi.c

282

uint32_t val;

sys/arch/evbppc/nintendo/dev/exi.c

295

val = RD4(exi_softc, EXI_DATA(chan));

sys/arch/evbppc/nintendo/dev/exi.c

299

*(uint8_t *)data = val >> 24;

sys/arch/evbppc/nintendo/dev/exi.c

302

*(uint16_t *)data = val >> 16;

sys/arch/evbppc/nintendo/dev/exi.c

305

*(uint32_t *)data = val;

sys/arch/evbppc/nintendo/dev/exi.c

315

uint32_t val = 0;

sys/arch/evbppc/nintendo/dev/exi.c

326

val = *(const uint8_t *)dataout << 24;

sys/arch/evbppc/nintendo/dev/exi.c

329

val = *(const uint16_t *)dataout << 16;

sys/arch/evbppc/nintendo/dev/exi.c

332

val = *(const uint32_t *)dataout;

sys/arch/evbppc/nintendo/dev/exi.c

336

WR4(exi_softc, EXI_DATA(chan), val);

sys/arch/evbppc/nintendo/dev/exi.c

341

val = RD4(exi_softc, EXI_DATA(chan));

sys/arch/evbppc/nintendo/dev/exi.c

345

*(uint8_t *)datain = val >> 24;

sys/arch/evbppc/nintendo/dev/exi.c

348

*(uint16_t *)datain = val >> 16;

sys/arch/evbppc/nintendo/dev/exi.c

351

*(uint32_t *)datain = val;

sys/arch/evbppc/nintendo/dev/exi.c

79

#define WR4(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/exi.c

80

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/gecko.c

67

#define WR4(reg, val) out32(EXI_BASE + (reg), val)

sys/arch/evbppc/nintendo/dev/hwaes.c

102

#define WR4(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/hwaes.c

103

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/hwgpio.c

133

#define WR4(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/hwgpio.c

134

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/rtcsram.c

137

uint32_t val;

sys/arch/evbppc/nintendo/dev/rtcsram.c

141

exi_recv_imm(sc->sc_chan, sc->sc_device, &val, sizeof(val));

sys/arch/evbppc/nintendo/dev/rtcsram.c

144

return val;

sys/arch/evbppc/nintendo/dev/rtcsram.c

148

rtcsram_write_4(struct rtcsram_softc *sc, uint32_t offset, uint32_t val)

sys/arch/evbppc/nintendo/dev/rtcsram.c

154

exi_send_imm(sc->sc_chan, sc->sc_device, &val, sizeof(val));

sys/arch/evbppc/nintendo/dev/rtcsram.c

172

uint32_t val;

sys/arch/evbppc/nintendo/dev/rtcsram.c

174

val = rtcsram_read_4(sc, RTC_BASE);

sys/arch/evbppc/nintendo/dev/rtcsram.c

175

tv->tv_sec = (uint64_t)val;

sys/arch/evbppc/nintendo/dev/rtcsram.c

195

uint32_t val;

sys/arch/evbppc/nintendo/dev/rtcsram.c

197

val = rtcsram_read_4(sc, RTC_BASE);

sys/arch/evbppc/nintendo/dev/rtcsram.c

198

tv->tv_sec = (uint64_t)val + sc->sc_sram.counter_bias;

sys/arch/evbppc/nintendo/dev/si.c

128

#define WR4(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/si.c

129

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/wiifb.c

160

#define WR2(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/wiifb.c

161

bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/wiifb.c

162

#define WR4(sc, reg, val) \

sys/arch/evbppc/nintendo/dev/wiifb.c

163

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/evbppc/nintendo/dev/wiifb.c

165

#define CP_WRITE(sc, off, val) (sc)->sc_cp[(off)] = (val)

sys/arch/evbppc/nintendo/dev/wiifb.c

168

#define PE_WRITE(sc, off, val) (sc)->sc_pe[(off)] = (val)

sys/arch/evbppc/nintendo/dev/wiifb.c

171

#define PI_WRITE(sc, off, val) (sc)->sc_pi[(off)] = (val)

sys/arch/evbppc/nintendo/machdep.c

247

uint32_t val;

sys/arch/evbppc/nintendo/machdep.c

249

val = in32(LT_CHIPREVID);

sys/arch/evbppc/nintendo/machdep.c

250

if (__SHIFTOUT(val, LT_CHIPREVID_MAGIC) == LT_CHIPREVID_MAGIC_CAFE) {

sys/arch/evbppc/nintendo/pic_pi.c

65

#define WR4(reg, val) out32(reg, val)

sys/arch/evbppc/stand/wii/timer.c

41

uint32_t val, oval;

sys/arch/evbppc/stand/wii/timer.c

44

val = in32(HW_TIMER);

sys/arch/evbppc/stand/wii/timer.c

48

oval = val;

sys/arch/evbppc/stand/wii/timer.c

49

val = in32(HW_TIMER);

sys/arch/evbppc/stand/wii/timer.c

50

if (val >= oval) {

sys/arch/evbppc/stand/wii/timer.c

51

elapsed = val - oval;

sys/arch/evbppc/stand/wii/timer.c

53

elapsed = (UINT32_MAX - oval) + val + 1;

sys/arch/evbppc/virtex/dcr.h

78

case (addr): mtdcr((base) + (addr) / 4, val); break

sys/arch/evbppc/virtex/dcr.h

84

case (addr): val = mfdcr((base) + (addr) / 4); break

sys/arch/evbppc/virtex/design_gsrd1.c

102

uint32_t val)

sys/arch/evbppc/virtex/design_gsrd1.c

117

uint32_t val;

sys/arch/evbppc/virtex/design_gsrd1.c

128

return (val);

sys/arch/evbppc/virtex/design_gsrd1.c

133

uint32_t val)

sys/arch/evbppc/virtex/design_gsrd1.c

146

uint32_t val;

sys/arch/evbppc/virtex/design_gsrd1.c

155

return (val);

sys/arch/evbppc/virtex/design_gsrd1.c

166

uint32_t val)

sys/arch/evbppc/virtex/design_gsrd1.c

187

uint32_t val;

sys/arch/evbppc/virtex/design_gsrd1.c

204

return (val);

sys/arch/evbppc/virtex/design_gsrd1.c

211

uint32_t val)

sys/arch/evbppc/virtex/design_gsrd2.c

101

uint32_t val)

sys/arch/evbppc/virtex/design_gsrd2.c

115

uint32_t val;

sys/arch/evbppc/virtex/design_gsrd2.c

125

return (val);

sys/arch/evbppc/virtex/design_gsrd2.c

131

uint32_t val)

sys/arch/evbppc/virtex/design_gsrd2.c

145

uint32_t val;

sys/arch/evbppc/virtex/design_gsrd2.c

155

return (val);

sys/arch/evbppc/virtex/design_gsrd2.c

166

uint32_t val)

sys/arch/evbppc/virtex/design_gsrd2.c

183

uint32_t val;

sys/arch/evbppc/virtex/design_gsrd2.c

196

return (val);

sys/arch/evbppc/virtex/design_gsrd2.c

203

uint32_t val)

sys/arch/evbppc/virtex/design_gsrd2.c

216

uint32_t val;

sys/arch/evbppc/virtex/design_gsrd2.c

225

return (val);

sys/arch/evbppc/virtex/dev/if_temac.c

241

#define cdmac_rx_start(sc, val) \

sys/arch/evbppc/virtex/dev/if_temac.c

242

bus_space_write_4((sc)->sc_dma_rxt, (sc)->sc_dma_rxh, CDMAC_CURDESC, (val))

sys/arch/evbppc/virtex/dev/if_temac.c

250

#define cdmac_tx_start(sc, val) \

sys/arch/evbppc/virtex/dev/if_temac.c

251

bus_space_write_4((sc)->sc_dma_txt, (sc)->sc_dma_txh, CDMAC_CURDESC, (val))

sys/arch/evbppc/virtex/dev/if_temac.c

820

temac_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/evbppc/virtex/dev/if_temac.c

830

*val = mfidcr(IDCR_HIF_ARG0) & 0xffff;

sys/arch/evbppc/virtex/dev/if_temac.c

835

temac_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/evbppc/virtex/dev/if_temac.c

837

mtidcr(IDCR_HIF_ARG0, val);

sys/arch/evbppc/virtex/dev/pstwo.c

162

uint32_t val;

sys/arch/evbppc/virtex/dev/pstwo.c

164

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, PSTWO_RX_DATA);

sys/arch/evbppc/virtex/dev/pstwo.c

165

pckbportintr(sc->sc_pt, sc->sc_slot, DATA_RECV(val));

sys/arch/evbppc/virtex/dev/pstwo.c

192

uint32_t val = (set ? mask : 0);

sys/arch/evbppc/virtex/dev/pstwo.c

197

mask) == val) {

sys/arch/evbppc/virtex/dev/pstwo.c

236

uint32_t val;

sys/arch/evbppc/virtex/dev/pstwo.c

241

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, PSTWO_RX_DATA);

sys/arch/evbppc/virtex/dev/pstwo.c

242

return DATA_RECV(val);

sys/arch/evbppc/virtex/dev/temacreg.h

114

#define GMI_MII_ADDR_REG(val) ((val) & 0x01f)

sys/arch/evbppc/virtex/dev/temacreg.h

115

#define GMI_MII_ADDR_PHY(val) (((val) & 0x01f) << 5)

sys/arch/evbppc/virtex/dev/temacreg.h

48

#define GMAC_ERR_FRAME(val) (((val) >> 16) & 0xffff)

sys/arch/evbppc/virtex/dev/temacreg.h

49

#define GMAC_ERR_OVERRUN(val) ((val) & 0xffff)

sys/arch/evbppc/virtex/idcr.h

79

#define mtidcr(addr, val) mtdcr(IDCR_BASE + (addr), (val))

sys/arch/evbppc/walnut/dev/ds1743.c

196

ds1743_ram_write(struct dsrtc_softc *sc, int addr, u_char val)

sys/arch/evbppc/walnut/dev/ds1743.c

201

ds1743_write(sc, addr, val);

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

254

uint8_t val, bus_size_t count);

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

256

uint16_t val, bus_size_t count);

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

258

uint32_t val, bus_size_t count);

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

260

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

262

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

264

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

673

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

678

*p = val;

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

684

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

689

*dest = val;

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

695

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

700

*dest = val;

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

706

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

711

*addr++ = val;

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

717

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

722

*dest++ = val;

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

728

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_space.c

733

*dest++ = val;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

254

uint8_t val, bus_size_t count);

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

256

uint16_t val, bus_size_t count);

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

258

uint32_t val, bus_size_t count);

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

260

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

262

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

264

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

605

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

610

*p = val;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

616

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

621

src[0] = val & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

622

src[1] = (val >> 8) & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

632

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

637

src[0] = val & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

638

src[1] = (val >> 8) & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

639

src[2] = (val >> 16) & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

640

src[3] = (val >> 24) & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

652

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

657

*addr++ = val;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

663

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

668

src[0] = val & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

669

src[1] = (val >> 8) & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

679

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

684

src[0] = val & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

685

src[1] = (val >> 8) & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

686

src[2] = (val >> 16) & 0xff;

sys/arch/evbsh3/t_sh7706lan/t_sh7706lan_space.c

687

src[3] = (val >> 24) & 0xff;

sys/arch/ews4800mips/dev/ga.c

66

#define ga_reg_write(ga, ofs, val) \

sys/arch/ews4800mips/dev/ga.c

67

(*(volatile uint32_t *)((ga)->reg_addr + (ofs)) = (val))

sys/arch/ews4800mips/dev/zs.c

187

uint8_t val;

sys/arch/ews4800mips/dev/zs.c

191

val = *cs->cs_reg_csr;

sys/arch/ews4800mips/dev/zs.c

193

return val;

sys/arch/ews4800mips/dev/zs.c

197

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/ews4800mips/dev/zs.c

202

*cs->cs_reg_csr = val;

sys/arch/ews4800mips/dev/zs.c

209

uint8_t val;

sys/arch/ews4800mips/dev/zs.c

211

val = *cs->cs_reg_csr;

sys/arch/ews4800mips/dev/zs.c

213

return val;

sys/arch/ews4800mips/dev/zs.c

217

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/ews4800mips/dev/zs.c

220

*cs->cs_reg_csr = val;

sys/arch/ews4800mips/dev/zs.c

227

uint8_t val;

sys/arch/ews4800mips/dev/zs.c

229

val = *cs->cs_reg_data;

sys/arch/ews4800mips/dev/zs.c

231

return val;

sys/arch/ews4800mips/dev/zs.c

235

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/ews4800mips/dev/zs.c

238

*cs->cs_reg_data = val;

sys/arch/ews4800mips/include/z8530var.h

101

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/ews4800mips/include/z8530var.h

102

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/ews4800mips/include/z8530var.h

103

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/ews4800mips/sbd/if_le_sbdio.c

154

le_sbdio_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/ews4800mips/sbd/if_le_sbdio.c

159

bus_space_write_2(lesc->sc_bst, lesc->sc_bsh, LEREG1_RDP, val);

sys/arch/ews4800mips/stand/common/cons_zs.c

63

#define ZS_WRITE_REG(zs, reg, val) \

sys/arch/ews4800mips/stand/common/cons_zs.c

66

*zs.csr = val; \

sys/arch/hp300/dev/dio.c

402

bus_size_t offset, uint8_t val)

sys/arch/hp300/dev/dio.c

405

*(volatile uint8_t *)(bsh + (offset << 1) + 1) = val;

sys/arch/hp300/dev/dio.c

480

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/hp300/dev/dio.c

490

: "r" (bsh + (offset << 1) + 1), "g" (val), "g" (count)

sys/arch/hp300/dev/dio.c

496

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/hp300/dev/dio.c

508

: "r" (bsh + (offset << 1) + 1), "g" (val), "g" (count)

sys/arch/hp300/dev/frodo.c

415

bus_size_t offset, uint8_t val)

sys/arch/hp300/dev/frodo.c

418

*(volatile uint8_t *)(bsh + (offset << 2)) = val;

sys/arch/hp300/dev/frodo.c

494

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/hp300/dev/frodo.c

504

: "r" (bsh + (offset << 2)), "g" (val), "g" (count)

sys/arch/hp300/dev/frodo.c

510

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/hp300/dev/frodo.c

522

: "r" (bsh + (offset << 2)), "g" (val), "g" (count)

sys/arch/hp300/dev/frodoreg.h

80

#define FRODO_WRITE(sc, reg, val) (sc)->sc_regs[(reg)] = (val)

sys/arch/hp300/dev/frodoreg.h

86

#define FRODO_SETMASK(sc, val) do { \

sys/arch/hp300/dev/frodoreg.h

87

FRODO_WRITE((sc), FRODO_PIC_MU, ((val) >> 8) & 0xff); \

sys/arch/hp300/dev/frodoreg.h

88

FRODO_WRITE((sc), FRODO_PIC_ML, (val) & 0xff); } while (0)

sys/arch/hp300/dev/if_le.c

123

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/hp300/dev/if_le.c

134

bus_space_write_2(bst, bsh1, LER1_RDP, val);

sys/arch/hp300/dev/if_le.c

145

uint16_t val;

sys/arch/hp300/dev/if_le.c

151

val = bus_space_read_2(bst, bsh1, LER1_RDP);

sys/arch/hp300/dev/if_le.c

154

return val;

sys/arch/hp300/include/bus.h

555

#define bus_space_set_multi_1(t, h, o, val, c) \

sys/arch/hp300/include/bus.h

558

((t)->bssm1)(t, h, o, val, c); \

sys/arch/hp300/include/bus.h

568

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/hp300/include/bus.h

573

#define bus_space_set_multi_2(t, h, o, val, c) \

sys/arch/hp300/include/bus.h

576

((t)->bssm2)(t, h, o, val, c); \

sys/arch/hp300/include/bus.h

586

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/hp300/include/bus.h

591

#define bus_space_set_multi_4(t, h, o, val, c) \

sys/arch/hp300/include/bus.h

594

((t)->bssm4)(t, h, o, val, c); \

sys/arch/hp300/include/bus.h

604

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/hp300/include/bus.h

618

#define bus_space_set_region_1(t, h, o, val, c) \

sys/arch/hp300/include/bus.h

621

((t)->bssr1)(t, h, o, val, c); \

sys/arch/hp300/include/bus.h

631

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/hp300/include/bus.h

636

#define bus_space_set_region_2(t, h, o, val, c) \

sys/arch/hp300/include/bus.h

639

((t)->bssr2)(t, h, o, val, c); \

sys/arch/hp300/include/bus.h

649

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/hp300/include/bus.h

654

#define bus_space_set_region_4(t, h, o, val, c) \

sys/arch/hp300/include/bus.h

658

((t)->bssr4)(t, h, o, val, c); \

sys/arch/hp300/include/bus.h

668

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/hp300/stand/common/if_le.c

123

lewrcsr(struct le_softc *sc, uint16_t port, uint16_t val)

sys/arch/hp300/stand/common/if_le.c

132

ler1->ler1_rdp = val;

sys/arch/hp300/stand/common/if_le.c

141

uint16_t val;

sys/arch/hp300/stand/common/if_le.c

147

val = ler1->ler1_rdp;

sys/arch/hp300/stand/common/if_le.c

149

return val;

sys/arch/hpc/hpc/platid_gen/gram.y

162

new_node(type, val, ptr1, ptr2, link)

sys/arch/hpc/hpc/platid_gen/gram.y

164

int val;

sys/arch/hpc/hpc/platid_gen/gram.y

172

res->val = val;

sys/arch/hpc/hpc/platid_gen/gram.y

197

if (n->val == 0)

sys/arch/hpc/hpc/platid_gen/gram.y

201

prefix, n->ptr1, n->val, n->ptr2);

sys/arch/hpc/hpc/platid_gen/gram.y

57

(l)->val++; \

sys/arch/hpc/hpc/platid_gen/gram.y

65

int val;

sys/arch/hpc/hpc/platid_gen/gram.y

76

%type <val>name_prefix

sys/arch/hpc/hpc/platid_gen/platid_gen.c

315

np->val = 1;

sys/arch/hpc/hpc/platid_gen/platid_gen.c

325

nest, 1, "", nest - np->val);

sys/arch/hpc/hpc/platid_gen/platid_gen.h

39

int val;

sys/arch/hpc/stand/hpcboot/arch.cpp

123

uint32_t val = 0;

sys/arch/hpc/stand/hpcboot/memory.cpp

239

uint32_t val = *(uint32_t *)v;

sys/arch/hpc/stand/hpcboot/memory.cpp

241

return val;

sys/arch/hpc/stand/hpcboot/sh3/dev/sh3_dev.cpp

610

uint16_t val;

sys/arch/hpc/stand/hpcboot/sh3/dev/sh3_dev.cpp

615

val = VOLATILE_REF16(SH7707_LCDDMR);

sys/arch/hpc/stand/hpcboot/sh3/dev/sh3_dev.cpp

616

sh7707_fb_dma_addr = val;

sys/arch/hpc/stand/hpcboot/sh3/dev/sh3_dev.cpp

618

val = VOLATILE_REF16(SH7707_LCDDMR);

sys/arch/hpc/stand/hpcboot/sh3/dev/sh3_dev.cpp

619

sh7707_fb_dma_addr |= (val << 16);

sys/arch/hpcarm/dev/j720lcd.c

223

int val;

sys/arch/hpcarm/dev/j720lcd.c

240

val = sc->sc_contrast;

sys/arch/hpcarm/dev/j720lcd.c

241

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_CONTRAST, &val);

sys/arch/hpcarm/dev/j720lcd.c

248

val = sc->sc_brightness;

sys/arch/hpcarm/dev/j720lcd.c

249

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_BRIGHTNESS, &val);

sys/arch/hpcarm/dev/j720lcd.c

262

val = -2;

sys/arch/hpcarm/dev/j720lcd.c

263

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_BRIGHTNESS, &val);

sys/arch/hpcarm/dev/j720pwr.c

240

int val, tmp, i, state = 0;

sys/arch/hpcarm/dev/j720pwr.c

247

val = j720pwr_get_battery(ctx);

sys/arch/hpcarm/dev/j720pwr.c

249

if (val != -1) {

sys/arch/hpcarm/dev/j720pwr.c

251

if (val > battery_table[i].value)

sys/arch/hpcarm/dev/j720pwr.c

261

tmp = ((val - battery_table[i].value) * 100) /

sys/arch/hpcarm/dev/j720pwr.c

276

val = j720pwr_get_battery(ctx);

sys/arch/hpcarm/dev/j720pwr.c

278

if (val != -1) {

sys/arch/hpcarm/dev/j720pwr.c

280

if (val > battery_table[i].value) {

sys/arch/hpcarm/dev/sed_saip.c

572

int val = -1;

sys/arch/hpcarm/dev/sed_saip.c

578

CONFIG_HOOK_POWER_LCDLIGHT, &val) != -1) {

sys/arch/hpcarm/dev/sed_saip.c

580

VPRINTF(("sed1356_init_backlight: real backlight=%d\n", val));

sys/arch/hpcarm/dev/sed_saip.c

581

if (val == 0)

sys/arch/hpcarm/dev/sed_saip.c

603

int val = -1;

sys/arch/hpcarm/dev/sed_saip.c

610

CONFIG_HOOK_BRIGHTNESS_MAX, &val) != -1) {

sys/arch/hpcarm/dev/sed_saip.c

613

"real brightness max=%d\n", val));

sys/arch/hpcarm/dev/sed_saip.c

614

sc->sc_max_brightness = val;

sys/arch/hpcarm/dev/sed_saip.c

615

val = -1;

sys/arch/hpcarm/dev/sed_saip.c

617

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/arch/hpcarm/dev/sed_saip.c

620

"real brightness=%d\n", val));

sys/arch/hpcarm/dev/sed_saip.c

621

sc->sc_brightness_save = sc->sc_brightness = val;

sys/arch/hpcarm/dev/sed_saip.c

645

int val = -1;

sys/arch/hpcarm/dev/sed_saip.c

652

CONFIG_HOOK_CONTRAST_MAX, &val) != -1) {

sys/arch/hpcarm/dev/sed_saip.c

655

"real contrast max=%d\n", val));

sys/arch/hpcarm/dev/sed_saip.c

656

sc->sc_max_contrast = val;

sys/arch/hpcarm/dev/sed_saip.c

657

val = -1;

sys/arch/hpcarm/dev/sed_saip.c

659

CONFIG_HOOK_CONTRAST, &val) != -1) {

sys/arch/hpcarm/dev/sed_saip.c

662

"real contrast=%d\n", val));

sys/arch/hpcarm/dev/sed_saip.c

663

sc->sc_contrast = val;

sys/arch/hpcarm/dev/sed_saip.c

683

sed1356_set_brightness(struct sed1356_softc *sc, int val)

sys/arch/hpcarm/dev/sed_saip.c

685

sc->sc_brightness = val;

sys/arch/hpcarm/dev/sed_saip.c

687

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_BRIGHTNESS, &val);

sys/arch/hpcarm/dev/sed_saip.c

689

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/arch/hpcarm/dev/sed_saip.c

690

sc->sc_brightness = val;

sys/arch/hpcarm/dev/sed_saip.c

695

sed1356_set_contrast(struct sed1356_softc *sc, int val)

sys/arch/hpcarm/dev/sed_saip.c

697

sc->sc_contrast = val;

sys/arch/hpcarm/dev/sed_saip.c

699

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_CONTRAST, &val);

sys/arch/hpcarm/dev/sed_saip.c

701

CONFIG_HOOK_CONTRAST, &val) != -1) {

sys/arch/hpcarm/dev/sed_saip.c

702

sc->sc_contrast = val;

sys/arch/hpcarm/dev/uda1341.c

106

#define GPIO_WRITE(sc, reg, val) \

sys/arch/hpcarm/dev/uda1341.c

107

bus_space_write_4(sc->sc_iot, sc->sc_parent->sc_gpioh, reg, val)

sys/arch/hpcarm/dev/uda1341.c

113

#define SSP_WRITE(sc, reg, val) \

sys/arch/hpcarm/dev/uda1341.c

114

bus_space_write_4(sc->sc_iot, sc->sc_parent->sc_ssph, reg, val)

sys/arch/hpcarm/dev/uda1341.h

115

#define DATA_E0_MA(val) ((((val) + 1) * 31) / 100)

sys/arch/hpcarm/dev/uda1341.h

117

#define DATA_E1_MB(val) ((((val) + 1) * 31) / 100)

sys/arch/hpcarm/dev/uda1341.h

119

#define DATA_E2_MS(val) (((((val) + 1) * 6) / 100) << 3)

sys/arch/hpcarm/dev/uda1341.h

127

#define DATA_E3_IG_L(val) (((val * 127) / 100) & 3)

sys/arch/hpcarm/dev/uda1341.h

129

#define DATA_E4_IG_H(val) (((val * 127) / 100) >> 2)

sys/arch/hpcarm/dev/uda1341.h

131

#define DATA_E5_AL(val) (((val + 1) * 3) / 100)

sys/arch/hpcarm/dev/uda1341.h

88

#define DATA0_VC(val) (63 - (((val)+1) * 63) / 100)

sys/arch/hpcarm/dev/uda1341.h

92

#define DATA1_BB(val) (((((val)+1) * 15) / 100) << 3)

sys/arch/hpcarm/dev/uda1341.h

94

#define DATA1_TR(val) ((((val)+1) * 3) / 100)

sys/arch/hpcmips/dev/it8368.c

309

u_int16_t val;

sys/arch/hpcmips/dev/it8368.c

311

val = bus_space_read_2(t, h, ofs);

sys/arch/hpcmips/dev/it8368.c

312

return (0xffff & (((val >> 8) & 0xff)|((val << 8) & 0xff00)));

sys/arch/hpcmips/dev/it8368.c

318

u_int16_t val;

sys/arch/hpcmips/dev/it8368.c

320

val = 0xffff & (((v >> 8) & 0xff)|((v << 8) & 0xff00));

sys/arch/hpcmips/dev/it8368.c

321

bus_space_write_2(t, h, ofs, val);

sys/arch/hpcmips/dev/ite8181.c

1018

ite8181_set_brightness(struct ite8181_softc *sc, int val)

sys/arch/hpcmips/dev/ite8181.c

1021

sc->sc_brightness = val;

sys/arch/hpcmips/dev/ite8181.c

1023

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_BRIGHTNESS, &val);

sys/arch/hpcmips/dev/ite8181.c

1025

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/arch/hpcmips/dev/ite8181.c

1026

sc->sc_brightness = val;

sys/arch/hpcmips/dev/ite8181.c

1031

ite8181_set_contrast(struct ite8181_softc *sc, int val)

sys/arch/hpcmips/dev/ite8181.c

1034

sc->sc_contrast = val;

sys/arch/hpcmips/dev/ite8181.c

1036

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_CONTRAST, &val);

sys/arch/hpcmips/dev/ite8181.c

1038

CONFIG_HOOK_CONTRAST, &val) != -1) {

sys/arch/hpcmips/dev/ite8181.c

1039

sc->sc_contrast = val;

sys/arch/hpcmips/dev/ite8181.c

903

int val = -1;

sys/arch/hpcmips/dev/ite8181.c

909

CONFIG_HOOK_POWER_LCDLIGHT, &val) != -1) {

sys/arch/hpcmips/dev/ite8181.c

911

VPRINTF(("ite8181_init_backlight: real backlight=%d\n", val));

sys/arch/hpcmips/dev/ite8181.c

912

if (val == 0)

sys/arch/hpcmips/dev/ite8181.c

934

int val = -1;

sys/arch/hpcmips/dev/ite8181.c

941

CONFIG_HOOK_BRIGHTNESS_MAX, &val) != -1) {

sys/arch/hpcmips/dev/ite8181.c

944

val));

sys/arch/hpcmips/dev/ite8181.c

945

sc->sc_max_brightness = val;

sys/arch/hpcmips/dev/ite8181.c

946

val = -1;

sys/arch/hpcmips/dev/ite8181.c

948

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/arch/hpcmips/dev/ite8181.c

951

" real brightness=%d\n", val));

sys/arch/hpcmips/dev/ite8181.c

952

sc->sc_brightness_save = sc->sc_brightness = val;

sys/arch/hpcmips/dev/ite8181.c

978

int val = -1;

sys/arch/hpcmips/dev/ite8181.c

985

CONFIG_HOOK_CONTRAST_MAX, &val) != -1) {

sys/arch/hpcmips/dev/ite8181.c

987

VPRINTF(("ite8181_init_contrast: real contrast max=%d\n", val));

sys/arch/hpcmips/dev/ite8181.c

988

sc->sc_max_contrast = val;

sys/arch/hpcmips/dev/ite8181.c

989

val = -1;

sys/arch/hpcmips/dev/ite8181.c

991

CONFIG_HOOK_CONTRAST, &val) != -1) {

sys/arch/hpcmips/dev/ite8181.c

994

val));

sys/arch/hpcmips/dev/ite8181.c

995

sc->sc_contrast = val;

sys/arch/hpcmips/dev/mq200.c

722

int val = -1;

sys/arch/hpcmips/dev/mq200.c

728

CONFIG_HOOK_POWER_LCDLIGHT, &val) != -1) {

sys/arch/hpcmips/dev/mq200.c

730

VPRINTF("init_backlight: real backlight=%d\n", val);

sys/arch/hpcmips/dev/mq200.c

731

if (val == 0)

sys/arch/hpcmips/dev/mq200.c

753

int val = -1;

sys/arch/hpcmips/dev/mq200.c

760

CONFIG_HOOK_BRIGHTNESS_MAX, &val) != -1) {

sys/arch/hpcmips/dev/mq200.c

762

VPRINTF("init_brightness: real brightness max=%d\n", val);

sys/arch/hpcmips/dev/mq200.c

763

sc->sc_max_brightness = val;

sys/arch/hpcmips/dev/mq200.c

764

val = -1;

sys/arch/hpcmips/dev/mq200.c

766

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/arch/hpcmips/dev/mq200.c

768

VPRINTF("init_brightness: real brightness=%d\n", val);

sys/arch/hpcmips/dev/mq200.c

769

sc->sc_brightness_save = sc->sc_brightness = val;

sys/arch/hpcmips/dev/mq200.c

796

int val = -1;

sys/arch/hpcmips/dev/mq200.c

803

CONFIG_HOOK_CONTRAST_MAX, &val) != -1) {

sys/arch/hpcmips/dev/mq200.c

805

VPRINTF("init_contrast: real contrast max=%d\n", val);

sys/arch/hpcmips/dev/mq200.c

806

sc->sc_max_contrast = val;

sys/arch/hpcmips/dev/mq200.c

807

val = -1;

sys/arch/hpcmips/dev/mq200.c

809

CONFIG_HOOK_CONTRAST, &val) != -1) {

sys/arch/hpcmips/dev/mq200.c

811

VPRINTF("init_contrast: real contrast=%d\n", val);

sys/arch/hpcmips/dev/mq200.c

812

sc->sc_contrast = val;

sys/arch/hpcmips/dev/mq200.c

835

mq200_set_brightness(struct mq200_softc *sc, int val)

sys/arch/hpcmips/dev/mq200.c

837

sc->sc_brightness = val;

sys/arch/hpcmips/dev/mq200.c

839

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_BRIGHTNESS, &val);

sys/arch/hpcmips/dev/mq200.c

841

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/arch/hpcmips/dev/mq200.c

842

sc->sc_brightness = val;

sys/arch/hpcmips/dev/mq200.c

847

mq200_set_contrast(struct mq200_softc *sc, int val)

sys/arch/hpcmips/dev/mq200.c

849

sc->sc_contrast = val;

sys/arch/hpcmips/dev/mq200.c

851

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_CONTRAST, &val);

sys/arch/hpcmips/dev/mq200.c

853

CONFIG_HOOK_CONTRAST, &val) != -1) {

sys/arch/hpcmips/dev/mq200.c

854

sc->sc_contrast = val;

sys/arch/hpcmips/dev/mq200machdep.c

199

sc->sc_regctxs[MQ200_I_DCMISC ].val = mdp->md_init_dcmisc;

sys/arch/hpcmips/dev/mq200machdep.c

200

sc->sc_regctxs[MQ200_I_PMC ].val = mdp->md_init_pmc;

sys/arch/hpcmips/dev/mq200machdep.c

201

sc->sc_regctxs[MQ200_I_MM01 ].val = mdp->md_init_mm01;

sys/arch/hpcmips/dev/mq200priv.h

124

reg->val = data;

sys/arch/hpcmips/dev/mq200priv.h

125

mq200_writex(sc, reg->offset, reg->val);

sys/arch/hpcmips/dev/mq200priv.h

141

reg->val &= ~mask;

sys/arch/hpcmips/dev/mq200priv.h

142

reg->val |= data;

sys/arch/hpcmips/dev/mq200priv.h

143

mq200_writex(sc, reg->offset, reg->val);

sys/arch/hpcmips/dev/mq200var.h

84

u_int32_t val;

sys/arch/hpcmips/dev/plumpcmciareg.h

184

#define PLUM_PCMCIA_MEMWINCTRL_MAP_SET(cr, val) \

sys/arch/hpcmips/dev/plumpcmciareg.h

185

((cr) | (((val) << PLUM_PCMCIA_MEMWINCTRL_MAP_SHIFT) & \

sys/arch/hpcmips/dev/plumpcmciareg.h

204

#define PLUM_PCMCIA_MEMWINCTRL_TIMING_SET(cr, val) \

sys/arch/hpcmips/dev/plumpcmciareg.h

205

((cr) | (((val) << PLUM_PCMCIA_MEMWINCTRL_TIMING_SHIFT) & \

sys/arch/hpcmips/dev/plumvideo.c

713

plumreg_t val, gmode;

sys/arch/hpcmips/dev/plumvideo.c

716

val = bus_space_read_4(regt, regh, PLUM_VIDEO_PLGMD_REG);

sys/arch/hpcmips/dev/plumvideo.c

717

gmode = val & PLUM_VIDEO_PLGMD_GMODE_MASK;

sys/arch/hpcmips/dev/plumvideo.c

718

val &= ~PLUM_VIDEO_PLGMD_GMODE_MASK;

sys/arch/hpcmips/dev/plumvideo.c

719

bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val);

sys/arch/hpcmips/dev/plumvideo.c

722

val &= ~PLUM_VIDEO_PLGMD_PALETTE_ENABLE;

sys/arch/hpcmips/dev/plumvideo.c

723

bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val);

sys/arch/hpcmips/dev/plumvideo.c

726

val &= ~PLUM_VIDEO_PLGMD_MODE_DISPLAY;

sys/arch/hpcmips/dev/plumvideo.c

727

bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val);

sys/arch/hpcmips/dev/plumvideo.c

733

val |= PLUM_VIDEO_PLGMD_MODE_DISPLAY;

sys/arch/hpcmips/dev/plumvideo.c

734

bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val);

sys/arch/hpcmips/dev/plumvideo.c

737

val |= PLUM_VIDEO_PLGMD_PALETTE_ENABLE;

sys/arch/hpcmips/dev/plumvideo.c

738

bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val);

sys/arch/hpcmips/dev/plumvideo.c

741

val |= gmode;

sys/arch/hpcmips/dev/plumvideo.c

742

bus_space_write_4(regt, regh, PLUM_VIDEO_PLGMD_REG, val);

sys/arch/hpcmips/dev/plumvideo.c

783

int val;

sys/arch/hpcmips/dev/plumvideo.c

785

val = -1;

sys/arch/hpcmips/dev/plumvideo.c

787

CONFIG_HOOK_POWER_LCDLIGHT, &val) != -1) {

sys/arch/hpcmips/dev/plumvideo.c

789

sc->sc_backlight = val;

sys/arch/hpcmips/dev/plumvideo.c

792

val = -1;

sys/arch/hpcmips/dev/plumvideo.c

794

CONFIG_HOOK_BRIGHTNESS_MAX, &val) != -1) {

sys/arch/hpcmips/dev/plumvideo.c

796

sc->sc_max_brightness = val;

sys/arch/hpcmips/dev/plumvideo.c

798

val = -1;

sys/arch/hpcmips/dev/plumvideo.c

800

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/arch/hpcmips/dev/plumvideo.c

802

sc->sc_brightness = val;

sys/arch/hpcmips/dev/plumvideo.c

838

plumvideo_brightness(struct plumvideo_softc *sc, int val)

sys/arch/hpcmips/dev/plumvideo.c

841

sc->sc_brightness = val;

sys/arch/hpcmips/dev/plumvideo.c

845

CONFIG_HOOK_BRIGHTNESS, &val);

sys/arch/hpcmips/dev/tc5165buf.c

224

int i, j, type, val;

sys/arch/hpcmips/dev/tc5165buf.c

244

val = j * TC5165_COLUMN_MAX + i;

sys/arch/hpcmips/dev/tc5165buf.c

247

type, val);

sys/arch/hpcmips/dev/teliosio.c

198

teliosio_brightness(struct teliosio_softc *sc, int val)

sys/arch/hpcmips/dev/teliosio.c

204

if (val < 0)

sys/arch/hpcmips/dev/teliosio.c

205

val = 0;

sys/arch/hpcmips/dev/teliosio.c

206

else if (val > MAX_BRIGHTNESS)

sys/arch/hpcmips/dev/teliosio.c

207

val = MAX_BRIGHTNESS;

sys/arch/hpcmips/dev/teliosio.c

208

sc->sc_brightness = val;

sys/arch/hpcmips/dev/teliosio.c

211

if (val)

sys/arch/hpcmips/dev/teliosio.c

217

BRIGHTNESSVAL(val));

sys/arch/hpcmips/dev/teliosio.c

238

int val;

sys/arch/hpcmips/dev/teliosio.c

242

val = teliosio_mbu_read(tc);

sys/arch/hpcmips/dev/teliosio.c

245

return val;

sys/arch/hpcmips/dev/teliosio.c

251

teliosio_mbu_write(tx_chipset_tag_t tc, int val)

sys/arch/hpcmips/dev/teliosio.c

261

if (val & mask)

sys/arch/hpcmips/dev/teliosio.c

283

int mask, val;

sys/arch/hpcmips/dev/teliosio.c

285

val = 0;

sys/arch/hpcmips/dev/teliosio.c

297

val |= mask;

sys/arch/hpcmips/dev/teliosio.c

304

return val;

sys/arch/hpcmips/dev/ucb1200reg.h

106

#define UCB1200_AUDIOCTRLA_GAIN_SET(cr, val) \

sys/arch/hpcmips/dev/ucb1200reg.h

107

((cr) | (((val) << UCB1200_AUDIOCTRLA_GAIN_SHIFT) & \

sys/arch/hpcmips/dev/ucb1200reg.h

123

#define UCB1200_AUDIOCTRLB_ATT_SET(cr, val) \

sys/arch/hpcmips/dev/ucb1200reg.h

124

((cr) | (((val) << UCB1200_AUDIOCTRLB_ATT_SHIFT) & \

sys/arch/hpcmips/dev/ucb1200reg.h

193

#define UCB1200_ADCCTRL_INPUT_SET(cr, val) \

sys/arch/hpcmips/dev/ucb1200reg.h

194

((cr) | (((val) << UCB1200_ADCCTRL_INPUT_SHIFT) & \

sys/arch/hpcmips/dev/ucb1200reg.h

70

#define UCB1200_TELECOMCTRLA_DIV_SET(cr, val) \

sys/arch/hpcmips/dev/ucb1200reg.h

71

((cr) | (((val) << UCB1200_TELECOMCTRLA_DIV_SHIFT) & \

sys/arch/hpcmips/dev/ucb1200reg.h

97

#define UCB1200_AUDIOCTRLA_DIV_SET(cr, val) \

sys/arch/hpcmips/dev/ucb1200reg.h

98

((cr) | (((val) << UCB1200_AUDIOCTRLA_DIV_SHIFT) & \

sys/arch/hpcmips/hpcmips/bus_space.c

404

size_t size, u_int32_t val)

sys/arch/hpcmips/hpcmips/bus_space.c

412

bus_space_write_1(t, bsh, offset, val);

sys/arch/hpcmips/hpcmips/bus_space.c

415

bus_space_write_2(t, bsh, offset, val);

sys/arch/hpcmips/hpcmips/bus_space.c

418

bus_space_write_4(t, bsh, offset, val);

sys/arch/hpcmips/hpcmips/bus_space_through.c

126

bus_size_t offset, size_t size, u_int32_t val)

sys/arch/hpcmips/hpcmips/bus_space_through.c

128

return bus_space_poke(t->bs_base, bsh, offset, size, val);

sys/arch/hpcmips/include/bus.h

592

bus_size_t offset, size_t len, u_int32_t val)

sys/arch/hpcmips/stand/lcboot/extern.h

102

#define bus_space_write_1(iot, ioh, off, val) REGWRITE_1((ioh), (off), (val))

sys/arch/hpcmips/stand/lcboot/extern.h

103

#define bus_space_write_2(iot, ioh, off, val) REGWRITE_2((ioh), (off), (val))

sys/arch/hpcmips/stand/lcboot/extern.h

104

#define bus_space_write_4(iot, ioh, off, val) REGWRITE_4((ioh), (off), (val))

sys/arch/hpcmips/stand/lcboot/extern.h

83

#define REGWRITE_1(base, off, val) \

sys/arch/hpcmips/stand/lcboot/extern.h

85

= (val))

sys/arch/hpcmips/stand/lcboot/extern.h

86

#define REGWRITE_2(base, off, val) \

sys/arch/hpcmips/stand/lcboot/extern.h

88

= (val))

sys/arch/hpcmips/stand/lcboot/extern.h

89

#define REGWRITE_4(base, off, val) \

sys/arch/hpcmips/stand/lcboot/extern.h

91

= (val))

sys/arch/hpcmips/stand/lcboot/if_cs.c

74

#define CS_WRITE_1(off, val) REGWRITE_1(CS_IO_BASE, (off), (val))

sys/arch/hpcmips/stand/lcboot/if_cs.c

75

#define CS_WRITE_2(off, val) REGWRITE_2(CS_IO_BASE, (off), (val))

sys/arch/hpcmips/stand/lcboot/if_cs.c

79

#define CS_WRITE_PACKET_PAGE(off, val) \

sys/arch/hpcmips/stand/lcboot/if_cs.c

81

REGWRITE_2(CS_IO_BASE, PORT_PKTPG_DATA, (val)))

sys/arch/hpcmips/stand/pbsdboot/disptest.c

145

unsigned long val;

sys/arch/hpcmips/stand/pbsdboot/disptest.c

231

desc->val = *(unsigned char*)(desc->physaddr | 0xa0000000);

sys/arch/hpcmips/stand/pbsdboot/disptest.c

234

desc->val = *(unsigned short*)(desc->physaddr | 0xa0000000);

sys/arch/hpcmips/stand/pbsdboot/disptest.c

237

desc->val = *(unsigned long*)(desc->physaddr | 0xa0000000);

sys/arch/hpcmips/stand/pbsdboot/disptest.c

244

desc->val &= desc->mask;

sys/arch/hpcmips/stand/pbsdboot/disptest.c

255

test_regs[i].preval = test_regs[i].val;

sys/arch/hpcmips/stand/pbsdboot/disptest.c

261

if (test_regs[i].val != test_regs[i].preval) {

sys/arch/hpcmips/stand/pbsdboot/disptest.c

266

test_regs[i].val);

sys/arch/hpcmips/stand/pbsdboot/disptest.c

267

test_regs[i].preval = test_regs[i].val;

sys/arch/hpcmips/stand/pbsdboot/disptest.c

536

u_int32_t addr, val;

sys/arch/hpcmips/stand/pbsdboot/disptest.c

580

val = VRPCIU_CONFD;

sys/arch/hpcmips/stand/pbsdboot/disptest.c

582

i, addrs[i], val & 0xffff, (val >> 16) & 0xffff);

sys/arch/hpcmips/stand/pbsdboot/tx39xx.c

57

tx_conf_write(tx_chipset_tag_t t, int reg, u_int32_t val)

sys/arch/hpcmips/stand/pbsdboot/tx39xx.c

60

*((u_int32_t*)(__tx39conf_addr +reg)) = val;

sys/arch/hpcmips/tx/tx3912video.c

142

txreg_t val;

sys/arch/hpcmips/tx/tx3912video.c

157

val = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG);

sys/arch/hpcmips/tx/tx3912video.c

158

val &= ~TX3912_VIDEOCTRL1_INVVID;

sys/arch/hpcmips/tx/tx3912video.c

159

tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, val);

sys/arch/hpcmips/tx/tx3912video.c

212

txreg_t val;

sys/arch/hpcmips/tx/tx3912video.c

220

val = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG);

sys/arch/hpcmips/tx/tx3912video.c

221

val |= (TX3912_VIDEOCTRL1_DISPON | TX3912_VIDEOCTRL1_ENVID);

sys/arch/hpcmips/tx/tx3912video.c

222

tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, val);

sys/arch/hpcmips/tx/tx3912video.c

228

val = tx_conf_read(tc, TX3912_VIDEOCTRL1_REG);

sys/arch/hpcmips/tx/tx3912video.c

229

val &= ~(TX3912_VIDEOCTRL1_DISPON | TX3912_VIDEOCTRL1_ENVID);

sys/arch/hpcmips/tx/tx3912video.c

230

tx_conf_write(tc, TX3912_VIDEOCTRL1_REG, val);

sys/arch/hpcmips/tx/tx3912video.c

441

u_int32_t val;

sys/arch/hpcmips/tx/tx3912video.c

447

val = TX3912_VIDEOCTRL1_BITSEL(reg);

sys/arch/hpcmips/tx/tx3912video.c

449

if ((val == TX3912_VIDEOCTRL1_BITSEL_8BITCOLOR) && !split) {

sys/arch/hpcmips/tx/tx3912videoreg.h

121

#define TX3912_VIDEOCTRL2_VIDRATE_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

122

((cr) | (((val) << TX3912_VIDEOCTRL2_VIDRATE_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

135

#define TX3912_VIDEOCTRL2_HORZVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

136

((cr) | (((val) << TX3912_VIDEOCTRL2_HORZVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

149

#define TX3912_VIDEOCTRL2_LINEVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

150

((cr) | (((val) << TX3912_VIDEOCTRL2_LINEVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

162

#define TX3912_VIDEOCTRL3_VIDBANK_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

163

((cr) | (((val) << TX3912_VIDEOCTRL3_VIDBANK_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

172

#define TX3912_VIDEOCTRL3_VIDBASEHI_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

173

((cr) | (((val) << TX3912_VIDEOCTRL3_VIDBASEHI_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

189

#define TX3912_VIDEOCTRL4_DFVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

190

((cr) | (((val) << TX3912_VIDEOCTRL4_DFVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

198

#define TX3912_VIDEOCTRL4_FRAMEMASKVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

199

((cr) | (((val) << TX3912_VIDEOCTRL4_FRAMEMASKVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

207

#define TX3912_VIDEOCTRL4_VIDBASELO_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

208

((cr) | (((val) << TX3912_VIDEOCTRL4_VIDBASELO_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

247

#define TX3912_VIDEOCTRL8_PAT2_3_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

248

((cr) | (((val) << TX3912_VIDEOCTRL8_PAT2_3_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

260

#define TX3912_VIDEOCTRL9_PAT3_4_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

261

((cr) | (((val) << TX3912_VIDEOCTRL9_PAT3_4_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

269

#define TX3912_VIDEOCTRL9_PAT2_4_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

270

((cr) | (((val) << TX3912_VIDEOCTRL9_PAT2_4_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

282

#define TX3912_VIDEOCTRL10_PAT4_5_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

283

((cr) | (((val) << TX3912_VIDEOCTRL10_PAT4_5_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

295

#define TX3912_VIDEOCTRL11_PAT3_5_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

296

((cr) | (((val) << TX3912_VIDEOCTRL11_PAT3_5_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

308

#define TX3912_VIDEOCTRL12_PAT6_7_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

309

((cr) | (((val) << TX3912_VIDEOCTRL12_PAT6_7_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

321

#define TX3912_VIDEOCTRL13_PAT5_7_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

322

((cr) | (((val) << TX3912_VIDEOCTRL13_PAT5_7_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

334

#define TX3912_VIDEOCTRL14_PAT4_7_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

335

((cr) | (((val) << TX3912_VIDEOCTRL14_PAT4_7_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

73

#define TX3912_VIDEOCTRL1_BAUDVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

74

((cr) | (((val) << TX3912_VIDEOCTRL1_BAUDVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

83

#define TX3912_VIDEOCTRL1_VIDDONEVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

84

((cr) | (((val) << TX3912_VIDEOCTRL1_VIDDONEVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx3912videoreg.h

97

#define TX3912_VIDEOCTRL1_BITSEL_SET(cr, val) \

sys/arch/hpcmips/tx/tx3912videoreg.h

98

((cr) | (((val) << TX3912_VIDEOCTRL1_BITSEL_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

117

#define TX39_MEMCONFIG0_BANK1CONF_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

118

((cr) | (((val) << TX39_MEMCONFIG0_BANK1CONF_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

125

#define TX39_MEMCONFIG0_BANK0CONF_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

126

((cr) | (((val) << TX39_MEMCONFIG0_BANK0CONF_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

138

#define TX39_MEMCONFIG0_ROWSEL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

139

((cr) | (((val) << TX39_MEMCONFIG0_ROWSEL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

146

#define TX39_MEMCONFIG0_ROWSEL0_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

147

((cr) | (((val) << TX39_MEMCONFIG0_ROWSEL0_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

155

#define TX39_MEMCONFIG0_COLSEL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

156

((cr) | (((val) << TX39_MEMCONFIG0_COLSEL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

163

#define TX39_MEMCONFIG0_COLSEL0_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

164

((cr) | (((val) << TX39_MEMCONFIG0_COLSEL0_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

181

#define TX39_MEMCONFIG1_MCS3ACCVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

182

((cr) | (((val) << TX39_MEMCONFIG1_MCS3ACCVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

191

#define TX39_MEMCONFIG1_MCS3ACCVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

192

((cr) | (((val) << TX39_MEMCONFIG1_MCS3ACCVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

201

#define TX39_MEMCONFIG1_MCS2ACCVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

202

((cr) | (((val) << TX39_MEMCONFIG1_MCS2ACCVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

211

#define TX39_MEMCONFIG1_MCS2ACCVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

212

((cr) | (((val) << TX39_MEMCONFIG1_MCS2ACCVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

227

#define TX39_MEMCONFIG1_BCLKDIV_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

228

((cr) | (((val) << TX39_MEMCONFIG1_BCLKDIV_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

244

#define TX39_MEMCONFIG1_MCS1ACCVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

245

((cr) | (((val) << TX39_MEMCONFIG1_MCS1ACCVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

254

#define TX39_MEMCONFIG1_MCS1ACCVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

255

((cr) | (((val) << TX39_MEMCONFIG1_MCS1ACCVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

264

#define TX39_MEMCONFIG1_MCS0ACCVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

265

((cr) | (((val) << TX39_MEMCONFIG1_MCS0ACCVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

274

#define TX39_MEMCONFIG1_MCS0ACCVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

275

((cr) | (((val) << TX39_MEMCONFIG1_MCS0ACCVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

288

#define TX39_MEMCONFIG2_CS3ACCVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

289

((cr) | (((val) << TX39_MEMCONFIG2_CS3ACCVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

297

#define TX39_MEMCONFIG2_CS3ACCVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

298

((cr) | (((val) << TX39_MEMCONFIG2_CS3ACCVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

306

#define TX39_MEMCONFIG2_CS2ACCVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

307

((cr) | (((val) << TX39_MEMCONFIG2_CS2ACCVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

315

#define TX39_MEMCONFIG2_CS2ACCVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

316

((cr) | (((val) << TX39_MEMCONFIG2_CS2ACCVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

324

#define TX39_MEMCONFIG2_CS1ACCVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

325

((cr) | (((val) << TX39_MEMCONFIG2_CS1ACCVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

333

#define TX39_MEMCONFIG2_CS1ACCVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

334

((cr) | (((val) << TX39_MEMCONFIG2_CS1ACCVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

342

#define TX39_MEMCONFIG2_CS0ACCVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

343

((cr) | (((val) << TX39_MEMCONFIG2_CS0ACCVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

351

#define TX39_MEMCONFIG2_CS0ACCVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

352

((cr) | (((val) << TX39_MEMCONFIG2_CS0ACCVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

364

#define TX39_MEMCONFIG3_CARD2ACCVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

365

((cr) | (((val) << TX39_MEMCONFIG3_CARD2ACCVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

374

#define TX39_MEMCONFIG3_CARD1ACCVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

375

((cr) | (((val) << TX39_MEMCONFIG3_CARD1ACCVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

384

#define TX39_MEMCONFIG3_CARD2IOACCVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

385

((cr) | (((val) << TX39_MEMCONFIG3_CARD2IOACCVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

394

#define TX39_MEMCONFIG3_CARD1IOACCVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

395

((cr) | (((val) << TX39_MEMCONFIG3_CARD1IOACCVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

440

#define TX39_MEMCONFIG4_WATCHTIMEVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

441

((cr) | (((val) << TX39_MEMCONFIG4_WATCHTIMEVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

455

#define TX39_MEMCONFIG4_RFSHVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

456

((cr) | (((val) << TX39_MEMCONFIG4_RFSHVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

464

#define TX39_MEMCONFIG4_RFSHVAL0_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

465

((cr) | (((val) << TX39_MEMCONFIG4_RFSHVAL0_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

477

#define TX39_MEMCONFIG5_STARTVAL2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

478

((cr) | (((val) << TX39_MEMCONFIG5_STARTVAL2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

486

#define TX39_MEMCONFIG5_MASK2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

487

((cr) | (((val) << TX39_MEMCONFIG5_MASK2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

499

#define TX39_MEMCONFIG6_STARTVAL1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

500

((cr) | (((val) << TX39_MEMCONFIG6_STARTVAL1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

508

#define TX39_MEMCONFIG6_MASK1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

509

((cr) | (((val) << TX39_MEMCONFIG6_MASK1_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

521

#define TX39_MEMCONFIG7_RMAPADD2_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

522

((cr) | (((val) << TX39_MEMCONFIG7_RMAPADD2_SHIFT) & \

sys/arch/hpcmips/tx/tx39biureg.h

534

#define TX39_MEMCONFIG8_RMAPADD1_SET(cr, val) \

sys/arch/hpcmips/tx/tx39biureg.h

535

((cr) | (((val) << TX39_MEMCONFIG8_RMAPADD1_SHIFT) & \

sys/arch/hpcmips/tx/tx39clockreg.h

47

#define TX39_CLOCK_CHICLKDIV_SET(cr, val) \

sys/arch/hpcmips/tx/tx39clockreg.h

48

((cr) | (((val) << TX39_CLOCK_CHICLKDIV_SHIFT) & \

sys/arch/hpcmips/tx/tx39clockreg.h

78

#define TX39_CLOCK_SIBMCLKDIV_SET(cr, val) \

sys/arch/hpcmips/tx/tx39clockreg.h

79

((cr) | (((val) << TX39_CLOCK_SIBMCLKDIV_SHIFT) & \

sys/arch/hpcmips/tx/tx39clockreg.h

89

#define TX39_CLOCK_CSERDIV_SET(cr, val) \

sys/arch/hpcmips/tx/tx39clockreg.h

90

((cr) | (((val) << TX39_CLOCK_CSERDIV_SHIFT) & \

sys/arch/hpcmips/tx/tx39icureg.h

350

#define TX39_INTRSTATUS5_IOPOSINT_SET(cr, val) \

sys/arch/hpcmips/tx/tx39icureg.h

351

((cr) | (((val) << TX39_INTRSTATUS5_IOPOSINT_SHIFT) & \

sys/arch/hpcmips/tx/tx39icureg.h

359

#define TX39_INTRSTATUS5_IONEGINT_SET(cr, val) \

sys/arch/hpcmips/tx/tx39icureg.h

360

((cr) | (((val) << TX39_INTRSTATUS5_IONEGINT_SHIFT) & \

sys/arch/hpcmips/tx/tx39icureg.h

387

#define TX39_INTRENABLE6_PRIORITYMASK_SET(cr, val) \

sys/arch/hpcmips/tx/tx39icureg.h

388

((cr) | (((val) << TX39_INTRENABLE6_PRIORITYMASK_SHIFT) & \

sys/arch/hpcmips/tx/tx39icureg.h

443

#define TX3922_INTRSTATUS8_IOPOSINT_SET(cr, val) \

sys/arch/hpcmips/tx/tx39icureg.h

444

((cr) | (((val) << TX3922_INTRSTATUS8_IOPOSINT_SHIFT) & \

sys/arch/hpcmips/tx/tx39icureg.h

453

#define TX3922_INTRSTATUS8_IONEGINT_SET(cr, val) \

sys/arch/hpcmips/tx/tx39icureg.h

454

((cr) | (((val) << TX3922_INTRSTATUS8_IONEGINT_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

103

#define TX392X_IOCTRL_IODEBSEL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

104

((cr) | (((val) << TX392X_IOCTRL_IODEBSEL_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

112

#define TX392X_IOCTRL_IODIREC_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

113

((cr) | (((val) << TX392X_IOCTRL_IODIREC_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

121

#define TX392X_IODATAINOUT_DOUT_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

122

((cr) | (((val) << TX392X_IODATAINOUT_DOUT_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

133

#define TX392X_IODATAINOUT_DIN_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

134

((cr) | (((val) << TX392X_IODATAINOUT_DIN_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

168

#define TX391X_IOIOPOWERDWN_IOPD_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

169

((cr) | (((val) << TX391X_IOIOPOWERDWN_IOPD_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

179

#define TX392X_IOIOPOWERDWN_IOPD_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

180

((cr) | (((val) << TX392X_IOIOPOWERDWN_IOPD_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

66

#define TX391X_IOCTRL_IODEBSEL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

67

((cr) | (((val) << TX391X_IOCTRL_IODEBSEL_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

75

#define TX391X_IOCTRL_IODIREC_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

76

((cr) | (((val) << TX391X_IOCTRL_IODIREC_SHIFT) & \

sys/arch/hpcmips/tx/tx39ioreg.h

86

#define TX391X_IOCTRL_IODOUT_SET(cr, val) \

sys/arch/hpcmips/tx/tx39ioreg.h

87

((cr) | (((val) << TX391X_IOCTRL_IODOUT_SHIFT) & \

sys/arch/hpcmips/tx/tx39irreg.h

102

#define TX39_IRCTRL2_WAITVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39irreg.h

103

((cr) | (((val) << TX39_IRCTRL2_WAITVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39irreg.h

49

#define TX39_IRCTRL1_BAUDVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39irreg.h

50

((cr) | (((val) << TX39_IRCTRL1_BAUDVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39irreg.h

69

#define TX39_IRCTRL2_PER_SET(cr, val) \

sys/arch/hpcmips/tx/tx39irreg.h

70

((cr) | (((val) << TX39_IRCTRL2_PER_SHIFT) & \

sys/arch/hpcmips/tx/tx39irreg.h

80

#define TX39_IRCTRL2_ONTIME_SET(cr, val) \

sys/arch/hpcmips/tx/tx39irreg.h

81

((cr) | (((val) << TX39_IRCTRL2_ONTIME_SHIFT) & \

sys/arch/hpcmips/tx/tx39irreg.h

91

#define TX39_IRCTRL2_DELAYVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39irreg.h

92

((cr) | (((val) << TX39_IRCTRL2_DELAYVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39powerreg.h

52

#define TX39_POWERCTRL_VIDRF_SET(cr, val) \

sys/arch/hpcmips/tx/tx39powerreg.h

53

((cr) | (((val) << TX39_POWERCTRL_VIDRF_SHIFT) & \

sys/arch/hpcmips/tx/tx39powerreg.h

70

#define TX39_POWERCTRL_STPTIMERVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39powerreg.h

71

((cr) | (((val) << TX39_POWERCTRL_STPTIMERVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39sib.c

331

txsibsf0_reg_write(tx_chipset_tag_t tc, int addr, u_int16_t val)

sys/arch/hpcmips/tx/tx39sib.c

338

reg = TX39_SIBSF0_REGDATA_SET(reg, val);

sys/arch/hpcmips/tx/tx39sibreg.h

109

#define TX39_SIBCTRL_TELFSDIV_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

110

((cr) | (((val) << TX39_SIBCTRL_TELFSDIV_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

120

#define TX39_SIBCTRL_SNDFSDIV_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

121

((cr) | (((val) << TX39_SIBCTRL_SNDFSDIV_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

150

#define TX39_SIBSF0_REGADDR_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

151

((cr) | (((val) << TX39_SIBSF0_REGADDR_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

163

#define TX39_SIBSF0_REGDATA_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

164

((cr) | (((val) << TX39_SIBSF0_REGDATA_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

178

#define TX39_SIBSF1CTRL_ADCGAINL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

179

((cr) | (((val) << TX39_SIBSF1CTRL_ADCGAINL_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

184

#define TX39_SIBSF1CTRL_ADCGAINR_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

185

((cr) | (((val) << TX39_SIBSF1CTRL_ADCGAINR_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

190

#define TX39_SIBSF1CTRL_DACATTNL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

191

((cr) | (((val) << TX39_SIBSF1CTRL_DACATTNL_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

196

#define TX39_SIBSF1CTRL_DACATTNR_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

197

((cr) | (((val) << TX39_SIBSF1CTRL_DACATTNR_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

202

#define TX39_SIBSF1CTRL_DIGITALOUT_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

203

((cr) | (((val) << TX39_SIBSF1CTRL_DIGITALOUT_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

215

#define TX39_SIBSF1STAT_ERROR_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

216

((cr) | (((val) << TX39_SIBSF1STAT_ERROR_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

221

#define TX39_SIBSF1STAT_REVISION_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

222

((cr) | (((val) << TX39_SIBSF1STAT_REVISION_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

227

#define TX39_SIBSF1STAT_DIGITALIN_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

228

((cr) | (((val) << TX39_SIBSF1STAT_DIGITALIN_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

61

#define TX39_SIBSIZE_SNDSIZE_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

62

((cr) | (((((val) >> 2) - 1) << TX39_SIBSIZE_SND_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

64

#define TX39_SIBSIZE_TELSIZE_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

65

((cr) | (((((val) >> 2) - 1) << TX39_SIBSIZE_TEL_SHIFT) & \

sys/arch/hpcmips/tx/tx39sibreg.h

98

#define TX39_SIBCTRL_SCLKDIV_SET(cr, val) \

sys/arch/hpcmips/tx/tx39sibreg.h

99

((cr) | (((val) << TX39_SIBCTRL_SCLKDIV_SHIFT) & \

sys/arch/hpcmips/tx/tx39spireg.h

51

#define TX39_SPICTRL_DELAYVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39spireg.h

52

((cr) | (((val) << TX39_SPICTRL_DELAYVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39spireg.h

60

#define TX39_SPICTRL_BAUDRATE_SET(cr, val) \

sys/arch/hpcmips/tx/tx39spireg.h

61

((cr) | (((val) << TX39_SPICTRL_BAUDRATE_SHIFT) & \

sys/arch/hpcmips/tx/tx39spireg.h

75

#define TX39_SPICTRL_TXDATA_SET(cr, val) \

sys/arch/hpcmips/tx/tx39spireg.h

76

((cr) | (((val) << TX39_SPICTRL_TXDATA_SHIFT) & \

sys/arch/hpcmips/tx/tx39timerreg.h

116

#define TX39_TIMERPERIODIC_PERVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39timerreg.h

117

((cr) | (((val) << TX39_TIMERPERIODIC_PERVAL_SHIFT) & \

sys/arch/hpcmips/tx/tx39timerreg.h

121

#define TX39_TIMERPERIODIC_INTRRATE(val) \

sys/arch/hpcmips/tx/tx39timerreg.h

122

((val) + 1)/TX39_TIMERCLK /* unit:Hz */

sys/arch/hpcmips/tx/tx39uartreg.h

117

#define TX39_UARTCTRL2_BAUDRATE_SET(cr, val) \

sys/arch/hpcmips/tx/tx39uartreg.h

118

((cr) | (((val) << TX39_UARTCTRL2_BAUDRATE_SHIFT) & \

sys/arch/hpcmips/tx/tx39uartreg.h

126

#define TX39_UARTDMACTRL1_DMASTARTVAL_SET(cr, val) \

sys/arch/hpcmips/tx/tx39uartreg.h

127

((cr) | ((val) & TX39_UARTDMACTRL1_DMASTARTVAL_MASK))

sys/arch/hpcmips/tx/tx39uartreg.h

134

#define TX39_UARTDMACTRL2_DMALENGTH_SET(cr, val) \

sys/arch/hpcmips/tx/tx39uartreg.h

135

((cr) | ((val) & TX39_UARTDMACTRL1_DMALENGTH_MASK))

sys/arch/hpcmips/tx/tx39uartreg.h

153

#define TX39_UARTTXHOLD_TXDATA_SET(cr, val) \

sys/arch/hpcmips/tx/tx39uartreg.h

154

((cr) | ((val) & TX39_UARTTXHOLD_TXDATA_MASK))

sys/arch/hpcmips/tx/tx39var.h

97

#define tx_conf_write(t, reg, val) ( \

sys/arch/hpcmips/tx/tx39var.h

99

= (val)))

sys/arch/hpcmips/vr/bcu_vrip.c

109

vrbcu_write(struct vrbcu_softc *sc, int port, unsigned short val)

sys/arch/hpcmips/vr/bcu_vrip.c

112

bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);

sys/arch/hpcmips/vr/vrc4172pci.c

110

vrc4172pci_write(struct vrc4172pci_softc *sc, int offset, u_int32_t val)

sys/arch/hpcmips/vr/vrc4172pci.c

113

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);

sys/arch/hpcmips/vr/vrc4172pci.c

262

u_int32_t val;

sys/arch/hpcmips/vr/vrc4172pci.c

271

val = sc->sc_fake_baseaddr;

sys/arch/hpcmips/vr/vrc4172pci.c

279

val = vrc4172pci_read(sc, VRC4172PCI_CONFDREG);

sys/arch/hpcmips/vr/vrc4172pci.c

285

device_xname(sc->sc_dev), (u_int32_t)tag, reg, val));

sys/arch/hpcmips/vr/vrc4172pci.c

287

return (val);

sys/arch/hpcmips/vr/vrc4172pwm.c

131

vrc4172pwm_write(struct vrc4172pwm_softc *sc, int port, unsigned short val)

sys/arch/hpcmips/vr/vrc4172pwm.c

134

bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);

sys/arch/hpcmips/vr/vrc4172pwm.c

314

vrc4172pwm_set_brightness(struct vrc4172pwm_softc *sc, int val)

sys/arch/hpcmips/vr/vrc4172pwm.c

320

if (val < 0)

sys/arch/hpcmips/vr/vrc4172pwm.c

321

val = 0;

sys/arch/hpcmips/vr/vrc4172pwm.c

322

if (val > VRC2_PWM_MAX_BRIGHTNESS)

sys/arch/hpcmips/vr/vrc4172pwm.c

323

val = VRC2_PWM_MAX_BRIGHTNESS;

sys/arch/hpcmips/vr/vrc4172pwm.c

324

if (val > sc->sc_param->n_brightness)

sys/arch/hpcmips/vr/vrc4172pwm.c

325

val = sc->sc_param->n_brightness;

sys/arch/hpcmips/vr/vrc4172pwm.c

326

sc->sc_brightness = val;

sys/arch/hpcmips/vr/vrc4172pwm.c

329

DPRINTF(("vrc4172pwm_set_brightness: val=%d raw=0x%x\n", val, raw));

sys/arch/hpcmips/vr/vrdsiu_mouse.c

103

vrdsiu_write(struct vrdsiu_softc *sc, int port, unsigned short val)

sys/arch/hpcmips/vr/vrdsiu_mouse.c

105

bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);

sys/arch/hpcmips/vr/vrdsu.c

62

vrdsu_write(struct vrdsu_softc *sc, int port, unsigned short val)

sys/arch/hpcmips/vr/vrdsu.c

65

bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);

sys/arch/hpcmips/vr/vrkiu.c

102

vrkiu_write(struct vrkiu_chip *chip, int port, unsigned short val)

sys/arch/hpcmips/vr/vrkiu.c

105

bus_space_write_2(chip->kc_iot, chip->kc_ioh, port, val);

sys/arch/hpcmips/vr/vrled.c

77

vrled_write(struct vrled_softc *sc, int port, unsigned short val)

sys/arch/hpcmips/vr/vrled.c

80

bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);

sys/arch/hpcmips/vr/vrpciu.c

106

vrpciu_write(struct vrpciu_softc *sc, int offset, u_int32_t val)

sys/arch/hpcmips/vr/vrpciu.c

109

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);

sys/arch/hpcmips/vr/vrpciu.c

121

vrpciu_write_2(struct vrpciu_softc *sc, int offset, u_int16_t val)

sys/arch/hpcmips/vr/vrpciu.c

124

bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, val);

sys/arch/hpcmips/vr/vrpciu.c

424

u_int32_t val;

sys/arch/hpcmips/vr/vrpciu.c

439

val = vrpciu_read(sc, VRPCIU_CONFDREG);

sys/arch/hpcmips/vr/vrpciu.c

442

device_xname(sc->sc_dev), (u_int32_t)tag, reg, val);

sys/arch/hpcmips/vr/vrpciu.c

444

return (val);

sys/arch/hpcmips/vr/vrpiu.c

153

vrpiu_write(struct vrpiu_softc *sc, int port, unsigned short val)

sys/arch/hpcmips/vr/vrpiu.c

156

bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);

sys/arch/hpcmips/vr/vrpmu.c

86

vrpmu_write(struct vrpmu_softc *sc, int port, unsigned short val)

sys/arch/hpcmips/vr/vrpmu.c

89

bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

120

#define HD64461_LCDLDHNCR_NHD_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

121

((cr) | (((val) << HD64461_LCDLDHNCR_NHD_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

128

#define HD64461_LCDLDHNCR_NHT_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

129

((cr) | (((val) << HD64461_LCDLDHNCR_NHT_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

139

#define HD64461_LCDLDHNSR_HSW_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

140

((cr) | (((val) << HD64461_LCDLDHNSR_HSW_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

147

#define HD64461_LCDLDHNSR_HSP_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

148

((cr) | (((val) << HD64461_LCDLDHNSR_HSP_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

158

#define HD64461_LCDLDVNTR_VTL_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

159

((cr) | (((val) << HD64461_LCDLDVNTR_VTL_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

169

#define HD64461_LCDLDVNDR_VDL_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

170

((cr) | (((val) << HD64461_LCDLDVNDR_VDL_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

179

#define HD64461_LCDLDVSPR_VSP_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

180

((cr) | ((val) & HD64461_LCDLDVSPR_VSP_MASK))

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

192

#define HD64461_LCDCRTVTR_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

193

((cr) | (((val) << HD64461_LCDCRTVTR_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

203

#define HD64461_LCDCRTVRSR_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

204

((cr) | (((val) << HD64461_LCDCRTVRSR_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

214

#define HD64461_LCDCRTVRER_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

215

((cr) | (((val) << HD64461_LCDCRTVRER_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

225

#define HD64461_LCDCPTWAR_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

226

((cr) | (((val) << HD64461_LCDCPTWAR_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

233

#define HD64461_LCDCPTWDR_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

234

((cr) | ((val) & HD64461_LCDCPTWDR_MASK))

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

240

#define HD64461_LCDCPTRAR_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

241

((cr) | (((val) << HD64461_LCDCPTRAR_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

260

#define HD64461_LCDGRDOR_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

261

((cr) | (((val) << HD64461_LCDGRDOR_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

378

#define HD64461_LCDBBTMDR_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

379

((cr) | (((val) << HD64461_LCDBBTMDR_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

86

#define HD64461_LCDLDR3_CS_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

87

((cr) | (((val) << HD64461_LCDLDR3_CS_SHIFT) & \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

94

#define HD64461_LCDLDR3_CG_SET(cr, val) \

sys/arch/hpcsh/dev/hd64461/hd64461videoreg.h

95

((cr) | ((val) & HD64461_LCDLDR3_CG_MASK))

sys/arch/hpcsh/dev/hd64465/hd64465uart.c

210

uint8_t val)

sys/arch/hpcsh/dev/hd64465/hd64465uart.c

213

*(volatile uint8_t *)(h + (ofs << 1)) = val;

sys/arch/hpcsh/dev/pfckbd.c

220

int row, type, val;

sys/arch/hpcsh/dev/pfckbd.c

234

val = row * 8 + column;

sys/arch/hpcsh/dev/pfckbd.c

235

hpckbd_input(pc->pc_hpckbd, type, val);

sys/arch/hppa/dev/apic.c

87

apic_write(volatile struct elroy_regs *r, uint32_t reg, uint32_t val)

sys/arch/hppa/dev/apic.c

90

elroy_write32(&r->apic_data, htole32(val));

sys/arch/hppa/dev/clock.c

83

uint32_t val;

sys/arch/hppa/dev/clock.c

85

mfctl(CR_ITMR, val);

sys/arch/hppa/dev/clock.c

87

return val;

sys/arch/hppa/dev/gftfb.c

182

gftfb_write4(struct gftfb_softc *sc, uint32_t offset, uint32_t val)

sys/arch/hppa/dev/gftfb.c

187

bus_space_write_stream_4(memt, memh, offset, val);

sys/arch/hppa/dev/gftfb.c

200

gftfb_write1(struct gftfb_softc *sc, uint32_t offset, uint8_t val)

sys/arch/hppa/dev/gftfb.c

205

bus_space_write_1(memt, memh, offset, val);

sys/arch/hppa/dev/hyperfb.c

176

hyperfb_write4(struct hyperfb_softc *sc, uint32_t offset, uint32_t val)

sys/arch/hppa/dev/hyperfb.c

178

bus_space_write_4(sc->sc_iot, sc->sc_hreg, offset, val);

sys/arch/hppa/dev/hyperfb.c

182

hyperfb_write1(struct hyperfb_softc *sc, uint32_t offset, uint8_t val)

sys/arch/hppa/dev/hyperfb.c

184

bus_space_write_1(sc->sc_iot, sc->sc_hreg, offset, val);

sys/arch/hppa/dev/power.c

388

char val[16];

sys/arch/hppa/dev/power.c

391

strcpy(val, pwr_sw_control_str[pwr_sw_control]);

sys/arch/hppa/dev/power.c

393

node.sysctl_data = val;

sys/arch/hppa/dev/power.c

401

if (strcmp(val, pwr_sw_control_str[i]) == 0) {

sys/arch/hppa/dev/summitfb.c

194

summitfb_write4(struct summitfb_softc *sc, uint32_t offset, uint32_t val)

sys/arch/hppa/dev/summitfb.c

200

bus_space_write_stream_4(memt, memh, offset - 0x400000, val);

sys/arch/hppa/gsc/harmony.c

1179

uint32_t bits, mask, val, old;

sys/arch/hppa/gsc/harmony.c

1192

val = mask - (sc->sc_output_lvl.left >> (8 - GAINCTL_OUTPUT_BITS));

sys/arch/hppa/gsc/harmony.c

1193

bits |= (val << GAINCTL_OUTPUT_LEFT_S) & GAINCTL_OUTPUT_LEFT_M;

sys/arch/hppa/gsc/harmony.c

1194

val = mask - (sc->sc_output_lvl.right >> (8 - GAINCTL_OUTPUT_BITS));

sys/arch/hppa/gsc/harmony.c

1195

bits |= (val << GAINCTL_OUTPUT_RIGHT_S) & GAINCTL_OUTPUT_RIGHT_M;

sys/arch/hppa/gsc/harmony.c

1199

val = mask - (sc->sc_monitor_lvl.left >> (8 - GAINCTL_MONITOR_BITS));

sys/arch/hppa/gsc/harmony.c

1200

bits |= (val << GAINCTL_MONITOR_S) & GAINCTL_MONITOR_M;

sys/arch/hppa/gsc/harmonyvar.h

115

#define WRITE_REG(sc, reg, val) \

sys/arch/hppa/gsc/harmonyvar.h

116

bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, (reg), (val))

sys/arch/hppa/gsc/if_ie_gsc.c

236

uint16_t val;

sys/arch/hppa/gsc/if_ie_gsc.c

241

: "=&r" (val)

sys/arch/hppa/gsc/if_ie_gsc.c

243

return val;

sys/arch/hppa/hppa/kobj_machdep.c

121

store_ptr(void *where, Elf_Addr val)

sys/arch/hppa/hppa/kobj_machdep.c

124

*(Elf_Addr *)where = val;

sys/arch/hppa/hppa/kobj_machdep.c

126

(void)memcpy(where, &val, sizeof(val));

sys/arch/hppa/hppa/trap.c

322

uint32_t val;

sys/arch/hppa/hppa/trap.c

332

&val) == 0) {

sys/arch/hppa/hppa/trap.c

333

printf(" arg%d=0x%08x", arg_number, val);

sys/arch/hppa/hppa/trap.c

560

tf_setregno(struct trapframe *tf, u_int regno, register_t val)

sys/arch/hppa/hppa/trap.c

566

tf_reg[hppa_regmap[regno]] = val;

sys/arch/hppa/stand/xxboot/main.c

156

hexstr(char *buf, unsigned val)

sys/arch/hppa/stand/xxboot/main.c

164

v = val & 0xf;

sys/arch/hppa/stand/xxboot/main.c

166

val >>= 4;

sys/arch/hppa/stand/xxboot/main.c

167

} while (val);

sys/arch/i386/include/types.h

50

int val[6];

sys/arch/i386/pci/ali1543.c

185

int val;

sys/arch/i386/pci/ali1543.c

194

val = ALI1543_PIRQ(reg, clink);

sys/arch/i386/pci/ali1543.c

195

*irqp = (val == 0) ?

sys/arch/i386/pci/ali1543.c

196

X86_PCI_INTERRUPT_LINE_NO_CONNECTION : val;

sys/arch/i386/pci/ali1543.c

205

int shift, val;

sys/arch/i386/pci/ali1543.c

212

ali1543_get_intr(v, clink, &val);

sys/arch/i386/pci/ali1543.c

217

if (ali1543_get_intr(v, clink, &val) != 0 || val != irq)

sys/arch/i386/pci/amd756.c

145

int val;

sys/arch/i386/pci/amd756.c

151

val = (reg >> (4 * clink)) & 0x0f;

sys/arch/i386/pci/amd756.c

152

*irqp = (val == 0) ?

sys/arch/i386/pci/amd756.c

153

X86_PCI_INTERRUPT_LINE_NO_CONNECTION : val;

sys/arch/i386/pci/amd756.c

162

int val;

sys/arch/i386/pci/amd756.c

169

amd756_get_intr(v, clink, &val);

sys/arch/i386/pci/elan520.c

259

elansc_wdogctl_write(struct elansc_softc *sc, uint16_t val)

sys/arch/i386/pci/elan520.c

280

bus_space_write_2(sc->sc_memt, sc->sc_memh, MMCR_WDTMRCTL, val);

sys/arch/i386/pci/opti82c558.c

157

int val;

sys/arch/i386/pci/opti82c558.c

163

val = VIPER_PIRQ(reg, clink);

sys/arch/i386/pci/opti82c558.c

164

*irqp = (val == VIPER_PIRQ_NONE) ?

sys/arch/i386/pci/opti82c558.c

165

X86_PCI_INTERRUPT_LINE_NO_CONNECTION : viper_pirq_decode[val];

sys/arch/i386/pci/opti82c700.c

199

int val, addrofs, ofs;

sys/arch/i386/pci/opti82c700.c

205

val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;

sys/arch/i386/pci/opti82c700.c

207

*irqp = (val == FIRESTAR_PIRQ_NONE) ?

sys/arch/i386/pci/opti82c700.c

208

X86_PCI_INTERRUPT_LINE_NO_CONNECTION : val;

sys/arch/i386/pci/opti82c700.c

238

int i, val, addrofs, ofs;

sys/arch/i386/pci/opti82c700.c

254

val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;

sys/arch/i386/pci/opti82c700.c

255

if (val != irq)

sys/arch/i386/pci/opti82c700.c

257

val = ((reg >> ofs) >> FIRESTAR_TRIGGER_SHIFT) &

sys/arch/i386/pci/opti82c700.c

259

*triggerp = val ? IST_LEVEL : IST_EDGE;

sys/arch/i386/pci/opti82c700.c

270

val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;

sys/arch/i386/pci/opti82c700.c

271

if (val != irq)

sys/arch/i386/pci/opti82c700.c

284

int i, val, addrofs, ofs;

sys/arch/i386/pci/opti82c700.c

299

val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;

sys/arch/i386/pci/opti82c700.c

300

if (val != irq)

sys/arch/i386/pci/opti82c700.c

319

val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;

sys/arch/i386/pci/opti82c700.c

320

if (val != irq)

sys/arch/i386/pci/via8231.c

186

int reg, val;

sys/arch/i386/pci/via8231.c

193

val = VIA8231_GET_ROUTING_CNFG(reg, clink);

sys/arch/i386/pci/via8231.c

196

val = (reg >> ((clink & 3) * 4)) & 0xf;

sys/arch/i386/pci/via8231.c

199

*irqp = (val == VIA8231_ROUTING_CNFG_DISABLED) ?

sys/arch/i386/pci/via8231.c

200

X86_PCI_INTERRUPT_LINE_NO_CONNECTION : val;

sys/arch/i386/pci/via82c586.c

157

int val;

sys/arch/i386/pci/via82c586.c

163

val = VP3_PIRQ(reg, clink);

sys/arch/i386/pci/via82c586.c

164

*irqp = (val == VP3_PIRQ_NONE) ?

sys/arch/i386/pci/via82c586.c

165

X86_PCI_INTERRUPT_LINE_NO_CONNECTION : val;

sys/arch/i386/pci/via82c586.c

174

int shift, val;

sys/arch/i386/pci/via82c586.c

181

via82c586_get_intr(v, clink, &val);

sys/arch/i386/pci/via82c586.c

186

if (via82c586_get_intr(v, clink, &val) != 0 ||

sys/arch/i386/pci/via82c586.c

187

val != irq)

sys/arch/i386/pci/viapcib.c

158

pcireg_t addr, val;

sys/arch/i386/pci/viapcib.c

170

val = pci_conf_read(pa->pa_pc, pa->pa_tag, SMB_HOST_CONFIG);

sys/arch/i386/pci/viapcib.c

171

if ((val & 0x10000) == 0) {

sys/arch/i386/pci/viapcib.c

181

switch (val & 0x0e) {

sys/arch/i386/pci/viapcib.c

194

val = pci_conf_read(pa->pa_pc, pa->pa_tag, SMB_REVISION);

sys/arch/i386/pci/viapcib.c

195

sc->sc_revision = val >> 16;

sys/arch/i386/pci/viapcib.c

222

uint8_t val = 0;

sys/arch/i386/pci/viapcib.c

228

val = viapcib_smbus_read(sc, SMBHSTSTS);

sys/arch/i386/pci/viapcib.c

229

if (!(val & SMBHSTSTS_BUSY) && (val & SMBHSTSTS_INTR))

sys/arch/i386/pci/viapcib.c

237

if ((val & SMBHSTSTS_FAILED) || (val & SMBHSTSTS_COLLISION) ||

sys/arch/i386/pci/viapcib.c

238

(val & SMBHSTSTS_ERROR))

sys/arch/i386/pci/viapcib.c

260

uint8_t val;

sys/arch/i386/pci/viapcib.c

262

val = viapcib_smbus_read(sc, SMBHSTSTS);

sys/arch/i386/pci/viapcib.c

264

return (val & SMBHSTSTS_BUSY);

sys/arch/i386/pnpbios/lm_pnpbios.c

161

lm_pnpbios_writereg(struct lm_softc *sc, int reg, int val)

sys/arch/i386/pnpbios/lm_pnpbios.c

164

bus_space_write_1(sc->lm_iot, sc->lm_ioh, LMC_DATA, val);

sys/arch/i386/stand/efiboot/boot.c

910

CHAR16 *name = NULL, *tmp, *val, guid[128];

sys/arch/i386/stand/efiboot/boot.c

960

val = LibGetVariable(name, &vendor);

sys/arch/i386/stand/efiboot/boot.c

961

if (val != NULL) {

sys/arch/i386/stand/efiboot/boot.c

963

rv = ucs2_to_utf8(val, &uval);

sys/arch/i386/stand/efiboot/boot.c

964

FreePool(val);

sys/arch/ia64/disasm/disasm_extract.c

1796

op_imm(struct asm_inst *i, int op, uint64_t val)

sys/arch/ia64/disasm/disasm_extract.c

1799

i->i_oper[op].o_value = val;

sys/arch/ia64/disasm/disasm_extract.c

1809

op_value(struct asm_inst *i, int op, uint64_t val)

sys/arch/ia64/disasm/disasm_extract.c

1811

i->i_oper[op].o_value = val;

sys/arch/ia64/disasm/disasm_extract.c

1825

uint64_t val = FIELD(bits, o, l);

sys/arch/ia64/disasm/disasm_extract.c

1827

if (sign && (val & (1LL << (l - 1))) != 0)

sys/arch/ia64/disasm/disasm_extract.c

1828

val |= -1LL << l;

sys/arch/ia64/disasm/disasm_extract.c

1829

return (val);

sys/arch/ia64/disasm/disasm_extract.c

1849

uint64_t val = 0;

sys/arch/ia64/disasm/disasm_extract.c

1854

val |= (uint64_t)FIELD(bits, FRAG_OFS(frag), FRAG_LEN(frag))

sys/arch/ia64/disasm/disasm_extract.c

1858

if (sign && (val & (1LL << (len - 1))) != 0)

sys/arch/ia64/disasm/disasm_extract.c

1859

val |= -1LL << len;

sys/arch/ia64/disasm/disasm_extract.c

1860

return (val);

sys/arch/ia64/ia64/pmap.c

2724

int val = 0;

sys/arch/ia64/ia64/pmap.c

2763

val = *loc;

sys/arch/ia64/ia64/pmap.c

2768

ref, mod, val);

sys/arch/ia64/include/atomic.h

336

uint32_t val;

sys/arch/ia64/include/atomic.h

338

val = *p;

sys/arch/ia64/include/atomic.h

339

} while (!atomic_cmpset_32(p, val, 0));

sys/arch/ia64/include/atomic.h

340

return (val);

sys/arch/ia64/include/atomic.h

346

uint64_t val;

sys/arch/ia64/include/atomic.h

348

val = *p;

sys/arch/ia64/include/atomic.h

349

} while (!atomic_cmpset_64(p, val, 0));

sys/arch/ia64/include/atomic.h

350

return (val);

sys/arch/ia64/include/lock.h

91

uint8_t val;

sys/arch/ia64/include/lock.h

93

val = __SIMPLELOCK_LOCKED;

sys/arch/ia64/include/lock.h

95

"=r" (val)

sys/arch/ia64/include/lock.h

96

:"r" (lockp), "r" (val)

sys/arch/ia64/include/lock.h

98

return val == __SIMPLELOCK_UNLOCKED;

sys/arch/ia64/include/types.h

43

long double val[_JBLEN];

sys/arch/ia64/pci/pci_machdep.c

101

tag | reg, sizeof(pcireg_t), val, 0, 0, 0, 0);

sys/arch/ia64/pci/pci_machdep.c

93

pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val)

sys/arch/ia64/stand/common/interp_backslash.c

110

char val;

sys/arch/ia64/stand/common/interp_backslash.c

117

val = (DIGIT(*str) << 6) + (DIGIT(*(str + 1)) << 3) +

sys/arch/ia64/stand/common/interp_backslash.c

122

new_str[i++] = val;

sys/arch/ia64/stand/common/interp_backslash.c

134

val = DIGIT(*(str + 2));

sys/arch/ia64/stand/common/interp_backslash.c

136

val = (val << 4) + DIGIT(*(str + 3));

sys/arch/ia64/stand/common/interp_backslash.c

142

new_str[i++] = val;

sys/arch/ia64/stand/common/interp_parse.c

152

if ((val = variable_lookup(p)) != NULL) {

sys/arch/ia64/stand/common/interp_parse.c

153

size_t len = strlen(val);

sys/arch/ia64/stand/common/interp_parse.c

155

strncpy(buf + i, val, PARSE_BUFSIZE - (i + 1));

sys/arch/ia64/stand/common/interp_parse.c

86

char *val, *p, *q, *copy = NULL;

sys/arch/ia64/unwind/decode.c

19

unwind_decode_ule128(char *buf, unsigned long *val)

sys/arch/ia64/unwind/decode.c

23

val[0] = 0;

sys/arch/ia64/unwind/decode.c

25

val[0] += ((buf[i] & 0x7f) << (i * 7));

sys/arch/landisk/dev/obio.c

434

uint8_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

436

uint16_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

438

uint32_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

440

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

442

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

444

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/landisk/dev/obio.c

731

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

736

*p = val;

sys/arch/landisk/dev/obio.c

742

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

747

*p = val;

sys/arch/landisk/dev/obio.c

753

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

758

*p = val;

sys/arch/landisk/dev/obio.c

764

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

769

*addr++ = val;

sys/arch/landisk/dev/obio.c

775

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

780

*addr++ = val;

sys/arch/landisk/dev/obio.c

786

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/landisk/dev/obio.c

791

*addr++ = val;

sys/arch/landisk/stand/boot/boot.h

42

void puthex(int val, int size);

sys/arch/landisk/stand/boot/monitor.c

215

int val;

sys/arch/landisk/stand/boot/monitor.c

247

val = *(char *)add;

sys/arch/landisk/stand/boot/monitor.c

250

val = *(short *)add;

sys/arch/landisk/stand/boot/monitor.c

253

val = *(int *)add;

sys/arch/landisk/stand/boot/monitor.c

256

val = 0;

sys/arch/landisk/stand/boot/monitor.c

259

puthex(val, mode);

sys/arch/landisk/stand/boot/prf.c

35

puthex(int val, int size)

sys/arch/landisk/stand/boot/prf.c

49

putchar(hexchar[(val >> (i * 4)) & 0xf]);

sys/arch/luna68k/dev/if_le.c

143

lesrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/luna68k/dev/if_le.c

148

ler1->ler1_rdp = val;

sys/arch/luna68k/dev/if_le.c

155

uint16_t val;

sys/arch/luna68k/dev/if_le.c

158

val = ler1->ler1_rdp;

sys/arch/luna68k/dev/if_le.c

159

return val;

sys/arch/luna68k/dev/lcd.c

207

int val;

sys/arch/luna68k/dev/lcd.c

232

val = *(int *)addr;

sys/arch/luna68k/dev/lcd.c

233

switch (val) {

sys/arch/luna68k/dev/lcd.c

238

lcdctrl(val);

sys/arch/luna68k/dev/lcd.c

246

val = *(int *)addr;

sys/arch/luna68k/dev/lcd.c

247

if ((val & 0x7) != val)

sys/arch/luna68k/dev/lcd.c

249

lcdctrl(val | 0x8);

sys/arch/luna68k/dev/lcd.c

253

val = *(int *)addr;

sys/arch/luna68k/dev/lcd.c

254

switch (val) {

sys/arch/luna68k/dev/lcd.c

259

lcdctrl(val);

sys/arch/luna68k/dev/lcd.c

267

val = *(int *)addr & 0x7f;

sys/arch/luna68k/dev/lcd.c

268

lcdctrl(val | 0x80);

sys/arch/luna68k/dev/omrasops.c

267

uint32_t val, int width, int height)

sys/arch/luna68k/dev/omrasops.c

316

[val] "d" (val),

sys/arch/luna68k/dev/omrasops.c

323

*(uint32_t *)d = val;

sys/arch/luna68k/dev/siotty.c

463

int val, s;

sys/arch/luna68k/dev/siotty.c

467

val = 0;

sys/arch/luna68k/dev/siotty.c

469

val |= WR5_BREAK;

sys/arch/luna68k/dev/siotty.c

471

val |= WR5_DTR;

sys/arch/luna68k/dev/siotty.c

473

val |= WR5_RTS;

sys/arch/luna68k/dev/siotty.c

481

wr5 |= val;

sys/arch/luna68k/dev/siotty.c

484

wr5 &= ~val;

sys/arch/luna68k/dev/siotty.c

487

val = 0;

sys/arch/luna68k/dev/siotty.c

490

val |= TIOCM_DTR;

sys/arch/luna68k/dev/siotty.c

492

val |= TIOCM_RTS;

sys/arch/luna68k/dev/siotty.c

494

val |= TIOCM_CTS;

sys/arch/luna68k/dev/siotty.c

496

val |= TIOCM_CD;

sys/arch/luna68k/dev/siotty.c

501

val = 0;

sys/arch/luna68k/dev/siotty.c

504

return val;

sys/arch/luna68k/dev/siovar.h

63

uint16_t val;

sys/arch/luna68k/dev/siovar.h

65

val = sio->sio_stat << 8;

sys/arch/luna68k/dev/siovar.h

67

val |= sio->sio_stat;

sys/arch/luna68k/dev/siovar.h

69

return val;

sys/arch/luna68k/dev/siovar.h

73

setsioreg(struct sioreg *sio, int regno, int val)

sys/arch/luna68k/dev/siovar.h

78

sio->sio_cmd = val;

sys/arch/luna68k/include/bus.h

396

#define bus_space_set_multi_1(t, h, o, val, c) do { \

sys/arch/luna68k/include/bus.h

406

"r" ((h)+(o)*4), "g" ((u_long)val), \

sys/arch/luna68k/include/bus.h

411

#define bus_space_set_multi_2(t, h, o, val, c) do { \

sys/arch/luna68k/include/bus.h

421

"r" ((h)+(o)*2), "g" ((u_long)val), \

sys/arch/luna68k/include/bus.h

426

#define bus_space_set_multi_4(t, h, o, val, c) do { \

sys/arch/luna68k/include/bus.h

436

"r" ((h)+(o)), "g" ((u_long)val), \

sys/arch/luna68k/include/bus.h

450

#define bus_space_set_region_1(t, h, o, val, c) do { \

sys/arch/luna68k/include/bus.h

461

"r" ((h)+(o)*4), "g" ((u_long)val), \

sys/arch/luna68k/include/bus.h

466

#define bus_space_set_region_2(t, h, o, val, c) do { \

sys/arch/luna68k/include/bus.h

477

"r" ((h)+(o)*2), "g" ((u_long)val), \

sys/arch/luna68k/include/bus.h

482

#define bus_space_set_region_4(t, h, o, val, c) do { \

sys/arch/luna68k/include/bus.h

492

"r" ((h)+(o)), "g" ((u_long)val), \

sys/arch/luna68k/stand/boot/machdep.c

175

int i, val;

sys/arch/luna68k/stand/boot/machdep.c

184

if (ufetch_int((void *)(ptr++), (u_int *)&val) != 0)

sys/arch/luna68k/stand/boot/machdep.c

191

val = *ptr++;

sys/arch/luna68k/stand/boot/machdep.c

195

printf("%s", hexstr(val, 8));

sys/arch/luna68k/stand/boot/machdep.c

201

hexstr(int val, int len)

sys/arch/luna68k/stand/boot/machdep.c

210

x = val & 0xF;

sys/arch/luna68k/stand/boot/machdep.c

215

val >>= 4;

sys/arch/luna68k/stand/boot/samachdep.h

49

int val[15];

sys/arch/luna68k/stand/boot/sio.c

256

sioreg(int reg, int val)

sys/arch/luna68k/stand/boot/sio.c

269

sio_addr[chan]->sio_cmd = val;

sys/arch/luna68k/stand/boot/sio.c

270

return val;

sys/arch/m68k/include/bus_space_simple.h

464

#define bus_space_set_multi_1(t, h, o, val, c) do { \

sys/arch/m68k/include/bus_space_simple.h

474

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/m68k/include/bus_space_simple.h

478

#define bus_space_set_multi_2(t, h, o, val, c) do { \

sys/arch/m68k/include/bus_space_simple.h

488

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/m68k/include/bus_space_simple.h

492

#define bus_space_set_multi_4(t, h, o, val, c) do { \

sys/arch/m68k/include/bus_space_simple.h

502

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/m68k/include/bus_space_simple.h

515

#define bus_space_set_region_1(t, h, o, val, c) do { \

sys/arch/m68k/include/bus_space_simple.h

525

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/m68k/include/bus_space_simple.h

529

#define bus_space_set_region_2(t, h, o, val, c) do { \

sys/arch/m68k/include/bus_space_simple.h

539

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/m68k/include/bus_space_simple.h

543

#define bus_space_set_region_4(t, h, o, val, c) do { \

sys/arch/m68k/include/bus_space_simple.h

553

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/m68k/include/fcode.h

101

__asm volatile("movc %0,%%sfc" :: "d" (val));

sys/arch/m68k/include/fcode.h

83

setdfc(int val)

sys/arch/m68k/include/fcode.h

85

__asm volatile("movc %0,%%dfc" :: "d" (val));

sys/arch/m68k/include/fcode.h

99

setsfc(int val)

sys/arch/m68k/include/types.h

42

int val[15];

sys/arch/m68k/m68k/db_disasm.c

1008

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

1317

switch (BITFIELD(*dbuf->val,11,9)) {

sys/arch/m68k/m68k/db_disasm.c

1372

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

1500

if (BITFIELD(opc,5,0) == 0 && *(dbuf->val + 1) == 0) {

sys/arch/m68k/m68k/db_disasm.c

1512

print_disp(dbuf,*(dbuf->val + 1), SIZE_WORD, -1);

sys/arch/m68k/m68k/db_disasm.c

1517

print_disp(dbuf,*(long *)(dbuf->val + 1), SIZE_LONG,

sys/arch/m68k/m68k/db_disasm.c

1524

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

1534

print_disp(dbuf, *(dbuf->val + 2), SIZE_WORD, -1);

sys/arch/m68k/m68k/db_disasm.c

1544

dbuf->val++;

sys/arch/m68k/m68k/db_disasm.c

1546

dbuf->val--;

sys/arch/m68k/m68k/db_disasm.c

1550

dbuf->val++;

sys/arch/m68k/m68k/db_disasm.c

1552

dbuf->val--;

sys/arch/m68k/m68k/db_disasm.c

1687

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

1726

print_disp(dbuf,*(dbuf->val + 1), SIZE_WORD, -1);

sys/arch/m68k/m68k/db_disasm.c

1731

print_disp(dbuf,*(long *)(dbuf->val + 1), SIZE_LONG,

sys/arch/m68k/m68k/db_disasm.c

1737

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

1747

print_disp(dbuf, *(dbuf->val + 2), SIZE_WORD, -1);

sys/arch/m68k/m68k/db_disasm.c

1757

dbuf->val++;

sys/arch/m68k/m68k/db_disasm.c

1759

dbuf->val--;

sys/arch/m68k/m68k/db_disasm.c

1763

dbuf->val++;

sys/arch/m68k/m68k/db_disasm.c

1765

dbuf->val--;

sys/arch/m68k/m68k/db_disasm.c

196

dbuf.val = (short *)loc;

sys/arch/m68k/m68k/db_disasm.c

2003

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

202

opc = *dbuf.val;

sys/arch/m68k/m68k/db_disasm.c

2137

rl = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

2164

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

2169

dbuf->val++;

sys/arch/m68k/m68k/db_disasm.c

2174

dbuf->val--;

sys/arch/m68k/m68k/db_disasm.c

2246

dbuf->val++;

sys/arch/m68k/m68k/db_disasm.c

2252

dbuf->val--;

sys/arch/m68k/m68k/db_disasm.c

2269

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

2335

reg = BITFIELD(*dbuf->val, bit, bit-2);

sys/arch/m68k/m68k/db_disasm.c

2337

mod = BITFIELD(*dbuf->val, bit, bit-2);

sys/arch/m68k/m68k/db_disasm.c

2338

reg = BITFIELD(*dbuf->val, bit-3, bit-5);

sys/arch/m68k/m68k/db_disasm.c

2340

reg = BITFIELD(*dbuf->val, bit, bit-2);

sys/arch/m68k/m68k/db_disasm.c

2341

mod = BITFIELD(*dbuf->val, bit-3, bit-5);

sys/arch/m68k/m68k/db_disasm.c

2352

print_disp(dbuf, *(dbuf->val + 1 + dd), SIZE_WORD,reg);

sys/arch/m68k/m68k/db_disasm.c

2370

print_addr(dbuf, *(dbuf->val + 1 + dd));

sys/arch/m68k/m68k/db_disasm.c

2377

print_addr(dbuf, *(u_long *)(dbuf->val + 1 + dd));

sys/arch/m68k/m68k/db_disasm.c

2385

print_disp(dbuf, *(dbuf->val + 1 + dd), SIZE_WORD,

sys/arch/m68k/m68k/db_disasm.c

2394

*((char *)dbuf->val + 3+ (dd * 2)), sz);

sys/arch/m68k/m68k/db_disasm.c

2398

prints(dbuf, *(dbuf->val + 1 + dd), sz);

sys/arch/m68k/m68k/db_disasm.c

2402

prints(dbuf, *(long *)(dbuf->val + 1 + dd),

sys/arch/m68k/m68k/db_disasm.c

2426

ext = *(dbuf->val + 1 + dd);

sys/arch/m68k/m68k/db_disasm.c

2428

nval = dbuf->val + 2 + dd; /* set to possible displacements */

sys/arch/m68k/m68k/db_disasm.c

2539

reg = BITFIELD(*dbuf->val, bit, bit-2);

sys/arch/m68k/m68k/db_disasm.c

2541

mod = BITFIELD(*dbuf->val, bit, bit-2);

sys/arch/m68k/m68k/db_disasm.c

2542

reg = BITFIELD(*dbuf->val, bit-3, bit-5);

sys/arch/m68k/m68k/db_disasm.c

2544

reg = BITFIELD(*dbuf->val, bit, bit-2);

sys/arch/m68k/m68k/db_disasm.c

2545

mod = BITFIELD(*dbuf->val, bit-3, bit-5);

sys/arch/m68k/m68k/db_disasm.c

2557

disp = *(dbuf->val + 1 + dd);

sys/arch/m68k/m68k/db_disasm.c

2578

print_addr(dbuf, *(dbuf->val + 1 + dd));

sys/arch/m68k/m68k/db_disasm.c

2583

print_addr(dbuf, *(u_long *)(dbuf->val + 1 + dd));

sys/arch/m68k/m68k/db_disasm.c

2589

print_disp(dbuf, *(dbuf->val + 1 + dd), SIZE_WORD, -1);

sys/arch/m68k/m68k/db_disasm.c

2598

*((char *)dbuf->val + 3 + (dd * 2)), sz);

sys/arch/m68k/m68k/db_disasm.c

2602

prints(dbuf, *(dbuf->val + 1 + dd), sz);

sys/arch/m68k/m68k/db_disasm.c

2606

prints(dbuf, *(long *)(dbuf->val + 1 + dd),

sys/arch/m68k/m68k/db_disasm.c

2631

ext = *(dbuf->val + 1 + dd);

sys/arch/m68k/m68k/db_disasm.c

2632

nval = dbuf->val + 2 + dd; /* set to possible displacements */

sys/arch/m68k/m68k/db_disasm.c

2782

cc = BITFIELD(*dbuf->val,bit,bit-3);

sys/arch/m68k/m68k/db_disasm.c

2813

prints(dbuf, BITFIELD(*(dbuf->val + 1),7,0), SIZE_BYTE);

sys/arch/m68k/m68k/db_disasm.c

2817

prints(dbuf, *(dbuf->val + 1), SIZE_WORD);

sys/arch/m68k/m68k/db_disasm.c

282

print_disp(dbuf, *(dbuf->val + 1), SIZE_WORD,

sys/arch/m68k/m68k/db_disasm.c

2821

prints(dbuf, *(long *)(dbuf->val + 1), SIZE_LONG);

sys/arch/m68k/m68k/db_disasm.c

2932

nv = disp + (u_int)dbuf->val + 2;

sys/arch/m68k/m68k/db_disasm.c

2984

prints(dis_buffer_t *dbuf, int val, int sz)

sys/arch/m68k/m68k/db_disasm.c

2988

if (val == 0) {

sys/arch/m68k/m68k/db_disasm.c

2992

prints_wb(dbuf, (char)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

2994

prints_wb(dbuf, (short)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

2996

prints_wb(dbuf, (long)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3003

iprints(dis_buffer_t *dbuf, int val, int sz)

sys/arch/m68k/m68k/db_disasm.c

3007

if (val == 0) {

sys/arch/m68k/m68k/db_disasm.c

3011

iprints_wb(dbuf, (char)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3013

iprints_wb(dbuf, (short)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3015

iprints_wb(dbuf, (long)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3022

printu(dis_buffer_t *dbuf, u_int val, int sz)

sys/arch/m68k/m68k/db_disasm.c

3026

if (val == 0) {

sys/arch/m68k/m68k/db_disasm.c

3030

printu_wb(dbuf, (u_char)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3032

printu_wb(dbuf, (u_short)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3034

printu_wb(dbuf, (u_long)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3039

iprintu(dis_buffer_t *dbuf, u_int val, int sz)

sys/arch/m68k/m68k/db_disasm.c

3043

if (val == 0) {

sys/arch/m68k/m68k/db_disasm.c

3047

iprintu_wb(dbuf, (u_char)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3049

iprintu_wb(dbuf, (u_short)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3051

iprintu_wb(dbuf, (u_long)val, sz, db_radix);

sys/arch/m68k/m68k/db_disasm.c

3056

printu_wb(dis_buffer_t *dbuf, u_int val, int sz, int base)

sys/arch/m68k/m68k/db_disasm.c

3071

*++p = hexdigits[val % base];

sys/arch/m68k/m68k/db_disasm.c

3072

} while (val /= base);

sys/arch/m68k/m68k/db_disasm.c

3081

prints_wb(dis_buffer_t *dbuf, int val, int sz, int base)

sys/arch/m68k/m68k/db_disasm.c

3083

if (val < 0) {

sys/arch/m68k/m68k/db_disasm.c

3085

val = -val;

sys/arch/m68k/m68k/db_disasm.c

3087

printu_wb(dbuf, val, sz, base);

sys/arch/m68k/m68k/db_disasm.c

3091

iprintu_wb(dis_buffer_t *dbuf, u_int val, int sz, int base)

sys/arch/m68k/m68k/db_disasm.c

3106

*++p = hexdigits[val % base];

sys/arch/m68k/m68k/db_disasm.c

3107

} while (val /= base);

sys/arch/m68k/m68k/db_disasm.c

3117

iprints_wb(dis_buffer_t *dbuf, int val, int sz, int base)

sys/arch/m68k/m68k/db_disasm.c

3119

if (val < 0) {

sys/arch/m68k/m68k/db_disasm.c

3121

val = -val;

sys/arch/m68k/m68k/db_disasm.c

3123

iprintu_wb(dbuf, val, sz, base);

sys/arch/m68k/m68k/db_disasm.c

3128

prints_bf(dis_buffer_t *dbuf, int val, int sb, int eb)

sys/arch/m68k/m68k/db_disasm.c

3130

if (ISBITSET(val,sb))

sys/arch/m68k/m68k/db_disasm.c

3131

val = (~0 & ~BITFIELD(~0, sb, eb)) | BITFIELD(val, sb, eb);

sys/arch/m68k/m68k/db_disasm.c

3133

val = BITFIELD(val,sb,eb);

sys/arch/m68k/m68k/db_disasm.c

3135

prints(dbuf, val, SIZE_LONG);

sys/arch/m68k/m68k/db_disasm.c

3139

printu_bf(dis_buffer_t *dbuf, u_int val, int sb, int eb)

sys/arch/m68k/m68k/db_disasm.c

3141

printu(dbuf,BITFIELD(val,sb,eb),SIZE_LONG);

sys/arch/m68k/m68k/db_disasm.c

340

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

341

ext2 = *(dbuf->val + 2);

sys/arch/m68k/m68k/db_disasm.c

375

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

399

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

445

ext = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

811

print_disp(dbuf, *(dbuf->val + 1), SIZE_WORD, -1);

sys/arch/m68k/m68k/db_disasm.c

865

disp = *(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

870

disp = *(long *)(dbuf->val + 1);

sys/arch/m68k/m68k/db_disasm.c

881

print_addr(dbuf, disp + (u_long)dbuf->val + 2);

sys/arch/m68k/m68k/db_disasm.h

405

short *val; /* pointer to memory. */

sys/arch/m68k/m68k/db_disasm.h

415

#define ISBITSET(val,b) ((val) & (1 << (b)))

sys/arch/m68k/m68k/db_disasm.h

417

#define BITFIELD(val,sb,eb) ((BITFIELD_MASK(sb,eb) & (val)) >> (eb))

sys/arch/m68k/m68k/db_disasm.h

420

#define IS_INST(inst,val) ((inst ## _MASK & (val)) == inst ## _INST)

sys/arch/m68k/m68k/db_disasm.h

422

#define IS_INST(inst,val) ((inst/**/_MASK & (val)) == inst/**/_INST)

sys/arch/m68k/m68k/db_trace.c

243

int val;

sys/arch/m68k/m68k/db_trace.c

298

val = 0;

sys/arch/m68k/m68k/db_trace.c

304

val += n;

sys/arch/m68k/m68k/db_trace.c

309

val = get(addr + 2, ISP);

sys/arch/m68k/m68k/db_trace.c

312

val = instruc & LOWORD;

sys/arch/m68k/m68k/db_trace.c

314

val = 20;

sys/arch/m68k/m68k/db_trace.c

315

sp->k_nargs = val / 4;

sys/arch/m68k/m68k/db_trace.c

326

long instruc, val, i;

sys/arch/m68k/m68k/db_trace.c

368

val = instruc & LOWORD;

sys/arch/m68k/m68k/db_trace.c

370

while (val) {

sys/arch/m68k/m68k/db_trace.c

371

if (val & 1) {

sys/arch/m68k/m68k/db_trace.c

375

val >>= 1;

sys/arch/m68k/m68k/db_trace.c

391

long val;

sys/arch/m68k/m68k/db_trace.c

481

val = MAXINT;

sys/arch/m68k/m68k/db_trace.c

483

db_find_sym_and_offset(pos.k_pc, &name, &val);

sys/arch/m68k/m68k/db_trace.c

486

val = MAXINT;

sys/arch/m68k/m68k/db_trace.c

520

db_find_sym_and_offset(fault_pc, &name, &val);

sys/arch/m68k/m68k/db_trace.c

523

val = MAXINT;

sys/arch/m68k/m68k/db_trace.c

537

e_val != val) {

sys/arch/m68k/m68k/db_trace.c

550

if (val == MAXINT)

sys/arch/m68k/m68k/db_trace.c

553

(*pr)(") + %lx\n", val);

sys/arch/m68k/m68k/m68k_trap.c

1160

badaddr_write(volatile void *addr, size_t size, uintmax_t val)

sys/arch/m68k/m68k/m68k_trap.c

1171

DO_POKE(addr, val, uint8_t);

sys/arch/m68k/m68k/m68k_trap.c

1174

DO_POKE(addr, val, uint16_t);

sys/arch/m68k/m68k/m68k_trap.c

1177

DO_POKE(addr, val, uint32_t);

sys/arch/m68k/m68k/m68k_trap.c

1180

DO_POKE(addr, val, uint64_t);

sys/arch/m68k/m68k/m68k_trap.c

276

u_long val;

sys/arch/m68k/m68k/m68k_trap.c

277

if (ufetch_long((void *)a, &val) != 0)

sys/arch/m68k/m68k/m68k_trap.c

278

val = (u_long)-1;

sys/arch/m68k/m68k/m68k_trap.c

279

printf("%lx, current value %lx", pa, val);

sys/arch/m68k/m68k/pmap_68k.c

2101

pmap_stat_update_impl(long *valp, int val)

sys/arch/m68k/m68k/pmap_68k.c

2103

*valp += val;

sys/arch/m68k/m68k/pmap_68k.c

2110

pmap_stat_set_impl(long *valp, int val)

sys/arch/m68k/m68k/pmap_68k.c

2112

atomic_store_relaxed(valp, val);

sys/arch/m68k/m68k/pmap_68k.c

2115

#define pmap_stat_set(pm, stat, val) \

sys/arch/m68k/m68k/pmap_68k.c

2116

pmap_stat_set_impl(&(pm)->pm_stats.stat, (val))

sys/arch/m68k/m68k/pmap_68k.c

4621

int val;

sys/arch/m68k/m68k/pmap_68k.c

4652

val = *loc;

sys/arch/m68k/m68k/pmap_68k.c

4660

val,

sys/arch/m68k/m68k/pmap_68k.c

4845

val = *loc;

sys/arch/m68k/m68k/regdump.c

113

int i, val;

sys/arch/m68k/m68k/regdump.c

125

if (ufetch_int((void *)(ptr++), (u_int *)&val) != 0)

sys/arch/m68k/m68k/regdump.c

130

val = *ptr++;

sys/arch/m68k/m68k/regdump.c

132

printf("%s", hexstr(val, 8));

sys/arch/m68k/m68k/regdump.c

138

hexstr(int val, int len)

sys/arch/m68k/m68k/regdump.c

149

x = val & 0xF;

sys/arch/m68k/m68k/regdump.c

152

val >>= 4;

sys/arch/mac68k/dev/akbd.c

517

int key, press, val;

sys/arch/mac68k/dev/akbd.c

522

val = ADBK_KEYVAL(key);

sys/arch/mac68k/dev/akbd.c

528

wskbd_input(sc->sc_wskbddev, type, val);

sys/arch/mac68k/dev/akbd.c

555

wskbd_input(sc->sc_wskbddev, type, val);

sys/arch/mac68k/dev/akbd.c

571

int intbits, key, press, val;

sys/arch/mac68k/dev/akbd.c

597

val = ADBK_KEYVAL(key);

sys/arch/mac68k/dev/akbd.c

599

*data = val;

sys/arch/mac68k/dev/if_mcvar.h

44

#define NIC_PUT(sc, reg, val) (bus_space_write_1((sc)->sc_regt, \

sys/arch/mac68k/dev/if_mcvar.h

45

(sc)->sc_regh, MACE_REG(reg), (val)))

sys/arch/mac68k/dev/mac68k5380.c

134

#define SET_5380_REG(rnum,val) (SCSI_5380->scsi_5380[((rnum)<<4)] = (val))

sys/arch/mac68k/dev/pbbat.c

407

uint16_t val;

sys/arch/mac68k/dev/pbbat.c

411

val = bat_get_status(dv);

sys/arch/mac68k/dev/pbbat.c

412

if (val != 0) {

sys/arch/mac68k/dev/pbbat.c

423

sc->sc_present = (val >= VOLTS_NOBATT ? 0 : 1);

sys/arch/mac68k/dev/pbbat.c

539

uint16_t val;

sys/arch/mac68k/dev/pbbat.c

541

val = bat_get_voltage();

sys/arch/mac68k/dev/pbbat.c

546

if (val > VOLTS_NOBATT) {

sys/arch/mac68k/dev/pbbat.c

557

} else if (val > VOLTS_CHARGING) {

sys/arch/mac68k/dev/pbbat.c

591

(val - sc->sc_empty) * 10 * LIMIT_SCALE;

sys/arch/mac68k/dev/pbbat.c

599

sc->sc_bat_sensor[PBBAT_VOLTAGE].value_cur = val * 1000;

sys/arch/mac68k/dev/pbbat.c

601

(val >= VOLTS_NOBATT ? ENVSYS_SINVALID : ENVSYS_SVALID);

sys/arch/mac68k/dev/pbbat.c

603

if (val < sc->sc_lcapacity) {

sys/arch/mac68k/dev/pbbat.c

607

} else if (val < sc->sc_wcapacity) {

sys/arch/mac68k/dev/pbbat.c

618

return val;

sys/arch/mac68k/dev/pm_direct.c

1314

int val, error;

sys/arch/mac68k/dev/pm_direct.c

1318

val = pm_LCD_brightness;

sys/arch/mac68k/dev/pm_direct.c

1320

node.sysctl_data = &val;

sys/arch/mac68k/dev/pm_direct.c

1325

val = pm_set_brightness(val);

sys/arch/mac68k/dev/zs.c

736

uint8_t val;

sys/arch/mac68k/dev/zs.c

740

val = *cs->cs_reg_csr;

sys/arch/mac68k/dev/zs.c

742

return val;

sys/arch/mac68k/dev/zs.c

746

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/mac68k/dev/zs.c

750

*cs->cs_reg_csr = val;

sys/arch/mac68k/dev/zs.c

757

uint8_t val;

sys/arch/mac68k/dev/zs.c

759

val = *cs->cs_reg_csr;

sys/arch/mac68k/dev/zs.c

762

val ^= ZSRR0_CTS;

sys/arch/mac68k/dev/zs.c

763

return val;

sys/arch/mac68k/dev/zs.c

767

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/mac68k/dev/zs.c

770

*cs->cs_reg_csr = val;

sys/arch/mac68k/dev/zs.c

777

uint8_t val;

sys/arch/mac68k/dev/zs.c

779

val = *cs->cs_reg_data;

sys/arch/mac68k/dev/zs.c

781

return val;

sys/arch/mac68k/dev/zs.c

785

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/mac68k/dev/zs.c

787

*cs->cs_reg_data = val;

sys/arch/mac68k/include/bus.h

612

#define bus_space_set_multi_1(t, h, o, val, c) do { \

sys/arch/mac68k/include/bus.h

615

(h).bssm1(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

616

#define bus_space_set_multi_2(t, h, o, val, c) do { \

sys/arch/mac68k/include/bus.h

619

(h).bssm2(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

620

#define bus_space_set_multi_4(t, h, o, val, c) do { \

sys/arch/mac68k/include/bus.h

623

(h).bssm4(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

625

#define bus_space_set_multi_1(t, h, o, val, c) \

sys/arch/mac68k/include/bus.h

626

do { if (c) (h).bssm1(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

627

#define bus_space_set_multi_2(t, h, o, val, c) \

sys/arch/mac68k/include/bus.h

628

do { if (c) (h).bssm2(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

629

#define bus_space_set_multi_4(t, h, o, val, c) \

sys/arch/mac68k/include/bus.h

630

do { if (c) (h).bssm4(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

660

#define bus_space_set_region_1(t, h, o, val, c) do { \

sys/arch/mac68k/include/bus.h

663

(h).bssr1(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

664

#define bus_space_set_region_2(t, h, o, val, c) do { \

sys/arch/mac68k/include/bus.h

667

(h).bssr2(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

668

#define bus_space_set_region_4(t, h, o, val, c) do { \

sys/arch/mac68k/include/bus.h

671

(h).bssr4(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

673

#define bus_space_set_region_1(t, h, o, val, c) \

sys/arch/mac68k/include/bus.h

674

do { if (c) (h).bssr1(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

675

#define bus_space_set_region_2(t, h, o, val, c) \

sys/arch/mac68k/include/bus.h

676

do { if (c) (h).bssr2(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/include/bus.h

677

#define bus_space_set_region_4(t, h, o, val, c) \

sys/arch/mac68k/include/bus.h

678

do { if (c) (h).bssr4(t,&(h),o,val,c); } while (0)

sys/arch/mac68k/mac68k/machdep.c

906

int val, base;

sys/arch/mac68k/mac68k/machdep.c

928

val = 0;

sys/arch/mac68k/mac68k/machdep.c

939

val = val * base + toupper(*s) - 'A' + 10;

sys/arch/mac68k/mac68k/machdep.c

941

val = val * base + (*s - '0');

sys/arch/mac68k/mac68k/machdep.c

945

return val;

sys/arch/mac68k/nubus/cpi_nubus.c

874

uint8_t reg, uint8_t val)

sys/arch/mac68k/nubus/cpi_nubus.c

881

bus_space_write_1(bspace, bhandle, CIO_CTRL, val);

sys/arch/mac68k/nubus/cpi_nubus.c

889

uint8_t val;

sys/arch/mac68k/nubus/cpi_nubus.c

894

val = bus_space_read_1(bspace, bhandle, CIO_CTRL);

sys/arch/mac68k/nubus/cpi_nubus.c

897

return val;

sys/arch/mac68k/nubus/if_netdock_nubus.c

160

#define NIC_PUT_1(sc, o, val) (bus_space_write_1((sc)->sc_regt, \

sys/arch/mac68k/nubus/if_netdock_nubus.c

161

(sc)->sc_regh, (o), (val)))

sys/arch/mac68k/nubus/if_netdock_nubus.c

164

#define NIC_PUT_2(sc, o, val) (bus_space_write_2((sc)->sc_regt, \

sys/arch/mac68k/nubus/if_netdock_nubus.c

165

(sc)->sc_regh, (o), (val)))

sys/arch/mac68k/nubus/if_netdock_nubus.c

168

#define NIC_PUT_4(sc, o, val) (bus_space_write_4((sc)->sc_regt, \

sys/arch/mac68k/nubus/if_netdock_nubus.c

169

(sc)->sc_regh, (o), (val)))

sys/arch/mac68k/obio/ascaudio.c

793

int8_t val;

sys/arch/mac68k/obio/ascaudio.c

837

val = bus_space_read_1(sc->sc_tag,

sys/arch/mac68k/obio/ascaudio.c

839

val ^= 0x80;

sys/arch/mac68k/obio/ascaudio.c

840

val = val * sc->sc_recvol / 64;

sys/arch/mac68k/obio/ascaudio.c

841

*sc->sc_rptr++ = val;

sys/arch/mac68k/obio/ascaudio.c

903

val = *sc->sc_wptr++;

sys/arch/mac68k/obio/ascaudio.c

904

val ^= 0x80;

sys/arch/mac68k/obio/ascaudio.c

908

sc->sc_handle, FIFO_A, val);

sys/arch/mac68k/obio/ascaudio.c

910

sc->sc_handle, FIFO_A, val);

sys/arch/mac68k/obio/ascaudio.c

913

sc->sc_handle, FIFO_B, val);

sys/arch/mac68k/obio/ascaudio.c

915

sc->sc_handle, FIFO_B, val);

sys/arch/mac68k/obio/ascaudio.c

919

val = *sc->sc_wptr++;

sys/arch/mac68k/obio/ascaudio.c

920

val ^= 0x80;

sys/arch/mac68k/obio/ascaudio.c

924

sc->sc_handle, FIFO_A, val);

sys/arch/mac68k/obio/ascaudio.c

927

sc->sc_handle, FIFO_B, val);

sys/arch/mac68k/obio/esp.c

429

esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/mac68k/obio/esp.c

432

uint8_t v = val;

sys/arch/mac68k/obio/esp.c

575

esp_dma_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/mac68k/obio/esp.c

579

esc->sc_reg[reg * 16] = val;

sys/arch/mac68k/obio/grf_obio.c

409

#define dafb_write_lut(val) \

sys/arch/mac68k/obio/grf_obio.c

410

bus_space_write_1(sc->sc_tag, sc->sc_cmh, DAFB_CMAP_LUT, val)

sys/arch/mac68k/obio/grf_obio.c

444

#define civic_write_lut(val) \

sys/arch/mac68k/obio/grf_obio.c

445

bus_space_write_1(sc->sc_tag, sc->sc_cmh, CIVIC_CMAP_LUT, val)

sys/arch/mac68k/obio/grf_obio.c

476

#define valkyrie_write_lut(val) \

sys/arch/mac68k/obio/grf_obio.c

477

bus_space_write_1(sc->sc_tag, sc->sc_cmh, VALKYRIE_CMAP_LUT, val)

sys/arch/mac68k/obio/grf_obio.c

496

#define rbv_write_lut(val) \

sys/arch/mac68k/obio/grf_obio.c

497

bus_space_write_1(sc->sc_tag, sc->sc_cmh, RBV_CMAP_LUT, val)

sys/arch/macppc/dev/akbd.c

498

int press, val;

sys/arch/macppc/dev/akbd.c

502

val = ADBK_KEYVAL(key);

sys/arch/macppc/dev/akbd.c

506

wskbd_input(sc->sc_wskbddev, type, val);

sys/arch/macppc/dev/akbd.c

580

int key, press, val;

sys/arch/macppc/dev/akbd.c

602

val = ADBK_KEYVAL(key);

sys/arch/macppc/dev/akbd.c

604

*data = val;

sys/arch/macppc/dev/awacs.c

582

awacs_write_reg(struct awacs_softc *sc, int reg, int val)

sys/arch/macppc/dev/awacs.c

585

bus_space_write_4(sc->sc_tag, sc->sc_regh, reg, val);

sys/arch/macppc/dev/drivebay.c

115

printdir(struct drivebay_softc *sc, uint32_t val, uint32_t mask, char letter)

sys/arch/macppc/dev/drivebay.c

121

val &= mask;

sys/arch/macppc/dev/drivebay.c

124

bits[i] = (val & bit) ? 'X' : ' ';

sys/arch/macppc/dev/drivebay.c

214

drivebay_writereg(struct drivebay_softc *sc, int reg, uint32_t val)

sys/arch/macppc/dev/drivebay.c

221

creg = (uint8_t)val;

sys/arch/macppc/dev/drivebay.c

224

if (reg == PCAGPIO_OUTPUT) sc->sc_state = val;

sys/arch/macppc/dev/esp.c

261

esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/macppc/dev/esp.c

264

uint8_t v = val;

sys/arch/macppc/dev/if_bm.c

140

bmac_write_reg(struct bmac_softc *sc, bus_size_t off, uint16_t val)

sys/arch/macppc/dev/if_bm.c

142

bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val);

sys/arch/macppc/dev/if_bm.c

146

bmac_set_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val)

sys/arch/macppc/dev/if_bm.c

148

val |= bmac_read_reg(sc, off);

sys/arch/macppc/dev/if_bm.c

149

bmac_write_reg(sc, off, val);

sys/arch/macppc/dev/if_bm.c

153

bmac_reset_bits(struct bmac_softc *sc, bus_size_t off, uint16_t val)

sys/arch/macppc/dev/if_bm.c

155

bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);

sys/arch/macppc/dev/if_bm.c

847

bmac_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/macppc/dev/if_bm.c

849

return mii_bitbang_readreg(self, &bmac_mbo, phy, reg, val);

sys/arch/macppc/dev/if_bm.c

853

bmac_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/macppc/dev/if_bm.c

855

return mii_bitbang_writereg(self, &bmac_mbo, phy, reg, val);

sys/arch/macppc/dev/if_bm.c

867

bmac_mbo_write(device_t self, uint32_t val)

sys/arch/macppc/dev/if_bm.c

871

bmac_write_reg(sc, MIFCSR, val);

sys/arch/macppc/dev/if_gm.c

263

gmac_write_reg(struct gmac_softc *sc, int reg, u_int val)

sys/arch/macppc/dev/if_gm.c

265

out32rb(sc->sc_reg + reg, val);

sys/arch/macppc/dev/if_gm.c

836

gmac_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/macppc/dev/if_gm.c

854

*val = gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff;

sys/arch/macppc/dev/if_gm.c

859

gmac_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/macppc/dev/if_gm.c

865

0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff));

sys/arch/macppc/dev/if_mcvar.h

44

#define NIC_PUT(sc, reg, val) (bus_space_write_1((sc)->sc_regt, \

sys/arch/macppc/dev/if_mcvar.h

45

(sc)->sc_regh, MACE_REG(reg), (val)))

sys/arch/macppc/dev/ki2c.c

270

ki2c_writereg(struct ki2c_softc *sc, int reg, uint8_t val)

sys/arch/macppc/dev/ki2c.c

273

bus_space_write_1(sc->sc_tag, sc->sc_bh, reg * sc->sc_regstep, val);

sys/arch/macppc/dev/ki2c.c

72

uint8_t val = channel ? 0x10 : 0x00;

sys/arch/macppc/dev/ki2c.c

75

ki2c_setmode(sc, val | I2C_STDMODE);

sys/arch/macppc/dev/mesh.c

286

mesh_set_reg(struct mesh_softc *sc, int reg, int val)

sys/arch/macppc/dev/mesh.c

288

out8(sc->sc_reg + reg, val);

sys/arch/macppc/dev/obio.c

794

uint32_t val, ret;

sys/arch/macppc/dev/obio.c

796

val = obio_read_1(reg);

sys/arch/macppc/dev/obio.c

797

if (val & GPIO_DDR_OUTPUT) {

sys/arch/macppc/dev/obio.c

798

ret = (val & GPIO_DATA) != 0;

sys/arch/macppc/dev/obio.c

800

ret = (val & GPIO_LEVEL) != 0;

sys/arch/macppc/dev/obio.c

812

uint32_t val;

sys/arch/macppc/dev/obio.c

813

val = obio_read_4(reg);

sys/arch/macppc/dev/obio.c

814

DPRINTF("%s: reg %x %08x\n", __func__, reg, val);

sys/arch/macppc/dev/obio.c

815

node.sysctl_data = &val;

sys/arch/macppc/dev/obio.c

870

gpio_set(void *cookie, int val)

sys/arch/macppc/dev/obio.c

875

if (val) {

sys/arch/macppc/dev/platinumfb.c

285

platinumfb_write_reg(struct platinumfb_softc *sc, int reg, uint32_t val)

sys/arch/macppc/dev/platinumfb.c

287

out32(sc->sc_reg + PLATINUM_REG_OFFSET_ADDR(reg), val);

sys/arch/macppc/dev/platinumfb.c

300

int reg_offset, uint8_t val)

sys/arch/macppc/dev/platinumfb.c

302

out8(sc->sc_cmap + reg_offset, val);

sys/arch/macppc/dev/pm_direct.c

1084

pm_write_nvram(int addr, int val)

sys/arch/macppc/dev/pm_direct.c

1093

p.data[2] = val;

sys/arch/macppc/dev/pm_direct.c

889

pm_set_brightness(int val)

sys/arch/macppc/dev/pm_direct.c

893

val = 0x7f - val / 2;

sys/arch/macppc/dev/pm_direct.c

894

if (val < 0x08)

sys/arch/macppc/dev/pm_direct.c

895

val = 0x08;

sys/arch/macppc/dev/pm_direct.c

896

if (val > 0x78)

sys/arch/macppc/dev/pm_direct.c

897

val = 0x78;

sys/arch/macppc/dev/pm_direct.c

902

p.data[0] = val;

sys/arch/macppc/dev/pm_direct.c

909

int val;

sys/arch/macppc/dev/pm_direct.c

911

val = pm_read_brightness();

sys/arch/macppc/dev/pm_direct.c

912

pm_set_brightness(val);

sys/arch/macppc/dev/pmu.c

1030

val = 0x7f - (sc->sc_brightness_wanted >> 1);

sys/arch/macppc/dev/pmu.c

1031

if (val < 0x08)

sys/arch/macppc/dev/pmu.c

1032

val = 0x08;

sys/arch/macppc/dev/pmu.c

1033

if (val > 0x78)

sys/arch/macppc/dev/pmu.c

1034

val = 0x78;

sys/arch/macppc/dev/pmu.c

1035

cmd[0] = val;

sys/arch/macppc/dev/pmu.c

996

int val;

sys/arch/macppc/dev/snapper.c

1522

snapper_set_basstreble(struct snapper_softc *sc, u_int val, u_int mode)

sys/arch/macppc/dev/snapper.c

1524

int i = val & 0xFF;

sys/arch/macppc/dev/snapper.c

1550

snapper_set_treble(struct snapper_softc *sc, u_int val)

sys/arch/macppc/dev/snapper.c

1552

if (sc->sc_treble != (u_char)val) {

sys/arch/macppc/dev/snapper.c

1553

sc->sc_treble = val;

sys/arch/macppc/dev/snapper.c

1554

snapper_set_basstreble(sc, val, DEQ_TREBLE);

sys/arch/macppc/dev/snapper.c

1559

snapper_set_bass(struct snapper_softc *sc, u_int val)

sys/arch/macppc/dev/snapper.c

1561

if (sc->sc_bass != (u_char)val) {

sys/arch/macppc/dev/snapper.c

1562

sc->sc_bass = val;

sys/arch/macppc/dev/snapper.c

1563

snapper_set_basstreble(sc, val, DEQ_BASS);

sys/arch/macppc/dev/snapper.c

1889

gpio_write(bus_size_t addr, int val)

sys/arch/macppc/dev/snapper.c

1894

if (val)

sys/arch/macppc/dev/valkyriefb.c

161

valkyriefb_write_reg(struct valkyriefb_softc *sc, int reg, uint8_t val)

sys/arch/macppc/dev/valkyriefb.c

163

*(sc->sc_base + VAL_REGS_OFFSET + reg) = val;

sys/arch/macppc/dev/viareg.h

204

via_reg_and(int ign, int reg, int val)

sys/arch/macppc/dev/viareg.h

208

out8(addr, in8(addr) & val);

sys/arch/macppc/dev/viareg.h

212

via_reg_or(int ign, int reg, int val)

sys/arch/macppc/dev/viareg.h

216

out8(addr, in8(addr) | val);

sys/arch/macppc/dev/viareg.h

220

via_reg_xor(int ign, int reg, int val)

sys/arch/macppc/dev/viareg.h

224

out8(addr, in8(addr) ^ val);

sys/arch/macppc/dev/viareg.h

236

write_via_reg(int ign, int reg, int val)

sys/arch/macppc/dev/viareg.h

240

out8(addr, val);

sys/arch/macppc/dev/zs.c

791

uint8_t val;

sys/arch/macppc/dev/zs.c

795

val = in8(cs->cs_reg_csr);

sys/arch/macppc/dev/zs.c

797

return val;

sys/arch/macppc/dev/zs.c

801

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/macppc/dev/zs.c

805

out8(cs->cs_reg_csr, val);

sys/arch/macppc/dev/zs.c

812

uint8_t val;

sys/arch/macppc/dev/zs.c

814

val = in8(cs->cs_reg_csr);

sys/arch/macppc/dev/zs.c

817

val ^= ZSRR0_CTS;

sys/arch/macppc/dev/zs.c

818

return val;

sys/arch/macppc/dev/zs.c

822

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/macppc/dev/zs.c

825

out8(cs->cs_reg_csr, val);

sys/arch/macppc/dev/zs.c

832

uint8_t val;

sys/arch/macppc/dev/zs.c

834

val = in8(cs->cs_reg_data);

sys/arch/macppc/dev/zs.c

836

return val;

sys/arch/macppc/dev/zs.c

840

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/macppc/dev/zs.c

842

out8(cs->cs_reg_data, val);

sys/arch/macppc/include/z8530var.h

162

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg,uint8_t val);

sys/arch/macppc/include/z8530var.h

163

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/macppc/include/z8530var.h

164

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/macppc/macppc/pic_u3_ht.c

598

u3_ht_write_be(struct u3_ht_ops *u3_ht, u_int reg, uint32_t val)

sys/arch/macppc/macppc/pic_u3_ht.c

602

out32(addr, val);

sys/arch/macppc/macppc/pic_u3_ht.c

614

u3_ht_write_le(struct u3_ht_ops *u3_ht, u_int reg, uint32_t val)

sys/arch/macppc/macppc/pic_u3_ht.c

618

out32rb(addr, val);

sys/arch/macppc/macppc/pic_u3_ht.c

80

#define u3_ht_write(ptr,reg,val) (ptr)->ht_write(ptr, reg, val)

sys/arch/mips/adm5120/adm5120_cfio.c

409

cf_bs_w_1(void *cookie, bus_space_handle_t bh, bus_size_t offset, uint8_t val)

sys/arch/mips/adm5120/adm5120_cfio.c

412

offset, val);

sys/arch/mips/adm5120/adm5120_cfio.c

414

offset, val);

sys/arch/mips/adm5120/adm5120_cfio.c

447

cf_bs_ws_1(void *cookie, bus_space_handle_t bh, bus_size_t offset, uint8_t val)

sys/arch/mips/adm5120/adm5120_cfio.c

450

cf_handles[bh].ch_handle[0], offset, val);

sys/arch/mips/adm5120/adm5120_cfio.c

452

cf_handles[bh].ch_handle[1], offset, val);

sys/arch/mips/adm5120/adm5120_cfio.c

89

static void cf_bs_w_1(void *, bus_space_handle_t, bus_size_t, uint8_t val);

sys/arch/mips/adm5120/adm5120_cfio.c

95

static void cf_bs_ws_1(void *, bus_space_handle_t, bus_size_t, uint8_t val);

sys/arch/mips/adm5120/dev/admgpio.c

54

admgpio_write(struct mainbus_softc *sc, uint32_t val)

sys/arch/mips/adm5120/dev/admgpio.c

56

bus_space_write_4(sc->sc_obiot, sc->sc_gpioh, ADM5120_GPIO0, val);

sys/arch/mips/adm5120/dev/admwdog.c

62

admwdog_write(struct admsw_softc *sc, uint32_t val)

sys/arch/mips/adm5120/dev/admwdog.c

64

bus_space_write_4(sc->sc_st, sc->sc_ioh, ADM5120_WDOG0, val);

sys/arch/mips/adm5120/dev/if_admsw.c

1229

int old, new, val;

sys/arch/mips/adm5120/dev/if_admsw.c

1235

val = PHY_CNTL2_AUTONEG | PHY_CNTL2_100M | PHY_CNTL2_FDX;

sys/arch/mips/adm5120/dev/if_admsw.c

1238

val = PHY_CNTL2_100M | PHY_CNTL2_FDX;

sys/arch/mips/adm5120/dev/if_admsw.c

1240

val = PHY_CNTL2_100M;

sys/arch/mips/adm5120/dev/if_admsw.c

1243

val = PHY_CNTL2_FDX;

sys/arch/mips/adm5120/dev/if_admsw.c

1245

val = 0;

sys/arch/mips/adm5120/dev/if_admsw.c

1252

new |= (val << port);

sys/arch/mips/alchemy/au_himem_space.c

381

uint16_t val;

sys/arch/mips/alchemy/au_himem_space.c

385

val = (*(volatile uint16_t *)(intptr_t)(h + o));

sys/arch/mips/alchemy/au_himem_space.c

386

return (c->c_swswap ? bswap16(val) : val);

sys/arch/mips/alchemy/au_himem_space.c

392

uint32_t val;

sys/arch/mips/alchemy/au_himem_space.c

396

val = (*(volatile uint32_t *)(intptr_t)(h + o));

sys/arch/mips/alchemy/au_himem_space.c

397

return (c->c_swswap ? bswap32(val) : val);

sys/arch/mips/alchemy/au_himem_space.c

403

uint64_t val;

sys/arch/mips/alchemy/au_himem_space.c

407

val = (*(volatile uint64_t *)(intptr_t)(h + o));

sys/arch/mips/alchemy/au_himem_space.c

408

return (c->c_swswap ? bswap64(val) : val);

sys/arch/mips/alchemy/au_himem_space.c

412

au_himem_w_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t val)

sys/arch/mips/alchemy/au_himem_space.c

415

*(volatile uint8_t *)(intptr_t)(h + o) = val;

sys/arch/mips/alchemy/au_himem_space.c

420

au_himem_w_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t val)

sys/arch/mips/alchemy/au_himem_space.c

424

*(volatile uint16_t *)(intptr_t)(h + o) = c->c_swswap ? bswap16(val) : val;

sys/arch/mips/alchemy/au_himem_space.c

429

au_himem_w_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t val)

sys/arch/mips/alchemy/au_himem_space.c

433

*(volatile uint32_t *)(intptr_t)(h + o) = c->c_swswap ? bswap32(val) : val;

sys/arch/mips/alchemy/au_himem_space.c

438

au_himem_w_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t val)

sys/arch/mips/alchemy/au_himem_space.c

442

*(volatile uint64_t *)(intptr_t)(h + o) = c->c_swswap ? bswap64(val) : val;

sys/arch/mips/alchemy/au_himem_space.c

449

uint16_t val;

sys/arch/mips/alchemy/au_himem_space.c

453

val = (*(volatile uint16_t *)(intptr_t)(h + o));

sys/arch/mips/alchemy/au_himem_space.c

454

return (c->c_hwswap ? bswap16(val) : val);

sys/arch/mips/alchemy/au_himem_space.c

460

uint32_t val;

sys/arch/mips/alchemy/au_himem_space.c

464

val = (*(volatile uint32_t *)(intptr_t)(h + o));

sys/arch/mips/alchemy/au_himem_space.c

465

return (c->c_hwswap ? bswap32(val) : val);

sys/arch/mips/alchemy/au_himem_space.c

471

uint64_t val;

sys/arch/mips/alchemy/au_himem_space.c

475

val = (*(volatile uint64_t *)(intptr_t)(h + o));

sys/arch/mips/alchemy/au_himem_space.c

476

return (c->c_hwswap ? bswap64(val) : val);

sys/arch/mips/alchemy/au_himem_space.c

480

au_himem_ws_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t val)

sys/arch/mips/alchemy/au_himem_space.c

484

*(volatile uint16_t *)(intptr_t)(h + o) = c->c_hwswap ? bswap16(val) : val;

sys/arch/mips/alchemy/au_himem_space.c

489

au_himem_ws_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t val)

sys/arch/mips/alchemy/au_himem_space.c

493

*(volatile uint32_t *)(intptr_t)(h + o) = c->c_hwswap ? bswap32(val) : val;

sys/arch/mips/alchemy/au_himem_space.c

498

au_himem_ws_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t val)

sys/arch/mips/alchemy/au_himem_space.c

502

*(volatile uint64_t *)(intptr_t)(h + o) = c->c_hwswap ? bswap64(val) : val;

sys/arch/mips/alchemy/au_himem_space.c

632

bus_space_handle_t h, bus_size_t o, TYPE val, \

sys/arch/mips/alchemy/au_himem_space.c

637

__CONCAT(au_himem_w_,BYTES)(v, h, o, val); \

sys/arch/mips/alchemy/au_himem_space.c

648

bus_space_handle_t h, bus_size_t o, TYPE val, \

sys/arch/mips/alchemy/au_himem_space.c

653

__CONCAT(au_himem_w_,BYTES)(v, h, o, val); \

sys/arch/mips/alchemy/au_timer.c

58

#define SET_PC_REG(reg, wait, val) \

sys/arch/mips/alchemy/au_timer.c

64

bus_space_write_4(st, sh, (reg), (val)); \

sys/arch/mips/alchemy/au_wired_space.c

336

uint16_t val = (*(volatile uint16_t *)(h + o));

sys/arch/mips/alchemy/au_wired_space.c

339

return (c->c_swswap ? bswap16(val) : val);

sys/arch/mips/alchemy/au_wired_space.c

345

uint32_t val = (*(volatile uint32_t *)(h + o));

sys/arch/mips/alchemy/au_wired_space.c

348

return (c->c_swswap ? bswap32(val) : val);

sys/arch/mips/alchemy/au_wired_space.c

354

uint64_t val = (*(volatile uint64_t *)(h + o));

sys/arch/mips/alchemy/au_wired_space.c

357

return (c->c_swswap ? bswap64(val) : val);

sys/arch/mips/alchemy/au_wired_space.c

361

au_wired_w_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t val)

sys/arch/mips/alchemy/au_wired_space.c

364

*(volatile uint8_t *)(h + o) = val;

sys/arch/mips/alchemy/au_wired_space.c

368

au_wired_w_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t val)

sys/arch/mips/alchemy/au_wired_space.c

372

*(volatile uint16_t *)(h + o) = c->c_swswap ? bswap16(val) : val;

sys/arch/mips/alchemy/au_wired_space.c

376

au_wired_w_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t val)

sys/arch/mips/alchemy/au_wired_space.c

380

*(volatile uint32_t *)(h + o) = c->c_swswap ? bswap32(val) : val;

sys/arch/mips/alchemy/au_wired_space.c

384

au_wired_w_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t val)

sys/arch/mips/alchemy/au_wired_space.c

388

*(volatile uint64_t *)(h + o) = c->c_swswap ? bswap64(val) : val;

sys/arch/mips/alchemy/au_wired_space.c

394

uint16_t val = (*(volatile uint16_t *)(h + o));

sys/arch/mips/alchemy/au_wired_space.c

397

return (c->c_hwswap ? bswap16(val) : val);

sys/arch/mips/alchemy/au_wired_space.c

403

uint32_t val = (*(volatile uint32_t *)(h + o));

sys/arch/mips/alchemy/au_wired_space.c

406

return (c->c_hwswap ? bswap32(val) : val);

sys/arch/mips/alchemy/au_wired_space.c

412

uint64_t val = (*(volatile uint64_t *)(h + o));

sys/arch/mips/alchemy/au_wired_space.c

415

return (c->c_hwswap ? bswap64(val) : val);

sys/arch/mips/alchemy/au_wired_space.c

419

au_wired_ws_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t val)

sys/arch/mips/alchemy/au_wired_space.c

423

*(volatile uint16_t *)(h + o) = c->c_hwswap ? bswap16(val) : val;

sys/arch/mips/alchemy/au_wired_space.c

427

au_wired_ws_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t val)

sys/arch/mips/alchemy/au_wired_space.c

431

*(volatile uint32_t *)(h + o) = c->c_hwswap ? bswap32(val) : val;

sys/arch/mips/alchemy/au_wired_space.c

435

au_wired_ws_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t val)

sys/arch/mips/alchemy/au_wired_space.c

439

*(volatile uint64_t *)(h + o) = c->c_hwswap ? bswap64(val) : val;

sys/arch/mips/alchemy/au_wired_space.c

571

bus_space_handle_t h, bus_size_t o, TYPE val, \

sys/arch/mips/alchemy/au_wired_space.c

576

__CONCAT(au_wired_w_,BYTES)(v, h, o, val); \

sys/arch/mips/alchemy/au_wired_space.c

588

bus_space_handle_t h, bus_size_t o, TYPE val, \

sys/arch/mips/alchemy/au_wired_space.c

593

__CONCAT(au_wired_w_,BYTES)(v, h, o, val); \

sys/arch/mips/alchemy/dev/augpiovar.h

48

#define AUGPIO_WRITE(pin,val) augpio_write(NULL, (pin), (val))

sys/arch/mips/alchemy/dev/augpiovar.h

53

#define AUGPIO2_WRITE(pin,val) augpio2_write(NULL, (pin), (val))

sys/arch/mips/alchemy/dev/ausmbus_psc.c

354

ausmbus_send_1(struct ausmbus_softc *sc, uint8_t val)

sys/arch/mips/alchemy/dev/ausmbus_psc.c

363

error = ausmbus_write_byte(sc, val, I2C_F_STOP);

sys/arch/mips/alchemy/dev/ausmbus_psc.c

372

ausmbus_write_1(struct ausmbus_softc *sc, uint8_t cmd, uint8_t val)

sys/arch/mips/alchemy/dev/ausmbus_psc.c

386

error = ausmbus_write_byte(sc, val, I2C_F_STOP);

sys/arch/mips/alchemy/dev/ausmbus_psc.c

395

ausmbus_write_2(struct ausmbus_softc *sc, uint8_t cmd, uint16_t val)

sys/arch/mips/alchemy/dev/ausmbus_psc.c

400

high = (val >> 8) & 0xff;

sys/arch/mips/alchemy/dev/ausmbus_psc.c

401

low = val & 0xff;

sys/arch/mips/alchemy/dev/ausmbus_psc.c

69

#define ausmbus_reg_write(sc, reg, val) \

sys/arch/mips/alchemy/dev/ausmbus_psc.c

71

val); \

sys/arch/mips/alchemy/dev/if_aumac.c

1009

*val = bus_space_read_4(sc->sc_st, sc->sc_mac_sh, MAC_MIIDATA)

sys/arch/mips/alchemy/dev/if_aumac.c

1020

aumac_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/mips/alchemy/dev/if_aumac.c

1028

bus_space_write_4(sc->sc_st, sc->sc_mac_sh, MAC_MIIDATA, val);

sys/arch/mips/alchemy/dev/if_aumac.c

995

aumac_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/mips/atheros/ar5312.c

186

addprop_integer(device_t dev, const char *name, uint32_t val)

sys/arch/mips/atheros/ar5312.c

189

pn = prop_number_create_integer(val);

sys/arch/mips/atheros/ar5315.c

214

addprop_integer(device_t dev, const char *name, uint32_t val)

sys/arch/mips/atheros/ar5315.c

217

pn = prop_number_create_integer(val);

sys/arch/mips/atheros/ar9344.c

207

addprop_integer(device_t dev, const char *name, uint32_t val)

sys/arch/mips/atheros/ar9344.c

210

pn = prop_number_create_integer(val);

sys/arch/mips/atheros/dev/aevar.h

265

#define AE_WRITE(sc, reg, val) \

sys/arch/mips/atheros/dev/aevar.h

266

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/arch/mips/atheros/dev/if_ae.c

1858

ae_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/mips/atheros/dev/if_ae.c

1875

*val = AE_READ(sc, CSR_MIIDATA) & 0xffff;

sys/arch/mips/atheros/dev/if_ae.c

1885

ae_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/mips/atheros/dev/if_ae.c

1892

AE_WRITE(sc, CSR_MIIDATA, val);

sys/arch/mips/cavium/dev/if_cnmac.c

435

cnmac_mii_readreg(device_t self, int phy_addr, int reg, uint16_t *val)

sys/arch/mips/cavium/dev/if_cnmac.c

439

return octsmi_read(sc->sc_smi, phy_addr, reg, val);

sys/arch/mips/cavium/dev/if_cnmac.c

443

cnmac_mii_writereg(device_t self, int phy_addr, int reg, uint16_t val)

sys/arch/mips/cavium/dev/if_cnmac.c

447

return octsmi_write(sc->sc_smi, phy_addr, reg, val);

sys/arch/mips/cavium/dev/octeon_cib.c

180

uint64_t val;

sys/arch/mips/cavium/dev/octeon_cib.c

199

val = CIB_READ_EN(sc);

sys/arch/mips/cavium/dev/octeon_cib.c

200

val |= ih->ih_mask;

sys/arch/mips/cavium/dev/octeon_cib.c

201

CIB_WRITE_EN(sc, val);

sys/arch/mips/cavium/dev/octeon_cib.c

211

uint64_t val;

sys/arch/mips/cavium/dev/octeon_cib.c

213

val = CIB_READ_EN(sc);

sys/arch/mips/cavium/dev/octeon_cib.c

214

val &= ~ih->ih_mask;

sys/arch/mips/cavium/dev/octeon_cib.c

215

CIB_WRITE_EN(sc, val);

sys/arch/mips/cavium/dev/octeon_cib.c

83

#define CIB_WRITE_RAW(sc, val) \

sys/arch/mips/cavium/dev/octeon_cib.c

84

bus_space_write_8((sc)->sc_bst, (sc)->sc_bsh_raw, 0, (val))

sys/arch/mips/cavium/dev/octeon_cib.c

87

#define CIB_WRITE_EN(sc, val) \

sys/arch/mips/cavium/dev/octeon_cib.c

88

bus_space_write_8((sc)->sc_bst, (sc)->sc_bsh_en, 0, (val))

sys/arch/mips/cavium/dev/octeon_cop2var.h

1012

CNASM_MT2(val, CVM_MT_CRC_HALF_REFLECT, 0)

sys/arch/mips/cavium/dev/octeon_cop2var.h

1018

CNASM_MT2(val, CVM_MT_CRC_BYTE_REFLECT, 0)

sys/arch/mips/cavium/dev/octeon_cop2var.h

1025

[val] "=d" (val),

sys/arch/mips/cavium/dev/octeon_cop2var.h

960

octeon_cop2_crc_polynomial(val)

sys/arch/mips/cavium/dev/octeon_cop2var.h

967

: [val] "d" (val))

sys/arch/mips/cavium/dev/octeon_cop2var.h

970

#define CVMX_MT_CRC_IV(val) \

sys/arch/mips/cavium/dev/octeon_cop2var.h

971

__asm __volatile (__PUSH "dmtc2 %0,0x0201" __POP :: "d"(val))

sys/arch/mips/cavium/dev/octeon_cop2var.h

972

#define CVMX_MT_CRC_BYTE_REFLECT(val) \

sys/arch/mips/cavium/dev/octeon_cop2var.h

973

__asm __volatile (__PUSH "dmtc2 %0,0x0214" __POP :: "d"(val))

sys/arch/mips/cavium/dev/octeon_cop2var.h

974

#define CVMX_MT_CRC_HALF_REFLECT(val) \

sys/arch/mips/cavium/dev/octeon_cop2var.h

975

__asm __volatile (__PUSH "dmtc2 %0,0x0215" __POP :: "d"(val))

sys/arch/mips/cavium/dev/octeon_cop2var.h

976

#define CVMX_MT_CRC_DWORD_REFLECT(val) \

sys/arch/mips/cavium/dev/octeon_cop2var.h

977

__asm __volatile (__PUSH "dmtc2 %0,0x1217" __POP :: "d"(val))

sys/arch/mips/cavium/dev/octeon_cop2var.h

978

#define CVMX_MF_CRC_IV_REFLECT(val) \

sys/arch/mips/cavium/dev/octeon_cop2var.h

979

__asm __volatile (__PUSH "dmfc2 %0,0x0203" __POP : "=d"(val))

sys/arch/mips/cavium/dev/octeon_cop2var.h

994

CNASM_ULD(val, 0, buf)

sys/arch/mips/cavium/dev/octeon_cop2var.h

996

CNASM_MT2(val, CVM_MT_CRC_DWORD_REFLECT, 0)

sys/arch/mips/cavium/dev/octeon_cop2var.h

997

CNASM_ULD(val, -8, buf)

sys/arch/mips/cavium/dev/octeon_cop2var.h

999

CNASM_MT2(val, CVM_MT_CRC_DWORD_REFLECT, 0)

sys/arch/mips/cavium/dev/octeon_dwctwo.c

326

uint32_t val)

sys/arch/mips/cavium/dev/octeon_dwctwo.c

330

mips_sw((h + off) ^ 4, val);

sys/arch/mips/cavium/dev/octeon_dwctwo.c

374

octeon_dwc2_reg_wr(struct octeon_dwc2_softc *sc, bus_size_t off, uint64_t val)

sys/arch/mips/cavium/dev/octeon_dwctwo.c

376

bus_space_write_8(sc->sc_bust, sc->sc_regh, off, val);

sys/arch/mips/cavium/dev/octeon_dwctwo.c

382

octeon_dwc2_reg2_wr(struct octeon_dwc2_softc *sc, bus_size_t off, uint64_t val)

sys/arch/mips/cavium/dev/octeon_dwctwo.c

384

bus_space_write_8(sc->sc_bust, sc->sc_reg2h, off, val);

sys/arch/mips/cavium/dev/octeon_gmx.c

102

#define PCS_WRITE_8(sc, reg, val) \

sys/arch/mips/cavium/dev/octeon_gmx.c

103

bus_space_write_8((sc)->sc_port_gmx->sc_regt, (sc)->sc_port_pcs_regh, (reg), (val))

sys/arch/mips/cavium/dev/octeon_gpio.c

266

int val;

sys/arch/mips/cavium/dev/octeon_gpio.c

268

val = (GPIO_RD_8(sc, GPIO_RX_DAT_OFFSET) >> pin->pin_no) & 1;

sys/arch/mips/cavium/dev/octeon_gpio.c

270

val = !val;

sys/arch/mips/cavium/dev/octeon_gpio.c

272

return val;

sys/arch/mips/cavium/dev/octeon_gpio.c

276

octgpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/mips/cavium/dev/octeon_gpio.c

282

val = !val;

sys/arch/mips/cavium/dev/octeon_gpio.c

284

if (val)

sys/arch/mips/cavium/dev/octeon_gpio.c

60

#define GPIO_WR_8(sc, reg, val) \

sys/arch/mips/cavium/dev/octeon_gpio.c

61

bus_space_write_8((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/mips/cavium/dev/octeon_smi.c

195

octsmi_read(struct octsmi_softc *sc, int phy_addr, int reg, uint16_t *val)

sys/arch/mips/cavium/dev/octeon_smi.c

215

*val = (smi_rd & SMI_RD_DAT_DAT);

sys/arch/mips/cavium/dev/octeon_xhci.c

192

uint64_t i, val;

sys/arch/mips/cavium/dev/octeon_xhci.c

204

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

205

val |= XCTL_CTL_UCTL_RST;

sys/arch/mips/cavium/dev/octeon_xhci.c

206

val |= XCTL_CTL_UAHC_RST;

sys/arch/mips/cavium/dev/octeon_xhci.c

207

val |= XCTL_CTL_UPHY_RST;

sys/arch/mips/cavium/dev/octeon_xhci.c

208

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

209

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

210

val |= XCTL_CTL_CLKDIV_RST;

sys/arch/mips/cavium/dev/octeon_xhci.c

211

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

220

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

221

val &= ~XCTL_CTL_CLKDIV_SEL;

sys/arch/mips/cavium/dev/octeon_xhci.c

222

val |= (i << XCTL_CTL_CLKDIV_SEL_SHIFT) & XCTL_CTL_CLKDIV_SEL;

sys/arch/mips/cavium/dev/octeon_xhci.c

223

val |= XCTL_CTL_CLK_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

224

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

227

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

228

val &= ~XCTL_CTL_CLKDIV_RST;

sys/arch/mips/cavium/dev/octeon_xhci.c

229

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

252

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

253

val &= ~XCTL_CTL_REFCLK_SEL;

sys/arch/mips/cavium/dev/octeon_xhci.c

254

val |= clock_sel << XCTL_CTL_REFCLK_SEL_SHIFT;

sys/arch/mips/cavium/dev/octeon_xhci.c

255

val &= ~XCTL_CTL_REFCLK_DIV2;

sys/arch/mips/cavium/dev/octeon_xhci.c

256

val &= ~XCTL_CTL_REFCLK_FSEL;

sys/arch/mips/cavium/dev/octeon_xhci.c

257

val |= refclk_fsel << XCTL_CTL_REFCLK_FSEL_SHIFT;

sys/arch/mips/cavium/dev/octeon_xhci.c

258

val &= ~XCTL_CTL_MPLL_MULT;

sys/arch/mips/cavium/dev/octeon_xhci.c

259

val |= mpll_mult << XCTL_CTL_MPLL_MULT_SHIFT;

sys/arch/mips/cavium/dev/octeon_xhci.c

260

val |= XCTL_CTL_SSC_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

261

val |= XCTL_CTL_REFCLK_SSP_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

262

val |= XCTL_CTL_SSPOWER_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

263

val |= XCTL_CTL_HSPOWER_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

264

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

269

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

270

val &= ~XCTL_CTL_UCTL_RST;

sys/arch/mips/cavium/dev/octeon_xhci.c

271

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

285

val = XCTL_RD_8(sc, XCTL_HOST_CFG);

sys/arch/mips/cavium/dev/octeon_xhci.c

286

val |= XCTL_HOST_CFG_PPC_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

288

val &= ~XCTL_HOST_CFG_PPC_ACTIVE_HIGH_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

290

val |= XCTL_HOST_CFG_PPC_ACTIVE_HIGH_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

291

XCTL_WR_8(sc, XCTL_HOST_CFG, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

294

val = XCTL_RD_8(sc, XCTL_HOST_CFG);

sys/arch/mips/cavium/dev/octeon_xhci.c

295

val &= ~XCTL_HOST_CFG_PPC_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

296

XCTL_WR_8(sc, XCTL_HOST_CFG, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

300

val = XCTL_RD_8(sc, XCTL_HOST_CFG);

sys/arch/mips/cavium/dev/octeon_xhci.c

301

val &= ~XCTL_HOST_CFG_PPC_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

302

XCTL_WR_8(sc, XCTL_HOST_CFG, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

306

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

307

val &= ~XCTL_CTL_DRD_MODE;

sys/arch/mips/cavium/dev/octeon_xhci.c

308

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

313

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

314

val &= ~XCTL_CTL_UAHC_RST;

sys/arch/mips/cavium/dev/octeon_xhci.c

315

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

319

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

320

val |= XCTL_CTL_CSCLK_EN;

sys/arch/mips/cavium/dev/octeon_xhci.c

321

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

324

val = XCTL_RD_8(sc, XCTL_CTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

325

val &= ~XCTL_CTL_UPHY_RST;

sys/arch/mips/cavium/dev/octeon_xhci.c

326

XCTL_WR_8(sc, XCTL_CTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

330

val = XCTL_RD_8(sc, XCTL_SHIM_CFG);

sys/arch/mips/cavium/dev/octeon_xhci.c

331

val &= ~XCTL_SHIM_CFG_CSR_BYTE_SWAP;

sys/arch/mips/cavium/dev/octeon_xhci.c

332

val &= ~XCTL_SHIM_CFG_DMA_BYTE_SWAP;

sys/arch/mips/cavium/dev/octeon_xhci.c

333

val |= __SHIFTIN(XCTL_SHIM_ENDIAN_BIG, XCTL_SHIM_CFG_DMA_BYTE_SWAP);

sys/arch/mips/cavium/dev/octeon_xhci.c

334

val |= __SHIFTIN(XCTL_SHIM_ENDIAN_BIG, XCTL_SHIM_CFG_CSR_BYTE_SWAP);

sys/arch/mips/cavium/dev/octeon_xhci.c

335

XCTL_WR_8(sc, XCTL_SHIM_CFG, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

344

uint32_t val;

sys/arch/mips/cavium/dev/octeon_xhci.c

346

val = bus_space_read_4(sc->sc_iot, ioh, DWC3_GSNPSID);

sys/arch/mips/cavium/dev/octeon_xhci.c

347

if ((val & 0xffff0000u) != 0x55330000u) {

sys/arch/mips/cavium/dev/octeon_xhci.c

348

aprint_error(": no DWC3 core (DWC3_GSNPSID=%08x)\n", val);

sys/arch/mips/cavium/dev/octeon_xhci.c

351

rev = val & 0xffffu;

sys/arch/mips/cavium/dev/octeon_xhci.c

354

val = bus_space_read_4(sc->sc_iot, ioh, DWC3_GUSB3PIPECTL(0));

sys/arch/mips/cavium/dev/octeon_xhci.c

355

val &= ~DWC3_GUSB3PIPECTL_UX_EXIT_PX;

sys/arch/mips/cavium/dev/octeon_xhci.c

356

val |= DWC3_GUSB3PIPECTL_SUSPHY;

sys/arch/mips/cavium/dev/octeon_xhci.c

357

bus_space_write_4(sc->sc_iot, ioh, DWC3_GUSB3PIPECTL(0), val);

sys/arch/mips/cavium/dev/octeon_xhci.c

359

val = bus_space_read_4(sc->sc_iot, ioh, DWC3_GUSB2PHYCFG(0));

sys/arch/mips/cavium/dev/octeon_xhci.c

360

val |= DWC3_GUSB2PHYCFG_SUSPHY;

sys/arch/mips/cavium/dev/octeon_xhci.c

361

bus_space_write_4(sc->sc_iot, ioh, DWC3_GUSB2PHYCFG(0), val);

sys/arch/mips/cavium/dev/octeon_xhci.c

364

val = bus_space_read_4(sc->sc_iot, ioh, DWC3_GCTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

365

val &= ~DWC3_GCTL_PRTCAP_MASK;

sys/arch/mips/cavium/dev/octeon_xhci.c

366

val |= DWC3_GCTL_PRTCAP_HOST;

sys/arch/mips/cavium/dev/octeon_xhci.c

367

bus_space_write_4(sc->sc_iot, ioh, DWC3_GCTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

369

val = bus_space_read_4(sc->sc_iot, ioh, DWC3_GCTL);

sys/arch/mips/cavium/dev/octeon_xhci.c

370

val &= ~DWC3_GCTL_SCALEDOWN_MASK;

sys/arch/mips/cavium/dev/octeon_xhci.c

371

val &= ~DWC3_GCTL_DISSCRAMBLE;

sys/arch/mips/cavium/dev/octeon_xhci.c

373

val |= DWC3_GCTL_DSBLCLKGTNG | DWC3_GCTL_SOFITPSYNC;

sys/arch/mips/cavium/dev/octeon_xhci.c

375

val &= ~DWC3_GCTL_DSBLCLKGTNG;

sys/arch/mips/cavium/dev/octeon_xhci.c

376

bus_space_write_4(sc->sc_iot, ioh, DWC3_GCTL, val);

sys/arch/mips/cavium/dev/octeon_xhci.c

44

#define XCTL_WR_8(sc, reg, val) \

sys/arch/mips/cavium/dev/octeon_xhci.c

45

bus_space_write_8((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/arch/mips/cfe/cfe_api.c

159

cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)

sys/arch/mips/cfe/cfe_api.c

171

xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);

sys/arch/mips/cfe/cfe_api.c

474

cfe_setenv(char *name, char *val)

sys/arch/mips/cfe/cfe_api.c

486

xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);

sys/arch/mips/cfe/cfe_api.c

487

xiocb.plist.xiocb_envbuf.val_length = cfe_strlen(val);

sys/arch/mips/cfe/cfe_api.h

176

int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen);

sys/arch/mips/cfe/cfe_api.h

192

int cfe_setenv(char *name, char *val);

sys/arch/mips/include/locore.h

469

static inline void mips_sb(register_t addr, uint8_t val) __unused;

sys/arch/mips/include/locore.h

471

static inline void mips_sh(register_t addr, uint16_t val) __unused;

sys/arch/mips/include/locore.h

473

static inline void mips_sw(register_t addr, uint32_t val) __unused;

sys/arch/mips/include/locore.h

477

void mips3_sd(register_t addr, uint64_t val);

sys/arch/mips/include/locore.h

480

static inline void mips3_sd(register_t addr, uint64_t val) __unused;

sys/arch/mips/include/locore.h

537

mips_sb(register_t addr, uint8_t val)

sys/arch/mips/include/locore.h

540

__asm volatile("sb\t%1, 0(%0)" :: "d"(addr), "r"(val) : "memory");

sys/arch/mips/include/locore.h

542

*(volatile uint8_t *)addr = val;

sys/arch/mips/include/locore.h

547

mips_sh(register_t addr, uint16_t val)

sys/arch/mips/include/locore.h

550

__asm volatile("sh\t%1, 0(%0)" :: "d"(addr), "r"(val) : "memory");

sys/arch/mips/include/locore.h

552

*(volatile uint16_t *)addr = val;

sys/arch/mips/include/locore.h

557

mips_sw(register_t addr, uint32_t val)

sys/arch/mips/include/locore.h

560

__asm volatile("sw\t%1, 0(%0)" :: "d"(addr), "r"(val) : "memory");

sys/arch/mips/include/locore.h

562

*(volatile uint32_t *)addr = val;

sys/arch/mips/include/locore.h

568

mips3_sd(register_t addr, uint64_t val)

sys/arch/mips/include/locore.h

571

__asm volatile("sd\t%1, 0(%0)" :: "d"(addr), "r"(val) : "memory");

sys/arch/mips/include/locore.h

573

*(volatile uint64_t *)addr = val;

sys/arch/mips/include/mipsNN.h

46

#define MIPSNN_PUT(reg, val) \

sys/arch/mips/include/types.h

129

register_t val[14];

sys/arch/mips/include/types.h

133

register_t val[14];

sys/arch/mips/ingenic/ingenic_regs.h

119

writereg(uint32_t reg, uint32_t val)

sys/arch/mips/ingenic/ingenic_regs.h

121

*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(reg) = val;

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1059

uint8_t val)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1062

mips3_sd(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1064

mips_sw(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1066

mips_sh(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1068

mips_sb(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1074

uint16_t val)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1077

mips3_sd(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1079

mips_sw(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1081

mips_sh(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1087

uint32_t val)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1091

mips3_sd(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1093

mips_sw(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1099

uint64_t val)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1103

mips3_sd(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

707

const CHIP_TYPE val = mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

709

const CHIP_TYPE val = mips_lwu(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

711

const CHIP_TYPE val = mips_lhu(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

713

const uint8_t val = mips_lbu(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

715

const uint8_t r = (uint8_t)(CHIP_SWAP_ACCESS(val) >> shift);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

729

const CHIP_TYPE val = mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

731

const CHIP_TYPE val = mips_lwu(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

733

const uint16_t val = mips_lhu(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

735

const uint16_t r = (uint16_t)CHIP_SWAP16(val >> shift);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

749

const CHIP_TYPE val = mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

751

const uint32_t val = mips_lwu(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

753

const uint32_t r = (uint32_t)CHIP_SWAP32(val >> shift);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

810

__BS(write_1)(void *v, bus_space_handle_t h, bus_size_t off, uint8_t val)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

815

mips_sb(h, val);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

819

CHIP_TYPE cval = CHIP_SWAP_ACCESS(((CHIP_TYPE)val) << shift);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

831

__BS(write_2)(void *v, bus_space_handle_t h, bus_size_t off, uint16_t val)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

838

mips_sh(h, CHIP_SWAP16(val));

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

842

CHIP_TYPE cval = ((CHIP_TYPE)CHIP_SWAP16(val)) << shift;

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

852

__BS(write_4)(void *v, bus_space_handle_t h, bus_size_t off, uint32_t val)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

859

mips_sw(h, CHIP_SWAP32(val));

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

863

mips3_sd(h, ((CHIP_TYPE)CHIP_SWAP32(val)) << shift);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

868

__BS(write_8)(void *v, bus_space_handle_t h, bus_size_t off, uint64_t val)

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

875

mips3_sd(h, CHIP_SWAP64(val));

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

917

bus_size_t o, TYPE val, bus_size_t c) \

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

921

__C(__BS(write_),BYTES)(v, h, o, val); \

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

922

__BS(barrier)(v, h, o, sizeof val, \

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

934

bus_size_t o, TYPE val, bus_size_t c) \

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

938

__C(__BS(write_),BYTES)(v, h, o, val); \

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

939

o += sizeof val; \

sys/arch/mips/mips/db_interface.c

376

#define SET32(reg, name, val) \

sys/arch/mips/mips/db_interface.c

379

__asm volatile("mtc0 %0,$" ___STRING(reg) :: "r"(val)); \

sys/arch/mips/mips/db_interface.c

382

FLDWIDTH - (int) strlen(name), "", val); \

sys/arch/mips/mips/db_interface.c

387

#define MIPS64_SET32(num, sel, name, val) \

sys/arch/mips/mips/db_interface.c

395

:: "r"(val), "n"(num), "n"(sel)); \

sys/arch/mips/mips/db_interface.c

398

FLDWIDTH - (int) strlen(name), "", val); \

sys/arch/mips/mips/db_interface.c

402

#define MIPS64_SET64(num, sel, name, val) \

sys/arch/mips/mips/db_interface.c

412

:: "r"(val), "n"(num), "n"(sel)); \

sys/arch/mips/mips/db_interface.c

415

FLDWIDTH - (int) strlen(name), "", (uint64_t)val); \

sys/arch/mips/mips/db_interface.c

515

uint32_t val;

sys/arch/mips/mips/db_interface.c

517

val = mipsNN_cp0_config1_read();

sys/arch/mips/mips/db_interface.c

518

db_printf(" config1: %#x\n", val);

sys/arch/mips/mips/db_trace.c

209

sp = pcb->pcb_context.val[_L_SP];

sys/arch/mips/mips/db_trace.c

210

s8 = pcb->pcb_context.val[_L_S8];

sys/arch/mips/mips/db_trace.c

211

ra = pcb->pcb_context.val[_L_RA];

sys/arch/mips/mips/db_trace.c

215

sp = label.val[_L_SP];

sys/arch/mips/mips/db_trace.c

216

s8 = label.val[_L_S8];

sys/arch/mips/mips/db_trace.c

217

ra = label.val[_L_RA];

sys/arch/mips/mips/mips_machdep.c

2149

pcb->pcb_context.val[_L_SR] = MIPS_SR_INT_IE

sys/arch/mips/mips/mips_machdep.c

2152

pcb->pcb_context.val[_L_SR] |= MIPS_SR_KX;

sys/arch/mips/mips/mips_machdep.c

2156

pcb->pcb_context.val[_L_SR] |= MIPS_SR_KX | MIPS_SR_UX;

sys/arch/mips/mips/vm_machdep.c

144

pcb2->pcb_context.val[_L_S0] = (intptr_t)func; /* S0 */

sys/arch/mips/mips/vm_machdep.c

145

pcb2->pcb_context.val[_L_S1] = (intptr_t)arg; /* S1 */

sys/arch/mips/mips/vm_machdep.c

146

pcb2->pcb_context.val[MIPS_CURLWP_LABEL] = (intptr_t)l2; /* T8 */

sys/arch/mips/mips/vm_machdep.c

147

pcb2->pcb_context.val[_L_SP] = (intptr_t)tf; /* SP */

sys/arch/mips/mips/vm_machdep.c

148

pcb2->pcb_context.val[_L_RA] =

sys/arch/mips/mips/vm_machdep.c

152

KASSERT(pcb2->pcb_context.val[_L_SR] & MIPS_SR_KX);

sys/arch/mips/mips/vm_machdep.c

155

KASSERTMSG(pcb2->pcb_context.val[_L_SR] & MIPS_SR_INT_IE,

sys/arch/mips/mips/vm_machdep.c

158

pcb2->pcb_context.val[_L_SR]);

sys/arch/mips/ralink/ralink_com.c

230

sysctl_write(const u_int offset, uint32_t val)

sys/arch/mips/ralink/ralink_com.c

232

*RA_IOREG_VADDR(RA_SYSCTL_BASE, offset) = val;

sys/arch/mips/ralink/ralink_com.c

242

uart_write(const u_int offset, const uint32_t val)

sys/arch/mips/ralink/ralink_com.c

244

*RA_IOREG_VADDR(RALINK_CONADDR, offset) = val;

sys/arch/mips/ralink/ralink_eth.c

1682

ralink_eth_mii_read(device_t self, int phy_addr, int phy_reg, uint16_t *val)

sys/arch/mips/ralink/ralink_eth.c

1730

*val = PCTL1_RD_VAL(

sys/arch/mips/ralink/ralink_eth.c

1737

*val = MDIO_ACCESS_DATA(

sys/arch/mips/ralink/ralink_eth.c

1750

ralink_eth_mii_write(device_t self, int phy_addr, int phy_reg, uint16_t val)

sys/arch/mips/ralink/ralink_eth.c

1756

__func__, phy_addr, phy_reg, val);

sys/arch/mips/ralink/ralink_eth.c

1776

PCTL0_WR_CMD | PCTL0_WR_VAL(val) | PCTL0_REG(phy_reg) |

sys/arch/mips/ralink/ralink_eth.c

1781

MDIO_ACCESS_REG(phy_reg) | MDIO_ACCESS_DATA(val));

sys/arch/mips/ralink/ralink_eth.c

1784

MDIO_ACCESS_REG(phy_reg) | MDIO_ACCESS_DATA(val) |

sys/arch/mips/ralink/ralink_eth.c

267

sy_write(const ralink_eth_softc_t *sc, const bus_size_t off, const uint32_t val)

sys/arch/mips/ralink/ralink_eth.c

269

bus_space_write_4(sc->sc_memt, sc->sc_sy_memh, off, val);

sys/arch/mips/ralink/ralink_eth.c

279

fe_write(const ralink_eth_softc_t *sc, const bus_size_t off, const uint32_t val)

sys/arch/mips/ralink/ralink_eth.c

281

bus_space_write_4(sc->sc_memt, sc->sc_fe_memh, off, val);

sys/arch/mips/ralink/ralink_eth.c

291

sw_write(const ralink_eth_softc_t *sc, const bus_size_t off, const uint32_t val)

sys/arch/mips/ralink/ralink_eth.c

293

bus_space_write_4(sc->sc_memt, sc->sc_sw_memh, off, val);

sys/arch/mips/ralink/ralink_gpio.c

515

sy_write(ra_gpio_softc_t *sc, bus_size_t off, uint32_t val)

sys/arch/mips/ralink/ralink_gpio.c

519

bus_space_write_4(sc->sc_memt, sc->sc_sy_memh, off, val);

sys/arch/mips/ralink/ralink_gpio.c

531

gp_write(ra_gpio_softc_t *sc, bus_size_t off, uint32_t val)

sys/arch/mips/ralink/ralink_gpio.c

535

bus_space_write_4(sc->sc_memt, sc->sc_gp_memh, off, val);

sys/arch/mips/ralink/ralink_intr.c

222

intctl_write(u_int offset, uint32_t val)

sys/arch/mips/ralink/ralink_intr.c

224

*RA_IOREG_VADDR(RA_INTCTL_BASE, offset) = val;

sys/arch/mips/ralink/ralink_reg.h

136

#define FLD_GET(val,pos,mask) (((val) >> (pos)) & (mask))

sys/arch/mips/ralink/ralink_reg.h

137

#define FLD_SET(val,pos,mask) (((val) & (mask)) << (pos))

sys/arch/mips/rmi/rmixl_com.c

202

u_int shift = sizeof(val) * 8; \

sys/arch/mips/rmi/rmixl_com.c

207

rmixl_putchar(hexc[(val >> shift) & 0xf]); \

sys/arch/mips/rmi/rmixl_com.c

211

rmixl_puthex32(uint32_t val)

sys/arch/mips/rmi/rmixl_com.c

217

rmixl_puthex64(uint64_t val)

sys/arch/mips/rmi/rmixl_fmn.c

332

#define FMN_CP2_SEL_SWITCH_RW(rw, rd, sel, val) \

sys/arch/mips/rmi/rmixl_fmn.c

335

FMN_CP2_SEL_CASE_ ## rw(rd, 0, val); \

sys/arch/mips/rmi/rmixl_fmn.c

336

FMN_CP2_SEL_CASE_ ## rw(rd, 1, val); \

sys/arch/mips/rmi/rmixl_fmn.c

337

FMN_CP2_SEL_CASE_ ## rw(rd, 2, val); \

sys/arch/mips/rmi/rmixl_fmn.c

338

FMN_CP2_SEL_CASE_ ## rw(rd, 3, val); \

sys/arch/mips/rmi/rmixl_fmn.c

339

FMN_CP2_SEL_CASE_ ## rw(rd, 4, val); \

sys/arch/mips/rmi/rmixl_fmn.c

340

FMN_CP2_SEL_CASE_ ## rw(rd, 5, val); \

sys/arch/mips/rmi/rmixl_fmn.c

341

FMN_CP2_SEL_CASE_ ## rw(rd, 6, val); \

sys/arch/mips/rmi/rmixl_fmn.c

342

FMN_CP2_SEL_CASE_ ## rw(rd, 7, val); \

sys/arch/mips/rmi/rmixl_fmn.c

349

#define FMN_CP2_RD_CASE_RW(rw, rd, sel, val) \

sys/arch/mips/rmi/rmixl_fmn.c

351

FMN_CP2_SEL_SWITCH_RW(rw, rd, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

359

#define FMN_CP2_RD_SWITCH_RW(rw, rd, sel, val) \

sys/arch/mips/rmi/rmixl_fmn.c

362

FMN_CP2_RD_CASE_RW(rw, 0, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

363

FMN_CP2_RD_CASE_RW(rw, 1, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

364

FMN_CP2_RD_CASE_RW(rw, 2, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

365

FMN_CP2_RD_CASE_RW(rw, 3, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

366

FMN_CP2_RD_CASE_RW(rw, 4, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

367

FMN_CP2_RD_CASE_RW(rw, 5, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

368

FMN_CP2_RD_CASE_RW(rw, 6, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

369

FMN_CP2_RD_CASE_RW(rw, 7, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

370

FMN_CP2_RD_CASE_RW(rw, 8, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

371

FMN_CP2_RD_CASE_RW(rw, 9, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

372

FMN_CP2_RD_CASE_RW(rw, 10, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

373

FMN_CP2_RD_CASE_RW(rw, 11, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

374

FMN_CP2_RD_CASE_RW(rw, 12, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

375

FMN_CP2_RD_CASE_RW(rw, 13, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

376

FMN_CP2_RD_CASE_RW(rw, 14, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

377

FMN_CP2_RD_CASE_RW(rw, 15, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

378

FMN_CP2_RD_CASE_RW(rw, 16, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

379

FMN_CP2_RD_CASE_RW(rw, 17, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

380

FMN_CP2_RD_CASE_RW(rw, 18, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

381

FMN_CP2_RD_CASE_RW(rw, 19, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

382

FMN_CP2_RD_CASE_RW(rw, 20, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

383

FMN_CP2_RD_CASE_RW(rw, 21, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

384

FMN_CP2_RD_CASE_RW(rw, 22, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

385

FMN_CP2_RD_CASE_RW(rw, 23, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

386

FMN_CP2_RD_CASE_RW(rw, 24, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

387

FMN_CP2_RD_CASE_RW(rw, 25, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

388

FMN_CP2_RD_CASE_RW(rw, 26, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

389

FMN_CP2_RD_CASE_RW(rw, 27, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

390

FMN_CP2_RD_CASE_RW(rw, 28, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

391

FMN_CP2_RD_CASE_RW(rw, 29, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

392

FMN_CP2_RD_CASE_RW(rw, 30, sel, val); \

sys/arch/mips/rmi/rmixl_fmn.c

393

FMN_CP2_RD_CASE_RW(rw, 31, sel, val); \

sys/arch/mips/rmi/rmixl_fmnvar.h

112

#define RMIXL_MTC2(regnum, sel, val) \

sys/arch/mips/rmi/rmixl_fmnvar.h

114

uint32_t __val = val; \

sys/arch/mips/rmi/rmixl_fmnvar.h

86

#define RMIXL_DMTC2(regnum, sel, val) \

sys/arch/mips/rmi/rmixl_fmnvar.h

88

uint64_t __val = val; \

sys/arch/mips/rmi/rmixl_gpio.c

78

#define GPIO_WRITE(gpio, reg, val) \

sys/arch/mips/rmi/rmixl_gpio.c

79

bus_space_write_4((gpio)->gpio_memt, (gpio)->gpio_memh, (reg), (val))

sys/arch/mips/rmi/rmixl_intr.c

104

#define RMIXL_PICREG_WRITE(off, val) \

sys/arch/mips/rmi/rmixl_intr.c

105

RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PIC + (off), (val))

sys/arch/mips/rmi/rmixl_intr.c

387

dclz(uint64_t val)

sys/arch/mips/rmi/rmixl_intr.c

392

: "=r"(nlz) : "r"(val));

sys/arch/mips/rmi/rmixl_nand.c

154

uint32_t val;

sys/arch/mips/rmi/rmixl_nand.c

188

val = ia->ia_dev_parm;

sys/arch/mips/rmi/rmixl_nand.c

189

val &= RMIXL_FLASH_CSDEV_DWIDTH;

sys/arch/mips/rmi/rmixl_nand.c

190

val >>= RMIXL_FLASH_CSDEV_DWIDTH_SHFT;

sys/arch/mips/rmi/rmixl_nand.c

191

switch(val) {

sys/arch/mips/rmi/rmixl_pcie.c

1010

bus_space_write_4(bst, bsh, (bus_size_t)offset, val);

sys/arch/mips/rmi/rmixl_pcie.c

999

rmixl_pcie_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/mips/rmi/rmixl_pcix.c

734

rmixl_pcix_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/mips/rmi/rmixl_pcix.c

745

bus_space_write_4(bst, bsh, (bus_size_t)offset, val);

sys/arch/mips/sibyte/dev/sbbuswatch.c

44

#define WRITE_REG(rp, val) mips3_sd((register_t)(rp), (val))

sys/arch/mips/sibyte/dev/sbjcn.c

239

#define WRITE_REG(rp, val) (mips3_sd((volatile uint64_t *)(rp), (val)))

sys/arch/mips/sibyte/dev/sbmac.c

264

static void sbmac_mii_bitbang_write(device_t self, uint32_t val);

sys/arch/mips/sibyte/dev/sbmac.c

289

sbmac_mii_bitbang_write(device_t self, uint32_t val)

sys/arch/mips/sibyte/dev/sbmac.c

296

SBMAC_WRITECSR(reg, (val &

sys/arch/mips/sibyte/dev/sbmac.c

304

sbmac_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/mips/sibyte/dev/sbmac.c

308

val);

sys/arch/mips/sibyte/dev/sbmac.c

315

sbmac_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/mips/sibyte/dev/sbmac.c

319

val);

sys/arch/mips/sibyte/dev/sbscn.c

248

#define WRITE_REG(rp, val) (mips3_sd((register_t)(rp), (val)))

sys/arch/mips/sibyte/dev/sbscn.c

256

#define SET_OUTPUT_SIGNALS(ch, val) \

sys/arch/mips/sibyte/dev/sbscn.c

260

sigs_to_set = (ch)->ch_o_mask & val; \

sys/arch/mips/sibyte/dev/sbscn.c

261

sigs_to_clr = (ch)->ch_o_mask & ~val; \

sys/arch/mips/sibyte/dev/sbtimer.c

62

#define WRITE_REG(rp, val) mips3_sd((register_t)(rp), (val))

sys/arch/mips/sibyte/dev/sbwdog.c

82

#define WRITE_REG(rp, val) (mips3_sd((register_t)(rp), (val)))

sys/arch/mips/sibyte/include/sb1250_defs.h

271

#define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)

sys/arch/mips/sibyte/include/ui_bitfields.h

53

char *showfields(bitfield_t *fields,uint64_t val);

sys/arch/mipsco/include/bus.h

670

#define __BS_BSWAP(bst, val, BITS) \

sys/arch/mipsco/include/bus.h

671

((bst->bs_bswap) ? __CONCAT(bswap,BITS)(val) : (val))

sys/arch/mipsco/include/bus.h

679

register __BS_TYPENAME(BITS) val = \

sys/arch/mipsco/include/bus.h

682

return __BS_BSWAP(bst, val, BITS); \

sys/arch/mipsco/include/prom.h

127

int (*prom_setenv)(char *name, char *val);

sys/arch/mipsco/include/z8530var.h

115

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/mipsco/include/z8530var.h

116

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/mipsco/include/z8530var.h

117

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/mipsco/obio/asc.c

213

asc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/mipsco/obio/asc.c

217

bus_space_write_1(esc->sc_bst, esc->sc_bsh, reg * 4 + 3, val);

sys/arch/mipsco/obio/if_le.c

107

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/mipsco/obio/if_le.c

112

bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, val);

sys/arch/mipsco/obio/mkclock.c

102

u_int8_t val;

sys/arch/mipsco/obio/mkclock.c

104

val = bus_space_read_1(sc->sc_bst, sc->sc_bsh, DATA_PORT + reg*4);

sys/arch/mipsco/obio/mkclock.c

105

return bcdtobin(val);

sys/arch/mipsco/obio/mkclock.c

109

mk_write(struct mkclock_softc *sc, int reg, int val)

sys/arch/mipsco/obio/mkclock.c

112

DATA_PORT + reg*4, bintobcd(val));

sys/arch/mipsco/obio/zs.c

483

uint8_t val;

sys/arch/mipsco/obio/zs.c

488

val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR);

sys/arch/mipsco/obio/zs.c

490

return val;

sys/arch/mipsco/obio/zs.c

494

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/mipsco/obio/zs.c

500

bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, val);

sys/arch/mipsco/obio/zs.c

508

uint8_t val;

sys/arch/mipsco/obio/zs.c

510

val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR);

sys/arch/mipsco/obio/zs.c

512

return val;

sys/arch/mipsco/obio/zs.c

516

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/mipsco/obio/zs.c

520

bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_CSR, val);

sys/arch/mipsco/obio/zs.c

528

uint8_t val;

sys/arch/mipsco/obio/zs.c

530

val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_DATA);

sys/arch/mipsco/obio/zs.c

532

return val;

sys/arch/mipsco/obio/zs.c

536

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/mipsco/obio/zs.c

540

bus_space_write_1(zsc->cs_bustag, zsc->cs_regs, ZS_REG_DATA, val);

sys/arch/mmeye/dev/rtciic.c

57

#define RTCIIC_WRITE(sc, val) \

sys/arch/mmeye/dev/rtciic.c

58

bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, 0, bswap16(val))

sys/arch/mmeye/mmeye/machdep.c

594

#define OUTP(port, val) *(volatile unsigned char *)(UART_BASE+port) = val

sys/arch/mmeye/stand/boot/com.c

103

#define CSR_WRITE(base, reg, val) \

sys/arch/mmeye/stand/boot/com.c

105

*(volatile uint8_t *)((base) + (reg)) = (val); \

sys/arch/mmeye/stand/boot/wdvar.h

61

#define WDC_WRITE_REG(chp, reg, val) *(chp)->c_cmdreg[(reg)] = (val)

sys/arch/mmeye/stand/boot/wdvar.h

63

#define WDC_WRITE_CTLREG(chp, reg, val) (chp)->c_ctlbase[(reg)] = (val)

sys/arch/mmeye/stand/boot/wdvar.h

77

#define WDC_WRITE_REG(chp, reg, val) do { \

sys/arch/mmeye/stand/boot/wdvar.h

79

*(chp)->c_cmdreg[(reg)] = (val); \

sys/arch/mmeye/stand/boot/wdvar.h

85

#define WDC_WRITE_CTLREG(chp, reg, val) do { \

sys/arch/mmeye/stand/boot/wdvar.h

87

(chp)->c_ctlbase[(reg)] = (val); \

sys/arch/mmeye/stand/bootcoff/osloader.c

75

u_long val;

sys/arch/mmeye/stand/bootcoff/osloader.c

80

val = (u_long)osimage;

sys/arch/mmeye/stand/bootcoff/osloader.c

81

len = sizeof(val);

sys/arch/mmeye/stand/bootcoff/osloader.c

83

sysctl(mib, 2, NULL, NULL, &val, len);

sys/arch/mmeye/stand/bootelf/boot.c

112

u_long val;

sys/arch/mmeye/stand/bootelf/boot.c

116

val = (u_long)image;

sys/arch/mmeye/stand/bootelf/boot.c

118

sysctl(mib, 2, NULL, NULL, &val, sizeof(val));

sys/arch/mvme68k/dev/if_le.c

126

le_pcc_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/mvme68k/dev/if_le.c

132

bus_space_write_2(lsc->sc_bust, lsc->sc_bush, LEPCC_RDP, val);

sys/arch/mvme68k/dev/sbic.c

719

u_char val;

sys/arch/mvme68k/dev/sbic.c

724

GET_SBIC_asr(regs, val);

sys/arch/mvme68k/dev/sbic.c

726

while ((val & until) == 0) {

sys/arch/mvme68k/dev/sbic.c

732

line, val, csr);

sys/arch/mvme68k/dev/sbic.c

736

return val; /* Maybe I should abort */

sys/arch/mvme68k/dev/sbic.c

741

GET_SBIC_asr(regs, val);

sys/arch/mvme68k/dev/sbic.c

744

return val;

sys/arch/mvme68k/dev/sbicreg.h

132

#define SBIC_TIMEOUT(val,clk) ((((val) * (clk)) / 800) + 1)

sys/arch/mvme68k/dev/sbicreg.h

315

#define sbic_read_reg(regs,regno,val) \

sys/arch/mvme68k/dev/sbicreg.h

318

(val) = (regs)->sbic_value; \

sys/arch/mvme68k/dev/sbicreg.h

321

#define sbic_write_reg(regs,regno,val) \

sys/arch/mvme68k/dev/sbicreg.h

324

(regs)->sbic_value = (val); \

sys/arch/mvme68k/dev/sbicreg.h

327

#define SET_SBIC_myid(regs,val) sbic_write_reg(regs,SBIC_myid,val)

sys/arch/mvme68k/dev/sbicreg.h

328

#define GET_SBIC_myid(regs,val) sbic_read_reg(regs,SBIC_myid,val)

sys/arch/mvme68k/dev/sbicreg.h

329

#define SET_SBIC_cdbsize(regs, val) sbic_write_reg(regs,SBIC_cdbsize,val)

sys/arch/mvme68k/dev/sbicreg.h

330

#define GET_SBIC_cdbsize(regs,val) sbic_read_reg(regs,SBIC_cdbsize,val)

sys/arch/mvme68k/dev/sbicreg.h

331

#define SET_SBIC_control(regs,val) sbic_write_reg(regs,SBIC_control,val)

sys/arch/mvme68k/dev/sbicreg.h

332

#define GET_SBIC_control(regs,val) sbic_read_reg(regs,SBIC_control,val)

sys/arch/mvme68k/dev/sbicreg.h

333

#define SET_SBIC_timeo(regs,val) sbic_write_reg(regs,SBIC_timeo,val)

sys/arch/mvme68k/dev/sbicreg.h

334

#define GET_SBIC_timeo(regs,val) sbic_read_reg(regs,SBIC_timeo,val)

sys/arch/mvme68k/dev/sbicreg.h

335

#define SET_SBIC_cdb1(regs,val) sbic_write_reg(regs,SBIC_cdb1,val)

sys/arch/mvme68k/dev/sbicreg.h

336

#define GET_SBIC_cdb1(regs,val) sbic_read_reg(regs,SBIC_cdb1,val)

sys/arch/mvme68k/dev/sbicreg.h

337

#define SET_SBIC_cdb2(regs,val) sbic_write_reg(regs,SBIC_cdb2,val)

sys/arch/mvme68k/dev/sbicreg.h

338

#define GET_SBIC_cdb2(regs,val) sbic_read_reg(regs,SBIC_cdb2,val)

sys/arch/mvme68k/dev/sbicreg.h

339

#define SET_SBIC_cdb3(regs,val) sbic_write_reg(regs,SBIC_cdb3,val)

sys/arch/mvme68k/dev/sbicreg.h

340

#define GET_SBIC_cdb3(regs,val) sbic_read_reg(regs,SBIC_cdb3,val)

sys/arch/mvme68k/dev/sbicreg.h

341

#define SET_SBIC_cdb4(regs,val) sbic_write_reg(regs,SBIC_cdb4,val)

sys/arch/mvme68k/dev/sbicreg.h

342

#define GET_SBIC_cdb4(regs,val) sbic_read_reg(regs,SBIC_cdb4,val)

sys/arch/mvme68k/dev/sbicreg.h

343

#define SET_SBIC_cdb5(regs,val) sbic_write_reg(regs,SBIC_cdb5,val)

sys/arch/mvme68k/dev/sbicreg.h

344

#define GET_SBIC_cdb5(regs,val) sbic_read_reg(regs,SBIC_cdb5,val)

sys/arch/mvme68k/dev/sbicreg.h

345

#define SET_SBIC_cdb6(regs,val) sbic_write_reg(regs,SBIC_cdb6,val)

sys/arch/mvme68k/dev/sbicreg.h

346

#define GET_SBIC_cdb6(regs,val) sbic_read_reg(regs,SBIC_cdb6,val)

sys/arch/mvme68k/dev/sbicreg.h

347

#define SET_SBIC_cdb7(regs,val) sbic_write_reg(regs,SBIC_cdb7,val)

sys/arch/mvme68k/dev/sbicreg.h

348

#define GET_SBIC_cdb7(regs,val) sbic_read_reg(regs,SBIC_cdb7,val)

sys/arch/mvme68k/dev/sbicreg.h

349

#define SET_SBIC_cdb8(regs,val) sbic_write_reg(regs,SBIC_cdb8,val)

sys/arch/mvme68k/dev/sbicreg.h

350

#define GET_SBIC_cdb8(regs,val) sbic_read_reg(regs,SBIC_cdb8,val)

sys/arch/mvme68k/dev/sbicreg.h

351

#define SET_SBIC_cdb9(regs,val) sbic_write_reg(regs,SBIC_cdb9,val)

sys/arch/mvme68k/dev/sbicreg.h

352

#define GET_SBIC_cdb9(regs,val) sbic_read_reg(regs,SBIC_cdb9,val)

sys/arch/mvme68k/dev/sbicreg.h

353

#define SET_SBIC_cdb10(regs,val) sbic_write_reg(regs,SBIC_cdb10,val)

sys/arch/mvme68k/dev/sbicreg.h

354

#define GET_SBIC_cdb10(regs,val) sbic_read_reg(regs,SBIC_cdb10,val)

sys/arch/mvme68k/dev/sbicreg.h

355

#define SET_SBIC_cdb11(regs,val) sbic_write_reg(regs,SBIC_cdb11,val)

sys/arch/mvme68k/dev/sbicreg.h

356

#define GET_SBIC_cdb11(regs,val) sbic_read_reg(regs,SBIC_cdb11,val)

sys/arch/mvme68k/dev/sbicreg.h

357

#define SET_SBIC_cdb12(regs,val) sbic_write_reg(regs,SBIC_cdb12,val)

sys/arch/mvme68k/dev/sbicreg.h

358

#define GET_SBIC_cdb12(regs,val) sbic_read_reg(regs,SBIC_cdb12,val)

sys/arch/mvme68k/dev/sbicreg.h

359

#define SET_SBIC_tlun(regs,val) sbic_write_reg(regs,SBIC_tlun,val)

sys/arch/mvme68k/dev/sbicreg.h

360

#define GET_SBIC_tlun(regs,val) sbic_read_reg(regs,SBIC_tlun,val)

sys/arch/mvme68k/dev/sbicreg.h

361

#define SET_SBIC_cmd_phase(regs,val) sbic_write_reg(regs,SBIC_cmd_phase,val)

sys/arch/mvme68k/dev/sbicreg.h

362

#define GET_SBIC_cmd_phase(regs,val) sbic_read_reg(regs,SBIC_cmd_phase,val)

sys/arch/mvme68k/dev/sbicreg.h

363

#define SET_SBIC_syn(regs,val) sbic_write_reg(regs,SBIC_syn,val)

sys/arch/mvme68k/dev/sbicreg.h

364

#define GET_SBIC_syn(regs,val) sbic_read_reg(regs,SBIC_syn,val)

sys/arch/mvme68k/dev/sbicreg.h

365

#define SET_SBIC_count_hi(regs,val) sbic_write_reg(regs,SBIC_count_hi,val)

sys/arch/mvme68k/dev/sbicreg.h

366

#define GET_SBIC_count_hi(regs,val) sbic_read_reg(regs,SBIC_count_hi,val)

sys/arch/mvme68k/dev/sbicreg.h

367

#define SET_SBIC_count_med(regs,val) sbic_write_reg(regs,SBIC_count_med,val)

sys/arch/mvme68k/dev/sbicreg.h

368

#define GET_SBIC_count_med(regs,val) sbic_read_reg(regs,SBIC_count_med,val)

sys/arch/mvme68k/dev/sbicreg.h

369

#define SET_SBIC_count_lo(regs,val) sbic_write_reg(regs,SBIC_count_lo,val)

sys/arch/mvme68k/dev/sbicreg.h

370

#define GET_SBIC_count_lo(regs,val) sbic_read_reg(regs,SBIC_count_lo,val)

sys/arch/mvme68k/dev/sbicreg.h

371

#define SET_SBIC_selid(regs,val) sbic_write_reg(regs,SBIC_selid,val)

sys/arch/mvme68k/dev/sbicreg.h

372

#define GET_SBIC_selid(regs,val) sbic_read_reg(regs,SBIC_selid,val)

sys/arch/mvme68k/dev/sbicreg.h

373

#define SET_SBIC_rselid(regs,val) sbic_write_reg(regs,SBIC_rselid,val)

sys/arch/mvme68k/dev/sbicreg.h

374

#define GET_SBIC_rselid(regs,val) sbic_read_reg(regs,SBIC_rselid,val)

sys/arch/mvme68k/dev/sbicreg.h

375

#define SET_SBIC_csr(regs,val) sbic_write_reg(regs,SBIC_csr,val)

sys/arch/mvme68k/dev/sbicreg.h

376

#define GET_SBIC_csr(regs,val) sbic_read_reg(regs,SBIC_csr,val)

sys/arch/mvme68k/dev/sbicreg.h

377

#define SET_SBIC_cmd(regs,val) sbic_write_reg(regs,SBIC_cmd,val)

sys/arch/mvme68k/dev/sbicreg.h

378

#define GET_SBIC_cmd(regs,val) sbic_read_reg(regs,SBIC_cmd,val)

sys/arch/mvme68k/dev/sbicreg.h

379

#define SET_SBIC_data(regs,val) sbic_write_reg(regs,SBIC_data,val)

sys/arch/mvme68k/dev/sbicreg.h

380

#define GET_SBIC_data(regs,val) sbic_read_reg(regs,SBIC_data,val)

sys/arch/mvme68k/dev/sbicreg.h

382

#define SBIC_TC_PUT(regs,val) \

sys/arch/mvme68k/dev/sbicreg.h

384

sbic_write_reg(regs, SBIC_count_hi, ((val) >> 16)); \

sys/arch/mvme68k/dev/sbicreg.h

385

(regs)->sbic_value = (val) >> 8; \

sys/arch/mvme68k/dev/sbicreg.h

386

(regs)->sbic_value = (val); \

sys/arch/mvme68k/dev/sbicreg.h

389

#define SBIC_TC_GET(regs,val) \

sys/arch/mvme68k/dev/sbicreg.h

391

sbic_read_reg(regs, SBIC_count_hi, (val)); \

sys/arch/mvme68k/dev/sbicreg.h

392

(val) = ((val) << 8) | (regs)->sbic_value; \

sys/arch/mvme68k/dev/sbicreg.h

393

(val) = ((val) << 8) | (regs)->sbic_value; \

sys/arch/mvme68k/dev/sbicreg.h

405

#define GET_SBIC_asr(regs, val) (val) = (regs)->sbic_asr

sys/arch/mvme68k/dev/zs.c

379

uint8_t val;

sys/arch/mvme68k/dev/zs.c

383

val = *cs->cs_reg_csr;

sys/arch/mvme68k/dev/zs.c

385

return val;

sys/arch/mvme68k/dev/zs.c

389

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/mvme68k/dev/zs.c

394

*cs->cs_reg_csr = val;

sys/arch/mvme68k/dev/zs.c

401

uint8_t val;

sys/arch/mvme68k/dev/zs.c

403

val = *cs->cs_reg_csr;

sys/arch/mvme68k/dev/zs.c

405

return val;

sys/arch/mvme68k/dev/zs.c

409

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/mvme68k/dev/zs.c

412

*cs->cs_reg_csr = val;

sys/arch/mvme68k/dev/zs.c

419

uint8_t val;

sys/arch/mvme68k/dev/zs.c

421

val = *cs->cs_reg_data;

sys/arch/mvme68k/dev/zs.c

423

return val;

sys/arch/mvme68k/dev/zs.c

427

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/mvme68k/dev/zs.c

430

*cs->cs_reg_data = val;

sys/arch/mvme68k/include/z8530var.h

109

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/mvme68k/include/z8530var.h

110

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/mvme68k/include/z8530var.h

111

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/mvme68k/stand/netboot/if_ie.c

110

int i, val = 0;

sys/arch/mvme68k/stand/netboot/if_ie.c

116

val += 10;

sys/arch/mvme68k/stand/netboot/if_ie.c

121

printf("ie%d: ie_match --> %d\n", i, val + 1);

sys/arch/mvme68k/stand/netboot/if_ie.c

123

return (val + 1);

sys/arch/mvme68k/stand/netboot/if_le.c

127

int i, val = 0;

sys/arch/mvme68k/stand/netboot/if_le.c

133

val += 10;

sys/arch/mvme68k/stand/netboot/if_le.c

138

printf("le%d: le_match --> %d\n", i, val + 1);

sys/arch/mvme68k/stand/netboot/if_le.c

140

return val + 1;

sys/arch/netwinder/netwinder/netwinder_machdep.c

296

#define PUTBYTE(reg, val) \

sys/arch/netwinder/netwinder/netwinder_machdep.c

297

*((volatile u_int8_t *)(base + (reg))) = (val)

sys/arch/news68k/dev/if_le.c

112

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/news68k/dev/if_le.c

117

ler1->ler1_rdp = val;

sys/arch/news68k/dev/if_le.c

124

uint16_t val;

sys/arch/news68k/dev/if_le.c

127

val = ler1->ler1_rdp;

sys/arch/news68k/dev/if_le.c

128

return val;

sys/arch/news68k/dev/kb.c

103

int key, val;

sys/arch/news68k/dev/kb.c

110

val = key & 0x7f;

sys/arch/news68k/dev/kb.c

113

printf("kb_intr: key=%02x, type=%d, val=%02x\n", key, type, val);

sys/arch/news68k/dev/kb.c

117

kb_conssc->cs_val = val;

sys/arch/news68k/dev/kb.c

120

wskbd_input(sc->sc_wskbddev, type, val);

sys/arch/news68k/dev/zs.c

419

uint8_t val;

sys/arch/news68k/dev/zs.c

423

val = *cs->cs_reg_csr;

sys/arch/news68k/dev/zs.c

425

return val;

sys/arch/news68k/dev/zs.c

429

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/news68k/dev/zs.c

434

*cs->cs_reg_csr = val;

sys/arch/news68k/dev/zs.c

441

uint8_t val;

sys/arch/news68k/dev/zs.c

443

val = *cs->cs_reg_csr;

sys/arch/news68k/dev/zs.c

445

return val;

sys/arch/news68k/dev/zs.c

449

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/news68k/dev/zs.c

452

*cs->cs_reg_csr = val;

sys/arch/news68k/dev/zs.c

459

uint8_t val;

sys/arch/news68k/dev/zs.c

461

val = *cs->cs_reg_data;

sys/arch/news68k/dev/zs.c

463

return val;

sys/arch/news68k/dev/zs.c

467

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/news68k/dev/zs.c

470

*cs->cs_reg_data = val;

sys/arch/news68k/include/bus.h

408

#define bus_space_set_multi_1(t, h, o, val, c) do { \

sys/arch/news68k/include/bus.h

418

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/news68k/include/bus.h

422

#define bus_space_set_multi_2(t, h, o, val, c) do { \

sys/arch/news68k/include/bus.h

432

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/news68k/include/bus.h

436

#define bus_space_set_multi_4(t, h, o, val, c) do { \

sys/arch/news68k/include/bus.h

446

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/news68k/include/bus.h

459

#define bus_space_set_region_1(t, h, o, val, c) do { \

sys/arch/news68k/include/bus.h

469

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/news68k/include/bus.h

473

#define bus_space_set_region_2(t, h, o, val, c) do { \

sys/arch/news68k/include/bus.h

483

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/news68k/include/bus.h

487

#define bus_space_set_region_4(t, h, o, val, c) do { \

sys/arch/news68k/include/bus.h

497

"r" ((h) + (o)), "g" (val), "g" (c) : \

sys/arch/news68k/include/z8530var.h

108

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/news68k/include/z8530var.h

109

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/news68k/include/z8530var.h

110

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/newsmips/apbus/if_snvar.h

28

#define NIC_PUT(sc, reg, val) ((sc)->sc_regbase[(reg) * 4 + 3] = val)

sys/arch/newsmips/apbus/kb_ap.c

163

int key, val, type, release;

sys/arch/newsmips/apbus/kb_ap.c

168

val = key & 0x7f;

sys/arch/newsmips/apbus/kb_ap.c

173

wskbd_input(sc->sc_wskbddev, type, val);

sys/arch/newsmips/dev/if_le.c

104

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/newsmips/dev/if_le.c

109

ler1->ler1_rdp = val;

sys/arch/newsmips/dev/if_le.c

116

uint16_t val;

sys/arch/newsmips/dev/if_le.c

119

val = ler1->ler1_rdp;

sys/arch/newsmips/dev/if_le.c

120

return val;

sys/arch/newsmips/dev/kb_hb.c

147

int code, type, release, val;

sys/arch/newsmips/dev/kb_hb.c

155

val = code & 0x7f;

sys/arch/newsmips/dev/kb_hb.c

158

wskbd_input(sc->sc_wskbddev, type, val);

sys/arch/newsmips/dev/zs.c

195

uint8_t val;

sys/arch/newsmips/dev/zs.c

199

val = *cs->cs_reg_csr;

sys/arch/newsmips/dev/zs.c

201

return val;

sys/arch/newsmips/dev/zs.c

205

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/newsmips/dev/zs.c

210

*cs->cs_reg_csr = val;

sys/arch/newsmips/dev/zs.c

217

uint8_t val;

sys/arch/newsmips/dev/zs.c

219

val = *cs->cs_reg_csr;

sys/arch/newsmips/dev/zs.c

221

return val;

sys/arch/newsmips/dev/zs.c

225

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/newsmips/dev/zs.c

228

*cs->cs_reg_csr = val;

sys/arch/newsmips/dev/zs.c

235

uint8_t val;

sys/arch/newsmips/dev/zs.c

237

val = *cs->cs_reg_data;

sys/arch/newsmips/dev/zs.c

239

return val;

sys/arch/newsmips/dev/zs.c

243

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/newsmips/dev/zs.c

246

*cs->cs_reg_data = val;

sys/arch/newsmips/include/z8530var.h

108

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/newsmips/include/z8530var.h

109

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/newsmips/include/z8530var.h

110

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/next68k/dev/esp.c

183

#define nd_bsw4(reg, val) \

sys/arch/next68k/dev/esp.c

184

bus_space_write_4(nsc->sc_bst, nsc->sc_bsh, (reg), (val))

sys/arch/next68k/dev/esp.c

428

esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/next68k/dev/esp.c

432

bus_space_write_1(esc->sc_bst, esc->sc_bsh, reg, val);

sys/arch/next68k/dev/if_xe.c

302

xe_write_reg(struct mb8795_softc *sc, int reg, u_char val)

sys/arch/next68k/dev/if_xe.c

306

bus_space_write_1(xsc->sc_bst, xsc->sc_bsh, reg, val);

sys/arch/next68k/dev/mb8795var.h

80

#define MB_WRITE_REG(sc, reg, val) \

sys/arch/next68k/dev/mb8795var.h

81

(*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val))

sys/arch/next68k/dev/nextdma.c

162

#define nd_bsw4(reg,val) \

sys/arch/next68k/dev/nextdma.c

163

bus_space_write_4(nsc->sc_bst, nsc->sc_bsh, (reg), (val))

sys/arch/next68k/dev/nextdmavar.h

66

#define nextdma_setconf(nsc, elem, val) nsc->sc_conf.nd_##elem = (val)

sys/arch/next68k/dev/nextkbd.c

254

int type, key, val;

sys/arch/next68k/dev/nextkbd.c

274

val = nextkbd_read_data(sc->id);

sys/arch/next68k/dev/nextkbd.c

275

if ((val != -1) && nextkbd_decode(sc->id, val, &type, &key)) {

sys/arch/next68k/dev/nextkbd.c

305

int val;

sys/arch/next68k/dev/nextkbd.c

309

val = nextkbd_read_data(t);

sys/arch/next68k/dev/nextkbd.c

310

if (val != -1 && nextkbd_decode(t, val, type, data))

sys/arch/next68k/dev/zs.c

434

uint8_t val;

sys/arch/next68k/dev/zs.c

438

val = *cs->cs_reg_csr;

sys/arch/next68k/dev/zs.c

440

return (val);

sys/arch/next68k/dev/zs.c

444

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/next68k/dev/zs.c

448

*cs->cs_reg_csr = val;

sys/arch/next68k/dev/zs.c

455

uint8_t val;

sys/arch/next68k/dev/zs.c

457

val = *cs->cs_reg_csr;

sys/arch/next68k/dev/zs.c

459

return (val);

sys/arch/next68k/dev/zs.c

463

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/next68k/dev/zs.c

465

*cs->cs_reg_csr = val;

sys/arch/next68k/dev/zs.c

472

uint8_t val;

sys/arch/next68k/dev/zs.c

474

val = *cs->cs_reg_data;

sys/arch/next68k/dev/zs.c

476

return (val);

sys/arch/next68k/dev/zs.c

480

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/next68k/dev/zs.c

482

*cs->cs_reg_data = val;

sys/arch/next68k/next68k/autoconf.c

216

int val = 0;

sys/arch/next68k/next68k/autoconf.c

219

val = val * 10 + (*s++ - '0');

sys/arch/next68k/next68k/autoconf.c

220

return val;

sys/arch/next68k/next68k/rtc.c

149

uint8_t val;

sys/arch/next68k/next68k/rtc.c

154

val = reg;

sys/arch/next68k/next68k/rtc.c

157

if ((val & 0x80) != 0)

sys/arch/next68k/next68k/rtc.c

167

val <<= 1;

sys/arch/next68k/next68k/rtc.c

170

val = 0; /* should be anyway */

sys/arch/next68k/next68k/rtc.c

172

val <<= 1;

sys/arch/next68k/next68k/rtc.c

182

val |= 1;

sys/arch/next68k/next68k/rtc.c

188

return val;

sys/arch/next68k/next68k/rtc.c

196

uint8_t val;

sys/arch/next68k/next68k/rtc.c

201

val = reg | RTC_WRITE;

sys/arch/next68k/next68k/rtc.c

205

if ((val & 0x80) != 0)

sys/arch/next68k/next68k/rtc.c

215

val <<= 1;

sys/arch/next68k/next68k/rtc.c

303

struct clock_ymdhms val;

sys/arch/next68k/next68k/rtc.c

304

val.dt_hour = bcdtobin(h & 0x3f);

sys/arch/next68k/next68k/rtc.c

78

uint8_t val;

sys/arch/next68k/next68k/rtc.c

81

val = rtc_read(RTC_STATUS);

sys/arch/next68k/next68k/rtc.c

82

new_clock = (val & RTC_NEW_CLOCK) ? 1 : 0;

sys/arch/next68k/stand/boot/rtc.c

50

u_char val;

sys/arch/next68k/stand/boot/rtc.c

55

val = reg;

sys/arch/next68k/stand/boot/rtc.c

58

if (val & 0x80)

sys/arch/next68k/stand/boot/rtc.c

68

val <<= 1;

sys/arch/next68k/stand/boot/rtc.c

71

val = 0; /* should be anyway */

sys/arch/next68k/stand/boot/rtc.c

73

val <<= 1;

sys/arch/next68k/stand/boot/rtc.c

83

val |= 1;

sys/arch/next68k/stand/boot/rtc.c

89

return val;

sys/arch/next68k/stand/boot/rtc.c

95

u_char val;

sys/arch/next68k/stand/boot/rtc.c

97

val = rtc_read(RTC_STATUS);

sys/arch/next68k/stand/boot/rtc.c

98

new_clock = (val & RTC_NEW_CLOCK) ? 1 : 0;

sys/arch/ofppc/isa/isa_machdep.c

102

addr-IO_ICU2, val);

sys/arch/ofppc/isa/isa_machdep.c

105

addr-IO_ELCR1, val);

sys/arch/ofppc/isa/isa_machdep.c

95

isa_outb(uint32_t addr, uint8_t val)

sys/arch/ofppc/isa/isa_machdep.c

99

addr-IO_ICU1, val);

sys/arch/ofppc/ofppc/disksubr.c

578

u_long *blp, cnt, val;

sys/arch/ofppc/ofppc/disksubr.c

582

val = 0;

sys/arch/ofppc/ofppc/disksubr.c

585

val += *blp++;

sys/arch/ofppc/ofppc/disksubr.c

586

return val;

sys/arch/ofppc/stand/ofwboot/rdb.c

43

u_long *blp, cnt, val;

sys/arch/ofppc/stand/ofwboot/rdb.c

47

val = 0;

sys/arch/ofppc/stand/ofwboot/rdb.c

50

val += *blp++;

sys/arch/ofppc/stand/ofwboot/rdb.c

51

return val;

sys/arch/playstation2/dev/emac3.c

316

emac3_phy_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/playstation2/dev/emac3.c

326

((val << STACR_PHYDSHIFT) & STACR_PHYD)); /* data */

sys/arch/playstation2/dev/emac3.c

332

emac3_phy_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/playstation2/dev/emac3.c

346

*val =(_emac3_reg_read_4(EMAC3_STACR) >> STACR_PHYDSHIFT) & 0xffff;

sys/arch/playstation2/ee/dmacreg.h

165

#define D_CTRL_MFD_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

166

((x) | (((val) << D_CTRL_MFD_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

179

#define D_CTRL_STS_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

180

((x) | (((val) << D_CTRL_STS_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

194

#define D_CTRL_STD_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

195

((x) | (((val) << D_CTRL_STD_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

212

#define D_CTRL_RCYC_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

213

((x) | (((val) << D_CTRL_RCYC_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

273

#define D_PCR_CDE_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

274

((x) | (((val) << D_PCR_CDE_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

291

#define D_PCR_CPC_SET(x, val) ((x) | ((val) & D_PCR_CPC_MASK))

sys/arch/playstation2/ee/dmacreg.h

314

#define D_SQWC_TQWC_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

315

((x) | (((val) << D_SQWC_TQWC_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

324

#define D_SQWC_SQWC_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

325

((x) | (((val) << D_SQWC_SQWC_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

361

#define D_CHCR_TAG_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

362

((x) | (((val) << D_CHCR_TAG_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

377

#define D_CHCR_ASP_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

378

((x) | (((val) << D_CHCR_ASP_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

390

#define D_CHCR_MOD_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

391

((x) | (((val) << D_CHCR_MOD_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

436

#define D_QWC_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

437

((x) | (((val) << D_QWC_SHIFT) & D_QWC_MASK << D_QWC_SHIFT))

sys/arch/playstation2/ee/dmacreg.h

454

#define DMATAG_ADDR_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

455

((dmatag_t)(x) | (((dmatag_t)(val)) << DMATAG_ADDR_SHIFT))

sys/arch/playstation2/ee/dmacreg.h

475

#define DMATAG_CMD_ID_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

476

((x) | (((val) << DMATAG_CMD_ID_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

497

#define DMATAG_CMD_PCE_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

498

((x) | (((val) << DMATAG_CMD_PCE_SHIFT) & \

sys/arch/playstation2/ee/dmacreg.h

510

#define DMATAG_CMD_QWC_SET(x, val) \

sys/arch/playstation2/ee/dmacreg.h

511

((x) | (((val) << DMATAG_CMD_QWC_SHIFT) & \

sys/arch/playstation2/ee/timerreg.h

95

#define T_MODE_GATM_SET(x, val) \

sys/arch/playstation2/ee/timerreg.h

96

((x) | (((val) << T_MODE_GATM_SHIFT) & \

sys/arch/playstation2/playstation2/machdep.c

156

pcb0->pcb_context.val[_L_SR] = PSL_LOWIPL; /* SR */

sys/arch/pmax/include/z8530var.h

74

void zs_write_reg(struct zs_chanstate *cs, u_int reg, u_int val);

sys/arch/pmax/include/z8530var.h

75

void zs_write_csr(struct zs_chanstate *cs, u_int val);

sys/arch/pmax/include/z8530var.h

76

void zs_write_data(struct zs_chanstate *cs, u_int val);

sys/arch/pmax/tc/asc_ioasic.c

427

asc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/pmax/tc/asc_ioasic.c

431

ASC_WRITE_REG(asc, reg, val);

sys/arch/pmax/tc/asc_ioasic.c

74

#define ASC_WRITE_REG(asc, reg, val) \

sys/arch/pmax/tc/asc_ioasic.c

76

(reg) * sizeof(uint32_t), (uint8_t)(val))

sys/arch/pmax/tc/ioasic.c

209

int (*handler)(void *), void *val)

sys/arch/pmax/tc/ioasic.c

211

(*platform.intr_establish)(dev, cookie, level, handler, val);

sys/arch/pmax/tc/tcbus.c

141

int (*handler)(void *), void *val)

sys/arch/pmax/tc/tcbus.c

144

(*platform.intr_establish)(dev, cookie, level, handler, val);

sys/arch/powerpc/booke/copyout.c

302

_ustore_8(uint8_t *vusaddr, uint8_t val)

sys/arch/powerpc/booke/copyout.c

312

copyout_uint8(vusaddr, val, mfmsr() | PSL_DS);

sys/arch/powerpc/booke/copyout.c

320

_ustore_16(uint16_t *vusaddr, uint16_t val)

sys/arch/powerpc/booke/copyout.c

330

copyout_uint16(vusaddr, val, mfmsr() | PSL_DS);

sys/arch/powerpc/booke/copyout.c

338

_ustore_32(uint32_t *vusaddr, uint32_t val)

sys/arch/powerpc/booke/copyout.c

348

copyout_uint32(vusaddr, val, mfmsr() | PSL_DS);

sys/arch/powerpc/booke/dev/pq3etsec.c

411

pq3mdio_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/powerpc/booke/dev/pq3etsec.c

425

*val = etsec_mdio_read(mdio, MIIMSTAT) &0xffff;

sys/arch/powerpc/booke/dev/pq3gpio.c

100

if ((data & mask) != val) {

sys/arch/powerpc/booke/dev/pq3gpio.c

101

data = (data & ~mask) | val;

sys/arch/powerpc/booke/dev/pq3gpio.c

93

pq3gpio_pin_write(void *v, int num, int val)

sys/arch/powerpc/booke/dev/pq3gpio.c

98

val = val ? mask : 0;

sys/arch/powerpc/booke/dev/pq3nandfcm.c

189

pq3nandfcm_write_byte(device_t self, uint8_t val)

sys/arch/powerpc/booke/dev/pq3nandfcm.c

194

lbc_write_4(sc->sc_obio, MDR, val);

sys/arch/powerpc/booke/e500_intr.c

469

openpic_write(struct cpu_softc *cpu, bus_size_t offset, uint32_t val)

sys/arch/powerpc/booke/e500_intr.c

473

OPENPIC_BASE + offset, val);

sys/arch/powerpc/booke/e500_timer.c

70

openpic_write(struct cpu_softc *cpu, bus_size_t offset, uint32_t val)

sys/arch/powerpc/booke/e500_timer.c

74

OPENPIC_BASE + offset, val);

sys/arch/powerpc/ibm4xx/dev/dwcsata.c

231

dwcdmac_write(struct dwcsata_softc *sc, bus_size_t reg, uint32_t val)

sys/arch/powerpc/ibm4xx/dev/dwcsata.c

234

bus_space_write_4(sc->sc_iot, sc->sc_dmac_ioh, reg, val);

sys/arch/powerpc/ibm4xx/dev/if_emac.c

2189

emac_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/powerpc/ibm4xx/dev/if_emac.c

2217

*val = sta_reg >> STACR_PHYD_SHIFT;

sys/arch/powerpc/ibm4xx/dev/if_emac.c

2226

emac_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/powerpc/ibm4xx/dev/if_emac.c

2240

(val << STACR_PHYD_SHIFT) |

sys/arch/powerpc/ibm4xx/dev/if_emac.c

346

#define EMAC_WRITE(sc, reg, val) \

sys/arch/powerpc/ibm4xx/dev/if_emac.c

347

bus_space_write_stream_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/arch/powerpc/ibm4xx/dev/if_emac.c

352

#define TAH_WRITE(sc, reg, val) \

sys/arch/powerpc/ibm4xx/dev/if_emac.c

353

bus_space_write_stream_4((sc)->sc_st, (sc)->sc_tahh, (reg), (val))

sys/arch/powerpc/ibm4xx/dev/rgmiireg.h

43

#define FER_CHCFG(rgmii, val) ((val) << ((rgmii) << 2))

sys/arch/powerpc/ibm4xx/pci/pcix.c

222

#define PCIX_REG_WRITE(reg, val) \

sys/arch/powerpc/ibm4xx/pci/pcix.c

223

bus_space_write_4(&pcix_reg_tag, pcix_reg_ioh, (reg), (val))

sys/arch/powerpc/ibm4xx/pmap.c

1979

int ref, mod, val = 0;

sys/arch/powerpc/ibm4xx/pmap.c

2006

val = *loc;

sys/arch/powerpc/ibm4xx/pmap.c

2010

printf("Referenced page: ref %d, mod %d val %x\n", ref, mod, val);

sys/arch/powerpc/ibm4xx/pmap.c

2057

val = *loc;

sys/arch/powerpc/ibm4xx/pmap.c

2061

printf("Referenced page: ref %d, mod %d val %x\n", ref, mod, val);

sys/arch/powerpc/ibm4xx/pmap.c

2094

val = *loc;

sys/arch/powerpc/ibm4xx/pmap.c

2098

printf("Referenced page: ref %d, mod %d val %x\n", ref, mod, val);

sys/arch/powerpc/ibm4xx/pmap.c

2130

val = *loc;

sys/arch/powerpc/ibm4xx/pmap.c

2134

printf("Referenced page: ref %d, mod %d val %x\n", ref, mod, val);

sys/arch/powerpc/ibm4xx/pmap.c

2167

val = *loc;

sys/arch/powerpc/ibm4xx/pmap.c

2171

printf("Referenced page: ref %d, mod %d val %x\n", ref, mod, val);

sys/arch/powerpc/ibm4xx/trap.c

1034

_ustore_ ## sz(uint ## sz ## _t *uaddr, uint ## sz ## _t val) \

sys/arch/powerpc/ibm4xx/trap.c

1036

return copyout(&val, uaddr, sizeof(val)); \

sys/arch/powerpc/include/ibm4xx/cpu.h

102

uint32_t val;

sys/arch/powerpc/include/ibm4xx/cpu.h

104

__asm volatile("mfdcr %0,%1" : "=r"(val) : "K"(reg));

sys/arch/powerpc/include/ibm4xx/cpu.h

105

return val;

sys/arch/powerpc/include/ibm4xx/cpu.h

109

mtcpr(int reg, uint32_t val)

sys/arch/powerpc/include/ibm4xx/cpu.h

112

mtdcr(DCR_CPR0_CFGDATA, val);

sys/arch/powerpc/include/ibm4xx/cpu.h

123

mtsdr(int reg, uint32_t val)

sys/arch/powerpc/include/ibm4xx/cpu.h

126

mtdcr(DCR_SDR0_CFGDATA, val);

sys/arch/powerpc/include/ibm4xx/cpu.h

94

mtdcr(const int reg, uint32_t val)

sys/arch/powerpc/include/ibm4xx/cpu.h

96

__asm volatile("mtdcr %0,%1" : : "K"(reg), "r"(val));

sys/arch/powerpc/include/openpic.h

49

openpic_write(u_int reg, uint32_t val)

sys/arch/powerpc/include/openpic.h

53

out32rb(addr, val);

sys/arch/powerpc/include/pci_machdep.h

228

pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t val)

sys/arch/powerpc/include/pci_machdep.h

230

(*pc->pc_conf_write)(pc->pc_conf_v, tag, reg, val);

sys/arch/powerpc/include/spr.h

101

#define mtspr(reg, val) \

sys/arch/powerpc/include/spr.h

104

mtspr64(reg, (uint64_t)val); \

sys/arch/powerpc/include/spr.h

106

mtspr32(reg, val); \

sys/arch/powerpc/include/spr.h

58

uint64_t val = v; \

sys/arch/powerpc/include/spr.h

59

hi = (val >> 32); \

sys/arch/powerpc/include/spr.h

60

l = val & 0xffffffff; \

sys/arch/powerpc/include/spr.h

78

register_t val;

sys/arch/powerpc/include/spr.h

80

__asm volatile("mfspr %0,%1" : "=r"(val) : "K"(reg));

sys/arch/powerpc/include/spr.h

81

return val;

sys/arch/powerpc/include/spr.h

85

mtspr32(const int reg, uint32_t val)

sys/arch/powerpc/include/spr.h

88

__asm volatile("mtspr %0,%1" : : "K"(reg), "r"(val));

sys/arch/powerpc/include/types.h

72

register_t val[40]; /* double check this XXX */

sys/arch/powerpc/mpc5200/bestcomm.c

89

sdma_write(struct bestcomm_ops *b, bus_size_t off, uint32_t val)

sys/arch/powerpc/mpc5200/bestcomm.c

91

bus_space_write_4(b->bst, b->bsh, off, val);

sys/arch/powerpc/mpc5200/fec.c

241

fec_miibus_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/powerpc/mpc5200/fec.c

250

*val = FEC_READ(sc, FEC_MII_DATA) & FEC_MII_DATA_MASK;

sys/arch/powerpc/mpc5200/fec.c

255

fec_miibus_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/powerpc/mpc5200/fec.c

260

FEC_WRITE(sc, FEC_MII_DATA, FEC_MII_WRITE(phy, reg, val));

sys/arch/powerpc/mpc5200/mpc5200_ac97.c

402

mpcac97_ac97_write(void *arg, uint8_t reg, uint16_t val)

sys/arch/powerpc/mpc5200/mpc5200_ac97.c

407

WR4(sc, PSC_AC97CMD, AC97CMD_WRITE(reg, val));

sys/arch/powerpc/mpc5200/mpc5200_ac97.c

423

uint16_t val = 0xffff;

sys/arch/powerpc/mpc5200/mpc5200_ac97.c

438

rderr = mpcac97_ac97_read(sc, AC97_REG_POWERDOWN, &val);

sys/arch/powerpc/mpc5200/mpc5200_ac97.c

440

(val & AC97_POWER_READY) == AC97_POWER_READY) {

sys/arch/powerpc/mpc5200/mpc5200_ac97.c

443

i, val);

sys/arch/powerpc/mpc5200/mpc5200_ac97.c

458

val, RD2(sc, PSC_SR));

sys/arch/powerpc/mpc5200/mpc5200_ac97reg.h

70

#define AC97CMD_DATA(val) ((uint32_t)((val) & 0xffff) << 8)

sys/arch/powerpc/mpc5200/mpc5200_ac97reg.h

71

#define AC97CMD_WRITE(reg, val) (AC97CMD_INDEX(reg) | AC97CMD_DATA(val))

sys/arch/powerpc/mpc5200/pic_mpc5200.c

116

siu_write(struct mpc5200_ops *m, bus_size_t off, uint32_t val)

sys/arch/powerpc/mpc5200/pic_mpc5200.c

118

bus_space_write_4(m->bst, m->bsh, off, val);

sys/arch/powerpc/pic/pic_distopenpic.c

163

distopic_write(struct openpic_ops *opic, int isu, int offset, u_int val)

sys/arch/powerpc/pic/pic_distopenpic.c

167

out32rb(addr, val);

sys/arch/powerpc/powerpc/db_interface.c

752

db_ppc4xx_mtdcr(db_expr_t reg, db_expr_t val)

sys/arch/powerpc/powerpc/db_interface.c

765

(*func)(val);

sys/arch/powerpc/powerpc/trap.c

580

_ustore_ ## sz(uint ## sz ## _t *uaddr, uint ## sz ## _t val) \

sys/arch/powerpc/powerpc/trap.c

591

*(volatile uint ## sz ## _t *)p = val; \

sys/arch/prep/pnpbus/nvram_pnpbus.c

242

prep_nvram_write_val(int addr, uint8_t val)

sys/arch/prep/pnpbus/nvram_pnpbus.c

254

bus_space_write_1(sc->sc_data, sc->sc_datah, 0, val);

sys/arch/prep/stand/boot/io.c

101

*((u_long *)&PCI_mem[addr]) = htole32(val);

sys/arch/prep/stand/boot/io.c

49

outb(int port, char val)

sys/arch/prep/stand/boot/io.c

52

ISA_io[port] = val;

sys/arch/prep/stand/boot/io.c

56

outw(int port, u_int16_t val)

sys/arch/prep/stand/boot/io.c

58

outb(port, val>>8);

sys/arch/prep/stand/boot/io.c

59

outb(port+1, val);

sys/arch/prep/stand/boot/io.c

91

writeb(u_long addr, u_char val)

sys/arch/prep/stand/boot/io.c

94

PCI_mem[addr] = val;

sys/arch/prep/stand/boot/io.c

98

writel(u_long addr, u_long val)

sys/arch/prep/stand/boot/vga.c

134

fillw(u_short val, u_short *buf, int num)

sys/arch/prep/stand/boot/vga.c

139

tmp = val;

sys/arch/prep/stand/boot/vreset.c

253

outb(VGA_SR_PORT + 1, SR_regs[i].val);

sys/arch/prep/stand/boot/vreset.c

257

outb(VGA_CR_PORT + 1, CR_regs[i].val);

sys/arch/prep/stand/boot/vreset.c

261

outb(VGA_GR_PORT + 1, GR_regs[i].val);

sys/arch/prep/stand/boot/vreset.c

63

u_int8_t val;

sys/arch/riscv/dev/plic.c

61

#define PLIC_WRITE(sc, reg, val) \

sys/arch/riscv/dev/plic.c

62

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/fdt/clint_fdt.c

74

#define CLINT_WRITE(sc, reg, val) \

sys/arch/riscv/fdt/clint_fdt.c

75

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/fdt/pcihost_fdt.c

422

pcihost_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/riscv/fdt/pcihost_fdt.c

445

bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg, val);

sys/arch/riscv/include/insn.h

41

uint32_t val;

sys/arch/riscv/riscv/db_machdep.c

135

const union riscv_insn ri = { .val = insn };

sys/arch/riscv/riscv/db_machdep.c

151

const union riscv_insn ri = { .val = insn };

sys/arch/riscv/riscv/db_machdep.c

176

const union riscv_insn i = { .val = insn };

sys/arch/riscv/riscv/trap.c

774

_ustore_8(uint8_t *uaddr, uint8_t val)

sys/arch/riscv/riscv/trap.c

776

return store_user_data(uaddr, &val, sizeof(val));

sys/arch/riscv/riscv/trap.c

780

_ustore_16(uint16_t *uaddr, uint16_t val)

sys/arch/riscv/riscv/trap.c

782

return store_user_data(uaddr, &val, sizeof(val));

sys/arch/riscv/riscv/trap.c

786

_ustore_32(uint32_t *uaddr, uint32_t val)

sys/arch/riscv/riscv/trap.c

788

return store_user_data(uaddr, &val, sizeof(val));

sys/arch/riscv/riscv/trap.c

793

_ustore_64(uint64_t *uaddr, uint64_t val)

sys/arch/riscv/riscv/trap.c

795

return store_user_data(uaddr, &val, sizeof(val));

sys/arch/riscv/sifive/fu540_ccache.c

100

#define WR4(sc, reg, val) \

sys/arch/riscv/sifive/fu540_ccache.c

101

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/sifive/fu540_ccache.c

102

#define WR8(sc, reg, val) \

sys/arch/riscv/sifive/fu540_ccache.c

103

bus_space_write_8((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/sifive/fu540_prci.c

117

uint32_t val;

sys/arch/riscv/sifive/fu540_prci.c

120

val = RD4(sc, reg);

sys/arch/riscv/sifive/fu540_prci.c

121

divr = __SHIFTOUT(val, PLL0_DIVR) + 1;

sys/arch/riscv/sifive/fu540_prci.c

122

divf = __SHIFTOUT(val, PLL0_DIVF) + 1;

sys/arch/riscv/sifive/fu540_prci.c

123

divq = __SHIFTOUT(val, PLL0_DIVQ);

sys/arch/riscv/sifive/fu540_prci.c

157

uint32_t val;

sys/arch/riscv/sifive/fu540_prci.c

164

val = RD4(sc, DDRPLLCFG1);

sys/arch/riscv/sifive/fu540_prci.c

165

WR4(sc, DDRPLLCFG1, val | PLL1_CKE);

sys/arch/riscv/sifive/fu540_prci.c

168

val = RD4(sc, GEMGXLPLLCFG1);

sys/arch/riscv/sifive/fu540_prci.c

169

WR4(sc, GEMGXLPLLCFG1, val | PLL1_CKE);

sys/arch/riscv/sifive/fu540_prci.c

88

#define WR4(sc, reg, val) \

sys/arch/riscv/sifive/fu540_prci.c

89

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7100_pinctrl.c

127

uint16_t val, uint16_t mask)

sys/arch/riscv/starfive/jh7100_pinctrl.c

132

const uint32_t regval = val << shift;

sys/arch/riscv/starfive/jh7100_pinctrl.c

160

uint16_t *val, uint16_t *mask)

sys/arch/riscv/starfive/jh7100_pinctrl.c

163

*val = 0;

sys/arch/riscv/starfive/jh7100_pinctrl.c

172

*val |= PAD_BIAS_DISABLE;

sys/arch/riscv/starfive/jh7100_pinctrl.c

179

*val |= PAD_BIAS_PULLDOWN;

sys/arch/riscv/starfive/jh7100_pinctrl.c

190

*val |= __SHIFTIN(ds, PAD_DRIVE_STRENGTH_MASK);

sys/arch/riscv/starfive/jh7100_pinctrl.c

202

*val |= PAD_INPUT_ENABLE;

sys/arch/riscv/starfive/jh7100_pinctrl.c

206

*val &= ~PAD_INPUT_ENABLE;

sys/arch/riscv/starfive/jh7100_pinctrl.c

210

*val |= PAD_INPUT_SCHMITT_ENABLE;

sys/arch/riscv/starfive/jh7100_pinctrl.c

214

*val &= ~PAD_INPUT_SCHMITT_ENABLE;

sys/arch/riscv/starfive/jh7100_pinctrl.c

220

*val |= __SHIFTIN(slew_rate, PAD_SLEW_RATE_MASK);

sys/arch/riscv/starfive/jh7100_pinctrl.c

230

*val |= PAD_BIAS_STRONG_PULLUP;

sys/arch/riscv/starfive/jh7100_pinctrl.c

267

uint16_t val, mask;

sys/arch/riscv/starfive/jh7100_pinctrl.c

268

jh7100_pinctrl_pin_properties(sc, group, &val, &mask);

sys/arch/riscv/starfive/jh7100_pinctrl.c

271

"value %#6x mask %#6x\n", group, plen, val, mask);

sys/arch/riscv/starfive/jh7100_pinctrl.c

284

val, mask);

sys/arch/riscv/starfive/jh7100_pinctrl.c

323

val, mask);

sys/arch/riscv/starfive/jh7100_pinctrl.c

396

int val = __SHIFTOUT(bank, mask);

sys/arch/riscv/starfive/jh7100_pinctrl.c

398

val = !val;

sys/arch/riscv/starfive/jh7100_pinctrl.c

400

return val;

sys/arch/riscv/starfive/jh7100_pinctrl.c

404

jh7100_pinctrl_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/riscv/starfive/jh7100_pinctrl.c

411

val = !val;

sys/arch/riscv/starfive/jh7100_pinctrl.c

414

GPIOWR4(sc, GPO_DOUT_CFG(pin_no), val);

sys/arch/riscv/starfive/jh7100_pinctrl.c

60

#define GPIOWR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7100_pinctrl.c

61

bus_space_write_4((sc)->sc_bst, (sc)->sc_gpio_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7100_pinctrl.c

79

#define PCTLWR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7100_pinctrl.c

80

bus_space_write_4((sc)->sc_bst, (sc)->sc_padctl_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7110_clkc.c

1010

const uint32_t val = RD4(sc, assert_reg);

sys/arch/riscv/starfive/jh7110_clkc.c

1012

WR4(sc, assert_reg, val | __BIT(bit));

sys/arch/riscv/starfive/jh7110_clkc.c

1014

WR4(sc, assert_reg, val & ~__BIT(bit));

sys/arch/riscv/starfive/jh7110_clkc.c

969

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7110_clkc.c

970

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7110_eqos.c

79

uint32_t val;

sys/arch/riscv/starfive/jh7110_eqos.c

81

"motorcomm,rx-clk-drv-microamp", &val) == 0) {

sys/arch/riscv/starfive/jh7110_eqos.c

83

"motorcomm,rx-clk-drv-microamp", val);

sys/arch/riscv/starfive/jh7110_eqos.c

86

"motorcomm,rx-data-drv-microamp", &val) == 0) {

sys/arch/riscv/starfive/jh7110_eqos.c

88

"motorcomm,rx-data-drv-microamp", val);

sys/arch/riscv/starfive/jh7110_eqos.c

91

"rx-internal-delay-ps", &val) == 0) {

sys/arch/riscv/starfive/jh7110_eqos.c

93

"rx-internal-delay-ps", val);

sys/arch/riscv/starfive/jh7110_eqos.c

96

"tx-internal-delay-ps", &val) == 0) {

sys/arch/riscv/starfive/jh7110_eqos.c

98

"tx-internal-delay-ps", val);

sys/arch/riscv/starfive/jh7110_pcie.c

383

#define SCWR4(sc, off, val) syscon_write_4((sc), (off), (val))

sys/arch/riscv/starfive/jh7110_pcie.c

554

uint32_t val;

sys/arch/riscv/starfive/jh7110_pcie.c

555

val = RD4(sc, PLDA_ATR0_PCIE_WIN0_SRCADDR_PARAM);

sys/arch/riscv/starfive/jh7110_pcie.c

556

val |= (PLDA_ATR0_PCIE_ATR_SIZE << PLDA_ATR0_PCIE_ATR_SIZE_SHIFT);

sys/arch/riscv/starfive/jh7110_pcie.c

557

WR4(sc, PLDA_ATR0_PCIE_WIN0_SRCADDR_PARAM, val);

sys/arch/riscv/starfive/jh7110_pcie.c

81

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7110_pcie.c

82

bus_space_write_4((sc)->sc_bst, (sc)->sc_apb_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7110_pciephy.c

59

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7110_pciephy.c

60

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7110_pinctrl.c

104

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7110_pinctrl.c

105

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7110_pinctrl.c

438

uint16_t *val, uint16_t *mask)

sys/arch/riscv/starfive/jh7110_pinctrl.c

441

*val = 0;

sys/arch/riscv/starfive/jh7110_pinctrl.c

457

*val |= JH7110_PADCFG_PU;

sys/arch/riscv/starfive/jh7110_pinctrl.c

461

*val |= JH7110_PADCFG_PD;

sys/arch/riscv/starfive/jh7110_pinctrl.c

471

*val |= JH7110_PADCFG_DS_2MA;

sys/arch/riscv/starfive/jh7110_pinctrl.c

475

*val |= JH7110_PADCFG_DS_4MA;

sys/arch/riscv/starfive/jh7110_pinctrl.c

479

*val |= JH7110_PADCFG_DS_8MA;

sys/arch/riscv/starfive/jh7110_pinctrl.c

483

*val |= JH7110_PADCFG_DS_12MA;

sys/arch/riscv/starfive/jh7110_pinctrl.c

494

*val |= JH7110_PADCFG_IE;

sys/arch/riscv/starfive/jh7110_pinctrl.c

498

*val &= ~JH7110_PADCFG_IE;

sys/arch/riscv/starfive/jh7110_pinctrl.c

502

*val |= JH7110_PADCFG_SMT;

sys/arch/riscv/starfive/jh7110_pinctrl.c

506

*val &= ~JH7110_PADCFG_SMT;

sys/arch/riscv/starfive/jh7110_pinctrl.c

512

*val &= ~JH7110_PADCFG_SLEW;

sys/arch/riscv/starfive/jh7110_pinctrl.c

516

*val |= JH7110_PADCFG_SLEW;

sys/arch/riscv/starfive/jh7110_pinctrl.c

549

uint16_t val, mask;

sys/arch/riscv/starfive/jh7110_pinctrl.c

550

jh7110_pinctrl_pin_properties(sc, group, &val, &mask);

sys/arch/riscv/starfive/jh7110_pinctrl.c

564

val, mask);

sys/arch/riscv/starfive/jh7110_pinctrl.c

649

int val = __SHIFTOUT(bank, mask);

sys/arch/riscv/starfive/jh7110_pinctrl.c

651

val = !val;

sys/arch/riscv/starfive/jh7110_pinctrl.c

653

return val;

sys/arch/riscv/starfive/jh7110_pinctrl.c

658

jh7110_pinctrl_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/arch/riscv/starfive/jh7110_pinctrl.c

673

val = !val;

sys/arch/riscv/starfive/jh7110_pinctrl.c

678

bank |= __SHIFTIN(val != 0 ? GPOUT_HIGH : GPOUT_LOW, mask);

sys/arch/riscv/starfive/jh7110_syscon.c

54

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7110_syscon.c

55

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7110_syscon.c

85

jh7110_syscon_write_4(void *priv, bus_size_t reg, uint32_t val)

sys/arch/riscv/starfive/jh7110_syscon.c

91

WR4(sc, reg, val);

sys/arch/riscv/starfive/jh7110_trng.c

146

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7110_trng.c

147

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh7110_trng.c

64

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh7110_trng.c

65

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh71x0_clkc.c

158

uint32_t val = RD4(sc, jcc->jcc_reg);

sys/arch/riscv/starfive/jh71x0_clkc.c

159

val &= ~JH71X0_CLK_MUX_MASK;

sys/arch/riscv/starfive/jh71x0_clkc.c

160

val |= __SHIFTIN(i, JH71X0_CLK_MUX_MASK);

sys/arch/riscv/starfive/jh71x0_clkc.c

161

WR4(sc, jcc->jcc_reg, val);

sys/arch/riscv/starfive/jh71x0_clkc.c

173

uint32_t val = RD4(sc, jcc->jcc_reg);

sys/arch/riscv/starfive/jh71x0_clkc.c

174

size_t pindex = __SHIFTOUT(val, JH71X0_CLK_MUX_MASK);

sys/arch/riscv/starfive/jh71x0_clkc.c

231

uint32_t val = RD4(sc, jcc->jcc_reg);

sys/arch/riscv/starfive/jh71x0_clkc.c

232

uint32_t div = __SHIFTOUT(val, JH71X0_CLK_DIV_MASK);

sys/arch/riscv/starfive/jh71x0_clkc.c

301

uint32_t val = RD4(sc, jcc->jcc_reg);

sys/arch/riscv/starfive/jh71x0_clkc.c

303

100UL * __SHIFTOUT(val, JH71X0_CLK_INT_MASK) +

sys/arch/riscv/starfive/jh71x0_clkc.c

304

__SHIFTOUT(val, JH71X0_CLK_FRAC_MASK);

sys/arch/riscv/starfive/jh71x0_clkc.c

378

uint32_t val = RD4(sc, jcc->jcc_reg);

sys/arch/riscv/starfive/jh71x0_clkc.c

379

val &= ~JH71X0_CLK_MUX_MASK;

sys/arch/riscv/starfive/jh71x0_clkc.c

380

val |= __SHIFTIN(i, JH71X0_CLK_MUX_MASK);

sys/arch/riscv/starfive/jh71x0_clkc.c

381

WR4(sc, jcc->jcc_reg, val);

sys/arch/riscv/starfive/jh71x0_clkc.c

393

uint32_t val = RD4(sc, jcc->jcc_reg);

sys/arch/riscv/starfive/jh71x0_clkc.c

394

size_t pindex = __SHIFTOUT(val, JH71X0_CLK_MUX_MASK);

sys/arch/riscv/starfive/jh71x0_clkc.c

420

uint32_t val = RD4(sc, jcc->jcc_reg);

sys/arch/riscv/starfive/jh71x0_clkc.c

421

uint32_t div = __SHIFTOUT(val, JH71X0_CLK_DIV_MASK);

sys/arch/riscv/starfive/jh71x0_clkc.c

48

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh71x0_clkc.c

49

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh71x0_clkc.c

57

uint32_t val = RD4(sc, jcc->jcc_reg);

sys/arch/riscv/starfive/jh71x0_clkc.c

58

val &= ~clr;

sys/arch/riscv/starfive/jh71x0_clkc.c

59

val |= set;

sys/arch/riscv/starfive/jh71x0_clkc.c

60

WR4(sc, jcc->jcc_reg, val);

sys/arch/riscv/starfive/jh71x0_eth.c

70

uint32_t val = syscon_read_4(jh_sc->sc_syscon, reg);

sys/arch/riscv/starfive/jh71x0_eth.c

71

val &= ~(STARFIVE_GMAC_PHY_INFT_MASK << shift);

sys/arch/riscv/starfive/jh71x0_eth.c

72

val |= STARFIVE_GMAC_PHY_INFT_RGMII << shift;

sys/arch/riscv/starfive/jh71x0_eth.c

73

syscon_write_4(jh_sc->sc_syscon, reg, val);

sys/arch/riscv/starfive/jh71x0_temp.c

53

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh71x0_temp.c

54

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/riscv/starfive/jh71x0_usb.c

54

#define WR4(sc, reg, val) \

sys/arch/riscv/starfive/jh71x0_usb.c

55

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/arch/rs6000/rs6000/machdep.c

161

setled(uint32_t val)

sys/arch/rs6000/rs6000/machdep.c

174

*(uint32_t *)0xF0A00300 = val;

sys/arch/rs6000/rs6000/machdep.c

179

*(uint32_t *)0xFF600300 = val;

sys/arch/rs6000/stand/boot/boot.c

109

*(uint32_t *)0xF0A00300 = val;

sys/arch/rs6000/stand/boot/boot.c

129

*(volatile uint32_t *)0xFF600300 = val;

sys/arch/rs6000/stand/boot/boot.c

96

setled(uint32_t val)

sys/arch/rs6000/stand/boot/io.c

32

outb(int port, char val)

sys/arch/rs6000/stand/boot/io.c

35

MCA_io[port] = val;

sys/arch/rs6000/stand/boot/io.c

39

outw(int port, u_int16_t val)

sys/arch/rs6000/stand/boot/io.c

41

outb(port, val>>8);

sys/arch/rs6000/stand/boot/io.c

42

outb(port+1, val);

sys/arch/sandpoint/sandpoint/machdep.c

525

unsigned val, n, bankn, end;

sys/arch/sandpoint/sandpoint/machdep.c

528

val = in32rb(0xfee00000);

sys/arch/sandpoint/sandpoint/machdep.c

529

if ((val & 0xf) == 0)

sys/arch/sandpoint/sandpoint/machdep.c

534

if ((val & (1U << n)) == 0)

sys/arch/sandpoint/sandpoint/machdep.c

542

val = in32rb(0xfee00000);

sys/arch/sandpoint/sandpoint/machdep.c

543

end = ((val >> bankn) & 0x03) << 28;

sys/arch/sandpoint/sandpoint/machdep.c

545

val = in32rb(0xfee00000);

sys/arch/sandpoint/sandpoint/machdep.c

546

end |= ((val >> bankn) & 0xff) << 20;

sys/arch/sandpoint/stand/altboot/brdsetup.c

1334

unsigned bankn, end, n, tag, val;

sys/arch/sandpoint/stand/altboot/brdsetup.c

1350

val = pcicfgread(tag, MPC106_MEMEN);

sys/arch/sandpoint/stand/altboot/brdsetup.c

1352

if ((val & (1U << n)) == 0)

sys/arch/sandpoint/stand/altboot/brdsetup.c

1358

val = pcicfgread(tag, MPC106_EXTMEMENDADDR1);

sys/arch/sandpoint/stand/altboot/brdsetup.c

1359

end = ((val >> bankn) & 0x03) << 28;

sys/arch/sandpoint/stand/altboot/brdsetup.c

1360

val = pcicfgread(tag, MPC106_MEMENDADDR1);

sys/arch/sandpoint/stand/altboot/brdsetup.c

1361

end |= ((val >> bankn) & 0xff) << 20;

sys/arch/sandpoint/stand/altboot/brdsetup.c

226

unsigned pchb, pcib, dev11, dev12, dev13, dev15, dev16, val;

sys/arch/sandpoint/stand/altboot/brdsetup.c

307

val = pcicfgread(pchb, 0xe0);

sys/arch/sandpoint/stand/altboot/brdsetup.c

309

pci_to_memclk[(val >> 19) & 0x1f] + 10) / 10;

sys/arch/sandpoint/stand/altboot/brdsetup.c

311

asm volatile ("mfspr %0,1009" : "=r"(val));

sys/arch/sandpoint/stand/altboot/brdsetup.c

313

mem_to_cpuclk[val >> 27] + 10) / 10;

sys/arch/sandpoint/stand/altboot/brdsetup.c

407

unsigned ac97, ide, pcib, pmgt, usb12, usb34, val;

sys/arch/sandpoint/stand/altboot/brdsetup.c

429

val = pcicfgread(pcib, 0x84);

sys/arch/sandpoint/stand/altboot/brdsetup.c

430

val |= (02 << 8);

sys/arch/sandpoint/stand/altboot/brdsetup.c

431

pcicfgwrite(pcib, 0x84, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

433

val = pcicfgread(pcib, 0x84);

sys/arch/sandpoint/stand/altboot/brdsetup.c

434

val &= ~(02 << 8);

sys/arch/sandpoint/stand/altboot/brdsetup.c

435

pcicfgwrite(pcib, 0x84, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

438

val = pcicfgread(pcib, 0x54);

sys/arch/sandpoint/stand/altboot/brdsetup.c

439

val = (val & 0xff) | 0xb0500000; /* Dx CB Ax xS */

sys/arch/sandpoint/stand/altboot/brdsetup.c

440

pcicfgwrite(pcib, 0x54, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

443

val = pcicfgread(pcib, 0x44);

sys/arch/sandpoint/stand/altboot/brdsetup.c

444

val = val | 0x20000000;

sys/arch/sandpoint/stand/altboot/brdsetup.c

445

pcicfgwrite(pcib, 0x44, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

452

val = pcicfgread(usb12, 0x3c) &~ 0xff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

453

val |= 11;

sys/arch/sandpoint/stand/altboot/brdsetup.c

454

pcicfgwrite(usb12, 0x3c, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

455

val = pcicfgread(usb34, 0x3c) &~ 0xff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

456

val |= 11;

sys/arch/sandpoint/stand/altboot/brdsetup.c

457

pcicfgwrite(usb34, 0x3c, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

458

val = pcicfgread(ac97, 0x3c) &~ 0xff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

459

val |= 5;

sys/arch/sandpoint/stand/altboot/brdsetup.c

460

pcicfgwrite(ac97, 0x3c, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

469

unsigned ide, irq, net, pcib, steer, val;

sys/arch/sandpoint/stand/altboot/brdsetup.c

480

val = pcicfgread(pcib, 0x54); /* Dx CB Ax xs */

sys/arch/sandpoint/stand/altboot/brdsetup.c

481

steer = val & 0xf;

sys/arch/sandpoint/stand/altboot/brdsetup.c

482

irq = (val >> 12) & 0xf; /* 15:12 */

sys/arch/sandpoint/stand/altboot/brdsetup.c

487

irq = (val >> 16) & 0xf; /* 19:16 */

sys/arch/sandpoint/stand/altboot/brdsetup.c

492

irq = (val >> 20) & 0xf; /* 23:20 */

sys/arch/sandpoint/stand/altboot/brdsetup.c

497

irq = (val >> 28); /* 31:28 */

sys/arch/sandpoint/stand/altboot/brdsetup.c

509

val = pcicfgread(ide, 0x08) & 0xffff00ff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

510

pcicfgwrite(ide, 0x08, val | (0x8f << 8));

sys/arch/sandpoint/stand/altboot/brdsetup.c

521

val = pcicfgread(ide, 0x08) & 0xffff00ff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

522

val |= (0x8a << 8);

sys/arch/sandpoint/stand/altboot/brdsetup.c

523

pcicfgwrite(ide, 0x08, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

538

val = pcicfgread(ide, 0x3c) & 0xffff00ff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

539

pcicfgwrite(ide, 0x3c, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

548

val = pcicfgread(pcib, 0x48);

sys/arch/sandpoint/stand/altboot/brdsetup.c

549

pcicfgwrite(pcib, 0x48, val | 04);

sys/arch/sandpoint/stand/altboot/brdsetup.c

553

val = pcicfgread(pcib, 0x84);

sys/arch/sandpoint/stand/altboot/brdsetup.c

554

pcicfgwrite(pcib, 0x84, val | 0x1c00);

sys/arch/sandpoint/stand/altboot/brdsetup.c

561

val = pcicfgread(net, 0x3c) & 0xffff0000;

sys/arch/sandpoint/stand/altboot/brdsetup.c

562

val |= (('A' - '@') << 8) | 25;

sys/arch/sandpoint/stand/altboot/brdsetup.c

563

pcicfgwrite(net, 0x3c, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

596

unsigned ide, net, pcib, steer, val;

sys/arch/sandpoint/stand/altboot/brdsetup.c

631

val = pcicfgread(ide, 0x08);

sys/arch/sandpoint/stand/altboot/brdsetup.c

632

val &= 0xffff00ff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

633

pcicfgwrite(ide, 0x08, val | (0x8f << 8));

sys/arch/sandpoint/stand/altboot/brdsetup.c

636

val = pcicfgread(pcib, 0x40) & 0x00ffffff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

637

pcicfgwrite(pcib, 0x40, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

640

val = pcicfgread(pcib, 0x44) & 0xffff0000;

sys/arch/sandpoint/stand/altboot/brdsetup.c

641

pcicfgwrite(pcib, 0x44, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

644

val = pcicfgread(ide, 0x40) & 0xffff0000;

sys/arch/sandpoint/stand/altboot/brdsetup.c

645

val |= (1 << 11) | 0x33; /* LEGIRQ turns on PCI interrupt */

sys/arch/sandpoint/stand/altboot/brdsetup.c

646

pcicfgwrite(ide, 0x40, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

649

val = pcicfgread(ide, 0x3c) & 0xffffff00;

sys/arch/sandpoint/stand/altboot/brdsetup.c

650

val |= 11; /* pin designation is hardwired to pin A */

sys/arch/sandpoint/stand/altboot/brdsetup.c

651

pcicfgwrite(ide, 0x3c, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

661

val = pcicfgread(ide, 0x08);

sys/arch/sandpoint/stand/altboot/brdsetup.c

662

val &= 0xffff00ff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

663

pcicfgwrite(ide, 0x08, val | (0x8a << 8));

sys/arch/sandpoint/stand/altboot/brdsetup.c

666

val = pcicfgread(pcib, 0x40) & 0x00ffffff;

sys/arch/sandpoint/stand/altboot/brdsetup.c

667

pcicfgwrite(pcib, 0x40, val | (0xee << 24));

sys/arch/sandpoint/stand/altboot/brdsetup.c

670

val = pcicfgread(ide, 0x44) & 0xffff0000;

sys/arch/sandpoint/stand/altboot/brdsetup.c

671

pcicfgwrite(ide, 0x44, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

674

val = pcicfgread(ide, 0x3c) & 0xffff0000;

sys/arch/sandpoint/stand/altboot/brdsetup.c

675

pcicfgwrite(ide, 0x3c, val);

sys/arch/sandpoint/stand/altboot/brdsetup.c

682

val = pcicfgread(net, 0x3c) & 0xffff0000;

sys/arch/sandpoint/stand/altboot/brdsetup.c

684

val |= (('A' - '@') << 8) | line;

sys/arch/sandpoint/stand/altboot/brdsetup.c

685

pcicfgwrite(net, 0x3c, val);

sys/arch/sandpoint/stand/altboot/fxp.c

468

int x, val;

sys/arch/sandpoint/stand/altboot/fxp.c

479

val = 0;

sys/arch/sandpoint/stand/altboot/fxp.c

489

val |= (1 << (x - 1));

sys/arch/sandpoint/stand/altboot/fxp.c

496

return val;

sys/arch/sandpoint/stand/altboot/kse.c

130

unsigned i, val, fdx;

sys/arch/sandpoint/stand/altboot/kse.c

155

val = pcicfgread(tag, PCI_ID_REG);

sys/arch/sandpoint/stand/altboot/kse.c

156

if (PCI_PRODUCT(val) == 0x8841) {

sys/arch/sandpoint/stand/altboot/kse.c

157

val = CSR_READ_2(l, P1SR);

sys/arch/sandpoint/stand/altboot/kse.c

158

fdx = !!(val & (1U << 9));

sys/arch/sandpoint/stand/altboot/kse.c

159

printf("%s", (val & (1U << 8)) ? "100Mbps" : "10Mbps");

sys/arch/sandpoint/stand/altboot/kse.c

261

unsigned val, bound;

sys/arch/sandpoint/stand/altboot/kse.c

263

val = (1U << 13) | (1U << 7) | 0x1f /* advertise all caps */;

sys/arch/sandpoint/stand/altboot/kse.c

264

CSR_WRITE_2(l, P1CR4, val);

sys/arch/sandpoint/stand/altboot/kse.c

267

val = CSR_READ_2(l, P1SR);

sys/arch/sandpoint/stand/altboot/kse.c

268

if (val & (1U << 5)) /* link is found up */

sys/arch/sandpoint/stand/altboot/main.c

646

uint32_t val;

sys/arch/sandpoint/stand/altboot/main.c

648

val = 0;

sys/arch/sandpoint/stand/altboot/main.c

650

val = (val << 4) | n;

sys/arch/sandpoint/stand/altboot/main.c

651

return val;

sys/arch/sandpoint/stand/altboot/nvt.c

173

unsigned val, fdx;

sys/arch/sandpoint/stand/altboot/nvt.c

182

val = CTL1_RESET;

sys/arch/sandpoint/stand/altboot/nvt.c

183

CSR_WRITE_1(l, VR_CTL1, val);

sys/arch/sandpoint/stand/altboot/nvt.c

185

val = CSR_READ_1(l, VR_CTL1);

sys/arch/sandpoint/stand/altboot/nvt.c

186

} while (val & CTL1_RESET);

sys/arch/sandpoint/stand/altboot/nvt.c

206

val = mii_read(l, l->phy, 20);

sys/arch/sandpoint/stand/altboot/nvt.c

207

fdx = !!(val & (1U << 0));

sys/arch/sandpoint/stand/altboot/nvt.c

208

printf("%s", (val & (1U << 1)) ? "100Mbps" : "10Mbps");

sys/arch/sandpoint/stand/altboot/pci.c

126

pcicfgwrite(unsigned tag, int off, unsigned val)

sys/arch/sandpoint/stand/altboot/pci.c

132

iohtole32(CONFIG_DATA, val);

sys/arch/sandpoint/stand/altboot/pci.c

147

cfgwrite(int b, int d, int f, int off, unsigned val)

sys/arch/sandpoint/stand/altboot/pci.c

154

iohtole32(CONFIG_DATA, val);

sys/arch/sandpoint/stand/altboot/pci.c

188

unsigned val;

sys/arch/sandpoint/stand/altboot/pci.c

193

val = cfgread(bus, dev, func, PCI_ID_REG);

sys/arch/sandpoint/stand/altboot/pci.c

194

printf(" chip %04x.%04x", val & 0xffff, val>>16);

sys/arch/sandpoint/stand/altboot/pci.c

195

val = cfgread(bus, dev, func, 0x2c);

sys/arch/sandpoint/stand/altboot/pci.c

196

printf(" card %04x.%04x", val & 0xffff, val>>16);

sys/arch/sandpoint/stand/altboot/pci.c

197

val = cfgread(bus, dev, func, PCI_CLASS_REG);

sys/arch/sandpoint/stand/altboot/pci.c

199

PCI_REVISION(val), (val>>24), (val>>16) & 0xff,

sys/arch/sandpoint/stand/altboot/pci.c

200

PCI_INTERFACE(val));

sys/arch/sandpoint/stand/altboot/pci.c

201

val = cfgread(bus, dev, func, PCI_BHLC_REG);

sys/arch/sandpoint/stand/altboot/pci.c

202

printf(" hdr %02x\n", (val>>16) & 0xff);

sys/arch/sandpoint/stand/altboot/pci.c

206

val = cfgread(bus, dev, func, PCI_COMMAND_STATUS_REG);

sys/arch/sandpoint/stand/altboot/pci.c

207

val |= 0xffff0107; /* enable IO,MEM,MASTER,SERR */

sys/arch/sandpoint/stand/altboot/pci.c

208

cfgwrite(bus, dev, func, 0x04, val);

sys/arch/sandpoint/stand/altboot/pci.c

211

val = 0x80 << 8 | 0x08 /* 32B cache line */;

sys/arch/sandpoint/stand/altboot/pci.c

212

cfgwrite(bus, dev, func, PCI_BHLC_REG, val);

sys/arch/sandpoint/stand/altboot/pci.c

215

val = cfgread(bus, dev, func, 0x3c) & ~0xff;

sys/arch/sandpoint/stand/altboot/pci.c

216

val |= dev; /* assign IDSEL */

sys/arch/sandpoint/stand/altboot/pci.c

217

cfgwrite(bus, dev, func, 0x3c, val);

sys/arch/sandpoint/stand/altboot/pci.c

220

val = cfgread(bus, dev, func, PCI_CLASS_REG);

sys/arch/sandpoint/stand/altboot/pci.c

221

if (PCI_CLASS(val) == PCI_CLASS_IDE && (PCI_INTERFACE(val) & 0x05) == 0)

sys/arch/sandpoint/stand/altboot/pci.c

232

val = (0xff << 16) | (new << 8) | bus;

sys/arch/sandpoint/stand/altboot/pci.c

233

cfgwrite(bus, dev, func, 0x18, val);

sys/arch/sandpoint/stand/altboot/pci.c

236

val = (iostart + (0xfff)) & ~0xfff; /* 4KB boundary */

sys/arch/sandpoint/stand/altboot/pci.c

237

iostart = val;

sys/arch/sandpoint/stand/altboot/pci.c

238

val = 0xffff0000 | (iolimit & 0xf000) | (val & 0xf000) >> 8;

sys/arch/sandpoint/stand/altboot/pci.c

239

cfgwrite(bus, dev, func, 0x1c, val);

sys/arch/sandpoint/stand/altboot/pci.c

240

val = (iolimit & 0xffff0000) | (val & 0xffff0000) >> 16;

sys/arch/sandpoint/stand/altboot/pci.c

241

cfgwrite(bus, dev, func, 0x30, val);

sys/arch/sandpoint/stand/altboot/pci.c

244

val = (memstart + 0xfffff) &~ 0xfffff; /* 1MB boundary */

sys/arch/sandpoint/stand/altboot/pci.c

245

memstart = val;

sys/arch/sandpoint/stand/altboot/pci.c

246

val = (memlimit & 0xffff0000) | (val & 0xffff0000) >> 16;

sys/arch/sandpoint/stand/altboot/pci.c

247

cfgwrite(bus, dev, func, 0x20, val);

sys/arch/sandpoint/stand/altboot/pci.c

250

val = cfgread(bus, dev, func, 0x04);

sys/arch/sandpoint/stand/altboot/pci.c

251

val |= 0xffff0107;

sys/arch/sandpoint/stand/altboot/pci.c

252

cfgwrite(bus, dev, func, 0x04, val);

sys/arch/sandpoint/stand/altboot/pci.c

257

val = cfgread(bus, dev, func, 0x18);

sys/arch/sandpoint/stand/altboot/pci.c

258

val = (maxbus << 16) | (val & 0xffff);

sys/arch/sandpoint/stand/altboot/pci.c

259

cfgwrite(bus, dev, func, 0x18, val);

sys/arch/sandpoint/stand/altboot/pci.c

267

unsigned val, maxbar, mapr, req, mapbase, size;

sys/arch/sandpoint/stand/altboot/pci.c

269

val = cfgread(bus, dev, func, 0x0c);

sys/arch/sandpoint/stand/altboot/pci.c

270

switch (PCI_HDRTYPE_TYPE(val)) {

sys/arch/sandpoint/stand/altboot/pci.c

280

val = cfgread(bus, dev, func, mapr);

sys/arch/sandpoint/stand/altboot/pci.c

281

if (val & 01) {

sys/arch/sandpoint/stand/altboot/pci.c

283

req = ~(val & 0xfffffffc) + 1;

sys/arch/sandpoint/stand/altboot/pci.c

299

req = ~(val & 0xfffffff0) + 1;

sys/arch/sandpoint/stand/altboot/pci.c

304

val &= 0x6;

sys/arch/sandpoint/stand/altboot/pci.c

305

if (val == 2 || val == 6)

sys/arch/sandpoint/stand/altboot/pci.c

315

if (val == 4) {

sys/arch/sandpoint/stand/altboot/pci.c

320

DPRINTF(("%s base %x size %x\n", (val & 01) ? "i/o" : "mem",

sys/arch/sandpoint/stand/altboot/pciide.c

100

native = PCI_CLASS(val) != PCI_CLASS_IDE ||

sys/arch/sandpoint/stand/altboot/pciide.c

101

(PCI_INTERFACE(val) & 05) != 0;

sys/arch/sandpoint/stand/altboot/pciide.c

87

unsigned val;

sys/arch/sandpoint/stand/altboot/pciide.c

99

val = pcicfgread(tag, PCI_CLASS_REG);

sys/arch/sandpoint/stand/altboot/pcn.c

146

unsigned val, fdx, loop;

sys/arch/sandpoint/stand/altboot/pcn.c

167

val = pcn_csr_read(l, PCN_CSR12); en[0] = val; en[1] = (val >> 8);

sys/arch/sandpoint/stand/altboot/pcn.c

168

val = pcn_csr_read(l, PCN_CSR13); en[2] = val; en[3] = (val >> 8);

sys/arch/sandpoint/stand/altboot/pcn.c

169

val = pcn_csr_read(l, PCN_CSR14); en[4] = val; en[5] = (val >> 8);

sys/arch/sandpoint/stand/altboot/pcn.c

175

val = pcn_mii_read(l, l->phy, 24);

sys/arch/sandpoint/stand/altboot/pcn.c

176

fdx = !!(val & (1U << 2));

sys/arch/sandpoint/stand/altboot/pcn.c

177

printf("%s", (val & (1U << 0)) ? "100Mbps" : "10Mbps");

sys/arch/sandpoint/stand/altboot/pcn.c

304

pcn_mii_write(struct local *l, int phy, int reg, int val)

sys/arch/sandpoint/stand/altboot/pcn.c

307

pcn_bcr_write(l, PCN_BCR34, val);

sys/arch/sandpoint/stand/altboot/rge.c

149

unsigned val;

sys/arch/sandpoint/stand/altboot/rge.c

161

val = CSR_READ_1(l, RGE_CR);

sys/arch/sandpoint/stand/altboot/rge.c

162

} while (val & CR_RESET);

sys/arch/sandpoint/stand/altboot/rge.c

195

val = CSR_READ_1(l, RGE_PHYSR);

sys/arch/sandpoint/stand/altboot/rge.c

196

if (val & (1U << 4))

sys/arch/sandpoint/stand/altboot/rge.c

198

if (val & (1U << 3))

sys/arch/sandpoint/stand/altboot/rge.c

200

if (val & (1U << 2))

sys/arch/sandpoint/stand/altboot/rge.c

202

if (val & (1U << 0))

sys/arch/sandpoint/stand/altboot/siisata.c

177

unsigned val;

sys/arch/sandpoint/stand/altboot/siisata.c

179

val = (00 << 4) | (03 << 8); /* any speed, no pwrmgt */

sys/arch/sandpoint/stand/altboot/siisata.c

180

CSR_WRITE_4(sc, val | 01); /* perform init */

sys/arch/sandpoint/stand/altboot/siisata.c

182

CSR_WRITE_4(sc, val);

sys/arch/sandpoint/stand/altboot/siisata.c

184

val = CSR_READ_4(ss); /* has completed */

sys/arch/sandpoint/stand/altboot/siisata.c

185

return ((val & 03) == 03); /* active drive found */

sys/arch/sandpoint/stand/altboot/sip.c

135

unsigned val, i, fdx, txc, rxc;

sys/arch/sandpoint/stand/altboot/sip.c

141

val = pcicfgread(tag, PCI_ID_REG);

sys/arch/sandpoint/stand/altboot/sip.c

142

if (PCI_DEVICE(0x100b, 0x0020) != val)

sys/arch/sandpoint/stand/altboot/sip.c

154

val = CSR_READ(l, SIP_CR);

sys/arch/sandpoint/stand/altboot/sip.c

155

} while (val & CR_RST); /* S1C */

sys/arch/sandpoint/stand/altboot/sip.c

187

val = CSR_READ(l, SIP_CFG);

sys/arch/sandpoint/stand/altboot/sip.c

188

fdx = !!(val & (1U << 29));

sys/arch/sandpoint/stand/altboot/sip.c

189

printf("%s", (val & (1U << 30)) ? "100Mbps" : "10Mbps");

sys/arch/sandpoint/stand/altboot/sip.c

358

unsigned val;

sys/arch/sandpoint/stand/altboot/sip.c

361

val = CSR_READ(l, SIP_BMCR + (reg << 2));

sys/arch/sandpoint/stand/altboot/sip.c

362

} while (reg == MII_BMSR && val == 0);

sys/arch/sandpoint/stand/altboot/sip.c

363

return val & 0xffff;

sys/arch/sandpoint/stand/altboot/sip.c

367

mii_write(struct local *l, int phy, int reg, int val)

sys/arch/sandpoint/stand/altboot/sip.c

370

CSR_WRITE(l, SIP_BMCR + (reg << 2), val);

sys/arch/sandpoint/stand/altboot/skg.c

458

unsigned val;

sys/arch/sandpoint/stand/altboot/skg.c

463

val = CSR_READ_4(l, SK_GPIO);

sys/arch/sandpoint/stand/altboot/skg.c

464

CSR_WRITE_4(l, SK_GPIO, (val | 0x2000000) & ~0x200);

sys/arch/sandpoint/stand/altboot/skg.c

474

val = GPHY_INT_POL_HI | GPHY_DIS_FC | GPHY_DIS_SLEEP | GPHY_ENA_XC |

sys/arch/sandpoint/stand/altboot/skg.c

476

CSR_WRITE_4(l, SK_GPHY_CTRL, val | GPHY_RESET_SET);

sys/arch/sandpoint/stand/altboot/skg.c

478

CSR_WRITE_4(l, SK_GPHY_CTRL, val | GPHY_RESET_CLEAR);

sys/arch/sandpoint/stand/altboot/sme.c

123

unsigned mac32, mac16, val, fdx;

sys/arch/sandpoint/stand/altboot/sme.c

149

val = mii_read(l, l->phy, 31);

sys/arch/sandpoint/stand/altboot/sme.c

150

fdx = !!(val & (1U << 4));

sys/arch/sandpoint/stand/altboot/sme.c

151

printf("%s", (val & (1U << 3)) ? "100Mbps" : "10Mbps");

sys/arch/sandpoint/stand/altboot/sme.c

172

val = MACCR_TXEN | MACCR_RXEN;

sys/arch/sandpoint/stand/altboot/sme.c

174

val |= MACCR_FDPX;

sys/arch/sandpoint/stand/altboot/sme.c

177

CSR_WRITE(l, MAC_CR, val); /* (FDX), Tx/Rx enable */

sys/arch/sandpoint/stand/altboot/sme.c

292

mii_write(struct local *l, int phy, int reg, int val)

sys/arch/sandpoint/stand/altboot/sme.c

300

CSR_WRITE(l, MIIDATA, val);

sys/arch/sandpoint/stand/altboot/stg.c

412

mii_write(struct local *l, int phy, int reg, int val)

sys/arch/sandpoint/stand/altboot/stg.c

417

data |= val;

sys/arch/sandpoint/stand/altboot/tlp.c

133

unsigned i, val, fdx;

sys/arch/sandpoint/stand/altboot/tlp.c

153

val = CSR_READ(l, PAR0_CSR25);

sys/arch/sandpoint/stand/altboot/tlp.c

154

en[0] = val & 0xff;

sys/arch/sandpoint/stand/altboot/tlp.c

155

en[1] = (val >> 8) & 0xff;

sys/arch/sandpoint/stand/altboot/tlp.c

156

en[2] = (val >> 16) & 0xff;

sys/arch/sandpoint/stand/altboot/tlp.c

157

en[3] = (val >> 24) & 0xff;

sys/arch/sandpoint/stand/altboot/tlp.c

158

val = CSR_READ(l, PAR1_CSR26);

sys/arch/sandpoint/stand/altboot/tlp.c

159

en[4] = val & 0xff;

sys/arch/sandpoint/stand/altboot/tlp.c

160

en[5] = (val >> 8) & 0xff;

sys/arch/sandpoint/stand/altboot/tlp.c

169

val = CSR_READ(l, AN_OMODE);

sys/arch/sandpoint/stand/altboot/tlp.c

170

if (val & (1U << 29)) {

sys/arch/sandpoint/stand/altboot/tlp.c

171

printf("%s", (val & (1U << 31)) ? "100Mbps" : "10Mbps");

sys/arch/sandpoint/stand/altboot/tlp.c

172

fdx = !!(val & (1U << 30));

sys/arch/sandpoint/stand/altboot/tlp.c

324

mii_write(struct local *l, int phy, int reg, int val)

sys/arch/sandpoint/stand/altboot/tlp.c

329

data |= val & 0xffff;

sys/arch/sandpoint/stand/altboot/vge.c

218

unsigned val, i, fdx, loop;

sys/arch/sandpoint/stand/altboot/vge.c

229

val = CTL1_RESET;

sys/arch/sandpoint/stand/altboot/vge.c

230

CSR_WRITE_1(l, VR_CTL1, val);

sys/arch/sandpoint/stand/altboot/vge.c

232

val = CSR_READ_1(l, VR_CTL1);

sys/arch/sandpoint/stand/altboot/vge.c

233

} while (val & CTL1_RESET);

sys/arch/sandpoint/stand/altboot/vge.c

253

val = mii_read(l, l->phy, 28);

sys/arch/sandpoint/stand/altboot/vge.c

254

fdx = (val >> 5) & 01;

sys/arch/sandpoint/stand/altboot/vge.c

255

switch ((val >> 3) & 03) {

sys/arch/sandpoint/stand/altboot/wm.c

138

unsigned val, fdx;

sys/arch/sandpoint/stand/altboot/wm.c

155

val = read_srom(l, 0); en[0] = val; en[1] = (val >> 8);

sys/arch/sandpoint/stand/altboot/wm.c

156

val = read_srom(l, 1); en[2] = val; en[3] = (val >> 8);

sys/arch/sandpoint/stand/altboot/wm.c

157

val = read_srom(l, 2); en[4] = val; en[5] = (val >> 8);

sys/arch/sandpoint/stand/altboot/wm.c

167

val = mii_read(l, l->phy, 0x11);

sys/arch/sandpoint/stand/altboot/wm.c

168

fdx = !!(val & 0x0200);

sys/arch/sandpoint/stand/altboot/wm.c

169

switch (val & 0xc000) {

sys/arch/sandpoint/stand/altboot/wm.c

367

mii_write(struct local *l, int phy, int reg, int val)

sys/arch/sandpoint/stand/altboot/wm.c

371

data = (1U << 26) | MPHY(phy) | MREG(reg) | (val & 0xffff);

sys/arch/sbmips/sbmips/rtc.c

421

#define WRITE_REG(rp, val) mips3_sd((register_t)(MIPS_PHYS_TO_KSEG1(rp)), (val))

sys/arch/sbmips/sbmips/rtc.c

87

#define WRITERTC(sc, dev, val) \

sys/arch/sbmips/sbmips/rtc.c

88

time_writertc((sc)->sc_smbus_chan, (sc)->sc_smbus_addr, (dev), (sc)->sc_type, (val))

sys/arch/sbmips/sbmips/sb1250_icu.c

94

#define WRITE_REG(rp, val) mips3_sd((register_t)(rp), (val))

sys/arch/sbmips/stand/common/cfe_api.c

156

cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)

sys/arch/sbmips/stand/common/cfe_api.c

168

xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);

sys/arch/sbmips/stand/common/cfe_api.c

471

cfe_setenv(char *name, char *val)

sys/arch/sbmips/stand/common/cfe_api.c

483

xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);

sys/arch/sbmips/stand/common/cfe_api.c

484

xiocb.plist.xiocb_envbuf.val_length = cfe_strlen(val);

sys/arch/sbmips/stand/common/cfe_api.h

188

int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen);

sys/arch/sbmips/stand/common/cfe_api.h

204

int cfe_setenv(char *name, char *val);

sys/arch/sgimips/dev/crmfb.c

1007

uint32_t val;

sys/arch/sgimips/dev/crmfb.c

1010

val = (overhang * (depth >> 3)) >> 5;

sys/arch/sgimips/dev/crmfb.c

1011

DPRINTF("reg: %08x\n", val);

sys/arch/sgimips/dev/crmfb.c

1012

d |= (val & 0x1f);

sys/arch/sgimips/dev/crmfb.c

1690

crmfb_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/arch/sgimips/dev/crmfb.c

1693

return i2c_bitbang_write_byte(cookie, val, flags, &crmfb_i2cbb_ops);

sys/arch/sgimips/dev/crmfb.c

732

uint32_t val;

sys/arch/sgimips/dev/crmfb.c

740

val = (r << 8) | (g << 16) | (b << 24);

sys/arch/sgimips/dev/crmfb.c

741

crmfb_write_reg(sc, CRMFB_CMAP + (reg * 4), val);

sys/arch/sgimips/dev/crmfb.c

749

uint32_t val;

sys/arch/sgimips/dev/crmfb.c

754

val = ((x - sc->sc_hot_x) & 0xffff) | ((y - sc->sc_hot_y) << 16);

sys/arch/sgimips/dev/crmfb.c

755

crmfb_write_reg(sc, CRMFB_CURSOR_POS, val);

sys/arch/sgimips/dev/crmfb.c

785

uint32_t val;

sys/arch/sgimips/dev/crmfb.c

788

val = (cur->cmap.red[i] << 24) |

sys/arch/sgimips/dev/crmfb.c

792

((i + cur->cmap.index) << 2), val);

sys/arch/sgimips/dev/crmfb.c

835

crmfb_write_reg(struct crmfb_softc *sc, int offset, uint32_t val)

sys/arch/sgimips/dev/crmfb.c

838

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);

sys/arch/sgimips/dev/dpclock.c

94

writereg(struct dpclock_softc *sc, uint32_t reg, uint8_t val)

sys/arch/sgimips/dev/dpclock.c

97

(reg << 2) + sc->sc_offset, val);

sys/arch/sgimips/dev/zs.c

534

uint8_t val;

sys/arch/sgimips/dev/zs.c

540

val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs,

sys/arch/sgimips/dev/zs.c

543

return val;

sys/arch/sgimips/dev/zs.c

547

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/sgimips/dev/zs.c

555

(ZS_REG_CSR << 2) + 3, val);

sys/arch/sgimips/dev/zs.c

563

uint8_t val;

sys/arch/sgimips/dev/zs.c

565

val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs,

sys/arch/sgimips/dev/zs.c

568

return val;

sys/arch/sgimips/dev/zs.c

572

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/sgimips/dev/zs.c

577

(ZS_REG_CSR << 2) + 3, val);

sys/arch/sgimips/dev/zs.c

585

uint8_t val;

sys/arch/sgimips/dev/zs.c

587

val = bus_space_read_1(zsc->cs_bustag, zsc->cs_regs,

sys/arch/sgimips/dev/zs.c

590

return val;

sys/arch/sgimips/dev/zs.c

594

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/sgimips/dev/zs.c

599

(ZS_REG_DATA << 2) + 3, val);

sys/arch/sgimips/gio/light.c

187

rex_vc1_write(struct light_devconfig *dc, uint8_t val)

sys/arch/sgimips/gio/light.c

191

rex_write(dc, REX_PAGE1_SET, REX_P1REG_VC1_ADDRDATA, val);

sys/arch/sgimips/gio/light.c

192

rex_write(dc, REX_PAGE1_GO, REX_P1REG_VC1_ADDRDATA, val);

sys/arch/sgimips/gio/newport.c

250

rex3_write(struct newport_devconfig *dc, bus_size_t rexreg, uint32_t val)

sys/arch/sgimips/gio/newport.c

253

val);

sys/arch/sgimips/gio/newport.c

257

rex3_write_go(struct newport_devconfig *dc, bus_size_t rexreg, uint32_t val)

sys/arch/sgimips/gio/newport.c

259

rex3_write(dc, rexreg + REX3_REG_GO, val);

sys/arch/sgimips/gio/newport.c

297

vc2_write_ireg(struct newport_devconfig *dc, uint8_t ireg, uint16_t val)

sys/arch/sgimips/gio/newport.c

307

rex3_write(dc, REX3_REG_DCBDATA0, (ireg << 24) | (val << 8));

sys/arch/sgimips/gio/newport.c

351

vc2_write_ram(struct newport_devconfig *dc, uint16_t addr, uint16_t val)

sys/arch/sgimips/gio/newport.c

362

rex3_write(dc, REX3_REG_DCBDATA0, val << 16);

sys/arch/sgimips/gio/newport.c

393

xmap9_write(struct newport_devconfig *dc, int chip, int crs, uint8_t val)

sys/arch/sgimips/gio/newport.c

403

rex3_write(dc, REX3_REG_DCBDATA0, val << 24);

sys/arch/sgimips/gio/newport.c

439

uint32_t mode = 0, val;

sys/arch/sgimips/gio/newport.c

447

val = xmap9_read(dc, chip, XMAP9_DCBCRS_MODE_SETUP);

sys/arch/sgimips/gio/newport.c

448

mode |= (val << (i * 8));

sys/arch/sgimips/hpc/haltwo.c

121

#define haltwo_write(sc,type,off,val) \

sys/arch/sgimips/hpc/haltwo.c

122

bus_space_write_4(sc->sc_st, sc->sc_##type##_sh, off, val)

sys/arch/sgimips/hpc/haud.c

108

#define haud_write_sram_word(sc,idx,val) \

sys/arch/sgimips/hpc/haud.c

109

bus_space_write_4(sc->sc_st, sc->sc_sram_sh, idx*4, val)

sys/arch/sgimips/hpc/haud.c

111

#define haud_write_reg(sc,off,val) \

sys/arch/sgimips/hpc/haud.c

112

bus_space_write_4(sc->sc_st, sc->sc_regs_sh, off, val)

sys/arch/sgimips/hpc/if_sq.c

127

#define sq_seeq_write(sc, off, val) \

sys/arch/sgimips/hpc/if_sq.c

128

bus_space_write_1(sc->sc_regt, sc->sc_regh, (off << 2) + 3, val)

sys/arch/sgimips/hpc/if_sq.c

132

#define sq_hpc_write(sc, off, val) \

sys/arch/sgimips/hpc/if_sq.c

133

bus_space_write_4(sc->sc_hpct, sc->sc_hpch, off, val)

sys/arch/sgimips/hpc/pi1ppc.c

1004

val = r_reg(AT_DATA_REG, pi1ppc);

sys/arch/sgimips/hpc/pi1ppc.c

1007

val = r_reg(AT_STAT_REG, pi1ppc);

sys/arch/sgimips/hpc/pi1ppc.c

1010

val = r_reg(AT_CTL_REG, pi1ppc);

sys/arch/sgimips/hpc/pi1ppc.c

1031

return val;

sys/arch/sgimips/hpc/pi1ppc.c

1036

pi1ppc_read_ivar(device_t dev, int index, unsigned int *val)

sys/arch/sgimips/hpc/pi1ppc.c

1045

*val = ((pi1ppc->sc_use & PI1PPC_USE_INTR) != 0);

sys/arch/sgimips/hpc/pi1ppc.c

1049

*val = ((pi1ppc->sc_use & PI1PPC_USE_DMA) != 0);

sys/arch/sgimips/hpc/pi1ppc.c

1062

pi1ppc_write_ivar(device_t dev, int index, unsigned int *val)

sys/arch/sgimips/hpc/pi1ppc.c

1071

if (*val == 0)

sys/arch/sgimips/hpc/pi1ppc.c

1080

if (*val == 0)

sys/arch/sgimips/hpc/pi1ppc.c

1339

int val;

sys/arch/sgimips/hpc/pi1ppc.c

1340

val = bus_space_read_4((pi1ppc)->sc_iot, (pi1ppc)->sc_ioh, IOC_PLP_INTMASK);

sys/arch/sgimips/hpc/pi1ppc.c

1344

val = ~val;

sys/arch/sgimips/hpc/pi1ppc.c

1346

return (val & 0xfc);

sys/arch/sgimips/hpc/pi1ppc.c

1353

int val;

sys/arch/sgimips/hpc/pi1ppc.c

1354

val = bus_space_read_4((pi1ppc)->sc_iot, (pi1ppc)->sc_ioh, IOC_PLP_INTSTAT);

sys/arch/sgimips/hpc/pi1ppc.c

1357

return (val & 0xfc);

sys/arch/sgimips/hpc/pi1ppc.c

684

int val = 0;

sys/arch/sgimips/hpc/pi1ppc.c

688

val = bus_space_read_4((pi1ppc)->sc_iot,

sys/arch/sgimips/hpc/pi1ppc.c

690

val &= 0xff;

sys/arch/sgimips/hpc/pi1ppc.c

693

val ^= 0x80;

sys/arch/sgimips/hpc/pi1ppc.c

696

val &= 0xf8;

sys/arch/sgimips/hpc/pi1ppc.c

698

return val;

sys/arch/sgimips/hpc/pi1ppc.c

703

val = bus_space_read_4((pi1ppc)->sc_iot,

sys/arch/sgimips/hpc/pi1ppc.c

705

val &= 0xff;

sys/arch/sgimips/hpc/pi1ppc.c

708

val = ((val >> 1) & 0x20) | (val & 0x0f);

sys/arch/sgimips/hpc/pi1ppc.c

711

val ^= 0x0b;

sys/arch/sgimips/hpc/pi1ppc.c

714

val |= (ctl_reg_int_en & 0x10);

sys/arch/sgimips/hpc/pi1ppc.c

716

return val;

sys/arch/sgimips/hpc/pi1ppc.c

720

val = bus_space_read_4((pi1ppc)->sc_iot,

sys/arch/sgimips/hpc/pi1ppc.c

722

val &= 0xff;

sys/arch/sgimips/hpc/pi1ppc.c

724

return val;

sys/arch/sgimips/hpc/pi1ppc.c

998

uint8_t val = 0;

sys/arch/sgimips/ioc/if_le_oioc.c

118

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/sgimips/ioc/if_le_oioc.c

122

bus_space_write_2(lesc->sc_st, lesc->sc_rdph, 0, val);

sys/arch/sgimips/mace/if_mec.c

746

mec_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/arch/sgimips/mace/if_mec.c

770

*val = data & MEC_PHY_DATA_VALUE;

sys/arch/sgimips/mace/if_mec.c

778

mec_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/arch/sgimips/mace/if_mec.c

786

printf("timed out writing %x: %hx\n", reg, val);

sys/arch/sgimips/mace/if_mec.c

795

bus_space_write_8(st, sh, MEC_PHY_DATA, val & MEC_PHY_DATA_VALUE);

sys/arch/sgimips/mace/macekbc.c

179

uint64_t stat, val;

sys/arch/sgimips/mace/macekbc.c

194

val = bus_space_read_8(iot, ioh, MACEKBC_RX);

sys/arch/sgimips/mace/macekbc.c

195

pckbportintr(t->t_pt, slot, val & 0xff);

sys/arch/sgimips/mace/macekbc.c

208

uint64_t val;

sys/arch/sgimips/mace/macekbc.c

213

val = bus_space_read_8(iot, ioh, MACEKBC_CTRL);

sys/arch/sgimips/mace/macekbc.c

214

val |= MACEKBC_CTRL_TXCLKOFF | MACEKBC_CTRL_RESET;

sys/arch/sgimips/mace/macekbc.c

215

bus_space_write_8(iot, ioh, MACEKBC_CTRL, val);

sys/arch/sgimips/mace/macekbc.c

219

val &= ~(MACEKBC_CTRL_TXCLKOFF | MACEKBC_CTRL_RESET);

sys/arch/sgimips/mace/macekbc.c

220

val |= MACEKBC_CTRL_TXON | MACEKBC_CTRL_RXCLKON | MACEKBC_CTRL_RXINTEN;

sys/arch/sgimips/mace/macekbc.c

221

bus_space_write_8(iot, ioh, MACEKBC_CTRL, val);

sys/arch/sgimips/mace/macekbc.c

232

uint64_t val, tmp;

sys/arch/sgimips/mace/macekbc.c

237

val = (set ? mask : 0);

sys/arch/sgimips/mace/macekbc.c

242

if ((tmp & mask) == val)

sys/arch/sgimips/mace/macekbc.c

327

uint64_t val;

sys/arch/sgimips/mace/macekbc.c

333

val = bus_space_read_8(iot, ioh, MACEKBC_CTRL);

sys/arch/sgimips/mace/macekbc.c

335

val |= MACEKBC_CTRL_TXON | MACEKBC_CTRL_RXCLKON;

sys/arch/sgimips/mace/macekbc.c

337

val &= ~(MACEKBC_CTRL_TXON | MACEKBC_CTRL_RXCLKON);

sys/arch/sgimips/mace/macekbc.c

338

bus_space_write_8(iot, ioh, MACEKBC_CTRL, val);

sys/arch/sgimips/mace/macekbc.c

359

uint64_t val;

sys/arch/sgimips/mace/macekbc.c

365

val = bus_space_read_8(iot, ioh, MACEKBC_CTRL);

sys/arch/sgimips/mace/macekbc.c

367

val &= ~MACEKBC_CTRL_RXINTEN;

sys/arch/sgimips/mace/macekbc.c

369

val |= MACEKBC_CTRL_RXINTEN;

sys/arch/sgimips/mace/macekbc.c

370

bus_space_write_8(iot, ioh, MACEKBC_CTRL, val);

sys/arch/sgimips/stand/common/iris_scsi.c

140

uint8_t val;

sys/arch/sgimips/stand/common/iris_scsi.c

146

GET_SBIC_asr(sc, val);

sys/arch/sgimips/stand/common/iris_scsi.c

148

while ((val & until) == 0) {

sys/arch/sgimips/stand/common/iris_scsi.c

150

return val;

sys/arch/sgimips/stand/common/iris_scsi.c

154

GET_SBIC_asr(sc, val);

sys/arch/sgimips/stand/common/iris_scsi.c

156

return val;

sys/arch/sgimips/stand/common/iris_scsireg.h

199

#define SBIC_TIMEOUT(val,clk) ((((val) * (clk)) / 800) + 1)

sys/arch/sgimips/stand/common/iris_scsireg.h

398

#define wd33c93_read_reg(sc, regno, val) \

sys/arch/sgimips/stand/common/iris_scsireg.h

401

(val) = *(volatile uint8_t *)(sc)->sc_data_regh; \

sys/arch/sgimips/stand/common/iris_scsireg.h

404

#define wd33c93_write_reg(sc, regno, val) \

sys/arch/sgimips/stand/common/iris_scsireg.h

407

*(volatile uint8_t *)(sc)->sc_data_regh = (val); \

sys/arch/sgimips/stand/common/iris_scsireg.h

410

#define SET_SBIC_myid(sc,val) wd33c93_write_reg(sc,SBIC_myid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

411

#define GET_SBIC_myid(sc,val) wd33c93_read_reg(sc,SBIC_myid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

412

#define SET_SBIC_cdbsize(sc,val) wd33c93_write_reg(sc,SBIC_cdbsize,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

413

#define GET_SBIC_cdbsize(sc,val) wd33c93_read_reg(sc,SBIC_cdbsize,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

414

#define SET_SBIC_control(sc,val) wd33c93_write_reg(sc,SBIC_control,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

415

#define GET_SBIC_control(sc,val) wd33c93_read_reg(sc,SBIC_control,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

416

#define SET_SBIC_timeo(sc,val) wd33c93_write_reg(sc,SBIC_timeo,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

417

#define GET_SBIC_timeo(sc,val) wd33c93_read_reg(sc,SBIC_timeo,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

418

#define SET_SBIC_cdb1(sc,val) wd33c93_write_reg(sc,SBIC_cdb1,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

419

#define GET_SBIC_cdb1(sc,val) wd33c93_read_reg(sc,SBIC_cdb1,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

420

#define SET_SBIC_cdb2(sc,val) wd33c93_write_reg(sc,SBIC_cdb2,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

421

#define GET_SBIC_cdb2(sc,val) wd33c93_read_reg(sc,SBIC_cdb2,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

422

#define SET_SBIC_cdb3(sc,val) wd33c93_write_reg(sc,SBIC_cdb3,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

423

#define GET_SBIC_cdb3(sc,val) wd33c93_read_reg(sc,SBIC_cdb3,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

424

#define SET_SBIC_cdb4(sc,val) wd33c93_write_reg(sc,SBIC_cdb4,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

425

#define GET_SBIC_cdb4(sc,val) wd33c93_read_reg(sc,SBIC_cdb4,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

426

#define SET_SBIC_cdb5(sc,val) wd33c93_write_reg(sc,SBIC_cdb5,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

427

#define GET_SBIC_cdb5(sc,val) wd33c93_read_reg(sc,SBIC_cdb5,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

428

#define SET_SBIC_cdb6(sc,val) wd33c93_write_reg(sc,SBIC_cdb6,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

429

#define GET_SBIC_cdb6(sc,val) wd33c93_read_reg(sc,SBIC_cdb6,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

430

#define SET_SBIC_cdb7(sc,val) wd33c93_write_reg(sc,SBIC_cdb7,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

431

#define GET_SBIC_cdb7(sc,val) wd33c93_read_reg(sc,SBIC_cdb7,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

432

#define SET_SBIC_cdb8(sc,val) wd33c93_write_reg(sc,SBIC_cdb8,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

433

#define GET_SBIC_cdb8(sc,val) wd33c93_read_reg(sc,SBIC_cdb8,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

434

#define SET_SBIC_cdb9(sc,val) wd33c93_write_reg(sc,SBIC_cdb9,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

435

#define GET_SBIC_cdb9(sc,val) wd33c93_read_reg(sc,SBIC_cdb9,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

436

#define SET_SBIC_cdb10(sc,val) wd33c93_write_reg(sc,SBIC_cdb10,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

437

#define GET_SBIC_cdb10(sc,val) wd33c93_read_reg(sc,SBIC_cdb10,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

438

#define SET_SBIC_cdb11(sc,val) wd33c93_write_reg(sc,SBIC_cdb11,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

439

#define GET_SBIC_cdb11(sc,val) wd33c93_read_reg(sc,SBIC_cdb11,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

440

#define SET_SBIC_cdb12(sc,val) wd33c93_write_reg(sc,SBIC_cdb12,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

441

#define GET_SBIC_cdb12(sc,val) wd33c93_read_reg(sc,SBIC_cdb12,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

442

#define SET_SBIC_tlun(sc,val) wd33c93_write_reg(sc,SBIC_tlun,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

443

#define GET_SBIC_tlun(sc,val) wd33c93_read_reg(sc,SBIC_tlun,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

444

#define SET_SBIC_cmd_phase(sc,val) wd33c93_write_reg(sc,SBIC_cmd_phase,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

445

#define GET_SBIC_cmd_phase(sc,val) wd33c93_read_reg(sc,SBIC_cmd_phase,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

446

#define SET_SBIC_syn(sc,val) wd33c93_write_reg(sc,SBIC_syn,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

447

#define GET_SBIC_syn(sc,val) wd33c93_read_reg(sc,SBIC_syn,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

448

#define SET_SBIC_count_hi(sc,val) wd33c93_write_reg(sc,SBIC_count_hi,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

449

#define GET_SBIC_count_hi(sc,val) wd33c93_read_reg(sc,SBIC_count_hi,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

450

#define SET_SBIC_count_med(sc,val) wd33c93_write_reg(sc,SBIC_count_med,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

451

#define GET_SBIC_count_med(sc,val) wd33c93_read_reg(sc,SBIC_count_med,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

452

#define SET_SBIC_count_lo(sc,val) wd33c93_write_reg(sc,SBIC_count_lo,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

453

#define GET_SBIC_count_lo(sc,val) wd33c93_read_reg(sc,SBIC_count_lo,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

454

#define SET_SBIC_selid(sc,val) wd33c93_write_reg(sc,SBIC_selid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

455

#define GET_SBIC_selid(sc,val) wd33c93_read_reg(sc,SBIC_selid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

456

#define SET_SBIC_rselid(sc,val) wd33c93_write_reg(sc,SBIC_rselid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

457

#define GET_SBIC_rselid(sc,val) wd33c93_read_reg(sc,SBIC_rselid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

458

#define SET_SBIC_csr(sc,val) wd33c93_write_reg(sc,SBIC_csr,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

459

#define GET_SBIC_csr(sc,val) wd33c93_read_reg(sc,SBIC_csr,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

460

#define SET_SBIC_cmd(sc,val) wd33c93_write_reg(sc,SBIC_cmd,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

461

#define GET_SBIC_cmd(sc,val) wd33c93_read_reg(sc,SBIC_cmd,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

462

#define SET_SBIC_data(sc,val) wd33c93_write_reg(sc,SBIC_data,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

463

#define GET_SBIC_data(sc,val) wd33c93_read_reg(sc,SBIC_data,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

464

#define SET_SBIC_queue_tag(sc,val) wd33c93_write_reg(sc,SBIC_queue_tag,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

465

#define GET_SBIC_queue_tag(sc,val) wd33c93_read_reg(sc,SBIC_queue_tag,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

467

#define SBIC_TC_PUT(sc, val) \

sys/arch/sgimips/stand/common/iris_scsireg.h

469

wd33c93_write_reg(sc, SBIC_count_hi, ((val) >> 16)); \

sys/arch/sgimips/stand/common/iris_scsireg.h

470

*(volatile uint8_t *)(sc)->sc_data_regh = (val) >> 8; \

sys/arch/sgimips/stand/common/iris_scsireg.h

471

*(volatile uint8_t *)(sc)->sc_data_regh = (val); \

sys/arch/sgimips/stand/common/iris_scsireg.h

474

#define GET_SBIC_asr(sc, val) \

sys/arch/sgimips/stand/common/iris_scsireg.h

476

(val) = *(volatile uint8_t *)(sc)->sc_asr_regh; \

sys/arch/sgimips/stand/common/iris_zs.c

103

zs_write(dev, val);

sys/arch/sgimips/stand/common/iris_zs.c

90

zs_write(void *dev, uint8_t val)

sys/arch/sgimips/stand/common/iris_zs.c

94

zc->zc_csr = val;

sys/arch/sgimips/stand/common/iris_zs.c

99

zs_write_reg(void *dev, uint8_t reg, uint8_t val)

sys/arch/sh3/dev/shpcicvar.h

142

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

144

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

146

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

148

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

150

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

152

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

156

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

158

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

160

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

162

bus_size_t offset, uint8_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

164

bus_size_t offset, uint16_t val, bus_size_t count);

sys/arch/sh3/dev/shpcicvar.h

166

bus_size_t offset, uint32_t val, bus_size_t count);

sys/arch/sh3/include/types.h

43

int val[9];

sys/arch/sh3/sh3/db_trace.c

328

int val;

sys/arch/sh3/sh3/db_trace.c

331

db_read_bytes(addr, sizeof(val), (char *)&val);

sys/arch/sh3/sh3/db_trace.c

332

if ((val & 0x00008000) == 0)

sys/arch/sh3/sh3/db_trace.c

333

val &= 0x0000ffff;

sys/arch/sh3/sh3/db_trace.c

335

val |= 0xffff0000;

sys/arch/sh3/sh3/db_trace.c

336

depth += (val / 4);

sys/arch/sh3/sh3/sh3_bus_space.c

405

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

409

bus_space_write_1(tag, bsh, offset, val);

sys/arch/sh3/sh3/sh3_bus_space.c

414

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

418

bus_space_write_2(tag, bsh, offset, val);

sys/arch/sh3/sh3/sh3_bus_space.c

423

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

427

bus_space_write_4(tag, bsh, offset, val);

sys/arch/sh3/sh3/sh3_bus_space.c

440

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

445

*addr++ = val;

sys/arch/sh3/sh3/sh3_bus_space.c

450

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

454

val = bswap16(val);

sys/arch/sh3/sh3/sh3_bus_space.c

456

*addr++ = val;

sys/arch/sh3/sh3/sh3_bus_space.c

461

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

465

val = bswap32(val);

sys/arch/sh3/sh3/sh3_bus_space.c

467

*addr++ = val;

sys/arch/sh3/sh3/sh3_bus_space.c

480

bus_size_t offset, uint8_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

485

*addr++ = val;

sys/arch/sh3/sh3/sh3_bus_space.c

490

bus_size_t offset, uint16_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

495

*addr++ = val;

sys/arch/sh3/sh3/sh3_bus_space.c

500

bus_size_t offset, uint32_t val, bus_size_t count)

sys/arch/sh3/sh3/sh3_bus_space.c

505

*addr++ = val;

sys/arch/shark/ofw/vlpci.c

110

regwrite_1(struct vlpci_softc * const sc, uint8_t off, uint8_t val)

sys/arch/shark/ofw/vlpci.c

117

val);

sys/arch/shark/ofw/vlpci.c

181

uint8_t val;

sys/arch/shark/ofw/vlpci.c

184

val = regread_1(sc, VLPCI_INT_CTL_REG(int_ctl[i]));

sys/arch/shark/ofw/vlpci.c

185

val &= ~VLPCI_INT_CTL_INT2IRQ(int_ctl[i]);

sys/arch/shark/ofw/vlpci.c

186

val |= VLPCI_INT_CTL_ENA(int_ctl[i]);

sys/arch/shark/ofw/vlpci.c

187

val |= __SHIFTIN(VLPCI_INT_CTL_IRQ(VLPCI_IRQ),

sys/arch/shark/ofw/vlpci.c

189

regwrite_1(sc, VLPCI_INT_CTL_REG(int_ctl[i]), val);

sys/arch/shark/ofw/vlpci.c

394

vlpci_pc_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)

sys/arch/shark/ofw/vlpci.c

405

__func__, (unsigned int)tag, offset, val);

sys/arch/shark/ofw/vlpci.c

412

VLPCI_CFGREG_DATA_OFF, val);

sys/arch/shark/shark/shark_iic.c

251

sharkiic_write_byte(void *cookie, uint8_t val, int flags)

sys/arch/shark/shark/shark_iic.c

253

return (i2c_bitbang_write_byte(cookie, val, flags, &sharkiicbb_ops));

sys/arch/sparc/dev/apc.c

101

uint8_t val;

sys/arch/sparc/dev/apc.c

104

val = bus_space_read_1(apc->sc_bt, apc->sc_bh, APC_IDLE_REG);

sys/arch/sparc/dev/apc.c

106

val | APC_IDLE_REG_IDLE);

sys/arch/sparc/dev/audioamd.c

263

audioamd_codec_dwrite(struct am7930_softc *amsc, int reg, uint8_t val)

sys/arch/sparc/dev/audioamd.c

267

bus_space_write_1(sc->sc_bt, sc->sc_bh, reg, val);

sys/arch/sparc/dev/cgfourteen.c

1244

uint32_t val;

sys/arch/sparc/dev/cgfourteen.c

1251

val = (cur->cmap.red[i] ) |

sys/arch/sparc/dev/cgfourteen.c

1256

val);

sys/arch/sparc/dev/if_le_obio.c

90

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/sparc/dev/if_le_obio.c

97

bus_space_write_2(t, h, LEREG1_RDP, val);

sys/arch/sparc/dev/sxvar.h

46

sx_write(struct sx_softc *sc, int addr, uint32_t val)

sys/arch/sparc/dev/sxvar.h

48

bus_space_write_4(sc->sc_tag, sc->sc_regh, addr, val);

sys/arch/sparc/dev/zs.c

733

uint8_t val;

sys/arch/sparc/dev/zs.c

737

val = *cs->cs_reg_csr;

sys/arch/sparc/dev/zs.c

739

return (val);

sys/arch/sparc/dev/zs.c

743

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/sparc/dev/zs.c

748

*cs->cs_reg_csr = val;

sys/arch/sparc/dev/zs.c

755

uint8_t val;

sys/arch/sparc/dev/zs.c

757

val = *cs->cs_reg_csr;

sys/arch/sparc/dev/zs.c

759

return (val);

sys/arch/sparc/dev/zs.c

763

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/sparc/dev/zs.c

766

*cs->cs_reg_csr = val;

sys/arch/sparc/dev/zs.c

773

uint8_t val;

sys/arch/sparc/dev/zs.c

775

val = *cs->cs_reg_data;

sys/arch/sparc/dev/zs.c

777

return (val);

sys/arch/sparc/dev/zs.c

781

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/sparc/dev/zs.c

784

*cs->cs_reg_data = val;

sys/arch/sparc/include/autoconf.h

167

int val[3]; /* up to three optional values */

sys/arch/sparc/include/types.h

80

register64_t val[2];

sys/arch/sparc/include/types.h

82

register_t val[3];

sys/arch/sparc/include/z8530var.h

78

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/sparc/include/z8530var.h

79

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/sparc/include/z8530var.h

80

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/sparc/sparc/asm.h

117

#define swap(loc, val) ({ \

sys/arch/sparc/sparc/asm.h

118

__asm volatile("swap [%2],%0" : "=&r" (val) : "0" (val), "r" (loc)); \

sys/arch/sparc/sparc/autoconf.c

1036

booted_partition = bp->val[2];

sys/arch/sparc/sparc/autoconf.c

1673

bp->val[0], bp->val[1], (int)BUS_ADDR_IOSPACE(ma->ma_paddr),

sys/arch/sparc/sparc/autoconf.c

1675

if ((u_long)bp->val[0] == BUS_ADDR_IOSPACE(ma->ma_paddr) &&

sys/arch/sparc/sparc/autoconf.c

1676

(bus_addr_t)(u_long)bp->val[1] ==

sys/arch/sparc/sparc/autoconf.c

1684

bp->val[0], bp->val[1], sa->sa_slot, sa->sa_offset));

sys/arch/sparc/sparc/autoconf.c

1685

if ((uint32_t)bp->val[0] == sa->sa_slot &&

sys/arch/sparc/sparc/autoconf.c

1686

(uint32_t)bp->val[1] == sa->sa_offset)

sys/arch/sparc/sparc/autoconf.c

1693

bp->val[0], bp->val[1], iom->iom_reg[0].oa_space,

sys/arch/sparc/sparc/autoconf.c

1695

if ((uint32_t)bp->val[0] == iom->iom_reg[0].oa_space &&

sys/arch/sparc/sparc/autoconf.c

1696

(uint32_t)bp->val[1] == iom->iom_reg[0].oa_base)

sys/arch/sparc/sparc/autoconf.c

1710

bp->val[0], aap->driveno));

sys/arch/sparc/sparc/autoconf.c

1711

if (aap->driveno == bp->val[0])

sys/arch/sparc/sparc/autoconf.c

1720

bp->val[0], bp->val[1], pba->pba_bus, MSIIEP_PCIC_PA));

sys/arch/sparc/sparc/autoconf.c

1721

if ((int)bp->val[0] == pba->pba_bus

sys/arch/sparc/sparc/autoconf.c

1722

&& (bus_addr_t)bp->val[1] == MSIIEP_PCIC_PA)

sys/arch/sparc/sparc/autoconf.c

1729

bp->val[0], bp->val[1], pa->pa_device, pa->pa_function));

sys/arch/sparc/sparc/autoconf.c

1730

if ((u_int)bp->val[0] == pa->pa_device

sys/arch/sparc/sparc/autoconf.c

1731

&& (u_int)bp->val[1] == pa->pa_function)

sys/arch/sparc/sparc/autoconf.c

1738

if (bp->val[0] == -1 && bp->val[1] == device_unit(dev))

sys/arch/sparc/sparc/autoconf.c

1848

u_int target = bp->val[0];

sys/arch/sparc/sparc/autoconf.c

1849

u_int lun = bp->val[1];

sys/arch/sparc/sparc/autoconf.c

570

bootpath[0].val[0] = 0;

sys/arch/sparc/sparc/autoconf.c

571

bootpath[0].val[1] = 0x10000000;

sys/arch/sparc/sparc/autoconf.c

572

bootpath[0].val[2] = 0;

sys/arch/sparc/sparc/autoconf.c

578

bootpath[1].val[0] = 0;

sys/arch/sparc/sparc/autoconf.c

579

bootpath[1].val[1] = 0x10001000;

sys/arch/sparc/sparc/autoconf.c

580

bootpath[1].val[2] = 0;

sys/arch/sparc/sparc/autoconf.c

589

cp = str2hex(++cp, &bp->val[0]);

sys/arch/sparc/sparc/autoconf.c

591

cp = str2hex(++cp, &bp->val[1]);

sys/arch/sparc/sparc/autoconf.c

596

bp->val[2] = *++cp - 'a';

sys/arch/sparc/sparc/autoconf.c

601

bp->val[0] = -1; /* no #'s: assume unit 0, no

sys/arch/sparc/sparc/autoconf.c

659

(BP)->val[0] = (V0); \

sys/arch/sparc/sparc/autoconf.c

660

(BP)->val[1] = (V1); \

sys/arch/sparc/sparc/autoconf.c

661

(BP)->val[2] = (V2); \

sys/arch/sparc/sparc/autoconf.c

840

if (bp->val[0] == -1)

sys/arch/sparc/sparc/autoconf.c

841

printf("/%s%x", bp->name, bp->val[1]);

sys/arch/sparc/sparc/autoconf.c

843

printf("/%s@%x,%x", bp->name, bp->val[0], bp->val[1]);

sys/arch/sparc/sparc/autoconf.c

844

if (bp->val[2] != 0)

sys/arch/sparc/sparc/autoconf.c

845

printf(":%c", bp->val[2] + 'a');

sys/arch/sparc/sparc/db_disasm.c

1002

val = SIGNEX(insn, 11);

sys/arch/sparc/sparc/db_disasm.c

1003

db_printf("%s0x%x", SIGN(val), abs((int)val));

sys/arch/sparc/sparc/db_disasm.c

1006

val = (((insn>>20)&0x3)<<13)|(insn & 0x1fff);

sys/arch/sparc/sparc/db_disasm.c

1007

val = SIGNEX(val, 16);

sys/arch/sparc/sparc/db_disasm.c

1008

db_printsym((db_addr_t)(loc + (4 * val)),

sys/arch/sparc/sparc/db_disasm.c

1042

val = SIGNEX(insn, 13);

sys/arch/sparc/sparc/db_disasm.c

1045

(int)((val<0)?'-':'+'),

sys/arch/sparc/sparc/db_disasm.c

1046

abs((int)val));

sys/arch/sparc/sparc/db_disasm.c

976

int64_t val;

sys/arch/sparc/sparc/db_disasm.c

997

val = SIGNEX(insn, 13);

sys/arch/sparc/sparc/db_disasm.c

998

db_printf("%s0x%x", SIGN(val), abs((int)val));

sys/arch/sparc/sparc/db_machdep.c

102

db_sparc_regop(const struct db_variable *vp, db_expr_t *val, int opcode)

sys/arch/sparc/sparc/db_machdep.c

109

*val = *regaddr;

sys/arch/sparc/sparc/db_machdep.c

112

*regaddr = *val;

sys/arch/sparc/sparc/db_trace.c

59

u_int val;

sys/arch/sparc/sparc/db_trace.c

61

if (ufetch_int(uaddr, &val) != 0)

sys/arch/sparc/sparc/db_trace.c

62

val = (u_int)-1;

sys/arch/sparc/sparc/db_trace.c

63

return val;

sys/arch/sparc/sparc/emul.c

101

*(int32_t *) val = FPR(l, i);

sys/arch/sparc/sparc/emul.c

107

writefpreg(struct lwp *l, int i, const void *val)

sys/arch/sparc/sparc/emul.c

110

FPRSET(l, i, *(const int32_t *) val);

sys/arch/sparc/sparc/emul.c

115

decodeaddr(struct trapframe *tf, union instr *code, void *val)

sys/arch/sparc/sparc/emul.c

119

*((int32_t *) val) = code->i_simm13.i_simm13;

sys/arch/sparc/sparc/emul.c

125

if ((error = readgpreg(tf, code->i_asi.i_rs2, val)) != 0)

sys/arch/sparc/sparc/emul.c

67

readgpreg(struct trapframe *tf, int i, void *val)

sys/arch/sparc/sparc/emul.c

71

*(int32_t *) val = 0;

sys/arch/sparc/sparc/emul.c

73

*(int32_t *) val = GPR(tf, i);

sys/arch/sparc/sparc/emul.c

75

error = copyin(&IPR(tf, i), val, sizeof(int32_t));

sys/arch/sparc/sparc/emul.c

82

writegpreg(struct trapframe *tf, int i, const void *val)

sys/arch/sparc/sparc/emul.c

89

GPR(tf, i) = *(const int32_t *) val;

sys/arch/sparc/sparc/emul.c

91

error = copyout(val, &IPR(tf, i), sizeof(int32_t));

sys/arch/sparc/sparc/emul.c

98

readfpreg(struct lwp *l, int i, void *val)

sys/arch/sparc/sparc/msiiep.c

588

uint16_t val = *(volatile uint16_t *)(handle + offset);

sys/arch/sparc/sparc/msiiep.c

590

return le16toh(val);

sys/arch/sparc/sparc/msiiep.c

598

uint32_t val = *(volatile uint32_t *)(handle + offset);

sys/arch/sparc/sparc/msiiep.c

600

return le32toh(val);

sys/arch/sparc/sparc/msiiep.c

608

uint64_t val = *(volatile uint64_t *)(handle + offset);

sys/arch/sparc/sparc/msiiep.c

610

return le64toh(val);

sys/arch/sparc/sparc/msiiepreg.h

251

#define mspcic_write_1(reg, val) \

sys/arch/sparc/sparc/msiiepreg.h

252

(((volatile struct msiiep_pcic_reg *)MSIIEP_PCIC_VA)->reg) = (val)

sys/arch/sparc/sparc/msiiepreg.h

253

#define mspcic_write_2(reg, val) \

sys/arch/sparc/sparc/msiiepreg.h

254

(((volatile struct msiiep_pcic_reg *)MSIIEP_PCIC_VA)->reg) = (htole16(val))

sys/arch/sparc/sparc/msiiepreg.h

255

#define mspcic_write_4(reg, val) \

sys/arch/sparc/sparc/msiiepreg.h

256

(((volatile struct msiiep_pcic_reg *)MSIIEP_PCIC_VA)->reg) = (htole32(val))

sys/arch/sparc/sparc/msiiepreg.h

258

#define mspcic_write_stream_1(reg, val) \

sys/arch/sparc/sparc/msiiepreg.h

259

(((volatile struct msiiep_pcic_reg *)MSIIEP_PCIC_VA)->reg) = (val)

sys/arch/sparc/sparc/msiiepreg.h

260

#define mspcic_write_stream_2(reg, val) \

sys/arch/sparc/sparc/msiiepreg.h

261

(((volatile struct msiiep_pcic_reg *)MSIIEP_PCIC_VA)->reg) = (val)

sys/arch/sparc/sparc/msiiepreg.h

262

#define mspcic_write_stream_4(reg, val) \

sys/arch/sparc/sparc/msiiepreg.h

263

(((volatile struct msiiep_pcic_reg *)MSIIEP_PCIC_VA)->reg) = (val)

sys/arch/sparc/sparc/pci_fixup.c

155

val = pci_conf_read(NULL, tag, PCI_BHLC_REG);

sys/arch/sparc/sparc/pci_fixup.c

156

if (PCI_HDRTYPE_TYPE(val)) /* Type 0x00 has BAR's */

sys/arch/sparc/sparc/pci_fixup.c

168

val = pci_conf_read(NULL, tag, PCI_BAR(i));

sys/arch/sparc/sparc/pci_fixup.c

170

if (!val)

sys/arch/sparc/sparc/pci_fixup.c

175

PCI_BAR(i), saved, val);

sys/arch/sparc/sparc/pci_fixup.c

179

if (PCI_MAPREG_TYPE(val) == PCI_MAPREG_TYPE_IO) {

sys/arch/sparc/sparc/pci_fixup.c

180

saved = saved + PCI_MAPREG_IO_SIZE(val);

sys/arch/sparc/sparc/pci_fixup.c

186

saved = saved + PCI_MAPREG_MEM_SIZE(val);

sys/arch/sparc/sparc/pci_fixup.c

197

val = pci_conf_read(NULL, tag, PCI_MAPREG_ROM);

sys/arch/sparc/sparc/pci_fixup.c

199

if (val) {

sys/arch/sparc/sparc/pci_fixup.c

201

printf("> ROM: start %08x mask %08x\n", saved, val);

sys/arch/sparc/sparc/pci_fixup.c

203

saved = saved + PCI_MAPREG_MEM_SIZE(val);

sys/arch/sparc/sparc/pci_fixup.c

302

pcireg_t val, size, start;

sys/arch/sparc/sparc/pci_fixup.c

337

val = pci_conf_read(NULL, tag, PCI_ID_REG);

sys/arch/sparc/sparc/pci_fixup.c

338

if (PCI_VENDOR(val) == PCI_VENDOR_INVALID) {

sys/arch/sparc/sparc/pci_fixup.c

343

printf("> Found %04x:%04x at (%d %d %d)\n", PCI_VENDOR(val),

sys/arch/sparc/sparc/pci_fixup.c

344

PCI_PRODUCT(val), startbus, i / 8, i % 8);

sys/arch/sparc/sparc/pci_fixup.c

348

val = pci_conf_read(NULL, tag, PCI_INTERRUPT_REG);

sys/arch/sparc/sparc/pci_fixup.c

349

if (PCI_INTERRUPT_PIN(val)) {

sys/arch/sparc/sparc/pci_fixup.c

350

val = (val & ~(PCI_INTERRUPT_LINE_MASK <<

sys/arch/sparc/sparc/pci_fixup.c

352

pci_conf_write(NULL, tag, PCI_INTERRUPT_REG, val);

sys/arch/sparc/sparc/pci_fixup.c

356

val = pci_conf_read(NULL, tag, PCI_CLASS_REG);

sys/arch/sparc/sparc/pci_fixup.c

357

if (IS_PCI_BRIDGE(val)) {

sys/arch/sparc/sparc/pci_fixup.c

366

val = pci_conf_read(NULL, tag, PCI_MAPREG_ROM);

sys/arch/sparc/sparc/pci_fixup.c

367

if (val) {

sys/arch/sparc/sparc/pci_fixup.c

368

size = PCI_MAPREG_MEM_SIZE(val);

sys/arch/sparc/sparc/pci_fixup.c

369

start = RND_MEM_START(*mem, val);

sys/arch/sparc/sparc/pci_fixup.c

376

start, (*mem) - 1, val);

sys/arch/sparc/sparc/pci_fixup.c

381

val = pci_conf_read(NULL, tag, PCI_BHLC_REG);

sys/arch/sparc/sparc/pci_fixup.c

383

if (!PCI_HDRTYPE_MULTIFN(val))

sys/arch/sparc/sparc/pci_fixup.c

385

if (PCI_HDRTYPE_TYPE(val))

sys/arch/sparc/sparc/pci_fixup.c

396

val = pci_conf_read(NULL, tag, PCI_BAR(j));

sys/arch/sparc/sparc/pci_fixup.c

397

if (!val)

sys/arch/sparc/sparc/pci_fixup.c

399

if (PCI_MAPREG_TYPE(val) ==

sys/arch/sparc/sparc/pci_fixup.c

401

size = PCI_MAPREG_IO_SIZE(val);

sys/arch/sparc/sparc/pci_fixup.c

402

start = RND_IO_START(*io, val);

sys/arch/sparc/sparc/pci_fixup.c

410

start, (*io) - 1, val);

sys/arch/sparc/sparc/pci_fixup.c

419

size = PCI_MAPREG_MEM_SIZE(val);

sys/arch/sparc/sparc/pci_fixup.c

420

start = RND_MEM_START(*mem, val);

sys/arch/sparc/sparc/pci_fixup.c

428

start, (*mem) - 1, val);

sys/arch/sparc/sparc/pci_fixup.c

446

val = ((startio & 0xf000) >> 8) | ((*(io) - 1) & 0xf000);

sys/arch/sparc/sparc/pci_fixup.c

447

pci_conf_write(NULL, starttag, PCI_BRIDGE_STATIO_REG, val);

sys/arch/sparc/sparc/pci_fixup.c

454

val = ((startmem & 0xfff00000) >> 16) |

sys/arch/sparc/sparc/pci_fixup.c

456

pci_conf_write(NULL, starttag, PCI_BRIDGE_MEMORY_REG, val);

sys/arch/sparc/sparc/pci_fixup.c

466

val = pci_conf_read(NULL, starttag, PCI_BRIDGE_STATIO_REG);

sys/arch/sparc/sparc/pci_fixup.c

467

if ((val & 0x0101) == 0x0101) {

sys/arch/sparc/sparc/pci_fixup.c

468

val = ((startio & 0xffff0000) >> 16) |

sys/arch/sparc/sparc/pci_fixup.c

470

pci_conf_write(NULL, starttag, PCI_BRIDGE_IOHIGH_REG, val);

sys/arch/sparc/sparc/pci_fixup.c

478

val = pci_conf_read(NULL, starttag, PCI_BRIDGE_PREFETCHMEM_REG);

sys/arch/sparc/sparc/pci_fixup.c

479

if (val & 0x01) {

sys/arch/sparc/sparc/pci_fixup.c

76

pcireg_t val, saved;

sys/arch/sparc/sparc/pci_machdep.c

359

uint32_t val;

sys/arch/sparc/sparc/pci_machdep.c

385

val = le32toh(lda(mode1_data_reg_pa, ASI_BYPASS));

sys/arch/sparc/sparc/pci_machdep.c

387

DPRINTF(SPDB_CONF, ("reading %08x\n", val));

sys/arch/sparc/sparc/pci_machdep.c

389

return val;

sys/arch/sparc/sparc/pci_machdep.c

439

pcireg_t val;

sys/arch/sparc/sparc/pci_machdep.c

449

val = pci_conf_read(NULL, tag, PCI_INTERRUPT_REG);

sys/arch/sparc/sparc/pci_machdep.c

450

pin = PCI_INTERRUPT_PIN(val);

sys/arch/sparc/sparc/pci_machdep.c

489

for (j = 0; j < PCI_INTERRUPT_LINE(val); j++)

sys/arch/sparc/sparc/pci_machdep.c

502

PCI_INTERRUPT_LINE(val)));

sys/arch/sparc/stand/ofwboot/loadfile_machdep.c

49

#define hi(val) ((uint32_t)(((val) >> 32) & (uint32_t)-1))

sys/arch/sparc/stand/ofwboot/loadfile_machdep.c

50

#define lo(val) ((uint32_t)((val) & (uint32_t)-1))

sys/arch/sparc64/dev/bq4802_ebus.c

166

uint64_t val;

sys/arch/sparc64/dev/bq4802_ebus.c

175

val = bcdtobin(regs[BQ4802_HOUR]);

sys/arch/sparc64/dev/bq4802_ebus.c

176

if (val == 24)

sys/arch/sparc64/dev/bq4802_ebus.c

177

val = 0;

sys/arch/sparc64/dev/bq4802_ebus.c

178

dt->dt_hour = val;

sys/arch/sparc64/dev/bq4802_ebus.c

182

val = bcdtobin(regs[BQ4802_YEAR]);

sys/arch/sparc64/dev/bq4802_ebus.c

183

val += bcdtobin(regs[BQ4802_CENT]) * 100;

sys/arch/sparc64/dev/bq4802_ebus.c

184

dt->dt_year = val;

sys/arch/sparc64/dev/bq4802_ebus.c

194

uint8_t val;

sys/arch/sparc64/dev/bq4802_ebus.c

200

val = 24;

sys/arch/sparc64/dev/bq4802_ebus.c

202

val = dt->dt_hour;

sys/arch/sparc64/dev/bq4802_ebus.c

203

regs[BQ4802_HOUR] = bintobcd(val);

sys/arch/sparc64/dev/bq4802_ebus.c

78

#define bq4802_write(sc, reg, val) \

sys/arch/sparc64/dev/bq4802_ebus.c

79

bus_space_write_1(sc->sc_bst, sc->sc_bsh, reg, val)

sys/arch/sparc64/dev/cbus.c

289

arc = elem[idx].d.val;

sys/arch/sparc64/dev/ffb.c

1363

ffb_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/arch/sparc64/dev/ffb.c

1365

return (i2c_bitbang_write_byte(cookie, val, flags, &ffb_i2cbb_ops));

sys/arch/sparc64/dev/ffb.c

523

u_int val;

sys/arch/sparc64/dev/ffb.c

526

val = DAC_READ(sc, FFB_DAC_VALUE);

sys/arch/sparc64/dev/ffb.c

530

*data = val & 1;

sys/arch/sparc64/dev/ffb.c

535

val &= ~1;

sys/arch/sparc64/dev/ffb.c

537

val |= 1;

sys/arch/sparc64/dev/ffb.c

546

DAC_WRITE(sc, FFB_DAC_VALUE, val);

sys/arch/sparc64/dev/ffb.c

548

if ((val & 1) && sc->sc_needredraw) {

sys/arch/sparc64/dev/fire_i2c.c

225

uint8_t ctrl, val;

sys/arch/sparc64/dev/fire_i2c.c

230

val = firei2c_reg_read(sc, FIREI2C_STAT);

sys/arch/sparc64/dev/fire_i2c.c

231

if (val == FIREI2C_STAT_IDLE)

sys/arch/sparc64/dev/fire_i2c.c

299

uint8_t ctrl, val, ack, nack;

sys/arch/sparc64/dev/fire_i2c.c

320

val = firei2c_reg_read(sc, FIREI2C_STAT);

sys/arch/sparc64/dev/fire_i2c.c

321

if (val != FIREI2C_STAT_IDLE) {

sys/arch/sparc64/dev/fire_i2c.c

328

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

334

val = ctrl | FIREI2C_CTRL_STA;

sys/arch/sparc64/dev/fire_i2c.c

335

firei2c_reg_write(sc, FIREI2C_CTRL, val);

sys/arch/sparc64/dev/fire_i2c.c

337

val = firei2c_reg_read(sc, FIREI2C_STAT);

sys/arch/sparc64/dev/fire_i2c.c

340

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

343

if (val != FIREI2C_STAT_STA) {

sys/arch/sparc64/dev/fire_i2c.c

345

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

351

val = (addr & 0x7f) << FIREI2C_DATA_SHIFT;

sys/arch/sparc64/dev/fire_i2c.c

356

val |= 0x01;

sys/arch/sparc64/dev/fire_i2c.c

360

firei2c_reg_write(sc, FIREI2C_DATA, val);

sys/arch/sparc64/dev/fire_i2c.c

363

val = firei2c_reg_read(sc, FIREI2C_STAT);

sys/arch/sparc64/dev/fire_i2c.c

366

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

369

if (val != ack) {

sys/arch/sparc64/dev/fire_i2c.c

370

if (val != nack) /* Don't print for NACK */

sys/arch/sparc64/dev/fire_i2c.c

372

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

387

val = ctrl | FIREI2C_CTRL_STA;

sys/arch/sparc64/dev/fire_i2c.c

388

firei2c_reg_write(sc, FIREI2C_CTRL, val);

sys/arch/sparc64/dev/fire_i2c.c

390

val = firei2c_reg_read(sc, FIREI2C_STAT);

sys/arch/sparc64/dev/fire_i2c.c

393

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

396

if (val != FIREI2C_STAT_REPSTA) {

sys/arch/sparc64/dev/fire_i2c.c

398

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

404

val = (addr & 0x7f) << FIREI2C_DATA_SHIFT;

sys/arch/sparc64/dev/fire_i2c.c

405

val |= 0x01;

sys/arch/sparc64/dev/fire_i2c.c

408

firei2c_reg_write(sc, FIREI2C_DATA, val);

sys/arch/sparc64/dev/fire_i2c.c

411

val = firei2c_reg_read(sc, FIREI2C_STAT);

sys/arch/sparc64/dev/fire_i2c.c

414

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

417

if (val != ack) {

sys/arch/sparc64/dev/fire_i2c.c

418

if (val != nack)

sys/arch/sparc64/dev/fire_i2c.c

420

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

442

uint8_t val;

sys/arch/sparc64/dev/fire_i2c.c

448

val = cmd[i];

sys/arch/sparc64/dev/fire_i2c.c

450

val = buf[i - cmdlen];

sys/arch/sparc64/dev/fire_i2c.c

451

firei2c_reg_write(sc, FIREI2C_DATA, val);

sys/arch/sparc64/dev/fire_i2c.c

454

val = firei2c_reg_read(sc, FIREI2C_STAT);

sys/arch/sparc64/dev/fire_i2c.c

457

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

460

if (val != FIREI2C_STAT_DAT_ACK) {

sys/arch/sparc64/dev/fire_i2c.c

461

if (val != FIREI2C_STAT_DAT_NAK)

sys/arch/sparc64/dev/fire_i2c.c

463

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

475

uint8_t val, ack;

sys/arch/sparc64/dev/fire_i2c.c

481

val = ctrl | FIREI2C_CTRL_AAK;

sys/arch/sparc64/dev/fire_i2c.c

484

val = ctrl;

sys/arch/sparc64/dev/fire_i2c.c

488

firei2c_reg_write(sc, FIREI2C_CTRL, val);

sys/arch/sparc64/dev/fire_i2c.c

490

val = firei2c_reg_read(sc, FIREI2C_STAT);

sys/arch/sparc64/dev/fire_i2c.c

493

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

496

if (val != ack) {

sys/arch/sparc64/dev/fire_i2c.c

498

device_xname(sc->sc_dev), val);

sys/arch/sparc64/dev/fire_i2c.c

528

uint32_t val;

sys/arch/sparc64/dev/fire_i2c.c

531

val = bus_space_read_8(sc->sc_bustag, sc->sc_regh, reg);

sys/arch/sparc64/dev/fire_i2c.c

532

return val & 0xff;

sys/arch/sparc64/dev/fire_i2c.c

536

firei2c_reg_write(struct firei2c_softc *sc, bus_size_t reg, uint8_t val)

sys/arch/sparc64/dev/fire_i2c.c

538

bus_space_write_8(sc->sc_bustag, sc->sc_regh, reg, val);

sys/arch/sparc64/dev/jbus-i2c.c

253

jbusi2c_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/arch/sparc64/dev/jbus-i2c.c

256

return i2c_bitbang_write_byte(cookie, val, flags, &jbusi2c_i2cbb_ops);

sys/arch/sparc64/dev/lom.c

1033

uint8_t val;

sys/arch/sparc64/dev/lom.c

1040

if (lom_read(sc, LOM_IDX_ALARM, &val)) {

sys/arch/sparc64/dev/lom.c

1044

sc->sc_alarm_lastval = val;

sys/arch/sparc64/dev/lom.c

1046

val = sc->sc_alarm_lastval;

sys/arch/sparc64/dev/lom.c

1051

if ((val & LOM_ALARM_FAULT) == LOM_ALARM_FAULT)

sys/arch/sparc64/dev/lom.c

1057

if ((val & (LOM_ALARM_1 << (i - 1))) == 0)

sys/arch/sparc64/dev/lom.c

1068

uint8_t val;

sys/arch/sparc64/dev/lom.c

1077

if (lom_read(sc, LOM_IDX_FAN1 + i, &val)) {

sys/arch/sparc64/dev/lom.c

1080

edata->value_cur = (60 * sc->sc_fan_cal[i] * val) / 100;

sys/arch/sparc64/dev/lom.c

1081

if (val < sc->sc_fan_low[i])

sys/arch/sparc64/dev/lom.c

1091

uint8_t val;

sys/arch/sparc64/dev/lom.c

1100

if (lom_read(sc, LOM_IDX_PSU1 + i, &val) ||

sys/arch/sparc64/dev/lom.c

1101

!ISSET(val, LOM_PSU_PRESENT)) {

sys/arch/sparc64/dev/lom.c

1104

if (val & LOM_PSU_STANDBY) {

sys/arch/sparc64/dev/lom.c

1109

if (ISSET(val, LOM_PSU_INPUTA) &&

sys/arch/sparc64/dev/lom.c

1110

ISSET(val, LOM_PSU_INPUTB) &&

sys/arch/sparc64/dev/lom.c

1111

ISSET(val, LOM_PSU_OUTPUT))

sys/arch/sparc64/dev/lom.c

1122

uint8_t val;

sys/arch/sparc64/dev/lom.c

1131

if (lom_read(sc, LOM_IDX_TEMP1 + i, &val)) {

sys/arch/sparc64/dev/lom.c

1134

edata->value_cur = val * 1000000 + 273150000;

sys/arch/sparc64/dev/lom.c

1230

uint8_t val;

sys/arch/sparc64/dev/lom.c

1246

if (lom_read(sc, LOM_IDX_ALARM, &val))

sys/arch/sparc64/dev/lom.c

1251

val &= ~LOM_ALARM_FAULT;

sys/arch/sparc64/dev/lom.c

1253

val |= LOM_ALARM_FAULT;

sys/arch/sparc64/dev/lom.c

1257

val |= LOM_ALARM_1 << (i - 1);

sys/arch/sparc64/dev/lom.c

1259

val &= ~(LOM_ALARM_1 << (i - 1));

sys/arch/sparc64/dev/lom.c

1261

if (lom_write(sc, LOM_IDX_ALARM, val))

sys/arch/sparc64/dev/lom.c

452

lom_read(struct lom_softc *sc, uint8_t reg, uint8_t *val)

sys/arch/sparc64/dev/lom.c

455

return lom1_read(sc, reg, val);

sys/arch/sparc64/dev/lom.c

457

return lom2_read(sc, reg, val);

sys/arch/sparc64/dev/lom.c

461

lom_write(struct lom_softc *sc, uint8_t reg, uint8_t val)

sys/arch/sparc64/dev/lom.c

464

return lom1_write(sc, reg, val);

sys/arch/sparc64/dev/lom.c

466

return lom2_write(sc, reg, val);

sys/arch/sparc64/dev/lom.c

494

lom1_read(struct lom_softc *sc, uint8_t reg, uint8_t *val)

sys/arch/sparc64/dev/lom.c

500

return lom1_read_polled(sc, reg, val);

sys/arch/sparc64/dev/lom.c

510

*val = lc.lc_data;

sys/arch/sparc64/dev/lom.c

516

lom1_write(struct lom_softc *sc, uint8_t reg, uint8_t val)

sys/arch/sparc64/dev/lom.c

522

return lom1_write_polled(sc, reg, val);

sys/arch/sparc64/dev/lom.c

525

lc.lc_data = val;

sys/arch/sparc64/dev/lom.c

536

lom1_read_polled(struct lom_softc *sc, uint8_t reg, uint8_t *val)

sys/arch/sparc64/dev/lom.c

563

*val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM1_DATA);

sys/arch/sparc64/dev/lom.c

568

lom1_write_polled(struct lom_softc *sc, uint8_t reg, uint8_t val)

sys/arch/sparc64/dev/lom.c

596

bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM1_DATA, val);

sys/arch/sparc64/dev/lom.c

690

lom2_read(struct lom_softc *sc, uint8_t reg, uint8_t *val)

sys/arch/sparc64/dev/lom.c

696

return lom2_read_polled(sc, reg, val);

sys/arch/sparc64/dev/lom.c

706

*val = lc.lc_data;

sys/arch/sparc64/dev/lom.c

712

lom2_read_polled(struct lom_softc *sc, uint8_t reg, uint8_t *val)

sys/arch/sparc64/dev/lom.c

739

*val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_DATA);

sys/arch/sparc64/dev/lom.c

744

lom2_write(struct lom_softc *sc, uint8_t reg, uint8_t val)

sys/arch/sparc64/dev/lom.c

750

return lom2_write_polled(sc, reg, val);

sys/arch/sparc64/dev/lom.c

753

lc.lc_data = val;

sys/arch/sparc64/dev/lom.c

764

lom2_write_polled(struct lom_softc *sc, uint8_t reg, uint8_t val)

sys/arch/sparc64/dev/lom.c

806

bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM2_DATA, val);

sys/arch/sparc64/dev/lom.c

822

sc->sc_space = val;

sys/arch/sparc64/dev/lom.c

908

uint8_t val;

sys/arch/sparc64/dev/lom.c

927

error = lom_read(sc, k++, &val);

sys/arch/sparc64/dev/lom.c

931

if (val == 0xff)

sys/arch/sparc64/dev/lom.c

935

sc->sc_temp[i].desc[j++] = val;

sys/arch/sparc64/dev/lom.c

937

if (val == '\0') {

sys/arch/sparc64/dev/lom.c

958

error = lom_read(sc, k++, &val);

sys/arch/sparc64/dev/lom.c

962

if (val == 0xff)

sys/arch/sparc64/dev/lom.c

966

sc->sc_fan[i].desc[j++] = val;

sys/arch/sparc64/dev/lom.c

968

if (val == '\0') {

sys/arch/sparc64/dev/pcf8591_envctrl.c

439

ecadc_set_fan_speed(struct ecadc_softc *sc, u_int8_t chan, u_int8_t val)

sys/arch/sparc64/dev/pcf8591_envctrl.c

452

&ctrl, 1, &val, 1, 0);

sys/arch/sparc64/dev/pcf8591_envctrl.c

458

device_xname(sc->sc_dev), chan, val);

sys/arch/sparc64/dev/psycho.c

1386

pcireg_t val = (pcireg_t)~0;

sys/arch/sparc64/dev/psycho.c

1403

val = bus_space_read_4(sc->sc_configtag, sc->sc_configaddr,

sys/arch/sparc64/dev/psycho.c

1407

val = (pcireg_t)~0;

sys/arch/sparc64/dev/psycho.c

1415

DPRINTF(PDB_CONF, (" returning %08x\n", (u_int)val));

sys/arch/sparc64/dev/psycho.c

1417

return (val);

sys/arch/sparc64/dev/pyro.c

287

pcireg_t val = (pcireg_t)~0;

sys/arch/sparc64/dev/pyro.c

296

val = bus_space_read_4(pp->pp_cfgt, pp->pp_cfgh,

sys/arch/sparc64/dev/pyro.c

300

val = (pcireg_t)~0;

sys/arch/sparc64/dev/pyro.c

304

DPRINTF(PDB_CONF, (" returning %08x\n", (u_int)val));

sys/arch/sparc64/dev/pyro.c

305

return (val);

sys/arch/sparc64/dev/rtc.c

123

rtc_write_reg(struct mc146818_softc *sc, u_int reg, u_int val)

sys/arch/sparc64/dev/rtc.c

127

bus_space_write_1(sc->sc_bst, sc->sc_bsh, RTC_DATA, val);

sys/arch/sparc64/dev/schizo.c

530

pcireg_t val = (pcireg_t)~0;

sys/arch/sparc64/dev/schizo.c

539

val = bus_space_read_4(sp->sp_cfgt, sp->sp_cfgh,

sys/arch/sparc64/dev/schizo.c

543

val = (pcireg_t)~0;

sys/arch/sparc64/dev/schizo.c

547

DPRINTF(SDB_CONF, (" returning %08x\n", (u_int)val));

sys/arch/sparc64/dev/schizo.c

548

return (val);

sys/arch/sparc64/dev/vpci.c

346

pcireg_t val = error_flag ? (pcireg_t)~0 : data;

sys/arch/sparc64/dev/vpci.c

347

DPRINTF(VDB_CONF_READ, (" returning %08x\n", (u_int)val));

sys/arch/sparc64/dev/vpci.c

348

return val;

sys/arch/sparc64/dev/zs.c

648

u_char val;

sys/arch/sparc64/dev/zs.c

652

val = *cs->cs_reg_csr;

sys/arch/sparc64/dev/zs.c

654

return (val);

sys/arch/sparc64/dev/zs.c

658

zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)

sys/arch/sparc64/dev/zs.c

662

*cs->cs_reg_csr = val;

sys/arch/sparc64/dev/zs.c

669

u_char val;

sys/arch/sparc64/dev/zs.c

671

val = *cs->cs_reg_csr;

sys/arch/sparc64/dev/zs.c

673

return (val);

sys/arch/sparc64/dev/zs.c

677

zs_write_csr(struct zs_chanstate *cs, u_char val)

sys/arch/sparc64/dev/zs.c

679

*cs->cs_reg_csr = val;

sys/arch/sparc64/dev/zs.c

686

u_char val;

sys/arch/sparc64/dev/zs.c

688

val = *cs->cs_reg_data;

sys/arch/sparc64/dev/zs.c

690

return (val);

sys/arch/sparc64/dev/zs.c

694

zs_write_data(struct zs_chanstate *cs, u_char val)

sys/arch/sparc64/dev/zs.c

696

*cs->cs_reg_data = val;

sys/arch/sparc64/include/mdesc.h

39

uint64_t val;

sys/arch/sparc64/include/pci_machdep.h

105

#define pci_conf_write(pc, tag, reg, val) \

sys/arch/sparc64/include/pci_machdep.h

106

((pc)->spc_conf_write(pc, tag, reg, val))

sys/arch/sparc64/include/z8530var.h

92

void zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);

sys/arch/sparc64/include/z8530var.h

93

void zs_write_csr(struct zs_chanstate *cs, uint8_t val);

sys/arch/sparc64/include/z8530var.h

94

void zs_write_data(struct zs_chanstate *cs, uint8_t val);

sys/arch/sparc64/sparc64/cpu.c

164

uint64_t val = 0;

sys/arch/sparc64/sparc64/cpu.c

166

while (idx != -1 && val == 0) {

sys/arch/sparc64/sparc64/cpu.c

180

val = mdesc_get_prop_val(idx, prop);

sys/arch/sparc64/sparc64/cpu.c

183

if (val == 0)

sys/arch/sparc64/sparc64/cpu.c

186

return val;

sys/arch/sparc64/sparc64/cpu.c

220

int val;

sys/arch/sparc64/sparc64/cpu.c

221

val = cpu_cache_info_sun4v("instn", 1, "associativity");

sys/arch/sparc64/sparc64/cpu.c

222

if (val == 0)

sys/arch/sparc64/sparc64/cpu.c

223

val = 1;

sys/arch/sparc64/sparc64/cpu.c

224

return val;

sys/arch/sparc64/sparc64/cpu.c

260

int val;

sys/arch/sparc64/sparc64/cpu.c

261

val = cpu_cache_info_sun4v("data", 1, "associativity");

sys/arch/sparc64/sparc64/cpu.c

262

if (val == 0)

sys/arch/sparc64/sparc64/cpu.c

263

val = 1;

sys/arch/sparc64/sparc64/cpu.c

264

return val;

sys/arch/sparc64/sparc64/cpu.c

300

int val;

sys/arch/sparc64/sparc64/cpu.c

301

val = cpu_cache_info_sun4v(NULL, 2, "associativity");

sys/arch/sparc64/sparc64/cpu.c

302

if (val == 0)

sys/arch/sparc64/sparc64/cpu.c

303

val = 1;

sys/arch/sparc64/sparc64/cpu.c

304

return val;

sys/arch/sparc64/sparc64/db_disasm.c

1002

val = SIGNEX(insn, 13);

sys/arch/sparc64/sparc64/db_disasm.c

1003

db_printf("%s0x%x", SIGN(val), abs((int)val));

sys/arch/sparc64/sparc64/db_disasm.c

1007

val = SIGNEX(insn, 11);

sys/arch/sparc64/sparc64/db_disasm.c

1008

db_printf("%s0x%x", SIGN(val), abs((int)val));

sys/arch/sparc64/sparc64/db_disasm.c

1011

val = (((insn>>20)&0x3)<<13)|(insn & 0x1fff);

sys/arch/sparc64/sparc64/db_disasm.c

1012

val = SIGNEX(val, 16);

sys/arch/sparc64/sparc64/db_disasm.c

1013

db_printsym((db_addr_t)(loc + (4 * val)),

sys/arch/sparc64/sparc64/db_disasm.c

1047

val = SIGNEX(insn, 13);

sys/arch/sparc64/sparc64/db_disasm.c

1050

(int)((val<0)?'-':'+'),

sys/arch/sparc64/sparc64/db_disasm.c

1051

abs((int)val));

sys/arch/sparc64/sparc64/db_disasm.c

981

int64_t val;

sys/arch/sparc64/sparc64/db_machdep.c

104

*val = *regaddr;

sys/arch/sparc64/sparc64/db_machdep.c

107

*regaddr = *val;

sys/arch/sparc64/sparc64/db_machdep.c

120

db_sparc_regop(const struct db_variable *vp, db_expr_t *val, int opcode)

sys/arch/sparc64/sparc64/db_machdep.c

127

*val = *regaddr;

sys/arch/sparc64/sparc64/db_machdep.c

130

*regaddr = *val;

sys/arch/sparc64/sparc64/db_machdep.c

49

db_sparc_charop(const struct db_variable *vp, db_expr_t *val, int opcode)

sys/arch/sparc64/sparc64/db_machdep.c

56

*val = *regaddr;

sys/arch/sparc64/sparc64/db_machdep.c

59

*regaddr = *val;

sys/arch/sparc64/sparc64/db_machdep.c

73

db_sparc_shortop(const struct db_variable *vp, db_expr_t *val, int opcode)

sys/arch/sparc64/sparc64/db_machdep.c

80

*val = *regaddr;

sys/arch/sparc64/sparc64/db_machdep.c

83

*regaddr = *val;

sys/arch/sparc64/sparc64/db_machdep.c

97

db_sparc_intop(const struct db_variable *vp, db_expr_t *val, int opcode)

sys/arch/sparc64/sparc64/db_trace.c

65

long val;

sys/arch/sparc64/sparc64/db_trace.c

67

db_read_bytes(addr, sizeof val, (char *)&val);

sys/arch/sparc64/sparc64/db_trace.c

69

return val;

sys/arch/sparc64/sparc64/emul.c

100

readfpreg(struct lwp *l, int i, void *val)

sys/arch/sparc64/sparc64/emul.c

102

*(int32_t *) val = FPR(l, i);

sys/arch/sparc64/sparc64/emul.c

108

writefpreg(struct lwp *l, int i, const void *val)

sys/arch/sparc64/sparc64/emul.c

110

FPRSET(l, i, *(const int32_t *) val);

sys/arch/sparc64/sparc64/emul.c

115

decodeaddr(struct trapframe64 *tf, union instr *code, void *val)

sys/arch/sparc64/sparc64/emul.c

118

*((int32_t *) val) = code->i_simm13.i_simm13;

sys/arch/sparc64/sparc64/emul.c

124

if ((error = readgpreg(tf, code->i_asi.i_rs2, val)) != 0)

sys/arch/sparc64/sparc64/emul.c

68

readgpreg(struct trapframe64 *tf, int i, void *val)

sys/arch/sparc64/sparc64/emul.c

72

*(int32_t *) val = 0;

sys/arch/sparc64/sparc64/emul.c

74

*(int32_t *) val = GPR(tf, i);

sys/arch/sparc64/sparc64/emul.c

76

error = copyin(&IPR(tf, i), val, sizeof(int32_t));

sys/arch/sparc64/sparc64/emul.c

83

writegpreg(struct trapframe64 *tf, int i, const void *val)

sys/arch/sparc64/sparc64/emul.c

90

GPR(tf, i) = *(const int32_t *) val;

sys/arch/sparc64/sparc64/emul.c

93

error = copyout(val, &IPR(tf, i), sizeof(int32_t));

sys/arch/sparc64/sparc64/mdesc.c

143

uint64_t val;

sys/arch/sparc64/sparc64/mdesc.c

150

for (idx = 0; elem[idx].tag == 'N'; idx = elem[idx].d.val) {

sys/arch/sparc64/sparc64/mdesc.c

152

val = mdesc_get_prop_val(idx, "cfg-handle");

sys/arch/sparc64/sparc64/mdesc.c

153

if (str && strcmp(str, name) == 0 && val == cfg_handle)

sys/arch/sparc64/sparc64/mdesc.c

167

uint64_t val;

sys/arch/sparc64/sparc64/mdesc.c

179

arc = elem[idx].d.val;

sys/arch/sparc64/sparc64/mdesc.c

181

val = mdesc_get_prop_val(arc, "cfg-handle");

sys/arch/sparc64/sparc64/mdesc.c

182

if (str && strcmp(str, name) == 0 && val == cfg_handle)

sys/arch/sparc64/sparc64/mdesc.c

201

for ( ; elem[idx].tag == 'N'; idx = elem[idx].d.val) {

sys/arch/sparc64/sparc64/mdesc.c

223

return elem[idx].d.val;

sys/arch/sparc64/sparc64/mdesc.c

80

return (elem[idx].d.val);

sys/arch/sparc64/sparc64/pmap.c

3567

int val = 0;

sys/arch/sparc64/sparc64/pmap.c

3596

val = *loc;

sys/arch/sparc64/sparc64/pmap.c

3601

ref, mod, val);

sys/arch/sun2/dev/if_ec.c

99

#define ECREG_CSR_WR(val) bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECREG_CSR, val)

sys/arch/sun2/dev/if_ie_mbmem.c

249

#define write_iev(sc, reg, val) \

sys/arch/sun2/dev/if_ie_mbmem.c

250

bus_space_write_2(sc->ievt, sc->ievh, offsetof(struct iembmem, reg), val)

sys/arch/sun2/dev/zs.c

487

uint8_t val;

sys/arch/sun2/dev/zs.c

491

val = *cs->cs_reg_csr;

sys/arch/sun2/dev/zs.c

493

return (val);

sys/arch/sun2/dev/zs.c

497

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/sun2/dev/zs.c

501

*cs->cs_reg_csr = val;

sys/arch/sun2/dev/zs.c

508

uint8_t val;

sys/arch/sun2/dev/zs.c

510

val = *cs->cs_reg_csr;

sys/arch/sun2/dev/zs.c

512

return (val);

sys/arch/sun2/dev/zs.c

516

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/sun2/dev/zs.c

518

*cs->cs_reg_csr = val;

sys/arch/sun2/dev/zs.c

525

uint8_t val;

sys/arch/sun2/dev/zs.c

527

val = *cs->cs_reg_data;

sys/arch/sun2/dev/zs.c

529

return (val);

sys/arch/sun2/dev/zs.c

533

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/sun2/dev/zs.c

535

*cs->cs_reg_data = val;

sys/arch/sun2/sun2/clock.c

135

#define am9513_write_clk_cmd(val) \

sys/arch/sun2/sun2/clock.c

136

bus_space_write_2(am9513_bt, am9513_bh, AM9513_CLK_CMD, val)

sys/arch/sun2/sun2/clock.c

137

#define am9513_write_clk_data(val) \

sys/arch/sun2/sun2/clock.c

138

bus_space_write_2(am9513_bt, am9513_bh, AM9513_CLK_DATA, val)

sys/arch/sun3/dev/esp.c

262

esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/sun3/dev/esp.c

266

bus_space_write_1(esc->sc_bst, esc->sc_bsh, reg * 4, val);

sys/arch/sun3/dev/fb.c

243

volatile uint32_t val, save, *pfour = va;

sys/arch/sun3/dev/fb.c

253

val = save & ~P4_REG_RESET;

sys/arch/sun3/dev/fb.c

254

*pfour = (val ^ P4_FBTYPE_MASK);

sys/arch/sun3/dev/fb.c

255

if ((*pfour ^ val) & P4_FBTYPE_MASK) {

sys/arch/sun3/dev/fb.c

260

return (P4_ID(val));

sys/arch/sun3/dev/if_ie_sebuf.c

226

wmemset(void *vb, int val, size_t l)

sys/arch/sun3/dev/if_ie_sebuf.c

237

*b++ = val;

sys/arch/sun3/dev/if_ie_sebuf.c

242

*be = val;

sys/arch/sun3/dev/if_ie_sebuf.c

248

*sp++ = val;

sys/arch/sun3/dev/if_ie_vme.c

230

wmemset(void *vb, int val, size_t l)

sys/arch/sun3/dev/if_ie_vme.c

241

*b++ = val;

sys/arch/sun3/dev/if_ie_vme.c

246

*be = val;

sys/arch/sun3/dev/if_ie_vme.c

252

*sp++ = val;

sys/arch/sun3/dev/if_le.c

106

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/arch/sun3/dev/if_le.c

111

ler1->ler1_rdp = val;

sys/arch/sun3/dev/if_le.c

118

uint16_t val;

sys/arch/sun3/dev/if_le.c

121

val = ler1->ler1_rdp;

sys/arch/sun3/dev/if_le.c

122

return (val);

sys/arch/sun3/dev/zs.c

489

uint8_t val;

sys/arch/sun3/dev/zs.c

493

val = *cs->cs_reg_csr;

sys/arch/sun3/dev/zs.c

495

return val;

sys/arch/sun3/dev/zs.c

499

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/sun3/dev/zs.c

503

*cs->cs_reg_csr = val;

sys/arch/sun3/dev/zs.c

510

uint8_t val;

sys/arch/sun3/dev/zs.c

512

val = *cs->cs_reg_csr;

sys/arch/sun3/dev/zs.c

514

return val;

sys/arch/sun3/dev/zs.c

518

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/sun3/dev/zs.c

520

*cs->cs_reg_csr = val;

sys/arch/sun3/dev/zs.c

527

uint8_t val;

sys/arch/sun3/dev/zs.c

529

val = *cs->cs_reg_data;

sys/arch/sun3/dev/zs.c

531

return val;

sys/arch/sun3/dev/zs.c

535

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/sun3/dev/zs.c

537

*cs->cs_reg_data = val;

sys/arch/sun68k/sun68k/autoconf.c

291

int val;

sys/arch/sun68k/sun68k/autoconf.c

294

for (val = 0;; val = (val << 4) + c, p++) {

sys/arch/sun68k/sun68k/autoconf.c

305

*_val = val;

sys/arch/usermode/include/types.h

38

long val[8];

sys/arch/usermode/usermode/copy.c

120

_ustore_8(uint8_t *uaddr, uint8_t val)

sys/arch/usermode/usermode/copy.c

122

*uaddr = val;

sys/arch/usermode/usermode/copy.c

127

_ustore_16(uint16_t *uaddr, uint16_t val)

sys/arch/usermode/usermode/copy.c

129

*uaddr = val;

sys/arch/usermode/usermode/copy.c

134

_ustore_32(uint32_t *uaddr, uint32_t val)

sys/arch/usermode/usermode/copy.c

136

*uaddr = val;

sys/arch/usermode/usermode/copy.c

142

_ustore_64(uint64_t *uaddr, uint64_t val)

sys/arch/usermode/usermode/copy.c

144

*uaddr = val;

sys/arch/vax/boot/boot/boot.c

162

const struct vals *v = &val[0];

sys/arch/vax/boot/boot/boot.c

351

const struct vals *v = &val[0];

sys/arch/vax/boot/boot/boot.c

69

} val[] = {

sys/arch/vax/boot/boot/hp.c

60

#define MBA_WCSR(reg, val) \

sys/arch/vax/boot/boot/hp.c

61

((void)(*(volatile u_int32_t *)((adpadr) + (reg)) = (val)));

sys/arch/vax/boot/boot/hp.c

64

#define HP_WCSR(reg, val) \

sys/arch/vax/boot/boot/hp.c

65

((void)(*(volatile u_int32_t *)((unitadr) + (reg)) = (val)));

sys/arch/vax/boot/boot/if_de.c

78

#define DE_WCSR(csr, val) *(volatile u_short *)(addr + (csr)) = (val)

sys/arch/vax/boot/boot/if_de.c

79

#define DE_WLOW(val) *(volatile u_char *)(addr + DE_PCSR0) = (val)

sys/arch/vax/boot/boot/if_de.c

80

#define DE_WHIGH(val) *(volatile u_char *)(addr + DE_PCSR0 + 1) = (val)

sys/arch/vax/boot/boot/if_le.c

121

#define LEWRCSR(port, val) { \

sys/arch/vax/boot/boot/if_le.c

123

nireg->ni_rdp = (val); \

sys/arch/vax/boot/boot/if_ni.c

84

#define NI_WREG(csr, val) *(volatile long *)(niaddr + (csr)) = (val)

sys/arch/vax/boot/boot/if_ni.c

87

#define WAITREG(csr,val) while (NI_RREG(csr) & val);

sys/arch/vax/boot/boot/if_qe.c

75

#define QE_WCSR(csr, val) \

sys/arch/vax/boot/boot/if_qe.c

76

(*((volatile u_short *)(addr + (csr))) = (val))

sys/arch/vax/boot/xxboot/bootxx.c

315

#define MBA_WCSR(reg, val) \

sys/arch/vax/boot/xxboot/bootxx.c

316

((void)(*(volatile u_int32_t *)((adpadr) + (reg)) = (val)));

sys/arch/vax/boot/xxboot/bootxx.c

319

#define HP_WCSR(reg, val) \

sys/arch/vax/boot/xxboot/bootxx.c

320

((void)(*(volatile u_int32_t *)((unitadr) + (reg)) = (val)));

sys/arch/vax/if/if_le.c

125

lewrcsr(struct lance_softc *ls, uint16_t port, uint16_t val)

sys/arch/vax/if/if_le.c

130

*sc->sc_rdp = val;

sys/arch/vax/if/if_le_vsbus.c

116

lewrcsr(struct lance_softc *ls, uint16_t port, uint16_t val)

sys/arch/vax/if/if_le_vsbus.c

121

*sc->sc_rdp = val;

sys/arch/vax/include/macros.h

42

register int val;

sys/arch/vax/include/macros.h

49

: "=&r" (val)

sys/arch/vax/include/macros.h

51

return val;

sys/arch/vax/include/mtpr.h

165

mtpr(register_t val, int reg)

sys/arch/vax/include/mtpr.h

170

: "g" (val), "g" (reg)

sys/arch/vax/include/types.h

43

int val[6];

sys/arch/vax/mba/hp.c

117

#define HP_WCSR(reg, val) \

sys/arch/vax/mba/hp.c

118

bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val))

sys/arch/vax/mba/mba.c

84

#define MBA_WCSR(reg, val) \

sys/arch/vax/mba/mba.c

85

bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val))

sys/arch/vax/uba/qvaux.c

154

qvaux_write1(struct qvaux_softc *sc, u_int off, u_int val)

sys/arch/vax/uba/qvaux.c

157

bus_space_write_1(sc->sc_iot, sc->sc_ioh, off, val);

sys/arch/vax/uba/qvaux.c

165

qvaux_write2(struct qvaux_softc *sc, u_int off, u_int val)

sys/arch/vax/uba/qvaux.c

168

bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val);

sys/arch/vax/uba/qvkbd.c

301

int val;

sys/arch/vax/uba/qvkbd.c

306

data, &type, &val);

sys/arch/vax/uba/qvkbd.c

308

wskbd_input(sc->sc_wskbddev, type, val);

sys/arch/vax/uba/uba_mainbus.c

122

int val;

sys/arch/vax/uba/uba_mainbus.c

145

val = 0;

sys/arch/vax/uba/uba_mainbus.c

150

val = mapp[pgnum];

sys/arch/vax/uba/uba_mainbus.c

164

mapp[pgnum] = val;

sys/arch/vax/vax/db_disasm.c

488

add_xint(inst_buffer *ib, int val)

sys/arch/vax/vax/db_disasm.c

491

snprintf(buf, sizeof(buf), "0x%x", val);

sys/arch/vax/vax/ka43.c

195

int val = *ka43_creg;

sys/arch/vax/vax/ka43.c

196

val |= KA43_SESR_SERR | KA43_SESR_LERR | KA43_SESR_CERR;

sys/arch/vax/vax/ka43.c

197

*ka43_creg = val;

sys/arch/vax/vax/ka43.c

228

int val;

sys/arch/vax/vax/ka43.c

234

val = mfpr(PR_PCSTS);

sys/arch/vax/vax/ka43.c

235

mtpr(val, PR_PCSTS); /* clear error flags */

sys/arch/vax/vax/ka43.c

240

val = *ka43_creg & ~KA43_SESR_CENB; /* BICL !!! */

sys/arch/vax/vax/ka43.c

241

*ka43_creg = val; /* disable secondary cache */

sys/arch/vax/vax/ka43.c

242

val = KA43_SESR_SERR | KA43_SESR_LERR | KA43_SESR_CERR;

sys/arch/vax/vax/ka43.c

243

*ka43_creg = val; /* clear error flags */

sys/arch/vax/vax/ka43.c

251

int i, val;

sys/arch/vax/vax/ka43.c

253

val = KA43_PCTAG_PARITY; /* clear valid flag, set parity bit */

sys/arch/vax/vax/ka43.c

256

mtpr(val, PR_PCTAG); /* write value into tag */

sys/arch/vax/vax/ka43.c

258

val = KA43_PCS_FLUSH | KA43_PCS_REFRESH;

sys/arch/vax/vax/ka43.c

259

mtpr(val, PR_PCSTS); /* flush primary cache */

sys/arch/vax/vax/ka43.c

269

val = 0xff;

sys/arch/vax/vax/ka43.c

272

ka43_ctag[i/4] = val; /* reset upper and lower */

sys/arch/vax/vax/ka43.c

283

int i, val;

sys/arch/vax/vax/ka43.c

285

val = KA43_PCS_FLUSH | KA43_PCS_REFRESH;

sys/arch/vax/vax/ka43.c

286

mtpr(val, PR_PCSTS); /* flush primary cache */

sys/arch/vax/vax/ka43.c

295

val += membase[i]; /* some dummy operation... */

sys/arch/vax/vax/ka43.c

298

val = KA43_PCS_ENABLE | KA43_PCS_REFRESH;

sys/arch/vax/vax/ka43.c

299

mtpr(val, PR_PCSTS); /* enable primary cache */

sys/arch/vax/vax/ka43.c

335

int val;

sys/arch/vax/vax/ka43.c

345

val = ka43_cpu->parctl & 0x03; /* read the old value */

sys/arch/vax/vax/ka43.c

346

ka43_cpu->parctl = val; /* and write new value */

sys/arch/vax/vax/ka6400.c

173

#define MEMWR(reg, val) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val))

sys/arch/vax/vax/ka670.c

172

int val;

sys/arch/vax/vax/ka670.c

178

val = mfpr(PR_PCSTS);

sys/arch/vax/vax/ka670.c

179

mtpr(val, PR_PCSTS); /* clear error flags */

sys/arch/vax/vax/ka820.c

241

#define MEMWR(reg, val) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val))

sys/arch/vax/vax/ka88.c

266

tocons(int val)

sys/arch/vax/vax/ka88.c

272

mtpr(val, PR_TXDB); /* xmit character */

sys/arch/vax/vsa/asc_vsbus.c

314

asc_vsbus_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/arch/vax/vsa/asc_vsbus.c

319

reg * sizeof(uint32_t), val);

sys/arch/vax/vsa/gpx.c

677

gpx_viper_write(struct gpx_screen *ss, u_int reg, uint16_t val)

sys/arch/vax/vsa/gpx.c

681

ss->ss_adder->id_data = val;

sys/arch/vax/vsa/gpx.c

687

printf("gpx_viper_write failure, reg %x val %x\n", reg, val);

sys/arch/vax/vsa/vsaudio.c

236

vsaudio_codec_dwrite(struct am7930_softc *amsc, int reg, uint8_t val)

sys/arch/vax/vsa/vsaudio.c

240

bus_space_write_1(sc->sc_bt, sc->sc_bh, reg << 2, val);

sys/arch/virt68k/dev/mainbus.c

167

uint32_t val;

sys/arch/virt68k/dev/mainbus.c

178

val = bus_space_read_4(ma->ma_st, bsh, VIRTIO_MMIO_DEVICE_ID);

sys/arch/virt68k/dev/mainbus.c

181

if (val != 0) {

sys/arch/x68k/dev/zs.c

439

uint8_t val;

sys/arch/x68k/dev/zs.c

443

val = *cs->cs_reg_csr;

sys/arch/x68k/dev/zs.c

445

return val;

sys/arch/x68k/dev/zs.c

449

zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)

sys/arch/x68k/dev/zs.c

453

*cs->cs_reg_csr = val;

sys/arch/x68k/dev/zs.c

460

uint8_t val;

sys/arch/x68k/dev/zs.c

462

val = *cs->cs_reg_csr;

sys/arch/x68k/dev/zs.c

464

return val;

sys/arch/x68k/dev/zs.c

468

zs_write_csr(struct zs_chanstate *cs, uint8_t val)

sys/arch/x68k/dev/zs.c

470

*cs->cs_reg_csr = val;

sys/arch/x68k/dev/zs.c

477

uint8_t val;

sys/arch/x68k/dev/zs.c

479

val = *cs->cs_reg_data;

sys/arch/x68k/dev/zs.c

481

return val;

sys/arch/x68k/dev/zs.c

485

zs_write_data(struct zs_chanstate *cs, uint8_t val)

sys/arch/x68k/dev/zs.c

487

*cs->cs_reg_data = val;

sys/arch/x68k/include/bootinfo.h

78

#define B_X68K_SCSI_IF(val) B_ADAPTOR(val)

sys/arch/x68k/include/bootinfo.h

79

#define B_X68K_SCSI_IF_UN(val) B_CONTROLLER(val)

sys/arch/x68k/include/bootinfo.h

81

#define B_X68K_SCSI_ID(val) B_UNIT(val)

sys/arch/x68k/include/bootinfo.h

82

#define B_X68K_SCSI_LUN(val) (((val) >> (B_PARTITIONSHIFT + 4)) & 07)

sys/arch/x68k/include/bootinfo.h

84

#define B_X68K_SCSI_PART(val) (((val) >> B_PARTITIONSHIFT) & 017)

sys/arch/x68k/include/bootinfo.h

88

#define B_X68K_SCSI_EXT(val) (((val) >> (B_PARTITIONSHIFT + 7)) & 01)

sys/arch/x68k/stand/aout2hux/aout2hux.c

100

return be->val[0]<<24 | be->val[1]<<16 | be->val[2]<<8 | be->val[3];

sys/arch/x68k/stand/aout2hux/aout2hux.c

107

be->val[0] = (u_int8_t) (v >> 8);

sys/arch/x68k/stand/aout2hux/aout2hux.c

108

be->val[1] = (u_int8_t) v;

sys/arch/x68k/stand/aout2hux/aout2hux.c

115

be->val[0] = (u_int8_t) (v >> 24);

sys/arch/x68k/stand/aout2hux/aout2hux.c

116

be->val[1] = (u_int8_t) (v >> 16);

sys/arch/x68k/stand/aout2hux/aout2hux.c

117

be->val[2] = (u_int8_t) (v >> 8);

sys/arch/x68k/stand/aout2hux/aout2hux.c

118

be->val[3] = (u_int8_t) v;

sys/arch/x68k/stand/aout2hux/aout2hux.c

738

be16.val[0] = 0x12; be16.val[1] = 0x34;

sys/arch/x68k/stand/aout2hux/aout2hux.c

739

be32.val[0] = 0xfe; be32.val[1] = 0xdc;

sys/arch/x68k/stand/aout2hux/aout2hux.c

740

be32.val[2] = 0xba; be32.val[3] = 0x98;

sys/arch/x68k/stand/aout2hux/aout2hux.c

764

u_int32_t val;

sys/arch/x68k/stand/aout2hux/aout2hux.c

774

for (val = 0, over = 0; *p; p++) {

sys/arch/x68k/stand/aout2hux/aout2hux.c

791

if (val >= 0x10000000)

sys/arch/x68k/stand/aout2hux/aout2hux.c

793

val = (val << 4) | digit;

sys/arch/x68k/stand/aout2hux/aout2hux.c

799

*pval = val;

sys/arch/x68k/stand/aout2hux/aout2hux.c

801

DPRINTF(("gethex: %s -> 0x%x\n", str, val));

sys/arch/x68k/stand/aout2hux/aout2hux.c

93

return be->val[0] << 8 | be->val[1];

sys/arch/x68k/stand/aout2hux/aout68k.h

43

#define AOUT_GET_MAGIC(e) (((e)->a_magic.val[2]<<8) | (e)->a_magic.val[3])

sys/arch/x68k/stand/aout2hux/aout68k.h

48

#define AOUT_GET_FLAGS(e) ((e)->a_magic.val[0] >> 2)

sys/arch/x68k/stand/aout2hux/aout68k.h

53

#define AOUT_GET_MID(e) ((((e)->a_magic.val[0] & 0x03) << 8) | \

sys/arch/x68k/stand/aout2hux/aout68k.h

54

(e)->a_magic.val[1])

sys/arch/x68k/stand/aout2hux/type_local.h

26

u_int8_t val[2];

sys/arch/x68k/stand/aout2hux/type_local.h

31

u_int8_t val[4];

sys/arch/x68k/stand/boot/dp8390.c

51

#define NIC_PUT(reg, val) outb(WE_IOBASE + (reg) * 2, val)

sys/arch/x68k/stand/boot/switch.c

102

val = strchr(arg, '=');

sys/arch/x68k/stand/boot/switch.c

103

if (val == NULL) {

sys/arch/x68k/stand/boot/switch.c

107

*val++ = '\0';

sys/arch/x68k/stand/boot/switch.c

110

cmd_switch_boot(val);

sys/arch/x68k/stand/boot/switch.c

112

cmd_switch_rom(val);

sys/arch/x68k/stand/boot/switch.c

114

cmd_switch_memory(val);

sys/arch/x68k/stand/boot/switch.c

95

char *val;

sys/arch/x68k/stand/common/xprintf.c

55

static char * numstr(char *buf, long val, int base, int sign);

sys/arch/x68k/stand/common/xprintf.c

62

numstr(char *buf, long val, int base, int sign)

sys/arch/x68k/stand/common/xprintf.c

69

if (sign && val < 0) {

sys/arch/x68k/stand/common/xprintf.c

70

v = -val;

sys/arch/x68k/stand/common/xprintf.c

73

v = val;

sys/arch/x68k/stand/libsa/clock.c

47

int val;

sys/arch/x68k/stand/libsa/clock.c

52

val = IOCS_DATEBIN(IOCS_BINDATEGET());

sys/arch/x68k/stand/libsa/clock.c

53

year = ((val & 0x0fff0000) >> 16) + 1980;

sys/arch/x68k/stand/libsa/clock.c

54

mon = ((val & 0x0000ff00) >> 8);

sys/arch/x68k/stand/libsa/clock.c

55

day = (val & 0x000000ff);

sys/arch/x68k/stand/libsa/clock.c

57

val = IOCS_TIMEBIN(IOCS_TIMEGET());

sys/arch/x68k/stand/libsa/clock.c

58

hour = ((val & 0x00ff0000) >> 16);

sys/arch/x68k/stand/libsa/clock.c

59

min = ((val & 0x0000ff00) >> 8);

sys/arch/x68k/stand/libsa/clock.c

60

sec = (val & 0x000000ff);

sys/arch/x68k/x68k/clock.c

169

uint8_t val;

sys/arch/x68k/x68k/clock.c

170

val = ~(mfp_get_tddr());

sys/arch/x68k/x68k/clock.c

171

return (val);

sys/arch/x86/acpi/acpi_cpu_md.c

149

uint32_t family, val = 0;

sys/arch/x86/acpi/acpi_cpu_md.c

154

val |= ACPICPU_FLAG_C_BM;

sys/arch/x86/acpi/acpi_cpu_md.c

157

val |= ACPICPU_FLAG_C_FFH;

sys/arch/x86/acpi/acpi_cpu_md.c

163

val |= ACPICPU_FLAG_C_APIC | ACPICPU_FLAG_C_TSC;

sys/arch/x86/acpi/acpi_cpu_md.c

173

val &= ~ACPICPU_FLAG_C_TSC;

sys/arch/x86/acpi/acpi_cpu_md.c

180

val |= ACPICPU_FLAG_P_FFH;

sys/arch/x86/acpi/acpi_cpu_md.c

183

val |= ACPICPU_FLAG_T_FFH;

sys/arch/x86/acpi/acpi_cpu_md.c

196

val |= ACPICPU_FLAG_C_BM | ACPICPU_FLAG_C_ARB;

sys/arch/x86/acpi/acpi_cpu_md.c

203

val |= ACPICPU_FLAG_P_FFH;

sys/arch/x86/acpi/acpi_cpu_md.c

206

val |= ACPICPU_FLAG_T_FFH;

sys/arch/x86/acpi/acpi_cpu_md.c

218

val |= ACPICPU_FLAG_P_HWF;

sys/arch/x86/acpi/acpi_cpu_md.c

221

val |= ACPICPU_FLAG_P_TURBO;

sys/arch/x86/acpi/acpi_cpu_md.c

224

val &= ~ACPICPU_FLAG_C_APIC;

sys/arch/x86/acpi/acpi_cpu_md.c

249

val |= ACPICPU_FLAG_C_C1E;

sys/arch/x86/acpi/acpi_cpu_md.c

261

val |= ACPICPU_FLAG_P_FFH | ACPICPU_FLAG_P_FIDVID;

sys/arch/x86/acpi/acpi_cpu_md.c

271

val |= ACPICPU_FLAG_C_C1E;

sys/arch/x86/acpi/acpi_cpu_md.c

285

val |= ACPICPU_FLAG_P_FFH;

sys/arch/x86/acpi/acpi_cpu_md.c

288

val |= ACPICPU_FLAG_P_TURBO;

sys/arch/x86/acpi/acpi_cpu_md.c

299

val |= ACPICPU_FLAG_P_HWF;

sys/arch/x86/acpi/acpi_cpu_md.c

312

val |= ACPICPU_FLAG_PIIX4;

sys/arch/x86/acpi/acpi_cpu_md.c

314

return val;

sys/arch/x86/acpi/acpi_cpu_md.c

340

uint64_t val;

sys/arch/x86/acpi/acpi_cpu_md.c

342

val = rdmsr(MSR_CMPHALT);

sys/arch/x86/acpi/acpi_cpu_md.c

344

if ((val & c1e) != 0)

sys/arch/x86/acpi/acpi_cpu_md.c

345

wrmsr(MSR_CMPHALT, val & ~c1e);

sys/arch/x86/acpi/acpi_cpu_md.c

439

uint64_t xc, val;

sys/arch/x86/acpi/acpi_cpu_md.c

451

val = rdmsr(MSR_MISC_ENABLE);

sys/arch/x86/acpi/acpi_cpu_md.c

453

if ((val & MSR_MISC_ENABLE_EST) == 0) {

sys/arch/x86/acpi/acpi_cpu_md.c

455

val |= MSR_MISC_ENABLE_EST;

sys/arch/x86/acpi/acpi_cpu_md.c

456

wrmsr(MSR_MISC_ENABLE, val);

sys/arch/x86/acpi/acpi_cpu_md.c

457

val = rdmsr(MSR_MISC_ENABLE);

sys/arch/x86/acpi/acpi_cpu_md.c

459

if ((val & MSR_MISC_ENABLE_EST) == 0)

sys/arch/x86/acpi/acpi_cpu_md.c

683

uint64_t val;

sys/arch/x86/acpi/acpi_cpu_md.c

706

val = rdmsr(ps->ps_status_addr);

sys/arch/x86/acpi/acpi_cpu_md.c

709

val = val & ps->ps_status_mask;

sys/arch/x86/acpi/acpi_cpu_md.c

721

if (val == ps->ps_status) {

sys/arch/x86/acpi/acpi_cpu_md.c

748

uint64_t val = 0;

sys/arch/x86/acpi/acpi_cpu_md.c

760

val = rdmsr(ps->ps_control_addr);

sys/arch/x86/acpi/acpi_cpu_md.c

761

val &= ~ps->ps_control_mask;

sys/arch/x86/acpi/acpi_cpu_md.c

764

val |= ps->ps_control;

sys/arch/x86/acpi/acpi_cpu_md.c

766

wrmsr(ps->ps_control_addr, val);

sys/arch/x86/acpi/acpi_cpu_md.c

815

uint32_t val, vid, vst;

sys/arch/x86/acpi/acpi_cpu_md.c

838

val = 1 << __SHIFTOUT(ctrl, ACPI_0FH_CONTROL_MVS);

sys/arch/x86/acpi/acpi_cpu_md.c

839

val = (val > cvid) ? 0 : cvid - val;

sys/arch/x86/acpi/acpi_cpu_md.c

841

acpicpu_md_pstate_fidvid_write(cfid, val, 1, vst);

sys/arch/x86/acpi/acpi_cpu_md.c

870

val = cfid - 2;

sys/arch/x86/acpi/acpi_cpu_md.c

872

val = (cfid > 6) ? cfid + 2 :

sys/arch/x86/acpi/acpi_cpu_md.c

876

acpicpu_md_pstate_fidvid_write(val, cvid, pll, irt);

sys/arch/x86/acpi/acpi_cpu_md.c

911

uint64_t val;

sys/arch/x86/acpi/acpi_cpu_md.c

914

val = rdmsr(MSR_0FH_STATUS);

sys/arch/x86/acpi/acpi_cpu_md.c

916

} while (__SHIFTOUT(val, MSR_0FH_STATUS_PENDING) != 0 && --i >= 0);

sys/arch/x86/acpi/acpi_cpu_md.c

922

*cfid = __SHIFTOUT(val, MSR_0FH_STATUS_CFID);

sys/arch/x86/acpi/acpi_cpu_md.c

925

*cvid = __SHIFTOUT(val, MSR_0FH_STATUS_CVID);

sys/arch/x86/acpi/acpi_cpu_md.c

934

uint64_t val = 0;

sys/arch/x86/acpi/acpi_cpu_md.c

936

val |= __SHIFTIN(fid, MSR_0FH_CONTROL_FID);

sys/arch/x86/acpi/acpi_cpu_md.c

937

val |= __SHIFTIN(vid, MSR_0FH_CONTROL_VID);

sys/arch/x86/acpi/acpi_cpu_md.c

938

val |= __SHIFTIN(cnt, MSR_0FH_CONTROL_CNT);

sys/arch/x86/acpi/acpi_cpu_md.c

939

val |= __SHIFTIN(0x1, MSR_0FH_CONTROL_CHG);

sys/arch/x86/acpi/acpi_cpu_md.c

941

wrmsr(MSR_0FH_CONTROL, val);

sys/arch/x86/acpi/acpi_cpu_md.c

949

uint64_t val;

sys/arch/x86/acpi/acpi_cpu_md.c

952

val = rdmsr(MSR_THERM_CONTROL);

sys/arch/x86/acpi/acpi_cpu_md.c

961

if (val == ts->ts_status) {

sys/arch/x86/acpi/acpi_cpu_md.c

973

uint64_t val;

sys/arch/x86/acpi/acpi_cpu_md.c

976

val = ts->ts_control;

sys/arch/x86/acpi/acpi_cpu_md.c

977

val = val & __BITS(0, 4);

sys/arch/x86/acpi/acpi_cpu_md.c

979

wrmsr(MSR_THERM_CONTROL, val);

sys/arch/x86/acpi/acpi_cpu_md.c

986

for (i = val = 0; i < ACPICPU_T_STATE_RETRY; i++) {

sys/arch/x86/acpi/acpi_cpu_md.c

988

val = rdmsr(MSR_THERM_CONTROL);

sys/arch/x86/acpi/acpi_cpu_md.c

990

if (val == ts->ts_status)

sys/arch/x86/acpi/acpi_pdc.c

126

acpi_md_pdc_set(ACPI_HANDLE hdl, uint32_t val)

sys/arch/x86/acpi/acpi_pdc.c

137

cap[2] = val;

sys/arch/x86/acpi/acpi_wakeup.c

138

#define WAKECODE_FIXUP(offset, type, val) do { \

sys/arch/x86/acpi/acpi_wakeup.c

141

*addr = val; \

sys/arch/x86/include/cpufunc.h

170

uint16_t val;

sys/arch/x86/include/cpufunc.h

174

: [val] "=r" (val)

sys/arch/x86/include/cpufunc.h

177

return val;

sys/arch/x86/include/cpufunc.h

181

setds(uint16_t val)

sys/arch/x86/include/cpufunc.h

186

: [val] "r" (val)

sys/arch/x86/include/cpufunc.h

191

setes(uint16_t val)

sys/arch/x86/include/cpufunc.h

196

: [val] "r" (val)

sys/arch/x86/include/cpufunc.h

201

setfs(uint16_t val)

sys/arch/x86/include/cpufunc.h

206

: [val] "r" (val)

sys/arch/x86/include/cpufunc.h

215

static inline void lcr##crnum(register_t val) \

sys/arch/x86/include/cpufunc.h

220

: [val] "r" (val) \

sys/arch/x86/include/cpufunc.h

226

register_t val; \

sys/arch/x86/include/cpufunc.h

229

: [val] "=r" (val) \

sys/arch/x86/include/cpufunc.h

232

return val; \

sys/arch/x86/include/cpufunc.h

255

static inline void ldr##drnum(register_t val) \

sys/arch/x86/include/cpufunc.h

260

: [val] "r" (val) \

sys/arch/x86/include/cpufunc.h

265

register_t val; \

sys/arch/x86/include/cpufunc.h

268

: [val] "=r" (val) \

sys/arch/x86/include/cpufunc.h

271

return val; \

sys/arch/x86/include/cpufunc.h

311

fnstcw(uint16_t *val)

sys/arch/x86/include/cpufunc.h

315

: [val] "=m" (*val)

sys/arch/x86/include/cpufunc.h

321

fnstsw(uint16_t *val)

sys/arch/x86/include/cpufunc.h

325

: [val] "=m" (*val)

sys/arch/x86/include/cpufunc.h

339

x86_stmxcsr(uint32_t *val)

sys/arch/x86/include/cpufunc.h

343

: [val] "=m" (*val)

sys/arch/x86/include/cpufunc.h

349

x86_ldmxcsr(uint32_t *val)

sys/arch/x86/include/cpufunc.h

354

: [val] "m" (*val)

sys/arch/x86/include/cpufunc.h

375

wrxcr(uint32_t xcr, uint64_t val)

sys/arch/x86/include/cpufunc.h

379

low = val;

sys/arch/x86/include/cpufunc.h

380

high = val >> 32;

sys/arch/x86/include/cpufunc.h

632

wrmsr(u_int msr, uint64_t val)

sys/arch/x86/include/cpufunc.h

636

low = val;

sys/arch/x86/include/cpufunc.h

637

high = val >> 32;

sys/arch/x86/include/cpufunc.h

647

wrmsr_locked(u_int msr, uint64_t val)

sys/arch/x86/include/cpufunc.h

651

low = val;

sys/arch/x86/include/cpufunc.h

652

high = val >> 32;

sys/arch/x86/include/lock.h

100

"=qQ" (val)

sys/arch/x86/include/lock.h

101

:"0" (val), "r" (lockp));

sys/arch/x86/include/lock.h

103

return val == __SIMPLELOCK_UNLOCKED;

sys/arch/x86/include/lock.h

96

uint8_t val;

sys/arch/x86/include/lock.h

98

val = __SIMPLELOCK_LOCKED;

sys/arch/x86/include/mtrr.h

105

#define mtrr_len(val) \

sys/arch/x86/include/mtrr.h

106

((~((val) & 0x0000000ffffff000LL)+1) & 0x0000000ffffff000LL)

sys/arch/x86/include/mtrr.h

107

#define mtrr_base(val) ((val) & 0x0000000ffffff000LL)

sys/arch/x86/include/mtrr.h

108

#define mtrr_type(val) ((uint8_t)((val) & 0x00000000000000ffLL))

sys/arch/x86/include/mtrr.h

109

#define mtrr_valid(val) (((val) & MTRR_I686_MASK_VALID) != 0)

sys/arch/x86/pci/amdzentemp.c

294

uint32_t val, temp;

sys/arch/x86/pci/amdzentemp.c

297

error = amdsmn_read(sc->sc_smn, AMD_15H_M60H_REPTMP_CTRL, &val);

sys/arch/x86/pci/amdzentemp.c

304

temp = __SHIFTOUT(val, F10_TEMP_CURTMP);

sys/arch/x86/pci/amdzentemp.c

317

if (__SHIFTOUT(val, F15M60_CURTMP_TJSEL) == 0x3)

sys/arch/x86/pci/dwiic_pci.c

190

lpss_write(struct pci_dwiic_softc *sc, int offset, uint32_t val)

sys/arch/x86/pci/dwiic_pci.c

193

offset, val);

sys/arch/x86/pci/ichlpcib.c

416

uint32_t val;

sys/arch/x86/pci/ichlpcib.c

441

val = pci_conf_read(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,

sys/arch/x86/pci/ichlpcib.c

443

switch (val & LPCIB_ICH5_HPTC_WIN_MASK) {

sys/arch/x86/pci/ichlpcib.c

452

val &= ~LPCIB_ICH5_HPTC_EN;

sys/arch/x86/pci/ichlpcib.c

454

LPCIB_PCI_GEN_CNTL, val);

sys/arch/x86/pci/ichlpcib.c

456

val = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,

sys/arch/x86/pci/ichlpcib.c

458

switch (val & LPCIB_RCBA_HPTC_WIN_MASK) {

sys/arch/x86/pci/ichlpcib.c

467

val &= ~LPCIB_RCBA_HPTC_EN;

sys/arch/x86/pci/ichlpcib.c

469

val);

sys/arch/x86/pci/ichlpcib.c

663

#define SS_WRITE(sc, reg, val) \

sys/arch/x86/pci/ichlpcib.c

664

bus_space_write_1((sc)->sc_pmt, (sc)->sc_pmh, (reg), (val))

sys/arch/x86/pci/ichlpcib.c

814

uint32_t hpet_reg, val;

sys/arch/x86/pci/ichlpcib.c

817

val = pci_conf_read(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,

sys/arch/x86/pci/ichlpcib.c

819

switch (val & LPCIB_ICH5_HPTC_WIN_MASK) {

sys/arch/x86/pci/ichlpcib.c

835

val |= sc->sc_hpet_reg | LPCIB_ICH5_HPTC_EN;

sys/arch/x86/pci/ichlpcib.c

837

LPCIB_PCI_GEN_CNTL, val);

sys/arch/x86/pci/ichlpcib.c

839

val = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,

sys/arch/x86/pci/ichlpcib.c

841

switch (val & LPCIB_RCBA_HPTC_WIN_MASK) {

sys/arch/x86/pci/ichlpcib.c

857

val |= LPCIB_RCBA_HPTC_EN;

sys/arch/x86/pci/ichlpcib.c

859

val);

sys/arch/x86/pci/pci_addr_fixup.c

169

pcireg_t val, mask;

sys/arch/x86/pci/pci_addr_fixup.c

174

val = pci_conf_read(pc, tag, PCI_BHLC_REG);

sys/arch/x86/pci/pci_addr_fixup.c

175

switch (PCI_HDRTYPE_TYPE(val)) {

sys/arch/x86/pci/pci_addr_fixup.c

197

val = pci_conf_read(pc, tag, mapreg);

sys/arch/x86/pci/pci_addr_fixup.c

201

pci_conf_write(pc, tag, mapreg, val);

sys/arch/x86/pci/pci_addr_fixup.c

203

type = PCI_MAPREG_TYPE(val);

sys/arch/x86/pci/pci_addr_fixup.c

206

if (PCI_MAPREG_MEM_TYPE(val) ==

sys/arch/x86/pci/pci_addr_fixup.c

223

addr = pciaddr_ioaddr(val);

sys/arch/x86/pci/pci_addr_fixup.c

242

val = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);

sys/arch/x86/pci/pci_addr_fixup.c

244

val |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |

sys/arch/x86/pci/pci_addr_fixup.c

247

val &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |

sys/arch/x86/pci/pci_addr_fixup.c

249

pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, val);

sys/arch/x86/pci/pci_addr_fixup.c

332

pciaddr_ioaddr(uint32_t val)

sys/arch/x86/pci/pci_addr_fixup.c

334

return (PCI_MAPREG_TYPE(val) == PCI_MAPREG_TYPE_MEM)

sys/arch/x86/pci/pci_addr_fixup.c

335

? PCI_MAPREG_MEM_ADDR(val)

sys/arch/x86/pci/pci_addr_fixup.c

336

: PCI_MAPREG_IO_ADDR(val);

sys/arch/x86/pci/pci_machdep.c

794

uint32_t sav, val;

sys/arch/x86/pci/pci_machdep.c

856

val = inl(PCI_MODE1_ADDRESS_REG);

sys/arch/x86/pci/pci_machdep.c

857

if ((val & 0x80fffffc) != PCI_MODE1_ENABLE) {

sys/arch/x86/pci/pci_machdep.c

859

printf("%s: mode 1 enable failed (%x)\n", __func__, val);

sys/arch/x86/pci/pci_machdep.c

871

val = inl(PCI_MODE1_ADDRESS_REG);

sys/arch/x86/pci/pci_machdep.c

872

if ((val & 0x80fffffc) != 0)

sys/arch/x86/x86/db_trace.c

56

db_x86_regop(const struct db_variable *vp, db_expr_t *val, int opcode)

sys/arch/x86/x86/db_trace.c

63

*val = *regaddr;

sys/arch/x86/x86/db_trace.c

66

*regaddr = *val;

sys/arch/x86/x86/errata.c

498

uint64_t val;

sys/arch/x86/x86/errata.c

500

val = rdmsr_locked(e->e_data1);

sys/arch/x86/x86/errata.c

501

if ((val & e->e_data2) == 0)

sys/arch/x86/x86/errata.c

503

wrmsr_locked(e->e_data1, val & ~e->e_data2);

sys/arch/x86/x86/errata.c

582

uint64_t val;

sys/arch/x86/x86/errata.c

586

val = rdmsr_locked(e->e_data1);

sys/arch/x86/x86/errata.c

587

if ((val & e->e_data2) != 0)

sys/arch/x86/x86/errata.c

597

uint64_t val;

sys/arch/x86/x86/errata.c

601

val = rdmsr_locked(e->e_data1);

sys/arch/x86/x86/errata.c

602

if ((val & e->e_data2) != 0)

sys/arch/x86/x86/errata.c

604

wrmsr_locked(e->e_data1, val | e->e_data2);

sys/arch/x86/x86/est.c

1281

est_xcall(uint16_t val)

sys/arch/x86/x86/est.c

1289

msr.msr_value = val;

sys/arch/x86/x86/hyperv.c

829

uint64_t val, orig;

sys/arch/x86/x86/hyperv.c

841

val = MSR_HV_SIMP_ENABLE | (orig & MSR_HV_SIMP_RSVD_MASK) |

sys/arch/x86/x86/hyperv.c

843

wrmsr(MSR_HV_SIMP, val);

sys/arch/x86/x86/hyperv.c

849

val = MSR_HV_SIEFP_ENABLE | (orig & MSR_HV_SIEFP_RSVD_MASK) |

sys/arch/x86/x86/hyperv.c

851

wrmsr(MSR_HV_SIEFP, val);

sys/arch/x86/x86/hyperv.c

858

val = hyperv_idtvec | MSR_HV_SINT_AUTOEOI |

sys/arch/x86/x86/hyperv.c

860

wrmsr(sint, val);

sys/arch/x86/x86/hyperv.c

867

val = hyperv_idtvec | MSR_HV_SINT_AUTOEOI |

sys/arch/x86/x86/hyperv.c

869

wrmsr(sint, val);

sys/arch/x86/x86/hyperv.c

875

val = MSR_HV_SCTRL_ENABLE | (orig & MSR_HV_SCTRL_RSVD_MASK);

sys/arch/x86/x86/hyperv.c

876

wrmsr(MSR_HV_SCONTROL, val);

sys/arch/x86/x86/identcpu.c

1087

uint64_t val;

sys/arch/x86/x86/identcpu.c

1089

val = rdmsr(MSR_VMCR);

sys/arch/x86/x86/identcpu.c

1090

if (((val & VMCR_SVMED) == VMCR_SVMED)

sys/arch/x86/x86/identcpu.c

1091

&& ((val & VMCR_LOCK) == VMCR_LOCK)) {

sys/arch/x86/x86/identcpu.c

320

uint64_t val;

sys/arch/x86/x86/identcpu.c

350

val = rdmsr(MSR_BU_CFG2);

sys/arch/x86/x86/identcpu.c

351

val &= ~BU_CFG2_CWPLUS_DIS;

sys/arch/x86/x86/identcpu.c

352

wrmsr(MSR_BU_CFG2, val);

sys/arch/x86/x86/ioapic.c

144

uint32_t val;

sys/arch/x86/x86/ioapic.c

147

val = *sc->sc_data;

sys/arch/x86/x86/ioapic.c

149

return val;

sys/arch/x86/x86/ioapic.c

153

ioapic_write_ul(struct ioapic_softc *sc, int regid, uint32_t val)

sys/arch/x86/x86/ioapic.c

156

*(sc->sc_data) = val;

sys/arch/x86/x86/ioapic.c

163

uint32_t val;

sys/arch/x86/x86/ioapic.c

167

val = ioapic_read_ul(sc, regid);

sys/arch/x86/x86/ioapic.c

169

return val;

sys/arch/x86/x86/ioapic.c

173

ioapic_write(struct ioapic_softc *sc, int regid, int val)

sys/arch/x86/x86/ioapic.c

178

ioapic_write_ul(sc, regid, val);

sys/arch/x86/x86/lapic.c

145

i82489_writereg(u_int reg, uint32_t val)

sys/arch/x86/x86/lapic.c

147

*((volatile uint32_t *)(local_apic_va + reg)) = val;

sys/arch/x86/x86/lapic.c

163

x2apic_writereg(u_int reg, uint32_t val)

sys/arch/x86/x86/lapic.c

166

wrmsr(MSR_X2APIC_BASE + (reg >> 4), val);

sys/arch/x86/x86/lapic.c

170

x2apic_writereg64(u_int reg, uint64_t val)

sys/arch/x86/x86/lapic.c

174

wrmsr(MSR_X2APIC_BASE + (reg >> 4), val);

sys/arch/x86/x86/lapic.c

198

lapic_writereg(u_int reg, uint32_t val)

sys/arch/x86/x86/lapic.c

201

x2apic_writereg(reg, val);

sys/arch/x86/x86/lapic.c

203

i82489_writereg(reg, val);

sys/arch/x86/x86/lapic.c

207

lapic_write_tpri(uint32_t val)

sys/arch/x86/x86/lapic.c

210

val &= LAPIC_TPRI_MASK;

sys/arch/x86/x86/lapic.c

212

lapic_writereg(LAPIC_TPRI, val);

sys/arch/x86/x86/lapic.c

214

lcr8(val >> 4);

sys/arch/x86/x86/lapic.c

972

uint32_t val;

sys/arch/x86/x86/lapic.c

975

val = lapic_readreg(reg);

sys/arch/x86/x86/lapic.c

976

val |= LAPIC_LVT_MASKED;

sys/arch/x86/x86/lapic.c

977

lapic_writereg(reg, val);

sys/arch/x86/x86/lapic.c

984

uint32_t val;

sys/arch/x86/x86/lapic.c

987

val = lapic_readreg(reg);

sys/arch/x86/x86/lapic.c

988

val &= ~LAPIC_LVT_MASKED;

sys/arch/x86/x86/lapic.c

989

lapic_writereg(reg, val);

sys/arch/x86/x86/mtrr_i686.c

240

uint64_t val = mtrr_raw[i].msrval;

sys/arch/x86/x86/mtrr_i686.c

245

val &= ~MTRR_I686_ENABLE_MASK;

sys/arch/x86/x86/mtrr_i686.c

246

wrmsr(addr, val);

sys/arch/x86/x86/mtrr_i686.c

418

uint64_t val;

sys/arch/x86/x86/mtrr_i686.c

431

val = 0;

sys/arch/x86/x86/mtrr_i686.c

434

val |= ((uint64_t)mtrrp->type << (j << 3));

sys/arch/x86/x86/mtrr_i686.c

436

mtrr_fixed_raw[idx].msrval = val;

sys/arch/x86/x86/mtrr_i686.c

440

val = 0;

sys/arch/x86/x86/mtrr_i686.c

443

val |= ((uint64_t)mtrrp->type << (j << 3));

sys/arch/x86/x86/mtrr_i686.c

445

mtrr_fixed_raw[idx].msrval = val;

sys/arch/x86/x86/mtrr_i686.c

449

val = 0;

sys/arch/x86/x86/mtrr_i686.c

452

val |= ((uint64_t)mtrrp->type << (j << 3));

sys/arch/x86/x86/mtrr_i686.c

454

mtrr_fixed_raw[idx].msrval = val;

sys/arch/x86/x86/odcm.c

331

int val;

sys/arch/x86/x86/odcm.c

340

for (val = -1, i = 0; i < __arraycount(state); i++) {

sys/arch/x86/x86/odcm.c

345

val = state[i].level;

sys/arch/x86/x86/odcm.c

350

KASSERT(val != -1);

sys/arch/x86/x86/odcm.c

352

return val;

sys/arch/x86/x86/powernow.c

790

uint32_t val;

sys/arch/x86/x86/powernow.c

829

val = cvid - (1 << sc->sc_state->mvs);

sys/arch/x86/x86/powernow.c

830

status = powernow_k8_fidvid(cfid, (val > 0) ? val : 0, 1ULL);

sys/arch/x86/x86/powernow.c

862

val = cfid + 2;

sys/arch/x86/x86/powernow.c

864

val = FID_TO_VCO_FID(cfid) + 2;

sys/arch/x86/x86/powernow.c

866

val = cfid - 2;

sys/arch/x86/x86/powernow.c

868

status = powernow_k8_fidvid(val, cvid,

sys/arch/x86/x86/spectre.c

354

bool val;

sys/arch/x86/x86/spectre.c

356

val = *(bool *)rnode->sysctl_data;

sys/arch/x86/x86/spectre.c

359

node.sysctl_data = &val;

sys/arch/x86/x86/spectre.c

365

if (val == v2_mitigation_enabled)

sys/arch/x86/x86/spectre.c

367

return mitigation_v2_change(val);

sys/arch/x86/x86/spectre.c

540

bool val;

sys/arch/x86/x86/spectre.c

542

val = *(bool *)rnode->sysctl_data;

sys/arch/x86/x86/spectre.c

545

node.sysctl_data = &val;

sys/arch/x86/x86/spectre.c

551

if (val == v4_mitigation_enabled)

sys/arch/x86/x86/spectre.c

553

return mitigation_v4_change(val);

sys/arch/x86/x86/spectre.c

760

bool val;

sys/arch/x86/x86/spectre.c

762

val = *(bool *)rnode->sysctl_data;

sys/arch/x86/x86/spectre.c

765

node.sysctl_data = &val;

sys/arch/x86/x86/spectre.c

771

if (val == mds_mitigation_enabled)

sys/arch/x86/x86/spectre.c

773

return mitigation_mds_change(val);

sys/arch/x86/x86/spectre.c

939

bool val;

sys/arch/x86/x86/spectre.c

941

val = *(bool *)rnode->sysctl_data;

sys/arch/x86/x86/spectre.c

944

node.sysctl_data = &val;

sys/arch/x86/x86/spectre.c

950

if (val == *taa_mitigation_enabled_ptr)

sys/arch/x86/x86/spectre.c

952

return mitigation_taa_change(val);

sys/arch/x86/x86/tsc.c

314

int64_t bptsc, aptsc, val, diff;

sys/arch/x86/x86/tsc.c

319

val = INT64_MAX;

sys/arch/x86/x86/tsc.c

323

if (ABS(diff) < ABS(val)) {

sys/arch/x86/x86/tsc.c

324

val = diff;

sys/arch/x86/x86/tsc.c

328

ci->ci_data.cpu_cc_skew = val;

sys/arch/x86/x86/vga_post.c

103

vm86_emu_outb(struct X86EMU *emu, uint16_t port, uint8_t val)

sys/arch/x86/x86/vga_post.c

114

x86emu_i8254_outb(&sc->i8254, port, val);

sys/arch/x86/x86/vga_post.c

116

outb(port, val);

sys/arch/x86/x86/vga_post.c

120

vm86_emu_outw(struct X86EMU *emu, uint16_t port, uint16_t val)

sys/arch/x86/x86/vga_post.c

125

outw(port, val);

sys/arch/x86/x86/vga_post.c

129

vm86_emu_outl(struct X86EMU *emu, uint16_t port, uint32_t val)

sys/arch/x86/x86/vga_post.c

134

outl(port, val);

sys/arch/x86/x86/viac7temp.c

72

uint64_t val;

sys/arch/x86/x86/viac7temp.c

82

if (!temp_msr || rdmsr_safe(temp_msr, &val) == EFAULT)

sys/arch/x86/x86/x86_machdep.c

1379

int error, val;

sys/arch/x86/x86/x86_machdep.c

1381

val = *(int *)rnode->sysctl_data;

sys/arch/x86/x86/x86_machdep.c

1384

node.sysctl_data = &val;

sys/arch/x86/x86/x86_machdep.c

1390

if (val == 1) {

sys/arch/x86/x86/x86_machdep.c

1392

} else if (val == 0) {

sys/arch/x86/x86/x86_machdep.c

1400

*(int *)rnode->sysctl_data = val;

sys/arch/xen/include/i82093var.h

28

ioapic_write_ul(struct ioapic_softc *sc, int regid, uint32_t val)

sys/arch/xen/include/i82093var.h

35

apic_op.value = val;

sys/arch/xen/include/xen.h

156

xen_atomic_xchg(volatile XATOMIC_T *ptr, unsigned long val)

sys/arch/xen/include/xen.h

167

:"m" (*ptr), "0" (val)

sys/arch/xen/x86/x86_xpmap.c

238

xpq_queue[xpq_idx].val = pa >> PAGE_SHIFT;

sys/arch/xen/x86/x86_xpmap.c

243

xpq_queue_pte_update(paddr_t ptr, pt_entry_t val)

sys/arch/xen/x86/x86_xpmap.c

249

xpq_queue[xpq_idx].val = val;

sys/arch/xen/x86/x86_xpmap.c

433

xpq_update_foreign(paddr_t ptr, pt_entry_t val, int dom, u_int flags)

sys/arch/xen/x86/x86_xpmap.c

444

op.val = val;

sys/arch/xen/x86/xenfunc.c

132

lcr0(register_t val)

sys/arch/xen/x86/xenfunc.c

146

lcr3(register_t val)

sys/arch/xen/x86/xenfunc.c

149

xpq_queue_pt_switch(xpmap_ptom_masked(val));

sys/arch/xen/x86/xenfunc.c

176

ldr0(register_t val)

sys/arch/xen/x86/xenfunc.c

179

HYPERVISOR_set_debugreg(0, val);

sys/arch/xen/x86/xenfunc.c

190

ldr1(register_t val)

sys/arch/xen/x86/xenfunc.c

193

HYPERVISOR_set_debugreg(1, val);

sys/arch/xen/x86/xenfunc.c

204

ldr2(register_t val)

sys/arch/xen/x86/xenfunc.c

207

HYPERVISOR_set_debugreg(2, val);

sys/arch/xen/x86/xenfunc.c

218

ldr3(register_t val)

sys/arch/xen/x86/xenfunc.c

221

HYPERVISOR_set_debugreg(3, val);

sys/arch/xen/x86/xenfunc.c

231

ldr6(register_t val)

sys/arch/xen/x86/xenfunc.c

234

HYPERVISOR_set_debugreg(6, val);

sys/arch/xen/x86/xenfunc.c

245

ldr7(register_t val)

sys/arch/xen/x86/xenfunc.c

248

HYPERVISOR_set_debugreg(7, val);

sys/arch/xen/xen/pciback.c

152

pciback_write_byte(pci_chipset_tag_t pc, pcitag_t pa, int reg, uint8_t val)

sys/arch/xen/xen/pciback.c

158

pcival |= (val << ((reg & 0x03) * 8));

sys/arch/xen/xen/pciback.c

163

pciback_write_word(pci_chipset_tag_t pc, pcitag_t pa, int reg, uint16_t val)

sys/arch/xen/xen/pciback.c

169

pcival |= (val << ((reg & 0x03) * 8));

sys/arch/xen/xen/pciback.c

656

pciback_xenbus_export_device(struct pb_xenbus_instance *pbxi, char *val)

sys/arch/xen/xen/pciback.c

660

if (pciback_parse_pci(val, &bus, &dev, &func)) {

sys/arch/xen/xen/pciback.c

661

aprint_error("pciback: can't parse %s\n", val);

sys/arch/xen/xen/xbd_xenbus.c

724

u_long val;

sys/arch/xen/xen/xbd_xenbus.c

731

"feature-persistent", &val, 10);

sys/arch/xen/xen/xbd_xenbus.c

733

val = 0;

sys/arch/xen/xen/xbd_xenbus.c

734

if (val > 0)

sys/arch/xen/xen/xbd_xenbus.c

771

u_long val;

sys/arch/xen/xen/xbd_xenbus.c

774

"feature-flush-cache", &val, 10);

sys/arch/xen/xen/xbd_xenbus.c

776

val = 0;

sys/arch/xen/xen/xbd_xenbus.c

777

if (val > 0)

sys/arch/xen/xen/xbd_xenbus.c

781

"feature-barrier", &val, 10);

sys/arch/xen/xen/xbd_xenbus.c

783

val = 0;

sys/arch/xen/xen/xbd_xenbus.c

784

if (val > 0)

sys/arch/xen/xen/xbd_xenbus.c

788

"feature-max-indirect-segments", &val, 10);

sys/arch/xen/xen/xbd_xenbus.c

790

val = 0;

sys/arch/xen/xen/xbd_xenbus.c

791

if (val >= (MAXPHYS >> PAGE_SHIFT) + 1) {

sys/arch/xen/xen/xengnt.c

475

xen_atomic_cmpxchg16(volatile uint16_t *ptr, uint16_t val, uint16_t newval)

sys/arch/xen/xen/xengnt.c

482

:"q"(newval), "m" (*ptr), "0" (val)

sys/arch/xen/xenbus/xenbus_xs.c

398

const char *dir, const char *node, unsigned long *val,

sys/arch/xen/xenbus/xenbus_xs.c

407

*val = strtoul(string, &ep, base);

sys/arch/xen/xenbus/xenbus_xs.c

417

const char *dir, const char *node, unsigned long long *val,

sys/arch/xen/xenbus/xenbus_xs.c

426

*val = strtoull(string, &ep, base);

sys/arch/zaurus/dev/ioexp.c

72

ioexp_write(struct ioexp_softc *sc, uint8_t reg, uint8_t val)

sys/arch/zaurus/dev/ioexp.c

79

data = val;

sys/arch/zaurus/dev/scoop_pcic.c

189

scoop_pcic_write(struct pxapcic_socket *so, int reg, u_int val)

sys/arch/zaurus/dev/scoop_pcic.c

203

if (val == PXAPCIC_POWER_3V)

sys/arch/zaurus/dev/scoop_pcic.c

205

else if (val == PXAPCIC_POWER_5V)

sys/arch/zaurus/dev/scoop_pcic.c

213

val ? SCP_CCR_RESET : 0);

sys/arch/zaurus/dev/wm8731_zaudio.c

175

wm8731_write(struct zaudio_softc *sc, int reg, int val)

sys/arch/zaurus/dev/wm8731_zaudio.c

181

tmp = (reg << 9) | (val & 0x1ff);

sys/arch/zaurus/dev/wm8731_zaudio.c

537

uint16_t val = WM8731_CLKOUTPD | WM8731_OSCPD | WM8731_LINEINPD;

sys/arch/zaurus/dev/wm8731_zaudio.c

541

val |= WM8731_ADCPD | WM8731_MICPD;

sys/arch/zaurus/dev/wm8731_zaudio.c

543

val |= WM8731_OUTPD | WM8731_DACPD;

sys/arch/zaurus/dev/wm8731_zaudio.c

545

wm8731_write(sc, WM8731_PD_REG, val);

sys/arch/zaurus/dev/wm8731_zaudio.c

552

val = WM8731_OUTPD | WM8731_DACPD;

sys/arch/zaurus/dev/wm8731_zaudio.c

554

val |= WM8731_ADCPD | WM8731_MICPD;

sys/arch/zaurus/dev/wm8731_zaudio.c

556

wm8731_write(sc, WM8731_PD_REG, val);

sys/arch/zaurus/dev/wm8750_zaudio.c

207

wm8750_write(struct zaudio_softc *sc, int reg, int val)

sys/arch/zaurus/dev/wm8750_zaudio.c

213

tmp = (reg << 9) | (val & 0x1ff);

sys/arch/zaurus/dev/wm8750_zaudio.c

590

uint16_t val;

sys/arch/zaurus/dev/wm8750_zaudio.c

594

val = PWRMGMT2_DACL | PWRMGMT2_DACR;

sys/arch/zaurus/dev/wm8750_zaudio.c

596

val |= PWRMGMT2_LOUT2 | PWRMGMT2_ROUT2;

sys/arch/zaurus/dev/wm8750_zaudio.c

598

val |= PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1;

sys/arch/zaurus/dev/wm8750_zaudio.c

599

wm8750_write(sc, PWRMGMT2_REG, val);

sys/arch/zaurus/dev/wm8750_zaudio.c

605

val = PWRMGMT1_SET_VMIDSEL(1) | PWRMGMT1_VREF;

sys/arch/zaurus/dev/wm8750_zaudio.c

607

val |= PWRMGMT1_AINL | PWRMGMT1_AINR

sys/arch/zaurus/dev/wm8750_zaudio.c

610

wm8750_write(sc, PWRMGMT1_REG, val);

sys/arch/zaurus/dev/zapm.c

399

int val;

sys/arch/zaurus/dev/zapm.c

402

CONFIG_HOOK_ACADAPTER, &val) != -1)

sys/arch/zaurus/dev/zapm.c

403

pinfo->ac_state = val;

sys/arch/zaurus/dev/zapm.c

409

CONFIG_HOOK_CHARGE, &val) != -1)

sys/arch/zaurus/dev/zapm.c

410

pinfo->battery_state = val;

sys/arch/zaurus/dev/zapm.c

427

CONFIG_HOOK_BATTERYVAL, &val) != -1)

sys/arch/zaurus/dev/zapm.c

428

pinfo->battery_life = val;

sys/arch/zaurus/dev/zapm.c

701

int val[5];

sys/arch/zaurus/dev/zapm.c

710

val[i] = max1111_adc_value(chan);

sys/arch/zaurus/dev/zapm.c

713

DPRINTF(("max1111_adc_value_avg: chan[%d] = %d\n", i, val[i]));

sys/arch/zaurus/dev/zapm.c

717

v = val[0];

sys/arch/zaurus/dev/zapm.c

720

if (v < val[i]) {

sys/arch/zaurus/dev/zapm.c

721

v = val[i];

sys/arch/zaurus/dev/zapm.c

727

v = val[4];

sys/arch/zaurus/dev/zapm.c

730

if (v > val[i]) {

sys/arch/zaurus/dev/zapm.c

731

v = val[i];

sys/arch/zaurus/dev/zapm.c

741

sum += val[i];

sys/arch/zaurus/dev/zaudiovar.h

77

#define UNMUTE(sc,op,val) sc->sc_unmute[op] = sc->sc_unmute_toggle[op] = val

sys/arch/zaurus/dev/zrc.c

331

int val;

sys/arch/zaurus/dev/zrc.c

343

val = zssp_read_max1111(MAXCTRL_PD0 | MAXCTRL_PD1 | MAXCTRL_SGL |

sys/arch/zaurus/dev/zrc.c

347

if (val >= zrc_akeytab[i].min)

sys/arch/zaurus/dev/zssp.c

375

uint32_t val;

sys/arch/zaurus/dev/zssp.c

406

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR);

sys/arch/zaurus/dev/zssp.c

412

return val;

sys/compat/linux/arch/aarch64/linux_syscallargs.h

473

syscallarg(int) val;

sys/compat/linux/arch/aarch64/linux_systrace_args.c

693

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux/arch/alpha/linux_syscallargs.h

932

syscallarg(int) val;

sys/compat/linux/arch/amd64/linux_syscallargs.h

716

syscallarg(int) val;

sys/compat/linux/arch/amd64/linux_syscallargs.h

831

syscallarg(int) val;

sys/compat/linux/arch/amd64/linux_systrace_args.c

1336

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux/arch/amd64/linux_systrace_args.c

1488

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux/arch/arm/linux_ptrace.c

106

void *val;

sys/compat/linux/arch/arm/linux_ptrace.c

210

val = (void *)pcb->pcb_user_pid_ro;

sys/compat/linux/arch/arm/linux_ptrace.c

211

error = copyout(&val, (void *)SCARG(uap, data), sizeof(val));

sys/compat/linux/arch/arm/linux_syscallargs.h

898

syscallarg(int) val;

sys/compat/linux/arch/arm/linux_systrace_args.c

1578

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux/arch/i386/linux_machdep.c

1024

if (kauth_authorize_machdep(l->l_cred, SCARG(uap, val) ?

sys/compat/linux/arch/i386/linux_machdep.c

1028

if (SCARG(uap, val))

sys/compat/linux/arch/i386/linux_syscallargs.h

366

syscallarg(int) val;

sys/compat/linux/arch/i386/linux_syscallargs.h

927

syscallarg(int) val;

sys/compat/linux/arch/i386/linux_systrace_args.c

1617

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux/arch/i386/linux_systrace_args.c

684

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux/arch/m68k/linux_syscallargs.h

885

syscallarg(int) val;

sys/compat/linux/arch/mips/linux_syscallargs.h

317

syscallarg(int) val;

sys/compat/linux/arch/mips/linux_syscallargs.h

939

syscallarg(int) val;

sys/compat/linux/arch/powerpc/linux_syscallargs.h

823

syscallarg(int) val;

sys/compat/linux/common/linux_file.c

295

u_long val;

sys/compat/linux/common/linux_file.c

335

val = linux_to_bsd_ioflags((unsigned long)SCARG(uap, arg));

sys/compat/linux/common/linux_file.c

352

if (val & O_ASYNC) {

sys/compat/linux/common/linux_file.c

358

val &= ~O_ASYNC;

sys/compat/linux/common/linux_file.c

368

SCARG(&fca, arg) = (void *) val;

sys/compat/linux/common/linux_ipc.c

274

semun.val = SCARG(uap, arg).l_val;

sys/compat/linux/common/linux_misc.c

1699

SCARG(uap, val), tsp, SCARG(uap, uaddr2), val2,

sys/compat/linux/common/linux_misc.c

1704

linux_do_futex(int *uaddr, int op, int val, struct timespec *timeout,

sys/compat/linux/common/linux_misc.c

1716

val, timeout, uaddr2, val2, val3, retval);

sys/compat/linux/common/linux_mod.c

130

int error, val;

sys/compat/linux/common/linux_mod.c

132

val = *(int *)rnode->sysctl_data;

sys/compat/linux/common/linux_mod.c

135

node.sysctl_data = &val;

sys/compat/linux/common/linux_mod.c

141

if (val == *(int *)rnode->sysctl_data)

sys/compat/linux/common/linux_mod.c

144

if (val == 1)

sys/compat/linux/common/linux_mod.c

146

else if (val == 0)

sys/compat/linux/common/linux_mod.c

154

*(int *)rnode->sysctl_data = val;

sys/compat/linux/common/linux_socket.c

1048

SCARG(&bsa, val) = SCARG(uap, optval);

sys/compat/linux/common/linux_socket.c

1122

SCARG(&bga, val) = SCARG(uap, optval);

sys/compat/linux/common/linux_socket.c

353

int val = 0;

sys/compat/linux/common/linux_socket.c

357

&val, sizeof(val));

sys/compat/linux/common/linux_statfs.h

124

lsp->l_ffsid.val[0] = bsp->f_fsidx.__fsid_val[0];

sys/compat/linux/common/linux_statfs.h

125

lsp->l_ffsid.val[1] = bsp->f_fsidx.__fsid_val[1];

sys/compat/linux/common/linux_statfs.h

84

lsp->l_ffsid.val[0] = bsp->f_fsidx.__fsid_val[0];

sys/compat/linux/common/linux_statfs.h

85

lsp->l_ffsid.val[1] = bsp->f_fsidx.__fsid_val[1];

sys/compat/linux/common/linux_types.h

67

int val[2];

sys/compat/linux32/arch/aarch64/linux32_syscallargs.h

791

syscallarg(int) val;

sys/compat/linux32/arch/aarch64/linux32_systrace_args.c

1519

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux32/arch/amd64/linux32_syscallargs.h

807

syscallarg(int) val;

sys/compat/linux32/arch/amd64/linux32_systrace_args.c

1551

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux32/arch/amd64/linux32_systrace_args.c

649

iarg[2] = SCARG(p, val); /* int */

sys/compat/linux32/common/linux32_ipccall.c

330

bsem.val = lsem.l_val;

sys/compat/linux32/common/linux32_misc.c

269

SCARG(uap, val), tsp, SCARG_P32(uap, uaddr2), val2,

sys/compat/linux32/common/linux32_mod.c

101

if (val == *(int *)rnode->sysctl_data)

sys/compat/linux32/common/linux32_mod.c

104

if (val == 1)

sys/compat/linux32/common/linux32_mod.c

106

else if (val == 0)

sys/compat/linux32/common/linux32_mod.c

115

*(int *)rnode->sysctl_data = val;

sys/compat/linux32/common/linux32_mod.c

90

int error, val;

sys/compat/linux32/common/linux32_mod.c

92

val = *(int *)rnode->sysctl_data;

sys/compat/linux32/common/linux32_mod.c

95

node.sysctl_data = &val;

sys/compat/netbsd32/netbsd32.h

627

int val; /* value for SETVAL */

sys/compat/netbsd32/netbsd32.h

634

int val; /* value for SETVAL */

sys/compat/netbsd32/netbsd32_compat_50_sysv.c

113

karg.val = karg32.val;

sys/compat/netbsd32/netbsd32_futex.c

80

SCARG(uap, val), tsp, SCARG_P32(uap, uaddr2), SCARG(uap, val2),

sys/compat/netbsd32/netbsd32_ipc.c

165

karg.val = karg32.val;

sys/compat/netbsd32/netbsd32_netbsd.c

1042

NETBSD32TOP_UAP(val, void);

sys/compat/netbsd32/netbsd32_netbsd.c

1063

NETBSD32TOP_UAP(val, void);

sys/compat/netbsd32/netbsd32_netbsd.c

2646

NETBSD32TO64_UAP(val);

sys/compat/netbsd32/netbsd32_netbsd.c

944

NETBSD32TOP_UAP(val, void);

sys/compat/netbsd32/netbsd32_syscallargs.h

1025

syscallarg(netbsd32_voidp) val;

sys/compat/netbsd32/netbsd32_syscallargs.h

1435

syscallarg(unsigned int) val;

sys/compat/netbsd32/netbsd32_syscallargs.h

568

syscallarg(netbsd32_voidp) val;

sys/compat/netbsd32/netbsd32_syscallargs.h

637

syscallarg(netbsd32_voidp) val;

sys/compat/netbsd32/netbsd32_syscallargs.h

877

syscallarg(int) val;

sys/compat/netbsd32/netbsd32_systrace_args.c

1203

iarg[2] = SCARG(p, val); /* int */

sys/compat/netbsd32/netbsd32_systrace_args.c

1393

uarg[3] = (intptr_t) SCARG(p, val).i32; /* netbsd32_voidp */

sys/compat/netbsd32/netbsd32_systrace_args.c

1935

uarg[0] = SCARG(p, val); /* unsigned int */

sys/compat/netbsd32/netbsd32_systrace_args.c

788

uarg[3] = (intptr_t) SCARG(p, val).i32; /* netbsd32_voidp */

sys/compat/netbsd32/netbsd32_systrace_args.c

879

uarg[3] = (intptr_t) SCARG(p, val).i32; /* netbsd32_voidp */

sys/compat/sunos/sunos_misc.c

580

if (SCARG(uap, val)) {

sys/compat/sunos/sunos_misc.c

581

error = copyin(SCARG(uap, val), sopt.sopt_data,

sys/compat/sunos/sunos_syscallargs.h

248

syscallarg(void *) val;

sys/compat/sunos32/sunos32_misc.c

798

if (SCARG_P32(uap, val)) {

sys/compat/sunos32/sunos32_misc.c

799

error = copyin(SCARG_P32(uap, val), sopt.sopt_data,

sys/compat/sunos32/sunos32_syscallargs.h

260

syscallarg(netbsd32_caddr_t) val;

sys/compat/ultrix/ultrix_misc.c

343

SCARG(&ap, val) = SCARG(uap, val);

sys/compat/ultrix/ultrix_misc.c

383

if (SCARG(&ap, val)) {

sys/compat/ultrix/ultrix_misc.c

384

error = copyin(SCARG(&ap, val), sopt.sopt_data,

sys/compat/ultrix/ultrix_syscallargs.h

240

syscallarg(void *) val;

sys/crypto/aes/arch/arm/aes_neon.c

604

uint8x16_t x0 = x.val[0], x1 = x.val[1];

sys/crypto/aes/arch/arm/aes_neon.c

641

return (uint8x16x2_t) { .val = {

sys/crypto/aes/arch/arm/aes_neon.c

693

uint8x16_t x0 = x.val[0], x1 = x.val[1];

sys/crypto/aes/arch/arm/aes_neon.c

736

return (uint8x16x2_t) { .val = {

sys/crypto/aes/arch/arm/aes_neon_impl.h

54

return (uint8x16x2_t) { .val = {

sys/crypto/aes/arch/arm/aes_neon_impl.h

55

[0] = aes_neon_enc1(enc, b2.val[0], nrounds),

sys/crypto/aes/arch/arm/aes_neon_impl.h

56

[1] = aes_neon_enc1(enc, b2.val[1], nrounds),

sys/crypto/aes/arch/arm/aes_neon_impl.h

64

return (uint8x16x2_t) { .val = {

sys/crypto/aes/arch/arm/aes_neon_impl.h

65

[0] = aes_neon_dec1(dec, b2.val[0], nrounds),

sys/crypto/aes/arch/arm/aes_neon_impl.h

66

[1] = aes_neon_dec1(dec, b2.val[1], nrounds),

sys/crypto/aes/arch/arm/aes_neon_subr.c

127

b2.val[1] = cv;

sys/crypto/aes/arch/arm/aes_neon_subr.c

128

b2.val[0] = cv = loadblock(in + nbytes - 32);

sys/crypto/aes/arch/arm/aes_neon_subr.c

130

storeblock(out + nbytes - 16, cv ^ b2.val[1]);

sys/crypto/aes/arch/arm/aes_neon_subr.c

132

b = b2.val[0];

sys/crypto/aes/arch/arm/aes_neon_subr.c

136

storeblock(out + nbytes, cv ^ b2.val[0]);

sys/crypto/aes/arch/arm/aes_neon_subr.c

227

b2.val[0] = t ^ loadblock(in);

sys/crypto/aes/arch/arm/aes_neon_subr.c

228

b2.val[1] = t1 ^ loadblock(in + 16);

sys/crypto/aes/arch/arm/aes_neon_subr.c

230

storeblock(out, b2.val[0] ^ t);

sys/crypto/aes/arch/arm/aes_neon_subr.c

231

storeblock(out + 16, b2.val[1] ^ t1);

sys/crypto/aes/arch/arm/aes_neon_subr.c

264

b2.val[0] = t ^ loadblock(in);

sys/crypto/aes/arch/arm/aes_neon_subr.c

265

b2.val[1] = t1 ^ loadblock(in + 16);

sys/crypto/aes/arch/arm/aes_neon_subr.c

267

storeblock(out, b2.val[0] ^ t);

sys/crypto/aes/arch/arm/aes_neon_subr.c

268

storeblock(out + 16, b2.val[1] ^ t1);

sys/crypto/aes/arch/arm/aes_neon_subr.c

312

b2.val[0] = auth ^ ptxt;

sys/crypto/aes/arch/arm/aes_neon_subr.c

313

b2.val[1] = ctr_be;

sys/crypto/aes/arch/arm/aes_neon_subr.c

315

auth = b2.val[0];

sys/crypto/aes/arch/arm/aes_neon_subr.c

316

storeblock(out, ptxt ^ b2.val[1]);

sys/crypto/aes/arch/arm/aes_neon_subr.c

353

b2.val[0] = auth;

sys/crypto/aes/arch/arm/aes_neon_subr.c

354

b2.val[1] = ctr_be;

sys/crypto/aes/arch/arm/aes_neon_subr.c

356

auth = b2.val[0];

sys/crypto/aes/arch/arm/aes_neon_subr.c

357

pad = b2.val[1];

sys/crypto/arch/arm/arm_neon.h

46

typedef struct { uint8x16_t val[2]; } uint8x16x2_t;

sys/crypto/arch/arm/arm_neon.h

59

typedef struct { uint8x8_t val[2]; } uint8x8x2_t;

sys/crypto/arch/arm/arm_neon.h

60

typedef struct { uint8x16_t val[2]; } uint8x16x2_t;

sys/crypto/arch/arm/arm_neon.h

708

__tab.val[0] = __builtin_shufflevector(__tab.val[0], __tab.val[0],

sys/crypto/arch/arm/arm_neon.h

710

__tab.val[1] = __builtin_shufflevector(__tab.val[1], __tab.val[1],

sys/crypto/arch/arm/arm_neon.h

714

__ret = (uint8x8_t)__builtin_neon_vtbl2_v((int8x8_t)__tab.val[0],

sys/crypto/arch/arm/arm_neon.h

715

(int8x8_t)__tab.val[1], (int8x8_t)__idx, 16);

sys/crypto/arch/arm/arm_neon.h

92

typedef struct { uint8x8_t val[2]; } uint8x8x2_t;

sys/crypto/arch/arm/arm_neon.h

93

typedef struct { uint8x16_t val[2]; } uint8x16x2_t;

sys/ddb/db_access.c

133

db_expr_t val;

sys/ddb/db_access.c

136

if (!db_value_of_name(name, &val)) {

sys/ddb/db_access.c

141

db_read_bytes((db_addr_t)val, sizeof(p), (char *)&p);

sys/ddb/db_access.c

148

db_expr_t val;

sys/ddb/db_access.c

151

if (!db_value_of_name(name, &val)) {

sys/ddb/db_access.c

156

db_read_bytes((db_addr_t)val, sizeof(p), (char *)&p);

sys/ddb/db_lex.c

162

db_num_to_str(db_expr_t val)

sys/ddb/db_lex.c

175

db_num_to_strbuf(val, buf, sizeof(buf));

sys/ddb/db_lex.c

181

db_num_to_strbuf(db_expr_t val, char *buf, size_t len)

sys/ddb/db_lex.c

185

snprintf(buf, len, "%" DDB_EXPR_FMT "x", val);

sys/ddb/db_lex.c

187

snprintf(buf, len, "%" DDB_EXPR_FMT "o", val);

sys/ddb/db_lex.c

189

snprintf(buf, len, "%" DDB_EXPR_FMT "u", val);

sys/ddb/db_output.c

220

db_format_radix(char *buf, size_t bufsiz, quad_t val, int altflag)

sys/ddb/db_output.c

225

db_format_hex(buf, bufsiz, val, altflag);

sys/ddb/db_output.c

234

if (val < 0)

sys/ddb/db_output.c

235

val = -val;

sys/ddb/db_output.c

239

snprintf(buf, bufsiz, fmt, val);

sys/ddb/db_output.c

246

db_format_hex(char *buf, size_t bufsiz, quad_t val, int altflag)

sys/ddb/db_output.c

249

const char *fmt = (altflag && val) ? "-%#qx" : "-%qx";

sys/ddb/db_output.c

251

if (val < 0)

sys/ddb/db_output.c

252

val = -val;

sys/ddb/db_output.c

256

snprintf(buf, bufsiz, fmt, val);

sys/ddb/db_sym.c

116

val = (long) uval;

sys/ddb/db_sym.c

117

*valuep = (db_expr_t)val;

sys/ddb/db_sym.c

121

val = (long) uval;

sys/ddb/db_sym.c

122

*valuep = (db_expr_t)val;

sys/ddb/db_sym.c

213

db_search_symbol(db_addr_t val, db_strategy_t strategy, db_expr_t *offp)

sys/ddb/db_sym.c

231

(NULL, val, strategy, &newdiff);

sys/ddb/db_sym.c

242

if (ksyms_getname(&mod, &sym, (vaddr_t)val, strategy) == 0) {

sys/ddb/db_sym.c

244

diff = val - (db_addr_t)naddr;

sys/ddb/db_sym.c

313

unsigned long val;

sys/ddb/db_sym.c

351

(void)ksyms_getval_unlocked(mod, name, NULL, &val, KSYMS_ANY);

sys/ddb/db_sym.c

352

if (strategy & KSYMS_PROC && val == off) {

sys/ddb/db_sym.c

356

(void)ksyms_getval_unlocked(mod, name, NULL, &val, KSYMS_ANY);

sys/ddb/db_sym.c

358

if (((off - val) < db_maxoff) && val) {

sys/ddb/db_sym.c

360

if (off - val) {

sys/ddb/db_sym.c

363

24, off - val, true);

sys/ddb/db_sym.c

390

long val;

sys/ddb/db_sym.c

437

val = (long) uval;

sys/ddb/db_sym.c

438

if (((off - val) < db_maxoff) && val) {

sys/ddb/db_sym.c

440

if (off - val) {

sys/ddb/db_sym.c

443

db_format_radix(tbuf, 24, off - val, true);

sys/ddb/db_sym.c

93

long val;

sys/ddb/db_sym.h

106

#define db_find_sym_and_offset(val,namep,offp) \

sys/ddb/db_sym.h

107

db_symbol_values(db_search_symbol(val,DB_STGY_ANY,offp),namep,0)

sys/ddb/db_sym.h

110

#define db_find_xtrn_sym_and_offset(val,namep,offp) \

sys/ddb/db_sym.h

111

db_symbol_values(db_search_symbol(val,DB_STGY_XTRN,offp),namep,0)

sys/dev/acpi/acpi_bat.c

302

ACPI_INTEGER val;

sys/dev/acpi/acpi_bat.c

305

rv = acpi_eval_integer(sc->sc_node->ad_handle, "_STA", &val);

sys/dev/acpi/acpi_bat.c

314

if ((val & ACPI_STA_BATTERY_PRESENT) == 0) {

sys/dev/acpi/acpi_bat.c

361

uint64_t val;

sys/dev/acpi/acpi_bat.c

400

val = elm[ACPIBAT_BIF_DCAPACITY].Integer.Value;

sys/dev/acpi/acpi_bat.c

401

sc->sc_sensor[ACPIBAT_DCAPACITY].value_cur = val * 1000;

sys/dev/acpi/acpi_bat.c

402

sc->sc_sensor[ACPIBAT_DCAPACITY].state = ACPIBAT_VAL_ISVALID(val);

sys/dev/acpi/acpi_bat.c

405

val = elm[ACPIBAT_BIF_LFCCAPACITY].Integer.Value;

sys/dev/acpi/acpi_bat.c

406

sc->sc_sensor[ACPIBAT_LFCCAPACITY].value_cur = val * 1000;

sys/dev/acpi/acpi_bat.c

407

sc->sc_sensor[ACPIBAT_LFCCAPACITY].state = ACPIBAT_VAL_ISVALID(val);

sys/dev/acpi/acpi_bat.c

410

val = elm[ACPIBAT_BIF_DVOLTAGE].Integer.Value;

sys/dev/acpi/acpi_bat.c

411

sc->sc_sensor[ACPIBAT_DVOLTAGE].value_cur = val * 1000;

sys/dev/acpi/acpi_bat.c

412

sc->sc_sensor[ACPIBAT_DVOLTAGE].state = ACPIBAT_VAL_ISVALID(val);

sys/dev/acpi/acpi_bat.c

422

val = sc->sc_sensor[ACPIBAT_LFCCAPACITY].value_cur;

sys/dev/acpi/acpi_bat.c

423

sc->sc_sensor[ACPIBAT_CAPACITY].value_max = val;

sys/dev/acpi/acpi_bat.c

523

uint64_t val;

sys/dev/acpi/acpi_bat.c

563

val = elm[ACPIBAT_BST_CAPACITY].Integer.Value;

sys/dev/acpi/acpi_bat.c

564

sc->sc_sensor[ACPIBAT_CAPACITY].value_cur = val * 1000;

sys/dev/acpi/acpi_bat.c

565

sc->sc_sensor[ACPIBAT_CAPACITY].state = ACPIBAT_VAL_ISVALID(val);

sys/dev/acpi/acpi_bat.c

568

val = elm[ACPIBAT_BST_VOLTAGE].Integer.Value;

sys/dev/acpi/acpi_bat.c

569

sc->sc_sensor[ACPIBAT_VOLTAGE].value_cur = val * 1000;

sys/dev/acpi/acpi_bat.c

570

sc->sc_sensor[ACPIBAT_VOLTAGE].state = ACPIBAT_VAL_ISVALID(val);

sys/dev/acpi/acpi_cppc.c

228

ACPI_INTEGER val;

sys/dev/acpi/acpi_cppc.c

236

rv = cppc_read(sc, CPCDesiredPerformanceReg, &val);

sys/dev/acpi/acpi_cppc.c

243

rv = cppc_read(sc, CPCDesiredPerformanceReg, &val);

sys/dev/acpi/acpi_cppc.c

248

if (val > UINT32_MAX) {

sys/dev/acpi/acpi_cppc.c

251

fq = (u_int)cppc_perf_to_freq(sc, val);

sys/dev/acpi/acpi_cppc.c

412

cppc_read(struct cppc_softc *sc, CPCPackageElement index, ACPI_INTEGER *val)

sys/dev/acpi/acpi_cppc.c

425

*val = obj->Integer.Value;

sys/dev/acpi/acpi_cppc.c

436

rv = pcc_message(&addr, CPPC_PCC_READ, PCC_READ, val);

sys/dev/acpi/acpi_cppc.c

438

rv = AcpiRead(val, &addr);

sys/dev/acpi/acpi_cppc.c

453

cppc_write(struct cppc_softc *sc, CPCPackageElement index, ACPI_INTEGER val)

sys/dev/acpi/acpi_cppc.c

472

rv = pcc_message(&addr, CPPC_PCC_WRITE, PCC_WRITE, &val);

sys/dev/acpi/acpi_cppc.c

474

rv = AcpiWrite(val, &addr);

sys/dev/acpi/acpi_cpu.c

440

acpicpu_cap_osc(struct acpicpu_softc *sc, uint32_t flags, uint32_t *val)

sys/dev/acpi/acpi_cpu.c

540

*val = (ptr[1] != 0) ? ptr[1] : cap[1];

sys/dev/acpi/acpi_cpu.c

828

acpicpu_debug_print_method_c(uint8_t val)

sys/dev/acpi/acpi_cpu.c

831

if (val == ACPICPU_C_STATE_FFH)

sys/dev/acpi/acpi_cpu.c

834

if (val == ACPICPU_C_STATE_HALT)

sys/dev/acpi/acpi_cpu.c

837

if (val == ACPICPU_C_STATE_SYSIO)

sys/dev/acpi/acpi_cpu.c

844

acpicpu_debug_print_method_pt(uint8_t val)

sys/dev/acpi/acpi_cpu.c

846

if (val == ACPI_ADR_SPACE_SYSTEM_MEMORY)

sys/dev/acpi/acpi_cpu.c

849

if (val == ACPI_ADR_SPACE_SYSTEM_IO)

sys/dev/acpi/acpi_cpu.c

852

if (val == ACPI_ADR_SPACE_FIXED_HARDWARE)

sys/dev/acpi/acpi_cpu.c

859

acpicpu_debug_print_dep(uint32_t val)

sys/dev/acpi/acpi_cpu.c

862

switch (val) {

sys/dev/acpi/acpi_cpu.h

292

} val;

sys/dev/acpi/acpi_cpu.h

301

val.u64 = 0;

sys/dev/acpi/acpi_cpu.h

303

AcpiOsReadPort(reg->reg_addr, &val.u32,

sys/dev/acpi/acpi_cpu.h

306

AcpiOsReadMemory(reg->reg_addr, &val.u64,

sys/dev/acpi/acpi_cpu.h

310

return (uint32_t)__SHIFTOUT(val.u64, reg_mask);

sys/dev/acpi/acpi_cpu.h

327

} val;

sys/dev/acpi/acpi_cpu.h

336

val.u64 = 0;

sys/dev/acpi/acpi_cpu.h

338

AcpiOsReadPort(reg->reg_addr, &val.u32,

sys/dev/acpi/acpi_cpu.h

341

AcpiOsReadMemory(reg->reg_addr, &val.u64,

sys/dev/acpi/acpi_cpu.h

344

val.u64 &= ~reg_mask;

sys/dev/acpi/acpi_cpu.h

345

val.u64 |= __SHIFTIN(newval, reg_mask);

sys/dev/acpi/acpi_cpu.h

347

AcpiOsWritePort(reg->reg_addr, val.u32,

sys/dev/acpi/acpi_cpu.h

350

AcpiOsWriteMemory(reg->reg_addr, val.u64,

sys/dev/acpi/acpi_cpu_cstate.c

398

const uint8_t val = AcpiGbl_FADT.CstControl;

sys/dev/acpi/acpi_cpu_cstate.c

401

if (addr == 0 || val == 0)

sys/dev/acpi/acpi_cpu_cstate.c

404

(void)AcpiOsWritePort(addr, val, 8);

sys/dev/acpi/acpi_cpu_cstate.c

430

uint32_t val;

sys/dev/acpi/acpi_cpu_cstate.c

479

val = elm[1].Integer.Value;

sys/dev/acpi/acpi_cpu_cstate.c

481

if (val != 0)

sys/dev/acpi/acpi_cpu_cstate.c

484

val = elm[3].Integer.Value;

sys/dev/acpi/acpi_cpu_cstate.c

486

if (val < ACPICPU_DEP_SW_ALL || val > ACPICPU_DEP_HW_ALL) {

sys/dev/acpi/acpi_cpu_cstate.c

491

val = elm[4].Integer.Value;

sys/dev/acpi/acpi_cpu_cstate.c

493

if (val > sc->sc_ncpus) {

sys/dev/acpi/acpi_cpu_cstate.c

747

uint32_t val;

sys/dev/acpi/acpi_cpu_cstate.c

768

(void)AcpiOsReadPort(cs->cs_addr, &val, 8);

sys/dev/acpi/acpi_cpu_cstate.c

787

uint32_t val = 0;

sys/dev/acpi/acpi_cpu_cstate.c

790

rv = AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &val);

sys/dev/acpi/acpi_cpu_cstate.c

792

if (ACPI_FAILURE(rv) || val == 0)

sys/dev/acpi/acpi_cpu_pstate.c

619

uint32_t val;

sys/dev/acpi/acpi_cpu_pstate.c

668

val = elm[1].Integer.Value;

sys/dev/acpi/acpi_cpu_pstate.c

670

if (val != 0)

sys/dev/acpi/acpi_cpu_pstate.c

673

val = elm[3].Integer.Value;

sys/dev/acpi/acpi_cpu_pstate.c

675

if (val < ACPICPU_DEP_SW_ALL || val > ACPICPU_DEP_HW_ALL) {

sys/dev/acpi/acpi_cpu_pstate.c

680

val = elm[4].Integer.Value;

sys/dev/acpi/acpi_cpu_pstate.c

682

if (val > sc->sc_ncpus) {

sys/dev/acpi/acpi_cpu_pstate.c

705

ACPI_INTEGER val;

sys/dev/acpi/acpi_cpu_pstate.c

714

rv = acpi_eval_integer(sc->sc_node->ad_handle, "_PPC", &val);

sys/dev/acpi/acpi_cpu_pstate.c

716

if (ACPI_SUCCESS(rv) && val < sc->sc_pstate_count) {

sys/dev/acpi/acpi_cpu_pstate.c

718

if (sc->sc_pstate[val].ps_freq != 0) {

sys/dev/acpi/acpi_cpu_pstate.c

719

sc->sc_pstate_max = val;

sys/dev/acpi/acpi_cpu_pstate.c

730

ACPI_INTEGER val;

sys/dev/acpi/acpi_cpu_pstate.c

738

rv = acpi_eval_integer(sc->sc_node->ad_handle, "_PDL", &val);

sys/dev/acpi/acpi_cpu_pstate.c

740

if (ACPI_SUCCESS(rv) && val < sc->sc_pstate_count) {

sys/dev/acpi/acpi_cpu_pstate.c

742

if (sc->sc_pstate[val].ps_freq == 0)

sys/dev/acpi/acpi_cpu_pstate.c

745

if (val >= sc->sc_pstate_max) {

sys/dev/acpi/acpi_cpu_pstate.c

746

sc->sc_pstate_min = val;

sys/dev/acpi/acpi_cpu_pstate.c

760

static int val = 0;

sys/dev/acpi/acpi_cpu_pstate.c

768

if (val == 0)

sys/dev/acpi/acpi_cpu_pstate.c

769

val = acpicpu_pstate_min(sc);

sys/dev/acpi/acpi_cpu_pstate.c

798

const uint8_t val = AcpiGbl_FADT.PstateControl;

sys/dev/acpi/acpi_cpu_pstate.c

801

if (addr == 0 || val == 0)

sys/dev/acpi/acpi_cpu_pstate.c

804

(void)AcpiOsWritePort(addr, val, 8);

sys/dev/acpi/acpi_cpu_pstate.c

813

uint32_t freq, i, val = 0;

sys/dev/acpi/acpi_cpu_pstate.c

855

val = acpicpu_readreg(&sc->sc_pstate_status);

sys/dev/acpi/acpi_cpu_pstate.c

857

if (val == 0) {

sys/dev/acpi/acpi_cpu_pstate.c

867

if (val == sc->sc_pstate[i].ps_status) {

sys/dev/acpi/acpi_cpu_pstate.c

909

uint32_t freq, i, val;

sys/dev/acpi/acpi_cpu_pstate.c

976

for (i = val = 0; i < ACPICPU_P_STATE_RETRY; i++) {

sys/dev/acpi/acpi_cpu_pstate.c

978

val = acpicpu_readreg(&sc->sc_pstate_status);

sys/dev/acpi/acpi_cpu_pstate.c

980

if (val == ps->ps_status)

sys/dev/acpi/acpi_cpu_tstate.c

304

uint32_t val[5];

sys/dev/acpi/acpi_cpu_tstate.c

324

val[i] = elm[i].Integer.Value;

sys/dev/acpi/acpi_cpu_tstate.c

330

*p = val[i];

sys/dev/acpi/acpi_cpu_tstate.c

466

uint32_t val;

sys/dev/acpi/acpi_cpu_tstate.c

515

val = elm[1].Integer.Value;

sys/dev/acpi/acpi_cpu_tstate.c

517

if (val != 0)

sys/dev/acpi/acpi_cpu_tstate.c

520

val = elm[3].Integer.Value;

sys/dev/acpi/acpi_cpu_tstate.c

522

if (val < ACPICPU_DEP_SW_ALL || val > ACPICPU_DEP_HW_ALL) {

sys/dev/acpi/acpi_cpu_tstate.c

527

val = elm[4].Integer.Value;

sys/dev/acpi/acpi_cpu_tstate.c

529

if (val > sc->sc_ncpus) {

sys/dev/acpi/acpi_cpu_tstate.c

614

ACPI_INTEGER val;

sys/dev/acpi/acpi_cpu_tstate.c

630

rv = acpi_eval_integer(sc->sc_node->ad_handle, "_TPC", &val);

sys/dev/acpi/acpi_cpu_tstate.c

632

if (ACPI_SUCCESS(rv) && val < sc->sc_tstate_count) {

sys/dev/acpi/acpi_cpu_tstate.c

634

if (sc->sc_tstate[val].ts_percent != 0)

sys/dev/acpi/acpi_cpu_tstate.c

635

sc->sc_tstate_max = val;

sys/dev/acpi/acpi_cpu_tstate.c

638

rv = acpi_eval_integer(sc->sc_node->ad_handle, "_TDL", &val);

sys/dev/acpi/acpi_cpu_tstate.c

640

if (ACPI_SUCCESS(rv) && val < sc->sc_tstate_count) {

sys/dev/acpi/acpi_cpu_tstate.c

642

if (val >= sc->sc_tstate_max &&

sys/dev/acpi/acpi_cpu_tstate.c

643

sc->sc_tstate[val].ts_percent != 0)

sys/dev/acpi/acpi_cpu_tstate.c

644

sc->sc_tstate_min = val;

sys/dev/acpi/acpi_cpu_tstate.c

663

uint32_t i, val = 0;

sys/dev/acpi/acpi_cpu_tstate.c

707

val = acpicpu_readreg(&sc->sc_tstate_status);

sys/dev/acpi/acpi_cpu_tstate.c

714

if (val == sc->sc_tstate[i].ts_status) {

sys/dev/acpi/acpi_cpu_tstate.c

765

uint32_t i, percent, val;

sys/dev/acpi/acpi_cpu_tstate.c

837

val = acpicpu_readreg(&sc->sc_tstate_status);

sys/dev/acpi/acpi_cpu_tstate.c

839

if (val == ts->ts_status)

sys/dev/acpi/acpi_debug.c

245

prop_object_t obj, val;

sys/dev/acpi/acpi_debug.c

254

val = prop_dictionary_get(dict, key);

sys/dev/acpi/acpi_debug.c

255

num = prop_number_unsigned_value(val);

sys/dev/acpi/acpi_display.c

1317

uint32_t val;

sys/dev/acpi/acpi_display.c

1324

val = (uint32_t)asc->sc_policy.raw;

sys/dev/acpi/acpi_display.c

1327

node.sysctl_data = &val;

sys/dev/acpi/acpi_display.c

1332

if (val > 0x7)

sys/dev/acpi/acpi_display.c

1336

asc->sc_policy.raw = (uint8_t)val;

sys/dev/acpi/acpi_display.c

1349

bool val;

sys/dev/acpi/acpi_display.c

1356

val = (asc->sc_policy.fmt.output == ACPI_DISP_POLICY_OUTPUT_AUTO);

sys/dev/acpi/acpi_display.c

1359

node.sysctl_data = &val;

sys/dev/acpi/acpi_display.c

1365

if (val)

sys/dev/acpi/acpi_display.c

1381

uint32_t val;

sys/dev/acpi/acpi_display.c

1388

error = acpidisp_get_status(osc, &val);

sys/dev/acpi/acpi_display.c

1394

node.sysctl_data = &val;

sys/dev/acpi/acpi_display.c

1407

uint32_t val;

sys/dev/acpi/acpi_display.c

1414

error = acpidisp_get_state(osc, &val);

sys/dev/acpi/acpi_display.c

1420

node.sysctl_data = &val;

sys/dev/acpi/acpi_display.c

1426

error = acpidisp_set_state(osc, val);

sys/dev/acpi/acpi_display.c

1439

int val, error;

sys/dev/acpi/acpi_display.c

1450

val = (int)bc->bc_current;

sys/dev/acpi/acpi_display.c

1453

node.sysctl_data = &val;

sys/dev/acpi/acpi_display.c

1458

acpidisp_array_search(bc->bc_level, bc->bc_level_count, val, &lo, &up);

sys/dev/acpi/acpi_display.c

1459

if ((lo != up) && (val - lo) < (up - val))

sys/dev/acpi/acpi_display.c

1582

ACPI_INTEGER val;

sys/dev/acpi/acpi_display.c

1612

rv = acpi_eval_integer(hdl, "_ADR", &val);

sys/dev/acpi/acpi_display.c

1621

devid = (uint16_t)val;

sys/dev/acpi/acpi_display.c

1764

ACPI_INTEGER val;

sys/dev/acpi/acpi_display.c

1773

val = (ACPI_INTEGER)value;

sys/dev/acpi/acpi_display.c

1774

rv = acpi_eval_set_integer(hdl, "_DOS", val);

sys/dev/acpi/acpi_display.c

1788

ACPI_INTEGER val;

sys/dev/acpi/acpi_display.c

1794

rv = acpi_eval_integer(hdl, "_DCS", &val);

sys/dev/acpi/acpi_display.c

1801

if (val > UINT32_MAX)

sys/dev/acpi/acpi_display.c

1804

*valuep = (uint32_t)val;

sys/dev/acpi/acpi_display.c

1816

ACPI_INTEGER val;

sys/dev/acpi/acpi_display.c

1822

rv = acpi_eval_integer(hdl, "_DGS", &val);

sys/dev/acpi/acpi_display.c

1829

if (val > UINT32_MAX)

sys/dev/acpi/acpi_display.c

1832

*valuep = (uint32_t)val;

sys/dev/acpi/acpi_display.c

1844

ACPI_INTEGER val;

sys/dev/acpi/acpi_display.c

1853

val = (ACPI_INTEGER)value;

sys/dev/acpi/acpi_display.c

1854

rv = acpi_eval_set_integer(hdl, "_DSS", val);

sys/dev/acpi/acpi_display.c

1868

ACPI_INTEGER val;

sys/dev/acpi/acpi_display.c

1879

rv = acpi_eval_integer(hdl, "_BQC", &val);

sys/dev/acpi/acpi_display.c

1886

if (val > UINT8_MAX)

sys/dev/acpi/acpi_display.c

1889

*valuep = (uint8_t)val;

sys/dev/acpi/acpi_display.c

1955

ACPI_INTEGER val;

sys/dev/acpi/acpi_display.c

1964

val = (ACPI_INTEGER)value;

sys/dev/acpi/acpi_display.c

1965

rv = acpi_eval_set_integer(hdl, "_BCM", val);

sys/dev/acpi/acpi_ec.c

1096

acpiec_bus_read(device_t dv, u_int addr, ACPI_INTEGER *val, int width)

sys/dev/acpi/acpi_ec.c

1100

return acpiec_space_handler(ACPI_READ, addr, width * 8, val, sc, NULL);

sys/dev/acpi/acpi_ec.c

1104

acpiec_bus_write(device_t dv, u_int addr, ACPI_INTEGER val, int width)

sys/dev/acpi/acpi_ec.c

1108

return acpiec_space_handler(ACPI_WRITE, addr, width * 8, &val, sc,

sys/dev/acpi/acpi_ec.c

383

ACPI_INTEGER val;

sys/dev/acpi/acpi_ec.c

411

rv = acpi_eval_integer(sc->sc_ech, "_GLK", &val);

sys/dev/acpi/acpi_ec.c

413

sc->sc_need_global_lock = val != 0;

sys/dev/acpi/acpi_ec.c

598

acpiec_write_data(struct acpiec_softc *sc, uint8_t val)

sys/dev/acpi/acpi_ec.c

603

DPRINTF(ACPIEC_DEBUG_REG, sc, "write data=0x%"PRIx8"\n", val);

sys/dev/acpi/acpi_ec.c

604

bus_space_write_1(sc->sc_data_st, sc->sc_data_sh, 0, val);

sys/dev/acpi/acpi_ec.c

723

acpiec_read(struct acpiec_softc *sc, uint8_t addr, uint8_t *val)

sys/dev/acpi/acpi_ec.c

753

*val = sc->sc_cur_val;

sys/dev/acpi/acpi_ec.c

761

acpiec_write(struct acpiec_softc *sc, uint8_t addr, uint8_t val)

sys/dev/acpi/acpi_ec.c

773

addr, val);

sys/dev/acpi/acpi_ec.c

778

sc->sc_cur_val = val;

sys/dev/acpi/acpi_ec.c

791

addr, val);

sys/dev/acpi/acpi_pcc.c

246

UINT64 val;

sys/dev/acpi/acpi_pcc.c

248

rv = AcpiRead(&val, &reg->reg_addr);

sys/dev/acpi/acpi_pcc.c

252

val &= reg->reg_preserve;

sys/dev/acpi/acpi_pcc.c

253

val |= reg->reg_set;

sys/dev/acpi/acpi_pcc.c

254

return AcpiWrite(val, &reg->reg_addr);

sys/dev/acpi/acpi_pcc.c

264

uint32_t command, int flags, ACPI_INTEGER val)

sys/dev/acpi/acpi_pcc.c

281

tmp |= __SHIFTIN(val, mask);

sys/dev/acpi/acpi_pcc.c

299

int flags, ACPI_INTEGER *val)

sys/dev/acpi/acpi_pcc.c

319

*val = __SHIFTOUT(tmp, mask);

sys/dev/acpi/acpi_pcc.c

332

ACPI_INTEGER *val)

sys/dev/acpi/acpi_pcc.c

368

rv = pcc_send_command(ss, reg, command, flags, *val);

sys/dev/acpi/acpi_pcc.c

380

rv = pcc_receive_response(ss, reg, flags, val);

sys/dev/acpi/acpi_pci.c

175

ACPI_INTEGER val;

sys/dev/acpi/acpi_pci.c

202

rv = acpi_eval_integer(ad->ad_handle, "_SEG", &val);

sys/dev/acpi/acpi_pci.c

205

ap->ap_segment = ACPI_LOWORD(val);

sys/dev/acpi/acpi_pci.c

211

rv = acpi_eval_integer(ad->ad_handle, "_BBN", &val);

sys/dev/acpi/acpi_pci.c

214

ap->ap_downbus = ACPI_LOWORD(val);

sys/dev/acpi/acpi_pci.c

330

pcireg_t val;

sys/dev/acpi/acpi_pci.c

338

val = pci_conf_read(pc, tag, PCI_ID_REG);

sys/dev/acpi/acpi_pci.c

340

if (PCI_VENDOR(val) == PCI_VENDOR_INVALID ||

sys/dev/acpi/acpi_pci.c

341

PCI_VENDOR(val) == 0)

sys/dev/acpi/acpi_pci.c

345

val = pci_conf_read(pc, tag, PCI_BHLC_REG);

sys/dev/acpi/acpi_pci.c

347

if (PCI_HDRTYPE_TYPE(val) != PCI_HDRTYPE_PPB)

sys/dev/acpi/acpi_pci.c

351

val = pci_conf_read(pc, tag, PCI_BRIDGE_BUS_REG);

sys/dev/acpi/acpi_pci.c

352

*downbus = PCI_BRIDGE_BUS_NUM_SECONDARY(val);

sys/dev/acpi/acpi_pmtr.c

318

int32_t val;

sys/dev/acpi/acpi_pmtr.c

320

val = acpipmtr_sensor_get_reading(self);

sys/dev/acpi/acpi_pmtr.c

323

if (val < 0) {

sys/dev/acpi/acpi_pmtr.c

336

sc->sc_sensor_i.value_cur = val * 1000;

sys/dev/acpi/acpi_pmtr.c

337

sc->sc_sensor_o.value_cur = val * 1000;

sys/dev/acpi/acpi_pmtr.c

401

ACPI_INTEGER val = 0;

sys/dev/acpi/acpi_pmtr.c

404

rv = acpi_eval_integer(sc->sc_node->ad_handle, path, &val);

sys/dev/acpi/acpi_pmtr.c

409

if (val == 0 || val > INT32_MAX) {

sys/dev/acpi/acpi_pmtr.c

414

return val;

sys/dev/acpi/acpi_pmtr.c

440

int32_t val;

sys/dev/acpi/acpi_pmtr.c

447

val = acpipmtr_sensor_get_reading(self) * 1000;

sys/dev/acpi/acpi_pmtr.c

449

if (val < 0)

sys/dev/acpi/acpi_pmtr.c

452

sc->sc_sensor_i.value_cur = val;

sys/dev/acpi/acpi_pmtr.c

453

sc->sc_sensor_o.value_cur = val;

sys/dev/acpi/acpi_pmtr.c

463

int32_t val;

sys/dev/acpi/acpi_pmtr.c

484

val = acpipmtr_sensor_get_interval(self);

sys/dev/acpi/acpi_pmtr.c

486

if (val < 0 || val == sc->sc_interval)

sys/dev/acpi/acpi_pmtr.c

490

"from %u ms to %u ms\n", sc->sc_interval, val);

sys/dev/acpi/acpi_pmtr.c

492

sc->sc_interval = val;

sys/dev/acpi/acpi_power.c

263

ACPI_INTEGER val = 0;

sys/dev/acpi/acpi_power.c

266

rv = acpi_eval_integer(ad->ad_handle, "_PSC", &val);

sys/dev/acpi/acpi_power.c

268

KDASSERT((uint64_t)val < INT_MAX);

sys/dev/acpi/acpi_power.c

270

ad->ad_state = (int)val;

sys/dev/acpi/acpi_power.c

568

ACPI_INTEGER val;

sys/dev/acpi/acpi_power.c

577

rv = acpi_eval_integer(hdl, "_STA", &val);

sys/dev/acpi/acpi_power.c

582

KDASSERT((uint64_t)val < INT_MAX);

sys/dev/acpi/acpi_power.c

584

if ((int)val != ACPI_STA_POW_ON && (int)val != ACPI_STA_POW_OFF)

sys/dev/acpi/acpi_power.c

587

if ((int)val != ACPI_STA_POW_ON)

sys/dev/acpi/acpi_tz.c

167

ACPI_INTEGER val;

sys/dev/acpi/acpi_tz.c

184

rv = acpi_eval_integer(sc->sc_node->ad_handle, "_TZP", &val);

sys/dev/acpi/acpi_tz.c

186

if (ACPI_SUCCESS(rv) && val != 0)

sys/dev/acpi/acpi_tz.c

187

sc->sc_zone.tzp = val;

sys/dev/acpi/acpi_tz.c

625

acpitz_get_integer(device_t dv, const char *cm, uint32_t *val)

sys/dev/acpi/acpi_tz.c

634

*val = ATZ_TMP_INVALID;

sys/dev/acpi/acpi_tz.c

643

*val = tmp;

sys/dev/acpi/acpi_util.c

1026

ACPI_INTEGER val;

sys/dev/acpi/acpi_util.c

1047

rv = acpi_eval_integer(hdl, "_UID", &val);

sys/dev/acpi/acpi_util.c

1062

val = obj->Processor.ProcId;

sys/dev/acpi/acpi_util.c

1071

if (ci->ci_acpiid == val)

sys/dev/acpi/acpi_util.c

1230

acpi_dsd_integer(ACPI_HANDLE handle, const char *prop, ACPI_INTEGER *val)

sys/dev/acpi/acpi_util.c

1241

*val = propval->Integer.Value;

sys/dev/acpi/acpi_util.c

1249

acpi_dsd_string(ACPI_HANDLE handle, const char *prop, char **val)

sys/dev/acpi/acpi_util.c

1260

*val = kmem_strdup(propval->String.Pointer, KM_SLEEP);

sys/dev/acpi/acpi_util.c

1268

acpi_dsd_bool(ACPI_HANDLE handle, const char *prop, bool *val)

sys/dev/acpi/acpi_util.c

1275

*val = ival != 0;

sys/dev/acpi/acpi_util.c

397

acpi_eval_set_integer(ACPI_HANDLE handle, const char *path, ACPI_INTEGER val)

sys/dev/acpi/acpi_util.c

406

obj.Integer.Value = val;

sys/dev/acpi/acpi_util.c

962

ACPI_INTEGER val;

sys/dev/acpi/acpi_util.c

988

rv = acpi_eval_integer(hdl, "_UID", &val);

sys/dev/acpi/acpi_util.c

990

if (ACPI_SUCCESS(rv) && val == ci->ci_acpiid)

sys/dev/acpi/acpi_wakedev.c

104

val = elm->Integer.Value;

sys/dev/acpi/acpi_wakedev.c

124

val = elm->Package.Elements[1].Integer.Value;

sys/dev/acpi/acpi_wakedev.c

134

ad->ad_wakedev->aw_number = val;

sys/dev/acpi/acpi_wakedev.c

156

rv = AcpiSetupGpeForWake(ad->ad_handle, hdl, val);

sys/dev/acpi/acpi_wakedev.c

290

ACPI_INTEGER val;

sys/dev/acpi/acpi_wakedev.c

311

val = ad->ad_wakedev->aw_number;

sys/dev/acpi/acpi_wakedev.c

315

AcpiSetGpeWakeMask(hdl, val, ACPI_GPE_DISABLE);

sys/dev/acpi/acpi_wakedev.c

321

AcpiSetGpeWakeMask(hdl, val, ACPI_GPE_ENABLE);

sys/dev/acpi/acpi_wakedev.c

67

ACPI_INTEGER val;

sys/dev/acpi/acpi_wdrt.c

124

uint64_t val;

sys/dev/acpi/acpi_wdrt.c

146

rv = AcpiOsReadMemory(wdrt->ControlRegister.Address, &val,

sys/dev/acpi/acpi_wdrt.c

152

if ((val & ACPI_WDRT_CSR_WDOGEN) == ACPI_WDRT_WDOGEN_DISABLE)

sys/dev/acpi/acpi_wdrt.c

269

uint64_t val;

sys/dev/acpi/acpi_wdrt.c

277

if (ACPI_FAILURE(acpi_wdrt_read_control(sc, &val)))

sys/dev/acpi/acpi_wdrt.c

279

val &= ~ACPI_WDRT_CSR_RUNSTOP;

sys/dev/acpi/acpi_wdrt.c

280

val |= ACPI_WDRT_RUNSTOP_STOPPED;

sys/dev/acpi/acpi_wdrt.c

281

if (ACPI_FAILURE(acpi_wdrt_write_control(sc, val)))

sys/dev/acpi/acpi_wdrt.c

291

if (ACPI_FAILURE(acpi_wdrt_read_control(sc, &val)))

sys/dev/acpi/acpi_wdrt.c

293

val &= ~ACPI_WDRT_CSR_RUNSTOP;

sys/dev/acpi/acpi_wdrt.c

294

val &= ~ACPI_WDRT_CSR_ACTION;

sys/dev/acpi/acpi_wdrt.c

295

val |= ACPI_WDRT_ACTION_RESET;

sys/dev/acpi/acpi_wdrt.c

296

if (ACPI_FAILURE(acpi_wdrt_write_control(sc, val)))

sys/dev/acpi/acpi_wdrt.c

301

val |= ACPI_WDRT_RUNSTOP_RUNNING;

sys/dev/acpi/acpi_wdrt.c

302

if (ACPI_FAILURE(acpi_wdrt_write_control(sc, val)))

sys/dev/acpi/acpi_wdrt.c

317

uint64_t val;

sys/dev/acpi/acpi_wdrt.c

323

val = smw->smw_period * sc->sc_period_scale;

sys/dev/acpi/acpi_wdrt.c

324

if (ACPI_FAILURE(acpi_wdrt_write_count(sc, val)))

sys/dev/acpi/acpi_wdrt.c

328

if (ACPI_FAILURE(acpi_wdrt_read_control(sc, &val)))

sys/dev/acpi/acpi_wdrt.c

330

val |= ACPI_WDRT_CSR_TRIGGER;

sys/dev/acpi/acpi_wdrt.c

331

if (ACPI_FAILURE(acpi_wdrt_write_control(sc, val)))

sys/dev/acpi/acpi_wdrt.c

338

acpi_wdrt_read_control(struct acpi_wdrt_softc *sc, uint64_t *val)

sys/dev/acpi/acpi_wdrt.c

345

val, sc->sc_control_reg.BitWidth);

sys/dev/acpi/acpi_wdrt.c

350

*val, rv));

sys/dev/acpi/acpi_wdrt.c

356

acpi_wdrt_write_control(struct acpi_wdrt_softc *sc, uint64_t val)

sys/dev/acpi/acpi_wdrt.c

363

val, sc->sc_control_reg.BitWidth);

sys/dev/acpi/acpi_wdrt.c

368

val, rv));

sys/dev/acpi/acpi_wdrt.c

375

acpi_wdrt_read_count(struct acpi_wdrt_softc *sc, uint32_t *val)

sys/dev/acpi/acpi_wdrt.c

382

val, sc->sc_count_reg.BitWidth);

sys/dev/acpi/acpi_wdrt.c

387

*val, rv));

sys/dev/acpi/acpi_wdrt.c

394

acpi_wdrt_write_count(struct acpi_wdrt_softc *sc, uint32_t val)

sys/dev/acpi/acpi_wdrt.c

401

val, sc->sc_count_reg.BitWidth);

sys/dev/acpi/acpi_wdrt.c

406

val, rv));

sys/dev/acpi/acpica/acpi_func.h

57

uint32_t new, old, val;

sys/dev/acpi/acpica/acpi_func.h

63

val = atomic_cas_32(lock, old, new);

sys/dev/acpi/acpica/acpi_func.h

64

} while (__predict_false(val != old));

sys/dev/acpi/acpica/acpi_func.h

73

uint32_t new, old, val;

sys/dev/acpi/acpica/acpi_func.h

79

val = atomic_cas_32(lock, old, new);

sys/dev/acpi/acpica/acpi_func.h

80

} while (__predict_false(val != old));

sys/dev/acpi/aibs_acpi.c

518

aibs_sensor_value(device_t self, struct aibs_sensor *as, uint64_t *val)

sys/dev/acpi/aibs_acpi.c

587

*val = obj->Integer.Value;

sys/dev/acpi/aibs_acpi.c

608

*val = ret[1];

sys/dev/acpi/aibs_acpi.c

632

uint64_t val = 0;

sys/dev/acpi/aibs_acpi.c

650

if (aibs_sensor_value(sc->sc_dev, as, &val) != true)

sys/dev/acpi/aibs_acpi.c

656

as->as_sensor.value_cur = val;

sys/dev/acpi/aibs_acpi.c

661

if (val == 0)

sys/dev/acpi/aibs_acpi.c

664

as->as_sensor.value_cur = val * 100 * 1000 + 273150000;

sys/dev/acpi/aibs_acpi.c

668

as->as_sensor.value_cur = val * 1000;

sys/dev/acpi/amdgpio.c

332

uint32_t val;

sys/dev/acpi/amdgpio.c

341

val = RD4(sc, AMDGPIO_PIN_REG(pin));

sys/dev/acpi/amdgpio.c

342

return (val & AMDGPIO_CONF_GPIORXSTATE) ? 1 : 0;

sys/dev/acpi/amdgpio.c

349

uint32_t val;

sys/dev/acpi/amdgpio.c

358

val = RD4(sc, AMDGPIO_PIN_REG(pin));

sys/dev/acpi/amdgpio.c

360

val |= AMDGPIO_CONF_GPIOTXSTATE;

sys/dev/acpi/amdgpio.c

362

val &= ~AMDGPIO_CONF_GPIOTXSTATE;

sys/dev/acpi/amdgpio.c

364

WR4(sc, AMDGPIO_PIN_REG(pin), val);

sys/dev/acpi/amdgpio.c

380

uint32_t val;

sys/dev/acpi/amdgpio.c

424

val = RD4(sc, AMDGPIO_PIN_REG(pin));

sys/dev/acpi/amdgpio.c

425

val |= dect;

sys/dev/acpi/amdgpio.c

426

val |= AMDGPIO_CONF_INTR_MASK_EN | AMDGPIO_CONF_INTR_EN;

sys/dev/acpi/amdgpio.c

427

WR4(sc, AMDGPIO_PIN_REG(pin), val);

sys/dev/acpi/amdgpio.c

439

uint32_t val;

sys/dev/acpi/amdgpio.c

445

val = RD4(sc, AMDGPIO_PIN_REG(aih->ih_pin));

sys/dev/acpi/amdgpio.c

446

val &= ~(AMDGPIO_CONF_INTR_EN | AMDGPIO_CONF_INTR_MASK_EN);

sys/dev/acpi/amdgpio.c

447

WR4(sc, AMDGPIO_PIN_REG(aih->ih_pin), val);

sys/dev/acpi/amdgpio.c

470

uint32_t val;

sys/dev/acpi/amdgpio.c

472

val = RD4(sc, AMDGPIO_PIN_REG(aih->ih_pin));

sys/dev/acpi/amdgpio.c

473

val &= ~AMDGPIO_CONF_INTR_MASK_EN;

sys/dev/acpi/amdgpio.c

474

WR4(sc, AMDGPIO_PIN_REG(aih->ih_pin), val);

sys/dev/acpi/amdgpio.c

482

uint32_t val;

sys/dev/acpi/amdgpio.c

484

val = RD4(sc, AMDGPIO_PIN_REG(aih->ih_pin));

sys/dev/acpi/amdgpio.c

485

val |= AMDGPIO_CONF_INTR_MASK_EN;

sys/dev/acpi/amdgpio.c

486

WR4(sc, AMDGPIO_PIN_REG(aih->ih_pin), val);

sys/dev/acpi/amdgpio.c

496

uint32_t val;

sys/dev/acpi/amdgpio.c

517

val = RD4(sc, AMDGPIO_PIN_REG(pin));

sys/dev/acpi/amdgpio.c

518

if ((val & AMDGPIO_CONF_INTR_STATUS) != 0) {

sys/dev/acpi/amdgpio.c

521

val &= ~(AMDGPIO_CONF_INTR_MASK_EN |

sys/dev/acpi/amdgpio.c

523

WR4(sc, AMDGPIO_PIN_REG(pin), val);

sys/dev/acpi/amdgpio.c

528

val = RD4(sc, AMDGPIO_INTR_MASTER);

sys/dev/acpi/amdgpio.c

529

val |= AMDGPIO_INTR_MASTER_EIO;

sys/dev/acpi/amdgpio.c

530

WR4(sc, AMDGPIO_INTR_MASTER, val);

sys/dev/acpi/amdgpio.c

79

#define WR4(sc, reg, val) \

sys/dev/acpi/amdgpio.c

80

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/acpi/asus_acpi.c

264

ACPI_INTEGER val = 0;

sys/dev/acpi/asus_acpi.c

268

rv = acpi_eval_integer(sc->sc_node->ad_handle, ASUS_METHOD_PBLG, &val);

sys/dev/acpi/asus_acpi.c

270

if (ACPI_FAILURE(rv) || val > INT32_MAX)

sys/dev/acpi/asus_acpi.c

273

sc->sc_brightness = val;

sys/dev/acpi/ehci_acpi.c

248

ACPI_INTEGER val;

sys/dev/acpi/ehci_acpi.c

253

rv = acpi_eval_integer(ad->ad_handle, "_ADR", &val);

sys/dev/acpi/ehci_acpi.c

254

if (ACPI_SUCCESS(rv) && val != 0) {

sys/dev/acpi/ehci_acpi.c

255

ncomp += ehci_acpi_port_has_companion(ad, val);

sys/dev/acpi/ehci_acpi.c

267

ACPI_INTEGER val;

sys/dev/acpi/ehci_acpi.c

272

rv = acpi_eval_integer(ad->ad_handle, "_ADR", &val);

sys/dev/acpi/ehci_acpi.c

273

if (ACPI_SUCCESS(rv) && val == 0) {

sys/dev/acpi/fujbp_acpi.c

423

int val, error;

sys/dev/acpi/fujbp_acpi.c

436

val = (int)level;

sys/dev/acpi/fujbp_acpi.c

437

node.sysctl_data = &val;

sys/dev/acpi/fujbp_acpi.c

442

if (val < 0 || val > (uint8_t)(sc->sc_brightness_nlevels - 1))

sys/dev/acpi/fujbp_acpi.c

446

error = fujitsu_bp_set_brightness(sc, (uint8_t)val);

sys/dev/acpi/fujbp_acpi.c

457

bool val;

sys/dev/acpi/fujbp_acpi.c

464

error = fujitsu_bp_get_pointer(sc, &val);

sys/dev/acpi/fujbp_acpi.c

470

node.sysctl_data = &val;

sys/dev/acpi/fujbp_acpi.c

476

error = fujitsu_bp_set_pointer(sc, val);

sys/dev/acpi/fujbp_acpi.c

486

ACPI_INTEGER val;

sys/dev/acpi/fujbp_acpi.c

492

rv = acpi_eval_integer(hdl, "GHKS", &val);

sys/dev/acpi/fujbp_acpi.c

499

*valuep = (uint32_t)val;

sys/dev/acpi/fujbp_acpi.c

508

ACPI_INTEGER val;

sys/dev/acpi/fujbp_acpi.c

514

rv = acpi_eval_integer(hdl, "RBLL", &val);

sys/dev/acpi/fujbp_acpi.c

521

if (val > UINT8_MAX)

sys/dev/acpi/fujbp_acpi.c

524

*valuep = (uint8_t)val;

sys/dev/acpi/fujbp_acpi.c

533

ACPI_INTEGER val;

sys/dev/acpi/fujbp_acpi.c

539

rv = acpi_eval_integer(hdl, "GBLL", &val);

sys/dev/acpi/fujbp_acpi.c

547

val &= ~FUJITSU_BP_MODMASK;

sys/dev/acpi/fujbp_acpi.c

549

if (val > UINT8_MAX)

sys/dev/acpi/fujbp_acpi.c

552

*valuep = (uint8_t)val;

sys/dev/acpi/fujbp_acpi.c

558

fujitsu_bp_set_brightness(struct fujitsu_bp_softc *sc, uint8_t val)

sys/dev/acpi/fujbp_acpi.c

566

rv = acpi_eval_set_integer(hdl, "SBLL", val);

sys/dev/acpi/fujbp_acpi.c

581

ACPI_INTEGER val;

sys/dev/acpi/fujbp_acpi.c

587

rv = acpi_eval_integer(hdl, "GMOU", &val);

sys/dev/acpi/fujbp_acpi.c

595

val &= ~FUJITSU_BP_MODMASK;

sys/dev/acpi/fujbp_acpi.c

597

if (val > 1)

sys/dev/acpi/fujbp_acpi.c

600

*valuep = (bool)val;

sys/dev/acpi/fujbp_acpi.c

606

fujitsu_bp_set_pointer(struct fujitsu_bp_softc *sc, bool val)

sys/dev/acpi/fujbp_acpi.c

614

rv = acpi_eval_set_integer(hdl, "SMOU", val);

sys/dev/acpi/fujhk_acpi.c

309

bool val;

sys/dev/acpi/fujhk_acpi.c

316

error = fujitsu_hk_get_backlight(sc, &val);

sys/dev/acpi/fujhk_acpi.c

322

node.sysctl_data = &val;

sys/dev/acpi/fujhk_acpi.c

328

error = fujitsu_hk_set_backlight(sc, val);

sys/dev/acpi/fujhk_acpi.c

338

ACPI_INTEGER val;

sys/dev/acpi/fujhk_acpi.c

344

rv = acpi_eval_integer(hdl, "GIRB", &val);

sys/dev/acpi/fujhk_acpi.c

351

*valuep = (uint32_t)val;

sys/dev/acpi/fujhk_acpi.c

366

ACPI_INTEGER val;

sys/dev/acpi/fujhk_acpi.c

372

rv = fujitsu_hk_eval_nary_integer(hdl, "FUNC", args, 4, &val);

sys/dev/acpi/fujhk_acpi.c

379

if (val == FUJITSU_FUNC_INVALID_ARGS)

sys/dev/acpi/fujhk_acpi.c

382

if (val == FUJITSU_FUNC_BACKLIGHT_ON)

sys/dev/acpi/fujhk_acpi.c

384

else if (val == FUJITSU_FUNC_BACKLIGHT_OFF)

sys/dev/acpi/fujhk_acpi.c

402

ACPI_INTEGER val;

sys/dev/acpi/fujhk_acpi.c

413

rv = fujitsu_hk_eval_nary_integer(hdl, "FUNC", args, 4, &val);

sys/dev/acpi/fujhk_acpi.c

420

if (val == FUJITSU_FUNC_INVALID_ARGS)

sys/dev/acpi/hpacel_acpi.c

245

uint8_t val;

sys/dev/acpi/hpacel_acpi.c

262

val = sc->sc_ctrl[0];

sys/dev/acpi/hpacel_acpi.c

265

val |= CTRL1_Xen;

sys/dev/acpi/hpacel_acpi.c

268

val |= CTRL1_Yen;

sys/dev/acpi/hpacel_acpi.c

271

val |= CTRL1_Zen;

sys/dev/acpi/hpacel_acpi.c

273

if (val != sc->sc_ctrl[0]) {

sys/dev/acpi/hpacel_acpi.c

275

rv = hpacel_reg_write(hdl, CTRL_REG1, val);

sys/dev/acpi/hpacel_acpi.c

281

val = sc->sc_ctrl[1];

sys/dev/acpi/hpacel_acpi.c

284

val |= CTRL2_BDU;

sys/dev/acpi/hpacel_acpi.c

287

val &= ~CTRL2_BLE;

sys/dev/acpi/hpacel_acpi.c

290

val &= ~CTRL2_DAS;

sys/dev/acpi/hpacel_acpi.c

297

val &= ~CTRL2_DRDY;

sys/dev/acpi/hpacel_acpi.c

303

val &= ~CTRL2_IEN;

sys/dev/acpi/hpacel_acpi.c

305

if (val != sc->sc_ctrl[1]) {

sys/dev/acpi/hpacel_acpi.c

307

rv = hpacel_reg_write(hdl, CTRL_REG2, val);

sys/dev/acpi/hpacel_acpi.c

362

ACPI_OBJECT obj, val;

sys/dev/acpi/hpacel_acpi.c

369

buf.Pointer = &val;

sys/dev/acpi/hpacel_acpi.c

370

buf.Length = sizeof(val);

sys/dev/acpi/hpacel_acpi.c

381

if (val.Integer.Value > UINT8_MAX)

sys/dev/acpi/hpacel_acpi.c

384

*valp = val.Integer.Value;

sys/dev/acpi/hpacel_acpi.c

390

hpacel_reg_write(ACPI_HANDLE hdl, ACPI_INTEGER reg, uint8_t val)

sys/dev/acpi/hpacel_acpi.c

398

obj[1].Integer.Value = val;

sys/dev/acpi/hpacel_acpi.c

461

uint8_t val;

sys/dev/acpi/hpacel_acpi.c

468

val = sc->sc_ctrl[0];

sys/dev/acpi/hpacel_acpi.c

471

val |= CTRL1_PD0 | CTRL1_PD1;

sys/dev/acpi/hpacel_acpi.c

473

val &= ~(CTRL1_PD0 | CTRL1_PD1);

sys/dev/acpi/hpacel_acpi.c

476

if (val != sc->sc_ctrl[0]) {

sys/dev/acpi/hpacel_acpi.c

478

rv = hpacel_reg_write(hdl, CTRL_REG1, val);

sys/dev/acpi/hpacel_acpi.c

557

int16_t val;

sys/dev/acpi/hpacel_acpi.c

562

rv = hpacel_reg_xyz(sc->sc_node->ad_handle, i, &val);

sys/dev/acpi/hpacel_acpi.c

565

sc->sc_sensor[i].value_cur = val;

sys/dev/acpi/nxpiic_acpi.c

164

nxpiic_acpi_iowr(struct motoi2c_softc *msc, bus_size_t off, uint8_t val)

sys/dev/acpi/nxpiic_acpi.c

171

bus_space_write_1(msc->sc_iot, msc->sc_ioh, off >> 2, val);

sys/dev/acpi/qcomgpio.c

105

#define WR4(sc, reg, val) \

sys/dev/acpi/qcomgpio.c

106

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/acpi/qcomgpio.c

479

uint32_t val;

sys/dev/acpi/qcomgpio.c

488

val = RD4(sc, TLMM_GPIO_IN_OUT(pin));

sys/dev/acpi/qcomgpio.c

489

return (val & TLMM_GPIO_IN_OUT_GPIO_IN) != 0;

sys/dev/acpi/qcomgpio.c

496

uint32_t val;

sys/dev/acpi/qcomgpio.c

505

val = RD4(sc, TLMM_GPIO_IN_OUT(pin));

sys/dev/acpi/qcomgpio.c

507

val |= TLMM_GPIO_IN_OUT_GPIO_OUT;

sys/dev/acpi/qcomgpio.c

509

val &= ~TLMM_GPIO_IN_OUT_GPIO_OUT;

sys/dev/acpi/qcomgpio.c

511

WR4(sc, TLMM_GPIO_IN_OUT(pin), val);

sys/dev/acpi/qcomgpio.c

527

uint32_t val;

sys/dev/acpi/qcomgpio.c

579

val = RD4(sc, TLMM_GPIO_INTR_CFG(pin));

sys/dev/acpi/qcomgpio.c

580

val &= ~TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_MASK;

sys/dev/acpi/qcomgpio.c

581

val |= __SHIFTIN(dect, TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_MASK);

sys/dev/acpi/qcomgpio.c

582

val &= ~TLMM_GPIO_INTR_CFG_INTR_POL_CTL;

sys/dev/acpi/qcomgpio.c

583

val |= pol;

sys/dev/acpi/qcomgpio.c

584

val &= ~TLMM_GPIO_INTR_CFG_TARGET_PROC_MASK;

sys/dev/acpi/qcomgpio.c

585

val |= __SHIFTIN(TLMM_GPIO_INTR_CFG_TARGET_PROC_RPM,

sys/dev/acpi/qcomgpio.c

587

val |= TLMM_GPIO_INTR_CFG_INTR_RAW_STATUS_EN;

sys/dev/acpi/qcomgpio.c

588

val |= TLMM_GPIO_INTR_CFG_INTR_ENABLE;

sys/dev/acpi/qcomgpio.c

589

WR4(sc, TLMM_GPIO_INTR_CFG(pin), val);

sys/dev/acpi/qcomgpio.c

604

uint32_t val;

sys/dev/acpi/qcomgpio.c

612

val = RD4(sc, TLMM_GPIO_INTR_CFG(qih->ih_pin));

sys/dev/acpi/qcomgpio.c

613

val &= ~TLMM_GPIO_INTR_CFG_INTR_ENABLE;

sys/dev/acpi/qcomgpio.c

614

WR4(sc, TLMM_GPIO_INTR_CFG(qih->ih_pin), val);

sys/dev/acpi/qcomgpio.c

637

uint32_t val;

sys/dev/acpi/qcomgpio.c

639

val = RD4(sc, TLMM_GPIO_INTR_CFG(qih->ih_pin));

sys/dev/acpi/qcomgpio.c

641

val &= ~TLMM_GPIO_INTR_CFG_INTR_RAW_STATUS_EN;

sys/dev/acpi/qcomgpio.c

643

val &= ~TLMM_GPIO_INTR_CFG_INTR_ENABLE;

sys/dev/acpi/qcomgpio.c

644

WR4(sc, TLMM_GPIO_INTR_CFG(qih->ih_pin), val);

sys/dev/acpi/qcomgpio.c

652

uint32_t val;

sys/dev/acpi/qcomgpio.c

654

val = RD4(sc, TLMM_GPIO_INTR_CFG(qih->ih_pin));

sys/dev/acpi/qcomgpio.c

656

val |= TLMM_GPIO_INTR_CFG_INTR_RAW_STATUS_EN;

sys/dev/acpi/qcomgpio.c

658

val |= TLMM_GPIO_INTR_CFG_INTR_ENABLE;

sys/dev/acpi/qcomgpio.c

659

WR4(sc, TLMM_GPIO_INTR_CFG(qih->ih_pin), val);

sys/dev/acpi/qcomgpio.c

673

uint32_t val;

sys/dev/acpi/qcomgpio.c

675

val = RD4(sc, TLMM_GPIO_INTR_STATUS(pin));

sys/dev/acpi/qcomgpio.c

676

if ((val & TLMM_GPIO_INTR_STATUS_INTR_STATUS) != 0) {

sys/dev/acpi/qcomgpio.c

681

val &= ~TLMM_GPIO_INTR_STATUS_INTR_STATUS;

sys/dev/acpi/qcomgpio.c

682

WR4(sc, TLMM_GPIO_INTR_STATUS(pin), val);

sys/dev/acpi/qcomiic.c

46

#define GENI_RX_FIFO_STATUS_WC(val) ((val) & 0xffffff)

sys/dev/acpi/qcomiic.c

50

#define HWRITE4(sc, reg, val) \

sys/dev/acpi/qcomiic.c

51

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/acpi/qcomipcc.c

39

#define HWRITE4(sc, reg, val) \

sys/dev/acpi/qcomipcc.c

40

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/acpi/qcompep.c

342

uint64_t val;

sys/dev/acpi/qcompep.c

348

val = RXREAD8(sc, CPUCP_REG_RX_EN);

sys/dev/acpi/qcompep.c

349

val |= (1 << id);

sys/dev/acpi/qcompep.c

350

RXWRITE8(sc, CPUCP_REG_RX_EN, val);

sys/dev/acpi/qcompep.c

56

#define AOSSWRITE4(sc, reg, val) \

sys/dev/acpi/qcompep.c

57

bus_space_write_4((sc)->sc_iot, (sc)->sc_aoss_ioh, (reg), (val))

sys/dev/acpi/qcompep.c

68

#define RXWRITE8(sc, reg, val) \

sys/dev/acpi/qcompep.c

69

bus_space_write_8((sc)->sc_iot, (sc)->sc_cpucp_rx_ioh, (reg), (val))

sys/dev/acpi/qcompep.c

71

#define TXWRITE4(sc, reg, val) \

sys/dev/acpi/qcompep.c

72

bus_space_write_4((sc)->sc_iot, (sc)->sc_cpucp_tx_ioh, (reg), (val))

sys/dev/acpi/qcomsmem.c

134

#define MTXWRITE4(sc, reg, val) \

sys/dev/acpi/qcomsmem.c

135

bus_space_write_4((sc)->sc_iot, (sc)->sc_mtx_ioh, (reg), (val))

sys/dev/acpi/qcomsmem.c

513

qcsmem_memset(void *ptr, uint8_t val, size_t len)

sys/dev/acpi/qcomsmem.c

515

if (len % 8 == 0 && val == 0) {

sys/dev/acpi/qcomsmem.c

520

p[n] = val;

sys/dev/acpi/qcomsmem.c

527

p[n] = val;

sys/dev/acpi/qcomsmptp.c

221

uint32_t changed, val;

sys/dev/acpi/qcomsmptp.c

257

val = *e->e_value;

sys/dev/acpi/qcomsmptp.c

258

if (val == e->e_last_value)

sys/dev/acpi/qcomsmptp.c

260

changed = val ^ e->e_last_value;

sys/dev/acpi/qcomsmptp.c

261

e->e_last_value = val;

sys/dev/acpi/qcomspmi.c

105

#define HWRITE4(sc, obj, reg, val) \

sys/dev/acpi/qcomspmi.c

107

(sc)->sc_data->regs[obj] + (reg), (val))

sys/dev/acpi/qcomspmi.c

190

uint32_t val, ppid, irq_own;

sys/dev/acpi/qcomspmi.c

217

val = HREAD4(sc, QCSPMI_REG_CORE, SPMI_VERSION);

sys/dev/acpi/qcomspmi.c

218

if (val < SPMI_VERSION_V5_MIN) {

sys/dev/acpi/qcomspmi.c

219

printf(": unsupported version 0x%08x\n", val);

sys/dev/acpi/qcomspmi.c

223

if (val < SPMI_VERSION_V7_MIN) {

sys/dev/acpi/qcomspmi.c

244

val = HREAD4(sc, QCSPMI_REG_CORE, SPMI_ARB_APID_MAP(sc, i));

sys/dev/acpi/qcomspmi.c

245

if (!val)

sys/dev/acpi/qcomspmi.c

247

ppid = (val >> SPMI_ARB_APID_MAP_PPID_SHIFT) &

sys/dev/acpi/qcomspmi.c

249

irq_own = val & SPMI_ARB_APID_MAP_IRQ_OWNER;

sys/dev/acpi/qcomspmi.c

250

val = HREAD4(sc, QCSPMI_REG_CNFG, SPMI_OWNERSHIP_TABLE(sc, i));

sys/dev/acpi/qcomspmi.c

252

apid->write_ee = SPMI_OWNERSHIP_TABLE_OWNER(val);

sys/dev/acpi/sony_acpi.c

111

int val, old_val, error;

sys/dev/acpi/sony_acpi.c

127

val = old_val = acpi_val;

sys/dev/acpi/sony_acpi.c

130

node.sysctl_data = &val;

sys/dev/acpi/sony_acpi.c

137

acpi_val = val;

sys/dev/acpi/sony_acpi.c

143

device_xname(sc->sc_dev), buf, val);

sys/dev/acpi/sony_acpi.c

202

ACPI_INTEGER val, ACPI_INTEGER *valp)

sys/dev/acpi/sony_acpi.c

216

param.Integer.Value = val;

sys/dev/acpi/thinkpad_acpi.c

1045

uint32_t val;

sys/dev/acpi/thinkpad_acpi.c

1051

val = thinkpad_call_method(self, THINKPAD_GET_CHARGE_START,

sys/dev/acpi/thinkpad_acpi.c

1053

if (!(val & THINKPAD_CALL_ERROR) && (val & 0x100)) {

sys/dev/acpi/thinkpad_acpi.c

1055

if (val & 0x200)

sys/dev/acpi/thinkpad_acpi.c

1062

val = thinkpad_call_method(self, THINKPAD_GET_CHARGE_STOP,

sys/dev/acpi/thinkpad_acpi.c

1064

if (!(val & THINKPAD_CALL_ERROR) && (val & 0x100))

sys/dev/acpi/thinkpad_acpi.c

1070

val = thinkpad_call_method(self, THINKPAD_GET_FORCE_DISCHARGE,

sys/dev/acpi/thinkpad_acpi.c

1072

if (!(val & THINKPAD_CALL_ERROR) && (val & 0x100))

sys/dev/acpi/thinkpad_acpi.c

1078

val = thinkpad_call_method(self, THINKPAD_GET_CHARGE_INHIBIT,

sys/dev/acpi/thinkpad_acpi.c

1080

if (!(val & THINKPAD_CALL_ERROR) && (val & 0x20))

sys/dev/acpi/thinkpad_acpi.c

259

ACPI_INTEGER val;

sys/dev/acpi/thinkpad_acpi.c

298

rv = acpi_eval_integer(sc->sc_node->ad_handle, "MHKA", &val);

sys/dev/acpi/thinkpad_acpi.c

331

val = ret.Integer.Value;

sys/dev/acpi/thinkpad_acpi.c

340

rv = thinkpad_mask_init(sc, val);

sys/dev/acpi/thinkpad_acpi.c

491

ACPI_INTEGER val;

sys/dev/acpi/thinkpad_acpi.c

495

rv = acpi_eval_integer(sc->sc_node->ad_handle, "MHKP", &val);

sys/dev/acpi/thinkpad_acpi.c

501

SDT_PROBE2(sdt, thinkpad, hotkey, MHKP, sc, val);

sys/dev/acpi/thinkpad_acpi.c

503

if (val == 0)

sys/dev/acpi/thinkpad_acpi.c

506

type = (val & 0xf000) >> 12;

sys/dev/acpi/thinkpad_acpi.c

507

event = val & 0x0fff;

sys/dev/acpi/thinkpad_acpi.c

819

ACPI_INTEGER val;

sys/dev/acpi/thinkpad_acpi.c

824

rv = acpi_eval_integer(acpiec_get_handle(sc->sc_ecdev), sname, &val);

sys/dev/acpi/thinkpad_acpi.c

829

temp = (int)val;

sys/dev/acpi/thinkpad_acpi.c

961

uint32_t val = 0;

sys/dev/acpi/thinkpad_acpi.c

964

AcpiOsReadPort(IO_RTC + 1, &val, 8);

sys/dev/acpi/thinkpad_acpi.c

966

return val & 7;

sys/dev/acpi/wmi/wmi_acpi.c

540

uint32_t width, ACPI_INTEGER *val, void *setup, void *aux)

sys/dev/acpi/wmi/wmi_acpi.c

544

if (aux == NULL || val == NULL)

sys/dev/acpi/wmi/wmi_acpi.c

553

(void)acpiec_bus_read(sc->sc_ecdev, addr, val, width);

sys/dev/acpi/wmi/wmi_acpi.c

557

(void)acpiec_bus_write(sc->sc_ecdev, addr, *val, width);

sys/dev/acpi/wmi/wmi_eeepc.c

234

uint32_t val = 0; /* XXX GCC */

sys/dev/acpi/wmi/wmi_eeepc.c

256

val = obj->Integer.Value;

sys/dev/acpi/wmi/wmi_eeepc.c

258

if (WMI_EEEPC_IS_BACKLIGHT_STATUS(val)) {

sys/dev/acpi/wmi/wmi_eeepc.c

263

switch (val) {

sys/dev/acpi/wmi/wmi_eeepc.c

323

val, evt);

sys/dev/acpi/wmi/wmi_hp.c

280

uint32_t val;

sys/dev/acpi/wmi/wmi_hp.c

302

val = *((uint8_t *)obj->Buffer.Pointer);

sys/dev/acpi/wmi/wmi_hp.c

304

if (val == 0x00) {

sys/dev/acpi/wmi/wmi_hp.c

309

switch (val) {

sys/dev/acpi/wmi/wmi_hp.c

386

uint32_t cmd, *val;

sys/dev/acpi/wmi/wmi_hp.c

415

val = (uint32_t *)obj->Buffer.Pointer;

sys/dev/acpi/wmi/wmi_hp.c

417

sc->sc_val = val[2];

sys/dev/acpi/wmi/wmi_hp.c

419

switch (val[1]) {

sys/dev/acpi/wmi/wmi_hp.c

475

wmi_hp_method_write(struct wmi_hp_softc *sc, uint8_t cmd, uint32_t val)

sys/dev/acpi/wmi/wmi_hp.c

482

sc->sc_arg[4] = val;

sys/dev/acpi/wmi/wmi_msi.c

140

uint32_t val;

sys/dev/acpi/wmi/wmi_msi.c

162

val = obj->Integer.Value;

sys/dev/acpi/wmi/wmi_msi.c

164

switch (val) {

sys/dev/acpi/wmi/wmi_msi.c

184

"unknown key 0x%02X for event 0x%02X\n", val, evt);

sys/dev/adb/adb_kbd.c

716

int key, press, val;

sys/dev/adb/adb_kbd.c

736

val = ADBK_KEYVAL(key);

sys/dev/adb/adb_kbd.c

738

*data = val;

sys/dev/ata/atavar.h

147

#define ATACH_ERR(val) (((val) >> 8) & 0xff)

sys/dev/ata/atavar.h

148

#define ATACH_ST(val) (((val) >> 0) & 0xff)

sys/dev/audio/alaw.c

132

aint_t val;

sys/dev/audio/alaw.c

133

val = alaw_to_slinear16[*s++];

sys/dev/audio/alaw.c

134

val <<= AUDIO_INTERNAL_BITS - 16;

sys/dev/audio/alaw.c

135

*d++ = val;

sys/dev/audio/alaw.c

163

uint8_t val;

sys/dev/audio/alaw.c

164

val = (*s++) >> (AUDIO_INTERNAL_BITS - 8);

sys/dev/audio/alaw.c

165

*d++ = slinear8_to_alaw[val];

sys/dev/audio/audio.c

3035

int val;

sys/dev/audio/audio.c

3085

val = audio_track_readablebytes(track);

sys/dev/audio/audio.c

3086

*(int *)addr = val;

sys/dev/audio/audio.c

3088

(int)curproc->p_pid, (int)l->l_lid, val);

sys/dev/audio/audio.c

3123

val = frametobyte(&track->usrbuf.fmt,

sys/dev/audio/audio.c

3125

*(int *)addr = val;

sys/dev/audio/audio.c

3126

TRACET(2, track, "%s bytes=%d", pre, val);

sys/dev/audio/audio.c

3191

val = track->usrbuf.used;

sys/dev/audio/audio.c

3192

*(u_long *)addr = val;

sys/dev/audio/audio.c

3193

TRACET(2, track, "%s bytes=%d", pre, val);

sys/dev/audio/audio.c

3279

val = (sc->sc_props & AUDIO_PROP_FULLDUPLEX)

sys/dev/audio/audio.c

3282

*(int *)addr = val;

sys/dev/audio/audio.c

3283

TRACEF(2, file, "%s fulldup=%d", pre, val);

sys/dev/audio/audio.c

3287

val = sc->sc_props;

sys/dev/audio/audio.c

3288

*(int *)addr = val;

sys/dev/audio/audio.c

3292

"\6CAPTURE" "\5PLAY" "\3INDEP" "\2MMAP" "\1FULLDUP", val);

sys/dev/audio/audio.c

3839

aint2_t val;

sys/dev/audio/audio.c

3840

val = *s++;

sys/dev/audio/audio.c

3841

val = AUDIO_SCALEDOWN(val * ch_volume[ch], 8);

sys/dev/audio/audio.c

3842

*d++ = (aint_t)val;

sys/dev/audio/audio.c

5721

aint2_t val;

sys/dev/audio/audio.c

5737

val = *m++;

sys/dev/audio/audio.c

5738

if (val > maxval)

sys/dev/audio/audio.c

5739

maxval = val;

sys/dev/audio/audio.c

5740

else if (val < minval)

sys/dev/audio/audio.c

5741

minval = val;

sys/dev/audio/audio.c

8527

int val;

sys/dev/audio/audio.c

8546

val = *(int *)addr;

sys/dev/audio/audio.c

8547

TRACE(2, "%s FIOASYNC %s", pre, val ? "on" : "off");

sys/dev/audio/audio.c

8551

if (val) {

sys/dev/audio/linear.c

100

val ^= xor;

sys/dev/audio/linear.c

101

*d++ = val;

sys/dev/audio/linear.c

144

uint16_t val;

sys/dev/audio/linear.c

145

val = *s++;

sys/dev/audio/linear.c

146

val = bswap16(val);

sys/dev/audio/linear.c

147

*d++ = (auint_t)val << shift;

sys/dev/audio/linear.c

153

uint16_t val;

sys/dev/audio/linear.c

154

val = *s++;

sys/dev/audio/linear.c

156

val = bswap16(val);

sys/dev/audio/linear.c

157

val ^= xor;

sys/dev/audio/linear.c

158

*d++ = (auint_t)val << shift;

sys/dev/audio/linear.c

202

uint16_t val;

sys/dev/audio/linear.c

203

val = (*s++) >> shift;

sys/dev/audio/linear.c

204

val = bswap16(val);

sys/dev/audio/linear.c

205

*d++ = val;

sys/dev/audio/linear.c

211

uint16_t val;

sys/dev/audio/linear.c

212

val = (*s++) >> shift;

sys/dev/audio/linear.c

213

val ^= xor;

sys/dev/audio/linear.c

215

val = bswap16(val);

sys/dev/audio/linear.c

216

*d++ = val;

sys/dev/audio/linear.c

252

uint32_t val;

sys/dev/audio/linear.c

254

val = s[0] | (s[1] << 8) | (s[2] << 16);

sys/dev/audio/linear.c

256

val = (s[0] << 16) | (s[1] << 8) | s[2];

sys/dev/audio/linear.c

261

val >>= 24 - AUDIO_INTERNAL_BITS;

sys/dev/audio/linear.c

263

val <<= AUDIO_INTERNAL_BITS - 24;

sys/dev/audio/linear.c

265

val ^= xor;

sys/dev/audio/linear.c

266

*d++ = val;

sys/dev/audio/linear.c

300

uint32_t val;

sys/dev/audio/linear.c

301

val = *s++;

sys/dev/audio/linear.c

302

val ^= xor;

sys/dev/audio/linear.c

304

val <<= 24 - AUDIO_INTERNAL_BITS;

sys/dev/audio/linear.c

306

val >>= AUDIO_INTERNAL_BITS - 24;

sys/dev/audio/linear.c

309

d[0] = val & 0xff;

sys/dev/audio/linear.c

310

d[1] = (val >> 8) & 0xff;

sys/dev/audio/linear.c

311

d[2] = (val >> 16) & 0xff;

sys/dev/audio/linear.c

313

d[0] = (val >> 16) & 0xff;

sys/dev/audio/linear.c

314

d[1] = (val >> 8) & 0xff;

sys/dev/audio/linear.c

315

d[2] = val & 0xff;

sys/dev/audio/linear.c

352

uint32_t val;

sys/dev/audio/linear.c

353

val = *s++;

sys/dev/audio/linear.c

355

val = bswap32(val);

sys/dev/audio/linear.c

356

val >>= 32 - AUDIO_INTERNAL_BITS;

sys/dev/audio/linear.c

357

val ^= xor;

sys/dev/audio/linear.c

358

*d++ = val;

sys/dev/audio/linear.c

392

uint32_t val;

sys/dev/audio/linear.c

393

val = *s++;

sys/dev/audio/linear.c

394

val ^= xor;

sys/dev/audio/linear.c

395

val <<= 32 - AUDIO_INTERNAL_BITS;

sys/dev/audio/linear.c

397

val = bswap32(val);

sys/dev/audio/linear.c

398

*d++ = val;

sys/dev/audio/linear.c

65

uint8_t val;

sys/dev/audio/linear.c

66

val = *s++;

sys/dev/audio/linear.c

67

val ^= xor;

sys/dev/audio/linear.c

68

*d++ = (auint_t)val << (AUDIO_INTERNAL_BITS - 8);

sys/dev/audio/linear.c

98

uint8_t val;

sys/dev/audio/linear.c

99

val = (*s++) >> (AUDIO_INTERNAL_BITS - 8);

sys/dev/audio/mulaw.c

192

aint_t val;

sys/dev/audio/mulaw.c

199

val = mulaw_to_slinear16[m];

sys/dev/audio/mulaw.c

200

val <<= AUDIO_INTERNAL_BITS - 16;

sys/dev/audio/mulaw.c

201

*d++ = val;

sys/dev/audio/mulaw.c

246

uint8_t val;

sys/dev/audio/mulaw.c

247

val = (*s++) >> (AUDIO_INTERNAL_BITS - 8);

sys/dev/audio/mulaw.c

248

m = slinear8_to_mulaw[val];

sys/dev/audio/mulaw.c

251

uint16_t val;

sys/dev/audio/mulaw.c

254

val = *s++ >> (AUDIO_INTERNAL_BITS - 16);

sys/dev/audio/mulaw.c

255

if ((int16_t)val < 0) {

sys/dev/audio/mulaw.c

258

val = ~val;

sys/dev/audio/mulaw.c

262

if ((int16_t)val < -8158 * 4)

sys/dev/audio/mulaw.c

263

val = -8158 * 4;

sys/dev/audio/mulaw.c

264

val -= 33 * 4; /* bias */

sys/dev/audio/mulaw.c

274

val <<= 1;

sys/dev/audio/mulaw.c

278

if (val >= 0xf000) c += 4, val <<= 4;

sys/dev/audio/mulaw.c

279

if (val >= 0xc000) c += 2, val <<= 2;

sys/dev/audio/mulaw.c

280

if (val >= 0x8000) c += 1, val <<= 1;

sys/dev/audio/mulaw.c

284

m += (val >> 11) & 0x0f;

sys/dev/bi/if_ni.c

154

#define NI_WREG(csr, val) \

sys/dev/bi/if_ni.c

155

bus_space_write_4(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/bi/if_ni.c

159

#define WAITREG(csr,val) while (NI_RREG(csr) & val);

sys/dev/bi/kdb.c

73

#define KDB_WL(adr, val) bus_space_write_4(sc->sc_iot, sc->sc_ioh, adr, val)

sys/dev/cadence/if_cemac.c

684

cemac_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/cadence/if_cemac.c

695

*val = CEMAC_READ(ETH_MAN) & ETH_MAN_DATA;

sys/dev/cadence/if_cemac.c

700

cemac_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/cadence/if_cemac.c

708

| (val & ETH_MAN_DATA)));

sys/dev/cardbus/cardbus.c

1151

pcireg_t val;

sys/dev/cardbus/cardbus.c

1154

val = cardbus_conf_read(cc, cf, tag, (off * 4));

sys/dev/cardbus/cardbus.c

1155

if (val != pcs->reg[off])

sys/dev/cardbus/cardbus_exrom.c

103

u_int16_t val;

sys/dev/cardbus/cardbus_exrom.c

105

val = READ_INT16(romt, romh, addr + CARDBUS_EXROM_SIGNATURE);

sys/dev/cardbus/cardbus_exrom.c

106

if (val != 0xaa55) {

sys/dev/cardbus/cardbus_exrom.c

109

thisfunc, rom_image, val);

sys/dev/cardbus/cardbusvar.h

297

#define Cardbus_conf_write(ct, tag, offs, val) (*(ct)->ct_cf->cardbus_conf_write)((ct)->ct_cc, (tag), (offs), (val))

sys/dev/cardbus/cardbusvar.h

298

#define cardbus_conf_write(cc, cf, tag, offs, val) ((cf)->cardbus_conf_write)((cc), (tag), (offs), (val))

sys/dev/cardbus/if_athn_cardbus.c

266

athn_cardbus_write(struct athn_softc *sc, uint32_t addr, uint32_t val)

sys/dev/cardbus/if_athn_cardbus.c

270

bus_space_write_4(csc->csc_iot, csc->csc_ioh, addr, val);

sys/dev/cardbus/if_bwi_cardbus.c

261

bwi_cardbus_conf_write(void *sc, uint32_t reg, uint32_t val)

sys/dev/cardbus/if_bwi_cardbus.c

265

Cardbus_conf_write(csc->csc_ct, csc->csc_tag, reg, val);

sys/dev/cardbus/rbus.c

127

val = 1;

sys/dev/cardbus/rbus.c

130

val = extent_alloc_subregion(rbt->rb_ext,

sys/dev/cardbus/rbus.c

136

if (val == 0) {

sys/dev/cardbus/rbus.c

140

if (val != 0) {

sys/dev/cardbus/rbus.c

74

int val;

sys/dev/dec/dz.c

123

dz_write1(struct dz_softc *sc, u_int off, u_int val)

sys/dev/dec/dz.c

126

bus_space_write_1(sc->sc_iot, sc->sc_ioh, off, val);

sys/dev/dec/dz.c

134

dz_write2(struct dz_softc *sc, u_int off, u_int val)

sys/dev/dec/dz.c

137

bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, val);

sys/dev/dec/dzkbd.c

306

int val;

sys/dev/dec/dzkbd.c

311

data, &type, &val);

sys/dev/dec/dzkbd.c

313

wskbd_input(sc->sc_wskbddev, type, val);

sys/dev/dec/if_le_dec.c

107

void le_dec_writereg(volatile uint16_t *regptr, uint16_t val);

sys/dev/dec/if_le_dec.c

151

le_dec_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/dec/if_le_dec.c

156

LERDWR(port, val, ler1->ler1_rdp);

sys/dev/dec/if_le_dec.c

163

uint16_t val;

sys/dev/dec/if_le_dec.c

166

LERDWR(0, ler1->ler1_rdp, val);

sys/dev/dec/if_le_dec.c

167

return (val);

sys/dev/dec/if_le_dec.c

176

le_dec_writereg(volatile uint16_t *regptr, uint16_t val)

sys/dev/dec/if_le_dec.c

180

while (*regptr != val) {

sys/dev/dec/if_le_dec.c

181

*regptr = val;

sys/dev/dec/if_le_dec.c

184

printf("le: Reg did not settle (to x%x): x%x\n", val,

sys/dev/dkwedge/dkwedge_rdb.c

282

uint32_t *blp, cnt, val;

sys/dev/dkwedge/dkwedge_rdb.c

286

val = 0;

sys/dev/dkwedge/dkwedge_rdb.c

289

val += be32toh(*blp++);

sys/dev/dkwedge/dkwedge_rdb.c

290

return val;

sys/dev/eisa/if_tlp_eisa.c

152

u_int32_t val;

sys/dev/eisa/if_tlp_eisa.c

246

val = bus_space_read_4(iot, ioh, DE425_CFG0);

sys/dev/eisa/if_tlp_eisa.c

247

irq = tlp_eisa_irqs[(val >> 1) & 0x03];

sys/dev/eisa/if_tlp_eisa.c

248

ist = (val & 0x01) ? IST_EDGE : IST_LEVEL;

sys/dev/fdt/arasan_sdhc_fdt.c

172

uint32_t mask, val;

sys/dev/fdt/arasan_sdhc_fdt.c

181

val = 0;

sys/dev/fdt/arasan_sdhc_fdt.c

182

syscon_write_4(sc->sc_syscon, RK3399_GRF_EMMCCORE_CON11, (mask << 16) | val);

sys/dev/fdt/arasan_sdhc_fdt.c

187

val = __SHIFTIN((xin_rate + (1000000 / 2)) / 1000000, RK3399_CORECFG_BASECLKFREQ);

sys/dev/fdt/arasan_sdhc_fdt.c

188

syscon_write_4(sc->sc_syscon, RK3399_GRF_EMMCCORE_CON0, (mask << 16) | val);

sys/dev/fdt/cdns3_fdt.c

55

#define OTGWR4(sc, reg, val) \

sys/dev/fdt/cdns3_fdt.c

56

bus_space_write_4((sc)->sc_otg_bst, (sc)->sc_otg_bsh, (reg), (val))

sys/dev/fdt/dwc3_fdt.c

130

uint32_t val;

sys/dev/fdt/dwc3_fdt.c

132

val = RD4(sc, DWC3_GUSB2PHYCFG(0));

sys/dev/fdt/dwc3_fdt.c

143

val |= GUSB2PHYCFG_PHYIF;

sys/dev/fdt/dwc3_fdt.c

144

val &= ~GUSB2PHYCFG_USBTRDTIM;

sys/dev/fdt/dwc3_fdt.c

145

val |= __SHIFTIN(5, GUSB2PHYCFG_USBTRDTIM);

sys/dev/fdt/dwc3_fdt.c

147

val &= ~GUSB2PHYCFG_PHYIF;

sys/dev/fdt/dwc3_fdt.c

148

val &= ~GUSB2PHYCFG_USBTRDTIM;

sys/dev/fdt/dwc3_fdt.c

149

val |= __SHIFTIN(9, GUSB2PHYCFG_USBTRDTIM);

sys/dev/fdt/dwc3_fdt.c

153

val &= ~GUSB2PHYCFG_ENBLSLPM;

sys/dev/fdt/dwc3_fdt.c

155

val &= ~GUSB2PHYCFG_U2_FREECLK_EXISTS;

sys/dev/fdt/dwc3_fdt.c

157

val &= ~GUSB2PHYCFG_SUSPHY;

sys/dev/fdt/dwc3_fdt.c

158

WR4(sc, DWC3_GUSB2PHYCFG(0), val);

sys/dev/fdt/dwc3_fdt.c

160

val = RD4(sc, DWC3_GUSB3PIPECTL(0));

sys/dev/fdt/dwc3_fdt.c

161

val &= ~GUSB3PIPECTL_UX_EXIT_PX;

sys/dev/fdt/dwc3_fdt.c

163

val &= ~GUSB3PIPECTL_SUSPHY;

sys/dev/fdt/dwc3_fdt.c

165

val &= ~GUSB3PIPECTL_DEPOCHANGE;

sys/dev/fdt/dwc3_fdt.c

166

WR4(sc, DWC3_GUSB3PIPECTL(0), val);

sys/dev/fdt/dwc3_fdt.c

169

val = RD4(sc, DWC3_GUCTL1);

sys/dev/fdt/dwc3_fdt.c

171

val |= GUCTL1_TX_IPGAP_LINECHECK_DIS;

sys/dev/fdt/dwc3_fdt.c

172

WR4(sc, DWC3_GUCTL1, val);

sys/dev/fdt/dwc3_fdt.c

179

val = RD4(sc, DWC3_DCFG);

sys/dev/fdt/dwc3_fdt.c

180

val &= ~DCFG_SPEED;

sys/dev/fdt/dwc3_fdt.c

182

val |= __SHIFTIN(DCFG_SPEED_LS, DCFG_SPEED);

sys/dev/fdt/dwc3_fdt.c

184

val |= __SHIFTIN(DCFG_SPEED_FS, DCFG_SPEED);

sys/dev/fdt/dwc3_fdt.c

186

val |= __SHIFTIN(DCFG_SPEED_HS, DCFG_SPEED);

sys/dev/fdt/dwc3_fdt.c

188

val |= __SHIFTIN(DCFG_SPEED_SS, DCFG_SPEED);

sys/dev/fdt/dwc3_fdt.c

190

val |= __SHIFTIN(DCFG_SPEED_SS, DCFG_SPEED); /* default to super speed */

sys/dev/fdt/dwc3_fdt.c

191

WR4(sc, DWC3_DCFG, val);

sys/dev/fdt/dwc3_fdt.c

197

uint32_t val;

sys/dev/fdt/dwc3_fdt.c

199

val = RD4(sc, DWC3_GCTL);

sys/dev/fdt/dwc3_fdt.c

200

val &= ~GCTL_PRTCAP;

sys/dev/fdt/dwc3_fdt.c

201

val |= __SHIFTIN(mode, GCTL_PRTCAP);

sys/dev/fdt/dwc3_fdt.c

202

WR4(sc, DWC3_GCTL, val);

sys/dev/fdt/dwc3_fdt.c

92

#define WR4(sc, reg, val) \

sys/dev/fdt/dwc3_fdt.c

93

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/fdt/fdt_gpio.c

169

fdtbus_gpio_write(struct fdtbus_gpio_pin *gp, int val)

sys/dev/fdt/fdt_gpio.c

173

gc->gc_funcs->write(gc->gc_dev, gp->gp_priv, val, false);

sys/dev/fdt/fdt_gpio.c

185

fdtbus_gpio_write_raw(struct fdtbus_gpio_pin *gp, int val)

sys/dev/fdt/fdt_gpio.c

189

gc->gc_funcs->write(gc->gc_dev, gp->gp_priv, val, true);

sys/dev/fdt/fdt_openfirm.c

123

const void *val;

sys/dev/fdt/fdt_openfirm.c

144

val = fdt_getprop_by_offset(fdt_data, off,

sys/dev/fdt/fdt_openfirm.c

146

if (val == NULL) {

sys/dev/fdt/fdt_openfirm.c

157

val = fdt_getprop_by_offset(fdt_data, off, &name, &len);

sys/dev/fdt/fdt_openfirm.c

158

if (val == NULL) {

sys/dev/fdt/fdt_openfirm.c

173

const void *val;

sys/dev/fdt/fdt_openfirm.c

186

val = fdt_get_name(fdt_data, off, &len);

sys/dev/fdt/fdt_openfirm.c

187

if (val) {

sys/dev/fdt/fdt_openfirm.c

188

const char *p = strchr(val, '@');

sys/dev/fdt/fdt_openfirm.c

190

len = (uintptr_t)p - (uintptr_t)val + 1;

sys/dev/fdt/fdt_openfirm.c

195

if (val == NULL || len > buflen) {

sys/dev/fdt/fdt_openfirm.c

199

memcpy(buf, val, len - 1);

sys/dev/fdt/fdt_openfirm.c

207

val = fdt_getprop_by_offset(fdt_data, off, &name, &len);

sys/dev/fdt/fdt_openfirm.c

208

if (val == NULL) {

sys/dev/fdt/fdt_openfirm.c

219

if (val == NULL || len > buflen) {

sys/dev/fdt/fdt_openfirm.c

222

memcpy(buf, val, len);

sys/dev/fdt/fdt_openfirm.c

233

const void *val;

sys/dev/fdt/fdt_openfirm.c

246

val = fdt_get_name(fdt_data, off, &len);

sys/dev/fdt/fdt_openfirm.c

247

if (val) {

sys/dev/fdt/fdt_openfirm.c

248

const char *p = strchr(val, '@');

sys/dev/fdt/fdt_openfirm.c

250

len = (uintptr_t)p - (uintptr_t)val + 1;

sys/dev/fdt/fdt_openfirm.c

261

val = fdt_getprop_by_offset(fdt_data, off, &name, &len);

sys/dev/fdt/fdt_openfirm.c

262

if (val == NULL) {

sys/dev/fdt/fdt_openfirm.c

274

if (val == NULL) {

sys/dev/fdt/fdt_pinctrl.c

233

uint32_t val;

sys/dev/fdt/fdt_pinctrl.c

234

if (of_getprop_uint32(phandle, bias_prop, &val) == 0) {

sys/dev/fdt/fdt_pinctrl.c

235

*pull_strength = (int)val;

sys/dev/fdt/fdt_pinctrl.c

261

int val;

sys/dev/fdt/fdt_pinctrl.c

268

if (of_getprop_uint32(phandle, "drive-strength", &val) == 0)

sys/dev/fdt/fdt_pinctrl.c

269

return val;

sys/dev/fdt/fdt_spi.c

174

fdtbus_spi_bus_width_valid_p(uint32_t val)

sys/dev/fdt/fdt_spi.c

176

switch (val) {

sys/dev/fdt/fdtbus.c

553

u_int val = UINT_MAX;

sys/dev/fdt/fdtbus.c

556

of_getprop_uint32(phandle, "phandle", &val);

sys/dev/fdt/fdtbus.c

560

if (child_val < val)

sys/dev/fdt/fdtbus.c

561

val = child_val;

sys/dev/fdt/fdtbus.c

564

return val;

sys/dev/fdt/gpioregulator.c

249

int n, val;

sys/dev/fdt/gpioregulator.c

252

val = fdtbus_gpio_read(sc->sc_pins[n]);

sys/dev/fdt/gpioregulator.c

253

mask |= (val << n);

sys/dev/fdt/panel_fdt.c

127

val = fdtbus_get_string(phandle, "data-mapping");

sys/dev/fdt/panel_fdt.c

128

if (val == NULL) {

sys/dev/fdt/panel_fdt.c

132

if (strcmp(val, "jeida-18") == 0)

sys/dev/fdt/panel_fdt.c

134

else if (strcmp(val, "jeida-24") == 0)

sys/dev/fdt/panel_fdt.c

136

else if (strcmp(val, "vesa-24") == 0)

sys/dev/fdt/panel_fdt.c

139

aprint_error(": unknown data-mapping \"%s\"\n", val);

sys/dev/fdt/panel_fdt.c

95

const char *val;

sys/dev/fdt/pinctrl_single.c

124

const int val = be32toh(pins[1]);

sys/dev/fdt/pinctrl_single.c

127

pinctrl_single_pins_write(sc, off, val | mux);

sys/dev/fdt/pinctrl_single.c

70

pinctrl_single_pins_write(struct pinctrl_single_softc *sc, u_int off, u_int val)

sys/dev/fdt/pinctrl_single.c

78

aprint_debug_dev(sc->sc_dev, "writing %#x with %#x\n", off, val);

sys/dev/fdt/pinctrl_single.c

84

u.reg8 |= val;

sys/dev/fdt/pinctrl_single.c

90

u.reg16 |= val;

sys/dev/fdt/pinctrl_single.c

96

u.reg32 |= val;

sys/dev/fdt/pl061gpio_fdt.c

162

int val;

sys/dev/fdt/pl061gpio_fdt.c

164

val = plgpio_pin_read(gpin->pin_sc, gpin->pin_no);

sys/dev/fdt/pl061gpio_fdt.c

167

val = !val;

sys/dev/fdt/pl061gpio_fdt.c

169

return val;

sys/dev/fdt/pl061gpio_fdt.c

173

plgpio_fdt_write(device_t dev, void *priv, int val, bool raw)

sys/dev/fdt/pl061gpio_fdt.c

178

val = !val;

sys/dev/fdt/pl061gpio_fdt.c

180

plgpio_pin_write(gpin->pin_sc, gpin->pin_no, val);

sys/dev/fdt/syscon.c

91

syscon_generic_write_4(void *priv, bus_size_t reg, uint32_t val)

sys/dev/fdt/syscon.c

97

bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg, val);

sys/dev/goldfish/gfrtc.c

60

#define GOLDFISH_RTC_WRITE(sc, reg, val) \

sys/dev/goldfish/gfrtc.c

61

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/gpio/gpiobutton.c

158

int val;

sys/dev/gpio/gpiobutton.c

160

val = gpio_pin_read(sc->sc_gpio, &sc->sc_map, 0);

sys/dev/gpio/gpiobutton.c

162

val = !val;

sys/dev/gpio/gpiobutton.c

164

return val;

sys/dev/gpio/gpioirq.c

252

int val;

sys/dev/gpio/gpioirq.c

256

val = gpio_pin_read(sc->sc_gpio, &sc->sc_map, is->i_thispin_index);

sys/dev/gpio/gpioirq.c

260

device_xname(sc->sc_dev), sc->sc_intrs[is->i_thispin_index].sc_intrstr, val);

sys/dev/gpio/gpioirq.c

270

q->theval = val;

sys/dev/gpio/gpiopps.c

316

int val = gpio_pin_read(sc->sc_gpio, &sc->sc_map, 0);

sys/dev/gpio/gpiopps.c

318

if (val == sc->sc_assert_val)

sys/dev/gpio/gpiopwm.c

166

int val, error;

sys/dev/gpio/gpiopwm.c

173

node.sysctl_data = &val;

sys/dev/gpio/gpiopwm.c

175

val = sc->sc_ticks_on;

sys/dev/gpio/gpiopwm.c

180

sc->sc_ticks_on = val;

sys/dev/gpio/gpiopwm.c

193

int val, error;

sys/dev/gpio/gpiopwm.c

200

node.sysctl_data = &val;

sys/dev/gpio/gpiopwm.c

202

val = sc->sc_ticks_off;

sys/dev/gpio/gpiopwm.c

207

sc->sc_ticks_off = val;

sys/dev/gpio/gpiosim.c

263

uint64_t val, error;

sys/dev/gpio/gpiosim.c

272

node.sysctl_data = &val;

sys/dev/gpio/gpiosim.c

274

val = sc->sc_state;

sys/dev/gpio/gpiosim.c

281

sc->sc_state = val;

sys/dev/hdaudio/hdafg.c

3687

uint8_t val = COP_SET_UNSOLICITED_RESPONSE_ENABLE;

sys/dev/hdaudio/hdafg.c

3689

val |= HDAUDIO_UNSOLTAG_EVENT_DD;

sys/dev/hdaudio/hdafg.c

3691

val |= HDAUDIO_UNSOLTAG_EVENT_HP;

sys/dev/hdaudio/hdafg.c

3694

CORB_SET_UNSOLICITED_RESPONSE, val);

sys/dev/hdaudio/hdaudiovar.h

218

_hda_write1(struct hdaudio_softc *sc, bus_size_t off, uint8_t val)

sys/dev/hdaudio/hdaudiovar.h

224

tmp = (val << shift) | (tmp & ~(0xff << shift));

sys/dev/hdaudio/hdaudiovar.h

227

bus_space_write_1(sc->sc_memt, sc->sc_memh, off, val);

sys/dev/hdaudio/hdaudiovar.h

232

_hda_write2(struct hdaudio_softc *sc, bus_size_t off, uint16_t val)

sys/dev/hdaudio/hdaudiovar.h

238

tmp = (val << shift) | (tmp & ~(0xffff << shift));

sys/dev/hdaudio/hdaudiovar.h

241

bus_space_write_2(sc->sc_memt, sc->sc_memh, off, val);

sys/dev/hdaudio/hdaudiovar.h

247

#define hda_write4(sc, off, val) \

sys/dev/hdaudio/hdaudiovar.h

248

bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (off), (val))

sys/dev/hpc/bivideo.c

638

int val = -1;

sys/dev/hpc/bivideo.c

644

CONFIG_HOOK_POWER_LCDLIGHT, &val) != -1) {

sys/dev/hpc/bivideo.c

646

VPRINTF(("bivideo_init_backlight: real backlight=%d\n", val));

sys/dev/hpc/bivideo.c

647

if (val == 0)

sys/dev/hpc/bivideo.c

669

int val = -1;

sys/dev/hpc/bivideo.c

676

CONFIG_HOOK_BRIGHTNESS_MAX, &val) != -1) {

sys/dev/hpc/bivideo.c

678

VPRINTF(("bivideo_init_brightness: real brightness max=%d\n", val));

sys/dev/hpc/bivideo.c

679

sc->sc_max_brightness = val;

sys/dev/hpc/bivideo.c

680

val = -1;

sys/dev/hpc/bivideo.c

682

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/dev/hpc/bivideo.c

684

VPRINTF(("bivideo_init_brightness: real brightness=%d\n", val));

sys/dev/hpc/bivideo.c

685

sc->sc_brightness_save = sc->sc_brightness = val;

sys/dev/hpc/bivideo.c

711

int val = -1;

sys/dev/hpc/bivideo.c

718

CONFIG_HOOK_CONTRAST_MAX, &val) != -1) {

sys/dev/hpc/bivideo.c

720

VPRINTF(("bivideo_init_contrast: real contrast max=%d\n", val));

sys/dev/hpc/bivideo.c

721

sc->sc_max_contrast = val;

sys/dev/hpc/bivideo.c

722

val = -1;

sys/dev/hpc/bivideo.c

724

CONFIG_HOOK_CONTRAST, &val) != -1) {

sys/dev/hpc/bivideo.c

726

VPRINTF(("bivideo_init_contrast: real contrast=%d\n", val));

sys/dev/hpc/bivideo.c

727

sc->sc_contrast = val;

sys/dev/hpc/bivideo.c

749

bivideo_set_brightness(struct bivideo_softc *sc, int val)

sys/dev/hpc/bivideo.c

751

sc->sc_brightness = val;

sys/dev/hpc/bivideo.c

753

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_BRIGHTNESS, &val);

sys/dev/hpc/bivideo.c

755

CONFIG_HOOK_BRIGHTNESS, &val) != -1) {

sys/dev/hpc/bivideo.c

756

sc->sc_brightness = val;

sys/dev/hpc/bivideo.c

761

bivideo_set_contrast(struct bivideo_softc *sc, int val)

sys/dev/hpc/bivideo.c

763

sc->sc_contrast = val;

sys/dev/hpc/bivideo.c

765

config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_CONTRAST, &val);

sys/dev/hpc/bivideo.c

767

CONFIG_HOOK_CONTRAST, &val) != -1) {

sys/dev/hpc/bivideo.c

768

sc->sc_contrast = val;

sys/dev/hpc/hpcapm.c

368

int val;

sys/dev/hpc/hpcapm.c

379

CONFIG_HOOK_ACADAPTER, &val) != -1)

sys/dev/hpc/hpcapm.c

380

pinfo->ac_state = val;

sys/dev/hpc/hpcapm.c

385

CONFIG_HOOK_CHARGE, &val) != -1)

sys/dev/hpc/hpcapm.c

386

pinfo->battery_flags = val;

sys/dev/hpc/hpcapm.c

391

CONFIG_HOOK_BATTERYVAL, &val) != -1)

sys/dev/hpc/hpcapm.c

392

pinfo->battery_life = val;

sys/dev/i2c/ac100.c

201

ac100_read(struct ac100_softc *sc, uint8_t reg, uint16_t *val)

sys/dev/i2c/ac100.c

203

return iic_smbus_read_word(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/ac100.c

207

ac100_write(struct ac100_softc *sc, uint8_t reg, uint16_t val)

sys/dev/i2c/ac100.c

209

return iic_smbus_write_word(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/act8846.c

186

act8846_read(struct act8846_softc *sc, uint8_t reg, uint8_t *val)

sys/dev/i2c/act8846.c

188

return iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/act8846.c

192

act8846_write(struct act8846_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/act8846.c

194

return iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/act8846.c

240

uint8_t val;

sys/dev/i2c/act8846.c

254

val = __SHIFTIN(n, ACT_VSET_VSET);

sys/dev/i2c/act8846.c

257

error = act8846_write(sc, c->c_base + ACT_VSET0_OFFSET, val);

sys/dev/i2c/act8846.c

270

uint8_t val;

sys/dev/i2c/act8846.c

274

error = act8846_read(sc, c->c_base + ACT_VSET0_OFFSET, &val);

sys/dev/i2c/act8846.c

279

*pvol = act8846_vset[__SHIFTOUT(val, ACT_VSET_VSET)];

sys/dev/i2c/act8846.c

288

uint8_t val, regoff, regmask;

sys/dev/i2c/act8846.c

300

error = act8846_read(sc, c->c_base + regoff, &val);

sys/dev/i2c/act8846.c

305

*penabled = !!(val & regmask);

sys/dev/i2c/act8846.c

313

uint8_t val, regoff, regmask;

sys/dev/i2c/act8846.c

325

if ((error = act8846_read(sc, c->c_base + regoff, &val)) != 0)

sys/dev/i2c/act8846.c

327

val |= regmask;

sys/dev/i2c/act8846.c

328

error = act8846_write(sc, c->c_base + regoff, val);

sys/dev/i2c/act8846.c

343

uint8_t val, regoff, regmask;

sys/dev/i2c/act8846.c

355

if ((error = act8846_read(sc, c->c_base + regoff, &val)) != 0)

sys/dev/i2c/act8846.c

357

val &= ~regmask;

sys/dev/i2c/act8846.c

358

error = act8846_write(sc, c->c_base + regoff, val);

sys/dev/i2c/adm1021.c

742

admtemp_encode_temp(const uint32_t val, int8_t *sdata, uint8_t *xdata,

sys/dev/i2c/adm1021.c

749

tmp = (val - 273150000) / 125000;

sys/dev/i2c/adm1021.c

755

tmp = (val - 273150000) / 1000000;

sys/dev/i2c/adm1026.c

123

#define VAL_TO_SPEED(val, div) (1350000 / (val * div))

sys/dev/i2c/adm1026.c

127

#define VAL_TO_TEMP(val) (val & 0x80 ? \

sys/dev/i2c/adm1026.c

128

145150000 + 1000000 * (val & 0x7f) : /* -128C */ \

sys/dev/i2c/adm1026.c

129

273150000 + 1000000 * val)

sys/dev/i2c/adm1026.c

135

#define VAL_TO_VOLT(val, num) (val * adm1026_volts_table[num].incr + \

sys/dev/i2c/adm1026.c

197

adm1026_read_reg(struct adm1026_softc *sc, uint8_t reg, uint8_t *val)

sys/dev/i2c/adm1026.c

199

return adm1026_read_reg_int(sc->sc_tag, sc->sc_address, reg, val);

sys/dev/i2c/adm1026.c

230

uint8_t reg, val;

sys/dev/i2c/adm1026.c

235

err = adm1026_read_reg_int(tag, addr, reg, &val);

sys/dev/i2c/adm1026.c

236

if (err || val != ADM1026_MANF_ID) {

sys/dev/i2c/adm1026.c

259

uint8_t reg, val, rev, fan_div2, fan_mask;

sys/dev/i2c/adm1026.c

286

adm1026_read_reg(sc, i, &val);

sys/dev/i2c/adm1026.c

287

printf("reg %02x: %02x\n", i, val);

sys/dev/i2c/adm1026.c

297

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

301

if (!(val & ADM1026_CONF1_MONITOR)) {

sys/dev/i2c/adm1026.c

305

val |= ADM1026_CONF1_MONITOR;

sys/dev/i2c/adm1026.c

306

if (adm1026_start_monitor(sc, 0, val))

sys/dev/i2c/adm1026.c

310

sc->sc_cfg[0] = val;

sys/dev/i2c/adm1026.c

394

uint8_t reg, val;

sys/dev/i2c/adm1026.c

398

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

403

val |= ADM1026_CONF1_MONITOR;

sys/dev/i2c/adm1026.c

405

val = newval;

sys/dev/i2c/adm1026.c

407

if (adm1026_write_reg(sc, reg, val) != 0) {

sys/dev/i2c/adm1026.c

419

uint8_t reg, val;

sys/dev/i2c/adm1026.c

422

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

427

val &= ~ADM1026_CONF1_MONITOR;

sys/dev/i2c/adm1026.c

428

if (adm1026_write_reg(sc, reg, val) != 0) {

sys/dev/i2c/adm1026.c

439

uint8_t reg, div1, div2, val;

sys/dev/i2c/adm1026.c

490

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

495

sc->sc_highlim[snum] = val;

sys/dev/i2c/adm1026.c

521

uint8_t reg, val;

sys/dev/i2c/adm1026.c

533

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

538

sc->sc_thermlim[snum] = val;

sys/dev/i2c/adm1026.c

541

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

546

sc->sc_highlim[snum] = val;

sys/dev/i2c/adm1026.c

549

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

554

sc->sc_lowlim[snum] = val;

sys/dev/i2c/adm1026.c

581

uint8_t reg, val;

sys/dev/i2c/adm1026.c

593

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

598

sc->sc_highlim[snum] = val;

sys/dev/i2c/adm1026.c

601

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

606

sc->sc_lowlim[snum] = val;

sys/dev/i2c/adm1026.c

644

uint8_t reg, val;

sys/dev/i2c/adm1026.c

647

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

651

if (val == 0xff || val == 0x00) /* Fan missing or stopped */

sys/dev/i2c/adm1026.c

654

edata->value_cur = VAL_TO_SPEED(val, sc->sc_fandiv[fan]);

sys/dev/i2c/adm1026.c

662

uint8_t reg, val;

sys/dev/i2c/adm1026.c

665

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

670

edata->value_cur = VAL_TO_TEMP(val);

sys/dev/i2c/adm1026.c

678

uint8_t reg, val;

sys/dev/i2c/adm1026.c

681

if (adm1026_read_reg(sc, reg, &val) != 0) {

sys/dev/i2c/adm1026.c

686

if (volt == VBATT_NUM && val < VBATT_MIN)

sys/dev/i2c/adm1026.c

688

edata->value_cur = VAL_TO_VOLT(val, volt);

sys/dev/i2c/adm1026.c

711

uint8_t reg, val;

sys/dev/i2c/adm1026.c

717

if (adm1026_read_reg(sc, reg, &val) != 0)

sys/dev/i2c/adm1026.c

719

if (val == 0x00) /* No limit */

sys/dev/i2c/adm1026.c

721

limits->sel_warnmin = VAL_TO_SPEED(val, sc->sc_fandiv[fan]);

sys/dev/i2c/adm1026.c

730

uint8_t reg, val;

sys/dev/i2c/adm1026.c

735

if (adm1026_read_reg(sc, reg, &val) != 0)

sys/dev/i2c/adm1026.c

737

limits->sel_critmax = VAL_TO_TEMP(val);

sys/dev/i2c/adm1026.c

741

if (adm1026_read_reg(sc, reg, &val) != 0)

sys/dev/i2c/adm1026.c

743

limits->sel_warnmax = VAL_TO_TEMP(val);

sys/dev/i2c/adm1026.c

747

if (adm1026_read_reg(sc, reg, &val) != 0)

sys/dev/i2c/adm1026.c

749

limits->sel_warnmin = VAL_TO_TEMP(val);

sys/dev/i2c/adm1026.c

758

uint8_t reg, val;

sys/dev/i2c/adm1026.c

763

if (adm1026_read_reg(sc, reg, &val) != 0)

sys/dev/i2c/adm1026.c

765

limits->sel_warnmax = VAL_TO_VOLT(val, volt);

sys/dev/i2c/adm1026.c

769

if (adm1026_read_reg(sc, reg, &val) != 0)

sys/dev/i2c/adm1026.c

771

limits->sel_warnmin = VAL_TO_VOLT(val, volt);

sys/dev/i2c/adm1026.c

794

uint8_t reg, val;

sys/dev/i2c/adm1026.c

801

val = sc->sc_highlim[snum];

sys/dev/i2c/adm1026.c

804

val = 0xff;

sys/dev/i2c/adm1026.c

806

val = SPEED_TO_VAL(limits->sel_warnmin,

sys/dev/i2c/adm1026.c

810

adm1026_write_reg(sc, reg, val);

sys/dev/i2c/adm1026.c

819

uint8_t reg, val;

sys/dev/i2c/adm1026.c

826

val = sc->sc_highlim[snum];

sys/dev/i2c/adm1026.c

828

val = TEMP_TO_VAL(limits->sel_critmax);

sys/dev/i2c/adm1026.c

831

adm1026_write_reg(sc, reg, val);

sys/dev/i2c/adm1026.c

836

val = sc->sc_thermlim[snum];

sys/dev/i2c/adm1026.c

838

val = TEMP_TO_VAL(limits->sel_warnmax);

sys/dev/i2c/adm1026.c

841

adm1026_write_reg(sc, reg, val);

sys/dev/i2c/adm1026.c

846

val = sc->sc_lowlim[snum];

sys/dev/i2c/adm1026.c

848

val = TEMP_TO_VAL(limits->sel_warnmin);

sys/dev/i2c/adm1026.c

851

adm1026_write_reg(sc, reg, val);

sys/dev/i2c/adm1026.c

860

uint8_t reg, val;

sys/dev/i2c/adm1026.c

867

val = sc->sc_highlim[snum];

sys/dev/i2c/adm1026.c

869

val = VOLT_TO_VAL(limits->sel_warnmax, volt);

sys/dev/i2c/adm1026.c

872

adm1026_write_reg(sc, reg, val);

sys/dev/i2c/adm1026.c

877

val = sc->sc_lowlim[snum];

sys/dev/i2c/adm1026.c

879

val = VOLT_TO_VAL(limits->sel_warnmin, volt);

sys/dev/i2c/adm1026.c

882

adm1026_write_reg(sc, reg, val);

sys/dev/i2c/adm1026.c

887

adm1026_read_reg_int(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val)

sys/dev/i2c/adm1026.c

893

err = iic_exec(tag, I2C_OP_READ_WITH_STOP, addr, &reg, 1, val, 1, 0);

sys/dev/i2c/adm1026.c

899

adm1026_write_reg(struct adm1026_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/adm1026.c

906

&reg, 1, &val, 1, 0);

sys/dev/i2c/adm1026reg.h

131

#define ADM1026_PIN_IS_TDM2(val) ((val & 0x08) == 0)

sys/dev/i2c/adm1026reg.h

134

#define ADM1026_PIN_IS_FAN(val, x) ((val & (1 << x)) == 0)

sys/dev/i2c/adt7462.c

1064

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1067

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

1071

edata->value_cur = VAL_TO_VOLT(val, sc->sc_vscale[volt]);

sys/dev/i2c/adt7462.c

1078

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1083

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

1087

val &= sc->sc_fan_conf;

sys/dev/i2c/adt7462.c

1090

if (val != 0)

sys/dev/i2c/adt7462.c

1098

if (val & (1 << i)) {

sys/dev/i2c/adt7462.c

1130

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1136

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0)

sys/dev/i2c/adt7462.c

1138

if (val == 0x00) /* No limit */

sys/dev/i2c/adt7462.c

1140

limits->sel_warnmin = VAL_TO_SPEED(val, 0);

sys/dev/i2c/adt7462.c

1149

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1160

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0)

sys/dev/i2c/adt7462.c

1162

limits->sel_critmax = VAL_TO_TEMP(val, 0);

sys/dev/i2c/adt7462.c

1166

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0)

sys/dev/i2c/adt7462.c

1168

limits->sel_warnmax = VAL_TO_TEMP(val, 0);

sys/dev/i2c/adt7462.c

1172

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0)

sys/dev/i2c/adt7462.c

1174

limits->sel_warnmin = VAL_TO_TEMP(val, 0);

sys/dev/i2c/adt7462.c

1183

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1188

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0)

sys/dev/i2c/adt7462.c

1190

limits->sel_warnmax = VAL_TO_VOLT(val, sc->sc_vscale[volt]);

sys/dev/i2c/adt7462.c

1194

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0)

sys/dev/i2c/adt7462.c

1196

limits->sel_warnmin = VAL_TO_VOLT(val, sc->sc_vscale[volt]);

sys/dev/i2c/adt7462.c

1219

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1226

val = sc->sc_highlim[snum];

sys/dev/i2c/adt7462.c

1229

val = 0xff;

sys/dev/i2c/adt7462.c

1231

val = SPEED_TO_MSB(limits->sel_warnmin);

sys/dev/i2c/adt7462.c

1234

adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val);

sys/dev/i2c/adt7462.c

1243

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1251

val = sc->sc_therm1[snum];

sys/dev/i2c/adt7462.c

1253

val = sc->sc_therm2[snum];

sys/dev/i2c/adt7462.c

1255

val = TEMP_TO_MSB(limits->sel_critmax);

sys/dev/i2c/adt7462.c

1260

if (val > sc->sc_therm2[snum])

sys/dev/i2c/adt7462.c

1261

val = sc->sc_therm2[snum];

sys/dev/i2c/adt7462.c

1262

sc->sc_therm1[snum] = val;

sys/dev/i2c/adt7462.c

1265

if (val > sc->sc_therm1[snum])

sys/dev/i2c/adt7462.c

1266

val = sc->sc_therm1[snum];

sys/dev/i2c/adt7462.c

1267

sc->sc_therm2[snum] = val;

sys/dev/i2c/adt7462.c

1269

adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val);

sys/dev/i2c/adt7462.c

1274

val = sc->sc_highlim[snum];

sys/dev/i2c/adt7462.c

1276

val = TEMP_TO_MSB(limits->sel_warnmax);

sys/dev/i2c/adt7462.c

1279

adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val);

sys/dev/i2c/adt7462.c

1284

val = sc->sc_lowlim[snum];

sys/dev/i2c/adt7462.c

1286

val = TEMP_TO_MSB(limits->sel_warnmin);

sys/dev/i2c/adt7462.c

1289

adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val);

sys/dev/i2c/adt7462.c

1298

uint8_t reg, val;

sys/dev/i2c/adt7462.c

130

#define VAL_TO_VOLT(val, scale) \

sys/dev/i2c/adt7462.c

1305

val = sc->sc_highlim[snum];

sys/dev/i2c/adt7462.c

1307

val = VOLT_TO_MSB(limits->sel_warnmax,

sys/dev/i2c/adt7462.c

131

(val * scale)

sys/dev/i2c/adt7462.c

1311

adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val);

sys/dev/i2c/adt7462.c

1316

val = sc->sc_lowlim[snum];

sys/dev/i2c/adt7462.c

1318

val = VOLT_TO_MSB(limits->sel_warnmin,

sys/dev/i2c/adt7462.c

1322

adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val);

sys/dev/i2c/adt7462.c

1331

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1335

val = node.sysctl_num & 0xff;

sys/dev/i2c/adt7462.c

1336

reg = ADT7462_PWM_DUTY(val);

sys/dev/i2c/adt7462.c

1338

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

1343

sysval = val * 100 / 255;

sys/dev/i2c/adt7462.c

1353

val = (sysval * 255 / 100) & 0xff;

sys/dev/i2c/adt7462.c

1354

if (adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val) != 0) {

sys/dev/i2c/adt7462.c

1367

uint8_t reg, val, old, new;

sys/dev/i2c/adt7462.c

1371

val = node.sysctl_num & 0xff;

sys/dev/i2c/adt7462.c

1372

reg = ADT7462_HYST_TRANGE(val);

sys/dev/i2c/adt7462.c

1374

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

1378

old = (val & ADT7462_HTR_RNGE_MASK) >> ADT7462_HTR_RNGE_SHFT;

sys/dev/i2c/adt7462.c

1396

new |= (val & ADT7462_HTR_HYST_MASK);

sys/dev/i2c/adt7462.c

1409

uint8_t reg, val;

sys/dev/i2c/adt7462.c

1416

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

1420

sysval = val - ADT7462_TEMP_OFFSET;

sys/dev/i2c/adt7462.c

1430

val = (sysval + ADT7462_TEMP_OFFSET) & 0xff;

sys/dev/i2c/adt7462.c

1433

if (val > sc->sc_therm1[temp] - 1)

sys/dev/i2c/adt7462.c

1436

if (val > sc->sc_therm2[temp] - 1)

sys/dev/i2c/adt7462.c

1440

if (adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val) != 0) {

sys/dev/i2c/adt7462.c

1452

uint8_t reg, val, mreg, mval;

sys/dev/i2c/adt7462.c

1459

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

1463

sysval = val - ADT7462_TEMP_OFFSET;

sys/dev/i2c/adt7462.c

1473

val = (sysval + ADT7462_TEMP_OFFSET) & 0xff;

sys/dev/i2c/adt7462.c

1476

if (val > sc->sc_therm1[temp] - 1)

sys/dev/i2c/adt7462.c

1479

if (val > sc->sc_therm2[temp] - 1)

sys/dev/i2c/adt7462.c

1488

if (val < mval + 1)

sys/dev/i2c/adt7462.c

1490

if (adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val) != 0) {

sys/dev/i2c/adt7462.c

1498

adt7462_read_reg(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val)

sys/dev/i2c/adt7462.c

1504

err = iic_exec(tag, I2C_OP_READ_WITH_STOP, addr, &reg, 1, val, 1, 0);

sys/dev/i2c/adt7462.c

1510

adt7462_write_reg(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val)

sys/dev/i2c/adt7462.c

1516

err = iic_exec(tag, I2C_OP_WRITE_WITH_STOP, addr, &reg, 1, &val, 1, 0);

sys/dev/i2c/adt7462.c

230

uint8_t reg, val;

sys/dev/i2c/adt7462.c

235

err = adt7462_read_reg(tag, addr, reg, &val);

sys/dev/i2c/adt7462.c

236

if (err || val != ADT7462_DEV_ID_VAL) {

sys/dev/i2c/adt7462.c

243

err = adt7462_read_reg(tag, addr, reg, &val);

sys/dev/i2c/adt7462.c

244

if (err || val != ADT7462_COMP_ID_VAL) {

sys/dev/i2c/adt7462.c

267

uint8_t reg, rev, val, pin_cfg[4];

sys/dev/i2c/adt7462.c

286

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

290

pin_cfg[0] = val;

sys/dev/i2c/adt7462.c

292

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

296

pin_cfg[1] = val;

sys/dev/i2c/adt7462.c

298

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

302

pin_cfg[2] = val;

sys/dev/i2c/adt7462.c

304

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

308

pin_cfg[3] = val;

sys/dev/i2c/adt7462.c

406

uint8_t reg, val;

sys/dev/i2c/adt7462.c

413

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

417

if (!(val & ADT7462_CONF1_MONITOR)) {

sys/dev/i2c/adt7462.c

419

val |= ADT7462_CONF1_MONITOR;

sys/dev/i2c/adt7462.c

421

reg, val) != 0) {

sys/dev/i2c/adt7462.c

439

uint8_t reg, val;

sys/dev/i2c/adt7462.c

442

if (adt7462_read_reg(sc->sc_tag, sc->sc_address, reg, &val) != 0) {

sys/dev/i2c/adt7462.c

447

val &= ~ADT7462_CONF1_MONITOR;

sys/dev/i2c/adt7462.c

448

if (adt7462_write_reg(sc->sc_tag, sc->sc_address, reg, val) != 0) {

sys/dev/i2c/adt7462.c

459

uint8_t reg, val;

sys/dev/i2c/adt7462.c

473

reg, &val) != 0) {

sys/dev/i2c/adt7462.c

478

sc->sc_highlim[snum] = val;

sys/dev/i2c/adt7462.c

503

uint8_t reg, val, val2;

sys/dev/i2c/adt7462.c

515

reg, &val) != 0) {

sys/dev/i2c/adt7462.c

520

sc->sc_therm1[snum] = val;

sys/dev/i2c/adt7462.c

530

if (val <= val2)

sys/dev/i2c/adt7462.c

537

reg, &val) != 0) {

sys/dev/i2c/adt7462.c

542

sc->sc_highlim[snum] = val;

sys/dev/i2c/adt7462.c

546

reg, &val) != 0) {

sys/dev/i2c/adt7462.c

551

sc->sc_lowlim[snum] = val;

sys/dev/i2c/adt7462.c

578

uint8_t reg, val;

sys/dev/i2c/adt7462.c

715

reg, &val) != 0) {

sys/dev/i2c/adt7462.c

720

sc->sc_highlim[snum] = val;

sys/dev/i2c/adt7462.c

724

reg, &val) != 0) {

sys/dev/i2c/adt7462.c

729

sc->sc_lowlim[snum] = val;

sys/dev/i2c/adt7462.c

779

uint8_t reg, val, val2, rw;

sys/dev/i2c/adt7462.c

820

reg, &val) != 0) {

sys/dev/i2c/adt7462.c

825

val &= ADT7462_PWM_BHVR_MASK;

sys/dev/i2c/adt7462.c

828

if (val == ADT7462_PWM_BHVR_MAN) {

sys/dev/i2c/adt7462.c

846

switch (val) {

sys/dev/i2c/adt7462.c

872

val2 = (val & ADT7462_PWM_BHVR_MASK) >> ADT7462_PWM_BHVR_SHFT;

sys/dev/i2c/adt7462.c

877

if (val == ADT7462_PWM_BHVR_REM1 ||

sys/dev/i2c/adt7462.c

878

val == ADT7462_PWM_BHVR_REM2) {

sys/dev/i2c/adt7462.c

886

if (val == ADT7462_PWM_BHVR_REM1 &&

sys/dev/i2c/adt7462.c

892

if (val == ADT7462_PWM_BHVR_REM2 &&

sys/dev/i2c/adt7462reg.h

269

#define ADT7462_FAN_TACH_EN(val, x) ((val & (1 << x)) != 0)

sys/dev/i2c/adt7462reg.h

340

#define ADT7462_PCR1_TACH(val, x) (x > 4 || \

sys/dev/i2c/adt7462reg.h

341

(x == 4 && (val & ADT7462_PIN7_CONF)) || \

sys/dev/i2c/adt7462reg.h

342

(!(val & ADT7462_VID_EN) && (val & (1 << (4 - x)))))

sys/dev/i2c/adt7462reg.h

343

#define ADT7462_PCR1_TEMP(val, x) (x== 0 || x == 2 || \

sys/dev/i2c/adt7462reg.h

344

(x == 3 && (val & ADT7462_DIODE3_CONF)) || \

sys/dev/i2c/adt7462reg.h

345

(x == 1 && (val & ADT7462_DIODE1_CONF)))

sys/dev/i2c/adt7462reg.h

346

#define ADT7462_PCR1_PIN7_V(val) (!(val & ADT7462_PIN7_CONF))

sys/dev/i2c/adt7462reg.h

347

#define ADT7462_PCR1_PIN19_V(val) (!(val & ADT7462_DIODE3_CONF))

sys/dev/i2c/adt7462reg.h

348

#define ADT7462_PCR1_PIN15_V(val) (!(val & ADT7462_DIODE1_CONF))

sys/dev/i2c/adt7462reg.h

349

#define ADT7462_PCR1_VIDS(val) ((val & ADT7462_VID_EN) != 0)

sys/dev/i2c/adt7462reg.h

360

#define ADT7462_PCR2_P23_25V(val) ((val & ADT7462_PIN23_CONF) == 0x01)

sys/dev/i2c/adt7462reg.h

361

#define ADT7462_PCR2_P23_18V(val) ((val & ADT7462_PIN23_CONF) == 0x02)

sys/dev/i2c/adt7462reg.h

362

#define ADT7462_PCR2_P23_15V(val) ((val & ADT7462_PIN23_CONF) == 0x03)

sys/dev/i2c/adt7462reg.h

363

#define ADT7462_PCR2_P22_TACH8(val) ((val & ADT7462_PIN22_CONF) == 0x04)

sys/dev/i2c/adt7462reg.h

364

#define ADT7462_PCR2_P21_TACH7(val) ((val & ADT7462_PIN21_CONF) == 0x08)

sys/dev/i2c/adt7462reg.h

365

#define ADT7462_PCR2_P19_09V(val) ((val & ADT7462_PIN19_CONF) == 0x10)

sys/dev/i2c/adt7462reg.h

366

#define ADT7462_PCR2_P15_18V(val) ((val & ADT7462_PIN15_CONF) == 0x20)

sys/dev/i2c/adt7462reg.h

367

#define ADT7462_PCR2_P13_PWM4(val) ((val & ADT7462_PIN13_CONF) == 0x40)

sys/dev/i2c/adt7462reg.h

368

#define ADT7462_PCR2_P8_TACH6(val) ((val & ADT7462_PIN8_CONF) == 0x80)

sys/dev/i2c/adt7462reg.h

369

#define ADT7462_PCR2_TACH(val, x) (x < 5 || \

sys/dev/i2c/adt7462reg.h

370

(x == 5 && ADT7462_PCR2_P8_TACH6(val)) || \

sys/dev/i2c/adt7462reg.h

371

(x == 6 && ADT7462_PCR2_P21_TACH7(val)) || \

sys/dev/i2c/adt7462reg.h

372

(x == 7 && ADT7462_PCR2_P22_TACH8(val)))

sys/dev/i2c/adt7462reg.h

380

#define ADT7462_PCR3_P24_25V(val) ((val & ADT7462_PIN24_CONF) == 0x40)

sys/dev/i2c/adt7462reg.h

381

#define ADT7462_PCR3_P24_18V(val) ((val & ADT7462_PIN24_CONF) == 0x80)

sys/dev/i2c/adt7462reg.h

382

#define ADT7462_PCR3_P24_15V(val) ((val & ADT7462_PIN24_CONF) == 0xc0)

sys/dev/i2c/adt7462reg.h

383

#define ADT7462_PCR3_P25_33V(val) ((val & ADT7462_PIN25_CONF) == 0x00)

sys/dev/i2c/adt7462reg.h

384

#define ADT7462_PCR3_P25_12V(val) ((val & ADT7462_PIN25_CONF) == 0x10)

sys/dev/i2c/adt7462reg.h

385

#define ADT7462_PCR3_P26_VBAT(val) ((val & ADT7462_PIN26_CONF) == 0x00)

sys/dev/i2c/adt7462reg.h

386

#define ADT7462_PCR3_P26_12V(val) ((val & ADT7462_PIN26_CONF) == 0x04)

sys/dev/i2c/adt7462reg.h

394

#define ADT7462_PCR4_P29_15V(val) ((val & ADT7462_PIN29_CONF) == 0x10)

sys/dev/i2c/adt7462reg.h

395

#define ADT7462_PCR4_P28_15V(val) ((val & ADT7462_PIN28_CONF) == 0x10)

sys/dev/i2c/anxedp.c

103

uint8_t val;

sys/dev/i2c/anxedp.c

105

if (iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr + off, reg, &val, 0) != 0)

sys/dev/i2c/anxedp.c

106

val = 0xff;

sys/dev/i2c/anxedp.c

108

return val;

sys/dev/i2c/anxedp.c

112

anxedp_write(struct anxedp_softc *sc, u_int off, uint8_t reg, uint8_t val)

sys/dev/i2c/anxedp.c

114

(void)iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr + off, reg, val, 0);

sys/dev/i2c/anxedp.c

142

uint8_t val;

sys/dev/i2c/anxedp.c

146

val = anxedp_read(sc, 0, ANX_DP_AUX_CH_CTL_2);

sys/dev/i2c/anxedp.c

147

if ((val & ANX_AUX_EN) == 0)

sys/dev/i2c/anxedp.c

157

val = anxedp_read(sc, 1, ANX_DP_INT_STA);

sys/dev/i2c/anxedp.c

158

if ((val & ANX_RPLY_RECEIV) != 0) {

sys/dev/i2c/anxedp.c

159

anxedp_write(sc, 1, ANX_DP_INT_STA, val);

sys/dev/i2c/as3722.c

342

as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val, int flags)

sys/dev/i2c/as3722.c

345

&reg, 1, val, 1, flags);

sys/dev/i2c/as3722.c

349

as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val, int flags)

sys/dev/i2c/as3722.c

351

uint8_t buf[2] = { reg, val };

sys/dev/i2c/au8522.c

325

au8522_write_1(au, modtab[n].reg, modtab[n].val);

sys/dev/i2c/au8522.c

344

uint8_t val;

sys/dev/i2c/au8522.c

348

if (au8522_read_1(au, 0x4088, &val))

sys/dev/i2c/au8522.c

350

if ((val & 0x03) == 0x03) {

sys/dev/i2c/au8522.c

358

if (au8522_read_1(au, 0x4541, &val))

sys/dev/i2c/au8522.c

360

if (val & 0x80) {

sys/dev/i2c/au8522.c

363

if (val & 0x20) {

sys/dev/i2c/au8522.c

385

uint8_t val;

sys/dev/i2c/au8522.c

409

if (au8522_read_1(au, snrreg, &val))

sys/dev/i2c/au8522.c

413

if (val < snrtab[n].val)

sys/dev/i2c/au8522.c

66

au8522_read_1(struct au8522 *au, uint16_t reg, uint8_t *val)

sys/dev/i2c/au8522.c

78

NULL, 0, val, sizeof(*val), 0);

sys/dev/i2c/au8522.c

82

au8522_write_1(struct au8522 *au, uint16_t reg, uint8_t val)

sys/dev/i2c/au8522.c

88

data[2] = val;

sys/dev/i2c/au8522mod.h

34

uint8_t val;

sys/dev/i2c/au8522mod.h

38

uint16_t val;

sys/dev/i2c/axp20x.c

560

axp20x_read(struct axp20x_softc *sc, uint8_t reg, uint8_t *val, size_t len)

sys/dev/i2c/axp20x.c

567

&reg, 1, val, len, 0);

sys/dev/i2c/axp20x.c

576

axp20x_write(struct axp20x_softc *sc, uint8_t reg, uint8_t *val, size_t len)

sys/dev/i2c/axp20x.c

583

&reg, 1, val, len, 0);

sys/dev/i2c/axp22x.c

132

axp22x_read(struct axp22x_softc *sc, uint8_t reg, uint8_t *val, size_t len)

sys/dev/i2c/axp22x.c

139

reg + i, &val[i], 0);

sys/dev/i2c/axp809.c

148

axp809_read(struct axp809_softc *sc, uint8_t reg, uint8_t *val)

sys/dev/i2c/axp809.c

150

return iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/axp809.c

154

axp809_write(struct axp809_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/axp809.c

156

return iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/axp809.c

208

uint8_t val;

sys/dev/i2c/axp809.c

233

if ((error = axp809_read(sc, c->c_voltage_reg, &val)) != 0)

sys/dev/i2c/axp809.c

235

val &= ~c->c_voltage_mask;

sys/dev/i2c/axp809.c

236

val |= __SHIFTIN(reg_val, c->c_voltage_mask);

sys/dev/i2c/axp809.c

237

error = axp809_write(sc, c->c_voltage_reg, val);

sys/dev/i2c/axp809.c

253

uint8_t val;

sys/dev/i2c/axp809.c

259

error = axp809_read(sc, c->c_voltage_reg, &val);

sys/dev/i2c/axp809.c

264

reg_val = __SHIFTOUT(val, c->c_voltage_mask);

sys/dev/i2c/axp809.c

279

uint8_t val;

sys/dev/i2c/axp809.c

286

error = axp809_read(sc, c->c_enable_reg, &val);

sys/dev/i2c/axp809.c

291

*penabled = !!(val & c->c_enable_mask);

sys/dev/i2c/axp809.c

299

uint8_t val;

sys/dev/i2c/axp809.c

306

if ((error = axp809_read(sc, c->c_enable_reg, &val)) != 0)

sys/dev/i2c/axp809.c

308

val |= c->c_enable_mask;

sys/dev/i2c/axp809.c

309

error = axp809_write(sc, c->c_enable_reg, val);

sys/dev/i2c/axp809.c

324

uint8_t val;

sys/dev/i2c/axp809.c

331

if ((error = axp809_read(sc, c->c_enable_reg, &val)) != 0)

sys/dev/i2c/axp809.c

333

val &= ~c->c_enable_mask;

sys/dev/i2c/axp809.c

334

error = axp809_write(sc, c->c_enable_reg, val);

sys/dev/i2c/axppmic.c

1048

uint8_t val;

sys/dev/i2c/axppmic.c

1051

if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_WARN_REG, &val, 0) == 0) {

sys/dev/i2c/axppmic.c

1052

sc->sc_warn_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV1) + 5;

sys/dev/i2c/axppmic.c

1053

sc->sc_shut_thres = __SHIFTOUT(val, AXP_BATT_CAP_WARN_LV2);

sys/dev/i2c/axppmic.c

1178

uint8_t irq_mask, val;

sys/dev/i2c/axppmic.c

1206

error = axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_CHIP_ID_REG, &val, 0);

sys/dev/i2c/axppmic.c

1212

aprint_debug_dev(self, "chipid %#x\n", val);

sys/dev/i2c/axppmic.c

1319

uint8_t val;

sys/dev/i2c/axppmic.c

1326

if ((error = axppmic_read(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, &val, flags)) == 0) {

sys/dev/i2c/axppmic.c

1327

val &= ~c->c_enable_mask;

sys/dev/i2c/axppmic.c

1329

val |= c->c_enable_val;

sys/dev/i2c/axppmic.c

1331

val |= c->c_disable_val;

sys/dev/i2c/axppmic.c

1332

error = axppmic_write(sc->sc_i2c, sc->sc_addr, c->c_enable_reg, val, flags);

sys/dev/i2c/axppmic.c

582

axppmic_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t *val, int flags)

sys/dev/i2c/axppmic.c

584

return iic_smbus_read_byte(tag, addr, reg, val, flags);

sys/dev/i2c/axppmic.c

588

axppmic_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t reg, uint8_t val, int flags)

sys/dev/i2c/axppmic.c

590

return iic_smbus_write_byte(tag, addr, reg, val, flags);

sys/dev/i2c/axppmic.c

598

uint8_t val;

sys/dev/i2c/axppmic.c

627

if ((error = axppmic_read(tag, addr, c->c_voltage_reg, &val, 0)) == 0) {

sys/dev/i2c/axppmic.c

628

val &= ~c->c_voltage_mask;

sys/dev/i2c/axppmic.c

629

val |= __SHIFTIN(reg_val, c->c_voltage_mask);

sys/dev/i2c/axppmic.c

630

error = axppmic_write(tag, addr, c->c_voltage_reg, val, 0);

sys/dev/i2c/axppmic.c

641

uint8_t val;

sys/dev/i2c/axppmic.c

647

error = axppmic_read(tag, addr, c->c_voltage_reg, &val, 0);

sys/dev/i2c/axppmic.c

652

reg_val = __SHIFTOUT(val, c->c_voltage_mask);

sys/dev/i2c/axppmic.c

693

uint8_t val;

sys/dev/i2c/axppmic.c

701

&val, 0);

sys/dev/i2c/axppmic.c

703

val &= ~AXP_GPIO_CTRL_FUNC_MASK;

sys/dev/i2c/axppmic.c

704

val |= func;

sys/dev/i2c/axppmic.c

706

AXP_GPIO_CTRL_REG(pin), val, 0);

sys/dev/i2c/axppmic.c

765

int error, val;

sys/dev/i2c/axppmic.c

779

val = 0;

sys/dev/i2c/axppmic.c

781

val = __SHIFTOUT(data, data_mask);

sys/dev/i2c/axppmic.c

784

val = !val;

sys/dev/i2c/axppmic.c

787

return val;

sys/dev/i2c/axppmic.c

791

axppmic_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/dev/i2c/axppmic.c

798

val = !val;

sys/dev/i2c/axppmic.c

802

val == 0 ? AXP_GPIO_CTRL_FUNC_LOW : AXP_GPIO_CTRL_FUNC_HIGH);

sys/dev/i2c/axppmic.c

829

uint8_t val, lo, hi;

sys/dev/i2c/axppmic.c

839

if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, 0) == 0) {

sys/dev/i2c/axppmic.c

841

e->value_cur = !!(val & AXP_POWER_SOURCE_ACIN_PRESENT);

sys/dev/i2c/axppmic.c

845

if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, 0) == 0) {

sys/dev/i2c/axppmic.c

847

e->value_cur = !!(val & AXP_POWER_SOURCE_VBUS_PRESENT);

sys/dev/i2c/axppmic.c

851

if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, 0) == 0) {

sys/dev/i2c/axppmic.c

852

if (val & AXP_POWER_MODE_BATT_VALID) {

sys/dev/i2c/axppmic.c

854

e->value_cur = !!(val & AXP_POWER_MODE_BATT_PRESENT);

sys/dev/i2c/axppmic.c

859

if (axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_MODE_REG, &val, 0) == 0) {

sys/dev/i2c/axppmic.c

861

e->value_cur = !!(val & AXP_POWER_MODE_BATT_CHARGING);

sys/dev/i2c/axppmic.c

866

axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, 0) == 0 &&

sys/dev/i2c/axppmic.c

867

(val & AXP_BATT_CAP_VALID) != 0) {

sys/dev/i2c/axppmic.c

868

const u_int batt_val = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT);

sys/dev/i2c/axppmic.c

883

axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_BATT_CAP_REG, &val, 0) == 0 &&

sys/dev/i2c/axppmic.c

884

(val & AXP_BATT_CAP_VALID) != 0) {

sys/dev/i2c/axppmic.c

886

e->value_cur = __SHIFTOUT(val, AXP_BATT_CAP_PERCENT);

sys/dev/i2c/axppmic.c

899

axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, 0) == 0 &&

sys/dev/i2c/axppmic.c

900

(val & AXP_POWER_SOURCE_CHARGE_DIRECTION) != 0 &&

sys/dev/i2c/axppmic.c

909

axppmic_read(sc->sc_i2c, sc->sc_addr, AXP_POWER_SOURCE_REG, &val, 0) == 0 &&

sys/dev/i2c/axppmic.c

910

(val & AXP_POWER_SOURCE_CHARGE_DIRECTION) == 0 &&

sys/dev/i2c/cwfg.c

123

cwfg_read(struct cwfg_softc *sc, uint8_t reg, uint8_t *val)

sys/dev/i2c/cwfg.c

125

return iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/cwfg.c

129

cwfg_write(struct cwfg_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/cwfg.c

131

return iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/cwfg.c

139

uint8_t val;

sys/dev/i2c/cwfg.c

152

if ((error = cwfg_read(sc, VCELL_HI_REG, &val)) != 0)

sys/dev/i2c/cwfg.c

154

tmp = __SHIFTOUT(val, VCELL_HI) << 8;

sys/dev/i2c/cwfg.c

155

if ((error = cwfg_read(sc, VCELL_LO_REG, &val)) != 0)

sys/dev/i2c/cwfg.c

157

tmp |= __SHIFTOUT(val, VCELL_LO);

sys/dev/i2c/cwfg.c

167

if ((error = cwfg_read(sc, SOC_HI_REG, &val)) != 0)

sys/dev/i2c/cwfg.c

170

if (val != 0xff) {

sys/dev/i2c/cwfg.c

172

e->value_cur = val; /* batt % */

sys/dev/i2c/cwfg.c

177

if ((error = cwfg_read(sc, RTT_ALRT_HI_REG, &val)) != 0)

sys/dev/i2c/cwfg.c

179

rtt = __SHIFTOUT(val, RTT_HI) << 8;

sys/dev/i2c/cwfg.c

180

if ((error = cwfg_read(sc, RTT_ALRT_LO_REG, &val)) != 0)

sys/dev/i2c/cwfg.c

182

rtt |= __SHIFTOUT(val, RTT_LO);

sys/dev/i2c/cwfg.c

247

uint8_t config, mode, val;

sys/dev/i2c/cwfg.c

275

if ((error = cwfg_read(sc, BATINFO_REG(n), &val)) != 0)

sys/dev/i2c/cwfg.c

277

if (sc->sc_batinfo[n] != val) {

sys/dev/i2c/cwfg.c

290

val = sc->sc_batinfo[n];

sys/dev/i2c/cwfg.c

291

if ((error = cwfg_write(sc, BATINFO_REG(n), val)) != 0)

sys/dev/i2c/cwfg.c

361

u_int val;

sys/dev/i2c/cwfg.c

386

"cellwise,monitor-interval-ms", &val) == 0) {

sys/dev/i2c/cwfg.c

387

sc->sc_monitor_interval = howmany(val, 1000);

sys/dev/i2c/cwfg.c

389

"cellwise,monitor-interval", &val) == 0) {

sys/dev/i2c/cwfg.c

391

sc->sc_monitor_interval = val;

sys/dev/i2c/cwfg.c

398

"charge-full-design-microamp-hours", &val) == 0) {

sys/dev/i2c/cwfg.c

399

sc->sc_design_capacity = howmany(val, 1000);

sys/dev/i2c/cwfg.c

401

"cellwise,design-capacity", &val) == 0) {

sys/dev/i2c/cwfg.c

403

sc->sc_design_capacity = val;

sys/dev/i2c/dbcool.c

1051

uint8_t ext = 0, v1, v2, v3, v4, val;

sys/dev/i2c/dbcool.c

1061

val = sc->sc_dc.dc_readreg(&sc->sc_dc, reg);

sys/dev/i2c/dbcool.c

1069

val = sc->sc_dc.dc_readreg(&sc->sc_dc, reg);

sys/dev/i2c/dbcool.c

1072

val = sc->sc_dc.dc_readreg(&sc->sc_dc, reg);

sys/dev/i2c/dbcool.c

1079

val = v1;

sys/dev/i2c/dbcool.c

1082

val = v2;

sys/dev/i2c/dbcool.c

1095

val = v1;

sys/dev/i2c/dbcool.c

1098

val = v2;

sys/dev/i2c/dbcool.c

1102

val = v3;

sys/dev/i2c/dbcool.c

1106

val = v4;

sys/dev/i2c/dbcool.c

1110

val = nom = 0;

sys/dev/i2c/dbcool.c

1120

ret = val;

sys/dev/i2c/dbcool.c

898

dbcool_writereg(struct dbcool_chipset *dc, uint8_t reg, uint8_t val)

sys/dev/i2c/dbcool.c

903

(void)iic_smbus_write_byte(dc->dc_tag, dc->dc_addr, reg, val, 0);

sys/dev/i2c/dbcool.c

930

uint8_t t1, t2, t3, val, ext = 0;

sys/dev/i2c/dbcool.c

938

val = sc->sc_dc.dc_readreg(&sc->sc_dc, reg);

sys/dev/i2c/dbcool.c

955

val = sc->sc_dc.dc_readreg(&sc->sc_dc, reg);

sys/dev/i2c/dbcool.c

966

val = t1;

sys/dev/i2c/dbcool.c

970

val = t3;

sys/dev/i2c/dbcool.c

974

val = t2;

sys/dev/i2c/dbcool.c

978

val = 0;

sys/dev/i2c/dbcool.c

984

val = sc->sc_dc.dc_readreg(&sc->sc_dc, reg);

sys/dev/i2c/dbcool.c

987

if ((sc->sc_temp_offset == 0 && val == 0x80) ||

sys/dev/i2c/dbcool.c

988

(sc->sc_temp_offset != 0 && val == 0))

sys/dev/i2c/dbcool.c

993

temp = val;

sys/dev/i2c/dbcool.c

996

temp = (int8_t)val;

sys/dev/i2c/em3027.c

375

em3027rtc_write_byte(struct em3027rtc_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/em3027.c

378

return em3027rtc_write(sc, reg, &val, 1);

sys/dev/i2c/es8316ac.c

138

uint8_t val;

sys/dev/i2c/es8316ac.c

140

if (iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, &val, 0) != 0)

sys/dev/i2c/es8316ac.c

141

val = 0xff;

sys/dev/i2c/es8316ac.c

143

return val;

sys/dev/i2c/es8316ac.c

147

escodec_write(struct escodec_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/es8316ac.c

149

(void)iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/es8316ac.c

343

uint8_t val;

sys/dev/i2c/es8316ac.c

357

val = escodec_read(sc, mix->reg[ch]);

sys/dev/i2c/es8316ac.c

365

val &= ~mix->mask[ch];

sys/dev/i2c/es8316ac.c

366

val |= __SHIFTIN(nvol, mix->mask[ch]);

sys/dev/i2c/es8316ac.c

367

escodec_write(sc, mix->reg[ch], val);

sys/dev/i2c/es8316ac.c

376

val = escodec_read(sc, mix->reg[0]);

sys/dev/i2c/es8316ac.c

378

val |= mix->mask[0];

sys/dev/i2c/es8316ac.c

380

val &= ~mix->mask[0];

sys/dev/i2c/es8316ac.c

381

escodec_write(sc, mix->reg[0], val);

sys/dev/i2c/es8316ac.c

396

uint8_t val;

sys/dev/i2c/es8316ac.c

411

val = escodec_read(sc, mix->reg[ch]);

sys/dev/i2c/es8316ac.c

413

nvol = __SHIFTOUT(val, mix->mask[ch]);

sys/dev/i2c/es8316ac.c

424

val = escodec_read(sc, mix->reg[0]);

sys/dev/i2c/es8316ac.c

425

mc->un.ord = (val & mix->mask[0]) != 0;

sys/dev/i2c/es8316ac.c

506

uint8_t sd_clk, sd_fmt, val;

sys/dev/i2c/es8316ac.c

539

val = escodec_read(sc, ESCODEC_SD_CLK_REG);

sys/dev/i2c/es8316ac.c

540

val &= ~(SD_CLK_MSC|SD_CLK_BCLK_INV);

sys/dev/i2c/es8316ac.c

541

val |= sd_clk;

sys/dev/i2c/es8316ac.c

542

escodec_write(sc, ESCODEC_SD_CLK_REG, val);

sys/dev/i2c/es8316ac.c

544

val = escodec_read(sc, ESCODEC_SD_ADC_REG);

sys/dev/i2c/es8316ac.c

545

val &= ~SD_FMT_MASK;

sys/dev/i2c/es8316ac.c

546

val |= __SHIFTIN(SD_FMT_I2S, SD_FMT_MASK);

sys/dev/i2c/es8316ac.c

547

val &= ~SD_FMT_LRP;

sys/dev/i2c/es8316ac.c

548

val |= sd_fmt;

sys/dev/i2c/es8316ac.c

549

escodec_write(sc, ESCODEC_SD_ADC_REG, val);

sys/dev/i2c/es8316ac.c

551

val = escodec_read(sc, ESCODEC_SD_DAC_REG);

sys/dev/i2c/es8316ac.c

552

val &= ~SD_FMT_MASK;

sys/dev/i2c/es8316ac.c

553

val |= __SHIFTIN(SD_FMT_I2S, SD_FMT_MASK);

sys/dev/i2c/es8316ac.c

554

val &= ~SD_FMT_LRP;

sys/dev/i2c/es8316ac.c

555

val |= sd_fmt;

sys/dev/i2c/es8316ac.c

556

escodec_write(sc, ESCODEC_SD_DAC_REG, val);

sys/dev/i2c/es8316ac.c

558

val = escodec_read(sc, ESCODEC_CLKMAN1_REG);

sys/dev/i2c/es8316ac.c

559

val |= CLKMAN1_MCLK_ON;

sys/dev/i2c/es8316ac.c

560

val |= CLKMAN1_BCLK_ON;

sys/dev/i2c/es8316ac.c

561

val |= CLKMAN1_CLK_CP_ON;

sys/dev/i2c/es8316ac.c

562

val |= CLKMAN1_CLK_DAC_ON;

sys/dev/i2c/es8316ac.c

563

val |= CLKMAN1_ANACLK_DAC_ON;

sys/dev/i2c/es8316ac.c

564

escodec_write(sc, ESCODEC_CLKMAN1_REG, val);

sys/dev/i2c/es8316ac.c

602

uint8_t val;

sys/dev/i2c/es8316ac.c

614

val = escodec_read(sc, ESCODEC_SD_ADC_REG);

sys/dev/i2c/es8316ac.c

615

val &= ~SD_FMT_WL;

sys/dev/i2c/es8316ac.c

616

val |= __SHIFTIN(SD_FMT_WL_16, SD_FMT_WL);

sys/dev/i2c/es8316ac.c

617

escodec_write(sc, ESCODEC_SD_ADC_REG, val);

sys/dev/i2c/es8316ac.c

619

val = escodec_read(sc, ESCODEC_SD_DAC_REG);

sys/dev/i2c/es8316ac.c

620

val &= ~SD_FMT_WL;

sys/dev/i2c/es8316ac.c

621

val |= __SHIFTIN(SD_FMT_WL_16, SD_FMT_WL);

sys/dev/i2c/es8316ac.c

622

escodec_write(sc, ESCODEC_SD_DAC_REG, val);

sys/dev/i2c/es8316ac.c

628

val = HPMIXRT_LD2LHPMIX | HPMIXRT_RD2RHPMIX;

sys/dev/i2c/es8316ac.c

629

escodec_write(sc, ESCODEC_HPMIXRT_REG, val);

sys/dev/i2c/es8316ac.c

638

val = escodec_read(sc, ESCODEC_HPPWR_REG);

sys/dev/i2c/es8316ac.c

639

val &= ~HPPWR_PDN_CPHP;

sys/dev/i2c/es8316ac.c

640

escodec_write(sc, ESCODEC_HPPWR_REG, val);

sys/dev/i2c/es8316ac.c

643

val = escodec_read(sc, ESCODEC_CPPWR_REG);

sys/dev/i2c/es8316ac.c

644

val &= ~CPPWR_PDN_CP;

sys/dev/i2c/es8316ac.c

645

escodec_write(sc, ESCODEC_CPPWR_REG, val);

sys/dev/i2c/es8316ac.c

651

val = escodec_read(sc, ESCODEC_HPVOL_REG);

sys/dev/i2c/es8316ac.c

652

val &= ~HPVOL_PDN_LICAL;

sys/dev/i2c/es8316ac.c

653

val &= ~HPVOL_PDN_RICAL;

sys/dev/i2c/es8316ac.c

654

escodec_write(sc, ESCODEC_HPVOL_REG, val);

sys/dev/i2c/es8316ac.c

667

val = HPOUTEN_EN_HPL | HPOUTEN_EN_HPR |

sys/dev/i2c/es8316ac.c

669

escodec_write(sc, ESCODEC_HPOUTEN_REG, val);

sys/dev/i2c/fan53555.c

101

uint8_t val = 0;

sys/dev/i2c/fan53555.c

105

&reg, 1, &val, 1, flags);

sys/dev/i2c/fan53555.c

109

return val;

sys/dev/i2c/fan53555.c

113

fan53555_write(struct fan53555_softc *sc, uint8_t reg, uint8_t val, int flags)

sys/dev/i2c/fan53555.c

119

buf[1] = val;

sys/dev/i2c/fan53555.c

128

#define I2C_WRITE(sc, reg, val) fan53555_write((sc), (reg), (val), 0)

sys/dev/i2c/fan53555.c

147

uint8_t val;

sys/dev/i2c/fan53555.c

150

val = I2C_READ(sc, sc->sc_runtime_reg);

sys/dev/i2c/fan53555.c

152

val |= VSEL_BUCK_EN;

sys/dev/i2c/fan53555.c

154

val &= ~VSEL_BUCK_EN;

sys/dev/i2c/fan53555.c

155

I2C_WRITE(sc, sc->sc_runtime_reg, val);

sys/dev/i2c/fan53555.c

168

uint8_t val, oval;

sys/dev/i2c/fan53555.c

178

val = oval & ~VSEL_NSEL;

sys/dev/i2c/fan53555.c

179

val |= __SHIFTIN((min_uvol - sc->sc_base) / sc->sc_step, VSEL_NSEL);

sys/dev/i2c/fan53555.c

180

I2C_WRITE(sc, sc->sc_runtime_reg, val);

sys/dev/i2c/fan53555.c

195

uint8_t val;

sys/dev/i2c/fan53555.c

198

val = I2C_READ(sc, sc->sc_runtime_reg);

sys/dev/i2c/fan53555.c

201

*puvol = __SHIFTOUT(val, VSEL_NSEL) * sc->sc_step + sc->sc_base;

sys/dev/i2c/fusbtc.c

684

fusbtc_set_reg(struct fusbtc_softc *sc, uint8_t off, uint8_t val)

sys/dev/i2c/fusbtc.c

688

reg |= val;

sys/dev/i2c/fusbtc.c

693

fusbtc_clr_reg(struct fusbtc_softc *sc, uint8_t off, uint8_t val)

sys/dev/i2c/fusbtc.c

697

reg &= ~val;

sys/dev/i2c/fusbtc.c

704

uint8_t val = 0;

sys/dev/i2c/fusbtc.c

708

sc->sc_addr, &reg, sizeof(reg), &val, sizeof(val), 0)) {

sys/dev/i2c/fusbtc.c

714

return val;

sys/dev/i2c/fusbtc.c

718

fusbtc_write_reg(struct fusbtc_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/fusbtc.c

722

sc->sc_addr, &reg, sizeof(reg), &val, sizeof(val), 0)) {

sys/dev/i2c/gttwsi_core.c

101

printf("I2C:R:[%" PRIu32 "]%02" PRIxBUSSIZE ":%02" PRIx32 "\n", reg, sc->sc_regmap[reg], val);

sys/dev/i2c/gttwsi_core.c

105

return val;

sys/dev/i2c/gttwsi_core.c

109

gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val)

sys/dev/i2c/gttwsi_core.c

112

bus_space_write_4(sc->sc_bust, sc->sc_bush, sc->sc_regmap[reg], val);

sys/dev/i2c/gttwsi_core.c

114

printf("I2C:W:[%" PRIu32 "]%02" PRIxBUSSIZE ":%02" PRIx32 "\n", reg, sc->sc_regmap[reg], val);

sys/dev/i2c/gttwsi_core.c

166

uint32_t val;

sys/dev/i2c/gttwsi_core.c

169

val = gttwsi_read_4(sc, TWSI_CONTROL);

sys/dev/i2c/gttwsi_core.c

170

if (val & CONTROL_IFLG) {

sys/dev/i2c/gttwsi_core.c

171

gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN);

sys/dev/i2c/gttwsi_core.c

294

gttwsi_write_byte(void *v, uint8_t val, int flags)

sys/dev/i2c/gttwsi_core.c

299

gttwsi_write_4(sc, TWSI_DATA, val);

sys/dev/i2c/gttwsi_core.c

90

static int gttwsi_write_byte(void *v, uint8_t val, int flags);

sys/dev/i2c/gttwsi_core.c

98

const uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush,

sys/dev/i2c/i2c_bitbang.c

162

uint8_t val = 0;

sys/dev/i2c/i2c_bitbang.c

170

val <<= 1;

sys/dev/i2c/i2c_bitbang.c

182

val |= 1;

sys/dev/i2c/i2c_bitbang.c

210

*valp = val;

sys/dev/i2c/i2c_bitbang.c

215

i2c_bitbang_write_byte(void *v, uint8_t val, int flags, i2c_bitbang_ops_t ops)

sys/dev/i2c/i2c_bitbang.c

226

bit = (val & mask) ? SDA : 0;

sys/dev/i2c/i2c_exec.c

323

uint8_t val, int flags)

sys/dev/i2c/i2c_exec.c

327

&val, 1, flags));

sys/dev/i2c/i2c_exec.c

337

uint16_t val, int flags)

sys/dev/i2c/i2c_exec.c

341

vbuf[0] = val & 0xff;

sys/dev/i2c/i2c_exec.c

342

vbuf[1] = (val >> 8) & 0xff;

sys/dev/i2c/i2c_exec.c

396

iic_smbus_send_byte(i2c_tag_t tag, i2c_addr_t addr, uint8_t val, int flags)

sys/dev/i2c/i2c_exec.c

400

&val, 1, flags));

sys/dev/i2c/ihidev.c

1089

ACPI_INTEGER val;

sys/dev/i2c/ihidev.c

1100

status = acpi_dsm_integer(hdl, i2c_hid_guid, 1, 1, NULL, &val);

sys/dev/i2c/ihidev.c

1108

sc->sc_hid_desc_addr = (u_int)val;

sys/dev/i2c/lm75.c

316

lmtemp_config_write(struct lmtemp_softc *sc, uint8_t val)

sys/dev/i2c/lm75.c

321

cmdbuf[1] = val;

sys/dev/i2c/lm75.c

328

lmtemp_temp_write(struct lmtemp_softc *sc, uint8_t reg, uint32_t val, int degc)

sys/dev/i2c/lm75.c

333

sc->sc_lmtemp_encode(val, &cmdbuf[1], degc);

sys/dev/i2c/lm75.c

361

uint32_t val;

sys/dev/i2c/lm75.c

364

error = lmtemp_temp_read(sc, LM75_REG_TEMP, &val, 0);

sys/dev/i2c/lm75.c

374

sc->sc_sensor.value_cur = val;

sys/dev/i2c/lm75.c

394

uint32_t val;

sys/dev/i2c/lm75.c

400

if (lmtemp_temp_read(sc, LM75_REG_TOS_SET_POINT, &val, 0) == 0) {

sys/dev/i2c/lm75.c

401

limits->sel_critmax = val;

sys/dev/i2c/lm75.c

412

uint32_t val;

sys/dev/i2c/lm75.c

418

if (lmtemp_temp_read(sc, LM77_REG_TCRIT_SET_POINT, &val, 0) == 0) {

sys/dev/i2c/lm75.c

419

limits->sel_critmax = val;

sys/dev/i2c/lm75.c

422

if (lmtemp_temp_read(sc, LM77_REG_THIGH_SET_POINT, &val, 0) == 0) {

sys/dev/i2c/lm75.c

423

limits->sel_warnmax = val;

sys/dev/i2c/lm75.c

426

if (lmtemp_temp_read(sc, LM77_REG_TLOW_SET_POINT, &val, 0) == 0) {

sys/dev/i2c/lm75.c

427

limits->sel_warnmin = val;

sys/dev/i2c/lm75.c

507

uint32_t val;

sys/dev/i2c/lm75.c

518

val = temp / 2;

sys/dev/i2c/lm75.c

520

val = temp * 500000 + 273150000;

sys/dev/i2c/lm75.c

522

return val;

sys/dev/i2c/lm75.c

550

uint32_t val;

sys/dev/i2c/lm75.c

562

val = temp / 2;

sys/dev/i2c/lm75.c

564

val = temp * 500000 + 273150000;

sys/dev/i2c/lm75.c

566

return val;

sys/dev/i2c/lm75.c

569

static void lmtemp_encode_lm75(const uint32_t val, uint8_t *buf, int degc)

sys/dev/i2c/lm75.c

575

temp = val * 2;

sys/dev/i2c/lm75.c

577

temp = (val - 273150000) / 500000;

sys/dev/i2c/lm75.c

582

static void lmtemp_encode_ds75(const uint32_t val, uint8_t *buf, int degc)

sys/dev/i2c/lm75.c

588

temp = val * 16;

sys/dev/i2c/lm75.c

590

temp = (val - 273150000) / 62500;

sys/dev/i2c/lm75.c

595

static void lmtemp_encode_lm77(const uint32_t val, uint8_t *buf, int degc)

sys/dev/i2c/lm75.c

601

temp = val * 2;

sys/dev/i2c/lm75.c

603

temp = (val - 273150000) / 500000;

sys/dev/i2c/lm87.c

151

u_int8_t cmd, val;

sys/dev/i2c/lm87.c

168

&cmd, 1, &val, 1, 0);

sys/dev/i2c/lm87.c

175

if (lmenv_ids[i].id == val)

sys/dev/i2c/lm95221.c

103

uint8_t reg, val;

sys/dev/i2c/lm95221.c

124

sc->sc_address, &reg, 1, &val, 1, 0)) {

sys/dev/i2c/lm95221.c

129

if (val & LM95221_STAT_NO_REMOTE1)

sys/dev/i2c/lm95221.c

131

if (val & LM95221_STAT_NO_REMOTE2)

sys/dev/i2c/lm95221.c

136

sc->sc_address, &reg, 1, &val, 1, 0)) {

sys/dev/i2c/lm95221.c

142

if (val & LM95221_CONF_REMOTE1)

sys/dev/i2c/lm95221.c

144

if (val & LM95221_CONF_REMOTE2)

sys/dev/i2c/lm95221.c

147

if (val & LM95221_CONF_STANDBY) {

sys/dev/i2c/lm95221.c

148

val &= ~(LM95221_CONF_STANDBY);

sys/dev/i2c/lm95221.c

150

sc->sc_address, &reg, 1, &val, 1, 0)) {

sys/dev/i2c/lm95221.c

229

uint32_t val;

sys/dev/i2c/lm95221.c

241

if (lm95221ts_read_temp(sc, reg_m, reg_l, flags, &val) == 0) {

sys/dev/i2c/lm95221.c

242

edata->value_cur = val;

sys/dev/i2c/lm_i2c.c

136

lm_i2c_writereg(struct lm_softc *lmsc, int reg, uint8_t val)

sys/dev/i2c/lm_i2c.c

145

data = val;

sys/dev/i2c/max77620.c

101

#define I2C_WRITE(sc, reg, val) max77620_write((sc), (reg), (val), 0)

sys/dev/i2c/max77620.c

202

int val;

sys/dev/i2c/max77620.c

213

val = __SHIFTOUT(gpio, MAX_GPIO_INPUT_VAL);

sys/dev/i2c/max77620.c

215

val = !val;

sys/dev/i2c/max77620.c

220

(int)__SHIFTOUT(gpio, MAX_GPIO_INPUT_VAL), val);

sys/dev/i2c/max77620.c

223

return val;

sys/dev/i2c/max77620.c

227

max77620_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/dev/i2c/max77620.c

234

val = !val;

sys/dev/i2c/max77620.c

239

gpio |= __SHIFTIN(val, MAX_GPIO_OUTPUT_VAL);

sys/dev/i2c/max77620.c

78

uint8_t val = 0;

sys/dev/i2c/max77620.c

82

&reg, 1, &val, 1, flags);

sys/dev/i2c/max77620.c

86

return val;

sys/dev/i2c/max77620.c

90

max77620_write(struct max77620_softc *sc, uint8_t reg, uint8_t val, int flags)

sys/dev/i2c/max77620.c

95

&reg, 1, &val, 1, flags);

sys/dev/i2c/mcp23xxxgpio_i2c.c

119

uint8_t reg, uint8_t val)

sys/dev/i2c/mcp23xxxgpio_i2c.c

127

&reg, 1, &val, 1, 0);

sys/dev/i2c/mcp980x.c

184

mcp980x_reg_write_2(struct mcp980x_softc *sc, uint8_t reg, uint16_t val)

sys/dev/i2c/mcp980x.c

188

beval = htobe16(val);

sys/dev/i2c/mcp980x.c

205

mcp980x_reg_write_1(struct mcp980x_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/mcp980x.c

213

1, &val, 1, 0)) {

sys/dev/i2c/mcp980x.c

228

mcp980x_templimit_set(struct mcp980x_softc *sc, int8_t val)

sys/dev/i2c/mcp980x.c

230

mcp980x_s8b_set(sc, MCP980X_TEMP_LIMIT, val);

sys/dev/i2c/mcp980x.c

240

mcp980x_hysteresis_set(struct mcp980x_softc *sc, int8_t val)

sys/dev/i2c/mcp980x.c

242

mcp980x_s8b_set(sc, MCP980X_TEMP_HYSTERESIS, val);

sys/dev/i2c/mcp980x.c

252

mcp980x_s8b_set(struct mcp980x_softc *sc, uint8_t reg, int8_t val)

sys/dev/i2c/mcp980x.c

254

mcp980x_reg_write_2(sc, reg, val << MCP980X_TEMP_HYSTLIMIT_INT_SHIFT);

sys/dev/i2c/mpl115a.c

155

mpl115a_reg_write_1(struct mpl115a_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/mpl115a.c

163

&val, 1, 0)) {

sys/dev/i2c/nxp75a.c

134

sc->sc_address, &reg, 1, &val, 1, 0)) {

sys/dev/i2c/nxp75a.c

141

if (val & NXP75A_CONF_SHUTDOWN) {

sys/dev/i2c/nxp75a.c

142

val &= ~(NXP75A_CONF_SHUTDOWN);

sys/dev/i2c/nxp75a.c

144

sc->sc_address, &reg, 1, &val, 1, 0)) {

sys/dev/i2c/nxp75a.c

200

uint32_t val;

sys/dev/i2c/nxp75a.c

206

if (nxp75a_read_temp(sc, reg, &val) == 0) {

sys/dev/i2c/nxp75a.c

207

edata->value_cur = val;

sys/dev/i2c/nxp75a.c

222

uint32_t val;

sys/dev/i2c/nxp75a.c

230

if (nxp75a_read_temp(sc, reg, &val) == 0) {

sys/dev/i2c/nxp75a.c

231

limits->sel_critmax = val;

sys/dev/i2c/nxp75a.c

291

nxp75a_write_temp(struct nxp75a_softc *sc, uint8_t reg, uint32_t val)

sys/dev/i2c/nxp75a.c

297

temp = (int) (val - 273150000) / 125000 ;

sys/dev/i2c/nxp75a.c

98

uint8_t reg, val;

sys/dev/i2c/pca9685.c

105

pcapwm_write1(struct pcapwm_softc * const sc, uint8_t reg, uint8_t val)

sys/dev/i2c/pca9685.c

110

&val, sizeof(val), 0);

sys/dev/i2c/pcagpio.c

127

printdir(const char* name, uint32_t val, uint32_t mask, char letter)

sys/dev/i2c/pcagpio.c

133

val &= mask;

sys/dev/i2c/pcagpio.c

136

bits[i] = (val & bit) ? 'X' : ' ';

sys/dev/i2c/pcagpio.c

256

pcagpio_writereg(struct pcagpio_softc *sc, int reg, uint32_t val)

sys/dev/i2c/pcagpio.c

264

creg = htole16(val);

sys/dev/i2c/pcagpio.c

270

creg = (uint8_t)val;

sys/dev/i2c/pcagpio.c

274

if (reg == PCAGPIO_OUTPUT) sc->sc_state = val;

sys/dev/i2c/pcagpio.c

381

pcagpio_set(void *cookie, int val)

sys/dev/i2c/pcagpio.c

388

newstate |= val ? l->v_on : l->v_off;

sys/dev/i2c/pcai2cmux.c

179

pcaiicmux_write(struct pcaiicmux_softc * const sc, uint8_t const val,

sys/dev/i2c/pcai2cmux.c

182

if ((int)val == sc->sc_cur_value) {

sys/dev/i2c/pcai2cmux.c

185

sc->sc_cur_value = (int)val;

sys/dev/i2c/pcai2cmux.c

188

iic_smbus_send_byte(sc->sc_iicmux.sc_i2c_parent, sc->sc_addr, val,

sys/dev/i2c/pcai2cmux.c

236

ACPI_INTEGER val;

sys/dev/i2c/pcai2cmux.c

239

"_ADR", &val);

sys/dev/i2c/pcai2cmux.c

246

addr = (bus_addr_t)val;

sys/dev/i2c/pcf8574.c

267

pcf8574_read(struct pcf8574_softc *sc, uint8_t *val)

sys/dev/i2c/pcf8574.c

274

sc->sc_addr, NULL, 0, val, 1, 0);

sys/dev/i2c/pcf8574.c

280

pcf8574_write(struct pcf8574_softc *sc, uint8_t val)

sys/dev/i2c/pcf8574.c

287

&val, 1, NULL, 0, 0);

sys/dev/i2c/pcf8574.c

376

pcf8574_set_led(void *cookie, int val)

sys/dev/i2c/pcf8574.c

383

newstate |= val ? l->v_on : l->v_off;

sys/dev/i2c/r2025.c

204

r2025rtc_reg_write(struct r2025rtc_softc *sc, int reg, uint8_t *val, int len)

sys/dev/i2c/r2025.c

219

buf[0] = val[i];

sys/dev/i2c/r2025.c

236

r2025rtc_reg_read(struct r2025rtc_softc *sc, int reg, uint8_t *val, int len)

sys/dev/i2c/r2025.c

261

*(val + i) = buf[0];

sys/dev/i2c/rkpmic.c

240

uint8_t val = 0;

sys/dev/i2c/rkpmic.c

243

error = iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, &val, flags);

sys/dev/i2c/rkpmic.c

247

return val;

sys/dev/i2c/rkpmic.c

251

rkpmic_write(struct rkpmic_softc *sc, uint8_t reg, uint8_t val, int flags)

sys/dev/i2c/rkpmic.c

255

error = iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, flags);

sys/dev/i2c/rkpmic.c

261

#define I2C_WRITE(sc, reg, val) rkpmic_write((sc), (reg), (val), 0)

sys/dev/i2c/rkpmic.c

269

uint8_t val;

sys/dev/i2c/rkpmic.c

282

val = I2C_READ(sc, RTC_CTRL_REG);

sys/dev/i2c/rkpmic.c

283

I2C_WRITE(sc, RTC_CTRL_REG, val | RTC_CTRL_STOP_RTC);

sys/dev/i2c/rkpmic.c

291

I2C_WRITE(sc, RTC_CTRL_REG, val);

sys/dev/i2c/rkpmic.c

301

uint8_t val;

sys/dev/i2c/rkpmic.c

309

val = I2C_READ(sc, RTC_CTRL_REG);

sys/dev/i2c/rkpmic.c

310

I2C_WRITE(sc, RTC_CTRL_REG, val | RTC_CTRL_GET_TIME | RTC_CTRL_READSEL);

sys/dev/i2c/rkpmic.c

312

I2C_WRITE(sc, RTC_CTRL_REG, val | RTC_CTRL_READSEL);

sys/dev/i2c/rkpmic.c

322

I2C_WRITE(sc, RTC_CTRL_REG, val);

sys/dev/i2c/rkpmic.c

389

uint8_t val;

sys/dev/i2c/rkpmic.c

395

val = I2C_READ(sc, CLK32OUT_REG);

sys/dev/i2c/rkpmic.c

396

val |= CLK32OUT_CLKOUT2_EN;

sys/dev/i2c/rkpmic.c

397

I2C_WRITE(sc, CLK32OUT_REG, val);

sys/dev/i2c/rkpmic.c

407

uint8_t val;

sys/dev/i2c/rkpmic.c

413

val = I2C_READ(sc, CLK32OUT_REG);

sys/dev/i2c/rkpmic.c

414

val &= ~CLK32OUT_CLKOUT2_EN;

sys/dev/i2c/rkpmic.c

415

I2C_WRITE(sc, CLK32OUT_REG, val);

sys/dev/i2c/rkpmic.c

432

uint8_t val;

sys/dev/i2c/rkpmic.c

437

val = I2C_READ(sc, sc->sc_conf->poweroff_reg);

sys/dev/i2c/rkpmic.c

438

val |= sc->sc_conf->poweroff_mask;

sys/dev/i2c/rkpmic.c

439

I2C_WRITE(sc, sc->sc_conf->poweroff_reg, val);

sys/dev/i2c/rkpmic.c

549

uint8_t val;

sys/dev/i2c/rkpmic.c

556

val |= c->enable_mask << 4;

sys/dev/i2c/rkpmic.c

558

val = I2C_READ(sc->sc_pmic, c->enable_reg);

sys/dev/i2c/rkpmic.c

560

val |= c->enable_mask;

sys/dev/i2c/rkpmic.c

562

val &= ~c->enable_mask;

sys/dev/i2c/rkpmic.c

563

I2C_WRITE(sc->sc_pmic, c->enable_reg, val);

sys/dev/i2c/rkpmic.c

574

uint8_t val;

sys/dev/i2c/rkpmic.c

588

val = I2C_READ(sc->sc_pmic, c->vsel_reg);

sys/dev/i2c/rkpmic.c

589

val &= ~c->vsel_mask;

sys/dev/i2c/rkpmic.c

590

val |= __SHIFTIN(vsel, c->vsel_mask);

sys/dev/i2c/rkpmic.c

591

I2C_WRITE(sc->sc_pmic, c->vsel_reg, val);

sys/dev/i2c/rkpmic.c

602

uint8_t val;

sys/dev/i2c/rkpmic.c

608

val = I2C_READ(sc->sc_pmic, c->vsel_reg);

sys/dev/i2c/rkpmic.c

611

*puvol = __SHIFTOUT(val, c->vsel_mask) * c->step + c->base;

sys/dev/i2c/rs5c372.c

126

rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val)

sys/dev/i2c/rs5c372.c

139

cmdbuf[1] = val;

sys/dev/i2c/sc16is7xxi2c.c

176

sc16is7xx_i2c_com_write_1(struct com_regs *regs, u_int reg, uint8_t val)

sys/dev/i2c/sc16is7xxi2c.c

186

reg, regs->cr_channel, &val, 1);

sys/dev/i2c/sdtemp.c

460

uint16_t val;

sys/dev/i2c/sdtemp.c

471

val = __UK2C(limits->sel_warnmin);

sys/dev/i2c/sdtemp.c

473

(val << 4) & SDTEMP_TEMP_MASK);

sys/dev/i2c/sdtemp.c

476

val = __UK2C(limits->sel_warnmax);

sys/dev/i2c/sdtemp.c

478

(val << 4) & SDTEMP_TEMP_MASK);

sys/dev/i2c/sdtemp.c

481

val = __UK2C(limits->sel_critmax);

sys/dev/i2c/sdtemp.c

483

(val << 4) & SDTEMP_TEMP_MASK);

sys/dev/i2c/sdtemp.c

515

sdtemp_write_8(struct sdtemp_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/sdtemp.c

518

sc->sc_address, &reg, 1, &val, sizeof(val), 0);

sys/dev/i2c/sdtemp.c

539

sdtemp_write_16(struct sdtemp_softc *sc, uint8_t reg, uint16_t val)

sys/dev/i2c/sdtemp.c

543

temp = htobe16(val);

sys/dev/i2c/sdtemp.c

551

uint32_t val;

sys/dev/i2c/sdtemp.c

569

val = (stemp * 62500) + 273150000;

sys/dev/i2c/sdtemp.c

571

return val;

sys/dev/i2c/sdtemp.c

578

uint16_t val;

sys/dev/i2c/sdtemp.c

587

error = sdtemp_read_16(sc, SDTEMP_REG_AMBIENT_TEMP, &val);

sys/dev/i2c/sdtemp.c

595

edata->value_cur = sdtemp_decode_temp(sc, val);

sys/dev/i2c/sdtemp.c

600

else if ((val & SDTEMP_ABOVE_CRIT) &&

sys/dev/i2c/sdtemp.c

603

else if ((val & SDTEMP_ABOVE_UPPER) &&

sys/dev/i2c/sdtemp.c

606

else if ((val & SDTEMP_BELOW_LOWER) &&

sys/dev/i2c/sgsmix.c

146

sgsmix_writereg(struct sgsmix_softc *sc, int reg, uint8_t val)

sys/dev/i2c/sgsmix.c

148

uint8_t out[2] = {reg, val};

sys/dev/i2c/sgsmix.c

153

if (sc->sc_regs[reg] == val)

sys/dev/i2c/sgsmix.c

158

sc->sc_regs[reg] = val;

sys/dev/i2c/smscmon.c

266

smscmon_writereg(struct smscmon_sc *sc, int reg, int val)

sys/dev/i2c/smscmon.c

273

data = val;

sys/dev/i2c/spdmem_i2c.c

265

spdmem_i2c_read(struct spdmem_softc *softc, uint16_t addr, uint8_t *val)

sys/dev/i2c/spdmem_i2c.c

282

&reg, 1, val, 1, 0);

sys/dev/i2c/spdmem_i2c.c

287

&reg, 1, val, 1, 0);

sys/dev/i2c/sy8106a.c

116

uint8_t val;

sys/dev/i2c/sy8106a.c

119

val = I2C_READ(sc, VOUT_COM);

sys/dev/i2c/sy8106a.c

121

val &= ~COM_DISABLE;

sys/dev/i2c/sy8106a.c

123

val |= COM_DISABLE;

sys/dev/i2c/sy8106a.c

124

I2C_WRITE(sc, VOUT_COM, val);

sys/dev/i2c/sy8106a.c

137

uint8_t val, oval;

sys/dev/i2c/sy8106a.c

148

val = SEL_GO | ((min_uvol - SEL_VOLTAGE_BASE) / SEL_VOLTAGE_STEP);

sys/dev/i2c/sy8106a.c

149

I2C_WRITE(sc, VOUT1_SEL, val);

sys/dev/i2c/sy8106a.c

164

uint8_t val;

sys/dev/i2c/sy8106a.c

167

val = I2C_READ(sc, VOUT1_SEL);

sys/dev/i2c/sy8106a.c

170

*puvol = __SHIFTOUT(val, SEL_VOLTAGE) * SEL_VOLTAGE_STEP +

sys/dev/i2c/sy8106a.c

70

uint8_t val = 0;

sys/dev/i2c/sy8106a.c

74

&reg, 1, &val, 1, flags);

sys/dev/i2c/sy8106a.c

78

return val;

sys/dev/i2c/sy8106a.c

82

sy8106a_write(struct sy8106a_softc *sc, uint8_t reg, uint8_t val, int flags)

sys/dev/i2c/sy8106a.c

88

buf[1] = val;

sys/dev/i2c/sy8106a.c

97

#define I2C_WRITE(sc, reg, val) sy8106a_write((sc), (reg), (val), 0)

sys/dev/i2c/tcagpio.c

106

#define I2C_WRITE(sc, reg, val) tcagpio_write((sc), (reg), (val), 0)

sys/dev/i2c/tcagpio.c

189

int val;

sys/dev/i2c/tcagpio.c

195

val = __SHIFTOUT(gpio, PORT_BIT(gpin->pin_num));

sys/dev/i2c/tcagpio.c

197

val = !val;

sys/dev/i2c/tcagpio.c

202

(int)__SHIFTOUT(gpio, PORT_BIT(gpin->pin_num)), val);

sys/dev/i2c/tcagpio.c

205

return val;

sys/dev/i2c/tcagpio.c

209

tcagpio_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/dev/i2c/tcagpio.c

216

val = !val;

sys/dev/i2c/tcagpio.c

221

gpio |= __SHIFTIN(val, PORT_BIT(gpin->pin_num));

sys/dev/i2c/tcagpio.c

79

uint8_t val = 0;

sys/dev/i2c/tcagpio.c

83

&reg, 1, &val, 1, flags);

sys/dev/i2c/tcagpio.c

87

return val;

sys/dev/i2c/tcagpio.c

91

tcagpio_write(struct tcagpio_softc *sc, uint8_t reg, uint8_t val, int flags)

sys/dev/i2c/tcagpio.c

97

buf[1] = val;

sys/dev/i2c/tcakp.c

199

uint8_t val;

sys/dev/i2c/tcakp.c

227

tcakp_read(sc, TCA_INT_STAT, &val);

sys/dev/i2c/tcakp.c

228

tcakp_write(sc, TCA_INT_STAT, val);

sys/dev/i2c/tcakp.c

444

tcakp_read(struct tcakp_softc *sc, uint8_t reg, uint8_t *val)

sys/dev/i2c/tcakp.c

447

&reg, 1, val, 1, 0);

sys/dev/i2c/tcakp.c

451

tcakp_write(struct tcakp_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/tcakp.c

453

uint8_t buf[2] = { reg, val };

sys/dev/i2c/titemp.c

188

titemp_read(struct titemp_softc *sc, uint8_t reg, uint8_t *val)

sys/dev/i2c/titemp.c

190

return iic_smbus_read_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0);

sys/dev/i2c/tps65217pmic.c

1000

val |= regulator->enable_bit;

sys/dev/i2c/tps65217pmic.c

1002

val &= ~regulator->enable_bit;

sys/dev/i2c/tps65217pmic.c

1003

tps65217pmic_reg_write(pmic_sc, TPS65217PMIC_ENABLE, val);

sys/dev/i2c/tps65217pmic.c

497

uint8_t val = 0;

sys/dev/i2c/tps65217pmic.c

502

val |= ((isel - 1) << TPS65217PMIC_WLEDCTRL1_ISEL);

sys/dev/i2c/tps65217pmic.c

511

val |= TPS65217PMIC_WLEDCTRL1_FDIM_100Hz;

sys/dev/i2c/tps65217pmic.c

514

val |= TPS65217PMIC_WLEDCTRL1_FDIM_200Hz;

sys/dev/i2c/tps65217pmic.c

517

val |= TPS65217PMIC_WLEDCTRL1_FDIM_500Hz;

sys/dev/i2c/tps65217pmic.c

520

val |= TPS65217PMIC_WLEDCTRL1_FDIM_1000Hz;

sys/dev/i2c/tps65217pmic.c

541

tps65217pmic_reg_write(sc, TPS65217PMIC_WLEDCTRL1, val);

sys/dev/i2c/tps65217pmic.c

544

val |= TPS65217PMIC_WLEDCTRL1_ISINK_EN;

sys/dev/i2c/tps65217pmic.c

545

tps65217pmic_reg_write(sc, TPS65217PMIC_WLEDCTRL1, val);

sys/dev/i2c/tps65217pmic.c

889

uint8_t val;

sys/dev/i2c/tps65217pmic.c

921

val = tps65217pmic_reg_read(sc, TPS65217PMIC_DEFSLEW);

sys/dev/i2c/tps65217pmic.c

922

val |= TPS65217PMIC_DEFSLEW_GO;

sys/dev/i2c/tps65217pmic.c

923

tps65217pmic_reg_write_l2(sc, TPS65217PMIC_DEFSLEW, val);

sys/dev/i2c/tps65217pmic.c

925

while (val & TPS65217PMIC_DEFSLEW_GO) {

sys/dev/i2c/tps65217pmic.c

926

val = tps65217pmic_reg_read(sc, TPS65217PMIC_DEFSLEW);

sys/dev/i2c/tps65217pmic.c

991

uint8_t val;

sys/dev/i2c/tps65217pmic.c

998

val = tps65217pmic_reg_read(pmic_sc, TPS65217PMIC_ENABLE);

sys/dev/i2c/tsllux.c

226

u_int val;

sys/dev/i2c/tsllux.c

232

val = sc->sc_cs_package ? 1 : 0;

sys/dev/i2c/tsllux.c

233

node.sysctl_data = &val;

sys/dev/i2c/tsllux.c

242

sc->sc_cs_package = val ? true : false;

sys/dev/i2c/tsllux.c

254

u_int val;

sys/dev/i2c/tsllux.c

260

val = sc->sc_auto_gain ? 1 : 0;

sys/dev/i2c/tsllux.c

261

node.sysctl_data = &val;

sys/dev/i2c/tsllux.c

270

error = tsllux_set_autogain(sc, val ? true : false);

sys/dev/i2c/tsllux.c

282

u_int val;

sys/dev/i2c/tsllux.c

292

val = 1;

sys/dev/i2c/tsllux.c

296

val = 16;

sys/dev/i2c/tsllux.c

300

val = 1;

sys/dev/i2c/tsllux.c

303

node.sysctl_data = &val;

sys/dev/i2c/tsllux.c

310

switch (val) {

sys/dev/i2c/tsllux.c

342

u_int val;

sys/dev/i2c/tsllux.c

352

val = 13;

sys/dev/i2c/tsllux.c

356

val = 101;

sys/dev/i2c/tsllux.c

361

val = 402;

sys/dev/i2c/tsllux.c

364

node.sysctl_data = &val;

sys/dev/i2c/tsllux.c

371

switch (val) {

sys/dev/i2c/tsllux.c

497

tsllux_write1(struct tsllux_softc *sc, uint8_t reg, uint8_t val)

sys/dev/i2c/tsllux.c

500

return (iic_smbus_write_byte(sc->sc_i2c, sc->sc_addr, reg, val, 0));

sys/dev/i2c/tsllux.c

505

tsllux_write2(struct tsllux_softc *sc, uint8_t reg, uint16_t val)

sys/dev/i2c/tsllux.c

508

return (iic_smbus_write_word(sc->sc_i2c, sc->sc_addr, reg, val, 0));

sys/dev/i2c/tsllux.c

520

uint8_t val;

sys/dev/i2c/tsllux.c

527

error = tsllux_read1(sc, TSL256x_REG_CONTROL, &val);

sys/dev/i2c/tsllux.c

531

if (val != CONTROL6x_POWER_ON) {

sys/dev/i2c/twl4030.c

121

uint8_t val = 0;

sys/dev/i2c/twl4030.c

125

&reg, 1, &val, 1, flags);

sys/dev/i2c/twl4030.c

129

return val;

sys/dev/i2c/twl4030.c

133

twl_write(struct twl_softc *sc, uint8_t mod, uint8_t reg, uint8_t val, int flags)

sys/dev/i2c/twl4030.c

139

buf[1] = val;

sys/dev/i2c/twl4030.c

151

#define INT_WRITE(sc, reg, val) twl_write((sc), ADDR_INT, (reg), (val), I2C_F_POLL)

sys/dev/i2c/twl4030.c

154

#define POWER_WRITE(sc, reg, val) twl_write((sc), ADDR_POWER, (reg), (val), I2C_F_POLL)

sys/dev/i2c/twl4030.c

297

int val;

sys/dev/i2c/twl4030.c

303

val = __SHIFTOUT(gpio, PIN_BIT(gpin->pin_num));

sys/dev/i2c/twl4030.c

305

val = !val;

sys/dev/i2c/twl4030.c

307

return val;

sys/dev/i2c/twl4030.c

311

twl_gpio_write(device_t dev, void *priv, int val, bool raw)

sys/dev/i2c/twl4030.c

317

val = !val;

sys/dev/i2c/twl4030.c

320

if (val)

sys/dev/i2c/xc3028.c

441

xc3028_read_2(struct xc3028 *xc, uint16_t reg, uint16_t *val)

sys/dev/i2c/xc3028.c

458

*val = (resp[0] << 8) | resp[1];

sys/dev/i2c/xc3028.c

472

xc3028_write_2(struct xc3028 *xc, uint16_t reg, uint16_t val)

sys/dev/i2c/xc3028.c

478

data[2] = val >> 8;

sys/dev/i2c/xc3028.c

479

data[3] = val & 0xff;

sys/dev/i2c/xc5k.c

196

xc5k_read_2(struct xc5k *xc, uint16_t reg, uint16_t *val)

sys/dev/i2c/xc5k.c

213

*val = (resp[0] << 8) | resp[1];

sys/dev/i2c/xc5k.c

226

xc5k_write_2(struct xc5k *xc, uint16_t reg, uint16_t val)

sys/dev/i2c/xc5k.c

234

data[2] = val >> 8;

sys/dev/i2c/xc5k.c

235

data[3] = val & 0xff;

sys/dev/i2c/zl10353.c

107

uint8_t val;

sys/dev/i2c/zl10353.c

110

if ((rv = zl10353_read(zl, ZL10353_REG_ID, &val)) != 0)

sys/dev/i2c/zl10353.c

113

switch (val) {

sys/dev/i2c/zl10353.c

128

aprint_error_dev(zl->zl_parent, "unknown chip 0x%02x\n", val);

sys/dev/i2c/zl10353.c

154

zl10353_write(struct zl10353 *zl, uint8_t reg, uint8_t val)

sys/dev/i2c/zl10353.c

157

const uint8_t cmd[2] = { reg, val };

sys/dev/i2c/zl10353.c

177

uint8_t val;

sys/dev/i2c/zl10353.c

196

if ((rv = zl10353_write(zl, reset[i].reg, reset[i].val)) != 0)

sys/dev/i2c/zl10353.c

272

uint8_t val = ZL10353_GATE_DISABLE;

sys/dev/i2c/zl10353.c

275

val = ZL10353_GATE_ENABLE;

sys/dev/i2c/zl10353.c

277

return zl10353_write(aux, ZL10353_REG_GATE, val);

sys/dev/i2c/zl10353.c

284

uint8_t val = ZL10353_AGC_TARGET_DEFAULT;

sys/dev/i2c/zl10353.c

287

if ((rv = zl10353_write(zl, ZL10353_REG_AGC_TARGET, val)) != 0)

sys/dev/i2c/zl10353.c

290

val = 0;

sys/dev/i2c/zl10353.c

294

val |= ZL10353_AGC_CTRL_GUARD_NONAUTO;

sys/dev/i2c/zl10353.c

297

val |= ZL10353_AGC_CTRL_MODE_NONAUTO;

sys/dev/i2c/zl10353.c

299

return zl10353_write(zl, ZL10353_REG_AGC_CTRL, val);

sys/dev/i2c/zl10353.c

305

uint8_t val[3];

sys/dev/i2c/zl10353.c

311

val[0] = ZL10353_BW_1_6_MHZ;

sys/dev/i2c/zl10353.c

312

val[1] = ZL10353_BW_2_6_MHZ;

sys/dev/i2c/zl10353.c

313

val[2] = ZL10353_BW_3_6_MHZ;

sys/dev/i2c/zl10353.c

318

val[0] = ZL10353_BW_1_7_MHZ;

sys/dev/i2c/zl10353.c

319

val[1] = ZL10353_BW_2_7_MHZ;

sys/dev/i2c/zl10353.c

320

val[2] = ZL10353_BW_3_7_MHZ;

sys/dev/i2c/zl10353.c

325

val[0] = ZL10353_BW_1_8_MHZ;

sys/dev/i2c/zl10353.c

326

val[1] = ZL10353_BW_2_8_MHZ;

sys/dev/i2c/zl10353.c

327

val[2] = ZL10353_BW_3_8_MHZ;

sys/dev/i2c/zl10353.c

336

if ((rv = zl10353_write(zl, ZL10353_REG_BW_1, val[0])) != 0)

sys/dev/i2c/zl10353.c

339

if ((rv = zl10353_write(zl, ZL10353_REG_BW_2, val[1])) != 0)

sys/dev/i2c/zl10353.c

342

if ((rv = zl10353_write(zl, ZL10353_REG_BW_3, val[2])) != 0)

sys/dev/i2c/zl10353.c

352

uint64_t val;

sys/dev/i2c/zl10353.c

358

val = zl->zl_bw * c;

sys/dev/i2c/zl10353.c

359

val += zl->zl_clock >> 1;

sys/dev/i2c/zl10353.c

360

val /= zl->zl_clock;

sys/dev/i2c/zl10353.c

361

val = val & 0xffff;

sys/dev/i2c/zl10353.c

363

if ((rv = zl10353_write(zl, ZL10353_REG_RATE_1, val >> 8)) != 0)

sys/dev/i2c/zl10353.c

366

return zl10353_write(zl, ZL10353_REG_RATE_2, val & 0xff);

sys/dev/i2c/zl10353.c

372

const uint16_t val = zl->zl_freq;

sys/dev/i2c/zl10353.c

375

if ((rv = zl10353_write(zl, ZL10353_REG_FREQ_1, val >> 8)) != 0)

sys/dev/i2c/zl10353.c

378

return zl10353_write(zl, ZL10353_REG_FREQ_2, val & 0xff);

sys/dev/i2c/zl10353.c

385

uint16_t val = 0;

sys/dev/i2c/zl10353.c

388

if ((rv = zl10353_get_guard(ofdm->guard_interval, &val)) != 0)

sys/dev/i2c/zl10353.c

391

if ((rv = zl10353_get_mode(ofdm->transmission_mode, &val)) != 0)

sys/dev/i2c/zl10353.c

394

if ((rv = zl10353_get_fec(ofdm->code_rate_HP, true, &val)) != 0)

sys/dev/i2c/zl10353.c

397

if ((rv = zl10353_get_fec(ofdm->code_rate_LP, false, &val)) != 0)

sys/dev/i2c/zl10353.c

400

if ((rv = zl10353_get_modulation(ofdm->constellation, &val)) != 0)

sys/dev/i2c/zl10353.c

403

if ((rv = zl10353_get_hier(ofdm->hierarchy_information, &val)) != 0)

sys/dev/i2c/zl10353.c

406

if ((rv = zl10353_write(zl, ZL10353_REG_TPS_1, val >> 8)) != 0)

sys/dev/i2c/zl10353.c

409

if ((rv = zl10353_write(zl, ZL10353_REG_TPS_2, val & 0xff)) != 0)

sys/dev/i2c/zl10353.c

595

uint8_t val;

sys/dev/i2c/zl10353.c

597

if (zl10353_read(zl, ZL10353_REG_STATUS_LOCK, &val) == 0) {

sys/dev/i2c/zl10353.c

599

if ((val & ZL10353_STATUS_LOCK_ON) != 0)

sys/dev/i2c/zl10353.c

602

if ((val & ZL10353_STATUS_LOCK_CARRIER) != 0)

sys/dev/i2c/zl10353.c

605

if ((val & ZL10353_STATUS_LOCK_VITERBI) != 0)

sys/dev/i2c/zl10353.c

609

if (zl10353_read(zl, ZL10353_REG_STATUS_SYNC, &val) == 0) {

sys/dev/i2c/zl10353.c

611

if ((val & ZL10353_STATUS_SYNC_ON) != 0)

sys/dev/i2c/zl10353.c

615

if (zl10353_read(zl, ZL10353_REG_STATUS_SIGNAL, &val) == 0) {

sys/dev/i2c/zl10353.c

617

if ((val & ZL10353_STATUS_SIGNAL_ON) != 0)

sys/dev/i2c/zl10353.c

641

uint8_t val;

sys/dev/i2c/zl10353.c

643

if (zl10353_read(zl, ZL10353_REG_SNR, &val) != 0)

sys/dev/i2c/zl10353.c

646

return (val << 8) | val;

sys/dev/i2o/iop.c

254

iop_outl(struct iop_softc *sc, int off, u_int32_t val)

sys/dev/i2o/iop.c

257

bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);

sys/dev/i2o/iop.c

272

iop_outl_msg(struct iop_softc *sc, int off, u_int32_t val)

sys/dev/i2o/iop.c

275

bus_space_write_4(sc->sc_msg_iot, sc->sc_msg_ioh, off, val);

sys/dev/ic/aacvar.h

239

#define AAC_SETREG4(sc, reg, val) \

sys/dev/ic/aacvar.h

240

bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (reg), (val))

sys/dev/ic/aacvar.h

243

#define AAC_SETREG2(sc, reg, val) \

sys/dev/ic/aacvar.h

244

bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (reg), (val))

sys/dev/ic/aacvar.h

247

#define AAC_SETREG1(sc, reg, val) \

sys/dev/ic/aacvar.h

248

bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (reg), (val))

sys/dev/ic/ac97.c

1002

uint16_t val;

sys/dev/ic/ac97.c

1013

ac97_read(as, AC97_REG_POWER, &val);

sys/dev/ic/ac97.c

1014

if ((val & as->power_all) == as->power_all)

sys/dev/ic/ac97.c

1025

ac97_read(as, AC97_REG_MASTER_VOLUME, &val);

sys/dev/ic/ac97.c

1026

if (val == 0x1010)

sys/dev/ic/ac97.c

1240

uint16_t val;

sys/dev/ic/ac97.c

1290

ac97_read(as, AC97_REG_POWER, &val);

sys/dev/ic/ac97.c

1291

if ((val & AC97_POWER_MIXER) == 0) {

sys/dev/ic/ac97.c

1298

ac97_read(as, AC97_REG_POWER, &val);

sys/dev/ic/ac97.c

1299

if ((val & as->power_all) == as->power_all)

sys/dev/ic/ac97.c

1408

ac97_read(as, AC97_REG_SPDIF_CTRL, &val);

sys/dev/ic/ac97.c

1409

val = (val & ~AC97_SPDIF_SPSR_MASK)

sys/dev/ic/ac97.c

1411

ac97_write(as, AC97_REG_SPDIF_CTRL, val);

sys/dev/ic/ac97.c

1718

uint16_t val, newval;

sys/dev/ic/ac97.c

1739

ac97_read(as, si->reg, &val);

sys/dev/ic/ac97.c

1741

DPRINTFN(5, ("read(%x) = %x\n", si->reg, val));

sys/dev/ic/ac97.c

1789

ol = (val >> (8+si->ofs)) & mask;

sys/dev/ic/ac97.c

1790

or = (val >> si->ofs) & mask;

sys/dev/ic/ac97.c

1815

error = ac97_write(as, si->reg, (val & ~mask) | newval);

sys/dev/ic/ac97.c

1854

uint16_t val;

sys/dev/ic/ac97.c

1867

ac97_read(as, si->reg, &val);

sys/dev/ic/ac97.c

1869

DPRINTFN(5, ("read(%x) = %x\n", si->reg, val));

sys/dev/ic/ac97.c

1875

cp->un.ord = (val >> si->ofs) & mask;

sys/dev/ic/ac97.c

1877

val, si->ofs, mask, cp->un.ord));

sys/dev/ic/ac97.c

1889

l = r = (val >> si->ofs) & mask;

sys/dev/ic/ac97.c

1892

l = (val >> (si->ofs + 8)) & mask;

sys/dev/ic/ac97.c

1893

r = (val >> si->ofs) & mask;

sys/dev/ic/ac97.c

1895

r = (val >> (si->ofs + 8)) & mask;

sys/dev/ic/ac97.c

1896

l = (val >> si->ofs) & mask;

sys/dev/ic/ac97.c

2279

uint16_t val;

sys/dev/ic/ac97.c

2283

val = as->shadow_reg[AC97_REG_GPIO_STATUS >> 1];

sys/dev/ic/ac97.c

2286

val &= ~line;

sys/dev/ic/ac97.c

2289

val |= line;

sys/dev/ic/ac97.c

2292

ac97_write(as, AC97_REG_GPIO_STATUS, val);

sys/dev/ic/ac97.c

935

ac97_read(struct ac97_softc *as, uint8_t reg, uint16_t *val)

sys/dev/ic/ac97.c

942

*val = as->shadow_reg[reg >> 1];

sys/dev/ic/ac97.c

946

if (as->host_if->read(as->host_if->arg, reg, val)) {

sys/dev/ic/ac97.c

947

*val = as->shadow_reg[reg >> 1];

sys/dev/ic/ac97.c

952

ac97_write(struct ac97_softc *as, uint8_t reg, uint16_t val)

sys/dev/ic/ac97.c

957

as->shadow_reg[reg >> 1] = val;

sys/dev/ic/ac97.c

958

return as->host_if->write(as->host_if->arg, reg, val);

sys/dev/ic/ac97.c

963

as->shadow_reg[reg >> 1] = val;

sys/dev/ic/ac97.c

964

ret = as->host_if->write(as->host_if->arg, reg, val);

sys/dev/ic/ac97.c

966

if (val != actual && reg < 0x80) {

sys/dev/ic/ac97.c

968

ac97_register_names[reg / 2], val, actual);

sys/dev/ic/ad1848.c

270

ad_xwrite(struct ad1848_softc *sc, int reg, int val)

sys/dev/ic/ad1848.c

275

ADWRITE(sc, AD1848_IDATA, val & 0xff);

sys/dev/ic/advlib.c

1838

u_int16_t val;

sys/dev/ic/advlib.c

1842

val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);

sys/dev/ic/advlib.c

1843

scsiq->d2.ccb_ptr = MAKELONG(val, ASC_GET_CHIP_LRAM_DATA(iot, ioh));

sys/dev/ic/advlib.c

1844

val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);

sys/dev/ic/advlib.c

1845

scsiq->d2.target_ix = LO_BYTE(val);

sys/dev/ic/advlib.c

1846

scsiq->d2.flag = HI_BYTE(val);

sys/dev/ic/advlib.c

1847

val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);

sys/dev/ic/advlib.c

1848

scsiq->d2.cdb_len = LO_BYTE(val);

sys/dev/ic/advlib.c

1849

scsiq->d2.tag_code = HI_BYTE(val);

sys/dev/ic/advlib.c

1852

val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);

sys/dev/ic/advlib.c

1853

scsiq->d3.done_stat = LO_BYTE(val);

sys/dev/ic/advlib.c

1854

scsiq->d3.host_stat = HI_BYTE(val);

sys/dev/ic/advlib.c

1855

val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);

sys/dev/ic/advlib.c

1856

scsiq->d3.scsi_stat = LO_BYTE(val);

sys/dev/ic/advlib.c

1857

scsiq->d3.scsi_msg = HI_BYTE(val);

sys/dev/ic/advlib.c

2562

u_int16_t val;

sys/dev/ic/advlib.c

2568

val = MAKEWORD(scsiq->q1.cntl, scsiq->q1.sg_queue_cnt);

sys/dev/ic/advlib.c

2569

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2570

val = MAKEWORD(scsiq->q1.target_id, scsiq->q1.target_lun);

sys/dev/ic/advlib.c

2571

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2572

val = LO_WORD(scsiq->q1.data_addr);

sys/dev/ic/advlib.c

2573

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2574

val = HI_WORD(scsiq->q1.data_addr);

sys/dev/ic/advlib.c

2575

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2576

val = LO_WORD(scsiq->q1.data_cnt);

sys/dev/ic/advlib.c

2577

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2578

val = HI_WORD(scsiq->q1.data_cnt);

sys/dev/ic/advlib.c

2579

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2580

val = LO_WORD(scsiq->q1.sense_addr);

sys/dev/ic/advlib.c

2581

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2582

val = HI_WORD(scsiq->q1.sense_addr);

sys/dev/ic/advlib.c

2583

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2584

val = MAKEWORD(scsiq->q1.sense_len, scsiq->q1.extra_bytes);

sys/dev/ic/advlib.c

2585

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2588

val = LO_WORD(scsiq->q2.ccb_ptr);

sys/dev/ic/advlib.c

2589

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2590

val = HI_WORD(scsiq->q2.ccb_ptr);

sys/dev/ic/advlib.c

2591

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2592

val = MAKEWORD(scsiq->q2.target_ix, scsiq->q2.flag);

sys/dev/ic/advlib.c

2593

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

2594

val = MAKEWORD(scsiq->q2.cdb_len, scsiq->q2.tag_code);

sys/dev/ic/advlib.c

2595

ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);

sys/dev/ic/advlib.c

754

u_int8_t val;

sys/dev/ic/advlib.c

756

val = ASC_GET_CHIP_CONTROL(iot, ioh) &

sys/dev/ic/advlib.c

763

val |= ASC_CC_BANK_ONE;

sys/dev/ic/advlib.c

767

val |= ASC_CC_DIAG | ASC_CC_BANK_ONE;

sys/dev/ic/advlib.c

771

val &= ~ASC_CC_BANK_ONE;

sys/dev/ic/advlib.c

774

ASC_SET_CHIP_CONTROL(iot, ioh, val);

sys/dev/ic/advlib.h

1242

#define ASC_PUT_QDONE_IN_PROGRESS(iot, ioh, val) AscWriteLramByte((iot), (ioh), ASCV_Q_DONE_IN_PROGRESS_B, val)

sys/dev/ic/advlib.h

1245

#define ASC_PUT_VAR_FREE_QHEAD(iot, ioh, val) AscWriteLramWord((iot), (ioh), ASCV_FREE_Q_HEAD_W, val)

sys/dev/ic/advlib.h

1246

#define ASC_PUT_VAR_DONE_QTAIL(iot, ioh, val) AscWriteLramWord((iot), (ioh), ASCV_DONE_Q_TAIL_W, val)

sys/dev/ic/advlib.h

1249

#define ASC_PUT_RISC_VAR_FREE_QHEAD(iot, ioh, val) AscWriteLramByte((iot), (ioh), ASCV_NEXTRDY_B, val)

sys/dev/ic/advlib.h

1250

#define ASC_PUT_RISC_VAR_DONE_QTAIL(iot, ioh, val) AscWriteLramByte((iot), (ioh), ASCV_DONENEXT_B, val)

sys/dev/ic/ahcisatavar.h

115

#define AHCI_WRITE(sc, reg, val) bus_space_write_4((sc)->sc_ahcit, \

sys/dev/ic/ahcisatavar.h

116

(sc)->sc_ahcih, (reg), (val))

sys/dev/ic/aic6915.c

111

sf_reg_write(struct sf_softc *sc, bus_addr_t reg, uint32_t val)

sys/dev/ic/aic6915.c

118

val);

sys/dev/ic/aic6915.c

122

bus_space_write_4(sc->sc_st, sc->sc_sh, reg, val);

sys/dev/ic/aic6915.c

127

#define sf_genreg_write(sc, reg, val) \

sys/dev/ic/aic6915.c

128

sf_reg_write((sc), (reg) + SF_GENREG_OFFSET, (val))

sys/dev/ic/aic6915.c

1386

sf_mii_write(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/aic6915.c

1391

sf_genreg_write(sc, SF_MII_PHY_REG(phy, reg), val);

sys/dev/ic/aic6915.c

93

#define sf_funcreg_write(sc, reg, val) \

sys/dev/ic/aic6915.c

94

bus_space_write_4((sc)->sc_st, (sc)->sc_sh_func, (reg), (val))

sys/dev/ic/am7930.c

157

am7930_iwrite(struct am7930_softc *sc, int reg, uint8_t val)

sys/dev/ic/am7930.c

161

AM7930_DWRITE(sc, AM7930_DREG_DR, val);

sys/dev/ic/am7930.c

173

am7930_iwrite16(struct am7930_softc *sc, int reg, uint16_t val)

sys/dev/ic/am7930.c

177

AM7930_DWRITE(sc, AM7930_DREG_DR, val);

sys/dev/ic/am7930.c

178

AM7930_DWRITE(sc, AM7930_DREG_DR, val >> 8);

sys/dev/ic/am79c930.c

144

io_write_1( struct am79c930_softc *sc, u_int32_t off, u_int8_t val)

sys/dev/ic/am79c930.c

152

bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA, val);

sys/dev/ic/am79c930.c

157

io_write_2(struct am79c930_softc *sc, u_int32_t off, u_int16_t val)

sys/dev/ic/am79c930.c

165

bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, val & 0xff);

sys/dev/ic/am79c930.c

167

bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, (val>>8)&0xff);

sys/dev/ic/am79c930.c

172

io_write_4(struct am79c930_softc *sc, u_int32_t off, u_int32_t val)

sys/dev/ic/am79c930.c

180

bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,val & 0xff);

sys/dev/ic/am79c930.c

182

bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>8)&0xff);

sys/dev/ic/am79c930.c

184

bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>16)&0xff);

sys/dev/ic/am79c930.c

186

bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>24)&0xff);

sys/dev/ic/am79c930.c

209

u_int8_t val;

sys/dev/ic/am79c930.c

216

val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);

sys/dev/ic/am79c930.c

218

return val;

sys/dev/ic/am79c930.c

224

u_int16_t val;

sys/dev/ic/am79c930.c

231

val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);

sys/dev/ic/am79c930.c

233

val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8;

sys/dev/ic/am79c930.c

235

return val;

sys/dev/ic/am79c930.c

241

u_int32_t val;

sys/dev/ic/am79c930.c

248

val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);

sys/dev/ic/am79c930.c

250

val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8;

sys/dev/ic/am79c930.c

252

val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 16;

sys/dev/ic/am79c930.c

254

val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 24;

sys/dev/ic/am79c930.c

256

return val;

sys/dev/ic/am79c930.c

276

mem_write_1(struct am79c930_softc *sc, u_int32_t off, u_int8_t val)

sys/dev/ic/am79c930.c

278

bus_space_write_1(sc->sc_memt, sc->sc_memh, off, val);

sys/dev/ic/am79c930.c

282

mem_write_2(struct am79c930_softc *sc, u_int32_t off, u_int16_t val)

sys/dev/ic/am79c930.c

289

bus_space_write_stream_2(t, h, off, htole16(val));

sys/dev/ic/am79c930.c

291

bus_space_write_1(t, h, off, val & 0xff);

sys/dev/ic/am79c930.c

292

bus_space_write_1(t, h, off+1, (val >> 8) & 0xff);

sys/dev/ic/am79c930.c

297

mem_write_4(struct am79c930_softc *sc, u_int32_t off, u_int32_t val)

sys/dev/ic/am79c930.c

304

bus_space_write_stream_4(t, h, off, htole32(val));

sys/dev/ic/am79c930.c

306

bus_space_write_1(t, h, off, val & 0xff);

sys/dev/ic/am79c930.c

307

bus_space_write_1(t, h, off+1, (val >> 8) & 0xff);

sys/dev/ic/am79c930.c

308

bus_space_write_1(t, h, off+2, (val >> 16) & 0xff);

sys/dev/ic/am79c930.c

309

bus_space_write_1(t, h, off+3, (val >> 24) & 0xff);

sys/dev/ic/an.c

1601

an_cmd(struct an_softc *sc, int cmd, int val)

sys/dev/ic/an.c

1613

CSR_WRITE_2(sc, AN_PARAM0, val);

sys/dev/ic/an.c

1641

device_xname(sc->sc_dev), cmd, val);

sys/dev/ic/an.c

1648

device_xname(sc->sc_dev), cmd, val, status,

sys/dev/ic/anvar.h

50

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/ic/anvar.h

51

bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val)

sys/dev/ic/anvar.h

61

#define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \

sys/dev/ic/anvar.h

62

bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh, reg, val, count)

sys/dev/ic/anx_dp.c

1000

((uint8_t *)(dpmsg->buffer))[i] = val & 0xffU;

sys/dev/ic/anx_dp.c

1005

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_AUX_RX_COMM);

sys/dev/ic/anx_dp.c

1006

if (val == AUX_RX_COMM_AUX_DEFER)

sys/dev/ic/anx_dp.c

1008

else if (val == AUX_RX_COMM_I2C_DEFER)

sys/dev/ic/anx_dp.c

416

uint32_t val;

sys/dev/ic/anx_dp.c

418

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_PHY_TEST);

sys/dev/ic/anx_dp.c

419

val |= MACRO_RST;

sys/dev/ic/anx_dp.c

420

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_PHY_TEST, val);

sys/dev/ic/anx_dp.c

422

val &= ~MACRO_RST;

sys/dev/ic/anx_dp.c

423

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_PHY_TEST, val);

sys/dev/ic/anx_dp.c

431

uint32_t val;

sys/dev/ic/anx_dp.c

448

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,

sys/dev/ic/anx_dp.c

450

val &= ~(PRE_EMPHASIS_SET(3)|DRIVE_CURRENT_SET(3));

sys/dev/ic/anx_dp.c

451

val |= PRE_EMPHASIS_SET(0);

sys/dev/ic/anx_dp.c

453

ANXDP_LNx_LINK_TRAINING_CTL(i), val);

sys/dev/ic/anx_dp.c

609

uint32_t val;

sys/dev/ic/anx_dp.c

611

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_VIDEO_CTL_1);

sys/dev/ic/anx_dp.c

612

val &= ~VIDEO_EN;

sys/dev/ic/anx_dp.c

613

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_VIDEO_CTL_1, val);

sys/dev/ic/anx_dp.c

615

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_VIDEO_CTL_1);

sys/dev/ic/anx_dp.c

616

val &= ~VIDEO_MUTE;

sys/dev/ic/anx_dp.c

617

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_VIDEO_CTL_1, val);

sys/dev/ic/anx_dp.c

619

val = SW_FUNC_EN_N;

sys/dev/ic/anx_dp.c

621

val |= RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N;

sys/dev/ic/anx_dp.c

623

val |= MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |

sys/dev/ic/anx_dp.c

626

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_FUNC_EN_1, val);

sys/dev/ic/anx_dp.c

662

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_FUNC_EN_1);

sys/dev/ic/anx_dp.c

663

val &= ~SW_FUNC_EN_N;

sys/dev/ic/anx_dp.c

664

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_FUNC_EN_1, val);

sys/dev/ic/anx_dp.c

671

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_DEBUG_CTL);

sys/dev/ic/anx_dp.c

672

val &= ~(F_PLL_LOCK | PLL_LOCK_CTRL);

sys/dev/ic/anx_dp.c

673

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_DEBUG_CTL, val);

sys/dev/ic/anx_dp.c

679

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_FUNC_EN_2);

sys/dev/ic/anx_dp.c

680

val &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N |

sys/dev/ic/anx_dp.c

682

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_FUNC_EN_2, val);

sys/dev/ic/anx_dp.c

692

uint32_t val;

sys/dev/ic/anx_dp.c

694

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_FUNC_EN_1);

sys/dev/ic/anx_dp.c

696

val &= ~(RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N);

sys/dev/ic/anx_dp.c

698

val &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);

sys/dev/ic/anx_dp.c

699

val |= MASTER_VID_FUNC_EN_N;

sys/dev/ic/anx_dp.c

701

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_FUNC_EN_1, val);

sys/dev/ic/anx_dp.c

703

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_VIDEO_CTL_10);

sys/dev/ic/anx_dp.c

704

val &= ~(SLAVE_I_SCAN_CFG|SLAVE_VSYNC_P_CFG|SLAVE_HSYNC_P_CFG);

sys/dev/ic/anx_dp.c

706

val |= SLAVE_I_SCAN_CFG;

sys/dev/ic/anx_dp.c

708

val |= SLAVE_VSYNC_P_CFG;

sys/dev/ic/anx_dp.c

710

val |= SLAVE_HSYNC_P_CFG;

sys/dev/ic/anx_dp.c

711

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_VIDEO_CTL_10, val);

sys/dev/ic/anx_dp.c

718

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_VIDEO_CTL_1);

sys/dev/ic/anx_dp.c

719

val |= VIDEO_EN;

sys/dev/ic/anx_dp.c

720

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_VIDEO_CTL_1, val);

sys/dev/ic/anx_dp.c

909

uint32_t val;

sys/dev/ic/anx_dp.c

916

val = AUX_LENGTH(dpmsg->size);

sys/dev/ic/anx_dp.c

918

val |= AUX_TX_COMM_MOT;

sys/dev/ic/anx_dp.c

924

val |= AUX_TX_COMM_READ;

sys/dev/ic/anx_dp.c

927

val |= AUX_TX_COMM_DP;

sys/dev/ic/anx_dp.c

930

val |= AUX_TX_COMM_READ | AUX_TX_COMM_DP;

sys/dev/ic/anx_dp.c

934

bus_space_write_4(sc->sc_bst, sc->sc_bsh, ANXDP_AUX_CH_CTL_1, val);

sys/dev/ic/anx_dp.c

956

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_AUX_CH_CTL_2);

sys/dev/ic/anx_dp.c

957

while ((val & AUX_EN) != 0) {

sys/dev/ic/anx_dp.c

963

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,

sys/dev/ic/anx_dp.c

968

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_DP_INT_STA);

sys/dev/ic/anx_dp.c

969

while (!(val & RPLY_RECEIV)) {

sys/dev/ic/anx_dp.c

975

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,

sys/dev/ic/anx_dp.c

982

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_DP_INT_STA);

sys/dev/ic/anx_dp.c

983

if ((val & AUX_ERR) != 0) {

sys/dev/ic/anx_dp.c

990

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, ANXDP_AUX_CH_STA);

sys/dev/ic/anx_dp.c

991

if (AUX_STATUS(val) != 0) {

sys/dev/ic/anx_dp.c

998

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,

sys/dev/ic/arn5008.c

2393

uint32_t val = pvals[i];

sys/dev/ic/arn5008.c

2398

val &= ~AR_AN_TOP2_PWDCLKIND;

sys/dev/ic/arn5008.c

2399

AR_WRITE(sc, ini->regs[i], val);

sys/dev/ic/arn5008.c

2530

int16_t ss, delta, vpdstep, val;

sys/dev/ic/arn5008.c

2592

val = vpd[0] + ss * vpdstep;

sys/dev/ic/arn5008.c

2593

pdadcs[npdadcs++] = MAX(val, 0);

sys/dev/ic/arn5008.c

2611

val = vpd[nvpds - 1] + (ss - maxidx + 1) * vpdstep;

sys/dev/ic/arn5008.c

2612

pdadcs[npdadcs++] = MIN(val, 255);

sys/dev/ic/arn5008.c

273

ar5008_read_eep_word(struct athn_softc *sc, uint32_t addr, uint16_t *val)

sys/dev/ic/arn5008.c

283

*val = MS(reg, AR_EEPROM_STATUS_DATA_VAL);

sys/dev/ic/arn5008.c

288

*val = 0xffff;

sys/dev/ic/arn5416.c

762

ar5416_rw_rfbits(uint32_t *buf, int col, int off, uint32_t val, int nbits)

sys/dev/ic/arn5416.c

773

buf[idx] |= ((val >> nbits) & 1) << (bit + col * 8);

sys/dev/ic/arn9003.c

2321

} val[2][2];

sys/dev/ic/arn9003.c

2329

val[0][0].m = res[0] & 0xfff;

sys/dev/ic/arn9003.c

2330

val[0][0].p = (res[0] >> 12) & 0xfff;

sys/dev/ic/arn9003.c

2331

val[0][0].c = ((res[0] >> 24) & 0xff) | (res[1] & 0xf) << 8;

sys/dev/ic/arn9003.c

2333

val[0][1].m = (res[1] >> 4) & 0xfff;

sys/dev/ic/arn9003.c

2334

val[0][1].p = res[2] & 0xfff;

sys/dev/ic/arn9003.c

2335

val[0][1].c = (res[2] >> 12) & 0xfff;

sys/dev/ic/arn9003.c

2337

val[1][0].m = ((res[2] >> 24) & 0xff) | (res[3] & 0xf) << 8;

sys/dev/ic/arn9003.c

2338

val[1][0].p = (res[3] >> 4) & 0xfff;

sys/dev/ic/arn9003.c

2339

val[1][0].c = res[4] & 0xfff;

sys/dev/ic/arn9003.c

2341

val[1][1].m = (res[4] >> 12) & 0xfff;

sys/dev/ic/arn9003.c

2342

val[1][1].p = ((res[4] >> 24) & 0xff) | (res[5] & 0xf) << 8;

sys/dev/ic/arn9003.c

2343

val[1][1].c = (res[5] >> 4) & 0xfff;

sys/dev/ic/arn9003.c

2348

m = SIGN_EXT(val[i][j].m);

sys/dev/ic/arn9003.c

2349

p = SIGN_EXT(val[i][j].p);

sys/dev/ic/arn9003.c

2350

c = SIGN_EXT(val[i][j].c);

sys/dev/ic/arn9003.c

254

ar9003_read_eep_word(struct athn_softc *sc, uint32_t addr, uint16_t *val)

sys/dev/ic/arn9003.c

264

*val = MS(reg, AR_EEPROM_STATUS_DATA_VAL);

sys/dev/ic/arn9003.c

269

*val = 0xffff;

sys/dev/ic/arn9003.c

2755

get_scale(int val)

sys/dev/ic/arn9003.c

2760

while (val >>= 1)

sys/dev/ic/arn9003.c

281

uint16_t val;

sys/dev/ic/arn9003.c

287

error = ar9003_read_eep_word(sc, addr, &val);

sys/dev/ic/arn9003.c

290

*dst++ = val & 0xff;

sys/dev/ic/arn9003.c

297

error = ar9003_read_eep_word(sc, addr, &val);

sys/dev/ic/arn9003.c

300

*dst++ = val >> 8;

sys/dev/ic/arn9003.c

301

*dst++ = val & 0xff;

sys/dev/ic/arn9003.c

304

error = ar9003_read_eep_word(sc, addr, &val);

sys/dev/ic/arn9003.c

307

*dst++ = val >> 8;

sys/dev/ic/arn9003.c

316

ar9003_read_otp_word(struct athn_softc *sc, uint32_t addr, uint32_t *val)

sys/dev/ic/arn9003.c

325

*val = AR_READ(sc, AR_OTP_READ_DATA);

sys/dev/ic/arn9003.c

341

uint32_t val;

sys/dev/ic/arn9003.c

346

error = ar9003_read_otp_word(sc, addr >> 2, &val);

sys/dev/ic/arn9003.c

349

*dst++ = (val >> ((addr & 3) * 8)) & 0xff;

sys/dev/ic/arn9380.c

475

ar9485_pmu_write(struct athn_softc *sc, uint32_t addr, uint32_t val)

sys/dev/ic/arn9380.c

479

AR_WRITE(sc, addr, val);

sys/dev/ic/arn9380.c

482

if (AR_READ(sc, addr) == val)

sys/dev/ic/arn9380.c

484

AR_WRITE(sc, addr, val); /* Insist. */

sys/dev/ic/ath.c

1997

u_int32_t rfilt, mfilt[2], val;

sys/dev/ic/ath.c

2042

val = LE_READ_4((char *)dl + 0);

sys/dev/ic/ath.c

2043

pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;

sys/dev/ic/ath.c

2044

val = LE_READ_4((char *)dl + 3);

sys/dev/ic/ath.c

2045

pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;

sys/dev/ic/athn.c

2721

uint32_t val, lo, hi;

sys/dev/ic/athn.c

2739

val = addr[0] | addr[1] << 8 | addr[2] << 16;

sys/dev/ic/athn.c

2740

bit = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;

sys/dev/ic/athn.c

2741

val = addr[3] | addr[4] << 8 | addr[5] << 16;

sys/dev/ic/athn.c

2742

bit ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;

sys/dev/ic/athnreg.h

1462

#define AR_WRITE(sc, reg, val) \

sys/dev/ic/athnreg.h

1463

(sc)->sc_ops.write((sc), (reg), (val))

sys/dev/ic/athnreg.h

1478

#define MS(val, field) \

sys/dev/ic/athnreg.h

1479

(((val) & field##_M) >> field##_S)

sys/dev/ic/athnreg.h

1482

#define SM(field, val) \

sys/dev/ic/athnreg.h

1483

(((val) << field##_S) & field##_M)

sys/dev/ic/athnreg.h

1486

#define RW(var, field, val) \

sys/dev/ic/athnreg.h

1487

(((var) & ~field##_M) | SM(field, val))

sys/dev/ic/atppc.c

1378

u_int8_t val = 0;

sys/dev/ic/atppc.c

1408

val = (atppc_r_dtr(atppc));

sys/dev/ic/atppc.c

1411

val = (atppc_r_str(atppc));

sys/dev/ic/atppc.c

1414

val = (atppc_r_ctr(atppc));

sys/dev/ic/atppc.c

1417

val = (atppc_r_eppA(atppc));

sys/dev/ic/atppc.c

1420

val = (atppc_r_eppD(atppc));

sys/dev/ic/atppc.c

1423

val = (atppc_r_ecr(atppc));

sys/dev/ic/atppc.c

1426

val = (atppc_r_fifo(atppc));

sys/dev/ic/atppc.c

1459

return val;

sys/dev/ic/atppc.c

1464

atppc_read_ivar(device_t dev, int index, unsigned int *val)

sys/dev/ic/atppc.c

1474

*val = PPBUS_EPP_1_9;

sys/dev/ic/atppc.c

1476

*val = PPBUS_EPP_1_7;

sys/dev/ic/atppc.c

1481

*val = ((atppc->sc_use & ATPPC_USE_INTR) != 0);

sys/dev/ic/atppc.c

1485

*val = ((atppc->sc_use & ATPPC_USE_DMA) != 0);

sys/dev/ic/atppc.c

1499

atppc_write_ivar(device_t dev, int index, unsigned int *val)

sys/dev/ic/atppc.c

1508

if (*val == PPBUS_EPP_1_9 || *val == PPBUS_EPP_1_7)

sys/dev/ic/atppc.c

1509

atppc->sc_epp = *val;

sys/dev/ic/atppc.c

1515

if (*val == 0)

sys/dev/ic/atppc.c

1524

if (*val == 0)

sys/dev/ic/atw.c

1489

u_int addr, val;

sys/dev/ic/atw.c

1491

val = 0;

sys/dev/ic/atw.c

1498

if (atw_si4126_read(sc, addr, &val) == 0) {

sys/dev/ic/atw.c

1502

printf("%05x\n", val);

sys/dev/ic/atw.c

1695

u_int addr, val;

sys/dev/ic/atw.c

1702

if (atw_rf3000_read(sc, addr, &val) != 0) {

sys/dev/ic/atw.c

1706

printf("%08x\n", val);

sys/dev/ic/atw.c

1788

atw_rf3000_write(struct atw_softc *sc, u_int addr, u_int val)

sys/dev/ic/atw.c

1794

__SHIFTIN(val & 0xff, ATW_BBPCTL_DATA_MASK) |

sys/dev/ic/atw.c

1826

atw_rf3000_read(struct atw_softc *sc, u_int addr, u_int *val)

sys/dev/ic/atw.c

1861

if (val != NULL)

sys/dev/ic/atw.c

1862

*val = __SHIFTOUT(reg, ATW_BBPCTL_DATA_MASK);

sys/dev/ic/atw.c

1875

atw_si4126_write(struct atw_softc *sc, u_int addr, u_int val)

sys/dev/ic/atw.c

1881

KASSERT((val & ~__SHIFTOUT_MASK(SI4126_TWI_DATA_MASK)) == 0);

sys/dev/ic/atw.c

1883

bits = __SHIFTIN(val, SI4126_TWI_DATA_MASK) |

sys/dev/ic/atw.c

1914

atw_si4126_read(struct atw_softc *sc, u_int addr, u_int *val)

sys/dev/ic/atw.c

1951

if (val != NULL)

sys/dev/ic/atw.c

1952

*val = __SHIFTOUT(ATW_READ(sc, ATW_SYNCTL),

sys/dev/ic/atwvar.h

436

#define ATW_WRITE(sc, reg, val) \

sys/dev/ic/atwvar.h

437

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/ic/awivar.h

127

#define awi_write_1(sc, off, val) \

sys/dev/ic/awivar.h

128

((sc)->sc_chip.sc_ops->write_1)(&sc->sc_chip, off, val)

sys/dev/ic/awivar.h

129

#define awi_write_2(sc, off, val) \

sys/dev/ic/awivar.h

130

((sc)->sc_chip.sc_ops->write_2)(&sc->sc_chip, off, val)

sys/dev/ic/awivar.h

131

#define awi_write_4(sc, off, val) \

sys/dev/ic/awivar.h

132

((sc)->sc_chip.sc_ops->write_4)(&sc->sc_chip, off, val)

sys/dev/ic/ax88190.c

176

ax88190_mii_bitbang_write(device_t self, uint32_t val)

sys/dev/ic/ax88190.c

180

bus_space_write_1(sc->sc_asict, sc->sc_asich, AX88190_MEMR, val);

sys/dev/ic/ax88190.c

184

ax88190_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/ax88190.c

188

val);

sys/dev/ic/ax88190.c

192

ax88190_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/ax88190.c

196

val);

sys/dev/ic/bcmgenet.c

104

*val = RD4(sc, GENET_MDIO_CMD) & 0xffff;

sys/dev/ic/bcmgenet.c

120

genet_mii_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/ic/bcmgenet.c

126

val | GENET_MDIO_WRITE | GENET_MDIO_START_BUSY |

sys/dev/ic/bcmgenet.c

148

uint32_t val;

sys/dev/ic/bcmgenet.c

159

val = RD4(sc, GENET_EXT_RGMII_OOB_CTRL);

sys/dev/ic/bcmgenet.c

160

val &= ~GENET_EXT_RGMII_OOB_OOB_DISABLE;

sys/dev/ic/bcmgenet.c

161

val |= GENET_EXT_RGMII_OOB_RGMII_LINK;

sys/dev/ic/bcmgenet.c

162

val |= GENET_EXT_RGMII_OOB_RGMII_MODE_EN;

sys/dev/ic/bcmgenet.c

164

val |= GENET_EXT_RGMII_OOB_ID_MODE_DISABLE;

sys/dev/ic/bcmgenet.c

166

val &= ~GENET_EXT_RGMII_OOB_ID_MODE_DISABLE;

sys/dev/ic/bcmgenet.c

167

WR4(sc, GENET_EXT_RGMII_OOB_CTRL, val);

sys/dev/ic/bcmgenet.c

169

val = RD4(sc, GENET_UMAC_CMD);

sys/dev/ic/bcmgenet.c

170

val &= ~GENET_UMAC_CMD_SPEED;

sys/dev/ic/bcmgenet.c

171

val |= __SHIFTIN(speed, GENET_UMAC_CMD_SPEED);

sys/dev/ic/bcmgenet.c

172

WR4(sc, GENET_UMAC_CMD, val);

sys/dev/ic/bcmgenet.c

393

uint32_t val;

sys/dev/ic/bcmgenet.c

395

val = RD4(sc, GENET_SYS_RBUF_FLUSH_CTRL);

sys/dev/ic/bcmgenet.c

396

val |= GENET_SYS_RBUF_FLUSH_RESET;

sys/dev/ic/bcmgenet.c

397

WR4(sc, GENET_SYS_RBUF_FLUSH_CTRL, val);

sys/dev/ic/bcmgenet.c

400

val &= ~GENET_SYS_RBUF_FLUSH_RESET;

sys/dev/ic/bcmgenet.c

401

WR4(sc, GENET_SYS_RBUF_FLUSH_CTRL, val);

sys/dev/ic/bcmgenet.c

419

val = RD4(sc, GENET_RBUF_CTRL);

sys/dev/ic/bcmgenet.c

420

val |= GENET_RBUF_ALIGN_2B;

sys/dev/ic/bcmgenet.c

421

WR4(sc, GENET_RBUF_CTRL, val);

sys/dev/ic/bcmgenet.c

432

uint32_t val;

sys/dev/ic/bcmgenet.c

448

val = RD4(sc, GENET_RX_DMA_RING_TIMEOUT(qid));

sys/dev/ic/bcmgenet.c

449

val &= ~GENET_DMA_RING_TIMEOUT_MASK;

sys/dev/ic/bcmgenet.c

450

val |= ticks;

sys/dev/ic/bcmgenet.c

451

WR4(sc, GENET_RX_DMA_RING_TIMEOUT(qid), val);

sys/dev/ic/bcmgenet.c

468

uint32_t val;

sys/dev/ic/bcmgenet.c

499

val = RD4(sc, GENET_TX_DMA_CTRL);

sys/dev/ic/bcmgenet.c

500

val |= GENET_TX_DMA_CTRL_EN;

sys/dev/ic/bcmgenet.c

501

val |= GENET_TX_DMA_CTRL_RBUF_EN(GENET_DMA_DEFAULT_QUEUE);

sys/dev/ic/bcmgenet.c

502

WR4(sc, GENET_TX_DMA_CTRL, val);

sys/dev/ic/bcmgenet.c

537

val = RD4(sc, GENET_RX_DMA_CTRL);

sys/dev/ic/bcmgenet.c

538

val |= GENET_RX_DMA_CTRL_EN;

sys/dev/ic/bcmgenet.c

539

val |= GENET_RX_DMA_CTRL_RBUF_EN(GENET_DMA_DEFAULT_QUEUE);

sys/dev/ic/bcmgenet.c

540

WR4(sc, GENET_RX_DMA_CTRL, val);

sys/dev/ic/bcmgenet.c

548

uint32_t val;

sys/dev/ic/bcmgenet.c

567

val = enaddr[3] | (enaddr[2] << 8) | (enaddr[1] << 16) |

sys/dev/ic/bcmgenet.c

569

WR4(sc, GENET_UMAC_MAC0, val);

sys/dev/ic/bcmgenet.c

570

val = enaddr[5] | (enaddr[4] << 8);

sys/dev/ic/bcmgenet.c

571

WR4(sc, GENET_UMAC_MAC1, val);

sys/dev/ic/bcmgenet.c

581

val = RD4(sc, GENET_UMAC_CMD);

sys/dev/ic/bcmgenet.c

582

val |= GENET_UMAC_CMD_TXEN;

sys/dev/ic/bcmgenet.c

583

val |= GENET_UMAC_CMD_RXEN;

sys/dev/ic/bcmgenet.c

584

WR4(sc, GENET_UMAC_CMD, val);

sys/dev/ic/bcmgenet.c

641

uint32_t val;

sys/dev/ic/bcmgenet.c

655

val = RD4(sc, GENET_UMAC_CMD);

sys/dev/ic/bcmgenet.c

656

val &= ~GENET_UMAC_CMD_RXEN;

sys/dev/ic/bcmgenet.c

657

WR4(sc, GENET_UMAC_CMD, val);

sys/dev/ic/bcmgenet.c

660

val = RD4(sc, GENET_RX_DMA_CTRL);

sys/dev/ic/bcmgenet.c

661

val &= ~GENET_RX_DMA_CTRL_EN;

sys/dev/ic/bcmgenet.c

662

WR4(sc, GENET_RX_DMA_CTRL, val);

sys/dev/ic/bcmgenet.c

665

val = RD4(sc, GENET_TX_DMA_CTRL);

sys/dev/ic/bcmgenet.c

666

val &= ~GENET_TX_DMA_CTRL_EN;

sys/dev/ic/bcmgenet.c

667

WR4(sc, GENET_TX_DMA_CTRL, val);

sys/dev/ic/bcmgenet.c

675

val = RD4(sc, GENET_UMAC_CMD);

sys/dev/ic/bcmgenet.c

676

val &= ~GENET_UMAC_CMD_TXEN;

sys/dev/ic/bcmgenet.c

677

WR4(sc, GENET_UMAC_CMD, val);

sys/dev/ic/bcmgenet.c

881

uint32_t val;

sys/dev/ic/bcmgenet.c

883

val = RD4(sc, GENET_INTRL2_CPU_STAT);

sys/dev/ic/bcmgenet.c

884

val &= ~RD4(sc, GENET_INTRL2_CPU_STAT_MASK);

sys/dev/ic/bcmgenet.c

885

WR4(sc, GENET_INTRL2_CPU_CLEAR, val);

sys/dev/ic/bcmgenet.c

887

if (val & GENET_IRQ_RXDMA_DONE) {

sys/dev/ic/bcmgenet.c

89

#define WR4(sc, reg, val) \

sys/dev/ic/bcmgenet.c

893

if (val & GENET_IRQ_TXDMA_DONE) {

sys/dev/ic/bcmgenet.c

90

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/bcmgenet.c

93

genet_mii_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/ic/bcmgenet.c

961

uint32_t maclo, machi, val;

sys/dev/ic/bcmgenet.c

969

val = RD4(sc, GENET_SYS_RBUF_FLUSH_CTRL);

sys/dev/ic/bcmgenet.c

970

if ((val & GENET_SYS_RBUF_FLUSH_RESET) == 0) {

sys/dev/ic/bt463.c

158

#define BTWREG(data, addr, val) do { bt463_wraddr((data), (addr)); \

sys/dev/ic/bt463.c

159

(data)->ramdac_wr((data)->cookie, BT463_REG_IREG_DATA, (val)); } while (0)

sys/dev/ic/bt463.c

160

#define BTWNREG(data, val) (data)->ramdac_wr((data)->cookie, \

sys/dev/ic/bt463.c

161

BT463_REG_IREG_DATA, (val))

sys/dev/ic/bt463.c

510

u_int8_t val;

sys/dev/ic/bt463.c

514

val = BTRREG(data, i);

sys/dev/ic/bt463.c

515

printf(" $%04x %02x\n", i, val);

sys/dev/ic/bt463.c

519

val = BTRREG(data, 0x220);

sys/dev/ic/bt463.c

520

printf(" $%04x %02x\n", 0x220, val);

sys/dev/ic/bt485.c

125

bt485_wr_i(struct bt485data *data, u_int8_t ireg, u_int8_t val)

sys/dev/ic/bt485.c

128

data->ramdac_wr(data->cookie, BT485_REG_EXTENDED, val);

sys/dev/ic/bwfm.c

1044

uint32_t val;

sys/dev/ic/bwfm.c

1053

val = sc->sc_buscore_ops->bc_read(sc,

sys/dev/ic/bwfm.c

1055

sc->sc_chip.ch_chip = BWFM_CHIP_CHIPID_ID(val);

sys/dev/ic/bwfm.c

1056

sc->sc_chip.ch_chiprev = BWFM_CHIP_CHIPID_REV(val);

sys/dev/ic/bwfm.c

1065

switch (BWFM_CHIP_CHIPID_TYPE(val))

sys/dev/ic/bwfm.c

1079

DEVNAME(sc), BWFM_CHIP_CHIPID_TYPE(val));

sys/dev/ic/bwfm.c

1202

uint32_t val;

sys/dev/ic/bwfm.c

1205

val = sc->sc_buscore_ops->bc_read(sc,

sys/dev/ic/bwfm.c

1207

if ((val & BWFM_AGENT_RESET_CTL_RESET) == 0) {

sys/dev/ic/bwfm.c

1267

uint32_t erom, val, base, wrap;

sys/dev/ic/bwfm.c

1276

val = sc->sc_buscore_ops->bc_read(sc, erom);

sys/dev/ic/bwfm.c

1277

type = val & BWFM_DMP_DESC_MASK;

sys/dev/ic/bwfm.c

1283

id = (val & BWFM_DMP_COMP_PARTNUM)

sys/dev/ic/bwfm.c

1286

val = sc->sc_buscore_ops->bc_read(sc, erom);

sys/dev/ic/bwfm.c

1287

type = val & BWFM_DMP_DESC_MASK;

sys/dev/ic/bwfm.c

1295

nmw = (val & BWFM_DMP_COMP_NUM_MWRAP)

sys/dev/ic/bwfm.c

1297

nsw = (val & BWFM_DMP_COMP_NUM_SWRAP)

sys/dev/ic/bwfm.c

1299

rev = (val & BWFM_DMP_COMP_REVISION)

sys/dev/ic/bwfm.c

1323

uint32_t val;

sys/dev/ic/bwfm.c

1328

val = sc->sc_buscore_ops->bc_read(sc, *erom);

sys/dev/ic/bwfm.c

1329

type = val & BWFM_DMP_DESC_MASK;

sys/dev/ic/bwfm.c

1331

mpnum = (val & BWFM_DMP_MASTER_PORT_NUM)

sys/dev/ic/bwfm.c

1343

val = sc->sc_buscore_ops->bc_read(sc, *erom);

sys/dev/ic/bwfm.c

1344

type = val & BWFM_DMP_DESC_MASK;

sys/dev/ic/bwfm.c

1356

sztype = (val & BWFM_DMP_SLAVE_SIZE_TYPE)

sys/dev/ic/bwfm.c

1359

val = sc->sc_buscore_ops->bc_read(sc, *erom);

sys/dev/ic/bwfm.c

1360

type = val & BWFM_DMP_DESC_MASK;

sys/dev/ic/bwfm.c

1369

stype = (val & BWFM_DMP_SLAVE_TYPE) >> BWFM_DMP_SLAVE_TYPE_S;

sys/dev/ic/bwfm.c

1371

*base = val & BWFM_DMP_SLAVE_ADDR_BASE;

sys/dev/ic/bwfm.c

1373

*wrap = val & BWFM_DMP_SLAVE_ADDR_BASE;

sys/dev/ic/bwfm.c

1426

uint32_t val;

sys/dev/ic/bwfm.c

1429

val = sc->sc_buscore_ops->bc_read(sc,

sys/dev/ic/bwfm.c

1432

val & BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,

sys/dev/ic/bwfm.c

1459

uint32_t val;

sys/dev/ic/bwfm.c

1462

val = sc->sc_buscore_ops->bc_read(sc,

sys/dev/ic/bwfm.c

1465

val & BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,

sys/dev/ic/bwi.c

10069

uint32_t val;

sys/dev/ic/bwi.c

10084

val = CSR_READ_4(sc, BWI_PLL_ON_DELAY);

sys/dev/ic/bwi.c

10085

sc->sc_pwron_delay = howmany((val + 2) * 1000000, freq.clkfreq_min);

sys/dev/ic/bwi.c

10151

uint32_t val, disable_bits;

sys/dev/ic/bwi.c

10154

val = CSR_READ_4(sc, BWI_STATE_LO);

sys/dev/ic/bwi.c

10156

if ((val & (BWI_STATE_LO_CLOCK |

sys/dev/ic/bwi.c

10300

uint32_t val;

sys/dev/ic/bwi.c

10311

n = sizeof(buf) / sizeof(val);

sys/dev/ic/bwi.c

10316

val = 0;

sys/dev/ic/bwi.c

10317

for (j = 0; j < sizeof(val); ++j)

sys/dev/ic/bwi.c

10318

val |= ((uint32_t)(*p++)) << (j * 8);

sys/dev/ic/bwi.c

10320

TMPLT_WRITE_4(mac, 0x20 + (i * sizeof(val)), val);

sys/dev/ic/bwi.c

1157

bwi_tmplt_write_4(struct bwi_mac *mac, uint32_t ofs, uint32_t val)

sys/dev/ic/bwi.c

1162

val = bswap32(val);

sys/dev/ic/bwi.c

1165

CSR_WRITE_4(sc, BWI_MAC_TMPLT_DATA, val);

sys/dev/ic/bwi.c

1171

uint64_t val;

sys/dev/ic/bwi.c

1173

val = flags & 0xffff;

sys/dev/ic/bwi.c

1174

MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO, val);

sys/dev/ic/bwi.c

1176

val = (flags >> 16) & 0xffff;

sys/dev/ic/bwi.c

1177

MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI, val);

sys/dev/ic/bwi.c

1185

uint64_t flags, val;

sys/dev/ic/bwi.c

1190

val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI);

sys/dev/ic/bwi.c

1191

flags |= val << 16;

sys/dev/ic/bwi.c

1193

val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO);

sys/dev/ic/bwi.c

1194

flags |= val;

sys/dev/ic/bwi.c

1588

uint32_t orig_val, val;

sys/dev/ic/bwi.c

1597

val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);

sys/dev/ic/bwi.c

1598

if (val != TEST_VAL1) {

sys/dev/ic/bwi.c

1599

aprint_error_dev(sc->sc_dev, "TEST1 failed [0x%08x]\n", val);

sys/dev/ic/bwi.c

1605

val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);

sys/dev/ic/bwi.c

1606

if (val != TEST_VAL2) {

sys/dev/ic/bwi.c

1607

aprint_error_dev(sc->sc_dev, "TEST2 failed [0x%08x]\n", val);

sys/dev/ic/bwi.c

1614

val = CSR_READ_4(sc, BWI_MAC_STATUS);

sys/dev/ic/bwi.c

1615

if ((val & ~BWI_MAC_STATUS_PHYLNK) != BWI_MAC_STATUS_IHREN) {

sys/dev/ic/bwi.c

1617

__func__, val);

sys/dev/ic/bwi.c

1621

val = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);

sys/dev/ic/bwi.c

1622

if (val != 0) {

sys/dev/ic/bwi.c

1624

__func__, val);

sys/dev/ic/bwi.c

2621

uint32_t val;

sys/dev/ic/bwi.c

2626

val = CSR_READ_4(sc, BWI_MAC_STATUS);

sys/dev/ic/bwi.c

2627

if (BWI_IS_PIO(sc) && (val & BWI_MAC_STATUS_BSWAP)) {

sys/dev/ic/bwi.c

2629

val &= ~BWI_MAC_STATUS_BSWAP;

sys/dev/ic/bwi.c

2630

CSR_WRITE_4(sc, BWI_MAC_STATUS, val);

sys/dev/ic/bwi.c

2631

val = CSR_READ_4(sc, BWI_MAC_STATUS);

sys/dev/ic/bwi.c

2633

if (val & BWI_MAC_STATUS_BSWAP) {

sys/dev/ic/bwi.c

2643

val = CSR_READ_4(sc, BWI_STATE_HI);

sys/dev/ic/bwi.c

2644

if (__SHIFTOUT(val, BWI_STATE_HI_FLAGS_MASK) &

sys/dev/ic/bwi.c

3064

uint16_t val;

sys/dev/ic/bwi.c

3068

val = CSR_READ_2(sc, BWI_PHYINFO);

sys/dev/ic/bwi.c

3069

phyrev = __SHIFTOUT(val, BWI_PHYINFO_REV_MASK);

sys/dev/ic/bwi.c

3070

phytype = __SHIFTOUT(val, BWI_PHYINFO_TYPE_MASK);

sys/dev/ic/bwi.c

3071

phyver = __SHIFTOUT(val, BWI_PHYINFO_VER_MASK);

sys/dev/ic/bwi.c

3247

uint16_t val;

sys/dev/ic/bwi.c

3249

val = PHY_READ(mac, 0x400) & 0xff;

sys/dev/ic/bwi.c

3250

if (val == 3 || val == 5) {

sys/dev/ic/bwi.c

3253

if (val == 5) {

sys/dev/ic/bwi.c

3346

uint16_t val, ofs;

sys/dev/ic/bwi.c

3356

for (ofs = 0, val = 0x3c3d; ofs < 30; ++ofs, val -= 0x202)

sys/dev/ic/bwi.c

3357

PHY_WRITE(mac, 0x89 + ofs, val);

sys/dev/ic/bwi.c

3423

uint16_t ofs, val;

sys/dev/ic/bwi.c

3425

val = 0x2120;

sys/dev/ic/bwi.c

3427

PHY_WRITE(mac, ofs, val);

sys/dev/ic/bwi.c

3428

val += 0x202;

sys/dev/ic/bwi.c

3517

uint16_t val, ofs;

sys/dev/ic/bwi.c

3555

val = 0x1e1f;

sys/dev/ic/bwi.c

3557

PHY_WRITE(mac, ofs, val);

sys/dev/ic/bwi.c

3558

val -= 0x202;

sys/dev/ic/bwi.c

3561

val = 0x3e3f;

sys/dev/ic/bwi.c

3563

PHY_WRITE(mac, ofs, val);

sys/dev/ic/bwi.c

3564

val -= 0x202;

sys/dev/ic/bwi.c

3567

val = 0x2120;

sys/dev/ic/bwi.c

3569

PHY_WRITE(mac, ofs, (val & 0x3f3f));

sys/dev/ic/bwi.c

3570

val += 0x202;

sys/dev/ic/bwi.c

3926

int16_t val;

sys/dev/ic/bwi.c

3929

val = (int16_t)__SHIFTOUT(PHY_READ(mac, 0x47f), NRSSI_11G_MASK);

sys/dev/ic/bwi.c

3930

if (val >= 32)

sys/dev/ic/bwi.c

3931

val -= 64;

sys/dev/ic/bwi.c

3933

return (val);

sys/dev/ic/bwi.c

4013

uint32_t val;

sys/dev/ic/bwi.c

4016

val = CSR_READ_2(sc, BWI_RF_DATA_HI);

sys/dev/ic/bwi.c

4017

val <<= 16;

sys/dev/ic/bwi.c

4020

val |= CSR_READ_2(sc, BWI_RF_DATA_LO);

sys/dev/ic/bwi.c

4022

manu = __SHIFTOUT(val, BWI_RFINFO_MANUFACT_MASK);

sys/dev/ic/bwi.c

4023

type = __SHIFTOUT(val, BWI_RFINFO_TYPE_MASK);

sys/dev/ic/bwi.c

4024

rev = __SHIFTOUT(val, BWI_RFINFO_REV_MASK);

sys/dev/ic/bwi.c

4403

uint16_t val;

sys/dev/ic/bwi.c

4405

val = (uint8_t)lo->ctrl_lo;

sys/dev/ic/bwi.c

4406

val |= ((uint8_t)lo->ctrl_hi) << 8;

sys/dev/ic/bwi.c

4408

PHY_WRITE(mac, BWI_PHYR_RF_LO, val);

sys/dev/ic/bwi.c

4425

bwi_bitswap4(uint16_t val)

sys/dev/ic/bwi.c

4429

ret = (val & 0x8) >> 3;

sys/dev/ic/bwi.c

4430

ret |= (val & 0x4) >> 1;

sys/dev/ic/bwi.c

4431

ret |= (val & 0x2) << 1;

sys/dev/ic/bwi.c

4432

ret |= (val & 0x1) << 3;

sys/dev/ic/bwi.c

4778

uint16_t val, calib;

sys/dev/ic/bwi.c

4781

val = RF_READ(mac, BWI_RFR_BBP_ATTEN);

sys/dev/ic/bwi.c

4782

idx = __SHIFTOUT(val, BWI_RFR_BBP_ATTEN_CALIB_IDX);

sys/dev/ic/bwi.c

4786

if (val & BWI_RFR_BBP_ATTEN_CALIB_BIT)

sys/dev/ic/bwi.c

4849

uint16_t sprom_ofs, val, mask;

sys/dev/ic/bwi.c

4860

val = bwi_read_sprom(sc, BWI_SPROM_MAX_TXPWR);

sys/dev/ic/bwi.c

4862

rf->rf_txpower_max = __SHIFTOUT(val,

sys/dev/ic/bwi.c

4865

rf->rf_txpower_max = __SHIFTOUT(val,

sys/dev/ic/bwi.c

4885

val = bwi_read_sprom(sc, BWI_SPROM_ANT_GAIN);

sys/dev/ic/bwi.c

4887

ant_gain = __SHIFTOUT(val, BWI_SPROM_ANT_GAIN_MASK_11A);

sys/dev/ic/bwi.c

4889

ant_gain = __SHIFTOUT(val, BWI_SPROM_ANT_GAIN_MASK_11BG);

sys/dev/ic/bwi.c

4977

val = bwi_read_sprom(sc, BWI_SPROM_IDLE_TSSI);

sys/dev/ic/bwi.c

4979

"sprom idle tssi: 0x%04x\n", val);

sys/dev/ic/bwi.c

4986

rf->rf_idle_tssi0 = (int)__SHIFTOUT(val, mask);

sys/dev/ic/bwi.c

5270

int val;

sys/dev/ic/bwi.c

5272

val = rf_atten * 2 + bbp_atten;

sys/dev/ic/bwi.c

5273

if (val > 14) {

sys/dev/ic/bwi.c

5275

if (val > 17)

sys/dev/ic/bwi.c

5277

if (val > 19)

sys/dev/ic/bwi.c

5859

int val;

sys/dev/ic/bwi.c

5861

val = (((i - d) * rf->rf_nrssi_slope) / 0x10000) + 0x3a;

sys/dev/ic/bwi.c

5862

if (val < 0)

sys/dev/ic/bwi.c

5863

val = 0;

sys/dev/ic/bwi.c

5864

else if (val > 0x3f)

sys/dev/ic/bwi.c

5865

val = 0x3f;

sys/dev/ic/bwi.c

5867

rf->rf_nrssi_table[i] = val;

sys/dev/ic/bwi.c

5877

int16_t val;

sys/dev/ic/bwi.c

5879

val = bwi_nrssi_read(mac, i);

sys/dev/ic/bwi.c

5881

val -= adjust;

sys/dev/ic/bwi.c

5882

if (val < -32)

sys/dev/ic/bwi.c

5883

val = -32;

sys/dev/ic/bwi.c

5884

else if (val > 31)

sys/dev/ic/bwi.c

5885

val = 31;

sys/dev/ic/bwi.c

5887

bwi_nrssi_write(mac, i, val);

sys/dev/ic/bwi.c

5932

_nrssi_threshold(const struct bwi_rf *rf, int32_t val)

sys/dev/ic/bwi.c

5934

val *= (rf->rf_nrssi[1] - rf->rf_nrssi[0]);

sys/dev/ic/bwi.c

5935

val += (rf->rf_nrssi[0] << 6);

sys/dev/ic/bwi.c

5936

if (val < 32)

sys/dev/ic/bwi.c

5937

val += 31;

sys/dev/ic/bwi.c

5939

val += 32;

sys/dev/ic/bwi.c

5940

val >>= 6;

sys/dev/ic/bwi.c

5941

if (val < -31)

sys/dev/ic/bwi.c

5942

val = -31;

sys/dev/ic/bwi.c

5943

else if (val > 31)

sys/dev/ic/bwi.c

5944

val = 31;

sys/dev/ic/bwi.c

5946

return (val);

sys/dev/ic/bwi.c

5995

uint16_t val;

sys/dev/ic/bwi.c

5998

val = __SHIFTIN(BWI_INVALID_TSSI, BWI_LO_TSSI_MASK) |

sys/dev/ic/bwi.c

6003

BWI_COMM_MOBJ_TSSI_DS + (i * 2), val);

sys/dev/ic/bwi.c

6008

BWI_COMM_MOBJ_TSSI_OFDM + (i * 2), val);

sys/dev/ic/bwi.c

6063

uint16_t val;

sys/dev/ic/bwi.c

6074

val = BWI_ANT_MODE_AUTO;

sys/dev/ic/bwi.c

6076

val = ant_mode;

sys/dev/ic/bwi.c

6077

val <<= 7;

sys/dev/ic/bwi.c

6078

PHY_FILT_SETBITS(mac, 0x3e2, 0xfe7f, val);

sys/dev/ic/bwi.c

6081

val = ant_mode << 7;

sys/dev/ic/bwi.c

6082

PHY_FILT_SETBITS(mac, 0x401, 0x7e7f, val);

sys/dev/ic/bwi.c

6115

val = ant_mode << 8;

sys/dev/ic/bwi.c

6117

0xfc3f, val);

sys/dev/ic/bwi.c

6119

0xfc3f, val);

sys/dev/ic/bwi.c

6121

0xfc3f, val);

sys/dev/ic/bwi.c

6140

uint16_t val;

sys/dev/ic/bwi.c

6142

val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, ofs + i);

sys/dev/ic/bwi.c

6143

tssi[i++] = (int8_t)__SHIFTOUT(val, BWI_LO_TSSI_MASK);

sys/dev/ic/bwi.c

6144

tssi[i++] = (int8_t)__SHIFTOUT(val, BWI_HI_TSSI_MASK);

sys/dev/ic/bwi.c

6318

uint16_t val;

sys/dev/ic/bwi.c

6321

val = 0;

sys/dev/ic/bwi.c

6330

val += PHY_READ(mac, 0x2c);

sys/dev/ic/bwi.c

6333

return (val);

sys/dev/ic/bwi.c

6342

uint16_t rf_val, phy_val, min_val, val;

sys/dev/ic/bwi.c

6400

val = bwi_rf_lo_measure_11b(mac) / 10;

sys/dev/ic/bwi.c

6401

if (val < min_val) {

sys/dev/ic/bwi.c

6402

min_val = val;

sys/dev/ic/bwi.c

6425

val = bwi_rf_lo_measure_11b(mac) / 10;

sys/dev/ic/bwi.c

6426

if (val < min_val) {

sys/dev/ic/bwi.c

6427

min_val = val;

sys/dev/ic/bwi.c

6615

uint32_t val;

sys/dev/ic/bwi.c

6617

val = CSR_READ_4(sc, BWI_ID_HI);

sys/dev/ic/bwi.c

6618

*type = BWI_ID_HI_REGWIN_TYPE(val);

sys/dev/ic/bwi.c

6619

*rev = BWI_ID_HI_REGWIN_REV(val);

sys/dev/ic/bwi.c

6623

__SHIFTOUT(val, BWI_ID_HI_REGWIN_VENDOR_MASK));

sys/dev/ic/bwi.c

6630

uint16_t gpio, val[BWI_LED_MAX];

sys/dev/ic/bwi.c

6643

val[0] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_0);

sys/dev/ic/bwi.c

6644

val[1] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_1);

sys/dev/ic/bwi.c

6647

val[2] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_2);

sys/dev/ic/bwi.c

6648

val[3] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_3);

sys/dev/ic/bwi.c

6653

if (val[i] == 0xff) {

sys/dev/ic/bwi.c

6656

if (val[i] & BWI_LED_ACT_LOW)

sys/dev/ic/bwi.c

6658

led->l_act = __SHIFTOUT(val[i], BWI_LED_ACT_MASK);

sys/dev/ic/bwi.c

6686

bwi_led_onoff(const struct bwi_led *led, uint16_t val, int on)

sys/dev/ic/bwi.c

6691

val |= led->l_mask;

sys/dev/ic/bwi.c

6693

val &= ~led->l_mask;

sys/dev/ic/bwi.c

6695

return (val);

sys/dev/ic/bwi.c

6703

uint16_t val;

sys/dev/ic/bwi.c

6714

val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);

sys/dev/ic/bwi.c

6754

val = bwi_led_onoff(led, val, on);

sys/dev/ic/bwi.c

6756

CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);

sys/dev/ic/bwi.c

6798

uint16_t val;

sys/dev/ic/bwi.c

6800

val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);

sys/dev/ic/bwi.c

6801

val = bwi_led_onoff(led, val, 1);

sys/dev/ic/bwi.c

6802

CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);

sys/dev/ic/bwi.c

6819

uint16_t val;

sys/dev/ic/bwi.c

6821

val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);

sys/dev/ic/bwi.c

6822

val = bwi_led_onoff(sc->sc_blink_led, val, 0);

sys/dev/ic/bwi.c

6823

CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);

sys/dev/ic/bwi.c

6991

uint32_t val;

sys/dev/ic/bwi.c

7009

val = CSR_READ_4(sc, BWI_FLAGS);

sys/dev/ic/bwi.c

7015

CSR_SETBITS_4(sc, BWI_INTRVEC, (val & BWI_FLAGS_INTR_MASK));

sys/dev/ic/bwi.c

7025

val = (sc->sc_conf_read)(sc, BWI_PCIR_INTCTL);

sys/dev/ic/bwi.c

7026

val |= mac_mask << 8;

sys/dev/ic/bwi.c

7027

(sc->sc_conf_write)(sc, BWI_PCIR_INTCTL, val);

sys/dev/ic/bwi.c

7122

uint32_t val;

sys/dev/ic/bwi.c

7139

val = BWI_IS_SDIO(sc) ?

sys/dev/ic/bwi.c

7141

if (val & BWI_PCIM_GPIO_OUT_CLKSRC) {

sys/dev/ic/bwi.c

7149

val = CSR_READ_4(sc, BWI_CLOCK_CTRL);

sys/dev/ic/bwi.c

7151

src = __SHIFTOUT(val, BWI_CLOCK_CTRL_CLKSRC);

sys/dev/ic/bwi.c

7155

div = (__SHIFTOUT(val, BWI_CLOCK_CTRL_FDIV) + 1) << 2;

sys/dev/ic/bwi.c

7162

val = CSR_READ_4(sc, BWI_CLOCK_INFO);

sys/dev/ic/bwi.c

7165

div = (__SHIFTOUT(val, BWI_CLOCK_INFO_FDIV) + 1) << 2;

sys/dev/ic/bwi.c

8510

uint32_t val;

sys/dev/ic/bwi.c

8513

val = CSR_READ_4(sc, ctrl_base + BWI_RX32_CTRL);

sys/dev/ic/bwi.c

8514

val |= BWI_TXRX32_CTRL_ENABLE |

sys/dev/ic/bwi.c

8516

CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);

sys/dev/ic/bwi.c

8551

uint32_t val, addr_hi, addr_lo;

sys/dev/ic/bwi.c

8567

val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |

sys/dev/ic/bwi.c

8570

CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, val);

sys/dev/ic/bwi.c

8572

val = __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |

sys/dev/ic/bwi.c

8574

CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, val);

sys/dev/ic/bwi.c

8583

uint32_t val, addr_hi, addr_lo;

sys/dev/ic/bwi.c

8588

val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |

sys/dev/ic/bwi.c

8591

CSR_WRITE_4(sc, ctrl_base + BWI_RX32_RINGINFO, val);

sys/dev/ic/bwi.c

8593

val = __SHIFTIN(hdr_size, BWI_RX32_CTRL_HDRSZ_MASK) |

sys/dev/ic/bwi.c

8596

CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);

sys/dev/ic/bwi.c

9074

uint32_t val;

sys/dev/ic/bwi.c

9079

val = CSR_READ_4(sc, BWI_PIO_RXCTL(qid));

sys/dev/ic/bwi.c

9080

if ((val & BWI_PIO_RXCTL_FRAMERDY) == 0) {

sys/dev/ic/bwi.c

9088

val = CSR_READ_4(sc, BWI_PIO_RXCTL(qid));

sys/dev/ic/bwi.c

9089

if ((val & BWI_PIO_RXCTL_DATARDY) != 0) {

sys/dev/ic/bwi.c

9144

uint32_t val, rx_ctrl;

sys/dev/ic/bwi.c

9149

val = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);

sys/dev/ic/bwi.c

9150

end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /

sys/dev/ic/bwi.c

9240

uint32_t state, val;

sys/dev/ic/bwi.c

9249

val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);

sys/dev/ic/bwi.c

9250

state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);

sys/dev/ic/bwi.c

9264

val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);

sys/dev/ic/bwi.c

9265

state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);

sys/dev/ic/bwi.c

9903

uint32_t val, ctrl_base;

sys/dev/ic/bwi.c

9910

val = CSR_READ_4(sc, ctrl_base + BWI_RX32_STATUS);

sys/dev/ic/bwi.c

9911

end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /

sys/dev/ic/bwivar.h

758

_bwi_write_2(struct bwi_softc *sc, bus_size_t reg, uint16_t val)

sys/dev/ic/bwivar.h

761

sc->sc_reg_write_2(sc, reg, val);

sys/dev/ic/bwivar.h

763

bus_space_write_2(sc->sc_mem_bt, sc->sc_mem_bh, reg, val);

sys/dev/ic/bwivar.h

768

_bwi_write_4(struct bwi_softc *sc, bus_size_t reg, uint32_t val)

sys/dev/ic/bwivar.h

771

sc->sc_reg_write_4(sc, reg, val);

sys/dev/ic/bwivar.h

773

bus_space_write_4(sc->sc_mem_bt, sc->sc_mem_bh, reg, val);

sys/dev/ic/bwivar.h

804

#define MOBJ_WRITE_2(mac, objid, ofs, val) \

sys/dev/ic/bwivar.h

805

bwi_memobj_write_2((mac), (objid), (ofs), (val))

sys/dev/ic/bwivar.h

806

#define MOBJ_WRITE_4(mac, objid, ofs, val) \

sys/dev/ic/bwivar.h

807

bwi_memobj_write_4((mac), (objid), (ofs), (val))

sys/dev/ic/bwivar.h

824

#define TMPLT_WRITE_4(mac, ofs, val) bwi_tmplt_write_4((mac), (ofs), (val))

sys/dev/ic/bwivar.h

847

#define PHY_WRITE(mac, ctrl, val) bwi_phy_write((mac), (ctrl), (val))

sys/dev/ic/bwivar.h

87

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/ic/bwivar.h

88

_bwi_write_4(sc, reg, val)

sys/dev/ic/bwivar.h

89

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/ic/bwivar.h

90

_bwi_write_2(sc, reg, val)

sys/dev/ic/bwivar.h

902

#define RF_WRITE(mac, ofs, val) bwi_rf_write((mac), (ofs), (val))

sys/dev/ic/cacvar.h

51

#define cac_outb(sc, port, val) \

sys/dev/ic/cacvar.h

52

bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, port, val)

sys/dev/ic/cacvar.h

53

#define cac_outw(sc, port, val) \

sys/dev/ic/cacvar.h

54

bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, port, val)

sys/dev/ic/cacvar.h

55

#define cac_outl(sc, port, val) \

sys/dev/ic/cacvar.h

56

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, port, val)

sys/dev/ic/cdnsiic.c

165

uint32_t val;

sys/dev/ic/cdnsiic.c

169

val = RD4(sc, ISR_REG);

sys/dev/ic/cdnsiic.c

170

if ((val & ISR_COMP) != 0) {

sys/dev/ic/cdnsiic.c

183

uint32_t val;

sys/dev/ic/cdnsiic.c

192

val = RD4(sc, CR_REG);

sys/dev/ic/cdnsiic.c

193

val |= CR_CLR_FIFO;

sys/dev/ic/cdnsiic.c

194

val &= ~CR_RD_WR;

sys/dev/ic/cdnsiic.c

195

WR4(sc, CR_REG, val);

sys/dev/ic/cdnsiic.c

222

uint32_t val;

sys/dev/ic/cdnsiic.c

229

val = RD4(sc, CR_REG);

sys/dev/ic/cdnsiic.c

230

val |= CR_CLR_FIFO | CR_RD_WR;

sys/dev/ic/cdnsiic.c

231

WR4(sc, CR_REG, val);

sys/dev/ic/cdnsiic.c

254

uint32_t val;

sys/dev/ic/cdnsiic.c

257

val = RD4(sc, CR_REG);

sys/dev/ic/cdnsiic.c

258

WR4(sc, CR_REG, val | CR_HOLD);

sys/dev/ic/cdnsiic.c

273

val = RD4(sc, CR_REG);

sys/dev/ic/cdnsiic.c

274

WR4(sc, CR_REG, val & ~CR_HOLD);

sys/dev/ic/cdnsiic.c

90

#define WR4(sc, reg, val) \

sys/dev/ic/cdnsiic.c

91

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/clmpcc.c

164

clmpcc_wrreg(struct clmpcc_softc *sc, u_int offset, u_int val)

sys/dev/ic/clmpcc.c

171

bus_space_write_1(sc->sc_iot, sc->sc_ioh, offset, val);

sys/dev/ic/clmpcc.c

186

clmpcc_wrreg_odd(struct clmpcc_softc *sc, u_int offset, u_int val)

sys/dev/ic/clmpcc.c

193

bus_space_write_1(sc->sc_iot, sc->sc_ioh, offset, val);

sys/dev/ic/com.c

332

com_write_1(struct com_regs *regs, u_int reg, uint8_t val)

sys/dev/ic/com.c

334

bus_space_write_1(regs->cr_iot, regs->cr_ioh, reg, val);

sys/dev/ic/com.c

363

com_write_4(struct com_regs *regs, u_int reg, uint8_t val)

sys/dev/ic/com.c

365

bus_space_write_4(regs->cr_iot, regs->cr_ioh, reg, val);

sys/dev/ic/cs89x0var.h

237

#define CS_WRITE_PACKET_PAGE_IO(sc, offset, val) \

sys/dev/ic/cs89x0var.h

240

IO_WRITE_2((sc), PORT_PKTPG_DATA, (val)); \

sys/dev/ic/cs89x0var.h

243

#define CS_WRITE_PACKET_PAGE_MEM(sc, offset, val) \

sys/dev/ic/cs89x0var.h

244

MEM_WRITE_2((sc), (offset), (val))

sys/dev/ic/cs89x0var.h

246

#define CS_WRITE_PACKET_PAGE(sc, offset, val) \

sys/dev/ic/cs89x0var.h

249

CS_WRITE_PACKET_PAGE_MEM((sc), (offset), (val)); \

sys/dev/ic/cs89x0var.h

251

CS_WRITE_PACKET_PAGE_IO((sc), (offset), (val)); \

sys/dev/ic/cs89x0var.h

257

#define CS_WRITE_PORT(sc, off, val)\

sys/dev/ic/cs89x0var.h

258

IO_WRITE_2((sc), (off), (val))

sys/dev/ic/ct65550.c

132

chipsfb_write32(struct chipsfb_softc *sc, uint32_t reg, uint32_t val)

sys/dev/ic/ct65550.c

134

bus_space_write_4(sc->sc_memt, sc->sc_mmregh, reg, val);

sys/dev/ic/ct65550.c

144

chipsfb_write_vga(struct chipsfb_softc *sc, uint32_t reg, uint8_t val)

sys/dev/ic/ct65550.c

146

bus_space_write_1(sc->sc_iot, sc->sc_ioregh, reg, val);

sys/dev/ic/ct65550.c

165

uint8_t val)

sys/dev/ic/ct65550.c

169

chipsfb_write_vga(sc, reg | 0x0001, val);

sys/dev/ic/cyvar.h

37

#define cd_write_reg(sc,chip,reg,val) bus_space_write_1(sc->sc_memt, \

sys/dev/ic/cyvar.h

39

(((reg << 1))<< sc->sc_bustype), (val))

sys/dev/ic/depca.c

139

depca_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/ic/depca.c

144

bus_space_write_2(dsc->sc_iot, dsc->sc_ioh, DEPCA_RDP, val);

sys/dev/ic/depca.c

244

uint8_t val;

sys/dev/ic/depca.c

261

val = 0xff;

sys/dev/ic/depca.c

265

bus_space_set_region_1(dsc->sc_memt, dsc->sc_memh, 0, val,

sys/dev/ic/depca.c

269

if (cv != val) {

sys/dev/ic/depca.c

273

i, cv, val);

sys/dev/ic/depca.c

277

if (val == 0x00)

sys/dev/ic/depca.c

279

val -= 0x55;

sys/dev/ic/dl10019.c

214

dl10019_mii_bitbang_write(device_t self, u_int32_t val)

sys/dev/ic/dl10019.c

222

(val & ~DL0_GPIO_PRESERVE) | (gpio & DL0_GPIO_PRESERVE));

sys/dev/ic/dl10019.c

226

dl10019_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/dl10019.c

234

return mii_bitbang_readreg(self, ops, phy, reg, val);

sys/dev/ic/dl10019.c

238

dl10019_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/dl10019.c

246

return mii_bitbang_writereg(self, ops, phy, reg, val);

sys/dev/ic/dm9000.c

514

mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/dm9000.c

534

*val = dme_read(sc, DM9000_EPDRL) | (dme_read(sc, DM9000_EPDRH) << 8);

sys/dev/ic/dm9000.c

539

mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/dm9000.c

551

dme_write(sc, DM9000_EPDRL, val & 0xFF);

sys/dev/ic/dm9000.c

552

dme_write(sc, DM9000_EPDRH, (val >> 8) & 0xFF);

sys/dev/ic/dp8390var.h

153

#define NIC_PUT(t, h, reg, val) bus_space_write_1(t, h, \

sys/dev/ic/dp8390var.h

154

((sc)->sc_reg_map[reg]), (val))

sys/dev/ic/dp83932var.h

211

#define CSR_WRITE(sc, reg, val) \

sys/dev/ic/dp83932var.h

213

(sc)->sc_regmap[(reg)], (val))

sys/dev/ic/dp83932var.h

351

htosonic16(struct sonic_softc *sc, uint16_t val)

sys/dev/ic/dp83932var.h

355

return (htobe16(val));

sys/dev/ic/dp83932var.h

356

return (htole16(val));

sys/dev/ic/dp83932var.h

360

sonic16toh(struct sonic_softc *sc, uint16_t val)

sys/dev/ic/dp83932var.h

364

return (be16toh(val));

sys/dev/ic/dp83932var.h

365

return (le16toh(val));

sys/dev/ic/dp83932var.h

369

htosonic32(struct sonic_softc *sc, uint32_t val)

sys/dev/ic/dp83932var.h

373

return (htobe32(val));

sys/dev/ic/dp83932var.h

374

return (htole32(val));

sys/dev/ic/dp83932var.h

378

sonic32toh(struct sonic_softc *sc, uint32_t val)

sys/dev/ic/dp83932var.h

382

return (be32toh(val));

sys/dev/ic/dp83932var.h

383

return (le32toh(val));

sys/dev/ic/dw_hdmi.c

262

uint8_t block, operation, val;

sys/dev/ic/dw_hdmi.c

296

val = dwhdmi_read(sc, HDMI_IH_I2CM_STAT0);

sys/dev/ic/dw_hdmi.c

297

if (val & HDMI_IH_I2CM_STAT0_ERROR) {

sys/dev/ic/dw_hdmi.c

300

if (val & HDMI_IH_I2CM_STAT0_DONE) {

sys/dev/ic/dw_hdmi.c

301

dwhdmi_write(sc, HDMI_IH_I2CM_STAT0, val);

sys/dev/ic/dw_hdmi.c

320

uint8_t val;

sys/dev/ic/dw_hdmi.c

324

val = bus_space_read_1(sc->sc_bst, sc->sc_bsh, reg);

sys/dev/ic/dw_hdmi.c

327

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, reg * 4) & 0xff;

sys/dev/ic/dw_hdmi.c

330

val = 0;

sys/dev/ic/dw_hdmi.c

334

return val;

sys/dev/ic/dw_hdmi.c

338

dwhdmi_write(struct dwhdmi_softc *sc, bus_size_t reg, uint8_t val)

sys/dev/ic/dw_hdmi.c

342

bus_space_write_1(sc->sc_bst, sc->sc_bsh, reg, val);

sys/dev/ic/dw_hdmi.c

345

bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg * 4, val);

sys/dev/ic/dw_hdmi.c

353

uint8_t val;

sys/dev/ic/dw_hdmi.c

356

val = __SHIFTIN(HDMI_VP_PR_CD_COLOR_DEPTH_24, HDMI_VP_PR_CD_COLOR_DEPTH) |

sys/dev/ic/dw_hdmi.c

358

dwhdmi_write(sc, HDMI_VP_PR_CD, val);

sys/dev/ic/dw_hdmi.c

361

val = HDMI_VP_STUFF_IDEFAULT_PHASE |

sys/dev/ic/dw_hdmi.c

365

dwhdmi_write(sc, HDMI_VP_STUFF, val);

sys/dev/ic/dw_hdmi.c

368

val = __SHIFTIN(HDMI_VP_REMAP_YCC422_SIZE_16, HDMI_VP_REMAP_YCC422_SIZE);

sys/dev/ic/dw_hdmi.c

369

dwhdmi_write(sc, HDMI_VP_REMAP, val);

sys/dev/ic/dw_hdmi.c

372

val = HDMI_VP_CONF_BYPASS_EN |

sys/dev/ic/dw_hdmi.c

375

dwhdmi_write(sc, HDMI_VP_CONF, val);

sys/dev/ic/dw_hdmi.c

381

uint8_t val;

sys/dev/ic/dw_hdmi.c

384

val = __SHIFTIN(HDMI_TX_INVID0_VIDEO_MAPPING_DEFAULT, HDMI_TX_INVID0_VIDEO_MAPPING);

sys/dev/ic/dw_hdmi.c

385

dwhdmi_write(sc, HDMI_TX_INVID0, val);

sys/dev/ic/dw_hdmi.c

388

val = HDMI_TX_INSTUFFING_BCBDATA_STUFFING |

sys/dev/ic/dw_hdmi.c

391

dwhdmi_write(sc, HDMI_TX_INSTUFFING, val);

sys/dev/ic/dw_hdmi.c

411

uint8_t val;

sys/dev/ic/dw_hdmi.c

424

val = HDMI_FC_INVIDCONF_DE_IN_POLARITY;

sys/dev/ic/dw_hdmi.c

426

val |= HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY;

sys/dev/ic/dw_hdmi.c

428

val |= HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY;

sys/dev/ic/dw_hdmi.c

430

val |= HDMI_FC_INVIDCONF_IN_I_P;

sys/dev/ic/dw_hdmi.c

432

val |= HDMI_FC_INVIDCONF_DVI_MODE;

sys/dev/ic/dw_hdmi.c

434

val |= HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC;

sys/dev/ic/dw_hdmi.c

435

dwhdmi_write(sc, HDMI_FC_INVIDCONF, val);

sys/dev/ic/dw_hdmi.c

466

uint8_t val;

sys/dev/ic/dw_hdmi.c

473

val = HDMI_MC_CLKDIS_HDCPCLK_DISABLE |

sys/dev/ic/dw_hdmi.c

477

dwhdmi_write(sc, HDMI_MC_CLKDIS, val);

sys/dev/ic/dw_hdmi.c

480

val = 0xff & ~HDMI_MC_SWRSTZREQ_TMDSSWRST_REQ;

sys/dev/ic/dw_hdmi.c

481

dwhdmi_write(sc, HDMI_MC_SWRSTZREQ, val);

sys/dev/ic/dw_hdmi.c

485

val = dwhdmi_read(sc, HDMI_FC_INVIDCONF);

sys/dev/ic/dw_hdmi.c

487

dwhdmi_write(sc, HDMI_FC_INVIDCONF, val);

sys/dev/ic/dw_hdmi.c

500

uint8_t val;

sys/dev/ic/dw_hdmi.c

529

val = dwhdmi_read(sc, HDMI_AUD_CONF0);

sys/dev/ic/dw_hdmi.c

530

val |= HDMI_AUD_CONF0_I2S_SELECT; /* XXX i2s mode */

sys/dev/ic/dw_hdmi.c

531

val &= ~HDMI_AUD_CONF0_I2S_IN_EN;

sys/dev/ic/dw_hdmi.c

532

val |= __SHIFTIN(1, HDMI_AUD_CONF0_I2S_IN_EN); /* XXX 2ch */

sys/dev/ic/dw_hdmi.c

533

dwhdmi_write(sc, HDMI_AUD_CONF0, val);

sys/dev/ic/dw_hdmi.c

535

val = __SHIFTIN(16, HDMI_AUD_CONF1_I2S_WIDTH);

sys/dev/ic/dw_hdmi.c

536

dwhdmi_write(sc, HDMI_AUD_CONF1, val);

sys/dev/ic/dw_hdmi.c

545

val = dwhdmi_read(sc, HDMI_MC_CLKDIS);

sys/dev/ic/dw_hdmi.c

546

val &= ~HDMI_MC_CLKDIS_PREPCLK_DISABLE;

sys/dev/ic/dw_hdmi.c

547

dwhdmi_write(sc, HDMI_MC_CLKDIS, val);

sys/dev/ic/dw_hdmi.c

843

uint8_t val;

sys/dev/ic/dw_hdmi.c

878

val = dwhdmi_read(sc, HDMI_PHY_CONF0);

sys/dev/ic/dw_hdmi.c

879

val |= HDMI_PHY_CONF0_ENHPDRXSENSE;

sys/dev/ic/dw_hdmi.c

880

dwhdmi_write(sc, HDMI_PHY_CONF0, val);

sys/dev/ic/dw_hdmi_phy.c

151

uint8_t val;

sys/dev/ic/dw_hdmi_phy.c

153

val = dwhdmi_read(sc, HDMI_IH_I2CMPHY_STAT0) &

sys/dev/ic/dw_hdmi_phy.c

155

while (val == 0) {

sys/dev/ic/dw_hdmi_phy.c

160

val = dwhdmi_read(sc, HDMI_IH_I2CMPHY_STAT0) &

sys/dev/ic/dw_hdmi_phy.c

260

uint8_t val;

sys/dev/ic/dw_hdmi_phy.c

262

val = dwhdmi_read(sc, HDMI_PHY_TST0);

sys/dev/ic/dw_hdmi_phy.c

263

val &= ~HDMI_PHY_TST0_TSTCLR_MASK;

sys/dev/ic/dw_hdmi_phy.c

264

val |= (bit << HDMI_PHY_TST0_TSTCLR_OFFSET) &

sys/dev/ic/dw_hdmi_phy.c

266

dwhdmi_write(sc, HDMI_PHY_TST0, val);

sys/dev/ic/dw_hdmi_phy.c

274

uint8_t val;

sys/dev/ic/dw_hdmi_phy.c

344

val = dwhdmi_read(sc, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;

sys/dev/ic/dw_hdmi_phy.c

345

while (val == 0) {

sys/dev/ic/dw_hdmi_phy.c

351

val = dwhdmi_read(sc, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;

sys/dev/ic/dw_hdmi_phy.c

377

uint8_t val;

sys/dev/ic/dw_hdmi_phy.c

379

val = dwhdmi_read(sc, HDMI_PHY_STAT0);

sys/dev/ic/dw_hdmi_phy.c

381

return ((val & HDMI_PHY_STAT0_HPD) != 0) ?

sys/dev/ic/dwc_eqos.c

118

#define WR4(sc, reg, val) \

sys/dev/ic/dwc_eqos.c

119

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/dwc_eqos.c

142

eqos_mii_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/ic/dwc_eqos.c

1543

uint32_t val;

sys/dev/ic/dwc_eqos.c

1546

val = RD4(sc, GMAC_DMA_SYSBUS_MODE);

sys/dev/ic/dwc_eqos.c

1550

val |= GMAC_DMA_SYSBUS_MODE_MB;

sys/dev/ic/dwc_eqos.c

1553

val |= GMAC_DMA_SYSBUS_MODE_FB;

sys/dev/ic/dwc_eqos.c

1556

val &= ~GMAC_DMA_SYSBUS_MODE_WR_OSR_LMT_MASK;

sys/dev/ic/dwc_eqos.c

1557

val |= (uival << GMAC_DMA_SYSBUS_MODE_WR_OSR_LMT_SHIFT) &

sys/dev/ic/dwc_eqos.c

1561

val &= ~GMAC_DMA_SYSBUS_MODE_RD_OSR_LMT_MASK;

sys/dev/ic/dwc_eqos.c

1562

val |= (uival << GMAC_DMA_SYSBUS_MODE_RD_OSR_LMT_SHIFT) &

sys/dev/ic/dwc_eqos.c

1567

val |= GMAC_DMA_SYSBUS_MODE_EAME;

sys/dev/ic/dwc_eqos.c

1574

val |= GMAC_DMA_SYSBUS_MODE_BLEN16;

sys/dev/ic/dwc_eqos.c

1575

val |= GMAC_DMA_SYSBUS_MODE_BLEN8;

sys/dev/ic/dwc_eqos.c

1576

val |= GMAC_DMA_SYSBUS_MODE_BLEN4;

sys/dev/ic/dwc_eqos.c

1578

WR4(sc, GMAC_DMA_SYSBUS_MODE, val);

sys/dev/ic/dwc_eqos.c

158

*val = RD4(sc, GMAC_MAC_MDIO_DATA) & 0xFFFF;

sys/dev/ic/dwc_eqos.c

172

eqos_mii_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/ic/dwc_eqos.c

178

WR4(sc, GMAC_MAC_MDIO_DATA, val);

sys/dev/ic/dwc_eqos.c

558

uint32_t val;

sys/dev/ic/dwc_eqos.c

630

val = eaddr[4] | (eaddr[5] << 8);

sys/dev/ic/dwc_eqos.c

631

val = __SHIFTIN(val, GMAC_MAC_ADDRESS_HIGH_ADDR)

sys/dev/ic/dwc_eqos.c

633

WR4(sc, GMAC_MAC_ADDRESS0_HIGH, val);

sys/dev/ic/dwc_eqos.c

634

val = eaddr[0] | (eaddr[1] << 8) | (eaddr[2] << 16) |

sys/dev/ic/dwc_eqos.c

636

WR4(sc, GMAC_MAC_ADDRESS0_LOW, val);

sys/dev/ic/dwc_eqos.c

654

uint32_t val;

sys/dev/ic/dwc_eqos.c

658

val = RD4(sc, GMAC_MAC_CONFIGURATION);

sys/dev/ic/dwc_eqos.c

662

val |= GMAC_MAC_CONFIGURATION_IPC;

sys/dev/ic/dwc_eqos.c

664

val &= ~GMAC_MAC_CONFIGURATION_IPC;

sys/dev/ic/dwc_eqos.c

666

WR4(sc, GMAC_MAC_CONFIGURATION, val);

sys/dev/ic/dwc_eqos.c

672

uint32_t val;

sys/dev/ic/dwc_eqos.c

678

val = RD4(sc, GMAC_DMA_MODE);

sys/dev/ic/dwc_eqos.c

679

if ((val & GMAC_DMA_MODE_SWR) == 0) {

sys/dev/ic/dwc_eqos.c

724

uint32_t val, tqs, rqs;

sys/dev/ic/dwc_eqos.c

753

val = RD4(sc, GMAC_DMA_CHAN0_CONTROL);

sys/dev/ic/dwc_eqos.c

754

val &= ~GMAC_DMA_CHAN0_CONTROL_DSL_MASK;

sys/dev/ic/dwc_eqos.c

755

val |= ((DESC_ALIGN - 16) / 8) << GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT;

sys/dev/ic/dwc_eqos.c

756

val |= GMAC_DMA_CHAN0_CONTROL_PBLX8;

sys/dev/ic/dwc_eqos.c

757

WR4(sc, GMAC_DMA_CHAN0_CONTROL, val);

sys/dev/ic/dwc_eqos.c

758

val = RD4(sc, GMAC_DMA_CHAN0_TX_CONTROL);

sys/dev/ic/dwc_eqos.c

759

val &= ~GMAC_DMA_CHAN0_TX_CONTROL_TXPBL_MASK;

sys/dev/ic/dwc_eqos.c

760

val |= (sc->sc_dma_txpbl << GMAC_DMA_CHAN0_TX_CONTROL_TXPBL_SHIFT);

sys/dev/ic/dwc_eqos.c

761

val |= GMAC_DMA_CHAN0_TX_CONTROL_OSP;

sys/dev/ic/dwc_eqos.c

762

val |= GMAC_DMA_CHAN0_TX_CONTROL_START;

sys/dev/ic/dwc_eqos.c

763

WR4(sc, GMAC_DMA_CHAN0_TX_CONTROL, val);

sys/dev/ic/dwc_eqos.c

764

val = RD4(sc, GMAC_DMA_CHAN0_RX_CONTROL);

sys/dev/ic/dwc_eqos.c

765

val &= ~(GMAC_DMA_CHAN0_RX_CONTROL_RBSZ_MASK |

sys/dev/ic/dwc_eqos.c

767

val |= (MCLBYTES << GMAC_DMA_CHAN0_RX_CONTROL_RBSZ_SHIFT);

sys/dev/ic/dwc_eqos.c

768

val |= (sc->sc_dma_rxpbl << GMAC_DMA_CHAN0_RX_CONTROL_RXPBL_SHIFT);

sys/dev/ic/dwc_eqos.c

769

val |= GMAC_DMA_CHAN0_RX_CONTROL_START;

sys/dev/ic/dwc_eqos.c

770

WR4(sc, GMAC_DMA_CHAN0_RX_CONTROL, val);

sys/dev/ic/dwc_eqos.c

793

val = RD4(sc, GMAC_MTL_TXQ0_OPERATION_MODE);

sys/dev/ic/dwc_eqos.c

794

val &= ~GMAC_MTL_TXQ0_OPERATION_MODE_TQS;

sys/dev/ic/dwc_eqos.c

795

val |= __SHIFTIN(tqs, GMAC_MTL_TXQ0_OPERATION_MODE_TQS);

sys/dev/ic/dwc_eqos.c

796

WR4(sc, GMAC_MTL_TXQ0_OPERATION_MODE, val);

sys/dev/ic/dwc_eqos.c

800

val = RD4(sc, GMAC_MTL_RXQ0_OPERATION_MODE);

sys/dev/ic/dwc_eqos.c

801

val &= ~GMAC_MTL_RXQ0_OPERATION_MODE_RQS;

sys/dev/ic/dwc_eqos.c

802

val |= __SHIFTIN(rqs, GMAC_MTL_RXQ0_OPERATION_MODE_RQS);

sys/dev/ic/dwc_eqos.c

803

WR4(sc, GMAC_MTL_RXQ0_OPERATION_MODE, val);

sys/dev/ic/dwc_eqos.c

813

val = __SHIFTIN(GMAC_RXQ_CTRL0_EN_DCB, GMAC_RXQ_CTRL0_EN_MASK);

sys/dev/ic/dwc_eqos.c

814

WR4(sc, GMAC_RXQ_CTRL0, val);

sys/dev/ic/dwc_eqos.c

817

val = RD4(sc, GMAC_MAC_CONFIGURATION);

sys/dev/ic/dwc_eqos.c

818

val |= GMAC_MAC_CONFIGURATION_BE;

sys/dev/ic/dwc_eqos.c

819

val |= GMAC_MAC_CONFIGURATION_JD;

sys/dev/ic/dwc_eqos.c

820

val |= GMAC_MAC_CONFIGURATION_JE;

sys/dev/ic/dwc_eqos.c

821

val |= GMAC_MAC_CONFIGURATION_DCRS;

sys/dev/ic/dwc_eqos.c

822

val |= GMAC_MAC_CONFIGURATION_TE;

sys/dev/ic/dwc_eqos.c

823

val |= GMAC_MAC_CONFIGURATION_RE;

sys/dev/ic/dwc_eqos.c

824

WR4(sc, GMAC_MAC_CONFIGURATION, val);

sys/dev/ic/dwc_eqos.c

860

uint32_t val;

sys/dev/ic/dwc_eqos.c

874

val = RD4(sc, GMAC_MAC_CONFIGURATION);

sys/dev/ic/dwc_eqos.c

875

val &= ~GMAC_MAC_CONFIGURATION_RE;

sys/dev/ic/dwc_eqos.c

876

WR4(sc, GMAC_MAC_CONFIGURATION, val);

sys/dev/ic/dwc_eqos.c

879

val = RD4(sc, GMAC_DMA_CHAN0_RX_CONTROL);

sys/dev/ic/dwc_eqos.c

880

val &= ~GMAC_DMA_CHAN0_RX_CONTROL_START;

sys/dev/ic/dwc_eqos.c

881

WR4(sc, GMAC_DMA_CHAN0_RX_CONTROL, val);

sys/dev/ic/dwc_eqos.c

884

val = RD4(sc, GMAC_DMA_CHAN0_TX_CONTROL);

sys/dev/ic/dwc_eqos.c

885

val &= ~GMAC_DMA_CHAN0_TX_CONTROL_START;

sys/dev/ic/dwc_eqos.c

886

WR4(sc, GMAC_DMA_CHAN0_TX_CONTROL, val);

sys/dev/ic/dwc_eqos.c

890

val = RD4(sc, GMAC_MTL_TXQ0_OPERATION_MODE);

sys/dev/ic/dwc_eqos.c

891

val |= GMAC_MTL_TXQ0_OPERATION_MODE_FTQ;

sys/dev/ic/dwc_eqos.c

892

WR4(sc, GMAC_MTL_TXQ0_OPERATION_MODE, val);

sys/dev/ic/dwc_eqos.c

895

val = RD4(sc, GMAC_MTL_TXQ0_OPERATION_MODE);

sys/dev/ic/dwc_eqos.c

896

if ((val & GMAC_MTL_TXQ0_OPERATION_MODE_FTQ) == 0) {

sys/dev/ic/dwc_eqos.c

908

val = RD4(sc, GMAC_MAC_CONFIGURATION);

sys/dev/ic/dwc_eqos.c

909

val &= ~GMAC_MAC_CONFIGURATION_TE;

sys/dev/ic/dwc_eqos.c

910

WR4(sc, GMAC_MAC_CONFIGURATION, val);

sys/dev/ic/dwc_gmac.c

265

uint32_t val;

sys/dev/ic/dwc_gmac.c

268

val = 0xffffffff;

sys/dev/ic/dwc_gmac.c

270

GMAC_MMC_RX_INT_MSK, val);

sys/dev/ic/dwc_gmac.c

272

GMAC_MMC_TX_INT_MSK, val);

sys/dev/ic/dwc_gmac.c

413

dwc_gmac_miibus_read_reg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/dwc_gmac.c

430

*val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,

sys/dev/ic/dwc_gmac.c

446

dwc_gmac_miibus_write_reg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/dwc_gmac.c

458

bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_MAC_MIIDATA, val);

sys/dev/ic/dwc_mmc.c

477

uint32_t val;

sys/dev/ic/dwc_mmc.c

552

val = MMC_READ(sc, DWC_MMC_GCTRL);

sys/dev/ic/dwc_mmc.c

553

val |= DWC_MMC_GCTRL_DMAEN;

sys/dev/ic/dwc_mmc.c

554

MMC_WRITE(sc, DWC_MMC_GCTRL, val);

sys/dev/ic/dwc_mmc.c

555

val |= DWC_MMC_GCTRL_DMARESET;

sys/dev/ic/dwc_mmc.c

556

MMC_WRITE(sc, DWC_MMC_GCTRL, val);

sys/dev/ic/dwc_mmc.c

559

val = DWC_MMC_IDST_RECEIVE_INT;

sys/dev/ic/dwc_mmc.c

561

val = 0;

sys/dev/ic/dwc_mmc.c

562

MMC_WRITE(sc, DWC_MMC_IDIE, val);

sys/dev/ic/dwc_mmc.c

80

#define MMC_WRITE(sc, reg, val) \

sys/dev/ic/dwc_mmc.c

81

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/dwc_mmc.c

835

uint32_t val;

sys/dev/ic/dwc_mmc.c

837

val = MMC_READ(sc, DWC_MMC_VERID);

sys/dev/ic/dwc_mmc.c

838

sc->sc_verid = __SHIFTOUT(val, DWC_MMC_VERID_ID);

sys/dev/ic/dwc_mmc.c

858

val = MMC_READ(sc, DWC_MMC_FIFOTH);

sys/dev/ic/dwc_mmc.c

859

sc->sc_fifo_depth = __SHIFTOUT(val, DWC_MMC_FIFOTH_RX_WMARK) + 1;

sys/dev/ic/dwc_wdt.c

86

#define WR4(sc, reg, val) \

sys/dev/ic/dwc_wdt.c

87

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/dwiic.c

262

dwiic_write(struct dwiic_softc *sc, int offset, uint32_t val)

sys/dev/ic/dwiic.c

264

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);

sys/dev/ic/dwiic.c

267

val));

sys/dev/ic/elink3.c

2027

ep_mii_bitbang_write(device_t self, u_int32_t val)

sys/dev/ic/elink3.c

2033

ELINK_W4_BOOM_PHYSMGMT, val);

sys/dev/ic/elink3.c

2037

ep_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/elink3.c

2044

rv = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg, val);

sys/dev/ic/elink3.c

2052

ep_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/elink3.c

2059

rv = mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val);

sys/dev/ic/elinkxl.c

1558

uint16_t val = GLOBAL_RESET;

sys/dev/ic/elinkxl.c

1561

val |= 0x10;

sys/dev/ic/elinkxl.c

1562

bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val);

sys/dev/ic/elinkxl.c

170

uint16_t val;

sys/dev/ic/elinkxl.c

183

val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0);

sys/dev/ic/elinkxl.c

184

macaddr[0] = val >> 8;

sys/dev/ic/elinkxl.c

185

macaddr[1] = val & 0xff;

sys/dev/ic/elinkxl.c

186

val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1);

sys/dev/ic/elinkxl.c

187

macaddr[2] = val >> 8;

sys/dev/ic/elinkxl.c

188

macaddr[3] = val & 0xff;

sys/dev/ic/elinkxl.c

1884

ex_mii_bitbang_write(device_t self, uint32_t val)

sys/dev/ic/elinkxl.c

1889

bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val);

sys/dev/ic/elinkxl.c

189

val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2);

sys/dev/ic/elinkxl.c

1893

ex_mii_readreg(device_t v, int phy, int reg, uint16_t *val)

sys/dev/ic/elinkxl.c

190

macaddr[4] = val >> 8;

sys/dev/ic/elinkxl.c

1903

rv = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg, val);

sys/dev/ic/elinkxl.c

191

macaddr[5] = val & 0xff;

sys/dev/ic/elinkxl.c

1911

ex_mii_writereg(device_t v, int phy, int reg, uint16_t val)

sys/dev/ic/elinkxl.c

1918

rv = mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, val);

sys/dev/ic/elinkxl.c

198

val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS);

sys/dev/ic/elinkxl.c

200

val |= ELINK_RESET_OPT_LEDPOLAR;

sys/dev/ic/elinkxl.c

202

val |= ELINK_RESET_OPT_PHYPOWER;

sys/dev/ic/elinkxl.c

203

bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val);

sys/dev/ic/elinkxl.c

366

val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);

sys/dev/ic/elinkxl.c

367

if (val & ELINK_MEDIACAP_MII)

sys/dev/ic/elinkxl.c

388

ex_set_xcvr(sc, val);

sys/dev/ic/elinkxl.c

620

uint16_t val;

sys/dev/ic/elinkxl.c

633

val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS);

sys/dev/ic/elinkxl.c

635

val |= ELINK_RESET_OPT_PHYPOWER; /* turn on PHY power */

sys/dev/ic/elinkxl.c

637

val |= ELINK_RESET_OPT_LEDPOLAR; /* invert LED polarity */

sys/dev/ic/elinkxl.c

638

bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val);

sys/dev/ic/elinkxl.c

919

uint16_t val;

sys/dev/ic/elinkxl.c

922

val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);

sys/dev/ic/elinkxl.c

923

ex_set_xcvr(sc, val);

sys/dev/ic/esiop.c

132

esiop_script_write(struct esiop_softc *sc, u_int offset, uint32_t val)

sys/dev/ic/esiop.c

137

offset * 4, val);

sys/dev/ic/esiop.c

139

sc->sc_c.sc_script[offset] = htole32(val);

sys/dev/ic/gcscpcib.c

397

int n, reg[7], val[7], nreg = 0, off = 0;

sys/dev/ic/gcscpcib.c

406

val[nreg++] = 1 << pin;

sys/dev/ic/gcscpcib.c

408

val[nreg++] = 1 << (pin + 16);

sys/dev/ic/gcscpcib.c

412

val[nreg++] = 1 << pin;

sys/dev/ic/gcscpcib.c

414

val[nreg++] = 1 << (pin + 16);

sys/dev/ic/gcscpcib.c

418

val[nreg++] = 1 << pin;

sys/dev/ic/gcscpcib.c

420

val[nreg++] = 1 << (pin + 16);

sys/dev/ic/gcscpcib.c

424

val[nreg++] = 1 << pin;

sys/dev/ic/gcscpcib.c

426

val[nreg++] = 1 << (pin + 16);

sys/dev/ic/gcscpcib.c

430

val[nreg++] = 1 << pin;

sys/dev/ic/gcscpcib.c

432

val[nreg++] = 1 << (pin + 16);

sys/dev/ic/gcscpcib.c

436

val[nreg++] = 1 << pin;

sys/dev/ic/gcscpcib.c

438

val[nreg++] = 1 << (pin + 16);

sys/dev/ic/gcscpcib.c

442

val[nreg++] = 1 << pin;

sys/dev/ic/gcscpcib.c

444

val[nreg++] = 1 << (pin + 16);

sys/dev/ic/gcscpcib.c

449

val[n]);

sys/dev/ic/gem.c

2366

gem_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/gem.c

2388

*val = v & GEM_MIF_FRAME_DATA;

sys/dev/ic/gem.c

2398

gem_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/gem.c

2409

phy, reg, val);

sys/dev/ic/gem.c

2416

(val & GEM_MIF_FRAME_DATA);

sys/dev/ic/hd64570.c

176

#define sca_write_1(sc, reg, val) (sc)->sc_write_1(sc, reg, val)

sys/dev/ic/hd64570.c

177

#define sca_write_2(sc, reg, val) (sc)->sc_write_2(sc, reg, val)

sys/dev/ic/hd64570.c

182

msci_write_1(sca_port_t *scp, u_int reg, u_int8_t val)

sys/dev/ic/hd64570.c

184

sca_write_1(scp->sca, scp->msci_off + reg, val);

sys/dev/ic/hd64570.c

194

dmac_write_1(sca_port_t *scp, u_int reg, u_int8_t val)

sys/dev/ic/hd64570.c

196

sca_write_1(scp->sca, scp->dmac_off + reg, val);

sys/dev/ic/hd64570.c

200

dmac_write_2(sca_port_t *scp, u_int reg, u_int16_t val)

sys/dev/ic/hd64570.c

202

sca_write_2(scp->sca, scp->dmac_off + reg, val);

sys/dev/ic/hme.c

1210

hme_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/hme.c

1266

*val = v & HME_MIF_FO_DATA;

sys/dev/ic/hme.c

1284

hme_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/hme.c

1334

(val & HME_MIF_FO_DATA);

sys/dev/ic/hpet.c

120

val = bus_space_read_4(sc->sc_memt, sc->sc_memh, HPET_CONFIG);

sys/dev/ic/hpet.c

121

sc->sc_config = val;

sys/dev/ic/hpet.c

122

if ((val & HPET_CONFIG_ENABLE) == 0) {

sys/dev/ic/hpet.c

123

val |= HPET_CONFIG_ENABLE;

sys/dev/ic/hpet.c

124

bus_space_write_4(sc->sc_memt, sc->sc_memh, HPET_CONFIG, val);

sys/dev/ic/hpet.c

146

val = eval - sval;

sys/dev/ic/hpet.c

147

sc->sc_adj = (int64_t)val * sc->sc_period / 1000;

sys/dev/ic/hpet.c

162

uint32_t val;

sys/dev/ic/hpet.c

164

val = bus_space_read_4(sc->sc_memt, sc->sc_memh, HPET_CONFIG);

sys/dev/ic/hpet.c

165

val |= HPET_CONFIG_ENABLE;

sys/dev/ic/hpet.c

166

bus_space_write_4(sc->sc_memt, sc->sc_memh, HPET_CONFIG, val);

sys/dev/ic/hpet.c

207

uint64_t td0, td, val, freq;

sys/dev/ic/hpet.c

244

val = (uint64_t)(hd - hd0) * sc->sc_period / 100000000;

sys/dev/ic/hpet.c

245

freq = (td - td0) * 10000000 / val;

sys/dev/ic/hpet.c

84

uint32_t val, sval, eval;

sys/dev/ic/i82557var.h

358

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/ic/i82557var.h

359

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/ic/i82557var.h

360

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/ic/i82557var.h

361

bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/ic/i82557var.h

362

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/ic/i82557var.h

363

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/ic/i82586.c

841

int n, off, val;

sys/dev/ic/i82586.c

845

val = sc->ie_bus_read16(sc, off);

sys/dev/ic/i82586.c

846

if ((n == sc->rbtail) ^ ((val & IE_RBD_EOL) != 0)) {

sys/dev/ic/i82586.c

859

val = sc->ie_bus_read16(sc, off);

sys/dev/ic/i82586.c

860

if ((n == sc->rftail) ^ ((val & (IE_FD_EOL | IE_FD_SUSP))

sys/dev/ic/ibm561.c

478

ibm561_regcont10bit(struct ibm561data *data, u_int16_t reg, u_int16_t val)

sys/dev/ic/ibm561.c

480

data->ramdac_wr(data->cookie, IBM561_CMD_GAMMA, (val >> 2) & 0xff);

sys/dev/ic/ibm561.c

481

data->ramdac_wr(data->cookie, IBM561_CMD_GAMMA, (val & 0x3) << 6);

sys/dev/ic/ibm561.c

492

ibm561_regcont(struct ibm561data *data, u_int16_t reg, u_int8_t val)

sys/dev/ic/ibm561.c

494

data->ramdac_wr(data->cookie, reg, val);

sys/dev/ic/ibm561.c

498

ibm561_regwr(struct ibm561data *data, u_int16_t reg, u_int8_t val)

sys/dev/ic/ibm561.c

501

ibm561_regcont(data, IBM561_CMD, val);

sys/dev/ic/igpio.c

102

if (val & IGPIO_PADCFG0_PREGFRXSEL)

sys/dev/ic/igpio.c

105

if (val & IGPIO_PADCFG0_RXINV)

sys/dev/ic/igpio.c

108

if (val & (IGPIO_PADCFG0_GPIROUTIOXAPIC|IGPIO_PADCFG0_GPIROUTSCI|

sys/dev/ic/igpio.c

112

if (val & IGPIO_PADCFG0_GPIROUTIOXAPIC)

sys/dev/ic/igpio.c

115

if (val & IGPIO_PADCFG0_GPIROUTSCI)

sys/dev/ic/igpio.c

118

if (val & IGPIO_PADCFG0_GPIROUTSMI)

sys/dev/ic/igpio.c

121

if (val & IGPIO_PADCFG0_GPIROUTNMI)

sys/dev/ic/igpio.c

126

(val & IGPIO_PADCFG0_PMODE_MASK) >> IGPIO_PADCFG0_PMODE_SHIFT;

sys/dev/ic/igpio.c

136

if (val & IGPIO_PADCFG0_GPIORXDIS)

sys/dev/ic/igpio.c

140

!!(val & IGPIO_PADCFG0_GPIORXSTATE));

sys/dev/ic/igpio.c

142

if (val & IGPIO_PADCFG0_GPIOTXDIS)

sys/dev/ic/igpio.c

146

!!(val & IGPIO_PADCFG0_GPIOTXSTATE));

sys/dev/ic/igpio.c

148

if (val & unknown_bits) {

sys/dev/ic/igpio.c

151

if (!(__BIT(b) & unknown_bits & val))

sys/dev/ic/igpio.c

239

uint32_t val;

sys/dev/ic/igpio.c

256

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh[i], reg);

sys/dev/ic/igpio.c

257

if (val == 0) {

sys/dev/ic/igpio.c

261

ib->ib_revid = val >> 16;

sys/dev/ic/igpio.c

273

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh[i], reg);

sys/dev/ic/igpio.c

275

reg = val & 0xffff;

sys/dev/ic/igpio.c

276

val = val >> 16;

sys/dev/ic/igpio.c

278

switch (val) {

sys/dev/ic/igpio.c

299

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh[i], reg);

sys/dev/ic/igpio.c

300

ib->ib_padbar = val;

sys/dev/ic/igpio.c

472

uint32_t val;

sys/dev/ic/igpio.c

479

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh[ib->ib_barno], cfg0);

sys/dev/ic/igpio.c

481

ib->ib_barno, pin, val, igpio_padcfg0_print(val, 0)));

sys/dev/ic/igpio.c

483

if (val & IGPIO_PADCFG0_GPIOTXDIS)

sys/dev/ic/igpio.c

484

val = (val & IGPIO_PADCFG0_GPIORXSTATE) ? 1 : 0;

sys/dev/ic/igpio.c

486

val = (val & IGPIO_PADCFG0_GPIOTXSTATE) ? 1 : 0;

sys/dev/ic/igpio.c

490

return val;

sys/dev/ic/igpio.c

499

uint32_t val, newval;

sys/dev/ic/igpio.c

506

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh[ib->ib_barno], cfg0);

sys/dev/ic/igpio.c

509

newval = val | IGPIO_PADCFG0_GPIOTXSTATE;

sys/dev/ic/igpio.c

511

newval = val & ~IGPIO_PADCFG0_GPIOTXSTATE;

sys/dev/ic/igpio.c

515

val, igpio_padcfg0_print(val, 0),

sys/dev/ic/igpio.c

607

uint32_t val, newval;

sys/dev/ic/igpio.c

621

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh[ib->ib_barno], cfg0);

sys/dev/ic/igpio.c

622

newval = val;

sys/dev/ic/igpio.c

668

val, igpio_padcfg0_print(val, 0),

sys/dev/ic/igpio.c

686

uint32_t val, newval;

sys/dev/ic/igpio.c

698

val = bus_space_read_4(sc->sc_bst, sc->sc_bsh[ib->ib_barno], cfg0);

sys/dev/ic/igpio.c

699

newval = val;

sys/dev/ic/igpio.c

70

igpio_padcfg0_print(uint32_t val, int idx)

sys/dev/ic/igpio.c

709

val, igpio_padcfg0_print(val, 0),

sys/dev/ic/igpio.c

83

(val & IGPIO_PADCFG0_RXEVCFG_MASK) >> IGPIO_PADCFG0_RXEVCFG_SHIFT;

sys/dev/ic/igsfbvar.h

155

u_int idxport, uint8_t idx, uint8_t val)

sys/dev/ic/igsfbvar.h

158

bus_space_write_1(t, h, idxport + 1, val);

sys/dev/ic/igsfbvar.h

187

uint8_t idx, uint8_t val)

sys/dev/ic/igsfbvar.h

190

bus_space_write_1(t, h, IGS_ATTR_IDX, val); /* sic, same register */

sys/dev/ic/interwave.c

130

int val;

sys/dev/ic/interwave.c

134

val = 0;

sys/dev/ic/interwave.c

166

val = 1;

sys/dev/ic/interwave.c

174

val = 1;

sys/dev/ic/interwave.c

179

return val;

sys/dev/ic/interwave.c

273

iw_mempoke(struct iw_softc *sc, u_long addy, u_char val)

sys/dev/ic/interwave.c

280

IW_WRITE_DIRECT_1(sc->p3xr + 7, sc->p3xr_h, val);

sys/dev/ic/interwave.c

375

u_char reg, cmode, val, mixer_image;

sys/dev/ic/interwave.c

377

val = 0;

sys/dev/ic/interwave.c

400

for (val = 0; val < 32; val++) {

sys/dev/ic/interwave.c

402

IW_WRITE_DIRECT_1(sc->p3xr + 2, sc->p3xr_h, val);

sys/dev/ic/interwavereg.h

358

#define IW_WRITE_CODEC_1(reg, val) \

sys/dev/ic/interwavereg.h

361

bus_space_write_1(sc->sc_iot, sc->codec_index_h, sc->cdatap, (u_char)val);\

sys/dev/ic/interwavereg.h

374

#define IW_WRITE_DIRECT_1(reg, h, val) \

sys/dev/ic/interwavereg.h

376

bus_space_write_1(sc->sc_iot, h, reg, (u_char)val);\

sys/dev/ic/interwavereg.h

386

#define IW_WRITE_GENERAL_1(reg, val) \

sys/dev/ic/interwavereg.h

389

bus_space_write_1(sc->sc_iot, sc->p3xr_h, 5, (u_char)val);\

sys/dev/ic/interwavereg.h

392

#define IW_WRITE_GENERAL_2(reg, val) \

sys/dev/ic/interwavereg.h

395

bus_space_write_2(sc->sc_iot, sc->p3xr_h, 4, (u_short)val);\

sys/dev/ic/isp.c

163

uint32_t code_org, val;

sys/dev/ic/isp.c

492

for (val = loops = 0; loops < 30000; loops++) {

sys/dev/ic/isp.c

494

val = ISP_READ(isp, BIU2400_CSR);

sys/dev/ic/isp.c

495

if ((val & BIU2400_DMA_ACTIVE) == 0) {

sys/dev/ic/isp.c

499

if (val & BIU2400_DMA_ACTIVE) {

sys/dev/ic/isp.c

511

val = ISP_READ(isp, OUTMAILBOX0);

sys/dev/ic/isp.c

513

for (val = loops = 0; loops < 500000; loops ++) {

sys/dev/ic/isp.c

514

val = ISP_READ(isp, BIU2400_CSR);

sys/dev/ic/isp.c

515

if ((val & BIU2400_SOFT_RESET) == 0) {

sys/dev/ic/isp.c

519

if (val & BIU2400_SOFT_RESET) {

sys/dev/ic/isp.c

592

for (val = loops = 0; loops < 5000000; loops++) {

sys/dev/ic/isp.c

594

val = ISP_READ(isp, OUTMAILBOX0);

sys/dev/ic/isp.c

595

if (val == 0) {

sys/dev/ic/isp.c

599

if (val != 0) {

sys/dev/ic/ispmbox.h

2018

#define AT_HAS_TAG(val) ((val) & (1 << 24))

sys/dev/ic/ispmbox.h

2019

#define AT_GET_TAG(val) (((val) >> 16) & 0xff)

sys/dev/ic/ispmbox.h

2020

#define AT_GET_HANDLE(val) ((val) & 0xffff)

sys/dev/ic/ispmbox.h

2096

#define AT2_HAS_TAG(val) 1

sys/dev/ic/ispmbox.h

2097

#define AT2_GET_TAG(val) ((val) & 0xffffffff)

sys/dev/ic/ispmbox.h

2098

#define AT2_GET_INST(val) (((val) >> 32) & 0xffff)

sys/dev/ic/ispmbox.h

2100

#define AT2_GET_BUS(val) (((val) >> 48) & 0xff)

sys/dev/ic/ispvar.h

123

#define ISP_WRITE(isp, reg, val) \

sys/dev/ic/ispvar.h

124

(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))

sys/dev/ic/ispvar.h

143

#define ISP_SETBITS(isp, reg, val) \

sys/dev/ic/ispvar.h

144

(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))

sys/dev/ic/ispvar.h

146

#define ISP_CLRBITS(isp, reg, val) \

sys/dev/ic/ispvar.h

147

(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))

sys/dev/ic/ispvar.h

688

#define ISP_SET_SENDMARKER(isp, chan, val) \

sys/dev/ic/ispvar.h

690

FCPARAM(isp, chan)->sendmarker = val; \

sys/dev/ic/ispvar.h

692

SDPARAM(isp, chan)->sendmarker = val; \

sys/dev/ic/lan9118.c

160

uint32_t val, irq_cfg;

sys/dev/ic/lan9118.c

167

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, LAN9118_BYTE_TEST);

sys/dev/ic/lan9118.c

168

if (val != LAN9118_BYTE_TEST_VALUE) {

sys/dev/ic/lan9118.c

173

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, LAN9118_ID_REV);

sys/dev/ic/lan9118.c

174

sc->sc_id = LAN9118_ID_REV_ID(val);

sys/dev/ic/lan9118.c

175

sc->sc_rev = LAN9118_ID_REV_REV(val);

sys/dev/ic/lan9118.c

188

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh,

sys/dev/ic/lan9118.c

190

if (!(val & LAN9118_MAC_CSR_CMD_BUSY))

sys/dev/ic/lan9118.c

198

val = lan9118_mac_readreg(sc, LAN9118_ADDRL);

sys/dev/ic/lan9118.c

199

sc->sc_enaddr[3] = (val >> 24) & 0xff;

sys/dev/ic/lan9118.c

200

sc->sc_enaddr[2] = (val >> 16) & 0xff;

sys/dev/ic/lan9118.c

201

sc->sc_enaddr[1] = (val >> 8) & 0xff;

sys/dev/ic/lan9118.c

202

sc->sc_enaddr[0] = val & 0xff;

sys/dev/ic/lan9118.c

203

val = lan9118_mac_readreg(sc, LAN9118_ADDRH);

sys/dev/ic/lan9118.c

204

sc->sc_enaddr[5] = (val >> 8) & 0xff;

sys/dev/ic/lan9118.c

205

sc->sc_enaddr[4] = val & 0xff;

sys/dev/ic/lan9118.c

763

lan9118_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/ic/lan9118.c

766

return lan9118_mii_readreg(device_private(dev), phy, reg, val);

sys/dev/ic/lan9118.c

769

lan9118_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/ic/lan9118.c

772

return lan9118_mii_writereg(device_private(dev), phy, reg, val);

sys/dev/ic/lan9118.c

794

lan9118_mii_readreg(struct lan9118_softc *sc, int phy, int reg, uint16_t *val)

sys/dev/ic/lan9118.c

804

*val = lan9118_mac_readreg(sc, LAN9118_MII_DATA) & 0xffff;

sys/dev/ic/lan9118.c

809

lan9118_mii_writereg(struct lan9118_softc *sc, int phy, int reg, uint16_t val)

sys/dev/ic/lan9118.c

817

lan9118_mac_writereg(sc, LAN9118_MII_DATA, val);

sys/dev/ic/lan9118.c

846

lan9118_mac_writereg(struct lan9118_softc *sc, int reg, uint32_t val)

sys/dev/ic/lan9118.c

851

bus_space_write_4(sc->sc_iot, sc->sc_ioh, LAN9118_MAC_CSR_DATA, val);

sys/dev/ic/mb86960.c

1822

uint16_t val;

sys/dev/ic/mb86960.c

1853

val = 0;

sys/dev/ic/mb86960.c

1861

val |= 1 << (bit - 1);

sys/dev/ic/mb86960.c

1865

data[addr * 2] = val >> 8;

sys/dev/ic/mb86960.c

1866

data[addr * 2 + 1] = val & 0xff;

sys/dev/ic/mcp23xxxgpio.c

152

uint8_t bank, uint8_t reg, uint8_t val)

sys/dev/ic/mcp23xxxgpio.c

157

error = sc->sc_accessops->write(sc, bank, regaddr, val);

sys/dev/ic/mcp23xxxgpio.c

177

int val;

sys/dev/ic/mcp23xxxgpio.c

195

val = data & __BIT(epin) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;

sys/dev/ic/mcp23xxxgpio.c

197

return val;

sys/dev/ic/mlxvar.h

339

mlx_outb(struct mlx_softc *mlx, int off, u_int8_t val)

sys/dev/ic/mlxvar.h

342

bus_space_write_1(mlx->mlx_iot, mlx->mlx_ioh, off, val);

sys/dev/ic/mlxvar.h

348

mlx_outw(struct mlx_softc *mlx, int off, u_int16_t val)

sys/dev/ic/mlxvar.h

351

bus_space_write_2(mlx->mlx_iot, mlx->mlx_ioh, off, val);

sys/dev/ic/mlxvar.h

357

mlx_outl(struct mlx_softc *mlx, int off, u_int32_t val)

sys/dev/ic/mlxvar.h

360

bus_space_write_4(mlx->mlx_iot, mlx->mlx_ioh, off, val);

sys/dev/ic/mpt.c

1134

int val;

sys/dev/ic/mpt.c

1138

for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) {

sys/dev/ic/mpt.c

1139

mpt_free_request(mpt, &mpt->request_pool[val]);

sys/dev/ic/mpt.c

1241

for (val = 0, pptr = mpt->reply_phys;

sys/dev/ic/mpt.c

1245

if (++val == mpt->mpt_global_credits - 1)

sys/dev/ic/mpt_netbsd.h

250

#define mpt_write(mpt, reg, val) \

sys/dev/ic/mpt_netbsd.h

251

bus_space_write_4((mpt)->sc_st, (mpt)->sc_sh, (reg), (val))

sys/dev/ic/msm6242b.c

187

msm6242b_write(struct msm6242b_softc *sc, uint8_t reg, uint8_t val)

sys/dev/ic/msm6242b.c

189

bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val);

sys/dev/ic/mtd803.c

407

mtd_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/mtd803.c

411

*val = MTD_READ_2(sc, MTD_PHYBASE + reg * 2);

sys/dev/ic/mtd803.c

418

mtd_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/mtd803.c

422

MTD_WRITE_2(sc, MTD_PHYBASE + reg * 2, val);

sys/dev/ic/mvsata.c

3322

uint32_t val;

sys/dev/ic/mvsata.c

3336

val = MVSATA_HC_READ_4(mvhc, 0x020);

sys/dev/ic/mvsata.c

3337

val &= 0x1c1c1c1c;

sys/dev/ic/mvsata.c

3338

val |= 0x03030303;

sys/dev/ic/mvsata.c

670

const uint32_t val = SControl_IPM_NONE | SControl_SPD_ANY |

sys/dev/ic/mvsata.c

674

mvport->port_sata_scontrol, 0, val);

sys/dev/ic/mvsata.c

80

#define MVSATA_HC_WRITE_4(hc, reg, val) \

sys/dev/ic/mvsata.c

81

bus_space_write_4((hc)->hc_iot, (hc)->hc_ioh, (reg), (val))

sys/dev/ic/mvsata.c

84

#define MVSATA_EDMA_WRITE_4(mvport, reg, val) \

sys/dev/ic/mvsata.c

85

bus_space_write_4((mvport)->port_iot, (mvport)->port_ioh, (reg), (val))

sys/dev/ic/mvsata.c

92

#define MVSATA_WDC_WRITE_2(mvport, reg, val) \

sys/dev/ic/mvsata.c

94

SHADOW_REG_BLOCK_OFFSET + (reg), (val))

sys/dev/ic/mvsata.c

95

#define MVSATA_WDC_WRITE_1(mvport, reg, val) \

sys/dev/ic/mvsata.c

97

SHADOW_REG_BLOCK_OFFSET + (reg), (val))

sys/dev/ic/mvsatareg.h

284

#define CRQB_ATACOMMAND(reg, val) \

sys/dev/ic/mvsatareg.h

285

((reg << 8) | (val & 0xff))

sys/dev/ic/ncr5380sbc.c

2439

long val;

sys/dev/ic/ncr5380sbc.c

2443

ncr5380_trace(const char *msg, long val)

sys/dev/ic/ncr5380sbc.c

2457

tr->val = val;

sys/dev/ic/ncr5380sbc.c

2484

db_printf(tr->msg, tr->val);

sys/dev/ic/ncr5380var.h

240

void ncr5380_trace(const char *msg, long val);

sys/dev/ic/ncr5380var.h

241

#define NCR_TRACE(msg, val) ncr5380_trace(msg, val)

sys/dev/ic/ncr5380var.h

243

#define NCR_TRACE(msg, val) /* nada */

sys/dev/ic/ncr5380var.h

68

# define NCR5380_WRITE(sc, reg, val) bus_space_write_1(sc->sc_regt, \

sys/dev/ic/ncr5380var.h

69

sc->sc_regh, sc->reg, val)

sys/dev/ic/ncr5380var.h

73

# define NCR5380_WRITE(sc, reg, val) do { *(sc->reg) = val; } while (0)

sys/dev/ic/ncr53c9xvar.h

405

#define NCR_WRITE_REG(sc, reg, val) \

sys/dev/ic/ncr53c9xvar.h

406

(*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val))

sys/dev/ic/ninjascsi32.c

166

njsc32_write_1(struct njsc32_softc *sc, int no, int val)

sys/dev/ic/ninjascsi32.c

169

bus_space_write_1(sc->sc_regt, sc->sc_regh, no, val);

sys/dev/ic/ninjascsi32.c

173

njsc32_write_2(struct njsc32_softc *sc, int no, int val)

sys/dev/ic/ninjascsi32.c

176

bus_space_write_2(sc->sc_regt, sc->sc_regh, no, val);

sys/dev/ic/ninjascsi32.c

180

njsc32_write_4(struct njsc32_softc *sc, int no, u_int32_t val)

sys/dev/ic/ninjascsi32.c

183

bus_space_write_4(sc->sc_regt, sc->sc_regh, no, val);

sys/dev/ic/ninjascsi32.c

195

njsc32_ireg_write_1(struct njsc32_softc *sc, int no, int val)

sys/dev/ic/ninjascsi32.c

199

bus_space_write_1(sc->sc_regt, sc->sc_regh, NJSC32_REG_DATA_LOW, val);

sys/dev/ic/ninjascsi32.c

203

njsc32_ireg_write_2(struct njsc32_softc *sc, int no, int val)

sys/dev/ic/ninjascsi32.c

207

bus_space_write_2(sc->sc_regt, sc->sc_regh, NJSC32_REG_DATA_LOW, val);

sys/dev/ic/ninjascsi32.c

758

u_int32_t val;

sys/dev/ic/ninjascsi32.c

761

val = 0;

sys/dev/ic/ninjascsi32.c

766

val |= *p++ << NJSC32_MSGOUT_MSG1_SHIFT;

sys/dev/ic/ninjascsi32.c

770

val |= *p++ << NJSC32_MSGOUT_MSG2_SHIFT;

sys/dev/ic/ninjascsi32.c

774

val |= *p++ << NJSC32_MSGOUT_MSG3_SHIFT;

sys/dev/ic/ninjascsi32.c

775

val |= NJSC32_MSGOUT_VALID | sc->sc_msgoutlen;

sys/dev/ic/ninjascsi32.c

781

return val;

sys/dev/ic/osiopvar.h

63

#define osiop_write_1(sc, reg, val) \

sys/dev/ic/osiopvar.h

64

bus_space_write_1((sc)->sc_bst, (sc)->sc_reg, reg, val)

sys/dev/ic/osiopvar.h

68

#define osiop_write_4(sc, reg, val) \

sys/dev/ic/osiopvar.h

69

bus_space_write_4((sc)->sc_bst, (sc)->sc_reg, reg, val)

sys/dev/ic/pca9564var.h

33

void (*write_byte)(device_t, int reg, uint8_t val);

sys/dev/ic/pcdisplay_subr.c

206

u_int16_t val;

sys/dev/ic/pcdisplay_subr.c

211

val = (fillattr << 8) | ' ';

sys/dev/ic/pcdisplay_subr.c

215

val, ncols);

sys/dev/ic/pcdisplay_subr.c

218

scr->mem[off + i] = val;

sys/dev/ic/pcdisplay_subr.c

250

u_int16_t val;

sys/dev/ic/pcdisplay_subr.c

256

val = (fillattr << 8) | ' ';

sys/dev/ic/pcdisplay_subr.c

260

val, count);

sys/dev/ic/pcdisplay_subr.c

263

scr->mem[off + i] = val;

sys/dev/ic/pcdisplayvar.h

67

int reg, uint8_t val)

sys/dev/ic/pcdisplayvar.h

70

bus_space_write_1(ph->ph_iot, ph->ph_ioh_6845, MC6845_DATA, val);

sys/dev/ic/pcdisplayvar.h

75

#define pcdisplay_6845_write(ph, reg, val) \

sys/dev/ic/pcdisplayvar.h

76

_pcdisplay_6845_write(ph, offsetof(struct reg_mc6845, reg), val)

sys/dev/ic/pcf8584.c

237

u_int8_t val;

sys/dev/ic/pcf8584.c

241

val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r]);

sys/dev/ic/pcf8584.c

243

return val;

sys/dev/ic/pckbc.c

113

pckbc_send_cmd(bus_space_tag_t iot, bus_space_handle_t ioh_c, u_char val)

sys/dev/ic/pckbc.c

117

bus_space_write_1(iot, ioh_c, 0, val);

sys/dev/ic/pckbc.c

214

pckbc_send_devcmd(void *pt, pckbc_slot_t slot, u_char val)

sys/dev/ic/pckbc.c

227

bus_space_write_1(iot, ioh_d, 0, val);

sys/dev/ic/pl031.c

49

#define RTC_WRITE(sc, reg, val) \

sys/dev/ic/pl031.c

50

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/pl041.c

247

aaci_ac97_read(void *priv, uint8_t reg, uint16_t *val)

sys/dev/ic/pl041.c

256

*val = AACI_READ(sc, AACISL2RX) >> 4;

sys/dev/ic/pl041.c

261

aaci_ac97_write(void *priv, uint8_t reg, uint16_t val)

sys/dev/ic/pl041.c

265

AACI_WRITE(sc, AACISL2TX, val << 4);

sys/dev/ic/pl041.c

82

#define AACI_WRITE(sc, reg, val) \

sys/dev/ic/pl041.c

83

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/pl041.c

84

#define AACI_WRITE_MULTI(sc, reg, val, cnt) \

sys/dev/ic/pl041.c

85

bus_space_write_multi_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val), (cnt))

sys/dev/ic/pl050.c

183

const uint32_t val = PLKMI_READ(sc, KMIDATA);

sys/dev/ic/pl050.c

184

pckbportintr(sc->sc_pt, sc->sc_slot, val & 0xff);

sys/dev/ic/pl050.c

55

#define PLKMI_WRITE(sc, reg, val) \

sys/dev/ic/pl050.c

56

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/pl050.c

63

const uint32_t val = (set ? mask : 0);

sys/dev/ic/pl050.c

67

if ((stat & mask) == val)

sys/dev/ic/pl061.c

94

plgpio_pin_write(void *priv, int pin, int val)

sys/dev/ic/pl061.c

98

PLGPIO_WRITE(sc, PL061_GPIODATA_REG(1 << pin), val << pin);

sys/dev/ic/pl061var.h

49

#define PLGPIO_WRITE(sc, reg, val) \

sys/dev/ic/pl061var.h

50

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/pl181.c

101

#define MMCI_WRITE(sc, reg, val) \

sys/dev/ic/pl181.c

102

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/ic/rt2560.c

1010

return val;

sys/dev/ic/rt2560.c

150

uint32_t val;

sys/dev/ic/rt2560.c

187

uint8_t val;

sys/dev/ic/rt2560.c

2258

rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)

sys/dev/ic/rt2560.c

2273

tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;

sys/dev/ic/rt2560.c

2276

DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));

sys/dev/ic/rt2560.c

2282

uint32_t val;

sys/dev/ic/rt2560.c

2285

val = RT2560_BBP_BUSY | reg << 8;

sys/dev/ic/rt2560.c

2286

RAL_WRITE(sc, RT2560_BBPCSR, val);

sys/dev/ic/rt2560.c

2289

val = RAL_READ(sc, RT2560_BBPCSR);

sys/dev/ic/rt2560.c

2290

if (!(val & RT2560_BBP_BUSY))

sys/dev/ic/rt2560.c

2291

return val & 0xff;

sys/dev/ic/rt2560.c

2300

rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)

sys/dev/ic/rt2560.c

2315

tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |

sys/dev/ic/rt2560.c

2320

sc->rf_regs[reg] = val;

sys/dev/ic/rt2560.c

2322

DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));

sys/dev/ic/rt2560.c

2698

uint16_t val;

sys/dev/ic/rt2560.c

2701

val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);

sys/dev/ic/rt2560.c

2702

sc->rf_rev = (val >> 11) & 0x1f;

sys/dev/ic/rt2560.c

2703

sc->hw_radio = (val >> 10) & 0x1;

sys/dev/ic/rt2560.c

2704

sc->led_mode = (val >> 6) & 0x7;

sys/dev/ic/rt2560.c

2705

sc->rx_ant = (val >> 4) & 0x3;

sys/dev/ic/rt2560.c

2706

sc->tx_ant = (val >> 2) & 0x3;

sys/dev/ic/rt2560.c

2707

sc->nb_ant = val & 0x3;

sys/dev/ic/rt2560.c

2711

val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);

sys/dev/ic/rt2560.c

2712

sc->bbp_prom[i].reg = val >> 8;

sys/dev/ic/rt2560.c

2713

sc->bbp_prom[i].val = val & 0xff;

sys/dev/ic/rt2560.c

2718

val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);

sys/dev/ic/rt2560.c

2719

sc->txpow[i * 2] = val >> 8;

sys/dev/ic/rt2560.c

2720

sc->txpow[i * 2 + 1] = val & 0xff;

sys/dev/ic/rt2560.c

2744

rt2560_def_bbp[i].val);

sys/dev/ic/rt2560.c

2751

rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);

sys/dev/ic/rt2560.c

2800

RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);

sys/dev/ic/rt2560.c

963

uint16_t val;

sys/dev/ic/rt2560.c

995

val = 0;

sys/dev/ic/rt2560.c

999

val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;

sys/dev/ic/rt2560reg.h

307

#define RAL_WRITE(sc, reg, val) \

sys/dev/ic/rt2560reg.h

308

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/ic/rt2560reg.h

313

#define RT2560_EEPROM_CTL(sc, val) do { \

sys/dev/ic/rt2560reg.h

314

RAL_WRITE((sc), RT2560_CSR21, (val)); \

sys/dev/ic/rt2560var.h

142

uint8_t val;

sys/dev/ic/rt2661.c

172

uint32_t val;

sys/dev/ic/rt2661.c

179

uint8_t val;

sys/dev/ic/rt2661.c

1989

rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)

sys/dev/ic/rt2661.c

199

uint32_t val;

sys/dev/ic/rt2661.c

2004

tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;

sys/dev/ic/rt2661.c

2007

DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));

sys/dev/ic/rt2661.c

2013

uint32_t val;

sys/dev/ic/rt2661.c

2026

val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;

sys/dev/ic/rt2661.c

2027

RAL_WRITE(sc, RT2661_PHY_CSR3, val);

sys/dev/ic/rt2661.c

2030

val = RAL_READ(sc, RT2661_PHY_CSR3);

sys/dev/ic/rt2661.c

2031

if (!(val & RT2661_BBP_BUSY))

sys/dev/ic/rt2661.c

2032

return val & 0xff;

sys/dev/ic/rt2661.c

2041

rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)

sys/dev/ic/rt2661.c

2055

tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |

sys/dev/ic/rt2661.c

2060

sc->rf_regs[reg] = val;

sys/dev/ic/rt2661.c

2062

DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff));

sys/dev/ic/rt2661.c

211

if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)

sys/dev/ic/rt2661.c

225

aprint_normal_dev(sc->sc_dev, "MAC/BBP RT%X, RF %s\n", val,

sys/dev/ic/rt2661.c

2429

uint16_t val;

sys/dev/ic/rt2661.c

2433

val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);

sys/dev/ic/rt2661.c

2434

ic->ic_myaddr[0] = val & 0xff;

sys/dev/ic/rt2661.c

2435

ic->ic_myaddr[1] = val >> 8;

sys/dev/ic/rt2661.c

2437

val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);

sys/dev/ic/rt2661.c

2438

ic->ic_myaddr[2] = val & 0xff;

sys/dev/ic/rt2661.c

2439

ic->ic_myaddr[3] = val >> 8;

sys/dev/ic/rt2661.c

2441

val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);

sys/dev/ic/rt2661.c

2442

ic->ic_myaddr[4] = val & 0xff;

sys/dev/ic/rt2661.c

2443

ic->ic_myaddr[5] = val >> 8;

sys/dev/ic/rt2661.c

2445

val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);

sys/dev/ic/rt2661.c

2447

sc->rf_rev = (val >> 11) & 0x1f;

sys/dev/ic/rt2661.c

2448

sc->hw_radio = (val >> 10) & 0x1;

sys/dev/ic/rt2661.c

2449

sc->rx_ant = (val >> 4) & 0x3;

sys/dev/ic/rt2661.c

2450

sc->tx_ant = (val >> 2) & 0x3;

sys/dev/ic/rt2661.c

2451

sc->nb_ant = val & 0x3;

sys/dev/ic/rt2661.c

2455

val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);

sys/dev/ic/rt2661.c

2456

sc->ext_5ghz_lna = (val >> 6) & 0x1;

sys/dev/ic/rt2661.c

2457

sc->ext_2ghz_lna = (val >> 4) & 0x1;

sys/dev/ic/rt2661.c

2462

val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);

sys/dev/ic/rt2661.c

2463

if ((val & 0xff) != 0xff)

sys/dev/ic/rt2661.c

2464

sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */

sys/dev/ic/rt2661.c

2466

val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);

sys/dev/ic/rt2661.c

2467

if ((val & 0xff) != 0xff)

sys/dev/ic/rt2661.c

2468

sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */

sys/dev/ic/rt2661.c

2479

val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);

sys/dev/ic/rt2661.c

2480

if ((val >> 8) != 0xff)

sys/dev/ic/rt2661.c

2481

sc->rfprog = (val >> 8) & 0x3;

sys/dev/ic/rt2661.c

2482

if ((val & 0xff) != 0xff)

sys/dev/ic/rt2661.c

2483

sc->rffreq = val & 0xff;

sys/dev/ic/rt2661.c

2489

val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);

sys/dev/ic/rt2661.c

2490

sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */

sys/dev/ic/rt2661.c

2493

sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */

sys/dev/ic/rt2661.c

2500

val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);

sys/dev/ic/rt2661.c

2501

if (val == 0 || val == 0xffff)

sys/dev/ic/rt2661.c

2503

sc->bbp_prom[i].reg = val >> 8;

sys/dev/ic/rt2661.c

2504

sc->bbp_prom[i].val = val & 0xff;

sys/dev/ic/rt2661.c

2506

sc->bbp_prom[i].val));

sys/dev/ic/rt2661.c

2515

uint8_t val;

sys/dev/ic/rt2661.c

2519

val = rt2661_bbp_read(sc, 0);

sys/dev/ic/rt2661.c

2520

if (val != 0 && val != 0xff)

sys/dev/ic/rt2661.c

2532

rt2661_def_bbp[i].val);

sys/dev/ic/rt2661.c

2539

rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);

sys/dev/ic/rt2661.c

2659

RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);

sys/dev/ic/rt2661.c

855

uint16_t val;

sys/dev/ic/rt2661.c

887

val = 0;

sys/dev/ic/rt2661.c

891

val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;

sys/dev/ic/rt2661.c

902

return val;

sys/dev/ic/rt2661.c

912

uint32_t val;

sys/dev/ic/rt2661.c

918

val = RAL_READ(sc, RT2661_STA_CSR4);

sys/dev/ic/rt2661.c

919

if (!(val & RT2661_TX_STAT_VALID))

sys/dev/ic/rt2661.c

923

qid = RT2661_TX_QID(val);

sys/dev/ic/rt2661.c

934

switch (RT2661_TX_RESULT(val)) {

sys/dev/ic/rt2661.c

936

retrycnt = RT2661_TX_RETRYCNT(val);

sys/dev/ic/rt2661.c

956

aprint_error_dev(sc->sc_dev, "sending data frame failed 0x%08x\n", val);

sys/dev/ic/rt2661reg.h

332

#define RAL_WRITE(sc, reg, val) \

sys/dev/ic/rt2661reg.h

333

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/ic/rt2661reg.h

335

#define RAL_WRITE_1(sc, reg, val) \

sys/dev/ic/rt2661reg.h

336

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/ic/rt2661reg.h

349

#define RT2661_EEPROM_CTL(sc, val) do { \

sys/dev/ic/rt2661reg.h

350

RAL_WRITE((sc), RT2661_E2PROM_CSR, (val)); \

sys/dev/ic/rt2661var.h

137

uint8_t val;

sys/dev/ic/rt2860.c

1143

uint16_t val;

sys/dev/ic/rt2860.c

1175

val = 0;

sys/dev/ic/rt2860.c

1179

val |= ((tmp & RT2860_Q) >> RT2860_SHIFT_Q) << n;

sys/dev/ic/rt2860.c

1190

return val;

sys/dev/ic/rt2860.c

178

uint32_t val;

sys/dev/ic/rt2860.c

185

uint8_t val;

sys/dev/ic/rt2860.c

2027

rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)

sys/dev/ic/rt2860.c

2043

RT2860_BBP_CSR_KICK | reg << 8 | val);

sys/dev/ic/rt2860.c

2053

uint32_t val;

sys/dev/ic/rt2860.c

207

uint8_t val;

sys/dev/ic/rt2860.c

2075

val = RAL_READ(sc, RT2860_H2M_BBPAGENT);

sys/dev/ic/rt2860.c

2076

if (!(val & RT2860_BBP_CSR_KICK))

sys/dev/ic/rt2860.c

2077

return val & 0xff;

sys/dev/ic/rt2860.c

2089

rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)

sys/dev/ic/rt2860.c

2106

(val & 0x3fffff) << 2 | (reg & 3);

sys/dev/ic/rt2860.c

2142

rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)

sys/dev/ic/rt2860.c

2157

tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;

sys/dev/ic/rt2860.c

2610

rt3572_def_rf[i].val);

sys/dev/ic/rt2860.c

2615

rt3090_def_rf[i].val);

sys/dev/ic/rt2860.c

2710

rt5392_def_rf[i].val);

sys/dev/ic/rt2860.c

2715

rt5390_def_rf[i].val);

sys/dev/ic/rt2860.c

2867

uint8_t *val)

sys/dev/ic/rt2860.c

2916

*val = rf24;

sys/dev/ic/rt2860.c

2957

rt3090_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);

sys/dev/ic/rt2860.c

3170

uint32_t val = cprng_fast32();

sys/dev/ic/rt2860.c

3172

if (val >= 0x03ff00 && (val & 0xf8ff00) == 0x00ff00)

sys/dev/ic/rt2860.c

3173

val += 0x000100;

sys/dev/ic/rt2860.c

3174

iv[0] = val;

sys/dev/ic/rt2860.c

3175

iv[1] = val >> 8;

sys/dev/ic/rt2860.c

3176

iv[2] = val >> 16;

sys/dev/ic/rt2860.c

3312

uint16_t val;

sys/dev/ic/rt2860.c

3326

val = rt2860_srom_read(sc, RT2860_EEPROM_VERSION);

sys/dev/ic/rt2860.c

3327

DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8));

sys/dev/ic/rt2860.c

3331

val = rt2860_srom_read(sc, RT2860_EEPROM_MAC01);

sys/dev/ic/rt2860.c

3332

ic->ic_myaddr[0] = val & 0xff;

sys/dev/ic/rt2860.c

3333

ic->ic_myaddr[1] = val >> 8;

sys/dev/ic/rt2860.c

3334

val = rt2860_srom_read(sc, RT2860_EEPROM_MAC23);

sys/dev/ic/rt2860.c

3335

ic->ic_myaddr[2] = val & 0xff;

sys/dev/ic/rt2860.c

3336

ic->ic_myaddr[3] = val >> 8;

sys/dev/ic/rt2860.c

3337

val = rt2860_srom_read(sc, RT2860_EEPROM_MAC45);

sys/dev/ic/rt2860.c

3338

ic->ic_myaddr[4] = val & 0xff;

sys/dev/ic/rt2860.c

3339

ic->ic_myaddr[5] = val >> 8;

sys/dev/ic/rt2860.c

3343

val = rt2860_srom_read(sc, RT2860_EEPROM_COUNTRY);

sys/dev/ic/rt2860.c

3344

DPRINTF(("EEPROM region code=0x%04x\n", val));

sys/dev/ic/rt2860.c

3349

val = rt2860_srom_read(sc, RT2860_EEPROM_BBP_BASE + i);

sys/dev/ic/rt2860.c

3350

sc->bbp[i].val = val & 0xff;

sys/dev/ic/rt2860.c

3351

sc->bbp[i].reg = val >> 8;

sys/dev/ic/rt2860.c

3352

DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val));

sys/dev/ic/rt2860.c

3357

val = rt2860_srom_read(sc, RT3071_EEPROM_RF_BASE + i);

sys/dev/ic/rt2860.c

3358

sc->rf[i].val = val & 0xff;

sys/dev/ic/rt2860.c

3359

sc->rf[i].reg = val >> 8;

sys/dev/ic/rt2860.c

3361

sc->rf[i].val));

sys/dev/ic/rt2860.c

3366

val = rt2860_srom_read(sc, RT2860_EEPROM_FREQ_LEDS);

sys/dev/ic/rt2860.c

3367

sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;

sys/dev/ic/rt2860.c

3369

if ((val >> 8) != 0xff) {

sys/dev/ic/rt2860.c

3371

sc->leds = val >> 8;

sys/dev/ic/rt2860.c

3386

val = rt2860_srom_read(sc, RT2860_EEPROM_ANTENNA);

sys/dev/ic/rt2860.c

3390

sc->rf_rev = (val >> 8) & 0xf;

sys/dev/ic/rt2860.c

3391

sc->ntxchains = (val >> 4) & 0xf;

sys/dev/ic/rt2860.c

3392

sc->nrxchains = val & 0xf;

sys/dev/ic/rt2860.c

3397

val = rt2860_srom_read(sc, RT2860_EEPROM_CONFIG);

sys/dev/ic/rt2860.c

3398

DPRINTF(("EEPROM CFG 0x%04x\n", val));

sys/dev/ic/rt2860.c

3400

if ((val >> 8) != 0xff)

sys/dev/ic/rt2860.c

3401

sc->patch_dac = (val >> 15) & 1;

sys/dev/ic/rt2860.c

3402

if ((val & 0xff) != 0xff) {

sys/dev/ic/rt2860.c

3403

sc->ext_5ghz_lna = (val >> 3) & 1;

sys/dev/ic/rt2860.c

3404

sc->ext_2ghz_lna = (val >> 2) & 1;

sys/dev/ic/rt2860.c

3408

sc->rfswitch = val & 1;

sys/dev/ic/rt2860.c

3412

val = rt2860_srom_read(sc, RT2860_EEPROM_PCIE_PSLEVEL);

sys/dev/ic/rt2860.c

3413

if ((val & 0xff) != 0xff) {

sys/dev/ic/rt2860.c

3414

sc->pslevel = val & 0x3;

sys/dev/ic/rt2860.c

3415

val = rt2860_srom_read(sc, RT2860_EEPROM_REV);

sys/dev/ic/rt2860.c

3416

if ((val & 0xff80) != 0x9280)

sys/dev/ic/rt2860.c

3424

val = rt2860_srom_read(sc,

sys/dev/ic/rt2860.c

3426

sc->txpow1[i + 0] = (int8_t)(val & 0xff);

sys/dev/ic/rt2860.c

3427

sc->txpow1[i + 1] = (int8_t)(val >> 8);

sys/dev/ic/rt2860.c

3430

val = rt2860_srom_read(sc,

sys/dev/ic/rt2860.c

3432

sc->txpow2[i + 0] = (int8_t)(val & 0xff);

sys/dev/ic/rt2860.c

3433

sc->txpow2[i + 1] = (int8_t)(val >> 8);

sys/dev/ic/rt2860.c

3451

val = rt2860_srom_read(sc,

sys/dev/ic/rt2860.c

3453

sc->txpow1[i + 14] = (int8_t)(val & 0xff);

sys/dev/ic/rt2860.c

3454

sc->txpow1[i + 15] = (int8_t)(val >> 8);

sys/dev/ic/rt2860.c

3456

val = rt2860_srom_read(sc,

sys/dev/ic/rt2860.c

3458

sc->txpow2[i + 14] = (int8_t)(val & 0xff);

sys/dev/ic/rt2860.c

3459

sc->txpow2[i + 15] = (int8_t)(val >> 8);

sys/dev/ic/rt2860.c

3473

val = rt2860_srom_read(sc, RT2860_EEPROM_DELTAPWR);

sys/dev/ic/rt2860.c

3475

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/dev/ic/rt2860.c

3476

delta_2ghz = val & 0xf;

sys/dev/ic/rt2860.c

3477

if (!(val & 0x40)) /* negative number */

sys/dev/ic/rt2860.c

3480

val >>= 8;

sys/dev/ic/rt2860.c

3481

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/dev/ic/rt2860.c

3482

delta_5ghz = val & 0xf;

sys/dev/ic/rt2860.c

3483

if (!(val & 0x40)) /* negative number */

sys/dev/ic/rt2860.c

3492

val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2);

sys/dev/ic/rt2860.c

3493

reg = val;

sys/dev/ic/rt2860.c

3494

val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1);

sys/dev/ic/rt2860.c

3495

reg |= (uint32_t)val << 16;

sys/dev/ic/rt2860.c

3507

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_2GHZ);

sys/dev/ic/rt2860.c

3508

sc->tssi_2ghz[0] = val & 0xff; /* [-4] */

sys/dev/ic/rt2860.c

3509

sc->tssi_2ghz[1] = val >> 8; /* [-3] */

sys/dev/ic/rt2860.c

3510

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_2GHZ);

sys/dev/ic/rt2860.c

3511

sc->tssi_2ghz[2] = val & 0xff; /* [-2] */

sys/dev/ic/rt2860.c

3512

sc->tssi_2ghz[3] = val >> 8; /* [-1] */

sys/dev/ic/rt2860.c

3513

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_2GHZ);

sys/dev/ic/rt2860.c

3514

sc->tssi_2ghz[4] = val & 0xff; /* [+0] */

sys/dev/ic/rt2860.c

3515

sc->tssi_2ghz[5] = val >> 8; /* [+1] */

sys/dev/ic/rt2860.c

3516

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_2GHZ);

sys/dev/ic/rt2860.c

3517

sc->tssi_2ghz[6] = val & 0xff; /* [+2] */

sys/dev/ic/rt2860.c

3518

sc->tssi_2ghz[7] = val >> 8; /* [+3] */

sys/dev/ic/rt2860.c

3519

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_2GHZ);

sys/dev/ic/rt2860.c

3520

sc->tssi_2ghz[8] = val & 0xff; /* [+4] */

sys/dev/ic/rt2860.c

3521

sc->step_2ghz = val >> 8;

sys/dev/ic/rt2860.c

3531

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_5GHZ);

sys/dev/ic/rt2860.c

3532

sc->tssi_5ghz[0] = val & 0xff; /* [-4] */

sys/dev/ic/rt2860.c

3533

sc->tssi_5ghz[1] = val >> 8; /* [-3] */

sys/dev/ic/rt2860.c

3534

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_5GHZ);

sys/dev/ic/rt2860.c

3535

sc->tssi_5ghz[2] = val & 0xff; /* [-2] */

sys/dev/ic/rt2860.c

3536

sc->tssi_5ghz[3] = val >> 8; /* [-1] */

sys/dev/ic/rt2860.c

3537

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_5GHZ);

sys/dev/ic/rt2860.c

3538

sc->tssi_5ghz[4] = val & 0xff; /* [+0] */

sys/dev/ic/rt2860.c

3539

sc->tssi_5ghz[5] = val >> 8; /* [+1] */

sys/dev/ic/rt2860.c

3540

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_5GHZ);

sys/dev/ic/rt2860.c

3541

sc->tssi_5ghz[6] = val & 0xff; /* [+2] */

sys/dev/ic/rt2860.c

3542

sc->tssi_5ghz[7] = val >> 8; /* [+3] */

sys/dev/ic/rt2860.c

3543

val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_5GHZ);

sys/dev/ic/rt2860.c

3544

sc->tssi_5ghz[8] = val & 0xff; /* [+4] */

sys/dev/ic/rt2860.c

3545

sc->step_5ghz = val >> 8;

sys/dev/ic/rt2860.c

3556

val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ);

sys/dev/ic/rt2860.c

3557

sc->rssi_2ghz[0] = val & 0xff; /* Ant A */

sys/dev/ic/rt2860.c

3558

sc->rssi_2ghz[1] = val >> 8; /* Ant B */

sys/dev/ic/rt2860.c

3559

val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ);

sys/dev/ic/rt2860.c

3565

if ((val & 0xff) != 0xff)

sys/dev/ic/rt2860.c

3566

sc->txmixgain_2ghz = val & 0x7;

sys/dev/ic/rt2860.c

3569

sc->rssi_2ghz[2] = val & 0xff; /* Ant C */

sys/dev/ic/rt2860.c

3570

sc->lna[2] = val >> 8; /* channel group 2 */

sys/dev/ic/rt2860.c

3572

val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ);

sys/dev/ic/rt2860.c

3573

sc->rssi_5ghz[0] = val & 0xff; /* Ant A */

sys/dev/ic/rt2860.c

3574

sc->rssi_5ghz[1] = val >> 8; /* Ant B */

sys/dev/ic/rt2860.c

3575

val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ);

sys/dev/ic/rt2860.c

3576

sc->rssi_5ghz[2] = val & 0xff; /* Ant C */

sys/dev/ic/rt2860.c

3577

sc->lna[3] = val >> 8; /* channel group 3 */

sys/dev/ic/rt2860.c

3579

val = rt2860_srom_read(sc, RT2860_EEPROM_LNA);

sys/dev/ic/rt2860.c

3583

sc->lna[0] = val & 0xff;

sys/dev/ic/rt2860.c

3584

sc->lna[1] = val >> 8; /* channel group 1 */

sys/dev/ic/rt2860.c

3636

rt2860_def_bbp[i].val);

sys/dev/ic/rt2860.c

3674

rt5390_def_bbp[i].val);

sys/dev/ic/rt2860.c

3839

RAL_WRITE(sc, rt2860_def_mac[i].reg, rt2860_def_mac[i].val);

sys/dev/ic/rt2860.c

3934

rt2860_mcu_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);

sys/dev/ic/rt2860reg.h

1078

#define RAL_WRITE(sc, reg, val) \

sys/dev/ic/rt2860reg.h

1079

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/ic/rt2860reg.h

1093

#define RAL_SET_REGION_4(sc, offset, val, count) \

sys/dev/ic/rt2860reg.h

1095

(val), (count))

sys/dev/ic/rt2860reg.h

1100

#define RT2860_EEPROM_CTL(sc, val) do { \

sys/dev/ic/rt2860reg.h

1101

RAL_WRITE((sc), RT2860_PCI_EECTRL, (val)); \

sys/dev/ic/rt2860var.h

187

uint8_t val;

sys/dev/ic/rtl8169.c

244

re_gmii_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/ic/rtl8169.c

256

*val = CSR_READ_1(sc, RTK_GMEDIASTAT);

sys/dev/ic/rtl8169.c

275

*val = data & RTK_PHYAR_PHYDATA;

sys/dev/ic/rtl8169.c

280

re_gmii_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/ic/rtl8169.c

287

(val & RTK_PHYAR_PHYDATA) | RTK_PHYAR_BUSY);

sys/dev/ic/rtl8169.c

299

device_xname(sc->sc_dev), reg, val);

sys/dev/ic/rtl8169.c

307

re_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/ic/rtl8169.c

314

rv = re_gmii_readreg(dev, phy, reg, val);

sys/dev/ic/rtl8169.c

340

*val = 0;

sys/dev/ic/rtl8169.c

349

*val = CSR_READ_1(sc, RTK_MEDIASTAT);

sys/dev/ic/rtl8169.c

355

*val = CSR_READ_2(sc, re8139_reg);

sys/dev/ic/rtl8169.c

358

*val &= ~(BMCR_LOOP | BMCR_ISO);

sys/dev/ic/rtl8169.c

364

re_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/ic/rtl8169.c

371

rv = re_gmii_writereg(dev, phy, reg, val);

sys/dev/ic/rtl8169.c

384

val &= ~(BMCR_LOOP | BMCR_ISO);

sys/dev/ic/rtl8169.c

407

CSR_WRITE_2(sc, re8139_reg, val);

sys/dev/ic/rtl8169.c

756

uint16_t val;

sys/dev/ic/rtl8169.c

771

val = rtk_read_eeprom(sc, RTK_EE_EADDR0 + i, addr_len);

sys/dev/ic/rtl8169.c

772

eaddr[(i * 2) + 0] = val & 0xff;

sys/dev/ic/rtl8169.c

773

eaddr[(i * 2) + 1] = val >> 8;

sys/dev/ic/rtl81x9.c

413

rtk_phy_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/rtl81x9.c

442

*val = 0;

sys/dev/ic/rtl81x9.c

450

*val = CSR_READ_2(sc, rtk8139_reg);

sys/dev/ic/rtl81x9.c

459

*val = frame.mii_data;

sys/dev/ic/rtl81x9.c

465

rtk_phy_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/rtl81x9.c

497

CSR_WRITE_2(sc, rtk8139_reg, val);

sys/dev/ic/rtl81x9.c

505

frame.mii_data = val;

sys/dev/ic/rtl81x9.c

623

uint16_t val;

sys/dev/ic/rtl81x9.c

642

val = rtk_read_eeprom(sc, RTK_EE_EADDR0, addr_len);

sys/dev/ic/rtl81x9.c

643

eaddr[0] = val & 0xff;

sys/dev/ic/rtl81x9.c

644

eaddr[1] = val >> 8;

sys/dev/ic/rtl81x9.c

645

val = rtk_read_eeprom(sc, RTK_EE_EADDR1, addr_len);

sys/dev/ic/rtl81x9.c

646

eaddr[2] = val & 0xff;

sys/dev/ic/rtl81x9.c

647

eaddr[3] = val >> 8;

sys/dev/ic/rtl81x9.c

648

val = rtk_read_eeprom(sc, RTK_EE_EADDR2, addr_len);

sys/dev/ic/rtl81x9.c

649

eaddr[4] = val & 0xff;

sys/dev/ic/rtl81x9.c

650

eaddr[5] = val >> 8;

sys/dev/ic/rtl81x9var.h

283

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/ic/rtl81x9var.h

284

bus_space_write_4(sc->rtk_btag, sc->rtk_bhandle, reg, val)

sys/dev/ic/rtl81x9var.h

285

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/ic/rtl81x9var.h

286

bus_space_write_2(sc->rtk_btag, sc->rtk_bhandle, reg, val)

sys/dev/ic/rtl81x9var.h

287

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/ic/rtl81x9var.h

288

bus_space_write_1(sc->rtk_btag, sc->rtk_bhandle, reg, val)

sys/dev/ic/rtsx.c

1004

rtsx_write_phy(struct rtsx_softc *sc, uint8_t addr, uint16_t val)

sys/dev/ic/rtsx.c

1009

RTSX_WRITE(sc, RTSX_PHY_DATA0, val);

sys/dev/ic/rtsx.c

1010

RTSX_WRITE(sc, RTSX_PHY_DATA1, val >> 8);

sys/dev/ic/rtsx.c

1026

rtsx_read_cfg(struct rtsx_softc *sc, uint8_t func, uint16_t addr, uint32_t *val)

sys/dev/ic/rtsx.c

1047

*val = ((uint32_t)data3 << 24) | (data2 << 16) | (data1 << 8) | data0;

sys/dev/ic/rtsx.c

1055

uint32_t mask, uint32_t val)

sys/dev/ic/rtsx.c

1063

RTSX_WRITE(sc, RTSX_CFGDATA0 + i, val & mask & 0xff);

sys/dev/ic/rtsx.c

1067

val >>= 8;

sys/dev/ic/rtsx.c

69

#define WRITE4(sc, reg, val) \

sys/dev/ic/rtsx.c

70

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/ic/rtsx.c

72

#define RTSX_READ(sc, reg, val) \

sys/dev/ic/rtsx.c

74

int err = rtsx_read((sc), (reg), (val)); \

sys/dev/ic/rtsx.c

79

#define RTSX_WRITE(sc, reg, val) \

sys/dev/ic/rtsx.c

81

int err = rtsx_write((sc), (reg), 0xff, (val)); \

sys/dev/ic/rtsx.c

935

rtsx_read(struct rtsx_softc *sc, uint16_t addr, uint8_t *val)

sys/dev/ic/rtsx.c

949

*val = (reg & 0xff);

sys/dev/ic/rtsx.c

954

rtsx_write(struct rtsx_softc *sc, uint16_t addr, uint8_t mask, uint8_t val)

sys/dev/ic/rtsx.c

962

(mask << 8) | val));

sys/dev/ic/rtsx.c

967

if (val != (reg & 0xff))

sys/dev/ic/rtsx.c

977

rtsx_read_phy(struct rtsx_softc *sc, uint8_t addr, uint16_t *val)

sys/dev/ic/rtsx.c

997

*val = data0 | (data1 << 8);

sys/dev/ic/rtw.c

2926

uint8_t mask, newval, val;

sys/dev/ic/rtw.c

2958

val = RTW_READ8(regs, ofs);

sys/dev/ic/rtw.c

2960

("%s: read %" PRIx8 " from reg[%#02" PRIxPTR "]\n", __func__, val,

sys/dev/ic/rtw.c

2962

val &= ~mask;

sys/dev/ic/rtw.c

2963

val |= newval;

sys/dev/ic/rtw.c

2964

RTW_WRITE8(regs, ofs, val);

sys/dev/ic/rtw.c

2966

("%s: wrote %" PRIx8 " to reg[%#02" PRIxPTR "]\n", __func__, val,

sys/dev/ic/rtwn_data.h

30

uint8_t val;

sys/dev/ic/rtwnreg.h

1041

#define MS(val, field) \

sys/dev/ic/rtwnreg.h

1042

(((val) & field##_M) >> field##_S)

sys/dev/ic/rtwnreg.h

1045

#define SM(field, val) \

sys/dev/ic/rtwnreg.h

1046

(((val) << field##_S) & field##_M)

sys/dev/ic/rtwnreg.h

1049

#define RW(var, field, val) \

sys/dev/ic/rtwnreg.h

1050

(((var) & ~field##_M) | SM(field, val))

sys/dev/ic/rtwphy.c

128

verify_syna(u_int freq, uint32_t val)

sys/dev/ic/rtwphy.c

131

uint32_t expected_val = ~val;

sys/dev/ic/rtwphy.c

177

KASSERT(val == expected_val);

sys/dev/ic/rtwphy.c

94

#define RTW_BBP_WRITE_OR_RETURN(reg, val) \

sys/dev/ic/rtwphy.c

95

if ((rc = rtw_bbp_write(regs, reg, val)) != 0) \

sys/dev/ic/rtwphyio.c

104

RTW_BB_RD_MASK) == val) {

sys/dev/ic/rtwphyio.c

200

rtw_grf5101_host_crypt(u_int addr, uint32_t val)

sys/dev/ic/rtwphyio.c

207

rtw_grf5101_mac_crypt(u_int addr, uint32_t val)

sys/dev/ic/rtwphyio.c

216

data_and_addr = caesar[EXTRACT_NIBBLE(val, 2)] |

sys/dev/ic/rtwphyio.c

217

(caesar[EXTRACT_NIBBLE(val, 1)] << 4) |

sys/dev/ic/rtwphyio.c

218

(caesar[EXTRACT_NIBBLE(val, 0)] << 8) |

sys/dev/ic/rtwphyio.c

221

(caesar[EXTRACT_NIBBLE(val, 3)] << 24);

sys/dev/ic/rtwphyio.c

251

u_int addr, uint32_t val)

sys/dev/ic/rtwphyio.c

258

rtw_rfchipid_string(rfchipid), addr, val));

sys/dev/ic/rtwphyio.c

264

bits = __SHIFTIN(val, MAX2820_TWI_DATA_MASK) |

sys/dev/ic/rtwphyio.c

269

KASSERT((val & ~__SHIFTOUT_MASK(SA2400_TWI_DATA_MASK)) == 0);

sys/dev/ic/rtwphyio.c

270

bits = __SHIFTIN(val, SA2400_TWI_DATA_MASK) |

sys/dev/ic/rtwphyio.c

277

KASSERT((val & ~__SHIFTOUT_MASK(SI4126_TWI_DATA_MASK)) == 0);

sys/dev/ic/rtwphyio.c

278

bits = rtw_grf5101_host_crypt(addr, val);

sys/dev/ic/rtwphyio.c

284

KASSERT((val & ~__SHIFTOUT_MASK(SI4126_TWI_DATA_MASK)) == 0);

sys/dev/ic/rtwphyio.c

285

bits = __SHIFTIN(val, SI4126_TWI_DATA_MASK) |

sys/dev/ic/rtwphyio.c

302

rtw_maxim_swizzle(u_int addr, uint32_t val)

sys/dev/ic/rtwphyio.c

306

KASSERT((val & ~(RTW_MAXIM_LODATA_MASK|RTW_MAXIM_HIDATA_MASK)) == 0);

sys/dev/ic/rtwphyio.c

307

lodata = __SHIFTOUT(val, RTW_MAXIM_LODATA_MASK);

sys/dev/ic/rtwphyio.c

308

hidata = __SHIFTOUT(val, RTW_MAXIM_HIDATA_MASK);

sys/dev/ic/rtwphyio.c

317

u_int addr, uint32_t val)

sys/dev/ic/rtwphyio.c

322

rtw_rfchipid_string(rfchipid), addr, val));

sys/dev/ic/rtwphyio.c

326

reg = rtw_grf5101_mac_crypt(addr, val);

sys/dev/ic/rtwphyio.c

329

reg = rtw_maxim_swizzle(addr, val);

sys/dev/ic/rtwphyio.c

336

(val & ~__SHIFTOUT_MASK(RTW_PHYCFG_MAC_PHILIPS_DATA_MASK)) == 0);

sys/dev/ic/rtwphyio.c

339

__SHIFTIN(val, RTW_PHYCFG_MAC_PHILIPS_DATA_MASK);

sys/dev/ic/rtwphyio.c

74

rtw_bbp_write(struct rtw_regs *regs, u_int addr, u_int val)

sys/dev/ic/rtwphyio.c

82

("%s: bbp[%u] <- %u\n", __func__, addr, val));

sys/dev/ic/rtwphyio.c

85

KASSERT((val & ~__SHIFTOUT_MASK(RTW_BB_WR_MASK)) == 0);

sys/dev/ic/rtwphyio.c

88

__SHIFTIN(val, RTW_BB_WR_MASK) | RTW_BB_RD_MASK;

sys/dev/ic/rtwreg.h

979

#define RTW_WRITE8(regs, ofs, val) \

sys/dev/ic/rtwreg.h

980

bus_space_write_1((regs)->r_bt, (regs)->r_bh, (ofs), (val))

sys/dev/ic/rtwreg.h

982

#define RTW_WRITE16(regs, ofs, val) \

sys/dev/ic/rtwreg.h

983

bus_space_write_2((regs)->r_bt, (regs)->r_bh, (ofs), (val))

sys/dev/ic/rtwreg.h

985

#define RTW_WRITE(regs, ofs, val) \

sys/dev/ic/rtwreg.h

986

bus_space_write_4((regs)->r_bt, (regs)->r_bh, (ofs), (val))

sys/dev/ic/rtwvar.h

410

uint32_t val)

sys/dev/ic/rtwvar.h

412

return (*bus->b_write)(bus->b_regs, rfchipid, addr, val);

sys/dev/ic/seeq8005.c

120

#define SEEQ_WRITE16(sc, iot, ioh, reg, val) do { \

sys/dev/ic/seeq8005.c

122

bus_space_write_1((iot), (ioh), (reg), (val) & 0xff); \

sys/dev/ic/seeq8005.c

123

bus_space_write_1((iot), (ioh), (reg) + 1, (val) >> 8); \

sys/dev/ic/seeq8005.c

125

bus_space_write_2((iot), (ioh), (reg), (val)); \

sys/dev/ic/sgec.c

74

#define ZE_WCSR(csr, val) \

sys/dev/ic/sgec.c

75

bus_space_write_4(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/ic/siisatavar.h

108

#define GRWRITE(sc, reg, val) bus_space_write_4((sc)->sc_grt, (sc)->sc_grh, (reg), (val))

sys/dev/ic/siisatavar.h

110

#define PRWRITE(sc, reg, val) bus_space_write_4((sc)->sc_prt, (sc)->sc_prh, (reg), (val))

sys/dev/ic/siop.c

135

siop_script_write(struct siop_softc *sc, u_int offset, uint32_t val)

sys/dev/ic/siop.c

140

offset * 4, val);

sys/dev/ic/siop.c

142

sc->sc_c.sc_script[offset] = siop_htoc32(&sc->sc_c, val);

sys/dev/ic/sl811hs.c

1413

slhci_mem_use(struct usbd_bus *bus, int val)

sys/dev/ic/sl811hs.c

1418

sc->sc_mem_use += val;

sys/dev/ic/smc83c170.c

1346

epic_mii_read(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/smc83c170.c

1360

*val = bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_MMDATA)

sys/dev/ic/smc83c170.c

1369

epic_mii_write(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/smc83c170.c

1377

bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MMDATA, val);

sys/dev/ic/smc91cxx.c

1410

smc91cxx_mii_bitbang_write(device_t self, uint32_t val)

sys/dev/ic/smc91cxx.c

1415

bus_space_write_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W, val);

sys/dev/ic/smc91cxx.c

1419

smc91cxx_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/smc91cxx.c

1427

val);

sys/dev/ic/smc91cxx.c

1435

smc91cxx_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/smc91cxx.c

1443

val);

sys/dev/ic/spdmem.c

164

uint8_t val;

sys/dev/ic/spdmem.c

167

(sc->sc_read)(sc, j, &val);

sys/dev/ic/spdmem.c

168

crc = crc ^ val << 8;

sys/dev/ic/spdmem.c

182

uint8_t i, val, spd_type;

sys/dev/ic/spdmem.c

197

(sc->sc_read)(sc, i, &val);

sys/dev/ic/spdmem.c

198

cksum += val;

sys/dev/ic/spdmem.c

201

(sc->sc_read)(sc, 63, &val);

sys/dev/ic/spdmem.c

203

if ((cksum & 0xff) != val) {

sys/dev/ic/spdmem.c

205

"spd = 0x%02x\n", cksum, val);

sys/dev/ic/spdmem.c

213

(sc->sc_read)(sc, 0, &val);

sys/dev/ic/spdmem.c

214

spd_len = val;

sys/dev/ic/spdmem.c

235

(sc->sc_read)(sc, 127, &val);

sys/dev/ic/spdmem.c

236

crc_spd = val << 8;

sys/dev/ic/spdmem.c

237

(sc->sc_read)(sc, 126, &val);

sys/dev/ic/spdmem.c

238

crc_spd |= val;

sys/dev/ic/spdmem.c

247

(sc->sc_read)(sc, 0, &val);

sys/dev/ic/spdmem.c

248

spd_len = val & 0x0f;

sys/dev/ic/spdmem.c

256

(sc->sc_read)(sc, 127, &val);

sys/dev/ic/spdmem.c

257

crc_spd = val << 8;

sys/dev/ic/spdmem.c

258

(sc->sc_read)(sc, 126, &val);

sys/dev/ic/spdmem.c

259

crc_spd |= val;

sys/dev/ic/spdmem.c

274

(sc->sc_read)(sc, 0, &val);

sys/dev/ic/spdmem.c

275

spd_len = val & 0x0f;

sys/dev/ic/spdmem.c

774

u_int val;

sys/dev/ic/spdmem.c

783

val = txx_mtb * mtb +

sys/dev/ic/spdmem.c

786

return val;

sys/dev/ic/spdmem.c

836

#define __DDR3_CYCLES(val) \

sys/dev/ic/spdmem.c

837

((val / cycle_time) + ((val % cycle_time) ? 1 : 0))

sys/dev/ic/sunscpal.c

1921

long val;

sys/dev/ic/sunscpal.c

1925

sunscpal_trace(char *msg, long val)

sys/dev/ic/sunscpal.c

1939

tr->val = val;

sys/dev/ic/sunscpal.c

1966

db_printf(tr->msg, tr->val);

sys/dev/ic/sunscpalvar.h

283

void sunscpal_trace(char *msg, long val);

sys/dev/ic/sunscpalvar.h

284

#define SUNSCPAL_TRACE(msg, val) sunscpal_trace(msg, val)

sys/dev/ic/sunscpalvar.h

286

#define SUNSCPAL_TRACE(msg, val) /* nada */

sys/dev/ic/sunscpalvar.h

62

#define SUNSCPAL_WRITE_1(sc, reg, val) bus_space_write_1(sc->sunscpal_regt, \

sys/dev/ic/sunscpalvar.h

63

sc->sunscpal_regh, sc->reg, val)

sys/dev/ic/sunscpalvar.h

66

#define SUNSCPAL_WRITE_2(sc, reg, val) bus_space_write_2(sc->sunscpal_regt, \

sys/dev/ic/sunscpalvar.h

67

sc->sunscpal_regh, sc->reg, val)

sys/dev/ic/sunscpalvar.h

71

# define SUNSCPAL_WRITE_1(sc, reg, val) do { *(sc->reg) = val; } while(0)

sys/dev/ic/tcic2.c

106

int val, auxreg;

sys/dev/ic/tcic2.c

110

val = (bus_space_read_2(iot, ioh, TCIC_R_ADDR2) & TCIC_SS_MASK)

sys/dev/ic/tcic2.c

112

if (val > 1)

sys/dev/ic/tcic2.c

117

val = bus_space_read_1(iot, ioh, TCIC_R_SCTRL);

sys/dev/ic/tcic2.c

118

if (val & TCIC_SCTRL_RSVD)

sys/dev/ic/tcic2.c

123

val = bus_space_read_1(iot, ioh, TCIC_R_ICSR);

sys/dev/ic/tcic2.c

124

if (((val >> 1) & 1) != ((val >> 2) & 1))

sys/dev/ic/tcic2.c

1243

int val;

sys/dev/ic/tcic2.c

1250

val = tcic_read_ind_2(h, TCIC_IR_SCF1_N(h->sock));

sys/dev/ic/tcic2.c

1251

val &= TCIC_SCF1_IRQ_MASK;

sys/dev/ic/tcic2.c

1252

tcic_write_ind_2(h, TCIC_IR_SCF1_N(h->sock), val);

sys/dev/ic/tcic2.c

1256

val = tcic_read_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK);

sys/dev/ic/tcic2.c

1257

val &= ~TCIC_ILOCK_CRESENA;

sys/dev/ic/tcic2.c

1258

tcic_write_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK, val);

sys/dev/ic/tcic2.c

1279

tcic_log2(u_int val)

sys/dev/ic/tcic2.c

1284

while (val) {

sys/dev/ic/tcic2.c

1285

if (val & 1)

sys/dev/ic/tcic2.c

1288

val >>= 1;

sys/dev/ic/tcic2.c

129

val = bus_space_read_1(iot, ioh, TCIC_R_IENA);

sys/dev/ic/tcic2.c

130

if (val & TCIC_IENA_RSVD)

sys/dev/ic/tcic2.c

138

val = bus_space_read_2(iot, ioh, TCIC_R_AUX);

sys/dev/ic/tcic2.c

139

DPRINTF(("tcic: auxreg 0x%02x val 0x%04x\n", auxreg, val));

sys/dev/ic/tcic2.c

142

if (INVALID_AR_SYSCFG(val))

sys/dev/ic/tcic2.c

146

if (INVALID_AR_ILOCK(val))

sys/dev/ic/tcic2.c

150

if (INVALID_AR_TEST(val))

sys/dev/ic/tcic2.c

158

val = bus_space_read_1(iot, ioh, TCIC_R_SCTRL);

sys/dev/ic/tcic2.c

159

if (val & TCIC_SCTRL_RESET) {

sys/dev/ic/tcic2.c

162

val = bus_space_read_2(iot, ioh, TCIC_R_ADDR);

sys/dev/ic/tcic2.c

163

if (val != 0)

sys/dev/ic/tcic2.c

165

val = bus_space_read_2(iot, ioh, TCIC_R_ADDR2);

sys/dev/ic/tcic2.c

166

if (val != 0)

sys/dev/ic/tcic2.c

170

val = bus_space_read_2(iot, ioh, TCIC_R_EDC);

sys/dev/ic/tcic2.c

171

if (val != 0)

sys/dev/ic/tcic2.c

181

val = bus_space_read_1(iot, ioh, TCIC_R_SSTAT);

sys/dev/ic/tcic2.c

182

if ((val & (TCIC_SSTAT_6US|TCIC_SSTAT_10US|TCIC_SSTAT_PROGTIME))

sys/dev/ic/tcic2.c

681

int val, reg;

sys/dev/ic/tcic2.c

700

val = tcic_read_ind_2(h, reg);

sys/dev/ic/tcic2.c

701

tcic_write_ind_2(h, reg, (val & ~TCIC_SCF1_IRQ_MASK)|TCIC_SCF1_IRQOFF);

sys/dev/ic/tcic2.c

703

val = tcic_read_ind_2(h, reg);

sys/dev/ic/tcic2.c

705

(val | (TCIC_SCF2_MLBAT1|TCIC_SCF2_MLBAT2|TCIC_SCF2_MRDY

sys/dev/ic/tcic2var.h

203

int val;

sys/dev/ic/tcic2var.h

204

val = bus_space_read_2(h->sc->iot, h->sc->ioh, reg);

sys/dev/ic/tcic2var.h

205

val |= bus_space_read_2(h->sc->iot, h->sc->ioh, reg+2) << 16;

sys/dev/ic/tcic2var.h

206

return val;

sys/dev/ic/tcic2var.h

235

int r_addr, val;

sys/dev/ic/tcic2var.h

238

val = bus_space_read_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA);

sys/dev/ic/tcic2var.h

240

return val;

sys/dev/ic/tcic2var.h

286

int mode, val;

sys/dev/ic/tcic2var.h

289

val = bus_space_read_1(iot, ioh, reg);

sys/dev/ic/tcic2var.h

290

return val;

sys/dev/ic/tcic2var.h

297

int mode, val;

sys/dev/ic/tcic2var.h

300

val = bus_space_read_2(iot, ioh, TCIC_R_AUX);

sys/dev/ic/tcic2var.h

301

return val;

sys/dev/ic/tcic2var.h

306

tcic_write_aux_1(bus_space_tag_t iot, bus_space_handle_t ioh, int auxreg, int reg, int val)

sys/dev/ic/tcic2var.h

311

bus_space_write_1(iot, ioh, reg, val);

sys/dev/ic/tcic2var.h

316

tcic_write_aux_2(bus_space_tag_t iot, bus_space_handle_t ioh, int auxreg, int val)

sys/dev/ic/tcic2var.h

321

bus_space_write_2(iot, ioh, TCIC_R_AUX, val);

sys/dev/ic/tms320av110var.h

107

bus_size_t off, uint16_t val)

sys/dev/ic/tms320av110var.h

110

bus_space_write_1(iot, ioh, off+1, (val)>>8);

sys/dev/ic/tms320av110var.h

111

bus_space_write_1(iot, ioh, off, (uint8_t)val);

sys/dev/ic/tulip.c

3370

tlp_bitbang_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/tulip.c

3374

return mii_bitbang_readreg(self, sc->sc_bitbang_ops, phy, reg, val);

sys/dev/ic/tulip.c

3383

tlp_bitbang_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/tulip.c

3387

return mii_bitbang_writereg(self, sc->sc_bitbang_ops, phy, reg, val);

sys/dev/ic/tulip.c

3409

tlp_sio_mii_bitbang_write(device_t self, uint32_t val)

sys/dev/ic/tulip.c

3413

TULIP_WRITE(sc, CSR_MIIROM, val);

sys/dev/ic/tulip.c

3422

tlp_pnic_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/tulip.c

3440

*val = data & PNIC_MII_DATA;

sys/dev/ic/tulip.c

3455

tlp_pnic_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/tulip.c

3463

(reg << PNIC_MII_REGSHIFT) | val);

sys/dev/ic/tulip.c

3497

tlp_al981_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/ic/tulip.c

3508

*val = bus_space_read_4(sc->sc_st, sc->sc_sh,

sys/dev/ic/tulip.c

3519

tlp_al981_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/ic/tulip.c

3531

tlp_al981_phy_regmap[reg], val);

sys/dev/ic/tulipvar.h

551

#define TULIP_WRITE(sc, reg, val) \

sys/dev/ic/tulipvar.h

553

TULIP_CSR_OFFSET((sc), (reg)), (val))

sys/dev/ic/uda1341.c

164

uint8_t val, volume, bass, treble, deemphasis;

sys/dev/ic/uda1341.c

167

val = UDA1341_L3_STATUS1;

sys/dev/ic/uda1341.c

169

val |= UDA1341_L3_STATUS1_PC_DAC;

sys/dev/ic/uda1341.c

171

val |= UDA1341_L3_STATUS1_PC_ADC;

sys/dev/ic/uda1341.c

173

val |= UDA1341_L3_STATUS1_OGS_6DB;

sys/dev/ic/uda1341.c

175

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

184

val = UDA1341_L3_DATA0_VOLUME;

sys/dev/ic/uda1341.c

185

val |= volume & UDA1341_L3_DATA0_VOLUME_MASK;

sys/dev/ic/uda1341.c

186

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

191

val = UDA1341_L3_DATA0_BASS_TREBLE;

sys/dev/ic/uda1341.c

192

val |= (bass << UDA1341_L3_DATA0_BASS_SHIFT) &

sys/dev/ic/uda1341.c

194

val |= (treble << UDA1341_L3_DATA0_TREBLE_SHIFT) &

sys/dev/ic/uda1341.c

196

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

205

val = UDA1341_L3_DATA0_SOUNDC;

sys/dev/ic/uda1341.c

226

val |= (deemphasis << UDA1341_L3_DATA0_SOUNDC_DE_SHIFT) &

sys/dev/ic/uda1341.c

230

val |= UDA1341_L3_DATA0_SOUNDC_MUTE;

sys/dev/ic/uda1341.c

231

val |= sc->sc_mode & UDA1341_L3_DATA0_SOUNDC_MODE_MASK;

sys/dev/ic/uda1341.c

232

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

235

val = UDA1341_L3_DATA0_ED;

sys/dev/ic/uda1341.c

236

val |= (sc->sc_inmix1 & UDA1341_L3_DATA0_MA_MASK);

sys/dev/ic/uda1341.c

238

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

241

val = UDA1341_L3_DATA0_ED;

sys/dev/ic/uda1341.c

242

val |= (sc->sc_inmix2 & UDA1341_L3_DATA0_MB_MASK);

sys/dev/ic/uda1341.c

244

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

247

val = UDA1341_L3_DATA0_ED;

sys/dev/ic/uda1341.c

248

val |= (sc->sc_micvol << UDA1341_L3_DATA0_MS_SHIFT) &

sys/dev/ic/uda1341.c

250

val |= sc->sc_inmode & UDA1341_L3_DATA0_MM_MASK;

sys/dev/ic/uda1341.c

252

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

255

val = UDA1341_L3_DATA0_ED;

sys/dev/ic/uda1341.c

257

val |= (sc->sc_agc << UDA1341_L3_DATA0_AGC_SHIFT) &

sys/dev/ic/uda1341.c

259

val |= (sc->sc_ch2_gain & 0x03) & UDA1341_L3_DATA0_IG_LOW_MASK;

sys/dev/ic/uda1341.c

261

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

264

val = UDA1341_L3_DATA0_ED;

sys/dev/ic/uda1341.c

265

val |= (sc->sc_ch2_gain >> 2 ) & UDA1341_L3_DATA0_IG_HIGH_MASK;

sys/dev/ic/uda1341.c

267

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/uda1341.c

271

val = UDA1341_L3_DATA0_ED;

sys/dev/ic/uda1341.c

272

val |= sc->sc_agc_lvl & UDA1341_L3_DATA0_AL_MASK;

sys/dev/ic/uda1341.c

274

sc->sc_l3_write(sc, 1, val);

sys/dev/ic/vga.c

758

int val;

sys/dev/ic/vga.c

762

val = vga_ts_read(&vc->hdl, mode);

sys/dev/ic/vga.c

763

vga_ts_write(&vc->hdl, mode, val & ~VGA_TS_MODE_BLANK);

sys/dev/ic/vga.c

765

val = vga_6845_read(&vc->hdl, mode);

sys/dev/ic/vga.c

766

vga_6845_write(&vc->hdl, mode, val | 0x80);

sys/dev/ic/vga.c

769

val = vga_ts_read(&vc->hdl, mode);

sys/dev/ic/vga.c

770

vga_ts_write(&vc->hdl, mode, val | VGA_TS_MODE_BLANK);

sys/dev/ic/vga.c

772

val = vga_6845_read(&vc->hdl, mode);

sys/dev/ic/vga.c

773

vga_6845_write(&vc->hdl, mode, val & ~0x80);

sys/dev/ic/vga_raster.c

601

int val;

sys/dev/ic/vga_raster.c

605

val = vga_ts_read(&vc->hdl, mode);

sys/dev/ic/vga_raster.c

606

vga_ts_write(&vc->hdl, mode, val & ~VGA_TS_MODE_BLANK);

sys/dev/ic/vga_raster.c

608

val = vga_6845_read(&vc->hdl, mode);

sys/dev/ic/vga_raster.c

609

vga_6845_write(&vc->hdl, mode, val | 0x80);

sys/dev/ic/vga_raster.c

612

val = vga_ts_read(&vc->hdl, mode);

sys/dev/ic/vga_raster.c

613

vga_ts_write(&vc->hdl, mode, val | VGA_TS_MODE_BLANK);

sys/dev/ic/vga_raster.c

615

val = vga_6845_read(&vc->hdl, mode);

sys/dev/ic/vga_raster.c

616

vga_6845_write(&vc->hdl, mode, val & ~0x80);

sys/dev/ic/vgavar.h

124

_vga_attr_write(struct vga_handle *vh, int reg, u_int8_t val)

sys/dev/ic/vgavar.h

130

vga_raw_write(vh, VGA_ATC_DATAW, val);

sys/dev/ic/vgavar.h

147

_vga_ts_write(struct vga_handle *vh, int reg, u_int8_t val)

sys/dev/ic/vgavar.h

151

vga_raw_write(vh, VGA_TS_DATA, val);

sys/dev/ic/vgavar.h

163

_vga_gdc_write(struct vga_handle *vh, int reg, u_int8_t val)

sys/dev/ic/vgavar.h

167

vga_raw_write(vh, VGA_GDC_DATA, val);

sys/dev/ic/vgavar.h

172

#define vga_attr_write(vh, reg, val) \

sys/dev/ic/vgavar.h

173

_vga_attr_write(vh, offsetof(struct reg_vgaattr, reg), val)

sys/dev/ic/vgavar.h

176

#define vga_ts_write(vh, reg, val) \

sys/dev/ic/vgavar.h

177

_vga_ts_write(vh, offsetof(struct reg_vgats, reg), val)

sys/dev/ic/vgavar.h

180

#define vga_gdc_write(vh, reg, val) \

sys/dev/ic/vgavar.h

181

_vga_gdc_write(vh, offsetof(struct reg_vgagdc, reg), val)

sys/dev/ic/vgavar.h

185

#define vga_6845_write(vh, reg, val) \

sys/dev/ic/vgavar.h

186

pcdisplay_6845_write(&(vh)->vh_ph, reg, val)

sys/dev/ic/vgavar.h

189

#define _vga_6845_write(vh, reg, val) \

sys/dev/ic/vgavar.h

190

_pcdisplay_6845_write(&(vh)->vh_ph, reg, val)

sys/dev/ic/w83l518d.c

54

wb_idx_write(struct wb_softc *wb, uint8_t reg, uint8_t val)

sys/dev/ic/w83l518d.c

57

bus_space_write_1(wb->wb_iot, wb->wb_ioh, WB_SD_DATA, val);

sys/dev/ic/w83l518d.c

67

wb_write(struct wb_softc *wb, uint8_t reg, uint8_t val)

sys/dev/ic/w83l518d.c

69

bus_space_write_1(wb->wb_iot, wb->wb_ioh, reg, val);

sys/dev/ic/w83l518d.c

75

uint8_t val;

sys/dev/ic/w83l518d.c

77

val = wb_read(wb, WB_SD_CSR);

sys/dev/ic/w83l518d.c

79

val |= WB_CSR_MS_LED;

sys/dev/ic/w83l518d.c

81

val &= ~WB_CSR_MS_LED;

sys/dev/ic/w83l518d.c

82

wb_write(wb, WB_SD_CSR, val);

sys/dev/ic/w83l518d_sdmmc.c

154

uint8_t val;

sys/dev/ic/w83l518d_sdmmc.c

158

val = wb_read(wb, WB_SD_CSR);

sys/dev/ic/w83l518d_sdmmc.c

159

val |= WB_CSR_POWER_N;

sys/dev/ic/w83l518d_sdmmc.c

160

wb_write(wb, WB_SD_CSR, val);

sys/dev/ic/w83l518d_sdmmc.c

440

uint8_t val;

sys/dev/ic/w83l518d_sdmmc.c

480

val = wb_idx_read(wb, WB_INDEX_SETUP);

sys/dev/ic/w83l518d_sdmmc.c

481

val |= WB_SETUP_FIFO_RST;

sys/dev/ic/w83l518d_sdmmc.c

482

wb_idx_write(wb, WB_INDEX_SETUP, val);

sys/dev/ic/w83l518d_sdmmc.c

582

uint8_t val;

sys/dev/ic/w83l518d_sdmmc.c

584

val = wb_read(wb, WB_SD_INTSTS);

sys/dev/ic/w83l518d_sdmmc.c

585

if (val == 0xff || val == 0x00)

sys/dev/ic/w83l518d_sdmmc.c

591

wb->wb_sdmmc_intsts |= val;

sys/dev/ic/w83l518d_sdmmc.c

598

val);

sys/dev/ic/w83l518d_sdmmc.c

602

if (val & WB_INT_CARD)

sys/dev/ic/w83l518d_sdmmc.c

620

uint8_t val;

sys/dev/ic/w83l518d_sdmmc.c

622

val = wb_read(wb, WB_SD_CSR);

sys/dev/ic/w83l518d_sdmmc.c

623

val &= ~WB_CSR_POWER_N;

sys/dev/ic/w83l518d_sdmmc.c

624

wb_write(wb, WB_SD_CSR, val);

sys/dev/ic/wd33c93.c

886

u_char val;

sys/dev/ic/wd33c93.c

890

GET_SBIC_asr(sc, val);

sys/dev/ic/wd33c93.c

891

while ((val & until) == 0) {

sys/dev/ic/wd33c93.c

896

line, val, csr);

sys/dev/ic/wd33c93.c

900

return(val); /* Maybe I should abort */

sys/dev/ic/wd33c93.c

904

GET_SBIC_asr(sc, val);

sys/dev/ic/wd33c93.c

906

return(val);

sys/dev/ic/wd33c93reg.h

173

#define SBIC_TIMEOUT(val,clk) ((((val) * (clk)) / 800) + 1)

sys/dev/ic/wd33c93reg.h

379

#define wd33c93_read_reg(sc,regno,val) \

sys/dev/ic/wd33c93reg.h

382

(val) = bus_space_read_1((sc)->sc_regt,(sc)->sc_data_regh, 0); \

sys/dev/ic/wd33c93reg.h

385

#define wd33c93_write_reg(sc,regno,val) \

sys/dev/ic/wd33c93reg.h

388

bus_space_write_1((sc)->sc_regt, (sc)->sc_data_regh, 0, (val)); \

sys/dev/ic/wd33c93reg.h

391

#define SET_SBIC_myid(sc,val) wd33c93_write_reg(sc,SBIC_myid,val)

sys/dev/ic/wd33c93reg.h

392

#define GET_SBIC_myid(sc,val) wd33c93_read_reg(sc,SBIC_myid,val)

sys/dev/ic/wd33c93reg.h

393

#define SET_SBIC_cdbsize(sc,val) wd33c93_write_reg(sc,SBIC_cdbsize,val)

sys/dev/ic/wd33c93reg.h

394

#define GET_SBIC_cdbsize(sc,val) wd33c93_read_reg(sc,SBIC_cdbsize,val)

sys/dev/ic/wd33c93reg.h

395

#define SET_SBIC_control(sc,val) wd33c93_write_reg(sc,SBIC_control,val)

sys/dev/ic/wd33c93reg.h

396

#define GET_SBIC_control(sc,val) wd33c93_read_reg(sc,SBIC_control,val)

sys/dev/ic/wd33c93reg.h

397

#define SET_SBIC_timeo(sc,val) wd33c93_write_reg(sc,SBIC_timeo,val)

sys/dev/ic/wd33c93reg.h

398

#define GET_SBIC_timeo(sc,val) wd33c93_read_reg(sc,SBIC_timeo,val)

sys/dev/ic/wd33c93reg.h

399

#define SET_SBIC_cdb1(sc,val) wd33c93_write_reg(sc,SBIC_cdb1,val)

sys/dev/ic/wd33c93reg.h

400

#define GET_SBIC_cdb1(sc,val) wd33c93_read_reg(sc,SBIC_cdb1,val)

sys/dev/ic/wd33c93reg.h

401

#define SET_SBIC_cdb2(sc,val) wd33c93_write_reg(sc,SBIC_cdb2,val)

sys/dev/ic/wd33c93reg.h

402

#define GET_SBIC_cdb2(sc,val) wd33c93_read_reg(sc,SBIC_cdb2,val)

sys/dev/ic/wd33c93reg.h

403

#define SET_SBIC_cdb3(sc,val) wd33c93_write_reg(sc,SBIC_cdb3,val)

sys/dev/ic/wd33c93reg.h

404

#define GET_SBIC_cdb3(sc,val) wd33c93_read_reg(sc,SBIC_cdb3,val)

sys/dev/ic/wd33c93reg.h

405

#define SET_SBIC_cdb4(sc,val) wd33c93_write_reg(sc,SBIC_cdb4,val)

sys/dev/ic/wd33c93reg.h

406

#define GET_SBIC_cdb4(sc,val) wd33c93_read_reg(sc,SBIC_cdb4,val)

sys/dev/ic/wd33c93reg.h

407

#define SET_SBIC_cdb5(sc,val) wd33c93_write_reg(sc,SBIC_cdb5,val)

sys/dev/ic/wd33c93reg.h

408

#define GET_SBIC_cdb5(sc,val) wd33c93_read_reg(sc,SBIC_cdb5,val)

sys/dev/ic/wd33c93reg.h

409

#define SET_SBIC_cdb6(sc,val) wd33c93_write_reg(sc,SBIC_cdb6,val)

sys/dev/ic/wd33c93reg.h

410

#define GET_SBIC_cdb6(sc,val) wd33c93_read_reg(sc,SBIC_cdb6,val)

sys/dev/ic/wd33c93reg.h

411

#define SET_SBIC_cdb7(sc,val) wd33c93_write_reg(sc,SBIC_cdb7,val)

sys/dev/ic/wd33c93reg.h

412

#define GET_SBIC_cdb7(sc,val) wd33c93_read_reg(sc,SBIC_cdb7,val)

sys/dev/ic/wd33c93reg.h

413

#define SET_SBIC_cdb8(sc,val) wd33c93_write_reg(sc,SBIC_cdb8,val)

sys/dev/ic/wd33c93reg.h

414

#define GET_SBIC_cdb8(sc,val) wd33c93_read_reg(sc,SBIC_cdb8,val)

sys/dev/ic/wd33c93reg.h

415

#define SET_SBIC_cdb9(sc,val) wd33c93_write_reg(sc,SBIC_cdb9,val)

sys/dev/ic/wd33c93reg.h

416

#define GET_SBIC_cdb9(sc,val) wd33c93_read_reg(sc,SBIC_cdb9,val)

sys/dev/ic/wd33c93reg.h

417

#define SET_SBIC_cdb10(sc,val) wd33c93_write_reg(sc,SBIC_cdb10,val)

sys/dev/ic/wd33c93reg.h

418

#define GET_SBIC_cdb10(sc,val) wd33c93_read_reg(sc,SBIC_cdb10,val)

sys/dev/ic/wd33c93reg.h

419

#define SET_SBIC_cdb11(sc,val) wd33c93_write_reg(sc,SBIC_cdb11,val)

sys/dev/ic/wd33c93reg.h

420

#define GET_SBIC_cdb11(sc,val) wd33c93_read_reg(sc,SBIC_cdb11,val)

sys/dev/ic/wd33c93reg.h

421

#define SET_SBIC_cdb12(sc,val) wd33c93_write_reg(sc,SBIC_cdb12,val)

sys/dev/ic/wd33c93reg.h

422

#define GET_SBIC_cdb12(sc,val) wd33c93_read_reg(sc,SBIC_cdb12,val)

sys/dev/ic/wd33c93reg.h

423

#define SET_SBIC_tlun(sc,val) wd33c93_write_reg(sc,SBIC_tlun,val)

sys/dev/ic/wd33c93reg.h

424

#define GET_SBIC_tlun(sc,val) wd33c93_read_reg(sc,SBIC_tlun,val)

sys/dev/ic/wd33c93reg.h

425

#define SET_SBIC_cmd_phase(sc,val) wd33c93_write_reg(sc,SBIC_cmd_phase,val)

sys/dev/ic/wd33c93reg.h

426

#define GET_SBIC_cmd_phase(sc,val) wd33c93_read_reg(sc,SBIC_cmd_phase,val)

sys/dev/ic/wd33c93reg.h

427

#define SET_SBIC_syn(sc,val) wd33c93_write_reg(sc,SBIC_syn,val)

sys/dev/ic/wd33c93reg.h

428

#define GET_SBIC_syn(sc,val) wd33c93_read_reg(sc,SBIC_syn,val)

sys/dev/ic/wd33c93reg.h

429

#define SET_SBIC_count_hi(sc,val) wd33c93_write_reg(sc,SBIC_count_hi,val)

sys/dev/ic/wd33c93reg.h

430

#define GET_SBIC_count_hi(sc,val) wd33c93_read_reg(sc,SBIC_count_hi,val)

sys/dev/ic/wd33c93reg.h

431

#define SET_SBIC_count_med(sc,val) wd33c93_write_reg(sc,SBIC_count_med,val)

sys/dev/ic/wd33c93reg.h

432

#define GET_SBIC_count_med(sc,val) wd33c93_read_reg(sc,SBIC_count_med,val)

sys/dev/ic/wd33c93reg.h

433

#define SET_SBIC_count_lo(sc,val) wd33c93_write_reg(sc,SBIC_count_lo,val)

sys/dev/ic/wd33c93reg.h

434

#define GET_SBIC_count_lo(sc,val) wd33c93_read_reg(sc,SBIC_count_lo,val)

sys/dev/ic/wd33c93reg.h

435

#define SET_SBIC_selid(sc,val) wd33c93_write_reg(sc,SBIC_selid,val)

sys/dev/ic/wd33c93reg.h

436

#define GET_SBIC_selid(sc,val) wd33c93_read_reg(sc,SBIC_selid,val)

sys/dev/ic/wd33c93reg.h

437

#define SET_SBIC_rselid(sc,val) wd33c93_write_reg(sc,SBIC_rselid,val)

sys/dev/ic/wd33c93reg.h

438

#define GET_SBIC_rselid(sc,val) wd33c93_read_reg(sc,SBIC_rselid,val)

sys/dev/ic/wd33c93reg.h

439

#define SET_SBIC_csr(sc,val) wd33c93_write_reg(sc,SBIC_csr,val)

sys/dev/ic/wd33c93reg.h

440

#define GET_SBIC_csr(sc,val) wd33c93_read_reg(sc,SBIC_csr,val)

sys/dev/ic/wd33c93reg.h

441

#define SET_SBIC_cmd(sc,val) wd33c93_write_reg(sc,SBIC_cmd,val)

sys/dev/ic/wd33c93reg.h

442

#define GET_SBIC_cmd(sc,val) wd33c93_read_reg(sc,SBIC_cmd,val)

sys/dev/ic/wd33c93reg.h

443

#define SET_SBIC_data(sc,val) wd33c93_write_reg(sc,SBIC_data,val)

sys/dev/ic/wd33c93reg.h

444

#define GET_SBIC_data(sc,val) wd33c93_read_reg(sc,SBIC_data,val)

sys/dev/ic/wd33c93reg.h

445

#define SET_SBIC_queue_tag(sc,val) wd33c93_write_reg(sc,SBIC_queue_tag,val)

sys/dev/ic/wd33c93reg.h

446

#define GET_SBIC_queue_tag(sc,val) wd33c93_read_reg(sc,SBIC_queue_tag,val)

sys/dev/ic/wd33c93reg.h

448

#define SBIC_TC_PUT(sc,val) \

sys/dev/ic/wd33c93reg.h

450

wd33c93_write_reg(sc,SBIC_count_hi,((val)>>16)); \

sys/dev/ic/wd33c93reg.h

452

(val)>>8); \

sys/dev/ic/wd33c93reg.h

454

(val)); \

sys/dev/ic/wd33c93reg.h

457

#define SBIC_TC_GET(sc,val) \

sys/dev/ic/wd33c93reg.h

459

wd33c93_read_reg(sc,SBIC_count_hi,(val)); \

sys/dev/ic/wd33c93reg.h

460

(val) = ((val)<<8) | bus_space_read_1((sc)->sc_regt, \

sys/dev/ic/wd33c93reg.h

462

(val) = ((val)<<8) | bus_space_read_1((sc)->sc_regt, \

sys/dev/ic/wd33c93reg.h

476

#define GET_SBIC_asr(sc,val) \

sys/dev/ic/wd33c93reg.h

478

(val) = bus_space_read_1((sc)->sc_regt,(sc)->sc_asr_regh, 0); \

sys/dev/ic/wdc.c

2026

uint32_t val;

sys/dev/ic/wdc.c

2028

val = bus_space_read_4(wdr->data32iot,

sys/dev/ic/wdc.c

2030

memcpy(bf, &val, 4);

sys/dev/ic/wdc.c

2036

uint16_t val;

sys/dev/ic/wdc.c

2038

val = bus_space_read_2(wdr->cmd_iot,

sys/dev/ic/wdc.c

2040

memcpy(bf, &val, 2);

sys/dev/ic/wdc.c

2047

uint32_t val;

sys/dev/ic/wdc.c

2049

val = bus_space_read_stream_4(wdr->data32iot,

sys/dev/ic/wdc.c

2051

memcpy(bf, &val, 4);

sys/dev/ic/wdc.c

2057

uint16_t val;

sys/dev/ic/wdc.c

2059

val = bus_space_read_stream_2(wdr->cmd_iot,

sys/dev/ic/wdc.c

2061

memcpy(bf, &val, 2);

sys/dev/ic/wdc.c

2131

uint32_t val;

sys/dev/ic/wdc.c

2133

memcpy(&val, bf, 4);

sys/dev/ic/wdc.c

2135

wdr->data32ioh, 0, val);

sys/dev/ic/wdc.c

2141

uint16_t val;

sys/dev/ic/wdc.c

2143

memcpy(&val, bf, 2);

sys/dev/ic/wdc.c

2145

wdr->cmd_iohs[wd_data], 0, val);

sys/dev/ic/wdc.c

2152

uint32_t val;

sys/dev/ic/wdc.c

2154

memcpy(&val, bf, 4);

sys/dev/ic/wdc.c

2156

wdr->data32ioh, 0, val);

sys/dev/ic/wdc.c

2162

uint16_t val;

sys/dev/ic/wdc.c

2164

memcpy(&val, bf, 2);

sys/dev/ic/wdc.c

2166

wdr->cmd_iohs[wd_data], 0, val);

sys/dev/ic/wi.c

1526

uint16_t val;

sys/dev/ic/wi.c

1540

if (wi_read_xrid(sc, WI_RID_CUR_TX_RATE, &val, sizeof(val)) == 0) {

sys/dev/ic/wi.c

1542

val = le16toh(val);

sys/dev/ic/wi.c

1543

rate = val * 2;

sys/dev/ic/wi.c

219

wi_write_val(struct wi_softc *sc, int rid, uint16_t val)

sys/dev/ic/wi.c

222

val = htole16(val);

sys/dev/ic/wi.c

223

return wi_write_rid(sc, rid, &val, sizeof(val));

sys/dev/ic/wi.c

2672

uint16_t val;

sys/dev/ic/wi.c

2680

val = (ic->ic_flags & IEEE80211_F_PRIVACY) ? 1 : 0;

sys/dev/ic/wi.c

2681

error = wi_write_val(sc, WI_RID_ENCRYPTION, val);

sys/dev/ic/wi.c

2717

val = PRIVACY_INVOKED;

sys/dev/ic/wi.c

2719

val |= EXCLUDE_UNENCRYPTED;

sys/dev/ic/wi.c

2726

val |= HOST_ENCRYPT;

sys/dev/ic/wi.c

2731

val = HOST_ENCRYPT | HOST_DECRYPT;

sys/dev/ic/wi.c

2733

error = wi_write_val(sc, WI_RID_P2_ENCRYPTION, val);

sys/dev/ic/wi.c

3198

uint16_t val;

sys/dev/ic/wi.c

3232

wi_read_xrid(sc, WI_RID_CURRENT_CHAN, &val, sizeof(val));

sys/dev/ic/wi.c

3233

if (!isset(ic->ic_chan_avail, le16toh(val)))

sys/dev/ic/wi.c

3235

device_xname(sc->sc_dev), le16toh(val));

sys/dev/ic/wi.c

3236

ni->ni_chan = &ic->ic_channels[le16toh(val)];

sys/dev/ic/wi.c

3295

uint16_t val[2];

sys/dev/ic/wi.c

3304

val[0] = htole16(chanmask); /* channel */

sys/dev/ic/wi.c

3305

val[1] = htole16(txrate); /* tx rate */

sys/dev/ic/wi.c

3306

error = wi_write_rid(sc, WI_RID_SCAN_REQ, val, sizeof(val));

sys/dev/ic/wi.c

3312

val[0] = htole16(BSCAN_BCAST | BSCAN_ONETIME);

sys/dev/ic/wi.c

3314

val, sizeof(val[0]));

sys/dev/ic/wi.c

367

uint16_t val, chanavail;

sys/dev/ic/wi.c

448

if (wi_read_xrid(sc, WI_RID_OWN_CHNL, &val, sizeof(val)) == 0) {

sys/dev/ic/wi.c

449

chan = le16toh(val);

sys/dev/ic/wi.c

462

wi_read_xrid(sc, WI_RID_DBM_ADJUST, &val, sizeof(val)) == 0)

sys/dev/ic/wi.c

463

sc->sc_dbm_offset = le16toh(val);

sys/dev/ic/wi.c

520

if (wi_read_xrid(sc, WI_RID_WEP_AVAIL, &val, sizeof(val)) == 0 &&

sys/dev/ic/wi.c

521

val != htole16(0))

sys/dev/ic/wivar.h

230

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/ic/wivar.h

232

(sc->sc_pci? reg * 2: reg) , htole32(val))

sys/dev/ic/wivar.h

233

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/ic/wivar.h

235

(sc->sc_pci? reg * 2: reg), htole16(val))

sys/dev/ic/wivar.h

236

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/ic/wivar.h

238

(sc->sc_pci? reg * 2: reg), val)

sys/dev/ic/wivar.h

252

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/ic/wivar.h

254

(sc->sc_pci? reg * 2: reg) , val)

sys/dev/ic/wivar.h

255

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/ic/wivar.h

257

(sc->sc_pci? reg * 2: reg), val)

sys/dev/ic/wivar.h

258

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/ic/wivar.h

260

(sc->sc_pci? reg * 2: reg), val)

sys/dev/ic/wivar.h

280

#define CSR_WRITE_STREAM_2(sc, reg, val) \

sys/dev/ic/wivar.h

282

(sc->sc_pci? reg * 2: reg), val)

sys/dev/ic/wivar.h

283

#define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \

sys/dev/ic/wivar.h

285

(sc->sc_pci? reg * 2: reg), val, count)

sys/dev/ieee1394/firewire.c

1702

off = offset + reg[i].val * sizeof(uint32_t);

sys/dev/ieee1394/firewire.c

1986

switch (reg->val) {

sys/dev/ieee1394/firewire.c

2010

__func__, reg->val);

sys/dev/ieee1394/fwcrom.c

105

ptr->dir = (struct csrdirectory *)(reg + reg->val);

sys/dev/ieee1394/fwcrom.c

155

if (reg->key == CSRKEY_SPEC && reg->val == spec)

sys/dev/ieee1394/fwcrom.c

160

if (reg->key == CSRKEY_VER && reg->val == ver)

sys/dev/ieee1394/fwcrom.c

188

if ((char *)(reg + reg->val) > CROM_END(cc)) {

sys/dev/ieee1394/fwcrom.c

194

textleaf = (struct csrtext *)(reg + reg->val);

sys/dev/ieee1394/fwcrom.c

300

l += snprintf(buf + l, len - l, "0x%x", reg->val);

sys/dev/ieee1394/fwcrom.c

307

reg->val, reg->val);

sys/dev/ieee1394/fwcrom.c

312

dir = (struct csrdirectory *) (reg + reg->val);

sys/dev/ieee1394/fwcrom.c

342

crom_desc_specver(0, reg->val, buf, len);

sys/dev/ieee1394/fwcrom.c

416

crom_add_entry(struct crom_chunk *chunk, int key, int val)

sys/dev/ieee1394/fwcrom.c

424

foo.reg.val = val;

sys/dev/ieee1394/fwcrom.c

514

reg->val =

sys/dev/ieee1394/iec13213.h

134

val:24;

sys/dev/ieee1394/iec13213.h

136

uint32_t val:24,

sys/dev/ieee1394/sbp.c

681

lun = reg->val & 0xffff;

sys/dev/ieee1394/sbp.c

739

lun = reg->val & 0xffff;

sys/dev/ieee1394/sbp.c

773

sdev->type = (reg->val & 0xff0000) >> 16;

sys/dev/ieee1394/sbp.c

851

if (reg == NULL || reg->val == 0) {

sys/dev/ieee1394/sbp.c

858

target->mgm_lo = 0xf0000000 | (reg->val << 2);

sys/dev/ieee1394/sbp.c

881

if (reg->val == CSRVAL_T10SBP2)

sys/dev/ieee1394/sbp.c

889

reg->val);

sys/dev/ipmi.c

1272

signextend(unsigned long val, int bits)

sys/dev/ipmi.c

1276

return -(val & ~msk) | val;

sys/dev/ipmi.c

1431

int64_t val, v1, v2, vs;

sys/dev/ipmi.c

1451

val = M * vs * v1 + B * v2;

sys/dev/ipmi.c

1459

case 1: val = logx(val,FIX1LOGE); break;

sys/dev/ipmi.c

1460

case 2: val = logx(val,FIX1LOG10); break;

sys/dev/ipmi.c

1461

case 3: val = logx(val,FIX1LOG2); break;

sys/dev/ipmi.c

1462

case 4: val = powx(FIXE,val); break;

sys/dev/ipmi.c

1463

case 5: val = powx(FIX10,val); break;

sys/dev/ipmi.c

1464

case 6: val = powx(FIX2,val); break;

sys/dev/ipmi.c

1465

case 7: val = powx(val,FIXMONE); break;

sys/dev/ipmi.c

1466

case 8: val = powx(val,FIX2); break;

sys/dev/ipmi.c

1467

case 9: val = powx(val,FIX3); break;

sys/dev/ipmi.c

1468

case 10: val = powx(val,FIXHALF); break;

sys/dev/ipmi.c

1469

case 11: val = powx(val,FIXTHIRD); break;

sys/dev/ipmi.c

1472

return FIX2INT(val);

sys/dev/ipmi.c

1479

int32_t val;

sys/dev/ipmi.c

1483

val = ipmi_convert(reading[0], s1, 6) + 273150000;

sys/dev/ipmi.c

1487

val = ipmi_convert(reading[0], s1, 6);

sys/dev/ipmi.c

1491

val = ipmi_convert(reading[0], s1, 0);

sys/dev/ipmi.c

1493

val *= 60; /* RPS -> RPM */

sys/dev/ipmi.c

1496

val = 0;

sys/dev/ipmi.c

1499

return val;

sys/dev/ipmi.c

339

bmc_write(struct ipmi_softc *sc, int offset, uint8_t val)

sys/dev/ipmi.c

342

offset * sc->sc_if_iospacing, val);

sys/dev/ipmi.c

554

smic_wait(struct ipmi_softc *sc, uint8_t mask, uint8_t val, const char *lbl)

sys/dev/ipmi.c

559

v = bmc_io_wait(sc, _SMIC_FLAG_REG, mask, val, __func__);

sys/dev/isa/aria.c

759

aria_putdspmem(struct aria_softc *sc, u_short loc, u_short val)

sys/dev/isa/aria.c

767

bus_space_write_2(iot, ioh, ARIADSP_DMADATA, val);

sys/dev/isa/cmsreg.h

130

#define CMS_WRITE(sc, chip, reg, val) \

sys/dev/isa/cmsreg.h

132

(sc)->sc_shadowregs[((chip)<<5) + (reg)] = val; \

sys/dev/isa/cmsreg.h

136

CMS_DATA0 + ((chip)<<1), (val)); \

sys/dev/isa/com_isa.c

277

char val, dips;

sys/dev/isa/com_isa.c

310

val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */

sys/dev/isa/com_isa.c

311

val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2);

sys/dev/isa/com_isa.c

312

if ((val & 0x70) < 0x20) {

sys/dev/isa/com_isa.c

313

printf("-old (%o)", val & 0x70);

sys/dev/isa/ega.c

236

u_int16_t oldval, val;

sys/dev/isa/ega.c

242

val = bus_space_read_2(memt, memh, 0);

sys/dev/isa/ega.c

245

if (val != 0xa55a)

sys/dev/isa/ega.c

259

u_int16_t oldval, val;

sys/dev/isa/ega.c

265

val = bus_space_read_2(memt, memh, 0);

sys/dev/isa/ega.c

268

if (val != 0xa55a)

sys/dev/isa/esp_isa.c

432

esp_isa_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/dev/isa/esp_isa.c

435

uint8_t v = val;

sys/dev/isa/ess.c

2556

ess_write_x_reg(struct ess_softc *sc, u_char reg, u_char val)

sys/dev/isa/ess.c

2560

DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));

sys/dev/isa/ess.c

2562

error = ess_wdsp(sc, val);

sys/dev/isa/ess.c

2574

int val;

sys/dev/isa/ess.c

2582

val = ess_rdsp(sc);

sys/dev/isa/ess.c

2583

DPRINTFN(2,("ess_read_x_reg: %02x=%02x\n", reg, val));

sys/dev/isa/ess.c

2584

return val;

sys/dev/isa/ess.c

2610

ess_write_mix_reg(struct ess_softc *sc, u_char reg, u_char val)

sys/dev/isa/ess.c

2615

DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));

sys/dev/isa/ess.c

2620

EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);

sys/dev/isa/ess.c

2631

u_char val;

sys/dev/isa/ess.c

2636

val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);

sys/dev/isa/ess.c

2638

DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));

sys/dev/isa/ess.c

2639

return val;

sys/dev/isa/finsio_isa.c

425

uint16_t val;

sys/dev/isa/finsio_isa.c

442

val = finsio_readreg(ia->ia_iot, ioh, FINSIO_MANUF) << 8;

sys/dev/isa/finsio_isa.c

443

val |= finsio_readreg(ia->ia_iot, ioh, FINSIO_MANUF + 1);

sys/dev/isa/finsio_isa.c

447

if (val != FINTEK_ID)

sys/dev/isa/finsio_isa.c

614

finsio_writereg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, int val)

sys/dev/isa/finsio_isa.c

617

bus_space_write_1(iot, ioh, FINSIO_DATA, val);

sys/dev/isa/i82365_isa.c

134

val = bus_space_read_1(iot, ioh, PCIC_REG_DATA);

sys/dev/isa/i82365_isa.c

136

if (pcic_ident_ok(val))

sys/dev/isa/i82365_isa.c

142

val = bus_space_read_1(iot, ioh, PCIC_REG_DATA);

sys/dev/isa/i82365_isa.c

144

if (pcic_ident_ok(val))

sys/dev/isa/i82365_isa.c

150

val = bus_space_read_1(iot, ioh, PCIC_REG_DATA);

sys/dev/isa/i82365_isa.c

152

if (pcic_ident_ok(val))

sys/dev/isa/i82365_isa.c

158

val = bus_space_read_1(iot, ioh, PCIC_REG_DATA);

sys/dev/isa/i82365_isa.c

160

if (pcic_ident_ok(val))

sys/dev/isa/i82365_isa.c

95

int val, found, msize;

sys/dev/isa/ics2101.c

63

#define cvt_value(val) ((val) >> 1)

sys/dev/isa/if_ai.c

205

uint8_t val, type;

sys/dev/isa/if_ai.c

245

val = bus_space_read_1(iot, ioh, AI_REVISION);

sys/dev/isa/if_ai.c

247

type = SL_BOARD(val);

sys/dev/isa/if_ai.c

303

uint8_t val = 0;

sys/dev/isa/if_ai.c

387

val = bus_space_read_1(asc->sc_regt, asc->sc_regh, AI_REVISION);

sys/dev/isa/if_ai.c

388

asc->card_rev = SL_REV(val);

sys/dev/isa/if_ai.c

389

asc->card_type = SL_BOARD(val) - 1;

sys/dev/isa/if_ate.c

187

uint8_t val;

sys/dev/isa/if_ate.c

191

val = bus_space_read_1(iot, ioh, p->port);

sys/dev/isa/if_ate.c

192

if ((val & p->mask) != p->bits) {

sys/dev/isa/if_ate.c

194

__func__, val, p->mask, p->bits);

sys/dev/isa/if_fmv_isa.c

185

uint8_t val;

sys/dev/isa/if_fmv_isa.c

189

val = bus_space_read_1(iot, ioh, p->port);

sys/dev/isa/if_fmv_isa.c

190

if ((val & p->mask) != p->bits) {

sys/dev/isa/if_fmv_isa.c

192

__func__, val, p->mask, p->bits);

sys/dev/isa/if_ix.c

360

int val = addr + (u_long)sc->sc_maddr - (u_long)sc->sc_iobase;

sys/dev/isa/if_ix.c

366

ptr = (char*)&val;

sys/dev/isa/if_ix.c

372

bus_space_write_4(sc->bt, sc->bh, offset, val);

sys/dev/isa/if_ix.c

422

uint8_t val, bart_config;

sys/dev/isa/if_ix.c

486

val = ix_read_eeprom(iot, ioh, 6) & 0xff;

sys/dev/isa/if_ix.c

488

if (val & 1)

sys/dev/isa/if_ix.c

490

val >>= 1;

sys/dev/isa/if_ix.c

495

switch (val) {

sys/dev/isa/if_ix.c

518

DPRINTF(("invalid memory size %02x\n", val));

sys/dev/isa/if_le_isa.c

153

le_isa_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/isa/if_le_isa.c

160

bus_space_write_2(iot, ioh, lesc->sc_rdp, val);

sys/dev/isa/if_le_isa.c

169

uint16_t val;

sys/dev/isa/if_le_isa.c

172

val = bus_space_read_2(iot, ioh, lesc->sc_rdp);

sys/dev/isa/if_le_isa.c

173

return (val);

sys/dev/isa/if_ntwoc_isa.c

116

ntwoc_isa_sca_write_1(struct sca_softc *sc, u_int reg, u_int8_t val)

sys/dev/isa/if_ntwoc_isa.c

119

(reg & 0xf), val);

sys/dev/isa/if_ntwoc_isa.c

123

ntwoc_isa_sca_write_2(struct sca_softc *sc, u_int reg, u_int16_t val)

sys/dev/isa/if_ntwoc_isa.c

126

(reg & 0xf), val);

sys/dev/isa/isv.c

129

isv_write(struct isv_regs *ir, bus_size_t reg, uint16_t val)

sys/dev/isa/isv.c

131

bus_space_write_2(ir->ir_bt, ir->ir_bh, reg, val);

sys/dev/isa/itesio_isa.c

413

itesio_ecwritereg(struct itesio_softc *sc, int reg, int val)

sys/dev/isa/itesio_isa.c

416

bus_space_write_1(sc->sc_iot, sc->sc_ec_ioh, ITESIO_EC_DATA, val);

sys/dev/isa/itesio_isa.c

430

itesio_writereg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, int val)

sys/dev/isa/itesio_isa.c

433

bus_space_write_1(iot, ioh, ITESIO_DATA, val);

sys/dev/isa/lm_isa_common.c

152

lm_isa_writereg(struct lm_softc *lmsc, int reg, uint8_t val)

sys/dev/isa/lm_isa_common.c

157

bus_space_write_1(sc->lm_iot, sc->lm_ioh, LMC_DATA, val);

sys/dev/isa/nct.c

562

nct_gpio_write(void *arg, int pin, int val)

sys/dev/isa/nct.c

572

if (val == GPIO_PIN_LOW) {

sys/dev/isa/nct.c

574

} else if (val == GPIO_PIN_HIGH) {

sys/dev/isa/nsclpcsio_isa.c

194

#define GPIO_WRITE(sc, reg, val) \

sys/dev/isa/nsclpcsio_isa.c

196

(sc)->sc_ld_ioh[SIO_LDN_GPIO], (reg), (val))

sys/dev/isa/nsclpcsio_isa.c

197

#define TMS_WRITE(sc, reg, val) \

sys/dev/isa/nsclpcsio_isa.c

199

(sc)->sc_ld_ioh[SIO_LDN_TMS], (reg), (val))

sys/dev/isa/nsclpcsio_isa.c

203

#define VLM_WRITE(sc, reg, val) \

sys/dev/isa/nsclpcsio_isa.c

205

(sc)->sc_ld_ioh[SIO_LDN_VLM], (reg), (val))

sys/dev/isa/pcdisplay.c

139

u_int16_t oldval, val;

sys/dev/isa/pcdisplay.c

145

val = bus_space_read_2(memt, memh, 0);

sys/dev/isa/pcdisplay.c

148

if (val != 0xa55a)

sys/dev/isa/pcdisplay.c

162

u_int16_t oldval, val;

sys/dev/isa/pcdisplay.c

168

val = bus_space_read_2(memt, memh, 0);

sys/dev/isa/pcdisplay.c

171

if (val != 0xa55a)

sys/dev/isa/radiotrack.c

233

int val;

sys/dev/isa/radiotrack.c

244

val = sc->vol - vol;

sys/dev/isa/radiotrack.c

245

if (val < 0) {

sys/dev/isa/radiotrack.c

246

val *= -1;

sys/dev/isa/radiotrack.c

253

DELAY(val * RT_VOLUME_DELAY);

sys/dev/isa/sbdsp.c

1673

sbdsp_adjust(int val, int mask)

sys/dev/isa/sbdsp.c

1676

val += (MAXVAL - mask) >> 1;

sys/dev/isa/sbdsp.c

1677

if (val >= MAXVAL)

sys/dev/isa/sbdsp.c

1678

val = MAXVAL-1;

sys/dev/isa/sbdsp.c

1679

return val & mask;

sys/dev/isa/sbdsp.c

494

sbdsp_mix_write(struct sbdsp_softc *sc, int mixerport, int val)

sys/dev/isa/sbdsp.c

503

bus_space_write_1(iot, ioh, SBP_MIXER_DATA, val);

sys/dev/isa/sbdsp.c

512

int val;

sys/dev/isa/sbdsp.c

518

val = bus_space_read_1(iot, ioh, SBP_MIXER_DATA);

sys/dev/isa/sbdsp.c

520

return val;

sys/dev/isa/smsc.c

280

smsc_writereg(bus_space_tag_t iot, bus_space_handle_t ioh, int reg, int val)

sys/dev/isa/smsc.c

283

bus_space_write_1(iot, ioh, SMSC_DATA, val);

sys/dev/isa/tcic2_isa.c

147

int val, found, msize;

sys/dev/isa/tcic2_isa.c

186

if ((val = tcic_chipid(iot, ioh))) {

sys/dev/isa/tcic2_isa.c

187

DPRINTF(("tcic id: 0x%02x\n", val));

sys/dev/isa/tcic2_isa.c

188

if (tcic_chipid_known(val))

sys/dev/isa/tcic2_isa.c

378

int val, reg;

sys/dev/isa/tcic2_isa.c

386

val = tcic_read_ind_2(h, reg);

sys/dev/isa/tcic2_isa.c

387

val &= ~TCIC_SCF1_IRQ_MASK;

sys/dev/isa/tcic2_isa.c

388

tcic_write_ind_2(h, reg, val);

sys/dev/isa/wds.c

212

int val)

sys/dev/isa/wds.c

215

while ((bus_space_read_1(iot, ioh, port) & mask) != val)

sys/dev/isa/ym.c

474

u_int prevval, val;

sys/dev/isa/ym.c

478

val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);

sys/dev/isa/ym.c

481

if (val != prevval) {

sys/dev/isa/ym.c

483

val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));

sys/dev/isa/ym.c

487

val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);

sys/dev/isa/ym.c

490

if (val != prevval) {

sys/dev/isa/ym.c

492

val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));

sys/dev/isa/ym.c

521

struct ad1848_volume *val, int reg)

sys/dev/isa/ym.c

527

ad1848_to_vol(cp, val);

sys/dev/isa/ym.c

529

l = val->left;

sys/dev/isa/ym.c

530

r = val->right;

sys/dev/isapnp/if_le_isapnp.c

132

le_isapnp_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/isapnp/if_le_isapnp.c

139

bus_space_write_2(iot, ioh, lesc->sc_rdp, val);

sys/dev/isapnp/if_le_isapnp.c

148

uint16_t val;

sys/dev/isapnp/if_le_isapnp.c

151

val = bus_space_read_2(iot, ioh, lesc->sc_rdp);

sys/dev/isapnp/if_le_isapnp.c

152

return (val);

sys/dev/iscsi/base64.c

134

uint32_t val = 0;

sys/dev/iscsi/base64.c

141

val *= 64;

sys/dev/iscsi/base64.c

147

val += pos(token[i]);

sys/dev/iscsi/base64.c

153

return (marker << 24) | val;

sys/dev/iscsi/base64.c

165

uint32_t val = token_decode(p);

sys/dev/iscsi/base64.c

166

marker = (val >> 24) & 0xff;

sys/dev/iscsi/base64.c

167

if (val == DECODE_ERROR) {

sys/dev/iscsi/base64.c

170

*q++ = (val >> 16) & 0xff;

sys/dev/iscsi/base64.c

172

*q++ = (val >> 8) & 0xff;

sys/dev/iscsi/base64.c

175

*q++ = val & 0xff;

sys/dev/iscsi/iscsi_globals.h

570

hton3(uint32_t val, uint8_t *bytes)

sys/dev/iscsi/iscsi_globals.h

572

bytes[0] = (uint8_t) (val >> 16);

sys/dev/iscsi/iscsi_globals.h

573

bytes[1] = (uint8_t) (val >> 8);

sys/dev/iscsi/iscsi_globals.h

574

bytes[2] = (uint8_t) val;

sys/dev/iscsi/iscsi_text.c

1007

par->val.sval = val;

sys/dev/iscsi/iscsi_text.c

1034

uint32_t n = par->val.nval[0];

sys/dev/iscsi/iscsi_text.c

1165

set_key_s(state, key, par->val.sval);

sys/dev/iscsi/iscsi_text.c

1177

copyoutstr(par->val.sval, conn->c_login_par->TargetAlias,

sys/dev/iscsi/iscsi_text.c

1293

cpar->val.nval[i] = par->auth_info.auth_type[i];

sys/dev/iscsi/iscsi_text.c

130

val_kind_t val; /* the value type */

sys/dev/iscsi/iscsi_text.c

1384

if (rxp.val.nval[0] != ISCSI_AUTH_CHAP) {

sys/dev/iscsi/iscsi_text.c

1385

DEBOUT(("AuthMethod isn't CHAP (%d)\n", rxp.val.nval[0]));

sys/dev/iscsi/iscsi_text.c

1390

state->auth_alg = rxp.val.nval[0];

sys/dev/iscsi/iscsi_text.c

1395

rxp.val.nval[0] != ISCSI_CHAP_MD5) {

sys/dev/iscsi/iscsi_text.c

1397

state->auth_state, rxp.val.nval[0]));

sys/dev/iscsi/iscsi_text.c

1408

challenge = rxp.val.sval;

sys/dev/iscsi/iscsi_text.c

1417

state->auth_state, rxp.val.nval[0]));

sys/dev/iscsi/iscsi_text.c

1420

identifier = (uint8_t) rxp.val.nval[0];

sys/dev/iscsi/iscsi_text.c

1426

state->auth_state, rxp.val.sval));

sys/dev/iscsi/iscsi_text.c

1438

response = rxp.val.sval;

sys/dev/iscsi/iscsi_text.c

1562

cpar->val.nval[1] = 1;

sys/dev/iscsi/iscsi_text.c

1569

cpar->val.nval[1] = 1;

sys/dev/iscsi/iscsi_text.c

1727

assemble_send_targets(pdu_t *pdu, uint8_t *val)

sys/dev/iscsi/iscsi_text.c

1735

par.val.sval = val;

sys/dev/iscsi/iscsi_text.c

181

} val;

sys/dev/iscsi/iscsi_text.c

302

int val;

sys/dev/iscsi/iscsi_text.c

306

par->val.sval = buf;

sys/dev/iscsi/iscsi_text.c

312

val = (hexdig(c) << 4) | hexdig(*buf);

sys/dev/iscsi/iscsi_text.c

313

if (val < 0) {

sys/dev/iscsi/iscsi_text.c

316

*dp++ = (uint8_t) val;

sys/dev/iscsi/iscsi_text.c

322

par->list_num = dp - par->val.sval;

sys/dev/iscsi/iscsi_text.c

325

buf = base64_decode(&buf[2], par->val.sval, &par->list_num);

sys/dev/iscsi/iscsi_text.c

350

uint32_t val = 0;

sys/dev/iscsi/iscsi_text.c

360

val = (val << 4) | n;

sys/dev/iscsi/iscsi_text.c

367

val = val * 10 + (c - '0');

sys/dev/iscsi/iscsi_text.c

370

*pval = val;

sys/dev/iscsi/iscsi_text.c

550

par->val.sval = buf;

sys/dev/iscsi/iscsi_text.c

555

buf, i, entries[i].val, bp));

sys/dev/iscsi/iscsi_text.c

558

switch (entries[i].val) {

sys/dev/iscsi/iscsi_text.c

560

bp = get_numval(bp, &par->val.nval[0], '\0');

sys/dev/iscsi/iscsi_text.c

568

bp = get_strval(bp, &par->val.sval);

sys/dev/iscsi/iscsi_text.c

572

bp = get_ynval(bp, &par->val.nval[0]);

sys/dev/iscsi/iscsi_text.c

576

bp = get_authval(bp, &par->val.nval[0]);

sys/dev/iscsi/iscsi_text.c

580

bp = get_digestval(bp, &par->val.nval[0]);

sys/dev/iscsi/iscsi_text.c

584

bp = get_range(bp, &par->val.nval[0], &par->val.nval[1]);

sys/dev/iscsi/iscsi_text.c

640

c = par->val.sval[k] >> 4;

sys/dev/iscsi/iscsi_text.c

642

c = par->val.sval[k] & 0xf;

sys/dev/iscsi/iscsi_text.c

649

return base64_encode(par->val.sval, par->list_num, buf);

sys/dev/iscsi/iscsi_text.c

671

entries[par->key].name, par->key, entries[par->key].val));

sys/dev/iscsi/iscsi_text.c

674

return snprintf(buf, len, "%s=NotUnderstood", par->val.sval);

sys/dev/iscsi/iscsi_text.c

682

switch (entries[par->key].val) {

sys/dev/iscsi/iscsi_text.c

685

par->val.nval[i]);

sys/dev/iscsi/iscsi_text.c

694

cl = my_strcpy(&buf[cc], par->val.sval);

sys/dev/iscsi/iscsi_text.c

699

(par->val.nval[i]) ? "Yes" : "No");

sys/dev/iscsi/iscsi_text.c

703

switch (par->val.nval[i]) {

sys/dev/iscsi/iscsi_text.c

722

(par->val.nval[i]) ? "CRC32C" : "None");

sys/dev/iscsi/iscsi_text.c

730

"%d~%d", par->val.nval[i],

sys/dev/iscsi/iscsi_text.c

731

par->val.nval[i + 1]);

sys/dev/iscsi/iscsi_text.c

737

cl = my_strcpy(&buf[cc], par->val.sval);

sys/dev/iscsi/iscsi_text.c

742

(par->val.nval[i]) ? "Normal" : "Discovery");

sys/dev/iscsi/iscsi_text.c

749

entries[par->key].val));

sys/dev/iscsi/iscsi_text.c

816

return strlen(par->val.sval) + 15;

sys/dev/iscsi/iscsi_text.c

822

switch (entries[par->key].val) {

sys/dev/iscsi/iscsi_text.c

825

par->val.nval[i]);

sys/dev/iscsi/iscsi_text.c

839

size += strlen(par->val.sval);

sys/dev/iscsi/iscsi_text.c

843

size += (par->val.nval[i]) ? 3 : 2;

sys/dev/iscsi/iscsi_text.c

847

size += (par->val.nval[i] == ISCSI_AUTH_SRP) ? 3 : 4;

sys/dev/iscsi/iscsi_text.c

851

size += (par->val.nval[i]) ? 6 : 4;

sys/dev/iscsi/iscsi_text.c

857

par->val.nval[i],

sys/dev/iscsi/iscsi_text.c

858

par->val.nval[i + 1]);

sys/dev/iscsi/iscsi_text.c

865

size += (par->val.nval[i]) ? 6 : 9;

sys/dev/iscsi/iscsi_text.c

871

entries[par->key].val));

sys/dev/iscsi/iscsi_text.c

965

set_key_n(negotiation_state_t *state, text_key_t key, uint32_t val)

sys/dev/iscsi/iscsi_text.c

977

par->val.nval[0] = val;

sys/dev/iscsi/iscsi_text.c

995

set_key_s(negotiation_state_t *state, text_key_t key, uint8_t *val)

sys/dev/keylock.c

165

int val;

sys/dev/keylock.c

168

node.sysctl_data = &val;

sys/dev/keylock.c

170

val = keylock_position();

sys/dev/keylock.c

178

int val;

sys/dev/keylock.c

181

node.sysctl_data = &val;

sys/dev/keylock.c

183

val = keylock_state();

sys/dev/keylock.c

191

int val, error;

sys/dev/keylock.c

194

node.sysctl_data = &val;

sys/dev/keylock.c

196

val = keylock_order;

sys/dev/keylock.c

203

keylock_order = val;

sys/dev/marvell/gtethreg.h

178

#define ETH_ESMIR_WRITE(phy, reg, val) (ETH__INS(phy, 16)|\

sys/dev/marvell/gtethreg.h

180

ETH__INS(val, 0)|\

sys/dev/marvell/gtidmac.c

1858

uint32_t val;

sys/dev/marvell/gtidmac.c

1863

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GTIDMAC_CIDMABCR(chan));

sys/dev/marvell/gtidmac.c

1864

snprintb(buf, sizeof(buf), "\177\020b\037Own\0b\036BCLeft\0", val);

sys/dev/marvell/gtidmac.c

1867

val & GTIDMAC_CIDMABCR_BYTECNT_MASK);

sys/dev/marvell/gtidmac.c

1877

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GTIDMAC_CCLR(chan));

sys/dev/marvell/gtidmac.c

1881

val);

sys/dev/marvell/gtidmac.c

1884

(val & GTIDMAC_CCLR_SBL_MASK) == GTIDMAC_CCLR_SBL_128B ? "128" :

sys/dev/marvell/gtidmac.c

1885

(val & GTIDMAC_CCLR_SBL_MASK) == GTIDMAC_CCLR_SBL_64B ? "64" :

sys/dev/marvell/gtidmac.c

1886

(val & GTIDMAC_CCLR_SBL_MASK) == GTIDMAC_CCLR_SBL_32B ? "32" :

sys/dev/marvell/gtidmac.c

1887

(val & GTIDMAC_CCLR_SBL_MASK) == GTIDMAC_CCLR_SBL_16B ? "16" :

sys/dev/marvell/gtidmac.c

1888

(val & GTIDMAC_CCLR_SBL_MASK) == GTIDMAC_CCLR_SBL_8B ? "8" :

sys/dev/marvell/gtidmac.c

1891

(val & GTIDMAC_CCLR_DBL_MASK) == GTIDMAC_CCLR_DBL_128B ? "128" :

sys/dev/marvell/gtidmac.c

1892

(val & GTIDMAC_CCLR_DBL_MASK) == GTIDMAC_CCLR_DBL_64B ? "64" :

sys/dev/marvell/gtidmac.c

1893

(val & GTIDMAC_CCLR_DBL_MASK) == GTIDMAC_CCLR_DBL_32B ? "32" :

sys/dev/marvell/gtidmac.c

1894

(val & GTIDMAC_CCLR_DBL_MASK) == GTIDMAC_CCLR_DBL_16B ? "16" :

sys/dev/marvell/gtidmac.c

1895

(val & GTIDMAC_CCLR_DBL_MASK) == GTIDMAC_CCLR_DBL_8B ? "8" :

sys/dev/marvell/gtidmac.c

1898

val & GTIDMAC_CCLR_CHAINMODE_NC ? "Non-" : "");

sys/dev/marvell/gtidmac.c

1900

val & GTIDMAC_CCLR_TRANSFERMODE_B ? "Block" : "Demand");

sys/dev/marvell/gtidmac.c

1902

val & GTIDMAC_CCLR_DESCMODE_16M ? "16M" : "64k");

sys/dev/marvell/gtidmac.c

1903

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GTIDMAC_CCHR(chan));

sys/dev/marvell/gtidmac.c

1905

"\177\020b\001DescByteSwap\0b\000Endianness\0", val);

sys/dev/marvell/gtidmac.c

1967

uint32_t val, opmode;

sys/dev/marvell/gtidmac.c

1972

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, MVXORE_XEXCR(sc, chan));

sys/dev/marvell/gtidmac.c

1976

val);

sys/dev/marvell/gtidmac.c

1978

opmode = val & MVXORE_XEXCR_OM_MASK;

sys/dev/marvell/gtidmac.c

1987

(val & MVXORE_XEXCR_SBL_MASK) == MVXORE_XEXCR_SBL_128B ? "128" :

sys/dev/marvell/gtidmac.c

1988

(val & MVXORE_XEXCR_SBL_MASK) == MVXORE_XEXCR_SBL_64B ? "64" :

sys/dev/marvell/gtidmac.c

1989

(val & MVXORE_XEXCR_SBL_MASK) == MVXORE_XEXCR_SBL_32B ? "32" :

sys/dev/marvell/gtidmac.c

1992

(val & MVXORE_XEXCR_SBL_MASK) == MVXORE_XEXCR_SBL_128B ? "128" :

sys/dev/marvell/gtidmac.c

1993

(val & MVXORE_XEXCR_SBL_MASK) == MVXORE_XEXCR_SBL_64B ? "64" :

sys/dev/marvell/gtidmac.c

1994

(val & MVXORE_XEXCR_SBL_MASK) == MVXORE_XEXCR_SBL_32B ? "32" :

sys/dev/marvell/gtidmac.c

1996

val =

sys/dev/marvell/gtidmac.c

1998

printf(" Activation : 0x%08x\n", val);

sys/dev/marvell/gtidmac.c

1999

val &= MVXORE_XEXACTR_XESTATUS_MASK;

sys/dev/marvell/gtidmac.c

2001

val == MVXORE_XEXACTR_XESTATUS_NA ? "Channel not active" :

sys/dev/marvell/gtidmac.c

2002

val == MVXORE_XEXACTR_XESTATUS_ACT ? "Channel active" :

sys/dev/marvell/gtidmac.c

2003

val == MVXORE_XEXACTR_XESTATUS_P ? "Channel paused" : "???");

sys/dev/marvell/gtidmac.c

2028

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh,

sys/dev/marvell/gtidmac.c

2030

if (val & MVXORE_XETMCR_TIMEREN) {

sys/dev/marvell/gtidmac.c

2031

val >>= MVXORE_XETMCR_SECTIONSIZECTRL_SHIFT;

sys/dev/marvell/gtidmac.c

2032

val &= MVXORE_XETMCR_SECTIONSIZECTRL_MASK;

sys/dev/marvell/gtidmac.c

2033

printf(" SectionSizeCtrl : 0x%08x\n", 2 ^ val);

sys/dev/marvell/if_gfe.c

298

gfec_mii_read(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/marvell/if_gfe.c

338

*val = ETH_ESMIR_Value_GET(data);

sys/dev/marvell/if_mvgbe.c

161

#define MVGBE_EVCNT_ADD(ev, val) (ev)->ev_count += (val)

sys/dev/marvell/if_mvgbe.c

164

#define MVGBE_EVCNT_ADD(ev, val) /* nothing */

sys/dev/marvell/if_mvgbe.c

519

mvgbec_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/marvell/if_mvgbe.c

554

*val = smi & MVGBE_SMI_DATA_MASK;

sys/dev/marvell/if_mvgbe.c

567

phy, reg, *val));

sys/dev/marvell/if_mvgbe.c

573

mvgbec_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/marvell/if_mvgbe.c

588

phy, reg, val));

sys/dev/marvell/if_mvgbe.c

604

MVGBE_SMI_OPCODE_WRITE | (val & MVGBE_SMI_DATA_MASK);

sys/dev/marvell/if_mvgbe.c

82

#define MVGBE_WRITE(sc, reg, val) \

sys/dev/marvell/if_mvgbe.c

83

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/marvell/if_mvgbe.c

84

#define MVGBE_READ_FILTER(sc, reg, val, c) \

sys/dev/marvell/if_mvgbe.c

85

bus_space_read_region_4((sc)->sc_iot, (sc)->sc_dafh, (reg), (val), (c))

sys/dev/marvell/if_mvgbe.c

86

#define MVGBE_WRITE_FILTER(sc, reg, val, c) \

sys/dev/marvell/if_mvgbe.c

87

bus_space_write_region_4((sc)->sc_iot, (sc)->sc_dafh, (reg), (val), (c))

sys/dev/marvell/if_mvxpe.c

2811

uint64_t val;

sys/dev/marvell/if_mvxpe.c

2826

val = arg->counter;

sys/dev/marvell/if_mvxpe.c

2829

node.sysctl_data = &val;

sys/dev/marvell/if_mvxpe.c

2845

int val;

sys/dev/marvell/if_mvxpe.c

2853

val = 0;

sys/dev/marvell/if_mvxpe.c

2854

node.sysctl_data = &val;

sys/dev/marvell/if_mvxpe.c

2858

if (val < 0 || val > 1)

sys/dev/marvell/if_mvxpe.c

2860

if (val == 1) {

sys/dev/marvell/if_mvxpe.c

2878

int val;

sys/dev/marvell/if_mvxpe.c

2901

val = rx->rx_queue_len;

sys/dev/marvell/if_mvxpe.c

2907

val = tx->tx_queue_len;

sys/dev/marvell/if_mvxpe.c

2912

node.sysctl_data = &val;

sys/dev/marvell/if_mvxpe.c

2920

if (val < 8 || val > MVXPE_RX_RING_CNT) {

sys/dev/marvell/if_mvxpe.c

2927

rx->rx_queue_len = val;

sys/dev/marvell/if_mvxpe.c

2941

tx->tx_queue_len = val;

sys/dev/marvell/if_mvxpe.c

3241

uint64_t val;

sys/dev/marvell/if_mvxpe.c

3257

val = ((uint64_t)val_hi << 32) | (uint64_t)val_lo;

sys/dev/marvell/if_mvxpe.c

3258

sc->sc_sysctl_mib[i].counter += val;

sys/dev/marvell/if_mvxpe.c

3262

if_statadd(ifp, if_oerrors, val);

sys/dev/marvell/if_mvxpe.c

3265

if_statadd(ifp, if_ierrors, val);

sys/dev/marvell/if_mvxpe.c

3268

if_statadd(ifp, if_collisions, val);

sys/dev/marvell/if_mvxpe.c

686

mvxpe_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/marvell/if_mvxpe.c

714

*val = smi & MVXPE_SMI_DATA_MASK;

sys/dev/marvell/if_mvxpe.c

725

DPRINTDEV(dev, 9, "phy=%d, reg=%#x, val=%#hx\n", phy, reg, *val);

sys/dev/marvell/if_mvxpe.c

731

mvxpe_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/marvell/if_mvxpe.c

738

DPRINTDEV(dev, 9, "phy=%d reg=%#x val=%#hx\n", phy, reg, val);

sys/dev/marvell/if_mvxpe.c

754

MVXPE_SMI_OPCODE_WRITE | (val & MVXPE_SMI_DATA_MASK);

sys/dev/marvell/if_mvxpevar.h

202

#define MVXPE_EVCNT_ADD(ev, val) (ev)->ev_count += (val)

sys/dev/marvell/if_mvxpevar.h

205

#define MVXPE_EVCNT_ADD(ev, val) /* nothing */

sys/dev/marvell/if_mvxpevar.h

74

#define MVXPE_WRITE(sc, reg, val) \

sys/dev/marvell/if_mvxpevar.h

75

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/marvell/if_mvxpevar.h

77

#define MVXPE_READ_REGION(sc, reg, val, c) \

sys/dev/marvell/if_mvxpevar.h

78

bus_space_read_region_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val), (c))

sys/dev/marvell/if_mvxpevar.h

79

#define MVXPE_WRITE_REGION(sc, reg, val, c) \

sys/dev/marvell/if_mvxpevar.h

80

bus_space_write_region_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val), (c))

sys/dev/marvell/mvxpsec.c

294

#define MVXPSEC_WRITE(sc, off, val) \

sys/dev/marvell/mvxpsec.c

295

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (off), (val))

sys/dev/marvell/mvxpsecvar.h

380

#define MVXPSEC_EVCNT_ADD(sc, name, val) do { \

sys/dev/marvell/mvxpsecvar.h

381

(sc)->sc_ev.name.ev_count += (val); \

sys/dev/marvell/mvxpsecvar.h

383

#define MVXPSEC_EVCNT_MAX(sc, name, val) do { \

sys/dev/marvell/mvxpsecvar.h

384

if ((val) > (sc)->sc_ev.name.ev_count) \

sys/dev/marvell/mvxpsecvar.h

385

(sc)->sc_ev.name.ev_count = (val); \

sys/dev/marvell/mvxpsecvar.h

389

#define MVXPSEC_EVCNT_ADD(sc, name, val) /* nothing */

sys/dev/marvell/mvxpsecvar.h

390

#define MVXPSEC_EVCNT_MAX(sc, name, val) /* nothing */

sys/dev/mca/edc_mca.c

551

int val;

sys/dev/mca/edc_mca.c

566

while((val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, BSR))

sys/dev/mca/edc_mca.c

568

if (poll && (val & BSR_INTR))

sys/dev/mca/esp_mca.c

272

esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/dev/mca/esp_mca.c

276

bus_space_write_1(esc->sc_iot, esc->sc_esp_ioh, reg, val);

sys/dev/mca/if_le_mca.c

295

le_mca_wrreg(struct le_mca_softc *sc, int val, int type)

sys/dev/mca/if_le_mca.c

306

bus_space_write_2(sc->sc_memt, sc->sc_memh, LE_LANCEREG, val);

sys/dev/mca/if_le_mca.c

318

le_mca_wrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/mca/if_le_mca.c

323

le_mca_wrreg(lsc, val, RDATA | REGWRITE);

sys/dev/microcode/siop/ncr53cxxx.c

470

void setarch(char *val)

sys/dev/microcode/siop/ncr53cxxx.c

472

switch (atoi(val)) {

sys/dev/microcode/tools/bin2blob.c

59

put(uint32_t val)

sys/dev/microcode/tools/bin2blob.c

72

printf("0x%08x,", val);

sys/dev/midictl.c

216

uint_fast16_t key, val;

sys/dev/midictl.c

312

val = store_extract(mc->store, c, chan, key);

sys/dev/midictl.c

313

if ( !(val&C7_SET) )

sys/dev/midictl.c

325

val = store_extract(mc->store, c, chan, key);

sys/dev/midictl.c

326

if ( !(val&C1_SET) )

sys/dev/midictl.c

343

uint_fast16_t key, val;

sys/dev/midictl.c

356

!(C1_SET&(val = store_extract(mc->store, c, chan, key))) ) {

sys/dev/midictl.c

357

val = C1_SET | (dflt > 63); /* convert to boolean */

sys/dev/midictl.c

358

store_update(mc->store, c, chan, key, val);

sys/dev/midictl.c

360

return (val & 1) ? 127 : 0;

sys/dev/midictl.c

364

!(C7_SET&(val = store_extract(mc->store, c, chan, key))) ) {

sys/dev/midictl.c

365

val = C7_SET | (dflt & 0x7f);

sys/dev/midictl.c

366

store_update(mc->store, c, chan, key, val);

sys/dev/midictl.c

368

return val & 0x7f;

sys/dev/midictl.c

448

_Bool islsb, uint8_t val)

sys/dev/midictl.c

462

stval = C14LSET | val | ( stval & ~0x7f );

sys/dev/midictl.c

464

stval = C14MSET | ( val << 7 ) | ( stval & ~0x3f80 );

sys/dev/midictl.c

475

uint16_t val;

sys/dev/midictl.c

484

val = store_extract(mc->store, c, chan, key);

sys/dev/midictl.c

485

switch ( val & (C14MSET|C14LSET) ) {

sys/dev/midictl.c

487

return val & 0x3fff;

sys/dev/midictl.c

489

val = C14LSET | (val & ~0x7f) | (dflt & 0x7f);

sys/dev/midictl.c

492

val = C14MSET | (val & ~0x3f8) | (dflt & 0x3f8);

sys/dev/midictl.c

496

val = C14MSET|C14LSET | (dflt & 0x3fff);

sys/dev/midictl.c

498

store_update(mc->store, c, chan, key, val);

sys/dev/midictl.c

499

return val & 0x3fff;

sys/dev/midictl.c

649

uint32_t val;

sys/dev/midictl.c

662

val = (uint32_t)(table[idx] & mask);

sys/dev/midictl.c

663

if ( val == k )

sys/dev/midictl.c

665

if ( !(val & IS_USED) )

sys/dev/midictl.c

82

uint_fast16_t key, _Bool islsb, uint8_t val);

sys/dev/mii/brgphy.c

1051

uint16_t val;

sys/dev/mii/brgphy.c

1069

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/mii/brgphy.c

1078

uint16_t val;

sys/dev/mii/brgphy.c

1088

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/mii/brgphy.c

1115

uint16_t val;

sys/dev/mii/brgphy.c

1124

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/mii/brgphy.c

1132

uint16_t val;

sys/dev/mii/brgphy.c

1145

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/mii/brgphy.c

1153

uint16_t val;

sys/dev/mii/brgphy.c

1162

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/mii/brgphy.c

1170

uint16_t val;

sys/dev/mii/brgphy.c

1185

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/mii/brgphy.c

1194

uint16_t val;

sys/dev/mii/brgphy.c

1205

PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);

sys/dev/mii/brgphy.c

1211

uint16_t val;

sys/dev/mii/brgphy.c

1214

PHY_READ(sc, BRGPHY_MII_DSP_RW_PORT, &val);

sys/dev/mii/brgphy.c

1215

val &= ~(1 << 8);

sys/dev/mii/brgphy.c

1216

PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, val);

sys/dev/mii/brgphy.c

1223

uint16_t val;

sys/dev/mii/brgphy.c

1232

PHY_READ(sc, BRGPHY_MII_AUXCTL, &val);

sys/dev/mii/brgphy.c

1234

val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7));

sys/dev/mii/brgphy.c

1237

PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL, &val);

sys/dev/mii/brgphy.c

1238

PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, val & ~BRGPHY_PHY_EXTCTL_HIGH_LA);

sys/dev/mii/brgphy.c

1244

uint16_t val;

sys/dev/mii/brgphy.c

1248

PHY_READ(sc, BRGPHY_MII_AUXCTL, &val);

sys/dev/mii/brgphy.c

1249

PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4));

sys/dev/mii/brgphy.c

1255

uint16_t val;

sys/dev/mii/brgphy.c

1259

PHY_READ(sc, BRGPHY_MII_AUXCTL, &val);

sys/dev/mii/brgphy.c

1260

val &= BRGPHY_AUXCTL_MISC_DATA_MASK;

sys/dev/mii/brgphy.c

1262

val |= BRGPHY_AUXCTL_MISC_RGMII_SKEW_EN;

sys/dev/mii/brgphy.c

1264

val &= ~BRGPHY_AUXCTL_MISC_RGMII_SKEW_EN;

sys/dev/mii/brgphy.c

1266

BRGPHY_AUXCTL_SHADOW_MISC | val);

sys/dev/mii/brgphy.c

1269

PHY_READ(sc, BRGPHY_MII_SHADOW_1C, &val);

sys/dev/mii/brgphy.c

1270

val &= BRGPHY_SHADOW_1C_DATA_MASK;

sys/dev/mii/brgphy.c

1272

val |= BRGPHY_SHADOW_1C_GTXCLK_EN;

sys/dev/mii/brgphy.c

1274

val &= ~BRGPHY_SHADOW_1C_GTXCLK_EN;

sys/dev/mii/brgphy.c

1276

BRGPHY_SHADOW_1C_CLK_CTRL | val);

sys/dev/mii/igphy.c

177

uint16_t val;

sys/dev/mii/igphy.c

276

for (i = 0; !((code[i].reg == 0) && (code[i].val == 0)); i++)

sys/dev/mii/igphy.c

277

IGPHY_WRITE(sc, code[i].reg, code[i].val);

sys/dev/mii/igphy.c

294

for (i = 0; !((code[i].reg == 0) && (code[i].val == 0)); i++)

sys/dev/mii/igphy.c

295

IGPHY_WRITE(sc, code[i].reg, code[i].val);

sys/dev/mii/igphyreg.h

179

IGPHY_READ(struct mii_softc *sc, int reg, uint16_t *val)

sys/dev/mii/igphyreg.h

185

return PHY_READ(sc, reg & 0x1f, val);

sys/dev/mii/igphyreg.h

188

IGPHY_WRITE(struct mii_softc *sc, int reg, uint16_t val)

sys/dev/mii/igphyreg.h

195

return PHY_WRITE(sc, reg & 0x1f, val);

sys/dev/mii/jmphy.c

263

uint16_t val;

sys/dev/mii/jmphy.c

268

PHY_READ(sc, JMPHY_TMCTL, &val);

sys/dev/mii/jmphy.c

269

PHY_WRITE(sc, JMPHY_TMCTL, val & ~JMPHY_TMCTL_SLEEP_ENB);

sys/dev/mii/jmphy.c

271

PHY_READ(sc, MII_BMCR, &val);

sys/dev/mii/jmphy.c

272

PHY_WRITE(sc, MII_BMCR, val | BMCR_RESET);

sys/dev/mii/jmphy.c

276

PHY_READ(sc, MII_BMCR, &val);

sys/dev/mii/jmphy.c

277

if ((val & BMCR_RESET) == 0)

sys/dev/mii/mii_bitbang.c

113

uint16_t *val)

sys/dev/mii/mii_bitbang.c

153

*val = data;

sys/dev/mii/mii_bitbang.c

167

uint16_t val)

sys/dev/mii/mii_bitbang.c

177

mii_bitbang_sendbits(sc, ops, val, 16);

sys/dev/mii/miivar.h

292

uint16_t val)

sys/dev/mii/miivar.h

299

return PHY_WRITE(sc, MII_MMDAADR, val);

sys/dev/mii/rgephy.c

520

uint16_t val;

sys/dev/mii/rgephy.c

531

PHY_READ(sc, 4, &val);

sys/dev/mii/rgephy.c

532

val &= 0xFFF;

sys/dev/mii/rgephy.c

533

PHY_WRITE(sc, 4, val);

sys/dev/mii/rgephy.c

540

PHY_READ(sc, 4, &val);

sys/dev/mii/rgephy.c

541

val = (val & 0xFFF) | 0x7000;

sys/dev/mii/rgephy.c

542

PHY_WRITE(sc, 4, val);

sys/dev/mii/rgephy.c

547

PHY_READ(sc, 4, &val);

sys/dev/mii/rgephy.c

548

val = (val & 0xFFF) | 0xA000;

sys/dev/mii/rgephy.c

549

PHY_WRITE(sc, 4, val);

sys/dev/mii/rgephy.c

554

PHY_READ(sc, 4, &val);

sys/dev/mii/rgephy.c

555

val = (val & 0xFFF) | 0xB000;

sys/dev/mii/rgephy.c

556

PHY_WRITE(sc, 4, val);

sys/dev/mii/rgephy.c

561

PHY_READ(sc, 4, &val);

sys/dev/mii/rgephy.c

562

val = (val & 0xFFF) | 0xF000;

sys/dev/mii/rgephy.c

563

PHY_WRITE(sc, 4, val);

sys/dev/mii/rgephy.c

572

(void)val;

sys/dev/nor/cfi.c

575

cfi_cmd(struct cfi * const cfi, bus_size_t off, uint32_t val)

sys/dev/nor/cfi.c

589

cmd += val;

sys/dev/nvmm/x86/nvmm_x86.c

455

nvmm_x86_pat_validate(uint64_t val)

sys/dev/nvmm/x86/nvmm_x86.c

457

uint8_t *pat = (uint8_t *)&val;

sys/dev/nvmm/x86/nvmm_x86.h

63

uint64_t val;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1252

uint64_t val;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1257

val = vmcb->state.efer & ~EFER_SVME;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1258

vmcb->state.rax = (val & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1259

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1263

val = NB_CFG_INITAPICCPUIDLO;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1264

vmcb->state.rax = (val & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1265

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1271

val = 0;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1272

vmcb->state.rax = (val & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1273

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1278

if (__predict_false(exit->u.wrmsr.val & ~EFER_VALID)) {

sys/dev/nvmm/x86/nvmm_x86_svm.c

1281

if ((vmcb->state.efer ^ exit->u.wrmsr.val) &

sys/dev/nvmm/x86/nvmm_x86_svm.c

1285

vmcb->state.efer = exit->u.wrmsr.val | EFER_SVME;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1290

cpudata->gtsc = exit->u.wrmsr.val;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1342

exit->u.wrmsr.val = (rdx << 32) | (rax & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1397

uint64_t val;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1401

val = (cpudata->gprs[NVMM_X64_GPR_RDX] << 32) |

sys/dev/nvmm/x86/nvmm_x86_svm.c

1410

} else if (__predict_false(!nvmm_x86_xcr0_valid(val,

sys/dev/nvmm/x86/nvmm_x86_svm.c

1415

KASSERTMSG(nvmm_x86_xcr0_valid(val, cpudata->xcr0_mask),

sys/dev/nvmm/x86/nvmm_x86_svm.c

1417

val, cpudata->xcr0_mask, cpudata->gxcr0);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1418

cpudata->gxcr0 = val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1895

uint64_t val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1900

val = vmx_vmread(VMCS_GUEST_IA32_PAT);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1901

cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1902

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1906

val = cpudata->gmsr_misc_enable;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1907

cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1908

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1920

val = rdmsr(MSR_IA32_ARCH_CAPABILITIES);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1921

val &= (IA32_ARCH_RDCL_NO |

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1925

cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1926

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1932

val = 0;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1933

cpudata->gprs[NVMM_X64_GPR_RAX] = (val & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1934

cpudata->gprs[NVMM_X64_GPR_RDX] = (val >> 32);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1939

cpudata->gtsc = exit->u.wrmsr.val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1944

val = exit->u.wrmsr.val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1945

if (__predict_false(!nvmm_x86_pat_validate(val))) {

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1948

vmx_vmwrite(VMCS_GUEST_IA32_PAT, val);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2007

exit->u.wrmsr.val = (rdx << 32) | (rax & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2026

uint64_t val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2030

val = (cpudata->gprs[NVMM_X64_GPR_RDX] << 32) |

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2037

} else if (__predict_false(!nvmm_x86_xcr0_valid(val,

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2042

KASSERTMSG(nvmm_x86_xcr0_valid(val, cpudata->xcr0_mask),

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2044

val, cpudata->xcr0_mask, cpudata->gxcr0);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2045

cpudata->gxcr0 = val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2829

cpudata->gmsr[VMX_MSRLIST_STAR].val =

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2831

cpudata->gmsr[VMX_MSRLIST_LSTAR].val =

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2833

cpudata->gmsr[VMX_MSRLIST_CSTAR].val =

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2835

cpudata->gmsr[VMX_MSRLIST_SFMASK].val =

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2837

cpudata->gmsr[VMX_MSRLIST_KERNELGSBASE].val =

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2967

cpudata->gmsr[VMX_MSRLIST_STAR].val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2969

cpudata->gmsr[VMX_MSRLIST_LSTAR].val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2971

cpudata->gmsr[VMX_MSRLIST_CSTAR].val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2973

cpudata->gmsr[VMX_MSRLIST_SFMASK].val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2975

cpudata->gmsr[VMX_MSRLIST_KERNELGSBASE].val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3124

gmsr[VMX_MSRLIST_STAR].val = 0;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3126

gmsr[VMX_MSRLIST_LSTAR].val = 0;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3128

gmsr[VMX_MSRLIST_CSTAR].val = 0;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3130

gmsr[VMX_MSRLIST_SFMASK].val = 0;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3132

gmsr[VMX_MSRLIST_KERNELGSBASE].val = 0;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3134

gmsr[VMX_MSRLIST_L1DFLUSH].val = IA32_FLUSH_CMD_L1D_FLUSH;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3514

uint64_t basic, val, true_val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3521

val = rdmsr(msr_ctls);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3525

true_val = val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3544

uint64_t basic, val, true_val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3551

val = rdmsr(msr_ctls);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3555

true_val = val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3577

} else if (CTLS_ZERO_ALLOWED(val, i)) {

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3579

} else if (CTLS_ONE_ALLOWED(val, i)) {

sys/dev/nvmm/x86/nvmm_x86_vmx.c

642

uint64_t val;

sys/dev/ofw/ofw_subr.c

732

of_getprop_uint32(int node, const char *prop, uint32_t *val)

sys/dev/ofw/ofw_subr.c

741

*val = be32toh(v);

sys/dev/ofw/ofw_subr.c

767

of_getprop_uint64(int node, const char *prop, uint64_t *val)

sys/dev/ofw/ofw_subr.c

776

*val = be64toh(v);

sys/dev/pci/amdpm_smbus.c

182

amdpm_smbus_send_1(struct amdpm_softc *sc, uint8_t val, i2c_op_t op)

sys/dev/pci/amdpm_smbus.c

197

data = val;

sys/dev/pci/amdpm_smbus.c

211

amdpm_smbus_write_1(struct amdpm_softc *sc, uint8_t cmd, uint8_t val,

sys/dev/pci/amdpm_smbus.c

226

data = val;

sys/dev/pci/amr.c

219

amr_outb(struct amr_softc *amr, int off, u_int8_t val)

sys/dev/pci/amr.c

221

bus_space_write_1(amr->amr_iot, amr->amr_ioh, off, val);

sys/dev/pci/amr.c

227

amr_outl(struct amr_softc *amr, int off, u_int32_t val)

sys/dev/pci/amr.c

229

bus_space_write_4(amr->amr_iot, amr->amr_ioh, off, val);

sys/dev/pci/auacer.c

359

int val = READ1(sc, ALI_CSPSR);

sys/dev/pci/auacer.c

360

if (val & mask)

sys/dev/pci/auacer.c

382

auacer_read_codec(void *v, uint8_t reg, uint16_t *val)

sys/dev/pci/auacer.c

398

*val = READ2(sc, ALI_SPR);

sys/dev/pci/auacer.c

401

reg, *val));

sys/dev/pci/auacer.c

407

auacer_write_codec(void *v, uint8_t reg, uint16_t val)

sys/dev/pci/auacer.c

412

reg, val));

sys/dev/pci/auacer.c

416

WRITE2(sc, ALI_CPR, val);

sys/dev/pci/auacer.c

565

uint32_t val;

sys/dev/pci/auacer.c

575

val = READ4(sc, ALI_DMACR);

sys/dev/pci/auacer.c

576

val |= 1 << (slot+16); /* pause */

sys/dev/pci/auacer.c

577

val &= ~(1 << slot); /* no start */

sys/dev/pci/auacer.c

578

WRITE4(sc, ALI_DMACR, val);

sys/dev/pci/auacer.c

809

uint32_t offs, val;

sys/dev/pci/auacer.c

832

val = READ4(sc, ALI_DMACR);

sys/dev/pci/auacer.c

833

val &= ~(1 << (slot+16)); /* no pause */

sys/dev/pci/auacer.c

834

val |= 1 << slot; /* start */

sys/dev/pci/auacer.c

835

WRITE4(sc, ALI_DMACR, val);

sys/dev/pci/auich.c

778

auich_read_codec(void *v, uint8_t reg, uint16_t *val)

sys/dev/pci/auich.c

804

*val = bus_space_read_2(sc->iot, sc->mix_ioh,

sys/dev/pci/auich.c

807

(sc->sc_dev, "%s(%x, %x)\n", __func__, reg, *val));

sys/dev/pci/auich.c

814

*val = 0xffff;

sys/dev/pci/auich.c

833

auich_write_codec(void *v, uint8_t reg, uint16_t val)

sys/dev/pci/auich.c

840

__func__, reg, val));

sys/dev/pci/auich.c

854

reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val);

sys/dev/pci/auvia.c

565

auvia_write_codec(void *addr, u_int8_t reg, u_int16_t val)

sys/dev/pci/auvia.c

574

AUVIA_CODEC_PRIVALID | AUVIA_CODEC_INDEX(reg) | val);

sys/dev/pci/auvia.c

580

auvia_read_codec(void *addr, u_int8_t reg, u_int16_t *val)

sys/dev/pci/auvia.c

597

*val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL);

sys/dev/pci/bktr/bktr_audio.c

393

bctv_gpio_write(bktr_ptr_t bktr, int port, int val)

sys/dev/pci/bktr/bktr_audio.c

401

data = ((val << BCTV_GPIO_VAL_SHIFT) & BCTV_GPIO_VAL_MASK) |

sys/dev/pci/bktr/bktr_audio.c

97

void bctv_gpio_write(bktr_ptr_t bktr, int port, int val);

sys/dev/pci/bktr/bktr_os.c

1866

u_int8_t val = bus_space_read_1(bktr->memt, bktr->memh, offset);

sys/dev/pci/bktr/bktr_os.c

1869

return val;

sys/dev/pci/bktr/bktr_os.c

1875

u_int16_t val = bus_space_read_2(bktr->memt, bktr->memh, offset);

sys/dev/pci/bktr/bktr_os.c

1878

return val;

sys/dev/pci/bktr/bktr_os.c

1884

u_int32_t val = bus_space_read_4(bktr->memt, bktr->memh, offset);

sys/dev/pci/bktr/bktr_os.c

1887

return val;

sys/dev/pci/bktr/bktr_os.c

335

u_int val;

sys/dev/pci/bktr/bktr_os.c

353

val = pci_read_config(dev, PCIR_COMMAND, 4);

sys/dev/pci/bktr/bktr_os.c

354

val |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);

sys/dev/pci/bktr/bktr_os.c

355

pci_write_config(dev, PCIR_COMMAND, val, 4);

sys/dev/pci/bochsfb.c

303

bochsfb_write_dispi(struct bochsfb_softc *sc, uint16_t reg, uint16_t val)

sys/dev/pci/bochsfb.c

308

BOCHSFB_MMIO_DISPI_OFFSET + reg * 2, val);

sys/dev/pci/bochsfb.c

314

VBE_DISPI_IOPORT_DATA - VBE_DISPI_IOPORT_INDEX, val);

sys/dev/pci/bochsfb.c

341

bochsfb_write_vga(struct bochsfb_softc *sc, uint16_t reg, uint8_t val)

sys/dev/pci/bochsfb.c

347

val);

sys/dev/pci/bochsfb.c

351

bus_space_write_1(sc->sc_iot, sc->sc_ioh_vga, reg, val);

sys/dev/pci/bochsfb.c

63

uint16_t val);

sys/dev/pci/bochsfb.c

66

uint8_t val);

sys/dev/pci/btvmeivar.h

71

#define write_csr_byte(sc, reg, val) \

sys/dev/pci/btvmeivar.h

72

bus_space_write_1(sc->csrt, sc->csrh, reg, val)

sys/dev/pci/btvmeivar.h

75

#define write_csr_word(sc, reg, val) \

sys/dev/pci/btvmeivar.h

76

bus_space_write_2(sc->csrt, sc->csrh, reg, val)

sys/dev/pci/btvmeivar.h

78

#define write_mapmem(sc, ofs, val) \

sys/dev/pci/btvmeivar.h

79

bus_space_write_4(sc->mapt, sc->maph, ofs, val)

sys/dev/pci/cmdide.c

569

u_int16_t val;

sys/dev/pci/cmdide.c

612

val = pciide_pci_read(pc, pa, off) & ~0x3f;

sys/dev/pci/cmdide.c

614

val |= udma2_tbl[drvp->UDMA_mode];

sys/dev/pci/cmdide.c

616

val |= udma_tbl[drvp->UDMA_mode];

sys/dev/pci/cmdide.c

617

pciide_pci_write(pc, pa, off, val);

sys/dev/pci/cmdide.c

622

val = dma_tbl[drvp->DMA_mode];

sys/dev/pci/cmdide.c

623

pciide_pci_write(pc, pa, off, val & 0xff);

sys/dev/pci/cmdide.c

624

pciide_pci_write(pc, pa, off+1, val >> 8);

sys/dev/pci/cmdide.c

629

val = pio_tbl[drvp->PIO_mode];

sys/dev/pci/cmdide.c

630

pciide_pci_write(pc, pa, off, val & 0xff);

sys/dev/pci/cmdide.c

631

pciide_pci_write(pc, pa, off+1, val >> 8);

sys/dev/pci/cmpci.c

1031

cmpci_adjust(int val, int mask)

sys/dev/pci/cmpci.c

1034

val += (MAXVAL - mask) >> 1;

sys/dev/pci/cmpci.c

1035

if (val >= MAXVAL)

sys/dev/pci/cmpci.c

1036

val = MAXVAL-1;

sys/dev/pci/cmpci.c

1037

return val & mask;

sys/dev/pci/cmpci.c

200

cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)

sys/dev/pci/cmpci.c

205

bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);

sys/dev/pci/cmpci.c

213

unsigned mask, unsigned val)

sys/dev/pci/cmpci.c

217

(val<<shift) |

sys/dev/pci/cmpci.c

224

uint32_t mask, uint32_t val)

sys/dev/pci/cmpci.c

228

(val<<shift) |

sys/dev/pci/coram.c

349

uint32_t val;

sys/dev/pci/coram.c

353

val = bus_space_read_4(sc->sc_memt, sc->sc_memh, PCI_INT_MSTAT );

sys/dev/pci/coram.c

354

if (val == 0)

sys/dev/pci/coram.c

358

if (val & __BIT(2))

sys/dev/pci/coram.c

361

if (val & ~__BIT(2))

sys/dev/pci/coram.c

362

printf("%s %08x\n", __func__, val);

sys/dev/pci/coram.c

364

bus_space_write_4(sc->sc_memt, sc->sc_memh, PCI_INT_STAT, val);

sys/dev/pci/cs4280.c

916

uint16_t control, val;

sys/dev/pci/cs4280.c

922

val = control = bus_space_read_2(sc->sc_pm_iot, sc->sc_pm_ioh, 0x10);

sys/dev/pci/cs4280.c

924

val |= 0x2000;

sys/dev/pci/cs4280.c

926

val &= ~0x2000;

sys/dev/pci/cs4280.c

927

if (val != control)

sys/dev/pci/cs4280.c

928

bus_space_write_2(sc->sc_pm_iot, sc->sc_pm_ioh, 0x10, val);

sys/dev/pci/cs428x.c

85

int val;

sys/dev/pci/cs428x.c

88

val = sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);

sys/dev/pci/cs428x.c

89

DPRINTFN(3,("mixer_set_port: val=%d\n", val));

sys/dev/pci/cs428x.c

90

return (val);

sys/dev/pci/cxdtv.c

243

val = bus_space_read_4(sc->sc_memt, sc->sc_memh,

sys/dev/pci/cxdtv.c

245

val = CXDTV_I2C_C_DATACONTROL_SCL | CXDTV_I2C_C_DATACONTROL_SDA;

sys/dev/pci/cxdtv.c

247

CXDTV_I2C_C_DATACONTROL, val);

sys/dev/pci/cxdtv.c

323

uint32_t val;

sys/dev/pci/cxdtv.c

325

val = bus_space_read_4(sc->sc_memt, sc->sc_memh, CXDTV_PCI_INT_MSTAT);

sys/dev/pci/cxdtv.c

326

if (val == 0) {

sys/dev/pci/cxdtv.c

330

if (val & CXT_PI_TS_INT) {

sys/dev/pci/cxdtv.c

334

if (val & ~CXT_PI_TS_INT) {

sys/dev/pci/cxdtv.c

335

device_printf(sc->sc_dev, "%s, %08x\n", __func__, val);

sys/dev/pci/cxdtv.c

338

bus_space_write_4(sc->sc_memt, sc->sc_memh, CXDTV_PCI_INT_STAT, val);

sys/dev/pci/cxgb/cxgb_adapter.h

439

t3_write_reg(adapter_t *adapter, uint32_t reg_addr, uint32_t val)

sys/dev/pci/cxgb/cxgb_adapter.h

441

bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val);

sys/dev/pci/cxgb/cxgb_adapter.h

445

t3_os_pci_read_config_4(adapter_t *adapter, int reg, uint32_t *val)

sys/dev/pci/cxgb/cxgb_adapter.h

447

*val = pci_conf_read(adapter->pa.pa_pc, adapter->pa.pa_tag, reg);

sys/dev/pci/cxgb/cxgb_adapter.h

451

t3_os_pci_write_config_4(adapter_t *adapter, int reg, uint32_t val)

sys/dev/pci/cxgb/cxgb_adapter.h

453

pci_conf_write(adapter->pa.pa_pc, adapter->pa.pa_tag, reg, val);

sys/dev/pci/cxgb/cxgb_adapter.h

457

t3_os_pci_read_config_2(adapter_t *adapter, int reg, uint16_t *val)

sys/dev/pci/cxgb/cxgb_adapter.h

462

*val = (temp>>16)&0xffff;

sys/dev/pci/cxgb/cxgb_adapter.h

464

*val = temp&0xffff;

sys/dev/pci/cxgb/cxgb_adapter.h

468

t3_os_pci_write_config_2(adapter_t *adapter, int reg, uint16_t val)

sys/dev/pci/cxgb/cxgb_adapter.h

472

temp = (temp&0xffff)|(val<<16);

sys/dev/pci/cxgb/cxgb_adapter.h

474

temp = (temp&0xffff0000)|val;

sys/dev/pci/cxgb/cxgb_ael1002.c

168

u32 val;

sys/dev/pci/cxgb/cxgb_ael1002.c

170

return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val);

sys/dev/pci/cxgb/cxgb_common.h

140

int reg_addr, unsigned int *val);

sys/dev/pci/cxgb/cxgb_common.h

142

int reg_addr, unsigned int val);

sys/dev/pci/cxgb/cxgb_common.h

536

int reg_addr, unsigned int *val);

sys/dev/pci/cxgb/cxgb_common.h

538

int reg_addr, unsigned int val);

sys/dev/pci/cxgb/cxgb_common.h

549

unsigned int val)

sys/dev/pci/cxgb/cxgb_common.h

551

return phy->mdio_write(phy->adapter, phy->addr, mmd, reg, val);

sys/dev/pci/cxgb/cxgb_common.h

579

unsigned int val;

sys/dev/pci/cxgb/cxgb_common.h

632

void t3_set_reg_field(adapter_t *adap, unsigned int addr, u32 mask, u32 val);

sys/dev/pci/cxgb/cxgb_ioctl.h

147

struct ch_filter_tuple val;

sys/dev/pci/cxgb/cxgb_ioctl.h

75

uint32_t val;

sys/dev/pci/cxgb/cxgb_mv88e1xxx.c

158

u32 val;

sys/dev/pci/cxgb/cxgb_mv88e1xxx.c

161

return mdio_read(cphy, 0, MV88E1XXX_INTR_STATUS, &val);

sys/dev/pci/cxgb/cxgb_offload.c

1207

req->val = htobe64(V_TCB_L2T_IX(e->idx));

sys/dev/pci/cxgb/cxgb_osdep.h

153

static __inline int atomic_set_int(volatile int *dst, int val)

sys/dev/pci/cxgb/cxgb_osdep.h

155

*dst = val;

sys/dev/pci/cxgb/cxgb_osdep.h

157

return (val);

sys/dev/pci/cxgb/cxgb_t3_cpl.h

694

__be64 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

106

void t3_set_reg_field(adapter_t *adapter, unsigned int addr, u32 mask, u32 val)

sys/dev/pci/cxgb/cxgb_t3_hw.c

110

t3_write_reg(adapter, addr, v | val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

166

u32 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

171

val = t3_read_reg(adap, mc7->offset + A_MC7_BD_OP);

sys/dev/pci/cxgb/cxgb_t3_hw.c

172

while ((val & F_BUSY) && attempts--)

sys/dev/pci/cxgb/cxgb_t3_hw.c

173

val = t3_read_reg(adap,

sys/dev/pci/cxgb/cxgb_t3_hw.c

175

if (val & F_BUSY)

sys/dev/pci/cxgb/cxgb_t3_hw.c

178

val = t3_read_reg(adap, mc7->offset + A_MC7_BD_DATA1);

sys/dev/pci/cxgb/cxgb_t3_hw.c

182

val64 |= (u64)val << 32;

sys/dev/pci/cxgb/cxgb_t3_hw.c

185

val >>= shift[mc7->width];

sys/dev/pci/cxgb/cxgb_t3_hw.c

186

val64 |= (u64)val << (step[mc7->width] * i);

sys/dev/pci/cxgb/cxgb_t3_hw.c

201

u32 val = F_PREEN | V_MDIINV(ai->mdiinv) | V_MDIEN(ai->mdien) |

sys/dev/pci/cxgb/cxgb_t3_hw.c

205

val |= V_ST(1);

sys/dev/pci/cxgb/cxgb_t3_hw.c

206

t3_write_reg(adap, A_MI1_CFG, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2166

u32 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2175

0, SG_CONTEXT_CMD_ATTEMPTS, 1, &val))

sys/dev/pci/cxgb/cxgb_t3_hw.c

2180

return G_CQ_INDEX(val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2304

u32 val = i << 16;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2307

val |= (cpus[cpu_idx++] & 0x3f) << (8 * j);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2311

t3_write_reg(adapter, A_TP_RSS_LKP_TABLE, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2336

u32 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

234

int reg_addr, unsigned int val)

sys/dev/pci/cxgb/cxgb_t3_hw.c

2342

val = t3_read_reg(adapter, A_TP_RSS_LKP_TABLE);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2343

if (!(val & 0x80000000))

sys/dev/pci/cxgb/cxgb_t3_hw.c

2345

*lkup++ = (u8)val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2346

*lkup++ = (u8)(val >> 8);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2353

val = t3_read_reg(adapter, A_TP_RSS_MAP_TABLE);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2354

if (!(val & 0x80000000))

sys/dev/pci/cxgb/cxgb_t3_hw.c

2356

*map++ = (u16)val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2385

unsigned int mask, unsigned int val)

sys/dev/pci/cxgb/cxgb_t3_hw.c

2388

val |= t3_read_reg(adap, A_TP_PIO_DATA) & ~mask;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2389

t3_write_reg(adap, A_TP_PIO_DATA, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

244

t3_write_reg(adapter, A_MI1_DATA, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2525

static inline void tp_wr_indirect(adapter_t *adap, unsigned int addr, u32 val)

sys/dev/pci/cxgb/cxgb_t3_hw.c

2528

t3_write_reg(adap, A_TP_PIO_DATA, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2649

u32 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2654

val = t3_read_reg(adap, A_TP_PARA_REG3);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2655

val &= ~(F_RXCOALESCEENABLE | F_RXCOALESCEPSHEN);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2658

val |= F_RXCOALESCEENABLE;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2660

val |= F_RXCOALESCEPSHEN;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2665

t3_write_reg(adap, A_TP_PARA_REG3, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2811

unsigned int val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

2814

val = t3_read_reg(adap, A_TP_MTU_TABLE);

sys/dev/pci/cxgb/cxgb_t3_hw.c

2815

mtus[i] = val & 0x3fff;

sys/dev/pci/cxgb/cxgb_t3_hw.c

282

int reg_addr, unsigned int val)

sys/dev/pci/cxgb/cxgb_t3_hw.c

293

t3_write_reg(adapter, A_MI1_DATA, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

322

unsigned int val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

324

ret = mdio_read(phy, mmd, reg, &val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3244

static int wrreg_wait(adapter_t *adapter, unsigned int addr, u32 val)

sys/dev/pci/cxgb/cxgb_t3_hw.c

3246

t3_write_reg(adapter, addr, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

326

val &= ~clear;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3267

u32 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

327

ret = mdio_write(phy, mmd, reg, val | set);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3275

val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3276

slow = val & F_SLOW;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3277

width = G_WIDTH(val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3278

density = G_DEN(val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3280

t3_write_reg(adapter, mc7->offset + A_MC7_CFG, val | F_IFEN);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3281

val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); /* flush */

sys/dev/pci/cxgb/cxgb_t3_hw.c

3303

val | F_CLKEN | F_TERM150);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3311

val = slow ? 3 : 6;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3315

wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val))

sys/dev/pci/cxgb/cxgb_t3_hw.c

3330

wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val | 0x380) ||

sys/dev/pci/cxgb/cxgb_t3_hw.c

3331

wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val))

sys/dev/pci/cxgb/cxgb_t3_hw.c

3354

val = t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3355

} while ((val & F_BUSY) && --attempts);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3356

if (val & F_BUSY) {

sys/dev/pci/cxgb/cxgb_t3_hw.c

3384

u16 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3390

&val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3391

pldsize = (val & PCI_EXP_DEVCTL_PAYLOAD) >> 5;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3395

&val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3402

if (val & 1) /* check LOsEnable */

sys/dev/pci/cxgb/cxgb_t3_hw.c

3514

u16 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3519

&val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3520

p->width = (val >> 4) & 0x3f;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3627

u32 val = V_PORTSPEED(is_10G(adapter) || adapter->params.nports > 2 ?

sys/dev/pci/cxgb/cxgb_t3_hw.c

3638

val |= F_ENRGMII;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3641

t3_write_reg(adapter, A_XGM_PORT_CFG, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3644

val |= F_CLKDIVRESET_;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3645

t3_write_reg(adapter, A_XGM_PORT_CFG, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3647

t3_write_reg(adapter, XGM_REG(A_XGM_PORT_CFG, 1), val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

374

unsigned int val = 0;

sys/dev/pci/cxgb/cxgb_t3_hw.c

376

err = mdio_read(phy, 0, MII_CTRL1000, &val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

380

val &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);

sys/dev/pci/cxgb/cxgb_t3_hw.c

3811

u32 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3813

val = port ? F_PORT1ACTIVE : F_PORT0ACTIVE;

sys/dev/pci/cxgb/cxgb_t3_hw.c

3815

val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

382

val |= ADVERTISE_1000HALF;

sys/dev/pci/cxgb/cxgb_t3_hw.c

384

val |= ADVERTISE_1000FULL;

sys/dev/pci/cxgb/cxgb_t3_hw.c

386

err = mdio_write(phy, 0, MII_CTRL1000, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

390

val = 1;

sys/dev/pci/cxgb/cxgb_t3_hw.c

392

val |= ADVERTISE_10HALF;

sys/dev/pci/cxgb/cxgb_t3_hw.c

394

val |= ADVERTISE_10FULL;

sys/dev/pci/cxgb/cxgb_t3_hw.c

396

val |= ADVERTISE_100HALF;

sys/dev/pci/cxgb/cxgb_t3_hw.c

398

val |= ADVERTISE_100FULL;

sys/dev/pci/cxgb/cxgb_t3_hw.c

400

val |= ADVERTISE_PAUSE_CAP;

sys/dev/pci/cxgb/cxgb_t3_hw.c

402

val |= ADVERTISE_PAUSE_ASYM;

sys/dev/pci/cxgb/cxgb_t3_hw.c

403

return mdio_write(phy, 0, MII_ADVERTISE, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

551

u16 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

561

t3_os_pci_read_config_2(adapter, base + PCI_VPD_ADDR, &val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

562

} while (!(val & PCI_VPD_ADDR_F) && --attempts);

sys/dev/pci/cxgb/cxgb_t3_hw.c

564

if (!(val & PCI_VPD_ADDR_F)) {

sys/dev/pci/cxgb/cxgb_t3_hw.c

584

u16 val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

597

t3_os_pci_read_config_2(adapter, base + PCI_VPD_ADDR, &val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

598

} while ((val & PCI_VPD_ADDR_F) && --attempts);

sys/dev/pci/cxgb/cxgb_t3_hw.c

600

if (val & PCI_VPD_ADDR_F) {

sys/dev/pci/cxgb/cxgb_t3_hw.c

62

u32 val = t3_read_reg(adapter, reg);

sys/dev/pci/cxgb/cxgb_t3_hw.c

64

if (!!(val & mask) == polarity) {

sys/dev/pci/cxgb/cxgb_t3_hw.c

66

*valp = val;

sys/dev/pci/cxgb/cxgb_t3_hw.c

739

u32 val)

sys/dev/pci/cxgb/cxgb_t3_hw.c

745

t3_write_reg(adapter, A_SF_DATA, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

829

unsigned int i, c, left, val, offset = addr & 0xff;

sys/dev/pci/cxgb/cxgb_t3_hw.c

834

val = swab32(addr) | SF_PROG_PAGE;

sys/dev/pci/cxgb/cxgb_t3_hw.c

837

(ret = sf1_write(adapter, 4, 1, val)) != 0)

sys/dev/pci/cxgb/cxgb_t3_hw.c

842

for (val = 0, i = 0; i < c; ++i)

sys/dev/pci/cxgb/cxgb_t3_hw.c

843

val = (val << 8) + *data++;

sys/dev/pci/cxgb/cxgb_t3_hw.c

845

ret = sf1_write(adapter, c, c != left, val);

sys/dev/pci/cxgb/cxgb_t3_hw.c

91

t3_write_reg(adapter, p->reg_addr + offset, p->val);

sys/dev/pci/cxgb/cxgb_vsc7323.c

147

&sys_avp[i].val, 1)))

sys/dev/pci/cxgb/cxgb_vsc7323.c

176

&fifo_avp[i].val, 1)))

sys/dev/pci/cxgb/cxgb_vsc7323.c

181

&xg_avp[i].val, 1)))

sys/dev/pci/cxgb/cxgb_vsc7323.c

75

static int elmr_write(adapter_t *adap, int addr, u32 val)

sys/dev/pci/cxgb/cxgb_vsc7323.c

77

return t3_elmr_blk_write(adap, addr, &val, 1);

sys/dev/pci/cxgb/cxgb_vsc8211.c

102

u32 val;

sys/dev/pci/cxgb/cxgb_vsc8211.c

105

return mdio_read(cphy, 0, VSC8211_INTR_STATUS, &val);

sys/dev/pci/cxgb/cxgb_xgmac.c

106

u32 val;

sys/dev/pci/cxgb/cxgb_xgmac.c

150

val = F_MAC_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

152

val |= F_PCS_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

154

val |= F_PCS_RESET_ | F_XG2G_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

156

val |= F_RGMII_RESET_ | F_XG2G_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

157

t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val);

sys/dev/pci/cxgb/cxgb_xgmac.c

159

if ((val & F_PCS_RESET_) && adap->params.rev) {

sys/dev/pci/cxgb/cxgb_xgmac.c

170

u32 val;

sys/dev/pci/cxgb/cxgb_xgmac.c

198

val = F_MAC_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

200

val |= F_PCS_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

202

val |= F_PCS_RESET_ | F_XG2G_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

204

val |= F_RGMII_RESET_ | F_XG2G_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

205

t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val);

sys/dev/pci/cxgb/cxgb_xgmac.c

207

if ((val & F_PCS_RESET_) && adap->params.rev) {

sys/dev/pci/cxgb/cxgb_xgmac.c

424

u32 val;

sys/dev/pci/cxgb/cxgb_xgmac.c

431

val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);

sys/dev/pci/cxgb/cxgb_xgmac.c

432

val &= ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM);

sys/dev/pci/cxgb/cxgb_xgmac.c

433

val |= V_RXFIFOPAUSEHWM(rx_fifo_hwm(t3_read_reg(adap,

sys/dev/pci/cxgb/cxgb_xgmac.c

435

t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val);

sys/dev/pci/cxgb/cxgb_xgmac.c

443

val = V_PORTSPEED(0);

sys/dev/pci/cxgb/cxgb_xgmac.c

445

val = V_PORTSPEED(1);

sys/dev/pci/cxgb/cxgb_xgmac.c

447

val = V_PORTSPEED(2);

sys/dev/pci/cxgb/cxgb_xgmac.c

449

val = V_PORTSPEED(3);

sys/dev/pci/cxgb/cxgb_xgmac.c

454

V_PORTSPEED(M_PORTSPEED), val);

sys/dev/pci/cxgb/cxgb_xgmac.c

457

val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);

sys/dev/pci/cxgb/cxgb_xgmac.c

458

val &= ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM);

sys/dev/pci/cxgb/cxgb_xgmac.c

460

val |= V_RXFIFOPAUSEHWM(rx_fifo_hwm(t3_read_reg(adap,

sys/dev/pci/cxgb/cxgb_xgmac.c

462

t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val);

sys/dev/pci/cxgb/cxgb_xgmac.c

520

int val = F_MAC_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

527

val |= F_PCS_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

529

val |= F_PCS_RESET_ | F_XG2G_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

531

val |= F_RGMII_RESET_ | F_XG2G_RESET_;

sys/dev/pci/cxgb/cxgb_xgmac.c

532

t3_write_reg(mac->adapter, A_XGM_RESET_CTRL + mac->offset, val);

sys/dev/pci/cy82c693.c

119

cy82c693_write(const struct cy82c693_handle *cyhc, int reg, u_int8_t val)

sys/dev/pci/cy82c693.c

128

bus_space_write_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 1, val);

sys/dev/pci/cz.c

198

#define CZ_PLX_WRITE(cz, reg, val) \

sys/dev/pci/cz.c

200

(reg), (val))

sys/dev/pci/cz.c

208

#define CZ_FPGA_WRITE(cz, reg, val) \

sys/dev/pci/cz.c

209

bus_space_write_4((cz)->cz_win_st, (cz)->cz_win_sh, (reg), (val))

sys/dev/pci/cz.c

218

#define CZ_FWCTL_WRITE(cz, off, val) \

sys/dev/pci/cz.c

220

(cz)->cz_fwctl + (off), (val))

sys/dev/pci/cz.c

228

#define CZTTY_CHAN_WRITE(sc, off, val) \

sys/dev/pci/cz.c

230

(off), (val))

sys/dev/pci/cz.c

235

#define CZTTY_BUF_WRITE(sc, off, val) \

sys/dev/pci/cz.c

237

(off), (val))

sys/dev/pci/emuxki.c

1288

emuxki_ac97_read(void *hdl, uint8_t reg, uint16_t *val)

sys/dev/pci/emuxki.c

1294

*val = emuxki_readio_2(sc, EMU_AC97DATA);

sys/dev/pci/emuxki.c

1301

emuxki_ac97_write(void *hdl, uint8_t reg, uint16_t val)

sys/dev/pci/emuxki.c

1307

emuxki_writeio_2(sc, EMU_AC97DATA, val);

sys/dev/pci/esa.c

1242

int i, val;

sys/dev/pci/esa.c

1249

val = bus_space_read_1(iot, ioh, ESA_CODEC_STATUS);

sys/dev/pci/esa.c

1250

if ((val & 1) == 0)

sys/dev/pci/esa.c

1542

uint16_t val, int index)

sys/dev/pci/esa.c

1550

val);

sys/dev/pci/esa.c

1559

uint16_t val;

sys/dev/pci/esa.c

1572

val = esa_read_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,

sys/dev/pci/esa.c

1576

val);

sys/dev/pci/esa.c

583

esa_playvals[i].addr, esa_playvals[i].val);

sys/dev/pci/esa.c

717

esa_recvals[i].addr, esa_recvals[i].val);

sys/dev/pci/esadsp.h

45

uint16_t addr, val;

sys/dev/pci/esadsp.h

70

uint16_t addr, val;

sys/dev/pci/eso.c

530

eso_write_ctlreg(struct eso_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/eso.c

536

eso_write_cmd(sc, val);

sys/dev/pci/eso.c

569

eso_write_mixreg(struct eso_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/eso.c

577

bus_space_write_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_MIXERDATA, val);

sys/dev/pci/eso.c

583

uint8_t val;

sys/dev/pci/eso.c

588

val = bus_space_read_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_MIXERDATA);

sys/dev/pci/eso.c

590

return val;

sys/dev/pci/fms.c

343

fms_read_codec(void *addr, uint8_t reg, uint16_t *val)

sys/dev/pci/fms.c

372

*val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_DATA);

sys/dev/pci/fms.c

377

fms_write_codec(void *addr, uint8_t reg, uint16_t val)

sys/dev/pci/fms.c

392

bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_DATA, val);

sys/dev/pci/gcscaudio.c

409

gcscaudio_write_codec(void *arg, uint8_t reg, uint16_t val)

sys/dev/pci/gcscaudio.c

419

(val & ACC_CODEC_CNTL_CMD_DATA_MASK));

sys/dev/pci/gcscaudio.c

426

reg, val);

sys/dev/pci/gcscaudio.c

433

gcscaudio_read_codec(void *arg, uint8_t reg, uint16_t *val)

sys/dev/pci/gcscaudio.c

467

*val = v;

sys/dev/pci/gffb.c

165

gffb_write_crtc(struct gffb_softc *sc, int head, uint8_t reg, uint8_t val)

sys/dev/pci/gffb.c

169

GFFB_WRITE_1(GFFB_PCIO0 + 0x3d5, val);

sys/dev/pci/gffb.c

172

GFFB_WRITE_1(GFFB_PCIO1 + 0x3d5, val);

sys/dev/pci/hdaudio_pci.c

267

pcireg_t val;

sys/dev/pci/hdaudio_pci.c

275

val = pci_conf_read(sc->sc_pc, sc->sc_tag,

sys/dev/pci/hdaudio_pci.c

277

val &= ~HDAUDIO_INTEL_ICH_TCSEL_MASK;

sys/dev/pci/hdaudio_pci.c

278

val |= HDAUDIO_INTEL_ICH_TCSEL_TC0;

sys/dev/pci/hdaudio_pci.c

280

HDAUDIO_INTEL_REG_ICH_TCSEL, val);

sys/dev/pci/hdaudio_pci.c

287

val = pci_conf_read(sc->sc_pc, sc->sc_tag,

sys/dev/pci/hdaudio_pci.c

289

val &= ~HDAUDIO_INTEL_PCH_CGCTL_MISCBDCGE;

sys/dev/pci/hdaudio_pci.c

291

HDAUDIO_INTEL_REG_PCH_CGCTL, val);

sys/dev/pci/hdaudio_pci.c

294

val = pci_conf_read(sc->sc_pc, sc->sc_tag,

sys/dev/pci/hdaudio_pci.c

296

val &= ~HDAUDIO_INTEL_PCH_DEVC_NSNPEN;

sys/dev/pci/hdaudio_pci.c

298

HDAUDIO_INTEL_REG_PCH_DEVC, val);

sys/dev/pci/hdaudio_pci.c

303

val = pci_conf_read(sc->sc_pc, sc->sc_tag,

sys/dev/pci/hdaudio_pci.c

305

val &= ~HDAUDIO_NV_SNOOP_MASK;

sys/dev/pci/hdaudio_pci.c

306

val |= HDAUDIO_NV_SNOOP_ENABLE;

sys/dev/pci/hdaudio_pci.c

308

HDAUDIO_NV_REG_SNOOP, val);

sys/dev/pci/hifn7751.c

2996

hifn_write_4(struct hifn_softc *sc, int reggrp, bus_size_t reg, uint32_t val)

sys/dev/pci/hifn7751.c

3012

bus_space_write_4(sc->sc_st0, sc->sc_sh0, reg, val);

sys/dev/pci/hifn7751.c

3014

bus_space_write_4(sc->sc_st1, sc->sc_sh1, reg, val);

sys/dev/pci/hifn7751var.h

182

#define WRITE_REG_0(sc,reg,val) hifn_write_4((sc), 0, (reg), (val))

sys/dev/pci/hifn7751var.h

183

#define WRITE_REG_1(sc,reg,val) hifn_write_4((sc), 1, (reg), (val))

sys/dev/pci/if_age.c

349

age_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_age.c

373

*val = (v & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT;

sys/dev/pci/if_age.c

381

age_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_age.c

391

(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |

sys/dev/pci/if_agereg.h

854

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_agereg.h

855

bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_agereg.h

856

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/pci/if_agereg.h

857

bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_alc.c

1184

uint32_t cap, ctl, val;

sys/dev/pci/if_alc.c

1188

val = CSR_READ_4(sc, ALC_PEX_UNC_ERR_SEV);

sys/dev/pci/if_alc.c

1189

val &= ~(PEX_UNC_ERR_SEV_DLP | PEX_UNC_ERR_SEV_FCP);

sys/dev/pci/if_alc.c

1190

CSR_WRITE_4(sc, ALC_PEX_UNC_ERR_SEV, val);

sys/dev/pci/if_alc.c

1200

val = CSR_READ_4(sc, ALC_PCIE_PHYMISC2);

sys/dev/pci/if_alc.c

1201

val &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK |

sys/dev/pci/if_alc.c

1203

val |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;

sys/dev/pci/if_alc.c

1204

val |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;

sys/dev/pci/if_alc.c

1205

CSR_WRITE_4(sc, ALC_PCIE_PHYMISC2, val);

sys/dev/pci/if_alc.c

1234

val = CSR_READ_4(sc, ALC_PDLL_TRNS1);

sys/dev/pci/if_alc.c

1235

val &= ~PDLL_TRNS1_D3PLLOFF_ENB;

sys/dev/pci/if_alc.c

1236

CSR_WRITE_4(sc, ALC_PDLL_TRNS1, val);

sys/dev/pci/if_alc.c

1237

val = CSR_READ_4(sc, ALC_MASTER_CFG);

sys/dev/pci/if_alc.c

1240

if ((val & MASTER_WAKEN_25M) == 0 ||

sys/dev/pci/if_alc.c

1241

(val & MASTER_CLK_SEL_DIS) == 0) {

sys/dev/pci/if_alc.c

1242

val |= MASTER_WAKEN_25M | MASTER_CLK_SEL_DIS;

sys/dev/pci/if_alc.c

1243

CSR_WRITE_4(sc, ALC_MASTER_CFG, val);

sys/dev/pci/if_alc.c

1246

if ((val & MASTER_WAKEN_25M) == 0 ||

sys/dev/pci/if_alc.c

1247

(val & MASTER_CLK_SEL_DIS) != 0) {

sys/dev/pci/if_alc.c

1248

val |= MASTER_WAKEN_25M;

sys/dev/pci/if_alc.c

1249

val &= ~MASTER_CLK_SEL_DIS;

sys/dev/pci/if_alc.c

1250

CSR_WRITE_4(sc, ALC_MASTER_CFG, val);

sys/dev/pci/if_alc.c

186

alc_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_alc.c

192

v = alc_mii_readreg_816x(sc, phy, reg, val);

sys/dev/pci/if_alc.c

194

v = alc_mii_readreg_813x(sc, phy, reg, val);

sys/dev/pci/if_alc.c

199

alc_mii_readreg_813x(struct alc_softc *sc, int phy, int reg, uint16_t *val)

sys/dev/pci/if_alc.c

214

*val = 0;

sys/dev/pci/if_alc.c

233

*val = (v & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT;

sys/dev/pci/if_alc.c

238

alc_mii_readreg_816x(struct alc_softc *sc, int phy, int reg, uint16_t *val)

sys/dev/pci/if_alc.c

265

*val = (v & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT;

sys/dev/pci/if_alc.c

270

alc_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_alc.c

276

rv = alc_mii_writereg_816x(sc, phy, reg, val);

sys/dev/pci/if_alc.c

278

rv = alc_mii_writereg_813x(sc, phy, reg, val);

sys/dev/pci/if_alc.c

284

alc_mii_writereg_813x(struct alc_softc *sc, int phy, int reg, uint16_t val)

sys/dev/pci/if_alc.c

290

(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |

sys/dev/pci/if_alc.c

309

alc_mii_writereg_816x(struct alc_softc *sc, int phy, int reg, uint16_t val)

sys/dev/pci/if_alc.c

319

((val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT) | MDIO_REG_ADDR(reg) |

sys/dev/pci/if_alc.c

380

alc_miidbg_readreg(struct alc_softc *sc, int reg, uint16_t *val)

sys/dev/pci/if_alc.c

390

ALC_MII_DBG_DATA, val));

sys/dev/pci/if_alc.c

394

alc_miidbg_writereg(struct alc_softc *sc, int reg, uint16_t val)

sys/dev/pci/if_alc.c

404

val);

sys/dev/pci/if_alc.c

410

alc_miiext_readreg(struct alc_softc *sc, int devaddr, int reg, uint16_t *val)

sys/dev/pci/if_alc.c

436

*val = (v & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT;

sys/dev/pci/if_alc.c

441

alc_miiext_writereg(struct alc_softc *sc, int devaddr, int reg, uint16_t val)

sys/dev/pci/if_alc.c

453

((val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT) |

sys/dev/pci/if_alc.c

474

uint16_t agc, len, val;

sys/dev/pci/if_alc.c

500

MII_EXT_ANEG_AFE, &val);

sys/dev/pci/if_alc.c

501

val |= ANEG_AFEE_10BT_100M_TH;

sys/dev/pci/if_alc.c

503

val);

sys/dev/pci/if_alc.c

508

MII_EXT_ANEG_AFE, &val);

sys/dev/pci/if_alc.c

509

val &= ~ANEG_AFEE_10BT_100M_TH;

sys/dev/pci/if_alc.c

511

val);

sys/dev/pci/if_alc.c

520

alc_miidbg_readreg(sc, MII_DBG_MSE20DB, &val);

sys/dev/pci/if_alc.c

521

val &= ~DBG_MSE20DB_TH_MASK;

sys/dev/pci/if_alc.c

522

val |= (DBG_MSE20DB_TH_HI <<

sys/dev/pci/if_alc.c

524

alc_miidbg_writereg(sc, MII_DBG_MSE20DB, val);

sys/dev/pci/if_alc.c

530

alc_miiext_readreg(sc, MII_EXT_ANEG, MII_EXT_ANEG_AFE, &val);

sys/dev/pci/if_alc.c

531

val &= ~ANEG_AFEE_10BT_100M_TH;

sys/dev/pci/if_alc.c

532

alc_miiext_writereg(sc, MII_EXT_ANEG, MII_EXT_ANEG_AFE, val);

sys/dev/pci/if_alc.c

537

alc_miidbg_readreg(sc, MII_DBG_MSE20DB, &val);

sys/dev/pci/if_alc.c

538

val &= ~DBG_MSE20DB_TH_MASK;

sys/dev/pci/if_alc.c

539

val |= (DBG_MSE20DB_TH_DEFAULT << DBG_MSE20DB_TH_SHIFT);

sys/dev/pci/if_alc.c

540

alc_miidbg_writereg(sc, MII_DBG_MSE20DB, val);

sys/dev/pci/if_alc.c

615

uint16_t val;

sys/dev/pci/if_alc.c

644

ALC_MII_DBG_DATA, &val);

sys/dev/pci/if_alc.c

646

ALC_MII_DBG_DATA, val & 0xFF7F);

sys/dev/pci/if_alc.c

650

ALC_MII_DBG_DATA, &val);

sys/dev/pci/if_alc.c

652

ALC_MII_DBG_DATA, val | 0x0008);

sys/dev/pci/if_alc.c

695

ALC_MII_DBG_DATA, &val);

sys/dev/pci/if_alc.c

697

ALC_MII_DBG_DATA, val | 0x0080);

sys/dev/pci/if_alc.c

701

ALC_MII_DBG_DATA, &val);

sys/dev/pci/if_alc.c

703

ALC_MII_DBG_DATA, val & 0xFFF7);

sys/dev/pci/if_alc.c

930

uint32_t val;

sys/dev/pci/if_alc.c

933

val = CSR_READ_4(sc, ALC_GPHY_CFG);

sys/dev/pci/if_alc.c

934

val &= ~(GPHY_CFG_EXT_RESET | GPHY_CFG_LED_MODE |

sys/dev/pci/if_alc.c

937

val |= GPHY_CFG_SEL_ANA_RESET;

sys/dev/pci/if_alc.c

939

val |= GPHY_CFG_HIB_PULSE | GPHY_CFG_HIB_EN | GPHY_CFG_SEL_ANA_RESET;

sys/dev/pci/if_alc.c

942

val &= ~(GPHY_CFG_HIB_PULSE | GPHY_CFG_HIB_EN);

sys/dev/pci/if_alc.c

944

CSR_WRITE_4(sc, ALC_GPHY_CFG, val);

sys/dev/pci/if_alc.c

946

CSR_WRITE_4(sc, ALC_GPHY_CFG, val | GPHY_CFG_EXT_RESET);

sys/dev/pci/if_alc.c

965

val = CSR_READ_4(sc, ALC_LPI_CTL);

sys/dev/pci/if_alc.c

966

val &= ~LPI_CTL_ENB;

sys/dev/pci/if_alc.c

967

CSR_WRITE_4(sc, ALC_LPI_CTL, val);

sys/dev/pci/if_alc.c

996

val |= EXT_CLDCTL5_BP_VD_HLFBIAS;

sys/dev/pci/if_alcreg.h

1491

#define CSR_WRITE_4(_sc, reg, val) \

sys/dev/pci/if_alcreg.h

1492

bus_space_write_4((_sc)->sc_mem_bt, (_sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_alcreg.h

1493

#define CSR_WRITE_2(_sc, reg, val) \

sys/dev/pci/if_alcreg.h

1494

bus_space_write_2((_sc)->sc_mem_bt, (_sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_alcreg.h

1495

#define CSR_WRITE_1(_sc, reg, val) \

sys/dev/pci/if_alcreg.h

1496

bus_space_write_1((_sc)->sc_mem_bt, (_sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_ale.c

130

ale_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_ale.c

144

*val = 0;

sys/dev/pci/if_ale.c

166

*val = (v & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT;

sys/dev/pci/if_ale.c

171

ale_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_ale.c

192

(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |

sys/dev/pci/if_alereg.h

951

#define CSR_WRITE_4(_sc, reg, val) \

sys/dev/pci/if_alereg.h

952

bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_alereg.h

953

#define CSR_WRITE_2(_sc, reg, val) \

sys/dev/pci/if_alereg.h

954

bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_alereg.h

955

#define CSR_WRITE_1(_sc, reg, val) \

sys/dev/pci/if_alereg.h

956

bus_space_write_1((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_aq.c

1000

if ((val) != 0) \

sys/dev/pci/if_aq.c

1001

_v |= __SHIFTIN((val), (mask)); \

sys/dev/pci/if_aq.c

1304

#define AQ_EVCNT_ADD(sc, name, val) \

sys/dev/pci/if_aq.c

1305

((sc)->sc_evcount_##name##_ev.ev_count += (val))

sys/dev/pci/if_aq.c

4288

#define AQ_3BIT_PACKED_ARRAY_SET(bitmap, idx, val) \

sys/dev/pci/if_aq.c

4290

if (val & 1) { \

sys/dev/pci/if_aq.c

4295

if (val & 2) { \

sys/dev/pci/if_aq.c

4300

if (val & 4) { \

sys/dev/pci/if_aq.c

973

#define AQ_WRITE_REG(sc, reg, val) \

sys/dev/pci/if_aq.c

974

bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/pci/if_aq.c

986

#define AQ_WRITE64_REG(sc, reg, val) \

sys/dev/pci/if_aq.c

988

AQ_WRITE_REG(sc, reg, (uint32_t)val); \

sys/dev/pci/if_aq.c

989

AQ_WRITE_REG(sc, reg + 4, (uint32_t)(val >> 32)); \

sys/dev/pci/if_aq.c

995

#define AQ_WRITE_REG_BIT(sc, reg, mask, val) \

sys/dev/pci/if_athn_pci.c

320

athn_pci_write(struct athn_softc *sc, uint32_t addr, uint32_t val)

sys/dev/pci/if_athn_pci.c

324

bus_space_write_4(psc->psc_iot, psc->psc_ioh, addr, val);

sys/dev/pci/if_bce.c

1094

uint32_t val;

sys/dev/pci/if_bce.c

1110

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,

sys/dev/pci/if_bce.c

1112

if (!(val & EC_ED))

sys/dev/pci/if_bce.c

1145

uint32_t val;

sys/dev/pci/if_bce.c

1160

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,

sys/dev/pci/if_bce.c

1162

if (!(val & EC_ED))

sys/dev/pci/if_bce.c

1173

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_RXSTATUS);

sys/dev/pci/if_bce.c

1175

if (val & RS_ERROR) {

sys/dev/pci/if_bce.c

1177

val = bus_space_read_4(sc->bce_btag,

sys/dev/pci/if_bce.c

1179

if (val & RS_DMA_IDLE)

sys/dev/pci/if_bce.c

1196

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,

sys/dev/pci/if_bce.c

1198

if (!(val & EC_ES))

sys/dev/pci/if_bce.c

1242

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,

sys/dev/pci/if_bce.c

1244

if (val & SBTML_REJ)

sys/dev/pci/if_bce.c

1254

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,

sys/dev/pci/if_bce.c

1256

if (!(val & 0x4))

sys/dev/pci/if_bce.c

1268

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,

sys/dev/pci/if_bce.c

1278

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW);

sys/dev/pci/if_bce.c

1282

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATEHI);

sys/dev/pci/if_bce.c

1283

if (val & 1)

sys/dev/pci/if_bce.c

1286

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBIMSTATE);

sys/dev/pci/if_bce.c

1287

if (val & SBIM_MAGIC_ERRORBITS)

sys/dev/pci/if_bce.c

1289

val & ~SBIM_MAGIC_ERRORBITS);

sys/dev/pci/if_bce.c

1294

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW);

sys/dev/pci/if_bce.c

1300

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW);

sys/dev/pci/if_bce.c

1307

val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_DEVCTL);

sys/dev/pci/if_bce.c

1308

if (!(val & BCE_DC_IP)) {

sys/dev/pci/if_bce.c

1311

} else if (val & BCE_DC_ER) { /* internal, clear reset bit if on */

sys/dev/pci/if_bce.c

1313

val & ~BCE_DC_ER);

sys/dev/pci/if_bce.c

1379

bce_mii_read(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_bce.c

1407

*val = data & BCE_MICOMM_DATA;

sys/dev/pci/if_bce.c

1413

bce_mii_write(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_bce.c

1426

(MII_COMMAND_ACK << 16) | (val & BCE_MICOMM_DATA) | /* MAGIC */

sys/dev/pci/if_bce.c

1440

phy, reg, val);

sys/dev/pci/if_bge.c

1084

bge_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_bge.c

1126

*val = data & BGE_MICOMM_DATA;

sys/dev/pci/if_bge.c

1140

bge_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_bge.c

1165

BGE_MIPHY(phy) | BGE_MIREG(reg) | val);

sys/dev/pci/if_bge.c

1995

uint32_t val;

sys/dev/pci/if_bge.c

2000

val = CSR_READ_4(sc, BGE_VCPU_STATUS);

sys/dev/pci/if_bge.c

2001

if (val & BGE_VCPU_STATUS_INIT_DONE)

sys/dev/pci/if_bge.c

2018

val = bge_readmem_ind(sc, BGE_SRAM_FW_MB);

sys/dev/pci/if_bge.c

2019

if (val == ~BGE_SRAM_FW_MB_MAGIC)

sys/dev/pci/if_bge.c

2027

"firmware handshake timed out, val = %x\n", val);

sys/dev/pci/if_bge.c

2354

uint32_t dmactl, rdmareg, mimode, val;

sys/dev/pci/if_bge.c

2419

val = BGE_BMANMODE_ENABLE | BGE_BMANMODE_ATTN;

sys/dev/pci/if_bge.c

2427

val |= BGE_BMANMODE_NO_TX_UNDERRUN;

sys/dev/pci/if_bge.c

2431

val |= BGE_BMANMODE_LOMBUF_ATTN;

sys/dev/pci/if_bge.c

2432

CSR_WRITE_4(sc, BGE_BMAN_MODE, val);

sys/dev/pci/if_bge.c

2722

val = 0x2620;

sys/dev/pci/if_bge.c

2725

val |= CSR_READ_4(sc, BGE_TX_LENGTHS) &

sys/dev/pci/if_bge.c

2727

CSR_WRITE_4(sc, BGE_TX_LENGTHS, val);

sys/dev/pci/if_bge.c

2746

val = CSR_READ_4(sc, BGE_RXLP_STATS_ENABLE_MASK);

sys/dev/pci/if_bge.c

2747

val &= ~BGE_RXLPSTATCONTROL_DACK_FIX;

sys/dev/pci/if_bge.c

2748

CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, val);

sys/dev/pci/if_bge.c

2813

val = BGE_STATBLKSZ_FULL;

sys/dev/pci/if_bge.c

2816

val = BGE_STATBLKSZ_32BYTE;

sys/dev/pci/if_bge.c

2822

CSR_WRITE_4(sc, BGE_HCC_MODE, val | BGE_HCCMODE_ENABLE);

sys/dev/pci/if_bge.c

2838

val = BGE_MACMODE_TXDMA_ENB | BGE_MACMODE_RXDMA_ENB |

sys/dev/pci/if_bge.c

2844

val |= BGE_PORTMODE_TBI;

sys/dev/pci/if_bge.c

2846

val |= BGE_PORTMODE_GMII;

sys/dev/pci/if_bge.c

2848

val |= BGE_PORTMODE_MII;

sys/dev/pci/if_bge.c

2853

val |= BGE_MACMODE_APE_RX_EN | BGE_MACMODE_APE_TX_EN;

sys/dev/pci/if_bge.c

2856

CSR_WRITE_4_FLUSH(sc, BGE_MAC_MODE, val);

sys/dev/pci/if_bge.c

286

#define BGE_EVCNT_ADD(ev, val) (ev).ev_count += (val)

sys/dev/pci/if_bge.c

287

#define BGE_EVCNT_UPD(ev, val) (ev).ev_count = (val)

sys/dev/pci/if_bge.c

2875

val = BGE_WDMAMODE_ENABLE | BGE_WDMAMODE_ALL_ATTNS;

sys/dev/pci/if_bge.c

2880

val |= BGE_WDMAMODE_STATUS_TAG_FIX;

sys/dev/pci/if_bge.c

2883

val |= BGE_WDMAMODE_BURST_ALL_DATA;

sys/dev/pci/if_bge.c

2886

CSR_WRITE_4_FLUSH(sc, BGE_WDMA_MODE, val);

sys/dev/pci/if_bge.c

2890

val = BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS;

sys/dev/pci/if_bge.c

2893

val |= BGE_RDMAMODE_MULT_DMA_RD_DIS;

sys/dev/pci/if_bge.c

2898

val |= BGE_RDMAMODE_BD_SBD_CRPT_ATTN |

sys/dev/pci/if_bge.c

290

#define BGE_EVCNT_ADD(ev, val) /* nothing */

sys/dev/pci/if_bge.c

2903

val |= BGE_RDMAMODE_FIFO_LONG_BURST;

sys/dev/pci/if_bge.c

2906

val |= BGE_RDMAMODE_JMB_2K_MMRR;

sys/dev/pci/if_bge.c

2909

val |= BGE_RDMAMODE_TSO4_ENABLE;

sys/dev/pci/if_bge.c

291

#define BGE_EVCNT_UPD(ev, val) /* nothing */

sys/dev/pci/if_bge.c

2911

val |= BGE_RDMAMODE_TSO6_ENABLE;

sys/dev/pci/if_bge.c

2916

val |= CSR_READ_4(sc, BGE_RDMA_MODE) &

sys/dev/pci/if_bge.c

2922

val &= ~BGE_RDMAMODE_MULT_DMA_RD_DIS;

sys/dev/pci/if_bge.c

2978

CSR_WRITE_4_FLUSH(sc, BGE_RDMA_MODE, val);

sys/dev/pci/if_bge.c

2984

val = CSR_READ_4(sc, BGE_RDMA_LENGTH + i * 4);

sys/dev/pci/if_bge.c

2985

if ((val & 0xFFFF) > BGE_FRAMELEN)

sys/dev/pci/if_bge.c

2987

if (((val >> 16) & 0xFFFF) > BGE_FRAMELEN)

sys/dev/pci/if_bge.c

2991

val = CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL);

sys/dev/pci/if_bge.c

2993

val |= BGE_RDMA_TX_LENGTH_WA_5719;

sys/dev/pci/if_bge.c

2995

val |= BGE_RDMA_TX_LENGTH_WA_5720;

sys/dev/pci/if_bge.c

2996

CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL, val);

sys/dev/pci/if_bge.c

3014

val = BGE_SDCMODE_ENABLE;

sys/dev/pci/if_bge.c

3016

val |= BGE_SDCMODE_CDELAY;

sys/dev/pci/if_bge.c

3017

CSR_WRITE_4(sc, BGE_SDC_MODE, val);

sys/dev/pci/if_bge.c

4201

int i, val;

sys/dev/pci/if_bge.c

4266

val = CSR_READ_4(sc, BGE_PCIE_LINKCTL);

sys/dev/pci/if_bge.c

4267

val = (val & ~BGE_PCIE_LINKCTL_L1_PLL_PDEN)

sys/dev/pci/if_bge.c

4269

CSR_WRITE_4(sc, BGE_PCIE_LINKCTL, val);

sys/dev/pci/if_bge.c

4360

val = BGE_PCISTATE_ROM_ENABLE | BGE_PCISTATE_ROM_RETRY_ENABLE;

sys/dev/pci/if_bge.c

4363

val |= BGE_PCISTATE_RETRY_SAME_DMA;

sys/dev/pci/if_bge.c

4365

val |= BGE_PCISTATE_ALLOW_APE_CTLSPC_WR |

sys/dev/pci/if_bge.c

4368

pci_conf_write(sc->sc_pc, sc->sc_pcitag, BGE_PCI_PCISTATE, val);

sys/dev/pci/if_bge.c

4396

val = CSR_READ_4(sc, BGE_MARB_MODE);

sys/dev/pci/if_bge.c

4397

CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val);

sys/dev/pci/if_bge.c

4430

val = CSR_READ_4(sc, BGE_MAC_MODE);

sys/dev/pci/if_bge.c

4432

val = (val & ~mac_mode_mask) | mac_mode;

sys/dev/pci/if_bge.c

4433

CSR_WRITE_4_FLUSH(sc, BGE_MAC_MODE, val);

sys/dev/pci/if_bge.c

4927

uint32_t val, ucast, mcast, bcast;

sys/dev/pci/if_bge.c

4942

val = CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL);

sys/dev/pci/if_bge.c

4944

val &= ~BGE_RDMA_TX_LENGTH_WA_5719;

sys/dev/pci/if_bge.c

4946

val &= ~BGE_RDMA_TX_LENGTH_WA_5720;

sys/dev/pci/if_bge.c

4947

CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL, val);

sys/dev/pci/if_bge.c

541

pcireg_t val;

sys/dev/pci/if_bge.c

548

val = pci_conf_read(sc->sc_pc, sc->sc_pcitag, BGE_PCI_MEMWIN_DATA);

sys/dev/pci/if_bge.c

550

return val;

sys/dev/pci/if_bge.c

554

bge_writemem_ind(struct bge_softc *sc, int off, int val)

sys/dev/pci/if_bge.c

558

pci_conf_write(sc->sc_pc, sc->sc_pcitag, BGE_PCI_MEMWIN_DATA, val);

sys/dev/pci/if_bge.c

568

pcireg_t val;

sys/dev/pci/if_bge.c

570

val = pci_conf_read(sc->sc_pc, sc->sc_pcitag, sc->bge_pciecap

sys/dev/pci/if_bge.c

572

val &= ~PCIE_DCSR_MAX_READ_REQ;

sys/dev/pci/if_bge.c

575

val |= BGE_PCIE_DEVCTL_MAX_READRQ_2048;

sys/dev/pci/if_bge.c

578

val |= BGE_PCIE_DEVCTL_MAX_READRQ_4096;

sys/dev/pci/if_bge.c

585

+ PCIE_DCSR, val);

sys/dev/pci/if_bge.c

598

bge_writereg_ind(struct bge_softc *sc, int off, int val)

sys/dev/pci/if_bge.c

601

pci_conf_write(sc->sc_pc, sc->sc_pcitag, BGE_PCI_REG_DATA, val);

sys/dev/pci/if_bge.c

605

bge_writemem_direct(struct bge_softc *sc, int off, int val)

sys/dev/pci/if_bge.c

607

CSR_WRITE_4(sc, off, val);

sys/dev/pci/if_bge.c

611

bge_writembx(struct bge_softc *sc, int off, int val)

sys/dev/pci/if_bge.c

616

CSR_WRITE_4(sc, off, val);

sys/dev/pci/if_bge.c

620

bge_writembx_flush(struct bge_softc *sc, int off, int val)

sys/dev/pci/if_bge.c

625

CSR_WRITE_4_FLUSH(sc, off, val);

sys/dev/pci/if_bgereg.h

2222

#define BGE_MEMWIN_READ(pc, tag, x, val) \

sys/dev/pci/if_bgereg.h

2226

val = CSR_READ_4(sc, BGE_MEMWIN_START + (x & 0xFFFF)); \

sys/dev/pci/if_bgereg.h

2229

#define BGE_MEMWIN_WRITE(pc, tag, x, val) \

sys/dev/pci/if_bgereg.h

2233

CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0xFFFF), val); \

sys/dev/pci/if_bgevar.h

100

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_bgevar.h

101

bus_space_write_4(sc->bge_btag, sc->bge_bhandle, reg, val)

sys/dev/pci/if_bgevar.h

106

#define CSR_WRITE_4_FLUSH(sc, reg, val) \

sys/dev/pci/if_bgevar.h

108

CSR_WRITE_4(sc, reg, val); \

sys/dev/pci/if_bgevar.h

128

#define APE_WRITE_4(sc, reg, val) \

sys/dev/pci/if_bgevar.h

129

bus_space_write_4(sc->bge_apetag, sc->bge_apehandle, reg, val)

sys/dev/pci/if_bgevar.h

134

#define APE_WRITE_4_FLUSH(sc, reg, val) \

sys/dev/pci/if_bgevar.h

136

APE_WRITE_4(sc, reg, val); \

sys/dev/pci/if_bgevar.h

250

int val;

sys/dev/pci/if_bgevar.h

86

#define RCB_WRITE_4(sc, rcb, offset, val) \

sys/dev/pci/if_bgevar.h

88

rcb + offsetof(struct bge_rcb, offset), val)

sys/dev/pci/if_bnx.c

1015

uint32_t val;

sys/dev/pci/if_bnx.c

1016

val = pci_conf_read(pa->pa_pc, pa->pa_tag,

sys/dev/pci/if_bnx.c

1019

"val = 0x%08X\n", __func__, offset, val);

sys/dev/pci/if_bnx.c

1020

return val;

sys/dev/pci/if_bnx.c

1038

bnx_reg_wr_ind(struct bnx_softc *sc, uint32_t offset, uint32_t val)

sys/dev/pci/if_bnx.c

1043

__func__, offset, val);

sys/dev/pci/if_bnx.c

1047

pci_conf_write(pa->pa_pc, pa->pa_tag, BNX_PCICFG_REG_WINDOW, val);

sys/dev/pci/if_bnx.c

1064

uint32_t val, retry_cnt = 5;

sys/dev/pci/if_bnx.c

1072

val = REG_RD(sc, BNX_CTX_CTX_CTRL);

sys/dev/pci/if_bnx.c

1073

if ((val & BNX_CTX_CTX_CTRL_WRITE_REQ) == 0)

sys/dev/pci/if_bnx.c

1079

if (val & BNX_CTX_CTX_CTRL_WRITE_REQ)

sys/dev/pci/if_bnx.c

1100

bnx_miibus_read_reg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_bnx.c

1151

*val = data & 0xffff;

sys/dev/pci/if_bnx.c

1155

phy, (uint16_t) reg & 0xffff, *val);

sys/dev/pci/if_bnx.c

1180

bnx_miibus_write_reg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_bnx.c

1188

phy, (uint16_t) reg & 0xffff, val);

sys/dev/pci/if_bnx.c

1210

val1 = BNX_MIPHY(phy) | BNX_MIREG(reg) | val |

sys/dev/pci/if_bnx.c

1259

int val;

sys/dev/pci/if_bnx.c

1261

val = REG_RD(sc, BNX_EMAC_MODE);

sys/dev/pci/if_bnx.c

1262

val &= ~(BNX_EMAC_MODE_PORT | BNX_EMAC_MODE_HALF_DUPLEX |

sys/dev/pci/if_bnx.c

1282

val |= BNX_EMAC_MODE_PORT_MII_10;

sys/dev/pci/if_bnx.c

1288

val |= BNX_EMAC_MODE_PORT_MII;

sys/dev/pci/if_bnx.c

1292

val |= BNX_EMAC_MODE_25G;

sys/dev/pci/if_bnx.c

1297

val |= BNX_EMAC_MODE_PORT_GMII;

sys/dev/pci/if_bnx.c

1300

val |= BNX_EMAC_MODE_PORT_GMII;

sys/dev/pci/if_bnx.c

1309

val |= BNX_EMAC_MODE_HALF_DUPLEX;

sys/dev/pci/if_bnx.c

1313

REG_WR(sc, BNX_EMAC_MODE, val);

sys/dev/pci/if_bnx.c

1359

uint32_t val;

sys/dev/pci/if_bnx.c

1367

val = REG_RD(sc, BNX_NVM_SW_ARB);

sys/dev/pci/if_bnx.c

1368

if (val & BNX_NVM_SW_ARB_ARB_ARB2)

sys/dev/pci/if_bnx.c

1396

uint32_t val;

sys/dev/pci/if_bnx.c

1404

val = REG_RD(sc, BNX_NVM_SW_ARB);

sys/dev/pci/if_bnx.c

1405

if (!(val & BNX_NVM_SW_ARB_ARB_ARB2))

sys/dev/pci/if_bnx.c

1431

uint32_t val;

sys/dev/pci/if_bnx.c

1435

val = REG_RD(sc, BNX_MISC_CFG);

sys/dev/pci/if_bnx.c

1436

REG_WR(sc, BNX_MISC_CFG, val | BNX_MISC_CFG_NVM_WR_EN_PCI);

sys/dev/pci/if_bnx.c

1448

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1449

if (val & BNX_NVM_COMMAND_DONE)

sys/dev/pci/if_bnx.c

1474

uint32_t val;

sys/dev/pci/if_bnx.c

1478

val = REG_RD(sc, BNX_MISC_CFG);

sys/dev/pci/if_bnx.c

1479

REG_WR(sc, BNX_MISC_CFG, val & ~BNX_MISC_CFG_NVM_WR_EN);

sys/dev/pci/if_bnx.c

1495

uint32_t val;

sys/dev/pci/if_bnx.c

1499

val = REG_RD(sc, BNX_NVM_ACCESS_ENABLE);

sys/dev/pci/if_bnx.c

1502

val | BNX_NVM_ACCESS_ENABLE_EN | BNX_NVM_ACCESS_ENABLE_WR_EN);

sys/dev/pci/if_bnx.c

1516

uint32_t val;

sys/dev/pci/if_bnx.c

1520

val = REG_RD(sc, BNX_NVM_ACCESS_ENABLE);

sys/dev/pci/if_bnx.c

1524

val & ~(BNX_NVM_ACCESS_ENABLE_EN | BNX_NVM_ACCESS_ENABLE_WR_EN));

sys/dev/pci/if_bnx.c

1563

uint32_t val;

sys/dev/pci/if_bnx.c

1567

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1568

if (val & BNX_NVM_COMMAND_DONE)

sys/dev/pci/if_bnx.c

1617

uint32_t val;

sys/dev/pci/if_bnx.c

1621

val = REG_RD(sc, BNX_NVM_COMMAND);

sys/dev/pci/if_bnx.c

1622

if (val & BNX_NVM_COMMAND_DONE) {

sys/dev/pci/if_bnx.c

1623

val = REG_RD(sc, BNX_NVM_READ);

sys/dev/pci/if_bnx.c

1625

val = be32toh(val);

sys/dev/pci/if_bnx.c

1626

memcpy(ret_val, &val, 4);

sys/dev/pci/if_bnx.c

1653

bnx_nvram_write_dword(struct bnx_softc *sc, uint32_t offset, uint8_t *val,

sys/dev/pci/if_bnx.c

1674

memcpy(&val32, val, 4);

sys/dev/pci/if_bnx.c

1709

uint32_t val;

sys/dev/pci/if_bnx.c

1721

val = REG_RD(sc, BNX_NVM_CFG1);

sys/dev/pci/if_bnx.c

1732

if (val & 0x40000000) {

sys/dev/pci/if_bnx.c

1740

if ((val & FLASH_BACKUP_STRAP_MASK) ==

sys/dev/pci/if_bnx.c

1753

if (val & (1 << 23))

sys/dev/pci/if_bnx.c

1762

if ((val & mask) == (flash->strapping & mask)) {

sys/dev/pci/if_bnx.c

1794

val = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_SHARED_HW_CFG_CONFIG2);

sys/dev/pci/if_bnx.c

1795

val &= BNX_SHARED_HW_CFG2_NVM_SIZE_MASK;

sys/dev/pci/if_bnx.c

1796

if (val)

sys/dev/pci/if_bnx.c

1797

sc->bnx_flash_size = val;

sys/dev/pci/if_bnx.c

2186

uint32_t val = REG_RD(sc, BNX_MISC_DUAL_MEDIA_CTRL);

sys/dev/pci/if_bnx.c

2187

uint32_t bond_id = val & BNX_MISC_DUAL_MEDIA_CTRL_BOND_ID;

sys/dev/pci/if_bnx.c

2205

if (val & BNX_MISC_DUAL_MEDIA_CTRL_STRAP_OVERRIDE)

sys/dev/pci/if_bnx.c

2206

strap = (val & BNX_MISC_DUAL_MEDIA_CTRL_PHY_CTRL) >> 21;

sys/dev/pci/if_bnx.c

2208

strap = (val & BNX_MISC_DUAL_MEDIA_CTRL_PHY_CTRL_STRAP)

sys/dev/pci/if_bnx.c

2244

uint32_t val;

sys/dev/pci/if_bnx.c

2257

val = REG_RD_IND(sc, sc->bnx_shmem_base +

sys/dev/pci/if_bnx.c

2259

if (val & BNX_SHARED_HW_CFG_PHY_2_5G) {

sys/dev/pci/if_bnx.c

2748

uint32_t val;

sys/dev/pci/if_bnx.c

2769

val = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_FW_MB);

sys/dev/pci/if_bnx.c

2770

if ((val & BNX_FW_MSG_ACK) == (msg_data & BNX_DRV_MSG_SEQ))

sys/dev/pci/if_bnx.c

2776

if (((val & BNX_FW_MSG_ACK) != (msg_data & BNX_DRV_MSG_SEQ)) &&

sys/dev/pci/if_bnx.c

2805

uint32_t val;

sys/dev/pci/if_bnx.c

2820

val = (i / 8) | BNX_RV2P_PROC1_ADDR_CMD_RDWR;

sys/dev/pci/if_bnx.c

2821

REG_WR(sc, BNX_RV2P_PROC1_ADDR_CMD, val);

sys/dev/pci/if_bnx.c

2823

val = (i / 8) | BNX_RV2P_PROC2_ADDR_CMD_RDWR;

sys/dev/pci/if_bnx.c

2824

REG_WR(sc, BNX_RV2P_PROC2_ADDR_CMD, val);

sys/dev/pci/if_bnx.c

2849

uint32_t val;

sys/dev/pci/if_bnx.c

2852

val = REG_RD_IND(sc, cpu_reg->mode);

sys/dev/pci/if_bnx.c

2853

val |= cpu_reg->mode_value_halt;

sys/dev/pci/if_bnx.c

2854

REG_WR_IND(sc, cpu_reg->mode, val);

sys/dev/pci/if_bnx.c

2908

val = REG_RD_IND(sc, cpu_reg->mode);

sys/dev/pci/if_bnx.c

2909

val &= ~cpu_reg->mode_value_halt;

sys/dev/pci/if_bnx.c

2911

REG_WR_IND(sc, cpu_reg->mode, val);

sys/dev/pci/if_bnx.c

3341

uint32_t val;

sys/dev/pci/if_bnx.c

3348

val = BNX_CTX_COMMAND_ENABLED | BNX_CTX_COMMAND_MEM_INIT

sys/dev/pci/if_bnx.c

3350

val |= (BCM_PAGE_BITS - 8) << 16;

sys/dev/pci/if_bnx.c

3351

REG_WR(sc, BNX_CTX_COMMAND, val);

sys/dev/pci/if_bnx.c

3355

val = REG_RD(sc, BNX_CTX_COMMAND);

sys/dev/pci/if_bnx.c

3356

if (!(val & BNX_CTX_COMMAND_MEM_INIT))

sys/dev/pci/if_bnx.c

3367

val = (uint32_t)(sc->ctx_segs[i].ds_addr);

sys/dev/pci/if_bnx.c

3368

REG_WR(sc, BNX_CTX_HOST_PAGE_TBL_DATA0, val |

sys/dev/pci/if_bnx.c

3370

val = (uint32_t)

sys/dev/pci/if_bnx.c

3372

REG_WR(sc, BNX_CTX_HOST_PAGE_TBL_DATA1, val);

sys/dev/pci/if_bnx.c

3378

val = REG_RD(sc, BNX_CTX_HOST_PAGE_TBL_CTRL);

sys/dev/pci/if_bnx.c

3379

if ((val & BNX_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) == 0)

sys/dev/pci/if_bnx.c

3460

uint32_t val;

sys/dev/pci/if_bnx.c

3466

val = (mac_addr[0] << 8) | mac_addr[1];

sys/dev/pci/if_bnx.c

3468

REG_WR(sc, BNX_EMAC_MAC_MATCH0, val);

sys/dev/pci/if_bnx.c

3470

val = (mac_addr[2] << 24) | (mac_addr[3] << 16) |

sys/dev/pci/if_bnx.c

3473

REG_WR(sc, BNX_EMAC_MAC_MATCH1, val);

sys/dev/pci/if_bnx.c

3531

uint32_t val;

sys/dev/pci/if_bnx.c

3544

val = REG_RD(sc, BNX_MISC_ENABLE_CLR_BITS);

sys/dev/pci/if_bnx.c

3548

val = REG_RD(sc, BNX_MISC_NEW_CORE_CTL);

sys/dev/pci/if_bnx.c

3549

val &= ~BNX_MISC_NEW_CORE_CTL_DMA_ENABLE;

sys/dev/pci/if_bnx.c

3550

REG_WR(sc, BNX_MISC_NEW_CORE_CTL, val);

sys/dev/pci/if_bnx.c

3555

val = REG_RD(sc, BNX_PCICFG_DEVICE_CONTROL);

sys/dev/pci/if_bnx.c

3556

if ((val & PCIE_DCSR_TRANSACTION_PND) == 0)

sys/dev/pci/if_bnx.c

3574

val = REG_RD(sc, BNX_MISC_ID);

sys/dev/pci/if_bnx.c

3582

val = BNX_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |

sys/dev/pci/if_bnx.c

3586

val);

sys/dev/pci/if_bnx.c

3588

val = BNX_PCICFG_MISC_CONFIG_CORE_RST_REQ |

sys/dev/pci/if_bnx.c

3591

REG_WR(sc, BNX_PCICFG_MISC_CONFIG, val);

sys/dev/pci/if_bnx.c

3595

val = REG_RD(sc, BNX_PCICFG_MISC_CONFIG);

sys/dev/pci/if_bnx.c

3596

if ((val & (BNX_PCICFG_MISC_CONFIG_CORE_RST_REQ |

sys/dev/pci/if_bnx.c

3604

if (val & (BNX_PCICFG_MISC_CONFIG_CORE_RST_REQ |

sys/dev/pci/if_bnx.c

3614

val = REG_RD(sc, BNX_PCI_SWAP_DIAG0);

sys/dev/pci/if_bnx.c

3615

if (val != 0x01020304) {

sys/dev/pci/if_bnx.c

3641

uint32_t val;

sys/dev/pci/if_bnx.c

3651

val = BNX_DMA_CONFIG_DATA_BYTE_SWAP |

sys/dev/pci/if_bnx.c

3660

val |= (0x2 << 20) | BNX_DMA_CONFIG_CNTL_PCI_COMP_DLY;

sys/dev/pci/if_bnx.c

3663

val |= BNX_DMA_CONFIG_PCI_FAST_CLK_CMP;

sys/dev/pci/if_bnx.c

3673

val |= BNX_DMA_CONFIG_CNTL_PING_PONG_DMA;

sys/dev/pci/if_bnx.c

3675

REG_WR(sc, BNX_DMA_CONFIG, val);

sys/dev/pci/if_bnx.c

3679

val = pci_conf_read(pa->pa_pc, pa->pa_tag, BNX_PCI_PCIX_CMD);

sys/dev/pci/if_bnx.c

3681

val & ~0x20000);

sys/dev/pci/if_bnx.c

3698

val = REG_RD(sc, BNX_RPM_MGMT_PKT_CTRL) |

sys/dev/pci/if_bnx.c

3700

REG_WR(sc, BNX_RPM_MGMT_PKT_CTRL, val);

sys/dev/pci/if_bnx.c

3710

val = REG_RD(sc, BNX_MQ_CONFIG);

sys/dev/pci/if_bnx.c

3711

val &= ~BNX_MQ_CONFIG_KNL_BYP_BLK_SIZE;

sys/dev/pci/if_bnx.c

3712

val |= BNX_MQ_CONFIG_KNL_BYP_BLK_SIZE_256;

sys/dev/pci/if_bnx.c

3716

val |= BNX_MQ_CONFIG_BIN_MQ_MODE;

sys/dev/pci/if_bnx.c

3718

val |= BNX_MQ_CONFIG_HALT_DIS;

sys/dev/pci/if_bnx.c

3721

REG_WR(sc, BNX_MQ_CONFIG, val);

sys/dev/pci/if_bnx.c

3723

val = 0x10000 + (MAX_CID_CNT * BNX_MB_KERNEL_CTX_SIZE);

sys/dev/pci/if_bnx.c

3724

REG_WR(sc, BNX_MQ_KNL_BYP_WIND_START, val);

sys/dev/pci/if_bnx.c

3725

REG_WR(sc, BNX_MQ_KNL_WIND_END, val);

sys/dev/pci/if_bnx.c

3727

val = (BCM_PAGE_BITS - 8) << 24;

sys/dev/pci/if_bnx.c

3728

REG_WR(sc, BNX_RV2P_CONFIG, val);

sys/dev/pci/if_bnx.c

3731

val = REG_RD(sc, BNX_TBDR_CONFIG);

sys/dev/pci/if_bnx.c

3732

val &= ~BNX_TBDR_CONFIG_PAGE_SIZE;

sys/dev/pci/if_bnx.c

3733

val |= (BCM_PAGE_BITS - 8) << 24 | 0x40;

sys/dev/pci/if_bnx.c

3734

REG_WR(sc, BNX_TBDR_CONFIG, val);

sys/dev/pci/if_bnx.c

3756

uint32_t reg, val;

sys/dev/pci/if_bnx.c

3765

val = sc->eaddr[0] + (sc->eaddr[1] << 8) + (sc->eaddr[2] << 16) +

sys/dev/pci/if_bnx.c

3767

REG_WR(sc, BNX_EMAC_BACKOFF_SEED, val);

sys/dev/pci/if_bnx.c

3830

val = REG_RD(sc, BNX_MISC_NEW_CORE_CTL);

sys/dev/pci/if_bnx.c

3831

val |= BNX_MISC_NEW_CORE_CTL_DMA_ENABLE;

sys/dev/pci/if_bnx.c

3832

REG_WR(sc, BNX_MISC_NEW_CORE_CTL, val);

sys/dev/pci/if_bnx.c

3840

val = REG_RD(sc, BNX_RPM_MGMT_PKT_CTRL) &

sys/dev/pci/if_bnx.c

3842

REG_WR(sc, BNX_RPM_MGMT_PKT_CTRL, val);

sys/dev/pci/if_bnx.c

4122

uint32_t val;

sys/dev/pci/if_bnx.c

4127

val = BNX_L2CTX_TYPE_TYPE_L2 | BNX_L2CTX_TYPE_SIZE_L2;

sys/dev/pci/if_bnx.c

4128

CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_TYPE_XI, val);

sys/dev/pci/if_bnx.c

4129

val = BNX_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);

sys/dev/pci/if_bnx.c

4130

CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_CMD_TYPE_XI, val);

sys/dev/pci/if_bnx.c

4133

val = (uint32_t)((uint64_t)sc->tx_bd_chain_paddr[0] >> 32);

sys/dev/pci/if_bnx.c

4135

BNX_L2CTX_TBDR_BHADDR_HI_XI, val);

sys/dev/pci/if_bnx.c

4136

val = (uint32_t)(sc->tx_bd_chain_paddr[0]);

sys/dev/pci/if_bnx.c

4138

BNX_L2CTX_TBDR_BHADDR_LO_XI, val);

sys/dev/pci/if_bnx.c

4141

val = BNX_L2CTX_TYPE_TYPE_L2 | BNX_L2CTX_TYPE_SIZE_L2;

sys/dev/pci/if_bnx.c

4142

CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_TYPE, val);

sys/dev/pci/if_bnx.c

4143

val = BNX_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);

sys/dev/pci/if_bnx.c

4144

CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_CMD_TYPE, val);

sys/dev/pci/if_bnx.c

4147

val = (uint32_t)((uint64_t)sc->tx_bd_chain_paddr[0] >> 32);

sys/dev/pci/if_bnx.c

4148

CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_TBDR_BHADDR_HI, val);

sys/dev/pci/if_bnx.c

4149

val = (uint32_t)(sc->tx_bd_chain_paddr[0]);

sys/dev/pci/if_bnx.c

4150

CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_TBDR_BHADDR_LO, val);

sys/dev/pci/if_bnx.c

4278

uint32_t val;

sys/dev/pci/if_bnx.c

4281

val = BNX_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |

sys/dev/pci/if_bnx.c

4285

val |= 0x000000ff;

sys/dev/pci/if_bnx.c

4287

CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_CTX_TYPE, val);

sys/dev/pci/if_bnx.c

4291

val = REG_RD(sc, BNX_MQ_MAP_L2_5);

sys/dev/pci/if_bnx.c

4292

REG_WR(sc, BNX_MQ_MAP_L2_5, val | BNX_MQ_MAP_L2_5_ARM);

sys/dev/pci/if_bnx.c

4296

val = (uint32_t)((uint64_t)sc->rx_bd_chain_paddr[0] >> 32);

sys/dev/pci/if_bnx.c

4297

CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_NX_BDHADDR_HI, val);

sys/dev/pci/if_bnx.c

4298

val = (uint32_t)(sc->rx_bd_chain_paddr[0]);

sys/dev/pci/if_bnx.c

4299

CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_NX_BDHADDR_LO, val);

sys/dev/pci/if_bnx.c

4968

uint32_t val;

sys/dev/pci/if_bnx.c

4976

val = REG_RD(sc, BNX_HC_COMMAND);

sys/dev/pci/if_bnx.c

4977

REG_WR(sc, BNX_HC_COMMAND, val | BNX_HC_COMMAND_COAL_NOW);

sys/dev/pci/if_bnx.c

5072

uint32_t val;

sys/dev/pci/if_bnx.c

5081

val = (BCM_PAGE_BITS - 8) << 24;

sys/dev/pci/if_bnx.c

5082

REG_WR(sc, BNX_RV2P_CONFIG, val);

sys/dev/pci/if_bnx.c

584

uint32_t val;

sys/dev/pci/if_bnx.c

658

val = REG_RD_IND(sc, BNX_SHM_HDR_SIGNATURE);

sys/dev/pci/if_bnx.c

659

if ((val & BNX_SHM_HDR_SIGNATURE_SIG_MASK) == BNX_SHM_HDR_SIGNATURE_SIG)

sys/dev/pci/if_bnx.c

672

val = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_DEV_INFO_BC_REV);

sys/dev/pci/if_bnx.c

677

num = (uint8_t)(val >> (24 - (i * 8)));

sys/dev/pci/if_bnx.c

689

val = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_PORT_FEATURE);

sys/dev/pci/if_bnx.c

690

if (val & BNX_PORT_FEATURE_ASF_ENABLED) {

sys/dev/pci/if_bnx.c

696

val = REG_RD_IND(sc, sc->bnx_shmem_base +

sys/dev/pci/if_bnx.c

698

if (val & BNX_CONDITION_MFW_RUN_MASK)

sys/dev/pci/if_bnx.c

704

val = REG_RD_IND(sc, sc->bnx_shmem_base +

sys/dev/pci/if_bnx.c

706

val &= BNX_CONDITION_MFW_RUN_MASK;

sys/dev/pci/if_bnx.c

707

if ((val != BNX_CONDITION_MFW_RUN_UNKNOWN) &&

sys/dev/pci/if_bnx.c

708

(val != BNX_CONDITION_MFW_RUN_NONE)) {

sys/dev/pci/if_bnx.c

714

val = bnx_reg_rd_ind(sc, addr + j * 4);

sys/dev/pci/if_bnx.c

715

val = bswap32(val);

sys/dev/pci/if_bnx.c

716

memcpy(&sc->bnx_mfw_ver[i], &val, 4);

sys/dev/pci/if_bnx.c

732

val = REG_RD(sc, BNX_PCICFG_MISC_STATUS);

sys/dev/pci/if_bnx.c

733

if (val & BNX_PCICFG_MISC_STATUS_PCIX_DET) {

sys/dev/pci/if_bnx.c

766

} else if (val & BNX_PCICFG_MISC_STATUS_M66EN)

sys/dev/pci/if_bnx.c

771

if (val & BNX_PCICFG_MISC_STATUS_32BIT_DET)

sys/dev/pci/if_bnxvar.h

85

#define REG_WR(sc, reg, val) bus_space_write_4(sc->bnx_btag, sc->bnx_bhandle, reg, val)

sys/dev/pci/if_bnxvar.h

86

#define REG_WR16(sc, reg, val) bus_space_write_2(sc->bnx_btag, sc->bnx_bhandle, reg, val)

sys/dev/pci/if_bnxvar.h

89

#define REG_WR_IND(sc, offset, val) bnx_reg_wr_ind(sc, offset, val)

sys/dev/pci/if_bnxvar.h

90

#define CTX_WR(sc, cid_addr, offset, val) bnx_ctx_wr(sc, cid_addr, offset, val)

sys/dev/pci/if_bwfm_pci.c

1568

bwfm_pci_buscore_write(struct bwfm_softc *bwfm, uint32_t reg, uint32_t val)

sys/dev/pci/if_bwfm_pci.c

1576

bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh, offset, val);

sys/dev/pci/if_bwi_pci.c

230

bwi_pci_conf_write(void *sc, uint32_t reg, uint32_t val)

sys/dev/pci/if_bwi_pci.c

234

pci_conf_write(psc->psc_pc, psc->psc_pcitag, reg, val);

sys/dev/pci/if_cas.c

1651

cas_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_cas.c

1673

*val = v & CAS_MIF_FRAME_DATA;

sys/dev/pci/if_cas.c

1683

cas_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_cas.c

1694

phy, reg, val);

sys/dev/pci/if_cas.c

1701

(val & CAS_MIF_FRAME_DATA);

sys/dev/pci/if_cas.c

1766

cas_pcs_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_cas.c

1794

*val = EXTSR_1000XFDX | EXTSR_1000XHDX;

sys/dev/pci/if_cas.c

1800

*val = bus_space_read_4(t, pcs, reg) & 0xffff;

sys/dev/pci/if_cas.c

1805

cas_pcs_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_cas.c

1815

phy, reg, val);

sys/dev/pci/if_cas.c

1826

reset = (val & CAS_MII_CONTROL_RESET);

sys/dev/pci/if_cas.c

1842

bus_space_write_4(t, pcs, reg, val);

sys/dev/pci/if_dge.c

2425

dge_xgmii_writereg(struct dge_softc *sc, int phy, int reg, int val)

sys/dev/pci/if_dge.c

2429

CSR_WRITE(sc, DGE_MDIRW, val);

sys/dev/pci/if_dge.c

367

#define CSR_WRITE(sc, reg, val) \

sys/dev/pci/if_dge.c

368

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_et.c

1551

uint32_t val;

sys/dev/pci/if_et.c

1562

val = __SHIFTIN(56, ET_IPG_NONB2B_1) |

sys/dev/pci/if_et.c

1566

CSR_WRITE_4(sc, ET_IPG, val);

sys/dev/pci/if_et.c

1571

val = __SHIFTIN(10, ET_MAC_HDX_ALT_BEB_TRUNC) |

sys/dev/pci/if_et.c

1575

CSR_WRITE_4(sc, ET_MAC_HDX, val);

sys/dev/pci/if_et.c

1586

val = eaddr[2] | (eaddr[3] << 8) | (eaddr[4] << 16) | (eaddr[5] << 24);

sys/dev/pci/if_et.c

1587

CSR_WRITE_4(sc, ET_MAC_ADDR1, val);

sys/dev/pci/if_et.c

1588

val = (eaddr[0] << 16) | (eaddr[1] << 24);

sys/dev/pci/if_et.c

1589

CSR_WRITE_4(sc, ET_MAC_ADDR2, val);

sys/dev/pci/if_et.c

1604

uint32_t val;

sys/dev/pci/if_et.c

1621

val = (eaddr[2] << 24) | (eaddr[3] << 16) | (eaddr[4] << 8) | eaddr[5];

sys/dev/pci/if_et.c

1622

CSR_WRITE_4(sc, ET_WOL_SA_LO, val);

sys/dev/pci/if_et.c

1623

val = (eaddr[0] << 8) | eaddr[1];

sys/dev/pci/if_et.c

1624

CSR_WRITE_4(sc, ET_WOL_SA_HI, val);

sys/dev/pci/if_et.c

1644

val = __SHIFTIN(16, ET_RXMAC_MC_SEGSZ_MAX) |

sys/dev/pci/if_et.c

1647

val = 0;

sys/dev/pci/if_et.c

1649

CSR_WRITE_4(sc, ET_RXMAC_MC_SEGSZ, val);

sys/dev/pci/if_et.c

1667

val = __SHIFTIN(ETHER_MIN_LEN, ET_PKTFILT_MINLEN) | ET_PKTFILT_FRAG;

sys/dev/pci/if_et.c

1668

CSR_WRITE_4(sc, ET_PKTFILT, val);

sys/dev/pci/if_et.c

1698

uint32_t val = 0;

sys/dev/pci/if_et.c

1700

val |= __SHIFTIN(sc->sc_rx_data[0].rbd_bufsize,

sys/dev/pci/if_et.c

1703

val |= __SHIFTIN(sc->sc_rx_data[1].rbd_bufsize,

sys/dev/pci/if_et.c

1707

CSR_WRITE_4(sc, ET_RXDMA_CTRL, val);

sys/dev/pci/if_et.c

361

et_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_et.c

395

*val = __SHIFTOUT(data, ET_MII_STAT_VALUE);

sys/dev/pci/if_et.c

405

et_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_et.c

421

CSR_WRITE_4(sc, ET_MII_CTRL, __SHIFTIN(val, ET_MII_CTRL_VALUE));

sys/dev/pci/if_et.c

579

uint32_t val; //, max_plsz;

sys/dev/pci/if_et.c

587

val = pci_conf_read(sc->sc_pct, sc->sc_pcitag, ET_PCIR_EEPROM_MISC);

sys/dev/pci/if_et.c

589

if (val & ET_PCIM_EEPROM_STATUS_ERROR) {

sys/dev/pci/if_et.c

590

aprint_error_dev(sc->sc_dev, "EEPROM status error 0x%02x\n", val);

sys/dev/pci/if_et.c

600

val = pci_conf_read(sc->sc_pct, sc->sc_pcitag, ET_PCIR_DEVICE_CAPS);

sys/dev/pci/if_et.c

601

max_plsz = val & ET_PCIM_DEVICE_CAPS_MAX_PLSZ;

sys/dev/pci/if_et.c

633

val = ET_PCIV_L0S_LATENCY(2) | ET_PCIV_L1_LATENCY(2);

sys/dev/pci/if_et.c

635

val << 24);

sys/dev/pci/if_et.c

640

val = pci_conf_read(sc->sc_pct, sc->sc_pcitag,

sys/dev/pci/if_et.c

642

val &= ~ET_PCIM_DEVICE_CTRL_MAX_RRSZ;

sys/dev/pci/if_et.c

643

val |= ET_PCIV_DEVICE_CTRL_RRSZ_2K;

sys/dev/pci/if_et.c

645

val << 16);

sys/dev/pci/if_et.c

976

uint32_t val;

sys/dev/pci/if_et.c

994

val = __SHIFTIN(10, ET_MAC_HDX_ALT_BEB_TRUNC) |

sys/dev/pci/if_et.c

998

CSR_WRITE_4(sc, ET_MAC_HDX, val);

sys/dev/pci/if_etreg.h

355

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_etreg.h

356

bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))

sys/dev/pci/if_iavf.c

5261

int64_t val;

sys/dev/pci/if_iavf.c

5269

val = prop_number_signed_value((prop_number_t)obj);

sys/dev/pci/if_iavf.c

5271

if (val > 0) {

sys/dev/pci/if_iavf.c

5272

iavf_params.debug = val;

sys/dev/pci/if_iavf.c

5279

val = prop_number_signed_value((prop_number_t)obj);

sys/dev/pci/if_iavf.c

5281

if (val < 1 || val > I40E_MAX_VF_QUEUES) {

sys/dev/pci/if_iavf.c

5285

iavf_params.max_qps = val;

sys/dev/pci/if_iavf.c

5293

val = prop_number_signed_value((prop_number_t)obj);

sys/dev/pci/if_iavf.c

5294

if (val > 0x07FF) {

sys/dev/pci/if_iavf.c

5296

val, 0x7FF);

sys/dev/pci/if_iavf.c

5298

iavf_params.tx_itr = val;

sys/dev/pci/if_iavf.c

5306

val = prop_number_signed_value((prop_number_t)obj);

sys/dev/pci/if_iavf.c

5307

if (val > 0x07FF) {

sys/dev/pci/if_iavf.c

5309

val, 0x7FF);

sys/dev/pci/if_iavf.c

5311

iavf_params.rx_itr = val;

sys/dev/pci/if_iavf.c

5319

val = prop_number_signed_value((prop_number_t)obj);

sys/dev/pci/if_iavf.c

5320

n = 1U << (fls32(val) - 1);

sys/dev/pci/if_iavf.c

5321

if (val != (int64_t) n) {

sys/dev/pci/if_iavf.c

5323

"(%" PRId64 " != %" PRIu32 ")\n", val, n);

sys/dev/pci/if_iavf.c

5324

} else if (val > (8192 - 32)) {

sys/dev/pci/if_iavf.c

5326

val, (8192 - 32));

sys/dev/pci/if_iavf.c

5328

iavf_params.tx_ndescs = val;

sys/dev/pci/if_iavf.c

5336

val = prop_number_signed_value((prop_number_t)obj);

sys/dev/pci/if_iavf.c

5337

n = 1U << (fls32(val) - 1);

sys/dev/pci/if_iavf.c

5338

if (val != (int64_t) n) {

sys/dev/pci/if_iavf.c

5340

"(%" PRId64 " != %" PRIu32 ")\n", val, n);

sys/dev/pci/if_iavf.c

5341

} else if (val > (8192 - 32)) {

sys/dev/pci/if_iavf.c

5343

val, (8192 - 32));

sys/dev/pci/if_iavf.c

5345

iavf_params.rx_ndescs = val;

sys/dev/pci/if_ipw.c

180

uint16_t val;

sys/dev/pci/if_ipw.c

268

val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);

sys/dev/pci/if_ipw.c

269

ic->ic_myaddr[0] = val >> 8;

sys/dev/pci/if_ipw.c

270

ic->ic_myaddr[1] = val & 0xff;

sys/dev/pci/if_ipw.c

271

val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);

sys/dev/pci/if_ipw.c

272

ic->ic_myaddr[2] = val >> 8;

sys/dev/pci/if_ipw.c

273

ic->ic_myaddr[3] = val & 0xff;

sys/dev/pci/if_ipw.c

274

val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);

sys/dev/pci/if_ipw.c

275

ic->ic_myaddr[4] = val >> 8;

sys/dev/pci/if_ipw.c

276

ic->ic_myaddr[5] = val & 0xff;

sys/dev/pci/if_ipw.c

282

if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0)

sys/dev/pci/if_ipw.c

283

val = 0x7ff; /* default to channels 1-11 */

sys/dev/pci/if_ipw.c

284

val <<= 1;

sys/dev/pci/if_ipw.c

286

if (val & (1 << i)) {

sys/dev/pci/if_ipw.c

745

uint32_t val;

sys/dev/pci/if_ipw.c

753

uint32_t val;

sys/dev/pci/if_ipw.c

762

val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf;

sys/dev/pci/if_ipw.c

765

for (i = 0; i < N(rates) && rates[i].val != val; i++);

sys/dev/pci/if_ipw.c

852

uint16_t val;

sys/dev/pci/if_ipw.c

882

val = 0;

sys/dev/pci/if_ipw.c

887

val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;

sys/dev/pci/if_ipw.c

897

return le16toh(val);

sys/dev/pci/if_ipwreg.h

322

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/pci/if_ipwreg.h

323

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_ipwreg.h

325

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/pci/if_ipwreg.h

326

bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_ipwreg.h

328

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_ipwreg.h

329

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_ipwreg.h

338

#define MEM_WRITE_1(sc, addr, val) do { \

sys/dev/pci/if_ipwreg.h

340

CSR_WRITE_1((sc), IPW_CSR_INDIRECT_DATA, (val)); \

sys/dev/pci/if_ipwreg.h

343

#define MEM_WRITE_2(sc, addr, val) do { \

sys/dev/pci/if_ipwreg.h

345

CSR_WRITE_2((sc), IPW_CSR_INDIRECT_DATA, (val)); \

sys/dev/pci/if_ipwreg.h

348

#define MEM_WRITE_4(sc, addr, val) do { \

sys/dev/pci/if_ipwreg.h

350

CSR_WRITE_4((sc), IPW_CSR_INDIRECT_DATA, (val)); \

sys/dev/pci/if_ipwreg.h

361

#define IPW_EEPROM_CTL(sc, val) do { \

sys/dev/pci/if_ipwreg.h

362

MEM_WRITE_4((sc), IPW_MEM_EEPROM_CTL, (val)); \

sys/dev/pci/if_iwi.c

1032

uint16_t val;

sys/dev/pci/if_iwi.c

1062

val = 0;

sys/dev/pci/if_iwi.c

1067

val |= ((tmp & IWI_EEPROM_Q) >> IWI_EEPROM_SHIFT_Q) << n;

sys/dev/pci/if_iwi.c

1077

return val;

sys/dev/pci/if_iwi.c

1884

int val;

sys/dev/pci/if_iwi.c

1915

val = !iwi_getrfkill(sc);

sys/dev/pci/if_iwi.c

1916

error = copyout(&val, (int *)ifr->ifr_data, sizeof val);

sys/dev/pci/if_iwi.c

207

uint16_t val;

sys/dev/pci/if_iwi.c

2823

int val, error;

sys/dev/pci/if_iwi.c

2828

val = !iwi_getrfkill(sc);

sys/dev/pci/if_iwi.c

2830

node.sysctl_data = &val;

sys/dev/pci/if_iwi.c

2944

uint32_t val;

sys/dev/pci/if_iwi.c

2946

val = MEM_READ_4(sc, IWI_MEM_EVENT_CTL);

sys/dev/pci/if_iwi.c

2959

val |= state;

sys/dev/pci/if_iwi.c

2965

val = (toggle && (val & state)) ? val & ~state : val | state;

sys/dev/pci/if_iwi.c

2974

MEM_WRITE_4(sc, IWI_MEM_EVENT_CTL, val);

sys/dev/pci/if_iwi.c

307

val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 0);

sys/dev/pci/if_iwi.c

308

ic->ic_myaddr[0] = val & 0xff;

sys/dev/pci/if_iwi.c

309

ic->ic_myaddr[1] = val >> 8;

sys/dev/pci/if_iwi.c

310

val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 1);

sys/dev/pci/if_iwi.c

311

ic->ic_myaddr[2] = val & 0xff;

sys/dev/pci/if_iwi.c

312

ic->ic_myaddr[3] = val >> 8;

sys/dev/pci/if_iwi.c

313

val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 2);

sys/dev/pci/if_iwi.c

314

ic->ic_myaddr[4] = val & 0xff;

sys/dev/pci/if_iwi.c

315

ic->ic_myaddr[5] = val >> 8;

sys/dev/pci/if_iwi.c

321

val = iwi_read_prom_word(sc, IWI_EEPROM_NIC_TYPE);

sys/dev/pci/if_iwi.c

322

sc->nictype = val & 0xff;

sys/dev/pci/if_iwireg.h

546

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/pci/if_iwireg.h

547

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_iwireg.h

549

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/pci/if_iwireg.h

550

bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_iwireg.h

552

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_iwireg.h

553

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_iwireg.h

562

#define MEM_WRITE_1(sc, addr, val) do { \

sys/dev/pci/if_iwireg.h

564

CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \

sys/dev/pci/if_iwireg.h

567

#define MEM_WRITE_2(sc, addr, val) do { \

sys/dev/pci/if_iwireg.h

569

CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \

sys/dev/pci/if_iwireg.h

572

#define MEM_WRITE_4(sc, addr, val) do { \

sys/dev/pci/if_iwireg.h

574

CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \

sys/dev/pci/if_iwireg.h

585

#define IWI_EEPROM_CTL(sc, val) do { \

sys/dev/pci/if_iwireg.h

586

MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \

sys/dev/pci/if_iwm.c

1101

iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val)

sys/dev/pci/if_iwm.c

1106

IWM_WRITE(sc, IWM_HBUS_TARG_PRPH_WDAT, val);

sys/dev/pci/if_iwm.c

1135

uint32_t val = vals ? vals[offs] : 0;

sys/dev/pci/if_iwm.c

1136

IWM_WRITE(sc, IWM_HBUS_TARG_MEM_WDAT, val);

sys/dev/pci/if_iwm.c

1145

iwm_write_mem32(struct iwm_softc *sc, uint32_t addr, uint32_t val)

sys/dev/pci/if_iwm.c

1147

return iwm_write_mem(sc, addr, &val, 1);

sys/dev/pci/if_iwm.c

1224

uint32_t val;

sys/dev/pci/if_iwm.c

1227

val = iwm_read_prph(sc, reg) & mask;

sys/dev/pci/if_iwm.c

1228

val |= bits;

sys/dev/pci/if_iwm.c

1229

iwm_write_prph(sc, reg, val);

sys/dev/pci/if_iwm.c

1975

uint32_t mask, val, reg_val = 0;

sys/dev/pci/if_iwm.c

2002

val = IWM_READ(sc, IWM_CSR_HW_IF_CONFIG_REG);

sys/dev/pci/if_iwm.c

2003

val &= ~mask;

sys/dev/pci/if_iwm.c

2004

val |= reg_val;

sys/dev/pci/if_iwm.c

2005

IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG, val);

sys/dev/pci/if_iwm.c

3683

uint32_t val, last_read_idx = 0;

sys/dev/pci/if_iwm.c

3724

val = IWM_READ(sc, IWM_FH_UCODE_LOAD_STATUS);

sys/dev/pci/if_iwm.c

3725

val = val | (sec_num << shift_param);

sys/dev/pci/if_iwm.c

3726

IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, val);

sys/dev/pci/if_iwm.c

4081

uint32_t val;

sys/dev/pci/if_iwm.c

4083

val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_AGC_IDX]);

sys/dev/pci/if_iwm.c

4084

agc_a = (val & IWM_OFDM_AGC_A_MSK) >> IWM_OFDM_AGC_A_POS;

sys/dev/pci/if_iwm.c

4085

agc_b = (val & IWM_OFDM_AGC_B_MSK) >> IWM_OFDM_AGC_B_POS;

sys/dev/pci/if_iwm.c

4087

val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_RSSI_AB_IDX]);

sys/dev/pci/if_iwm.c

4088

rssi_a = (val & IWM_OFDM_RSSI_INBAND_A_MSK) >> IWM_OFDM_RSSI_A_POS;

sys/dev/pci/if_iwm.c

4089

rssi_b = (val & IWM_OFDM_RSSI_INBAND_B_MSK) >> IWM_OFDM_RSSI_B_POS;

sys/dev/pci/if_iwm.c

4114

uint32_t val;

sys/dev/pci/if_iwm.c

4116

val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]);

sys/dev/pci/if_iwm.c

4117

energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >>

sys/dev/pci/if_iwm.c

4120

energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >>

sys/dev/pci/if_iwm.c

4123

energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >>

sys/dev/pci/if_iwm.c

4788

uint16_t val;

sys/dev/pci/if_iwm.c

4796

val = htole16(sta_id << 12 | len);

sys/dev/pci/if_iwm.c

4802

scd_bc_tbl[qid].tfd_offset[idx] = val;

sys/dev/pci/if_iwm.c

4804

scd_bc_tbl[qid].tfd_offset[IWM_TFD_QUEUE_SIZE_MAX + idx] = val;

sys/dev/pci/if_iwmreg.h

7202

#define IWM_WRITE(sc, reg, val) \

sys/dev/pci/if_iwmreg.h

7203

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_iwmreg.h

7205

#define IWM_WRITE_1(sc, reg, val) \

sys/dev/pci/if_iwmreg.h

7206

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_iwn.c

1098

iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,

sys/dev/pci/if_iwn.c

1102

iwn_mem_write(sc, addr, val);

sys/dev/pci/if_iwn.c

1192

uint32_t val, tmp;

sys/dev/pci/if_iwn.c

1199

val = IWN_READ(sc, IWN_EEPROM);

sys/dev/pci/if_iwn.c

1200

if (val & IWN_EEPROM_READ_VALID)

sys/dev/pci/if_iwn.c

1223

*out++ = val >> 16;

sys/dev/pci/if_iwn.c

1225

*out++ = val >> 24;

sys/dev/pci/if_iwn.c

1612

uint16_t val;

sys/dev/pci/if_iwn.c

1647

iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);

sys/dev/pci/if_iwn.c

1648

DPRINTF(("SKU capabilities=0x%04x\n", le16toh(val)));

sys/dev/pci/if_iwn.c

1650

if (val & htole16(IWN_EEPROM_SKU_CAP_11N))

sys/dev/pci/if_iwn.c

1653

iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);

sys/dev/pci/if_iwn.c

1654

sc->rfcfg = le16toh(val);

sys/dev/pci/if_iwn.c

1678

uint16_t val;

sys/dev/pci/if_iwn.c

1691

iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);

sys/dev/pci/if_iwn.c

1692

sc->maxpwr2GHz = val & 0xff;

sys/dev/pci/if_iwn.c

1693

sc->maxpwr5GHz = val >> 8;

sys/dev/pci/if_iwn.c

1706

iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);

sys/dev/pci/if_iwn.c

1707

sc->eeprom_voltage = (int16_t)le16toh(val);

sys/dev/pci/if_iwn.c

1760

uint16_t val;

sys/dev/pci/if_iwn.c

1764

iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);

sys/dev/pci/if_iwn.c

1765

base = le16toh(val);

sys/dev/pci/if_iwn.c

1779

iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);

sys/dev/pci/if_iwn.c

1780

base = le16toh(val);

sys/dev/pci/if_iwn.c

1791

iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);

sys/dev/pci/if_iwn.c

1792

sc->eeprom_temp = le16toh(val);

sys/dev/pci/if_iwn.c

1793

iwn_read_prom_data(sc, base + IWN2000_EEPROM_RAWTEMP, &val, 2);

sys/dev/pci/if_iwn.c

1794

sc->eeprom_rawtemp = le16toh(val);

sys/dev/pci/if_iwn.c

1799

iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);

sys/dev/pci/if_iwn.c

1800

sc->eeprom_temp = le16toh(val);

sys/dev/pci/if_iwn.c

1801

iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);

sys/dev/pci/if_iwn.c

1802

volt = le16toh(val);

sys/dev/pci/if_iwn.c

1875

uint16_t val, base;

sys/dev/pci/if_iwn.c

1880

iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);

sys/dev/pci/if_iwn.c

1881

base = le16toh(val);

sys/dev/pci/if_iwn.c

3671

uint64_t val, mod;

sys/dev/pci/if_iwn.c

3679

val = (uint64_t)ni->ni_intval * 1024; /* msecs -> usecs */

sys/dev/pci/if_iwn.c

3680

mod = le64toh(cmd.tstamp) % val;

sys/dev/pci/if_iwn.c

3681

cmd.binitval = htole32((uint32_t)(val - mod));

sys/dev/pci/if_iwn.c

3684

ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod)));

sys/dev/pci/if_iwn.c

4025

uint32_t val;

sys/dev/pci/if_iwn.c

4038

val = MAX(calib->rssi[0], calib->rssi[1]);

sys/dev/pci/if_iwn.c

4039

val = MAX(calib->rssi[2], val);

sys/dev/pci/if_iwn.c

4044

if (val - calib->rssi[i] > 15 * 20)

sys/dev/pci/if_iwn.c

4164

#define inc(val, inc, max) \

sys/dev/pci/if_iwn.c

4165

if ((val) < (max)) { \

sys/dev/pci/if_iwn.c

4166

if ((val) < (max) - (inc)) \

sys/dev/pci/if_iwn.c

4167

(val) += (inc); \

sys/dev/pci/if_iwn.c

4169

(val) = (max); \

sys/dev/pci/if_iwn.c

4172

#define dec(val, dec, min) \

sys/dev/pci/if_iwn.c

4173

if ((val) > (min)) { \

sys/dev/pci/if_iwn.c

4174

if ((val) > (min) + (dec)) \

sys/dev/pci/if_iwn.c

4175

(val) -= (dec); \

sys/dev/pci/if_iwn.c

4177

(val) = (min); \

sys/dev/pci/if_iwn.c

4183

uint32_t val, rxena, fa;

sys/dev/pci/if_iwn.c

4221

val = MAX(noise[0], noise[1]);

sys/dev/pci/if_iwn.c

4222

val = MAX(noise[2], val);

sys/dev/pci/if_iwn.c

4224

calib->noise_samples[calib->cur_noise_sample] = val;

sys/dev/pci/if_iwn.c

4235

val = MIN(energy[0], energy[1]);

sys/dev/pci/if_iwn.c

4236

val = MIN(energy[2], val);

sys/dev/pci/if_iwn.c

4238

calib->energy_samples[calib->cur_energy_sample] = val;

sys/dev/pci/if_iwnreg.h

2001

#define IWN_WRITE(sc, reg, val) \

sys/dev/pci/if_iwnreg.h

2002

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_iwnreg.h

2004

#define IWN_WRITE_1(sc, reg, val) \

sys/dev/pci/if_iwnreg.h

2005

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_ixl.c

4586

uint16_t val;

sys/dev/pci/if_ixl.c

4600

val = le16toh(data->port_vlan_flags);

sys/dev/pci/if_ixl.c

4601

CLR(val, IXL_AQ_VSI_PVLAN_MODE_MASK | IXL_AQ_VSI_PVLAN_EMOD_MASK);

sys/dev/pci/if_ixl.c

4602

SET(val, IXL_AQ_VSI_PVLAN_MODE_ALL);

sys/dev/pci/if_ixl.c

4605

SET(val, IXL_AQ_VSI_PVLAN_EMOD_STR_BOTH);

sys/dev/pci/if_ixl.c

4607

SET(val, IXL_AQ_VSI_PVLAN_EMOD_NOTHING);

sys/dev/pci/if_ixl.c

4610

data->port_vlan_flags = htole16(val);

sys/dev/pci/if_ixl.c

5391

uint32_t val;

sys/dev/pci/if_ixl.c

5395

val = ixl_rd(sc, I40E_GLPCI_CNF2);

sys/dev/pci/if_ixl.c

5396

num_pf_int = (val & I40E_GLPCI_CNF2_MSI_X_PF_N_MASK) >>

sys/dev/pci/if_ixl.c

5398

num_vf_int = (val & I40E_GLPCI_CNF2_MSI_X_VF_N_MASK) >>

sys/dev/pci/if_ixl.c

5401

val = ixl_rd(sc, I40E_PFLAN_QALLOC);

sys/dev/pci/if_ixl.c

5402

base_queue = (val & I40E_PFLAN_QALLOC_FIRSTQ_MASK) >>

sys/dev/pci/if_ixl.c

5404

j = (val & I40E_PFLAN_QALLOC_LASTQ_MASK) >>

sys/dev/pci/if_ixl.c

5406

if (val & I40E_PFLAN_QALLOC_VALID_MASK)

sys/dev/pci/if_ixl.c

5411

val = ixl_rd(sc, I40E_PF_VT_PFALLOC);

sys/dev/pci/if_ixl.c

5412

i = (val & I40E_PF_VT_PFALLOC_FIRSTVF_MASK) >>

sys/dev/pci/if_ixl.c

5414

j = (val & I40E_PF_VT_PFALLOC_LASTVF_MASK) >>

sys/dev/pci/if_ixl.c

5416

if (val & I40E_PF_VT_PFALLOC_VALID_MASK)

sys/dev/pci/if_ixl.c

5424

val = 0x3 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;

sys/dev/pci/if_ixl.c

5426

ixl_wr(sc, I40E_PFINT_DYN_CTLN(i), val);

sys/dev/pci/if_ixl.c

5430

val = eol << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;

sys/dev/pci/if_ixl.c

5431

ixl_wr(sc, I40E_PFINT_LNKLST0, val);

sys/dev/pci/if_ixl.c

5433

ixl_wr(sc, I40E_PFINT_LNKLSTN(i), val);

sys/dev/pci/if_ixl.c

5434

val = eol << I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT;

sys/dev/pci/if_ixl.c

5436

ixl_wr(sc, I40E_VPINT_LNKLST0(i), val);

sys/dev/pci/if_ixl.c

5438

ixl_wr(sc, I40E_VPINT_LNKLSTN(i), val);

sys/dev/pci/if_ixl.c

5450

val = ixl_rd(sc, I40E_GLLAN_TXPRE_QDIS(reg_block));

sys/dev/pci/if_ixl.c

5451

val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK;

sys/dev/pci/if_ixl.c

5452

val |= (abs_queue_idx << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT);

sys/dev/pci/if_ixl.c

5453

val |= I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK;

sys/dev/pci/if_ixl.c

5455

ixl_wr(sc, I40E_GLLAN_TXPRE_QDIS(reg_block), val);

sys/dev/pci/if_ixl.c

6837

uint32_t val;

sys/dev/pci/if_ixl.c

6847

rv = ixl_rx_ctl_read(sc, reg, &val);

sys/dev/pci/if_ixl.c

6849

return val;

sys/dev/pci/if_ixl.c

6856

val = ixl_rd(sc, reg);

sys/dev/pci/if_ixl.c

6858

return val;

sys/dev/pci/if_ixl.c

7126

int64_t val;

sys/dev/pci/if_ixl.c

7139

val = prop_number_signed_value((prop_number_t)obj);

sys/dev/pci/if_ixl.c

7142

if (100 < val && val < 180000) {

sys/dev/pci/if_ixl.c

7143

ixl_param_stats_interval = val;

sys/dev/pci/if_ixl.c

7149

val = prop_number_signed_value((prop_number_t)obj);

sys/dev/pci/if_ixl.c

7151

if (val <= INT32_MAX)

sys/dev/pci/if_ixl.c

7152

ixl_param_nqps_limit = val;

sys/dev/pci/if_ixlvar.h

1052

uint64_t val;

sys/dev/pci/if_ixlvar.h

1055

val = (intptr_t)IXL_DMA_DVA(ixm);

sys/dev/pci/if_ixlvar.h

1056

retval = val >> 32;

sys/dev/pci/if_ixlvar.h

176

uint64_t val;

sys/dev/pci/if_ixlvar.h

179

val = (intptr_t)addr;

sys/dev/pci/if_ixlvar.h

180

iaq->iaq_param[2] = htole32(val >> 32);

sys/dev/pci/if_ixlvar.h

191

uint64_t val;

sys/dev/pci/if_ixlvar.h

194

val = le32toh(iaq->iaq_param[2]);

sys/dev/pci/if_ixlvar.h

195

val = val << 32;

sys/dev/pci/if_ixlvar.h

197

val = 0;

sys/dev/pci/if_ixlvar.h

199

val |= htole32(iaq->iaq_param[3]);

sys/dev/pci/if_ixlvar.h

201

return !(val == 0);

sys/dev/pci/if_ixlvar.h

667

uint32_t val;

sys/dev/pci/if_jme.c

1004

(((uint32_t)val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |

sys/dev/pci/if_jme.c

1008

if (((val = bus_space_read_4(sc->jme_bt_mac, sc->jme_bh_mac,

sys/dev/pci/if_jme.c

1920

jme_eeprom_read_byte(struct jme_softc *sc, uint8_t addr, uint8_t *val)

sys/dev/pci/if_jme.c

1925

*val = 0;

sys/dev/pci/if_jme.c

1956

*val = (reg & SMBINTF_RD_DATA_MASK) >> SMBINTF_RD_DATA_SHIFT;

sys/dev/pci/if_jme.c

1965

uint8_t fup, reg, val;

sys/dev/pci/if_jme.c

1987

&val) != 0)

sys/dev/pci/if_jme.c

1989

eaddr[reg - JME_PAR0] = val;

sys/dev/pci/if_jme.c

954

jme_mii_read(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_jme.c

983

*val = (data & SMI_DATA_MASK) >> SMI_DATA_SHIFT;

sys/dev/pci/if_jme.c

988

jme_mii_write(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_kse.c

1419

kse_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_kse.c

1425

*val = CSR_READ_2(sc, phy1csr[reg]);

sys/dev/pci/if_kse.c

1430

kse_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_kse.c

1436

CSR_WRITE_2(sc, phy1csr[reg], val);

sys/dev/pci/if_kse.c

1502

int nport, p, i, reg, val;

sys/dev/pci/if_kse.c

1512

val = CSR_READ_2(sc, IADR5) << 16;

sys/dev/pci/if_kse.c

1513

} while ((val & IADR_LATCH) == 0);

sys/dev/pci/if_kse.c

1514

if (val & IADR_OVF) {

sys/dev/pci/if_kse.c

1516

val = 0x3fffffff; /* has made overflow */

sys/dev/pci/if_kse.c

1519

val &= 0x3fff0000; /* 29:16 */

sys/dev/pci/if_kse.c

1520

val |= CSR_READ_2(sc, IADR4); /* 15:0 */

sys/dev/pci/if_kse.c

1522

ee->pev[p][i].ev_count += val; /* ev0 thru 31 */

sys/dev/pci/if_kse.c

1536

int nport, p, i, reg, val;

sys/dev/pci/if_kse.c

1545

val = CSR_READ_2(sc, IADR5) << 16;

sys/dev/pci/if_kse.c

1546

} while ((val & IADR_LATCH) == 0);

sys/dev/pci/if_kse.c

67

#define CSR_WRITE_4(sc, off, val) \

sys/dev/pci/if_kse.c

68

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (off), (val))

sys/dev/pci/if_kse.c

71

#define CSR_WRITE_2(sc, off, val) \

sys/dev/pci/if_kse.c

72

bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (off), (val))

sys/dev/pci/if_lii.c

154

#define AT_WRITE_4(sc, reg, val) \

sys/dev/pci/if_lii.c

155

bus_space_write_4((sc)->sc_mmiot, (sc)->sc_mmioh, (reg), (val))

sys/dev/pci/if_lii.c

156

#define AT_WRITE_2(sc, reg, val) \

sys/dev/pci/if_lii.c

157

bus_space_write_2((sc)->sc_mmiot, (sc)->sc_mmioh, (reg), (val))

sys/dev/pci/if_lii.c

158

#define AT_WRITE_1(sc, reg, val) \

sys/dev/pci/if_lii.c

159

bus_space_write_1((sc)->sc_mmiot, (sc)->sc_mmioh, (reg), (val))

sys/dev/pci/if_lii.c

186

AT_WRITE_4(struct lii_softc *sc, bus_size_t reg, uint32_t val)

sys/dev/pci/if_lii.c

188

printf("AT_WRITE_4(%x, %x)\n", (unsigned int)reg, val);

sys/dev/pci/if_lii.c

189

bus_space_write_4(sc->sc_mmiot, sc->sc_mmioh, reg, val);

sys/dev/pci/if_lii.c

193

AT_WRITE_2(struct lii_softc *sc, bus_size_t reg, uint16_t val)

sys/dev/pci/if_lii.c

195

printf("AT_WRITE_2(%x, %x)\n", (unsigned int)reg, val);

sys/dev/pci/if_lii.c

196

bus_space_write_2(sc->sc_mmiot, sc->sc_mmioh, reg, val);

sys/dev/pci/if_lii.c

200

AT_WRITE_1(struct lii_softc *sc, bus_size_t reg, uint8_t val)

sys/dev/pci/if_lii.c

202

printf("AT_WRITE_1(%x, %x)\n", (unsigned int)reg, val);

sys/dev/pci/if_lii.c

203

bus_space_write_1(sc->sc_mmiot, sc->sc_mmioh, reg, val);

sys/dev/pci/if_lii.c

402

uint32_t val;

sys/dev/pci/if_lii.c

404

val = AT_READ_4(sc, ATL2_SFC);

sys/dev/pci/if_lii.c

405

if (val & SFC_EN_VPD)

sys/dev/pci/if_lii.c

406

AT_WRITE_4(sc, ATL2_SFC, val & ~(SFC_EN_VPD));

sys/dev/pci/if_lii.c

414

lii_eeprom_read(struct lii_softc *sc, uint32_t reg, uint32_t *val)

sys/dev/pci/if_lii.c

416

int r = pci_vpd_read(sc->sc_pc, sc->sc_tag, reg, 1, (pcireg_t *)val);

sys/dev/pci/if_lii.c

418

DPRINTF(("lii_eeprom_read(%x) = %x\n", reg, *val));

sys/dev/pci/if_lii.c

496

lii_spi_read(struct lii_softc *sc, uint32_t reg, uint32_t *val)

sys/dev/pci/if_lii.c

520

*val = AT_READ_4(sc, ATL2_SF_DATA);

sys/dev/pci/if_lii.c

528

uint32_t val, val1, addr0 = 0, addr1 = 0;

sys/dev/pci/if_lii.c

531

while ((*sc->sc_memread)(sc, offset, &val) == 0) {

sys/dev/pci/if_lii.c

535

if ((val & 0xff) != 0x5a)

sys/dev/pci/if_lii.c

542

val >>= 16;

sys/dev/pci/if_lii.c

543

switch (val) {

sys/dev/pci/if_lii.c

583

lii_mii_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_lii.c

611

*val = data & 0x0000ffff;

sys/dev/pci/if_lii.c

616

lii_mii_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_lii.c

623

data |= (val & MDIOC_DATA_MASK) << MDIOC_DATA_SHIFT;

sys/dev/pci/if_lii.c

652

uint32_t val;

sys/dev/pci/if_lii.c

656

val = AT_READ_4(sc, ATL2_MACC);

sys/dev/pci/if_lii.c

659

val |= MACC_FDX;

sys/dev/pci/if_lii.c

661

val &= ~MACC_FDX;

sys/dev/pci/if_lii.c

663

AT_WRITE_4(sc, ATL2_MACC, val);

sys/dev/pci/if_lii.c

694

uint32_t val;

sys/dev/pci/if_lii.c

787

val = AT_READ_4(sc, ATL2_MACC) & MACC_FDX;

sys/dev/pci/if_lii.c

789

val |= MACC_RX_EN | MACC_TX_EN | MACC_MACLP_CLK_PHY |

sys/dev/pci/if_lii.c

794

val |= MACC_PROMISC_EN;

sys/dev/pci/if_lii.c

796

val |= MACC_ALLMULTI_EN;

sys/dev/pci/if_lii.c

798

val |= 7 << MACC_PREAMBLE_LEN_SHIFT;

sys/dev/pci/if_lii.c

799

val |= 2 << MACC_HDX_LEFT_BUF_SHIFT;

sys/dev/pci/if_lii.c

801

AT_WRITE_4(sc, ATL2_MACC, val);

sys/dev/pci/if_mcx.c

2722

mcx_get_id(uint32_t val)

sys/dev/pci/if_mcx.c

2724

return be32toh(val) & 0x00ffffff;

sys/dev/pci/if_mcx.c

7021

uint32_t val;

sys/dev/pci/if_mcx.c

7024

val = ((cq->cq_count) & 3) << MCX_CQ_DOORBELL_ARM_CMD_SN_SHIFT;

sys/dev/pci/if_mcx.c

7025

val |= (cq->cq_cons & MCX_CQ_DOORBELL_ARM_CI_MASK);

sys/dev/pci/if_mcx.c

7033

be32enc(&db->db_arm_ci, val);

sys/dev/pci/if_mcx.c

7040

uval = (uint64_t)val << 32;

sys/dev/pci/if_mcx.c

7126

uint32_t val;

sys/dev/pci/if_mcx.c

7129

val = (eq->eq_n << 24) | (eq->eq_cons & 0xffffff);

sys/dev/pci/if_mcx.c

7131

mcx_wr(sc, offset, val);

sys/dev/pci/if_mcx.c

7132

mcx_bar(sc, offset, sizeof(val), BUS_SPACE_BARRIER_WRITE);

sys/dev/pci/if_msk.c

281

msk_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_msk.c

304

*val = SK_YU_READ_2(sc_if, YUKON_SMIDR);

sys/dev/pci/if_msk.c

307

phy, reg, *val));

sys/dev/pci/if_msk.c

313

msk_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_msk.c

319

phy, reg, val));

sys/dev/pci/if_msk.c

321

SK_YU_WRITE_2(sc_if, YUKON_SMIDR, val);

sys/dev/pci/if_nfe.c

537

nfe_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_nfe.c

575

*val = data & 0x0000ffff;

sys/dev/pci/if_nfe.c

580

nfe_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_nfe.c

593

NFE_WRITE(sc, NFE_PHY_DATA, val);

sys/dev/pci/if_nfereg.h

202

#define NFE_WRITE(sc, reg, val) \

sys/dev/pci/if_nfereg.h

203

bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (reg), (val))

sys/dev/pci/if_ntwoc_pci.c

150

ntwoc_pci_sca_write_1(struct sca_softc *sc, u_int reg, u_int8_t val)

sys/dev/pci/if_ntwoc_pci.c

152

bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val);

sys/dev/pci/if_ntwoc_pci.c

156

ntwoc_pci_sca_write_2(struct sca_softc *sc, u_int reg, u_int16_t val)

sys/dev/pci/if_ntwoc_pci.c

158

bus_space_write_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val);

sys/dev/pci/if_pcn.c

2143

pcn_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_pcn.c

2148

*val = pcn_bcr_read(sc, LE_BCR34) & LE_B34_MIIMD;

sys/dev/pci/if_pcn.c

2149

if (*val == 0xffff)

sys/dev/pci/if_pcn.c

2161

pcn_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_pcn.c

2166

pcn_bcr_write(sc, LE_BCR34, val);

sys/dev/pci/if_pcn.c

471

pcn_csr_write(struct pcn_softc *sc, int reg, uint32_t val)

sys/dev/pci/if_pcn.c

475

bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_RDP, val);

sys/dev/pci/if_pcn.c

487

pcn_bcr_write(struct pcn_softc *sc, int reg, uint32_t val)

sys/dev/pci/if_pcn.c

491

bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_BDP, val);

sys/dev/pci/if_pcn.c

634

uint32_t val;

sys/dev/pci/if_pcn.c

635

val = pcn_csr_read(sc, LE_CSR12 + i);

sys/dev/pci/if_pcn.c

636

enaddr[2 * i] = val & 0xff;

sys/dev/pci/if_pcn.c

637

enaddr[2 * i + 1] = (val >> 8) & 0xff;

sys/dev/pci/if_rge.c

1087

uint16_t val;

sys/dev/pci/if_rge.c

1092

val = rge_read_sds(sc, 0x003f);

sys/dev/pci/if_rge.c

1093

val &= ~0x0008;

sys/dev/pci/if_rge.c

1094

rge_write_sds(sc, 0x003f, val);

sys/dev/pci/if_rge.c

1097

val = rge_read_sds(sc, 0x0040);

sys/dev/pci/if_rge.c

1098

val &= ~0x3040;

sys/dev/pci/if_rge.c

1099

val |= 0x0040;

sys/dev/pci/if_rge.c

1100

rge_write_sds(sc, 0x0040, val);

sys/dev/pci/if_rge.c

1109

val = RGE_READ_2(sc, 0x233e);

sys/dev/pci/if_rge.c

1110

val &= 0x3003;

sys/dev/pci/if_rge.c

1111

val |= 0x1000;

sys/dev/pci/if_rge.c

1112

RGE_WRITE_2(sc, 0x233e, val);

sys/dev/pci/if_rge.c

1119

val = rge_read_phy_ocp(sc, 0xc804);

sys/dev/pci/if_rge.c

1120

val &= ~0x000f;

sys/dev/pci/if_rge.c

1121

val |= 0x000c;

sys/dev/pci/if_rge.c

1122

rge_write_phy_ocp(sc, 0xc804, val);

sys/dev/pci/if_rge.c

1136

int anar, gig, val;

sys/dev/pci/if_rge.c

1150

val = rge_read_phy_ocp(sc, 0xa5d4);

sys/dev/pci/if_rge.c

1153

val &= ~RGE_ADV_10000TFDX;

sys/dev/pci/if_rge.c

1157

val &= ~RGE_ADV_5000TFDX;

sys/dev/pci/if_rge.c

1160

val &= ~RGE_ADV_2500TFDX;

sys/dev/pci/if_rge.c

1169

val |= RGE_ADV_2500TFDX;

sys/dev/pci/if_rge.c

1171

val |= RGE_ADV_5000TFDX;

sys/dev/pci/if_rge.c

1173

val |= RGE_ADV_5000TFDX | RGE_ADV_10000TFDX;

sys/dev/pci/if_rge.c

1176

val |= RGE_ADV_10000TFDX;

sys/dev/pci/if_rge.c

1180

val |= RGE_ADV_5000TFDX;

sys/dev/pci/if_rge.c

1184

val |= RGE_ADV_2500TFDX;

sys/dev/pci/if_rge.c

1213

rge_write_phy_ocp(sc, 0xa5d4, val);

sys/dev/pci/if_rge.c

164

uint16_t val;

sys/dev/pci/if_rge.c

1901

rtl8125_mac_bps[i].val);

sys/dev/pci/if_rge.c

1931

rtl8125b_mac_bps[i].val);

sys/dev/pci/if_rge.c

1979

rtl8125d_2_mac_bps[i].val);

sys/dev/pci/if_rge.c

2145

uint16_t val;

sys/dev/pci/if_rge.c

2149

rge_write_ephy(sc, mac_r25_ephy[i].reg, mac_r25_ephy[i].val);

sys/dev/pci/if_rge.c

2151

val = rge_read_ephy(sc, 0x002a) & ~0x7000;

sys/dev/pci/if_rge.c

2152

rge_write_ephy(sc, 0x002a, val | 0x3000);

sys/dev/pci/if_rge.c

2158

val = rge_read_ephy(sc, 0x006a) & ~0x7000;

sys/dev/pci/if_rge.c

2159

rge_write_ephy(sc, 0x006a, val | 0x3000);

sys/dev/pci/if_rge.c

2173

rge_write_ephy(sc, mac_r25b_ephy[i].reg, mac_r25b_ephy[i].val);

sys/dev/pci/if_rge.c

2183

mac_r27_ephy[i].val);

sys/dev/pci/if_rge.c

2192

uint16_t val = 0;

sys/dev/pci/if_rge.c

2206

val |= RGE_ADV_10000TFDX;

sys/dev/pci/if_rge.c

2210

val |= RGE_ADV_5000TFDX;

sys/dev/pci/if_rge.c

2213

val |= RGE_ADV_2500TFDX;

sys/dev/pci/if_rge.c

2217

RGE_PHY_CLRBIT(sc, 0xa5d4, val);

sys/dev/pci/if_rge.c

2293

uint16_t val;

sys/dev/pci/if_rge.c

2315

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2316

rge_write_phy_ocp(sc, 0xa438, val | 0x9300);

sys/dev/pci/if_rge.c

2318

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2319

rge_write_phy_ocp(sc, 0xa438, val | 0x0f00);

sys/dev/pci/if_rge.c

2321

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2322

rge_write_phy_ocp(sc, 0xa438, val | 0x0f00);

sys/dev/pci/if_rge.c

2324

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2325

rge_write_phy_ocp(sc, 0xa438, val | 0xb900);

sys/dev/pci/if_rge.c

2334

val = rge_read_phy_ocp(sc, 0xbf38) & ~0x01f0;

sys/dev/pci/if_rge.c

2335

rge_write_phy_ocp(sc, 0xbf38, val | 0x0160);

sys/dev/pci/if_rge.c

2336

val = rge_read_phy_ocp(sc, 0xbf3a) & ~0x001f;

sys/dev/pci/if_rge.c

2337

rge_write_phy_ocp(sc, 0xbf3a, val | 0x0014);

sys/dev/pci/if_rge.c

2340

val = rge_read_phy_ocp(sc, 0xbf28) & ~0x1fff;

sys/dev/pci/if_rge.c

2341

rge_write_phy_ocp(sc, 0xbf28, val | 0x0187);

sys/dev/pci/if_rge.c

2342

val = rge_read_phy_ocp(sc, 0xbf2a) & ~0x003f;

sys/dev/pci/if_rge.c

2343

rge_write_phy_ocp(sc, 0xbf2a, val | 0x0003);

sys/dev/pci/if_rge.c

2363

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2364

rge_write_phy_ocp(sc, 0xa438, val | 0xa600);

sys/dev/pci/if_rge.c

2366

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2367

rge_write_phy_ocp(sc, 0xa438, val | 0xa600);

sys/dev/pci/if_rge.c

2369

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2370

rge_write_phy_ocp(sc, 0xa438, val | 0xa600);

sys/dev/pci/if_rge.c

2372

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2373

rge_write_phy_ocp(sc, 0xa438, val | 0xa600);

sys/dev/pci/if_rge.c

2375

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2376

rge_write_phy_ocp(sc, 0xa438, val | 0x1400);

sys/dev/pci/if_rge.c

2378

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2379

rge_write_phy_ocp(sc, 0xa438, val | 0x1400);

sys/dev/pci/if_rge.c

2381

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2382

rge_write_phy_ocp(sc, 0xa438, val | 0xa600);

sys/dev/pci/if_rge.c

2396

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2397

rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);

sys/dev/pci/if_rge.c

2399

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2400

rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);

sys/dev/pci/if_rge.c

2402

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2403

rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);

sys/dev/pci/if_rge.c

2405

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2406

rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);

sys/dev/pci/if_rge.c

2408

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2409

rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);

sys/dev/pci/if_rge.c

2411

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2412

rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);

sys/dev/pci/if_rge.c

2418

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2419

rge_write_phy_ocp(sc, 0xb87e, val | 0x2800);

sys/dev/pci/if_rge.c

2422

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2423

rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);

sys/dev/pci/if_rge.c

2425

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2426

rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);

sys/dev/pci/if_rge.c

2428

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2429

rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);

sys/dev/pci/if_rge.c

2430

val = rge_read_phy_ocp(sc, 0xae4e) & ~0x000f;

sys/dev/pci/if_rge.c

2431

rge_write_phy_ocp(sc, 0xae4e, val | 0x0001);

sys/dev/pci/if_rge.c

2433

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xf000;

sys/dev/pci/if_rge.c

2434

rge_write_phy_ocp(sc, 0xb87e, val | 0x4000);

sys/dev/pci/if_rge.c

2442

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2443

rge_write_phy_ocp(sc, 0xb87e, val | 0x6000);

sys/dev/pci/if_rge.c

2453

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2454

rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);

sys/dev/pci/if_rge.c

2462

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2463

rge_write_phy_ocp(sc, 0xb87e, val | 0xdc00);

sys/dev/pci/if_rge.c

2465

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xc000;

sys/dev/pci/if_rge.c

2466

rge_write_phy_ocp(sc, 0xb87e, val | 0x4000);

sys/dev/pci/if_rge.c

2474

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2475

rge_write_phy_ocp(sc, 0xb87e, val | 0x0e00);

sys/dev/pci/if_rge.c

2482

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2483

rge_write_phy_ocp(sc, 0xa438, val | 0x0700);

sys/dev/pci/if_rge.c

2485

val = rge_read_phy_ocp(sc, 0xb87e) & ~0x3f00;

sys/dev/pci/if_rge.c

2486

rge_write_phy_ocp(sc, 0xb87e, val | 0x2a00);

sys/dev/pci/if_rge.c

2488

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2489

rge_write_phy_ocp(sc, 0xa438, val | 0x0b00);

sys/dev/pci/if_rge.c

2491

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2492

rge_write_phy_ocp(sc, 0xb87e, val | 0x4e00);

sys/dev/pci/if_rge.c

2494

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2495

rge_write_phy_ocp(sc, 0xb87e, val | 0x2300);

sys/dev/pci/if_rge.c

2510

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2511

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2513

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2514

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2516

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2517

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2519

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2520

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2522

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2523

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2525

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2526

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2528

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2529

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2531

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2532

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2534

val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;

sys/dev/pci/if_rge.c

2535

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2538

val = rge_read_phy_ocp(sc, 0xbfb4) & ~0x07ff;

sys/dev/pci/if_rge.c

2539

rge_write_phy_ocp(sc, 0xbfb4, val | 0x0328);

sys/dev/pci/if_rge.c

2549

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2550

rge_write_phy_ocp(sc, 0xb87e, val | 0x0200);

sys/dev/pci/if_rge.c

2552

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2553

rge_write_phy_ocp(sc, 0xa438, val | 0x0a00);

sys/dev/pci/if_rge.c

2555

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2556

rge_write_phy_ocp(sc, 0xa438, val | 0x1600);

sys/dev/pci/if_rge.c

2563

uint16_t val;

sys/dev/pci/if_rge.c

2582

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2583

rge_write_phy_ocp(sc, 0xa438, val | 0xed00);

sys/dev/pci/if_rge.c

2585

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2586

rge_write_phy_ocp(sc, 0xa438, val | 0x1000);

sys/dev/pci/if_rge.c

2588

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2589

rge_write_phy_ocp(sc, 0xa438, val | 0xc800);

sys/dev/pci/if_rge.c

2591

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2592

rge_write_phy_ocp(sc, 0xa438, val | 0xc800);

sys/dev/pci/if_rge.c

2598

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2599

rge_write_phy_ocp(sc, 0xa438, val | 0x4700);

sys/dev/pci/if_rge.c

2600

val = rge_read_phy_ocp(sc, 0xa80c) & ~0x00c0;

sys/dev/pci/if_rge.c

2601

rge_write_phy_ocp(sc, 0xa80c, val | 0x0080);

sys/dev/pci/if_rge.c

2605

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2606

rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);

sys/dev/pci/if_rge.c

2609

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2610

rge_write_phy_ocp(sc, 0xa438, val | 0x5900);

sys/dev/pci/if_rge.c

2615

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2616

rge_write_phy_ocp(sc, 0xb87e, val | 0x2f00);

sys/dev/pci/if_rge.c

2618

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2619

rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);

sys/dev/pci/if_rge.c

2622

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2623

rge_write_phy_ocp(sc, 0xb87e, val | 0x9900);

sys/dev/pci/if_rge.c

2625

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2626

rge_write_phy_ocp(sc, 0xb87e, val | 0xc100);

sys/dev/pci/if_rge.c

2630

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2631

rge_write_phy_ocp(sc, 0xb87e, val | 0xe600);

sys/dev/pci/if_rge.c

2633

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2634

rge_write_phy_ocp(sc, 0xb87e, val | 0x1200);

sys/dev/pci/if_rge.c

2636

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2637

rge_write_phy_ocp(sc, 0xb87e, val | 0xe600);

sys/dev/pci/if_rge.c

2645

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2646

rge_write_phy_ocp(sc, 0xb87e, val | 0x5a00);

sys/dev/pci/if_rge.c

2650

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2651

rge_write_phy_ocp(sc, 0xb87e, val | 0x5a00);

sys/dev/pci/if_rge.c

2661

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2662

rge_write_phy_ocp(sc, 0xb87e, val | 0x3000);

sys/dev/pci/if_rge.c

2664

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2665

rge_write_phy_ocp(sc, 0xb87e, val | 0x3000);

sys/dev/pci/if_rge.c

2667

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2668

rge_write_phy_ocp(sc, 0xb87e, val | 0x3300);

sys/dev/pci/if_rge.c

2670

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2671

rge_write_phy_ocp(sc, 0xb87e, val | 0x3300);

sys/dev/pci/if_rge.c

2672

val = rge_read_phy_ocp(sc, 0xae06) & ~0xfc00;

sys/dev/pci/if_rge.c

2673

rge_write_phy_ocp(sc, 0xae06, val | 0x7c00);

sys/dev/pci/if_rge.c

2677

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2678

rge_write_phy_ocp(sc, 0xa438, val | 0x0a00);

sys/dev/pci/if_rge.c

2703

val = rge_read_phy_ocp(sc, 0xbd96) & ~0x1f00;

sys/dev/pci/if_rge.c

2704

rge_write_phy_ocp(sc, 0xbd96, val | 0x1000);

sys/dev/pci/if_rge.c

2705

val = rge_read_phy_ocp(sc, 0xbf1c) & ~0x0007;

sys/dev/pci/if_rge.c

2706

rge_write_phy_ocp(sc, 0xbf1c, val | 0x0007);

sys/dev/pci/if_rge.c

2708

val = rge_read_phy_ocp(sc, 0xbf40) & ~0x0380;

sys/dev/pci/if_rge.c

2709

rge_write_phy_ocp(sc, 0xbf40, val | 0x0280);

sys/dev/pci/if_rge.c

2710

val = rge_read_phy_ocp(sc, 0xbf90) & ~0x0080;

sys/dev/pci/if_rge.c

2711

rge_write_phy_ocp(sc, 0xbf90, val | 0x0060);

sys/dev/pci/if_rge.c

2712

val = rge_read_phy_ocp(sc, 0xbf90) & ~0x0010;

sys/dev/pci/if_rge.c

2713

rge_write_phy_ocp(sc, 0xbf90, val | 0x000c);

sys/dev/pci/if_rge.c

2717

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2718

rge_write_phy_ocp(sc, 0xa438, val | 0x2000);

sys/dev/pci/if_rge.c

2720

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2721

rge_write_phy_ocp(sc, 0xa438, val | 0x2000);

sys/dev/pci/if_rge.c

2730

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2731

rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);

sys/dev/pci/if_rge.c

2733

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2734

rge_write_phy_ocp(sc, 0xb87e, val | 0);

sys/dev/pci/if_rge.c

2736

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2737

rge_write_phy_ocp(sc, 0xb87e, val | 0x7f00);

sys/dev/pci/if_rge.c

2739

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2740

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2750

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2751

rge_write_phy_ocp(sc, 0xb87e, val | 0x0400);

sys/dev/pci/if_rge.c

2755

val = rge_read_phy_ocp(sc, 0xac3c) & ~0xd000;

sys/dev/pci/if_rge.c

2756

rge_write_phy_ocp(sc, 0xac3c, val | 0x2000);

sys/dev/pci/if_rge.c

2757

val = rge_read_phy_ocp(sc, 0xac42) & ~0x0200;

sys/dev/pci/if_rge.c

2758

rge_write_phy_ocp(sc, 0xac42, val | 0x01c0);

sys/dev/pci/if_rge.c

2761

val = rge_read_phy_ocp(sc, 0xac42) & ~0x0002;

sys/dev/pci/if_rge.c

2762

rge_write_phy_ocp(sc, 0xac42, val | 0x0005);

sys/dev/pci/if_rge.c

2767

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2768

rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);

sys/dev/pci/if_rge.c

2770

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2771

rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);

sys/dev/pci/if_rge.c

2773

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2774

rge_write_phy_ocp(sc, 0xb87e, val | 0x0b00);

sys/dev/pci/if_rge.c

2776

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2777

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2779

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2780

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2782

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2783

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2785

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2786

rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);

sys/dev/pci/if_rge.c

2788

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2789

rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);

sys/dev/pci/if_rge.c

2791

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2792

rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);

sys/dev/pci/if_rge.c

2794

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2795

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2797

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2798

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2800

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2801

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2804

val = rge_read_phy_ocp(sc, 0xade8) & ~0xffc0;

sys/dev/pci/if_rge.c

2805

rge_write_phy_ocp(sc, 0xade8, val | 0x1400);

sys/dev/pci/if_rge.c

2807

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2808

rge_write_phy_ocp(sc, 0xb87e, val | 0x9d00);

sys/dev/pci/if_rge.c

2816

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2817

rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00);

sys/dev/pci/if_rge.c

2824

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2825

rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00);

sys/dev/pci/if_rge.c

2834

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2835

rge_write_phy_ocp(sc, 0xb87e, val | 0);

sys/dev/pci/if_rge.c

2836

val = rge_read_phy_ocp(sc, 0xb54c) & ~0xffc0;

sys/dev/pci/if_rge.c

2837

rge_write_phy_ocp(sc, 0xb54c, val | 0x3700);

sys/dev/pci/if_rge.c

2843

uint16_t val;

sys/dev/pci/if_rge.c

2857

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2858

rge_write_phy_ocp(sc, 0xa438, val | 0x5900);

sys/dev/pci/if_rge.c

2864

val = rge_read_phy_ocp(sc, 0xae06) & ~0xfc00;

sys/dev/pci/if_rge.c

2865

rge_write_phy_ocp(sc, 0xae06, val | 0x7c00);

sys/dev/pci/if_rge.c

2867

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2868

rge_write_phy_ocp(sc, 0xb87e, val | 0xe600);

sys/dev/pci/if_rge.c

2870

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2871

rge_write_phy_ocp(sc, 0xb87e, val | 0x3000);

sys/dev/pci/if_rge.c

2873

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2874

rge_write_phy_ocp(sc, 0xb87e, val | 0x3000);

sys/dev/pci/if_rge.c

2878

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2879

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2881

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2882

rge_write_phy_ocp(sc, 0xb87e, val | 0x0200);

sys/dev/pci/if_rge.c

2884

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2885

rge_write_phy_ocp(sc, 0xb87e, val | 0x0400);

sys/dev/pci/if_rge.c

2887

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2888

rge_write_phy_ocp(sc, 0xa438, val | 0x7700);

sys/dev/pci/if_rge.c

2897

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

2898

rge_write_phy_ocp(sc, 0xa438, val | 0x2900);

sys/dev/pci/if_rge.c

2900

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2901

rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);

sys/dev/pci/if_rge.c

2903

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2904

rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);

sys/dev/pci/if_rge.c

2906

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2907

rge_write_phy_ocp(sc, 0xb87e, val | 0x0b00);

sys/dev/pci/if_rge.c

2909

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2910

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2912

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2913

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2915

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2916

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2918

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2919

rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);

sys/dev/pci/if_rge.c

2921

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2922

rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);

sys/dev/pci/if_rge.c

2924

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2925

rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);

sys/dev/pci/if_rge.c

2927

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2928

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2930

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2931

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2933

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2934

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

2936

val = rge_read_phy_ocp(sc, 0xade8) & ~0xffc0;

sys/dev/pci/if_rge.c

2937

rge_write_phy_ocp(sc, 0xade8, val | 0x1400);

sys/dev/pci/if_rge.c

2939

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2940

rge_write_phy_ocp(sc, 0xb87e, val | 0x9d00);

sys/dev/pci/if_rge.c

2942

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2943

rge_write_phy_ocp(sc, 0xb87e, val | 0x1200);

sys/dev/pci/if_rge.c

2956

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2957

rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00);

sys/dev/pci/if_rge.c

2962

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2963

rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00);

sys/dev/pci/if_rge.c

2967

val = rge_read_phy_ocp(sc, 0xb54c) & ~0xffc0;

sys/dev/pci/if_rge.c

2968

rge_write_phy_ocp(sc, 0xb54c, val | 0x3700);

sys/dev/pci/if_rge.c

2971

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2972

rge_write_phy_ocp(sc, 0xb87e, val | 0x5d00);

sys/dev/pci/if_rge.c

2974

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2975

rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);

sys/dev/pci/if_rge.c

2977

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

2978

rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);

sys/dev/pci/if_rge.c

2984

uint16_t val;

sys/dev/pci/if_rge.c

3001

val = rge_read_phy_ocp(sc, 0xad16) & ~0x03ff;

sys/dev/pci/if_rge.c

3002

rge_write_phy_ocp(sc, 0xad16, val | 0x03ff);

sys/dev/pci/if_rge.c

3003

val = rge_read_phy_ocp(sc, 0xad32) & ~0x003f;

sys/dev/pci/if_rge.c

3004

rge_write_phy_ocp(sc, 0xad32, val | 0x0006);

sys/dev/pci/if_rge.c

3007

val = rge_read_phy_ocp(sc, 0xacc0) & ~0x0003;

sys/dev/pci/if_rge.c

3008

rge_write_phy_ocp(sc, 0xacc0, val | 0x0002);

sys/dev/pci/if_rge.c

3009

val = rge_read_phy_ocp(sc, 0xad40) & ~0x00e0;

sys/dev/pci/if_rge.c

3010

rge_write_phy_ocp(sc, 0xad40, val | 0x0040);

sys/dev/pci/if_rge.c

3011

val = rge_read_phy_ocp(sc, 0xad40) & ~0x0007;

sys/dev/pci/if_rge.c

3012

rge_write_phy_ocp(sc, 0xad40, val | 0x0004);

sys/dev/pci/if_rge.c

3015

val = rge_read_phy_ocp(sc, 0xac5e) & ~0x0007;

sys/dev/pci/if_rge.c

3016

rge_write_phy_ocp(sc, 0xac5e, val | 0x0002);

sys/dev/pci/if_rge.c

3019

val = rge_read_phy_ocp(sc, 0xac8a) & ~0x00f0;

sys/dev/pci/if_rge.c

3020

rge_write_phy_ocp(sc, 0xac8a, val | 0x0030);

sys/dev/pci/if_rge.c

3022

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3023

rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);

sys/dev/pci/if_rge.c

3025

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3026

rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);

sys/dev/pci/if_rge.c

3055

val = rge_read_phy_ocp(sc, 0xb54c) & ~0xff00;

sys/dev/pci/if_rge.c

3056

rge_write_phy_ocp(sc, 0xb54c, val | 0xdb00);

sys/dev/pci/if_rge.c

3068

uint16_t val;

sys/dev/pci/if_rge.c

3074

val = rge_read_phy_ocp(sc, 0xac46) & ~0x00f0;

sys/dev/pci/if_rge.c

3075

rge_write_phy_ocp(sc, 0xac46, val | 0x0090);

sys/dev/pci/if_rge.c

3076

val = rge_read_phy_ocp(sc, 0xad30) & ~0x0003;

sys/dev/pci/if_rge.c

3077

rge_write_phy_ocp(sc, 0xad30, val | 0x0001);

sys/dev/pci/if_rge.c

3083

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3084

rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);

sys/dev/pci/if_rge.c

3085

val = rge_read_phy_ocp(sc, 0xbf00) & ~0xe000;

sys/dev/pci/if_rge.c

3086

rge_write_phy_ocp(sc, 0xbf00, val | 0xa000);

sys/dev/pci/if_rge.c

3087

val = rge_read_phy_ocp(sc, 0xbf46) & ~0x0f00;

sys/dev/pci/if_rge.c

3088

rge_write_phy_ocp(sc, 0xbf46, val | 0x0300);

sys/dev/pci/if_rge.c

3094

val = rge_read_phy_ocp(sc, 0xbf84) & ~0xe000;

sys/dev/pci/if_rge.c

3095

rge_write_phy_ocp(sc, 0xbf84, val | 0xa000);

sys/dev/pci/if_rge.c

3097

val = rge_read_phy_ocp(sc, 0xa438) & ~0x2700;

sys/dev/pci/if_rge.c

3098

rge_write_phy_ocp(sc, 0xa438, val | 0xd800);

sys/dev/pci/if_rge.c

3105

uint16_t val;

sys/dev/pci/if_rge.c

3114

val = rge_read_phy_ocp(sc, 0xbf94) & ~0x0007;

sys/dev/pci/if_rge.c

3115

rge_write_phy_ocp(sc, 0xbf94, val | 0x0005);

sys/dev/pci/if_rge.c

3116

val = rge_read_phy_ocp(sc, 0xbf8e) & ~0x3c00;

sys/dev/pci/if_rge.c

3117

rge_write_phy_ocp(sc, 0xbf8e, val | 0x2800);

sys/dev/pci/if_rge.c

3118

val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;

sys/dev/pci/if_rge.c

3119

rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000);

sys/dev/pci/if_rge.c

3121

val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;

sys/dev/pci/if_rge.c

3122

rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000);

sys/dev/pci/if_rge.c

3123

val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f;

sys/dev/pci/if_rge.c

3124

rge_write_phy_ocp(sc, 0xbc80, val | 0x0004);

sys/dev/pci/if_rge.c

3127

val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f;

sys/dev/pci/if_rge.c

3128

rge_write_phy_ocp(sc, 0xbc80, val | 0x0005);

sys/dev/pci/if_rge.c

3129

val = rge_read_phy_ocp(sc, 0xbc82) & ~0x00e0;

sys/dev/pci/if_rge.c

3130

rge_write_phy_ocp(sc, 0xbc82, val | 0x0040);

sys/dev/pci/if_rge.c

3133

val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;

sys/dev/pci/if_rge.c

3134

rge_write_phy_ocp(sc, 0xbcd8, val | 0x8000);

sys/dev/pci/if_rge.c

3143

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3144

rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);

sys/dev/pci/if_rge.c

3145

val = rge_read_phy_ocp(sc, 0xb106) & ~0x0700;

sys/dev/pci/if_rge.c

3146

rge_write_phy_ocp(sc, 0xb106, val | 0x0100);

sys/dev/pci/if_rge.c

3147

val = rge_read_phy_ocp(sc, 0xb206) & ~0x0700;

sys/dev/pci/if_rge.c

3148

rge_write_phy_ocp(sc, 0xb206, val | 0x0200);

sys/dev/pci/if_rge.c

3149

val = rge_read_phy_ocp(sc, 0xb306) & ~0x0700;

sys/dev/pci/if_rge.c

3150

rge_write_phy_ocp(sc, 0xb306, val | 0x0300);

sys/dev/pci/if_rge.c

3152

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3153

rge_write_phy_ocp(sc, 0xb87e, val | 0x0300);

sys/dev/pci/if_rge.c

3158

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3159

rge_write_phy_ocp(sc, 0xb87e, val | 0x0200);

sys/dev/pci/if_rge.c

3162

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3163

rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);

sys/dev/pci/if_rge.c

3165

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3166

rge_write_phy_ocp(sc, 0xb87e, val | 0x0600);

sys/dev/pci/if_rge.c

3168

val = rge_read_phy_ocp(sc, 0xac7e) & ~0x01fc;

sys/dev/pci/if_rge.c

3169

rge_write_phy_ocp(sc, 0xac7e, val | 0x00B4);

sys/dev/pci/if_rge.c

3171

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3172

rge_write_phy_ocp(sc, 0xb87e, val | 0x7a00);

sys/dev/pci/if_rge.c

3174

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3175

rge_write_phy_ocp(sc, 0xb87e, val | 0x3a00);

sys/dev/pci/if_rge.c

3177

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3178

rge_write_phy_ocp(sc, 0xb87e, val | 0x7400);

sys/dev/pci/if_rge.c

3180

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3181

rge_write_phy_ocp(sc, 0xb87e, val | 0x3400);

sys/dev/pci/if_rge.c

3183

val = rge_read_phy_ocp(sc, 0xad66) & ~0x000f;

sys/dev/pci/if_rge.c

3184

rge_write_phy_ocp(sc, 0xad66, val | 0x0007);

sys/dev/pci/if_rge.c

3185

val = rge_read_phy_ocp(sc, 0xad68) & ~0xf000;

sys/dev/pci/if_rge.c

3186

rge_write_phy_ocp(sc, 0xad68, val | 0x8000);

sys/dev/pci/if_rge.c

3187

val = rge_read_phy_ocp(sc, 0xad68) & ~0x0f00;

sys/dev/pci/if_rge.c

3188

rge_write_phy_ocp(sc, 0xad68, val | 0x0500);

sys/dev/pci/if_rge.c

3189

val = rge_read_phy_ocp(sc, 0xad68) & ~0x000f;

sys/dev/pci/if_rge.c

3190

rge_write_phy_ocp(sc, 0xad68, val | 0x0002);

sys/dev/pci/if_rge.c

3191

val = rge_read_phy_ocp(sc, 0xad6a) & ~0xf000;

sys/dev/pci/if_rge.c

3192

rge_write_phy_ocp(sc, 0xad6a, val | 0x7000);

sys/dev/pci/if_rge.c

3195

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3196

rge_write_phy_ocp(sc, 0xa438, val | 0x5400);

sys/dev/pci/if_rge.c

3197

val = rge_read_phy_ocp(sc, 0xa864) & ~0x00f0;

sys/dev/pci/if_rge.c

3198

rge_write_phy_ocp(sc, 0xa864, val | 0x00c0);

sys/dev/pci/if_rge.c

3199

val = rge_read_phy_ocp(sc, 0xa42c) & ~0x00ff;

sys/dev/pci/if_rge.c

3200

rge_write_phy_ocp(sc, 0xa42c, val | 0x0002);

sys/dev/pci/if_rge.c

3202

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3203

rge_write_phy_ocp(sc, 0xa438, val | 0x0f00);

sys/dev/pci/if_rge.c

3205

val = rge_read_phy_ocp(sc, 0xa438) & ~0xf000;

sys/dev/pci/if_rge.c

3206

rge_write_phy_ocp(sc, 0xa438, val | 0x0700);

sys/dev/pci/if_rge.c

3211

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3212

rge_write_phy_ocp(sc, 0xa438, val | 0xca00);

sys/dev/pci/if_rge.c

3214

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3215

rge_write_phy_ocp(sc, 0xa438, val | 0xb300);

sys/dev/pci/if_rge.c

3219

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3220

rge_write_phy_ocp(sc, 0xa438, val | 0xca00);

sys/dev/pci/if_rge.c

3222

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3223

rge_write_phy_ocp(sc, 0xa438, val | 0xbb00);

sys/dev/pci/if_rge.c

3229

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3230

rge_write_phy_ocp(sc, 0xa438, val | 0x5800);

sys/dev/pci/if_rge.c

3238

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3239

rge_write_phy_ocp(sc, 0xa438, val | 0x1400);

sys/dev/pci/if_rge.c

3246

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3247

rge_write_phy_ocp(sc, 0xa438, val | 0x0600);

sys/dev/pci/if_rge.c

3249

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3250

rge_write_phy_ocp(sc, 0xa438, val | 0x0500);

sys/dev/pci/if_rge.c

3252

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3253

rge_write_phy_ocp(sc, 0xa438, val | 0x1f00);

sys/dev/pci/if_rge.c

3255

val = rge_read_phy_ocp(sc, 0xbc3a) & ~0x000f;

sys/dev/pci/if_rge.c

3256

rge_write_phy_ocp(sc, 0xbc3a, val | 0x0006);

sys/dev/pci/if_rge.c

3261

val = rge_read_phy_ocp(sc, 0xbfa0) & ~0xff70;

sys/dev/pci/if_rge.c

3262

rge_write_phy_ocp(sc, 0xbfa0, val | 0x5500);

sys/dev/pci/if_rge.c

3265

val = rge_read_phy_ocp(sc, 0xa438) & ~0x0700;

sys/dev/pci/if_rge.c

3266

rge_write_phy_ocp(sc, 0xa438, val | 0x0200);

sys/dev/pci/if_rge.c

3277

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3278

rge_write_phy_ocp(sc, 0xa438, val | 0x2900);

sys/dev/pci/if_rge.c

3281

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3282

rge_write_phy_ocp(sc, 0xa438, val | 0x1700);

sys/dev/pci/if_rge.c

3285

val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;

sys/dev/pci/if_rge.c

3286

rge_write_phy_ocp(sc, 0xa438, val | 0x1700);

sys/dev/pci/if_rge.c

3298

uint16_t val;

sys/dev/pci/if_rge.c

3305

val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;

sys/dev/pci/if_rge.c

3306

rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000);

sys/dev/pci/if_rge.c

3308

val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;

sys/dev/pci/if_rge.c

3309

rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000);

sys/dev/pci/if_rge.c

3310

val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f;

sys/dev/pci/if_rge.c

3311

rge_write_phy_ocp(sc, 0xbc80, val | 0x0004);

sys/dev/pci/if_rge.c

3314

val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f;

sys/dev/pci/if_rge.c

3315

rge_write_phy_ocp(sc, 0xbc80, val | 0x0005);

sys/dev/pci/if_rge.c

3316

val = rge_read_phy_ocp(sc, 0xbc82) & ~0x00e0;

sys/dev/pci/if_rge.c

3317

rge_write_phy_ocp(sc, 0xbc82, val | 0x0040);

sys/dev/pci/if_rge.c

3320

val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;

sys/dev/pci/if_rge.c

3321

rge_write_phy_ocp(sc, 0xbcd8, val | 0x8000);

sys/dev/pci/if_rge.c

3325

val = rge_read_phy_ocp(sc, 0xac7e) & ~0x01fc;

sys/dev/pci/if_rge.c

3326

rge_write_phy_ocp(sc, 0xac7e, val | 0x00b4);

sys/dev/pci/if_rge.c

3328

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3329

rge_write_phy_ocp(sc, 0xb87e, val | 0x7a00);

sys/dev/pci/if_rge.c

3331

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3332

rge_write_phy_ocp(sc, 0xb87e, val | 0x3a00);

sys/dev/pci/if_rge.c

3334

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3335

rge_write_phy_ocp(sc, 0xb87e, val | 0x7400);

sys/dev/pci/if_rge.c

3337

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3338

rge_write_phy_ocp(sc, 0xb87e, val | 0x3400);

sys/dev/pci/if_rge.c

3340

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3341

rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);

sys/dev/pci/if_rge.c

3343

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3344

rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);

sys/dev/pci/if_rge.c

3346

val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;

sys/dev/pci/if_rge.c

3347

rge_write_phy_ocp(sc, 0xb87e, val | 0xef00);

sys/dev/pci/if_rge.c

3374

mac_r25_mcu[i].reg, mac_r25_mcu[i].val);

sys/dev/pci/if_rge.c

3386

mac_r25b_mcu[i].reg, mac_r25b_mcu[i].val);

sys/dev/pci/if_rge.c

3391

mac_r25d_1_mcu[i].val);

sys/dev/pci/if_rge.c

3398

mac_r25d_1_mcu[i].val);

sys/dev/pci/if_rge.c

3405

mac_r25d_1_mcu[i].val);

sys/dev/pci/if_rge.c

3410

mac_r25d_2_mcu[i].val);

sys/dev/pci/if_rge.c

3417

mac_r25d_2_mcu[i].val);

sys/dev/pci/if_rge.c

3421

mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val);

sys/dev/pci/if_rge.c

3427

mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val);

sys/dev/pci/if_rge.c

3431

mac_r26_2_mcu[i].reg, mac_r26_2_mcu[i].val);

sys/dev/pci/if_rge.c

3435

mac_r27_mcu[i].reg, mac_r27_mcu[i].val);

sys/dev/pci/if_rge.c

3441

mac_r27_mcu[i].reg, mac_r27_mcu[i].val);

sys/dev/pci/if_rge.c

3671

uint16_t val;

sys/dev/pci/if_rge.c

3673

val = rge_read_mac_ocp(sc, 0xe446) & ~0x0003;

sys/dev/pci/if_rge.c

3674

val |= page;

sys/dev/pci/if_rge.c

3675

rge_write_mac_ocp(sc, 0xe446, val);

sys/dev/pci/if_rge.c

3726

rge_write_csi(struct rge_softc *sc, uint32_t reg, uint32_t val)

sys/dev/pci/if_rge.c

3730

RGE_WRITE_4(sc, RGE_CSIDR, val);

sys/dev/pci/if_rge.c

3763

rge_write_mac_ocp(struct rge_softc *sc, uint16_t reg, uint16_t val)

sys/dev/pci/if_rge.c

3768

tmp += val;

sys/dev/pci/if_rge.c

3776

uint32_t val;

sys/dev/pci/if_rge.c

3778

val = (reg >> 1) << RGE_MACOCP_ADDR_SHIFT;

sys/dev/pci/if_rge.c

3779

RGE_WRITE_4(sc, RGE_MACOCP, val);

sys/dev/pci/if_rge.c

3785

rge_write_ephy(struct rge_softc *sc, uint16_t reg, uint16_t val)

sys/dev/pci/if_rge.c

3791

tmp |= RGE_EPHYAR_BUSY | (val & RGE_EPHYAR_DATA_MASK);

sys/dev/pci/if_rge.c

3806

uint32_t val;

sys/dev/pci/if_rge.c

3809

val = (reg & RGE_EPHYAR_ADDR_MASK) << RGE_EPHYAR_ADDR_SHIFT;

sys/dev/pci/if_rge.c

3810

RGE_WRITE_4(sc, RGE_EPHYAR, val);

sys/dev/pci/if_rge.c

3814

val = RGE_READ_4(sc, RGE_EPHYAR);

sys/dev/pci/if_rge.c

3815

if (val & RGE_EPHYAR_BUSY)

sys/dev/pci/if_rge.c

3821

return (val & RGE_EPHYAR_DATA_MASK);

sys/dev/pci/if_rge.c

3843

uint16_t val = 0xffff;

sys/dev/pci/if_rge.c

3849

val = RGE_READ_2(sc, RGE_SDS_DATA_OUT);

sys/dev/pci/if_rge.c

3851

return val;

sys/dev/pci/if_rge.c

3855

rge_write_sds(struct rge_softc *sc, uint16_t reg, uint16_t val)

sys/dev/pci/if_rge.c

3857

RGE_WRITE_2(sc, RGE_SDS_DATA_IN, val);

sys/dev/pci/if_rge.c

3884

uint16_t val;

sys/dev/pci/if_rge.c

3886

val = (reg >> 12);

sys/dev/pci/if_rge.c

3887

rge_write_ephy(sc, RGE_EPHYAR_EXT_ADDR, val);

sys/dev/pci/if_rge.c

3893

rge_r27_write_ephy(struct rge_softc *sc, uint16_t reg, uint16_t val)

sys/dev/pci/if_rge.c

3895

rge_write_ephy(sc, rge_check_ephy_ext_add(sc, reg), val);

sys/dev/pci/if_rge.c

3899

rge_write_phy(struct rge_softc *sc, uint16_t addr, uint16_t reg, uint16_t val)

sys/dev/pci/if_rge.c

3910

rge_write_phy_ocp(sc, phyaddr, val);

sys/dev/pci/if_rge.c

3929

rge_write_phy_ocp(struct rge_softc *sc, uint16_t reg, uint16_t val)

sys/dev/pci/if_rge.c

3935

tmp |= RGE_PHYOCP_BUSY | val;

sys/dev/pci/if_rge.c

3948

uint32_t val;

sys/dev/pci/if_rge.c

3951

val = (reg >> 1) << RGE_PHYOCP_ADDR_SHIFT;

sys/dev/pci/if_rge.c

3952

RGE_WRITE_4(sc, RGE_PHYOCP, val);

sys/dev/pci/if_rge.c

3956

val = RGE_READ_4(sc, RGE_PHYOCP);

sys/dev/pci/if_rge.c

3957

if (val & RGE_PHYOCP_BUSY)

sys/dev/pci/if_rge.c

3961

return (val & RGE_PHYOCP_DATA_MASK);

sys/dev/pci/if_rge.c

767

uint32_t rxconf, val;

sys/dev/pci/if_rge.c

815

val = rge_read_csi(sc, 0x70c) & ~0x3f000000;

sys/dev/pci/if_rge.c

816

rge_write_csi(sc, 0x70c, val | 0x27000000);

sys/dev/pci/if_rge.c

820

val = rge_read_csi(sc, 0x890) & ~0x00000001;

sys/dev/pci/if_rge.c

821

rge_write_csi(sc, 0x890, val);

sys/dev/pci/if_rge.c

843

val = rge_read_mac_ocp(sc, 0xe614);

sys/dev/pci/if_rge.c

844

val &= (sc->rge_type == MAC_R27) ? ~0x0f00 : ~0x0700;

sys/dev/pci/if_rge.c

846

rge_write_mac_ocp(sc, 0xe614, val | 0x0300);

sys/dev/pci/if_rge.c

848

rge_write_mac_ocp(sc, 0xe614, val | 0x0200);

sys/dev/pci/if_rge.c

850

rge_write_mac_ocp(sc, 0xe614, val | 0x0300);

sys/dev/pci/if_rge.c

852

rge_write_mac_ocp(sc, 0xe614, val | 0x0f00);

sys/dev/pci/if_rge.c

858

val = rge_read_mac_ocp(sc, 0xe63e) & ~0x0030;

sys/dev/pci/if_rge.c

859

rge_write_mac_ocp(sc, 0xe63e, val | 0x0020);

sys/dev/pci/if_rge.c

866

val = rge_read_mac_ocp(sc, 0xeb6a) & ~0x00ff;

sys/dev/pci/if_rge.c

867

rge_write_mac_ocp(sc, 0xeb6a, val | 0x0033);

sys/dev/pci/if_rge.c

869

val = rge_read_mac_ocp(sc, 0xeb50) & ~0x03e0;

sys/dev/pci/if_rge.c

870

rge_write_mac_ocp(sc, 0xeb50, val | 0x0040);

sys/dev/pci/if_rge.c

878

val = rge_read_mac_ocp(sc, 0xea1c) & ~0x0003;

sys/dev/pci/if_rge.c

879

rge_write_mac_ocp(sc, 0xea1c, val | 0x0001);

sys/dev/pci/if_rge.c

889

val = rge_read_mac_ocp(sc, 0xd430) & ~0x0fff;

sys/dev/pci/if_rge.c

890

rge_write_mac_ocp(sc, 0xd430, val | 0x045f);

sys/dev/pci/if_rge.c

915

val = rge_read_mac_ocp(sc, 0xd40c) & ~0xe038;

sys/dev/pci/if_rge.c

916

rge_write_phy_ocp(sc, 0xd40c, val | 0x8020);

sys/dev/pci/if_rge.c

949

val = rge_read_csi(sc, 0x98) & ~0x0000ff00;

sys/dev/pci/if_rge.c

950

rge_write_csi(sc, 0x98, val);

sys/dev/pci/if_rge.c

953

val = rge_read_mac_ocp(sc, 0xe092) & ~0x00ff;

sys/dev/pci/if_rge.c

954

rge_write_mac_ocp(sc, 0xe092, val | 0x0008);

sys/dev/pci/if_rgereg.h

441

#define RGE_WRITE_4(sc, reg, val) \

sys/dev/pci/if_rgereg.h

442

bus_space_write_4(sc->rge_btag, sc->rge_bhandle, reg, val)

sys/dev/pci/if_rgereg.h

443

#define RGE_WRITE_2(sc, reg, val) \

sys/dev/pci/if_rgereg.h

444

bus_space_write_2(sc->rge_btag, sc->rge_bhandle, reg, val)

sys/dev/pci/if_rgereg.h

445

#define RGE_WRITE_1(sc, reg, val) \

sys/dev/pci/if_rgereg.h

446

bus_space_write_1(sc->rge_btag, sc->rge_bhandle, reg, val)

sys/dev/pci/if_rgereg.h

455

#define RGE_SETBIT_4(sc, reg, val) \

sys/dev/pci/if_rgereg.h

456

RGE_WRITE_4(sc, reg, RGE_READ_4(sc, reg) | (val))

sys/dev/pci/if_rgereg.h

457

#define RGE_SETBIT_2(sc, reg, val) \

sys/dev/pci/if_rgereg.h

458

RGE_WRITE_2(sc, reg, RGE_READ_2(sc, reg) | (val))

sys/dev/pci/if_rgereg.h

459

#define RGE_SETBIT_1(sc, reg, val) \

sys/dev/pci/if_rgereg.h

460

RGE_WRITE_1(sc, reg, RGE_READ_1(sc, reg) | (val))

sys/dev/pci/if_rgereg.h

462

#define RGE_CLRBIT_4(sc, reg, val) \

sys/dev/pci/if_rgereg.h

463

RGE_WRITE_4(sc, reg, RGE_READ_4(sc, reg) & ~(val))

sys/dev/pci/if_rgereg.h

464

#define RGE_CLRBIT_2(sc, reg, val) \

sys/dev/pci/if_rgereg.h

465

RGE_WRITE_2(sc, reg, RGE_READ_2(sc, reg) & ~(val))

sys/dev/pci/if_rgereg.h

466

#define RGE_CLRBIT_1(sc, reg, val) \

sys/dev/pci/if_rgereg.h

467

RGE_WRITE_1(sc, reg, RGE_READ_1(sc, reg) & ~(val))

sys/dev/pci/if_rgereg.h

469

#define RGE_EPHY_SETBIT(sc, reg, val) \

sys/dev/pci/if_rgereg.h

470

rge_write_ephy(sc, reg, rge_read_ephy(sc, reg) | (val))

sys/dev/pci/if_rgereg.h

472

#define RGE_EPHY_CLRBIT(sc, reg, val) \

sys/dev/pci/if_rgereg.h

473

rge_write_ephy(sc, reg, rge_read_ephy(sc, reg) & ~(val))

sys/dev/pci/if_rgereg.h

475

#define RGE_PHY_SETBIT(sc, reg, val) \

sys/dev/pci/if_rgereg.h

476

rge_write_phy_ocp(sc, reg, rge_read_phy_ocp(sc, reg) | (val))

sys/dev/pci/if_rgereg.h

478

#define RGE_PHY_CLRBIT(sc, reg, val) \

sys/dev/pci/if_rgereg.h

479

rge_write_phy_ocp(sc, reg, rge_read_phy_ocp(sc, reg) & ~(val))

sys/dev/pci/if_rgereg.h

481

#define RGE_MAC_SETBIT(sc, reg, val) \

sys/dev/pci/if_rgereg.h

482

rge_write_mac_ocp(sc, reg, rge_read_mac_ocp(sc, reg) | (val))

sys/dev/pci/if_rgereg.h

484

#define RGE_MAC_CLRBIT(sc, reg, val) \

sys/dev/pci/if_rgereg.h

485

rge_write_mac_ocp(sc, reg, rge_read_mac_ocp(sc, reg) & ~(val))

sys/dev/pci/if_rgereg.h

489

uint16_t val;

sys/dev/pci/if_rgereg.h

945

uint16_t val;

sys/dev/pci/if_rgereg.h

973

uint16_t val;

sys/dev/pci/if_rtwn.c

2662

rtwn_write_1(sc, rtl8192ce_mac[i].reg, rtl8192ce_mac[i].val);

sys/dev/pci/if_rtwn.c

744

rtwn_write_1(struct rtwn_softc *sc, uint16_t addr, uint8_t val)

sys/dev/pci/if_rtwn.c

746

bus_space_write_1(sc->sc_st, sc->sc_sh, addr, val);

sys/dev/pci/if_rtwn.c

750

rtwn_write_2(struct rtwn_softc *sc, uint16_t addr, uint16_t val)

sys/dev/pci/if_rtwn.c

752

bus_space_write_2(sc->sc_st, sc->sc_sh, addr, htole16(val));

sys/dev/pci/if_rtwn.c

756

rtwn_write_4(struct rtwn_softc *sc, uint16_t addr, uint32_t val)

sys/dev/pci/if_rtwn.c

758

bus_space_write_4(sc->sc_st, sc->sc_sh, addr, htole32(val));

sys/dev/pci/if_rtwn.c

829

rtwn_rf_write(struct rtwn_softc *sc, int chain, uint8_t addr, uint32_t val)

sys/dev/pci/if_rtwn.c

833

SM(R92C_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));

sys/dev/pci/if_rtwn.c

839

uint32_t reg[R92C_MAX_CHAINS], val;

sys/dev/pci/if_rtwn.c

859

val = rtwn_bb_read(sc, R92C_HSPI_READBACK(chain));

sys/dev/pci/if_rtwn.c

861

val = rtwn_bb_read(sc, R92C_LSSI_READBACK(chain));

sys/dev/pci/if_rtwn.c

862

return MS(val, R92C_LSSI_READBACK_DATA);

sys/dev/pci/if_sip.c

3342

sipcom_dp83820_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_sip.c

3366

*val = (EXTSR_1000XFDX | EXTSR_1000XHDX);

sys/dev/pci/if_sip.c

3373

*val = bus_space_read_4(sc->sc_st, sc->sc_sh, tbireg) & 0xffff;

sys/dev/pci/if_sip.c

3376

int sr = *val;

sys/dev/pci/if_sip.c

3378

*val = 0;

sys/dev/pci/if_sip.c

3380

*val |= BMSR_LINK;

sys/dev/pci/if_sip.c

3382

*val |= BMSR_ACOMP;

sys/dev/pci/if_sip.c

3391

*val |= BMSR_ANEG | BMSR_EXTSTAT;

sys/dev/pci/if_sip.c

3398

val);

sys/dev/pci/if_sip.c

3407

sipcom_dp83820_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_sip.c

3425

bus_space_write_4(sc->sc_st, sc->sc_sh, tbireg, val);

sys/dev/pci/if_sip.c

3430

val);

sys/dev/pci/if_sip.c

3517

sipcom_mii_bitbang_write(device_t self, uint32_t val)

sys/dev/pci/if_sip.c

3521

bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_EROMAR, val);

sys/dev/pci/if_sip.c

3530

sipcom_sis900_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_sip.c

3541

phy, reg, val);

sys/dev/pci/if_sip.c

3559

*val = (enphy & ENPHY_PHYDATA) >> ENPHY_DATA_SHIFT;

sys/dev/pci/if_sip.c

3569

sipcom_sis900_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_sip.c

3576

phy, reg, val);

sys/dev/pci/if_sip.c

3589

(val << ENPHY_DATA_SHIFT) | (phy << ENPHY_PHYADDR_SHIFT) |

sys/dev/pci/if_sip.c

3661

sipcom_dp83815_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_sip.c

3687

*val = data & 0xffff;

sys/dev/pci/if_sip.c

3697

sipcom_dp83815_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_sip.c

3708

bus_space_write_4(sc->sc_st, sc->sc_sh, SIP_NS_PHY(reg), val);

sys/dev/pci/if_sk.c

1255

uint32_t chunk, val;

sys/dev/pci/if_sk.c

1258

val = sc->sk_rboff / sizeof(uint64_t);

sys/dev/pci/if_sk.c

1259

sc_if->sk_rx_ramstart = val;

sys/dev/pci/if_sk.c

1260

val += (chunk / sizeof(uint64_t));

sys/dev/pci/if_sk.c

1261

sc_if->sk_rx_ramend = val - 1;

sys/dev/pci/if_sk.c

1262

sc_if->sk_tx_ramstart = val;

sys/dev/pci/if_sk.c

1263

val += (chunk / sizeof(uint64_t));

sys/dev/pci/if_sk.c

1264

sc_if->sk_tx_ramend = val - 1;

sys/dev/pci/if_sk.c

1266

uint32_t chunk, val;

sys/dev/pci/if_sk.c

1269

val = (sc->sk_rboff + (chunk * 2 * sc_if->sk_port)) /

sys/dev/pci/if_sk.c

1271

sc_if->sk_rx_ramstart = val;

sys/dev/pci/if_sk.c

1272

val += (chunk / sizeof(uint64_t));

sys/dev/pci/if_sk.c

1273

sc_if->sk_rx_ramend = val - 1;

sys/dev/pci/if_sk.c

1274

sc_if->sk_tx_ramstart = val;

sys/dev/pci/if_sk.c

1275

val += (chunk / sizeof(uint64_t));

sys/dev/pci/if_sk.c

1276

sc_if->sk_tx_ramend = val - 1;

sys/dev/pci/if_sk.c

1633

uint8_t val = sk_win_read_1(sc, SK_EPROM0);

sys/dev/pci/if_sk.c

1635

switch (val) {

sys/dev/pci/if_sk.c

1654

val);

sys/dev/pci/if_sk.c

1663

uint8_t val = sk_win_read_1(sc, SK_EPROM0);

sys/dev/pci/if_sk.c

1664

sc->sk_ramsize = ( val == 0 ) ? 0x20000 : (( val * 4 )*1024);

sys/dev/pci/if_sk.c

2429

uint32_t val;

sys/dev/pci/if_sk.c

2433

val = sk_win_read_4(sc, SK_GPIO);

sys/dev/pci/if_sk.c

2435

val |= SK_GPIO_DIR0 | SK_GPIO_DAT0;

sys/dev/pci/if_sk.c

2437

val |= SK_GPIO_DIR2 | SK_GPIO_DAT2;

sys/dev/pci/if_sk.c

2438

sk_win_write_4(sc, SK_GPIO, val);

sys/dev/pci/if_sk.c

2461

bhack[i].val);

sys/dev/pci/if_sk.c

2901

uint32_t val;

sys/dev/pci/if_sk.c

2904

val = sk_win_read_4(sc, SK_GPIO);

sys/dev/pci/if_sk.c

2906

val |= SK_GPIO_DIR0;

sys/dev/pci/if_sk.c

2907

val &= ~SK_GPIO_DAT0;

sys/dev/pci/if_sk.c

2909

val |= SK_GPIO_DIR2;

sys/dev/pci/if_sk.c

2910

val &= ~SK_GPIO_DAT2;

sys/dev/pci/if_sk.c

2912

sk_win_write_4(sc, SK_GPIO, val);

sys/dev/pci/if_sk.c

410

sk_xmac_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_sk.c

437

*val = SK_XM_READ_2(sc_if, XM_PHY_DATA);

sys/dev/pci/if_sk.c

442

sk_xmac_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_sk.c

460

SK_XM_WRITE_2(sc_if, XM_PHY_DATA, val);

sys/dev/pci/if_sk.c

496

sk_marv_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_sk.c

528

*val = SK_YU_READ_2(sc_if, YUKON_SMIDR);

sys/dev/pci/if_sk.c

531

phy, reg, *val));

sys/dev/pci/if_sk.c

537

sk_marv_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_sk.c

543

phy, reg, val));

sys/dev/pci/if_sk.c

545

SK_YU_WRITE_2(sc_if, YUKON_SMIDR, val);

sys/dev/pci/if_skreg.h

1452

#define SK_XM_WRITE_4(sc, reg, val) \

sys/dev/pci/if_skreg.h

1454

((val) & 0xFFFF)); \

sys/dev/pci/if_skreg.h

1456

((val) >> 16) & 0xFFFF)

sys/dev/pci/if_skreg.h

1461

#define SK_XM_WRITE_4(sc, reg, val) \

sys/dev/pci/if_skreg.h

1462

sk_win_write_4(sc->sk_softc, SK_XMAC_REG(sc, reg), (val))

sys/dev/pci/if_skreg.h

1468

#define SK_XM_WRITE_2(sc, reg, val) \

sys/dev/pci/if_skreg.h

1469

sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg), val)

sys/dev/pci/if_skreg.h

1494

#define SK_YU_WRITE_4(sc, reg, val) \

sys/dev/pci/if_skreg.h

1495

sk_win_write_4((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))

sys/dev/pci/if_skreg.h

1497

#define SK_YU_WRITE_2(sc, reg, val) \

sys/dev/pci/if_skreg.h

1498

sk_win_write_2((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))

sys/dev/pci/if_skreg.h

154

#define SK_IF_WRITE_4(sc_if, skip, reg, val) \

sys/dev/pci/if_skreg.h

156

reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)

sys/dev/pci/if_skreg.h

157

#define SK_IF_WRITE_2(sc_if, skip, reg, val) \

sys/dev/pci/if_skreg.h

159

reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)

sys/dev/pci/if_skreg.h

160

#define SK_IF_WRITE_1(sc_if, skip, reg, val) \

sys/dev/pci/if_skreg.h

1604

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_skreg.h

1605

bus_space_write_4((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))

sys/dev/pci/if_skreg.h

1606

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/pci/if_skreg.h

1607

bus_space_write_2((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))

sys/dev/pci/if_skreg.h

1608

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/pci/if_skreg.h

1609

bus_space_write_1((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))

sys/dev/pci/if_skreg.h

162

reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)

sys/dev/pci/if_skvar.h

175

int val;

sys/dev/pci/if_ste.c

1667

ste_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_ste.c

1674

return mii_bitbang_readreg(self, &ste_mii_bitbang_ops, phy, reg, val);

sys/dev/pci/if_ste.c

1683

ste_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_ste.c

1690

return mii_bitbang_writereg(self, &ste_mii_bitbang_ops, phy, reg, val);

sys/dev/pci/if_ste.c

1732

ste_mii_bitbang_write(device_t self, uint32_t val)

sys/dev/pci/if_ste.c

1736

bus_space_write_1(sc->sc_st, sc->sc_sh, STE_PhyCtrl, val);

sys/dev/pci/if_stge.c

1963

stge_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_stge.c

1966

return mii_bitbang_readreg(self, &stge_mii_bitbang_ops, phy, reg, val);

sys/dev/pci/if_stge.c

1975

stge_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_stge.c

1979

val);

sys/dev/pci/if_stge.c

2024

stge_mii_bitbang_write(device_t self, uint32_t val)

sys/dev/pci/if_stge.c

2028

CSR_WRITE_1(sc, STGE_PhyCtrl, val | sc->sc_PhyCtrl);

sys/dev/pci/if_stge.c

223

#define CSR_WRITE_4(_sc, reg, val) \

sys/dev/pci/if_stge.c

224

bus_space_write_4((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))

sys/dev/pci/if_stge.c

225

#define CSR_WRITE_2(_sc, reg, val) \

sys/dev/pci/if_stge.c

226

bus_space_write_2((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))

sys/dev/pci/if_stge.c

227

#define CSR_WRITE_1(_sc, reg, val) \

sys/dev/pci/if_stge.c

228

bus_space_write_1((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))

sys/dev/pci/if_tireg.h

963

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_tireg.h

964

bus_space_write_stream_4((sc)->ti_btag, (sc)->ti_bhandle, reg, val)

sys/dev/pci/if_tireg.h

969

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_tireg.h

970

bus_space_write_4((sc)->ti_btag, (sc)->ti_bhandle, reg, val)

sys/dev/pci/if_tl.c

783

tl_intreg_write(tl_softc_t *sc, uint32_t reg, uint32_t val)

sys/dev/pci/if_tl.c

787

TL_HR_WRITE(sc, TL_HOST_DIO_DATA, val);

sys/dev/pci/if_tl.c

791

tl_intreg_write_byte(tl_softc_t *sc, uint32_t reg, uint8_t val)

sys/dev/pci/if_tl.c

796

TL_HR_WRITE_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x03), val);

sys/dev/pci/if_tl.c

830

tl_mii_read(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_tl.c

865

*val = data;

sys/dev/pci/if_tl.c

870

tl_mii_write(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_tl.c

884

tl_mii_sendbits(sc, val, 16);

sys/dev/pci/if_tl.c

945

tl_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/if_tl.c

948

return i2c_bitbang_write_byte(cookie, val, flags, &tl_i2cbb_ops);

sys/dev/pci/if_tlp_pci.c

363

uint32_t val = 0;

sys/dev/pci/if_tlp_pci.c

599

val = TULIP_READ(sc, CSR_MIIROM);

sys/dev/pci/if_tlp_pci.c

600

if ((val & MIIROM_DN) == 0)

sys/dev/pci/if_tlp_pci.c

603

sc->sc_srom[i] = val & MIIROM_DATA;

sys/dev/pci/if_tlp_pci.c

623

val = TULIP_READ(sc, CSR_MIIROM);

sys/dev/pci/if_tlp_pci.c

624

if ((val & PNIC_MIIROM_BUSY) == 0)

sys/dev/pci/if_tlp_pci.c

627

if (val & PNIC_MIIROM_BUSY) {

sys/dev/pci/if_tlp_pci.c

631

val &= PNIC_MIIROM_DATA;

sys/dev/pci/if_tlp_pci.c

632

sc->sc_srom[i] = val >> 8;

sys/dev/pci/if_tlp_pci.c

633

sc->sc_srom[i + 1] = val & 0xff;

sys/dev/pci/if_txpreg.h

627

#define WRITE_REG(sc,reg,val) \

sys/dev/pci/if_txpreg.h

628

bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, reg, val)

sys/dev/pci/if_vge.c

2184

uint8_t val;

sys/dev/pci/if_vge.c

2186

val = CSR_READ_1(sc, VGE_PWRSTAT);

sys/dev/pci/if_vge.c

2187

val &= ~VGE_STICKHW_SWPTAG;

sys/dev/pci/if_vge.c

2188

CSR_WRITE_1(sc, VGE_PWRSTAT, val);

sys/dev/pci/if_vge.c

2190

val = CSR_READ_1(sc, VGE_PWRSTAT);

sys/dev/pci/if_vge.c

2191

val &= ~(VGE_STICKHW_DS0 | VGE_STICKHW_DS1);

sys/dev/pci/if_vge.c

2192

CSR_WRITE_1(sc, VGE_PWRSTAT, val);

sys/dev/pci/if_vge.c

260

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_vge.c

261

bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/pci/if_vge.c

262

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/pci/if_vge.c

263

bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/pci/if_vge.c

264

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/pci/if_vge.c

265

bus_space_write_1((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))

sys/dev/pci/if_vge.c

466

vge_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_vge.c

496

*val = CSR_READ_2(sc, VGE_MIIDATA);

sys/dev/pci/if_vge.c

505

vge_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_vge.c

521

CSR_WRITE_2(sc, VGE_MIIDATA, val);

sys/dev/pci/if_vge.c

906

uint16_t val;

sys/dev/pci/if_vge.c

953

val = vge_read_eeprom(sc, VGE_EE_EADDR + 0);

sys/dev/pci/if_vge.c

954

eaddr[0] = val & 0xff;

sys/dev/pci/if_vge.c

955

eaddr[1] = val >> 8;

sys/dev/pci/if_vge.c

956

val = vge_read_eeprom(sc, VGE_EE_EADDR + 1);

sys/dev/pci/if_vge.c

957

eaddr[2] = val & 0xff;

sys/dev/pci/if_vge.c

958

eaddr[3] = val >> 8;

sys/dev/pci/if_vge.c

959

val = vge_read_eeprom(sc, VGE_EE_EADDR + 2);

sys/dev/pci/if_vge.c

960

eaddr[4] = val & 0xff;

sys/dev/pci/if_vge.c

961

eaddr[5] = val >> 8;

sys/dev/pci/if_vr.c

286

#define CSR_WRITE_4(sc, reg, val) \

sys/dev/pci/if_vr.c

287

bus_space_write_4(sc->vr_bst, sc->vr_bsh, reg, val)

sys/dev/pci/if_vr.c

288

#define CSR_WRITE_2(sc, reg, val) \

sys/dev/pci/if_vr.c

289

bus_space_write_2(sc->vr_bst, sc->vr_bsh, reg, val)

sys/dev/pci/if_vr.c

290

#define CSR_WRITE_1(sc, reg, val) \

sys/dev/pci/if_vr.c

291

bus_space_write_1(sc->vr_bst, sc->vr_bsh, reg, val)

sys/dev/pci/if_vr.c

379

vr_mii_bitbang_write(device_t self, uint32_t val)

sys/dev/pci/if_vr.c

383

CSR_WRITE_1(sc, VR_MIICMD, (val & 0xff) | VR_MIICMD_DIRECTPGM);

sys/dev/pci/if_vr.c

390

vr_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pci/if_vr.c

395

return (mii_bitbang_readreg(self, &vr_mii_bitbang_ops, phy, reg, val));

sys/dev/pci/if_vr.c

402

vr_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/pci/if_vr.c

407

return mii_bitbang_writereg(self, &vr_mii_bitbang_ops, phy, reg, val);

sys/dev/pci/if_vte.c

338

vte_miibus_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_vte.c

356

*val = CSR_READ_2(sc, VTE_MMRD);

sys/dev/pci/if_vte.c

361

vte_miibus_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_vte.c

366

CSR_WRITE_2(sc, VTE_MMWD, val);

sys/dev/pci/if_vte.c

387

uint16_t val;

sys/dev/pci/if_vte.c

414

val = 18 << VTE_IM_TIMER_SHIFT;

sys/dev/pci/if_vte.c

416

val = 1 << VTE_IM_TIMER_SHIFT;

sys/dev/pci/if_vte.c

417

val |= sc->vte_int_rx_mod << VTE_IM_BUNDLE_SHIFT;

sys/dev/pci/if_vte.c

419

CSR_WRITE_2(sc, VTE_MRICR, val);

sys/dev/pci/if_vte.c

422

val = 18 << VTE_IM_TIMER_SHIFT;

sys/dev/pci/if_vte.c

424

val = 1 << VTE_IM_TIMER_SHIFT;

sys/dev/pci/if_vte.c

425

val |= sc->vte_int_tx_mod << VTE_IM_BUNDLE_SHIFT;

sys/dev/pci/if_vte.c

427

CSR_WRITE_2(sc, VTE_MTICR, val);

sys/dev/pci/if_vtevar.h

154

#define CSR_WRITE_2(_sc, reg, val) \

sys/dev/pci/if_vtevar.h

156

(reg), (val))

sys/dev/pci/if_wm.c

12114

wm_gmii_i82543_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12121

*val = wm_i82543_mii_recvbits(sc) & 0xffff;

sys/dev/pci/if_wm.c

12125

device_xname(dev), phy, reg, *val));

sys/dev/pci/if_wm.c

12136

wm_gmii_i82543_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12141

wm_i82543_mii_sendbits(sc, val | (MII_COMMAND_ACK << 16) |

sys/dev/pci/if_wm.c

12154

wm_gmii_mdic_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12189

*val = MDIC_DATA(mdic);

sys/dev/pci/if_wm.c

12207

wm_gmii_mdic_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12221

MDIC_REGADD(reg) | MDIC_DATA(val));

sys/dev/pci/if_wm.c

12258

wm_gmii_i82544_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12269

rv = wm_gmii_i82544_readreg_locked(dev, phy, reg, val);

sys/dev/pci/if_wm.c

12277

wm_gmii_i82544_readreg_locked(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12303

return wm_gmii_mdic_readreg(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12312

wm_gmii_i82544_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12323

rv = wm_gmii_i82544_writereg_locked(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12330

wm_gmii_i82544_writereg_locked(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12356

return wm_gmii_mdic_writereg(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12367

wm_gmii_i80003_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12409

rv = wm_gmii_mdic_readreg(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12412

rv = wm_gmii_mdic_readreg(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12427

wm_gmii_i80003_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12468

rv = wm_gmii_mdic_writereg(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12471

rv = wm_gmii_mdic_writereg(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12486

wm_gmii_bm_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12503

rv = wm_access_phy_wakeup_reg_bm(dev, reg, val, true, false);

sys/dev/pci/if_wm.c

12519

rv = wm_gmii_mdic_readreg(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12534

wm_gmii_bm_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12551

rv = wm_access_phy_wakeup_reg_bm(dev, reg, &val, false, false);

sys/dev/pci/if_wm.c

12567

rv = wm_gmii_mdic_writereg(dev, phy, reg & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12687

wm_access_phy_wakeup_reg_bm(device_t dev, int offset, int16_t *val, int rd,

sys/dev/pci/if_wm.c

12730

rv = wm_gmii_mdic_readreg(dev, 1, BM_WUC_DATA_OPCODE, val);

sys/dev/pci/if_wm.c

12733

rv = wm_gmii_mdic_writereg(dev, 1, BM_WUC_DATA_OPCODE, *val);

sys/dev/pci/if_wm.c

12752

wm_gmii_hv_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12766

rv = wm_gmii_hv_readreg_locked(dev, phy, reg, val);

sys/dev/pci/if_wm.c

12772

wm_gmii_hv_readreg_locked(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12782

return wm_access_phy_wakeup_reg_bm(dev, reg, val, true, false);

sys/dev/pci/if_wm.c

12807

return wm_gmii_mdic_readreg(dev, phy, regnum & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12818

wm_gmii_hv_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12832

rv = wm_gmii_hv_writereg_locked(dev, phy, reg, val);

sys/dev/pci/if_wm.c

12839

wm_gmii_hv_writereg_locked(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12850

return wm_access_phy_wakeup_reg_bm(dev, reg, &val, false,

sys/dev/pci/if_wm.c

12881

&& ((val & (1 << 11)) != 0)) {

sys/dev/pci/if_wm.c

12894

return wm_gmii_mdic_writereg(dev, phy, regnum & MII_ADDRMASK, val);

sys/dev/pci/if_wm.c

12905

wm_gmii_82580_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12923

rv = wm_gmii_mdic_readreg(dev, phy, reg, val);

sys/dev/pci/if_wm.c

12937

wm_gmii_82580_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

12955

rv = wm_gmii_mdic_writereg(dev, phy, reg, val);

sys/dev/pci/if_wm.c

12969

wm_gmii_gs40g_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

12990

rv = wm_gmii_mdic_readreg(dev, phy, offset, val);

sys/dev/pci/if_wm.c

13005

wm_gmii_gs40g_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

13026

rv = wm_gmii_mdic_writereg(dev, phy, offset, val);

sys/dev/pci/if_wm.c

13104

wm_kmrn_readreg(struct wm_softc *sc, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

13118

rv = wm_kmrn_readreg_locked(sc, reg, val);

sys/dev/pci/if_wm.c

13129

wm_kmrn_readreg_locked(struct wm_softc *sc, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

13138

*val = CSR_READ(sc, WMREG_KUMCTRLSTA) & KUMCTRLSTA_MASK;

sys/dev/pci/if_wm.c

13149

wm_kmrn_writereg(struct wm_softc *sc, int reg, uint16_t val)

sys/dev/pci/if_wm.c

13163

rv = wm_kmrn_writereg_locked(sc, reg, val);

sys/dev/pci/if_wm.c

13174

wm_kmrn_writereg_locked(struct wm_softc *sc, int reg, uint16_t val)

sys/dev/pci/if_wm.c

13178

((reg << KUMCTRLSTA_OFFSET_SHIFT) & KUMCTRLSTA_OFFSET) | val);

sys/dev/pci/if_wm.c

13188

wm_access_emi_reg_locked(device_t dev, int reg, uint16_t *val, bool rd)

sys/dev/pci/if_wm.c

13198

rv = sc->phy.readreg_locked(dev, 2, I82579_EMI_DATA, val);

sys/dev/pci/if_wm.c

13200

rv = sc->phy.writereg_locked(dev, 2, I82579_EMI_DATA, *val);

sys/dev/pci/if_wm.c

13205

wm_read_emi_reg_locked(device_t dev, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

13208

return wm_access_emi_reg_locked(dev, reg, val, true);

sys/dev/pci/if_wm.c

13212

wm_write_emi_reg_locked(device_t dev, int reg, uint16_t val)

sys/dev/pci/if_wm.c

13215

return wm_access_emi_reg_locked(dev, reg, &val, false);

sys/dev/pci/if_wm.c

13293

wm_sgmii_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

13304

rv = wm_sgmii_readreg_locked(dev, phy, reg, val);

sys/dev/pci/if_wm.c

13311

wm_sgmii_readreg_locked(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/pci/if_wm.c

13338

*val = (uint16_t)((i2ccmd >> 8) & 0x00ff) | ((i2ccmd << 8) & 0xff00);

sys/dev/pci/if_wm.c

13351

wm_sgmii_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

13362

rv = wm_sgmii_writereg_locked(dev, phy, reg, val);

sys/dev/pci/if_wm.c

13370

wm_sgmii_writereg_locked(device_t dev, int phy, int reg, uint16_t val)

sys/dev/pci/if_wm.c

13379

swapdata = ((val >> 8) & 0x00FF) | ((val << 8) & 0xFF00);

sys/dev/pci/if_wm.c

14102

uint8_t val = 0;

sys/dev/pci/if_wm.c

14114

rv = wm_sfp_read_data_byte(sc, SFF_SFP_ID_OFF, &val);

sys/dev/pci/if_wm.c

14123

switch (val) {

sys/dev/pci/if_wm.c

14137

rv = wm_sfp_read_data_byte(sc, SFF_SFP_ETH_FLAGS_OFF, &val);

sys/dev/pci/if_wm.c

14141

sc->sc_sfptype = val;

sys/dev/pci/if_wm.c

14142

if ((val & (SFF_SFP_ETH_FLAGS_1000SX | SFF_SFP_ETH_FLAGS_1000LX)) != 0)

sys/dev/pci/if_wm.c

14144

else if ((val & SFF_SFP_ETH_FLAGS_1000T) != 0) {

sys/dev/pci/if_wm.c

14147

} else if ((val & SFF_SFP_ETH_FLAGS_100FX) != 0) {

sys/dev/pci/if_wm.c

14208

uint32_t reg, val;

sys/dev/pci/if_wm.c

14213

val = 0;

sys/dev/pci/if_wm.c

14219

val |= (1U << (x - 1));

sys/dev/pci/if_wm.c

14224

*valp = val;

sys/dev/pci/if_wm.c

14237

uint32_t reg, val;

sys/dev/pci/if_wm.c

14282

wm_eeprom_recvbits(sc, &val, 16);

sys/dev/pci/if_wm.c

14283

data[i] = val & 0xffff;

sys/dev/pci/if_wm.c

14373

uint32_t val;

sys/dev/pci/if_wm.c

14381

wm_eeprom_recvbits(sc, &val, 8);

sys/dev/pci/if_wm.c

14382

if ((val & SPI_SR_RDY) == 0)

sys/dev/pci/if_wm.c

14400

uint32_t reg, val;

sys/dev/pci/if_wm.c

14437

wm_eeprom_recvbits(sc, &val, 16);

sys/dev/pci/if_wm.c

14438

data[i] = ((val >> 8) & 0xff) | ((val & 0xff) << 8);

sys/dev/pci/if_wm.c

1854

wm_io_write(struct wm_softc *sc, int reg, uint32_t val)

sys/dev/pci/if_wm.c

1858

bus_space_write_4(sc->sc_iot, sc->sc_ioh, 4, val);

sys/dev/pci/if_wm.c

2996

uint16_t val;

sys/dev/pci/if_wm.c

2999

wm_nvm_read(sc, NVM_OFF_K1_CONFIG, 1, &val);

sys/dev/pci/if_wm.c

3001

if ((val & NVM_K1_CONFIG_ENABLE) != 0)

sys/dev/pci/if_wm.c

5335

wm_rxpbs_adjust_82580(uint32_t val)

sys/dev/pci/if_wm.c

5339

if (val < __arraycount(wm_82580_rxpbs_table))

sys/dev/pci/if_wm.c

5340

rv = wm_82580_rxpbs_table[val];

sys/dev/pci/if_wm.c

761

#define WM_EVCNT_STORE(ev, val) \

sys/dev/pci/if_wm.c

762

atomic_store_relaxed(&((ev)->ev_count), (val))

sys/dev/pci/if_wm.c

763

#define WM_EVCNT_ADD(ev, val) \

sys/dev/pci/if_wm.c

765

atomic_load_relaxed(&(ev)->ev_count) + (val))

sys/dev/pci/if_wm.c

769

#define WM_EVCNT_STORE(ev, val) \

sys/dev/pci/if_wm.c

770

((ev)->ev_count = (val))

sys/dev/pci/if_wm.c

771

#define WM_EVCNT_ADD(ev, val) \

sys/dev/pci/if_wm.c

772

(ev)->ev_count += (val)

sys/dev/pci/if_wm.c

777

#define WM_Q_EVCNT_STORE(qname, evname, val) \

sys/dev/pci/if_wm.c

778

WM_EVCNT_STORE(&(qname)->qname##_ev_##evname, (val))

sys/dev/pci/if_wm.c

779

#define WM_Q_EVCNT_ADD(qname, evname, val) \

sys/dev/pci/if_wm.c

780

WM_EVCNT_ADD(&(qname)->qname##_ev_##evname, (val))

sys/dev/pci/if_wm.c

783

#define WM_EVCNT_STORE(ev, val) __nothing

sys/dev/pci/if_wm.c

784

#define WM_EVCNT_ADD(ev, val) __nothing

sys/dev/pci/if_wm.c

787

#define WM_Q_EVCNT_STORE(qname, evname, val) __nothing

sys/dev/pci/if_wm.c

788

#define WM_Q_EVCNT_ADD(qname, evname, val) __nothing

sys/dev/pci/if_wm.c

793

#define CSR_WRITE(sc, reg, val) \

sys/dev/pci/if_wm.c

794

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_wpi.c

1111

uint32_t val;

sys/dev/pci/if_wpi.c

1119

if ((val = WPI_READ(sc, WPI_EEPROM_CTL)) &

sys/dev/pci/if_wpi.c

1128

*out++ = val >> 16;

sys/dev/pci/if_wpi.c

1130

*out++ = val >> 24;

sys/dev/pci/if_wpi.c

2522

uint64_t val, mod;

sys/dev/pci/if_wpi.c

2530

val = (uint64_t)ni->ni_intval * 1024; /* msecs -> usecs */

sys/dev/pci/if_wpi.c

2531

mod = le64toh(tsf.tstamp) % val;

sys/dev/pci/if_wpi.c

2532

tsf.binitval = htole32((uint32_t)(val - mod));

sys/dev/pci/if_wpi.c

2535

ni->ni_intval, le64toh(tsf.tstamp), (uint32_t)(val - mod)));

sys/dev/pci/if_wpi.c

3418

int val, error;

sys/dev/pci/if_wpi.c

3424

val = !wpi_getrfkill(sc);

sys/dev/pci/if_wpi.c

3427

node.sysctl_data = &val;

sys/dev/pci/if_wpireg.h

724

#define WPI_WRITE(sc, reg, val) \

sys/dev/pci/if_wpireg.h

725

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))

sys/dev/pci/if_xge.c

1274

val = PIF_RCSR(MDIO_CONTROL);

sys/dev/pci/if_xge.c

1275

if (val != 0x1804001c0F001cULL) {

sys/dev/pci/if_xge.c

1277

XNAME, val, 0x1804001c0F001cULL);

sys/dev/pci/if_xge.c

1291

val = PIF_RCSR(DTX_CONTROL);

sys/dev/pci/if_xge.c

1292

if (val != 0x5152040001cULL) {

sys/dev/pci/if_xge.c

1294

XNAME, val, 0x5152040001cULL);

sys/dev/pci/if_xge.c

1305

val = PIF_RCSR(MDIO_CONTROL);

sys/dev/pci/if_xge.c

1306

if (val != 0x1804001c0f001cULL) {

sys/dev/pci/if_xge.c

1308

XNAME, val, 0x1804001c0f001cULL);

sys/dev/pci/if_xge.c

190

#define PIF_WCSR(csr, val) pif_wcsr(sc, csr, val)

sys/dev/pci/if_xge.c

192

#define TXP_WCSR(csr, val) txp_wcsr(sc, csr, val)

sys/dev/pci/if_xge.c

193

#define PIF_WKEY(csr, val) pif_wkey(sc, csr, val)

sys/dev/pci/if_xge.c

196

pif_wcsr(struct xge_softc *sc, bus_size_t csr, uint64_t val)

sys/dev/pci/if_xge.c

200

lval = val&0xffffffff;

sys/dev/pci/if_xge.c

201

hval = val>>32;

sys/dev/pci/if_xge.c

209

uint64_t val, val2;

sys/dev/pci/if_xge.c

210

val = bus_space_read_4(sc->sc_st, sc->sc_sh, csr);

sys/dev/pci/if_xge.c

212

val |= (val2 << 32);

sys/dev/pci/if_xge.c

213

return val;

sys/dev/pci/if_xge.c

217

txp_wcsr(struct xge_softc *sc, bus_size_t csr, uint64_t val)

sys/dev/pci/if_xge.c

221

lval = val&0xffffffff;

sys/dev/pci/if_xge.c

222

hval = val>>32;

sys/dev/pci/if_xge.c

229

pif_wkey(struct xge_softc *sc, bus_size_t csr, uint64_t val)

sys/dev/pci/if_xge.c

233

lval = val&0xffffffff;

sys/dev/pci/if_xge.c

234

hval = val>>32;

sys/dev/pci/if_xge.c

283

uint64_t val;

sys/dev/pci/if_xge.c

315

val = (uint64_t)0xFFFFFFFFFFFFFFFFULL;

sys/dev/pci/if_xge.c

316

val &= ~(TxF_R_SE | RxF_W_SE);

sys/dev/pci/if_xge.c

317

PIF_WCSR(SWAPPER_CTRL, val);

sys/dev/pci/if_xge.c

318

PIF_WCSR(SWAPPER_CTRL, val);

sys/dev/pci/if_xge.c

325

if ((val = PIF_RCSR(PIF_RD_SWAPPER_Fb)) != SWAPPER_MAGIC) {

sys/dev/pci/if_xge.c

327

XNAME, (unsigned long long)val, SWAPPER_MAGIC);

sys/dev/pci/if_xge.c

353

val = (uint64_t)0xFFFFFFFFFFFFFFFFULL;

sys/dev/pci/if_xge.c

354

val &= ~(TxF_R_SE | RxF_W_SE);

sys/dev/pci/if_xge.c

355

PIF_WCSR(SWAPPER_CTRL, val);

sys/dev/pci/if_xge.c

356

PIF_WCSR(SWAPPER_CTRL, val);

sys/dev/pci/if_xge.c

363

if ((val = PIF_RCSR(PIF_RD_SWAPPER_Fb)) != SWAPPER_MAGIC) {

sys/dev/pci/if_xge.c

365

XNAME, (unsigned long long)val, SWAPPER_MAGIC);

sys/dev/pci/if_xge.c

385

val = PIF_RCSR(RMAC_ADDR_DATA0_MEM);

sys/dev/pci/if_xge.c

387

enaddr[i] = (uint8_t)(val >> (56 - (8*i)));

sys/dev/pci/if_xge.c

406

val = PIF_RCSR(TX_FIFO_P0);

sys/dev/pci/if_xge.c

407

val |= TX_FIFO_ENABLE;

sys/dev/pci/if_xge.c

408

PIF_WCSR(TX_FIFO_P0, val);

sys/dev/pci/if_xge.c

470

val = RING_MODE_1;

sys/dev/pci/if_xge.c

472

val = RING_MODE_3;

sys/dev/pci/if_xge.c

474

val = RING_MODE_5;

sys/dev/pci/if_xge.c

476

PIF_WCSR(PRC_CTRL_0, RC_IN_SVC | val);

sys/dev/pci/if_xge.c

494

val = PIF_RCSR(MC_RLDRAM_MRS);

sys/dev/pci/if_xge.c

495

val |= MC_QUEUE_SIZE_ENABLE | MC_RLDRAM_MRS_ENABLE;

sys/dev/pci/if_xge.c

496

PIF_WCSR(MC_RLDRAM_MRS, val);

sys/dev/pci/if_xge.c

614

uint64_t val;

sys/dev/pci/if_xge.c

617

val = PIF_RCSR(ADAPTER_CONTROL);

sys/dev/pci/if_xge.c

618

val |= ADAPTER_EN;

sys/dev/pci/if_xge.c

619

PIF_WCSR(ADAPTER_CONTROL, val);

sys/dev/pci/if_xge.c

622

val = PIF_RCSR(ADAPTER_CONTROL);

sys/dev/pci/if_xge.c

623

val |= LED_ON;

sys/dev/pci/if_xge.c

624

PIF_WCSR(ADAPTER_CONTROL, val);

sys/dev/pci/if_xge.c

633

uint64_t val;

sys/dev/pci/if_xge.c

645

val = PIF_RCSR(ADAPTER_STATUS);

sys/dev/pci/if_xge.c

646

if ((val & QUIESCENT) != QUIESCENT) {

sys/dev/pci/if_xge.c

649

val = (val & QUIESCENT) ^ QUIESCENT;

sys/dev/pci/if_xge.c

650

snprintb(buf, sizeof buf, QUIESCENT_BMSK, val);

sys/dev/pci/if_xge.c

656

val = PIF_RCSR(ADAPTER_CONTROL);

sys/dev/pci/if_xge.c

657

val |= EOI_TX_ON;

sys/dev/pci/if_xge.c

658

PIF_WCSR(ADAPTER_CONTROL, val);

sys/dev/pci/if_xge.c

684

uint64_t val;

sys/dev/pci/if_xge.c

686

val = PIF_RCSR(ADAPTER_CONTROL);

sys/dev/pci/if_xge.c

687

val &= ~ADAPTER_EN;

sys/dev/pci/if_xge.c

688

PIF_WCSR(ADAPTER_CONTROL, val);

sys/dev/pci/if_xge.c

701

uint64_t val;

sys/dev/pci/if_xge.c

704

val = PIF_RCSR(GENERAL_INT_STATUS);

sys/dev/pci/if_xge.c

705

if (val == 0)

sys/dev/pci/if_xge.c

710

PIF_WCSR(GENERAL_INT_STATUS, val);

sys/dev/pci/if_xge.c

712

if ((val = PIF_RCSR(MAC_RMAC_ERR_REG)) & RMAC_LINK_STATE_CHANGE_INT) {

sys/dev/pci/if_xge.c

719

val = PIF_RCSR(ADAPTER_STATUS);

sys/dev/pci/if_xge.c

720

if ((val & (RMAC_REMOTE_FAULT | RMAC_LOCAL_FAULT)) == 0)

sys/dev/pci/if_xge.c

724

if ((val = PIF_RCSR(TX_TRAFFIC_INT))) {

sys/dev/pci/if_xge.c

726

PIF_WCSR(TX_TRAFFIC_INT, val); /* clear interrupt bits */

sys/dev/pci/if_xge.c

760

if ((val = PIF_RCSR(RX_TRAFFIC_INT))) {

sys/dev/pci/if_xge.c

762

PIF_WCSR(RX_TRAFFIC_INT, val); /* Clear interrupt bits */

sys/dev/pci/if_xge.c

797

val = rxd->rxd_control1;

sys/dev/pci/if_xge.c

813

if (RXD_CTL1_PROTOS(val) & (RXD_CTL1_P_IPv4|RXD_CTL1_P_IPv6)) {

sys/dev/pci/if_xge.c

815

if (RXD_CTL1_L3CSUM(val) != 0xffff)

sys/dev/pci/if_xge.c

818

if (RXD_CTL1_PROTOS(val) & RXD_CTL1_P_TCP) {

sys/dev/pci/if_xge.c

820

if (RXD_CTL1_L4CSUM(val) != 0xffff)

sys/dev/pci/if_xge.c

823

if (RXD_CTL1_PROTOS(val) & RXD_CTL1_P_UDP) {

sys/dev/pci/if_xge.c

825

if (RXD_CTL1_L4CSUM(val) != 0xffff)

sys/dev/pci/if_xge.c

887

uint64_t val;

sys/dev/pci/if_xge.c

901

for (val = 0, i = 0; i < ETHER_ADDR_LEN; i++) {

sys/dev/pci/if_xge.c

902

val <<= 8;

sys/dev/pci/if_xge.c

903

val |= enm->enm_addrlo[i];

sys/dev/pci/if_xge.c

905

PIF_WCSR(RMAC_ADDR_DATA0_MEM, val << 16);

sys/dev/pci/igc/if_igc.c

1088

uint64_t val;

sys/dev/pci/igc/if_igc.c

1090

val = IGC_READ_REG(hw, reg);

sys/dev/pci/igc/if_igc.c

1092

val += ((uint64_t)IGC_READ_REG(hw, reg + 4)) << 32;

sys/dev/pci/igc/if_igc.c

1093

return val;

sys/dev/pci/igc/if_igc.c

1127

uint64_t val;

sys/dev/pci/igc/if_igc.c

1130

val = igc_read_mac_counter(hw, regaddr,

sys/dev/pci/igc/if_igc.c

1132

IGC_MAC_COUNTER_ADD(sc, cnt, val);

sys/dev/pci/igc/if_igc.c

1135

iqdrops += val;

sys/dev/pci/igc/if_igc.c

1139

uint32_t val;

sys/dev/pci/igc/if_igc.c

1142

val = IGC_READ_REG(hw, IGC_RQDPC(iq));

sys/dev/pci/igc/if_igc.c

1145

if (val != 0)

sys/dev/pci/igc/if_igc.c

1147

iqdrops += val;

sys/dev/pci/igc/igc_evcnt.h

246

#define IGC_ATOMIC_STORE(p, val) \

sys/dev/pci/igc/igc_evcnt.h

247

atomic_store_relaxed(p, val)

sys/dev/pci/igc/igc_evcnt.h

255

#define IGC_GLOBAL_COUNTER_STORE(sc, cnt, val) \

sys/dev/pci/igc/igc_evcnt.h

256

IGC_ATOMIC_STORE(&IGC_GLOBAL_COUNTER(sc, cnt), val)

sys/dev/pci/igc/igc_evcnt.h

262

#define IGC_DRIVER_COUNTER_STORE(sc, cnt, val) \

sys/dev/pci/igc/igc_evcnt.h

263

IGC_ATOMIC_STORE(&IGC_DRIVER_COUNTER(sc, cnt), val)

sys/dev/pci/igc/igc_evcnt.h

271

#define IGC_QUEUE_DRIVER_COUNTER_STORE(q, cnt, val) \

sys/dev/pci/igc/igc_evcnt.h

272

IGC_ATOMIC_STORE(&IGC_QUEUE_DRIVER_COUNTER(q, cnt), val)

sys/dev/pci/igc/igc_evcnt.h

278

#define IGC_QUEUE_COUNTER_STORE(q, cnt, val) \

sys/dev/pci/igc/igc_evcnt.h

279

IGC_ATOMIC_STORE(&IGC_QUEUE_COUNTER(q, cnt), val)

sys/dev/pci/igc/igc_evcnt.h

285

#define IGC_MAC_COUNTER_STORE(sc, cnt, val) \

sys/dev/pci/igc/igc_evcnt.h

286

IGC_ATOMIC_STORE(&IGC_MAC_COUNTER(sc, cnt), val)

sys/dev/pci/igma.c

506

igma_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/igma.c

508

return i2c_bitbang_write_byte(cookie, val, flags, &igma_i2cbb_ops);

sys/dev/pci/igma/igmafb.c

220

int val;

sys/dev/pci/igma/igmafb.c

244

val = (*(u_int *)data) != WSDISPLAYIO_VIDEO_OFF;

sys/dev/pci/igma/igmafb.c

245

sc->sc_backlight = val;

sys/dev/pci/igma/igmafb.c

246

if (val)

sys/dev/pci/igma/igmafb.c

258

igmafb_get_brightness(sc, &val);

sys/dev/pci/igma/igmafb.c

260

val = sc->sc_brightness;

sys/dev/pci/igma/igmafb.c

261

val = val * 255 / sc->sc_brightness_max;

sys/dev/pci/igma/igmafb.c

262

param->curval = val;

sys/dev/pci/igma/igmafb.c

275

val = param->curval;

sys/dev/pci/igma/igmafb.c

276

if (val < 0)

sys/dev/pci/igma/igmafb.c

277

val = 0;

sys/dev/pci/igma/igmafb.c

278

if (val > 255)

sys/dev/pci/igma/igmafb.c

279

val = 255;

sys/dev/pci/igma/igmafb.c

280

val = val * sc->sc_brightness_max / 255;

sys/dev/pci/igma/igmafb.c

281

sc->sc_brightness = val;

sys/dev/pci/igma/igmafb.c

283

igmafb_set_brightness(sc, val);

sys/dev/pci/igma/igmafb.c

286

val = param->curval;

sys/dev/pci/igma/igmafb.c

287

sc->sc_backlight = val;

sys/dev/pci/igma/igmafb.c

288

if (val)

sys/dev/pci/igma/igmafb.c

574

igmafb_set_brightness(struct igmafb_softc *sc, int val)

sys/dev/pci/igma/igmafb.c

585

BACKLIGHT_VAL(f,l,val));

sys/dev/pci/ismt.c

249

uint32_t val;

sys/dev/pci/ismt.c

251

val = bus_space_read_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MSTS);

sys/dev/pci/ismt.c

253

&& (val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS)) == 0)

sys/dev/pci/ismt.c

256

ISMT_DEBUG(sc->pcidev, "%s MSTS = 0x%08x\n", __func__, val);

sys/dev/pci/ismt.c

258

val |= (ISMT_MSTS_MIS | ISMT_MSTS_MEIS);

sys/dev/pci/ismt.c

259

bus_space_write_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MSTS, val);

sys/dev/pci/ismt.c

337

uint32_t err, fmhp, val;

sys/dev/pci/ismt.c

355

val = bus_space_read_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MCTRL);

sys/dev/pci/ismt.c

356

val &= ~ISMT_MCTRL_FMHP;

sys/dev/pci/ismt.c

357

val |= fmhp;

sys/dev/pci/ismt.c

358

bus_space_write_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MCTRL, val);

sys/dev/pci/ismt.c

361

val = bus_space_read_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MCTRL);

sys/dev/pci/ismt.c

362

val |= ISMT_MCTRL_SS;

sys/dev/pci/ismt.c

363

bus_space_write_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MCTRL, val);

sys/dev/pci/ismt.c

378

val = bus_space_read_4(sc->mmio_tag, sc->mmio_handle,

sys/dev/pci/ismt.c

380

if ((val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS)) != 0) {

sys/dev/pci/ismt.c

389

"MSTS = %08x\n", __func__, val);

sys/dev/pci/ismt.c

665

int val;

sys/dev/pci/ismt.c

728

val = bus_space_read_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MDS);

sys/dev/pci/ismt.c

729

val &= ~ISMT_MDS_MASK;

sys/dev/pci/ismt.c

730

val |= (ISMT_DESC_ENTRIES - 1);

sys/dev/pci/ismt.c

731

bus_space_write_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MDS, val);

sys/dev/pci/isp_pci.c

1023

isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)

sys/dev/pci/isp_pci.c

1032

BXW2(pcs, IspVirt2Off(pcs, regoff), val);

sys/dev/pci/isp_pci.c

1068

BXW4(pcs, IspVirt2Off(pcs, regoff), val);

sys/dev/pci/isp_pci.c

1102

isp_pci_wr_reg(struct ispsoftc *isp, int regoff, uint32_t val)

sys/dev/pci/isp_pci.c

1115

BXW2(pcs, IspVirt2Off(isp, regoff), val);

sys/dev/pci/isp_pci.c

1153

isp_pci_wr_reg_1080(struct ispsoftc *isp, int regoff, uint32_t val)

sys/dev/pci/isp_pci.c

1175

BXW2(pcs, IspVirt2Off(isp, regoff), val);

sys/dev/pci/ixgbe/ixgbe.c

2283

uint32_t val;

sys/dev/pci/ixgbe/ixgbe.c

2292

val = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(txr->me));

sys/dev/pci/ixgbe/ixgbe.c

2293

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixgbe.c

2308

uint32_t val;

sys/dev/pci/ixgbe/ixgbe.c

2317

val = IXGBE_READ_REG(&sc->hw, IXGBE_TDT(txr->me));

sys/dev/pci/ixgbe/ixgbe.c

2318

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixgbe.c

2334

uint32_t val;

sys/dev/pci/ixgbe/ixgbe.c

2343

val = rxr->next_to_check;

sys/dev/pci/ixgbe/ixgbe.c

2344

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixgbe.c

2360

uint32_t val;

sys/dev/pci/ixgbe/ixgbe.c

2369

val = rxr->next_to_refresh;

sys/dev/pci/ixgbe/ixgbe.c

2370

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixgbe.c

2385

uint32_t val;

sys/dev/pci/ixgbe/ixgbe.c

2394

val = IXGBE_READ_REG(&sc->hw, IXGBE_RDH(rxr->me));

sys/dev/pci/ixgbe/ixgbe.c

2395

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixgbe.c

2410

uint32_t val;

sys/dev/pci/ixgbe/ixgbe.c

2419

val = IXGBE_READ_REG(&sc->hw, IXGBE_RDT(rxr->me));

sys/dev/pci/ixgbe/ixgbe.c

2420

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixgbe.c

5982

int val;

sys/dev/pci/ixgbe/ixgbe.c

6003

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixgbe.c

6006

val = reg >> 8;

sys/dev/pci/ixgbe/ixgbe.c

6027

int val, error;

sys/dev/pci/ixgbe/ixgbe.c

6047

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixgbe.c

6050

val = !!(reg & 0x4000);

sys/dev/pci/ixgbe/ixgbe_82598.c

1084

s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/pci/ixgbe/ixgbe_82598.c

1095

*val = (u8)atlas_ctl;

sys/dev/pci/ixgbe/ixgbe_82598.c

1108

s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/pci/ixgbe/ixgbe_82598.c

1114

atlas_ctl = (reg << 8) | val;

sys/dev/pci/ixgbe/ixgbe_82598.h

48

s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/pci/ixgbe/ixgbe_82598.h

49

s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/pci/ixgbe/ixgbe_82599.c

2096

s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/pci/ixgbe/ixgbe_82599.c

2107

*val = (u8)core_ctl;

sys/dev/pci/ixgbe/ixgbe_82599.c

2120

s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/pci/ixgbe/ixgbe_82599.c

2126

core_ctl = (reg << 8) | val;

sys/dev/pci/ixgbe/ixgbe_82599.h

59

s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/pci/ixgbe/ixgbe_82599.h

60

s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/pci/ixgbe/ixgbe_api.c

1438

s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/pci/ixgbe/ixgbe_api.c

1441

val), IXGBE_NOT_IMPLEMENTED);

sys/dev/pci/ixgbe/ixgbe_api.c

1452

s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/pci/ixgbe/ixgbe_api.c

1455

val), IXGBE_NOT_IMPLEMENTED);

sys/dev/pci/ixgbe/ixgbe_api.c

1513

s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)

sys/dev/pci/ixgbe/ixgbe_api.c

1516

reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/pci/ixgbe/ixgbe_api.c

1528

s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)

sys/dev/pci/ixgbe/ixgbe_api.c

1531

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/pci/ixgbe/ixgbe_api.c

1578

s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)

sys/dev/pci/ixgbe/ixgbe_api.c

1581

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/pci/ixgbe/ixgbe_api.c

1593

s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)

sys/dev/pci/ixgbe/ixgbe_api.c

1596

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/pci/ixgbe/ixgbe_api.h

144

s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/pci/ixgbe/ixgbe_api.h

145

s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/pci/ixgbe/ixgbe_api.h

184

s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);

sys/dev/pci/ixgbe/ixgbe_api.h

185

s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);

sys/dev/pci/ixgbe/ixgbe_api.h

191

s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);

sys/dev/pci/ixgbe/ixgbe_api.h

192

s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);

sys/dev/pci/ixgbe/ixgbe_dcb.c

75

int val = uimin(bw[i] * multiplier, IXGBE_DCB_MAX_CREDIT_REFILL);

sys/dev/pci/ixgbe/ixgbe_dcb.c

77

if (val < min_credit)

sys/dev/pci/ixgbe/ixgbe_dcb.c

78

val = min_credit;

sys/dev/pci/ixgbe/ixgbe_dcb.c

79

refill[i] = (u16)val;

sys/dev/pci/ixgbe/ixgbe_netbsd.h

62

#define IXGBE_EVC_STORE(evp, val) \

sys/dev/pci/ixgbe/ixgbe_netbsd.h

63

atomic_store_relaxed(&((evp)->ev_count), (val))

sys/dev/pci/ixgbe/ixgbe_netbsd.h

64

#define IXGBE_EVC_ADD(evp, val) \

sys/dev/pci/ixgbe/ixgbe_netbsd.h

66

atomic_load_relaxed(&((evp)->ev_count)) + (val))

sys/dev/pci/ixgbe/ixgbe_netbsd.h

69

#define IXGBE_EVC_STORE(evp, val) ((evp)->ev_count = (val))

sys/dev/pci/ixgbe/ixgbe_netbsd.h

70

#define IXGBE_EVC_ADD(evp, val) ((evp)->ev_count += (val))

sys/dev/pci/ixgbe/ixgbe_osdep.c

100

ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)

sys/dev/pci/ixgbe/ixgbe_osdep.c

104

reg, val);

sys/dev/pci/ixgbe/ixgbe_osdep.c

116

ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)

sys/dev/pci/ixgbe/ixgbe_osdep.c

120

reg + (offset << 2), val);

sys/dev/pci/ixgbe/ixgbe_osdep.h

203

#define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val)

sys/dev/pci/ixgbe/ixgbe_osdep.h

210

#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \

sys/dev/pci/ixgbe/ixgbe_osdep.h

211

ixgbe_write_reg_array(a, reg, offset, val)

sys/dev/pci/ixgbe/ixgbe_phy.c

118

u16 *val, bool lock)

sys/dev/pci/ixgbe/ixgbe_phy.c

167

*val = (high_bits << 8) | low_bits;

sys/dev/pci/ixgbe/ixgbe_phy.c

195

u16 val, bool lock)

sys/dev/pci/ixgbe/ixgbe_phy.c

205

csum = ixgbe_ones_comp_byte_add(csum, val >> 8);

sys/dev/pci/ixgbe/ixgbe_phy.c

206

csum = ixgbe_ones_comp_byte_add(csum, val & 0xFF);

sys/dev/pci/ixgbe/ixgbe_phy.c

222

if (ixgbe_out_i2c_byte_ack(hw, val >> 8))

sys/dev/pci/ixgbe/ixgbe_phy.c

225

if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF))

sys/dev/pci/ixgbe/ixgbe_phy.h

220

u16 *val, bool lock);

sys/dev/pci/ixgbe/ixgbe_phy.h

222

u16 val, bool lock);

sys/dev/pci/ixgbe/ixgbe_type.h

4160

s32 (*read_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 *val);

sys/dev/pci/ixgbe/ixgbe_type.h

4162

u16 *val);

sys/dev/pci/ixgbe/ixgbe_type.h

4163

s32 (*write_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 val);

sys/dev/pci/ixgbe/ixgbe_type.h

4165

u16 val);

sys/dev/pci/ixgbe/ixgbe_x550.c

653

u16 reg, u16 *val)

sys/dev/pci/ixgbe/ixgbe_x550.c

655

return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, TRUE);

sys/dev/pci/ixgbe/ixgbe_x550.c

669

u16 reg, u16 *val)

sys/dev/pci/ixgbe/ixgbe_x550.c

671

return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, FALSE);

sys/dev/pci/ixgbe/ixgbe_x550.c

684

u8 addr, u16 reg, u16 val)

sys/dev/pci/ixgbe/ixgbe_x550.c

686

return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, TRUE);

sys/dev/pci/ixgbe/ixgbe_x550.c

700

u8 addr, u16 reg, u16 val)

sys/dev/pci/ixgbe/ixgbe_x550.c

702

return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, FALSE);

sys/dev/pci/ixgbe/ixv.c

1995

uint32_t val;

sys/dev/pci/ixgbe/ixv.c

2000

val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_VFTDH(txr->me));

sys/dev/pci/ixgbe/ixv.c

2001

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixv.c

2015

uint32_t val;

sys/dev/pci/ixgbe/ixv.c

2020

val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_VFTDT(txr->me));

sys/dev/pci/ixgbe/ixv.c

2021

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixv.c

2036

uint32_t val;

sys/dev/pci/ixgbe/ixv.c

2041

val = rxr->next_to_check;

sys/dev/pci/ixgbe/ixv.c

2042

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixv.c

2058

uint32_t val;

sys/dev/pci/ixgbe/ixv.c

2067

val = rxr->next_to_refresh;

sys/dev/pci/ixgbe/ixv.c

2068

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixv.c

2082

uint32_t val;

sys/dev/pci/ixgbe/ixv.c

2087

val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_VFRDH(rxr->me));

sys/dev/pci/ixgbe/ixv.c

2088

node.sysctl_data = &val;

sys/dev/pci/ixgbe/ixv.c

2102

uint32_t val;

sys/dev/pci/ixgbe/ixv.c

2107

val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_VFRDT(rxr->me));

sys/dev/pci/ixgbe/ixv.c

2108

node.sysctl_data = &val;

sys/dev/pci/lynxfb.c

108

#define DPR_WRITE(fb, reg, val) \

sys/dev/pci/lynxfb.c

109

bus_space_write_4((fb)->memt, (fb)->dprh, (reg), (val))

sys/dev/pci/mgafb.c

445

mgafb_dac_write(struct mgafb_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/mgafb.c

447

MGA_WRITE1(sc, MGA_DAC_BASE + reg, val);

sys/dev/pci/mgafb.c

457

mgafb_dac_write_ind(struct mgafb_softc *sc, uint8_t idx, uint8_t val)

sys/dev/pci/mgafb.c

460

mgafb_dac_write(sc, MGA_DAC_IND_DATA, val);

sys/dev/pci/mgafb.c

524

mgafb_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/mgafb.c

526

return i2c_bitbang_write_byte(cookie, val, flags, &mgafb_i2cbb_ops);

sys/dev/pci/mlyvar.h

266

mly_outb(struct mly_softc *mly, int off, u_int8_t val)

sys/dev/pci/mlyvar.h

269

bus_space_write_1(mly->mly_iot, mly->mly_ioh, off, val);

sys/dev/pci/mlyvar.h

275

mly_outw(struct mly_softc *mly, int off, u_int16_t val)

sys/dev/pci/mlyvar.h

278

bus_space_write_2(mly->mly_iot, mly->mly_ioh, off, val);

sys/dev/pci/mlyvar.h

284

mly_outl(struct mly_softc *mly, int off, u_int32_t val)

sys/dev/pci/mlyvar.h

287

bus_space_write_4(mly->mly_iot, mly->mly_ioh, off, val);

sys/dev/pci/mlyvar.h

295

u_int8_t val;

sys/dev/pci/mlyvar.h

297

val = mly_inb(mly, mly->mly_idbr) ^ mly->mly_doorbell_true;

sys/dev/pci/mlyvar.h

298

return ((val & mask) == mask);

sys/dev/pci/mlyvar.h

311

u_int8_t val;

sys/dev/pci/mlyvar.h

313

val = mly_inb(mly, mly->mly_error_status) ^ mly->mly_doorbell_true;

sys/dev/pci/mlyvar.h

314

return ((val & MLY_MSG_EMPTY) == 0);

sys/dev/pci/mvsata_pci.c

318

uint32_t val;

sys/dev/pci/mvsata_pci.c

321

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh, MVSATA_PCI_MAINCS);

sys/dev/pci/mvsata_pci.c

322

val |= MVSATA_PCI_MAINCS_SPM;

sys/dev/pci/mvsata_pci.c

323

bus_space_write_4(psc->psc_iot, psc->psc_ioh, MVSATA_PCI_MAINCS, val);

sys/dev/pci/mvsata_pci.c

327

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh,

sys/dev/pci/mvsata_pci.c

329

if (val & MVSATA_PCI_MAINCS_PME)

sys/dev/pci/mvsata_pci.c

332

if (!(val & MVSATA_PCI_MAINCS_PME)) {

sys/dev/pci/mvsata_pci.c

340

val | MVSATA_PCI_MAINCS_GSR);

sys/dev/pci/mvsata_pci.c

341

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh, MVSATA_PCI_MAINCS);

sys/dev/pci/mvsata_pci.c

343

if (!(val & MVSATA_PCI_MAINCS_GSR)) {

sys/dev/pci/mvsata_pci.c

350

val &= ~(MVSATA_PCI_MAINCS_GSR | MVSATA_PCI_MAINCS_SPM);

sys/dev/pci/mvsata_pci.c

351

bus_space_write_4(psc->psc_iot, psc->psc_ioh, MVSATA_PCI_MAINCS, val);

sys/dev/pci/mvsata_pci.c

352

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh, MVSATA_PCI_MAINCS);

sys/dev/pci/mvsata_pci.c

354

if (val & MVSATA_PCI_MAINCS_GSR) {

sys/dev/pci/mvsata_pci.c

369

uint32_t val, pci_command = MVSATA_PCI_COMMAND_DEFAULT;

sys/dev/pci/mvsata_pci.c

375

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh,

sys/dev/pci/mvsata_pci.c

377

val &= 0x3;

sys/dev/pci/mvsata_pci.c

379

val |= 0x00000060;

sys/dev/pci/mvsata_pci.c

381

val |= 0x00000070;

sys/dev/pci/mvsata_pci.c

384

MVSATA_PCI_GPIOPORTCTL, val);

sys/dev/pci/mvsata_pci.c

389

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh,

sys/dev/pci/mvsata_pci.c

392

MVSATA_PCI_EROMBAR, val | 0x00000001);

sys/dev/pci/mvsata_pci.c

403

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh,

sys/dev/pci/mvsata_pci.c

406

MVSATA_PCI_MODE, val & 0xff00ffff);

sys/dev/pci/mvsata_pci.c

441

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh,

sys/dev/pci/mvsata_pci.c

447

MVSATA_PCI_GPIOPORTCTL, val);

sys/dev/pci/mvsata_pci.c

452

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh,

sys/dev/pci/mvsata_pci.c

455

MVSATA_PCI_EROMBAR, val & ~0x00000001);

sys/dev/pci/mvsata_pci.c

469

val = bus_space_read_4(psc->psc_iot, psc->psc_ioh,

sys/dev/pci/mvsata_pci.c

471

if ((val & 0x30) >> 4) { /* PCI-X */

sys/dev/pci/neo.c

267

#define nm_wr_1(sc, regno, val) \

sys/dev/pci/neo.c

268

bus_space_write_1((sc)->regiot, (sc)->regioh, (regno), (val))

sys/dev/pci/neo.c

270

#define nm_wr_2(sc, regno, val) \

sys/dev/pci/neo.c

271

bus_space_write_2((sc)->regiot, (sc)->regioh, (regno), (val))

sys/dev/pci/neo.c

273

#define nm_wr_4(sc, regno, val) \

sys/dev/pci/neo.c

274

bus_space_write_4((sc)->regiot, (sc)->regioh, (regno), (val))

sys/dev/pci/neo.c

279

#define nm_wrbuf_1(sc, regno, val) \

sys/dev/pci/neo.c

280

bus_space_write_1((sc)->bufiot, (sc)->bufioh, (regno), (val))

sys/dev/pci/nfsmb.c

338

nfsmb_send_1(struct nfsmb_softc *sc, uint8_t val, i2c_addr_t addr, i2c_op_t op,

sys/dev/pci/nfsmb.c

344

bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, val);

sys/dev/pci/nfsmb.c

359

nfsmb_write_1(struct nfsmb_softc *sc, uint8_t cmd, uint8_t val, i2c_addr_t addr,

sys/dev/pci/nfsmb.c

368

bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, val);

sys/dev/pci/nfsmb.c

382

nfsmb_write_2(struct nfsmb_softc *sc, uint8_t cmd, uint16_t val,

sys/dev/pci/nfsmb.c

391

low = val;

sys/dev/pci/nfsmb.c

393

high = val >> 8;

sys/dev/pci/oboereg.h

147

#define OUTB(sc, val, off) \

sys/dev/pci/oboereg.h

148

bus_space_write_1(sc->sc_iot, sc->sc_ioh, off, val)

sys/dev/pci/pccbb.c

107

#define Pcic_write(sc, reg, val) pccbb_pcmcia_write((sc), (reg), (val))

sys/dev/pci/pccbb.c

1099

int retval = 0, val;

sys/dev/pci/pccbb.c

1105

val = (*pil->pil_func)(pil->pil_arg);

sys/dev/pci/pccbb.c

1109

retval == 0 ? val : val != 0 ? val : retval;

sys/dev/pci/pccbb.c

1170

pccbb_pcmcia_write(struct pccbb_softc *sc, int reg, uint8_t val)

sys/dev/pci/pccbb.c

1173

PCCBB_PCMCIA_OFFSET + reg, val);

sys/dev/pci/pccbb.c

1895

pccbb_conf_write(cardbus_chipset_tag_t cc, pcitag_t tag, int reg, pcireg_t val)

sys/dev/pci/pccbb.c

1899

pci_conf_write(sc->sc_pc, tag, reg, val);

sys/dev/pci/pci.c

1028

pcireg_t val;

sys/dev/pci/pci.c

1031

val = pci_conf_read(pc, tag, (off * 4));

sys/dev/pci/pci.c

1032

if (val != pcs->reg[off])

sys/dev/pci/pci_map.c

305

pcireg_t val;

sys/dev/pci/pci_map.c

316

val = pci_conf_read(pc, tag, ea_cap_ptr + PCI_EA_CAP1);

sys/dev/pci/pci_map.c

317

num_entries = __SHIFTOUT(val, PCI_EA_CAP1_NUMENTRIES);

sys/dev/pci/pci_map.c

319

val = pci_conf_read(pc, tag, PCI_BHLC_REG);

sys/dev/pci/pci_map.c

320

if (PCI_HDRTYPE_TYPE(val) == PCI_HDRTYPE_PPB) {

sys/dev/pci/pci_map.c

326

val = pci_conf_read(pc, tag, entry.ea_ptrs[EA_ptr_dw0]);

sys/dev/pci/pci_map.c

327

unsigned int entry_size = __SHIFTOUT(val, PCI_EA_ES);

sys/dev/pci/pci_map.c

329

entry.bei = __SHIFTOUT(val, PCI_EA_BEI);

sys/dev/pci/pci_map.c

330

entry.props[0] = __SHIFTOUT(val, PCI_EA_PP);

sys/dev/pci/pci_map.c

331

entry.props[1] = __SHIFTOUT(val, PCI_EA_SP);

sys/dev/pci/pci_map.c

332

entry.writable = (val & PCI_EA_W) ? true : false;

sys/dev/pci/pci_map.c

333

entry.enabled = (val & PCI_EA_E) ? true : false;

sys/dev/pci/pci_subr.c

1252

pci_conf_print_pcipm_cap_pmrev(uint8_t val)

sys/dev/pci/pci_subr.c

1258

if (val > 7)

sys/dev/pci/pci_subr.c

1260

return pmrev[val];

sys/dev/pci/pci_subr.c

139

u_int val; /* as wide as pci_{,sub}class_t */

sys/dev/pci/pci_subr.c

1503

pcireg_t val;

sys/dev/pci/pci_subr.c

1510

val = regs[o2i(capoff + PCI_HT_CMD)];

sys/dev/pci/pci_subr.c

1511

onoff("Enable", val, PCI_HT_MSI_ENABLED);

sys/dev/pci/pci_subr.c

1512

onoff("Fixed", val, PCI_HT_MSI_FIXED);

sys/dev/pci/pci_subr.c

1558

pcireg_t val, foundcap;

sys/dev/pci/pci_subr.c

1561

val = regs[o2i(capoff + PCI_HT_CMD)];

sys/dev/pci/pci_subr.c

1565

printf(" Command register: 0x%04x\n", val >> 16);

sys/dev/pci/pci_subr.c

1566

foundcap = PCI_HT_CAP(val);

sys/dev/pci/pci_subr.c

1595

pcireg_t val;

sys/dev/pci/pci_subr.c

1597

val = regs[o2i(capoff + PCI_DEBUG_BASER)];

sys/dev/pci/pci_subr.c

1601

val >> PCI_DEBUG_BASER_SHIFT);

sys/dev/pci/pci_subr.c

1603

(val & PCI_DEBUG_PORTOFF_MASK) >> PCI_DEBUG_PORTOFF_SHIFT);

sys/dev/pci/pci_subr.c

1605

(val & PCI_DEBUG_BARNUM_MASK) >> PCI_DEBUG_BARNUM_SHIFT);

sys/dev/pci/pci_subr.c

1626

pcireg_t reg, reg2, val;

sys/dev/pci/pci_subr.c

1632

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_CAP_TYPE);

sys/dev/pci/pci_subr.c

1635

if (val == PCI_SECURE_CAP_TYPE_IOMMU)

sys/dev/pci/pci_subr.c

1638

printf("0x%x(unknown)\n", val);

sys/dev/pci/pci_subr.c

1642

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_CAP_REV);

sys/dev/pci/pci_subr.c

1643

printf(" Capability revision: 0x%02x ", val);

sys/dev/pci/pci_subr.c

1644

if (val == PCI_SECURE_CAP_REV_IOMMU)

sys/dev/pci/pci_subr.c

1685

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC0_GVASIZE);

sys/dev/pci/pci_subr.c

1687

if (val == PCI_SECURE_IOMMU_MISC0_GVASIZE_48B)

sys/dev/pci/pci_subr.c

1690

printf("0x%x(unknown)\n", val);

sys/dev/pci/pci_subr.c

1691

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC0_PASIZE);

sys/dev/pci/pci_subr.c

1692

printf(" Physical Address size: %dbits\n", val);

sys/dev/pci/pci_subr.c

1693

val = PCIREG_SHIFTOUT(reg, PCI_SECURE_IOMMU_MISC0_VASIZE);

sys/dev/pci/pci_subr.c

1694

printf(" Virtual Address size: %dbits\n", val);

sys/dev/pci/pci_subr.c

1710

pci_print_pcie_L0s_latency(uint32_t val)

sys/dev/pci/pci_subr.c

1713

switch (val) {

sys/dev/pci/pci_subr.c

1720

printf("%dns to less than %dns\n", 32 << val, 32 << (val + 1));

sys/dev/pci/pci_subr.c

1738

pci_print_pcie_L1_latency(uint32_t val)

sys/dev/pci/pci_subr.c

1741

switch (val) {

sys/dev/pci/pci_subr.c

1752

printf("%dus to less than %dus\n", 1 << (val - 1), 1 << val);

sys/dev/pci/pci_subr.c

1758

pci_print_pcie_compl_timeout(uint32_t val)

sys/dev/pci/pci_subr.c

1761

switch (val) {

sys/dev/pci/pci_subr.c

1778

printf("unknown %u value\n", val);

sys/dev/pci/pci_subr.c

1798

pci_print_pcie_linkspeed(int regnum, pcireg_t val)

sys/dev/pci/pci_subr.c

1801

if ((regnum == PCIE_LCSR2) && (val == 0))

sys/dev/pci/pci_subr.c

1803

else if ((val < 1) || (val > __arraycount(pcie_linkspeeds)))

sys/dev/pci/pci_subr.c

1804

printf("unknown value (%u)\n", val);

sys/dev/pci/pci_subr.c

1806

printf("%sGT/s\n", pcie_linkspeeds[val - 1]);

sys/dev/pci/pci_subr.c

1819

pci_print_pcie_linkspeedvector(pcireg_t val)

sys/dev/pci/pci_subr.c

1825

if (((val >> i) & 0x01) != 0) {

sys/dev/pci/pci_subr.c

1834

pci_print_pcie_link_deemphasis(pcireg_t val)

sys/dev/pci/pci_subr.c

1836

switch (val) {

sys/dev/pci/pci_subr.c

1866

pci_print_pcie_link_preset_preshoot_deemphasis(pcireg_t val)

sys/dev/pci/pci_subr.c

1870

if (val >= __arraycount(pcie_link_preset_preshoot_deemphasis)) {

sys/dev/pci/pci_subr.c

1875

printf("reserved value (0x%x)", val);

sys/dev/pci/pci_subr.c

1880

pcie_link_preset_preshoot_deemphasis[val].preshoot);

sys/dev/pci/pci_subr.c

1881

deemphasis = pcie_link_preset_preshoot_deemphasis[val].deemphasis;

sys/dev/pci/pci_subr.c

1891

pcireg_t val; /* for each bitfield */

sys/dev/pci/pci_subr.c

2250

val = reg & PCIE_DCAP2_COMPT_RANGE;

sys/dev/pci/pci_subr.c

2251

switch (val) {

sys/dev/pci/pci_subr.c

2257

if (((val >> i) & 0x01) != 0)

sys/dev/pci/pci_subr.c

2320

val = PCIREG_SHIFTOUT(reg, PCIE_DCAP2_MAX_EETLP);

sys/dev/pci/pci_subr.c

2321

printf(" Max End-End TLP Prefixes: %u\n", (val == 0) ? 4 : val);

sys/dev/pci/pci_subr.c

3821

pci_conf_print_tph_req_cap_sttabloc(uint8_t val)

sys/dev/pci/pci_subr.c

3824

switch (val) {

sys/dev/pci/pci_subr.c

4187

int scale, val;

sys/dev/pci/pci_subr.c

4211

val = PCIREG_SHIFTOUT(reg, PCI_L1PM_CAP_PTPOVAL);

sys/dev/pci/pci_subr.c

4216

printf("%dus\n", val * scale);

sys/dev/pci/pci_subr.c

4229

val = PCIREG_SHIFTOUT(reg, PCI_L1PM_CTL1_LTRTHVAL);

sys/dev/pci/pci_subr.c

4230

printf(" LTR L1.2 THRESHOLD: %dus\n", val * scale);

sys/dev/pci/pci_subr.c

4236

val = PCIREG_SHIFTOUT(reg, PCI_L1PM_CTL2_TPOVAL);

sys/dev/pci/pci_subr.c

4241

printf("%dus\n", val * scale);

sys/dev/pci/pci_subr.c

4254

uint32_t val;

sys/dev/pci/pci_subr.c

4264

val = PCIREG_SHIFTOUT(reg, PCI_PTM_CAP_LCLCLKGRNL);

sys/dev/pci/pci_subr.c

4265

switch (val) {

sys/dev/pci/pci_subr.c

4273

printf("%uns\n", val);

sys/dev/pci/pci_subr.c

4282

val = PCIREG_SHIFTOUT(reg, PCI_PTM_CTL_EFCTGRNL);

sys/dev/pci/pci_subr.c

4283

switch (val) {

sys/dev/pci/pci_subr.c

4291

printf("%uns\n", val);

sys/dev/pci/pci_subr.c

729

if (class == classp->val)

sys/dev/pci/pci_subr.c

736

if (subclass == subclassp->val)

sys/dev/pci/pci_subr.c

744

if (interface == interfacep->val)

sys/dev/pci/pci_subr.c

913

if (class == classp->val)

sys/dev/pci/pci_subr.c

935

if (subclass == subclassp->val)

sys/dev/pci/pci_subr.c

943

if (interface == interfacep->val)

sys/dev/pci/pci_usrreq.c

103

bdfr->cfgreg.val);

sys/dev/pci/pci_usrreq.c

241

r->val = pci_conf_read(pc, tag, r->reg);

sys/dev/pci/pci_usrreq.c

247

pci_conf_write(pc, tag, r->reg, r->val);

sys/dev/pci/pci_usrreq.c

97

bdfr->cfgreg.val = pci_conf_read(sc->sc_pc, tag,

sys/dev/pci/pciide_acer_reg.h

68

#define ACER_FTH_VAL(chan, drv, val) \

sys/dev/pci/pciide_acer_reg.h

69

(((val) & 0x3) << ((drv) * 4 + (chan) * 8))

sys/dev/pci/pciide_acer_reg.h

70

#define ACER_FTH_OPL(chan, drv, val) \

sys/dev/pci/pciide_acer_reg.h

71

(((val) & 0x3) << (2 + (drv) * 4 + (chan) * 8))

sys/dev/pci/pciide_acer_reg.h

74

#define ACER_UDMA_TIM(chan, drv, val) \

sys/dev/pci/pciide_acer_reg.h

75

(((val) & 0x7) << (16 + (drv) * 4 + (chan) * 8))

sys/dev/pci/pciide_opti_reg.h

134

opti_write_config(struct ata_channel *chp, int reg, u_int8_t val)

sys/dev/pci/pciide_opti_reg.h

147

bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[reg], 0, val);

sys/dev/pci/pciidevar.h

199

pciide_pci_write(pci_chipset_tag_t pc, pcitag_t pa, int reg, uint8_t val)

sys/dev/pci/pciidevar.h

205

pcival |= (val << ((reg & 0x03) * 8));

sys/dev/pci/pciio.h

54

uint32_t val; /* value of the register */

sys/dev/pci/pcireg.h

786

#define PCIX_STATUS_FN(val) ((val) & PCIX_STATUS_FN_MASK)

sys/dev/pci/pcireg.h

787

#define PCIX_STATUS_DEV(val) \

sys/dev/pci/pcireg.h

788

(((val) & PCIX_STATUS_DEV_MASK) >> PCIX_STATUS_DEV_SHIFT)

sys/dev/pci/pcireg.h

789

#define PCIX_STATUS_BUS(val) \

sys/dev/pci/pcireg.h

790

(((val) & PCIX_STATUS_BUS_MASK) >> PCIX_STATUS_BUS_SHIFT)

sys/dev/pci/pcscp.c

95

#define PCSCP_WRITE_REG(sc, reg, val) \

sys/dev/pci/pcscp.c

96

bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg) << 2, (val))

sys/dev/pci/piixpm.c

422

uint8_t val;

sys/dev/pci/piixpm.c

425

val = bus_space_read_1(sbt, sbh, offset);

sys/dev/pci/piixpm.c

428

val = bus_space_read_1(sbt, sbh, SB800_INDIRECTIO_DATA);

sys/dev/pci/piixpm.c

431

return val;

sys/dev/pci/pm2fb.c

1474

pm2fb_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/pm2fb.c

1476

return (i2c_bitbang_write_byte(cookie, val, flags, &pm2fb_i2cbb_ops));

sys/dev/pci/pm3fb.c

1289

pm3fb_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/pm3fb.c

1291

return (i2c_bitbang_write_byte(cookie, val, flags, &pm3fb_i2cbb_ops));

sys/dev/pci/ppb.c

280

pcireg_t slcap, slcsr, val;

sys/dev/pci/ppb.c

293

val = 0;

sys/dev/pci/ppb.c

297

val |= PCIE_SLCSR_ABE;

sys/dev/pci/ppb.c

299

val |= PCIE_SLCSR_PFE;

sys/dev/pci/ppb.c

301

val |= PCIE_SLCSR_MSE;

sys/dev/pci/ppb.c

309

val |= PCIE_SLCSR_CCE;

sys/dev/pci/ppb.c

313

val |= __SHIFTIN(PCIE_SLCSR_IND_OFF,

sys/dev/pci/ppb.c

328

val |= __SHIFTIN(PCIE_SLCSR_IND_OFF,

sys/dev/pci/ppb.c

331

val |= __SHIFTIN(PCIE_SLCSR_IND_ON,

sys/dev/pci/ppb.c

335

val |= PCIE_SLCSR_DLLSCE | PCIE_SLCSR_HPE | PCIE_SLCSR_PDE;

sys/dev/pci/ppb.c

336

slcsr = val;

sys/dev/pci/ppb.c

492

pcireg_t val;

sys/dev/pci/ppb.c

495

val = pci_conf_read(sc->sc_pc, sc->sc_tag, off);

sys/dev/pci/ppb.c

496

if (val != sc->sc_pciconfext[(off - 0x40) / 4])

sys/dev/pci/puc.c

346

#define checkreg(val, index) \

sys/dev/pci/puc.c

347

(((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)])

sys/dev/pci/pvscsi.c

121

uint32_t val);

sys/dev/pci/pvscsi.c

124

uint32_t val);

sys/dev/pci/pvscsi.c

1301

uint32_t val;

sys/dev/pci/pvscsi.c

1305

val = pvscsi_read_intr_status(sc);

sys/dev/pci/pvscsi.c

1307

if ((val & PVSCSI_INTR_ALL_SUPPORTED) != 0) {

sys/dev/pci/pvscsi.c

1308

pvscsi_write_intr_status(sc, val & PVSCSI_INTR_ALL_SUPPORTED);

sys/dev/pci/pvscsi.c

343

pvscsi_reg_write(struct pvscsi_softc *sc, uint32_t offset, uint32_t val)

sys/dev/pci/pvscsi.c

346

bus_space_write_4(sc->sc_memt, sc->sc_memh, offset, val);

sys/dev/pci/pvscsi.c

357

pvscsi_write_intr_status(struct pvscsi_softc *sc, uint32_t val)

sys/dev/pci/pvscsi.c

360

pvscsi_reg_write(sc, PVSCSI_REG_OFFSET_INTR_STATUS, val);

sys/dev/pci/pvscsi.c

877

uint32_t val =

sys/dev/pci/pvscsi.c

881

DEBUG_PRINTF(2, sc->dev, "adapter reset done: %u\n", val);

sys/dev/pci/qat/qat_ae.c

1209

uint32_t val;

sys/dev/pci/qat/qat_ae.c

1220

val = qat_ae_read_4(sc, ae, AE_MISC_CONTROL, &val);

sys/dev/pci/qat/qat_ae.c

1221

val &= ~AE_MISC_CONTROL_SHARE_CS;

sys/dev/pci/qat/qat_ae.c

1222

qat_ae_write_4(sc, ae, AE_MISC_CONTROL, val);

sys/dev/pci/qat/qat_ae.c

1226

qat_ae_read_4(sc, ae, CTX_ENABLES, &val);

sys/dev/pci/qat/qat_ae.c

1227

val &= CTX_ENABLES_IGNORE_W1C_MASK;

sys/dev/pci/qat/qat_ae.c

1228

val |= CTX_ENABLES_NN_MODE;

sys/dev/pci/qat/qat_ae.c

1229

val &= ~CTX_ENABLES_CNTL_STORE_PARITY_ENABLE;

sys/dev/pci/qat/qat_ae.c

1230

qat_ae_write_4(sc, ae, CTX_ENABLES, val);

sys/dev/pci/qat/qat_ae.c

738

uint32_t val, nval;

sys/dev/pci/qat/qat_ae.c

740

qat_ae_read_4(sc, ae, CTX_ENABLES, &val);

sys/dev/pci/qat/qat_ae.c

741

val &= CTX_ENABLES_IGNORE_W1C_MASK;

sys/dev/pci/qat/qat_ae.c

744

nval = val | CTX_ENABLES_INUSE_CONTEXTS;

sys/dev/pci/qat/qat_ae.c

746

nval = val & ~CTX_ENABLES_INUSE_CONTEXTS;

sys/dev/pci/qat/qat_ae.c

748

if (val != nval)

sys/dev/pci/qat/qat_ae.c

755

uint32_t val, nval;

sys/dev/pci/qat/qat_ae.c

757

qat_ae_read_4(sc, ae, CTX_ENABLES, &val);

sys/dev/pci/qat/qat_ae.c

758

val &= CTX_ENABLES_IGNORE_W1C_MASK;

sys/dev/pci/qat/qat_ae.c

761

nval = val | CTX_ENABLES_NN_MODE;

sys/dev/pci/qat/qat_ae.c

763

nval = val & ~CTX_ENABLES_NN_MODE;

sys/dev/pci/qat/qat_ae.c

765

if (val != nval)

sys/dev/pci/qat/qat_ae.c

773

uint32_t val, nval;

sys/dev/pci/qat/qat_ae.c

776

qat_ae_read_4(sc, ae, CTX_ENABLES, &val);

sys/dev/pci/qat/qat_ae.c

777

val &= CTX_ENABLES_IGNORE_W1C_MASK;

sys/dev/pci/qat/qat_ae.c

792

nval = val | bit;

sys/dev/pci/qat/qat_ae.c

794

nval = val & ~bit;

sys/dev/pci/qat/qat_ae.c

796

if (val != nval)

sys/dev/pci/qat/qat_ae.c

803

uint32_t val, nval;

sys/dev/pci/qat/qat_ae.c

805

qat_ae_read_4(sc, ae, AE_MISC_CONTROL, &val);

sys/dev/pci/qat/qat_ae.c

808

nval = val | AE_MISC_CONTROL_SHARE_CS;

sys/dev/pci/qat/qat_ae.c

810

nval = val & ~AE_MISC_CONTROL_SHARE_CS;

sys/dev/pci/qat/qat_ae.c

812

if (val != nval)

sys/dev/pci/qat/qat_ae.c

834

uint32_t val, cs_reload;

sys/dev/pci/qat/qat_ae.c

858

qat_ae_read_4(sc, ae, AE_MISC_CONTROL, &val);

sys/dev/pci/qat/qat_ae.c

859

val &= ~(AE_MISC_CONTROL_ONE_CTX_RELOAD |

sys/dev/pci/qat/qat_ae.c

861

val |= __SHIFTIN(cs_reload, AE_MISC_CONTROL_CS_RELOAD) |

sys/dev/pci/qat/qat_ae.c

863

qat_ae_write_4(sc, ae, AE_MISC_CONTROL, val);

sys/dev/pci/qat/qat_ae.c

872

uint32_t val = 0;

sys/dev/pci/qat/qat_ae.c

874

error = qat_ae_read_4(sc, ae, CTX_ENABLES, &val);

sys/dev/pci/qat/qat_ae.c

875

if (error || val & CTX_ENABLES_ENABLE)

sys/dev/pci/qat/qat_ae.c

878

qat_ae_read_4(sc, ae, ACTIVE_CTX_STATUS, &val);

sys/dev/pci/qat/qat_ae.c

879

if (val & ACTIVE_CTX_STATUS_ABO)

sys/dev/pci/qat/qat_ae.c

889

uint32_t val;

sys/dev/pci/qat/qat_ae.c

894

qat_ae_read_4(sc, ae, ACTIVE_CTX_STATUS, &val);

sys/dev/pci/qat/qat_ae.c

895

if (val & ACTIVE_CTX_STATUS_ABO)

sys/dev/pci/qat/qat_ae.c

953

uint32_t mask, val = 0;

sys/dev/pci/qat/qat_ae.c

992

qat_ae_read_4(sc, ae, SIGNATURE_ENABLE, &val);

sys/dev/pci/qat/qat_ae.c

993

val |= 0x1;

sys/dev/pci/qat/qat_ae.c

994

qat_ae_write_4(sc, ae, SIGNATURE_ENABLE, val);

sys/dev/pci/qat/qat_hw15.c

545

cipher_config->val = qat_crypto_load_cipher_cryptoini(desc, crie);

sys/dev/pci/qat/qat_hw17.c

347

cipher->max.cipher_config.val =

sys/dev/pci/qat/qat_hw17reg.h

1416

#define FW_LA_CIPH_IV_FLD_FLAG_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1418

flags, val, LA_CIPH_IV_FLD_BITPOS, LA_CIPH_IV_FLD_MASK)

sys/dev/pci/qat/qat_hw17reg.h

1427

#define FW_LA_CIPH_AUTH_CFG_OFFSET_FLAG_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1429

val, \

sys/dev/pci/qat/qat_hw17reg.h

1439

#define FW_LA_ZUC_3G_PROTO_FLAG_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1441

val, \

sys/dev/pci/qat/qat_hw17reg.h

1451

#define FW_LA_GCM_IV_LEN_FLAG_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1453

val, \

sys/dev/pci/qat/qat_hw17reg.h

1463

#define FW_LA_PROTO_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1464

FIELD_SET(flags, val, LA_PROTO_BITPOS, LA_PROTO_MASK)

sys/dev/pci/qat/qat_hw17reg.h

1472

#define FW_LA_CMP_AUTH_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1474

flags, val, LA_CMP_AUTH_RES_BITPOS, LA_CMP_AUTH_RES_MASK)

sys/dev/pci/qat/qat_hw17reg.h

1482

#define FW_LA_RET_AUTH_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1484

flags, val, LA_RET_AUTH_RES_BITPOS, LA_RET_AUTH_RES_MASK)

sys/dev/pci/qat/qat_hw17reg.h

1492

#define FW_LA_DIGEST_IN_BUFFER_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1494

val, \

sys/dev/pci/qat/qat_hw17reg.h

1504

#define FW_LA_UPDATE_STATE_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1506

flags, val, LA_UPDATE_STATE_BITPOS, LA_UPDATE_STATE_MASK)

sys/dev/pci/qat/qat_hw17reg.h

1514

#define FW_LA_PARTIAL_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

1515

FIELD_SET(flags, val, LA_PARTIAL_BITPOS, LA_PARTIAL_MASK)

sys/dev/pci/qat/qat_hw17reg.h

197

#define FW_COMN_HEARTBEAT_HDR_FLAG_SET(hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

198

FW_COMN_HEARTBEAT_FLAG_SET(hdr_t, val)

sys/dev/pci/qat/qat_hw17reg.h

208

#define FIELD_SET(flags, val, bitpos, mask) \

sys/dev/pci/qat/qat_hw17reg.h

210

(((flags) & (~((mask) << (bitpos)))) | (((val) & (mask)) << (bitpos)))

sys/dev/pci/qat/qat_hw17reg.h

2322

#define FW_CIPHER_NEXT_ID_SET(cd_ctrl_hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

2326

((val << FW_COMN_NEXT_ID_BITPOS) & \

sys/dev/pci/qat/qat_hw17reg.h

2332

#define FW_CIPHER_CURR_ID_SET(cd_ctrl_hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

2336

((val)&FW_COMN_CURR_ID_MASK))

sys/dev/pci/qat/qat_hw17reg.h

2343

#define FW_AUTH_NEXT_ID_SET(cd_ctrl_hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

2347

((val << FW_COMN_NEXT_ID_BITPOS) & \

sys/dev/pci/qat/qat_hw17reg.h

2353

#define FW_AUTH_CURR_ID_SET(cd_ctrl_hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

2357

((val)&FW_COMN_CURR_ID_MASK))

sys/dev/pci/qat/qat_hw17reg.h

590

#define FW_COMN_OV_SRV_TYPE_SET(fw_comn_req_hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

591

fw_comn_req_hdr_t.service_type = val

sys/dev/pci/qat/qat_hw17reg.h

609

#define FW_COMN_OV_SRV_CMD_ID_SET(fw_comn_req_hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

610

fw_comn_req_hdr_t.service_cmd_id = val

sys/dev/pci/qat/qat_hw17reg.h

649

#define FW_COMN_HDR_VALID_FLAG_SET(hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

650

FW_COMN_VALID_FLAG_SET(hdr_t, val)

sys/dev/pci/qat/qat_hw17reg.h

683

#define FW_COMN_VALID_FLAG_SET(hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

685

(val), \

sys/dev/pci/qat/qat_hw17reg.h

835

#define FW_COMN_PTR_TYPE_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

836

FIELD_SET(flags, val, COMN_PTR_TYPE_BITPOS, COMN_PTR_TYPE_MASK)

sys/dev/pci/qat/qat_hw17reg.h

845

#define FW_COMN_CD_FLD_TYPE_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

847

flags, val, COMN_CD_FLD_TYPE_BITPOS, COMN_CD_FLD_TYPE_MASK)

sys/dev/pci/qat/qat_hw17reg.h

856

#define FW_COMN_BNP_ENABLE_SET(flags, val) \

sys/dev/pci/qat/qat_hw17reg.h

858

flags, val, COMN_BNP_ENABLED_BITPOS, COMN_BNP_ENABLED_MASK)

sys/dev/pci/qat/qat_hw17reg.h

879

#define FW_COMN_NEXT_ID_SET(cd_ctrl_hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

882

((val << FW_COMN_NEXT_ID_BITPOS) & \

sys/dev/pci/qat/qat_hw17reg.h

888

#define FW_COMN_CURR_ID_SET(cd_ctrl_hdr_t, val) \

sys/dev/pci/qat/qat_hw17reg.h

891

((val)&FW_COMN_CURR_ID_MASK))

sys/dev/pci/qat/qatreg.h

1457

uint32_t val; /* Cipher slice configuration */

sys/dev/pci/radeonfb.c

1504

radeonfb_put32(struct radeonfb_softc *sc, uint32_t reg, uint32_t val)

sys/dev/pci/radeonfb.c

1507

bus_space_write_4(sc->sc_regt, sc->sc_regh, reg, val);

sys/dev/pci/radeonfb.c

1511

radeonfb_put32s(struct radeonfb_softc *sc, uint32_t reg, uint32_t val)

sys/dev/pci/radeonfb.c

1514

bus_space_write_stream_4(sc->sc_regt, sc->sc_regh, reg, val);

sys/dev/pci/radeonfb.c

1522

uint32_t val;

sys/dev/pci/radeonfb.c

1525

val = radeonfb_get32(sc, reg);

sys/dev/pci/radeonfb.c

1526

val = (val & andmask) | ormask;

sys/dev/pci/radeonfb.c

1527

radeonfb_put32(sc, reg, val);

sys/dev/pci/radeonfb.c

1535

uint32_t val;

sys/dev/pci/radeonfb.c

1539

val = radeonfb_get32(sc, RADEON_MM_DATA);

sys/dev/pci/radeonfb.c

1542

return (val);

sys/dev/pci/radeonfb.c

1546

radeonfb_putindex(struct radeonfb_softc *sc, uint32_t idx, uint32_t val)

sys/dev/pci/radeonfb.c

1552

radeonfb_put32(sc, RADEON_MM_DATA, val);

sys/dev/pci/radeonfb.c

1561

uint32_t val;

sys/dev/pci/radeonfb.c

1565

val = radeonfb_get32(sc, RADEON_MM_DATA);

sys/dev/pci/radeonfb.c

1566

val = (val & andmask) | ormask;

sys/dev/pci/radeonfb.c

1567

radeonfb_put32(sc, RADEON_MM_DATA, val);

sys/dev/pci/radeonfb.c

1575

uint32_t val;

sys/dev/pci/radeonfb.c

1579

val = radeonfb_get32(sc, RADEON_CLOCK_CNTL_DATA);

sys/dev/pci/radeonfb.c

1584

return (val);

sys/dev/pci/radeonfb.c

1588

radeonfb_putpll(struct radeonfb_softc *sc, uint32_t idx, uint32_t val)

sys/dev/pci/radeonfb.c

1595

radeonfb_put32(sc, RADEON_CLOCK_CNTL_DATA, val);

sys/dev/pci/radeonfb.c

1605

uint32_t val;

sys/dev/pci/radeonfb.c

1610

val = radeonfb_get32(sc, RADEON_CLOCK_CNTL_DATA);

sys/dev/pci/radeonfb.c

1611

val = (val & andmask) | ormask;

sys/dev/pci/radeonfb.c

1612

radeonfb_put32(sc, RADEON_CLOCK_CNTL_DATA, val);

sys/dev/pci/radeonfb_i2c.c

192

radeonfb_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/radeonfb_i2c.c

195

return i2c_bitbang_write_byte(cookie, val, flags, &radeonfb_i2cbb_ops);

sys/dev/pci/rdcide_reg.h

36

#define RDCIDE_PATR_SETUP(val, chan) (((val) << 12) << ((chan) * 16))

sys/dev/pci/rdcide_reg.h

38

#define RDCIDE_PATR_HOLD(val, chan) (((val) << 8) << ((chan) * 16))

sys/dev/pci/rdcide_reg.h

47

#define RDCIDE_PSD1ATR_SETUP(val, chan) (((val) << 2) << (chan * 4))

sys/dev/pci/rdcide_reg.h

49

#define RDCIDE_PSD1ATR_HOLD(val, chan) (((val) << 0) << (chan * 4))

sys/dev/pci/rdcide_reg.h

58

#define RDCIDE_UDCCR_TIM(val, chan, drv) (((val) << ((drv) * 4)) << (chan * 8))

sys/dev/pci/rdcide_reg.h

66

#define RDCIDE_IIOCR_CLK(val, chan, drv) (((val) << drv) << (chan * 2))

sys/dev/pci/satalink.c

357

ba5_write_4_ind(struct pciide_softc *sc, bus_addr_t reg, uint32_t val)

sys/dev/pci/satalink.c

363

pci_conf_write(sc->sc_pc, sc->sc_tag, SII3112_BA5_IND_DATA, val);

sys/dev/pci/satalink.c

368

ba5_write_4(struct pciide_softc *sc, bus_addr_t reg, uint32_t val)

sys/dev/pci/satalink.c

372

bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, reg, val);

sys/dev/pci/satalink.c

374

ba5_write_4_ind(sc, reg, val);

sys/dev/pci/satalink.c

377

#define BA5_WRITE_4(sc, chan, reg, val) \

sys/dev/pci/satalink.c

378

ba5_write_4((sc), satalink_ba5_regmap[(chan)].reg, (val))

sys/dev/pci/sdhc_pci.c

486

sdhc_pci_conf_write(struct pci_attach_args *pa, int reg, uint8_t val)

sys/dev/pci/sdhc_pci.c

492

r |= (val << ((reg & 0x3) * 8));

sys/dev/pci/sisfb.c

169

uint val;

sys/dev/pci/sisfb.c

171

val = bus_space_read_1(fb->iot, fb->ioh, CRTC_DATA);

sys/dev/pci/sisfb.c

173

printf("CRTC %04x -> %02x\n", idx, val);

sys/dev/pci/sisfb.c

175

return val;

sys/dev/pci/sisfb.c

179

sisfb_crtc_write(struct sisfb *fb, uint idx, uint val)

sys/dev/pci/sisfb.c

182

printf("CRTC %04x <- %02x\n", idx, val);

sys/dev/pci/sisfb.c

185

bus_space_write_1(fb->iot, fb->ioh, CRTC_DATA, val);

sys/dev/pci/sisfb.c

191

uint val;

sys/dev/pci/sisfb.c

193

val = bus_space_read_1(fb->iot, fb->ioh, SEQ_DATA);

sys/dev/pci/sisfb.c

195

printf("SEQ %04x -> %02x\n", idx, val);

sys/dev/pci/sisfb.c

197

return val;

sys/dev/pci/sisfb.c

201

sisfb_seq_write(struct sisfb *fb, uint idx, uint val)

sys/dev/pci/sisfb.c

204

printf("SEQ %04x <- %02x\n", idx, val);

sys/dev/pci/sisfb.c

207

bus_space_write_1(fb->iot, fb->ioh, SEQ_DATA, val);

sys/dev/pci/sv.c

1115

int val;

sys/dev/pci/sv.c

1123

val = (cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]

sys/dev/pci/sv.c

1129

reg |= val;

sys/dev/pci/sv.c

1134

reg |= val;

sys/dev/pci/sv.c

1180

int val, error;

sys/dev/pci/sv.c

1217

val = AUDIO_MAX_GAIN -

sys/dev/pci/sv.c

1222

[AUDIO_MIXER_LEVEL_LEFT] = val;

sys/dev/pci/sv.c

1228

val = AUDIO_MAX_GAIN -

sys/dev/pci/sv.c

1232

[AUDIO_MIXER_LEVEL_RIGHT] = val;

sys/dev/pci/sv.c

1235

[AUDIO_MIXER_LEVEL_MONO] = val;

sys/dev/pci/sv.c

201

sv_write(struct sv_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/sv.c

204

DPRINTFN(8,("sv_write(0x%x, 0x%x)\n", reg, val));

sys/dev/pci/sv.c

205

bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val);

sys/dev/pci/sv.c

211

uint8_t val;

sys/dev/pci/sv.c

213

val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, reg);

sys/dev/pci/sv.c

214

DPRINTFN(8,("sv_read(0x%x) = 0x%x\n", reg, val));

sys/dev/pci/sv.c

215

return val;

sys/dev/pci/sv.c

221

uint8_t val;

sys/dev/pci/sv.c

224

val = sv_read(sc, SV_CODEC_IDATA);

sys/dev/pci/sv.c

225

return val;

sys/dev/pci/sv.c

229

sv_write_indirect(struct sv_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/sv.c

238

sv_write(sc, SV_CODEC_IDATA, val);

sys/dev/pci/sv.c

586

uint32_t val;

sys/dev/pci/sv.c

592

val = play->sample_rate * 65536 / 48000;

sys/dev/pci/sv.c

602

if (val > 65535)

sys/dev/pci/sv.c

603

val = 65535;

sys/dev/pci/sv.c

606

sv_write_indirect(sc, SV_PCM_SAMPLE_RATE_0, val & 0xff);

sys/dev/pci/sv.c

607

sv_write_indirect(sc, SV_PCM_SAMPLE_RATE_1, val >> 8);

sys/dev/pci/tdvfb.c

796

tdvfb_cvg_write(struct tdvfb_softc *sc, uint32_t reg, uint32_t val)

sys/dev/pci/tdvfb.c

799

aprint_normal("cvg_write val %x to reg %x\n", val, reg);

sys/dev/pci/tdvfb.c

801

bus_space_write_4(sc->sc_cvgt, sc->sc_cvgh, reg, val);

sys/dev/pci/tdvfb.c

82

uint32_t val);

sys/dev/pci/tdvfb.c

835

tdvfb_cvg_dac_write(struct tdvfb_softc *sc, uint32_t reg, uint32_t val)

sys/dev/pci/tdvfb.c

839

wreg = ((reg & TDV_GENDAC_ADDRMASK) << 8) | val;

sys/dev/pci/tdvfb.c

842

aprint_normal("cvg_dac_write val %x to reg %x (%x)\n", val, reg,

sys/dev/pci/tdvfb.c

89

uint32_t val);

sys/dev/pci/tga.c

1377

tga_ramdac_wr(void *v, u_int btreg, uint8_t val)

sys/dev/pci/tga.c

1384

TGAWREG(dc, TGA_REG_EPDR, (btreg << 9) | (0 << 8 ) | val); /* XXX */

sys/dev/pci/tga.c

1389

tga2_ramdac_wr(void *v, u_int btreg, uint8_t val)

sys/dev/pci/tga.c

1399

bus_space_write_4(dc->dc_memt, ramdac, 0, val & 0xff);

sys/dev/pci/tga.c

1430

tga_bt463_wr(void *v, u_int btreg, uint8_t val)

sys/dev/pci/tga.c

1445

TGAWREG(dc, TGA_REG_EPDR, (btreg << 10) | 0x100 | val);

sys/dev/pci/tga.c

1447

TGAWREG(dc, TGA_REG_EPDR, (btreg << 10) | 0x000 | val);

sys/dev/pci/tga.c

1449

TGAWREG(dc, TGA_REG_EPDR, (btreg << 10) | 0x100 | val);

sys/dev/pci/tgavar.h

139

#define TGAWREG(dc,reg,val) bus_space_write_4((dc)->dc_memt, (dc)->dc_regs, \

sys/dev/pci/tgavar.h

140

(reg) << 2, (val))

sys/dev/pci/tgavar.h

143

#define TGAWALREG(dc,reg,alias,val) bus_space_write_4( \

sys/dev/pci/tgavar.h

146

(val))

sys/dev/pci/twa.c

418

twa_outl(struct twa_softc *sc, int off, uint32_t val)

sys/dev/pci/twa.c

421

bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val);

sys/dev/pci/twareg.h

101

(uint32_t)(val)); \

sys/dev/pci/twareg.h

105

#define TWA_WRITE_COMMAND_QUEUE_HIGH(sc, val) \

sys/dev/pci/twareg.h

108

(uint32_t)(((uint64_t)val)>>32)); \

sys/dev/pci/twareg.h

111

#define TWA_WRITE_COMMAND_QUEUE_LOW(sc, val) \

sys/dev/pci/twareg.h

114

(uint32_t)(val)); \

sys/dev/pci/twareg.h

88

#define TWA_WRITE_REGISTER(sc, offset, val) \

sys/dev/pci/twareg.h

89

bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, offset, (uint32_t)val)

sys/dev/pci/twareg.h

91

#define TWA_WRITE_COMMAND_QUEUE(sc, val) \

sys/dev/pci/twareg.h

96

(uint32_t)(val)); \

sys/dev/pci/twareg.h

98

(uint32_t)(((uint64_t)val)>>32)); \

sys/dev/pci/twe.c

280

twe_outl(struct twe_softc *sc, int off, u_int32_t val)

sys/dev/pci/twe.c

283

bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);

sys/dev/pci/ubsec.c

141

#define WRITE_REG(sc,reg,val) \

sys/dev/pci/ubsec.c

142

bus_space_write_4((sc)->sc_st, (sc)->sc_sh, reg, val)

sys/dev/pci/unichromeaccel.h

42

#define MMIO_OUT8(reg, val) \

sys/dev/pci/unichromeaccel.h

43

bus_space_write_1(sc->sc_memt, sc->sc_memh, reg, val)

sys/dev/pci/unichromeaccel.h

44

#define MMIO_OUT16(reg, val) \

sys/dev/pci/unichromeaccel.h

45

bus_space_write_2(sc->sc_memt, sc->sc_memh, reg, val)

sys/dev/pci/unichromeaccel.h

46

#define MMIO_OUT32(reg, val) \

sys/dev/pci/unichromeaccel.h

47

bus_space_write_4(sc->sc_memt, sc->sc_memh, reg, val)

sys/dev/pci/unichromefb.c

1014

int val, regnum;

sys/dev/pci/unichromefb.c

1037

val = IGA1_FIFO_DEPTH_SELECT_FORMULA(iga1_fifo_max_depth);

sys/dev/pci/unichromefb.c

1041

uni_load_reg(sc, val, regnum, reg, VIASR);

sys/dev/pci/unichromefb.c

1044

val = IGA1_FIFO_THRESHOLD_FORMULA(iga1_fifo_threshold);

sys/dev/pci/unichromefb.c

1047

uni_load_reg(sc, val, regnum, reg, VIASR);

sys/dev/pci/unichromefb.c

1050

val = IGA1_FIFO_HIGH_THRESHOLD_FORMULA(iga1_fifo_high_threshold);

sys/dev/pci/unichromefb.c

1053

uni_load_reg(sc, val, regnum, reg, VIASR);

sys/dev/pci/unichromefb.c

1056

val = IGA1_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA(iga1_display_queue_expire_num);

sys/dev/pci/unichromefb.c

1059

uni_load_reg(sc, val, regnum, reg, VIASR);

sys/dev/pci/unichromefb.c

1118

uint8_t val;

sys/dev/pci/unichromefb.c

1148

val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIARMisc);

sys/dev/pci/unichromefb.c

1149

val |= (BIT2+BIT3);

sys/dev/pci/unichromefb.c

1150

bus_space_write_1(sc->sc_iot, sc->sc_ioh, VIAWMisc, val);

sys/dev/pci/unichromefb.c

1375

uint32_t val;

sys/dev/pci/unichromefb.c

1377

val = MMIO_IN32(VIA_REG_CURSOR_MODE);

sys/dev/pci/unichromefb.c

1378

val |= 1;

sys/dev/pci/unichromefb.c

1379

MMIO_OUT32(VIA_REG_CURSOR_MODE, val);

sys/dev/pci/unichromefb.c

1387

uint32_t val;

sys/dev/pci/unichromefb.c

1389

val = MMIO_IN32(VIA_REG_CURSOR_MODE);

sys/dev/pci/unichromefb.c

1390

val &= 0xfffffffe;

sys/dev/pci/unichromefb.c

1391

MMIO_OUT32(VIA_REG_CURSOR_MODE, val);

sys/dev/pci/unichromefb.c

259

uint8_t val;

sys/dev/pci/unichromefb.c

288

val = uni_rd(sc, VIASR, SR30);

sys/dev/pci/unichromefb.c

289

sc->sc_fbaddr = val << 24;

sys/dev/pci/unichromefb.c

290

val = uni_rd(sc, VIASR, SR39);

sys/dev/pci/unichromefb.c

291

sc->sc_fbsize = val * (4*1024*1024);

sys/dev/pci/unichromefb.c

561

uni_wr(struct unichromefb_softc *sc, int off, uint8_t idx, uint8_t val)

sys/dev/pci/unichromefb.c

564

bus_space_write_1(sc->sc_iot, sc->sc_ioh, off + 1, val);

sys/dev/pci/unichromefb.c

569

uint8_t val, uint8_t mask)

sys/dev/pci/unichromefb.c

576

((val & mask) | (tmp & ~mask)));

sys/dev/pci/unichromefb.c

750

uint8_t val;

sys/dev/pci/unichromefb.c

767

val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIARMisc);

sys/dev/pci/unichromefb.c

771

(val & (~(BIT6+BIT7))) | (BIT6+BIT7));

sys/dev/pci/unichromefb.c

774

(val & (~(BIT6+BIT7))) | (BIT6));

sys/dev/pci/unichromefb.c

778

(val & (~(BIT6+BIT7))) | (BIT7));

sys/dev/pci/unichromefb.c

781

(val & (~(BIT6+BIT7))));

sys/dev/pci/unichromefb.c

809

int regnum, val;

sys/dev/pci/unichromefb.c

813

regnum = val = 0;

sys/dev/pci/unichromefb.c

823

val = IGA1_HOR_TOTAL_FORMULA(

sys/dev/pci/unichromefb.c

829

val = IGA1_HOR_ADDR_FORMULA(

sys/dev/pci/unichromefb.c

835

val = IGA1_HOR_BLANK_START_FORMULA(

sys/dev/pci/unichromefb.c

841

val = IGA1_HOR_BLANK_END_FORMULA(

sys/dev/pci/unichromefb.c

848

val = IGA1_HOR_SYNC_START_FORMULA(

sys/dev/pci/unichromefb.c

854

val = IGA1_HOR_SYNC_END_FORMULA(

sys/dev/pci/unichromefb.c

861

val = IGA1_VER_TOTAL_FORMULA(

sys/dev/pci/unichromefb.c

867

val = IGA1_VER_ADDR_FORMULA(

sys/dev/pci/unichromefb.c

873

val = IGA1_VER_BLANK_START_FORMULA(

sys/dev/pci/unichromefb.c

879

val = IGA1_VER_BLANK_END_FORMULA(

sys/dev/pci/unichromefb.c

886

val = IGA1_VER_SYNC_START_FORMULA(

sys/dev/pci/unichromefb.c

892

val = IGA1_VER_SYNC_END_FORMULA(

sys/dev/pci/unichromefb.c

911

uni_load_reg(sc, val, regnum, reg, VIACR);

sys/dev/pci/universe_pci.c

57

#define write_csr_4(d, reg, val) \

sys/dev/pci/universe_pci.c

58

bus_space_write_4(d->csrt, d->csrh, offsetof(struct universereg, reg), val)

sys/dev/pci/universe_pci.c

70

#define write_pcislv(d, idx, reg, val) \

sys/dev/pci/universe_pci.c

72

pcislvoffsets[idx] + offsetof(struct universe_pcislvimg, reg), val)

sys/dev/pci/universe_pci.c

85

#define write_vmeslv(d, idx, reg, val) \

sys/dev/pci/universe_pci.c

87

vmeslvoffsets[idx] + offsetof(struct universe_vmeslvimg, reg), val)

sys/dev/pci/veritefb.c

1075

veritefb_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/veritefb.c

1077

return i2c_bitbang_write_byte(cookie, val, flags,

sys/dev/pci/veritefb.c

3651

uint32_t val;

sys/dev/pci/veritefb.c

3663

val = veritefb_risc_readrf(sc, i);

sys/dev/pci/veritefb.c

3665

db_printf("%%%-3d 0x%08x%s%s%s", i, val,

sys/dev/pci/veritefb.c

404

vfb_write1(struct veritefb_softc *sc, bus_size_t reg, uint8_t val)

sys/dev/pci/veritefb.c

407

bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val);

sys/dev/pci/veritefb.c

411

val);

sys/dev/pci/veritefb.c

424

vfb_write4(struct veritefb_softc *sc, bus_size_t reg, uint32_t val)

sys/dev/pci/veritefb.c

427

bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);

sys/dev/pci/veritefb.c

431

val);

sys/dev/pci/veritefb.c

441

vfb_fb_write4(struct veritefb_softc *sc, bus_size_t off, uint32_t val)

sys/dev/pci/veritefb.c

443

bus_space_write_4(sc->sc_memt, sc->sc_memh, off, val);

sys/dev/pci/viaenv.c

154

val_to_uK(unsigned int val)

sys/dev/pci/viaenv.c

156

int i = val / 4;

sys/dev/pci/viaenv.c

157

int j = val % 4;

sys/dev/pci/viaenv.c

170

val_to_rpm(unsigned int val, int div)

sys/dev/pci/viaenv.c

173

if (val == 0)

sys/dev/pci/viaenv.c

176

return 1350000 / val / div;

sys/dev/pci/viaenv.c

180

val_to_uV(unsigned int val, int index)

sys/dev/pci/viaenv.c

187

return (25LL * val + 133) * mult[index] / 2628;

sys/dev/pci/virtio.c

170

#define DPRINTFR(n, fmt, val, index, num) \

sys/dev/pci/virtio.c

174

printf(") -> "); printf(fmt, val); printf("\n");

sys/dev/pci/virtio.c

179

#define DPRINTFR(n, fmt, val, index, num)

sys/dev/pci/virtio.c

189

uint8_t val;

sys/dev/pci/virtio.c

191

val = bus_space_read_1(iot, ioh, index);

sys/dev/pci/virtio.c

193

DPRINTFR("read_1", "%02x", val, index, 1);

sys/dev/pci/virtio.c

194

return val;

sys/dev/pci/virtio.c

202

uint16_t val;

sys/dev/pci/virtio.c

204

val = bus_space_read_2(iot, ioh, index);

sys/dev/pci/virtio.c

206

val = bswap16(val);

sys/dev/pci/virtio.c

208

DPRINTFR("read_2", "%04x", val, index, 2);

sys/dev/pci/virtio.c

213

return val;

sys/dev/pci/virtio.c

221

uint32_t val;

sys/dev/pci/virtio.c

223

val = bus_space_read_4(iot, ioh, index);

sys/dev/pci/virtio.c

225

val = bswap32(val);

sys/dev/pci/virtio.c

227

DPRINTFR("read_4", "%08x", val, index, 4);

sys/dev/pci/virtio.c

232

return val;

sys/dev/pci/virtio.c

249

uint64_t val;

sys/dev/pci/virtio.c

257

val = v.u64;

sys/dev/pci/virtio.c

260

val = bswap64(val);

sys/dev/pci/virtio.c

262

DPRINTFR("read_8", "%08"PRIx64, val, index, 8);

sys/dev/pci/virtio.c

271

return val;

sys/dev/pci/virtio.c

284

uint16_t val;

sys/dev/pci/virtio.c

286

val = bus_space_read_2(iot, ioh, index);

sys/dev/pci/virtio.c

294

val = bswap16(val);

sys/dev/pci/virtio.c

297

DPRINTFR("read_le_2", "%04x", val, index, 2);

sys/dev/pci/virtio.c

301

return val;

sys/dev/pci/virtio.c

309

uint32_t val;

sys/dev/pci/virtio.c

311

val = bus_space_read_4(iot, ioh, index);

sys/dev/pci/virtio.c

315

val = bswap32(val);

sys/dev/pci/virtio.c

318

DPRINTFR("read_le_4", "%08x", val, index, 4);

sys/dev/pci/virtio.c

322

return val;

sys/dev/pci/virtio.c

428

virtio_rw16(struct virtio_softc *sc, uint16_t val)

sys/dev/pci/virtio.c

431

return BYTE_ORDER != sc->sc_struct_endian ? bswap16(val) : val;

sys/dev/pci/virtio.c

435

virtio_rw32(struct virtio_softc *sc, uint32_t val)

sys/dev/pci/virtio.c

438

return BYTE_ORDER != sc->sc_struct_endian ? bswap32(val) : val;

sys/dev/pci/virtio.c

442

virtio_rw64(struct virtio_softc *sc, uint64_t val)

sys/dev/pci/virtio.c

445

return BYTE_ORDER != sc->sc_struct_endian ? bswap64(val) : val;

sys/dev/pci/virtiovar.h

261

uint16_t virtio_rw16(struct virtio_softc *sc, uint16_t val);

sys/dev/pci/virtiovar.h

262

uint32_t virtio_rw32(struct virtio_softc *sc, uint32_t val);

sys/dev/pci/virtiovar.h

263

uint64_t virtio_rw64(struct virtio_softc *sc, uint64_t val);

sys/dev/pci/voodoofb.c

1847

voodoofb_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/voodoofb.c

1849

return (i2c_bitbang_write_byte(cookie, val, flags, &voodoofb_i2cbb_ops));

sys/dev/pci/voodoofb.c

257

voodoo3_write32(struct voodoofb_softc *sc, uint32_t reg, uint32_t val)

sys/dev/pci/voodoofb.c

259

bus_space_write_4(sc->sc_regt, sc->sc_regh, reg, val);

sys/dev/pci/voodoofb.c

263

voodoo3_write32s(struct voodoofb_softc *sc, uint32_t reg, uint32_t val)

sys/dev/pci/voodoofb.c

265

bus_space_write_stream_4(sc->sc_regt, sc->sc_regh, reg, val);

sys/dev/pci/voodoofb.c

274

voodoo3_write_crtc(struct voodoofb_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/voodoofb.c

277

bus_space_write_1(sc->sc_ioregt, sc->sc_ioregh, CRTC_DATA - 0x300, val);

sys/dev/pci/voodoofb.c

281

voodoo3_write_seq(struct voodoofb_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/voodoofb.c

284

bus_space_write_1(sc->sc_ioregt, sc->sc_ioregh, SEQ_DATA - 0x300, val);

sys/dev/pci/voodoofb.c

288

voodoo3_write_gra(struct voodoofb_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/voodoofb.c

291

bus_space_write_1(sc->sc_ioregt, sc->sc_ioregh, GRA_DATA - 0x300, val);

sys/dev/pci/voodoofb.c

295

voodoo3_write_attr(struct voodoofb_softc *sc, uint8_t reg, uint8_t val)

sys/dev/pci/voodoofb.c

302

bus_space_write_1(sc->sc_ioregt, sc->sc_ioregh, ATT_IW - 0x300, val);

sys/dev/pci/voodoofb.c

307

vga_outb(struct voodoofb_softc *sc, uint32_t reg, uint8_t val)

sys/dev/pci/voodoofb.c

309

bus_space_write_1(sc->sc_ioregt, sc->sc_ioregh, reg - 0x300, val);

sys/dev/pci/voyager.c

351

voyager_i2c_write_byte(void *cookie, uint8_t val, int flags)

sys/dev/pci/voyager.c

355

ret = i2c_bitbang_write_byte(cookie, val, flags, &voyager_i2cbb_ops);

sys/dev/pci/voyager/vac.c

117

#define VAC_WRITE(sc, reg, val) \

sys/dev/pci/voyager/vac.c

118

bus_space_write_4((sc)->sc_memt, (sc)->sc_regh, (reg), (val))

sys/dev/pci/voyager/vac.c

170

vac_ac97_read(void *priv, uint8_t reg, uint16_t *val)

sys/dev/pci/voyager/vac.c

193

*val = (VAC_READ(sc, SM502_AC97_RX_DATA) & SM502_AC97_DATA_MASK) >> 4;

sys/dev/pci/voyager/vac.c

198

vac_ac97_write(void *priv, uint8_t reg, uint16_t val)

sys/dev/pci/voyager/vac.c

209

((uint32_t)val << 4) & SM502_AC97_DATA_MASK);

sys/dev/pci/voyager/voyagerfb.c

1805

uint32_t val;

sys/dev/pci/voyager/voyagerfb.c

1817

val = (xx & 0xffff) | (yy << 16);

sys/dev/pci/voyager/voyagerfb.c

1818

bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_CRSR_XY, val);

sys/dev/pci/voyager/voyagerfb.c

1851

uint32_t val;

sys/dev/pci/voyager/voyagerfb.c

1854

val = ((cur->cmap.red[i] & 0xf8) << 8) |

sys/dev/pci/voyager/voyagerfb.c

1860

val);

sys/dev/pci/voyager/voyagerfb.c

1870

val);

sys/dev/pci/voyager/voyagerfb.c

1873

val);

sys/dev/pci/xhci_pci.c

100

"USB3_PSSEN / Enabled USB3.0 ports under xHCI: 0x%08x\n", val);

sys/dev/pci/xhci_pci.c

106

val = pci_conf_read(psc->sc_pc, psc->sc_tag, PCI_XHCI_INTEL_USB2PRM);

sys/dev/pci/xhci_pci.c

109

"0x%08x\n", val);

sys/dev/pci/xhci_pci.c

110

pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_XHCI_INTEL_XUSB2PR, val);

sys/dev/pci/xhci_pci.c

111

val = pci_conf_read(psc->sc_pc, psc->sc_tag, PCI_XHCI_INTEL_XUSB2PR);

sys/dev/pci/xhci_pci.c

113

"XUSB2PR / USB2.0 ports under xHCI: 0x%08x\n", val);

sys/dev/pci/xhci_pci.c

87

pcireg_t val;

sys/dev/pci/xhci_pci.c

93

val = pci_conf_read(psc->sc_pc, psc->sc_tag, PCI_XHCI_INTEL_USB3PRM);

sys/dev/pci/xhci_pci.c

95

"USB3PRM / USB3.0 configurable ports: 0x%08x\n", val);

sys/dev/pci/xhci_pci.c

97

pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_XHCI_INTEL_USB3_PSSEN, val);

sys/dev/pci/xhci_pci.c

98

val = pci_conf_read(psc->sc_pc, psc->sc_tag,PCI_XHCI_INTEL_USB3_PSSEN);

sys/dev/pci/xmm7360.c

1067

u32 val;

sys/dev/pci/xmm7360.c

1071

val = qp->xmm->td_ring[qp->num*2].page_size;

sys/dev/pci/xmm7360.c

1072

if (copy_to_user((u32*)arg, &val, sizeof(u32)))

sys/dev/pckbport/alps.c

426

uint8_t *val)

sys/dev/pckbport/alps.c

445

*val = resp[2];

sys/dev/pckbport/alps.c

450

*val = 0;

sys/dev/pckbport/alps.c

459

uint8_t val)

sys/dev/pckbport/alps.c

467

nibble = __SHIFTOUT(val, __BITS(7, 4));

sys/dev/pckbport/alps.c

472

nibble = __SHIFTOUT(val, __BITS(3, 0));

sys/dev/pckbport/alps.c

654

uint8_t val;

sys/dev/pckbport/alps.c

662

if ((res = pms_alps_cm_read_1(psc->sc_kbctag, psc->sc_kbcslot, 0xc2d9, &val)) != 0) {

sys/dev/pckbport/alps.c

673

if ((res = pms_alps_cm_read_1(psc->sc_kbctag, psc->sc_kbcslot, 0xc2c4, &val)) != 0) {

sys/dev/pckbport/alps.c

677

val = val | __BIT(1);

sys/dev/pckbport/alps.c

678

nibble = __SHIFTOUT(val, __BITS(7, 4));

sys/dev/pckbport/alps.c

682

nibble = __SHIFTOUT(val, __BITS(3, 0));

sys/dev/pckbport/elantech.c

134

uint8_t *val)

sys/dev/pckbport/elantech.c

152

*val = resp[0];

sys/dev/pckbport/elantech.c

159

uint8_t val)

sys/dev/pckbport/elantech.c

174

cmd = val;

sys/dev/pckbport/elantech.c

185

uint8_t val;

sys/dev/pckbport/elantech.c

199

res = pms_elantech_read_1(psc->sc_kbctag, psc->sc_kbcslot, 0x10, &val);

sys/dev/pckbport/pckbd.c

1128

int val;

sys/dev/pckbport/pckbd.c

1131

val = pckbport_poll_data(t->t_kbctag, t->t_kbcslot);

sys/dev/pckbport/pckbd.c

1132

if (val == -1) {

sys/dev/pckbport/pckbd.c

1138

val = pckbd_scancode_translate(t, val);

sys/dev/pckbport/pckbd.c

1139

if (val == 0)

sys/dev/pckbport/pckbd.c

1142

if (pckbd_decode(t, val, type, data))

sys/dev/pckbport/pckbport.c

112

pckbport_send_devcmd(struct pckbport_tag *t, pckbport_slot_t slot, u_char val)

sys/dev/pckbport/pckbport.c

115

return t->t_ops->t_send_devcmd(t->t_cookie, slot, val);

sys/dev/pckbport/synaptics.c

266

synaptics_percentage(int val, int low, int high)

sys/dev/pckbport/synaptics.c

268

return ((val - low) * 100UL + high - low - 1) / (high - low);

sys/dev/pckbport/synaptics.c

444

uint val = SYN_CCAP_VALUE(resp);

sys/dev/pckbport/synaptics.c

449

switch (SYN_CCAP_CLICKPAD_TYPE(val)) {

sys/dev/pckbport/synaptics.c

464

if ((val & SYN_CCAP_HAS_ADV_GESTURE_MODE))

sys/dev/pckbport/synaptics.c

467

if ((val & SYN_CCAP_REPORT_MAX))

sys/dev/pckbport/synaptics.c

470

if ((val & SYN_CCAP_REPORT_MIN))

sys/dev/pcmcia/bt3c.c

559

uint32_t val = 0;

sys/dev/pcmcia/bt3c.c

562

val <<= 4;

sys/dev/pcmcia/bt3c.c

565

val += (*p - '0');

sys/dev/pcmcia/bt3c.c

567

val += (*p - 'a' + 0xa);

sys/dev/pcmcia/bt3c.c

569

val += (*p - 'A' + 0xa);

sys/dev/pcmcia/bt3c.c

577

return val;

sys/dev/pcmcia/esp_pcmcia.c

294

esp_pcmcia_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/dev/pcmcia/esp_pcmcia.c

297

uint8_t v = val;

sys/dev/pcmcia/if_malo_pcmciavar.h

36

#define MALO_WRITE_1(sc, reg, val) \

sys/dev/pcmcia/if_malo_pcmciavar.h

37

bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/pcmcia/if_malo_pcmciavar.h

38

#define MALO_WRITE_2(sc, reg, val) \

sys/dev/pcmcia/if_malo_pcmciavar.h

39

bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))

sys/dev/pcmcia/if_ray.c

383

#define REG_WRITE(sc, off, val) \

sys/dev/pcmcia/if_ray.c

384

bus_space_write_1((sc)->sc_ccrt, (sc)->sc_ccrh, ((sc)->sc_ccroff + (off)), (val))

sys/dev/pcmcia/if_ray.c

402

#define SRAM_WRITE_1(sc, off, val) \

sys/dev/pcmcia/if_ray.c

403

bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (off), (val))

sys/dev/pcmcia/if_xi.c

552

xi_mdi_read(device_t self, int phy, int reg, uint16_t *val)

sys/dev/pcmcia/if_xi.c

577

*val = data;

sys/dev/pcmcia/if_xi.c

583

xi_mdi_write(device_t self, int phy, int reg, uint16_t val)

sys/dev/pcmcia/if_xi.c

595

xi_mdi_pulse_bits(sc, val, 16); /* Write the data */

sys/dev/pcmcia/if_xi.c

599

("xi_mdi_write: phy %d reg %d val %04hx\n", phy, reg, val));

sys/dev/pcmcia/pcmcia.c

103

pcmcia_ccr_write(struct pcmcia_function *pf, int ccr, int val)

sys/dev/pcmcia/pcmcia.c

108

pf->pf_ccr_offset + ccr * 2, val);

sys/dev/podulebus/esp_podule.c

313

uint8_t val;

sys/dev/podulebus/esp_podule.c

315

val = CASTLE_ESP_READ(esc, reg);

sys/dev/podulebus/esp_podule.c

316

return val;

sys/dev/podulebus/esp_podule.c

320

castle_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/dev/podulebus/esp_podule.c

324

if (reg == NCR_CMD && val == (NCRCMD_TRANS | NCRCMD_DMA))

sys/dev/podulebus/esp_podule.c

325

val &= ~NCRCMD_DMA; /* DMA not support */

sys/dev/podulebus/esp_podule.c

326

CASTLE_ESP_WRITE(esc, reg, val);

sys/dev/podulebus/sec.c

131

dmac_write(struct sec_softc *sc, int reg, uint8_t val)

sys/dev/podulebus/sec.c

135

SEC_DMAC + DMAC(reg), val);

sys/dev/ppbus/lpt.c

626

int val, fl;

sys/dev/ppbus/lpt.c

640

val = mode_standard;

sys/dev/ppbus/lpt.c

643

val = mode_nibble;

sys/dev/ppbus/lpt.c

646

val = mode_ps2;

sys/dev/ppbus/lpt.c

649

val = mode_fast;

sys/dev/ppbus/lpt.c

652

val = mode_epp;

sys/dev/ppbus/lpt.c

655

val = mode_ecp;

sys/dev/ppbus/lpt.c

659

val = mode_unknown;

sys/dev/ppbus/lpt.c

662

*(int *)data = val;

sys/dev/ppbus/lpt.c

668

val = PPBUS_COMPATIBLE;

sys/dev/ppbus/lpt.c

671

val = PPBUS_NIBBLE;

sys/dev/ppbus/lpt.c

674

val = PPBUS_PS2;

sys/dev/ppbus/lpt.c

677

val = PPBUS_FAST;

sys/dev/ppbus/lpt.c

680

val = PPBUS_EPP;

sys/dev/ppbus/lpt.c

683

val = PPBUS_ECP;

sys/dev/ppbus/lpt.c

687

val = mode_unknown;

sys/dev/ppbus/lpt.c

692

error = ppbus_set_mode(device_parent(dev), val, 0);

sys/dev/ppbus/lpt.c

700

error = ppbus_read_ivar(device_parent(dev), PPBUS_IVAR_DMA, &val);

sys/dev/ppbus/lpt.c

703

if (val)

sys/dev/ppbus/lpt.c

707

error = ppbus_read_ivar(device_parent(dev), PPBUS_IVAR_IEEE, &val);

sys/dev/ppbus/lpt.c

710

if (val)

sys/dev/ppbus/lpt.c

714

error = ppbus_read_ivar(device_parent(dev), PPBUS_IVAR_INTR, &val);

sys/dev/ppbus/lpt.c

717

if (val)

sys/dev/ppbus/lpt.c

730

val = (fl & LPT_DMA);

sys/dev/ppbus/lpt.c

731

error = ppbus_write_ivar(device_parent(dev), PPBUS_IVAR_DMA, &val);

sys/dev/ppbus/lpt.c

736

val = (fl & LPT_IEEE);

sys/dev/ppbus/lpt.c

737

error = ppbus_write_ivar(device_parent(dev), PPBUS_IVAR_IEEE, &val);

sys/dev/ppbus/lpt.c

742

val = (fl & LPT_INTR);

sys/dev/ppbus/lpt.c

743

error = ppbus_write_ivar(device_parent(dev), PPBUS_IVAR_INTR, &val);

sys/dev/ppbus/ppbus_base.c

106

return (bus->ppbus_write_ivar(device_parent(dev), index, val));

sys/dev/ppbus/ppbus_base.c

109

bus->sc_use_ieee = ((*val != 0) ? PPBUS_ENABLE_IEEE :

sys/dev/ppbus/ppbus_base.c

74

ppbus_read_ivar(device_t dev, int index, unsigned int * val)

sys/dev/ppbus/ppbus_base.c

83

return (bus->ppbus_read_ivar(device_parent(dev), index, val));

sys/dev/ppbus/ppbus_base.c

86

*val = (bus->sc_use_ieee == PPBUS_ENABLE_IEEE) ? 1 : 0;

sys/dev/ppbus/ppbus_base.c

98

ppbus_write_ivar(device_t dev, int index, unsigned int * val)

sys/dev/ppbus/ppbus_conf.c

161

int val = 0;

sys/dev/ppbus/ppbus_conf.c

162

if(ppbus_write_ivar(self, PPBUS_IVAR_INTR, &val) != 0) {

sys/dev/qbus/dhu.c

141

#define DHU_WRITE_WORD(reg, val) \

sys/dev/qbus/dhu.c

142

bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val)

sys/dev/qbus/dhu.c

145

#define DHU_WRITE_BYTE(reg, val) \

sys/dev/qbus/dhu.c

146

bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val)

sys/dev/qbus/dl.c

177

#define DL_WRITE_WORD(reg, val) \

sys/dev/qbus/dl.c

178

bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val)

sys/dev/qbus/dl.c

179

#define DL_WRITE_BYTE(reg, val) \

sys/dev/qbus/dl.c

180

bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val)

sys/dev/qbus/if_de.c

179

#define DE_WCSR(csr, val) \

sys/dev/qbus/if_de.c

180

bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/qbus/if_de.c

181

#define DE_WLOW(val) \

sys/dev/qbus/if_de.c

182

bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0, val)

sys/dev/qbus/if_de.c

183

#define DE_WHIGH(val) \

sys/dev/qbus/if_de.c

184

bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0 + 1, val)

sys/dev/qbus/if_dmc.c

83

#define DMC_WBYTE(csr, val) \

sys/dev/qbus/if_dmc.c

84

bus_space_write_1(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/qbus/if_dmc.c

85

#define DMC_WWORD(csr, val) \

sys/dev/qbus/if_dmc.c

86

bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/qbus/if_il.c

129

#define IL_WCSR(csr, val) \

sys/dev/qbus/if_il.c

130

bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/qbus/if_qe.c

111

#define QE_WCSR(csr, val) \

sys/dev/qbus/if_qe.c

112

bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/qbus/if_qt.c

189

#define QT_WCSR(csr, val) \

sys/dev/qbus/if_qt.c

190

bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/qbus/qd.c

541

#define QD_WCSR(reg, val) \

sys/dev/qbus/qd.c

542

bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val)

sys/dev/qbus/rl.c

120

#define RL_WREG(reg, val) \

sys/dev/qbus/rl.c

121

bus_space_write_2(sc->sc_iot, sc->sc_ioh, (reg), (val))

sys/dev/qbus/ts.c

141

#define TS_WCSR(csr, val) \

sys/dev/qbus/ts.c

142

bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)

sys/dev/raidframe/rf_driver.c

127

static void set_debug_option(char *name, long val);

sys/dev/raidframe/rf_driver.c

869

set_debug_option(char *name, long val)

sys/dev/raidframe/rf_driver.c

875

*(p->ptr) = val;

sys/dev/raidframe/rf_driver.c

876

printf("[Set debug variable %s to %ld]\n", name, val);

sys/dev/raidframe/rf_driver.c

890

long val;

sys/dev/raidframe/rf_driver.c

900

val = rf_htoi(val_p + 2);

sys/dev/raidframe/rf_driver.c

902

val = rf_atoi(val_p);

sys/dev/raidframe/rf_driver.c

904

set_debug_option(name_p, val);

sys/dev/raidframe/rf_geniq.c

112

val = j;

sys/dev/raidframe/rf_geniq.c

114

val = lsfr_shift(val, 5);

sys/dev/raidframe/rf_geniq.c

115

rf_qfor[i][j] = val;

sys/dev/raidframe/rf_geniq.c

116

printf("%d, ", val);

sys/dev/raidframe/rf_geniq.c

47

lsfr_shift(unsigned val, unsigned poly)

sys/dev/raidframe/rf_geniq.c

51

unsigned high = (val >> 4) & 1;

sys/dev/raidframe/rf_geniq.c

57

bit = (val >> (i - 1)) & 1;

sys/dev/raidframe/rf_geniq.c

73

unsigned int val;

sys/dev/raidframe/rf_hist.h

48

RF_Hist_t val; \

sys/dev/raidframe/rf_hist.h

49

val = ((RF_Hist_t)(_val_)) / 1000; \

sys/dev/raidframe/rf_hist.h

50

if (val >= RF_HIST_MAX_VAL) \

sys/dev/raidframe/rf_hist.h

53

_hist_[(val - RF_HIST_MIN_VAL) / RF_HIST_RESOLUTION]++; \

sys/dev/raidframe/rf_states.c

402

int val;

sys/dev/raidframe/rf_states.c

405

val = rf_ForceOrBlockRecon(raidPtr, asm_p,

sys/dev/raidframe/rf_states.c

407

if (val == 0) {

sys/dev/raidframe/rf_utils.c

114

int val = 0, negate = 0;

sys/dev/raidframe/rf_utils.c

121

val = 10 * val + (*p - '0');

sys/dev/raidframe/rf_utils.c

122

return ((negate) ? -val : val);

sys/dev/raidframe/rf_utils.c

128

int val = 0;

sys/dev/raidframe/rf_utils.c

130

val = 16 * val + HC2INT(*p);

sys/dev/raidframe/rf_utils.c

131

return (val);

sys/dev/rasops/rasops.h

223

rasops_memset32(void *p, uint32_t val, size_t bytes)

sys/dev/rasops/rasops.h

229

*dp = val;

sys/dev/rasops/rasops.h

238

*dp++ = val;

sys/dev/rasops/rasops.h

241

*(uint16_t *)dp = val;

sys/dev/rasops/rasops.h

246

*(uint32_t *)dp = val;

sys/dev/rasops/rasops.h

251

*(uint16_t *)dp = val;

sys/dev/rasops/rasops.h

256

*dp = val;

sys/dev/sbus/agten.c

190

agten_write_dac(struct agten_softc *sc, int reg, uint8_t val)

sys/dev/sbus/agten.c

193

0x200 + (reg << 2), (uint32_t)val << 16);

sys/dev/sbus/agten.c

206

agten_write_dac_10(struct agten_softc *sc, int reg, uint16_t val)

sys/dev/sbus/agten.c

208

agten_write_dac(sc, reg, (val >> 2) & 0xff);

sys/dev/sbus/agten.c

209

agten_write_dac(sc, reg, (val & 0x3) << 6);

sys/dev/sbus/be.c

1281

be_mii_readreg(device_t self, int phy, int reg, uint16_t *val)

sys/dev/sbus/be.c

1306

*val = data;

sys/dev/sbus/be.c

1311

be_mii_writereg(device_t self, int phy, int reg, uint16_t val)

sys/dev/sbus/be.c

1329

be_tcvr_write_bit(sc, phy, (val >> i) & 1);

sys/dev/sbus/dbri.c

1012

val = DBRI_PIO_ENABLE_ALL | DBRI_PIO1; /* was PIO1 */

sys/dev/sbus/dbri.c

1015

val |= (sc->sc_mm.onboard ? DBRI_PIO0 : DBRI_PIO2);

sys/dev/sbus/dbri.c

1017

bus_space_write_4(iot, ioh, DBRI_REG2, val);

sys/dev/sbus/dbri.c

1106

int val;

sys/dev/sbus/dbri.c

1112

val = DBRI_DTS_VI | DBRI_DTS_INS | DBRI_DTS_PRVIN(16) | DBRI_PIPE(16);

sys/dev/sbus/dbri.c

1113

*(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);

sys/dev/sbus/dbri.c

1117

val = DBRI_DTS_VO | DBRI_DTS_INS | DBRI_DTS_PRVOUT(16) | DBRI_PIPE(16);

sys/dev/sbus/dbri.c

1118

*(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);

sys/dev/sbus/dbri.c

1497

int val;

sys/dev/sbus/dbri.c

1554

val = DBRI_DTS_VI | DBRI_DTS_INS | DBRI_DTS_PRVIN(prevpipe);

sys/dev/sbus/dbri.c

1555

val |= pipe;

sys/dev/sbus/dbri.c

1556

*(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);

sys/dev/sbus/dbri.c

1562

val = DBRI_DTS_VO | DBRI_DTS_INS | DBRI_DTS_PRVOUT(prevpipe);

sys/dev/sbus/dbri.c

1563

val |= pipe;

sys/dev/sbus/dbri.c

1564

*(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);

sys/dev/sbus/dbri.c

690

int val = DBRI_INTR_GETVAL(i);

sys/dev/sbus/dbri.c

716

val);

sys/dev/sbus/dbri.c

718

val = reverse_bytes(val, sc->sc_pipe[channel].length);

sys/dev/sbus/dbri.c

720

*(sc->sc_pipe[channel].prec) = val;

sys/dev/sbus/dbri.c

986

uint32_t val;

sys/dev/sbus/if_le.c

101

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/sbus/if_le.c

108

bus_space_write_2(t, h, LEREG1_RDP, val);

sys/dev/sbus/if_le_lebuffer.c

104

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/sbus/if_le_lebuffer.c

111

bus_space_write_2(t, h, LEREG1_RDP, val);

sys/dev/sbus/if_le_ledma.c

123

lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val)

sys/dev/sbus/if_le_ledma.c

130

bus_space_write_2(t, h, LEREG1_RDP, val);

sys/dev/sbus/isp_sbus.c

331

isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)

sys/dev/sbus/isp_sbus.c

336

bus_space_write_2(sbc->sbus_bustag, sbc->sbus_reg, offset, val);

sys/dev/sbus/mgx.c

176

mgx_write_vga(struct mgx_softc *sc, uint32_t reg, uint8_t val)

sys/dev/sbus/mgx.c

178

bus_space_write_1(sc->sc_tag, sc->sc_vgah, reg ^ 3, val);

sys/dev/sbus/mgx.c

188

mgx_write_1(struct mgx_softc *sc, uint32_t reg, uint8_t val)

sys/dev/sbus/mgx.c

190

bus_space_write_1(sc->sc_tag, sc->sc_blith, reg ^ 3, val);

sys/dev/sbus/mgx.c

208

mgx_write_2(struct mgx_softc *sc, uint32_t reg, uint16_t val)

sys/dev/sbus/mgx.c

210

bus_space_write_2(sc->sc_tag, sc->sc_blith, reg ^ 2, val);

sys/dev/sbus/mgx.c

214

mgx_write_4(struct mgx_softc *sc, uint32_t reg, uint32_t val)

sys/dev/sbus/mgx.c

216

bus_space_write_4(sc->sc_tag, sc->sc_blith, reg, val);

sys/dev/sbus/p9100.c

915

p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val)

sys/dev/sbus/p9100.c

919

p9100_ramdac_write(sc, DAC_INDX_DATA, val);

sys/dev/sbus/spif.c

959

stty_write_ccr(struct spif_softc *sc, uint8_t val)

sys/dev/sbus/spif.c

967

STC_WRITE(sc, STC_CCR, val);

sys/dev/scsipi/scsi_spc.h

536

uint8_t val[2];

sys/dev/scsipi/scsi_spc.h

542

uint8_t val[2];

sys/dev/scsipi/scsi_spc.h

548

uint8_t val[2];

sys/dev/scsipi/scsi_spc.h

557

uint8_t val[2];

sys/dev/scsipi/scsipiconf.h

771

_lto2b(u_int32_t val, u_int8_t *bytes)

sys/dev/scsipi/scsipiconf.h

774

bytes[0] = (val >> 8) & 0xff;

sys/dev/scsipi/scsipiconf.h

775

bytes[1] = val & 0xff;

sys/dev/scsipi/scsipiconf.h

779

_lto3b(u_int32_t val, u_int8_t *bytes)

sys/dev/scsipi/scsipiconf.h

782

bytes[0] = (val >> 16) & 0xff;

sys/dev/scsipi/scsipiconf.h

783

bytes[1] = (val >> 8) & 0xff;

sys/dev/scsipi/scsipiconf.h

784

bytes[2] = val & 0xff;

sys/dev/scsipi/scsipiconf.h

788

_lto4b(u_int32_t val, u_int8_t *bytes)

sys/dev/scsipi/scsipiconf.h

791

bytes[0] = (val >> 24) & 0xff;

sys/dev/scsipi/scsipiconf.h

792

bytes[1] = (val >> 16) & 0xff;

sys/dev/scsipi/scsipiconf.h

793

bytes[2] = (val >> 8) & 0xff;

sys/dev/scsipi/scsipiconf.h

794

bytes[3] = val & 0xff;

sys/dev/scsipi/scsipiconf.h

798

_lto8b(u_int64_t val, u_int8_t *bytes)

sys/dev/scsipi/scsipiconf.h

801

bytes[0] = (val >> 56) & 0xff;

sys/dev/scsipi/scsipiconf.h

802

bytes[1] = (val >> 48) & 0xff;

sys/dev/scsipi/scsipiconf.h

803

bytes[2] = (val >> 40) & 0xff;

sys/dev/scsipi/scsipiconf.h

804

bytes[3] = (val >> 32) & 0xff;

sys/dev/scsipi/scsipiconf.h

805

bytes[4] = (val >> 24) & 0xff;

sys/dev/scsipi/scsipiconf.h

806

bytes[5] = (val >> 16) & 0xff;

sys/dev/scsipi/scsipiconf.h

807

bytes[6] = (val >> 8) & 0xff;

sys/dev/scsipi/scsipiconf.h

808

bytes[7] = val & 0xff;

sys/dev/scsipi/scsipiconf.h

874

_lto2l(u_int32_t val, u_int8_t *bytes)

sys/dev/scsipi/scsipiconf.h

877

bytes[0] = val & 0xff;

sys/dev/scsipi/scsipiconf.h

878

bytes[1] = (val >> 8) & 0xff;

sys/dev/scsipi/scsipiconf.h

882

_lto3l(u_int32_t val, u_int8_t *bytes)

sys/dev/scsipi/scsipiconf.h

885

bytes[0] = val & 0xff;

sys/dev/scsipi/scsipiconf.h

886

bytes[1] = (val >> 8) & 0xff;

sys/dev/scsipi/scsipiconf.h

887

bytes[2] = (val >> 16) & 0xff;

sys/dev/scsipi/scsipiconf.h

891

_lto4l(u_int32_t val, u_int8_t *bytes)

sys/dev/scsipi/scsipiconf.h

894

bytes[0] = val & 0xff;

sys/dev/scsipi/scsipiconf.h

895

bytes[1] = (val >> 8) & 0xff;

sys/dev/scsipi/scsipiconf.h

896

bytes[2] = (val >> 16) & 0xff;

sys/dev/scsipi/scsipiconf.h

897

bytes[3] = (val >> 24) & 0xff;

sys/dev/sdmmc/if_bwfm_sdio.c

1344

uint8_t val;

sys/dev/sdmmc/if_bwfm_sdio.c

1420

tmp |= __SHIFTIN(tab[i].val, mask);

sys/dev/sdmmc/if_bwfm_sdio.c

895

uint32_t val;

sys/dev/sdmmc/if_bwfm_sdio.c

898

val = bwfm_sdio_read_4(sc, core->co_base + reg);

sys/dev/sdmmc/if_bwfm_sdio.c

901

return val;

sys/dev/sdmmc/if_bwfm_sdio.c

905

bwfm_sdio_dev_write(struct bwfm_sdio_softc *sc, uint32_t reg, uint32_t val)

sys/dev/sdmmc/if_bwfm_sdio.c

910

bwfm_sdio_write_4(sc, core->co_base + reg, val);

sys/dev/sdmmc/if_bwfm_sdio.c

917

uint32_t val;

sys/dev/sdmmc/if_bwfm_sdio.c

920

val = bwfm_sdio_read_4(sc, reg);

sys/dev/sdmmc/if_bwfm_sdio.c

924

return val;

sys/dev/sdmmc/if_bwfm_sdio.c

928

bwfm_sdio_buscore_write(struct bwfm_softc *bwfm, uint32_t reg, uint32_t val)

sys/dev/sdmmc/if_bwfm_sdio.c

933

bwfm_sdio_write_4(sc, reg, val);

sys/dev/sdmmc/if_bwi_sdio.c

298

bwi_sdio_conf_write(void *priv, uint32_t reg, uint32_t val)

sys/dev/sdmmc/if_bwi_sdio.c

305

if (reg == BWI_PCIR_SEL_REGWIN && ssc->sc_sel_regwin != val) {

sys/dev/sdmmc/if_bwi_sdio.c

307

(val >> 8) & 0x80);

sys/dev/sdmmc/if_bwi_sdio.c

309

(val >> 16) & 0xff);

sys/dev/sdmmc/if_bwi_sdio.c

311

(val >> 24) & 0xff);

sys/dev/sdmmc/if_bwi_sdio.c

312

ssc->sc_sel_regwin = val;

sys/dev/sdmmc/if_bwi_sdio.c

358

bwi_sdio_reg_write_2(void *priv, uint32_t reg, uint16_t val)

sys/dev/sdmmc/if_bwi_sdio.c

362

val = htole16(val);

sys/dev/sdmmc/if_bwi_sdio.c

365

sdmmc_io_write_2(ssc->sc_sf, BWI_SDIO_REG_OFFSET(ssc, reg), val);

sys/dev/sdmmc/if_bwi_sdio.c

407

uint16_t val;

sys/dev/sdmmc/if_bwi_sdio.c

416

val = sdmmc_io_read_2(ssc->sc_sf, BWI_SDIO_REG_OFFSET(ssc, reg));

sys/dev/sdmmc/if_bwi_sdio.c

419

val = le16toh(val);

sys/dev/sdmmc/if_bwi_sdio.c

421

return val;

sys/dev/sdmmc/if_bwi_sdio.c

425

bwi_sdio_reg_write_4(void *priv, uint32_t reg, uint32_t val)

sys/dev/sdmmc/if_bwi_sdio.c

429

val = htole32(val);

sys/dev/sdmmc/if_bwi_sdio.c

433

BWI_SDIO_REG_OFFSET(ssc, reg) | BWI_SDIO_REG_32BIT_ACCESS, val);

sys/dev/sdmmc/if_bwi_sdio.c

443

uint32_t val;

sys/dev/sdmmc/if_bwi_sdio.c

446

val = sdmmc_io_read_4(ssc->sc_sf,

sys/dev/sdmmc/if_bwi_sdio.c

450

val = le32toh(val);

sys/dev/sdmmc/if_bwi_sdio.c

452

return val;

sys/dev/sdmmc/sbt.c

40

#define CSR_WRITE_1(sc, reg, val) sdmmc_io_write_1((sc)->sc_sf, (reg), (val))

sys/dev/sdmmc/sdhc.c

133

hwrite1(struct sdhc_host *hp, bus_size_t o, uint8_t val)

sys/dev/sdmmc/sdhc.c

137

bus_space_write_1(hp->iot, hp->ioh, o, val);

sys/dev/sdmmc/sdhc.c

142

tmp = (val << shift) | (tmp & ~(0xffU << shift));

sys/dev/sdmmc/sdhc.c

148

hwrite2(struct sdhc_host *hp, bus_size_t o, uint16_t val)

sys/dev/sdmmc/sdhc.c

152

bus_space_write_2(hp->iot, hp->ioh, o, val);

sys/dev/sdmmc/sdhc.c

157

tmp = (val << shift) | (tmp & ~(0xffffU << shift));

sys/dev/sdmmc/sdhc.c

163

hwrite4(struct sdhc_host *hp, bus_size_t o, uint32_t val)

sys/dev/sdmmc/sdhc.c

166

bus_space_write_4(hp->iot, hp->ioh, o, val);

sys/dev/sdmmc/sdhc.c

169

#define HWRITE1(hp, reg, val) hwrite1(hp, reg, val)

sys/dev/sdmmc/sdhc.c

170

#define HWRITE2(hp, reg, val) hwrite2(hp, reg, val)

sys/dev/sdmmc/sdhc.c

171

#define HWRITE4(hp, reg, val) hwrite4(hp, reg, val)

sys/dev/sdmmc/sdhc.c

2523

sdhc_host_write_1(struct sdhc_host *hp, int reg, uint8_t val)

sys/dev/sdmmc/sdhc.c

2525

HWRITE1(hp, reg, val);

sys/dev/sdmmc/sdhc.c

2529

sdhc_host_write_2(struct sdhc_host *hp, int reg, uint16_t val)

sys/dev/sdmmc/sdhc.c

2531

HWRITE2(hp, reg, val);

sys/dev/sdmmc/sdhc.c

2535

sdhc_host_write_4(struct sdhc_host *hp, int reg, uint32_t val)

sys/dev/sdmmc/sdhc.c

2537

HWRITE4(hp, reg, val);

sys/dev/smbios_platform.c

220

platform_add_word(struct smbtable *tbl, const char *key, uint16_t val,

sys/dev/smbios_platform.c

225

if (snprintf(tmpbuf, sizeof(tmpbuf), "%u%s", val, suf)) {

sys/dev/spi/mcp23xxxgpio_spi.c

154

uint8_t reg, uint8_t val)

sys/dev/spi/mcp23xxxgpio_spi.c

163

buf[2] = val;

sys/dev/spi/mcp23xxxgpio_spi.c

212

uint32_t val;

sys/dev/spi/mcp23xxxgpio_spi.c

223

&val) != 0 ||

sys/dev/spi/mcp23xxxgpio_spi.c

224

of_getprop_uint32(phandle, "mcp,spi-present-mask", &val) != 0) {

sys/dev/spi/mcp23xxxgpio_spi.c

229

return val;

sys/dev/spi/mcp3k.c

421

int32_t val, scale;

sys/dev/spi/mcp3k.c

468

val = (buf[0] << 8) | buf[1];

sys/dev/spi/mcp3k.c

469

val = (val >> (16 - (model->bits + model->lead))) & sc->sc_adc_max;

sys/dev/spi/mcp3k.c

473

if (val & (1 << (model->bits - 1)))

sys/dev/spi/mcp3k.c

474

val -= sc->sc_adc_max + 1;

sys/dev/spi/mcp3k.c

479

edata->value_cur = (sc->sc_vref_mv * val / scale) * 1000;

sys/dev/spi/oj6sh.c

280

oj6sh_write(spi_handle_t spi, uint8_t reg, uint8_t val)

sys/dev/spi/oj6sh.c

282

uint8_t tmp[2] = {reg | 0x80, val};

sys/dev/spi/oj6sh.c

285

DPRINTF(4,("%s: 0x%02x = 0x%02x\n", __func__, reg, val));

sys/dev/spi/sc16is7xxspi.c

173

sc16is7xx_spi_com_write_1(struct com_regs *regs, u_int reg, uint8_t val)

sys/dev/spi/sc16is7xxspi.c

183

reg, regs->cr_channel, &val, 1);

sys/dev/spi/tmp121.c

148

int val;

sys/dev/spi/tmp121.c

168

val = sreg * 62500 + 273150000;

sys/dev/spi/tmp121.c

170

edata->value_cur = val;

sys/dev/spkr.c

181

playtone(struct spkr_softc *sc, int note, int val, int sustain)

sys/dev/spkr.c

192

val *= DENOM_MULT;

sys/dev/spkr.c

196

total = whole / val;

sys/dev/stbi/stb_image.c

1412

int i,val[64],*v=val;

sys/dev/stbi/stb_image.c

1445

for (i=0, v=val, o=out; i < 8; ++i,v+=8,o+=out_stride) {

sys/dev/stbi/stb_image.c

3990

uint8 val;

sys/dev/stbi/stb_image.c

3995

val = get8u(s);

sys/dev/stbi/stb_image.c

3998

*p = val;

sys/dev/std/ieee1212.c

1086

printf("0x%08x\n", key->val);

sys/dev/std/ieee1212.c

1268

p1212_validate_offset(u_int16_t val, u_int32_t mask)

sys/dev/std/ieee1212.c

1270

if ((val == P1212_KEYVALUE_Node_Units_Extent) ||

sys/dev/std/ieee1212.c

1271

(val == P1212_KEYVALUE_Node_Memory_Extent) ||

sys/dev/std/ieee1212.c

1273

((val == P1212_KEYVALUE_Unit_Dependent_Info) ||

sys/dev/std/ieee1212.c

1274

(val == P1212_KEYVALUE_Node_Dependent_Info) ||

sys/dev/std/ieee1212.c

1275

(val == P1212_KEYVALUE_Module_Dependent_Info))))

sys/dev/std/ieee1212.c

1281

p1212_validate_immed(u_int16_t val, u_int32_t mask)

sys/dev/std/ieee1212.c

1283

switch (val) {

sys/dev/std/ieee1212.c

1293

((val == P1212_KEYVALUE_Module_Dependent_Info) ||

sys/dev/std/ieee1212.c

1294

(val == P1212_KEYVALUE_Node_Dependent_Info) ||

sys/dev/std/ieee1212.c

1295

(val == P1212_KEYVALUE_Unit_Dependent_Info)))

sys/dev/std/ieee1212.c

1306

p1212_validate_leaf(u_int16_t val, u_int32_t mask)

sys/dev/std/ieee1212.c

1308

switch(val) {

sys/dev/std/ieee1212.c

1325

p1212_validate_dir(u_int16_t val, u_int32_t mask)

sys/dev/std/ieee1212.c

1327

switch(val) {

sys/dev/std/ieee1212.c

1337

(val == P1212_KEYVALUE_Module_Vendor_Id))

sys/dev/std/ieee1212.c

168

val = P1212_DIRENT_GET_VALUE((ntohl(t[offset+i])));

sys/dev/std/ieee1212.c

182

test = offset + i + val + 1;

sys/dev/std/ieee1212.c

210

test = offset + i + val + 1;

sys/dev/std/ieee1212.c

336

rom->root->com.key.val = 0;

sys/dev/std/ieee1212.c

356

u_int8_t type, val;

sys/dev/std/ieee1212.c

395

if ((dir->parent == NULL) && dir->com.key.val) {

sys/dev/std/ieee1212.c

397

" 0x0\n", dir->com.key.val));

sys/dev/std/ieee1212.c

404

val = P1212_DIRENT_GET_KEYVALUE(desc);

sys/dev/std/ieee1212.c

418

switch (val) {

sys/dev/std/ieee1212.c

427

p1212_keyvalue_strings[val]));

sys/dev/std/ieee1212.c

432

if (dir->com.key.val ==

sys/dev/std/ieee1212.c

436

p1212_keyvalue_strings[val]));

sys/dev/std/ieee1212.c

444

if (p1212_validate_immed(val, mask)) {

sys/dev/std/ieee1212.c

448

p1212_keyvalue_strings[val],

sys/dev/std/ieee1212.c

454

if (p1212_validate_offset(val, mask)) {

sys/dev/std/ieee1212.c

458

p1212_keyvalue_strings[val],

sys/dev/std/ieee1212.c

464

if (p1212_validate_leaf(val, mask)) {

sys/dev/std/ieee1212.c

468

p1212_keyvalue_strings[val],

sys/dev/std/ieee1212.c

474

if (p1212_validate_dir(val, mask)) {

sys/dev/std/ieee1212.c

478

p1212_keyvalue_strings[val],

sys/dev/std/ieee1212.c

491

if (val == P1212_KEYVALUE_Module_Vendor_Id) {

sys/dev/std/ieee1212.c

495

if (val == P1212_KEYVALUE_Node_Capabilities) {

sys/dev/std/ieee1212.c

499

if (val == P1212_KEYVALUE_Unit_Sw_Version)

sys/dev/std/ieee1212.c

502

if (val == P1212_KEYVALUE_Unit_Location)

sys/dev/std/ieee1212.c

512

if (val == P1212_KEYVALUE_Module_Sw_Version) {

sys/dev/std/ieee1212.c

528

if (val == P1212_KEYVALUE_Node_Sw_Version) {

sys/dev/std/ieee1212.c

544

if (val == P1212_KEYVALUE_Unit_Directory) {

sys/dev/std/ieee1212.c

566

if (val == P1212_KEYVALUE_Textual_Descriptor) {

sys/dev/std/ieee1212.c

609

(val != P1212_KEYVALUE_Textual_Descriptor)) {

sys/dev/std/ieee1212.c

613

data->com.key.key_value = val;

sys/dev/std/ieee1212.c

616

data->com.key.val =

sys/dev/std/ieee1212.c

629

data->val = data->com.key.val;

sys/dev/std/ieee1212.c

635

leafoff = i + data->com.key.val;

sys/dev/std/ieee1212.c

650

sdir->com.key.key_value = val;

sys/dev/std/ieee1212.c

653

sdir->com.key.val =

sys/dev/std/ieee1212.c

656

sdir->match = sdir->com.key.val + i;

sys/dev/std/ieee1212.c

751

u_int8_t type, val;

sys/dev/std/ieee1212.c

778

val = P1212_DIRENT_GET_KEYVALUE(entry);

sys/dev/std/ieee1212.c

780

(val != P1212_KEYVALUE_Textual_Descriptor)) {

sys/dev/std/ieee1212.c

785

p1212_keyvalue_strings[val], &t[i]-&addr[0]));

sys/dev/std/ieee1212.c

89

int complete, i, numdirs, type, val, *dirs;

sys/dev/std/ieee1212var.h

41

u_int32_t val;

sys/dev/std/ieee1212var.h

65

u_int32_t val;

sys/dev/sun/pfour_subr.c

137

volatile u_int32_t val, save, *pfour = va;

sys/dev/sun/pfour_subr.c

147

val = save & ~PFOUR_REG_RESET;

sys/dev/sun/pfour_subr.c

148

*pfour = (val ^ PFOUR_FBTYPE_MASK);

sys/dev/sun/pfour_subr.c

149

if ((*pfour ^ val) & PFOUR_FBTYPE_MASK) {

sys/dev/sun/pfour_subr.c

154

return (PFOUR_ID(val));

sys/dev/sysmon/swsensor.c

182

int error, val = 0;

sys/dev/sysmon/swsensor.c

219

val = prop_number_signed_value(po);

sys/dev/sysmon/swsensor.c

225

SME_DESC_UNITS, val);

sys/dev/sysmon/swsensor.c

246

swsensor_edata.flags = val;

sys/dev/sysmon/swsensor.c

259

sw_sensor_mode = val;

sys/dev/sysmon/swsensor.c

271

sw_sensor_limit = val;

sys/dev/sysmon/swsensor.c

279

sw_sensor_value = val;

sys/dev/sysmon/swsensor.c

287

swsensor_edata.value_min = val;

sys/dev/sysmon/swsensor.c

294

swsensor_edata.value_max = val;

sys/dev/sysmon/sysmon_envsys_util.c

100

sme_sensor_upuint32(prop_dictionary_t dict, const char *key, uint32_t val)

sys/dev/sysmon/sysmon_envsys_util.c

108

if (!prop_number_equals_unsigned(obj, val)) {

sys/dev/sysmon/sysmon_envsys_util.c

109

if (!prop_dictionary_set_uint32(dict, key, val)) {

sys/dev/sysmon/sysmon_envsys_util.c

111

__func__, key, val));

sys/dev/sysmon/sysmon_envsys_util.c

116

if (!prop_dictionary_set_uint32(dict, key, val)) {

sys/dev/sysmon/sysmon_envsys_util.c

118

__func__, key, val));

sys/dev/sysmon/sysmon_envsys_util.c

46

sme_sensor_upbool(prop_dictionary_t dict, const char *key, bool val)

sys/dev/sysmon/sysmon_envsys_util.c

54

if (prop_bool_true(obj) != val) {

sys/dev/sysmon/sysmon_envsys_util.c

55

if (!prop_dictionary_set_bool(dict, key, val)) {

sys/dev/sysmon/sysmon_envsys_util.c

57

__func__, key, val));

sys/dev/sysmon/sysmon_envsys_util.c

62

if (!prop_dictionary_set_bool(dict, key, val)) {

sys/dev/sysmon/sysmon_envsys_util.c

64

__func__, key, val));

sys/dev/sysmon/sysmon_envsys_util.c

73

sme_sensor_upint32(prop_dictionary_t dict, const char *key, int32_t val)

sys/dev/sysmon/sysmon_envsys_util.c

81

if (!prop_number_equals_signed(obj, val)) {

sys/dev/sysmon/sysmon_envsys_util.c

82

if (!prop_dictionary_set_int32(dict, key, val)) {

sys/dev/sysmon/sysmon_envsys_util.c

84

__func__, key, val));

sys/dev/sysmon/sysmon_envsys_util.c

89

if (!prop_dictionary_set_int32(dict, key, val)) {

sys/dev/sysmon/sysmon_envsys_util.c

91

__func__, key, val));

sys/dev/tc/asc_tc.c

310

asc_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)

sys/dev/tc/asc_tc.c

315

reg * sizeof(uint32_t), val);

sys/dev/tc/asc_tcds.c

470

asc_write_reg(struct ncr53c9x_softc *sc, int reg, u_char val)

sys/dev/tc/asc_tcds.c

475

reg * sizeof(uint32_t), val);

sys/dev/tc/bba.c

616

bba_codec_dwrite(struct am7930_softc *amsc, int reg, uint8_t val)

sys/dev/tc/bba.c

621

DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n", sc, reg, val));

sys/dev/tc/bba.c

625

reg << 2, val << 8);

sys/dev/tc/bba.c

628

reg << 6, val);

sys/dev/tc/tcds.c

356

tcds_intrnull(void *val)

sys/dev/tc/tcds.c

360

(u_long)val);

sys/dev/tc/tcu.c

234

tcu_gpio_write(void *arg, int pin, int val)

sys/dev/tc/tcu.c

243

if (val == GPIO_PIN_LOW)

sys/dev/tc/tcu.c

245

else if (val == GPIO_PIN_HIGH)

sys/dev/tc/xcfb.c

751

ims332_write_reg(int regno, uint32_t val)

sys/dev/tc/xcfb.c

756

*(volatile uint16_t *)high8 = (val & 0xff0000) >> 8;

sys/dev/tc/xcfb.c

757

*(volatile uint16_t *)low16 = val;

sys/dev/tc/zs_ioasic.c

547

unsigned val;

sys/dev/tc/zs_ioasic.c

552

val = (zc->zc_csr >> 8) & 0xff;

sys/dev/tc/zs_ioasic.c

555

return (val);

sys/dev/tc/zs_ioasic.c

559

zs_write_reg(struct zs_chanstate *cs, u_int reg, u_int val)

sys/dev/tc/zs_ioasic.c

566

zc->zc_csr = val << 8;

sys/dev/tc/zs_ioasic.c

575

unsigned val;

sys/dev/tc/zs_ioasic.c

577

val = (zc->zc_csr >> 8) & 0xff;

sys/dev/tc/zs_ioasic.c

580

return (val);

sys/dev/tc/zs_ioasic.c

584

zs_write_csr(struct zs_chanstate *cs, u_int val)

sys/dev/tc/zs_ioasic.c

588

zc->zc_csr = val << 8;

sys/dev/tc/zs_ioasic.c

597

unsigned val;

sys/dev/tc/zs_ioasic.c

599

val = (zc->zc_data) >> 8 & 0xff;

sys/dev/tc/zs_ioasic.c

602

return (val);

sys/dev/tc/zs_ioasic.c

606

zs_write_data(struct zs_chanstate *cs, u_int val)

sys/dev/tc/zs_ioasic.c

610

zc->zc_data = val << 8;

sys/dev/tc/zskbd.c

338

int val;

sys/dev/tc/zskbd.c

343

data, &type, &val);

sys/dev/tc/zskbd.c

345

wskbd_input(sc->sc_wskbddev, type, val);

sys/dev/tprof/tprof_armv7.c

101

armreg_pmxevtyper_write(val);

sys/dev/tprof/tprof_armv7.c

105

armv7_pmu_set_pmevcntr(u_int counter, uint32_t val)

sys/dev/tprof/tprof_armv7.c

109

armreg_pmxevcntr_write(val);

sys/dev/tprof/tprof_armv7.c

122

armv7_pmu_getset_pmevcntr(u_int counter, uint64_t val)

sys/dev/tprof/tprof_armv7.c

129

armreg_pmxevcntr_write(val);

sys/dev/tprof/tprof_armv7.c

97

armv7_pmu_set_pmevtyper(u_int counter, uint64_t val)

sys/dev/tprof/tprof_armv8.c

106

reg_pmxevcntr_el0_write(val);

sys/dev/tprof/tprof_armv8.c

74

armv8_pmu_set_pmevtyper(u_int counter, uint64_t val)

sys/dev/tprof/tprof_armv8.c

78

reg_pmxevtyper_el0_write(val);

sys/dev/tprof/tprof_armv8.c

82

armv8_pmu_set_pmevcntr(u_int counter, uint64_t val)

sys/dev/tprof/tprof_armv8.c

86

reg_pmxevcntr_el0_write(val);

sys/dev/tprof/tprof_armv8.c

99

armv8_pmu_getset_pmevcntr(u_int counter, uint64_t val)

sys/dev/tprof/tprof_x86_amd.c

127

tprof_amd_counter_write(u_int counter, uint64_t val)

sys/dev/tprof/tprof_x86_amd.c

129

wrmsr(PERFCTR(counter), val);

sys/dev/tprof/tprof_x86_intel.c

122

tprof_intel_counter_write(u_int counter, uint64_t val)

sys/dev/tprof/tprof_x86_intel.c

125

wrmsr(PERFCTR(counter), val);

sys/dev/usb/auvitek_board.c

103

uint8_t val;

sys/dev/usb/auvitek_board.c

108

val = auvitek_read_1(sc, AU0828_REG_GPIO2_OUTEN);

sys/dev/usb/auvitek_board.c

109

val &= ~2;

sys/dev/usb/auvitek_board.c

110

auvitek_write_1(sc, AU0828_REG_GPIO2_OUTEN, val);

sys/dev/usb/auvitek_board.c

112

val = auvitek_read_1(sc, AU0828_REG_GPIO2_OUTEN);

sys/dev/usb/auvitek_board.c

113

val |= 2;

sys/dev/usb/auvitek_board.c

114

auvitek_write_1(sc, AU0828_REG_GPIO2_OUTEN, val);

sys/dev/usb/ehcivar.h

235

uint32_t val;

sys/dev/usb/ehcivar.h

237

val = bus_space_read_4(sc->iot, sc->ioh, offset & ~3);

sys/dev/usb/ehcivar.h

238

return (val >> ((offset & 3) * NBBY)) & 0xff;

sys/dev/usb/ehcivar.h

248

uint32_t val;

sys/dev/usb/ehcivar.h

250

val = bus_space_read_4(sc->iot, sc->ioh, offset & ~3);

sys/dev/usb/ehcivar.h

251

return (val >> ((offset & 3) * NBBY)) & 0xffff;

sys/dev/usb/ehcivar.h

262

uint32_t val;

sys/dev/usb/ehcivar.h

264

val = bus_space_read_4(sc->iot, sc->ioh, offset & ~3);

sys/dev/usb/ehcivar.h

265

val &= ~mask;

sys/dev/usb/ehcivar.h

266

val |= __SHIFTIN(data, mask);

sys/dev/usb/ehcivar.h

267

bus_space_write_4(sc->iot, sc->ioh, offset & ~3, val);

sys/dev/usb/ehcivar.h

278

uint32_t val;

sys/dev/usb/ehcivar.h

280

val = bus_space_read_4(sc->iot, sc->ioh, offset & ~3);

sys/dev/usb/ehcivar.h

281

val &= ~mask;

sys/dev/usb/ehcivar.h

282

val |= __SHIFTIN(data, mask);

sys/dev/usb/ehcivar.h

283

bus_space_write_4(sc->iot, sc->ioh, offset & ~3, val);

sys/dev/usb/emdtv.c

309

uint8_t val;

sys/dev/usb/emdtv.c

310

emdtv_read_multi_1(sc, req, index, &val, 1);

sys/dev/usb/emdtv.c

311

return val;

sys/dev/usb/emdtv.c

315

emdtv_write_1(struct emdtv_softc *sc, uint8_t req, uint16_t index, uint8_t val)

sys/dev/usb/emdtv.c

317

emdtv_write_multi_1(sc, req, index, &val, 1);

sys/dev/usb/emdtv.c

392

uint8_t val;

sys/dev/usb/emdtv.c

395

val = eeprom_offset + gpioreg;

sys/dev/usb/emdtv.c

396

emdtv_write_1(sc, 0x03, 0xa0, val);

sys/dev/usb/emdtv_board.h

51

#define EMDTV_GPIO_BIT_VAL(reg, val, reset) \

sys/dev/usb/emdtv_board.h

52

((reg) | 0x80 | (reset ? (1 << 6) : 0) | (val << 5))

sys/dev/usb/if_athn_usb.c

1337

uint32_t val;

sys/dev/usb/if_athn_usb.c

1350

&addr, sizeof(addr), &val);

sys/dev/usb/if_athn_usb.c

1355

DPRINTFN(DBG_FN, sc, "addr %#x return %#x\n", addr, be32toh(val));

sys/dev/usb/if_athn_usb.c

1357

return be32toh(val);

sys/dev/usb/if_athn_usb.c

1361

athn_usb_write(struct athn_softc *sc, uint32_t addr, uint32_t val)

sys/dev/usb/if_athn_usb.c

1368

DPRINTFN(DBG_FN, sc, "addr %#x val %#x\n", addr, val);

sys/dev/usb/if_athn_usb.c

1371

usc->usc_wbuf[usc->usc_wcount].val = htobe32(val);

sys/dev/usb/if_athn_usb.h

120

uint32_t val;

sys/dev/usb/if_aue.c

285

uByte val = 0;

sys/dev/usb/if_aue.c

296

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_aue.c

305

return val;

sys/dev/usb/if_aue.c

314

uWord val;

sys/dev/usb/if_aue.c

325

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_aue.c

334

return UGETW(val);

sys/dev/usb/if_aue.c

343

uByte val;

sys/dev/usb/if_aue.c

348

val = aval;

sys/dev/usb/if_aue.c

351

USETW(req.wValue, val);

sys/dev/usb/if_aue.c

355

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_aue.c

373

uWord val;

sys/dev/usb/if_aue.c

378

USETW(val, aval);

sys/dev/usb/if_aue.c

385

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_aue.c

447

aue_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_aue.c

468

*val = 0;

sys/dev/usb/if_aue.c

479

*val = 0;

sys/dev/usb/if_aue.c

489

*val = 0;

sys/dev/usb/if_aue.c

493

*val = aue_csr_read_2(sc, AUE_PHY_DATA);

sys/dev/usb/if_aue.c

496

device_unit(un->un_dev), phy, reg, *val);

sys/dev/usb/if_aue.c

502

aue_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_aue.c

509

device_unit(un->un_dev), phy, reg, val);

sys/dev/usb/if_aue.c

519

aue_csr_write_2(sc, AUE_PHY_DATA, val);

sys/dev/usb/if_aue.c

532

device_unit(un->un_dev), phy, reg, val);

sys/dev/usb/if_axe.c

289

axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)

sys/dev/usb/if_axe.c

299

DPRINTFN(20, "cmd %#jx index %#jx val %#jx", cmd, index, val, 0);

sys/dev/usb/if_axe.c

306

USETW(req.wValue, val);

sys/dev/usb/if_axe.c

318

axe_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_axe.c

328

*val = 0;

sys/dev/usb/if_axe.c

339

*val = 0;

sys/dev/usb/if_axe.c

343

*val = le16toh(data);

sys/dev/usb/if_axe.c

351

*val &= ~BMSR_EXTCAP;

sys/dev/usb/if_axe.c

354

DPRINTFN(30, "phy %#jx reg %#jx val %#jx", phy, reg, *val, 0);

sys/dev/usb/if_axe.c

360

axe_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_axe.c

369

aval = htole16(val);

sys/dev/usb/if_axe.c

388

int val, err;

sys/dev/usb/if_axe.c

393

val = 0;

sys/dev/usb/if_axe.c

396

val |= AXE_MEDIA_FULL_DUPLEX;

sys/dev/usb/if_axe.c

399

val |= AXE_MEDIA_FULL_DUPLEX;

sys/dev/usb/if_axe.c

401

val |= AXE_178_MEDIA_TXFLOW_CONTROL_EN;

sys/dev/usb/if_axe.c

403

val |= AXE_178_MEDIA_RXFLOW_CONTROL_EN;

sys/dev/usb/if_axe.c

405

val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC;

sys/dev/usb/if_axe.c

407

val |= AXE_178_MEDIA_ENCK;

sys/dev/usb/if_axe.c

410

val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;

sys/dev/usb/if_axe.c

414

val |= AXE_178_MEDIA_100TX;

sys/dev/usb/if_axe.c

423

DPRINTF("val=%#jx", val, 0, 0, 0);

sys/dev/usb/if_axe.c

424

err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);

sys/dev/usb/if_axe.c

572

uint16_t eeprom, val;

sys/dev/usb/if_axe.c

647

val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN :

sys/dev/usb/if_axe.c

649

AXE_GPIO_WRITE(val, hz / 32);

sys/dev/usb/if_axe.c

650

AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);

sys/dev/usb/if_axe.c

651

AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4);

sys/dev/usb/if_axe.c

652

AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);

sys/dev/usb/if_axe.c

656

axe_uno_mii_read_reg(un, un->un_phyno, 0x0001, &val);

sys/dev/usb/if_axe.c

657

axe_uno_mii_write_reg(un, un->un_phyno, 0x01, val | 0x0080);

sys/dev/usb/if_axen.c

107

axen_cmd(struct usbnet *un, int cmd, int index, int val, void *buf)

sys/dev/usb/if_axen.c

120

USETW(req.wValue, val);

sys/dev/usb/if_axen.c

126

cmd, val, AXEN_CMD_LEN(cmd)));

sys/dev/usb/if_axen.c

137

axen_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_axen.c

142

*val = 0;

sys/dev/usb/if_axen.c

148

*val = 0;

sys/dev/usb/if_axen.c

152

*val = le16toh(data);

sys/dev/usb/if_axen.c

154

*val &= ~BMSR_EXTCAP;

sys/dev/usb/if_axen.c

160

axen_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_axen.c

162

uint16_t uval = htole16(val);

sys/dev/usb/if_axen.c

180

uint16_t val;

sys/dev/usb/if_axen.c

205

val = 0;

sys/dev/usb/if_axen.c

207

val |= AXEN_MEDIUM_FDX;

sys/dev/usb/if_axen.c

209

val |= AXEN_MEDIUM_RXFLOW_CTRL_EN | AXEN_MEDIUM_TXFLOW_CTRL_EN |

sys/dev/usb/if_axen.c

213

val |= AXEN_MEDIUM_GIGA | AXEN_MEDIUM_EN_125MHZ;

sys/dev/usb/if_axen.c

216

val |= AXEN_MEDIUM_PS;

sys/dev/usb/if_axen.c

223

DPRINTF(("%s: val=%#x\n", __func__, val));

sys/dev/usb/if_axen.c

224

wval = htole16(val);

sys/dev/usb/if_axen.c

368

uint8_t val;

sys/dev/usb/if_axen.c

371

axen_cmd(un, AXEN_CMD_MAC_READ, 1, AXEN_UNK_05, &val);

sys/dev/usb/if_axen.c

372

DPRINTFN(5, ("AXEN_CMD_MAC_READ(0x05): 0x%02x\n", val));

sys/dev/usb/if_axen.c

375

axen_cmd(un, AXEN_CMD_MAC_READ, 1, AXEN_GENERAL_STATUS, &val);

sys/dev/usb/if_axen.c

377

if (!(val & AXEN_GENERAL_STATUS_MASK)) {

sys/dev/usb/if_axen.c

392

val = AXEN_PHYCLK_ACS | AXEN_PHYCLK_BCS;

sys/dev/usb/if_axen.c

393

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_PHYCLK, &val);

sys/dev/usb/if_axen.c

397

val = AXEN_MONITOR_NONE;

sys/dev/usb/if_axen.c

398

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_MONITOR_MODE, &val);

sys/dev/usb/if_axen.c

406

val = 0;

sys/dev/usb/if_axen.c

407

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_PHYCLK, &val);

sys/dev/usb/if_axen.c

408

val = AXEN_PHYCLK_ULR;

sys/dev/usb/if_axen.c

409

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_PHYCLK, &val);

sys/dev/usb/if_axen.c

423

axen_cmd(un, AXEN_CMD_MAC_READ, 1, AXEN_USB_UPLINK, &val);

sys/dev/usb/if_axen.c

424

switch (val) {

sys/dev/usb/if_axen.c

451

val);

sys/dev/usb/if_axen.c

462

val = 0x34;

sys/dev/usb/if_axen.c

463

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_PAUSE_LOW_WATERMARK, &val);

sys/dev/usb/if_axen.c

464

val = 0x52;

sys/dev/usb/if_axen.c

465

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_PAUSE_HIGH_WATERMARK, &val);

sys/dev/usb/if_axen.c

474

val = AXEN_MONITOR_PMETYPE | AXEN_MONITOR_PMEPOL | AXEN_MONITOR_RWMP;

sys/dev/usb/if_axen.c

475

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_MONITOR_MODE, &val);

sys/dev/usb/if_axen.c

476

axen_cmd(un, AXEN_CMD_MAC_READ, 1, AXEN_MONITOR_MODE, &val);

sys/dev/usb/if_axen.c

477

DPRINTF(("axen: Monitor mode = 0x%02x\n", val));

sys/dev/usb/if_axen.c

516

uint8_t val;

sys/dev/usb/if_axen.c

520

val = AXEN_RXCOE_OFF;

sys/dev/usb/if_axen.c

522

val |= AXEN_RXCOE_IPv4;

sys/dev/usb/if_axen.c

524

val |= AXEN_RXCOE_TCPv4;

sys/dev/usb/if_axen.c

526

val |= AXEN_RXCOE_UDPv4;

sys/dev/usb/if_axen.c

528

val |= AXEN_RXCOE_TCPv6;

sys/dev/usb/if_axen.c

530

val |= AXEN_RXCOE_UDPv6;

sys/dev/usb/if_axen.c

531

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_RX_COE, &val);

sys/dev/usb/if_axen.c

533

val = AXEN_TXCOE_OFF;

sys/dev/usb/if_axen.c

535

val |= AXEN_TXCOE_IPv4;

sys/dev/usb/if_axen.c

537

val |= AXEN_TXCOE_TCPv4;

sys/dev/usb/if_axen.c

539

val |= AXEN_TXCOE_UDPv4;

sys/dev/usb/if_axen.c

541

val |= AXEN_TXCOE_TCPv6;

sys/dev/usb/if_axen.c

543

val |= AXEN_TXCOE_UDPv6;

sys/dev/usb/if_axen.c

544

axen_cmd(un, AXEN_CMD_MAC_WRITE, 1, AXEN_TX_COE, &val);

sys/dev/usb/if_cue.c

164

uint8_t val = 0;

sys/dev/usb/if_cue.c

175

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_cue.c

184

device_xname(un->un_dev), reg, val));

sys/dev/usb/if_cue.c

186

return val;

sys/dev/usb/if_cue.c

195

uWord val;

sys/dev/usb/if_cue.c

206

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_cue.c

209

device_xname(un->un_dev), reg, UGETW(val)));

sys/dev/usb/if_cue.c

217

return UGETW(val);

sys/dev/usb/if_cue.c

221

cue_csr_write_1(struct usbnet *un, int reg, int val)

sys/dev/usb/if_cue.c

230

device_xname(un->un_dev), reg, val));

sys/dev/usb/if_cue.c

234

USETW(req.wValue, val);

sys/dev/usb/if_cue.c

258

uWord val;

sys/dev/usb/if_cue.c

267

USETW(val, aval);

sys/dev/usb/if_cue.c

270

USETW(req.wValue, val);

sys/dev/usb/if_kue.c

210

kue_ctl(struct usbnet *un, int rw, uint8_t breq, uint16_t val,

sys/dev/usb/if_kue.c

224

USETW(req.wValue, val);

sys/dev/usb/if_mos.c

181

uByte val = 0;

sys/dev/usb/if_mos.c

192

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_mos.c

199

return val;

sys/dev/usb/if_mos.c

207

uWord val;

sys/dev/usb/if_mos.c

212

USETW(val,0);

sys/dev/usb/if_mos.c

220

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_mos.c

227

return UGETW(val);

sys/dev/usb/if_mos.c

235

uByte val;

sys/dev/usb/if_mos.c

240

val = aval;

sys/dev/usb/if_mos.c

248

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_mos.c

262

uWord val;

sys/dev/usb/if_mos.c

264

USETW(val, aval);

sys/dev/usb/if_mos.c

275

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_mos.c

356

mos_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_mos.c

368

*val = 0;

sys/dev/usb/if_mos.c

376

*val = 0;

sys/dev/usb/if_mos.c

381

*val = res;

sys/dev/usb/if_mos.c

390

mos_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_mos.c

395

device_xname(un->un_dev), __func__, phy, reg, val));

sys/dev/usb/if_mos.c

397

mos_reg_write_2(un, MOS_PHY_DATA, val);

sys/dev/usb/if_mos.c

422

int val, err;

sys/dev/usb/if_mos.c

430

val = mos_reg_read_1(un, MOS_CTL);

sys/dev/usb/if_mos.c

431

val &= ~(MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);

sys/dev/usb/if_mos.c

432

mos_reg_write_1(un, MOS_CTL, val);

sys/dev/usb/if_mos.c

438

val |= MOS_CTL_FDX_ENB;

sys/dev/usb/if_mos.c

440

val &= ~(MOS_CTL_FDX_ENB);

sys/dev/usb/if_mos.c

446

val |= MOS_CTL_SPEEDSEL;

sys/dev/usb/if_mos.c

449

val &= ~(MOS_CTL_SPEEDSEL);

sys/dev/usb/if_mos.c

456

val |= (MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);

sys/dev/usb/if_mos.c

457

err = mos_reg_write_1(un, MOS_CTL, val);

sys/dev/usb/if_mue.c

1089

uint32_t reg, val;

sys/dev/usb/if_mue.c

1094

val = mue_csr_read(un, reg);

sys/dev/usb/if_mue.c

1098

val |= MUE_RFE_CTL_IP_COE;

sys/dev/usb/if_mue.c

1101

val &= ~MUE_RFE_CTL_IP_COE;

sys/dev/usb/if_mue.c

1108

val |= MUE_RFE_CTL_TCPUDP_COE;

sys/dev/usb/if_mue.c

1111

val &= ~MUE_RFE_CTL_TCPUDP_COE;

sys/dev/usb/if_mue.c

1114

val &= ~MUE_RFE_CTL_VLAN_FILTER;

sys/dev/usb/if_mue.c

1116

mue_csr_write(un, reg, val);

sys/dev/usb/if_mue.c

1123

uint32_t val;

sys/dev/usb/if_mue.c

1129

val = mue_csr_read(un, MUE_MAC_RX);

sys/dev/usb/if_mue.c

1130

val &= ~MUE_MAC_RX_MAX_SIZE_MASK;

sys/dev/usb/if_mue.c

1131

val |= MUE_MAC_RX_MAX_LEN(MUE_FRAME_LEN(ifp->if_mtu));

sys/dev/usb/if_mue.c

1132

mue_csr_write(un, MUE_MAC_RX, val);

sys/dev/usb/if_mue.c

149

uDWord val;

sys/dev/usb/if_mue.c

154

USETDW(val, 0);

sys/dev/usb/if_mue.c

161

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_mue.c

167

return UGETDW(val);

sys/dev/usb/if_mue.c

175

uDWord val;

sys/dev/usb/if_mue.c

180

USETDW(val, aval);

sys/dev/usb/if_mue.c

187

err = usbd_do_request(un->un_udev, &req, &val);

sys/dev/usb/if_mue.c

200

uint32_t val;

sys/dev/usb/if_mue.c

206

val = mue_csr_read(un, reg);

sys/dev/usb/if_mue.c

207

if ((val & set) || !(val & clear))

sys/dev/usb/if_mue.c

209

if (val & fail)

sys/dev/usb/if_mue.c

218

mue_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_mue.c

223

*val = 0;

sys/dev/usb/if_mue.c

229

*val = 0;

sys/dev/usb/if_mue.c

239

*val = 0;

sys/dev/usb/if_mue.c

244

*val = data & 0xffff;

sys/dev/usb/if_mue.c

250

mue_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_mue.c

261

mue_csr_write(un, MUE_MII_DATA, val);

sys/dev/usb/if_mue.c

356

uint32_t val;

sys/dev/usb/if_mue.c

373

val = mue_csr_read(un, MUE_E2P_DATA);

sys/dev/usb/if_mue.c

374

*dest = val & 0xff;

sys/dev/usb/if_mue.c

382

uint32_t val = 0; /* XXX gcc */

sys/dev/usb/if_mue.c

390

val = mue_csr_read(un, MUE_HW_CFG);

sys/dev/usb/if_mue.c

392

val & ~(MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN));

sys/dev/usb/if_mue.c

403

mue_csr_write(un, MUE_HW_CFG, val);

sys/dev/usb/if_mue.c

411

uint32_t val;

sys/dev/usb/if_mue.c

416

val = mue_csr_read(un, MUE_E2P_CMD);

sys/dev/usb/if_mue.c

417

return val & MUE_E2P_CMD_LOADED;

sys/dev/usb/if_mue.c

427

uint32_t val;

sys/dev/usb/if_mue.c

430

val = mue_csr_read(un, MUE_OTP_PWR_DN);

sys/dev/usb/if_mue.c

433

if (val & MUE_OTP_PWR_DN_PWRDN_N) {

sys/dev/usb/if_mue.c

458

val = mue_csr_read(un, MUE_OTP_RD_DATA);

sys/dev/usb/if_mue.c

459

*(dest + i) = (uint8_t)(val & 0xff);

sys/dev/usb/if_mue.c

559

uint32_t val;

sys/dev/usb/if_mue.c

581

val = MUE_7500_HS_RX_BUFSIZE /

sys/dev/usb/if_mue.c

584

val = MUE_7500_FS_RX_BUFSIZE /

sys/dev/usb/if_mue.c

586

mue_csr_write(un, MUE_7500_BURST_CAP, val);

sys/dev/usb/if_mue.c

593

val = (MUE_7500_MAX_RX_FIFO_SIZE - 512) / 512;

sys/dev/usb/if_mue.c

594

mue_csr_write(un, MUE_7500_FCT_RX_FIFO_END, val);

sys/dev/usb/if_mue.c

595

val = (MUE_7500_MAX_TX_FIFO_SIZE - 512) / 512;

sys/dev/usb/if_mue.c

596

mue_csr_write(un, MUE_7500_FCT_TX_FIFO_END, val);

sys/dev/usb/if_mue.c

601

val = MUE_7800_RX_BUFSIZE;

sys/dev/usb/if_mue.c

604

val /= MUE_SS_USB_PKT_SIZE;

sys/dev/usb/if_mue.c

607

val /= MUE_HS_USB_PKT_SIZE;

sys/dev/usb/if_mue.c

610

val /= MUE_FS_USB_PKT_SIZE;

sys/dev/usb/if_mue.c

613

mue_csr_write(un, MUE_7800_BURST_CAP, val);

sys/dev/usb/if_mue.c

625

val = (MUE_7800_MAX_RX_FIFO_SIZE - 512) / 512;

sys/dev/usb/if_mue.c

626

mue_csr_write(un, MUE_7800_FCT_RX_FIFO_END, val);

sys/dev/usb/if_mue.c

627

val = (MUE_7800_MAX_TX_FIFO_SIZE - 512) / 512;

sys/dev/usb/if_mue.c

628

mue_csr_write(un, MUE_7800_FCT_TX_FIFO_END, val);

sys/dev/usb/if_otus.c

1459

otus_write(struct otus_softc *sc, uint32_t reg, uint32_t val)

sys/dev/usb/if_otus.c

1462

DPRINTFN(DBG_FN | DBG_REG, sc, "reg=%#x, val=%#x\n", reg, val);

sys/dev/usb/if_otus.c

1468

sc->sc_write_buf[sc->sc_write_idx].val = htole32(val);

sys/dev/usb/if_otus.c

2384

#define EXP2(val) ((1 << (val)) - 1)

sys/dev/usb/if_otus.c

2385

#define AIFS(val) ((val) * 9 + 10)

sys/dev/usb/if_otusvar.h

214

uint32_t val;

sys/dev/usb/if_rum.c

1415

uint32_t val;

sys/dev/usb/if_rum.c

1417

rum_read_multi(sc, reg, &val, sizeof(val));

sys/dev/usb/if_rum.c

1419

return le32toh(val);

sys/dev/usb/if_rum.c

1443

rum_write(struct rum_softc *sc, uint16_t reg, uint32_t val)

sys/dev/usb/if_rum.c

1445

uint32_t tmp = htole32(val);

sys/dev/usb/if_rum.c

1475

rum_bbp_write(struct rum_softc *sc, uint8_t reg, uint8_t val)

sys/dev/usb/if_rum.c

1489

tmp = RT2573_BBP_BUSY | (reg & 0x7f) << 8 | val;

sys/dev/usb/if_rum.c

1496

uint32_t val;

sys/dev/usb/if_rum.c

1508

val = RT2573_BBP_BUSY | RT2573_BBP_READ | reg << 8;

sys/dev/usb/if_rum.c

1509

rum_write(sc, RT2573_PHY_CSR3, val);

sys/dev/usb/if_rum.c

1512

val = rum_read(sc, RT2573_PHY_CSR3);

sys/dev/usb/if_rum.c

1513

if (!(val & RT2573_BBP_BUSY))

sys/dev/usb/if_rum.c

1514

return val & 0xff;

sys/dev/usb/if_rum.c

1523

rum_rf_write(struct rum_softc *sc, uint8_t reg, uint32_t val)

sys/dev/usb/if_rum.c

1537

tmp = RT2573_RF_BUSY | RT2573_RF_20BIT | (val & 0xfffff) << 2 |

sys/dev/usb/if_rum.c

1542

sc->rf_regs[reg] = val;

sys/dev/usb/if_rum.c

1544

DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 3, val & 0xfffff));

sys/dev/usb/if_rum.c

1845

uint16_t val;

sys/dev/usb/if_rum.c

1851

rum_eeprom_read(sc, RT2573_EEPROM_MACBBP, &val, 2);

sys/dev/usb/if_rum.c

1852

sc->macbbp_rev = le16toh(val);

sys/dev/usb/if_rum.c

1857

rum_eeprom_read(sc, RT2573_EEPROM_ANTENNA, &val, 2);

sys/dev/usb/if_rum.c

1858

val = le16toh(val);

sys/dev/usb/if_rum.c

1859

sc->rf_rev = (val >> 11) & 0x1f;

sys/dev/usb/if_rum.c

1860

sc->hw_radio = (val >> 10) & 0x1;

sys/dev/usb/if_rum.c

1861

sc->rx_ant = (val >> 4) & 0x3;

sys/dev/usb/if_rum.c

1862

sc->tx_ant = (val >> 2) & 0x3;

sys/dev/usb/if_rum.c

1863

sc->nb_ant = val & 0x3;

sys/dev/usb/if_rum.c

1867

rum_eeprom_read(sc, RT2573_EEPROM_CONFIG2, &val, 2);

sys/dev/usb/if_rum.c

1868

val = le16toh(val);

sys/dev/usb/if_rum.c

1869

sc->ext_5ghz_lna = (val >> 6) & 0x1;

sys/dev/usb/if_rum.c

1870

sc->ext_2ghz_lna = (val >> 4) & 0x1;

sys/dev/usb/if_rum.c

1875

rum_eeprom_read(sc, RT2573_EEPROM_RSSI_2GHZ_OFFSET, &val, 2);

sys/dev/usb/if_rum.c

1876

val = le16toh(val);

sys/dev/usb/if_rum.c

1877

if ((val & 0xff) != 0xff)

sys/dev/usb/if_rum.c

1878

sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */

sys/dev/usb/if_rum.c

1880

rum_eeprom_read(sc, RT2573_EEPROM_RSSI_5GHZ_OFFSET, &val, 2);

sys/dev/usb/if_rum.c

1881

val = le16toh(val);

sys/dev/usb/if_rum.c

1882

if ((val & 0xff) != 0xff)

sys/dev/usb/if_rum.c

1883

sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */

sys/dev/usb/if_rum.c

1888

rum_eeprom_read(sc, RT2573_EEPROM_FREQ_OFFSET, &val, 2);

sys/dev/usb/if_rum.c

1889

val = le16toh(val);

sys/dev/usb/if_rum.c

1890

if ((val & 0xff) != 0xff)

sys/dev/usb/if_rum.c

1891

sc->rffreq = val & 0xff;

sys/dev/usb/if_rum.c

1911

sc->bbp_prom[i].val));

sys/dev/usb/if_rum.c

1920

uint8_t val;

sys/dev/usb/if_rum.c

1924

val = rum_bbp_read(sc, 0);

sys/dev/usb/if_rum.c

1925

if (val != 0 && val != 0xff)

sys/dev/usb/if_rum.c

1937

rum_bbp_write(sc, rum_def_bbp[i].reg, rum_def_bbp[i].val);

sys/dev/usb/if_rum.c

1943

rum_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);

sys/dev/usb/if_rum.c

1967

rum_write(sc, rum_def_mac[i].reg, rum_def_mac[i].val);

sys/dev/usb/if_rum.c

212

uint32_t val;

sys/dev/usb/if_rum.c

219

uint8_t val;

sys/dev/usb/if_rumvar.h

126

uint8_t val;

sys/dev/usb/if_run.c

1020

run_read(struct run_softc *sc, uint16_t reg, uint32_t *val)

sys/dev/usb/if_run.c

1027

*val = le32toh(tmp);

sys/dev/usb/if_run.c

1029

*val = 0xffffffff;

sys/dev/usb/if_run.c

1047

run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val)

sys/dev/usb/if_run.c

1053

USETW(req.wValue, val);

sys/dev/usb/if_run.c

1060

run_write(struct run_softc *sc, uint16_t reg, uint32_t val)

sys/dev/usb/if_run.c

1062

uint32_t tmp = htole32(val);

sys/dev/usb/if_run.c

1108

run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int count)

sys/dev/usb/if_run.c

1119

tmp[i] = htole32(val);

sys/dev/usb/if_run.c

1129

error = run_write(sc, reg, val);

sys/dev/usb/if_run.c

1135

run_efuse_read(struct run_softc *sc, uint16_t addr, uint16_t *val, int count)

sys/dev/usb/if_run.c

1167

*val = 0xffff; /* address not found */

sys/dev/usb/if_run.c

1176

*val = (addr & 1) ? tmp >> 16 : tmp & 0xffff;

sys/dev/usb/if_run.c

1182

run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val)

sys/dev/usb/if_run.c

1184

return run_efuse_read(sc, addr, val, 2);

sys/dev/usb/if_run.c

1188

run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val)

sys/dev/usb/if_run.c

1202

*val = le16toh(tmp);

sys/dev/usb/if_run.c

1204

*val = 0xffff;

sys/dev/usb/if_run.c

1209

run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val)

sys/dev/usb/if_run.c

1213

return sc->sc_srom_read(sc, addr, val);

sys/dev/usb/if_run.c

1217

run_rt2870_rf_write(struct run_softc *sc, uint8_t reg, uint32_t val)

sys/dev/usb/if_run.c

1233

(val & 0x3fffff) << 2 | (reg & 3);

sys/dev/usb/if_run.c

1238

run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val)

sys/dev/usb/if_run.c

1265

*val = tmp & 0xff;

sys/dev/usb/if_run.c

1270

run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val)

sys/dev/usb/if_run.c

1284

tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;

sys/dev/usb/if_run.c

1289

run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val)

sys/dev/usb/if_run.c

1316

*val = tmp & 0xff;

sys/dev/usb/if_run.c

1321

run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val)

sys/dev/usb/if_run.c

1335

tmp = RT2860_BBP_CSR_KICK | reg << 8 | val;

sys/dev/usb/if_run.c

1408

uint16_t addr, val;

sys/dev/usb/if_run.c

1415

run_srom_read(sc, addr + i / 2, &val);

sys/dev/usb/if_run.c

1416

sc->txpow1[i + 0] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1417

sc->txpow1[i + 1] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1421

run_srom_read(sc, addr + i / 2, &val);

sys/dev/usb/if_run.c

1422

sc->txpow2[i + 0] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1423

sc->txpow2[i + 1] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1427

&val);

sys/dev/usb/if_run.c

1428

sc->txpow3[i + 0] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1429

sc->txpow3[i + 1] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1445

run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE1 + i / 2, &val);

sys/dev/usb/if_run.c

1446

sc->txpow1[i + 14] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1447

sc->txpow1[i + 15] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1449

run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE2 + i / 2, &val);

sys/dev/usb/if_run.c

1450

sc->txpow2[i + 14] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1451

sc->txpow2[i + 15] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1455

&val);

sys/dev/usb/if_run.c

1456

sc->txpow3[i + 14] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1457

sc->txpow3[i + 15] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1465

uint16_t val;

sys/dev/usb/if_run.c

1470

run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val);

sys/dev/usb/if_run.c

1471

sc->txpow1[i + 0] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1472

sc->txpow1[i + 1] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1476

RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val);

sys/dev/usb/if_run.c

1477

sc->txpow2[i + 0] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1478

sc->txpow2[i + 1] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1502

run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val);

sys/dev/usb/if_run.c

1503

sc->txpow1[i + 14] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1504

sc->txpow1[i + 15] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1506

run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val);

sys/dev/usb/if_run.c

1507

sc->txpow2[i + 14] = (int8_t)(val & 0xff);

sys/dev/usb/if_run.c

1508

sc->txpow2[i + 15] = (int8_t)(val >> 8);

sys/dev/usb/if_run.c

1530

uint16_t val;

sys/dev/usb/if_run.c

1543

run_srom_read(sc, RT2860_EEPROM_VERSION, &val);

sys/dev/usb/if_run.c

1544

DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8));

sys/dev/usb/if_run.c

1547

run_srom_read(sc, RT2860_EEPROM_MAC01, &val);

sys/dev/usb/if_run.c

1548

ic->ic_myaddr[0] = val & 0xff;

sys/dev/usb/if_run.c

1549

ic->ic_myaddr[1] = val >> 8;

sys/dev/usb/if_run.c

1550

run_srom_read(sc, RT2860_EEPROM_MAC23, &val);

sys/dev/usb/if_run.c

1551

ic->ic_myaddr[2] = val & 0xff;

sys/dev/usb/if_run.c

1552

ic->ic_myaddr[3] = val >> 8;

sys/dev/usb/if_run.c

1553

run_srom_read(sc, RT2860_EEPROM_MAC45, &val);

sys/dev/usb/if_run.c

1554

ic->ic_myaddr[4] = val & 0xff;

sys/dev/usb/if_run.c

1555

ic->ic_myaddr[5] = val >> 8;

sys/dev/usb/if_run.c

1560

run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val);

sys/dev/usb/if_run.c

1561

sc->bbp[i].val = val & 0xff;

sys/dev/usb/if_run.c

1562

sc->bbp[i].reg = val >> 8;

sys/dev/usb/if_run.c

1564

sc->bbp[i].val));

sys/dev/usb/if_run.c

1571

&val);

sys/dev/usb/if_run.c

1572

sc->rf[i].val = val & 0xff;

sys/dev/usb/if_run.c

1573

sc->rf[i].reg = val >> 8;

sys/dev/usb/if_run.c

1575

sc->rf[i].val));

sys/dev/usb/if_run.c

1582

RT3593_EEPROM_FREQ, &val);

sys/dev/usb/if_run.c

1583

sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;

sys/dev/usb/if_run.c

1586

RT3593_EEPROM_FREQ, &val);

sys/dev/usb/if_run.c

1587

if ((val >> 8) != 0xff) {

sys/dev/usb/if_run.c

1589

sc->leds = val >> 8;

sys/dev/usb/if_run.c

1608

run_srom_read(sc, 0x00, &val);

sys/dev/usb/if_run.c

1610

run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);

sys/dev/usb/if_run.c

1611

if (val == 0xffff) {

sys/dev/usb/if_run.c

1631

sc->rf_rev = val;

sys/dev/usb/if_run.c

1632

run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);

sys/dev/usb/if_run.c

1634

sc->rf_rev = (val >> 8) & 0xf;

sys/dev/usb/if_run.c

1635

sc->ntxchains = (val >> 4) & 0xf;

sys/dev/usb/if_run.c

1636

sc->nrxchains = val & 0xf;

sys/dev/usb/if_run.c

1641

run_srom_read(sc, RT2860_EEPROM_CONFIG, &val);

sys/dev/usb/if_run.c

1642

DPRINTF(("EEPROM CFG 0x%04x\n", val));

sys/dev/usb/if_run.c

1644

if ((val >> 8) != 0xff)

sys/dev/usb/if_run.c

1645

sc->patch_dac = (val >> 15) & 1;

sys/dev/usb/if_run.c

1646

if ((val & 0xff) != 0xff) {

sys/dev/usb/if_run.c

1647

sc->ext_5ghz_lna = (val >> 3) & 1;

sys/dev/usb/if_run.c

1648

sc->ext_2ghz_lna = (val >> 2) & 1;

sys/dev/usb/if_run.c

1650

sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1;

sys/dev/usb/if_run.c

1652

sc->rfswitch = val & 1;

sys/dev/usb/if_run.c

1662

run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val);

sys/dev/usb/if_run.c

1664

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/dev/usb/if_run.c

1665

delta_2ghz = val & 0xf;

sys/dev/usb/if_run.c

1666

if (!(val & 0x40)) /* negative number */

sys/dev/usb/if_run.c

1669

val >>= 8;

sys/dev/usb/if_run.c

1670

if ((val & 0xff) != 0xff && (val & 0x80)) {

sys/dev/usb/if_run.c

1671

delta_5ghz = val & 0xf;

sys/dev/usb/if_run.c

1672

if (!(val & 0x40)) /* negative number */

sys/dev/usb/if_run.c

1681

run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val);

sys/dev/usb/if_run.c

1682

reg = val;

sys/dev/usb/if_run.c

1683

run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val);

sys/dev/usb/if_run.c

1684

reg |= (uint32_t)val << 16;

sys/dev/usb/if_run.c

1698

RT3593_EEPROM_RSSI1_2GHZ, &val);

sys/dev/usb/if_run.c

1699

sc->rssi_2ghz[0] = val & 0xff; /* Ant A */

sys/dev/usb/if_run.c

1700

sc->rssi_2ghz[1] = val >> 8; /* Ant B */

sys/dev/usb/if_run.c

1702

RT3593_EEPROM_RSSI2_2GHZ, &val);

sys/dev/usb/if_run.c

1706

sc->rssi_2ghz[2] = val & 0xff; /* Ant C */

sys/dev/usb/if_run.c

1712

if ((val & 0xff) != 0xff)

sys/dev/usb/if_run.c

1713

sc->txmixgain_2ghz = val & 0x7;

sys/dev/usb/if_run.c

1717

sc->rssi_2ghz[2] = val & 0xff; /* Ant C */

sys/dev/usb/if_run.c

1720

run_srom_read(sc, RT3593_EEPROM_LNA_5GHZ, &val);

sys/dev/usb/if_run.c

1721

sc->lna[2] = val >> 8; /* channel group 2 */

sys/dev/usb/if_run.c

1724

RT3593_EEPROM_RSSI1_5GHZ, &val);

sys/dev/usb/if_run.c

1725

sc->rssi_5ghz[0] = val & 0xff; /* Ant A */

sys/dev/usb/if_run.c

1726

sc->rssi_5ghz[1] = val >> 8; /* Ant B */

sys/dev/usb/if_run.c

1728

RT3593_EEPROM_RSSI2_5GHZ, &val);

sys/dev/usb/if_run.c

1734

if ((val & 0xff) != 0xff)

sys/dev/usb/if_run.c

1735

sc->txmixgain_5ghz = val & 0x7;

sys/dev/usb/if_run.c

1738

sc->rssi_5ghz[2] = val & 0xff; /* Ant C */

sys/dev/usb/if_run.c

1742

run_srom_read(sc, RT3593_EEPROM_LNA_5GHZ, &val);

sys/dev/usb/if_run.c

1744

sc->lna[3] = val >> 8; /* channel group 3 */

sys/dev/usb/if_run.c

1747

RT3593_EEPROM_LNA, &val);

sys/dev/usb/if_run.c

1748

sc->lna[0] = val & 0xff; /* channel group 0 */

sys/dev/usb/if_run.c

1749

sc->lna[1] = val >> 8; /* channel group 1 */

sys/dev/usb/if_run.c

3567

rt5592_2ghz_def_rf[i].val);

sys/dev/usb/if_run.c

3586

rt5592_5ghz_def_rf[i].val);

sys/dev/usb/if_run.c

3592

rt5592_chan_5ghz[i].val);

sys/dev/usb/if_run.c

3648

uint16_t val;

sys/dev/usb/if_run.c

3653

run_efuse_read(sc, RT5390_EEPROM_IQ_GAIN_CAL_TX0_2GHZ, &val, 1);

sys/dev/usb/if_run.c

3657

&val, 1);

sys/dev/usb/if_run.c

3661

&val, 1);

sys/dev/usb/if_run.c

3665

&val, 1);

sys/dev/usb/if_run.c

3667

val = 0;

sys/dev/usb/if_run.c

3668

run_bbp_write(sc, 159, val);

sys/dev/usb/if_run.c

3674

&val, 1);

sys/dev/usb/if_run.c

3678

&val, 1);

sys/dev/usb/if_run.c

3682

&val, 1);

sys/dev/usb/if_run.c

3686

&val, 1);

sys/dev/usb/if_run.c

3688

val = 0;

sys/dev/usb/if_run.c

3689

run_bbp_write(sc, 159, val);

sys/dev/usb/if_run.c

3695

&val, 1);

sys/dev/usb/if_run.c

3699

&val, 1);

sys/dev/usb/if_run.c

3703

&val, 1);

sys/dev/usb/if_run.c

3707

&val, 1);

sys/dev/usb/if_run.c

3709

val = 0;

sys/dev/usb/if_run.c

3710

run_bbp_write(sc, 159, val);

sys/dev/usb/if_run.c

3716

&val, 1);

sys/dev/usb/if_run.c

3720

&val, 1);

sys/dev/usb/if_run.c

3724

&val, 1);

sys/dev/usb/if_run.c

3728

&val, 1);

sys/dev/usb/if_run.c

3730

val = 0;

sys/dev/usb/if_run.c

3731

run_bbp_write(sc, 159, val);

sys/dev/usb/if_run.c

3736

&val, 1);

sys/dev/usb/if_run.c

3737

run_bbp_write(sc, 159, val);

sys/dev/usb/if_run.c

3742

RT5390_EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CTL, &val, 1);

sys/dev/usb/if_run.c

3743

run_bbp_write(sc, 159, val);

sys/dev/usb/if_run.c

4037

rt5592_def_bbp[i].val);

sys/dev/usb/if_run.c

4046

rt5390_def_bbp[i].val);

sys/dev/usb/if_run.c

4099

rt2860_def_bbp[i].val);

sys/dev/usb/if_run.c

4144

rt3572_def_rf[i].val);

sys/dev/usb/if_run.c

4149

rt3070_def_rf[i].val);

sys/dev/usb/if_run.c

4277

rt3593_def_rf[i].val);

sys/dev/usb/if_run.c

4334

rt5592_def_rf[i].val);

sys/dev/usb/if_run.c

4341

rt5392_def_rf[i].val);

sys/dev/usb/if_run.c

4354

rt5390_def_rf[i].val);

sys/dev/usb/if_run.c

4379

uint8_t *val)

sys/dev/usb/if_run.c

4428

*val = rf24;

sys/dev/usb/if_run.c

449

uint32_t val;

sys/dev/usb/if_run.c

4515

run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);

sys/dev/usb/if_run.c

456

uint8_t val;

sys/dev/usb/if_run.c

4785

run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val);

sys/dev/usb/if_run.c

4874

run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);

sys/dev/usb/if_run.c

504

uint8_t val;

sys/dev/usb/if_run.c

527

uint8_t val;

sys/dev/usb/if_runvar.h

181

uint8_t val;

sys/dev/usb/if_smsc.c

260

uint32_t val;

sys/dev/usb/if_smsc.c

266

if ((err = smsc_readreg(un, reg, &val)) != 0)

sys/dev/usb/if_smsc.c

268

if (!(val & bits))

sys/dev/usb/if_smsc.c

277

smsc_uno_miibus_readreg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_smsc.c

284

*val = 0;

sys/dev/usb/if_smsc.c

290

*val = 0;

sys/dev/usb/if_smsc.c

299

*val = 0;

sys/dev/usb/if_smsc.c

305

*val = 0;

sys/dev/usb/if_smsc.c

309

*val = data & 0xffff;

sys/dev/usb/if_smsc.c

314

smsc_uno_miibus_writereg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_smsc.c

326

smsc_writereg(un, SMSC_MII_DATA, val);

sys/dev/usb/if_smsc.c

482

uint32_t val;

sys/dev/usb/if_smsc.c

487

err = smsc_readreg(un, SMSC_COE_CTRL, &val);

sys/dev/usb/if_smsc.c

496

val |= (SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);

sys/dev/usb/if_smsc.c

498

val &= ~(SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);

sys/dev/usb/if_smsc.c

502

val |= SMSC_COE_CTRL_TX_EN;

sys/dev/usb/if_smsc.c

504

val &= ~SMSC_COE_CTRL_TX_EN;

sys/dev/usb/if_smsc.c

506

sc->sc_coe_ctrl = val;

sys/dev/usb/if_smsc.c

508

err = smsc_writereg(un, SMSC_COE_CTRL, val);

sys/dev/usb/if_smsc.c

523

uint32_t val;

sys/dev/usb/if_smsc.c

530

val = ((uint32_t)addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8)

sys/dev/usb/if_smsc.c

532

if ((err = smsc_writereg(un, SMSC_MAC_ADDRL, val)) != 0)

sys/dev/usb/if_smsc.c

535

val = (addr[5] << 8) | addr[4];

sys/dev/usb/if_smsc.c

536

err = smsc_writereg(un, SMSC_MAC_ADDRH, val);

sys/dev/usb/if_udav.c

423

uint8_t val = 0;

sys/dev/usb/if_udav.c

431

return udav_csr_read(un, offset, &val, 1) ? 0 : val;

sys/dev/usb/if_udav.c

704

udav_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_udav.c

716

*val = 0;

sys/dev/usb/if_udav.c

724

*val = 0;

sys/dev/usb/if_udav.c

743

*val = data[0] | (data[1] << 8);

sys/dev/usb/if_udav.c

746

device_xname(un->un_dev), __func__, phy, reg, *val));

sys/dev/usb/if_udav.c

752

udav_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_udav.c

757

device_xname(un->un_dev), __func__, phy, reg, val));

sys/dev/usb/if_udav.c

779

data[0] = val & 0xff;

sys/dev/usb/if_udav.c

780

data[1] = (val >> 8) & 0xff;

sys/dev/usb/if_umb.c

1699

uint32_t val;

sys/dev/usb/if_umb.c

1773

memcpy(&val, (const char *)data + off, sizeof(val));

sys/dev/usb/if_umb.c

1775

sc->sc_info.ipv4dns[i++] = val;

sys/dev/usb/if_umb.c

1781

val = le32toh(ic->ipv4_mtu);

sys/dev/usb/if_umb.c

1782

if (ifp->if_mtu != val && val <= sc->sc_maxpktlen) {

sys/dev/usb/if_umb.c

1783

ifp->if_mtu = val;

sys/dev/usb/if_umb.c

1784

if (ifp->if_mtu > val)

sys/dev/usb/if_umb.c

1785

ifp->if_mtu = val;

sys/dev/usb/if_umb.c

1787

log(LOG_INFO, "%s: MTU %d\n", DEVNAM(sc), val);

sys/dev/usb/if_umb.c

2494

uint32_t val;

sys/dev/usb/if_umb.c

2554

if (tlvlen != sizeof(val))

sys/dev/usb/if_umb.c

2556

val = UMB_GET32(&data[3]);

sys/dev/usb/if_umb.c

2559

if (val != 0) {

sys/dev/usb/if_umb.c

2562

val);

sys/dev/usb/if_umb.c

2568

if (val == 0)

sys/dev/usb/if_umb.c

2572

else if (val == 0x001a0001)

sys/dev/usb/if_umb.c

2578

"error %#x\n", DEVNAM(sc), val);

sys/dev/usb/if_umbreg.h

29

int val;

sys/dev/usb/if_umbreg.h

34

umb_val2descr(const struct umb_valdescr *vdp, int val)

sys/dev/usb/if_umbreg.h

39

if (vdp->val == val)

sys/dev/usb/if_umbreg.h

43

snprintf(sval, sizeof(sval), "#%d", val);

sys/dev/usb/if_ural.c

1554

uint16_t val;

sys/dev/usb/if_ural.c

1562

error = usbd_do_request(sc->sc_udev, &req, &val);

sys/dev/usb/if_ural.c

1569

return le16toh(val);

sys/dev/usb/if_ural.c

1592

ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)

sys/dev/usb/if_ural.c

1599

USETW(req.wValue, val);

sys/dev/usb/if_ural.c

1630

ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)

sys/dev/usb/if_ural.c

1644

tmp = reg << 8 | val;

sys/dev/usb/if_ural.c

1651

uint16_t val;

sys/dev/usb/if_ural.c

1654

val = RAL_BBP_WRITE | reg << 8;

sys/dev/usb/if_ural.c

1655

ural_write(sc, RAL_PHY_CSR7, val);

sys/dev/usb/if_ural.c

1670

ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)

sys/dev/usb/if_ural.c

1684

tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);

sys/dev/usb/if_ural.c

1689

sc->rf_regs[reg] = val;

sys/dev/usb/if_ural.c

1691

DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));

sys/dev/usb/if_ural.c

181

uint16_t val;

sys/dev/usb/if_ural.c

1975

uint16_t val;

sys/dev/usb/if_ural.c

1977

ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);

sys/dev/usb/if_ural.c

1978

val = le16toh(val);

sys/dev/usb/if_ural.c

1979

sc->rf_rev = (val >> 11) & 0x7;

sys/dev/usb/if_ural.c

1980

sc->hw_radio = (val >> 10) & 0x1;

sys/dev/usb/if_ural.c

1981

sc->led_mode = (val >> 6) & 0x7;

sys/dev/usb/if_ural.c

1982

sc->rx_ant = (val >> 4) & 0x3;

sys/dev/usb/if_ural.c

1983

sc->tx_ant = (val >> 2) & 0x3;

sys/dev/usb/if_ural.c

1984

sc->nb_ant = val & 0x3;

sys/dev/usb/if_ural.c

2014

ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);

sys/dev/usb/if_ural.c

2021

ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);

sys/dev/usb/if_ural.c

207

uint8_t val;

sys/dev/usb/if_ural.c

2094

ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);

sys/dev/usb/if_uralvar.h

124

uint8_t val;

sys/dev/usb/if_ure.c

120

ure_ctl(struct usbnet *un, uint8_t rw, uint16_t val, uint16_t index,

sys/dev/usb/if_ure.c

134

USETW(req.wValue, val);

sys/dev/usb/if_ure.c

139

rw, val, index, len));

sys/dev/usb/if_ure.c

168

uint32_t val;

sys/dev/usb/if_ure.c

176

val = UGETDW(temp);

sys/dev/usb/if_ure.c

177

val >>= shift;

sys/dev/usb/if_ure.c

179

return val & 0xff;

sys/dev/usb/if_ure.c

185

uint32_t val;

sys/dev/usb/if_ure.c

193

val = UGETDW(temp);

sys/dev/usb/if_ure.c

194

val >>= shift;

sys/dev/usb/if_ure.c

196

return val & 0xffff;

sys/dev/usb/if_ure.c

209

ure_write_1(struct usbnet *un, uint16_t reg, uint16_t index, uint32_t val)

sys/dev/usb/if_ure.c

217

val &= 0xff;

sys/dev/usb/if_ure.c

221

val <<= (shift << 3);

sys/dev/usb/if_ure.c

225

USETDW(temp, val);

sys/dev/usb/if_ure.c

230

ure_write_2(struct usbnet *un, uint16_t reg, uint16_t index, uint32_t val)

sys/dev/usb/if_ure.c

238

val &= 0xffff;

sys/dev/usb/if_ure.c

242

val <<= (shift << 3);

sys/dev/usb/if_ure.c

246

USETDW(temp, val);

sys/dev/usb/if_ure.c

251

ure_write_4(struct usbnet *un, uint16_t reg, uint16_t index, uint32_t val)

sys/dev/usb/if_ure.c

255

USETDW(temp, val);

sys/dev/usb/if_ure.c

282

ure_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_ure.c

286

*val = 0;

sys/dev/usb/if_ure.c

292

*val = ure_read_1(un, URE_PLA_PHYSTATUS, URE_MCU_TYPE_PLA);

sys/dev/usb/if_ure.c

296

*val = ure_ocp_reg_read(un, URE_OCP_BASE_MII + reg * 2);

sys/dev/usb/if_ure.c

302

ure_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_ure.c

308

ure_ocp_reg_write(un, URE_OCP_BASE_MII + reg * 2, val);

sys/dev/usb/if_ure.c

512

uint16_t val;

sys/dev/usb/if_ure.c

539

val = ure_ocp_reg_read(un, URE_OCP_PHY_STATUS) &

sys/dev/usb/if_ure.c

541

if (val == URE_PHY_STAT_LAN_ON || val == URE_PHY_STAT_PWRDN)

sys/dev/usb/if_ure.c

553

val = ure_read_2(un, URE_USB_SSPHYLINK2, URE_MCU_TYPE_USB);

sys/dev/usb/if_ure.c

554

val &= ~URE_PWD_DN_SCALE_MASK;

sys/dev/usb/if_ure.c

555

val |= URE_PWD_DN_SCALE(96);

sys/dev/usb/if_ure.c

556

ure_write_2(un, URE_USB_SSPHYLINK2, URE_MCU_TYPE_USB, val);

sys/dev/usb/if_ure.c

567

val = ure_read_1(un, URE_USB_CSR_DUMMY1, URE_MCU_TYPE_USB);

sys/dev/usb/if_ure.c

570

val &= ~URE_DYNAMIC_BURST;

sys/dev/usb/if_ure.c

572

val |= URE_DYNAMIC_BURST;

sys/dev/usb/if_ure.c

573

ure_write_1(un, URE_USB_CSR_DUMMY1, URE_MCU_TYPE_USB, val);

sys/dev/usb/if_ure.c

590

val = URE_LPM_TIMER_500MS;

sys/dev/usb/if_ure.c

592

val = URE_LPM_TIMER_500US;

sys/dev/usb/if_ure.c

594

val | URE_FIFO_EMPTY_1FB | URE_ROK_EXIT_LPM);

sys/dev/usb/if_ure.c

596

val = ure_read_2(un, URE_USB_AFE_CTRL2, URE_MCU_TYPE_USB);

sys/dev/usb/if_ure.c

597

val &= ~URE_SEN_VAL_MASK;

sys/dev/usb/if_ure.c

598

val |= URE_SEN_VAL_NORMAL | URE_SEL_RXIDLE;

sys/dev/usb/if_ure.c

599

ure_write_2(un, URE_USB_AFE_CTRL2, URE_MCU_TYPE_USB, val);

sys/dev/usb/if_ure.c

626

val = ure_read_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB);

sys/dev/usb/if_ure.c

628

val |= URE_U2P3_ENABLE;

sys/dev/usb/if_ure.c

630

val &= ~URE_U2P3_ENABLE;

sys/dev/usb/if_ure.c

631

ure_write_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB, val);

sys/dev/usb/if_ure.c

649

val = ure_read_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB);

sys/dev/usb/if_ure.c

651

val |= URE_U2P3_ENABLE;

sys/dev/usb/if_ure.c

653

val &= ~URE_U2P3_ENABLE;

sys/dev/usb/if_ure.c

654

ure_write_2(un, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB, val);

sys/dev/usb/if_url.c

303

uint8_t val = 0;

sys/dev/usb/if_url.c

308

return url_mem(un, URL_CMD_READMEM, reg, &val, 1) ? 0 : val;

sys/dev/usb/if_url.c

315

uWord val;

sys/dev/usb/if_url.c

320

USETW(val, 0);

sys/dev/usb/if_url.c

321

return url_mem(un, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val);

sys/dev/usb/if_url.c

328

uint8_t val = aval;

sys/dev/usb/if_url.c

333

return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0;

sys/dev/usb/if_url.c

340

uWord val;

sys/dev/usb/if_url.c

345

USETW(val, aval);

sys/dev/usb/if_url.c

347

return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0;

sys/dev/usb/if_url.c

354

uDWord val;

sys/dev/usb/if_url.c

359

USETDW(val, aval);

sys/dev/usb/if_url.c

361

return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0;

sys/dev/usb/if_url.c

548

url_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/if_url.c

560

*val = 0;

sys/dev/usb/if_url.c

573

*val = 0;

sys/dev/usb/if_url.c

595

*val = data;

sys/dev/usb/if_url.c

599

device_xname(un->un_dev), __func__, phy, reg, *val));

sys/dev/usb/if_url.c

605

url_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/if_url.c

609

device_xname(un->un_dev), __func__, phy, reg, val));

sys/dev/usb/if_url.c

644

url_csr_write_1(un, reg, val);

sys/dev/usb/if_url.c

646

url_csr_write_2(un, reg, val);

sys/dev/usb/if_url.c

669

uint16_t val;

sys/dev/usb/if_url.c

690

val = url_csr_read_2(un, URL_PHYDAT);

sys/dev/usb/if_url.c

693

device_xname(un->un_dev), __func__, phy, reg, val));

sys/dev/usb/if_urtw.c

113

#define urtw_read8_m(sc, val, data) do { \

sys/dev/usb/if_urtw.c

114

error = urtw_read8_c(sc, val, data, 0); \

sys/dev/usb/if_urtw.c

118

#define urtw_read8_idx_m(sc, val, data, idx) do { \

sys/dev/usb/if_urtw.c

119

error = urtw_read8_c(sc, val, data, idx); \

sys/dev/usb/if_urtw.c

123

#define urtw_write8_m(sc, val, data) do { \

sys/dev/usb/if_urtw.c

124

error = urtw_write8_c(sc, val, data, 0); \

sys/dev/usb/if_urtw.c

128

#define urtw_write8_idx_m(sc, val, data, idx) do { \

sys/dev/usb/if_urtw.c

129

error = urtw_write8_c(sc, val, data, idx); \

sys/dev/usb/if_urtw.c

133

#define urtw_read16_m(sc, val, data) do { \

sys/dev/usb/if_urtw.c

134

error = urtw_read16_c(sc, val, data, 0); \

sys/dev/usb/if_urtw.c

138

#define urtw_read16_idx_m(sc, val, data, idx) do { \

sys/dev/usb/if_urtw.c

139

error = urtw_read16_c(sc, val, data, idx); \

sys/dev/usb/if_urtw.c

143

#define urtw_write16_m(sc, val, data) do { \

sys/dev/usb/if_urtw.c

144

error = urtw_write16_c(sc, val, data, 0); \

sys/dev/usb/if_urtw.c

148

#define urtw_write16_idx_m(sc, val, data, idx) do { \

sys/dev/usb/if_urtw.c

149

error = urtw_write16_c(sc, val, data, idx); \

sys/dev/usb/if_urtw.c

153

#define urtw_read32_m(sc, val, data) do { \

sys/dev/usb/if_urtw.c

154

error = urtw_read32_c(sc, val, data, 0); \

sys/dev/usb/if_urtw.c

1576

urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data, uint8_t idx)

sys/dev/usb/if_urtw.c

158

#define urtw_read32_idx_m(sc, val, data, idx) do { \

sys/dev/usb/if_urtw.c

1583

USETW(req.wValue, val | 0xff00);

sys/dev/usb/if_urtw.c

159

error = urtw_read32_c(sc, val, data, idx); \

sys/dev/usb/if_urtw.c

1592

urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data)

sys/dev/usb/if_urtw.c

1599

USETW(req.wValue, val | 0xfe00);

sys/dev/usb/if_urtw.c

1608

urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data, uint8_t idx)

sys/dev/usb/if_urtw.c

1615

USETW(req.wValue, val | 0xff00);

sys/dev/usb/if_urtw.c

1624

urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data, uint8_t idx)

sys/dev/usb/if_urtw.c

163

#define urtw_write32_m(sc, val, data) do { \

sys/dev/usb/if_urtw.c

1631

USETW(req.wValue, val | 0xff00);

sys/dev/usb/if_urtw.c

164

error = urtw_write32_c(sc, val, data, 0); \

sys/dev/usb/if_urtw.c

1640

urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data, uint8_t idx)

sys/dev/usb/if_urtw.c

1646

USETW(req.wValue, val | 0xff00);

sys/dev/usb/if_urtw.c

1654

urtw_write8e(struct urtw_softc *sc, int val, uint8_t data)

sys/dev/usb/if_urtw.c

1660

USETW(req.wValue, val | 0xfe00);

sys/dev/usb/if_urtw.c

1668

urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data, uint8_t idx)

sys/dev/usb/if_urtw.c

1674

USETW(req.wValue, val | 0xff00);

sys/dev/usb/if_urtw.c

168

#define urtw_write32_idx_m(sc, val, data, idx) do { \

sys/dev/usb/if_urtw.c

1682

urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data, uint8_t idx)

sys/dev/usb/if_urtw.c

1688

USETW(req.wValue, val | 0xff00);

sys/dev/usb/if_urtw.c

169

error = urtw_write32_c(sc, val, data, idx); \

sys/dev/usb/if_urtw.c

1710

urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val)

sys/dev/usb/if_urtw.c

1721

urtw_write32_m(sc, URTW_ANAPARAM, val);

sys/dev/usb/if_urtw.c

173

#define urtw_8187_write_phy_ofdm(sc, val, data) do { \

sys/dev/usb/if_urtw.c

1733

urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val)

sys/dev/usb/if_urtw.c

174

error = urtw_8187_write_phy_ofdm_c(sc, val, data); \

sys/dev/usb/if_urtw.c

1744

urtw_write32_m(sc, URTW_ANAPARAM2, val);

sys/dev/usb/if_urtw.c

178

#define urtw_8187_write_phy_cck(sc, val, data) do { \

sys/dev/usb/if_urtw.c

179

error = urtw_8187_write_phy_cck_c(sc, val, data); \

sys/dev/usb/if_urtw.c

183

#define urtw_8225_write(sc, val, data) do { \

sys/dev/usb/if_urtw.c

184

error = urtw_8225_write_c(sc, val, data); \

sys/dev/usb/if_urtw.c

191

uint32_t val;

sys/dev/usb/if_urtw.c

196

uint8_t val;

sys/dev/usb/if_urtw.c

2076

return urtw_ratetable[i].val;

sys/dev/usb/if_urtw.c

2088

if (rate == urtw_ratetable[i].val)

sys/dev/usb/if_urtw.c

2888

urtw_8225_rf_part1[i].val);

sys/dev/usb/if_urtw.c

2912

urtw_8225_rf_part2[i].val);

sys/dev/usb/if_urtw.c

2922

urtw_8225_rf_part3[i].val);

sys/dev/usb/if_urtw.c

3284

urtw_8225v2_rf_part1[i].val);

sys/dev/usb/if_urtw.c

3332

urtw_8225v2_rf_part2[i].val);

sys/dev/usb/if_urtw.c

3341

urtw_8225v2_rf_part3[i].val);

sys/dev/usb/if_urtw.c

3737

urtw_8187b_regtbl[i].val, urtw_8187b_regtbl[i].idx);

sys/dev/usb/if_urtw.c

3857

urtw_8225v2_b_rf[i].val);

sys/dev/usb/if_urtwn.c

1032

urtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val)

sys/dev/usb/if_urtwn.c

1036

DPRINTFN(DBG_REG, "addr=%#jx, val=%#jx", addr, val, 0, 0);

sys/dev/usb/if_urtwn.c

1038

urtwn_write_region_1(sc, addr, &val, 1);

sys/dev/usb/if_urtwn.c

1042

urtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val)

sys/dev/usb/if_urtwn.c

1047

DPRINTFN(DBG_REG, "addr=%#jx, val=%#jx", addr, val, 0, 0);

sys/dev/usb/if_urtwn.c

1049

buf[0] = (uint8_t)val;

sys/dev/usb/if_urtwn.c

1050

buf[1] = (uint8_t)(val >> 8);

sys/dev/usb/if_urtwn.c

1055

urtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val)

sys/dev/usb/if_urtwn.c

1060

DPRINTFN(DBG_REG, "addr=%#jx, val=%#jx", addr, val, 0, 0);

sys/dev/usb/if_urtwn.c

1062

buf[0] = (uint8_t)val;

sys/dev/usb/if_urtwn.c

1063

buf[1] = (uint8_t)(val >> 8);

sys/dev/usb/if_urtwn.c

1064

buf[2] = (uint8_t)(val >> 16);

sys/dev/usb/if_urtwn.c

1065

buf[3] = (uint8_t)(val >> 24);

sys/dev/usb/if_urtwn.c

1104

uint8_t val;

sys/dev/usb/if_urtwn.c

1108

if (urtwn_read_region_1(sc, addr, &val, 1) != USBD_NORMAL_COMPLETION)

sys/dev/usb/if_urtwn.c

1111

DPRINTFN(DBG_REG, "addr=%#jx, val=%#jx", addr, val, 0, 0);

sys/dev/usb/if_urtwn.c

1112

return val;

sys/dev/usb/if_urtwn.c

1119

uint16_t val;

sys/dev/usb/if_urtwn.c

1126

val = LE_READ_2(&buf[0]);

sys/dev/usb/if_urtwn.c

1127

DPRINTFN(DBG_REG, "addr=%#jx, val=%#jx", addr, val, 0, 0);

sys/dev/usb/if_urtwn.c

1128

return val;

sys/dev/usb/if_urtwn.c

1135

uint32_t val;

sys/dev/usb/if_urtwn.c

1142

val = LE_READ_4(&buf[0]);

sys/dev/usb/if_urtwn.c

1143

DPRINTFN(DBG_REG, "addr=%#jx, val=%#jx", addr, val, 0, 0);

sys/dev/usb/if_urtwn.c

1144

return val;

sys/dev/usb/if_urtwn.c

1208

urtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val)

sys/dev/usb/if_urtwn.c

1211

sc->sc_rf_write(sc, chain, addr, val);

sys/dev/usb/if_urtwn.c

1216

uint32_t val)

sys/dev/usb/if_urtwn.c

1220

SM(R92C_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));

sys/dev/usb/if_urtwn.c

1225

uint32_t val)

sys/dev/usb/if_urtwn.c

1229

SM(R88E_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));

sys/dev/usb/if_urtwn.c

1234

uint32_t val)

sys/dev/usb/if_urtwn.c

1238

SM(R88E_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));

sys/dev/usb/if_urtwn.c

1244

uint32_t reg[R92C_MAX_CHAINS], val;

sys/dev/usb/if_urtwn.c

1265

val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain));

sys/dev/usb/if_urtwn.c

1267

val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain));

sys/dev/usb/if_urtwn.c

1269

return MS(val, R92C_LSSI_READBACK_DATA);

sys/dev/usb/if_urtwn.c

3228

uint32_t val;

sys/dev/usb/if_urtwn.c

3282

val = urtwn_read_2(sc, R92C_APS_FSMCO) &

sys/dev/usb/if_urtwn.c

3284

if (val == 0x0)

sys/dev/usb/if_urtwn.c

3308

uint8_t val;

sys/dev/usb/if_urtwn.c

3317

val = urtwn_read_1(sc, 0x6) & 0x2;

sys/dev/usb/if_urtwn.c

3318

if (val == 0x2)

sys/dev/usb/if_urtwn.c

3368

uint32_t val;

sys/dev/usb/if_urtwn.c

3389

val = urtwn_read_4(sc, R92E_AUTO_LLT) | R92E_AUTO_LLT_EN;

sys/dev/usb/if_urtwn.c

3390

urtwn_write_4(sc, R92E_AUTO_LLT, val);

sys/dev/usb/if_urtwn.c

3392

val = urtwn_read_4(sc, R92E_AUTO_LLT);

sys/dev/usb/if_urtwn.c

3393

if (val & R92E_AUTO_LLT_EN)

sys/dev/usb/if_urtwn.c

3821

rtl8188eu_mac[i].val);

sys/dev/usb/if_urtwn.c

3825

rtl8192eu_mac[i].val);

sys/dev/usb/if_urtwn.c

3829

rtl8192cu_mac[i].val);

sys/dev/usb/if_zyd.c

1008

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zyd.c

1016

phy2230s[i].val);

sys/dev/usb/if_zyd.c

1041

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zyd.c

1103

error = zyd_write16(sc, phyini_1[i].reg, phyini_1[i].val);

sys/dev/usb/if_zyd.c

1114

error = zyd_write16(sc, phyini_2[i].reg, phyini_2[i].val);

sys/dev/usb/if_zyd.c

1125

error = zyd_write16(sc, phyini_3[i].reg, phyini_3[i].val);

sys/dev/usb/if_zyd.c

1197

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zyd.c

1265

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zyd.c

1313

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zyd.c

1359

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zyd.c

1396

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zyd.c

1442

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zyd.c

1565

if ((error = zyd_write16(sc, phyp->reg, phyp->val)) != 0)

sys/dev/usb/if_zyd.c

1627

uint16_t val;

sys/dev/usb/if_zyd.c

1651

(void)zyd_read16(sc, ZYD_EEPROM_PWR_CAL + i, &val);

sys/dev/usb/if_zyd.c

1652

sc->pwr_cal[i * 2] = val >> 8;

sys/dev/usb/if_zyd.c

1653

sc->pwr_cal[i * 2 + 1] = val & 0xff;

sys/dev/usb/if_zyd.c

1655

(void)zyd_read16(sc, ZYD_EEPROM_PWR_INT + i, &val);

sys/dev/usb/if_zyd.c

1656

sc->pwr_int[i * 2] = val >> 8;

sys/dev/usb/if_zyd.c

1657

sc->pwr_int[i * 2 + 1] = val & 0xff;

sys/dev/usb/if_zyd.c

1659

(void)zyd_read16(sc, ZYD_EEPROM_36M_CAL + i, &val);

sys/dev/usb/if_zyd.c

1660

sc->ofdm36_cal[i * 2] = val >> 8;

sys/dev/usb/if_zyd.c

1661

sc->ofdm36_cal[i * 2 + 1] = val & 0xff;

sys/dev/usb/if_zyd.c

1663

(void)zyd_read16(sc, ZYD_EEPROM_48M_CAL + i, &val);

sys/dev/usb/if_zyd.c

1664

sc->ofdm48_cal[i * 2] = val >> 8;

sys/dev/usb/if_zyd.c

1665

sc->ofdm48_cal[i * 2 + 1] = val & 0xff;

sys/dev/usb/if_zyd.c

1667

(void)zyd_read16(sc, ZYD_EEPROM_54M_CAL + i, &val);

sys/dev/usb/if_zyd.c

1668

sc->ofdm54_cal[i * 2] = val >> 8;

sys/dev/usb/if_zyd.c

1669

sc->ofdm54_cal[i * 2 + 1] = val & 0xff;

sys/dev/usb/if_zyd.c

843

zyd_read16(struct zyd_softc *sc, uint16_t reg, uint16_t *val)

sys/dev/usb/if_zyd.c

852

*val = le16toh(tmp.val);

sys/dev/usb/if_zyd.c

854

*val = 0;

sys/dev/usb/if_zyd.c

859

zyd_read32(struct zyd_softc *sc, uint16_t reg, uint32_t *val)

sys/dev/usb/if_zyd.c

870

*val = le16toh(tmp[0].val) << 16 | le16toh(tmp[1].val);

sys/dev/usb/if_zyd.c

872

*val = 0;

sys/dev/usb/if_zyd.c

877

zyd_write16(struct zyd_softc *sc, uint16_t reg, uint16_t val)

sys/dev/usb/if_zyd.c

882

pair.val = htole16(val);

sys/dev/usb/if_zyd.c

888

zyd_write32(struct zyd_softc *sc, uint16_t reg, uint32_t val)

sys/dev/usb/if_zyd.c

893

pair[0].val = htole16(val >> 16);

sys/dev/usb/if_zyd.c

895

pair[1].val = htole16(val & 0xffff);

sys/dev/usb/if_zyd.c

901

zyd_rfwrite(struct zyd_softc *sc, uint32_t val)

sys/dev/usb/if_zyd.c

915

if (val & (1 << (rf->width - 1 - i)))

sys/dev/usb/if_zyd.c

955

error = zyd_write16(sc, phyini[i].reg, phyini[i].val);

sys/dev/usb/if_zydreg.h

1066

uint16_t val;

sys/dev/usb/if_zydreg.h

1103

uint8_t val;

sys/dev/usb/if_zydreg.h

1108

uint32_t val;

sys/dev/usb/motg.c

1079

uint32_t val;

sys/dev/usb/motg.c

1082

val = UREAD1(sc, MUSB2_REG_POWER);

sys/dev/usb/motg.c

1083

val |= MUSB2_MASK_RESET;

sys/dev/usb/motg.c

1084

UWRITE1(sc, MUSB2_REG_POWER, val);

sys/dev/usb/motg.c

1088

val = UREAD1(sc, MUSB2_REG_POWER);

sys/dev/usb/motg.c

1089

val &= ~MUSB2_MASK_RESET;

sys/dev/usb/motg.c

1090

UWRITE1(sc, MUSB2_REG_POWER, val);

sys/dev/usb/motg.c

1093

val = UREAD1(sc, MUSB2_REG_POWER);

sys/dev/usb/motg.c

1094

if (val & MUSB2_MASK_HSMODE)

sys/dev/usb/motg.c

1732

uint32_t val __diagused;

sys/dev/usb/motg.c

1802

val = UREAD1(sc, MUSB2_REG_RXCSRL);

sys/dev/usb/motg.c

1803

KASSERT((val & MUSB2_MASK_CSRL_RXPKTRDY) == 0);

sys/dev/usb/motg.c

1807

val = UREAD1(sc, MUSB2_REG_TXCSRL);

sys/dev/usb/motg.c

1808

KASSERT((val & MUSB2_MASK_CSRL_TXPKTRDY) == 0);

sys/dev/usb/motg.c

1823

uint32_t val;

sys/dev/usb/motg.c

1834

val = UREAD1(sc, MUSB2_REG_RXCSRH);

sys/dev/usb/motg.c

1835

val |= MUSB2_MASK_CSRH_RXDT_WREN;

sys/dev/usb/motg.c

1837

val |= MUSB2_MASK_CSRH_RXDT_VAL;

sys/dev/usb/motg.c

1839

val &= ~MUSB2_MASK_CSRH_RXDT_VAL;

sys/dev/usb/motg.c

1840

UWRITE1(sc, MUSB2_REG_RXCSRH, val);

sys/dev/usb/motg.c

1858

uint32_t val;

sys/dev/usb/motg.c

1896

val = UREAD1(sc, MUSB2_REG_TXCSRH);

sys/dev/usb/motg.c

1897

val |= MUSB2_MASK_CSRH_TXDT_WREN;

sys/dev/usb/motg.c

1899

val |= MUSB2_MASK_CSRH_TXDT_VAL;

sys/dev/usb/motg.c

1901

val &= ~MUSB2_MASK_CSRH_TXDT_VAL;

sys/dev/usb/motg.c

1902

UWRITE1(sc, MUSB2_REG_TXCSRH, val);

sys/dev/usb/motg.c

220

uint8_t val;

sys/dev/usb/motg.c

222

val = UREAD1(sc, MUSB2_REG_POWER);

sys/dev/usb/motg.c

224

val |= MUSB2_MASK_SOFTC;

sys/dev/usb/motg.c

226

val &= ~MUSB2_MASK_SOFTC;

sys/dev/usb/motg.c

228

UWRITE1(sc, MUSB2_REG_POWER, val);

sys/dev/usb/motg.c

273

uint32_t nrx, ntx, val;

sys/dev/usb/motg.c

303

val = UREAD1(sc, MUSB2_REG_DEVCTL);

sys/dev/usb/motg.c

304

val &= ~MUSB2_MASK_SESS;

sys/dev/usb/motg.c

305

UWRITE1(sc, MUSB2_REG_DEVCTL, val);

sys/dev/usb/motg.c

308

val = UREAD1(sc, MUSB2_REG_DEVCTL);

sys/dev/usb/motg.c

309

val |= MUSB2_MASK_SESS;

sys/dev/usb/motg.c

310

UWRITE1(sc, MUSB2_REG_DEVCTL, val);

sys/dev/usb/motg.c

349

val = UREAD1(sc, MUSB2_REG_CONFDATA);

sys/dev/usb/motg.c

351

DPRINTF("Config Data: 0x%02jx", val, 0, 0, 0);

sys/dev/usb/motg.c

353

dynfifo = (val & MUSB2_MASK_CD_DYNFIFOSZ) ? 1 : 0;

sys/dev/usb/motg.c

378

val = UREAD1(sc, MUSB2_REG_FSIZE);

sys/dev/usb/motg.c

379

fiforx_size = (val & MUSB2_MASK_RX_FSIZE) >> 4;

sys/dev/usb/motg.c

380

fifotx_size = (val & MUSB2_MASK_TX_FSIZE);

sys/dev/usb/motg.c

596

uint32_t val;

sys/dev/usb/motg.c

628

val = UREAD1(sc, MUSB2_REG_POWER);

sys/dev/usb/motg.c

629

if (val & MUSB2_MASK_HSMODE)

sys/dev/usb/motg.c

637

val = MUSB2_MASK_IRESET;

sys/dev/usb/motg.c

638

val &= ~MUSB2_MASK_IRESUME;

sys/dev/usb/motg.c

639

val |= MUSB2_MASK_ISUSP;

sys/dev/usb/motg.c

640

UWRITE1(sc, MUSB2_REG_INTUSBE, val);

sys/dev/usb/motg.c

648

val = UREAD1(sc, MUSB2_REG_INTUSBE);

sys/dev/usb/motg.c

650

val &= ~MUSB2_MASK_IRESUME;

sys/dev/usb/motg.c

652

val |= MUSB2_MASK_ISUSP;

sys/dev/usb/motg.c

653

UWRITE1(sc, MUSB2_REG_INTUSBE, val);

sys/dev/usb/motg.c

660

val = UREAD1(sc, MUSB2_REG_INTUSBE);

sys/dev/usb/motg.c

662

val &= ~MUSB2_MASK_ISUSP;

sys/dev/usb/motg.c

664

val |= MUSB2_MASK_IRESUME;

sys/dev/usb/motg.c

665

UWRITE1(sc, MUSB2_REG_INTUSBE, val);

sys/dev/usb/motg.c

732

uint8_t val;

sys/dev/usb/motg.c

738

val = UREAD1(sc, MUSB2_REG_DEVCTL);

sys/dev/usb/motg.c

739

val |= MUSB2_MASK_SESS;

sys/dev/usb/motg.c

740

UWRITE1(sc, MUSB2_REG_DEVCTL, val);

sys/dev/usb/motg.c

805

uint32_t val;

sys/dev/usb/motg.c

851

val = UREAD1(sc, MUSB2_REG_POWER);

sys/dev/usb/motg.c

852

val &= ~MUSB2_MASK_SUSPMODE;

sys/dev/usb/motg.c

853

val |= MUSB2_MASK_RESUME;

sys/dev/usb/motg.c

854

UWRITE1(sc, MUSB2_REG_POWER, val);

sys/dev/usb/motg.c

857

val = UREAD1(sc, MUSB2_REG_POWER);

sys/dev/usb/motg.c

858

val &= ~MUSB2_MASK_RESUME;

sys/dev/usb/motg.c

859

UWRITE1(sc, MUSB2_REG_POWER, val);

sys/dev/usb/motg.c

949

val = UREAD1(sc, MUSB2_REG_POWER);

sys/dev/usb/motg.c

950

val |= MUSB2_MASK_SUSPMODE;

sys/dev/usb/motg.c

951

UWRITE1(sc, MUSB2_REG_POWER, val);

sys/dev/usb/ohci.c

123

#define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)

sys/dev/usb/ohci.c

124

#define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)

sys/dev/usb/ohci.c

125

#define HTOO16(val) O16TOH(val)

sys/dev/usb/ohci.c

126

#define HTOO32(val) O32TOH(val)

sys/dev/usb/pseye.c

532

uint8_t val;

sys/dev/usb/pseye.c

534

val = pseye_getreg(sc, 0x21);

sys/dev/usb/pseye.c

535

pseye_setreg(sc, 0x21, val | 0x80);

sys/dev/usb/pseye.c

537

val = pseye_getreg(sc, 0x23);

sys/dev/usb/pseye.c

539

val |= 0x80;

sys/dev/usb/pseye.c

541

val &= ~0x80;

sys/dev/usb/pseye.c

542

pseye_setreg(sc, 0x23, val);

sys/dev/usb/pseye.c

569

pseye_setreg(struct pseye_softc *sc, uint16_t reg, uint8_t val)

sys/dev/usb/pseye.c

580

err = usbd_do_request(sc->sc_udev, &req, &val);

sys/dev/usb/pseye.c

587

pseye_setregv(struct pseye_softc *sc, uint16_t reg, uint8_t val)

sys/dev/usb/pseye.c

589

pseye_setreg(sc, reg, val);

sys/dev/usb/pseye.c

590

if (pseye_getreg(sc, reg) != val)

sys/dev/usb/pseye.c

596

pseye_sccb_setreg(struct pseye_softc *sc, uint8_t reg, uint8_t val)

sys/dev/usb/pseye.c

599

pseye_setreg(sc, PSEYE_SCCB_WRITE, val);

sys/dev/usb/slurm.c

137

uint16_t val;

sys/dev/usb/slurm.c

139

slurm_getreg(sc, i, &val);

sys/dev/usb/slurm.c

140

device_printf(self, "%02x -> %04x\n", i, val);

sys/dev/usb/slurm.c

209

slurm_getreg(struct slurm_softc *sc, int reg, uint16_t *val)

sys/dev/usb/slurm.c

222

*val = (s[1] << 8) | s[2];

sys/dev/usb/slurm.c

228

slurm_setreg(struct slurm_softc *sc, int reg, uint16_t val)

sys/dev/usb/slurm.c

236

s[1] = (val >> 8) & 0xff;

sys/dev/usb/slurm.c

237

s[2] = (val >> 0) & 0xff;

sys/dev/usb/slurm.c

351

device_printf(sc->sc_dev, "%s 0a -> %04x after %d\n", __func__, val, i);

sys/dev/usb/uaudio.c

3225

int val;

sys/dev/usb/uaudio.c

3245

val = data[0];

sys/dev/usb/uaudio.c

3248

val = data[0];

sys/dev/usb/uaudio.c

3249

val |= data[1] << 8;

sys/dev/usb/uaudio.c

3252

val = data[0];

sys/dev/usb/uaudio.c

3253

val |= data[1] << 8;

sys/dev/usb/uaudio.c

3254

val |= data[2] << 16;

sys/dev/usb/uaudio.c

3257

val = data[0];

sys/dev/usb/uaudio.c

3258

val |= data[1] << 8;

sys/dev/usb/uaudio.c

3259

val |= data[2] << 16;

sys/dev/usb/uaudio.c

3260

val |= data[3] << 24;

sys/dev/usb/uaudio.c

3266

DPRINTFN(2,"val=%d\n", val);

sys/dev/usb/uaudio.c

3267

return val;

sys/dev/usb/uaudio.c

3297

int wIndex, int len, int val)

sys/dev/usb/uaudio.c

3312

data[0] = val;

sys/dev/usb/uaudio.c

3313

data[1] = val >> 8;

sys/dev/usb/uaudio.c

3314

data[2] = val >> 16;

sys/dev/usb/uaudio.c

3315

data[3] = val >> 24;

sys/dev/usb/uaudio.c

3319

type, which, wValue, wIndex, len, val);

sys/dev/usb/uaudio.c

3328

uaudio_signext(int type, int val)

sys/dev/usb/uaudio.c

3333

val = (uint8_t)val;

sys/dev/usb/uaudio.c

3336

val = (uint16_t)val;

sys/dev/usb/uaudio.c

3339

val = ((uint32_t)val << 8) >> 8;

sys/dev/usb/uaudio.c

3342

val = (uint32_t)val;

sys/dev/usb/uaudio.c

3348

val = (int8_t)val;

sys/dev/usb/uaudio.c

3351

val = (int16_t)val;

sys/dev/usb/uaudio.c

3354

val = ((int32_t)val << 8) >> 8;

sys/dev/usb/uaudio.c

3357

val = (int32_t)val;

sys/dev/usb/uaudio.c

3361

return val;

sys/dev/usb/uaudio.c

3365

uaudio_value2bsd(struct mixerctl *mc, int val)

sys/dev/usb/uaudio.c

3368

mc->type, val, mc->ranges[0].minval, mc->ranges[0].maxval);

sys/dev/usb/uaudio.c

3370

val = (val != 0);

sys/dev/usb/uaudio.c

3372

if (val < mc->ranges[0].minval)

sys/dev/usb/uaudio.c

3373

val = mc->ranges[0].minval;

sys/dev/usb/uaudio.c

3374

if (val > mc->ranges[0].maxval)

sys/dev/usb/uaudio.c

3375

val = mc->ranges[0].maxval;

sys/dev/usb/uaudio.c

3377

val = ((uaudio_signext(mc->type, val) - mc->ranges[0].minval)

sys/dev/usb/uaudio.c

3380

val = 0;

sys/dev/usb/uaudio.c

3381

DPRINTFN_CLEAN(5, "val'=%d\n", val);

sys/dev/usb/uaudio.c

3382

return val;

sys/dev/usb/uaudio.c

3386

uaudio_bsd2value(struct mixerctl *mc, int val)

sys/dev/usb/uaudio.c

3391

mc->type, val, mc->ranges[0].minval, mc->ranges[0].maxval);

sys/dev/usb/uaudio.c

3393

val = (val != 0);

sys/dev/usb/uaudio.c

3395

if (val < mc->ranges[0].minval)

sys/dev/usb/uaudio.c

3396

val = mc->ranges[0].minval;

sys/dev/usb/uaudio.c

3397

if (val > mc->ranges[0].maxval)

sys/dev/usb/uaudio.c

3398

val = mc->ranges[0].maxval;

sys/dev/usb/uaudio.c

3400

if (val < 0)

sys/dev/usb/uaudio.c

3401

val = 0;

sys/dev/usb/uaudio.c

3402

else if (val > 255)

sys/dev/usb/uaudio.c

3403

val = 255;

sys/dev/usb/uaudio.c

3405

val = val * (mc->mul + 1) / 256 + mc->ranges[0].minval;

sys/dev/usb/uaudio.c

3412

if (val > r->maxval)

sys/dev/usb/uaudio.c

3414

if (val < r->minval)

sys/dev/usb/uaudio.c

3415

val = r->minval;

sys/dev/usb/uaudio.c

3416

val = (val - r->minval + r->resval/2)

sys/dev/usb/uaudio.c

3422

DPRINTFN_CLEAN(5, "val'=%d\n", val);

sys/dev/usb/uaudio.c

3423

return val;

sys/dev/usb/uaudio.c

3463

int val;

sys/dev/usb/uaudio.c

3467

val = uaudio_get(sc, which, UT_READ_CLASS_INTERFACE, mc->wValue[chan],

sys/dev/usb/uaudio.c

3470

return uaudio_value2bsd(mc, val);

sys/dev/usb/uaudio.c

3475

int chan, int val)

sys/dev/usb/uaudio.c

3479

val = uaudio_bsd2value(mc, val);

sys/dev/usb/uaudio.c

3482

mc->wIndex, MIX_SIZE(mc->type), val);

sys/dev/usb/uaudio.c

3491

int i, n, vals[MIX_MAX_CHAN], val;

sys/dev/usb/uaudio.c

3523

for (val = 0, i = 0; i < mc->nchan; i++)

sys/dev/usb/uaudio.c

3524

val += vals[i];

sys/dev/usb/uaudio.c

3525

vals[0] = val / mc->nchan;

sys/dev/usb/uchcom.c

507

set_dtrrts_10(struct uchcom_softc *sc, uint8_t val)

sys/dev/usb/uchcom.c

509

return write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val);

sys/dev/usb/uchcom.c

513

set_dtrrts_20(struct uchcom_softc *sc, uint8_t val)

sys/dev/usb/uchcom.c

515

return generic_control_out(sc, UCHCOM_REQ_SET_DTRRTS, val, 0);

sys/dev/usb/uchcom.c

571

uint8_t val = 0;

sys/dev/usb/uchcom.c

573

if (dtr) val |= UCHCOM_DTR_MASK;

sys/dev/usb/uchcom.c

574

if (rts) val |= UCHCOM_RTS_MASK;

sys/dev/usb/uchcom.c

577

err = set_dtrrts_10(sc, ~val);

sys/dev/usb/uchcom.c

579

err = set_dtrrts_20(sc, ~val);

sys/dev/usb/udl.c

1635

uint8_t status[4], val;

sys/dev/usb/udl.c

1642

0xc484, 0x0000, &val, 1) != 0)

sys/dev/usb/udl.c

1645

val = 1;

sys/dev/usb/udl.c

1647

0xc41f, 0x0000, &val, 1) != 0)

sys/dev/usb/udl.c

1654

val = 0;

sys/dev/usb/udl.c

1656

0xc40b, 0x0000, &val, 1) != 0)

sys/dev/usb/udl.c

1727

uint16_t val = 0xffff;

sys/dev/usb/udl.c

1730

val = (uint16_t)(val << 1) | ((uint16_t)(

sys/dev/usb/udl.c

1731

(uint16_t)(val << 0) ^

sys/dev/usb/udl.c

1732

(uint16_t)(val << 11) ^

sys/dev/usb/udl.c

1733

(uint16_t)(val << 13) ^

sys/dev/usb/udl.c

1734

(uint16_t)(val << 14)

sys/dev/usb/udl.c

1739

return val;

sys/dev/usb/udl.c

1745

uint16_t val;

sys/dev/usb/udl.c

1758

val = vmp->htotal - vmp->hsync_start;

sys/dev/usb/udl.c

1759

udl_reg_write_2(sc, UDL_REG_XDISPLAYSTART, udl_lfsr(val));

sys/dev/usb/udl.c

1760

val += vmp->hdisplay;

sys/dev/usb/udl.c

1761

udl_reg_write_2(sc, UDL_REG_XDISPLAYEND, udl_lfsr(val));

sys/dev/usb/udl.c

1762

val = vmp->vtotal - vmp->vsync_start;

sys/dev/usb/udl.c

1763

udl_reg_write_2(sc, UDL_REG_YDISPLAYSTART, udl_lfsr(val));

sys/dev/usb/udl.c

1764

val += vmp->vdisplay;

sys/dev/usb/udl.c

1765

udl_reg_write_2(sc, UDL_REG_YDISPLAYEND, udl_lfsr(val));

sys/dev/usb/udl.c

1766

val = vmp->htotal - 1;

sys/dev/usb/udl.c

1767

udl_reg_write_2(sc, UDL_REG_XENDCOUNT, udl_lfsr(val));

sys/dev/usb/udl.c

1768

val = vmp->hsync_end - vmp->hsync_start + 1;

sys/dev/usb/udl.c

1771

udl_reg_write_2(sc, UDL_REG_HSYNCEND, udl_lfsr(val));

sys/dev/usb/udl.c

1773

udl_reg_write_2(sc, UDL_REG_HSYNCSTART, udl_lfsr(val));

sys/dev/usb/udl.c

1776

val = vmp->hdisplay;

sys/dev/usb/udl.c

1777

udl_reg_write_2(sc, UDL_REG_HPIXELS, val);

sys/dev/usb/udl.c

1778

val = vmp->vtotal;

sys/dev/usb/udl.c

1779

udl_reg_write_2(sc, UDL_REG_YENDCOUNT, udl_lfsr(val));

sys/dev/usb/udl.c

1780

val = vmp->vsync_end - vmp->vsync_start;

sys/dev/usb/udl.c

1783

udl_reg_write_2(sc, UDL_REG_VSYNCEND, udl_lfsr(val));

sys/dev/usb/udl.c

1785

udl_reg_write_2(sc, UDL_REG_VSYNCSTART, udl_lfsr(val));

sys/dev/usb/udl.c

1788

val = vmp->vdisplay;

sys/dev/usb/udl.c

1789

udl_reg_write_2(sc, UDL_REG_VPIXELS, val);

sys/dev/usb/udl.c

1790

val = vmp->dot_clock / 5;

sys/dev/usb/udl.c

1791

udl_reg_write_2(sc, UDL_REG_PIXELCLOCK5KHZ, bswap16(val));

sys/dev/usb/udl.c

186

udl_cmd_add_1(struct udl_softc *sc, uint8_t val)

sys/dev/usb/udl.c

189

*sc->sc_cmd_buf++ = val;

sys/dev/usb/udl.c

193

udl_cmd_add_2(struct udl_softc *sc, uint16_t val)

sys/dev/usb/udl.c

196

be16enc(sc->sc_cmd_buf, val);

sys/dev/usb/udl.c

201

udl_cmd_add_3(struct udl_softc *sc, uint32_t val)

sys/dev/usb/udl.c

204

udl_cmd_add_2(sc, val >> 8);

sys/dev/usb/udl.c

205

udl_cmd_add_1(sc, val);

sys/dev/usb/udl.c

209

udl_cmd_add_4(struct udl_softc *sc, uint32_t val)

sys/dev/usb/udl.c

212

be32enc(sc->sc_cmd_buf, val);

sys/dev/usb/udl.c

242

udl_reg_write_1(struct udl_softc *sc, uint8_t reg, uint8_t val)

sys/dev/usb/udl.c

246

(UDL_BULK_CMD_REG_WRITE_1 << 16) | (reg << 8) | val);

sys/dev/usb/udl.c

250

udl_reg_write_2(struct udl_softc *sc, uint8_t reg, uint16_t val)

sys/dev/usb/udl.c

253

udl_reg_write_1(sc, reg++, val >> 8);

sys/dev/usb/udl.c

254

udl_reg_write_1(sc, reg, val);

sys/dev/usb/udl.c

258

udl_reg_write_3(struct udl_softc *sc, uint8_t reg, uint32_t val)

sys/dev/usb/udl.c

261

udl_reg_write_1(sc, reg++, val >> 16);

sys/dev/usb/udl.c

262

udl_reg_write_1(sc, reg++, val >> 8);

sys/dev/usb/udl.c

263

udl_reg_write_1(sc, reg, val);

sys/dev/usb/uhso.c

1279

int val;

sys/dev/usb/uhso.c

1286

val = 0;

sys/dev/usb/uhso.c

1288

SET(val, UCDC_LINE_DTR);

sys/dev/usb/uhso.c

1290

SET(val, UCDC_LINE_RTS);

sys/dev/usb/uhso.c

1294

USETW(req.wValue, val);

sys/dev/usb/umct.c

455

u_int val;

sys/dev/usb/umct.c

460

case 300: val = 0x01; break;

sys/dev/usb/umct.c

461

case 600: val = 0x02; break;

sys/dev/usb/umct.c

462

case 1200: val = 0x03; break;

sys/dev/usb/umct.c

463

case 2400: val = 0x04; break;

sys/dev/usb/umct.c

464

case 4800: val = 0x06; break;

sys/dev/usb/umct.c

465

case 9600: val = 0x08; break;

sys/dev/usb/umct.c

466

case 19200: val = 0x09; break;

sys/dev/usb/umct.c

467

case 38400: val = 0x0a; break;

sys/dev/usb/umct.c

468

case 57600: val = 0x0b; break;

sys/dev/usb/umct.c

469

case 115200: val = 0x0c; break;

sys/dev/usb/umct.c

470

default: val = -1; break;

sys/dev/usb/umct.c

473

val = UMCT_BAUD_RATE(rate);

sys/dev/usb/umct.c

475

USETDW(arate, val);

sys/dev/usb/uplcom.c

283

uint8_t val;

sys/dev/usb/uplcom.c

329

err = usbd_do_request(sc->sc_udev, &req, &val);

sys/dev/usb/usb.h

80

#define USETWD(val) { (uint8_t)(val), (uint8_t)((val) >> 8) }

sys/dev/usb/usbnet.c

205

uno_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)

sys/dev/usb/usbnet.c

208

return (*un->un_ops->uno_read_reg)(un, phy, reg, val);

sys/dev/usb/usbnet.c

212

uno_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)

sys/dev/usb/usbnet.c

215

return (*un->un_ops->uno_write_reg)(un, phy, reg, val);

sys/dev/usb/usbnet.c

921

usbnet_mii_readreg(device_t dev, int phy, int reg, uint16_t *val)

sys/dev/usb/usbnet.c

934

err = uno_read_reg(un, phy, reg, val);

sys/dev/usb/usbnet.c

945

usbnet_mii_writereg(device_t dev, int phy, int reg, uint16_t val)

sys/dev/usb/usbnet.c

958

err = uno_write_reg(un, phy, reg, val);

sys/dev/usb/usbnet.h

134

int phy, uint16_t *val);

sys/dev/usb/usbnet.h

137

int phy, uint16_t val);

sys/dev/usb/uthum.c

393

int val;

sys/dev/usb/uthum.c

395

val = (msb << 8) | lsb;

sys/dev/usb/uthum.c

396

if (val >= 32768) {

sys/dev/usb/uthum.c

397

val = val - 65536;

sys/dev/usb/uthum.c

399

val = (val * 100) >> 8;

sys/dev/usb/uthum.c

400

return val;

sys/dev/usb/uthum.c

407

int val;

sys/dev/usb/uthum.c

409

val = ((msb << 8) + lsb) - 4096;

sys/dev/usb/uthum.c

410

return val;

sys/dev/usb/xhci.c

292

uint32_t val;

sys/dev/usb/xhci.c

293

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset & ~3);

sys/dev/usb/xhci.c

294

return (val >> ((offset & 3) * NBBY)) & 0xff;

sys/dev/usb/xhci.c

304

uint32_t val;

sys/dev/usb/xhci.c

305

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset & ~3);

sys/dev/usb/xhci.c

306

return (val >> ((offset & 3) * NBBY)) & 0xffff;

sys/dev/usb/xhci.c

324

uint32_t val;

sys/dev/usb/xhci.c

325

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset & ~3);

sys/dev/usb/xhci.c

326

val &= ~mask;

sys/dev/usb/xhci.c

327

val |= __SHIFTIN(value, mask);

sys/dev/usb/xhci.c

328

bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset & ~3, val);

sys/dev/videomode/vesagtf.c

193

print_value(int n, const char *name, unsigned val)

sys/dev/videomode/vesagtf.c

195

printf("%2d: %-27s: %u\n", n, name, val);

sys/dev/videomode/vesagtf.c

198

#define print_value(n, name, val)

sys/dev/virtio/virtio_mmio.c

134

uint32_t val;

sys/dev/virtio/virtio_mmio.c

136

val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg);

sys/dev/virtio/virtio_mmio.c

138

val = le32toh(val);

sys/dev/virtio/virtio_mmio.c

140

return val;

sys/dev/virtio/virtio_mmio.c

145

uint32_t val)

sys/dev/virtio/virtio_mmio.c

148

val = htole32(val);

sys/dev/virtio/virtio_mmio.c

150

bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);

sys/dev/vme/if_ie_vme.c

247

#define write_iev(sc, reg, val) \

sys/dev/vme/if_ie_vme.c

248

bus_space_write_2(sc->ievt, sc->ievh, offsetof(struct ievme, reg), val)

sys/dev/wsfb/genfb.c

475

int new_mode, error, val, ret;

sys/dev/wsfb/genfb.c

565

val = param->curval;

sys/dev/wsfb/genfb.c

566

if (val < 0)

sys/dev/wsfb/genfb.c

567

val = 0;

sys/dev/wsfb/genfb.c

568

if (val > 255)

sys/dev/wsfb/genfb.c

569

val = 255;

sys/dev/wsfb/genfb.c

571

scp->sc_brightness->gpc_cookie, val);

sys/dev/wsfb/genfb.c

575

val = param->curval;

sys/dev/wsfb/genfb.c

576

if (val < 0)

sys/dev/wsfb/genfb.c

577

val = 0;

sys/dev/wsfb/genfb.c

578

if (val > 1)

sys/dev/wsfb/genfb.c

579

val = 1;

sys/dev/wsfb/genfb.c

581

scp->sc_backlight->gpc_cookie, val);

sys/dist/pf/netinet/tcp_rndiss.c

101

return val;

sys/dist/pf/netinet/tcp_rndiss.c

91

tcp_rndiss_encrypt(u_int16_t val)

sys/dist/pf/netinet/tcp_rndiss.c

97

val ^= ((u_int16_t)tcp_rndiss_sbox[(val^sum) & 0x7f]) << 7;

sys/dist/pf/netinet/tcp_rndiss.c

98

val = ((val & 0xff) << 7) | (val >> 8);

sys/fs/adosfs/adutil.c

151

int val;

sys/fs/adosfs/adutil.c

153

val = namlen;

sys/fs/adosfs/adutil.c

155

val = ((val * 13) + CapitalChar(*nam++, inter)) & 0x7ff;

sys/fs/adosfs/adutil.c

156

return(val % nelt);

sys/fs/nfs/client/nfs_clport.c

500

if (vp->v_mount->mnt_stat.f_fsid.val[0] !=

sys/fs/nfs/client/nfs_clport.c

507

vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];

sys/fs/nfs/client/nfs_clvfsops.c

1799

val = (nmp->nm_flag & NFSMNT_NOLOCKS) ? 1 : 0;

sys/fs/nfs/client/nfs_clvfsops.c

1801

error = SYSCTL_OUT(req, &val, sizeof(val));

sys/fs/nfs/client/nfs_clvfsops.c

1806

error = SYSCTL_IN(req, &val, sizeof(val));

sys/fs/nfs/client/nfs_clvfsops.c

1809

if (val)

sys/fs/nfs/common/bootp_subr.c

1147

int val;

sys/fs/nfs/common/bootp_subr.c

1151

if (((val = getdec(&p)) < 0) || (val > 255))

sys/fs/nfs/common/bootp_subr.c

1153

ip = val << 24;

sys/fs/nfs/common/bootp_subr.c

1157

if (((val = getdec(&p)) < 0) || (val > 255))

sys/fs/nfs/common/bootp_subr.c

1159

ip |= (val << 16);

sys/fs/nfs/common/bootp_subr.c

1163

if (((val = getdec(&p)) < 0) || (val > 255))

sys/fs/nfs/common/bootp_subr.c

1165

ip |= (val << 8);

sys/fs/nfs/common/bootp_subr.c

1169

if (((val = getdec(&p)) < 0) || (val > 255))

sys/fs/nfs/common/bootp_subr.c

1171

ip |= val;

sys/fs/nfs/common/nfs_commonsubs.c

1035

vfs_statfs(vnode_mount(vp))->f_fsid.val[0] ||

sys/fs/nfs/common/nfs_commonsubs.c

1037

vfs_statfs(vnode_mount(vp))->f_fsid.val[1])

sys/fs/nfs/common/nfs_commonsubs.c

2197

*tl++ = txdr_unsigned(mp->mnt_stat.f_fsid.val[0]);

sys/fs/nfs/common/nfs_commonsubs.c

2199

*tl = txdr_unsigned(mp->mnt_stat.f_fsid.val[1]);

sys/fs/nfs/common/nfs_commonsubs.c

3631

u_int32_t val = 0x0;

sys/fs/nfs/common/nfs_commonsubs.c

3657

val <<= 6;

sys/fs/nfs/common/nfs_commonsubs.c

3658

val |= (*cp & 0x3f);

sys/fs/nfs/common/nfs_commonsubs.c

3660

if (cnt == 0 && (val >> shift) == 0x0) {

sys/fs/nfs/common/nfs_commonsubs.c

3675

val = (*cp & (0x3f >> cnt));

sys/fs/nfs/common/nfs_commonsubs.c

3677

if (cnt == 2 && val == 0xd)

sys/fs/nfs/common/nfs_diskless.c

401

int len, val;

sys/fs/nfs/common/nfs_diskless.c

417

if ((sscanf(cp, "%2x", &val) != 1) || (val > 0xff)) {

sys/fs/nfs/common/nfs_diskless.c

421

*(fh++) = val;

sys/fs/nfs/common/nfsclstate.h

354

nfsfldi_setstripeindex(struct nfscldevinfo *ndi, int pos, uint8_t val)

sys/fs/nfs/common/nfsclstate.h

362

*valp = val;

sys/fs/nfs/common/nfsdport.h

88

((f1)->fh_fsid.val[0] == (f2)->fh_fsid.val[0] && \

sys/fs/nfs/common/nfsdport.h

89

(f1)->fh_fsid.val[1] == (f2)->fh_fsid.val[1] && \

sys/fs/nfs/server/nfs_nfsdsocket.c

1016

} else if (cur_fsid.val[0] != save_fsid.val[0] ||

sys/fs/nfs/server/nfs_nfsdsocket.c

1017

cur_fsid.val[1] != save_fsid.val[1]) {

sys/fs/nfs/server/nfs_nfsdsocket.c

731

save_fsid.val[0] = save_fsid.val[1] = 0;

sys/fs/nfs/server/nfs_nfsdsocket.c

732

cur_fsid.val[0] = cur_fsid.val[1] = 0;

sys/fs/nfs/server/nfs_nfsdsocket.c

984

if (cur_fsid.val[0] !=

sys/fs/nfs/server/nfs_nfsdsocket.c

985

new_mp->mnt_stat.f_fsid.val[0] ||

sys/fs/nfs/server/nfs_nfsdsocket.c

986

cur_fsid.val[1] !=

sys/fs/nfs/server/nfs_nfsdsocket.c

987

new_mp->mnt_stat.f_fsid.val[1]) {

sys/fs/nfs/server/nfs_nfsdsubs.c

1839

char *fromcp, *tocp, val = '\0';

sys/fs/nfs/server/nfs_nfsdsubs.c

1949

val = (digit << 4);

sys/fs/nfs/server/nfs_nfsdsubs.c

1952

val += digit;

sys/fs/nfs/server/nfs_nfsdsubs.c

1954

*tocp++ = val;

sys/fs/nfs/server/nfs_nfsdsubs.c

1955

hash += ((u_char)val);

sys/fs/ntfs/ntfs_ihash.c

79

u_long oldmask, mask, val;

sys/fs/ntfs/ntfs_ihash.c

92

val = NTNOHASH(ip->i_dev, ip->i_number);

sys/fs/ntfs/ntfs_ihash.c

93

LIST_INSERT_HEAD(&hash[val], ip, i_hash);

sys/fs/union/union_subr.c

129

u_long oldmask, mask, val;

sys/fs/union/union_subr.c

141

val = UNION_HASH(un->un_uppervp, un->un_lowervp);

sys/fs/union/union_subr.c

142

LIST_INSERT_HEAD(&hash[val], un, un_cache);

sys/fs/v7fs/v7fs_endian.c

163

struct endian_conversion_ops *ops = &fs->val;

sys/fs/v7fs/v7fs_endian.h

41

#define V7FS_VAL32(x, v) ((*(x)->val.conv32)(v))

sys/fs/v7fs/v7fs_endian.h

42

#define V7FS_VAL16(x, v) ((*(x)->val.conv16)(v))

sys/fs/v7fs/v7fs_endian.h

43

#define V7FS_VAL24_READ(x, a) ((*(x)->val.conv24read)(a))

sys/fs/v7fs/v7fs_endian.h

44

#define V7FS_VAL24_WRITE(x, v, a) ((*(x)->val.conv24write)(v, a))

sys/fs/v7fs/v7fs_impl.h

109

struct endian_conversion_ops val;

sys/kern/kern_event.c

270

#define KN_HASH(val, mask) (((val) ^ (val >> 8)) & (mask))

sys/kern/kern_ksyms.c

1477

unsigned long val;

sys/kern/kern_ksyms.c

1500

error = ksyms_getval(NULL, str, &val, KSYMS_EXTERN);

sys/kern/kern_ksyms.c

1502

error = copyout(&val, okg->kg_value, sizeof(long));

sys/kern/kern_ksyms.c

1541

error = ksyms_getval(NULL, str, &val, KSYMS_EXTERN);

sys/kern/kern_ksyms.c

1543

kv->kv_value = val;

sys/kern/kern_ksyms.c

638

unsigned long *val, int type)

sys/kern/kern_ksyms.c

646

printf("%s: mod %s sym %s valp %p\n", __func__, mod, sym, val);

sys/kern/kern_ksyms.c

655

*val = es->st_value;

sys/kern/kern_ksyms.c

667

ksyms_getval(const char *mod, const char *sym, unsigned long *val, int type)

sys/kern/kern_ksyms.c

674

return ksyms_getval_unlocked(mod, sym, NULL, val, type);

sys/kern/kern_threadpool.c

303

int val, error;

sys/kern/kern_threadpool.c

307

val = threadpool_idle_time_ms;

sys/kern/kern_threadpool.c

308

node.sysctl_data = &val;

sys/kern/kern_threadpool.c

312

if (val < 1)

sys/kern/kern_threadpool.c

315

threadpool_idle_time_ms = val;

sys/kern/kern_time.c

1402

struct itimerspec val;

sys/kern/kern_time.c

1411

val = *value;

sys/kern/kern_time.c

1412

if (itimespecfix(&val.it_value) != 0 ||

sys/kern/kern_time.c

1413

itimespecfix(&val.it_interval) != 0)

sys/kern/kern_time.c

1425

it->it_time = val;

sys/kern/subr_asan.c

762

void kasan_atomic_add_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_asan.c

766

atomic_add_##name(ptr, val); \

sys/kern/subr_asan.c

770

tret kasan_atomic_add_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_asan.c

774

return atomic_add_##name##_nv(ptr, val); \

sys/kern/subr_asan.c

780

void kasan_atomic_and_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_asan.c

784

atomic_and_##name(ptr, val); \

sys/kern/subr_asan.c

788

tret kasan_atomic_and_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_asan.c

792

return atomic_and_##name##_nv(ptr, val); \

sys/kern/subr_asan.c

798

void kasan_atomic_or_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_asan.c

802

atomic_or_##name(ptr, val); \

sys/kern/subr_asan.c

806

tret kasan_atomic_or_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_asan.c

810

return atomic_or_##name##_nv(ptr, val); \

sys/kern/subr_asan.c

834

tret kasan_atomic_swap_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_asan.c

838

return atomic_swap_##name(ptr, val); \

sys/kern/subr_copy.c

752

ustore_8(uint8_t *uaddr, uint8_t val)

sys/kern/subr_copy.c

757

return _ustore_8(uaddr, val);

sys/kern/subr_copy.c

761

ustore_16(uint16_t *uaddr, uint16_t val)

sys/kern/subr_copy.c

766

return _ustore_16(uaddr, val);

sys/kern/subr_copy.c

770

ustore_32(uint32_t *uaddr, uint32_t val)

sys/kern/subr_copy.c

775

return _ustore_32(uaddr, val);

sys/kern/subr_copy.c

780

ustore_64(uint64_t *uaddr, uint64_t val)

sys/kern/subr_copy.c

785

return _ustore_64(uaddr, val);

sys/kern/subr_csan.c

447

void kcsan_atomic_add_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_csan.c

451

atomic_add_##name(ptr, val); \

sys/kern/subr_csan.c

455

tret kcsan_atomic_add_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_csan.c

459

return atomic_add_##name##_nv(ptr, val); \

sys/kern/subr_csan.c

465

void kcsan_atomic_and_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_csan.c

469

atomic_and_##name(ptr, val); \

sys/kern/subr_csan.c

473

tret kcsan_atomic_and_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_csan.c

477

return atomic_and_##name##_nv(ptr, val); \

sys/kern/subr_csan.c

483

void kcsan_atomic_or_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_csan.c

487

atomic_or_##name(ptr, val); \

sys/kern/subr_csan.c

491

tret kcsan_atomic_or_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_csan.c

495

return atomic_or_##name##_nv(ptr, val); \

sys/kern/subr_csan.c

519

tret kcsan_atomic_swap_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_csan.c

523

return atomic_swap_##name(ptr, val); \

sys/kern/subr_device.c

1031

name ## _t val; \

sys/kern/subr_device.c

1033

return device_getprop_ ## name ## _internal(dev, prop, &val) \

sys/kern/subr_device.c

1034

? defval : val; \

sys/kern/subr_device.c

1093

device_setprop_bool(device_t dev, const char *prop, bool val)

sys/kern/subr_device.c

1095

return prop_dictionary_set_bool(dev->dv_properties, prop, val);

sys/kern/subr_device.c

1103

device_setprop_int32(device_t dev, const char *prop, int32_t val)

sys/kern/subr_device.c

1105

return prop_dictionary_set_int32(dev->dv_properties, prop, val);

sys/kern/subr_device.c

1114

device_setprop_uint32(device_t dev, const char *prop, uint32_t val)

sys/kern/subr_device.c

1116

return prop_dictionary_set_uint32(dev->dv_properties, prop, val);

sys/kern/subr_device.c

1125

device_setprop_int64(device_t dev, const char *prop, int64_t val)

sys/kern/subr_device.c

1127

return prop_dictionary_set_int64(dev->dv_properties, prop, val);

sys/kern/subr_device.c

1135

device_setprop_uint64(device_t dev, const char *prop, uint64_t val)

sys/kern/subr_device.c

1137

return prop_dictionary_set_uint64(dev->dv_properties, prop, val);

sys/kern/subr_device.c

833

bool val;

sys/kern/subr_device.c

836

.buf = &val,

sys/kern/subr_device.c

837

.buflen = sizeof(val),

sys/kern/subr_device.c

855

return val;

sys/kern/subr_kcov.c

755

void __sanitizer_cov_trace_switch(uint64_t val, uint64_t *cases);

sys/kern/subr_kcov.c

758

__sanitizer_cov_trace_switch(uint64_t val, uint64_t *cases)

sys/kern/subr_kcov.c

786

trace_cmp(type, cases[i + 2], val, pc);

sys/kern/subr_kobj.c

897

kobj_sym_lookup(kobj_t ko, uintptr_t symidx, Elf_Addr *val)

sys/kern/subr_kobj.c

905

*val = (uintptr_t)sym->st_value;

sys/kern/subr_kobj.c

919

*val = (uintptr_t)sym->st_value;

sys/kern/subr_kobj.c

947

*val = (uintptr_t)sym->st_value;

sys/kern/subr_msan.c

1060

kmsan__ustore_8(uint8_t *uaddr, uint8_t val)

sys/kern/subr_msan.c

1062

kmsan_check_arg(sizeof(uaddr) + sizeof(val), "ustore_8():args");

sys/kern/subr_msan.c

1064

return _ustore_8(uaddr, val);

sys/kern/subr_msan.c

1070

kmsan__ustore_16(uint16_t *uaddr, uint16_t val)

sys/kern/subr_msan.c

1072

kmsan_check_arg(sizeof(uaddr) + sizeof(val), "ustore_16():args");

sys/kern/subr_msan.c

1074

return _ustore_16(uaddr, val);

sys/kern/subr_msan.c

1080

kmsan__ustore_32(uint32_t *uaddr, uint32_t val)

sys/kern/subr_msan.c

1082

kmsan_check_arg(sizeof(uaddr) + sizeof(val), "ustore_32():args");

sys/kern/subr_msan.c

1084

return _ustore_32(uaddr, val);

sys/kern/subr_msan.c

1091

kmsan__ustore_64(uint64_t *uaddr, uint64_t val)

sys/kern/subr_msan.c

1093

kmsan_check_arg(sizeof(uaddr) + sizeof(val), "ustore_64():args");

sys/kern/subr_msan.c

1095

return _ustore_64(uaddr, val);

sys/kern/subr_msan.c

1166

void kmsan_atomic_add_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_msan.c

1168

kmsan_check_arg(sizeof(ptr) + sizeof(val), \

sys/kern/subr_msan.c

1172

atomic_add_##name(ptr, val); \

sys/kern/subr_msan.c

1176

tret kmsan_atomic_add_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_msan.c

1178

kmsan_check_arg(sizeof(ptr) + sizeof(val), \

sys/kern/subr_msan.c

1183

return atomic_add_##name##_nv(ptr, val); \

sys/kern/subr_msan.c

1189

void kmsan_atomic_and_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_msan.c

1191

kmsan_check_arg(sizeof(ptr) + sizeof(val), \

sys/kern/subr_msan.c

1195

atomic_and_##name(ptr, val); \

sys/kern/subr_msan.c

1199

tret kmsan_atomic_and_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_msan.c

1201

kmsan_check_arg(sizeof(ptr) + sizeof(val), \

sys/kern/subr_msan.c

1206

return atomic_and_##name##_nv(ptr, val); \

sys/kern/subr_msan.c

1212

void kmsan_atomic_or_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_msan.c

1214

kmsan_check_arg(sizeof(ptr) + sizeof(val), \

sys/kern/subr_msan.c

1218

atomic_or_##name(ptr, val); \

sys/kern/subr_msan.c

1222

tret kmsan_atomic_or_##name##_nv(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_msan.c

1224

kmsan_check_arg(sizeof(ptr) + sizeof(val), \

sys/kern/subr_msan.c

1229

return atomic_or_##name##_nv(ptr, val); \

sys/kern/subr_msan.c

1259

tret kmsan_atomic_swap_##name(volatile targ1 *ptr, targ2 val) \

sys/kern/subr_msan.c

1261

kmsan_check_arg(sizeof(ptr) + sizeof(val), \

sys/kern/subr_msan.c

1266

return atomic_swap_##name(ptr, val); \

sys/kern/subr_thmap.c

214

void * val;

sys/kern/subr_thmap.c

498

leaf_create(const thmap_t *thmap, const void *key, size_t len, void *val)

sys/kern/subr_thmap.c

526

leaf->val = val;

sys/kern/subr_thmap.c

723

return leaf->val;

sys/kern/subr_thmap.c

733

thmap_put(thmap_t *thmap, const void *key, size_t len, void *val)

sys/kern/subr_thmap.c

744

leaf = leaf_create(thmap, key, len, val);

sys/kern/subr_thmap.c

756

return val;

sys/kern/subr_thmap.c

799

val = other->val;

sys/kern/subr_thmap.c

811

val = NULL;

sys/kern/subr_thmap.c

856

return val;

sys/kern/subr_thmap.c

869

void *val;

sys/kern/subr_thmap.c

959

val = leaf->val;

sys/kern/subr_thmap.c

964

return val;

sys/kern/subr_userconf.c

130

userconf_hist_int(int val)

sys/kern/subr_userconf.c

132

snprintf(userconf_histbuf, sizeof(userconf_histbuf), " %d", val);

sys/kern/subr_userconf.c

152

userconf_pnum(int val)

sys/kern/subr_userconf.c

154

if (val > -2 && val < 16) {

sys/kern/subr_userconf.c

155

printf("%d",val);

sys/kern/subr_userconf.c

159

printf("0%o",val);

sys/kern/subr_userconf.c

162

printf("%d",val);

sys/kern/subr_userconf.c

166

printf("0x%x",val);

sys/kern/subr_userconf.c

257

userconf_number(char *c, int *val)

sys/kern/subr_userconf.c

295

*val = neg ? - num : num;

sys/kern/subr_userconf.c

341

userconf_modify(const struct cflocdesc *item, int *val)

sys/kern/subr_userconf.c

349

if (item->cld_defaultstr && (*val == item->cld_default))

sys/kern/subr_userconf.c

352

userconf_pnum(*val);

sys/kern/subr_userconf.c

363

*val = item->cld_default;

sys/kern/subr_userconf.c

368

*val = a;

sys/kern/subr_userconf.c

650

userconf_add_read(char *prompt, char field, char *dev, int len, int *val)

sys/kern/subr_userconf.c

656

*val = -1;

sys/kern/subr_userconf.c

676

*val = a;

sys/kern/sys_eventfd.c

550

do_eventfd(struct lwp * const l, unsigned int const val, int const flags,

sys/kern/sys_eventfd.c

570

fp->f_eventfd = eventfd_create(val, flags);

sys/kern/sys_eventfd.c

587

return do_eventfd(l, SCARG(uap, val), SCARG(uap, flags), retval);

sys/kern/sys_eventfd.c

90

eventfd_create(unsigned int const val, int const flags)

sys/kern/sys_eventfd.c

99

efd->efd_val = val;

sys/kern/sys_futex.c

1667

do_futex(int *uaddr, int op, int val, const struct timespec *timeout,

sys/kern/sys_futex.c

1678

const int cmpval = val;

sys/kern/sys_futex.c

1685

const int nwake = val;

sys/kern/sys_futex.c

1691

const int nwake = val;

sys/kern/sys_futex.c

1698

const int nwake = val;

sys/kern/sys_futex.c

1706

const int cmpval = val;

sys/kern/sys_futex.c

1713

const int nwake = val;

sys/kern/sys_futex.c

1759

return do_futex(SCARG(uap, uaddr), SCARG(uap, op), SCARG(uap, val),

sys/kern/sys_futex.c

2045

uintptr_t val = 0;

sys/kern/sys_futex.c

2054

val = val32;

sys/kern/sys_futex.c

2057

error = ufetch_long((u_long *)uaddr, (u_long *)&val);

sys/kern/sys_futex.c

2061

futex_decode_robust_word(val, valp, is_pi);

sys/kern/sys_futex.c

308

int val;

sys/kern/sys_futex.c

311

error = futex_load(uaddr, &val);

sys/kern/sys_futex.c

314

return val == expected;

sys/kern/systrace_args.c

1208

iarg[2] = SCARG(p, val); /* int */

sys/kern/systrace_args.c

1441

uarg[3] = (intptr_t) SCARG(p, val); /* void * */

sys/kern/systrace_args.c

1996

uarg[0] = SCARG(p, val); /* unsigned int */

sys/kern/systrace_args.c

788

uarg[3] = (intptr_t) SCARG(p, val); /* const void * */

sys/kern/systrace_args.c

879

uarg[3] = (intptr_t) SCARG(p, val); /* void * */

sys/kern/sysv_sem.c

664

if ((unsigned int)arg->val > seminfo.semvmx) {

sys/kern/sysv_sem.c

668

semaptr->_sem_base[semnum].semval = arg->val;

sys/kern/tty.c

3177

tty_setctrlchar(struct tty *tp, unsigned which, unsigned char val)

sys/kern/tty.c

3180

tp->t_cc[which] = val;

sys/kern/uipc_sem.c

1024

unsigned int val;

sys/kern/uipc_sem.c

1031

val = ks->ks_value;

sys/kern/uipc_sem.c

1034

return copyout(&val, SCARG(uap, value), sizeof(val));

sys/kern/uipc_sem.c

441

ksem_create(lwp_t *l, const char *name, ksem_t **ksret, mode_t mode, u_int val)

sys/kern/uipc_sem.c

453

if (val > SEM_VALUE_MAX) {

sys/kern/uipc_sem.c

479

ks->ks_value = val;

sys/kern/uipc_sem.c

557

do_ksem_init(lwp_t *l, u_int val, intptr_t *idp, copyin_t docopyin,

sys/kern/uipc_sem.c

596

error = ksem_create(l, NULL, &ks, 0, val);

sys/kern/uipc_socket.c

1928

const void *val, size_t valsize)

sys/kern/uipc_socket.c

1933

KASSERT(valsize == 0 || val != NULL);

sys/kern/uipc_socket.c

1936

sockopt_set(&sopt, val, valsize);

sys/kern/uipc_socket.c

2138

sockopt_setint(struct sockopt *sopt, int val)

sys/kern/uipc_socket.c

2141

return sockopt_set(sopt, &val, sizeof(int));

sys/kern/uipc_syscalls.c

1159

if (len > 0 && SCARG(uap, val) == NULL)

sys/kern/uipc_syscalls.c

1171

error = copyin(SCARG(uap, val), sopt.sopt_data, len);

sys/kern/uipc_syscalls.c

1198

if (SCARG(uap, val) != NULL) {

sys/kern/uipc_syscalls.c

1213

error = copyin(SCARG(uap, val), sopt.sopt_data, valsize);

sys/kern/uipc_syscalls.c

1228

error = copyout(sopt.sopt_data, SCARG(uap, val), len);

sys/kern/vfs_quotactl.c

73

struct quotaval *val)

sys/kern/vfs_quotactl.c

79

args.u.get.qc_val = val;

sys/kern/vfs_quotactl.c

85

const struct quotaval *val)

sys/kern/vfs_quotactl.c

91

args.u.put.qc_val = val;

sys/lib/libsa/byteorder.c

104

sa_htobe32(uint32_t val)

sys/lib/libsa/byteorder.c

108

un.bytes[3] = val & 0xff;

sys/lib/libsa/byteorder.c

109

un.bytes[2] = (val >> 8) & 0xff;

sys/lib/libsa/byteorder.c

110

un.bytes[1] = (val >> 16) & 0xff;

sys/lib/libsa/byteorder.c

111

un.bytes[0] = (val >> 24) & 0xff;

sys/lib/libsa/byteorder.c

113

return un.val;

sys/lib/libsa/byteorder.c

117

sa_htole32(uint32_t val)

sys/lib/libsa/byteorder.c

121

un.bytes[0] = val & 0xff;

sys/lib/libsa/byteorder.c

122

un.bytes[1] = (val >> 8) & 0xff;

sys/lib/libsa/byteorder.c

123

un.bytes[2] = (val >> 16) & 0xff;

sys/lib/libsa/byteorder.c

124

un.bytes[3] = (val >> 24) & 0xff;

sys/lib/libsa/byteorder.c

126

return un.val;

sys/lib/libsa/byteorder.c

130

sa_be32toh(uint32_t val)

sys/lib/libsa/byteorder.c

134

un.val = val;

sys/lib/libsa/byteorder.c

143

sa_le32toh(uint32_t val)

sys/lib/libsa/byteorder.c

147

un.val = val;

sys/lib/libsa/byteorder.c

158

sa_htobe64(uint64_t val)

sys/lib/libsa/byteorder.c

162

un.words[BE64_HI] = sa_htobe32(val >> 32);

sys/lib/libsa/byteorder.c

163

un.words[BE64_LO] = sa_htobe32(val & 0xffffffffU);

sys/lib/libsa/byteorder.c

165

return un.val;

sys/lib/libsa/byteorder.c

169

sa_htole64(uint64_t val)

sys/lib/libsa/byteorder.c

173

un.words[LE64_HI] = sa_htole32(val >> 32);

sys/lib/libsa/byteorder.c

174

un.words[LE64_LO] = sa_htole32(val & 0xffffffffU);

sys/lib/libsa/byteorder.c

176

return un.val;

sys/lib/libsa/byteorder.c

180

sa_be64toh(uint64_t val)

sys/lib/libsa/byteorder.c

185

un.val = val;

sys/lib/libsa/byteorder.c

196

sa_le64toh(uint64_t val)

sys/lib/libsa/byteorder.c

201

un.val = val;

sys/lib/libsa/byteorder.c

41

uint16_t val;

sys/lib/libsa/byteorder.c

46

uint32_t val;

sys/lib/libsa/byteorder.c

51

uint64_t val;

sys/lib/libsa/byteorder.c

58

sa_htobe16(uint16_t val)

sys/lib/libsa/byteorder.c

62

un.bytes[1] = val & 0xff;

sys/lib/libsa/byteorder.c

63

un.bytes[0] = (val >> 8) & 0xff;

sys/lib/libsa/byteorder.c

65

return un.val;

sys/lib/libsa/byteorder.c

69

sa_htole16(uint16_t val)

sys/lib/libsa/byteorder.c

73

un.bytes[0] = val & 0xff;

sys/lib/libsa/byteorder.c

74

un.bytes[1] = (val >> 8) & 0xff;

sys/lib/libsa/byteorder.c

76

return un.val;

sys/lib/libsa/byteorder.c

80

sa_be16toh(uint16_t val)

sys/lib/libsa/byteorder.c

84

un.val = val;

sys/lib/libsa/byteorder.c

91

sa_le16toh(uint16_t val)

sys/lib/libsa/byteorder.c

95

un.val = val;

sys/lib/libsa/netif.c

131

val = netif_match(&cur_if, machdep_hint);

sys/lib/libsa/netif.c

134

printf(" [%d -> %d]", s, val);

sys/lib/libsa/netif.c

136

if (val > best_val) {

sys/lib/libsa/netif.c

137

best_val = val;

sys/lib/libsa/netif.c

97

int val;

sys/lib/libunwind/AddressSpace.hpp

72

uint8_t val;

sys/lib/libunwind/AddressSpace.hpp

73

memcpy(&val, (void *)addr, sizeof(val));

sys/lib/libunwind/AddressSpace.hpp

74

return val;

sys/lib/libunwind/AddressSpace.hpp

78

uint16_t val;

sys/lib/libunwind/AddressSpace.hpp

79

memcpy(&val, (void *)addr, sizeof(val));

sys/lib/libunwind/AddressSpace.hpp

80

return val;

sys/lib/libunwind/AddressSpace.hpp

84

uint32_t val;

sys/lib/libunwind/AddressSpace.hpp

85

memcpy(&val, (void *)addr, sizeof(val));

sys/lib/libunwind/AddressSpace.hpp

86

return val;

sys/lib/libunwind/AddressSpace.hpp

90

uint64_t val;

sys/lib/libunwind/AddressSpace.hpp

91

memcpy(&val, (void *)addr, sizeof(val));

sys/lib/libunwind/AddressSpace.hpp

92

return val;

sys/net/agr/ieee8023ad_lacp_impl.h

45

#define LACP_TIMER_ARM(port, timer, val) \

sys/net/agr/ieee8023ad_lacp_impl.h

46

(port)->lp_timer[(timer)] = (val)

sys/net/if_gre.c

442

int val;

sys/net/if_gre.c

477

val = 1;

sys/net/if_gre.c

479

&val, sizeof(val));

sys/net/if_spppsubr.c

1076

int err, val;

sys/net/if_spppsubr.c

1086

val = (sp->pp_flags & flag) ? 1 : 0;

sys/net/if_spppsubr.c

1090

node.sysctl_data = &val;

sys/net/if_spppsubr.c

1097

if (val == 1) {

sys/net/npf/lpm.c

126

entry->len, entry->val);

sys/net/npf/lpm.c

321

size_t len, unsigned preflen, void *val)

sys/net/npf/lpm.c

330

lpm->defvals[LPM_LEN_IDX(len)] = val;

sys/net/npf/lpm.c

338

entry->val = val;

sys/net/npf/lpm.c

385

return entry->val;

sys/net/npf/lpm.c

412

return entry->val;

sys/net/npf/lpm.c

80

void * val;

sys/net/npf/npf_conndb.c

169

void *val;

sys/net/npf/npf_conndb.c

175

val = thmap_get(cd->cd_map, ck->ck_key, keylen);

sys/net/npf/npf_conndb.c

176

if (!val) {

sys/net/npf/npf_conndb.c

185

*flow = CONNDB_ISFORW_P(val) ? NPF_FLOW_FORW : NPF_FLOW_BACK;

sys/net/npf/npf_conndb.c

186

con = CONNDB_GET_PTR(val);

sys/net/npf/npf_conndb.c

208

void *val;

sys/net/npf/npf_conndb.c

215

val = (void *)((uintptr_t)(void *)con | tag);

sys/net/npf/npf_conndb.c

218

ok = thmap_put(cd->cd_map, ck->ck_key, keylen, val) == val;

sys/net/npf/npf_conndb.c

232

void *val;

sys/net/npf/npf_conndb.c

235

val = thmap_del(cd->cd_map, ck->ck_key, keylen);

sys/net/npf/npf_conndb.c

238

return CONNDB_GET_PTR(val);

sys/net/npf/npf_ctl.c

58

int type, error, val;

sys/net/npf/npf_ctl.c

72

val = (int)nvlist_get_number(params, name);

sys/net/npf/npf_ctl.c

75

error = npfk_param_set(npf, name, val);

sys/net/npf/npf_ctl.c

81

error = npf_param_check(npf, name, val);

sys/net/npf/npf_ctl.c

91

"invalid parameter `%s` value %d", name, val);

sys/net/npf/npf_inet.c

283

uint8_t val;

sys/net/npf/npf_inet.c

331

val = *(cp + 2);

sys/net/npf/npf_inet.c

332

*wscale = (val > TCP_MAX_WINSHIFT) ? TCP_MAX_WINSHIFT : val;

sys/net/npf/npf_mbuf.c

305

npf_mbuf_add_tag(nbuf_t *nbuf, struct mbuf *m, uint32_t val)

sys/net/npf/npf_mbuf.c

318

*dat = val;

sys/net/npf/npf_mbuf.c

325

return nbuf->nb_mops->set_tag(m, val);

sys/net/npf/npf_mbuf.c

335

nbuf_add_tag(nbuf_t *nbuf, uint32_t val)

sys/net/npf/npf_mbuf.c

338

return npf_mbuf_add_tag(nbuf, m, val);

sys/net/npf/npf_mbuf.c

347

nbuf_find_tag(nbuf_t *nbuf, uint32_t *val)

sys/net/npf/npf_mbuf.c

359

*val = *(uint32_t *)(mt + 1);

sys/net/npf/npf_mbuf.c

365

return nbuf->nb_mops->get_tag(m, val);

sys/net/npf/npf_params.c

148

const uint64_t val = *param->valp;

sys/net/npf/npf_params.c

151

nvlist_add_number(params, param->name, val);

sys/net/npf/npf_params.c

232

npf_param_check(npf_t *npf, const char *name, int val)

sys/net/npf/npf_params.c

239

if (val < param->min || val > param->max) {

sys/net/npf/npf_params.c

246

npfk_param_get(npf_t *npf, const char *name, int *val)

sys/net/npf/npf_params.c

253

*val = *param->valp;

sys/net/npf/npf_params.c

258

npfk_param_set(npf_t *npf, const char *name, int val)

sys/net/npf/npf_params.c

265

if (val < param->min || val > param->max) {

sys/net/npf/npf_params.c

268

*param->valp = val;

sys/net/toeplitz.c

151

unsigned int b, shift, val;

sys/net/toeplitz.c

160

for (val = 0; val < 256; ++val) {

sys/net/toeplitz.c

165

if (val & (1 << shift))

sys/net/toeplitz.c

168

scache->bytes[val] = res;

sys/net/zlib.c

2320

int val = value;\

sys/net/zlib.c

2321

s->bi_buf |= (val << s->bi_valid);\

sys/net/zlib.c

2323

s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\

sys/net80211/ieee80211_crypto_tkip.c

428

static __inline u16 RotR1(u16 val)

sys/net80211/ieee80211_crypto_tkip.c

430

return (val >> 1) | (val << 15);

sys/net80211/ieee80211_crypto_tkip.c

433

static __inline u8 Lo8(u16 val)

sys/net80211/ieee80211_crypto_tkip.c

435

return val & 0xff;

sys/net80211/ieee80211_crypto_tkip.c

438

static __inline u8 Hi8(u16 val)

sys/net80211/ieee80211_crypto_tkip.c

440

return val >> 8;

sys/net80211/ieee80211_crypto_tkip.c

443

static __inline u16 Lo16(u32 val)

sys/net80211/ieee80211_crypto_tkip.c

445

return val & 0xffff;

sys/net80211/ieee80211_crypto_tkip.c

448

static __inline u16 Hi16(u32 val)

sys/net80211/ieee80211_crypto_tkip.c

450

return val >> 16;

sys/net80211/ieee80211_crypto_tkip.c

703

static __inline u32 rotl(u32 val, int bits)

sys/net80211/ieee80211_crypto_tkip.c

705

return (val << bits) | (val >> (32 - bits));

sys/net80211/ieee80211_crypto_tkip.c

709

static __inline u32 rotr(u32 val, int bits)

sys/net80211/ieee80211_crypto_tkip.c

711

return (val >> bits) | (val << (32 - bits));

sys/net80211/ieee80211_crypto_tkip.c

715

static __inline u32 xswap(u32 val)

sys/net80211/ieee80211_crypto_tkip.c

717

return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);

sys/netbt/l2cap_signal.c

1133

l2cap_cfg_opt_val_t *val;

sys/netbt/l2cap_signal.c

1154

val = (l2cap_cfg_opt_val_t *)(opt + 1);

sys/netbt/l2cap_signal.c

1155

val->mtu = htole16(chan->lc_imtu);

sys/netbt/l2cap_signal.c

1166

val = (l2cap_cfg_opt_val_t *)(opt + 1);

sys/netbt/l2cap_signal.c

1167

val->flush_timo = htole16(chan->lc_flush);

sys/netbt/l2cap_signal.c

423

l2cap_cfg_opt_val_t val;

sys/netbt/l2cap_signal.c

491

m_copydata(m, 0, L2CAP_OPT_MTU_SIZE, &val.mtu);

sys/netbt/l2cap_signal.c

492

val.mtu = le16toh(val.mtu);

sys/netbt/l2cap_signal.c

500

if (val.mtu < L2CAP_MTU_MINIMUM) {

sys/netbt/l2cap_signal.c

507

val.mtu = htole16(L2CAP_MTU_MINIMUM);

sys/netbt/l2cap_signal.c

508

memcpy(buf + len, &val, L2CAP_OPT_MTU_SIZE);

sys/netbt/l2cap_signal.c

511

chan->lc_omtu = val.mtu;

sys/netbt/l2cap_signal.c

542

m_copydata(m, 0, L2CAP_OPT_QOS_SIZE, &val.qos);

sys/netbt/l2cap_signal.c

543

switch (val.qos.service_type) {

sys/netbt/l2cap_signal.c

561

l2cap_qos_btoh(&chan->lc_iqos, &val.qos);

sys/netbt/l2cap_signal.c

639

l2cap_cfg_opt_val_t val;

sys/netbt/l2cap_signal.c

732

m_copydata(m, 0, L2CAP_OPT_MTU_SIZE, &val.mtu);

sys/netbt/l2cap_signal.c

733

chan->lc_imtu = le16toh(val.mtu);

sys/netbt/l2cap_signal.c

762

m_copydata(m, 0, L2CAP_OPT_QOS_SIZE, &val.qos);

sys/netbt/l2cap_signal.c

763

switch (val.qos.service_type) {

sys/netbt/l2cap_signal.c

766

l2cap_qos_btoh(&chan->lc_oqos, &val.qos);

sys/netinet/dccp_usrreq.c

2145

dccp_add_option(struct dccpcb *dp, u_int8_t opt, char *val, u_int8_t val_len)

sys/netinet/dccp_usrreq.c

2147

return dccp_add_feature_option(dp, opt, 0, val, val_len);

sys/netinet/dccp_usrreq.c

2151

dccp_add_feature_option(struct dccpcb *dp, u_int8_t opt, u_int8_t feature, char *val, u_int8_t val_len)

sys/netinet/dccp_usrreq.c

2171

dp->options[dp->optlen] = val[i];

sys/netinet/dccp_usrreq.c

2217

char val[8];

sys/netinet/dccp_usrreq.c

2249

memcpy(val, options + i + 3, size -3);

sys/netinet/dccp_usrreq.c

2251

dccp_feature_neg(dp, opt, options[i+2], (size -3) , val);

sys/netinet/dccp_usrreq.c

2274

memcpy(val, options + i + 2, 4);

sys/netinet/dccp_usrreq.c

2275

memset(val + 4, 0, 4);

sys/netinet/dccp_usrreq.c

2276

dccp_add_option(dp, DCCP_OPT_TIMESTAMP_ECHO, val, 8);

sys/netinet/dccp_usrreq.c

2322

dccp_add_feature(struct dccpcb *dp, u_int8_t opt, u_int8_t feature, char *val, u_int8_t val_len)

sys/netinet/dccp_usrreq.c

2333

dp->features[dp->featlen] = val[i];

sys/netinet/dccp_usrreq.c

2379

dccp_feature_neg(struct dccpcb *dp, u_int8_t opt, u_int8_t feature, u_int8_t val_len, char *val)

sys/netinet/dccp_usrreq.c

2385

DCCP_DEBUG((LOG_INFO, "Got CCID negotiation, opt = %u, val[0] = %u\n", opt, val[0]));

sys/netinet/dccp_usrreq.c

2387

if (val[0] == 2 || val[0] == 3 || val[0] == 0) {

sys/netinet/dccp_usrreq.c

2390

for (i = 1; i < val_len; i ++) if (val[i] == dp->pref_cc) val[0] = dp->pref_cc;

sys/netinet/dccp_usrreq.c

2391

DCCP_DEBUG((LOG_INFO, "Sending DCCP_OPT_CONFIRM_L on CCID %u\n", val[0]));

sys/netinet/dccp_usrreq.c

2393

dccp_add_feature_option(dp, DCCP_OPT_CONFIRM_L, DCCP_FEATURE_CC , val, 1);

sys/netinet/dccp_usrreq.c

2395

dp->cc_state[0] = (*cc_sw[val[0] + 1].cc_send_init)(dp);

sys/netinet/dccp_usrreq.c

2396

dp->cc_in_use[0] = val[0] + 1;

sys/netinet/dccp_usrreq.c

2402

DCCP_DEBUG((LOG_INFO, "Got DCCP_OPT_CONFIRM_L on CCID %u\n", val[0]));

sys/netinet/dccp_usrreq.c

2405

dp->cc_state[1] = (*cc_sw[val[0] + 1].cc_recv_init)(dp);

sys/netinet/dccp_usrreq.c

2406

dp->cc_in_use[1] = val[0] + 1;

sys/netinet/dccp_usrreq.c

2418

if (val[0] == 1) {

sys/netinet/dccp_usrreq.c

2421

dccp_add_feature_option(dp, DCCP_OPT_CONFIRM_L, DCCP_FEATURE_ACKVECTOR , val, 1);

sys/netinet/dccp_usrreq.c

2423

ACK_DEBUG((LOG_INFO, "ERROR. Strange val %u\n", val[0]));

sys/netinet/dccp_usrreq.c

2427

if (val[0] == 1) {

sys/netinet/dccp_usrreq.c

2431

ACK_DEBUG((LOG_INFO, "ERROR. Strange val %u\n", val[0]));

sys/netinet/dccp_usrreq.c

2438

memcpy(&(dp->ack_ratio), val, 1);

sys/netinet/ip6.h

276

#define IP6_EXTHDR_GET(val, typ, m, off, len) \

sys/netinet/ip6.h

277

M_REGION_GET(val, typ, m, off, len)

sys/netinet/ip_output.c

1721

ip_getoptval(const struct sockopt *sopt, u_int8_t *val, u_int maxval)

sys/netinet/ip_output.c

1750

*val = tval;

sys/netinet/sctp_output.c

4650

sctp_sendall_iterator(struct sctp_inpcb *inp, struct sctp_tcb *stcb, void *ptr, u_int32_t val)

sys/netinet/sctp_output.c

4688

sctp_sendall_completes(void *ptr, u_int32_t val)

sys/netinet/sctp_output.c

9100

uint32_t val;

sys/netinet/sctp_output.c

9132

val = 0;

sys/netinet/sctp_output.c

9134

val = sctp_calculate_sum(scm, NULL, 0);

sys/netinet/sctp_output.c

9136

ohdr->checksum = val;

sys/netinet/sctp_pcb.c

4695

it->val = argi;

sys/netinet/sctp_structs.h

85

u_int32_t val);

sys/netinet/sctp_structs.h

86

typedef void (*end_func)(void *ptr, u_int32_t val);

sys/netinet/sctp_structs.h

99

u_int32_t val; /* value for apply func to use */

sys/netinet/sctp_timer.c

1455

(*it->function_atend)(it->pointer, it->val);

sys/netinet/sctp_timer.c

1506

(*it->function_toapply)(it->inp, it->stcb, it->pointer, it->val);

sys/netinet/sctp_usrreq.c

1713

u_int32_t *val, sz;

sys/netinet/sctp_usrreq.c

1729

val = sopt->sopt_data;

sys/netinet/sctp_usrreq.c

1747

*val = 0;

sys/netinet/sctp_usrreq.c

1762

*val = sz;

sys/netinet/sctp_var.h

100

#define sctp_ucount_incr(val) { \

sys/netinet/sctp_var.h

101

val++; \

sys/netinet/sctp_var.h

104

#define sctp_ucount_decr(val) { \

sys/netinet/sctp_var.h

105

if (val > 0) { \

sys/netinet/sctp_var.h

106

val--; \

sys/netinet/sctp_var.h

108

val = 0; \

sys/netinet/tcp_subr.c

2186

tcp_statadd(u_int stat, uint64_t val)

sys/netinet/tcp_subr.c

2190

TCP_STATADD(stat, val);

sys/nfs/nfs.h

386

#define NFS_STASHCOOKIE32(dp, val) \

sys/nfs/nfs.h

388

sizeof (int))) = val

sys/nfs/nfs_socket.c

189

int val;

sys/nfs/nfs_socket.c

209

val = IP_PORTRANGE_LOW;

sys/nfs/nfs_socket.c

212

&val, sizeof(val))))

sys/nfs/nfs_socket.c

223

val = IPV6_PORTRANGE_LOW;

sys/nfs/nfs_socket.c

226

IPV6_PORTRANGE, &val, sizeof(val))))

sys/nfs/nfs_socket.c

300

val = 1;

sys/nfs/nfs_socket.c

301

so_setsockopt(NULL, so, SOL_SOCKET, SO_KEEPALIVE, &val,

sys/nfs/nfs_socket.c

302

sizeof(val));

sys/nfs/nfs_socket.c

305

val = 1;

sys/nfs/nfs_socket.c

306

so_setsockopt(NULL, so, IPPROTO_TCP, TCP_NODELAY, &val,

sys/nfs/nfs_socket.c

307

sizeof(val));

sys/nfs/nfs_syscalls.c

510

int val;

sys/nfs/nfs_syscalls.c

546

val = 1;

sys/nfs/nfs_syscalls.c

547

so_setsockopt(NULL, so, SOL_SOCKET, SO_KEEPALIVE, &val,

sys/nfs/nfs_syscalls.c

548

sizeof(val));

sys/nfs/nfs_syscalls.c

553

val = 1;

sys/nfs/nfs_syscalls.c

554

so_setsockopt(NULL, so, IPPROTO_TCP, TCP_NODELAY, &val,

sys/nfs/nfs_syscalls.c

555

sizeof(val));

sys/nfs/nfs_vfsops.c

1011

int val;

sys/nfs/nfs_vfsops.c

1014

val = nfs_niothreads;

sys/nfs/nfs_vfsops.c

1016

node.sysctl_data = &val;

sys/nfs/nfs_vfsops.c

1021

return nfs_set_niothreads(val);

sys/rump/dev/lib/libugenhc/ugenhc.c

776

int fd, val;

sys/rump/dev/lib/libugenhc/ugenhc.c

828

val = 100;

sys/rump/dev/lib/libugenhc/ugenhc.c

829

if (rumpcomp_ugenhc_ioctl(fd, USB_SET_TIMEOUT, &val,

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

102

if (val == 1) {

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

160

int error, val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

166

val = ctx->ctx_wk_enqueued ? 1 : 0;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

169

node.sysctl_data = &val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

170

node.sysctl_size = sizeof(val);

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

176

if (val != 0 && val != 1)

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

180

if (val == 1) {

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

276

int val, error;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

283

val = th->th_hook == NULL ? 0 : 1;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

286

node.sysctl_data = &val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

287

node.sysctl_size = sizeof(val);

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

296

if (val == 1) {

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

340

int val, error;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

346

val = ctx->ctx_nbhook == NULL ? 0 : 1;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

349

node.sysctl_data = &val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

350

node.sysctl_size = sizeof(val);

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

359

if (val == 1) {

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

395

bool val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

402

val = th->th_stopping;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

405

node.sysctl_data = &val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

406

node.sysctl_size = sizeof(val);

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

414

if (val == true && !th->th_stopping) {

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

416

} else if (val == false && th->th_stopping) {

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

431

bool val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

438

val = th->th_stopped;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

441

node.sysctl_data = &val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

442

node.sysctl_size = sizeof(val);

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

454

bool val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

461

val = th->th_disestablish;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

464

node.sysctl_data = &val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

465

node.sysctl_size = sizeof(val);

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

471

if (val != 0 && val != 1)

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

476

if (val == true && !th->th_disestablish) {

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

478

} else if (val == false && th->th_disestablish) {

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

492

int error, val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

499

val = th->th_count;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

502

node.sysctl_data = &val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

503

node.sysctl_size = sizeof(val);

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

510

th->th_count = val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

80

int error, val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

87

val = ctx->ctx_hooks != NULL ? 1 : 0;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

90

node.sysctl_data = &val;

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

91

node.sysctl_size = sizeof(val);

sys/rump/kern/lib/libsimplehook_tester/simplehook_tester.c

97

if (val != 0 && val != 1)

sys/rump/librump/rumpkern/rump_syscalls.c

1464

rump___sysimpl_setsockopt(int s, int level, int name, const void * val, socklen_t valsize)

sys/rump/librump/rumpkern/rump_syscalls.c

1475

SPARG(&callarg, val) = val;

sys/rump/librump/rumpkern/rump_syscalls.c

1525

rump___sysimpl_getsockopt(int s, int level, int name, void * val, socklen_t * avalsize)

sys/rump/librump/rumpkern/rump_syscalls.c

1536

SPARG(&callarg, val) = val;

sys/rump/librump/rumpkern/rump_syscalls.c

2261

rump___sysimpl_getsockopt2(int s, int level, int name, void * val, socklen_t * avalsize)

sys/rump/librump/rumpkern/rump_syscalls.c

2272

SPARG(&callarg, val) = val;

sys/rump/librump/rumpkern/rumpcopy.c

266

_ustore_ ## sz(uint ## sz ## _t *uaddr, uint ## sz ## _t val) \

sys/rump/librump/rumpkern/rumpcopy.c

271

*uaddr = val; \

sys/rump/librump/rumpkern/rumpcopy.c

275

&val, uaddr, sizeof(val)); \

sys/secmodel/extensions/secmodel_extensions.c

157

int val, error;

sys/secmodel/extensions/secmodel_extensions.c

159

val = *(int *)rnode->sysctl_data;

sys/secmodel/extensions/secmodel_extensions.c

162

node.sysctl_data = &val;

sys/secmodel/extensions/secmodel_extensions.c

169

if (val == *(int *)rnode->sysctl_data)

sys/secmodel/extensions/secmodel_extensions.c

173

if (val == 0 && is_securelevel_above(0)) {

sys/secmodel/extensions/secmodel_extensions.c

177

*(int *)rnode->sysctl_data = val;

sys/secmodel/extensions/secmodel_extensions.c

192

int val, error;

sys/secmodel/extensions/secmodel_extensions.c

194

val = *(int *)rnode->sysctl_data;

sys/secmodel/extensions/secmodel_extensions.c

197

node.sysctl_data = &val;

sys/secmodel/extensions/secmodel_extensions.c

204

if (val == *(int *)rnode->sysctl_data)

sys/secmodel/extensions/secmodel_extensions.c

208

if (val != 0 && is_securelevel_above(0)) {

sys/secmodel/extensions/secmodel_extensions.c

212

*(int *)rnode->sysctl_data = val;

sys/stand/efiboot/efiacpi.c

104

efi_acpi_enable(int val)

sys/stand/efiboot/efiacpi.c

109

acpi_enabled = val;

sys/stand/efiboot/efiboot.c

161

UINTN val;

sys/stand/efiboot/efiboot.c

170

uefi_call_wrapper(BS->WaitForEvent, 3, 1, &delay_ev, &val);

sys/sys/exec_coff.h

119

#define COFF_ROUND(val, by) (((val) + by - 1) & ~(by - 1))

sys/sys/mbuf.h

609

#define M_REGION_GET(val, typ, m, off, len) \

sys/sys/mbuf.h

614

(val) = (typ)(mtod((m), char *) + (off)); \

sys/sys/mbuf.h

620

(val) = (typ)(mtod(_t, char *) + _tmp); \

sys/sys/mbuf.h

622

(val) = (typ)NULL; \

sys/sys/reboot.h

100

#define B_PARTITION(val) (((val) >> B_PARTITIONSHIFT) & B_PARTITIONMASK)

sys/sys/reboot.h

103

#define B_TYPE(val) (((val) >> B_TYPESHIFT) & B_TYPEMASK)

sys/sys/reboot.h

91

#define B_ADAPTOR(val) (((val) >> B_ADAPTORSHIFT) & B_ADAPTORMASK)

sys/sys/reboot.h

94

#define B_CONTROLLER(val) (((val)>>B_CONTROLLERSHIFT) & B_CONTROLLERMASK)

sys/sys/reboot.h

97

#define B_UNIT(val) (((val) >> B_UNITSHIFT) & B_UNITMASK)

sys/sys/syscallargs.h

1025

syscallarg(int) val;

sys/sys/syscallargs.h

1243

syscallarg(void *) val;

sys/sys/syscallargs.h

1741

syscallarg(unsigned int) val;

sys/sys/syscallargs.h

657

syscallarg(const void *) val;

sys/sys/syscallargs.h

744

syscallarg(void *) val;

sys/sys/termios.h

84

#define CCEQ(val, c) (c == val ? val != _POSIX_VDISABLE : 0)

sys/sys/tree.h

148

name##_SPLAY_MIN_MAX(struct name *head, int val) \

sys/sys/tree.h

150

name##_SPLAY_MINMAX(head, val); \

sys/sys/tree.h

705

name##_RB_MINMAX(struct name *head, int val) \

sys/sys/tree.h

711

if (val < 0) \

sys/sys/types.h

250

int val; /* value for SETVAL */

sys/sys/videoio.h

3276

u_int64_t val;

sys/ufs/ext2fs/ext2fs_hash.c

146

int val, i;

sys/ufs/ext2fs/ext2fs_hash.c

150

val = (u_int)*uname++;

sys/ufs/ext2fs/ext2fs_hash.c

152

val = (int)*sname++;

sys/ufs/ext2fs/ext2fs_hash.c

154

h0 = h2 + (h1 ^ (val * multi));

sys/ufs/ext2fs/ext2fs_vnops.c

109

int32_t val[2];

sys/ufs/ext2fs/ext2fs_vnops.c

115

tmp.val[_QUAD_HIGHWORD] = (h); \

sys/ufs/ext2fs/ext2fs_vnops.c

121

tmp.val[_QUAD_LOWWORD] = (l); \

sys/ufs/ffs/ffs_snapshot.c

2297

db_assign(struct inode *ip, int loc, daddr_t val)

sys/ufs/ffs/ffs_snapshot.c

2300

ip->i_ffs1_db[loc] = ufs_rw32(val, UFS_IPNEEDSWAP(ip));

sys/ufs/ffs/ffs_snapshot.c

2302

ip->i_ffs2_db[loc] = ufs_rw64(val, UFS_IPNEEDSWAP(ip));

sys/ufs/ffs/ffs_snapshot.c

2324

idb_assign(struct inode *ip, void *bf, int loc, daddr_t val)

sys/ufs/ffs/ffs_snapshot.c

2327

((int32_t *)(bf))[loc] = ufs_rw32(val, UFS_IPNEEDSWAP(ip));

sys/ufs/ffs/ffs_snapshot.c

2329

((int64_t *)(bf))[loc] = ufs_rw64(val, UFS_IPNEEDSWAP(ip));

sys/ufs/lfs/lfs_accessors.h

1078

lfs_ss_set##field(STRUCT_LFS *fs, SEGSUM *ssp, type val) \

sys/ufs/lfs/lfs_accessors.h

1083

ssp->u_64.ss_##field = val; \

sys/ufs/lfs/lfs_accessors.h

1087

ssp->u_32.ss_##field = val; \

sys/ufs/lfs/lfs_accessors.h

1131

lfs_ss_setocreate(STRUCT_LFS *fs, SEGSUM *ssp, uint32_t val)

sys/ufs/lfs/lfs_accessors.h

1137

ssp->u_v1.ss_create = val;

sys/ufs/lfs/lfs_accessors.h

1160

lfs_sb_set##field(STRUCT_LFS *fs, type val) \

sys/ufs/lfs/lfs_accessors.h

1163

fs->lfs_dlfs_u.u_64.dlfs_##field = val; \

sys/ufs/lfs/lfs_accessors.h

1165

fs->lfs_dlfs_u.u_32.dlfs_##field = val; \

sys/ufs/lfs/lfs_accessors.h

1169

lfs_sb_add##field(STRUCT_LFS *fs, type val) \

sys/ufs/lfs/lfs_accessors.h

1173

*p64 += val; \

sys/ufs/lfs/lfs_accessors.h

1176

*p32 += val; \

sys/ufs/lfs/lfs_accessors.h

1180

lfs_sb_sub##field(STRUCT_LFS *fs, type val) \

sys/ufs/lfs/lfs_accessors.h

1184

*p64 -= val; \

sys/ufs/lfs/lfs_accessors.h

1187

*p32 -= val; \

sys/ufs/lfs/lfs_accessors.h

1268

#define lfs_sb_setotstamp(fs, val) lfs_sb_setinopf(fs, val)

sys/ufs/lfs/lfs_accessors.h

1286

lfs_sb_setsboff(STRUCT_LFS *fs, unsigned n, int32_t val)

sys/ufs/lfs/lfs_accessors.h

1292

fs->lfs_dlfs_u.u_64.dlfs_sboffs[n] = val;

sys/ufs/lfs/lfs_accessors.h

1294

fs->lfs_dlfs_u.u_32.dlfs_sboffs[n] = val;

sys/ufs/lfs/lfs_accessors.h

1457

lfs_blocks_set(STRUCT_LFS *fs, union lfs_blocks *bp, unsigned idx, daddr_t val)

sys/ufs/lfs/lfs_accessors.h

1460

bp->b64[idx] = val;

sys/ufs/lfs/lfs_accessors.h

1462

bp->b32[idx] = val;

sys/ufs/lfs/lfs_accessors.h

188

#define LFS_SWAP_int16_t(fs, val) (val)

sys/ufs/lfs/lfs_accessors.h

189

#define LFS_SWAP_int32_t(fs, val) (val)

sys/ufs/lfs/lfs_accessors.h

190

#define LFS_SWAP_int64_t(fs, val) (val)

sys/ufs/lfs/lfs_accessors.h

191

#define LFS_SWAP_uint16_t(fs, val) (val)

sys/ufs/lfs/lfs_accessors.h

192

#define LFS_SWAP_uint32_t(fs, val) (val)

sys/ufs/lfs/lfs_accessors.h

193

#define LFS_SWAP_uint64_t(fs, val) (val)

sys/ufs/lfs/lfs_accessors.h

195

#define LFS_SWAP_int16_t(fs, val) \

sys/ufs/lfs/lfs_accessors.h

196

((fs)->lfs_dobyteswap ? (int16_t)bswap16(val) : (val))

sys/ufs/lfs/lfs_accessors.h

197

#define LFS_SWAP_int32_t(fs, val) \

sys/ufs/lfs/lfs_accessors.h

198

((fs)->lfs_dobyteswap ? (int32_t)bswap32(val) : (val))

sys/ufs/lfs/lfs_accessors.h

199

#define LFS_SWAP_int64_t(fs, val) \

sys/ufs/lfs/lfs_accessors.h

200

((fs)->lfs_dobyteswap ? (int64_t)bswap64(val) : (val))

sys/ufs/lfs/lfs_accessors.h

201

#define LFS_SWAP_uint16_t(fs, val) \

sys/ufs/lfs/lfs_accessors.h

202

((fs)->lfs_dobyteswap ? bswap16(val) : (val))

sys/ufs/lfs/lfs_accessors.h

203

#define LFS_SWAP_uint32_t(fs, val) \

sys/ufs/lfs/lfs_accessors.h

204

((fs)->lfs_dobyteswap ? bswap32(val) : (val))

sys/ufs/lfs/lfs_accessors.h

205

#define LFS_SWAP_uint64_t(fs, val) \

sys/ufs/lfs/lfs_accessors.h

206

((fs)->lfs_dobyteswap ? bswap64(val) : (val))

sys/ufs/lfs/lfs_accessors.h

476

lfs_dino_set##field(STRUCT_LFS *fs, union lfs_dinode *dip, type val) \

sys/ufs/lfs/lfs_accessors.h

481

dip->u_64.di_##field = LFS_SWAP_##type(fs, val); \

sys/ufs/lfs/lfs_accessors.h

485

dip->u_32.di_##field = LFS_SWAP_##type32(fs, val); \

sys/ufs/lfs/lfs_accessors.h

533

lfs_dino_setdb(STRUCT_LFS *fs, union lfs_dinode *dip, unsigned ix, daddr_t val)

sys/ufs/lfs/lfs_accessors.h

537

dip->u_64.di_db[ix] = LFS_SWAP_int64_t(fs, val);

sys/ufs/lfs/lfs_accessors.h

539

dip->u_32.di_db[ix] = LFS_SWAP_uint32_t(fs, val);

sys/ufs/lfs/lfs_accessors.h

544

lfs_dino_setib(STRUCT_LFS *fs, union lfs_dinode *dip, unsigned ix, daddr_t val)

sys/ufs/lfs/lfs_accessors.h

548

dip->u_64.di_ib[ix] = LFS_SWAP_int64_t(fs, val);

sys/ufs/lfs/lfs_accessors.h

550

dip->u_32.di_ib[ix] = LFS_SWAP_uint32_t(fs, val);

sys/ufs/lfs/lfs_accessors.h

586

lfs_iblock_set(STRUCT_LFS *fs, void *block, unsigned ix, daddr_t val)

sys/ufs/lfs/lfs_accessors.h

590

((int64_t *)block)[ix] = val;

sys/ufs/lfs/lfs_accessors.h

593

((int32_t *)block)[ix] = val;

sys/ufs/lfs/lfs_accessors.h

734

lfs_fi_set##field(STRUCT_LFS *fs, FINFO *fip, type val) \

sys/ufs/lfs/lfs_accessors.h

739

fip->u_64.fi_##field = val; \

sys/ufs/lfs/lfs_accessors.h

743

fip->u_32.fi_##field = val; \

sys/ufs/lfs/lfs_accessors.h

887

lfs_if_set##field(STRUCT_LFS *fs, IFILE *ifp, type val) \

sys/ufs/lfs/lfs_accessors.h

892

ifp->u_64.if_##field = val; \

sys/ufs/lfs/lfs_accessors.h

896

ifp->u_32.if_##field = val; \

sys/ufs/lfs/lfs_accessors.h

926

lfs_ci_set##field(STRUCT_LFS *fs, CLEANERINFO *cip, type val) \

sys/ufs/lfs/lfs_accessors.h

931

cip->u_64.field = val; \

sys/ufs/lfs/lfs_accessors.h

935

cip->u_32.field = val; \

sys/ufs/lfs/ulfs_bmap.c

79

ulfs_fix_unwritten(uint32_t val)

sys/ufs/lfs/ulfs_bmap.c

81

if (val == (uint32_t)UNWRITTEN) {

sys/ufs/lfs/ulfs_bmap.c

84

return val;

sys/ufs/lfs/ulfs_dirhash.c

72

#define WRAPINCR(val, limit) (((val) + 1 == (limit)) ? 0 : ((val) + 1))

sys/ufs/lfs/ulfs_dirhash.c

73

#define WRAPDECR(val, limit) (((val) == 0) ? ((limit) - 1) : ((val) - 1))

sys/ufs/lfs/ulfs_quota1.c

535

const struct quotaval *val)

sys/ufs/lfs/ulfs_quota1.c

567

if (val->qv_grace != QUOTA_NOTIME) {

sys/ufs/lfs/ulfs_quota1.c

570

val->qv_grace;

sys/ufs/lfs/ulfs_quota1.c

573

val->qv_grace;

sys/ufs/lfs/ulfs_quota1.c

594

dqb.dqb_bsoftlimit = quota1_encode_limit(val->qv_softlimit);

sys/ufs/lfs/ulfs_quota1.c

595

dqb.dqb_bhardlimit = quota1_encode_limit(val->qv_hardlimit);

sys/ufs/lfs/ulfs_quota1.c

602

dqb.dqb_isoftlimit = quota1_encode_limit(val->qv_softlimit);

sys/ufs/lfs/ulfs_quota1.c

603

dqb.dqb_ihardlimit = quota1_encode_limit(val->qv_hardlimit);

sys/ufs/lfs/ulfs_quota1.c

605

if (dq->dq_id == 0 && val->qv_grace != QUOTA_NOTIME) {

sys/ufs/lfs/ulfs_quota1.c

609

val->qv_grace;

sys/ufs/lfs/ulfs_quota1.c

613

val->qv_grace;

sys/ufs/lfs/ulfs_quota2.c

579

const struct quotaval *val)

sys/ufs/lfs/ulfs_quota2.c

604

quota2_dict_update_q2e_limits(key->qk_objtype, val, &q2e);

sys/ufs/lfs/ulfs_quota2.c

635

if (val->qv_softlimit &&

sys/ufs/lfs/ulfs_quota2.c

636

q2e.q2e_val[key->qk_objtype].q2v_cur >= val->qv_softlimit &&

sys/ufs/lfs/ulfs_quota2.c

639

q2e.q2e_val[key->qk_objtype].q2v_time = time_second + val->qv_grace;

sys/ufs/lfs/ulfs_quota2.c

640

quota2_dict_update_q2e_limits(key->qk_objtype, val, &q2e);

sys/ufs/lfs/ulfs_quota2.c

83

quota2_dict_update_q2e_limits(int objtype, const struct quotaval *val,

sys/ufs/lfs/ulfs_quota2.c

90

q2e->q2e_val[objtype].q2v_hardlimit = val->qv_hardlimit;

sys/ufs/lfs/ulfs_quota2.c

91

q2e->q2e_val[objtype].q2v_softlimit = val->qv_softlimit;

sys/ufs/lfs/ulfs_quota2.c

92

q2e->q2e_val[objtype].q2v_grace = val->qv_grace;

sys/ufs/ufs/ufs_dirhash.c

73

#define WRAPINCR(val, limit) (((val) + 1 == (limit)) ? 0 : ((val) + 1))

sys/ufs/ufs/ufs_dirhash.c

74

#define WRAPDECR(val, limit) (((val) == 0) ? ((limit) - 1) : ((val) - 1))

sys/ufs/ufs/ufs_quota1.c

548

const struct quotaval *val)

sys/ufs/ufs/ufs_quota1.c

580

if (val->qv_grace != QUOTA_NOTIME) {

sys/ufs/ufs/ufs_quota1.c

583

val->qv_grace;

sys/ufs/ufs/ufs_quota1.c

586

val->qv_grace;

sys/ufs/ufs/ufs_quota1.c

607

dqb.dqb_bsoftlimit = quota1_encode_limit(val->qv_softlimit);

sys/ufs/ufs/ufs_quota1.c

608

dqb.dqb_bhardlimit = quota1_encode_limit(val->qv_hardlimit);

sys/ufs/ufs/ufs_quota1.c

615

dqb.dqb_isoftlimit = quota1_encode_limit(val->qv_softlimit);

sys/ufs/ufs/ufs_quota1.c

616

dqb.dqb_ihardlimit = quota1_encode_limit(val->qv_hardlimit);

sys/ufs/ufs/ufs_quota1.c

618

if (dq->dq_id == 0 && val->qv_grace != QUOTA_NOTIME) {

sys/ufs/ufs/ufs_quota1.c

622

val->qv_grace;

sys/ufs/ufs/ufs_quota1.c

626

val->qv_grace;

sys/ufs/ufs/ufs_quota2.c

578

const struct quotaval *val)

sys/ufs/ufs/ufs_quota2.c

605

quota2_dict_update_q2e_limits(key->qk_objtype, val, &q2e);

sys/ufs/ufs/ufs_quota2.c

636

if (val->qv_softlimit &&

sys/ufs/ufs/ufs_quota2.c

637

q2e.q2e_val[key->qk_objtype].q2v_cur >= val->qv_softlimit &&

sys/ufs/ufs/ufs_quota2.c

642

time_second + val->qv_grace;

sys/ufs/ufs/ufs_quota2.c

644

quota2_dict_update_q2e_limits(key->qk_objtype, val, &q2e);

sys/ufs/ufs/ufs_quota2.c

81

quota2_dict_update_q2e_limits(int objtype, const struct quotaval *val,

sys/ufs/ufs/ufs_quota2.c

88

q2e->q2e_val[objtype].q2v_hardlimit = val->qv_hardlimit;

sys/ufs/ufs/ufs_quota2.c

89

q2e->q2e_val[objtype].q2v_softlimit = val->qv_softlimit;

sys/ufs/ufs/ufs_quota2.c

90

q2e->q2e_val[objtype].q2v_grace = val->qv_grace;

sys/uvm/pmap/pmap.c

2707

int val;

sys/uvm/pmap/pmap.c

2755

val = *loc;

sys/uvm/pmap/pmap.c

2763

val,

sys/uvm/pmap/pmap.c

2787

val = *loc;

sys/uvm/pmap/pmap.c

2795

val,

sys/uvm/uvm_meter.c

395

uvm_pctparam_set(struct uvm_pctparam *pct, int val)

sys/uvm/uvm_meter.c

398

pct->pct_pct = val;

sys/uvm/uvm_meter.c

399

pct->pct_scaled = val * UVM_PCTPARAM_SCALE / 100;

sys/uvm/uvm_meter.c

410

uvm_pctparam_check(struct uvm_pctparam *pct, int val)

sys/uvm/uvm_meter.c

416

return (*pct->pct_check)(pct, val);

sys/uvm/uvm_meter.c

420

uvm_pctparam_init(struct uvm_pctparam *pct, int val,

sys/uvm/uvm_meter.c

425

uvm_pctparam_set(pct, val);

sys/uvm/uvm_pdaemon.c

221

int val;

sys/uvm/uvm_pdaemon.c

229

val = uvmexp.npages / 200;

sys/uvm/uvm_pdaemon.c

230

val = MAX(val, (128*1024) >> PAGE_SHIFT);

sys/uvm/uvm_pdaemon.c

231

val = MIN(val, (1024*1024) >> PAGE_SHIFT);

sys/uvm/uvm_pdaemon.c

232

val *= ncpu;

sys/uvm/uvm_pdaemon.c

235

if (val < uvmexp.reserve_kernel + 1)

sys/uvm/uvm_pdaemon.c

236

val = uvmexp.reserve_kernel + 1;

sys/uvm/uvm_pdaemon.c

237

uvmexp.freemin = val;

sys/uvm/uvm_pdaemon.c

240

val = (uvmexp.freemin * 4) / 3;

sys/uvm/uvm_pdaemon.c

241

if (val <= uvmexp.freemin)

sys/uvm/uvm_pdaemon.c

242

val = uvmexp.freemin + 1;

sys/uvm/uvm_pdaemon.c

243

uvmexp.freetarg = val + atomic_swap_uint(&uvm_extrapages, 0);

tests/dev/audio/audiotest.c

4180

int val;

tests/dev/audio/audiotest.c

4195

val = 1;

tests/dev/audio/audiotest.c

4196

r = IOCTL(fd1, FIOASYNC, &val, "on");

tests/dev/audio/audiotest.c

4204

val = 1;

tests/dev/audio/audiotest.c

4205

r = IOCTL(fd1, FIOASYNC, &val, "on");

tests/dev/audio/audiotest.c

4222

int val;

tests/dev/audio/audiotest.c

4245

val = 1;

tests/dev/audio/audiotest.c

4246

r = IOCTL(fd, FIOASYNC, &val, "on");

tests/dev/audio/audiotest.c

4275

int val;

tests/dev/audio/audiotest.c

4290

val = 1;

tests/dev/audio/audiotest.c

4291

r = IOCTL(fd, FIOASYNC, &val, "on");

tests/dev/audio/audiotest.c

4325

int val;

tests/dev/audio/audiotest.c

4365

val = 1;

tests/dev/audio/audiotest.c

4379

r = IOCTL(fd2, FIOASYNC, &val, "on");

tests/dev/audio/audiotest.c

4405

r = IOCTL(fd1, FIOASYNC, &val, "on");

tests/fs/vfs/t_vnops.c

572

long val;

tests/fs/vfs/t_vnops.c

578

val = rump_sys_pathconf(".", _PC_NAME_MAX);

tests/fs/vfs/t_vnops.c

579

if (val == -1)

tests/fs/vfs/t_vnops.c

582

len = val + 1;

tests/fs/vfs/t_vnops.c

590

val = rump_sys_pathconf(".", _PC_NO_TRUNC);

tests/fs/vfs/t_vnops.c

591

if (val == -1)

tests/fs/vfs/t_vnops.c

595

if (val != 0 && (fd != -1 || errno != ENAMETOOLONG))

tests/fs/vfs/t_vnops.c

598

if (val == 0 && rump_sys_close(fd) == -1)

tests/fs/vfs/t_vnops.c

600

if (val == 0 && rump_sys_unlink(name) == -1)

tests/fs/vfs/t_vnops.c

633

long val;

tests/fs/vfs/t_vnops.c

642

val = rump_sys_pathconf(".", _PC_NAME_MAX);

tests/fs/vfs/t_vnops.c

643

if (val == -1)

tests/fs/vfs/t_vnops.c

646

len = val + 1;

tests/fs/vfs/t_vnops.c

660

val = rump_sys_pathconf(".", _PC_NO_TRUNC);

tests/fs/vfs/t_vnops.c

661

if (val == -1)

tests/fs/vfs/t_vnops.c

665

if (val != 0 && (res != -1 || errno != ENAMETOOLONG))

tests/fs/vfs/t_vnops.c

668

if (val == 0 && rump_sys_unlink(name) == -1)

tests/include/machine/t_bswap.c

53

unconst16(uint16_t val)

tests/include/machine/t_bswap.c

55

return val + x16;

tests/include/machine/t_bswap.c

59

unconst32(uint32_t val)

tests/include/machine/t_bswap.c

61

return val + x32;

tests/include/machine/t_bswap.c

65

unconst64(uint64_t val)

tests/include/machine/t_bswap.c

67

return val + x64;

tests/include/sys/t_bitops.c

138

a = bits[i].val;

tests/include/sys/t_bitops.c

220

ATF_CHECK_EQ_MSG((n = ffs(bits[i].val)), (m = bits[i].ffs),

tests/include/sys/t_bitops.c

222

ATF_CHECK_EQ_MSG((n = ffsl(bits[i].val)), (m = bits[i].ffs),

tests/include/sys/t_bitops.c

224

ATF_CHECK_EQ_MSG((n = ffsll(bits[i].val)), (m = bits[i].ffs),

tests/include/sys/t_bitops.c

227

ATF_CHECK_EQ_MSG((n = ffs32(bits[i].val)), (m = bits[i].ffs),

tests/include/sys/t_bitops.c

229

ATF_CHECK_EQ_MSG((n = fls32(bits[i].val)), (m = bits[i].fls),

tests/include/sys/t_bitops.c

231

ATF_CHECK_EQ_MSG((n = ffs64(bits[i].val)), (m = bits[i].ffs),

tests/include/sys/t_bitops.c

233

ATF_CHECK_EQ_MSG((n = fls64(bits[i].val)), (m = bits[i].fls),

tests/include/sys/t_bitops.c

236

ATF_CHECK_EQ_MSG((n = ffs(bits[i].val << 1)),

tests/include/sys/t_bitops.c

239

ATF_CHECK_EQ_MSG((n = ffsl(bits[i].val << 1)),

tests/include/sys/t_bitops.c

242

ATF_CHECK_EQ_MSG((n = ffsll(bits[i].val << 1)),

tests/include/sys/t_bitops.c

246

ATF_CHECK_EQ_MSG((n = ffs32(bits[i].val << 1)),

tests/include/sys/t_bitops.c

249

ATF_CHECK_EQ_MSG((n = fls32(bits[i].val << 1)),

tests/include/sys/t_bitops.c

252

ATF_CHECK_EQ_MSG((n = ffs64(bits[i].val << 1)),

tests/include/sys/t_bitops.c

255

ATF_CHECK_EQ_MSG((n = fls64(bits[i].val << 1)),

tests/include/sys/t_bitops.c

259

ATF_CHECK_EQ_MSG((n = ffs(bits[i].val << 9)),

tests/include/sys/t_bitops.c

262

ATF_CHECK_EQ_MSG((n = ffsl(bits[i].val << 9)),

tests/include/sys/t_bitops.c

265

ATF_CHECK_EQ_MSG((n = ffsll(bits[i].val << 9)),

tests/include/sys/t_bitops.c

269

ATF_CHECK_EQ_MSG((n = ffs32(bits[i].val << 9)),

tests/include/sys/t_bitops.c

272

ATF_CHECK_EQ_MSG((n = fls32(bits[i].val << 9)),

tests/include/sys/t_bitops.c

275

ATF_CHECK_EQ_MSG((n = ffs64(bits[i].val << 9)),

tests/include/sys/t_bitops.c

278

ATF_CHECK_EQ_MSG((n = fls64(bits[i].val << 9)),

tests/include/sys/t_bitops.c

46

uint32_t val;

tests/kernel/kqueue/t_empty.c

104

int val = sndbufsize + 128;

tests/kernel/kqueue/t_empty.c

106

SO_RCVBUF, &val, sizeof(val)) == 0);

tests/kernel/kqueue/t_empty.c

84

int val = 1;

tests/kernel/kqueue/t_empty.c

86

SO_RCVBUF, &val, sizeof(val)) == 0);

tests/kernel/t_ksem.c

112

int val;

tests/kernel/t_ksem.c

118

val = 255;

tests/kernel/t_ksem.c

119

ATF_REQUIRE(_ksem_getvalue(ksem, &val) == 0 && val == 0);

tests/kernel/t_ksem.c

124

val = 255;

tests/kernel/t_ksem.c

125

ATF_REQUIRE(_ksem_getvalue(ksem1, &val) == 0 && val == 1);

tests/kernel/t_semtimedop.c

121

sun.val = 0;

tests/kernel/t_semtimedop.c

175

int val;

tests/kernel/t_semtimedop.c

182

sun.val = 0;

tests/kernel/t_semtimedop.c

210

val = semctl(semid, 0, GETVAL);

tests/kernel/t_semtimedop.c

211

ATF_REQUIRE_MSG(val == 0,

tests/kernel/t_semtimedop.c

213

"expected 0", val);

tests/kernel/t_semtimedop.c

252

sun.val = 0;

tests/kernel/t_semtimedop.c

44

int val; /* value for SETVAL */

tests/kernel/t_semtimedop.c

68

sun.val = 0;

tests/kernel/t_semtimedop.c

89

int val = semctl(semid, 0, GETVAL);

tests/kernel/t_semtimedop.c

90

ATF_REQUIRE_MSG(val == 1,

tests/kernel/t_semtimedop.c

91

"Semaphore value incorrect: got %d, expected 1", val);

tests/kernel/t_sysv.c

492

sun.val = 1;

tests/kernel/t_sysv.c

96

int val; /* value for SETVAL */

tests/kernel/threadpool_tester/threadpool_tester.c

103

__func__, val, opool == pool ? "match" : "NO MATCH"));

tests/kernel/threadpool_tester/threadpool_tester.c

105

threadpool_put(pool, val);

tests/kernel/threadpool_tester/threadpool_tester.c

109

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

121

int error, val;

tests/kernel/threadpool_tester/threadpool_tester.c

126

val = -1;

tests/kernel/threadpool_tester/threadpool_tester.c

127

node.sysctl_data = &val;

tests/kernel/threadpool_tester/threadpool_tester.c

132

if (! pri_is_valid(val))

tests/kernel/threadpool_tester/threadpool_tester.c

137

pool = ctx->ctx_unbound[pri_to_idx(val)];

tests/kernel/threadpool_tester/threadpool_tester.c

138

ctx->ctx_unbound[pri_to_idx(val)] = NULL;

tests/kernel/threadpool_tester/threadpool_tester.c

143

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

147

threadpool_put(pool, val);

tests/kernel/threadpool_tester/threadpool_tester.c

149

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

160

int error, val;

tests/kernel/threadpool_tester/threadpool_tester.c

165

val = -1;

tests/kernel/threadpool_tester/threadpool_tester.c

166

node.sysctl_data = &val;

tests/kernel/threadpool_tester/threadpool_tester.c

171

if (! pri_is_valid(val))

tests/kernel/threadpool_tester/threadpool_tester.c

175

pool = ctx->ctx_unbound[pri_to_idx(val)];

tests/kernel/threadpool_tester/threadpool_tester.c

178

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

185

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

197

int error, val;

tests/kernel/threadpool_tester/threadpool_tester.c

202

val = -1;

tests/kernel/threadpool_tester/threadpool_tester.c

203

node.sysctl_data = &val;

tests/kernel/threadpool_tester/threadpool_tester.c

208

if (! pri_is_valid(val))

tests/kernel/threadpool_tester/threadpool_tester.c

211

error = threadpool_percpu_get(&pcpu, val);

tests/kernel/threadpool_tester/threadpool_tester.c

214

__func__, val, error));

tests/kernel/threadpool_tester/threadpool_tester.c

219

if (ctx->ctx_percpu[pri_to_idx(val)] == NULL)

tests/kernel/threadpool_tester/threadpool_tester.c

220

ctx->ctx_percpu[pri_to_idx(val)] = pcpu;

tests/kernel/threadpool_tester/threadpool_tester.c

222

opcpu = ctx->ctx_percpu[pri_to_idx(val)];

tests/kernel/threadpool_tester/threadpool_tester.c

228

__func__, val, opcpu == pcpu ? "match" : "NO MATCH"));

tests/kernel/threadpool_tester/threadpool_tester.c

230

threadpool_percpu_put(pcpu, val);

tests/kernel/threadpool_tester/threadpool_tester.c

234

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

246

int error, val;

tests/kernel/threadpool_tester/threadpool_tester.c

251

val = -1;

tests/kernel/threadpool_tester/threadpool_tester.c

252

node.sysctl_data = &val;

tests/kernel/threadpool_tester/threadpool_tester.c

257

if (! pri_is_valid(val))

tests/kernel/threadpool_tester/threadpool_tester.c

262

pcpu = ctx->ctx_percpu[pri_to_idx(val)];

tests/kernel/threadpool_tester/threadpool_tester.c

263

ctx->ctx_percpu[pri_to_idx(val)] = NULL;

tests/kernel/threadpool_tester/threadpool_tester.c

268

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

272

threadpool_percpu_put(pcpu, val);

tests/kernel/threadpool_tester/threadpool_tester.c

274

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

286

int error, val;

tests/kernel/threadpool_tester/threadpool_tester.c

291

val = -1;

tests/kernel/threadpool_tester/threadpool_tester.c

292

node.sysctl_data = &val;

tests/kernel/threadpool_tester/threadpool_tester.c

297

if (! pri_is_valid(val))

tests/kernel/threadpool_tester/threadpool_tester.c

301

pcpu = ctx->ctx_percpu[pri_to_idx(val)];

tests/kernel/threadpool_tester/threadpool_tester.c

304

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

314

__func__, val));

tests/kernel/threadpool_tester/threadpool_tester.c

325

unsigned int val;

tests/kernel/threadpool_tester/threadpool_tester.c

332

val = ctx->ctx_value;

tests/kernel/threadpool_tester/threadpool_tester.c

333

node.sysctl_data = &val;

tests/kernel/threadpool_tester/threadpool_tester.c

339

ctx->ctx_value = val;

tests/kernel/threadpool_tester/threadpool_tester.c

72

int error, val;

tests/kernel/threadpool_tester/threadpool_tester.c

77

val = -1;

tests/kernel/threadpool_tester/threadpool_tester.c

78

node.sysctl_data = &val;

tests/kernel/threadpool_tester/threadpool_tester.c

83

if (! pri_is_valid(val))

tests/kernel/threadpool_tester/threadpool_tester.c

86

error = threadpool_get(&pool, val);

tests/kernel/threadpool_tester/threadpool_tester.c

89

__func__, val, error));

tests/kernel/threadpool_tester/threadpool_tester.c

94

if (ctx->ctx_unbound[pri_to_idx(val)] == NULL)

tests/kernel/threadpool_tester/threadpool_tester.c

95

ctx->ctx_unbound[pri_to_idx(val)] = pool;

tests/kernel/threadpool_tester/threadpool_tester.c

97

opool = ctx->ctx_unbound[pri_to_idx(val)];

tests/lib/libc/atomic/t___sync_add.c

59

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_add.c

64

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_add.c

68

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_add.c

69

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_add.c

70

"val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_add.c

90

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_add.c

94

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_add.c

97

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_add.c

98

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t___sync_add.c

99

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t___sync_and.c

59

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_and.c

64

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_and.c

68

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_and.c

69

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_and.c

70

"val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_and.c

90

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_and.c

94

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_and.c

97

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_and.c

98

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t___sync_and.c

99

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

117

} val; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

120

val.subword[LSB] = -1; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

121

val.subword[MSB] = 123; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

122

ATF_CHECK(NAME(&val.subword[LSB], /*old*/-1, /*new*/-2)); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

123

ATF_CHECK_EQ_MSG(val.subword[LSB], (SUBTYPE)-2, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

124

"val.subword[LSB] = 0x%" SUBFMT, val.subword[LSB]); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

125

ATF_CHECK_EQ_MSG(val.subword[MSB], 123, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

126

"val.subword[MSB] = 0x%" SUBFMT, val.subword[MSB]); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

127

ATF_CHECK_EQ_MSG(val.word, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

129

"val.word = 0x%" FMT, val.word); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

131

val.subword[LSB] = -3; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

132

val.subword[MSB] = 45; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

133

ATF_CHECK(!NAME(&val.subword[LSB], /*old*/-1, /*new*/-2)); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

134

ATF_CHECK_EQ_MSG(val.subword[LSB], (SUBTYPE)-3, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

135

"val.subword[LSB] = 0x%" SUBFMT, val.subword[LSB]); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

136

ATF_CHECK_EQ_MSG(val.subword[MSB], 45, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

137

"val.subword[MSB] = 0x%" SUBFMT, val.subword[MSB]); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

138

ATF_CHECK_EQ_MSG(val.word, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

140

"val.word = 0x%" FMT, val.word); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

158

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

166

val = (TYPE)OLDVAL; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

171

res = NAME(&val, oldval, newval); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

172

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

173

"successful case: val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

177

val = (TYPE)OLDVAL; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

182

res = NAME(&val, oldval, newval); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

183

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

184

"failure case: val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

207

} val; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

211

val.subword[LSB] = -1; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

212

val.subword[MSB] = 123; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

213

ATF_CHECK_EQ_MSG((rval = NAME(&val.subword[LSB], \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

217

ATF_CHECK_EQ_MSG(val.subword[LSB], (SUBTYPE)-2, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

218

"val.subword[LSB] = 0x%" SUBFMT, val.subword[LSB]); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

219

ATF_CHECK_EQ_MSG(val.subword[MSB], 123, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

220

"val.subword[MSB] = 0x%" SUBFMT, val.subword[MSB]); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

221

ATF_CHECK_EQ_MSG(val.word, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

223

"val.word = 0x%" FMT, val.word); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

225

val.subword[LSB] = -3; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

226

val.subword[MSB] = 45; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

227

ATF_CHECK_EQ_MSG((rval = NAME(&val.subword[LSB], \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

231

ATF_CHECK_EQ_MSG(val.subword[LSB], (SUBTYPE)-3, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

232

"val.subword[LSB] = 0x%" SUBFMT, val.subword[LSB]); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

233

ATF_CHECK_EQ_MSG(val.subword[MSB], 45, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

234

"val.subword[MSB] = 0x%" SUBFMT, val.subword[MSB]); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

235

ATF_CHECK_EQ_MSG(val.word, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

237

"val.word = 0x%" FMT, val.word); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

58

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

66

val = (TYPE)OLDVAL; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

71

res = NAME(&val, oldval, newval); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

72

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

73

"successful case: val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

77

val = (TYPE)OLDVAL; \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

82

res = NAME(&val, oldval, newval); \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

83

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_compare_and_swap.c

84

"failure case: val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_lock.c

110

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_lock.c

115

val = (TYPE)INITVAL; \

tests/lib/libc/atomic/t___sync_lock.c

119

res = NAME(&val, newval); \

tests/lib/libc/atomic/t___sync_lock.c

120

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_lock.c

121

"val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_lock.c

141

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_lock.c

143

val = (TYPE)LOCKEDVAL; \

tests/lib/libc/atomic/t___sync_lock.c

145

NAME(&val); \

tests/lib/libc/atomic/t___sync_lock.c

146

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_lock.c

147

"val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_nand.c

59

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_nand.c

64

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_nand.c

68

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_nand.c

69

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_nand.c

70

"val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_nand.c

90

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_nand.c

94

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_nand.c

97

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_nand.c

98

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t___sync_nand.c

99

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t___sync_or.c

59

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_or.c

64

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_or.c

68

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_or.c

69

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_or.c

70

"val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_or.c

90

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_or.c

94

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_or.c

97

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_or.c

98

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t___sync_or.c

99

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t___sync_sub.c

59

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_sub.c

64

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_sub.c

68

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_sub.c

69

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_sub.c

70

"val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_sub.c

90

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_sub.c

94

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_sub.c

97

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_sub.c

98

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t___sync_sub.c

99

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t___sync_xor.c

59

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_xor.c

64

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_xor.c

68

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_xor.c

69

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t___sync_xor.c

70

"val expects 0x%" FMT " but 0x%" FMT, expval, val); \

tests/lib/libc/atomic/t___sync_xor.c

90

volatile TYPE val; \

tests/lib/libc/atomic/t___sync_xor.c

94

val = (TYPE)DST; \

tests/lib/libc/atomic/t___sync_xor.c

97

res = NAME(&val, src); \

tests/lib/libc/atomic/t___sync_xor.c

98

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t___sync_xor.c

99

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_add.c

54

volatile DTYPE val; \

tests/lib/libc/atomic/t_atomic_add.c

57

val = (DTYPE)DST; \

tests/lib/libc/atomic/t_atomic_add.c

60

NAME(&val, src); \

tests/lib/libc/atomic/t_atomic_add.c

61

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_add.c

62

"val expects " FMT " but " FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_add.c

84

volatile DTYPE val; \

tests/lib/libc/atomic/t_atomic_add.c

88

val = (DTYPE)DST; \

tests/lib/libc/atomic/t_atomic_add.c

91

res = NAME(&val, src); \

tests/lib/libc/atomic/t_atomic_add.c

92

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_add.c

93

"val expects " FMT " but " FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_and.c

54

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_and.c

57

val = (TYPE)DST; \

tests/lib/libc/atomic/t_atomic_and.c

60

NAME(&val, src); \

tests/lib/libc/atomic/t_atomic_and.c

61

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_and.c

62

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_and.c

83

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_and.c

87

val = (TYPE)DST; \

tests/lib/libc/atomic/t_atomic_and.c

90

res = NAME(&val, src); \

tests/lib/libc/atomic/t_atomic_and.c

91

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_and.c

92

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_cas.c

53

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_cas.c

60

val = (TYPE)OLDVAL; \

tests/lib/libc/atomic/t_atomic_cas.c

65

res = NAME(&val, oldval, newval); \

tests/lib/libc/atomic/t_atomic_cas.c

66

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t_atomic_cas.c

67

"successful case: val expects " FMT " but " FMT, expval, val); \

tests/lib/libc/atomic/t_atomic_cas.c

71

val = (TYPE)OLDVAL; \

tests/lib/libc/atomic/t_atomic_cas.c

76

res = NAME(&val, oldval, newval); \

tests/lib/libc/atomic/t_atomic_cas.c

77

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t_atomic_cas.c

78

"failure case: val expects " FMT " but " FMT, expval, val); \

tests/lib/libc/atomic/t_atomic_dec.c

53

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_dec.c

55

val = (TYPE)VAL; \

tests/lib/libc/atomic/t_atomic_dec.c

57

NAME(&val); \

tests/lib/libc/atomic/t_atomic_dec.c

58

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_dec.c

59

"val expects " FMT " but " FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_dec.c

81

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_dec.c

84

val = (TYPE)VAL; \

tests/lib/libc/atomic/t_atomic_dec.c

86

res = NAME(&val); \

tests/lib/libc/atomic/t_atomic_dec.c

87

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_dec.c

88

"val expects " FMT " but " FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_inc.c

53

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_inc.c

55

val = (TYPE)VAL; \

tests/lib/libc/atomic/t_atomic_inc.c

57

NAME(&val); \

tests/lib/libc/atomic/t_atomic_inc.c

58

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_inc.c

59

"val expects " FMT " but " FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_inc.c

81

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_inc.c

84

val = (TYPE)VAL; \

tests/lib/libc/atomic/t_atomic_inc.c

86

res = NAME(&val); \

tests/lib/libc/atomic/t_atomic_inc.c

87

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_inc.c

88

"val expects " FMT " but " FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_or.c

54

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_or.c

57

val = (TYPE)DST; \

tests/lib/libc/atomic/t_atomic_or.c

60

NAME(&val, src); \

tests/lib/libc/atomic/t_atomic_or.c

61

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_or.c

62

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_or.c

83

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_or.c

87

val = (TYPE)DST; \

tests/lib/libc/atomic/t_atomic_or.c

90

res = NAME(&val, src); \

tests/lib/libc/atomic/t_atomic_or.c

91

ATF_REQUIRE_MSG(val == exp, \

tests/lib/libc/atomic/t_atomic_or.c

92

"val expects 0x%" FMT " but 0x%" FMT, exp, val); \

tests/lib/libc/atomic/t_atomic_swap.c

53

volatile TYPE val; \

tests/lib/libc/atomic/t_atomic_swap.c

58

val = (TYPE)OLDVAL; \

tests/lib/libc/atomic/t_atomic_swap.c

62

res = NAME(&val, newval); \

tests/lib/libc/atomic/t_atomic_swap.c

63

ATF_REQUIRE_MSG(val == expval, \

tests/lib/libc/atomic/t_atomic_swap.c

64

"val expects " FMT " but " FMT, expval, val); \

tests/lib/libc/db/h_lfsr.c

109

switch ((*db->get)(db, &key, &val, 0)) {

tests/lib/libc/db/h_lfsr.c

112

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

116

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

119

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

125

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

126

if (val.size != (len & 0xff) + 1U)

tests/lib/libc/db/h_lfsr.c

128

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

129

if (memcmp(val.data, buf, val.size) != 0)

tests/lib/libc/db/h_lfsr.c

131

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

143

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

147

val.size, c);

tests/lib/libc/db/h_lfsr.c

150

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

162

switch ((*db->get)(db, &key, &val, 0)) {

tests/lib/libc/db/h_lfsr.c

165

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

169

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

172

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

61

DBT key, val;

tests/lib/libc/db/h_lfsr.c

75

val.data = buf;

tests/lib/libc/db/h_lfsr.c

86

val.size = (next(&len) & 0xff) + 1;

tests/lib/libc/db/h_lfsr.c

87

switch ((*db->put)(db, &key, &val, R_NOOVERWRITE)) {

tests/lib/libc/db/h_lfsr.c

90

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

94

key.size, val.size, c);

tests/lib/libc/db/h_lfsr.c

97

key.size, val.size, c);

tests/lib/libc/gen/t_nice.c

164

int rv, val;

tests/lib/libc/gen/t_nice.c

173

val = nice(i);

tests/lib/libc/gen/t_nice.c

174

ATF_REQUIRE(val != -1);

tests/lib/libc/gen/t_nice.c

176

rv = pthread_create(&tid[i], NULL, threadfunc, &val);

tests/lib/libc/gen/t_nice.c

49

int pri, val;

tests/lib/libc/gen/t_nice.c

51

val = *(int *)arg;

tests/lib/libc/gen/t_nice.c

57

if (pri != val)

tests/lib/libc/gen/t_siginfo.c

469

int rv, val;

tests/lib/libc/gen/t_siginfo.c

470

size_t len = sizeof(val);

tests/lib/libc/gen/t_siginfo.c

471

rv = sysctlbyname("machdep.unaligned_sigbus", &val, &len, NULL, 0);

tests/lib/libc/gen/t_siginfo.c

473

if (val == 0)

tests/lib/libc/locale/t_wcstod.c

453

if (t->val == ALT_HUGE_VAL) {

tests/lib/libc/locale/t_wcstod.c

457

} else if (t->val == ALT_MINUS_HUGE_VAL) {

tests/lib/libc/locale/t_wcstod.c

461

} else if (t->val == ALT_NAN) {

tests/lib/libc/locale/t_wcstod.c

465

(void)printf(" expected: %F\n", t->val);

tests/lib/libc/locale/t_wcstod.c

466

ATF_REQUIRE_EQ(d, t->val);

tests/lib/libc/locale/t_wcstod.c

77

double val;

tests/lib/libc/stdio/h_intr.c

406

btype2str(int val)

tests/lib/libc/stdio/h_intr.c

409

if (btypes[i].value == val)

tests/lib/libc/stdlib/h_getopt_long.c

140

longopts[nlongopts].val =

tests/lib/libc/stdlib/h_getopt_long.c

146

longopts[nlongopts].val = (int)longopt[1];

tests/lib/libc/stdlib/t_a64l.c

41

long val;

tests/lib/libc/stdlib/t_a64l.c

62

long val = a64l(t[i].str);

tests/lib/libc/stdlib/t_a64l.c

63

ATF_REQUIRE(val == t[i].val);

tests/lib/libc/stdlib/t_a64l.c

77

char *str = l64a(t[i].val);

tests/lib/libc/stdlib/t_a64l.c

97

ATF_REQUIRE(l64a_r(t[i].val, buf, t[i].len + 1) == 0);

tests/lib/libc/stdlib/t_abs.c

113

ATF_CHECK(labs(table[i].val) == table[i].res);

tests/lib/libc/stdlib/t_abs.c

125

long long val;

tests/lib/libc/stdlib/t_abs.c

142

ATF_CHECK(llabs(table[i].val) == table[i].res);

tests/lib/libc/stdlib/t_abs.c

48

int val;

tests/lib/libc/stdlib/t_abs.c

60

ATF_CHECK(abs(table[i].val) == table[i].res);

tests/lib/libc/stdlib/t_abs.c

72

intmax_t val;

tests/lib/libc/stdlib/t_abs.c

87

ATF_CHECK(imaxabs(table[i].val) == table[i].res);

tests/lib/libc/stdlib/t_abs.c

99

long val;

tests/lib/libc/stdlib/t_strtod.c

102

errno == 0 && *end == '\0' && val == testcases[i].val,

tests/lib/libc/stdlib/t_strtod.c

104

testcases[i].str, testcases[i].val, val, errno, end);

tests/lib/libc/stdlib/t_strtod.c

275

const char *val =

tests/lib/libc/stdlib/t_strtod.c

279

volatile double d1 = strtod(val, NULL);

tests/lib/libc/stdlib/t_strtod.c

281

volatile double d2 = strtod(val, NULL);

tests/lib/libc/stdlib/t_strtod.c

86

long double val;

tests/lib/libc/stdlib/t_strtod.c

99

long double val = strtold(testcases[i].str, &end);

tests/lib/libc/string/t_memchr.c

100

strcpy(&buf[a], tab[t].val);

tests/lib/libc/string/t_memchr.c

30

const char *val;

tests/lib/libc/string/t_strcat.c

31

const char* val;

tests/lib/libc/string/t_strcat.c

91

memcpy(&buf0[a0], tab[t0].val,

tests/lib/libc/string/t_strcat.c

93

memcpy(&buf1[a1], tab[t1].val,

tests/lib/libc/string/t_strcpy.c

31

const char* val;

tests/lib/libc/string/t_strcpy.c

90

memcpy(&buf1[a1], tab[t].val, tab[t].len + 1);

tests/lib/libc/string/t_strlen.c

119

memcpy(&buf[a], tab[t].val, tab[t].len + 1);

tests/lib/libc/string/t_strlen.c

133

write(2, tab[t].val, tab[t].len);

tests/lib/libc/string/t_strlen.c

19

write_num(int val)

tests/lib/libc/string/t_strlen.c

25

buf[i] = '0' + val % 10;

tests/lib/libc/string/t_strlen.c

26

val /= 10;

tests/lib/libc/string/t_strlen.c

27

if (val == 0) {

tests/lib/libc/string/t_strlen.c

52

const char* val;

tests/lib/libc/string/t_strrchr.c

221

strcpy(&buf[a], tab[t].val);

tests/lib/libc/string/t_strrchr.c

30

const char* val;

tests/lib/libc/sys/t_connect.c

50

int sd, val, slist;

tests/lib/libc/sys/t_connect.c

69

val = IP_PORTRANGE_LOW;

tests/lib/libc/sys/t_connect.c

70

if (setsockopt(sd, IPPROTO_IP, IP_PORTRANGE, &val,

tests/lib/libc/sys/t_connect.c

71

sizeof(val)) == -1)

tests/lib/libc/sys/t_eventfd.c

110

while (ctx->state != val) {

tests/lib/libc/sys/t_eventfd.c

117

rv = ctx->state == val;

tests/lib/libc/sys/t_eventfd.c

789

int val;

tests/lib/libc/sys/t_eventfd.c

797

ATF_REQUIRE(ioctl(efd, FIONREAD, &val) == 0);

tests/lib/libc/sys/t_eventfd.c

798

ATF_REQUIRE(val == sizeof(eventfd_t));

tests/lib/libc/sys/t_eventfd.c

800

ATF_REQUIRE(ioctl(efd, FIONWRITE, &val) == 0);

tests/lib/libc/sys/t_eventfd.c

801

ATF_REQUIRE(val == 0);

tests/lib/libc/sys/t_eventfd.c

803

ATF_REQUIRE_ERRNO(ENOTTY, ioctl(efd, FIONSPACE, &val) == -1);

tests/lib/libc/sys/t_eventfd.c

99

wait_state(struct helper_context * const ctx, int const val)

tests/lib/libc/sys/t_getgroups.c

141

const gid_t val = 123456789;

tests/lib/libc/sys/t_getgroups.c

151

gidset[i] = val;

tests/lib/libc/sys/t_getgroups.c

157

if (gidset[i] != val)

tests/lib/libc/sys/t_listen.c

107

int sd, val;

tests/lib/libc/sys/t_listen.c

112

val = IP_PORTRANGE_LOW;

tests/lib/libc/sys/t_listen.c

113

if (setsockopt(sd, IPPROTO_IP, IP_PORTRANGE, &val,

tests/lib/libc/sys/t_listen.c

114

sizeof(val)) == -1)

tests/lib/libc/sys/t_mmap.c

108

int val;

tests/lib/libc/sys/t_mmap.c

110

val = BUFSIZE;

tests/lib/libc/sys/t_mmap.c

118

val = BUFSIZE;

tests/lib/libc/sys/t_mmap.c

120

if (setsockopt(fds[1], SOL_SOCKET, SO_RCVBUF, &val, sizeof(val)) != 0)

tests/lib/libc/sys/t_mmap.c

123

val = BUFSIZE;

tests/lib/libc/sys/t_mmap.c

125

if (setsockopt(fds[0], SOL_SOCKET, SO_SNDBUF, &val, sizeof(val)) != 0)

tests/lib/libc/sys/t_mmap.c

597

int val;

tests/lib/libc/sys/t_mmap.c

603

if (sysctlbyname("vm.user_va0_disable", &val, &len, NULL, 0) != 0)

tests/lib/libc/sys/t_mmap.c

607

map_check(map, val);

tests/lib/libc/sys/t_mmap.c

610

map_check(map, val);

tests/lib/libc/sys/t_mmap.c

613

map_check(map, val);

tests/lib/libc/sys/t_mmap.c

616

map_check(map, val);

tests/lib/libc/sys/t_mmap.c

619

map_check(map, val);

tests/lib/libc/sys/t_sigqueue.c

161

union sigval val;

tests/lib/libc/sys/t_sigqueue.c

175

val.sival_int = 0;

tests/lib/libc/sys/t_sigqueue.c

187

ATF_REQUIRE(sigqueue(pid, signals[i], val) != -1);

tests/lib/libc/sys/t_timerfd.c

104

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

106

switch (read(fd, &val, sizeof(val))) {

tests/lib/libc/sys/t_timerfd.c

110

case sizeof(val):

tests/lib/libc/sys/t_timerfd.c

111

*valp = val;

tests/lib/libc/sys/t_timerfd.c

213

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

245

ATF_CHECK_ERRNO(EAGAIN, timerfd_read(fd, &val) == -1);

tests/lib/libc/sys/t_timerfd.c

261

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

278

RL(timerfd_read(fd, &val));

tests/lib/libc/sys/t_timerfd.c

280

ATF_REQUIRE(check_value_against_bounds(val, 1, 1));

tests/lib/libc/sys/t_timerfd.c

302

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

321

ATF_REQUIRE(timerfd_read(fd, &val) == 0);

tests/lib/libc/sys/t_timerfd.c

323

ATF_REQUIRE(check_value_against_bounds(val, 1, 1));

tests/lib/libc/sys/t_timerfd.c

345

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

360

ATF_REQUIRE(timerfd_read(fd, &val) == 0);

tests/lib/libc/sys/t_timerfd.c

362

ATF_REQUIRE(check_value_against_bounds(val, 3, 5));

tests/lib/libc/sys/t_timerfd.c

384

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

406

ATF_REQUIRE(timerfd_read(fd, &val) == 0);

tests/lib/libc/sys/t_timerfd.c

408

ATF_REQUIRE(check_value_against_bounds(val, 1, 1));

tests/lib/libc/sys/t_timerfd.c

431

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

445

ATF_REQUIRE_ERRNO(ECANCELED, timerfd_read(fd, &val) == -1);

tests/lib/libc/sys/t_timerfd.c

478

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

495

ATF_REQUIRE_ERRNO(ECANCELED, timerfd_read(fd, &val) == -1);

tests/lib/libc/sys/t_timerfd.c

517

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

606

ATF_REQUIRE(timerfd_read(fd, &val) == 0);

tests/lib/libc/sys/t_timerfd.c

607

ATF_REQUIRE(val == 1);

tests/lib/libc/sys/t_timerfd.c

610

ATF_REQUIRE_ERRNO(EAGAIN, timerfd_read(fd, &val) == -1);

tests/lib/libc/sys/t_timerfd.c

722

uint64_t val;

tests/lib/libc/sys/t_timerfd.c

747

ATF_REQUIRE_ERRNO(EBADF, timerfd_read(ctx.fd, &val) == -1);

tests/lib/libc/sys/t_timerfd.c

769

int val;

tests/lib/libc/sys/t_timerfd.c

778

ATF_REQUIRE(ioctl(tfd, FIONREAD, &val) == 0);

tests/lib/libc/sys/t_timerfd.c

779

ATF_REQUIRE(val == 0);

tests/lib/libc/sys/t_timerfd.c

781

ATF_REQUIRE_ERRNO(ENOTTY, ioctl(tfd, FIONWRITE, &val) == -1);

tests/lib/libc/sys/t_timerfd.c

782

ATF_REQUIRE_ERRNO(ENOTTY, ioctl(tfd, FIONSPACE, &val) == -1);

tests/lib/libcurses/director/testlang_parse.y

411

char *val;

tests/lib/libcurses/director/testlang_parse.y

414

val = get_numeric_var($1);

tests/lib/libcurses/director/testlang_parse.y

416

$$ = add_to_vals(data_number, val);

tests/lib/libcurses/slave/curses_commands.c

1997

int val; /* XXX assume 32-bit integer */

tests/lib/libcurses/slave/curses_commands.c

1998

report_return(ret = mvscanw(y, x, fmt, &val));

tests/lib/libcurses/slave/curses_commands.c

2001

snprintf(string, sizeof(string), fmt, val);

tests/lib/libi386/t_user_ldt.c

100

__asm volatile("mov %0,%%fs"::"r" ((unsigned short)val));

tests/lib/libi386/t_user_ldt.c

106

uint8_t val;

tests/lib/libi386/t_user_ldt.c

111

: "=q" (val) : "m" (*addr)

tests/lib/libi386/t_user_ldt.c

113

return val;

tests/lib/libi386/t_user_ldt.c

92

set_ds(unsigned int val)

tests/lib/libi386/t_user_ldt.c

94

__asm volatile("mov %0,%%ds"::"r" ((unsigned short)val));

tests/lib/libi386/t_user_ldt.c

98

set_fs(unsigned int val)

tests/lib/libm/t_hypot.c

683

float val = hypotf(a, a);

tests/lib/libm/t_hypot.c

684

ATF_CHECK(!isinf(val));

tests/lib/libm/t_hypot.c

685

ATF_CHECK(!isnan(val));

tests/lib/libprop/t_proplib.c

148

prop_bool_t val = prop_bool_create(true);

tests/lib/libprop/t_proplib.c

149

ATF_REQUIRE(val != NULL);

tests/lib/libprop/t_proplib.c

150

ATF_REQUIRE_EQ(prop_dictionary_set(dict, "true-val", val), true);

tests/lib/libprop/t_proplib.c

151

prop_object_release(val);

tests/lib/libprop/t_proplib.c

153

val = prop_bool_create(false);

tests/lib/libprop/t_proplib.c

154

ATF_REQUIRE(val != NULL);

tests/lib/libprop/t_proplib.c

155

ATF_REQUIRE_EQ(prop_dictionary_set(dict, "false-val", val), true);

tests/lib/libprop/t_proplib.c

156

prop_object_release(val);

tests/lib/libprop/t_proplib.c

421

} val;

tests/lib/libprop/t_proplib.c

494

ATF_REQUIRE(prop_number_schar_value(n_schar_max, &val.v_schar) &&

tests/lib/libprop/t_proplib.c

495

val.v_schar == SCHAR_MAX);

tests/lib/libprop/t_proplib.c

496

ATF_REQUIRE(prop_number_schar_value(n_schar_min, &val.v_schar) &&

tests/lib/libprop/t_proplib.c

497

val.v_schar == SCHAR_MIN);

tests/lib/libprop/t_proplib.c

498

ATF_REQUIRE(!prop_number_schar_value(n_uchar_max, &val.v_schar));

tests/lib/libprop/t_proplib.c

500

ATF_REQUIRE(prop_number_uchar_value(n_schar_max, &val.v_uchar) &&

tests/lib/libprop/t_proplib.c

501

val.v_uchar == SCHAR_MAX);

tests/lib/libprop/t_proplib.c

502

ATF_REQUIRE(!prop_number_uchar_value(n_schar_min, &val.v_uchar));

tests/lib/libprop/t_proplib.c

503

ATF_REQUIRE(prop_number_uchar_value(n_uchar_max, &val.v_uchar) &&

tests/lib/libprop/t_proplib.c

504

val.v_uchar == UCHAR_MAX);

tests/lib/libprop/t_proplib.c

506

ATF_REQUIRE(!prop_number_schar_value(n_shrt_min, &val.v_schar));

tests/lib/libprop/t_proplib.c

507

ATF_REQUIRE(!prop_number_uchar_value(n_shrt_max, &val.v_uchar));

tests/lib/libprop/t_proplib.c

510

ATF_REQUIRE(prop_number_short_value(n_uchar_max, &val.v_shrt) &&

tests/lib/libprop/t_proplib.c

511

val.v_shrt == UCHAR_MAX);

tests/lib/libprop/t_proplib.c

513

ATF_REQUIRE(prop_number_short_value(n_shrt_max, &val.v_shrt) &&

tests/lib/libprop/t_proplib.c

514

val.v_shrt == SHRT_MAX);

tests/lib/libprop/t_proplib.c

515

ATF_REQUIRE(prop_number_short_value(n_shrt_min, &val.v_shrt) &&

tests/lib/libprop/t_proplib.c

516

val.v_shrt == SHRT_MIN);

tests/lib/libprop/t_proplib.c

517

ATF_REQUIRE(!prop_number_short_value(n_ushrt_max, &val.v_shrt));

tests/lib/libprop/t_proplib.c

519

ATF_REQUIRE(prop_number_ushort_value(n_shrt_max, &val.v_ushrt) &&

tests/lib/libprop/t_proplib.c

520

val.v_ushrt == SHRT_MAX);

tests/lib/libprop/t_proplib.c

521

ATF_REQUIRE(!prop_number_ushort_value(n_shrt_min, &val.v_ushrt));

tests/lib/libprop/t_proplib.c

522

ATF_REQUIRE(prop_number_ushort_value(n_ushrt_max, &val.v_ushrt) &&

tests/lib/libprop/t_proplib.c

523

val.v_ushrt == USHRT_MAX);

tests/lib/libprop/t_proplib.c

525

ATF_REQUIRE(!prop_number_short_value(n_int_min, &val.v_shrt));

tests/lib/libprop/t_proplib.c

526

ATF_REQUIRE(!prop_number_ushort_value(n_int_max, &val.v_ushrt));

tests/lib/libprop/t_proplib.c

529

ATF_REQUIRE(prop_number_int_value(n_ushrt_max, &val.v_int) &&

tests/lib/libprop/t_proplib.c

530

val.v_int == USHRT_MAX);

tests/lib/libprop/t_proplib.c

532

ATF_REQUIRE(prop_number_int_value(n_int_max, &val.v_int) &&

tests/lib/libprop/t_proplib.c

533

val.v_int == INT_MAX);

tests/lib/libprop/t_proplib.c

534

ATF_REQUIRE(prop_number_int_value(n_int_min, &val.v_int) &&

tests/lib/libprop/t_proplib.c

535

val.v_int == INT_MIN);

tests/lib/libprop/t_proplib.c

536

ATF_REQUIRE(!prop_number_int_value(n_uint_max, &val.v_int));

tests/lib/libprop/t_proplib.c

538

ATF_REQUIRE(prop_number_uint_value(n_int_max, &val.v_uint) &&

tests/lib/libprop/t_proplib.c

539

val.v_uint == INT_MAX);

tests/lib/libprop/t_proplib.c

540

ATF_REQUIRE(!prop_number_uint_value(n_int_min, &val.v_uint));

tests/lib/libprop/t_proplib.c

541

ATF_REQUIRE(prop_number_uint_value(n_uint_max, &val.v_uint) &&

tests/lib/libprop/t_proplib.c

542

val.v_uint == UINT_MAX);

tests/lib/libprop/t_proplib.c

545

ATF_REQUIRE(!prop_number_int_value(n_long_min, &val.v_int));

tests/lib/libprop/t_proplib.c

546

ATF_REQUIRE(!prop_number_uint_value(n_long_max, &val.v_uint));

tests/lib/libprop/t_proplib.c

548

ATF_REQUIRE(!prop_number_int_value(n_llong_min, &val.v_int));

tests/lib/libprop/t_proplib.c

549

ATF_REQUIRE(!prop_number_uint_value(n_llong_max, &val.v_uint));

tests/lib/libprop/t_proplib.c

554

ATF_REQUIRE(prop_number_long_value(n_uint_max, &val.v_long) &&

tests/lib/libprop/t_proplib.c

555

val.v_long == UINT_MAX);

tests/lib/libprop/t_proplib.c

558

ATF_REQUIRE(prop_number_long_value(n_long_max, &val.v_long) &&

tests/lib/libprop/t_proplib.c

559

val.v_long == LONG_MAX);

tests/lib/libprop/t_proplib.c

560

ATF_REQUIRE(prop_number_long_value(n_long_min, &val.v_long) &&

tests/lib/libprop/t_proplib.c

561

val.v_long == LONG_MIN);

tests/lib/libprop/t_proplib.c

562

ATF_REQUIRE(!prop_number_long_value(n_ulong_max, &val.v_long));

tests/lib/libprop/t_proplib.c

564

ATF_REQUIRE(prop_number_ulong_value(n_long_max, &val.v_ulong) &&

tests/lib/libprop/t_proplib.c

565

val.v_ulong == LONG_MAX);

tests/lib/libprop/t_proplib.c

566

ATF_REQUIRE(!prop_number_ulong_value(n_long_min, &val.v_ulong));

tests/lib/libprop/t_proplib.c

567

ATF_REQUIRE(prop_number_ulong_value(n_ulong_max, &val.v_ulong) &&

tests/lib/libprop/t_proplib.c

568

val.v_ulong == ULONG_MAX);

tests/lib/libprop/t_proplib.c

571

ATF_REQUIRE(!prop_number_long_value(n_llong_min, &val.v_long));

tests/lib/libprop/t_proplib.c

572

ATF_REQUIRE(!prop_number_ulong_value(n_llong_max, &val.v_ulong));

tests/lib/libprop/t_proplib.c

577

ATF_REQUIRE(prop_number_intptr_value(n_uint_max, &val.v_intptr) &&

tests/lib/libprop/t_proplib.c

578

val.v_intptr == UINT_MAX);

tests/lib/libprop/t_proplib.c

581

ATF_REQUIRE(prop_number_intptr_value(n_intptr_max, &val.v_intptr) &&

tests/lib/libprop/t_proplib.c

582

val.v_intptr == INTPTR_MAX);

tests/lib/libprop/t_proplib.c

583

ATF_REQUIRE(prop_number_intptr_value(n_intptr_min, &val.v_intptr) &&

tests/lib/libprop/t_proplib.c

584

val.v_intptr == INTPTR_MIN);

tests/lib/libprop/t_proplib.c

585

ATF_REQUIRE(!prop_number_intptr_value(n_uintptr_max, &val.v_intptr));

tests/lib/libprop/t_proplib.c

587

ATF_REQUIRE(prop_number_uintptr_value(n_intptr_max, &val.v_uintptr) &&

tests/lib/libprop/t_proplib.c

588

val.v_uintptr == INTPTR_MAX);

tests/lib/libprop/t_proplib.c

589

ATF_REQUIRE(!prop_number_uintptr_value(n_intptr_min, &val.v_uintptr));

tests/lib/libprop/t_proplib.c

590

ATF_REQUIRE(prop_number_uintptr_value(n_uintptr_max, &val.v_uintptr) &&

tests/lib/libprop/t_proplib.c

591

val.v_uintptr == UINTPTR_MAX);

tests/lib/libprop/t_proplib.c

594

ATF_REQUIRE(!prop_number_intptr_value(n_llong_min, &val.v_intptr));

tests/lib/libprop/t_proplib.c

595

ATF_REQUIRE(!prop_number_uintptr_value(n_llong_max, &val.v_uintptr));

tests/lib/libprop/t_proplib.c

600

ATF_REQUIRE(prop_number_longlong_value(n_uint_max, &val.v_llong) &&

tests/lib/libprop/t_proplib.c

601

val.v_llong == UINT_MAX);

tests/lib/libprop/t_proplib.c

603

ATF_REQUIRE(prop_number_longlong_value(n_ulong_max, &val.v_llong) &&

tests/lib/libprop/t_proplib.c

604

val.v_llong == ULONG_MAX);

tests/lib/libprop/t_proplib.c

607

ATF_REQUIRE(prop_number_longlong_value(n_llong_max, &val.v_llong) &&

tests/lib/libprop/t_proplib.c

608

val.v_llong == LLONG_MAX);

tests/lib/libprop/t_proplib.c

609

ATF_REQUIRE(prop_number_longlong_value(n_llong_min, &val.v_llong) &&

tests/lib/libprop/t_proplib.c

610

val.v_llong == LLONG_MIN);

tests/lib/libprop/t_proplib.c

611

ATF_REQUIRE(!prop_number_longlong_value(n_ullong_max, &val.v_llong));

tests/lib/libprop/t_proplib.c

613

ATF_REQUIRE(prop_number_ulonglong_value(n_llong_max, &val.v_ullong) &&

tests/lib/libprop/t_proplib.c

614

val.v_ullong == LLONG_MAX);

tests/lib/libprop/t_proplib.c

615

ATF_REQUIRE(!prop_number_ulonglong_value(n_llong_min, &val.v_ullong));

tests/lib/libprop/t_proplib.c

616

ATF_REQUIRE(prop_number_ulonglong_value(n_ullong_max, &val.v_ullong) &&

tests/lib/libprop/t_proplib.c

617

val.v_ullong == ULLONG_MAX);

tests/lib/libprop/t_proplib.c

620

ATF_REQUIRE(prop_number_int8_value(n_int8_max, &val.v_int8) &&

tests/lib/libprop/t_proplib.c

621

val.v_int8 == INT8_MAX);

tests/lib/libprop/t_proplib.c

622

ATF_REQUIRE(prop_number_int8_value(n_int8_min, &val.v_int8) &&

tests/lib/libprop/t_proplib.c

623

val.v_int8 == INT8_MIN);

tests/lib/libprop/t_proplib.c

624

ATF_REQUIRE(!prop_number_int8_value(n_uint8_max, &val.v_int8));

tests/lib/libprop/t_proplib.c

626

ATF_REQUIRE(prop_number_uint8_value(n_int8_max, &val.v_uint8) &&

tests/lib/libprop/t_proplib.c

627

val.v_uint8 == INT8_MAX);

tests/lib/libprop/t_proplib.c

628

ATF_REQUIRE(!prop_number_uint8_value(n_int8_min, &val.v_uint8));

tests/lib/libprop/t_proplib.c

629

ATF_REQUIRE(prop_number_uint8_value(n_uint8_max, &val.v_uint8) &&

tests/lib/libprop/t_proplib.c

630

val.v_uint8 == UINT8_MAX);

tests/lib/libprop/t_proplib.c

632

ATF_REQUIRE(!prop_number_int8_value(n_int16_min, &val.v_int8));

tests/lib/libprop/t_proplib.c

633

ATF_REQUIRE(!prop_number_uint8_value(n_int16_max, &val.v_uint8));

tests/lib/libprop/t_proplib.c

636

ATF_REQUIRE(prop_number_int16_value(n_uint8_max, &val.v_int16) &&

tests/lib/libprop/t_proplib.c

637

val.v_int16 == UINT8_MAX);

tests/lib/libprop/t_proplib.c

639

ATF_REQUIRE(prop_number_int16_value(n_int16_max, &val.v_int16) &&

tests/lib/libprop/t_proplib.c

640

val.v_int16 == INT16_MAX);

tests/lib/libprop/t_proplib.c

641

ATF_REQUIRE(prop_number_int16_value(n_int16_min, &val.v_int16) &&

tests/lib/libprop/t_proplib.c

642

val.v_int16 == INT16_MIN);

tests/lib/libprop/t_proplib.c

643

ATF_REQUIRE(!prop_number_int16_value(n_uint16_max, &val.v_int16));

tests/lib/libprop/t_proplib.c

645

ATF_REQUIRE(prop_number_uint16_value(n_int16_max, &val.v_uint16) &&

tests/lib/libprop/t_proplib.c

646

val.v_uint16 == INT16_MAX);

tests/lib/libprop/t_proplib.c

647

ATF_REQUIRE(!prop_number_uint16_value(n_int16_min, &val.v_uint16));

tests/lib/libprop/t_proplib.c

648

ATF_REQUIRE(prop_number_uint16_value(n_uint16_max, &val.v_uint16) &&

tests/lib/libprop/t_proplib.c

649

val.v_uint16 == UINT16_MAX);

tests/lib/libprop/t_proplib.c

651

ATF_REQUIRE(!prop_number_int16_value(n_int32_min, &val.v_int16));

tests/lib/libprop/t_proplib.c

652

ATF_REQUIRE(!prop_number_uint16_value(n_int32_max, &val.v_uint16));

tests/lib/libprop/t_proplib.c

655

ATF_REQUIRE(prop_number_int32_value(n_uint16_max, &val.v_int32) &&

tests/lib/libprop/t_proplib.c

656

val.v_int32 == UINT16_MAX);

tests/lib/libprop/t_proplib.c

658

ATF_REQUIRE(prop_number_int32_value(n_int32_max, &val.v_int32) &&

tests/lib/libprop/t_proplib.c

659

val.v_int32 == INT32_MAX);

tests/lib/libprop/t_proplib.c

660

ATF_REQUIRE(prop_number_int32_value(n_int32_min, &val.v_int32) &&

tests/lib/libprop/t_proplib.c

661

val.v_int32 == INT32_MIN);

tests/lib/libprop/t_proplib.c

662

ATF_REQUIRE(!prop_number_int32_value(n_uint32_max, &val.v_int32));

tests/lib/libprop/t_proplib.c

664

ATF_REQUIRE(prop_number_uint32_value(n_int32_max, &val.v_uint32) &&

tests/lib/libprop/t_proplib.c

665

val.v_uint32 == INT32_MAX);

tests/lib/libprop/t_proplib.c

666

ATF_REQUIRE(!prop_number_uint32_value(n_int32_min, &val.v_uint32));

tests/lib/libprop/t_proplib.c

667

ATF_REQUIRE(prop_number_uint32_value(n_uint32_max, &val.v_uint32) &&

tests/lib/libprop/t_proplib.c

668

val.v_uint32 == UINT32_MAX);

tests/lib/libprop/t_proplib.c

670

ATF_REQUIRE(!prop_number_int32_value(n_int64_min, &val.v_int32));

tests/lib/libprop/t_proplib.c

671

ATF_REQUIRE(!prop_number_uint32_value(n_int64_max, &val.v_uint32));

tests/lib/libprop/t_proplib.c

674

ATF_REQUIRE(prop_number_int64_value(n_uint32_max, &val.v_int64) &&

tests/lib/libprop/t_proplib.c

675

val.v_int64 == UINT32_MAX);

tests/lib/libprop/t_proplib.c

677

ATF_REQUIRE(prop_number_int64_value(n_int64_max, &val.v_int64) &&

tests/lib/libprop/t_proplib.c

678

val.v_int64 == INT64_MAX);

tests/lib/libprop/t_proplib.c

679

ATF_REQUIRE(prop_number_int64_value(n_int64_min, &val.v_int64) &&

tests/lib/libprop/t_proplib.c

680

val.v_int64 == INT64_MIN);

tests/lib/libprop/t_proplib.c

681

ATF_REQUIRE(!prop_number_int64_value(n_uint64_max, &val.v_int64));

tests/lib/libprop/t_proplib.c

683

ATF_REQUIRE(prop_number_uint64_value(n_int64_max, &val.v_uint64) &&

tests/lib/libprop/t_proplib.c

684

val.v_uint64 == INT64_MAX);

tests/lib/libprop/t_proplib.c

685

ATF_REQUIRE(!prop_number_uint64_value(n_int64_min, &val.v_uint64));

tests/lib/libprop/t_proplib.c

686

ATF_REQUIRE(prop_number_uint64_value(n_uint64_max, &val.v_uint64) &&

tests/lib/libprop/t_proplib.c

687

val.v_uint64 == UINT64_MAX);

tests/lib/libprop/t_proplib.c

836

} val;

tests/lib/libprop/t_proplib.c

846

ATF_REQUIRE(prop_dictionary_get_schar(dict, "schar", &val.v_schar));

tests/lib/libprop/t_proplib.c

847

ATF_REQUIRE(val.v_schar == SCHAR_MIN);

tests/lib/libprop/t_proplib.c

850

ATF_REQUIRE(prop_dictionary_get_short(dict, "shrt", &val.v_shrt));

tests/lib/libprop/t_proplib.c

851

ATF_REQUIRE(val.v_shrt == SHRT_MIN);

tests/lib/libprop/t_proplib.c

854

ATF_REQUIRE(prop_dictionary_get_int(dict, "int", &val.v_int));

tests/lib/libprop/t_proplib.c

855

ATF_REQUIRE(val.v_int == INT_MIN);

tests/lib/libprop/t_proplib.c

858

ATF_REQUIRE(prop_dictionary_get_long(dict, "long", &val.v_long));

tests/lib/libprop/t_proplib.c

859

ATF_REQUIRE(val.v_long == LONG_MIN);

tests/lib/libprop/t_proplib.c

863

&val.v_llong));

tests/lib/libprop/t_proplib.c

864

ATF_REQUIRE(val.v_llong == LLONG_MIN);

tests/lib/libprop/t_proplib.c

867

ATF_REQUIRE(prop_dictionary_get_intptr(dict, "intptr", &val.v_intptr));

tests/lib/libprop/t_proplib.c

868

ATF_REQUIRE(val.v_intptr == INTPTR_MIN);

tests/lib/libprop/t_proplib.c

871

ATF_REQUIRE(prop_dictionary_get_int8(dict, "int8", &val.v_int8));

tests/lib/libprop/t_proplib.c

872

ATF_REQUIRE(val.v_int8 == INT8_MIN);

tests/lib/libprop/t_proplib.c

875

ATF_REQUIRE(prop_dictionary_get_int16(dict, "int16", &val.v_int16));

tests/lib/libprop/t_proplib.c

876

ATF_REQUIRE(val.v_int16 == INT16_MIN);

tests/lib/libprop/t_proplib.c

879

ATF_REQUIRE(prop_dictionary_get_int32(dict, "int32", &val.v_int32));

tests/lib/libprop/t_proplib.c

880

ATF_REQUIRE(val.v_int32 == INT32_MIN);

tests/lib/libprop/t_proplib.c

883

ATF_REQUIRE(prop_dictionary_get_int64(dict, "int64", &val.v_int64));

tests/lib/libprop/t_proplib.c

884

ATF_REQUIRE(val.v_int64 == INT64_MIN);

tests/lib/libprop/t_proplib.c

888

ATF_REQUIRE(prop_dictionary_get_uchar(dict, "uchar", &val.v_uchar));

tests/lib/libprop/t_proplib.c

889

ATF_REQUIRE(val.v_uchar == UCHAR_MAX);

tests/lib/libprop/t_proplib.c

892

ATF_REQUIRE(prop_dictionary_get_ushort(dict, "ushrt", &val.v_ushrt));

tests/lib/libprop/t_proplib.c

893

ATF_REQUIRE(val.v_ushrt == USHRT_MAX);

tests/lib/libprop/t_proplib.c

896

ATF_REQUIRE(prop_dictionary_get_uint(dict, "uint", &val.v_uint));

tests/lib/libprop/t_proplib.c

897

ATF_REQUIRE(val.v_uint == UINT_MAX);

tests/lib/libprop/t_proplib.c

900

ATF_REQUIRE(prop_dictionary_get_ulong(dict, "ulong", &val.v_ulong));

tests/lib/libprop/t_proplib.c

901

ATF_REQUIRE(val.v_ulong == ULONG_MAX);

tests/lib/libprop/t_proplib.c

906

&val.v_ullong));

tests/lib/libprop/t_proplib.c

907

ATF_REQUIRE(val.v_ullong == ULLONG_MAX);

tests/lib/libprop/t_proplib.c

911

&val.v_uintptr));

tests/lib/libprop/t_proplib.c

912

ATF_REQUIRE(val.v_uintptr == UINTPTR_MAX);

tests/lib/libprop/t_proplib.c

915

ATF_REQUIRE(prop_dictionary_get_uint8(dict, "uint8", &val.v_uint8));

tests/lib/libprop/t_proplib.c

916

ATF_REQUIRE(val.v_uint8 == UINT8_MAX);

tests/lib/libprop/t_proplib.c

919

ATF_REQUIRE(prop_dictionary_get_uint16(dict, "uint16", &val.v_uint16));

tests/lib/libprop/t_proplib.c

920

ATF_REQUIRE(val.v_uint16 == UINT16_MAX);

tests/lib/libprop/t_proplib.c

923

ATF_REQUIRE(prop_dictionary_get_uint32(dict, "uint32", &val.v_uint32));

tests/lib/libprop/t_proplib.c

924

ATF_REQUIRE(val.v_uint32 == UINT32_MAX);

tests/lib/libprop/t_proplib.c

927

ATF_REQUIRE(prop_dictionary_get_uint64(dict, "uint64", &val.v_uint64));

tests/lib/libprop/t_proplib.c

928

ATF_REQUIRE(val.v_uint64 == UINT64_MAX);

tests/lib/libpthread/t_join.c

116

PTHREAD_REQUIRE(pthread_join(thread[i], &val));

tests/lib/libpthread/t_join.c

120

ATF_REQUIRE(val != NULL);

tests/lib/libpthread/t_join.c

121

ATF_REQUIRE(val == (void *)(i + 1));

tests/lib/libpthread/t_join.c

74

void *val = NULL;

tests/lib/libpthread/t_sem.c

161

int val;

tests/lib/libpthread/t_sem.c

168

SEM_REQUIRE(sem_getvalue(&sem_b, &val));

tests/lib/libpthread/t_sem.c

169

ATF_REQUIRE_EQ(0, val);

tests/lib/libpthread/t_sem.c

172

SEM_REQUIRE(sem_getvalue(&sem_b, &val));

tests/lib/libpthread/t_sem.c

173

ATF_REQUIRE_EQ(1, val);

tests/lib/librt/t_sem.c

84

int val;

tests/lib/librt/t_sem.c

93

ATF_REQUIRE_EQ(sem_getvalue(sem_b, &val), 0);

tests/lib/librt/t_sem.c

94

ATF_REQUIRE_EQ(val, 0);

tests/lib/librt/t_sem.c

97

ATF_REQUIRE_EQ(sem_getvalue(sem_b, &val), 0);

tests/lib/librt/t_sem.c

98

ATF_REQUIRE_EQ(val, 1);

tests/lib/libutil/t_snprintb.c

128

(uintmax_t)val,

tests/lib/libutil/t_snprintb.c

135

#define h_snprintb_m_len(bufsize, bitfmt, val, line_max, \

tests/lib/libutil/t_snprintb.c

138

bufsize, bitfmt, sizeof(bitfmt) - 1, val, #val, line_max, \

tests/lib/libutil/t_snprintb.c

141

#define h_snprintb(bitfmt, val, want_buf) \

tests/lib/libutil/t_snprintb.c

142

h_snprintb_m_len(1024, bitfmt, val, 0, sizeof(want_buf) - 1, want_buf)

tests/lib/libutil/t_snprintb.c

144

#define h_snprintb_len(bufsize, bitfmt, val, want_rv, want_buf) \

tests/lib/libutil/t_snprintb.c

145

h_snprintb_m_len(bufsize, bitfmt, val, 0, want_rv, want_buf)

tests/lib/libutil/t_snprintb.c

150

#define h_snprintb_val_error(bitfmt, val, want_buf) \

tests/lib/libutil/t_snprintb.c

151

h_snprintb_m_len(1024, bitfmt, val, 0, -1, want_buf)

tests/lib/libutil/t_snprintb.c

153

#define h_snprintb_m(bitfmt, val, line_max, want_buf) \

tests/lib/libutil/t_snprintb.c

154

h_snprintb_m_len(1024, bitfmt, val, line_max, \

tests/lib/libutil/t_snprintb.c

60

uint64_t val, const char *val_str,

tests/lib/libutil/t_snprintb.c

85

int rv = snprintb_m(buf, bufsize, bitfmt, val, line_max);

tests/modules/t_modctl.c

417

char val[128];

tests/modules/t_modctl.c

419

&val, sizeof(val)));

tests/modules/t_modctl.c

420

ATF_CHECK(strcmp(val, "1st string") == 0);

tests/modules/t_modctl.c

437

char val[128];

tests/modules/t_modctl.c

439

&val, sizeof(val)));

tests/modules/t_modctl.c

440

ATF_CHECK(strcmp(val, "2nd string") == 0);

tests/modules/t_ufetchstore.c

214

do_ustore_8(uint8_t *uaddr, uint8_t val)

tests/modules/t_ufetchstore.c

220

.val8 = val,

tests/modules/t_ufetchstore.c

228

do_ustore_16(uint16_t *uaddr, uint16_t val)

tests/modules/t_ufetchstore.c

234

.val16 = val,

tests/modules/t_ufetchstore.c

242

do_ustore_32(uint32_t *uaddr, uint32_t val)

tests/modules/t_ufetchstore.c

248

.val32 = val,

tests/modules/t_ufetchstore.c

257

do_ustore_64(uint64_t *uaddr, uint64_t val)

tests/modules/t_ufetchstore.c

263

.val64 = val,

tests/modules/threadpool_tester/threadpool_tester.c

103

__func__, val, opool == pool ? "match" : "NO MATCH"));

tests/modules/threadpool_tester/threadpool_tester.c

105

threadpool_put(pool, val);

tests/modules/threadpool_tester/threadpool_tester.c

109

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

121

int error, val;

tests/modules/threadpool_tester/threadpool_tester.c

126

val = -1;

tests/modules/threadpool_tester/threadpool_tester.c

127

node.sysctl_data = &val;

tests/modules/threadpool_tester/threadpool_tester.c

132

if (! pri_is_valid(val))

tests/modules/threadpool_tester/threadpool_tester.c

137

pool = ctx->ctx_unbound[pri_to_idx(val)];

tests/modules/threadpool_tester/threadpool_tester.c

138

ctx->ctx_unbound[pri_to_idx(val)] = NULL;

tests/modules/threadpool_tester/threadpool_tester.c

143

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

147

threadpool_put(pool, val);

tests/modules/threadpool_tester/threadpool_tester.c

149

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

160

int error, val;

tests/modules/threadpool_tester/threadpool_tester.c

165

val = -1;

tests/modules/threadpool_tester/threadpool_tester.c

166

node.sysctl_data = &val;

tests/modules/threadpool_tester/threadpool_tester.c

171

if (! pri_is_valid(val))

tests/modules/threadpool_tester/threadpool_tester.c

175

pool = ctx->ctx_unbound[pri_to_idx(val)];

tests/modules/threadpool_tester/threadpool_tester.c

178

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

185

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

197

int error, val;

tests/modules/threadpool_tester/threadpool_tester.c

202

val = -1;

tests/modules/threadpool_tester/threadpool_tester.c

203

node.sysctl_data = &val;

tests/modules/threadpool_tester/threadpool_tester.c

208

if (! pri_is_valid(val))

tests/modules/threadpool_tester/threadpool_tester.c

211

error = threadpool_percpu_get(&pcpu, val);

tests/modules/threadpool_tester/threadpool_tester.c

214

__func__, val, error));

tests/modules/threadpool_tester/threadpool_tester.c

219

if (ctx->ctx_percpu[pri_to_idx(val)] == NULL)

tests/modules/threadpool_tester/threadpool_tester.c

220

ctx->ctx_percpu[pri_to_idx(val)] = pcpu;

tests/modules/threadpool_tester/threadpool_tester.c

222

opcpu = ctx->ctx_percpu[pri_to_idx(val)];

tests/modules/threadpool_tester/threadpool_tester.c

228

__func__, val, opcpu == pcpu ? "match" : "NO MATCH"));

tests/modules/threadpool_tester/threadpool_tester.c

230

threadpool_percpu_put(pcpu, val);

tests/modules/threadpool_tester/threadpool_tester.c

234

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

246

int error, val;

tests/modules/threadpool_tester/threadpool_tester.c

251

val = -1;

tests/modules/threadpool_tester/threadpool_tester.c

252

node.sysctl_data = &val;

tests/modules/threadpool_tester/threadpool_tester.c

257

if (! pri_is_valid(val))

tests/modules/threadpool_tester/threadpool_tester.c

262

pcpu = ctx->ctx_percpu[pri_to_idx(val)];

tests/modules/threadpool_tester/threadpool_tester.c

263

ctx->ctx_percpu[pri_to_idx(val)] = NULL;

tests/modules/threadpool_tester/threadpool_tester.c

268

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

272

threadpool_percpu_put(pcpu, val);

tests/modules/threadpool_tester/threadpool_tester.c

274

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

286

int error, val;

tests/modules/threadpool_tester/threadpool_tester.c

291

val = -1;

tests/modules/threadpool_tester/threadpool_tester.c

292

node.sysctl_data = &val;

tests/modules/threadpool_tester/threadpool_tester.c

297

if (! pri_is_valid(val))

tests/modules/threadpool_tester/threadpool_tester.c

301

pcpu = ctx->ctx_percpu[pri_to_idx(val)];

tests/modules/threadpool_tester/threadpool_tester.c

304

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

314

__func__, val));

tests/modules/threadpool_tester/threadpool_tester.c

325

unsigned int val;

tests/modules/threadpool_tester/threadpool_tester.c

332

val = ctx->ctx_value;

tests/modules/threadpool_tester/threadpool_tester.c

333

node.sysctl_data = &val;

tests/modules/threadpool_tester/threadpool_tester.c

339

ctx->ctx_value = val;

tests/modules/threadpool_tester/threadpool_tester.c

72

int error, val;

tests/modules/threadpool_tester/threadpool_tester.c

77

val = -1;

tests/modules/threadpool_tester/threadpool_tester.c

78

node.sysctl_data = &val;

tests/modules/threadpool_tester/threadpool_tester.c

83

if (! pri_is_valid(val))

tests/modules/threadpool_tester/threadpool_tester.c

86

error = threadpool_get(&pool, val);

tests/modules/threadpool_tester/threadpool_tester.c

89

__func__, val, error));

tests/modules/threadpool_tester/threadpool_tester.c

94

if (ctx->ctx_unbound[pri_to_idx(val)] == NULL)

tests/modules/threadpool_tester/threadpool_tester.c

95

ctx->ctx_unbound[pri_to_idx(val)] = pool;

tests/modules/threadpool_tester/threadpool_tester.c

97

opool = ctx->ctx_unbound[pri_to_idx(val)];

tests/modules/ufetchstore/t_ufetchstore.c

214

do_ustore_8(uint8_t *uaddr, uint8_t val)

tests/modules/ufetchstore/t_ufetchstore.c

220

.val8 = val,

tests/modules/ufetchstore/t_ufetchstore.c

228

do_ustore_16(uint16_t *uaddr, uint16_t val)

tests/modules/ufetchstore/t_ufetchstore.c

234

.val16 = val,

tests/modules/ufetchstore/t_ufetchstore.c

242

do_ustore_32(uint32_t *uaddr, uint32_t val)

tests/modules/ufetchstore/t_ufetchstore.c

248

.val32 = val,

tests/modules/ufetchstore/t_ufetchstore.c

257

do_ustore_64(uint64_t *uaddr, uint64_t val)

tests/modules/ufetchstore/t_ufetchstore.c

263

.val64 = val,

tests/usr.bin/xlint/lint1/expr_fold.c

291

unary_minus_overflow(unsigned long long val)

tests/usr.bin/xlint/lint1/expr_fold.c

293

if (val > -(unsigned long long)(-0x7fffffffffffffffL - 1))

tests/usr.bin/xlint/lint1/msg_135.c

13

unsigned val;

tests/usr.bin/xlint/lint1/msg_135.c

16

val = *(const unsigned *)(*pp);

tests/usr.bin/xlint/lint1/msg_135.c

18

return val;

tests/usr.bin/xlint/lint1/msg_368.c

19

example(uint64_t val)

tests/usr.bin/xlint/lint1/msg_368.c

27

val);

tests/usr.bin/xlint/lint1/msg_368.c

33

val);

tools/compat/snprintf.c

540

int val;

tools/compat/snprintf.c

543

val = vasprintf (ret, format, args);

tools/compat/snprintf.c

549

tmp = malloc (val + 1);

tools/compat/snprintf.c

554

if (val != ret2 || strcmp(*ret, tmp))

tools/compat/snprintf.c

561

return val;

tools/compat/snprintf.c

570

int val;

tools/compat/snprintf.c

573

val = vasnprintf (ret, max_sz, format, args);

tools/compat/snprintf.c

579

tmp = malloc (val + 1);

tools/compat/snprintf.c

584

if (val != ret2 || strcmp(*ret, tmp))

tools/compat/snprintf.c

591

return val;

usr.bin/audio/common/audio.c

120

audio_enc_from_val(int val)

usr.bin/audio/common/audio.c

125

if (encs[i].eno == val)

usr.bin/cal/cal.c

564

int display, val, rc;

usr.bin/cal/cal.c

585

if ((val = day / 100) != 0) {

usr.bin/cal/cal.c

587

*p++ = val + '0';

usr.bin/cal/cal.c

593

val = day / 10;

usr.bin/cal/cal.c

594

if (val || display)

usr.bin/cal/cal.c

595

*p++ = val + '0';

usr.bin/calendar/calendar.c

349

int val;

usr.bin/calendar/calendar.c

361

val = 0;

usr.bin/calendar/calendar.c

376

val = (int)strtol(p, &p, 10); /* if 0, it's failure */

usr.bin/calendar/calendar.c

380

return val;

usr.bin/calendar/calendar.c

388

if ((val = getmonth(start)) != 0)

usr.bin/calendar/calendar.c

390

else if ((val = getday(start)) != 0)

usr.bin/calendar/calendar.c

401

return val;

usr.bin/chflags/chflags.c

118

val = strtol(flags, &ep, 8);

usr.bin/chflags/chflags.c

119

if (val < 0)

usr.bin/chflags/chflags.c

125

set = val;

usr.bin/chflags/chflags.c

66

long val;

usr.bin/cksum/cksum.c

157

uint32_t val;

usr.bin/cksum/cksum.c

450

if (cfncn(fd, &val, &len))

usr.bin/cksum/cksum.c

457

if (val == should_val)

usr.bin/cksum/cksum.c

508

if (cfncn(fd, &val, &len)) {

usr.bin/cksum/cksum.c

512

pfncn(fn, val, len);

usr.bin/cksum/print.c

50

pcrc(char *fn, uint32_t val, off_t len)

usr.bin/cksum/print.c

52

(void)printf("%lu %lld", (unsigned long)val, (long long)len);

usr.bin/cksum/print.c

59

psum1(char *fn, uint32_t val, off_t len)

usr.bin/cksum/print.c

61

(void)printf("%lu %lld", (unsigned long)val,

usr.bin/cksum/print.c

69

psum2(char *fn, uint32_t val, off_t len)

usr.bin/cksum/print.c

71

(void)printf("%lu %lld", (unsigned long)val,

usr.bin/config/defs.h

531

int64_t val;

usr.bin/config/defs.h

548

#define ht_insert2(ht, nam1, nam2, val) ht_insrep2(ht, nam1, nam2, val, 0)

usr.bin/config/defs.h

549

#define ht_insert(ht, nam, val) ht_insrep(ht, nam, val, 0)

usr.bin/config/defs.h

550

#define ht_replace(ht, nam, val) ht_insrep(ht, nam, val, 1)

usr.bin/config/gram.y

1088

value { $$ = MKF2(loc, val, $1, NULL); }

usr.bin/config/gram.y

1089

| value ',' values { $$ = MKF2(loc, val, $1, $3); }

usr.bin/config/gram.y

1095

| '-' NUMBER { $$.fmt = $2.fmt; $$.val = -$2.val; }

usr.bin/config/gram.y

1250

mk_defoptlist(const char *name, const char *val, const char *lintval)

usr.bin/config/gram.y

1252

return defoptlist_create(name, val, lintval);

usr.bin/config/gram.y

166

int64_t val;

usr.bin/config/gram.y

216

%type <val> major_minor

usr.bin/config/gram.y

57

#define FORMAT(n) (((n).fmt == 8 && (n).val != 0) ? "0%llo" : \

usr.bin/config/hash.c

265

ht_insrep2(struct hashtab *ht, const char *nam1, const char *nam2, void *val, int replace)

usr.bin/config/hash.c

277

hp->h_value = val;

usr.bin/config/hash.c

283

hp->h_value = val;

usr.bin/config/hash.c

290

ht_insrep(struct hashtab *ht, const char *nam, void *val, int replace)

usr.bin/config/hash.c

292

return ht_insrep2(ht, nam, NULL, val, replace);

usr.bin/config/hash.c

407

HT##_insert(struct HT *tbl, const char *name, struct VT *val) \

usr.bin/config/hash.c

409

return ht_insert(&tbl->imp, name, val); \

usr.bin/config/hash.c

413

HT##_replace(struct HT *tbl, const char *name, struct VT *val) \

usr.bin/config/hash.c

415

return ht_replace(&tbl->imp, name, val); \

usr.bin/config/util.c

251

defoptlist_create(const char *name, const char *val, const char *lintval)

usr.bin/config/util.c

258

dl->dl_value = val;

usr.bin/db/db.c

109

char *p, *key, *val;

usr.bin/db/db.c

332

while (parseline(infp, fieldsep, &key, &val)) {

usr.bin/db/db.c

333

if ((rv = db_put(key, val)))

usr.bin/db/db.c

381

db_print(DBT *key, DBT *val)

usr.bin/db/db.c

402

len = encode_data(MINUSNUL(val->size),

usr.bin/db/db.c

403

(char *)val->data, &data);

usr.bin/db/db.c

405

len = (int)MINUSNUL(val->size);

usr.bin/db/db.c

406

data = (char *)val->data;

usr.bin/db/db.c

416

DBT key, val;

usr.bin/db/db.c

419

while ((rv = db->seq(db, &key, &val, R_NEXT)) == 0)

usr.bin/db/db.c

420

db_print(&key, &val);

usr.bin/db/db.c

482

DBT key, val;

usr.bin/db/db.c

487

r = db->get(db, &key, &val, 0);

usr.bin/db/db.c

494

db_print(&key, &val);

usr.bin/db/db.c

512

DBT key, val, want;

usr.bin/db/db.c

523

while ((r = db->seq(db, &key, &val, seqflags)) == 0) {

usr.bin/db/db.c

531

db_print(&key, &val);

usr.bin/db/db.c

563

DBT key, val;

usr.bin/db/db.c

567

db_makekey(&val, valstr, 0, (flags & F_DECODE_VAL ? 1 : 0));

usr.bin/db/db.c

568

r = db->put(db, &key, &val, (flags & F_REPLACE) ? 0 : R_NOOVERWRITE);

usr.bin/db/db.c

588

free(val.data);

usr.bin/db/db.c

596

char *key, *val;

usr.bin/db/db.c

610

if ((val = strstr(key, sep)) == NULL)

usr.bin/db/db.c

611

val = key + len;

usr.bin/db/db.c

613

*val = '\0';

usr.bin/db/db.c

614

val += strlen(sep);

usr.bin/db/db.c

616

*vp = val;

usr.bin/dc/bcode.c

822

struct value *val;

usr.bin/dc/bcode.c

826

val = pop();

usr.bin/dc/bcode.c

827

if (val == NULL) {

usr.bin/dc/bcode.c

830

stack_set_tos(&bmachine.reg[idx], val);

usr.bin/diff/diff.c

478

print_status(int val, char *path1, char *path2, const char *entry)

usr.bin/diff/diff.c

485

switch (val) {

usr.bin/find/function.c

1059

static short val;

usr.bin/find/function.c

1101

val = sb.f_flag;

usr.bin/find/function.c

1106

return (val & plan->mt_data);

usr.bin/ftp/cmds.c

1115

int val;

usr.bin/ftp/cmds.c

1117

val = strsuftoi(argv[1]);

usr.bin/ftp/cmds.c

1118

if (val < 0) {

usr.bin/ftp/cmds.c

1124

ftp_debug = val;

usr.bin/ftp/cmds.c

785

onoff(int val)

usr.bin/ftp/cmds.c

788

return (val ? "on" : "off");

usr.bin/ftp/util.c

1046

long val;

usr.bin/ftp/util.c

1051

val = strtol(arg, &cp, 10);

usr.bin/ftp/util.c

1060

val <<= 10;

usr.bin/ftp/util.c

1063

val <<= 20;

usr.bin/ftp/util.c

1066

val <<= 30;

usr.bin/ftp/util.c

1072

if (val < 0 || val > INT_MAX)

usr.bin/ftp/util.c

1075

return (int)(val);

usr.bin/getconf/getconf.c

277

long val;

usr.bin/getconf/getconf.c

312

if ((val = sysconf((int)cp->value)) == -1) {

usr.bin/getconf/getconf.c

317

print_longvar(cp->name, val);

usr.bin/getconf/getconf.c

322

if ((val = pathconf(pathname, (int)cp->value)) == -1) {

usr.bin/getconf/getconf.c

335

print_longvar(cp->name, val);

usr.bin/mail/cmd3.c

797

char *val = value(*ap);

usr.bin/mail/cmd3.c

798

(void)printf("%s=%s\n", *ap, val ? val : "<null>");

usr.bin/mail/list.c

555

char *val;

usr.bin/mail/list.c

564

if ((val = value(ENAME_REGEX_SEARCH)) != NULL) {

usr.bin/mail/list.c

566

val = skip_WSP(val);

usr.bin/mail/list.c

567

if (*val) {

usr.bin/mail/list.c

568

if (is_substr(val, "icase"))

usr.bin/mail/list.c

570

if (is_substr(val, "extended"))

usr.bin/mail/list.c

576

if (is_substr(val, "nospec"))

usr.bin/make/cond.c

633

FStr val;

usr.bin/make/cond.c

643

val = Var_Parse(&p, SCOPE_CMDLINE, doEval ? VARE_EVAL : VARE_PARSE);

usr.bin/make/cond.c

644

if (val.str == var_Error)

usr.bin/make/cond.c

647

cpp_skip_whitespace(&val.str);

usr.bin/make/cond.c

648

tok = ToToken(doEval && val.str[0] == '\0');

usr.bin/make/cond.c

651

FStr_Done(&val);

usr.bin/make/parse.c

2141

FStr val = Var_Value(SCOPE_GLOBAL, varname);

usr.bin/make/parse.c

2142

bool found = val.str != NULL && StrContainsWord(val.str, word);

usr.bin/make/parse.c

2143

FStr_Done(&val);

usr.bin/make/parse.c

970

FStr val = Var_Parse(&p, SCOPE_CMDLINE, VARE_PARSE);

usr.bin/make/parse.c

972

FStr_Done(&val);

usr.bin/make/var.c

1023

Var_SetWithFlags(GNode *scope, const char *name, const char *val,

usr.bin/make/var.c

1028

assert(val != NULL);

usr.bin/make/var.c

1032

scope->name, name, val);

usr.bin/make/var.c

1045

scope->name, name, val);

usr.bin/make/var.c

1066

if (gl != NULL && strcmp(gl->val.data, val) == 0) {

usr.bin/make/var.c

1071

scope->name, name, val);

usr.bin/make/var.c

1084

scope->name, name, val);

usr.bin/make/var.c

1087

v = VarAdd(name, val, scope, flags);

usr.bin/make/var.c

1098

scope->name, name, val);

usr.bin/make/var.c

1101

Buf_Clear(&v->val);

usr.bin/make/var.c

1102

Buf_AddStr(&v->val, val);

usr.bin/make/var.c

1105

scope->name, name, val, ValueDescription(val));

usr.bin/make/var.c

1128

setenv(name, val, 1);

usr.bin/make/var.c

1136

save_dollars = ParseBoolean(val, save_dollars);

usr.bin/make/var.c

1143

Var_Set(GNode *scope, const char *name, const char *val)

usr.bin/make/var.c

1145

Var_SetWithFlags(scope, name, val, VAR_SET_NONE);

usr.bin/make/var.c

1153

Var_SetExpand(GNode *scope, const char *name, const char *val)

usr.bin/make/var.c

1157

assert(val != NULL);

usr.bin/make/var.c

1165

scope->name, varname.str, val, name);

usr.bin/make/var.c

1167

Var_SetWithFlags(scope, varname.str, val, VAR_SET_NONE);

usr.bin/make/var.c

1198

Var_Append(GNode *scope, const char *name, const char *val)

usr.bin/make/var.c

1205

Var_SetWithFlags(scope, name, val, VAR_SET_NONE);

usr.bin/make/var.c

1212

scope->name, name, val);

usr.bin/make/var.c

1214

Buf_AddByte(&v->val, ' ');

usr.bin/make/var.c

1215

Buf_AddStr(&v->val, val);

usr.bin/make/var.c

1217

DEBUG3(VAR, "%s: %s = %s\n", scope->name, name, v->val.data);

usr.bin/make/var.c

1241

Var_AppendExpand(GNode *scope, const char *name, const char *val)

usr.bin/make/var.c

1245

assert(val != NULL);

usr.bin/make/var.c

1252

scope->name, xname.str, val, name);

usr.bin/make/var.c

1254

Var_Append(scope, xname.str, val);

usr.bin/make/var.c

1314

return FStr_InitRefer(v->val.data);

usr.bin/make/var.c

1316

value = v->val.data;

usr.bin/make/var.c

1317

v->val.data = NULL;

usr.bin/make/var.c

1346

return v != NULL ? v->val.data : NULL;

usr.bin/make/var.c

164

Buffer val;

usr.bin/make/var.c

2364

const char *val = Expr_Str(expr);

usr.bin/make/var.c

2376

word = Substring_InitStr(val);

usr.bin/make/var.c

2381

words = Substring_Words(val, false);

usr.bin/make/var.c

2384

val, (unsigned)words.len, words.len != 1 ? "words" : "word");

usr.bin/make/var.c

2481

FStr val = Var_Parse(&p, ch->expr->scope,

usr.bin/make/var.c

2485

LazyBuf_AddStr(buf, val.str);

usr.bin/make/var.c

2486

FStr_Done(&val);

usr.bin/make/var.c

3380

NUM_TYPE val;

usr.bin/make/var.c

3383

val = PARSE_NUM_TYPE(s.start, &ep, 0);

usr.bin/make/var.c

3388

val <<= 10;

usr.bin/make/var.c

3392

val <<= 20;

usr.bin/make/var.c

3396

val <<= 30;

usr.bin/make/var.c

3400

return val;

usr.bin/make/var.c

3592

FStr val;

usr.bin/make/var.c

3622

val = LazyBuf_DoneGet(&buf);

usr.bin/make/var.c

3635

Var_Append(scope, expr->name, val.str);

usr.bin/make/var.c

3638

output = Cmd_Exec(val.str, &error);

usr.bin/make/var.c

3648

Var_Set(scope, expr->name, val.str);

usr.bin/make/var.c

3653

FStr_Done(&val);

usr.bin/make/var.c

3860

Expr_SetValueRefer(expr, v->val.data);

usr.bin/make/var.c

431

Buf_InitSize(&var->val, value_len + 1);

usr.bin/make/var.c

432

Buf_AddBytes(&var->val, value, value_len);

usr.bin/make/var.c

4339

const char *val;

usr.bin/make/var.c

4358

val = UndefinedShortVarValue(varname, scope);

usr.bin/make/var.c

4359

if (val == NULL)

usr.bin/make/var.c

4360

val = emode == VARE_EVAL_DEFINED

usr.bin/make/var.c

4365

&& val == var_Error) {

usr.bin/make/var.c

4370

*out_false_val = val;

usr.bin/make/var.c

4654

FStr val;

usr.bin/make/var.c

4657

if (Var_Parse_U(pp, emode, &val))

usr.bin/make/var.c

4658

return val;

usr.bin/make/var.c

4664

val = FStr_InitRefer(NULL);

usr.bin/make/var.c

4672

if (!ParseVarnameShort(startc, pp, scope, emode, &val.str, &v))

usr.bin/make/var.c

4673

return val;

usr.bin/make/var.c

4679

pp, &val,

usr.bin/make/var.c

4682

return val;

usr.bin/make/var.c

4689

FStr_Done(&val);

usr.bin/make/var.c

4714

expr.value = FStr_InitRefer(v->val.data);

usr.bin/make/var.c

4762

if (expr.value.str == v->val.data) {

usr.bin/make/var.c

4764

expr.value.freeIt = v->val.data;

usr.bin/make/var.c

4765

v->val.data = NULL;

usr.bin/make/var.c

4788

FStr val = Var_Parse(&nested_p, scope, emode);

usr.bin/make/var.c

4791

if (val.str == var_Error || val.str == varUndefined) {

usr.bin/make/var.c

4793

|| val.str == var_Error) {

usr.bin/make/var.c

4807

Buf_AddStr(buf, val.str);

usr.bin/make/var.c

4810

FStr_Done(&val);

usr.bin/make/var.c

4944

var->val.data, ValueDescription(var->val.data));

usr.bin/make/var.c

553

Buf_Done(&v->val);

usr.bin/make/var.c

623

Buf_Done(&v->val);

usr.bin/make/var.c

635

Buf_Done(&v->val);

usr.bin/make/var.c

708

char *val = v->val.data;

usr.bin/make/var.c

714

if (strchr(val, '$') == NULL) {

usr.bin/make/var.c

716

setenv(name, val, 1);

usr.bin/make/var.c

725

val = Var_Subst(expr, scope, VARE_EVAL);

usr.bin/make/var.c

733

setenv(name, val, 1);

usr.bin/make/var.c

734

free(val);

usr.bin/make/var.c

742

if (strchr(v->val.data, '$') == NULL) {

usr.bin/make/var.c

743

setenv(v->name.str, v->val.data, 1);

usr.bin/make/var.c

767

setenv(v->name.str, v->val.data, 1);

usr.bin/midirecord/midirecord.c

326

unsigned val = 0, xdiv;

usr.bin/midirecord/midirecord.c

349

uint32_t extra = val ? 0x80 : 0;

usr.bin/midirecord/midirecord.c

351

val <<= 8;

usr.bin/midirecord/midirecord.c

352

val |= (xdiv & 0x7f) | extra;

usr.bin/midirecord/midirecord.c

360

buffer[i] = val & 0xff;

usr.bin/midirecord/midirecord.c

361

val >>= 8;

usr.bin/midirecord/midirecord.c

619

filter_array(unsigned val, unsigned *array, size_t arraylen)

usr.bin/midirecord/midirecord.c

626

if (array[arraylen - 1] == val)

usr.bin/mixerctl/mixerctl.c

261

mixer_ctrl_t val;

usr.bin/mixerctl/mixerctl.c

295

val = *p->valp;

usr.bin/mixerctl/mixerctl.c

304

*p->valp = val;

usr.bin/mkcsmapper/yacc.y

221

put8(void *ptr, size_t ofs, u_int32_t val)

usr.bin/mkcsmapper/yacc.y

223

*((u_int8_t *)ptr + ofs) = val;

usr.bin/mkcsmapper/yacc.y

227

put16(void *ptr, size_t ofs, u_int32_t val)

usr.bin/mkcsmapper/yacc.y

229

u_int16_t oval = htons(val);

usr.bin/mkcsmapper/yacc.y

234

put32(void *ptr, size_t ofs, u_int32_t val)

usr.bin/mkcsmapper/yacc.y

236

u_int32_t oval = htonl(val);

usr.bin/mkcsmapper/yacc.y

244

u_int32_t val = 0;

usr.bin/mkcsmapper/yacc.y

262

val = dst_invalid;

usr.bin/mkcsmapper/yacc.y

265

val = dst_ilseq;

usr.bin/mkcsmapper/yacc.y

271

(*putfunc)(table, i, val);

usr.bin/mkcsmapper/yacc.y

446

set_src_zone(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

455

rowcol_bits = val;

usr.bin/mkcsmapper/yacc.y

481

set_dst_invalid(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

489

dst_invalid = val;

usr.bin/mkcsmapper/yacc.y

494

set_dst_ilseq(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

502

dst_ilseq = val;

usr.bin/mkcsmapper/yacc.y

507

set_oob_mode(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

515

oob_mode = val;

usr.bin/mkcsmapper/yacc.y

520

set_dst_unit_bits(u_int32_t val)

usr.bin/mkcsmapper/yacc.y

528

switch (val) {

usr.bin/mkcsmapper/yacc.y

531

dst_unit_bits = val;

usr.bin/mkcsmapper/yacc.y

535

dst_unit_bits = val;

usr.bin/mkcsmapper/yacc.y

539

dst_unit_bits = val;

usr.bin/mkesdb/yacc.y

245

register_named_csid(char *sym, u_int32_t val)

usr.bin/mkesdb/yacc.y

262

csid->ci_csid = val;

usr.bin/nc/netcat.c

1598

map_tos(char *s, int *val)

usr.bin/nc/netcat.c

1603

int val;

usr.bin/nc/netcat.c

1637

*val = t->val;

usr.bin/nc/netcat.c

1647

map_tls(char *s, int *val)

usr.bin/nc/netcat.c

1651

int val;

usr.bin/nc/netcat.c

1663

*val |= t->val;

usr.bin/nl/nl.c

136

long val;

usr.bin/nl/nl.c

179

val = strtol(optarg, &ep, 10);

usr.bin/nl/nl.c

181

((val == LONG_MIN || val == LONG_MAX) && errno != 0))

usr.bin/nl/nl.c

184

incr = (int)val;

usr.bin/nl/nl.c

211

val = strtol(optarg, &ep, 10);

usr.bin/nl/nl.c

213

((val == LONG_MIN || val == LONG_MAX) && errno != 0))

usr.bin/nl/nl.c

216

startnum = (int)val;

usr.bin/nl/nl.c

220

val = strtol(optarg, &ep, 10);

usr.bin/nl/nl.c

222

((val == LONG_MIN || val == LONG_MAX) && errno != 0))

usr.bin/nl/nl.c

225

width = (int)val;

usr.bin/nl/nl.c

254

if ((val = sysconf(_SC_LINE_MAX)) == -1) /* ignore errno */

usr.bin/nl/nl.c

255

val = LINE_MAX;

usr.bin/nl/nl.c

257

buffersize = (size_t)val + 1;

usr.bin/passwd/yp_passwd.c

170

char *val;

usr.bin/passwd/yp_passwd.c

176

val = NULL;

usr.bin/passwd/yp_passwd.c

178

&val, &vallen);

usr.bin/passwd/yp_passwd.c

181

&val, &vallen);

usr.bin/passwd/yp_passwd.c

187

if (pw_scan(val, pwd, &flags) == 0)

usr.bin/passwd/yp_passwd.c

191

val = NULL; /* Don't free the memory, it is still in use */

usr.bin/passwd/yp_passwd.c

193

if (val)

usr.bin/passwd/yp_passwd.c

194

free(val);

usr.bin/printf/printf.c

707

unsigned long val;

usr.bin/printf/printf.c

716

val = strtoul(s, &ep, 0);

usr.bin/printf/printf.c

721

val = 0;

usr.bin/printf/printf.c

726

if (val > 1 << 20) {

usr.bin/printf/printf.c

732

return (int)val;

usr.bin/printf/printf.c

738

intmax_t val;

usr.bin/printf/printf.c

750

val = strtoimax(cp, &ep, 0);

usr.bin/printf/printf.c

756

return val;

usr.bin/printf/printf.c

762

long double val;

usr.bin/printf/printf.c

773

val = strtold(*gargv, &ep);

usr.bin/printf/printf.c

775

return val;

usr.bin/quota/printquota.c

201

time_t val= 0;

usr.bin/quota/printquota.c

207

val = strtoumax(cur, &end, 10) * WEEK;

usr.bin/quota/printquota.c

214

val += strtoumax(cur, &end, 10) * DAY;

usr.bin/quota/printquota.c

221

val += strtoumax(cur, &end, 10) * HOUR;

usr.bin/quota/printquota.c

228

val += strtoumax(cur, &end, 10) * MINUTE;

usr.bin/quota/printquota.c

234

val += strtoumax(cur, &end, 10);

usr.bin/quota/printquota.c

237

*valp = val;

usr.bin/quota/printquota.c

245

intrd(char *str, uint64_t *val, u_int flags)

usr.bin/quota/printquota.c

253

*val = strtoumax(str, NULL, 10);

usr.bin/quota/printquota.c

256

*val = btodb(*val * 1024);

usr.bin/quota/printquota.c

262

*val = UQUAD_MAX;

usr.bin/quota/printquota.c

269

ret = dehumanize_number(str, (int64_t *)val);

usr.bin/quota/printquota.c

271

*val = btodb(*val);

usr.bin/quota/printquota.c

68

intprt(char *buf, size_t len, uint64_t val, int flags, int hflag)

usr.bin/quota/printquota.c

70

if (val == UQUAD_MAX)

usr.bin/quota/printquota.c

74

val = dbtob(val);

usr.bin/quota/printquota.c

77

(void)humanize_number(buf, len, (int64_t)val, "", HN_AUTOSCALE,

usr.bin/quota/printquota.c

83

val = val / 1024;

usr.bin/quota/printquota.c

85

(void)snprintf(buf, len, "%" PRId64, val);

usr.bin/quota/printquota.h

7

int intrd(char *str, uint64_t *val, u_int);

usr.bin/radioctl/radioctl.c

344

u_long val;

usr.bin/radioctl/radioctl.c

350

val = (u_long)1000 * atof(str);

usr.bin/radioctl/radioctl.c

352

val = (u_long)strtol(str, NULL, 10);

usr.bin/radioctl/radioctl.c

354

return val;

usr.bin/radioctl/radioctl.c

478

show_int_val(u_long val, const char *nick, const char *append, int silent)

usr.bin/radioctl/radioctl.c

481

printf("%lu%s\n", val, append);

usr.bin/radioctl/radioctl.c

485

show_float_val(float val, const char *nick, const char *append, int silent)

usr.bin/radioctl/radioctl.c

488

printf("%.2f%s\n", val, append);

usr.bin/radioctl/radioctl.c

492

show_char_val(const char *val, const char *nick, int silent)

usr.bin/radioctl/radioctl.c

495

printf("%s\n", val);

usr.bin/renice/renice.c

123

getnum(const char *com, const char *str, int *val)

usr.bin/renice/renice.c

140

*val = (int)v;

usr.bin/rlogin/rlogin.c

800

long val;

usr.bin/rlogin/rlogin.c

807

val = strtol(++p, NULL, 8);

usr.bin/rlogin/rlogin.c

810

return ((u_int)val);

usr.bin/rlogin/rlogin.c

87

#define CCEQ(val, c) (c == val ? val != _POSIX_VDISABLE : 0)

usr.bin/rpcgen/rpc_clntout.c

76

def = (definition *) l->val;

usr.bin/rpcgen/rpc_hout.c

532

def = (definition *) l->val;

usr.bin/rpcgen/rpc_main.c

594

print_funcdef(l->val, &did);

usr.bin/rpcgen/rpc_main.c

599

print_progdef(l->val);

usr.bin/rpcgen/rpc_sample.c

263

def = l->val;

usr.bin/rpcgen/rpc_scan.c

305

findstrconst(char **str, const char **val)

usr.bin/rpcgen/rpc_scan.c

323

*val = tmp;

usr.bin/rpcgen/rpc_scan.c

328

findchrconst(char **str, const char **val)

usr.bin/rpcgen/rpc_scan.c

349

*val = tmp;

usr.bin/rpcgen/rpc_scan.c

354

findconst(char **str, const char **val)

usr.bin/rpcgen/rpc_scan.c

375

*val = tmp;

usr.bin/rpcgen/rpc_svcout.c

182

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

215

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

270

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

278

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

595

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

784

def = (definition *) l->val;

usr.bin/rpcgen/rpc_svcout.c

945

def = (definition *) l->val;

usr.bin/rpcgen/rpc_tblout.c

82

def = (definition *) l->val;

usr.bin/rpcgen/rpc_util.c

107

findval(list *lst, const char *val, int (*cmp)(definition *, const char *))

usr.bin/rpcgen/rpc_util.c

111

if ((*cmp) (lst->val, val)) {

usr.bin/rpcgen/rpc_util.c

112

return (lst->val);

usr.bin/rpcgen/rpc_util.c

121

storeval(list **lstp, definition *val)

usr.bin/rpcgen/rpc_util.c

129

lst->val = val;

usr.bin/rpcgen/rpc_util.h

45

definition *val;

usr.bin/rump_dhcpclient/dhcp.h

175

#define add_option_mask(var, val) (var[val >> 3] |= 1 << (val & 7))

usr.bin/rump_dhcpclient/dhcp.h

176

#define del_option_mask(var, val) (var[val >> 3] &= ~(1 << (val & 7)))

usr.bin/rump_dhcpclient/dhcp.h

177

#define has_option_mask(var, val) (var[val >> 3] & (1 << (val & 7)))

usr.bin/showmount/showmount.c

275

int bool_int, val, val2;

usr.bin/showmount/showmount.c

307

val = strcmp(mp->ml_host, tp->ml_host);

usr.bin/showmount/showmount.c

311

if (val == 0) {

usr.bin/showmount/showmount.c

316

val = val2;

usr.bin/showmount/showmount.c

324

val = val2;

usr.bin/showmount/showmount.c

327

if (val == 0) {

usr.bin/showmount/showmount.c

333

if (val < 0) {

usr.bin/skeyinit/skeyinit.c

339

if ((skey.val = (char *)malloc(16 + 1)) == NULL)

usr.bin/skeyinit/skeyinit.c

350

btoa8(skey.val, key);

usr.bin/skeyinit/skeyinit.c

370

pp->pw_name, n, seed, skey.val, tbuf);

usr.bin/skeyinit/skeyinit.c

373

pp->pw_name, skey_get_algorithm(), n, seed, skey.val, tbuf);

usr.bin/sort/fields.c

258

unsigned int val;

usr.bin/sort/fields.c

340

val = (ch - '0') * 10;

usr.bin/sort/fields.c

341

if (val > 90) {

usr.bin/sort/fields.c

357

val += ch - '0';

usr.bin/sort/fields.c

360

*pos++ = negate ^ (val + 0x40);

usr.bin/sort/fields.c

361

if (val != 0)

usr.bin/spell/spellprog/spellprog.c

706

int val = 0;

usr.bin/spell/spellprog/spellprog.c

721

val = 1;

usr.bin/spell/spellprog/spellprog.c

728

return val;

usr.bin/systat/iostat.c

322

histogram(double val, int colwidth, double scale)

usr.bin/systat/iostat.c

324

int v = (int)(val * scale + 0.5);

usr.bin/systat/syscall.c

223

val[i] = v;

usr.bin/systat/syscall.c

258

if (val[i] == 0 && irf[i] == 0)

usr.bin/systat/syscall.c

271

putuint64(val[i], l, c + 18, 8);

usr.bin/systat/syscall.c

64

static uint64_t irf[SYS_NSYSENT], val[SYS_NSYSENT];

usr.bin/telnet/authenc.c

86

telnet_getenv(char *val)

usr.bin/telnet/authenc.c

88

return env_getvalue(val, 0);

usr.bin/telnet/commands.c

465

ptrdiff_t val = 0;

usr.bin/telnet/commands.c

494

val = cpp - telopts;

usr.bin/telnet/commands.c

499

val *= 10;

usr.bin/telnet/commands.c

500

val += *cp - '0';

usr.bin/telnet/commands.c

507

} else if (val < 0 || val > 255) {

usr.bin/telnet/commands.c

517

(*func)((int)val, 1);

usr.bin/telnet/commands.c

568

togbinary(int val)

usr.bin/telnet/commands.c

572

if (val >= 0) {

usr.bin/telnet/commands.c

573

binmode = val;

usr.bin/telnet/commands.c

582

val = binmode ? 0 : 1;

usr.bin/telnet/commands.c

585

if (val == 1) {

usr.bin/telnet/commands.c

606

togrbinary(int val)

usr.bin/telnet/commands.c

610

if (val == -1)

usr.bin/telnet/commands.c

611

val = my_want_state_is_do(TELOPT_BINARY) ? 0 : 1;

usr.bin/telnet/commands.c

613

if (val == 1) {

usr.bin/telnet/commands.c

632

togxbinary(int val)

usr.bin/telnet/commands.c

636

if (val == -1)

usr.bin/telnet/commands.c

637

val = my_want_state_is_will(TELOPT_BINARY) ? 0 : 1;

usr.bin/telnet/commands.c

639

if (val == 1) {

usr.bin/telnet/telnet.c

1125

cc_t val;

usr.bin/telnet/telnet.c

1143

spcp->val = 0;

usr.bin/telnet/telnet.c

1151

spcp->val = *spcp->valp; \

usr.bin/telnet/telnet.c

1154

spcp->val = 0; \

usr.bin/telnet/telnet.c

1245

if (spcp->val == (cc_t)(_POSIX_VDISABLE))

usr.bin/telnet/telnet.c

1250

spcp->val = *spcp->valp;

usr.bin/telnet/telnet.c

1251

slc_add_reply(spcp - spc_data, spcp->flags, spcp->val);

usr.bin/telnet/telnet.c

1287

if ((cp[SLC_VALUE] == (unsigned char)spcp->val) &&

usr.bin/telnet/telnet.c

1303

spcp->val = (cc_t)cp[SLC_VALUE];

usr.bin/telnet/telnet.c

1312

spcp->val = (cc_t)cp[SLC_VALUE];

usr.bin/telnet/telnet.c

1320

slc_add_reply(func, spcp->flags, spcp->val);

usr.bin/telnet/telnet.c

1334

if (spcp->valp && spcp->val != *spcp->valp) {

usr.bin/telnet/telnet.c

1335

spcp->val = *spcp->valp;

usr.bin/telnet/telnet.c

1336

if (spcp->val == (cc_t)(_POSIX_VDISABLE))

usr.bin/telnet/telnet.c

1340

slc_add_reply(spcp - spc_data, spcp->flags, spcp->val);

usr.bin/telnet/telnet.c

1402

if (spcp->valp && (*spcp->valp != spcp->val)) {

usr.bin/telnet/telnet.c

1403

*spcp->valp = spcp->val;

usr.bin/tftp/tftp.c

107

val = strtoul(valp, NULL, 10);

usr.bin/tftp/tftp.c

111

if (val == ULONG_MAX && errno == ERANGE) {

usr.bin/tftp/tftp.c

124

if (val >= 1 && val <= 255) {

usr.bin/tftp/tftp.c

125

rexmtval = val;

usr.bin/tftp/tftp.c

130

if (val >= 8 && val <= MAXSEGSIZE) {

usr.bin/tftp/tftp.c

131

blksize = val;

usr.bin/tftp/tftp.c

92

unsigned long val;

usr.bin/time/time.c

201

prl(long val, const char *expn)

usr.bin/time/time.c

204

(void)fprintf(stderr, "%10ld %s\n", val, expn);

usr.bin/touch/touch.c

369

long val;

usr.bin/touch/touch.c

384

val = strtol(arg, &ep, 10); /* YYYY */

usr.bin/touch/touch.c

385

if (val < 0 || val > INT_MAX)

usr.bin/touch/touch.c

389

tm.tm_year = (int)val - 1900;

usr.bin/touch/touch.c

395

val = strtol(p, &ep, 10); /* MM */

usr.bin/touch/touch.c

396

if (val < 1 || val > 12)

usr.bin/touch/touch.c

400

tm.tm_mon = (int)val - 1;

usr.bin/touch/touch.c

406

val = strtol(p, &ep, 10); /* DD */

usr.bin/touch/touch.c

407

if (val < 1 || val > 31)

usr.bin/touch/touch.c

411

tm.tm_mday = (int)val;

usr.bin/touch/touch.c

417

val = strtol(p, &ep, 10); /* hh */

usr.bin/touch/touch.c

418

if (val < 0 || val > 23)

usr.bin/touch/touch.c

422

tm.tm_hour = (int)val;

usr.bin/touch/touch.c

428

val = strtol(p, &ep, 10); /* mm */

usr.bin/touch/touch.c

429

if (val < 0 || val > 59)

usr.bin/touch/touch.c

433

tm.tm_min = (int)val;

usr.bin/touch/touch.c

439

val = strtol(p, &ep, 10); /* ss (or in POSIX, SS) */

usr.bin/touch/touch.c

440

if (val < 0 || val > 60)

usr.bin/touch/touch.c

445

tm.tm_sec = (int)val;

usr.bin/touch/touch.c

454

val = strtol(p, &ep, 10);

usr.bin/touch/touch.c

455

if (val < 0)

usr.bin/touch/touch.c

469

if (val == 0)

usr.bin/touch/touch.c

472

val = (val + 5) / 10;

usr.bin/touch/touch.c

480

(long)round(((double)val / frac) * 1000000000.0);

usr.bin/tr/str.c

399

int ch, cnt, val;

usr.bin/tr/str.c

401

cnt = val = 0;

usr.bin/tr/str.c

411

val = val * 8 + ch - '0';

usr.bin/tr/str.c

420

if (val >= OOBCH)

usr.bin/tr/str.c

422

return val;

usr.bin/tset/set.c

42

#define CHK(val, dft) (val <= 0 ? dft : val)

usr.bin/unifdef/unifdef.c

800

int val;

usr.bin/unifdef/unifdef.c

815

if (ops->inner(ops+1, &val, &cp) == LT_IF)

usr.bin/unifdef/unifdef.c

817

*valp = op->fn(*valp, val);

usr.bin/unifdef/unifdef.c

834

int val;

usr.bin/unifdef/unifdef.c

838

ret = eval_table(eval_ops, &val, cpp);

usr.bin/unifdef/unifdef.c

839

debug("eval = %d", val);

usr.bin/unifdef/unifdef.c

967

char *val;

usr.bin/unifdef/unifdef.c

977

val = sym + (skipsym(sym) - sym);

usr.bin/unifdef/unifdef.c

979

if (*val == '=') {

usr.bin/unifdef/unifdef.c

980

value[symind] = val+1;

usr.bin/unifdef/unifdef.c

981

*val = '\0';

usr.bin/unifdef/unifdef.c

982

} else if (*val == '\0')

usr.bin/unifdef/unifdef.c

987

if (*val != '\0')

usr.bin/usbhidaction/usbhidaction.c

200

val = hid_get_data(buf, &cmd->item);

usr.bin/usbhidaction/usbhidaction.c

201

if (cmd->value == val || cmd->anyvalue)

usr.bin/usbhidaction/usbhidaction.c

202

docmd(cmd, val, dev, argc, argv);

usr.bin/usbhidaction/usbhidaction.c

90

int fd, ch, sz, n, val, i;

usr.bin/usbhidctl/usbhid.c

511

int val, i;

usr.bin/usbhidctl/usbhid.c

522

val = hid_get_data(buf, item);

usr.bin/usbhidctl/usbhid.c

525

val += item->usage_minimum;

usr.bin/usbhidctl/usbhid.c

526

printf("%s=1", hid_usage_in_page(val));

usr.bin/usbhidctl/usbhid.c

529

val, item->flags & HIO_CONST ? " (const)" : "");

usr.bin/vmstat/vmstat.c

282

#define PRWORD(ovflw, fmt, width, fixed, val) do { \

usr.bin/vmstat/vmstat.c

286

(val)) - (width); \

usr.bin/xlint/lint1/cgram.y

2636

cgram_to_string(int tok, YYSTYPE val)

usr.bin/xlint/lint1/cgram.y

2641

return val.y_inc ? "++" : "--";

usr.bin/xlint/lint1/cgram.y

2648

return op_name(val.y_op);

usr.bin/xlint/lint1/cgram.y

2650

return scl_name(val.y_scl);

usr.bin/xlint/lint1/cgram.y

2653

return tspec_name(val.y_tspec);

usr.bin/xlint/lint1/cgram.y

2655

return type_qualifiers_string(val.y_type_qualifiers);

usr.bin/xlint/lint1/cgram.y

2657

return function_specifier_name(val.y_function_specifier);

usr.bin/xlint/lint1/cgram.y

2659

return val.y_name->sb_name;

usr.bin/xlint/lint1/cksnprintb.c

257

len(bit), start(bit, fmt), val(bit),

usr.bin/xlint/lint1/cksnprintb.c

263

len(width), start(width, fmt), val(width),

usr.bin/xlint/lint1/cksnprintb.c

267

warning(373, val(bit) + val(width),

usr.bin/xlint/lint1/cksnprintb.c

272

warning(375, len(cmp), start(cmp, fmt), val(cmp),

usr.bin/xlint/lint1/cksnprintb.c

328

warning(361, len(ck.it), start(ck.it, fmt), val(ck.it));

usr.bin/xlint/lint1/decl.c

1786

enumeration_constant(sym_t *sym, int val, bool implicit)

usr.bin/xlint/lint1/decl.c

1816

sym->u.s_enum_constant = val;

usr.bin/xlint/lint1/decl.c

1818

if (implicit && val == TARG_INT_MIN)

usr.bin/xlint/lint1/decl.c

1822

enumval = val == TARG_INT_MAX ? TARG_INT_MIN : val + 1;

usr.bin/xlint/lint1/decl.c

3220

int64_t val = v->u.integer;

usr.bin/xlint/lint1/decl.c

3232

? (uint64_t)val > (uint64_t)TARG_INT_MAX

usr.bin/xlint/lint1/decl.c

3233

: val > (int64_t)TARG_INT_MAX || val < (int64_t)TARG_INT_MIN;

usr.bin/xlint/lint1/decl.c

3236

unsigned long long abs_val = is_unsigned || val >= 0

usr.bin/xlint/lint1/decl.c

3237

? (unsigned long long)val

usr.bin/xlint/lint1/decl.c

3238

: -(unsigned long long)val;

usr.bin/xlint/lint1/decl.c

3240

is_unsigned || val >= 0 ? "" : "-", abs_val);

usr.bin/xlint/lint1/decl.c

3244

return (int)val;

usr.bin/xlint/lint1/lex.c

1710

val_t *val = *(val_t **)sp;

usr.bin/xlint/lint1/lex.c

1711

free(val);

usr.bin/xlint/lint1/lex.c

945

uint64_t val = 0;

usr.bin/xlint/lint1/lex.c

948

val = (val << CHAR_SIZE) + it.value;

usr.bin/xlint/lint1/lex.c

966

? convert_integer((int64_t)val, CHAR, CHAR_SIZE)

usr.bin/xlint/lint1/lex.c

967

: (int64_t)val;

usr.bin/xlint/lint1/lint1.h

680

is_nonzero_val(const val_t *val)

usr.bin/xlint/lint1/lint1.h

682

return is_floating(val->v_tspec)

usr.bin/xlint/lint1/lint1.h

683

? val->u.floating != 0.0

usr.bin/xlint/lint1/lint1.h

684

: val->u.integer != 0;

usr.bin/xlint/lint1/tree.c

2064

is_floating_overflow(tspec_t t, long double val)

usr.bin/xlint/lint1/tree.c

2066

if (fpe != 0 || isfinite(val) == 0)

usr.bin/xlint/lint1/tree.c

2068

if (t == FLOAT && (val > FLT_MAX || val < -FLT_MAX))

usr.bin/xlint/lint1/tree.c

2070

if (t == DOUBLE && (val > DBL_MAX || val < -DBL_MAX))

usr.bin/xlint/lint1/tree.c

4257

int64_t val = v->u.integer;

usr.bin/xlint/lint1/tree.c

4258

unsigned long long abs_val = is_unsigned || val >= 0

usr.bin/xlint/lint1/tree.c

4259

? (unsigned long long)val

usr.bin/xlint/lint1/tree.c

4260

: -(unsigned long long)val;

usr.bin/xlint/lint1/tree.c

4261

const char *sign = is_unsigned || val >= 0 ? "" : "-";

usr.sbin/acpitools/aml/aml_common.c

395

u_int8_t val, tmp, masklow, maskhigh;

usr.sbin/acpitools/aml/aml_common.c

402

val = readval = 0;

usr.sbin/acpitools/aml/aml_common.c

451

val = *addr;

usr.sbin/acpitools/aml/aml_common.c

453

AML_DEBUGPRINT("\t[bufferfield:0x%02x@%p]", val, addr);

usr.sbin/acpitools/aml/aml_common.c

457

tmp = val;

usr.sbin/acpitools/aml/aml_common.c

492

tmp = (val & masklow) | tmp << offsetlow;

usr.sbin/acpitools/aml/aml_common.c

497

tmp = (val & maskhigh) | tmp;

usr.sbin/acpitools/amldb/region.c

139

u_int32_t val;

usr.sbin/acpitools/amldb/region.c

141

val = def_val;

usr.sbin/acpitools/amldb/region.c

146

printf("(default: 0x%x / %u) >>", val, val);

usr.sbin/acpitools/amldb/region.c

158

val = strtoq(buf, &ep, 16);

usr.sbin/acpitools/amldb/region.c

160

val = strtoq(buf, &ep, 10);

usr.sbin/acpitools/amldb/region.c

164

return (val);

usr.sbin/acpitools/amldb/region.c

213

u_int8_t val;

usr.sbin/acpitools/amldb/region.c

217

value = val = 0;

usr.sbin/acpitools/amldb/region.c

220

h->addr + offset + i, &val);

usr.sbin/acpitools/amldb/region.c

224

value |= val << (i * 8);

usr.sbin/acpitools/amldb/region.c

236

u_int8_t val;

usr.sbin/acpitools/amldb/region.c

240

val = 0;

usr.sbin/acpitools/amldb/region.c

242

val = value & 0xff;

usr.sbin/acpitools/amldb/region.c

244

h->addr + offset + i, &val);

usr.sbin/acpitools/amldb/region.c

312

u_int8_t val;

usr.sbin/acpitools/amldb/region.c

317

val = 0;

usr.sbin/acpitools/amldb/region.c

335

val = 0;

usr.sbin/acpitools/amldb/region.c

336

state = aml_simulate_regcontent_read(regtype, addr, &val);

usr.sbin/acpitools/amldb/region.c

340

buffer[bytelen - i] = val;

usr.sbin/acpitools/amldb/region.c

343

val = buffer[bytelen - i];

usr.sbin/acpitools/amldb/region.c

345

addr, &val);

usr.sbin/altq/libaltq/altq_qop.h

255

static inline void IN6ADDR32_SET(struct in6_addr *a, size_t i, uint32_t val) {

usr.sbin/altq/libaltq/altq_qop.h

256

memcpy(&(a)->s6_addr[i << 2], &val, sizeof(val));

usr.sbin/bta2dpd/cosdata-gen/cosdata.c

100

float val;

usr.sbin/bta2dpd/cosdata-gen/cosdata.c

112

val = cosf((i + 0.5) * ((int)k + dk) * mp);

usr.sbin/bta2dpd/cosdata-gen/cosdata.c

113

printf("%d, ", (int)roundf(val * SI_MULTI));

usr.sbin/btconfig/btconfig.c

165

void *val;

usr.sbin/btconfig/btconfig.c

285

strlcpy((char *)(p->val), *++av, MAX_STR_SIZE);

usr.sbin/btconfig/btconfig.c

291

*(uint32_t *)(p->val) = strtoul(*++av, NULL, 16);

usr.sbin/btconfig/btconfig.c

297

*(uint32_t *)(p->val) = strtoul(*++av, NULL, 10);

usr.sbin/btconfig/btconfig.c

306

if (((char **)(p->val))[ch] == NULL)

usr.sbin/btconfig/btconfig.c

308

} while (strcmp(((char **)(p->val))[ch++], *av));

usr.sbin/btconfig/btconfig.c

504

uint16_t val = btr.btr_link_policy;

usr.sbin/btconfig/btconfig.c

506

if (opt_switch > 0) val |= HCI_LINK_POLICY_ENABLE_ROLE_SWITCH;

usr.sbin/btconfig/btconfig.c

507

if (opt_switch < 0) val &= ~HCI_LINK_POLICY_ENABLE_ROLE_SWITCH;

usr.sbin/btconfig/btconfig.c

508

if (opt_hold > 0) val |= HCI_LINK_POLICY_ENABLE_HOLD_MODE;

usr.sbin/btconfig/btconfig.c

509

if (opt_hold < 0) val &= ~HCI_LINK_POLICY_ENABLE_HOLD_MODE;

usr.sbin/btconfig/btconfig.c

510

if (opt_sniff > 0) val |= HCI_LINK_POLICY_ENABLE_SNIFF_MODE;

usr.sbin/btconfig/btconfig.c

511

if (opt_sniff < 0) val &= ~HCI_LINK_POLICY_ENABLE_SNIFF_MODE;

usr.sbin/btconfig/btconfig.c

512

if (opt_park > 0) val |= HCI_LINK_POLICY_ENABLE_PARK_MODE;

usr.sbin/btconfig/btconfig.c

513

if (opt_park < 0) val &= ~HCI_LINK_POLICY_ENABLE_PARK_MODE;

usr.sbin/btconfig/btconfig.c

515

btr.btr_link_policy = val;

usr.sbin/btconfig/btconfig.c

527

uint8_t val;

usr.sbin/btconfig/btconfig.c

529

load_value(HCI_CMD_READ_SCAN_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

530

if (opt_pscan > 0) val |= HCI_PAGE_SCAN_ENABLE;

usr.sbin/btconfig/btconfig.c

531

if (opt_pscan < 0) val &= ~HCI_PAGE_SCAN_ENABLE;

usr.sbin/btconfig/btconfig.c

532

if (opt_iscan > 0) val |= HCI_INQUIRY_SCAN_ENABLE;

usr.sbin/btconfig/btconfig.c

533

if (opt_iscan < 0) val &= ~HCI_INQUIRY_SCAN_ENABLE;

usr.sbin/btconfig/btconfig.c

534

save_value(HCI_CMD_WRITE_SCAN_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

538

uint8_t val = (opt_auth > 0 ? 1 : 0);

usr.sbin/btconfig/btconfig.c

540

save_value(HCI_CMD_WRITE_AUTH_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

544

uint8_t val = (opt_encrypt > 0 ? 1 : 0);

usr.sbin/btconfig/btconfig.c

546

save_value(HCI_CMD_WRITE_ENCRYPTION_MODE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

553

uint8_t val[HCI_CLASS_SIZE];

usr.sbin/btconfig/btconfig.c

555

val[0] = (class >> 0) & 0xff;

usr.sbin/btconfig/btconfig.c

556

val[1] = (class >> 8) & 0xff;

usr.sbin/btconfig/btconfig.c

557

val[2] = (class >> 16) & 0xff;

usr.sbin/btconfig/btconfig.c

559

save_value(HCI_CMD_WRITE_UNIT_CLASS, val, HCI_CLASS_SIZE);

usr.sbin/btconfig/btconfig.c

563

uint8_t val;

usr.sbin/btconfig/btconfig.c

565

if (opt_pin > 0) val = 1;

usr.sbin/btconfig/btconfig.c

566

else val = 0;

usr.sbin/btconfig/btconfig.c

568

save_value(HCI_CMD_WRITE_PIN_TYPE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

572

uint16_t val;

usr.sbin/btconfig/btconfig.c

574

val = htole16(voice & 0x03ff);

usr.sbin/btconfig/btconfig.c

575

save_value(HCI_CMD_WRITE_VOICE_SETTING, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

579

uint16_t val;

usr.sbin/btconfig/btconfig.c

581

val = htole16(pto * 8 / 5);

usr.sbin/btconfig/btconfig.c

582

save_value(HCI_CMD_WRITE_PAGE_TIMEOUT, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

597

uint8_t val = (opt_rssi > 0 ? 1 : 0);

usr.sbin/btconfig/btconfig.c

600

val = opt_imode - 1;

usr.sbin/btconfig/btconfig.c

602

save_value(HCI_CMD_WRITE_INQUIRY_MODE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

626

uint8_t version, val, buf[MAX_STR_SIZE];

usr.sbin/btconfig/btconfig.c

681

load_value(HCI_CMD_READ_PIN_TYPE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

682

printf("\tpin: %s\n", val ? "fixed" : "variable");

usr.sbin/btconfig/btconfig.c

684

val = 0;

usr.sbin/btconfig/btconfig.c

686

load_value(HCI_CMD_READ_INQUIRY_MODE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

688

print_val("inquiry mode", imodes, val);

usr.sbin/btconfig/btconfig.c

692

load_value(HCI_CMD_READ_SCAN_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

693

if (val & HCI_INQUIRY_SCAN_ENABLE) tag("iscan");

usr.sbin/btconfig/btconfig.c

696

if (val & HCI_PAGE_SCAN_ENABLE) tag("pscan");

usr.sbin/btconfig/btconfig.c

699

load_value(HCI_CMD_READ_AUTH_ENABLE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

700

if (val) tag("auth");

usr.sbin/btconfig/btconfig.c

703

load_value(HCI_CMD_READ_ENCRYPTION_MODE, &val, sizeof(val));

usr.sbin/btconfig/btconfig.c

704

if (val) tag("encrypt");

usr.sbin/btconfig/btconfig.c

707

val = btr.btr_link_policy;

usr.sbin/btconfig/btconfig.c

708

if (val & HCI_LINK_POLICY_ENABLE_ROLE_SWITCH) tag("switch");

usr.sbin/btconfig/btconfig.c

710

if (val & HCI_LINK_POLICY_ENABLE_HOLD_MODE) tag("hold");

usr.sbin/btconfig/btconfig.c

712

if (val & HCI_LINK_POLICY_ENABLE_SNIFF_MODE) tag("sniff");

usr.sbin/btconfig/btconfig.c

714

if (val & HCI_LINK_POLICY_ENABLE_PARK_MODE) tag("park");

usr.sbin/cpuctl/arch/i386.c

1724

print_bits(const char *cpuname, const char *hdr, const char *fmt, uint32_t val)

usr.sbin/cpuctl/arch/i386.c

1731

if (val == 0 || fmt == NULL)

usr.sbin/cpuctl/arch/i386.c

1734

snprintb_m(buf, sizeof(buf), fmt, val,

usr.sbin/cpuctl/arch/i386.c

1743

#define print_bits(cpuname, hdr, fmt, val) \

usr.sbin/cpuctl/arch/i386.c

1745

print_bits(cpuname, hdr, fmt, val); \

usr.sbin/cpuctl/arch/i386.c

1746

snprintb(NULL, 0, fmt, val); \

usr.sbin/envstat/config.c

507

double val;

usr.sbin/envstat/config.c

517

val = strtod(strval, &endptr);

usr.sbin/envstat/config.c

521

if (!prop_dictionary_set_uint32(csdict, "rfact", val))

usr.sbin/envstat/config.c

536

val = strtod(strval, &endptr);

usr.sbin/envstat/config.c

537

if ((*endptr != '\0') || (val < 0 || val > 100))

usr.sbin/envstat/config.c

545

val = (val / 100) * prop_number_signed_value(obj);

usr.sbin/envstat/config.c

549

val))

usr.sbin/envstat/config.c

564

val = strtod(strval, &endptr);

usr.sbin/envstat/config.c

565

if ((*endptr != '\0') || (val < 0 || val > 100))

usr.sbin/envstat/config.c

573

val = (val / 100) * prop_number_signed_value(obj);

usr.sbin/envstat/config.c

577

val))

usr.sbin/envstat/config.c

592

val = strtod(strval, &endptr);

usr.sbin/envstat/config.c

593

if ((*endptr != '\0') || (val < 0 || val > 100))

usr.sbin/envstat/config.c

601

val = (val / 100) * prop_number_signed_value(obj);

usr.sbin/envstat/config.c

605

val))

usr.sbin/envstat/config.c

620

val = strtod(strval, &endptr);

usr.sbin/envstat/config.c

621

if ((*endptr != '\0') || (val < 0 || val > 100))

usr.sbin/envstat/config.c

629

val = (val / 100) * prop_number_signed_value(obj);

usr.sbin/envstat/config.c

633

val))

usr.sbin/envstat/config.c

712

double val, max, min;

usr.sbin/envstat/config.c

717

val = max = min = 0;

usr.sbin/envstat/config.c

745

val = strtod(strval, &endptr);

usr.sbin/envstat/config.c

753

val = (val - 32.0) * (5.0 / 9.0);

usr.sbin/envstat/config.c

756

val = val * 1000000 + 273150000;

usr.sbin/envstat/config.c

757

num = prop_number_create_unsigned(val);

usr.sbin/envstat/config.c

763

val = strtod(value, &endptr);

usr.sbin/envstat/config.c

767

num = prop_number_create_unsigned(val);

usr.sbin/envstat/config.c

778

val = strtod(value, &endptr);

usr.sbin/envstat/config.c

783

val *= 1000000.0;

usr.sbin/envstat/config.c

789

if (max && val > max)

usr.sbin/envstat/config.c

796

if (min && val < min)

usr.sbin/envstat/config.c

799

num = prop_number_create_signed(val);

usr.sbin/fwctl/fwcontrol.c

437

printf("vendor ID: 0x%06x\n", reg->val);

usr.sbin/fwctl/fwcontrol.c

466

reg->key & CSRKEY_MASK, reg->val,

usr.sbin/fwctl/fwcontrol.c

647

sysctl_set_int(const char *name, int val)

usr.sbin/fwctl/fwcontrol.c

649

if (sysctlbyname(name, NULL, NULL, &val, sizeof(val)) < 0)

usr.sbin/gspa/gspa/gsp_act.c

165

num_expr(int val)

usr.sbin/gspa/gspa/gsp_act.c

172

x->e_val = val;

usr.sbin/gspa/gspa/gsp_act.c

80

expr_op(expr val)

usr.sbin/gspa/gspa/gsp_act.c

87

o->op_u.value = val;

usr.sbin/gspa/gspa/gsp_ass.h

77

int32_t val;

usr.sbin/gspa/gspa/gsp_ass.h

83

#define e_val e_u.val

usr.sbin/gspa/gspa/gsp_inst.c

446

int32_t val[2];

usr.sbin/gspa/gspa/gsp_inst.c

454

eval_expr(op0->op_u.value, &val[0], &eline[0]);

usr.sbin/gspa/gspa/gsp_inst.c

457

eval_expr(op1->op_u.value, &val[1], &eline[1]);

usr.sbin/gspa/gspa/gsp_inst.c

478

&& 0 < val[0] && val[0] <= 32 ){

usr.sbin/gspa/gspa/gsp_inst.c

529

val[0] = ~ val[0];

usr.sbin/gspa/gspa/gsp_inst.c

533

&& (int16_t)val[0] == val[0] )){

usr.sbin/gspa/gspa/gsp_inst.c

534

if( (int16_t) val[0] != val[0] )

usr.sbin/gspa/gspa/gsp_inst.c

541

iwords[2] = (val[0] >> 16);

usr.sbin/gspa/gspa/gsp_inst.c

544

iwords[1] = val[0];

usr.sbin/gspa/gspa/gsp_inst.c

548

if( val[0] < 0 || ((flags & K32) == 0 && val[0] > 31)

usr.sbin/gspa/gspa/gsp_inst.c

549

|| ((flags & K32) != 0 && val[0] <= 0) || val[0] > 32 )

usr.sbin/gspa/gspa/gsp_inst.c

551

rs = val[0];

usr.sbin/gspa/gspa/gsp_inst.c

563

off = (int)(val[0] - pc - 0x20) >> 4;

usr.sbin/gspa/gspa/gsp_inst.c

576

iwords[1] = val[0];

usr.sbin/gspa/gspa/gsp_inst.c

577

iwords[2] = val[0] >> 16;

usr.sbin/gspa/gspa/gsp_inst.c

586

off = (int)(val[0] - pc - 0x10) >> 4;

usr.sbin/gspa/gspa/gsp_inst.c

598

iwords[1] = val[0];

usr.sbin/gspa/gspa/gsp_inst.c

599

iwords[2] = val[0] >> 16;

usr.sbin/gspa/gspa/gsp_inst.c

620

off = (int)(val[1] - pc - 0x10) >> 4;

usr.sbin/gspa/gspa/gsp_inst.c

648

rs = val[0];

usr.sbin/gspa/gspa/gsp_inst.c

649

rd = val[1];

usr.sbin/gspa/gspa/gsp_inst.c

686

if( val[1] < 0 || val[1] > 0xFFFFL )

usr.sbin/gspa/gspa/gsp_inst.c

688

mask = val[1];

usr.sbin/gspa/gspa/gsp_inst.c

721

if( (int16_t) val[0] != val[0] )

usr.sbin/gspa/gspa/gsp_inst.c

723

iwords[1] = val[0];

usr.sbin/gspa/gspa/gsp_inst.c

726

iwords[1] = val[0];

usr.sbin/gspa/gspa/gsp_inst.c

727

iwords[2] = val[0] >> 16;

usr.sbin/gspa/gspa/gsp_inst.c

732

if( (int16_t) val[1] != val[1] )

usr.sbin/gspa/gspa/gsp_inst.c

734

iwords[nw] = val[1];

usr.sbin/gspa/gspa/gsp_inst.c

737

iwords[nw] = val[1];

usr.sbin/gspa/gspa/gsp_inst.c

738

iwords[nw+1] = val[1] >> 16;

usr.sbin/gspa/gspa/gsp_inst.c

748

val[0] = 0;

usr.sbin/gspa/gspa/gsp_inst.c

749

else if( val[0] < 0 || val[0] > 31 )

usr.sbin/gspa/gspa/gsp_inst.c

752

opc |= val[0] & 0x1F;

usr.sbin/gspa/gspa/gsp_out.c

146

start_at(u_int32_t val)

usr.sbin/gspa/gspa/gsp_out.c

154

val & 0xffff, val >> 16, val & 0xffff, val >> 16);

usr.sbin/gspa/gspa/gsp_out.c

156

fprintf(objfile, ":%lX\n", (long)val);

usr.sbin/gspa/gspa/gsp_pseu.c

123

if( !eval_expr(ops->op_u.value, &val, &ln) ){

usr.sbin/gspa/gspa/gsp_pseu.c

128

val *= 8;

usr.sbin/gspa/gspa/gsp_pseu.c

130

val = (val + 8) & ~15; /* round to word */

usr.sbin/gspa/gspa/gsp_pseu.c

132

val *= (code==BLKW? 2: 4);

usr.sbin/gspa/gspa/gsp_pseu.c

133

pc += val;

usr.sbin/gspa/gspa/gsp_pseu.c

143

eval_expr(ops->op_u.value, &val, &ln);

usr.sbin/gspa/gspa/gsp_pseu.c

144

start_at(val);

usr.sbin/gspa/gspa/gsp_pseu.c

145

do_show_val(val);

usr.sbin/gspa/gspa/gsp_pseu.c

45

int32_t val;

usr.sbin/gspa/gspa/gsp_pseu.c

57

if( !eval_expr(ops->op_u.value, &val, &ln) ){

usr.sbin/gspa/gspa/gsp_pseu.c

63

line_pc = pc = val;

usr.sbin/gspa/gspa/gsp_pseu.c

91

eval_expr(o->op_u.value, &val, &ln);

usr.sbin/gspa/gspa/gsp_pseu.c

92

words[0] = val;

usr.sbin/gspa/gspa/gsp_pseu.c

94

words[1] = val >> 16;

usr.sbin/gspa/gspa/gsp_pseu.c

97

if( val < -32768 || val > 65535 )

usr.sbin/gspa/gspa/gsp_sym.c

111

int32_t val;

usr.sbin/gspa/gspa/gsp_sym.c

114

if( eval_expr(value, &val, &lno) )

usr.sbin/gspa/gspa/gsp_sym.c

118

define_sym(name, val, lno, flags);

usr.sbin/gspa/gspa/gsp_sym.c

120

do_show_val(val);

usr.sbin/gspa/gspa/gsp_sym.c

78

define_sym(char *id, unsigned val, unsigned lno, int flags)

usr.sbin/gspa/gspa/gsp_sym.c

88

} else if( pass2 && ptr->value != val )

usr.sbin/gspa/gspa/gsp_sym.c

90

id, ptr->value, val);

usr.sbin/gspa/gspa/gsp_sym.c

94

ptr->value = val;

usr.sbin/i2cscan/i2cscan.c

100

uint8_t val;

usr.sbin/i2cscan/i2cscan.c

143

error = iic_smbus_receive_byte(fd, addr, &val, 0);

usr.sbin/inetd/parse.c

1004

val = (int)strlen(sep->se_proto);

usr.sbin/inetd/parse.c

1005

if (val == 0) {

usr.sbin/inetd/parse.c

1010

val = sep->se_proto[val - 1];

usr.sbin/inetd/parse.c

1011

switch (val) {

usr.sbin/inetd/parse.c

388

int argc, val;

usr.sbin/inetd/parse.c

613

val = (int)strtol((arg), &cp0, 10); \

usr.sbin/inetd/parse.c

618

val *= 1024; \

usr.sbin/inetd/parse.c

620

val *= 1024 * 1024; \

usr.sbin/inetd/parse.c

622

if (val < 1) { \

usr.sbin/inetd/parse.c

633

sep->se_sndbuf = val; \

usr.sbin/inetd/parse.c

635

sep->se_rcvbuf = val; \

usr.sbin/inetd/parse.c

999

int val;

usr.sbin/inetd/parse_v2.c

1096

char *val;

usr.sbin/inetd/parse_v2.c

1098

if ((val = next_value(values)) == NULL) {

usr.sbin/inetd/parse_v2.c

1104

if (parse_server(sep, val))

usr.sbin/inetd/parse_v2.c

1116

if ((val = next_value(values)) != NULL) {

usr.sbin/inetd/parse_v2.c

1128

char *val;

usr.sbin/inetd/parse_v2.c

1137

for (val = next_value(values); val != NULL; val = next_value(values)) {

usr.sbin/inetd/parse_v2.c

1143

sep->se_argv[argc++] = newstr(val);

usr.sbin/inetd/parse_v2.c

677

char *val = next_value(values);

usr.sbin/inetd/parse_v2.c

678

sep->se_hostaddr = newstr(val);

usr.sbin/inetd/parse_v2.c

755

char *val;

usr.sbin/inetd/parse_v2.c

757

if ((val = next_value(values)) == NULL) {

usr.sbin/inetd/parse_v2.c

763

strncmp(val, "faith/", strlen("faith/")) == 0) {

usr.sbin/inetd/parse_v2.c

764

val += strlen("faith/");

usr.sbin/inetd/parse_v2.c

767

sep->se_proto = newstr(val);

usr.sbin/inetd/parse_v2.c

772

if ((val = next_value(values)) != NULL) {

usr.sbin/inetd/parse_v2.c

891

char *val;

usr.sbin/inetd/parse_v2.c

902

val = next_value(values);

usr.sbin/inetd/parse_v2.c

904

if (val == NULL) {

usr.sbin/inetd/parse_v2.c

909

if (strcmp(val, "yes") == 0) {

usr.sbin/inetd/parse_v2.c

911

} else if (strcmp(val, "no") == 0) {

usr.sbin/inetd/parse_v2.c

914

ERR("Invalid value '%s' for wait. Valid: yes, no", val);

usr.sbin/inetd/parse_v2.c

925

if ((val = next_value(values)) != NULL) {

usr.sbin/installboot/evboards.c

1634

prop_bool_t val = prop_dictionary_get(step, step_preserve_key);

usr.sbin/installboot/evboards.c

1635

if (val != NULL)

usr.sbin/installboot/evboards.c

1636

return prop_bool_true(val);

usr.sbin/installboot/installboot.c

398

unsigned long val;

usr.sbin/installboot/installboot.c

443

val = strtoul(option, &cp, 0);

usr.sbin/installboot/installboot.c

446

if (val > INT_MAX)

usr.sbin/installboot/installboot.c

448

OPTION(params, int, opt) = (int)val;

usr.sbin/iteconfig/iteconfig.c

166

val = xstrtol(*argv++);

usr.sbin/iteconfig/iteconfig.c

171

cm->entry[i] = val;

usr.sbin/iteconfig/iteconfig.c

87

long val;

usr.sbin/kvm_mkdb/nlist_coff.c

247

memcpy(&val, syment->e_value, sizeof( long ));

usr.sbin/kvm_mkdb/nlist_coff.c

248

nbuf.n_value = val;

usr.sbin/kvm_mkdb/nlist_coff.c

96

u_long val;

usr.sbin/lpr/lpd/printjob.c

1535

char **argv, **ap, *p, *val;

usr.sbin/lpr/lpd/printjob.c

1579

while ((val = strsep(&p, " \t,")) != NULL) {

usr.sbin/lpr/lpd/printjob.c

1580

*ap++ = strdup(val);

usr.sbin/makefs/cd9660.c

343

cd9660_arguments_set_string(const char *val, const char *fieldtitle,

usr.sbin/makefs/cd9660.c

349

if (val == NULL)

usr.sbin/makefs/cd9660.c

351

else if ((len = strlen(val)) <= length) {

usr.sbin/makefs/cd9660.c

353

test = cd9660_valid_d_chars(val);

usr.sbin/makefs/cd9660.c

355

test = cd9660_valid_a_chars(val);

usr.sbin/makefs/cd9660.c

357

memcpy(dest, val, len);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

545

uint8_t val;

usr.sbin/makefs/cd9660/cd9660_eltorito.c

551

val = 0x80; /* Bootable */

usr.sbin/makefs/cd9660/cd9660_eltorito.c

552

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

554

val = 0xff; /* CHS begin */

usr.sbin/makefs/cd9660/cd9660_eltorito.c

555

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

556

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

557

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

559

val = type; /* Part type */

usr.sbin/makefs/cd9660/cd9660_eltorito.c

560

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

562

val = 0xff; /* CHS end */

usr.sbin/makefs/cd9660/cd9660_eltorito.c

563

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

564

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/cd9660/cd9660_eltorito.c

565

fwrite(&val, sizeof(val), 1, fd);

usr.sbin/makefs/ffs/mkfs.c

886

ilog2(int val)

usr.sbin/makefs/ffs/mkfs.c

891

if (1 << n == val)

usr.sbin/makefs/ffs/mkfs.c

893

errx(EXIT_FAILURE, "%s: %d is not a power of 2", __func__, val);

usr.sbin/makefs/makefs.c

340

char *var, *val;

usr.sbin/makefs/makefs.c

346

for (val = var; *val; val++)

usr.sbin/makefs/makefs.c

347

if (*val == '=') {

usr.sbin/makefs/makefs.c

348

*val++ = '\0';

usr.sbin/makefs/makefs.c

351

retval = set_option_var(options, var, val, buf, len);

usr.sbin/makefs/makefs.c

396

set_option_var(const option_t *options, const char *var, const char *val,

usr.sbin/makefs/makefs.c

403

if (!*val) { \

usr.sbin/makefs/makefs.c

407

*(type *)options[i].value = (type)strsuftoll(options[i].desc, val, \

usr.sbin/makefs/makefs.c

421

strlcpy((void *)options[i].value, val, (size_t)

usr.sbin/makefs/makefs.c

425

s = estrdup(val);

usr.sbin/makefs/makefs.c

431

strlcpy(buf, val, len);

usr.sbin/makefs/makefs.c

443

val);

usr.sbin/mopd/common/nma.c

202

if (current->val == devno)

usr.sbin/mopd/common/nma.c

218

if (current->val == devno)

usr.sbin/mopd/common/nma.c

41

int val;

usr.sbin/moused/moused.c

1146

rodent.mode.protocol = t->val;

usr.sbin/moused/moused.c

116

int val;

usr.sbin/moused/moused.c

2682

if (t->val != MOUSE_PROTO_UNKNOWN)

usr.sbin/moused/moused.c

2698

if (t->val != MOUSE_PROTO_UNKNOWN)

usr.sbin/moused/moused.c

2721

gettokenname(symtab_t *tab, int val)

usr.sbin/moused/moused.c

2726

if (tab[i].val == val)

usr.sbin/moused/moused.c

466

static const char *gettokenname(symtab_t *tab, int val);

usr.sbin/moused/moused.c

468

static void wsev(int ty, int val);

usr.sbin/moused/moused.c

833

wsev(int ty, int val)

usr.sbin/moused/moused.c

838

ev.value = val;

usr.sbin/moused/moused.c

840

printf("wsev: type=%d value=%d\n", ty, val);

usr.sbin/mtree/compare.c

138

uint32_t len, val, flags;

usr.sbin/mtree/compare.c

414

} else if (crc(fd, &val, &len)) {

usr.sbin/mtree/compare.c

422

if (s->cksum != val) {

usr.sbin/mtree/compare.c

427

tab, s->cksum, (unsigned long)val);

usr.sbin/mtree/create.c

204

uint32_t val, len;

usr.sbin/mtree/create.c

210

e = crc(fd, &val, &len);

usr.sbin/mtree/create.c

215

if (asprintf(&ptr, "%u", val) < 0)

usr.sbin/mtree/misc.c

126

allbits |= keylist[i].val;

usr.sbin/mtree/misc.c

139

return (k->val);

usr.sbin/mtree/misc.c

153

return (k->val);

usr.sbin/mtree/misc.c

57

u_int val; /* value */

usr.sbin/mtree/spec.c

547

char *kw, *val, *md, *ep;

usr.sbin/mtree/spec.c

559

while ((val = strsep(&t, " \t")) != NULL && *val == '\0')

usr.sbin/mtree/spec.c

561

if (val == NULL)

usr.sbin/mtree/spec.c

565

ip->cksum = strtoul(val, &ep, 10);

usr.sbin/mtree/spec.c

567

mtree_err("invalid checksum `%s'", val);

usr.sbin/mtree/spec.c

570

ip->st_rdev = parsedev(val);

usr.sbin/mtree/spec.c

573

if (strcmp("none", val) == 0)

usr.sbin/mtree/spec.c

575

else if (string_to_flags(&val, &ip->st_flags, NULL)

usr.sbin/mtree/spec.c

577

mtree_err("invalid flag `%s'", val);

usr.sbin/mtree/spec.c

580

ip->st_gid = (gid_t)strtoul(val, &ep, 10);

usr.sbin/mtree/spec.c

582

mtree_err("invalid gid `%s'", val);

usr.sbin/mtree/spec.c

587

if (gid_from_group(val, &gid) == -1)

usr.sbin/mtree/spec.c

588

mtree_err("unknown group `%s'", val);

usr.sbin/mtree/spec.c

592

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

593

md=&val[2];

usr.sbin/mtree/spec.c

595

md=val;

usr.sbin/mtree/spec.c

600

if ((m = setmode(val)) == NULL)

usr.sbin/mtree/spec.c

602

val, strerror(errno));

usr.sbin/mtree/spec.c

607

ip->st_nlink = (nlink_t)strtoul(val, &ep, 10);

usr.sbin/mtree/spec.c

609

mtree_err("invalid link count `%s'", val);

usr.sbin/mtree/spec.c

612

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

613

md=&val[2];

usr.sbin/mtree/spec.c

615

md=val;

usr.sbin/mtree/spec.c

620

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

621

md=&val[2];

usr.sbin/mtree/spec.c

623

md=val;

usr.sbin/mtree/spec.c

628

ip->st_size = (off_t)strtoll(val, &ep, 10);

usr.sbin/mtree/spec.c

630

mtree_err("invalid size `%s'", val);

usr.sbin/mtree/spec.c

633

if ((ip->slink = strdup(val)) == NULL)

usr.sbin/mtree/spec.c

635

if (strunvis(ip->slink, val) == -1)

usr.sbin/mtree/spec.c

636

mtree_err("strunvis failed on `%s'", val);

usr.sbin/mtree/spec.c

639

len = strlen(val) + 3; /* "," + str + ",\0" */

usr.sbin/mtree/spec.c

642

snprintf(ip->tags, len, ",%s,", val);

usr.sbin/mtree/spec.c

646

(time_t)strtoll(val, &ep, 10);

usr.sbin/mtree/spec.c

648

mtree_err("invalid time `%s'", val);

usr.sbin/mtree/spec.c

649

val = ep + 1;

usr.sbin/mtree/spec.c

650

ip->st_mtimespec.tv_nsec = strtol(val, &ep, 10);

usr.sbin/mtree/spec.c

652

mtree_err("invalid time `%s'", val);

usr.sbin/mtree/spec.c

655

ip->type = parsetype(val);

usr.sbin/mtree/spec.c

658

ip->st_uid = (uid_t)strtoul(val, &ep, 10);

usr.sbin/mtree/spec.c

660

mtree_err("invalid uid `%s'", val);

usr.sbin/mtree/spec.c

665

if (uid_from_user(val, &uid) == -1)

usr.sbin/mtree/spec.c

666

mtree_err("unknown user `%s'", val);

usr.sbin/mtree/spec.c

670

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

671

md=&val[2];

usr.sbin/mtree/spec.c

673

md=val;

usr.sbin/mtree/spec.c

678

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

679

md=&val[2];

usr.sbin/mtree/spec.c

681

md=val;

usr.sbin/mtree/spec.c

686

if (val[0]=='0' && val[1]=='x')

usr.sbin/mtree/spec.c

687

md=&val[2];

usr.sbin/mtree/spec.c

689

md=val;

usr.sbin/npf/npfctl/npf_build.c

1263

npfctl_setparam(const char *name, int val)

usr.sbin/npf/npfctl/npf_build.c

1266

npfctl_bpfjit(val != 0);

usr.sbin/npf/npfctl/npf_build.c

1269

if (npf_param_set(npf_conf, name, val) != 0) {

usr.sbin/npf/npfctl/npf_extmod.c

122

const char *param, const char *val)

usr.sbin/npf/npfctl/npf_extmod.c

124

return extmod->param(ext, param, val);

usr.sbin/npf/npfctl/npf_parse.y

326

uint32_t val = $1;

usr.sbin/npf/npfctl/npf_parse.y

327

$$ = npfvar_create_element(NPFVAR_NUM, &val, sizeof(val));

usr.sbin/npf/npfctl/npf_show.c

101

list_push(elem_list_t *list, char *val)

usr.sbin/npf/npfctl/npf_show.c

112

values[n] = val;

usr.sbin/npf/npfctl/npf_show.c

336

const char * val;

usr.sbin/npf/npfctl/npf_show.c

427

char *val;

usr.sbin/npf/npfctl/npf_show.c

429

if ((val = mk->printfn(ctx, marks)) != NULL) {

usr.sbin/npf/npfctl/npf_show.c

430

list_push(target_list, val);

usr.sbin/npf/npfctl/npf_show.c

439

char *val, *elements;

usr.sbin/npf/npfctl/npf_show.c

442

easprintf(&val, verified_fmt(mk->format, "%s"), elements );

usr.sbin/npf/npfctl/npf_show.c

443

list_push(&ctx->list[mk->list_id], val);

usr.sbin/npf/npfctl/npf_show.c

646

ctx->fpos += fprintf(ctx->fp, "%s ", ak->val);

usr.sbin/npf/npfctl/npf_show.c

812

int val, defval, *dval;

usr.sbin/npf/npfctl/npf_show.c

816

while ((name = npf_param_iterate(ncf, &i, &val, dval)) != NULL) {

usr.sbin/npf/npfctl/npf_show.c

817

if (dval && val == *dval) {

usr.sbin/npf/npfctl/npf_show.c

820

ctx->fpos += fprintf(ctx->fp, "set %s %d\n", name, val);

usr.sbin/npf/npftest/libnpftest/npf_gc_test.c

115

int val;

usr.sbin/npf/npftest/libnpftest/npf_gc_test.c

118

npfk_param_get(npf_getkernctx(), "gc.step", &val);

usr.sbin/npf/npftest/libnpftest/npf_gc_test.c

119

CHECK_TRUE(val == 256);

usr.sbin/pstat/pstat.c

154

#define PRWORD(ovflw, fmt, width, fixed, val) do { \

usr.sbin/pstat/pstat.c

158

(val)) - (width); \

usr.sbin/puffs/mount_9p/ninebuf.c

189

p9pbuf_put_1(struct puffs_framebuf *pb, uint8_t val)

usr.sbin/puffs/mount_9p/ninebuf.c

193

rv = puffs_framebuf_putdata(pb, &val, 1);

usr.sbin/puffs/mount_9p/ninebuf.c

198

p9pbuf_put_2(struct puffs_framebuf *pb, uint16_t val)

usr.sbin/puffs/mount_9p/ninebuf.c

202

HTOLE16(val);

usr.sbin/puffs/mount_9p/ninebuf.c

203

rv = puffs_framebuf_putdata(pb, &val, 2);

usr.sbin/puffs/mount_9p/ninebuf.c

208

p9pbuf_put_4(struct puffs_framebuf *pb, uint32_t val)

usr.sbin/puffs/mount_9p/ninebuf.c

212

HTOLE32(val);

usr.sbin/puffs/mount_9p/ninebuf.c

213

rv = puffs_framebuf_putdata(pb, &val, 4);

usr.sbin/puffs/mount_9p/ninebuf.c

218

p9pbuf_put_8(struct puffs_framebuf *pb, uint64_t val)

usr.sbin/puffs/mount_9p/ninebuf.c

222

HTOLE64(val);

usr.sbin/puffs/mount_9p/ninebuf.c

223

rv = puffs_framebuf_putdata(pb, &val, 8);

usr.sbin/puffs/mount_9p/ninebuf.c

256

p9pbuf_get_1(struct puffs_framebuf *pb, uint8_t *val)

usr.sbin/puffs/mount_9p/ninebuf.c

259

ERETURN(puffs_framebuf_getdata(pb, val, 1));

usr.sbin/puffs/mount_9p/ninebuf.c

263

p9pbuf_get_2(struct puffs_framebuf *pb, uint16_t *val)

usr.sbin/puffs/mount_9p/ninebuf.c

267

rv = puffs_framebuf_getdata(pb, val, 2);

usr.sbin/puffs/mount_9p/ninebuf.c

268

LE16TOH(*val);

usr.sbin/puffs/mount_9p/ninebuf.c

274

p9pbuf_get_4(struct puffs_framebuf *pb, uint32_t *val)

usr.sbin/puffs/mount_9p/ninebuf.c

278

rv = puffs_framebuf_getdata(pb, val, 4);

usr.sbin/puffs/mount_9p/ninebuf.c

279

LE32TOH(*val);

usr.sbin/puffs/mount_9p/ninebuf.c

285

p9pbuf_get_8(struct puffs_framebuf *pb, uint64_t *val)

usr.sbin/puffs/mount_9p/ninebuf.c

289

rv = puffs_framebuf_getdata(pb, val, 8);

usr.sbin/puffs/mount_9p/ninebuf.c

290

LE64TOH(*val);

usr.sbin/puffs/mount_9p/ninebuf.c

52

uint8_t val;

usr.sbin/puffs/mount_9p/ninebuf.c

54

puffs_framebuf_getdata_atoff(pb, 4, &val, 1);

usr.sbin/puffs/mount_9p/ninebuf.c

55

return val;

usr.sbin/puffs/mount_9p/ninebuf.c

61

uint16_t val;

usr.sbin/puffs/mount_9p/ninebuf.c

63

puffs_framebuf_getdata_atoff(pb, 5, &val, 2);

usr.sbin/puffs/mount_9p/ninebuf.c

64

return le16toh(val);

usr.sbin/puffs/mount_9p/ninebuf.c

70

uint32_t val;

usr.sbin/puffs/mount_9p/ninebuf.c

72

puffs_framebuf_getdata_atoff(pb, 0, &val, 4);

usr.sbin/puffs/mount_9p/ninebuf.c

73

return le32toh(val);

usr.sbin/puffs/mount_9p/nineproto.c

113

#define GETSTR(val,strsize) \

usr.sbin/puffs/mount_9p/nineproto.c

115

if ((rv = p9pbuf_get_str(pb, val, strsize))) return rv; \

usr.sbin/puffs/mount_psshfs/fs.c

117

if (psbuf_get_str(pb, &val, NULL) != 0)

usr.sbin/puffs/mount_psshfs/fs.c

122

&& strcmp(val, extu->val) == 0)

usr.sbin/puffs/mount_psshfs/fs.c

63

const char *val;

usr.sbin/puffs/mount_psshfs/fs.c

94

char *ext, *val;

usr.sbin/puffs/mount_psshfs/psbuf.c

205

psbuf_put_1(struct puffs_framebuf *pb, uint8_t val)

usr.sbin/puffs/mount_psshfs/psbuf.c

209

rv = puffs_framebuf_putdata(pb, &val, 1);

usr.sbin/puffs/mount_psshfs/psbuf.c

214

psbuf_put_2(struct puffs_framebuf *pb, uint16_t val)

usr.sbin/puffs/mount_psshfs/psbuf.c

218

HTOBE16(val);

usr.sbin/puffs/mount_psshfs/psbuf.c

219

rv = puffs_framebuf_putdata(pb, &val, 2);

usr.sbin/puffs/mount_psshfs/psbuf.c

224

psbuf_put_4(struct puffs_framebuf *pb, uint32_t val)

usr.sbin/puffs/mount_psshfs/psbuf.c

228

HTOBE32(val);

usr.sbin/puffs/mount_psshfs/psbuf.c

229

rv = puffs_framebuf_putdata(pb, &val, 4);

usr.sbin/puffs/mount_psshfs/psbuf.c

234

psbuf_put_8(struct puffs_framebuf *pb, uint64_t val)

usr.sbin/puffs/mount_psshfs/psbuf.c

238

HTOBE64(val);

usr.sbin/puffs/mount_psshfs/psbuf.c

239

rv = puffs_framebuf_putdata(pb, &val, 8);

usr.sbin/puffs/mount_psshfs/psbuf.c

308

psbuf_get_1(struct puffs_framebuf *pb, uint8_t *val)

usr.sbin/puffs/mount_psshfs/psbuf.c

311

ERETURN(puffs_framebuf_getdata(pb, val, 1));

usr.sbin/puffs/mount_psshfs/psbuf.c

315

psbuf_get_2(struct puffs_framebuf *pb, uint16_t *val)

usr.sbin/puffs/mount_psshfs/psbuf.c

319

rv = puffs_framebuf_getdata(pb, val, 2);

usr.sbin/puffs/mount_psshfs/psbuf.c

320

BE16TOH(*val);

usr.sbin/puffs/mount_psshfs/psbuf.c

326

psbuf_get_4(struct puffs_framebuf *pb, uint32_t *val)

usr.sbin/puffs/mount_psshfs/psbuf.c

330

rv = puffs_framebuf_getdata(pb, val, 4);

usr.sbin/puffs/mount_psshfs/psbuf.c

331

BE32TOH(*val);

usr.sbin/puffs/mount_psshfs/psbuf.c

337

psbuf_get_8(struct puffs_framebuf *pb, uint64_t *val)

usr.sbin/puffs/mount_psshfs/psbuf.c

341

rv = puffs_framebuf_getdata(pb, val, 8);

usr.sbin/puffs/mount_psshfs/psbuf.c

342

BE64TOH(*val);

usr.sbin/puffs/mount_psshfs/psbuf.c

373

uint32_t val;

usr.sbin/puffs/mount_psshfs/psbuf.c

397

FAILRV(psbuf_get_4(pb, &val));

usr.sbin/puffs/mount_psshfs/psbuf.c

398

vap->va_atime.tv_sec = val;

usr.sbin/puffs/mount_psshfs/psbuf.c

399

FAILRV(psbuf_get_4(pb, &val));

usr.sbin/puffs/mount_psshfs/psbuf.c

400

vap->va_mtime.tv_sec = val;

usr.sbin/puffs/mount_psshfs/psbuf.c

402

vap->va_ctime.tv_sec = val;

usr.sbin/puffs/mount_psshfs/psbuf.c

470

#define CHECKCODE(pb,val) \

usr.sbin/puffs/mount_psshfs/psbuf.c

473

rv = expectcode(pb, val); \

usr.sbin/puffs/mount_psshfs/psbuf.c

510

uint32_t val;

usr.sbin/puffs/mount_psshfs/psbuf.c

515

if (psbuf_get_4(pb, &val) != 0)

usr.sbin/puffs/mount_psshfs/psbuf.c

518

if (val != SSH_FX_EOF)

usr.sbin/puffs/mount_psshfs/psbuf.c

519

return sftperr_to_errno(val);

usr.sbin/quotarestore/quotarestore.c

200

unsigned long val;

usr.sbin/quotarestore/quotarestore.c

208

val = strtoul(name, &s, 10);

usr.sbin/quotarestore/quotarestore.c

212

if (idtype == QUOTA_IDTYPE_USER && val > UID_MAX) {

usr.sbin/quotarestore/quotarestore.c

215

if (idtype == QUOTA_IDTYPE_GROUP && val > GID_MAX) {

usr.sbin/quotarestore/quotarestore.c

218

*ret = val;

usr.sbin/quotarestore/quotarestore.c

256

unsigned long long val;

usr.sbin/quotarestore/quotarestore.c

264

val = strtoull(name, &s, 10);

usr.sbin/quotarestore/quotarestore.c

268

*ret = val;

usr.sbin/quotarestore/quotarestore.c

275

long long val;

usr.sbin/quotarestore/quotarestore.c

283

val = strtoll(name, &s, 10);

usr.sbin/quotarestore/quotarestore.c

284

if (errno || *s != 0 || val < 0) {

usr.sbin/quotarestore/quotarestore.c

287

*ret = val;

usr.sbin/quotarestore/quotarestore.c

374

struct quotaval val;

usr.sbin/quotarestore/quotarestore.c

447

if (getlimit(fields[3], &val.qv_hardlimit)) {

usr.sbin/quotarestore/quotarestore.c

451

if (getlimit(fields[4], &val.qv_softlimit)) {

usr.sbin/quotarestore/quotarestore.c

455

if (getlimit(fields[5], &val.qv_usage)) {

usr.sbin/quotarestore/quotarestore.c

462

val.qv_usage = 0;

usr.sbin/quotarestore/quotarestore.c

464

if (gettime(fields[6], &val.qv_expiretime)) {

usr.sbin/quotarestore/quotarestore.c

468

if (gettime(fields[7], &val.qv_grace)) {

usr.sbin/quotarestore/quotarestore.c

473

if (quota_put(qh, &key, &val)) {

usr.sbin/rbootd/rmp_var.h

150

typedef struct _uword { u_int16_t val[2]; } u_word;

usr.sbin/rbootd/rmp_var.h

153

((w.val[_WORD_HIGHPART] == 0) && (w.val[_WORD_LOWPART] == 0))

usr.sbin/rbootd/rmp_var.h

155

(w).val[_WORD_HIGHPART] = (w).val[_WORD_LOWPART] = 0

usr.sbin/rbootd/rmp_var.h

157

{ (w2).val[_WORD_HIGHPART] = (w1).val[_WORD_HIGHPART]; \

usr.sbin/rbootd/rmp_var.h

158

(w2).val[_WORD_LOWPART] = (w1).val[_WORD_LOWPART]; \

usr.sbin/rbootd/rmp_var.h

161

(i) = (((u_int32_t)ntohs((w).val[_WORD_HIGHPART])) << 16) | ntohs((w).val[_WORD_LOWPART])

usr.sbin/rbootd/rmp_var.h

163

{ (w).val[_WORD_HIGHPART] = htons((u_int16_t) ((i >> 16) & 0xffff)); \

usr.sbin/rbootd/rmp_var.h

164

(w).val[_WORD_LOWPART] = htons((u_int16_t) (i & 0xffff)); \

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

501

char *val;

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

516

val = strtok(NULL, " \t");

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

517

if (val == NULL)

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

520

strlcpy(sp_name, val, sizeof(sp_name));

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

526

if (!strcasecmp(val, "no") ||

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

527

!strcasecmp(val, "off") ||

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

528

!strcasecmp(val, "disable") ||

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

529

!strcmp(val, "0"))

usr.sbin/rpc.pcnfsd/pcnfsd_misc.c

537

(void) add_printer_alias(val, arg1, arg2);

usr.sbin/rpc.pcnfsd/pcnfsd_v2.c

483

char *val = NULL;

usr.sbin/rpc.pcnfsd/pcnfsd_v2.c

498

err = yp_match(domain, map, key, strlen(key), &val, &len);

usr.sbin/rpc.pcnfsd/pcnfsd_v2.c

502

if (val)

usr.sbin/rpc.pcnfsd/pcnfsd_v2.c

503

free(val);

usr.sbin/rpc.pcnfsd/pcnfsd_v2.c

506

if ((cp = strchr(val, '\n')) != NULL)

usr.sbin/rpc.pcnfsd/pcnfsd_v2.c

508

return (val);

usr.sbin/rpc.yppasswdd/yppasswdd_mkpw.c

75

#define REPLY(val) do { \

usr.sbin/rpc.yppasswdd/yppasswdd_mkpw.c

76

int res = (val); \

usr.sbin/rpc.yppasswdd/yppasswdd_mkpw.c

81

#define RETURN(val) do { \

usr.sbin/rpc.yppasswdd/yppasswdd_mkpw.c

82

REPLY((val)); \

usr.sbin/rtadvd/config.c

162

int32_t val;

usr.sbin/rtadvd/config.c

264

MAYHAVE(val, "maxinterval", DEF_MAXRTRADVINTERVAL);

usr.sbin/rtadvd/config.c

265

if (val < MIN_MAXINTERVAL || val > MAX_MAXINTERVAL) {

usr.sbin/rtadvd/config.c

268

"(must be between %u and %u)", __func__, val,

usr.sbin/rtadvd/config.c

272

tmp->maxinterval = val;

usr.sbin/rtadvd/config.c

273

MAYHAVE(val, "mininterval", tmp->maxinterval/3);

usr.sbin/rtadvd/config.c

274

if (val < MIN_MININTERVAL || val > (tmp->maxinterval * 3) / 4) {

usr.sbin/rtadvd/config.c

278

__func__, val, intface, MIN_MININTERVAL,

usr.sbin/rtadvd/config.c

282

tmp->mininterval = val;

usr.sbin/rtadvd/config.c

284

MAYHAVE(val, "chlim", DEF_ADVCURHOPLIMIT);

usr.sbin/rtadvd/config.c

285

tmp->hoplimit = val & 0xff;

usr.sbin/rtadvd/config.c

288

val = 0;

usr.sbin/rtadvd/config.c

290

val |= ND_RA_FLAG_MANAGED;

usr.sbin/rtadvd/config.c

292

val |= ND_RA_FLAG_OTHER;

usr.sbin/rtadvd/config.c

294

val |= ND_RA_FLAG_RTPREF_HIGH;

usr.sbin/rtadvd/config.c

296

if ((val & ND_RA_FLAG_RTPREF_HIGH)) {

usr.sbin/rtadvd/config.c

301

val |= ND_RA_FLAG_RTPREF_LOW;

usr.sbin/rtadvd/config.c

304

MAYHAVE(val, "raflags", 0);

usr.sbin/rtadvd/config.c

306

tmp->managedflg = val & ND_RA_FLAG_MANAGED;

usr.sbin/rtadvd/config.c

307

tmp->otherflg = val & ND_RA_FLAG_OTHER;

usr.sbin/rtadvd/config.c

312

tmp->rtpref = val & ND_RA_FLAG_RTPREF_MASK;

usr.sbin/rtadvd/config.c

319

MAYHAVE(val, "rltime", DEF_ADVROUTERLIFETIME);

usr.sbin/rtadvd/config.c

320

if (val && (val < tmp->maxinterval || val > MAXROUTERLIFETIME)) {

usr.sbin/rtadvd/config.c

323

__func__, val, intface,

usr.sbin/rtadvd/config.c

335

if (val && forwarding == 0) {

usr.sbin/rtadvd/config.c

343

tmp->lifetime = val & 0xffff;

usr.sbin/rtadvd/config.c

345

MAYHAVE(val, "rtime", DEF_ADVREACHABLETIME);

usr.sbin/rtadvd/config.c

346

if (val < 0 || val > MAXREACHABLETIME) {

usr.sbin/rtadvd/config.c

350

__func__, val, intface, MAXREACHABLETIME);

usr.sbin/rtadvd/config.c

353

tmp->reachabletime = (uint32_t)val;

usr.sbin/rtadvd/config.c

376

MAYHAVE(val, "clockskew", 0);

usr.sbin/rtadvd/config.c

377

tmp->clockskew = val;

usr.sbin/rtadvd/config.c

422

MAYHAVE(val, entbuf, 64);

usr.sbin/rtadvd/config.c

423

if (val < 0 || val > 128) {

usr.sbin/rtadvd/config.c

426

__func__, val, addr, intface);

usr.sbin/rtadvd/config.c

429

pfx->prefixlen = (int)val;

usr.sbin/rtadvd/config.c

433

val = 0;

usr.sbin/rtadvd/config.c

435

val |= ND_OPT_PI_FLAG_ONLINK;

usr.sbin/rtadvd/config.c

437

val |= ND_OPT_PI_FLAG_AUTO;

usr.sbin/rtadvd/config.c

439

MAYHAVE(val, entbuf,

usr.sbin/rtadvd/config.c

442

pfx->onlinkflg = val & ND_OPT_PI_FLAG_ONLINK;

usr.sbin/rtadvd/config.c

443

pfx->autoconfflg = val & ND_OPT_PI_FLAG_AUTO;

usr.sbin/rtadvd/config.c

566

MAYHAVE(val, entbuf, 256);

usr.sbin/rtadvd/config.c

567

if (val == 256) {

usr.sbin/rtadvd/config.c

569

MAYHAVE(val, oentbuf, 256);

usr.sbin/rtadvd/config.c

570

if (val != 256) {

usr.sbin/rtadvd/config.c

574

val = 64;

usr.sbin/rtadvd/config.c

576

if (val < 0 || val > 128) {

usr.sbin/rtadvd/config.c

579

__func__, val, addr, intface);

usr.sbin/rtadvd/config.c

582

rti->prefixlen = (int)val;

usr.sbin/rtadvd/config.c

586

val = 0;

usr.sbin/rtadvd/config.c

588

val |= ND_RA_FLAG_RTPREF_HIGH;

usr.sbin/rtadvd/config.c

590

if ((val & ND_RA_FLAG_RTPREF_HIGH)) {

usr.sbin/rtadvd/config.c

597

val |= ND_RA_FLAG_RTPREF_LOW;

usr.sbin/rtadvd/config.c

600

MAYHAVE(val, entbuf, 256); /* XXX */

usr.sbin/rtadvd/config.c

601

if (val == 256) {

usr.sbin/rtadvd/config.c

603

MAYHAVE(val, oentbuf, 256);

usr.sbin/rtadvd/config.c

604

if (val != 256) {

usr.sbin/rtadvd/config.c

608

val = 0;

usr.sbin/rtadvd/config.c

610

rti->rtpref = val & ND_RA_FLAG_RTPREF_MASK;

usr.sbin/sesd/srcs/setencstat.c

48

long val;

usr.sbin/sesd/srcs/setencstat.c

61

val = strtol(v[2], NULL, 0);

usr.sbin/sesd/srcs/setencstat.c

62

sestat = (ses_encstat) val;

usr.sbin/sysinst/arch/ofppc/md.c

666

uint32_t *blp, cnt, val;

usr.sbin/sysinst/arch/ofppc/md.c

670

val = 0;

usr.sbin/sysinst/arch/ofppc/md.c

672

val += *blp++;

usr.sbin/sysinst/arch/ofppc/md.c

673

return val;

usr.sbin/sysinst/bsddisklabel.c

548

daddr_t val;

usr.sbin/sysinst/bsddisklabel.c

551

val = strtoull(str, &cp, 10);

usr.sbin/sysinst/bsddisklabel.c

556

return val;

usr.sbin/sysinst/factor.c

101

val % primes[i] == 0) {

usr.sbin/sysinst/factor.c

103

val /= primes[i];

usr.sbin/sysinst/factor.c

106

if (val > 1)

usr.sbin/sysinst/factor.c

107

fact_list[(*num_fact)++] = val;

usr.sbin/sysinst/factor.c

119

long val;

usr.sbin/sysinst/factor.c

131

val = atol(argv[arg]);

usr.sbin/sysinst/factor.c

132

factor (val, facts, 30, &nfact);

usr.sbin/sysinst/factor.c

134

printf ("%ld:", val);

usr.sbin/sysinst/factor.c

52

void factor (long val, long *fact_list, int fact_size, int *num_fact);

usr.sbin/sysinst/factor.c

86

factor(long val, long *fact_list, int fact_size, int *num_fact)

usr.sbin/sysinst/factor.c

91

build_primes(val);

usr.sbin/sysinst/factor.c

95

while (*num_fact < fact_size-1 && val > 1 && i < num_primes) {

usr.sbin/sysinst/factor.c

97

while (i < num_primes && val % primes[i] != 0) i++;

usr.sbin/sysinst/gpt.c

204

gpt_add_info(struct gpt_part_entry *part, const char *tag, char *val,

usr.sbin/sysinst/gpt.c

210

part->gp_start = strtouq(val, NULL, 10);

usr.sbin/sysinst/gpt.c

212

part->gp_size = strtouq(val, NULL, 10);

usr.sbin/sysinst/gpt.c

214

s = strchr(val, '(');

usr.sbin/sysinst/gpt.c

223

part->gp_type = gpt_find_guid_type(val);

usr.sbin/sysinst/gpt.c

225

strlcpy(part->gp_id, val, sizeof(part->gp_id));

usr.sbin/sysinst/gpt.c

227

strlcpy(part->gp_label, val, sizeof(part->gp_label));

usr.sbin/sysinst/gpt.c

231

while ((n = strsep(&val, ", ")) != NULL) {

usr.sbin/sysinst/label.c

1147

char val[MENUSTRSIZE];

usr.sbin/sysinst/label.c

1299

val, sizeof val);

usr.sbin/sysinst/label.c

1302

wprintw(m->mw, "%*s : %s", col_width, attrname, val);

usr.sbin/sysinst/label.c

2383

daddr_t val;

usr.sbin/sysinst/label.c

2390

val = strtoull(str, &cp, 10);

usr.sbin/sysinst/label.c

2436

return val;

usr.sbin/sysinst/label.c

305

size_t val = 1 << (edit->offset+m->cursel);

usr.sbin/sysinst/label.c

308

edit->info.fs_opt1 = val;

usr.sbin/sysinst/label.c

309

edit->wanted->fs_opt1 = val;

usr.sbin/sysinst/label.c

311

edit->info.fs_opt2 = val;

usr.sbin/sysinst/label.c

312

edit->wanted->fs_opt2 = val;

usr.sbin/sysinst/label.c

324

size_t i, val;

usr.sbin/sysinst/label.c

329

for (i = 0, val = min_val; val <= max_val; i++, val <<= 1) {

usr.sbin/sysinst/label.c

330

snprintf(names[i], sizeof names[i], "%zu", val);

usr.sbin/sysinst/net.c

507

int val;

usr.sbin/sysinst/net.c

511

if (sysctlbyname(buf, &val, &len, NULL, 0) != -1

usr.sbin/sysinst/net.c

512

&& val != 0)

usr.sbin/sysinst/net.c

517

val = 1;

usr.sbin/sysinst/net.c

518

if (sysctlbyname(buf, NULL, NULL, &val,

usr.sbin/tprof/tprof_analyze.c

148

uintmax_t val;

usr.sbin/tprof/tprof_analyze.c

163

val = strtoumax(optarg, &ep, 10);

usr.sbin/tprof/tprof_analyze.c

165

val > INT32_MAX) {

usr.sbin/tprof/tprof_analyze.c

168

target_pid = val;

usr.sbin/traceroute/traceroute.c

1726

long val;

usr.sbin/traceroute/traceroute.c

1733

val = strtol(cp, &ep, 16);

usr.sbin/traceroute/traceroute.c

1735

val = strtol(str, &ep, 10);

usr.sbin/traceroute/traceroute.c

1738

if (val < mi && mi >= 0) {

usr.sbin/traceroute/traceroute.c

1744

if (val > ma && ma >= 0)

usr.sbin/traceroute/traceroute.c

1746

return (int)val;

usr.sbin/user/user.c

1038

long val;

usr.sbin/user/user.c

1051

*tp = val = strtol(s, &ep, 10);

usr.sbin/user/user.c

1056

if (*tp != val) {

usr.sbin/user/user.c

226

check_numeric(const char *val, const char *name)

usr.sbin/user/user.c

228

if (!is_number(val)) {

usr.sbin/user/user.c

232

return atoi(val);

usr.sbin/wgconfig/wgconfig.c

469

long val;

usr.sbin/wgconfig/wgconfig.c

472

val = strtol(str, &ep, 10);

usr.sbin/wgconfig/wgconfig.c

479

if (val < 0 || val > USHRT_MAX)

usr.sbin/wgconfig/wgconfig.c

482

return (uint16_t)val;

usr.sbin/wsfontload/wsfontload.c

112

if (encodings[i].val == enc)

usr.sbin/wsfontload/wsfontload.c

129

return (encodings[i].val);

usr.sbin/wsfontload/wsfontload.c

56

int val;

usr.sbin/wsfontload/wsfontload.c

65

int val;

usr.sbin/wsfontload/wsfontload.c

97

if (fontorders[i].val == fontorder)

usr.sbin/ypserv/makedbm/makedbm.c

148

datum key, val;

usr.sbin/ypserv/makedbm/makedbm.c

155

val = ypdb_fetch(db, key);

usr.sbin/ypserv/makedbm/makedbm.c

157

if (val.dptr != NULL)

usr.sbin/ypserv/makedbm/makedbm.c

160

val.dptr = __UNCONST(str2);

usr.sbin/ypserv/makedbm/makedbm.c

161

val.dsize = strlen(str2);

usr.sbin/ypserv/makedbm/makedbm.c

162

status = ypdb_store(db, key, val, YPDB_INSERT);

usr.sbin/ypserv/makedbm/makedbm.c

196

datum key, val;

usr.sbin/ypserv/makedbm/makedbm.c

205

val = ypdb_fetch(db, key);

usr.sbin/ypserv/makedbm/makedbm.c

210

if (val.dsize > 0) {

usr.sbin/ypserv/makedbm/makedbm.c

211

if (val.dptr[val.dsize - 1] == '\0')

usr.sbin/ypserv/makedbm/makedbm.c

212

val.dsize--;

usr.sbin/ypserv/makedbm/makedbm.c

213

printf(" %*.*s", val.dsize, val.dsize, val.dptr);

usr.sbin/ypserv/mkalias/mkalias.c

157

datum key, val;

usr.sbin/ypserv/mkalias/mkalias.c

248

val = ypdb_fetch(db, key);

usr.sbin/ypserv/mkalias/mkalias.c

250

if (val.dptr == NULL)

usr.sbin/ypserv/mkalias/mkalias.c

256

if (strchr(val.dptr, ',')) /* List... */

usr.sbin/ypserv/mkalias/mkalias.c

258

if (strchr(val.dptr, '|')) /* Pipe... */

usr.sbin/ypserv/mkalias/mkalias.c

261

if (!((strchr(val.dptr, '@')) ||

usr.sbin/ypserv/mkalias/mkalias.c

262

(strchr(val.dptr, '!'))))

usr.sbin/ypserv/mkalias/mkalias.c

265

split_address(val.dptr, val.dsize, user, host);

usr.sbin/ypserv/mkalias/mkalias.c

267

if (eflag && check_host(val.dptr, host, dflag, uflag, Eflag)) {

usr.sbin/ypserv/mkalias/mkalias.c

270

val.dsize, val.dsize, val.dptr);

usr.sbin/ypserv/mkalias/mkalias.c

278

status = ypdb_store(new_db, val, key, YPDB_INSERT);

usr.sbin/ypserv/mkalias/mkalias.c

282

val.dsize, val.dsize, val.dptr,

usr.sbin/ypserv/mkalias/mkalias.c

289

val.dsize, val.dsize, val.dptr,

usr.sbin/ypserv/mkalias/mkalias.c

299

val.dptr = datestr;

usr.sbin/ypserv/mkalias/mkalias.c

300

val.dsize = strlen(datestr);

usr.sbin/ypserv/mkalias/mkalias.c

301

status = ypdb_store(new_db, key, val, YPDB_INSERT);

usr.sbin/ypserv/mkalias/mkalias.c

305

val.dsize, val.dsize, val.dptr);

usr.sbin/ypserv/mkalias/mkalias.c

312

val.dptr = myname;

usr.sbin/ypserv/mkalias/mkalias.c

313

val.dsize = strlen(myname);

usr.sbin/ypserv/mkalias/mkalias.c

314

status = ypdb_store(new_db, key, val, YPDB_INSERT);

usr.sbin/ypserv/mkalias/mkalias.c

318

val.dsize, val.dsize, val.dptr);

usr.sbin/ypserv/ypserv/ypserv.h

35

struct ypresp_key_val val;

usr.sbin/ypserv/ypserv/ypserv_db.c

472

static char val[BUFSIZ + 1]; /* match libc */

usr.sbin/ypserv/ypserv/ypserv_db.c

491

v = val;

usr.sbin/ypserv/ypserv/ypserv_db.c

497

if (v - val + strlen(tmpbuf) + 1 > sizeof(val))

usr.sbin/ypserv/ypserv/ypserv_db.c

499

(void)strlcpy(v, tmpbuf, sizeof(val) - (v - val));

usr.sbin/ypserv/ypserv/ypserv_db.c

502

result->valdat.dptr = val;

usr.sbin/ypserv/ypserv/ypserv_db.c

503

result->valdat.dsize = v - val;

usr.sbin/ypserv/ypserv/ypserv_db.c

531

(void)snprintf(val, sizeof(val), "%s %s", keystr, host->h_name);

usr.sbin/ypserv/ypserv/ypserv_db.c

532

l = strlen(val);

usr.sbin/ypserv/ypserv/ypserv_db.c

533

v = val + l;

usr.sbin/ypserv/ypserv/ypserv_db.c

536

if ((v - val) + l + 1 > BUFSIZ)

usr.sbin/ypserv/ypserv/ypserv_db.c

538

(void)strlcpy(v, " ", sizeof(val) - (v - val));

usr.sbin/ypserv/ypserv/ypserv_db.c

540

(void)strlcpy(v, ptr, sizeof(val) - (v - val));

usr.sbin/ypserv/ypserv/ypserv_db.c

544

result->valdat.dptr = val;

usr.sbin/ypserv/ypserv/ypserv_db.c

545

result->valdat.dsize = v - val;

usr.sbin/ypserv/ypserv/ypserv_db.c

766

&resp.ypresp_all_u.val.status, NULL);

usr.sbin/ypserv/ypserv/ypserv_db.c

768

if (db == NULL || (int)resp.ypresp_all_u.val.status < 0)

usr.sbin/ypserv/ypserv/ypserv_db.c

785

resp.ypresp_all_u.val.status = YP_TRUE;

usr.sbin/ypserv/ypserv/ypserv_db.c

786

resp.ypresp_all_u.val.keydat.dptr = k.dptr;

usr.sbin/ypserv/ypserv/ypserv_db.c

787

resp.ypresp_all_u.val.keydat.dsize = k.dsize;

usr.sbin/ypserv/ypserv/ypserv_db.c

788

resp.ypresp_all_u.val.valdat.dptr = v.dptr;

usr.sbin/ypserv/ypserv/ypserv_db.c

789

resp.ypresp_all_u.val.valdat.dsize = v.dsize;

usr.sbin/ypserv/ypserv/ypserv_db.c

806

resp.ypresp_all_u.val.status = YP_NOKEY;

usr.sbin/ypserv/ypserv/ypserv_proc.c

333

res.ypresp_all_u.val.status = YP_YPERR;

usr.sbin/ypserv/ypserv/ypserv_xdr.c

30

if (!xdr_ypresp_key_val(xdrs, &objp->ypresp_all_u.val))

usr.sbin/ypserv/yptest/yptest.c

135

yptest_foreach(int status, char *key, int keylen, char *val, int vallen,

usr.sbin/ypserv/yptest/yptest.c

145

val[vallen] = '\0';

usr.sbin/ypserv/yptest/yptest.c

146

printf("%s %s\n", key, val);

usr.sbin/ypserv/ypxfr/ypxfr.c

297

datum key, val;

usr.sbin/ypserv/ypxfr/ypxfr.c

308

val.dptr = valstr;

usr.sbin/ypserv/ypxfr/ypxfr.c

309

val.dsize = strlen(valstr);

usr.sbin/ypserv/ypxfr/ypxfr.c

312

ypdb_store(db, key, val, YPDB_INSERT);

usr.sbin/ypserv/ypxfr/ypxfr.c

454

datum key, val;

usr.sbin/ypserv/ypxfr/ypxfr.c

463

val.dptr = datestr;

usr.sbin/ypserv/ypxfr/ypxfr.c

464

val.dsize = strlen(datestr);

usr.sbin/ypserv/ypxfr/ypxfr.c

466

status = ypdb_store(ldb, key, val, YPDB_INSERT);

usr.sbin/ypserv/ypxfr/ypxfr.c

481

datum key, val;

usr.sbin/ypserv/ypxfr/ypxfr.c

492

val.dptr = master;

usr.sbin/ypserv/ypxfr/ypxfr.c

493

val.dsize = strlen(master);

usr.sbin/ypserv/ypxfr/ypxfr.c

495

status = ypdb_store(ldb, key, val, YPDB_INSERT);