#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: netwinder_machdep.c,v 1.94 2025/12/22 07:45:47 skrll Exp $");
#include "opt_ddb.h"
#define _ARM32_BUS_DMA_PRIVATE
#include "isa.h"
#include "isadma.h"
#include "igsfb.h"
#include "pckbc.h"
#include "com.h"
#include "ksyms.h"
#include <sys/param.h>
#include <sys/device.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/exec.h>
#include <sys/proc.h>
#include <sys/msgbuf.h>
#include <sys/reboot.h>
#include <sys/termios.h>
#include <sys/ksyms.h>
#include <sys/bus.h>
#include <sys/cpu.h>
#include <sys/intr.h>
#include <uvm/uvm_extern.h>
#include <dev/cons.h>
#if NISA > 0
#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
#endif
#if NIGSFB > 0
#include <dev/pci/pcivar.h>
#include <dev/pci/igsfb_pcivar.h>
#endif
#if NPCKBC > 0
#include <dev/ic/i8042reg.h>
#include <dev/ic/pckbcvar.h>
#endif
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#include <machine/db_machdep.h>
#include <ddb/db_sym.h>
#include <ddb/db_extern.h>
#include <arm/arm32/machdep.h>
#include <machine/bootconfig.h>
#include <arm/locore.h>
#include <arm/undefined.h>
#include <machine/netwinder_boot.h>
#include <arm/footbridge/dc21285mem.h>
#include <arm/footbridge/dc21285reg.h>
static bus_space_handle_t isa_base = (bus_space_handle_t) DC21285_PCI_IO_VBASE;
bs_protos(generic);
#define ISA_GETBYTE(r) generic_bs_r_1(0, isa_base, (r))
#define ISA_PUTBYTE(r,v) generic_bs_w_1(0, isa_base, (r), (v))
static void netwinder_reset(void);
u_int dc21285_fclk = 63750000;
struct nwbootinfo nwbootinfo;
BootConfig bootconfig;
static char bootargs[MAX_BOOT_STRING + 1];
char *boot_args = NULL;
char *boot_file = NULL;
vaddr_t physical_start;
vaddr_t physical_freestart;
vaddr_t physical_freeend;
vaddr_t physical_end;
u_int free_pages;
vaddr_t pagetables_start;
#ifndef PMAP_STATIC_L1S
int max_processes = 64;
#endif
paddr_t msgbufphys;
#define KERNEL_PT_SYS 0
#define KERNEL_PT_KERNEL 1
#define KERNEL_PT_VMDATA 2
#define KERNEL_PT_VMDATA_NUM 4
#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
#if NIGSFB > 0
#define KERNEL_VM_SIZE 0x0B000000
#else
#define KERNEL_VM_SIZE 0x0C000000
#endif
void consinit(void);
void process_kernel_args(char *);
void data_abort_handler(trapframe_t *);
void prefetch_abort_handler(trapframe_t *);
void undefinedinstruction_bounce(trapframe_t *);
#ifndef CONSDEVNAME
# if (NIGSFB > 0) && (NPCKBC > 0)
# define CONSDEVNAME "igsfb"
# elif NCOM > 0
# define CONSDEVNAME "com"
# else
# error CONSDEVNAME not defined and no known console device configured
# endif
#endif
#ifndef CONCOMADDR
#define CONCOMADDR 0x3f8
#endif
#ifndef CONSPEED
#define CONSPEED B115200
#endif
#ifndef CONMODE
#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8)
#endif
int comcnspeed = CONSPEED;
int comcnmode = CONMODE;
extern struct consdev kcomcons;
static void kcomcnputc(dev_t, int);
#if NIGSFB > 0
#define IGS_PCI_MEM_VBASE 0xfc000000
#define IGS_PCI_MEM_VSIZE 0x01000000
#define IGS_PCI_MEM_BASE 0x08000000
extern struct arm32_pci_chipset footbridge_pci_chipset;
extern struct bus_space footbridge_pci_io_bs_tag;
extern struct bus_space footbridge_pci_mem_bs_tag;
extern void footbridge_pci_bs_tag_init(void);
extern bs_map_proto(footbridge_mem);
extern bs_unmap_proto(footbridge_mem);
static bs_map_proto(nw_footbridge_mem);
static bs_unmap_proto(nw_footbridge_mem);
#endif
void
cpu_reboot(int howto, char *bootstr)
{
#ifdef DIAGNOSTIC
printf("boot: howto=%08x curlwp=%p\n", howto, curlwp);
#endif
if (cold) {
doshutdownhooks();
pmf_system_shutdown(boothowto);
printf("The operating system has halted.\n");
printf("Please press any key to reboot.\n\n");
cngetc();
printf("rebooting...\n");
cpu_reset();
}
if (!(howto & RB_NOSYNC))
bootsync();
splhigh();
if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
dumpsys();
doshutdownhooks();
pmf_system_shutdown(boothowto);
IRQdisable;
if (howto & RB_HALT) {
printf("The operating system has halted.\n");
printf("Please press any key to reboot.\n\n");
cngetc();
}
printf("rebooting...\n");
cpu_reset();
}
static void
netwinder_reset(void)
{
register u_int base = DC21285_PCI_IO_BASE;
#define PUTBYTE(reg, val) \
*((volatile u_int8_t *)(base + (reg))) = (val)
PUTBYTE(0x338, 0x84);
PUTBYTE(0x370, 0x87);
PUTBYTE(0x370, 0x87);
PUTBYTE(0x370, 0x07);
PUTBYTE(0x371, 0x07);
PUTBYTE(0x370, 0xe6);
PUTBYTE(0x371, 0x00);
PUTBYTE(0x338, 0xc4);
}
struct l1_sec_map {
vaddr_t va;
vaddr_t pa;
vsize_t size;
vm_prot_t prot;
int cache;
} l1_sec_table[] = {
{ DC21285_ARMCSR_VBASE, DC21285_ARMCSR_BASE,
DC21285_ARMCSR_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE },
{ DC21285_CACHE_FLUSH_VBASE, DC21285_SA_CACHE_FLUSH_BASE,
DC21285_CACHE_FLUSH_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
PTE_CACHE },
{ DC21285_PCI_IO_VBASE, DC21285_PCI_IO_BASE,
DC21285_PCI_IO_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE },
{ DC21285_PCI_IACK_VBASE, DC21285_PCI_IACK_SPECIAL,
DC21285_PCI_IACK_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE },
{ DC21285_PCI_TYPE_1_CONFIG_VBASE, DC21285_PCI_TYPE_1_CONFIG,
DC21285_PCI_TYPE_1_CONFIG_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE },
{ DC21285_PCI_TYPE_0_CONFIG_VBASE, DC21285_PCI_TYPE_0_CONFIG,
DC21285_PCI_TYPE_0_CONFIG_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE },
{ DC21285_PCI_ISA_MEM_VBASE, DC21285_PCI_MEM_BASE,
DC21285_PCI_ISA_MEM_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE },
#if NIGSFB > 0
{ IGS_PCI_MEM_VBASE, DC21285_PCI_MEM_BASE + IGS_PCI_MEM_BASE,
IGS_PCI_MEM_VSIZE, VM_PROT_READ|VM_PROT_WRITE,
PTE_NOCACHE },
#endif
{ 0, 0, 0, 0, 0 }
};
vaddr_t
initarm(void *arg)
{
int loop;
int loop1;
u_int l1pagetable;
extern char _end[];
ISA_PUTBYTE(0x338, 0x04);
ISA_PUTBYTE(0x338, 0x86);
cn_tab = &kcomcons;
printf("\nNetBSD/netwinder booting ...\n");
if (set_cpufuncs())
panic("CPU not recognized!");
printf("initarm: Configuring system ...\n");
memcpy(&nwbootinfo, (void *)(KERNEL_BASE + 0x100),
sizeof(nwbootinfo));
#ifdef VERBOSE_INIT_ARM
printf("NeTTrom boot info:\n");
printf("\tpage size = 0x%08lx\n", nwbootinfo.bi_pagesize);
printf("\tnpages = %ld (0x%08lx)\n", nwbootinfo.bi_nrpages,
nwbootinfo.bi_nrpages);
printf("\trootdev = 0x%08lx\n", nwbootinfo.bi_rootdev);
printf("\tcmdline = %s\n", nwbootinfo.bi_cmdline);
#endif
if (nwbootinfo.bi_nrpages != 0x02000 &&
nwbootinfo.bi_nrpages != 0x04000 &&
nwbootinfo.bi_nrpages != 0x08000 &&
nwbootinfo.bi_nrpages != 0x10000) {
nwbootinfo.bi_pagesize = 0xdeadbeef;
nwbootinfo.bi_nrpages = 0x01000;
nwbootinfo.bi_rootdev = 0;
}
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = 0;
bootconfig.dram[0].pages = nwbootinfo.bi_nrpages;
physical_start = bootconfig.dram[0].address;
physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
physical_freestart = ((((vaddr_t) _end) + PGOFSET) & ~PGOFSET) -
KERNEL_BASE;
physical_freeend = physical_end;
free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
#ifdef VERBOSE_INIT_ARM
printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
physical_freestart, free_pages, free_pages);
#endif
physmem = (physical_end - physical_start) / PAGE_SIZE;
printf("physmemory: 0x%"PRIxPSIZE" pages at 0x%08lx -> 0x%08lx\n",
physmem, physical_start, physical_end - 1);
#ifdef VERBOSE_INIT_ARM
printf("Allocating page tables\n");
#endif
#define valloc_pages(var, np) \
alloc_pages((var).pv_pa, (np)); \
(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
#define alloc_pages(var, np) \
(var) = physical_freestart; \
physical_freestart += ((np) * PAGE_SIZE);\
free_pages -= (np); \
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
if ((physical_freestart & (L1_TABLE_SIZE - 1)) == 0
&& kernel_l1pt.pv_pa == 0) {
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
} else {
valloc_pages(kernel_pt_table[loop1],
L2_TABLE_SIZE / PAGE_SIZE);
++loop1;
}
}
if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
panic("initarm: Failed to align the kernel page directory");
alloc_pages(systempage.pv_pa, 1);
valloc_pages(irqstack, IRQ_STACK_SIZE);
valloc_pages(abtstack, ABT_STACK_SIZE);
valloc_pages(undstack, UND_STACK_SIZE);
valloc_pages(kernelstack, UPAGES);
#ifdef VERBOSE_INIT_ARM
printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
irqstack.pv_va);
printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
abtstack.pv_va);
printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
undstack.pv_va);
printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
kernelstack.pv_va);
#endif
alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
#ifdef VERBOSE_INIT_ARM
printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
#endif
l1pagetable = kernel_l1pt.pv_pa;
pmap_link_l2pt(l1pagetable, 0x00000000,
&kernel_pt_table[KERNEL_PT_SYS]);
pmap_link_l2pt(l1pagetable, KERNEL_BASE,
&kernel_pt_table[KERNEL_PT_KERNEL]);
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
pmap_curmaxkvaddr =
KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
#ifdef VERBOSE_INIT_ARM
printf("Mapping kernel\n");
#endif
{
extern char etext[];
size_t textsize = (uintptr_t) etext - KERNEL_BASE;
size_t totalsize = (uintptr_t) _end - KERNEL_BASE;
u_int logical;
textsize = (textsize + PGOFSET) & ~PGOFSET;
totalsize = (totalsize + PGOFSET) & ~PGOFSET;
textsize = textsize & ~PGOFSET;
totalsize = (totalsize + PGOFSET) & ~PGOFSET;
logical = 0;
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
physical_start + logical, textsize,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
physical_start + logical, totalsize - textsize,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
}
#ifdef VERBOSE_INIT_ARM
printf("Constructing L2 page tables\n");
#endif
pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
}
pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
loop = 0;
while (l1_sec_table[loop].size) {
vsize_t sz;
#ifdef VERBOSE_INIT_ARM
printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
l1_sec_table[loop].va);
#endif
for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
pmap_map_section(l1pagetable,
l1_sec_table[loop].va + sz,
l1_sec_table[loop].pa + sz,
l1_sec_table[loop].prot,
l1_sec_table[loop].cache);
++loop;
}
#ifdef VERBOSE_INIT_ARM
printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
physical_freestart, free_pages, free_pages);
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
#endif
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
cpu_setttb(kernel_l1pt.pv_pa, true);
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
#ifdef VERBOSE_INIT_ARM
printf("done!\n");
#endif
consinit();
#ifdef VERBOSE_INIT_ARM
printf("bootstrap done.\n");
#endif
arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
printf("init subsystems: stacks ");
set_stackptr(PSR_IRQ32_MODE,
irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_ABT32_MODE,
abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_UND32_MODE,
undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
printf("vectors ");
data_abort_handler_address = (u_int)data_abort_handler;
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
undefined_handler_address = (u_int)undefinedinstruction_bounce;
printf("undefined ");
undefined_init();
printf("page ");
uvm_md_init();
for (loop = 0; loop < bootconfig.dramblocks; loop++) {
paddr_t start = (paddr_t)bootconfig.dram[loop].address;
paddr_t end = start + (bootconfig.dram[loop].pages * PAGE_SIZE);
#if NISADMA > 0
paddr_t istart, isize;
extern struct arm32_dma_range *footbridge_isa_dma_ranges;
extern int footbridge_isa_dma_nranges;
#endif
if (start < physical_freestart)
start = physical_freestart;
if (end > physical_freeend)
end = physical_freeend;
#if 0
printf("%d: %lx -> %lx\n", loop, start, end - 1);
#endif
#if NISADMA > 0
if (arm32_dma_range_intersect(footbridge_isa_dma_ranges,
footbridge_isa_dma_nranges,
start, end - start,
&istart, &isize)) {
#if 0
printf(" ISADMA 0x%lx -> 0x%lx\n", istart,
istart + isize - 1);
#endif
uvm_page_physload(atop(istart),
atop(istart + isize), atop(istart),
atop(istart + isize), VM_FREELIST_ISADMA);
if (start < istart) {
#if 0
printf(" BEFORE 0x%lx -> 0x%lx\n",
start, istart - 1);
#endif
uvm_page_physload(atop(start),
atop(istart), atop(start),
atop(istart), VM_FREELIST_DEFAULT);
}
if ((istart + isize) < end) {
#if 0
printf(" AFTER 0x%lx -> 0x%lx\n",
(istart + isize), end - 1);
#endif
uvm_page_physload(atop(istart + isize),
atop(end), atop(istart + isize),
atop(end), VM_FREELIST_DEFAULT);
}
} else {
uvm_page_physload(atop(start), atop(end),
atop(start), atop(end), VM_FREELIST_DEFAULT);
}
#else
uvm_page_physload(atop(start), atop(end),
atop(start), atop(end), VM_FREELIST_DEFAULT);
#endif
}
printf("pmap ");
pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
cpu_reset_address_paddr = vtophys((vaddr_t)netwinder_reset);
printf("irq ");
footbridge_intr_init();
printf("done.\n");
if (nwbootinfo.bi_pagesize == 0xdeadbeef)
printf("WARNING: NeTTrom boot info corrupt\n");
#ifdef DDB
db_machine_init();
if (boothowto & RB_KDB)
Debugger();
#endif
ISA_PUTBYTE(0x338, 0x06);
return kernelstack.pv_va + USPACE_SVC_STACK_TOP;
}
void
process_kernel_args(char *args)
{
boothowto = 0;
strncpy(bootargs, args, MAX_BOOT_STRING);
args = bootargs;
boot_file = bootargs;
while (*args != ' ' && *args != 0)
++args;
if (*args != 0)
*args++ = 0;
while (*args == ' ')
++args;
boot_args = args;
printf("bootfile: %s\n", boot_file);
printf("bootargs: %s\n", boot_args);
parse_mi_bootargs(boot_args);
}
void
consinit(void)
{
static int consinit_called = 0;
const char *console = CONSDEVNAME;
if (consinit_called != 0)
return;
consinit_called = 1;
#ifdef DIAGNOSTIC
printf("consinit(\"%s\")\n", console);
#endif
#if NISA > 0
isa_footbridge_init(DC21285_PCI_IO_VBASE, DC21285_PCI_ISA_MEM_VBASE);
#endif
if (strncmp(console, "igsfb", 5) == 0) {
#if NIGSFB > 0
int res;
footbridge_pci_bs_tag_init();
footbridge_pci_mem_bs_tag.bs_map = nw_footbridge_mem_bs_map;
footbridge_pci_mem_bs_tag.bs_unmap = nw_footbridge_mem_bs_unmap;
igsfb_pci_cnattach(&footbridge_pci_io_bs_tag,
&footbridge_pci_mem_bs_tag,
&footbridge_pci_chipset,
0, 8, 0);
#if NPCKBC > 0
res = pckbc_cnattach(&isa_io_bs_tag,
IO_KBD, KBCMDP, PCKBC_KBD_SLOT, 0);
if (res)
printf("pckbc_cnattach: %d!\n", res);
#endif
#else
panic("igsfb console not configured");
#endif
} else {
#ifdef DIAGNOSTIC
if (strncmp(console, "com", 3) != 0) {
printf("consinit: unknown CONSDEVNAME=\"%s\","
" falling back to \"com\"\n", console);
}
#endif
#if NCOM > 0
if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
COM_FREQ, COM_TYPE_NORMAL, comcnmode))
panic("can't init serial console @%x", CONCOMADDR);
#else
panic("serial console @%x not configured", CONCOMADDR);
#endif
}
}
#if NIGSFB > 0
static int
nw_footbridge_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, bus_space_handle_t *bshp)
{
bus_addr_t startpa, endpa;
startpa = trunc_page(bpa);
endpa = round_page(bpa + size);
if (startpa >= IGS_PCI_MEM_BASE
&& endpa < (IGS_PCI_MEM_BASE + IGS_PCI_MEM_VSIZE)) {
*bshp = IGS_PCI_MEM_VBASE
+ (bpa - IGS_PCI_MEM_BASE);
#ifdef DEBUG
printf("nw/mem_bs_map: %08x+%08x: %08x..%08x -> %08x\n",
(u_int32_t)bpa, (u_int32_t)size,
(u_int32_t)startpa, (u_int32_t)endpa,
(u_int32_t)*bshp);
#endif
return 0;
}
return (footbridge_mem_bs_map(t, bpa, size, cacheable, bshp));
}
static void
nw_footbridge_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
{
if (bsh >= IGS_PCI_MEM_VBASE
&& bsh < (IGS_PCI_MEM_VBASE + IGS_PCI_MEM_VSIZE)) {
#ifdef DEBUG
printf("nw/bs_unmap: 0x%08x\n", (u_int32_t)bsh);
#endif
return;
}
footbridge_mem_bs_unmap(t, bsh, size);
}
#endif
static bus_space_handle_t kcom_base = (bus_space_handle_t) (DC21285_PCI_IO_VBASE + CONCOMADDR);
#define KCOM_GETBYTE(r) generic_bs_r_1(0, kcom_base, (r))
#define KCOM_PUTBYTE(r,v) generic_bs_w_1(0, kcom_base, (r), (v))
static int
kcomcngetc(dev_t dev)
{
int stat, c;
while (!ISSET(stat = KCOM_GETBYTE(com_lsr), LSR_RXRDY))
;
c = KCOM_GETBYTE(com_data);
stat = KCOM_GETBYTE(com_iir);
return c;
}
static void
kcomcnputc(dev_t dev, int c)
{
int timo;
timo = 150000;
while (!ISSET(KCOM_GETBYTE(com_lsr), LSR_TXRDY) && --timo)
continue;
KCOM_PUTBYTE(com_data, c);
timo = 1500000;
while (!ISSET(KCOM_GETBYTE(com_lsr), LSR_TXRDY) && --timo)
continue;
}
static void
kcomcnpollc(dev_t dev, int on)
{
}
struct consdev kcomcons = {
NULL, NULL, kcomcngetc, kcomcnputc, kcomcnpollc, NULL,
NULL, NULL, NODEV, CN_NORMAL
};