#ifndef _DEV_IC_CS89X0VAR_H_
#define _DEV_IC_CS89X0VAR_H_
#include <sys/rndsource.h>
struct cs_softc {
device_t sc_dev;
struct ethercom sc_ethercom;
struct ifmedia sc_media;
void *sc_ih;
bus_space_tag_t sc_iot;
bus_space_tag_t sc_memt;
bus_space_handle_t sc_ioh;
bus_space_handle_t sc_memh;
#if 0
isa_chipset_tag_t sc_ic;
#endif
int sc_irq;
int sc_prodid;
int sc_prodrev;
bus_addr_t sc_pktpgaddr;
int sc_cfgflags;
int sc_memorymode;
int sc_txbusy;
int sc_resetting;
int sc_xe_ent;
int sc_xe_togo;
int sc_carrier;
u_int8_t sc_enaddr[ETHER_ADDR_LEN];
int eeprom_size;
u_int16_t *eeprom_data;
krndsource_t rnd_source;
int (*sc_enable)(struct cs_softc *);
void (*sc_disable)(struct cs_softc *);
void (*sc_dma_process_rx)(struct cs_softc *);
void (*sc_dma_chipinit)(struct cs_softc *);
void (*sc_dma_attach)(struct cs_softc *);
u_int8_t (*sc_io_read_1)(struct cs_softc *, bus_size_t);
u_int16_t (*sc_io_read_2)(struct cs_softc *, bus_size_t);
void (*sc_io_read_multi_2)(struct cs_softc *, bus_size_t, u_int16_t *,
bus_size_t);
void (*sc_io_write_2)(struct cs_softc *, bus_size_t, u_int16_t);
void (*sc_io_write_multi_2)(struct cs_softc *, bus_size_t,
const u_int16_t *, bus_size_t);
u_int16_t (*sc_mem_read_2)(struct cs_softc *, bus_size_t);
void (*sc_mem_write_2)(struct cs_softc *, bus_size_t, u_int16_t);
void (*sc_mem_write_region_2)(struct cs_softc *, bus_size_t,
const u_int16_t *, bus_size_t);
};
#define IO_READ_1(sc, a) \
(sc)->sc_io_read_1 ? \
(sc)->sc_io_read_1((sc), (a)) : \
bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (a))
#define IO_READ_2(sc, a) \
(sc)->sc_io_read_2 ? \
(sc)->sc_io_read_2((sc), (a)) : \
bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (a))
#define IO_READ_MULTI_2(sc, a, b, c) \
if ((sc)->sc_io_read_multi_2) \
(sc)->sc_io_read_multi_2((sc), (a), (b), (c)); else \
bus_space_read_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (b), (c))
#define IO_WRITE_2(sc, a, d) \
if ((sc)->sc_io_write_2) \
(sc)->sc_io_write_2((sc), (a), (d)); else \
bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d))
#define IO_WRITE_MULTI_2(sc, a, d, c) \
if ((sc)->sc_io_write_multi_2) \
(sc)->sc_io_write_multi_2((sc), (a), (d), (c)); else \
bus_space_write_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d), (c))
#define MEM_READ_2(sc, a) \
(sc)->sc_mem_read_2 ? \
(sc)->sc_mem_read_2((sc), (a)) : \
bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (a))
#define MEM_WRITE_2(sc, a, d) \
if ((sc)->sc_mem_write_2) \
(sc)->sc_mem_write_2((sc), (a), (d)); else \
bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (a), (d))
#define MEM_WRITE_REGION_2(sc, a, d, c) \
if ((sc)->sc_mem_write_region_2) \
(sc)->sc_mem_write_region_2((sc), (a), (d), (c)); else \
bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (a), (d), (c))
#define CFGFLG_MEM_MODE 0x0001
#define CFGFLG_USE_SA 0x0002
#define CFGFLG_IOCHRDY 0x0004
#define CFGFLG_DCDC_POL 0x0008
#define CFGFLG_DMA_MODE 0x0020
#define CFGFLG_ATTACHED 0x0040
#define CFGFLG_CARDBUS_HACK 0x0080
#define CFGFLG_ENABLED 0x0100
#define CFGFLG_PARSE_EEPROM 0x0200
#define CFGFLG_NOT_EEPROM 0x8000
static __inline u_int16_t _cs_read_port(struct cs_softc *, int);
static __inline u_int16_t
_cs_read_port(struct cs_softc *sc, int off)
{
u_int16_t result;
if (sc->sc_cfgflags & CFGFLG_CARDBUS_HACK) {
result = (IO_READ_1(sc, off) & 0xff);
result |= ((IO_READ_1(sc, off+1) & 0xff) << 8);
}
else {
result = IO_READ_2(sc, off);
}
return result;
}
static __inline u_int16_t _CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
static __inline u_int16_t
_CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
{
IO_WRITE_2(sc, PORT_PKTPG_PTR, offset);
return (_cs_read_port(sc, PORT_PKTPG_DATA));
}
static __inline u_int16_t CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
static __inline u_int16_t
CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
{
IO_WRITE_2(sc, PORT_PKTPG_PTR, offset);
return (IO_READ_2(sc, PORT_PKTPG_DATA));
}
#define CS_READ_PACKET_PAGE_MEM(sc, offset) \
MEM_READ_2((sc), (offset))
#define CS_READ_PACKET_PAGE(sc, offset) \
((sc)->sc_memorymode ? CS_READ_PACKET_PAGE_MEM((sc), (offset)) :\
_CS_READ_PACKET_PAGE_IO((sc), (offset)))
#define CS_WRITE_PACKET_PAGE_IO(sc, offset, val) \
do { \
IO_WRITE_2((sc), PORT_PKTPG_PTR, (offset)); \
IO_WRITE_2((sc), PORT_PKTPG_DATA, (val)); \
} while (0)
#define CS_WRITE_PACKET_PAGE_MEM(sc, offset, val) \
MEM_WRITE_2((sc), (offset), (val))
#define CS_WRITE_PACKET_PAGE(sc, offset, val) \
do { \
if ((sc)->sc_memorymode) \
CS_WRITE_PACKET_PAGE_MEM((sc), (offset), (val)); \
else \
CS_WRITE_PACKET_PAGE_IO((sc), (offset), (val)); \
} while (0)
#define CS_READ_PORT(sc, off)\
IO_READ_2((sc), (off))
#define CS_WRITE_PORT(sc, off, val)\
IO_WRITE_2((sc), (off), (val))
#define CS_ERROR -1
#define CS_OK 1
#define MEDIA_AUI 0x0001
#define MEDIA_10BASE2 0x0002
#define MEDIA_10BASET 0x0003
#define MAXLOOP 0x8888
int cs_attach(struct cs_softc *, u_int8_t *, int *, int, int);
int cs_detach(struct cs_softc *);
int cs_verify_eeprom(struct cs_softc *);
int cs_read_eeprom(struct cs_softc *, int, u_int16_t *);
int cs_intr(void *);
int cs_activate(device_t, enum devact);
void cs_ether_input(struct cs_softc *, struct mbuf *);
void cs_print_rx_errors(struct cs_softc *, u_int16_t);
int cs_init(struct ifnet *);
#define CS_IS_ENABLED(sc) ((sc)->sc_cfgflags & CFGFLG_ENABLED)
#endif