#ifndef _M68K_BUS_SPACE_SIMPLE_H_
#define _M68K_BUS_SPACE_SIMPLE_H_
typedef u_long bus_addr_t;
typedef u_long bus_size_t;
#define PRIxBUSADDR "lx"
#define PRIxBUSSIZE "lx"
#define PRIuBUSSIZE "lu"
struct m68k_simple_bus_space_tag;
typedef struct m68k_simple_bus_space_tag *bus_space_tag_t;
typedef u_long bus_space_handle_t;
#define PRIxBSH "lx"
struct m68k_simple_bus_space_tag {
void *bs_cookie;
int (*bs_map)(void *, bus_addr_t, bus_size_t,
int, bus_space_handle_t *);
void (*bs_unmap)(void *, bus_space_handle_t, bus_size_t);
paddr_t (*bs_mmap)(void *, bus_addr_t addr, off_t, int, int);
int (*bs_peek_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t *);
int (*bs_peek_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t *);
int (*bs_peek_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t *);
#if 0
int (*bs_peek_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t *);
#endif
int (*bs_poke_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t);
int (*bs_poke_2)(void *, bus_space_handle_t,
bus_size_t, uint16_t);
int (*bs_poke_4)(void *, bus_space_handle_t,
bus_size_t, uint32_t);
#if 0
int (*bs_poke_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t);
#endif
};
#define bus_space_map(tag, offset, size, flags, handlep) \
(*((tag)->bs_map))((tag)->bs_cookie, (offset), (size), (flags), (handlep))
#define BUS_SPACE_MAP_CACHEABLE 0x01
#define BUS_SPACE_MAP_LINEAR 0x02
#define BUS_SPACE_MAP_PREFETCHABLE 0x04
#define bus_space_unmap(tag, handle, size) \
(*((tag)->bs_unmap))((tag)->bs_cookie, (handle), (size))
#define bus_space_mmap(tag, addr, offset, prot, flags) \
(*((tag)->bs_mmap))((tag)->bs_cookie, (addr), (offset), (prot), (flags))
#define bus_space_subregion(t, h, o, s, hp) \
((*(hp)=(h)+(o)), 0)
#define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
(-1)
#define bus_space_free(t, h, s)
#define bus_space_peek_1(t, h, o, vp) \
(*((t)->bs_peek_1))((t)->bs_cookie, (h), (o), (vp))
#define bus_space_peek_2(t, h, o, vp) \
(*((t)->bs_peek_2))((t)->bs_cookie, (h), (o), (vp))
#define bus_space_peek_4(t, h, o, vp) \
(*((t)->bs_peek_4))((t)->bs_cookie, (h), (o), (vp))
#define bus_space_poke_1(t, h, o, v) \
(*((t)->bs_poke_1))((t)->bs_cookie, (h), (o), (v))
#define bus_space_poke_2(t, h, o, v) \
(*((t)->bs_poke_2))((t)->bs_cookie, (h), (o), (v))
#define bus_space_poke_4(t, h, o, v) \
(*((t)->bs_poke_4))((t)->bs_cookie, (h), (o), (v))
static inline uint8_t
bus_space_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
(void) t;
return *(volatile uint8_t *)((intptr_t)(h + o));
}
static inline uint16_t
bus_space_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
(void) t;
return *(volatile uint16_t *)((intptr_t)(h + o));
}
static inline uint32_t
bus_space_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
{
(void) t;
return *(volatile uint32_t *)((intptr_t)(h + o));
}
#define bus_space_read_multi_1(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movb %%a0@,%%a1@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0","memory"); \
} while (0);
#define bus_space_read_multi_2(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movw %%a0@,%%a1@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0","memory"); \
} while (0);
#define bus_space_read_multi_4(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movl %%a0@,%%a1@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0","memory"); \
} while (0);
#define bus_space_read_region_1(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movb %%a0@+,%%a1@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0","memory"); \
} while (0);
#define bus_space_read_region_2(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movw %%a0@+,%%a1@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0","memory"); \
} while (0);
#define bus_space_read_region_4(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movl %%a0@+,%%a1@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0","memory"); \
} while (0);
#define bus_space_write_1(t,h,o,v) \
do { \
(void) t; \
*((volatile uint8_t *)(intptr_t)((h) + (o))) = (v); \
} while (0)
#define bus_space_write_2(t,h,o,v) \
do { \
(void) t; \
*((volatile uint16_t *)(intptr_t)((h) + (o))) = (v); \
} while (0)
#define bus_space_write_4(t,h,o,v) \
do { \
(void) t; \
*((volatile uint32_t *)(intptr_t)((h) + (o))) = (v); \
} while (0)
#define bus_space_write_multi_1(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movb %%a1@+,%%a0@ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0"); \
} while (0);
#define bus_space_write_multi_2(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movw %%a1@+,%%a0@ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0"); \
} while (0);
#define bus_space_write_multi_4(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movl %%a1@+,%%a0@ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0"); \
} while (0);
#define bus_space_write_region_1(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movb %%a1@+,%%a0@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0"); \
} while (0);
#define bus_space_write_region_2(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movw %%a1@+,%%a0@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0"); \
} while (0);
#define bus_space_write_region_4(t, h, o, a, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%a1 ; \
movl %2,%%d0 ; \
1: movl %%a1@+,%%a0@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (a), "g" (c) : \
"a0","a1","d0"); \
} while (0);
#define bus_space_set_multi_1(t, h, o, val, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%d1 ; \
movl %2,%%d0 ; \
1: movb %%d1,%%a0@ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (val), "g" (c) : \
"a0","d0","d1"); \
} while (0);
#define bus_space_set_multi_2(t, h, o, val, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%d1 ; \
movl %2,%%d0 ; \
1: movw %%d1,%%a0@ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (val), "g" (c) : \
"a0","d0","d1"); \
} while (0);
#define bus_space_set_multi_4(t, h, o, val, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%d1 ; \
movl %2,%%d0 ; \
1: movl %%d1,%%a0@ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (val), "g" (c) : \
"a0","d0","d1"); \
} while (0);
#define bus_space_set_region_1(t, h, o, val, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%d1 ; \
movl %2,%%d0 ; \
1: movb %%d1,%%a0@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (val), "g" (c) : \
"a0","d0","d1"); \
} while (0);
#define bus_space_set_region_2(t, h, o, val, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%d1 ; \
movl %2,%%d0 ; \
1: movw %%d1,%%a0@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (val), "g" (c) : \
"a0","d0","d1"); \
} while (0);
#define bus_space_set_region_4(t, h, o, val, c) do { \
(void) t; \
__asm volatile (" \
movl %0,%%a0 ; \
movl %1,%%d1 ; \
movl %2,%%d0 ; \
1: movl d1,%%a0@+ ; \
subql #1,%%d0 ; \
jne 1b" : \
: \
"r" ((h) + (o)), "g" (val), "g" (c) : \
"a0","d0","d1"); \
} while (0);
#define __M68K_SIMPLE_copy_region_N(BYTES) \
static inline void __CONCAT(bus_space_copy_region_,BYTES) \
(bus_space_tag_t, \
bus_space_handle_t bsh1, bus_size_t off1, \
bus_space_handle_t bsh2, bus_size_t off2, \
bus_size_t count); \
\
static inline void \
__CONCAT(bus_space_copy_region_,BYTES)( \
bus_space_tag_t t, \
bus_space_handle_t h1, \
bus_size_t o1, \
bus_space_handle_t h2, \
bus_size_t o2, \
bus_size_t c) \
{ \
bus_size_t o; \
(void) t; \
\
if ((h1 + o1) >= (h2 + o2)) { \
\
for (o = 0; c != 0; c--, o += BYTES) \
__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
__CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
} else { \
\
for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
__CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
} \
}
__M68K_SIMPLE_copy_region_N(1)
__M68K_SIMPLE_copy_region_N(2)
__M68K_SIMPLE_copy_region_N(4)
#undef __M68K_SIMPLE_copy_region_N
#define bus_space_barrier(t, h, o, l, f) \
((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
#define BUS_SPACE_BARRIER_READ 0x01
#define BUS_SPACE_BARRIER_WRITE 0x02
#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
#ifdef _M68K_BUS_SPACE_PRIVATE
extern struct m68k_simple_bus_space_tag m68k_simple_bus_space;
extern int _bus_space_map(void *, bus_addr_t, bus_size_t,
int, bus_space_handle_t *);
extern void _bus_space_unmap(void *, bus_space_handle_t, bus_size_t);
extern paddr_t _bus_space_mmap(void *, bus_addr_t, off_t, int, int);
extern int _bus_space_peek_1(void *, bus_space_handle_t,
bus_size_t, uint8_t *);
extern int _bus_space_peek_2(void *, bus_space_handle_t,
bus_size_t, uint16_t *);
extern int _bus_space_peek_4(void *, bus_space_handle_t,
bus_size_t, uint32_t *);
extern int _bus_space_poke_1(void *, bus_space_handle_t, bus_size_t, uint8_t);
extern int _bus_space_poke_2(void *, bus_space_handle_t, bus_size_t, uint16_t);
extern int _bus_space_poke_4(void *, bus_space_handle_t, bus_size_t, uint32_t);
#endif
#endif