arch/alpha/include/asm/io.h
152
REMAP1(u32, readl, const volatile)
arch/alpha/include/asm/io.h
243
extern u32 readl(const volatile void __iomem *addr);
arch/alpha/include/asm/io.h
251
#define readl readl
arch/alpha/include/asm/io.h
492
return IO_CONCAT(__IO_PREFIX,readl)(addr);
arch/alpha/include/asm/io_trivial.h
116
IO_CONCAT(__IO_PREFIX,readl)(const volatile void __iomem *a)
arch/alpha/kernel/io.c
135
return IO_CONCAT(__IO_PREFIX,readl)(addr);
arch/alpha/kernel/io.c
234
EXPORT_SYMBOL(readl);
arch/arc/plat-hsdk/platform.c
231
reg = readl(CREG_AXI_M_HS_CORE_BOOT) & (~0x3);
arch/arm/include/asm/cachetype.h
105
return readl(BASEADDR_V7M_SCB + V7M_SCB_CCSIDR);
arch/arm/include/asm/cachetype.h
110
return readl(BASEADDR_V7M_SCB + V7M_SCB_CLIDR);
arch/arm/include/asm/cputype.h
159
return readl(BASEADDR_V7M_SCB + offset);
arch/arm/include/asm/cputype.h
203
return readl(BASEADDR_V7M_SCB + V7M_SCB_CPUID);
arch/arm/include/asm/cputype.h
208
return readl(BASEADDR_V7M_SCB + V7M_SCB_CTR);
arch/arm/include/asm/cputype.h
213
return readl(BASEADDR_V7M_SCB + MPU_TYPE);
arch/arm/include/asm/io.h
273
#ifndef readl
arch/arm/mach-alpine/alpine_cpu_pm.c
57
watermark = readl(&al_cpu_resume_regs->watermark);
arch/arm/mach-at91/pm.c
269
val = readl(soc_pm.data.shdwc + 0x04);
arch/arm/mach-at91/pm.c
309
val = readl(shdwc + 0x0c);
arch/arm/mach-at91/pm.c
505
scsr = readl(soc_pm.data.pmc + AT91_PMC_SCSR);
arch/arm/mach-at91/pm.c
519
css = readl(soc_pm.data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
arch/arm/mach-at91/pm.c
569
tmp = readl(soc_pm.data.ramc_phy + DDR3PHY_ZQ0SR0);
arch/arm/mach-at91/pm.c
628
val = readl(soc_pm.data.sfrbu + offset);
arch/arm/mach-at91/pm.c
653
readl(soc_pm.data.shdwc + 0x08);
arch/arm/mach-at91/pm.c
851
pwrtmg = readl(soc_pm.data.ramc[0] + UDDRC_PWRCTL);
arch/arm/mach-at91/pm.c
852
ratio = readl(soc_pm.data.pmc + AT91_PMC_RATIO);
arch/arm/mach-axxia/platsmp.c
46
tmp = readl(syscon + SC_RST_CPU_HOLD);
arch/arm/mach-bcm/board_bcm281xx.c
38
val = readl(base + SECWDOG_OFFSET);
arch/arm/mach-bcm/platsmp-brcmstb.c
91
writel((readl(base) & mask) | val, base);
arch/arm/mach-bcm/platsmp-brcmstb.c
97
writel((readl(base) & mask) & ~val, base);
arch/arm/mach-berlin/platsmp.c
111
val = readl(cpu_ctrl + CPU_RESET_NON_SC);
arch/arm/mach-berlin/platsmp.c
37
val = readl(cpu_ctrl + CPU_RESET_NON_SC);
arch/arm/mach-clps711x/board-dt.c
48
id[0] = readl(CLPS711X_VIRT_BASE + UNIQID);
arch/arm/mach-clps711x/board-dt.c
49
id[1] = readl(CLPS711X_VIRT_BASE + RANDID0);
arch/arm/mach-clps711x/board-dt.c
50
id[2] = readl(CLPS711X_VIRT_BASE + RANDID1);
arch/arm/mach-clps711x/board-dt.c
51
id[3] = readl(CLPS711X_VIRT_BASE + RANDID2);
arch/arm/mach-clps711x/board-dt.c
52
id[4] = readl(CLPS711X_VIRT_BASE + RANDID3);
arch/arm/mach-clps711x/board-dt.c
53
system_rev = SYSFLG1_VERID(readl(CLPS711X_VIRT_BASE + SYSFLG1));
arch/arm/mach-dove/mpp.c
121
u32 mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
arch/arm/mach-dove/mpp.c
60
readl(DOVE_MPP_CTRL4_VIRT_BASE));
arch/arm/mach-dove/mpp.c
63
readl(DOVE_PMU_MPP_GENERAL_CTRL));
arch/arm/mach-dove/mpp.c
65
pr_debug("MPP_GENERAL: %08x\n", readl(DOVE_MPP_GENERAL_VIRT_BASE));
arch/arm/mach-dove/mpp.c
70
u32 mpp_gen_cfg = readl(DOVE_MPP_GENERAL_VIRT_BASE);
arch/arm/mach-dove/mpp.c
81
u32 mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
arch/arm/mach-dove/mpp.c
82
u32 ssp_ctrl1 = readl(DOVE_SSP_CTRL_STATUS_1);
arch/arm/mach-dove/mpp.c
83
u32 mpp_gen_ctrl = readl(DOVE_MPP_GENERAL_VIRT_BASE);
arch/arm/mach-dove/mpp.c
84
u32 global_cfg_2 = readl(DOVE_GLOBAL_CONFIG_2);
arch/arm/mach-footbridge/common.c
38
u32 mask = readl(irqstatus);
arch/arm/mach-highbank/highbank.c
99
val = readl(sregs_base + reg);
arch/arm/mach-imx/cpu-imx25.c
28
rev = readl(iim_base + MXC_IIMSREV);
arch/arm/mach-imx/cpu-imx5.c
34
srev = readl(iim_base + IIM_SREV) & 0xff;
arch/arm/mach-imx/mmdc.c
214
return readl(reg);
arch/arm/mach-imx/src.c
72
while (readl(src_base + SRC_SCR) & bit) {
arch/arm/mach-lpc32xx/serial.c
84
tmp = readl(LPC32XX_UARTCTL_CLOOP);
arch/arm/mach-meson/platsmp.c
139
while (readl(sram_base + MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(cpu))) {
arch/arm/mach-meson/platsmp.c
47
u32 val = readl(sram_base + MESON_SMP_SRAM_CPU_CTRL_REG);
arch/arm/mach-mv78xx0/common.c
110
switch ((readl(SAMPLE_AT_RESET_HIGH) >> 6) & 7) {
arch/arm/mach-mv78xx0/common.c
119
readl(SAMPLE_AT_RESET_HIGH));
arch/arm/mach-mv78xx0/common.c
402
return !!(readl(CPU_CONTROL) & L2_WRITETHROUGH);
arch/arm/mach-mv78xx0/common.c
52
switch ((readl(SAMPLE_AT_RESET_LOW) >> 5) & 7) {
arch/arm/mach-mv78xx0/common.c
70
readl(SAMPLE_AT_RESET_LOW));
arch/arm/mach-mv78xx0/common.c
85
cfg = (readl(SAMPLE_AT_RESET_LOW) >> 8) & 0x3f;
arch/arm/mach-mv78xx0/common.c
87
cfg = (readl(SAMPLE_AT_RESET_LOW) >> 14) & 0x3f;
arch/arm/mach-mvebu/coherency.c
86
reg = readl(cpu_config_base);
arch/arm/mach-mvebu/cpu-reset.c
34
reg = readl(cpu_reset_base + CPU_RESET_OFFSET(cpu));
arch/arm/mach-mvebu/kirkwood-pm.c
22
mem_pm_ctrl = readl(memory_pm_ctrl);
arch/arm/mach-mvebu/kirkwood.c
123
reg = readl(io + MV643XX_ETH_MAC_ADDR_HIGH);
arch/arm/mach-mvebu/kirkwood.c
129
reg = readl(io + MV643XX_ETH_MAC_ADDR_LOW);
arch/arm/mach-mvebu/kirkwood.c
155
writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config);
arch/arm/mach-mvebu/mvebu-soc-id.c
102
soc_rev = readl(pci_base + PCIE_DEV_REV_OFF) & SOC_REV_MASK;
arch/arm/mach-mvebu/mvebu-soc-id.c
99
soc_dev_id = readl(pci_base + PCIE_DEV_ID_OFF) >> 16;
arch/arm/mach-mvebu/pm-board.c
32
reg = readl(gpio_ctrl);
arch/arm/mach-mvebu/pm-board.c
39
ackcmd = readl(gpio_ctrl);
arch/arm/mach-mvebu/pm.c
50
reg = readl(sdram_ctrl + SDRAM_DLB_EVICTION_OFFS);
arch/arm/mach-mvebu/pm.c
57
reg = readl(sdram_ctrl + SDRAM_CONFIG_OFFS);
arch/arm/mach-mvebu/pm.c
63
srcmd = readl(sdram_ctrl + SDRAM_OPERATION_OFFS);
arch/arm/mach-mvebu/pmsu.c
212
reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL);
arch/arm/mach-mvebu/pmsu.c
237
reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
arch/arm/mach-mvebu/pmsu.c
246
reg = readl(pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
arch/arm/mach-mvebu/pmsu.c
257
reg = readl(pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu));
arch/arm/mach-mvebu/pmsu.c
347
reg = readl(pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
arch/arm/mach-mvebu/pmsu.c
352
reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
arch/arm/mach-mvebu/pmsu.c
450
reg = readl(mpsoc_base + MPCORE_RESET_CTL);
arch/arm/mach-mvebu/pmsu.c
457
reg = readl(pmsu_mp_base + PMSU_POWERDOWN_DELAY);
arch/arm/mach-mvebu/pmsu.c
544
reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(cpu));
arch/arm/mach-mvebu/pmsu.c
551
reg = readl(pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(cpu));
arch/arm/mach-mvebu/pmsu.c
562
reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(cpu));
arch/arm/mach-mvebu/pmsu.c
576
reg = readl(pmsu_mp_base + PMSU_EVENT_STATUS_AND_MASK(hwcpu));
arch/arm/mach-mvebu/pmsu.c
581
reg = readl(pmsu_mp_base + PMSU_EVENT_STATUS_AND_MASK(hwcpu));
arch/arm/mach-mvebu/pmsu.c
592
reg = readl(pmsu_mp_base + PMSU_EVENT_STATUS_AND_MASK(hwcpu));
arch/arm/mach-mvebu/pmsu.c
602
reg = readl(pmsu_mp_base + PMSU_EVENT_STATUS_AND_MASK(hwcpu));
arch/arm/mach-mvebu/system-controller.c
118
*dev = readl(system_controller_base + mvebu_sc->dev_id) >> 16;
arch/arm/mach-mvebu/system-controller.c
119
*rev = (readl(system_controller_base + mvebu_sc->rev_id) >> 8)
arch/arm/mach-mxs/mach-mxs.c
291
chipid = readl(digctl_base + HW_DIGCTL_CHIPID);
arch/arm/mach-omap1/time.c
114
writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl);
arch/arm/mach-omap1/time.c
77
return readl(&timer->read_tim);
arch/arm/mach-omap1/time.c
84
writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl);
arch/arm/mach-omap1/time.c
91
writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl);
arch/arm/mach-orion5x/board-mss2.c
73
reg = readl(RSTOUTn_MASK);
arch/arm/mach-orion5x/board-mss2.c
77
reg = readl(CPU_SOFT_RESET);
arch/arm/mach-orion5x/common.c
253
(readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
arch/arm/mach-orion5x/common.h
89
#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
arch/arm/mach-orion5x/common.h
90
#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
arch/arm/mach-orion5x/dns323-setup.c
574
reg = readl(ETH_SMI_REG);
arch/arm/mach-orion5x/dns323-setup.c
586
reg = readl(ETH_SMI_REG);
arch/arm/mach-orion5x/kurobox_pro-setup.c
191
while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) {
arch/arm/mach-orion5x/kurobox_pro-setup.c
199
buf[i] = readl(UART1_REG(RX));
arch/arm/mach-orion5x/kurobox_pro-setup.c
211
while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE))
arch/arm/mach-orion5x/pci.c
269
u32 conf = readl(PCI_P2P_CONF);
arch/arm/mach-orion5x/pci.c
283
*val = readl(PCI_CONF_DATA);
arch/arm/mach-orion5x/pci.c
371
u32 p2p = readl(PCI_P2P_CONF);
arch/arm/mach-orion5x/pci.c
373
if (readl(PCI_MODE) & PCI_MODE_PCIX) {
arch/arm/mach-orion5x/terastation_pro2-setup.c
169
while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) {
arch/arm/mach-orion5x/terastation_pro2-setup.c
177
buf[i] = readl(UART1_REG(RX));
arch/arm/mach-orion5x/terastation_pro2-setup.c
189
while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE))
arch/arm/mach-orion5x/ts78xx-setup.c
411
ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
arch/arm/mach-orion5x/ts78xx-setup.c
431
fpga_id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
arch/arm/mach-pxa/gumstix.c
138
if (!(readl(OSCC) & OSCC_OOK))
arch/arm/mach-pxa/gumstix.c
143
writel(readl(OSCC) | OSCC_OON, OSCC);
arch/arm/mach-pxa/gumstix.c
145
if (readl(OSCC) & OSCC_OOK)
arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c
28
writel(readl(S3C64XX_OTHERS) | S3C64XX_OTHERS_USBMASK, S3C64XX_OTHERS);
arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c
31
phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK;
arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c
54
writel((readl(S3C_PHYPWR) & ~S3C_PHYPWR_NORMAL_MASK), S3C_PHYPWR);
arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c
68
writel((readl(S3C_PHYPWR) | S3C_PHYPWR_ANALOG_POWERDOWN |
arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c
71
writel(readl(S3C64XX_OTHERS) & ~S3C64XX_OTHERS_USBMASK, S3C64XX_OTHERS);
arch/arm/mach-shmobile/platsmp-apmu.c
199
x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS);
arch/arm/mach-shmobile/platsmp-scu.c
67
if ((readl(shmobile_scu_base + 8) & mask) == mask)
arch/arm/mach-shmobile/smp-sh73a0.c
37
if (((readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3)
arch/arm/mach-socfpga/ocram.c
67
u32 value = readl(ioaddr);
arch/arm/mach-socfpga/ocram.c
75
u32 value = readl(ioaddr);
arch/arm/mach-socfpga/ocram.c
83
u32 value = readl(ioaddr);
arch/arm/mach-socfpga/socfpga.c
72
temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
arch/arm/mach-socfpga/socfpga.c
85
temp = readl(rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL);
arch/arm/mach-spear/pl080.c
44
val = readl(DMA_CHN_CFG);
arch/arm/mach-sunxi/mc_smp.c
121
reg = readl(prcm_base + PRCM_PWR_SWITCH_REG(cluster, cpu));
arch/arm/mach-sunxi/mc_smp.c
171
reg = readl(prcm_base + PRCM_CPU_PO_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
177
reg = readl(r_cpucfg_base +
arch/arm/mach-sunxi/mc_smp.c
187
reg = readl(cpucfg_base + CPUCFG_CX_CTRL_REG0(cluster));
arch/arm/mach-sunxi/mc_smp.c
193
reg = readl(cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
215
reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
arch/arm/mach-sunxi/mc_smp.c
227
reg = readl(prcm_base + PRCM_CPU_PO_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
232
reg = readl(r_cpucfg_base +
arch/arm/mach-sunxi/mc_smp.c
241
reg = readl(cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
263
reg = readl(cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
270
reg = readl(cpucfg_base + CPUCFG_CX_CTRL_REG1(cluster));
arch/arm/mach-sunxi/mc_smp.c
275
reg = readl(prcm_base + PRCM_CPU_PO_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
281
reg = readl(r_cpucfg_base +
arch/arm/mach-sunxi/mc_smp.c
290
reg = readl(cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
306
reg = readl(cpucfg_base + CPUCFG_CX_CTRL_REG0(cluster));
arch/arm/mach-sunxi/mc_smp.c
318
reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
arch/arm/mach-sunxi/mc_smp.c
327
reg = readl(cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
334
reg = readl(cpucfg_base + CPUCFG_CX_CTRL_REG1(cluster));
arch/arm/mach-sunxi/mc_smp.c
438
reg = readl(cpucfg_base + CPUCFG_CX_CTRL_REG1(cluster));
arch/arm/mach-sunxi/mc_smp.c
493
reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
arch/arm/mach-sunxi/mc_smp.c
514
reg = readl(cpucfg_base + CPUCFG_CX_RST_CTRL(cluster));
arch/arm/mach-sunxi/mc_smp.c
522
reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
arch/arm/mach-sunxi/mc_smp.c
567
reg = readl(cpucfg_base + CPUCFG_CX_STATUS(cluster));
arch/arm/mach-sunxi/platsmp.c
103
reg = readl(prcm_membase + PRCM_CPU_PWROFF_REG);
arch/arm/mach-sunxi/platsmp.c
111
reg = readl(cpucfg_membase + CPUCFG_DBG_CTL1_REG);
arch/arm/mach-sunxi/platsmp.c
174
reg = readl(cpucfg_membase + CPUCFG_GEN_CTRL_REG);
arch/arm/mach-sunxi/platsmp.c
178
reg = readl(prcm_membase + PRCM_CPU_PWROFF_REG);
arch/arm/mach-sunxi/platsmp.c
90
reg = readl(cpucfg_membase + CPUCFG_GEN_CTRL_REG);
arch/arm/mach-sunxi/platsmp.c
94
reg = readl(cpucfg_membase + CPUCFG_DBG_CTL1_REG);
arch/arm/mach-tegra/reset.c
44
reg = readl(evp_cpu_reset);
arch/arm/mach-tegra/reset.c
50
reg = readl(sb_ctrl);
arch/arm/mach-ux500/pm.c
115
it = readl(PRCM_ARMITVAL31TO0 + i * 4);
arch/arm/mach-ux500/pm.c
116
im = readl(PRCM_ARMITMSK31TO0 + i * 4);
arch/arm/mach-ux500/pm.c
132
return readl(PRCM_ARM_WFI_STANDBY) &
arch/arm/mach-ux500/pm.c
47
u32 val = readl(PRCM_A9_MASK_REQ);
arch/arm/mach-ux500/pm.c
54
readl(PRCM_A9_MASK_REQ);
arch/arm/mach-ux500/pm.c
65
u32 val = readl(PRCM_A9_MASK_REQ);
arch/arm/mach-versatile/integrator.c
39
return readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
arch/arm/mach-versatile/integrator.c
53
val = readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET) & ~mask;
arch/arm/mach-versatile/integrator_ap.c
68
ic_irq_enable = readl(VA_IC_BASE + IRQ_ENABLE);
arch/arm/mach-versatile/integrator_cp.c
69
unsigned int status = readl(__io_address(0xca000000 + 4));
arch/arm/mach-versatile/spc.c
362
*data = readl(info->baseaddr + SYSCFG_RDATA);
arch/arm/mach-versatile/versatile.c
115
val = readl(__io_address(VERSATILE_SCTL_BASE));
arch/arm/mach-versatile/versatile.c
134
val = readl(versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET);
arch/arm/mach-versatile/versatile.c
66
return readl(versatile_sys_base + VERSATILE_SYS_MCI_OFFSET) & mask;
arch/arm/mach-vt8500/vt8500.c
120
writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
arch/arm/mach-vt8500/vt8500.c
88
writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
arch/arm/mach-zynq/common.c
86
revision = readl(zynq_devcfg_base + ZYNQ_DEVCFG_MCTRL);
arch/arm/mach-zynq/pm.c
67
reg = readl(ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS);
arch/arm/mach-zynq/slcr.c
160
state = readl(zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET);
arch/arm/mach-zynq/slcr.c
178
state = readl(zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET);
arch/arm/mm/cache-feroceon-l2.c
380
writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base);
arch/arm/mm/cache-feroceon-l2.c
382
writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base);
arch/arm/mm/cache-uniphier.c
400
u32 revision = readl(data->rev_base + UNIPHIER_SSCID);
arch/arm/plat-orion/gpio.c
101
u = readl(GPIO_IO_CONF(ochip));
arch/arm/plat-orion/gpio.c
113
u = readl(GPIO_OUT(ochip));
arch/arm/plat-orion/gpio.c
126
u = readl(GPIO_BLINK_EN(ochip));
arch/arm/plat-orion/gpio.c
187
if (readl(GPIO_IO_CONF(ochip)) & (1 << pin)) {
arch/arm/plat-orion/gpio.c
188
val = readl(GPIO_DATA_IN(ochip)) ^ readl(GPIO_IN_POL(ochip));
arch/arm/plat-orion/gpio.c
190
val = readl(GPIO_OUT(ochip));
arch/arm/plat-orion/gpio.c
364
u = readl(GPIO_IO_CONF(ochip)) & (1 << pin);
arch/arm/plat-orion/gpio.c
382
u = readl(GPIO_IN_POL(ochip));
arch/arm/plat-orion/gpio.c
386
u = readl(GPIO_IN_POL(ochip));
arch/arm/plat-orion/gpio.c
392
v = readl(GPIO_IN_POL(ochip)) ^ readl(GPIO_DATA_IN(ochip));
arch/arm/plat-orion/gpio.c
397
u = readl(GPIO_IN_POL(ochip));
arch/arm/plat-orion/gpio.c
416
cause = readl(GPIO_DATA_IN(ochip)) & readl(GPIO_LEVEL_MASK(ochip));
arch/arm/plat-orion/gpio.c
417
cause |= readl(GPIO_EDGE_CAUSE(ochip)) & readl(GPIO_EDGE_MASK(ochip));
arch/arm/plat-orion/gpio.c
432
polarity = readl(GPIO_IN_POL(ochip));
arch/arm/plat-orion/mpp.c
41
mpp_ctrl[i] = readl(mpp_ctrl_addr(i, dev_bus));
arch/arm/plat-orion/pcie.c
103
reg = readl(base + PCIE_DEBUG_CTRL);
arch/arm/plat-orion/pcie.c
203
mask = readl(base + PCIE_MASK_OFF);
arch/arm/plat-orion/pcie.c
217
*val = readl(base + PCIE_CONF_DATA_OFF);
arch/arm/plat-orion/pcie.c
236
*val = readl(base + PCIE_CONF_DATA_OFF);
arch/arm/plat-orion/pcie.c
240
*val = readl(base + PCIE_HEADER_LOG_4_OFF);
arch/arm/plat-orion/pcie.c
253
*val = readl(wa_base + (PCIE_CONF_BUS(bus->number) |
arch/arm/plat-orion/pcie.c
57
return readl(base + PCIE_DEV_ID_OFF) >> 16;
arch/arm/plat-orion/pcie.c
62
return readl(base + PCIE_DEV_REV_OFF) & 0xff;
arch/arm/plat-orion/pcie.c
67
return !(readl(base + PCIE_STAT_OFF) & PCIE_STAT_LINK_DOWN);
arch/arm/plat-orion/pcie.c
72
return !(readl(base + PCIE_CTRL_OFF) & PCIE_CTRL_X1_MODE);
arch/arm/plat-orion/pcie.c
77
u32 stat = readl(base + PCIE_STAT_OFF);
arch/arm/plat-orion/pcie.c
86
stat = readl(base + PCIE_STAT_OFF);
arch/arm/plat-orion/time.c
101
u = readl(timer_base + TIMER_CTRL_OFF);
arch/arm/plat-orion/time.c
118
u = readl(timer_base + TIMER_CTRL_OFF);
arch/arm/plat-orion/time.c
122
u = readl(bridge_base + BRIDGE_MASK_OFF);
arch/arm/plat-orion/time.c
145
u = readl(bridge_base + BRIDGE_MASK_OFF);
arch/arm/plat-orion/time.c
149
u = readl(timer_base + TIMER_CTRL_OFF);
arch/arm/plat-orion/time.c
188
return ~readl(timer_base + TIMER0_VAL_OFF);
arch/arm/plat-orion/time.c
223
u = readl(bridge_base + BRIDGE_MASK_OFF);
arch/arm/plat-orion/time.c
225
u = readl(timer_base + TIMER_CTRL_OFF);
arch/arm/plat-orion/time.c
67
return ~readl(timer_base + TIMER0_VAL_OFF);
arch/arm/plat-orion/time.c
89
u = readl(bridge_base + BRIDGE_MASK_OFF);
arch/loongarch/include/asm/loongson.h
40
#define xconf_readl(addr) readl(addr)
arch/loongarch/pci/pci.c
138
val = readl(crtc_reg);
arch/loongarch/pci/pci.c
156
val = readl(crtc_reg) & CRTC_OUTPUT_ENABLE;
arch/loongarch/pci/pci.c
163
(unsigned long)crtc_reg & 0xffff, readl(crtc_reg));
arch/m68k/coldfire/intc-5249.c
23
imr = readl(MCFSIM2_GPIOINTENABLE);
arch/m68k/coldfire/intc-5249.c
31
imr = readl(MCFSIM2_GPIOINTENABLE);
arch/m68k/coldfire/intc-525x.c
23
u32 imr = readl(MCFSIM2_GPIOINTENABLE);
arch/m68k/coldfire/intc-525x.c
36
u32 imr = readl(MCFSIM2_GPIOINTENABLE);
arch/m68k/coldfire/intc-5272.c
114
v = readl(intc_irqmap[irq].icr);
arch/m68k/coldfire/intc-5272.c
130
v = readl(MCFSIM_PITR);
arch/m68k/coldfire/m5249.c
113
gpio = readl(MCFSIM2_GPIOINTENABLE);
arch/m68k/coldfire/m5249.c
116
gpio = readl(MCFINTC2_INTPRI5);
arch/m68k/coldfire/m5249.c
97
r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));
arch/m68k/coldfire/m525x.c
47
u32 f = readl(MCFSIM2_GPIOFUNC);
arch/m68k/coldfire/m525x.c
69
r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));
arch/m68k/coldfire/m5272.c
58
v = readl(MCFSIM_PBCNT);
arch/m68k/coldfire/m5272.c
62
v = readl(MCFSIM_PDCNT);
arch/m68k/coldfire/m53xx.c
372
if (!(readl(MCF_SDRAMC_SDCR) & MCF_SDRAMC_SDCR_REF)) {
arch/m68k/coldfire/m53xx.c
429
writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IPALL, MCF_SDRAMC_SDCR);
arch/m68k/coldfire/m53xx.c
434
writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IREF, MCF_SDRAMC_SDCR);
arch/m68k/coldfire/m53xx.c
435
writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IREF, MCF_SDRAMC_SDCR);
arch/m68k/coldfire/m53xx.c
448
writel(readl(MCF_SDRAMC_SDCR) & ~MCF_SDRAMC_SDCR_MODE_EN,
arch/m68k/coldfire/m53xx.c
505
if (readl(MCF_SDRAMC_SDCR) & MCF_SDRAMC_SDCR_REF)
arch/m68k/coldfire/m53xx.c
507
writel(readl(MCF_SDRAMC_SDCR) & ~MCF_SDRAMC_SDCR_CKE,
arch/m68k/coldfire/m53xx.c
530
if (readl(MCF_SDRAMC_SDCR) & MCF_SDRAMC_SDCR_REF)
arch/m68k/coldfire/m53xx.c
532
writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_CKE,
arch/m68k/coldfire/m54xx.c
70
r = readl(MCF_PAR_FECI2CIRQ);
arch/m68k/include/asm/io_mm.h
394
#define readl_relaxed(addr) readl(addr)
arch/m68k/include/asm/io_no.h
73
#define readl readl
arch/mips/generic/board-ranchu.c
28
time_low = readl(base + GOLDFISH_TIMER_LOW);
arch/mips/generic/board-ranchu.c
29
time_high = readl(base + GOLDFISH_TIMER_HIGH);
arch/mips/generic/board-sead3.c
189
orig = readl(status_reg) & 0x2; /* get original sample */
arch/mips/generic/board-sead3.c
191
while ((readl(status_reg) & 0x2) == orig)
arch/mips/generic/board-sead3.c
200
while ((readl(status_reg) & 0x2) == orig)
arch/mips/include/asm/io.h
507
#define readl readl
arch/mips/loongson2ef/common/pm.c
101
cached_cpu_freq = readl(LOONGSON_CHIPCFG);
arch/mips/loongson2ef/common/pm.c
104
writel(readl(LOONGSON_CHIPCFG) & ~0x7, LOONGSON_CHIPCFG);
arch/mips/loongson2ef/common/pm.c
78
writel(readl(LOONGSON_CHIPCFG) & ~0x7, LOONGSON_CHIPCFG);
arch/mips/loongson2ef/lemote-2f/clock.c
45
regval = readl(LOONGSON_CHIPCFG);
arch/mips/loongson2ef/lemote-2f/reset.c
27
writel(readl(LOONGSON_CHIPCFG) | 0x7, LOONGSON_CHIPCFG);
arch/mips/loongson64/env.c
294
id = readl(HOST_BRIDGE_CONFIG_ADDR);
arch/mips/loongson64/init.c
36
node_id_offset = ((readl(NODE_ID_OFFSET_ADDR) >> 8) & 0x1f) + 36;
arch/mips/mti-malta/malta-dtshim.c
194
config = readl((void __iomem *)CKSEG1ADDR(ROCIT_CONFIG_GEN1));
arch/mips/pci/ops-bonito64.c
65
*data = le32_to_cpu(readl(addrp));
arch/mips/pci/ops-loongson2.c
95
*data = le32_to_cpu(readl(addrp));
arch/mips/pci/pci-rt2880.c
46
return readl(rt2880_pci_base + reg);
arch/mips/pic32/pic32mzda/config.c
110
pic32_reset_status = readl(pic32_conf_base + PIC32_RCON);
arch/mips/pic32/pic32mzda/config.c
29
v = readl(pic32_conf_base + offset);
arch/mips/pic32/pic32mzda/config.c
42
v = readl(pic32_conf_base + offset);
arch/mips/rb532/devices.c
271
if (!readl(IDT434_REG_BASE + DEV1MASK))
arch/mips/rb532/devices.c
275
readl(IDT434_REG_BASE + DEV1BASE);
arch/mips/rb532/devices.c
280
nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
arch/mips/rb532/devices.c
284
dev3.base = ioremap(readl(IDT434_REG_BASE + DEV3BASE), 1);
arch/mips/rb532/gpio.c
78
val = readl(ioaddr);
arch/mips/rb532/gpio.c
92
return readl(ioaddr) & (1 << offset);
arch/nios2/boot/compressed/console.c
28
if (readl(uartbase + ALTERA_JTAGUART_CONTROL_REG) &
arch/nios2/boot/compressed/console.c
35
while ((readl(uartbase + ALTERA_JTAGUART_CONTROL_REG) &
arch/nios2/include/asm/io.h
22
#define readl_relaxed(addr) readl(addr)
arch/parisc/include/asm/ropes.h
243
bus_mode = readl(hpa + 0x0620);
arch/parisc/lib/iomap.c
174
return readl(addr);
arch/powerpc/include/asm/io.h
468
#define __do_inl(port) readl(_IO_PORT(port));
arch/powerpc/include/asm/io.h
515
#define readl readl
arch/powerpc/include/asm/io.h
696
#define readl_relaxed(addr) readl(addr)
arch/powerpc/kernel/legacy_serial.c
63
tmp = readl(p->membase + (UART_IIR & ~3));
arch/powerpc/platforms/chrp/pegasos_eth.c
114
#define MV_READ(offset,val) { val = readl(mv643xx_reg_base + offset); }
arch/powerpc/platforms/microwatt/smp.c
54
ncpus = (readl(syscon + SYSCON_CPU_CTRL) >> 8) & 0xff;
arch/powerpc/sysdev/mpic.c
409
tmp = readl(fixup->base + 4);
arch/powerpc/sysdev/mpic.c
437
tmp = readl(fixup->base + 4);
arch/powerpc/sysdev/mpic.c
474
addr = readl(base + HT_MSI_ADDR_LO) & HT_MSI_ADDR_LO_MASK;
arch/powerpc/sysdev/mpic.c
475
addr = addr | ((u64)readl(base + HT_MSI_ADDR_HI) << 32);
arch/powerpc/sysdev/mpic.c
515
n = (readl(base + 4) >> 16) & 0xff;
arch/powerpc/sysdev/mpic.c
523
tmp = readl(base + 4);
arch/powerpc/sysdev/mpic.c
537
mpic->fixups[irq].data = readl(base + 4) | 0x80000000;
arch/powerpc/sysdev/mpic.c
568
u32 l = readl(devbase + PCI_VENDOR_ID);
arch/sh/boards/board-sh7757lcr.c
120
writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT);
arch/sh/boards/board-sh7757lcr.c
123
writel(readl(GBECONT) & ~GBECONT_RMII1, GBECONT);
arch/sh/boards/board-sh7757lcr.c
57
writel(readl(GBECONT) | GBECONT_RMII0, GBECONT);
arch/sh/boards/board-sh7757lcr.c
59
writel(readl(GBECONT) | GBECONT_RMII1, GBECONT);
arch/sh/boards/mach-r2d/setup.c
294
writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
arch/sh/drivers/pci/fixups-se7751.c
33
#define PCIC_READ(x) readl(PCI_REG(x))
arch/sparc/include/asm/floppy_64.h
602
writel(readl(auxio_reg)|0x2, auxio_reg);
arch/sparc/include/asm/io_64.h
130
#define readl readl
arch/sparc/include/asm/io_64.h
131
#define readl_relaxed readl
arch/sparc/include/asm/io_64.h
211
return readl((volatile void __iomem *)addr);
arch/sparc/include/asm/io_64.h
442
#define ioread32 readl
arch/sparc/kernel/auxio_64.c
41
(u8) readl(auxio_register) :
arch/sparc/kernel/ebus.c
136
csr = readl(p->regs + EBDMA_CSR);
arch/sparc/kernel/ebus.c
142
csr = readl(p->regs + EBDMA_CSR);
arch/sparc/kernel/ebus.c
163
csr = readl(p->regs + EBDMA_CSR);
arch/sparc/kernel/ebus.c
186
csr = readl(p->regs + EBDMA_CSR);
arch/sparc/kernel/ebus.c
231
return readl(p->regs + EBDMA_COUNT);
arch/sparc/kernel/ebus.c
237
return readl(p->regs + EBDMA_ADDR);
arch/sparc/kernel/ebus.c
247
orig_csr = csr = readl(p->regs + EBDMA_CSR);
arch/sparc/kernel/ebus.c
62
val = readl(p->regs + EBDMA_CSR);
arch/sparc/kernel/ebus.c
77
csr = readl(p->regs + EBDMA_CSR);
arch/sparc/kernel/pcic.c
201
*value = readl(pcic->pcic_config_space_data + (where&4));
arch/sparc/kernel/pcic.c
650
pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT);
arch/sparc/kernel/pcic.c
661
value = readl(pcic0.pcic_regs + PCI_SYS_COUNTER);
arch/x86/events/intel/uncore_snb.c
1059
return (u64)readl(box->io_addr + hwc->event_base);
arch/x86/events/intel/uncore_snbep.c
5053
config = readl(box->io_addr);
arch/x86/events/intel/uncore_snbep.c
5065
config = readl(box->io_addr);
arch/x86/include/asm/apic.h
104
return readl((void __iomem *)(APIC_BASE + reg));
arch/x86/include/asm/io.h
59
build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
arch/x86/include/asm/io.h
75
#define readl readl
arch/x86/include/asm/numachip/numachip_csr.h
47
return swab32(readl(lcsr_address(offset)));
arch/x86/include/asm/numachip/numachip_csr.h
75
return readl(numachip2_lcsr_address(offset));
arch/x86/kernel/apic/io_apic.c
276
return readl(&io_apic->data);
arch/x86/kernel/apic/io_apic.c
399
readl(&io_apic->data);
arch/x86/kernel/cpu/microcode/intel.c
356
u32 dword = readl(mmio_base + MBOX_RDDATA_OFFSET);
arch/x86/kernel/cpu/microcode/intel.c
477
status = readl(ss->mmio_base + MBOX_STATUS_OFFSET);
arch/x86/kernel/early_printk.c
211
return readl(vaddr + offset);
arch/x86/kernel/hpet.c
81
return readl(hpet_virt_address + a);
arch/x86/kernel/quirks.c
124
val = readl(rcba_base + 0x3404);
arch/x86/kernel/quirks.c
139
val = readl(rcba_base + 0x3404);
arch/x86/kernel/quirks.c
85
val = readl(rcba_base + 0x3404);
arch/x86/kernel/quirks.c
91
val = readl(rcba_base + 0x3404);
arch/x86/kernel/tboot.c
374
max_size = readl(log_base + LOG_MAX_SIZE_OFF);
arch/x86/kernel/vsmp_64.c
115
topology = readl(address);
arch/x86/kernel/vsmp_64.c
34
cap = readl(address);
arch/x86/kernel/vsmp_64.c
35
ctl = readl(address + 4);
arch/x86/kernel/vsmp_64.c
52
ctl = readl(address + 4);
arch/x86/platform/intel-mid/pwr.c
108
return readl(pwr->regs + PM_SSS(reg));
arch/x86/platform/intel-mid/pwr.c
128
return !!(readl(pwr->regs + PM_STS) & PM_STS_BUSY);
arch/x86/platform/intel-mid/pwr.c
334
ics = readl(pwr->regs + PM_ICS);
arch/x86/platform/uv/uv_nmi.c
318
int readd = readl(addr);
arch/x86/platform/uv/uv_nmi.c
331
(void)readl(addr); /* flush write data */
drivers/accel/amdxdna/aie2_ctx.c
199
status = readl(data);
drivers/accel/amdxdna/aie2_ctx.c
225
job->drv_cmd->result = readl(data);
drivers/accel/amdxdna/aie2_ctx.c
257
cmd_status = readl(data + offsetof(struct cmd_chain_resp, status));
drivers/accel/amdxdna/aie2_ctx.c
266
fail_cmd_idx = readl(data + offsetof(struct cmd_chain_resp, fail_cmd_idx));
drivers/accel/amdxdna/aie2_ctx.c
267
fail_cmd_status = readl(data + offsetof(struct cmd_chain_resp, fail_cmd_status));
drivers/accel/amdxdna/aie2_error.c
272
e->resp.type = readl(data + offsetof(struct async_event_msg_resp, type));
drivers/accel/amdxdna/aie2_error.c
274
e->resp.status = readl(data + offsetof(struct async_event_msg_resp, status));
drivers/accel/amdxdna/aie2_pci.c
119
ret = readx_poll_timeout(readl, SRAM_GET_ADDR(ndev, FW_ALIVE_OFF),
drivers/accel/amdxdna/aie2_pci.c
127
reg[i] = readl(ndev->sram_base + off + i * sizeof(u32));
drivers/accel/amdxdna/aie2_psp.c
62
ret = readx_poll_timeout(readl, PSP_REG(psp, PSP_STATUS_REG), ready,
drivers/accel/amdxdna/aie2_psp.c
70
resp_code = readl(PSP_REG(psp, PSP_RESP_REG));
drivers/accel/amdxdna/aie2_psp.c
85
ret = readx_poll_timeout(readl, PSP_REG(psp, PSP_PWAITMODE_REG), mode_reg,
drivers/accel/amdxdna/aie2_smu.c
46
ret = readx_poll_timeout(readl, SMU_REG(ndev, SMU_RESP_REG), resp,
drivers/accel/amdxdna/aie2_smu.c
54
*out = readl(SMU_REG(ndev, SMU_OUT_REG));
drivers/accel/amdxdna/amdxdna_mailbox.c
112
return readl(ringbuf_addr);
drivers/accel/amdxdna/amdxdna_mailbox.c
297
header.total_size = readl(read_addr);
drivers/accel/habanalabs/common/device.c
2656
u32 val = readl(hdev->rmmio + reg);
drivers/accel/habanalabs/common/device.c
97
*val = readl(acc_addr);
drivers/accel/ivpu/ivpu_hw_ip.c
1009
u32 count = readl(vdev->regv + VPU_37XX_HOST_SS_TIM_IPC_FIFO_STAT);
drivers/accel/ivpu/ivpu_hw_ip.c
1016
u32 count = readl(vdev->regv + VPU_40XX_HOST_SS_TIM_IPC_FIFO_STAT);
drivers/accel/ivpu/ivpu_hw_reg_io.h
72
ret = read_poll_timeout(readl, reg_val, (reg_val & reg_mask) == exp_masked_val,
drivers/accel/ivpu/ivpu_hw_reg_io.h
90
u32 val = readl(base + reg);
drivers/accel/qaic/qaic_data.c
1387
head = readl(dbc->dbc_base + REQHP_OFF);
drivers/accel/qaic/qaic_data.c
1388
tail = readl(dbc->dbc_base + REQTP_OFF);
drivers/accel/qaic/qaic_data.c
1494
head = readl(dbc->dbc_base + RSPHP_OFF);
drivers/accel/qaic/qaic_data.c
1500
tail = readl(dbc->dbc_base + RSPTP_OFF);
drivers/accel/qaic/qaic_data.c
1544
head = readl(dbc->dbc_base + RSPHP_OFF);
drivers/accel/qaic/qaic_data.c
1550
tail = readl(dbc->dbc_base + RSPTP_OFF);
drivers/accel/qaic/qaic_data.c
1585
head = readl(dbc->dbc_base + RSPHP_OFF);
drivers/accel/qaic/qaic_data.c
1603
tail = readl(dbc->dbc_base + RSPTP_OFF);
drivers/accel/qaic/qaic_data.c
1673
tail = readl(dbc->dbc_base + RSPTP_OFF);
drivers/accel/qaic/qaic_data.c
2043
*head = readl(dbc->dbc_base + REQHP_OFF);
drivers/accel/qaic/qaic_data.c
2044
*tail = readl(dbc->dbc_base + REQTP_OFF);
drivers/accel/qaic/qaic_timesync.c
107
low = readl(addr);
drivers/accel/qaic/qaic_timesync.c
108
high = readl(addr + sizeof(u32));
drivers/accel/rocket/rocket_core.h
16
readl((core)->pc_iomem + (REG_PC_##reg))
drivers/accel/rocket/rocket_core.h
21
readl((core)->cna_iomem + (REG_CNA_##reg) - REG_CNA_S_STATUS)
drivers/accel/rocket/rocket_core.h
26
readl((core)->core_iomem + (REG_CORE_##reg) - REG_CORE_S_STATUS)
drivers/acpi/apei/ghes.c
1418
readl(ghes->error_status_vaddr))
drivers/acpi/osl.c
727
*(u32 *) value = readl(virt_addr);
drivers/acpi/x86/lpss.c
135
val = readl(pdata->mmio_base + offset);
drivers/acpi/x86/lpss.c
138
val = readl(pdata->mmio_base + LPSS_UART_CPR);
drivers/acpi/x86/lpss.c
141
val = readl(pdata->mmio_base + offset);
drivers/acpi/x86/lpss.c
153
val = readl(pdata->mmio_base + offset);
drivers/acpi/x86/lpss.c
194
if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
drivers/acpi/x86/lpss.c
447
if (!readl(prv_base))
drivers/acpi/x86/lpss.c
692
return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
drivers/amba/bus.c
178
pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << (i * 8);
drivers/amba/bus.c
180
cid |= (readl(tmp + size - 0x10 + 4 * i) & 255) << (i * 8);
drivers/amba/bus.c
186
dev->uci.devarch = readl(csbase + UCI_REG_DEVARCH_OFFSET);
drivers/amba/bus.c
187
dev->uci.devtype = readl(csbase + UCI_REG_DEVTYPE_OFFSET) & 0xff;
drivers/amba/tegra-ahb.c
128
return readl(ahb->regs + offset);
drivers/ata/acard-ahci.c
131
ctl = readl(mmio + HOST_CTL);
drivers/ata/acard-ahci.c
134
readl(mmio + HOST_CTL); /* flush */
drivers/ata/acard-ahci.c
289
u32 cmd = readl(port_mmio + PORT_CMD);
drivers/ata/ahci.c
1011
ctl = readl(mmio + HOST_CTL);
drivers/ata/ahci.c
1014
readl(mmio + HOST_CTL); /* flush */
drivers/ata/ahci.c
1670
irq_stat = readl(mmio + HOST_IRQ_STAT);
drivers/ata/ahci.c
1681
irq_stat = readl(mmio + HOST_IRQ_STAT);
drivers/ata/ahci.c
1701
!(readl(hpriv->mmio + AHCI_VSCAP) & 1))
drivers/ata/ahci.c
1708
if (readl(hpriv->mmio + ahci_remap_dcc(i))
drivers/ata/ahci.c
1755
if (!(readl(hpriv->mmio + HOST_CTL) & HOST_MRSM)) {
drivers/ata/ahci.c
1792
tmp = readl(port_mmio + PORT_CMD);
drivers/ata/ahci.c
856
tmp = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/ahci_brcm.c
125
host_caps = readl(hpriv->mmio + HOST_CAP);
drivers/ata/ahci_brcm.c
222
impl = readl(hpriv->mmio + HOST_PORTS_IMPL);
drivers/ata/ahci_brcm.c
270
ctl = readl(mmio + HOST_CTL);
drivers/ata/ahci_brcm.c
273
readl(mmio + HOST_CTL); /* flush */
drivers/ata/ahci_brcm.c
307
ctl = readl(mmio + HOST_CTL);
drivers/ata/ahci_brcm.c
310
readl(mmio + HOST_CTL); /* flush */
drivers/ata/ahci_ceva.c
130
tmp = readl(mmio + HOST_CTL);
drivers/ata/ahci_ceva.c
151
tmp = readl(mmio + AHCI_VEND_AXICC);
drivers/ata/ahci_da850.c
34
val = readl(pwrdn_reg);
drivers/ata/ahci_dwc.c
191
param = readl(hpriv->mmio + AHCI_DWC_HOST_GPARAM2R);
drivers/ata/ahci_dwc.c
234
cap = readl(hpriv->mmio + HOST_CAP);
drivers/ata/ahci_dwc.c
235
cap2 = readl(hpriv->mmio + HOST_CAP2);
drivers/ata/ahci_dwc.c
248
dpriv->timv = readl(hpriv->mmio + AHCI_DWC_HOST_TIMER1MS);
drivers/ata/ahci_dwc.c
278
dmacr = readl(port_mmio + AHCI_DWC_PORT_DMACR);
drivers/ata/ahci_imx.c
181
*val = readl(mmio + IMX_P0PHYSR) & IMX_P0PHYSR_CR_DATA_OUT;
drivers/ata/ahci_imx.c
474
val = readl(hpriv->mmio + IMX8QM_SATA_AHCI_PTC);
drivers/ata/ahci_imx.c
626
reg_val = readl(mmio + IMX_P0PHYCR);
drivers/ata/ahci_imx.c
90
crval = readl(mmio + IMX_P0PHYCR);
drivers/ata/ahci_imx.c
948
reg_val = readl(hpriv->mmio + HOST_CAP);
drivers/ata/ahci_imx.c
953
reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);
drivers/ata/ahci_imx.c
99
srval = readl(mmio + IMX_P0PHYSR);
drivers/ata/ahci_mvebu.c
124
tmp = readl(port_mmio + PORT_CMD);
drivers/ata/ahci_mvebu.c
131
port_fbs = readl(port_mmio + PORT_FBS);
drivers/ata/ahci_mvebu.c
92
reg = readl(hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
drivers/ata/ahci_qoriq.c
118
px_cmd = readl(port_mmio + PORT_CMD);
drivers/ata/ahci_qoriq.c
119
px_is = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/ahci_qoriq.c
132
px_val = readl(port_mmio + PORT_CMD);
drivers/ata/ahci_qoriq.c
136
px_val = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/ahci_qoriq.c
190
writel(readl(qpriv->ecc_addr) |
drivers/ata/ahci_qoriq.c
214
writel(readl(qpriv->ecc_addr) |
drivers/ata/ahci_qoriq.c
231
writel(readl(qpriv->ecc_addr) |
drivers/ata/ahci_st.c
47
old_val = readl(mmio + ST_AHCI_OOBR);
drivers/ata/ahci_sunxi.c
57
reg_val = readl(reg);
drivers/ata/ahci_sunxi.c
66
reg_val = readl(reg);
drivers/ata/ahci_sunxi.c
75
reg_val = readl(reg);
drivers/ata/ahci_sunxi.c
83
return (readl(reg) >> shift) & mask;
drivers/ata/ahci_tegra.c
188
val = readl(tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0);
drivers/ata/ahci_tegra.c
210
val = readl(tegra->sata_regs +
drivers/ata/ahci_tegra.c
219
val = readl(tegra->sata_regs +
drivers/ata/ahci_tegra.c
314
val = readl(tegra->sata_regs + SATA_FPCI_BAR5);
drivers/ata/ahci_tegra.c
320
val = readl(tegra->sata_regs + SATA_CONFIGURATION_0);
drivers/ata/ahci_tegra.c
336
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
drivers/ata/ahci_tegra.c
341
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
drivers/ata/ahci_tegra.c
353
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
drivers/ata/ahci_tegra.c
365
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
drivers/ata/ahci_tegra.c
373
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
drivers/ata/ahci_tegra.c
377
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC);
drivers/ata/ahci_tegra.c
384
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
drivers/ata/ahci_tegra.c
389
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
drivers/ata/ahci_tegra.c
400
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35);
drivers/ata/ahci_tegra.c
408
val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1);
drivers/ata/ahci_tegra.c
414
val = readl(tegra->sata_regs + SATA_CONFIGURATION_0);
drivers/ata/ahci_tegra.c
422
val = readl(tegra->sata_regs + SATA_INTR_MASK);
drivers/ata/ahci_xgene.c
160
fbs = readl(port_mmio + PORT_FBS);
drivers/ata/ahci_xgene.c
162
fbs = readl(port_mmio + PORT_FBS);
drivers/ata/ahci_xgene.c
200
port_fbs = readl(port_mmio + PORT_FBS);
drivers/ata/ahci_xgene.c
223
return (readl(diagcsr + CFG_MEM_RAM_SHUTDOWN) == 0 &&
drivers/ata/ahci_xgene.c
224
readl(diagcsr + BLOCK_MEM_RDY) == 0xFFFFFFFF);
drivers/ata/ahci_xgene.c
271
val = readl(mmio + PORTCFG);
drivers/ata/ahci_xgene.c
274
readl(mmio + PORTCFG); /* Force a barrier */
drivers/ata/ahci_xgene.c
277
readl(mmio + PORTPHY1CFG); /* Force a barrier */
drivers/ata/ahci_xgene.c
279
readl(mmio + PORTPHY2CFG); /* Force a barrier */
drivers/ata/ahci_xgene.c
281
readl(mmio + PORTPHY3CFG); /* Force a barrier */
drivers/ata/ahci_xgene.c
283
readl(mmio + PORTPHY4CFG); /* Force a barrier */
drivers/ata/ahci_xgene.c
285
val = readl(mmio + PORTPHY5CFG);
drivers/ata/ahci_xgene.c
288
readl(mmio + PORTPHY5CFG); /* Force a barrier */
drivers/ata/ahci_xgene.c
289
val = readl(mmio + PORTAXICFG);
drivers/ata/ahci_xgene.c
293
readl(mmio + PORTAXICFG); /* Force a barrier */
drivers/ata/ahci_xgene.c
295
val = readl(mmio + PORTRANSCFG);
drivers/ata/ahci_xgene.c
370
val = readl(port_mmio + PORT_SCR_ERR);
drivers/ata/ahci_xgene.c
381
val = readl(port_mmio + PORT_SCR_ERR);
drivers/ata/ahci_xgene.c
402
portcmd_saved = readl(port_mmio + PORT_CMD);
drivers/ata/ahci_xgene.c
403
portclb_saved = readl(port_mmio + PORT_LST_ADDR);
drivers/ata/ahci_xgene.c
404
portclbhi_saved = readl(port_mmio + PORT_LST_ADDR_HI);
drivers/ata/ahci_xgene.c
405
portrxfis_saved = readl(port_mmio + PORT_FIS_ADDR);
drivers/ata/ahci_xgene.c
406
portrxfishi_saved = readl(port_mmio + PORT_FIS_ADDR_HI);
drivers/ata/ahci_xgene.c
460
port_fbs = readl(port_mmio + PORT_FBS);
drivers/ata/ahci_xgene.c
502
port_fbs_save = readl(port_mmio + PORT_FBS);
drivers/ata/ahci_xgene.c
508
port_fbs = readl(port_mmio + PORT_FBS);
drivers/ata/ahci_xgene.c
563
if (!readl(hpriv->mmio + HOST_IRQ_STAT)) {
drivers/ata/ahci_xgene.c
569
if (readl(port_mmio + PORT_IRQ_STAT))
drivers/ata/ahci_xgene.c
589
irq_stat = readl(mmio + HOST_IRQ_STAT);
drivers/ata/ahci_xgene.c
658
readl(hpriv->mmio + HOST_IRQ_STAT); /* Force a barrier */
drivers/ata/ahci_xgene.c
660
val = readl(ctx->csr_core + INTSTATUSMASK); /* Force a barrier */
drivers/ata/ahci_xgene.c
665
readl(ctx->csr_core + ERRINTSTATUSMASK); /* Force a barrier */
drivers/ata/ahci_xgene.c
667
readl(ctx->csr_axi + INT_SLV_TMOMASK);
drivers/ata/ahci_xgene.c
676
val = readl(ctx->csr_core + BUSCTLREG);
drivers/ata/ahci_xgene.c
681
val = readl(ctx->csr_core + IOFMSTRWAUX);
drivers/ata/ahci_xgene.c
685
val = readl(ctx->csr_core + IOFMSTRWAUX);
drivers/ata/ahci_xgene.c
700
val = readl(ctx->csr_mux + SATA_ENET_CONFIG_REG);
drivers/ata/ahci_xgene.c
703
val = readl(ctx->csr_mux + SATA_ENET_CONFIG_REG);
drivers/ata/ahci_xgene.c
93
readl(ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); /* Force a barrier */
drivers/ata/ahci_xgene.c
95
if (readl(ctx->csr_diag + BLOCK_MEM_RDY) != 0xFFFFFFFF) {
drivers/ata/libahci.c
1102
em_ctl = readl(mmio + HOST_EM_CTL);
drivers/ata/libahci.c
1137
em_ctl = readl(mmio + HOST_EM_CTL);
drivers/ata/libahci.c
1268
tmp = readl(port_mmio + PORT_SCR_ERR);
drivers/ata/libahci.c
1273
tmp = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/libahci.c
1314
tmp = readl(mmio + HOST_CTL);
drivers/ata/libahci.c
1317
tmp = readl(mmio + HOST_CTL);
drivers/ata/libahci.c
1343
tmp = readl(port_mmio + PORT_SIG);
drivers/ata/libahci.c
1371
u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
drivers/ata/libahci.c
1395
tmp = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
1428
tmp = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
1446
readl(port_mmio + PORT_CMD_ISSUE); /* flush */
drivers/ata/libahci.c
1534
u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
drivers/ata/libahci.c
1552
u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
drivers/ata/libahci.c
1553
u32 irq_status = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/libahci.c
1583
irq_sts = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/libahci.c
1645
new_tmp = tmp = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
1652
readl(port_mmio + PORT_CMD); /* flush */
drivers/ata/libahci.c
1732
u32 fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
1741
fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
1744
fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
1765
u32 fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
1876
qc_active = readl(port_mmio + PORT_SCR_ACT);
drivers/ata/libahci.c
1877
qc_active |= readl(port_mmio + PORT_CMD_ISSUE);
drivers/ata/libahci.c
1882
qc_active = readl(port_mmio + PORT_SCR_ACT);
drivers/ata/libahci.c
1884
qc_active = readl(port_mmio + PORT_CMD_ISSUE);
drivers/ata/libahci.c
1962
status = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/libahci.c
1974
status = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/libahci.c
2022
irq_stat = readl(mmio + HOST_IRQ_STAT);
drivers/ata/libahci.c
2064
u32 fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
217
tmp = readl(mmio + HOST_CTL);
drivers/ata/libahci.c
2206
tmp = readl(port_mmio + PORT_IRQ_STAT);
drivers/ata/libahci.c
2249
devslp = readl(port_mmio + PORT_DEVSLP);
drivers/ata/libahci.c
227
tmp = readl(mmio + HOST_CTL); /* flush && sanity check */
drivers/ata/libahci.c
2331
fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
2343
fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
2365
fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
2376
fbs = readl(port_mmio + PORT_FBS);
drivers/ata/libahci.c
2393
cmd = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
2421
cmd = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
2456
devslp = readl(port_mmio + PORT_DEVSLP);
drivers/ata/libahci.c
2508
u32 cmd = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
2682
u32 em_loc = readl(mmio + HOST_EM_LOC);
drivers/ata/libahci.c
2683
u32 em_ctl = readl(mmio + HOST_EM_CTL);
drivers/ata/libahci.c
300
ret = sprintf(buf, "%x\n", readl(port_mmio + PORT_CMD));
drivers/ata/libahci.c
322
em_ctl = readl(mmio + HOST_EM_CTL);
drivers/ata/libahci.c
352
msg = readl(em_mmio + i);
drivers/ata/libahci.c
388
em_ctl = readl(mmio + HOST_EM_CTL);
drivers/ata/libahci.c
419
em_ctl = readl(mmio + HOST_EM_CTL);
drivers/ata/libahci.c
468
cap = readl(mmio + HOST_CAP);
drivers/ata/libahci.c
474
vers = readl(mmio + HOST_VERSION);
drivers/ata/libahci.c
477
hpriv->saved_cap2 = cap2 = readl(mmio + HOST_CAP2);
drivers/ata/libahci.c
536
port_map = readl(mmio + HOST_PORTS_IMPL);
drivers/ata/libahci.c
592
readl(port_mmio + PORT_CMD) & PORT_CMD_CAP;
drivers/ata/libahci.c
633
(void) readl(mmio + HOST_PORTS_IMPL); /* flush */
drivers/ata/libahci.c
664
*val = readl(port_mmio + offset);
drivers/ata/libahci.c
688
tmp = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
691
readl(port_mmio + PORT_CMD); /* flush */
drivers/ata/libahci.c
714
tmp = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
763
tmp = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
768
readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
778
tmp = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
797
cmd = readl(port_mmio + PORT_CMD) & ~PORT_CMD_ICC_MASK;
drivers/ata/libahci.c
833
u32 cmd = readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
841
readl(port_mmio + PORT_CMD);
drivers/ata/libahci.c
893
scontrol = readl(port_mmio + PORT_SCR_CTL);
drivers/ata/libahci.c
898
cmd = readl(port_mmio + PORT_CMD) & ~PORT_CMD_ICC_MASK;
drivers/ata/libahci.c
992
tmp = readl(mmio + HOST_CTL);
drivers/ata/libahci.c
995
readl(mmio + HOST_CTL); /* flush */
drivers/ata/libahci_platform.c
821
writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
drivers/ata/libahci_platform.c
822
readl(mmio + HOST_CTL); /* flush */
drivers/ata/libahci_platform.c
856
ctl = readl(mmio + HOST_CTL);
drivers/ata/libahci_platform.c
859
readl(mmio + HOST_CTL); /* flush */
drivers/ata/pata_arasan_cf.c
231
dev_dbg(dev, ": CFI_STS: %x", readl(acdev->vbase + CFI_STS));
drivers/ata/pata_arasan_cf.c
232
dev_dbg(dev, ": IRQ_STS: %x", readl(acdev->vbase + IRQ_STS));
drivers/ata/pata_arasan_cf.c
233
dev_dbg(dev, ": IRQ_EN: %x", readl(acdev->vbase + IRQ_EN));
drivers/ata/pata_arasan_cf.c
234
dev_dbg(dev, ": OP_MODE: %x", readl(acdev->vbase + OP_MODE));
drivers/ata/pata_arasan_cf.c
235
dev_dbg(dev, ": CLK_CFG: %x", readl(acdev->vbase + CLK_CFG));
drivers/ata/pata_arasan_cf.c
236
dev_dbg(dev, ": TM_CFG: %x", readl(acdev->vbase + TM_CFG));
drivers/ata/pata_arasan_cf.c
237
dev_dbg(dev, ": XFER_CTR: %x", readl(acdev->vbase + XFER_CTR));
drivers/ata/pata_arasan_cf.c
238
dev_dbg(dev, ": GIRQ_STS: %x", readl(acdev->vbase + GIRQ_STS));
drivers/ata/pata_arasan_cf.c
239
dev_dbg(dev, ": GIRQ_STS_EN: %x", readl(acdev->vbase + GIRQ_STS_EN));
drivers/ata/pata_arasan_cf.c
240
dev_dbg(dev, ": GIRQ_SGN_EN: %x", readl(acdev->vbase + GIRQ_SGN_EN));
drivers/ata/pata_arasan_cf.c
256
u32 val = readl(acdev->vbase + IRQ_EN);
drivers/ata/pata_arasan_cf.c
267
u32 val = readl(acdev->vbase + OP_MODE);
drivers/ata/pata_arasan_cf.c
276
writel(readl(acdev->vbase + OP_MODE) & ~CFHOST_ENB,
drivers/ata/pata_arasan_cf.c
278
writel(readl(acdev->vbase + OP_MODE) | CFHOST_ENB,
drivers/ata/pata_arasan_cf.c
286
u32 val = readl(acdev->vbase + CFI_STS);
drivers/ata/pata_arasan_cf.c
351
writel(readl(acdev->vbase + OP_MODE) & ~CFHOST_ENB,
drivers/ata/pata_arasan_cf.c
458
xfer_ctr = readl(acdev->vbase + XFER_CTR) &
drivers/ata/pata_arasan_cf.c
500
writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START,
drivers/ata/pata_arasan_cf.c
600
irqsts = readl(acdev->vbase + GIRQ_STS);
drivers/ata/pata_arasan_cf.c
605
irqsts = readl(acdev->vbase + IRQ_STS);
drivers/ata/pata_arasan_cf.c
620
writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START,
drivers/ata/pata_arasan_cf.c
651
writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START,
drivers/ata/pata_arasan_cf.c
679
u32 xfer_ctr = readl(acdev->vbase + XFER_CTR) & ~XFER_DIR_MASK;
drivers/ata/pata_arasan_cf.c
739
val = readl(acdev->vbase + OP_MODE) &
drivers/ata/pata_arasan_cf.c
742
val = readl(acdev->vbase + TM_CFG) & ~TRUEIDE_PIO_TIMING_MASK;
drivers/ata/pata_arasan_cf.c
758
opmode = readl(acdev->vbase + OP_MODE) &
drivers/ata/pata_arasan_cf.c
760
tmcfg = readl(acdev->vbase + TM_CFG);
drivers/ata/pata_ep93xx.c
160
return !!(readl(base + IDECTRL) & IDECTRL_IORDY);
drivers/ata/pata_ep93xx.c
278
return readl(base + IDEDATAIN);
drivers/ata/pata_ep93xx.c
731
readl(base + IDEUDMAOP);
drivers/ata/pata_ep93xx.c
753
writel(readl(base + IDECTRL) | IDECTRL_DIOWN | IDECTRL_DIORN |
drivers/ata/pata_ep93xx.c
770
u32 val = readl(drv_data->ide_base + IDEUDMASTS);
drivers/ata/pata_ep93xx.c
790
if (readl(drv_data->ide_base + IDECTRL) & IDECTRL_INTRQ)
drivers/ata/pata_ftide010.c
524
readl(ftide->base + FTIDE010_IDE_DEVICE_ID), irq, res);
drivers/ata/pata_macio.c
602
while (--timeout && (readl(&dma_regs->status) & RUN))
drivers/ata/pata_macio.c
649
(void)readl(&dma_regs->control);
drivers/ata/pata_macio.c
663
while (--timeout && (readl(&dma_regs->status) & RUN))
drivers/ata/pata_macio.c
674
dstat = readl(&dma_regs->status);
drivers/ata/pata_macio.c
712
dstat = readl(&dma_regs->status);
drivers/ata/pata_macio.c
889
u32 fcr = readl(priv->kauai_fcr);
drivers/ata/sata_gemini.c
174
val = readl(sg->base + GEMINI_SATA0_STATUS);
drivers/ata/sata_gemini.c
176
val = readl(sg->base + GEMINI_SATA1_STATUS);
drivers/ata/sata_gemini.c
251
sata_id = readl(sg->base + GEMINI_SATA_ID);
drivers/ata/sata_gemini.c
252
sata_phy_id = readl(sg->base + GEMINI_SATA_PHY_ID);
drivers/ata/sata_highbank.c
220
data = readl(port_data[sata_port].phy_base + CPHY_ADDR(addr));
drivers/ata/sata_highbank.c
586
ctl = readl(mmio + HOST_CTL);
drivers/ata/sata_highbank.c
589
readl(mmio + HOST_CTL); /* flush */
drivers/ata/sata_inic162x.c
298
*val = readl(scr_addr + scr_map[sc_reg] * 4);
drivers/ata/sata_mv.c
1170
u32 edma_stat = readl(port_mmio + EDMA_STATUS);
drivers/ata/sata_mv.c
1194
u32 reg = readl(port_mmio + EDMA_CMD);
drivers/ata/sata_mv.c
1228
"%08x ", readl(start + b));
drivers/ata/sata_mv.c
1315
*val = readl(mv_ap_base(link->ap) + ofs);
drivers/ata/sata_mv.c
1342
if ((val & 0xf) == 1 || (readl(addr) & 0xf) == 1)
drivers/ata/sata_mv.c
1478
old = readl(hpriv->base + GPIO_PORT_CTL);
drivers/ata/sata_mv.c
1536
led_ctrl = readl(hc_mmio + SOC_LED_CTRL);
drivers/ata/sata_mv.c
1562
led_ctrl = readl(hc_mmio + SOC_LED_CTRL);
drivers/ata/sata_mv.c
1900
cmd = readl(port_mmio + BMDMA_CMD);
drivers/ata/sata_mv.c
1933
reg = readl(port_mmio + BMDMA_STATUS);
drivers/ata/sata_mv.c
2200
old_ifctl = readl(port_mmio + SATA_IFCTL);
drivers/ata/sata_mv.c
2217
ifstat = readl(port_mmio + SATA_IFSTAT);
drivers/ata/sata_mv.c
2431
return readl(port_mmio + SATA_TESTCTL) >> 16;
drivers/ata/sata_mv.c
2462
in_ptr = (readl(port_mmio + EDMA_REQ_Q_IN_PTR)
drivers/ata/sata_mv.c
2464
out_ptr = (readl(port_mmio + EDMA_REQ_Q_OUT_PTR)
drivers/ata/sata_mv.c
2622
edma_err_cause = readl(port_mmio + EDMA_ERR_IRQ_CAUSE);
drivers/ata/sata_mv.c
2624
fis_cause = readl(port_mmio + FIS_IRQ_CAUSE);
drivers/ata/sata_mv.c
2775
in_index = (readl(port_mmio + EDMA_RSP_Q_IN_PTR)
drivers/ata/sata_mv.c
2923
err_cause = readl(mmio + hpriv->irq_cause_offset);
drivers/ata/sata_mv.c
2982
main_irq_cause = readl(hpriv->main_irq_cause_addr);
drivers/ata/sata_mv.c
3029
*val = readl(addr + ofs);
drivers/ata/sata_mv.c
3057
u32 tmp = readl(mmio + MV_PCI_EXP_ROM_BAR_CTL);
drivers/ata/sata_mv.c
3076
tmp = readl(phy_mmio + MV5_PHY_MODE);
drivers/ata/sata_mv.c
3090
tmp = readl(mmio + MV_PCI_EXP_ROM_BAR_CTL);
drivers/ata/sata_mv.c
3104
tmp = readl(phy_mmio + MV5_LTMODE);
drivers/ata/sata_mv.c
3108
tmp = readl(phy_mmio + MV5_PHY_CTL);
drivers/ata/sata_mv.c
3114
tmp = readl(phy_mmio + MV5_PHY_MODE);
drivers/ata/sata_mv.c
3159
tmp = readl(hc_mmio + 0x20);
drivers/ata/sata_mv.c
3190
tmp = readl(mmio + MV_PCI_MODE);
drivers/ata/sata_mv.c
3213
tmp = readl(mmio + GPIO_PORT_CTL);
drivers/ata/sata_mv.c
3238
t = readl(reg);
drivers/ata/sata_mv.c
3243
t = readl(reg);
drivers/ata/sata_mv.c
3257
t = readl(reg);
drivers/ata/sata_mv.c
3271
t = readl(reg);
drivers/ata/sata_mv.c
3289
tmp = readl(mmio + RESET_CFG);
drivers/ata/sata_mv.c
3297
tmp = readl(port_mmio + PHY_MODE2);
drivers/ata/sata_mv.c
3321
m2 = readl(port_mmio + PHY_MODE2);
drivers/ata/sata_mv.c
3328
m2 = readl(port_mmio + PHY_MODE2);
drivers/ata/sata_mv.c
3339
m3 = readl(port_mmio + PHY_MODE3);
drivers/ata/sata_mv.c
3347
u32 m4 = readl(port_mmio + PHY_MODE4);
drivers/ata/sata_mv.c
3368
m2 = readl(port_mmio + PHY_MODE2);
drivers/ata/sata_mv.c
3399
tmp = readl(port_mmio + PHY_MODE2);
drivers/ata/sata_mv.c
3476
reg = readl(port_mmio + PHY_MODE3);
drivers/ata/sata_mv.c
3483
reg = readl(port_mmio + PHY_MODE4);
drivers/ata/sata_mv.c
3488
reg = readl(port_mmio + PHY_MODE9_GEN2);
drivers/ata/sata_mv.c
3494
reg = readl(port_mmio + PHY_MODE9_GEN1);
drivers/ata/sata_mv.c
3512
if (readl(port0_mmio + PHYCFG_OFS))
drivers/ata/sata_mv.c
3519
u32 ifcfg = readl(port_mmio + SATA_IFCFG);
drivers/ata/sata_mv.c
3563
u32 reg = readl(port_mmio + SATA_IFCTL);
drivers/ata/sata_mv.c
3685
writelfl(readl(serr), serr);
drivers/ata/sata_mv.c
3700
reg = readl(mmio + MV_PCI_MODE);
drivers/ata/sata_mv.c
3713
reg = readl(mmio + MV_PCI_COMMAND);
drivers/ata/sata_mv.c
3727
u32 reg = readl(mmio + MV_PCI_COMMAND);
drivers/ata/sata_mv.c
3905
hpriv->main_irq_mask = readl(hpriv->main_irq_mask_addr);
drivers/ata/sata_mv.c
3936
readl(hc_mmio + HC_CFG),
drivers/ata/sata_mv.c
3937
readl(hc_mmio + HC_IRQ_CAUSE));
drivers/ata/sata_mv.c
832
(void) readl(addr); /* flush to avoid PCI posted write */
drivers/ata/sata_mv.c
920
pp->cached.fiscfg = readl(port_mmio + FISCFG);
drivers/ata/sata_mv.c
921
pp->cached.ltmode = readl(port_mmio + LTMODE);
drivers/ata/sata_mv.c
922
pp->cached.haltcond = readl(port_mmio + EDMA_HALTCOND);
drivers/ata/sata_mv.c
923
pp->cached.unknown_rsvd = readl(port_mmio + EDMA_UNKNOWN_RSVD);
drivers/ata/sata_nv.c
1610
mask = readl(mmio_base + NV_INT_ENABLE_MCP55);
drivers/ata/sata_nv.c
1623
mask = readl(mmio_base + NV_INT_ENABLE_MCP55);
drivers/ata/sata_nv.c
1637
u32 notifier = readl(mmio + NV_ADMA_NOTIFIER);
drivers/ata/sata_nv.c
1638
u32 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR);
drivers/ata/sata_nv.c
1639
u32 gen_ctl = readl(pp->gen_block + NV_ADMA_GEN_CTL);
drivers/ata/sata_nv.c
1769
sactive = readl(pp->sactive_block);
drivers/ata/sata_nv.c
1822
tmp = readl(mmio + NV_CTL_MCP55);
drivers/ata/sata_nv.c
1841
tmp = readl(mmio + NV_CTL_MCP55);
drivers/ata/sata_nv.c
1861
tmp = readl(mmio + NV_CTL_MCP55);
drivers/ata/sata_nv.c
1866
tmp = readl(mmio + NV_INT_ENABLE_MCP55);
drivers/ata/sata_nv.c
2088
sactive = readl(pp->sactive_block);
drivers/ata/sata_nv.c
2229
pp->dmafis_bits, readl(pp->sactive_block));
drivers/ata/sata_nv.c
2288
irq_stat = readl(host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_MCP55);
drivers/ata/sata_nv.c
918
notifier = readl(mmio + NV_ADMA_NOTIFIER);
drivers/ata/sata_nv.c
919
notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR);
drivers/ata/sata_nv.c
922
gen_ctl = readl(pp->gen_block + NV_ADMA_GEN_CTL);
drivers/ata/sata_promise.c
1001
readl(ata_mmio + PDC_PKT_SUBMIT); /* flush */
drivers/ata/sata_promise.c
1112
tmp = readl(host_mmio + PDC_FLASH_CTL);
drivers/ata/sata_promise.c
1119
tmp = readl(host_mmio + hotplug_offset);
drivers/ata/sata_promise.c
1122
tmp = readl(host_mmio + hotplug_offset);
drivers/ata/sata_promise.c
1133
tmp = readl(host_mmio + PDC_TBG_MODE);
drivers/ata/sata_promise.c
1138
readl(host_mmio + PDC_TBG_MODE); /* flush */
drivers/ata/sata_promise.c
1142
tmp = readl(host_mmio + PDC_SLEW_CTL);
drivers/ata/sata_promise.c
351
tmp = readl(sata_mmio + PDC_PHYMODE4);
drivers/ata/sata_promise.c
364
tmp = readl(sata_mmio + PDC_FPDMA_CTLSTAT);
drivers/ata/sata_promise.c
379
tmp = (u8)readl(sata_mmio + PDC_FPDMA_CTLSTAT);
drivers/ata/sata_promise.c
383
readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */
drivers/ata/sata_promise.c
387
readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */
drivers/ata/sata_promise.c
401
tmp = readl(sata_mmio + PDC_INTERNAL_DEBUG_2);
drivers/ata/sata_promise.c
425
tmp = readl(ata_ctlstat_mmio);
drivers/ata/sata_promise.c
430
tmp = readl(ata_ctlstat_mmio);
drivers/ata/sata_promise.c
442
readl(ata_ctlstat_mmio); /* flush */
drivers/ata/sata_promise.c
466
*val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4));
drivers/ata/sata_promise.c
699
tmp = readl(ata_mmio + PDC_CTLSTAT);
drivers/ata/sata_promise.c
703
readl(ata_mmio + PDC_CTLSTAT); /* flush */
drivers/ata/sata_promise.c
721
hotplug_status = readl(host_mmio + hotplug_offset);
drivers/ata/sata_promise.c
724
readl(host_mmio + hotplug_offset); /* flush */
drivers/ata/sata_promise.c
735
readl(ata_mmio + PDC_COMMAND);
drivers/ata/sata_promise.c
738
tmp = readl(ata_mmio + PDC_CTLSTAT);
drivers/ata/sata_promise.c
741
readl(ata_mmio + PDC_CTLSTAT); /* flush */
drivers/ata/sata_promise.c
757
hotplug_status = readl(host_mmio + hotplug_offset);
drivers/ata/sata_promise.c
761
readl(host_mmio + hotplug_offset); /* flush */
drivers/ata/sata_promise.c
881
port_status = readl(ata_mmio + PDC_GLOBAL_CTL);
drivers/ata/sata_promise.c
908
readl(ata_mmio + PDC_COMMAND);
drivers/ata/sata_promise.c
933
hotplug_status = readl(host_mmio + hotplug_offset);
drivers/ata/sata_promise.c
941
mask = readl(host_mmio + PDC_INT_SEQMASK);
drivers/ata/sata_promise.c
996
readl(host_mmio + (seq * 4)); /* flush */
drivers/ata/sata_qstor.c
218
*val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 8));
drivers/ata/sata_qstor.c
305
readl(chan + QS_CCT_CFF); /* flush */
drivers/ata/sata_qstor.c
357
u32 sff0 = readl(mmio_base + QS_HST_SFF);
drivers/ata/sata_qstor.c
358
u32 sff1 = readl(mmio_base + QS_HST_SFF + 4);
drivers/ata/sata_qstor.c
530
u32 bus_info = readl(mmio_base + QS_HID_HPHY);
drivers/ata/sata_sil.c
368
tmp = readl(addr);
drivers/ata/sata_sil.c
373
readl(addr); /* flush */
drivers/ata/sata_sil.c
402
*val = readl(mmio);
drivers/ata/sata_sil.c
517
u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2);
drivers/ata/sata_sil.c
545
tmp = readl(mmio_base + SIL_SYSCFG);
drivers/ata/sata_sil.c
548
readl(mmio_base + SIL_SYSCFG); /* flush */
drivers/ata/sata_sil.c
578
tmp = readl(mmio_base + SIL_SYSCFG);
drivers/ata/sata_sil.c
675
tmp = readl(mmio_base + sil_port[i].sfis_cfg);
drivers/ata/sata_sil.c
688
tmp = readl(mmio_base + sil_port[2].bmdma);
drivers/ata/sata_sil24.c
1033
context = readl(port + PORT_CONTEXT);
drivers/ata/sata_sil24.c
1053
cerr = readl(port + PORT_CMD_ERR);
drivers/ata/sata_sil24.c
1111
slot_stat = readl(port + PORT_SLOT_STAT);
drivers/ata/sata_sil24.c
1145
status = readl(host_base + HOST_IRQ_STAT);
drivers/ata/sata_sil24.c
1239
tmp = readl(port + PORT_CTRL_STAT);
drivers/ata/sata_sil24.c
1288
tmp = readl(iomap[SIL24_HOST_BAR] + HOST_CTRL);
drivers/ata/sata_sil24.c
504
*val = readl(scr_addr + sil24_scr_map[sc_reg] * 4);
drivers/ata/sata_sil24.c
612
irq_enabled = readl(port + PORT_IRQ_ENABLE_SET);
drivers/ata/sata_sil24.c
961
tmp = readl(port + PORT_IRQ_STAT);
drivers/ata/sata_sil24.c
979
irq_stat = readl(port + PORT_IRQ_STAT);
drivers/ata/sata_svw.c
111
*val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4));
drivers/ata/sata_svw.c
301
return readl(ap->ioaddr.status_addr);
drivers/ata/sata_svw.c
484
writel(readl(mmio_base + K2_SATA_SICR1_OFFSET) & ~0x00040000,
drivers/ata/sata_sx4.c
1004
readl(mmio + PDC_DIMM_WINDOW_CTLR);
drivers/ata/sata_sx4.c
1010
readl(mmio + PDC_GENERAL_CTLR);
drivers/ata/sata_sx4.c
1016
readl(mmio + PDC_DIMM_WINDOW_CTLR);
drivers/ata/sata_sx4.c
1019
readl(mmio + PDC_GENERAL_CTLR);
drivers/ata/sata_sx4.c
1027
readl(mmio + PDC_DIMM_WINDOW_CTLR);
drivers/ata/sata_sx4.c
1030
readl(mmio + PDC_GENERAL_CTLR);
drivers/ata/sata_sx4.c
1051
readl(mmio + PDC_I2C_ADDR_DATA);
drivers/ata/sata_sx4.c
1058
status = readl(mmio + PDC_I2C_CONTROL);
drivers/ata/sata_sx4.c
1060
status = readl(mmio + PDC_I2C_ADDR_DATA);
drivers/ata/sata_sx4.c
1156
readl(mmio + PDC_DIMM0_CONTROL);
drivers/ata/sata_sx4.c
1179
readl(mmio + PDC_SDRAM_CONTROL);
drivers/ata/sata_sx4.c
1192
readl(mmio + PDC_SDRAM_CONTROL);
drivers/ata/sata_sx4.c
1203
data = readl(mmio + PDC_SDRAM_CONTROL);
drivers/ata/sata_sx4.c
1232
time_period = readl(mmio + PDC_TIME_PERIOD);
drivers/ata/sata_sx4.c
1237
readl(mmio + PDC_TIME_CONTROL);
drivers/ata/sata_sx4.c
1247
tcount = readl(mmio + PDC_TIME_COUNTER);
drivers/ata/sata_sx4.c
1278
readl(mmio + PDC_CTL_STATUS);
drivers/ata/sata_sx4.c
1372
tmp = readl(mmio + PDC_20621_DIMM_WINDOW) & 0xffff0000;
drivers/ata/sata_sx4.c
1379
tmp = readl(mmio + PDC_HDMA_CTLSTAT);
drivers/ata/sata_sx4.c
1382
readl(mmio + PDC_HDMA_CTLSTAT); /* flush */
drivers/ata/sata_sx4.c
1386
tmp = readl(mmio + PDC_HDMA_CTLSTAT);
drivers/ata/sata_sx4.c
1389
readl(mmio + PDC_HDMA_CTLSTAT); /* flush */
drivers/ata/sata_sx4.c
468
readl(dimm_mmio); /* MMIO PCI posting flush */
drivers/ata/sata_sx4.c
502
readl(dimm_mmio); /* MMIO PCI posting flush */
drivers/ata/sata_sx4.c
535
readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */
drivers/ata/sata_sx4.c
538
readl(mmio + PDC_HDMA_PKT_SUBMIT); /* flush */
drivers/ata/sata_sx4.c
588
readl(dimm_mmio), readl(dimm_mmio + 4),
drivers/ata/sata_sx4.c
589
readl(dimm_mmio + 8), readl(dimm_mmio + 12));
drivers/ata/sata_sx4.c
621
readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */
drivers/ata/sata_sx4.c
625
readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
drivers/ata/sata_sx4.c
672
readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT));
drivers/ata/sata_sx4.c
683
readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT));
drivers/ata/sata_sx4.c
698
readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT));
drivers/ata/sata_sx4.c
702
readl(mmio + PDC_20621_SEQCTL + (seq * 4));
drivers/ata/sata_sx4.c
705
readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
drivers/ata/sata_sx4.c
711
readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT));
drivers/ata/sata_sx4.c
756
mask = readl(mmio_base + PDC_20621_SEQMASK);
drivers/ata/sata_sx4.c
800
tmp = readl(mmio + PDC_CTLSTAT);
drivers/ata/sata_sx4.c
804
readl(mmio + PDC_CTLSTAT); /* flush */
drivers/ata/sata_sx4.c
818
tmp = readl(mmio + PDC_CTLSTAT);
drivers/ata/sata_sx4.c
821
readl(mmio + PDC_CTLSTAT); /* flush */
drivers/ata/sata_sx4.c
833
tmp = readl(mmio);
drivers/ata/sata_sx4.c
845
readl(mmio); /* flush */
drivers/ata/sata_sx4.c
954
readl(mmio + PDC_GENERAL_CTLR);
drivers/ata/sata_sx4.c
956
readl(mmio + PDC_DIMM_WINDOW_CTLR);
drivers/ata/sata_sx4.c
967
readl(mmio + PDC_GENERAL_CTLR);
drivers/ata/sata_sx4.c
969
readl(mmio + PDC_DIMM_WINDOW_CTLR);
drivers/ata/sata_sx4.c
978
readl(mmio + PDC_GENERAL_CTLR);
drivers/ata/sata_sx4.c
980
readl(mmio + PDC_DIMM_WINDOW_CTLR);
drivers/ata/sata_vsc.c
255
status = readl(host->iomap[VSC_MMIO_BAR] + VSC_SATA_INT_STAT_OFFSET);
drivers/ata/sata_vsc.c
89
*val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4));
drivers/atm/eni.c
154
#define eni_in(r) readl(eni_dev->reg+(r)*4)
drivers/atm/eni.c
1737
if (readl(&eprom->magic) != ENI155_MAGIC) {
drivers/atm/eni.c
1742
(unsigned)readl(&eprom->magic));
drivers/atm/eni.c
1753
if (readl(eni_dev->ram+i) != 0x55555555) last = i;
drivers/atm/eni.c
1756
if (readl(eni_dev->ram+i) != 0xAAAAAAAA) last = i;
drivers/atm/eni.c
1761
if (readl(eni_dev->ram+i) != i) break;
drivers/atm/eni.c
1985
writel((readl(dsc) & ~(MID_SEG_RATE | MID_SEG_PR)) |
drivers/atm/eni.c
2078
return readl(ENI_DEV(dev)->phy+addr*4);
drivers/atm/eni.c
326
(unsigned) readl(eni_vcc->recv+eni_vcc->descr*4));
drivers/atm/eni.c
515
descr = readl(eni_vcc->recv+eni_vcc->descr*4);
drivers/atm/eni.c
553
descr = readl(eni_vcc->recv+eni_vcc->descr*4);
drivers/atm/eni.c
584
length = readl(eni_vcc->recv+(((eni_vcc->descr+size-1) &
drivers/atm/eni.c
621
while (eni_vcc->descr != (tmp = (readl(vci_dsc+4) & MID_VCI_DESCR) >>
drivers/atm/eni.c
626
(((unsigned) readl(vci_dsc+4) & MID_VCI_DESCR) >>
drivers/atm/eni.c
631
writel(readl(vci_dsc) & ~MID_VCI_IN_SERVICE,vci_dsc);
drivers/atm/eni.c
638
while (ENI_VCC(vcc)->descr != (tmp = (readl(vci_dsc+4) & MID_VCI_DESCR)
drivers/atm/eni.c
643
(((unsigned) readl(vci_dsc+4) & MID_VCI_DESCR) >>
drivers/atm/eni.c
685
vci = readl(eni_dev->service+eni_dev->serv_read*4);
drivers/atm/eni.c
749
(readl(vci_dsc+4) & MID_VCI_READ) >> MID_VCI_READ_SHIFT,
drivers/atm/eni.c
848
writel((readl(here) & ~MID_VCI_MODE) | (MID_MODE_TRASH <<
drivers/atm/eni.c
853
writel(readl(here) & ~MID_VCI_IN_SERVICE,here);
drivers/atm/eni.c
880
tmp = readl(eni_dev->vci+vcc->vci*16+4) & MID_VCI_READ;
drivers/atm/fore200e.c
438
return le32_to_cpu(readl(addr));
drivers/atm/fore200e.c
453
int irq_posted = readl(fore200e->regs.pca.psr);
drivers/atm/fore200e.c
456
if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
drivers/atm/he.c
177
#define he_readl(dev, reg) readl((dev)->membase + (reg))
drivers/atm/he.c
2788
val = readl(he_dev->membase + HOST_CNTL);
drivers/atm/idt77252.c
1000
readl(SAR_REG_RSQT));
drivers/atm/idt77252.c
1136
card->name, len, rpp->len, readl(SAR_REG_CDC));
drivers/atm/idt77252.c
1258
tail = readl(SAR_REG_RAWCT);
drivers/atm/idt77252.c
1422
readl(SAR_REG_TSQB),
drivers/atm/idt77252.c
1423
readl(SAR_REG_TSQT),
drivers/atm/idt77252.c
1424
readl(SAR_REG_TSQH));
drivers/atm/idt77252.c
1528
card->index, readl(SAR_REG_TSQH),
drivers/atm/idt77252.c
1529
readl(SAR_REG_TSQT), card->tsq.next);
drivers/atm/idt77252.c
1550
pc = readl(SAR_REG_NOW) >> 2;
drivers/atm/idt77252.c
165
stat = readl(SAR_REG_STAT);
drivers/atm/idt77252.c
167
stat = readl(SAR_REG_STAT);
drivers/atm/idt77252.c
179
value = readl(SAR_REG_DR0);
drivers/atm/idt77252.c
1792
return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) == 0x0f;
drivers/atm/idt77252.c
220
value = readl(SAR_REG_DR0);
drivers/atm/idt77252.c
2704
(void) readl(SAR_REG_CDC);
drivers/atm/idt77252.c
2705
(void) readl(SAR_REG_VPEC);
drivers/atm/idt77252.c
2706
(void) readl(SAR_REG_ICC);
drivers/atm/idt77252.c
2716
stat = readl(SAR_REG_STAT) & 0xffff;
drivers/atm/idt77252.c
2781
writel(readl(SAR_REG_CFG) & ~(SAR_CFG_FBIE), SAR_REG_CFG);
drivers/atm/idt77252.c
2811
stat = readl(SAR_REG_STAT) >> 16;
drivers/atm/idt77252.c
2840
writel(readl(SAR_REG_CFG) | SAR_CFG_FBIE, SAR_REG_CFG);
drivers/atm/idt77252.c
2999
writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
drivers/atm/idt77252.c
3035
writel(readl(SAR_REG_CFG) & ~(conf), SAR_REG_CFG);
drivers/atm/idt77252.c
3317
if (readl(SAR_REG_STAT) & SAR_STAT_TMROF) {
drivers/atm/idt77252.c
3366
writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
drivers/atm/idt77252.c
354
gp = readl(SAR_REG_GP);
drivers/atm/idt77252.c
3593
data = readl(SAR_REG_DR0);
drivers/atm/idt77252.c
995
readl(SAR_REG_RSQB));
drivers/atm/idt77252.c
998
readl(SAR_REG_RSQH),
drivers/atm/idt77252.c
999
readl(SAR_REG_RSQB),
drivers/atm/iphase.c
1064
state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
drivers/atm/iphase.c
1079
state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
drivers/atm/iphase.c
1218
status = readl(iadev->reass_reg+REASS_INTR_STATUS_REG) & 0xffff;
drivers/atm/iphase.c
1228
state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
drivers/atm/iphase.c
1233
state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
drivers/atm/iphase.c
1291
dle_lp = readl(iadev->dma+IPHASE5575_RX_LIST_ADDR) & (sizeof(struct dle)*DLE_ENTRIES - 1);
drivers/atm/iphase.c
1365
state = readl(iadev->reass_reg + STATE_REG) & 0xffff;
drivers/atm/iphase.c
1367
state = readl(iadev->reass_reg + REASS_MASK_REG) & 0xffff;
drivers/atm/iphase.c
1456
readl(iadev->dma + IPHASE5575_TX_LIST_ADDR));
drivers/atm/iphase.c
1459
readl(iadev->dma + IPHASE5575_RX_LIST_ADDR));)
drivers/atm/iphase.c
149
tcq_wr = readl(dev->seg_reg+TCQ_WR_PTR) & 0xffff;
drivers/atm/iphase.c
1668
status = readl(iadev->seg_reg+SEG_INTR_STATUS_REG);
drivers/atm/iphase.c
1698
dle_lp = readl(iadev->dma+IPHASE5575_TX_LIST_ADDR) &
drivers/atm/iphase.c
2226
while( (status = readl(iadev->reg+IPHASE5575_BUS_STATUS_REG) & 0x7f))
drivers/atm/iphase.c
2273
mac1 = cpu_to_be32(le32_to_cpu(readl(
drivers/atm/iphase.c
2275
mac2 = cpu_to_be16(le16_to_cpu(readl(iadev->reg+IPHASE5575_MAC2)));
drivers/atm/iphase.c
2440
ctrl_reg = readl(ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
drivers/atm/iphase.c
2471
return readl(INPH_IA_DEV(dev)->phy+addr);
drivers/atm/iphase.c
2532
readl(iadev->reg+IPHASE5575_BUS_CONTROL_REG));)
drivers/atm/iphase.c
2533
ctrl_reg = readl(iadev->reg+IPHASE5575_BUS_CONTROL_REG);
drivers/atm/iphase.c
2552
readl(iadev->reg+IPHASE5575_BUS_CONTROL_REG));
drivers/atm/iphase.c
2554
readl(iadev->reg+IPHASE5575_BUS_STATUS_REG));)
drivers/atm/iphase.c
2564
ctrl_reg = readl(iadev->reg+IPHASE5575_BUS_CONTROL_REG);
drivers/atm/iphase.c
2567
readl(iadev->reg+IPHASE5575_BUS_CONTROL_REG));)
drivers/atm/iphase.c
2775
if(put_user((u16)(readl(iadev->seg_reg+i) & 0xffff), tmps)) return -EFAULT;
drivers/atm/iphase.c
2783
if(put_user((u16)(readl(iadev->reass_reg+i) & 0xffff), tmps)) return -EFAULT;
drivers/atm/iphase.c
2800
((u_int *)rfL)[i] = readl(iadev->reass_reg + i) & 0xffff;
drivers/atm/iphase.c
2803
((u_int *)ffL)[i] = readl(iadev->seg_reg + i) & 0xffff;
drivers/atm/iphase.c
723
t = readl(iadev->reg+IPHASE5575_EEPROM_ACCESS);
drivers/atm/iphase.c
725
t = readl(iadev->reg+IPHASE5575_EEPROM_ACCESS);
drivers/atm/iphase.c
824
return readl(ia->phy + (reg >> 2));
drivers/atm/iphase.h
1374
t = readl(iadev->reg+IPHASE5575_EEPROM_ACCESS); \
drivers/atm/iphase.h
1388
t = readl(iadev->reg+IPHASE5575_EEPROM_ACCESS); \
drivers/atm/iphase.h
1447
_t = readl(iadev->reg+IPHASE5575_EEPROM_ACCESS); \
drivers/atm/lanai.c
478
t = readl(reg_addr(lanai, reg));
drivers/atm/lanai.c
542
return readl(sram_addr(lanai, offset));
drivers/atm/lanai.c
651
val= readl(lvcc->vbase + offset);
drivers/atm/nicstar.c
1047
writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
drivers/atm/nicstar.c
106
#define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
drivers/atm/nicstar.c
1070
stat_r = readl(card->membase + STAT);
drivers/atm/nicstar.c
1146
while (readl(card->membase + RAWCT) != card->rawch) {
drivers/atm/nicstar.c
1176
writel(readl(card->membase + CFG) &
drivers/atm/nicstar.c
1201
writel(readl(card->membase + CFG) &
drivers/atm/nicstar.c
1441
stat = readl(card->membase + STAT);
drivers/atm/nicstar.c
1550
stat = readl(card->membase + STAT);
drivers/atm/nicstar.c
1551
cfg = readl(card->membase + CFG);
drivers/atm/nicstar.c
1556
card->tsq.last, readl(card->membase + TSQT));
drivers/atm/nicstar.c
1560
card->rsq.last, readl(card->membase + RSQT));
drivers/atm/nicstar.c
1988
stat = readl(card->membase + STAT);
drivers/atm/nicstar.c
2414
stat = readl(card->membase + STAT);
drivers/atm/nicstar.c
2453
phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
drivers/atm/nicstar.c
2491
ns_stat_sfbqc_get(readl(card->membase + STAT));
drivers/atm/nicstar.c
2499
ns_stat_lfbqc_get(readl(card->membase + STAT));
drivers/atm/nicstar.c
2710
stat_r = readl(card->membase + STAT);
drivers/atm/nicstar.c
2753
data = readl(card->membase + DR0) & 0x000000FF;
drivers/atm/nicstar.c
322
data = readl(card->membase + DR0);
drivers/atm/nicstar.c
433
data = readl(card->membase + STAT);
drivers/atm/nicstar.c
455
data = readl(card->membase + DR0);
drivers/atm/nicstar.c
701
ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
drivers/atm/nicstar.c
731
ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
drivers/atm/nicstar.c
966
stat = readl(card->membase + STAT);
drivers/atm/nicstarmac.c
105
while ( readl(bs + STAT) & 0x0200 ) ; \
drivers/atm/nicstarmac.c
108
readl((base)+(reg))
drivers/auxdisplay/arm-charlcd.c
130
data = readl(lcd->virtbase + CHAR_RD) & 0xf0;
drivers/auxdisplay/arm-charlcd.c
143
data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f;
drivers/auxdisplay/arm-charlcd.c
159
readl(lcd->virtbase + CHAR_COM);
drivers/auxdisplay/arm-charlcd.c
80
status = readl(lcd->virtbase + CHAR_STAT) & 0x01;
drivers/base/regmap/regmap-mmio.c
284
return readl(ctx->regs + reg);
drivers/base/regmap/regmap-mmio.c
302
return swab32(readl(ctx->regs + reg));
drivers/bcma/driver_chipcommon_b.c
21
val = readl(addr);
drivers/bcma/driver_pci_host.c
219
readl(mmio);
drivers/bcma/host_soc.c
142
return readl(core->io_wrap + offset);
drivers/bcma/host_soc.c
28
return readl(core->io_addr + offset);
drivers/bcma/scan.c
146
return readl(bus->mmio + offset);
drivers/bcma/scan.c
158
u32 ent = readl(*eromptr);
drivers/block/mtip32xx/mtip32xx.c
1027
if (readl(port->cmd_issue[MTIP_TAG_INDEX(MTIP_TAG_INTERNAL)])
drivers/block/mtip32xx/mtip32xx.c
175
readl(dd->mmio + HOST_CTL);
drivers/block/mtip32xx/mtip32xx.c
1851
task_file_data = readl(dd->port->mmio+PORT_TFDATA);
drivers/block/mtip32xx/mtip32xx.c
187
} while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
drivers/block/mtip32xx/mtip32xx.c
190
if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
drivers/block/mtip32xx/mtip32xx.c
2190
readl(dd->port->s_active[n]));
drivers/block/mtip32xx/mtip32xx.c
2197
readl(dd->port->cmd_issue[n]));
drivers/block/mtip32xx/mtip32xx.c
2204
readl(dd->port->completed[n]));
drivers/block/mtip32xx/mtip32xx.c
2208
readl(dd->port->mmio + PORT_IRQ_STAT));
drivers/block/mtip32xx/mtip32xx.c
2210
readl(dd->mmio + HOST_IRQ_STAT));
drivers/block/mtip32xx/mtip32xx.c
2299
hwdata = readl(dd->mmio + HOST_HSORG);
drivers/block/mtip32xx/mtip32xx.c
2335
hwdata = readl(dd->mmio + HOST_HSORG);
drivers/block/mtip32xx/mtip32xx.c
235
tmp = readl(port->mmio + PORT_CMD);
drivers/block/mtip32xx/mtip32xx.c
242
readl(port->mmio + PORT_CMD);
drivers/block/mtip32xx/mtip32xx.c
261
tmp = readl(port->mmio + PORT_CMD);
drivers/block/mtip32xx/mtip32xx.c
267
readl(port->mmio + PORT_CMD);
drivers/block/mtip32xx/mtip32xx.c
2766
while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
drivers/block/mtip32xx/mtip32xx.c
2788
if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
drivers/block/mtip32xx/mtip32xx.c
2797
writel(readl(dd->mmio + HOST_IRQ_STAT),
drivers/block/mtip32xx/mtip32xx.c
2815
writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
drivers/block/mtip32xx/mtip32xx.c
2829
writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
drivers/block/mtip32xx/mtip32xx.c
2883
writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
drivers/block/mtip32xx/mtip32xx.c
2949
writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
drivers/block/mtip32xx/mtip32xx.c
2988
writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
drivers/block/mtip32xx/mtip32xx.c
326
if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
drivers/block/mtip32xx/mtip32xx.c
339
writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
drivers/block/mtip32xx/mtip32xx.c
346
writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
drivers/block/mtip32xx/mtip32xx.c
349
writel(readl(port->dd->mmio + HOST_IRQ_STAT),
drivers/block/mtip32xx/mtip32xx.c
373
while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
drivers/block/mtip32xx/mtip32xx.c
384
if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
drivers/block/mtip32xx/mtip32xx.c
399
writel(readl(port->mmio + PORT_SCR_CTL) |
drivers/block/mtip32xx/mtip32xx.c
401
readl(port->mmio + PORT_SCR_CTL);
drivers/block/mtip32xx/mtip32xx.c
412
writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
drivers/block/mtip32xx/mtip32xx.c
414
readl(port->mmio + PORT_SCR_CTL);
drivers/block/mtip32xx/mtip32xx.c
418
while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
drivers/block/mtip32xx/mtip32xx.c
425
if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
drivers/block/mtip32xx/mtip32xx.c
449
writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
drivers/block/mtip32xx/mtip32xx.c
524
completed = readl(port->completed[group]);
drivers/block/mtip32xx/mtip32xx.c
690
int status = readl(port->cmd_issue[group]);
drivers/block/mtip32xx/mtip32xx.c
736
hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
drivers/block/mtip32xx/mtip32xx.c
741
port_stat = readl(port->mmio + PORT_IRQ_STAT);
drivers/block/mtip32xx/mtip32xx.c
757
twork->completed = readl(port->completed[i]);
drivers/block/mtip32xx/mtip32xx.c
836
task_file_data = readl(port->mmio+PORT_TFDATA);
drivers/block/mtip32xx/mtip32xx.c
872
active = readl(port->s_active[0]) & 0xFFFFFFFE;
drivers/block/mtip32xx/mtip32xx.c
874
active |= readl(port->s_active[n]);
drivers/block/n64cart.c
49
return readl(reg_base + reg);
drivers/bus/bt1-apb.c
305
readl(apb->res);
drivers/bus/da8xx-mstpri.c
238
reg = readl(mstpri + prio_descr->reg);
drivers/bus/fsl-mc/fsl-mc-bus.c
1055
mc_stream_id = readl(mc->fsl_mc_regs + FSL_MC_FAPR);
drivers/bus/fsl-mc/fsl-mc-bus.c
1083
writel(readl(mc->fsl_mc_regs + FSL_MC_GCR1) &
drivers/bus/fsl-mc/fsl-mc-bus.c
1176
writel(readl(mc->fsl_mc_regs + FSL_MC_GCR1) |
drivers/bus/fsl-mc/fsl-mc-bus.c
1234
writel(readl(fsl_mc_regs + FSL_MC_GCR1) | (GCR1_P1_STOP | GCR1_P2_STOP),
drivers/bus/hisi_lpc.c
82
status = readl(mbase + LPC_REG_OP_STATUS);
drivers/bus/imx-weim.c
226
reg = readl(base + devtype->wcr_offset);
drivers/bus/mhi/ep/mmio.c
15
return readl(mhi_cntrl->mmio + offset);
drivers/bus/mhi/host/pci_generic.c
1052
*out = readl(addr);
drivers/bus/mvebu-mbus.c
1022
s->wins[win].base = readl(addr + WIN_BASE_OFF);
drivers/bus/mvebu-mbus.c
1023
s->wins[win].ctrl = readl(addr + WIN_CTRL_OFF);
drivers/bus/mvebu-mbus.c
1031
s->wins[win].remap_lo = readl(addr_rmp + WIN_REMAP_LO_OFF);
drivers/bus/mvebu-mbus.c
1032
s->wins[win].remap_hi = readl(addr_rmp + WIN_REMAP_HI_OFF);
drivers/bus/mvebu-mbus.c
1035
s->mbus_bridge_ctrl = readl(s->mbusbridge_base +
drivers/bus/mvebu-mbus.c
1037
s->mbus_bridge_base = readl(s->mbusbridge_base +
drivers/bus/mvebu-mbus.c
204
u32 basereg = readl(addr + WIN_BASE_OFF);
drivers/bus/mvebu-mbus.c
205
u32 ctrlreg = readl(addr + WIN_CTRL_OFF);
drivers/bus/mvebu-mbus.c
228
remap_low = readl(addr_rmp + WIN_REMAP_LO_OFF);
drivers/bus/mvebu-mbus.c
229
remap_hi = readl(addr_rmp + WIN_REMAP_HI_OFF);
drivers/bus/mvebu-mbus.c
259
u32 ctrl = readl(addr + WIN_CTRL_OFF);
drivers/bus/mvebu-mbus.c
414
u32 basereg = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i));
drivers/bus/mvebu-mbus.c
415
u32 sizereg = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i));
drivers/bus/mvebu-mbus.c
444
u32 map = readl(mbus->sdramwins_base + DOVE_DDR_BASE_CS_OFF(i));
drivers/bus/mvebu-mbus.c
679
u32 base = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i));
drivers/bus/mvebu-mbus.c
680
u32 size = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i));
drivers/bus/mvebu-mbus.c
711
u32 base = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i));
drivers/bus/mvebu-mbus.c
712
u32 size = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i));
drivers/bus/mvebu-mbus.c
735
u32 map = readl(mbus->sdramwins_base + DOVE_DDR_BASE_CS_OFF(i));
drivers/bus/mvebu-mbus.c
763
u32 map = readl(mbus->sdramwins_base + DOVE_DDR_BASE_CS_OFF(i));
drivers/bus/omap_l3_noc.c
336
(void)readl(mask_regx);
drivers/bus/qcom-ebi2.c
239
val = readl(ebi2_base);
drivers/bus/qcom-ebi2.c
345
val = readl(ebi2_base);
drivers/bus/stm32_etzpc.c
101
readl(etzpc_controller->mmio + ETZPC_HWCFGR));
drivers/bus/stm32_etzpc.c
58
sec_val = (readl(ctrl->mmio + reg_offset) >> offset) & ETZPC_PROT_MASK;
drivers/bus/stm32_etzpc.c
99
readl(etzpc_controller->mmio + ETZPC_HWCFGR));
drivers/bus/stm32_rifsc.c
637
return !(readl(addr) & SEMCR_MUTEX);
drivers/bus/stm32_rifsc.c
649
FIELD_GET(RIFSC_RISC_SCID_MASK, readl(addr)) != RIF_CID1)
drivers/bus/stm32_rifsc.c
667
FIELD_GET(RIFSC_RISC_SCID_MASK, readl(addr)) == RIF_CID1);
drivers/bus/stm32_rifsc.c
688
sec_reg_value = readl(rifsc_controller->mmio + RIFSC_RISC_SECCFGR0 + 0x4 * reg_id);
drivers/bus/stm32_rifsc.c
689
cid_reg_value = readl(rifsc_controller->mmio + RIFSC_RISC_PER0_CIDCFGR + 0x8 * firewall_id);
drivers/bus/stm32_rifsc.c
773
readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2));
drivers/bus/stm32_rifsc.c
775
readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2));
drivers/bus/stm32_rifsc.c
777
readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2));
drivers/bus/sunxi-rsb.c
278
if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) {
drivers/bus/sunxi-rsb.c
308
writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
drivers/bus/sunxi-rsb.c
371
*buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
drivers/bus/sunxi-rsb.c
511
status = readl(rsb->regs + RSB_INTS);
drivers/bus/sunxi-rsb.c
539
writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
drivers/bus/tegra-gmi.c
84
config = readl(gmi->base + TEGRA_GMI_CONFIG);
drivers/bus/uniphier-system-bus.c
121
is_swapped = !(readl(base_reg) & UNIPHIER_SBC_BASE_BE);
drivers/bus/vexpress-config.c
169
command = readl(syscfg->base + SYS_CFGCTRL);
drivers/bus/vexpress-config.c
201
status = readl(syscfg->base + SYS_CFGSTAT);
drivers/bus/vexpress-config.c
212
*data = readl(syscfg->base + SYS_CFGDATA);
drivers/bus/vexpress-config.c
377
master = readl(syscfg->base + SYS_MISC) & SYS_MISC_MASTERSITE ?
drivers/bus/vexpress-config.c
383
u32 id = readl(syscfg->base + (master == VEXPRESS_SITE_DB1 ?
drivers/cache/ax45mp_cache.c
62
return readl(ax45mp_priv.l2c_base + AX45MP_L2C_REG_STATUS_OFFSET);
drivers/cache/sifive_ccache.c
109
cfg = readl(ccache_base + SIFIVE_CCACHE_CONFIG);
drivers/cache/sifive_ccache.c
116
cfg = readl(ccache_base + SIFIVE_CCACHE_WAYENABLE);
drivers/cache/sifive_ccache.c
175
return readl(ccache_base + SIFIVE_CCACHE_WAYENABLE) & 0xFF;
drivers/cache/sifive_ccache.c
211
add_h = readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_HIGH);
drivers/cache/sifive_ccache.c
212
add_l = readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_LOW);
drivers/cache/sifive_ccache.c
215
readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_COUNT);
drivers/cache/sifive_ccache.c
221
add_h = readl(ccache_base + SIFIVE_CCACHE_DIRECCFAIL_HIGH);
drivers/cache/sifive_ccache.c
222
add_l = readl(ccache_base + SIFIVE_CCACHE_DIRECCFAIL_LOW);
drivers/cache/sifive_ccache.c
224
readl(ccache_base + SIFIVE_CCACHE_DIRECCFAIL_COUNT);
drivers/cache/sifive_ccache.c
231
add_h = readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_HIGH);
drivers/cache/sifive_ccache.c
232
add_l = readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_LOW);
drivers/cache/sifive_ccache.c
235
readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_COUNT);
drivers/cache/sifive_ccache.c
241
add_h = readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_HIGH);
drivers/cache/sifive_ccache.c
242
add_l = readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_LOW);
drivers/cache/sifive_ccache.c
245
readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_COUNT);
drivers/char/agp/amd-k7-agp.c
159
readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */
drivers/char/agp/amd-k7-agp.c
166
readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
drivers/char/agp/amd-k7-agp.c
225
readl(amd_irongate_private.registers+AMD_ATTBASE); /* PCI Posting. */
drivers/char/agp/amd-k7-agp.c
246
readl(amd_irongate_private.registers+AMD_TLBFLUSH); /* PCI Posting.*/
drivers/char/agp/amd-k7-agp.c
281
readl(amd_irongate_private.registers+AMD_TLBFLUSH); /* PCI Posting. */
drivers/char/agp/amd-k7-agp.c
303
if (!PGE_EMPTY(agp_bridge, readl(cur_gatt+GET_GATT_OFF(addr))))
drivers/char/agp/amd-k7-agp.c
320
readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
drivers/char/agp/amd-k7-agp.c
340
readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
drivers/char/agp/amd-k7-agp.c
50
readl(page_map->remapped+i); /* PCI Posting. */
drivers/char/agp/amd64-agp.c
71
if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
drivers/char/agp/amd64-agp.c
92
readl(agp_bridge->gatt_table+j); /* PCI Posting. */
drivers/char/agp/ati-agp.c
178
readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL); /* PCI Posting. */
drivers/char/agp/ati-agp.c
226
readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/
drivers/char/agp/ati-agp.c
234
readl(ati_generic_private.registers+ATI_GART_BASE); /* PCI Posting. */
drivers/char/agp/ati-agp.c
282
if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr))))
drivers/char/agp/ati-agp.c
301
readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */
drivers/char/agp/ati-agp.c
327
readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */
drivers/char/agp/ati-agp.c
387
readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */
drivers/char/agp/ati-agp.c
74
readl(page_map->remapped+i); /* PCI Posting. */
drivers/char/agp/generic.c
1083
if (!PGE_EMPTY(bridge, readl(bridge->gatt_table+j)))
drivers/char/agp/generic.c
1099
readl(bridge->gatt_table+j-1); /* PCI Posting. */
drivers/char/agp/generic.c
1138
readl(bridge->gatt_table+i-1); /* PCI Posting. */
drivers/char/agp/generic.c
961
readl(bridge->gatt_table+i); /* PCI Posting. */
drivers/char/agp/intel-gtt.c
1168
val = readl(intel_private.gtt + entry);
drivers/char/agp/intel-gtt.c
197
if ((readl(intel_private.registers+I810_DRAM_CTL)
drivers/char/agp/intel-gtt.c
345
val = readl(intel_private.gtt + entry);
drivers/char/agp/intel-gtt.c
453
pgetbl_ctl2 = readl(intel_private.registers+I965_PGETBL_CTL2);
drivers/char/agp/intel-gtt.c
458
pgetbl_ctl = readl(intel_private.registers+I810_PGETBL_CTL);
drivers/char/agp/intel-gtt.c
489
pgetbl_ctl = readl(intel_private.registers+I810_PGETBL_CTL);
drivers/char/agp/intel-gtt.c
630
readl(intel_private.registers+I810_PGETBL_CTL)
drivers/char/agp/intel-gtt.c
736
writel(readl(intel_private.registers+I830_HIC) | (1<<31),
drivers/char/agp/intel-gtt.c
739
while (readl(intel_private.registers+I830_HIC) & (1<<31)) {
drivers/char/agp/intel-gtt.c
763
val = readl(intel_private.gtt + entry);
drivers/char/agp/intel-gtt.c
802
if (HAS_PGTBL_EN && (readl(reg) & I810_PGETBL_ENABLED) == 0) {
drivers/char/agp/intel-gtt.c
805
readl(reg), intel_private.PGETBL_save);
drivers/char/agp/intel-gtt.c
876
readl(intel_private.gtt + pg);
drivers/char/agp/intel-gtt.c
902
readl(intel_private.gtt + j - 1);
drivers/char/agp/nvidia-agp.c
219
if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j)))
drivers/char/agp/nvidia-agp.c
234
readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j - 1);
drivers/char/agp/nvidia-agp.c
288
temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
drivers/char/agp/nvidia-agp.c
290
temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
drivers/char/agp/parisc-agp.c
217
command = readl(info->lba_regs + info->lba_cap_offset + PCI_AGP_STATUS);
drivers/char/agp/parisc-agp.c
332
cap = readl(lba_hpa + info->lba_cap_offset) & 0xff;
drivers/char/agp/parisc-agp.c
83
agp_bridge->mode = readl(info->lba_regs+info->lba_cap_offset+PCI_AGP_STATUS);
drivers/char/agp/sworks-agp.c
252
while (readl(serverworks_private.registers+SVWRKS_DIRFLUSH) == 1) {
drivers/char/agp/sworks-agp.c
281
readl(serverworks_private.registers+SVWRKS_GATTBASE); /* PCI Posting. */
drivers/char/agp/sworks-agp.c
336
if (!PGE_EMPTY(agp_bridge, readl(cur_gatt+GET_GATT_OFF(addr))))
drivers/char/hpet.c
113
!(isr & readl(&devp->hd_hpet->hpet_isr)))
drivers/char/hpet.c
179
v = readl(&timer->hpet_config);
drivers/char/hpet.c
214
v = readl(&timer->hpet_config);
drivers/char/hpet.c
456
if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
drivers/char/hpet.c
471
writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
drivers/char/hpet.c
61
#define read_counter(MC) readl(MC)
drivers/char/hw_random/airoha-trng.c
130
val = readl(trng->base + TRNG_NS_SEK_AND_DAT_EN);
drivers/char/hw_random/airoha-trng.c
152
*data = readl(trng->base + TRNG_RAW_DATA_OUT);
drivers/char/hw_random/airoha-trng.c
198
val = readl(trng->base + TRNG_INTR_EN);
drivers/char/hw_random/airoha-trng.c
203
val = readl(trng->base + TRNG_NS_SEK_AND_DAT_EN);
drivers/char/hw_random/airoha-trng.c
58
val = readl(trng->base + TRNG_INTR_EN);
drivers/char/hw_random/airoha-trng.c
69
val = readl(trng->base + TRNG_INTR_EN);
drivers/char/hw_random/airoha-trng.c
82
val = readl(trng->base + TRNG_NS_SEK_AND_DAT_EN);
drivers/char/hw_random/airoha-trng.c
98
val = readl(trng->base + TRNG_HEALTH_TEST_STATUS);
drivers/char/hw_random/atmel-rng.c
48
ready = readl(trng->base + TRNG_ISR) & TRNG_ISR_DATRDY;
drivers/char/hw_random/atmel-rng.c
73
*data = readl(trng->base + TRNG_ODATA);
drivers/char/hw_random/atmel-rng.c
79
readl(trng->base + TRNG_ISR);
drivers/char/hw_random/bcm2835-rng.c
51
return readl(priv->base + offset);
drivers/char/hw_random/geode-rng.c
64
*data = readl(mem + GEODE_RNG_DATA_REG);
drivers/char/hw_random/geode-rng.c
76
data = !!(readl(mem + GEODE_RNG_STATUS_REG));
drivers/char/hw_random/imx-rngc.c
100
ctrl = readl(rngc->base + RNGC_CONTROL);
drivers/char/hw_random/imx-rngc.c
113
cmd = readl(rngc->base + RNGC_COMMAND);
drivers/char/hw_random/imx-rngc.c
136
status = readl(rngc->base + RNGC_STATUS);
drivers/char/hw_random/imx-rngc.c
144
*(u32 *)data = readl(rngc->base + RNGC_FIFO);
drivers/char/hw_random/imx-rngc.c
166
status = readl(rngc->base + RNGC_STATUS);
drivers/char/hw_random/imx-rngc.c
167
rngc->err_reg = readl(rngc->base + RNGC_ERROR);
drivers/char/hw_random/imx-rngc.c
188
cmd = readl(rngc->base + RNGC_COMMAND);
drivers/char/hw_random/imx-rngc.c
196
cmd = readl(rngc->base + RNGC_COMMAND);
drivers/char/hw_random/imx-rngc.c
217
ctrl = readl(rngc->base + RNGC_CONTROL);
drivers/char/hw_random/imx-rngc.c
272
ver_id = readl(rngc->base + RNGC_VER_ID);
drivers/char/hw_random/imx-rngc.c
82
ctrl = readl(rngc->base + RNGC_CONTROL);
drivers/char/hw_random/imx-rngc.c
91
cmd = readl(rngc->base + RNGC_COMMAND);
drivers/char/hw_random/ingenic-rng.c
78
*data = readl(priv->base + RNG_REG_RNG_OFFSET);
drivers/char/hw_random/ingenic-trng.c
40
ctrl = readl(trng->base + TRNG_REG_CFG_OFFSET);
drivers/char/hw_random/ingenic-trng.c
52
ctrl = readl(trng->base + TRNG_REG_CFG_OFFSET);
drivers/char/hw_random/ingenic-trng.c
71
*data = readl(trng->base + TRNG_REG_RANDOMNUM_OFFSET);
drivers/char/hw_random/jh7110-trng.c
136
u32 data = readl(trng->base + STARFIVE_ISTAT);
drivers/char/hw_random/jh7110-trng.c
188
mode = readl(trng->base + STARFIVE_MODE);
drivers/char/hw_random/jh7110-trng.c
212
status = readl(trng->base + STARFIVE_ISTAT);
drivers/char/hw_random/ks-sa-rng.c
141
value = readl(&ks_sa_rng->reg_rng->control);
drivers/char/hw_random/ks-sa-rng.c
167
data[0] = readl(&ks_sa_rng->reg_rng->output_l);
drivers/char/hw_random/ks-sa-rng.c
168
data[1] = readl(&ks_sa_rng->reg_rng->output_h);
drivers/char/hw_random/ks-sa-rng.c
193
ready = readl(&ks_sa_rng->reg_rng->status);
drivers/char/hw_random/mtk-rng.c
52
val = readl(priv->base + RNG_CTRL);
drivers/char/hw_random/mtk-rng.c
64
val = readl(priv->base + RNG_CTRL);
drivers/char/hw_random/mtk-rng.c
76
ready = readl(priv->base + RNG_CTRL) & RNG_READY;
drivers/char/hw_random/mtk-rng.c
95
*(u32 *)buf = readl(priv->base + RNG_DATA);
drivers/char/hw_random/pic32-rng.c
58
t = readl(priv->base + RNGRCNT) & RCNT_MASK;
drivers/char/hw_random/pic32-rng.c
61
*data = ((u64)readl(priv->base + RNGSEED2) << 32) +
drivers/char/hw_random/pic32-rng.c
62
readl(priv->base + RNGSEED1);
drivers/char/hw_random/rockchip-rng.c
154
return readl(rng->base + offset);
drivers/char/hw_random/timeriomem-rng.c
74
*(u32 *)data = readl(priv->io_base);
drivers/char/hw_random/xgene-rng.c
121
val = readl(ctx->csr_base + RNG_INTR_STS_ACK);
drivers/char/hw_random/xgene-rng.c
167
frostopped = readl(ctx->csr_base + RNG_ALARMSTOP);
drivers/char/hw_random/xgene-rng.c
192
frostopped = readl(ctx->csr_base + RNG_ALARMSTOP);
drivers/char/hw_random/xgene-rng.c
216
val = readl(ctx->csr_base + RNG_INTR_STS_ACK);
drivers/char/hw_random/xgene-rng.c
231
data[i] = readl(ctx->csr_base + RNG_INOUT_0 + i * 4);
drivers/char/hw_random/xgene-rng.c
281
ctx->revision = readl(ctx->csr_base + RNG_EIP_REV);
drivers/char/hw_random/xgene-rng.c
289
readl(ctx->csr_base + RNG_OPTIONS));
drivers/char/hw_random/xiphera-trng.c
102
if (readl(trng->mem + STATUS_REG) != TRNG_SUCCESSFUL_STARTUP) {
drivers/char/hw_random/xiphera-trng.c
104
if (readl(trng->mem + STATUS_REG) == TRNG_FAILED_STARTUP) {
drivers/char/hw_random/xiphera-trng.c
42
if (readl(trng->mem + STATUS_REG) == TRNG_NEW_RAND_AVAILABLE) {
drivers/char/hw_random/xiphera-trng.c
43
*(u32 *)buf = readl(trng->mem + RAND_REG);
drivers/char/hw_random/xiphera-trng.c
81
if (readl(trng->mem + STATUS_REG) != TRNG_ACK_RESET) {
drivers/char/hw_random/xiphera-trng.c
87
if (readl(trng->mem + STATUS_REG) != TRNG_ACK_RESET) {
drivers/char/ipmi/bt-bmc.c
362
reg = readl(bt_bmc->base + BT_CR2);
drivers/char/ipmi/bt-bmc.c
400
reg = readl(bt_bmc->base + BT_CR1);
drivers/char/ipmi/ipmi_si_ls2k.c
102
writel(readl(addr + LS2K_KCS_WR_REQ) + 1, addr + LS2K_KCS_WR_REQ);
drivers/char/ipmi/ipmi_si_ls2k.c
123
writel(readl(addr + LS2K_KCS_WR_REQ) + 1, addr + LS2K_KCS_WR_REQ);
drivers/char/ipmi/ipmi_si_mem_io.c
34
return (readl((io->addr)+(offset * io->regspacing)) >> io->regshift)
drivers/clk/aspeed/clk-ast2600.c
839
soc_rev = (readl(scu_g6_base + ASPEED_G6_SILICON_REV) & CHIP_REVISION_ID) >> 16;
drivers/clk/aspeed/clk-ast2700.c
629
val = readl(clk_ctrl->base + SCU0_CLK_SEL2);
drivers/clk/aspeed/clk-ast2700.c
635
val = readl(reg);
drivers/clk/aspeed/clk-ast2700.c
651
val = readl(clk_ctrl->base + SCU0_HWSTRAP1);
drivers/clk/aspeed/clk-ast2700.c
652
if ((readl(clk_ctrl->base) & REVISION_ID) && (val & BIT(3))) {
drivers/clk/aspeed/clk-ast2700.c
684
val = readl(reg);
drivers/clk/aspeed/clk-ast2700.c
710
u32 val = readl(reg);
drivers/clk/aspeed/clk-ast2700.c
744
u32 val = readl(reg);
drivers/clk/aspeed/clk-ast2700.c
762
div = readl(reg) + 1;
drivers/clk/aspeed/clk-ast2700.c
764
if (readl(clk_ctrl->base) & REVISION_ID)
drivers/clk/aspeed/clk-ast2700.c
765
div = (GET_USB_REFCLK_DIV(readl(reg)) + 1) << 4;
drivers/clk/aspeed/clk-ast2700.c
767
div = (GET_USB_REFCLK_DIV(readl(reg)) + 1) << 1;
drivers/clk/aspeed/clk-ast2700.c
782
reg = readl(gate->reg);
drivers/clk/aspeed/clk-ast2700.c
792
if (readl(gate->reg) & clk)
drivers/clk/aspeed/clk-ast2700.c
853
if (readl(clk_ctrl->base) & REVISION_ID) {
drivers/clk/aspeed/clk-ast2700.c
857
val = readl(clk_ctrl->base + SCU1_CLK_SEL2) & ~SCU1_CLK_I3C_DIV_MASK;
drivers/clk/at91/sckc.c
105
u32 tmp = readl(sckcr);
drivers/clk/at91/sckc.c
151
writel((readl(sckcr) & ~osc->bits->cr_osc32en) |
drivers/clk/at91/sckc.c
193
writel(readl(sckcr) | osc->bits->cr_rcen, sckcr);
drivers/clk/at91/sckc.c
208
writel(readl(sckcr) & ~osc->bits->cr_rcen, sckcr);
drivers/clk/at91/sckc.c
215
return !!(readl(osc->sckcr) & osc->bits->cr_rcen);
drivers/clk/at91/sckc.c
286
tmp = readl(sckcr);
drivers/clk/at91/sckc.c
311
return !!(readl(slowck->sckcr) & slowck->bits->cr_oscsel);
drivers/clk/at91/sckc.c
348
slowck->parent = !!(readl(sckcr) & slowck->bits->cr_oscsel);
drivers/clk/at91/sckc.c
556
if ((readl(osc->sckcr) & osc->bits->cr_oscsel)) {
drivers/clk/at91/sckc.c
74
u32 tmp = readl(sckcr);
drivers/clk/at91/sckc.c
93
u32 tmp = readl(sckcr);
drivers/clk/axis/clk-artpec6.c
186
muxreg = readl(clkdata->syscon_base + 0x14);
drivers/clk/axis/clk-artpec6.c
195
muxreg = readl(clkdata->syscon_base + 0x14);
drivers/clk/axis/clk-artpec6.c
65
pll_mode = (readl(clkdata->syscon_base) >> 6) & 3;
drivers/clk/bcm/clk-bcm2835.c
342
return readl(cprman->regs + reg);
drivers/clk/bcm/clk-iproc-armpll.c
121
val = readl(pll->base + IPROC_CLK_PLLARMC_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
128
val = readl(pll->base + IPROC_CLK_PLLARMCTL5_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
146
val = readl(pll->base + IPROC_CLK_PLLARM_OFFSET_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
160
val = readl(pll->base + IPROC_CLK_PLLARMA_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
166
val = readl(pll->base + IPROC_CLK_PLLARMB_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
195
val = readl(pll->base + IPROC_CLK_PLLARMC_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
202
val = readl(pll->base + IPROC_CLK_PLLARMA_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
71
val = readl(pll->base + IPROC_CLK_ARM_DIV_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
80
val = readl(pll->base + IPROC_CLK_POLICY_FREQ_OFFSET);
drivers/clk/bcm/clk-iproc-armpll.c
84
val = readl(pll->base + IPROC_CLK_POLICY_DBG_OFFSET);
drivers/clk/bcm/clk-iproc-asiu.c
137
val = readl(asiu->div_base + clk->div.offset);
drivers/clk/bcm/clk-iproc-asiu.c
151
val = readl(asiu->div_base + clk->div.offset);
drivers/clk/bcm/clk-iproc-asiu.c
46
val = readl(asiu->gate_base + clk->gate.offset);
drivers/clk/bcm/clk-iproc-asiu.c
63
val = readl(asiu->gate_base + clk->gate.offset);
drivers/clk/bcm/clk-iproc-asiu.c
82
val = readl(asiu->div_base + clk->div.offset);
drivers/clk/bcm/clk-iproc-pll.c
153
u32 val = readl(pll->status_base + ctrl->status.offset);
drivers/clk/bcm/clk-iproc-pll.c
172
val = readl(base + offset);
drivers/clk/bcm/clk-iproc-pll.c
181
val = readl(pll->asiu_base + ctrl->asiu.offset);
drivers/clk/bcm/clk-iproc-pll.c
187
val = readl(pll->control_base + ctrl->aon.offset);
drivers/clk/bcm/clk-iproc-pll.c
194
val = readl(pll->pwr_base + ctrl->aon.offset);
drivers/clk/bcm/clk-iproc-pll.c
210
val = readl(pll->control_base + ctrl->aon.offset);
drivers/clk/bcm/clk-iproc-pll.c
217
val = readl(pll->pwr_base + ctrl->aon.offset);
drivers/clk/bcm/clk-iproc-pll.c
225
val = readl(pll->asiu_base + ctrl->asiu.offset);
drivers/clk/bcm/clk-iproc-pll.c
239
val = readl(pll->control_base + reset->offset);
drivers/clk/bcm/clk-iproc-pll.c
255
val = readl(pll->control_base + dig_filter->offset);
drivers/clk/bcm/clk-iproc-pll.c
263
val = readl(pll->control_base + reset->offset);
drivers/clk/bcm/clk-iproc-pll.c
285
val = readl(pll->status_base + ctrl->status.offset);
drivers/clk/bcm/clk-iproc-pll.c
289
val = readl(pll->control_base + ctrl->ndiv_int.offset);
drivers/clk/bcm/clk-iproc-pll.c
296
val = readl(pll->control_base + ctrl->pdiv.offset);
drivers/clk/bcm/clk-iproc-pll.c
357
val = readl(pll->control_base + ctrl->ndiv_frac.offset);
drivers/clk/bcm/clk-iproc-pll.c
372
val = readl(pll->control_base + ctrl->macro_mode.offset);
drivers/clk/bcm/clk-iproc-pll.c
382
val = readl(pll->control_base + ctrl->vco_ctrl.l_offset);
drivers/clk/bcm/clk-iproc-pll.c
395
val = readl(pll->control_base + ctrl->ndiv_int.offset);
drivers/clk/bcm/clk-iproc-pll.c
402
val = readl(pll->control_base + ctrl->ndiv_frac.offset);
drivers/clk/bcm/clk-iproc-pll.c
411
val = readl(pll->control_base + ctrl->pdiv.offset);
drivers/clk/bcm/clk-iproc-pll.c
462
val = readl(pll->status_base + ctrl->status.offset);
drivers/clk/bcm/clk-iproc-pll.c
471
val = readl(pll->control_base + ctrl->ndiv_int.offset);
drivers/clk/bcm/clk-iproc-pll.c
477
val = readl(pll->control_base + ctrl->ndiv_frac.offset);
drivers/clk/bcm/clk-iproc-pll.c
483
val = readl(pll->control_base + ctrl->pdiv.offset);
drivers/clk/bcm/clk-iproc-pll.c
583
val = readl(pll->control_base + ctrl->enable.offset);
drivers/clk/bcm/clk-iproc-pll.c
588
val = readl(pll->control_base + ctrl->enable.offset);
drivers/clk/bcm/clk-iproc-pll.c
605
val = readl(pll->control_base + ctrl->enable.offset);
drivers/clk/bcm/clk-iproc-pll.c
623
val = readl(pll->control_base + ctrl->mdiv.offset);
drivers/clk/bcm/clk-iproc-pll.c
677
val = readl(pll->control_base + ctrl->mdiv.offset);
drivers/clk/bcm/clk-iproc-pll.c
708
val = readl(pll->control_base + ctrl->sw_ctrl.offset);
drivers/clk/bcm/clk-kona.c
107
return readl(ccu->base + reg_offset);
drivers/clk/clk-axi-clkgen.c
248
*val = readl(axi_clkgen->base + reg);
drivers/clk/clk-bm1880.c
499
regval = readl(pll_hw->base + pll_hw->pll.reg);
drivers/clk/clk-bm1880.c
598
if (!(readl(reg_addr) & BIT(3))) {
drivers/clk/clk-bm1880.c
601
val = readl(reg_addr) >> div->shift;
drivers/clk/clk-bm1880.c
621
val = readl(reg_addr) >> div->shift;
drivers/clk/clk-bm1880.c
651
val = readl(reg_addr);
drivers/clk/clk-clps711x.c
63
tmp = readl(base + CLPS711X_PLLR) >> 24;
drivers/clk/clk-clps711x.c
69
tmp = readl(base + CLPS711X_SYSFLG2);
drivers/clk/clk-clps711x.c
87
if (readl(base + CLPS711X_SYSCON2) & SYSCON2_OSTB)
drivers/clk/clk-clps711x.c
94
tmp = readl(base + CLPS711X_SYSCON1);
drivers/clk/clk-divider.c
34
return readl(divider->reg);
drivers/clk/clk-en7523.c
443
return !!(readl(cg->base + REG_PCI_CONTROL) & REG_PCI_CONTROL_REFCLK_EN1);
drivers/clk/clk-en7523.c
453
val = readl(np_base + REG_PCI_CONTROL);
drivers/clk/clk-en7523.c
464
val = readl(np_base + REG_RESET_CONTROL1);
drivers/clk/clk-en7523.c
476
val = readl(np_base + REG_PCI_CONTROL);
drivers/clk/clk-en7523.c
491
val = readl(np_base + REG_PCI_CONTROL);
drivers/clk/clk-en7523.c
528
val = readl(cg->base + REG_PCI_CONTROL);
drivers/clk/clk-en7523.c
541
val = readl(np_base + REG_PCI_CONTROL);
drivers/clk/clk-en7523.c
556
val = readl(np_base + REG_PCI_CONTROL);
drivers/clk/clk-en7523.c
571
u32 val = readl(base + desc->base_reg);
drivers/clk/clk-en7523.c
574
val = readl(base + reg);
drivers/clk/clk-en7523.c
659
val = readl(addr);
drivers/clk/clk-en7523.c
687
return !!(readl(addr) & BIT(id % RST_NR_PER_BANK));
drivers/clk/clk-en7523.c
748
val = readl(base + REG_NP_SCU_SSTR);
drivers/clk/clk-en7523.c
751
val = readl(base + REG_NP_SCU_PCIC);
drivers/clk/clk-fixed-mmio.c
32
freq = readl(base);
drivers/clk/clk-fractional-divider.c
58
return readl(fd->reg);
drivers/clk/clk-gate.c
32
return readl(gate->reg);
drivers/clk/clk-highbank.c
155
reg = readl(hbclk->reg);
drivers/clk/clk-highbank.c
167
while ((readl(hbclk->reg) & HB_PLL_LOCK) == 0)
drivers/clk/clk-highbank.c
169
while ((readl(hbclk->reg) & HB_PLL_LOCK_500) == 0)
drivers/clk/clk-highbank.c
198
u32 div = (readl(hbclk->reg) & HB_A9_PCLK_DIV) ? 8 : 4;
drivers/clk/clk-highbank.c
210
u32 div = (readl(hbclk->reg) & HB_A9_BCLK_DIV_MASK) >> HB_A9_BCLK_DIV_SHIFT;
drivers/clk/clk-highbank.c
225
div = readl(hbclk->reg) & 0x1f;
drivers/clk/clk-highbank.c
48
reg = readl(hbclk->reg);
drivers/clk/clk-highbank.c
52
while ((readl(hbclk->reg) & HB_PLL_LOCK) == 0)
drivers/clk/clk-highbank.c
54
while ((readl(hbclk->reg) & HB_PLL_LOCK_500) == 0)
drivers/clk/clk-highbank.c
65
reg = readl(hbclk->reg);
drivers/clk/clk-highbank.c
75
reg = readl(hbclk->reg);
drivers/clk/clk-highbank.c
87
reg = readl(hbclk->reg);
drivers/clk/clk-highbank.c
98
reg = readl(hbclk->reg);
drivers/clk/clk-k210.c
344
u32 reg = readl(regs + K210_SYSCTL_SEL0);
drivers/clk/clk-k210.c
369
reg = readl(pll->lock);
drivers/clk/clk-k210.c
380
u32 reg = readl(pll->reg);
drivers/clk/clk-k210.c
405
reg = readl(pll->reg);
drivers/clk/clk-k210.c
465
reg = readl(pll->reg);
drivers/clk/clk-k210.c
484
u32 reg = readl(pll->reg);
drivers/clk/clk-k210.c
516
reg = readl(pll->reg);
drivers/clk/clk-k210.c
529
u32 reg = readl(pll->reg);
drivers/clk/clk-k210.c
617
sel = readl(ksc->regs + K210_SYSCTL_SEL0) & K210_ACLK_SEL;
drivers/clk/clk-k210.c
626
u32 reg = readl(ksc->regs + K210_SYSCTL_SEL0);
drivers/clk/clk-k210.c
686
reg = readl(ksc->regs + cfg->gate_reg);
drivers/clk/clk-k210.c
706
reg = readl(ksc->regs + cfg->gate_reg);
drivers/clk/clk-k210.c
721
reg = readl(ksc->regs + cfg->mux_reg);
drivers/clk/clk-k210.c
741
reg = readl(ksc->regs + cfg->mux_reg);
drivers/clk/clk-k210.c
759
reg = readl(ksc->regs + cfg->div_reg);
drivers/clk/clk-lan966x.c
106
u32 val = readl(gck->reg);
drivers/clk/clk-lan966x.c
117
u32 val = readl(gck->reg);
drivers/clk/clk-lan966x.c
128
u32 div, val = readl(gck->reg);
drivers/clk/clk-lan966x.c
146
u32 div, val = readl(gck->reg);
drivers/clk/clk-lan966x.c
179
u32 val = readl(gck->reg);
drivers/clk/clk-lan966x.c
187
u32 val = readl(gck->reg);
drivers/clk/clk-loongson1.c
121
val = readl(ls1x_clk->reg);
drivers/clk/clk-loongson1.c
128
val = readl(ls1x_clk->reg);
drivers/clk/clk-loongson1.c
134
val = readl(ls1x_clk->reg);
drivers/clk/clk-loongson1.c
67
val = readl(ls1x_clk->reg);
drivers/clk/clk-loongson1.c
89
val = readl(ls1x_clk->reg) >> d->shift;
drivers/clk/clk-milbeaut.c
285
val = readl(mux->reg) >> mux->shift;
drivers/clk/clk-milbeaut.c
304
reg = readl(mux->reg);
drivers/clk/clk-milbeaut.c
382
val = readl(divider->reg) >> divider->shift;
drivers/clk/clk-milbeaut.c
398
val = readl(divider->reg) >> divider->shift;
drivers/clk/clk-milbeaut.c
428
val = readl(divider->reg);
drivers/clk/clk-moxart.c
34
mul = readl(base + 0x30) >> 3 & 0x3f;
drivers/clk/clk-moxart.c
74
val = readl(base + 0xc) >> 4 & 0x7;
drivers/clk/clk-multiplier.c
20
return readl(mult->reg);
drivers/clk/clk-mux.c
32
return readl(mux->reg);
drivers/clk/clk-nomadik.c
107
val = readl(src_base + SRC_CR);
drivers/clk/clk-nomadik.c
118
val = readl(src_base + SRC_XTALCR);
drivers/clk/clk-nomadik.c
174
val = readl(src_base + SRC_PLLCR);
drivers/clk/clk-nomadik.c
194
val = readl(src_base + SRC_PLLCR);
drivers/clk/clk-nomadik.c
212
val = readl(src_base + SRC_PLLCR);
drivers/clk/clk-nomadik.c
228
val = readl(src_base + SRC_PLLFR);
drivers/clk/clk-nomadik.c
312
while (!(readl(src_base + sreg) & sclk->clkbit))
drivers/clk/clk-nomadik.c
325
while (readl(src_base + sreg) & sclk->clkbit)
drivers/clk/clk-nomadik.c
333
u32 val = readl(src_base + sreg);
drivers/clk/clk-nomadik.c
465
u32 src_pcksr0 = readl(src_base + SRC_PCKSR0);
drivers/clk/clk-nomadik.c
466
u32 src_pcksr1 = readl(src_base + SRC_PCKSR1);
drivers/clk/clk-nomadik.c
467
u32 src_pckensr0 = readl(src_base + SRC_PCKENSR0);
drivers/clk/clk-nomadik.c
468
u32 src_pckensr1 = readl(src_base + SRC_PCKENSR1);
drivers/clk/clk-nomadik.c
493
src_pcksr0_boot = readl(src_base + SRC_PCKSR0);
drivers/clk/clk-nomadik.c
494
src_pcksr1_boot = readl(src_base + SRC_PCKSR1);
drivers/clk/clk-nomadik.c
72
val = readl(src_base + SRC_XTALCR);
drivers/clk/clk-nspire.c
117
val = readl(io);
drivers/clk/clk-nspire.c
76
val = readl(io);
drivers/clk/clk-plldig.c
108
val = readl(data->regs + PLLDIG_REG_PLLDV);
drivers/clk/clk-plldig.c
161
val = readl(data->regs + PLLDIG_REG_PLLDV);
drivers/clk/clk-plldig.c
70
val = readl(data->regs + PLLDIG_REG_PLLFM);
drivers/clk/clk-plldig.c
86
val = readl(data->regs + PLLDIG_REG_PLLFM);
drivers/clk/clk-plldig.c
98
return readl(data->regs + PLLDIG_REG_PLLFM) &
drivers/clk/clk-sp7021.c
436
u32 reg = readl(clk->reg);
drivers/clk/clk-sp7021.c
446
r = FIELD_GET(MASK_DIVR, readl(clk->reg + 4));
drivers/clk/clk-sp7021.c
447
reg2 = readl(clk->reg + 8);
drivers/clk/clk-sp7021.c
527
return readl(clk->reg) & BIT(clk->pd_bit);
drivers/clk/clk-sparx5.c
148
u32 val = readl(pll->reg);
drivers/clk/clk-sparx5.c
159
u32 val = readl(pll->reg);
drivers/clk/clk-sparx5.c
178
val = readl(pll->reg) & PLL_CLK_ENA;
drivers/clk/clk-sparx5.c
199
val = readl(pll->reg);
drivers/clk/clk-stm32f4.c
1046
val = readl(base + STM32F4_RCC_BDCR);
drivers/clk/clk-stm32f4.c
1073
bit_status = !(readl(gate->reg) & BIT(rgate->bit_rdy_idx));
drivers/clk/clk-stm32f4.c
1889
pllm = readl(base + STM32F4_RCC_PLLCFGR) & 0x3f;
drivers/clk/clk-stm32f4.c
440
if (readl(base + STM32F4_RCC_CFGR) & BIT(am->bit_idx))
drivers/clk/clk-stm32f4.c
452
if (readl(base + STM32F4_RCC_CFGR) & BIT(am->bit_idx))
drivers/clk/clk-stm32f4.c
649
bit_status = !(readl(gate->reg) & BIT(pll->bit_rdy_idx));
drivers/clk/clk-stm32f4.c
669
val = readl(base + pll->offset);
drivers/clk/clk-stm32f4.c
703
sscgr = readl(base + STM32F4_RCC_SSCGR);
drivers/clk/clk-stm32f4.c
737
val = readl(base + pll->offset) & ~STM32F4_RCC_PLLCFGR_N_MASK;
drivers/clk/clk-stm32f4.c
876
val = readl(base + pll->offset);
drivers/clk/clk-stm32f4.c
960
pll->status = (readl(base + STM32F4_RCC_CR) >> vco->bit_idx) & 0x1;
drivers/clk/clk-stm32h7.c
178
bit_status = !(readl(gate->reg) & BIT(rgate->bit_rdy));
drivers/clk/clk-stm32h7.c
201
bit_status = !!(readl(gate->reg) & BIT(rgate->bit_rdy));
drivers/clk/clk-stm32h7.c
440
timpre = (readl(base + RCC_CFGR) >> 15) & 0x01;
drivers/clk/clk-stm32h7.c
442
prescaler = (readl(base + RCC_D2CFGR) >> dppre_shift) & 0x03;
drivers/clk/clk-stm32h7.c
730
return (readl(fd->freg_status) >> fd->freg_bit) & 0x01;
drivers/clk/clk-stm32h7.c
738
return (readl(fd->freg_value) >> fd->fshift) &
drivers/clk/clk-stm32h7.c
751
val = readl(fd->mreg);
drivers/clk/clk-stm32h7.c
755
val = readl(fd->nreg);
drivers/clk/clk-vt8500.c
109
u32 en_val = (readl(cdev->en_reg) & BIT(cdev->en_bit));
drivers/clk/clk-vt8500.c
118
u32 div = readl(cdev->div_reg) & cdev->div_mask;
drivers/clk/clk-vt8500.c
651
u32 pll_val = readl(pll->reg);
drivers/clk/clk-vt8500.c
71
while (readl(pmc_base) & VT8500_PMC_BUSY_MASK)
drivers/clk/clk-vt8500.c
83
en_val = readl(cdev->en_reg);
drivers/clk/clk-vt8500.c
99
en_val = readl(cdev->en_reg);
drivers/clk/clk-xgene.c
250
val = readl(fd->reg);
drivers/clk/clk-xgene.c
326
val = readl(fd->reg);
drivers/clk/davinci/pll.c
120
mult = readl(pll->base + PLLM) & pll->pllm_mask;
drivers/clk/davinci/pll.c
212
mult = readl(pll->base + PLLM) & pll->pllm_mask;
drivers/clk/davinci/pll.c
312
ctrl = readl(pll->base + PLLCTL);
drivers/clk/davinci/pll.c
610
oscdiv = readl(base + OSCDIV);
drivers/clk/davinci/pll.c
649
pllcmd = readl(pll->base + PLLCMD);
drivers/clk/davinci/pll.c
656
pllstat = readl(pll->base + PLLSTAT);
drivers/clk/hisilicon/clk-hi3660-stub.c
66
stub_clk->rate = readl(freq_reg + (stub_clk->id << 2)) * MHZ;
drivers/clk/hisilicon/clk-hisi-phase.c
47
regval = readl(phase->reg);
drivers/clk/hisilicon/clk-hisi-phase.c
78
val = readl(phase->reg);
drivers/clk/hisilicon/reset.c
56
reg = readl(rstc->membase + offset);
drivers/clk/hisilicon/reset.c
77
reg = readl(rstc->membase + offset);
drivers/clk/imx/clk-composite-7ulp.c
48
val = readl(gate->reg);
drivers/clk/imx/clk-composite-7ulp.c
60
readl(gate->reg);
drivers/clk/imx/clk-composite-7ulp.c
95
val = readl(reg);
drivers/clk/imx/clk-composite-8m.c
120
val = readl(divider->reg);
drivers/clk/imx/clk-composite-8m.c
160
reg = readl(mux->reg);
drivers/clk/imx/clk-composite-8m.c
199
val = readl(gate->reg);
drivers/clk/imx/clk-composite-8m.c
36
prediv_value = readl(divider->reg) >> divider->shift;
drivers/clk/imx/clk-composite-8m.c
43
div_value = readl(divider->reg) >> PCG_DIV_SHIFT;
drivers/clk/imx/clk-composite-8m.c
94
orig = readl(divider->reg);
drivers/clk/imx/clk-composite-93.c
123
val = readl(divider->reg);
drivers/clk/imx/clk-composite-93.c
158
reg = readl(mux->reg);
drivers/clk/imx/clk-composite-93.c
217
authen = readl(reg + AUTHEN_OFFSET);
drivers/clk/imx/clk-composite-93.c
55
reg = readl(gate->reg);
drivers/clk/imx/clk-divider-gate.c
117
val = readl(div->reg);
drivers/clk/imx/clk-divider-gate.c
136
val = readl(div->reg) >> div->shift;
drivers/clk/imx/clk-divider-gate.c
149
val = readl(div->reg) >> div->shift;
drivers/clk/imx/clk-divider-gate.c
209
val = readl(reg) >> shift;
drivers/clk/imx/clk-divider-gate.c
32
val = readl(div->reg) >> div->shift;
drivers/clk/imx/clk-divider-gate.c
54
val = readl(div->reg) >> div->shift;
drivers/clk/imx/clk-divider-gate.c
90
val = readl(div->reg);
drivers/clk/imx/clk-fixup-div.c
71
val = readl(div->reg);
drivers/clk/imx/clk-fixup-mux.c
51
val = readl(mux->reg);
drivers/clk/imx/clk-fracn-gppll.c
264
readl(pll->base + PLL_DIV);
drivers/clk/imx/clk-fracn-gppll.c
268
readl(pll->base + PLL_NUMERATOR);
drivers/clk/imx/clk-fracn-gppll.c
277
readl(pll->base + PLL_CTRL);
drivers/clk/imx/clk-fracn-gppll.c
315
readl(pll->base + PLL_CTRL);
drivers/clk/imx/clk-gate-93.c
103
u32 val = readl(gate->reg + AUTHEN_OFFSET);
drivers/clk/imx/clk-gate-93.c
106
val = readl(gate->reg + LPM_CUR_OFFSET);
drivers/clk/imx/clk-gate-93.c
110
val = readl(gate->reg);
drivers/clk/imx/clk-gate-93.c
187
authen = readl(reg + AUTHEN_OFFSET);
drivers/clk/imx/clk-gate-93.c
52
val = readl(gate->reg + AUTHEN_OFFSET);
drivers/clk/imx/clk-gate-93.c
57
val = readl(gate->reg + DIRECT_OFFSET);
drivers/clk/imx/clk-gate-exclusive.c
34
u32 val = readl(gate->reg);
drivers/clk/imx/clk-gate2.c
46
reg = readl(gate->reg);
drivers/clk/imx/clk-gate2.c
92
u32 val = readl(reg);
drivers/clk/imx/clk-imx5.c
459
val = readl(MXC_CCM_CCDR);
drivers/clk/imx/clk-imx5.c
463
val = readl(MXC_CCM_CLPCR);
drivers/clk/imx/clk-imx6q.c
568
writel(readl(base + 0x160) & ~0x3c00, base + 0x160);
drivers/clk/imx/clk-imx8mp-audiomix.c
266
priv->regs_save[i] = readl(base + audiomix_regs[i]);
drivers/clk/imx/clk-imx8ulp.c
109
val = readl(pcc_reset->base + offset);
drivers/clk/imx/clk-imx8ulp.c
91
val = readl(pcc_reset->base + offset);
drivers/clk/imx/clk-imx95-blk-ctl.c
456
bc->clk_reg_restore = readl(bc->base + bc->pdata->clk_reg_offset);
drivers/clk/imx/clk-imx95-blk-ctl.c
485
bc->clk_reg_restore = readl(bc->base + bc->pdata->clk_reg_offset);
drivers/clk/imx/clk-lpcg-scu.c
59
readl(reg);
drivers/clk/imx/clk-pllv1.c
62
reg = readl(pll->base);
drivers/clk/imx/clk-sscg-pll.c
343
val = readl(pll->base + PLL_CFG0);
drivers/clk/imx/clk-sscg-pll.c
366
val = readl(pll->base + PLL_CFG0);
drivers/clk/imx/clk-sscg-pll.c
390
val = readl(pll->base + PLL_CFG0);
drivers/clk/imx/clk-sscg-pll.c
403
val = readl(pll->base + PLL_CFG0);
drivers/clk/ingenic/cgu.c
106
ctl = readl(cgu->base + pll_info->bypass_reg);
drivers/clk/ingenic/cgu.c
222
ctl = readl(cgu->base + pll_info->reg);
drivers/clk/ingenic/cgu.c
264
ctl = readl(cgu->base + pll_info->bypass_reg);
drivers/clk/ingenic/cgu.c
271
ctl = readl(cgu->base + pll_info->reg);
drivers/clk/ingenic/cgu.c
296
ctl = readl(cgu->base + pll_info->reg);
drivers/clk/ingenic/cgu.c
315
ctl = readl(cgu->base + pll_info->reg);
drivers/clk/ingenic/cgu.c
343
reg = readl(cgu->base + clk_info->mux.reg);
drivers/clk/ingenic/cgu.c
395
reg = readl(cgu->base + clk_info->mux.reg);
drivers/clk/ingenic/cgu.c
421
div_reg = readl(cgu->base + clk_info->div.reg);
drivers/clk/ingenic/cgu.c
47
return !!(readl(cgu->base + info->reg) & BIT(info->bit))
drivers/clk/ingenic/cgu.c
550
reg = readl(cgu->base + clk_info->div.reg);
drivers/clk/ingenic/cgu.c
65
u32 clkgr = readl(cgu->base + info->reg);
drivers/clk/ingenic/cgu.c
93
ctl = readl(cgu->base + pll_info->reg);
drivers/clk/ingenic/jz4770-cgu.c
56
writel(readl(reg_opcr) & ~OPCR_SPENDH, reg_opcr);
drivers/clk/ingenic/jz4770-cgu.c
57
writel(readl(reg_usbpcr1) | USBPCR1_UHC_POWER, reg_usbpcr1);
drivers/clk/ingenic/jz4770-cgu.c
66
writel(readl(reg_usbpcr1) & ~USBPCR1_UHC_POWER, reg_usbpcr1);
drivers/clk/ingenic/jz4770-cgu.c
67
writel(readl(reg_opcr) | OPCR_SPENDH, reg_opcr);
drivers/clk/ingenic/jz4770-cgu.c
75
return !(readl(reg_opcr) & OPCR_SPENDH) &&
drivers/clk/ingenic/jz4770-cgu.c
76
(readl(reg_usbpcr1) & USBPCR1_UHC_POWER);
drivers/clk/ingenic/jz4780-cgu.c
111
usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1);
drivers/clk/ingenic/jz4780-cgu.c
175
usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1);
drivers/clk/ingenic/jz4780-cgu.c
189
writel(readl(reg_opcr) | OPCR_SPENDN0, reg_opcr);
drivers/clk/ingenic/jz4780-cgu.c
190
writel(readl(reg_usbpcr) & ~USBPCR_OTG_DISABLE & ~USBPCR_SIDDQ, reg_usbpcr);
drivers/clk/ingenic/jz4780-cgu.c
199
writel(readl(reg_opcr) & ~OPCR_SPENDN0, reg_opcr);
drivers/clk/ingenic/jz4780-cgu.c
200
writel(readl(reg_usbpcr) | USBPCR_OTG_DISABLE | USBPCR_SIDDQ, reg_usbpcr);
drivers/clk/ingenic/jz4780-cgu.c
208
return (readl(reg_opcr) & OPCR_SPENDN0) &&
drivers/clk/ingenic/jz4780-cgu.c
209
!(readl(reg_usbpcr) & USBPCR_SIDDQ) &&
drivers/clk/ingenic/jz4780-cgu.c
210
!(readl(reg_usbpcr) & USBPCR_OTG_DISABLE);
drivers/clk/ingenic/jz4780-cgu.c
234
lcr = readl(cgu->base + CGU_REG_LCR);
drivers/clk/ingenic/jz4780-cgu.c
238
clkgr1 = readl(cgu->base + CGU_REG_CLKGR1);
drivers/clk/ingenic/pm.c
20
u32 val = readl(ingenic_cgu_base + CGU_REG_LCR);
drivers/clk/ingenic/pm.c
29
u32 val = readl(ingenic_cgu_base + CGU_REG_LCR);
drivers/clk/ingenic/x1000-cgu.c
125
usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1);
drivers/clk/ingenic/x1000-cgu.c
139
writel(readl(reg_opcr) | OPCR_SPENDN0, reg_opcr);
drivers/clk/ingenic/x1000-cgu.c
140
writel(readl(reg_usbpcr) & ~USBPCR_OTG_DISABLE & ~USBPCR_SIDDQ, reg_usbpcr);
drivers/clk/ingenic/x1000-cgu.c
149
writel(readl(reg_opcr) & ~OPCR_SPENDN0, reg_opcr);
drivers/clk/ingenic/x1000-cgu.c
150
writel(readl(reg_usbpcr) | USBPCR_OTG_DISABLE | USBPCR_SIDDQ, reg_usbpcr);
drivers/clk/ingenic/x1000-cgu.c
158
return (readl(reg_opcr) & OPCR_SPENDN0) &&
drivers/clk/ingenic/x1000-cgu.c
159
!(readl(reg_usbpcr) & USBPCR_SIDDQ) &&
drivers/clk/ingenic/x1000-cgu.c
160
!(readl(reg_usbpcr) & USBPCR_OTG_DISABLE);
drivers/clk/ingenic/x1000-cgu.c
70
usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1);
drivers/clk/ingenic/x1830-cgu.c
62
writel((readl(reg_opcr) | OPCR_SPENDN0) & ~OPCR_GATE_USBPHYCLK, reg_opcr);
drivers/clk/ingenic/x1830-cgu.c
63
writel(readl(reg_usbpcr) & ~USBPCR_OTG_DISABLE & ~USBPCR_SIDDQ, reg_usbpcr);
drivers/clk/ingenic/x1830-cgu.c
72
writel((readl(reg_opcr) & ~OPCR_SPENDN0) | OPCR_GATE_USBPHYCLK, reg_opcr);
drivers/clk/ingenic/x1830-cgu.c
73
writel(readl(reg_usbpcr) | USBPCR_OTG_DISABLE | USBPCR_SIDDQ, reg_usbpcr);
drivers/clk/ingenic/x1830-cgu.c
81
return (readl(reg_opcr) & OPCR_SPENDN0) &&
drivers/clk/ingenic/x1830-cgu.c
82
!(readl(reg_usbpcr) & USBPCR_SIDDQ) &&
drivers/clk/ingenic/x1830-cgu.c
83
!(readl(reg_usbpcr) & USBPCR_OTG_DISABLE);
drivers/clk/keystone/gate.c
100
mdstat = readl(control_base + MDSTAT);
drivers/clk/keystone/gate.c
108
u32 mdstat = readl(data->control_base + MDSTAT);
drivers/clk/keystone/gate.c
77
mdctl = readl(control_base + MDCTL);
drivers/clk/keystone/gate.c
85
pdstat = readl(domain_base + PDSTAT);
drivers/clk/keystone/gate.c
87
pdctl = readl(domain_base + PDCTL);
drivers/clk/keystone/gate.c
95
ptstat = readl(domain_transition_base + PTSTAT);
drivers/clk/keystone/pll.c
103
postdiv = readl(pll_data->pllod);
drivers/clk/keystone/pll.c
88
val = readl(pll_data->pllm);
drivers/clk/keystone/pll.c
93
val = readl(pll_data->pll_ctl0);
drivers/clk/mediatek/clk-apmixed.c
34
return (readl(tx->base_addr) & REF2USB_EN_MASK) == REF2USB_EN_MASK;
drivers/clk/mediatek/clk-apmixed.c
42
val = readl(tx->base_addr);
drivers/clk/mediatek/clk-apmixed.c
62
val = readl(tx->base_addr);
drivers/clk/mediatek/clk-fhctl.c
101
writel(readl(regs->reg_cfg) | data->frddsx_en, regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
103
writel(readl(regs->reg_cfg) | data->fhctlx_en, regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
107
writel(readl(regs->reg_hp_en) & ~BIT(data->fh_id),
drivers/clk/mediatek/clk-fhctl.c
128
writel((readl(pll->pcw_addr) & dds_mask) | data->tgl_org,
drivers/clk/mediatek/clk-fhctl.c
131
writel(readl(regs->reg_cfg) | data->sfstrx_en, regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
132
writel(readl(regs->reg_cfg) | data->fhctlx_en, regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
136
writel(readl(regs->reg_hp_en) | BIT(data->fh_id), regs->reg_hp_en);
drivers/clk/mediatek/clk-fhctl.c
148
con_pcw_tmp = readl(pll->pcw_addr) & (~dds_mask);
drivers/clk/mediatek/clk-fhctl.c
149
con_pcw_tmp = (con_pcw_tmp | (readl(regs->reg_mon) & dds_mask) |
drivers/clk/mediatek/clk-fhctl.c
153
writel(readl(regs->reg_hp_en) & ~BIT(data->fh_id), regs->reg_hp_en);
drivers/clk/mediatek/clk-fhctl.c
165
regval = readl(pll->pd_addr) >> pll->data->pd_shift;
drivers/clk/mediatek/clk-fhctl.c
175
regval = readl(pll->pd_addr);
drivers/clk/mediatek/clk-fhctl.c
249
val = readl(regs.reg_clk_con) | BIT(data.fh_id);
drivers/clk/mediatek/clk-fhctl.c
252
val = readl(regs.reg_rst_con) & ~BIT(data.fh_id);
drivers/clk/mediatek/clk-fhctl.c
254
val = readl(regs.reg_rst_con) | BIT(data.fh_id);
drivers/clk/mediatek/clk-fhctl.c
59
readl(regs->reg_hp_en), readl(regs->reg_clk_con),
drivers/clk/mediatek/clk-fhctl.c
60
readl(regs->reg_slope0), readl(regs->reg_slope1));
drivers/clk/mediatek/clk-fhctl.c
62
readl(regs->reg_cfg), readl(regs->reg_updnlmt),
drivers/clk/mediatek/clk-fhctl.c
63
readl(regs->reg_dds), readl(regs->reg_dvfs),
drivers/clk/mediatek/clk-fhctl.c
64
readl(regs->reg_mon));
drivers/clk/mediatek/clk-fhctl.c
65
pr_info("pcw<%x>\n", readl(pll->pcw_addr));
drivers/clk/mediatek/clk-fhctl.c
73
writel((readl(regs->reg_cfg) & ~(data->frddsx_en)), regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
74
writel((readl(regs->reg_cfg) & ~(data->sfstrx_en)), regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
75
writel((readl(regs->reg_cfg) & ~(data->fhctlx_en)), regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
79
r = readl(regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
84
r = readl(regs->reg_cfg);
drivers/clk/mediatek/clk-fhctl.c
89
writel((readl(pll->pcw_addr) & data->dds_mask) | data->tgl_org,
drivers/clk/mediatek/clk-fhctl.c
93
updnlmt_val = PERCENT_TO_DDSLMT((readl(regs->reg_dds) &
drivers/clk/mediatek/clk-fhctl.c
98
writel(readl(regs->reg_hp_en) | BIT(data->fh_id),
drivers/clk/mediatek/clk-mt6765.c
755
writel(readl(AP_PLL_CON3) & 0xFFFFFFE1, AP_PLL_CON3);
drivers/clk/mediatek/clk-mt6765.c
756
writel(readl(PLLON_CON0) & 0x01041041, PLLON_CON0);
drivers/clk/mediatek/clk-mt6765.c
757
writel(readl(PLLON_CON1) & 0x01041041, PLLON_CON1);
drivers/clk/mediatek/clk-mt6765.c
795
writel(readl(CLK_SCP_CFG_0) | 0x3EF, CLK_SCP_CFG_0);
drivers/clk/mediatek/clk-mt6765.c
797
writel(readl(CLK_SCP_CFG_1) | 0x1, CLK_SCP_CFG_1);
drivers/clk/mediatek/clk-mt6795-apmixedsys.c
118
writel(readl(reg) & ~MD1_CLK_OFF, reg);
drivers/clk/mediatek/clk-mt6795-apmixedsys.c
121
writel(readl(reg) & ~MD1_MTCMOS_OFF, reg);
drivers/clk/mediatek/clk-mt6795-apmixedsys.c
124
writel(readl(reg) & ~MD1_ISO_OFF, reg);
drivers/clk/mediatek/clk-mt6795-apmixedsys.c
127
writel(readl(reg) & ~MD1_MEM_OFF, reg);
drivers/clk/mediatek/clk-pll.c
110
val = readl(pll->pd_addr);
drivers/clk/mediatek/clk-pll.c
117
val = readl(pll->pcw_addr);
drivers/clk/mediatek/clk-pll.c
125
chg = readl(pll->pcw_chg_addr) |
drivers/clk/mediatek/clk-pll.c
202
postdiv = (readl(pll->pd_addr) >> pll->data->pd_shift) & POSTDIV_MASK;
drivers/clk/mediatek/clk-pll.c
205
pcw = readl(pll->pcw_addr) >> pll->data->pcw_shift;
drivers/clk/mediatek/clk-pll.c
231
r = readl(pll->pwr_addr) | CON0_PWR_ON;
drivers/clk/mediatek/clk-pll.c
235
r = readl(pll->pwr_addr) & ~CON0_ISO_EN;
drivers/clk/mediatek/clk-pll.c
239
r = readl(pll->en_addr) | BIT(pll->data->pll_en_bit);
drivers/clk/mediatek/clk-pll.c
243
r = readl(pll->base_addr + REG_CON0) | pll->data->en_mask;
drivers/clk/mediatek/clk-pll.c
252
r = readl(pll->base_addr + REG_CON0);
drivers/clk/mediatek/clk-pll.c
266
r = readl(pll->base_addr + REG_CON0);
drivers/clk/mediatek/clk-pll.c
274
r = readl(pll->base_addr + REG_CON0) & ~pll->data->en_mask;
drivers/clk/mediatek/clk-pll.c
278
r = readl(pll->en_addr) & ~BIT(pll->data->pll_en_bit);
drivers/clk/mediatek/clk-pll.c
281
r = readl(pll->pwr_addr) | CON0_ISO_EN;
drivers/clk/mediatek/clk-pll.c
284
r = readl(pll->pwr_addr) & ~CON0_PWR_ON;
drivers/clk/mediatek/clk-pll.c
38
return (readl(pll->en_addr) & BIT(pll->data->pll_en_bit)) != 0;
drivers/clk/mediatek/clk-pll.c
45
return !!(readl(pll->fenc_addr) & BIT(pll->data->fenc_sta_bit));
drivers/clk/mediatek/clk-pll.c
80
r = readl(pll->tuner_en_addr) | BIT(pll->data->tuner_en_bit);
drivers/clk/mediatek/clk-pll.c
83
r = readl(pll->tuner_addr) | AUDPLL_TUNER_EN;
drivers/clk/mediatek/clk-pll.c
93
r = readl(pll->tuner_en_addr) & ~BIT(pll->data->tuner_en_bit);
drivers/clk/mediatek/clk-pll.c
96
r = readl(pll->tuner_addr) & ~AUDPLL_TUNER_EN;
drivers/clk/microchip/clk-core.c
100
return readl(pb->ctrl_reg) & PB_DIV_ENABLE;
drivers/clk/microchip/clk-core.c
146
return ((readl(pb->ctrl_reg) >> PB_DIV_SHIFT) & PB_DIV_MASK) + 1;
drivers/clk/microchip/clk-core.c
186
v = readl(pb->ctrl_reg);
drivers/clk/microchip/clk-core.c
252
return readl(refo->ctrl_reg) & REFO_ON;
drivers/clk/microchip/clk-core.c
283
v = (readl(refo->ctrl_reg) >> REFO_SEL_SHIFT) & REFO_SEL_MASK;
drivers/clk/microchip/clk-core.c
365
v = readl(refo->ctrl_reg);
drivers/clk/microchip/clk-core.c
369
v = readl(refo->ctrl_reg + REFO_TRIM_REG);
drivers/clk/microchip/clk-core.c
459
v = readl(refo->ctrl_reg);
drivers/clk/microchip/clk-core.c
496
v = readl(refo->ctrl_reg);
drivers/clk/microchip/clk-core.c
513
v = readl(refo->ctrl_reg + REFO_TRIM_REG);
drivers/clk/microchip/clk-core.c
647
v = readl(pll->ctrl_reg);
drivers/clk/microchip/clk-core.c
700
v = readl(pll->ctrl_reg);
drivers/clk/microchip/clk-core.c
747
spll->idiv = (readl(spll->ctrl_reg) >> PLL_IDIV_SHIFT) & PLL_IDIV_MASK;
drivers/clk/microchip/clk-core.c
775
div = (readl(sclk->slew_reg) >> SLEW_SYSDIV_SHIFT) & SLEW_SYSDIV;
drivers/clk/microchip/clk-core.c
794
v = readl(sclk->slew_reg);
drivers/clk/microchip/clk-core.c
816
v = (readl(sclk->mux_reg) >> OSC_CUR_SHIFT) & OSC_CUR_MASK;
drivers/clk/microchip/clk-core.c
840
v = readl(sclk->mux_reg);
drivers/clk/microchip/clk-core.c
867
cosc = (readl(sclk->mux_reg) >> OSC_CUR_SHIFT) & OSC_CUR_MASK;
drivers/clk/microchip/clk-core.c
889
v = readl(sclk->slew_reg);
drivers/clk/microchip/clk-core.c
982
enabled = readl(sosc->enable_reg) & sosc->enable_mask;
drivers/clk/microchip/clk-core.c
983
ready = readl(sosc->status_reg) & sosc->status_mask;
drivers/clk/microchip/clk-pic32mzda.c
142
if (readl(cd->core.iobase) & BIT(2))
drivers/clk/mmp/clk-audio.c
125
aud_pll_ctrl0 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL0);
drivers/clk/mmp/clk-audio.c
133
aud_pll_ctrl1 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL1);
drivers/clk/mmp/clk-audio.c
402
priv->aud_ctrl = readl(priv->mmio_base + SSPA_AUD_CTRL);
drivers/clk/mmp/clk-audio.c
403
priv->aud_pll_ctrl0 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL0);
drivers/clk/mmp/clk-audio.c
404
priv->aud_pll_ctrl1 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL1);
drivers/clk/mmp/clk-frac.c
130
val = readl(factor->base);
drivers/clk/mmp/clk-gate.c
34
tmp = readl(gate->reg);
drivers/clk/mmp/clk-gate.c
60
tmp = readl(gate->reg);
drivers/clk/mmp/clk-gate.c
78
tmp = readl(gate->reg);
drivers/clk/mmp/clk-mix.c
148
mux_div = readl(ri->reg_clk_ctrl);
drivers/clk/mmp/clk-mix.c
150
mux_div = readl(ri->reg_clk_sel);
drivers/clk/mmp/clk-mix.c
173
fc_req = readl(ri->reg_clk_ctrl);
drivers/clk/mmp/clk-mix.c
186
fc_req = readl(ri->reg_clk_ctrl);
drivers/clk/mmp/clk-mix.c
300
mux_div = readl(ri->reg_clk_ctrl);
drivers/clk/mmp/clk-mix.c
302
mux_div = readl(ri->reg_clk_sel);
drivers/clk/mmp/clk-mix.c
330
mux_div = readl(ri->reg_clk_ctrl);
drivers/clk/mmp/clk-mix.c
332
mux_div = readl(ri->reg_clk_sel);
drivers/clk/mmp/pwr-island.c
35
val = readl(pm_domain->reg);
drivers/clk/mmp/pwr-island.c
80
val = readl(pm_domain->reg);
drivers/clk/mmp/reset.c
46
val = readl(cell->reg);
drivers/clk/mmp/reset.c
68
val = readl(cell->reg);
drivers/clk/mvebu/armada-370.c
116
u32 opt = ((readl(sar) >> SARL_A370_FAB_FREQ_OPT) &
drivers/clk/mvebu/armada-370.c
137
return !(readl(sar) & SARL_A370_SSCG_ENABLE);
drivers/clk/mvebu/armada-370.c
49
tclk_freq_select = ((readl(sar) >> SARL_A370_TCLK_FREQ_OPT) &
drivers/clk/mvebu/armada-370.c
69
cpu_freq_select = ((readl(sar) >> SARL_A370_PCLK_FREQ_OPT) &
drivers/clk/mvebu/armada-375.c
117
u32 opt = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) &
drivers/clk/mvebu/armada-375.c
54
tclk_freq_select = ((readl(sar) >> SAR1_A375_TCLK_FREQ_OPT) &
drivers/clk/mvebu/armada-375.c
75
cpu_freq_select = ((readl(sar) >> SAR1_A375_CPU_DDR_L2_FREQ_OPT) &
drivers/clk/mvebu/armada-37xx-periph.c
331
val = (readl(reg) >> shift) & 0x7;
drivers/clk/mvebu/armada-37xx-periph.c
437
val = readl(pm_cpu->reg_mux) >> pm_cpu->shift_mux;
drivers/clk/mvebu/armada-37xx-periph.c
701
data->tbg_sel = readl(data->reg + TBG_SEL);
drivers/clk/mvebu/armada-37xx-periph.c
702
data->div_sel0 = readl(data->reg + DIV_SEL0);
drivers/clk/mvebu/armada-37xx-periph.c
703
data->div_sel1 = readl(data->reg + DIV_SEL1);
drivers/clk/mvebu/armada-37xx-periph.c
704
data->div_sel2 = readl(data->reg + DIV_SEL2);
drivers/clk/mvebu/armada-37xx-periph.c
705
data->clk_sel = readl(data->reg + CLK_SEL);
drivers/clk/mvebu/armada-37xx-periph.c
706
data->clk_dis = readl(data->reg + CLK_DIS);
drivers/clk/mvebu/armada-37xx-tbg.c
58
val = readl(reg + TBG_CTRL0);
drivers/clk/mvebu/armada-37xx-tbg.c
68
val = readl(reg + TBG_CTRL7);
drivers/clk/mvebu/armada-37xx-tbg.c
73
val = readl(reg + ptbg->vcodiv_reg);
drivers/clk/mvebu/armada-38x.c
101
u32 opt = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) &
drivers/clk/mvebu/armada-38x.c
41
tclk_freq_select = ((readl(sar) >> SAR_A380_TCLK_FREQ_OPT) &
drivers/clk/mvebu/armada-38x.c
58
cpu_freq_select = ((readl(sar) >> SAR_A380_CPU_DDR_L2_FREQ_OPT) &
drivers/clk/mvebu/armada-39x.c
112
if (readl(sar + SARH) & SARH_A390_REFCLK_FREQ)
drivers/clk/mvebu/armada-39x.c
49
tclk_freq_select = ((readl(sar + SARL) >> SARL_A390_TCLK_FREQ_OPT) &
drivers/clk/mvebu/armada-39x.c
72
cpu_freq_select = ((readl(sar + SARL) >> SARL_A390_CPU_DDR_L2_FREQ_OPT) &
drivers/clk/mvebu/armada-xp.c
125
u32 opt = ((readl(sar + SARL) >> SARL_AXP_FAB_FREQ_OPT) &
drivers/clk/mvebu/armada-xp.c
131
opt |= (((readl(sar + SARH) >> SARH_AXP_FAB_FREQ_OPT) &
drivers/clk/mvebu/armada-xp.c
72
cpu_freq_select = ((readl(sar + SARL) >> SARL_AXP_PCLK_FREQ_OPT) &
drivers/clk/mvebu/armada-xp.c
78
cpu_freq_select |= (((readl(sar + SARH) >> SARH_AXP_PCLK_FREQ_OPT) &
drivers/clk/mvebu/clk-corediv.c
118
reg = readl(corediv->reg);
drivers/clk/mvebu/clk-corediv.c
133
reg = readl(corediv->reg + soc_desc->ratio_offset);
drivers/clk/mvebu/clk-corediv.c
169
reg = readl(corediv->reg + soc_desc->ratio_offset);
drivers/clk/mvebu/clk-corediv.c
175
reg = readl(corediv->reg) | BIT(desc->fieldbit);
drivers/clk/mvebu/clk-corediv.c
179
reg = readl(corediv->reg) | soc_desc->ratio_reload;
drivers/clk/mvebu/clk-corediv.c
86
return !!(readl(corediv->reg) & enable_mask);
drivers/clk/mvebu/clk-corediv.c
99
reg = readl(corediv->reg);
drivers/clk/mvebu/clk-cpu.c
126
reg = readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL2_OFFSET);
drivers/clk/mvebu/clk-cpu.c
140
reg = readl(cpuclk->pmu_dfs);
drivers/clk/mvebu/clk-cpu.c
145
reg = readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET);
drivers/clk/mvebu/clk-cpu.c
54
reg = readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_VALUE_OFFSET);
drivers/clk/mvebu/clk-cpu.c
85
reg = (readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_VALUE_OFFSET)
drivers/clk/mvebu/clk-cpu.c
92
reg = readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET)
drivers/clk/mvebu/clk-cpu.c
97
reg = readl(cpuclk->reg_base + SYS_CTRL_CLK_DIVIDER_CTRL_OFFSET)
drivers/clk/mvebu/common.c
219
ctrl->saved_reg = readl(ctrl->base);
drivers/clk/mvebu/common.c
63
sscg_reg = readl(sscg_map);
drivers/clk/mvebu/dove.c
108
u32 opt = (readl(sar) >> SAR_DOVE_CPU_FREQ) &
drivers/clk/mvebu/dove.c
131
u32 opt = (readl(sar) >> SAR_DOVE_L2_RATIO) &
drivers/clk/mvebu/dove.c
139
u32 opt = (readl(sar) >> SAR_DOVE_DDR_RATIO) &
drivers/clk/mvebu/dove.c
89
u32 opt = (readl(sar) >> SAR_DOVE_TCLK_FREQ) &
drivers/clk/mvebu/kirkwood.c
110
u32 opt = SAR_KIRKWOOD_CPU_FREQ(readl(sar));
drivers/clk/mvebu/kirkwood.c
132
u32 opt = SAR_KIRKWOOD_L2_RATIO(readl(sar));
drivers/clk/mvebu/kirkwood.c
139
u32 opt = (readl(sar) >> SAR_KIRKWOOD_DDR_RATIO) &
drivers/clk/mvebu/kirkwood.c
157
u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) & SAR_MV88F6180_CLK_MASK;
drivers/clk/mvebu/kirkwood.c
179
u32 opt = (readl(sar) >> SAR_MV88F6180_CLK) &
drivers/clk/mvebu/kirkwood.c
88
u32 opt = (readl(sar) >> SAR_KIRKWOOD_TCLK_FREQ) &
drivers/clk/mvebu/mv98dx3236.c
120
u32 opt = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) &
drivers/clk/mvebu/mv98dx3236.c
73
cpu_freq_select = ((readl(sar) >> SAR1_MV98DX3236_CPU_DDR_MPLL_FREQ_OPT) &
drivers/clk/mvebu/orion.c
100
u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) &
drivers/clk/mvebu/orion.c
115
u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
drivers/clk/mvebu/orion.c
130
u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
drivers/clk/mvebu/orion.c
174
u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
drivers/clk/mvebu/orion.c
187
u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
drivers/clk/mvebu/orion.c
225
u32 opt = (readl(sar) >> SAR_MV88F6183_TCLK_FREQ) &
drivers/clk/mvebu/orion.c
240
u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) &
drivers/clk/mvebu/orion.c
253
u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) &
drivers/clk/mvebu/orion.c
30
u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) &
drivers/clk/mvebu/orion.c
47
u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) &
drivers/clk/mvebu/orion.c
62
u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) &
drivers/clk/mxs/clk-ssp.c
44
val = readl(ssp->base + HW_SSP_TIMING(ssp));
drivers/clk/nxp/clk-lpc18xx-ccu.c
143
val = readl(gate->reg);
drivers/clk/nxp/clk-lpc18xx-cgu.c
352
ctrl = readl(pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
drivers/clk/nxp/clk-lpc18xx-cgu.c
353
mdiv = readl(pll->reg + LPC18XX_CGU_PLL0USB_MDIV);
drivers/clk/nxp/clk-lpc18xx-cgu.c
354
npdiv = readl(pll->reg + LPC18XX_CGU_PLL0USB_NP_DIV);
drivers/clk/nxp/clk-lpc18xx-cgu.c
417
ctrl = readl(pll->reg + LPC18XX_CGU_PLL0USB_CTRL);
drivers/clk/nxp/clk-lpc18xx-cgu.c
432
stat = readl(pll->reg + LPC18XX_CGU_PLL0USB_STAT);
drivers/clk/nxp/clk-lpc18xx-cgu.c
460
ctrl = readl(pll->reg + LPC18XX_CGU_PLL1_CTRL);
drivers/clk/nxp/clk-lpc32xx.c
379
return readl(usb_clk_vbase + LPC32XX_USB_CLK_STS);
drivers/clk/pistachio/clk-pll.c
80
return readl(pll->base + reg);
drivers/clk/pxa/clk-pxa.c
173
preset_mdrefr = postset_mdrefr = readl(mdrefr);
drivers/clk/pxa/clk-pxa25x.c
103
unsigned long cccr = readl(clk_regs + CCCR);
drivers/clk/pxa/clk-pxa25x.c
207
unsigned long cccr = readl(clk_regs + CCCR);
drivers/clk/pxa/clk-pxa25x.c
218
unsigned long clkcfg, cccr = readl(clk_regs + CCCR);
drivers/clk/pxa/clk-pxa27x.c
105
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
207
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
252
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
253
unsigned long cccr = readl(clk_regs + CCCR);
drivers/clk/pxa/clk-pxa27x.c
274
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
303
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
340
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
363
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
380
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
396
unsigned long cccr = readl(clk_regs + CCCR);
drivers/clk/pxa/clk-pxa27x.c
397
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa27x.c
415
unsigned long cccr = readl(clk_regs + CCCR);
drivers/clk/pxa/clk-pxa27x.c
416
unsigned long ccsr = readl(clk_regs + CCSR);
drivers/clk/pxa/clk-pxa3xx.c
162
u32 accr = readl(clk_regs + ACCR);
drivers/clk/pxa/clk-pxa3xx.c
171
while ((readl(clk_regs + ACSR) & mask) != (accr & mask))
drivers/clk/pxa/clk-pxa3xx.c
180
ac97_div = readl(clk_regs + AC97_DIV);
drivers/clk/pxa/clk-pxa3xx.c
197
unsigned long acsr = readl(clk_regs + ACSR);
drivers/clk/pxa/clk-pxa3xx.c
208
unsigned long acsr = readl(clk_regs + ACSR);
drivers/clk/pxa/clk-pxa3xx.c
288
unsigned long acsr = readl(clk_regs + ACSR);
drivers/clk/pxa/clk-pxa3xx.c
335
unsigned long acsr = readl(clk_regs + ACSR);
drivers/clk/pxa/clk-pxa3xx.c
351
unsigned long acsr = readl(clk_regs + ACSR);
drivers/clk/qcom/lpass-gfm-sm8250.c
42
return readl(clk->gfm_mux) & clk->mux_mask;
drivers/clk/qcom/lpass-gfm-sm8250.c
50
val = readl(clk->gfm_mux);
drivers/clk/renesas/clk-div6.c
158
val = readl(clock->reg) & ~CPG_DIV6_DIV_MASK;
drivers/clk/renesas/clk-div6.c
175
hw_index = field_get(clock->src_mask, readl(clock->reg));
drivers/clk/renesas/clk-div6.c
195
writel((readl(clock->reg) & ~clock->src_mask) | src, clock->reg);
drivers/clk/renesas/clk-div6.c
264
clock->div = (readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1;
drivers/clk/renesas/clk-div6.c
52
val = (readl(clock->reg) & ~(CPG_DIV6_DIV_MASK | CPG_DIV6_CKSTP))
drivers/clk/renesas/clk-div6.c
64
val = readl(clock->reg);
drivers/clk/renesas/clk-div6.c
81
return !(readl(clock->reg) & CPG_DIV6_CKSTP);
drivers/clk/renesas/clk-mstp.c
67
return group->width_8bit ? readb(reg) : readl(reg);
drivers/clk/renesas/clk-r8a73a4.c
122
value = readl(base + cr);
drivers/clk/renesas/clk-r8a73a4.c
158
mult = 0x20 - ((readl(base + CPG_FRQCRC) >> shift) & 0x1f);
drivers/clk/renesas/clk-r8a73a4.c
68
u32 ckscr = readl(base + CPG_CKSCR);
drivers/clk/renesas/clk-r8a73a4.c
92
u32 value = readl(base + CPG_PLL0CR);
drivers/clk/renesas/clk-r8a73a4.c
99
u32 value = readl(base + CPG_PLL1CR);
drivers/clk/renesas/clk-r8a7740.c
104
u32 value = readl(base + CPG_PLLC2CR);
drivers/clk/renesas/clk-r8a7740.c
108
u32 value = readl(base + CPG_USBCKCR);
drivers/clk/renesas/clk-r8a7740.c
95
u32 value = readl(base + CPG_FRQCRC);
drivers/clk/renesas/clk-r8a7740.c
99
u32 value = readl(base + CPG_FRQCRA);
drivers/clk/renesas/clk-rz.c
72
val = (readl(base + CPG_FRQCR) >> 8) & 3;
drivers/clk/renesas/clk-rz.c
74
val = readl(base + CPG_FRQCR2) & 3;
drivers/clk/renesas/clk-sh73a0.c
108
if (readl(base + CPG_PLLECR) & BIT(enable_bit)) {
drivers/clk/renesas/clk-sh73a0.c
109
mult = ((readl(enable_reg) >> 24) & 0x3f) + 1;
drivers/clk/renesas/clk-sh73a0.c
112
if (readl(enable_reg) & BIT(20))
drivers/clk/renesas/clk-sh73a0.c
121
mult = readl(dsi_reg);
drivers/clk/renesas/clk-sh73a0.c
83
u32 parent_idx = (readl(base + CPG_CKSCR) >> 28) & 3;
drivers/clk/renesas/r7s9210-cpg-mssr.c
124
frqcr = readl(base + CPG_FRQCR) & 0xFFF;
drivers/clk/renesas/r9a06g032-clocks.c
1298
usb = readl(clocks->reg + R9A06G032_SYSCTRL_USB);
drivers/clk/renesas/r9a06g032-clocks.c
697
dmamux = readl(sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX);
drivers/clk/renesas/r9a06g032-clocks.c
717
val = readl(reg);
drivers/clk/renesas/r9a06g032-clocks.c
725
u32 val = readl(reg);
drivers/clk/renesas/r9a06g032-clocks.c
946
u32 div = readl(reg);
drivers/clk/renesas/rcar-cpg-lib.c
33
val = readl(reg);
drivers/clk/renesas/rcar-cpg-lib.c
48
csn->saved = readl(csn->reg);
drivers/clk/renesas/rcar-gen2-cpg.c
107
kick = readl(zclk->kick_reg);
drivers/clk/renesas/rcar-gen2-cpg.c
121
if (!(readl(zclk->kick_reg) & CPG_FRQCRB_KICK))
drivers/clk/renesas/rcar-gen2-cpg.c
310
u32 pll0cr = readl(base + CPG_PLL0CR);
drivers/clk/renesas/rcar-gen2-cpg.c
60
val = (readl(zclk->reg) & CPG_FRQCRC_ZFC_MASK) >> CPG_FRQCRC_ZFC_SHIFT;
drivers/clk/renesas/rcar-gen2-cpg.c
95
if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK)
drivers/clk/renesas/rcar-gen2-cpg.c
98
val = readl(zclk->reg);
drivers/clk/renesas/rcar-gen3-cpg.c
177
unsigned int mult = 32 - field_get(zclk->mask, readl(zclk->reg));
drivers/clk/renesas/rcar-gen3-cpg.c
225
if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK)
drivers/clk/renesas/rcar-gen3-cpg.c
247
if (!(readl(zclk->kick_reg) & CPG_FRQCRB_KICK))
drivers/clk/renesas/rcar-gen3-cpg.c
397
value = readl(base + CPG_PLL4CR);
drivers/clk/renesas/rcar-gen3-cpg.c
423
value = readl(csn->reg) & 0x3f;
drivers/clk/renesas/rcar-gen3-cpg.c
476
if (readl(base + CPG_RCKCR) & CPG_RCKCR_CKSEL) {
drivers/clk/renesas/rcar-gen3-cpg.c
499
value = (readl(base + CPG_RPCCKCR) & GENMASK(4, 3)) >> 3;
drivers/clk/renesas/rcar-gen3-cpg.c
58
mult = FIELD_GET(CPG_PLLnCR_STC_MASK, readl(pll_clk->pllcr_reg)) + 1;
drivers/clk/renesas/rcar-gen3-cpg.c
93
val = readl(pll_clk->pllcr_reg);
drivers/clk/renesas/rcar-gen3-cpg.c
99
if (readl(pll_clk->pllecr_reg) & pll_clk->pllecr_pllst_mask)
drivers/clk/renesas/rcar-gen4-cpg.c
105
u32 cr0 = readl(pll_clk->pllcr0_reg);
drivers/clk/renesas/rcar-gen4-cpg.c
139
u32 cr0 = readl(pll_clk->pllcr0_reg);
drivers/clk/renesas/rcar-gen4-cpg.c
158
if (readl(pll_clk->pllcr0_reg) & CPG_PLLxCR0_KICK)
drivers/clk/renesas/rcar-gen4-cpg.c
200
u32 cr0 = readl(pll_clk->pllcr0_reg);
drivers/clk/renesas/rcar-gen4-cpg.c
207
nf = FIELD_GET(CPG_PLLxCR1_NF24, readl(pll_clk->pllcr1_reg));
drivers/clk/renesas/rcar-gen4-cpg.c
282
unsigned int mult = 32 - field_get(zclk->mask, readl(zclk->reg));
drivers/clk/renesas/rcar-gen4-cpg.c
330
if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK)
drivers/clk/renesas/rcar-gen4-cpg.c
352
if (!(readl(zclk->kick_reg) & CPG_FRQCRB_KICK))
drivers/clk/renesas/rcar-gen4-cpg.c
453
value = readl(base + core->offset);
drivers/clk/renesas/rcar-gen4-cpg.c
480
value = readl(base + CPG_SD0CKCR1);
drivers/clk/renesas/rcar-gen4-cpg.c
86
u32 cr0 = readl(pll_clk->pllcr0_reg);
drivers/clk/renesas/rcar-gen4-cpg.c
93
nf = FIELD_GET(CPG_PLLxCR1_NF25, readl(pll_clk->pllcr1_reg));
drivers/clk/renesas/renesas-cpg-mssr.c
1090
val = readl(priv->pub.base0 + priv->control_regs[reg]);
drivers/clk/renesas/renesas-cpg-mssr.c
1126
oldval = readl(priv->pub.base0 + priv->control_regs[reg]);
drivers/clk/renesas/renesas-cpg-mssr.c
245
return readl(base + RZT2H_MSTPCR_OFFSET(offset));
drivers/clk/renesas/renesas-cpg-mssr.c
294
value = readl(priv->pub.base0 + priv->control_regs[reg]);
drivers/clk/renesas/renesas-cpg-mssr.c
350
value = readl(priv->pub.base0 + priv->status_regs[reg]);
drivers/clk/renesas/renesas-cpg-mssr.c
447
div *= (readl(priv->pub.base0 + core->offset) & 0x3f) + 1;
drivers/clk/renesas/renesas-cpg-mssr.c
713
readl(priv->pub.base0 + off);
drivers/clk/renesas/renesas-cpg-mssr.c
760
return !!(readl(priv->pub.base0 + priv->reset_regs[reg]) & bitmask);
drivers/clk/renesas/renesas-cpg-mssr.c
781
val = readl(reg_addr);
drivers/clk/renesas/renesas-cpg-mssr.c
793
readl(reg_addr);
drivers/clk/renesas/renesas-cpg-mssr.c
796
val = readl(reg_addr);
drivers/clk/renesas/rzg2l-cpg.c
1089
val1 = readl(priv->base + GET_REG_SAMPLL_CLK1(pll_clk->conf));
drivers/clk/renesas/rzg2l-cpg.c
1090
val2 = readl(priv->base + GET_REG_SAMPLL_CLK2(pll_clk->conf));
drivers/clk/renesas/rzg2l-cpg.c
1115
val = readl(priv->base + setting);
drivers/clk/renesas/rzg2l-cpg.c
1120
val = readl(priv->base + GET_REG_SAMPLL_CLK1(pll_clk->conf));
drivers/clk/renesas/rzg2l-cpg.c
1425
val = readl(priv->base + MSTOP_OFF(clk->mstop->conf)) &
drivers/clk/renesas/rzg2l-cpg.c
1545
value = readl(priv->base + CLK_MON_R(clock->off));
drivers/clk/renesas/rzg2l-cpg.c
1547
value = readl(priv->base + clock->off);
drivers/clk/renesas/rzg2l-cpg.c
1836
return !!(readl(priv->base + reg) & bitmask);
drivers/clk/renesas/rzg2l-cpg.c
274
val = readl(priv->base + off);
drivers/clk/renesas/rzg2l-cpg.c
326
val = readl(priv->base + GET_REG_OFFSET(clk_hw_data->conf));
drivers/clk/renesas/rzg2l-cpg.c
528
val = readl(priv->base + GET_REG_OFFSET(clk_hw_data->conf));
drivers/clk/renesas/rzg2l-cpg.c
879
return readl(priv->base + GET_REG_OFFSET(hwdata->conf));
drivers/clk/renesas/rzv2h-cpg.c
1159
val = readl(mux->reg) >> mux->shift;
drivers/clk/renesas/rzv2h-cpg.c
1180
if (!(readl(priv->base + offset) & bitmask))
drivers/clk/renesas/rzv2h-cpg.c
1187
return readl(priv->base + offset) & bitmask;
drivers/clk/renesas/rzv2h-cpg.c
1409
return !!(readl(priv->base + reg) & BIT(monbit));
drivers/clk/renesas/rzv2h-cpg.c
429
div = readl(priv->base + ddiv.offset);
drivers/clk/renesas/rzv2h-cpg.c
506
val = readl(priv->base + ddiv.offset) | DDIV_DIVCTL_WEN(shift);
drivers/clk/renesas/rzv2h-cpg.c
616
val = readl(priv->base + CPG_PLL_CLK2(offset));
drivers/clk/renesas/rzv2h-cpg.c
656
u32 val = readl(priv->base + CPG_PLL_MON(pll_clk->pll.offset));
drivers/clk/renesas/rzv2h-cpg.c
712
clk1 = readl(priv->base + CPG_PLL_CLK1(pll.offset));
drivers/clk/renesas/rzv2h-cpg.c
713
clk2 = readl(priv->base + CPG_PLL_CLK2(pll.offset));
drivers/clk/renesas/rzv2h-cpg.c
782
val = readl(divider->reg) >> divider->shift;
drivers/clk/renesas/rzv2h-cpg.c
831
val = readl(divider->reg) | DDIV_DIVCTL_WEN(divider->shift);
drivers/clk/renesas/rzv2h-cpg.c
931
val = readl(priv->base + offset);
drivers/clk/rockchip/clk-ddr.c
77
val = readl(ddrclk->reg_base +
drivers/clk/rockchip/clk-half-divider.c
130
val = readl(divider->reg);
drivers/clk/rockchip/clk-half-divider.c
28
val = readl(divider->reg) >> divider->shift;
drivers/clk/rockchip/clk-inverter.c
30
val = readl(inv_clock->reg) >> inv_clock->shift;
drivers/clk/rockchip/clk-inverter.c
57
reg = readl(inv_clock->reg);
drivers/clk/rockchip/clk-mmc-phase.c
63
raw_value = readl(mmc_clock->reg);
drivers/clk/rockchip/clk-pll.c
1030
u32 pllcon = readl(pll->reg_base + RK3588_PLLCON(1));
drivers/clk/rockchip/clk-pll.c
298
u32 pllcon = readl(pll->reg_base + RK3036_PLLCON(1));
drivers/clk/rockchip/clk-pll.c
533
u32 pllcon = readl(pll->reg_base + RK3066_PLLCON(3));
drivers/clk/rockchip/clk-pll.c
782
u32 pllcon = readl(pll->reg_base + RK3399_PLLCON(3));
drivers/clk/rockchip/softrst.c
46
reg = readl(softrst->reg_base + (bank * 4));
drivers/clk/rockchip/softrst.c
77
reg = readl(softrst->reg_base + (bank * 4));
drivers/clk/samsung/clk-cpu.c
129
if (!(readl(div_reg) & mask))
drivers/clk/samsung/clk-cpu.c
133
if (!(readl(div_reg) & mask))
drivers/clk/samsung/clk-cpu.c
149
if (((readl(mux_reg) >> mux_pos) & mask) == mux_value)
drivers/clk/samsung/clk-cpu.c
153
if (((readl(mux_reg) >> mux_pos) & mask) == mux_value)
drivers/clk/samsung/clk-cpu.c
171
div0 = readl(base + regs->div_cpu0);
drivers/clk/samsung/clk-cpu.c
223
if (readl(base + regs->mux_sel) & E4210_MUX_HPM_MASK)
drivers/clk/samsung/clk-cpu.c
224
div1 = readl(base + regs->div_cpu1) &
drivers/clk/samsung/clk-cpu.c
256
mux_reg = readl(base + regs->mux_sel);
drivers/clk/samsung/clk-cpu.c
297
mux_reg = readl(base + regs->mux_sel);
drivers/clk/samsung/clk-cpu.c
369
mux_reg = readl(base + regs->mux_sel);
drivers/clk/samsung/clk-cpu.c
397
mux_reg = readl(base + regs->mux_sel);
drivers/clk/samsung/clk-cpu.c
520
mux_reg = readl(base + regs->mux);
drivers/clk/samsung/clk-cpu.c
529
val = readl(base + regs->divs[i]);
drivers/clk/samsung/clk-cpu.c
557
mux_reg = readl(base + regs->mux);
drivers/clk/samsung/clk-exynos-arm64.c
126
val = readl(reg);
drivers/clk/samsung/clk-exynos-audss.c
47
reg_save[i][1] = readl(reg_base + reg_save[i][0]);
drivers/clk/samsung/clk-exynos-clkout.c
222
clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG);
drivers/clk/samsung/clk-exynos4.c
1031
xom = readl(chipid_base + 8);
drivers/clk/samsung/clk-exynos5-subcmu.c
26
rd->save = readl(base + rd->offset);
drivers/clk/samsung/clk-exynos5-subcmu.c
37
writel((readl(base + rd->offset) & ~rd->mask) | rd->save,
drivers/clk/samsung/clk-s5pv210-audss.c
44
reg_save[i][1] = readl(reg_base + reg_save[i][0]);
drivers/clk/samsung/clk.c
270
reg = readl(gate->reg);
drivers/clk/samsung/clk.c
32
rd->value = readl(base + rd->offset);
drivers/clk/socfpga/clk-gate-a10.c
30
val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
drivers/clk/socfpga/clk-gate-s10.c
30
val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
drivers/clk/socfpga/clk-gate-s10.c
43
val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
drivers/clk/socfpga/clk-gate-s10.c
60
parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
drivers/clk/socfpga/clk-gate-s10.c
67
second_bypass = readl(socfpgaclk->bypass_reg -
drivers/clk/socfpga/clk-gate-s10.c
90
parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
drivers/clk/socfpga/clk-gate-s10.c
97
second_bypass = readl(socfpgaclk->bypass_reg -
drivers/clk/socfpga/clk-gate.c
36
l4_src = readl(clk_mgr_base_addr + CLKMGR_L4SRC);
drivers/clk/socfpga/clk-gate.c
40
l4_src = readl(clk_mgr_base_addr + CLKMGR_L4SRC);
drivers/clk/socfpga/clk-gate.c
44
perpll_src = readl(clk_mgr_base_addr + CLKMGR_PERPLL_SRC);
drivers/clk/socfpga/clk-gate.c
62
src_reg = readl(clk_mgr_base_addr + CLKMGR_L4SRC);
drivers/clk/socfpga/clk-gate.c
67
src_reg = readl(clk_mgr_base_addr + CLKMGR_L4SRC);
drivers/clk/socfpga/clk-gate.c
72
src_reg = readl(clk_mgr_base_addr + CLKMGR_PERPLL_SRC);
drivers/clk/socfpga/clk-gate.c
97
val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
drivers/clk/socfpga/clk-periph-a10.c
29
div = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
drivers/clk/socfpga/clk-periph-a10.c
33
div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1);
drivers/clk/socfpga/clk-periph-a10.c
45
clk_src = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-periph-s10.c
26
val = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-periph-s10.c
40
val = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-periph-s10.c
57
div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1);
drivers/clk/socfpga/clk-periph-s10.c
72
parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
drivers/clk/socfpga/clk-periph-s10.c
79
clk_src = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-periph.c
27
val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
drivers/clk/socfpga/clk-periph.c
31
div = ((readl(socfpgaclk->hw.reg) & 0x1ff) + 1);
drivers/clk/socfpga/clk-periph.c
41
clk_src = readl(clk_mgr_base_addr + CLKMGR_DBCTRL);
drivers/clk/socfpga/clk-pll-a10.c
42
reg = readl(socfpgaclk->hw.reg + 0x4);
drivers/clk/socfpga/clk-pll-a10.c
55
pll_src = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-pll-s10.c
112
div = ((readl(socfpgaclk->hw.reg) &
drivers/clk/socfpga/clk-pll-s10.c
125
pll_src = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-pll-s10.c
135
pll_src = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-pll-s10.c
146
reg = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-pll-s10.c
159
reg = readl(socfpgaclk->hw.reg + 0x4);
drivers/clk/socfpga/clk-pll-s10.c
48
reg = readl(socfpgaclk->hw.reg + 0x8);
drivers/clk/socfpga/clk-pll-s10.c
69
reg = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-pll-s10.c
75
reg = readl(socfpgaclk->hw.reg + 0x24);
drivers/clk/socfpga/clk-pll-s10.c
92
reg = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-pll-s10.c
99
reg = readl(socfpgaclk->hw.reg + 0x4);
drivers/clk/socfpga/clk-pll.c
46
reg = readl(socfpgaclk->hw.reg);
drivers/clk/socfpga/clk-pll.c
47
bypass = readl(clk_mgr_base_addr + CLKMGR_BYPASS);
drivers/clk/socfpga/clk-pll.c
63
pll_src = readl(socfpgaclk->hw.reg);
drivers/clk/sophgo/clk-cv1800.c
1210
val = readl(base + reg);
drivers/clk/sophgo/clk-cv1800.c
1219
u32 val = readl(base + REG_CLK_BYP_0);
drivers/clk/sophgo/clk-cv1800.c
1237
u32 val = readl(base + REG_CLK_EN_2);
drivers/clk/sophgo/clk-cv18xx-common.c
22
value = readl(common->base + field->reg);
drivers/clk/sophgo/clk-cv18xx-common.c
39
value = readl(common->base + field->reg);
drivers/clk/sophgo/clk-cv18xx-common.c
50
return readl(common->base + field->reg) & BIT(field->shift);
drivers/clk/sophgo/clk-cv18xx-ip.c
121
reg = readl(common->base + div->reg);
drivers/clk/sophgo/clk-cv18xx-ip.c
145
reg = readl(common->base + div->reg);
drivers/clk/sophgo/clk-cv18xx-ip.c
472
u32 reg = readl(mux->common.base + mux->mux.reg);
drivers/clk/sophgo/clk-cv18xx-ip.c
481
reg = readl(mux->common.base + mux->mux.reg);
drivers/clk/sophgo/clk-cv18xx-ip.c
750
reg = readl(mmux->common.base + mux->reg);
drivers/clk/sophgo/clk-cv18xx-ip.c
778
reg = readl(mmux->common.base + mux->reg);
drivers/clk/sophgo/clk-cv18xx-ip.c
855
regval = readl(aclk->common.base + aclk->m.reg);
drivers/clk/sophgo/clk-cv18xx-ip.c
858
regval = readl(aclk->common.base + aclk->n.reg);
drivers/clk/sophgo/clk-cv18xx-pll.c
144
regval = readl(pll->common.base + pll->pll_reg);
drivers/clk/sophgo/clk-cv18xx-pll.c
231
syn_set = readl(pll->common.base + pll->pll_syn->set);
drivers/clk/sophgo/clk-cv18xx-pll.c
239
value = readl(pll->common.base + pll->pll_reg);
drivers/clk/sophgo/clk-cv18xx-pll.c
373
regval = readl(pll->common.base + pll->pll_reg);
drivers/clk/sophgo/clk-cv18xx-pll.c
39
value = readl(pll->common.base + pll->pll_reg);
drivers/clk/sophgo/clk-sg2042-clkgen.c
164
if (!(readl(divider->reg) & BIT(SHIFT_DIV_FACTOR_SEL))) {
drivers/clk/sophgo/clk-sg2042-clkgen.c
167
val = readl(divider->reg) >> divider->shift;
drivers/clk/sophgo/clk-sg2042-clkgen.c
187
if (!(readl(divider->reg) & BIT(SHIFT_DIV_FACTOR_SEL))) {
drivers/clk/sophgo/clk-sg2042-clkgen.c
190
bestdiv = readl(divider->reg) >> divider->shift;
drivers/clk/sophgo/clk-sg2042-clkgen.c
224
val = readl(divider->reg);
drivers/clk/sophgo/clk-sg2042-clkgen.c
233
val = readl(divider->reg);
drivers/clk/sophgo/clk-sg2042-pll.c
128
value = readl(pll->base + R_PLL_CLKEN_CONTROL);
drivers/clk/sophgo/clk-sg2042-pll.c
132
value = readl(pll->base + R_PLL_CLKEN_CONTROL);
drivers/clk/sophgo/clk-sg2042-pll.c
341
value = readl(pll->base + pll->offset_ctrl);
drivers/clk/sophgo/clk-sg2044.c
112
u32 reg = readl(common->base + div->offset);
drivers/clk/sophgo/clk-sg2044.c
133
u32 reg = readl(common->base + div->offset);
drivers/clk/sophgo/clk-sg2044.c
160
reg = readl(addr);
drivers/clk/sophgo/clk-sg2044.c
167
reg = readl(addr);
drivers/clk/sophgo/clk-sg2044.c
201
value = readl(addr);
drivers/clk/sophgo/clk-sg2044.c
216
value = readl(addr);
drivers/clk/sophgo/clk-sg2044.c
225
return readl(div->common.base + div->div.offset) & DIV_BRANCH_EN;
drivers/clk/spear/clk-gpt-synth.c
93
val = readl(gpt->reg) & ~GPT_MSCALE_MASK;
drivers/clk/st/clk-flexgen.c
171
reg = readl(config->reg);
drivers/clk/st/clkgen.h
24
return (readl(base + field->offset) >> field->shift) & field->mask;
drivers/clk/st/clkgen.h
31
writel((readl(base + field->offset) &
drivers/clk/stm32/clk-stm32-core.c
109
val = readl(base + mux->offset) >> mux->shift;
drivers/clk/stm32/clk-stm32-core.c
122
u32 reg = readl(base + mux->offset);
drivers/clk/stm32/clk-stm32-core.c
147
writel(readl(addr) | BIT(gate->bit_idx), addr);
drivers/clk/stm32/clk-stm32-core.c
155
writel(readl(addr) & ~BIT(gate->bit_idx), addr);
drivers/clk/stm32/clk-stm32-core.c
172
writel(readl(addr) & ~BIT(gate->bit_idx), addr);
drivers/clk/stm32/clk-stm32-core.c
181
return (readl(base + gate->offset) & BIT(gate->bit_idx)) != 0;
drivers/clk/stm32/clk-stm32-core.c
216
val = readl(base + divider->offset) >> divider->shift;
drivers/clk/stm32/clk-stm32-core.c
247
val = readl(base + divider->offset);
drivers/clk/stm32/clk-stm32-core.c
369
val = readl(div->base + divider->offset) >> divider->shift;
drivers/clk/stm32/clk-stm32-core.c
446
val = readl(composite->base + divider->offset) >> divider->shift;
drivers/clk/stm32/clk-stm32mp13.c
1471
return !!(readl(base + secf->offset) & BIT(secf->bit_idx));
drivers/clk/stm32/clk-stm32mp21.c
1232
seccfgr = readl(base + RCC_SECCFGR(index));
drivers/clk/stm32/clk-stm32mp21.c
1236
cidcfgr = readl(base + RCC_CIDCFGR(index));
drivers/clk/stm32/clk-stm32mp21.c
1253
semcr = readl(base + RCC_SEMCR(index));
drivers/clk/stm32/clk-stm32mp25.c
1575
seccfgr = readl(base + RCC_SECCFGR(index));
drivers/clk/stm32/clk-stm32mp25.c
1579
cidcfgr = readl(base + RCC_CIDCFGR(index));
drivers/clk/stm32/clk-stm32mp25.c
1596
semcr = readl(base + RCC_SEMCR(index));
drivers/clk/stm32/reset-stm32.c
117
reg = readl(data->membase + ptr_line->offset);
drivers/clk/stm32/reset-stm32.c
78
reg = readl(data->membase + ptr_line->offset);
drivers/clk/sunxi-ng/ccu-sun20i-d1.c
1357
val = readl(reg + pll_regs[i]);
drivers/clk/sunxi-ng/ccu-sun20i-d1.c
1363
val = readl(reg + SUN20I_D1_PLL_CPUX_REG);
drivers/clk/sunxi-ng/ccu-sun20i-d1.c
1373
val = readl(reg + pll_video_regs[i]);
drivers/clk/sunxi-ng/ccu-sun20i-d1.c
1379
val = readl(reg + SUN20I_D1_PLL_AUDIO0_REG);
drivers/clk/sunxi-ng/ccu-sun20i-d1.c
1384
val = readl(reg + SUN20I_D1_FANOUT_27M_REG);
drivers/clk/sunxi-ng/ccu-sun4i-a10.c
1444
val = readl(reg + SUN4I_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun4i-a10.c
1466
val = readl(reg + SUN4I_AHB_REG);
drivers/clk/sunxi-ng/ccu-sun50i-a100.c
1199
val = readl(reg + sun50i_a100_pll_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-a100.c
1212
val = readl(reg + SUN50I_A100_PLL_PERIPH1_REG);
drivers/clk/sunxi-ng/ccu-sun50i-a100.c
1222
val = readl(reg + sun50i_a100_pll_video_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-a100.c
1232
val = readl(reg + SUN50I_A100_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun50i-a100.c
1244
val = readl(reg + sun50i_a100_usb2_clk_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-a64.c
956
val = readl(reg + SUN50I_A64_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
1205
val = readl(reg + SUN50I_H6_PLL_GPU_REG);
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
1211
val = readl(reg + gpu_clk.common.reg);
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
1217
val = readl(reg + pll_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
1228
val = readl(reg + pll_video_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
1240
val = readl(reg + usb2_clk_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
1249
val = readl(reg + SUN50I_H6_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
1258
val = readl(reg + SUN50I_H6_HDMI_CEC_CLK_REG);
drivers/clk/sunxi-ng/ccu-sun50i-h616.c
1179
val = readl(reg + pll_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-h616.c
1190
val = readl(reg + pll_video_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-h616.c
1202
val = readl(reg + usb2_clk_regs[i]);
drivers/clk/sunxi-ng/ccu-sun50i-h616.c
1212
val = readl(reg + SUN50I_H616_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun50i-h616.c
1220
val = readl(reg + SUN50I_H616_GPU_CLK1_REG);
drivers/clk/sunxi-ng/ccu-sun50i-h616.c
1230
val = readl(reg + SUN50I_H616_HDMI_CEC_CLK_REG);
drivers/clk/sunxi-ng/ccu-sun55i-a523-mcu.c
429
val = readl(reg + SUN55I_A523_PLL_AUDIO1_REG);
drivers/clk/sunxi-ng/ccu-sun55i-a523.c
1667
val = readl(reg + pll_regs[i]);
drivers/clk/sunxi-ng/ccu-sun55i-a523.c
1673
val = readl(reg + SUN55I_A523_PLL_AUDIO0_REG);
drivers/clk/sunxi-ng/ccu-sun5i.c
1000
val = readl(reg + SUN5I_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun5i.c
1011
val = readl(reg + SUN5I_AHB_REG);
drivers/clk/sunxi-ng/ccu-sun6i-a31.c
1241
val = readl(reg + SUN6I_A31_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun6i-a31.c
1246
val = readl(reg + SUN6I_A31_PLL_MIPI_REG);
drivers/clk/sunxi-ng/ccu-sun6i-a31.c
1251
val = readl(reg + SUN6I_A31_AHB1_REG);
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
125
val = readl(cm->base + IOSC_CLK_CALI_REG);
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
140
val = readl(cm->base + IOSC_CLK_CALI_REG);
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
152
val = readl(cm->base + IOSC_CLK_CALI_REG);
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
159
val = readl(cm->base + IOSC_32K_CLK_DIV_REG) & IOSC_32K_CLK_DIV;
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
171
val = readl(cm->base + IOSC_CLK_CALI_REG);
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
84
u32 reg = readl(cm->base + IOSC_CLK_CALI_REG);
drivers/clk/sunxi-ng/ccu-sun8i-a23.c
738
val = readl(reg + SUN8I_A23_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun8i-a23.c
743
val = readl(reg + SUN8I_A23_PLL_MIPI_REG);
drivers/clk/sunxi-ng/ccu-sun8i-a33.c
799
val = readl(reg + SUN8I_A33_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun8i-a33.c
804
val = readl(reg + SUN8I_A33_PLL_MIPI_REG);
drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
864
u32 val = readl(reg);
drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
898
val = readl(reg + SUN8I_A83T_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun8i-h3.c
1056
val = readl(reg + SUN8I_H3_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun8i-r40.c
1321
val = readl(reg + SUN8I_R40_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun8i-r40.c
1326
val = readl(reg + SUN8I_R40_PLL_MIPI_REG);
drivers/clk/sunxi-ng/ccu-sun8i-r40.c
1331
val = readl(reg + SUN8I_R40_USB_CLK_REG);
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
754
val = readl(reg + SUN8I_V3S_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
763
val = readl(reg + de_clk.common.reg);
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
768
val = readl(reg + tcon_clk.common.reg);
drivers/clk/sunxi-ng/ccu-sun9i-a80.c
1190
u32 val = readl(reg);
drivers/clk/sunxi-ng/ccu-sun9i-a80.c
1224
val = readl(reg + SUN9I_A80_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c
546
val = readl(reg + SUNIV_PLL_AUDIO_REG);
drivers/clk/sunxi-ng/ccu_div.c
106
reg = readl(cd->common.base + cd->common.reg);
drivers/clk/sunxi-ng/ccu_div.c
62
reg = readl(cd->common.base + cd->common.reg);
drivers/clk/sunxi-ng/ccu_frac.c
106
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_frac.c
19
return !(readl(common->base + common->reg) & cf->enable);
drivers/clk/sunxi-ng/ccu_frac.c
33
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_frac.c
49
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_frac.c
79
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_gate.c
22
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_gate.c
48
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_gate.c
71
return readl(common->base + common->reg) & gate;
drivers/clk/sunxi-ng/ccu_mmc_timing.c
32
val = readl(cm->base + cm->reg);
drivers/clk/sunxi-ng/ccu_mmc_timing.c
61
return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE);
drivers/clk/sunxi-ng/ccu_mp.c
176
reg = readl(cmp->common.base + cmp->common.reg);
drivers/clk/sunxi-ng/ccu_mp.c
238
reg = readl(cmp->common.base + cmp->common.reg);
drivers/clk/sunxi-ng/ccu_mp.c
304
u32 val = readl(cm->base + cm->reg);
drivers/clk/sunxi-ng/ccu_mp.c
315
u32 val = readl(cm->base + cm->reg);
drivers/clk/sunxi-ng/ccu_mp.c
341
u32 val = readl(cm->base + cm->reg);
drivers/clk/sunxi-ng/ccu_mult.c
134
reg = readl(cm->common.base + cm->common.reg);
drivers/clk/sunxi-ng/ccu_mult.c
84
reg = readl(cm->common.base + cm->common.reg);
drivers/clk/sunxi-ng/ccu_mux.c
177
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_mux.c
206
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_mux.c
32
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_nk.c
137
reg = readl(nk->common.base + nk->common.reg);
drivers/clk/sunxi-ng/ccu_nk.c
74
reg = readl(nk->common.base + nk->common.reg);
drivers/clk/sunxi-ng/ccu_nkm.c
137
reg = readl(nkm->common.base + nkm->common.reg);
drivers/clk/sunxi-ng/ccu_nkm.c
228
reg = readl(nkm->common.base + nkm->common.reg);
drivers/clk/sunxi-ng/ccu_nkmp.c
100
reg = readl(nkmp->common.base + nkmp->common.reg);
drivers/clk/sunxi-ng/ccu_nkmp.c
208
reg = readl(nkmp->common.base + nkmp->common.reg);
drivers/clk/sunxi-ng/ccu_nm.c
184
reg = readl(nm->common.base + nm->common.reg);
drivers/clk/sunxi-ng/ccu_nm.c
216
reg = readl(nm->common.base + nm->common.reg);
drivers/clk/sunxi-ng/ccu_nm.c
94
reg = readl(nm->common.base + nm->common.reg);
drivers/clk/sunxi-ng/ccu_phase.c
111
reg = readl(phase->common.base + phase->common.reg);
drivers/clk/sunxi-ng/ccu_phase.c
22
reg = readl(phase->common.base + phase->common.reg);
drivers/clk/sunxi-ng/ccu_reset.c
23
reg = readl(ccu->base + map->reg);
drivers/clk/sunxi-ng/ccu_reset.c
41
reg = readl(ccu->base + map->reg);
drivers/clk/sunxi-ng/ccu_reset.c
69
return !(map->bit & readl(ccu->base + map->reg));
drivers/clk/sunxi-ng/ccu_sdm.c
126
reg = readl(common->base + sdm->tuning_reg);
drivers/clk/sunxi-ng/ccu_sdm.c
18
if (sdm->enable && !(readl(common->base + common->reg) & sdm->enable))
drivers/clk/sunxi-ng/ccu_sdm.c
21
return !!(readl(common->base + sdm->tuning_reg) & sdm->tuning_enable);
drivers/clk/sunxi-ng/ccu_sdm.c
44
reg = readl(common->base + sdm->tuning_reg);
drivers/clk/sunxi-ng/ccu_sdm.c
49
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_sdm.c
65
reg = readl(common->base + common->reg);
drivers/clk/sunxi-ng/ccu_sdm.c
70
reg = readl(common->base + sdm->tuning_reg);
drivers/clk/sunxi/clk-a10-pll2.c
115
val = readl(reg);
drivers/clk/sunxi/clk-a10-ve.c
44
reg = readl(data->reg);
drivers/clk/sunxi/clk-a10-ve.c
63
reg = readl(data->reg);
drivers/clk/sunxi/clk-factors.c
150
reg = readl(factors->reg);
drivers/clk/sunxi/clk-factors.c
50
reg = readl(factors->reg);
drivers/clk/sunxi/clk-mod0.c
179
value = readl(phase->reg);
drivers/clk/sunxi/clk-mod0.c
267
value = readl(phase->reg);
drivers/clk/sunxi/clk-sun4i-display.c
55
reg = readl(data->reg);
drivers/clk/sunxi/clk-sun4i-display.c
72
reg = readl(data->reg);
drivers/clk/sunxi/clk-sun4i-display.c
85
return !(readl(data->reg) & BIT(data->offset + id));
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
176
reg = readl(tclk->reg);
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
198
reg = readl(tclk->reg);
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
41
reg = readl(tclk->reg);
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
54
reg = readl(tclk->reg);
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
67
reg = readl(tclk->reg);
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
76
reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT;
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
89
reg = readl(tclk->reg);
drivers/clk/sunxi/clk-sun9i-cpus.c
159
reg = readl(cpus->reg);
drivers/clk/sunxi/clk-sun9i-cpus.c
57
reg = readl(cpus->reg);
drivers/clk/sunxi/clk-sun9i-mmc.c
47
val = readl(reg);
drivers/clk/sunxi/clk-sun9i-mmc.c
69
val = readl(reg);
drivers/clk/sunxi/clk-usb.c
41
reg = readl(data->reg);
drivers/clk/sunxi/clk-usb.c
62
reg = readl(data->reg);
drivers/clk/tegra/clk-periph-fixed.c
22
value = readl(fixed->base + fixed->regs->enb_reg);
drivers/clk/tegra/clk-periph-fixed.c
24
value = readl(fixed->base + fixed->regs->rst_reg);
drivers/clk/tegra/clk-pll.c
1007
val = readl(pll->clk_base + PLLE_SS_CTRL);
drivers/clk/tegra/clk-pll.c
931
val = readl(pll->pmc + PMC_SATA_PWRGT);
drivers/clk/tegra/clk-pll.c
935
val = readl(pll->pmc + PMC_SATA_PWRGT);
drivers/clk/tegra/clk-pll.c
939
val = readl(pll->pmc + PMC_SATA_PWRGT);
drivers/clk/tegra/clk-tegra114.c
1086
reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
drivers/clk/tegra/clk-tegra114.c
1101
readl(clk_base + CLK_SOURCE_CSITE);
drivers/clk/tegra/clk-tegra114.c
1105
readl(clk_base + CCLKG_BURST_POLICY);
drivers/clk/tegra/clk-tegra114.c
1107
readl(clk_base + CCLKG_BURST_POLICY + 4);
drivers/clk/tegra/clk-tegra124-emc.c
105
val = readl(tegra->clk_regs + CLK_SOURCE_EMC);
drivers/clk/tegra/clk-tegra124-emc.c
170
val = readl(tegra->clk_regs + CLK_SOURCE_EMC);
drivers/clk/tegra/clk-tegra124-emc.c
260
car_value = readl(tegra->clk_regs + CLK_SOURCE_EMC);
drivers/clk/tegra/clk-tegra124.c
1240
reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
drivers/clk/tegra/clk-tegra124.c
1255
readl(clk_base + CLK_SOURCE_CSITE);
drivers/clk/tegra/clk-tegra124.c
1259
readl(clk_base + CCLKG_BURST_POLICY);
drivers/clk/tegra/clk-tegra124.c
1261
readl(clk_base + CCLKG_BURST_POLICY + 4);
drivers/clk/tegra/clk-tegra124.c
1500
plld_base = readl(clk_base + PLLD_BASE);
drivers/clk/tegra/clk-tegra20.c
886
reg = readl(clk_base +
drivers/clk/tegra/clk-tegra20.c
912
reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
drivers/clk/tegra/clk-tegra20.c
916
reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
drivers/clk/tegra/clk-tegra20.c
923
reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
drivers/clk/tegra/clk-tegra20.c
933
cpu_rst_status = readl(clk_base +
drivers/clk/tegra/clk-tegra20.c
943
readl(clk_base + CLK_SOURCE_CSITE);
drivers/clk/tegra/clk-tegra20.c
947
readl(clk_base + CCLK_BURST_POLICY);
drivers/clk/tegra/clk-tegra20.c
949
readl(clk_base + PLLX_BASE);
drivers/clk/tegra/clk-tegra20.c
951
readl(clk_base + PLLX_MISC);
drivers/clk/tegra/clk-tegra20.c
953
readl(clk_base + SUPER_CCLK_DIVIDER);
drivers/clk/tegra/clk-tegra20.c
962
reg = readl(clk_base + CCLK_BURST_POLICY);
drivers/clk/tegra/clk-tegra210.c
3429
reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
drivers/clk/tegra/clk-tegra210.c
3515
readl(clk_base + CLK_SOURCE_CSITE);
drivers/clk/tegra/clk-tegra210.c
3785
value = readl(clk_base + SPARE_REG0) >> CLK_M_DIVISOR_SHIFT;
drivers/clk/tegra/clk-tegra210.c
3801
value = readl(clk_base + PLLD_BASE);
drivers/clk/tegra/clk-tegra210.c
697
readl(vic_base + NV_PVIC_THI_SLCG_OVERRIDE_LOW);
drivers/clk/tegra/clk-tegra210.c
725
readl(i2s_base + TEGRA210_I2S_CG);
drivers/clk/tegra/clk-tegra210.c
728
readl(i2s_base + TEGRA210_I2S_CTRL);
drivers/clk/tegra/clk-tegra30.c
1081
reg = readl(clk_base +
drivers/clk/tegra/clk-tegra30.c
1107
readl(clk_base + TEGRA30_CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR);
drivers/clk/tegra/clk-tegra30.c
1114
reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
drivers/clk/tegra/clk-tegra30.c
1125
cpu_rst_status = readl(clk_base +
drivers/clk/tegra/clk-tegra30.c
1141
readl(clk_base + CLK_RESET_SOURCE_CSITE);
drivers/clk/tegra/clk-tegra30.c
1145
readl(clk_base + CLK_RESET_CCLK_BURST);
drivers/clk/tegra/clk-tegra30.c
1147
readl(clk_base + CLK_RESET_PLLX_BASE);
drivers/clk/tegra/clk-tegra30.c
1149
readl(clk_base + CLK_RESET_PLLX_MISC);
drivers/clk/tegra/clk-tegra30.c
1151
readl(clk_base + CLK_RESET_CCLK_DIVIDER);
drivers/clk/tegra/clk-tegra30.c
1160
reg = readl(clk_base + CLK_RESET_CCLK_BURST);
drivers/clk/tegra/clk.h
917
readl(reg); \
drivers/clk/ux500/clk-prcc.c
40
while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))
drivers/clk/ux500/clk-prcc.c
60
while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))
drivers/clk/ux500/reset-prcc.c
123
val = readl(base + PRCC_K_RST_STATUS);
drivers/clk/versatile/clk-sp810.c
38
u32 val = readl(timerclken->sp810->base + SCCTRL);
drivers/clk/versatile/clk-sp810.c
55
val = readl(sp810->base + SCCTRL);
drivers/clk/visconti/pll.c
166
reg = readl(pll->pll_base + PLL_CTRL_REG);
drivers/clk/visconti/pll.c
185
reg = readl(pll->pll_base + PLL_CTRL_REG);
drivers/clk/visconti/pll.c
191
reg = readl(pll->pll_base + PLL_CTRL_REG);
drivers/clk/visconti/pll.c
197
reg = readl(pll->pll_base + PLL_CTRL_REG);
drivers/clk/visconti/pll.c
203
reg = readl(pll->pll_base + PLL_CTRL_REG);
drivers/clk/visconti/pll.c
225
reg = readl(pll->pll_base + PLL_CTRL_REG);
drivers/clk/visconti/pll.c
229
reg = readl(pll->pll_base + PLL_CTRL_REG);
drivers/clk/visconti/pll.c
61
val = readl(pll->pll_base + PLL_FRACMODE_REG);
drivers/clk/visconti/pll.c
66
rate_table->fracin = readl(pll->pll_base + PLL_FRACIN_REG) & PLL_FRACIN_MASK;
drivers/clk/visconti/pll.c
67
rate_table->intin = readl(pll->pll_base + PLL_INTIN_REG) & PLL_INTIN_MASK;
drivers/clk/visconti/pll.c
68
rate_table->refdiv = readl(pll->pll_base + PLL_REFDIV_REG) & PLL_REFDIV_MASK;
drivers/clk/visconti/pll.c
70
postdiv = readl(pll->pll_base + PLL_POSTDIV_REG);
drivers/clk/x86/clk-pmc-atom.c
109
value = readl(clk->reg);
drivers/clk/x86/clk-pmc-atom.c
135
value = readl(clk->reg);
drivers/clk/x86/clk-pmc-atom.c
88
tmp = readl(clk->reg);
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1025
edge = !!(readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1027
regl = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 1)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1029
regh = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 1)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1036
regl = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 51)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1039
regl = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 48)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1057
reg = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0));
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1083
edged = !!(readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 20)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1085
regld = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 21)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
1087
reghd = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 21)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
204
edge = !!(readl(div_addr) & WZRD_CLKFBOUT_EDGE);
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
205
p5en = !!(readl(div_addr) & WZRD_P5EN);
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
206
prediv2 = !!(readl(div_addr) & WZRD_CLKOUT0_PREDIV2);
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
207
vall = readl(div_addr + 4) & WZRD_CLKFBOUT_L_MASK;
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
208
valh = readl(div_addr + 4) >> WZRD_CLKFBOUT_H_SHIFT;
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
228
val = readl(div_addr) >> divider->shift;
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
249
regval1 = readl(div_addr);
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
460
regval1 = readl(divider->base + WZRD_CLK_CFG_REG(1,
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
485
regval1 = readl(divider->base + WZRD_CLK_CFG_REG(1,
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
573
reg = readl(divider->base + WZRD_CLK_CFG_REG(0, 0));
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
577
reg = readl(divider->base + WZRD_CLK_CFG_REG(0, 2));
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
592
edge = !!(readl(divider->base + WZRD_CLK_CFG_REG(1, WZRD_CLKFBOUT_1)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
595
reg = readl(divider->base + WZRD_CLK_CFG_REG(1, WZRD_CLKFBOUT_2));
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
603
regl = readl(divider->base + WZRD_CLK_CFG_REG(1, WZRD_CLKFBOUT_4)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
606
regl = readl(divider->base + WZRD_CLK_CFG_REG(1, WZRD_CLKFBOUT_3))
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
615
reg = readl(divider->base + WZRD_CLK_CFG_REG(1, WZRD_CLKOUT0_1));
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
620
reg = readl(divider->base + WZRD_CLK_CFG_REG(1, WZRD_CLKOUT0_2));
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
635
edged = !!(readl(divider->base + WZRD_CLK_CFG_REG(1, WZRD_DESKEW_2)) &
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
637
reg = readl(divider->base + WZRD_CLK_CFG_REG(1, WZRD_DIVCLK));
drivers/clk/xilinx/clk-xlnx-clock-wizard.c
732
val = readl(div_addr);
drivers/clk/zynq/clkc.c
150
enable_reg = readl(fclk_gate_reg) & 1;
drivers/clk/zynq/clkc.c
277
tmp = readl(SLCR_621_TRUE) & 1;
drivers/clk/zynq/clkc.c
498
tmp = readl(SLCR_DBG_CLK_CTRL);
drivers/clk/zynq/pll.c
105
reg = readl(clk->pll_ctrl);
drivers/clk/zynq/pll.c
131
reg = readl(clk->pll_ctrl);
drivers/clk/zynq/pll.c
134
while (!(readl(clk->pll_status) & (1 << clk->lockbit)))
drivers/clk/zynq/pll.c
161
reg = readl(clk->pll_ctrl);
drivers/clk/zynq/pll.c
216
reg = readl(pll->pll_ctrl);
drivers/clk/zynq/pll.c
83
fbdiv = (readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >>
drivers/clocksource/arm_global_timer.c
104
ctrl = readl(gt_base + GT_CONTROL);
drivers/clocksource/arm_global_timer.c
125
ctrl = readl(gt_base + GT_CONTROL);
drivers/clocksource/arm_global_timer.c
211
ctrl = readl(gt_base + GT_CONTROL);
drivers/clocksource/arm_global_timer.c
246
reg = readl(gt_base + GT_CONTROL);
drivers/clocksource/arm_global_timer.c
256
reg = readl(gt_base + GT_CONTROL);
drivers/clocksource/bcm_kona_timer.c
116
reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
drivers/clocksource/bcm_kona_timer.c
48
reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
drivers/clocksource/bcm_kona_timer.c
77
*msw = readl(timer_base + KONA_GPTIMER_STCHI_OFFSET);
drivers/clocksource/bcm_kona_timer.c
78
*lsw = readl(timer_base + KONA_GPTIMER_STCLO_OFFSET);
drivers/clocksource/bcm_kona_timer.c
79
if (*msw == readl(timer_base + KONA_GPTIMER_STCHI_OFFSET))
drivers/clocksource/clksrc-dbx500-prcmu.c
62
if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) !=
drivers/clocksource/dw_apb_timer.c
51
return readl(timer->base + offs);
drivers/clocksource/ingenic-ost.c
47
return readl(ingenic_ost->regs + OST_REG_CNTL);
drivers/clocksource/ingenic-ost.c
53
return readl(ingenic_ost->regs + OST_REG_CNTH);
drivers/clocksource/ingenic-sysost.c
112
prescale = readl(ost_clk->ost->base + info->ostccr_reg);
drivers/clocksource/ingenic-sysost.c
157
val = readl(ost_clk->ost->base + info->ostccr_reg);
drivers/clocksource/ingenic-sysost.c
173
val = readl(ost_clk->ost->base + info->ostccr_reg);
drivers/clocksource/ingenic-sysost.c
224
count = readl(ost->base + OST_REG_OST2CNTL);
drivers/clocksource/ingenic-sysost.c
292
val = readl(ost->base + info->ostccr_reg);
drivers/clocksource/ingenic-sysost.c
98
prescale = readl(ost_clk->ost->base + info->ostccr_reg);
drivers/clocksource/jcore-pit.c
112
buspd = readl(pit->base + REG_BUSPD);
drivers/clocksource/jcore-pit.c
47
seclo = readl(base + REG_SECLO);
drivers/clocksource/jcore-pit.c
50
nsec = readl(base + REG_NSEC);
drivers/clocksource/jcore-pit.c
51
seclo = readl(base + REG_SECLO);
drivers/clocksource/nomadik-mtu.c
79
return -readl(mtu_base + MTU_VAL(0));
drivers/clocksource/renesas-ostm.c
76
return readl(system_clock);
drivers/clocksource/samsung_pwm_timer.c
111
reg = readl(pwm.base + REG_TCFG1);
drivers/clocksource/samsung_pwm_timer.c
92
reg = readl(pwm.base + REG_TCFG0);
drivers/clocksource/timer-armada-370-xp.c
212
timer0_ctrl_reg = readl(timer_base + TIMER_CTRL_OFF);
drivers/clocksource/timer-armada-370-xp.c
213
timer0_local_ctrl_reg = readl(local_base + TIMER_CTRL_OFF);
drivers/clocksource/timer-armada-370-xp.c
236
return ~readl(timer_base + TIMER0_VAL_OFF);
drivers/clocksource/timer-armada-370-xp.c
90
writel((readl(local_base + TIMER_CTRL_OFF) & ~clr) | set,
drivers/clocksource/timer-armada-370-xp.c
96
return ~readl(timer_base + TIMER0_VAL_OFF);
drivers/clocksource/timer-atmel-tcb.c
78
tcb_cache[i].cmr = readl(tcaddr + ATMEL_TC_REG(i, CMR));
drivers/clocksource/timer-atmel-tcb.c
79
tcb_cache[i].imr = readl(tcaddr + ATMEL_TC_REG(i, IMR));
drivers/clocksource/timer-atmel-tcb.c
80
tcb_cache[i].rc = readl(tcaddr + ATMEL_TC_REG(i, RC));
drivers/clocksource/timer-atmel-tcb.c
81
tcb_cache[i].clken = !!(readl(tcaddr + ATMEL_TC_REG(i, SR)) &
drivers/clocksource/timer-atmel-tcb.c
85
bmr_cache = readl(tcaddr + ATMEL_TC_BMR);
drivers/clocksource/timer-digicolor.c
146
return ~readl(dc_timer_dev.base + COUNT(TIMER_B));
drivers/clocksource/timer-fttmr010.c
124
return readl(local_fttmr->base + TIMER2_COUNT);
drivers/clocksource/timer-fttmr010.c
129
return ~readl(local_fttmr->base + TIMER2_COUNT);
drivers/clocksource/timer-fttmr010.c
159
cr = readl(fttmr010->base + TIMER1_COUNT);
drivers/clocksource/timer-fttmr010.c
164
cr = readl(fttmr010->base + TIMER_CR);
drivers/clocksource/timer-fttmr010.c
187
cr = readl(fttmr010->base + TIMER_CR);
drivers/clocksource/timer-fttmr010.c
210
cr = readl(fttmr010->base + TIMER_INTR_MASK);
drivers/clocksource/timer-fttmr010.c
237
cr = readl(fttmr010->base + TIMER_INTR_MASK);
drivers/clocksource/timer-fttmr010.c
244
cr = readl(fttmr010->base + TIMER_CR);
drivers/clocksource/timer-imx-sysctr.c
161
priv->cmpcr = readl(base + CMPCR) & ~SYS_CTR_EN;
drivers/clocksource/timer-imx-tpm.c
207
counter_width = (readl(timer_base + TPM_PARAM)
drivers/clocksource/timer-imx-tpm.c
43
val = readl(timer_base + TPM_C0SC);
drivers/clocksource/timer-imx-tpm.c
53
val = readl(timer_base + TPM_C0SC);
drivers/clocksource/timer-imx-tpm.c
66
return readl(timer_base + TPM_CNT);
drivers/clocksource/timer-imx-tpm.c
97
if ((next & 0xffffffff) != readl(timer_base + TPM_C0V))
drivers/clocksource/timer-integrator-ap.c
105
unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
drivers/clocksource/timer-integrator-ap.c
23
return -readl(sched_clk_base + TIMER_VALUE);
drivers/clocksource/timer-integrator-ap.c
72
u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
drivers/clocksource/timer-integrator-ap.c
81
u32 ctrl = readl(clkevt_base + TIMER_CTRL) &
drivers/clocksource/timer-integrator-ap.c
91
u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
drivers/clocksource/timer-loongson1-pwm.c
183
count = readl(ls1x_cs->reg_base + PWM_CNTR);
drivers/clocksource/timer-loongson1-pwm.c
70
val = readl(timer_of_base(to) + PWM_CTRL);
drivers/clocksource/timer-lpc32xx.c
51
return readl(clocksource_timer_counter);
drivers/clocksource/timer-lpc32xx.c
56
return readl(clocksource_timer_counter);
drivers/clocksource/timer-mediatek-cpux.c
40
return readl(timer_of_base(to) + CPUX_CON_REG);
drivers/clocksource/timer-mediatek.c
143
val = readl(timer_of_base(to) + GPT_CTRL_REG(timer));
drivers/clocksource/timer-mediatek.c
162
val = readl(timer_of_base(to) + GPT_CTRL_REG(timer));
drivers/clocksource/timer-mediatek.c
243
val = readl(timer_of_base(to) + GPT_IRQ_EN_REG);
drivers/clocksource/timer-meson6.c
171
val = readl(timer_base + MESON_ISA_TIMER_MUX);
drivers/clocksource/timer-meson6.c
72
return (u64)readl(timer_base + MESON_ISA_TIMERE);
drivers/clocksource/timer-meson6.c
77
u32 val = readl(timer_base + MESON_ISA_TIMER_MUX);
drivers/clocksource/timer-meson6.c
90
u32 val = readl(timer_base + MESON_ISA_TIMER_MUX);
drivers/clocksource/timer-npcm7xx.c
100
val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
drivers/clocksource/timer-npcm7xx.c
115
val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
drivers/clocksource/timer-npcm7xx.c
178
val = readl(timer_of_base(&npcm7xx_to) + NPCM7XX_REG_TCSR1);
drivers/clocksource/timer-npcm7xx.c
61
val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
drivers/clocksource/timer-npcm7xx.c
73
val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
drivers/clocksource/timer-npcm7xx.c
85
val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
drivers/clocksource/timer-nxp-pit.c
105
return ~readl(sched_clock_base);
drivers/clocksource/timer-nxp-pit.c
112
return (u64)~readl(PITCVAL(pit->clksrc_base));
drivers/clocksource/timer-nxp-stm.c
118
reg = readl(STM_CR(stm_timer->base));
drivers/clocksource/timer-nxp-stm.c
129
reg = readl(STM_CR(stm_timer->base));
drivers/clocksource/timer-nxp-stm.c
225
return readl(STM_CNT(stm_timer->base));
drivers/clocksource/timer-nxp-stm.c
94
return readl(STM_CNT(stm_sched_clock->base));
drivers/clocksource/timer-nxp-stm.c
99
return readl(STM_CNT(stm_timer->base));
drivers/clocksource/timer-orion.c
39
return ~readl(timer_base + TIMER0_VAL);
drivers/clocksource/timer-orion.c
57
return ~readl(timer_base + TIMER0_VAL);
drivers/clocksource/timer-owl.c
43
u32 ctl = readl(base + OWL_Tx_CTL);
drivers/clocksource/timer-owl.c
58
return (u64)readl(owl_clksrc_base + OWL_Tx_VAL);
drivers/clocksource/timer-pistachio.c
58
return readl(base + 0x20 * gpt_id + offset);
drivers/clocksource/timer-realtek.c
39
low = readl(systimer_base + TS_LW_OFST);
drivers/clocksource/timer-realtek.c
40
high = readl(systimer_base + TS_HW_OFST);
drivers/clocksource/timer-realtek.c
92
val = readl(reg_base) & TS_CMP_EN_MASK;
drivers/clocksource/timer-sun4i.c
165
return ~readl(timer_of_base(&to) + TIMER_CNTVAL_REG(1));
drivers/clocksource/timer-sun4i.c
214
val = readl(timer_of_base(&to) + TIMER_IRQ_EN_REG);
drivers/clocksource/timer-sun4i.c
50
u32 old = readl(base + TIMER_CNTVAL_REG(1));
drivers/clocksource/timer-sun4i.c
52
while ((old - readl(base + TIMER_CNTVAL_REG(1))) < TIMER_SYNC_TICKS)
drivers/clocksource/timer-sun4i.c
58
u32 val = readl(base + TIMER_CTL_REG(timer));
drivers/clocksource/timer-sun4i.c
72
u32 val = readl(base + TIMER_CTL_REG(timer));
drivers/clocksource/timer-sun5i.c
145
return ~readl(cs->base + TIMER_CNTVAL_LO_REG(1));
drivers/clocksource/timer-sun5i.c
221
val = readl(base + TIMER_IRQ_EN_REG);
drivers/clocksource/timer-sun5i.c
60
u32 old = readl(ce->base + TIMER_CNTVAL_LO_REG(1));
drivers/clocksource/timer-sun5i.c
62
while ((old - readl(ce->base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS)
drivers/clocksource/timer-sun5i.c
68
u32 val = readl(ce->base + TIMER_CTL_REG(timer));
drivers/clocksource/timer-sun5i.c
81
u32 val = readl(ce->base + TIMER_CTL_REG(timer));
drivers/clocksource/timer-versatile.c
19
return readl(versatile_sys_24mhz);
drivers/clocksource/timer-vt8500.c
47
while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
drivers/clocksource/timer-vt8500.c
50
return readl(regbase + TIMER_COUNT_VAL);
drivers/clocksource/timer-vt8500.c
66
while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
drivers/clocksource/timer-vt8500.c
81
writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL);
drivers/clocksource/timer-zevio.c
103
intr = readl(timer->interrupt_regs + IO_INTR_ACK);
drivers/comedi/drivers/addi_apci_3xxx.c
355
status = readl(dev->mmio + 16);
drivers/comedi/drivers/addi_apci_3xxx.c
360
val = readl(dev->mmio + 28);
drivers/comedi/drivers/addi_apci_3xxx.c
373
if ((readl(dev->mmio + 8) & 0x80000) == 0x80000)
drivers/comedi/drivers/addi_apci_3xxx.c
394
delay_mode = readl(dev->mmio + 4);
drivers/comedi/drivers/addi_apci_3xxx.c
425
status = readl(dev->mmio + 20);
drivers/comedi/drivers/addi_apci_3xxx.c
453
data[i] = readl(dev->mmio + 28);
drivers/comedi/drivers/addi_apci_3xxx.c
602
status = readl(dev->mmio + 96);
drivers/comedi/drivers/addi_apci_3xxx.c
736
val = readl(dev->mmio + 16);
drivers/comedi/drivers/addi_apci_3xxx.c
740
readl(dev->mmio + 20);
drivers/comedi/drivers/addi_apci_3xxx.c
744
val = readl(dev->mmio + 28);
drivers/comedi/drivers/amplc_dio200_common.c
112
return readl(dev->mmio + offset);
drivers/comedi/drivers/amplc_dio200_common.c
142
return readl(dev->mmio + offset);
drivers/comedi/drivers/cb_pcidas64.c
1279
readl(devpriv->plx9080_iobase + PLX_REG_CNTRL);
drivers/comedi/drivers/cb_pcidas64.c
1860
data[n] = readl(dev->mmio + ADC_FIFO_REG) & 0xffff;
drivers/comedi/drivers/cb_pcidas64.c
2745
fifo_data = readl(dev->mmio + ADC_FIFO_REG);
drivers/comedi/drivers/cb_pcidas64.c
2783
for (j = 0, next_transfer_addr = readl(pci_addr_reg);
drivers/comedi/drivers/cb_pcidas64.c
2879
readl(devpriv->plx9080_iobase + PLX_REG_DMAPADR0);
drivers/comedi/drivers/cb_pcidas64.c
2903
dma_desc_bits = readl(devpriv->plx9080_iobase + PLX_REG_DMADPR0);
drivers/comedi/drivers/cb_pcidas64.c
2971
next_transfer_addr = readl(pci_addr_reg);
drivers/comedi/drivers/cb_pcidas64.c
3040
plx_status = readl(devpriv->plx9080_iobase + PLX_REG_INTCSR);
drivers/comedi/drivers/cb_pcidas64.c
3057
plx_bits = readl(devpriv->plx9080_iobase + PLX_REG_L2PDBELL);
drivers/comedi/drivers/cb_pcidas64.c
3744
if (readl(plx_control_addr) & PLX_CNTRL_EERB)
drivers/comedi/drivers/cb_pcidas64.c
3943
if (readl(devpriv->plx9080_iobase + PLX_REG_CNTRL) &
drivers/comedi/drivers/cb_pcidas64.c
4001
local_range = readl(devpriv->plx9080_iobase + PLX_REG_LAS0RR) &
drivers/comedi/drivers/cb_pcidas64.c
4003
local_decode = readl(devpriv->plx9080_iobase + PLX_REG_LAS0BA) &
drivers/comedi/drivers/cb_pcidas64.c
4007
local_range = readl(devpriv->plx9080_iobase + PLX_REG_LAS1RR) &
drivers/comedi/drivers/cb_pcidas64.c
4009
local_decode = readl(devpriv->plx9080_iobase + PLX_REG_LAS1BA) &
drivers/comedi/drivers/comedi_8254.c
209
return readl(mmiobase + reg_offset);
drivers/comedi/drivers/daqboard2000.c
422
cntrl = readl(devpriv->plx + PLX_REG_CNTRL);
drivers/comedi/drivers/daqboard2000.c
436
cntrl = readl(devpriv->plx + PLX_REG_CNTRL);
drivers/comedi/drivers/daqboard2000.c
453
cntrl = readl(devpriv->plx + PLX_REG_CNTRL);
drivers/comedi/drivers/daqboard2000.c
520
u32 cntrl = readl(devpriv->plx + PLX_REG_CNTRL);
drivers/comedi/drivers/daqboard2000.c
561
cntrl = readl(devpriv->plx + PLX_REG_CNTRL);
drivers/comedi/drivers/gsc_hpdi.c
151
next = readl(devpriv->plx9080_mmio + PLX_REG_DMAPADR(channel));
drivers/comedi/drivers/gsc_hpdi.c
191
plx_status = readl(devpriv->plx9080_mmio + PLX_REG_INTCSR);
drivers/comedi/drivers/gsc_hpdi.c
196
hpdi_intr_status = readl(dev->mmio + INTERRUPT_STATUS_REG);
drivers/comedi/drivers/gsc_hpdi.c
197
hpdi_board_status = readl(dev->mmio + BOARD_STATUS_REG);
drivers/comedi/drivers/gsc_hpdi.c
228
plx_bits = readl(devpriv->plx9080_mmio + PLX_REG_L2PDBELL);
drivers/comedi/drivers/gsc_hpdi.c
518
devpriv->tx_fifo_size = readl(dev->mmio + TX_FIFO_SIZE_REG) &
drivers/comedi/drivers/gsc_hpdi.c
520
devpriv->rx_fifo_size = readl(dev->mmio + RX_FIFO_SIZE_REG) &
drivers/comedi/drivers/jr3_pci.h
19
return (s16)readl(p);
drivers/comedi/drivers/jr3_pci.h
9
return (u16)readl(p);
drivers/comedi/drivers/me_daq.c
391
value = readl(devpriv->plx_regbase + PLX9052_INTCSR);
drivers/comedi/drivers/mite.c
208
unsigned int fcr_bits = readl(mite->mmio + MITE_FCR(channel));
drivers/comedi/drivers/mite.c
219
return readl(mite->mmio + MITE_DAR(mite_chan->channel));
drivers/comedi/drivers/mite.c
230
return readl(mite->mmio + MITE_FCR(mite_chan->channel)) & 0xff;
drivers/comedi/drivers/mite.c
367
status = readl(mite->mmio + MITE_CHSR(mite_chan->channel));
drivers/comedi/drivers/mite.c
825
unknown_dma_burst_bits = readl(mite->mmio + MITE_UNKNOWN_DMA_BURST_REG);
drivers/comedi/drivers/mite.c
829
csigr_bits = readl(mite->mmio + MITE_CSIGR);
drivers/comedi/drivers/ni_660x.c
290
return readl(dev->mmio + addr);
drivers/comedi/drivers/ni_670x.c
111
data[1] = readl(dev->mmio + DIO_PORT0_DATA_OFFSET);
drivers/comedi/drivers/ni_mio_common.c
238
return readl(dev->mmio + reg);
drivers/comedi/drivers/ni_pcidio.c
425
auxdata = readl(dev->mmio + GROUP_1_FIFO);
drivers/comedi/drivers/ni_pcidio.c
499
data[1] = readl(dev->mmio + PORT_IO(0));
drivers/comedi/drivers/ni_pcimio.c
1234
old_iodwbsr_bits = readl(mite->mmio + MITE_IODWBSR);
drivers/comedi/drivers/ni_pcimio.c
1235
old_iodwbsr1_bits = readl(mite->mmio + MITE_IODWBSR_1);
drivers/comedi/drivers/ni_pcimio.c
1236
old_iodwcr1_bits = readl(mite->mmio + MITE_IODWCR_1);
drivers/comedi/drivers/rtd520.c
1001
status = readl(dev->mmio + LAS0_ADC);
drivers/comedi/drivers/rtd520.c
498
fifo_status = readl(dev->mmio + LAS0_ADC);
drivers/comedi/drivers/rtd520.c
525
status = readl(dev->mmio + LAS0_ADC);
drivers/comedi/drivers/rtd520.c
620
fifo_status = readl(dev->mmio + LAS0_ADC);
drivers/comedi/drivers/rtd520.c
656
overrun = readl(dev->mmio + LAS0_OVERRUN) & 0xffff;
drivers/comedi/drivers/rtd520.c
679
fifo_status = readl(dev->mmio + LAS0_ADC);
drivers/comedi/drivers/rtd520.c
680
overrun = readl(dev->mmio + LAS0_OVERRUN) & 0xffff;
drivers/comedi/drivers/rtd520.c
974
readl(dev->mmio + LAS0_PACER); /* start pacer */
drivers/comedi/drivers/s626.c
124
val = readl(dev->mmio + reg);
drivers/comedi/drivers/s626.c
1241
irqstatus = readl(dev->mmio + S626_P_IER);
drivers/comedi/drivers/s626.c
1244
irqtype = readl(dev->mmio + S626_P_ISR);
drivers/comedi/drivers/s626.c
1478
status = readl(dev->mmio + S626_P_PSR);
drivers/comedi/drivers/s626.c
1517
gpio_image = readl(dev->mmio + S626_P_GPIO);
drivers/comedi/drivers/s626.c
1539
tmp = readl(dev->mmio + S626_P_FB_BUFFER1);
drivers/comedi/drivers/s626.c
1559
gpio_image = readl(dev->mmio + S626_P_GPIO);
drivers/comedi/drivers/s626.c
1579
tmp = readl(dev->mmio + S626_P_FB_BUFFER1);
drivers/comedi/drivers/s626.c
167
if (!(readl(dev->mmio + S626_P_PSR) & S626_PSR_DEBI_S))
drivers/comedi/drivers/s626.c
186
return readl(dev->mmio + S626_P_DEBIAD);
drivers/comedi/drivers/s626.c
218
val = readl(dev->mmio + S626_P_DEBIAD);
drivers/comedi/drivers/s626.c
259
ctrl = readl(dev->mmio + S626_P_I2CCTRL);
drivers/comedi/drivers/s626.c
297
return (readl(dev->mmio + S626_P_I2CCTRL) >> 16) & 0xff;
drivers/comedi/drivers/s626.c
326
status = readl(dev->mmio + S626_P_MC1);
drivers/comedi/drivers/s626.c
331
status = readl(dev->mmio + S626_P_SSR);
drivers/comedi/drivers/s626.c
336
status = readl(dev->mmio + S626_P_FB_BUFFER2);
drivers/comedi/drivers/s626.c
341
status = readl(dev->mmio + S626_P_FB_BUFFER2);
drivers/comedi/drivers/s626.c
468
if (readl(dev->mmio + S626_P_FB_BUFFER2) & 0xff000000) {
drivers/counter/intel-qep.c
78
return readl(qep->regs + offset);
drivers/cpufreq/brcmstb-avs-cpufreq.c
214
val = readl(priv->base + AVS_MBOX_STATUS);
drivers/cpufreq/brcmstb-avs-cpufreq.c
244
val = readl(base + AVS_MBOX_COMMAND);
drivers/cpufreq/brcmstb-avs-cpufreq.c
274
val = readl(base + AVS_MBOX_STATUS);
drivers/cpufreq/brcmstb-avs-cpufreq.c
286
args[i] = readl(base + AVS_MBOX_PARAM(i));
drivers/cpufreq/brcmstb-avs-cpufreq.c
413
return readl(base + AVS_MBOX_VOLTAGE1);
drivers/cpufreq/brcmstb-avs-cpufreq.c
418
return readl(base + AVS_MBOX_FREQUENCY) * 1000; /* in kHz */
drivers/cpufreq/brcmstb-avs-cpufreq.c
475
magic = readl(priv->base + AVS_MBOX_MAGIC);
drivers/cpufreq/loongson2_cpufreq.c
125
cpu_freq = readl(LOONGSON_CHIPCFG);
drivers/cpufreq/loongson2_cpufreq.c
127
writel(readl(LOONGSON_CHIPCFG) & ~0x7, LOONGSON_CHIPCFG);
drivers/cpufreq/tegra186-cpufreq.c
242
ndiv = readl(data->regs + edvd_offset) & EDVD_CORE_VOLT_FREQ_F_MASK;
drivers/cpufreq/tegra194-cpufreq.c
128
*ndiv = readl(data->cpu_data[cpu].freq_core_reg) & NDIV_MASK;
drivers/cpufreq/ti-cpufreq.c
404
efuse = readl(regs);
drivers/cpufreq/ti-cpufreq.c
455
revision = readl(regs);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
104
spaces = readl(ss->base + SS_FCSR);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
320
spaces = readl(ss->base + SS_FCSR);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
447
v = readl(ss->base + SS_CTL);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
322
spaces = readl(ss->base + SS_FCSR);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
365
v = readl(ss->base + SS_CTL);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
386
op->hash[i] = readl(ss->base + SS_MD0 + i * 4);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
466
v = readl(ss->base + SS_CTL);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
489
v = readl(ss->base + SS_MD0 + i * 4);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
497
v = readl(ss->base + SS_MD0 + i * 4);
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-prng.c
58
v = readl(ss->base + SS_KEY0 + i * 4);
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
1047
v = readl(ce->base + CE_CTR);
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
199
v = readl(ce->base + CE_ICR);
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
227
v = readl(ce->base + CE_ESR);
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
291
p = readl(ce->base + CE_ISR);
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
155
p = readl(ss->base + SS_INT_STA_REG);
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
873
v = readl(ss->base + SS_CTL_REG);
drivers/crypto/amcc/crypto4xx_core.c
1092
if ((readl(dev->ce_base + CRYPTO4XX_PRNG_STAT) &
drivers/crypto/amcc/crypto4xx_core.c
92
device_ctrl = readl(dev->ce_base + CRYPTO4XX_DEVICE_CTRL);
drivers/crypto/amcc/crypto4xx_trng.c
56
device_ctrl = readl(dev->ce_base + CRYPTO4XX_DEVICE_CTRL);
drivers/crypto/amlogic/amlogic-gxl-core.c
33
p = readl(mc->base + ((0x04 + flow) << 2));
drivers/crypto/aspeed/aspeed-acry.c
79
readl((acry)->regs + (offset))
drivers/crypto/aspeed/aspeed-hace.h
267
readl((hace)->regs + (offset))
drivers/crypto/gemini/sl3516-ce-core.c
178
v = readl(ce->base + IPSEC_STATUS_REG);
drivers/crypto/gemini/sl3516-ce-core.c
194
v = readl(ce->base + IPSEC_DMA_STATUS);
drivers/crypto/gemini/sl3516-ce-core.c
468
v = readl(ce->base + IPSEC_ID);
drivers/crypto/gemini/sl3516-ce-core.c
472
v = readl(ce->base + IPSEC_DMA_DEVICE_ID);
drivers/crypto/gemini/sl3516-ce-rng.c
34
*data = readl(ce->base + IPSEC_RAND_NUM_REG);
drivers/crypto/hifn_795x.c
614
return readl(dev->bar[0] + reg);
drivers/crypto/hifn_795x.c
619
return readl(dev->bar[1] + reg);
drivers/crypto/hisilicon/debugfs.c
1013
val = readl(qm->io_base + base_offset);
drivers/crypto/hisilicon/debugfs.c
1063
val = readl(qm->io_base + QM_IN_IDLE_ST_REG);
drivers/crypto/hisilicon/debugfs.c
1211
readl(qm->io_base + regs->offset);
drivers/crypto/hisilicon/debugfs.c
593
val = readl(regset->base + regs[i].offset);
drivers/crypto/hisilicon/debugfs.c
626
return readl(qm->io_base + QM_DFX_SQE_CNT_VF_SQN) >> QM_DFX_QN_SHIFT;
drivers/crypto/hisilicon/debugfs.c
637
(readl(qm->io_base + QM_DFX_SQE_CNT_VF_SQN) & CURRENT_FUN_MASK);
drivers/crypto/hisilicon/debugfs.c
641
(readl(qm->io_base + QM_DFX_CQE_CNT_VF_CQN) & CURRENT_FUN_MASK);
drivers/crypto/hisilicon/debugfs.c
649
return readl(qm->io_base + QM_DFX_CNT_CLR_CE);
drivers/crypto/hisilicon/debugfs.c
665
return readl(qm->io_base + QM_DFX_MB_CNT_VF);
drivers/crypto/hisilicon/debugfs.c
705
(readl(qm->io_base + QM_DFX_SQE_CNT_VF_SQN) & CURRENT_Q_MASK);
drivers/crypto/hisilicon/debugfs.c
709
(readl(qm->io_base + QM_DFX_CQE_CNT_VF_CQN) & CURRENT_Q_MASK);
drivers/crypto/hisilicon/debugfs.c
859
diff_regs[i].regs[j] = readl(qm->io_base + base_offset);
drivers/crypto/hisilicon/hpre/hpre_main.c
1387
return readl(qm->io_base + HPRE_INT_STATUS);
drivers/crypto/hisilicon/hpre/hpre_main.c
1415
value = readl(qm->io_base + HPRE_AM_OOO_SHUTDOWN_ENB);
drivers/crypto/hisilicon/hpre/hpre_main.c
485
val = readl(qm->io_base + HPRE_SVA_PREFTCH_DFX4);
drivers/crypto/hisilicon/hpre/hpre_main.c
592
val = readl(qm->io_base + QM_PEH_AXUSER_CFG);
drivers/crypto/hisilicon/hpre/hpre_main.c
659
val = readl(qm->io_base + HPRE_CLKGATE_CTL);
drivers/crypto/hisilicon/hpre/hpre_main.c
663
val = readl(qm->io_base + HPRE_PEH_CFG_AUTO_GATE);
drivers/crypto/hisilicon/hpre/hpre_main.c
672
val = readl(qm->io_base + offset + HPRE_CLUSTER_DYN_CTL);
drivers/crypto/hisilicon/hpre/hpre_main.c
676
val = readl(qm->io_base + offset + HPRE_CORE_SHB_CFG);
drivers/crypto/hisilicon/hpre/hpre_main.c
692
val = readl(qm->io_base + HPRE_CLKGATE_CTL);
drivers/crypto/hisilicon/hpre/hpre_main.c
696
val = readl(qm->io_base + HPRE_PEH_CFG_AUTO_GATE);
drivers/crypto/hisilicon/hpre/hpre_main.c
705
val = readl(qm->io_base + offset + HPRE_CLUSTER_DYN_CTL);
drivers/crypto/hisilicon/hpre/hpre_main.c
709
val = readl(qm->io_base + offset + HPRE_CORE_SHB_CFG);
drivers/crypto/hisilicon/hpre/hpre_main.c
799
val1 = readl(qm->io_base + HPRE_AM_OOO_SHUTDOWN_ENB);
drivers/crypto/hisilicon/hpre/hpre_main.c
856
return readl(qm->io_base + HPRE_CTRL_CNT_CLR_CE) &
drivers/crypto/hisilicon/hpre/hpre_main.c
868
tmp = (readl(qm->io_base + HPRE_CTRL_CNT_CLR_CE) &
drivers/crypto/hisilicon/hpre/hpre_main.c
882
return readl(qm->io_base + offset + HPRE_CLSTR_ADDR_INQRY_RSLT);
drivers/crypto/hisilicon/qm.c
1100
val = readl(qm->io_base + QM_IFC_INT_STATUS);
drivers/crypto/hisilicon/qm.c
1494
irq_unmask &= readl(qm->io_base + QM_ABNORMAL_INT_MASK);
drivers/crypto/hisilicon/qm.c
1502
irq_mask |= readl(qm->io_base + QM_ABNORMAL_INT_MASK);
drivers/crypto/hisilicon/qm.c
1516
irq_unmask &= readl(qm->io_base + QM_ABNORMAL_INT_MASK);
drivers/crypto/hisilicon/qm.c
1524
irq_mask |= readl(qm->io_base + QM_ABNORMAL_INT_MASK);
drivers/crypto/hisilicon/qm.c
1547
reg_val = readl(qm->io_base + QM_ABNORMAL_INF01);
drivers/crypto/hisilicon/qm.c
1555
reg_val = readl(qm->io_base + QM_ABNORMAL_INF00);
drivers/crypto/hisilicon/qm.c
1566
reg_val = readl(qm->io_base + QM_ABNORMAL_INF02);
drivers/crypto/hisilicon/qm.c
1606
val = readl(qm->io_base + QM_IFC_INT_SOURCE_V);
drivers/crypto/hisilicon/qm.c
1683
val = readl(qm->io_base + QM_IFC_INT_CFG);
drivers/crypto/hisilicon/qm.c
1688
val = readl(qm->io_base + QM_IFC_INT_SET_P);
drivers/crypto/hisilicon/qm.c
1697
val = readl(qm->io_base + QM_IFC_INT_SET_V);
drivers/crypto/hisilicon/qm.c
1792
val = readl(qm->io_base + QM_IFC_INT_SET_V);
drivers/crypto/hisilicon/qm.c
1833
if (readl(qm->io_base + QM_PEH_DFX_INFO0))
drivers/crypto/hisilicon/qm.c
1968
return (u64)readl(qm->io_base + offset);
drivers/crypto/hisilicon/qm.c
3096
val = readl(qm->io_base + QM_IFC_INT_MASK);
drivers/crypto/hisilicon/qm.c
3112
val = readl(qm->io_base + QM_IFC_INT_MASK);
drivers/crypto/hisilicon/qm.c
3134
val = readl(qm->io_base + QM_MIG_REGION_SEL);
drivers/crypto/hisilicon/qm.c
3146
val = readl(qm->io_base + QM_MIG_REGION_SEL);
drivers/crypto/hisilicon/qm.c
3945
shaper_vft = readl(qm->io_base + QM_VFT_CFG_DATA_L) |
drivers/crypto/hisilicon/qm.c
3946
((u64)readl(qm->io_base + QM_VFT_CFG_DATA_H) << 32);
drivers/crypto/hisilicon/qm.c
4439
nfe_enb = readl(qm->io_base + QM_RAS_NFE_ENABLE);
drivers/crypto/hisilicon/qm.c
4716
value = readl(qm->io_base + ACC_AM_CFG_PORT_WR_EN);
drivers/crypto/hisilicon/qm.c
4744
value = readl(qm->io_base + ACC_AM_CFG_PORT_WR_EN);
drivers/crypto/hisilicon/qm.c
509
return readl(qm->io_base + QM_ABNORMAL_INT_STATUS);
drivers/crypto/hisilicon/qm.c
5559
val = readl(qm->io_base + QM_FUNC_CAPS_REG);
drivers/crypto/hisilicon/qm.c
5589
sub_version_id = readl(qm->io_base + QM_SUB_VERSION_ID);
drivers/crypto/hisilicon/qm.c
842
val = readl(qm->io_base + QM_PM_CTRL);
drivers/crypto/hisilicon/qm.c
881
val = readl(qm->io_base + info_table[index].offset);
drivers/crypto/hisilicon/qm.c
902
val = readl(qm->io_base + info_table[index].offset);
drivers/crypto/hisilicon/sec/sec_drv.c
690
ooo_read = readl(base + SEC_Q_OUTORDER_RD_PTR_REG);
drivers/crypto/hisilicon/sec/sec_drv.c
691
ooo_write = readl(base + SEC_Q_OUTORDER_WR_PTR_REG);
drivers/crypto/hisilicon/sec/sec_drv.c
717
ooo_write = readl(base + SEC_Q_OUTORDER_WR_PTR_REG);
drivers/crypto/hisilicon/sec/sec_drv.c
865
read = readl(base + SEC_Q_RD_PTR_REG);
drivers/crypto/hisilicon/sec/sec_drv.c
866
write = readl(base + SEC_Q_WR_PTR_REG);
drivers/crypto/hisilicon/sec2/sec_main.c
1098
err_val = readl(qm->io_base +
drivers/crypto/hisilicon/sec2/sec_main.c
1111
return readl(qm->io_base + SEC_CORE_INT_STATUS);
drivers/crypto/hisilicon/sec2/sec_main.c
1139
val = readl(qm->io_base + SEC_CONTROL_REG);
drivers/crypto/hisilicon/sec2/sec_main.c
500
val = readl(qm->io_base + offset);
drivers/crypto/hisilicon/sec2/sec_main.c
612
val = readl(qm->io_base + SEC_DYNAMIC_GATE_REG);
drivers/crypto/hisilicon/sec2/sec_main.c
616
val = readl(qm->io_base + SEC_CORE_AUTO_GATE);
drivers/crypto/hisilicon/sec2/sec_main.c
714
readl(qm->io_base + sec_dfx_regs[i].offset);
drivers/crypto/hisilicon/sec2/sec_main.c
726
val1 = readl(qm->io_base + SEC_CONTROL_REG);
drivers/crypto/hisilicon/sec2/sec_main.c
783
return readl(qm->io_base + SEC_CTRL_CNT_CLR_CE) &
drivers/crypto/hisilicon/sec2/sec_main.c
794
tmp = (readl(qm->io_base + SEC_CTRL_CNT_CLR_CE) &
drivers/crypto/hisilicon/trng/trng.c
160
data[i] = readl(trng->base + SW_DRBG_DATA(i));
drivers/crypto/hisilicon/trng/trng.c
317
trng->ver = readl(trng->base + HISI_TRNG_VERSION);
drivers/crypto/hisilicon/zip/dae_main.c
119
axi_val = readl(qm->io_base + DAE_AXI_CFG_OFFSET);
drivers/crypto/hisilicon/zip/dae_main.c
162
return readl(qm->io_base + DAE_ERR_STATUS_OFFSET);
drivers/crypto/hisilicon/zip/dae_main.c
200
ecc_info = readl(qm->io_base + DAE_ECC_INFO_OFFSET);
drivers/crypto/hisilicon/zip/dae_main.c
253
val = readl(qm->io_base + DAE_AM_CTRL_GLOBAL_OFFSET);
drivers/crypto/hisilicon/zip/dae_main.c
273
val = readl(qm->io_base + DAE_AXI_CFG_OFFSET);
drivers/crypto/hisilicon/zip/dae_main.c
72
val = readl(qm->io_base + DAE_MEM_START_OFFSET);
drivers/crypto/hisilicon/zip/zip_main.c
1034
readl(get_zip_core_addr(qm, i) +
drivers/crypto/hisilicon/zip/zip_main.c
1163
err_val = readl(qm->io_base +
drivers/crypto/hisilicon/zip/zip_main.c
1176
return readl(qm->io_base + HZIP_CORE_INT_STATUS);
drivers/crypto/hisilicon/zip/zip_main.c
1204
val = readl(qm->io_base + HZIP_SOFT_CTRL_ZIP_CONTROL);
drivers/crypto/hisilicon/zip/zip_main.c
1220
nfe_enb = readl(qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB);
drivers/crypto/hisilicon/zip/zip_main.c
506
val = readl(qm->io_base + offset);
drivers/crypto/hisilicon/zip/zip_main.c
578
val = readl(qm->io_base + HZIP_CLOCK_GATE_CTRL);
drivers/crypto/hisilicon/zip/zip_main.c
582
val = readl(qm->io_base + HZIP_PEH_CFG_AUTO_GATE);
drivers/crypto/hisilicon/zip/zip_main.c
663
val1 = readl(qm->io_base + HZIP_SOFT_CTRL_ZIP_CONTROL);
drivers/crypto/hisilicon/zip/zip_main.c
728
return readl(qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE) &
drivers/crypto/hisilicon/zip/zip_main.c
739
tmp = (readl(qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE) &
drivers/crypto/inside-secure/eip93/eip93-main.c
199
left = readl(eip93->base + EIP93_REG_PE_RD_COUNT) & EIP93_PE_RD_COUNT;
drivers/crypto/inside-secure/eip93/eip93-main.c
284
irq_status = readl(eip93->base + EIP93_REG_INT_MASK_STAT);
drivers/crypto/inside-secure/eip93/eip93-main.c
314
val = readl(eip93->base + EIP93_REG_PE_CONFIG);
drivers/crypto/inside-secure/eip93/eip93-main.c
454
algo_flags = readl(eip93->base + EIP93_REG_PE_OPTION_1);
drivers/crypto/inside-secure/eip93/eip93-main.c
467
ver = readl(eip93->base + EIP93_REG_PE_REVISION);
drivers/crypto/inside-secure/eip93/eip93-main.c
475
readl(eip93->base + EIP93_REG_PE_OPTION_0));
drivers/crypto/inside-secure/eip93/eip93-main.c
485
algo_flags = readl(eip93->base + EIP93_REG_PE_OPTION_1);
drivers/crypto/inside-secure/safexcel.c
1022
nreq = readl(EIP197_HIA_RDR(priv, ring) + EIP197_HIA_xDR_PROC_COUNT);
drivers/crypto/inside-secure/safexcel.c
1094
status = readl(EIP197_HIA_AIC_R(priv) + EIP197_HIA_AIC_R_ENABLED_STAT(ring));
drivers/crypto/inside-secure/safexcel.c
1100
stat = readl(EIP197_HIA_RDR(priv, ring) + EIP197_HIA_xDR_STAT);
drivers/crypto/inside-secure/safexcel.c
112
val = readl(priv->base + EIP197_CLASSIFICATION_RAMS +
drivers/crypto/inside-secure/safexcel.c
1408
version = readl(priv->base + EIP97_HIA_AIC_BASE + EIP197_HIA_VERSION);
drivers/crypto/inside-secure/safexcel.c
1419
version = readl(priv->base + EIP197_HIA_AIC_BASE +
drivers/crypto/inside-secure/safexcel.c
1444
val = readl(EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
drivers/crypto/inside-secure/safexcel.c
1454
version = readl(EIP197_GLOBAL(priv) + EIP197_VERSION);
drivers/crypto/inside-secure/safexcel.c
1474
version = readl(EIP197_PE(priv) + + EIP197_PE_VERSION(0));
drivers/crypto/inside-secure/safexcel.c
1482
version = readl(EIP197_PE(priv) + EIP197_PE_EIP96_VERSION(0));
drivers/crypto/inside-secure/safexcel.c
1489
hwopt = readl(EIP197_GLOBAL(priv) + EIP197_OPTIONS);
drivers/crypto/inside-secure/safexcel.c
1490
hiaopt = readl(EIP197_HIA_AIC(priv) + EIP197_HIA_OPTIONS);
drivers/crypto/inside-secure/safexcel.c
1497
peopt = readl(EIP197_PE(priv) + EIP197_PE_OPTIONS(0));
drivers/crypto/inside-secure/safexcel.c
1516
version = readl(EIP197_PE(priv) +
drivers/crypto/inside-secure/safexcel.c
1528
version = readl(EIP197_PE(priv) + EIP197_PE_PSE_VERSION(0));
drivers/crypto/inside-secure/safexcel.c
1535
version = readl(EIP197_PE(priv) +
drivers/crypto/inside-secure/safexcel.c
1564
version = readl(EIP197_HIA_AIC_R(priv) +
drivers/crypto/inside-secure/safexcel.c
1577
priv->hwconfig.algo_flags = readl(EIP197_PE(priv) +
drivers/crypto/inside-secure/safexcel.c
172
val = readl(priv->base + EIP197_CS_RAM_CTRL);
drivers/crypto/inside-secure/safexcel.c
176
val = readl(priv->base + EIP197_CS_RAM_CTRL);
drivers/crypto/inside-secure/safexcel.c
186
val = readl(priv->base + EIP197_TRC_PARAMS);
drivers/crypto/inside-secure/safexcel.c
1926
val = readl(pciebase + EIP197_XLX_IRQ_BLOCK_ID_ADDR);
drivers/crypto/inside-secure/safexcel.c
198
val = readl(priv->base + EIP197_TRC_PARAMS);
drivers/crypto/inside-secure/safexcel.c
244
val = readl(priv->base + EIP197_CS_RAM_CTRL);
drivers/crypto/inside-secure/safexcel.c
280
val = readl(EIP197_PE(priv) + EIP197_PE_ICE_SCRATCH_CTRL(pe));
drivers/crypto/inside-secure/safexcel.c
586
val = readl(EIP197_HIA_AIC_R(priv) + EIP197_HIA_AIC_R_ENABLE_CTRL(i));
drivers/crypto/inside-secure/safexcel.c
607
val = readl(EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
drivers/crypto/inside-secure/safexcel.c
672
while ((readl(EIP197_HIA_DSE_THR(priv) + EIP197_HIA_DSE_THR_STAT(pe)) &
drivers/crypto/inside-secure/safexcel.c
69
val = readl(priv->base + EIP197_CS_RAM_CTRL);
drivers/crypto/intel/keembay/ocs-hcu.c
270
chain[i] = readl(hcu_dev->io_base + OCS_HCU_CHAIN);
drivers/crypto/intel/keembay/ocs-hcu.c
272
data->msg_len_lo = readl(hcu_dev->io_base + OCS_HCU_MSG_LEN_LO);
drivers/crypto/intel/keembay/ocs-hcu.c
273
data->msg_len_hi = readl(hcu_dev->io_base + OCS_HCU_MSG_LEN_HI);
drivers/crypto/intel/keembay/ocs-hcu.c
328
chain[i] = readl(hcu_dev->io_base + OCS_HCU_CHAIN);
drivers/crypto/intel/keembay/ocs-hcu.c
815
hcu_irq = readl(hcu_dev->io_base + OCS_HCU_ISR);
drivers/crypto/intel/keembay/ocs-hcu.c
819
dma_irq = readl(hcu_dev->io_base + OCS_HCU_DMA_MSI_ISR);
drivers/crypto/marvell/cesa/cesa.c
119
status = readl(engine->regs + CESA_SA_INT_STATUS);
drivers/crypto/marvell/cesa/cipher.c
121
WARN_ON(readl(engine->regs + CESA_SA_CMD) &
drivers/crypto/marvell/cesa/hash.c
282
WARN_ON(readl(engine->regs + CESA_SA_CMD) &
drivers/crypto/marvell/cesa/tdma.c
139
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
drivers/crypto/marvell/cesa/tdma.c
62
WARN_ON(readl(engine->regs + CESA_SA_CMD) &
drivers/crypto/mxs-dcp.c
1040
stat = readl(sdcp->base + MXS_DCP_STAT);
drivers/crypto/mxs-dcp.c
1170
sdcp->caps = readl(sdcp->base + MXS_DCP_CAPABILITY1);
drivers/crypto/mxs-dcp.c
206
chan, readl(sdcp->base + MXS_DCP_STAT));
drivers/crypto/mxs-dcp.c
210
stat = readl(sdcp->base + MXS_DCP_CH_N_STAT(chan));
drivers/crypto/qce/common.c
23
return readl(qce->base + offset);
drivers/crypto/rockchip/rk3288_crypto_ahash.c
330
v = readl(rkc->reg + RK_CRYPTO_HASH_DOUT_0 + i * 4);
drivers/crypto/sahara.c
229
return readl(dev->regs_base + reg);
drivers/crypto/starfive/jh7110-aes.c
153
iv[0] = readl(cryp->base + STARFIVE_AES_IV0);
drivers/crypto/starfive/jh7110-aes.c
154
iv[1] = readl(cryp->base + STARFIVE_AES_IV1);
drivers/crypto/starfive/jh7110-aes.c
155
iv[2] = readl(cryp->base + STARFIVE_AES_IV2);
drivers/crypto/starfive/jh7110-aes.c
156
iv[3] = readl(cryp->base + STARFIVE_AES_IV3);
drivers/crypto/starfive/jh7110-aes.c
303
cryp->tag_out[0] = readl(cryp->base + STARFIVE_AES_NONCE0);
drivers/crypto/starfive/jh7110-aes.c
304
cryp->tag_out[1] = readl(cryp->base + STARFIVE_AES_NONCE1);
drivers/crypto/starfive/jh7110-aes.c
305
cryp->tag_out[2] = readl(cryp->base + STARFIVE_AES_NONCE2);
drivers/crypto/starfive/jh7110-aes.c
306
cryp->tag_out[3] = readl(cryp->base + STARFIVE_AES_NONCE3);
drivers/crypto/starfive/jh7110-aes.c
309
cryp->tag_out[i] = readl(cryp->base + STARFIVE_AES_AESDIO0R);
drivers/crypto/starfive/jh7110-aes.c
93
value = readl(ctx->cryp->base + STARFIVE_AES_CSR);
drivers/crypto/starfive/jh7110-aes.c
99
value = readl(ctx->cryp->base + STARFIVE_AES_CSR);
drivers/crypto/starfive/jh7110-hash.c
179
put_unaligned(readl(ctx->cryp->base + STARFIVE_HASH_SHARDR),
drivers/crypto/starfive/jh7110-hash.c
98
csr.v = readl(cryp->base + STARFIVE_HASH_SHACSR);
drivers/crypto/starfive/jh7110-rsa.c
161
temp = readl(cryp->base + STARFIVE_PKA_CAAR_OFFSET + 0x4 * loop);
drivers/crypto/starfive/jh7110-rsa.c
230
temp = readl(cryp->base + STARFIVE_PKA_CAAR_OFFSET + 0x4 * loop);
drivers/crypto/tegra/tegra-se-aes.c
1057
result[i] = readl(se->base + se->hw->regs->result + (i * 4));
drivers/crypto/tegra/tegra-se-aes.c
1529
rctx->result[i] = readl(se->base + se->hw->regs->result + (i * 4));
drivers/crypto/tegra/tegra-se-aes.c
1691
result[i] = readl(se->base + se->hw->regs->result + (i * 4));
drivers/cxl/core/hdm.c
1087
lo = readl(hdm + CXL_HDM_DECODER0_TL_LOW(which));
drivers/cxl/core/hdm.c
1088
hi = readl(hdm + CXL_HDM_DECODER0_TL_HIGH(which));
drivers/cxl/core/hdm.c
1106
lo = readl(hdm + CXL_HDM_DECODER0_SKIP_LOW(which));
drivers/cxl/core/hdm.c
1107
hi = readl(hdm + CXL_HDM_DECODER0_SKIP_HIGH(which));
drivers/cxl/core/hdm.c
1141
ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(i));
drivers/cxl/core/hdm.c
122
ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET);
drivers/cxl/core/hdm.c
745
ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(id));
drivers/cxl/core/hdm.c
766
ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(cxld->id));
drivers/cxl/core/hdm.c
77
hdm_cap = readl(cxlhdm->regs.hdm_decoder + CXL_HDM_DECODER_CAP_OFFSET);
drivers/cxl/core/hdm.c
910
ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(id));
drivers/cxl/core/hdm.c
990
ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(which));
drivers/cxl/core/hdm.c
991
lo = readl(hdm + CXL_HDM_DECODER0_BASE_LOW_OFFSET(which));
drivers/cxl/core/hdm.c
992
hi = readl(hdm + CXL_HDM_DECODER0_BASE_HIGH_OFFSET(which));
drivers/cxl/core/hdm.c
994
lo = readl(hdm + CXL_HDM_DECODER0_SIZE_LOW_OFFSET(which));
drivers/cxl/core/hdm.c
995
hi = readl(hdm + CXL_HDM_DECODER0_SIZE_HIGH_OFFSET(which));
drivers/cxl/core/pci.c
245
global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET);
drivers/cxl/core/pci.c
255
global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET);
drivers/cxl/core/pci.c
378
global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET);
drivers/cxl/core/pci.c
687
ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(cxld->id));
drivers/cxl/core/ras.c
195
status = readl(addr);
drivers/cxl/core/ras.c
213
*log_addr = readl(addr);
drivers/cxl/core/ras.c
234
status = readl(addr);
drivers/cxl/core/ras.c
244
readl(rcc_addr)));
drivers/cxl/core/ras_rch.c
45
aer_cmd = readl(aer_base + PCI_ERR_ROOT_COMMAND);
drivers/cxl/core/ras_rch.c
70
aer_regs_buf[n] = readl(aer_base + n * sizeof(u32));
drivers/cxl/core/regs.c
140
readl(base + cap * 0x10));
drivers/cxl/core/regs.c
141
offset = readl(base + cap * 0x10 + 0x4);
drivers/cxl/core/regs.c
142
length = readl(base + cap * 0x10 + 0x8);
drivers/cxl/core/regs.c
501
cap_hdr = readl(addr + offset);
drivers/cxl/core/regs.c
508
cap_hdr = readl(addr + offset);
drivers/cxl/core/regs.c
52
cap_array = readl(base + CXL_CM_CAP_HDR_OFFSET);
drivers/cxl/core/regs.c
539
cap_hdr = readl(addr + offset);
drivers/cxl/core/regs.c
546
cap_hdr = readl(addr + offset);
drivers/cxl/core/regs.c
604
id = readl(addr + PCI_VENDOR_ID);
drivers/cxl/core/regs.c
605
bar0 = readl(addr + PCI_BASE_ADDRESS_0);
drivers/cxl/core/regs.c
606
bar1 = readl(addr + PCI_BASE_ADDRESS_1);
drivers/cxl/core/regs.c
69
hdr = readl(base + cap * 0x4);
drivers/cxl/core/regs.c
74
hdr = readl(register_block);
drivers/cxl/pci.c
38
(readl((cxlds)->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET) & \
drivers/cxl/pci.c
393
const int cap = readl(cxlds->regs.mbox + CXLDEV_MBOX_CAPS_OFFSET);
drivers/cxl/pci.c
461
ctrl = readl(cxlds->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET);
drivers/cxl/pci.c
594
status = readl(cxlds->regs.status + CXLDEV_DEV_EVENT_STATUS_OFFSET);
drivers/cxl/pci.c
806
readl(dport->regs.rcd_pcie_cap + offset));
drivers/cxl/port.c
111
orig_val = readl(addr);
drivers/cxl/port.c
99
orig_val = readl(addr);
drivers/devfreq/sun8i-a33-mbus.c
183
writel((readl(reg) & ~DRAM_DXnGCR0_DXODT) | dxodt, reg);
drivers/dma/amba-pl08x.c
2290
err = readl(pl08x->base + PL080_ERR_STATUS);
drivers/dma/amba-pl08x.c
2296
tc = readl(pl08x->base + PL080_TC_STATUS);
drivers/dma/amba-pl08x.c
2731
val = readl(pl08x->base + FTDMAC020_REVISION);
drivers/dma/amba-pl08x.c
2734
val = readl(pl08x->base + FTDMAC020_FEATURE);
drivers/dma/amba-pl08x.c
2898
val = readl(ch->reg_config);
drivers/dma/amba-pl08x.c
375
val = readl(ch->reg_busy);
drivers/dma/amba-pl08x.c
378
val = readl(ch->reg_config);
drivers/dma/amba-pl08x.c
547
while (readl(pl08x->base + PL080_EN_CHAN) & BIT(phychan->id))
drivers/dma/amba-pl08x.c
552
val = readl(phychan->reg_config);
drivers/dma/amba-pl08x.c
554
val = readl(phychan->reg_config);
drivers/dma/amba-pl08x.c
556
val = readl(phychan->reg_control);
drivers/dma/amba-pl08x.c
558
val = readl(phychan->reg_control);
drivers/dma/amba-pl08x.c
563
val = readl(phychan->reg_config);
drivers/dma/amba-pl08x.c
566
val = readl(phychan->reg_config);
drivers/dma/amba-pl08x.c
589
val = readl(ch->reg_control);
drivers/dma/amba-pl08x.c
596
val = readl(ch->reg_config);
drivers/dma/amba-pl08x.c
616
val = readl(ch->reg_control);
drivers/dma/amba-pl08x.c
623
val = readl(ch->reg_config);
drivers/dma/amba-pl08x.c
642
val = readl(ch->reg_config);
drivers/dma/amba-pl08x.c
649
val = readl(ch->reg_control);
drivers/dma/amba-pl08x.c
662
val = readl(ch->reg_config);
drivers/dma/amba-pl08x.c
677
bytes = readl(ch->base + FTDMAC020_CH_SIZE);
drivers/dma/amba-pl08x.c
679
val = readl(ch->reg_control);
drivers/dma/amba-pl08x.c
683
val = readl(ch->base + PL080S_CH_CONTROL2);
drivers/dma/amba-pl08x.c
686
val = readl(ch->reg_control);
drivers/dma/amba-pl08x.c
691
val = readl(ch->reg_control);
drivers/dma/amba-pl08x.c
774
clli = readl(ch->reg_lli) & ~PL080_LLI_LM_AHB2;
drivers/dma/amd/ae4dma/ae4dma-dev.c
32
cridx = readl(cmd_q->reg_control + AE4_RD_IDX_OFF);
drivers/dma/amd/ae4dma/ae4dma-dev.c
62
status = readl(cmd_q->reg_control + AE4_INTR_STS_OFF);
drivers/dma/amd/ptdma/ptdma-debugfs.c
77
regval = readl(cmd_q->reg_control + 0x4);
drivers/dma/amd/ptdma/ptdma-dmaengine.c
252
u32 front_wi = readl(cmd_q->reg_control + AE4_WR_IDX_OFF);
drivers/dma/amd/ptdma/ptdma-dmaengine.c
253
u32 rear_ri = readl(cmd_q->reg_control + AE4_RD_IDX_OFF);
drivers/dma/arm-dma350.c
471
ch_status = readl(dch->base + CH_STATUS);
drivers/dma/bcm2835-dma.c
402
if (!readl(chan_base + BCM2835_DMA_ADDR))
drivers/dma/bcm2835-dma.c
409
while ((readl(chan_base + BCM2835_DMA_CS) &
drivers/dma/bcm2835-dma.c
448
flags = readl(c->chan_base + BCM2835_DMA_CS);
drivers/dma/bcm2835-dma.c
472
} else if (!readl(c->chan_base + BCM2835_DMA_ADDR)) {
drivers/dma/bcm2835-dma.c
567
pos = readl(c->chan_base + BCM2835_DMA_SOURCE_AD);
drivers/dma/bcm2835-dma.c
569
pos = readl(c->chan_base + BCM2835_DMA_DEST_AD);
drivers/dma/bcm2835-dma.c
818
if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
drivers/dma/bcm2835-dma.c
871
if (readl(chan_base + BCM2835_DMA_ADDR))
drivers/dma/dma-axi-dmac.c
201
return readl(axi_dmac->base + reg);
drivers/dma/dma-jz4780.c
186
return readl(jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn));
drivers/dma/dma-jz4780.c
198
return readl(jzdma->ctrl_base + reg);
drivers/dma/dw-edma/dw-edma-v0-core.c
146
value = readl(addr);
drivers/dma/dw-edma/dw-edma-v0-core.c
150
value = readl(addr);
drivers/dma/dw-edma/dw-edma-v0-core.c
360
readl(chunk->ll_region.vaddr.io);
drivers/dma/dw-edma/dw-edma-v0-core.c
37
readl(&(__dw_regs(dw)->name))
drivers/dma/dw-edma/dw-edma-v0-debugfs.c
88
*val = readl(reg);
drivers/dma/dw-edma/dw-edma-v0-debugfs.c
92
*val = readl(reg);
drivers/dma/dw-edma/dw-hdma-v0-core.c
225
readl(chunk->ll_region.vaddr.io);
drivers/dma/dw-edma/dw-hdma-v0-core.c
44
readl(&(__dw_ch_regs(dw, dir, ch)->name))
drivers/dma/dw-edma/dw-hdma-v0-debugfs.c
53
*val = readl(reg);
drivers/dma/dw/core.c
1268
unsigned int dwc_params = readl(addr);
drivers/dma/dw/idma32.c
55
value = readl(misc + DMA_REGACCESS_CHID_CFG);
drivers/dma/dw/idma32.c
63
value = readl(misc + DMA_CTL_CH(dwc->chan.chan_id));
drivers/dma/dw/idma32.c
91
value = readl(misc + DMA_XBAR_SEL(dwc->chan.chan_id));
drivers/dma/dw/regs.h
304
readl(&(__dwc_regs(dwc)->name))
drivers/dma/dw/regs.h
349
readl(&(__dw_regs(dw)->name))
drivers/dma/ep93xx_dma.c
376
readl(edmac->regs + M2P_CONTROL);
drivers/dma/ep93xx_dma.c
396
return (readl(edmac->regs + M2P_STATUS) >> 4) & 0x3;
drivers/dma/ep93xx_dma.c
405
control = readl(edmac->regs + M2P_CONTROL);
drivers/dma/ep93xx_dma.c
451
u32 control = readl(edmac->regs + M2P_CONTROL);
drivers/dma/ep93xx_dma.c
466
u32 irq_status = readl(edmac->regs + M2P_INTERRUPT);
drivers/dma/ep93xx_dma.c
507
control = readl(edmac->regs + M2P_CONTROL);
drivers/dma/ep93xx_dma.c
609
u32 control = readl(edmac->regs + M2M_CONTROL);
drivers/dma/ep93xx_dma.c
656
u32 status = readl(edmac->regs + M2M_STATUS);
drivers/dma/ep93xx_dma.c
665
if (!(readl(edmac->regs + M2M_INTERRUPT) & M2M_INTERRUPT_MASK))
drivers/dma/ep93xx_dma.c
698
control = readl(edmac->regs + M2M_CONTROL);
drivers/dma/ep93xx_dma.c
716
control = readl(edmac->regs + M2M_CONTROL);
drivers/dma/hsu/hsu.h
105
return readl(hsuc->reg + offset);
drivers/dma/hsu/pci.c
36
dmaisr = readl(chip->regs + HSU_PCI_DMAISR);
drivers/dma/idma64.h
153
return readl(idma64c->regs + offset);
drivers/dma/idma64.h
200
return readl(idma64->regs + offset);
drivers/dma/img-mdc-dma.c
150
return readl(mdma->regs + reg);
drivers/dma/imx-sdma.c
737
return !!(readl(sdma->regs + SDMA_H_STATSTOP) & BIT(channel));
drivers/dma/imx-sdma.c
761
reg = readl(sdma->regs + SDMA_H_CONFIG);
drivers/dma/ioat/dca.c
225
req = readl(iobase + global_req_table + (slots * sizeof(u32)));
drivers/dma/ioat/dca.c
309
readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_LOW);
drivers/dma/ioat/dca.c
311
readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_HIGH);
drivers/dma/ioat/dma.c
1016
chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
drivers/dma/ioat/dma.c
109
attnstatus = readl(instance->reg_base + IOAT_ATTNSTATUS_OFFSET);
drivers/dma/ioat/dma.c
681
u32 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
drivers/dma/ioat/dma.c
791
chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
drivers/dma/ioat/dma.c
917
chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
drivers/dma/ioat/dma.c
958
chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
drivers/dma/ioat/dma.h
254
return readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
drivers/dma/ioat/init.c
1066
errmask = readl(ioat_chan->reg_base +
drivers/dma/ioat/init.c
1095
ioat_dma->cap = readl(ioat_dma->reg_base + IOAT_DMA_CAP_OFFSET);
drivers/dma/ioat/init.c
1256
chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
drivers/dma/ioat/init.c
745
chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
drivers/dma/lgm/lgm-dma.c
1108
stat = readl(d->base + DMA_CIS);
drivers/dma/lgm/lgm-dma.c
1112
writel(readl(d->base + DMA_CIE) & ~DMA_CI_ALL, d->base + DMA_CIE);
drivers/dma/lgm/lgm-dma.c
1124
irncr = readl(d->base + DMA_IRNCR);
drivers/dma/lgm/lgm-dma.c
1132
writel(readl(d->base + DMA_IRNEN) & ~BIT(cid), d->base + DMA_IRNEN);
drivers/dma/lgm/lgm-dma.c
1134
writel(readl(d->base + DMA_IRNCR) | BIT(cid), d->base + DMA_IRNCR);
drivers/dma/lgm/lgm-dma.c
1605
id = readl(d->base + DMA_ID);
drivers/dma/lgm/lgm-dma.c
283
old_val = readl(d->base + ofs);
drivers/dma/lgm/lgm-dma.c
514
d->inst->name, readl(d->base + DMA_CTRL));
drivers/dma/lgm/lgm-dma.c
528
reg = readl(d->base + DMA_CCTRL);
drivers/dma/lgm/lgm-dma.c
854
reg = readl(d->base + DMA_PCTRL); /* read back */
drivers/dma/loongson1-apb-dma.c
138
int val = readl(chan->reg_base + LS1X_DMA_CTRL);
drivers/dma/mediatek/mtk-cqdma.c
170
return readl(pc->base + reg);
drivers/dma/mediatek/mtk-hsdma.c
270
return readl(hsdma->base + reg);
drivers/dma/mediatek/mtk-uart-apdma.c
128
return readl(c->base + reg);
drivers/dma/mediatek/mtk-uart-apdma.c
287
ret = readx_poll_timeout(readl, c->base + VFF_EN,
drivers/dma/mediatek/mtk-uart-apdma.c
405
ret = readx_poll_timeout(readl, c->base + VFF_FLUSH,
drivers/dma/mediatek/mtk-uart-apdma.c
418
ret = readx_poll_timeout(readl, c->base + VFF_EN,
drivers/dma/milbeaut-xdmac.c
218
val = readl(mc->reg_ch_base + M10V_XDDES);
drivers/dma/milbeaut-xdmac.c
296
val = readl(mdev->reg_base + M10V_XDACS);
drivers/dma/milbeaut-xdmac.c
305
val = readl(mdev->reg_base + M10V_XDACS);
drivers/dma/mmp_pdma.c
206
return readl(phy->base + DSADR(phy->idx));
drivers/dma/mmp_pdma.c
211
return readl(phy->base + DTADR(phy->idx));
drivers/dma/mmp_pdma.c
248
u32 low = readl(phy->base + DSADR(phy->idx));
drivers/dma/mmp_pdma.c
249
u32 high = readl(phy->base + DSADRH(phy->idx));
drivers/dma/mmp_pdma.c
256
u32 low = readl(phy->base + DTADR(phy->idx));
drivers/dma/mmp_pdma.c
257
u32 high = readl(phy->base + DTADRH(phy->idx));
drivers/dma/mmp_pdma.c
307
dalgn = readl(phy->base + DALGN);
drivers/dma/mmp_pdma.c
315
writel(readl(phy->base + reg) | pdev->ops->run_bits,
drivers/dma/mmp_pdma.c
327
dcsr = readl(phy->base + reg);
drivers/dma/mmp_pdma.c
343
u32 dint = readl(phy->base + DINT);
drivers/dma/mmp_pdma.c
350
dcsr = readl(phy->base + reg);
drivers/dma/mmp_pdma.c
373
u32 dint = readl(pdev->base + DINT);
drivers/dma/mmp_tdma.c
146
writel(readl(tdmac->reg_base + TDCR) | TDCR_FETCHND,
drivers/dma/mmp_tdma.c
161
writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
drivers/dma/mmp_tdma.c
171
tdcr = readl(tdmac->reg_base + TDCR);
drivers/dma/mmp_tdma.c
185
writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
drivers/dma/mmp_tdma.c
196
writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
drivers/dma/mmp_tdma.c
290
u32 reg = readl(tdmac->reg_base + TDISR);
drivers/dma/moxart-dma.c
194
ctrl = readl(ch->base + REG_OFF_CTRL);
drivers/dma/moxart-dma.c
213
ctrl = readl(ch->base + REG_OFF_CTRL);
drivers/dma/moxart-dma.c
390
ctrl = readl(ch->base + REG_OFF_CTRL);
drivers/dma/moxart-dma.c
459
cycles = readl(ch->base + REG_OFF_CYCLES);
drivers/dma/moxart-dma.c
526
ctrl = readl(ch->base + REG_OFF_CTRL);
drivers/dma/mv_xor.c
531
win_enable = readl(base + WINDOW_BAR_ENABLE(0));
drivers/dma/mv_xor_v2.c
265
reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF);
drivers/dma/mv_xor_v2.c
272
reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT);
drivers/dma/mv_xor_v2.c
284
reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_DONE_OFF);
drivers/dma/mv_xor_v2.c
542
reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_DONE_OFF);
drivers/dma/mv_xor_v2.c
653
reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_ARATTR_OFF);
drivers/dma/mv_xor_v2.c
659
reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_AWATTR_OFF);
drivers/dma/mv_xor_v2.c
683
reg = readl(xor_dev->glob_base + MV_XOR_V2_GLOB_PAUSE);
drivers/dma/mxs-dma.c
215
while ((readl(reg_dbg1) & 0xf) == 0x8 && elapsed < max_wait) {
drivers/dma/mxs-dma.c
333
completed = readl(mxs_dma->base + HW_APBHX_CTRL1);
drivers/dma/mxs-dma.c
341
err = readl(mxs_dma->base + HW_APBHX_CTRL2);
drivers/dma/mxs-dma.c
661
bar = readl(mxs_dma->base +
drivers/dma/owl-dma.c
246
regval = readl(pchan->base + reg);
drivers/dma/owl-dma.c
263
return readl(pchan->base + reg);
drivers/dma/owl-dma.c
270
regval = readl(od->base + reg);
drivers/dma/owl-dma.c
287
return readl(od->base + reg);
drivers/dma/pch_dma.c
111
readl((pdc)->membase + PDC_##name)
drivers/dma/pch_dma.c
133
readl((pd)->membase + PCH_DMA_##name)
drivers/dma/pl330.c
1049
writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN);
drivers/dma/pl330.c
1614
if (readl(regs + FSC) & (1 << thrd->id))
drivers/dma/pl330.c
1651
val = readl(regs + FSM) & 0x1;
drivers/dma/pl330.c
1657
val = readl(regs + FSC) & ((1 << pl330->pcfg.num_chan) - 1);
drivers/dma/pl330.c
1665
i, readl(regs + CS(i)),
drivers/dma/pl330.c
1666
readl(regs + FTC(i)));
drivers/dma/pl330.c
1674
val = readl(regs + ES);
drivers/dma/pl330.c
1687
u32 inten = readl(regs + INTEN);
drivers/dma/pl330.c
1827
val = readl(regs + CRD) >> CRD_DATA_WIDTH_SHIFT;
drivers/dma/pl330.c
1831
val = readl(regs + CRD) >> CRD_DATA_BUFF_SHIFT;
drivers/dma/pl330.c
1835
val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT;
drivers/dma/pl330.c
1840
val = readl(regs + CR0);
drivers/dma/pl330.c
1845
pl330->pcfg.peri_ns = readl(regs + CR4);
drivers/dma/pl330.c
1850
val = readl(regs + CR0);
drivers/dma/pl330.c
1856
val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT;
drivers/dma/pl330.c
1861
pl330->pcfg.irq_ns = readl(regs + CR3);
drivers/dma/pl330.c
2384
val = readl(regs + SA(thrd->id));
drivers/dma/pl330.c
2387
val = readl(regs + DA(thrd->id));
drivers/dma/pl330.c
878
if (!(readl(regs + DBGSTATUS) & DBG_BUSY))
drivers/dma/pl330.c
922
val = readl(regs + DS) & 0xf;
drivers/dma/pl330.c
924
val = readl(regs + CS(thrd->id)) & 0xf;
drivers/dma/pl330.c
978
u32 inten = readl(regs + INTEN);
drivers/dma/plx_dma.c
203
val = readl(plxdev->bar + PLX_REG_CTRL);
drivers/dma/plx_dma.c
211
val = readl(plxdev->bar + PLX_REG_CTRL);
drivers/dma/pxa_dma.c
586
u32 dint = readl(phy->base + DINT);
drivers/dma/pxa_dma.c
669
u32 dint = readl(pdev->base + DINT);
drivers/dma/qcom/hidma.c
840
dmadev->chidx = readl(dmadev->dev_trca + 0x40);
drivers/dma/qcom/hidma.c
842
dmadev->chidx = readl(dmadev->dev_trca + 0x28);
drivers/dma/qcom/hidma_ll.c
317
val = readl(lldev->trca + HIDMA_TRCA_CTRLSTS_REG);
drivers/dma/qcom/hidma_ll.c
334
val = readl(lldev->evca + HIDMA_EVCA_CTRLSTS_REG);
drivers/dma/qcom/hidma_ll.c
463
val = readl(lldev->evca + HIDMA_EVCA_CTRLSTS_REG);
drivers/dma/qcom/hidma_ll.c
476
val = readl(lldev->trca + HIDMA_TRCA_CTRLSTS_REG);
drivers/dma/qcom/hidma_ll.c
511
val = readl(lldev->trca + HIDMA_TRCA_CTRLSTS_REG);
drivers/dma/qcom/hidma_ll.c
513
val = readl(lldev->evca + HIDMA_EVCA_CTRLSTS_REG);
drivers/dma/qcom/hidma_ll.c
560
val = readl(lldev->trca + HIDMA_TRCA_CTRLSTS_REG);
drivers/dma/qcom/hidma_ll.c
575
val = readl(lldev->evca + HIDMA_EVCA_CTRLSTS_REG);
drivers/dma/qcom/hidma_ll.c
649
val = readl(lldev->evca + HIDMA_EVCA_IRQ_STAT_REG);
drivers/dma/qcom/hidma_ll.c
660
val = readl(lldev->evca + HIDMA_EVCA_IRQ_STAT_REG);
drivers/dma/qcom/hidma_ll.c
698
val = readl(lldev->evca + HIDMA_EVCA_INTCTRL_REG);
drivers/dma/qcom/hidma_ll.c
828
val = readl(lldev->evca + HIDMA_EVCA_IRQ_STAT_REG);
drivers/dma/qcom/hidma_mgmt.c
117
val = readl(mgmtdev->virtaddr + HIDMA_MAX_BUS_REQ_LEN_OFFSET);
drivers/dma/qcom/hidma_mgmt.c
124
val = readl(mgmtdev->virtaddr + HIDMA_MAX_XACTIONS_OFFSET);
drivers/dma/qcom/hidma_mgmt.c
132
readl(mgmtdev->virtaddr + HIDMA_HW_VERSION_OFFSET);
drivers/dma/qcom/hidma_mgmt.c
140
val = readl(mgmtdev->virtaddr + HIDMA_QOS_N_OFFSET + (4 * i));
drivers/dma/qcom/hidma_mgmt.c
148
val = readl(mgmtdev->virtaddr + HIDMA_CHRESET_TIMEOUT_OFFSET);
drivers/dma/qcom/hidma_mgmt.c
292
val = readl(mgmtdev->virtaddr + HIDMA_CFG_OFFSET);
drivers/dma/sf-pdma/sf-pdma.c
137
writel(readl(regs->ctrl) & ~PDMA_RUN_MASK, regs->ctrl);
drivers/dma/sf-pdma/sf-pdma.c
33
return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
drivers/dma/sf-pdma/sf-pdma.c
351
writel((readl(regs->ctrl)) & ~PDMA_DONE_STATUS_MASK, regs->ctrl);
drivers/dma/sf-pdma/sf-pdma.c
378
writel((readl(regs->ctrl)) & ~PDMA_ERR_STATUS_MASK, regs->ctrl);
drivers/dma/sh/rcar-dmac.c
325
return readl(dmac->dmac_base + reg);
drivers/dma/sh/rcar-dmac.c
333
return readl(chan->iomem + reg);
drivers/dma/sh/rz-dmac.c
201
return readl(dmac->ext_base + offset);
drivers/dma/sh/rz-dmac.c
217
return readl(channel->ch_base + offset);
drivers/dma/sh/rz-dmac.c
219
return readl(channel->ch_cmn_base + offset);
drivers/dma/sh/usb-dmac.c
158
return readl(dmac->iomem + reg);
drivers/dma/sh/usb-dmac.c
163
return readl(chan->iomem + reg);
drivers/dma/sprd-dma.c
244
u32 orig = readl(sdev->glb_base + reg);
drivers/dma/sprd-dma.c
254
u32 orig = readl(schan->chn_base + reg);
drivers/dma/sprd-dma.c
350
pause = readl(schan->chn_base + SPRD_DMA_CHN_PAUSE);
drivers/dma/sprd-dma.c
368
u32 cfg = readl(schan->chn_base + SPRD_DMA_CHN_CFG);
drivers/dma/sprd-dma.c
381
addr = readl(schan->chn_base + SPRD_DMA_CHN_SRC_ADDR);
drivers/dma/sprd-dma.c
382
addr_high = readl(schan->chn_base + SPRD_DMA_CHN_WARP_PTR) &
drivers/dma/sprd-dma.c
392
addr = readl(schan->chn_base + SPRD_DMA_CHN_DES_ADDR);
drivers/dma/sprd-dma.c
393
addr_high = readl(schan->chn_base + SPRD_DMA_CHN_WARP_TO) &
drivers/dma/sprd-dma.c
402
u32 intc_sts = readl(schan->chn_base + SPRD_DMA_CHN_INTC) &
drivers/dma/sprd-dma.c
429
u32 frag_reg = readl(schan->chn_base + SPRD_DMA_CHN_FRG_LEN);
drivers/dma/sprd-dma.c
590
u32 irq_status = readl(sdev->glb_base + SPRD_DMA_GLB_INT_MSK_STS);
drivers/dma/st_fdma.h
167
readl((fdev)->slim_rproc->peri + name)
drivers/dma/st_fdma.h
185
readl((fchan)->fdev->slim_rproc->mem[ST_SLIM_DMEM].cpu_addr \
drivers/dma/st_fdma.h
207
readl((fchan)->fdev->slim_rproc->mem[ST_SLIM_DMEM].cpu_addr \
drivers/dma/ste_dma40.c
1085
status = (readl(active_reg) &
drivers/dma/ste_dma40.c
1100
status = (readl(active_reg) &
drivers/dma/ste_dma40.c
1195
status = (readl(addr) & D40_EVENTLINE_MASK(event)) >>
drivers/dma/ste_dma40.c
1207
status = (readl(addr) & D40_EVENTLINE_MASK(event)) >>
drivers/dma/ste_dma40.c
1241
if (readl(addr) & D40_EVENTLINE_MASK(event))
drivers/dma/ste_dma40.c
1282
val = readl(chanbase + D40_CHAN_REG_SSLNK);
drivers/dma/ste_dma40.c
1283
val |= readl(chanbase + D40_CHAN_REG_SDLNK);
drivers/dma/ste_dma40.c
1308
active_status = (readl(active_reg) &
drivers/dma/ste_dma40.c
1412
num_elt = (readl(&d40c->lcpa->lcsp2) & D40_MEM_LCSP2_ECNT_MASK)
drivers/dma/ste_dma40.c
1415
u32 val = readl(chan_base(d40c) + D40_CHAN_REG_SDELT);
drivers/dma/ste_dma40.c
1428
is_link = readl(&d40c->lcpa->lcsp3) & D40_MEM_LCSP3_DLOS_MASK;
drivers/dma/ste_dma40.c
1430
is_link = readl(chan_base(d40c) + D40_CHAN_REG_SDLNK)
drivers/dma/ste_dma40.c
1675
regs[i] = readl(base->virtbase + il[i].src);
drivers/dma/ste_dma40.c
2082
status = (readl(active_reg) &
drivers/dma/ste_dma40.c
2092
status = readl(chanbase + D40_CHAN_REG_SDLNK);
drivers/dma/ste_dma40.c
2094
status = readl(chanbase + D40_CHAN_REG_SSLNK);
drivers/dma/ste_dma40.c
3039
val[0] = readl(base->virtbase + D40_DREG_PRSME);
drivers/dma/ste_dma40.c
3040
val[1] = readl(base->virtbase + D40_DREG_PRSMO);
drivers/dma/ste_dma40.c
3090
val[0] = readl(base->virtbase + D40_DREG_PRTYP);
drivers/dma/ste_dma40.c
3151
pid |= (readl(virtbase + SZ_4K - 0x20 + 4 * i)
drivers/dma/ste_dma40.c
3154
cid |= (readl(virtbase + SZ_4K - 0x10 + 4 * i)
drivers/dma/ste_dma40.c
3186
num_phy_chans = 4 * (readl(virtbase + D40_DREG_ICFG) & 0x7) + 4;
drivers/dma/ste_dma40.c
3537
val = readl(base->virtbase + D40_DREG_LCPA);
drivers/dma/sun4i-dma.c
1086
bytes += readl(pchan->base + SUN4I_DDMA_BYTE_COUNT_REG);
drivers/dma/sun4i-dma.c
1088
bytes += readl(pchan->base + SUN4I_NDMA_BYTE_COUNT_REG);
drivers/dma/sun6i-dma.c
245
DMA_IRQ_EN(0), readl(sdev->base + DMA_IRQ_EN(0)),
drivers/dma/sun6i-dma.c
246
DMA_IRQ_EN(1), readl(sdev->base + DMA_IRQ_EN(1)),
drivers/dma/sun6i-dma.c
247
DMA_IRQ_STAT(0), readl(sdev->base + DMA_IRQ_STAT(0)),
drivers/dma/sun6i-dma.c
248
DMA_IRQ_STAT(1), readl(sdev->base + DMA_IRQ_STAT(1)),
drivers/dma/sun6i-dma.c
249
DMA_STAT, readl(sdev->base + DMA_STAT));
drivers/dma/sun6i-dma.c
266
readl(pchan->base + DMA_CHAN_ENABLE),
drivers/dma/sun6i-dma.c
268
readl(pchan->base + DMA_CHAN_PAUSE),
drivers/dma/sun6i-dma.c
270
readl(pchan->base + DMA_CHAN_LLI_ADDR),
drivers/dma/sun6i-dma.c
272
readl(pchan->base + DMA_CHAN_CUR_CFG),
drivers/dma/sun6i-dma.c
274
readl(pchan->base + DMA_CHAN_CUR_SRC),
drivers/dma/sun6i-dma.c
276
readl(pchan->base + DMA_CHAN_CUR_DST),
drivers/dma/sun6i-dma.c
278
readl(pchan->base + DMA_CHAN_CUR_CNT),
drivers/dma/sun6i-dma.c
280
readl(pchan->base + DMA_CHAN_CUR_PARA));
drivers/dma/sun6i-dma.c
357
pos = readl(pchan->base + DMA_CHAN_LLI_ADDR);
drivers/dma/sun6i-dma.c
358
bytes = readl(pchan->base + DMA_CHAN_CUR_CNT);
drivers/dma/sun6i-dma.c
463
irq_val = readl(sdev->base + DMA_IRQ_EN(irq_reg));
drivers/dma/sun6i-dma.c
552
status = readl(sdev->base + DMA_IRQ_STAT(i));
drivers/dma/tegra20-apb-dma.c
243
return readl(tdc->chan_addr + reg);
drivers/dma/tegra210-adma.c
214
return readl(tdma->base_addr + tdma->cdata->global_reg_offset + reg);
drivers/dma/tegra210-adma.c
229
return readl(tdc->chan_addr + reg);
drivers/dma/tegra210-adma.c
315
ret = readx_poll_timeout(readl,
drivers/dma/tegra210-adma.c
425
if (readx_poll_timeout_atomic(readl, tdc->chan_addr + ADMA_CH_STATUS,
drivers/dma/ti/edma.c
2123
mux = readl(xbar + offset);
drivers/dma/ti/k3-udma.c
335
return readl(base + reg);
drivers/dma/ti/k3-udma.c
348
orig = readl(base + reg);
drivers/dma/uniphier-mdmac.c
184
irq_stat = readl(mc->reg_ch_base + UNIPHIER_MDMAC_CH_IRQ_DET);
drivers/dma/uniphier-mdmac.c
306
txstate->residue = readl(mc->reg_ch_base +
drivers/dma/uniphier-xdmac.c
192
val = readl(xc->reg_ch_base + XDMAC_TSS);
drivers/dma/uniphier-xdmac.c
203
val = readl(xc->reg_ch_base + XDMAC_IEN);
drivers/dma/uniphier-xdmac.c
208
val = readl(xc->reg_ch_base + XDMAC_TSS);
drivers/dma/uniphier-xdmac.c
237
stat = readl(xc->reg_ch_base + XDMAC_ID);
drivers/dma/xilinx/zynqmp_dma.c
350
val = readl(chan->regs + ZYNQMP_DMA_ISR);
drivers/dma/xilinx/zynqmp_dma.c
360
val = readl(chan->regs + ZYNQMP_DMA_DATA_ATTR);
drivers/dma/xilinx/zynqmp_dma.c
370
val = readl(chan->regs + ZYNQMP_DMA_IRQ_SRC_ACCT);
drivers/dma/xilinx/zynqmp_dma.c
371
val = readl(chan->regs + ZYNQMP_DMA_IRQ_DST_ACCT);
drivers/dma/xilinx/zynqmp_dma.c
543
readl(chan->regs + ZYNQMP_DMA_IRQ_DST_ACCT);
drivers/dma/xilinx/zynqmp_dma.c
545
readl(chan->regs + ZYNQMP_DMA_IRQ_SRC_ACCT);
drivers/dma/xilinx/zynqmp_dma.c
552
val = readl(chan->regs + ZYNQMP_DMA_CTRL0);
drivers/dma/xilinx/zynqmp_dma.c
556
val = readl(chan->regs + ZYNQMP_DMA_DATA_ATTR);
drivers/dma/xilinx/zynqmp_dma.c
732
isr = readl(chan->regs + ZYNQMP_DMA_ISR);
drivers/dma/xilinx/zynqmp_dma.c
733
imr = readl(chan->regs + ZYNQMP_DMA_IMR);
drivers/dma/xilinx/zynqmp_dma.c
778
count = readl(chan->regs + ZYNQMP_DMA_IRQ_DST_ACCT);
drivers/edac/al_mc_edac.c
199
ecccfg0 = readl(mmio_base + AL_MC_ECC_CFG);
drivers/edac/altera_edac.c
1280
if ((readl(base) & prv->ecc_enable_mask) ==
drivers/edac/altera_edac.c
1801
writel(readl(drvdata->base + ECC_BLK_RDATA0_OFST) ^ 0x1,
drivers/edac/altera_edac.c
1803
writel(readl(drvdata->base + ECC_BLK_RDATA1_OFST),
drivers/edac/altera_edac.c
1805
writel(readl(drvdata->base + ECC_BLK_RDATA2_OFST),
drivers/edac/altera_edac.c
1807
writel(readl(drvdata->base + ECC_BLK_RDATA3_OFST),
drivers/edac/altera_edac.c
1811
writel(readl(drvdata->base + ECC_BLK_RECC0_OFST),
drivers/edac/altera_edac.c
1813
writel(readl(drvdata->base + ECC_BLK_RECC1_OFST),
drivers/edac/altera_edac.c
2093
err_addr = readl(ed->base + ALTR_S10_DERR_ADDRA_OFST);
drivers/edac/altera_edac.c
840
if (readl(base + prv->ecc_en_ofst) & prv->ecc_enable_mask)
drivers/edac/altera_edac.c
890
u32 value = readl(ioaddr);
drivers/edac/altera_edac.c
898
u32 value = readl(ioaddr);
drivers/edac/altera_edac.c
906
u32 value = readl(ioaddr);
drivers/edac/armada_xp_edac.c
136
data_h = readl(drvdata->base + SDRAM_ERR_DATA_H_REG);
drivers/edac/armada_xp_edac.c
137
data_l = readl(drvdata->base + SDRAM_ERR_DATA_L_REG);
drivers/edac/armada_xp_edac.c
138
recv_ecc = readl(drvdata->base + SDRAM_ERR_RECV_ECC_REG);
drivers/edac/armada_xp_edac.c
139
calc_ecc = readl(drvdata->base + SDRAM_ERR_CALC_ECC_REG);
drivers/edac/armada_xp_edac.c
140
addr = readl(drvdata->base + SDRAM_ERR_ADDR_REG);
drivers/edac/armada_xp_edac.c
141
cnt_sbe = readl(drvdata->base + SDRAM_ERR_SBE_COUNT_REG);
drivers/edac/armada_xp_edac.c
142
cnt_dbe = readl(drvdata->base + SDRAM_ERR_DBE_COUNT_REG);
drivers/edac/armada_xp_edac.c
143
cause_err = readl(drvdata->base + SDRAM_ERR_CAUSE_ERR_REG);
drivers/edac/armada_xp_edac.c
144
cause_msg = readl(drvdata->base + SDRAM_ERR_CAUSE_MSG_REG);
drivers/edac/armada_xp_edac.c
228
config = readl(drvdata->base + SDRAM_CONFIG_REG);
drivers/edac/armada_xp_edac.c
236
addr_ctrl = readl(drvdata->base + SDRAM_ADDR_CTRL_REG);
drivers/edac/armada_xp_edac.c
237
rank_ctrl = readl(drvdata->base + SDRAM_RANK_CTRL_REG);
drivers/edac/armada_xp_edac.c
300
config = readl(base + SDRAM_CONFIG_REG);
drivers/edac/armada_xp_edac.c
409
cnt = readl(drvdata->base + AURORA_ERR_CNT_REG);
drivers/edac/armada_xp_edac.c
410
attr_cap = readl(drvdata->base + AURORA_ERR_ATTR_CAP_REG);
drivers/edac/armada_xp_edac.c
411
addr_cap = readl(drvdata->base + AURORA_ERR_ADDR_CAP_REG);
drivers/edac/armada_xp_edac.c
412
way_cap = readl(drvdata->base + AURORA_ERR_WAY_CAP_REG);
drivers/edac/armada_xp_edac.c
519
l2x0_aux_ctrl = readl(base + L2X0_AUX_CTRL);
drivers/edac/aspeed_edac.c
61
*val = readl(regs + reg);
drivers/edac/bluefield_edac.c
149
*result = readl(addr);
drivers/edac/dmc520_edac.c
180
return readl(pvt->reg_base + offset);
drivers/edac/dmc520_edac.c
255
u32 reg_val = readl(reg_base + REG_OFFSET_FEATURE_CONFIG);
drivers/edac/dmc520_edac.c
344
reg_val = readl(reg_base + REG_OFFSET_ADDRESS_CONTROL_NOW);
drivers/edac/highbank_mc_edac.c
208
control = readl(drvdata->mc_err_base + HB_DDR_ECC_OPT) & 0x3;
drivers/edac/highbank_mc_edac.c
61
status = readl(drvdata->mc_int_base + HB_DDR_ECC_INT_STATUS);
drivers/edac/highbank_mc_edac.c
64
err_addr = readl(drvdata->mc_err_base + HB_DDR_ECC_U_ERR_ADDR);
drivers/edac/highbank_mc_edac.c
72
u32 syndrome = readl(drvdata->mc_err_base + HB_DDR_ECC_C_ERR_STAT);
drivers/edac/highbank_mc_edac.c
74
err_addr = readl(drvdata->mc_err_base + HB_DDR_ECC_C_ERR_ADDR);
drivers/edac/highbank_mc_edac.c
92
reg = readl(pdata->mc_err_base + HB_DDR_ECC_OPT);
drivers/edac/i10nm_base.c
40
readl((m)->mbase + ((m)->hbm_mc ? 0x80c : \
drivers/edac/i10nm_base.c
44
readl((m)->mbase + ((m)->hbm_mc ? 0x970 : 0x20970) + \
drivers/edac/i10nm_base.c
47
readl((m)->mbase + ((m)->hbm_mc ? 0xef8 : \
drivers/edac/i10nm_base.c
51
readl((m)->mbase + (i) * (m)->chan_mmio_sz + (offset))
drivers/edac/i82875p_edac.c
403
drc = readl(ovrfl_window + I82875P_DRC);
drivers/edac/i82975x_edac.c
443
dtreg[0] = readl(mch_window + 0x114);
drivers/edac/i82975x_edac.c
444
dtreg[1] = readl(mch_window + 0x194);
drivers/edac/i82975x_edac.c
515
drc[0] = readl(mch_window + I82975X_DRC_CH0M0);
drivers/edac/i82975x_edac.c
516
drc[1] = readl(mch_window + I82975X_DRC_CH1M0);
drivers/edac/ie31200_edac.c
432
addr_decode = readl(window + cfg->reg_mad_dimm_offset[i]);
drivers/edac/igen6_edac.c
1079
u32 activate = readl(imc->window + IBECC_ACTIVATE_OFFSET);
drivers/edac/igen6_edac.c
1097
mad_inter = readl(imc->window + MAD_INTER_CHANNEL_OFFSET);
drivers/edac/igen6_edac.c
1104
mad_intra = readl(imc->window + MAD_INTRA_CH0_OFFSET + i * 4);
drivers/edac/igen6_edac.c
1105
mad_dimm = readl(imc->window + MAD_DIMM_CH0_OFFSET + i * 4);
drivers/edac/igen6_edac.c
1162
readl(imc->window + CHANNEL_HASH_OFFSET));
drivers/edac/igen6_edac.c
1164
readl(imc->window + CHANNEL_EHASH_OFFSET));
drivers/edac/igen6_edac.c
1166
readl(imc->window + MAD_INTER_CHANNEL_OFFSET));
drivers/edac/igen6_edac.c
1172
readl(imc->window + MAD_INTRA_CH0_OFFSET + i * 4));
drivers/edac/igen6_edac.c
1174
readl(imc->window + MAD_DIMM_CH0_OFFSET + i * 4));
drivers/edac/igen6_edac.c
1296
return readl(window + MAD_INTER_CHANNEL_OFFSET) == ~0;
drivers/edac/igen6_edac.c
405
val = readl(window + MCHBAR_MEMSS_IBECCDIS);
drivers/edac/igen6_edac.c
488
mc_hash = readl(imc->window + MAD_MC_HASH_OFFSET);
drivers/edac/igen6_edac.c
803
hash = readl(imc->window + CHANNEL_HASH_OFFSET);
drivers/edac/igen6_edac.c
811
hash = readl(imc->window + CHANNEL_EHASH_OFFSET);
drivers/edac/imh_base.c
82
return readl(addr);
drivers/edac/pnd2_edac.c
280
*(u32 *)data = readl(base + off);
drivers/edac/synopsys_edac.c
1063
readl(priv->baseaddr + ECC_POISON0_OFST),
drivers/edac/synopsys_edac.c
1064
readl(priv->baseaddr + ECC_POISON1_OFST),
drivers/edac/synopsys_edac.c
1091
(((readl(priv->baseaddr + ECC_CFG1_OFST)) & 0x3) == 0x3)
drivers/edac/synopsys_edac.c
1198
memtype = readl(priv->baseaddr + CTRL_OFST);
drivers/edac/synopsys_edac.c
1345
addrmap[index] = readl(priv->baseaddr + addrmap_offset);
drivers/edac/synopsys_edac.c
376
regval = readl(base + STAT_OFST);
drivers/edac/synopsys_edac.c
383
regval = readl(base + CE_LOG_OFST);
drivers/edac/synopsys_edac.c
388
regval = readl(base + CE_ADDR_OFST);
drivers/edac/synopsys_edac.c
392
p->ceinfo.data = readl(base + CE_DATA_31_0_OFST);
drivers/edac/synopsys_edac.c
398
regval = readl(base + UE_LOG_OFST);
drivers/edac/synopsys_edac.c
402
regval = readl(base + UE_ADDR_OFST);
drivers/edac/synopsys_edac.c
406
p->ueinfo.data = readl(base + UE_DATA_31_0_OFST);
drivers/edac/synopsys_edac.c
451
regval = readl(base + ECC_ERRCNT_OFST);
drivers/edac/synopsys_edac.c
457
regval = readl(base + ECC_STAT_OFST);
drivers/edac/synopsys_edac.c
463
regval = readl(base + ECC_CEADDR0_OFST);
drivers/edac/synopsys_edac.c
465
regval = readl(base + ECC_CEADDR1_OFST);
drivers/edac/synopsys_edac.c
471
p->ceinfo.data = readl(base + ECC_CSYND0_OFST);
drivers/edac/synopsys_edac.c
473
readl(base + ECC_CSYND0_OFST), readl(base + ECC_CSYND1_OFST),
drivers/edac/synopsys_edac.c
474
readl(base + ECC_CSYND2_OFST));
drivers/edac/synopsys_edac.c
479
regval = readl(base + ECC_UEADDR0_OFST);
drivers/edac/synopsys_edac.c
481
regval = readl(base + ECC_UEADDR1_OFST);
drivers/edac/synopsys_edac.c
487
p->ueinfo.data = readl(base + ECC_UESYND0_OFST);
drivers/edac/synopsys_edac.c
491
clearval = readl(base + ECC_CLR_OFST) |
drivers/edac/synopsys_edac.c
615
regval = readl(priv->baseaddr + DDR_QOS_IRQ_STAT_OFST);
drivers/edac/synopsys_edac.c
679
width = readl(base + CTRL_OFST);
drivers/edac/synopsys_edac.c
710
width = readl(base + CTRL_OFST);
drivers/edac/synopsys_edac.c
739
ecctype = readl(priv->baseaddr + SCRUB_OFST) & SCRUB_MODE_MASK;
drivers/edac/synopsys_edac.c
751
ecctype = readl(priv->baseaddr + ECC_CFG0_OFST) & SCRUB_MODE_MASK;
drivers/edac/synopsys_edac.c
754
clearval = readl(priv->baseaddr + ECC_CLR_OFST) |
drivers/edac/synopsys_edac.c
793
memtype = readl(base + T_ZQ_OFST);
drivers/edac/synopsys_edac.c
817
memtype = readl(base + CTRL_OFST);
drivers/edac/versal_edac.c
1002
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC11_OFFSET);
drivers/edac/versal_edac.c
1013
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC4_OFFSET);
drivers/edac/versal_edac.c
1100
regval = readl(ddrmc_baseaddr + XDDR_REG_CONFIG0_OFFSET);
drivers/edac/versal_edac.c
259
regval = readl(ddrmc_base + ECCR0_CE_ADDR_LO_OFFSET);
drivers/edac/versal_edac.c
262
regval = readl(ddrmc_base + ECCR0_CE_ADDR_HI_OFFSET);
drivers/edac/versal_edac.c
265
readl(ddrmc_base + ECCR0_CE_DATA_LO_OFFSET),
drivers/edac/versal_edac.c
266
readl(ddrmc_base + ECCR0_CE_DATA_HI_OFFSET),
drivers/edac/versal_edac.c
267
readl(ddrmc_base + ECCR0_CE_DATA_PAR_OFFSET));
drivers/edac/versal_edac.c
269
regval = readl(ddrmc_base + ECCR1_CE_ADDR_LO_OFFSET);
drivers/edac/versal_edac.c
270
reghi = readl(ddrmc_base + ECCR1_CE_ADDR_HI_OFFSET);
drivers/edac/versal_edac.c
272
regval = readl(ddrmc_base + ECCR1_CE_ADDR_HI_OFFSET);
drivers/edac/versal_edac.c
275
readl(ddrmc_base + ECCR1_CE_DATA_LO_OFFSET),
drivers/edac/versal_edac.c
276
readl(ddrmc_base + ECCR1_CE_DATA_HI_OFFSET),
drivers/edac/versal_edac.c
277
readl(ddrmc_base + ECCR1_CE_DATA_PAR_OFFSET));
drivers/edac/versal_edac.c
291
regval = readl(ddrmc_base + ECCR0_UE_ADDR_LO_OFFSET);
drivers/edac/versal_edac.c
292
reghi = readl(ddrmc_base + ECCR0_UE_ADDR_HI_OFFSET);
drivers/edac/versal_edac.c
295
regval = readl(ddrmc_base + ECCR0_UE_ADDR_HI_OFFSET);
drivers/edac/versal_edac.c
298
readl(ddrmc_base + ECCR0_UE_DATA_LO_OFFSET),
drivers/edac/versal_edac.c
299
readl(ddrmc_base + ECCR0_UE_DATA_HI_OFFSET),
drivers/edac/versal_edac.c
300
readl(ddrmc_base + ECCR0_UE_DATA_PAR_OFFSET));
drivers/edac/versal_edac.c
302
regval = readl(ddrmc_base + ECCR1_UE_ADDR_LO_OFFSET);
drivers/edac/versal_edac.c
303
reghi = readl(ddrmc_base + ECCR1_UE_ADDR_HI_OFFSET);
drivers/edac/versal_edac.c
307
readl(ddrmc_base + ECCR1_UE_DATA_LO_OFFSET),
drivers/edac/versal_edac.c
308
readl(ddrmc_base + ECCR1_UE_DATA_HI_OFFSET),
drivers/edac/versal_edac.c
309
readl(ddrmc_base + ECCR1_UE_DATA_PAR_OFFSET));
drivers/edac/versal_edac.c
321
eccr0_ceval = readl(ddrmc_base + ECCR0_CERR_STAT_OFFSET);
drivers/edac/versal_edac.c
322
eccr1_ceval = readl(ddrmc_base + ECCR1_CERR_STAT_OFFSET);
drivers/edac/versal_edac.c
323
eccr0_ueval = readl(ddrmc_base + ECCR0_UERR_STAT_OFFSET);
drivers/edac/versal_edac.c
324
eccr1_ueval = readl(ddrmc_base + ECCR1_UERR_STAT_OFFSET);
drivers/edac/versal_edac.c
465
regval = readl(priv->ddrmc_baseaddr + XDDR_ISR_OFFSET);
drivers/edac/versal_edac.c
504
regval = readl(base + XDDR_REG_CONFIG0_OFFSET);
drivers/edac/versal_edac.c
541
ecctype = readl(base + XDDR_REG_PINOUT_OFFSET);
drivers/edac/versal_edac.c
558
regval = readl(priv->ddrmc_baseaddr + XDDR_REG_CONFIG0_OFFSET);
drivers/edac/versal_edac.c
954
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC5_OFFSET);
drivers/edac/versal_edac.c
957
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC6_OFFSET);
drivers/edac/versal_edac.c
960
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC7_OFFSET);
drivers/edac/versal_edac.c
963
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC8_OFFSET);
drivers/edac/versal_edac.c
976
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC8_OFFSET);
drivers/edac/versal_edac.c
979
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC9_OFFSET);
drivers/edac/versal_edac.c
987
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC10_OFFSET);
drivers/edac/versal_edac.c
999
regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC10_OFFSET);
drivers/edac/xgene_edac.c
1062
l3cesr = readl(ctx->dev_csr + L3C_ESR);
drivers/edac/xgene_edac.c
1071
l3celr = readl(ctx->dev_csr + L3C_ELR);
drivers/edac/xgene_edac.c
1072
l3caelr = readl(ctx->dev_csr + L3C_AELR);
drivers/edac/xgene_edac.c
1073
l3cbelr = readl(ctx->dev_csr + L3C_BELR);
drivers/edac/xgene_edac.c
1120
val = readl(ctx->dev_csr + L3C_ECR);
drivers/edac/xgene_edac.c
1397
reg = readl(ctx->dev_csr + XGICTRANSERRINTSTS);
drivers/edac/xgene_edac.c
1409
info = readl(ctx->dev_csr + XGICTRANSERRREQINFO);
drivers/edac/xgene_edac.c
1417
reg = readl(ctx->dev_csr + GLBL_ERR_STS);
drivers/edac/xgene_edac.c
1421
err_addr_lo = readl(ctx->dev_csr + GLBL_SEC_ERRL);
drivers/edac/xgene_edac.c
1422
err_addr_hi = readl(ctx->dev_csr + GLBL_SEC_ERRH);
drivers/edac/xgene_edac.c
1430
err_addr_lo = readl(ctx->dev_csr + GLBL_MSEC_ERRL);
drivers/edac/xgene_edac.c
1431
err_addr_hi = readl(ctx->dev_csr + GLBL_MSEC_ERRH);
drivers/edac/xgene_edac.c
1442
err_addr_lo = readl(ctx->dev_csr + GLBL_DED_ERRL);
drivers/edac/xgene_edac.c
1443
err_addr_hi = readl(ctx->dev_csr + GLBL_DED_ERRH);
drivers/edac/xgene_edac.c
1451
err_addr_lo = readl(ctx->dev_csr + GLBL_MDED_ERRL);
drivers/edac/xgene_edac.c
1452
err_addr_hi = readl(ctx->dev_csr + GLBL_MDED_ERRH);
drivers/edac/xgene_edac.c
1514
reg = readl(ctx->dev_csr + IOBBATRANSERRINTSTS);
drivers/edac/xgene_edac.c
1561
err_addr_lo = readl(ctx->dev_csr + IOBBATRANSERRREQINFOL);
drivers/edac/xgene_edac.c
1562
err_addr_hi = readl(ctx->dev_csr + IOBBATRANSERRREQINFOH);
drivers/edac/xgene_edac.c
1568
readl(ctx->dev_csr + IOBBATRANSERRCSWREQID));
drivers/edac/xgene_edac.c
1580
reg = readl(ctx->dev_csr + IOBPATRANSERRINTSTS);
drivers/edac/xgene_edac.c
1607
reg = readl(ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);
drivers/edac/xgene_edac.c
1610
err_addr_lo = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOL);
drivers/edac/xgene_edac.c
1611
err_addr_hi = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOH);
drivers/edac/xgene_edac.c
1621
reg = readl(ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);
drivers/edac/xgene_edac.c
1624
err_addr_lo = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOL);
drivers/edac/xgene_edac.c
1625
err_addr_hi = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOH);
drivers/edac/xgene_edac.c
194
reg = readl(ctx->mcu_csr + MCUESRR0 + rank * MCU_RANK_STRIDE);
drivers/edac/xgene_edac.c
209
bank = readl(ctx->mcu_csr + MCUEBLRR0 +
drivers/edac/xgene_edac.c
211
col_row = readl(ctx->mcu_csr + MCUERCRR0 +
drivers/edac/xgene_edac.c
213
count = readl(ctx->mcu_csr + MCUSBECNT0 +
drivers/edac/xgene_edac.c
235
reg = readl(ctx->mcu_csr + MCUGESR);
drivers/edac/xgene_edac.c
282
val = readl(ctx->mcu_csr + MCUGECR);
drivers/edac/xgene_edac.c
290
val = readl(ctx->mcu_csr + MCUGECR);
drivers/edac/xgene_edac.c
529
val = readl(pg_f + MEMERR_CPU_ICFESR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
569
val = readl(pg_f + MEMERR_CPU_LSUESR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
613
val = readl(pg_f + MEMERR_CPU_MMUESR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
671
val = readl(pg_e + MEMERR_L2C_L2ESR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
674
val_lo = readl(pg_e + MEMERR_L2C_L2EALR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
675
val_hi = readl(pg_e + MEMERR_L2C_L2EAHR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
69
*val = readl(edac->pcp_csr + reg);
drivers/edac/xgene_edac.c
724
val = readl(pg_d + CPUX_L2C_L2RTOSR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
726
val_lo = readl(pg_d + CPUX_L2C_L2RTOALR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
727
val_hi = readl(pg_d + CPUX_L2C_L2RTOAHR_PAGE_OFFSET);
drivers/edac/xgene_edac.c
78
val = readl(edac->pcp_csr + reg);
drivers/edac/xgene_edac.c
90
val = readl(edac->pcp_csr + reg);
drivers/edac/zynqmp_edac.c
137
p->ceinfo.fault_lo = readl(base + CE_FFD0_OFST);
drivers/edac/zynqmp_edac.c
138
p->ceinfo.fault_hi = readl(base + CE_FFD1_OFST);
drivers/edac/zynqmp_edac.c
139
p->ceinfo.addr = (OCM_BASEVAL | readl(base + CE_FFA_OFST));
drivers/edac/zynqmp_edac.c
143
p->ueinfo.fault_lo = readl(base + UE_FFD0_OFST);
drivers/edac/zynqmp_edac.c
144
p->ueinfo.fault_hi = readl(base + UE_FFD1_OFST);
drivers/edac/zynqmp_edac.c
145
p->ueinfo.addr = (OCM_BASEVAL | readl(base + UE_FFA_OFST));
drivers/edac/zynqmp_edac.c
194
regval = readl(priv->baseaddr + OCM_ISR_OFST);
drivers/edac/zynqmp_edac.c
219
return readl(base + ECC_CTRL_OFST) & OCM_ECC_ENABLE_MASK;
drivers/extcon/extcon-rtk-type-c.c
1067
val = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
1071
val = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
1075
val = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
1079
val = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
1083
val = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
1209
val = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
1214
val = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
1224
val = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
1425
default_ctrl = readl(type_c->reg_base + USB_TYPEC_CTRL) &
drivers/extcon/extcon-rtk-type-c.c
1731
default_ctrl = readl(type_c->reg_base + USB_TYPEC_CTRL) &
drivers/extcon/extcon-rtk-type-c.c
253
val_cc = readl(reg);
drivers/extcon/extcon-rtk-type-c.c
272
__func__, cc, val_cc, readl(reg));
drivers/extcon/extcon-rtk-type-c.c
374
writel(ENABLE_TYPE_C_DETECT | readl(reg), reg);
drivers/extcon/extcon-rtk-type-c.c
383
writel(~ENABLE_TYPE_C_DETECT & readl(reg), reg);
drivers/extcon/extcon-rtk-type-c.c
400
default_ctrl = readl(reg_base + USB_TYPEC_CTRL) & DEBOUNCE_TIME_MASK;
drivers/extcon/extcon-rtk-type-c.c
403
cc1_config = readl(reg_base + USB_TYPEC_CTRL_CC1_0);
drivers/extcon/extcon-rtk-type-c.c
404
cc2_config = readl(reg_base + USB_TYPEC_CTRL_CC2_0);
drivers/extcon/extcon-rtk-type-c.c
469
int_status = readl(reg_base + USB_TYPEC_CTRL);
drivers/extcon/extcon-rtk-type-c.c
470
cc_status = readl(reg_base + USB_TYPEC_STS);
drivers/extcon/extcon-rtk-type-c.c
490
cc_status_check = readl(reg_base + USB_TYPEC_STS);
drivers/extcon/extcon-rtk-type-c.c
501
cc_status_check = readl(reg_base + USB_TYPEC_STS);
drivers/extcon/extcon-rtk-type-c.c
506
cc_status = readl(reg_base + USB_TYPEC_STS);
drivers/extcon/extcon-rtk-type-c.c
528
cc_status_check = readl(reg_base + USB_TYPEC_STS);
drivers/extcon/extcon-rtk-type-c.c
551
cc_status_check = readl(reg_base + USB_TYPEC_STS);
drivers/extcon/extcon-rtk-type-c.c
562
cc_status_check = readl(reg_base + USB_TYPEC_STS);
drivers/extcon/extcon-rtk-type-c.c
568
cc_status = readl(reg_base + USB_TYPEC_STS);
drivers/extcon/extcon-rtk-type-c.c
679
writel(~ALL_CC_INT_STS & readl(reg), reg);
drivers/extcon/extcon-rtk-type-c.c
689
writel(~ALL_CC_INT_STS & readl(reg), reg);
drivers/extcon/extcon-rtk-type-c.c
816
readl(type_c->reg_base + 0x0));
drivers/extcon/extcon-rtk-type-c.c
818
readl(type_c->reg_base + 0x4));
drivers/extcon/extcon-rtk-type-c.c
820
readl(type_c->reg_base + 0x8));
drivers/extcon/extcon-rtk-type-c.c
822
readl(type_c->reg_base + 0xc));
drivers/extcon/extcon-rtk-type-c.c
824
readl(type_c->reg_base + 0x10));
drivers/extcon/extcon-rtk-type-c.c
826
readl(type_c->reg_base + 0x14));
drivers/firewire/init_ohci1394_dma.c
47
return readl(ohci->registers + offset);
drivers/firewire/nosy.c
226
return readl(lynx->registers + offset);
drivers/firewire/ohci.c
411
return readl(ohci->registers + offset);
drivers/firmware/samsung/exynos-acpm.c
230
rx_front = readl(achan->rx.front);
drivers/firmware/samsung/exynos-acpm.c
231
i = readl(achan->rx.rear);
drivers/firmware/samsung/exynos-acpm.c
247
val = readl(addr);
drivers/firmware/samsung/exynos-acpm.c
440
tx_front = readl(achan->tx.front);
drivers/firmware/samsung/exynos-acpm.c
479
achan->mlen = readl(&chan_shmem->mlen);
drivers/firmware/samsung/exynos-acpm.c
480
achan->poll_completion = readl(&chan_shmem->poll_completion);
drivers/firmware/samsung/exynos-acpm.c
481
achan->id = readl(&chan_shmem->id);
drivers/firmware/samsung/exynos-acpm.c
482
achan->qlen = readl(&chan_shmem->qlen);
drivers/firmware/samsung/exynos-acpm.c
484
tx->base = base + readl(&chan_shmem->rx_base);
drivers/firmware/samsung/exynos-acpm.c
485
tx->rear = base + readl(&chan_shmem->rx_rear);
drivers/firmware/samsung/exynos-acpm.c
486
tx->front = base + readl(&chan_shmem->rx_front);
drivers/firmware/samsung/exynos-acpm.c
488
rx->base = base + readl(&chan_shmem->tx_base);
drivers/firmware/samsung/exynos-acpm.c
489
rx->rear = base + readl(&chan_shmem->tx_rear);
drivers/firmware/samsung/exynos-acpm.c
490
rx->front = base + readl(&chan_shmem->tx_front);
drivers/firmware/samsung/exynos-acpm.c
554
acpm->num_chans = readl(&shmem->num_chans);
drivers/firmware/samsung/exynos-acpm.c
560
chans_shmem = acpm->sram_base + readl(&shmem->chans);
drivers/firmware/tegra/bpmp-tegra210.c
146
address = readl(priv->atomics + RESULT_OFFSET(index));
drivers/fpga/altera-freeze-bridge.c
133
status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
drivers/fpga/altera-freeze-bridge.c
135
dev_dbg(dev, "%s %d %d\n", __func__, status, readl(csr_ctrl_addr));
drivers/fpga/altera-freeze-bridge.c
151
status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
drivers/fpga/altera-freeze-bridge.c
153
dev_dbg(dev, "%s %d %d\n", __func__, status, readl(csr_ctrl_addr));
drivers/fpga/altera-freeze-bridge.c
224
revision = readl(base_addr + FREEZE_CSR_REG_VERSION);
drivers/fpga/altera-freeze-bridge.c
240
status = readl(base_addr + FREEZE_CSR_STATUS_OFFSET);
drivers/fpga/altera-freeze-bridge.c
51
illegal = readl(csr_illegal_req_addr);
drivers/fpga/altera-freeze-bridge.c
57
illegal = readl(csr_illegal_req_addr);
drivers/fpga/altera-freeze-bridge.c
66
status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
drivers/fpga/altera-freeze-bridge.c
70
ctrl = readl(priv->base_addr + FREEZE_CSR_CTRL_OFFSET);
drivers/fpga/altera-freeze-bridge.c
96
status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
drivers/fpga/altera-freeze-bridge.c
98
dev_dbg(dev, "%s %d %d\n", __func__, status, readl(csr_ctrl_addr));
drivers/fpga/altera-pr-ip-core.c
188
val = readl(priv->reg_base + ALT_PR_CSR_OFST);
drivers/fpga/altera-pr-ip-core.c
39
val = readl(priv->reg_base + ALT_PR_CSR_OFST);
drivers/fpga/altera-pr-ip-core.c
90
val = readl(priv->reg_base + ALT_PR_CSR_OFST);
drivers/fpga/dfl-fme-perf.c
282
low = readl(addr);
drivers/fpga/socfpga.c
136
return readl(priv->fpga_base_addr + reg_offset);
drivers/fpga/xilinx-pr-decoupler.c
42
return readl(d->io_base + offset);
drivers/fpga/zynq-fpga.c
146
return readl(priv->io_base + offset);
drivers/fsi/fsi-master-aspeed.c
119
status = readl(base + OPB0_STATUS);
drivers/fsi/fsi-master-aspeed.c
170
status = readl(base + OPB0_STATUS);
drivers/fsi/fsi-master-aspeed.c
172
result = readl(base + OPB0_FSI_DATA_R);
drivers/fsi/fsi-master-aspeed.c
175
readl(base + OPB0_STATUS),
drivers/gpib/eastwood/fluke_gpib.c
428
((readl(e_priv->write_transfer_counter) &
drivers/gpib/eastwood/fluke_gpib.c
456
*bytes_written = readl(e_priv->write_transfer_counter) & write_transfer_counter_mask;
drivers/gpib/eastwood/fluke_gpib.h
77
retval = readl(nec_priv->mmiobase + register_num * nec_priv->offset);
drivers/gpio/gpio-altera.c
113
return !!(readl(altera_gc->regs + ALTERA_GPIO_DATA) & BIT(offset));
drivers/gpio/gpio-altera.c
123
data_reg = readl(altera_gc->regs + ALTERA_GPIO_DATA);
drivers/gpio/gpio-altera.c
142
gpio_ddr = readl(altera_gc->regs + ALTERA_GPIO_DIR);
drivers/gpio/gpio-altera.c
159
data_reg = readl(altera_gc->regs + ALTERA_GPIO_DATA);
drivers/gpio/gpio-altera.c
167
gpio_ddr = readl(altera_gc->regs + ALTERA_GPIO_DIR);
drivers/gpio/gpio-altera.c
189
(readl(altera_gc->regs + ALTERA_GPIO_EDGE_CAP) &
drivers/gpio/gpio-altera.c
190
readl(altera_gc->regs + ALTERA_GPIO_IRQ_MASK)))) {
drivers/gpio/gpio-altera.c
212
status = readl(altera_gc->regs + ALTERA_GPIO_DATA);
drivers/gpio/gpio-altera.c
213
status &= readl(altera_gc->regs + ALTERA_GPIO_IRQ_MASK);
drivers/gpio/gpio-altera.c
53
intmask = readl(altera_gc->regs + ALTERA_GPIO_IRQ_MASK);
drivers/gpio/gpio-altera.c
68
intmask = readl(altera_gc->regs + ALTERA_GPIO_IRQ_MASK);
drivers/gpio/gpio-amdpt.c
42
using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
drivers/gpio/gpio-amdpt.c
62
using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
drivers/gpio/gpio-ath79.c
47
return readl(ctrl->base + reg);
drivers/gpio/gpio-bcm-kona.c
117
val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id));
drivers/gpio/gpio-bcm-kona.c
134
val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id));
drivers/gpio/gpio-bcm-kona.c
148
val = readl(reg_base + GPIO_CONTROL(gpio)) & GPIO_GPCTR0_IOTR_MASK;
drivers/gpio/gpio-bcm-kona.c
172
val = readl(reg_base + reg_offset);
drivers/gpio/gpio-bcm-kona.c
198
val = readl(reg_base + reg_offset);
drivers/gpio/gpio-bcm-kona.c
230
val = readl(reg_base + GPIO_CONTROL(gpio));
drivers/gpio/gpio-bcm-kona.c
252
val = readl(reg_base + GPIO_CONTROL(gpio));
drivers/gpio/gpio-bcm-kona.c
258
val = readl(reg_base + reg_offset);
drivers/gpio/gpio-bcm-kona.c
305
val = readl(reg_base + GPIO_CONTROL(gpio));
drivers/gpio/gpio-bcm-kona.c
362
val = readl(reg_base + GPIO_INT_STATUS(bank_id));
drivers/gpio/gpio-bcm-kona.c
381
val = readl(reg_base + GPIO_INT_MASK(bank_id));
drivers/gpio/gpio-bcm-kona.c
401
val = readl(reg_base + GPIO_INT_MSKCLR(bank_id));
drivers/gpio/gpio-bcm-kona.c
441
val = readl(reg_base + GPIO_CONTROL(gpio));
drivers/gpio/gpio-bcm-kona.c
467
while ((sta = readl(reg_base + GPIO_INT_STATUS(bank_id)) &
drivers/gpio/gpio-bcm-kona.c
468
(~(readl(reg_base + GPIO_INT_MASK(bank_id)))))) {
drivers/gpio/gpio-bcm-kona.c
475
writel(readl(reg_base + GPIO_INT_STATUS(bank_id)) |
drivers/gpio/gpio-bt8xx.c
60
#define bgread(adr) readl(bg->mmio+(adr))
drivers/gpio/gpio-creg-snps.c
45
reg = readl(hcg->regs);
drivers/gpio/gpio-ftgpio010.c
151
stat = readl(g->base + GPIO_INT_STAT_RAW);
drivers/gpio/gpio-ftgpio010.c
193
val = readl(g->base + GPIO_DEBOUNCE_PRESCALE);
drivers/gpio/gpio-ftgpio010.c
202
val = readl(g->base + GPIO_DEBOUNCE_EN);
drivers/gpio/gpio-ftgpio010.c
208
val = readl(g->base + GPIO_DEBOUNCE_EN);
drivers/gpio/gpio-ftgpio010.c
70
val = readl(g->base + GPIO_INT_EN);
drivers/gpio/gpio-ftgpio010.c
83
val = readl(g->base + GPIO_INT_EN);
drivers/gpio/gpio-ftgpio010.c
95
reg_type = readl(g->base + GPIO_INT_TYPE);
drivers/gpio/gpio-ftgpio010.c
96
reg_level = readl(g->base + GPIO_INT_LEVEL);
drivers/gpio/gpio-ftgpio010.c
97
reg_both = readl(g->base + GPIO_INT_BOTH_EDGE);
drivers/gpio/gpio-graniterapids.c
100
dw = readl(gnr_gpio_get_padcfg_addr(priv, gpio));
drivers/gpio/gpio-graniterapids.c
114
dw = readl(gnr_gpio_get_padcfg_addr(priv, gpio));
drivers/gpio/gpio-graniterapids.c
137
dw = readl(gnr_gpio_get_padcfg_addr(priv, gpio));
drivers/gpio/gpio-graniterapids.c
187
reg = readl(addr);
drivers/gpio/gpio-graniterapids.c
202
reg = readl(addr);
drivers/gpio/gpio-graniterapids.c
237
reg = readl(gnr_gpio_get_padcfg_addr(priv, hwirq));
drivers/gpio/gpio-graniterapids.c
295
pending = readl(reg + GNR_GPI_STATUS_OFFSET);
drivers/gpio/gpio-graniterapids.c
296
enabled = readl(reg + GNR_GPI_ENABLE_OFFSET);
drivers/gpio/gpio-graniterapids.c
335
offset = readl(priv->reg_base + GNR_CFG_PADBAR);
drivers/gpio/gpio-graniterapids.c
377
priv->pad_backup[i] = readl(gnr_gpio_get_padcfg_addr(priv, i));
drivers/gpio/gpio-graniterapids.c
87
dw = readl(addr);
drivers/gpio/gpio-hisi.c
52
return readl(reg);
drivers/gpio/gpio-idt3243x.c
38
pending = readl(ctrl->pic + IDT_PIC_IRQ_PEND);
drivers/gpio/gpio-idt3243x.c
62
ilevel = readl(ctrl->gpio + IDT_GPIO_ILEVEL);
drivers/gpio/gpio-loongson-64bit.c
141
u = readl(lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);
drivers/gpio/gpio-lpc18xx.c
300
dir = readl(gc->base + LPC18XX_REG_DIR(port));
drivers/gpio/gpio-mb86s7x.c
106
val = readl(gchip->base + DDR(gpio));
drivers/gpio/gpio-mb86s7x.c
119
return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio));
drivers/gpio/gpio-mb86s7x.c
130
val = readl(gchip->base + PDR(gpio));
drivers/gpio/gpio-mb86s7x.c
49
val = readl(gchip->base + PFR(gpio));
drivers/gpio/gpio-mb86s7x.c
66
val = readl(gchip->base + PFR(gpio));
drivers/gpio/gpio-mb86s7x.c
81
val = readl(gchip->base + DDR(gpio));
drivers/gpio/gpio-mb86s7x.c
99
val = readl(gchip->base + PDR(gpio));
drivers/gpio/gpio-menz127.c
100
od_en = readl(priv->reg_base + MEN_Z127_ODER);
drivers/gpio/gpio-menz127.c
75
db_en = readl(priv->reg_base + MEN_Z127_DBER);
drivers/gpio/gpio-merrifield.c
85
irq_base = readl(base + 0 * sizeof(u32));
drivers/gpio/gpio-merrifield.c
86
gpio_base = readl(base + 1 * sizeof(u32));
drivers/gpio/gpio-mlxbf2.c
139
arm_gpio_lock_val = readl(yu_arm_gpio_lock_param.io);
drivers/gpio/gpio-mlxbf2.c
244
val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE);
drivers/gpio/gpio-mlxbf2.c
248
val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0);
drivers/gpio/gpio-mlxbf2.c
261
val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0);
drivers/gpio/gpio-mlxbf2.c
276
pending = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CAUSE_EVTEN0);
drivers/gpio/gpio-mlxbf2.c
313
val = readl(gs->gpio_io + YU_GPIO_CAUSE_FALL_EN);
drivers/gpio/gpio-mlxbf2.c
319
val = readl(gs->gpio_io + YU_GPIO_CAUSE_RISE_EN);
drivers/gpio/gpio-mlxbf2.c
431
gs->csave_regs->gpio_mode0 = readl(gs->gpio_io +
drivers/gpio/gpio-mlxbf2.c
433
gs->csave_regs->gpio_mode1 = readl(gs->gpio_io +
drivers/gpio/gpio-mlxbf3.c
100
pending = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_CAUSE_EVTEN0);
drivers/gpio/gpio-mlxbf3.c
120
val = readl(gs->gpio_io + MLXBF_GPIO_CAUSE_FALL_EN);
drivers/gpio/gpio-mlxbf3.c
123
val = readl(gs->gpio_io + MLXBF_GPIO_CAUSE_RISE_EN);
drivers/gpio/gpio-mlxbf3.c
128
val = readl(gs->gpio_io + MLXBF_GPIO_CAUSE_RISE_EN);
drivers/gpio/gpio-mlxbf3.c
133
val = readl(gs->gpio_io + MLXBF_GPIO_CAUSE_FALL_EN);
drivers/gpio/gpio-mlxbf3.c
70
val = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0);
drivers/gpio/gpio-mlxbf3.c
83
val = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0);
drivers/gpio/gpio-mmio.c
92
return readl(reg);
drivers/gpio/gpio-mxc.c
206
val = readl(port->base + GPIO_EDGE_SEL);
drivers/gpio/gpio-mxc.c
218
val = readl(reg) & ~(0x3 << (bit << 1));
drivers/gpio/gpio-mxc.c
239
val = readl(reg);
drivers/gpio/gpio-mxc.c
283
irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
drivers/gpio/gpio-mxc.c
301
irq_msk = readl(port->base + GPIO_IMR);
drivers/gpio/gpio-mxc.c
305
irq_stat = readl(port->base + GPIO_ISR) & irq_msk;
drivers/gpio/gpio-mxc.c
547
port->gpio_saved_reg.icr1 = readl(port->base + GPIO_ICR1);
drivers/gpio/gpio-mxc.c
548
port->gpio_saved_reg.icr2 = readl(port->base + GPIO_ICR2);
drivers/gpio/gpio-mxc.c
549
port->gpio_saved_reg.imr = readl(port->base + GPIO_IMR);
drivers/gpio/gpio-mxc.c
550
port->gpio_saved_reg.gdir = readl(port->base + GPIO_GDIR);
drivers/gpio/gpio-mxc.c
551
port->gpio_saved_reg.edge_sel = readl(port->base + GPIO_EDGE_SEL);
drivers/gpio/gpio-mxc.c
552
port->gpio_saved_reg.dr = readl(port->base + GPIO_DR);
drivers/gpio/gpio-mxs.c
135
val = readl(pin_addr);
drivers/gpio/gpio-mxs.c
152
irq_stat = readl(port->base + PINCTRL_IRQSTAT(port)) &
drivers/gpio/gpio-mxs.c
153
readl(port->base + PINCTRL_IRQEN(port));
drivers/gpio/gpio-mxs.c
245
dir = readl(port->base + PINCTRL_DOE(port));
drivers/gpio/gpio-mxs.c
82
val = readl(port->base + PINCTRL_DIN(port)) & pin_mask;
drivers/gpio/gpio-nomadik.c
291
status = readl(nmk_chip->addr + NMK_GPIO_IS);
drivers/gpio/gpio-nomadik.c
314
dir = readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset);
drivers/gpio/gpio-nomadik.c
344
value = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset));
drivers/gpio/gpio-nomadik.c
391
afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & BIT(offset);
drivers/gpio/gpio-nomadik.c
392
bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & BIT(offset);
drivers/gpio/gpio-nomadik.c
426
is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset));
drivers/gpio/gpio-nomadik.c
427
pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & BIT(offset));
drivers/gpio/gpio-nomadik.c
428
data_out = !!(readl(nmk_chip->addr + NMK_GPIO_DAT) & BIT(offset));
drivers/gpio/gpio-nomadik.c
52
slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
drivers/gpio/gpio-rockchip.c
102
value = readl(reg);
drivers/gpio/gpio-rockchip.c
121
data = readl(reg);
drivers/gpio/gpio-rockchip.c
136
data = readl(bit >= 16 ? reg + 0x4 : reg);
drivers/gpio/gpio-rockchip.c
139
data = readl(reg);
drivers/gpio/gpio-rockchip.c
191
data = readl(bank->reg_base + bank->gpio_regs->ext_port);
drivers/gpio/gpio-rockchip.c
228
cur_div_reg = readl(bank->reg_base +
drivers/gpio/gpio-rockchip.c
426
data = readl(bank->reg_base + bank->gpio_regs->ext_port);
drivers/gpio/gpio-rockchip.c
664
id = readl(bank->reg_base + gpio_regs_v2.version_id);
drivers/gpio/gpio-rockchip.c
79
return readl(reg + 0x4) << 16 | readl(reg);
drivers/gpio/gpio-sodaville.c
58
reg = readl(type_reg);
drivers/gpio/gpio-sodaville.c
80
unsigned long irq_stat = readl(sd->gpio_pub_base + GPSTR);
drivers/gpio/gpio-sodaville.c
83
irq_stat &= readl(sd->gpio_pub_base + GPIO_INT);
drivers/gpio/gpio-spacemit-k1.c
67
return readl(gb->base + to_spacemit_gpio_regs(gb)[reg]);
drivers/gpio/gpio-tangier.c
119
value = readl(gpdr);
drivers/gpio/gpio-tangier.c
138
value = readl(gpdr);
drivers/gpio/gpio-tangier.c
152
if (readl(gpdr) & BIT(shift))
drivers/gpio/gpio-tangier.c
170
value = readl(gfbr);
drivers/gpio/gpio-tangier.c
223
value = readl(gimr);
drivers/gpio/gpio-tangier.c
265
value = readl(grer);
drivers/gpio/gpio-tangier.c
272
value = readl(gfer);
drivers/gpio/gpio-tangier.c
283
value = readl(glpr);
drivers/gpio/gpio-tangier.c
291
value = readl(gitr);
drivers/gpio/gpio-tangier.c
297
value = readl(gitr);
drivers/gpio/gpio-tangier.c
324
value = readl(gwmr);
drivers/gpio/gpio-tangier.c
360
pending = readl(gisr);
drivers/gpio/gpio-tangier.c
361
enabled = readl(gimr);
drivers/gpio/gpio-tangier.c
476
ctx->level = readl(gpio_reg(&priv->chip, base, GPLR));
drivers/gpio/gpio-tangier.c
478
ctx->gpdr = readl(gpio_reg(&priv->chip, base, GPDR));
drivers/gpio/gpio-tangier.c
479
ctx->grer = readl(gpio_reg(&priv->chip, base, GRER));
drivers/gpio/gpio-tangier.c
480
ctx->gfer = readl(gpio_reg(&priv->chip, base, GFER));
drivers/gpio/gpio-tangier.c
481
ctx->gimr = readl(gpio_reg(&priv->chip, base, GIMR));
drivers/gpio/gpio-tangier.c
483
ctx->gwmr = readl(gpio_reg(&priv->chip, base, priv->wake_regs.gwmr));
drivers/gpio/gpio-tangier.c
90
return !!(readl(gplr) & BIT(shift));
drivers/gpio/gpio-tegra186.c
195
value = readl(secure + TEGRA186_GPIO_VM);
drivers/gpio/gpio-tegra186.c
243
value = readl(base + TEGRA186_GPIO_OUTPUT_VALUE);
drivers/gpio/gpio-tegra186.c
265
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
283
value = readl(base + TEGRA186_GPIO_OUTPUT_CONTROL);
drivers/gpio/gpio-tegra186.c
287
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
313
value = readl(base + TEGRA186_GPIO_OUTPUT_CONTROL);
drivers/gpio/gpio-tegra186.c
317
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
345
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
380
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
405
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
407
value = readl(base + TEGRA186_GPIO_OUTPUT_VALUE);
drivers/gpio/gpio-tegra186.c
409
value = readl(base + TEGRA186_GPIO_INPUT);
drivers/gpio/gpio-tegra186.c
443
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
550
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
570
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
586
value = readl(base + TEGRA186_GPIO_ENABLE_CONFIG);
drivers/gpio/gpio-tegra186.c
686
value = readl(base + TEGRA186_GPIO_INTERRUPT_STATUS(1));
drivers/gpio/gpio-tegra186.c
794
value = readl(base + TEGRA186_GPIO_CTL_SCR);
drivers/gpio/gpio-tegra186.c
820
value = readl(base + offset);
drivers/gpio/gpio-uniphier.c
107
return !!(readl(priv->regs + reg_offset) & mask);
drivers/gpio/gpio-uniphier.c
440
*val++ = readl(priv->regs + reg + UNIPHIER_GPIO_PORT_DATA);
drivers/gpio/gpio-uniphier.c
441
*val++ = readl(priv->regs + reg + UNIPHIER_GPIO_PORT_DIR);
drivers/gpio/gpio-uniphier.c
444
*val++ = readl(priv->regs + UNIPHIER_GPIO_IRQ_EN);
drivers/gpio/gpio-uniphier.c
445
*val++ = readl(priv->regs + UNIPHIER_GPIO_IRQ_MODE);
drivers/gpio/gpio-uniphier.c
446
*val++ = readl(priv->regs + UNIPHIER_GPIO_IRQ_FLT_EN);
drivers/gpio/gpio-uniphier.c
66
tmp = readl(priv->regs + reg);
drivers/gpio/gpio-visconti.c
53
odata = readl(priv->base + GPIO_ODATA);
drivers/gpio/gpio-visconti.c
54
intmode = readl(priv->base + GPIO_INTMODE);
drivers/gpio/gpio-xilinx.c
37
# define xgpio_readreg(offset) readl(offset)
drivers/gpio/gpio-xlp.c
196
gpio_stat = readl(priv->gpio_intr_stat + regoff * 4);
drivers/gpio/gpio-xlp.c
74
return !!(readl(addr + regset) & BIT(pos));
drivers/gpio/gpio-xlp.c
83
value = readl(addr + regset);
drivers/gpio/gpio-zevio.c
67
return readl(IOMEM(c->regs + section_offset + port_offset));
drivers/gpu/drm/adp/adp-mipi.c
122
val = readl(adp->mipi + DSI_GEN_PLD_DATA);
drivers/gpu/drm/adp/adp_drv.c
250
cur_ctrl = readl(adp->fe + ADP_CTRL);
drivers/gpu/drm/adp/adp_drv.c
268
cur_ctrl = readl(adp->fe + ADP_CTRL);
drivers/gpu/drm/adp/adp_drv.c
413
size = readl(adp->fe + ADP_SCREEN_SIZE);
drivers/gpu/drm/adp/adp_drv.c
493
int_status = readl(adp->fe + ADP_INT_STATUS);
drivers/gpu/drm/adp/adp_drv.c
498
int_ctl = readl(adp->fe + ADP_CTRL);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1103
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1104
r = readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1144
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1147
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1149
r = readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1154
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1187
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1188
r = readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1191
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1192
r |= ((u64)readl(pcie_data_offset) << 32);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1222
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1225
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1227
r = readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1230
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1233
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1235
r |= ((u64)readl(pcie_data_offset) << 32);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1240
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1271
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1273
readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1300
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1303
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1306
readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1311
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1341
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1343
readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1346
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1348
readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1375
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1378
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1381
readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1384
readl(pcie_index_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1387
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1390
readl(pcie_data_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
1395
readl(pcie_index_hi_offset);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
873
ret = readl(((void __iomem *)adev->rmmio) + (reg * 4));
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
941
ret = readl(((void __iomem *)adev->rmmio) + (reg * 4));
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
42
return readl(adev->doorbell.cpu_addr + index);
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1426
stat = readl(vfi_stat);
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1436
data = readl(vfi_data);
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1533
tmp = readl(scratch_reg1);
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1539
tmp = readl(scratch_reg1);
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
1562
ret = readl(scratch_reg0);
drivers/gpu/drm/arm/display/include/malidp_io.h
15
return readl((base + (offset >> 2)));
drivers/gpu/drm/arm/hdlcd_drv.h
35
return readl(hdlcd->mmio + reg);
drivers/gpu/drm/arm/malidp_hw.h
262
return readl(hwdev->regs + reg);
drivers/gpu/drm/armada/armada_debugfs.c
79
v = readl(dcrtc->base + reg);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
196
u32 reg = readl(priv->base + CRT_CTRL1);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
210
u32 reg = readl(priv->base + CRT_CTRL1);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
33
ctrl1 = readl(priv->base + CRT_CTRL1);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
59
u32 ctrl1 = readl(priv->base + CRT_CTRL1);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
60
u32 ctrl2 = readl(priv->base + CRT_CTRL2);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
71
u32 ctrl1 = readl(priv->base + CRT_CTRL1);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
72
u32 ctrl2 = readl(priv->base + CRT_CTRL2);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
96
ctrl1 = readl(priv->base + CRT_CTRL1);
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
130
reg = readl(priv->base + CRT_CTRL1);
drivers/gpu/drm/ast/ast_dp501.c
300
data = readl(ast->dp501_fw_buf + offset);
drivers/gpu/drm/ast/ast_dp501.c
304
data = readl(ast->dp501_fw_buf + offset);
drivers/gpu/drm/ast/ast_dp501.c
310
data = readl(ast->dp501_fw_buf + offset);
drivers/gpu/drm/ast/ast_dp501.c
338
ediddata = readl(ast->dp501_fw_buf + offset + i);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
1044
ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2,
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
1053
ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_INT_STA,
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
1064
reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
1066
u32 aux_status = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA) &
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
1081
reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 +
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
1088
reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
200
reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
204
reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
241
reg = readl(dp->reg_base + pd_addr);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
267
reg = readl(dp->reg_base + phy_pd_addr);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
276
reg = readl(dp->reg_base + phy_pd_addr);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
286
reg = readl(dp->reg_base + phy_pd_addr);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
296
reg = readl(dp->reg_base + phy_pd_addr);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
306
reg = readl(dp->reg_base + phy_pd_addr);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
32
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
325
reg = readl(dp->reg_base + phy_pd_addr);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
36
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
364
reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
372
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
402
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
411
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
428
reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
448
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
46
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
484
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
497
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
509
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
541
reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
570
reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
609
return readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
618
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
622
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
665
reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
707
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
720
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
723
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
730
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
733
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
751
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
768
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
783
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
787
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
798
reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
803
reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
814
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
823
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
826
reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
839
reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
848
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
853
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
858
reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
871
reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
880
reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
911
val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
936
val = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
941
val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
946
val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
1099
flag = readl(dsi->regs + DIRECT_CMD_STS_FLAG);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
1101
ctl = readl(dsi->regs + DIRECT_CMD_STS_CTL);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
1169
writel(readl(dsi->regs + MCTL_MAIN_DATA_CTL) | ctl,
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
1194
sts = readl(dsi->regs + DIRECT_CMD_STS);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
1198
writel(readl(dsi->regs + MCTL_MAIN_DATA_CTL) & ~ctl,
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
1217
val = readl(dsi->regs + DIRECT_CMD_RDDATA);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
1302
val = readl(dsi->regs + ID_REG);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
1311
val = readl(dsi->regs + IP_CONF);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
615
val = readl(dsi->regs + MCTL_MAIN_DATA_CTL);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
620
val = readl(dsi->regs + MCTL_MAIN_EN) & ~IF_EN(input->id);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
876
tmp = readl(dsi->regs + MCTL_MAIN_DATA_CTL);
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
887
tmp = readl(dsi->regs + MCTL_MAIN_EN) | IF_EN(input->id);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
2321
apb_stat = readl(mhdp->regs + CDNS_APB_INT_STATUS);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
2325
sw_ev0 = readl(mhdp->regs + CDNS_SW_EVENT0);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
611
fw_ver = (readl(mhdp->regs + CDNS_VER_H) << 8)
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
612
| readl(mhdp->regs + CDNS_VER_L);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
614
lib_ver = (readl(mhdp->regs + CDNS_LIB_H_ADDR) << 8)
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
615
| readl(mhdp->regs + CDNS_LIB_L_ADDR);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
62
writel(readl(mhdp->regs + CDNS_APB_INT_MASK) &
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
678
readl(mhdp->regs + CDNS_SW_EVENT0);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
679
readl(mhdp->regs + CDNS_SW_EVENT1);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
680
readl(mhdp->regs + CDNS_SW_EVENT2);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
681
readl(mhdp->regs + CDNS_SW_EVENT3);
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
71
writel(readl(mhdp->regs + CDNS_APB_INT_MASK) |
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
82
ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_EMPTY,
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
88
return readl(mhdp->regs + CDNS_MAILBOX_RX_DATA) & 0xff;
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
97
ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_FULL,
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c
24
ret = readx_poll_timeout(readl, mhdp->sapb_regs + CDNS_MAILBOX_EMPTY,
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c
30
return readl(mhdp->sapb_regs + CDNS_MAILBOX_RX_DATA) & 0xff;
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c
40
ret = readx_poll_timeout(readl, mhdp->sapb_regs + CDNS_MAILBOX_FULL,
drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c
76
return readl(pc->base + offset);
drivers/gpu/drm/bridge/samsung-dsim.c
711
return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]);
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
314
return readl(dsi->base + reg);
drivers/gpu/drm/drm_print.c
390
readl(regset->base + regset->regs[i].offset));
drivers/gpu/drm/etnaviv/etnaviv_gpu.h
182
readl(gpu->mmio + reg);
drivers/gpu/drm/etnaviv/etnaviv_gpu.h
184
return readl(gpu->mmio + reg);
drivers/gpu/drm/etnaviv/etnaviv_gpu.h
204
return readl(gpu->mmio + gpu_fix_power_address(gpu, reg));
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
100
val = (val & mask) | (readl(ctx->addr + reg) & ~mask);
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
144
frm = readl(ctx->addr + DECON_CRFMID);
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
146
status = readl(ctx->addr + DECON_VIDCON1);
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
148
frm = readl(ctx->addr + DECON_CRFMID);
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
335
val = readl(ctx->addr + DECON_WINCONx(win));
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
696
val = readl(ctx->addr + DECON_VIDINTCON1);
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
702
val = readl(ctx->addr + DECON_VIDOUTCON0);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
125
val = readl(ctx->regs + SHADOWCON);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
154
val = readl(ctx->regs + WINCON(win));
drivers/gpu/drm/exynos/exynos7_drm_decon.c
167
val = readl(ctx->regs + DECON_UPDATE);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
261
val = readl(ctx->regs + DECON_UPDATE);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
272
val = readl(ctx->regs + VIDINTCON0);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
294
val = readl(ctx->regs + VIDINTCON0);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
311
val = readl(ctx->regs + WINCON(win));
drivers/gpu/drm/exynos/exynos7_drm_decon.c
482
val = readl(ctx->regs + WINCON(win));
drivers/gpu/drm/exynos/exynos7_drm_decon.c
490
val = readl(ctx->regs + DECON_UPDATE);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
506
val = readl(ctx->regs + WINCON(win));
drivers/gpu/drm/exynos/exynos7_drm_decon.c
510
val = readl(ctx->regs + DECON_UPDATE);
drivers/gpu/drm/exynos/exynos7_drm_decon.c
595
val = readl(ctx->regs + VIDINTCON1);
drivers/gpu/drm/exynos/exynos_drm_fimc.c
115
return readl(ctx->regs + reg);
drivers/gpu/drm/exynos/exynos_drm_fimc.c
127
writel(readl(r) | bits, r);
drivers/gpu/drm/exynos/exynos_drm_fimc.c
134
writel(readl(r) & ~bits, r);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
1005
reg = readl(timing_base + TRIGCON);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
1084
val = readl(ctx->regs + VIDINTCON1);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
259
val = (val & mask) | (readl(ctx->regs + reg) & ~mask);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
272
val = readl(ctx->regs + VIDINTCON0);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
304
val = readl(ctx->regs + VIDINTCON0);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
341
u32 val = readl(ctx->regs + WINCON(win));
drivers/gpu/drm/exynos/exynos_drm_fimd.c
355
u32 val = readl(ctx->regs + SHADOWCON);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
383
u32 val = readl(ctx->regs + WINCON(win));
drivers/gpu/drm/exynos/exynos_drm_fimd.c
464
u32 val = readl(timing_base + TRIGCON);
drivers/gpu/drm/exynos/exynos_drm_fimd.c
797
val = readl(ctx->regs + reg);
drivers/gpu/drm/exynos/exynos_drm_gsc.c
65
#define gsc_read(offset) readl(ctx->regs + (offset))
drivers/gpu/drm/exynos/exynos_drm_mic.c
145
ret = readl(mic->reg + MIC_OP);
drivers/gpu/drm/exynos/exynos_drm_mic.c
214
u32 reg = readl(mic->reg + MIC_OP);
drivers/gpu/drm/exynos/exynos_drm_rotator.c
35
#define rot_read(offset) readl(rot->regs + (offset))
drivers/gpu/drm/exynos/exynos_drm_scaler.c
27
#define scaler_read(offset) readl(scaler->regs + (offset))
drivers/gpu/drm/exynos/exynos_hdmi.c
686
return readl(hdata->regs + hdmi_map_reg(hdata, reg_id));
drivers/gpu/drm/exynos/exynos_hdmi.c
720
old = readl(hdata->regs + reg_id);
drivers/gpu/drm/exynos/exynos_mixer.c
187
return readl(ctx->vp_regs + reg_id);
drivers/gpu/drm/exynos/exynos_mixer.c
207
return readl(ctx->mixer_regs + reg_id);
drivers/gpu/drm/exynos/exynos_mixer.c
230
(u32)readl(ctx->mixer_regs + reg_id)); \
drivers/gpu/drm/exynos/exynos_mixer.c
262
(u32) readl(ctx->vp_regs + reg_id)); \
drivers/gpu/drm/gma500/oaktrail_hdmi.c
218
status = readl(scu_base + 0x04);
drivers/gpu/drm/gma500/oaktrail_hdmi.c
221
status = readl(scu_base + 0x04);
drivers/gpu/drm/gma500/oaktrail_hdmi.c
40
#define HDMI_READ(reg) readl(hdmi_dev->regs + (reg))
drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c
266
temp = readl(base + 0x44);
drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c
269
temp = readl(base + 0x44);
drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c
38
#define HDMI_READ(reg) readl(hdmi_dev->regs + (reg))
drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c
39
value = readl(dp->base + HIBMC_DP_AUX_RD_DATA0 + i * HIBMC_BYTES_IN_U32);
drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c
86
aux_status = readl(dp->base + HIBMC_DP_AUX_STATUS);
drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h
61
u32 reg_value = readl(addr); \
drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c
34
if (readl(dp->serdes_base + HIBMC_DP_LANE_STATUS_OFFSET) != DP_SERDES_DONE) {
drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c
49
if (readl(dp->serdes_base + HIBMC_DP_LANE_STATUS_OFFSET) != DP_SERDES_DONE) {
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
131
reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
165
reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
183
reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
205
reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
259
val = readl(priv->mmio + CRT_PLL1_HS);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
404
reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
467
reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
146
ret = readl(priv->mmio + HIBMC_DP_HOST_SERDES_CTRL);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
183
control_value = readl(mmio + HIBMC_POWER_MODE_CTRL);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
198
mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) &
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
225
reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
239
reg = readl(priv->mmio + HIBMC_MISC_CTRL);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
43
status = readl(priv->mmio + HIBMC_RAW_INTERRUPT);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
60
status = readl(priv->mmio + HIBMC_DP_INTSTAT);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c
30
u32 tmp_dir = readl(priv->mmio + GPIO_DATA_DIRECTION);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c
36
u32 tmp_data = readl(priv->mmio + GPIO_DATA);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c
50
u32 tmp_dir = readl(priv->mmio + GPIO_DATA_DIRECTION);
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c
57
return (readl(priv->mmio + GPIO_DATA) & mask) ? 1 : 0;
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
82
reg = readl(priv->mmio + HIBMC_DISPLAY_CONTROL_HISILE);
drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
345
val = readl(base + CLKMGR_CFG) | phy->clk_division;
drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
435
val = readl(base + PHY_STATUS);
drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h
95
orig = readl(addr);
drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h
220
orig = readl(addr);
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
114
tmp = readl(base + ADE_RELOAD_DIS(reg_num));
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
314
status = readl(base + LDI_MSK_INT);
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
364
val = readl(base + reg_ctrl);
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
366
val = readl(base + reg_addr);
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
368
val = readl(base + reg_size);
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
370
val = readl(base + reg_stride);
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
372
val = readl(base + reg_space);
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
374
val = readl(base + reg_en);
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
384
val = readl(base + ADE_CLIP_DISABLE(ch));
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
386
val = readl(base + ADE_CLIP_SIZE0(ch));
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
388
val = readl(base + ADE_CLIP_SIZE1(ch));
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
397
val = readl(base + ADE_OVLY_CH_XY0(ovly_ch));
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
399
val = readl(base + ADE_OVLY_CH_XY1(ovly_ch));
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
401
val = readl(base + ADE_OVLY_CH_CTL(ovly_ch));
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
413
val = readl(base + ADE_OVLY_CTL);
drivers/gpu/drm/i915/i915_vgpu.c
99
dev_priv->vgpu.caps = readl(shared_area + vgtif_offset(vgt_caps));
drivers/gpu/drm/i915/intel_uncore.c
134
#define fw_ack(d) readl((d)->reg_ack)
drivers/gpu/drm/i915/intel_uncore.h
514
readl(base + i915_mmio_reg_offset(reg))
drivers/gpu/drm/i915/selftests/intel_uncore.c
235
val = readl(reg);
drivers/gpu/drm/i915/selftests/intel_uncore.c
262
if (wait_for(readl(reg) == 0, 100)) {
drivers/gpu/drm/i915/selftests/intel_uncore.c
264
engine->name, r->name, readl(reg), fw_domains);
drivers/gpu/drm/imx/dcss/dcss-dev.h
20
#define dcss_readl(c) readl(c)
drivers/gpu/drm/imx/dcss/dcss-dev.h
27
writel((readl(c) & ~(m)) | (v), (c));
drivers/gpu/drm/imx/lcdc/imx-lcdc.c
178
lpcr = readl(lcdc->base + IMX21LCDC_LPCR);
drivers/gpu/drm/imx/lcdc/imx-lcdc.c
229
writel(readl(lcdc->base + IMX21LCDC_LCPR) & ~(IMX21LCDC_LCPR_CC0 | IMX21LCDC_LCPR_CC1),
drivers/gpu/drm/imx/lcdc/imx-lcdc.c
375
status = readl(lcdc->base + IMX21LCDC_LISR);
drivers/gpu/drm/kmb/kmb_drv.h
84
return readl(dev_p->lcd_mmio + reg);
drivers/gpu/drm/kmb/kmb_dsi.h
346
return readl(kmb_dsi->mipi_mmio + reg);
drivers/gpu/drm/lima/lima_bcast.c
12
#define bcast_read(reg) readl(ip->iomem + reg)
drivers/gpu/drm/lima/lima_dlbu.c
13
#define dlbu_read(reg) readl(ip->iomem + reg)
drivers/gpu/drm/lima/lima_gp.c
18
#define gp_read(reg) readl(ip->iomem + reg)
drivers/gpu/drm/lima/lima_l2_cache.c
12
#define l2_cache_read(reg) readl(ip->iomem + reg)
drivers/gpu/drm/lima/lima_mmu.c
14
#define mmu_read(reg) readl(ip->iomem + reg)
drivers/gpu/drm/lima/lima_pmu.c
12
#define pmu_read(reg) readl(ip->iomem + reg)
drivers/gpu/drm/lima/lima_pp.c
19
#define pp_read(reg) readl(ip->iomem + reg)
drivers/gpu/drm/loongson/lsdc_drv.h
348
return readl(ldev->reg_base + offset);
drivers/gpu/drm/loongson/lsdc_drv.h
361
u32 val = readl(addr);
drivers/gpu/drm/loongson/lsdc_drv.h
371
u32 val = readl(addr);
drivers/gpu/drm/loongson/lsdc_drv.h
379
return readl(ldev->reg_base + offset + pipe * CRTC_PIPE_OFFSET);
drivers/gpu/drm/loongson/lsdc_gfxpll.c
65
reg->w[0] = readl(this->mmio);
drivers/gpu/drm/loongson/lsdc_gfxpll.c
66
reg->w[1] = readl(this->mmio + 4);
drivers/gpu/drm/loongson/lsdc_pixpll.c
258
dst->w[0] = readl(this->mmio);
drivers/gpu/drm/loongson/lsdc_pixpll.c
259
dst->w[1] = readl(this->mmio + 4);
drivers/gpu/drm/mcde/mcde_clk_div.c
101
cr = readl(mcde->regs + cdiv->cr);
drivers/gpu/drm/mcde/mcde_clk_div.c
24
val = readl(mcde->regs + cdiv->cr);
drivers/gpu/drm/mcde/mcde_display.c
107
val = readl(mcde->regs + MCDE_CRA0);
drivers/gpu/drm/mcde/mcde_display.c
1269
val = readl(mcde->regs + MCDE_CRC);
drivers/gpu/drm/mcde/mcde_display.c
1294
val = readl(mcde->regs + MCDE_CR);
drivers/gpu/drm/mcde/mcde_display.c
704
val = readl(mcde->regs + cr1);
drivers/gpu/drm/mcde/mcde_display.c
81
mispp = readl(mcde->regs + MCDE_MISPP);
drivers/gpu/drm/mcde/mcde_display.c
82
misovl = readl(mcde->regs + MCDE_MISOVL);
drivers/gpu/drm/mcde/mcde_display.c
83
mischnl = readl(mcde->regs + MCDE_MISCHNL);
drivers/gpu/drm/mcde/mcde_display.c
864
val = readl(mcde->regs + cr);
drivers/gpu/drm/mcde/mcde_display.c
892
val = readl(mcde->regs + cr);
drivers/gpu/drm/mcde/mcde_display.c
902
while (readl(mcde->regs + cr) & MCDE_CRX0_FLOEN) {
drivers/gpu/drm/mcde/mcde_display.c
947
val = readl(mcde->regs + ctrl);
drivers/gpu/drm/mcde/mcde_drv.c
117
val = readl(mcde->regs + MCDE_MISERR);
drivers/gpu/drm/mcde/mcde_drv.c
366
pid = readl(mcde->regs + MCDE_PID);
drivers/gpu/drm/mcde/mcde_dsi.c
1007
while ((readl(d->regs + DSI_VID_MODE_STS) & val) == val) {
drivers/gpu/drm/mcde/mcde_dsi.c
1029
val = readl(d->regs + DSI_MCTL_MAIN_DATA_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
110
val = readl(d->regs + DSI_DIRECT_CMD_RD_STS_FLAG);
drivers/gpu/drm/mcde/mcde_dsi.c
115
val = readl(d->regs + DSI_TG_STS_FLAG);
drivers/gpu/drm/mcde/mcde_dsi.c
1194
dsi_id = readl(d->regs + DSI_ID_REG);
drivers/gpu/drm/mcde/mcde_dsi.c
120
val = readl(d->regs + DSI_VID_MODE_STS_FLAG);
drivers/gpu/drm/mcde/mcde_dsi.c
230
while (!(readl(d->regs + DSI_DIRECT_CMD_STS) &
drivers/gpu/drm/mcde/mcde_dsi.c
242
while (!(readl(d->regs + DSI_DIRECT_CMD_STS) &
drivers/gpu/drm/mcde/mcde_dsi.c
254
val = readl(d->regs + DSI_DIRECT_CMD_STS);
drivers/gpu/drm/mcde/mcde_dsi.c
276
rdsz = readl(d->regs + DSI_DIRECT_CMD_RD_PROPERTY);
drivers/gpu/drm/mcde/mcde_dsi.c
278
rddat = readl(d->regs + DSI_DIRECT_CMD_RDDAT);
drivers/gpu/drm/mcde/mcde_dsi.c
410
val = readl(d->regs + DSI_DIRECT_CMD_STS_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
419
val = readl(d->regs + DSI_CMD_MODE_STS_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
696
val = readl(d->regs + DSI_VID_BLKSIZE1);
drivers/gpu/drm/mcde/mcde_dsi.c
726
val = readl(d->regs + DSI_VID_PCK_TIME);
drivers/gpu/drm/mcde/mcde_dsi.c
733
val = readl(d->regs + DSI_VID_VCA_SETTING1);
drivers/gpu/drm/mcde/mcde_dsi.c
741
val = readl(d->regs + DSI_VID_VCA_SETTING2);
drivers/gpu/drm/mcde/mcde_dsi.c
77
val = readl(d->regs + DSI_DIRECT_CMD_STS_FLAG);
drivers/gpu/drm/mcde/mcde_dsi.c
828
while ((readl(d->regs + DSI_MCTL_MAIN_STS) & val) != val) {
drivers/gpu/drm/mcde/mcde_dsi.c
840
val = readl(d->regs + DSI_CMD_MODE_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
923
val = readl(d->regs + DSI_MCTL_MAIN_DATA_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
928
val = readl(d->regs + DSI_CMD_MODE_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
93
val = readl(d->regs + DSI_CMD_MODE_STS_FLAG);
drivers/gpu/drm/mcde/mcde_dsi.c
933
val = readl(d->regs + DSI_VID_MODE_STS_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
939
val = readl(d->regs + DSI_MCTL_MAIN_DATA_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
944
val = readl(d->regs + DSI_CMD_MODE_CTL);
drivers/gpu/drm/mcde/mcde_dsi.c
988
while ((readl(d->regs + DSI_CMD_MODE_STS) & val) == val) {
drivers/gpu/drm/mediatek/mtk_cec.c
111
status = readl(cec->regs + RX_EVENT);
drivers/gpu/drm/mediatek/mtk_cec.c
67
tmp = readl(reg);
drivers/gpu/drm/mediatek/mtk_cec.c
78
tmp = readl(reg);
drivers/gpu/drm/mediatek/mtk_cec.c
86
u32 tmp = readl(cec->regs + offset) & ~mask;
drivers/gpu/drm/mediatek/mtk_ddp_comp.c
105
u32 tmp = readl(regs + offset);
drivers/gpu/drm/mediatek/mtk_disp_aal.c
126
cfg_val = readl(aal->regs + DISP_AAL_CFG);
drivers/gpu/drm/mediatek/mtk_disp_gamma.c
190
cfg_val = readl(gamma->regs + DISP_GAMMA_CFG);
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
267
reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
282
reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
579
reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
589
reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
drivers/gpu/drm/mediatek/mtk_disp_rdma.c
110
unsigned int tmp = readl(rdma->regs + reg);
drivers/gpu/drm/mediatek/mtk_dpi.c
179
u32 tmp = readl(dpi->regs + offset) & ~mask;
drivers/gpu/drm/mediatek/mtk_dpi.c
897
val = readl(dpi->regs + DPI_PATTERN0);
drivers/gpu/drm/mediatek/mtk_dsi.c
1131
dsi_mode = readl(dsi->regs + DSI_MODE_CTRL);
drivers/gpu/drm/mediatek/mtk_dsi.c
241
u32 temp = readl(dsi->regs + offset);
drivers/gpu/drm/mediatek/mtk_dsi.c
343
return readl(dsi->regs + DSI_PHY_LCCON) & LC_HS_TX_EN;
drivers/gpu/drm/mediatek/mtk_dsi.c
647
status = readl(dsi->regs + DSI_INTSTA) & flag;
drivers/gpu/drm/mediatek/mtk_dsi.c
652
tmp = readl(dsi->regs + DSI_INTSTA);
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
67
writel(readl(ddc->regs + offset) | val, ddc->regs + offset);
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
73
writel(readl(ddc->regs + offset) & ~val, ddc->regs + offset);
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
79
return (readl(ddc->regs + offset) & val) == val;
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
88
tmp = readl(ddc->regs + offset);
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
98
return (readl(ddc->regs + offset) & mask) >> shift;
drivers/gpu/drm/meson/meson_dw_hdmi.c
174
data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
drivers/gpu/drm/meson/meson_dw_hdmi.c
175
data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);
drivers/gpu/drm/meson/meson_dw_hdmi.c
185
return readl(dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));
drivers/gpu/drm/meson/meson_dw_hdmi.c
238
data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
drivers/gpu/drm/meson/meson_dw_hdmi.c
239
data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);
drivers/gpu/drm/meson/meson_plane.c
176
priv->viu.osd1_ctrl_stat2 = readl(priv->io_base +
drivers/gpu/drm/msm/adreno/a6xx_gmu.h
140
return readl(gmu->mmio + GMU_BYTE_OFFSET(gmu, offset));
drivers/gpu/drm/msm/adreno/a6xx_gmu.h
183
return readl(gmu->rscc + (offset << 2));
drivers/gpu/drm/msm/adreno/a6xx_gpu.h
250
return readl(a6xx_gpu->llc_mmio + (reg << 2));
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
205
readl((ptr) + ((offset) << 2))
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h
52
return readl(mdp4_kms->mmio + reg);
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
180
return readl(mdp5_kms->mmio + reg);
drivers/gpu/drm/msm/dp/dp_ctrl.c
1410
ret = readx_poll_timeout(readl, ctrl->link_base + REG_DP_MAINLINK_READY,
drivers/gpu/drm/msm/dsi/dsi_host.c
193
return readl(msm_host->ctrl_base + reg);
drivers/gpu/drm/msm/dsi/dsi_host.c
57
ver = readl(base + REG_DSI_VERSION);
drivers/gpu/drm/msm/dsi/dsi_host.c
75
ver = readl(base + DSI_6G_REG_SHIFT + REG_DSI_VERSION);
drivers/gpu/drm/msm/dsi/dsi_host.c
80
*minor = readl(base + REG_DSI_6G_HW_VERSION);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
303
u32 data = readl(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
312
u32 data = readl(pll->phy->base + REG_DSI_10nm_PHY_CMN_CTRL_0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
323
data = readl(pll->phy->base + REG_DSI_10nm_PHY_CMN_CLK_CFG1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
331
data = readl(pll->phy->base + REG_DSI_10nm_PHY_CMN_CLK_CFG1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
420
dec = readl(base + REG_DSI_10nm_PHY_PLL_DECIMAL_DIV_START_1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
423
frac = readl(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_LOW_1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
424
frac |= ((readl(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_MID_1) &
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
426
frac |= ((readl(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_HIGH_1) &
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
477
cached->pll_out_div = readl(pll_10nm->phy->pll_base +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
481
cmn_clk_cfg0 = readl(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
485
cmn_clk_cfg1 = readl(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
501
val = readl(pll_10nm->phy->pll_base + REG_DSI_10nm_PHY_PLL_PLL_OUTDIV_RATE);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
509
val = readl(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
720
data = readl(base + REG_DSI_10nm_PHY_CMN_PLL_CNTRL);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
860
data = readl(base + REG_DSI_10nm_PHY_CMN_CTRL_0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
896
data = readl(base + REG_DSI_10nm_PHY_CMN_CTRL_0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
120
val = readl(base + REG_DSI_14nm_PHY_PLL_RESET_SM_READY_STATUS);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
134
val = readl(base + REG_DSI_14nm_PHY_PLL_RESET_SM_READY_STATUS);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
504
dec_start = readl(base + REG_DSI_14nm_PHY_PLL_DEC_START);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
509
div_frac_start = (readl(base + REG_DSI_14nm_PHY_PLL_DIV_FRAC_START3)
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
511
div_frac_start |= (readl(base + REG_DSI_14nm_PHY_PLL_DIV_FRAC_START2)
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
513
div_frac_start |= readl(base + REG_DSI_14nm_PHY_PLL_DIV_FRAC_START1)
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
616
val = readl(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0) >> shift;
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
655
val = readl(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
693
data = readl(cmn_base + REG_DSI_14nm_PHY_CMN_CLK_CFG0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
995
glbl_test_ctrl = readl(base + REG_DSI_14nm_PHY_CMN_GLBL_TEST_CTRL);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c
88
val = readl(base + REG_DSI_20nm_PHY_GLBL_TEST_CTRL);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
173
sdm_cfg1 = readl(base + REG_DSI_28nm_PHY_PLL_SDM_CFG1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
255
doubler = readl(base + REG_DSI_28nm_PHY_PLL_REFCLK_CFG) &
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
260
sdm0 = readl(base + REG_DSI_28nm_PHY_PLL_SDM_CFG0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
264
readl(base + REG_DSI_28nm_PHY_PLL_SDM_CFG0),
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
270
readl(base + REG_DSI_28nm_PHY_PLL_SDM_CFG1),
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
273
sdm2 = FIELD(readl(base + REG_DSI_28nm_PHY_PLL_SDM_CFG2),
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
275
sdm3 = FIELD(readl(base + REG_DSI_28nm_PHY_PLL_SDM_CFG3),
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
586
readl(base + REG_DSI_28nm_PHY_PLL_POSTDIV3_CFG);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
588
readl(base + REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
589
cached_state->byte_mux = readl(base + REG_DSI_28nm_PHY_PLL_VREG_CFG);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
844
val = readl(base + REG_DSI_28nm_PHY_GLBL_TEST_CTRL);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
87
val = readl(pll_28nm->phy->pll_base + REG_DSI_28nm_PHY_PLL_STATUS);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
109
val = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
115
val = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
123
val = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
148
status = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
151
fb_divider = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
153
temp = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2) & 0x07;
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
157
ref_divider = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
194
val = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
198
val = readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
274
div = readl(bytediv->reg) & 0xff;
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
322
val = readl(bytediv->reg);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
346
readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_10);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
348
readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
350
readl(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
540
status = readl(base +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
78
val = readl(pll_28nm->phy->pll_base + REG_DSI_28nm_8960_PHY_PLL_RDY);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
1101
(readl(base + REG_DSI_7nm_PHY_CMN_REVISION_ID0) & (0xf0)) == 0x20)
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
1191
data = readl(base + REG_DSI_7nm_PHY_CMN_LANE_CTRL1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
1223
data = readl(base + REG_DSI_7nm_PHY_CMN_CTRL_0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
415
data = readl(pll->phy->base + REG_DSI_7nm_PHY_CMN_CTRL_0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
432
data = readl(pll->phy->base + REG_DSI_7nm_PHY_CMN_CTRL_0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
457
data = readl(pll->phy->base + REG_DSI_7nm_PHY_CMN_CLK_CFG1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
579
dec = readl(base + REG_DSI_7nm_PHY_PLL_DECIMAL_DIV_START_1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
582
frac = readl(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_LOW_1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
583
frac |= ((readl(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_MID_1) &
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
585
frac |= ((readl(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_HIGH_1) &
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
639
cached->pll_out_div = readl(pll_7nm->phy->pll_base +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
643
cmn_clk_cfg0 = readl(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG0);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
647
cmn_clk_cfg1 = readl(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG1);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
663
val = readl(pll_7nm->phy->pll_base + REG_DSI_7nm_PHY_PLL_PLL_OUTDIV_RATE);
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
902
data = readl(base + REG_DSI_7nm_PHY_CMN_PLL_CNTRL);
drivers/gpu/drm/msm/hdmi/hdmi.h
112
return readl(hdmi->mmio + reg);
drivers/gpu/drm/msm/hdmi/hdmi.h
117
return readl(hdmi->qfprom_mmio + reg);
drivers/gpu/drm/msm/hdmi/hdmi.h
165
return readl(phy->mmio + reg);
drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c
94
return readl(pll->mmio_qserdes_com + offset);
drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c
93
return readl(pll->mmio_qserdes_com + offset);
drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c
244
return readl(pll->mmio + reg);
drivers/gpu/drm/msm/msm_drv.h
473
u32 val = readl(addr);
drivers/gpu/drm/msm/msm_gpu.h
604
return readl(gpu->mmio + (reg << 2));
drivers/gpu/drm/msm/msm_gpu.h
632
val = (u64) readl(gpu->mmio + (reg << 2));
drivers/gpu/drm/msm/msm_gpu.h
634
val |= ((u64) readl(gpu->mmio + ((reg + 1) << 2)) << 32);
drivers/gpu/drm/mxsfb/lcdif_drv.c
118
stat = readl(lcdif->base + LCDC_V8_INT_STATUS_D0);
drivers/gpu/drm/mxsfb/lcdif_drv.c
123
reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);
drivers/gpu/drm/mxsfb/lcdif_kms.c
362
reg = readl(lcdif->base + LCDC_V8_DISP_PARA);
drivers/gpu/drm/mxsfb/lcdif_kms.c
366
reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);
drivers/gpu/drm/mxsfb/lcdif_kms.c
376
reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);
drivers/gpu/drm/mxsfb/lcdif_kms.c
386
reg = readl(lcdif->base + LCDC_V8_DISP_PARA);
drivers/gpu/drm/mxsfb/lcdif_kms.c
397
readl(lcdif->base + LCDC_V8_CTRL);
drivers/gpu/drm/mxsfb/lcdif_kms.c
399
readl(lcdif->base + LCDC_V8_CTRL);
drivers/gpu/drm/mxsfb/lcdif_kms.c
512
reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);
drivers/gpu/drm/mxsfb/mxsfb_drv.c
162
reg = readl(mxsfb->base + LCDC_CTRL1);
drivers/gpu/drm/mxsfb/mxsfb_drv.c
167
crc = readl(mxsfb->base + LCDC_V4_CRC_STAT);
drivers/gpu/drm/mxsfb/mxsfb_kms.c
162
reg = readl(mxsfb->base + LCDC_V4_CTRL2);
drivers/gpu/drm/mxsfb/mxsfb_kms.c
172
reg = readl(mxsfb->base + LCDC_VDCTRL4);
drivers/gpu/drm/mxsfb/mxsfb_kms.c
201
reg = readl(mxsfb->base + LCDC_CTRL1);
drivers/gpu/drm/mxsfb/mxsfb_kms.c
221
reg = readl(mxsfb->base + LCDC_VDCTRL4);
drivers/gpu/drm/mxsfb/mxsfb_kms.c
269
readl(mxsfb->base + LCDC_CTRL1);
drivers/gpu/drm/mxsfb/mxsfb_kms.c
271
readl(mxsfb->base + LCDC_CTRL1);
drivers/gpu/drm/mxsfb/mxsfb_kms.c
65
ctrl1 = readl(mxsfb->base + LCDC_CTRL1);
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.c
100
data = readl(gdevfreq->regs + PWR_PMU_IDLE_CTRL_REG_OFFSET +
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.c
112
data = readl(gdevfreq->regs + PWR_PMU_IDLE_CTRL_REG_OFFSET +
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.c
124
ret = readl(gdevfreq->regs + PWR_PMU_IDLE_COUNT_REG_OFFSET +
drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.c
140
ret = readl(gdevfreq->regs + PWR_PMU_IDLE_INTR_STATUS_REG_OFFSET);
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
115
return readl(dmm->base + reg);
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
124
return readl((__iomem void *)dmm->wa_dma_data);
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
163
return readl(dmm->base + reg);
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
416
readl((__iomem void *)&txn->last_pat->next_pa);
drivers/gpu/drm/panfrost/panfrost_job.c
29
#define job_read(dev, reg) readl(dev->iomem + (reg))
drivers/gpu/drm/panfrost/panfrost_mmu.c
28
#define mmu_read(dev, reg) readl(dev->iomem + reg)
drivers/gpu/drm/panfrost/panfrost_regs.h
380
#define gpu_read(dev, reg) readl(dev->iomem + reg)
drivers/gpu/drm/panthor/panthor_device.h
484
return readl(ptdev->iomem + reg);
drivers/gpu/drm/pl111/pl111_debugfs.c
43
readl(priv->regs + pl111_reg_defs[i].reg));
drivers/gpu/drm/pl111/pl111_display.c
173
tim2 = readl(priv->regs + CLCD_TIM2);
drivers/gpu/drm/pl111/pl111_display.c
34
irq_stat = readl(priv->regs + CLCD_PL111_MIS);
drivers/gpu/drm/pl111/pl111_display.c
369
cntl = readl(priv->regs + priv->ctrl);
drivers/gpu/drm/pl111/pl111_display.c
493
u32 tim2 = readl(priv->regs + CLCD_TIM2);
drivers/gpu/drm/pl111/pl111_display.c
516
tim2 = readl(priv->regs + CLCD_TIM2);
drivers/gpu/drm/radeon/cik.c
1731
return readl(rdev->doorbell.ptr + index);
drivers/gpu/drm/radeon/r100.c
4129
ret = readl(((void __iomem *)rdev->rmmio) + RADEON_MM_DATA);
drivers/gpu/drm/radeon/r600.c
1090
readl((void __iomem *)ptr);
drivers/gpu/drm/radeon/r600.c
4390
readl((void __iomem *)ptr);
drivers/gpu/drm/radeon/radeon.h
2459
return readl(((void __iomem *)rdev->rmmio) + reg);
drivers/gpu/drm/rockchip/cdn-dp-reg.c
303
ret = readx_poll_timeout(readl, dp->regs + KEEP_ALIVE,
drivers/gpu/drm/rockchip/cdn-dp-reg.c
311
reg = readl(dp->regs + VER_L) & 0xff;
drivers/gpu/drm/rockchip/cdn-dp-reg.c
313
reg = readl(dp->regs + VER_H) & 0xff;
drivers/gpu/drm/rockchip/cdn-dp-reg.c
315
reg = readl(dp->regs + VER_LIB_L_ADDR) & 0xff;
drivers/gpu/drm/rockchip/cdn-dp-reg.c
317
reg = readl(dp->regs + VER_LIB_H_ADDR) & 0xff;
drivers/gpu/drm/rockchip/cdn-dp-reg.c
407
return readl(dp->regs + SW_EVENTS0);
drivers/gpu/drm/rockchip/cdn-dp-reg.c
84
ret = readx_poll_timeout(readl, dp->regs + MAILBOX_EMPTY_ADDR,
drivers/gpu/drm/rockchip/cdn-dp-reg.c
90
return readl(dp->regs + MAILBOX0_RD_DATA) & 0xff;
drivers/gpu/drm/rockchip/cdn-dp-reg.c
97
ret = readx_poll_timeout(readl, dp->regs + MAILBOX_FULL_ADDR,
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
193
return readl(vop->regs + offset);
drivers/gpu/drm/sprd/sprd_dpu.c
753
reg_val = readl(ctx->base + REG_DPU_INT_STS);
drivers/gpu/drm/sprd/sprd_dpu.h
95
return readl(ctx->base + layer_offset);
drivers/gpu/drm/sprd/sprd_dsi.c
139
return (readl(ctx->base + offset) & mask) >> shift;
drivers/gpu/drm/sprd/sprd_dsi.c
148
ret = readl(ctx->base + offset);
drivers/gpu/drm/sprd/sprd_dsi.c
158
u32 ret = readl(ctx->base + offset);
drivers/gpu/drm/sprd/sprd_dsi.c
709
temp = readl(ctx->base + GEN_PLD_DATA);
drivers/gpu/drm/sti/sti_cursor.c
118
cursor_dbg_vpo(s, readl(cursor->regs + CUR_VPO));
drivers/gpu/drm/sti/sti_cursor.c
120
cursor_dbg_pml(s, cursor, readl(cursor->regs + CUR_PML));
drivers/gpu/drm/sti/sti_cursor.c
123
cursor_dbg_size(s, readl(cursor->regs + CUR_SIZE));
drivers/gpu/drm/sti/sti_cursor.c
125
cursor_dbg_cml(s, cursor, readl(cursor->regs + CUR_CML));
drivers/gpu/drm/sti/sti_cursor.c
82
readl(cursor->regs + reg))
drivers/gpu/drm/sti/sti_dvo.c
165
readl(dvo->regs + reg))
drivers/gpu/drm/sti/sti_dvo.c
176
seq_printf(s, " %04X", readl(reg + i * 4));
drivers/gpu/drm/sti/sti_gdp.c
150
readl(gdp->regs + reg ## _OFFSET))
drivers/gpu/drm/sti/sti_gdp.c
231
gdp_dbg_ctl(s, readl(gdp->regs + GAM_GDP_CTL_OFFSET));
drivers/gpu/drm/sti/sti_gdp.c
234
gdp_dbg_vpo(s, readl(gdp->regs + GAM_GDP_VPO_OFFSET));
drivers/gpu/drm/sti/sti_gdp.c
236
gdp_dbg_vps(s, readl(gdp->regs + GAM_GDP_VPS_OFFSET));
drivers/gpu/drm/sti/sti_gdp.c
240
gdp_dbg_size(s, readl(gdp->regs + GAM_GDP_SIZE_OFFSET));
drivers/gpu/drm/sti/sti_gdp.c
242
gdp_dbg_nvn(s, gdp, readl(gdp->regs + GAM_GDP_NVN_OFFSET));
drivers/gpu/drm/sti/sti_gdp.c
246
gdp_dbg_ppt(s, readl(gdp->regs + GAM_GDP_PPT_OFFSET));
drivers/gpu/drm/sti/sti_gdp.c
249
gdp_dbg_mst(s, readl(gdp->regs + GAM_GDP_MST_OFFSET));
drivers/gpu/drm/sti/sti_gdp.c
403
hw_nvn = readl(gdp->regs + GAM_GDP_NVN_OFFSET);
drivers/gpu/drm/sti/sti_gdp.c
435
hw_nvn = readl(gdp->regs + GAM_GDP_NVN_OFFSET);
drivers/gpu/drm/sti/sti_gdp.c
836
readl(gdp->regs + GAM_GDP_NVN_OFFSET));
drivers/gpu/drm/sti/sti_gdp.c
839
readl(gdp->regs + GAM_GDP_PML_OFFSET));
drivers/gpu/drm/sti/sti_hda.c
273
return readl(hda->regs + offset);
drivers/gpu/drm/sti/sti_hda.c
312
val = readl(hda->video_dacs_ctrl);
drivers/gpu/drm/sti/sti_hda.c
323
readl(hda->regs + reg))
drivers/gpu/drm/sti/sti_hda.c
339
seq_printf(s, " %04X", readl(reg + i * 4));
drivers/gpu/drm/sti/sti_hda.c
345
u32 val = readl(reg);
drivers/gpu/drm/sti/sti_hda.c
359
hda_dbg_cfg(s, readl(hda->regs + HDA_ANA_CFG));
drivers/gpu/drm/sti/sti_hdmi.c
1437
hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
drivers/gpu/drm/sti/sti_hdmi.c
184
return readl(hdmi->regs + offset);
drivers/gpu/drm/sti/sti_hdmi.c
204
hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
drivers/gpu/drm/sti/sti_hqvdp.c
1000
if (readl(hqvdp->regs + HQVDP_MBX_INFO_XP70)
drivers/gpu/drm/sti/sti_hqvdp.c
385
curr_cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
drivers/gpu/drm/sti/sti_hqvdp.c
386
next_cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
drivers/gpu/drm/sti/sti_hqvdp.c
413
curr_cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
drivers/gpu/drm/sti/sti_hqvdp.c
441
next_cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
drivers/gpu/drm/sti/sti_hqvdp.c
454
readl(hqvdp->regs + reg))
drivers/gpu/drm/sti/sti_hqvdp.c
580
infoxp70 = readl(hqvdp->regs + HQVDP_MBX_INFO_XP70);
drivers/gpu/drm/sti/sti_hqvdp.c
593
if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1)
drivers/gpu/drm/sti/sti_hqvdp.c
599
if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL2)
drivers/gpu/drm/sti/sti_hqvdp.c
608
if (!(readl(hqvdp->regs + HQVDP_MBX_SOFT_VSYNC) & 3))
drivers/gpu/drm/sti/sti_hqvdp.c
614
cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
drivers/gpu/drm/sti/sti_hqvdp.c
626
cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
drivers/gpu/drm/sti/sti_hqvdp.c
771
if (readl(hqvdp->regs + HQVDP_MBX_INFO_XP70)
drivers/gpu/drm/sti/sti_hqvdp.c
963
if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1)
drivers/gpu/drm/sti/sti_mixer.c
145
seq_printf(s, "-0x%08X", (int)readl(addr + i * 4));
drivers/gpu/drm/sti/sti_mixer.c
68
return readl(mixer->regs + reg_id);
drivers/gpu/drm/sti/sti_tvout.c
147
return readl(tvout->regs + offset);
drivers/gpu/drm/sti/sti_tvout.c
450
readl(tvout->regs + reg))
drivers/gpu/drm/sti/sti_tvout.c
512
tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDMI));
drivers/gpu/drm/sti/sti_tvout.c
525
tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_DVO));
drivers/gpu/drm/sti/sti_tvout.c
538
readl(tvout->regs + TVO_HD_DAC_CFG_OFF));
drivers/gpu/drm/sti/sti_tvout.c
540
tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDF));
drivers/gpu/drm/sti/sti_vid.c
101
vid_dbg_ctl(s, readl(vid->regs + VID_CTL));
drivers/gpu/drm/sti/sti_vid.c
105
vid_dbg_vpo(s, readl(vid->regs + VID_VPO));
drivers/gpu/drm/sti/sti_vid.c
107
vid_dbg_vps(s, readl(vid->regs + VID_VPS));
drivers/gpu/drm/sti/sti_vid.c
115
vid_dbg_mst(s, readl(vid->regs + VID_MST));
drivers/gpu/drm/sti/sti_vid.c
157
val = readl(vid->regs + VID_CTL);
drivers/gpu/drm/sti/sti_vid.c
188
val = readl(vid->regs + VID_CTL);
drivers/gpu/drm/sti/sti_vid.c
61
readl(vid->regs + reg))
drivers/gpu/drm/sti/sti_vtg.c
374
vtg->irq_status = readl(vtg->regs + VTG_HOST_ITS);
drivers/gpu/drm/sti/sti_vtg.c
379
readl(vtg->regs + VTG_HOST_ITS);
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
101
return readl(dsi->base + reg);
drivers/gpu/drm/stm/lvds.c
296
return readl(lvds->base + reg);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
125
val = readl(hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
129
val = readl(hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
276
reg = readl(hdmi->base + SUN4I_HDMI_HPD_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
304
return readl(hdmi->base + SUN4I_HDMI_CEC) & SUN4I_HDMI_CEC_RX;
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
605
reg = readl(hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
647
writel(readl(hdmi->base + SUN4I_HDMI_CEC) & ~SUN4I_HDMI_CEC_TX,
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c
86
val = readl(hdmi->base + SUN4I_HDMI_VID_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c
77
reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
131
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
135
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
154
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
160
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
173
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_DBG0_REG);
drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c
186
reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_DBG0_REG);
drivers/gpu/drm/sun4i/sun8i_tcon_top.c
46
val = readl(tcon_top->regs + TCON_TOP_GATE_SRC_REG);
drivers/gpu/drm/sun4i/sun8i_tcon_top.c
80
reg = readl(tcon_top->regs + TCON_TOP_PORT_SEL_REG);
drivers/gpu/drm/sysfb/ofdrm.c
520
val = readl(dac_ctl);
drivers/gpu/drm/sysfb/ofdrm.c
546
val = readl(dac_ctl);
drivers/gpu/drm/tegra/dc.h
128
u32 value = readl(dc->regs + (offset << 2));
drivers/gpu/drm/tegra/dpaux.c
79
u32 value = readl(dpaux->regs + (offset << 2));
drivers/gpu/drm/tegra/dsi.c
110
u32 value = readl(dsi->regs + (offset << 2));
drivers/gpu/drm/tegra/hdmi.c
118
u32 value = readl(hdmi->regs + (offset << 2));
drivers/gpu/drm/tegra/sor.c
489
u32 value = readl(sor->regs + (offset << 2));
drivers/gpu/drm/tiny/bochs.c
300
bochs->qext_size = readl(bochs->mmio + 0x600);
drivers/gpu/drm/tve200/tve200_display.c
143
if (readl(priv->regs + TVE200_CTRL_4) & TVE200_CTRL_4_RESET)
drivers/gpu/drm/tve200/tve200_display.c
149
readl(priv->regs + TVE200_CTRL_4) & TVE200_CTRL_4_RESET) {
drivers/gpu/drm/tve200/tve200_display.c
35
stat = readl(priv->regs + TVE200_INT_STAT);
drivers/gpu/drm/tve200/tve200_display.c
52
val = readl(priv->regs + TVE200_CTRL);
drivers/gpu/drm/v3d/v3d_drv.h
273
#define V3D_READ(offset) readl(v3d->hub_regs + offset)
drivers/gpu/drm/v3d/v3d_drv.h
276
#define V3D_BRIDGE_READ(offset) readl(v3d->bridge_regs + offset)
drivers/gpu/drm/v3d/v3d_drv.h
279
#define V3D_GCA_READ(offset) readl(v3d->gca_regs + offset)
drivers/gpu/drm/v3d/v3d_drv.h
288
#define V3D_SMS_READ(offset) readl(v3d->sms_regs + (offset))
drivers/gpu/drm/v3d/v3d_drv.h
291
#define V3D_CORE_READ(core, offset) readl(v3d->core_regs[core] + offset)
drivers/gpu/drm/vboxvideo/vbox_irq.c
28
return readl(vbox->guest_heap + HOST_FLAGS_OFFSET);
drivers/gpu/drm/vc4/vc4_crtc.c
63
readl(vc4_crtc->regs + (offset)); \
drivers/gpu/drm/vc4/vc4_dpi.c
107
readl(dpi->regs + (offset)); \
drivers/gpu/drm/vc4/vc4_drv.h
642
readl(vc4->v3d->regs + (offset)); \
drivers/gpu/drm/vc4/vc4_drv.h
654
readl(hvs->regs + (offset)); \
drivers/gpu/drm/vc4/vc4_dsi.c
654
readl(dsi->regs + (offset)); \
drivers/gpu/drm/vc4/vc4_hdmi_regs.h
692
return readl(base + field->offset);
drivers/gpu/drm/vc4/vc4_hvs.c
220
readl((u32 __iomem *)hvs->dlist + i + 0),
drivers/gpu/drm/vc4/vc4_hvs.c
221
readl((u32 __iomem *)hvs->dlist + i + 1),
drivers/gpu/drm/vc4/vc4_hvs.c
222
readl((u32 __iomem *)hvs->dlist + i + 2),
drivers/gpu/drm/vc4/vc4_hvs.c
223
readl((u32 __iomem *)hvs->dlist + i + 3));
drivers/gpu/drm/vc4/vc4_hvs.c
266
dlist_word = readl((u32 __iomem *)vc4->hvs->dlist + j);
drivers/gpu/drm/vc4/vc4_hvs.c
315
dlist_word = readl((u32 __iomem *)vc4->hvs->dlist + j);
drivers/gpu/drm/vc4/vc4_txp.c
155
readl(txp->regs + (offset)); \
drivers/gpu/drm/vc4/vc4_vec.c
214
readl(vec->regs + (offset)); \
drivers/gpu/drm/xe/xe_map.h
53
return readl(map->vaddr_iomem);
drivers/gpu/drm/xe/xe_mmio.c
194
val = readl(mmio->regs + addr);
drivers/gpu/drm/xlnx/zynqmp_disp.c
405
return readl(disp->avbuf + reg);
drivers/gpu/drm/xlnx/zynqmp_dp.c
423
return readl(dp->iomem + offset);
drivers/gpu/host1x/dev.c
57
return readl(host1x->hv_regs + r);
drivers/gpu/host1x/dev.c
71
return readl(sync_regs + r);
drivers/gpu/host1x/dev.c
90
return readl(ch->regs + r);
drivers/gpu/host1x/mipi.c
139
return readl(mipi->regs + (offset << 2));
drivers/gpu/ipu-v3/ipu-common.c
31
return readl(ipu->cm_reg + offset);
drivers/gpu/ipu-v3/ipu-cpmem.c
113
val = readl(&base->word[word].data[i]);
drivers/gpu/ipu-v3/ipu-cpmem.c
119
val = readl(&base->word[word].data[i + 1]);
drivers/gpu/ipu-v3/ipu-cpmem.c
139
val = (readl(&base->word[word].data[i]) >> ofs) & mask;
drivers/gpu/ipu-v3/ipu-cpmem.c
144
tmp = readl(&base->word[word].data[i + 1]);
drivers/gpu/ipu-v3/ipu-cpmem.c
873
readl(&p->word[0].data[0]),
drivers/gpu/ipu-v3/ipu-cpmem.c
874
readl(&p->word[0].data[1]),
drivers/gpu/ipu-v3/ipu-cpmem.c
875
readl(&p->word[0].data[2]),
drivers/gpu/ipu-v3/ipu-cpmem.c
876
readl(&p->word[0].data[3]),
drivers/gpu/ipu-v3/ipu-cpmem.c
877
readl(&p->word[0].data[4]));
drivers/gpu/ipu-v3/ipu-cpmem.c
879
readl(&p->word[1].data[0]),
drivers/gpu/ipu-v3/ipu-cpmem.c
880
readl(&p->word[1].data[1]),
drivers/gpu/ipu-v3/ipu-cpmem.c
881
readl(&p->word[1].data[2]),
drivers/gpu/ipu-v3/ipu-cpmem.c
882
readl(&p->word[1].data[3]),
drivers/gpu/ipu-v3/ipu-cpmem.c
883
readl(&p->word[1].data[4]));
drivers/gpu/ipu-v3/ipu-csi.c
179
return readl(csi->base + offset);
drivers/gpu/ipu-v3/ipu-dc.c
113
reg = readl(dc->base + DC_RL_CH(event));
drivers/gpu/ipu-v3/ipu-dc.c
217
reg = readl(dc->base + DC_WR_CH_CONF);
drivers/gpu/ipu-v3/ipu-dc.c
250
reg = readl(dc->base + DC_WR_CH_CONF);
drivers/gpu/ipu-v3/ipu-dc.c
260
val = readl(dc->base + DC_WR_CH_CONF);
drivers/gpu/ipu-v3/ipu-dc.c
289
reg = readl(priv->dc_reg + DC_MAP_CONF_VAL(ptr));
drivers/gpu/ipu-v3/ipu-dc.c
294
reg = readl(priv->dc_reg + DC_MAP_CONF_PTR(map));
drivers/gpu/ipu-v3/ipu-dc.c
302
u32 reg = readl(priv->dc_reg + DC_MAP_CONF_PTR(map));
drivers/gpu/ipu-v3/ipu-di.c
125
return readl(di->base + offset);
drivers/gpu/ipu-v3/ipu-dmfc.c
142
dmfc_gen1 = readl(priv->base + DMFC_GENERAL1);
drivers/gpu/ipu-v3/ipu-dp.c
100
reg = readl(flow->base + DP_COM_CONF);
drivers/gpu/ipu-v3/ipu-dp.c
103
reg = readl(flow->base + DP_COM_CONF);
drivers/gpu/ipu-v3/ipu-dp.c
137
reg = readl(flow->base + DP_COM_CONF);
drivers/gpu/ipu-v3/ipu-dp.c
257
reg = readl(flow->base + DP_COM_CONF);
drivers/gpu/ipu-v3/ipu-dp.c
282
reg = readl(flow->base + DP_COM_CONF);
drivers/gpu/ipu-v3/ipu-dp.c
88
reg = readl(flow->base + DP_COM_CONF);
drivers/gpu/ipu-v3/ipu-dp.c
96
reg = readl(flow->base + DP_GRAPH_WIND_CTRL) & 0x00FFFFFFL;
drivers/gpu/ipu-v3/ipu-ic.c
166
return readl(ic->priv->base + offset);
drivers/gpu/ipu-v3/ipu-pre.c
184
val = readl(pre->regs + IPU_PRE_TPR_CTRL);
drivers/gpu/ipu-v3/ipu-pre.c
215
pre->cur.ctrl = readl(pre->regs + IPU_PRE_CTRL);
drivers/gpu/ipu-v3/ipu-pre.c
279
val = readl(pre->regs + IPU_PRE_STORE_ENG_STATUS);
drivers/gpu/ipu-v3/ipu-prg.c
258
val = readl(prg->regs + IPU_PRG_CTL);
drivers/gpu/ipu-v3/ipu-prg.c
317
val = readl(prg->regs + IPU_PRG_CTL);
drivers/gpu/ipu-v3/ipu-prg.c
403
val = readl(prg->regs + IPU_PRG_CTL);
drivers/gpu/ipu-v3/ipu-prv.h
205
return readl(ipu->idmac_reg + offset);
drivers/gpu/ipu-v3/ipu-smfc.c
45
val = readl(priv->base + SMFC_BS);
drivers/gpu/ipu-v3/ipu-smfc.c
65
val = readl(priv->base + SMFC_MAP);
drivers/gpu/ipu-v3/ipu-smfc.c
85
val = readl(priv->base + SMFC_WMC);
drivers/gpu/ipu-v3/ipu-vdi.c
47
return readl(vdi->base + offset);
drivers/hid/amd-sfh-hid/amd_sfh_pcie.c
104
if (readl(privdata->mmio + amd_get_p2c_val(privdata, 4))) {
drivers/hid/amd-sfh-hid/amd_sfh_pcie.c
142
return (readl(privdata->mmio + AMD_P2C_MSG(1)) &
drivers/hid/amd-sfh-hid/amd_sfh_pcie.c
282
privdata->mp2_acs = readl(privdata->mmio + AMD_P2C_MSG3);
drivers/hid/amd-sfh-hid/hid_descriptor/amd_sfh_hid_desc.c
256
readl(privdata->mmio + AMD_C2P_MSG(5)) & ILLUMINANCE_MASK;
drivers/hid/amd-sfh-hid/hid_descriptor/amd_sfh_hid_desc.c
272
hpdstatus.val = readl(privdata->mmio + AMD_C2P_MSG(4));
drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c
254
hpdstatus.val = readl(mp2->mmio + amd_get_c2p_val(mp2, 4));
drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c
385
u32 phy_base = readl(mp2->mmio + amd_get_c2p_val(mp2, 22));
drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c
100
mode.val = readl(emp2->mmio + amd_get_c2p_val(emp2, 3));
drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c
135
hpdstatus.val = readl(emp2->mmio + amd_get_c2p_val(emp2, 4));
drivers/hid/intel-ish-hid/ipc/ipc.c
35
return readl(hw->mem_addr + offset);
drivers/hsi/controllers/omap_ssi_core.c
172
val = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
drivers/hsi/controllers/omap_ssi_core.c
203
val |= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_core.c
227
status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
drivers/hsi/controllers/omap_ssi_core.c
233
status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
drivers/hsi/controllers/omap_ssi_core.c
47
seq_printf(m, "REVISION\t: 0x%08x\n", readl(sys + SSI_REVISION_REG));
drivers/hsi/controllers/omap_ssi_core.c
48
seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG));
drivers/hsi/controllers/omap_ssi_core.c
49
seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG));
drivers/hsi/controllers/omap_ssi_core.c
66
readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG));
drivers/hsi/controllers/omap_ssi_core.c
68
readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG));
drivers/hsi/controllers/omap_ssi_core.c
70
readl(gdd + SSI_GDD_HW_ID_REG));
drivers/hsi/controllers/omap_ssi_core.c
72
readl(gdd + SSI_GDD_PPORT_ID_REG));
drivers/hsi/controllers/omap_ssi_core.c
74
readl(gdd + SSI_GDD_MPORT_ID_REG));
drivers/hsi/controllers/omap_ssi_core.c
76
readl(gdd + SSI_GDD_TEST_REG));
drivers/hsi/controllers/omap_ssi_core.c
78
readl(gdd + SSI_GDD_GCR_REG));
drivers/hsi/controllers/omap_ssi_core.c
91
readl(gdd + SSI_GDD_CSSA_REG(lch)));
drivers/hsi/controllers/omap_ssi_core.c
93
readl(gdd + SSI_GDD_CDSA_REG(lch)));
drivers/hsi/controllers/omap_ssi_port.c
100
readl(base + SSI_SSR_CHANNELS_REG));
drivers/hsi/controllers/omap_ssi_port.c
102
readl(base + SSI_SSR_TIMEOUT_REG));
drivers/hsi/controllers/omap_ssi_port.c
104
readl(base + SSI_SSR_RXSTATE_REG));
drivers/hsi/controllers/omap_ssi_port.c
106
readl(base + SSI_SSR_BUFSTATE_REG));
drivers/hsi/controllers/omap_ssi_port.c
108
readl(base + SSI_SSR_BREAK_REG));
drivers/hsi/controllers/omap_ssi_port.c
110
readl(base + SSI_SSR_ERROR_REG));
drivers/hsi/controllers/omap_ssi_port.c
112
readl(base + SSI_SSR_ERRORACK_REG));
drivers/hsi/controllers/omap_ssi_port.c
115
readl(base + SSI_SSR_BUFFER_CH_REG(ch)));
drivers/hsi/controllers/omap_ssi_port.c
1269
omap_port->sys_mpu_enable = readl(omap_ssi->sys +
drivers/hsi/controllers/omap_ssi_port.c
130
*val = readl(omap_port->sst_base + SSI_SST_DIVISOR_REG);
drivers/hsi/controllers/omap_ssi_port.c
1309
mode = readl(omap_port->ssr_base + SSI_SSR_MODE_REG);
drivers/hsi/controllers/omap_ssi_port.c
270
tmp = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
drivers/hsi/controllers/omap_ssi_port.c
305
val |= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
356
tmp = readl(omap_ssi->sys +
drivers/hsi/controllers/omap_ssi_port.c
473
val = readl(ssr + SSI_SSR_MODE_REG);
drivers/hsi/controllers/omap_ssi_port.c
546
err = readl(ssr + SSI_SSR_ERROR_REG);
drivers/hsi/controllers/omap_ssi_port.c
60
readl(base + SSI_WAKE_REG(port->num)));
drivers/hsi/controllers/omap_ssi_port.c
62
readl(base + SSI_MPU_ENABLE_REG(port->num, 0)));
drivers/hsi/controllers/omap_ssi_port.c
64
readl(base + SSI_MPU_STATUS_REG(port->num, 0)));
drivers/hsi/controllers/omap_ssi_port.c
69
readl(base + SSI_SST_ID_REG));
drivers/hsi/controllers/omap_ssi_port.c
699
tmp = readl(omap_port->sst_base + SSI_SST_BUFSTATE_REG);
drivers/hsi/controllers/omap_ssi_port.c
703
tmp = readl(omap_port->ssr_base + SSI_SSR_BUFSTATE_REG);
drivers/hsi/controllers/omap_ssi_port.c
707
tmp = readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
71
readl(base + SSI_SST_MODE_REG));
drivers/hsi/controllers/omap_ssi_port.c
73
readl(base + SSI_SST_FRAMESIZE_REG));
drivers/hsi/controllers/omap_ssi_port.c
75
readl(base + SSI_SST_DIVISOR_REG));
drivers/hsi/controllers/omap_ssi_port.c
750
mode = readl(omap_port->ssr_base + SSI_SSR_MODE_REG);
drivers/hsi/controllers/omap_ssi_port.c
77
readl(base + SSI_SST_CHANNELS_REG));
drivers/hsi/controllers/omap_ssi_port.c
79
readl(base + SSI_SST_ARBMODE_REG));
drivers/hsi/controllers/omap_ssi_port.c
803
err = readl(omap_port->ssr_base + SSI_SSR_ERROR_REG);
drivers/hsi/controllers/omap_ssi_port.c
81
readl(base + SSI_SST_TXSTATE_REG));
drivers/hsi/controllers/omap_ssi_port.c
819
tmp = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
drivers/hsi/controllers/omap_ssi_port.c
825
tmp = readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
83
readl(base + SSI_SST_BUFSTATE_REG));
drivers/hsi/controllers/omap_ssi_port.c
85
readl(base + SSI_SST_BREAK_REG));
drivers/hsi/controllers/omap_ssi_port.c
861
val = readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
88
readl(base + SSI_SST_BUFFER_CH_REG(ch)));
drivers/hsi/controllers/omap_ssi_port.c
905
*buf = readl(omap_port->ssr_base +
drivers/hsi/controllers/omap_ssi_port.c
928
reg = readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
94
readl(base + SSI_SSR_ID_REG));
drivers/hsi/controllers/omap_ssi_port.c
955
status_reg = readl(sys + SSI_MPU_STATUS_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
956
status_reg &= readl(sys + SSI_MPU_ENABLE_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
96
readl(base + SSI_SSR_MODE_REG));
drivers/hsi/controllers/omap_ssi_port.c
969
status_reg = readl(sys + SSI_MPU_STATUS_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
970
status_reg &= readl(sys + SSI_MPU_ENABLE_REG(port->num, 0));
drivers/hsi/controllers/omap_ssi_port.c
98
readl(base + SSI_SSR_FRAMESIZE_REG));
drivers/hte/hte-tegra194.c
354
return readl(hte->regs + reg);
drivers/hwmon/aspeed-g6-pwm-tach.c
158
val = readl(priv->base + PWM_ASPEED_CTRL(hwpwm));
drivers/hwmon/aspeed-g6-pwm-tach.c
164
val = readl(priv->base + PWM_ASPEED_DUTY_CYCLE(hwpwm));
drivers/hwmon/aspeed-g6-pwm-tach.c
233
val = readl(priv->base + PWM_ASPEED_DUTY_CYCLE(hwpwm));
drivers/hwmon/aspeed-g6-pwm-tach.c
246
val = readl(priv->base + PWM_ASPEED_DUTY_CYCLE(hwpwm));
drivers/hwmon/aspeed-g6-pwm-tach.c
253
val = readl(priv->base + PWM_ASPEED_CTRL(hwpwm));
drivers/hwmon/aspeed-g6-pwm-tach.c
276
writel(readl(priv->base + TACH_ASPEED_CTRL(tach_ch)) |
drivers/hwmon/aspeed-g6-pwm-tach.c
280
writel(readl(priv->base + TACH_ASPEED_CTRL(tach_ch)) &
drivers/hwmon/aspeed-g6-pwm-tach.c
306
val = readl(priv->base + TACH_ASPEED_STS(fan_tach_ch));
drivers/hwmon/aspeed-g6-pwm-tach.c
326
reg_val = readl(priv->base + TACH_ASPEED_CTRL(channel));
drivers/hwmon/aspeed-g6-pwm-tach.c
349
reg_val = readl(priv->base + TACH_ASPEED_CTRL(channel));
drivers/hwmon/aspeed-g6-pwm-tach.c
412
val = readl(priv->base + TACH_ASPEED_CTRL(ch));
drivers/hwmon/aspeed-pwm-tacho.c
363
*val = readl(regs + reg);
drivers/hwmon/bt1-pvt.c
216
thres_sts = readl(pvt->regs + PVT_RAW_INTR_STAT);
drivers/hwmon/bt1-pvt.c
242
val = readl(pvt->regs + PVT_DATA);
drivers/hwmon/bt1-pvt.c
316
data = readl(pvt->regs + pvt_info[type].thres_base);
drivers/hwmon/bt1-pvt.c
351
limit = readl(pvt->regs + pvt_info[type].thres_base);
drivers/hwmon/bt1-pvt.c
425
val = readl(pvt->regs + PVT_DATA);
drivers/hwmon/bt1-pvt.c
616
data = readl(pvt->regs + PVT_CTRL);
drivers/hwmon/bt1-pvt.c
956
readl(pvt->regs + PVT_DATA);
drivers/hwmon/bt1-pvt.c
961
data = readl(pvt->regs + PVT_DATA);
drivers/hwmon/bt1-pvt.c
990
readl(pvt->regs + PVT_CLR_INTR);
drivers/hwmon/bt1-pvt.c
991
readl(pvt->regs + PVT_DATA);
drivers/hwmon/gxp-fan-ctrl.c
109
reg = readl(drvdata->fn2 + OFS_SEVSTAT);
drivers/hwmon/gxp-fan-ctrl.c
53
val = readl(drvdata->fn2 + OFS_SEVSTAT);
drivers/hwmon/sfctemp.c
151
*val = (long)((readl(sfctemp->regs) & SFCTEMP_DOUT_MSK) >> SFCTEMP_DOUT_POS)
drivers/hwmon/sparx5-temp.c
31
u32 val = readl(hwmon->base + TEMP_CFG);
drivers/hwspinlock/omap_hwspinlock.c
43
return (SPINLOCK_NOTTAKEN == readl(lock_addr));
drivers/hwspinlock/omap_hwspinlock.c
99
i = readl(io_base + SYSSTATUS_OFFSET);
drivers/hwspinlock/sprd_hwspinlock.c
47
if (!readl(addr))
drivers/hwspinlock/sprd_hwspinlock.c
52
user_id = readl(sprd_hwlock->base + HWSPINLOCK_MASTERID(lock_id));
drivers/hwspinlock/stm32_hwspinlock.c
34
status = readl(lock_addr);
drivers/hwspinlock/sun6i_hwspinlock.c
146
num_banks = readl(io_base + SPINLOCK_SYSSTATUS_REG) >> 28;
drivers/hwspinlock/sun6i_hwspinlock.c
67
return (readl(lock_addr) == SPINLOCK_NOTTAKEN);
drivers/hwspinlock/u8500_hsem.c
102
val = readl(io_base + HSEM_CTRL_REG);
drivers/hwspinlock/u8500_hsem.c
60
return (HSEM_MASTER_ID == (0x0F & readl(lock_addr)));
drivers/hwtracing/coresight/coresight-etm4x-core.c
1260
u32 devtype = readl(base + TRCDEVTYPE);
drivers/hwtracing/coresight/coresight-tmc-etf.c
624
val = readl(drvdata->base + TMC_CTL);
drivers/hwtracing/coresight/coresight-tmc-etf.c
627
val = readl(drvdata->base + TMC_MODE);
drivers/hwtracing/coresight/coresight-tmc-etf.c
631
val = readl(drvdata->base + TMC_FFSR);
drivers/hwtracing/coresight/coresight-tmc-etf.c
641
mdata->tmc_sts = readl(drvdata->base + TMC_STS);
drivers/hwtracing/coresight/coresight-tmc-etf.c
642
mdata->tmc_mode = readl(drvdata->base + TMC_MODE);
drivers/hwtracing/coresight/coresight-tmc-etf.c
643
mdata->tmc_ffcr = readl(drvdata->base + TMC_FFCR);
drivers/hwtracing/coresight/coresight-tmc-etf.c
644
mdata->tmc_ffsr = readl(drvdata->base + TMC_FFSR);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1857
val = readl(drvdata->base + TMC_CTL);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1861
val = readl(drvdata->base + TMC_FFSR);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1871
mdata->tmc_ram_size = readl(drvdata->base + TMC_RSZ);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1872
mdata->tmc_sts = readl(drvdata->base + TMC_STS);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1873
mdata->tmc_mode = readl(drvdata->base + TMC_MODE);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1874
mdata->tmc_ffcr = readl(drvdata->base + TMC_FFCR);
drivers/hwtracing/coresight/coresight-tmc-etr.c
1875
mdata->tmc_ffsr = readl(drvdata->base + TMC_FFSR);
drivers/hwtracing/coresight/ultrasoc-smb.c
26
u32 buf_status = readl(drvdata->base + SMB_LB_INT_STS_REG);
drivers/hwtracing/coresight/ultrasoc-smb.c
36
buf_wrptr = readl(drvdata->base + SMB_LB_WR_ADDR_REG) -
drivers/hwtracing/coresight/ultrasoc-smb.c
82
write_ptr = readl(drvdata->base + SMB_LB_WR_ADDR_REG);
drivers/hwtracing/ptt/hisi_ptt.c
1238
reg = readl(hisi_ptt->iobase + HISI_PTT_LOCATION);
drivers/hwtracing/ptt/hisi_ptt.c
208
val = readl(hisi_ptt->iobase + HISI_PTT_TRACE_CTRL);
drivers/hwtracing/ptt/hisi_ptt.c
214
val = readl(hisi_ptt->iobase + HISI_PTT_TRACE_CTRL);
drivers/hwtracing/ptt/hisi_ptt.c
267
reg = readl(hisi_ptt->iobase + HISI_PTT_TRACE_WR_STS);
drivers/hwtracing/ptt/hisi_ptt.c
304
status = readl(hisi_ptt->iobase + HISI_PTT_TRACE_INT_STAT);
drivers/hwtracing/ptt/hisi_ptt.c
52
reg = readl(hisi_ptt->iobase + HISI_PTT_TUNING_CTRL);
drivers/hwtracing/ptt/hisi_ptt.c
66
reg = readl(hisi_ptt->iobase + HISI_PTT_TUNING_DATA);
drivers/hwtracing/ptt/hisi_ptt.c
761
reg = readl(hisi_ptt->iobase + HISI_PTT_DEVICE_RANGE);
drivers/hwtracing/ptt/hisi_ptt.c
92
reg = readl(hisi_ptt->iobase + HISI_PTT_TUNING_CTRL);
drivers/i2c/busses/i2c-altera.c
107
u32 int_en = readl(idev->base + ALTR_I2C_ISR);
drivers/i2c/busses/i2c-altera.c
114
u32 tmp = readl(idev->base + ALTR_I2C_CTRL);
drivers/i2c/busses/i2c-altera.c
121
u32 tmp = readl(idev->base + ALTR_I2C_CTRL);
drivers/i2c/busses/i2c-altera.c
194
size_t rx_fifo_avail = readl(idev->base + ALTR_I2C_RX_FIFO_LVL);
drivers/i2c/busses/i2c-altera.c
198
*idev->buf++ = readl(idev->base + ALTR_I2C_RX_DATA);
drivers/i2c/busses/i2c-altera.c
209
size_t tx_fifo_avail = idev->fifo_size - readl(idev->base +
drivers/i2c/busses/i2c-altera.c
228
idev->isr_status = readl(idev->base + ALTR_I2C_ISR) & idev->isr_mask;
drivers/i2c/busses/i2c-altera.c
322
readl(idev->base + ALTR_I2C_RX_DATA);
drivers/i2c/busses/i2c-altera.c
323
} while (readl(idev->base + ALTR_I2C_RX_FIFO_LVL));
drivers/i2c/busses/i2c-altera.c
344
value = readl(idev->base + ALTR_I2C_STATUS) & ALTR_I2C_STAT_CORE;
drivers/i2c/busses/i2c-altera.c
96
int_en = readl(idev->base + ALTR_I2C_ISER);
drivers/i2c/busses/i2c-amd-mp2-pci.c
218
val = readl(reg);
drivers/i2c/busses/i2c-amd-mp2-pci.c
230
val = readl(privdata->mmio + AMD_P2C_MSG_INTEN);
drivers/i2c/busses/i2c-aspeed.c
187
command = readl(bus->base + ASPEED_I2C_CMD_REG);
drivers/i2c/busses/i2c-aspeed.c
209
else if (!(readl(bus->base + ASPEED_I2C_CMD_REG) &
drivers/i2c/busses/i2c-aspeed.c
232
else if (!(readl(bus->base + ASPEED_I2C_CMD_REG) &
drivers/i2c/busses/i2c-aspeed.c
298
command = readl(bus->base + ASPEED_I2C_CMD_REG);
drivers/i2c/busses/i2c-aspeed.c
304
value = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8;
drivers/i2c/busses/i2c-aspeed.c
487
writel(readl(bus->base + ASPEED_I2C_CMD_REG) &
drivers/i2c/busses/i2c-aspeed.c
554
recv_byte = readl(bus->base + ASPEED_I2C_BYTE_BUF_REG) >> 8;
drivers/i2c/busses/i2c-aspeed.c
625
irq_received = readl(bus->base + ASPEED_I2C_INTR_STS_REG);
drivers/i2c/busses/i2c-aspeed.c
629
readl(bus->base + ASPEED_I2C_INTR_STS_REG);
drivers/i2c/busses/i2c-aspeed.c
676
readl(bus->base + ASPEED_I2C_INTR_STS_REG);
drivers/i2c/busses/i2c-aspeed.c
693
(readl(bus->base + ASPEED_I2C_CMD_REG) &
drivers/i2c/busses/i2c-aspeed.c
723
(readl(bus->base + ASPEED_I2C_CMD_REG) &
drivers/i2c/busses/i2c-aspeed.c
766
func_ctrl_reg_val = readl(bus->base + ASPEED_I2C_FUN_CTRL_REG);
drivers/i2c/busses/i2c-aspeed.c
805
func_ctrl_reg_val = readl(bus->base + ASPEED_I2C_FUN_CTRL_REG);
drivers/i2c/busses/i2c-aspeed.c
916
clk_reg_val = readl(bus->base + ASPEED_I2C_AC_TIMING_REG1);
drivers/i2c/busses/i2c-aspeed.c
947
writel(readl(bus->base + ASPEED_I2C_FUN_CTRL_REG) | fun_ctrl_reg,
drivers/i2c/busses/i2c-axxia.c
158
int_en = readl(idev->base + MST_INT_ENABLE);
drivers/i2c/busses/i2c-axxia.c
166
int_en = readl(idev->base + MST_INT_ENABLE);
drivers/i2c/busses/i2c-axxia.c
194
while (readl(idev->base + SOFT_RESET) & 1) {
drivers/i2c/busses/i2c-axxia.c
270
size_t rx_fifo_avail = readl(idev->base + MST_RX_FIFO);
drivers/i2c/busses/i2c-axxia.c
274
int c = readl(idev->base + MST_DATA);
drivers/i2c/busses/i2c-axxia.c
302
size_t tx_fifo_avail = FIFO_SIZE - readl(idev->base + MST_TX_FIFO);
drivers/i2c/busses/i2c-axxia.c
314
u32 fifo_status = readl(idev->base + SLV_RX_FIFO);
drivers/i2c/busses/i2c-axxia.c
324
val = readl(idev->base + SLV_DATA);
drivers/i2c/busses/i2c-axxia.c
328
readl(idev->base + SLV_DATA); /* dummy read */
drivers/i2c/busses/i2c-axxia.c
332
readl(idev->base + SLV_DATA); /* dummy read */
drivers/i2c/busses/i2c-axxia.c
337
u32 status = readl(idev->base + SLV_INT_STATUS);
drivers/i2c/busses/i2c-axxia.c
365
status = readl(idev->base + INTERRUPT_STATUS);
drivers/i2c/busses/i2c-axxia.c
373
status = readl(idev->base + MST_INT_STATUS);
drivers/i2c/busses/i2c-axxia.c
402
readl(idev->base + MST_RX_BYTES_XFRD),
drivers/i2c/busses/i2c-axxia.c
403
readl(idev->base + MST_RX_XFER),
drivers/i2c/busses/i2c-axxia.c
404
readl(idev->base + MST_TX_BYTES_XFRD),
drivers/i2c/busses/i2c-axxia.c
405
readl(idev->base + MST_TX_XFER));
drivers/i2c/busses/i2c-axxia.c
458
if ((readl(idev->base + MST_COMMAND) & CMD_BUSY) == 0)
drivers/i2c/busses/i2c-axxia.c
495
} else if (readl(idev->base + MST_COMMAND) & CMD_BUSY) {
drivers/i2c/busses/i2c-axxia.c
546
wt_value = WT_VALUE(readl(idev->base + WAIT_TIMER_CONTROL));
drivers/i2c/busses/i2c-axxia.c
570
if (readl(idev->base + MST_COMMAND) & CMD_BUSY)
drivers/i2c/busses/i2c-axxia.c
625
return !!(readl(idev->base + I2C_BUS_MONITOR) & BM_SCLS);
drivers/i2c/busses/i2c-axxia.c
634
tmp = readl(idev->base + I2C_BUS_MONITOR) & BM_SDAC;
drivers/i2c/busses/i2c-axxia.c
644
return !!(readl(idev->base + I2C_BUS_MONITOR) & BM_SDAS);
drivers/i2c/busses/i2c-bcm-iproc.c
237
val = readl(iproc_i2c->base + offset);
drivers/i2c/busses/i2c-bcm-iproc.c
240
val = readl(iproc_i2c->base + offset);
drivers/i2c/busses/i2c-bcm-kona.c
198
writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK,
drivers/i2c/busses/i2c-bcm-kona.c
204
writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK,
drivers/i2c/busses/i2c-bcm-kona.c
211
uint32_t status = readl(dev->base + ISR_OFFSET);
drivers/i2c/busses/i2c-bcm-kona.c
232
while (readl(dev->base + ISR_OFFSET) & ISR_CMDBUSY_MASK)
drivers/i2c/busses/i2c-bcm-kona.c
310
*buf = readl(dev->base + RXFIFORDOUT_OFFSET);
drivers/i2c/busses/i2c-bcm-kona.c
380
nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0;
drivers/i2c/busses/i2c-bcm-kona.c
418
fifo_status = readl(dev->base + FIFO_STATUS_OFFSET);
drivers/i2c/busses/i2c-bcm-kona.c
425
if (readl(dev->base + CS_OFFSET) & CS_ACK_MASK) {
drivers/i2c/busses/i2c-bcm-kona.c
505
writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK,
drivers/i2c/busses/i2c-bcm-kona.c
511
writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK,
drivers/i2c/busses/i2c-bcm-kona.c
539
writel(readl(dev->base + HSTIM_OFFSET) | HSTIM_HS_MODE_MASK,
drivers/i2c/busses/i2c-bcm2835.c
81
return readl(i2c_dev->regs + reg);
drivers/i2c/busses/i2c-designware-common.c
164
reg = readl(dev->base + DW_IC_COMP_TYPE);
drivers/i2c/busses/i2c-designware-common.c
77
*val = readl(dev->base + reg);
drivers/i2c/busses/i2c-designware-common.c
95
*val = swab32(readl(dev->base + reg));
drivers/i2c/busses/i2c-exynos5.c
274
writel(readl(i2c->regs + HSI2C_INT_STATUS),
drivers/i2c/busses/i2c-exynos5.c
371
t_ftl_cycle = (readl(i2c->regs + HSI2C_CONF) >> 16) & 0x7;
drivers/i2c/busses/i2c-exynos5.c
455
u32 i2c_conf = readl(i2c->regs + HSI2C_CONF);
drivers/i2c/busses/i2c-exynos5.c
456
u32 i2c_timeout = readl(i2c->regs + HSI2C_TIMEOUT);
drivers/i2c/busses/i2c-exynos5.c
480
i2c_ctl = readl(i2c->regs + HSI2C_CTL);
drivers/i2c/busses/i2c-exynos5.c
484
i2c_ctl = readl(i2c->regs + HSI2C_CTL);
drivers/i2c/busses/i2c-exynos5.c
512
int_status = readl(i2c->regs + HSI2C_INT_STATUS);
drivers/i2c/busses/i2c-exynos5.c
548
trans_status = readl(i2c->regs + HSI2C_TRANS_STATUS);
drivers/i2c/busses/i2c-exynos5.c
575
fifo_status = readl(i2c->regs + HSI2C_FIFO_STATUS);
drivers/i2c/busses/i2c-exynos5.c
581
readl(i2c->regs + HSI2C_RX_DATA);
drivers/i2c/busses/i2c-exynos5.c
587
fifo_status = readl(i2c->regs + HSI2C_FIFO_STATUS);
drivers/i2c/busses/i2c-exynos5.c
592
u32 int_en = readl(i2c->regs + HSI2C_INT_ENABLE);
drivers/i2c/busses/i2c-exynos5.c
636
trans_status = readl(i2c->regs + HSI2C_TRANS_STATUS);
drivers/i2c/busses/i2c-exynos5.c
650
val = readl(i2c->regs + HSI2C_CTL) | HSI2C_RXCHON;
drivers/i2c/busses/i2c-exynos5.c
652
val = readl(i2c->regs + HSI2C_CONF) & ~HSI2C_AUTO_MODE;
drivers/i2c/busses/i2c-exynos5.c
665
val = readl(i2c->regs + HSI2C_CTL) & ~HSI2C_RXCHON;
drivers/i2c/busses/i2c-exynos5.c
667
val = readl(i2c->regs + HSI2C_CONF) | HSI2C_AUTO_MODE;
drivers/i2c/busses/i2c-exynos5.c
685
u32 st = readl(i2c->regs + HSI2C_TRANS_STATUS);
drivers/i2c/busses/i2c-exynos5.c
722
i2c_ctl = readl(i2c->regs + HSI2C_CTL);
drivers/i2c/busses/i2c-exynos5.c
782
while (readl(i2c->regs + HSI2C_INT_ENABLE) &
drivers/i2c/busses/i2c-exynos5.c
783
readl(i2c->regs + HSI2C_INT_STATUS))
drivers/i2c/busses/i2c-hisi.c
139
reg = readl(ctlr->iobase + HISI_I2C_FIFO_STATE);
drivers/i2c/busses/i2c-hisi.c
160
reg = readl(ctlr->iobase + HISI_I2C_FRAME_CTRL);
drivers/i2c/busses/i2c-hisi.c
166
reg = readl(ctlr->iobase + HISI_I2C_SLV_ADDR);
drivers/i2c/busses/i2c-hisi.c
171
reg = readl(ctlr->iobase + HISI_I2C_FIFO_CTRL);
drivers/i2c/busses/i2c-hisi.c
256
fifo_state = readl(ctlr->iobase + HISI_I2C_FIFO_STATE);
drivers/i2c/busses/i2c-hisi.c
259
cur_msg->buf[ctlr->buf_rx_idx++] = readl(ctlr->iobase + HISI_I2C_RXDATA);
drivers/i2c/busses/i2c-hisi.c
260
fifo_state = readl(ctlr->iobase + HISI_I2C_FIFO_STATE);
drivers/i2c/busses/i2c-hisi.c
290
fifo_state = readl(ctlr->iobase + HISI_I2C_FIFO_STATE);
drivers/i2c/busses/i2c-hisi.c
314
fifo_state = readl(ctlr->iobase + HISI_I2C_FIFO_STATE);
drivers/i2c/busses/i2c-hisi.c
351
int_stat = readl(ctlr->iobase + HISI_I2C_INT_MSTAT);
drivers/i2c/busses/i2c-hisi.c
441
reg = readl(ctlr->iobase + HISI_I2C_FRAME_CTRL);
drivers/i2c/busses/i2c-hisi.c
512
hw_version = readl(ctlr->iobase + HISI_I2C_VERSION);
drivers/i2c/busses/i2c-hydra.c
41
return readl(&hydra->CachePD);
drivers/i2c/busses/i2c-img-scb.c
421
return readl(i2c->base + offset);
drivers/i2c/busses/i2c-imx-lpi2c.c
1077
if ((readl(lpi2c_imx->base + LPI2C_MSR) & MSR_NDF) && !ret) {
drivers/i2c/busses/i2c-imx-lpi2c.c
1161
temp = readl(lpi2c_imx->base + LPI2C_MSR);
drivers/i2c/busses/i2c-imx-lpi2c.c
1199
sasr = readl(lpi2c_imx->base + LPI2C_SASR);
drivers/i2c/busses/i2c-imx-lpi2c.c
1223
value = readl(lpi2c_imx->base + LPI2C_SRDR);
drivers/i2c/busses/i2c-imx-lpi2c.c
1238
enabled = readl(lpi2c_imx->base + LPI2C_MIER);
drivers/i2c/busses/i2c-imx-lpi2c.c
1241
temp = readl(lpi2c_imx->base + LPI2C_MSR);
drivers/i2c/busses/i2c-imx-lpi2c.c
1259
u32 scr = readl(lpi2c_imx->base + LPI2C_SCR);
drivers/i2c/busses/i2c-imx-lpi2c.c
1260
u32 ssr = readl(lpi2c_imx->base + LPI2C_SSR);
drivers/i2c/busses/i2c-imx-lpi2c.c
1261
u32 sier_filter = ssr & readl(lpi2c_imx->base + LPI2C_SIER);
drivers/i2c/busses/i2c-imx-lpi2c.c
1538
temp = readl(lpi2c_imx->base + LPI2C_PARAM);
drivers/i2c/busses/i2c-imx-lpi2c.c
253
return readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
drivers/i2c/busses/i2c-imx-lpi2c.c
280
temp = readl(lpi2c_imx->base + LPI2C_MCR);
drivers/i2c/busses/i2c-imx-lpi2c.c
382
temp = readl(lpi2c_imx->base + LPI2C_MCR);
drivers/i2c/busses/i2c-imx-lpi2c.c
398
temp = readl(lpi2c_imx->base + LPI2C_MCR);
drivers/i2c/busses/i2c-imx-lpi2c.c
462
txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
drivers/i2c/busses/i2c-imx-lpi2c.c
491
data = readl(lpi2c_imx->base + LPI2C_MRDR);
drivers/i2c/busses/i2c-imx-lpi2c.c
552
data = readl(lpi2c_imx->base + LPI2C_MRDR);
drivers/i2c/busses/i2c-imx-lpi2c.c
625
rxcnt = (readl(lpi2c_imx->base + LPI2C_MFSR) >> 16) & 0xFF;
drivers/i2c/busses/i2c-imx-lpi2c.c
646
temp = readl(lpi2c_imx->base + LPI2C_MSR);
drivers/i2c/busses/i2c-ismt.c
244
readl(priv->smba + ISMT_GR_GCTRL));
drivers/i2c/busses/i2c-ismt.c
250
readl(priv->smba + ISMT_GR_ERRINTMSK));
drivers/i2c/busses/i2c-ismt.c
253
readl(priv->smba + ISMT_GR_ERRAERMSK));
drivers/i2c/busses/i2c-ismt.c
256
readl(priv->smba + ISMT_GR_ERRSTS));
drivers/i2c/busses/i2c-ismt.c
259
readl(priv->smba + ISMT_GR_ERRINFO));
drivers/i2c/busses/i2c-ismt.c
276
readl(priv->smba + ISMT_MSTR_MCTRL));
drivers/i2c/busses/i2c-ismt.c
279
readl(priv->smba + ISMT_MSTR_MSTS));
drivers/i2c/busses/i2c-ismt.c
282
readl(priv->smba + ISMT_MSTR_MDS));
drivers/i2c/busses/i2c-ismt.c
285
readl(priv->smba + ISMT_MSTR_RPOLICY));
drivers/i2c/busses/i2c-ismt.c
288
readl(priv->smba + ISMT_SPGT));
drivers/i2c/busses/i2c-ismt.c
306
val = readl(priv->smba + ISMT_MSTR_MCTRL);
drivers/i2c/busses/i2c-ismt.c
311
val = readl(priv->smba + ISMT_MSTR_MCTRL);
drivers/i2c/busses/i2c-ismt.c
699
val = readl(priv->smba + ISMT_MSTR_MSTS);
drivers/i2c/busses/i2c-ismt.c
741
val = readl(priv->smba + ISMT_MSTR_MDS);
drivers/i2c/busses/i2c-ismt.c
749
val = readl(priv->smba + ISMT_SPGT);
drivers/i2c/busses/i2c-ismt.c
784
val = readl(priv->smba + ISMT_SPGT);
drivers/i2c/busses/i2c-k1.c
137
val = readl(i2c->base + SPACEMIT_ICR);
drivers/i2c/busses/i2c-k1.c
146
val = readl(i2c->base + SPACEMIT_ICR);
drivers/i2c/busses/i2c-k1.c
181
status = readl(i2c->base + SPACEMIT_IBMR);
drivers/i2c/busses/i2c-k1.c
189
status = readl(i2c->base + SPACEMIT_IBMR);
drivers/i2c/busses/i2c-k1.c
201
status = readl(i2c->base + SPACEMIT_IBMR);
drivers/i2c/busses/i2c-k1.c
211
val = readl(i2c->base + SPACEMIT_ISR);
drivers/i2c/busses/i2c-k1.c
227
if (readl(i2c->base + SPACEMIT_ISR) & SPACEMIT_SR_EBB) {
drivers/i2c/busses/i2c-k1.c
279
val = readl(i2c->base + SPACEMIT_IRCR);
drivers/i2c/busses/i2c-k1.c
302
val = readl(i2c->base + SPACEMIT_ICR);
drivers/i2c/busses/i2c-k1.c
370
*i2c->msg_buf++ = readl(i2c->base + SPACEMIT_IDBR);
drivers/i2c/busses/i2c-k1.c
412
val = readl(i2c->base + SPACEMIT_ICR);
drivers/i2c/busses/i2c-k1.c
427
status = readl(i2c->base + SPACEMIT_ISR);
drivers/i2c/busses/i2c-k1.c
438
val = readl(i2c->base + SPACEMIT_ICR);
drivers/i2c/busses/i2c-lpc2k.c
102
while (readl(i2c->base + LPC24XX_I2STAT) != M_I2C_IDLE) {
drivers/i2c/busses/i2c-lpc2k.c
124
status = readl(i2c->base + LPC24XX_I2STAT);
drivers/i2c/busses/i2c-lpc2k.c
182
readl(i2c->base + LPC24XX_I2DAT);
drivers/i2c/busses/i2c-lpc2k.c
300
stat = readl(i2c->base + LPC24XX_I2STAT);
drivers/i2c/busses/i2c-lpc2k.c
326
if (readl(i2c->base + LPC24XX_I2CONSET) & LPC24XX_SI) {
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
1088
regval = readl(p);
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
1110
regval = readl(p2);
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
340
data = readl(p);
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
352
data = readl(p);
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
357
data = readl(p);
drivers/i2c/busses/i2c-mchp-pci1xxxx.c
721
regval = readl(p1);
drivers/i2c/busses/i2c-meson.c
116
data = readl(i2c->regs + reg);
drivers/i2c/busses/i2c-meson.c
220
rdata0 = readl(i2c->regs + REG_TOK_RDATA0);
drivers/i2c/busses/i2c-meson.c
221
rdata1 = readl(i2c->regs + REG_TOK_RDATA1);
drivers/i2c/busses/i2c-meson.c
311
ctrl = readl(i2c->regs + REG_CTRL);
drivers/i2c/busses/i2c-mlxbf.c
1416
config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0);
drivers/i2c/busses/i2c-mlxbf.c
1421
config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN);
drivers/i2c/busses/i2c-mlxbf.c
1438
corepll_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG1);
drivers/i2c/busses/i2c-mlxbf.c
1467
corepll_reg1_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG1);
drivers/i2c/busses/i2c-mlxbf.c
1468
corepll_reg2_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG2);
drivers/i2c/busses/i2c-mlxbf.c
1554
slave_reg = readl(priv->slv->io +
drivers/i2c/busses/i2c-mlxbf.c
1611
slave_reg = readl(priv->slv->io +
drivers/i2c/busses/i2c-mlxbf.c
1777
coalesce0_reg = readl(priv->coalesce->io + MLXBF_I2C_CAUSE_COALESCE_0);
drivers/i2c/busses/i2c-mlxbf.c
1784
cause_reg = readl(priv->slv_cause->io + MLXBF_I2C_CAUSE_ARBITER);
drivers/i2c/busses/i2c-mlxbf.c
1997
rw_bytes_reg = readl(priv->slv->io +
drivers/i2c/busses/i2c-mlxbf.c
538
cause_status_bits = readl(priv->mst_cause->io +
drivers/i2c/busses/i2c-mlxbf.c
546
master_status_bits = readl(priv->mst->io +
drivers/i2c/busses/i2c-mt65xx.c
979
readl(i2c->pdmabase + OFFSET_INT_FLAG),
drivers/i2c/busses/i2c-mt65xx.c
980
readl(i2c->pdmabase + OFFSET_INT_EN));
drivers/i2c/busses/i2c-mt65xx.c
982
readl(i2c->pdmabase + OFFSET_EN),
drivers/i2c/busses/i2c-mt65xx.c
983
readl(i2c->pdmabase + OFFSET_CON));
drivers/i2c/busses/i2c-mt65xx.c
985
readl(i2c->pdmabase + OFFSET_TX_MEM_ADDR),
drivers/i2c/busses/i2c-mt65xx.c
986
readl(i2c->pdmabase + OFFSET_RX_MEM_ADDR));
drivers/i2c/busses/i2c-mt65xx.c
988
readl(i2c->pdmabase + OFFSET_TX_LEN),
drivers/i2c/busses/i2c-mt65xx.c
989
readl(i2c->pdmabase + OFFSET_RX_LEN));
drivers/i2c/busses/i2c-mt65xx.c
991
readl(i2c->pdmabase + OFFSET_TX_4G_MODE),
drivers/i2c/busses/i2c-mt65xx.c
992
readl(i2c->pdmabase + OFFSET_RX_4G_MODE));
drivers/i2c/busses/i2c-mv64xxx.c
401
readl(drv_data->reg_base + drv_data->reg_offsets.data);
drivers/i2c/busses/i2c-mv64xxx.c
408
readl(drv_data->reg_base + drv_data->reg_offsets.data);
drivers/i2c/busses/i2c-mv64xxx.c
444
buf[0] = readl(drv_data->reg_base + MV64XXX_I2C_REG_RX_DATA_LO);
drivers/i2c/busses/i2c-mv64xxx.c
445
buf[1] = readl(drv_data->reg_base + MV64XXX_I2C_REG_RX_DATA_HI);
drivers/i2c/busses/i2c-mv64xxx.c
455
cause = readl(drv_data->reg_base +
drivers/i2c/busses/i2c-mv64xxx.c
460
status = readl(drv_data->reg_base +
drivers/i2c/busses/i2c-mv64xxx.c
514
while (readl(drv_data->reg_base + drv_data->reg_offsets.control) &
drivers/i2c/busses/i2c-mv64xxx.c
527
status = readl(drv_data->reg_base + drv_data->reg_offsets.status);
drivers/i2c/busses/i2c-mxs.c
307
while (readl(i2c->regs + MXS_I2C_CTRL0) & MXS_I2C_CTRL0_RUN) {
drivers/i2c/busses/i2c-mxs.c
308
if (readl(i2c->regs + MXS_I2C_CTRL1) &
drivers/i2c/busses/i2c-mxs.c
323
state = readl(i2c->regs + MXS_I2C_CTRL1_CLR) & MXS_I2C_IRQ_MASK;
drivers/i2c/busses/i2c-mxs.c
343
reg = readl(i2c->regs + MXS_I2C_CTRL0);
drivers/i2c/busses/i2c-mxs.c
435
data = readl(i2c->regs + MXS_I2C_DATA(i2c));
drivers/i2c/busses/i2c-mxs.c
532
ret = readl(i2c->regs + MXS_I2C_STAT) &
drivers/i2c/busses/i2c-mxs.c
671
u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
drivers/i2c/busses/i2c-nomadik.c
231
writel(readl(reg) | mask, reg);
drivers/i2c/busses/i2c-nomadik.c
236
writel(readl(reg) & ~mask, reg);
drivers/i2c/busses/i2c-nomadik.c
243
return readl(priv->virtbase + reg);
drivers/i2c/busses/i2c-nomadik.c
283
if ((readl(priv->virtbase + I2C_CR) &
drivers/i2c/busses/i2c-nomadik.c
515
writel(readl(priv->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
drivers/i2c/busses/i2c-nomadik.c
535
writel(readl(priv->virtbase + I2C_IMSCR) | irq_mask,
drivers/i2c/busses/i2c-nomadik.c
581
writel(readl(priv->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR,
drivers/i2c/busses/i2c-nomadik.c
611
writel(readl(priv->virtbase + I2C_IMSCR) | irq_mask,
drivers/i2c/busses/i2c-nomadik.c
649
i2c_sr = readl(priv->virtbase + I2C_SR);
drivers/i2c/busses/i2c-nomadik.c
760
writel(readl(priv->virtbase + I2C_IMSCR) & ~irq,
drivers/i2c/busses/i2c-nomadik.c
785
tft = readl(priv->virtbase + I2C_TFTR);
drivers/i2c/busses/i2c-nomadik.c
786
rft = readl(priv->virtbase + I2C_RFTR);
drivers/i2c/busses/i2c-nomadik.c
789
misr = readl(priv->virtbase + I2C_MISR);
drivers/i2c/busses/i2c-nomadik.c
845
while (!(readl(priv->virtbase + I2C_RISR)
drivers/i2c/busses/i2c-nomadik.c
893
sr = readl(priv->virtbase + I2C_SR);
drivers/i2c/busses/i2c-nvidia-gpu.c
122
val = readl(i2cd->regs + I2C_MST_DATA);
drivers/i2c/busses/i2c-nvidia-gpu.c
66
val = readl(i2cd->regs + I2C_MST_HYBRID_PADCTL);
drivers/i2c/busses/i2c-nvidia-gpu.c
95
val = readl(i2cd->regs + I2C_MST_CNTL);
drivers/i2c/busses/i2c-owl.c
111
regval = readl(reg);
drivers/i2c/busses/i2c-owl.c
144
val = readl(i2c_dev->base + OWL_I2C_REG_FIFOCTL);
drivers/i2c/busses/i2c-owl.c
176
fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT);
drivers/i2c/busses/i2c-owl.c
186
stat = readl(i2c_dev->base + OWL_I2C_REG_STAT);
drivers/i2c/busses/i2c-owl.c
197
while ((readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
drivers/i2c/busses/i2c-owl.c
199
msg->buf[i2c_dev->msg_ptr++] = readl(i2c_dev->base +
drivers/i2c/busses/i2c-owl.c
204
while (!(readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
drivers/i2c/busses/i2c-owl.c
242
while (readl(i2c_dev->base + OWL_I2C_REG_STAT) & OWL_I2C_STAT_BBB) {
drivers/i2c/busses/i2c-owl.c
289
val = readl(i2c_dev->base + OWL_I2C_REG_STAT);
drivers/i2c/busses/i2c-owl.c
346
if (readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
drivers/i2c/busses/i2c-pxa.c
1003
u32 isr = readl(_ISR(i2c));
drivers/i2c/busses/i2c-pxa.c
1010
__func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
drivers/i2c/busses/i2c-pxa.c
1180
while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB))
drivers/i2c/busses/i2c-pxa.c
1193
writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
1246
if (!(readl(_ICR(i2c)) & ICR_IUE))
drivers/i2c/busses/i2c-pxa.c
1303
u32 ibmr = readl(_IBMR(i2c));
drivers/i2c/busses/i2c-pxa.c
1324
isr = readl(_ISR(i2c));
drivers/i2c/busses/i2c-pxa.c
1334
readl(_IBMR(i2c)), readl(_ISR(i2c)));
drivers/i2c/busses/i2c-pxa.c
358
readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
drivers/i2c/busses/i2c-pxa.c
373
readl(_IBMR(i2c)), readl(_IDBR(i2c)), readl(_ICR(i2c)),
drivers/i2c/busses/i2c-pxa.c
374
readl(_ISR(i2c)));
drivers/i2c/busses/i2c-pxa.c
396
return !(readl(_ICR(i2c)) & ICR_SCLE);
drivers/i2c/busses/i2c-pxa.c
408
while ((i > 0) && (readl(_IBMR(i2c)) & IBMR_SDAS) == 0) {
drivers/i2c/busses/i2c-pxa.c
409
unsigned long icr = readl(_ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
422
writel(readl(_ICR(i2c)) & ~(ICR_MA | ICR_START | ICR_STOP),
drivers/i2c/busses/i2c-pxa.c
432
isr = readl(_ISR(i2c));
drivers/i2c/busses/i2c-pxa.c
458
__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
drivers/i2c/busses/i2c-pxa.c
460
if (readl(_ISR(i2c)) & ISR_SAD) {
drivers/i2c/busses/i2c-pxa.c
470
if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 &&
drivers/i2c/busses/i2c-pxa.c
471
readl(_IBMR(i2c)) == (IBMR_SCLS | IBMR_SDAS)) {
drivers/i2c/busses/i2c-pxa.c
491
if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) != 0) {
drivers/i2c/busses/i2c-pxa.c
499
writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
515
__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
drivers/i2c/busses/i2c-pxa.c
517
if ((readl(_ISR(i2c)) & (ISR_UB|ISR_IBB)) == 0 ||
drivers/i2c/busses/i2c-pxa.c
518
(readl(_ISR(i2c)) & ISR_SAD) != 0 ||
drivers/i2c/busses/i2c-pxa.c
519
(readl(_ICR(i2c)) & ICR_SCLE) == 0) {
drivers/i2c/busses/i2c-pxa.c
547
if (readl(_ICR(i2c)) & ICR_STOP) {
drivers/i2c/busses/i2c-pxa.c
549
writel(readl(_ICR(i2c)) & ~ICR_STOP, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
559
writel(readl(_ICR(i2c)) & ~(ICR_STOP|ICR_ACKNAK|ICR_MA), _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
560
writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
563
dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c)));
drivers/i2c/busses/i2c-pxa.c
564
decode_ICR(readl(_ICR(i2c)));
drivers/i2c/busses/i2c-pxa.c
576
writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
583
writel(readl(_ICR(i2c)) | (i2c->high_mode ? i2c->hs_mask : 0), _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
587
writel(readl(_ICR(i2c)) | ICR_SADIE | ICR_ALDIE | ICR_SSDIE, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
596
writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
628
writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c)); /* allow next byte */
drivers/i2c/busses/i2c-pxa.c
634
u8 byte = readl(_IDBR(i2c));
drivers/i2c/busses/i2c-pxa.c
639
writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
668
writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
669
writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
674
if ((readl(_IBMR(i2c)) & IBMR_SCLS) == IBMR_SCLS)
drivers/i2c/busses/i2c-pxa.c
685
writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
745
writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
751
writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
763
writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
764
writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
769
if ((readl(_IBMR(i2c)) & IBMR_SCLS) == IBMR_SCLS)
drivers/i2c/busses/i2c-pxa.c
780
writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
807
icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);
drivers/i2c/busses/i2c-pxa.c
816
icr = readl(_ICR(i2c));
drivers/i2c/busses/i2c-pxa.c
836
icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);
drivers/i2c/busses/i2c-pxa.c
866
u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);
drivers/i2c/busses/i2c-pxa.c
973
u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);
drivers/i2c/busses/i2c-pxa.c
978
i2c->msg->buf[i2c->msg_ptr++] = readl(_IDBR(i2c));
drivers/i2c/busses/i2c-qcom-cci.c
142
val = readl(cci->base + CCI_IRQ_STATUS_0);
drivers/i2c/busses/i2c-qcom-cci.c
298
val = readl(cci->base + CCI_I2C_Mm_Qn_CUR_WORD_CNT(master, queue));
drivers/i2c/busses/i2c-qcom-cci.c
321
val = readl(cci->base + CCI_I2C_Mm_Qn_CUR_WORD_CNT(master, queue));
drivers/i2c/busses/i2c-qcom-cci.c
360
words_read = readl(cci->base + CCI_I2C_Mm_READ_BUF_LEVEL(master));
drivers/i2c/busses/i2c-qcom-cci.c
369
val = readl(cci->base + CCI_I2C_Mm_READ_DATA(master));
drivers/i2c/busses/i2c-qcom-cci.c
610
val = readl(cci->base + CCI_HW_VERSION);
drivers/i2c/busses/i2c-qup.c
1230
blk->rx_fifo_data = readl(qup->base + QUP_IN_FIFO_BASE);
drivers/i2c/busses/i2c-qup.c
1249
blk->rx_fifo_data = readl(qup->base + QUP_IN_FIFO_BASE);
drivers/i2c/busses/i2c-qup.c
1672
config = readl(qup->base + QUP_CONFIG);
drivers/i2c/busses/i2c-qup.c
1848
hw_ver = readl(qup->base + QUP_HW_VERSION);
drivers/i2c/busses/i2c-qup.c
1851
io_mode = readl(qup->base + QUP_IO_MODE);
drivers/i2c/busses/i2c-qup.c
296
bus_err = readl(qup->base + QUP_I2C_STATUS);
drivers/i2c/busses/i2c-qup.c
297
qup_err = readl(qup->base + QUP_ERROR_FLAGS);
drivers/i2c/busses/i2c-qup.c
298
opflags = readl(qup->base + QUP_OPERATIONAL);
drivers/i2c/busses/i2c-qup.c
395
state = readl(qup->base + QUP_STATE);
drivers/i2c/busses/i2c-qup.c
414
u32 val = readl(qup->base + QUP_STATE);
drivers/i2c/busses/i2c-qup.c
451
status = readl(qup->base + QUP_I2C_STATUS);
drivers/i2c/busses/i2c-qup.c
956
val = readl(qup->base + QUP_IN_FIFO_BASE);
drivers/i2c/busses/i2c-rcar.c
184
return readl(priv->io + reg);
drivers/i2c/busses/i2c-rk3x.c
235
return readl(i2c->regs + offset);
drivers/i2c/busses/i2c-rzv2m.c
193
if ((readl(priv->base + IICB0STR0) & IICB0SSAC) != IICB0SSAC)
drivers/i2c/busses/i2c-rzv2m.c
224
data_tmp = readl(priv->base + IICB0DAT);
drivers/i2c/busses/i2c-rzv2m.c
242
data_tmp = readl(priv->base + IICB0DAT);
drivers/i2c/busses/i2c-rzv2m.c
361
if (readl(priv->base + IICB0STR0) & IICB0SSBS) {
drivers/i2c/busses/i2c-rzv2m.c
80
writel(readl(addr) | val, addr);
drivers/i2c/busses/i2c-rzv2m.c
85
writel(readl(addr) & ~val, addr);
drivers/i2c/busses/i2c-s3c2410.c
185
tmp = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
193
tmp = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
202
tmp = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
210
tmp = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
219
unsigned long tmp = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
230
if (!(readl(i2c->regs + S3C2410_IICSTAT)
drivers/i2c/busses/i2c-s3c2410.c
265
iiccon = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
286
unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
541
tmp = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
557
status = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
567
tmp = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
597
tmp = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
602
tmp = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
618
iicstat = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
654
iicstat = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
657
iicstat = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
674
iicstat = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
708
unsigned long stat = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
712
stat = readl(i2c->regs + S3C2410_IICSTAT);
drivers/i2c/busses/i2c-s3c2410.c
869
iiccon = readl(i2c->regs + S3C2410_IICCON);
drivers/i2c/busses/i2c-s3c2410.c
959
readl(i2c->regs + S3C2410_IICCON));
drivers/i2c/busses/i2c-sprd.c
100
u32 tmp = readl(i2c_dev->base + I2C_CTL);
drivers/i2c/busses/i2c-sprd.c
110
u32 tmp = readl(i2c_dev->base + I2C_CTL);
drivers/i2c/busses/i2c-sprd.c
117
u32 tmp = readl(i2c_dev->base + I2C_STATUS);
drivers/i2c/busses/i2c-sprd.c
124
u32 tmp = readl(i2c_dev->base + I2C_STATUS);
drivers/i2c/busses/i2c-sprd.c
157
u32 tmp = readl(i2c_dev->base + I2C_CTL);
drivers/i2c/busses/i2c-sprd.c
166
u32 tmp = readl(i2c_dev->base + I2C_CTL);
drivers/i2c/busses/i2c-sprd.c
175
u32 tmp = readl(i2c_dev->base + I2C_CTL);
drivers/i2c/busses/i2c-sprd.c
187
u32 tmp = readl(i2c_dev->base + I2C_CTL);
drivers/i2c/busses/i2c-sprd.c
199
u32 tmp = readl(i2c_dev->base + I2C_CTL);
drivers/i2c/busses/i2c-sprd.c
206
u32 cmd = readl(i2c_dev->base + I2C_CTL) & ~I2C_MODE;
drivers/i2c/busses/i2c-sprd.c
363
tmp = readl(i2c_dev->base + I2C_CTL);
drivers/i2c/busses/i2c-sprd.c
371
bool ack = !(readl(i2c_dev->base + I2C_STATUS) & I2C_RX_ACK);
drivers/i2c/busses/i2c-sprd.c
415
bool ack = !(readl(i2c_dev->base + I2C_STATUS) & I2C_RX_ACK);
drivers/i2c/busses/i2c-st.c
627
readl(i2c_dev->base + SSC_IEN);
drivers/i2c/busses/i2c-sun6i-p2wi.c
141
if (readl(p2wi->regs + P2WI_CTRL) & P2WI_CTRL_START_TRANS) {
drivers/i2c/busses/i2c-sun6i-p2wi.c
167
data->byte = readl(p2wi->regs + P2WI_DATA0);
drivers/i2c/busses/i2c-sun6i-p2wi.c
99
status = readl(p2wi->regs + P2WI_INTS);
drivers/i2c/busses/i2c-tegra.c
404
val = readl(i2c_dev->base + reg);
drivers/i2c/busses/i2c-tegra.c
415
val = readl(i2c_dev->base + reg);
drivers/i2c/busses/i2c-tegra.c
456
val = readl(i2c_dev->base + reg);
drivers/i2c/busses/i2c-uniphier-f.c
123
*priv->buf++ = readl(priv->membase + UNIPHIER_FI2C_DTRX);
drivers/i2c/busses/i2c-uniphier-f.c
154
irq_status = readl(priv->membase + UNIPHIER_FI2C_INT);
drivers/i2c/busses/i2c-uniphier-f.c
388
if (readl(priv->membase + UNIPHIER_FI2C_SR) & UNIPHIER_FI2C_SR_DB) {
drivers/i2c/busses/i2c-uniphier-f.c
443
return !!(readl(priv->membase + UNIPHIER_FI2C_BM) &
drivers/i2c/busses/i2c-uniphier-f.c
459
return !!(readl(priv->membase + UNIPHIER_FI2C_BM) &
drivers/i2c/busses/i2c-uniphier-f.c
481
tmp = readl(priv->membase + UNIPHIER_FI2C_CR);
drivers/i2c/busses/i2c-uniphier.c
196
if (!(readl(priv->membase + UNIPHIER_I2C_DREC) &
drivers/i2c/busses/i2c-uniphier.c
257
return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
drivers/i2c/busses/i2c-uniphier.c
273
return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
drivers/i2c/busses/i2c-uniphier.c
77
rxdata = readl(priv->membase + UNIPHIER_I2C_DREC);
drivers/i2c/busses/i2c-versatile.c
46
return !!(readl(i2c->base + I2C_CONTROL) & SDA);
drivers/i2c/busses/i2c-versatile.c
52
return !!(readl(i2c->base + I2C_CONTROL) & SCL);
drivers/i2c/busses/i2c-xlp9xx.c
110
return readl(priv->base + reg);
drivers/i3c/master/adi-i3c-master.c
136
n = readl(master->regs + REG_SDO_FIFO_ROOM);
drivers/i3c/master/adi-i3c-master.c
216
n = readl(master->regs + REG_CMD_FIFO_ROOM);
drivers/i3c/master/adi-i3c-master.c
239
while (!(readl(master->regs + REG_FIFO_STATUS) & REG_FIFO_STATUS_CMDR_EMPTY)) {
drivers/i3c/master/adi-i3c-master.c
243
cmdr = readl(master->regs + REG_CMDR_FIFO);
drivers/i3c/master/adi-i3c-master.c
442
writel((readl(master->regs + REG_DEV_CHAR) &
drivers/i3c/master/adi-i3c-master.c
447
writel(readl(master->regs + REG_DEV_CHAR) |
drivers/i3c/master/adi-i3c-master.c
479
writel(readl(master->regs + REG_DEV_CHAR) |
drivers/i3c/master/adi-i3c-master.c
498
writel(readl(master->regs + REG_DEV_CHAR) |
drivers/i3c/master/adi-i3c-master.c
514
writel((readl(master->regs + REG_DEV_CHAR) &
drivers/i3c/master/adi-i3c-master.c
614
pp_sg = readl(master->regs + REG_OPS) & ~REG_OPS_PP_SG_MASK;
drivers/i3c/master/adi-i3c-master.c
628
buf = readl(master->regs + REG_DCR_BCR_DA);
drivers/i3c/master/adi-i3c-master.c
632
info->pid = readl(master->regs + REG_PID_L);
drivers/i3c/master/adi-i3c-master.c
633
info->pid |= (u64)readl(master->regs + REG_PID_H) << 32;
drivers/i3c/master/adi-i3c-master.c
649
irq_mask = readl(master->regs + REG_IRQ_MASK);
drivers/i3c/master/adi-i3c-master.c
733
while (!(readl(master->regs + REG_FIFO_STATUS) & REG_FIFO_STATUS_IBI_EMPTY)) {
drivers/i3c/master/adi-i3c-master.c
734
u32 raw = readl(master->regs + REG_IBI_FIFO);
drivers/i3c/master/adi-i3c-master.c
757
pending = readl(master->regs + REG_IRQ_PENDING);
drivers/i3c/master/adi-i3c-master.c
834
writel(readl(master->regs + REG_IRQ_MASK) & ~REG_IRQ_PENDING_IBI,
drivers/i3c/master/adi-i3c-master.c
849
writel(readl(master->regs + REG_IRQ_MASK) | REG_IRQ_PENDING_IBI,
drivers/i3c/master/adi-i3c-master.c
958
version = readl(master->regs + ADI_AXI_REG_VERSION);
drivers/i3c/master/dw-i3c-master.c
1234
reg = readl(master->regs + INTR_STATUS_EN);
drivers/i3c/master/dw-i3c-master.c
1240
reg = readl(master->regs + INTR_SIGNAL_EN);
drivers/i3c/master/dw-i3c-master.c
1258
reg = readl(master->regs + dat_entry);
drivers/i3c/master/dw-i3c-master.c
1280
bool hj_rejected = !!(readl(master->regs + DEVICE_CTRL) & DEV_CTRL_HOT_JOIN_NACK);
drivers/i3c/master/dw-i3c-master.c
1305
writel(readl(master->regs + DEVICE_CTRL) & ~DEV_CTRL_HOT_JOIN_NACK,
drivers/i3c/master/dw-i3c-master.c
1315
writel(readl(master->regs + DEVICE_CTRL) | DEV_CTRL_HOT_JOIN_NACK,
drivers/i3c/master/dw-i3c-master.c
1380
readl(master->regs + IBI_QUEUE_STATUS);
drivers/i3c/master/dw-i3c-master.c
1457
reg = readl(master->regs + QUEUE_STATUS_LEVEL);
drivers/i3c/master/dw-i3c-master.c
1463
reg = readl(master->regs + IBI_QUEUE_STATUS);
drivers/i3c/master/dw-i3c-master.c
1484
status = readl(master->regs + INTR_STATUS);
drivers/i3c/master/dw-i3c-master.c
1486
if (!(status & readl(master->regs + INTR_STATUS_EN))) {
drivers/i3c/master/dw-i3c-master.c
1526
reg = readl(master->regs +
drivers/i3c/master/dw-i3c-master.c
1637
ret = readl(master->regs + QUEUE_STATUS_LEVEL);
drivers/i3c/master/dw-i3c-master.c
1640
ret = readl(master->regs + DATA_BUFFER_STATUS_LEVEL);
drivers/i3c/master/dw-i3c-master.c
1643
ret = readl(master->regs + DEVICE_ADDR_TABLE_POINTER);
drivers/i3c/master/dw-i3c-master.c
1729
reg_val = readl(master->regs + DEV_ADDR_TABLE_LOC(master->datstartaddr, pos));
drivers/i3c/master/dw-i3c-master.c
325
writel(readl(master->regs + DEVICE_CTRL) & ~DEV_CTRL_ENABLE,
drivers/i3c/master/dw-i3c-master.c
333
dev_ctrl = readl(master->regs + DEVICE_CTRL);
drivers/i3c/master/dw-i3c-master.c
416
thld_ctrl = readl(master->regs + QUEUE_THLD_CTRL);
drivers/i3c/master/dw-i3c-master.c
477
nresp = readl(master->regs + QUEUE_STATUS_LEVEL);
drivers/i3c/master/dw-i3c-master.c
484
resp = readl(master->regs + RESPONSE_QUEUE_PORT);
drivers/i3c/master/dw-i3c-master.c
521
writel(readl(master->regs + DEVICE_CTRL) | DEV_CTRL_RESUME,
drivers/i3c/master/dw-i3c-master.c
539
thld_ctrl = readl(master->regs + QUEUE_THLD_CTRL);
drivers/i3c/master/dw-i3c-master.c
547
thld_ctrl = readl(master->regs + DATA_BUFFER_THLD_CTRL);
drivers/i3c/master/dw-i3c-master.c
643
writel(readl(master->regs + DEVICE_CTRL) | DEV_CTRL_I2C_SLAVE_PRESENT,
drivers/i3c/master/i3c-master-cdns.c
1005
writel(readl(master->regs + DEVS_CTRL) |
drivers/i3c/master/i3c-master-cdns.c
1018
writel(readl(master->regs + DEVS_CTRL) |
drivers/i3c/master/i3c-master-cdns.c
1041
rr = readl(master->regs + DEV_ID_RR0(slot));
drivers/i3c/master/i3c-master-cdns.c
1043
rr = readl(master->regs + DEV_ID_RR2(slot));
drivers/i3c/master/i3c-master-cdns.c
1047
info->pid |= (u64)readl(master->regs + DEV_ID_RR1(slot)) << 16;
drivers/i3c/master/i3c-master-cdns.c
1097
prescl1 = readl(master->regs + PRESCL_CTRL1) &
drivers/i3c/master/i3c-master-cdns.c
1099
ctrl = readl(master->regs + CTRL);
drivers/i3c/master/i3c-master-cdns.c
1128
olddevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
drivers/i3c/master/i3c-master-cdns.c
1149
newdevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
drivers/i3c/master/i3c-master-cdns.c
1165
writel(readl(master->regs + DEVS_CTRL) |
drivers/i3c/master/i3c-master-cdns.c
1338
readl(master->regs + IBI_DATA_FIFO);
drivers/i3c/master/i3c-master-cdns.c
1348
for (status0 = readl(master->regs + MST_STATUS0);
drivers/i3c/master/i3c-master-cdns.c
1350
status0 = readl(master->regs + MST_STATUS0)) {
drivers/i3c/master/i3c-master-cdns.c
1351
u32 ibir = readl(master->regs + IBIR);
drivers/i3c/master/i3c-master-cdns.c
1378
status = readl(master->regs + MST_ISR);
drivers/i3c/master/i3c-master-cdns.c
1379
if (!(status & readl(master->regs + MST_IMR)))
drivers/i3c/master/i3c-master-cdns.c
1407
sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
drivers/i3c/master/i3c-master-cdns.c
1427
sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
drivers/i3c/master/i3c-master-cdns.c
1445
sirmap = readl(master->regs + SIR_MAP_DEV_REG(data->ibi));
drivers/i3c/master/i3c-master-cdns.c
1581
if (readl(master->regs + DEV_ID) != DEV_ID_I3C_MASTER)
drivers/i3c/master/i3c-master-cdns.c
1597
val = readl(master->regs + CONF_STATUS0);
drivers/i3c/master/i3c-master-cdns.c
1605
val = readl(master->regs + CONF_STATUS1);
drivers/i3c/master/i3c-master-cdns.c
485
writel(readl(master->regs + CTRL) & ~CTRL_DEV_EN, master->regs + CTRL);
drivers/i3c/master/i3c-master-cdns.c
493
writel(readl(master->regs + CTRL) | CTRL_DEV_EN, master->regs + CTRL);
drivers/i3c/master/i3c-master-cdns.c
541
writel(readl(master->regs + CTRL) | CTRL_MCS,
drivers/i3c/master/i3c-master-cdns.c
561
for (status0 = readl(master->regs + MST_STATUS0);
drivers/i3c/master/i3c-master-cdns.c
563
status0 = readl(master->regs + MST_STATUS0)) {
drivers/i3c/master/i3c-master-cdns.c
567
cmdr = readl(master->regs + CMDR);
drivers/i3c/master/i3c-master-cdns.c
645
writel(readl(master->regs + CTRL) & ~CTRL_DEV_EN,
drivers/i3c/master/i3c-master-cdns.c
655
writel(readl(master->regs + CTRL) | CTRL_DEV_EN,
drivers/i3c/master/i3c-master-cdns.c
913
activedevs = readl(master->regs + DEVS_CTRL) & DEVS_CTRL_DEVS_ACTIVE_MASK;
drivers/i3c/master/i3c-master-cdns.c
917
rr = readl(master->regs + DEV_ID_RR0(i));
drivers/i3c/master/i3c-master-cdns.c
960
writel(readl(master->regs + DEVS_CTRL) |
drivers/i3c/master/i3c-master-cdns.c
974
writel(readl(master->regs + DEVS_CTRL) |
drivers/i3c/master/mipi-i3c-hci/dct_v1.c
28
dct_entry_data[i] = readl(reg);
drivers/i3c/master/mipi-i3c-hci/dma.c
40
#define rhs_reg_read(r) readl(hci->RHS_regs + (RHS_##r))
drivers/i3c/master/mipi-i3c-hci/dma.c
55
#define rh_reg_read(r) readl(rh->regs + (RH_##r))
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
118
u32 autocmd_ext_caps = readl(base + 0x04);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
120
u32 autocmd_ext_config = readl(base + 0x08);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
204
dev_dbg(&hci->master.dev, "Build Date Info = %#x\n", readl(base + 1 * 4));
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
25
hci->vendor_mipi_id = readl(base + 0x04);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
26
hci->vendor_version_id = readl(base + 0x08);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
267
cap_header = readl(curr_cap);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
27
hci->vendor_product_id = readl(base + 0x0c);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
46
u32 master_config = readl(base + 0x04);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
60
u32 bus_instance = readl(base + 0x04);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
69
u32 header = readl(base);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
76
u32 mode_entry = readl(base);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
89
u32 header = readl(base);
drivers/i3c/master/mipi-i3c-hci/ext_caps.c
98
rate_entry = readl(base);
drivers/i3c/master/mipi-i3c-hci/hci.h
27
#define reg_read(r) readl(hci->base_regs + (r))
drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
69
host->active_ltr = readl(host->priv + INTEL_ACTIVELTR);
drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
70
host->idle_ltr = readl(host->priv + INTEL_IDLELTR);
drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
84
ltr = readl(host->priv + INTEL_ACTIVELTR);
drivers/i3c/master/mipi-i3c-hci/pio.c
22
#define pio_reg_read(r) readl(hci->PIO_regs + (PIO_##r))
drivers/i3c/master/mipi-i3c-hci/pio.c
721
readl(hci->base_regs + 0x20), readl(hci->base_regs + 0x28));
drivers/i3c/master/renesas-i3c.c
286
u32 data = readl(reg);
drivers/i3c/master/renesas-i3c.c
295
return readl(base + reg);
drivers/i3c/master/svc-i3c-master.c
1289
mstatus = readl(master->regs + SVC_I3C_MSTATUS);
drivers/i3c/master/svc-i3c-master.c
1298
mdctrl = readl(master->regs + SVC_I3C_MDATACTRL);
drivers/i3c/master/svc-i3c-master.c
1305
in[offset + i] = readl(master->regs + SVC_I3C_MRDATAB);
drivers/i3c/master/svc-i3c-master.c
1383
reg = readl(master->regs + SVC_I3C_MDATACTRL);
drivers/i3c/master/svc-i3c-master.c
1421
if (readl(master->regs + SVC_I3C_MERRWARN) & SVC_I3C_MERRWARN_NACK) {
drivers/i3c/master/svc-i3c-master.c
1470
(readl(master->regs + SVC_I3C_MERRWARN) & SVC_I3C_MERRWARN_CRC)) {
drivers/i3c/master/svc-i3c-master.c
2093
master->saved_regs.mconfig = readl(master->regs + SVC_I3C_MCONFIG);
drivers/i3c/master/svc-i3c-master.c
2094
master->saved_regs.mdynaddr = readl(master->regs + SVC_I3C_MDYNADDR);
drivers/i3c/master/svc-i3c-master.c
2099
if (readl(master->regs + SVC_I3C_MDYNADDR) !=
drivers/i3c/master/svc-i3c-master.c
295
mstatus = readl(master->regs + SVC_I3C_MSTATUS);
drivers/i3c/master/svc-i3c-master.c
297
merrwarn = readl(master->regs + SVC_I3C_MERRWARN);
drivers/i3c/master/svc-i3c-master.c
324
u32 mask = readl(master->regs + SVC_I3C_MINTSET);
drivers/i3c/master/svc-i3c-master.c
332
writel(readl(master->regs + SVC_I3C_MERRWARN),
drivers/i3c/master/svc-i3c-master.c
467
while (SVC_I3C_MSTATUS_RXPEND(readl(master->regs + SVC_I3C_MSTATUS)) &&
drivers/i3c/master/svc-i3c-master.c
469
mdatactrl = readl(master->regs + SVC_I3C_MDATACTRL);
drivers/i3c/master/svc-i3c-master.c
593
status = readl(master->regs + SVC_I3C_MSTATUS);
drivers/i3c/master/svc-i3c-master.c
667
u32 active = readl(master->regs + SVC_I3C_MSTATUS);
drivers/i3c/master/svc-i3c-master.c
995
dst[i] = readl(master->regs + SVC_I3C_MRDATAB);
drivers/iio/adc/aspeed_adc.c
223
readl(data->base + ASPEED_REG_ENGINE_CONTROL);
drivers/iio/adc/aspeed_adc.c
290
readl(data->base + ASPEED_REG_ENGINE_CONTROL);
drivers/iio/adc/aspeed_adc.c
366
*readval = readl(data->base + reg);
drivers/iio/adc/aspeed_adc.c
417
readl(data->base + ASPEED_REG_ENGINE_CONTROL);
drivers/iio/adc/aspeed_adc.c
561
if (readl(data->base + ASPEED_REG_ENGINE_CONTROL) &
drivers/iio/adc/aspeed_adc.c
586
readl(data->base + ASPEED_REG_ENGINE_CONTROL);
drivers/iio/adc/aspeed_adc.c
613
readl(data->base + ASPEED_REG_ENGINE_CONTROL);
drivers/iio/adc/cc10001_adc.c
75
return readl(adc_dev->reg_base + reg);
drivers/iio/adc/exynos_adc.c
223
con = readl(ADC_V1_CON(info->regs));
drivers/iio/adc/exynos_adc.c
240
con1 = readl(ADC_V1_CON(info->regs));
drivers/iio/adc/exynos_adc.c
284
con1 = readl(ADC_V1_CON(info->regs));
drivers/iio/adc/exynos_adc.c
325
con = readl(ADC_V2_CON1(info->regs));
drivers/iio/adc/exynos_adc.c
340
con2 = readl(ADC_V2_CON2(info->regs));
drivers/iio/adc/exynos_adc.c
345
con1 = readl(ADC_V2_CON1(info->regs));
drivers/iio/adc/exynos_adc.c
381
con2 = readl(ADC_V2_CON2(info->regs));
drivers/iio/adc/exynos_adc.c
490
info->value = readl(ADC_V1_DATX(info->regs)) & mask;
drivers/iio/adc/exynos_adc.c
510
*readval = readl(info->regs + reg);
drivers/iio/adc/imx7d_adc.c
200
readl(info->regs + i * IMX7D_EACH_CHANNEL_REG_OFFSET);
drivers/iio/adc/imx7d_adc.c
219
cfg = readl(info->regs + IMX7D_REG_ADC_ADC_CFG);
drivers/iio/adc/imx7d_adc.c
259
cfg2 = readl(info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel +
drivers/iio/adc/imx7d_adc.c
349
value = readl(info->regs + IMX7D_REG_ADC_CHA_B_CNV_RSLT);
drivers/iio/adc/imx7d_adc.c
351
value = readl(info->regs + IMX7D_REG_ADC_CHC_D_CNV_RSLT);
drivers/iio/adc/imx7d_adc.c
365
status = readl(info->regs + IMX7D_REG_ADC_INT_STATUS);
drivers/iio/adc/imx7d_adc.c
404
*readval = readl(info->regs + reg);
drivers/iio/adc/imx7d_adc.c
424
adc_cfg = readl(info->regs + IMX7D_REG_ADC_ADC_CFG);
drivers/iio/adc/imx8qxp-adc.c
128
ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_CTRL);
drivers/iio/adc/imx8qxp-adc.c
180
fifo_ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_FCTRL);
drivers/iio/adc/imx8qxp-adc.c
187
interrupt_en = readl(adc->regs + IMX8QXP_ADR_ADC_IE);
drivers/iio/adc/imx8qxp-adc.c
196
ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_CTRL);
drivers/iio/adc/imx8qxp-adc.c
223
ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_CTRL);
drivers/iio/adc/imx8qxp-adc.c
272
readl(adc->regs + IMX8QXP_ADR_ADC_FCTRL));
drivers/iio/adc/imx8qxp-adc.c
295
*readval = readl(adc->regs + reg);
drivers/iio/adc/imx93_adc.c
110
mcr = readl(adc->regs + IMX93_ADC_MCR);
drivers/iio/adc/imx93_adc.c
129
mcr = readl(adc->regs + IMX93_ADC_MCR);
drivers/iio/adc/imx93_adc.c
142
mcr = readl(adc->regs + IMX93_ADC_MCR);
drivers/iio/adc/imx93_adc.c
158
mcr = readl(adc->regs + IMX93_ADC_MCR);
drivers/iio/adc/imx93_adc.c
165
calcfg = readl(adc->regs + IMX93_ADC_CALCFG0);
drivers/iio/adc/imx93_adc.c
175
mcr = readl(adc->regs + IMX93_ADC_MCR);
drivers/iio/adc/imx93_adc.c
189
msr = readl(adc->regs + IMX93_ADC_MSR);
drivers/iio/adc/imx93_adc.c
225
mcr = readl(adc->regs + IMX93_ADC_MCR);
drivers/iio/adc/imx93_adc.c
230
mcr = readl(adc->regs + IMX93_ADC_MCR);
drivers/iio/adc/imx93_adc.c
242
pcda = readl(adc->regs + IMX93_ADC_PCDR0 + channel_number * 4);
drivers/iio/adc/imx93_adc.c
291
isr = readl(adc->regs + IMX93_ADC_ISR);
drivers/iio/adc/ingenic-adc.c
121
readl(adc->base + JZ_ADC_REG_ADCMD);
drivers/iio/adc/ingenic-adc.c
177
cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;
drivers/iio/adc/ingenic-adc.c
222
cfg = readl(adc->base + JZ_ADC_REG_CFG);
drivers/iio/adc/ingenic-adc.c
809
tdat[i] = readl(adc->base + JZ_ADC_REG_ADTCH);
drivers/iio/adc/men_z188_adc.c
88
ctl = readl(addr + Z188_CTRL_REG);
drivers/iio/adc/men_z188_adc.c
93
cfg = readl(addr + i);
drivers/iio/adc/mt6577_auxadc.c
104
val = readl(reg);
drivers/iio/adc/mt6577_auxadc.c
171
val = readl(reg_channel) & MT6577_AUXADC_DAT_MASK;
drivers/iio/adc/mxs-lradc-adc.c
187
*val = readl(adc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;
drivers/iio/adc/mxs-lradc-adc.c
387
unsigned long reg = readl(adc->base + LRADC_CTRL1);
drivers/iio/adc/mxs-lradc-adc.c
421
adc->buffer[j] = readl(adc->base + LRADC_CH(j));
drivers/iio/adc/nxp-sar-adc.c
206
mcr = readl(NXP_SAR_ADC_MCR(info->regs));
drivers/iio/adc/nxp-sar-adc.c
241
u32 mcr = readl(NXP_SAR_ADC_MCR(base));
drivers/iio/adc/nxp-sar-adc.c
304
return readl(NXP_SAR_ADC_CTR0(info->regs));
drivers/iio/adc/nxp-sar-adc.c
317
ceocfr = readl(NXP_SAR_ADC_CEOCFR0(info->regs));
drivers/iio/adc/nxp-sar-adc.c
326
cdr = readl(NXP_SAR_ADC_CDR(info->regs, chan));
drivers/iio/adc/nxp-sar-adc.c
377
isr = readl(NXP_SAR_ADC_ISR(info->regs));
drivers/iio/adc/nxp-sar-adc.c
395
ncmr = readl(NXP_SAR_ADC_NCMR0(info->regs));
drivers/iio/adc/nxp-sar-adc.c
396
cimr = readl(NXP_SAR_ADC_CIMR0(info->regs));
drivers/iio/adc/nxp-sar-adc.c
410
ncmr = readl(NXP_SAR_ADC_NCMR0(info->regs));
drivers/iio/adc/nxp-sar-adc.c
411
cimr = readl(NXP_SAR_ADC_CIMR0(info->regs));
drivers/iio/adc/nxp-sar-adc.c
424
dmar = readl(NXP_SAR_ADC_DMAR0(info->regs));
drivers/iio/adc/nxp-sar-adc.c
435
dmar = readl(NXP_SAR_ADC_DMAR0(info->regs));
drivers/iio/adc/nxp-sar-adc.c
446
dmae = readl(NXP_SAR_ADC_DMAE(info->regs));
drivers/iio/adc/nxp-sar-adc.c
457
mcr = readl(NXP_SAR_ADC_MCR(info->regs));
drivers/iio/adc/nxp-sar-adc.c
478
mcr = readl(NXP_SAR_ADC_MCR(info->regs));
drivers/iio/adc/rcar-gyroadc.c
209
*val = readl(priv->regs + datareg);
drivers/iio/adc/rcar-gyroadc.c
257
*readval = readl(priv->regs + reg);
drivers/iio/adc/rzg2l_adc.c
118
return readl(adc->base + reg);
drivers/iio/adc/rzn1-adc.c
163
val = readl(rzn1_adc->regs + RZN1_ADC_FORCE_REG);
drivers/iio/adc/rzn1-adc.c
207
data_reg = readl(rzn1_adc->regs + RZN1_ADC_ADC1_DATA_REG(ch));
drivers/iio/adc/rzn1-adc.c
212
data_reg = readl(rzn1_adc->regs + RZN1_ADC_ADC2_DATA_REG(ch));
drivers/iio/adc/sophgo-cv1800b-adc.c
113
sample = readl(saradc->regs + CV1800B_ADC_CH_RESULT_REG(chan->scan_index));
drivers/iio/adc/sophgo-cv1800b-adc.c
126
u32 status_reg = readl(saradc->regs + CV1800B_ADC_CYC_SET_REG);
drivers/iio/adc/sophgo-cv1800b-adc.c
144
u32 reg = readl(saradc->regs + CV1800B_ADC_INTR_STA_REG);
drivers/iio/adc/sun20i-gpadc-iio.c
103
*val = readl(info->regs + SUN20I_GPADC_CH_DATA(chan->channel));
drivers/iio/adc/sun20i-gpadc-iio.c
86
ctrl = readl(info->regs + SUN20I_GPADC_CTRL);
drivers/iio/adc/ti_am335x_adc.c
56
return readl(adc->mfd_tscadc->tscadc_base + reg);
drivers/iio/adc/vf610_adc.c
310
adc_gc = readl(info->regs + VF610_REG_ADC_GC);
drivers/iio/adc/vf610_adc.c
316
adc_gc = readl(info->regs + VF610_REG_ADC_GS);
drivers/iio/adc/vf610_adc.c
328
cfg_data = readl(info->regs + VF610_REG_ADC_CFG);
drivers/iio/adc/vf610_adc.c
346
cfg_data = readl(info->regs + VF610_REG_ADC_CFG);
drivers/iio/adc/vf610_adc.c
347
gc_data = readl(info->regs + VF610_REG_ADC_GC);
drivers/iio/adc/vf610_adc.c
562
result = readl(info->regs + VF610_REG_ADC_R0);
drivers/iio/adc/vf610_adc.c
587
coco = readl(info->regs + VF610_REG_ADC_HS);
drivers/iio/adc/vf610_adc.c
741
val = readl(info->regs + VF610_REG_ADC_GC);
drivers/iio/adc/vf610_adc.c
762
val = readl(info->regs + VF610_REG_ADC_GC);
drivers/iio/adc/vf610_adc.c
790
*readval = readl(info->regs + reg);
drivers/iio/adc/vf610_adc.c
913
hc_cfg = readl(info->regs + VF610_REG_ADC_HC0);
drivers/iio/adc/xilinx-ams.c
1081
isr0 = readl(ams->base + AMS_ISR_0);
drivers/iio/adc/xilinx-ams.c
300
val = readl(ams->ps_base + offset);
drivers/iio/adc/xilinx-ams.c
310
val = readl(ams->pl_base + offset);
drivers/iio/adc/xilinx-ams.c
396
status = readl(ams->base + AMS_ISR_0);
drivers/iio/adc/xilinx-ams.c
513
value = readl(ams->base + AMS_PL_CSTS);
drivers/iio/adc/xilinx-ams.c
604
*data = readl(ams->base + offset);
drivers/iio/adc/xilinx-ams.c
654
regval = readl(ams->pl_base + AMS_REG_CONFIG4);
drivers/iio/adc/xilinx-ams.c
661
regval = readl(ams->pl_base + AMS_REG_CONFIG4);
drivers/iio/adc/xilinx-ams.c
668
regval = readl(ams->pl_base + AMS_REG_CONFIG4);
drivers/iio/adc/xilinx-ams.c
675
regval = readl(ams->pl_base + AMS_REG_CONFIG4);
drivers/iio/adc/xilinx-ams.c
731
*val = readl(ams->pl_base + chan->address);
drivers/iio/adc/xilinx-ams.c
733
*val = readl(ams->ps_base + chan->address);
drivers/iio/adc/xilinx-ams.c
965
*val = readl(ams->pl_base + offset);
drivers/iio/adc/xilinx-ams.c
967
*val = readl(ams->ps_base + offset);
drivers/iio/adc/xilinx-xadc-core.c
132
*val = readl(xadc->base + reg);
drivers/iio/dac/lpc18xx_dac.c
57
reg = readl(dac->base + LPC18XX_DAC_CR);
drivers/iio/dac/vf610_dac.c
126
*val = VF610_DAC_DAT0(readl(info->regs));
drivers/iio/dac/vf610_dac.c
57
val = readl(info->regs + VF610_DACx_STATCTRL);
drivers/iio/dac/vf610_dac.c
71
val = readl(info->regs + VF610_DACx_STATCTRL);
drivers/infiniband/hw/bnxt_re/debugfs.c
358
readl(rdev->en_dev->bar0 + rdev->pacing.dbr_db_fifo_reg_off));
drivers/infiniband/hw/bnxt_re/main.c
717
read_val = readl(rdev->en_dev->bar0 + rdev->pacing.dbr_db_fifo_reg_off);
drivers/infiniband/hw/erdma/erdma.h
234
return readl(dev->func_bar + reg);
drivers/infiniband/hw/hns/hns_roce_common.h
38
#define roce_read(dev, reg) readl((dev)->reg_base + (reg))
drivers/infiniband/hw/irdma/ctrl.c
3171
*val = readl(cqp->dev->hw_regs[IRDMA_CQPTAIL]);
drivers/infiniband/hw/irdma/ctrl.c
3274
error = readl(cqp->dev->hw_regs[IRDMA_CQPERRCODES]);
drivers/infiniband/hw/irdma/ctrl.c
3762
val = readl(cqp->dev->hw_regs[IRDMA_CCQPSTATUS]);
drivers/infiniband/hw/irdma/ctrl.c
3777
err_code = readl(cqp->dev->hw_regs[IRDMA_CQPERRCODES]);
drivers/infiniband/hw/irdma/ctrl.c
3847
val = readl(cqp->dev->hw_regs[IRDMA_CCQPSTATUS]);
drivers/infiniband/hw/irdma/ctrl.c
4006
error = readl(cqp->dev->hw_regs[IRDMA_CQPERRCODES]);
drivers/infiniband/hw/irdma/ctrl.c
5829
readl(dev->hw_regs[IRDMA_CQPERRCODES]));
drivers/infiniband/hw/irdma/ctrl.c
6008
readl(dev->hw_regs[IRDMA_CQPERRCODES]));
drivers/infiniband/hw/irdma/ctrl.c
6406
statuscpu0 = readl(dev->hw_regs[IRDMA_GLPE_CPUSTATUS0]);
drivers/infiniband/hw/irdma/ctrl.c
6407
statuscpu1 = readl(dev->hw_regs[IRDMA_GLPE_CPUSTATUS1]);
drivers/infiniband/hw/irdma/ctrl.c
6408
statuscpu2 = readl(dev->hw_regs[IRDMA_GLPE_CPUSTATUS2]);
drivers/infiniband/hw/irdma/ctrl.c
6507
val = readl(dev->hw_regs[IRDMA_GLPCI_LBARCTRL]);
drivers/infiniband/hw/irdma/icrdma_if.c
83
pe_criterr = readl(iwdev->rf->sc_dev.hw_regs[IRDMA_GLPE_CRITERR]);
drivers/infiniband/hw/irdma/utils.c
118
return readl(hw->hw_addr + reg);
drivers/infiniband/hw/mthca/mthca_catas.c
101
switch (swab32(readl(dev->catas_err.map)) >> 24) {
drivers/infiniband/hw/mthca/mthca_catas.c
122
i, swab32(readl(dev->catas_err.map + i)));
drivers/infiniband/hw/mthca/mthca_catas.c
139
if (readl(dev->catas_err.map + i)) {
drivers/infiniband/hw/mthca/mthca_cmd.c
194
return readl(dev->hcr + HCR_STATUS_OFFSET) &
drivers/infiniband/hw/mthca/mthca_eq.c
400
ecr = readl(dev->eq_regs.tavor.ecr_base + 4);
drivers/infiniband/hw/vmw_pvrdma/pvrdma.h
306
return le32_to_cpu(readl(dev->regs + reg));
drivers/input/joystick/n64joy.c
92
return readl(reg_base + reg);
drivers/input/keyboard/bcm-keypad.c
104
state = readl(kp->base + KPSSRN_OFFSET(reg_num));
drivers/input/keyboard/bcm-keypad.c
156
kp->last_state[0] = readl(kp->base + KPSSR0_OFFSET);
drivers/input/keyboard/bcm-keypad.c
157
kp->last_state[0] = readl(kp->base + KPSSR1_OFFSET);
drivers/input/keyboard/bcm-keypad.c
168
val = readl(kp->base + KPCR_OFFSET);
drivers/input/keyboard/lpc32xx-keys.c
77
key = readl(LPC32XX_KS_DATA(kscandat->kscan_base, col));
drivers/input/keyboard/nspire-keypad.c
61
int_sts = readl(keypad->reg_base + KEYPAD_INT) & keypad->int_mask;
drivers/input/keyboard/samsung-keypad.c
148
readl(keypad->base + SAMSUNG_KEYIFSTSCLR);
drivers/input/keyboard/samsung-keypad.c
178
val = readl(keypad->base + SAMSUNG_KEYIFCON);
drivers/input/keyboard/samsung-keypad.c
203
val = readl(keypad->base + SAMSUNG_KEYIFCON);
drivers/input/keyboard/samsung-keypad.c
456
val = readl(keypad->base + SAMSUNG_KEYIFCON);
drivers/input/keyboard/samsung-keypad.c
476
val = readl(keypad->base + SAMSUNG_KEYIFCON);
drivers/input/keyboard/samsung-keypad.c
493
val = readl(keypad->base + SAMSUNG_KEYIFCON);
drivers/input/keyboard/samsung-keypad.c
91
val = readl(keypad->base + SAMSUNG_KEYIFROW);
drivers/input/keyboard/st-keyscan.c
48
state = readl(keypad->base + KEYSCAN_MATRIX_STATE_OFF) & 0xffff;
drivers/input/keyboard/sun4i-lradc-keys.c
113
ints = readl(lradc->base + LRADC_INTS);
drivers/input/keyboard/sun4i-lradc-keys.c
126
val = readl(lradc->base + LRADC_DATA0) & 0x3f;
drivers/input/keyboard/tegra-kbc.c
156
val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
drivers/input/keyboard/tegra-kbc.c
233
val = readl(kbc->mmio + KBC_CONTROL_0);
drivers/input/keyboard/tegra-kbc.c
249
val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
drivers/input/keyboard/tegra-kbc.c
285
val = readl(kbc->mmio + KBC_INT_0);
drivers/input/keyboard/tegra-kbc.c
326
u32 row_cfg = readl(kbc->mmio + r_offs);
drivers/input/keyboard/tegra-kbc.c
327
u32 col_cfg = readl(kbc->mmio + c_offs);
drivers/input/keyboard/tegra-kbc.c
383
val = readl(kbc->mmio + KBC_INIT_DLY_0);
drivers/input/keyboard/tegra-kbc.c
393
val = readl(kbc->mmio + KBC_INT_0);
drivers/input/keyboard/tegra-kbc.c
398
val = readl(kbc->mmio + KBC_KP_ENT0_0);
drivers/input/keyboard/tegra-kbc.c
399
val = readl(kbc->mmio + KBC_KP_ENT1_0);
drivers/input/keyboard/tegra-kbc.c
413
val = readl(kbc->mmio + KBC_CONTROL_0);
drivers/input/keyboard/tegra-kbc.c
689
val = readl(kbc->mmio + KBC_CONTROL_0);
drivers/input/keyboard/tegra-kbc.c
715
kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
drivers/input/misc/cobalt_btns.c
41
status = ~readl(bdev->reg) >> 24;
drivers/input/misc/wistron_btns.c
106
entry_point = readl(base + offset + 5);
drivers/input/serio/altera_ps2.c
37
while ((status = readl(ps2if->base)) & 0xffff0000) {
drivers/input/serio/altera_ps2.c
61
while (readl(ps2if->base) & 0xffff0000)
drivers/input/serio/ioc3kbd.c
111
data_k = readl(&d->regs->k_rd);
drivers/input/serio/ioc3kbd.c
115
data_m = readl(&d->regs->m_rd);
drivers/input/serio/ioc3kbd.c
31
while ((readl(®s->km_csr) & mask) && (timeout < 250)) {
drivers/input/serio/olpc_apsp.c
111
tmp = readl(priv->base + PJ_RST_INTERRUPT);
drivers/input/serio/olpc_apsp.c
117
w = readl(priv->base + COMMAND_RETURN_STATUS);
drivers/input/serio/olpc_apsp.c
142
l = readl(priv->base + COMMAND_FIFO_STATUS);
drivers/input/serio/olpc_apsp.c
149
tmp = readl(priv->base + PJ_INTERRUPT_MASK);
drivers/input/serio/olpc_apsp.c
163
tmp = readl(priv->base + PJ_INTERRUPT_MASK);
drivers/input/serio/olpc_apsp.c
85
u32 sts = readl(priv->base + COMMAND_FIFO_STATUS);
drivers/input/serio/olpc_apsp.c
96
readl(priv->base + COMMAND_FIFO_STATUS));
drivers/input/serio/sun4i-ps2.c
107
intr_status = readl(drvdata->reg_base + PS2_REG_LSTS);
drivers/input/serio/sun4i-ps2.c
108
fifo_status = readl(drvdata->reg_base + PS2_REG_FSTS);
drivers/input/serio/sun4i-ps2.c
130
byte = readl(drvdata->reg_base + PS2_REG_DATA) & 0xff;
drivers/input/serio/sun4i-ps2.c
183
rval = readl(drvdata->reg_base + PS2_REG_GCTL);
drivers/input/serio/sun4i-ps2.c
195
if (readl(drvdata->reg_base + PS2_REG_FSTS) & PS2_FSTS_TXRDY) {
drivers/input/touchscreen/imx6ul_tsc.c
120
adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
drivers/input/touchscreen/imx6ul_tsc.c
139
adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
drivers/input/touchscreen/imx6ul_tsc.c
152
adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
drivers/input/touchscreen/imx6ul_tsc.c
159
adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
drivers/input/touchscreen/imx6ul_tsc.c
218
start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
drivers/input/touchscreen/imx6ul_tsc.c
243
tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
drivers/input/touchscreen/imx6ul_tsc.c
248
adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
drivers/input/touchscreen/imx6ul_tsc.c
265
debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
drivers/input/touchscreen/imx6ul_tsc.c
281
status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
drivers/input/touchscreen/imx6ul_tsc.c
288
start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
drivers/input/touchscreen/imx6ul_tsc.c
293
value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
drivers/input/touchscreen/imx6ul_tsc.c
321
coco = readl(tsc->adc_regs + REG_ADC_HS);
drivers/input/touchscreen/imx6ul_tsc.c
323
readl(tsc->adc_regs + REG_ADC_R0);
drivers/input/touchscreen/mxs-lradc-ts.c
214
reg = readl(ts->base + LRADC_CH(channel));
drivers/input/touchscreen/mxs-lradc-ts.c
231
reg = readl(ts->base + LRADC_CTRL1) & mask;
drivers/input/touchscreen/mxs-lradc-ts.c
234
reg = readl(ts->base + LRADC_CTRL1) & mask;
drivers/input/touchscreen/mxs-lradc-ts.c
497
unsigned long reg = readl(ts->base + LRADC_CTRL1);
drivers/input/touchscreen/mxs-lradc-ts.c
93
return !!(readl(ts->base + LRADC_STATUS) &
drivers/input/touchscreen/sun4i-ts.c
122
x = readl(ts->base + TP_DATA);
drivers/input/touchscreen/sun4i-ts.c
123
y = readl(ts->base + TP_DATA);
drivers/input/touchscreen/sun4i-ts.c
152
reg_val = readl(ts->base + TP_INT_FIFOS);
drivers/input/touchscreen/sun4i-ts.c
155
ts->temp_data = readl(ts->base + TEMP_DATA);
drivers/input/touchscreen/ti_am335x_tsc.c
64
return readl(ts->mfd_tscadc->tscadc_base + reg);
drivers/iommu/amd/debugfs.c
123
head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
drivers/iommu/amd/debugfs.c
124
tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
drivers/iommu/amd/init.c
1152
lo = readl(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET);
drivers/iommu/amd/init.c
1153
hi = readl(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET + 4);
drivers/iommu/amd/init.c
2079
val = readl(iommu->mmio_base + MMIO_CNTR_CONF_OFFSET);
drivers/iommu/amd/init.c
2990
status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
drivers/iommu/amd/init.c
3002
status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
drivers/iommu/amd/init.c
3947
*value = readl(iommu->mmio_base + offset + 4);
drivers/iommu/amd/init.c
3949
*value |= readl(iommu->mmio_base + offset);
drivers/iommu/amd/init.c
758
status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
drivers/iommu/amd/init.c
943
status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
drivers/iommu/amd/iommu.c
1005
head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET);
drivers/iommu/amd/iommu.c
1006
tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET);
drivers/iommu/amd/iommu.c
1044
head = readl(iommu->mmio_base + MMIO_GA_HEAD_OFFSET);
drivers/iommu/amd/iommu.c
1045
tail = readl(iommu->mmio_base + MMIO_GA_TAIL_OFFSET);
drivers/iommu/amd/iommu.c
1100
u32 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
drivers/iommu/amd/iommu.c
1129
status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
drivers/iommu/amd/iommu.c
1183
head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
drivers/iommu/amd/iommu.c
1184
tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
drivers/iommu/amd/iommu.c
1404
iommu->cmd_buf_head = readl(iommu->mmio_base +
drivers/iommu/amd/ppr.c
169
head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
drivers/iommu/amd/ppr.c
170
tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET);
drivers/iommu/apple-dart.c
1030
u32 error = readl(dart->regs + DART_T8020_ERROR);
drivers/iommu/apple-dart.c
1032
u32 addr_lo = readl(dart->regs + DART_T8020_ERROR_ADDR_LO);
drivers/iommu/apple-dart.c
1033
u32 addr_hi = readl(dart->regs + DART_T8020_ERROR_ADDR_HI);
drivers/iommu/apple-dart.c
1067
u32 error = readl(dart->regs + DART_T8110_ERROR);
drivers/iommu/apple-dart.c
1069
u32 addr_lo = readl(dart->regs + DART_T8110_ERROR_ADDR_LO);
drivers/iommu/apple-dart.c
1070
u32 addr_hi = readl(dart->regs + DART_T8110_ERROR_ADDR_HI);
drivers/iommu/apple-dart.c
1143
dart_params[0] = readl(dart->regs + DART_PARAMS1);
drivers/iommu/apple-dart.c
1144
dart_params[1] = readl(dart->regs + DART_PARAMS2);
drivers/iommu/apple-dart.c
1157
dart_params[2] = readl(dart->regs + DART_T8110_PARAMS3);
drivers/iommu/apple-dart.c
1158
dart_params[3] = readl(dart->regs + DART_T8110_PARAMS4);
drivers/iommu/apple-dart.c
1333
dart->save_tcr[sid] = readl(dart->regs + DART_TCR(dart, sid));
drivers/iommu/apple-dart.c
1336
readl(dart->regs + DART_TTBR(dart, sid, idx));
drivers/iommu/apple-dart.c
471
config = readl(dart->regs + dart->hw->lock);
drivers/iommu/apple-dart.c
489
writel(readl(dart->regs + dart->hw->error), dart->regs + dart->hw->error);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
199
prod = readl(q->prod_reg);
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
751
llq->cons = readl(cmdq->q.cons_reg);
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
502
u32 regval = readl(REG_CMDQV(vcmdq->cmdqv, CMDQ_ALLOC(vcmdq->idx)));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
532
u32 regval = readl(REG_CMDQV(vcmdq->cmdqv, CMDQ_ALLOC(vcmdq->idx)));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
566
vintf->hyp_own = !!(VINTF_HYP_OWN & readl(REG_VINTF(vintf, CONFIG)));
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
914
regval = readl(base + TEGRA241_CMDQV_CONFIG);
drivers/iommu/exynos-iommu.c
323
fault->addr = readl(data->sfrbase + finfo->addr_reg);
drivers/iommu/exynos-iommu.c
348
fault->addr = readl(data->sfrbase + addr_reg);
drivers/iommu/exynos-iommu.c
357
u32 info = readl(SYSMMU_REG(data, fault_info));
drivers/iommu/exynos-iommu.c
359
fault->addr = readl(SYSMMU_REG(data, fault_va));
drivers/iommu/exynos-iommu.c
438
while ((i > 0) && !(readl(data->sfrbase + REG_MMU_STATUS) & 1))
drivers/iommu/exynos-iommu.c
441
if (!(readl(data->sfrbase + REG_MMU_STATUS) & 1)) {
drivers/iommu/exynos-iommu.c
504
u32 capa0 = readl(data->sfrbase + REG_V7_CAPA0);
drivers/iommu/exynos-iommu.c
511
u32 capa1 = readl(data->sfrbase + REG_V7_CAPA1);
drivers/iommu/exynos-iommu.c
522
ver = readl(data->sfrbase + REG_MMU_VERSION);
drivers/iommu/exynos-iommu.c
579
itype = __ffs(readl(SYSMMU_REG(data, int_status)));
drivers/iommu/exynos-iommu.c
643
ctrl = readl(data->sfrbase + REG_V7_CTRL_VM);
drivers/iommu/intel/dmar.c
1103
ver = readl(iommu->reg + DMAR_VER_REG);
drivers/iommu/intel/dmar.c
1112
sts = readl(iommu->reg + DMAR_GSTS_REG);
drivers/iommu/intel/dmar.c
1283
fault = readl(iommu->reg + DMAR_FSTS_REG);
drivers/iommu/intel/dmar.c
1293
head = readl(iommu->reg + DMAR_IQH_REG);
drivers/iommu/intel/dmar.c
1315
head = readl(iommu->reg + DMAR_IQH_REG);
drivers/iommu/intel/dmar.c
1317
tail = readl(iommu->reg + DMAR_IQT_REG);
drivers/iommu/intel/dmar.c
1618
sts = readl(iommu->reg + DMAR_GSTS_REG);
drivers/iommu/intel/dmar.c
1625
while ((readl(iommu->reg + DMAR_IQT_REG) !=
drivers/iommu/intel/dmar.c
1626
readl(iommu->reg + DMAR_IQH_REG)) &&
drivers/iommu/intel/dmar.c
1633
IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl,
drivers/iommu/intel/dmar.c
1670
IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl, (sts & DMA_GSTS_QIES), sts);
drivers/iommu/intel/dmar.c
1867
readl(iommu->reg + reg);
drivers/iommu/intel/dmar.c
1881
readl(iommu->reg + reg);
drivers/iommu/intel/dmar.c
1946
fault_status = readl(iommu->reg + DMAR_FSTS_REG);
drivers/iommu/intel/dmar.c
1968
data = readl(iommu->reg + reg +
drivers/iommu/intel/dmar.c
1978
data = readl(iommu->reg + reg +
drivers/iommu/intel/dmar.c
2066
fault_status = readl(iommu->reg + DMAR_FSTS_REG);
drivers/iommu/intel/iommu.c
1839
readl(iommu->reg + DMAR_FECTL_REG);
drivers/iommu/intel/iommu.c
1841
readl(iommu->reg + DMAR_FEDATA_REG);
drivers/iommu/intel/iommu.c
1843
readl(iommu->reg + DMAR_FEADDR_REG);
drivers/iommu/intel/iommu.c
1845
readl(iommu->reg + DMAR_FEUADDR_REG);
drivers/iommu/intel/iommu.c
228
gsts = readl(iommu->reg + DMAR_GSTS_REG);
drivers/iommu/intel/iommu.c
2394
u32 ver = readl(iommu->reg + DMAR_VER_REG);
drivers/iommu/intel/iommu.c
706
readl, (sts & DMA_GSTS_RTPS), sts);
drivers/iommu/intel/iommu.c
736
readl, (!(val & DMA_GSTS_WBFS)), val);
drivers/iommu/intel/iommu.c
934
pmen = readl(iommu->reg + DMAR_PMEN_REG);
drivers/iommu/intel/iommu.c
940
readl, !(pmen & DMA_PMEN_PRS), pmen);
drivers/iommu/intel/iommu.c
956
readl, (sts & DMA_GSTS_TES), sts);
drivers/iommu/intel/iommu.c
976
readl, (!(sts & DMA_GSTS_TES)), sts);
drivers/iommu/intel/iommu.h
153
#define dmar_readl(a) readl(a)
drivers/iommu/intel/irq_remapping.c
475
readl, (sts & DMA_GSTS_IRTPS), sts);
drivers/iommu/intel/irq_remapping.c
497
readl, (sts & DMA_GSTS_IRES), sts);
drivers/iommu/intel/irq_remapping.c
504
readl, !(sts & DMA_GSTS_CFIS), sts);
drivers/iommu/intel/irq_remapping.c
661
sts = readl(iommu->reg + DMAR_GSTS_REG);
drivers/iommu/intel/irq_remapping.c
669
readl, !(sts & DMA_GSTS_IRES), sts);
drivers/iommu/intel/irq_remapping.c
99
gsts = readl(iommu->reg + DMAR_GSTS_REG);
drivers/iommu/intel/prq.c
123
if (readl(iommu->reg + DMAR_PRS_REG) & DMA_PRS_PRO) {
drivers/iommu/intel/prq.c
268
if (readl(iommu->reg + DMAR_PRS_REG) & DMA_PRS_PRO) {
drivers/iommu/msm_iommu_hw-8xxx.h
10
#define GET_GLOBAL_REG(reg, base) (readl((base) + (reg)))
drivers/iommu/msm_iommu_hw-8xxx.h
12
(readl((base) + (reg) + ((ctx) << CTX_SHIFT)))
drivers/iommu/msm_iommu_hw-8xxx.h
33
#define GET_FIELD(addr, mask, shift) ((readl(addr) >> (shift)) & (mask))
drivers/iommu/msm_iommu_hw-8xxx.h
37
int t = readl(addr); \
drivers/iommu/rockchip-iommu.c
339
return readl(base + offset);
drivers/iommu/sun50i-iommu.c
140
return readl(iommu->base + offset);
drivers/iommu/tegra-smmu.c
83
return readl(smmu->regs + offset);
drivers/irqchip/irq-apple-aic.c
394
event = readl(ic->event + ic->info.event);
drivers/irqchip/irq-armada-370-xp.c
314
reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK);
drivers/irqchip/irq-armada-370-xp.c
406
reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK);
drivers/irqchip/irq-armada-370-xp.c
416
reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK);
drivers/irqchip/irq-armada-370-xp.c
733
mpic->doorbell_mask = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK);
drivers/irqchip/irq-armada-370-xp.c
852
nr_irqs = FIELD_GET(MPIC_INT_CONTROL_NUMINT_MASK, readl(mpic->base + MPIC_INT_CONTROL));
drivers/irqchip/irq-aspeed-i2c-ic.c
39
status = readl(i2c_ic->base);
drivers/irqchip/irq-aspeed-intc.c
39
status = readl(intc_ic->base + INTC_INT_STATUS_REG);
drivers/irqchip/irq-aspeed-intc.c
52
unsigned int mask = readl(intc_ic->base + INTC_INT_ENABLE_REG) & ~BIT(data->hwirq);
drivers/irqchip/irq-aspeed-intc.c
61
unsigned int unmask = readl(intc_ic->base + INTC_INT_ENABLE_REG) | BIT(data->hwirq);
drivers/irqchip/irq-aspeed-scu-ic.c
111
sts = readl(scu_ic->base + scu_ic->isr);
drivers/irqchip/irq-aspeed-scu-ic.c
113
sts = readl(scu_ic->base + scu_ic->isr);
drivers/irqchip/irq-aspeed-scu-ic.c
139
writel(readl(scu_ic->base) & ~mask, scu_ic->base);
drivers/irqchip/irq-aspeed-scu-ic.c
153
writel((readl(scu_ic->base) & ~mask) | bit, scu_ic->base);
drivers/irqchip/irq-aspeed-scu-ic.c
161
writel(readl(scu_ic->base) & ~mask, scu_ic->base + scu_ic->ier);
drivers/irqchip/irq-aspeed-scu-ic.c
169
writel(readl(scu_ic->base) | bit, scu_ic->base + scu_ic->ier);
drivers/irqchip/irq-aspeed-scu-ic.c
86
sts = readl(scu_ic->base);
drivers/irqchip/irq-aspeed-scu-ic.c
95
writel((readl(scu_ic->base) & ~mask) | BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT),
drivers/irqchip/irq-aspeed-vic.c
78
sense = readl(vic->base + AVIC_INT_SENSE);
drivers/irqchip/irq-aspeed-vic.c
80
sense = readl(vic->base + AVIC_INT_SENSE + 4);
drivers/irqchip/irq-atmel-aic-common.c
180
writel(readl(regs + AT91_RTT_MR) &
drivers/irqchip/irq-bcm2836.c
31
writel(readl(reg) & ~BIT(bit), reg);
drivers/irqchip/irq-bcm2836.c
40
writel(readl(reg) | BIT(bit), reg);
drivers/irqchip/irq-bcm7038-l1.c
102
return readl(reg);
drivers/irqchip/irq-csky-apb-intc.c
152
readl(reg_base + GX_INTC_PEN63_32), 32);
drivers/irqchip/irq-csky-apb-intc.c
157
readl(reg_base + GX_INTC_PEN31_00), 0);
drivers/irqchip/irq-csky-apb-intc.c
206
ret = handle_irq_perbit(regs, readl(reg_pen_hi), 32);
drivers/irqchip/irq-csky-apb-intc.c
210
ret = handle_irq_perbit(regs, readl(reg_pen_lo), 0);
drivers/irqchip/irq-csky-apb-intc.c
219
readl(reg_pen_hi + CK_INTC_DUAL_BASE), 96);
drivers/irqchip/irq-csky-apb-intc.c
224
readl(reg_pen_lo + CK_INTC_DUAL_BASE), 64);
drivers/irqchip/irq-ftintc010.c
134
while ((status = readl(FT010_IRQ_STATUS(f->base)))) {
drivers/irqchip/irq-ftintc010.c
58
mask = readl(FT010_IRQ_MASK(f->base));
drivers/irqchip/irq-ftintc010.c
68
mask = readl(FT010_IRQ_MASK(f->base));
drivers/irqchip/irq-ftintc010.c
86
mode = readl(FT010_IRQ_MODE(f->base));
drivers/irqchip/irq-ftintc010.c
87
polarity = readl(FT010_IRQ_POLARITY(f->base));
drivers/irqchip/irq-gic.c
457
bypass = readl(cpu_base + GIC_CPU_CTRL);
drivers/irqchip/irq-gic.c
536
val = readl(cpu_base + GIC_CPU_CTRL);
drivers/irqchip/irq-goldfish-pic.c
41
pending = readl(gfpic->base + GFPIC_REG_IRQ_PENDING);
drivers/irqchip/irq-loongson-htpic.c
36
pending = readl(priv->base);
drivers/irqchip/irq-loongson-htpic.c
65
(void) readl(htpic->base + i * 0x4);
drivers/irqchip/irq-loongson-htvec.c
167
htvec_priv->saved_vec_en[i] = readl(htvec_priv->base + HTVEC_EN_OFF + 4 * i);
drivers/irqchip/irq-loongson-htvec.c
50
pending = readl(priv->base + 4 * i);
drivers/irqchip/irq-loongson-htvec.c
84
reg = readl(addr);
drivers/irqchip/irq-loongson-htvec.c
99
reg = readl(addr);
drivers/irqchip/irq-loongson-liointc.c
108
writel(readl(gc->reg_base + offset) | mask,
drivers/irqchip/irq-loongson-liointc.c
111
writel(readl(gc->reg_base + offset) & ~mask,
drivers/irqchip/irq-loongson-liointc.c
150
priv->int_pol = readl(gc->reg_base + LIOINTC_REG_INTC_POL);
drivers/irqchip/irq-loongson-liointc.c
151
priv->int_edge = readl(gc->reg_base + LIOINTC_REG_INTC_EDGE);
drivers/irqchip/irq-loongson-liointc.c
81
pending = readl(handler->priv->core_isr[core]);
drivers/irqchip/irq-loongson-pch-lpc.c
113
pending = readl(priv->base + LPC_INT_ENA);
drivers/irqchip/irq-loongson-pch-lpc.c
114
pending &= readl(priv->base + LPC_INT_STS);
drivers/irqchip/irq-loongson-pch-lpc.c
150
return (readl(priv->base + LPC_INT_ENA) == 0xffffffff) &&
drivers/irqchip/irq-loongson-pch-lpc.c
151
(readl(priv->base + LPC_INT_STS) == 0xffffffff);
drivers/irqchip/irq-loongson-pch-lpc.c
156
pch_lpc_priv->saved_reg_ctl = readl(pch_lpc_priv->base + LPC_INT_CTL);
drivers/irqchip/irq-loongson-pch-lpc.c
157
pch_lpc_priv->saved_reg_ena = readl(pch_lpc_priv->base + LPC_INT_ENA);
drivers/irqchip/irq-loongson-pch-lpc.c
158
pch_lpc_priv->saved_reg_pol = readl(pch_lpc_priv->base + LPC_INT_POL);
drivers/irqchip/irq-loongson-pch-lpc.c
59
writel(readl(priv->base + LPC_INT_ENA) & (~(0x1 << (d->hwirq))),
drivers/irqchip/irq-loongson-pch-lpc.c
70
writel(readl(priv->base + LPC_INT_ENA) | (0x1 << (d->hwirq)),
drivers/irqchip/irq-loongson-pch-lpc.c
84
val = readl(priv->base + LPC_INT_POL);
drivers/irqchip/irq-loongson-pch-pic.c
150
reg = readl(priv->base + PCH_PIC_EDGE + PIC_REG_IDX(bit) * 4);
drivers/irqchip/irq-loongson-pch-pic.c
288
readl(pch_pic_priv[i]->base + PCH_PIC_POL + 4 * j);
drivers/irqchip/irq-loongson-pch-pic.c
290
readl(pch_pic_priv[i]->base + PCH_PIC_EDGE + 4 * j);
drivers/irqchip/irq-loongson-pch-pic.c
292
readl(pch_pic_priv[i]->base + PCH_PIC_MASK + 4 * j);
drivers/irqchip/irq-loongson-pch-pic.c
346
priv->vec_count = ((readl(priv->base + 4) >> 16) & 0xff) + 1;
drivers/irqchip/irq-loongson-pch-pic.c
71
reg = readl(addr);
drivers/irqchip/irq-loongson-pch-pic.c
83
reg = readl(addr);
drivers/irqchip/irq-ls1x.c
44
pending = readl(priv->intc_base + LS_REG_INTC_STATUS) &
drivers/irqchip/irq-ls1x.c
45
readl(priv->intc_base + LS_REG_INTC_EN);
drivers/irqchip/irq-ls1x.c
65
writel(readl(gc->reg_base + offset) | mask,
drivers/irqchip/irq-ls1x.c
68
writel(readl(gc->reg_base + offset) & ~mask,
drivers/irqchip/irq-mvebu-pic.c
55
reg = readl(pic->base + PIC_MASK);
drivers/irqchip/irq-mvebu-pic.c
65
reg = readl(pic->base + PIC_MASK);
drivers/irqchip/irq-pic32-evic.c
47
hwirq = readl(evic_base + REG_INTSTAT) & 0xFF;
drivers/irqchip/irq-realtek-rtl.c
111
pending = readl(REG(RTL_ICTL_GIMR)) & readl(REG(RTL_ICTL_GISR));
drivers/irqchip/irq-realtek-rtl.c
46
irr = readl(irr0 + offset) & ~(0xf << shift);
drivers/irqchip/irq-realtek-rtl.c
58
value = readl(REG(RTL_ICTL_GIMR));
drivers/irqchip/irq-realtek-rtl.c
72
value = readl(REG(RTL_ICTL_GIMR));
drivers/irqchip/irq-renesas-rzt2h.c
74
val = readl(priv->base_ns + RZT2H_ICU_DMACn_RSSELi(dmac_index, y));
drivers/irqchip/irq-renesas-rzv2h.c
159
icu_dmksely = readl(priv->base + ICU_DMkSELy(dmac_index, y));
drivers/irqchip/irq-riscv-aplic-direct.c
148
while ((hw_irq = readl(idc->regs + APLIC_IDC_CLAIMI))) {
drivers/irqchip/irq-riscv-aplic-main.c
276
val = readl(priv->regs + APLIC_DOMAINCFG);
drivers/irqchip/irq-riscv-aplic-main.c
281
if (readl(priv->regs + APLIC_DOMAINCFG) != val)
drivers/irqchip/irq-riscv-aplic-main.c
58
writel(readl(regs + APLIC_CLRIP_BASE + (i / 32) * sizeof(u32)),
drivers/irqchip/irq-riscv-aplic-main.c
77
srcs->target = readl(regs + APLIC_TARGET_BASE + i * sizeof(u32));
drivers/irqchip/irq-riscv-aplic-main.c
82
srcs->ie = readl(regs + APLIC_SETIE_BASE + (i / 32) * sizeof(u32));
drivers/irqchip/irq-riscv-aplic-main.c
88
srcs->ie = readl(regs + APLIC_SETIE_BASE + (nr_irqs / 32) * sizeof(u32));
drivers/irqchip/irq-sifive-plic.c
115
value = readl(base + group);
drivers/irqchip/irq-sifive-plic.c
179
enabled = readl(reg) & BIT(d->hwirq % 32);
drivers/irqchip/irq-sifive-plic.c
277
readl(priv->regs + PRIORITY_BASE + irq * PRIORITY_PER_ID));
drivers/irqchip/irq-sifive-plic.c
393
while ((hwirq = readl(claim))) {
drivers/irqchip/irq-sifive-plic.c
461
hwirq = readl(claim);
drivers/irqchip/irq-sun4i.c
191
hwirq = readl(irq_ic_data->irq_base + SUN4I_IRQ_VECTOR_REG) >> 2;
drivers/irqchip/irq-sun4i.c
193
!(readl(irq_ic_data->irq_base + SUN4I_IRQ_PENDING_REG(0)) &
drivers/irqchip/irq-sun4i.c
199
hwirq = readl(irq_ic_data->irq_base +
drivers/irqchip/irq-sun4i.c
66
val = readl(irq_ic_data->irq_base +
drivers/irqchip/irq-sun4i.c
79
val = readl(irq_ic_data->irq_base +
drivers/irqchip/irq-versatile-fpga.c
118
while ((status = readl(f->base + IRQ_STATUS))) {
drivers/irqchip/irq-versatile-fpga.c
90
status = readl(f->base + IRQ_STATUS);
drivers/irqchip/irq-vic.c
137
vic->int_select = readl(base + VIC_INT_SELECT);
drivers/irqchip/irq-vic.c
138
vic->int_enable = readl(base + VIC_INT_ENABLE);
drivers/irqchip/irq-vic.c
139
vic->soft_int = readl(base + VIC_INT_SOFT);
drivers/irqchip/irq-vic.c
140
vic->protect = readl(base + VIC_PROTECT);
drivers/irqchip/irq-vic.c
396
value = readl(base + VIC_PL190_VECT_ADDR);
drivers/irqchip/irq-vic.c
450
cellid |= (readl(addr) & 0xff) << (8 * i);
drivers/irqchip/irq-wpcm450-aic.c
55
readl(aic->regs + AIC_IPER);
drivers/irqchip/irq-wpcm450-aic.c
70
hwirq = readl(aic->regs + AIC_IPER) / 4;
drivers/irqchip/irq-zevio.c
44
readl(gc->reg_base + regs->ack);
drivers/irqchip/irq-zevio.c
51
while (readl(zevio_irq_io + IO_STATUS)) {
drivers/irqchip/irq-zevio.c
52
irqnr = readl(zevio_irq_io + IO_CURRENT);
drivers/irqchip/irq-zevio.c
66
readl(base + IO_RESET);
drivers/irqchip/spear-shirq.c
192
pend = readl(shirq->base + shirq->status_reg) & shirq->mask;
drivers/irqchip/spear-shirq.c
65
val = readl(reg) & ~(0x1 << shift);
drivers/irqchip/spear-shirq.c
77
val = readl(reg) | (0x1 << shift);
drivers/isdn/hardware/mISDN/hfcmulti.c
1035
pv = readl(plx_acc_32);
drivers/isdn/hardware/mISDN/hfcmulti.c
1168
pv = readl(plx_acc_32);
drivers/isdn/hardware/mISDN/hfcmulti.c
1203
pv = readl(plx_acc_32);
drivers/isdn/hardware/mISDN/hfcmulti.c
1265
pv = readl(plx_acc_32);
drivers/isdn/hardware/mISDN/hfcmulti.c
1383
pv = readl(plx_acc_32);
drivers/isdn/hardware/mISDN/hfcmulti.c
1419
pv = readl(plx_acc_32);
drivers/isdn/hardware/mISDN/hfcmulti.c
519
le32_to_cpu(readl(hc->pci_membase + A_FIFO_DATA0));
drivers/isdn/hardware/mISDN/hfcmulti.c
915
pv = readl(plx_acc_32);
drivers/isdn/hardware/mISDN/hfcmulti.c
937
pv = readl(plx_acc_32);
drivers/isdn/hardware/mISDN/hfcmulti.c
968
pv = readl(plx_acc_32);
drivers/leds/blink/leds-bcm63138.c
78
return readl(leds->base + reg);
drivers/leds/leds-bcm6328.c
92
return readl(reg);
drivers/leds/leds-bcm6358.c
60
return readl(reg);
drivers/leds/leds-ip30.c
51
data->cdev.brightness = readl(data->reg);
drivers/leds/leds-sun50i-a100.c
133
control = readl(priv->base + LEDC_INT_CTRL_REG);
drivers/leds/leds-sun50i-a100.c
139
control = readl(priv->base + LEDC_INT_CTRL_REG);
drivers/leds/leds-sun50i-a100.c
165
control = readl(priv->base + LEDC_CTRL_REG);
drivers/leds/leds-sun50i-a100.c
186
status = readl(priv->base + LEDC_INT_STS_REG);
drivers/leds/leds-sun50i-a100.c
271
control = readl(priv->base + LEDC_CTRL_REG);
drivers/mailbox/armada-37xx-rwtm-mailbox.c
117
reg = readl(mbox->base + RWTM_HOST_INT_MASK);
drivers/mailbox/armada-37xx-rwtm-mailbox.c
130
reg = readl(mbox->base + RWTM_HOST_INT_MASK);
drivers/mailbox/armada-37xx-rwtm-mailbox.c
49
rx_msg.retval = readl(mbox->base + RWTM_MBOX_RETURN_STATUS);
drivers/mailbox/armada-37xx-rwtm-mailbox.c
51
rx_msg.status[i] = readl(mbox->base + RWTM_MBOX_STATUS(i));
drivers/mailbox/armada-37xx-rwtm-mailbox.c
62
reg = readl(mbox->base + RWTM_HOST_INT_RESET);
drivers/mailbox/armada-37xx-rwtm-mailbox.c
87
reg = readl(mbox->base + RWTM_MBOX_FIFO_STATUS);
drivers/mailbox/ast2700-mailbox.c
121
writel(readl(reg) | BIT(idx), reg);
drivers/mailbox/ast2700-mailbox.c
135
writel(readl(reg) & ~BIT(idx), reg);
drivers/mailbox/ast2700-mailbox.c
44
return !(readl(mb->tx_regs + IPCR_STATUS) & BIT(idx));
drivers/mailbox/ast2700-mailbox.c
57
status = readl(mb->rx_regs + IPCR_ENABLE) &
drivers/mailbox/ast2700-mailbox.c
58
readl(mb->rx_regs + IPCR_STATUS);
drivers/mailbox/ast2700-mailbox.c
73
word_data[i] = readl(data_reg + i * sizeof(u32));
drivers/mailbox/ast2700-mailbox.c
93
if (!(readl(mb->tx_regs + IPCR_ENABLE) & BIT(idx))) {
drivers/mailbox/bcm-flexrm-mailbox.c
931
if (readl(ring->regs + RING_CONTROL) &
drivers/mailbox/bcm2835-mailbox.c
115
ret = !(readl(mbox->regs + MAIL1_STA) & ARM_MS_FULL);
drivers/mailbox/bcm2835-mailbox.c
72
while (!(readl(mbox->regs + MAIL0_STA) & ARM_MS_EMPTY)) {
drivers/mailbox/bcm2835-mailbox.c
73
u32 msg = readl(mbox->regs + MAIL0_RD);
drivers/mailbox/hi3660-mailbox.c
120
val = readl(mbox->base + MBOX_IPC_LOCK_REG);
drivers/mailbox/hi3660-mailbox.c
143
if (readl(base + MBOX_MODE_REG) & MBOX_STATE_IDLE) {
drivers/mailbox/hi3660-mailbox.c
147
val = readl(base + MBOX_SRC_REG);
drivers/mailbox/hi3660-mailbox.c
95
if (readl(base + MBOX_MODE_REG) & MBOX_STATE_READY)
drivers/mailbox/hi3660-mailbox.c
99
ret = readx_poll_timeout_atomic(readl, base + MBOX_MODE_REG,
drivers/mailbox/hi6220-mailbox.c
105
mode = readl(mbox->base + MBOX_MODE_REG(slot));
drivers/mailbox/hi6220-mailbox.c
119
state = readl(mbox->base + MBOX_MODE_REG(mchan->slot));
drivers/mailbox/hi6220-mailbox.c
157
state = readl(ACK_INT_STAT_REG(mbox->ipc));
drivers/mailbox/hi6220-mailbox.c
180
msg[i] = readl(mbox->base +
drivers/mailbox/hi6220-mailbox.c
95
status = readl(mbox->base + MBOX_MODE_REG(slot));
drivers/mailbox/mailbox-xgene-slimpro.c
144
val = readl(mb_chan->reg + REG_DB_STATMASK);
drivers/mailbox/mailbox-xgene-slimpro.c
157
val = readl(mb_chan->reg + REG_DB_STATMASK);
drivers/mailbox/mailbox-xgene-slimpro.c
77
mb_chan->rx_msg[1] = readl(mb_chan->reg + REG_DB_DIN0);
drivers/mailbox/mailbox-xgene-slimpro.c
78
mb_chan->rx_msg[2] = readl(mb_chan->reg + REG_DB_DIN1);
drivers/mailbox/mailbox-xgene-slimpro.c
79
mb_chan->rx_msg[0] = readl(mb_chan->reg + REG_DB_IN);
drivers/mailbox/mailbox-xgene-slimpro.c
84
u32 val = readl(mb_chan->reg + REG_DB_STAT);
drivers/mailbox/mailbox-xgene-slimpro.c
95
u32 val = readl(mb_chan->reg + REG_DB_STAT);
drivers/mailbox/mtk-adsp-mailbox.c
40
u32 op = readl(priv->va_mboxreg + priv->cfg->set_out);
drivers/mailbox/mtk-adsp-mailbox.c
96
return readl(priv->va_mboxreg + priv->cfg->set_in) == 0;
drivers/mailbox/mtk-cmdq-mailbox.c
193
if (!(readl(thread->base + CMDQ_THR_ENABLE_TASK) & CMDQ_THR_ENABLED))
drivers/mailbox/mtk-cmdq-mailbox.c
251
writel(readl(thread->base + CMDQ_THR_CURR_ADDR),
drivers/mailbox/mtk-cmdq-mailbox.c
276
return readl(thread->base + CMDQ_THR_WAIT_TOKEN) & CMDQ_THR_IS_WAITING;
drivers/mailbox/mtk-cmdq-mailbox.c
314
irq_flag = readl(thread->base + CMDQ_THR_IRQ_STATUS);
drivers/mailbox/mtk-cmdq-mailbox.c
323
if (!(readl(thread->base + CMDQ_THR_ENABLE_TASK) & CMDQ_THR_ENABLED))
drivers/mailbox/mtk-cmdq-mailbox.c
333
gce_addr = readl(thread->base + CMDQ_THR_CURR_ADDR);
drivers/mailbox/mtk-cmdq-mailbox.c
365
irq_status = readl(cmdq->base + CMDQ_CURR_IRQ_STATUS) & cmdq->irq_mask;
drivers/mailbox/mtk-cmdq-mailbox.c
488
gce_addr = readl(thread->base + CMDQ_THR_CURR_ADDR);
drivers/mailbox/mtk-cmdq-mailbox.c
490
gce_addr = readl(thread->base + CMDQ_THR_END_ADDR);
drivers/mailbox/mtk-gpueb-mailbox.c
200
return !(readl(ch->ebm->mbox_ctl + GPUEB_MBOX_CTL_TX_STS) & BIT(ch->num));
drivers/mailbox/mtk-gpueb-mailbox.c
97
rx_sts = readl(ch->ebm->mbox_ctl + GPUEB_MBOX_CTL_RX_STS);
drivers/mailbox/mtk-vcp-mailbox.c
36
priv->ipi_recv.irq_status = readl(priv->base + priv->cfg->clr_out);
drivers/mailbox/mtk-vcp-mailbox.c
69
status = readl(priv->base + priv->cfg->set_in);
drivers/mailbox/mtk-vcp-mailbox.c
90
return !(readl(priv->base + priv->cfg->set_in) & BIT(ipi_info->index));
drivers/mailbox/pcc.c
138
*val = readl(vaddr);
drivers/mailbox/qcom-cpucp-mbox.c
57
u32 val = readl(cpucp->rx_base + APSS_CPUCP_RX_MBOX_CMD(i) + APSS_CPUCP_MBOX_CMD_OFF);
drivers/mailbox/qcom-ipcc.c
264
hwirq = readl(ipcc->base + IPCC_REG_RECV_ID);
drivers/mailbox/qcom-ipcc.c
301
config_value = readl(ipcc->base + IPCC_REG_CONFIG);
drivers/mailbox/qcom-ipcc.c
81
hwirq = readl(ipcc->base + IPCC_REG_RECV_ID);
drivers/mailbox/sprd-mailbox.c
132
fifo_sts = readl(base + SPRD_MBOX_FIFO_STS);
drivers/mailbox/sprd-mailbox.c
141
msg[0] = readl(base + SPRD_MBOX_MSG_LOW);
drivers/mailbox/sprd-mailbox.c
142
msg[1] = readl(base + SPRD_MBOX_MSG_HIGH);
drivers/mailbox/sprd-mailbox.c
143
id = readl(base + SPRD_MBOX_ID);
drivers/mailbox/sprd-mailbox.c
182
fifo_sts = readl(priv->inbox_base + SPRD_MBOX_FIFO_STS);
drivers/mailbox/sprd-mailbox.c
185
fifo_sts2 = readl(priv->inbox_base + SPRD_MBOX_IN_FIFO_STS2);
drivers/mailbox/sprd-mailbox.c
262
busy = readl(priv->inbox_base + SPRD_MBOX_FIFO_STS) &
drivers/mailbox/sprd-mailbox.c
416
readl(priv->outbox_base + SPRD_MBOX_FIFO_DEPTH) + 1;
drivers/mailbox/sun6i-msgbox.c
106
if (WARN_ON_ONCE(!(readl(mbox->regs + CTRL_REG(n)) & CTRL_TX(n))))
drivers/mailbox/sun6i-msgbox.c
121
if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) {
drivers/mailbox/sun6i-msgbox.c
124
readl(mbox->regs + MSG_DATA_REG(n));
drivers/mailbox/sun6i-msgbox.c
129
writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) | RX_IRQ(n),
drivers/mailbox/sun6i-msgbox.c
144
if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) {
drivers/mailbox/sun6i-msgbox.c
147
writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) & ~RX_IRQ(n),
drivers/mailbox/sun6i-msgbox.c
154
readl(mbox->regs + MSG_DATA_REG(n));
drivers/mailbox/sun6i-msgbox.c
156
} while (readl(mbox->regs + LOCAL_IRQ_STAT_REG) & RX_IRQ(n));
drivers/mailbox/sun6i-msgbox.c
176
return !(readl(mbox->regs + REMOTE_IRQ_STAT_REG) & RX_IRQ(n));
drivers/mailbox/sun6i-msgbox.c
184
return readl(mbox->regs + MSG_STAT_REG(n)) & MSG_STAT_MASK;
drivers/mailbox/sun6i-msgbox.c
73
status = readl(mbox->regs + LOCAL_IRQ_EN_REG) &
drivers/mailbox/sun6i-msgbox.c
74
readl(mbox->regs + LOCAL_IRQ_STAT_REG);
drivers/mailbox/sun6i-msgbox.c
86
uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n));
drivers/mailbox/tegra-hsp.c
136
return readl(hsp->regs + offset);
drivers/mailbox/tegra-hsp.c
148
return readl(channel->regs + offset);
drivers/mailbox/ti-msgmgr.c
165
val = readl(qinst->queue_state) & status_cnt_mask;
drivers/mailbox/ti-msgmgr.c
191
val = readl(qinst->queue_state) & d->status_err_mask;
drivers/mailbox/ti-msgmgr.c
230
*word_data = readl(data_reg);
drivers/mailbox/ti-msgmgr.c
523
qinst->is_tx = (readl(qinst->queue_ctrl) &
drivers/mcb/mcb-parse.c
119
cb[i].addr = readl(p);
drivers/mcb/mcb-parse.c
120
cb[i].size = readl(p + 4);
drivers/mcb/mcb-parse.c
143
reg = readl(*base);
drivers/mcb/mcb-parse.c
20
dtype = readl(p);
drivers/mcb/mcb-parse.c
49
reg1 = readl(&gdd->reg1);
drivers/mcb/mcb-parse.c
50
reg2 = readl(&gdd->reg2);
drivers/mcb/mcb-parse.c
51
offset = readl(&gdd->offset);
drivers/mcb/mcb-parse.c
52
size = readl(&gdd->size);
drivers/media/cec/platform/sti/stih-cec.c
192
u32 reg = readl(cec->regs + CEC_ADDR_TABLE);
drivers/media/cec/platform/sti/stih-cec.c
255
msg.len = readl(cec->regs + CEC_DATA_ARRAY_STATUS) & 0x1f;
drivers/media/cec/platform/sti/stih-cec.c
264
msg.msg[i] = readl(cec->regs + CEC_RX_DATA_BASE + i);
drivers/media/cec/platform/sti/stih-cec.c
288
cec->irq_status = readl(cec->regs + CEC_STATUS);
drivers/media/cec/platform/tegra/tegra_cec.c
54
return readl(cec->cec_base + reg);
drivers/media/pci/b2c2/flexcop-pci.c
81
v.raw = readl(fc_pci->io_mem + r);
drivers/media/pci/bt8xx/bt878.h
135
#define bmtread(adr) readl(adr)
drivers/media/pci/bt8xx/bttvp.h
492
#define btread(adr) readl(btv->bt848_mmio+(adr))
drivers/media/pci/cx18/cx18-io.h
48
return readl(addr);
drivers/media/pci/cx23885/cx23885.h
497
#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
drivers/media/pci/cx23885/cx23885.h
501
writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
drivers/media/pci/cx25821/cx25821.h
350
#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
drivers/media/pci/cx25821/cx25821.h
354
writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
drivers/media/pci/cx88/cx88.h
584
#define cx_read(reg) readl(core->lmmio + ((reg) >> 2))
drivers/media/pci/cx88/cx88.h
589
writel((readl(core->lmmio + ((reg) >> 2)) & ~(mask)) |\
drivers/media/pci/ddbridge/ddbridge-io.h
21
return readl(link->dev->regs + adr);
drivers/media/pci/ddbridge/ddbridge-io.h
31
return readl(dev->regs + adr);
drivers/media/pci/intel/ipu3/ipu3-cio2.c
546
writel(readl(base + CIO2_REG_PXM_FRF_CFG(i)) |
drivers/media/pci/intel/ipu3/ipu3-cio2.c
548
writel(readl(base + CIO2_REG_PBM_FOPN_ABORT) |
drivers/media/pci/intel/ipu3/ipu3-cio2.c
684
oe_clear = readl(base + CIO2_REG_INT_STS_EXT_OE);
drivers/media/pci/intel/ipu3/ipu3-cio2.c
739
ie_status = readl(base + CIO2_REG_INT_STS_EXT_IE);
drivers/media/pci/intel/ipu3/ipu3-cio2.c
751
csi2_status = readl(csi_rx_base +
drivers/media/pci/intel/ipu3/ipu3-cio2.c
777
int_status = readl(base + CIO2_REG_INT_STS);
drivers/media/pci/intel/ipu3/ipu3-cio2.c
785
int_status = readl(base + CIO2_REG_INT_STS);
drivers/media/pci/intel/ipu3/ipu3-cio2.c
932
fbpt_rp = (readl(cio2->base + CIO2_REG_CDMARI(CIO2_DMA_CHAN))
drivers/media/pci/intel/ipu6/ipu6-buttress.c
148
val = readl(isp->base + ipc->csr_in);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
213
*ipc_msg = readl(isp->base + ipc->data0_in);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
351
irq_status = readl(isp->base + reg_irq_sts);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
410
irq_status = readl(isp->base + reg_irq_sts);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
490
val = readl(isp->base + BUTTRESS_REG_SECURITY_CTL);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
502
val = readl(isp->base + BUTTRESS_REG_SECURITY_CTL);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
735
val = readl(isp->base + BUTTRESS_REG_PWR_STATE);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
764
val = readl(isp->base + BUTTRESS_REG_TSW_CTL);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
78
val = readl(isp->base + ipc->csr_in);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
783
tsc_hi_1 = readl(isp->base + BUTTRESS_REG_TSC_HI);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
784
tsc_lo = readl(isp->base + BUTTRESS_REG_TSC_LO);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
785
tsc_hi_2 = readl(isp->base + BUTTRESS_REG_TSC_HI);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
850
readl(isp->base + BUTTRESS_REG_SECURITY_TOUCH),
drivers/media/pci/intel/ipu6/ipu6-buttress.c
851
readl(isp->base + BUTTRESS_REG_CAMERA_MASK));
drivers/media/pci/intel/ipu6/ipu6-buttress.c
853
b->wdt_cached_value = readl(isp->base + BUTTRESS_REG_WDT);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
858
val = readl(isp->base + BUTTRESS_REG_BTRS_CTRL);
drivers/media/pci/intel/ipu6/ipu6-buttress.c
97
val = readl(isp->base + ipc->csr_in);
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
298
state = readl(BUTTRESS_FW_BOOT_PARAM_REG(ctx->base_addr,
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
329
state = readl(BUTTRESS_FW_BOOT_PARAM_REG(ctx->base_addr,
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
345
wr = readl(q_dmem + FW_COM_WR_REG);
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
346
rd = readl(q_dmem + FW_COM_RD_REG);
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
359
index = readl(q_dmem + FW_COM_WR_REG);
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
369
unsigned int wr = readl(q_dmem + FW_COM_WR_REG) + 1;
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
385
wr = readl(q_dmem + FW_COM_WR_REG);
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
386
rd = readl(q_dmem + FW_COM_RD_REG);
drivers/media/pci/intel/ipu6/ipu6-fw-com.c
406
unsigned int rd = readl(q_dmem + FW_COM_RD_REG) + 1;
drivers/media/pci/intel/ipu6/ipu6-fw-isys.c
207
val = readl(spc_regs_base + IPU6_ISYS_REG_SPC_STATUS_CTRL);
drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c
200
u32 irq = readl(csi2->base + CSI_PORT_REG_BASE_IRQ_CSI +
drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c
151
completion = readl(base + IPU6_DWC_DPHY_TEST_IFC_REQ_COMPLETION);
drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c
82
data = readl(base + addr);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
106
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
119
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
124
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
129
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
134
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
77
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
83
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
89
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
95
val = readl(base + reg);
drivers/media/pci/intel/ipu6/ipu6-isys-mcd-phy.c
510
val = readl(isys_base + CSI_REG_HUB_GPREG_PHY_CTL(id));
drivers/media/pci/intel/ipu6/ipu6-isys-mcd-phy.c
545
val = readl(isys_base + CSI_REG_HUB_GPREG_PHY_CTL(id));
drivers/media/pci/intel/ipu6/ipu6-isys.c
316
status = readl(csi2->base + CSI_PORT_REG_BASE_IRQ_CSI_SYNC +
drivers/media/pci/intel/ipu6/ipu6-isys.c
360
status_csi = readl(isys->pdata->base + ctrl0_status);
drivers/media/pci/intel/ipu6/ipu6-isys.c
361
status_sw = readl(isys->pdata->base +
drivers/media/pci/intel/ipu6/ipu6-isys.c
392
status_csi = readl(isys->pdata->base + ctrl0_status);
drivers/media/pci/intel/ipu6/ipu6-isys.c
393
status_sw |= readl(isys->pdata->base +
drivers/media/pci/intel/ipu6/ipu6-isys.c
497
fc.value = readl(isp->base + IPU6_BUTTRESS_FABIC_CONTROL);
drivers/media/pci/intel/ipu6/ipu6-mmu.c
75
readl(mmu->mmu_hw[i].base + REG_L1_PHYS);
drivers/media/pci/intel/ipu6/ipu6.c
274
val = readl(spc_regs_base + IPU6_PSYS_REG_SPC_STATUS_CTRL);
drivers/media/pci/intel/ipu6/ipu6.c
483
u32 val = readl(isp->base + BUTTRESS_REG_BTRS_CTRL);
drivers/media/pci/intel/ipu6/ipu6.c
671
val = readl(isp->base + BUTTRESS_REG_SKU);
drivers/media/pci/ivtv/ivtv-driver.h
797
do { writel(val, reg); readl(reg); } while (0)
drivers/media/pci/ivtv/ivtv-driver.h
799
#define read_reg(reg) readl(itv->reg_mem + (reg))
drivers/media/pci/ivtv/ivtv-driver.h
804
#define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
drivers/media/pci/ivtv/ivtv-driver.h
809
#define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
drivers/media/pci/ivtv/ivtv-firmware.c
173
if (readl(mem + i) == 0x12345678 &&
drivers/media/pci/ivtv/ivtv-firmware.c
174
readl(mem + i + 4) == 0x34567812 &&
drivers/media/pci/ivtv/ivtv-firmware.c
175
readl(mem + i + 8) == 0x56781234 &&
drivers/media/pci/ivtv/ivtv-firmware.c
176
readl(mem + i + 12) == 0x78123456) {
drivers/media/pci/ivtv/ivtv-ioctl.c
705
*val = readl(reg + reg_start);
drivers/media/pci/ivtv/ivtv-mailbox.c
133
u32 flags = readl(&mbdata->mbox[mb].flags);
drivers/media/pci/ivtv/ivtv-mailbox.c
194
i, readl(&mbdata->mbox[i].cmd), readl(&mbdata->mbox[i].flags));
drivers/media/pci/ivtv/ivtv-mailbox.c
253
api_info[cmd].name, mb, readl(&mbdata->mbox[mb].flags));
drivers/media/pci/ivtv/ivtv-mailbox.c
286
if (readl(&mbox->flags) & IVTV_MBOX_FIRMWARE_DONE)
drivers/media/pci/ivtv/ivtv-mailbox.c
290
while (!(readl(&mbox->flags) & IVTV_MBOX_FIRMWARE_DONE)) {
drivers/media/pci/ivtv/ivtv-mailbox.c
309
data[i] = readl(&mbox->data[i]);
drivers/media/pci/ivtv/ivtv-mailbox.c
364
data[i] = readl(p);
drivers/media/pci/mantis/mantis_common.h
46
#define mread(addr) readl(addr)
drivers/media/pci/netup_unidvb/netup_unidvb_core.c
184
__func__, readl(ndev->bmmio0 + AVL_PCIE_IENR),
drivers/media/pci/netup_unidvb/netup_unidvb_core.c
213
addr_curr = ((u64)readl(&dma->regs->curr_addr_hi) << 32) |
drivers/media/pci/netup_unidvb/netup_unidvb_core.c
214
(u64)readl(&dma->regs->curr_addr_lo) | dma->high_addr;
drivers/media/pci/netup_unidvb/netup_unidvb_core.c
257
reg40 = readl(ndev->bmmio0 + AVL_PCIE_ISR);
drivers/media/pci/ngene/ngene-core.c
44
#define ngreadl(adr) readl(dev->iomem + (adr))
drivers/media/pci/pluto2/pluto2.c
127
return readl(&pluto->io_mem[reg]);
drivers/media/pci/pluto2/pluto2.c
137
u32 val = readl(&pluto->io_mem[reg]);
drivers/media/pci/pluto2/pluto2.c
562
u32 val = readl(&cis[i]);
drivers/media/pci/pt1/pt1.c
295
return readl(pt1->regs + reg * 4);
drivers/media/pci/saa7134/saa7134.h
679
#define saa_readl(reg) readl(dev->lmmio + (reg))
drivers/media/pci/saa7134/saa7134.h
682
writel((readl(dev->lmmio+(reg)) & ~(mask)) |\
drivers/media/pci/saa7164/saa7164.h
624
#define saa7164_readl(reg) readl(dev->lmmio + ((reg) >> 2))
drivers/media/pci/saa7164/saa7164.h
627
#define saa7164_readb(reg) readl(dev->bmmio + (reg))
drivers/media/pci/smipcie/smipcie.h
295
#define smi_read(reg) readl(dev->lmmio + ((reg)>>2))
drivers/media/pci/smipcie/smipcie.h
299
writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
drivers/media/pci/solo6x10/solo6x10.h
277
return readl(solo_dev->reg_base + reg);
drivers/media/pci/tw5864/tw5864.h
167
#define tw_readl(reg) readl(dev->mmio + reg)
drivers/media/pci/tw68/tw68.h
167
#define tw_readl(reg) readl(dev->lmmio + ((reg) >> 2))
drivers/media/pci/tw68/tw68.h
173
writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
drivers/media/pci/tw68/tw68.h
181
writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
drivers/media/pci/tw686x/tw686x.h
147
return readl(dev->mmio + reg);
drivers/media/pci/zoran/zoran.h
300
#define btread(adr) readl(zr->zr36057_mem + (adr))
drivers/media/platform/amlogic/c3/isp/c3-isp-dev.c
23
return readl(isp->base + reg);
drivers/media/platform/amlogic/c3/mipi-adapter/c3-mipi-adap.c
270
orig = readl(addr);
drivers/media/platform/amphion/vpu_core.c
35
return readl(core->base + reg);
drivers/media/platform/amphion/vpu_drv.c
39
return readl(vpu->base + reg);
drivers/media/platform/amphion/vpu_malone.c
1089
wptr = readl(&str_buf->wptr);
drivers/media/platform/amphion/vpu_malone.c
1548
u32 wptr = readl(&str_buf->wptr);
drivers/media/platform/amphion/vpu_malone.c
1610
u32 wptr = readl(&str_buf->wptr);
drivers/media/platform/amphion/vpu_malone.c
527
desc->wptr = readl(&str_buf->wptr);
drivers/media/platform/amphion/vpu_malone.c
528
desc->rptr = readl(&str_buf->rptr);
drivers/media/platform/amphion/vpu_malone.c
529
desc->start = readl(&str_buf->start);
drivers/media/platform/amphion/vpu_malone.c
530
desc->end = readl(&str_buf->end);
drivers/media/platform/arm/mali-c55/mali-c55-core.c
110
return readl(mali_c55->base + addr);
drivers/media/platform/aspeed/aspeed-video.c
574
u32 t = readl(video->base + reg);
drivers/media/platform/aspeed/aspeed-video.c
581
reg, before, readl(video->base + reg));
drivers/media/platform/aspeed/aspeed-video.c
586
u32 t = readl(video->base + reg);
drivers/media/platform/aspeed/aspeed-video.c
596
readl(video->base + reg));
drivers/media/platform/atmel/atmel-isi.c
141
return readl(isi->regs + reg);
drivers/media/platform/broadcom/bcm2835-unicam.c
609
return readl(unicam->base + offset);
drivers/media/platform/cadence/cdns-csi2rx.c
214
error_status = readl(csi2rx->base + CSI2RX_ERROR_IRQS_REG);
drivers/media/platform/cadence/cdns-csi2rx.c
215
error_mask = readl(csi2rx->base + CSI2RX_ERROR_IRQS_MASK_REG);
drivers/media/platform/cadence/cdns-csi2rx.c
716
dev_cfg = readl(csi2rx->base + CSI2RX_DEVICE_CFG_REG);
drivers/media/platform/cadence/cdns-csi2tx.c
462
dev_cfg = readl(csi2tx->base + CSI2TX_DEVICE_CONFIG_REG);
drivers/media/platform/chips-media/coda/coda-common.c
91
data = readl(dev->regs_base + reg);
drivers/media/platform/chips-media/coda/imx-vdoa.c
116
val = readl(vdoa->regs + VDOAIST);
drivers/media/platform/chips-media/coda/imx-vdoa.c
119
val = readl(vdoa->regs + VDOASR) & VDOASR_ERRW;
drivers/media/platform/chips-media/wave5/wave5-vdi.c
85
return readl(vpu_dev->vdb_register + addr);
drivers/media/platform/imagination/e5010-jpeg-enc-hw.c
102
reg = readl(core_base + JASPER_INTERRUPT_STATUS_OFFSET);
drivers/media/platform/imagination/e5010-jpeg-enc-hw.c
23
reg = readl(base + offset);
drivers/media/platform/imagination/e5010-jpeg-enc-hw.c
259
return readl(core_base + JASPER_OUTPUT_SIZE_OFFSET);
drivers/media/platform/imagination/e5010-jpeg-enc-hw.c
94
reg = readl(core_base + JASPER_INTERRUPT_STATUS_OFFSET);
drivers/media/platform/imagination/e5010-jpeg-enc.c
960
ctx, readl(e5010->core_base + JASPER_OUTPUT_SIZE_OFFSET));
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
1801
irq_status = readl(jpeg->reg_base + JPEG_ENC_INT_STS) &
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
223
ret = readl(base + JPGDEC_REG_INTERRUPT_STATUS) & BIT_INQST_MASK_ALLIRQ;
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
190
value = readl(base + JPEG_ENC_CTRL);
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
294
irq_status = readl(jpeg->reg_base + JPEG_ENC_INT_STS) &
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
69
return (readl(base + JPEG_ENC_DMA_ADDR0) << ((support_34bit) ? 2 : 0)) -
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
70
readl(base + JPEG_ENC_DST_ADDR0);
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
78
value = readl(base + JPEG_ENC_CTRL);
drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c
50
cg_status = readl(dev->reg_base[VDEC_SYS] + VDEC_HW_ACTIVE_ADDR);
drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c
69
dec_done_status = readl(vdec_misc_addr);
drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c
76
writel((readl(vdec_misc_addr) | VDEC_IRQ_CFG),
drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c
78
writel((readl(vdec_misc_addr) & ~VDEC_IRQ_CLR),
drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c
76
cg_status = readl(dev->reg_base[VDEC_HW_SYS] + VDEC_HW_ACTIVE_ADDR);
drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_hw.c
82
dec_done_status = readl(vdec_misc_addr);
drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_pm.c
163
ctx->dev->vdec_racing_info[j] = readl(vdec_racing_addr + j * 4);
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_if.c
185
seg_id_addr = readl(inst->reg_base.top + VP8_SEGID_DRAM_ADDR) >> 4;
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_if.c
206
seg_id_addr = readl(inst->reg_base.top + VP8_SEGID_DRAM_ADDR) >> 4;
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_if.c
213
val = readl(cm + VP8_HW_VLD_VALUE);
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_if.c
233
val = readl(misc + VP8_RW_MISC_SRST);
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_if.c
273
*p++ = readl(hwd + VP8_BSDSET);
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_if.c
274
*p++ = readl(hwd + VP8_BSDSET);
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_if.c
275
*p++ = readl(hwd + VP8_BSDSET) & 0xFFFFFF;
drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c
105
ctx->irq_status = readl(dev->reg_base[core_id] +
drivers/media/platform/mediatek/vcodec/encoder/venc/venc_h264_if.c
228
return readl(inst->hw_base + addr);
drivers/media/platform/mediatek/vcodec/encoder/venc/venc_vp8_if.c
136
return readl(inst->hw_base + addr);
drivers/media/platform/mediatek/vpu/mtk_vpu.c
234
return readl(vpu->reg.cfg + offset);
drivers/media/platform/mediatek/vpu/mtk_vpu.c
748
s32 id = readl(&rcv_obj->id);
drivers/media/platform/mediatek/vpu/mtk_vpu.c
752
ipi_desc[id].handler(data, readl(&rcv_obj->len),
drivers/media/platform/nuvoton/npcm-video.c
226
size = readl((void __iomem *)addr + offset);
drivers/media/platform/nxp/dw100/dw100.c
205
return readl(dw_dev->mmio + reg);
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg-hw.c
146
regval = readl(reg);
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg-hw.c
154
regval = readl(reg + GLB_CTRL);
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg-hw.c
162
regval = readl(reg + GLB_CTRL);
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg-hw.c
17
val = readl((base_address) + (reg_offset));\
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
1006
dec_ret = readl(reg + MXC_SLOT_OFFSET(slot, SLOT_STATUS));
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
1018
u32 ret = readl(reg + CAST_STATUS12);
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
1048
payload = readl(reg + MXC_SLOT_OFFSET(slot, SLOT_BUF_PTR));
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
949
curr_desc = readl(jpeg->base_reg + MXC_SLOT_OFFSET(ctx->slot, SLOT_CUR_DESCPT_PTR));
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
953
slot_status = readl(jpeg->base_reg + MXC_SLOT_OFFSET(ctx->slot, SLOT_STATUS));
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
964
slot_status = readl(jpeg->base_reg + MXC_SLOT_OFFSET(ctx->slot, SLOT_STATUS));
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
988
com_status = readl(reg + COM_STATUS);
drivers/media/platform/nxp/imx-mipi-csis.c
541
return readl(csis->regs + reg);
drivers/media/platform/nxp/imx7-media-csi.c
286
return readl(csi->regbase + offset);
drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c
19
return readl(pipe->regs + reg);
drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
18
return readl(pipe->regs + reg);
drivers/media/platform/nxp/mx2_emmaprp.c
262
readl(pcdev->base_emma + PRP_SOURCE_Y_PTR),
drivers/media/platform/nxp/mx2_emmaprp.c
263
readl(pcdev->base_emma + PRP_SRC_FRAME_SIZE),
drivers/media/platform/nxp/mx2_emmaprp.c
264
readl(pcdev->base_emma + PRP_DEST_Y_PTR),
drivers/media/platform/nxp/mx2_emmaprp.c
265
readl(pcdev->base_emma + PRP_DEST_CR_PTR),
drivers/media/platform/nxp/mx2_emmaprp.c
266
readl(pcdev->base_emma + PRP_DEST_CB_PTR),
drivers/media/platform/nxp/mx2_emmaprp.c
267
readl(pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE),
drivers/media/platform/nxp/mx2_emmaprp.c
268
readl(pcdev->base_emma + PRP_CNTL));
drivers/media/platform/nxp/mx2_emmaprp.c
317
tmp = readl(pcdev->base_emma + PRP_INTR_CNTL);
drivers/media/platform/nxp/mx2_emmaprp.c
326
tmp = readl(pcdev->base_emma + PRP_CNTL);
drivers/media/platform/nxp/mx2_emmaprp.c
342
irqst = readl(pcdev->base_emma + PRP_INTRSTATUS);
drivers/media/platform/qcom/camss/camss-csid-680.c
279
val = readl(csid->base + CSID_RDI_CFG0(vc));
drivers/media/platform/qcom/camss/camss-csid-680.c
369
val_top = readl(csid->base + CSID_TOP_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-680.c
373
val = readl(csid->base + CSID_CSI2_RX_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-680.c
377
buf_done_val = readl(csid->base + CSID_BUF_DONE_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-680.c
382
val = readl(csid->base + CSID_CSI2_RDIN_IRQ_STATUS(i));
drivers/media/platform/qcom/camss/camss-csid-gen3.c
203
val = readl(csid->base + CSID_RDI_CFG0(vc));
drivers/media/platform/qcom/camss/camss-csid-gen3.c
254
val = readl(csid->base + CSID_TOP_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-gen3.c
258
val = readl(csid->base + CSID_CSI2_RX_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-gen3.c
261
buf_done_val = readl(csid->base + CSID_BUF_DONE_IRQ_STATUS);
drivers/media/platform/qcom/camss/camss-csid-gen3.c
267
val = readl(csid->base + CSID_CSI2_RDIN_IRQ_STATUS(i));
drivers/media/platform/qcom/iris/iris_vpu3x.c
104
value = readl(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS);
drivers/media/platform/qcom/iris/iris_vpu3x.c
169
val = readl(core->reg_base + AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL);
drivers/media/platform/qcom/iris/iris_vpu3x.c
174
val = readl(core->reg_base + AON_WRAPPER_MVP_NOC_CORE_SW_RESET);
drivers/media/platform/qcom/iris/iris_vpu3x.c
185
val = readl(core->reg_base + AON_WRAPPER_SPARE);
drivers/media/platform/qcom/iris/iris_vpu3x.c
192
val = readl(core->reg_base + AON_WRAPPER_MVP_NOC_CORE_SW_RESET);
drivers/media/platform/qcom/iris/iris_vpu3x.c
204
val = readl(core->reg_base + AON_WRAPPER_MVP_NOC_CORE_CLK_CONTROL);
drivers/media/platform/qcom/iris/iris_vpu3x.c
24
value = readl(core->reg_base + WRAPPER_CORE_POWER_STATUS);
drivers/media/platform/qcom/iris/iris_vpu3x.c
40
value = readl(core->reg_base + WRAPPER_CORE_CLOCK_CONFIG);
drivers/media/platform/qcom/iris/iris_vpu3x.c
86
value = readl(core->reg_base + WRAPPER_CORE_CLOCK_CONFIG);
drivers/media/platform/qcom/iris/iris_vpu4x.c
106
value = readl(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS);
drivers/media/platform/qcom/iris/iris_vpu4x.c
226
u32 efuse_value = readl(core->reg_base + WRAPPER_EFUSE_MONITOR);
drivers/media/platform/qcom/iris/iris_vpu4x.c
288
u32 efuse_value = readl(core->reg_base + WRAPPER_EFUSE_MONITOR);
drivers/media/platform/qcom/iris/iris_vpu4x.c
298
value = readl(core->reg_base + WRAPPER_CORE_POWER_STATUS);
drivers/media/platform/qcom/iris/iris_vpu4x.c
303
value = readl(core->reg_base + WRAPPER_CORE_CLOCK_CONFIG);
drivers/media/platform/qcom/iris/iris_vpu4x.c
314
value = readl(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS);
drivers/media/platform/qcom/iris/iris_vpu4x.c
98
value = readl(core->reg_base + WRAPPER_CORE_CLOCK_CONFIG);
drivers/media/platform/qcom/iris/iris_vpu_common.c
114
intr_status = readl(core->reg_base + WRAPPER_INTR_STATUS);
drivers/media/platform/qcom/iris/iris_vpu_common.c
141
ctrl_status = readl(core->reg_base + CTRL_STATUS);
drivers/media/platform/qcom/iris/iris_vpu_common.c
147
wfi_status = readl(core->reg_base + WRAPPER_TZ_CPU_STATUS);
drivers/media/platform/qcom/iris/iris_vpu_common.c
169
ctrl_status = readl(core->reg_base + CTRL_STATUS);
drivers/media/platform/qcom/iris/iris_vpu_common.c
170
wfi_status = readl(core->reg_base + WRAPPER_TZ_CPU_STATUS);
drivers/media/platform/qcom/iris/iris_vpu_common.c
335
val = readl(core->reg_base + AON_WRAPPER_MVP_VIDEO_CTL_NOC_LPI_STATUS);
drivers/media/platform/qcom/iris/iris_vpu_common.c
38
mask_val = readl(core->reg_base + WRAPPER_INTR_MASK);
drivers/media/platform/qcom/iris/iris_vpu_common.c
84
ctrl_status = readl(core->reg_base + CTRL_STATUS);
drivers/media/platform/qcom/venus/firmware.c
177
reg = readl(wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
drivers/media/platform/qcom/venus/firmware.c
182
reg = readl(wrapper_base + WRAPPER_A9SS_SW_RESET);
drivers/media/platform/qcom/venus/hfi_venus.c
1145
status = readl(wrapper_base + WRAPPER_INTR_STATUS);
drivers/media/platform/qcom/venus/hfi_venus.c
1523
ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
drivers/media/platform/qcom/venus/hfi_venus.c
1550
cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6);
drivers/media/platform/qcom/venus/hfi_venus.c
1552
cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS);
drivers/media/platform/qcom/venus/hfi_venus.c
1553
ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
drivers/media/platform/qcom/venus/hfi_venus.c
1570
cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6);
drivers/media/platform/qcom/venus/hfi_venus.c
1572
cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS);
drivers/media/platform/qcom/venus/hfi_venus.c
1573
ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
drivers/media/platform/qcom/venus/hfi_venus.c
1603
ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
drivers/media/platform/qcom/venus/hfi_venus.c
477
mask_val = readl(wrapper_base + WRAPPER_INTR_MASK);
drivers/media/platform/qcom/venus/hfi_venus.c
490
ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
drivers/media/platform/qcom/venus/hfi_venus.c
521
ver = readl(wrapper_base + WRAPPER_HW_VERSION);
drivers/media/platform/qcom/venus/hfi_venus.c
611
val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT);
drivers/media/platform/qcom/venus/hfi_venus.c
629
val = readl(vbif_base + VBIF_AXI_HALT_CTRL0);
drivers/media/platform/raspberrypi/pisp_be/pisp_be.c
231
return readl(pispbe->be_reg_base + offset);
drivers/media/platform/raspberrypi/rp1-cfe/cfe.c
323
return readl(cfe->mipi_cfg_base + offset);
drivers/media/platform/raspberrypi/rp1-cfe/csi2.c
111
return readl(csi2->base + offset);
drivers/media/platform/raspberrypi/rp1-cfe/dphy.c
38
return readl(dphy->base + offset);
drivers/media/platform/raspberrypi/rp1-cfe/pisp-fe.c
148
return readl(fe->base + offset);
drivers/media/platform/renesas/rcar_drif.c
248
return readl(ch->base + offset);
drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-dev.c
27
orig = readl(ivc->base + addr);
drivers/media/platform/rockchip/rga/rga.h
136
return readl(rga->regs + reg);
drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c
639
return readl(rkcif->base_addr + addr);
drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c
557
return readl(interface->rkcif->base_addr + addr);
drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c
568
return readl(stream->rkcif->base_addr + addr);
drivers/media/platform/rockchip/rkisp1/rkisp1-common.h
568
return readl(rkisp1->base_addr + addr);
drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c
398
readx_poll_timeout(readl, rkisp1->base_addr + RKISP1_CIF_ISP_RIS,
drivers/media/platform/rockchip/rkvdec/rkvdec.c
1132
reg = readl(rkvdec->regs + RKVDEC_REG_QOS_CTRL);
drivers/media/platform/rockchip/rkvdec/rkvdec.c
1443
status = readl(rkvdec->regs + RKVDEC_REG_INTERRUPT);
drivers/media/platform/rockchip/rkvdec/rkvdec.c
1467
status = readl(rkvdec->regs + VDPU381_REG_STA_INT);
drivers/media/platform/rockchip/rkvdec/rkvdec.c
1496
status = readl(rkvdec->link + VDPU383_LINK_STA_INT);
drivers/media/platform/samsung/exynos-gsc/gsc-core.h
441
u32 cfg = readl(dev->regs + GSC_ENABLE);
drivers/media/platform/samsung/exynos-gsc/gsc-core.h
453
u32 cfg = readl(dev->regs + GSC_IRQ);
drivers/media/platform/samsung/exynos-gsc/gsc-core.h
463
u32 cfg = readl(dev->regs + GSC_IRQ);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
111
u32 cfg = readl(dev->regs + GSC_IN_CON);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
148
cfg = readl(dev->regs + GSC_IN_CON);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
169
cfg = readl(dev->regs + GSC_IN_CON);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
222
u32 cfg = readl(dev->regs + GSC_OUT_CON);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
25
cfg = readl(dev->regs + GSC_SW_RESET);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
268
cfg = readl(dev->regs + GSC_OUT_CON);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
289
cfg = readl(dev->regs + GSC_OUT_CON);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
372
cfg = readl(dev->regs + GSC_IN_CON);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
38
cfg = readl(dev->regs + GSC_IRQ);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
411
cfg = readl(dev->regs + GSC_OUT_CON);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
423
cfg = readl(dev->regs + GSC_ENABLE);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
50
cfg = readl(dev->regs + GSC_IRQ);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
61
u32 cfg = readl(dev->regs + GSC_IN_BASE_ADDR_Y_MASK);
drivers/media/platform/samsung/exynos-gsc/gsc-regs.c
75
u32 cfg = readl(dev->regs + GSC_OUT_BASE_ADDR_Y_MASK);
drivers/media/platform/samsung/exynos4-is/fimc-is.h
336
return readl(is->regs + offset);
drivers/media/platform/samsung/exynos4-is/fimc-is.h
346
return readl(is->pmu_regs + offset);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
103
u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
144
cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
149
cfg = readl(dev->regs + FLITE_REG_CISRCSIZE);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
163
cfg = readl(dev->regs + FLITE_REG_CIWDOFST);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
179
u32 cfg = readl(dev->regs + FLITE_REG_CIGENERAL);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
191
u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
219
u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
238
u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
25
cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
253
cfg = readl(dev->regs + FLITE_REG_CIOCAN);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
259
cfg = readl(dev->regs + FLITE_REG_CIOOFF);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
280
cfg = readl(dev->regs + FLITE_REG_CIFCNTSEQ);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
292
cfg = readl(dev->regs + FLITE_REG_CIFCNTSEQ);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
30
cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
301
u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
343
u32 cfg = readl(dev->regs + registers[i].offset);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
42
u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
49
u32 intsrc = readl(dev->regs + FLITE_REG_CISTATUS);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
56
u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
77
cfg = readl(dev->regs + FLITE_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
85
u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT);
drivers/media/platform/samsung/exynos4-is/fimc-lite-reg.c
92
u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
113
cfg = readl(dev->regs + FIMC_REG_CITRGFMT);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
141
cfg = readl(dev->regs + FIMC_REG_CITAREA);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
157
cfg = readl(dev->regs + FIMC_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
187
cfg = readl(dev->regs + FIMC_REG_CIOCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
213
u32 cfg = readl(dev->regs + FIMC_REG_ORGISIZE);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
223
u32 cfg = readl(dev->regs + FIMC_REG_CIOCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
23
cfg = readl(dev->regs + FIMC_REG_CISRCFMT);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
254
u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
28
cfg = readl(dev->regs + FIMC_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
323
cfg = readl(dev->regs + FIMC_REG_CISCCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
33
cfg = readl(dev->regs + FIMC_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
332
cfg = readl(dev->regs + FIMC_REG_CIEXTEN);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
351
cfg = readl(dev->regs + FIMC_REG_CIIMGCPT);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
365
u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
397
cfg = readl(dev->regs + FIMC_REG_CIOCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
444
cfg = readl(dev->regs + FIMC_REG_MSCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
490
cfg = readl(dev->regs + FIMC_REG_CIDMAPARAM);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
507
u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
522
u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
531
u32 cfg = readl(dev->regs + FIMC_REG_CIREAL_ISIZE);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
559
u32 cfg = readl(fimc->regs + FIMC_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
655
u32 cfg = readl(fimc->regs + FIMC_REG_CIWDOFST);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
677
cfg = readl(fimc->regs + FIMC_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
740
u32 cfg = readl(dev->regs + FIMC_REG_CIGCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
747
u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
757
u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
76
cfg = readl(dev->regs + FIMC_REG_CITRGFMT);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
771
reg = readl(dev->regs + FIMC_REG_CISTATUS2) & 0x3f;
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
775
reg = readl(dev->regs + FIMC_REG_CISTATUS);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
789
reg = readl(dev->regs + FIMC_REG_CISTATUS2);
drivers/media/platform/samsung/exynos4-is/fimc-reg.c
97
flip = readl(dev->regs + FIMC_REG_MSCTRL);
drivers/media/platform/samsung/exynos4-is/mipi-csis.c
272
#define s5pcsis_read(__csis, __r) readl(__csis->regs + __r)
drivers/media/platform/samsung/s3c-camif/camif-regs.c
14
#define camif_read(_camif, _off) readl((_camif)->io_base + (_off))
drivers/media/platform/samsung/s3c-camif/camif-regs.c
600
u32 cfg = readl(camif->io_base + registers[i].offset);
drivers/media/platform/samsung/s3c-camif/camif-regs.h
264
return readl(vp->camif->io_base + S3C_CAMIF_REG_CISTATUS(vp->id,
drivers/media/platform/samsung/s5p-g2d/g2d-hw.c
15
#define r(a) readl(d->regs + (a))
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
124
reg = readl(regs + EXYNOS3250_JPGCMOD);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
140
reg = readl(regs + EXYNOS3250_JPGMOD);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
162
reg = readl(regs + EXYNOS3250_JPGMOD);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
170
return readl(regs + EXYNOS3250_JPGMOD) &
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
186
reg = readl(regs + EXYNOS3250_QHTBL);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
197
reg = readl(regs + EXYNOS3250_QHTBL);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
209
reg = readl(regs + EXYNOS3250_QHTBL);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
236
return readl(regs + EXYNOS3250_JPGY);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
241
return readl(regs + EXYNOS3250_JPGX);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
249
reg = readl(regs + EXYNOS3250_JPGINTSE);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
28
reg = readl(regs + EXYNOS3250_SW_RESET);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
38
reg = readl(regs + EXYNOS3250_JPGDRI);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
421
return readl(regs + EXYNOS3250_JPGINTST);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
432
return readl(regs + EXYNOS3250_JPGCNT) & EXYNOS3250_JPGCNT_MASK;
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
475
return readl(regs + EXYNOS3250_TIMER_ST);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
64
reg = readl(base + EXYNOS3250_JPGCMOD) & ~EXYNOS3250_HALF_EN_MASK;
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos3250.c
73
reg = readl(regs + EXYNOS3250_JPGCMOD) &
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
141
reg = readl(base + EXYNOS4_IMG_FMT_REG) &
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
174
reg = readl(base + EXYNOS4_INT_EN_REG) & ~EXYNOS4_INT_EN_MASK;
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
177
reg = readl(base + EXYNOS4_INT_EN_REG) &
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
185
return readl(base + EXYNOS4_INT_STATUS_REG);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
192
reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~EXYNOS4_HUF_TBL_EN;
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
20
reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
206
reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~(EXYNOS4_SYS_INT_EN);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
24
reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
254
reg = readl(base + EXYNOS4_TBL_SEL_REG);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
264
reg = readl(base + EXYNOS4_TBL_SEL_REG);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
274
reg = readl(base + EXYNOS4_TBL_SEL_REG);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
290
return readl(base + EXYNOS4_BITSTREAM_SIZE_REG);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
300
return readl(base + EXYNOS4_DECODE_IMG_FMT_REG) &
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
36
reg = readl(base + EXYNOS4_JPEG_CNTL_REG);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-exynos4.c
67
reg = readl(base + EXYNOS4_IMG_FMT_REG) &
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
104
reg = readl(regs + S5P_JPG_QTBL);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
114
reg = readl(regs + S5P_JPG_HTBL);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
125
reg = readl(regs + S5P_JPG_HTBL);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
136
reg = readl(regs + S5P_JPGY_U);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
141
reg = readl(regs + S5P_JPGY_L);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
151
reg = readl(regs + S5P_JPGX_U);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
156
reg = readl(regs + S5P_JPGX_L);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
166
reg = readl(regs + S5P_JPGINTSE);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
177
reg = readl(regs + S5P_JPGINTSE);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
188
reg = readl(regs + S5P_JPGINTSE);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
197
return (int)((readl(regs + S5P_JPG_TIMER_ST) & S5P_TIMER_INT_STAT_MASK)
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
205
reg = readl(regs + S5P_JPG_TIMER_SE);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
214
reg = readl(regs + S5P_JPG_ENC_STREAM_INTSE);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
22
reg = readl(regs + S5P_JPG_SW_RESET);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
223
return (int)(readl(regs + S5P_JPG_ENC_STREAM_INTST) &
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
231
reg = readl(regs + S5P_JPG_ENC_STREAM_INTSE);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
245
reg = readl(regs + S5P_JPG_OUTFORM);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
26
reg = readl(regs + S5P_JPG_SW_RESET);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
266
reg = readl(regs + S5P_JPG_COEF(i));
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
279
return (int)((readl(regs + S5P_JPGINTST) & S5P_RESULT_STAT_MASK)
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
285
return !(int)((readl(regs + S5P_JPGINTST) & S5P_STREAM_STAT_MASK)
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
291
readl(regs + S5P_JPGINTST);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
293
readl(regs + S5P_JPGOPR);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
300
jpeg_size |= (readl(regs + S5P_JPGCNT_U) & 0xff) << 16;
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
301
jpeg_size |= (readl(regs + S5P_JPGCNT_M) & 0xff) << 8;
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
302
jpeg_size |= (readl(regs + S5P_JPGCNT_L) & 0xff);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
45
reg = readl(regs + S5P_JPGCMOD);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
59
reg = readl(regs + S5P_JPGMOD);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
74
reg = readl(regs + S5P_JPGMOD);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
82
return readl(regs + S5P_JPGMOD) & S5P_SUBSAMPLING_MODE_MASK;
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
89
reg = readl(regs + S5P_JPGDRI_U);
drivers/media/platform/samsung/s5p-jpeg/jpeg-hw-s5p.c
94
reg = readl(regs + S5P_JPGDRI_L);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
102
#define mfc_read(dev, offset) readl(dev->regs_base + (offset))
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1017
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1027
reg = readl(mfc_regs->e_rc_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1070
reg = readl(mfc_regs->e_gop_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1096
reg = readl(mfc_regs->e_rc_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1158
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1184
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1190
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1196
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1217
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1240
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1254
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1259
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1264
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1270
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1291
reg = readl(mfc_regs->e_h264_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1362
reg = readl(mfc_regs->e_gop_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1376
reg = readl(mfc_regs->e_rc_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1450
reg = readl(mfc_regs->e_rc_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1515
reg = readl(mfc_regs->e_gop_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1525
reg = readl(mfc_regs->e_rc_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1608
reg = readl(mfc_regs->e_gop_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1704
reg = readl(mfc_regs->e_rc_config);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1762
readl(mfc_regs->d_cpb_buffer_addr),
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1763
readl(mfc_regs->d_cpb_buffer_addr),
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
1764
readl(mfc_regs->d_cpb_buffer_addr));
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2271
ret = readl((void __iomem *)ofs);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2279
return readl(dev->mfc_regs->d_display_first_plane_addr);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2284
return readl(dev->mfc_regs->d_decoded_first_plane_addr);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2289
return readl(dev->mfc_regs->d_display_status);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2294
return readl(dev->mfc_regs->d_decoded_status);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2299
return readl(dev->mfc_regs->d_decoded_frame_type) &
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2306
return readl(dev->mfc_regs->d_display_frame_type) &
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2312
return readl(dev->mfc_regs->d_decoded_nal_size);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2317
return readl(dev->mfc_regs->risc2host_command) &
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2323
return readl(dev->mfc_regs->error_code);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2333
return readl(dev->mfc_regs->d_display_frame_width);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2338
return readl(dev->mfc_regs->d_display_frame_height);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2343
return readl(dev->mfc_regs->d_min_num_dpb);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2348
return readl(dev->mfc_regs->d_min_num_mv);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2353
return readl(dev->mfc_regs->d_min_scratch_buffer_size);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2358
return readl(dev->mfc_regs->e_min_scratch_buffer_size);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2363
return readl(dev->mfc_regs->ret_instance_id);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2368
return readl(dev->mfc_regs->e_num_dpb);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2373
return readl(dev->mfc_regs->e_stream_size);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
2378
return readl(dev->mfc_regs->e_slice_type);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
755
*y_addr = readl(mfc_regs->e_encoded_source_first_plane_addr);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
756
*c_addr = readl(mfc_regs->e_encoded_source_second_plane_addr);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
759
*c_1_addr = readl(mfc_regs->e_encoded_source_third_plane_addr);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
763
enc_recon_y_addr = readl(mfc_regs->e_recon_luma_dpb_addr);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
764
enc_recon_c_addr = readl(mfc_regs->e_recon_chroma_dpb_addr);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
910
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
918
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
925
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
932
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
939
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
946
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
953
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
962
reg = readl(mfc_regs->e_enc_options);
drivers/media/platform/st/sti/bdisp/bdisp-debug.c
475
#define DUMP(reg) seq_printf(s, #reg " \t0x%08X\n", readl(bdisp->regs + reg))
drivers/media/platform/st/sti/bdisp/bdisp-debug.c
561
readl(bdisp->regs + BLT_HFC_N + i * 4));
drivers/media/platform/st/sti/bdisp/bdisp-debug.c
565
readl(bdisp->regs + BLT_VFC_N + i * 4));
drivers/media/platform/st/sti/bdisp/bdisp-debug.c
571
readl(bdisp->regs + BLT_Y_HFC_N + i * 4));
drivers/media/platform/st/sti/bdisp/bdisp-debug.c
575
readl(bdisp->regs + BLT_Y_VFC_N + i * 4));
drivers/media/platform/st/sti/bdisp/bdisp-hw.c
377
writel(readl(bdisp->regs + BLT_CTL) | BLT_CTL_RESET,
drivers/media/platform/st/sti/bdisp/bdisp-hw.c
383
if (readl(bdisp->regs + BLT_STA1) & BLT_STA1_IDLE)
drivers/media/platform/st/sti/bdisp/bdisp-hw.c
406
its = readl(bdisp->regs + BLT_ITS);
drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c
180
u32 reg = readl(csi->regs + CSI_BUF_CTRL_REG);
drivers/media/platform/sunxi/sun4i-csi/sun4i_dma.c
381
reg = readl(csi->regs + CSI_INT_STA_REG);
drivers/media/platform/sunxi/sun8i-di/sun8i-di.c
35
return readl(dev->base + reg);
drivers/media/platform/sunxi/sun8i-di/sun8i-di.c
47
writel(readl(dev->base + reg) | bits, dev->base + reg);
drivers/media/platform/sunxi/sun8i-di/sun8i-di.c
53
u32 val = readl(dev->base + reg);
drivers/media/platform/sunxi/sun8i-rotate/sun8i_rotate.c
28
return readl(dev->base + reg);
drivers/media/platform/sunxi/sun8i-rotate/sun8i_rotate.c
38
writel(readl(dev->base + reg) | bits, dev->base + reg);
drivers/media/platform/synopsys/dw-mipi-csi2rx.c
198
return readl(csi2->base_addr + addr);
drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c
190
return readl(hdmirx_dev->regs + reg);
drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c
207
val = readl(hdmirx_dev->regs + reg) & ~mask;
drivers/media/platform/ti/davinci/vpif.h
24
#define regr(reg) readl((reg) + vpif_base)
drivers/media/platform/verisilicon/hantro.h
408
u32 val = readl(vpu->enc_base + reg);
drivers/media/platform/verisilicon/hantro.h
436
u32 val = readl(vpu->dec_base + reg);
drivers/media/platform/verisilicon/imx8m_vpu_hw.c
33
val = readl(vpu->ctrl_base + CTRL_SOFT_RESET);
drivers/media/platform/verisilicon/imx8m_vpu_hw.c
40
val = readl(vpu->ctrl_base + CTRL_SOFT_RESET);
drivers/media/platform/verisilicon/imx8m_vpu_hw.c
49
val = readl(vpu->ctrl_base + CTRL_CLOCK_ENABLE);
drivers/media/rc/meson-ir-tx.c
104
writel(readl(ir->reg_base + IRB_ADDR0) & ~IRB_INIT_HIGH,
drivers/media/rc/meson-ir-tx.c
108
writel(readl(ir->reg_base + IRB_ADDR0) | IRB_ENABLE,
drivers/media/rc/meson-ir-tx.c
199
writel(readl(ir->reg_base + IRB_ADDR3) & ~IRB_FIFO_THD_PENDING,
drivers/media/rc/st_rc.c
108
status = readl(dev->rx_base + IRB_RX_STATUS);
drivers/media/rc/st_rc.c
112
int_status = readl(dev->rx_base + IRB_RX_INT_STATUS);
drivers/media/rc/st_rc.c
122
symbol = readl(dev->rx_base + IRB_RX_SYS);
drivers/media/rc/st_rc.c
123
mark = readl(dev->rx_base + IRB_RX_ON);
drivers/media/rc/sunxi-cir.c
109
status = readl(ir->base + SUNXI_IR_RXSTA_REG);
drivers/media/rc/sunxi-cir.c
217
tmp = readl(ir->base + SUNXI_IR_CTL_REG);
drivers/memory/da8xx-ddrctl.c
138
reg = readl(ddrctl + knob->reg);
drivers/memory/emif.c
172
width = (readl(base + EMIF_SDRAM_CONFIG) & NARROW_MODE_MASK)
drivers/memory/emif.c
218
temp = readl(base + EMIF_POWER_MANAGEMENT_CONTROL);
drivers/memory/emif.c
462
temperature_level = readl(base + EMIF_LPDDR2_MODE_REG_DATA);
drivers/memory/emif.c
468
temp = readl(base + EMIF_LPDDR2_MODE_REG_DATA);
drivers/memory/emif.c
588
interrupts = readl(base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS);
drivers/memory/emif.c
604
interrupts = readl(base + EMIF_LL_OCP_INTERRUPT_STATUS);
drivers/memory/emif.c
651
writel(readl(base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS),
drivers/memory/emif.c
654
writel(readl(base + EMIF_LL_OCP_INTERRUPT_STATUS),
drivers/memory/emif.c
663
writel(readl(base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET),
drivers/memory/emif.c
666
writel(readl(base + EMIF_LL_OCP_INTERRUPT_ENABLE_SET),
drivers/memory/jz4780-nemc.c
130
nfcsr = readl(nemc->base + NEMC_NFCSR);
drivers/memory/jz4780-nemc.c
187
smcr = readl(nemc->base + NEMC_SMCRn(bank));
drivers/memory/jz4780-nemc.c
99
nfcsr = readl(nemc->base + NEMC_NFCSR);
drivers/memory/mtk-smi.c
211
reg_val = readl(common->smi_ao_base
drivers/memory/pl172.c
77
readl(pl172->base + reg_offset));
drivers/memory/renesas-rpc-if.c
113
*val = readl(rpc->base + reg);
drivers/memory/renesas-rpc-if.c
127
*val = readl(rpc->base + reg);
drivers/memory/renesas-rpc-if.c
184
*val = readl(xspi->base + reg);
drivers/memory/samsung/exynos-srom.c
162
rd->value = readl(base + rd->offset);
drivers/memory/samsung/exynos5422-dmc.c
854
val = readl(dmc->base_drexi0 + DREX_FLAG_PPC);
drivers/memory/samsung/exynos5422-dmc.c
860
val = readl(dmc->base_drexi1 + DREX_FLAG_PPC);
drivers/memory/tegra/tegra124-emc.c
533
value = readl(emc->regs + EMC_STATUS);
drivers/memory/tegra/tegra124-emc.c
550
value = readl(emc->regs + EMC_AUTO_CAL_STATUS);
drivers/memory/tegra/tegra124-emc.c
565
value = readl(emc->regs + EMC_INTSTATUS);
drivers/memory/tegra/tegra124-emc.c
620
val = readl(emc->regs + EMC_CFG);
drivers/memory/tegra/tegra124-emc.c
634
val = readl(emc->regs + EMC_SEL_DPD_CTRL);
drivers/memory/tegra/tegra124-emc.c
641
val = readl(emc->regs + EMC_BGBIAS_CTL0);
drivers/memory/tegra/tegra124-emc.c
662
val = readl(emc->regs + EMC_XM2DQSPADCTRL2);
drivers/memory/tegra/tegra124-emc.c
818
readl(emc->regs + EMC_INTSTATUS);
drivers/memory/tegra/tegra124-emc.c
858
readl(emc->regs + EMC_BGBIAS_CTL0) !=
drivers/memory/tegra/tegra124-emc.c
887
readl(emc->regs + emc_burst_regs[i]);
drivers/memory/tegra/tegra124-emc.c
889
timing->emc_cfg = readl(emc->regs + EMC_CFG);
drivers/memory/tegra/tegra124-emc.c
901
emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5);
drivers/memory/tegra/tegra186.c
116
value = readl(mc->regs + client->regs.sid.override);
drivers/memory/tegra/tegra186.c
94
value = readl(mc->regs + client->regs.sid.security);
drivers/memory/ti-aemif.c
185
val = readl(aemif->base + offset);
drivers/memory/ti-aemif.c
250
val = readl(aemif->base + offset);
drivers/memory/ti-aemif.c
275
val = readl(aemif->base + offset);
drivers/memory/ti-emif-pm.c
230
temp = readl(emif_instance->pm_data.ti_emif_base_addr_virt +
drivers/memstick/host/jmb38x_ms.c
169
while (!(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) {
drivers/memstick/host/jmb38x_ms.c
178
&& !(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) {
drivers/memstick/host/jmb38x_ms.c
179
host->io_word[0] = readl(host->addr + DATA);
drivers/memstick/host/jmb38x_ms.c
233
&& !(STATUS_FIFO_FULL & readl(host->addr + STATUS))) {
drivers/memstick/host/jmb38x_ms.c
244
while (!(STATUS_FIFO_FULL & readl(host->addr + STATUS))) {
drivers/memstick/host/jmb38x_ms.c
370
if (!(STATUS_HAS_MEDIA & readl(host->addr + STATUS))) {
drivers/memstick/host/jmb38x_ms.c
376
dev_dbg(&msh->dev, "control %08x\n", readl(host->addr + HOST_CONTROL));
drivers/memstick/host/jmb38x_ms.c
377
dev_dbg(&msh->dev, "status %08x\n", readl(host->addr + INT_STATUS));
drivers/memstick/host/jmb38x_ms.c
378
dev_dbg(&msh->dev, "hstatus %08x\n", readl(host->addr + STATUS));
drivers/memstick/host/jmb38x_ms.c
435
t_val = readl(host->addr + INT_STATUS_ENABLE);
drivers/memstick/host/jmb38x_ms.c
455
writel(HOST_CONTROL_LED | readl(host->addr + HOST_CONTROL),
drivers/memstick/host/jmb38x_ms.c
474
readl(host->addr + HOST_CONTROL));
drivers/memstick/host/jmb38x_ms.c
476
readl(host->addr + INT_STATUS));
drivers/memstick/host/jmb38x_ms.c
477
dev_dbg(&msh->dev, "c hstatus %08x\n", readl(host->addr + STATUS));
drivers/memstick/host/jmb38x_ms.c
479
host->req->int_reg = readl(host->addr + STATUS) & 0xff;
drivers/memstick/host/jmb38x_ms.c
489
t_val = readl(host->addr + INT_STATUS_ENABLE);
drivers/memstick/host/jmb38x_ms.c
499
writel((~HOST_CONTROL_LED) & readl(host->addr + HOST_CONTROL),
drivers/memstick/host/jmb38x_ms.c
522
irq_status = readl(host->addr + INT_STATUS);
drivers/memstick/host/jmb38x_ms.c
558
= readl(host->addr
drivers/memstick/host/jmb38x_ms.c
561
= readl(host->addr
drivers/memstick/host/jmb38x_ms.c
639
| readl(host->addr + HOST_CONTROL),
drivers/memstick/host/jmb38x_ms.c
644
& readl(host->addr + HOST_CONTROL)))
drivers/memstick/host/jmb38x_ms.c
653
| readl(host->addr + HOST_CONTROL),
drivers/memstick/host/jmb38x_ms.c
658
& readl(host->addr + HOST_CONTROL)))
drivers/memstick/host/jmb38x_ms.c
677
unsigned int host_ctl = readl(host->addr + HOST_CONTROL);
drivers/memstick/host/r592.c
55
u32 value = readl(dev->mmio + address);
drivers/memstick/host/r592.c
88
u32 reg = readl(dev->mmio + address);
drivers/memstick/host/r592.c
97
u32 reg = readl(dev->mmio + address);
drivers/memstick/host/tifm_ms.c
108
&& !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
drivers/memstick/host/tifm_ms.c
109
host->io_word = readl(sock->addr + SOCK_MS_DATA);
drivers/memstick/host/tifm_ms.c
137
&& !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
drivers/memstick/host/tifm_ms.c
138
writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
drivers/memstick/host/tifm_ms.c
150
while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
drivers/memstick/host/tifm_ms.c
153
writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
drivers/memstick/host/tifm_ms.c
236
| readl(sock->addr + SOCK_MS_SYSTEM),
drivers/memstick/host/tifm_ms.c
241
| readl(sock->addr + SOCK_MS_SYSTEM),
drivers/memstick/host/tifm_ms.c
245
readl(sock->addr + SOCK_MS_DATA);
drivers/memstick/host/tifm_ms.c
311
writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
drivers/memstick/host/tifm_ms.c
315
sys_param = readl(sock->addr + SOCK_MS_SYSTEM);
drivers/memstick/host/tifm_ms.c
341
host->req->int_reg = readl(sock->addr + SOCK_MS_STATUS) & 0xff;
drivers/memstick/host/tifm_ms.c
356
writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
drivers/memstick/host/tifm_ms.c
388
fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
drivers/memstick/host/tifm_ms.c
389
host_status = readl(sock->addr + SOCK_MS_STATUS);
drivers/memstick/host/tifm_ms.c
424
host_status = readl(sock->addr + SOCK_MS_STATUS);
drivers/memstick/host/tifm_ms.c
444
writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM),
drivers/memstick/host/tifm_ms.c
520
& readl(sock->addr + SOCK_CONTROL),
drivers/memstick/host/tifm_ms.c
525
| readl(sock->addr + SOCK_CONTROL),
drivers/memstick/host/tifm_ms.c
540
readl(host->dev->addr + SOCK_MS_STATUS));
drivers/memstick/host/tifm_ms.c
557
& readl(sock->addr + SOCK_PRESENT_STATE))) {
drivers/memstick/host/tifm_ms.c
98
while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
drivers/message/fusion/mptbase.c
220
#define CHIPREG_READ32_dmasync(addr) readl(addr)
drivers/mfd/atmel-hlcdc.c
66
*val = readl(hregmap->regs + reg);
drivers/mfd/db8500-prcmu.c
1015
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(1))
drivers/mfd/db8500-prcmu.c
1046
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(1))
drivers/mfd/db8500-prcmu.c
1098
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(2))
drivers/mfd/db8500-prcmu.c
1195
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(3))
drivers/mfd/db8500-prcmu.c
1253
while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0)
drivers/mfd/db8500-prcmu.c
1256
val = readl(prcmu_base + clk_mgt[clock].offset);
drivers/mfd/db8500-prcmu.c
1279
val = readl(PRCM_CGATING_BYPASS);
drivers/mfd/db8500-prcmu.c
1286
val = readl(PRCM_CGATING_BYPASS);
drivers/mfd/db8500-prcmu.c
1295
return (readl(PRCM_PLLDSI_LOCKP) &
drivers/mfd/db8500-prcmu.c
1311
val = readl(PRCM_PLLDSI_ENABLE);
drivers/mfd/db8500-prcmu.c
1347
val = readl(PRCM_DSI_PLLOUT_SEL);
drivers/mfd/db8500-prcmu.c
1359
val = readl(PRCM_DSITVCLK_DIV);
drivers/mfd/db8500-prcmu.c
1403
val = readl(reg);
drivers/mfd/db8500-prcmu.c
1439
val = readl(prcmu_base + clk_mgt[clock].offset);
drivers/mfd/db8500-prcmu.c
1478
r = readl(PRCM_ARM_CHGCLKREQ);
drivers/mfd/db8500-prcmu.c
1490
r = readl(PRCM_ARMCLKFIX_MGT);
drivers/mfd/db8500-prcmu.c
1506
divsel = readl(PRCM_DSI_PLLOUT_SEL);
drivers/mfd/db8500-prcmu.c
1533
div = readl(PRCM_DSITVCLK_DIV);
drivers/mfd/db8500-prcmu.c
1600
val = readl(prcmu_base + clk_mgt[clock].offset);
drivers/mfd/db8500-prcmu.c
1757
while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0)
drivers/mfd/db8500-prcmu.c
1760
val = readl(prcmu_base + clk_mgt[clock].offset);
drivers/mfd/db8500-prcmu.c
1885
val = readl(PRCM_DSI_PLLOUT_SEL);
drivers/mfd/db8500-prcmu.c
1897
val = readl(PRCM_DSITVCLK_DIV);
drivers/mfd/db8500-prcmu.c
1926
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(4))
drivers/mfd/db8500-prcmu.c
1948
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(4))
drivers/mfd/db8500-prcmu.c
1966
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(4))
drivers/mfd/db8500-prcmu.c
1988
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(4))
drivers/mfd/db8500-prcmu.c
2022
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(4))
drivers/mfd/db8500-prcmu.c
2105
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(5))
drivers/mfd/db8500-prcmu.c
2155
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(5))
drivers/mfd/db8500-prcmu.c
2207
val = readl(PRCM_HOSTACCESS_REQ);
drivers/mfd/db8500-prcmu.c
2247
val = readl(PRCM_HOSTACCESS_REQ);
drivers/mfd/db8500-prcmu.c
2303
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(1))
drivers/mfd/db8500-prcmu.c
2324
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(0))
drivers/mfd/db8500-prcmu.c
2351
ev = readl(tcdm_base + PRCM_ACK_MB0_WAKEUP_1_8500);
drivers/mfd/db8500-prcmu.c
2353
ev = readl(tcdm_base + PRCM_ACK_MB0_WAKEUP_0_8500);
drivers/mfd/db8500-prcmu.c
2474
bits = (readl(PRCM_ARM_IT1_VAL) & ALL_MBOX_BITS);
drivers/mfd/db8500-prcmu.c
2637
version = readl(tcpm_base + DB8500_PRCMU_FW_VERSION_OFFSET);
drivers/mfd/db8500-prcmu.c
2701
val = readl(PRCM_A9PL_FORCE_CLKEN);
drivers/mfd/db8500-prcmu.c
546
return readl(prcmu_base + reg);
drivers/mfd/db8500-prcmu.c
564
val = readl(prcmu_base + reg);
drivers/mfd/db8500-prcmu.c
670
val = readl(PRCM_CLKOCR);
drivers/mfd/db8500-prcmu.c
701
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(0))
drivers/mfd/db8500-prcmu.c
744
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(0))
drivers/mfd/db8500-prcmu.c
814
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(1))
drivers/mfd/db8500-prcmu.c
866
while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0)
drivers/mfd/db8500-prcmu.c
873
val = readl(prcmu_base + clock_reg[i]);
drivers/mfd/db8500-prcmu.c
921
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(1))
drivers/mfd/db8500-prcmu.c
986
while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(1))
drivers/mfd/intel-lpss.c
141
lpss->active_ltr = readl(lpss->priv + LPSS_PRIV_ACTIVELTR);
drivers/mfd/intel-lpss.c
142
lpss->idle_ltr = readl(lpss->priv + LPSS_PRIV_IDLELTR);
drivers/mfd/intel-lpss.c
179
ltr = readl(lpss->priv + LPSS_PRIV_ACTIVELTR);
drivers/mfd/intel-lpss.c
413
lpss->caps = readl(lpss->priv + LPSS_PRIV_CAPS);
drivers/mfd/intel-lpss.c
506
lpss->priv_ctx[i] = readl(lpss->priv + i * 4);
drivers/mfd/intel-m10-bmc-pmci.c
100
cmd = readl(ctx->base + INDIRECT_CMD_OFF);
drivers/mfd/intel-m10-bmc-pmci.c
130
*buf++ = readl(base);
drivers/mfd/intel-m10-bmc-pmci.c
138
ret = read_poll_timeout(readl, val,
drivers/mfd/intel-m10-bmc-pmci.c
68
cmd = readl(ctx->base + INDIRECT_CMD_OFF);
drivers/mfd/intel-m10-bmc-pmci.c
81
tmpval = readl(ctx->base + INDIRECT_RD_OFF);
drivers/mfd/intel_pmc_bxt.c
115
new_val = readl(pmc->gcr_mem_base + offset);
drivers/mfd/intel_pmc_bxt.c
120
new_val = readl(pmc->gcr_mem_base + offset);
drivers/mfd/ioc3.c
109
pending = readl(®s->sio_ir);
drivers/mfd/ioc3.c
110
mask = readl(®s->sio_ies);
drivers/mfd/ioc3.c
196
writel(readl(&ipd->regs->port_a.sscr) & ~SSCR_DMA_EN,
drivers/mfd/ioc3.c
198
writel(readl(&ipd->regs->port_b.sscr) & ~SSCR_DMA_EN,
drivers/mfd/ipaq-micro.c
173
while ((status = readl(micro->base + UTSR1)) & UTSR1_RNE) {
drivers/mfd/ipaq-micro.c
174
ch = readl(micro->base + UTDR);
drivers/mfd/ipaq-micro.c
284
(readl(micro->base + UTSR1) & UTSR1_TNF)) {
drivers/mfd/ipaq-micro.c
290
val = readl(micro->base + UTCR3);
drivers/mfd/ipaq-micro.c
324
val = readl(micro->base + UTCR3);
drivers/mfd/ipaq-micro.c
335
status = readl(micro->base + UTSR0);
drivers/mfd/ipaq-micro.c
352
status = readl(micro->base + UTSR0);
drivers/mfd/ipaq-micro.c
56
val = readl(micro->base + UTCR3);
drivers/mfd/loongson-se.c
141
int_status = readl(se->base + SE_S2LINT_STAT);
drivers/mfd/lpc_ich.c
1270
val = readl(base + BYT_BCR);
drivers/mfd/lpc_ich.c
1274
val = readl(base + BYT_BCR);
drivers/mfd/ls2k-bmc-core.c
199
val = readl(base + LS7A_PCIE_PORT_CTL0);
drivers/mfd/ls2k-bmc-core.c
388
val = readl(gpio_base + LOONGSON_GPIO_OEN);
drivers/mfd/ls2k-bmc-core.c
392
val = readl(gpio_base + LOONGSON_GPIO_FUNC);
drivers/mfd/ls2k-bmc-core.c
396
val = readl(gpio_base + LOONGSON_GPIO_INTPOL);
drivers/mfd/ls2k-bmc-core.c
400
val = readl(gpio_base + LOONGSON_GPIO_INTEN);
drivers/mfd/qcom_rpm.c
611
fw_version[0] = readl(RPM_STATUS_REG(rpm, 0));
drivers/mfd/qcom_rpm.c
612
fw_version[1] = readl(RPM_STATUS_REG(rpm, 1));
drivers/mfd/qcom_rpm.c
613
fw_version[2] = readl(RPM_STATUS_REG(rpm, 2));
drivers/mfd/rz-mtu3.c
116
return readl(priv->mmio + ch_offs);
drivers/mfd/ssbi.c
76
return readl(ssbi->base + reg);
drivers/misc/bcm-vk/bcm_vk.h
451
return readl(vk->bar[bar] + offset);
drivers/misc/bcm-vk/bcm_vk_msg.c
910
wr_idx = readl(&msgq->wr_idx);
drivers/misc/cardreader/alcor_pci.c
86
return readl(priv->iobase + addr);
drivers/misc/dw-xdata-pcie.c
130
status = readl(&(__dw_regs(dw)->status));
drivers/misc/dw-xdata-pcie.c
142
*data = readl(&(__dw_regs(dw)->wr_cnt_msb));
drivers/misc/dw-xdata-pcie.c
144
*data |= readl(&(__dw_regs(dw)->wr_cnt_lsb));
drivers/misc/dw-xdata-pcie.c
146
*data = readl(&(__dw_regs(dw)->rd_cnt_msb));
drivers/misc/dw-xdata-pcie.c
148
*data |= readl(&(__dw_regs(dw)->rd_cnt_lsb));
drivers/misc/dw-xdata-pcie.c
85
burst = readl(&(__dw_regs(dw)->burst_cnt));
drivers/misc/ibmasm/ibmasmfs.c
509
value = readl(address);
drivers/misc/ibmasm/lowlevel.h
105
u32 mfa = readl(base_address + INBOUND_QUEUE_PORT);
drivers/misc/ibmasm/lowlevel.h
43
return SP_INTR_MASK & readl(base_address + INTR_STATUS_REGISTER);
drivers/misc/ibmasm/lowlevel.h
48
return UART_INTR_MASK & readl(base_address + INTR_STATUS_REGISTER);
drivers/misc/ibmasm/lowlevel.h
54
writel( readl(ctrl_reg) & ~mask, ctrl_reg);
drivers/misc/ibmasm/lowlevel.h
60
writel( readl(ctrl_reg) | mask, ctrl_reg);
drivers/misc/ibmasm/lowlevel.h
91
mfa = readl(base_address + OUTBOUND_QUEUE_PORT);
drivers/misc/ibmasm/remote.h
83
#define mouse_interrupt_pending(sp) readl(mouse_addr(sp) + CONDOR_MOUSE_ISR_STATUS)
drivers/misc/ibmasm/remote.h
91
#define get_queue_writer(sp) readl(mouse_addr(sp) + CONDOR_MOUSE_Q_WRITER)
drivers/misc/ibmasm/remote.h
92
#define get_queue_reader(sp) readl(mouse_addr(sp) + CONDOR_MOUSE_Q_READER)
drivers/misc/ibmasm/uart.c
30
if (0 == readl(iomem_base + UART_SCR)) {
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c
114
return (readl(priv->reg_base + INP_OFFSET(nr)) >> (nr % 32)) & 1;
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c
127
data = readl(priv->reg_base + OUT_OFFSET(nr));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c
309
int_status = readl(priv->reg_base + INTR_STATUS_OFFSET(gpiobank));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c
72
data = readl(priv->reg_base + INP_EN_OFFSET(nr));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c
76
data = readl(priv->reg_base + OUT_EN_OFFSET(nr));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c
89
data = readl(base_addr + reg_offset);
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
109
ret = read_poll_timeout(readl, regval, !(regval & EEPROM_CMD_EPC_BUSY_BIT),
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
144
ret = read_poll_timeout(readl, regval,
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
154
buf[byte] = readl(rb + MMAP_EEPROM_OFFSET(EEPROM_DATA_REG));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
189
ret = read_poll_timeout(readl, regval,
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
238
data = readl(rb + MMAP_OTP_OFFSET(OTP_FUNC_CMD_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
241
data = readl(rb + MMAP_OTP_OFFSET(OTP_CMD_GO_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
245
ret = read_poll_timeout(readl, regval,
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
251
data = readl(rb + MMAP_OTP_OFFSET(OTP_PASS_FAIL_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
257
buf[byte] = readl(rb + MMAP_OTP_OFFSET(OTP_RD_DATA_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
292
data = readl(rb + MMAP_OTP_OFFSET(OTP_PRGM_MODE_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
296
data = readl(rb + MMAP_OTP_OFFSET(OTP_FUNC_CMD_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
299
data = readl(rb + MMAP_OTP_OFFSET(OTP_CMD_GO_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
303
ret = read_poll_timeout(readl, regval,
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
309
data = readl(rb + MMAP_OTP_OFFSET(OTP_PASS_FAIL_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
358
data = readl(priv->reg_base + MMAP_OTP_OFFSET(OTP_PWR_DN_OFFSET));
drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c
83
data = readl(sys_lock);
drivers/misc/ocxl/mmio.c
130
tmp = readl((char *)afu->global_mmio_ptr + offset);
drivers/misc/ocxl/mmio.c
192
tmp = readl((char *)afu->global_mmio_ptr + offset);
drivers/misc/ocxl/mmio.c
24
*val = readl((char *)afu->global_mmio_ptr + offset);
drivers/misc/pci_endpoint_test.c
152
return readl(test->base + offset);
drivers/misc/tifm_7xx1.c
101
if (((readl(sock_addr + SOCK_PRESENT_STATE) >> 4) & 7)
drivers/misc/tifm_7xx1.c
111
& readl(sock_addr + SOCK_PRESENT_STATE)))
drivers/misc/tifm_7xx1.c
117
writel(readl(sock_addr + SOCK_CONTROL) & (~TIFM_CTRL_LED),
drivers/misc/tifm_7xx1.c
120
return (readl(sock_addr + SOCK_PRESENT_STATE) >> 4) & 7;
drivers/misc/tifm_7xx1.c
125
writel((~TIFM_CTRL_POWER_MASK) & readl(sock_addr + SOCK_CONTROL),
drivers/misc/tifm_7xx1.c
43
irq_status = readl(fm->addr + FM_INTERRUPT_STATUS);
drivers/misc/tifm_7xx1.c
87
& readl(sock_addr + SOCK_PRESENT_STATE)))
drivers/misc/tifm_7xx1.c
93
s_state = readl(sock_addr + SOCK_PRESENT_STATE);
drivers/misc/tifm_7xx1.c
97
writel(readl(sock_addr + SOCK_CONTROL) | TIFM_CTRL_LED,
drivers/misc/vmw_vmci/vmci_guest.c
105
return readl(dev->mmio_base + reg);
drivers/mmc/host/bcm2835.c
1079
u32 edm = readl(host->ioaddr + SDEDM);
drivers/mmc/host/bcm2835.c
1082
*(buf++) = readl(host->ioaddr + SDDATA);
drivers/mmc/host/bcm2835.c
1186
edm = readl(host->ioaddr + SDEDM);
drivers/mmc/host/bcm2835.c
1192
readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK,
drivers/mmc/host/bcm2835.c
227
dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD));
drivers/mmc/host/bcm2835.c
228
dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG));
drivers/mmc/host/bcm2835.c
229
dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT));
drivers/mmc/host/bcm2835.c
230
dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV));
drivers/mmc/host/bcm2835.c
231
dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0));
drivers/mmc/host/bcm2835.c
232
dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1));
drivers/mmc/host/bcm2835.c
233
dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2));
drivers/mmc/host/bcm2835.c
234
dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3));
drivers/mmc/host/bcm2835.c
235
dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS));
drivers/mmc/host/bcm2835.c
236
dev_dbg(dev, "SDVDD 0x%08x\n", readl(host->ioaddr + SDVDD));
drivers/mmc/host/bcm2835.c
237
dev_dbg(dev, "SDEDM 0x%08x\n", readl(host->ioaddr + SDEDM));
drivers/mmc/host/bcm2835.c
238
dev_dbg(dev, "SDHCFG 0x%08x\n", readl(host->ioaddr + SDHCFG));
drivers/mmc/host/bcm2835.c
239
dev_dbg(dev, "SDHBCT 0x%08x\n", readl(host->ioaddr + SDHBCT));
drivers/mmc/host/bcm2835.c
240
dev_dbg(dev, "SDHBLC 0x%08x\n", readl(host->ioaddr + SDHBLC));
drivers/mmc/host/bcm2835.c
259
temp = readl(host->ioaddr + SDEDM);
drivers/mmc/host/bcm2835.c
298
edm = readl(host->ioaddr + SDEDM);
drivers/mmc/host/bcm2835.c
368
edm = readl(host->ioaddr + SDEDM);
drivers/mmc/host/bcm2835.c
386
hsts = readl(host->ioaddr + SDHSTS);
drivers/mmc/host/bcm2835.c
410
*(buf++) = readl(host->ioaddr + SDDATA);
drivers/mmc/host/bcm2835.c
433
sdhsts = readl(host->ioaddr + SDHSTS);
drivers/mmc/host/bcm2835.c
647
sdhsts = readl(host->ioaddr + SDHSTS);
drivers/mmc/host/bcm2835.c
733
readl(host->ioaddr + SDHSTS));
drivers/mmc/host/bcm2835.c
755
u32 sdhsts = readl(host->ioaddr + SDHSTS);
drivers/mmc/host/bcm2835.c
772
edm = readl(host->ioaddr + SDEDM);
drivers/mmc/host/bcm2835.c
790
readl(host->ioaddr + SDRSP0 + i * 4);
drivers/mmc/host/bcm2835.c
793
cmd->resp[0] = readl(host->ioaddr + SDRSP0);
drivers/mmc/host/bcm2835.c
979
intmask = readl(host->ioaddr + SDHSTS);
drivers/mmc/host/davinci_mmc.c
1030
if (!(readl(host->base + DAVINCI_SDIOST0) & SDIOST0_DAT1_HI)) {
drivers/mmc/host/davinci_mmc.c
1035
writel(readl(host->base + DAVINCI_SDIOIEN) |
drivers/mmc/host/davinci_mmc.c
1040
writel(readl(host->base + DAVINCI_SDIOIEN) & ~SDIOIEN_IOINTEN,
drivers/mmc/host/davinci_mmc.c
244
*((u32 *)p) = readl(host->base + DAVINCI_MMCDRR);
drivers/mmc/host/davinci_mmc.c
585
mmcst1 = readl(host->base + DAVINCI_MMCST1);
drivers/mmc/host/davinci_mmc.c
648
temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK;
drivers/mmc/host/davinci_mmc.c
661
temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN;
drivers/mmc/host/davinci_mmc.c
666
temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK;
drivers/mmc/host/davinci_mmc.c
701
writel((readl(host->base + DAVINCI_MMCCTL) &
drivers/mmc/host/davinci_mmc.c
708
writel((readl(host->base + DAVINCI_MMCCTL) &
drivers/mmc/host/davinci_mmc.c
712
writel(readl(host->base + DAVINCI_MMCCTL) |
drivers/mmc/host/davinci_mmc.c
719
writel(readl(host->base + DAVINCI_MMCCTL) &
drivers/mmc/host/davinci_mmc.c
723
writel(readl(host->base + DAVINCI_MMCCTL) &
drivers/mmc/host/davinci_mmc.c
740
u32 tmp = readl(host->base + DAVINCI_MMCST0);
drivers/mmc/host/davinci_mmc.c
766
if (host->sdio_int && !(readl(host->base + DAVINCI_SDIOST0) &
drivers/mmc/host/davinci_mmc.c
798
cmd->resp[3] = readl(host->base + DAVINCI_MMCRSP01);
drivers/mmc/host/davinci_mmc.c
799
cmd->resp[2] = readl(host->base + DAVINCI_MMCRSP23);
drivers/mmc/host/davinci_mmc.c
800
cmd->resp[1] = readl(host->base + DAVINCI_MMCRSP45);
drivers/mmc/host/davinci_mmc.c
801
cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67);
drivers/mmc/host/davinci_mmc.c
804
cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67);
drivers/mmc/host/davinci_mmc.c
822
temp = readl(host->base + DAVINCI_MMCCTL);
drivers/mmc/host/davinci_mmc.c
846
status = readl(host->base + DAVINCI_SDIOIST);
drivers/mmc/host/davinci_mmc.c
865
status = readl(host->base + DAVINCI_MMCST0);
drivers/mmc/host/davinci_mmc.c
873
status = readl(host->base + DAVINCI_MMCST0);
drivers/mmc/host/davinci_mmc.c
893
im_val = readl(host->base + DAVINCI_MMCIM);
drivers/mmc/host/davinci_mmc.c
898
status = readl(host->base + DAVINCI_MMCST0);
drivers/mmc/host/jz4740_mmc.c
210
return readl(host->base + JZ_REG_MMC_IREG);
drivers/mmc/host/jz4740_mmc.c
440
status = readl(host->base + JZ_REG_MMC_STATUS);
drivers/mmc/host/jz4740_mmc.c
452
status = readl(host->base + JZ_REG_MMC_STATUS);
drivers/mmc/host/jz4740_mmc.c
496
status = readl(host->base + JZ_REG_MMC_STATUS);
drivers/mmc/host/jz4740_mmc.c
592
buf[0] = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
593
buf[1] = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
594
buf[2] = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
595
buf[3] = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
596
buf[4] = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
597
buf[5] = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
598
buf[6] = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
599
buf[7] = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
611
*buf++ = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
615
d = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
626
status = readl(host->base + JZ_REG_MMC_STATUS);
drivers/mmc/host/jz4740_mmc.c
628
d = readl(fifo_addr);
drivers/mmc/host/jz4740_mmc.c
629
status = readl(host->base + JZ_REG_MMC_STATUS);
drivers/mmc/host/jz4740_mmc.c
846
status = readl(host->base + JZ_REG_MMC_STATUS);
drivers/mmc/host/loongson2-mmc.c
692
val = readl(regs);
drivers/mmc/host/loongson2-mmc.c
724
val = readl(regs);
drivers/mmc/host/meson-gx-mmc.c
1080
regval = readl(host->regs + SD_EMMC_STATUS);
drivers/mmc/host/meson-gx-mmc.c
334
cfg = readl(host->regs + SD_EMMC_CFG);
drivers/mmc/host/meson-gx-mmc.c
348
cfg = readl(host->regs + SD_EMMC_CFG);
drivers/mmc/host/meson-gx-mmc.c
374
cfg = readl(host->regs + SD_EMMC_CFG);
drivers/mmc/host/meson-gx-mmc.c
509
unsigned int val = readl(host->regs + host->data->adjust);
drivers/mmc/host/meson-gx-mmc.c
521
val = readl(host->regs + host->data->adjust);
drivers/mmc/host/meson-gx-mmc.c
536
val = readl(host->regs + host->data->adjust);
drivers/mmc/host/meson-gx-mmc.c
639
val = readl(host->regs + SD_EMMC_CFG);
drivers/mmc/host/meson-gx-mmc.c
668
cfg = readl(host->regs + SD_EMMC_CFG);
drivers/mmc/host/meson-gx-mmc.c
777
*buf++ = readl(host->bounce_iomem_buf + offset + buf_offset);
drivers/mmc/host/meson-gx-mmc.c
912
cmd->resp[0] = readl(host->regs + SD_EMMC_CMD_RSP3);
drivers/mmc/host/meson-gx-mmc.c
913
cmd->resp[1] = readl(host->regs + SD_EMMC_CMD_RSP2);
drivers/mmc/host/meson-gx-mmc.c
914
cmd->resp[2] = readl(host->regs + SD_EMMC_CMD_RSP1);
drivers/mmc/host/meson-gx-mmc.c
915
cmd->resp[3] = readl(host->regs + SD_EMMC_CMD_RSP);
drivers/mmc/host/meson-gx-mmc.c
917
cmd->resp[0] = readl(host->regs + SD_EMMC_CMD_RSP);
drivers/mmc/host/meson-gx-mmc.c
940
raw_status = readl(host->regs + SD_EMMC_STATUS);
drivers/mmc/host/meson-gx-mmc.c
997
u32 start = readl(host->regs + SD_EMMC_START);
drivers/mmc/host/mmci.c
1316
writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
drivers/mmc/host/mmci.c
1330
if (readl(base + MMCICOMMAND) & host->variant->cmdreg_cpsm_enable) {
drivers/mmc/host/mmci.c
1416
remain = readl(host->base + MMCIDATACNT);
drivers/mmc/host/mmci.c
1515
cmd->resp[0] = readl(base + MMCIRESPONSE0);
drivers/mmc/host/mmci.c
1516
cmd->resp[1] = readl(base + MMCIRESPONSE1);
drivers/mmc/host/mmci.c
1517
cmd->resp[2] = readl(base + MMCIRESPONSE2);
drivers/mmc/host/mmci.c
1518
cmd->resp[3] = readl(base + MMCIRESPONSE3);
drivers/mmc/host/mmci.c
1574
status = readl(host->base + MMCISTATUS);
drivers/mmc/host/mmci.c
1594
return remain - (readl(host->base + MMCIFIFOCNT) << 2);
drivers/mmc/host/mmci.c
1615
u32 status = readl(host->base + MMCISTATUS);
drivers/mmc/host/mmci.c
1653
status = readl(base + MMCISTATUS);
drivers/mmc/host/mmci.c
1688
status = readl(base + MMCISTATUS);
drivers/mmc/host/mmci.c
1705
status = readl(base + MMCISTATUS);
drivers/mmc/host/mmci.c
1743
status = readl(base + MMCISTATUS);
drivers/mmc/host/mmci.c
1763
writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0);
drivers/mmc/host/mmci.c
1800
status = readl(host->base + MMCISTATUS);
drivers/mmc/host/mmci.c
1815
status &= readl(host->base + MMCIMASK0);
drivers/mmc/host/mmci.c
378
if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag)
drivers/mmc/host/mmci.c
608
writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK,
drivers/mmc/host/mmci.c
650
unsigned int mask0 = readl(base + MMCIMASK0);
drivers/mmc/host/mmci.c
698
writel(readl(base + MMCIMASK0) &
drivers/mmc/host/mmci.c
758
status = readl(base + MMCISTATUS);
drivers/mmc/host/mmci.c
762
writel(readl(base + MMCIMASK0) |
drivers/mmc/host/mmci.c
975
status = readl(host->base + MMCISTATUS);
drivers/mmc/host/moxart-mmc.c
187
*status = readl(host->base + REG_STATUS);
drivers/mmc/host/moxart-mmc.c
240
cmd->resp[3] = readl(host->base + REG_RESPONSE0);
drivers/mmc/host/moxart-mmc.c
241
cmd->resp[2] = readl(host->base + REG_RESPONSE1);
drivers/mmc/host/moxart-mmc.c
242
cmd->resp[1] = readl(host->base + REG_RESPONSE2);
drivers/mmc/host/moxart-mmc.c
243
cmd->resp[0] = readl(host->base + REG_RESPONSE3);
drivers/mmc/host/moxart-mmc.c
245
cmd->resp[0] = readl(host->base + REG_RESPONSE0);
drivers/mmc/host/moxart-mmc.c
406
if (readl(host->base + REG_STATUS) & CARD_DETECT) {
drivers/mmc/host/moxart-mmc.c
468
status = readl(host->base + REG_STATUS);
drivers/mmc/host/moxart-mmc.c
510
writel(readl(host->base + REG_POWER_CONTROL) & ~SD_POWER_ON,
drivers/mmc/host/moxart-mmc.c
539
return !!(readl(host->base + REG_STATUS) & WRITE_PROT);
drivers/mmc/host/moxart-mmc.c
595
host->fifo_width = readl(host->base + REG_FEATURE) << 2;
drivers/mmc/host/moxart-mmc.c
651
if (readl(host->base + REG_BUS_WIDTH) & BUS_WIDTH_4_SUPPORT)
drivers/mmc/host/moxart-mmc.c
658
if (!(readl(host->base + REG_COMMAND) & CMD_SDC_RESET))
drivers/mmc/host/moxart-mmc.c
697
writel(readl(host->base + REG_CLOCK_CONTROL) | CLK_OFF,
drivers/mmc/host/mtk-sd.c
1011
flags = readl(host->base + MSDC_INTEN);
drivers/mmc/host/mtk-sd.c
1231
rsp[0] = readl(host->base + SDC_ACMD_RESP);
drivers/mmc/host/mtk-sd.c
1264
reg_inten = readl(host->base + MSDC_INTEN);
drivers/mmc/host/mtk-sd.c
1266
reg_int = readl(host->base + MSDC_INT);
drivers/mmc/host/mtk-sd.c
1267
reg_ps = readl(host->base + MSDC_PS);
drivers/mmc/host/mtk-sd.c
1367
rsp[0] = readl(host->base + SDC_RESP3);
drivers/mmc/host/mtk-sd.c
1368
rsp[1] = readl(host->base + SDC_RESP2);
drivers/mmc/host/mtk-sd.c
1369
rsp[2] = readl(host->base + SDC_RESP1);
drivers/mmc/host/mtk-sd.c
1370
rsp[3] = readl(host->base + SDC_RESP0);
drivers/mmc/host/mtk-sd.c
1372
rsp[0] = readl(host->base + SDC_RESP0);
drivers/mmc/host/mtk-sd.c
1451
if ((readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_TXCNT) >> 16 ||
drivers/mmc/host/mtk-sd.c
1452
readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_RXCNT) {
drivers/mmc/host/mtk-sd.c
1578
readl(host->base + MSDC_DMA_CFG));
drivers/mmc/host/mtk-sd.c
1620
u32 val = readl(host->base + SDC_CFG);
drivers/mmc/host/mtk-sd.c
1672
u32 status = readl(host->base + MSDC_PS);
drivers/mmc/host/mtk-sd.c
1801
events = readl(host->base + MSDC_INT);
drivers/mmc/host/mtk-sd.c
1802
event_mask = readl(host->base + MSDC_INTEN);
drivers/mmc/host/mtk-sd.c
1883
val = readl(host->base + MSDC_INT);
drivers/mmc/host/mtk-sd.c
1913
pb2_val = readl(host->base + MSDC_PATCH_BIT2);
drivers/mmc/host/mtk-sd.c
2003
u32 top_ctl_val = readl(host->top_base + EMMC_TOP_CONTROL);
drivers/mmc/host/mtk-sd.c
2004
u32 top_cmd_val = readl(host->top_base + EMMC_TOP_CMD);
drivers/mmc/host/mtk-sd.c
2051
host->def_tune_para.iocon = readl(host->base + MSDC_IOCON);
drivers/mmc/host/mtk-sd.c
2052
host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON);
drivers/mmc/host/mtk-sd.c
2055
readl(host->top_base + EMMC_TOP_CONTROL);
drivers/mmc/host/mtk-sd.c
2057
readl(host->top_base + EMMC_TOP_CMD);
drivers/mmc/host/mtk-sd.c
2059
readl(host->top_base + EMMC_TOP_CONTROL);
drivers/mmc/host/mtk-sd.c
2061
readl(host->top_base + EMMC_TOP_CMD);
drivers/mmc/host/mtk-sd.c
2063
host->def_tune_para.pad_tune = readl(host->base + tune_reg);
drivers/mmc/host/mtk-sd.c
2064
host->saved_tune_para.pad_tune = readl(host->base + tune_reg);
drivers/mmc/host/mtk-sd.c
2082
val = readl(host->base + MSDC_INT);
drivers/mmc/host/mtk-sd.c
2225
u32 regval = readl(host->top_base + EMMC_TOP_CMD);
drivers/mmc/host/mtk-sd.c
2255
u32 regval = readl(host->top_base + EMMC_TOP_CONTROL);
drivers/mmc/host/mtk-sd.c
2576
host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON);
drivers/mmc/host/mtk-sd.c
2577
host->saved_tune_para.pad_tune = readl(host->base + tune_reg);
drivers/mmc/host/mtk-sd.c
2578
host->saved_tune_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
drivers/mmc/host/mtk-sd.c
2580
host->saved_tune_para.emmc_top_control = readl(host->top_base +
drivers/mmc/host/mtk-sd.c
2582
host->saved_tune_para.emmc_top_cmd = readl(host->top_base +
drivers/mmc/host/mtk-sd.c
2663
val = readl(host->top_base + EMMC50_PAD_DS_TUNE);
drivers/mmc/host/mtk-sd.c
2665
val = readl(host->base + PAD_DS_TUNE);
drivers/mmc/host/mtk-sd.c
2706
val = readl(host->base + MSDC_PS) & MSDC_PS_CDSTS;
drivers/mmc/host/mtk-sd.c
2805
val = readl(host->base + MSDC_INT);
drivers/mmc/host/mtk-sd.c
3214
host->save_para.msdc_cfg = readl(host->base + MSDC_CFG);
drivers/mmc/host/mtk-sd.c
3215
host->save_para.iocon = readl(host->base + MSDC_IOCON);
drivers/mmc/host/mtk-sd.c
3216
host->save_para.sdc_cfg = readl(host->base + SDC_CFG);
drivers/mmc/host/mtk-sd.c
3217
host->save_para.patch_bit0 = readl(host->base + MSDC_PATCH_BIT);
drivers/mmc/host/mtk-sd.c
3218
host->save_para.patch_bit1 = readl(host->base + MSDC_PATCH_BIT1);
drivers/mmc/host/mtk-sd.c
3219
host->save_para.patch_bit2 = readl(host->base + MSDC_PATCH_BIT2);
drivers/mmc/host/mtk-sd.c
3220
host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE);
drivers/mmc/host/mtk-sd.c
3221
host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
drivers/mmc/host/mtk-sd.c
3222
host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0);
drivers/mmc/host/mtk-sd.c
3223
host->save_para.emmc50_cfg3 = readl(host->base + EMMC50_CFG3);
drivers/mmc/host/mtk-sd.c
3224
host->save_para.sdc_fifo_cfg = readl(host->base + SDC_FIFO_CFG);
drivers/mmc/host/mtk-sd.c
3227
readl(host->top_base + EMMC_TOP_CONTROL);
drivers/mmc/host/mtk-sd.c
3229
readl(host->top_base + EMMC_TOP_CMD);
drivers/mmc/host/mtk-sd.c
3231
readl(host->top_base + EMMC50_PAD_DS_TUNE);
drivers/mmc/host/mtk-sd.c
3233
readl(host->top_base + LOOP_TEST_CONTROL);
drivers/mmc/host/mtk-sd.c
3235
host->save_para.pad_tune = readl(host->base + tune_reg);
drivers/mmc/host/mtk-sd.c
3337
val = readl(host->base + MSDC_INT);
drivers/mmc/host/mtk-sd.c
715
u32 val = readl(reg);
drivers/mmc/host/mtk-sd.c
723
u32 val = readl(reg);
drivers/mmc/host/mtk-sd.c
731
unsigned int tv = readl(reg);
drivers/mmc/host/mtk-sd.c
740
unsigned int tv = readl(reg);
drivers/mmc/host/mtk-sd.c
756
val = readl(host->base + MSDC_INT);
drivers/mmc/host/mtk-sd.c
960
val = readl(host->top_base + LOOP_TEST_CONTROL);
drivers/mmc/host/mvsdio.c
54
#define mvsd_read(offs) readl(iobase + (offs))
drivers/mmc/host/mxcmmc.c
190
return readl(host->base + reg);
drivers/mmc/host/mxs-mmc.c
132
cmd->resp[3] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
drivers/mmc/host/mxs-mmc.c
133
cmd->resp[2] = readl(ssp->base + HW_SSP_SDRESP1(ssp));
drivers/mmc/host/mxs-mmc.c
134
cmd->resp[1] = readl(ssp->base + HW_SSP_SDRESP2(ssp));
drivers/mmc/host/mxs-mmc.c
135
cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP3(ssp));
drivers/mmc/host/mxs-mmc.c
137
cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
drivers/mmc/host/mxs-mmc.c
185
stat = readl(ssp->base + HW_SSP_CTRL1(ssp));
drivers/mmc/host/mxs-mmc.c
424
val = readl(ssp->base + HW_SSP_TIMING(ssp));
drivers/mmc/host/mxs-mmc.c
533
if (enable && readl(ssp->base + HW_SSP_STATUS(ssp)) &
drivers/mmc/host/mxs-mmc.c
75
!(readl(ssp->base + HW_SSP_STATUS(ssp)) &
drivers/mmc/host/owl-mmc.c
125
regval = readl(reg);
drivers/mmc/host/owl-mmc.c
142
state = readl(owl_host->base + OWL_REG_SD_STATE);
drivers/mmc/host/owl-mmc.c
144
state = readl(owl_host->base + OWL_REG_SD_STATE);
drivers/mmc/host/owl-mmc.c
223
mode |= (readl(owl_host->base + OWL_REG_SD_CTL) & (0xff << 16));
drivers/mmc/host/owl-mmc.c
254
state = readl(owl_host->base + OWL_REG_SD_STATE);
drivers/mmc/host/owl-mmc.c
271
cmd->resp[3] = readl(owl_host->base + OWL_REG_SD_RSPBUF0);
drivers/mmc/host/owl-mmc.c
272
cmd->resp[2] = readl(owl_host->base + OWL_REG_SD_RSPBUF1);
drivers/mmc/host/owl-mmc.c
273
cmd->resp[1] = readl(owl_host->base + OWL_REG_SD_RSPBUF2);
drivers/mmc/host/owl-mmc.c
274
cmd->resp[0] = readl(owl_host->base + OWL_REG_SD_RSPBUF3);
drivers/mmc/host/owl-mmc.c
276
resp[0] = readl(owl_host->base + OWL_REG_SD_RSPBUF0);
drivers/mmc/host/owl-mmc.c
277
resp[1] = readl(owl_host->base + OWL_REG_SD_RSPBUF1);
drivers/mmc/host/owl-mmc.c
395
reg = readl(owl_host->base + OWL_REG_SD_CTL);
drivers/mmc/host/owl-mmc.c
441
reg = readl(owl_host->base + OWL_REG_SD_EN);
drivers/mmc/host/owl-mmc.c
475
mode = (readl(owl_host->base + OWL_REG_SD_CTL) & (0xff << 16));
drivers/mmc/host/pxamci.c
118
if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
drivers/mmc/host/pxamci.c
125
v = readl(host->base + MMC_STAT);
drivers/mmc/host/pxamci.c
289
v = readl(host->base + MMC_RES) & 0xffff;
drivers/mmc/host/pxamci.c
291
u32 w1 = readl(host->base + MMC_RES) & 0xffff;
drivers/mmc/host/pxamci.c
292
u32 w2 = readl(host->base + MMC_RES) & 0xffff;
drivers/mmc/host/pxamci.c
379
ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
drivers/mmc/host/pxamci.c
382
unsigned stat = readl(host->base + MMC_STAT);
drivers/mmc/host/renesas_sdhi_core.c
342
return readl(priv->scc_ctl + (addr << host->bus_shift));
drivers/mmc/host/renesas_sdhi_internal_dmac.c
337
u32 status = readl(host->ctl + DM_CM_INFO1);
drivers/mmc/host/sdhci-brcmstb.c
101
sr->sd_pin_sel = readl(cr + SDIO_CFG_SD_PIN_SEL);
drivers/mmc/host/sdhci-brcmstb.c
102
sr->phy_sw_mode0_rxctrl = readl(cr + SDIO_CFG_PHY_SW_MODE_0_RX_CTRL);
drivers/mmc/host/sdhci-brcmstb.c
103
sr->max_50mhz_mode = readl(cr + SDIO_CFG_MAX_50MHZ_MODE);
drivers/mmc/host/sdhci-brcmstb.c
217
reg = readl(host->ioaddr + SDHCI_VENDOR);
drivers/mmc/host/sdhci-brcmstb.c
280
reg = readl(brcmstb_priv->cfg_regs + SDIO_CFG_MAX_50MHZ_MODE);
drivers/mmc/host/sdhci-brcmstb.c
289
reg = readl(brcmstb_priv->cfg_regs + SDIO_CFG_CTRL);
drivers/mmc/host/sdhci-brcmstb.c
94
sr->boot_main_ctl = readl(priv->boot_regs + SDIO_BOOT_MAIN_CTL);
drivers/mmc/host/sdhci-brcmstb.c
97
sr->sd_pin_sel = readl(cr + SDIO_CFG_V1_SD_PIN_SEL);
drivers/mmc/host/sdhci-cadence.c
225
tmp = readl(priv->hrs_addr + SDHCI_CDNS_HRS06);
drivers/mmc/host/sdhci-cadence.c
235
tmp = readl(priv->hrs_addr + SDHCI_CDNS_HRS06);
drivers/mmc/host/sdhci-cadence.c
249
tmp = readl(reg);
drivers/mmc/host/sdhci-dove.c
38
ret = readl(host->ioaddr + reg);
drivers/mmc/host/sdhci-esdhc-imx.c
1034
val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
drivers/mmc/host/sdhci-esdhc-imx.c
1051
return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
drivers/mmc/host/sdhci-esdhc-imx.c
1089
ctrl = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1101
tuning_ctrl = readl(host->ioaddr + ESDHC_TUNING_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1108
sys_ctrl = readl(host->ioaddr + ESDHC_SYSTEM_CONTROL);
drivers/mmc/host/sdhci-esdhc-imx.c
1112
ctrl = readl(host->ioaddr + SDHCI_AUTO_CMD_STATUS);
drivers/mmc/host/sdhci-esdhc-imx.c
1127
ctrl = readl(host->ioaddr + SDHCI_INT_STATUS);
drivers/mmc/host/sdhci-esdhc-imx.c
1186
reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1193
val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS));
drivers/mmc/host/sdhci-esdhc-imx.c
1196
sys_ctrl = readl(host->ioaddr + ESDHC_SYSTEM_CONTROL);
drivers/mmc/host/sdhci-esdhc-imx.c
1210
reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1301
m = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1359
writel(readl(host->ioaddr + ESDHC_VENDOR_SPEC) &
drivers/mmc/host/sdhci-esdhc-imx.c
1399
m = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1548
writel(readl(host->ioaddr + SDHCI_HOST_CONTROL)
drivers/mmc/host/sdhci-esdhc-imx.c
1557
writel(readl(host->ioaddr + 0x6c) & ~BIT(7),
drivers/mmc/host/sdhci-esdhc-imx.c
1574
tmp = readl(host->ioaddr + ESDHC_VEND_SPEC2);
drivers/mmc/host/sdhci-esdhc-imx.c
1582
tmp = readl(host->ioaddr + ESDHC_TUNING_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1631
tmp = readl(host->ioaddr + ESDHC_TUNING_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1669
reg = readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
drivers/mmc/host/sdhci-esdhc-imx.c
1690
reg = readl(host->ioaddr + ESDHC_TUNING_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
1694
reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
2003
dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
drivers/mmc/host/sdhci-esdhc-imx.c
435
writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
drivers/mmc/host/sdhci-esdhc-imx.c
485
buswidth = USDHC_GET_BUSWIDTH(readl(host->ioaddr + SDHCI_HOST_CONTROL));
drivers/mmc/host/sdhci-esdhc-imx.c
517
reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
526
u32 val = readl(host->ioaddr + reg);
drivers/mmc/host/sdhci-esdhc-imx.c
559
val = readl(host->ioaddr + SDHCI_CAPABILITIES) & 0xFFFF;
drivers/mmc/host/sdhci-esdhc-imx.c
625
data = readl(host->ioaddr + SDHCI_HOST_CONTROL);
drivers/mmc/host/sdhci-esdhc-imx.c
642
v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
drivers/mmc/host/sdhci-esdhc-imx.c
678
val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
drivers/mmc/host/sdhci-esdhc-imx.c
684
val = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
687
val = readl(host->ioaddr + SDHCI_AUTO_CMD_STATUS);
drivers/mmc/host/sdhci-esdhc-imx.c
702
u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
727
new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
drivers/mmc/host/sdhci-esdhc-imx.c
737
new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
drivers/mmc/host/sdhci-esdhc-imx.c
744
u32 v = readl(host->ioaddr + SDHCI_AUTO_CMD_STATUS);
drivers/mmc/host/sdhci-esdhc-imx.c
764
v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
drivers/mmc/host/sdhci-esdhc-imx.c
771
u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
784
m = readl(host->ioaddr + ESDHC_WTMK_LVL);
drivers/mmc/host/sdhci-esdhc-imx.c
845
val = readl(host->ioaddr + reg);
drivers/mmc/host/sdhci-esdhc-imx.c
899
new_val = readl(host->ioaddr + SDHCI_HOST_CONTROL);
drivers/mmc/host/sdhci-esdhc-imx.c
924
new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
968
val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
drivers/mmc/host/sdhci-esdhc-imx.c
985
val = readl(host->ioaddr + ESDHC_DLL_CTRL);
drivers/mmc/host/sdhci-esdhc-imx.c
987
temp = readl(host->ioaddr + ESDHC_DLL_CTRL);
drivers/mmc/host/sdhci-esdhc-mcf.c
118
writel((readl(base) & mask) | (val << shift), base);
drivers/mmc/host/sdhci-esdhc-mcf.c
159
val = readl(host->ioaddr + reg);
drivers/mmc/host/sdhci-esdhc-mcf.c
248
temp = readl(pll_dr);
drivers/mmc/host/sdhci-esdhc-mcf.c
58
writel((readl(base) & ~mask) | val, base);
drivers/mmc/host/sdhci-esdhc-mcf.c
90
writel((readl(base) & mask) | (val << shift), base);
drivers/mmc/host/sdhci-iproc.c
36
u32 val = readl(host->ioaddr + reg);
drivers/mmc/host/sdhci-milbeaut.c
315
sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
drivers/mmc/host/sdhci-of-arasan.c
252
reg = readl(host->ioaddr + PHY_CTRL_REG2);
drivers/mmc/host/sdhci-of-arasan.c
265
reg = readl(host->ioaddr + PHY_CTRL_REG2);
drivers/mmc/host/sdhci-of-arasan.c
297
reg = readl(host->ioaddr + PHY_CTRL_REG2);
drivers/mmc/host/sdhci-of-aspeed.c
119
info = readl(sdc->regs + ASPEED_SDC_INFO);
drivers/mmc/host/sdhci-of-aspeed.c
149
reg = readl(sdc->regs + ASPEED_SDC_PHASE);
drivers/mmc/host/sdhci-of-aspeed.c
322
u32 val = readl(host->ioaddr + reg);
drivers/mmc/host/sdhci-of-at91.c
178
caps0 = readl(host->ioaddr + SDHCI_CAPABILITIES);
drivers/mmc/host/sdhci-of-at91.c
179
caps1 = readl(host->ioaddr + SDHCI_CAPABILITIES_1);
drivers/mmc/host/sdhci-omap.c
142
return readl(host->base + host->omap_offset + offset);
drivers/mmc/host/sdhci-omap.c
737
return readl(omap_host->base + 4) & 1;
drivers/mmc/host/sdhci-pci-core.c
1476
version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
drivers/mmc/host/sdhci-pci-core.c
2255
scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
drivers/mmc/host/sdhci-pci-core.c
756
intel_host->active_ltr = readl(host->ioaddr + INTEL_ACTIVELTR);
drivers/mmc/host/sdhci-pci-core.c
757
intel_host->idle_ltr = readl(host->ioaddr + INTEL_IDLELTR);
drivers/mmc/host/sdhci-pci-core.c
775
ltr = readl(host->ioaddr + INTEL_ACTIVELTR);
drivers/mmc/host/sdhci-pci-gli.c
1665
value = readl(host->ioaddr + reg);
drivers/mmc/host/sdhci-pci-gli.c
2016
u32 val = readl(host->ioaddr + (reg & ~3));
drivers/mmc/host/sdhci-pci-gli.c
2025
u32 val = readl(host->ioaddr + (reg & ~3));
drivers/mmc/host/sdhci-pic32.c
109
u32 bus = readl(host->ioaddr + SDH_SHARED_BUS_CTRL);
drivers/mmc/host/sdhci-pic32.c
131
host->caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
drivers/mmc/host/sdhci-pic32.c
217
scratch = readl(host->ioaddr + SDHCI_INT_STATUS);
drivers/mmc/host/sdhci-pltfm.c
168
int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
drivers/mmc/host/sdhci-pxav2.c
96
return readl(host->ioaddr + SDHCI_HOST_VERSION - 2) >> 16;
drivers/mmc/host/sdhci-s3c.c
270
ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
drivers/mmc/host/sdhci-s3c.c
279
ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
drivers/mmc/host/sdhci-spear.c
125
scratch = readl(host->ioaddr + SDHCI_INT_STATUS);
drivers/mmc/host/sdhci-st.c
232
value = readl(ioaddr + ST_MMC_STATUS_R);
drivers/mmc/host/sdhci.h
760
return readl(host->ioaddr + reg);
drivers/mmc/host/sdhci.h
798
return readl(host->ioaddr + reg);
drivers/mmc/host/sdricoh_cs.c
399
if (readl(iobase + R104_VERSION) != 0x4000) {
drivers/mmc/host/sdricoh_cs.c
91
unsigned int value = readl(host->iobase + reg);
drivers/mmc/host/sh_mmcif.c
260
writel(val | readl(host->addr + reg), host->addr + reg);
drivers/mmc/host/sh_mmcif.c
266
writel(~val & readl(host->addr + reg), host->addr + reg);
drivers/mmc/host/sunplus-mmc.c
207
value0_3 = readl(host->base + SPMMC_SD_RSPBUF0_3_REG);
drivers/mmc/host/sunplus-mmc.c
208
value4_5 = readl(host->base + SPMMC_SD_RSPBUF4_5_REG) & 0xffff;
drivers/mmc/host/sunplus-mmc.c
211
value0_3 = readl(host->base + SPMMC_SD_RSPBUF0_3_REG);
drivers/mmc/host/sunplus-mmc.c
212
value4_5 = readl(host->base + SPMMC_SD_RSPBUF4_5_REG) & 0xffff;
drivers/mmc/host/sunplus-mmc.c
216
value0_3 = readl(host->base + SPMMC_SD_RSPBUF0_3_REG);
drivers/mmc/host/sunplus-mmc.c
217
value4_5 = readl(host->base + SPMMC_SD_RSPBUF4_5_REG) & 0xffff;
drivers/mmc/host/sunplus-mmc.c
224
value0_3 = readl(host->base + SPMMC_SD_RSPBUF0_3_REG);
drivers/mmc/host/sunplus-mmc.c
225
value4_5 = readl(host->base + SPMMC_SD_RSPBUF4_5_REG) & 0xffff;
drivers/mmc/host/sunplus-mmc.c
236
u32 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
253
u32 value = readl(host->base + SPMMC_SD_CONFIG1_REG);
drivers/mmc/host/sunplus-mmc.c
254
int clkdiv = FIELD_GET(SPMMC_CLOCK_DIVISION, readl(host->base + SPMMC_SD_CONFIG0_REG));
drivers/mmc/host/sunplus-mmc.c
283
value = readl(host->base + SPMMC_SD_TIMING_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
294
value = readl(host->base + SPMMC_SD_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
298
value = readl(host->base + SPMMC_SD_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
306
u32 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
330
u32 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
346
value = readl(host->base + SPMMC_HW_DMA_CTRL_REG);
drivers/mmc/host/sunplus-mmc.c
351
value = readl(host->base + SPMMC_HW_DMA_CTRL_REG);
drivers/mmc/host/sunplus-mmc.c
369
value = readl(host->base + SPMMC_SD_INT_REG);
drivers/mmc/host/sunplus-mmc.c
374
value = readl(host->base + SPMMC_SD_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
407
value = readl(host->base + SPMMC_SD_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
413
srcdst = readl(host->base + SPMMC_CARD_MEDIATYPE_SRCDST_REG);
drivers/mmc/host/sunplus-mmc.c
422
srcdst = readl(host->base + SPMMC_CARD_MEDIATYPE_SRCDST_REG);
drivers/mmc/host/sunplus-mmc.c
478
value = readl(host->base + SPMMC_SD_INT_REG);
drivers/mmc/host/sunplus-mmc.c
492
u32 value = readl(host->base + SPMMC_SD_CTRL_REG);
drivers/mmc/host/sunplus-mmc.c
507
value = readl(host->base + SPMMC_SD_INT_REG);
drivers/mmc/host/sunplus-mmc.c
522
u32 value = readl(host->base + SPMMC_SD_STATE_REG);
drivers/mmc/host/sunplus-mmc.c
528
value = readl(host->base + SPMMC_SD_STATUS_REG);
drivers/mmc/host/sunplus-mmc.c
531
timing_cfg0 = readl(host->base + SPMMC_SD_TIMING_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
652
*buf = readl(host->base + SPMMC_SD_PIODATARX_REG);
drivers/mmc/host/sunplus-mmc.c
676
value = readl(host->base + SPMMC_CARD_MEDIATYPE_SRCDST_REG);
drivers/mmc/host/sunplus-mmc.c
716
u32 value = readl(host->base + SPMMC_SD_INT_REG);
drivers/mmc/host/sunplus-mmc.c
753
value = readl(host->base + SPMMC_SD_INT_REG);
drivers/mmc/host/sunplus-mmc.c
811
value = readl(host->base + SPMMC_SD_TIMING_CONFIG0_REG);
drivers/mmc/host/sunplus-mmc.c
829
value = readl(host->base + SPMMC_SD_TIMING_CONFIG0_REG);
drivers/mmc/host/sunxi-mmc.c
78
readl((host)->reg_base + SDXC_##reg)
drivers/mmc/host/tifm_sd.c
127
val = readl(sock->addr + SOCK_MMCSD_DATA);
drivers/mmc/host/tifm_sd.c
388
cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
drivers/mmc/host/tifm_sd.c
389
| readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
drivers/mmc/host/tifm_sd.c
390
cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
drivers/mmc/host/tifm_sd.c
391
| readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
drivers/mmc/host/tifm_sd.c
392
cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
drivers/mmc/host/tifm_sd.c
393
| readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
drivers/mmc/host/tifm_sd.c
394
cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
drivers/mmc/host/tifm_sd.c
395
| readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
drivers/mmc/host/tifm_sd.c
429
| readl(sock->addr
drivers/mmc/host/tifm_sd.c
440
& readl(sock->addr
drivers/mmc/host/tifm_sd.c
449
& readl(sock->addr
drivers/mmc/host/tifm_sd.c
479
fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
drivers/mmc/host/tifm_sd.c
508
host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
drivers/mmc/host/tifm_sd.c
600
& readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
drivers/mmc/host/tifm_sd.c
608
| readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
drivers/mmc/host/tifm_sd.c
647
| readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
drivers/mmc/host/tifm_sd.c
652
| readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
drivers/mmc/host/tifm_sd.c
716
writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
drivers/mmc/host/tifm_sd.c
753
& readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
drivers/mmc/host/tifm_sd.c
765
- readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
drivers/mmc/host/tifm_sd.c
768
- readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
drivers/mmc/host/tifm_sd.c
771
writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
drivers/mmc/host/tifm_sd.c
804
writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
drivers/mmc/host/tifm_sd.c
808
& readl(sock->addr + SOCK_MMCSD_CONFIG),
drivers/mmc/host/tifm_sd.c
829
& readl(sock->addr + SOCK_CONTROL),
drivers/mmc/host/tifm_sd.c
835
| readl(sock->addr + SOCK_CONTROL),
drivers/mmc/host/tifm_sd.c
844
& readl(sock->addr + SOCK_MMCSD_CONFIG)),
drivers/mmc/host/tifm_sd.c
864
if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE))
drivers/mmc/host/tifm_sd.c
891
if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
drivers/mmc/host/tifm_sd.c
914
host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
drivers/mmc/host/tifm_sd.c
944
& readl(sock->addr + SOCK_PRESENT_STATE))) {
drivers/mmc/host/uniphier-sd.c
336
tmp = readl(host->ctl + UNIPHIER_SD_DMA_RST);
drivers/mmc/host/uniphier-sd.c
475
tmp = readl(host->ctl + (CTL_SD_CARD_CLK_CTL << 1));
drivers/mmc/host/uniphier-sd.c
566
tmp = readl(host->ctl + UNIPHIER_SD_VOLT);
drivers/mmc/host/via-sdmmc.c
339
readl(addrbase + VIA_CRDR_SDCTRL),
drivers/mmc/host/via-sdmmc.c
340
readl(addrbase + VIA_CRDR_SDCARG),
drivers/mmc/host/via-sdmmc.c
341
readl(addrbase + VIA_CRDR_SDBUSMODE));
drivers/mmc/host/via-sdmmc.c
343
readl(addrbase + VIA_CRDR_SDBLKLEN),
drivers/mmc/host/via-sdmmc.c
344
readl(addrbase + VIA_CRDR_SDCURBLKCNT),
drivers/mmc/host/via-sdmmc.c
345
readl(addrbase + VIA_CRDR_SDINTMASK));
drivers/mmc/host/via-sdmmc.c
347
readl(addrbase + VIA_CRDR_SDSTATUS),
drivers/mmc/host/via-sdmmc.c
348
readl(addrbase + VIA_CRDR_SDCLKSEL),
drivers/mmc/host/via-sdmmc.c
349
readl(addrbase + VIA_CRDR_SDEXTCTRL));
drivers/mmc/host/via-sdmmc.c
410
pm_sdhc_reg->sdcontrol_reg = readl(addrbase + VIA_CRDR_SDCTRL);
drivers/mmc/host/via-sdmmc.c
411
pm_sdhc_reg->sdcmdarg_reg = readl(addrbase + VIA_CRDR_SDCARG);
drivers/mmc/host/via-sdmmc.c
412
pm_sdhc_reg->sdbusmode_reg = readl(addrbase + VIA_CRDR_SDBUSMODE);
drivers/mmc/host/via-sdmmc.c
413
pm_sdhc_reg->sdblklen_reg = readl(addrbase + VIA_CRDR_SDBLKLEN);
drivers/mmc/host/via-sdmmc.c
414
pm_sdhc_reg->sdcurblkcnt_reg = readl(addrbase + VIA_CRDR_SDCURBLKCNT);
drivers/mmc/host/via-sdmmc.c
415
pm_sdhc_reg->sdintmask_reg = readl(addrbase + VIA_CRDR_SDINTMASK);
drivers/mmc/host/via-sdmmc.c
416
pm_sdhc_reg->sdstatus_reg = readl(addrbase + VIA_CRDR_SDSTATUS);
drivers/mmc/host/via-sdmmc.c
417
pm_sdhc_reg->sdrsptmo_reg = readl(addrbase + VIA_CRDR_SDRSPTMO);
drivers/mmc/host/via-sdmmc.c
418
pm_sdhc_reg->sdclksel_reg = readl(addrbase + VIA_CRDR_SDCLKSEL);
drivers/mmc/host/via-sdmmc.c
419
pm_sdhc_reg->sdextctrl_reg = readl(addrbase + VIA_CRDR_SDEXTCTRL);
drivers/mmc/host/via-sdmmc.c
514
u32 dwdata0 = readl(addrbase + VIA_CRDR_SDRESP0);
drivers/mmc/host/via-sdmmc.c
515
u32 dwdata1 = readl(addrbase + VIA_CRDR_SDRESP1);
drivers/mmc/host/via-sdmmc.c
516
u32 dwdata2 = readl(addrbase + VIA_CRDR_SDRESP2);
drivers/mmc/host/via-sdmmc.c
517
u32 dwdata3 = readl(addrbase + VIA_CRDR_SDRESP3);
drivers/mmc/host/via-sdmmc.c
733
org_data = readl(addrbase + VIA_CRDR_SDBUSMODE);
drivers/mmc/host/via-sdmmc.c
734
sdextctrl = readl(addrbase + VIA_CRDR_SDEXTCTRL);
drivers/mmc/host/wmt-sdmmc.c
340
status = readl(priv->sdmmc_base + SDDMA_CCR) & 0x0F;
drivers/mmc/host/wmt-sdmmc.c
508
if ((readl(priv->sdmmc_base + SDDMA_GCR) & DMA_GCR_DMA_EN) != 0)
drivers/mmc/host/wmt-sdmmc.c
540
reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);
drivers/mmc/host/wmt-sdmmc.c
544
reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);
drivers/mmc/host/wmt-sdmmc.c
554
reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);
drivers/mtd/devices/spear_smi.c
229
ctrlreg1 = readl(dev->io_base + SMI_CR1);
drivers/mtd/devices/spear_smi.c
301
status = readl(dev->io_base + SMI_SR);
drivers/mtd/devices/spear_smi.c
387
ctrlreg1 = readl(dev->io_base + SMI_CR1);
drivers/mtd/devices/spear_smi.c
460
ctrlreg1 = readl(dev->io_base + SMI_CR1);
drivers/mtd/devices/spear_smi.c
576
ctrlreg1 = val = readl(dev->io_base + SMI_CR1);
drivers/mtd/devices/spear_smi.c
634
ctrlreg1 = readl(dev->io_base + SMI_CR1);
drivers/mtd/devices/spear_smi.c
758
val = readl(dev->io_base + SMI_CR1);
drivers/mtd/devices/spear_smi.c
777
val = readl(dev->io_base + SMI_RR);
drivers/mtd/devices/spear_smi.c
783
val = readl(dev->io_base + SMI_CR1);
drivers/mtd/devices/st_spi_fsm.c
1627
readl(fsm->base + SPI_FAST_SEQ_CFG);
drivers/mtd/devices/st_spi_fsm.c
1882
ret = readl(fsm->base + SPI_STA_MODE_CHANGE);
drivers/mtd/devices/st_spi_fsm.c
704
return readl(fsm->base + SPI_FAST_SEQ_STA) & 0x10;
drivers/mtd/devices/st_spi_fsm.c
709
return (readl(fsm->base + SPI_FAST_SEQ_STA) >> 5) & 0x7f;
drivers/mtd/devices/st_spi_fsm.c
808
readl(fsm->base + SPI_FAST_SEQ_DATA_REG);
drivers/mtd/devices/st_spi_fsm.c
830
readl(fsm->base + SPI_FAST_SEQ_DATA_REG);
drivers/mtd/maps/pci.c
49
val.x[0] = readl(map->base + map->translate(map, ofs));
drivers/mtd/maps/physmap-versatile.c
111
val = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);
drivers/mtd/maps/sc520cdp.c
192
mmcr_val = readl(&mmcr[SC520_PAR(j)]);
drivers/mtd/nand/ecc-mtk.c
162
enc = readl(ecc->regs + ecc->caps->ecc_regs[ECC_ENCIRQ_STA])
drivers/mtd/nand/ecc-mtk.c
231
err = readl(ecc->regs + ECC_DECENUM0 + offset);
drivers/mtd/nand/ecc-mxic.c
178
reg = readl(mxic->regs + DP_CONFIG);
drivers/mtd/nand/ecc-mxic.c
187
reg = readl(mxic->regs + DP_CONFIG);
drivers/mtd/nand/ecc-mxic.c
207
sts = readl(mxic->regs + INTRPT_STS);
drivers/mtd/nand/ecc-mxic.c
300
spare_reg = readl(mxic->regs + SPARE_SIZE);
drivers/mtd/nand/ecc-mxic.c
326
readl(mxic->regs + DP_VER) >> DP_VER_OFFSET);
drivers/mtd/nand/ecc-mxic.c
327
dev_dbg(dev, "Chunk size: %d\n", readl(mxic->regs + CHUNK_SIZE));
drivers/mtd/nand/ecc-mxic.c
328
dev_dbg(dev, "Main size: %d\n", readl(mxic->regs + MAIN_SIZE));
drivers/mtd/nand/onenand/onenand_samsung.c
147
return readl(onenand->base + offset);
drivers/mtd/nand/onenand/onenand_samsung.c
157
return readl(onenand->ahb_addr + cmd);
drivers/mtd/nand/onenand/onenand_samsung.c
548
status = readl(base + S5PC110_DMA_TRANS_STATUS);
drivers/mtd/nand/onenand/onenand_samsung.c
567
status = readl(base + S5PC110_INTC_DMA_STATUS);
drivers/mtd/nand/onenand/onenand_samsung.c
589
status = readl(base + S5PC110_INTC_DMA_MASK);
drivers/mtd/nand/raw/cafe_nand.c
101
#define cafe_readl(cafe, addr) readl((cafe)->mmio + CAFE_##addr)
drivers/mtd/nand/raw/cafe_nand.c
272
printk("Register %x: %08x\n", i, readl(cafe->mmio + i));
drivers/mtd/nand/raw/cafe_nand.c
438
printk("Register %x: %08x\n", i, readl(cafe->mmio + i));
drivers/mtd/nand/raw/cs553x_nand.c
230
ecc = readl(cs553x->mmio + MM_NAND_STS);
drivers/mtd/nand/raw/diskonchip.c
336
buf32[i] = readl(docptr + DoC_2k_CDSN_IO + i);
drivers/mtd/nand/raw/diskonchip.c
383
ident.dword = readl(docptr + DoC_2k_CDSN_IO);
drivers/mtd/nand/raw/fsmc_nand.c
1018
val = readl(host->regs_va + FSMC_PC);
drivers/mtd/nand/raw/fsmc_nand.c
1086
pid |= (readl(base + resource_size(res) - 0x20 + 4 * i) &
drivers/mtd/nand/raw/fsmc_nand.c
378
writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCPLEN_256,
drivers/mtd/nand/raw/fsmc_nand.c
380
writel_relaxed(readl(host->regs_va + FSMC_PC) & ~FSMC_ECCEN,
drivers/mtd/nand/raw/fsmc_nand.c
382
writel_relaxed(readl(host->regs_va + FSMC_PC) | FSMC_ECCEN,
drivers/mtd/nand/raw/gpio.c
67
tmp = readl(gpiomtd->io_sync);
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
208
reg = readl(r->gpmi_regs + i * 0x10);
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
215
reg = readl(r->bch_regs + i * 0x10);
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
54
while ((readl(addr) & mask) && --timeout)
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
98
while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout)
drivers/mtd/nand/raw/hisi504_nand.c
146
return readl(host->iobase + reg);
drivers/mtd/nand/raw/ingenic/jz4725b_bch.c
115
writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
drivers/mtd/nand/raw/ingenic/jz4725b_bch.c
258
reg = readl(bch->base + BCH_BHERR0 + (i * 4));
drivers/mtd/nand/raw/ingenic/jz4725b_bch.c
78
writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
drivers/mtd/nand/raw/ingenic/jz4740_ecc.c
130
reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
drivers/mtd/nand/raw/ingenic/jz4740_ecc.c
135
status = readl(ecc->base + JZ_REG_NAND_IRQ_STAT);
drivers/mtd/nand/raw/ingenic/jz4740_ecc.c
141
reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
drivers/mtd/nand/raw/ingenic/jz4740_ecc.c
152
error = readl(ecc->base + JZ_REG_NAND_ERR(i));
drivers/mtd/nand/raw/ingenic/jz4740_ecc.c
169
reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
drivers/mtd/nand/raw/ingenic/jz4740_ecc.c
53
reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
drivers/mtd/nand/raw/ingenic/jz4740_ecc.c
76
status = readl(ecc->base + JZ_REG_NAND_IRQ_STAT);
drivers/mtd/nand/raw/ingenic/jz4740_ecc.c
82
reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL);
drivers/mtd/nand/raw/ingenic/jz4780_bch.c
117
*dest32++ = readl(bch->base + BCH_BHPAR0 + offset);
drivers/mtd/nand/raw/ingenic/jz4780_bch.c
122
val = readl(bch->base + BCH_BHPAR0 + offset);
drivers/mtd/nand/raw/ingenic/jz4780_bch.c
214
reg = readl(bch->base + BCH_BHERR0 + (i * 4));
drivers/mtd/nand/raw/ingenic/jz4780_bch.c
68
writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
drivers/mtd/nand/raw/ingenic/jz4780_bch.c
85
writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
drivers/mtd/nand/raw/intel-nand-controller.c
401
reg_data = readl(ebu_host->hsnand + HSNAND_CTL);
drivers/mtd/nand/raw/intel-nand-controller.c
436
reg_data = readl(ebu_host->hsnand + HSNAND_CTL);
drivers/mtd/nand/raw/loongson-nand-controller.c
555
val = readl(host->reg_base + LOONGSON_NAND_IDH_STATUS);
drivers/mtd/nand/raw/loongson-nand-controller.c
781
val = readl(regs);
drivers/mtd/nand/raw/lpc32xx_mlc.c
466
mlc_isr = readl(MLC_ISR(host->io_base));
drivers/mtd/nand/raw/lpc32xx_mlc.c
483
readl(MLC_BUFF(host->io_base));
drivers/mtd/nand/raw/lpc32xx_mlc.c
489
readl(MLC_BUFF(host->io_base));
drivers/mtd/nand/raw/lpc32xx_slc.c
277
tmp = readl(SLC_CFG(host->io_base));
drivers/mtd/nand/raw/lpc32xx_slc.c
300
if ((readl(SLC_STAT(host->io_base)) & SLCSTAT_NAND_READY) != 0)
drivers/mtd/nand/raw/lpc32xx_slc.c
353
return (uint8_t)readl(SLC_DATA(host->io_base));
drivers/mtd/nand/raw/lpc32xx_slc.c
365
*buf++ = (uint8_t)readl(SLC_DATA(host->io_base));
drivers/mtd/nand/raw/lpc32xx_slc.c
509
writel(readl(SLC_CFG(host->io_base)) |
drivers/mtd/nand/raw/lpc32xx_slc.c
513
writel((readl(SLC_CFG(host->io_base)) |
drivers/mtd/nand/raw/lpc32xx_slc.c
526
writel(readl(SLC_CTRL(host->io_base)) | SLCCTRL_DMA_START,
drivers/mtd/nand/raw/lpc32xx_slc.c
555
if (readl(SLC_STAT(host->io_base)) & SLCSTAT_DMA_FIFO) {
drivers/mtd/nand/raw/lpc32xx_slc.c
558
while ((readl(SLC_STAT(host->io_base)) & SLCSTAT_DMA_FIFO) &&
drivers/mtd/nand/raw/lpc32xx_slc.c
571
readl(SLC_ECC(host->io_base));
drivers/mtd/nand/raw/lpc32xx_slc.c
576
if (readl(SLC_STAT(host->io_base)) & SLCSTAT_DMA_FIFO ||
drivers/mtd/nand/raw/lpc32xx_slc.c
577
readl(SLC_TC(host->io_base))) {
drivers/mtd/nand/raw/lpc32xx_slc.c
584
writel(readl(SLC_CTRL(host->io_base)) & ~SLCCTRL_DMA_START,
drivers/mtd/nand/raw/lpc32xx_slc.c
586
writel(readl(SLC_CFG(host->io_base)) &
drivers/mtd/nand/raw/lpc32xx_slc.c
960
tmp = readl(SLC_CTRL(host->io_base));
drivers/mtd/nand/raw/lpc32xx_slc.c
992
tmp = readl(SLC_CTRL(host->io_base));
drivers/mtd/nand/raw/marvell_nand.c
1890
writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN,
drivers/mtd/nand/raw/marvell_nand.c
1962
writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN,
drivers/mtd/nand/raw/marvell_nand.c
587
writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN,
drivers/mtd/nand/raw/marvell_nand.c
624
writel_relaxed(readl(nfc->regs + NDSR), nfc->regs + NDSR);
drivers/mtd/nand/raw/meson_nand.c
1516
cfg = readl(nfc->reg_base + NFC_REG_CFG);
drivers/mtd/nand/raw/meson_nand.c
462
cfg = readl(nfc->reg_base + NFC_REG_CFG);
drivers/mtd/nand/raw/meson_nand.c
492
cfg = readl(nfc->reg_base + NFC_REG_CFG);
drivers/mtd/nand/raw/mxc_nand.c
290
tmp = readl(NFC_V3_IPC);
drivers/mtd/nand/raw/mxc_nand.c
332
tmp = readl(NFC_V3_CONFIG2);
drivers/mtd/nand/raw/mxc_nand.c
417
u32 ecc_stat = readl(NFC_V1_V2_ECC_STATUS_RESULT);
drivers/mtd/nand/raw/mxc_nand.c
426
u32 ecc_stat = readl(NFC_V3_ECC_STATUS_RESULT);
drivers/mtd/nand/raw/mxc_nand.c
565
tmp = readl(NFC_V3_CONFIG1);
drivers/mtd/nand/raw/mxc_nand.c
641
return readl(NFC_V3_CONFIG1) >> 16;
drivers/mtd/nand/raw/mxc_nand.c
659
store = readl(main_buf);
drivers/mtd/nand/raw/mxc_nand.c
697
config2 = readl(NFC_V3_CONFIG2);
drivers/mtd/nand/raw/mxic_nand.c
288
sts = readl(nfc->regs + INT_STS);
drivers/mtd/nand/raw/mxic_nand.c
312
writel(readl(nfc->regs + HC_CFG) | HC_CFG_MAN_CS_EN,
drivers/mtd/nand/raw/mxic_nand.c
314
writel(HC_CFG_MAN_CS_ASSERT | readl(nfc->regs + HC_CFG),
drivers/mtd/nand/raw/mxic_nand.c
320
writel(~HC_CFG_MAN_CS_ASSERT & readl(nfc->regs + HC_CFG),
drivers/mtd/nand/raw/mxic_nand.c
374
data = readl(nfc->regs + RXD);
drivers/mtd/nand/raw/mxic_nand.c
379
if (readl(nfc->regs + INT_STS) & INT_RX_NOT_EMPTY)
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
158
u32 value = readl(nand->regs + MA35_NFI_REG_NANDRA0 + offset);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
182
*buf++ = readl(nand->regs + MA35_NFI_REG_NANDRA0 + off + (i * 4));
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
222
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
225
reg = readl(nand->regs + MA35_NFI_REG_NANDINTSTS);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
249
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
305
readl(nand->regs + MA35_NFI_REG_NANDCTL) & BCH_MASK);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
317
err_data[i] = readl(nand->regs + MA35_NFI_REG_NANDECCED0 + i * 4);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
334
temp_addr[i * 2 + 0] = readl(nand->regs + MA35_NFI_REG_NANDECCEA0 + i * 4)
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
336
temp_addr[i * 2 + 1] = (readl(nand->regs + MA35_NFI_REG_NANDECCEA0 + i * 4)
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
355
value = readl(nand->regs + MA35_NFI_REG_NANDRA0);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
375
offset = (readl(nand->regs + MA35_NFI_REG_NANDRACTL) & 0x1ff) -
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
380
value = readl(nand->regs + MA35_NFI_REG_NANDRA0 + offset - remain);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
398
status = readl(nand->regs + MA35_NFI_REG_NANDECCES0 + j * 4);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
449
reg = readl(nand->regs + MA35_NFI_REG_NANDRA0);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
463
writel(readl(nand->regs + MA35_NFI_REG_NANDCTL) | DMA_W_EN,
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
502
writel(readl(nand->regs + MA35_NFI_REG_NANDCTL) | DMA_R_EN,
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
512
reg = readl(nand->regs + MA35_NFI_REG_NANDINTSTS);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
517
writel(readl(nand->regs + MA35_NFI_REG_NANDCTL) | SWRST,
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
538
reg = readl(nand->regs + MA35_NFI_REG_NANDRACTL) | 0xffff0000;
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
560
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
575
reg = readl(nand->regs + MA35_NFI_REG_NANDRACTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
587
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
601
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
633
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
640
reg = readl(nand->regs + MA35_NFI_REG_NANDRA0);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
650
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
665
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
672
reg = readl(nand->regs + MA35_NFI_REG_NANDRA0);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
682
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
700
reg = readl(nand->regs + MA35_NFI_REG_NANDRA0);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
715
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
725
isr = readl(nand->regs + MA35_NFI_REG_NANDINTSTS);
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
747
reg = readl(nand->regs + MA35_NFI_REG_NANDCTL) & (~PSIZE_MASK);
drivers/mtd/nand/raw/omap2.c
1032
bch_val1 = readl(gpmc_regs->gpmc_bch_result0[i]);
drivers/mtd/nand/raw/omap2.c
1033
bch_val2 = readl(gpmc_regs->gpmc_bch_result1[i]);
drivers/mtd/nand/raw/omap2.c
1034
bch_val3 = readl(gpmc_regs->gpmc_bch_result2[i]);
drivers/mtd/nand/raw/omap2.c
1035
bch_val4 = readl(gpmc_regs->gpmc_bch_result3[i]);
drivers/mtd/nand/raw/omap2.c
1052
bch_val1 = readl(gpmc_regs->gpmc_bch_result0[i]);
drivers/mtd/nand/raw/omap2.c
1053
bch_val2 = readl(gpmc_regs->gpmc_bch_result1[i]);
drivers/mtd/nand/raw/omap2.c
1064
val = readl(gpmc_regs->gpmc_bch_result6[i]);
drivers/mtd/nand/raw/omap2.c
1067
val = readl(gpmc_regs->gpmc_bch_result5[i]);
drivers/mtd/nand/raw/omap2.c
1072
val = readl(gpmc_regs->gpmc_bch_result4[i]);
drivers/mtd/nand/raw/omap2.c
1077
val = readl(gpmc_regs->gpmc_bch_result3[i]);
drivers/mtd/nand/raw/omap2.c
1082
val = readl(gpmc_regs->gpmc_bch_result2[i]);
drivers/mtd/nand/raw/omap2.c
1087
val = readl(gpmc_regs->gpmc_bch_result1[i]);
drivers/mtd/nand/raw/omap2.c
1092
val = readl(gpmc_regs->gpmc_bch_result0[i]);
drivers/mtd/nand/raw/omap2.c
1167
nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
drivers/mtd/nand/raw/omap2.c
214
if (readl(info->reg.gpmc_prefetch_control))
drivers/mtd/nand/raw/omap2.c
242
config1 = readl(info->reg.gpmc_prefetch_config1);
drivers/mtd/nand/raw/omap2.c
287
r_count = readl(info->reg.gpmc_prefetch_status);
drivers/mtd/nand/raw/omap2.c
340
w_count = readl(info->reg.gpmc_prefetch_status);
drivers/mtd/nand/raw/omap2.c
352
val = readl(info->reg.gpmc_prefetch_status);
drivers/mtd/nand/raw/omap2.c
430
val = readl(info->reg.gpmc_prefetch_status);
drivers/mtd/nand/raw/omap2.c
508
bytes = readl(info->reg.gpmc_prefetch_status);
drivers/mtd/nand/raw/omap2.c
628
val = readl(info->reg.gpmc_prefetch_status);
drivers/mtd/nand/raw/omap2.c
847
val = readl(info->reg.gpmc_ecc_config);
drivers/mtd/nand/raw/omap2.c
852
val = readl(info->reg.gpmc_ecc1_result);
drivers/mtd/nand/raw/omap_elm.c
92
return readl(info->elm_base + offset);
drivers/mtd/nand/raw/pl35x-nand-controller.c
278
ecc_cfg = readl(nfc->conf_regs + PL35X_SMC_ECC_CFG);
drivers/mtd/nand/raw/pl35x-nand-controller.c
351
buf32[i] = readl(nfc->io_regs + data_phase_addr);
drivers/mtd/nand/raw/pl35x-nand-controller.c
456
ecc_value = readl(nfc->conf_regs + PL35X_SMC_ECC_VALUE(chunk));
drivers/mtd/nand/raw/pl35x-nand-controller.c
479
ecc_value = readl(nfc->conf_regs + PL35X_SMC_ECC_VALUE(chunk));
drivers/mtd/nand/raw/pl35x-nand-controller.c
893
plnand->ecc_cfg = readl(nfc->conf_regs + PL35X_SMC_ECC_CFG);
drivers/mtd/nand/raw/r852.c
51
uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
drivers/mtd/nand/raw/renesas-nand-controller.c
522
while (!FIFO_STATE_C_EMPTY(readl(rnandc->regs + FIFO_STATE_REG)))
drivers/mtd/nand/raw/renesas-nand-controller.c
525
while (FIFO_STATE_R_EMPTY(readl(rnandc->regs + FIFO_STATE_REG)))
drivers/mtd/nand/raw/renesas-nand-controller.c
531
if (!FIFO_STATE_R_EMPTY(readl(rnandc->regs + FIFO_STATE_REG))) {
drivers/mtd/nand/raw/renesas-nand-controller.c
665
while (FIFO_STATE_W_FULL(readl(rnandc->regs + FIFO_STATE_REG)))
drivers/mtd/nand/raw/renesas-nand-controller.c
671
while (!FIFO_STATE_W_EMPTY(readl(rnandc->regs + FIFO_STATE_REG)))
drivers/mtd/nand/raw/renesas-nand-controller.c
853
while (!FIFO_STATE_C_EMPTY(readl(rnandc->regs + FIFO_STATE_REG)))
drivers/mtd/nand/raw/renesas-nand-controller.c
856
while (FIFO_STATE_R_EMPTY(readl(rnandc->regs + FIFO_STATE_REG)))
drivers/mtd/nand/raw/renesas-nand-controller.c
866
if (!FIFO_STATE_R_EMPTY(readl(rnandc->regs + FIFO_STATE_REG))) {
drivers/mtd/nand/raw/renesas-nand-controller.c
872
while (FIFO_STATE_W_FULL(readl(rnandc->regs + FIFO_STATE_REG)))
drivers/mtd/nand/raw/renesas-nand-controller.c
884
while (!FIFO_STATE_W_EMPTY(readl(rnandc->regs + FIFO_STATE_REG)))
drivers/mtd/nand/raw/sh_flctl.c
1063
dev_err(&flctl->pdev->dev, "flste irq: %x\n", readl(FLINTDMACR(flctl)));
drivers/mtd/nand/raw/sh_flctl.c
260
val = readl(FLDTCNTR(flctl)) >> 16;
drivers/mtd/nand/raw/sh_flctl.c
274
len = (readl(FLDTCNTR(flctl)) >> 16) & 0xFF;
drivers/mtd/nand/raw/sh_flctl.c
300
size = readl(FLDTCNTR(flctl)) >> 24;
drivers/mtd/nand/raw/sh_flctl.c
305
if (!(readl(FL4ECCCR(flctl)) & _4ECCEND)) {
drivers/mtd/nand/raw/sh_flctl.c
315
if (readl(FL4ECCCR(flctl)) & _4ECCFA) {
drivers/mtd/nand/raw/sh_flctl.c
343
data = readl(ecc_reg[i]);
drivers/mtd/nand/raw/sh_flctl.c
369
len = (readl(FLDTCNTR(flctl)) >> 24) & 0xFF;
drivers/mtd/nand/raw/sh_flctl.c
404
reg = readl(FLINTDMACR(flctl));
drivers/mtd/nand/raw/sh_flctl.c
439
reg = readl(FLINTDMACR(flctl));
drivers/mtd/nand/raw/sh_flctl.c
456
data = readl(FLDATAR(flctl));
drivers/mtd/nand/raw/sh_flctl.c
475
buf[i] = readl(FLDTFIFO(flctl));
drivers/mtd/nand/raw/sh_flctl.c
494
ecc_buf[i] = readl(FLECFIFO(flctl));
drivers/mtd/nand/raw/sh_flctl.c
632
writel(readl(FLCMNCR(flctl)) | ACM_SACCES_MODE | _4ECCCORRECT,
drivers/mtd/nand/raw/sh_flctl.c
634
writel(readl(FLCMDCR(flctl)) | page_sectors, FLCMDCR(flctl));
drivers/mtd/nand/raw/sh_flctl.c
666
writel(readl(FLCMNCR(flctl)) & ~(ACM_SACCES_MODE | _4ECCCORRECT),
drivers/mtd/nand/raw/sh_flctl.c
703
writel(readl(FLCMNCR(flctl)) | ACM_SACCES_MODE, FLCMNCR(flctl));
drivers/mtd/nand/raw/sh_flctl.c
704
writel(readl(FLCMDCR(flctl)) | page_sectors, FLCMDCR(flctl));
drivers/mtd/nand/raw/sh_flctl.c
714
writel(readl(FLCMNCR(flctl)) & ~ACM_SACCES_MODE, FLCMNCR(flctl));
drivers/mtd/nand/raw/sunxi_nand.c
1118
status = readl(nfc->regs + NFC_REG_ECC_ST);
drivers/mtd/nand/raw/sunxi_nand.c
1119
pattern_found = readl(nfc->regs + nfc->caps->reg_pat_found);
drivers/mtd/nand/raw/sunxi_nand.c
372
u32 st = readl(nfc->regs + NFC_REG_ST);
drivers/mtd/nand/raw/sunxi_nand.c
373
u32 ien = readl(nfc->regs + NFC_REG_INT);
drivers/mtd/nand/raw/sunxi_nand.c
486
writel(readl(nfc->regs + NFC_REG_CTL) | NFC_RAM_METHOD,
drivers/mtd/nand/raw/sunxi_nand.c
492
writel(readl(nfc->regs + NFC_REG_CTL) & ~NFC_DMA_TYPE_NORMAL,
drivers/mtd/nand/raw/sunxi_nand.c
507
writel(readl(nfc->regs + NFC_REG_CTL) & ~NFC_RAM_METHOD,
drivers/mtd/nand/raw/sunxi_nand.c
520
writel(readl(nfc->regs + NFC_REG_CTL) & ~NFC_RAM_METHOD,
drivers/mtd/nand/raw/sunxi_nand.c
535
ctl = readl(nfc->regs + NFC_REG_CTL) &
drivers/mtd/nand/raw/sunxi_nand.c
742
ecc_ctl = readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_SEED_MSK;
drivers/mtd/nand/raw/sunxi_nand.c
753
writel(readl(nfc->regs + NFC_REG_ECC_CTL) | NFC_RANDOM_EN(nfc),
drivers/mtd/nand/raw/sunxi_nand.c
764
writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_EN(nfc),
drivers/mtd/nand/raw/sunxi_nand.c
828
sunxi_nfc_user_data_to_buf(readl(nfc->regs + NFC_REG_USER_DATA(nfc, step)), oob);
drivers/mtd/nand/raw/sunxi_nand.c
875
val = readl(nfc->regs + NFC_REG_USER_DATA_LEN(nfc, step));
drivers/mtd/nand/raw/sunxi_nand.c
929
if (unlikely(!(readl(nfc->regs + NFC_REG_PAT_ID(nfc)) & 0x1))) {
drivers/mtd/nand/raw/sunxi_nand.c
945
tmp = readl(nfc->regs + NFC_REG_ECC_ERR_CNT(nfc, step));
drivers/mtd/nand/raw/sunxi_nand.c
990
pattern_found = readl(nfc->regs + nfc->caps->reg_pat_found);
drivers/mtd/nand/raw/sunxi_nand.c
994
readl(nfc->regs + NFC_REG_ECC_ST),
drivers/mtd/nand/raw/vf610_nfc.c
176
return readl(nfc->regs + reg);
drivers/mtd/spi-nor/controllers/hisi-sfc.c
237
reg = readl(host->regbase + FMC_CFG);
drivers/net/can/bxcan.c
202
old = readl(addr);
drivers/net/can/bxcan.c
306
return readx_poll_timeout(readl, ®s->msr, value,
drivers/net/can/bxcan.c
317
return readx_poll_timeout(readl, ®s->msr, value,
drivers/net/can/bxcan.c
328
return readx_poll_timeout(readl, ®s->msr, value,
drivers/net/can/bxcan.c
339
return readx_poll_timeout(readl, ®s->msr, value,
drivers/net/can/bxcan.c
350
return readx_poll_timeout(readl, ®s->msr, value,
drivers/net/can/bxcan.c
372
rf0r = readl(®s->rf0r);
drivers/net/can/bxcan.c
387
id = readl(&mb_regs->id);
drivers/net/can/bxcan.c
393
dlc = readl(&mb_regs->dlc);
drivers/net/can/bxcan.c
403
*(u32 *)(cf->data + i) = readl(&mb_regs->data[j]);
drivers/net/can/bxcan.c
419
rf0r = readl(®s->rf0r);
drivers/net/can/bxcan.c
438
tsr = readl(®s->tsr);
drivers/net/can/bxcan.c
609
msr = readl(®s->msr);
drivers/net/can/bxcan.c
613
esr = readl(®s->esr);
drivers/net/can/bxcan.c
922
esr = readl(®s->esr);
drivers/net/can/c_can/c_can_platform.c
163
return readl(priv->base + priv->regs[index]);
drivers/net/can/ifi_canfd/ifi_canfd.c
1000
priv->can.clock.freq = readl(addr + IFI_CANFD_CANCLOCK);
drivers/net/can/ifi_canfd/ifi_canfd.c
260
rxdlc = readl(priv->base + IFI_CANFD_RXFIFO_DLC);
drivers/net/can/ifi_canfd/ifi_canfd.c
278
rxid = readl(priv->base + IFI_CANFD_RXFIFO_ID);
drivers/net/can/ifi_canfd/ifi_canfd.c
310
readl(priv->base + IFI_CANFD_RXFIFO_DATA + i);
drivers/net/can/ifi_canfd/ifi_canfd.c
330
rxst = readl(priv->base + IFI_CANFD_RXSTCMD);
drivers/net/can/ifi_canfd/ifi_canfd.c
345
rxst = readl(priv->base + IFI_CANFD_RXSTCMD);
drivers/net/can/ifi_canfd/ifi_canfd.c
380
u32 errctr = readl(priv->base + IFI_CANFD_ERROR_CTR);
drivers/net/can/ifi_canfd/ifi_canfd.c
463
err = readl(priv->base + IFI_CANFD_ERROR);
drivers/net/can/ifi_canfd/ifi_canfd.c
549
u32 stcmd = readl(priv->base + IFI_CANFD_STCMD);
drivers/net/can/ifi_canfd/ifi_canfd.c
587
u32 rxstcmd = readl(priv->base + IFI_CANFD_RXSTCMD);
drivers/net/can/ifi_canfd/ifi_canfd.c
629
isr = readl(priv->base + IFI_CANFD_INTERRUPT);
drivers/net/can/ifi_canfd/ifi_canfd.c
888
txst = readl(priv->base + IFI_CANFD_TXSTCMD);
drivers/net/can/ifi_canfd/ifi_canfd.c
970
id = readl(addr + IFI_CANFD_IP_ID);
drivers/net/can/ifi_canfd/ifi_canfd.c
976
rev = readl(addr + IFI_CANFD_VER) & IFI_CANFD_VER_REV_MASK;
drivers/net/can/m_can/m_can_pci.c
39
return readl(priv->base + reg);
drivers/net/can/m_can/m_can_platform.c
30
return readl(priv->base + reg);
drivers/net/can/peak_canfd/peak_pciefd_main.c
213
return readl(priv->reg_base + reg);
drivers/net/can/peak_canfd/peak_pciefd_main.c
226
return readl(priv->reg_base + reg);
drivers/net/can/rcar/rcar_can.c
658
data = readl(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].id);
drivers/net/can/rcar/rcar_canfd.c
1804
u32 sts = readl(&gpriv->fcbase[ch].cfdsts);
drivers/net/can/rcar/rcar_canfd.c
693
u32 data = readl(reg);
drivers/net/can/rcar/rcar_canfd.c
702
return readl(base + offset);
drivers/net/can/rockchip/rockchip_canfd.h
490
return readl(priv->regs + reg);
drivers/net/can/sja1000/ems_pci.c
329
writel(readl(card->conf_addr + ASIX_LIEMR) & ~ASIX_LIEMR_LRST,
drivers/net/can/sja1000/ems_pci.c
391
writel(readl(card->conf_addr + ASIX_LIEMR) | ASIX_LIEMR_L0EINTEN,
drivers/net/can/sja1000/peak_pci.c
614
if (readl(cfg_base + PEAK_VER_REG1)) {
drivers/net/can/sja1000/peak_pci.c
616
u32 fw_ver = readl(cfg_base + PEAK_VER_REG2);
drivers/net/can/sun4i_can.c
253
mod_reg_val = readl(priv->base + SUN4I_REG_MSEL_ADDR);
drivers/net/can/sun4i_can.c
258
if (readl(priv->base + SUN4I_REG_MSEL_ADDR) & SUN4I_MSEL_RESET_MODE) {
drivers/net/can/sun4i_can.c
274
mod_reg_val = readl(priv->base + SUN4I_REG_MSEL_ADDR);
drivers/net/can/sun4i_can.c
279
if (!(readl(priv->base + SUN4I_REG_MSEL_ADDR) &
drivers/net/can/sun4i_can.c
321
errors = readl(priv->base + SUN4I_REG_ERRC_ADDR);
drivers/net/can/sun4i_can.c
359
mod_reg_val = readl(priv->base + SUN4I_REG_MSEL_ADDR);
drivers/net/can/sun4i_can.c
492
fi = readl(priv->base + SUN4I_REG_BUF0_ADDR);
drivers/net/can/sun4i_can.c
496
id = (readl(priv->base + SUN4I_REG_BUF1_ADDR) << 21) |
drivers/net/can/sun4i_can.c
497
(readl(priv->base + SUN4I_REG_BUF2_ADDR) << 13) |
drivers/net/can/sun4i_can.c
498
(readl(priv->base + SUN4I_REG_BUF3_ADDR) << 5) |
drivers/net/can/sun4i_can.c
499
((readl(priv->base + SUN4I_REG_BUF4_ADDR) >> 3) & 0x1f);
drivers/net/can/sun4i_can.c
503
id = (readl(priv->base + SUN4I_REG_BUF1_ADDR) << 3) |
drivers/net/can/sun4i_can.c
504
((readl(priv->base + SUN4I_REG_BUF2_ADDR) >> 5) & 0x7);
drivers/net/can/sun4i_can.c
512
cf->data[i] = readl(priv->base + dreg + i * 4);
drivers/net/can/sun4i_can.c
539
errc = readl(priv->base + SUN4I_REG_ERRC_ADDR);
drivers/net/can/sun4i_can.c
582
ecc = readl(priv->base + SUN4I_REG_STA_ADDR);
drivers/net/can/sun4i_can.c
624
alc = readl(priv->base + SUN4I_REG_STA_ADDR);
drivers/net/can/sun4i_can.c
661
(isrc = readl(priv->base + SUN4I_REG_INT_ADDR))) {
drivers/net/can/sun4i_can.c
663
status = readl(priv->base + SUN4I_REG_STA_ADDR);
drivers/net/can/sun4i_can.c
680
status = readl(priv->base + SUN4I_REG_STA_ADDR);
drivers/net/can/sun4i_can.c
692
readl(priv->base + SUN4I_REG_INT_ADDR);
drivers/net/dsa/b53/b53_mmap.c
117
*val = readl(regs + (page << 8) + reg);
drivers/net/dsa/b53/b53_mmap.c
139
hi = readl(regs + (page << 8) + reg + 2);
drivers/net/dsa/b53/b53_mmap.c
151
lo = readl(regs + (page << 8) + reg);
drivers/net/dsa/b53/b53_mmap.c
174
lo = readl(regs + (page << 8) + reg);
drivers/net/dsa/b53/b53_mmap.c
175
hi = readl(regs + (page << 8) + reg + 4);
drivers/net/dsa/b53/b53_srab.c
103
ctrls = readl(regs + B53_SRAB_CTRLS);
drivers/net/dsa/b53/b53_srab.c
120
ctrls = readl(regs + B53_SRAB_CTRLS);
drivers/net/dsa/b53/b53_srab.c
141
cmdstat = readl(regs + B53_SRAB_CMDSTAT);
drivers/net/dsa/b53/b53_srab.c
167
*val = readl(regs + B53_SRAB_RD_L) & 0xff;
drivers/net/dsa/b53/b53_srab.c
189
*val = readl(regs + B53_SRAB_RD_L) & 0xffff;
drivers/net/dsa/b53/b53_srab.c
211
*val = readl(regs + B53_SRAB_RD_L);
drivers/net/dsa/b53/b53_srab.c
233
*val = readl(regs + B53_SRAB_RD_L);
drivers/net/dsa/b53/b53_srab.c
234
*val += ((u64)readl(regs + B53_SRAB_RD_H) & 0xffff) << 32;
drivers/net/dsa/b53/b53_srab.c
256
*val = readl(regs + B53_SRAB_RD_L);
drivers/net/dsa/b53/b53_srab.c
257
*val += (u64)readl(regs + B53_SRAB_RD_H) << 32;
drivers/net/dsa/b53/b53_srab.c
526
reg = readl(priv->regs + B53_SRAB_CTRLS);
drivers/net/dsa/b53/b53_srab.c
587
reg = readl(priv->mux_config + B53_MUX_CONFIG_P5 + off);
drivers/net/dsa/b53/b53_srab.c
98
ctrls = readl(regs + B53_SRAB_CTRLS);
drivers/net/dsa/rzn1_a5psw.c
78
return readl(a5psw->base + offset);
drivers/net/ethernet/8390/smc-ultra.c
454
((unsigned int*)hdr)[0] = readl(hdr_start);
drivers/net/ethernet/8390/wd.c
429
((unsigned int*)hdr)[0] = readl(hdr_start);
drivers/net/ethernet/actions/owl-emac.c
27
return readl(priv->base + reg);
drivers/net/ethernet/adaptec/starfire.c
1096
"resetting...\n", dev->name, (int) readl(ioaddr + IntrStatus));
drivers/net/ethernet/adaptec/starfire.c
1304
u32 intr_status = readl(ioaddr + IntrClear);
drivers/net/ethernet/adaptec/starfire.c
1320
enable = readl(ioaddr + IntrEnable);
drivers/net/ethernet/adaptec/starfire.c
1324
readl(ioaddr + IntrEnable);
drivers/net/ethernet/adaptec/starfire.c
1327
enable = readl(ioaddr + IntrEnable);
drivers/net/ethernet/adaptec/starfire.c
1341
consumer = readl(ioaddr + TxConsumerIdx);
drivers/net/ethernet/adaptec/starfire.c
1411
dev->name, (int) readl(ioaddr + IntrStatus));
drivers/net/ethernet/adaptec/starfire.c
1558
intr_status = readl(ioaddr + IntrStatus);
drivers/net/ethernet/adaptec/starfire.c
1562
intr_status = readl(ioaddr + IntrEnable);
drivers/net/ethernet/adaptec/starfire.c
1716
dev->stats.tx_bytes = readl(ioaddr + 0x57010);
drivers/net/ethernet/adaptec/starfire.c
1717
dev->stats.rx_bytes = readl(ioaddr + 0x57044);
drivers/net/ethernet/adaptec/starfire.c
1718
dev->stats.tx_packets = readl(ioaddr + 0x57000);
drivers/net/ethernet/adaptec/starfire.c
1720
readl(ioaddr + 0x57024) + readl(ioaddr + 0x57028);
drivers/net/ethernet/adaptec/starfire.c
1721
dev->stats.tx_window_errors = readl(ioaddr + 0x57018);
drivers/net/ethernet/adaptec/starfire.c
1723
readl(ioaddr + 0x57004) + readl(ioaddr + 0x57008);
drivers/net/ethernet/adaptec/starfire.c
1728
dev->stats.rx_crc_errors = readl(ioaddr + 0x5703C);
drivers/net/ethernet/adaptec/starfire.c
1729
dev->stats.rx_frame_errors = readl(ioaddr + 0x57040);
drivers/net/ethernet/adaptec/starfire.c
1730
dev->stats.rx_length_errors = readl(ioaddr + 0x57058);
drivers/net/ethernet/adaptec/starfire.c
1731
dev->stats.rx_missed_errors = readl(ioaddr + 0x5707C);
drivers/net/ethernet/adaptec/starfire.c
1929
dev->name, (int) readl(ioaddr + IntrStatus));
drivers/net/ethernet/adaptec/starfire.c
1940
readl(ioaddr + GenCtrl);
drivers/net/ethernet/adaptec/starfire.c
713
if ((readl(base + PCIDeviceConfig) & 1) == 0)
drivers/net/ethernet/adaptec/starfire.c
833
result = readl(mdio_addr);
drivers/net/ethernet/adaptec/starfire.c
990
writel(0x00800000 | readl(ioaddr + PCIDeviceConfig),
drivers/net/ethernet/agere/et131x.c
1182
mii_addr = readl(&mac->mii_mgmt_addr);
drivers/net/ethernet/agere/et131x.c
1183
mii_cmd = readl(&mac->mii_mgmt_cmd);
drivers/net/ethernet/agere/et131x.c
1196
mii_indicator = readl(&mac->mii_mgmt_indicator);
drivers/net/ethernet/agere/et131x.c
1213
*value = readl(&mac->mii_mgmt_stat) & ET_MAC_MIIMGMT_STAT_PHYCRTL_MASK;
drivers/net/ethernet/agere/et131x.c
1251
mii_addr = readl(&mac->mii_mgmt_addr);
drivers/net/ethernet/agere/et131x.c
1252
mii_cmd = readl(&mac->mii_mgmt_cmd);
drivers/net/ethernet/agere/et131x.c
1266
mii_indicator = readl(&mac->mii_mgmt_indicator);
drivers/net/ethernet/agere/et131x.c
1278
readl(&mac->mii_mgmt_cmd));
drivers/net/ethernet/agere/et131x.c
1346
stats->tx_collisions += readl(&macstat->tx_total_collisions);
drivers/net/ethernet/agere/et131x.c
1347
stats->tx_first_collisions += readl(&macstat->tx_single_collisions);
drivers/net/ethernet/agere/et131x.c
1348
stats->tx_deferred += readl(&macstat->tx_deferred);
drivers/net/ethernet/agere/et131x.c
1350
readl(&macstat->tx_multiple_collisions);
drivers/net/ethernet/agere/et131x.c
1351
stats->tx_late_collisions += readl(&macstat->tx_late_collisions);
drivers/net/ethernet/agere/et131x.c
1352
stats->tx_underflows += readl(&macstat->tx_undersize_frames);
drivers/net/ethernet/agere/et131x.c
1353
stats->tx_max_pkt_errs += readl(&macstat->tx_oversize_frames);
drivers/net/ethernet/agere/et131x.c
1355
stats->rx_align_errs += readl(&macstat->rx_align_errs);
drivers/net/ethernet/agere/et131x.c
1356
stats->rx_crc_errs += readl(&macstat->rx_code_errs);
drivers/net/ethernet/agere/et131x.c
1357
stats->rcvd_pkts_dropped += readl(&macstat->rx_drops);
drivers/net/ethernet/agere/et131x.c
1358
stats->rx_overflows += readl(&macstat->rx_oversize_packets);
drivers/net/ethernet/agere/et131x.c
1359
stats->rx_code_violations += readl(&macstat->rx_fcs_errs);
drivers/net/ethernet/agere/et131x.c
1360
stats->rx_length_errs += readl(&macstat->rx_frame_len_errs);
drivers/net/ethernet/agere/et131x.c
1361
stats->rx_other_errs += readl(&macstat->rx_fragment_packets);
drivers/net/ethernet/agere/et131x.c
1378
carry_reg1 = readl(&adapter->regs->macstat.carry_reg1);
drivers/net/ethernet/agere/et131x.c
1379
carry_reg2 = readl(&adapter->regs->macstat.carry_reg2);
drivers/net/ethernet/agere/et131x.c
1560
psr_num_des = readl(&rx_dma->psr_num_des) & ET_RXDMA_PSR_NUM_DES_MASK;
drivers/net/ethernet/agere/et131x.c
1784
u32 pmcsr = readl(&adapter->regs->global.pm_csr);
drivers/net/ethernet/agere/et131x.c
1805
pmcsr = readl(&adapter->regs->global.pm_csr);
drivers/net/ethernet/agere/et131x.c
2778
serviced = readl(&adapter->regs->txdma.new_service_complete);
drivers/net/ethernet/agere/et131x.c
2911
regs_buff[num++] = readl(&aregs->global.txq_start_addr);
drivers/net/ethernet/agere/et131x.c
2912
regs_buff[num++] = readl(&aregs->global.txq_end_addr);
drivers/net/ethernet/agere/et131x.c
2913
regs_buff[num++] = readl(&aregs->global.rxq_start_addr);
drivers/net/ethernet/agere/et131x.c
2914
regs_buff[num++] = readl(&aregs->global.rxq_end_addr);
drivers/net/ethernet/agere/et131x.c
2915
regs_buff[num++] = readl(&aregs->global.pm_csr);
drivers/net/ethernet/agere/et131x.c
2917
regs_buff[num++] = readl(&aregs->global.int_mask);
drivers/net/ethernet/agere/et131x.c
2918
regs_buff[num++] = readl(&aregs->global.int_alias_clr_en);
drivers/net/ethernet/agere/et131x.c
2919
regs_buff[num++] = readl(&aregs->global.int_status_alias);
drivers/net/ethernet/agere/et131x.c
2920
regs_buff[num++] = readl(&aregs->global.sw_reset);
drivers/net/ethernet/agere/et131x.c
2921
regs_buff[num++] = readl(&aregs->global.slv_timer);
drivers/net/ethernet/agere/et131x.c
2922
regs_buff[num++] = readl(&aregs->global.msi_config);
drivers/net/ethernet/agere/et131x.c
2923
regs_buff[num++] = readl(&aregs->global.loopback);
drivers/net/ethernet/agere/et131x.c
2924
regs_buff[num++] = readl(&aregs->global.watchdog_timer);
drivers/net/ethernet/agere/et131x.c
2927
regs_buff[num++] = readl(&aregs->txdma.csr);
drivers/net/ethernet/agere/et131x.c
2928
regs_buff[num++] = readl(&aregs->txdma.pr_base_hi);
drivers/net/ethernet/agere/et131x.c
2929
regs_buff[num++] = readl(&aregs->txdma.pr_base_lo);
drivers/net/ethernet/agere/et131x.c
2930
regs_buff[num++] = readl(&aregs->txdma.pr_num_des);
drivers/net/ethernet/agere/et131x.c
2931
regs_buff[num++] = readl(&aregs->txdma.txq_wr_addr);
drivers/net/ethernet/agere/et131x.c
2932
regs_buff[num++] = readl(&aregs->txdma.txq_wr_addr_ext);
drivers/net/ethernet/agere/et131x.c
2933
regs_buff[num++] = readl(&aregs->txdma.txq_rd_addr);
drivers/net/ethernet/agere/et131x.c
2934
regs_buff[num++] = readl(&aregs->txdma.dma_wb_base_hi);
drivers/net/ethernet/agere/et131x.c
2935
regs_buff[num++] = readl(&aregs->txdma.dma_wb_base_lo);
drivers/net/ethernet/agere/et131x.c
2936
regs_buff[num++] = readl(&aregs->txdma.service_request);
drivers/net/ethernet/agere/et131x.c
2937
regs_buff[num++] = readl(&aregs->txdma.service_complete);
drivers/net/ethernet/agere/et131x.c
2938
regs_buff[num++] = readl(&aregs->txdma.cache_rd_index);
drivers/net/ethernet/agere/et131x.c
2939
regs_buff[num++] = readl(&aregs->txdma.cache_wr_index);
drivers/net/ethernet/agere/et131x.c
2940
regs_buff[num++] = readl(&aregs->txdma.tx_dma_error);
drivers/net/ethernet/agere/et131x.c
2941
regs_buff[num++] = readl(&aregs->txdma.desc_abort_cnt);
drivers/net/ethernet/agere/et131x.c
2942
regs_buff[num++] = readl(&aregs->txdma.payload_abort_cnt);
drivers/net/ethernet/agere/et131x.c
2943
regs_buff[num++] = readl(&aregs->txdma.writeback_abort_cnt);
drivers/net/ethernet/agere/et131x.c
2944
regs_buff[num++] = readl(&aregs->txdma.desc_timeout_cnt);
drivers/net/ethernet/agere/et131x.c
2945
regs_buff[num++] = readl(&aregs->txdma.payload_timeout_cnt);
drivers/net/ethernet/agere/et131x.c
2946
regs_buff[num++] = readl(&aregs->txdma.writeback_timeout_cnt);
drivers/net/ethernet/agere/et131x.c
2947
regs_buff[num++] = readl(&aregs->txdma.desc_error_cnt);
drivers/net/ethernet/agere/et131x.c
2948
regs_buff[num++] = readl(&aregs->txdma.payload_error_cnt);
drivers/net/ethernet/agere/et131x.c
2949
regs_buff[num++] = readl(&aregs->txdma.writeback_error_cnt);
drivers/net/ethernet/agere/et131x.c
2950
regs_buff[num++] = readl(&aregs->txdma.dropped_tlp_cnt);
drivers/net/ethernet/agere/et131x.c
2951
regs_buff[num++] = readl(&aregs->txdma.new_service_complete);
drivers/net/ethernet/agere/et131x.c
2952
regs_buff[num++] = readl(&aregs->txdma.ethernet_packet_cnt);
drivers/net/ethernet/agere/et131x.c
2955
regs_buff[num++] = readl(&aregs->rxdma.csr);
drivers/net/ethernet/agere/et131x.c
2956
regs_buff[num++] = readl(&aregs->rxdma.dma_wb_base_hi);
drivers/net/ethernet/agere/et131x.c
2957
regs_buff[num++] = readl(&aregs->rxdma.dma_wb_base_lo);
drivers/net/ethernet/agere/et131x.c
2958
regs_buff[num++] = readl(&aregs->rxdma.num_pkt_done);
drivers/net/ethernet/agere/et131x.c
2959
regs_buff[num++] = readl(&aregs->rxdma.max_pkt_time);
drivers/net/ethernet/agere/et131x.c
2960
regs_buff[num++] = readl(&aregs->rxdma.rxq_rd_addr);
drivers/net/ethernet/agere/et131x.c
2961
regs_buff[num++] = readl(&aregs->rxdma.rxq_rd_addr_ext);
drivers/net/ethernet/agere/et131x.c
2962
regs_buff[num++] = readl(&aregs->rxdma.rxq_wr_addr);
drivers/net/ethernet/agere/et131x.c
2963
regs_buff[num++] = readl(&aregs->rxdma.psr_base_hi);
drivers/net/ethernet/agere/et131x.c
2964
regs_buff[num++] = readl(&aregs->rxdma.psr_base_lo);
drivers/net/ethernet/agere/et131x.c
2965
regs_buff[num++] = readl(&aregs->rxdma.psr_num_des);
drivers/net/ethernet/agere/et131x.c
2966
regs_buff[num++] = readl(&aregs->rxdma.psr_avail_offset);
drivers/net/ethernet/agere/et131x.c
2967
regs_buff[num++] = readl(&aregs->rxdma.psr_full_offset);
drivers/net/ethernet/agere/et131x.c
2968
regs_buff[num++] = readl(&aregs->rxdma.psr_access_index);
drivers/net/ethernet/agere/et131x.c
2969
regs_buff[num++] = readl(&aregs->rxdma.psr_min_des);
drivers/net/ethernet/agere/et131x.c
2970
regs_buff[num++] = readl(&aregs->rxdma.fbr0_base_lo);
drivers/net/ethernet/agere/et131x.c
2971
regs_buff[num++] = readl(&aregs->rxdma.fbr0_base_hi);
drivers/net/ethernet/agere/et131x.c
2972
regs_buff[num++] = readl(&aregs->rxdma.fbr0_num_des);
drivers/net/ethernet/agere/et131x.c
2973
regs_buff[num++] = readl(&aregs->rxdma.fbr0_avail_offset);
drivers/net/ethernet/agere/et131x.c
2974
regs_buff[num++] = readl(&aregs->rxdma.fbr0_full_offset);
drivers/net/ethernet/agere/et131x.c
2975
regs_buff[num++] = readl(&aregs->rxdma.fbr0_rd_index);
drivers/net/ethernet/agere/et131x.c
2976
regs_buff[num++] = readl(&aregs->rxdma.fbr0_min_des);
drivers/net/ethernet/agere/et131x.c
2977
regs_buff[num++] = readl(&aregs->rxdma.fbr1_base_lo);
drivers/net/ethernet/agere/et131x.c
2978
regs_buff[num++] = readl(&aregs->rxdma.fbr1_base_hi);
drivers/net/ethernet/agere/et131x.c
2979
regs_buff[num++] = readl(&aregs->rxdma.fbr1_num_des);
drivers/net/ethernet/agere/et131x.c
2980
regs_buff[num++] = readl(&aregs->rxdma.fbr1_avail_offset);
drivers/net/ethernet/agere/et131x.c
2981
regs_buff[num++] = readl(&aregs->rxdma.fbr1_full_offset);
drivers/net/ethernet/agere/et131x.c
2982
regs_buff[num++] = readl(&aregs->rxdma.fbr1_rd_index);
drivers/net/ethernet/agere/et131x.c
2983
regs_buff[num++] = readl(&aregs->rxdma.fbr1_min_des);
drivers/net/ethernet/agere/et131x.c
3412
status = readl(&adapter->regs->global.int_status);
drivers/net/ethernet/agere/et131x.c
3454
u32 txdma_err = readl(&iomem->txdma.tx_dma_error);
drivers/net/ethernet/agere/et131x.c
3515
readl(&iomem->txmac.tx_test));
drivers/net/ethernet/agere/et131x.c
3528
u32 err = readl(&iomem->txmac.err);
drivers/net/ethernet/agere/et131x.c
3553
readl(&iomem->rxmac.err_reg));
drivers/net/ethernet/agere/et131x.c
3557
readl(&iomem->rxmac.ctrl),
drivers/net/ethernet/agere/et131x.c
3558
readl(&iomem->rxmac.rxq_diag));
drivers/net/ethernet/agere/et131x.c
3689
ctrl = readl(&adapter->regs->rxmac.ctrl);
drivers/net/ethernet/agere/et131x.c
3690
pf_ctrl = readl(&adapter->regs->rxmac.pf_ctrl);
drivers/net/ethernet/agere/et131x.c
758
csr = readl(&adapter->regs->rxdma.csr);
drivers/net/ethernet/agere/et131x.c
761
csr = readl(&adapter->regs->rxdma.csr);
drivers/net/ethernet/agere/et131x.c
776
csr = readl(&adapter->regs->rxdma.csr);
drivers/net/ethernet/agere/et131x.c
779
csr = readl(&adapter->regs->rxdma.csr);
drivers/net/ethernet/agere/et131x.c
874
ctl = readl(&adapter->regs->txmac.ctl);
drivers/net/ethernet/agere/et131x.c
875
cfg1 = readl(&mac->cfg1);
drivers/net/ethernet/agere/et131x.c
876
cfg2 = readl(&mac->cfg2);
drivers/net/ethernet/agere/et131x.c
877
ifctrl = readl(&mac->if_ctrl);
drivers/net/ethernet/agere/et131x.c
921
cfg1 = readl(&mac->cfg1);
drivers/net/ethernet/agere/et131x.c
941
u32 pmcsr = readl(&adapter->regs->global.pm_csr);
drivers/net/ethernet/airoha/airoha_eth.c
22
return readl(base + offset);
drivers/net/ethernet/allwinner/sun4i-emac.c
108
reg_val = readl(db->membase + EMAC_MAC_SUPP_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
121
reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
261
reg_val = readl(db->membase + EMAC_RX_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
266
reg_val = readl(db->membase + EMAC_INT_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
367
reg_val = readl(db->membase + EMAC_TX_MODE_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
374
reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
380
reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
410
reg_val = readl(db->membase + EMAC_RX_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
431
reg_val = readl(db->membase + EMAC_RX_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
438
reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
443
reg_val = readl(db->membase + EMAC_MAC_MCFG_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
453
reg_val = readl(db->membase + EMAC_INT_STA_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
503
reg_val = readl(db->membase + EMAC_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
508
reg_val = readl(db->membase + EMAC_INT_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
567
writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1,
drivers/net/ethernet/allwinner/sun4i-emac.c
576
writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1,
drivers/net/ethernet/allwinner/sun4i-emac.c
632
rxcount = readl(db->membase + EMAC_RX_FBC_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
639
reg_val = readl(db->membase + EMAC_INT_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
646
rxcount = readl(db->membase + EMAC_RX_FBC_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
651
reg_val = readl(db->membase + EMAC_RX_IO_DATA_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
656
reg_val = readl(db->membase + EMAC_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
661
reg_val = readl(db->membase + EMAC_RX_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
666
reg_val = readl(db->membase + EMAC_RX_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
670
reg_val = readl(db->membase + EMAC_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
673
reg_val = readl(db->membase + EMAC_INT_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
687
rxhdr = readl(db->membase + EMAC_RX_IO_DATA_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
735
reg_val = readl(db->membase + EMAC_RX_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
742
reg_val = readl(db->membase + EMAC_RX_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
775
int_status = readl(db->membase + EMAC_INT_STA_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
798
reg_val = readl(db->membase + EMAC_INT_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
802
reg_val = readl(db->membase + EMAC_INT_CTL_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
864
reg_val = readl(db->membase + EMAC_INT_STA_REG);
drivers/net/ethernet/allwinner/sun4i-emac.c
868
reg_val = readl(db->membase + EMAC_CTL_REG);
drivers/net/ethernet/alteon/acenic.c
1022
pci_state = readl(®s->PciState);
drivers/net/ethernet/alteon/acenic.c
1440
writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
drivers/net/ethernet/alteon/acenic.c
1441
readl(®s->CpuCtrl);
drivers/net/ethernet/alteon/acenic.c
1454
writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
drivers/net/ethernet/alteon/acenic.c
1455
readl(®s->CpuCtrl);
drivers/net/ethernet/alteon/acenic.c
1467
writel(readl(®s->CpuBCtrl) | CPU_HALT,
drivers/net/ethernet/alteon/acenic.c
1470
readl(®s->Mb0Lo);
drivers/net/ethernet/alteon/acenic.c
1551
dev->name, (unsigned int)readl(®s->HostCtrl));
drivers/net/ethernet/alteon/acenic.c
1829
u32 state = readl(&ap->regs->GigLnkState);
drivers/net/ethernet/alteon/acenic.c
2107
if (!(readl(®s->HostCtrl) & IN_INT))
drivers/net/ethernet/alteon/acenic.c
2119
readl(®s->Mb0Lo);
drivers/net/ethernet/alteon/acenic.c
2149
evtcsm = readl(®s->EvtCsm);
drivers/net/ethernet/alteon/acenic.c
2587
link = readl(®s->GigLnkState);
drivers/net/ethernet/alteon/acenic.c
2591
link = readl(®s->FastLnkState);
drivers/net/ethernet/alteon/acenic.c
2613
ecmd->trace = readl(®s->TuneTrace);
drivers/net/ethernet/alteon/acenic.c
2615
ecmd->txcoal = readl(®s->TuneTxCoalTicks);
drivers/net/ethernet/alteon/acenic.c
2616
ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
drivers/net/ethernet/alteon/acenic.c
2632
link = readl(®s->GigLnkState);
drivers/net/ethernet/alteon/acenic.c
2636
link = readl(®s->FastLnkState);
drivers/net/ethernet/alteon/acenic.c
2794
dev->stats.rx_missed_errors = readl(&mac_stats->drop_space);
drivers/net/ethernet/alteon/acenic.c
2795
dev->stats.multicast = readl(&mac_stats->kept_mc);
drivers/net/ethernet/alteon/acenic.c
2796
dev->stats.collisions = readl(&mac_stats->coll);
drivers/net/ethernet/alteon/acenic.c
2870
if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
drivers/net/ethernet/alteon/acenic.c
2944
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2946
local = readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2949
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2954
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2959
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2964
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2975
local = readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2979
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2989
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
2995
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3000
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3011
local = readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3014
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3019
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3023
state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
drivers/net/ethernet/alteon/acenic.c
3026
writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3027
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3039
local = readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3042
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3047
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3052
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3057
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3123
local = readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3126
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3131
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3136
((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
drivers/net/ethernet/alteon/acenic.c
3139
local = readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3142
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3148
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3156
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3159
writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3160
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3162
writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
3163
readl(®s->LocalCtrl);
drivers/net/ethernet/alteon/acenic.c
564
if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
drivers/net/ethernet/alteon/acenic.c
615
writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
drivers/net/ethernet/alteon/acenic.c
617
writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
drivers/net/ethernet/alteon/acenic.c
623
readl(®s->CpuCtrl); /* flush */
drivers/net/ethernet/alteon/acenic.c
850
idx = readl(®s->CmdPrd);
drivers/net/ethernet/alteon/acenic.c
884
readl(®s->HostCtrl); /* PCI write posting */
drivers/net/ethernet/alteon/acenic.c
901
readl(®s->HostCtrl); /* PCI write posting */
drivers/net/ethernet/alteon/acenic.c
906
writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
drivers/net/ethernet/alteon/acenic.c
907
readl(®s->CpuCtrl); /* PCI write posting */
drivers/net/ethernet/alteon/acenic.c
910
tig_ver = readl(®s->HostCtrl) >> 28;
drivers/net/ethernet/alteon/acenic.c
928
writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
drivers/net/ethernet/alteon/acenic.c
929
readl(®s->CpuBCtrl); /* PCI write posting */
drivers/net/ethernet/alteon/acenic.c
961
readl(®s->ModeStat); /* PCI write posting */
drivers/net/ethernet/alteon/acenic.h
748
writel(readl(®s->HostCtrl) | MASK_INTS, ®s->HostCtrl);
drivers/net/ethernet/alteon/acenic.h
762
writel(readl(®s->HostCtrl) & ~MASK_INTS, ®s->HostCtrl);
drivers/net/ethernet/altera/altera_tse.h
487
return readl(paddr);
drivers/net/ethernet/amazon/ena/ena_com.c
810
return readl(ena_dev->reg_bar + offset);
drivers/net/ethernet/amd/amd8111e.c
105
reg_val = readl(mmio + PHY_ACCESS);
drivers/net/ethernet/amd/amd8111e.c
107
reg_val = readl(mmio + PHY_ACCESS);
drivers/net/ethernet/amd/amd8111e.c
1095
intr0 = readl(mmio + INT0);
drivers/net/ethernet/amd/amd8111e.c
1096
intren0 = readl(mmio + INTEN0);
drivers/net/ethernet/amd/amd8111e.c
112
reg_val = readl(mmio + PHY_ACCESS);
drivers/net/ethernet/amd/amd8111e.c
1298
buf[0] = readl(mmio + XMT_RING_BASE_ADDR0);
drivers/net/ethernet/amd/amd8111e.c
1299
buf[1] = readl(mmio + XMT_RING_LEN0);
drivers/net/ethernet/amd/amd8111e.c
1300
buf[2] = readl(mmio + RCV_RING_BASE_ADDR0);
drivers/net/ethernet/amd/amd8111e.c
1301
buf[3] = readl(mmio + RCV_RING_LEN0);
drivers/net/ethernet/amd/amd8111e.c
1302
buf[4] = readl(mmio + CMD0);
drivers/net/ethernet/amd/amd8111e.c
1303
buf[5] = readl(mmio + CMD2);
drivers/net/ethernet/amd/amd8111e.c
1304
buf[6] = readl(mmio + CMD3);
drivers/net/ethernet/amd/amd8111e.c
1305
buf[7] = readl(mmio + CMD7);
drivers/net/ethernet/amd/amd8111e.c
1306
buf[8] = readl(mmio + INT0);
drivers/net/ethernet/amd/amd8111e.c
1307
buf[9] = readl(mmio + INTEN0);
drivers/net/ethernet/amd/amd8111e.c
1308
buf[10] = readl(mmio + LADRF);
drivers/net/ethernet/amd/amd8111e.c
1309
buf[11] = readl(mmio + LADRF+4);
drivers/net/ethernet/amd/amd8111e.c
1310
buf[12] = readl(mmio + STAT0);
drivers/net/ethernet/amd/amd8111e.c
134
reg_val = readl(mmio + PHY_ACCESS);
drivers/net/ethernet/amd/amd8111e.c
1357
readl(lp->mmio + CMD2);
drivers/net/ethernet/amd/amd8111e.c
136
reg_val = readl(mmio + PHY_ACCESS);
drivers/net/ethernet/amd/amd8111e.c
142
reg_val = readl(mmio + PHY_ACCESS);
drivers/net/ethernet/amd/amd8111e.c
1549
readl(lp->mmio + CMD7);
drivers/net/ethernet/amd/amd8111e.c
1560
readl(lp->mmio + CMD7);
drivers/net/ethernet/amd/amd8111e.c
1863
chip_version = (readl(lp->mmio + CHIPID) & 0xf0000000) >> 28;
drivers/net/ethernet/amd/amd8111e.c
440
reg_val = readl(mmio + CTRL1);
drivers/net/ethernet/amd/amd8111e.c
493
readl(mmio+CMD0);
drivers/net/ethernet/amd/amd8111e.c
537
reg_val = readl(mmio + INT0);
drivers/net/ethernet/amd/amd8111e.c
571
reg_val = readl(mmio + SRAM_SIZE);
drivers/net/ethernet/amd/amd8111e.c
582
readl(mmio + CMD2);
drivers/net/ethernet/amd/amd8111e.c
597
intr0 = readl(lp->mmio + INT0);
drivers/net/ethernet/amd/amd8111e.c
601
readl(lp->mmio + INT0);
drivers/net/ethernet/amd/amd8111e.c
611
readl(lp->mmio + CMD0);
drivers/net/ethernet/amd/amd8111e.c
798
status0 = readl(lp->mmio + STAT0);
drivers/net/ethernet/amd/amd8111e.c
848
data = readl(mmio + MIB_DATA);
drivers/net/ethernet/amd/au1000_eth.c
1025
reg = readl(&aup->mac->control);
drivers/net/ethernet/amd/au1000_eth.c
277
while (readl(mii_control_reg) & MAC_MII_BUSY) {
drivers/net/ethernet/amd/au1000_eth.c
291
while (readl(mii_control_reg) & MAC_MII_BUSY) {
drivers/net/ethernet/amd/au1000_eth.c
298
return readl(mii_data_reg);
drivers/net/ethernet/amd/au1000_eth.c
310
while (readl(mii_control_reg) & MAC_MII_BUSY) {
drivers/net/ethernet/amd/au1000_eth.c
370
reg = readl(&aup->mac->control);
drivers/net/ethernet/amd/au1000_eth.c
384
reg = readl(&aup->mac->control);
drivers/net/ethernet/amd/au1000_eth.c
429
reg = readl(&aup->mac->control);
drivers/net/ethernet/amd/lance.c
497
int hp_port = (readl(bios + 1) & 1) ? 0x499 : 0x99;
drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
43
u32 value = readl(hw->mmio + reg);
drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
46
readl(hw->mmio + hw->aq_nic_cfg->aq_hw_caps->hw_alive_check_addr) == U32_MAX)
drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
71
readl(hw->mmio + hw->aq_nic_cfg->aq_hw_caps->hw_alive_check_addr) == U32_MAX)
drivers/net/ethernet/atheros/alx/hw.h
538
return readl(hw->hw_addr + reg);
drivers/net/ethernet/atheros/alx/hw.h
543
readl(hw->hw_addr);
drivers/net/ethernet/atheros/atl1c/atl1c.h
553
readl((a)->hw_addr))
drivers/net/ethernet/atheros/atl1c/atl1c.h
557
readl((a)->hw_addr + reg); \
drivers/net/ethernet/atheros/atl1c/atl1c.h
558
*(u32 *)pdata = readl((a)->hw_addr + reg); \
drivers/net/ethernet/atheros/atl1c/atl1c.h
560
*(u32 *)pdata = readl((a)->hw_addr + reg); \
drivers/net/ethernet/atheros/atl1c/atl1c.h
586
readl(((a)->hw_addr + reg) + ((offset) << 2)))
drivers/net/ethernet/atheros/atl1c/atl1c_main.c
682
if (readl(hw_addr + REG_MT_MAGIC) == MT_MAGIC)
drivers/net/ethernet/atheros/atl1e/atl1e.h
461
readl((a)->hw_addr))
drivers/net/ethernet/atheros/atl1e/atl1e.h
464
readl((a)->hw_addr + reg))
drivers/net/ethernet/atheros/atl1e/atl1e.h
482
readl(((a)->hw_addr + reg) + ((offset) << 2)))
drivers/net/ethernet/broadcom/bcm4908_enet.c
95
return readl(enet->base + offset);
drivers/net/ethernet/broadcom/bgmac-platform.c
38
return readl(bgmac->plat.base + offset);
drivers/net/ethernet/broadcom/bgmac-platform.c
48
return readl(bgmac->plat.idm_base + offset);
drivers/net/ethernet/broadcom/bnx2.c
5682
save_val = readl(bp->regview + offset);
drivers/net/ethernet/broadcom/bnx2.c
5686
val = readl(bp->regview + offset);
drivers/net/ethernet/broadcom/bnx2.c
5697
val = readl(bp->regview + offset);
drivers/net/ethernet/broadcom/bnx2.h
7007
readl(bp->regview + offset)
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
171
#define REG_RD(bp, offset) readl(REG_ADDR(bp, offset))
drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c
201
me_reg = readl(bp->doorbells);
drivers/net/ethernet/broadcom/bnxt/bnxt.c
10012
sig = readl(hs + offsetof(struct hcomm_status, sig_ver));
drivers/net/ethernet/broadcom/bnxt/bnxt.c
10016
bp->chip_num = readl(bp->bar0 +
drivers/net/ethernet/broadcom/bnxt/bnxt.c
10026
status_loc = readl(hs + offsetof(struct hcomm_status,
drivers/net/ethernet/broadcom/bnxt/bnxt.c
2445
val = readl(bp->bar0 + reg_off);
drivers/net/ethernet/broadcom/bnxt/bnxt.c
2448
val = readl(bp->bar1 + reg_off);
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
130
*low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
86
high_before = readl(bp->bar0 + ptp->refclk_mapped_regs[1]);
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
88
low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
90
high_now = readl(bp->bar0 + ptp->refclk_mapped_regs[1]);
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
93
low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
drivers/net/ethernet/broadcom/cnic_if.h
357
#define CNIC_RD(dev, off) readl(dev->regview + off)
drivers/net/ethernet/broadcom/tg3.c
16911
if (readl(sram_base) != 0x00000000)
drivers/net/ethernet/broadcom/tg3.c
478
return readl(tp->regs + off);
drivers/net/ethernet/broadcom/tg3.c
488
return readl(tp->aperegs + off);
drivers/net/ethernet/broadcom/tg3.c
504
readl(tp->regs + off);
drivers/net/ethernet/broadcom/tg3.c
602
readl(mbox);
drivers/net/ethernet/broadcom/tg3.c
607
return readl(tp->regs + off + GRCMBOX_BASE);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1103
r32 = readl(sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1108
r32 = readl(sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1120
readl(sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1148
r32 = readl(ioc->ioc_regs.ioc_init_sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1151
r32 = readl(ioc->ioc_regs.ioc_init_sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1174
readl(ioc->ioc_regs.ioc_sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1190
r32 = readl(ioc->ioc_regs.ioc_sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1224
pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1239
pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1261
pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1275
pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1296
swab32(readl(loff + ioc->ioc_regs.smem_page_start));
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1526
cmd.i = readl(pci_bar + FLI_CMD_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1541
dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1548
readl(pci_bar + FLI_RDDATA_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1552
dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1587
dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1591
ret_status = readl(pci_bar + FLI_RDDATA_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1649
u32 w = readl(pci_bar + FLI_RDDATA_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1666
locked = readl(bar + FLASH_SEM_LOCK_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1822
r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1914
(void) readl(ioc->ioc_regs.hfn_mbox_cmd);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1961
hb_count = readl(ioc->ioc_regs.heartbeat);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
1977
ioc->hb_count = readl(ioc->ioc_regs.heartbeat);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
2146
stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
2209
r32 = swab32(readl(loff + ioc->ioc_regs.smem_page_start));
drivers/net/ethernet/brocade/bna/bfa_ioc.c
2229
readl(ioc->ioc_regs.ioc_init_sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
2412
r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
2421
r32 = readl(ioc->ioc_regs.lpu_mbox +
drivers/net/ethernet/brocade/bna/bfa_ioc.c
2430
readl(ioc->ioc_regs.lpu_mbox_cmd);
drivers/net/ethernet/brocade/bna/bfa_ioc.c
2670
stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
125
usecnt = readl(ioc->ioc_regs.ioc_usage_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
137
ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
178
usecnt = readl(ioc->ioc_regs.ioc_usage_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
194
readl(ioc->ioc_regs.ll_halt);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
195
readl(ioc->ioc_regs.alt_ll_halt);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
377
r32 = readl(rb + FNC_PERS_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
389
r32 = readl(rb + CT2_HOSTFN_PERSONALITY0);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
400
r32 = readl(rb + FNC_PERS_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
427
r32 = readl(ioc->ioc_regs.lpu_read_stat);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
450
r32 = readl(rb + HOSTFN_MSIX_VT_OFST_NUMVT);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
477
readl(ioc->ioc_regs.ioc_sem_reg);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
485
u32 r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
509
u32 r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
518
u32 r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
528
u32 r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
536
u32 r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
584
return (enum bfi_ioc_state)readl(ioc->ioc_regs.ioc_fwstate);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
597
return (enum bfi_ioc_state)readl(ioc->ioc_regs.alt_ioc_fwstate);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
646
readl(rb + HOSTFN0_INT_MSK);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
661
r32 = readl(rb + PSS_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
672
r32 = readl(rb + MBIST_STAT_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
685
r32 = readl(rb + CT2_APP_PLL_SCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
695
r32 = readl(rb + CT2_APP_PLL_SCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
702
r32 = readl(rb + CT2_CHIP_MISC_PRG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
706
r32 = readl(rb + CT2_PCIE_MISC_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
713
r32 = readl(rb + CT2_APP_PLL_SCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
737
r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
746
r32 = readl(rb + CT2_CHIP_MISC_PRG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
752
r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
758
r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
774
r32 = readl(rb + PSS_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
795
r32 = readl(rb + CT2_APP_PLL_SCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
802
r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
822
r32 = readl(rb + CT2_NFC_CSR_SET_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
837
r32 = readl(rb + CT2_NFC_CSR_SET_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
851
wgn = readl(rb + CT2_WGN_STATUS);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
853
nfc_ver = readl(rb + CT2_RSC_GPR15_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
863
r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
870
r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
877
r32 = readl(rb + CT2_CSI_FW_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
882
r32 = readl(rb + CT2_NFC_CSR_SET_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
893
r32 = readl(rb + CT2_APP_PLL_SCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
896
r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
903
r32 = readl(rb + PSS_GPIO_OUT_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
905
r32 = readl(rb + PSS_GPIO_OE_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
917
r32 = readl(rb + HOST_SEM5_REG);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
919
r32 = readl(rb + CT2_LPU0_HOSTFN_CMD_STAT);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
922
readl(rb + CT2_LPU0_HOSTFN_CMD_STAT);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
924
r32 = readl(rb + CT2_LPU1_HOSTFN_CMD_STAT);
drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c
927
readl(rb + CT2_LPU1_HOSTFN_CMD_STAT);
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
157
init_halt = readl((_bna)->ioceth.ioc.ioc_regs.ll_halt); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
160
init_halt = readl((_bna)->ioceth.ioc.ioc_regs.ll_halt); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
165
(_cur_mask) = readl((_bna)->regs.fn_int_mask); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
174
mask = readl((bna)->regs.fn_int_mask); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
177
mask = readl((bna)->regs.fn_int_mask); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
183
mask = readl((bna)->regs.fn_int_mask); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
186
mask = readl((bna)->regs.fn_int_mask); \
drivers/net/ethernet/brocade/bna/bna_hw_defs.h
191
(_status) = readl((_bna)->regs.fn_int_status); \
drivers/net/ethernet/brocade/bna/bnad_debugfs.c
352
*regbuf = readl(reg_addr);
drivers/net/ethernet/calxeda/xgmac.c
1050
if (readl(priv->base + XGMAC_DMA_INTR_ENA))
drivers/net/ethernet/calxeda/xgmac.c
1374
readl(ioaddr + XGMAC_PMT);
drivers/net/ethernet/calxeda/xgmac.c
1450
storage->rx_bytes = readl(base + XGMAC_MMC_RXOCTET_G_LO);
drivers/net/ethernet/calxeda/xgmac.c
1451
storage->rx_bytes |= (u64)(readl(base + XGMAC_MMC_RXOCTET_G_HI)) << 32;
drivers/net/ethernet/calxeda/xgmac.c
1453
storage->rx_packets = readl(base + XGMAC_MMC_RXFRAME_GB_LO);
drivers/net/ethernet/calxeda/xgmac.c
1454
storage->multicast = readl(base + XGMAC_MMC_RXMCFRAME_G);
drivers/net/ethernet/calxeda/xgmac.c
1455
storage->rx_crc_errors = readl(base + XGMAC_MMC_RXCRCERR);
drivers/net/ethernet/calxeda/xgmac.c
1456
storage->rx_length_errors = readl(base + XGMAC_MMC_RXLENGTHERR);
drivers/net/ethernet/calxeda/xgmac.c
1457
storage->rx_missed_errors = readl(base + XGMAC_MMC_RXOVERFLOW);
drivers/net/ethernet/calxeda/xgmac.c
1459
storage->tx_bytes = readl(base + XGMAC_MMC_TXOCTET_G_LO);
drivers/net/ethernet/calxeda/xgmac.c
1460
storage->tx_bytes |= (u64)(readl(base + XGMAC_MMC_TXOCTET_G_HI)) << 32;
drivers/net/ethernet/calxeda/xgmac.c
1462
count = readl(base + XGMAC_MMC_TXFRAME_GB_LO);
drivers/net/ethernet/calxeda/xgmac.c
1463
storage->tx_errors = count - readl(base + XGMAC_MMC_TXFRAME_G_LO);
drivers/net/ethernet/calxeda/xgmac.c
1465
storage->tx_fifo_errors = readl(base + XGMAC_MMC_TXUNDERFLOW);
drivers/net/ethernet/calxeda/xgmac.c
1497
ctrl = readl(ioaddr + XGMAC_CONTROL);
drivers/net/ethernet/calxeda/xgmac.c
1597
*data++ = readl(priv->base +
drivers/net/ethernet/calxeda/xgmac.c
1730
uid = readl(priv->base + XGMAC_VERSION);
drivers/net/ethernet/calxeda/xgmac.c
1735
if (readl(priv->base + XGMAC_ADDR_HIGH(31)) == 1)
drivers/net/ethernet/calxeda/xgmac.c
1776
if (readl(priv->base + XGMAC_DMA_HW_FEATURE) & DMA_HW_FEAT_TXCOESEL)
drivers/net/ethernet/calxeda/xgmac.c
1871
value = readl(priv->base + XGMAC_DMA_CONTROL);
drivers/net/ethernet/calxeda/xgmac.c
508
u32 reg = readl(ioaddr + XGMAC_OMR);
drivers/net/ethernet/calxeda/xgmac.c
511
while ((timeout-- > 0) && readl(ioaddr + XGMAC_OMR) & XGMAC_OMR_FTF)
drivers/net/ethernet/calxeda/xgmac.c
590
u32 value = readl(ioaddr + XGMAC_CONTROL);
drivers/net/ethernet/calxeda/xgmac.c
594
value = readl(ioaddr + XGMAC_DMA_CONTROL);
drivers/net/ethernet/calxeda/xgmac.c
601
u32 value = readl(ioaddr + XGMAC_DMA_CONTROL);
drivers/net/ethernet/calxeda/xgmac.c
605
value = readl(ioaddr + XGMAC_CONTROL);
drivers/net/ethernet/calxeda/xgmac.c
632
hi_addr = readl(ioaddr + XGMAC_ADDR_HIGH(num));
drivers/net/ethernet/calxeda/xgmac.c
633
lo_addr = readl(ioaddr + XGMAC_ADDR_LOW(num));
drivers/net/ethernet/calxeda/xgmac.c
663
reg = readl(priv->base + XGMAC_OMR);
drivers/net/ethernet/calxeda/xgmac.c
669
reg = readl(priv->base + XGMAC_OMR);
drivers/net/ethernet/calxeda/xgmac.c
914
reg = readl(priv->base + XGMAC_DMA_CONTROL);
drivers/net/ethernet/calxeda/xgmac.c
917
value = readl(priv->base + XGMAC_DMA_STATUS) & 0x700000;
drivers/net/ethernet/calxeda/xgmac.c
948
ctrl = readl(ioaddr + XGMAC_CONTROL) & XGMAC_CONTROL_SPD_MASK;
drivers/net/ethernet/calxeda/xgmac.c
955
(readl(ioaddr + XGMAC_DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c
916
u32 pkt_in_done = readl(iq->inst_cnt_reg);
drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c
526
u32 pkt_in_done = readl(iq->inst_cnt_reg);
drivers/net/ethernet/cavium/liquidio/cn66xx_device.c
287
iq->reset_instr_cnt = readl(iq->inst_cnt_reg);
drivers/net/ethernet/cavium/liquidio/cn66xx_device.c
451
u32 new_idx = readl(iq->inst_cnt_reg);
drivers/net/ethernet/cavium/liquidio/octeon_device.c
1361
readl(oct->reg_list.pci_win_rd_addr_hi);
drivers/net/ethernet/cavium/liquidio/octeon_device.c
1364
readl(oct->reg_list.pci_win_rd_addr_lo);
drivers/net/ethernet/cavium/liquidio/octeon_device.c
1387
readl(oct->reg_list.pci_win_wr_data_hi);
drivers/net/ethernet/cavium/liquidio/octeon_device.h
740
readl((oct_dev)->mmio[0].hw_addr + (reg_off))
drivers/net/ethernet/cavium/liquidio/octeon_droq.c
501
pkts_credit = readl(droq->pkts_credit_reg);
drivers/net/ethernet/cavium/liquidio/octeon_droq.c
726
readl(droq->pkts_credit_reg) < CN23XX_SLI_DEF_BP) {
drivers/net/ethernet/cavium/liquidio/octeon_droq.c
94
pkt_count = readl(droq->pkts_sent_reg);
drivers/net/ethernet/chelsio/cxgb/cxgb2.c
541
*p++ = readl(ap->regs + start);
drivers/net/ethernet/chelsio/cxgb/espi.c
110
u32 enable, pl_intr = readl(espi->adapter->regs + A_PL_ENABLE);
drivers/net/ethernet/chelsio/cxgb/espi.c
126
readl(espi->adapter->regs + A_ESPI_DIP2_ERR_COUNT);
drivers/net/ethernet/chelsio/cxgb/espi.c
133
u32 pl_intr = readl(espi->adapter->regs + A_PL_ENABLE);
drivers/net/ethernet/chelsio/cxgb/espi.c
141
u32 status = readl(espi->adapter->regs + A_ESPI_INTR_STATUS);
drivers/net/ethernet/chelsio/cxgb/espi.c
160
readl(espi->adapter->regs + A_ESPI_DIP2_ERR_COUNT);
drivers/net/ethernet/chelsio/cxgb/espi.c
264
espi->misc_ctrl = readl(adapter->regs + A_ESPI_MISC_CONTROL);
drivers/net/ethernet/chelsio/cxgb/espi.c
323
sel = readl(adapter->regs + A_ESPI_SCH_TOKEN3);
drivers/net/ethernet/chelsio/cxgb/espi.c
326
sel = readl(adapter->regs + A_ESPI_SCH_TOKEN3);
drivers/net/ethernet/chelsio/cxgb/espi.c
357
*valp = readl(adapter->regs + A_ESPI_SCH_TOKEN3);
drivers/net/ethernet/chelsio/cxgb/espi.c
65
busy = readl(adapter->regs + A_ESPI_GOSTAT) & F_ESPI_CMD_BUSY;
drivers/net/ethernet/chelsio/cxgb/espi.c
78
if (!(readl(adapter->regs + A_ESPI_RX_RESET) & F_RX_CLK_STATUS)) {
drivers/net/ethernet/chelsio/cxgb/pm3393.c
145
pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE);
drivers/net/ethernet/chelsio/cxgb/pm3393.c
227
pl_intr = readl(cmac->adapter->regs + A_PL_CAUSE);
drivers/net/ethernet/chelsio/cxgb/sge.c
1984
readl(sge->adapter->regs + A_SG_CONTROL); /* flush */
drivers/net/ethernet/chelsio/cxgb/sge.c
2007
readl(sge->adapter->regs + A_SG_CONTROL); /* flush */
drivers/net/ethernet/chelsio/cxgb/sge.c
737
readl(adapter->regs + A_SG_CONTROL); /* flush */
drivers/net/ethernet/chelsio/cxgb/sge.c
870
u32 irq_reg = readl(adapter->regs + A_SG_INT_ENABLE);
drivers/net/ethernet/chelsio/cxgb/sge.c
902
u32 val = readl(sge->adapter->regs + A_PL_ENABLE);
drivers/net/ethernet/chelsio/cxgb/sge.c
914
u32 val = readl(sge->adapter->regs + A_PL_ENABLE);
drivers/net/ethernet/chelsio/cxgb/sge.c
937
u32 cause = readl(adapter->regs + A_SG_INT_CAUSE);
drivers/net/ethernet/chelsio/cxgb/subr.c
114
*valp = readl(adapter->regs + A_TPI_RD_DATA);
drivers/net/ethernet/chelsio/cxgb/subr.c
191
u32 cause = readl(adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE);
drivers/net/ethernet/chelsio/cxgb/subr.c
210
u32 cause = readl(adapter->regs + A_PL_CAUSE);
drivers/net/ethernet/chelsio/cxgb/subr.c
227
u32 tp_cause = readl(adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE);
drivers/net/ethernet/chelsio/cxgb/subr.c
56
u32 val = readl(adapter->regs + reg) & mask;
drivers/net/ethernet/chelsio/cxgb/subr.c
779
u32 pl_intr = readl(adapter->regs + A_PL_ENABLE);
drivers/net/ethernet/chelsio/cxgb/subr.c
835
u32 pl_intr = readl(adapter->regs + A_PL_CAUSE);
drivers/net/ethernet/chelsio/cxgb/subr.c
850
u32 cause = readl(adapter->regs + A_PL_CAUSE);
drivers/net/ethernet/chelsio/cxgb/subr.c
882
readl(adapter->regs + A_PL_CAUSE); /* flush writes */
drivers/net/ethernet/chelsio/cxgb/subr.c
919
u32 val = readl(adapter->regs + A_TP_PC_CONFIG);
drivers/net/ethernet/chelsio/cxgb/subr.c
985
u32 val = readl(adapter->regs + A_MC4_CFG);
drivers/net/ethernet/chelsio/cxgb/tp.c
135
cause = readl(tp->adapter->regs + A_TP_INT_CAUSE);
drivers/net/ethernet/chelsio/cxgb/tp.c
142
u32 val = readl(tp->adapter->regs + A_TP_GLOBAL_CONFIG);
drivers/net/ethernet/chelsio/cxgb/tp.c
73
u32 tp_intr = readl(tp->adapter->regs + A_PL_ENABLE);
drivers/net/ethernet/chelsio/cxgb/tp.c
94
u32 tp_intr = readl(tp->adapter->regs + A_PL_ENABLE);
drivers/net/ethernet/chelsio/cxgb3/adapter.h
272
u32 val = readl(adapter->regs + reg_addr);
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
1504
return readl(adap->regs + reg_addr);
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
1515
return readl(addr) + ((u64)readl(addr + 4) << 32);
drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c
1262
i = MBOWNER_G(readl(ctrl));
drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c
1307
if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
6242
pcie_fw = readl(adap->regs + PCIE_FW_A);
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
8938
whoami = readl(regs + PL_WHOAMI_A);
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
8943
whoami = readl(regs + PL_WHOAMI_A);
drivers/net/ethernet/chelsio/cxgb4vf/adapter.h
432
return readl(adapter->regs + reg_addr);
drivers/net/ethernet/chelsio/cxgb4vf/adapter.h
451
return readl(addr) + ((u64)readl(addr + 4) << 32);
drivers/net/ethernet/cisco/enic/vnic_dev.h
20
return (((u64)readl(reg + 0x4UL) << 32) |
drivers/net/ethernet/cisco/enic/vnic_dev.h
21
(u64)readl(reg));
drivers/net/ethernet/cortina/gemini.c
1076
en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
drivers/net/ethernet/cortina/gemini.c
1118
val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
drivers/net/ethernet/cortina/gemini.c
1292
rw.bits32 = readl(ptr_reg);
drivers/net/ethernet/cortina/gemini.c
1363
val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
drivers/net/ethernet/cortina/gemini.c
1368
val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
drivers/net/ethernet/cortina/gemini.c
1373
val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
drivers/net/ethernet/cortina/gemini.c
1392
val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
drivers/net/ethernet/cortina/gemini.c
1461
rw.bits32 = readl(ptr_reg);
drivers/net/ethernet/cortina/gemini.c
1592
reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
drivers/net/ethernet/cortina/gemini.c
1593
reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
drivers/net/ethernet/cortina/gemini.c
1594
reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
drivers/net/ethernet/cortina/gemini.c
1595
reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
drivers/net/ethernet/cortina/gemini.c
1596
reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
drivers/net/ethernet/cortina/gemini.c
1601
reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
drivers/net/ethernet/cortina/gemini.c
1602
reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
drivers/net/ethernet/cortina/gemini.c
1603
reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
drivers/net/ethernet/cortina/gemini.c
1604
reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
drivers/net/ethernet/cortina/gemini.c
1605
reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
drivers/net/ethernet/cortina/gemini.c
1610
reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG);
drivers/net/ethernet/cortina/gemini.c
1611
reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG);
drivers/net/ethernet/cortina/gemini.c
1617
reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG);
drivers/net/ethernet/cortina/gemini.c
1618
reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG);
drivers/net/ethernet/cortina/gemini.c
1619
reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG);
drivers/net/ethernet/cortina/gemini.c
1620
reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG);
drivers/net/ethernet/cortina/gemini.c
1627
reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG);
drivers/net/ethernet/cortina/gemini.c
1628
reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG);
drivers/net/ethernet/cortina/gemini.c
1634
reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG);
drivers/net/ethernet/cortina/gemini.c
1635
reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG);
drivers/net/ethernet/cortina/gemini.c
1636
reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG);
drivers/net/ethernet/cortina/gemini.c
1637
reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG);
drivers/net/ethernet/cortina/gemini.c
1665
rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS);
drivers/net/ethernet/cortina/gemini.c
1667
port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS);
drivers/net/ethernet/cortina/gemini.c
1668
rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST);
drivers/net/ethernet/cortina/gemini.c
1670
rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST);
drivers/net/ethernet/cortina/gemini.c
1672
port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1);
drivers/net/ethernet/cortina/gemini.c
1673
port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2);
drivers/net/ethernet/cortina/gemini.c
1705
val = readl(irqif_reg) & readl(irqen_reg);
drivers/net/ethernet/cortina/gemini.c
1786
dma_ctrl.bits32 = readl(dma_ctrl_reg);
drivers/net/ethernet/cortina/gemini.c
1807
dma_ctrl.bits32 = readl(dma_ctrl_reg);
drivers/net/ethernet/cortina/gemini.c
1953
readl(port->gmac_base + GMAC_IN_DISCARDS);
drivers/net/ethernet/cortina/gemini.c
1954
readl(port->gmac_base + GMAC_IN_ERRORS);
drivers/net/ethernet/cortina/gemini.c
1955
readl(port->gmac_base + GMAC_IN_MCAST);
drivers/net/ethernet/cortina/gemini.c
1956
readl(port->gmac_base + GMAC_IN_BCAST);
drivers/net/ethernet/cortina/gemini.c
1957
readl(port->gmac_base + GMAC_IN_MAC1);
drivers/net/ethernet/cortina/gemini.c
1958
readl(port->gmac_base + GMAC_IN_MAC2);
drivers/net/ethernet/cortina/gemini.c
2040
reg = readl(port->gmac_base + GMAC_CONFIG0);
drivers/net/ethernet/cortina/gemini.c
2142
config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
drivers/net/ethernet/cortina/gemini.c
2169
readl(port->gmac_base + GMAC_CONFIG0);
drivers/net/ethernet/cortina/gemini.c
2307
irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
drivers/net/ethernet/cortina/gemini.c
2324
val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
drivers/net/ethernet/cortina/gemini.c
2325
en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
drivers/net/ethernet/cortina/gemini.c
234
reg = readl(port->gmac_base + GMAC_CONFIG0);
drivers/net/ethernet/cortina/gemini.c
2408
cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0));
drivers/net/ethernet/cortina/gemini.c
2410
cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1));
drivers/net/ethernet/cortina/gemini.c
2412
cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2));
drivers/net/ethernet/cortina/gemini.c
249
reg = readl(port->gmac_base + GMAC_CONFIG0);
drivers/net/ethernet/cortina/gemini.c
2618
val = readl(geth->base + GLOBAL_TOE_VERSION_REG);
drivers/net/ethernet/cortina/gemini.c
264
val = readl(port->gmac_base + GMAC_CONFIG0);
drivers/net/ethernet/cortina/gemini.c
281
val = readl(port->gmac_base + GMAC_CONFIG0);
drivers/net/ethernet/cortina/gemini.c
300
status.bits32 = readl(port->gmac_base + GMAC_STATUS);
drivers/net/ethernet/cortina/gemini.c
514
tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
drivers/net/ethernet/cortina/gemini.c
521
readl(port->dma_base + GMAC_AHB_WEIGHT_REG);
drivers/net/ethernet/cortina/gemini.c
767
rw.bits32 = readl(ptr_reg);
drivers/net/ethernet/cortina/gemini.c
880
rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG);
drivers/net/ethernet/cortina/gemini.c
957
qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
drivers/net/ethernet/davicom/dm9000.c
258
readl(reg);
drivers/net/ethernet/dec/tulip/de2104x.c
1779
readl(ee_addr);
drivers/net/ethernet/dec/tulip/de2104x.c
1781
readl(ee_addr);
drivers/net/ethernet/dec/tulip/de2104x.c
1782
retval = (retval << 1) | ((readl(ee_addr) & EE_DATA_READ) ? 1 : 0);
drivers/net/ethernet/dec/tulip/de2104x.c
1785
readl(ee_addr);
drivers/net/ethernet/dec/tulip/de2104x.c
1789
readl(ee_addr);
drivers/net/ethernet/dec/tulip/de2104x.c
1790
retval = (retval << 1) | ((readl(ee_addr) & EE_DATA_READ) ? 1 : 0);
drivers/net/ethernet/dec/tulip/de2104x.c
1792
readl(ee_addr);
drivers/net/ethernet/freescale/fec_main.c
1121
val = readl(fep->hwp + FEC_ECNTRL);
drivers/net/ethernet/freescale/fec_main.c
1186
u32 val = readl(fep->hwp + FEC_RACC);
drivers/net/ethernet/freescale/fec_main.c
1231
while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
drivers/net/ethernet/freescale/fec_main.c
1402
u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & FEC_RCR_RMII;
drivers/net/ethernet/freescale/fec_main.c
1409
if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
drivers/net/ethernet/freescale/fec_main.c
1428
val = readl(fep->hwp + FEC_ECNTRL);
drivers/net/ethernet/freescale/fec_main.c
1716
readl(txq->bd.reg_desc_active) == 0)
drivers/net/ethernet/freescale/fec_main.c
2478
int_events = readl(fep->hwp + FEC_IEVENT);
drivers/net/ethernet/freescale/fec_main.c
2579
cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW));
drivers/net/ethernet/freescale/fec_main.c
2581
cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
drivers/net/ethernet/freescale/fec_main.c
2740
ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
drivers/net/ethernet/freescale/fec_main.c
2788
ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
drivers/net/ethernet/freescale/fec_main.c
3323
buf[off] = readl(&theregs[off]);
drivers/net/ethernet/freescale/fec_main.c
3490
fep->ethtool_stats[i] = readl(fep->hwp + fec_stats[i].offset);
drivers/net/ethernet/freescale/fec_main.c
4284
tmp = readl(fep->hwp + FEC_R_CNTRL);
drivers/net/ethernet/freescale/fec_main.c
4290
tmp = readl(fep->hwp + FEC_R_CNTRL);
drivers/net/ethernet/freescale/fec_main.c
500
!readl(txq->bd.reg_desc_active) ||
drivers/net/ethernet/freescale/fec_main.c
501
!readl(txq->bd.reg_desc_active) ||
drivers/net/ethernet/freescale/fec_main.c
502
!readl(txq->bd.reg_desc_active) ||
drivers/net/ethernet/freescale/fec_main.c
503
!readl(txq->bd.reg_desc_active))
drivers/net/ethernet/freescale/fec_main.c
5609
val = readl(fep->hwp + FEC_ECNTRL);
drivers/net/ethernet/freescale/fec_ptp.c
105
tempval = readl(fep->hwp + FEC_ATIME_CTRL);
drivers/net/ethernet/freescale/fec_ptp.c
112
return readl(fep->hwp + FEC_ATIME);
drivers/net/ethernet/freescale/fec_ptp.c
151
val = readl(fep->hwp + FEC_TCSR(fep->pps_channel));
drivers/net/ethernet/freescale/fec_ptp.c
155
val = readl(fep->hwp + FEC_TCSR(fep->pps_channel));
drivers/net/ethernet/freescale/fec_ptp.c
203
val = readl(fep->hwp + FEC_ATIME_CTRL);
drivers/net/ethernet/freescale/fec_ptp.c
208
val = readl(fep->hwp + FEC_TCSR(fep->pps_channel));
drivers/net/ethernet/freescale/fec_ptp.c
265
temp_val = readl(fep->hwp + FEC_ATIME_CTRL);
drivers/net/ethernet/freescale/fec_ptp.c
270
temp_val = readl(fep->hwp + FEC_TCSR(fep->pps_channel));
drivers/net/ethernet/freescale/fec_ptp.c
400
tmp = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_MASK;
drivers/net/ethernet/freescale/fec_ptp.c
704
val = readl(fep->hwp + FEC_TCSR(channel));
drivers/net/ethernet/freescale/fec_ptp.c
712
} while (readl(fep->hwp + FEC_TCSR(channel)) & FEC_T_TF_MASK);
drivers/net/ethernet/freescale/fec_ptp.c
816
fep->ptp_saved_state.at_corr = readl(fep->hwp + FEC_ATIME_CORR);
drivers/net/ethernet/freescale/fec_ptp.c
817
atime_inc_corr = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_CORR_MASK;
drivers/net/ethernet/freescale/fec_ptp.c
826
u32 atime_inc = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_MASK;
drivers/net/ethernet/fungible/funcore/fun_dev.c
332
u32 csts = readl(fdev->bar + NVME_REG_CSTS);
drivers/net/ethernet/fungible/funcore/fun_dev.c
52
u32 csts = readl(fdev->bar + NVME_REG_CSTS);
drivers/net/ethernet/fungible/funcore/fun_dev.c
712
fdev->cc_reg = readl(fdev->bar + NVME_REG_CC);
drivers/net/ethernet/fungible/funcore/fun_dev.c
79
u32 csts = readl(fdev->bar + NVME_REG_CSTS);
drivers/net/ethernet/fungible/funeth/funeth_ethtool.c
455
*(u32 *)(buf + NVME_REG_VS) = readl(bar + NVME_REG_VS);
drivers/net/ethernet/fungible/funeth/funeth_ethtool.c
456
*(u32 *)(buf + NVME_REG_INTMS) = readl(bar + NVME_REG_INTMS);
drivers/net/ethernet/fungible/funeth/funeth_ethtool.c
457
*(u32 *)(buf + NVME_REG_INTMC) = readl(bar + NVME_REG_INTMC);
drivers/net/ethernet/fungible/funeth/funeth_ethtool.c
458
*(u32 *)(buf + NVME_REG_CC) = readl(bar + NVME_REG_CC);
drivers/net/ethernet/fungible/funeth/funeth_ethtool.c
459
*(u32 *)(buf + NVME_REG_CSTS) = readl(bar + NVME_REG_CSTS);
drivers/net/ethernet/fungible/funeth/funeth_ethtool.c
460
*(u32 *)(buf + NVME_REG_AQA) = readl(bar + NVME_REG_AQA);
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h
12
return readl(priv->io_base + addr);
drivers/net/ethernet/hisilicon/hip04_eth.c
426
return readl(priv->base + PPE_HIS_RX_PKT_CNT);
drivers/net/ethernet/hisilicon/hisi_femac.c
130
val = readl(priv->glb_base + GLB_IRQ_ENA);
drivers/net/ethernet/hisilicon/hisi_femac.c
138
val = readl(priv->glb_base + GLB_IRQ_ENA);
drivers/net/ethernet/hisilicon/hisi_femac.c
161
val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK;
drivers/net/ethernet/hisilicon/hisi_femac.c
176
val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK;
drivers/net/ethernet/hisilicon/hisi_femac.c
219
while (readl(priv->port_base + ADDRQ_STAT) & BIT_RX_READY) {
drivers/net/ethernet/hisilicon/hisi_femac.c
254
while (readl(priv->glb_base + GLB_IRQ_RAW) & IRQ_INT_RX_RDY) {
drivers/net/ethernet/hisilicon/hisi_femac.c
255
rx_pkt_info = readl(priv->port_base + IQFRM_DES);
drivers/net/ethernet/hisilicon/hisi_femac.c
315
ints = readl(priv->glb_base + GLB_IRQ_RAW);
drivers/net/ethernet/hisilicon/hisi_femac.c
335
ints = readl(priv->glb_base + GLB_IRQ_RAW);
drivers/net/ethernet/hisilicon/hisi_femac.c
447
val = readl(priv->glb_base + GLB_SOFT_RESET);
drivers/net/ethernet/hisilicon/hisi_femac.c
507
val = readl(priv->port_base + ADDRQ_STAT);
drivers/net/ethernet/hisilicon/hisi_femac.c
571
val = readl(priv->glb_base + GLB_MAC_H16(reg_n));
drivers/net/ethernet/hisilicon/hisi_femac.c
592
val = readl(priv->glb_base + high);
drivers/net/ethernet/hisilicon/hisi_femac.c
604
val = readl(priv->glb_base + GLB_FWCTRL);
drivers/net/ethernet/hisilicon/hisi_femac.c
618
val = readl(priv->glb_base + GLB_MACTCTRL);
drivers/net/ethernet/hisilicon/hisi_femac.c
645
val = readl(priv->glb_base + GLB_MACTCTRL);
drivers/net/ethernet/hisilicon/hisi_femac.c
746
val = readl(priv->glb_base + GLB_FWCTRL);
drivers/net/ethernet/hisilicon/hisi_femac.c
751
val = readl(priv->glb_base + GLB_MACTCTRL);
drivers/net/ethernet/hisilicon/hisi_femac.c
755
val = readl(priv->port_base + MAC_SET);
drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
1027
return readl(base + reg);
drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
470
return readl(reg_addr + reg);
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
419
reg_val = readl(tqp_vector->mask_addr + gl_offset) &
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
423
reg_val = readl(tqp_vector->mask_addr + ql_offset) &
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
2878
readl(tx_ring->tqp_vector->mask_addr));
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
645
return readl(base + reg);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
123
sec_h = readl(hdev->ptp->io_base + HCLGE_PTP_CUR_TIME_SEC_H_REG);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
13
ptp->cycle.quo = readl(hdev->ptp->io_base + HCLGE_PTP_CYCLE_QUO_REG) &
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
141
ns = readl(hdev->ptp->io_base + HCLGE_PTP_CUR_TIME_NSEC_REG);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
142
hi = readl(hdev->ptp->io_base + HCLGE_PTP_CUR_TIME_SEC_H_REG);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
143
lo = readl(hdev->ptp->io_base + HCLGE_PTP_CUR_TIME_SEC_L_REG);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
15
ptp->cycle.numer = readl(hdev->ptp->io_base + HCLGE_PTP_CYCLE_NUM_REG);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
16
ptp->cycle.den = readl(hdev->ptp->io_base + HCLGE_PTP_CYCLE_DEN_REG);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
85
ns = readl(hdev->ptp->io_base + HCLGE_PTP_TX_TS_NSEC_REG) &
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
87
lo = readl(hdev->ptp->io_base + HCLGE_PTP_TX_TS_SEC_L_REG);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
88
hi = readl(hdev->ptp->io_base + HCLGE_PTP_TX_TS_SEC_H_REG) &
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
90
hdev->ptp->last_tx_seqid = readl(hdev->ptp->io_base +
drivers/net/ethernet/huawei/hinic/hinic_hw_if.c
143
mask_bits = readl(hwif->intr_regs_base + offset);
drivers/net/ethernet/huawei/hinic/hinic_hw_if.h
250
u32 out = readl(hwif->cfg_regs_bar + reg);
drivers/net/ethernet/intel/e1000/e1000_ethtool.c
672
read = readl(address);
drivers/net/ethernet/intel/e1000/e1000_ethtool.c
692
read = readl(address);
drivers/net/ethernet/intel/e1000/e1000_hw.c
2838
mdic = readl(E1000_MDIO_CMD);
drivers/net/ethernet/intel/e1000/e1000_hw.c
2848
mdic = readl(E1000_MDIO_STS);
drivers/net/ethernet/intel/e1000/e1000_hw.c
2978
mdic = readl(E1000_MDIO_CMD);
drivers/net/ethernet/intel/e1000/e1000_main.c
3470
readl(adapter->hw.hw_addr + i+4),
drivers/net/ethernet/intel/e1000/e1000_main.c
3471
readl(adapter->hw.hw_addr + i),
drivers/net/ethernet/intel/e1000/e1000_main.c
3472
readl(adapter->hw.hw_addr + i+12),
drivers/net/ethernet/intel/e1000/e1000_main.c
3473
readl(adapter->hw.hw_addr + i+8));
drivers/net/ethernet/intel/e1000/e1000_main.c
3480
readl(adapter->hw.hw_addr + i+4),
drivers/net/ethernet/intel/e1000/e1000_main.c
3481
readl(adapter->hw.hw_addr + i),
drivers/net/ethernet/intel/e1000/e1000_main.c
3482
readl(adapter->hw.hw_addr + i+12),
drivers/net/ethernet/intel/e1000/e1000_main.c
3483
readl(adapter->hw.hw_addr + i+8));
drivers/net/ethernet/intel/e1000/e1000_main.c
3918
readl(hw->hw_addr + tx_ring->tdh),
drivers/net/ethernet/intel/e1000/e1000_main.c
3919
readl(hw->hw_addr + tx_ring->tdt),
drivers/net/ethernet/intel/e1000/e1000_osdep.h
29
(readl(hw->hw_addr + ((hw->mac_type >= e1000_82543) \
drivers/net/ethernet/intel/e1000/e1000_osdep.h
42
readl((a)->hw_addr + \
drivers/net/ethernet/intel/e1000/e1000_osdep.h
75
readl((a)->flash_address + reg))
drivers/net/ethernet/intel/e1000e/e1000.h
604
return readl(hw->hw_addr + reg);
drivers/net/ethernet/intel/e1000e/e1000.h
619
(readl((a)->hw_addr + reg + ((offset) << 2)))
drivers/net/ethernet/intel/e1000e/ich8lan.c
148
return readl(hw->flash_address + reg);
drivers/net/ethernet/intel/e1000e/netdev.c
1153
readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
drivers/net/ethernet/intel/e1000e/netdev.c
615
if (unlikely(i != readl(rx_ring->tail))) {
drivers/net/ethernet/intel/e1000e/netdev.c
632
if (unlikely(i != readl(tx_ring->tail))) {
drivers/net/ethernet/intel/fm10k/fm10k_pci.c
359
value = readl(hw_addr);
drivers/net/ethernet/intel/fm10k/fm10k_pci.c
56
value = readl(&hw_addr[reg]);
drivers/net/ethernet/intel/fm10k/fm10k_pci.c
57
if (!(~value) && (!reg || !(~readl(hw_addr)))) {
drivers/net/ethernet/intel/i40e/i40e_io.h
11
#define rd32(a, reg) readl((a)->hw_addr + (reg))
drivers/net/ethernet/intel/i40e/i40e_io.h
14
#define i40e_flush(a) readl((a)->hw_addr + I40E_GLGEN_STAT)
drivers/net/ethernet/intel/i40e/i40e_main.c
399
readl(tx_ring->tail), val);
drivers/net/ethernet/intel/i40e/i40e_txrx.c
850
tail = readl(ring->tail);
drivers/net/ethernet/intel/iavf/iavf_osdep.h
17
#define rd32(a, reg) readl((a)->hw_addr + (reg))
drivers/net/ethernet/intel/iavf/iavf_osdep.h
21
#define iavf_flush(a) readl((a)->hw_addr + IAVF_VFGEN_RSTAT)
drivers/net/ethernet/intel/ice/ice_osdep.h
23
#define rd32(a, reg) readl((a)->hw_addr + (reg))
drivers/net/ethernet/intel/idpf/idpf.h
950
return !(readl(idpf_get_mbx_reg_addr(adapter, adapter->hw.arq->reg.len)) &
drivers/net/ethernet/intel/idpf/idpf_dev.c
160
reset_reg = readl(idpf_get_rstat_reg_addr(adapter, PFGEN_CTRL));
drivers/net/ethernet/intel/idpf/idpf_lib.c
1864
u32 reg_val = readl(reset_reg->rstat);
drivers/net/ethernet/intel/idpf/idpf_main.c
39
if (readl(addr) == IDPF_VF_TEST_VAL)
drivers/net/ethernet/intel/idpf/idpf_mem.h
16
#define idpf_mbx_rd32(a, reg) readl((a)->mbx.vaddr + (reg))
drivers/net/ethernet/intel/idpf/idpf_ptp.c
111
lo = readl(ptp->dev_clk_regs.dev_clk_ns_l);
drivers/net/ethernet/intel/idpf/idpf_ptp.c
116
hi = readl(ptp->dev_clk_regs.dev_clk_ns_h);
drivers/net/ethernet/intel/idpf/idpf_ptp.c
199
dev_time_lo = readl(ptp->dev_clk_regs.dev_clk_ns_l);
drivers/net/ethernet/intel/idpf/idpf_ptp.c
200
dev_time_hi = readl(ptp->dev_clk_regs.dev_clk_ns_h);
drivers/net/ethernet/intel/idpf/idpf_ptp.c
202
sys_time_lo = readl(ptp->dev_clk_regs.sys_time_ns_l);
drivers/net/ethernet/intel/idpf/idpf_ptp.c
203
sys_time_hi = readl(ptp->dev_clk_regs.sys_time_ns_h);
drivers/net/ethernet/intel/igb/igb_main.c
717
value = readl(&hw_addr[reg]);
drivers/net/ethernet/intel/igb/igb_main.c
720
if (!(~value) && (!reg || !(~readl(hw_addr)))) {
drivers/net/ethernet/intel/igb/igb_main.c
8481
readl(tx_ring->tail),
drivers/net/ethernet/intel/igbvf/regs.h
76
#define er32(reg) readl(hw->hw_addr + E1000_##reg)
drivers/net/ethernet/intel/igbvf/regs.h
79
readl(hw->hw_addr + E1000_##reg + (offset << 2))
drivers/net/ethernet/intel/igc/igc_main.c
3262
(rd32(IGC_TDH(tx_ring->reg_idx)) != readl(tx_ring->tail)) &&
drivers/net/ethernet/intel/igc/igc_main.c
3279
readl(tx_ring->tail),
drivers/net/ethernet/intel/igc/igc_main.c
7012
value = readl(&hw_addr[reg]);
drivers/net/ethernet/intel/igc/igc_main.c
7015
if (!(~value) && (!reg || !(~readl(hw_addr)))) {
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
323
value = readl(reg_addr + IXGBE_STATUS);
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
332
value = readl(reg_addr + reg);
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
362
value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
377
value = readl(reg_addr + reg);
drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c
157
value = readl(reg_addr + reg);
drivers/net/ethernet/jme.h
1202
return readl(jme->regs + reg);
drivers/net/ethernet/jme.h
1209
reg_dbg(jme, "VAL AFTER WRITE", readl(jme->regs + reg), reg);
drivers/net/ethernet/jme.h
1219
readl(jme->regs + reg);
drivers/net/ethernet/jme.h
1220
reg_dbg(jme, "VAL AFTER WRITE", readl(jme->regs + reg), reg);
drivers/net/ethernet/korina.c
1076
while ((readl(&lp->eth_regs->ethintfc) & ETH_INT_FC_RIP))
drivers/net/ethernet/korina.c
1094
writel(readl(&lp->tx_dma_regs->dmasm) &
drivers/net/ethernet/korina.c
1097
writel(readl(&lp->rx_dma_regs->dmasm) &
drivers/net/ethernet/korina.c
1161
writel(readl(&lp->tx_dma_regs->dmasm) |
drivers/net/ethernet/korina.c
1164
writel(readl(&lp->rx_dma_regs->dmasm) |
drivers/net/ethernet/korina.c
1250
tmp = readl(&lp->tx_dma_regs->dmasm);
drivers/net/ethernet/korina.c
1255
tmp = readl(&lp->rx_dma_regs->dmasm);
drivers/net/ethernet/korina.c
391
if (readl(&ch->dmac) & DMA_CHAN_RUN_BIT) {
drivers/net/ethernet/korina.c
394
while (!(readl(&ch->dmas) & DMA_STAT_HALT))
drivers/net/ethernet/korina.c
462
if (readl(&(lp->tx_dma_regs->dmandptr)) == 0) {
drivers/net/ethernet/korina.c
549
if (readl(&lp->eth_regs->miimind) & ETH_MII_IND_NV)
drivers/net/ethernet/korina.c
552
ret = readl(&lp->eth_regs->miimrdd);
drivers/net/ethernet/korina.c
577
dmas = readl(&lp->rx_dma_regs->dmas);
drivers/net/ethernet/korina.c
579
dmasm = readl(&lp->rx_dma_regs->dmasm);
drivers/net/ethernet/korina.c
687
dmas = readl(&lp->rx_dma_regs->dmas);
drivers/net/ethernet/korina.c
714
writel(readl(&lp->rx_dma_regs->dmasm) &
drivers/net/ethernet/korina.c
841
dmas = readl(&lp->tx_dma_regs->dmas);
drivers/net/ethernet/korina.c
844
writel(readl(&lp->tx_dma_regs->dmasm) &
drivers/net/ethernet/korina.c
859
dmas = readl(&lp->tx_dma_regs->dmas);
drivers/net/ethernet/korina.c
862
dmasm = readl(&lp->tx_dma_regs->dmasm);
drivers/net/ethernet/korina.c
869
(readl(&(lp->tx_dma_regs->dmandptr)) == 0)) {
drivers/net/ethernet/korina.c
894
writel(readl(&lp->eth_regs->ethmac2) | ETH_MAC2_FD,
drivers/net/ethernet/korina.c
897
writel(readl(&lp->eth_regs->ethmac2) & ~ETH_MAC2_FD,
drivers/net/ethernet/marvell/mv643xx_eth.c
2664
if (readl(msp->base + 0x0400 + SDMA_CONFIG) & 0x02000000)
drivers/net/ethernet/marvell/mv643xx_eth.c
2675
if (readl(msp->base + 0x0400 + TX_BW_MTU_MOVED) & 1) {
drivers/net/ethernet/marvell/mv643xx_eth.c
2679
if (readl(msp->base + 0x0400 + TX_BW_RATE) & 7)
drivers/net/ethernet/marvell/mv643xx_eth.c
421
return readl(mp->shared->base + offset);
drivers/net/ethernet/marvell/mv643xx_eth.c
426
return readl(mp->base + offset);
drivers/net/ethernet/marvell/mvmdio.c
123
return !(readl(dev->regs) & MVMDIO_SMI_BUSY);
drivers/net/ethernet/marvell/mvmdio.c
150
val = readl(dev->regs);
drivers/net/ethernet/marvell/mvmdio.c
180
return !(readl(dev->regs + MVMDIO_XSMI_MGNT_REG) & MVMDIO_XSMI_BUSY);
drivers/net/ethernet/marvell/mvmdio.c
207
if (!(readl(dev->regs + MVMDIO_XSMI_MGNT_REG) &
drivers/net/ethernet/marvell/mvmdio.c
213
return readl(dev->regs + MVMDIO_XSMI_MGNT_REG) & GENMASK(15, 0);
drivers/net/ethernet/marvell/mvmdio.c
263
cfg = readl(dev->regs + MVMDIO_XSMI_CFG_REG);
drivers/net/ethernet/marvell/mvmdio.c
273
if (readl(dev->regs + MVMDIO_ERR_INT_CAUSE) &
drivers/net/ethernet/marvell/mvneta.c
770
return readl(pp->base + offset);
drivers/net/ethernet/marvell/mvneta_bm.c
37
return readl(priv->reg_base + offset);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
101
return readl(priv->cm3_base + offset);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1524
old = val = readl(ptr);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1586
val = readl(xpcs + MVPP22_XPCS_CFG0);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1592
val = readl(mpcs + MVPP22_MPCS_CTRL);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1596
val = readl(mpcs + MVPP22_MPCS_CLK_RESET);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1608
val = readl(fca + MVPP22_FCA_CONTROL_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
167
return readl(priv->swth_base[thread] + offset);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1709
val = readl(port->base + MVPP22_GMAC_INT_SUM_MASK);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1716
val = readl(port->base + MVPP22_XLG_EXT_INT_MASK);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1730
val = readl(port->base + MVPP22_XLG_EXT_INT_MASK);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1739
val = readl(port->base + MVPP22_GMAC_INT_SUM_MASK);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1757
val = readl(port->base + MVPP22_GMAC_INT_MASK);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1763
val = readl(port->base + MVPP22_XLG_INT_MASK);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1806
val = readl(port->base + MVPP22_XLG_CTRL0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1811
val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1824
val = readl(port->base + MVPP22_XLG_CTRL0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1829
val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1839
val = readl(port->base + MVPP2_GMAC_CTRL_1_REG) &
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1850
val = readl(port->base + MVPP2_GMAC_CTRL_1_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1887
val = readl(port->stats_base + counter->offset);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
1889
val += (u64)readl(port->stats_base + counter->offset + 4) << 32;
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2169
val = readl(port->base + MVPP2_GMAC_CTRL_2_REG) |
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2174
val = readl(port->base + MVPP22_XLG_CTRL0_REG) &
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2192
val = readl(mpcs + MVPP22_MPCS_CLK_RESET);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2197
val = readl(xpcs + MVPP22_XPCS_CFG0);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2217
val = readl(mpcs + MVPP22_MPCS_CLK_RESET);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2225
val = readl(xpcs + MVPP22_XPCS_CFG0);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2238
val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2250
val = readl(port->base + MVPP22_XLG_CTRL1_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
2264
val = readl(port->base + MVPP2_GMAC_PORT_FIFO_CFG_1_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3415
val = readl(ptp + MVPP22_PTP_INT_CAUSE);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3457
val = readl(port->base + MVPP22_XLG_INT_STAT);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3459
val = readl(port->base + MVPP22_XLG_STATUS);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3473
val = readl(port->base + MVPP22_GMAC_INT_STAT);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3475
val = readl(port->base + MVPP2_GMAC_STATUS0);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3493
val = readl(port->base + MVPP22_XLG_EXT_INT_STAT);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
3502
val = readl(port->base + MVPP22_GMAC_INT_SUM_STAT);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
4588
ctrl3 = readl(port->base + MVPP22_XLG_CTRL3_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
4696
mac_addr_l = readl(port->base + MVPP2_GMAC_CTRL_1_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
4697
mac_addr_m = readl(port->priv->lms_base + MVPP2_SRC_ADDR_MIDDLE);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
4698
mac_addr_h = readl(port->priv->lms_base + MVPP2_SRC_ADDR_HIGH);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6004
val = readl(port->base + MVPP22_XLG_CTRL0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6009
val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6250
val = readl(port->base + MVPP22_XLG_STATUS);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6254
val = readl(port->base + MVPP22_XLG_CTRL0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6304
val = readl(port->base + MVPP2_GMAC_STATUS0);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6380
old_an = an = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6393
u32 val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6424
val = readl(port->base + MVPP22_XLG_CTRL0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6435
old_ctrl0 = ctrl0 = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6436
old_ctrl2 = ctrl2 = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6437
old_ctrl4 = ctrl4 = readl(port->base + MVPP22_GMAC_CTRL_4_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6590
while (readl(port->base + MVPP2_GMAC_CTRL_2_REG) &
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6705
val = readl(port->base + MVPP22_XLG_CTRL0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6710
val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6738
status = readl(port->base + MVPP2_GMAC_STATUS0);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
6761
lpi1 = readl(port->base + MVPP2_GMAC_LPI_CTRL1);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
7483
val = readl(priv->lms_base + MVPP2_PHY_AN_CFG0_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
7487
val = readl(priv->iface_base + MVPP22_SMI_MISC_CFG_REG);
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
81
return readl(priv->swth_base[0] + offset);
drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c
260
tcsr = readl(base + MVPP22_TAI_TCSR);
drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c
301
reset_instr_cnt = readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c
753
u32 pkt_in_done = readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep/octep_cnxk_pf.c
322
reset_instr_cnt = readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep/octep_cnxk_pf.c
792
u32 pkt_in_done = readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c
101
mbox->barmem_sz = readl(OCTEP_CTRL_MBOX_INFO_BARMEM_SZ(mbox->barmem));
drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c
109
mbox->h2fq.sz = readl(OCTEP_CTRL_MBOX_H2FQ_SZ(mbox->barmem));
drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c
114
mbox->f2hq.sz = readl(OCTEP_CTRL_MBOX_F2HQ_SZ(mbox->barmem));
drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c
175
pi = readl(q->hw_prod);
drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c
176
ci = readl(q->hw_cons);
drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c
237
pi = readl(q->hw_prod);
drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c
238
ci = readl(q->hw_cons);
drivers/net/ethernet/marvell/octeon_ep/octep_main.c
572
readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep/octep_main.c
578
readl(oq->pkts_sent_reg);
drivers/net/ethernet/marvell/octeon_ep/octep_main.h
350
readl((octep_dev)->mmio[0].hw_addr + (reg_off))
drivers/net/ethernet/marvell/octeon_ep/octep_rx.c
329
pkt_count = readl(oq->pkts_sent_reg);
drivers/net/ethernet/marvell/octeon_ep/octep_rx.c
344
pkt_count = readl(oq->pkts_sent_reg);
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cn9k.c
190
reset_instr_cnt = readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cn9k.c
355
u32 pkt_in_done = readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cnxk.c
193
reset_instr_cnt = readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cnxk.c
398
u32 pkt_in_done = readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c
305
readl(iq->inst_cnt_reg);
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c
311
readl(oq->pkts_sent_reg);
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h
318
readl((octep_vf_dev)->mmio.hw_addr + (reg_off))
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c
330
pkt_count = readl(oq->pkts_sent_reg);
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c
346
pkt_count = readl(oq->pkts_sent_reg);
drivers/net/ethernet/marvell/prestera/prestera.h
348
return readl(sw->dev->pp_regs + reg);
drivers/net/ethernet/marvell/prestera/prestera_pci.c
239
return readl(PRESTERA_FW_REG_ADDR(fw, reg));
drivers/net/ethernet/marvell/prestera/prestera_pci.c
273
val = readl(prestera_fw_evtq_buf(fw, qid) + rd_idx);
drivers/net/ethernet/marvell/prestera/prestera_pci.c
532
return readl(PRESTERA_LDR_REG_ADDR(fw, reg));
drivers/net/ethernet/marvell/skge.h
2478
return readl(hw->regs + reg);
drivers/net/ethernet/marvell/sky2.h
2317
return readl(hw->regs + reg);
drivers/net/ethernet/mediatek/mtk_ppe.c
108
cnt_r0 = readl(ppe->base + MTK_PPE_MIB_SER_R0);
drivers/net/ethernet/mediatek/mtk_ppe.c
109
cnt_r1 = readl(ppe->base + MTK_PPE_MIB_SER_R1);
drivers/net/ethernet/mediatek/mtk_ppe.c
110
cnt_r2 = readl(ppe->base + MTK_PPE_MIB_SER_R2);
drivers/net/ethernet/mediatek/mtk_ppe.c
114
u32 cnt_r3 = readl(ppe->base + MTK_PPE_MIB_SER_R3);
drivers/net/ethernet/mediatek/mtk_ppe.c
36
return readl(ppe->base + reg);
drivers/net/ethernet/mediatek/mtk_wed.c
1021
u32 cur_idx = readl(ring->wpdma + MTK_WED_RING_OFS_CPU_IDX);
drivers/net/ethernet/mediatek/mtk_wed.c
138
return readl(dev->wlan.base + reg);
drivers/net/ethernet/mediatek/mtk_wed.c
2242
readl(regs));
drivers/net/ethernet/mediatek/mtk_wed.c
2244
readl(regs + MTK_WED_RING_OFS_COUNT));
drivers/net/ethernet/mediatek/mtk_wed.c
2255
readl(regs));
drivers/net/ethernet/mediatek/mtk_wed.c
2257
readl(regs + MTK_WED_RING_OFS_COUNT));
drivers/net/ethernet/mediatek/mtk_wed.c
2265
u32 val = readl(regs + MTK_WED_RING_OFS_COUNT);
drivers/net/ethernet/mediatek/mtk_wed.c
2270
readl(regs) & 0xfffffff0);
drivers/net/ethernet/mediatek/mtk_wed.c
2273
readl(regs + MTK_WED_RING_OFS_COUNT));
drivers/net/ethernet/mediatek/mtk_wed.c
2549
u32 val = readl(regs + i);
drivers/net/ethernet/mediatek/mtk_wed.c
425
val = readl(reg);
drivers/net/ethernet/mediatek/mtk_wed.h
110
return readl(dev->hw->wdma + reg);
drivers/net/ethernet/mediatek/mtk_wed.h
119
return readl(dev->tx_ring[ring].wpdma + reg);
drivers/net/ethernet/mediatek/mtk_wed.h
137
return readl(dev->rx_ring[ring].wpdma + reg);
drivers/net/ethernet/mediatek/mtk_wed.h
155
return readl(dev->txfree_ring.wpdma + reg);
drivers/net/ethernet/mediatek/mtk_wed_mcu.c
37
return readl(mem_region[MTK_WED_WO_REGION_BOOT].addr + reg);
drivers/net/ethernet/mellanox/mlx4/catas.c
106
comm_flags = swab32(readl((__iomem char *)priv->mfunc.comm +
drivers/net/ethernet/mellanox/mlx4/catas.c
135
comm_flags = swab32(readl((__iomem char *)priv->mfunc.comm +
drivers/net/ethernet/mellanox/mlx4/catas.c
234
i, swab32(readl(priv->catas_err.map + i)));
drivers/net/ethernet/mellanox/mlx4/catas.c
244
slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
drivers/net/ethernet/mellanox/mlx4/catas.c
249
} else if (readl(priv->catas_err.map)) {
drivers/net/ethernet/mellanox/mlx4/cmd.c
2262
comm_cmd = swab32(readl(&mfunc->comm[slave].slave_write));
drivers/net/ethernet/mellanox/mlx4/cmd.c
2263
slt = swab32(readl(&mfunc->comm[slave].slave_read)) >> 31;
drivers/net/ethernet/mellanox/mlx4/cmd.c
2297
wr_toggle = swab32(readl(&priv->mfunc.comm->slave_write));
drivers/net/ethernet/mellanox/mlx4/cmd.c
2304
rd_toggle = swab32(readl(&priv->mfunc.comm->slave_read));
drivers/net/ethernet/mellanox/mlx4/cmd.c
2319
wr_toggle = swab32(readl(&priv->mfunc.comm->
drivers/net/ethernet/mellanox/mlx4/cmd.c
2560
slave_read = swab32(readl(&priv->mfunc.comm[slave].slave_read));
drivers/net/ethernet/mellanox/mlx4/cmd.c
258
u32 status = readl(&priv->mfunc.comm->slave_read);
drivers/net/ethernet/mellanox/mlx4/cmd.c
425
status = readl(mlx4_priv(dev)->cmd.hcr + HCR_STATUS_OFFSET);
drivers/net/ethernet/mellanox/mlx4/crdump.c
112
readl(cr_space + offset);
drivers/net/ethernet/mellanox/mlx4/crdump.c
151
readl(health_buf_start + offset);
drivers/net/ethernet/mellanox/mlx4/crdump.c
65
readl(cr_space + CR_ENABLE_BIT_OFFSET) & CR_ENABLE_BIT;
drivers/net/ethernet/mellanox/mlx4/crdump.c
69
writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) & ~CR_ENABLE_BIT,
drivers/net/ethernet/mellanox/mlx4/crdump.c
86
writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) | CR_ENABLE_BIT,
drivers/net/ethernet/mellanox/mlx4/intf.c
367
swab32(readl(&mlx4_priv(dev)->mfunc.comm->slave_read));
drivers/net/ethernet/mellanox/mlx4/main.c
1932
clockhi = swab32(readl(priv->clock_mapping));
drivers/net/ethernet/mellanox/mlx4/main.c
1933
clocklo = swab32(readl(priv->clock_mapping + 4));
drivers/net/ethernet/mellanox/mlx4/main.c
1934
clockhi1 = swab32(readl(priv->clock_mapping));
drivers/net/ethernet/mellanox/mlx4/main.c
2024
comm_flags = swab32(readl((__iomem char *)priv->mfunc.comm +
drivers/net/ethernet/mellanox/mlx4/main.c
2057
comm_caps = swab32(readl((__iomem char *)priv->mfunc.comm +
drivers/net/ethernet/mellanox/mlx4/main.c
2102
slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
drivers/net/ethernet/mellanox/mlx4/main.c
3245
ret = readl(owner);
drivers/net/ethernet/mellanox/mlx4/reset.c
104
sem = readl(reset + MLX4_SEM_OFFSET);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
132
data = readl(priv->llu_base + MLXBF_GIGE_BF2_LLU_GENERAL_CONFIG);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
136
data = readl(priv->llu_base + MLXBF_GIGE_BF3_LLU_GENERAL_CONFIG);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
152
data_lo = readl(priv->llu_base + MLXBF_GIGE_TX_PAUSE_CNT_LO);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
153
data_hi = readl(priv->llu_base + MLXBF_GIGE_TX_PAUSE_CNT_HI);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
156
data_lo = readl(priv->llu_base + MLXBF_GIGE_RX_PAUSE_CNT_LO);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
157
data_hi = readl(priv->llu_base + MLXBF_GIGE_RX_PAUSE_CNT_HI);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
325
val = readl(priv->plu_base + MLXBF_GIGE_PLU_TX_REG0);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
331
val = readl(priv->plu_base + MLXBF_GIGE_PLU_RX_REG0);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
142
reg1 = readl(priv->clk_io + MLXBF_GIGE_MDIO_PLL_I1CLK_REG1);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
143
reg2 = readl(priv->clk_io + MLXBF_GIGE_MDIO_PLL_I1CLK_REG2);
drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
231
ret = readl(priv->mdio_io + priv->mdio_gw->read_data_address);
drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c
43
tail = readl(csr_base + FBNIC_QUEUE_TWQ0_PTRS);
drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c
47
tail = readl(csr_base + FBNIC_QUEUE_TWQ1_PTRS);
drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c
51
head = readl(csr_base + FBNIC_QUEUE_TCQ_PTRS);
drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c
55
tail = readl(csr_base + FBNIC_QUEUE_BDQ_HPQ_PTRS);
drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c
59
tail = readl(csr_base + FBNIC_QUEUE_BDQ_PPQ_PTRS);
drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c
63
head = readl(csr_base + FBNIC_QUEUE_RCQ_PTRS);
drivers/net/ethernet/meta/fbnic/fbnic_pci.c
45
value = readl(csr + reg);
drivers/net/ethernet/meta/fbnic/fbnic_pci.c
52
if (reg != FBNIC_MASTER_SPARE_0 && ~readl(csr + FBNIC_MASTER_SPARE_0))
drivers/net/ethernet/meta/fbnic/fbnic_pci.c
91
value = readl(csr + reg);
drivers/net/ethernet/meta/fbnic/fbnic_pci.c
98
if (reg != FBNIC_FW_ZERO_REG && ~readl(csr + FBNIC_FW_ZERO_REG))
drivers/net/ethernet/meta/fbnic/fbnic_txrx.c
55
return readl(csr_base + csr);
drivers/net/ethernet/micrel/ksz884x.c
1434
hw->intr_set = readl(hw->io + KS884X_INTERRUPTS_ENABLE);
drivers/net/ethernet/micrel/ksz884x.c
1458
read_intr = readl(hw->io + KS884X_INTERRUPTS_ENABLE);
drivers/net/ethernet/micrel/ksz884x.c
1482
*status = readl(hw->io + KS884X_INTERRUPTS_STATUS);
drivers/net/ethernet/micrel/ksz884x.c
1602
*data = readl(hw->io + KS884X_ACC_DATA_0_OFFSET);
drivers/net/ethernet/micrel/ksz884x.c
1730
data = readl(hw->io + KS884X_ACC_DATA_0_OFFSET);
drivers/net/ethernet/micrel/ksz884x.c
1770
data = readl(hw->io + KS884X_ACC_DATA_0_OFFSET);
drivers/net/ethernet/micrel/ksz884x.c
4912
data = readl(hw->io + KS_DMA_TX_CTRL);
drivers/net/ethernet/micrel/ksz884x.c
5768
*buf = readl(hw->io + len);
drivers/net/ethernet/microchip/lan966x/lan966x_main.h
718
return readl(lan_addr(lan966x->regs, id, tinst, tcnt, gbase, ginst,
drivers/net/ethernet/microchip/lan966x/lan966x_main.h
739
nval = readl(lan_addr(lan966x->regs, id, tinst, tcnt, gbase, ginst,
drivers/net/ethernet/microchip/sparx5/sparx5_main.c
427
value = readl(cfg->init_reg);
drivers/net/ethernet/microchip/sparx5/sparx5_main.h
792
return readl(spx5_addr(sparx5->regs, id, tinst, tcnt, gbase, ginst,
drivers/net/ethernet/microchip/sparx5/sparx5_main.h
800
return readl(spx5_inst_addr(iomem, gbase, ginst,
drivers/net/ethernet/microchip/sparx5/sparx5_main.h
831
nval = readl(spx5_addr(sparx5->regs, id, tinst, tcnt, gbase, ginst,
drivers/net/ethernet/microchip/sparx5/sparx5_main.h
845
nval = readl(spx5_inst_addr(iomem, gbase, ginst, gcnt, gwidth, raddr,
drivers/net/ethernet/microsoft/mana/gdma_main.c
34
return readl(g->bar0_va + offset);
drivers/net/ethernet/microsoft/mana/shm_channel.c
108
hdr.as_uint32 = readl(base + SMC_LAST_DWORD * SMC_BASIC_UNIT);
drivers/net/ethernet/microsoft/mana/shm_channel.c
80
last_dword = readl(ptr);
drivers/net/ethernet/moxa/moxart_ether.c
176
__func__, readl(priv->base + REG_INTERRUPT_MASK),
drivers/net/ethernet/moxa/moxart_ether.c
177
readl(priv->base + REG_MAC_CTRL));
drivers/net/ethernet/moxa/moxart_ether.c
313
unsigned int ists = readl(priv->base + REG_INTERRUPT_STATUS);
drivers/net/ethernet/moxa/moxart_ether.c
410
writel(readl(priv->base + REG_MCAST_HASH_TABLE1) |
drivers/net/ethernet/moxa/moxart_ether.c
414
writel(readl(priv->base + REG_MCAST_HASH_TABLE0) |
drivers/net/ethernet/moxa/moxart_ether.c
94
while (readl(priv->base + REG_MAC_CTRL) & SW_RST)
drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c
21
return readl(hw->hw_addr + mbx->fwpf_shm_base + reg);
drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c
49
return readl(hw->hw_addr + mbx->fwpf_ctrl_base + reg);
drivers/net/ethernet/myricom/myri10ge/myri10ge.c
1887
hdr_off = swab32(readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
drivers/net/ethernet/myricom/myri10ge/myri10ge.c
1893
hdr_len = swab32(readl(mgp->sram + hdr_off +
drivers/net/ethernet/myricom/myri10ge/myri10ge.c
1901
pattern = swab32(readl(mgp->sram + pattern_off + 4));
drivers/net/ethernet/myricom/myri10ge/myri10ge.c
3826
swab32(readl(mgp->sram + MCP_HEADER_PTR_OFFSET)) & 0xffffc;
drivers/net/ethernet/myricom/myri10ge/myri10ge.c
3828
mgp->sram_size = swab32(readl(mgp->sram + ss_offset));
drivers/net/ethernet/myricom/myri10ge/myri10ge.c
652
hdr_offset = swab32(readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
drivers/net/ethernet/natsemi/natsemi.c
1026
retval |= (readl(ee_addr) & EE_DataOut) ? 1 << i : 0;
drivers/net/ethernet/natsemi/natsemi.c
1046
#define mii_delay(ioaddr) readl(ioaddr + EECtrl)
drivers/net/ethernet/natsemi/natsemi.c
1054
data = readl(ioaddr + EECtrl);
drivers/net/ethernet/natsemi/natsemi.c
1178
readl(ioaddr + ChipConfig);
drivers/net/ethernet/natsemi/natsemi.c
1200
cfg = readl(ioaddr + ChipConfig);
drivers/net/ethernet/natsemi/natsemi.c
1226
readl(ioaddr + ChipConfig);
drivers/net/ethernet/natsemi/natsemi.c
1262
cfg = readl(ioaddr + ChipConfig);
drivers/net/ethernet/natsemi/natsemi.c
1273
readl(ioaddr + ChipConfig);
drivers/net/ethernet/natsemi/natsemi.c
1297
cfg = readl(ioaddr + ChipConfig);
drivers/net/ethernet/natsemi/natsemi.c
1308
readl(ioaddr + ChipConfig);
drivers/net/ethernet/natsemi/natsemi.c
1314
readl(ioaddr + ChipConfig);
drivers/net/ethernet/natsemi/natsemi.c
1404
cfg = readl(ioaddr + ChipConfig) & CFG_RESET_SAVE;
drivers/net/ethernet/natsemi/natsemi.c
1406
wcsr = readl(ioaddr + WOLCmd) & WCSR_RESET_SAVE;
drivers/net/ethernet/natsemi/natsemi.c
1408
rfcr = readl(ioaddr + RxFilterAddr) & RFCR_RESET_SAVE;
drivers/net/ethernet/natsemi/natsemi.c
1423
if (!(readl(ioaddr + ChipCmd) & ChipReset))
drivers/net/ethernet/natsemi/natsemi.c
1436
cfg |= readl(ioaddr + ChipConfig) & ~CFG_RESET_SAVE;
drivers/net/ethernet/natsemi/natsemi.c
1444
wcsr |= readl(ioaddr + WOLCmd) & ~WCSR_RESET_SAVE;
drivers/net/ethernet/natsemi/natsemi.c
1447
rfcr |= readl(ioaddr + RxFilterAddr) & ~RFCR_RESET_SAVE;
drivers/net/ethernet/natsemi/natsemi.c
1472
np->intr_status |= readl(ioaddr + IntrStatus);
drivers/net/ethernet/natsemi/natsemi.c
1495
if (!(readl(ioaddr + PCIBusCfg) & EepromReload))
drivers/net/ethernet/natsemi/natsemi.c
1515
if ((readl(ioaddr + ChipCmd) & (TxOn|RxOn)) == 0)
drivers/net/ethernet/natsemi/natsemi.c
1568
dev->name, (int)readl(ioaddr + ChipCmd));
drivers/net/ethernet/natsemi/natsemi.c
1595
if (readl(ioaddr + ChipConfig) & CfgSpeed100) {
drivers/net/ethernet/natsemi/natsemi.c
1716
readl(ioaddr + IntrStatus);
drivers/net/ethernet/natsemi/natsemi.c
1756
np->SavedClkRun = readl(ioaddr + ClkRun);
drivers/net/ethernet/natsemi/natsemi.c
1760
dev->name, readl(ioaddr + WOLCmd));
drivers/net/ethernet/natsemi/natsemi.c
1894
dev->name, readl(ioaddr + IntrStatus));
drivers/net/ethernet/natsemi/natsemi.c
2192
if (np->hands_off || !readl(ioaddr + IntrEnable))
drivers/net/ethernet/natsemi/natsemi.c
2195
np->intr_status = readl(ioaddr + IntrStatus);
drivers/net/ethernet/natsemi/natsemi.c
2204
readl(ioaddr + IntrMask));
drivers/net/ethernet/natsemi/natsemi.c
2216
readl(ioaddr + IntrMask));
drivers/net/ethernet/natsemi/natsemi.c
2236
readl(ioaddr + IntrMask));
drivers/net/ethernet/natsemi/natsemi.c
2260
np->intr_status = readl(ioaddr + IntrStatus);
drivers/net/ethernet/natsemi/natsemi.c
2433
int wol_status = readl(ioaddr + WOLCmd);
drivers/net/ethernet/natsemi/natsemi.c
2462
dev->stats.rx_crc_errors += readl(ioaddr + RxCRCErrs);
drivers/net/ethernet/natsemi/natsemi.c
2463
dev->stats.rx_missed_errors += readl(ioaddr + RxMissed);
drivers/net/ethernet/natsemi/natsemi.c
2706
u32 data = readl(ioaddr + WOLCmd) & ~WakeOptsSummary;
drivers/net/ethernet/natsemi/natsemi.c
2736
u32 regval = readl(ioaddr + WOLCmd);
drivers/net/ethernet/natsemi/natsemi.c
2780
addr = readl(ioaddr + RxFilterAddr) & ~RFCRAddressMask;
drivers/net/ethernet/natsemi/natsemi.c
2813
addr = readl(ioaddr + RxFilterAddr) & ~RFCRAddressMask;
drivers/net/ethernet/natsemi/natsemi.c
3012
rbuf[i] = readl(ioaddr + i*4);
drivers/net/ethernet/natsemi/natsemi.c
3028
rfcr = readl(ioaddr + RxFilterAddr);
drivers/net/ethernet/natsemi/natsemi.c
3140
readl(ioaddr + WOLCmd);
drivers/net/ethernet/natsemi/natsemi.c
3166
dev->name, (int)readl(ioaddr + ChipCmd));
drivers/net/ethernet/natsemi/natsemi.c
3198
readl(ioaddr + IntrMask);
drivers/net/ethernet/natsemi/natsemi.c
3219
u32 wol = readl(ioaddr + WOLCmd) & WakeOptsSummary;
drivers/net/ethernet/natsemi/natsemi.c
3302
u32 wol = readl(ioaddr + WOLCmd) & WakeOptsSummary;
drivers/net/ethernet/natsemi/natsemi.c
713
readl(ns_ioaddr(dev) + IntrEnable);
drivers/net/ethernet/natsemi/natsemi.c
719
readl(ns_ioaddr(dev) + IntrEnable);
drivers/net/ethernet/natsemi/natsemi.c
898
if (np->ignore_phy || readl(ioaddr + ChipConfig) & CfgExtPhy)
drivers/net/ethernet/natsemi/natsemi.c
946
np->srr = readl(ioaddr + SiliconRev);
drivers/net/ethernet/natsemi/natsemi.c
993
#define eeprom_delay(ee_addr) readl(ee_addr)
drivers/net/ethernet/natsemi/ns83820.c
1178
ndev->stats.rx_errors += readl(base + 0x60) & 0xffff;
drivers/net/ethernet/natsemi/ns83820.c
1179
ndev->stats.rx_crc_errors += readl(base + 0x64) & 0xffff;
drivers/net/ethernet/natsemi/ns83820.c
1180
ndev->stats.rx_missed_errors += readl(base + 0x68) & 0xffff;
drivers/net/ethernet/natsemi/ns83820.c
1181
ndev->stats.rx_frame_errors += readl(base + 0x6c) & 0xffff;
drivers/net/ethernet/natsemi/ns83820.c
1182
/*ndev->stats.rx_symbol_errors +=*/ readl(base + 0x70);
drivers/net/ethernet/natsemi/ns83820.c
1183
ndev->stats.rx_length_errors += readl(base + 0x74) & 0xffff;
drivers/net/ethernet/natsemi/ns83820.c
1184
ndev->stats.rx_length_errors += readl(base + 0x78) & 0xffff;
drivers/net/ethernet/natsemi/ns83820.c
1185
/*ndev->stats.rx_badopcode_errors += */ readl(base + 0x7c);
drivers/net/ethernet/natsemi/ns83820.c
1186
/*ndev->stats.rx_pause_count += */ readl(base + 0x80);
drivers/net/ethernet/natsemi/ns83820.c
1187
/*ndev->stats.tx_pause_count += */ readl(base + 0x84);
drivers/net/ethernet/natsemi/ns83820.c
1188
ndev->stats.tx_carrier_errors += readl(base + 0x88) & 0xff;
drivers/net/ethernet/natsemi/ns83820.c
1226
cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY;
drivers/net/ethernet/natsemi/ns83820.c
1227
readl(dev->base + TANAR);
drivers/net/ethernet/natsemi/ns83820.c
1228
tbicr = readl(dev->base + TBICR);
drivers/net/ethernet/natsemi/ns83820.c
1280
cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY;
drivers/net/ethernet/natsemi/ns83820.c
1281
tanar = readl(dev->base + TANAR);
drivers/net/ethernet/natsemi/ns83820.c
1302
writel(readl(dev->base + TXCFG)
drivers/net/ethernet/natsemi/ns83820.c
1305
writel(readl(dev->base + RXCFG) | RXCFG_RX_FD,
drivers/net/ethernet/natsemi/ns83820.c
1308
writel(readl(dev->base + GPIOR) | GPIOR_GP1_OUT,
drivers/net/ethernet/natsemi/ns83820.c
1361
u32 cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY;
drivers/net/ethernet/natsemi/ns83820.c
1376
readl(dev->base + IER);
drivers/net/ethernet/natsemi/ns83820.c
1398
isr = readl(dev->base + ISR);
drivers/net/ethernet/natsemi/ns83820.c
1451
txdp = readl(dev->base + TXDP);
drivers/net/ethernet/natsemi/ns83820.c
1520
} while (readl(dev->base + CR) & which);
drivers/net/ethernet/natsemi/ns83820.c
1569
isr = readl(dev->base + ISR);
drivers/net/ethernet/natsemi/ns83820.c
1663
data = readl(dev->base + RFDR);
drivers/net/ethernet/natsemi/ns83820.c
1690
val = (readl(rfcr) & and_mask) | or_mask;
drivers/net/ethernet/natsemi/ns83820.c
1712
status = readl(dev->base + PTSCR);
drivers/net/ethernet/natsemi/ns83820.c
1742
readl(dev->base + MEAR);
drivers/net/ethernet/natsemi/ns83820.c
1753
readl(dev->base + MEAR);
drivers/net/ethernet/natsemi/ns83820.c
1761
readl(dev->base + MEAR);
drivers/net/ethernet/natsemi/ns83820.c
1775
readl(dev->base + MEAR);
drivers/net/ethernet/natsemi/ns83820.c
1781
bit = (readl(dev->base + MEAR) & MEAR_MDIO) ? 1 : 0;
drivers/net/ethernet/natsemi/ns83820.c
1983
ndev->name, le32_to_cpu(readl(dev->base + 0x22c)),
drivers/net/ethernet/natsemi/ns83820.c
2002
dev->CFG_cache = readl(dev->base + CFG);
drivers/net/ethernet/natsemi/ns83820.c
2038
writel(readl(dev->base + GPIOR) | 0x3e8, dev->base + GPIOR);
drivers/net/ethernet/natsemi/ns83820.c
2041
writel(readl(dev->base + TANAR)
drivers/net/ethernet/natsemi/ns83820.c
2067
if (readl(dev->base + SRR))
drivers/net/ethernet/natsemi/ns83820.c
2068
writel(readl(dev->base+0x20c) | 0xfe00, dev->base + 0x20c);
drivers/net/ethernet/natsemi/ns83820.c
2162
(unsigned)readl(dev->base + SRR) >> 8,
drivers/net/ethernet/natsemi/ns83820.c
2163
(unsigned)readl(dev->base + SRR) & 0xff,
drivers/net/ethernet/natsemi/ns83820.c
606
cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY;
drivers/net/ethernet/natsemi/ns83820.c
612
tbisr = readl(dev->base + TBISR);
drivers/net/ethernet/natsemi/ns83820.c
613
tanar = readl(dev->base + TANAR);
drivers/net/ethernet/natsemi/ns83820.c
614
tanlpar = readl(dev->base + TANLPAR);
drivers/net/ethernet/natsemi/ns83820.c
622
writel(readl(dev->base + TXCFG)
drivers/net/ethernet/natsemi/ns83820.c
625
writel(readl(dev->base + RXCFG) | RXCFG_RX_FD,
drivers/net/ethernet/natsemi/ns83820.c
628
writel(readl(dev->base + GPIOR) | GPIOR_GP1_OUT,
drivers/net/ethernet/natsemi/ns83820.c
639
writel((readl(dev->base + TXCFG)
drivers/net/ethernet/natsemi/ns83820.c
642
writel(readl(dev->base + RXCFG) & ~RXCFG_RX_FD,
drivers/net/ethernet/natsemi/ns83820.c
645
writel(readl(dev->base + GPIOR) & ~GPIOR_GP1_OUT,
drivers/net/ethernet/natsemi/ns83820.c
665
writel(readl(dev->base + TXCFG)
drivers/net/ethernet/natsemi/ns83820.c
668
writel(readl(dev->base + RXCFG) | RXCFG_RX_FD,
drivers/net/ethernet/natsemi/ns83820.c
671
writel(readl(dev->base + TXCFG)
drivers/net/ethernet/natsemi/ns83820.c
674
writel(readl(dev->base + RXCFG) & ~(RXCFG_RX_FD),
drivers/net/ethernet/natsemi/ns83820.c
783
readl(dev->base + IMR);
drivers/net/ethernet/natsemi/ns83820.c
831
readl(dev->base + RXDP),
drivers/net/ethernet/netronome/nfp/bpf/main.c
217
bpf->adjust_head.flags = readl(&cap->flags);
drivers/net/ethernet/netronome/nfp/bpf/main.c
218
bpf->adjust_head.off_min = readl(&cap->off_min);
drivers/net/ethernet/netronome/nfp/bpf/main.c
219
bpf->adjust_head.off_max = readl(&cap->off_max);
drivers/net/ethernet/netronome/nfp/bpf/main.c
220
bpf->adjust_head.guaranteed_sub = readl(&cap->guaranteed_sub);
drivers/net/ethernet/netronome/nfp/bpf/main.c
221
bpf->adjust_head.guaranteed_add = readl(&cap->guaranteed_add);
drivers/net/ethernet/netronome/nfp/bpf/main.c
247
switch (readl(&cap->func_id)) {
drivers/net/ethernet/netronome/nfp/bpf/main.c
249
bpf->helpers.map_lookup = readl(&cap->func_addr);
drivers/net/ethernet/netronome/nfp/bpf/main.c
252
bpf->helpers.map_update = readl(&cap->func_addr);
drivers/net/ethernet/netronome/nfp/bpf/main.c
255
bpf->helpers.map_delete = readl(&cap->func_addr);
drivers/net/ethernet/netronome/nfp/bpf/main.c
258
bpf->helpers.perf_event_output = readl(&cap->func_addr);
drivers/net/ethernet/netronome/nfp/bpf/main.c
275
bpf->maps.types = readl(&cap->types);
drivers/net/ethernet/netronome/nfp/bpf/main.c
276
bpf->maps.max_maps = readl(&cap->max_maps);
drivers/net/ethernet/netronome/nfp/bpf/main.c
277
bpf->maps.max_elems = readl(&cap->max_elems);
drivers/net/ethernet/netronome/nfp/bpf/main.c
278
bpf->maps.max_key_sz = readl(&cap->max_key_sz);
drivers/net/ethernet/netronome/nfp/bpf/main.c
279
bpf->maps.max_val_sz = readl(&cap->max_val_sz);
drivers/net/ethernet/netronome/nfp/bpf/main.c
280
bpf->maps.max_elem_sz = readl(&cap->max_elem_sz);
drivers/net/ethernet/netronome/nfp/bpf/main.c
326
bpf->abi_version = readl(value);
drivers/net/ethernet/netronome/nfp/bpf/main.c
352
type = readl(mem);
drivers/net/ethernet/netronome/nfp/bpf/main.c
353
length = readl(mem + 4);
drivers/net/ethernet/netronome/nfp/ccm_mbox.c
229
tlv_hdr = readl(data);
drivers/net/ethernet/netronome/nfp/ccm_mbox.c
260
hdr.raw = cpu_to_be32(readl(data));
drivers/net/ethernet/netronome/nfp/ccm_mbox.c
316
skb_data[i] = cpu_to_be32(readl(data + i * 4));
drivers/net/ethernet/netronome/nfp/nfp_net.h
802
return readl(nn->dp.ctrl_bar + off);
drivers/net/ethernet/netronome/nfp/nfp_net.h
882
val = readl(q + off);
drivers/net/ethernet/netronome/nfp/nfp_net_common.c
68
reg = readl(ctrl_bar + NFP_NET_CFG_VERSION);
drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.c
124
caps->repr_cap = readl(data);
drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.c
128
caps->mbox_cmsg_types = readl(data);
drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.c
37
caps->crypto_ops = readl(data);
drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.c
53
hdr = readl(data);
drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.c
59
u32 hdr = readl(data);
drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.c
99
caps->me_freq_mhz = readl(data);
drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
1868
regs_buf[i] = readl(nn->dp.ctrl_bar + (i * sizeof(u32)));
drivers/net/ethernet/netronome/nfp/nfp_net_main.c
107
tx_base = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
drivers/net/ethernet/netronome/nfp/nfp_net_main.c
108
rx_base = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
drivers/net/ethernet/netronome/nfp/nfp_net_main.c
109
n_tx_rings = readl(ctrl_bar + NFP_NET_CFG_MAX_TXRINGS);
drivers/net/ethernet/netronome/nfp/nfp_net_main.c
110
n_rx_rings = readl(ctrl_bar + NFP_NET_CFG_MAX_RXRINGS);
drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c
276
mac_hi = readl(app->pf->vfcfg_tbl2 + vf_offset);
drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c
280
vlan_tag = readl(app->pf->vfcfg_tbl2 + vf_offset + NFP_NET_VF_CFG_VLAN);
drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c
298
rate = readl(app->pf->vfcfg_tbl2 + vf_offset +
drivers/net/ethernet/netronome/nfp/nfp_netvf_main.c
165
max_tx_rings = readl(ctrl_bar + NFP_NET_CFG_MAX_TXRINGS);
drivers/net/ethernet/netronome/nfp/nfp_netvf_main.c
166
max_rx_rings = readl(ctrl_bar + NFP_NET_CFG_MAX_RXRINGS);
drivers/net/ethernet/netronome/nfp/nfp_netvf_main.c
185
startq = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
drivers/net/ethernet/netronome/nfp/nfp_netvf_main.c
187
startq = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
1183
readl(nfp->iomem.csr +
drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
1186
readl(nfp->iomem.csr +
drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
1189
readl(nfp->iomem.csr +
drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
1223
*(dst++) = readl(priv->data + i);
drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
277
readl(nfp->iomem.csr + xbar);
drivers/net/ethernet/netronome/nfp/nic/dcb.c
200
value = readl(dcb->dcbcfg_tbl + dcb->cfg_offset +
drivers/net/ethernet/ni/nixge.c
223
return readl(priv->dma_regs + offset);
drivers/net/ethernet/ni/nixge.c
233
return readl(priv->ctrl_regs + offset);
drivers/net/ethernet/nvidia/forcedeth.c
1060
powerstate = readl(base + NvRegPowerState2);
drivers/net/ethernet/nvidia/forcedeth.c
1136
reg = readl(base + NvRegMIIControl);
drivers/net/ethernet/nvidia/forcedeth.c
1155
} else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) {
drivers/net/ethernet/nvidia/forcedeth.c
1158
retval = readl(base + NvRegMIIData);
drivers/net/ethernet/nvidia/forcedeth.c
1216
u32 powerstate = readl(base + NvRegPowerState2);
drivers/net/ethernet/nvidia/forcedeth.c
1425
phyinterface = readl(base + NvRegPhyInterface);
drivers/net/ethernet/nvidia/forcedeth.c
1521
u32 rx_ctrl = readl(base + NvRegReceiverControl);
drivers/net/ethernet/nvidia/forcedeth.c
1524
if ((readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) && !np->mac_in_use) {
drivers/net/ethernet/nvidia/forcedeth.c
1542
u32 rx_ctrl = readl(base + NvRegReceiverControl);
drivers/net/ethernet/nvidia/forcedeth.c
1563
u32 tx_ctrl = readl(base + NvRegTransmitterControl);
drivers/net/ethernet/nvidia/forcedeth.c
1576
u32 tx_ctrl = readl(base + NvRegTransmitterControl);
drivers/net/ethernet/nvidia/forcedeth.c
1590
writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV,
drivers/net/ethernet/nvidia/forcedeth.c
1628
temp1 = readl(base + NvRegMacAddrA);
drivers/net/ethernet/nvidia/forcedeth.c
1629
temp2 = readl(base + NvRegMacAddrB);
drivers/net/ethernet/nvidia/forcedeth.c
1630
temp3 = readl(base + NvRegTransmitPoll);
drivers/net/ethernet/nvidia/forcedeth.c
1657
np->estats.tx_bytes += readl(base + NvRegTxCnt);
drivers/net/ethernet/nvidia/forcedeth.c
1658
np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt);
drivers/net/ethernet/nvidia/forcedeth.c
1659
np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt);
drivers/net/ethernet/nvidia/forcedeth.c
1660
np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt);
drivers/net/ethernet/nvidia/forcedeth.c
1661
np->estats.tx_late_collision += readl(base + NvRegTxLateCol);
drivers/net/ethernet/nvidia/forcedeth.c
1662
np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow);
drivers/net/ethernet/nvidia/forcedeth.c
1663
np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier);
drivers/net/ethernet/nvidia/forcedeth.c
1664
np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef);
drivers/net/ethernet/nvidia/forcedeth.c
1665
np->estats.tx_retry_error += readl(base + NvRegTxRetryErr);
drivers/net/ethernet/nvidia/forcedeth.c
1666
np->estats.rx_frame_error += readl(base + NvRegRxFrameErr);
drivers/net/ethernet/nvidia/forcedeth.c
1667
np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte);
drivers/net/ethernet/nvidia/forcedeth.c
1668
np->estats.rx_late_collision += readl(base + NvRegRxLateCol);
drivers/net/ethernet/nvidia/forcedeth.c
1669
np->estats.rx_runt += readl(base + NvRegRxRunt);
drivers/net/ethernet/nvidia/forcedeth.c
1670
np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong);
drivers/net/ethernet/nvidia/forcedeth.c
1671
np->estats.rx_over_errors += readl(base + NvRegRxOverflow);
drivers/net/ethernet/nvidia/forcedeth.c
1672
np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr);
drivers/net/ethernet/nvidia/forcedeth.c
1673
np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr);
drivers/net/ethernet/nvidia/forcedeth.c
1674
np->estats.rx_length_error += readl(base + NvRegRxLenErr);
drivers/net/ethernet/nvidia/forcedeth.c
1675
np->estats.rx_unicast += readl(base + NvRegRxUnicast);
drivers/net/ethernet/nvidia/forcedeth.c
1676
np->estats.rx_multicast += readl(base + NvRegRxMulticast);
drivers/net/ethernet/nvidia/forcedeth.c
1677
np->estats.rx_broadcast += readl(base + NvRegRxBroadcast);
drivers/net/ethernet/nvidia/forcedeth.c
1698
np->estats.tx_deferral += readl(base + NvRegTxDef);
drivers/net/ethernet/nvidia/forcedeth.c
1699
np->estats.tx_packets += readl(base + NvRegTxFrame);
drivers/net/ethernet/nvidia/forcedeth.c
1700
np->estats.rx_bytes += readl(base + NvRegRxCnt);
drivers/net/ethernet/nvidia/forcedeth.c
1701
np->estats.tx_pause += readl(base + NvRegTxPause);
drivers/net/ethernet/nvidia/forcedeth.c
1702
np->estats.rx_pause += readl(base + NvRegRxPause);
drivers/net/ethernet/nvidia/forcedeth.c
1703
np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame);
drivers/net/ethernet/nvidia/forcedeth.c
1708
np->estats.tx_unicast += readl(base + NvRegTxUnicast);
drivers/net/ethernet/nvidia/forcedeth.c
1709
np->estats.tx_multicast += readl(base + NvRegTxMulticast);
drivers/net/ethernet/nvidia/forcedeth.c
1710
np->estats.tx_broadcast += readl(base + NvRegTxBroadcast);
drivers/net/ethernet/nvidia/forcedeth.c
2086
reg = readl(base + NvRegSlotTime) & ~NVREG_SLOTTIME_MASK;
drivers/net/ethernet/nvidia/forcedeth.c
2093
tx_status = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START;
drivers/net/ethernet/nvidia/forcedeth.c
2732
status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
drivers/net/ethernet/nvidia/forcedeth.c
2734
status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
drivers/net/ethernet/nvidia/forcedeth.c
2748
readl(base + i + 0), readl(base + i + 4),
drivers/net/ethernet/nvidia/forcedeth.c
2749
readl(base + i + 8), readl(base + i + 12),
drivers/net/ethernet/nvidia/forcedeth.c
2750
readl(base + i + 16), readl(base + i + 20),
drivers/net/ethernet/nvidia/forcedeth.c
2751
readl(base + i + 24), readl(base + i + 28));
drivers/net/ethernet/nvidia/forcedeth.c
3198
u32 pff = readl(base + NvRegPacketFilterFlags) & NVREG_PFF_PAUSE_RX;
drivers/net/ethernet/nvidia/forcedeth.c
3260
u32 pff = readl(base + NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX;
drivers/net/ethernet/nvidia/forcedeth.c
3269
u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX;
drivers/net/ethernet/nvidia/forcedeth.c
3277
writel(readl(base + NvRegTxPauseFrameLimit)|NVREG_TX_PAUSEFRAMELIMIT_ENABLE, base + NvRegTxPauseFrameLimit);
drivers/net/ethernet/nvidia/forcedeth.c
3303
phyreg = readl(base + NvRegSlotTime);
drivers/net/ethernet/nvidia/forcedeth.c
3314
phyreg = readl(base + NvRegPhyInterface);
drivers/net/ethernet/nvidia/forcedeth.c
3476
if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START) {
drivers/net/ethernet/nvidia/forcedeth.c
3480
if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
drivers/net/ethernet/nvidia/forcedeth.c
3486
phyreg = readl(base + NvRegSlotTime);
drivers/net/ethernet/nvidia/forcedeth.c
3496
phyreg = readl(base + NvRegPhyInterface);
drivers/net/ethernet/nvidia/forcedeth.c
3611
miistat = readl(base + NvRegMIIStatus);
drivers/net/ethernet/nvidia/forcedeth.c
3667
np->events = readl(base + NvRegIrqStatus);
drivers/net/ethernet/nvidia/forcedeth.c
3670
np->events = readl(base + NvRegMSIXIrqStatus);
drivers/net/ethernet/nvidia/forcedeth.c
3700
np->events = readl(base + NvRegIrqStatus);
drivers/net/ethernet/nvidia/forcedeth.c
3703
np->events = readl(base + NvRegMSIXIrqStatus);
drivers/net/ethernet/nvidia/forcedeth.c
3732
events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL;
drivers/net/ethernet/nvidia/forcedeth.c
3844
events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
drivers/net/ethernet/nvidia/forcedeth.c
3889
events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER;
drivers/net/ethernet/nvidia/forcedeth.c
3954
events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
drivers/net/ethernet/nvidia/forcedeth.c
3957
events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
drivers/net/ethernet/nvidia/forcedeth.c
3987
writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
drivers/net/ethernet/nvidia/forcedeth.c
3994
writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
drivers/net/ethernet/nvidia/forcedeth.c
4589
rbuf[i] = readl(base + i*sizeof(u32));
drivers/net/ethernet/nvidia/forcedeth.c
5039
orig_read = readl(base + nv_registers_test[i].reg);
drivers/net/ethernet/nvidia/forcedeth.c
5046
new_read = readl(base + nv_registers_test[i].reg);
drivers/net/ethernet/nvidia/forcedeth.c
5071
save_poll_interval = readl(base+NvRegPollingInterval);
drivers/net/ethernet/nvidia/forcedeth.c
5139
filter_flags = readl(base + NvRegPacketFilterFlags);
drivers/net/ethernet/nvidia/forcedeth.c
5140
misc1_flags = readl(base + NvRegMisc1);
drivers/net/ethernet/nvidia/forcedeth.c
5371
mgmt_sema = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_SEMA_MASK;
drivers/net/ethernet/nvidia/forcedeth.c
5381
tx_ctrl = readl(base + NvRegTransmitterControl);
drivers/net/ethernet/nvidia/forcedeth.c
5386
tx_ctrl = readl(base + NvRegTransmitterControl);
drivers/net/ethernet/nvidia/forcedeth.c
5406
tx_ctrl = readl(base + NvRegTransmitterControl);
drivers/net/ethernet/nvidia/forcedeth.c
5418
u32 data_ready = readl(base + NvRegTransmitterControl);
drivers/net/ethernet/nvidia/forcedeth.c
5427
data_ready2 = readl(base + NvRegTransmitterControl);
drivers/net/ethernet/nvidia/forcedeth.c
5438
np->mgmt_version = readl(base + NvRegMgmtUnitVersion) & NVREG_MGMTUNITVERSION;
drivers/net/ethernet/nvidia/forcedeth.c
5478
writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
drivers/net/ethernet/nvidia/forcedeth.c
5509
writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus);
drivers/net/ethernet/nvidia/forcedeth.c
5513
writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
drivers/net/ethernet/nvidia/forcedeth.c
5545
i = readl(base + NvRegPowerState);
drivers/net/ethernet/nvidia/forcedeth.c
5551
writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState);
drivers/net/ethernet/nvidia/forcedeth.c
5575
readl(base + NvRegMIIStatus);
drivers/net/ethernet/nvidia/forcedeth.c
5875
np->orig_mac[0] = readl(base + NvRegMacAddrA);
drivers/net/ethernet/nvidia/forcedeth.c
5876
np->orig_mac[1] = readl(base + NvRegMacAddrB);
drivers/net/ethernet/nvidia/forcedeth.c
5879
txreg = readl(base + NvRegTransmitPoll);
drivers/net/ethernet/nvidia/forcedeth.c
5944
powerstate = readl(base + NvRegPowerState2);
drivers/net/ethernet/nvidia/forcedeth.c
6006
phystate = readl(base + NvRegAdapterControl);
drivers/net/ethernet/nvidia/forcedeth.c
6016
if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST) &&
drivers/net/ethernet/nvidia/forcedeth.c
6017
(readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) &&
drivers/net/ethernet/nvidia/forcedeth.c
6022
np->mac_in_use = readl(base + NvRegMgmtUnitControl) & NVREG_MGMTUNITCONTROL_INUSE;
drivers/net/ethernet/nvidia/forcedeth.c
6025
((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) ==
drivers/net/ethernet/nvidia/forcedeth.c
6181
writel(readl(base + NvRegTransmitPoll) & ~NVREG_TRANSMITPOLL_MAC_ADDR_REV,
drivers/net/ethernet/nvidia/forcedeth.c
6225
np->saved_config_space[i] = readl(base + i*sizeof(u32));
drivers/net/ethernet/nvidia/forcedeth.c
947
readl(base);
drivers/net/ethernet/nvidia/forcedeth.c
979
} while ((readl(base + offset) & mask) != target);
drivers/net/ethernet/nxp/lpc_eth.c
1055
txidx = readl(LPC_ENET_TXPRODUCEINDEX(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
442
tmp = readl(LPC_ENET_SA2(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
445
tmp = readl(LPC_ENET_SA1(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
448
tmp = readl(LPC_ENET_SA0(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
458
tmp = readl(LPC_ENET_MAC2(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
461
tmp = readl(LPC_ENET_COMMAND(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
466
tmp = readl(LPC_ENET_MAC2(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
469
tmp = readl(LPC_ENET_COMMAND(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
603
tmp = readl(LPC_ENET_COMMAND(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
606
tmp = readl(LPC_ENET_MAC1(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
643
readl(LPC_ENET_TXCONSUMEINDEX(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
651
tmp = readl(LPC_ENET_COMMAND(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
654
tmp = readl(LPC_ENET_MAC1(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
680
while (readl(LPC_ENET_MIND(pldat->net_base)) & LPC_MIND_BUSY) {
drivers/net/ethernet/nxp/lpc_eth.c
686
lps = readl(LPC_ENET_MRDD(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
702
while (readl(LPC_ENET_MIND(pldat->net_base)) & LPC_MIND_BUSY) {
drivers/net/ethernet/nxp/lpc_eth.c
844
txcidx = readl(LPC_ENET_TXCONSUMEINDEX(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
886
txcidx = readl(LPC_ENET_TXCONSUMEINDEX(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
904
rxconsidx = readl(LPC_ENET_RXCONSUMEINDEX(pldat->net_base));
drivers/net/ethernet/nxp/lpc_eth.c
906
readl(LPC_ENET_RXPRODUCEINDEX(pldat->net_base))) {
drivers/net/ethernet/nxp/lpc_eth.c
994
tmp = readl(LPC_ENET_INTSTATUS(pldat->net_base));
drivers/net/ethernet/packetengines/hamachi.c
1320
u32 intr_status = readl(ioaddr + InterruptClear);
drivers/net/ethernet/packetengines/hamachi.c
1388
dev->name, readl(ioaddr + IntrStatus));
drivers/net/ethernet/packetengines/hamachi.c
1637
readl(ioaddr + IntrStatus));
drivers/net/ethernet/packetengines/hamachi.c
1646
readl(ioaddr + 0x370);
drivers/net/ethernet/packetengines/hamachi.c
1647
readl(ioaddr + 0x3F0);
drivers/net/ethernet/packetengines/hamachi.c
1672
readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
drivers/net/ethernet/packetengines/hamachi.c
1690
readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
drivers/net/ethernet/packetengines/hamachi.c
1696
readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
drivers/net/ethernet/packetengines/hamachi.c
1762
dev->stats.rx_bytes = readl(ioaddr + 0x330);
drivers/net/ethernet/packetengines/hamachi.c
1764
dev->stats.tx_bytes = readl(ioaddr + 0x3B0);
drivers/net/ethernet/packetengines/hamachi.c
1766
dev->stats.multicast = readl(ioaddr + 0x320);
drivers/net/ethernet/packetengines/hamachi.c
1769
dev->stats.rx_length_errors = readl(ioaddr + 0x368);
drivers/net/ethernet/packetengines/hamachi.c
1771
dev->stats.rx_over_errors = readl(ioaddr + 0x35C);
drivers/net/ethernet/packetengines/hamachi.c
1773
dev->stats.rx_crc_errors = readl(ioaddr + 0x360);
drivers/net/ethernet/packetengines/hamachi.c
1775
dev->stats.rx_frame_errors = readl(ioaddr + 0x364);
drivers/net/ethernet/packetengines/hamachi.c
1777
dev->stats.rx_missed_errors = readl(ioaddr + 0x36C);
drivers/net/ethernet/packetengines/hamachi.c
1897
(u32)readl(np->base + TxIntrCtrl),
drivers/net/ethernet/packetengines/hamachi.c
1898
(u32)readl(np->base + RxIntrCtrl));
drivers/net/ethernet/packetengines/hamachi.c
745
dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
drivers/net/ethernet/qlogic/netxen/netxen_nic.h
1205
readl((void __iomem *) (bar0 + NX_FW_DUMP_REG1)); \
drivers/net/ethernet/qlogic/netxen/netxen_nic.h
1206
*data = readl((void __iomem *) (bar0 + NX_FW_DUMP_REG2 + \
drivers/net/ethernet/qlogic/netxen/netxen_nic.h
1213
readl((void __iomem *) (bar0 + NX_FW_DUMP_REG1)); \
drivers/net/ethernet/qlogic/netxen/netxen_nic.h
1215
readl((void __iomem *) (bar0 + NX_FW_DUMP_REG2 + LSW(addr))); \
drivers/net/ethernet/qlogic/netxen/netxen_nic.h
1279
#define NX_PCI_READ_32(ADDR) readl((ADDR))
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1061
if (window == readl(offset))
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1130
if (readl(addr) != window) {
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1207
data = readl(addr);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1261
return readl(addr);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1268
data = readl(addr);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1295
val = readl(addr);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1310
return readl(addr);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1358
readl(adapter->ahw.ocm_win_crb);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1494
temp = readl((mem_crb + TEST_AGT_CTRL));
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1569
temp = readl(mem_crb + TEST_AGT_CTRL);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1581
temp = readl(mem_crb + data_hi);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1583
val |= readl(mem_crb + data_lo);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1643
temp = readl(mem_crb + TEST_AGT_CTRL);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1706
temp = readl(mem_crb + TEST_AGT_CTRL);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1717
val = (u64)(readl(mem_crb + MIU_TEST_AGT_RDDATA_HI)) << 32;
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
1718
val |= readl(mem_crb + MIU_TEST_AGT_RDDATA_LO);
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
2122
lck_val = readl((void __iomem *)(adapter->ahw.pci_base0 +
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
2139
readl((void __iomem *)(adapter->ahw.pci_base0 + NX_FLASH_SEM2_ULK));
drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c
2248
value = readl(addr);
drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
2279
status = readl(adapter->isr_int_vec);
drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
2286
status = readl(adapter->crb_int_state_reg);
drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
2293
our_int = readl(adapter->crb_int_state_reg);
drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
2308
readl(adapter->isr_int_vec);
drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
2309
readl(adapter->isr_int_vec);
drivers/net/ethernet/qlogic/qed/qed.h
958
#define REG_RD(cdev, offset) readl(REG_ADDR(cdev, offset))
drivers/net/ethernet/qlogic/qla3xxx.c
114
value = readl(&port_regs->CommonRegs.semaphoreReg);
drivers/net/ethernet/qlogic/qla3xxx.c
127
readl(&port_regs->CommonRegs.semaphoreReg);
drivers/net/ethernet/qlogic/qla3xxx.c
137
value = readl(&port_regs->CommonRegs.semaphoreReg);
drivers/net/ethernet/qlogic/qla3xxx.c
171
readl(&port_regs->CommonRegs.ispControlStatus);
drivers/net/ethernet/qlogic/qla3xxx.c
181
value = readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
189
return readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
201
value = readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
211
return readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
221
readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
229
readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
236
readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
246
readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
258
readl(reg);
drivers/net/ethernet/qlogic/qla3xxx.c
270
readl(reg);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
1022
event = readl(QLCNIC_MBX_FW(ahw, 0));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
2360
event = readl(QLCNIC_MBX_FW(adapter->ahw, 0));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
291
val = readl(base);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
3229
state = readl(ahw->pci_base0 + QLC_83XX_LINK_STATE(pci_func));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
4040
fw_data = readl(QLCNIC_MBX_FW(adapter->ahw, 2));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
4061
fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
4091
readl(ahw->pci_base0 + offset),
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
458
cmd->rsp.arg[i] = readl(QLCNIC_MBX_FW(adapter->ahw, i));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
467
intr_val = readl(adapter->tgt_status_reg);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
481
intr_val = readl(adapter->isr_int_vec);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
483
intr_val = readl(adapter->tgt_status_reg);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
510
event = readl(QLCNIC_MBX_FW(adapter->ahw, 0));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
643
val = readl(addr);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
662
readl(addr);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
970
event[i] = readl(QLCNIC_MBX_FW(ahw, i));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c
566
regs_buff[i++] = readl(tx_ring->crb_cmd_producer);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c
569
regs_buff[i++] = readl(tx_ring->crb_intr_mask);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c
577
regs_buff[i++] = readl(rds_rings->crb_rcv_producer);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c
584
regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c
586
regs_buff[i++] = readl(sds_ring->crb_intr_mask);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
1162
if (readl(addr) != window) {
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
1215
return readl(addr);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
1222
data = readl(addr);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
1254
readl(adapter->ahw->ocm_win_crb);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
1266
readl(adapter->ahw->ocm_win_crb);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
1597
msix_base = readl(msix_base_addr);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
290
readl(val);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
292
*data = readl(val);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
303
readl(val);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
306
readl(val);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c
38
return readl(addr) | (((u64) readl(addr + 4)) << 32LL);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h
39
readl(((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h
47
readl(((ahw)->pci_base0) + ((ahw)->ext_reg_tbl[addr]))
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
2963
ring, readl(rds_ring->crb_rcv_producer),
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
2973
ring, readl(sds_ring->crb_sts_consumer),
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
2974
sds_ring->consumer, readl(sds_ring->crb_intr_mask),
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
2993
readl(tx_ring->crb_intr_mask));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
2997
readl(tx_ring->crb_cmd_producer),
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
3055
status = readl(adapter->isr_int_vec);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
3061
status = readl(adapter->crb_int_state_reg);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
3067
readl(adapter->isr_int_vec);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
3068
readl(adapter->isr_int_vec);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c
551
data = readl(addr);
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c
1273
ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c
916
*(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c
918
*(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
490
op_mode = readl(ahw->pci_base0 + QLCNIC_DRV_OP_MODE);
drivers/net/ethernet/qualcomm/emac/emac-ethtool.c
227
val[i] = readl(adpt->base + emac_regs[i]);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
263
mta = readl(adpt->base + EMAC_HASH_TAB_REG0 + (reg << 2));
drivers/net/ethernet/qualcomm/emac/emac-mac.c
286
mac = readl(adpt->base + EMAC_MAC_CTRL);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
370
val = readl(adpt->base + EMAC_RXQ_CTRL_1);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
378
val = readl(adpt->base + EMAC_RXQ_CTRL_2);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
384
val = readl(adpt->base + EMAC_RXQ_CTRL_3);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
462
val = readl(adpt->base + EMAC_AXI_MAST_CTRL);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
493
mac = readl(adpt->base + EMAC_MAC_CTRL);
drivers/net/ethernet/qualcomm/emac/emac-mac.c
494
csr1 = readl(adpt->csr + EMAC_EMAC_WRAPPER_CSR1);
drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c
224
if (readl(phy->base + EMAC_QSERDES_COM_RESET_SM) & READY)
drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c
195
lnstatus = readl(phy_regs + SGMII_PHY_LN_LANE_STATUS);
drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c
182
lnstatus = readl(phy_regs + SGMII_PHY_LN_LANE_STATUS);
drivers/net/ethernet/qualcomm/emac/emac-sgmii.c
147
status = readl(phy->base + EMAC_SGMII_PHY_INTERRUPT_STATUS);
drivers/net/ethernet/qualcomm/emac/emac-sgmii.c
187
val = readl(phy->base + EMAC_EMAC_WRAPPER_CSR2);
drivers/net/ethernet/qualcomm/emac/emac-sgmii.c
192
val = readl(phy->base + EMAC_EMAC_WRAPPER_CSR2);
drivers/net/ethernet/qualcomm/emac/emac-sgmii.c
99
val = readl(phy->base + EMAC_SGMII_PHY_AUTONEG_CFG2);
drivers/net/ethernet/qualcomm/emac/emac.c
74
u32 data = readl(addr);
drivers/net/ethernet/realtek/8139cp.c
357
#define cpr32(reg) readl(cp->regs + (reg))
drivers/net/ethernet/realtek/8139cp.c
371
readl(cp->regs + (reg)); \
drivers/net/ethernet/realtek/r8169_main.c
90
#define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg))
drivers/net/ethernet/realtek/rtase/rtase_main.c
131
return readl(tp->mmio_addr + reg);
drivers/net/ethernet/rocker/rocker_main.c
115
readl((rocker)->hw_addr + (ROCKER_ ## reg))
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
106
high_word = readl(ioaddr + SXGBE_CORE_ADD_HIGHOFFSET(reg_n));
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
107
low_word = readl(ioaddr + SXGBE_CORE_ADD_LOWOFFSET(reg_n));
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
122
tx_config = readl(ioaddr + SXGBE_CORE_TX_CONFIG_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
134
rx_config = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
144
return readl(ioaddr + SXGBE_CORE_VERSION_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
151
return readl(ioaddr + (SXGBE_CORE_HW_FEA_REG(feature_index)));
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
156
u32 tx_cfg = readl(ioaddr + SXGBE_CORE_TX_CONFIG_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
170
reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
180
reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
195
ctrl = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
204
ctrl = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
213
ctrl = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
243
ctrl = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
252
ctrl = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
26
regval = readl(ioaddr + SXGBE_CORE_TX_CONFIG_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
34
regval = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
54
lpi_status = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS);
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c
74
irq_status = readl(ioaddr + SXGBE_CORE_INT_STATUS_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
100
tx_config = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
124
tx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cnum));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
135
tx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(dma_cnum));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
144
tx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(dma_cnum));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
155
tx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cnum));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
167
rx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cnum));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
180
rx_ctl_reg = readl(ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cnum));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
189
u32 int_status = readl(ioaddr + SXGBE_DMA_CHA_STATUS_REG(channel_no));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
25
reg_val = readl(ioaddr + SXGBE_DMA_SYSBUS_MODE_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
261
u32 int_status = readl(ioaddr + SXGBE_DMA_CHA_STATUS_REG(channel_no));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
339
ctrl = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(chan_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
50
reg_val = readl(ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
56
reg_val = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c
60
reg_val = readl(ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cha_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
402
reg_val |= readl(priv->ioaddr + SXGBE_CORE_RSS_CTL_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
404
readl(priv->ioaddr + SXGBE_CORE_RSS_CTL_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
423
reg_space[reg_ix] = readl(ioaddr + reg_offset);
drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
430
reg_space[reg_ix] = readl(ioaddr + reg_offset);
drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c
437
reg_space[reg_ix] = readl(ioaddr + reg_offset);
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
1698
u64 val = readl(ioaddr + reg_lo);
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
1700
val |= ((u64)readl(ioaddr + reg_hi)) << 32;
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
1908
readl(ioaddr + SXGBE_FRAME_FILTER),
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
1909
readl(ioaddr + SXGBE_HASH_HIGH),
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
1910
readl(ioaddr + SXGBE_HASH_LOW));
drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c
2041
if (!(readl(addr + SXGBE_DMA_MODE_REG) &
drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c
132
return readl(priv->ioaddr + priv->hw->mii.data) & 0xffff;
drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c
155
return readl(priv->ioaddr + priv->hw->mii.data) & 0xffff;
drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c
34
if (!(readl(ioaddr + mii_data) & SXGBE_MII_BUSY))
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
108
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
119
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
129
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
140
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
150
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
160
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
170
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
182
reg_val = readl(ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
213
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
25
reg_val = readl(ioaddr + SXGBE_MTL_OP_MODE_REG);
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
68
reg_val = readl(ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
80
reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
89
reg_val = readl(ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c
98
reg_val = readl(ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num));
drivers/net/ethernet/sgi/ioc3-eth.c
1246
readl(®s->emcr);
drivers/net/ethernet/sgi/ioc3-eth.c
1250
readl(®s->emcr);
drivers/net/ethernet/sgi/ioc3-eth.c
263
while (readl(®s->micr) & MICR_BUSY)
drivers/net/ethernet/sgi/ioc3-eth.c
267
while (readl(®s->micr) & MICR_BUSY)
drivers/net/ethernet/sgi/ioc3-eth.c
270
return readl(®s->midr_r) & MIDR_DATA_MASK;
drivers/net/ethernet/sgi/ioc3-eth.c
278
while (readl(®s->micr) & MICR_BUSY)
drivers/net/ethernet/sgi/ioc3-eth.c
282
while (readl(®s->micr) & MICR_BUSY)
drivers/net/ethernet/sgi/ioc3-eth.c
293
dev->stats.collisions += readl(®s->etcdc) & ETCDC_COLLCNT_MASK;
drivers/net/ethernet/sgi/ioc3-eth.c
455
etcir = readl(®s->etcir);
drivers/net/ethernet/sgi/ioc3-eth.c
471
etcir = readl(®s->etcir); /* More pkts sent? */
drivers/net/ethernet/sgi/ioc3-eth.c
538
eisr = readl(®s->eisr);
drivers/net/ethernet/sgi/ioc3-eth.c
540
readl(®s->eisr); /* Flush */
drivers/net/ethernet/sgi/ioc3-eth.c
700
writel(readl(®s->emcr) | (EMCR_BUFSIZ | EMCR_RAMPAR), ®s->emcr);
drivers/net/ethernet/sgi/ioc3-eth.c
701
readl(®s->emcr); /* Flush */
drivers/net/ethernet/sgi/ioc3-eth.c
706
if ((readl(ssram0) & IOC3_SSRAM_DM) != pattern ||
drivers/net/ethernet/sgi/ioc3-eth.c
707
(readl(ssram1) & IOC3_SSRAM_DM) != (~pattern & IOC3_SSRAM_DM)) {
drivers/net/ethernet/sgi/ioc3-eth.c
710
writel(readl(®s->emcr) & ~EMCR_BUFSIZ, ®s->emcr);
drivers/net/ethernet/sgi/ioc3-eth.c
724
readl(®s->emcr); /* Flush WB */
drivers/net/ethernet/sgi/ioc3-eth.c
727
readl(®s->emcr);
drivers/net/ethernet/sgi/ioc3-eth.c
731
readl(®s->etcdc); /* Clear on read */
drivers/net/ethernet/sgi/ioc3-eth.c
761
readl(®s->etcir); /* Flush */
drivers/net/ethernet/sgi/ioc3-eth.c
769
readl(®s->eier);
drivers/net/ethernet/sgi/ioc3-eth.c
778
readl(®s->eier); /* Flush */
drivers/net/ethernet/sis/sis190.c
79
#define SIS_R32(reg) readl (ioaddr + (reg))
drivers/net/ethernet/smsc/smc91x.h
104
v |= readl(ioaddr + (reg & ~2)) & 0xffff;
drivers/net/ethernet/smsc/smc91x.h
126
#define SMC_inl(a, r) readl((a) + (r))
drivers/net/ethernet/smsc/smc91x.h
76
#define SMC_inl(a, r) readl((a) + (r))
drivers/net/ethernet/smsc/smsc911x.c
150
return readl(pdata->ioaddr + reg);
drivers/net/ethernet/smsc/smsc911x.c
164
return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
drivers/net/ethernet/socionext/netsec.c
1367
netsec_write(priv, reg, readl(ucode + i * 4));
drivers/net/ethernet/socionext/netsec.c
1378
addr_h = readl(priv->eeprom_base + NETSEC_EEPROM_HM_ME_ADDRESS_H);
drivers/net/ethernet/socionext/netsec.c
1379
addr_l = readl(priv->eeprom_base + NETSEC_EEPROM_HM_ME_ADDRESS_L);
drivers/net/ethernet/socionext/netsec.c
1380
size = readl(priv->eeprom_base + NETSEC_EEPROM_HM_ME_SIZE);
drivers/net/ethernet/socionext/netsec.c
1386
addr_h = readl(priv->eeprom_base + NETSEC_EEPROM_MH_ME_ADDRESS_H);
drivers/net/ethernet/socionext/netsec.c
1387
addr_l = readl(priv->eeprom_base + NETSEC_EEPROM_MH_ME_ADDRESS_L);
drivers/net/ethernet/socionext/netsec.c
1388
size = readl(priv->eeprom_base + NETSEC_EEPROM_MH_ME_SIZE);
drivers/net/ethernet/socionext/netsec.c
1395
addr_l = readl(priv->eeprom_base + NETSEC_EEPROM_PKT_ME_ADDRESS);
drivers/net/ethernet/socionext/netsec.c
1396
size = readl(priv->eeprom_base + NETSEC_EEPROM_PKT_ME_SIZE);
drivers/net/ethernet/socionext/netsec.c
338
return readl(priv->ioaddr + reg_addr);
drivers/net/ethernet/socionext/sni_ave.c
1002
val = readl(priv->base + AVE_PFEN);
drivers/net/ethernet/socionext/sni_ave.c
1095
val = readl(priv->base + AVE_TXCR);
drivers/net/ethernet/socionext/sni_ave.c
1107
val = readl(priv->base + AVE_LINKSEL);
drivers/net/ethernet/socionext/sni_ave.c
1116
rxcr = readl(priv->base + AVE_RXCR);
drivers/net/ethernet/socionext/sni_ave.c
1117
txcr = readl(priv->base + AVE_TXCR);
drivers/net/ethernet/socionext/sni_ave.c
1327
val = readl(priv->base + AVE_IIRQC) & AVE_IIRQC_BSCK;
drivers/net/ethernet/socionext/sni_ave.c
1471
val = readl(priv->base + AVE_RXCR);
drivers/net/ethernet/socionext/sni_ave.c
1701
ave_id = readl(priv->base + AVE_IDR);
drivers/net/ethernet/socionext/sni_ave.c
306
return readl(priv->base + addr);
drivers/net/ethernet/socionext/sni_ave.c
351
ret = readl(priv->base + AVE_GIMR);
drivers/net/ethernet/socionext/sni_ave.c
368
writel(readl(priv->base + AVE_GIMR) | bitflag, priv->base + AVE_GIMR);
drivers/net/ethernet/socionext/sni_ave.c
388
vr = readl(priv->base + AVE_VR);
drivers/net/ethernet/socionext/sni_ave.c
505
mdioctl = readl(priv->base + AVE_MDIOCTR);
drivers/net/ethernet/socionext/sni_ave.c
517
return readl(priv->base + AVE_MDIORDR) & GENMASK(15, 0);
drivers/net/ethernet/socionext/sni_ave.c
537
mdioctl = readl(priv->base + AVE_MDIOCTR);
drivers/net/ethernet/socionext/sni_ave.c
651
val = readl(priv->base + AVE_DESCC);
drivers/net/ethernet/socionext/sni_ave.c
664
val = readl(priv->base + AVE_DESCC);
drivers/net/ethernet/socionext/sni_ave.c
865
val = readl(priv->base + AVE_RSTCTRL);
drivers/net/ethernet/socionext/sni_ave.c
882
val = readl(priv->base + AVE_RSTCTRL);
drivers/net/ethernet/socionext/sni_ave.c
895
rxcr_org = readl(priv->base + AVE_RXCR);
drivers/net/ethernet/socionext/sni_ave.c
931
gisr_val = readl(priv->base + AVE_GISR);
drivers/net/ethernet/socionext/sni_ave.c
988
val = readl(priv->base + AVE_PFEN);
drivers/net/ethernet/spacemit/k1_emac.c
145
return readl(priv->iobase + reg);
drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c
29
return readl(gmac->ctl_block + reg);
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
144
value = readl(eqos->regs + SDMEMCOMPPADCTRL);
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
150
value = readl(eqos->regs + AUTO_CAL_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
173
value = readl(eqos->regs + SDMEMCOMPPADCTRL);
drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
179
value = readl(eqos->regs + AUTO_CAL_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
206
old_ctrl = readl(dwmac->base_addr + MAC_CTRL_REG);
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
214
readl(dwmac->base_addr + MAC_CTRL_REG);
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
233
value = readl(ioaddr + DMA_BUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
321
gpio_value = readl(priv->ioaddr + GMAC_GPIO_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
354
return (readl(priv->ioaddr + GMAC_INT_STATUS) & GMAC_INT_TSIE);
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
386
acr_value = readl(ptpaddr + PTP_ACR);
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
409
acr_value = readl(ptpaddr + PTP_ACR);
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
419
gpio_value = readl(ioaddr + GMAC_GPIO_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
439
num_snapshot = (readl(ioaddr + GMAC_TIMESTAMP_STATUS) &
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
157
if (readl(ptr->ioaddr + MAC_CTRL_REG) &
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
189
value = readl(ioaddr + DMA_CHAN_BUS_MODE(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
232
intr_status = readl(ioaddr + DMA_CHAN_STATUS(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
276
u32 value = readl(ioaddr + DMA_INTR_ENA);
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
486
value = readl(ioaddr + DMA_BUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
547
ld->loongson_id = readl(res.addr + GMAC_VERSION) & 0xff;
drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c
31
val = readl(dwmac->reg);
drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
110
data = readl(dwmac->regs + reg);
drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c
153
u32 reg = readl(priv->base + EPHY_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c
162
u32 reg = readl(priv->base + SYS_RESET);
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
120
return readl(ethqos->rgmii_base + offset);
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
318
acr_value = readl(ptpaddr + PTP_ACR);
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
340
acr_value = readl(ptpaddr + PTP_ACR);
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
349
gpio_value = readl(ioaddr + XGMAC_GPIO_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
371
readl(ioaddr + XGMAC_TIMESTAMP_STATUS));
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
89
val = readl(splitter_base + EMAC_SPLITTER_CTRL_REG);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
1021
u32 value = readl(ioaddr + EMAC_BASIC_CTL0);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
327
reg_space[i / 4] = readl(ioaddr + i);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
344
reg_space[i / 4] = readl(ioaddr + i);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
352
u32 value = readl(ioaddr + EMAC_INT_EN);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
366
u32 value = readl(ioaddr + EMAC_INT_EN);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
381
v = readl(ioaddr + EMAC_TX_CTL1);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
391
v = readl(ioaddr + EMAC_TX_CTL1);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
402
v = readl(ioaddr + EMAC_TX_CTL1);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
412
v = readl(ioaddr + EMAC_RX_CTL1);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
423
v = readl(ioaddr + EMAC_RX_CTL1);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
437
v = readl(ioaddr + EMAC_INT_STA);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
506
v = readl(ioaddr + EMAC_RX_CTL1);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
530
v = readl(ioaddr + EMAC_TX_CTL1);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
617
t = readl(ioaddr + EMAC_TX_CTL0);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
618
r = readl(ioaddr + EMAC_RX_CTL0);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
649
v = readl(ioaddr + EMAC_MACADDR_HI(reg_n));
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
671
v = readl(ioaddr + EMAC_RX_CTL0);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
707
if (!(readl(ioaddr + EMAC_RX_FRM_FLT) & EMAC_FRM_FLT_RXALL))
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
726
v = readl(ioaddr + EMAC_RX_CTL0);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
733
v = readl(ioaddr + EMAC_TX_FLOW_CTL);
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
746
v = readl(priv->ioaddr + EMAC_BASIC_CTL1);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
120
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
124
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
128
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
133
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
138
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
151
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
155
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
160
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
165
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
170
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
193
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
197
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
201
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
205
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
209
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
345
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
347
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_HW_INIT_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
91
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c
93
value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_HW_INIT_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c
203
reg = readl(dwmac->apb_base + GMAC_RXCLK_DELAY_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c
208
reg = readl(dwmac->apb_base + GMAC_TXCLK_DELAY_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
106
val = readl(dwmac->reg + REG_ETHER_CLOCK_SEL);
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
126
val = readl(dwmac->reg + REG_ETHER_CLOCK_SEL);
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
76
val = readl(dwmac->reg + REG_ETHER_CLOCK_SEL);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
272
u32 intr_status = readl(ioaddr + GMAC_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
273
u32 intr_mask = readl(ioaddr + GMAC_INT_MASK);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
288
readl(ioaddr + GMAC_PMT);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
295
ret = readl(ioaddr + LPI_CTRL_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
323
value = readl(ioaddr + LPI_CTRL_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
338
value = readl(ioaddr + LPI_CTRL_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
373
u32 value = readl(ioaddr + GMAC_DEBUG);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
43
value = readl(ioaddr + GMAC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
444
u32 value = readl(ioaddr + GMAC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
515
ns = readl(ptpaddr + GMAC_PTP_ATNR);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
516
ns += (u64)readl(ptpaddr + GMAC_PTP_ATSR) * NSEC_PER_SEC;
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
530
ts_status = readl(priv->ptpaddr + GMAC3_X_TIMESTAMP_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
555
u32 intr_mask = readl(ioaddr + GMAC_INT_MASK);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
577
tcr_val = readl(ptpaddr + PTP_TCR);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
69
value = readl(int_mask) | disable;
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
78
u32 value = readl(ioaddr + GMAC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
87
value = readl(ioaddr + GMAC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
98
reg_space[i] = readl(ioaddr + i * 4);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
130
u32 csr6 = readl(ioaddr + DMA_CHAN_CONTROL(channel));
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
159
u32 csr6 = readl(ioaddr + DMA_CHAN_CONTROL(channel));
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
197
readl(ioaddr + DMA_BUS_MODE + i * 4);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
203
u32 hw_cap = readl(ioaddr + DMA_HW_FEATURE);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
21
u32 value = readl(ioaddr + DMA_AXI_BUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
54
value = readl(ioaddr + DMA_CHAN_BUS_MODE(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
147
u32 value = readl(ioaddr + MAC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
26
u32 value = readl(ioaddr + MAC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
41
reg_space[MAC_CONTROL / 4] = readl(ioaddr + MAC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
42
reg_space[MAC_ADDR_HIGH / 4] = readl(ioaddr + MAC_ADDR_HIGH);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
43
reg_space[MAC_ADDR_LOW / 4] = readl(ioaddr + MAC_ADDR_LOW);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
44
reg_space[MAC_HASH_HIGH / 4] = readl(ioaddr + MAC_HASH_HIGH);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
45
reg_space[MAC_HASH_LOW / 4] = readl(ioaddr + MAC_HASH_LOW);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
46
reg_space[MAC_FLOW_CTRL / 4] = readl(ioaddr + MAC_FLOW_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
47
reg_space[MAC_VLAN1 / 4] = readl(ioaddr + MAC_VLAN1);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
48
reg_space[MAC_VLAN2 / 4] = readl(ioaddr + MAC_VLAN2);
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
82
u32 value = readl(ioaddr + MAC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
58
u32 csr6 = readl(ioaddr + DMA_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
77
readl(ioaddr + DMA_BUS_MODE + i * 4);
drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
80
readl(ioaddr + DMA_CUR_TX_BUF_ADDR);
drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
82
readl(ioaddr + DMA_CUR_RX_BUF_ADDR);
drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
89
u32 csr8 = readl(ioaddr + DMA_MISSED_FRAME_CTR);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
101
ctrl2 = readl(ioaddr + GMAC_RXQ_CTRL2);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
102
ctrl3 = readl(ioaddr + GMAC_RXQ_CTRL3);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
145
value = readl(ioaddr + base_register);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
168
value = readl(ioaddr + GMAC_RXQ_CTRL1);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
191
u32 value = readl(ioaddr + MTL_OPERATION_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
212
u32 value = readl(ioaddr + MTL_OPERATION_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
241
u32 value = readl(ioaddr + mtl_txqx_weight_base_addr(dwmac4_addrs,
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
255
value = readl(ioaddr + MTL_RXQ_DMA_MAP0);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
260
value = readl(ioaddr + MTL_RXQ_DMA_MAP1);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
283
value = readl(ioaddr + mtl_etsx_ctrl_base_addr(dwmac4_addrs, queue));
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
289
value = readl(ioaddr + mtl_send_slp_credx_base_addr(dwmac4_addrs,
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
300
value = readl(ioaddr + mtl_high_credx_base_addr(dwmac4_addrs, queue));
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
306
value = readl(ioaddr + mtl_low_credx_base_addr(dwmac4_addrs, queue));
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
318
reg_space[i] = readl(ioaddr + i * 4);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
324
u32 value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
333
value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
355
config = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
416
value |= readl(ioaddr + GMAC4_LPI_CTRL_STATUS) & ~mask;
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
42
value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
427
value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
464
value = readl(ioaddr + GMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
474
value = readl(ioaddr + GMAC_RXQ_CTRL4);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
599
mtl_int_qx_status = readl(ioaddr + MTL_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
604
u32 status = readl(ioaddr + MTL_CHAN_INT_CTRL(dwmac4_addrs,
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
622
u32 intr_status = readl(ioaddr + GMAC_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
623
u32 intr_enable = readl(ioaddr + GMAC_INT_EN);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
638
readl(ioaddr + GMAC_PMT);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
64
value = readl(int_mask) & ~disable;
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
645
u32 status = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
676
value = readl(ioaddr + MTL_CHAN_TX_DEBUG(dwmac4_addrs, queue));
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
701
value = readl(ioaddr + MTL_CHAN_RX_DEBUG(dwmac4_addrs, queue));
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
732
value = readl(ioaddr + GMAC_DEBUG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
757
u32 value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
769
u32 value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
784
value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
799
value = readl(ioaddr + GMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
803
value = readl(ioaddr + GMAC_L3L4_CTRL(filter_no));
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
82
u32 value = readl(ioaddr + GMAC_RXQ_CTRL0);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
853
value = readl(ioaddr + GMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
857
value = readl(ioaddr + GMAC_L3L4_CTRL(filter_no));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
117
value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
131
u32 value = readl(ioaddr + DMA_SYS_BUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
149
value = readl(ioaddr + DMA_BUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
173
readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
175
readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
177
readl(ioaddr + DMA_CHAN_RX_CONTROL(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
179
readl(ioaddr + DMA_CHAN_TX_BASE_ADDR_HI(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
181
readl(ioaddr + DMA_CHAN_TX_BASE_ADDR(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
183
readl(ioaddr + DMA_CHAN_RX_BASE_ADDR_HI(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
185
readl(ioaddr + DMA_CHAN_RX_BASE_ADDR(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
187
readl(ioaddr + DMA_CHAN_TX_END_ADDR(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
189
readl(ioaddr + DMA_CHAN_RX_END_ADDR(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
191
readl(ioaddr + DMA_CHAN_TX_RING_LEN(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
193
readl(ioaddr + DMA_CHAN_RX_RING_LEN(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
195
readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
197
readl(ioaddr + DMA_CHAN_RX_WATCHDOG(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
199
readl(ioaddr + DMA_CHAN_SLOT_CTRL_STATUS(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
20
u32 value = readl(ioaddr + DMA_SYS_BUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
201
readl(ioaddr + DMA_CHAN_CUR_TX_DESC(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
203
readl(ioaddr + DMA_CHAN_CUR_RX_DESC(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
205
readl(ioaddr + DMA_CHAN_CUR_TX_BUF_ADDR_HI(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
207
readl(ioaddr + DMA_CHAN_CUR_TX_BUF_ADDR(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
209
readl(ioaddr + DMA_CHAN_CUR_RX_BUF_ADDR_HI(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
211
readl(ioaddr + DMA_CHAN_CUR_RX_BUF_ADDR(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
213
readl(ioaddr + DMA_CHAN_STATUS(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
241
mtl_rx_op = readl(ioaddr + MTL_CHAN_RX_OP_MODE(dwmac4_addrs, channel));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
308
u32 mtl_tx_op = readl(ioaddr + MTL_CHAN_TX_OP_MODE(dwmac4_addrs,
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
361
u32 hw_cap = readl(ioaddr + GMAC_HW_FEATURE0);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
388
hw_cap = readl(ioaddr + GMAC_HW_FEATURE1);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
417
hw_cap = readl(ioaddr + GMAC_HW_FEATURE2);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
437
hw_cap = readl(ioaddr + GMAC_HW_FEATURE3);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
463
value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
468
value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
478
u32 mtl_tx_op = readl(ioaddr + MTL_CHAN_TX_OP_MODE(dwmac4_addrs,
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
494
u32 value = readl(ioaddr + DMA_CHAN_RX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
505
u32 value = readl(ioaddr + GMAC_EXT_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
511
value = readl(ioaddr + GMAC_EXT_CFG1);
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
516
value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
528
u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
537
value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs,
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
54
value = readl(ioaddr + DMA_CHAN_RX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
75
value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
99
value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
116
u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
130
u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
144
u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
158
u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
172
u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
173
u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
18
u32 value = readl(ioaddr + DMA_BUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
246
u32 value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
264
hi_addr = readl(ioaddr + high);
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
265
lo_addr = readl(ioaddr + low);
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
49
u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
54
value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
64
u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
75
u32 value = readl(ioaddr + DMA_CHAN_RX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
81
value = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
90
u32 value = readl(ioaddr + DMA_CHAN_RX_CONTROL(dwmac4_addrs, chan));
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
131
value = readl(ioaddr + MTL_ECC_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
179
value = readl(ioaddr + DMA_ECC_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
209
value = readl(ioaddr + MTL_ECC_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
224
value = readl(ioaddr + MTL_ECC_INT_ENABLE);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
232
value = readl(ioaddr + DMA_ECC_INT_ENABLE);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
241
value = readl(ioaddr + MAC_FSM_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
249
value = readl(ioaddr + MTL_DPP_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
278
mtl = readl(ioaddr + MTL_SAFETY_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
279
dma = readl(ioaddr + DMA_SAFETY_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
334
val = readl(ioaddr + MTL_OPERATION_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
346
val = readl(ioaddr + MTL_OPERATION_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
442
old_val = readl(ioaddr + GMAC_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
524
u32 tnsec = readl(ioaddr + MAC_PPSx_TARGET_TIME_NSEC(index));
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
525
u32 val = readl(ioaddr + MAC_PPS_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac5.c
83
value = readl(ioaddr + MAC_DPP_FSM_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
167
u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
19
u32 value = readl(ioaddr + DMA_BUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
213
u32 value = readl(ioaddr + DMA_INTR_ENA);
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
244
u32 csr6 = readl(ioaddr + DMA_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
247
do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF));
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
271
old_val = readl(ioaddr + MAC_CTRL_REG);
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
289
hi_addr = readl(ioaddr + high);
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
290
lo_addr = readl(ioaddr + low);
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
44
u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
57
u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
70
u32 value = readl(ioaddr + DMA_CHAN_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
77
u32 value = readl(ioaddr + DMA_CHAN_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
85
u32 value = readl(ioaddr + DMA_CHAN_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
92
u32 value = readl(ioaddr + DMA_CHAN_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
105
ctrl2 = readl(ioaddr + XGMAC_RXQ_CTRL2);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
106
ctrl3 = readl(ioaddr + XGMAC_RXQ_CTRL3);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1065
old_val = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1152
*ts = readl(ioaddr + XGMAC_TXTIMESTAMP_NSEC) & XGMAC_TXTSSTSLO;
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1153
*ts += readl(ioaddr + XGMAC_TXTIMESTAMP_SEC) * 1000000000ULL;
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1161
u32 tnsec = readl(ioaddr + XGMAC_PPSx_TARGET_TIME_NSEC(index));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1162
u32 val = readl(ioaddr + XGMAC_PPS_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1225
u32 value = readl(ioaddr + XGMAC_TX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1264
*data = readl(ioaddr + XGMAC_L3L4_DATA);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1298
value = readl(ioaddr + XGMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1361
value = readl(ioaddr + XGMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1419
value = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
1475
value = readl(ioaddr + XLGMAC_RXQ_ENABLE_CTRL0) & ~XGMAC_RXQEN(queue);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
148
value = readl(ioaddr + reg);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
169
value = readl(ioaddr + XGMAC_RXQ_CTRL1);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
191
value = readl(ioaddr + XGMAC_MTL_OPMODE);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
215
value = readl(ioaddr + XGMAC_MTL_OPMODE);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
23
tx = readl(ioaddr + XGMAC_TX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
237
value = readl(ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(i));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
24
rx = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
264
value = readl(ioaddr + reg);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
284
value = readl(ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(queue));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
296
reg_space[i] = readl(ioaddr + i * 4);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
306
en = readl(ioaddr + XGMAC_INT_EN);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
307
stat = readl(ioaddr + XGMAC_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
313
readl(ioaddr + XGMAC_PMT);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
317
u32 lpi = readl(ioaddr + XGMAC_LPI_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
343
status = readl(ioaddr + XGMAC_MTL_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
345
u32 chan_status = readl(ioaddr + XGMAC_MTL_QINT_STATUS(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
387
u32 cfg = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
39
value = readl(int_mask) & ~disable;
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
416
hi_addr = readl(ioaddr + XGMAC_ADDRx_HIGH(reg_n));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
417
lo_addr = readl(ioaddr + XGMAC_ADDRx_LOW(reg_n));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
438
value = readl(ioaddr + XGMAC_LPI_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
457
value = readl(ioaddr + XGMAC_LPI_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
501
u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
53
u32 tx = readl(ioaddr + XGMAC_TX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
54
u32 rx = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
557
u32 value = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
589
value = readl(ioaddr + XGMAC_RSS_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
689
value = readl(ioaddr + XGMAC_MAC_DPP_FSM_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
73
value = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
737
value = readl(ioaddr + XGMAC_MTL_ECC_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
80
return !!(readl(ioaddr + XGMAC_RX_CONFIG) & XGMAC_CONFIG_IPC);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
822
value = readl(ioaddr + XGMAC_DMA_ECC_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
828
value = readl(ioaddr + XGMAC_DMA_DPP_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
849
value = readl(ioaddr + XGMAC_MTL_ECC_INT_ENABLE);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
857
value = readl(ioaddr + XGMAC_DMA_ECC_INT_ENABLE);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
869
value = readl(ioaddr + XGMAC_MAC_FSM_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
875
value = readl(ioaddr + XGMAC_MTL_DPP_CONTROL);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
89
value = readl(ioaddr + XGMAC_RXQ_CTRL0) & ~XGMAC_RXQEN(queue);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
895
mtl = readl(ioaddr + XGMAC_MTL_SAFETY_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
896
dma = readl(ioaddr + XGMAC_DMA_SAFETY_INT_STATUS);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
956
u32 val = readl(ioaddr + XGMAC_MTL_OPMODE);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
968
val = readl(ioaddr + XGMAC_MTL_OPMODE);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
114
reg_space[i] = readl(ioaddr + i * 4);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
120
u32 value = readl(ioaddr + XGMAC_MTL_RXQ_OPMODE(channel));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
13
u32 value = readl(ioaddr + XGMAC_DMA_MODE);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
142
u32 flow = readl(ioaddr + XGMAC_MTL_RXQ_FLOW_CONTROL(channel));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
180
u32 value = readl(ioaddr + XGMAC_MTL_TXQ_OPMODE(channel));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
225
u32 value = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
239
u32 value = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
25
u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
254
value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
258
value = readl(ioaddr + XGMAC_TX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
268
value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
272
value = readl(ioaddr + XGMAC_TX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
282
value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
286
value = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
296
value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
307
u32 intr_status = readl(ioaddr + XGMAC_DMA_CH_STATUS(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
308
u32 intr_en = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
361
hw_cap = readl(ioaddr + XGMAC_HW_FEATURE0);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
387
hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
40
u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
433
hw_cap = readl(ioaddr + XGMAC_HW_FEATURE2);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
446
hw_cap = readl(ioaddr + XGMAC_HW_FEATURE3);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
466
hw_cap = readl(ioaddr + XGMAC_HW_FEATURE4);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
506
u32 value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
519
u32 value = readl(ioaddr + XGMAC_MTL_TXQ_OPMODE(channel));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
520
u32 flow = readl(ioaddr + XGMAC_RX_FLOW_CTRL);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
540
value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
548
u32 value = readl(ioaddr + XGMAC_RX_CONFIG);
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
554
value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
565
u32 value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
57
value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
574
value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan)) & XGMAC_EDSE;
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
73
value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan));
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
83
u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE);
drivers/net/ethernet/stmicro/stmmac/hwif.c
39
version = readl(priv->ioaddr + version_offset);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
237
u32 value = readl(mmcaddr + MMC_CNTRL);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
262
mmc->mmc_tx_octetcount_gb += readl(mmcaddr + MMC_TX_OCTETCOUNT_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
263
mmc->mmc_tx_framecount_gb += readl(mmcaddr + MMC_TX_FRAMECOUNT_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
264
mmc->mmc_tx_broadcastframe_g += readl(mmcaddr +
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
266
mmc->mmc_tx_multicastframe_g += readl(mmcaddr +
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
268
mmc->mmc_tx_64_octets_gb += readl(mmcaddr + MMC_TX_64_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
270
readl(mmcaddr + MMC_TX_65_TO_127_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
272
readl(mmcaddr + MMC_TX_128_TO_255_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
274
readl(mmcaddr + MMC_TX_256_TO_511_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
276
readl(mmcaddr + MMC_TX_512_TO_1023_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
278
readl(mmcaddr + MMC_TX_1024_TO_MAX_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
279
mmc->mmc_tx_unicast_gb += readl(mmcaddr + MMC_TX_UNICAST_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
280
mmc->mmc_tx_multicast_gb += readl(mmcaddr + MMC_TX_MULTICAST_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
281
mmc->mmc_tx_broadcast_gb += readl(mmcaddr + MMC_TX_BROADCAST_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
282
mmc->mmc_tx_underflow_error += readl(mmcaddr + MMC_TX_UNDERFLOW_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
283
mmc->mmc_tx_singlecol_g += readl(mmcaddr + MMC_TX_SINGLECOL_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
284
mmc->mmc_tx_multicol_g += readl(mmcaddr + MMC_TX_MULTICOL_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
285
mmc->mmc_tx_deferred += readl(mmcaddr + MMC_TX_DEFERRED);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
286
mmc->mmc_tx_latecol += readl(mmcaddr + MMC_TX_LATECOL);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
287
mmc->mmc_tx_exesscol += readl(mmcaddr + MMC_TX_EXESSCOL);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
288
mmc->mmc_tx_carrier_error += readl(mmcaddr + MMC_TX_CARRIER_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
289
mmc->mmc_tx_octetcount_g += readl(mmcaddr + MMC_TX_OCTETCOUNT_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
290
mmc->mmc_tx_framecount_g += readl(mmcaddr + MMC_TX_FRAMECOUNT_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
291
mmc->mmc_tx_excessdef += readl(mmcaddr + MMC_TX_EXCESSDEF);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
292
mmc->mmc_tx_pause_frame += readl(mmcaddr + MMC_TX_PAUSE_FRAME);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
293
mmc->mmc_tx_vlan_frame_g += readl(mmcaddr + MMC_TX_VLAN_FRAME_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
294
mmc->mmc_tx_oversize_g += readl(mmcaddr + MMC_TX_OVERSIZE_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
295
mmc->mmc_tx_lpi_usec += readl(mmcaddr + MMC_TX_LPI_USEC);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
296
mmc->mmc_tx_lpi_tran += readl(mmcaddr + MMC_TX_LPI_TRAN);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
299
mmc->mmc_rx_framecount_gb += readl(mmcaddr + MMC_RX_FRAMECOUNT_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
300
mmc->mmc_rx_octetcount_gb += readl(mmcaddr + MMC_RX_OCTETCOUNT_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
301
mmc->mmc_rx_octetcount_g += readl(mmcaddr + MMC_RX_OCTETCOUNT_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
302
mmc->mmc_rx_broadcastframe_g += readl(mmcaddr +
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
304
mmc->mmc_rx_multicastframe_g += readl(mmcaddr +
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
306
mmc->mmc_rx_crc_error += readl(mmcaddr + MMC_RX_CRC_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
307
mmc->mmc_rx_align_error += readl(mmcaddr + MMC_RX_ALIGN_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
308
mmc->mmc_rx_run_error += readl(mmcaddr + MMC_RX_RUN_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
309
mmc->mmc_rx_jabber_error += readl(mmcaddr + MMC_RX_JABBER_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
310
mmc->mmc_rx_undersize_g += readl(mmcaddr + MMC_RX_UNDERSIZE_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
311
mmc->mmc_rx_oversize_g += readl(mmcaddr + MMC_RX_OVERSIZE_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
312
mmc->mmc_rx_64_octets_gb += readl(mmcaddr + MMC_RX_64_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
314
readl(mmcaddr + MMC_RX_65_TO_127_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
316
readl(mmcaddr + MMC_RX_128_TO_255_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
318
readl(mmcaddr + MMC_RX_256_TO_511_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
320
readl(mmcaddr + MMC_RX_512_TO_1023_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
322
readl(mmcaddr + MMC_RX_1024_TO_MAX_OCTETS_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
323
mmc->mmc_rx_unicast_g += readl(mmcaddr + MMC_RX_UNICAST_G);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
324
mmc->mmc_rx_length_error += readl(mmcaddr + MMC_RX_LENGTH_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
325
mmc->mmc_rx_autofrangetype += readl(mmcaddr + MMC_RX_AUTOFRANGETYPE);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
326
mmc->mmc_rx_pause_frames += readl(mmcaddr + MMC_RX_PAUSE_FRAMES);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
327
mmc->mmc_rx_fifo_overflow += readl(mmcaddr + MMC_RX_FIFO_OVERFLOW);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
328
mmc->mmc_rx_vlan_frames_gb += readl(mmcaddr + MMC_RX_VLAN_FRAMES_GB);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
329
mmc->mmc_rx_watchdog_error += readl(mmcaddr + MMC_RX_WATCHDOG_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
330
mmc->mmc_rx_error += readl(mmcaddr + MMC_RX_ERROR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
331
mmc->mmc_rx_lpi_usec += readl(mmcaddr + MMC_RX_LPI_USEC);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
332
mmc->mmc_rx_lpi_tran += readl(mmcaddr + MMC_RX_LPI_TRAN);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
335
mmc->mmc_rx_ipv4_gd += readl(mmcaddr + MMC_RX_IPV4_GD);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
336
mmc->mmc_rx_ipv4_hderr += readl(mmcaddr + MMC_RX_IPV4_HDERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
337
mmc->mmc_rx_ipv4_nopay += readl(mmcaddr + MMC_RX_IPV4_NOPAY);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
338
mmc->mmc_rx_ipv4_frag += readl(mmcaddr + MMC_RX_IPV4_FRAG);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
339
mmc->mmc_rx_ipv4_udsbl += readl(mmcaddr + MMC_RX_IPV4_UDSBL);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
341
mmc->mmc_rx_ipv4_gd_octets += readl(mmcaddr + MMC_RX_IPV4_GD_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
343
readl(mmcaddr + MMC_RX_IPV4_HDERR_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
345
readl(mmcaddr + MMC_RX_IPV4_NOPAY_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
346
mmc->mmc_rx_ipv4_frag_octets += readl(mmcaddr +
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
349
readl(mmcaddr + MMC_RX_IPV4_UDSBL_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
352
mmc->mmc_rx_ipv6_gd_octets += readl(mmcaddr + MMC_RX_IPV6_GD_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
354
readl(mmcaddr + MMC_RX_IPV6_HDERR_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
356
readl(mmcaddr + MMC_RX_IPV6_NOPAY_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
358
mmc->mmc_rx_ipv6_gd += readl(mmcaddr + MMC_RX_IPV6_GD);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
359
mmc->mmc_rx_ipv6_hderr += readl(mmcaddr + MMC_RX_IPV6_HDERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
360
mmc->mmc_rx_ipv6_nopay += readl(mmcaddr + MMC_RX_IPV6_NOPAY);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
363
mmc->mmc_rx_udp_gd += readl(mmcaddr + MMC_RX_UDP_GD);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
364
mmc->mmc_rx_udp_err += readl(mmcaddr + MMC_RX_UDP_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
365
mmc->mmc_rx_tcp_gd += readl(mmcaddr + MMC_RX_TCP_GD);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
366
mmc->mmc_rx_tcp_err += readl(mmcaddr + MMC_RX_TCP_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
367
mmc->mmc_rx_icmp_gd += readl(mmcaddr + MMC_RX_ICMP_GD);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
368
mmc->mmc_rx_icmp_err += readl(mmcaddr + MMC_RX_ICMP_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
370
mmc->mmc_rx_udp_gd_octets += readl(mmcaddr + MMC_RX_UDP_GD_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
371
mmc->mmc_rx_udp_err_octets += readl(mmcaddr + MMC_RX_UDP_ERR_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
372
mmc->mmc_rx_tcp_gd_octets += readl(mmcaddr + MMC_RX_TCP_GD_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
373
mmc->mmc_rx_tcp_err_octets += readl(mmcaddr + MMC_RX_TCP_ERR_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
374
mmc->mmc_rx_icmp_gd_octets += readl(mmcaddr + MMC_RX_ICMP_GD_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
375
mmc->mmc_rx_icmp_err_octets += readl(mmcaddr + MMC_RX_ICMP_ERR_OCTETS);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
377
mmc->mmc_tx_fpe_fragment_cntr += readl(mmcaddr + MMC_TX_FPE_FRAG);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
378
mmc->mmc_tx_hold_req_cntr += readl(mmcaddr + MMC_TX_HOLD_REQ);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
380
readl(mmcaddr + MMC_RX_PKT_ASSEMBLY_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
381
mmc->mmc_rx_packet_smd_err_cntr += readl(mmcaddr + MMC_RX_PKT_SMD_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
383
readl(mmcaddr + MMC_RX_PKT_ASSEMBLY_OK);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
384
mmc->mmc_rx_fpe_fragment_cntr += readl(mmcaddr + MMC_RX_FPE_FRAG);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
395
u32 value = readl(mmcaddr + MMC_CNTRL);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
415
tmp += readl(addr + reg);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
416
tmp += ((u64 )readl(addr + reg + 0x4)) << 32;
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
466
mmc->mmc_tx_lpi_usec += readl(mmcaddr + MMC_XGMAC_TX_LPI_USEC);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
467
mmc->mmc_tx_lpi_tran += readl(mmcaddr + MMC_XGMAC_TX_LPI_TRAN);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
484
mmc->mmc_rx_run_error += readl(mmcaddr + MMC_XGMAC_RX_RUNT_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
485
mmc->mmc_rx_jabber_error += readl(mmcaddr + MMC_XGMAC_RX_JABBER_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
486
mmc->mmc_rx_undersize_g += readl(mmcaddr + MMC_XGMAC_RX_UNDER);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
487
mmc->mmc_rx_oversize_g += readl(mmcaddr + MMC_XGMAC_RX_OVER);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
512
mmc->mmc_rx_watchdog_error += readl(mmcaddr + MMC_XGMAC_RX_WATCHDOG_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
513
mmc->mmc_rx_lpi_usec += readl(mmcaddr + MMC_XGMAC_RX_LPI_USEC);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
514
mmc->mmc_rx_lpi_tran += readl(mmcaddr + MMC_XGMAC_RX_LPI_TRAN);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
520
readl(mmcaddr + MMC_XGMAC_RX_ALIGN_ERR_PKT);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
523
readl(mmcaddr + MMC_XGMAC_SGF_PASS_PKT);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
525
readl(mmcaddr + MMC_XGMAC_SGF_FAIL_PKT);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
526
mmc->mmc_tx_fpe_fragment_cntr += readl(mmcaddr + MMC_XGMAC_TX_FPE_FRAG);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
527
mmc->mmc_tx_hold_req_cntr += readl(mmcaddr + MMC_XGMAC_TX_HOLD_REQ);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
531
readl(mmcaddr + MMC_XGMAC_RX_PKT_ASSEMBLY_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
533
readl(mmcaddr + MMC_XGMAC_RX_PKT_SMD_ERR);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
535
readl(mmcaddr + MMC_XGMAC_RX_PKT_ASSEMBLY_OK);
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
537
readl(mmcaddr + MMC_XGMAC_RX_FPE_FRAG);
drivers/net/ethernet/stmicro/stmmac/stmmac_est.c
107
value = readl(est_addr + EST_SCH_ERR);
drivers/net/ethernet/stmicro/stmmac/stmmac_est.c
128
value = readl(est_addr + EST_FRM_SZ_ERR);
drivers/net/ethernet/stmicro/stmmac/stmmac_est.c
131
value = readl(est_addr + EST_FRM_SZ_CAP);
drivers/net/ethernet/stmicro/stmmac/stmmac_est.c
55
ctrl = readl(est_addr + EST_CONTROL);
drivers/net/ethernet/stmicro/stmmac/stmmac_est.c
91
status = readl(est_addr + EST_STATUS);
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
146
value = readl(ioaddr + reg->mac_fpe_reg);
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
186
return FIELD_GET(FPE_MTL_ADD_FRAG_SZ, readl(ioaddr + reg->mtl_fpe_reg));
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
195
value = readl(ioaddr + reg->mtl_fpe_reg);
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
248
val = readl(priv->ioaddr + GMAC5_MTL_FPE_CTRL_STS);
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
265
val = readl(priv->ioaddr + XGMAC_MTL_TXQ_OPMODE(i));
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
285
val = readl(priv->ioaddr + XGMAC_MTL_TXQ_OPMODE(offset + i));
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
291
val = readl(priv->ioaddr + XGMAC_MTL_FPE_CTRL_STS);
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
56
value = readl(ioaddr + reg->rxq_ctrl1_reg);
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
77
value = readl(ioaddr + reg->int_en_reg);
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
82
readl(ioaddr + reg->mac_fpe_reg);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
109
scaled_ns = readl(ioaddr + PTP_TS_EGR_LAT);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
125
value = readl(ioaddr + PTP_TCR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
141
value = readl(ioaddr + PTP_TCR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
164
value = readl(ioaddr + PTP_TCR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
176
value = readl(ioaddr + PTP_TCR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
208
ns = readl(ptpaddr + PTP_ATNR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
209
ns += (u64)readl(ptpaddr + PTP_ATSR) * NSEC_PER_SEC;
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
228
tsync_int = readl(priv->ioaddr + GMAC_INT_STATUS) & GMAC_INT_TSIE;
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
236
ts_status = readl(priv->ioaddr + GMAC_TIMESTAMP_STATUS);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
244
acr_value = readl(priv->ptpaddr + PTP_ACR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
31
u32 regval = readl(ioaddr + PTP_TCR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
42
u32 value = readl(ioaddr + PTP_TCR);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
85
scaled_ns = readl(ioaddr + PTP_TS_INGR_LAT);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
90
val = readl(ioaddr + PTP_TCR);
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
1013
old_ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
124
ret = (int)readl(priv->ioaddr + mii_data) & GENMASK(15, 0);
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
269
ret = read ? readl(mii_data) & MII_DATA_GD_MASK : 0;
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
64
tmp = readl(priv->ioaddr + XGMAC_MDIO_C22P);
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
81
tmp = readl(priv->ioaddr + XGMAC_MDIO_C22P);
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
66
u32 val = readl(spcs->base + GMAC_AN_STATUS);
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
63
u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
229
acr_value = readl(ptpaddr + PTP_ACR);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
15
val = readl(ioaddr + VLAN_TAG);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
172
value = readl(ioaddr + VLAN_TAG);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
216
value = readl(ioaddr + VLAN_INCL);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
237
u32 value = readl(ioaddr + VLAN_TAG);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
261
u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
267
value = readl(ioaddr + VLAN_TAG);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
283
u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
289
value = readl(ioaddr + VLAN_TAG);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
306
u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
312
value = readl(ioaddr + VLAN_TAG);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
35
val = readl(ioaddr + VLAN_TAG);
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
352
val = readl(ioaddr + HW_FEATURE3);
drivers/net/ethernet/sun/cassini.c
1004
state_machine = readl(cp->regs + REG_PCS_STATE_MACHINE);
drivers/net/ethernet/sun/cassini.c
1059
stat = readl(cp->regs + REG_PCS_SERDES_STATE);
drivers/net/ethernet/sun/cassini.c
1087
u32 stat = readl(cp->regs + REG_PCS_INTR_STATUS);
drivers/net/ethernet/sun/cassini.c
1097
u32 txmac_stat = readl(cp->regs + REG_MAC_TX_STATUS);
drivers/net/ethernet/sun/cassini.c
1235
readl(cp->regs + REG_INTR_STATUS_ALIAS);
drivers/net/ethernet/sun/cassini.c
1429
if (!(readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_EN))
drivers/net/ethernet/sun/cassini.c
1441
if (!(readl(cp->regs + REG_RX_CFG) & RX_CFG_DMA_EN))
drivers/net/ethernet/sun/cassini.c
1455
if (!(readl(cp->regs + REG_SW_RESET) & SW_RESET_RX))
drivers/net/ethernet/sun/cassini.c
1472
val = readl(cp->regs + REG_RX_CFG);
drivers/net/ethernet/sun/cassini.c
1475
val = readl(cp->regs + REG_MAC_RX_CFG);
drivers/net/ethernet/sun/cassini.c
1484
u32 stat = readl(cp->regs + REG_MAC_RX_STATUS);
drivers/net/ethernet/sun/cassini.c
1517
u32 stat = readl(cp->regs + REG_MAC_CTRL_STATUS);
drivers/net/ethernet/sun/cassini.c
1657
u32 stat = readl(cp->regs + REG_MIF_STATUS);
drivers/net/ethernet/sun/cassini.c
1671
u32 stat = readl(cp->regs + REG_PCI_ERR_STATUS);
drivers/net/ethernet/sun/cassini.c
1677
stat, readl(cp->regs + REG_BIM_DIAG));
drivers/net/ethernet/sun/cassini.c
1901
limit = readl(cp->regs + REG_TX_COMPN(ring));
drivers/net/ethernet/sun/cassini.c
2247
readl(cp->regs + REG_RX_COMP_HEAD), cp->rx_new[ring]);
drivers/net/ethernet/sun/cassini.c
2364
ring, readl(cp->regs + REG_RX_COMP_HEAD), entry);
drivers/net/ethernet/sun/cassini.c
2399
u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(ring));
drivers/net/ethernet/sun/cassini.c
2450
u32 status = readl(cp->regs + REG_PLUS_INTRN_STATUS(1));
drivers/net/ethernet/sun/cassini.c
2502
u32 status = readl(cp->regs + REG_INTR_STATUS);
drivers/net/ethernet/sun/cassini.c
2536
u32 status = readl(cp->regs + REG_INTR_STATUS);
drivers/net/ethernet/sun/cassini.c
2571
status = readl(cp->regs + REG_PLUS_INTRN_STATUS(1));
drivers/net/ethernet/sun/cassini.c
2579
status = readl(cp->regs + REG_PLUS_INTRN_STATUS(2));
drivers/net/ethernet/sun/cassini.c
2587
status = readl(cp->regs + REG_PLUS_INTRN_STATUS(3));
drivers/net/ethernet/sun/cassini.c
2639
readl(cp->regs + REG_MIF_STATE_MACHINE));
drivers/net/ethernet/sun/cassini.c
2642
readl(cp->regs + REG_MAC_STATE_MACHINE));
drivers/net/ethernet/sun/cassini.c
2645
readl(cp->regs + REG_TX_CFG),
drivers/net/ethernet/sun/cassini.c
2646
readl(cp->regs + REG_MAC_TX_STATUS),
drivers/net/ethernet/sun/cassini.c
2647
readl(cp->regs + REG_MAC_TX_CFG),
drivers/net/ethernet/sun/cassini.c
2648
readl(cp->regs + REG_TX_FIFO_PKT_CNT),
drivers/net/ethernet/sun/cassini.c
2649
readl(cp->regs + REG_TX_FIFO_WRITE_PTR),
drivers/net/ethernet/sun/cassini.c
2650
readl(cp->regs + REG_TX_FIFO_READ_PTR),
drivers/net/ethernet/sun/cassini.c
2651
readl(cp->regs + REG_TX_SM_1),
drivers/net/ethernet/sun/cassini.c
2652
readl(cp->regs + REG_TX_SM_2));
drivers/net/ethernet/sun/cassini.c
2655
readl(cp->regs + REG_RX_CFG),
drivers/net/ethernet/sun/cassini.c
2656
readl(cp->regs + REG_MAC_RX_STATUS),
drivers/net/ethernet/sun/cassini.c
2657
readl(cp->regs + REG_MAC_RX_CFG));
drivers/net/ethernet/sun/cassini.c
2660
readl(cp->regs + REG_HP_STATE_MACHINE),
drivers/net/ethernet/sun/cassini.c
2661
readl(cp->regs + REG_HP_STATUS0),
drivers/net/ethernet/sun/cassini.c
2662
readl(cp->regs + REG_HP_STATUS1),
drivers/net/ethernet/sun/cassini.c
2663
readl(cp->regs + REG_HP_STATUS2));
drivers/net/ethernet/sun/cassini.c
2972
if (readl(cp->regs + REG_MAC_TX_RESET) == 0)
drivers/net/ethernet/sun/cassini.c
2980
if (readl(cp->regs + REG_MAC_RX_RESET) == 0)
drivers/net/ethernet/sun/cassini.c
2985
if (readl(cp->regs + REG_MAC_TX_RESET) |
drivers/net/ethernet/sun/cassini.c
2986
readl(cp->regs + REG_MAC_RX_RESET))
drivers/net/ethernet/sun/cassini.c
2988
readl(cp->regs + REG_MAC_TX_RESET),
drivers/net/ethernet/sun/cassini.c
2989
readl(cp->regs + REG_MAC_RX_RESET),
drivers/net/ethernet/sun/cassini.c
2990
readl(cp->regs + REG_MAC_STATE_MACHINE));
drivers/net/ethernet/sun/cassini.c
3372
cp->tx_fifo_size = readl(cp->regs + REG_TX_FIFO_SIZE) * 64;
drivers/net/ethernet/sun/cassini.c
3386
cfg = readl(cp->regs + REG_MIF_CFG);
drivers/net/ethernet/sun/cassini.c
3411
readl(cp->regs + REG_MIF_STATE_MACHINE));
drivers/net/ethernet/sun/cassini.c
3431
val = readl(cp->regs + REG_TX_CFG) | TX_CFG_DMA_EN;
drivers/net/ethernet/sun/cassini.c
3433
val = readl(cp->regs + REG_RX_CFG) | RX_CFG_DMA_EN;
drivers/net/ethernet/sun/cassini.c
3437
val = readl(cp->regs + REG_MAC_TX_CFG) | MAC_TX_CFG_EN;
drivers/net/ethernet/sun/cassini.c
3439
val = readl(cp->regs + REG_MAC_RX_CFG) | MAC_RX_CFG_EN;
drivers/net/ethernet/sun/cassini.c
3444
val = readl(cp->regs + REG_MAC_TX_CFG);
drivers/net/ethernet/sun/cassini.c
3452
val = readl(cp->regs + REG_MAC_RX_CFG);
drivers/net/ethernet/sun/cassini.c
3457
readl(cp->regs + REG_MIF_STATE_MACHINE),
drivers/net/ethernet/sun/cassini.c
3458
readl(cp->regs + REG_MAC_STATE_MACHINE));
drivers/net/ethernet/sun/cassini.c
3466
readl(cp->regs + REG_MIF_STATE_MACHINE),
drivers/net/ethernet/sun/cassini.c
3467
readl(cp->regs + REG_MAC_STATE_MACHINE));
drivers/net/ethernet/sun/cassini.c
3485
u32 val = readl(cp->regs + REG_PCS_MII_LPA);
drivers/net/ethernet/sun/cassini.c
354
batch_entropy_store(readl(cp->regs + REG_ENTROPY_IV),
drivers/net/ethernet/sun/cassini.c
355
readl(cp->regs + REG_ENTROPY_IV),
drivers/net/ethernet/sun/cassini.c
3558
val = readl(cp->regs + REG_PCS_MII_CTRL);
drivers/net/ethernet/sun/cassini.c
3603
val = readl(cp->regs + REG_MAC_RX_CFG);
drivers/net/ethernet/sun/cassini.c
3620
val = readl(cp->regs + REG_MAC_RX_CFG);
drivers/net/ethernet/sun/cassini.c
3648
val = readl(cp->regs + REG_MAC_CTRL_CFG);
drivers/net/ethernet/sun/cassini.c
3715
u32 val = readl(cp->regs + REG_SW_RESET);
drivers/net/ethernet/sun/cassini.c
3752
val = readl(cp->regs + REG_TX_CFG);
drivers/net/ethernet/sun/cassini.c
3756
val = readl(cp->regs + REG_RX_CFG);
drivers/net/ethernet/sun/cassini.c
394
cmd = readl(cp->regs + REG_MIF_FRAME);
drivers/net/ethernet/sun/cassini.c
4088
readl(cp->regs + REG_MIF_STATUS); /* avoid dups */
drivers/net/ethernet/sun/cassini.c
4098
if ((readl(cp->regs + REG_MAC_TX_STATUS) & MAC_TX_FRAME_XMIT) == 0) {
drivers/net/ethernet/sun/cassini.c
4099
u32 val = readl(cp->regs + REG_MAC_STATE_MACHINE);
drivers/net/ethernet/sun/cassini.c
4111
val = readl(cp->regs + REG_TX_FIFO_PKT_CNT);
drivers/net/ethernet/sun/cassini.c
4112
wptr = readl(cp->regs + REG_TX_FIFO_WRITE_PTR);
drivers/net/ethernet/sun/cassini.c
4113
rptr = readl(cp->regs + REG_TX_FIFO_READ_PTR);
drivers/net/ethernet/sun/cassini.c
416
cmd = readl(cp->regs + REG_MIF_FRAME);
drivers/net/ethernet/sun/cassini.c
4346
val= readl(cp->regs+ethtool_register_table[i].offsets);
drivers/net/ethernet/sun/cassini.c
4375
readl(cp->regs + REG_MAC_FCS_ERR) & 0xffff;
drivers/net/ethernet/sun/cassini.c
4377
readl(cp->regs + REG_MAC_ALIGN_ERR) &0xffff;
drivers/net/ethernet/sun/cassini.c
4379
readl(cp->regs + REG_MAC_LEN_ERR) & 0xffff;
drivers/net/ethernet/sun/cassini.c
4381
tmp = (readl(cp->regs + REG_MAC_COLL_EXCESS) & 0xffff) +
drivers/net/ethernet/sun/cassini.c
4382
(readl(cp->regs + REG_MAC_COLL_LATE) & 0xffff);
drivers/net/ethernet/sun/cassini.c
4385
tmp + (readl(cp->regs + REG_MAC_COLL_NORMAL) & 0xffff);
drivers/net/ethernet/sun/cassini.c
4388
readl(cp->regs + REG_MAC_COLL_EXCESS);
drivers/net/ethernet/sun/cassini.c
4389
stats[N_TX_RINGS].collisions += readl(cp->regs + REG_MAC_COLL_EXCESS) +
drivers/net/ethernet/sun/cassini.c
4390
readl(cp->regs + REG_MAC_COLL_LATE);
drivers/net/ethernet/sun/cassini.c
4436
rxcfg = readl(cp->regs + REG_MAC_RX_CFG);
drivers/net/ethernet/sun/cassini.c
4440
while (readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_EN) {
drivers/net/ethernet/sun/cassini.c
4450
while (readl(cp->regs + REG_MAC_RX_CFG) & MAC_RX_CFG_HASH_FILTER_EN) {
drivers/net/ethernet/sun/cassini.c
4524
bmcr = readl(cp->regs + REG_PCS_MII_CTRL);
drivers/net/ethernet/sun/cassini.c
5052
i = readl(cp->regs + REG_BIM_CFG);
drivers/net/ethernet/sun/cassini.c
652
cfg = readl(cp->regs + REG_MIF_CFG);
drivers/net/ethernet/sun/cassini.c
734
u32 val = readl(cp->regs + REG_PCS_MII_CTRL);
drivers/net/ethernet/sun/cassini.c
943
val = readl(cp->regs + REG_PCS_MII_CTRL);
drivers/net/ethernet/sun/cassini.c
950
if ((readl(cp->regs + REG_PCS_MII_CTRL) &
drivers/net/ethernet/sun/cassini.c
956
readl(cp->regs + REG_PCS_STATE_MACHINE));
drivers/net/ethernet/sun/cassini.c
964
val = readl(cp->regs + REG_PCS_MII_ADVERT);
drivers/net/ethernet/sun/cassini.c
989
stat = readl(cp->regs + REG_PCS_MII_STATUS);
drivers/net/ethernet/sun/cassini.c
991
stat = readl(cp->regs + REG_PCS_MII_STATUS);
drivers/net/ethernet/sun/niu.c
72
return ((u64) readl(reg)) | (((u64) readl(reg + 4UL)) << 32);
drivers/net/ethernet/sun/sungem.c
1104
val = readl(gp->regs + PCS_MIICTRL);
drivers/net/ethernet/sun/sungem.c
1109
while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) {
drivers/net/ethernet/sun/sungem.c
1125
val = readl(gp->regs + PCS_CFG);
drivers/net/ethernet/sun/sungem.c
1132
val = readl(gp->regs + PCS_MIIADV);
drivers/net/ethernet/sun/sungem.c
1140
val = readl(gp->regs + PCS_MIICTRL);
drivers/net/ethernet/sun/sungem.c
1145
val = readl(gp->regs + PCS_CFG);
drivers/net/ethernet/sun/sungem.c
1153
val = readl(gp->regs + PCS_SCTRL);
drivers/net/ethernet/sun/sungem.c
1179
val = readl(gp->regs + GREG_SWRST);
drivers/net/ethernet/sun/sungem.c
1196
val = readl(gp->regs + TXDMA_CFG);
drivers/net/ethernet/sun/sungem.c
1198
val = readl(gp->regs + RXDMA_CFG);
drivers/net/ethernet/sun/sungem.c
1200
val = readl(gp->regs + MAC_TXCFG);
drivers/net/ethernet/sun/sungem.c
1202
val = readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
1205
(void) readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
1220
val = readl(gp->regs + TXDMA_CFG);
drivers/net/ethernet/sun/sungem.c
1222
val = readl(gp->regs + RXDMA_CFG);
drivers/net/ethernet/sun/sungem.c
1224
val = readl(gp->regs + MAC_TXCFG);
drivers/net/ethernet/sun/sungem.c
1226
val = readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
1229
(void) readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
130
cmd = readl(gp->regs + MIF_FRAME);
drivers/net/ethernet/sun/sungem.c
1345
u32 pcs_lpa = readl(gp->regs + PCS_MIILP);
drivers/net/ethernet/sun/sungem.c
1387
val = readl(gp->regs + MAC_TXCFG);
drivers/net/ethernet/sun/sungem.c
1390
val = readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
1393
val = readl(gp->regs + MAC_TXCFG);
drivers/net/ethernet/sun/sungem.c
1396
val = readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
1402
u32 pcs_lpa = readl(gp->regs + PCS_MIILP);
drivers/net/ethernet/sun/sungem.c
1412
val = readl(gp->regs + MAC_MCCFG);
drivers/net/ethernet/sun/sungem.c
1494
u32 val = readl(gp->regs + PCS_MIISTAT);
drivers/net/ethernet/sun/sungem.c
1497
val = readl(gp->regs + PCS_MIISTAT);
drivers/net/ethernet/sun/sungem.c
1659
mifcfg = readl(gp->regs + MIF_CFG);
drivers/net/ethernet/sun/sungem.c
168
cmd = readl(gp->regs + MIF_FRAME);
drivers/net/ethernet/sun/sungem.c
1758
if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN)
drivers/net/ethernet/sun/sungem.c
1919
if (!(readl(gp->regs + GREG_CFG) & GREG_CFG_IBURST)) {
drivers/net/ethernet/sun/sungem.c
1937
gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64;
drivers/net/ethernet/sun/sungem.c
1938
gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64;
drivers/net/ethernet/sun/sungem.c
1941
mif_cfg = readl(gp->regs + MIF_CFG);
drivers/net/ethernet/sun/sungem.c
1960
mif_cfg = readl(gp->regs + MIF_CFG);
drivers/net/ethernet/sun/sungem.c
197
(void)readl(gp->regs + GREG_IMASK); /* write posting */
drivers/net/ethernet/sun/sungem.c
2016
gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64;
drivers/net/ethernet/sun/sungem.c
2017
gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64;
drivers/net/ethernet/sun/sungem.c
2074
mifcfg = readl(gp->regs + MIF_CFG);
drivers/net/ethernet/sun/sungem.c
2091
if ((readl(gp->regs + MAC_XIFCFG) & MAC_XIFCFG_GMII) == 0)
drivers/net/ethernet/sun/sungem.c
2096
(void)readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
2125
(void) readl(gp->regs + MAC_XIFCFG);
drivers/net/ethernet/sun/sungem.c
2402
dev->stats.rx_crc_errors += readl(gp->regs + MAC_FCSERR);
drivers/net/ethernet/sun/sungem.c
2405
dev->stats.rx_frame_errors += readl(gp->regs + MAC_AERR);
drivers/net/ethernet/sun/sungem.c
2408
dev->stats.rx_length_errors += readl(gp->regs + MAC_LERR);
drivers/net/ethernet/sun/sungem.c
2411
dev->stats.tx_aborted_errors += readl(gp->regs + MAC_ECOLL);
drivers/net/ethernet/sun/sungem.c
2413
(readl(gp->regs + MAC_ECOLL) + readl(gp->regs + MAC_LCOLL));
drivers/net/ethernet/sun/sungem.c
2459
rxcfg = readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
2467
while (readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB) {
drivers/net/ethernet/sun/sungem.c
258
u32 pcs_istat = readl(gp->regs + PCS_ISTAT);
drivers/net/ethernet/sun/sungem.c
274
pcs_miistat = readl(gp->regs + PCS_MIISTAT);
drivers/net/ethernet/sun/sungem.c
277
(readl(gp->regs + PCS_MIISTAT) &
drivers/net/ethernet/sun/sungem.c
308
u32 txmac_stat = readl(gp->regs + MAC_TXSTAT);
drivers/net/ethernet/sun/sungem.c
369
if (!(readl(gp->regs + MAC_RXRST) & MAC_RXRST_CMD))
drivers/net/ethernet/sun/sungem.c
381
if (!(readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB))
drivers/net/ethernet/sun/sungem.c
393
if (!(readl(gp->regs + RXDMA_CFG) & RXDMA_CFG_ENABLE))
drivers/net/ethernet/sun/sungem.c
408
if (!(readl(gp->regs + GREG_SWRST) & GREG_SWRST_RXRST))
drivers/net/ethernet/sun/sungem.c
439
if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN)
drivers/net/ethernet/sun/sungem.c
450
val = readl(gp->regs + RXDMA_CFG);
drivers/net/ethernet/sun/sungem.c
453
val = readl(gp->regs + MAC_RXCFG);
drivers/net/ethernet/sun/sungem.c
461
u32 rxmac_stat = readl(gp->regs + MAC_RXSTAT);
drivers/net/ethernet/sun/sungem.c
469
u32 smac = readl(gp->regs + MAC_SMACHINE);
drivers/net/ethernet/sun/sungem.c
495
u32 mac_cstat = readl(gp->regs + MAC_CSTAT);
drivers/net/ethernet/sun/sungem.c
516
u32 mif_status = readl(gp->regs + MIF_STATUS);
drivers/net/ethernet/sun/sungem.c
529
u32 pci_estat = readl(gp->regs + GREG_PCIESTAT);
drivers/net/ethernet/sun/sungem.c
754
gp->dev->name, readl(gp->regs + RXDMA_DONE), gp->rx_new);
drivers/net/ethernet/sun/sungem.c
758
done = readl(gp->regs + RXDMA_DONE);
drivers/net/ethernet/sun/sungem.c
780
done = readl(gp->regs + RXDMA_DONE);
drivers/net/ethernet/sun/sungem.c
915
gp->status = readl(gp->regs + GREG_STAT);
drivers/net/ethernet/sun/sungem.c
930
u32 gem_status = readl(gp->regs + GREG_STAT);
drivers/net/ethernet/sun/sungem.c
959
readl(gp->regs + TXDMA_CFG),
drivers/net/ethernet/sun/sungem.c
960
readl(gp->regs + MAC_TXSTAT),
drivers/net/ethernet/sun/sungem.c
961
readl(gp->regs + MAC_TXCFG));
drivers/net/ethernet/sun/sungem.c
963
readl(gp->regs + RXDMA_CFG),
drivers/net/ethernet/sun/sungem.c
964
readl(gp->regs + MAC_RXSTAT),
drivers/net/ethernet/sun/sungem.c
965
readl(gp->regs + MAC_RXCFG));
drivers/net/ethernet/sun/sunhme.c
186
return readl(reg);
drivers/net/ethernet/sun/sunhme.c
241
readl(__reg)
drivers/net/ethernet/sunplus/spl2sw_driver.c
38
mask = readl(comm->l2sw_reg_base + L2SW_SW_INT_MASK_0);
drivers/net/ethernet/sunplus/spl2sw_int.c
129
mask = readl(comm->l2sw_reg_base + L2SW_SW_INT_MASK_0);
drivers/net/ethernet/sunplus/spl2sw_int.c
202
mask = readl(comm->l2sw_reg_base + L2SW_SW_INT_MASK_0);
drivers/net/ethernet/sunplus/spl2sw_int.c
218
status = readl(comm->l2sw_reg_base + L2SW_SW_INT_STATUS_0);
drivers/net/ethernet/sunplus/spl2sw_int.c
228
mask = readl(comm->l2sw_reg_base + L2SW_SW_INT_MASK_0);
drivers/net/ethernet/sunplus/spl2sw_int.c
248
mask = readl(comm->l2sw_reg_base + L2SW_SW_INT_MASK_0);
drivers/net/ethernet/sunplus/spl2sw_int.c
262
mask = readl(comm->l2sw_reg_base + L2SW_SW_INT_MASK_0);
drivers/net/ethernet/sunplus/spl2sw_mac.c
108
ret = read_poll_timeout(readl, reg, reg & MAC_W_MAC_DONE, 1, 200, true,
drivers/net/ethernet/sunplus/spl2sw_mac.c
116
readl(comm->l2sw_reg_base + L2SW_WT_MAC_AD0),
drivers/net/ethernet/sunplus/spl2sw_mac.c
118
readl(comm->l2sw_reg_base + L2SW_W_MAC_47_16)),
drivers/net/ethernet/sunplus/spl2sw_mac.c
120
readl(comm->l2sw_reg_base + L2SW_W_MAC_15_0)));
drivers/net/ethernet/sunplus/spl2sw_mac.c
129
reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);
drivers/net/ethernet/sunplus/spl2sw_mac.c
153
reg = readl(comm->l2sw_reg_base + L2SW_LED_PORT0);
drivers/net/ethernet/sunplus/spl2sw_mac.c
161
reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);
drivers/net/ethernet/sunplus/spl2sw_mac.c
172
reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0);
drivers/net/ethernet/sunplus/spl2sw_mac.c
179
reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL1);
drivers/net/ethernet/sunplus/spl2sw_mac.c
186
reg = readl(comm->l2sw_reg_base + L2SW_MAC_FORCE_MODE);
drivers/net/ethernet/sunplus/spl2sw_mac.c
208
reg = readl(comm->l2sw_reg_base + L2SW_SW_GLB_CNTL);
drivers/net/ethernet/sunplus/spl2sw_mac.c
227
reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);
drivers/net/ethernet/sunplus/spl2sw_mac.c
243
netdev_dbg(ndev, "cpu_cntl = %08x\n", readl(comm->l2sw_reg_base + L2SW_CPU_CNTL));
drivers/net/ethernet/sunplus/spl2sw_mac.c
26
reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);
drivers/net/ethernet/sunplus/spl2sw_mac.c
32
reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0);
drivers/net/ethernet/sunplus/spl2sw_mac.c
42
reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);
drivers/net/ethernet/sunplus/spl2sw_mac.c
48
reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0);
drivers/net/ethernet/sunplus/spl2sw_mac.c
72
ret = read_poll_timeout(readl, reg, reg & MAC_W_MAC_DONE, 1, 200, true,
drivers/net/ethernet/sunplus/spl2sw_mac.c
80
readl(comm->l2sw_reg_base + L2SW_WT_MAC_AD0),
drivers/net/ethernet/sunplus/spl2sw_mac.c
82
readl(comm->l2sw_reg_base + L2SW_W_MAC_47_16)),
drivers/net/ethernet/sunplus/spl2sw_mac.c
84
readl(comm->l2sw_reg_base + L2SW_W_MAC_15_0)));
drivers/net/ethernet/sunplus/spl2sw_mdio.c
27
reg = readl(comm->l2sw_reg_base + L2SW_MAC_FORCE_MODE);
drivers/net/ethernet/sunplus/spl2sw_mdio.c
42
ret = read_poll_timeout(readl, val, val & cmd, 1, 1000, true,
drivers/net/ethernet/sunplus/spl2sw_mdio.c
49
reg = readl(comm->l2sw_reg_base + L2SW_MAC_FORCE_MODE);
drivers/net/ethernet/sunplus/spl2sw_phy.c
21
reg = readl(comm->l2sw_reg_base + L2SW_MAC_FORCE_MODE);
drivers/net/ethernet/synopsys/dwc-xlgmac-common.c
362
mac_hfr0 = readl(pdata->mac_regs + MAC_HWF0R);
drivers/net/ethernet/synopsys/dwc-xlgmac-common.c
363
mac_hfr1 = readl(pdata->mac_regs + MAC_HWF1R);
drivers/net/ethernet/synopsys/dwc-xlgmac-common.c
364
mac_hfr2 = readl(pdata->mac_regs + MAC_HWF2R);
drivers/net/ethernet/synopsys/dwc-xlgmac-common.c
368
hw_feat->version = readl(pdata->mac_regs + MAC_VR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
114
regval = readl(pdata->mac_regs + MAC_VLANTR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1196
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1207
regval = readl(pdata->mac_regs + reg);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1228
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1239
regval = readl(pdata->mac_regs + reg);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1260
regval = readl(pdata->mac_regs + MAC_RFCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1272
regval = readl(pdata->mac_regs + MAC_RFCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1311
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RIWT));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1333
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1346
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1369
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1389
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
139
regval = readl(pdata->mac_regs + MAC_VLANTR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1408
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_CR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1414
regval = readl(pdata->mac_regs + MAC_RCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1464
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1479
regval = readl(pdata->mac_regs + MTL_OMR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1486
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_TC_ETSCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1491
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_TC_QWR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1498
regval = readl(pdata->mac_regs + MTL_OMR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
151
regval = readl(pdata->mac_regs + MAC_PFR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1522
regval = readl(XLGMAC_MTL_REG(pdata, queue,
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1536
regval = readl(XLGMAC_MTL_REG(pdata, queue,
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
157
regval = readl(pdata->mac_regs + MAC_VLANTR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1586
regval = readl(pdata->mac_regs + reg);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1592
regval = readl(pdata->mac_regs + reg);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1598
regval = readl(pdata->mac_regs + reg);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1641
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1663
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1680
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_RQFCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1698
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1714
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_RQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1730
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1750
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1768
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_CR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1782
regval = readl(XLGMAC_DMA_REG(pdata->channel_head, DMA_CH_TCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1799
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1813
regval = readl(XLGMAC_DMA_REG(pdata->channel_head, DMA_CH_RCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1830
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
184
regval = readl(pdata->mac_regs + MAC_PFR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1858
val = (u64)readl(pdata->mac_regs + reg_lo);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1861
val |= ((u64)readl(pdata->mac_regs + reg_lo + 4) << 32);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1868
unsigned int mmc_isr = readl(pdata->mac_regs + MMC_TISR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
1982
unsigned int mmc_isr = readl(pdata->mac_regs + MMC_RISR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2130
regval = readl(pdata->mac_regs + MMC_CR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2259
regval = readl(pdata->mac_regs + MMC_CR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2269
regval = readl(pdata->mac_regs + MMC_CR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2288
regval = XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + MAC_RSSAR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2297
regval = readl(pdata->mac_regs + MAC_RSSAR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2310
regval = XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + MAC_RSSAR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
234
regval = readl(pdata->mac_regs + MAC_VLANHTR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2406
regval = readl(pdata->mac_regs + MAC_RSSCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2421
regval = readl(pdata->mac_regs + MAC_RSSCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2455
dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
249
regval = XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + MAC_PFR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2519
mtl_q_isr = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_ISR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2539
regval = readl(pdata->mac_regs + MMC_RIER);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2543
regval = readl(pdata->mac_regs + MMC_TIER);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2553
regval = XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + MAC_TCR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2558
regval = readl(pdata->mac_regs + MAC_TCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
257
regval = readl(pdata->mac_regs + MAC_PFR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2570
regval = XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + MAC_TCR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2575
regval = readl(pdata->mac_regs + MAC_TCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2587
regval = XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + MAC_TCR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2592
regval = readl(pdata->mac_regs + MAC_TCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2604
regval = XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + MAC_TCR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2609
regval = readl(pdata->mac_regs + MAC_TCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
279
regval = XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + MAC_PFR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2821
dma_ch_ier = readl(XLGMAC_DMA_REG(channel, DMA_CH_IER));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
287
regval = readl(pdata->mac_regs + MAC_PFR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2884
dma_ch_ier = readl(XLGMAC_DMA_REG(channel, DMA_CH_IER));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2949
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2958
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
2975
regval = readl(pdata->mac_regs + DMA_SBMR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
3047
regval = readl(pdata->mac_regs + DMA_MR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
3055
XLGMAC_GET_REG_BITS(readl(pdata->mac_regs + DMA_MR),
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
381
regval = readl(pdata->mac_regs + MAC_PFR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
399
regval = readl(pdata->mac_regs + MAC_RCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
40
regval = readl(pdata->mac_regs + MAC_RCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
417
regval = readl(pdata->mac_regs + MAC_VLANIR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
481
tx_status = readl(pdata->mac_regs + tx_dsr);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
509
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
517
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
52
regval = readl(pdata->mac_regs + MAC_RCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
525
regval = readl(pdata->mac_regs + MAC_TCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
547
regval = readl(pdata->mac_regs + MAC_TCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
554
regval = readl(XLGMAC_MTL_REG(pdata, i, MTL_Q_TQOMR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
566
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
585
rx_status = readl(XLGMAC_MTL_REG(pdata, queue, MTL_Q_RQDR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
613
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
626
regval = readl(pdata->mac_regs + MAC_RCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
645
regval = readl(pdata->mac_regs + MAC_RCR);
drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c
669
regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR));
drivers/net/ethernet/synopsys/dwc-xlgmac-net.c
265
dma_isr = readl(pdata->mac_regs + DMA_ISR);
drivers/net/ethernet/synopsys/dwc-xlgmac-net.c
277
dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR));
drivers/net/ethernet/synopsys/dwc-xlgmac-net.c
329
mac_isr = readl(pdata->mac_regs + MAC_ISR);
drivers/net/ethernet/tehuti/tehuti.c
109
readl(nic->regs + SROM_VER), readl(nic->regs + FPGA_VER) & 0xFFF,
drivers/net/ethernet/tehuti/tehuti.c
110
readl(nic->regs + FPGA_SEED),
drivers/net/ethernet/tehuti/tehuti.c
117
pr_info("fw 0x%x\n", readl(nic->regs + FW_VER));
drivers/net/ethernet/tehuti/tehuti.c
1953
if ((readl(nic->regs + FPGA_VER) & 0xFFF) >= 378) {
drivers/net/ethernet/tehuti/tehuti.c
1999
if ((readl(nic->regs + FPGA_VER) & 0xFFF) == 308) {
drivers/net/ethernet/tehuti/tehuti.c
458
val = readl(regs + regCLKPLL);
drivers/net/ethernet/tehuti/tehuti.c
461
val = readl(regs + regCLKPLL);
drivers/net/ethernet/tehuti/tehuti.c
466
if ((readl(regs + regCLKPLL) & CLKPLL_LKD) == CLKPLL_LKD) {
drivers/net/ethernet/tehuti/tehuti.c
468
readl(regs + regRXD_CFG0_0);
drivers/net/ethernet/tehuti/tehuti.h
97
#define READ_REG(pp, reg) readl(pp->pBdxRegs + reg)
drivers/net/ethernet/tehuti/tn40.h
250
return readl(priv->regs + reg);
drivers/net/ethernet/tehuti/tn40_mdio.c
37
return readl(regs + TN40_REG_MDIO_CMD_STAT);
drivers/net/ethernet/tehuti/tn40_mdio.c
74
return lower_16_bits(readl(regs + TN40_REG_MDIO_DATA));
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
759
val = readl(port->port_base + AM65_CPSW_PN_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
773
val = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
794
iet_ctrl = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
795
port_ctrl = readl(port->port_base + AM65_CPSW_PN_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
800
iet_status = readl(port->port_base + AM65_CPSW_PN_REG_IET_STATUS);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
856
iet->original_max_blks = readl(port->port_base + AM65_CPSW_PN_REG_MAX_BLKS);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
869
val = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
903
s->MACMergeFrameAssOkCount = readl(base + AM65_CPSW_STATN_IET_RX_ASSEMBLY_OK);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
904
s->MACMergeFrameAssErrorCount = readl(base + AM65_CPSW_STATN_IET_RX_ASSEMBLY_ERROR);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
905
s->MACMergeFrameSmdErrorCount = readl(base + AM65_CPSW_STATN_IET_RX_SMD_ERROR);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
910
s->MACMergeFragCountRx = readl(base + AM65_CPSW_STATN_IET_RX_FRAG) + s->MACMergeFrameAssErrorCount;
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
911
s->MACMergeFragCountTx = readl(base + AM65_CPSW_STATN_IET_TX_FRAG);
drivers/net/ethernet/ti/am65-cpsw-ethtool.c
912
s->MACMergeHoldCount = readl(base + AM65_CPSW_STATN_IET_TX_HOLD);
drivers/net/ethernet/ti/am65-cpsw-nuss.c
1056
reg = readl(common->cpsw_base + AM65_CPSW_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-nuss.c
208
val = readl(slave->port_base + AM65_CPSW_PORTN_REG_DSCP_MAP + reg_ofs);
drivers/net/ethernet/ti/am65-cpsw-nuss.c
274
val = readl(slave->port_base + AM65_CPSW_PORTN_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-nuss.c
290
common->nuss_ver = readl(common->ss_base);
drivers/net/ethernet/ti/am65-cpsw-nuss.c
291
common->cpsw_ver = readl(common->cpsw_base);
drivers/net/ethernet/ti/am65-cpsw-nuss.c
3719
host_p->vid_context = readl(host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
drivers/net/ethernet/ti/am65-cpsw-nuss.c
3727
port->vid_context = readl(port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
drivers/net/ethernet/ti/am65-cpsw-nuss.c
480
val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
325
ctrl = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
330
ctrl = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
337
status = readl(port->port_base + AM65_CPSW_PN_REG_IET_STATUS);
drivers/net/ethernet/ti/am65-cpsw-qos.c
366
val = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
384
val = readl(port->port_base + AM65_CPSW_PN_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
390
val = readl(common->cpsw_base + AM65_CPSW_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
414
val = readl(port->port_base + AM65_CPSW_PN_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
428
val = readl(port->port_base + AM65_CPSW_PN_REG_IET_CTRL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
468
val = readl(common->cpsw_base + AM65_CPSW_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
483
val = readl(port->port_base + AM65_CPSW_PN_REG_CTL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
499
val = readl(port->port_base + AM65_CPSW_PN_REG_EST_CTL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
523
val = readl(port->port_base + AM65_CPSW_PN_REG_FIFO_STATUS);
drivers/net/ethernet/ti/am65-cpsw-qos.c
526
val = readl(port->port_base + AM65_CPSW_PN_REG_EST_CTL);
drivers/net/ethernet/ti/am65-cpsw-qos.c
582
val = readl(port->port_base + AM65_CPSW_PN_REG_EST_CTL);
drivers/net/ethernet/ti/am65-cpsw-switchdev.c
124
pvid = readl(port->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
drivers/net/ethernet/ti/am65-cpsw-switchdev.c
126
pvid = readl(host_p->port_base + AM65_CPSW_PORT_VLAN_REG_OFFSET);
drivers/net/ethernet/ti/am65-cpts.c
204
#define am65_cpts_read32(c, r) readl(&(c)->reg->r)
drivers/net/ethernet/ti/cpsw-phy-sel.c
106
reg = readl(priv->gmii_sel);
drivers/net/ethernet/ti/cpsw-phy-sel.c
47
reg = readl(priv->gmii_sel);
drivers/net/ethernet/ti/cpsw.c
715
control_reg = readl(&cpsw->regs->control);
drivers/net/ethernet/ti/cpsw_ale.c
863
unreg_mcast = readl(ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx));
drivers/net/ethernet/ti/cpsw_ethtool.c
179
int_ctrl = readl(&cpsw->wr_regs->int_control);
drivers/net/ethernet/ti/cpsw_ethtool.c
285
data[l] = readl(cpsw->hw_stats +
drivers/net/ethernet/ti/cpsw_new.c
582
control_reg = readl(&cpsw->regs->control);
drivers/net/ethernet/ti/cpsw_priv.c
449
cpsw->version = readl(&cpsw->regs->id_ver);
drivers/net/ethernet/ti/cpsw_sl.c
199
val = readl(sl->sl_base + sl->regs[reg]);
drivers/net/ethernet/ti/cpsw_switchdev.c
133
pvid = readl(port_vlan_reg);
drivers/net/ethernet/ti/davinci_cpdma.c
173
#define dma_reg_read(ctlr, ofs) readl((ctlr)->dmaregs + (ofs))
drivers/net/ethernet/ti/davinci_cpdma.c
174
#define chan_read(chan, fld) readl((chan)->fld)
drivers/net/ethernet/ti/davinci_cpdma.c
175
#define desc_read(desc, fld) readl(&(desc)->fld)
drivers/net/ethernet/ti/davinci_mdio.c
151
reg = readl(&data->regs->control);
drivers/net/ethernet/ti/davinci_mdio.c
164
reg = readl(&data->regs->poll);
drivers/net/ethernet/ti/davinci_mdio.c
175
reg = readl(&data->regs->manualif);
drivers/net/ethernet/ti/davinci_mdio.c
191
reg = readl(&data->regs->manualif);
drivers/net/ethernet/ti/davinci_mdio.c
207
reg = readl(&data->regs->manualif);
drivers/net/ethernet/ti/davinci_mdio.c
223
reg = readl(&data->regs->manualif);
drivers/net/ethernet/ti/davinci_mdio.c
308
ver = readl(&data->regs->version);
drivers/net/ethernet/ti/davinci_mdio.c
318
phy_mask = readl(&data->regs->alive);
drivers/net/ethernet/ti/davinci_mdio.c
361
reg = readl(®s->user[0].access);
drivers/net/ethernet/ti/davinci_mdio.c
365
reg = readl(®s->control);
drivers/net/ethernet/ti/davinci_mdio.c
381
reg = readl(®s->user[0].access);
drivers/net/ethernet/ti/davinci_mdio.c
434
reg = readl(&data->regs->user[0].access);
drivers/net/ethernet/ti/davinci_mdio.c
683
ctrl = readl(&data->regs->control);
drivers/net/ethernet/ti/icssg/icss_iep.c
165
ts_lo = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG0]);
drivers/net/ethernet/ti/icssg/icss_iep.c
168
ts_hi = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG1]);
drivers/net/ethernet/ti/icssg/icss_iep.c
537
ns = readl(iep->base + reg_offs[ICSS_IEP_CMP1_REG0]);
drivers/net/ethernet/ti/icssg/icss_iep.c
539
val = readl(iep->base + reg_offs[ICSS_IEP_CMP1_REG1]);
drivers/net/ethernet/ti/icssg/icss_iep.c
565
val = readl(iep->base + reg_offs[ICSS_IEP_CMP_STAT_REG]);
drivers/net/ethernet/ti/icssg/icss_iep.c
67
val = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG1]);
drivers/net/ethernet/ti/icssg/icss_iep.c
84
val = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG0]);
drivers/net/ethernet/ti/icssg/icss_iep.c
931
*val = readl(iep->base + iep->plat_data->reg_offs[reg]);
drivers/net/ethernet/ti/icssg/icssg_common.c
667
u32 hi_sw = readl(emac->prueth->shram.va +
drivers/net/ethernet/ti/icssg/icssg_config.c
276
cmd = readl(&p->cmd[i]);
drivers/net/ethernet/ti/icssg/icssg_config.c
816
pvid = readl(prueth->shram.va + EMAC_ICSSG_SWITCH_PORT1_DEFAULT_VLAN_OFFSET);
drivers/net/ethernet/ti/icssg/icssg_config.c
818
pvid = readl(prueth->shram.va + EMAC_ICSSG_SWITCH_PORT2_DEFAULT_VLAN_OFFSET);
drivers/net/ethernet/ti/icssg/icssg_prueth.c
107
hi_sw = readl(emac->prueth->shram.va +
drivers/net/ethernet/ti/icssg/icssg_prueth.c
463
iepcount_hi += readl(fw_count_hi_addr);
drivers/net/ethernet/ti/icssg/icssg_prueth.c
464
hi_rollover_count = readl(fw_hi_r_count_addr);
drivers/net/ethernet/ti/icssg/icssg_prueth.c
470
iepcount_hi_r += readl(fw_count_hi_addr);
drivers/net/ethernet/ti/icssg/icssg_prueth.c
471
hi_rollover_count_r = readl(fw_hi_r_count_addr);
drivers/net/ethernet/ti/icssg/icssg_prueth.h
409
high = readl(addr + 4);
drivers/net/ethernet/ti/icssg/icssg_prueth.h
410
low = readl(addr);
drivers/net/ethernet/ti/icssg/icssg_prueth.h
411
} while (high != readl(addr + 4));
drivers/net/ethernet/ti/icssm/icssm_prueth.c
1372
reg = readl(sram + EMAC_PROMISCUOUS_MODE_OFFSET);
drivers/net/ethernet/ti/icssm/icssm_prueth.c
804
rd_buf_desc = readl(shared_ram + bd_rd_ptr);
drivers/net/ethernet/ti/netcp_core.c
197
addr1 = readl(efuse_mac + 4);
drivers/net/ethernet/ti/netcp_core.c
198
addr0 = readl(efuse_mac);
drivers/net/ethernet/ti/netcp_core.c
203
addr1 = readl(efuse_mac);
drivers/net/ethernet/ti/netcp_ethss.c
1824
gbe_dev->hw_stats_prev[i] = readl(p_stats_entry);
drivers/net/ethernet/ti/netcp_ethss.c
1841
curr = readl(p_stats_entry);
drivers/net/ethernet/ti/netcp_ethss.c
1864
val = readl(GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
drivers/net/ethernet/ti/netcp_ethss.c
2126
val = readl(GBE_REG_ADDR(gbe_dev, ss_regs, rgmii_status));
drivers/net/ethernet/ti/netcp_ethss.c
2202
v = readl(GBE_REG_ADDR(slave, emac_regs, soft_reset));
drivers/net/ethernet/ti/netcp_ethss.c
2224
xgmii_mode = readl(GBE_REG_ADDR(gbe_dev, ss_regs, control));
drivers/net/ethernet/ti/netcp_ethss.c
2897
reg = readl(GBE_REG_ADDR(gbe_dev, switch_regs, id_ver));
drivers/net/ethernet/ti/netcp_ethss.c
3345
gbe_dev->ss_version = readl(gbe_dev->ss_regs);
drivers/net/ethernet/ti/netcp_sgmii.c
38
return readl(base + reg);
drivers/net/ethernet/ti/netcp_sgmii.c
43
writel((readl(base + reg) | val), base + reg);
drivers/net/ethernet/ti/netcp_xgbepcsr.c
212
val_0 = (readl(sw_regs + XGBE_SGMII_1_OFFSET) & BIT(4));
drivers/net/ethernet/ti/netcp_xgbepcsr.c
213
val_1 = (readl(sw_regs + XGBE_SGMII_2_OFFSET) & BIT(4));
drivers/net/ethernet/ti/netcp_xgbepcsr.c
22
writel(((readl(addr) & (~(mask))) | \
drivers/net/ethernet/ti/netcp_xgbepcsr.c
240
tmp = (readl(serdes_regs + 0x0ec) >> 24) & 0x0ff;
drivers/net/ethernet/ti/netcp_xgbepcsr.c
241
tmp |= ((readl(serdes_regs + 0x0fc) >> 16) & 0x00f00);
drivers/net/ethernet/ti/netcp_xgbepcsr.c
243
tmp = (readl(serdes_regs + 0x0f8) >> 16) & 0x0fff;
drivers/net/ethernet/ti/netcp_xgbepcsr.c
318
loss = readl(serdes_regs + 0x1fc0 + 0x20 + (i * 0x04)) & 0x1;
drivers/net/ethernet/ti/netcp_xgbepcsr.c
321
pcsr_rx_stat = readl(pcsr_base + 0x0c + (i * 0x80));
drivers/net/ethernet/ti/netcp_xgbepcsr.c
488
val = readl(serdes_regs + 0xa00);
drivers/net/ethernet/via/via-velocity.c
3114
*((u32 *) (context->mac_reg + i)) = readl(ptr + i);
drivers/net/ethernet/via/via-velocity.c
3117
*((u32 *) (context->mac_reg + i)) = readl(ptr + i);
drivers/net/ethernet/via/via-velocity.c
3120
*((u32 *) (context->mac_reg + i)) = readl(ptr + i);
drivers/net/ethernet/via/via-velocity.h
1147
#define mac_read_isr(regs) readl(&((regs)->ISR))
drivers/net/ethernet/via/via-velocity.h
1499
tmp = readl(&(vptr->mac_regs->MIBData)) & 0x00FFFFFFUL;
drivers/net/ethernet/via/via-velocity.h
36
#define DWORD_REG_BITS_ON(x,p) do { writel(readl((p))|(x),(p));} while (0)
drivers/net/ethernet/via/via-velocity.h
40
#define DWORD_REG_BITS_IS_ON(x,p) (readl((p)) & (x))
drivers/net/ethernet/via/via-velocity.h
44
#define DWORD_REG_BITS_OFF(x,p) do { writel(readl((p)) & (~(x)),(p));} while (0)
drivers/net/ethernet/via/via-velocity.h
48
#define DWORD_REG_BITS_SET(x,m,p) do { writel( (readl((p)) & (~(m)))|(x),(p));} while (0)
drivers/net/ethernet/wangxun/libwx/wx_type.h
1410
#define rd32(a, reg) readl((a)->hw_addr + (reg))
drivers/net/ethernet/wangxun/libwx/wx_vf.c
81
b4_buf[i] = readl(wx->b4_addr + i * 4);
drivers/net/fddi/defxx.c
389
*data = readl(bp->base.mem + offset);
drivers/net/fjes/fjes_hw.c
28
value = readl(&base[reg]);
drivers/net/mdio/mdio-bcm-iproc.c
47
val = readl(base + MII_CTRL_OFFSET);
drivers/net/mdio/mdio-bcm-iproc.c
89
cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
drivers/net/mdio/mdio-hisi-femac.c
52
return readl(data->membase + MDIO_RO_DATA) & 0xFFFF;
drivers/net/mdio/mdio-ipq4019.c
107
return readl(priv->membase + MDIO_DATA_READ_REG);
drivers/net/mdio/mdio-ipq4019.c
119
data = readl(priv->membase + MDIO_MODE_REG);
drivers/net/mdio/mdio-ipq4019.c
138
return readl(priv->membase + MDIO_DATA_READ_REG);
drivers/net/mdio/mdio-ipq4019.c
151
data = readl(priv->membase + MDIO_MODE_REG);
drivers/net/mdio/mdio-ipq4019.c
194
data = readl(priv->membase + MDIO_MODE_REG);
drivers/net/mdio/mdio-ipq4019.c
237
val = readl(priv->membase + MDIO_MODE_REG);
drivers/net/mdio/mdio-ipq4019.c
260
val = readl(priv->eth_ldo_rdy);
drivers/net/mdio/mdio-ipq4019.c
299
val = readl(priv->membase + MDIO_MODE_REG);
drivers/net/mdio/mdio-ipq4019.c
78
data = readl(priv->membase + MDIO_MODE_REG);
drivers/net/mdio/mdio-moxart.c
47
ctrl = readl(data->base + REG_PHY_CTRL);
drivers/net/mdio/mdio-moxart.c
79
ctrl = readl(data->base + REG_PHY_CTRL);
drivers/net/mdio/mdio-mux-bcm-iproc.c
114
param = readl(base + MDIO_PARAM_OFFSET);
drivers/net/mdio/mdio-mux-bcm-iproc.c
131
ret = readl(base + MDIO_READ_OFFSET) & MDIO_READ_DATA_MASK;
drivers/net/mdio/mdio-mux-bcm-iproc.c
65
val = readl(md->base + MDIO_SCAN_CTRL_OFFSET);
drivers/net/mdio/mdio-mux-meson-g12a.c
109
val = readl(pll->base + ETH_PLL_CTL0);
drivers/net/mdio/mdio-mux-meson-g12a.c
120
val = readl(pll->base + ETH_PLL_CTL0);
drivers/net/mdio/mdio-mux-meson-g12a.c
75
val = readl(pll->base + ETH_PLL_CTL0);
drivers/net/mdio/mdio-mux-meson-g12a.c
85
u32 val = readl(pll->base + ETH_PLL_CTL0);
drivers/net/mdio/mdio-sun4i.c
49
while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) {
drivers/net/mdio/mdio-sun4i.c
58
value = readl(data->membase + EMAC_MAC_MRDD_REG);
drivers/net/mdio/mdio-sun4i.c
76
while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) {
drivers/net/pcs/pcs-rzn1-miic.c
305
return readl(miic->base + offset);
drivers/net/pcs/pcs-xpcs-plat.c
127
ret = readl(pxpcs->reg_base + (csr << 2)) & 0xffff;
drivers/net/pcs/pcs-xpcs-plat.c
69
ret = readl(pxpcs->reg_base + (ofs << 2)) & 0xffff;
drivers/net/vmxnet3/vmxnet3_int.h
463
readl((adapter)->hw_addr0 + (reg))
drivers/net/vmxnet3/vmxnet3_int.h
468
readl((adapter)->hw_addr1 + (reg))
drivers/net/wan/farsync.c
494
#define FST_RDL(C, E) (readl((C)->mem + WIN_OFFSET(E)))
drivers/net/wan/hd64570.c
703
if (readl(rambase + i % size) != (i ^ 0x12345678))
drivers/net/wan/hd64572.c
52
#define sca_inl(reg, card) readl((card)->scabase + (reg))
drivers/net/wan/hd64572.c
616
if (readl(rambase + i) != (i ^ 0x12345678))
drivers/net/wan/pc300too.c
336
card->init_ctrl_value = readl(&((plx9050 __iomem *)card->scabase)->init_ctrl);
drivers/net/wan/pc300too.c
365
readl(p); /* Flush the write - do not use sca_flush */
drivers/net/wan/pc300too.c
369
readl(p); /* Flush the write - do not use sca_flush */
drivers/net/wan/pc300too.c
374
readl(p); /* Flush the write - do not use sca_flush */
drivers/net/wan/pc300too.c
378
readl(p); /* Flush the write - do not use sca_flush */
drivers/net/wan/pci200syn.c
324
writel(readl(p) | 0x40000000, p);
drivers/net/wan/pci200syn.c
325
readl(p); /* Flush the write - do not use sca_flush */
drivers/net/wan/pci200syn.c
328
writel(readl(p) & ~0x40000000, p);
drivers/net/wan/pci200syn.c
329
readl(p); /* Flush the write - do not use sca_flush */
drivers/net/wan/wanxl.c
264
while ((stat = readl(card->plx + PLX_DOORBELL_FROM_CARD)) != 0) {
drivers/net/wan/wanxl.c
482
if (readl(card->plx + PLX_MAILBOX_1) == 0)
drivers/net/wan/wanxl.c
493
u32 old_value = readl(card->plx + PLX_CONTROL) & ~PLX_CTL_RESET;
drivers/net/wan/wanxl.c
497
readl(card->plx + PLX_CONTROL); /* wait for posted write */
drivers/net/wan/wanxl.c
500
readl(card->plx + PLX_CONTROL); /* wait for posted write */
drivers/net/wan/wanxl.c
651
while ((stat = readl(card->plx + PLX_MAILBOX_0)) != 0) {
drivers/net/wan/wanxl.c
675
ramsize = readl(card->plx + PLX_MAILBOX_2) & MBX2_MEMSZ_MASK;
drivers/net/wan/wanxl.c
735
stat = readl(card->plx + PLX_MAILBOX_5);
drivers/net/wireless/ath/ath11k/mhi.c
300
*out = readl(addr);
drivers/net/wireless/ath/ath12k/mhi.c
175
*out = readl(addr);
drivers/net/wireless/ath/wcn36xx/dxe.c
50
*data = readl(wcn->dxe_base + addr);
drivers/net/wireless/ath/wil6210/debugfs.c
106
v = readl(x);
drivers/net/wireless/ath/wil6210/debugfs.c
405
*val = readl((void __iomem *)d->offset);
drivers/net/wireless/ath/wil6210/debugfs.c
603
seq_printf(s, "[0x%08x] = 0x%08x\n", mem_addr, readl(a));
drivers/net/wireless/ath/wil6210/fw_inc.c
381
x = readl(dst);
drivers/net/wireless/ath/wil6210/fw_inc.c
410
} while (readl(gwa_ctl) & WIL_FW_GW_CTL_BUSY); /* gw done? */
drivers/net/wireless/ath/wil6210/interrupt.c
68
u32 x = readl(addr);
drivers/net/wireless/ath/wil6210/interrupt.c
841
u32 x = readl(addr);
drivers/net/wireless/ath/wil6210/wil6210.h
1127
return readl(wil->csr + HOSTADDR(reg));
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8468
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8470
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8474
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8476
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8480
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8482
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8484
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8496
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8501
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8503
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8507
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8509
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8513
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8515
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2100.c
8520
readl(reg);
drivers/net/wireless/intel/ipw2x00/ipw2200.c
383
return readl(ipw->hw_base + ofs);
drivers/net/wireless/intel/iwlegacy/common.h
2008
return readl(il->hw_base + ofs);
drivers/net/wireless/intel/iwlwifi/pcie/drv.c
1176
hw_rev = readl(hw_base + CSR_HW_REV);
drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c
1878
return readl(IWL_TRANS_GET_PCIE_TRANS(trans)->hw_base + ofs);
drivers/net/wireless/mediatek/mt76/dma.h
111
#define Q_READ(_q, _field) readl(&(_q)->regs->_field)
drivers/net/wireless/mediatek/mt76/dma.h
59
_val = readl(&(_q)->regs->_field); \
drivers/net/wireless/mediatek/mt76/dma.h
88
_val = readl(&(_q)->regs->_field); \
drivers/net/wireless/mediatek/mt76/mmio.c
14
val = readl(dev->mmio.regs + offset);
drivers/net/wireless/mediatek/mt76/mmio.c
49
put_unaligned_le32(readl(dev->mmio.regs + offset + i),
drivers/net/wireless/mediatek/mt76/mt7603/mac.c
1542
dma_idx = readl(&q->regs->dma_idx);
drivers/net/wireless/mediatek/mt76/mt7603/mac.c
1546
dma_idx != readl(&q->regs->cpu_idx))
drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c
360
dma_idx = readl(&q->regs->dma_idx);
drivers/net/wireless/mediatek/mt76/mt7915/pci.c
39
val = readl(hif->regs + MT_PCIE_RECOG_ID);
drivers/net/wireless/mediatek/mt76/mt7915/soc.c
165
val |= readl(base + offset) & ~mask;
drivers/net/wireless/mediatek/mt76/mt7915/soc.c
179
val = readl(dev->sku + MT_TOP_POS_SKU);
drivers/net/wireless/mediatek/mt76/mt7915/soc.c
240
ret = read_poll_timeout(readl, cur, !(cur & MT_INFRACFG_RX_EN_MASK),
drivers/net/wireless/mediatek/mt76/mt7915/soc.c
249
ret = read_poll_timeout(readl, cur, !(cur & MT_INFRACFG_TX_RDY_MASK),
drivers/net/wireless/mediatek/mt76/mt7996/pci.c
40
val = readl(hif->regs + MT_PCIE_RECOG_ID);
drivers/net/wireless/quantenna/qtnfmac/pcie/pcie_priv.h
87
readl(basereg);
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
172
cfg = readl(reg);
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
200
u32 s = readl(reg);
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
207
u32 s = readl(reg);
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
214
u32 s = readl(reg);
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
386
val = readl(PCIE_HHBM_CONFIG(ps->pcie_reg_base));
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
477
tx_done_index = readl(PCIE_HDP_RX0DMA_CNT(ps->pcie_reg_base))
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
651
status = readl(PCIE_HDP_INT_STATUS(ps->pcie_reg_base));
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
855
u32 reg = readl(PCIE_HDP_INT_EN(ps->pcie_reg_base));
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
888
readl(PCIE_HDP_RX0DMA_CNT(ps->pcie_reg_base))
drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c
897
readl(PCIE_HDP_TX0DMA_CNT(ps->pcie_reg_base))
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
1038
int bootloader_needed = readl(&ts->bda->bda_flags) & QTN_BDA_XMIT_UBOOT;
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
108
cfg = readl(reg);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
116
u32 cfg = readl(reg);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
133
ts->dma_msi_imwr = readl(reg);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
160
u32 s = readl(reg);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
404
tx_done_index = readl(ts->ep_next_rx_pkt);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
472
ready = readl(ts->txqueue_wake);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
770
u32 tx_done_index = readl(ts->ep_next_rx_pkt);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
803
u32 offset = readl(&bda->bda_dma_offset);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
825
while (readl(&bda->bda_pci_post_status) !=
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
838
endian = readl(&bda->bda_pci_endian);
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
867
flags = readl(&bda->bda_flags) | QTN_BDA_HOST_QLINK_DRV;
drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c
940
offset = readl(&bda->bda_dma_offset);
drivers/net/wireless/quantenna/qtnfmac/qtn_hw_ids.h
30
u32 board_rev = readl(regs_base + QTN_REG_SYS_CTRL_CSR);
drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c
14
const u32 flags = readl(&ipc->shm_region->headroom.hdr.flags);
drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c
147
readl(&shm_reg_hdr->flags); /* flush PCIe write */
drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c
41
readl(&shm_reg_hdr->flags); /* flush PCIe write */
drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c
59
flags = readl(&ipc->shm_region->headroom.hdr.flags);
drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c
72
flags = readl(&ipc->shm_region->headroom.hdr.flags);
drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h
24
return readl(rt2x00dev->csr.base + offset);
drivers/net/wireless/realtek/rtlwifi/pci.h
255
return readl((u8 __iomem *)rtlpriv->io.pci_mem_start + addr);
drivers/net/wireless/realtek/rtw88/pci.c
69
return readl(rtwpci->mmap + addr);
drivers/net/wireless/realtek/rtw89/pci.c
2001
u32 val = readl(rtwpci->mmap + addr);
drivers/net/wireless/realtek/rtw89/pci.c
2012
val = readl(rtwpci->mmap + addr);
drivers/net/wireless/realtek/rtw89/pci.c
2051
return readl(rtwpci->mmap + addr);
drivers/ntb/hw/amd/ntb_hw_amd.c
1018
reg = readl(mmio + AMD_SIDEINFO_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
1035
reg = readl(mmio + AMD_SIDEINFO_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
1039
readl(mmio + AMD_SIDEINFO_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
1050
ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
1062
ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
1108
info = readl(mmio + AMD_SIDEINFO_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
187
reg_val = readl(peer_mmio + limit_reg);
drivers/ntb/hw/amd/ntb_hw_amd.c
506
return readl(mmio + AMD_SPAD_OFFSET + offset);
drivers/ntb/hw/amd/ntb_hw_amd.c
535
return readl(mmio + AMD_SPAD_OFFSET + offset);
drivers/ntb/hw/amd/ntb_hw_amd.c
583
reg = readl(mmio + AMD_SMUACK_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
594
status = readl(mmio + AMD_INTSTAT_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
637
status = readl(mmio + AMD_PMESTAT_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
904
u.v32 = readl(ndev->self_mmio + AMD_DBMASK_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
908
u.v32 = readl(mmio + AMD_DBSTAT_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
927
u.v32 = readl(mmio + AMD_BAR1LMT_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.c
980
reg = readl(mmio + AMD_SIDEINFO_OFFSET);
drivers/ntb/hw/amd/ntb_hw_amd.h
70
low = readl(mmio);
drivers/ntb/hw/amd/ntb_hw_amd.h
71
high = readl(mmio + sizeof(u32));
drivers/ntb/hw/epf/ntb_hw_epf.c
216
offset = readl(ndev->ctrl_reg + NTB_EPF_SPAD_OFFSET);
drivers/ntb/hw/epf/ntb_hw_epf.c
219
return readl(ndev->ctrl_reg + offset);
drivers/ntb/hw/epf/ntb_hw_epf.c
234
offset = readl(ndev->ctrl_reg + NTB_EPF_SPAD_OFFSET);
drivers/ntb/hw/epf/ntb_hw_epf.c
258
return readl(ndev->peer_spad_reg + offset);
drivers/ntb/hw/epf/ntb_hw_epf.c
458
offset = readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET);
drivers/ntb/hw/epf/ntb_hw_epf.c
488
db_entry_size = readl(ndev->ctrl_reg + NTB_EPF_DB_ENTRY_SIZE);
drivers/ntb/hw/epf/ntb_hw_epf.c
490
db_data = readl(ndev->ctrl_reg + NTB_EPF_DB_DATA(interrupt_num));
drivers/ntb/hw/epf/ntb_hw_epf.c
491
db_offset = readl(ndev->ctrl_reg + NTB_EPF_DB_OFFSET(interrupt_num));
drivers/ntb/hw/epf/ntb_hw_epf.c
564
ndev->mw_count = readl(ndev->ctrl_reg + NTB_EPF_MW_COUNT);
drivers/ntb/hw/epf/ntb_hw_epf.c
565
ndev->spad_count = readl(ndev->ctrl_reg + NTB_EPF_SPAD_COUNT);
drivers/ntb/hw/epf/ntb_hw_epf.c
622
spad_sz = 4 * readl(ndev->ctrl_reg + NTB_EPF_SPAD_COUNT);
drivers/ntb/hw/epf/ntb_hw_epf.c
623
spad_off = readl(ndev->ctrl_reg + NTB_EPF_SPAD_OFFSET);
drivers/nvme/host/apple.c
1062
if (!(readl(anv->mmio_coproc + APPLE_ANS_COPROC_CPU_CONTROL) &
drivers/nvme/host/apple.c
1135
writel(readl(anv->mmio_nvme + APPLE_ANS_UNKNOWN_CTRL) &
drivers/nvme/host/apple.c
1245
*val = readl(ctrl_to_apple_nvme(ctrl)->mmio_nvme + off);
drivers/nvme/host/apple.c
288
if (readl(anv->mmio_nvme + APPLE_NVMMU_TCB_STAT))
drivers/nvme/host/apple.c
839
u32 csts = readl(anv->mmio_nvme + NVME_REG_CSTS);
drivers/nvme/host/apple.c
921
u32 csts = readl(anv->mmio_nvme + NVME_REG_CSTS);
drivers/nvme/host/pci.c
1703
readl(dev->bar + NVME_REG_CSTS);
drivers/nvme/host/pci.c
1852
u32 csts = readl(dev->bar + NVME_REG_CSTS);
drivers/nvme/host/pci.c
2310
dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ?
drivers/nvme/host/pci.c
2314
(readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO))
drivers/nvme/host/pci.c
2440
dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ);
drivers/nvme/host/pci.c
2443
dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC);
drivers/nvme/host/pci.c
3169
if (readl(dev->bar + NVME_REG_CSTS) == -1) {
drivers/nvme/host/pci.c
3258
csts = readl(dev->bar + NVME_REG_CSTS);
drivers/nvme/host/pci.c
3464
*val = readl(to_nvme_dev(ctrl)->bar + off);
drivers/nvmem/bcm-ocotp.c
108
status = readl(base + OTPC_CPU_STATUS_OFFSET);
drivers/nvmem/bcm-ocotp.c
171
*buf++ = readl(priv->base +
drivers/nvmem/bcm-ocotp.c
267
writel(readl(priv->base + OTPC_MODE_REG_OFFSET) |
drivers/nvmem/imx-iim.c
47
*buf8++ = readl(iim->base + IIM_BANK_BASE(bank) + reg * 4);
drivers/nvmem/imx-ocotp.c
115
c = readl(base + IMX_OCOTP_ADDR_CTRL);
drivers/nvmem/imx-ocotp.c
151
c = readl(base + IMX_OCOTP_ADDR_CTRL);
drivers/nvmem/imx-ocotp.c
197
*(u32 *)buf = readl(priv->base + IMX_OCOTP_OFFSET_B0W0 +
drivers/nvmem/imx-ocotp.c
284
timing = readl(priv->base + IMX_OCOTP_ADDR_TIMING) & 0x0FC00000;
drivers/nvmem/imx-ocotp.c
378
ctrl = readl(priv->base + IMX_OCOTP_ADDR_CTRL);
drivers/nvmem/lan9662-otpc.c
113
pass = readl(OTP_OTP_PASS_FAIL(otp->base));
drivers/nvmem/lan9662-otpc.c
52
writel(readl(pwrdn) & ~OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn);
drivers/nvmem/lan9662-otpc.c
57
writel(readl(pwrdn) | OTP_OTP_PWR_DN_OTP_PWRDN_N, pwrdn);
drivers/nvmem/lan9662-otpc.c
92
pass = readl(OTP_OTP_PASS_FAIL(otp->base));
drivers/nvmem/lan9662-otpc.c
95
*dst = (u8) readl(OTP_OTP_RD_DATA(otp->base));
drivers/nvmem/lpc18xx_eeprom.c
141
*(u32 *)val = readl(eeprom->mem_base + offset);
drivers/nvmem/lpc18xx_eeprom.c
63
return readl(eeprom->reg_base + reg);
drivers/nvmem/lpc18xx_otp.c
53
*buf++ = readl(otp->base + i * LPC18XX_OTP_WORD_SIZE);
drivers/nvmem/meson-mx-efuse.c
117
readl(efuse->base + MESON_MX_EFUSE_CNTL1);
drivers/nvmem/meson-mx-efuse.c
129
*value = readl(efuse->base + MESON_MX_EFUSE_CNTL2);
drivers/nvmem/meson-mx-efuse.c
54
data = readl(efuse->base + reg);
drivers/nvmem/mxs-ocotp.c
43
status = readl(otp->base);
drivers/nvmem/mxs-ocotp.c
91
*buf++ = readl(otp->base + offset);
drivers/nvmem/qfprom.c
227
old->timer_val = readl(priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
drivers/nvmem/qfprom.c
228
old->accel_val = readl(priv->qfpconf + QFPROM_ACCEL_OFFSET);
drivers/nvmem/qfprom.c
333
*val++ = readl(base + reg + i * sizeof(u32));
drivers/nvmem/qfprom.c
426
version = readl(priv->qfpsecurity + QFPROM_VERSION_OFFSET);
drivers/nvmem/rockchip-efuse.c
129
status = readl(efuse->base + RK3328_INT_STATUS);
drivers/nvmem/rockchip-efuse.c
134
out_value = readl(efuse->base + RK3328_DOUT);
drivers/nvmem/rockchip-efuse.c
181
writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
drivers/nvmem/rockchip-efuse.c
185
out_value = readl(efuse->base + REG_EFUSE_DOUT);
drivers/nvmem/rockchip-efuse.c
186
writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
drivers/nvmem/rockchip-efuse.c
71
writel(readl(efuse->base + REG_EFUSE_CTRL) &
drivers/nvmem/rockchip-efuse.c
74
writel(readl(efuse->base + REG_EFUSE_CTRL) |
drivers/nvmem/rockchip-efuse.c
78
writel(readl(efuse->base + REG_EFUSE_CTRL) |
drivers/nvmem/rockchip-efuse.c
82
writel(readl(efuse->base + REG_EFUSE_CTRL) &
drivers/nvmem/rockchip-otp.c
218
data = readl(otp->base + RK3588_OTPC_DOUT0);
drivers/nvmem/sprd-efuse.c
108
u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);
drivers/nvmem/sprd-efuse.c
133
u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
drivers/nvmem/sprd-efuse.c
148
u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
drivers/nvmem/sprd-efuse.c
160
u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
drivers/nvmem/sprd-efuse.c
172
u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
drivers/nvmem/sprd-efuse.c
184
u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);
drivers/nvmem/sprd-efuse.c
234
status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
drivers/nvmem/sprd-efuse.c
269
*val = readl(efuse->base + SPRD_EFUSE_MEM(blk));
drivers/nvmem/sprd-efuse.c
281
status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
drivers/nvmem/sunplus-ocotp.c
102
writel((readl(otp->base[OTPRX] + OTP_CONTROL_2) & OTP_RD_PERIOD_MASK) | CPU_CLOCK,
drivers/nvmem/sunplus-ocotp.c
111
*value = (readl(otp->base[HB_GPIO] + ADDRESS_8_DATA + addr_data * OTP_WORD_SIZE)
drivers/nvmem/sunplus-ocotp.c
94
writel(readl(otp->base[OTPRX] + OTP_STATUS) & OTP_READ_DONE_MASK &
drivers/nvmem/sunplus-ocotp.c
97
writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) | OTP_READ,
drivers/nvmem/sunplus-ocotp.c
99
writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) & SEL_BAK_KEY2_MASK & SW_TRIM_EN_MASK
drivers/nvmem/sunxi_sid.c
81
*out = readl(sid->base + SUN8I_SID_RDKEY);
drivers/nvmem/vf610-ocotp.c
101
while ((readl(base) & OCOTP_CTRL_BUSY) && --timeout)
drivers/nvmem/vf610-ocotp.c
163
reg = readl(base + OCOTP_CTRL_REG);
drivers/nvmem/vf610-ocotp.c
175
if (readl(base) & OCOTP_CTRL_ERR) {
drivers/nvmem/vf610-ocotp.c
186
*buf = readl(base + OCOTP_READ_FUSE_DATA);
drivers/opp/ti-opp-supply.c
145
tmp = readl(base + efuse_offset);
drivers/parisc/dino.c
193
*val = readl(base_addr + DINO_CONFIG_DATA);
drivers/parisc/iosapic.c
176
return readl(iosapic + IOSAPIC_REG_WINDOW);
drivers/parisc/iosapic.c
537
dp0 = readl(isp->addr+IOSAPIC_REG_WINDOW);
drivers/parisc/iosapic.c
542
dp1 = readl(isp->addr+IOSAPIC_REG_WINDOW);
drivers/parisc/iosapic.c
623
printk(" %x", readl(t));
drivers/parisc/lba_pci.c
137
#define READ_REG32(addr) readl(addr)
drivers/parisc/sba_iommu.c
133
#define READ_REG32(addr) readl(addr)
drivers/pci/access.c
102
*val = readl(addr);
drivers/pci/access.c
137
*val = readl(addr);
drivers/pci/access.c
178
tmp = readl(addr) & mask;
drivers/pci/controller/cadence/pci-j721e.c
85
return readl(pcie->user_cfg_base + offset);
drivers/pci/controller/cadence/pci-j721e.c
96
return readl(pcie->intd_cfg_base + offset);
drivers/pci/controller/cadence/pci-sky1.c
101
val = readl(pcie->strap_base + STRAP_REG(1));
drivers/pci/controller/cadence/pci-sky1.c
113
val = readl(pcie->strap_base + STRAP_REG(1));
drivers/pci/controller/cadence/pcie-cadence.h
228
return readl(pcie->reg_base + reg);
drivers/pci/controller/cadence/pcie-cadence.h
249
return readl(pcie->reg_base + reg);
drivers/pci/controller/cadence/pcie-cadence.h
287
u32 val = readl(aligned_addr);
drivers/pci/controller/cadence/pcie-cadence.h
318
val = readl(aligned_addr) & mask;
drivers/pci/controller/cadence/pcie-cadence.h
402
return readl(pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg);
drivers/pci/controller/dwc/pci-dra7xx.c
107
return readl(pcie->base + offset);
drivers/pci/controller/dwc/pci-exynos.c
68
return readl(base + reg);
drivers/pci/controller/dwc/pci-keystone.c
145
return readl(ks_pcie->va_app_base + offset);
drivers/pci/controller/dwc/pci-meson.c
234
return readl(mp->cfg_base + reg);
drivers/pci/controller/dwc/pcie-artpec6.c
162
val = readl(artpec6_pcie->phy_base + PHY_STATUS);
drivers/pci/controller/dwc/pcie-bt1.c
180
*val = readl(addr - ofs) >> ofs * BITS_PER_BYTE;
drivers/pci/controller/dwc/pcie-bt1.c
207
tmp = readl(addr - ofs) & ~(mask << ofs * BITS_PER_BYTE);
drivers/pci/controller/dwc/pcie-designware-ep.c
1018
readl(ep->msi_mem + offset);
drivers/pci/controller/dwc/pcie-designware.c
352
*val = readl(addr);
drivers/pci/controller/dwc/pcie-histb.c
69
return readl(histb_pcie->ctrl + reg);
drivers/pci/controller/dwc/pcie-intel-gw.c
76
old = readl(base + ofs);
drivers/pci/controller/dwc/pcie-keembay.c
109
val = readl(pcie->apb_base + PCIE_REGS_PCIE_SII_PM_STATE);
drivers/pci/controller/dwc/pcie-keembay.c
253
val = readl(pcie->apb_base + PCIE_REGS_INTERRUPT_STATUS);
drivers/pci/controller/dwc/pcie-keembay.c
254
mask = readl(pcie->apb_base + PCIE_REGS_INTERRUPT_ENABLE);
drivers/pci/controller/dwc/pcie-keembay.c
363
val = readl(pcie->apb_base + PCIE_REGS_PCIE_PHY_CNTL);
drivers/pci/controller/dwc/pcie-keembay.c
373
val = readl(pcie->apb_base + PCIE_REGS_PCIE_CFG);
drivers/pci/controller/dwc/pcie-keembay.c
384
val = readl(pcie->apb_base + PCIE_REGS_INTERRUPT_ENABLE);
drivers/pci/controller/dwc/pcie-keembay.c
96
val = readl(pcie->apb_base + PCIE_REGS_PCIE_APP_CNTRL);
drivers/pci/controller/dwc/pcie-kirin.c
146
return readl(hi3660_pcie_phy->base + reg);
drivers/pci/controller/dwc/pcie-nxp-s32g.c
61
return readl(s32g_pp->ctrl_base + reg);
drivers/pci/controller/dwc/pcie-qcom.c
1004
val = readl(pcie->parf + PARF_SYS_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
1008
val = readl(pcie->parf + PARF_MHI_CLOCK_RESET_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
1013
val = readl(pcie->parf + PARF_PM_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
1019
val = readl(pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT_V2);
drivers/pci/controller/dwc/pcie-qcom.c
1094
val = readl(pcie->parf + PARF_BDF_TO_SID_CFG);
drivers/pci/controller/dwc/pcie-qcom.c
1123
val = readl(bdf_to_sid_base + hash * sizeof(u32));
drivers/pci/controller/dwc/pcie-qcom.c
1136
val = readl(bdf_to_sid_base + hash * sizeof(u32));
drivers/pci/controller/dwc/pcie-qcom.c
1211
val = readl(pcie->parf + PARF_PHY_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
1235
val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP);
drivers/pci/controller/dwc/pcie-qcom.c
346
val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP);
drivers/pci/controller/dwc/pcie-qcom.c
360
val = readl(pci->dbi_base + offset + PCI_EXP_SLTCAP);
drivers/pci/controller/dwc/pcie-qcom.c
421
val = readl(pci->elbi_base + ELBI_SYS_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
516
val = readl(pcie->parf + PARF_PHY_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
538
val = readl(pcie->parf + PARF_PHY_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
545
val = readl(pcie->parf + PARF_PHY_REFCLK);
drivers/pci/controller/dwc/pcie-qcom.c
635
u32 val = readl(pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT);
drivers/pci/controller/dwc/pcie-qcom.c
651
val = readl(pcie->parf + PARF_LTSSM);
drivers/pci/controller/dwc/pcie-qcom.c
715
val = readl(pcie->parf + PARF_PHY_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
722
val = readl(pcie->parf + PARF_SYS_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
726
val = readl(pcie->parf + PARF_MHI_CLOCK_RESET_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
730
val = readl(pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT_V2);
drivers/pci/controller/dwc/pcie-qcom.c
901
val = readl(pcie->parf + PARF_PHY_CTRL);
drivers/pci/controller/dwc/pcie-qcom.c
919
val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP);
drivers/pci/controller/dwc/pcie-qcom.c
997
val = readl(pcie->parf + PARF_PHY_CTRL);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
197
val = readl(rcar->base + PCIEMSR0);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
332
val = readl(rcar->base + PCIEINTSTS0EN);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
566
val = readl(rcar->base + PCIERSTCTRL1);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
595
val = readl(rcar->base + PCIEPWRMNGCTRL);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
605
tmp = readl(rcar->phy_base + offset);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
697
val = readl(rcar->base + PCIERSTCTRL1);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
708
val = readl(rcar->base + PCIEMSR0);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
731
val = readl(rcar->base + PCIERSTCTRL1);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
743
val = readl(rcar->base + PCIERSTCTRL1);
drivers/pci/controller/dwc/pcie-rcar-gen4.c
95
val = readl(rcar->base + PCIEINTSTS0);
drivers/pci/controller/dwc/pcie-spear13xx.c
109
writel(readl(&app_reg->int_mask) |
drivers/pci/controller/dwc/pcie-spear13xx.c
118
return readl(&app_reg->app_status_1) & XMLH_LINK_UP;
drivers/pci/controller/dwc/pcie-spear13xx.c
91
status = readl(&app_reg->int_sts);
drivers/pci/controller/dwc/pcie-tegra194.c
1597
data = readl(pcie->appl_base + APPL_CTRL);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
108
val = readl(priv->base + PCL_RSTCTRL2);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
121
val = readl(priv->base + PCL_MODE);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
126
val = readl(priv->base + PCL_APP_CLK_CTRL);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
131
val = readl(priv->base + PCL_RSTCTRL0);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
146
val = readl(priv->base + PCL_MODE);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
151
val = readl(priv->base + PCL_APP_PM0);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
156
val = readl(priv->base + PCL_PINCTRL0);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
168
val = readl(priv->base + PCL_PINCTRL0);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
227
val = readl(priv->base + PCL_APP_INTX);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
251
val = readl(priv->base + PCL_APP_MSI1);
drivers/pci/controller/dwc/pcie-uniphier-ep.c
95
val = readl(priv->base + PCL_APP_READY_CTRL);
drivers/pci/controller/dwc/pcie-uniphier.c
104
val = readl(pcie->base + PCL_PINCTRL0);
drivers/pci/controller/dwc/pcie-uniphier.c
116
val = readl(pcie->base + PCL_PINCTRL0);
drivers/pci/controller/dwc/pcie-uniphier.c
143
val = readl(pcie->base + PCL_STATUS_LINK);
drivers/pci/controller/dwc/pcie-uniphier.c
182
val = readl(pcie->base + PCL_RCV_INTX);
drivers/pci/controller/dwc/pcie-uniphier.c
199
val = readl(pcie->base + PCL_RCV_INTX);
drivers/pci/controller/dwc/pcie-uniphier.c
236
val = readl(pcie->base + PCL_RCV_INT);
drivers/pci/controller/dwc/pcie-uniphier.c
252
val = readl(pcie->base + PCL_RCV_INTX);
drivers/pci/controller/dwc/pcie-uniphier.c
80
val = readl(pcie->base + PCL_APP_READY_CTRL);
drivers/pci/controller/dwc/pcie-uniphier.c
93
val = readl(pcie->base + PCL_MODE);
drivers/pci/controller/dwc/pcie-uniphier.c
99
val = readl(pcie->base + PCL_APP_PM0);
drivers/pci/controller/mobiveil/pcie-mobiveil.c
32
val = readl(pcie->csr_axi_slave_base + PAB_CTRL);
drivers/pci/controller/mobiveil/pcie-mobiveil.c
61
*val = readl(addr);
drivers/pci/controller/pci-aardvark.c
299
return readl(pcie->base + reg);
drivers/pci/controller/pci-ftpci100.c
189
*value = readl(p->base + FTPCI_DATA);
drivers/pci/controller/pci-ftpci100.c
456
val = readl(p->base + FTPCI_CTRL);
drivers/pci/controller/pci-hyperv.c
1233
*val = readl(addr);
drivers/pci/controller/pci-mvebu.c
135
return readl(port->base + reg);
drivers/pci/controller/pci-tegra.c
2195
value = readl(port->base + RP_PRIV_MISC);
drivers/pci/controller/pci-tegra.c
2204
value = readl(port->base + RP_VEND_XP);
drivers/pci/controller/pci-tegra.c
2220
value = readl(port->base + RP_LINK_CONTROL_STATUS);
drivers/pci/controller/pci-tegra.c
2249
value = readl(port->base + RP_LINK_CONTROL_STATUS_2);
drivers/pci/controller/pci-tegra.c
2261
value = readl(port->base + RP_LINK_CONTROL_STATUS);
drivers/pci/controller/pci-tegra.c
2273
value = readl(port->base + RP_LINK_CONTROL_STATUS);
drivers/pci/controller/pci-tegra.c
2280
value = readl(port->base + RP_LINK_CONTROL_STATUS);
drivers/pci/controller/pci-tegra.c
2513
value = readl(port->base + RP_VEND_XP);
drivers/pci/controller/pci-tegra.c
2518
value = readl(port->base + RP_LINK_CONTROL_STATUS);
drivers/pci/controller/pci-tegra.c
385
return readl(pcie->afi + offset);
drivers/pci/controller/pci-tegra.c
396
return readl(pcie->pads + offset);
drivers/pci/controller/pci-tegra.c
540
value = readl(port->base + RP_VEND_CTL1);
drivers/pci/controller/pci-tegra.c
545
value = readl(port->base + RP_VEND_XP);
drivers/pci/controller/pci-tegra.c
554
value = readl(port->base + RP_VEND_XP_BIST);
drivers/pci/controller/pci-tegra.c
558
value = readl(port->base + RP_PRIV_MISC);
drivers/pci/controller/pci-tegra.c
577
value = readl(port->base + RP_ECTL_2_R1);
drivers/pci/controller/pci-tegra.c
582
value = readl(port->base + RP_ECTL_4_R1);
drivers/pci/controller/pci-tegra.c
588
value = readl(port->base + RP_ECTL_5_R1);
drivers/pci/controller/pci-tegra.c
593
value = readl(port->base + RP_ECTL_6_R1);
drivers/pci/controller/pci-tegra.c
598
value = readl(port->base + RP_ECTL_2_R2);
drivers/pci/controller/pci-tegra.c
603
value = readl(port->base + RP_ECTL_4_R2);
drivers/pci/controller/pci-tegra.c
609
value = readl(port->base + RP_ECTL_5_R2);
drivers/pci/controller/pci-tegra.c
614
value = readl(port->base + RP_ECTL_6_R2);
drivers/pci/controller/pci-tegra.c
631
value = readl(port->base + RP_VEND_CTL0);
drivers/pci/controller/pci-tegra.c
638
value = readl(port->base + RP_VEND_XP);
drivers/pci/controller/pci-tegra.c
650
value = readl(port->base + RP_LINK_CONTROL_STATUS_2);
drivers/pci/controller/pci-tegra.c
676
value = readl(port->base + RP_VEND_CTL2);
drivers/pci/controller/pci-thunder-ecam.c
109
v = readl(addr);
drivers/pci/controller/pci-thunder-ecam.c
138
v = readl(addr);
drivers/pci/controller/pci-thunder-ecam.c
147
class_rev = readl(addr);
drivers/pci/controller/pci-thunder-ecam.c
175
vendor_device = readl(addr);
drivers/pci/controller/pci-thunder-ecam.c
194
v = readl(addr);
drivers/pci/controller/pci-thunder-ecam.c
207
v = readl(addr);
drivers/pci/controller/pci-thunder-ecam.c
263
v = readl(addr);
drivers/pci/controller/pci-thunder-ecam.c
49
v = readl(addr);
drivers/pci/controller/pci-thunder-ecam.c
63
barl_orig = readl(addr + 0);
drivers/pci/controller/pci-thunder-ecam.c
65
barl_rb = readl(addr + 0);
drivers/pci/controller/pci-thunder-ecam.c
78
v = readl(addr); /* EA entry-3. Base-H */
drivers/pci/controller/pci-v3-semi.c
746
if (readl(v3->base + V3_LB_IO_BASE) != (regs->start >> 16))
drivers/pci/controller/pci-v3-semi.c
748
readl(v3->base + V3_LB_IO_BASE), regs);
drivers/pci/controller/pci-versatile.c
104
if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
drivers/pci/controller/pci-versatile.c
105
(readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
drivers/pci/controller/pci-versatile.c
124
val = readl(local_pci_cfg_base + PCI_COMMAND);
drivers/pci/controller/pci-xgene.c
73
return readl(port->csr_base + reg);
drivers/pci/controller/pcie-altera.c
450
*value = readl(addr);
drivers/pci/controller/pcie-altera.c
838
status = readl(pcie->hip_base + pcie->pcie_data->port_conf_offset +
drivers/pci/controller/pcie-aspeed.c
236
en = readl(pcie->reg + intx_en);
drivers/pci/controller/pcie-aspeed.c
247
en = readl(pcie->reg + intx_en);
drivers/pci/controller/pcie-aspeed.c
258
en = readl(pcie->reg + intx_en);
drivers/pci/controller/pcie-aspeed.c
294
readl(pcie->reg + platform->reg_intx_sts));
drivers/pci/controller/pcie-aspeed.c
301
status = readl(pcie->reg + msi_sts_reg);
drivers/pci/controller/pcie-aspeed.c
338
cfg_val = readl(pcie->reg + ASPEED_H2X_DEV_CTRL);
drivers/pci/controller/pcie-aspeed.c
356
cfg_val = readl(pcie->reg + ASPEED_H2X_STS);
drivers/pci/controller/pcie-aspeed.c
371
cfg_val = readl(pcie->reg + ASPEED_H2X_INT_STS);
drivers/pci/controller/pcie-aspeed.c
375
cfg_val = readl(pcie->reg + ASPEED_H2X_STS);
drivers/pci/controller/pcie-aspeed.c
391
cfg_val = readl(pcie->reg + ASPEED_H2X_DEV_RX_DESC1);
drivers/pci/controller/pcie-aspeed.c
397
*val = readl(pcie->reg +
drivers/pci/controller/pcie-aspeed.c
407
*val = readl(pcie->reg + ASPEED_H2X_HOST_RX_DESC_DATA);
drivers/pci/controller/pcie-aspeed.c
411
cfg_val = readl(pcie->reg + ASPEED_H2X_DEV_CTRL);
drivers/pci/controller/pcie-aspeed.c
419
cfg_val = readl(pcie->reg + ASPEED_H2X_DEV_STS);
drivers/pci/controller/pcie-aspeed.c
480
*val = readl(pcie->reg + ASPEED_H2X_CFGI_RET_DATA);
drivers/pci/controller/pcie-aspeed.c
541
*val = readl(pcie->reg + ASPEED_H2X_CFGE_RET_DATA);
drivers/pci/controller/pcie-brcmstb.c
1163
tmp = readl(base + HARD_DEBUG(pcie));
drivers/pci/controller/pcie-brcmstb.c
1190
tmp = readl(base + PCIE_MISC_MISC_CTRL);
drivers/pci/controller/pcie-brcmstb.c
1209
tmp = readl(base + PCIE_MISC_MISC_CTRL);
drivers/pci/controller/pcie-brcmstb.c
1237
tmp = readl(base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
drivers/pci/controller/pcie-brcmstb.c
1257
tmp = readl(base + PCIE_RC_PL_REG_PHY_CTL_1);
drivers/pci/controller/pcie-brcmstb.c
1267
tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3);
drivers/pci/controller/pcie-brcmstb.c
1304
tmp = readl(base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1);
drivers/pci/controller/pcie-brcmstb.c
1351
clkreq_cntl = readl(pcie->base + HARD_DEBUG(pcie));
drivers/pci/controller/pcie-brcmstb.c
1369
tmp = readl(pcie->base + PCIE_RC_CFG_PRIV1_ROOT_CAP);
drivers/pci/controller/pcie-brcmstb.c
1536
tmp = readl(base + PCIE_MISC_PCIE_CTRL);
drivers/pci/controller/pcie-brcmstb.c
1541
tmp = readl(base + PCIE_MISC_PCIE_STATUS);
drivers/pci/controller/pcie-brcmstb.c
1545
tmp = readl(base + PCIE_MISC_PCIE_STATUS);
drivers/pci/controller/pcie-brcmstb.c
1573
tmp = readl(base + PCIE_DVT_PMU_PCIE_PHY_CTRL);
drivers/pci/controller/pcie-brcmstb.c
1580
tmp = readl(base + PCIE_DVT_PMU_PCIE_PHY_CTRL);
drivers/pci/controller/pcie-brcmstb.c
1613
tmp = readl(base + PCIE_MISC_PCIE_CTRL);
drivers/pci/controller/pcie-brcmstb.c
1618
tmp = readl(base + HARD_DEBUG(pcie));
drivers/pci/controller/pcie-brcmstb.c
1717
tmp = readl(base + HARD_DEBUG(pcie));
drivers/pci/controller/pcie-brcmstb.c
1782
if (pcie->bridge_in_reset || readl(base + PCIE_OUTB_ERR_VALID) == 0) {
drivers/pci/controller/pcie-brcmstb.c
1788
info = readl(base + PCIE_OUTB_ERR_ACC_INFO);
drivers/pci/controller/pcie-brcmstb.c
1792
cfg_addr = readl(base + PCIE_OUTB_ERR_ACC_ADDR);
drivers/pci/controller/pcie-brcmstb.c
1793
cfg_cause = readl(base + PCIE_OUTB_ERR_CFG_CAUSE);
drivers/pci/controller/pcie-brcmstb.c
1796
mem_cause = readl(base + PCIE_OUTB_ERR_MEM_CAUSE);
drivers/pci/controller/pcie-brcmstb.c
1797
lo = readl(base + PCIE_OUTB_ERR_MEM_ADDR_LO);
drivers/pci/controller/pcie-brcmstb.c
1798
hi = readl(base + PCIE_OUTB_ERR_MEM_ADDR_HI);
drivers/pci/controller/pcie-brcmstb.c
2140
pcie->hw_rev = readl(pcie->base + PCIE_MISC_REVISION);
drivers/pci/controller/pcie-brcmstb.c
410
readl(base + PCIE_RC_DL_MDIO_ADDR);
drivers/pci/controller/pcie-brcmstb.c
427
readl(base + PCIE_RC_DL_MDIO_ADDR);
drivers/pci/controller/pcie-brcmstb.c
478
u32 lnkcap = readl(pcie->base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
drivers/pci/controller/pcie-brcmstb.c
504
tmp = readl(pcie->base + PCIE_MEM_WIN0_BASE_LIMIT(win));
drivers/pci/controller/pcie-brcmstb.c
519
tmp = readl(pcie->base + PCIE_MEM_WIN0_BASE_HI(win));
drivers/pci/controller/pcie-brcmstb.c
525
tmp = readl(pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win));
drivers/pci/controller/pcie-brcmstb.c
559
status = readl(msi->intr_base + MSI_INT_STATUS);
drivers/pci/controller/pcie-brcmstb.c
760
u32 val = readl(base + PCIE_MISC_PCIE_STATUS);
drivers/pci/controller/pcie-brcmstb.c
767
u32 val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
drivers/pci/controller/pcie-brcmstb.c
835
tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
drivers/pci/controller/pcie-brcmstb.c
847
tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
drivers/pci/controller/pcie-brcmstb.c
877
tmp = readl(pcie->base + PCIE_MISC_PCIE_CTRL);
drivers/pci/controller/pcie-brcmstb.c
888
tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1(pcie));
drivers/pci/controller/pcie-brcmstb.c
920
tmp = readl(pcie->base + PCIE_RC_PL_PHY_CTL_15);
drivers/pci/controller/pcie-iproc-msi.c
312
hwirq = readl(msg);
drivers/pci/controller/pcie-iproc.c
1086
readl(pcie->base + iarr_offset),
drivers/pci/controller/pcie-iproc.c
1087
readl(pcie->base + iarr_offset + 4));
drivers/pci/controller/pcie-iproc.c
1095
val = readl(pcie->base + imap_offset);
drivers/pci/controller/pcie-iproc.c
1102
window_idx, readl(pcie->base + imap_offset),
drivers/pci/controller/pcie-iproc.c
1103
readl(pcie->base + imap_offset +
drivers/pci/controller/pcie-iproc.c
424
return readl(pcie->base + offset);
drivers/pci/controller/pcie-iproc.c
505
data = readl(cfg_data_p);
drivers/pci/controller/pcie-iproc.c
517
data = readl(cfg_data_p);
drivers/pci/controller/pcie-iproc.c
665
*val = readl(addr);
drivers/pci/controller/pcie-iproc.c
690
tmp = readl(addr) & mask;
drivers/pci/controller/pcie-iproc.c
886
readl(pcie->base + oarr_offset),
drivers/pci/controller/pcie-iproc.c
887
readl(pcie->base + oarr_offset + 4));
drivers/pci/controller/pcie-iproc.c
889
readl(pcie->base + omap_offset),
drivers/pci/controller/pcie-iproc.c
890
readl(pcie->base + omap_offset + 4));
drivers/pci/controller/pcie-mediatek.c
286
if (readl(port->base + PCIE_APP_TLP_REQ) & APP_CPL_STATUS)
drivers/pci/controller/pcie-mediatek.c
305
tmp = readl(port->base + PCIE_APP_TLP_REQ);
drivers/pci/controller/pcie-mediatek.c
314
*val = readl(port->base + PCIE_CFG_RDATA);
drivers/pci/controller/pcie-mediatek.c
339
val = readl(port->base + PCIE_APP_TLP_REQ);
drivers/pci/controller/pcie-mediatek.c
527
val = readl(port->base + PCIE_INT_MASK);
drivers/pci/controller/pcie-mediatek.c
606
status = readl(port->base + PCIE_INT_STATUS);
drivers/pci/controller/pcie-mediatek.c
628
while ((imsi_status = readl(port->base + PCIE_IMSI_STATUS))) {
drivers/pci/controller/pcie-mediatek.c
684
val = readl(pcie->base + PCIE_SYS_CFG_V2);
drivers/pci/controller/pcie-mediatek.c
708
val = readl(port->base + PCIE_RST_CTRL);
drivers/pci/controller/pcie-mediatek.c
734
val = readl(port->base + PCIE_INT_MASK);
drivers/pci/controller/pcie-mediatek.c
782
val = readl(pcie->base + PCIE_SYS_CFG);
drivers/pci/controller/pcie-mediatek.c
787
val = readl(pcie->base + PCIE_SYS_CFG);
drivers/pci/controller/pcie-mediatek.c
799
val = readl(pcie->base + PCIE_INT_ENABLE);
drivers/pci/controller/pcie-mediatek.c
813
val = readl(pcie->base + PCIE_CFG_DATA);
drivers/pci/controller/pcie-mediatek.c
823
val = readl(pcie->base + PCIE_CFG_DATA);
drivers/pci/controller/pcie-rcar-host.c
64
pmsr = readl(pcie_base + PMSR);
drivers/pci/controller/pcie-rcar.c
21
return readl(pcie->base + reg);
drivers/pci/controller/pcie-rockchip-host.c
105
*val = readl(addr);
drivers/pci/controller/pcie-rockchip-host.c
138
tmp = readl(addr) & mask;
drivers/pci/controller/pcie-rockchip-host.c
166
*val = readl(addr);
drivers/pci/controller/pcie-rockchip.h
335
return readl(rockchip->apb_base + reg);
drivers/pci/controller/pcie-xilinx-dma-pl.c
136
return readl(port->reg_base + reg + QDMA_BRIDGE_BASE_OFF);
drivers/pci/controller/pcie-xilinx-dma-pl.c
138
return readl(port->reg_base + reg);
drivers/pci/controller/pcie-xilinx-nwl.c
178
return readl(pcie->breg_base + off);
drivers/pci/controller/pcie-xilinx-nwl.c
188
if (readl(pcie->pcireg_base + PS_LINKUP_OFFSET) & PCIE_PHY_LINKUP_BIT)
drivers/pci/controller/pcie-xilinx-nwl.c
195
if (readl(pcie->pcireg_base + PS_LINKUP_OFFSET) & PHY_RDY_LINKUP_BIT)
drivers/pci/controller/pcie-xilinx.c
116
return readl(pcie->reg_base + reg);
drivers/pci/controller/plda/pcie-microchip-host.c
780
val = readl(port->bridge_base_addr + PCIE_PCI_IRQ_DW0);
drivers/pci/controller/plda/pcie-microchip-host.c
785
val = readl(port->bridge_base_addr + PCIE_PCI_IRQ_DW0);
drivers/pci/controller/plda/pcie-plda-host.c
531
val = readl(bridge_base_addr + ATR0_PCIE_WIN0_SRCADDR_PARAM);
drivers/pci/controller/vmd.c
426
*value = readl(addr);
drivers/pci/controller/vmd.c
459
readl(addr);
drivers/pci/endpoint/functions/pci-epf-vntb.c
1330
val = readl(base + off + ct + idx * sizeof(u32));
drivers/pci/endpoint/functions/pci-epf-vntb.c
1353
val = readl(base + off + idx * sizeof(u32));
drivers/pci/hotplug/cpqphp.h
484
led_control = readl(ctrl->hpc_reg + LED_CONTROL);
drivers/pci/hotplug/cpqphp.h
494
led_control = readl(ctrl->hpc_reg + LED_CONTROL);
drivers/pci/hotplug/cpqphp.h
504
led_control = readl(ctrl->hpc_reg + LED_CONTROL);
drivers/pci/hotplug/cpqphp.h
515
led_control = readl(ctrl->hpc_reg + LED_CONTROL);
drivers/pci/hotplug/cpqphp.h
524
led_control = readl(ctrl->hpc_reg + LED_CONTROL);
drivers/pci/hotplug/cpqphp.h
534
led_control = readl(ctrl->hpc_reg + LED_CONTROL);
drivers/pci/hotplug/cpqphp.h
618
u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
drivers/pci/hotplug/cpqphp.h
682
status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
drivers/pci/hotplug/cpqphp.h
697
tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
drivers/pci/hotplug/cpqphp_core.c
1160
ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
drivers/pci/hotplug/cpqphp_core.c
589
tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
drivers/pci/hotplug/cpqphp_core.c
734
smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
drivers/pci/hotplug/cpqphp_ctrl.c
1121
u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
drivers/pci/hotplug/cpqphp_ctrl.c
1266
if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot))
drivers/pci/hotplug/cpqphp_ctrl.c
1956
tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
drivers/pci/hotplug/cpqphp_ctrl.c
2140
save_LED = readl(ctrl->hpc_reg + LED_CONTROL);
drivers/pci/hotplug/cpqphp_ctrl.c
911
Diff = readl(ctrl->hpc_reg + INT_INPUT_CLEAR) ^ ctrl->ctrl_int_comp;
drivers/pci/hotplug/cpqphp_ctrl.c
913
ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
drivers/pci/hotplug/cpqphp_ctrl.c
919
readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
drivers/pci/hotplug/cpqphp_pci.c
1177
unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
drivers/pci/hotplug/cpqphp_pci.c
1204
unused_IRQ = readl(rom_resource_table + PCIIRQ);
drivers/pci/hotplug/ibmphp_ebda.c
415
rio_detail_ptr->bbar = readl(io_mem + offset + 1);
drivers/pci/hotplug/ibmphp_ebda.c
823
hpc_ptr->u.wpeg_ctlr.wpegbbar = readl(io_mem + addr);
drivers/pci/hotplug/ibmphp_ebda.c
967
rsrc_ptr->start_addr = readl(io_mem + addr + 2);
drivers/pci/hotplug/ibmphp_ebda.c
968
rsrc_ptr->end_addr = readl(io_mem + addr + 6);
drivers/pci/hotplug/ibmphp_hpc.c
179
wpg_data = readl(wpg_addr);
drivers/pci/hotplug/ibmphp_hpc.c
195
wpg_data = readl(wpg_addr);
drivers/pci/hotplug/ibmphp_hpc.c
209
wpg_data = readl(wpg_addr);
drivers/pci/hotplug/ibmphp_hpc.c
290
wpg_data = readl(wpg_addr);
drivers/pci/hotplug/ibmphp_hpc.c
307
wpg_data = readl(wpg_addr);
drivers/pci/hotplug/shpchp_hpc.c
188
return readl(ctrl->creg + reg);
drivers/pci/msi/msi.c
166
msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
drivers/pci/msi/msi.c
167
msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
drivers/pci/msi/msi.c
168
msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
drivers/pci/msi/msi.c
236
readl(base + PCI_MSIX_ENTRY_DATA);
drivers/pci/msi/msi.c
620
desc->pci.msix_ctrl = readl(addr + PCI_MSIX_ENTRY_VECTOR_CTRL);
drivers/pci/msi/msi.c
967
readl(pci_msix_desc_addr(msi_desc));
drivers/pci/msi/msi.h
48
readl(desc->pci.mask_base);
drivers/pci/quirks.c
1717
val = readl(asus_rcba_base + 0x3418);
drivers/pci/quirks.c
3570
if (readl(regs + I915_DEIER_REG) != 0) {
drivers/pci/quirks.c
4112
cfg = readl(bar + NVME_REG_CC);
drivers/pci/quirks.c
4116
u32 cap = readl(bar + NVME_REG_CAP);
drivers/pci/quirks.c
4138
u32 status = readl(bar + NVME_REG_CSTS);
drivers/pci/quirks.c
5342
bspr = readl(rcba_mem + INTEL_BSPR_REG);
drivers/pci/quirks.c
5345
updcr = readl(rcba_mem + INTEL_UPDCR_REG);
drivers/pci/rom.c
101
if (readl(pds) != 0x52494350) {
drivers/pci/rom.c
103
readl(pds));
drivers/pcmcia/rsrc_nonstatic.c
311
d = readl(virt+i);
drivers/pcmcia/yenta_socket.c
86
u32 val = readl(socket->base + reg);
drivers/pcmcia/yenta_socket.c
95
readl(socket->base + reg); /* avoid problems with PCI write posting */
drivers/peci/controller/peci-aspeed.c
144
u32 val = readl(priv->base + ASPEED_PECI_CTRL);
drivers/peci/controller/peci-aspeed.c
170
u32 cmd_sts = readl(priv->base + ASPEED_PECI_CMD);
drivers/peci/controller/peci-aspeed.c
278
u32 rx_data = readl(priv->base + reg);
drivers/peci/controller/peci-aspeed.c
295
status = readl(priv->base + ASPEED_PECI_INT_STS);
drivers/peci/controller/peci-aspeed.c
353
val = readl(aspeed_peci->base + ASPEED_PECI_CTRL);
drivers/peci/controller/peci-aspeed.c
382
reg = readl(aspeed_peci->base + ASPEED_PECI_TIMING_NEGOTIATION);
drivers/peci/controller/peci-aspeed.c
389
reg = readl(aspeed_peci->base + ASPEED_PECI_CTRL);
drivers/peci/request.c
441
__read_pkg_config(readl, u32);
drivers/peci/request.c
454
__read_pci_config_local(readl, u32);
drivers/peci/request.c
469
__read_ep_pci_config(readl, PECI_ENDPTCFG_TYPE_PCI, u32);
drivers/peci/request.c
481
__read_ep_mmio(readl, 32, PECI_ENDPTCFG_ADDR_TYPE_MMIO_D, u32, u32);
drivers/peci/request.c
482
__read_ep_mmio(readl, 64, PECI_ENDPTCFG_ADDR_TYPE_MMIO_Q, u64, u32);
drivers/perf/alibaba_uncore_drw_pmu.c
286
cycle_high = readl(drw_pmu->cfg_base + ALI_DRW_PMU_CYCLE_CNT_HIGH);
drivers/perf/alibaba_uncore_drw_pmu.c
288
cycle_low = readl(drw_pmu->cfg_base + ALI_DRW_PMU_CYCLE_CNT_LOW);
drivers/perf/alibaba_uncore_drw_pmu.c
293
return readl(drw_pmu->cfg_base +
drivers/perf/alibaba_uncore_drw_pmu.c
341
val = readl(drw_pmu->cfg_base + reg);
drivers/perf/alibaba_uncore_drw_pmu.c
359
val = readl(drw_pmu->cfg_base + reg);
drivers/perf/alibaba_uncore_drw_pmu.c
390
status = readl(drw_pmu->cfg_base + ALI_DRW_PMU_OV_INTR_STATUS);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
135
val = readl(info->pll_reg);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
179
r = readl(db->ddr_reg[0] + (DMC_MON_G12_CTRL0 + (i << 2)));
drivers/perf/amlogic/meson_g12_ddr_pmu.c
182
r = readl(db->ddr_reg[0] + DMC_MON_G12_ALL_REQ_CNT);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
184
r = readl(db->ddr_reg[0] + DMC_MON_G12_ALL_GRANT_CNT);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
186
r = readl(db->ddr_reg[0] + DMC_MON_G12_ONE_GRANT_CNT);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
188
r = readl(db->ddr_reg[0] + DMC_MON_G12_SEC_GRANT_CNT);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
190
r = readl(db->ddr_reg[0] + DMC_MON_G12_THD_GRANT_CNT);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
192
r = readl(db->ddr_reg[0] + DMC_MON_G12_FOR_GRANT_CNT);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
194
r = readl(db->ddr_reg[0] + DMC_MON_G12_TIMER);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
206
val = readl(info->ddr_reg[0] + DMC_MON_G12_CTRL0);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
241
val = readl(info->ddr_reg[0] + rp[channel]);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
249
val = readl(info->ddr_reg[0] + rs[channel]);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
289
counter->all_cnt = readl(info->ddr_reg[0] + DMC_MON_G12_ALL_GRANT_CNT);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
290
counter->all_req = readl(info->ddr_reg[0] + DMC_MON_G12_ALL_REQ_CNT);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
294
counter->channel_cnt[i] = readl(info->ddr_reg[0] + reg);
drivers/perf/amlogic/meson_g12_ddr_pmu.c
304
val = readl(info->ddr_reg[0] + DMC_MON_G12_CTRL0);
drivers/perf/arm-ccn.c
1032
val = readl(source->base + CCN_HNF_PMU_EVENT_SEL);
drivers/perf/arm-ccn.c
1059
val = readl(ccn->dt.base + CCN_DT_ACTIVE_DSM + offset);
drivers/perf/arm-ccn.c
1134
u32 val = readl(ccn->dt.base + CCN_DT_PMCR);
drivers/perf/arm-ccn.c
1143
u32 val = readl(ccn->dt.base + CCN_DT_PMCR);
drivers/perf/arm-ccn.c
1150
u32 pmovsr = readl(dt->base + CCN_DT_PMOVSR);
drivers/perf/arm-ccn.c
1337
val = readl(ccn->base + CCN_MN_OLY_COMP_LIST_63_0 +
drivers/perf/arm-ccn.c
1343
val = readl(base + CCN_ALL_OLY_ID);
drivers/perf/arm-ccn.c
1428
err_or = err_sig_val[0] = readl(ccn->base + CCN_MN_ERR_SIG_VAL_63_0);
drivers/perf/arm-ccn.c
1436
err_sig_val[i] = readl(ccn->base +
drivers/perf/arm-ccn.c
1474
if (readl(ccn->base + CCN_MN_ERRINT_STATUS) &
drivers/perf/arm-ccn.c
845
while (!(readl(ccn->dt.base + CCN_DT_PMSR) & 0x1))
drivers/perf/arm-ccn.c
848
res = readl(ccn->dt.base + CCN_DT_PMCCNTRSR + 4) & 0xff;
drivers/perf/arm-ccn.c
850
res |= readl(ccn->dt.base + CCN_DT_PMCCNTRSR);
drivers/perf/arm-ccn.c
853
res = readl(ccn->dt.base + CCN_DT_PMEVCNT(idx));
drivers/perf/arm-ccn.c
899
val = readl(xp->base + CCN_XP_DT_CONFIG);
drivers/perf/arm-ccn.c
950
val = readl(source->base + CCN_XP_DT_INTERFACE_SEL);
drivers/perf/arm-ccn.c
996
val = readl(source->base + CCN_XP_PMU_EVENT_SEL);
drivers/perf/arm_cspmu/arm_cspmu.c
1012
pmovs[i] = readl(cspmu->base1 + pmovclr_offset);
drivers/perf/arm_cspmu/arm_cspmu.c
105
val_hi = readl(addr + 4);
drivers/perf/arm_cspmu/arm_cspmu.c
106
val_lo = readl(addr);
drivers/perf/arm_cspmu/arm_cspmu.c
107
} while (val_hi != readl(addr + 4));
drivers/perf/arm_cspmu/arm_cspmu.c
358
pmiidr = readl(cspmu->base0 + PMIIDR);
drivers/perf/arm_cspmu/arm_cspmu.c
365
pmpidr = readl(cspmu->base0 + PMPIDR0);
drivers/perf/arm_cspmu/arm_cspmu.c
369
pmpidr = readl(cspmu->base0 + PMPIDR1);
drivers/perf/arm_cspmu/arm_cspmu.c
375
pmpidr = readl(cspmu->base0 + PMPIDR2);
drivers/perf/arm_cspmu/arm_cspmu.c
381
pmpidr = readl(cspmu->base0 + PMPIDR3);
drivers/perf/arm_cspmu/arm_cspmu.c
385
pmpidr = readl(cspmu->base0 + PMPIDR4);
drivers/perf/arm_cspmu/arm_cspmu.c
736
return readl(cspmu->base1 + offset);
drivers/perf/arm_cspmu/arm_cspmu.c
972
cspmu->pmcfgr = readl(cspmu->base0 + PMCFGR);
drivers/perf/arm_dmc620_pmu.c
267
return readl(dmc620_pmu->base + DMC620_PMU_COUNTERn_OFFSET(idx) + reg);
drivers/perf/arm_dmc620_pmu.c
390
status = readl(dmc620_pmu->base + DMC620_PMU_OVERFLOW_STATUS_CLKDIV2);
drivers/perf/arm_dmc620_pmu.c
391
status |= (readl(dmc620_pmu->base + DMC620_PMU_OVERFLOW_STATUS_CLK) <<
drivers/perf/arm_smmuv3_pmu.c
217
value = readl(smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 4));
drivers/perf/arm_smmuv3_pmu.c
749
if (!(readl(pmu->reg_base + SMMU_PMCG_CFGR) & SMMU_PMCG_CFGR_MSI))
drivers/perf/arm_smmuv3_pmu.c
823
u32 pidr0 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR0);
drivers/perf/arm_smmuv3_pmu.c
824
u32 pidr1 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR1);
drivers/perf/arm_smmuv3_pmu.c
825
u32 pidr2 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR2);
drivers/perf/arm_smmuv3_pmu.c
826
u32 pidr3 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR3);
drivers/perf/arm_smmuv3_pmu.c
827
u32 pidr4 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR4);
drivers/perf/hisilicon/hisi_pcie_pmu.c
838
pcie_pmu->identifier = readl(pcie_pmu->base + HISI_PCIE_REG_VERSION);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
106
val = readl(cpa_pmu->base + CPA_CFG_REG);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
115
val = readl(cpa_pmu->base + CPA_CFG_REG);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
126
val = readl(cpa_pmu->base + CPA_EVENT_CTRL);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
137
val = readl(cpa_pmu->base + CPA_EVENT_CTRL);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
148
val = readl(cpa_pmu->base + CPA_INT_MASK);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
159
val = readl(cpa_pmu->base + CPA_INT_MASK);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
166
return readl(cpa_pmu->base + CPA_INT_STATUS);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
199
cpa_pmu->identifier = readl(cpa_pmu->base + CPA_VERSION);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
78
val = readl(cpa_pmu->base + reg);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
88
val = readl(cpa_pmu->base + CPA_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c
97
val = readl(cpa_pmu->base + CPA_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
156
val = readl(ddrc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
166
val = readl(ddrc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
177
val = readl(ddrc_pmu->base + regs->event_ctrl);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
188
val = readl(ddrc_pmu->base + regs->event_ctrl);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
199
val = readl(ddrc_pmu->base + regs->int_mask);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
210
val = readl(ddrc_pmu->base + regs->int_mask);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
219
return readl(ddrc_pmu->base + regs->int_status);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
260
ddrc_pmu->identifier = readl(ddrc_pmu->base + DDRC_VERSION);
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c
92
return readl(ddrc_pmu->base + ddrc_reg_off[hwc->idx]);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
105
val = readl(hha_pmu->base + HHA_DATSRC_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
120
val = readl(hha_pmu->base + HHA_SRCID_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
135
val = readl(hha_pmu->base + HHA_SRCID_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
199
val = readl(hha_pmu->base + reg);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
213
val = readl(hha_pmu->base + HHA_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
226
val = readl(hha_pmu->base + HHA_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
237
val = readl(hha_pmu->base + HHA_EVENT_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
248
val = readl(hha_pmu->base + HHA_EVENT_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
259
val = readl(hha_pmu->base + HHA_INT_MASK);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
270
val = readl(hha_pmu->base + HHA_INT_MASK);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
277
return readl(hha_pmu->base + HHA_INT_STATUS);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
330
hha_pmu->identifier = readl(hha_pmu->base + HHA_VERSION);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
67
val = readl(hha_pmu->base + HHA_SRCID_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
78
val = readl(hha_pmu->base + HHA_SRCID_CTRL);
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c
91
val = readl(hha_pmu->base + HHA_DATSRC_CTRL);
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
160
return readl((void __iomem *)hwc->event_base + reg);
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
419
val = readl(l3c_pmu->base + L3C_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
431
val = readl(hisi_l3c_pmu->ext_base[i] + L3C_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
450
val = readl(l3c_pmu->base + L3C_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
462
val = readl(hisi_l3c_pmu->ext_base[i] + L3C_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
518
status = readl(l3c_pmu->base + L3C_INT_STATUS);
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
524
ext_int = readl(hisi_l3c_pmu->ext_base[i] + L3C_INT_STATUS);
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c
567
l3c_pmu->identifier = readl(l3c_pmu->base + L3C_VERSION);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
110
val = readl(mn_pmu->base + reg_info->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
120
val = readl(mn_pmu->base + reg_info->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
133
val = readl(mn_pmu->base + reg_info->event_ctrl);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
144
val = readl(mn_pmu->base + reg_info->event_ctrl);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
155
val = readl(mn_pmu->base + reg_info->int_mask);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
166
val = readl(mn_pmu->base + reg_info->int_mask);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
175
return readl(mn_pmu->base + reg_info->int_status);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
288
mn_pmu->identifier = readl(mn_pmu->base + reg_info->version);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
62
val = readl(mn_pmu->base + reg_info->dyn_ctrl);
drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
99
val = readl(mn_pmu->base + HISI_MN_EVTYPE_REGn(reg_info->event_type0, idx / 4));
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
114
reg = readl(noc_pmu->base + NOC_PMU_EVENT_CTRLn(reg_info->event_ctrl0, hwc->idx));
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
125
reg = readl(noc_pmu->base + NOC_PMU_EVENT_CTRLn(reg_info->event_ctrl0, hwc->idx));
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
146
reg = readl(noc_pmu->base + reg_info->pmu_ctrl);
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
156
reg = readl(noc_pmu->base + reg_info->pmu_ctrl);
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
165
return readl(noc_pmu->base + reg_info->overflow_status);
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
173
reg = readl(noc_pmu->base + reg_info->overflow_status);
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
190
reg = readl(noc_pmu->base + NOC_PMU_EVENT_CTRLn(reg_info->event_ctrl0, hwc->idx));
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
200
reg = readl(noc_pmu->base + reg_info->pmu_ctrl);
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
221
reg = readl(noc_pmu->base + reg_info->pmu_ctrl);
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
321
noc_pmu->identifier = readl(noc_pmu->base + reg_info->version);
drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
72
reg = readl(noc_pmu->base + NOC_PMU_EVENT_CTRLn(reg_info->event_ctrl0, idx));
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
185
val = readl(pa_pmu->base + reg);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
195
val = readl(pa_pmu->base + PA_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
204
val = readl(pa_pmu->base + PA_PERF_CTRL);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
215
val = readl(pa_pmu->base + PA_EVENT_CTRL);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
226
val = readl(pa_pmu->base + PA_EVENT_CTRL);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
238
val = readl(pa_pmu->base + regs->mask_offset);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
250
val = readl(pa_pmu->base + regs->mask_offset);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
259
return readl(pa_pmu->base + regs->status_offset);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
298
pa_pmu->identifier = readl(pa_pmu->base + PA_PMU_VERSION);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
69
val = readl(pa_pmu->base + PA_TT_CTRL);
drivers/perf/hisilicon/hisi_uncore_pa_pmu.c
83
val = readl(pa_pmu->base + PA_TT_CTRL);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
101
val = readl(sllc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
116
val = readl(sllc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
135
val = readl(sllc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
153
val = readl(sllc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
173
val = readl(sllc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
190
val = readl(sllc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
246
val = readl(sllc_pmu->base + reg);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
257
val = readl(sllc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
267
val = readl(sllc_pmu->base + regs->perf_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
278
val = readl(sllc_pmu->base + regs->event_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
289
val = readl(sllc_pmu->base + regs->event_ctrl);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
300
val = readl(sllc_pmu->base + regs->int_mask);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
311
val = readl(sllc_pmu->base + regs->int_mask);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
320
return readl(sllc_pmu->base + regs->int_status);
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c
362
sllc_pmu->identifier = readl(sllc_pmu->base + regs->version);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
104
val = readl(uc_pmu->base + HISI_UC_TRACETAG_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
124
val = readl(uc_pmu->base + HISI_UC_TRACETAG_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
134
val = readl(uc_pmu->base + HISI_UC_SRCID_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
151
val = readl(uc_pmu->base + HISI_UC_TRACETAG_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
163
val = readl(uc_pmu->base + HISI_UC_SRCID_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
178
val = readl(uc_pmu->base + HISI_UC_EVENT_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
198
val = readl(uc_pmu->base + HISI_UC_EVENT_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
237
val = readl(uc_pmu->base + HISI_UC_EVTYPE_REGn(idx / 4));
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
247
val = readl(uc_pmu->base + HISI_UC_EVENT_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
256
val = readl(uc_pmu->base + HISI_UC_EVENT_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
267
val = readl(uc_pmu->base + HISI_UC_EVENT_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
278
val = readl(uc_pmu->base + HISI_UC_EVENT_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
293
val = readl(uc_pmu->base + HISI_UC_EVENT_CTRL_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
340
val = readl(uc_pmu->base + HISI_UC_INT_MASK_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
350
val = readl(uc_pmu->base + HISI_UC_INT_MASK_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
357
return readl(uc_pmu->base + HISI_UC_INT_STS_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
396
uc_pmu->identifier = readl(uc_pmu->base + HISI_UC_VERSION_REG);
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c
83
val = readl(uc_pmu->base + HISI_UC_TRACETAG_CTRL_REG);
drivers/perf/hisilicon/hns3_pmu.c
1379
val = readl(hns3_pmu->base + HNS3_PMU_REG_GLOBAL_CTRL);
drivers/perf/hisilicon/hns3_pmu.c
1389
val = readl(hns3_pmu->base + HNS3_PMU_REG_GLOBAL_CTRL);
drivers/perf/hisilicon/hns3_pmu.c
1406
hns3_pmu->hw_clk_freq = readl(hns3_pmu->base + HNS3_PMU_REG_CLOCK_FREQ);
drivers/perf/hisilicon/hns3_pmu.c
1408
val = readl(hns3_pmu->base + HNS3_PMU_REG_BDF);
drivers/perf/hisilicon/hns3_pmu.c
1412
val = readl(hns3_pmu->base + HNS3_PMU_REG_DEVICE_ID);
drivers/perf/hisilicon/hns3_pmu.c
1420
hns3_pmu->identifier = readl(hns3_pmu->base + HNS3_PMU_REG_VERSION);
drivers/perf/hisilicon/hns3_pmu.c
740
return readl(hns3_pmu->base + offset);
drivers/perf/thunderx2_pmu.c
296
return readl((void __iomem *)addr);
drivers/perf/xgene_pmu.c
1189
pmovsr = readl(csr + PMU_PMOVSSET) & PMU_OVERFLOW_MASK;
drivers/perf/xgene_pmu.c
1191
pmovsr = readl(csr + PMU_PMOVSR) & PMU_OVERFLOW_MASK;
drivers/perf/xgene_pmu.c
1229
val = readl(xgene_pmu->pcppmu_csr + PCPPMU_INTSTATUS_REG);
drivers/perf/xgene_pmu.c
1293
reg = readl(csw_csr + CSW_CSWCR);
drivers/perf/xgene_pmu.c
1298
reg = readl(mcbb_csr + CSW_CSWCR);
drivers/perf/xgene_pmu.c
1305
reg = readl(mcba_csr + CSW_CSWCR);
drivers/perf/xgene_pmu.c
1327
reg = readl(csw_csr + CSW_CSWCR);
drivers/perf/xgene_pmu.c
723
return readl(pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx));
drivers/perf/xgene_pmu.c
793
val = readl(pmu_dev->inf->csr + PMU_PMCNTENSET);
drivers/perf/xgene_pmu.c
803
val = readl(pmu_dev->inf->csr + PMU_PMCNTENCLR);
drivers/perf/xgene_pmu.c
813
val = readl(pmu_dev->inf->csr + PMU_PMINTENSET);
drivers/perf/xgene_pmu.c
823
val = readl(pmu_dev->inf->csr + PMU_PMINTENCLR);
drivers/perf/xgene_pmu.c
832
val = readl(pmu_dev->inf->csr + PMU_PMCR);
drivers/perf/xgene_pmu.c
841
val = readl(pmu_dev->inf->csr + PMU_PMCR);
drivers/perf/xgene_pmu.c
850
val = readl(pmu_dev->inf->csr + PMU_PMCR);
drivers/phy/allwinner/phy-sun4i-usb.c
153
iscr = readl(data->base + REG_ISCR);
drivers/phy/allwinner/phy-sun4i-usb.c
196
temp = readl(phyctl);
drivers/phy/allwinner/phy-sun4i-usb.c
246
reg_value = readl(phy->pmu);
drivers/phy/allwinner/phy-sun4i-usb.c
316
val = readl(phy2->pmu + REG_HCI_PHY_CTL);
drivers/phy/allwinner/phy-sun4i-usb.c
325
val = readl(phy->pmu + REG_HCI_PHY_CTL);
drivers/phy/allwinner/phy-sun4i-usb.c
332
val = readl(data->base + data->cfg->phyctl_offset);
drivers/phy/allwinner/phy-sun4i-usb.c
378
writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
drivers/phy/allwinner/phy-sun4i-usb.c
571
regval = readl(data->base + REG_PHY_OTGCTL);
drivers/phy/allwinner/phy-sun50i-usb3.c
66
val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
drivers/phy/allwinner/phy-sun50i-usb3.c
71
val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
drivers/phy/allwinner/phy-sun50i-usb3.c
75
val = readl(phy->regs + SUNXI_ISCR);
drivers/phy/allwinner/phy-sun50i-usb3.c
86
val = readl(phy->regs + SUNXI_PHY_TUNE_HIGH);
drivers/phy/allwinner/phy-sun9i-usb.c
56
reg_value = readl(phy->pmu);
drivers/phy/apple/atc.c
1353
tx_cal_code = FIELD_GET(AUS_UNK_A20_TX_CAL_CODE, readl(atcphy->regs.core + AUS_UNK_A20));
drivers/phy/apple/atc.c
1502
reg = readl(atcphy->regs.core + AUSPLL_APB_CMD_OVERRIDE);
drivers/phy/apple/atc.c
839
u32 value = readl(reg);
drivers/phy/apple/atc.c
928
if (readl(atcphy->regs.pipehandler + PIPEHANDLER_LOCK_REQ) & PIPEHANDLER_LOCK_EN) {
drivers/phy/apple/atc.c
965
if (readl(atcphy->regs.pipehandler + PIPEHANDLER_LOCK_ACK) & PIPEHANDLER_LOCK_EN) {
drivers/phy/broadcom/phy-bcm-cygnus-pcie.c
73
val = readl(core->base + PCIE_CFG_OFFSET);
drivers/phy/broadcom/phy-bcm-cygnus-pcie.c
82
val = readl(core->base + PCIE_CFG_OFFSET);
drivers/phy/broadcom/phy-bcm-kona-usb2.c
38
val = readl(phy->regs + OTGCTL);
drivers/phy/broadcom/phy-bcm-kona-usb2.c
56
val = readl(phy->regs + P1CTL);
drivers/phy/broadcom/phy-bcm-ns-usb2.c
49
usb2ctl = readl(usb2->base);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
114
val = readl(driver->crmu_usb2_ctrl);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
118
val = readl(driver->crmu_usb2_ctrl);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
123
val = readl(driver->icfgdrd_regs + ICFG_FSM_CTRL);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
141
val = readl(driver->idmdrd_rst_ctrl);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
145
val = readl(driver->crmu_usb2_ctrl);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
150
val = readl(driver->crmu_usb2_ctrl);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
162
val = readl(driver->crmu_usb2_ctrl);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
172
val = readl(driver->idmdrd_rst_ctrl);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
177
val = readl(driver->usb2h_strap_reg);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
191
val = readl(driver->icfgdrd_regs + ICFG_FSM_CTRL);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
201
val = readl(driver->icfgdrd_regs + ICFG_DRD_P0CTL);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
213
val = readl(driver->usb2h_strap_reg);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
217
val = readl(driver->icfgdrd_regs + ICFG_DRD_P0CTL);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
376
val = readl(driver->crmu_usb2_ctrl);
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c
94
val = readl(driver->icfgdrd_regs + ICFG_FSM_CTRL);
drivers/phy/broadcom/phy-bcm-sr-pcie.c
130
pipemux = readl(core->base + PCIE_PIPEMUX_CFG_OFFSET);
drivers/phy/broadcom/phy-bcm-sr-usb.c
103
writel(readl(addr) & ~clear, addr);
drivers/phy/broadcom/phy-bcm-sr-usb.c
108
writel(readl(addr) | set, addr);
drivers/phy/broadcom/phy-bcm-sr-usb.c
134
rd_data = readl(regs + offset[PHY_CTRL]);
drivers/phy/broadcom/phy-brcm-sata.c
224
tmp = readl(pcb_base + SATA_PCB_REG_OFFSET(ofs));
drivers/phy/broadcom/phy-brcm-sata.c
240
return readl(pcb_base + SATA_PCB_REG_OFFSET(ofs));
drivers/phy/cadence/cdns-dphy.c
416
reg = readl(dphy->regs + DPHY_CMN_SSM);
drivers/phy/cadence/cdns-dphy.c
453
reg = readl(dphy->regs + DPHY_CMN_SSM);
drivers/phy/cadence/phy-cadence-salvo.c
152
return (u16)readl(salvo_phy->base + offset +
drivers/phy/cadence/phy-cadence-torrent.c
519
*val = readl(ctx->base + offset);
drivers/phy/freescale/phy-fsl-imx8m-pcie.c
100
val = readl(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG061);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
207
val = readl(tca->base + TCA_SYSMODE_CFG);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
232
val = readl(tca->base + TCA_CLK_RST);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
489
value = readl(imx_phy->base + PHY_CTRL4);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
497
value = readl(imx_phy->base + PHY_CTRL5);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
510
value = readl(imx_phy->base + PHY_CTRL3);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
550
value = readl(imx_phy->base + PHY_CTRL1);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
556
value = readl(imx_phy->base + PHY_CTRL0);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
560
value = readl(imx_phy->base + PHY_CTRL2);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
564
value = readl(imx_phy->base + PHY_CTRL1);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
577
value = readl(imx_phy->base + PHY_CTRL0);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
584
value = readl(imx_phy->base + PHY_CTRL6);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
588
value = readl(imx_phy->base + PHY_CTRL1);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
593
value = readl(imx_phy->base + PHY_CTRL0);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
600
value = readl(imx_phy->base + PHY_CTRL2);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
606
value = readl(imx_phy->base + PHY_CTRL1);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
639
value = readl(imx_phy->base + PHY_CTRL6);
drivers/phy/freescale/phy-fsl-imx8mq-usb.c
652
value = readl(imx_phy->base + PHY_CTRL6);
drivers/phy/hisilicon/phy-hi3670-pcie.c
181
return readl(phy->base + APB_PHY_START_ADDR + reg);
drivers/phy/hisilicon/phy-hi3670-pcie.c
204
return readl(phy->base + reg);
drivers/phy/hisilicon/phy-histb-combphy.c
117
val = readl(priv->mmio + COMBPHY_CFG_REG);
drivers/phy/hisilicon/phy-histb-combphy.c
128
val = readl(priv->mmio + COMBPHY_CFG_REG);
drivers/phy/hisilicon/phy-histb-combphy.c
149
val = readl(priv->mmio + COMBPHY_CFG_REG);
drivers/phy/hisilicon/phy-histb-combphy.c
60
val = readl(reg);
drivers/phy/ingenic/phy-ingenic-usb.c
115
reg = readl(priv->base + REG_USBPCR_OFFSET);
drivers/phy/ingenic/phy-ingenic-usb.c
163
reg = readl(priv->base + REG_USBPCR_OFFSET);
drivers/phy/ingenic/phy-ingenic-usb.c
172
reg = readl(priv->base + REG_USBPCR_OFFSET);
drivers/phy/ingenic/phy-ingenic-usb.c
181
reg = readl(priv->base + REG_USBPCR_OFFSET);
drivers/phy/ingenic/phy-ingenic-usb.c
226
reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_USB_SEL |
drivers/phy/ingenic/phy-ingenic-usb.c
240
reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_USB_SEL |
drivers/phy/ingenic/phy-ingenic-usb.c
253
reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_WORD_IF_16BIT;
drivers/phy/ingenic/phy-ingenic-usb.c
271
reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_WORD_IF_16BIT |
drivers/phy/ingenic/phy-ingenic-usb.c
285
reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_DPPD | USBPCR1_DMPD;
drivers/phy/intel/phy-intel-lgm-combo.c
135
reg_val = readl(base + reg);
drivers/phy/marvell/phy-armada375-usb2.c
40
reg = readl(cluster_phy->reg);
drivers/phy/marvell/phy-berlin-sata.c
100
regval = readl(priv->base + HOST_VSA_DATA);
drivers/phy/marvell/phy-berlin-sata.c
122
regval = readl(ctrl_reg + PORT_SCR_CTL);
drivers/phy/marvell/phy-berlin-sata.c
146
regval = readl(priv->base + HOST_VSA_DATA);
drivers/phy/marvell/phy-berlin-sata.c
75
regval = readl(ctrl_reg + PORT_VSR_DATA);
drivers/phy/marvell/phy-berlin-sata.c
94
regval = readl(priv->base + HOST_VSA_DATA);
drivers/phy/marvell/phy-mvebu-a3700-comphy.c
373
val = readl(addr);
drivers/phy/marvell/phy-mvebu-a3700-comphy.c
514
old = readl(lane->priv->comphy_regs + COMPHY_SELECTOR_PHY_REG);
drivers/phy/marvell/phy-mvebu-a3700-utmi.c
111
reg = readl(utmi->regs + USB2_PHY_OTG_CTRL);
drivers/phy/marvell/phy-mvebu-a3700-utmi.c
116
reg = readl(utmi->regs + USB2_PHY_CHRGR_DETECT);
drivers/phy/marvell/phy-mvebu-a3700-utmi.c
171
reg = readl(utmi->regs + USB2_PHY_CTRL(usb32));
drivers/phy/marvell/phy-mvebu-a3700-utmi.c
177
reg = readl(utmi->regs + USB2_PHY_OTG_CTRL);
drivers/phy/marvell/phy-mvebu-a3700-utmi.c
98
reg = readl(utmi->regs + USB2_PHY_PLL_CTRL_REG0);
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
348
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
410
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
417
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
431
val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
438
val = readl(priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
445
val = readl(priv->base + MVEBU_COMPHY_LOOPBACK(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
459
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
476
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
487
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
505
val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
510
val = readl(priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
519
val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
538
val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
543
val = readl(priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
547
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
551
val = readl(priv->base + MVEBU_COMPHY_DFE_RES(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
555
val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
560
val = readl(priv->base + MVEBU_COMPHY_GEN1_S1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
568
val = readl(priv->base + MVEBU_COMPHY_COEF(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
572
val = readl(priv->base + MVEBU_COMPHY_GEN1_S4(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
591
val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
596
val = readl(priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
601
val = readl(priv->base + MVEBU_COMPHY_SPEED_DIV(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
605
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
610
val = readl(priv->base + MVEBU_COMPHY_DFE_RES(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
614
val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
621
val = readl(priv->base + MVEBU_COMPHY_GEN1_S2(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
626
val = readl(priv->base + MVEBU_COMPHY_TX_SLEW_RATE(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
632
val = readl(priv->base + MVEBU_COMPHY_IMP_CAL(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
638
val = readl(priv->base + MVEBU_COMPHY_GEN1_S5(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
642
val = readl(priv->base + MVEBU_COMPHY_GEN1_S1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
654
val = readl(priv->base + MVEBU_COMPHY_COEF(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
658
val = readl(priv->base + MVEBU_COMPHY_GEN1_S4(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
663
val = readl(priv->base + MVEBU_COMPHY_GEN1_S3(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
668
val = readl(priv->base + MVEBU_COMPHY_TRAINING5(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
674
val = readl(priv->base + MVEBU_COMPHY_TRAINING0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
678
val = readl(priv->base + MVEBU_COMPHY_TX_PRESET(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
683
val = readl(priv->base + MVEBU_COMPHY_FRAME_DETECT3(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
687
val = readl(priv->base + MVEBU_COMPHY_TX_TRAIN_PRESET(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
692
val = readl(priv->base + MVEBU_COMPHY_FRAME_DETECT0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
697
val = readl(priv->base + MVEBU_COMPHY_DME(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
701
val = readl(priv->base + MVEBU_COMPHY_VDD_CAL0(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
705
val = readl(priv->base + MVEBU_SP_CALIB(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
714
val = readl(priv->base + MVEBU_COMPHY_EXT_SELV(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
759
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
880
val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
125
reg = readl(PORT_REGS(port) + UTMI_PLL_CTRL_REG);
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
132
reg = readl(PORT_REGS(port) + UTMI_CAL_CTRL_REG);
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
138
reg = readl(PORT_REGS(port) + UTMI_TX_CH_CTRL_REG);
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
144
reg = readl(PORT_REGS(port) + UTMI_RX_CH_CTRL0_REG);
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
153
reg = readl(PORT_REGS(port) + UTMI_RX_CH_CTRL1_REG);
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
162
reg = readl(PORT_REGS(port) + UTMI_CHGDTC_CTRL_REG);
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
168
reg = readl(PORT_REGS(port) + UTMI_DIG_CTRL1_REG);
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
229
reg = readl(PORT_REGS(port) + UTMI_CTRL_STATUS0_REG);
drivers/phy/marvell/phy-mvebu-cp110-utmi.c
244
reg = readl(PORT_REGS(port) + UTMI_CTRL_STATUS0_REG);
drivers/phy/marvell/phy-mvebu-sata.c
37
reg = readl(priv->base + SATA_PHY_MODE_2);
drivers/phy/marvell/phy-mvebu-sata.c
43
reg = readl(priv->base + SATA_IF_CTRL);
drivers/phy/marvell/phy-mvebu-sata.c
60
reg = readl(priv->base + SATA_PHY_MODE_2);
drivers/phy/marvell/phy-mvebu-sata.c
66
reg = readl(priv->base + SATA_IF_CTRL);
drivers/phy/marvell/phy-pxa-28nm-hsic.c
132
writel(readl(base + PHY_28NM_HSIC_CTRL) & ~PHY_28NM_HSIC_S2H_HSIC_EN,
drivers/phy/marvell/phy-pxa-28nm-hsic.c
144
writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) &
drivers/phy/marvell/phy-pxa-28nm-hsic.c
72
writel(readl(base + PHY_28NM_HSIC_PLL_CTRL2) |
drivers/phy/marvell/phy-pxa-28nm-hsic.c
95
reg = readl(base + PHY_28NM_HSIC_CTRL);
drivers/phy/marvell/phy-pxa-28nm-usb2.c
160
reg = readl(base + PHY_28NM_PLL_REG0) &
drivers/phy/marvell/phy-pxa-28nm-usb2.c
170
reg = readl(base + PHY_28NM_PLL_REG1);
drivers/phy/marvell/phy-pxa-28nm-usb2.c
175
reg = readl(base + PHY_28NM_TX_REG0) & ~PHY_28NM_TX_AMP_MASK;
drivers/phy/marvell/phy-pxa-28nm-usb2.c
181
reg = readl(base + PHY_28NM_RX_REG0) & ~PHY_28NM_RX_SQ_THRESH_MASK;
drivers/phy/marvell/phy-pxa-28nm-usb2.c
186
reg = readl(base + PHY_28NM_DIG_REG0) &
drivers/phy/marvell/phy-pxa-28nm-usb2.c
195
reg = readl(base + PHY_28NM_OTG_REG) | PHY_28NM_OTG_PU_OTG;
drivers/phy/marvell/phy-pxa-28nm-usb2.c
239
writel(readl(base + PHY_28NM_CTRL_REG3) |
drivers/phy/marvell/phy-pxa-28nm-usb2.c
252
writel(readl(base + PHY_28NM_CTRL_REG3) |
drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c
142
tmp = readl(hdmi_phy->regs + HDMI_CON6);
drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c
159
tmp = readl(hdmi_phy->regs + HDMI_CON2);
drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
505
return !!(readl(hdmi_phy->regs + HDMI_CTL_1) & RG_HDMITX_PWR5V_O);
drivers/phy/mediatek/phy-mtk-io.h
16
u32 tmp = readl(reg);
drivers/phy/mediatek/phy-mtk-io.h
24
u32 tmp = readl(reg);
drivers/phy/mediatek/phy-mtk-io.h
32
u32 tmp = readl(reg);
drivers/phy/mediatek/phy-mtk-tphy.c
395
tmp = readl(com + U3P_USBPHYACR1);
drivers/phy/mediatek/phy-mtk-tphy.c
401
tmp = readl(com + U3P_USBPHYACR1);
drivers/phy/mediatek/phy-mtk-tphy.c
408
tmp = readl(u2_banks->misc + U3P_MISC_REG1);
drivers/phy/mediatek/phy-mtk-tphy.c
416
tmp = readl(com + U3P_USBPHYACR1);
drivers/phy/mediatek/phy-mtk-tphy.c
422
tmp = readl(com + U3P_USBPHYACR6);
drivers/phy/mediatek/phy-mtk-tphy.c
428
tmp = readl(com + U3P_USBPHYACR6);
drivers/phy/mediatek/phy-mtk-tphy.c
526
tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
drivers/phy/mediatek/phy-mtk-tphy.c
532
tmp = readl(u3_banks->phya + U3P_U3_PHYA_REG0);
drivers/phy/mediatek/phy-mtk-tphy.c
538
tmp = readl(u3_banks->phyd + U3P_U3_PHYD_IMPCAL0);
drivers/phy/mediatek/phy-mtk-tphy.c
544
tmp = readl(u3_banks->phyd + U3P_U3_PHYD_IMPCAL1);
drivers/phy/mediatek/phy-mtk-tphy.c
709
tmp = readl(fmreg + U3P_U2FREQ_FMCR0);
drivers/phy/mediatek/phy-mtk-tphy.c
724
fm_out = readl(fmreg + U3P_U2FREQ_VALUE);
drivers/phy/mediatek/phy-mtk-tphy.c
933
tmp = readl(u2_banks->com + U3P_U2PHYDTM1);
drivers/phy/mediatek/phy-mtk-xsphy.c
151
fm_out = readl(pbase + XSP_U2FREQ_MMONR0);
drivers/phy/mediatek/phy-mtk-xsphy.c
226
tmp = readl(inst->port_base + XSP_U2PHYDTM1);
drivers/phy/microchip/lan966x_serdes.c
235
value = readl(macro->ctrl->regs + lan_offset(HSIO_SD_STAT(idx)));
drivers/phy/microchip/lan966x_serdes.c
250
value = readl(macro->ctrl->regs + lan_offset(HSIO_SD_STAT(idx)));
drivers/phy/microchip/lan966x_serdes.c
268
value = readl(macro->ctrl->regs + lan_offset(HSIO_SD_STAT(idx)));
drivers/phy/microchip/lan966x_serdes.c
278
value = readl(macro->ctrl->regs + lan_offset(HSIO_SD_STAT(idx)));
drivers/phy/microchip/lan966x_serdes.c
488
val = readl(macro->ctrl->regs + lan_offset(HSIO_HW_CFG));
drivers/phy/microchip/lan966x_serdes.c
54
v = readl(mem + offset);
drivers/phy/microchip/lan966x_serdes.c
594
val = readl(hw_stat);
drivers/phy/microchip/sparx5_serdes.c
1045
value = readl(sdx5_addr(regs, SD_CMU_CMU_E0(cmu_idx)));
drivers/phy/microchip/sparx5_serdes.c
1597
value = readl(sdx5_addr(regs, SD25G_LANE_CMU_C0(sd_index)));
drivers/phy/microchip/sparx5_serdes.c
1605
value = readl(sdx5_addr(regs, SD_LANE_25G_SD_LANE_STAT(sd_index)));
drivers/phy/microchip/sparx5_serdes.c
2093
value = readl(sdx5_addr(regs, SD_LANE_SD_LANE_STAT(lane_index)));
drivers/phy/microchip/sparx5_serdes.h
122
nval = readl(addr);
drivers/phy/microchip/sparx5_serdes.h
137
nval = readl(addr);
drivers/phy/microchip/sparx5_serdes.h
146
nval = readl(addr);
drivers/phy/phy-airoha-pcie.c
179
readl(pcie_phy->pma0 +
drivers/phy/phy-airoha-pcie.c
200
readl(pcie_phy->pma0 +
drivers/phy/phy-airoha-pcie.c
225
val = readl(pcie_phy->pma0 + REG_PCIE_PMA_RO_RX_FREQDET);
drivers/phy/phy-airoha-pcie.c
339
readl(pcie_phy->pma1 +
drivers/phy/phy-airoha-pcie.c
360
readl(pcie_phy->pma1 +
drivers/phy/phy-airoha-pcie.c
385
val = readl(pcie_phy->pma1 + REG_PCIE_PMA_RO_RX_FREQDET);
drivers/phy/phy-airoha-pcie.c
54
u32 val = readl(reg) & ~mask;
drivers/phy/phy-airoha-pcie.c
61
u32 val = readl(reg) | mask;
drivers/phy/phy-airoha-pcie.c
68
u32 tmp = readl(reg);
drivers/phy/phy-google-usb.c
69
reg = readl(gphy->usbdp_top_base + USBCS_PHY_CFG1_OFFSET);
drivers/phy/phy-google-usb.c
73
reg = readl(gphy->usbdp_top_base + USBCS_PHY_CFG1_OFFSET);
drivers/phy/phy-lgm-usb.c
86
writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1);
drivers/phy/phy-spacemit-k1-pcie.c
192
val = readl(regs + PCIE_PU_ADDR_CLK_CFG);
drivers/phy/phy-spacemit-k1-pcie.c
197
val = readl(regs + PCIE_PU_PLL_1);
drivers/phy/phy-spacemit-k1-pcie.c
211
val = readl(regs + PCIE_PU_ADDR_CLK_CFG);
drivers/phy/phy-spacemit-k1-pcie.c
220
val = readl(regs + PCIE_RC_DONE_STATUS);
drivers/phy/phy-spacemit-k1-pcie.c
224
val = readl(regs + PCIE_PU_PLL_1);
drivers/phy/phy-spacemit-k1-pcie.c
229
val = readl(regs + PCIE_PU_PLL_2);
drivers/phy/phy-spacemit-k1-pcie.c
250
val = readl(regs + PCIE_PU_PLL_1);
drivers/phy/phy-spacemit-k1-pcie.c
258
val = readl(regs + PCIE_PU_ADDR_CLK_CFG);
drivers/phy/phy-spacemit-k1-pcie.c
337
val = readl(regs + PCIE_RX_REG1);
drivers/phy/phy-spacemit-k1-pcie.c
347
val = readl(regs + PCIE_RX_REG2);
drivers/phy/phy-spacemit-k1-pcie.c
352
val = readl(regs + PCIE_TX_REG1);
drivers/phy/phy-spacemit-k1-pcie.c
363
val = readl(regs + PCIE_RC_CAL_REG2);
drivers/phy/phy-spacemit-k1-pcie.c
373
val = readl(regs + PCIE_LTSSM_DIS_ENTRY);
drivers/phy/phy-spacemit-k1-pcie.c
474
val = readl(k1_phy->regs + PCIE_RCAL_RESULT);
drivers/phy/phy-xgene.c
1145
readl(csr_serdes + SATA_ENET_SDS_RST_CTL); /* Force a barrier */
drivers/phy/phy-xgene.c
1264
val = readl(sds_base + SATA_ENET_SDS_RST_CTL); /* Force a barrier */
drivers/phy/phy-xgene.c
1267
readl(sds_base + SATA_ENET_SDS_RST_CTL); /* Force a barrier */
drivers/phy/phy-xgene.c
1270
readl(sds_base + SATA_ENET_SDS_RST_CTL); /* Force a barrier */
drivers/phy/phy-xgene.c
1273
val = readl(sds_base + SATA_ENET_SDS_CTL1);
drivers/phy/phy-xgene.c
1279
val = readl(sds_base + SATA_ENET_SDS_CTL0);
drivers/phy/phy-xgene.c
1297
val = readl(sds_base + SATA_ENET_SDS_PCS_CTL0);
drivers/phy/phy-xgene.c
561
readl(csr_base + indirect_data_reg); /* Force a barrier */
drivers/phy/phy-xgene.c
563
readl(csr_base + indirect_cmd_reg); /* Force a barrier */
drivers/phy/phy-xgene.c
565
val = readl(csr_base + indirect_cmd_reg);
drivers/phy/phy-xgene.c
583
readl(csr_base + indirect_cmd_reg); /* Force a barrier */
drivers/phy/phy-xgene.c
585
val = readl(csr_base + indirect_cmd_reg);
drivers/phy/phy-xgene.c
588
*data = readl(csr_base + indirect_data_reg);
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
146
u32 write_val, tmp = readl(phy_dwc3->base + offset);
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
154
tmp = readl(phy_dwc3->base + offset);
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
238
readl(phy_dwc3->base + CR_PROTOCOL_DATA_OUT_REG);
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
246
*val = readl(phy_dwc3->base + CR_PROTOCOL_DATA_OUT_REG);
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
318
data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG);
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
416
data = readl(phy_dwc3->base + SSUSB_PHY_PARAM_CTRL_1);
drivers/phy/qualcomm/phy-qcom-m31-eusb2.c
134
tmp = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-m31-eusb2.c
140
tmp = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-pcie2.c
104
val = readl(qphy->base + PCIE20_PARF_PCS_SWING_CTRL2);
drivers/phy/qualcomm/phy-qcom-pcie2.c
110
val = readl(qphy->base + PCIE20_PARF_PCS_DEEMPH1);
drivers/phy/qualcomm/phy-qcom-pcie2.c
115
val = readl(qphy->base + PCIE20_PARF_PCS_DEEMPH2);
drivers/phy/qualcomm/phy-qcom-pcie2.c
120
val = readl(qphy->base + PCIE20_PARF_PCS_DEEMPH3);
drivers/phy/qualcomm/phy-qcom-pcie2.c
126
val = readl(qphy->base + PCIE20_PARF_CONFIGBITS);
drivers/phy/qualcomm/phy-qcom-pcie2.c
132
val = readl(qphy->base + PCIE20_PARF_PHY_CTRL3);
drivers/phy/qualcomm/phy-qcom-pcie2.c
138
val = readl(qphy->base + PCIE20_PARF_PCS_CTRL);
drivers/phy/qualcomm/phy-qcom-pcie2.c
143
val = readl(qphy->base + PCIE2_PHY_RESET_CTRL);
drivers/phy/qualcomm/phy-qcom-pcie2.c
177
val = readl(qphy->base + PCIE2_PHY_RESET_CTRL);
drivers/phy/qualcomm/phy-qcom-pcie2.c
75
val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2);
drivers/phy/qualcomm/phy-qcom-pcie2.c
82
val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2);
drivers/phy/qualcomm/phy-qcom-pcie2.c
87
val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL3);
drivers/phy/qualcomm/phy-qcom-pcie2.c
94
val = readl(qphy->base + PCIE2_PHY_RESET_CTRL);
drivers/phy/qualcomm/phy-qcom-pcie2.c
99
val = readl(qphy->base + PCIE20_PARF_PCS_SWING_CTRL1);
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
2338
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
2343
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
2350
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
2355
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
225
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
230
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
237
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
242
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
3343
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
3351
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
3356
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
3363
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
3368
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
1208
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
1213
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
1220
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
1225
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c
554
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c
559
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c
566
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c
571
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
1446
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
1451
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
1458
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
1463
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
481
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
486
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
493
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
498
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qusb2.c
478
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qusb2.c
484
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qusb2.c
491
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qusb2.c
496
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qusb2.c
503
reg = readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qusb2.c
508
readl(base + offset);
drivers/phy/qualcomm/phy-qcom-qusb2.c
799
val = readl(qphy->base + QUSB2PHY_PLL_TEST);
drivers/phy/qualcomm/phy-qcom-qusb2.c
868
readl(qphy->base + QUSB2PHY_PLL_TEST);
drivers/phy/qualcomm/phy-qcom-usb-ss.c
47
writel((readl(addr) & ~mask) | val, addr);
drivers/phy/ralink/phy-ralink-usb.c
68
return readl(phy->base + reg);
drivers/phy/realtek/phy-rtk-usb2.c
146
ret = read_poll_timeout(readl, val, ((val & mask) == result),
drivers/phy/realtek/phy-rtk-usb2.c
183
val = readl(reg_gusb2phyacc0);
drivers/phy/realtek/phy-rtk-usb3.c
103
ret = read_poll_timeout(readl, val, ((val & mask) == result),
drivers/phy/realtek/phy-rtk-usb3.c
129
value = readl(phy_reg->reg_mdio_ctl);
drivers/phy/renesas/phy-rcar-gen2.c
132
value = readl(base + USBHS_UGCTRL);
drivers/phy/renesas/phy-rcar-gen2.c
141
value = readl(base + USBHS_UGSTS);
drivers/phy/renesas/phy-rcar-gen2.c
143
value = readl(base + USBHS_UGCTRL);
drivers/phy/renesas/phy-rcar-gen2.c
175
value = readl(base + USBHS_UGCTRL);
drivers/phy/renesas/phy-rcar-gen2.c
183
value = readl(base + USBHS_UGCTRL);
drivers/phy/renesas/phy-rcar-gen2.c
203
value = readl(base + USBHS_UGCTRL);
drivers/phy/renesas/phy-rcar-gen2.c
237
value = readl(base + USBHS_UGCTRL);
drivers/phy/renesas/phy-rcar-gen2.c
96
ugctrl2 = readl(drv->base + USBHS_UGCTRL2);
drivers/phy/renesas/phy-rcar-gen3-pcie.c
37
value = readl(base + reg);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
186
u32 val = readl(usb2_base + USB2_COMMCTRL);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
199
u32 val = readl(usb2_base + USB2_LINECTRL1);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
218
val = readl(usb2_base + vbus_ctrl_reg);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
252
u32 val = readl(usb2_base + USB2_OBINTEN);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
286
val = readl(usb2_base + USB2_LINECTRL1);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
293
val = readl(usb2_base + USB2_LINECTRL1);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
320
device = !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
321
vbus_valid = !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_VBUSVALID);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
330
return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
332
return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
345
return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
455
val = readl(usb2_base + USB2_LINECTRL1);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
462
val = readl(usb2_base + USB2_VBCTRL);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
465
val = readl(usb2_base + USB2_ADPCTRL);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
469
val = readl(usb2_base + USB2_VBCTRL);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
472
val = readl(usb2_base + USB2_ADPCTRL);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
492
val = readl(usb2_base + USB2_VBCTRL);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
515
status = readl(usb2_base + USB2_OBINTSTA);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
543
val = readl(usb2_base + USB2_INT_ENABLE);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
558
writel(readl(usb2_base + USB2_VBCTRL) | USB2_VBCTRL_SIDDQREL,
drivers/phy/renesas/phy-rcar-gen3-usb2.c
564
val = readl(usb2_base + USB2_REGEN_CG_CTRL) | USB2_REGEN_CG_CTRL_UPHY_WEN;
drivers/phy/renesas/phy-rcar-gen3-usb2.c
587
val = readl(usb2_base + USB2_INT_ENABLE);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
615
val = readl(usb2_base + USB2_USBCTR);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
638
u32 val = readl(channel->base + USB2_USBCTR);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
810
val = readl(channel->base + USB2_AHB_BUS_CTR);
drivers/phy/renesas/phy-rcar-gen3-usb2.c
865
val = readl(usb2_base + vbus_ctrl_reg);
drivers/phy/renesas/phy-rzg3e-usb3.c
101
val = readl(base + USB3_TEST_UTMICTRL2);
drivers/phy/renesas/phy-rzg3e-usb3.c
76
val = readl(base + USB3_TEST_UTMICTRL2);
drivers/phy/renesas/phy-rzg3e-usb3.c
80
val = readl(base + USB3_TEST_PRMCTRL5_R);
drivers/phy/renesas/phy-rzg3e-usb3.c
85
val = readl(base + USB3_TEST_PRMCTRL6_R);
drivers/phy/renesas/phy-rzg3e-usb3.c
90
val = readl(base + USB3_TEST_RESET);
drivers/phy/rockchip/phy-rockchip-inno-csidphy.c
205
val = readl(priv->phy_base + drv_data->ths_settle_offset + offset);
drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c
330
orig = readl(inno->phy_base + reg);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
1022
val = readl(priv->mmio + RK3568_PHYREG15);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
1160
val = readl(priv->mmio + RK3568_PHYREG8);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
1263
val = readl(priv->mmio + RK3568_PHYREG15);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
1288
val = readl(priv->mmio + RK3568_PHYREG15);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
1368
val = readl(priv->mmio + RK3568_PHYREG14);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
1375
val = readl(priv->mmio + RK3568_PHYREG8);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
221
temp = readl(priv->mmio + reg);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
703
val = readl(priv->mmio + RK3568_PHYREG14);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
710
val = readl(priv->mmio + RK3568_PHYREG8);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
775
val = readl(priv->mmio + RK3568_PHYREG15);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
810
val = readl(priv->mmio + RK3568_PHYREG15);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
906
val = readl(priv->mmio + RK3568_PHYREG14);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
913
val = readl(priv->mmio + RK3568_PHYREG8);
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
991
val = readl(priv->mmio + RK3568_PHYREG15);
drivers/phy/rockchip/phy-rockchip-typec.c
476
rdata = readl(tcphy->base + CMN_DIAG_HSCLK_SEL);
drivers/phy/rockchip/phy-rockchip-typec.c
555
rdata = readl(tcphy->base + XCVR_DIAG_PLLDRC_CTRL(lane));
drivers/phy/rockchip/phy-rockchip-typec.c
580
tx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);
drivers/phy/rockchip/phy-rockchip-typec.c
601
val = readl(tcphy->base + CMN_TXPUCAL_CTRL);
drivers/phy/rockchip/phy-rockchip-typec.c
603
val = readl(tcphy->base + CMN_TXPDCAL_CTRL);
drivers/phy/rockchip/phy-rockchip-typec.c
605
val = readl(tcphy->base + CMN_TXPU_ADJ_CTRL);
drivers/phy/rockchip/phy-rockchip-typec.c
607
val = readl(tcphy->base + CMN_TXPD_ADJ_CTRL);
drivers/phy/rockchip/phy-rockchip-typec.c
612
tx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);
drivers/phy/rockchip/phy-rockchip-typec.c
617
val = readl(tcphy->base + TX_DIG_CTRL_REG_2);
drivers/phy/rockchip/phy-rockchip-typec.c
717
val = readl(tcphy->base + TX_DIG_CTRL_REG_2);
drivers/phy/rockchip/phy-rockchip-typec.c
775
ret = readx_poll_timeout(readl, tcphy->base + PMA_CMN_CTRL1,
drivers/phy/rockchip/phy-rockchip-typec.c
982
ret = readx_poll_timeout(readl, tcphy->base + DP_MODE_CTL,
drivers/phy/rockchip/phy-rockchip-typec.c
994
ret = readx_poll_timeout(readl, tcphy->base + DP_MODE_CTL,
drivers/phy/samsung/phy-exynos4210-usb2.c
182
clk = readl(drv->reg_phy + EXYNOS_4210_UPHYCLK);
drivers/phy/samsung/phy-exynos4210-usb2.c
187
pwr = readl(drv->reg_phy + EXYNOS_4210_UPHYPWR);
drivers/phy/samsung/phy-exynos4210-usb2.c
191
rst = readl(drv->reg_phy + EXYNOS_4210_UPHYRST);
drivers/phy/samsung/phy-exynos4210-usb2.c
201
pwr = readl(drv->reg_phy + EXYNOS_4210_UPHYPWR);
drivers/phy/samsung/phy-exynos4x12-usb2.c
197
clk = readl(drv->reg_phy + EXYNOS_4x12_UPHYCLK);
drivers/phy/samsung/phy-exynos4x12-usb2.c
240
pwr = readl(drv->reg_phy + EXYNOS_4x12_UPHYPWR);
drivers/phy/samsung/phy-exynos4x12-usb2.c
244
rst = readl(drv->reg_phy + EXYNOS_4x12_UPHYRST);
drivers/phy/samsung/phy-exynos4x12-usb2.c
254
pwr = readl(drv->reg_phy + EXYNOS_4x12_UPHYPWR);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1210
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1230
reg = readl(phy_drd->reg_phy + EXYNOS7870_DRD_HSPHYPLLTUNE);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1240
reg = readl(phy_drd->reg_phy + EXYNOS7870_DRD_HSPHYCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1247
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_LINKSYSTEM);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1260
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1276
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_LINKPORT);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1281
reg = readl(phy_drd->reg_phy + EXYNOS7870_DRD_HSPHYCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1287
reg = readl(phy_drd->reg_phy + EXYNOS7870_DRD_HSPHYCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1329
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1336
reg = readl(phy_drd->reg_phy + EXYNOS7870_DRD_HSPHYCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1341
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_LINKSYSTEM);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1374
reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1379
reg = readl(regs_base + EXYNOS2200_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1384
reg = readl(regs_base + EXYNOS2200_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1396
reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1407
reg = readl(regs_base + EXYNOS2200_DRD_HSP_MISC);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1419
reg = readl(regs_base + EXYNOS2200_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1480
reg = readl(regs_base + EXYNOS2200_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1484
reg = readl(regs_base + EXYNOS2200_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1508
reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1514
reg = readl(regs_base + EXYNOS850_DRD_SECPMACTL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1530
reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1534
reg = readl(regs_base + EXYNOS850_DRD_LINKPORT);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1538
reg = readl(regs_base + EXYNOS850_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1548
reg = readl(regs_base + EXYNOS850_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1554
reg = readl(regs_base + EXYNOS850_DRD_HSP);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1559
reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1564
reg = readl(regs_base + EXYNOS850_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1568
reg = readl(regs_base + EXYNOS850_DRD_HSP);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1573
reg = readl(regs_base + EXYNOS850_DRD_SSPPLLCTL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1603
reg = readl(regs_base + EXYNOS850_DRD_HSP_TEST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1609
reg = readl(regs_base + EXYNOS850_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1619
reg = readl(regs_base + EXYNOS850_DRD_HSP);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1661
reg = readl(regs_base + EXYNOS850_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1667
reg = readl(regs_base + EXYNOS850_DRD_HSP_TEST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1672
reg = readl(regs_base + EXYNOS850_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1701
reg = readl(regs_pma + EXYNOS9_PMA_USBDP_CMN_REG0008);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1713
reg = readl(regs_phy + EXYNOS850_DRD_SECPMACTL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1858
reg = readl(regs_base + EXYNOS850_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1862
reg = readl(regs_base + EXYNOS850_DRD_HSP);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1867
reg = readl(regs_base + EXYNOS850_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
1871
reg = readl(regs_base + EXYNOS850_DRD_HSP);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2116
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CR_PARA_CON0);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2137
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CR_PARA_CON0);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2173
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CR_PARA_CON0);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2197
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CR_PARA_CON2);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2204
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CR_PARA_CON0);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2221
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CR_PARA_CON0);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2245
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_RST_CTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2249
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_RST_CTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2265
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_RST_CTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2269
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_RST_CTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2297
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CONFIG0);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2308
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CONFIG7);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2325
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CONFIG4);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2350
reg = readl(reg_phy + EXYNOSAUTOV920_USB31DRD_PHY_CONFIG7);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2366
reg = readl(reg_phy + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2371
reg = readl(reg_phy + EXYNOS2200_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2376
reg = readl(reg_phy + EXYNOSAUTOV920_DRD_HSP_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2381
reg = readl(reg_phy + EXYNOS2200_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2387
reg = readl(reg_phy + EXYNOSAUTOV920_DRD_HSPCTL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2394
reg = readl(reg_phy + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2398
reg = readl(reg_phy + EXYNOS2200_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2402
reg = readl(reg_phy + EXYNOSAUTOV920_DRD_HSPCTL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2407
reg = readl(reg_phy + EXYNOSAUTOV920_DRD_HSPPLLTUNE);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2434
reg = readl(reg_phy + EXYNOSAUTOV920_DRD_HSP_TEST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2442
reg = readl(reg_phy + EXYNOSAUTOV920_DRD_HSP_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2451
reg = readl(reg_phy + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2456
reg = readl(reg_phy + EXYNOS2200_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2468
reg = readl(reg_phy + EXYNOS2200_DRD_UTMI);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2474
reg = readl(reg_phy + EXYNOSAUTOV920_DRD_HSP_TEST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2479
reg = readl(reg_phy + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
2484
reg = readl(reg_phy + EXYNOS2200_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
609
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
659
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
703
reg = readl(reg_base + tune->off);
drivers/phy/samsung/phy-exynos5-usbdrd.c
715
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
drivers/phy/samsung/phy-exynos5-usbdrd.c
721
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
733
reg = readl(regs_base + EXYNOS850_DRD_CLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
737
reg = readl(regs_base + EXYNOS850_DRD_SECPMACTL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
751
reg = readl(regs_base + EXYNOS850_DRD_SECPMACTL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
758
reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
765
reg = readl(regs_base + EXYNOS850_DRD_SECPMACTL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
777
reg = readl(regs_base + EXYNOS9_PMA_USBDP_CMN_REG00B8);
drivers/phy/samsung/phy-exynos5-usbdrd.c
792
reg = readl(regs_base + EXYNOS9_PMA_USBDP_TRSV_REG0413);
drivers/phy/samsung/phy-exynos5-usbdrd.c
803
reg = readl(regs_base + EXYNOS9_PMA_USBDP_TRSV_REG0813);
drivers/phy/samsung/phy-exynos5-usbdrd.c
866
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
drivers/phy/samsung/phy-exynos5-usbdrd.c
872
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1);
drivers/phy/samsung/phy-exynos5-usbdrd.c
881
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
909
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0);
drivers/phy/samsung/phy-exynos5-usbdrd.c
915
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMICLKSEL);
drivers/phy/samsung/phy-exynos5-usbdrd.c
965
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST);
drivers/phy/samsung/phy-exynos5-usbdrd.c
972
reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST);
drivers/phy/samsung/phy-exynos5250-sata.c
101
val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
drivers/phy/samsung/phy-exynos5250-sata.c
107
val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
drivers/phy/samsung/phy-exynos5250-sata.c
111
val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
drivers/phy/samsung/phy-exynos5250-sata.c
115
val = readl(sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);
drivers/phy/samsung/phy-exynos5250-sata.c
120
val = readl(sata_phy->regs + EXYNOS5_SATA_PHSATA_CTRLM);
drivers/phy/samsung/phy-exynos5250-sata.c
124
val = readl(sata_phy->regs + EXYNOS5_SATA_CTRL0);
drivers/phy/samsung/phy-exynos5250-sata.c
128
val = readl(sata_phy->regs + EXYNOS5_SATA_MODE0);
drivers/phy/samsung/phy-exynos5250-sata.c
137
val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
drivers/phy/samsung/phy-exynos5250-sata.c
141
val = readl(sata_phy->regs + EXYNOS5_SATA_RESET);
drivers/phy/samsung/phy-exynos5250-sata.c
62
if ((readl(base + reg) & checkbit) == status)
drivers/phy/samsung/phy-exynos5250-usb2.c
212
otg = readl(drv->reg_phy + EXYNOS_5250_USBOTGSYS);
drivers/phy/samsung/phy-exynos5250-usb2.c
242
ctrl0 = readl(drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
drivers/phy/samsung/phy-exynos5250-usb2.c
264
otg = readl(drv->reg_phy + EXYNOS_5250_USBOTGSYS);
drivers/phy/samsung/phy-exynos5250-usb2.c
301
ehci = readl(drv->reg_phy + EXYNOS_5250_HOSTEHCICTRL);
drivers/phy/samsung/phy-exynos5250-usb2.c
309
ohci = readl(drv->reg_phy + EXYNOS_5250_HOSTOHCICTRL);
drivers/phy/samsung/phy-exynos5250-usb2.c
332
otg = readl(drv->reg_phy + EXYNOS_5250_USBOTGSYS);
drivers/phy/samsung/phy-exynos5250-usb2.c
339
ctrl0 = readl(drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
drivers/phy/samsung/phy-exynosautov920-ufs.c
127
reg = readl(ufs_phy->reg_pma + EXYNOSAUTOV920_CDR_LOCK_OFFSET +
drivers/phy/samsung/phy-gs101-ufs.c
181
val = readl(ufs_phy->reg_pma +
drivers/phy/samsung/phy-s5pv210-usb2.c
132
pwr = readl(drv->reg_phy + S5PV210_UPHYPWR);
drivers/phy/samsung/phy-s5pv210-usb2.c
136
rst = readl(drv->reg_phy + S5PV210_UPHYRST);
drivers/phy/samsung/phy-s5pv210-usb2.c
147
pwr = readl(drv->reg_phy + S5PV210_UPHYPWR);
drivers/phy/socionext/phy-uniphier-ahci.c
118
val = readl(priv->base + CKCTRL0);
drivers/phy/socionext/phy-uniphier-ahci.c
123
val = readl(priv->base + RXTXCTRL);
drivers/phy/socionext/phy-uniphier-ahci.c
163
val = readl(priv->base + RXTXCTRL);
drivers/phy/socionext/phy-uniphier-ahci.c
168
val = readl(priv->base + CKCTRL0);
drivers/phy/socionext/phy-uniphier-ahci.c
184
val = readl(priv->base + RXTXCTRL);
drivers/phy/socionext/phy-uniphier-ahci.c
189
val = readl(priv->base + CKCTRL0);
drivers/phy/socionext/phy-uniphier-ahci.c
201
val = readl(priv->base + CKCTRL);
drivers/phy/socionext/phy-uniphier-ahci.c
251
val = readl(priv->base + TXCTRL0);
drivers/phy/socionext/phy-uniphier-ahci.c
260
val = readl(priv->base + TXCTRL1);
drivers/phy/socionext/phy-uniphier-ahci.c
268
val = readl(priv->base + RXCTRL);
drivers/phy/socionext/phy-uniphier-ahci.c
278
readl(priv->base + CKCTRL);
drivers/phy/socionext/phy-uniphier-ahci.c
79
val = readl(priv->base + CKCTRL0);
drivers/phy/socionext/phy-uniphier-ahci.c
89
val = readl(priv->base + CKCTRL1);
drivers/phy/socionext/phy-uniphier-ahci.c
96
val = readl(priv->base + RXTXCTRL);
drivers/phy/socionext/phy-uniphier-pcie.c
126
val = readl(priv->base + PCL_PHY_RESET);
drivers/phy/socionext/phy-uniphier-pcie.c
136
val = readl(priv->base + PCL_PHY_RESET);
drivers/phy/socionext/phy-uniphier-pcie.c
164
val = readl(priv->base + PCL_PHY_CLKCTRL);
drivers/phy/socionext/phy-uniphier-pcie.c
81
readl(priv->base + PCL_PHY_TEST_O);
drivers/phy/socionext/phy-uniphier-pcie.c
82
readl(priv->base + PCL_PHY_TEST_O);
drivers/phy/socionext/phy-uniphier-pcie.c
87
u32 val = readl(priv->base + PCL_PHY_TEST_O);
drivers/phy/socionext/phy-uniphier-usb3hs.c
182
val = readl(priv->base + HSPHY_CFG1);
drivers/phy/socionext/phy-uniphier-usb3hs.c
188
val = readl(priv->base + HSPHY_CFG1);
drivers/phy/socionext/phy-uniphier-usb3hs.c
192
val = readl(priv->base + HSPHY_CFG1);
drivers/phy/socionext/phy-uniphier-usb3hs.c
198
val = readl(priv->base + HSPHY_CFG1);
drivers/phy/socionext/phy-uniphier-usb3ss.c
104
readl(priv->base + SSPHY_TESTO);
drivers/phy/socionext/phy-uniphier-usb3ss.c
74
readl(priv->base + SSPHY_TESTO);
drivers/phy/socionext/phy-uniphier-usb3ss.c
75
readl(priv->base + SSPHY_TESTO);
drivers/phy/socionext/phy-uniphier-usb3ss.c
89
val = readl(priv->base + SSPHY_TESTO) & TESTO_DAT_MASK;
drivers/phy/starfive/phy-jh7110-dphy-tx.c
246
tmp = readl(dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(100));
drivers/phy/starfive/phy-jh7110-pcie.c
90
val = readl(data->regs + PCIE_USB3_PHY_PLL_CTL_OFF);
drivers/phy/starfive/phy-jh7110-usb.c
43
val = readl(phy->regs + USB_LS_KEEPALIVE_OFF);
drivers/phy/starfive/phy-jh7110-usb.c
93
val = readl(phy->regs + USB_CLK_MODE_OFF);
drivers/phy/sunplus/phy-sunplus-usb2.c
104
val = readl(usbphy->phy_regs + CONFIG7);
drivers/phy/sunplus/phy-sunplus-usb2.c
135
val = readl(usbphy->phy_regs + CONFIG9);
drivers/phy/sunplus/phy-sunplus-usb2.c
139
val = readl(usbphy->phy_regs + CONFIG1);
drivers/phy/sunplus/phy-sunplus-usb2.c
143
val = readl(usbphy->phy_regs + CONFIG23);
drivers/phy/sunplus/phy-sunplus-usb2.c
175
pll_pwr_off = (readl(usbphy->moon4_regs + UPHY_CONTROL3) & ~LOW_MASK_BITS)
drivers/phy/sunplus/phy-sunplus-usb2.c
177
pll_pwr_on = (readl(usbphy->moon4_regs + UPHY_CONTROL3) & ~LOW_MASK_BITS)
drivers/phy/sunplus/phy-sunplus-usb2.c
203
pll_pwr_off = (readl(usbphy->moon4_regs + UPHY_CONTROL3) & ~LOW_MASK_BITS)
drivers/phy/tegra/xusb-tegra186.c
288
return readl(priv->ao_regs + offset);
drivers/phy/tegra/xusb.h
475
u32 value = readl(padctl->regs + offset);
drivers/phy/ti/phy-omap-control.c
148
val = readl(ctrl_phy->otghs_control);
drivers/phy/ti/phy-omap-control.c
166
val = readl(ctrl_phy->otghs_control);
drivers/phy/ti/phy-omap-control.c
185
val = readl(ctrl_phy->otghs_control);
drivers/phy/ti/phy-omap-control.c
45
val = readl(control_phy->pcie_pcs);
drivers/phy/ti/phy-omap-control.c
78
val = readl(control_phy->power);
drivers/phy/xilinx/phy-zynqmp.c
271
return readl(gtr_dev->serdes + reg);
drivers/phy/xilinx/phy-zynqmp.c
294
return readl(addr);
drivers/phy/xilinx/phy-zynqmp.c
312
writel((readl(addr) & ~clr) | set, addr);
drivers/pinctrl/bcm/pinctrl-bcm2835.c
254
return readl(pc->base + reg);
drivers/pinctrl/bcm/pinctrl-brcmstb.c
116
val = readl(pc->base + BIT_TO_REG(bit));
drivers/pinctrl/bcm/pinctrl-brcmstb.c
294
val = readl(pc->base + BIT_TO_REG(bit));
drivers/pinctrl/bcm/pinctrl-brcmstb.c
311
val = readl(pc->base + BIT_TO_REG(bit));
drivers/pinctrl/bcm/pinctrl-brcmstb.c
67
val = readl(pc->base + BIT_TO_REG(bit));
drivers/pinctrl/bcm/pinctrl-cygnus-mux.c
813
val = readl(pinctrl->base0 + grp->mux.offset);
drivers/pinctrl/bcm/pinctrl-cygnus-mux.c
855
val = readl(pinctrl->base1 + mux->offset);
drivers/pinctrl/bcm/pinctrl-cygnus-mux.c
882
val = readl(pinctrl->base1 + mux->offset);
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
148
val = readl(chip->base + offset);
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
162
return !!(readl(chip->base + offset) & BIT(shift));
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
176
unsigned long val = readl(chip->base + (i * GPIO_BANK_SIZE) +
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
387
if (readl(chip->base + offset) & BIT(shift))
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
414
return !!(readl(chip->base + offset) & BIT(shift));
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
511
val_1 = readl(base + IPROC_GPIO_PULL_UP_OFFSET);
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
512
val_2 = readl(base + IPROC_GPIO_PULL_DN_OFFSET);
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
557
val_1 = readl(base + IPROC_GPIO_PULL_UP_OFFSET) & BIT(shift);
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
558
val_2 = readl(base + IPROC_GPIO_PULL_DN_OFFSET) & BIT(shift);
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
603
val = readl(base + offset);
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c
633
val = readl(base + offset) & BIT(shift);
drivers/pinctrl/bcm/pinctrl-ns.c
177
tmp = readl(ns_pinctrl->base);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
621
val = readl(base_address + grp->mux.offset);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
664
val = readl(base_address + pin_data->pin_conf.offset);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
685
enable = readl(pinctrl->pinconf_base + pin_data->pin_conf.offset);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
710
val = readl(base_address + pin_data->pin_conf.offset);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
732
val = readl(pinctrl->pinconf_base + pin_data->pin_conf.offset);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
751
val = readl(base_address + pin_data->pin_conf.offset);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
776
val = readl(pinctrl->pinconf_base + pin_data->pin_conf.offset);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
804
val = readl(base_address + pin_data->pin_conf.offset);
drivers/pinctrl/bcm/pinctrl-ns2-mux.c
824
val = readl(pinctrl->pinconf_base + pin_data->pin_conf.offset);
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
103
val = readl(base_address + reg);
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
120
return !!(readl(chip->io_ctrl + reg) & BIT(gpio));
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
122
return !!(readl(chip->base + reg) & BIT(gpio));
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
134
int_status = readl(chip->base + NSP_CHIP_A_INT_STATUS);
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
139
event = readl(chip->base + NSP_GPIO_EVENT_INT_MASK) &
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
140
readl(chip->base + NSP_GPIO_EVENT);
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
141
level = readl(chip->base + NSP_GPIO_DATA_IN) ^
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
142
readl(chip->base + NSP_GPIO_INT_POLARITY);
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
143
level &= readl(chip->base + NSP_GPIO_INT_MASK);
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
331
return !!(readl(chip->base + NSP_GPIO_DATA_IN) & BIT(gpio));
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
410
val = readl(chip->io_ctrl + offset);
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
435
val = readl(chip->io_ctrl + offset) & BIT(shift);
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
667
val = readl(chip->base + NSP_CHIP_A_INT_MASK);
drivers/pinctrl/bcm/pinctrl-nsp-mux.c
441
val = readl(base_address);
drivers/pinctrl/bcm/pinctrl-nsp-mux.c
484
val = readl(pinctrl->base0);
drivers/pinctrl/bcm/pinctrl-nsp-mux.c
505
val = readl(pinctrl->base0);
drivers/pinctrl/cix/pinctrl-sky1-base.c
290
reg_val = readl(pin_reg);
drivers/pinctrl/cix/pinctrl-sky1-base.c
359
reg_val = readl(pin_reg);
drivers/pinctrl/cix/pinctrl-sky1-base.c
399
reg_val = readl(pin_reg);
drivers/pinctrl/freescale/pinctrl-imx.c
184
reg = readl(ipctl->base + pin_reg->mux_reg);
drivers/pinctrl/freescale/pinctrl-imx.c
219
val = readl(ipctl->base + pin_mmio->input_reg);
drivers/pinctrl/freescale/pinctrl-imx.c
307
*config = readl(ipctl->base + pin_reg->conf_reg);
drivers/pinctrl/freescale/pinctrl-imx.c
348
reg = readl(ipctl->base + pin_reg->conf_reg);
drivers/pinctrl/freescale/pinctrl-imx.c
403
config = readl(ipctl->base + pin_reg->conf_reg);
drivers/pinctrl/freescale/pinctrl-imx1-core.c
105
old_val = readl(reg);
drivers/pinctrl/freescale/pinctrl-imx1-core.c
125
old_val = readl(reg);
drivers/pinctrl/freescale/pinctrl-imx1-core.c
145
return (readl(reg) & (BIT(offset) | BIT(offset+1))) >> offset;
drivers/pinctrl/freescale/pinctrl-imx1-core.c
154
return !!(readl(reg) & BIT(offset));
drivers/pinctrl/freescale/pinctrl-imx7ulp.c
273
reg = readl(ipctl->base + pin_reg->mux_reg);
drivers/pinctrl/freescale/pinctrl-imx8ulp.c
232
reg = readl(ipctl->base + pin_reg->mux_reg);
drivers/pinctrl/freescale/pinctrl-mxs.c
197
tmp = readl(reg);
drivers/pinctrl/freescale/pinctrl-vf610.c
306
reg = readl(ipctl->base + pin_reg->mux_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1021
debounce = readl(db_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1061
val = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1078
old_val = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1098
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1116
reg = readl(val_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1141
reg = readl(val_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1181
conf0 = readl(conf_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1182
val = readl(val_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1299
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1335
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1390
pending = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1467
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1501
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1647
value = readl(reg) & BYT_CONF0_RESTORE_MASK;
drivers/pinctrl/intel/pinctrl-baytrail.c
1655
value = readl(reg) & BYT_VAL_RESTORE_MASK;
drivers/pinctrl/intel/pinctrl-baytrail.c
1679
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
1693
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
629
value = readl(padcfg0);
drivers/pinctrl/intel/pinctrl-baytrail.c
655
value = readl(padcfg0);
drivers/pinctrl/intel/pinctrl-baytrail.c
701
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
729
value = readl(reg) & BYT_PIN_MUX;
drivers/pinctrl/intel/pinctrl-baytrail.c
734
value = readl(reg) & ~BYT_PIN_MUX;
drivers/pinctrl/intel/pinctrl-baytrail.c
763
if (readl(conf_reg) & BYT_DIRECT_IRQ_EN)
drivers/pinctrl/intel/pinctrl-baytrail.c
780
value = readl(val_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
850
value = readl(reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
875
conf = readl(conf_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
876
val = readl(val_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
907
debounce = readl(db_reg);
drivers/pinctrl/intel/pinctrl-baytrail.c
960
conf = readl(conf_reg);
drivers/pinctrl/intel/pinctrl-cherryview.c
570
return readl(community->regs + offset);
drivers/pinctrl/intel/pinctrl-cherryview.c
580
readl(reg);
drivers/pinctrl/intel/pinctrl-cherryview.c
597
return readl(chv_padreg(pctrl, pin, offset));
drivers/pinctrl/intel/pinctrl-cherryview.c
606
readl(reg);
drivers/pinctrl/intel/pinctrl-intel.c
1030
padcfg0 = readl(reg);
drivers/pinctrl/intel/pinctrl-intel.c
1055
padcfg0 = readl(reg);
drivers/pinctrl/intel/pinctrl-intel.c
1081
padcfg0 = readl(reg);
drivers/pinctrl/intel/pinctrl-intel.c
1169
value = readl(reg);
drivers/pinctrl/intel/pinctrl-intel.c
1239
value = readl(reg);
drivers/pinctrl/intel/pinctrl-intel.c
1300
pending = readl(is);
drivers/pinctrl/intel/pinctrl-intel.c
1301
enabled = readl(reg);
drivers/pinctrl/intel/pinctrl-intel.c
1610
value = readl(regs + REVID);
drivers/pinctrl/intel/pinctrl-intel.c
1621
value = readl(regs + offset);
drivers/pinctrl/intel/pinctrl-intel.c
1644
offset = readl(regs + PADBAR);
drivers/pinctrl/intel/pinctrl-intel.c
1782
value = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
drivers/pinctrl/intel/pinctrl-intel.c
1805
val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG0));
drivers/pinctrl/intel/pinctrl-intel.c
1807
val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG1));
drivers/pinctrl/intel/pinctrl-intel.c
1812
pads[i].padcfg2 = readl(padcfg);
drivers/pinctrl/intel/pinctrl-intel.c
1823
communities[i].intmask[gpp] = readl(base + gpp * 4);
drivers/pinctrl/intel/pinctrl-intel.c
1827
communities[i].hostown[gpp] = readl(base + gpp * 4);
drivers/pinctrl/intel/pinctrl-intel.c
1837
curr = readl(reg);
drivers/pinctrl/intel/pinctrl-intel.c
1866
dev_dbg(dev, "restored hostown %u/%u %#08x\n", c, gpp, readl(base + gpp * 4));
drivers/pinctrl/intel/pinctrl-intel.c
1877
dev_dbg(dev, "restored mask %u/%u %#08x\n", c, gpp, readl(base + gpp * 4));
drivers/pinctrl/intel/pinctrl-intel.c
1895
dev_dbg(dev, "restored pin %u padcfg%u %#08x\n", pin, n, readl(padcfg));
drivers/pinctrl/intel/pinctrl-intel.c
220
return !(readl(padown) & PADOWN_MASK(gpp_offset));
drivers/pinctrl/intel/pinctrl-intel.c
244
return !(readl(hostown) & BIT(gpp_offset));
drivers/pinctrl/intel/pinctrl-intel.c
291
value = readl(community->regs + offset);
drivers/pinctrl/intel/pinctrl-intel.c
296
value = readl(community->regs + offset);
drivers/pinctrl/intel/pinctrl-intel.c
354
cfg0 = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
drivers/pinctrl/intel/pinctrl-intel.c
355
cfg1 = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
drivers/pinctrl/intel/pinctrl-intel.c
368
seq_printf(s, " 0x%08x", readl(padcfg));
drivers/pinctrl/intel/pinctrl-intel.c
450
value = readl(padcfg0);
drivers/pinctrl/intel/pinctrl-intel.c
517
return __intel_gpio_get_gpio_mode(readl(padcfg0));
drivers/pinctrl/intel/pinctrl-intel.c
524
value = readl(padcfg0);
drivers/pinctrl/intel/pinctrl-intel.c
583
value = readl(padcfg0);
drivers/pinctrl/intel/pinctrl-intel.c
611
value = readl(padcfg1);
drivers/pinctrl/intel/pinctrl-intel.c
692
value = readl(padcfg0);
drivers/pinctrl/intel/pinctrl-intel.c
712
value2 = readl(padcfg2);
drivers/pinctrl/intel/pinctrl-intel.c
839
value = readl(padcfg1);
drivers/pinctrl/intel/pinctrl-intel.c
856
value = readl(padcfg0);
drivers/pinctrl/intel/pinctrl-intel.c
884
value0 = readl(padcfg0);
drivers/pinctrl/intel/pinctrl-intel.c
885
value2 = readl(padcfg2);
drivers/pinctrl/intel/pinctrl-tangier.c
117
*value = readl(bufcfg);
drivers/pinctrl/intel/pinctrl-tangier.c
130
value = readl(bufcfg);
drivers/pinctrl/mediatek/mtk-eint.c
169
return !!(readl(reg) & bit);
drivers/pinctrl/mediatek/mtk-eint.c
346
dbnc = readl(eint->base[inst] + ctrl_offset);
drivers/pinctrl/mediatek/mtk-eint.c
367
status = readl(eint->base[i] + port * 4 + eint->regs->stat);
drivers/pinctrl/mediatek/mtk-eint.c
95
if (readl(reg) & bit)
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
1029
info->pm.irq_en_l = readl(info->base + IRQ_EN);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
1030
info->pm.irq_en_h = readl(info->base + IRQ_EN + sizeof(u32));
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
1031
info->pm.irq_pol_l = readl(info->base + IRQ_POL);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
1032
info->pm.irq_pol_h = readl(info->base + IRQ_POL + sizeof(u32));
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
552
val = readl(info->base + reg);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
568
val = readl(info->base + reg);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
582
val = readl(info->base + reg);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
602
val = readl(info->base + reg);
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
645
p = readl(info->base + IRQ_POL + 4 * reg_idx);
drivers/pinctrl/mvebu/pinctrl-armada-xp.c
549
mpp_saved_regs[i] = readl(soc->control_data[0].base + i * 4);
drivers/pinctrl/mvebu/pinctrl-dove.c
106
unsigned long mpp4 = readl(mpp4_base);
drivers/pinctrl/mvebu/pinctrl-dove.c
137
unsigned long mpp4 = readl(mpp4_base);
drivers/pinctrl/mvebu/pinctrl-dove.c
192
unsigned long pmu = readl(data->base + PMU_MPP_GENERAL_CTRL);
drivers/pinctrl/mvebu/pinctrl-dove.c
202
unsigned long pmu = readl(data->base + PMU_MPP_GENERAL_CTRL);
drivers/pinctrl/mvebu/pinctrl-dove.c
215
unsigned int mpp4 = readl(mpp4_base);
drivers/pinctrl/mvebu/pinctrl-dove.c
246
unsigned int mpp4 = readl(mpp4_base);
drivers/pinctrl/mvebu/pinctrl-dove.c
68
unsigned long pmu = readl(data->base + PMU_MPP_GENERAL_CTRL);
drivers/pinctrl/mvebu/pinctrl-dove.c
74
func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off);
drivers/pinctrl/mvebu/pinctrl-dove.c
86
unsigned long pmu = readl(data->base + PMU_MPP_GENERAL_CTRL);
drivers/pinctrl/mvebu/pinctrl-dove.c
95
func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off);
drivers/pinctrl/mvebu/pinctrl-mvebu.c
64
*config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK;
drivers/pinctrl/mvebu/pinctrl-mvebu.c
76
reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift);
drivers/pinctrl/mvebu/pinctrl-orion.c
37
*config = (readl(mpp_base + off) >> shift) & MVEBU_MPP_MASK;
drivers/pinctrl/mvebu/pinctrl-orion.c
40
*config = (readl(high_mpp_base) >> shift) & MVEBU_MPP_MASK;
drivers/pinctrl/mvebu/pinctrl-orion.c
53
u32 reg = readl(mpp_base + off) & ~(MVEBU_MPP_MASK << shift);
drivers/pinctrl/mvebu/pinctrl-orion.c
57
u32 reg = readl(high_mpp_base) & ~(MVEBU_MPP_MASK << shift);
drivers/pinctrl/nomadik/pinctrl-nomadik.c
221
afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~BIT(offset);
drivers/pinctrl/nomadik/pinctrl-nomadik.c
222
bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~BIT(offset);
drivers/pinctrl/nomadik/pinctrl-nomadik.c
236
pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
drivers/pinctrl/nomadik/pinctrl-nomadik.c
339
val = readl(reg);
drivers/pinctrl/nomadik/pinctrl-nomadik.c
385
if (readl(npct->prcm_base + reg) & BIT(bit)) {
drivers/pinctrl/nomadik/pinctrl-nomadik.c
414
if (readl(npct->prcm_base + reg) & BIT(bit)) {
drivers/pinctrl/nomadik/pinctrl-nomadik.c
463
slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
drivers/pinctrl/nomadik/pinctrl-nomadik.c
512
if (readl(npct->prcm_base + reg) & BIT(bit))
drivers/pinctrl/nuvoton/pinctrl-ma35.c
304
u32 regval = readl(reg_mode);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
314
u32 regval = readl(reg_mode);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
340
regval = readl(reg_dout);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
357
return !!(readl(reg_pin) & BIT(gpio));
drivers/pinctrl/nuvoton/pinctrl-ma35.c
367
regval = readl(reg_dout) | BIT(gpio);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
369
regval = readl(reg_dout) & ~BIT(gpio);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
414
regval = readl(reg_ien);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
430
regval = readl(reg_itype);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
435
regval = readl(reg_ien);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
497
isr = readl(bank->reg_base + MA35_GP_REG_INTSRC);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
624
regval = readl(base + MA35_GP_REG_PUSEL);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
672
regval = readl(base + MA35_GP_REG_PUSEL);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
712
regval = readl(base + MA35_GP_REG_SPW);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
733
regval = readl(base + MA35_GP_REG_SPW);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
755
regval = readl(base + MA35_GP_DS_REG(port));
drivers/pinctrl/nuvoton/pinctrl-ma35.c
795
regval = readl(base + MA35_GP_DS_REG(port));
drivers/pinctrl/nuvoton/pinctrl-ma35.c
813
regval = readl(base + MA35_GP_REG_SMTEN);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
827
regval = readl(base + MA35_GP_REG_SMTEN);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
848
regval = readl(base + MA35_GP_REG_SLEWCTL);
drivers/pinctrl/nuvoton/pinctrl-ma35.c
862
regval = readl(base + MA35_GP_REG_SLEWCTL);
drivers/pinctrl/pinctrl-amd.c
100
pin_reg = readl(gpio_dev->base + offset * 4);
drivers/pinctrl/pinctrl-amd.c
1033
gpio_dev->saved_regs[i] |= readl(gpio_dev->base + pin * 4) & PIN_IRQ_PENDING;
drivers/pinctrl/pinctrl-amd.c
114
pin_reg = readl(gpio_dev->base + offset * 4);
drivers/pinctrl/pinctrl-amd.c
134
pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
drivers/pinctrl/pinctrl-amd.c
139
pin_reg = readl(gpio_dev->base + offset * 4);
drivers/pinctrl/pinctrl-amd.c
219
seq_printf(s, "WAKE_INT_MASTER_REG: 0x%08x\n", readl(gpio_dev->base + WAKE_INT_MASTER_REG));
drivers/pinctrl/pinctrl-amd.c
250
pin_reg = readl(gpio_dev->base + i * 4);
drivers/pinctrl/pinctrl-amd.c
389
pin_reg = readl(gpio_dev->base + hwirq * 4);
drivers/pinctrl/pinctrl-amd.c
405
pin_reg = readl(gpio_dev->base + hwirq * 4);
drivers/pinctrl/pinctrl-amd.c
423
pin_reg = readl(gpio_dev->base + hwirq * 4);
drivers/pinctrl/pinctrl-amd.c
438
pin_reg = readl(gpio_dev->base + hwirq * 4);
drivers/pinctrl/pinctrl-amd.c
458
pin_reg = readl(gpio_dev->base + hwirq * 4);
drivers/pinctrl/pinctrl-amd.c
488
reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
drivers/pinctrl/pinctrl-amd.c
49
pin_reg = readl(gpio_dev->base + offset * 4);
drivers/pinctrl/pinctrl-amd.c
504
pin_reg = readl(gpio_dev->base + hwirq * 4);
drivers/pinctrl/pinctrl-amd.c
571
while ((readl(gpio_dev->base + hwirq * 4) & mask) != mask)
drivers/pinctrl/pinctrl-amd.c
623
status = readl(gpio_dev->base + WAKE_INT_STATUS_REG1);
drivers/pinctrl/pinctrl-amd.c
625
status |= readl(gpio_dev->base + WAKE_INT_STATUS_REG0);
drivers/pinctrl/pinctrl-amd.c
638
regval = readl(regs + i);
drivers/pinctrl/pinctrl-amd.c
65
pin_reg = readl(gpio_dev->base + offset * 4);
drivers/pinctrl/pinctrl-amd.c
661
regval = readl(regs + i);
drivers/pinctrl/pinctrl-amd.c
680
regval = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
drivers/pinctrl/pinctrl-amd.c
746
pin_reg = readl(gpio_dev->base + pin*4);
drivers/pinctrl/pinctrl-amd.c
791
pin_reg = readl(gpio_dev->base + pin*4);
drivers/pinctrl/pinctrl-amd.c
81
pin_reg = readl(gpio_dev->base + offset * 4);
drivers/pinctrl/pinctrl-amd.c
899
pin_reg = readl(gpio_dev->base + pin * 4);
drivers/pinctrl/pinctrl-amd.c
921
tmp = readl(gpio_dev->base + pin * 4);
drivers/pinctrl/pinctrl-amd.c
979
gpio_dev->saved_regs[i] = readl(gpio_dev->base + pin * 4) & ~PIN_IRQ_PENDING;
drivers/pinctrl/pinctrl-amdisp.c
114
pin_reg = readl(pctrl->gpiobase + gpio_offset[gpio]);
drivers/pinctrl/pinctrl-amdisp.c
127
pin_reg = readl(pctrl->gpiobase + gpio_offset[gpio]);
drivers/pinctrl/pinctrl-artpec6.c
684
regval = readl(pmx->base + reg);
drivers/pinctrl/pinctrl-artpec6.c
751
regval = readl(pmx->base + artpec6_pmx_reg_offset(pin));
drivers/pinctrl/pinctrl-artpec6.c
825
regval = readl(reg);
drivers/pinctrl/pinctrl-artpec6.c
837
regval = readl(reg);
drivers/pinctrl/pinctrl-artpec6.c
850
regval = readl(reg);
drivers/pinctrl/pinctrl-artpec6.c
864
regval = readl(reg);
drivers/pinctrl/pinctrl-da850-pupd.c
110
ena = readl(data->base + DA850_PUPD_ENA);
drivers/pinctrl/pinctrl-da850-pupd.c
111
sel = readl(data->base + DA850_PUPD_SEL);
drivers/pinctrl/pinctrl-da850-pupd.c
73
val = readl(data->base + DA850_PUPD_ENA);
drivers/pinctrl/pinctrl-da850-pupd.c
86
val = readl(data->base + DA850_PUPD_SEL);
drivers/pinctrl/pinctrl-equilibrium.c
166
pins = readl(gctrl->membase + GPIO_IRNCR);
drivers/pinctrl/pinctrl-equilibrium.c
378
return PARSE_DRV_CURRENT(readl(mem + REG_DRCC(idx)), pin_offset);
drivers/pinctrl/pinctrl-equilibrium.c
425
val = !!(readl(mem + REG_PUEN) & BIT(offset));
drivers/pinctrl/pinctrl-equilibrium.c
428
val = !!(readl(mem + REG_PDEN) & BIT(offset));
drivers/pinctrl/pinctrl-equilibrium.c
431
val = !!(readl(mem + REG_OD) & BIT(offset));
drivers/pinctrl/pinctrl-equilibrium.c
437
val = !!(readl(mem + REG_SRC) & BIT(offset));
drivers/pinctrl/pinctrl-equilibrium.c
447
val = !!(readl(gctrl->membase + GPIO_DIR) & BIT(offset));
drivers/pinctrl/pinctrl-equilibrium.c
523
regval = readl(mem);
drivers/pinctrl/pinctrl-equilibrium.c
82
writel(readl(addr) | BIT(offset), addr);
drivers/pinctrl/pinctrl-equilibrium.c
84
writel(readl(addr) & ~BIT(offset), addr);
drivers/pinctrl/pinctrl-equilibrium.c
858
bank->aval_pinmap = readl(bank->membase + REG_AVAIL);
drivers/pinctrl/pinctrl-eyeq5.c
207
writel((readl(ptr) & ~mask) | (val & mask), ptr);
drivers/pinctrl/pinctrl-eyeq5.c
213
u32 val = readl(pctrl->base + eq5p_regs[bank][reg]);
drivers/pinctrl/pinctrl-eyeq5.c
284
val_ds = readl(pctrl->base + eq5p_regs[bank][EQ5P_DS_HIGH]);
drivers/pinctrl/pinctrl-eyeq5.c
287
val_ds = readl(pctrl->base + eq5p_regs[bank][EQ5P_DS_LOW]);
drivers/pinctrl/pinctrl-k210.c
512
u32 val = readl(&pdata->fpioa->pins[pin]);
drivers/pinctrl/pinctrl-k210.c
556
val = readl(&pdata->fpioa->pins[pin]);
drivers/pinctrl/pinctrl-k210.c
619
seq_printf(s, "%#x", readl(&pdata->fpioa->pins[pin]));
drivers/pinctrl/pinctrl-keembay.c
868
return readl(base + KEEMBAY_GPIO_REG_OFFSET(pin));
drivers/pinctrl/pinctrl-loongson2.c
212
val = readl(reg);
drivers/pinctrl/pinctrl-lpc18xx.c
1001
reg_val = readl(scu->base + reg_offset);
drivers/pinctrl/pinctrl-lpc18xx.c
1102
reg = readl(scu->base + pin_cap->offset);
drivers/pinctrl/pinctrl-lpc18xx.c
1187
reg = readl(scu->base + offset);
drivers/pinctrl/pinctrl-lpc18xx.c
1197
reg = readl(scu->base + LPC18XX_SCU_REG_ENAIO2);
drivers/pinctrl/pinctrl-lpc18xx.c
1212
reg = readl(scu->base + pin->offset);
drivers/pinctrl/pinctrl-lpc18xx.c
739
reg_val = readl(addr);
drivers/pinctrl/pinctrl-lpc18xx.c
887
reg = readl(scu->base + pin_cap->offset);
drivers/pinctrl/pinctrl-ocelot.c
31
writel((readl(addr) & ~(clear)) | (set), (addr))
drivers/pinctrl/pinctrl-pic32.c
1827
return !!(readl(bank->reg_base + PORT_REG) & BIT(offset));
drivers/pinctrl/pinctrl-pic32.c
1890
arg = !!(readl(bank->reg_base + CNPU_REG) & mask);
drivers/pinctrl/pinctrl-pic32.c
1893
arg = !!(readl(bank->reg_base + CNPD_REG) & mask);
drivers/pinctrl/pinctrl-pic32.c
1896
arg = !(readl(bank->reg_base + ANSEL_REG) & mask);
drivers/pinctrl/pinctrl-pic32.c
1899
arg = !!(readl(bank->reg_base + ANSEL_REG) & mask);
drivers/pinctrl/pinctrl-pic32.c
1902
arg = !!(readl(bank->reg_base + ODCU_REG) & mask);
drivers/pinctrl/pinctrl-pic32.c
1905
arg = !!(readl(bank->reg_base + TRIS_REG) & mask);
drivers/pinctrl/pinctrl-pic32.c
1908
arg = !(readl(bank->reg_base + TRIS_REG) & mask);
drivers/pinctrl/pinctrl-pic32.c
1994
if (readl(bank->reg_base + TRIS_REG) & BIT(offset))
drivers/pinctrl/pinctrl-pic32.c
2079
cnen_rise = readl(bank->reg_base + CNEN_REG);
drivers/pinctrl/pinctrl-pic32.c
2080
cnne_fall = readl(bank->reg_base + CNNE_REG);
drivers/pinctrl/pinctrl-pic32.c
2103
stat = readl(bank->reg_base + CNF_REG);
drivers/pinctrl/pinctrl-pistachio.c
834
return readl(pctl->base + reg);
drivers/pinctrl/pinctrl-pistachio.c
849
return readl(bank->base + reg);
drivers/pinctrl/pinctrl-rp1.c
880
ints = readl(pc->gpio_base + bank->ints_offset);
drivers/pinctrl/pinctrl-single.c
250
return readl(reg);
drivers/pinctrl/pinctrl-st.c
1364
val = readl(bank->base + REG_PIO_PCOMP);
drivers/pinctrl/pinctrl-st.c
1407
port_in = readl(bank->base + REG_PIO_PIN);
drivers/pinctrl/pinctrl-st.c
1408
port_comp = readl(bank->base + REG_PIO_PCOMP);
drivers/pinctrl/pinctrl-st.c
1409
port_mask = readl(bank->base + REG_PIO_PMASK);
drivers/pinctrl/pinctrl-st.c
1459
status = readl(info->irqmux_base);
drivers/pinctrl/pinctrl-st.c
706
return !!(readl(bank->base + REG_PIO_PIN) & BIT(offset));
drivers/pinctrl/pinctrl-st.c
752
value = readl(bank->base + REG_PIO_PC(i));
drivers/pinctrl/qcom/pinctrl-msm.c
89
return readl(pctrl->regs[g->tile] + g->name##_reg); \
drivers/pinctrl/qcom/tlmm-test.c
656
val = readl(tlmm_suite.reg) & ~MSM_PULL_MASK;
drivers/pinctrl/qcom/tlmm-test.c
89
readl(tlmm_suite.reg);
drivers/pinctrl/qcom/tlmm-test.c
95
readl(tlmm_suite.reg);
drivers/pinctrl/renesas/pinctrl-rzg2l.c
212
_val = readl(_addr); \
drivers/pinctrl/renesas/pinctrl-rzg2l.c
2473
writel(readl(addr) | BIT(bit * 8), addr);
drivers/pinctrl/renesas/pinctrl-rzg2l.c
2475
writel(readl(addr) & ~BIT(bit * 8), addr);
drivers/pinctrl/renesas/pinctrl-rzg2l.c
3158
pfc_val = readl(pctrl->base + PFC(off));
drivers/pinctrl/renesas/pinctrl-rzg2l.c
549
pfc = readl(pctrl->base + PFC(off));
drivers/pinctrl/renesas/pinctrl-rzg2l.c
875
return (readl(addr) >> (bit * 8)) & mask;
drivers/pinctrl/renesas/pinctrl-rzg2l.c
892
reg = readl(addr) & ~(mask << (bit * 8));
drivers/pinctrl/renesas/pinctrl-rzn1.c
260
l1 = readl(&ipctl->lev1->conf[pin]);
drivers/pinctrl/renesas/pinctrl-rzn1.c
262
l2 = readl(&ipctl->lev2->conf[pin]);
drivers/pinctrl/renesas/pinctrl-rzn1.c
498
l1 = readl(&ipctl->lev1->conf[pin]);
drivers/pinctrl/renesas/pinctrl-rzn1.c
521
l2 = readl(&ipctl->lev2->conf[pin]);
drivers/pinctrl/renesas/pinctrl-rzn1.c
551
l1 = readl(&ipctl->lev1->conf[pin]);
drivers/pinctrl/renesas/pinctrl-rzv2m.c
448
reg = readl(addr) & ~(mask << shift);
drivers/pinctrl/renesas/pinctrl-rzv2m.c
495
switch ((readl(pctrl->base + PUPD(port)) >> bit) & PUPD_MASK) {
drivers/pinctrl/renesas/pinctrl-rzv2m.c
518
val = (readl(pctrl->base + DRV(port)) >> bit) & DRV_MASK;
drivers/pinctrl/renesas/pinctrl-rzv2m.c
544
arg = readl(pctrl->base + SR(port)) & BIT(bit);
drivers/pinctrl/renesas/pinctrl-rzv2m.c
775
if (!(readl(pctrl->base + IE(port)) & BIT(bit)))
drivers/pinctrl/renesas/pinctrl-rzv2m.c
826
return !!(readl(pctrl->base + DI(port)) & BIT(bit));
drivers/pinctrl/renesas/pinctrl-rzv2m.c
828
return !!(readl(pctrl->base + DO(port)) & BIT(bit));
drivers/pinctrl/samsung/pinctrl-exynos.c
1009
readl(regs + EXYNOS_GPIO_ECON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
1012
readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
1015
readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
1019
readl(regs + bank->irq_chip->eint_mask
drivers/pinctrl/samsung/pinctrl-exynos.c
1044
readl(regs + bank->pctl_offset + bank->eint_con_offset),
drivers/pinctrl/samsung/pinctrl-exynos.c
1047
readl(regs + bank->pctl_offset +
drivers/pinctrl/samsung/pinctrl-exynos.c
145
mask = readl(bank->eint_base + reg_mask);
drivers/pinctrl/samsung/pinctrl-exynos.c
202
con = readl(bank->eint_base + reg_con);
drivers/pinctrl/samsung/pinctrl-exynos.c
255
con = readl(bank->pctl_base + reg_con);
drivers/pinctrl/samsung/pinctrl-exynos.c
287
con = readl(bank->pctl_base + reg_con);
drivers/pinctrl/samsung/pinctrl-exynos.c
352
svc = readl(bank->eint_base + EXYNOSAUTO_SVC_OFFSET);
drivers/pinctrl/samsung/pinctrl-exynos.c
354
svc = readl(bank->eint_base + EXYNOS_SVC_OFFSET);
drivers/pinctrl/samsung/pinctrl-exynos.c
384
val = readl(reg);
drivers/pinctrl/samsung/pinctrl-exynos.c
748
pend = readl(b->eint_base + b->irq_chip->eint_pend
drivers/pinctrl/samsung/pinctrl-exynos.c
750
mask = readl(b->eint_base + b->irq_chip->eint_mask
drivers/pinctrl/samsung/pinctrl-exynos.c
80
mask = readl(bank->eint_base + reg_mask);
drivers/pinctrl/samsung/pinctrl-exynos.c
887
save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
889
save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
891
save->eint_fltcon1 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
893
save->eint_mask = readl(regs + bank->irq_chip->eint_mask
drivers/pinctrl/samsung/pinctrl-exynos.c
915
save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
918
save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
923
save->eint_fltcon1 = readl(regs +
drivers/pinctrl/samsung/pinctrl-exynos.c
927
save->eint_mask = readl(regs + bank->irq_chip->eint_mask
drivers/pinctrl/samsung/pinctrl-exynos.c
951
save->eint_con = readl(regs + bank->pctl_offset +
drivers/pinctrl/samsung/pinctrl-exynos.c
953
save->eint_mask = readl(regs + bank->pctl_offset +
drivers/pinctrl/samsung/pinctrl-exynos.c
974
readl(regs + EXYNOS_GPIO_ECON_OFFSET
drivers/pinctrl/samsung/pinctrl-exynos.c
978
readl(eint_fltcfg0), save->eint_fltcon0);
drivers/pinctrl/samsung/pinctrl-exynos.c
983
readl(eint_fltcfg0 + 4), save->eint_fltcon1);
drivers/pinctrl/samsung/pinctrl-exynos.c
986
readl(regs + bank->irq_chip->eint_mask
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
304
val = readl(reg);
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
324
val = readl(reg);
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
374
val = readl(reg);
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
432
svc = readl(drvdata->virt_base + SERVICE_REG);
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
528
val = readl(d->virt_base + EINT0MASK_REG);
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
584
val = readl(reg);
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
614
pend = readl(drvdata->virt_base + EINT0PEND_REG);
drivers/pinctrl/samsung/pinctrl-s3c64xx.c
615
mask = readl(drvdata->virt_base + EINT0MASK_REG);
drivers/pinctrl/samsung/pinctrl-samsung.c
1018
data = readl(reg + type->reg_offset[PINCFG_TYPE_PUD]);
drivers/pinctrl/samsung/pinctrl-samsung.c
1364
bank->pm_save[type] = readl(reg + offs[type]);
drivers/pinctrl/samsung/pinctrl-samsung.c
1369
readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
drivers/pinctrl/samsung/pinctrl-samsung.c
1441
readl(reg + offs[PINCFG_TYPE_FUNC]),
drivers/pinctrl/samsung/pinctrl-samsung.c
1442
readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
drivers/pinctrl/samsung/pinctrl-samsung.c
1449
reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
drivers/pinctrl/samsung/pinctrl-samsung.c
408
data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
drivers/pinctrl/samsung/pinctrl-samsung.c
470
data = readl(reg_base + cfg_reg);
drivers/pinctrl/samsung/pinctrl-samsung.c
565
data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
drivers/pinctrl/samsung/pinctrl-samsung.c
614
data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
drivers/pinctrl/samsung/pinctrl-samsung.c
651
data = readl(reg);
drivers/pinctrl/sophgo/pinctrl-cv18xx.c
111
value = readl(reg);
drivers/pinctrl/sophgo/pinctrl-cv18xx.c
116
value = readl(reg);
drivers/pinctrl/sophgo/pinctrl-cv18xx.c
122
value = readl(reg);
drivers/pinctrl/sophgo/pinctrl-cv18xx.c
262
value = readl(cv1800_pinctrl_get_component_addr(priv, &pin->conf));
drivers/pinctrl/sophgo/pinctrl-cv18xx.c
398
reg = readl(addr);
drivers/pinctrl/sophgo/pinctrl-sg2042-ops.c
60
return readl(reg) >> 16;
drivers/pinctrl/sophgo/pinctrl-sg2042-ops.c
62
return readl(reg) & 0xffff;
drivers/pinctrl/sophgo/pinctrl-sg2042-ops.c
72
u32 v = readl(reg);
drivers/pinctrl/spacemit/pinctrl-k1.c
282
value = readl(reg);
drivers/pinctrl/spacemit/pinctrl-k1.c
667
value = readl(spacemit_pin_to_reg(pctrl, pin));
drivers/pinctrl/spacemit/pinctrl-k1.c
882
value = readl(reg);
drivers/pinctrl/sprd/pinctrl-sprd.c
421
reg = readl((void __iomem *)pin->reg);
drivers/pinctrl/sprd/pinctrl-sprd.c
449
reg = (readl((void __iomem *)pin->reg) >>
drivers/pinctrl/sprd/pinctrl-sprd.c
452
reg = readl((void __iomem *)pin->reg);
drivers/pinctrl/sprd/pinctrl-sprd.c
723
reg = readl((void __iomem *)pin->reg);
drivers/pinctrl/sprd/pinctrl-sprd.c
730
reg = readl((void __iomem *)pin->reg);
drivers/pinctrl/sprd/pinctrl-sprd.c
794
*config = (readl((void __iomem *)pin->reg) >>
drivers/pinctrl/sprd/pinctrl-sprd.c
797
*config = readl((void __iomem *)pin->reg);
drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c
1276
value = readl(sfp->padctl + IO_PADSHARE_SEL);
drivers/pinctrl/sunplus/sppctl.c
104
return readl(spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_OD + off);
drivers/pinctrl/sunplus/sppctl.c
41
return readl(spp_gchip->first_base + SPPCTL_GPIO_OFF_FIRST + off);
drivers/pinctrl/sunplus/sppctl.c
51
return readl(spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_MASTER + off);
drivers/pinctrl/sunplus/sppctl.c
62
return readl(spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_OE + off);
drivers/pinctrl/sunplus/sppctl.c
77
return readl(spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_IN + off);
drivers/pinctrl/sunplus/sppctl.c
82
return readl(spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_IINV + off);
drivers/pinctrl/sunplus/sppctl.c
93
return readl(spp_gchip->gpioxt_base + SPPCTL_GPIO_OFF_OINV + off);
drivers/pinctrl/sunxi/pinctrl-sunxi.c
1008
val = (readl(pctl->membase + reg) & mask) >> shift;
drivers/pinctrl/sunxi/pinctrl-sunxi.c
1027
val = readl(pctl->membase + reg);
drivers/pinctrl/sunxi/pinctrl-sunxi.c
1107
muxval = (readl(pctl->membase + reg) & mask) >> shift;
drivers/pinctrl/sunxi/pinctrl-sunxi.c
1178
regval = readl(pctl->membase + reg);
drivers/pinctrl/sunxi/pinctrl-sunxi.c
1208
val = readl(pctl->membase + reg);
drivers/pinctrl/sunxi/pinctrl-sunxi.c
1225
val = readl(pctl->membase + reg);
drivers/pinctrl/sunxi/pinctrl-sunxi.c
1322
val = readl(pctl->membase + reg);
drivers/pinctrl/sunxi/pinctrl-sunxi.c
598
val = (readl(pctl->membase + reg) & mask) >> shift;
drivers/pinctrl/sunxi/pinctrl-sunxi.c
699
writel((readl(pctl->membase + reg) & ~mask) | val << shift,
drivers/pinctrl/sunxi/pinctrl-sunxi.c
765
reg = readl(pctl->membase + sunxi_grp_config_reg(pin));
drivers/pinctrl/sunxi/pinctrl-sunxi.c
773
reg = readl(pctl->membase + pctl->pow_mod_sel_offset +
drivers/pinctrl/sunxi/pinctrl-sunxi.c
785
reg = readl(pctl->membase + pctl->pow_mod_sel_offset);
drivers/pinctrl/sunxi/pinctrl-sunxi.c
837
writel((readl(pctl->membase + reg) & ~mask) | config << shift,
drivers/pinctrl/sunxi/pinctrl-sunxi.c
973
muxval = (readl(pctl->membase + reg) & mask) >> shift;
drivers/pinctrl/tegra/pinctrl-tegra-xusb.c
105
return readl(padctl->regs + offset);
drivers/pinctrl/tegra/pinctrl-tegra.c
32
return readl(pmx->regs[bank] + reg);
drivers/pinctrl/visconti/pinctrl-common.c
106
val = readl(priv->base + pin->dsel_offset);
drivers/pinctrl/visconti/pinctrl-common.c
236
val = readl(priv->base + mux->offset);
drivers/pinctrl/visconti/pinctrl-common.c
261
val = readl(priv->base + gpio_mux->offset);
drivers/pinctrl/visconti/pinctrl-common.c
64
val = readl(priv->base + pin->pudsel_offset);
drivers/pinctrl/visconti/pinctrl-common.c
72
val = readl(priv->base + pin->pude_offset);
drivers/platform/goldfish/goldfish_pipe.c
630
count = readl(dev->base + PIPE_REG_GET_SIGNALLED);
drivers/platform/goldfish/goldfish_pipe.c
909
dev->version = readl(dev->base + PIPE_REG_VERSION);
drivers/platform/mellanox/mlxbf-pmc.c
1038
*result = readl(addr);
drivers/platform/mips/ls2k-reset.c
25
writel((readl(base + PM1_STS) & 0xffffffff), base + PM1_STS);
drivers/platform/raspberrypi/vchiq-interface/vchiq_arm.c
130
status = readl(mgmt->regs + BELL0);
drivers/platform/x86/amd/pmc/mp2_stb.c
123
stb_dv.data_valid = readl(mp2->mmio + AMD_P2C_MSG1);
drivers/platform/x86/intel/pmc/core.c
68
return readl(pmc->regbase + reg_offset);
drivers/platform/x86/intel/pmc/ssram_telemetry.c
40
dvsec_offset = readl(ssram + SSRAM_DVSEC_OFFSET);
drivers/platform/x86/intel/pmc/ssram_telemetry.c
45
hdr = readl(dvsec + PCI_DVSEC_HEADER1);
drivers/platform/x86/intel/pmc/ssram_telemetry.c
52
table = readl(dvsec + INTEL_DVSEC_TABLE);
drivers/platform/x86/intel/pmt/crashlog.c
132
u32 reg = readl(entry->disc_table + control->offset);
drivers/platform/x86/intel/pmt/crashlog.c
148
u32 reg = readl(crashlog->entry.disc_table + status->offset);
drivers/platform/x86/intel/pmt/crashlog.c
167
u32 discovery_header = readl(entry->disc_table + CONTROL_OFFSET);
drivers/platform/x86/intel/pmt/crashlog.c
517
header->access_type = GET_ACCESS(readl(disc_table));
drivers/platform/x86/intel/pmt/crashlog.c
518
header->guid = readl(disc_table + GUID_OFFSET);
drivers/platform/x86/intel/pmt/crashlog.c
519
header->base_offset = readl(disc_table + BASE_OFFSET);
drivers/platform/x86/intel/pmt/crashlog.c
522
header->size = GET_SIZE(readl(disc_table + SIZE_OFFSET));
drivers/platform/x86/intel/pmt/telemetry.c
64
u32 guid = readl(entry->disc_table + TELEM_GUID_OFFSET);
drivers/platform/x86/intel/pmt/telemetry.c
67
u32 type = TELEM_TYPE(readl(entry->disc_table));
drivers/platform/x86/intel/pmt/telemetry.c
86
header->access_type = TELEM_ACCESS(readl(disc_table));
drivers/platform/x86/intel/pmt/telemetry.c
87
header->guid = readl(disc_table + TELEM_GUID_OFFSET);
drivers/platform/x86/intel/pmt/telemetry.c
88
header->base_offset = readl(disc_table + TELEM_BASE_OFFSET);
drivers/platform/x86/intel/pmt/telemetry.c
91
header->size = TELEM_SIZE(readl(disc_table));
drivers/platform/x86/intel/punit_ipc.c
53
return readl(ipcdev->base[type][BASE_IFACE]);
drivers/platform/x86/intel/punit_ipc.c
63
return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
drivers/platform/x86/intel/punit_ipc.c
68
return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
drivers/platform/x86/intel/speed_select_if/isst_if_mmio.c
157
punit_dev->range_0[i] = readl(punit_dev->punit_mmio +
drivers/platform/x86/intel/speed_select_if/isst_if_mmio.c
165
punit_dev->range_1[i] = readl(punit_dev->punit_mmio + addr);
drivers/platform/x86/intel/speed_select_if/isst_if_mmio.c
77
io_reg->value = readl(punit_dev->punit_mmio+io_reg->reg);
drivers/platform/x86/intel_ips.c
231
#define thm_readl(off) readl(ips->regmap + (off))
drivers/platform/x86/intel_scu_ipc.c
222
return readl(scu->ipc_base + IPC_READ_BUFFER + offset);
drivers/platform/x86/pmc_atom.c
208
return readl(pmc->regmap + reg_offset);
drivers/platform/x86/samsung-laptop.c
444
out->d0 = readl(samsung->sabi_iface + SABI_IFACE_DATA);
drivers/platform/x86/samsung-laptop.c
445
out->d1 = readl(samsung->sabi_iface + SABI_IFACE_DATA + 4);
drivers/pmdomain/actions/owl-sps-helper.c
23
val = readl(base + OWL_SPS_PG_CTL);
drivers/pmdomain/actions/owl-sps-helper.c
36
val = readl(base + OWL_SPS_PG_CTL);
drivers/pmdomain/bcm/bcm2835-power.c
111
#define PM_READ(reg) readl(power->base + (reg))
drivers/pmdomain/bcm/bcm2835-power.c
171
val = readl(base + reg) & ~ASB_REQ_STOP;
drivers/pmdomain/bcm/bcm2835-power.c
173
val = readl(base + reg) | ASB_REQ_STOP;
drivers/pmdomain/bcm/bcm2835-power.c
642
id = readl(power->asb + ASB_AXI_BRDG_ID);
drivers/pmdomain/bcm/bcm2835-power.c
650
id = readl(power->rpivid_asb + ASB_AXI_BRDG_ID);
drivers/pmdomain/imx/imx93-pd.c
121
init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) & FUNC_STAT_ISO_STAT_MASK;
drivers/pmdomain/imx/imx93-pd.c
48
val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
drivers/pmdomain/imx/imx93-pd.c
70
val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
296
writel((readl(addr) & ~mask) | (val & mask), addr);
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
301
return (readl(mfg->rpc + RPC_PWR_CON) & PWR_ACK_M) == PWR_ACK_M;
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
309
return readl(mfg->shared_mem + GF_REG_FREQ_OUT_GPU) * HZ_PER_KHZ;
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
336
return readl(mfg->shared_mem + GF_REG_FREQ_OUT_STK) * HZ_PER_KHZ;
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
497
if (readl(mfg->shared_mem + GF_REG_MAGIC) != GPUEB_MEM_MAGIC) {
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
543
mfg->num_gpu_opps = readl(mfg->shared_mem + GF_REG_GPU_OPP_NUM);
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
544
mfg->num_stack_opps = readl(mfg->shared_mem + GF_REG_STK_OPP_NUM);
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
626
if (readl(e2_base) == MFG_MT8196_E2_ID)
drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c
740
mfg->ipi_magic = readl(mfg->gpr + GPR_IPI_MAGIC);
drivers/pmdomain/mediatek/mtk-scpsys.c
176
u32 status = readl(scp->base + scp->ctrl_reg.pwr_sta_offs) &
drivers/pmdomain/mediatek/mtk-scpsys.c
178
u32 status2 = readl(scp->base + scp->ctrl_reg.pwr_sta2nd_offs) &
drivers/pmdomain/mediatek/mtk-scpsys.c
239
val = readl(ctl_addr);
drivers/pmdomain/mediatek/mtk-scpsys.c
269
val = readl(ctl_addr);
drivers/pmdomain/mediatek/mtk-scpsys.c
320
val = readl(ctl_addr);
drivers/pmdomain/mediatek/mtk-scpsys.c
378
val = readl(ctl_addr);
drivers/pmdomain/renesas/rmobile-sysc.c
59
if (readl(rmobile_pd->base + PSTR) & mask) {
drivers/pmdomain/renesas/rmobile-sysc.c
67
readl(rmobile_pd->base + PSTR));
drivers/pmdomain/renesas/rmobile-sysc.c
77
if (readl(rmobile_pd->base + PSTR) & mask)
drivers/pmdomain/renesas/rmobile-sysc.c
88
readl(rmobile_pd->base + PSTR));
drivers/pmdomain/starfive/jh71xx-pmu.c
172
val = readl(pmu->base + JH71XX_AON_PMU_SWITCH);
drivers/pmdomain/starfive/jh71xx-pmu.c
232
val = readl(pmu->base + JH71XX_PMU_TIMER_INT_MASK);
drivers/pmdomain/starfive/jh71xx-pmu.c
248
val = readl(pmu->base + JH71XX_PMU_INT_STATUS);
drivers/pmdomain/starfive/jh71xx-pmu.c
92
*is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask;
drivers/pmdomain/sunxi/sun20i-ppu.c
53
u32 status = readl(pd->base + PD_STATUS_REG);
drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c
86
bool bit = readl(pd->reg) & pd->gate_mask;
drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c
94
u32 reg = readl(pd->reg);
drivers/pmdomain/sunxi/sun55i-pck600.c
80
reg = readl(pd->base + PPU_PWPR);
drivers/pmdomain/sunxi/sun55i-pck600.c
85
reg = readl(pd->base + PPU_PWPR);
drivers/power/reset/at91-poweroff.c
187
ddr_type = readl(at91_shdwc.mpddrc_base + AT91_DDRSDRC_MDR) &
drivers/power/reset/at91-poweroff.c
63
u32 reg = readl(at91_shdwc.shdwc_base + AT91_SHDW_SR);
drivers/power/reset/at91-reset.c
154
u32 reg = readl(reset->rstc_base + AT91_RSTC_SR);
drivers/power/reset/at91-reset.c
394
u32 val = readl(reset->rstc_base + AT91_RSTC_MR);
drivers/power/reset/at91-sama5d2_shdwc.c
117
reg = readl(shdw->shdwc_base + AT91_SHDW_SR);
drivers/power/reset/at91-sama5d2_shdwc.c
404
ddr_type = readl(at91_shdwc->mpddrc_base +
drivers/power/reset/gemini-poweroff.c
112
val = readl(gpw->base + GEMINI_PWC_IDREG);
drivers/power/reset/gemini-poweroff.c
126
val = readl(gpw->base + GEMINI_PWC_CTRLREG);
drivers/power/reset/gemini-poweroff.c
131
val = readl(gpw->base + GEMINI_PWC_CTRLREG);
drivers/power/reset/gemini-poweroff.c
136
val = readl(gpw->base + GEMINI_PWC_STATREG);
drivers/power/reset/gemini-poweroff.c
138
val = readl(gpw->base + GEMINI_PWC_STATREG);
drivers/power/reset/gemini-poweroff.c
141
val = readl(gpw->base + GEMINI_PWC_CTRLREG);
drivers/power/reset/gemini-poweroff.c
42
val = readl(gpw->base + GEMINI_PWC_CTRLREG);
drivers/power/reset/gemini-poweroff.c
46
val = readl(gpw->base + GEMINI_PWC_STATREG);
drivers/power/reset/gemini-poweroff.c
79
val = readl(gpw->base + GEMINI_PWC_CTRLREG);
drivers/power/supply/goldfish_battery.c
31
(readl(data->reg_base + addr))
drivers/pps/generators/pps_gen_tio.c
54
return readl(tio->base + offset);
drivers/ptp/ptp_dfl_tod.c
107
nanosec = readl(base + TOD_NANOSEC);
drivers/ptp/ptp_dfl_tod.c
108
seconds_lsb = readl(base + TOD_SECONDSL);
drivers/ptp/ptp_dfl_tod.c
109
seconds_msb = readl(base + TOD_SECONDSH);
drivers/ptp/ptp_dfl_tod.c
135
rate = readl(base + TOD_CLK_FREQ);
drivers/ptp/ptp_dfl_tod.c
193
period = readl(base + TOD_PERIOD);
drivers/ptp/ptp_dfl_tod.c
237
nanosec = readl(base + TOD_NANOSEC);
drivers/ptp/ptp_dfl_tod.c
238
seconds_lsb = readl(base + TOD_SECONDSL);
drivers/ptp/ptp_dfl_tod.c
239
seconds_msb = readl(base + TOD_SECONDSH);
drivers/ptp/ptp_dte.c
280
readl(ptp_dte->regs + (i * sizeof(u32)));
drivers/ptp/ptp_dte.c
79
sum3 = readl(regs + DTE_NCO_OVERFLOW_REG) & DTE_NCO_SUM3_MASK;
drivers/ptp/ptp_dte.c
80
sum2 = readl(regs + DTE_NCO_TIME_REG);
drivers/pwm/pwm-apple.c
84
ctrl = readl(fpwm->base + APPLE_PWM_CTRL);
drivers/pwm/pwm-apple.c
85
on_cycles = readl(fpwm->base + APPLE_PWM_ON_CYCLES);
drivers/pwm/pwm-apple.c
86
off_cycles = readl(fpwm->base + APPLE_PWM_OFF_CYCLES);
drivers/pwm/pwm-bcm-iproc.c
102
value = readl(ip->base + IPROC_PWM_PERIOD_OFFSET(pwm->hwpwm));
drivers/pwm/pwm-bcm-iproc.c
106
value = readl(ip->base + IPROC_PWM_DUTY_CYCLE_OFFSET(pwm->hwpwm));
drivers/pwm/pwm-bcm-iproc.c
157
value = readl(ip->base + IPROC_PWM_PRESCALE_OFFSET);
drivers/pwm/pwm-bcm-iproc.c
167
value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
drivers/pwm/pwm-bcm-iproc.c
214
value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
drivers/pwm/pwm-bcm-iproc.c
50
value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
drivers/pwm/pwm-bcm-iproc.c
62
value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
drivers/pwm/pwm-bcm-iproc.c
77
value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
drivers/pwm/pwm-bcm-iproc.c
96
value = readl(ip->base + IPROC_PWM_PRESCALE_OFFSET);
drivers/pwm/pwm-bcm-kona.c
142
value = readl(kp->base + PRESCALE_OFFSET);
drivers/pwm/pwm-bcm-kona.c
172
value = readl(kp->base + PWM_CONTROL_OFFSET);
drivers/pwm/pwm-bcm-kona.c
215
value = readl(kp->base + PRESCALE_OFFSET);
drivers/pwm/pwm-bcm-kona.c
74
unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET);
drivers/pwm/pwm-bcm-kona.c
89
unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET);
drivers/pwm/pwm-bcm2835.c
80
val = readl(pc->base + PWM_CONTROL);
drivers/pwm/pwm-clps711x.c
57
pmpcon = readl(priv->pmpcon);
drivers/pwm/pwm-dwc.h
66
return readl(dwc->base + offset);
drivers/pwm/pwm-hibvt.c
140
value = readl(base + PWM_CFG0_ADDR(pwm->hwpwm));
drivers/pwm/pwm-hibvt.c
143
value = readl(base + PWM_CFG1_ADDR(pwm->hwpwm));
drivers/pwm/pwm-hibvt.c
146
value = readl(base + PWM_CTRL_ADDR(pwm->hwpwm));
drivers/pwm/pwm-hibvt.c
76
value = readl(address);
drivers/pwm/pwm-img.c
86
return readl(imgchip->base + reg);
drivers/pwm/pwm-imx-tpm.c
150
val = readl(tpm->base + PWM_IMX_TPM_SC);
drivers/pwm/pwm-imx-tpm.c
152
tmp = readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm));
drivers/pwm/pwm-imx-tpm.c
157
val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
drivers/pwm/pwm-imx-tpm.c
196
val = readl(tpm->base + PWM_IMX_TPM_SC);
drivers/pwm/pwm-imx-tpm.c
252
while (readl(tpm->base + PWM_IMX_TPM_MOD) != p->mod
drivers/pwm/pwm-imx-tpm.c
253
|| readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm))
drivers/pwm/pwm-imx-tpm.c
267
val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
drivers/pwm/pwm-imx-tpm.c
287
val = readl(tpm->base + PWM_IMX_TPM_SC);
drivers/pwm/pwm-imx-tpm.c
368
val = readl(base + PWM_IMX_TPM_PARAM);
drivers/pwm/pwm-imx1.c
105
value = readl(imx->mmio_base + MX1_PWMC);
drivers/pwm/pwm-imx1.c
117
value = readl(imx->mmio_base + MX1_PWMC);
drivers/pwm/pwm-imx1.c
87
max = readl(imx->mmio_base + MX1_PWMP);
drivers/pwm/pwm-imx27.c
116
val = readl(imx->mmio_base + MX3_PWMCR);
drivers/pwm/pwm-imx27.c
136
val = readl(imx->mmio_base + MX3_PWMPR);
drivers/pwm/pwm-imx27.c
148
val = readl(imx->mmio_base + MX3_PWMSAR);
drivers/pwm/pwm-imx27.c
170
cr = readl(imx->mmio_base + MX3_PWMCR);
drivers/pwm/pwm-imx27.c
187
sr = readl(imx->mmio_base + MX3_PWMSR);
drivers/pwm/pwm-imx27.c
194
sr = readl(imx->mmio_base + MX3_PWMSR);
drivers/pwm/pwm-imx27.c
249
val = readl(imx->mmio_base + MX3_PWMPR);
drivers/pwm/pwm-imx27.c
251
cr = readl(imx->mmio_base + MX3_PWMCR);
drivers/pwm/pwm-imx27.c
414
pwmcr = readl(imx->mmio_base + MX3_PWMCR);
drivers/pwm/pwm-keembay.c
102
highlow = readl(priv->base + KMB_PWM_LEADIN_OFFSET(pwm->hwpwm));
drivers/pwm/pwm-keembay.c
109
highlow = readl(priv->base + KMB_PWM_HIGHLOW_OFFSET(pwm->hwpwm));
drivers/pwm/pwm-keembay.c
73
u32 buff = readl(priv->base + offset);
drivers/pwm/pwm-loongson.c
67
return readl(ddata->base + offset);
drivers/pwm/pwm-lpc18xx-sct.c
121
return readl(lpc18xx_pwm->base + reg);
drivers/pwm/pwm-lpc32xx.c
144
val = readl(lpc32xx->base);
drivers/pwm/pwm-lpc32xx.c
55
val = readl(lpc32xx->base);
drivers/pwm/pwm-lpc32xx.c
73
val = readl(lpc32xx->base);
drivers/pwm/pwm-lpc32xx.c
85
val = readl(lpc32xx->base);
drivers/pwm/pwm-lpss.c
79
return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
drivers/pwm/pwm-mediatek.c
134
return readl(chip->regs + chip->soc->chanreg_base +
drivers/pwm/pwm-mediatek.c
291
enable = readl(pc->regs) & BIT(pwm->hwpwm);
drivers/pwm/pwm-mediatek.c
336
ctrl = readl(pc->regs);
drivers/pwm/pwm-mediatek.c
408
enabled = readl(pc->regs) & GENMASK(soc->num_pwms - 1, 0);
drivers/pwm/pwm-meson.c
245
value = readl(meson->base + REG_MISC_AB);
drivers/pwm/pwm-meson.c
277
value = readl(meson->base + REG_MISC_AB);
drivers/pwm/pwm-meson.c
351
value = readl(meson->base + REG_MISC_AB);
drivers/pwm/pwm-meson.c
359
value = readl(meson->base + channel_data->reg_offset);
drivers/pwm/pwm-mtk-disp.c
205
con0 = readl(mdp->base + mdp->data->con0);
drivers/pwm/pwm-mtk-disp.c
206
con1 = readl(mdp->base + mdp->data->con1);
drivers/pwm/pwm-mtk-disp.c
207
pwm_en = readl(mdp->base + DISP_PWM_EN);
drivers/pwm/pwm-mtk-disp.c
63
value = readl(address);
drivers/pwm/pwm-rcar.c
59
return readl(rp->base + offset);
drivers/pwm/pwm-rzg2l-gpt.c
111
return readl(rzg2l_gpt->mmio + reg);
drivers/pwm/pwm-samsung.c
126
tcon = readl(our_chip->base + REG_TCON);
drivers/pwm/pwm-samsung.c
146
reg = readl(our_chip->base + REG_TCFG1);
drivers/pwm/pwm-samsung.c
159
reg = readl(our_chip->base + REG_TCFG1);
drivers/pwm/pwm-samsung.c
174
reg = readl(our_chip->base + REG_TCFG0);
drivers/pwm/pwm-samsung.c
254
tcon = readl(our_chip->base + REG_TCON);
drivers/pwm/pwm-samsung.c
280
tcon = readl(our_chip->base + REG_TCON);
drivers/pwm/pwm-samsung.c
288
if (readl(our_chip->base + REG_TCMPB(pwm->hwpwm)) == (u32)-1U)
drivers/pwm/pwm-samsung.c
315
tcnt = readl(our_chip->base + REG_TCNTB(pwm->hwpwm));
drivers/pwm/pwm-samsung.c
316
oldtcmp = readl(our_chip->base + REG_TCMPB(pwm->hwpwm));
drivers/pwm/pwm-samsung.c
395
tcon = readl(our_chip->base + REG_TCON);
drivers/pwm/pwm-sifive.c
132
inactive = readl(ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm));
drivers/pwm/pwm-sifive.c
141
val = readl(ddata->regs + PWM_SIFIVE_PWMCFG);
drivers/pwm/pwm-sifive.c
283
val = readl(ddata->regs + PWM_SIFIVE_PWMCFG);
drivers/pwm/pwm-sifive.c
288
val = readl(ddata->regs + PWM_SIFIVE_PWMCMP(i));
drivers/pwm/pwm-sophgo-sg2042.c
124
period_ticks = readl(ddata->base + SG2042_PWM_PERIOD(chan));
drivers/pwm/pwm-sophgo-sg2042.c
125
hlperiod_ticks = readl(ddata->base + SG2042_PWM_HLPERIOD(chan));
drivers/pwm/pwm-sophgo-sg2042.c
148
pwmstart = readl(ddata->base + SG2044_PWM_PWMSTART);
drivers/pwm/pwm-sophgo-sg2042.c
163
pwm_oe = readl(ddata->base + SG2044_PWM_OE);
drivers/pwm/pwm-sophgo-sg2042.c
178
pwm_polarity = readl(ddata->base + SG2044_PWM_POLARITY);
drivers/pwm/pwm-sun4i.c
98
return readl(sun4ichip->base + offset);
drivers/pwm/pwm-sunplus.c
103
mode0 = readl(priv->base + SP7021_PWM_MODE0);
drivers/pwm/pwm-sunplus.c
105
mode1 = readl(priv->base + SP7021_PWM_MODE1);
drivers/pwm/pwm-sunplus.c
134
mode0 = readl(priv->base + SP7021_PWM_MODE0);
drivers/pwm/pwm-sunplus.c
138
dd_freq = readl(priv->base + SP7021_PWM_FREQ(pwm->hwpwm));
drivers/pwm/pwm-sunplus.c
139
duty = readl(priv->base + SP7021_PWM_DUTY(pwm->hwpwm));
drivers/pwm/pwm-sunplus.c
67
mode0 = readl(priv->base + SP7021_PWM_MODE0);
drivers/pwm/pwm-sunplus.c
71
mode1 = readl(priv->base + SP7021_PWM_MODE1);
drivers/pwm/pwm-tegra.c
86
return readl(pc->regs + (offset << 4));
drivers/pwm/pwm-tiecap.c
281
pc->ctx.cap4 = readl(pc->mmio_base + CAP4);
drivers/pwm/pwm-tiecap.c
282
pc->ctx.cap3 = readl(pc->mmio_base + CAP3);
drivers/pwm/pwm-visconti.c
111
period = readl(priv->base + PIPGM_PCSR(pwm->hwpwm));
drivers/pwm/pwm-visconti.c
112
duty = readl(priv->base + PIPGM_PDUT(pwm->hwpwm));
drivers/pwm/pwm-visconti.c
113
pwmc0 = readl(priv->base + PIPGM_PWMC(pwm->hwpwm));
drivers/pwm/pwm-vt8500.c
117
val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
drivers/pwm/pwm-vt8500.c
138
val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
drivers/pwm/pwm-vt8500.c
151
val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
drivers/pwm/pwm-vt8500.c
166
val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
drivers/pwm/pwm-vt8500.c
64
while ((readl(vt8500->base + REG_STATUS) & mask) && --loops)
drivers/regulator/ti-abb-regulator.c
124
val = readl(reg);
drivers/regulator/ti-abb-regulator.c
140
return !!(readl(abb->int_base) & abb->txdone_mask);
drivers/regulator/ti-abb-regulator.c
173
__func__, timeout, readl(abb->int_base));
drivers/regulator/ti-abb-regulator.c
200
__func__, timeout, readl(abb->int_base));
drivers/regulator/ti-abb-regulator.c
215
val = readl(abb->ldo_base);
drivers/regulator/ti-abb-regulator.c
579
efuse_val = readl(abb->efuse_base + efuse_offset);
drivers/remoteproc/da8xx_remoteproc.c
111
chipsig = readl(drproc->chipsig);
drivers/remoteproc/imx_dsp_rproc.c
222
pwrctl = readl(dap + IMX8M_DAP_PWRCTL);
drivers/remoteproc/imx_dsp_rproc.c
232
pwrctl = readl(dap + IMX8M_DAP_PWRCTL);
drivers/remoteproc/imx_dsp_rproc.c
830
tmp = readl(dest + q * 4);
drivers/remoteproc/imx_dsp_rproc.c
878
tmp = readl(tmp_dst);
drivers/remoteproc/ingenic_rproc.c
158
vring = readl(vpu->aux_base + REG_AUX_MSG);
drivers/remoteproc/mtk_scp.c
176
val = readl(scp->cluster->reg_base + MT8183_SW_RSTN);
drivers/remoteproc/mtk_scp.c
185
val = readl(scp->cluster->reg_base + MT8183_SW_RSTN);
drivers/remoteproc/mtk_scp.c
214
scp_to_host = readl(scp->cluster->reg_base + MT8183_SCP_TO_HOST);
drivers/remoteproc/mtk_scp.c
229
scp_to_host = readl(scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_SET);
drivers/remoteproc/mtk_scp.c
250
scp_to_host = readl(scp->cluster->reg_base + MT8192_SCP2APMCU_IPC_SET);
drivers/remoteproc/mtk_scp.c
255
u32 reason = readl(scp->cluster->reg_base + MT8195_SYS_STATUS);
drivers/remoteproc/mtk_scp.c
273
scp_to_host = readl(scp->cluster->reg_base + MT8195_SSHUB2APMCU_IPC_SET);
drivers/remoteproc/mtk_scp.c
554
sec_ctrl = readl(scp->cluster->reg_base + MT8195_SEC_CTRL);
drivers/remoteproc/mtk_scp.c
655
sec_ctrl = readl(scp->cluster->reg_base + MT8195_SEC_CTRL);
drivers/remoteproc/mtk_scp.c
98
u32 id = readl(&rcv_obj->id);
drivers/remoteproc/mtk_scp.c
99
u32 len = readl(&rcv_obj->len);
drivers/remoteproc/qcom_q6v5_adsp.c
257
val = readl(adsp->qdsp6ss_base + RET_CFG_REG);
drivers/remoteproc/qcom_q6v5_mss.c
1310
val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
1545
code_length = readl(qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG);
drivers/remoteproc/qcom_q6v5_mss.c
1553
ret = readl(qproc->rmb_base + RMB_MBA_STATUS_REG);
drivers/remoteproc/qcom_q6v5_mss.c
600
val = readl(qproc->rmb_base + RMB_PBL_STATUS_REG);
drivers/remoteproc/qcom_q6v5_mss.c
621
val = readl(qproc->rmb_base + RMB_MBA_STATUS_REG);
drivers/remoteproc/qcom_q6v5_mss.c
671
val = readl(qproc->reg_base + QDSP6SS_SLEEP);
drivers/remoteproc/qcom_q6v5_mss.c
699
val = readl(qproc->reg_base + QDSP6SS_SLEEP);
drivers/remoteproc/qcom_q6v5_mss.c
712
val = readl(qproc->reg_base + QDSP6SS_XO_CBCR);
drivers/remoteproc/qcom_q6v5_mss.c
725
val = readl(qproc->reg_base + QDSP6SS_CORE_CBCR);
drivers/remoteproc/qcom_q6v5_mss.c
761
val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_mss.c
766
val = readl(qproc->reg_base + QDSP6SS_XO_CBCR);
drivers/remoteproc/qcom_q6v5_mss.c
780
val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
783
val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
804
val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
822
val = readl(qproc->reg_base + mem_pwr_ctl);
drivers/remoteproc/qcom_q6v5_mss.c
831
val |= readl(qproc->reg_base + mem_pwr_ctl);
drivers/remoteproc/qcom_q6v5_mss.c
836
val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
849
val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
854
val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_mss.c
859
val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
862
val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
868
val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
884
val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_mss.c
889
val = readl(qproc->reg_base + QDSP6SS_GFMUX_CTL_REG);
drivers/remoteproc/qcom_q6v5_mss.c
894
val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
162
val = readl(wcss->reg_base + Q6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
167
val = readl(wcss->reg_base + Q6SS_XO_CBCR);
drivers/remoteproc/qcom_q6v5_wcss.c
181
val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
191
val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
200
val = readl(wcss->reg_base + Q6SS_MEM_PWR_CTL);
drivers/remoteproc/qcom_q6v5_wcss.c
209
val |= readl(wcss->reg_base + Q6SS_MEM_PWR_CTL);
drivers/remoteproc/qcom_q6v5_wcss.c
213
val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
222
val = readl(wcss->reg_base + Q6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
227
val = readl(wcss->reg_base + Q6SS_GFMUX_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
232
val = readl(wcss->reg_base + Q6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
345
val = readl(wcss->reg_base + Q6SS_XO_CBCR);
drivers/remoteproc/qcom_q6v5_wcss.c
361
val = readl(wcss->reg_base + Q6SS_SLEEP_CBCR);
drivers/remoteproc/qcom_q6v5_wcss.c
371
val = readl(wcss->reg_base + Q6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
389
writel((readl(wcss->reg_base + Q6SS_MEM_PWR_CTL) |
drivers/remoteproc/qcom_q6v5_wcss.c
396
val = readl(wcss->reg_base + Q6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
401
val = readl(wcss->reg_base + Q6SS_GFMUX_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
413
val = readl(wcss->reg_base + Q6SS_GFMUX_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
418
val = readl(wcss->reg_base + Q6SS_SLEEP_CBCR);
drivers/remoteproc/qcom_q6v5_wcss.c
422
val = readl(wcss->reg_base + Q6SS_XO_CBCR);
drivers/remoteproc/qcom_q6v5_wcss.c
449
val = readl(wcss->reg_base + Q6SS_RESET_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
539
val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
544
writel((readl(wcss->reg_base + Q6SS_MEM_PWR_CTL) &
drivers/remoteproc/qcom_q6v5_wcss.c
549
val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
559
val = readl(wcss->reg_base + Q6SS_SLEEP_CBCR);
drivers/remoteproc/qcom_q6v5_wcss.c
563
val = readl(wcss->reg_base + Q6SS_XO_CBCR);
drivers/remoteproc/qcom_q6v5_wcss.c
570
val = readl(wcss->reg_base + Q6SS_GFMUX_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
604
val = readl(wcss->rmb_base + SSCAON_CONFIG);
drivers/remoteproc/qcom_q6v5_wcss.c
631
val = readl(wcss->rmb_base + SSCAON_CONFIG);
drivers/remoteproc/qcom_q6v5_wcss.c
651
val = readl(wcss->reg_base + Q6SS_GFMUX_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
656
val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_q6v5_wcss.c
674
val = readl(wcss->reg_base + Q6SS_MEM_PWR_CTL);
drivers/remoteproc/qcom_q6v5_wcss.c
681
val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG);
drivers/remoteproc/qcom_wcnss.c
176
val = readl(wcnss->spare_out);
drivers/remoteproc/qcom_wcnss.c
204
while (readl(wcnss->pmu_cfg) & WCNSS_PMU_IRIS_RESET_STS)
drivers/remoteproc/qcom_wcnss.c
216
while (readl(wcnss->pmu_cfg) & WCNSS_PMU_IRIS_XO_CFG_STS)
drivers/remoteproc/st_slim_rproc.c
143
fw_rev = readl(slim_rproc->mem[ST_SLIM_DMEM].cpu_addr +
drivers/remoteproc/st_slim_rproc.c
167
val = readl(slim_rproc->slimcore + SLIM_EN_OFST);
drivers/reset/amlogic/reset-meson-audio-arb.c
68
val = readl(arb->regs);
drivers/reset/amlogic/reset-meson-audio-arb.c
88
val = readl(arb->regs);
drivers/reset/reset-aspeed.c
168
writel(readl(reg_offset) & ~rc->info->signal[id].bit, reg_offset);
drivers/reset/reset-aspeed.c
183
writel(readl(reg_offset) | rc->info->signal[id].bit, reg_offset);
drivers/reset/reset-aspeed.c
194
return (readl(reg_offset) & rc->info->signal[id].bit) ? 1 : 0;
drivers/reset/reset-ath79.c
34
val = readl(ath79_reset->base);
drivers/reset/reset-ath79.c
64
val = readl(ath79_reset->base);
drivers/reset/reset-brcmstb-rescal.c
32
reg = readl(base + BRCM_RESCAL_START);
drivers/reset/reset-brcmstb-rescal.c
34
reg = readl(base + BRCM_RESCAL_START);
drivers/reset/reset-brcmstb-rescal.c
47
reg = readl(base + BRCM_RESCAL_START);
drivers/reset/reset-eyeq.c
174
*dest_a = readl(addr_a);
drivers/reset/reset-eyeq.c
175
*dest_b = readl(addr_b);
drivers/reset/reset-eyeq.c
256
writel(readl(reg) & ~BIT(offset), reg);
drivers/reset/reset-eyeq.c
261
writel(readl(reg) | EQR_EYEQ5_ACRP_PD_REQ, reg);
drivers/reset/reset-eyeq.c
265
writel(readl(base) & ~BIT(offset), base);
drivers/reset/reset-eyeq.c
270
val = readl(base + EQR_EYEQ6H_SARCR_RST_REQUEST);
drivers/reset/reset-eyeq.c
310
writel(readl(reg) | BIT(offset), reg);
drivers/reset/reset-eyeq.c
315
writel(readl(reg) & ~EQR_EYEQ5_ACRP_PD_REQ, reg);
drivers/reset/reset-eyeq.c
319
writel(readl(base) | BIT(offset), base);
drivers/reset/reset-eyeq.c
324
val = readl(base + EQR_EYEQ6H_SARCR_RST_REQUEST);
drivers/reset/reset-eyeq.c
367
return !(readl(reg) & BIT(offset));
drivers/reset/reset-eyeq.c
370
return !(readl(reg) & EQR_EYEQ5_ACRP_ST_ACTIVE);
drivers/reset/reset-eyeq.c
372
return !(readl(base) & BIT(offset));
drivers/reset/reset-eyeq.c
375
return !(readl(reg) & BIT(offset));
drivers/reset/reset-hsdk.c
61
reg = readl(rst->regs_rst + CGU_IP_SW_RESET);
drivers/reset/reset-k230.c
167
reg = readl(rstc->base + rmap->offset);
drivers/reset/reset-k230.c
201
reg = readl(rstc->base + rmap->offset);
drivers/reset/reset-lpc18xx.c
129
return !(readl(rc->base + offset) & bit);
drivers/reset/reset-lpc18xx.c
80
stat = ~readl(rc->base + stat_offset);
drivers/reset/reset-npcm.c
127
stat = readl(rc->base + ctrl_offset);
drivers/reset/reset-npcm.c
155
return (readl(rc->base + ctrl_offset) & rst_bit);
drivers/reset/reset-npcm.c
220
iprst1 = readl(rc->base + NPCM_IPSRST1);
drivers/reset/reset-npcm.c
221
iprst2 = readl(rc->base + NPCM_IPSRST2);
drivers/reset/reset-npcm.c
222
iprst3 = readl(rc->base + NPCM_IPSRST3);
drivers/reset/reset-npcm.c
290
iprst1 = readl(rc->base + NPCM_IPSRST1);
drivers/reset/reset-npcm.c
291
iprst2 = readl(rc->base + NPCM_IPSRST2);
drivers/reset/reset-npcm.c
292
iprst3 = readl(rc->base + NPCM_IPSRST3);
drivers/reset/reset-npcm.c
293
iprst4 = readl(rc->base + NPCM_IPSRST4);
drivers/reset/reset-rzg2l-usbphy-ctrl.c
103
val = readl(priv->base + RESET);
drivers/reset/reset-rzg2l-usbphy-ctrl.c
285
val = readl(priv->base + RESET);
drivers/reset/reset-rzg2l-usbphy-ctrl.c
56
val = readl(base + RESET);
drivers/reset/reset-rzg2l-usbphy-ctrl.c
75
val = readl(base + RESET);
drivers/reset/reset-rzg2l-usbphy-ctrl.c
93
return !!(readl(priv->base + RESET) & port_mask);
drivers/reset/reset-rzv2h-usb2phy.c
124
reg = readl(priv->base + priv->data->reset_reg);
drivers/reset/reset-simple.c
42
reg = readl(data->membase + (bank * reg_width));
drivers/reset/reset-simple.c
93
reg = readl(data->membase + (bank * reg_width));
drivers/reset/reset-sunplus.c
146
reg = readl(reset->base + (index * 4));
drivers/reset/starfive/reset-starfive-jh71x0.c
50
value = readl(reg_assert);
drivers/reset/starfive/reset-starfive-jh71x0.c
95
u32 value = readl(reg_status);
drivers/rpmsg/qcom_glink_rpm.c
114
tail = readl(pipe->tail);
drivers/rpmsg/qcom_glink_rpm.c
129
head = readl(pipe->head);
drivers/rpmsg/qcom_glink_rpm.c
130
tail = readl(pipe->tail);
drivers/rpmsg/qcom_glink_rpm.c
185
head = readl(pipe->head);
drivers/rpmsg/qcom_glink_rpm.c
75
head = readl(pipe->head);
drivers/rpmsg/qcom_glink_rpm.c
76
tail = readl(pipe->tail);
drivers/rpmsg/qcom_glink_rpm.c
91
tail = readl(pipe->tail);
drivers/rtc/rtc-armada38x.c
116
reg = readl(rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
drivers/rtc/rtc-armada38x.c
128
reg = readl(rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL0);
drivers/rtc/rtc-armada38x.c
135
reg = readl(rtc->regs_soc + RTC_8K_BRIDGE_TIMING_CTL1);
drivers/rtc/rtc-armada38x.c
143
return readl(rtc->regs + rtc_reg);
drivers/rtc/rtc-armada38x.c
151
rtc->val_to_freq[i].value = readl(rtc->regs + rtc_reg);
drivers/rtc/rtc-armada38x.c
190
u32 val = readl(rtc->regs_soc + SOC_RTC_INTERRUPT);
drivers/rtc/rtc-armada38x.c
197
u32 val = readl(rtc->regs_soc + SOC_RTC_INTERRUPT);
drivers/rtc/rtc-aspeed.c
27
if (!(readl(rtc->base + RTC_CTRL) & RTC_ENABLE)) {
drivers/rtc/rtc-aspeed.c
33
reg2 = readl(rtc->base + RTC_YEAR);
drivers/rtc/rtc-aspeed.c
34
reg1 = readl(rtc->base + RTC_TIME);
drivers/rtc/rtc-aspeed.c
35
} while (reg2 != readl(rtc->base + RTC_YEAR));
drivers/rtc/rtc-aspeed.c
67
ctrl = readl(rtc->base + RTC_CTRL);
drivers/rtc/rtc-at91sam9.c
82
readl((rtc)->rtt + AT91_RTT_ ## field)
drivers/rtc/rtc-cadence.c
105
if (!(readl(crtc->regs + CDNS_RTC_EFLR) & CDNS_RTC_AEI_ALRM))
drivers/rtc/rtc-cadence.c
137
reg = readl(crtc->regs + CDNS_RTC_TIMR);
drivers/rtc/rtc-cadence.c
140
reg = readl(crtc->regs + CDNS_RTC_CALR);
drivers/rtc/rtc-cadence.c
173
stsr = readl(crtc->regs + CDNS_RTC_STSR);
drivers/rtc/rtc-cadence.c
207
reg = readl(crtc->regs + CDNS_RTC_TIMAR);
drivers/rtc/rtc-cadence.c
210
reg = readl(crtc->regs + CDNS_RTC_CALAR);
drivers/rtc/rtc-cadence.c
234
stsr = readl(crtc->regs + CDNS_RTC_STSR);
drivers/rtc/rtc-cadence.c
96
return !(readl(crtc->regs + CDNS_RTC_CTLR) & CDNS_RTC_CTLR_TIME_CAL);
drivers/rtc/rtc-ep93xx.c
39
comp = readl(ep93xx_rtc->mmio_base + EP93XX_RTC_SWCOMP);
drivers/rtc/rtc-ep93xx.c
57
time = readl(ep93xx_rtc->mmio_base + EP93XX_RTC_DATA);
drivers/rtc/rtc-ftrtc010.c
171
sec = readl(rtc->rtc_base + FTRTC010_RTC_SECOND);
drivers/rtc/rtc-ftrtc010.c
172
min = readl(rtc->rtc_base + FTRTC010_RTC_MINUTE);
drivers/rtc/rtc-ftrtc010.c
173
hour = readl(rtc->rtc_base + FTRTC010_RTC_HOUR);
drivers/rtc/rtc-ftrtc010.c
174
days = readl(rtc->rtc_base + FTRTC010_RTC_DAYS);
drivers/rtc/rtc-ftrtc010.c
70
sec = readl(rtc->rtc_base + FTRTC010_RTC_SECOND);
drivers/rtc/rtc-ftrtc010.c
71
min = readl(rtc->rtc_base + FTRTC010_RTC_MINUTE);
drivers/rtc/rtc-ftrtc010.c
72
hour = readl(rtc->rtc_base + FTRTC010_RTC_HOUR);
drivers/rtc/rtc-ftrtc010.c
73
days = readl(rtc->rtc_base + FTRTC010_RTC_DAYS);
drivers/rtc/rtc-ftrtc010.c
74
offset = readl(rtc->rtc_base + FTRTC010_RTC_RECORD);
drivers/rtc/rtc-ftrtc010.c
91
sec = readl(rtc->rtc_base + FTRTC010_RTC_SECOND);
drivers/rtc/rtc-ftrtc010.c
92
min = readl(rtc->rtc_base + FTRTC010_RTC_MINUTE);
drivers/rtc/rtc-ftrtc010.c
93
hour = readl(rtc->rtc_base + FTRTC010_RTC_HOUR);
drivers/rtc/rtc-ftrtc010.c
94
day = readl(rtc->rtc_base + FTRTC010_RTC_DAYS);
drivers/rtc/rtc-imxdi.c
188
dtcr = readl(imxdi->ioaddr + DTCR);
drivers/rtc/rtc-imxdi.c
251
dcr = readl(imxdi->ioaddr + DCR);
drivers/rtc/rtc-imxdi.c
292
sec = readl(imxdi->ioaddr + DTCMR);
drivers/rtc/rtc-imxdi.c
301
dcr = readl(imxdi->ioaddr + DCR);
drivers/rtc/rtc-imxdi.c
379
dsr = readl(imxdi->ioaddr + DSR);
drivers/rtc/rtc-imxdi.c
394
dsr = readl(imxdi->ioaddr + DSR);
drivers/rtc/rtc-imxdi.c
415
dsr = readl(imxdi->ioaddr + DSR);
drivers/rtc/rtc-imxdi.c
447
writel(readl(imxdi->ioaddr + DIER) | intr,
drivers/rtc/rtc-imxdi.c
460
writel(readl(imxdi->ioaddr + DIER) & ~intr,
drivers/rtc/rtc-imxdi.c
483
if ((readl(imxdi->ioaddr + DSR) & DSR_WEF) == 0)
drivers/rtc/rtc-imxdi.c
545
now = readl(imxdi->ioaddr + DTCMR);
drivers/rtc/rtc-imxdi.c
561
dcr = readl(imxdi->ioaddr + DCR);
drivers/rtc/rtc-imxdi.c
562
dsr = readl(imxdi->ioaddr + DSR);
drivers/rtc/rtc-imxdi.c
586
return di_write_wait(imxdi, readl(imxdi->ioaddr + DCR) | DCR_TCE, DCR);
drivers/rtc/rtc-imxdi.c
611
dcamr = readl(imxdi->ioaddr + DCAMR);
drivers/rtc/rtc-imxdi.c
615
alarm->enabled = (readl(imxdi->ioaddr + DIER) & DIER_CAIE) != 0;
drivers/rtc/rtc-imxdi.c
621
alarm->pending = (readl(imxdi->ioaddr + DSR) & DSR_CAF) != 0;
drivers/rtc/rtc-imxdi.c
666
dier = readl(imxdi->ioaddr + DIER);
drivers/rtc/rtc-imxdi.c
667
dsr = readl(imxdi->ioaddr + DSR);
drivers/rtc/rtc-jz4740.c
75
return readl(rtc->base + reg);
drivers/rtc/rtc-loongson.c
148
writel(readl(priv->pm_base + PM1_EN_REG) & ~RTC_EN,
drivers/rtc/rtc-loongson.c
261
alrm->enabled = !!(readl(priv->pm_base + PM1_EN_REG) & RTC_EN);
drivers/rtc/rtc-loongson.c
271
val = readl(priv->pm_base + PM1_EN_REG);
drivers/rtc/rtc-lpc24xx.c
58
#define rtc_readl(dev, reg) readl((dev)->rtc_base + (reg))
drivers/rtc/rtc-mpfs.c
110
ctrl = readl(rtcdev->base + CONTROL_REG);
drivers/rtc/rtc-mpfs.c
115
ret = read_poll_timeout(readl, prog, prog & CONTROL_UPLOAD_BIT, 0, UPLOAD_TIMEOUT_US,
drivers/rtc/rtc-mpfs.c
129
u32 mode = readl(rtcdev->base + MODE_REG);
drivers/rtc/rtc-mpfs.c
134
time = (u64)readl(rtcdev->base + ALARM_LOWER_REG) << 32;
drivers/rtc/rtc-mpfs.c
135
time |= (readl(rtcdev->base + ALARM_UPPER_REG) & ALARM_UPPER_MASK);
drivers/rtc/rtc-mpfs.c
148
ctrl = readl(rtcdev->base + CONTROL_REG);
drivers/rtc/rtc-mpfs.c
162
ctrl = readl(rtcdev->base + CONTROL_REG);
drivers/rtc/rtc-mpfs.c
163
mode = readl(rtcdev->base + MODE_REG);
drivers/rtc/rtc-mpfs.c
183
ctrl = readl(rtcdev->base + CONTROL_REG);
drivers/rtc/rtc-mpfs.c
65
ctrl = readl(rtcdev->base + CONTROL_REG);
drivers/rtc/rtc-mpfs.c
73
u32 val = readl(rtcdev->base + CONTROL_REG);
drivers/rtc/rtc-mpfs.c
83
(void)readl(rtcdev->base + CONTROL_REG);
drivers/rtc/rtc-mpfs.c
91
time = readl(rtcdev->base + DATETIME_LOWER_REG);
drivers/rtc/rtc-mpfs.c
92
time |= ((u64)readl(rtcdev->base + DATETIME_UPPER_REG) & DATETIME_UPPER_MASK) << 32;
drivers/rtc/rtc-mt2712.c
87
return readl(mt2712_rtc->base + reg);
drivers/rtc/rtc-mv.c
104
rtc_time = readl(ioaddr + RTC_ALARM_TIME_REG_OFFS);
drivers/rtc/rtc-mv.c
105
rtc_date = readl(ioaddr + RTC_ALARM_DATE_REG_OFFS);
drivers/rtc/rtc-mv.c
125
alm->enabled = !!readl(ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
drivers/rtc/rtc-mv.c
191
if (!readl(ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS))
drivers/rtc/rtc-mv.c
228
rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
drivers/rtc/rtc-mv.c
238
rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
drivers/rtc/rtc-mv.c
73
rtc_time = readl(ioaddr + RTC_TIME_REG_OFFS);
drivers/rtc/rtc-mv.c
74
rtc_date = readl(ioaddr + RTC_DATE_REG_OFFS);
drivers/rtc/rtc-mxc_v2.c
147
const time64_t now = readl(pdata->ioaddr + SRTC_LPSCMR);
drivers/rtc/rtc-mxc_v2.c
197
rtc_time64_to_tm(readl(ioaddr + SRTC_LPSAR), &alrm->time);
drivers/rtc/rtc-mxc_v2.c
198
alrm->pending = !!(readl(ioaddr + SRTC_LPSR) & SRTC_LPSR_ALP);
drivers/rtc/rtc-mxc_v2.c
209
u32 lp_cr = readl(pdata->ioaddr + SRTC_LPCR);
drivers/rtc/rtc-mxc_v2.c
271
while (!(readl(ioaddr) & flag)) {
drivers/rtc/rtc-mxc_v2.c
59
const u32 count = readl(ioaddr + SRTC_LPSCLR);
drivers/rtc/rtc-mxc_v2.c
62
while ((readl(ioaddr + SRTC_LPSCLR)) == count) {
drivers/rtc/rtc-mxc_v2.c
86
lp_status = readl(ioaddr + SRTC_LPSR);
drivers/rtc/rtc-mxc_v2.c
87
lp_cr = readl(ioaddr + SRTC_LPCR);
drivers/rtc/rtc-omap.c
162
return readl(rtc->base + reg);
drivers/rtc/rtc-pic32.c
280
if (!(readl(base + PIC32_RTCCON) & PIC32_RTCCON_ON))
drivers/rtc/rtc-pl030.c
38
rtc_time64_to_tm(readl(rtc->base + RTC_MR), &alrm->time);
drivers/rtc/rtc-pl030.c
55
rtc_time64_to_tm(readl(rtc->base + RTC_DR), tm);
drivers/rtc/rtc-pl031.c
104
imsc = readl(ldata->base + RTC_IMSC);
drivers/rtc/rtc-pl031.c
172
pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
drivers/rtc/rtc-pl031.c
173
readl(ldata->base + RTC_YDR), tm);
drivers/rtc/rtc-pl031.c
199
ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
drivers/rtc/rtc-pl031.c
200
readl(ldata->base + RTC_YMR), &alarm->time);
drivers/rtc/rtc-pl031.c
202
alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
drivers/rtc/rtc-pl031.c
203
alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
drivers/rtc/rtc-pl031.c
233
rtcmis = readl(ldata->base + RTC_MIS);
drivers/rtc/rtc-pl031.c
249
rtc_time64_to_tm(readl(ldata->base + RTC_DR), tm);
drivers/rtc/rtc-pl031.c
267
rtc_time64_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
drivers/rtc/rtc-pl031.c
269
alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
drivers/rtc/rtc-pl031.c
270
alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
drivers/rtc/rtc-pl031.c
328
data = readl(ldata->base + RTC_CR);
drivers/rtc/rtc-pl031.c
341
if (readl(ldata->base + RTC_YDR) == 0x2000) {
drivers/rtc/rtc-pl031.c
342
time = readl(ldata->base + RTC_DR);
drivers/rtc/rtc-rzn1.c
100
val = readl(rtc->base + RZN1_RTC_CTL2);
drivers/rtc/rtc-rzn1.c
105
secs = readl(rtc->base + RZN1_RTC_SECC);
drivers/rtc/rtc-rzn1.c
118
val = readl(rtc->base + RZN1_RTC_CTL2);
drivers/rtc/rtc-rzn1.c
160
ctl1 = readl(rtc->base + RZN1_RTC_CTL1);
drivers/rtc/rtc-rzn1.c
173
if (readl(rtc->base + RZN1_RTC_SECC) == bin2bcd(rtc->tm_alarm.tm_sec)) {
drivers/rtc/rtc-rzn1.c
176
ctl1 = readl(rtc->base + RZN1_RTC_CTL1);
drivers/rtc/rtc-rzn1.c
195
ctl1 = readl(rtc->base + RZN1_RTC_CTL1);
drivers/rtc/rtc-rzn1.c
216
} while (readl(rtc->base + RZN1_RTC_SECC) != bin2bcd(tm_now.tm_sec));
drivers/rtc/rtc-rzn1.c
238
min = readl(rtc->base + RZN1_RTC_ALM);
drivers/rtc/rtc-rzn1.c
239
hour = readl(rtc->base + RZN1_RTC_ALH);
drivers/rtc/rtc-rzn1.c
240
wday = readl(rtc->base + RZN1_RTC_ALW);
drivers/rtc/rtc-rzn1.c
253
ctl1 = readl(rtc->base + RZN1_RTC_CTL1);
drivers/rtc/rtc-rzn1.c
299
val = readl(rtc->base + RZN1_RTC_SUBU);
drivers/rtc/rtc-rzn1.c
435
val = readl(rtc->base + RZN1_RTC_CTL0) & ~RZN1_RTC_CTL0_CE;
drivers/rtc/rtc-rzn1.c
79
val = readl(rtc->base + RZN1_RTC_TIMEC);
drivers/rtc/rtc-rzn1.c
84
val = readl(rtc->base + RZN1_RTC_CALC);
drivers/rtc/rtc-s32g.c
120
rtcc = readl(priv->rtc_base + RTCC_OFFSET);
drivers/rtc/rtc-s32g.c
121
rtcs = readl(priv->rtc_base + RTCS_OFFSET);
drivers/rtc/rtc-s32g.c
138
rtcc = readl(priv->rtc_base + RTCC_OFFSET);
drivers/rtc/rtc-s32g.c
166
ret = read_poll_timeout(readl, rtcs, !(rtcs & RTCS_INV_API),
drivers/rtc/rtc-s32g.c
173
return read_poll_timeout(readl, rtcs, !(rtcs & RTCS_INV_API),
drivers/rtc/rtc-s32g.c
184
u32 rtcc = readl(priv->rtc_base + RTCC_OFFSET);
drivers/rtc/rtc-s32g.c
192
u32 rtcc = readl(priv->rtc_base + RTCC_OFFSET);
drivers/rtc/rtc-s32g.c
341
u32 apival = readl(priv->rtc_base + APIVAL_OFFSET);
drivers/rtc/rtc-s32g.c
84
status = readl(priv->rtc_base + RTCS_OFFSET);
drivers/rtc/rtc-spear.c
101
val = readl(config->ioaddr + CTRL_REG);
drivers/rtc/rtc-spear.c
113
val = readl(config->ioaddr + CTRL_REG);
drivers/rtc/rtc-spear.c
126
if ((readl(config->ioaddr + STATUS_REG)) & STATUS_FAIL)
drivers/rtc/rtc-spear.c
141
status = readl(config->ioaddr + STATUS_REG);
drivers/rtc/rtc-spear.c
157
irq_data = readl(config->ioaddr + STATUS_REG);
drivers/rtc/rtc-spear.c
208
time = readl(config->ioaddr + TIME_REG);
drivers/rtc/rtc-spear.c
209
date = readl(config->ioaddr + DATE_REG);
drivers/rtc/rtc-spear.c
210
} while (time == readl(config->ioaddr + TIME_REG));
drivers/rtc/rtc-spear.c
263
time = readl(config->ioaddr + ALARM_TIME_REG);
drivers/rtc/rtc-spear.c
264
date = readl(config->ioaddr + ALARM_DATE_REG);
drivers/rtc/rtc-spear.c
273
alm->enabled = readl(config->ioaddr + CTRL_REG) & INT_ENABLE;
drivers/rtc/rtc-spear.c
91
val = readl(config->ioaddr + STATUS_REG);
drivers/rtc/rtc-stmp3xxx.c
137
if (!(readl(rtc_data->io + STMP3XXX_RTC_STAT) &
drivers/rtc/rtc-stmp3xxx.c
142
return (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
drivers/rtc/rtc-stmp3xxx.c
156
rtc_time64_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
drivers/rtc/rtc-stmp3xxx.c
172
u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL);
drivers/rtc/rtc-stmp3xxx.c
210
rtc_time64_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time);
drivers/rtc/rtc-stmp3xxx.c
272
rtc_stat = readl(rtc_data->io + STMP3XXX_RTC_STAT);
drivers/rtc/rtc-stmp3xxx.c
285
if (readl(rtc_data->io + STMP3XXX_RTC_CTRL) &
drivers/rtc/rtc-sun6i.c
168
val = readl(rtc->base + SUN6I_LOSC_CTRL);
drivers/rtc/rtc-sun6i.c
176
val = readl(rtc->base + SUN6I_LOSC_CLK_PRESCAL);
drivers/rtc/rtc-sun6i.c
187
return readl(rtc->base + SUN6I_LOSC_CTRL) & SUN6I_LOSC_CTRL_EXT_OSC;
drivers/rtc/rtc-sun6i.c
200
val = readl(rtc->base + SUN6I_LOSC_CTRL);
drivers/rtc/rtc-sun6i.c
422
val = readl(chip->base + SUN6I_ALRM_IRQ_STA);
drivers/rtc/rtc-sun6i.c
469
date = readl(chip->base + SUN6I_RTC_YMD);
drivers/rtc/rtc-sun6i.c
470
time = readl(chip->base + SUN6I_RTC_HMS);
drivers/rtc/rtc-sun6i.c
471
} while ((date != readl(chip->base + SUN6I_RTC_YMD)) ||
drivers/rtc/rtc-sun6i.c
472
(time != readl(chip->base + SUN6I_RTC_HMS)));
drivers/rtc/rtc-sun6i.c
509
alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN);
drivers/rtc/rtc-sun6i.c
510
alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA);
drivers/rtc/rtc-sun6i.c
587
reg = readl(chip->base + offset);
drivers/rtc/rtc-sun6i.c
686
val[i] = readl(chip->base + SUN6I_GP_DATA + offset + 4 * i);
drivers/rtc/rtc-sunplus.c
117
alarm_time = readl(sp_rtc->reg_base + RTC_ALARM_SET);
drivers/rtc/rtc-sunplus.c
69
*secs = (unsigned long)readl(sp_rtc->reg_base + RTC_TIMER_OUT);
drivers/rtc/rtc-sunxi.c
149
val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
drivers/rtc/rtc-sunxi.c
169
alrm_val = readl(chip->base + SUNXI_ALRM_EN);
drivers/rtc/rtc-sunxi.c
172
alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
drivers/rtc/rtc-sunxi.c
191
alrm = readl(chip->base + SUNXI_ALRM_DHMS);
drivers/rtc/rtc-sunxi.c
192
date = readl(chip->base + SUNXI_RTC_YMD);
drivers/rtc/rtc-sunxi.c
211
alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
drivers/rtc/rtc-sunxi.c
227
date = readl(chip->base + SUNXI_RTC_YMD);
drivers/rtc/rtc-sunxi.c
228
time = readl(chip->base + SUNXI_RTC_HMS);
drivers/rtc/rtc-sunxi.c
229
} while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
drivers/rtc/rtc-sunxi.c
230
(time != readl(chip->base + SUNXI_RTC_HMS)));
drivers/rtc/rtc-sunxi.c
315
reg = readl(chip->base + offset);
drivers/rtc/rtc-tegra.c
114
readl(info->base + TEGRA_RTC_REG_MILLI_SECONDS);
drivers/rtc/rtc-tegra.c
115
sec = readl(info->base + TEGRA_RTC_REG_SHADOW_SECONDS);
drivers/rtc/rtc-tegra.c
143
readl(info->base + TEGRA_RTC_REG_SECONDS));
drivers/rtc/rtc-tegra.c
153
sec = readl(info->base + TEGRA_RTC_REG_SECONDS_ALARM0);
drivers/rtc/rtc-tegra.c
164
value = readl(info->base + TEGRA_RTC_REG_INTR_STATUS);
drivers/rtc/rtc-tegra.c
180
status = readl(info->base + TEGRA_RTC_REG_INTR_MASK);
drivers/rtc/rtc-tegra.c
206
readl(info->base + TEGRA_RTC_REG_SECONDS_ALARM0));
drivers/rtc/rtc-tegra.c
238
status = readl(info->base + TEGRA_RTC_REG_INTR_STATUS);
drivers/rtc/rtc-tegra.c
355
readl(info->base + TEGRA_RTC_REG_SECONDS_ALARM0));
drivers/rtc/rtc-tegra.c
64
return readl(info->base + TEGRA_RTC_REG_BUSY) & 1;
drivers/rtc/rtc-vt8500.c
106
date = readl(vt8500_rtc->regbase + VT8500_RTC_DR);
drivers/rtc/rtc-vt8500.c
107
time = readl(vt8500_rtc->regbase + VT8500_RTC_TR);
drivers/rtc/rtc-vt8500.c
144
alarm = readl(vt8500_rtc->regbase + VT8500_RTC_AS);
drivers/rtc/rtc-vt8500.c
145
isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS);
drivers/rtc/rtc-vt8500.c
175
unsigned long tmp = readl(vt8500_rtc->regbase + VT8500_RTC_AS);
drivers/rtc/rtc-vt8500.c
88
isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS);
drivers/rtc/rtc-xgene.c
125
if (!(readl(pdata->csr_base + RTC_STAT) & RTC_STAT_BIT))
drivers/rtc/rtc-xgene.c
129
readl(pdata->csr_base + RTC_EOI);
drivers/rtc/rtc-xgene.c
47
rtc_time64_to_tm(readl(pdata->csr_base + RTC_CCVR), tm);
drivers/rtc/rtc-xgene.c
60
readl(pdata->csr_base + RTC_CLR); /* Force a barrier */
drivers/rtc/rtc-xgene.c
71
alrm->enabled = readl(pdata->csr_base + RTC_CCR) & RTC_CCR_IE;
drivers/rtc/rtc-xgene.c
81
ccr = readl(pdata->csr_base + RTC_CCR);
drivers/rtc/rtc-xgene.c
98
return readl(pdata->csr_base + RTC_CCR) & RTC_CCR_IE ? 1 : 0;
drivers/rtc/rtc-zynqmp.c
106
read_time = readl(xrtcdev->reg_base + RTC_SET_TM_RD) - 1;
drivers/rtc/rtc-zynqmp.c
117
rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_ALRM), &alrm->time);
drivers/rtc/rtc-zynqmp.c
118
alrm->enabled = readl(xrtcdev->reg_base + RTC_INT_MASK) & RTC_INT_ALRM;
drivers/rtc/rtc-zynqmp.c
133
status = readl(xrtcdev->reg_base + RTC_INT_STS);
drivers/rtc/rtc-zynqmp.c
171
rtc_ctrl = readl(xrtcdev->reg_base + RTC_CTRL);
drivers/rtc/rtc-zynqmp.c
187
calibval = readl(xrtcdev->reg_base + RTC_CALIB_RD);
drivers/rtc/rtc-zynqmp.c
262
status = readl(xrtcdev->reg_base + RTC_INT_STS);
drivers/rtc/rtc-zynqmp.c
303
pending_alrm_irq = readl(xrtcdev->reg_base + RTC_INT_STS) & RTC_INT_ALRM;
drivers/rtc/rtc-zynqmp.c
308
alarm_time = readl(xrtcdev->reg_base + RTC_ALRM);
drivers/rtc/rtc-zynqmp.c
309
current_time = readl(xrtcdev->reg_base + RTC_CUR_TM);
drivers/rtc/rtc-zynqmp.c
356
ret = readl(xrtcdev->reg_base + RTC_CALIB_RD);
drivers/rtc/rtc-zynqmp.c
90
status = readl(xrtcdev->reg_base + RTC_INT_STS);
drivers/rtc/rtc-zynqmp.c
97
read_time = readl(xrtcdev->reg_base + RTC_CUR_TM);
drivers/scsi/3w-9xxx.c
1229
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
1295
response_que.value = readl(TW_RESPONSE_QUEUE_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
1364
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
1426
response_queue.value = readl(TW_RESPONSE_QUEUE_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
1462
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
1469
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
1491
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
1498
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
1528
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
950
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
953
readl(TW_RESPONSE_QUEUE_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
954
status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-9xxx.c
975
response_que_value = readl(TW_RESPONSE_QUEUE_REG_ADDR_LARGE(tw_dev));
drivers/scsi/3w-sas.c
1087
doorbell = readl(TWL_HOBDB_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
1113
readl(TWL_HOBDBC_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
1131
reg = readl(TWL_HISTAT_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
1154
regh = readl(TWL_HOBQPH_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
1155
regl = readl(TWL_HOBQPL_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
1158
mfa = readl(TWL_HOBQPL_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
1228
reg = readl(TWL_HISTAT_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
1243
reg_value = readl(reg);
drivers/scsi/3w-sas.c
1247
reg_value = readl(reg);
drivers/scsi/3w-sas.c
1306
status = readl(TWL_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
1312
status = readl(TWL_STATUS_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
533
regh = readl(TWL_HOBQPH_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
534
regl = readl(TWL_HOBQPL_REG_ADDR(tw_dev));
drivers/scsi/3w-sas.c
537
mfa = readl(TWL_HOBQPL_REG_ADDR(tw_dev));
drivers/scsi/aacraid/aacraid.h
1077
#define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
drivers/scsi/aacraid/aacraid.h
1078
#define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
drivers/scsi/aacraid/aacraid.h
1140
#define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
drivers/scsi/aacraid/aacraid.h
1158
#define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
drivers/scsi/aacraid/aacraid.h
1206
#define src_readl(AEP, CSR) readl(&((AEP)->regs.src.bar0->CSR))
drivers/scsi/aacraid/rx.c
234
*status = readl(&dev->IndexRegs->Mailbox[0]);
drivers/scsi/aacraid/rx.c
236
*r1 = readl(&dev->IndexRegs->Mailbox[1]);
drivers/scsi/aacraid/rx.c
238
*r2 = readl(&dev->IndexRegs->Mailbox[2]);
drivers/scsi/aacraid/rx.c
240
*r3 = readl(&dev->IndexRegs->Mailbox[3]);
drivers/scsi/aacraid/rx.c
242
*r4 = readl(&dev->IndexRegs->Mailbox[4]);
drivers/scsi/aacraid/rx.c
50
aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5]));
drivers/scsi/aacraid/src.c
1068
status[0] = readl(&dev->IndexRegs->Mailbox[0]);
drivers/scsi/aacraid/src.c
1069
status[1] = readl(&dev->IndexRegs->Mailbox[1]);
drivers/scsi/aacraid/src.c
1070
status[2] = readl(&dev->IndexRegs->Mailbox[2]);
drivers/scsi/aacraid/src.c
1071
status[3] = readl(&dev->IndexRegs->Mailbox[3]);
drivers/scsi/aacraid/src.c
1072
status[4] = readl(&dev->IndexRegs->Mailbox[4]);
drivers/scsi/aacraid/src.c
300
*status = readl(&dev->IndexRegs->Mailbox[0]);
drivers/scsi/aacraid/src.c
302
*r1 = readl(&dev->IndexRegs->Mailbox[1]);
drivers/scsi/aacraid/src.c
304
*r2 = readl(&dev->IndexRegs->Mailbox[2]);
drivers/scsi/aacraid/src.c
306
*r3 = readl(&dev->IndexRegs->Mailbox[3]);
drivers/scsi/aacraid/src.c
308
*r4 = readl(&dev->IndexRegs->Mailbox[4]);
drivers/scsi/aacraid/src.c
311
readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
drivers/scsi/aacraid/src.c
783
val = readl(((char *)(dev->base) + IBW_SWR_OFFSET));
drivers/scsi/aic94xx/aic94xx_reg.c
85
val = readl(asd_ha->io_handle[0].addr + offs);
drivers/scsi/arcmsr/arcmsr_hba.c
1406
orig_mask = readl(®->outbound_intmask);
drivers/scsi/arcmsr/arcmsr_hba.c
1413
orig_mask = readl(reg->iop2drv_doorbell_mask);
drivers/scsi/arcmsr/arcmsr_hba.c
1420
orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */
drivers/scsi/arcmsr/arcmsr_hba.c
1433
orig_mask = readl(®->host_int_mask);
drivers/scsi/arcmsr/arcmsr_hba.c
1435
readl(®->host_int_mask); /* Dummy readl to force pci flush */
drivers/scsi/arcmsr/arcmsr_hba.c
1536
outbound_intstatus = readl(®->outbound_intstatus) &
drivers/scsi/arcmsr/arcmsr_hba.c
1540
while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF)
drivers/scsi/arcmsr/arcmsr_hba.c
1577
while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
drivers/scsi/arcmsr/arcmsr_hba.c
1579
flag_ccb = readl(®->outbound_queueport_low);
drivers/scsi/arcmsr/arcmsr_hba.c
2279
iop_len = readl(&prbuffer->data_len);
drivers/scsi/arcmsr/arcmsr_hba.c
2287
*buf2++ = readl(iop_data);
drivers/scsi/arcmsr/arcmsr_hba.c
2292
*buf2 = readl(iop_data);
drivers/scsi/arcmsr/arcmsr_hba.c
2321
iop_len = readl(&prbuffer->data_len);
drivers/scsi/arcmsr/arcmsr_hba.c
2347
if (buf_empty_len >= readl(&prbuffer->data_len)) {
drivers/scsi/arcmsr/arcmsr_hba.c
2446
outbound_doorbell = readl(®->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2453
outbound_doorbell = readl(®->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2468
outbound_doorbell = readl(®->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2471
readl(®->outbound_doorbell_clear);
drivers/scsi/arcmsr/arcmsr_hba.c
2478
outbound_doorbell = readl(®->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2489
outbound_doorbell = readl(pmu->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2498
outbound_doorbell = readl(pmu->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2511
in_doorbell = readl(®->iobound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2516
in_doorbell = readl(®->iobound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2530
in_doorbell = readl(®->iobound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2547
while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) {
drivers/scsi/arcmsr/arcmsr_hba.c
2596
while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
drivers/scsi/arcmsr/arcmsr_hba.c
2658
readl(pmu->outboundlist_interrupt_cause);
drivers/scsi/arcmsr/arcmsr_hba.c
2674
while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
drivers/scsi/arcmsr/arcmsr_hba.c
2767
readl(reg->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
2785
outbound_intstatus = readl(®->outbound_intstatus) &
drivers/scsi/arcmsr/arcmsr_hba.c
2797
outbound_intstatus = readl(®->outbound_intstatus) &
drivers/scsi/arcmsr/arcmsr_hba.c
2809
outbound_doorbell = readl(reg->iop2drv_doorbell) &
drivers/scsi/arcmsr/arcmsr_hba.c
2824
outbound_doorbell = readl(reg->iop2drv_doorbell) &
drivers/scsi/arcmsr/arcmsr_hba.c
2842
host_interrupt_status = readl(&phbcmu->host_int_status) &
drivers/scsi/arcmsr/arcmsr_hba.c
2853
host_interrupt_status = readl(&phbcmu->host_int_status);
drivers/scsi/arcmsr/arcmsr_hba.c
2864
host_interrupt_status = readl(pmu->host_int_status) &
drivers/scsi/arcmsr/arcmsr_hba.c
2877
host_interrupt_status = readl(pmu->host_int_status);
drivers/scsi/arcmsr/arcmsr_hba.c
2889
host_interrupt_status = readl(&pmu->host_int_status) &
drivers/scsi/arcmsr/arcmsr_hba.c
2903
host_interrupt_status = readl(&pmu->host_int_status);
drivers/scsi/arcmsr/arcmsr_hba.c
2914
host_interrupt_status = readl(&phbcmu->host_int_status) &
drivers/scsi/arcmsr/arcmsr_hba.c
2928
host_interrupt_status = readl(&phbcmu->host_int_status);
drivers/scsi/arcmsr/arcmsr_hba.c
294
if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
drivers/scsi/arcmsr/arcmsr_hba.c
3372
*acb_firm_model = readl(firm_model);
drivers/scsi/arcmsr/arcmsr_hba.c
3379
*acb_firm_version = readl(firm_version);
drivers/scsi/arcmsr/arcmsr_hba.c
3386
*acb_device_map = readl(device_map);
drivers/scsi/arcmsr/arcmsr_hba.c
3391
pACB->signature = readl(&rwbuffer[0]);
drivers/scsi/arcmsr/arcmsr_hba.c
3392
pACB->firm_request_len = readl(&rwbuffer[1]);
drivers/scsi/arcmsr/arcmsr_hba.c
3393
pACB->firm_numbers_queue = readl(&rwbuffer[2]);
drivers/scsi/arcmsr/arcmsr_hba.c
3394
pACB->firm_sdram_size = readl(&rwbuffer[3]);
drivers/scsi/arcmsr/arcmsr_hba.c
3395
pACB->firm_hd_channels = readl(&rwbuffer[4]);
drivers/scsi/arcmsr/arcmsr_hba.c
3396
pACB->firm_cfg_version = readl(&rwbuffer[25]);
drivers/scsi/arcmsr/arcmsr_hba.c
3398
pACB->firm_PicStatus = readl(&rwbuffer[30]);
drivers/scsi/arcmsr/arcmsr_hba.c
3447
intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
drivers/scsi/arcmsr/arcmsr_hba.c
3468
if (readl(acb->pmuD->outbound_doorbell) &
drivers/scsi/arcmsr/arcmsr_hba.c
3492
intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
drivers/scsi/arcmsr/arcmsr_hba.c
3518
intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
drivers/scsi/arcmsr/arcmsr_hba.c
3587
outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable;
drivers/scsi/arcmsr/arcmsr_hba.c
3590
if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) {
drivers/scsi/arcmsr/arcmsr_hba.c
3719
if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
drivers/scsi/arcmsr/arcmsr_hba.c
3732
flag_ccb = readl(®->outbound_queueport_low);
drivers/scsi/arcmsr/arcmsr_hba.c
3858
if ((readl(®->reply_post_producer_index) & 0xFFFF) ==
drivers/scsi/arcmsr/arcmsr_hba.c
409
if (readl(®->outbound_intstatus) &
drivers/scsi/arcmsr/arcmsr_hba.c
4219
firmware_state = readl(®->outbound_msgaddr1);
drivers/scsi/arcmsr/arcmsr_hba.c
4229
firmware_state = readl(reg->iop2drv_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
4239
firmware_state = readl(®->outbound_msgaddr1);
drivers/scsi/arcmsr/arcmsr_hba.c
4248
firmware_state = readl(reg->outbound_msgaddr1);
drivers/scsi/arcmsr/arcmsr_hba.c
4259
firmware_state = readl(®->outbound_msgaddr1);
drivers/scsi/arcmsr/arcmsr_hba.c
427
if (readl(reg->iop2drv_doorbell)
drivers/scsi/arcmsr/arcmsr_hba.c
4305
uint32_t outMsg1 = readl(®->outbound_msgaddr1);
drivers/scsi/arcmsr/arcmsr_hba.c
4414
outbound_doorbell = readl(®->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
4429
outbound_doorbell = readl(reg->iop2drv_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
4442
outbound_doorbell = readl(®->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
4447
outbound_doorbell = readl(®->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
4463
outbound_doorbell = readl(reg->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
4469
outbound_doorbell = readl(reg->outbound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
447
if (readl(&phbcmu->outbound_doorbell)
drivers/scsi/arcmsr/arcmsr_hba.c
4486
acb->in_doorbell = readl(®->iobound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
4493
acb->in_doorbell = readl(®->iobound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
4552
} while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
drivers/scsi/arcmsr/arcmsr_hba.c
4564
} while (((readl(&pmuE->host_diagnostic_3xxx) &
drivers/scsi/arcmsr/arcmsr_hba.c
4588
rtn = ((readl(®->outbound_msgaddr1) &
drivers/scsi/arcmsr/arcmsr_hba.c
4594
rtn = ((readl(reg->iop2drv_doorbell) &
drivers/scsi/arcmsr/arcmsr_hba.c
4600
rtn = (readl(®->host_diagnostic) & 0x04) ? true : false;
drivers/scsi/arcmsr/arcmsr_hba.c
4605
rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
drivers/scsi/arcmsr/arcmsr_hba.c
4612
rtn = (readl(®->host_diagnostic_3xxx) &
drivers/scsi/arcmsr/arcmsr_hba.c
465
if (readl(reg->outbound_doorbell)
drivers/scsi/arcmsr/arcmsr_hba.c
483
read_doorbell = readl(&phbcmu->iobound_doorbell);
drivers/scsi/arcmsr/arcmsr_hba.c
733
QueueDepth = depthTbl[readl(&acb->pmuF->outbound_msgaddr1) & 7];
drivers/scsi/arcmsr/arcmsr_hba.c
957
if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
drivers/scsi/arm/acornscsi.c
198
return readl(host->base + SBIC_REGIDX) & 255;
drivers/scsi/arm/acornscsi.c
200
return readl(host->base + SBIC_REGVAL) & 255;
drivers/scsi/arm/eesox.c
233
*(u16 *)buf = readl(reg_dmadata);
drivers/scsi/arm/eesox.c
242
l1 = readl(reg_dmadata) & mask;
drivers/scsi/arm/eesox.c
243
l1 |= readl(reg_dmadata) << 16;
drivers/scsi/arm/eesox.c
244
l2 = readl(reg_dmadata) & mask;
drivers/scsi/arm/eesox.c
245
l2 |= readl(reg_dmadata) << 16;
drivers/scsi/arm/eesox.c
257
l1 = readl(reg_dmadata) & mask;
drivers/scsi/arm/eesox.c
258
l1 |= readl(reg_dmadata) << 16;
drivers/scsi/arm/eesox.c
267
*(u16 *)buf = readl(reg_dmadata);
drivers/scsi/bfa/bfa_core.c
768
intr = readl(bfa->iocfc.bfa_regs.intr_status);
drivers/scsi/bfa/bfa_core.c
807
intr = readl(bfa->iocfc.bfa_regs.intr_status);
drivers/scsi/bfa/bfa_core.c
911
intr = readl(bfa->iocfc.bfa_regs.intr_status);
drivers/scsi/bfa/bfa_core.c
937
curr_value = readl(bfa->ioc.ioc_regs.ll_halt);
drivers/scsi/bfa/bfa_core.c
948
curr_value = readl(
drivers/scsi/bfa/bfa_hw_ct.c
56
r32 = readl(bfa->iocfc.bfa_regs.cpe_q_ctrl[reqq]);
drivers/scsi/bfa/bfa_hw_ct.c
71
r32 = readl(bfa->iocfc.bfa_regs.rme_q_ctrl[rspq]);
drivers/scsi/bfa/bfa_ioc.c
1330
r32 = readl(sem_reg);
drivers/scsi/bfa/bfa_ioc.c
1335
r32 = readl(sem_reg);
drivers/scsi/bfa/bfa_ioc.c
1353
r32 = readl(ioc->ioc_regs.ioc_sem_reg);
drivers/scsi/bfa/bfa_ioc.c
1377
pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
drivers/scsi/bfa/bfa_ioc.c
1392
pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
drivers/scsi/bfa/bfa_ioc.c
1415
pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
drivers/scsi/bfa/bfa_ioc.c
1429
pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
drivers/scsi/bfa/bfa_ioc.c
1685
r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
drivers/scsi/bfa/bfa_ioc.c
1789
(void) readl(ioc->ioc_regs.hfn_mbox_cmd);
drivers/scsi/bfa/bfa_ioc.c
1835
hb_count = readl(ioc->ioc_regs.heartbeat);
drivers/scsi/bfa/bfa_ioc.c
1850
ioc->hb_count = readl(ioc->ioc_regs.heartbeat);
drivers/scsi/bfa/bfa_ioc.c
2006
stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
drivers/scsi/bfa/bfa_ioc.c
2083
readl(ioc->ioc_regs.ioc_init_sem_reg);
drivers/scsi/bfa/bfa_ioc.c
2140
readl(ioc->ioc_regs.ioc_init_sem_reg);
drivers/scsi/bfa/bfa_ioc.c
2200
readl(ioc->ioc_regs.ioc_init_sem_reg);
drivers/scsi/bfa/bfa_ioc.c
2270
r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
drivers/scsi/bfa/bfa_ioc.c
2279
r32 = readl(ioc->ioc_regs.lpu_mbox +
drivers/scsi/bfa/bfa_ioc.c
2288
readl(ioc->ioc_regs.lpu_mbox_cmd);
drivers/scsi/bfa/bfa_ioc.c
2554
stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
drivers/scsi/bfa/bfa_ioc.c
5486
return readl(rb + BFA_PHY_LOCK_STATUS);
drivers/scsi/bfa/bfa_ioc.c
6727
cmd.i = readl(pci_bar + FLI_CMD_REG);
drivers/scsi/bfa/bfa_ioc.c
6750
dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
drivers/scsi/bfa/bfa_ioc.c
6757
readl(pci_bar + FLI_RDDATA_REG);
drivers/scsi/bfa/bfa_ioc.c
6763
dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
drivers/scsi/bfa/bfa_ioc.c
6805
dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
drivers/scsi/bfa/bfa_ioc.c
6809
ret_status = readl(pci_bar + FLI_RDDATA_REG);
drivers/scsi/bfa/bfa_ioc.c
6901
u32 w = readl(pci_bar + FLI_RDDATA_REG);
drivers/scsi/bfa/bfa_ioc.c
6929
locked = readl((bar + FLASH_SEM_LOCK_REG));
drivers/scsi/bfa/bfa_ioc.c
709
r32 = readl(iocpf->ioc->ioc_regs.ioc_init_sem_reg);
drivers/scsi/bfa/bfa_ioc.c
712
r32 = readl(iocpf->ioc->ioc_regs.ioc_init_sem_reg);
drivers/scsi/bfa/bfa_ioc.c
83
readl((__ioc)->ioc_regs.hfn_mbox_cmd))
drivers/scsi/bfa/bfa_ioc.h
222
#define bfa_mem_read(_raddr, _off) swab32(readl(((_raddr) + (_off))))
drivers/scsi/bfa/bfa_ioc_cb.c
115
readl(ioc->ioc_regs.err_set);
drivers/scsi/bfa/bfa_ioc_cb.c
218
u32 ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate);
drivers/scsi/bfa/bfa_ioc_cb.c
247
readl(ioc->ioc_regs.ioc_sem_reg);
drivers/scsi/bfa/bfa_ioc_cb.c
257
u32 r32 = readl(ioc->ioc_regs.ioc_fwstate);
drivers/scsi/bfa/bfa_ioc_cb.c
266
u32 r32 = readl(ioc->ioc_regs.ioc_fwstate);
drivers/scsi/bfa/bfa_ioc_cb.c
276
u32 r32 = readl(ioc->ioc_regs.ioc_fwstate);
drivers/scsi/bfa/bfa_ioc_cb.c
285
return (enum bfi_ioc_state)(readl(ioc->ioc_regs.ioc_fwstate) &
drivers/scsi/bfa/bfa_ioc_cb.c
293
u32 r32 = readl(ioc->ioc_regs.alt_ioc_fwstate);
drivers/scsi/bfa/bfa_ioc_cb.c
302
return (enum bfi_ioc_state)(readl(ioc->ioc_regs.alt_ioc_fwstate) &
drivers/scsi/bfa/bfa_ioc_cb.c
369
join_bits = readl(rb + BFA_IOC0_STATE_REG) &
drivers/scsi/bfa/bfa_ioc_cb.c
372
join_bits = readl(rb + BFA_IOC1_STATE_REG) &
drivers/scsi/bfa/bfa_ioc_ct.c
113
usecnt = readl(ioc->ioc_regs.ioc_usage_reg);
drivers/scsi/bfa/bfa_ioc_ct.c
120
readl(ioc->ioc_regs.ioc_usage_sem_reg);
drivers/scsi/bfa/bfa_ioc_ct.c
134
readl(ioc->ioc_regs.ll_halt);
drivers/scsi/bfa/bfa_ioc_ct.c
135
readl(ioc->ioc_regs.alt_ll_halt);
drivers/scsi/bfa/bfa_ioc_ct.c
138
readl(ioc->ioc_regs.err_set);
drivers/scsi/bfa/bfa_ioc_ct.c
313
r32 = readl(rb + FNC_PERS_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
327
r32 = readl(rb + CT2_HOSTFN_PERSONALITY0);
drivers/scsi/bfa/bfa_ioc_ct.c
343
r32 = readl(rb + FNC_PERS_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
372
r32 = readl(ioc->ioc_regs.lpu_read_stat);
drivers/scsi/bfa/bfa_ioc_ct.c
390
readl(ioc->ioc_regs.ioc_usage_sem_reg);
drivers/scsi/bfa/bfa_ioc_ct.c
399
readl(ioc->ioc_regs.ioc_sem_reg);
drivers/scsi/bfa/bfa_ioc_ct.c
406
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/scsi/bfa/bfa_ioc_ct.c
433
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/scsi/bfa/bfa_ioc_ct.c
442
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/scsi/bfa/bfa_ioc_ct.c
452
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/scsi/bfa/bfa_ioc_ct.c
461
uint32_t r32 = readl(ioc->ioc_regs.ioc_fail_sync);
drivers/scsi/bfa/bfa_ioc_ct.c
567
r32 = readl(rb + HOSTFN_MSIX_VT_OFST_NUMVT);
drivers/scsi/bfa/bfa_ioc_ct.c
60
usecnt = readl(ioc->ioc_regs.ioc_usage_reg);
drivers/scsi/bfa/bfa_ioc_ct.c
620
readl(rb + HOSTFN0_INT_MSK);
drivers/scsi/bfa/bfa_ioc_ct.c
631
r32 = readl((rb + PSS_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
642
r32 = readl((rb + MBIST_STAT_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
655
r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
665
r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
67
readl(ioc->ioc_regs.ioc_usage_sem_reg);
drivers/scsi/bfa/bfa_ioc_ct.c
672
r32 = readl((rb + CT2_CHIP_MISC_PRG));
drivers/scsi/bfa/bfa_ioc_ct.c
675
r32 = readl((rb + CT2_PCIE_MISC_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
681
r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
700
r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
709
r32 = readl((rb + CT2_CHIP_MISC_PRG));
drivers/scsi/bfa/bfa_ioc_ct.c
715
r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
721
r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
737
r32 = readl((rb + PSS_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
74
ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate);
drivers/scsi/bfa/bfa_ioc_ct.c
762
r32 = readl((rb + PSS_GPIO_OUT_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
764
r32 = readl((rb + PSS_GPIO_OE_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
779
r32 = readl(rb + CT2_NFC_CSR_SET_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
808
r32 = readl(rb + CT2_NFC_CSR_SET_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
827
r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
831
r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
842
r32 = readl((rb + PSS_CTL_REG));
drivers/scsi/bfa/bfa_ioc_ct.c
849
r32 = readl(rb + CT2_NFC_FLASH_STS_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
857
r32 = readl(rb + CT2_NFC_FLASH_STS_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
864
r32 = readl(rb + CT2_CSI_FW_CTL_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
87
readl(ioc->ioc_regs.ioc_usage_sem_reg);
drivers/scsi/bfa/bfa_ioc_ct.c
877
r32 = readl(rb + CT2_NFC_STS_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
883
r32 = readl(rb + CT2_NFC_STS_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
892
wgn = readl(rb + CT2_WGN_STATUS);
drivers/scsi/bfa/bfa_ioc_ct.c
907
nfc_ver = readl(rb + CT2_RSC_GPR15_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
932
r32 = readl(rb + CT2_CHIP_MISC_PRG);
drivers/scsi/bfa/bfa_ioc_ct.c
944
r32 = readl(rb + HOST_SEM5_REG);
drivers/scsi/bfa/bfa_ioc_ct.c
946
r32 = readl((rb + CT2_LPU0_HOSTFN_CMD_STAT));
drivers/scsi/bfa/bfa_ioc_ct.c
949
readl((rb + CT2_LPU0_HOSTFN_CMD_STAT));
drivers/scsi/bfa/bfa_ioc_ct.c
951
r32 = readl((rb + CT2_LPU1_HOSTFN_CMD_STAT));
drivers/scsi/bfa/bfa_ioc_ct.c
954
readl((rb + CT2_LPU1_HOSTFN_CMD_STAT));
drivers/scsi/bfa/bfa_ioc_ct.c
976
return (enum bfi_ioc_state)readl(ioc->ioc_regs.ioc_fwstate);
drivers/scsi/bfa/bfa_ioc_ct.c
98
readl(ioc->ioc_regs.ioc_usage_sem_reg);
drivers/scsi/bfa/bfa_ioc_ct.c
989
return (enum bfi_ioc_state) readl(ioc->ioc_regs.alt_ioc_fwstate);
drivers/scsi/bfa/bfad_debugfs.c
297
*regbuf = readl(reg_addr);
drivers/scsi/bnx2i/bnx2i.h
129
readl(__hba->regview + offset)
drivers/scsi/csiostor/csio_defs.h
56
return readl(addr) + ((u64)readl(addr + 4) << 32);
drivers/scsi/csiostor/csio_hw.h
563
#define csio_rd_reg32(_h, _r) readl(csio_reg((_h)->regstart, (_r)))
drivers/scsi/elx/libefc_sli/sli4.c
2873
val = readl(sli4->reg[0] + SLI4_BMBX_REG);
drivers/scsi/elx/libefc_sli/sli4.c
2920
&sli4->bmbx.phys, readl(sli4->reg[0] + SLI4_BMBX_REG));
drivers/scsi/elx/libefc_sli/sli4.c
4982
bmbx_val = readl(sli4->reg[0] + SLI4_BMBX_REG);
drivers/scsi/elx/libefc_sli/sli4.h
3808
return readl(sli->reg[0] + SLI4_PORT_STATUS_REGOFF);
drivers/scsi/elx/libefc_sli/sli4.h
3820
return readl(sli->reg[0] + SLI4_PORT_ERROR1);
drivers/scsi/elx/libefc_sli/sli4.h
3826
return readl(sli->reg[0] + SLI4_PORT_ERROR2);
drivers/scsi/esas2r/esas2r.h
142
readl((void __iomem *)a->regs + (reg) + MW_REG_OFFSET_HWREG)
drivers/scsi/fnic/vnic_dev.h
61
return ((u64)readl(reg + 0x4UL) << 32) | (u64)readl(reg);
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
416
return readl(regs);
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
440
return readl(regs);
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
733
return readl(regs);
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
763
return readl(regs);
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
615
return readl(regs);
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
638
return readl(regs);
drivers/scsi/hpsa.c
7136
tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
drivers/scsi/hpsa.c
7340
misc_fw_support = readl(&cfgtable->misc_fw_support);
drivers/scsi/hpsa.c
7408
dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
drivers/scsi/hpsa.c
7410
readl(&(tb->TransportSupport)));
drivers/scsi/hpsa.c
7412
readl(&(tb->TransportActive)));
drivers/scsi/hpsa.c
7414
readl(&(tb->HostWrite.TransportRequest)));
drivers/scsi/hpsa.c
7416
readl(&(tb->HostWrite.CoalIntDelay)));
drivers/scsi/hpsa.c
7418
readl(&(tb->HostWrite.CoalIntCount)));
drivers/scsi/hpsa.c
7420
readl(&(tb->CmdsOutMax)));
drivers/scsi/hpsa.c
7421
dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
drivers/scsi/hpsa.c
7427
readl(&(tb->HeartBeat)));
drivers/scsi/hpsa.c
7584
scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
drivers/scsi/hpsa.c
7602
*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
drivers/scsi/hpsa.c
7603
*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
drivers/scsi/hpsa.c
7650
trans_offset = readl(&h->cfgtable->TransMethodOffset);
drivers/scsi/hpsa.c
7667
h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
drivers/scsi/hpsa.c
7699
h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
drivers/scsi/hpsa.c
7700
h->fw_support = readl(&(h->cfgtable->misc_fw_support));
drivers/scsi/hpsa.c
7718
h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
drivers/scsi/hpsa.c
7740
driver_support = readl(&(h->cfgtable->driver_support));
drivers/scsi/hpsa.c
7758
dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
drivers/scsi/hpsa.c
7771
doorbell_value = readl(h->vaddr + SA5_DOORBELL);
drivers/scsi/hpsa.c
7797
doorbell_value = readl(h->vaddr + SA5_DOORBELL);
drivers/scsi/hpsa.c
7814
trans_support = readl(&(h->cfgtable->TransportSupport));
drivers/scsi/hpsa.c
7818
h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
drivers/scsi/hpsa.c
7827
if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
drivers/scsi/hpsa.c
8258
lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
drivers/scsi/hpsa.c
8301
heartbeat = readl(&h->cfgtable->HeartBeat);
drivers/scsi/hpsa.c
8451
h->events = readl(&(h->cfgtable->event_notify));
drivers/scsi/hpsa.c
9253
register_value = readl(&(h->cfgtable->TransportActive));
drivers/scsi/hpsa.c
9272
readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
drivers/scsi/hpsa.c
9315
bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
drivers/scsi/hpsa.c
9355
readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
drivers/scsi/hpsa.c
9412
readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
drivers/scsi/hpsa.c
9467
trans_support = readl(&(h->cfgtable->TransportSupport));
drivers/scsi/hpsa.h
424
(void) readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
drivers/scsi/hpsa.h
449
(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
drivers/scsi/hpsa.h
454
(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
drivers/scsi/hpsa.h
466
(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
drivers/scsi/hpsa.h
471
(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
drivers/scsi/hpsa.h
480
(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
drivers/scsi/hpsa.h
485
(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
drivers/scsi/hpsa.h
499
(void) readl(h->vaddr + SA5_OUTDB_STATUS);
drivers/scsi/hpsa.h
504
(void) readl(h->vaddr + SA5_OUTDB_STATUS);
drivers/scsi/hpsa.h
530
= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
drivers/scsi/hpsa.h
551
readl(h->vaddr + SA5_INTR_STATUS);
drivers/scsi/hpsa.h
557
unsigned long register_value = readl(h->vaddr + SA5_INTR_STATUS);
drivers/scsi/hpsa.h
563
register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
drivers/scsi/hpsa.h
571
unsigned long register_value = readl(h->vaddr + SA5_INTR_STATUS);
drivers/scsi/hpsa.h
582
return readl(h->vaddr + SA5_INTR_STATUS) & SA5B_INTR_PENDING;
drivers/scsi/hptiop.c
101
if (readl(&p->flags) & IOP_REQUEST_FLAG_SYNC_REQUEST) {
drivers/scsi/hptiop.c
102
if (readl(&p->context))
drivers/scsi/hptiop.c
1194
u32 list_count = readl(&hba->u.mvfrey.mu->inbound_conf_ctl);
drivers/scsi/hptiop.c
120
if (plx && readl(plx + 0x11C5C) & 0xf)
drivers/scsi/hptiop.c
123
status = readl(&iop->outbound_intstatus);
drivers/scsi/hptiop.c
126
u32 msg = readl(&iop->outbound_msgaddr0);
drivers/scsi/hptiop.c
144
u32 outbound_tail = readl(&mu->outbound_tail);
drivers/scsi/hptiop.c
145
u32 outbound_head = readl(&mu->outbound_head);
drivers/scsi/hptiop.c
1522
int_mask = readl(&hba->u.itl.iop->outbound_intmask);
drivers/scsi/hptiop.c
1526
readl(&hba->u.itl.iop->outbound_intmask);
drivers/scsi/hptiop.c
1532
readl(&hba->u.mv.regs->outbound_intmask);
drivers/scsi/hptiop.c
1538
readl(&(hba->u.mvfrey.mu->f0_doorbell_enable));
drivers/scsi/hptiop.c
1540
readl(&(hba->u.mvfrey.mu->isr_enable));
drivers/scsi/hptiop.c
1542
readl(&(hba->u.mvfrey.mu->pcie_f0_int_enable));
drivers/scsi/hptiop.c
163
u32 inbound_head = readl(&hba->u.mv.mu->inbound_head);
drivers/scsi/hptiop.c
208
status = readl(&hba->u.mv.regs->outbound_doorbell);
drivers/scsi/hptiop.c
213
msg = readl(&hba->u.mv.mu->outbound_msg);
drivers/scsi/hptiop.c
261
status = readl(&(hba->u.mvfrey.mu->f0_doorbell));
drivers/scsi/hptiop.c
265
u32 msg = readl(&(hba->u.mvfrey.mu->cpu_to_f0_msg_a));
drivers/scsi/hptiop.c
272
status = readl(&(hba->u.mvfrey.mu->isr_cause));
drivers/scsi/hptiop.c
304
writel(readl(&req->flags) | IOP_REQUEST_FLAG_SYNC_REQUEST, &req->flags);
drivers/scsi/hptiop.c
308
readl(&hba->u.itl.iop->outbound_intstatus);
drivers/scsi/hptiop.c
312
if (readl(&req->context))
drivers/scsi/hptiop.c
363
readl(&hba->u.itl.iop->outbound_intstatus);
drivers/scsi/hptiop.c
370
readl(&hba->u.mv.regs->inbound_doorbell);
drivers/scsi/hptiop.c
376
readl(&(hba->u.mvfrey.mu->f0_to_cpu_msg_a));
drivers/scsi/hptiop.c
406
req32 = readl(&hba->u.itl.iop->inbound_queue);
drivers/scsi/hptiop.c
478
req32 = readl(&hba->u.itl.iop->inbound_queue);
drivers/scsi/hptiop.c
52
req = readl(&hba->u.itl.iop->inbound_queue);
drivers/scsi/hptiop.c
60
readl(&hba->u.itl.iop->outbound_intstatus);
drivers/scsi/hptiop.c
804
req, readl(&req->type), readl(&req->result),
drivers/scsi/hptiop.c
805
readl(&req->context), tag);
drivers/scsi/hptiop.c
807
BUG_ON(!readl(&req->result));
drivers/scsi/hptiop.c
808
BUG_ON(readl(&req->type) != IOP_REQUEST_TYPE_IOCTL_COMMAND);
drivers/scsi/hptiop.c
812
(readl(&req->context) |
drivers/scsi/hptiop.c
813
((u64)readl(&req->context_hi32)<<32));
drivers/scsi/hptiop.c
815
if (readl(&req->result) == IOP_RESULT_SUCCESS) {
drivers/scsi/hptiop.c
820
&p->buf[(readl(&p->inbuf_size) + 3)& ~3],
drivers/scsi/hptiop.c
90
while ((req = readl(&hba->u.itl.iop->outbound_queue)) !=
drivers/scsi/hptiop.c
952
readl(&(hba->u.mvfrey.mu->inbound_write_ptr));
drivers/scsi/ipr.c
2734
pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
drivers/scsi/ipr.c
2768
*dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
drivers/scsi/ipr.c
2829
*dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
drivers/scsi/ipr.c
2854
readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
drivers/scsi/ipr.c
3076
start_addr = readl(ioa_cfg->ioa_mailbox);
drivers/scsi/ipr.c
5220
readl(ioa_cfg->regs.sense_interrupt_reg);
drivers/scsi/ipr.c
5334
int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
drivers/scsi/ipr.c
5342
int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
drivers/scsi/ipr.c
5343
int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
drivers/scsi/ipr.c
5348
int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
drivers/scsi/ipr.c
5362
int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
drivers/scsi/ipr.c
5373
int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
drivers/scsi/ipr.c
5530
int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
drivers/scsi/ipr.c
5535
int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
drivers/scsi/ipr.c
748
readl(ioa_cfg->regs.sense_interrupt_reg);
drivers/scsi/ipr.c
7569
feedback = readl(ioa_cfg->regs.init_feedback_reg);
drivers/scsi/ipr.c
7585
int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
drivers/scsi/ipr.c
7589
int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
drivers/scsi/ipr.c
7595
int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
drivers/scsi/ipr.c
7639
int_reg = readl(ioa_cfg->regs.endian_swap_reg);
drivers/scsi/ipr.c
7642
int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
drivers/scsi/ipr.c
7647
int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
drivers/scsi/ipr.c
7661
int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
drivers/scsi/ipr.c
7739
mailbox = readl(ioa_cfg->ioa_mailbox);
drivers/scsi/ipr.c
7820
(readl(ioa_cfg->regs.sense_interrupt_reg) &
drivers/scsi/ipr.c
7899
readl(ioa_cfg->regs.endian_swap_reg);
drivers/scsi/ipr.c
8115
temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
drivers/scsi/ipr.c
9328
readl(ioa_cfg->regs.sense_interrupt_mask_reg);
drivers/scsi/ipr.c
9339
readl(ioa_cfg->regs.sense_interrupt_reg);
drivers/scsi/ipr.c
9483
interrupts = readl(ioa_cfg->regs.sense_interrupt_reg);
drivers/scsi/ipr.c
9566
mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
drivers/scsi/ipr.c
9567
interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
drivers/scsi/ipr.c
9568
uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
drivers/scsi/ips.c
4516
post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
drivers/scsi/ips.c
4517
bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
drivers/scsi/ips.c
4665
Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
drivers/scsi/ips.c
4668
readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/
drivers/scsi/ips.c
4880
Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
drivers/scsi/ips.c
4897
Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
drivers/scsi/ips.c
4908
Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
drivers/scsi/ips.c
4936
Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
drivers/scsi/ips.c
4953
Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
drivers/scsi/ips.c
4960
Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
drivers/scsi/ips.c
5241
val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
drivers/scsi/ips.c
5331
while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
drivers/scsi/ips.c
5499
Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
drivers/scsi/ips.c
6995
IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
drivers/scsi/isci/host.c
1448
val = readl(&ihost->smu_registers->clock_gating_control);
drivers/scsi/isci/host.c
1969
afe_status = readl(&afe->afe_common_block_status);
drivers/scsi/isci/host.c
2173
status = readl(&ihost->smu_registers->control_status);
drivers/scsi/isci/host.c
2184
val = readl(&ihost->smu_registers->device_context_capacity);
drivers/scsi/isci/host.c
2203
val = readl(&ihost->scu_registers->sdma.pdma_configuration);
drivers/scsi/isci/host.c
2207
val = readl(&ihost->scu_registers->sdma.cdma_configuration);
drivers/scsi/isci/host.c
233
readl(&ihost->smu_registers->interrupt_status);
drivers/scsi/isci/host.c
584
readl(&ihost->smu_registers->interrupt_status);
drivers/scsi/isci/host.c
712
readl(&ihost->smu_registers->interrupt_mask); /* flush */
drivers/scsi/isci/host.c
720
readl(&ihost->scu_registers->peg0.ptsg.control);
drivers/scsi/isci/host.c
738
readl(&ihost->smu_registers->task_context_assignment[0]);
drivers/scsi/isci/phy.c
108
tl_control = readl(&iphy->transport_layer_registers->control);
drivers/scsi/isci/phy.c
1182
readl(&iphy->link_layer_registers->phy_configuration);
drivers/scsi/isci/phy.c
1191
enable_spinup_value = readl(&iphy->link_layer_registers->notify_enable_spinup_control);
drivers/scsi/isci/phy.c
1202
val = readl(&ll->phy_configuration);
drivers/scsi/isci/phy.c
1207
readl(&ll->phy_configuration); /* flush */
drivers/scsi/isci/phy.c
1211
val = readl(&ll->phy_configuration);
drivers/scsi/isci/phy.c
1214
readl(&ll->phy_configuration); /* flush */
drivers/scsi/isci/phy.c
1236
readl(&iphy->link_layer_registers->phy_configuration);
drivers/scsi/isci/phy.c
1467
phy->running_disparity_error_count = readl(&r->running_disparity_error_count);
drivers/scsi/isci/phy.c
1468
phy->loss_of_dword_sync_count = readl(&r->loss_of_sync_error_count);
drivers/scsi/isci/phy.c
1469
phy->phy_reset_problem_count = readl(&r->phy_reset_problem_count);
drivers/scsi/isci/phy.c
1470
phy->invalid_dword_count = readl(&r->invalid_dword_counter);
drivers/scsi/isci/phy.c
158
phy_configuration = readl(&llr->phy_configuration);
drivers/scsi/isci/phy.c
203
reg = readl(&xcvr->afe_xcvr_control0);
drivers/scsi/isci/phy.c
207
reg = readl(&xcvr->afe_tx_ssc_control);
drivers/scsi/isci/phy.c
215
reg = readl(&xcvr->afe_tx_ssc_control);
drivers/scsi/isci/phy.c
219
reg = readl(&llr->stp_control);
drivers/scsi/isci/phy.c
284
sp_timeouts = readl(&llr->sas_phy_timeouts);
drivers/scsi/isci/phy.c
416
tl_control = readl(&iphy->transport_layer_registers->control);
drivers/scsi/isci/phy.c
426
readl(&iphy->link_layer_registers->phy_configuration);
drivers/scsi/isci/phy.c
439
readl(&iphy->link_layer_registers->phy_configuration);
drivers/scsi/isci/phy.c
447
sas->high = readl(&iphy->link_layer_registers->source_sas_address_high);
drivers/scsi/isci/phy.c
448
sas->low = readl(&iphy->link_layer_registers->source_sas_address_low);
drivers/scsi/isci/phy.c
461
proto->all = readl(&iphy->link_layer_registers->transmit_identification);
drivers/scsi/isci/phy.c
526
enable_spinup = readl(&iphy->link_layer_registers->notify_enable_spinup_control);
drivers/scsi/isci/phy.c
540
readl(&iphy->link_layer_registers->phy_configuration);
drivers/scsi/isci/phy.c
573
phy_control = readl(&iphy->link_layer_registers->phy_configuration);
drivers/scsi/isci/phy.c
674
val = readl(&iphy->link_layer_registers->transmit_comsas_signal);
drivers/scsi/isci/port.c
1009
readl(&ihost->smu_registers->interrupt_status); /* flush */
drivers/scsi/isci/port.c
1446
pts_control_value = readl(&iport->port_task_scheduler_registers->control);
drivers/scsi/isci/port.c
1455
pts_control_value = readl(&iport->port_task_scheduler_registers->control);
drivers/scsi/isci/port.c
1480
readl(&ihost->smu_registers->interrupt_status); /* flush */
drivers/scsi/isci/port.c
153
val = readl(&iphy->link_layer_registers->link_layer_control);
drivers/scsi/isci/port.c
871
pts_control_value = readl(&iport->port_task_scheduler_registers->control);
drivers/scsi/isci/port.c
938
pts_control_value = readl(&iport->port_task_scheduler_registers->control);
drivers/scsi/isci/request.c
783
if (readl(&ihost->smu_registers->address_modifier) == 0) {
drivers/scsi/isci/request.c
792
ret_val = readl(scu_reg_base +
drivers/scsi/lpfc/lpfc.h
1616
temp = readl(addr);
drivers/scsi/lpfc/lpfc.h
1641
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_attr.c
1863
reg_val = readl(phba->sli4_hba.conf_regs_memmap_p +
drivers/scsi/lpfc/lpfc_attr.c
1876
readl(phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
drivers/scsi/lpfc/lpfc_attr.c
2700
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_attr.c
2721
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_attr.c
6409
*tmp_ptr = readl(phba->ctrl_regs_memmap_p + off + buf_off);
drivers/scsi/lpfc/lpfc_bsg.c
1552
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_bsg.c
498
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_bsg.c
745
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_compat.h
53
readl(dest32); /* flush */
drivers/scsi/lpfc/lpfc_compat.h
74
*dest32 = readl( src32);
drivers/scsi/lpfc/lpfc_debugfs.c
3680
u32val = readl(mem_mapped_bar + offset_run);
drivers/scsi/lpfc/lpfc_debugfs.c
3699
u32val = readl(mem_mapped_bar + offset_run);
drivers/scsi/lpfc/lpfc_debugfs.c
3865
readl(mem_mapped_bar + offset);
drivers/scsi/lpfc/lpfc_debugfs.c
3868
u32val = readl(mem_mapped_bar + offset);
drivers/scsi/lpfc/lpfc_debugfs.c
3871
readl(mem_mapped_bar + offset);
drivers/scsi/lpfc/lpfc_debugfs.c
3874
u32val = readl(mem_mapped_bar + offset);
drivers/scsi/lpfc/lpfc_debugfs.c
3877
readl(mem_mapped_bar + offset);
drivers/scsi/lpfc/lpfc_debugfs.c
4611
readl(phba->sli4_hba.EQDBregaddr));
drivers/scsi/lpfc/lpfc_debugfs.c
4616
readl(phba->sli4_hba.CQDBregaddr));
drivers/scsi/lpfc/lpfc_debugfs.c
4621
readl(phba->sli4_hba.MQDBregaddr));
drivers/scsi/lpfc/lpfc_debugfs.c
4626
readl(phba->sli4_hba.WQDBregaddr));
drivers/scsi/lpfc/lpfc_debugfs.c
4631
readl(phba->sli4_hba.RQDBregaddr));
drivers/scsi/lpfc/lpfc_debugfs.c
4777
reg_val = readl(drb_reg);
drivers/scsi/lpfc/lpfc_debugfs.c
4781
reg_val = readl(drb_reg);
drivers/scsi/lpfc/lpfc_debugfs.c
4785
readl(drb_reg); /* flush */
drivers/scsi/lpfc/lpfc_debugfs.c
4821
readl(phba->sli4_hba.conf_regs_memmap_p +
drivers/scsi/lpfc/lpfc_debugfs.c
4827
readl(phba->sli4_hba.conf_regs_memmap_p +
drivers/scsi/lpfc/lpfc_debugfs.c
4833
readl(phba->sli4_hba.conf_regs_memmap_p +
drivers/scsi/lpfc/lpfc_debugfs.c
4839
readl(phba->sli4_hba.conf_regs_memmap_p +
drivers/scsi/lpfc/lpfc_debugfs.c
4845
readl(phba->sli4_hba.conf_regs_memmap_p +
drivers/scsi/lpfc/lpfc_debugfs.c
4851
readl(phba->sli4_hba.conf_regs_memmap_p +
drivers/scsi/lpfc/lpfc_debugfs.c
5001
reg_val = readl(ctl_reg);
drivers/scsi/lpfc/lpfc_debugfs.c
5005
reg_val = readl(ctl_reg);
drivers/scsi/lpfc/lpfc_debugfs.c
5009
readl(ctl_reg); /* flush */
drivers/scsi/lpfc/lpfc_debugfs.c
778
word0 = readl(phba->HAregaddr);
drivers/scsi/lpfc/lpfc_debugfs.c
779
word1 = readl(phba->CAregaddr);
drivers/scsi/lpfc/lpfc_debugfs.c
780
word2 = readl(phba->HSregaddr);
drivers/scsi/lpfc/lpfc_debugfs.c
781
word3 = readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_els.c
4637
control = readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_els.c
4640
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_hbadisc.c
1075
control = readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_hbadisc.c
1083
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_hbadisc.c
1482
control = readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_hbadisc.c
1485
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_hbadisc.c
1504
control = readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_hbadisc.c
1507
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_hbadisc.c
3716
control = readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_hbadisc.c
3719
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
11722
phba->work_status[0] = readl(
drivers/scsi/lpfc/lpfc_init.c
11724
phba->work_status[1] = readl(
drivers/scsi/lpfc/lpfc_init.c
1747
phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
drivers/scsi/lpfc/lpfc_init.c
1748
phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
drivers/scsi/lpfc/lpfc_init.c
1845
temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
drivers/scsi/lpfc/lpfc_init.c
2081
readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
drivers/scsi/lpfc/lpfc_init.c
2085
reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
drivers/scsi/lpfc/lpfc_init.c
2086
reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
drivers/scsi/lpfc/lpfc_init.c
2225
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
2237
control = readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_init.c
2240
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
2244
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
5057
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
5060
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
592
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
812
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
815
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
893
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_init.c
9463
readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
drivers/scsi/lpfc/lpfc_init.c
9465
readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
drivers/scsi/lpfc/lpfc_init.c
9467
readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
drivers/scsi/lpfc/lpfc_init.c
9469
readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
drivers/scsi/lpfc/lpfc_init.c
9494
readl(phba->sli4_hba.u.if_type2.
drivers/scsi/lpfc/lpfc_init.c
9497
readl(phba->sli4_hba.u.if_type2.
drivers/scsi/lpfc/lpfc_sli.c
13218
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
13285
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
13458
readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_sli.c
13544
readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
drivers/scsi/lpfc/lpfc_sli.c
13546
readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
drivers/scsi/lpfc/lpfc_sli.c
13757
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
13777
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
13813
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
13841
readl(phba->HCregaddr);
drivers/scsi/lpfc/lpfc_sli.c
14037
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
14140
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
2263
readl(phba->CAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
2288
readl(phba->CAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
2470
readl(phba->hbq_put + hbqno);
drivers/scsi/lpfc/lpfc_sli.c
4151
readl(phba->CAregaddr);
drivers/scsi/lpfc/lpfc_sli.c
4483
readl(phba->CAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
4808
readl(phba->MBslimaddr + 0xa8),
drivers/scsi/lpfc/lpfc_sli.c
4809
readl(phba->MBslimaddr + 0xac));
drivers/scsi/lpfc/lpfc_sli.c
4904
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
4964
if (readl(phba->HAregaddr) & HA_ERATT) {
drivers/scsi/lpfc/lpfc_sli.c
4972
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
5016
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
5121
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
5123
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
5238
readl(to_slim); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
5247
readl(to_slim); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
5365
readl(phba->MBslimaddr + 0xa8),
drivers/scsi/lpfc/lpfc_sli.c
5366
readl(phba->MBslimaddr + 0xac));
drivers/scsi/lpfc/lpfc_sli.c
5380
readl(phba->MBslimaddr + 0xa8),
drivers/scsi/lpfc/lpfc_sli.c
5381
readl(phba->MBslimaddr + 0xac));
drivers/scsi/lpfc/lpfc_sli.c
539
readl(q->phba->sli4_hba.EQDBregaddr);
drivers/scsi/lpfc/lpfc_sli.c
5411
readl(phba->MBslimaddr + 0xa8),
drivers/scsi/lpfc/lpfc_sli.c
5412
readl(phba->MBslimaddr + 0xac));
drivers/scsi/lpfc/lpfc_sli.c
5421
readl(phba->HCregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
5425
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
572
readl(q->phba->sli4_hba.EQDBregaddr);
drivers/scsi/lpfc/lpfc_sli.c
9660
readl(to_slim); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
9675
readl(phba->CAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
9684
readl(phba->CAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
9739
slimword0 = readl(phba->MBslimaddr);
drivers/scsi/lpfc/lpfc_sli.c
9750
word0 = readl(phba->MBslimaddr);
drivers/scsi/lpfc/lpfc_sli.c
9785
readl(phba->HAregaddr); /* flush */
drivers/scsi/lpfc/lpfc_sli.c
9958
bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
drivers/scsi/megaraid.c
79
#define RDINDOOR(adapter) readl((adapter)->mmio_base + 0x20)
drivers/scsi/megaraid.c
80
#define RDOUTDOOR(adapter) readl((adapter)->mmio_base + 0x2C)
drivers/scsi/megaraid/megaraid_mbox.h
227
#define RDINDOOR(rdev) readl((rdev)->baseaddr + 0x20)
drivers/scsi/megaraid/megaraid_mbox.h
228
#define RDOUTDOOR(rdev) readl((rdev)->baseaddr + 0x2C)
drivers/scsi/megaraid/megaraid_sas_base.c
1039
HostDiag = (u32)readl(hostdiag_offset);
drivers/scsi/megaraid/megaraid_sas_base.c
1043
HostDiag = (u32)readl(hostdiag_offset);
drivers/scsi/megaraid/megaraid_sas_base.c
1058
HostDiag = (u32)readl(hostdiag_offset);
drivers/scsi/megaraid/megaraid_sas_base.c
1061
HostDiag = (u32)readl(hostdiag_offset);
drivers/scsi/megaraid/megaraid_sas_base.c
2238
readl(&instance->reg_set->doorbell);
drivers/scsi/megaraid/megaraid_sas_base.c
269
ret_val = readl(addr);
drivers/scsi/megaraid/megaraid_sas_base.c
274
return readl(addr);
drivers/scsi/megaraid/megaraid_sas_base.c
2994
printk("%08x: %08x\n", (i * 4), readl(®[i]));
drivers/scsi/megaraid/megaraid_sas_base.c
3054
readl(®[i]));
drivers/scsi/megaraid/megaraid_sas_base.c
466
readl(®s->outbound_intr_mask);
drivers/scsi/megaraid/megaraid_sas_base.c
482
readl(®s->outbound_intr_mask);
drivers/scsi/megaraid/megaraid_sas_base.c
492
return readl(&instance->reg_set->outbound_msg_0);
drivers/scsi/megaraid/megaraid_sas_base.c
509
status = readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_base.c
523
readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_base.c
648
readl(®s->outbound_intr_mask);
drivers/scsi/megaraid/megaraid_sas_base.c
664
readl(®s->outbound_intr_mask);
drivers/scsi/megaraid/megaraid_sas_base.c
674
return readl(&instance->reg_set->outbound_scratch_pad_0);
drivers/scsi/megaraid/megaraid_sas_base.c
691
status = readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_base.c
705
readl(®s->outbound_doorbell_clear);
drivers/scsi/megaraid/megaraid_sas_base.c
777
readl(®s->outbound_intr_mask);
drivers/scsi/megaraid/megaraid_sas_base.c
793
readl(®s->outbound_intr_mask);
drivers/scsi/megaraid/megaraid_sas_base.c
803
return readl(&instance->reg_set->outbound_scratch_pad_0);
drivers/scsi/megaraid/megaraid_sas_base.c
821
status = readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_base.c
844
readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_base.c
925
readl(®s->outbound_intr_mask);
drivers/scsi/megaraid/megaraid_sas_base.c
941
readl(®s->outbound_intr_mask);
drivers/scsi/megaraid/megaraid_sas_base.c
951
return readl(&instance->reg_set->outbound_scratch_pad_0);
drivers/scsi/megaraid/megaraid_sas_base.c
969
status = readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_base.c
985
readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_fusion.c
173
readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_fusion.c
179
__func__, readl(®s->outbound_intr_mask));
drivers/scsi/megaraid/megaraid_sas_fusion.c
197
__func__, readl(®s->outbound_intr_mask));
drivers/scsi/megaraid/megaraid_sas_fusion.c
214
readl(®s->outbound_intr_status);
drivers/scsi/megaraid/megaraid_sas_fusion.c
4151
readl(&instance->reg_set->doorbell);
drivers/scsi/megaraid/megaraid_sas_fusion.c
4947
readl(&instance->reg_set->doorbell);
drivers/scsi/megaraid/megaraid_sas_fusion.c
5225
readl(&instance->reg_set->outbound_scratch_pad_0);
drivers/scsi/megaraid/megaraid_sas_fusion.c
5264
readl(&instance->reg_set->outbound_scratch_pad_0);
drivers/scsi/megaraid/megaraid_sas_fusion.c
5277
readl(&instance->reg_set->outbound_scratch_pad_0);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1064
fault = (readl(&mrioc->sysif_regs->fault) &
drivers/scsi/mpi3mr/mpi3mr_fw.c
1097
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1100
code = readl(&mrioc->sysif_regs->fault);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1101
code1 = readl(&mrioc->sysif_regs->fault_info[0]);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1102
code2 = readl(&mrioc->sysif_regs->fault_info[1]);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1103
code3 = readl(&mrioc->sysif_regs->fault_info[2]);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1124
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1127
mrioc->saved_fault_code = readl(&mrioc->sysif_regs->fault) &
drivers/scsi/mpi3mr/mpi3mr_fw.c
1131
readl(&mrioc->sysif_regs->fault_info[i]);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1150
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1151
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1344
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1376
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1382
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1394
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1508
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1509
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1568
readl(&mrioc->sysif_regs->host_diagnostic);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1607
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1624
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1703
fault = readl(&mrioc->sysif_regs->fault) & MPI3_SYSIF_FAULT_CODE_MASK;
drivers/scsi/mpi3mr/mpi3mr_fw.c
1724
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1793
host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1810
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1812
readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1826
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1841
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
1842
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
2512
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
2659
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
2666
trigger_data.fault = (readl(&mrioc->sysif_regs->fault) &
drivers/scsi/mpi3mr/mpi3mr_fw.c
2681
trigger_data.fault = (readl(&mrioc->sysif_regs->fault) &
drivers/scsi/mpi3mr/mpi3mr_fw.c
2687
host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic);
drivers/scsi/mpi3mr/mpi3mr_fw.c
2915
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
2928
trigger_data.fault = readl(&mrioc->sysif_regs->fault) & MPI3_SYSIF_FAULT_CODE_MASK;
drivers/scsi/mpi3mr/mpi3mr_fw.c
2931
host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic);
drivers/scsi/mpi3mr/mpi3mr_fw.c
3245
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
4676
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
5063
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
5070
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
5080
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
5089
ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpi3mr/mpi3mr_fw.c
5090
ioc_config = readl(&mrioc->sysif_regs->ioc_configuration);
drivers/scsi/mpi3mr/mpi3mr_fw.c
5582
trigger_data.fault = (readl(&mrioc->sysif_regs->fault) &
drivers/scsi/mpi3mr/mpi3mr_fw.c
5586
readl(&mrioc->sysif_regs->host_diagnostic);
drivers/scsi/mpi3mr/mpi3mr_os.c
4679
u32 ioc_status = readl(&mrioc->sysif_regs->ioc_status);
drivers/scsi/mpt3sas/mpt3sas_base.c
212
ret_val = readl(addr);
drivers/scsi/mpt3sas/mpt3sas_base.c
225
ret_val = readl(addr);
drivers/scsi/mpt3sas/mpt3sas_base.c
236
return readl(addr);
drivers/scsi/mpt3sas/mpt3sas_base.c
6778
pr_info("%08x: %08x\n", (i * 4), readl(®[i]));
drivers/scsi/mvsas/mv_chips.h
14
#define mr32(reg) readl(regs + reg)
drivers/scsi/mvsas/mv_chips.h
63
return (port < 4) ? readl(regs + port * 8) :
drivers/scsi/mvsas/mv_chips.h
64
readl(regs2 + (port - 4) * 8);
drivers/scsi/myrb.c
2784
unsigned char idb = readl(base + DAC960_PG_IDB_OFFSET);
drivers/scsi/myrb.c
2791
unsigned char idb = readl(base + DAC960_PG_IDB_OFFSET);
drivers/scsi/myrb.c
2809
unsigned char odb = readl(base + DAC960_PG_ODB_OFFSET);
drivers/scsi/myrs.c
2430
val = readl(base + DAC960_GEM_IDB_READ_OFFSET);
drivers/scsi/myrs.c
2438
val = readl(base + DAC960_GEM_IDB_READ_OFFSET);
drivers/scsi/myrs.c
2461
val = readl(base + DAC960_GEM_ODB_READ_OFFSET);
drivers/scsi/myrs.c
2508
val = readl(base + DAC960_GEM_ERRSTS_READ_OFFSET);
drivers/scsi/ncr53c8xx.h
283
#define readl_l2b readl
drivers/scsi/ncr53c8xx.h
287
#define readl_raw readl
drivers/scsi/ncr53c8xx.h
301
#define readl_raw readl
drivers/scsi/nsp32_io.h
113
return le32_to_cpu(readl(ptr));
drivers/scsi/pcmcia/nsp_io.h
231
*tmp = readl(ptr);
drivers/scsi/pm8001/pm8001_chips.h
57
return readl(pm8001_ha->io_mem[bar].memvirtaddr + offset);
drivers/scsi/pm8001/pm8001_chips.h
67
return readl(addr + offset);
drivers/scsi/pm8001/pm8001_sas.c
322
phy->invalid_dword_count = readl(qp);
drivers/scsi/pm8001/pm8001_sas.c
323
phy->running_disparity_error_count = readl(&qp[1]);
drivers/scsi/pm8001/pm8001_sas.c
324
phy->loss_of_dword_sync_count = readl(&qp[3]);
drivers/scsi/pm8001/pm8001_sas.c
325
phy->phy_reset_problem_count = readl(&qp[4]);
drivers/scsi/qla2xxx/qla_def.h
170
return readl(addr);
drivers/scsi/qla2xxx/qla_nx.c
702
*(u32 *)data = readl(addr);
drivers/scsi/qla2xxx/qla_nx2.c
2571
r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase));
drivers/scsi/qla2xxx/qla_nx2.c
36
return readl((void __iomem *) (ha->nx_pcibase + addr));
drivers/scsi/qla2xxx/qla_tmpl.c
672
readl(ha->tgt.atio_q_in) : 0, buf, len);
drivers/scsi/qla4xxx/ql4_83xx.c
1273
ret = readl(&ha->qla4_83xx_reg->mbox_int);
drivers/scsi/qla4xxx/ql4_83xx.c
1335
intr_status = readl(&ha->qla4_83xx_reg->risc_intr);
drivers/scsi/qla4xxx/ql4_83xx.c
17
return readl((void __iomem *)(ha->nx_pcibase + addr));
drivers/scsi/qla4xxx/ql4_dbg.c
39
i, readl(&ha->qla4_82xx_reg->mailbox_in[i]));
drivers/scsi/qla4xxx/ql4_init.c
128
readl(&ha->reg->rsp_q_out);
drivers/scsi/qla4xxx/ql4_init.c
640
readl(isp_ext_hw_conf(ha));
drivers/scsi/qla4xxx/ql4_init.c
709
readl(&ha->reg->mailbox[6]);
drivers/scsi/qla4xxx/ql4_init.c
712
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_init.c
747
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_init.c
830
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_init.c
833
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_inline.h
43
readl(&ha->reg->u1.isp4022.intr_mask);
drivers/scsi/qla4xxx/ql4_inline.h
46
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_inline.h
57
readl(&ha->reg->u1.isp4022.intr_mask);
drivers/scsi/qla4xxx/ql4_inline.h
60
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_iocb.c
197
readl(&ha->qla4_83xx_reg->req_q_in);
drivers/scsi/qla4xxx/ql4_iocb.c
203
readl(&ha->qla4_83xx_reg->rsp_q_out);
drivers/scsi/qla4xxx/ql4_iocb.c
234
readl(&ha->qla4_82xx_reg->rsp_q_out);
drivers/scsi/qla4xxx/ql4_iocb.c
247
readl(&ha->reg->req_q_in);
drivers/scsi/qla4xxx/ql4_iocb.c
261
readl(&ha->reg->rsp_q_out);
drivers/scsi/qla4xxx/ql4_isr.c
1030
readl(&ha->qla4_83xx_reg->mailbox_out[0]));
drivers/scsi/qla4xxx/ql4_isr.c
1060
readl(&ha->qla4_82xx_reg->mailbox_out[0]));
drivers/scsi/qla4xxx/ql4_isr.c
1064
readl(&ha->qla4_82xx_reg->host_int);
drivers/scsi/qla4xxx/ql4_isr.c
1085
readl(&ha->reg->mailbox[0]));
drivers/scsi/qla4xxx/ql4_isr.c
1090
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_isr.c
1150
intr_status = readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_isr.c
1162
readl(isp_port_error_status (ha))));
drivers/scsi/qla4xxx/ql4_isr.c
1171
if ((readl(&ha->reg->ctrl_status) &
drivers/scsi/qla4xxx/ql4_isr.c
1175
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_isr.c
1180
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_isr.c
1193
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_isr.c
1249
if (!(readl(&ha->qla4_82xx_reg->host_int) &
drivers/scsi/qla4xxx/ql4_isr.c
1254
intr_status = readl(&ha->qla4_82xx_reg->host_status);
drivers/scsi/qla4xxx/ql4_isr.c
1290
leg_int_ptr = readl(&ha->qla4_83xx_reg->leg_int_ptr);
drivers/scsi/qla4xxx/ql4_isr.c
1315
leg_int_ptr = readl(&ha->qla4_83xx_reg->leg_int_ptr);
drivers/scsi/qla4xxx/ql4_isr.c
1321
leg_int_ptr = readl(&ha->qla4_83xx_reg->risc_intr);
drivers/scsi/qla4xxx/ql4_isr.c
1359
ival = readl(&ha->qla4_83xx_reg->risc_intr);
drivers/scsi/qla4xxx/ql4_isr.c
1364
ival = readl(&ha->qla4_83xx_reg->mb_int_mask);
drivers/scsi/qla4xxx/ql4_isr.c
1371
readl(&ha->qla4_83xx_reg->mailbox_out[0]));
drivers/scsi/qla4xxx/ql4_isr.c
1373
ival = readl(&ha->qla4_83xx_reg->mb_int_mask);
drivers/scsi/qla4xxx/ql4_isr.c
1403
if (!(readl(&ha->qla4_82xx_reg->host_int) &
drivers/scsi/qla4xxx/ql4_isr.c
1409
intr_status = readl(&ha->qla4_82xx_reg->host_status);
drivers/scsi/qla4xxx/ql4_isr.c
1437
ival = readl(&ha->qla4_83xx_reg->iocb_int_mask);
drivers/scsi/qla4xxx/ql4_isr.c
1446
intr_status = readl(&ha->qla4_82xx_reg->host_status);
drivers/scsi/qla4xxx/ql4_isr.c
682
ha->mbox_status[i] = readl(&mailbox_out[i]);
drivers/scsi/qla4xxx/ql4_isr.c
691
mbox_sts[i] = readl(&mailbox_out[i]);
drivers/scsi/qla4xxx/ql4_mbx.c
25
readl(&ha->reg->mailbox[0]);
drivers/scsi/qla4xxx/ql4_mbx.c
27
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_mbx.c
34
intr_status = readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_nvram.c
15
readl(isp_nvram(ha));
drivers/scsi/qla4xxx/ql4_nvram.c
232
readl(isp_semaphore(ha));
drivers/scsi/qla4xxx/ql4_nx.c
2322
r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase));
drivers/scsi/qla4xxx/ql4_nx.c
3597
readl(&ha->qla4_83xx_reg->risc_intr);
drivers/scsi/qla4xxx/ql4_nx.c
3600
readl(&ha->qla4_82xx_reg->host_int);
drivers/scsi/qla4xxx/ql4_nx.c
369
win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase));
drivers/scsi/qla4xxx/ql4_nx.c
3907
readl(&ha->qla4_82xx_reg->mailbox_in[0]);
drivers/scsi/qla4xxx/ql4_nx.c
3909
readl(&ha->qla4_82xx_reg->hint);
drivers/scsi/qla4xxx/ql4_nx.c
3916
intr_status = readl(&ha->qla4_82xx_reg->host_int);
drivers/scsi/qla4xxx/ql4_nx.c
3919
intr_status = readl(&ha->qla4_82xx_reg->host_status);
drivers/scsi/qla4xxx/ql4_nx.c
446
data = readl((void __iomem *)off);
drivers/scsi/qla4xxx/ql4_nx.c
468
win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase));
drivers/scsi/qla4xxx/ql4_nx.c
476
*data = readl((void __iomem *)(off_value + CRB_INDIRECT_2M +
drivers/scsi/qla4xxx/ql4_nx.c
493
win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase));
drivers/scsi/qla4xxx/ql4_nx.c
758
*(u32 *)data = readl(addr);
drivers/scsi/qla4xxx/ql4_os.c
306
reg_val = readl(&ha->qla4_82xx_reg->host_status);
drivers/scsi/qla4xxx/ql4_os.c
4694
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_os.c
4736
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_os.c
4763
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_os.c
4777
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_os.c
5491
readl(&ha->reg->ctrl_status);
drivers/scsi/qla4xxx/ql4_os.c
5494
readl(&ha->qla4_82xx_reg->host_int);
drivers/scsi/qla4xxx/ql4_os.c
5497
readl(&ha->qla4_83xx_reg->risc_intr);
drivers/scsi/qla4xxx/ql4_os.c
5729
return (uint16_t)le32_to_cpu(readl(&ha->qla4_82xx_reg->req_q_out));
drivers/scsi/qla4xxx/ql4_os.c
5739
return (uint16_t)le32_to_cpu(readl(&ha->qla4_82xx_reg->rsp_q_in));
drivers/scsi/smartpqi/smartpqi_init.c
3139
if (readl(&pqi_registers->device_status) ==
drivers/scsi/smartpqi/smartpqi_init.c
3443
oq_pi = readl(queue_group->oq_pi);
drivers/scsi/smartpqi/smartpqi_init.c
3558
iq_ci = readl(queue_group->iq_ci[RAID_PATH]);
drivers/scsi/smartpqi/smartpqi_init.c
3911
oq_pi = readl(event_queue->oq_pi);
drivers/scsi/smartpqi/smartpqi_init.c
3966
intx_mask = readl(register_addr);
drivers/scsi/smartpqi/smartpqi_init.c
4030
intx_status = readl(&ctrl_info->pqi_registers->legacy_intx_status);
drivers/scsi/smartpqi/smartpqi_init.c
4477
oq_pi = readl(admin_queues->oq_pi);
drivers/scsi/smartpqi/smartpqi_init.c
4536
iq_ci = readl(queue_group->iq_ci[path]);
drivers/scsi/smartpqi/smartpqi_init.c
525
return readl(ctrl_info->heartbeat_counter);
drivers/scsi/smartpqi/smartpqi_init.c
6170
iq_ci = readl(queue_group->iq_ci[path]);
drivers/scsi/smartpqi/smartpqi_init.c
7698
reset_reg.all_bits = readl(&pqi_registers->device_reset);
drivers/scsi/smartpqi/smartpqi_sis.c
110
status = readl(&ctrl_info->registers->sis_firmware_status);
drivers/scsi/smartpqi/smartpqi_sis.c
115
readl(
drivers/scsi/smartpqi/smartpqi_sis.c
151
status = readl(&ctrl_info->registers->sis_firmware_status);
drivers/scsi/smartpqi/smartpqi_sis.c
161
readl(&ctrl_info->registers->sis_mailbox[7]));
drivers/scsi/smartpqi/smartpqi_sis.c
168
return readl(&ctrl_info->registers->sis_firmware_status) &
drivers/scsi/smartpqi/smartpqi_sis.c
174
return readl(&ctrl_info->registers->sis_product_identifier);
drivers/scsi/smartpqi/smartpqi_sis.c
215
readl(®isters->sis_interrupt_mask);
drivers/scsi/smartpqi/smartpqi_sis.c
228
doorbell = readl(®isters->sis_ctrl_to_host_doorbell);
drivers/scsi/smartpqi/smartpqi_sis.c
236
cmd_status = readl(®isters->sis_mailbox[0]);
drivers/scsi/smartpqi/smartpqi_sis.c
250
params->mailbox[i] = readl(®isters->sis_mailbox[i]);
drivers/scsi/smartpqi/smartpqi_sis.c
375
readl(&ctrl_info->registers->sis_host_to_ctrl_doorbell);
drivers/scsi/smartpqi/smartpqi_sis.c
378
if (readl(&ctrl_info->registers->sis_firmware_status) &
drivers/scsi/smartpqi/smartpqi_sis.c
417
if (readl(&ctrl_info->registers->sis_firmware_status) &
drivers/scsi/smartpqi/smartpqi_sis.c
445
return readl(&ctrl_info->registers->sis_driver_scratch);
drivers/scsi/smartpqi/smartpqi_sis.c
451
return ((enum sis_fw_triage_status)(readl(&ctrl_info->registers->sis_firmware_status) &
drivers/scsi/smartpqi/smartpqi_sis.c
457
return readl(&ctrl_info->registers->sis_firmware_status) & SIS_CTRL_KERNEL_CTRL_LOGGING;
drivers/scsi/smartpqi/smartpqi_sis.c
467
return ((enum sis_ctrl_logging_status)((readl(&ctrl_info->registers->sis_firmware_status) & SIS_CTRL_KERNEL_CTRL_LOGGING_STATUS) >> 3));
drivers/scsi/snic/vnic_dev.h
17
return ((u64)readl(reg + 0x4UL) << 32) | (u64)readl(reg);
drivers/scsi/stex.c
1005
data = readl(base + PSCRATCH4);
drivers/scsi/stex.c
1033
if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
drivers/scsi/stex.c
1035
readl(base + IDBL);
drivers/scsi/stex.c
1037
while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
drivers/scsi/stex.c
1051
data = readl(base + OMR1);
drivers/scsi/stex.c
1076
readl(base + IMR0);
drivers/scsi/stex.c
1078
readl(base + IMR1);
drivers/scsi/stex.c
1081
readl(base + OMR0);
drivers/scsi/stex.c
1083
readl(base + IDBL); /* flush */
drivers/scsi/stex.c
1087
while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
drivers/scsi/stex.c
1099
readl(base + IMR0);
drivers/scsi/stex.c
1101
readl(base + OMR0);
drivers/scsi/stex.c
1103
readl(base + IMR1);
drivers/scsi/stex.c
1105
readl(base + OMR1); /* flush */
drivers/scsi/stex.c
1122
operationaldata = readl(base + YIOA_STATUS);
drivers/scsi/stex.c
1131
operationaldata = readl(base + YIOA_STATUS);
drivers/scsi/stex.c
1134
operationaldata = readl(base + PSCRATCH3);
drivers/scsi/stex.c
1143
operationaldata = readl(base + PSCRATCH3);
drivers/scsi/stex.c
1164
data = readl(base + YINT_EN);
drivers/scsi/stex.c
1168
readl(base + YH2I_REQ_HI);
drivers/scsi/stex.c
1170
readl(base + YH2I_REQ); /* flush */
drivers/scsi/stex.c
1172
data = readl(base + YINT_EN);
drivers/scsi/stex.c
1200
mailboxdata = readl(base + MAILBOX_BASE + MAILBOX_HNDSHK_STS);
drivers/scsi/stex.c
1211
mailboxdata = readl(base + MAILBOX_BASE + MAILBOX_HNDSHK_STS);
drivers/scsi/stex.c
1268
data = readl(base + YI2H_INT);
drivers/scsi/stex.c
1275
data = readl(base + PSCRATCH4);
drivers/scsi/stex.c
1284
data = readl(base + ODBL);
drivers/scsi/stex.c
1289
readl(base + ODBL); /* flush */
drivers/scsi/stex.c
1355
readl(base + IDBL); /* flush */
drivers/scsi/stex.c
1381
readl(hba->mmio_base + YH2I_INT);
drivers/scsi/stex.c
527
readl(hba->mmio_base + IDBL); /* flush */
drivers/scsi/stex.c
559
readl(hba->mmio_base + YH2I_REQ_HI); /* flush */
drivers/scsi/stex.c
561
readl(hba->mmio_base + YH2I_REQ); /* flush */
drivers/scsi/stex.c
808
hba->status_head = readl(base + OMR1);
drivers/scsi/stex.c
880
readl(base + IMR1); /* flush */
drivers/scsi/stex.c
892
data = readl(base + ODBL);
drivers/scsi/stex.c
897
readl(base + ODBL); /* flush */
drivers/scsi/stex.c
994
data = readl(base + YI2H_INT);
drivers/scsi/sun3x_esp.c
44
readl(esp->dma_regs + (REG))
drivers/scsi/sym53c8xx_2/sym_glue.c
1497
ram_val = readl(device->s.ramaddr + ram_size - 16);
drivers/scsi/sym53c8xx_2/sym_glue.h
103
#define readl_l2b readl
drivers/scsi/sym53c8xx_2/sym_glue.h
110
#define readl_raw readl
drivers/scsi/vmw_pvscsi.c
215
return readl(adapter->mmioBase + offset);
drivers/slimbus/qcom-ngd-ctrl.c
772
stat = readl(base + NGD_INT_STAT);
drivers/soc/apple/sart.c
122
u32 cfg = readl(sart->regs + APPLE_SART2_CONFIG(index));
drivers/soc/apple/sart.c
123
phys_addr_t paddr_ = readl(sart->regs + APPLE_SART2_PADDR(index));
drivers/soc/apple/sart.c
155
phys_addr_t paddr_ = readl(sart->regs + APPLE_SART3_PADDR(index));
drivers/soc/apple/sart.c
156
size_t size_ = readl(sart->regs + APPLE_SART3_SIZE(index));
drivers/soc/apple/sart.c
158
*flags = readl(sart->regs + APPLE_SART3_CONFIG(index));
drivers/soc/apple/sart.c
89
u32 cfg = readl(sart->regs + APPLE_SART0_CONFIG(index));
drivers/soc/apple/sart.c
90
phys_addr_t paddr_ = readl(sart->regs + APPLE_SART0_PADDR(index));
drivers/soc/apple/tunable.c
69
old_val = readl(regs + tunable->values[i].offset);
drivers/soc/aspeed/aspeed-socinfo.c
103
siliconid = readl(reg);
drivers/soc/aspeed/aspeed-socinfo.c
110
chipid[0] = readl(reg);
drivers/soc/aspeed/aspeed-socinfo.c
111
chipid[1] = readl(reg + 4);
drivers/soc/atmel/soc.c
297
*cidr = readl(regs + AT91_DBGU_CIDR);
drivers/soc/atmel/soc.c
298
*exid = readl(regs + AT91_DBGU_EXID);
drivers/soc/atmel/soc.c
328
*cidr = readl(regs + AT91_CHIPID_CIDR);
drivers/soc/atmel/soc.c
329
*exid = readl(regs + AT91_CHIPID_EXID);
drivers/soc/bcm/brcmstb/common.c
62
family_id = readl(sun_top_ctrl_base);
drivers/soc/bcm/brcmstb/common.c
63
product_id = readl(sun_top_ctrl_base + 0x4);
drivers/soc/fsl/dpaa2-console.c
132
read_magic = readl(&cd->hdr->magic_word);
drivers/soc/fsl/dpaa2-console.c
133
last_byte = readl(&cd->hdr->last_byte);
drivers/soc/fsl/dpaa2-console.c
134
buf_start = readl(&cd->hdr->buf_start);
drivers/soc/fsl/dpaa2-console.c
135
buf_length = readl(&cd->hdr->buf_length);
drivers/soc/fsl/dpaa2-console.c
65
u32 last_byte = readl(&cd->hdr->last_byte);
drivers/soc/fsl/dpaa2-console.c
81
mcfwbase = readl(mcfbaregs + MCFBAHR_OFFSET) &
drivers/soc/fsl/dpaa2-console.c
84
mcfwbase |= readl(mcfbaregs + MCFBALR_OFFSET) & MC_FW_ADDR_MASK_LOW;
drivers/soc/fujitsu/a64fx-diag.c
44
mmsc = readl(diag_status_reg_addr);
drivers/soc/fujitsu/a64fx-diag.c
55
mmsc = readl(diag_enable_reg_addr);
drivers/soc/fujitsu/a64fx-diag.c
68
mmsc = readl(diag_enable_reg_addr);
drivers/soc/loongson/loongson2_pm.c
39
#define loongson2_pm_readl(reg) readl(loongson2_pm.base + reg)
drivers/soc/mediatek/mtk-devapc.c
129
val = readl(pd_vio_shift_sta_reg);
drivers/soc/mediatek/mtk-devapc.c
170
vio_dbgs.vio_dbg0 = readl(vio_dbg0_reg);
drivers/soc/mediatek/mtk-devapc.c
171
vio_dbgs.vio_dbg1 = readl(vio_dbg1_reg);
drivers/soc/mediatek/mtk-devapc.c
89
val = readl(reg + 4 * i);
drivers/soc/mediatek/mtk-dvfsrc.c
130
return readl(dvfs->regs + dvfs->dvd->regs[offset]);
drivers/soc/mediatek/mtk-dvfsrc.c
482
val = readl(dvfsrc->regs + reg_ofst);
drivers/soc/mediatek/mtk-pmic-wrap.c
1391
return readl(wrp->base + wrp->master->regs[reg]);
drivers/soc/qcom/ice.c
99
readl((engine)->base + (reg))
drivers/soc/qcom/ocmem.c
109
return readl(ocmem->mmio + reg);
drivers/soc/qcom/qcom-geni-se.c
280
#define geni_setbits32(_addr, _v) writel(readl(_addr) | (_v), _addr)
drivers/soc/qcom/qcom-geni-se.c
281
#define geni_clrbits32(_addr, _v) writel(readl(_addr) & ~(_v), _addr)
drivers/soc/qcom/qcom-geni-se.c
424
val = readl(se->base + SE_GENI_M_IRQ_EN);
drivers/soc/qcom/qcom-geni-se.c
431
val = readl(se->base + SE_GSI_EVENT_EN);
drivers/soc/qcom/qcom_aoss.c
106
return readl(qmp->msgram + QMP_DESC_MAGIC) == QMP_MAGIC;
drivers/soc/qcom/qcom_aoss.c
111
return readl(qmp->msgram + QMP_DESC_MCORE_LINK_STATE_ACK) == QMP_STATE_UP;
drivers/soc/qcom/qcom_aoss.c
116
return readl(qmp->msgram + QMP_DESC_MCORE_CH_STATE_ACK) == QMP_STATE_UP;
drivers/soc/qcom/qcom_aoss.c
121
return readl(qmp->msgram + QMP_DESC_UCORE_CH_STATE) == QMP_STATE_UP;
drivers/soc/qcom/qcom_aoss.c
134
val = readl(qmp->msgram + QMP_DESC_VERSION);
drivers/soc/qcom/qcom_aoss.c
140
qmp->offset = readl(qmp->msgram + QMP_DESC_MCORE_MBOX_OFFSET);
drivers/soc/qcom/qcom_aoss.c
141
qmp->size = readl(qmp->msgram + QMP_DESC_MCORE_MBOX_SIZE);
drivers/soc/qcom/qcom_aoss.c
148
val = readl(qmp->msgram + QMP_DESC_UCORE_LINK_STATE);
drivers/soc/qcom/qcom_aoss.c
213
return readl(qmp->msgram + qmp->offset) == 0;
drivers/soc/qcom/qcom_aoss.c
257
readl(qmp->msgram + qmp->offset);
drivers/soc/qcom/qcom_stats.c
261
stats_offset = readl(reg + RPM_DYNAMIC_ADDR);
drivers/soc/qcom/qcom_stats.c
275
type = readl(d[i].base);
drivers/soc/qcom/rpmh-rsc.c
242
if (readl(tcs_reg_addr(drv, reg, tcs_id)) == data)
drivers/soc/qcom/smp2p.c
255
val = readl(entry->value);
drivers/soc/qcom/smp2p.c
419
val = orig = readl(entry->value);
drivers/soc/qcom/smsm.c
159
val = orig = readl(smsm->local_state);
drivers/soc/qcom/smsm.c
181
val = readl(smsm->subscription + host);
drivers/soc/qcom/smsm.c
219
val = readl(entry->remote_state);
drivers/soc/qcom/smsm.c
257
val = readl(entry->subscription + smsm->local_host);
drivers/soc/qcom/smsm.c
280
if (readl(entry->remote_state) & BIT(irq))
drivers/soc/qcom/smsm.c
288
val = readl(entry->subscription + smsm->local_host);
drivers/soc/qcom/smsm.c
330
val = readl(entry->remote_state);
drivers/soc/renesas/r9a09g047-sys.c
60
prr_val = readl(sysc_base + SYS_LSI_PRR);
drivers/soc/renesas/r9a09g047-sys.c
61
mode_val = readl(sysc_base + SYS_LSI_MODE);
drivers/soc/renesas/r9a09g056-sys.c
62
prr_val = readl(sysc_base + SYS_LSI_PRR);
drivers/soc/renesas/r9a09g056-sys.c
63
mode_val = readl(sysc_base + SYS_LSI_MODE);
drivers/soc/renesas/r9a09g057-sys.c
68
prr_val = readl(sysc_base + SYS_LSI_PRR);
drivers/soc/renesas/r9a09g057-sys.c
69
mode_val = readl(sysc_base + SYS_LSI_MODE);
drivers/soc/renesas/renesas-soc.c
501
product = readl(chipid + id->offset);
drivers/soc/renesas/rz-sysc.c
60
val = readl(sysc->base + soc_data->devid_offset);
drivers/soc/samsung/exynos-usi.c
183
val = readl(usi->regs + USI_CON);
drivers/soc/samsung/exynos-usi.c
190
val = readl(usi->regs + USI_OPTION);
drivers/soc/samsung/exynos-usi.c
234
val = readl(usi->regs + USI_OPTION);
drivers/soc/samsung/exynos-usi.c
240
val = readl(usi->regs + USI_CON);
drivers/soc/sunxi/sunxi_sram.c
143
val = readl(base + sram_data->reg);
drivers/soc/sunxi/sunxi_sram.c
254
val = readl(base + sram_data->reg);
drivers/soc/tegra/cbb/tegra194-cbb.c
1698
value = readl(priv->regs + ERRLOGGER_0_ERRVLD_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1699
value |= (readl(priv->regs + ERRLOGGER_1_ERRVLD_0) << 1);
drivers/soc/tegra/cbb/tegra194-cbb.c
1700
value |= (readl(priv->regs + ERRLOGGER_2_ERRVLD_0) << 2);
drivers/soc/tegra/cbb/tegra194-cbb.c
1710
value = readl(addr + DMAAPB_X_RAW_INTERRUPT_STATUS);
drivers/soc/tegra/cbb/tegra194-cbb.c
1926
cbb->errlog0 = readl(cbb->regs + ERRLOGGER_0_ERRLOG0_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1927
cbb->errlog1 = readl(cbb->regs + ERRLOGGER_0_ERRLOG1_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1928
cbb->errlog2 = readl(cbb->regs + ERRLOGGER_0_RSVD_00_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1929
cbb->errlog3 = readl(cbb->regs + ERRLOGGER_0_ERRLOG3_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1930
cbb->errlog4 = readl(cbb->regs + ERRLOGGER_0_ERRLOG4_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1931
cbb->errlog5 = readl(cbb->regs + ERRLOGGER_0_ERRLOG5_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1933
cbb->errlog0 = readl(cbb->regs + ERRLOGGER_1_ERRLOG0_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1934
cbb->errlog1 = readl(cbb->regs + ERRLOGGER_1_ERRLOG1_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1935
cbb->errlog2 = readl(cbb->regs + ERRLOGGER_1_RSVD_00_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1936
cbb->errlog3 = readl(cbb->regs + ERRLOGGER_1_ERRLOG3_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1937
cbb->errlog4 = readl(cbb->regs + ERRLOGGER_1_ERRLOG4_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1938
cbb->errlog5 = readl(cbb->regs + ERRLOGGER_1_ERRLOG5_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1940
cbb->errlog0 = readl(cbb->regs + ERRLOGGER_2_ERRLOG0_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1941
cbb->errlog1 = readl(cbb->regs + ERRLOGGER_2_ERRLOG1_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1942
cbb->errlog2 = readl(cbb->regs + ERRLOGGER_2_RSVD_00_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1943
cbb->errlog3 = readl(cbb->regs + ERRLOGGER_2_ERRLOG3_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1944
cbb->errlog4 = readl(cbb->regs + ERRLOGGER_2_ERRLOG4_0);
drivers/soc/tegra/cbb/tegra194-cbb.c
1945
cbb->errlog5 = readl(cbb->regs + ERRLOGGER_2_ERRLOG5_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
203
val = readl(cbb->regs + cbb->fabric->firewall_base + cbb->fabric->firewall_ctl);
drivers/soc/tegra/cbb/tegra234-cbb.c
216
val = readl(cbb->regs + cbb->fabric->firewall_base + cbb->fabric->firewall_wr_ctl);
drivers/soc/tegra/cbb/tegra234-cbb.c
250
value = readl(addr + FABRIC_EN_CFG_STATUS_0_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
266
timeout = readl(addr);
drivers/soc/tegra/cbb/tegra234-cbb.c
373
hi = readl(cbb->regs + notifier + FABRIC_EN_CFG_TARGET_NODE_ADDR_HI_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
374
lo = readl(cbb->regs + notifier + FABRIC_EN_CFG_TARGET_NODE_ADDR_LOW_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
537
status = readl(cbb->mon + FABRIC_MN_INITIATOR_ERR_STATUS_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
548
overflow = readl(cbb->mon + FABRIC_MN_INITIATOR_ERR_OVERFLOW_STATUS_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
552
error = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ERR_STATUS_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
564
hi = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ADDR_HIGH_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
565
lo = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ADDR_LOW_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
569
cbb->mn_attr0 = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ATTRIBUTES0_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
570
cbb->mn_attr1 = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ATTRIBUTES1_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
571
cbb->mn_attr2 = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_ATTRIBUTES2_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
572
cbb->mn_user_bits = readl(cbb->mon + FABRIC_MN_INITIATOR_LOG_USER_BITS0_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
601
hi = readl(cbb->regs + notifier + FABRIC_EN_CFG_ADDR_HI_0);
drivers/soc/tegra/cbb/tegra234-cbb.c
602
lo = readl(cbb->regs + notifier + FABRIC_EN_CFG_ADDR_LOW_0);
drivers/soc/tegra/flowctrl.c
59
return readl(tegra_flowctrl_base + offset);
drivers/soc/tegra/fuse/fuse-tegra.c
379
reg = readl(base + 0x14);
drivers/soc/tegra/pmc.c
2616
value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(SW_WAKE_ID));
drivers/soc/tegra/pmc.c
2635
value = readl(pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(offset));
drivers/soc/tegra/pmc.c
2655
value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq));
drivers/soc/tegra/pmc.c
3293
value = readl(pmc->wake + offset);
drivers/soc/tegra/pmc.c
3348
status = readl(pmc->wake + WAKE_AOWAKE_SW_STATUS(i));
drivers/soc/tegra/pmc.c
3362
mask = readl(pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(i));
drivers/soc/tegra/pmc.c
3363
status = readl(pmc->wake + WAKE_AOWAKE_STATUS_R(i)) & mask;
drivers/soc/tegra/pmc.c
3377
mask = readl(pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(i));
drivers/soc/tegra/pmc.c
3378
pmc->wake_status[i] = readl(pmc->wake + WAKE_AOWAKE_STATUS_R(i)) & mask;
drivers/soc/tegra/pmc.c
4097
value = readl(wake + WAKE_AOWAKE_CTRL);
drivers/soc/tegra/pmc.c
4695
saved = readl(pmc->base + pmc->soc->regs->scratch0);
drivers/soc/tegra/pmc.c
4703
value = readl(pmc->base + pmc->soc->regs->scratch0);
drivers/soc/tegra/pmc.c
523
return readl(pmc->base + offset);
drivers/soc/tegra/pmc.c
552
return readl(pmc->scratch + offset);
drivers/soc/ti/k3-ringacc.c
1406
ringacc->num_proxies = readl(&ringacc->proxy_gcfg->config) &
drivers/soc/ti/k3-ringacc.c
1441
readl(&ringacc->proxy_gcfg->revision), ringacc->num_proxies);
drivers/soc/ti/k3-ringacc.c
242
return readl(&ring->rt->occ) & K3_RINGACC_RT_OCC_MASK;
drivers/soc/ti/k3-ringacc.c
249
val = readl(&ring->rt->occ);
drivers/soc/ti/k3-ringacc.c
321
dev_dbg(dev, "dump ring_rt_regs: db%08x\n", readl(&ring->rt->db));
drivers/soc/ti/k3-ringacc.c
322
dev_dbg(dev, "dump occ%08x\n", readl(&ring->rt->occ));
drivers/soc/ti/k3-ringacc.c
323
dev_dbg(dev, "dump indx%08x\n", readl(&ring->rt->indx));
drivers/soc/ti/k3-ringacc.c
324
dev_dbg(dev, "dump hwocc%08x\n", readl(&ring->rt->hwocc));
drivers/soc/ti/k3-ringacc.c
325
dev_dbg(dev, "dump hwindx%08x\n", readl(&ring->rt->hwindx));
drivers/soc/ti/wkup_m3_ipc.c
260
return readl(m3_ipc->ipc_mem_base +
drivers/soc/ux500/ux500-soc-id.c
45
asicid = readl(virt);
drivers/soc/vt8500/wmt-socinfo.c
60
sccid = readl(reg);
drivers/soundwire/amd_init.h
17
tmp = readl(mmio + offset);
drivers/soundwire/amd_manager.c
1128
val = readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL);
drivers/soundwire/amd_manager.c
1297
val = readl(amd_manager->acp_mmio + ACP_PME_EN);
drivers/soundwire/amd_manager.c
1300
val = readl(amd_manager->acp_mmio + ACP_PME_EN);
drivers/soundwire/amd_manager.c
1337
val = readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL);
drivers/soundwire/amd_manager.c
137
wake_ctrl = readl(amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_MASK_8TO11);
drivers/soundwire/amd_manager.c
150
sdw_dev_state = readl(amd_manager->acp_mmio + AMD_SDW_DEVICE_STATE);
drivers/soundwire/amd_manager.c
164
sdw_dev_state = readl(amd_manager->acp_mmio + AMD_SDW_DEVICE_STATE);
drivers/soundwire/amd_manager.c
188
intr_cntl1 = readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(ACP_SDW1));
drivers/soundwire/amd_manager.c
253
upper_resp = readl(amd_manager->mmio + ACP_SW_IMM_RESP_UPPER_WORD);
drivers/soundwire/amd_manager.c
254
lower_resp = readl(amd_manager->mmio + ACP_SW_IMM_RESP_LOWER_QWORD);
drivers/soundwire/amd_manager.c
509
dpn_frame_fmt = readl(amd_manager->mmio + frame_fmt_reg);
drivers/soundwire/amd_manager.c
567
dpn_frame_fmt = readl(amd_manager->mmio + frame_fmt_reg);
drivers/soundwire/amd_manager.c
588
dpn_lanectrl = readl(amd_manager->mmio + lane_ctrl_ch_en_reg);
drivers/soundwire/amd_manager.c
630
dpn_ch_enable = readl(amd_manager->mmio + lane_ctrl_ch_en_reg);
drivers/soundwire/amd_manager.c
81
val = readl(amd_manager->mmio + ACP_SW_CLK_RESUME_CTRL);
drivers/soundwire/amd_manager.c
934
status_change_8to11 = readl(amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_8TO11);
drivers/soundwire/amd_manager.c
935
status_change_0to7 = readl(amd_manager->mmio + ACP_SW_STATE_CHANGE_STATUS_0TO7);
drivers/soundwire/cadence_master.c
208
return readl(cdns->registers + offset);
drivers/soundwire/cadence_master.c
249
reg_read = readl(cdns->registers + offset);
drivers/soundwire/intel.c
29
reg_read = readl(base + offset);
drivers/soundwire/intel.h
109
return readl(base + offset);
drivers/soundwire/qcom.c
374
*val = readl(ctrl->mmio + reg);
drivers/spi/spi-amd.c
148
return readl((u8 __iomem *)amd_spi->io_remap_addr + idx);
drivers/spi/spi-amlogic-spifc-a1.c
139
data = readl(spifc->base + SPIFC_A1_DBUF_DATA_REG);
drivers/spi/spi-amlogic-spifc-a1.c
174
val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
drivers/spi/spi-amlogic-spifc-a1.c
187
val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
drivers/spi/spi-amlogic-spifc-a1.c
196
u32 val = readl(spifc->base + SPIFC_A1_USER_CTRL2_REG);
drivers/spi/spi-amlogic-spifc-a1.c
206
u32 val = readl(spifc->base + SPIFC_A1_USER_CTRL3_REG);
drivers/spi/spi-amlogic-spifc-a1.c
229
val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
drivers/spi/spi-amlogic-spifc-a1.c
305
regv = readl(spifc->base + SPIFC_A1_AHB_REQ_CTRL_REG);
drivers/spi/spi-amlogic-spifc-a1.c
309
regv = readl(spifc->base + SPIFC_A1_AHB_CTRL_REG);
drivers/spi/spi-armada-3700.c
118
return readl(a3700_spi->base + offset);
drivers/spi/spi-aspeed-smc.c
135
ctl = readl(chip->ctl) & ~CTRL_IO_MODE_MASK;
drivers/spi/spi-aspeed-smc.c
322
addr_mode = readl(aspi->regs + CE_CTRL_REG);
drivers/spi/spi-aspeed-smc.c
418
seg_val_backup = readl(seg_reg);
drivers/spi/spi-aspeed-smc.c
431
if (seg_val != readl(seg_reg)) {
drivers/spi/spi-aspeed-smc.c
725
ctl_val = readl(chip->ctl) & ~CTRL_IO_CMD_MASK;
drivers/spi/spi-aspeed-smc.c
735
u32 addr_mode = readl(aspi->regs + CE_CTRL_REG);
drivers/spi/spi-aspeed-smc.c
794
reg = readl(aspi->regs + CONFIG_REG);
drivers/spi/spi-aspeed-smc.c
803
u32 reg = readl(aspi->regs + CONFIG_REG);
drivers/spi/spi-axi-spi-engine.c
1176
version = readl(spi_engine->base + ADI_AXI_REG_VERSION);
drivers/spi/spi-axi-spi-engine.c
1185
data_width_reg_val = readl(spi_engine->base + SPI_ENGINE_REG_DATA_WIDTH);
drivers/spi/spi-axi-spi-engine.c
1188
unsigned int sizes = readl(spi_engine->base +
drivers/spi/spi-bcm2835.c
209
return readl(bs->regs + reg);
drivers/spi/spi-bcm2835aux.c
145
return readl(bs->regs + reg);
drivers/spi/spi-cadence-quadspi.c
1008
reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
1055
reg = readl(reg_base + CQSPI_REG_WR_COMPLETION_CTRL);
drivers/spi/spi-cadence-quadspi.c
1066
reg = readl(reg_base + CQSPI_REG_SIZE);
drivers/spi/spi-cadence-quadspi.c
1070
readl(reg_base + CQSPI_REG_SIZE); /* Flush posted write. */
drivers/spi/spi-cadence-quadspi.c
1099
readl(reg_base + CQSPI_REG_INDIRECTWR); /* Flush posted write. */
drivers/spi/spi-cadence-quadspi.c
1116
readl(reg_base + CQSPI_REG_INDIRECTWR);
drivers/spi/spi-cadence-quadspi.c
1185
reg = readl(reg_base + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
1267
reg = readl(reg_base + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
1280
reg = readl(reg_base + CQSPI_REG_READCAPTURE);
drivers/spi/spi-cadence-quadspi.c
1665
reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
1672
reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
1691
reg = readl(cqspi->iobase + CQSPI_REG_SRAMPARTITION);
drivers/spi/spi-cadence-quadspi.c
348
u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
355
u32 reg = readl(cqspi->iobase + CQSPI_REG_SDRAMLEVEL);
drivers/spi/spi-cadence-quadspi.c
365
dma_status = readl(cqspi->iobase +
drivers/spi/spi-cadence-quadspi.c
380
irq_status = readl(cqspi->iobase + CQSPI_REG_IRQSTATUS);
drivers/spi/spi-cadence-quadspi.c
495
reg = readl(reg_base + CQSPI_REG_OP_EXT_LOWER);
drivers/spi/spi-cadence-quadspi.c
511
reg = readl(reg_base + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
601
reg = readl(reg_base + CQSPI_REG_CMDREADDATALOWER);
drivers/spi/spi-cadence-quadspi.c
609
reg = readl(reg_base + CQSPI_REG_CMDREADDATAUPPER);
drivers/spi/spi-cadence-quadspi.c
725
reg = readl(reg_base + CQSPI_REG_SIZE);
drivers/spi/spi-cadence-quadspi.c
729
readl(reg_base + CQSPI_REG_SIZE); /* Flush posted write. */
drivers/spi/spi-cadence-quadspi.c
775
readl(reg_base + CQSPI_REG_INDIRECTRD); /* Flush posted write. */
drivers/spi/spi-cadence-quadspi.c
854
reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
874
reg = readl(reg_base + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
910
reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-quadspi.c
975
reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
drivers/spi/spi-cadence-xspi.c
1044
u32 xfer_control = readl(cdns_xspi->xferbase + MRVL_XFER_FUNC_CTRL);
drivers/spi/spi-cadence-xspi.c
1116
u32 xfer_control = readl(cdns_xspi->xferbase + MRVL_XFER_FUNC_CTRL);
drivers/spi/spi-cadence-xspi.c
385
u32 dll_cntrl = readl(cdns_xspi->iobase +
drivers/spi/spi-cadence-xspi.c
449
clk_reg = readl(cdns_xspi->auxbase + MRVL_XSPI_CLK_CTRL_AUX_REG);
drivers/spi/spi-cadence-xspi.c
496
u32 cmd_status = readl(cdns_xspi->iobase + CDNS_XSPI_CMD_STATUS_REG);
drivers/spi/spi-cadence-xspi.c
534
intr_enable = readl(cdns_xspi->iobase + CDNS_XSPI_INTR_ENABLE_REG);
drivers/spi/spi-cadence-xspi.c
548
irq_status = readl(cdns_xspi->iobase + CDNS_XSPI_INTR_STATUS_REG);
drivers/spi/spi-cadence-xspi.c
551
intr_enable = readl(cdns_xspi->iobase + CDNS_XSPI_INTR_ENABLE_REG);
drivers/spi/spi-cadence-xspi.c
565
ctrl_ver = readl(cdns_xspi->iobase + CDNS_XSPI_CTRL_VERSION_REG);
drivers/spi/spi-cadence-xspi.c
574
ctrl_features = readl(cdns_xspi->iobase + CDNS_XSPI_CTRL_FEATURES_REG);
drivers/spi/spi-cadence-xspi.c
586
sdma_size = readl(cdns_xspi->iobase + CDNS_XSPI_SDMA_SIZE_REG);
drivers/spi/spi-cadence-xspi.c
587
sdma_trd_info = readl(cdns_xspi->iobase + CDNS_XSPI_SDMA_TRD_INFO_REG);
drivers/spi/spi-cadence-xspi.c
658
sdma_size = readl(cdns_xspi->iobase + CDNS_XSPI_SDMA_SIZE_REG);
drivers/spi/spi-cadence-xspi.c
659
sdma_trd_info = readl(cdns_xspi->iobase + CDNS_XSPI_SDMA_TRD_INFO_REG);
drivers/spi/spi-cadence-xspi.c
857
irq_status = readl(cdns_xspi->iobase + CDNS_XSPI_INTR_STATUS_REG);
drivers/spi/spi-cadence-xspi.c
879
irq_status = readl(cdns_xspi->iobase + CDNS_XSPI_TRD_COMP_INTR_STATUS);
drivers/spi/spi-cadence-xspi.c
921
readl(cdns_xspi->iobase + CDNS_XSPI_DLL_PHY_CTRL));
drivers/spi/spi-cadence-xspi.c
923
readl(cdns_xspi->auxbase + CDNS_XSPI_CCP_PHY_DQ_TIMING));
drivers/spi/spi-cadence-xspi.c
925
readl(cdns_xspi->auxbase + CDNS_XSPI_CCP_PHY_DQS_TIMING));
drivers/spi/spi-cadence-xspi.c
927
readl(cdns_xspi->auxbase + CDNS_XSPI_CCP_PHY_GATE_LPBCK_CTRL));
drivers/spi/spi-cadence-xspi.c
929
readl(cdns_xspi->auxbase + CDNS_XSPI_CCP_PHY_DLL_SLAVE_CTRL));
drivers/spi/spi-clps711x.c
137
readl(hw->syncio);
drivers/spi/spi-dw-pci.c
44
clk_cdiv = readl(clk_reg + dws->bus_num * sizeof(u32));
drivers/spi/spi-ep93xx.c
199
val = readl(espi->mmio + SSPDR);
drivers/spi/spi-ep93xx.c
228
while ((readl(espi->mmio + SSPSR) & SSPSR_RNE)) {
drivers/spi/spi-ep93xx.c
443
if (readl(espi->mmio + SSPIIR) & SSPIIR_RORIS) {
drivers/spi/spi-ep93xx.c
469
val = readl(espi->mmio + SSPCR1);
drivers/spi/spi-ep93xx.c
507
val = readl(espi->mmio + SSPCR1);
drivers/spi/spi-ep93xx.c
525
while (readl(espi->mmio + SSPSR) & SSPSR_RNE) {
drivers/spi/spi-ep93xx.c
531
readl(espi->mmio + SSPDR);
drivers/spi/spi-ep93xx.c
553
val = readl(espi->mmio + SSPCR1);
drivers/spi/spi-ep93xx.c
565
val = readl(espi->mmio + SSPCR1);
drivers/spi/spi-fsl-lpspi.c
164
unsigned int val = readl(fsl_lpspi->base + IMX7ULP_RDR); \
drivers/spi/spi-fsl-lpspi.c
257
txfifo_cnt = readl(fsl_lpspi->base + IMX7ULP_FSR) & 0xff;
drivers/spi/spi-fsl-lpspi.c
268
temp = readl(fsl_lpspi->base + IMX7ULP_TCR);
drivers/spi/spi-fsl-lpspi.c
280
while (!(readl(fsl_lpspi->base + IMX7ULP_RSR) & RSR_RXEMPTY))
drivers/spi/spi-fsl-lpspi.c
450
temp = readl(fsl_lpspi->base + IMX7ULP_CR);
drivers/spi/spi-fsl-lpspi.c
826
temp_IER = readl(fsl_lpspi->base + IMX7ULP_IER);
drivers/spi/spi-fsl-lpspi.c
828
temp_SR = readl(fsl_lpspi->base + IMX7ULP_SR);
drivers/spi/spi-fsl-lpspi.c
838
readl(fsl_lpspi->base + IMX7ULP_FSR) & FSR_TXCOUNT) {
drivers/spi/spi-fsl-lpspi.c
980
temp = readl(fsl_lpspi->base + IMX7ULP_PARAM);
drivers/spi/spi-geni-qcom.c
264
m_irq = readl(se->base + SE_GENI_M_IRQ_STATUS);
drivers/spi/spi-geni-qcom.c
265
m_irq_en = readl(se->base + SE_GENI_M_IRQ_EN);
drivers/spi/spi-geni-qcom.c
643
fifo_disable = readl(se->base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE;
drivers/spi/spi-geni-qcom.c
677
spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG);
drivers/spi/spi-geni-qcom.c
749
rx_fifo_status = readl(se->base + SE_GENI_RX_FIFO_STATUS);
drivers/spi/spi-geni-qcom.c
761
readl(se->base + SE_GENI_RX_FIFOn);
drivers/spi/spi-geni-qcom.c
911
m_irq = readl(se->base + SE_GENI_M_IRQ_STATUS);
drivers/spi/spi-gxp.c
112
value = readl(reg_base + OFFSET_SPIMCFG);
drivers/spi/spi-gxp.c
167
value = readl(reg_base + OFFSET_SPIMCFG);
drivers/spi/spi-gxp.c
74
value = readl(reg_base + OFFSET_SPIMCFG);
drivers/spi/spi-hisi-kunpeng.c
181
return readl(hs->regs + HISI_SPI_SR) & SR_BUSY;
drivers/spi/spi-hisi-kunpeng.c
186
return readl(hs->regs + HISI_SPI_SR) & SR_RXNE;
drivers/spi/spi-hisi-kunpeng.c
191
return readl(hs->regs + HISI_SPI_SR) & SR_TXNF;
drivers/spi/spi-hisi-kunpeng.c
200
readl(hs->regs + HISI_SPI_DOUT);
drivers/spi/spi-hisi-kunpeng.c
228
rxw = readl(hs->regs + HISI_SPI_DOUT);
drivers/spi/spi-hisi-kunpeng.c
337
u32 irq_status = readl(hs->regs + HISI_SPI_ISR) & ISR_MASK;
drivers/spi/spi-hisi-kunpeng.c
519
readl(hs->regs + HISI_SPI_VERSION),
drivers/spi/spi-hisi-sfc-v3xx.c
108
reg = readl(host->regbase + HISI_SFC_V3XX_RAW_INT_STAT);
drivers/spi/spi-hisi-sfc-v3xx.c
382
reg = readl(host->regbase + HISI_SFC_V3XX_INT_STAT);
drivers/spi/spi-hisi-sfc-v3xx.c
489
glb_config = readl(host->regbase + HISI_SFC_V3XX_GLB_CFG);
drivers/spi/spi-hisi-sfc-v3xx.c
495
version = readl(host->regbase + HISI_SFC_V3XX_VERSION);
drivers/spi/spi-img-spfi.c
106
return readl(spfi->regs + reg);
drivers/spi/spi-imx.c
1026
return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR;
drivers/spi/spi-imx.c
1061
reg = readl(spi_imx->base + MXC_CSPICTRL);
drivers/spi/spi-imx.c
1096
return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR;
drivers/spi/spi-imx.c
1240
ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
drivers/spi/spi-imx.c
1646
ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
drivers/spi/spi-imx.c
174
unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
drivers/spi/spi-imx.c
2143
readl(spi_imx->base + MXC_CSPIRXDATA);
drivers/spi/spi-imx.c
358
unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA);
drivers/spi/spi-imx.c
394
val = readl(spi_imx->base + MXC_CSPIRXDATA);
drivers/spi/spi-imx.c
459
u32 val = readl(spi_imx->base + MXC_CSPIRXDATA);
drivers/spi/spi-imx.c
572
reg = readl(spi_imx->base + MX51_ECSPI_DMA);
drivers/spi/spi-imx.c
576
reg = readl(spi_imx->base + MX51_ECSPI_CTRL);
drivers/spi/spi-imx.c
586
ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
drivers/spi/spi-imx.c
606
u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG);
drivers/spi/spi-imx.c
631
testreg = readl(spi_imx->base + MX51_ECSPI_TESTREG);
drivers/spi/spi-imx.c
708
u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG);
drivers/spi/spi-imx.c
725
u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
drivers/spi/spi-imx.c
825
return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR;
drivers/spi/spi-imx.c
832
readl(spi_imx->base + MXC_CSPIRXDATA);
drivers/spi/spi-imx.c
882
reg = readl(spi_imx->base + MXC_CSPICTRL);
drivers/spi/spi-imx.c
926
reg = readl(spi_imx->base + MX31_CSPI_TESTREG);
drivers/spi/spi-imx.c
947
return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR;
drivers/spi/spi-imx.c
953
while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR)
drivers/spi/spi-imx.c
954
readl(spi_imx->base + MXC_CSPIRXDATA);
drivers/spi/spi-imx.c
986
reg = readl(spi_imx->base + MXC_CSPICTRL);
drivers/spi/spi-intel.c
1132
val = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
1144
lvscc = readl(ispi->base + LVSCC);
drivers/spi/spi-intel.c
1145
uvscc = readl(ispi->base + UVSCC);
drivers/spi/spi-intel.c
1166
val = readl(ispi->sregs + SSFSTS_CTL);
drivers/spi/spi-intel.c
1172
val = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
1181
opmenu0 = readl(ispi->sregs + OPMENU0);
drivers/spi/spi-intel.c
1182
opmenu1 = readl(ispi->sregs + OPMENU1);
drivers/spi/spi-intel.c
1212
pr_value = readl(ispi->pregs + PR(i));
drivers/spi/spi-intel.c
1249
region = readl(ispi->base + FREG(i));
drivers/spi/spi-intel.c
204
dev_dbg(ispi->dev, "BFPREG=0x%08x\n", readl(ispi->base + BFPREG));
drivers/spi/spi-intel.c
206
value = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
211
dev_dbg(ispi->dev, "FADDR=0x%08x\n", readl(ispi->base + FADDR));
drivers/spi/spi-intel.c
212
dev_dbg(ispi->dev, "DLOCK=0x%08x\n", readl(ispi->base + DLOCK));
drivers/spi/spi-intel.c
216
i, readl(ispi->base + FDATA(i)));
drivers/spi/spi-intel.c
218
dev_dbg(ispi->dev, "FRACC=0x%08x\n", readl(ispi->base + FRACC));
drivers/spi/spi-intel.c
222
readl(ispi->base + FREG(i)));
drivers/spi/spi-intel.c
225
readl(ispi->pregs + PR(i)));
drivers/spi/spi-intel.c
228
value = readl(ispi->sregs + SSFSTS_CTL);
drivers/spi/spi-intel.c
231
readl(ispi->sregs + PREOP_OPTYPE));
drivers/spi/spi-intel.c
233
readl(ispi->sregs + OPMENU0));
drivers/spi/spi-intel.c
235
readl(ispi->sregs + OPMENU1));
drivers/spi/spi-intel.c
238
dev_dbg(ispi->dev, "LVSCC=0x%08x\n", readl(ispi->base + LVSCC));
drivers/spi/spi-intel.c
239
dev_dbg(ispi->dev, "UVSCC=0x%08x\n", readl(ispi->base + UVSCC));
drivers/spi/spi-intel.c
245
value = readl(ispi->pregs + PR(i));
drivers/spi/spi-intel.c
261
region = readl(ispi->base + FREG(i));
drivers/spi/spi-intel.c
375
val = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
387
status = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
449
status = readl(ispi->sregs + SSFSTS_CTL);
drivers/spi/spi-intel.c
577
val = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
589
status = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
634
val = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
656
status = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
693
val = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-intel.c
704
status = readl(ispi->base + HSFSTS_CTL);
drivers/spi/spi-jcore.c
130
*rx++ = readl(data_reg);
drivers/spi/spi-jcore.c
49
if (!(readl(ctrl_reg) & JCORE_SPI_STAT_BUSY))
drivers/spi/spi-mpfs.c
118
return readl(spi->regs + reg);
drivers/spi/spi-mt65xx.c
1012
reg_val = readl(mdata->base + SPI_CFG3_IPM_REG);
drivers/spi/spi-mt65xx.c
1122
reg_val = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
1138
reg_val = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
289
reg_val = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
293
reg_val = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
324
reg_val = readl(mdata->base + SPI_CFG0_REG);
drivers/spi/spi-mt65xx.c
356
reg_val = readl(mdata->base + SPI_CFG1_REG);
drivers/spi/spi-mt65xx.c
377
reg_val = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
446
reg_val = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
452
reg_val = readl(mdata->base + SPI_CFG1_REG);
drivers/spi/spi-mt65xx.c
459
reg_val = readl(mdata->base + SPI_CFG1_REG);
drivers/spi/spi-mt65xx.c
494
reg_val = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
520
reg_val = readl(mdata->base + SPI_CFG2_REG);
drivers/spi/spi-mt65xx.c
529
reg_val = readl(mdata->base + SPI_CFG0_REG);
drivers/spi/spi-mt65xx.c
555
reg_val = readl(mdata->base + SPI_CFG1_REG);
drivers/spi/spi-mt65xx.c
587
cmd = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
710
cmd = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
806
reg_val = readl(mdata->base + SPI_RX_DATA_REG);
drivers/spi/spi-mt65xx.c
865
cmd = readl(mdata->base + SPI_CMD_REG);
drivers/spi/spi-mt65xx.c
888
reg_val = readl(mdata->base + SPI_STATUS0_REG);
drivers/spi/spi-mtk-nor.c
133
u32 val = readl(sp->base + reg);
drivers/spi/spi-mtk-nor.c
468
val = readl(sp->base + MTK_NOR_REG_CFG2);
drivers/spi/spi-mtk-nor.c
760
irq_status = readl(sp->base + MTK_NOR_REG_IRQ_STAT);
drivers/spi/spi-mtk-nor.c
761
irq_enabled = readl(sp->base + MTK_NOR_REG_IRQ_EN);
drivers/spi/spi-mtk-snfi.c
343
return readl(snf->nfi_base + reg);
drivers/spi/spi-mtk-snfi.c
360
val = readl(snf->nfi_base + reg);
drivers/spi/spi-mxic.c
383
data = readl(mxic->regs + RXD);
drivers/spi/spi-mxic.c
388
WARN_ON(readl(mxic->regs + INT_STS) & INT_RX_NOT_EMPTY);
drivers/spi/spi-mxic.c
537
writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
drivers/spi/spi-mxic.c
566
writel(readl(mxic->regs + HC_CFG) & ~HC_CFG_MAN_CS_ASSERT,
drivers/spi/spi-mxic.c
593
writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_EN,
drivers/spi/spi-mxic.c
596
writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
drivers/spi/spi-mxic.c
599
writel(readl(mxic->regs + HC_CFG) & ~HC_CFG_MAN_CS_ASSERT,
drivers/spi/spi-mxs.c
159
readl(ssp->base + HW_SSP_CTRL1(ssp)),
drivers/spi/spi-mxs.c
160
readl(ssp->base + HW_SSP_STATUS(ssp)));
drivers/spi/spi-mxs.c
192
ctrl0 = readl(ssp->base + HW_SSP_CTRL0);
drivers/spi/spi-mxs.c
346
*buf = (readl(ssp->base + HW_SSP_DATA(ssp)) & 0xff);
drivers/spi/spi-nxp-xspi.c
1093
reg = readl(base + XSPI_TG0MDAD);
drivers/spi/spi-nxp-xspi.c
1098
reg = readl(base + XSPI_FRAD0_WORD2);
drivers/spi/spi-nxp-xspi.c
1104
reg = readl(base + XSPI_FRAD0_WORD3);
drivers/spi/spi-nxp-xspi.c
1115
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
1121
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
1129
reg = readl(base + XSPI_SFACR);
drivers/spi/spi-nxp-xspi.c
1143
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
1202
reg = readl(xspi->iobase + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
1302
reg = readl(xspi->iobase + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
1321
reg = readl(xspi->iobase + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
357
reg = readl(xspi->iobase + XSPI_FR);
drivers/spi/spi-nxp-xspi.c
491
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
502
reg = readl(base + XSPI_FLSHCR);
drivers/spi/spi-nxp-xspi.c
511
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
522
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
533
reg = readl(base + XSPI_FLSHCR);
drivers/spi/spi-nxp-xspi.c
542
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
554
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
591
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
640
readl(base + XSPI_DLLSR));
drivers/spi/spi-nxp-xspi.c
676
readl(base + XSPI_DLLSR));
drivers/spi/spi-nxp-xspi.c
683
readl(base + XSPI_DLLSR));
drivers/spi/spi-nxp-xspi.c
758
reg = readl(xspi->iobase + XSPI_SFACR);
drivers/spi/spi-nxp-xspi.c
811
reg = readl(base + XSPI_FR);
drivers/spi/spi-nxp-xspi.c
815
reg = readl(base + XSPI_FR);
drivers/spi/spi-nxp-xspi.c
862
*(u32 *)(buf + i * 4) = readl(base + XSPI_RBDR0 + i * 4);
drivers/spi/spi-nxp-xspi.c
867
reg = readl(base + XSPI_FR);
drivers/spi/spi-nxp-xspi.c
881
*(u32 *)(buf) = readl(base + XSPI_RBDR0 + i);
drivers/spi/spi-nxp-xspi.c
888
reg = readl(base + XSPI_RBDR0 + i);
drivers/spi/spi-nxp-xspi.c
893
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
913
reg = readl(base + XSPI_MCR);
drivers/spi/spi-nxp-xspi.c
946
reg = readl(base + XSPI_MCR);
drivers/spi/spi-orion.c
119
val = readl(reg_addr);
drivers/spi/spi-orion.c
130
val = readl(reg_addr);
drivers/spi/spi-orion.c
225
reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
drivers/spi/spi-orion.c
240
reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
drivers/spi/spi-orion.c
276
reg = readl(spi_reg(orion_spi, ORION_SPI_TIMING_PARAMS_REG));
drivers/spi/spi-orion.c
336
val = readl(ctrl_reg);
drivers/spi/spi-orion.c
372
if (readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)))
drivers/spi/spi-orion.c
419
*(*rx_buf)++ = readl(rx_reg);
drivers/spi/spi-orion.c
461
put_unaligned(__le16_to_cpu(readl(rx_reg)), (*rx_buf)++);
drivers/spi/spi-pci1xxxx.c
207
return readl(par->reg_base + SPI_SYSLOCK_REG);
drivers/spi/spi-pci1xxxx.c
244
regval = readl(spi_bus->reg_base + DEV_REV_REG);
drivers/spi/spi-pci1xxxx.c
247
regval = readl(spi_bus->reg_base +
drivers/spi/spi-pci1xxxx.c
309
regval = readl(spi_bus->dma_offset_bar + SPI_DMA_INTR_WR_IMWR_DATA);
drivers/spi/spi-pci1xxxx.c
313
regval = readl(spi_bus->dma_offset_bar + SPI_DMA_INTR_WR_IMWR_DATA);
drivers/spi/spi-pci1xxxx.c
317
regval = readl(spi_bus->dma_offset_bar + SPI_DMA_INTR_RD_IMWR_DATA);
drivers/spi/spi-pci1xxxx.c
320
regval = readl(spi_bus->dma_offset_bar + SPI_DMA_INTR_RD_IMWR_DATA);
drivers/spi/spi-pci1xxxx.c
374
regval = readl(par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst));
drivers/spi/spi-pci1xxxx.c
455
regval = readl(par->reg_base + SPI_MST_CTL_REG_OFFSET(hw_inst));
drivers/spi/spi-pci1xxxx.c
472
regval = readl(p->parent->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst));
drivers/spi/spi-pci1xxxx.c
497
regval = readl(par->reg_base + SPI_MST_EVENT_REG_OFFSET(p->hw_inst));
drivers/spi/spi-pci1xxxx.c
553
regval = readl(par->reg_base + SPI_MST_EVENT_REG_OFFSET(p->hw_inst));
drivers/spi/spi-pci1xxxx.c
565
regval = readl(par->reg_base + SPI_MST_EVENT_REG_OFFSET(p->hw_inst));
drivers/spi/spi-pci1xxxx.c
647
regval = readl(p->parent->reg_base + SPI_MST_EVENT_REG_OFFSET(p->hw_inst));
drivers/spi/spi-pci1xxxx.c
699
regval = readl(p->parent->dma_offset_bar + SPI_DMA_INTR_RD_STS);
drivers/spi/spi-pci1xxxx.c
727
regval = readl(p->parent->dma_offset_bar + SPI_DMA_INTR_WR_STS);
drivers/spi/spi-pci1xxxx.c
759
regval = readl(p->parent->reg_base + SPI_MST_EVENT_REG_OFFSET(p->hw_inst));
drivers/spi/spi-pci1xxxx.c
864
regval = readl(spi_bus->reg_base +
drivers/spi/spi-pci1xxxx.c
887
regval = readl(spi_bus->reg_base + SPI_PCI_CTRL_REG_OFFSET(0));
drivers/spi/spi-pci1xxxx.c
901
regval = readl(spi_bus->reg_base +
drivers/spi/spi-pci1xxxx.c
952
regval = readl(spi_ptr->reg_base +
drivers/spi/spi-pci1xxxx.c
956
regval = readl(spi_ptr->reg_base +
drivers/spi/spi-pci1xxxx.c
961
regval = readl(spi_ptr->reg_base + SPI_MST_CTL_REG_OFFSET(inst));
drivers/spi/spi-pic32-sqi.c
157
writel(readl(reg) | set, reg);
drivers/spi/spi-pic32-sqi.c
162
writel(readl(reg) & ~clr, reg);
drivers/spi/spi-pic32-sqi.c
173
val = readl(sqi->regs + PESQI_CLK_CTRL_REG);
drivers/spi/spi-pic32-sqi.c
204
enable = readl(sqi->regs + PESQI_INT_ENABLE_REG);
drivers/spi/spi-pic32-sqi.c
205
status = readl(sqi->regs + PESQI_INT_STAT_REG);
drivers/spi/spi-pic32-sqi.c
371
val = readl(sqi->regs + PESQI_CONF_REG);
drivers/spi/spi-pic32-sqi.c
532
val = readl(sqi->regs + PESQI_CMD_THRES_REG);
drivers/spi/spi-pic32-sqi.c
538
val = readl(sqi->regs + PESQI_INT_THRES_REG);
drivers/spi/spi-pic32-sqi.c
545
val = readl(sqi->regs + PESQI_CONF_REG);
drivers/spi/spi-pic32.c
148
u32 sr = readl(&pic32s->regs->status);
drivers/spi/spi-pic32.c
155
u32 sr = readl(&pic32s->regs->status);
drivers/spi/spi-pic32.c
238
status = readl(&pic32s->regs->status);
drivers/spi/spi-pic32.c
421
v = readl(&pic32s->regs->ctrl);
drivers/spi/spi-pic32.c
463
val = readl(&pic32s->regs->ctrl);
drivers/spi/spi-pic32.c
675
ctrl = readl(&pic32s->regs->ctrl);
drivers/spi/spi-pl022.c
1276
read_cr0 = readl(SSP_CR0(pl022->virtbase));
drivers/spi/spi-pl022.c
617
readl(SSP_DR(pl022->virtbase));
drivers/spi/spi-pl022.c
666
readl(SSP_DR(pl022->virtbase));
drivers/spi/spi-pxa2xx.c
315
return readl(drv_data->lpss_base + offset);
drivers/spi/spi-qcom-qspi.c
206
pio_xfer_cfg = readl(ctrl->base + PIO_XFER_CFG);
drivers/spi/spi-qcom-qspi.c
224
pio_xfer_ctrl = readl(ctrl->base + PIO_XFER_CTRL);
drivers/spi/spi-qcom-qspi.c
260
int_status = readl(ctrl->base + MSTR_INT_STATUS);
drivers/spi/spi-qcom-qspi.c
433
mstr_cfg = readl(ctrl->base + MSTR_CONFIG);
drivers/spi/spi-qcom-qspi.c
496
mstr_cfg = readl(ctrl->base + MSTR_CONFIG);
drivers/spi/spi-qcom-qspi.c
535
rd_fifo_status = readl(ctrl->base + RD_FIFO_STATUS);
drivers/spi/spi-qcom-qspi.c
557
rd_fifo = readl(ctrl->base + RD_FIFO);
drivers/spi/spi-qcom-qspi.c
577
wr_fifo_bytes = readl(ctrl->base + PIO_XFER_STATUS);
drivers/spi/spi-qcom-qspi.c
619
int_status = readl(ctrl->base + MSTR_INT_STATUS);
drivers/spi/spi-qcom-qspi.c
623
int_status &= readl(ctrl->base + MSTR_INT_EN);
drivers/spi/spi-qup.c
1222
config = readl(controller->base + QUP_CONFIG);
drivers/spi/spi-realtek-rtl.c
138
value = readl(REG(RTL_SPI_SFCR));
drivers/spi/spi-realtek-rtl.c
142
value = readl(REG(RTL_SPI_SFCSR));
drivers/spi/spi-realtek-rtl.c
39
value = readl(REG(RTL_SPI_SFCSR));
drivers/spi/spi-realtek-rtl.c
51
value = readl(REG(RTL_SPI_SFCSR));
drivers/spi/spi-realtek-rtl.c
62
while (!(readl(REG(RTL_SPI_SFCSR)) & RTL_SPI_SFCSR_RDY))
drivers/spi/spi-realtek-rtl.c
83
*buf = readl(REG(RTL_SPI_SFDR));
drivers/spi/spi-realtek-rtl.c
90
*buf = readl(REG(RTL_SPI_SFDR)) >> 24;
drivers/spi/spi-rockchip-sfc.c
213
return (u16)(readl(sfc->regbase + SFC_VER) & 0xffff);
drivers/spi/spi-rockchip-sfc.c
242
reg = readl(sfc->regbase + SFC_IMR);
drivers/spi/spi-rockchip-sfc.c
252
reg = readl(sfc->regbase + SFC_IMR);
drivers/spi/spi-rockchip-sfc.c
442
tmp = readl(sfc->regbase + SFC_DATA);
drivers/spi/spi-rockchip-sfc.c
596
reg = readl(sfc->regbase + SFC_RISR);
drivers/spi/spi-rzv2h-rspi.c
137
RZV2H_RSPI_RX(readl, u32)
drivers/spi/spi-rzv2h-rspi.c
139
RZV2H_RSPI_RX(readl, u8)
drivers/spi/spi-rzv2h-rspi.c
147
tmp = (readl(rspi->base + reg_offs) & ~bit_mask) | value;
drivers/spi/spi-rzv2m-csi.c
123
tmp = (readl(csi->base + reg_offs) & ~bit_mask) | value;
drivers/spi/spi-rzv2m-csi.c
160
if (readl(csi->base + CSI_OFIFOL))
drivers/spi/spi-rzv2m-csi.c
185
if (readl(csi->base + CSI_IFIFOL) != csi->bytes_to_transfer)
drivers/spi/spi-rzv2m-csi.c
192
buf[i] = (u16)readl(csi->base + CSI_IFIFO);
drivers/spi/spi-rzv2m-csi.c
197
buf[i] = (u8)readl(csi->base + CSI_IFIFO);
drivers/spi/spi-rzv2m-csi.c
211
readl(csi->base + CSI_IFIFO);
drivers/spi/spi-rzv2m-csi.c
262
u32 cnt = readl(csi->base + CSI_CNT);
drivers/spi/spi-rzv2m-csi.c
288
u32 cnt = readl(csi->base + CSI_CNT);
drivers/spi/spi-rzv2m-csi.c
324
if (readl(csi->base + CSI_IFIFOL) >= csi->bytes_to_transfer)
drivers/spi/spi-rzv2m-csi.c
339
csi->status = readl(csi->base + CSI_INT);
drivers/spi/spi-rzv2m-csi.c
478
writel(readl(csi->base + CSI_INT), csi->base + CSI_INT);
drivers/spi/spi-s3c64xx.c
1084
val = readl(sdd->regs + S3C64XX_SPI_STATUS);
drivers/spi/spi-s3c64xx.c
1106
val = readl(sdd->regs + S3C64XX_SPI_INT_EN);
drivers/spi/spi-s3c64xx.c
1150
val = readl(regs + S3C64XX_SPI_MODE_CFG);
drivers/spi/spi-s3c64xx.c
237
val = readl(regs + S3C64XX_SPI_CH_CFG);
drivers/spi/spi-s3c64xx.c
241
val = readl(regs + S3C64XX_SPI_CH_CFG);
drivers/spi/spi-s3c64xx.c
249
val = readl(regs + S3C64XX_SPI_STATUS);
drivers/spi/spi-s3c64xx.c
258
val = readl(regs + S3C64XX_SPI_STATUS);
drivers/spi/spi-s3c64xx.c
260
readl(regs + S3C64XX_SPI_RX_DATA);
drivers/spi/spi-s3c64xx.c
268
val = readl(regs + S3C64XX_SPI_CH_CFG);
drivers/spi/spi-s3c64xx.c
272
val = readl(regs + S3C64XX_SPI_MODE_CFG);
drivers/spi/spi-s3c64xx.c
367
u32 ssel = readl(sdd->regs + S3C64XX_SPI_CS_REG);
drivers/spi/spi-s3c64xx.c
497
modecfg = readl(regs + S3C64XX_SPI_MODE_CFG);
drivers/spi/spi-s3c64xx.c
500
chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
drivers/spi/spi-s3c64xx.c
565
status = readl(regs + S3C64XX_SPI_STATUS);
drivers/spi/spi-s3c64xx.c
599
status = readl(regs + S3C64XX_SPI_STATUS);
drivers/spi/spi-s3c64xx.c
604
status = readl(regs + S3C64XX_SPI_STATUS);
drivers/spi/spi-s3c64xx.c
634
status = readl(regs + S3C64XX_SPI_STATUS);
drivers/spi/spi-s3c64xx.c
646
status = readl(regs + S3C64XX_SPI_STATUS);
drivers/spi/spi-s3c64xx.c
704
val = readl(regs + S3C64XX_SPI_CLK_CFG);
drivers/spi/spi-s3c64xx.c
710
val = readl(regs + S3C64XX_SPI_CH_CFG);
drivers/spi/spi-s3c64xx.c
724
val = readl(regs + S3C64XX_SPI_MODE_CFG);
drivers/spi/spi-s3c64xx.c
757
val = readl(regs + S3C64XX_SPI_CLK_CFG);
drivers/spi/spi-s3c64xx.c
764
val = readl(regs + S3C64XX_SPI_CLK_CFG);
drivers/spi/spi-s3c64xx.c
862
val = readl(sdd->regs + S3C64XX_SPI_MODE_CFG);
drivers/spi/spi-s3c64xx.c
868
val = readl(sdd->regs + S3C64XX_SPI_INT_EN);
drivers/spi/spi-sg2044-nor.c
123
reg = readl(spifmc->io_base + SPIFMC_TRAN_CSR);
drivers/spi/spi-sg2044-nor.c
418
reg = readl(spifmc->io_base + SPIFMC_CTRL);
drivers/spi/spi-sg2044-nor.c
426
tran_csr = readl(spifmc->io_base + SPIFMC_TRAN_CSR);
drivers/spi/spi-slave-mt27xx.c
102
reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
drivers/spi/spi-slave-mt27xx.c
112
reg_val = readl(mdata->base + SPIS_CFG_REG);
drivers/spi/spi-slave-mt27xx.c
140
reg_val = readl(mdata->base + SPIS_CFG_REG);
drivers/spi/spi-slave-mt27xx.c
171
reg_val = readl(mdata->base + SPIS_CFG_REG);
drivers/spi/spi-slave-mt27xx.c
238
reg_val = readl(mdata->base + SPIS_CFG_REG);
drivers/spi/spi-slave-mt27xx.c
250
reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);
drivers/spi/spi-slave-mt27xx.c
334
int_status = readl(mdata->base + SPIS_IRQ_ST_REG);
drivers/spi/spi-slave-mt27xx.c
365
reg_val = readl(mdata->base + SPIS_RX_DATA_REG);
drivers/spi/spi-sn-f-ospi.c
135
val = readl(ospi->base + OSPI_IRQ_STAT_EN);
drivers/spi/spi-sn-f-ospi.c
144
val = readl(ospi->base + OSPI_IRQ_STAT_EN);
drivers/spi/spi-sn-f-ospi.c
153
val = readl(ospi->base + OSPI_IRQ_SIG_EN);
drivers/spi/spi-sn-f-ospi.c
163
val = readl(ospi->base + OSPI_CLK_CTL);
drivers/spi/spi-sn-f-ospi.c
181
val = readl(ospi->base + OSPI_CLK_CTL);
drivers/spi/spi-sn-f-ospi.c
223
val = readl(ospi->base + OSPI_CLK_CTL);
drivers/spi/spi-sn-f-ospi.c
427
buf[i] = readl(ospi->base + OSPI_DAT) & 0xFF;
drivers/spi/spi-sn-f-ospi.c
431
if (!(readl(ospi->base + OSPI_DAT_SIZE_INDIR) & OSPI_DAT_SIZE_EN))
drivers/spi/spi-sn-f-ospi.c
442
if (readl(ospi->base + OSPI_DAT_SIZE_INDIR) & OSPI_DAT_SIZE_EN)
drivers/spi/spi-sn-f-ospi.c
473
if (!(readl(ospi->base + OSPI_PROT_CTL_INDIR) & OSPI_PROT_DATA_EN))
drivers/spi/spi-sn-f-ospi.c
488
if (!(readl(ospi->base + OSPI_DAT_SIZE_INDIR) & OSPI_DAT_SIZE_EN))
drivers/spi/spi-st-ssc4.c
267
readl(spi_st->base + SSC_IEN);
drivers/spi/spi-sun4i.c
92
return readl(sspi->base_addr + reg);
drivers/spi/spi-sun6i.c
119
return readl(sspi->base_addr + reg);
drivers/spi/spi-sunplus-sp7021.c
104
data_status = readl(pspim->s_base + SP7021_DATA_RDY_REG);
drivers/spi/spi-sunplus-sp7021.c
130
value = readl(pspim->s_base + SP7021_DATA_RDY_REG);
drivers/spi/spi-sunplus-sp7021.c
164
readl(pspim->m_base + SP7021_FIFO_REG);
drivers/spi/spi-sunplus-sp7021.c
189
fd_status = readl(pspim->m_base + SP7021_SPI_STATUS_REG);
drivers/spi/spi-sunplus-sp7021.c
213
fd_status = readl(pspim->m_base + SP7021_SPI_STATUS_REG);
drivers/spi/spi-sunplus-sp7021.c
219
fd_status = readl(pspim->m_base + SP7021_SPI_STATUS_REG);
drivers/spi/spi-sunplus-sp7021.c
229
value = readl(pspim->m_base + SP7021_INT_BUSY_REG);
drivers/spi/spi-sunplus-sp7021.c
258
valus = readl(pspim->m_base + SP7021_SPI_STATUS_REG);
drivers/spi/spi-sunplus-sp7021.c
328
reg_temp = readl(pspim->m_base + SP7021_SPI_CONFIG_REG);
drivers/spi/spi-sunplus-sp7021.c
347
reg_temp = readl(pspim->m_base + SP7021_SPI_STATUS_REG);
drivers/spi/spi-sunplus-sp7021.c
350
writel(readl(pspim->m_base + SP7021_SPI_CONFIG_REG) &
drivers/spi/spi-synquacer.c
143
u32 len = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTATUS);
drivers/spi/spi-synquacer.c
186
u32 len = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTATUS);
drivers/spi/spi-synquacer.c
275
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_PCC(cs));
drivers/spi/spi-synquacer.c
323
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG);
drivers/spi/spi-synquacer.c
329
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
drivers/spi/spi-synquacer.c
364
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
drivers/spi/spi-synquacer.c
368
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG);
drivers/spi/spi-synquacer.c
431
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_FIFOCFG);
drivers/spi/spi-synquacer.c
444
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
drivers/spi/spi-synquacer.c
467
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
drivers/spi/spi-synquacer.c
488
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
drivers/spi/spi-synquacer.c
508
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_MCTRL) &
drivers/spi/spi-synquacer.c
538
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_DMCFG);
drivers/spi/spi-synquacer.c
543
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_MCTRL);
drivers/spi/spi-synquacer.c
567
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_RXF);
drivers/spi/spi-synquacer.c
587
val = readl(sspi->regs + SYNQUACER_HSSPI_REG_TXF);
drivers/spi/spi-tegra114.c
229
return readl(tspi->base + reg);
drivers/spi/spi-tegra114.c
239
readl(tspi->base + SPI_COMMAND1);
drivers/spi/spi-tegra20-sflash.c
142
return readl(tsd->base + reg);
drivers/spi/spi-tegra20-slink.c
212
return readl(tspi->base + reg);
drivers/spi/spi-tegra20-slink.c
222
readl(tspi->base + SLINK_MAS_DATA);
drivers/spi/spi-tegra210-quad.c
243
return readl(tqspi->base + offset);
drivers/spi/spi-tegra210-quad.c
252
readl(tqspi->base + QSPI_COMMAND1);
drivers/spi/spi-ti-qspi.c
129
return readl(qspi->base + reg);
drivers/spi/spi-ti-qspi.c
373
rx = readl(qspi->base + QSPI_SPI_DATA_REG_3);
drivers/spi/spi-ti-qspi.c
375
rx = readl(qspi->base + QSPI_SPI_DATA_REG_2);
drivers/spi/spi-ti-qspi.c
377
rx = readl(qspi->base + QSPI_SPI_DATA_REG_1);
drivers/spi/spi-ti-qspi.c
379
rx = readl(qspi->base + QSPI_SPI_DATA_REG);
drivers/spi/spi-ti-qspi.c
383
rx = readl(qspi->base + QSPI_SPI_DATA_REG);
drivers/spi/spi-ti-qspi.c
398
*((u32 *)rxbuf) = readl(qspi->base + QSPI_SPI_DATA_REG);
drivers/spi/spi-uniphier.c
113
val = readl(priv->base + SSI_IE);
drivers/spi/spi-uniphier.c
123
val = readl(priv->base + SSI_IE);
drivers/spi/spi-uniphier.c
186
val = readl(priv->base + SSI_TXWDS);
drivers/spi/spi-uniphier.c
192
val = readl(priv->base + SSI_RXWDS);
drivers/spi/spi-uniphier.c
211
val = readl(priv->base + SSI_CKS);
drivers/spi/spi-uniphier.c
286
val = readl(priv->base + SSI_RXDR);
drivers/spi/spi-uniphier.c
310
val = readl(priv->base + SSI_FC);
drivers/spi/spi-uniphier.c
339
val = readl(priv->base + SSI_FPS);
drivers/spi/spi-uniphier.c
509
while (!(readl(priv->base + SSI_SR) & SSI_SR_RNE)
drivers/spi/spi-uniphier.c
605
stat = readl(priv->base + SSI_IS);
drivers/spi/spi-uniphier.c
617
while ((readl(priv->base + SSI_SR) & SSI_SR_RNE) &&
drivers/spi/spi-uniphier.c
621
if ((readl(priv->base + SSI_SR) & SSI_SR_RNE) ||
drivers/spi/spi-xlp.c
107
return readl(priv->base + regoff + cs * SPI_CS_OFFSET);
drivers/spmi/hisi-spmi-controller.c
160
data = readl(spmi_controller->base + chnl_ofst +
drivers/spmi/hisi-spmi-controller.c
93
status = readl(base + offset);
drivers/spmi/spmi-apple-controller.c
117
readl(spmi->regs + SPMI_RSP_REG);
drivers/spmi/spmi-apple-controller.c
78
readl(spmi->regs + SPMI_RSP_REG);
drivers/spmi/spmi-apple-controller.c
82
rsp = readl(spmi->regs + SPMI_RSP_REG);
drivers/spmi/spmi-mtk-pmif.c
293
return readl(pbus->base + arb->data->regs[reg]);
drivers/spmi/spmi-mtk-pmif.c
304
return readl(pbus->spmimst_base + arb->data->spmimst_regs[reg]);
drivers/ssb/driver_pcicore.c
135
val = readl(mmio);
drivers/ssb/driver_pcicore.c
183
val = readl(mmio);
drivers/ssb/driver_pcicore.c
188
val = readl(mmio);
drivers/ssb/host_soc.c
37
return readl(bus->mmio + offset);
drivers/ssb/scan.c
184
return readl(bus->mmio + offset);
drivers/staging/media/atomisp/pci/atomisp_cmd.c
555
data = readl(isp->base + addr);
drivers/staging/media/atomisp/pci/atomisp_compat_css20.c
117
ret = readl(isp->base + (addr & 0x003FFFFF));
drivers/staging/media/imx/imx6-mipi-csi2.c
576
readl(csi2->base + CSI2_VERSION));
drivers/staging/media/imx/imx6-mipi-csi2.c
578
readl(csi2->base + CSI2_N_LANES));
drivers/staging/media/imx/imx6-mipi-csi2.c
580
readl(csi2->base + CSI2_PHY_SHUTDOWNZ));
drivers/staging/media/imx/imx6-mipi-csi2.c
582
readl(csi2->base + CSI2_DPHY_RSTZ));
drivers/staging/media/imx/imx6-mipi-csi2.c
584
readl(csi2->base + CSI2_RESETN));
drivers/staging/media/imx/imx6-mipi-csi2.c
586
readl(csi2->base + CSI2_PHY_STATE));
drivers/staging/media/imx/imx6-mipi-csi2.c
588
readl(csi2->base + CSI2_DATA_IDS_1));
drivers/staging/media/imx/imx6-mipi-csi2.c
590
readl(csi2->base + CSI2_DATA_IDS_2));
drivers/staging/media/imx/imx6-mipi-csi2.c
592
readl(csi2->base + CSI2_ERR1));
drivers/staging/media/imx/imx6-mipi-csi2.c
594
readl(csi2->base + CSI2_ERR2));
drivers/staging/media/imx/imx6-mipi-csi2.c
596
readl(csi2->base + CSI2_MSK1));
drivers/staging/media/imx/imx6-mipi-csi2.c
598
readl(csi2->base + CSI2_MSK2));
drivers/staging/media/imx/imx6-mipi-csi2.c
600
readl(csi2->base + CSI2_PHY_TST_CTRL0));
drivers/staging/media/imx/imx6-mipi-csi2.c
602
readl(csi2->base + CSI2_PHY_TST_CTRL1));
drivers/staging/media/ipu3/ipu3-css.c
1138
*data = readl(&q->sp2host_bufq[queue][start]);
drivers/staging/media/ipu3/ipu3-css.c
1143
*data = readl(&q->sp2host_evtq[start]);
drivers/staging/media/ipu3/ipu3-css.c
208
readl(base + IMGU_REG_GP_BUSY);
drivers/staging/media/ipu3/ipu3-css.c
219
writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_RESET,
drivers/staging/media/ipu3/ipu3-css.c
226
pm_ctrl = readl(base + IMGU_REG_PM_CTRL);
drivers/staging/media/ipu3/ipu3-css.c
227
state = readl(base + IMGU_REG_STATE);
drivers/staging/media/ipu3/ipu3-css.c
2321
u32 imgu_status = readl(base + IMGU_REG_INT_STATUS);
drivers/staging/media/ipu3/ipu3-css.c
2325
irq_status[i] = readl(base + IMGU_REG_IRQCTRL_STATUS(i));
drivers/staging/media/ipu3/ipu3-css.c
2330
u32 cnt = readl(base + IMGU_REG_SP_DMEM_BASE(0) +
drivers/staging/media/ipu3/ipu3-css.c
2332
u32 val = readl(base + IMGU_REG_SP_DMEM_BASE(0) +
drivers/staging/media/ipu3/ipu3-css.c
2344
readl(base + IMGU_REG_IRQCTRL_ENABLE(i));
drivers/staging/media/ipu3/ipu3-css.c
247
writel(readl(base + IMGU_REG_GP_BUSY) | 1, base + IMGU_REG_GP_BUSY);
drivers/staging/media/ipu3/ipu3-css.c
250
pm_ctrl = readl(base + IMGU_REG_PM_CTRL);
drivers/staging/media/ipu3/ipu3-css.c
262
writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_HALT,
drivers/staging/media/ipu3/ipu3-css.c
270
writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_START,
drivers/staging/media/ipu3/ipu3-css.c
276
writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_UNHALT,
drivers/staging/media/ipu3/ipu3-css.c
279
val = readl(base + IMGU_REG_PM_CTRL); /* get pm_ctrl */
drivers/staging/media/ipu3/ipu3-css.c
325
val = readl(base + IMGU_REG_SP_CTRL(0)) | IMGU_CTRL_IRQ_READY;
drivers/staging/media/ipu3/ipu3-css.c
346
readl(base + IMGU_REG_IRQCTRL_ENABLE(IMGU_IRQCTRL_MAIN));
drivers/staging/media/ipu3/ipu3-css.c
358
readl(base + IMGU_REG_IRQCTRL_ENABLE(i));
drivers/staging/media/ipu3/ipu3-css.c
424
writel(readl(base + IMGU_REG_SP_CTRL(bi->type)) |
drivers/staging/media/ipu3/ipu3-css.c
429
writel(readl(base + IMGU_REG_ISP_CTRL) | IMGU_CTRL_ICACHE_INV,
drivers/staging/media/ipu3/ipu3-css.c
434
if (!(readl(base + IMGU_REG_SP_CTRL(0)) & IMGU_CTRL_IDLE)) {
drivers/staging/media/ipu3/ipu3-css.c
438
if (!(readl(base + IMGU_REG_ISP_CTRL) & IMGU_CTRL_IDLE)) {
drivers/staging/media/ipu3/ipu3-css.c
444
val = readl(base + stream_monitors[i].reg);
drivers/staging/media/ipu3/ipu3-css.c
489
writel(readl(base + IMGU_REG_SP_CTRL(sp))
drivers/staging/media/ipu3/ipu3-css.c
549
writel(readl(base + IMGU_REG_ISP_CTRL)
drivers/staging/media/ipu3/ipu3-css.c
620
if (readl(base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state) !=
drivers/staging/media/ipu3/ipu3-css.c
635
readl(base + IMGU_REG_GP_BUSY);
drivers/staging/media/ipu3/ipu3-css.c
644
writel(readl(base + IMGU_REG_PM_CTRL) | IMGU_PM_CTRL_FORCE_RESET,
drivers/staging/media/ipu7/ipu7-boot.c
115
val = readl(base + ucx_ctrl_status);
drivers/staging/media/ipu7/ipu7-boot.c
142
val = readl(base + ctx->status_ctrl_reg);
drivers/staging/media/ipu7/ipu7-boot.c
161
val = readl(base + ctx->status_ctrl_reg);
drivers/staging/media/ipu7/ipu7-boot.c
170
val = readl(base + ctx->status_ctrl_reg);
drivers/staging/media/ipu7/ipu7-boot.c
81
return readl(base + get_fw_boot_reg_addr(adev, reg));
drivers/staging/media/ipu7/ipu7-boot.c
95
val = readl(base + ucx_ctrl_status);
drivers/staging/media/ipu7/ipu7-buttress.c
1000
val = readl(base + BUTTRESS_REG_PB_TIMESTAMP_VALID);
drivers/staging/media/ipu7/ipu7-buttress.c
101
val = readl(isp->base + ipc->csr_in);
drivers/staging/media/ipu7/ipu7-buttress.c
1018
val = readl(base + BUTTRESS_REG_TSC_CTL);
drivers/staging/media/ipu7/ipu7-buttress.c
1038
tsc_lo = readl(isp->base + BUTTRESS_REG_TSC_LO);
drivers/staging/media/ipu7/ipu7-buttress.c
1039
tsc_hi = readl(isp->base + BUTTRESS_REG_TSC_HI);
drivers/staging/media/ipu7/ipu7-buttress.c
1041
tsc_lo = readl(isp->base + BUTTRESS_REG_PB_TIMESTAMP_LO);
drivers/staging/media/ipu7/ipu7-buttress.c
1042
tsc_hi = readl(isp->base + BUTTRESS_REG_PB_TIMESTAMP_HI);
drivers/staging/media/ipu7/ipu7-buttress.c
1069
val = readl(isp->base + BUTTRESS_REG_DRV_IS_UCX_CONTROL_STATUS);
drivers/staging/media/ipu7/ipu7-buttress.c
1079
val = readl(isp->base + BUTTRESS_REG_DRV_PS_UCX_CONTROL_STATUS);
drivers/staging/media/ipu7/ipu7-buttress.c
1098
val = readl(isp->pb_base + BAR2_MISC_CONFIG);
drivers/staging/media/ipu7/ipu7-buttress.c
1106
val = readl(isp->pb_base + BAR2_MISC_CONFIG);
drivers/staging/media/ipu7/ipu7-buttress.c
1112
readl(isp->pb_base + TLBID_HASH_ENABLE_63_32),
drivers/staging/media/ipu7/ipu7-buttress.c
1113
readl(isp->pb_base + TLBID_HASH_ENABLE_95_64));
drivers/staging/media/ipu7/ipu7-buttress.c
1118
readl(isp->pb_base + TLBID_HASH_ENABLE_63_32),
drivers/staging/media/ipu7/ipu7-buttress.c
1119
readl(isp->pb_base + TLBID_HASH_ENABLE_95_64));
drivers/staging/media/ipu7/ipu7-buttress.c
1124
readl(isp->pb_base + TLBID_HASH_ENABLE_63_32),
drivers/staging/media/ipu7/ipu7-buttress.c
1125
readl(isp->pb_base + TLBID_HASH_ENABLE_127_96));
drivers/staging/media/ipu7/ipu7-buttress.c
1168
val = readl(isp->base + BUTTRESS_REG_IPU_SKU);
drivers/staging/media/ipu7/ipu7-buttress.c
1171
readl(isp->base + BUTTRESS_REG_CAMERA_MASK));
drivers/staging/media/ipu7/ipu7-buttress.c
1172
b->wdt_cached_value = readl(isp->base + BUTTRESS_REG_IDLE_WDT);
drivers/staging/media/ipu7/ipu7-buttress.c
152
val = readl(isp->base + ipc->csr_in);
drivers/staging/media/ipu7/ipu7-buttress.c
216
*ipc_msg = readl(isp->base + ipc->data0_in);
drivers/staging/media/ipu7/ipu7-buttress.c
351
pb_irq = readl(isp->pb_base + INTERRUPT_STATUS);
drivers/staging/media/ipu7/ipu7-buttress.c
355
pb_local_irq = readl(isp->pb_base + BTRS_LOCAL_INTERRUPT_MASK);
drivers/staging/media/ipu7/ipu7-buttress.c
366
readl(isp->pb_base + ATS_ERROR_LOG1),
drivers/staging/media/ipu7/ipu7-buttress.c
367
readl(isp->pb_base + ATS_ERROR_LOG2),
drivers/staging/media/ipu7/ipu7-buttress.c
368
readl(isp->pb_base + CFI_0_ERROR_LOG),
drivers/staging/media/ipu7/ipu7-buttress.c
369
readl(isp->pb_base + CFI_1_ERROR_LOGGING),
drivers/staging/media/ipu7/ipu7-buttress.c
370
readl(isp->pb_base + IMR_ERROR_LOGGING_LOW),
drivers/staging/media/ipu7/ipu7-buttress.c
371
readl(isp->pb_base + IMR_ERROR_LOGGING_HIGH),
drivers/staging/media/ipu7/ipu7-buttress.c
372
readl(isp->pb_base + IMR_ERROR_LOGGING_CFI_1_LOW),
drivers/staging/media/ipu7/ipu7-buttress.c
373
readl(isp->pb_base + IMR_ERROR_LOGGING_CFI_1_HIGH));
drivers/staging/media/ipu7/ipu7-buttress.c
376
irq_status = readl(isp->base + BUTTRESS_REG_IRQ_STATUS);
drivers/staging/media/ipu7/ipu7-buttress.c
430
irq_status = readl(isp->base + BUTTRESS_REG_IRQ_STATUS);
drivers/staging/media/ipu7/ipu7-buttress.c
473
val = readl(isp->base + BUTTRESS_REG_D2D_CTL);
drivers/staging/media/ipu7/ipu7-buttress.c
541
val = readl(isp->base + BUTTRESS_REG_SLEEP_LEVEL_CFG);
drivers/staging/media/ipu7/ipu7-buttress.c
570
val = readl(isp->base + BUTTRESS_REG_SLEEP_LEVEL_CFG);
drivers/staging/media/ipu7/ipu7-buttress.c
711
val = readl(isp->base + BUTTRESS_REG_SLEEP_LEVEL_STS);
drivers/staging/media/ipu7/ipu7-buttress.c
746
val = readl(isp->base + BUTTRESS_REG_SECURITY_CTL);
drivers/staging/media/ipu7/ipu7-buttress.c
758
val = readl(isp->base + BUTTRESS_REG_SECURITY_CTL);
drivers/staging/media/ipu7/ipu7-buttress.c
777
reg_val = readl(isp->base + BUTTRESS_REG_IS_WORKPOINT_REQ);
drivers/staging/media/ipu7/ipu7-buttress.c
802
reg_val = readl(isp->base + BUTTRESS_REG_PS_WORKPOINT_REQ);
drivers/staging/media/ipu7/ipu7-buttress.c
82
val = readl(isp->base + ipc->csr_in);
drivers/staging/media/ipu7/ipu7-buttress.c
959
val = readl(isp->base + BUTTRESS_REG_PWR_STATUS);
drivers/staging/media/ipu7/ipu7-buttress.c
984
val = readl(base + BUTTRESS_REG_PB_TIMESTAMP_VALID);
drivers/staging/media/ipu7/ipu7-buttress.c
995
val = readl(base + BUTTRESS_REG_TSC_CTL);
drivers/staging/media/ipu7/ipu7-isys-csi-phy.c
164
base + addr - isys_base, readl(base + addr));
drivers/staging/media/ipu7/ipu7-isys-csi-phy.c
178
base + addr - isys_base, readl(base + addr));
drivers/staging/media/ipu7/ipu7-isys-csi-phy.c
187
data = readl(base + addr);
drivers/staging/media/ipu7/ipu7-isys-csi-phy.c
359
dev_dbg(dev, "phy %u ready = 0x%08x\n", id, readl(gpreg + PHY_READY));
drivers/staging/media/ipu7/ipu7-isys-csi2.c
169
port, readl(isys_base + offset + CSI_PORT_CLK_GATE),
drivers/staging/media/ipu7/ipu7-isys-csi2.c
170
readl(isys_base + offset + CLK_DIV_FACTOR_APB_CLK));
drivers/staging/media/ipu7/ipu7-isys.c
1040
sync = readl(csi2->base + offset + IRQ_CTL_STATUS);
drivers/staging/media/ipu7/ipu7-isys.c
1045
fe = readl(csi2->base + offset + IRQ1_CTL_STATUS);
drivers/staging/media/ipu7/ipu7-isys.c
1088
status_csi = readl(base + csi_offset + IRQ_CTL_STATUS);
drivers/staging/media/ipu7/ipu7-isys.c
1089
status_sw = readl(base + sw_offset + TO_SW_IRQ_CNTL_STATUS);
drivers/staging/media/ipu7/ipu7-isys.c
1121
status_csi = readl(base + csi_offset + IRQ_CTL_STATUS);
drivers/staging/media/ipu7/ipu7-isys.c
1122
status_sw |= readl(base + sw_offset + TO_SW_IRQ_CNTL_STATUS);
drivers/staging/media/ipu7/ipu7-isys.c
824
u32 status = readl(csi2->base + offset + IRQ_CTL_STATUS);
drivers/staging/media/ipu7/ipu7-mmu.c
470
readl(mmu_hw->base + MMU_REG_PAGE_TABLE_BASE_ADDR));
drivers/staging/media/ipu7/ipu7-mmu.c
481
readl(mmu_hw->base + MMU_REG_USER_INFO_BITS));
drivers/staging/media/ipu7/ipu7-mmu.c
62
irq_cause = readl(mmu->mmu_hw[i].base + MMU_REG_IRQ_CAUSE);
drivers/staging/media/ipu7/ipu7-syscom.c
24
u32 write_index = readl(queue_indices +
drivers/staging/media/ipu7/ipu7-syscom.c
27
u32 read_index = readl(queue_indices +
drivers/staging/media/ipu7/ipu7-syscom.c
67
index = readl(queue_indices + offset);
drivers/staging/media/meson/vdec/vdec_hevc.c
66
while (i && (readl(core->dos_base + HEVC_IMEM_DMA_CTRL) & 0x8000))
drivers/staging/media/sunxi/cedrus/cedrus.h
217
return readl(dev->base + reg);
drivers/staging/media/tegra-video/tegra20.c
242
val = readl(apb_misc + reg_offset);
drivers/staging/most/dim2/hal.c
150
while ((readl(&g.dim2->MCTL) & 1) != 1)
drivers/staging/most/dim2/hal.c
174
return readl((&g.dim2->MDAT0) + mdat_idx);
drivers/staging/most/dim2/hal.c
359
writel(readl(&g.dim2->ACMR0) | bit_mask(ch_addr), &g.dim2->ACMR0);
drivers/staging/most/dim2/hal.c
365
writel(readl(&g.dim2->ACMR0) & ~bit_mask(ch_addr), &g.dim2->ACMR0);
drivers/staging/most/dim2/hal.c
562
u32 const c1 = readl(&g.dim2->MLBC1);
drivers/staging/most/dim2/hal.c
566
return (readl(&g.dim2->MLBC1) & mask1) == 0 &&
drivers/staging/most/dim2/hal.c
567
(readl(&g.dim2->MLBC0) & mask0) != 0;
drivers/staging/nvec/nvec.c
607
status = readl(nvec->base + I2C_SL_STATUS);
drivers/staging/nvec/nvec.c
621
received = readl(nvec->base + I2C_SL_RCVD);
drivers/staging/sm750fb/ddk750_chip.h
18
return readl(addr + mmio750);
drivers/staging/sm750fb/sm750_accel.c
27
return readl(accel->dpr_base + offset);
drivers/thermal/airoha_thermal.c
305
status = readl(priv->base + EN7581_TEMPMONINTSTS);
drivers/thermal/airoha_thermal.c
339
efuse_calib_info = readl(priv->base + EN7581_EFUSE_TEMP_OFFSET_REG);
drivers/thermal/airoha_thermal.c
343
cpu_sensor = readl(priv->base + EN7581_EFUSE_TEMP_CPU_SENSOR_REG);
drivers/thermal/broadcom/bcm2835_thermal.c
205
val = readl(data->regs + BCM2835_TS_TSENSCTL);
drivers/thermal/broadcom/bcm2835_thermal.c
90
u32 val = readl(data->regs + BCM2835_TS_TSENSSTAT);
drivers/thermal/broadcom/ns-thermal.c
24
val = readl(pvtmon + PVTMON_CONTROL0);
drivers/thermal/broadcom/ns-thermal.c
35
val = readl(pvtmon + PVTMON_STATUS);
drivers/thermal/broadcom/sr-thermal.c
38
*temp = readl(sr_thermal->regs + SR_TMON_TEMP_BASE(tmon->tmon_id));
drivers/thermal/hisi_thermal.c
200
return hi6220_thermal_step_to_temp(readl(addr + HI6220_TEMP0_VALUE));
drivers/thermal/hisi_thermal.c
239
return hi3660_thermal_step_to_temp(readl(addr + HI3660_TEMP(id)));
drivers/thermal/hisi_thermal.c
254
writel((readl(addr + HI6220_TEMP0_CFG) & ~HI6220_TEMP0_CFG_SS_MSK) |
drivers/thermal/hisi_thermal.c
270
writel((readl(addr + HI6220_TEMP0_CFG) & ~HI6220_TEMP0_CFG_HDAK_MSK) |
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
29
data = readl(proc_priv->mmio_base + MBOX_OFFSET_INTERFACE);
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
80
*resp = readl(proc_priv->mmio_base + MBOX_OFFSET_DATA);
drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c
211
reg_val = readl((void __iomem *) (proc_priv->mmio_base + mmio_regs[ret].offset));\
drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c
261
reg_val = readl((void __iomem *) (proc_priv->mmio_base + mmio_regs[ret].offset));\
drivers/thermal/k3_bandgap.c
125
s0 = readl(bgp->base + devdata->stat_offset) &
drivers/thermal/k3_bandgap.c
127
s1 = readl(bgp->base + devdata->stat_offset) &
drivers/thermal/k3_bandgap.c
129
s2 = readl(bgp->base + devdata->stat_offset) &
drivers/thermal/k3_bandgap.c
189
val = readl(bgp->base + K3_VTM_DEVINFO_PWR0_OFFSET);
drivers/thermal/k3_bandgap.c
207
val = readl(data[id].bgp->base + data[id].ctrl_offset);
drivers/thermal/k3_j72xx_bandgap.c
235
s0 = readl(bgp->base + devdata->stat_offset) &
drivers/thermal/k3_j72xx_bandgap.c
237
s1 = readl(bgp->base + devdata->stat_offset) &
drivers/thermal/k3_j72xx_bandgap.c
239
s2 = readl(bgp->base + devdata->stat_offset) &
drivers/thermal/k3_j72xx_bandgap.c
303
tmp = (readl(fuse_base + 0x8) & 0xE0000000) >> (29);
drivers/thermal/k3_j72xx_bandgap.c
304
tmp |= ((readl(fuse_base + 0xC) & 0x1F) << 3);
drivers/thermal/k3_j72xx_bandgap.c
308
tmp = (readl(fuse_base + 0x4) & 0xF8000000) >> (27);
drivers/thermal/k3_j72xx_bandgap.c
309
tmp |= ((readl(fuse_base + 0x8) & 0xF) << 5);
drivers/thermal/k3_j72xx_bandgap.c
312
tmp = readl(fuse_base + ct_offsets[id][i]);
drivers/thermal/k3_j72xx_bandgap.c
352
val = readl(bgp->cfg2_base + data->ctrl_offset);
drivers/thermal/k3_j72xx_bandgap.c
439
if ((readl(fuse_base) & 0xc0000000) == 0xc0000000)
drivers/thermal/k3_j72xx_bandgap.c
455
val = readl(bgp->base + K3_VTM_DEVINFO_PWR0_OFFSET);
drivers/thermal/loongson2_thermal.c
79
val = readl(data->ctrl_reg + LOONGSON2_THSENS_OUT_REG);
drivers/thermal/loongson2_thermal.c
90
val = readl(data->temp_reg);
drivers/thermal/mediatek/auxadc_thermal.c
1176
tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
drivers/thermal/mediatek/auxadc_thermal.c
1190
tmp = readl(mt->thermal_base + TEMP_MSRCTL1);
drivers/thermal/mediatek/auxadc_thermal.c
788
val = readl(mt->thermal_base + PTPCORESEL);
drivers/thermal/mediatek/auxadc_thermal.c
824
raw = readl(mt->thermal_base + conf->msr[i]);
drivers/thermal/mediatek/lvts_thermal.c
1130
id = readl(LVTS_ID(lvts_ctrl->base));
drivers/thermal/mediatek/lvts_thermal.c
401
value = readl(LVTS_MONINT(lvts_ctrl->base));
drivers/thermal/mediatek/lvts_thermal.c
569
value = readl(LVTS_MONINTSTS(lvts_ctrl->base));
drivers/thermal/renesas/rzg3e_thermal.c
136
val = readl(priv->base + TSU_SOSR1);
drivers/thermal/renesas/rzg3e_thermal.c
235
code = readl(priv->base + TSU_SCRR) & TSU_SCRR_OUT12BIT_TS;
drivers/thermal/renesas/rzg3e_thermal.c
290
val = readl(priv->base + TSU_SOSR1);
drivers/thermal/renesas/rzg3e_thermal.c
324
status = readl(priv->base + TSU_SISR);
drivers/thermal/renesas/rzg3s_thermal.c
162
val = readl(priv->base + OTPTSUTRIM_REG(0));
drivers/thermal/renesas/rzg3s_thermal.c
168
val = readl(priv->base + OTPTSUTRIM_REG(1));
drivers/thermal/samsung/exynos_tmu.c
343
interrupt_en = readl(data->base + reg_off);
drivers/thermal/samsung/exynos_tmu.c
361
th = readl(data->base + reg_off);
drivers/thermal/samsung/exynos_tmu.c
412
sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO));
drivers/thermal/samsung/exynos_tmu.c
453
ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON1);
drivers/thermal/samsung/exynos_tmu.c
457
ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON2);
drivers/thermal/samsung/exynos_tmu.c
464
trim_info = readl(data->base_second + EXYNOS_TMU_REG_TRIMINFO);
drivers/thermal/samsung/exynos_tmu.c
466
trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
drivers/thermal/samsung/exynos_tmu.c
512
trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
drivers/thermal/samsung/exynos_tmu.c
581
trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
drivers/thermal/samsung/exynos_tmu.c
590
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
drivers/thermal/samsung/exynos_tmu.c
605
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
drivers/thermal/samsung/exynos_tmu.c
623
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
drivers/thermal/samsung/exynos_tmu.c
709
val = readl(data->base + emul_con);
drivers/thermal/samsung/exynos_tmu.c
796
val_irq = readl(data->base + tmu_intstat);
drivers/thermal/sprd_thermal.c
115
orig = readl(reg);
drivers/thermal/sprd_thermal.c
212
data = readl(sen->data->base + SPRD_THM_TEMP(sen->id)) &
drivers/thermal/tegra/soctherm.c
1004
st = readl(ts->regs + OC_INTR_STATUS);
drivers/thermal/tegra/soctherm.c
1078
r = readl(ts->regs + OC_INTR_STATUS);
drivers/thermal/tegra/soctherm.c
1268
r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG1);
drivers/thermal/tegra/soctherm.c
1286
r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS1);
drivers/thermal/tegra/soctherm.c
1292
r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS0);
drivers/thermal/tegra/soctherm.c
1298
r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG0);
drivers/thermal/tegra/soctherm.c
1310
r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG2);
drivers/thermal/tegra/soctherm.c
1317
r = readl(ts->regs + SENSOR_PDIV);
drivers/thermal/tegra/soctherm.c
1320
r = readl(ts->regs + SENSOR_HOTSPOT_OFF);
drivers/thermal/tegra/soctherm.c
1326
r = readl(ts->regs + SENSOR_TEMP1);
drivers/thermal/tegra/soctherm.c
1331
r = readl(ts->regs + SENSOR_TEMP2);
drivers/thermal/tegra/soctherm.c
1344
r = readl(ts->regs + THERMCTL_LVL_REG(off, level));
drivers/thermal/tegra/soctherm.c
1395
r = readl(ts->regs + THERMCTL_STATS_CTL);
drivers/thermal/tegra/soctherm.c
1404
r = readl(ts->regs + THERMCTL_LVL_REG(off, level));
drivers/thermal/tegra/soctherm.c
1408
r = readl(ts->regs + THERMCTL_LVL_REG(off, level));
drivers/thermal/tegra/soctherm.c
1412
r = readl(ts->regs + THERMCTL_THERMTRIP_CTL);
drivers/thermal/tegra/soctherm.c
1423
r = readl(ts->regs + THROT_GLOBAL_CFG);
drivers/thermal/tegra/soctherm.c
1428
r = readl(ts->regs + THROT_STATUS);
drivers/thermal/tegra/soctherm.c
1436
r = readl(ts->regs + CPU_PSKIP_STATUS);
drivers/thermal/tegra/soctherm.c
1515
r = readl(ts->regs + THROT_STATUS);
drivers/thermal/tegra/soctherm.c
1802
r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
drivers/thermal/tegra/soctherm.c
1835
r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
drivers/thermal/tegra/soctherm.c
1841
r = readl(ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
drivers/thermal/tegra/soctherm.c
1864
r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_GPU));
drivers/thermal/tegra/soctherm.c
1926
r = readl(ts->regs + THROT_PRIORITY_LOCK);
drivers/thermal/tegra/soctherm.c
1962
v = readl(ts->clk_regs + CAR_SUPER_CCLKG_DIVIDER);
drivers/thermal/tegra/soctherm.c
2035
pdiv = readl(tegra->regs + SENSOR_PDIV);
drivers/thermal/tegra/soctherm.c
2036
hotspot = readl(tegra->regs + SENSOR_HOTSPOT_OFF);
drivers/thermal/tegra/soctherm.c
389
return readl(ts->ccroc_regs + reg);
drivers/thermal/tegra/soctherm.c
436
val = readl(zone->reg);
drivers/thermal/tegra/soctherm.c
494
r = readl(ts->regs + THERMCTL_THERMTRIP_CTL);
drivers/thermal/tegra/soctherm.c
551
r = readl(ts->regs + reg_off);
drivers/thermal/tegra/soctherm.c
643
r = readl(zn->ts->regs + THERMCTL_INTR_ENABLE);
drivers/thermal/tegra/soctherm.c
655
r = readl(zn->ts->regs + THERMCTL_INTR_DISABLE);
drivers/thermal/tegra/soctherm.c
668
r = readl(zone->ts->regs + zone->sg->thermctl_lvl0_offset);
drivers/thermal/tegra/soctherm.c
814
r = readl(ts->regs + THERMCTL_INTR_STATUS);
drivers/thermal/tegra/soctherm.c
843
st = readl(ts->regs + THERMCTL_INTR_STATUS);
drivers/thermal/tegra/soctherm.c
920
r = readl(ts->regs + OC_INTR_ENABLE);
drivers/thermal/ti-soc-thermal/ti-bandgap.c
56
return readl(bgp->base + reg);
drivers/tty/ipwireless/hardware.c
1053
return readl(&hw->memory_info_regs->memreg_card_present) ==
drivers/tty/nozomi.c
392
*(buf) = __le32_to_cpu(readl(ptr));
drivers/tty/nozomi.c
404
*(buf) = __le32_to_cpu(readl(ptr));
drivers/tty/nozomi.c
761
size = __le32_to_cpu(readl(addr));
drivers/tty/serial/8250/8250_bcm7271.c
250
return readl(priv->regs[reg_type] + offset);
drivers/tty/serial/8250/8250_bcm7271.c
265
value = readl(reg);
drivers/tty/serial/8250/8250_bcm7271.c
276
value = readl(reg);
drivers/tty/serial/8250/8250_ce4100.c
22
return readl(p->membase + offset);
drivers/tty/serial/8250/8250_dw.c
376
u32 value = readl(p->membase + (offset << p->regshift));
drivers/tty/serial/8250/8250_dwlib.h
31
return readl(p->membase + offset);
drivers/tty/serial/8250/8250_early.c
46
return readl(port->membase + offset);
drivers/tty/serial/8250/8250_em.c
72
return readl(p->membase + ((offset + 1) << 2));
drivers/tty/serial/8250/8250_em.c
74
return readl(p->membase + (UART_FCR_EM_HW << 2));
drivers/tty/serial/8250/8250_em.c
80
return readl(p->membase + (offset << 2));
drivers/tty/serial/8250/8250_ingenic.c
46
return readl(port->membase + (offset << 2));
drivers/tty/serial/8250/8250_omap.c
176
return readl(priv->membase + (reg << OMAP_UART_REGSHIFT));
drivers/tty/serial/8250/8250_pci.c
362
readl(p + 0x4c);
drivers/tty/serial/8250/8250_pci.c
385
readl(p + 0x4c);
drivers/tty/serial/8250/8250_pci.c
408
writel(readl(p + NI8420_INT_ENABLE_REG) & ~(NI8420_INT_ENABLE_BIT),
drivers/tty/serial/8250/8250_pci.c
766
writel(readl(p + NI8420_INT_ENABLE_REG) | NI8420_INT_ENABLE_BIT,
drivers/tty/serial/8250/8250_pci.c
807
writel((readl(p + MITE_IOWCR1) & MITE_IOWCR1_RAMSEL_MASK),
drivers/tty/serial/8250/8250_pci1xxxx.c
168
return readl(port->membase + UART_SYSLOCK_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
277
adcl_cfg_reg = readl(port->membase + ADCL_CFG_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
283
modem_ctl_reg = readl(port->membase + UART_MODEM_CTL_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
288
line_stat_reg = readl(port->membase + UART_LINE_STAT_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
290
fract_div_cfg_reg = readl(port->membase +
drivers/tty/serial/8250/8250_pci1xxxx.c
322
frac_div = readl(port->membase + FRAC_DIV_CFG_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
340
clock_div = readl(port->membase + UART_BAUD_CLK_DIVISOR_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
365
status = readl(port->membase + UART_BURST_STATUS_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
399
*burst_buf = readl(port->membase + UART_RX_BURST_FIFO);
drivers/tty/serial/8250/8250_pci1xxxx.c
623
data = readl(p + UART_RESET_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
654
data = readl(p + UART_RESET_REG);
drivers/tty/serial/8250/8250_pci1xxxx.c
754
regval = readl(priv->membase + UART_DEV_REV_REG);
drivers/tty/serial/8250/8250_port.c
382
return readl(p->membase + offset);
drivers/tty/serial/8250/8250_uniphier.c
135
tmp = readl(p->membase + offset);
drivers/tty/serial/8250/8250_uniphier.c
150
return readl(up->port.membase + UNIPHIER_UART_DLR);
drivers/tty/serial/8250/8250_uniphier.c
92
return (readl(p->membase + offset) >> valshift) & 0xff;
drivers/tty/serial/altera_jtaguart.c
114
while ((status = readl(port->membase + ALTERA_JTAGUART_DATA_REG)) &
drivers/tty/serial/altera_jtaguart.c
145
isr = (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) >>
drivers/tty/serial/altera_jtaguart.c
53
u32 ctl = readl(port->membase + ALTERA_JTAGUART_CONTROL_REG);
drivers/tty/serial/altera_uart.c
85
return readl(port->membase + (reg << port->regshift));
drivers/tty/serial/amba-pl011.c
2625
while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
drivers/tty/serial/amba-pl011.c
2628
while (!(readl(port->membase + UART01x_FR) & UART011_FR_TXFE))
drivers/tty/serial/amba-pl011.c
2641
while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
drivers/tty/serial/amba-pl011.c
2647
while (readl(port->membase + UART01x_FR) & UART01x_FR_BUSY)
drivers/tty/serial/amba-pl011.c
2661
if (readl(port->membase + UART01x_FR) & UART01x_FR_RXFE)
drivers/tty/serial/amba-pl011.c
2665
return readl(port->membase + UART01x_DR);
drivers/tty/serial/ar933x_uart.c
60
return readl(up->port.membase + offset);
drivers/tty/serial/clps711x.c
212
ubrlcr = readl(port->membase + UBRLCR_OFFSET);
drivers/tty/serial/clps711x.c
236
writel(readl(port->membase + UBRLCR_OFFSET) & ~UBRLCR_BREAK,
drivers/tty/serial/clps711x.c
402
ubrlcr = readl(port->membase + UBRLCR_OFFSET);
drivers/tty/serial/esp32_acm.c
55
return readl(port->membase + reg);
drivers/tty/serial/esp32_uart.c
151
return readl(port->membase + reg);
drivers/tty/serial/fsl_linflexuart.c
147
ier = readl(port->membase + LINIER);
drivers/tty/serial/fsl_linflexuart.c
156
ier = readl(port->membase + LINIER);
drivers/tty/serial/fsl_linflexuart.c
167
while (((status = readl(sport->membase + UARTSR)) &
drivers/tty/serial/fsl_linflexuart.c
197
ier = readl(port->membase + LINIER);
drivers/tty/serial/fsl_linflexuart.c
236
status = readl(sport->membase + UARTSR);
drivers/tty/serial/fsl_linflexuart.c
259
status = readl(sport->membase + UARTSR);
drivers/tty/serial/fsl_linflexuart.c
282
status = readl(sport->membase + UARTSR);
drivers/tty/serial/fsl_linflexuart.c
297
status = readl(port->membase + UARTSR) & LINFLEXD_UARTSR_DTFTFF;
drivers/tty/serial/fsl_linflexuart.c
320
ier = readl(sport->membase + LINIER);
drivers/tty/serial/fsl_linflexuart.c
324
cr = readl(sport->membase + UARTCR);
drivers/tty/serial/fsl_linflexuart.c
336
while ((readl(sport->membase + LINSR)
drivers/tty/serial/fsl_linflexuart.c
361
ier = readl(sport->membase + LINIER);
drivers/tty/serial/fsl_linflexuart.c
393
ier = readl(port->membase + LINIER);
drivers/tty/serial/fsl_linflexuart.c
410
cr = readl(port->membase + UARTCR);
drivers/tty/serial/fsl_linflexuart.c
414
cr1 = readl(port->membase + LINCR1);
drivers/tty/serial/fsl_linflexuart.c
419
while ((readl(port->membase + LINSR)
drivers/tty/serial/fsl_linflexuart.c
560
cr = readl(port->membase + UARTCR);
drivers/tty/serial/fsl_linflexuart.c
565
while ((readl(port->membase + UARTSR) &
drivers/tty/serial/fsl_linflexuart.c
570
while (readl(port->membase + UARTSR) &
drivers/tty/serial/fsl_linflexuart.c
575
writel((readl(port->membase + UARTSR) |
drivers/tty/serial/fsl_linflexuart.c
628
ier = readl(sport->membase + LINIER);
drivers/tty/serial/fsl_linflexuart.c
631
cr = readl(sport->membase + UARTCR);
drivers/tty/serial/fsl_linflexuart.c
669
cr = readl(sport->membase + UARTCR);
drivers/tty/serial/fsl_lpuart.c
388
return readl(port->membase + off);
drivers/tty/serial/icom.c
1109
adapter_interrupts = readl(int_reg);
drivers/tty/serial/icom.c
1137
adapter_interrupts = readl(int_reg);
drivers/tty/serial/icom.c
1160
adapter_interrupts = readl(int_reg);
drivers/tty/serial/icom.c
557
temp = readl(stop_proc[port].global_control_reg);
drivers/tty/serial/icom.c
562
readl(stop_proc[port].global_control_reg);
drivers/tty/serial/icom.c
588
temp = readl(start_proc[port].global_control_reg);
drivers/tty/serial/icom.c
593
readl(start_proc[port].global_control_reg);
drivers/tty/serial/icom.c
824
temp = readl(int_mask_tbl[port].global_int_mask);
drivers/tty/serial/icom.c
828
readl(int_mask_tbl[port].global_int_mask);
drivers/tty/serial/icom.c
859
temp = readl(int_mask_tbl[port].global_int_mask);
drivers/tty/serial/icom.c
863
readl(int_mask_tbl[port].global_int_mask);
drivers/tty/serial/imx.c
283
return readl(sport->port.membase + offset);
drivers/tty/serial/jsm/jsm_neo.c
1087
uart_poll = readl(brd->re_map_membase + UART_17158_POLL_ADDR_OFFSET);
drivers/tty/serial/lantiq.c
284
stat = readl(port->membase + LTQ_ASC_IRNCR);
drivers/tty/serial/lpc32xx_hs.c
102
if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(
drivers/tty/serial/lpc32xx_hs.c
116
if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(
drivers/tty/serial/lpc32xx_hs.c
240
while ((readl(LPC32XX_HSUART_LEVEL(port->membase)) > 0) &&
drivers/tty/serial/lpc32xx_hs.c
242
readl(LPC32XX_HSUART_FIFO(port->membase));
drivers/tty/serial/lpc32xx_hs.c
251
tmp = readl(LPC32XX_HSUART_FIFO(port->membase));
drivers/tty/serial/lpc32xx_hs.c
268
tmp = readl(LPC32XX_HSUART_FIFO(port->membase));
drivers/tty/serial/lpc32xx_hs.c
276
u32 level = readl(LPC32XX_HSUART_LEVEL(port->membase));
drivers/tty/serial/lpc32xx_hs.c
299
status = readl(LPC32XX_HSUART_IIR(port->membase));
drivers/tty/serial/lpc32xx_hs.c
341
if (LPC32XX_HSU_TX_LEV(readl(LPC32XX_HSUART_LEVEL(port->membase))) == 0)
drivers/tty/serial/lpc32xx_hs.c
366
tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
drivers/tty/serial/lpc32xx_hs.c
377
tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
drivers/tty/serial/lpc32xx_hs.c
387
tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
drivers/tty/serial/lpc32xx_hs.c
403
tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
drivers/tty/serial/lpc32xx_hs.c
492
tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
drivers/tty/serial/meson_uart.c
102
val = readl(port->membase + AML_UART_STATUS);
drivers/tty/serial/meson_uart.c
111
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
120
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
134
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
153
while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) {
drivers/tty/serial/meson_uart.c
168
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
186
ostatus = status = readl(port->membase + AML_UART_STATUS);
drivers/tty/serial/meson_uart.c
196
mode = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
211
ch = readl(port->membase + AML_UART_RFIFO);
drivers/tty/serial/meson_uart.c
230
} while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY));
drivers/tty/serial/meson_uart.c
241
if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY))
drivers/tty/serial/meson_uart.c
244
if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) {
drivers/tty/serial/meson_uart.c
245
if (readl(port->membase + AML_UART_CONTROL) & AML_UART_TX_INT_EN)
drivers/tty/serial/meson_uart.c
271
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
287
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
347
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
467
if (readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY)
drivers/tty/serial/meson_uart.c
470
c = readl(port->membase + AML_UART_RFIFO);
drivers/tty/serial/meson_uart.c
538
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/meson_uart.c
548
while (readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)
drivers/tty/serial/meson_uart.c
565
val = readl(port->membase + AML_UART_CONTROL);
drivers/tty/serial/mvebu-uart.c
1097
val = readl(uart_clock_base->reg1);
drivers/tty/serial/mvebu-uart.c
1149
val = readl(uart_clock_base->reg2);
drivers/tty/serial/mvebu-uart.c
1178
val = readl(uart_clock_base->reg1);
drivers/tty/serial/mvebu-uart.c
1202
val = readl(uart_clock_base->reg1);
drivers/tty/serial/mvebu-uart.c
1221
val = readl(uart_clock_base->reg1);
drivers/tty/serial/mvebu-uart.c
1237
uart_clock->pm_context_reg1 = readl(uart_clock_base->reg1);
drivers/tty/serial/mvebu-uart.c
1238
uart_clock->pm_context_reg2 = readl(uart_clock_base->reg2);
drivers/tty/serial/mvebu-uart.c
191
st = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
213
unsigned int ctl = readl(port->membase + UART_INTR(port));
drivers/tty/serial/mvebu-uart.c
227
ctl = readl(port->membase + UART_INTR(port));
drivers/tty/serial/mvebu-uart.c
236
ctl = readl(port->membase + UART_CTRL(port));
drivers/tty/serial/mvebu-uart.c
240
ctl = readl(port->membase + UART_INTR(port));
drivers/tty/serial/mvebu-uart.c
251
ctl = readl(port->membase + UART_CTRL(port));
drivers/tty/serial/mvebu-uart.c
269
ch = readl(port->membase + UART_RBR(port));
drivers/tty/serial/mvebu-uart.c
283
ret = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
327
status = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
338
!(readl(port->membase + UART_STAT) & STAT_TX_FIFO_FUL),
drivers/tty/serial/mvebu-uart.c
346
unsigned int st = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
361
unsigned int st = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
373
unsigned int st = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
392
ret = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
398
ctl = readl(port->membase + UART_INTR(port));
drivers/tty/serial/mvebu-uart.c
518
brdv = readl(port->membase + UART_BRDV);
drivers/tty/serial/mvebu-uart.c
524
osamp = readl(port->membase + UART_OSAMP);
drivers/tty/serial/mvebu-uart.c
611
unsigned int st = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
616
return readl(port->membase + UART_RBR(port));
drivers/tty/serial/mvebu-uart.c
624
st = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
665
st = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
674
st = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
740
ier = readl(port->membase + UART_CTRL(port)) & CTRL_BRK_INT;
drivers/tty/serial/mvebu-uart.c
741
intr = readl(port->membase + UART_INTR(port)) &
drivers/tty/serial/mvebu-uart.c
754
ctl = intr | readl(port->membase + UART_INTR(port));
drivers/tty/serial/mvebu-uart.c
828
mvuart->pm_regs.rbr = readl(port->membase + UART_RBR(port));
drivers/tty/serial/mvebu-uart.c
829
mvuart->pm_regs.tsh = readl(port->membase + UART_TSH(port));
drivers/tty/serial/mvebu-uart.c
830
mvuart->pm_regs.ctrl = readl(port->membase + UART_CTRL(port));
drivers/tty/serial/mvebu-uart.c
831
mvuart->pm_regs.intr = readl(port->membase + UART_INTR(port));
drivers/tty/serial/mvebu-uart.c
832
mvuart->pm_regs.stat = readl(port->membase + UART_STAT);
drivers/tty/serial/mvebu-uart.c
834
mvuart->pm_regs.brdv = readl(port->membase + UART_BRDV);
drivers/tty/serial/mvebu-uart.c
836
mvuart->pm_regs.osamp = readl(port->membase + UART_OSAMP);
drivers/tty/serial/omap-serial.c
1415
mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift));
drivers/tty/serial/owl-uart.c
91
return readl(port->membase + off);
drivers/tty/serial/pxa.c
55
return readl(up->port.membase + offset);
drivers/tty/serial/qcom_geni_serial.c
1000
irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
1019
irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
1065
m_irq_status = readl(uport->membase + SE_GENI_M_IRQ_STATUS);
drivers/tty/serial/qcom_geni_serial.c
1066
s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);
drivers/tty/serial/qcom_geni_serial.c
1067
dma_tx_status = readl(uport->membase + SE_DMA_TX_IRQ_STAT);
drivers/tty/serial/qcom_geni_serial.c
1068
dma_rx_status = readl(uport->membase + SE_DMA_RX_IRQ_STAT);
drivers/tty/serial/qcom_geni_serial.c
1069
geni_status = readl(uport->membase + SE_GENI_STATUS);
drivers/tty/serial/qcom_geni_serial.c
1070
dma = readl(uport->membase + SE_GENI_DMA_MODE_EN);
drivers/tty/serial/qcom_geni_serial.c
1071
m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
1206
pin_swap = readl(uport->membase + SE_UART_IO_MACRO_CTRL);
drivers/tty/serial/qcom_geni_serial.c
1369
tx_trans_cfg = readl(uport->membase + SE_UART_TX_TRANS_CFG);
drivers/tty/serial/qcom_geni_serial.c
1370
tx_parity_cfg = readl(uport->membase + SE_UART_TX_PARITY_CFG);
drivers/tty/serial/qcom_geni_serial.c
1371
rx_trans_cfg = readl(uport->membase + SE_UART_RX_TRANS_CFG);
drivers/tty/serial/qcom_geni_serial.c
1372
rx_parity_cfg = readl(uport->membase + SE_UART_RX_PARITY_CFG);
drivers/tty/serial/qcom_geni_serial.c
233
geni_ios = readl(uport->membase + SE_GENI_IOS);
drivers/tty/serial/qcom_geni_serial.c
300
return readl(uport->membase + SE_GENI_STATUS) & M_GENI_CMD_ACTIVE;
drivers/tty/serial/qcom_geni_serial.c
305
return readl(uport->membase + SE_GENI_STATUS) & S_GENI_CMD_ACTIVE;
drivers/tty/serial/qcom_geni_serial.c
328
reg = readl(uport->membase + offset);
drivers/tty/serial/qcom_geni_serial.c
387
status = readl(uport->membase + SE_GENI_M_IRQ_STATUS);
drivers/tty/serial/qcom_geni_serial.c
390
status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);
drivers/tty/serial/qcom_geni_serial.c
393
status = readl(uport->membase + SE_GENI_RX_FIFO_STATUS);
drivers/tty/serial/qcom_geni_serial.c
411
readl(uport->membase + SE_GENI_RX_FIFOn);
drivers/tty/serial/qcom_geni_serial.c
551
m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
552
s_irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
635
return !readl(uport->membase + SE_GENI_TX_FIFO_STATUS);
drivers/tty/serial/qcom_geni_serial.c
720
irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
730
irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
772
status = readl(uport->membase + SE_GENI_RX_FIFO_STATUS);
drivers/tty/serial/qcom_geni_serial.c
794
irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
798
irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
812
s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);
drivers/tty/serial/qcom_geni_serial.c
832
irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
836
irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);
drivers/tty/serial/qcom_geni_serial.c
906
rx_in = readl(uport->membase + SE_DMA_RX_LEN_IN);
drivers/tty/serial/qcom_geni_serial.c
970
status = readl(uport->membase + SE_GENI_TX_FIFO_STATUS);
drivers/tty/serial/rda-uart.c
133
return readl(port->membase + off);
drivers/tty/serial/rp2.c
235
u32 tmp = readl(up->base + reg);
drivers/tty/serial/rp2.c
258
irq_mask = readl(up->asic_base + RP2_CH_IRQ_MASK);
drivers/tty/serial/rp2.c
290
status = readl(up->base + RP2_CHAN_STAT);
drivers/tty/serial/rp2.c
448
status = readl(up->base + RP2_CHAN_STAT);
drivers/tty/serial/rp2.c
465
unsigned long status = readl(base + RP2_CH_IRQ_STAT) &
drivers/tty/serial/rp2.c
466
~readl(base + RP2_CH_IRQ_MASK);
drivers/tty/serial/rp2.c
491
readl(up->base + RP2_UART_CTL);
drivers/tty/serial/rp2.c
611
readl(up->base + RP2_UART_CTL);
drivers/tty/serial/rp2.c
616
readl(up->base + RP2_UART_CTL);
drivers/tty/serial/rsci.c
154
return readl(p->membase + offset);
drivers/tty/serial/samsung_tty.c
2730
while (!(readl(port->membase + S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXFE))
drivers/tty/serial/samsung_tty.c
2738
while (readl(port->membase + S3C2410_UFSTAT) & data->txfull_mask)
drivers/tty/serial/samsung_tty.c
2744
if (readl(port->membase + S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE)
drivers/tty/serial/serial-tegra.c
159
return readl(tup->uport.membase + (reg << tup->uport.regshift));
drivers/tty/serial/sprd_serial.c
1064
!(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
drivers/tty/serial/st-asc.c
156
return readl(port->membase + offset);
drivers/tty/serial/sunplus-uart.c
101
unsigned int mcr = readl(port->membase + SUP_UART_MCR);
drivers/tty/serial/sunplus-uart.c
135
mcr = readl(port->membase + SUP_UART_MCR);
drivers/tty/serial/sunplus-uart.c
159
isc = readl(port->membase + SUP_UART_ISC);
drivers/tty/serial/sunplus-uart.c
168
isc = readl(port->membase + SUP_UART_ISC);
drivers/tty/serial/sunplus-uart.c
177
isc = readl(port->membase + SUP_UART_ISC);
drivers/tty/serial/sunplus-uart.c
189
lcr = readl(port->membase + SUP_UART_LCR);
drivers/tty/serial/sunplus-uart.c
235
unsigned int lsr = readl(port->membase + SUP_UART_LSR);
drivers/tty/serial/sunplus-uart.c
239
ch = readl(port->membase + SUP_UART_DATA);
drivers/tty/serial/sunplus-uart.c
271
lsr = readl(port->membase + SUP_UART_LSR);
drivers/tty/serial/sunplus-uart.c
284
isc = readl(port->membase + SUP_UART_ISC);
drivers/tty/serial/sunplus-uart.c
470
unsigned int lsr = readl(port->membase + SUP_UART_LSR);
drivers/tty/serial/sunplus-uart.c
475
return readl(port->membase + SUP_UART_DATA);
drivers/tty/serial/sunplus-uart.c
87
unsigned int lsr = readl(port->membase + SUP_UART_LSR);
drivers/tty/serial/sunplus-uart.c
94
unsigned int lsr = readl(port->membase + SUP_UART_LSR);
drivers/tty/serial/tegra-utc.c
371
burst_size -= readl(dev->port.membase + TEGRA_UTC_FIFO_OCCUPANCY);
drivers/tty/serial/uartlite.c
579
(readl(port->membase + ULITE_STATUS) & ULITE_STATUS_TXFULL))
drivers/tty/serial/vt8500_serial.c
119
return readl(port->membase + off);
drivers/tty/serial/xilinx_uartps.c
1003
writel(readl(port->membase + CDNS_UART_ISR),
drivers/tty/serial/xilinx_uartps.c
1041
status = readl(port->membase + CDNS_UART_IMR);
drivers/tty/serial/xilinx_uartps.c
1152
val = readl(port->membase + CDNS_UART_MODEMSR);
drivers/tty/serial/xilinx_uartps.c
1174
val = readl(port->membase + CDNS_UART_MODEMCR);
drivers/tty/serial/xilinx_uartps.c
1175
mode_reg = readl(port->membase + CDNS_UART_MR);
drivers/tty/serial/xilinx_uartps.c
1204
if (readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_RXEMPTY)
drivers/tty/serial/xilinx_uartps.c
1207
c = (unsigned char) readl(port->membase + CDNS_UART_FIFO);
drivers/tty/serial/xilinx_uartps.c
1221
while (!(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXEMPTY))
drivers/tty/serial/xilinx_uartps.c
1228
while (!(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXEMPTY))
drivers/tty/serial/xilinx_uartps.c
1287
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
1300
ctrl_reg = readl(port->membase + CDNS_UART_SR);
drivers/tty/serial/xilinx_uartps.c
1386
imr = readl(port->membase + CDNS_UART_IMR);
drivers/tty/serial/xilinx_uartps.c
1393
ctrl = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
1475
while (!(readl(port->membase + CDNS_UART_SR) &
drivers/tty/serial/xilinx_uartps.c
1477
readl(port->membase + CDNS_UART_FIFO);
drivers/tty/serial/xilinx_uartps.c
1523
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
1526
while (readl(port->membase + CDNS_UART_CR) &
drivers/tty/serial/xilinx_uartps.c
1533
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
1620
val = readl(port->membase + CDNS_UART_MODEMCR);
drivers/tty/serial/xilinx_uartps.c
248
while ((readl(port->membase + CDNS_UART_SR) &
drivers/tty/serial/xilinx_uartps.c
251
rxbs_status = readl(port->membase + CDNS_UART_RXBS);
drivers/tty/serial/xilinx_uartps.c
252
data = readl(port->membase + CDNS_UART_FIFO);
drivers/tty/serial/xilinx_uartps.c
336
val = readl(cdns_uart->port->membase + CDNS_UART_MODEMCR);
drivers/tty/serial/xilinx_uartps.c
383
status = readl(port->membase + CDNS_UART_SR);
drivers/tty/serial/xilinx_uartps.c
447
!(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXFULL) &&
drivers/tty/serial/xilinx_uartps.c
477
isrstatus = readl(port->membase + CDNS_UART_ISR);
drivers/tty/serial/xilinx_uartps.c
492
!(readl(port->membase + CDNS_UART_CR) & CDNS_UART_CR_RX_DIS))
drivers/tty/serial/xilinx_uartps.c
581
mreg = readl(port->membase + CDNS_UART_MR);
drivers/tty/serial/xilinx_uartps.c
635
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
662
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
666
while (readl(port->membase + CDNS_UART_CR) &
drivers/tty/serial/xilinx_uartps.c
676
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
721
status = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
756
regval = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
774
regval = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
792
status = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
824
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
845
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
849
while (readl(port->membase + CDNS_UART_CR) &
drivers/tty/serial/xilinx_uartps.c
857
ctrl_reg = readl(port->membase + CDNS_UART_CR);
drivers/tty/serial/xilinx_uartps.c
882
mode_reg = readl(port->membase + CDNS_UART_MR);
drivers/tty/serial/xilinx_uartps.c
925
cval = readl(port->membase + CDNS_UART_MODEMCR);
drivers/tty/serial/xilinx_uartps.c
967
while (readl(port->membase + CDNS_UART_CR) &
drivers/tty/serial/xilinx_uartps.c
978
status = readl(port->membase + CDNS_UART_CR);
drivers/tty/synclink_gt.c
3762
return readl(calc_regaddr(info, addr));
drivers/ufs/core/ufs-mcq.c
265
return readl(mcq_opr_base(hba, OPR_CQIS, i) + REG_CQIS);
drivers/ufs/core/ufs-mcq.c
494
err = read_poll_timeout(readl, val, val & SQ_STS, 20,
drivers/ufs/core/ufs-mcq.c
513
err = read_poll_timeout(readl, val, !(val & SQ_STS), 20,
drivers/ufs/core/ufs-mcq.c
564
writel(readl(opr_sqd_base + REG_SQRTC) | SQ_ICU,
drivers/ufs/core/ufs-mcq.c
569
err = read_poll_timeout(readl, val, val & SQ_CUS, 20,
drivers/ufs/core/ufs-mcq.c
578
FIELD_GET(SQ_ICU_ERR_CODE_MASK, readl(reg)));
drivers/ufs/core/ufshcd-priv.h
400
u32 val = readl(q->mcq_cq_tail);
drivers/ufs/core/ufshcd-priv.h
431
u32 val = readl(q->mcq_sq_head);
drivers/ufs/host/ufs-exynos.h
264
return readl(ufs->reg_##name + reg); \
drivers/ufs/host/ufs-hisi.h
95
#define ufs_sys_ctrl_readl(host, reg) readl((host)->ufs_sys_ctrl + (reg))
drivers/ufs/host/ufs-qcom.c
1903
regs[pos / 4] = readl(base + offset + pos);
drivers/ufs/host/ufs-qcom.c
2170
*ocqs = readl(hba->mcq_base + UFS_MEM_CQIS_VS);
drivers/ufs/host/ufs-qcom.c
883
readl(host->dev_ref_clk_ctrl_mmio);
drivers/ufs/host/ufs-rockchip.h
81
#define ufs_sys_readl(base, reg) readl((base) + (reg))
drivers/ufs/host/ufshcd-pci.c
229
host->active_ltr = readl(hba->mmio_base + INTEL_ACTIVELTR);
drivers/ufs/host/ufshcd-pci.c
230
host->idle_ltr = readl(hba->mmio_base + INTEL_IDLELTR);
drivers/ufs/host/ufshcd-pci.c
246
ltr = readl(hba->mmio_base + INTEL_ACTIVELTR);
drivers/usb/cdns3/cdns3-ep0.c
202
reg = readl(&priv_dev->regs->usb_cmd);
drivers/usb/cdns3/cdns3-ep0.c
258
if (EP_STS_STALL(readl(&priv_dev->regs->ep_sts)) ||
drivers/usb/cdns3/cdns3-ep0.c
600
ep_sts_reg = readl(&priv_dev->regs->ep_sts);
drivers/usb/cdns3/cdns3-ep0.c
616
ep_sts_reg = readl(&priv_dev->regs->ep_sts);
drivers/usb/cdns3/cdns3-ep0.c
63
readl(®s->ep_traddr));
drivers/usb/cdns3/cdns3-gadget.c
100
mask = readl(ptr) | mask;
drivers/usb/cdns3/cdns3-gadget.c
1087
readl(&priv_dev->regs->ep_traddr));
drivers/usb/cdns3/cdns3-gadget.c
1103
if (readl(&priv_dev->regs->ep_sts) & EP_STS_TRBERR) {
drivers/usb/cdns3/cdns3-gadget.c
1167
doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
drivers/usb/cdns3/cdns3-gadget.c
120
dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
drivers/usb/cdns3/cdns3-gadget.c
1332
u16 old_tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
drivers/usb/cdns3/cdns3-gadget.c
1412
readl(&priv_dev->regs->ep_traddr));
drivers/usb/cdns3/cdns3-gadget.c
1495
doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
drivers/usb/cdns3/cdns3-gadget.c
1668
readl(&priv_dev->regs->ep_traddr));
drivers/usb/cdns3/cdns3-gadget.c
1705
ep_sts_reg = readl(&priv_dev->regs->ep_sts);
drivers/usb/cdns3/cdns3-gadget.c
1755
u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
drivers/usb/cdns3/cdns3-gadget.c
182
return EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
drivers/usb/cdns3/cdns3-gadget.c
184
return readl(&priv_dev->regs->ep_tdl);
drivers/usb/cdns3/cdns3-gadget.c
1848
if (readl(&priv_dev->regs->drbl))
drivers/usb/cdns3/cdns3-gadget.c
1924
reg = readl(&priv_dev->regs->usb_ists);
drivers/usb/cdns3/cdns3-gadget.c
1933
reg = ~reg & readl(&priv_dev->regs->usb_ien);
drivers/usb/cdns3/cdns3-gadget.c
1940
reg = readl(&priv_dev->regs->ep_ists);
drivers/usb/cdns3/cdns3-gadget.c
1969
reg = readl(&priv_dev->regs->usb_ists);
drivers/usb/cdns3/cdns3-gadget.c
1977
reg = readl(&priv_dev->regs->ep_ists);
drivers/usb/cdns3/cdns3-gadget.c
2474
reg = readl(&priv_dev->regs->ep_sts);
drivers/usb/cdns3/cdns3-gadget.c
2520
ep_cfg = readl(&priv_dev->regs->ep_cfg);
drivers/usb/cdns3/cdns3-gadget.c
2773
u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
drivers/usb/cdns3/cdns3-gadget.c
2886
return readl(&priv_dev->regs->usb_itpn);
drivers/usb/cdns3/cdns3-gadget.c
2958
reg = readl(®s->dbg_link1);
drivers/usb/cdns3/cdns3-gadget.c
2971
reg = readl(®s->dma_axi_ctrl);
drivers/usb/cdns3/cdns3-gadget.c
3165
ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
drivers/usb/cdns3/cdns3-gadget.c
3166
iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
drivers/usb/cdns3/cdns3-gadget.c
3308
u32 reg = readl(&priv_dev->regs->usb_cap2);
drivers/usb/cdns3/cdns3-gadget.c
3375
priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
drivers/usb/cdns3/cdns3-gadget.c
3378
readl(&priv_dev->regs->usb_cap6));
drivers/usb/cdns3/cdns3-gadget.c
3380
readl(&priv_dev->regs->usb_cap1));
drivers/usb/cdns3/cdns3-gadget.c
3382
readl(&priv_dev->regs->usb_cap2));
drivers/usb/cdns3/cdns3-gadget.c
363
reg = readl(&priv_dev->regs->usb_sts);
drivers/usb/cdns3/cdns3-gadget.c
564
reg = readl(&priv_dev->regs->ep_sts_en);
drivers/usb/cdns3/cdns3-gadget.c
712
u16 tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
drivers/usb/cdns3/cdns3-gadget.c
729
ep_sts_reg = readl(&priv_dev->regs->ep_sts);
drivers/usb/cdns3/cdns3-gadget.c
748
ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en);
drivers/usb/cdns3/cdns3-gadget.c
749
ep_cmd_reg = readl(&priv_dev->regs->ep_cmd);
drivers/usb/cdns3/cdns3-gadget.c
89
mask = readl(ptr) & ~mask;
drivers/usb/cdns3/cdns3-gadget.c
964
doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
drivers/usb/cdns3/cdns3-gadget.c
984
doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
drivers/usb/cdns3/cdns3-imx.c
264
value = readl(xhci_regs + XECP_PM_PMCSR);
drivers/usb/cdns3/cdns3-imx.c
303
value = readl(xhci_regs + XECP_PM_PMCSR);
drivers/usb/cdns3/cdns3-imx.c
309
value = readl(xhci_regs + XECP_AUX_CTRL_REG1);
drivers/usb/cdns3/cdns3-imx.c
335
value = readl(otg_regs + OTGSTS);
drivers/usb/cdns3/cdns3-imx.c
99
return readl(data->noncore + offset);
drivers/usb/cdns3/cdns3-ti.c
82
return readl(data->usbss + offset);
drivers/usb/cdns3/cdns3-trace.h
129
__entry->ep_sts = readl(&priv_dev->regs->ep_sts);
drivers/usb/cdns3/cdns3-trace.h
130
__entry->ep_traddr = readl(&priv_dev->regs->ep_traddr);
drivers/usb/cdns3/cdnsp-ep0.c
197
temp = readl(&pdev->active_port->regs->portpmsc) & ~GENMASK(31, 28);
drivers/usb/cdns3/cdnsp-gadget.c
110
temp = readl(port_regs);
drivers/usb/cdns3/cdnsp-gadget.c
121
trace_cdnsp_handle_port_status(port_num, readl(port_regs));
drivers/usb/cdns3/cdnsp-gadget.c
123
trace_cdnsp_link_state_changed(port_num, readl(port_regs));
drivers/usb/cdns3/cdnsp-gadget.c
1284
temp = readl(&pdev->ir_set->irq_control);
drivers/usb/cdns3/cdnsp-gadget.c
1289
temp = readl(&pdev->port3x_regs->mode_addr);
drivers/usb/cdns3/cdnsp-gadget.c
129
u32 temp = cdnsp_port_state_to_neutral(readl(port_regs));
drivers/usb/cdns3/cdnsp-gadget.c
1334
temp = readl(&pdev->op_regs->command);
drivers/usb/cdns3/cdnsp-gadget.c
1338
temp = readl(&pdev->ir_set->irq_pending);
drivers/usb/cdns3/cdnsp-gadget.c
137
u32 portsc = readl(port_regs);
drivers/usb/cdns3/cdnsp-gadget.c
1477
temp = readl(&pdev->op_regs->status);
drivers/usb/cdns3/cdnsp-gadget.c
1479
temp = readl(&pdev->ir_set->irq_pending);
drivers/usb/cdns3/cdnsp-gadget.c
1486
temp = readl(&pdev->ir_set->irq_pending);
drivers/usb/cdns3/cdnsp-gadget.c
1527
portsc = readl(&port_regs->portsc) & PORT_PLS_MASK;
drivers/usb/cdns3/cdnsp-gadget.c
1531
portpm = readl(&port_regs->portpmsc);
drivers/usb/cdns3/cdnsp-gadget.c
158
val = le32_to_cpu(readl(reg));
drivers/usb/cdns3/cdnsp-gadget.c
1616
pep->buffering = readl(reg + XBUF_RX_TAG_MASK_0_OFFSET);
drivers/usb/cdns3/cdnsp-gadget.c
1617
pep->buffering_period = readl(reg + XBUF_RX_TAG_MASK_1_OFFSET);
drivers/usb/cdns3/cdnsp-gadget.c
1630
pep->buffering = (readl(reg) + 1) / 2;
drivers/usb/cdns3/cdnsp-gadget.c
173
bit = readl(reg) | bit;
drivers/usb/cdns3/cdnsp-gadget.c
1778
pdev->gadget.speed = cdnsp_port_speed(readl(port_regs));
drivers/usb/cdns3/cdnsp-gadget.c
1813
pdev->rtl_revision = readl(&pdev->rev_cap->rtl_revision);
drivers/usb/cdns3/cdnsp-gadget.c
1816
readl(&pdev->rev_cap->ctrl_revision),
drivers/usb/cdns3/cdnsp-gadget.c
1817
readl(&pdev->rev_cap->rtl_revision),
drivers/usb/cdns3/cdnsp-gadget.c
1818
readl(&pdev->rev_cap->ep_supported),
drivers/usb/cdns3/cdnsp-gadget.c
1819
readl(&pdev->rev_cap->rx_buff_size),
drivers/usb/cdns3/cdnsp-gadget.c
1820
readl(&pdev->rev_cap->tx_buff_size));
drivers/usb/cdns3/cdnsp-gadget.c
1830
HC_LENGTH(readl(&pdev->cap_regs->hc_capbase));
drivers/usb/cdns3/cdnsp-gadget.c
1832
(readl(&pdev->cap_regs->run_regs_off) & RTSOFF_MASK);
drivers/usb/cdns3/cdnsp-gadget.c
1835
pdev->hcs_params1 = readl(&pdev->cap_regs->hcs_params1);
drivers/usb/cdns3/cdnsp-gadget.c
1836
pdev->hcc_params = readl(&pdev->cap_regs->hc_capbase);
drivers/usb/cdns3/cdnsp-gadget.c
1838
pdev->hcc_params = readl(&pdev->cap_regs->hcc_params);
drivers/usb/cdns3/cdnsp-gadget.c
187
bit = readl(reg) & ~bit;
drivers/usb/cdns3/cdnsp-gadget.c
1893
reg = readl(&pdev->port3x_regs->mode_2);
drivers/usb/cdns3/cdnsp-gadget.c
202
halted = readl(&pdev->op_regs->status) & STS_HALT;
drivers/usb/cdns3/cdnsp-gadget.c
206
cmd = readl(&pdev->op_regs->command);
drivers/usb/cdns3/cdnsp-gadget.c
259
temp = readl(&pdev->op_regs->command);
drivers/usb/cdns3/cdnsp-gadget.c
293
temp = readl(&pdev->op_regs->status);
drivers/usb/cdns3/cdnsp-gadget.c
305
command = readl(&pdev->op_regs->command);
drivers/usb/cdns3/cdnsp-gadget.c
79
val = readl(base + HCC_PARAMS_OFFSET);
drivers/usb/cdns3/cdnsp-gadget.c
89
val = readl(base + offset);
drivers/usb/cdns3/cdnsp-gadget.c
961
return readl(&pdev->run_regs->microframe_index) >> 3;
drivers/usb/cdns3/cdnsp-gadget.h
501
(readl(&(pdev)->rev_cap->ep_supported) & \
drivers/usb/cdns3/cdnsp-mem.c
1127
temp = readl(addr);
drivers/usb/cdns3/cdnsp-mem.c
1132
temp = readl(addr + 2);
drivers/usb/cdns3/cdnsp-mem.c
1169
temp = readl(base + offset);
drivers/usb/cdns3/cdnsp-mem.c
1222
val = readl(&pdev->op_regs->config_reg);
drivers/usb/cdns3/cdnsp-mem.c
1271
val = readl(&pdev->cap_regs->db_off);
drivers/usb/cdns3/cdnsp-mem.c
1292
val = readl(&pdev->ir_set->erst_size);
drivers/usb/cdns3/cdnsp-ring.c
1578
status = readl(&pdev->op_regs->status);
drivers/usb/cdns3/cdnsp-ring.c
1589
irq_pending = readl(&pdev->ir_set->irq_pending);
drivers/usb/cdns3/cdnsp-ring.c
815
portsc = readl(&port_regs->portsc);
drivers/usb/cdns3/cdnsp-ring.c
828
cmd_regs = readl(&pdev->op_regs->command);
drivers/usb/cdns3/cdnsp-ring.c
887
if (readl(&port_regs->portsc) & PORT_CHANGE_BITS)
drivers/usb/cdns3/drd.c
100
vbus = !!(readl(&cdns->otg_regs->sts) & OTGSTS_VBUS_VALID);
drivers/usb/cdns3/drd.c
113
reg = readl(&cdns->otg_cdnsp_regs->override);
drivers/usb/cdns3/drd.c
126
reg = readl(&cdns->otg_cdnsp_regs->override);
drivers/usb/cdns3/drd.c
366
reg = readl(&cdns->otg_irq_regs->ivect);
drivers/usb/cdns3/drd.c
409
if (!readl(&cdns->otg_v0_regs->cmd)) {
drivers/usb/cdns3/drd.c
418
readl(&cdns->otg_v0_regs->version));
drivers/usb/cdns3/drd.c
426
state = readl(&cdns->otg_cdnsp_regs->did);
drivers/usb/cdns3/drd.c
439
reg = readl(&cdns->otg_v1_regs->susp_ctrl);
drivers/usb/cdns3/drd.c
451
readl(&cdns->otg_v1_regs->did),
drivers/usb/cdns3/drd.c
452
readl(&cdns->otg_v1_regs->rid));
drivers/usb/cdns3/drd.c
455
state = OTGSTS_STRAP(readl(&cdns->otg_regs->sts));
drivers/usb/cdns3/drd.c
48
reg = readl(override_reg);
drivers/usb/cdns3/drd.c
484
state = readl(&cdns->otg_regs->sts);
drivers/usb/cdns3/drd.c
504
if (!(readl(&cdns->otg_v0_regs->simulate) & BIT(0)))
drivers/usb/cdns3/drd.c
507
if (!(readl(&cdns->otg_v1_regs->simulate) & BIT(0)))
drivers/usb/cdns3/drd.c
65
reg = readl(&cdns->otg_v1_regs->phyrst_cfg);
drivers/usb/cdns3/drd.c
90
id = readl(&cdns->otg_regs->sts) & OTGSTS_ID_VALUE;
drivers/usb/cdns3/host.c
38
value = readl(&xhci->op_regs->command);
drivers/usb/cdns3/host.c
43
value = readl(hcd->regs + XECP_AUX_CTRL_REG1);
drivers/usb/cdns3/host.c
47
value = readl(hcd->regs + XECP_PORT_CAP_REG);
drivers/usb/chipidea/usbmisc_imx.c
1011
reg = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
1033
reg = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
1037
reg = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
1040
reg = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
drivers/usb/chipidea/usbmisc_imx.c
1048
reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
drivers/usb/chipidea/usbmisc_imx.c
1052
reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
drivers/usb/chipidea/usbmisc_imx.c
1075
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
drivers/usb/chipidea/usbmisc_imx.c
1100
val = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
1119
val = readl(usbmisc->base + data->index * 4);
drivers/usb/chipidea/usbmisc_imx.c
1162
val = readl(usbmisc->blkctl + BLKCTL_USB_WAKEUP_CTRL);
drivers/usb/chipidea/usbmisc_imx.c
213
val = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
228
val = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
265
val = readl(reg);
drivers/usb/chipidea/usbmisc_imx.c
301
val = readl(usbmisc->base) | val;
drivers/usb/chipidea/usbmisc_imx.c
303
val = readl(usbmisc->base) & ~val;
drivers/usb/chipidea/usbmisc_imx.c
321
val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
drivers/usb/chipidea/usbmisc_imx.c
332
val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
drivers/usb/chipidea/usbmisc_imx.c
339
val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
drivers/usb/chipidea/usbmisc_imx.c
347
val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN;
drivers/usb/chipidea/usbmisc_imx.c
354
val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
drivers/usb/chipidea/usbmisc_imx.c
361
val = readl(reg) |
drivers/usb/chipidea/usbmisc_imx.c
369
val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
drivers/usb/chipidea/usbmisc_imx.c
377
val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN;
drivers/usb/chipidea/usbmisc_imx.c
384
val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
drivers/usb/chipidea/usbmisc_imx.c
392
val = readl(reg) |
drivers/usb/chipidea/usbmisc_imx.c
399
val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
drivers/usb/chipidea/usbmisc_imx.c
435
val = readl(usbmisc->base + data->index * 4);
drivers/usb/chipidea/usbmisc_imx.c
461
reg = readl(usbmisc->base + data->index * 4);
drivers/usb/chipidea/usbmisc_imx.c
482
reg = readl(usbmisc->base + data->index * 4);
drivers/usb/chipidea/usbmisc_imx.c
488
reg = readl(usbmisc->base + data->index * 4);
drivers/usb/chipidea/usbmisc_imx.c
491
reg = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET
drivers/usb/chipidea/usbmisc_imx.c
540
val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
drivers/usb/chipidea/usbmisc_imx.c
564
val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
drivers/usb/chipidea/usbmisc_imx.c
591
val = readl(reg);
drivers/usb/chipidea/usbmisc_imx.c
597
val = readl(usbmisc->base + data->index * 4);
drivers/usb/chipidea/usbmisc_imx.c
605
val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
drivers/usb/chipidea/usbmisc_imx.c
626
reg = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
641
reg = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
661
reg = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
692
val = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
717
reg = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
738
reg = readl(usbmisc->base);
drivers/usb/chipidea/usbmisc_imx.c
742
reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
drivers/usb/chipidea/usbmisc_imx.c
748
reg = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG1);
drivers/usb/chipidea/usbmisc_imx.c
789
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
drivers/usb/chipidea/usbmisc_imx.c
799
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
drivers/usb/chipidea/usbmisc_imx.c
814
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
drivers/usb/chipidea/usbmisc_imx.c
833
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
drivers/usb/chipidea/usbmisc_imx.c
841
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
drivers/usb/chipidea/usbmisc_imx.c
845
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
drivers/usb/chipidea/usbmisc_imx.c
860
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
drivers/usb/chipidea/usbmisc_imx.c
866
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
drivers/usb/chipidea/usbmisc_imx.c
880
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
drivers/usb/chipidea/usbmisc_imx.c
903
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
drivers/usb/chipidea/usbmisc_imx.c
914
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
drivers/usb/chipidea/usbmisc_imx.c
940
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
drivers/usb/chipidea/usbmisc_imx.c
951
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
drivers/usb/chipidea/usbmisc_imx.c
956
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
drivers/usb/chipidea/usbmisc_imx.c
991
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
drivers/usb/dwc2/core.c
1207
otgctl = readl(hsotg->regs + GOTGCTL);
drivers/usb/dwc2/core.h
1235
val = readl(hsotg->regs + offset);
drivers/usb/dwc3/core.c
2132
val = readl(base + offset);
drivers/usb/dwc3/core.c
2135
val = readl(base + offset + 0x08);
drivers/usb/dwc3/dwc3-am62.c
144
return readl((am62->usbss) + offset);
drivers/usb/dwc3/dwc3-am62.c
196
reg = readl(am62->phy_regs + USB_PHY_PLL_REG12);
drivers/usb/dwc3/dwc3-apple.c
137
return readl(appledwc->apple_regs + offset - APPLE_DWC3_REGS_START);
drivers/usb/dwc3/dwc3-imx8mp.c
109
val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
drivers/usb/dwc3/dwc3-imx8mp.c
127
val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
drivers/usb/dwc3/dwc3-imx8mp.c
72
value = readl(dwc3_imx->glue_base + USB_CTRL0);
drivers/usb/dwc3/dwc3-imx8mp.c
86
value = readl(dwc3_imx->glue_base + USB_CTRL1);
drivers/usb/dwc3/dwc3-keystone.c
44
return readl(base + offset);
drivers/usb/dwc3/dwc3-omap.c
143
return readl(base + offset);
drivers/usb/dwc3/dwc3-pci.c
120
value = readl(reg + GP_RWREG1);
drivers/usb/dwc3/dwc3-qcom-legacy.c
104
readl(base + offset);
drivers/usb/dwc3/dwc3-qcom-legacy.c
111
reg = readl(base + offset);
drivers/usb/dwc3/dwc3-qcom-legacy.c
116
readl(base + offset);
drivers/usb/dwc3/dwc3-qcom-legacy.c
435
val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]);
drivers/usb/dwc3/dwc3-qcom-legacy.c
99
reg = readl(base + offset);
drivers/usb/dwc3/dwc3-qcom.c
101
readl(base + offset);
drivers/usb/dwc3/dwc3-qcom.c
108
reg = readl(base + offset);
drivers/usb/dwc3/dwc3-qcom.c
113
readl(base + offset);
drivers/usb/dwc3/dwc3-qcom.c
347
val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]);
drivers/usb/dwc3/dwc3-qcom.c
96
reg = readl(base + offset);
drivers/usb/dwc3/dwc3-rtk.c
210
val = readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
217
val = readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
223
val = readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
230
val = readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
234
val = readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
238
val = ~CLOCK_ENABLE_FOR_PIPE3_PCLK & readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
242
val = readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
246
val = readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
254
val = readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
259
val = ~USB2_PHY_SWITCH_MASK & readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
264
val = DBUS_PWR_CTRL_EN | readl(reg);
drivers/usb/dwc3/dwc3-rtk.c
71
val = ~USB2_PHY_SWITCH_MASK & readl(reg);
drivers/usb/dwc3/dwc3-xilinx.c
62
reg = readl(priv_data->regs + XLNX_USB_PHY_RST_EN);
drivers/usb/dwc3/dwc3-xilinx.c
83
reg = readl(priv_data->regs + coherency_offset);
drivers/usb/dwc3/host.c
49
op_regs_base = HC_LENGTH(readl(xhci_regs));
drivers/usb/dwc3/host.c
50
reg = readl(xhci_regs + XHCI_HCSPARAMS1);
drivers/usb/dwc3/host.c
55
reg = readl(xhci_regs + offset);
drivers/usb/dwc3/io.h
29
value = readl(base + offset - DWC3_GLOBALS_REGS_START);
drivers/usb/early/ehci-dbgp.c
1067
while (readl(&ehci_debug->control) & DBGP_ENABLED) {
drivers/usb/early/ehci-dbgp.c
203
pids = readl(&ehci_debug->pids);
drivers/usb/early/ehci-dbgp.c
257
lo = readl(&ehci_debug->data03);
drivers/usb/early/ehci-dbgp.c
258
hi = readl(&ehci_debug->data47);
drivers/usb/early/ehci-dbgp.c
277
pids = readl(&ehci_debug->pids);
drivers/usb/early/ehci-dbgp.c
280
ctrl = readl(&ehci_debug->control);
drivers/usb/early/ehci-dbgp.c
304
pids = readl(&ehci_debug->pids);
drivers/usb/early/ehci-dbgp.c
307
ctrl = readl(&ehci_debug->control);
drivers/usb/early/ehci-dbgp.c
346
ctrl = readl(&ehci_debug->control);
drivers/usb/early/ehci-dbgp.c
432
ctrl = readl(&ehci_debug->control);
drivers/usb/early/ehci-dbgp.c
440
cmd = readl(&ehci_regs->command);
drivers/usb/early/ehci-dbgp.c
451
status = readl(&ehci_regs->status);
drivers/usb/early/ehci-dbgp.c
471
cmd = readl(&ehci_regs->command);
drivers/usb/early/ehci-dbgp.c
475
cmd = readl(&ehci_regs->command);
drivers/usb/early/ehci-dbgp.c
509
portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
drivers/usb/early/ehci-dbgp.c
515
cmd = readl(&ehci_regs->command);
drivers/usb/early/ehci-dbgp.c
518
portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
drivers/usb/early/ehci-dbgp.c
534
ctrl = readl(&ehci_debug->control);
drivers/usb/early/ehci-dbgp.c
537
ctrl = readl(&ehci_debug->control);
drivers/usb/early/ehci-dbgp.c
546
portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
drivers/usb/early/ehci-dbgp.c
616
portsc = readl(&ehci_regs->port_status[port - 1]);
drivers/usb/early/ehci-dbgp.c
625
portsc = readl(&ehci_regs->port_status[port - 1]);
drivers/usb/early/ehci-dbgp.c
636
portsc = readl(&ehci_regs->port_status[port-1]);
drivers/usb/early/ehci-dbgp.c
660
status = readl(&ehci_regs->status);
drivers/usb/early/ehci-dbgp.c
711
u32 hcc_params = readl(&ehci_caps->hcc_params);
drivers/usb/early/ehci-dbgp.c
766
hcs_params = readl(&ehci_caps->hcs_params);
drivers/usb/early/ehci-dbgp.c
776
portsc = readl(&ehci_regs->port_status[i-1]);
drivers/usb/early/ehci-dbgp.c
790
if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
drivers/usb/early/ehci-dbgp.c
803
ctrl = readl(&ehci_debug->control);
drivers/usb/early/ehci-dbgp.c
82
dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control));
drivers/usb/early/ehci-dbgp.c
83
dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command));
drivers/usb/early/ehci-dbgp.c
85
readl(&ehci_regs->configured_flag));
drivers/usb/early/ehci-dbgp.c
86
dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status));
drivers/usb/early/ehci-dbgp.c
88
readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
drivers/usb/early/ehci-dbgp.c
888
ehci_regs = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase));
drivers/usb/early/ehci-dbgp.c
919
cmd = readl(&ehci_regs->command);
drivers/usb/early/ehci-dbgp.c
924
ctrl = readl(&ehci_debug->control);
drivers/usb/early/ehci-dbgp.c
954
cmd = readl(&ehci_regs->command);
drivers/usb/early/ehci-dbgp.c
987
ctrl = readl(&ehci_debug->control);
drivers/usb/early/xhci-dbc.c
140
result = readl(ptr);
drivers/usb/early/xhci-dbc.c
157
val = readl(xdbc.xhci_base + offset);
drivers/usb/early/xhci-dbc.c
170
val = readl(xdbc.xhci_base + offset + XHCI_LEGACY_CONTROL_OFFSET);
drivers/usb/early/xhci-dbc.c
321
max_burst = DEBUG_MAX_BURST(readl(&xdbc.xdbc_reg->control));
drivers/usb/early/xhci-dbc.c
355
cap_length = readl(xdbc.xhci_base) & 0xff;
drivers/usb/early/xhci-dbc.c
361
val = readl(portsc);
drivers/usb/early/xhci-dbc.c
377
val = readl(xdbc.xhci_base + offset);
drivers/usb/early/xhci-dbc.c
381
val = readl(xdbc.xhci_base + offset + 8);
drivers/usb/early/xhci-dbc.c
423
ctrl = readl(&xdbc.xdbc_reg->control);
drivers/usb/early/xhci-dbc.c
450
status = readl(&xdbc.xdbc_reg->status);
drivers/usb/early/xhci-dbc.c
459
readl(&xdbc.xdbc_reg->control), xdbc.port_number);
drivers/usb/early/xhci-dbc.c
697
port_reg = readl(&xdbc.xdbc_reg->portsc);
drivers/usb/early/xhci-dbc.c
774
reg = readl(&xdbc.xdbc_reg->control);
drivers/usb/early/xhci-dbc.c
783
reg = readl(&xdbc.xdbc_reg->control);
drivers/usb/early/xhci-dbc.c
793
reg = readl(&xdbc.xdbc_reg->control);
drivers/usb/fotg210/fotg210-core.c
156
val = readl(fotg->base + FOTG210_RR);
drivers/usb/fotg210/fotg210-hcd.h
613
return (readl(&fotg210->regs->otgcsr)
drivers/usb/fotg210/fotg210-hcd.h
653
return readl(regs);
drivers/usb/gadget/udc/aspeed-vhub/core.c
107
istat = readl(vhub->regs + AST_VHUB_ISR);
drivers/usb/gadget/udc/aspeed-vhub/core.c
115
readl(vhub->regs + AST_VHUB_EP_ACK_ISR),
drivers/usb/gadget/udc/aspeed-vhub/core.c
116
readl(vhub->regs + AST_VHUB_EP_NACK_ISR));
drivers/usb/gadget/udc/aspeed-vhub/core.c
120
u32 ep_acks = readl(vhub->regs + AST_VHUB_EP_ACK_ISR);
drivers/usb/gadget/udc/aspeed-vhub/dev.c
123
val = readl(d->vhub->regs + AST_VHUB_CTRL);
drivers/usb/gadget/udc/aspeed-vhub/dev.c
211
reg = readl(d->regs + AST_VHUB_DEV_EN_CTRL);
drivers/usb/gadget/udc/aspeed-vhub/dev.c
300
return (readl(d->vhub->regs + AST_VHUB_USBSTS) >> 16) & 0x7ff;
drivers/usb/gadget/udc/aspeed-vhub/dev.c
33
u32 istat = readl(d->regs + AST_VHUB_DEV_ISR);
drivers/usb/gadget/udc/aspeed-vhub/dev.c
66
reg = readl(d->vhub->regs + AST_VHUB_IER);
drivers/usb/gadget/udc/aspeed-vhub/dev.c
98
reg = readl(d->vhub->regs + AST_VHUB_IER);
drivers/usb/gadget/udc/aspeed-vhub/ep0.c
282
stat = readl(ep->ep0.ctlstat);
drivers/usb/gadget/udc/aspeed-vhub/epn.c
245
ep->epn.d_next, readl(ep->epn.regs + AST_VHUB_EP_DESC_STATUS));
drivers/usb/gadget/udc/aspeed-vhub/epn.c
256
stat = readl(ep->epn.regs + AST_VHUB_EP_DESC_STATUS);
drivers/usb/gadget/udc/aspeed-vhub/epn.c
257
stat1 = readl(ep->epn.regs + AST_VHUB_EP_DESC_STATUS);
drivers/usb/gadget/udc/aspeed-vhub/epn.c
432
state = readl(ep->epn.regs + AST_VHUB_EP_DMA_CTLSTAT);
drivers/usb/gadget/udc/aspeed-vhub/epn.c
509
reg = readl(ep->epn.regs + AST_VHUB_EP_CONFIG);
drivers/usb/gadget/udc/aspeed-vhub/epn.c
584
ep_ier = readl(vhub->regs + AST_VHUB_EP_ACK_IER);
drivers/usb/gadget/udc/aspeed-vhub/epn.c
748
ep_ier = readl(vhub->regs + AST_VHUB_EP_ACK_IER);
drivers/usb/gadget/udc/aspeed-vhub/epn.c
90
stat = readl(ep->epn.regs + AST_VHUB_EP_DESC_STATUS);
drivers/usb/gadget/udc/aspeed-vhub/hub.c
228
val = readl(ep->vhub->regs + AST_VHUB_CTRL);
drivers/usb/gadget/udc/aspeed-vhub/hub.c
261
reg = readl(ep->vhub->regs + AST_VHUB_EP1_CTRL);
drivers/usb/gadget/udc/aspeed-vhub/hub.c
413
u32 ustat = readl(vhub->regs + AST_VHUB_USBSTS);
drivers/usb/gadget/udc/aspeed-vhub/hub.c
485
u32 reg = readl(vhub->regs + AST_VHUB_EP1_STS_CHG);
drivers/usb/gadget/udc/aspeed-vhub/hub.c
535
u32 reg = readl(vhub->regs + AST_VHUB_CTRL);
drivers/usb/gadget/udc/aspeed_udc.c
270
readl((udc)->reg + (offset))
drivers/usb/gadget/udc/aspeed_udc.c
275
readl((ep)->ep_reg + (reg))
drivers/usb/gadget/udc/bdc/bdc.h
460
return readl(base + offset);
drivers/usb/gadget/udc/cdns2/cdns2-ep0.c
485
ep_sts_reg = readl(&pdev->adma_regs->ep_sts);
drivers/usb/gadget/udc/cdns2/cdns2-ep0.c
74
trace_cdns2_doorbell_ep0(pep, readl(®s->ep_traddr));
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
1069
readl(&pdev->adma_regs->ep_traddr));
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
1084
ep_sts_reg = readl(&pdev->adma_regs->ep_sts);
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
1195
reg_ep_ists = readl(&pdev->adma_regs->ep_ists);
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
1301
dma_ep_ists = readl(&pdev->adma_regs->ep_ists);
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
1597
reg = readl(&pdev->adma_regs->ep_sts);
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
289
doorbell = !!(readl(&pdev->adma_regs->ep_cmd) & DMA_EP_CMD_DRDY);
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
309
doorbell = !!(readl(&pdev->adma_regs->ep_cmd) & DMA_EP_CMD_DRDY);
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
334
doorbell = !!(readl(&pdev->adma_regs->ep_cmd) & DMA_EP_CMD_DRDY);
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
46
mask = readl(ptr) | mask;
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
57
mask = readl(ptr) & ~mask;
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
704
if (readl(&pdev->adma_regs->ep_sts) & DMA_EP_STS_TRBERR) {
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
709
trace_cdns2_doorbell_epx(pep, readl(&pdev->adma_regs->ep_traddr));
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
719
if ((readl(&pdev->adma_regs->ep_cmd) & DMA_EP_CMD_DRDY))
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
734
hw_ccs = !!DMA_EP_STS_CCS(readl(&pdev->adma_regs->ep_sts));
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
80
dma_index = readl(&pdev->adma_regs->ep_traddr) - pep->ring.dma;
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
891
doorbell = !!(readl(&pdev->adma_regs->ep_cmd) & DMA_EP_CMD_DRDY);
drivers/usb/gadget/udc/cdns2/cdns2-trace.h
185
__entry->ep_sts = readl(&pdev->adma_regs->ep_sts);
drivers/usb/gadget/udc/cdns2/cdns2-trace.h
186
__entry->ep_ists = readl(&pdev->adma_regs->ep_ists);
drivers/usb/gadget/udc/cdns2/cdns2-trace.h
187
__entry->ep_traddr = readl(&pdev->adma_regs->ep_traddr);
drivers/usb/gadget/udc/cdns2/cdns2-trace.h
211
__entry->ep_ists = readl(&pdev->adma_regs->ep_ists);
drivers/usb/gadget/udc/cdns2/cdns2-trace.h
212
__entry->ep_sts = readl(&pdev->adma_regs->ep_sts);
drivers/usb/gadget/udc/cdns2/cdns2-trace.h
508
__entry->ep_sel_reg = readl(&pdev->adma_regs->ep_sel);
drivers/usb/gadget/udc/cdns2/cdns2-trace.h
509
__entry->ep_sts_en_reg = readl(&pdev->adma_regs->ep_sts_en);
drivers/usb/gadget/udc/cdns2/cdns2-trace.h
510
__entry->ep_cfg_reg = readl(&pdev->adma_regs->ep_cfg);
drivers/usb/gadget/udc/fsl_udc_core.c
141
#define fsl_readl(addr) readl(addr)
drivers/usb/gadget/udc/goku_udc.c
1148
tmp = readl(®s->power_detect);
drivers/usb/gadget/udc/goku_udc.c
1164
dump_intmask(m, "int_status", readl(®s->int_status));
drivers/usb/gadget/udc/goku_udc.c
1165
dump_intmask(m, "int_enable", readl(®s->int_enable));
drivers/usb/gadget/udc/goku_udc.c
1172
dev->irqs, readl(®s->DataSet),
drivers/usb/gadget/udc/goku_udc.c
1173
readl(®s->EPxSingle), readl(®s->EPxBCS),
drivers/usb/gadget/udc/goku_udc.c
1174
readl(®s->UsbState),
drivers/usb/gadget/udc/goku_udc.c
1175
readl(®s->address));
drivers/usb/gadget/udc/goku_udc.c
1179
tmp = readl(®s->dma_master);
drivers/usb/gadget/udc/goku_udc.c
119
if ((readl(ep->reg_status) & EPxSTATUS_EP_MASK)
drivers/usb/gadget/udc/goku_udc.c
1205
tmp = readl(ep->reg_status);
drivers/usb/gadget/udc/goku_udc.c
1229
tmp = readl(®s->in_dma_current);
drivers/usb/gadget/udc/goku_udc.c
1231
tmp = readl(®s->out_dma_current);
drivers/usb/gadget/udc/goku_udc.c
1301
readl(®s->int_enable);
drivers/usb/gadget/udc/goku_udc.c
1309
readl(®s->int_enable);
drivers/usb/gadget/udc/goku_udc.c
1342
readl(®s->int_enable);
drivers/usb/gadget/udc/goku_udc.c
1350
if (readl(&dev->regs->power_detect) & PW_DETECT)
drivers/usb/gadget/udc/goku_udc.c
1426
ctrl.bRequestType = readl(®s->bRequestType);
drivers/usb/gadget/udc/goku_udc.c
1427
ctrl.bRequest = readl(®s->bRequest);
drivers/usb/gadget/udc/goku_udc.c
1428
ctrl.wValue = cpu_to_le16((readl(®s->wValueH) << 8)
drivers/usb/gadget/udc/goku_udc.c
1429
| readl(®s->wValueL));
drivers/usb/gadget/udc/goku_udc.c
1430
ctrl.wIndex = cpu_to_le16((readl(®s->wIndexH) << 8)
drivers/usb/gadget/udc/goku_udc.c
1431
| readl(®s->wIndexL));
drivers/usb/gadget/udc/goku_udc.c
1432
ctrl.wLength = cpu_to_le16((readl(®s->wLengthH) << 8)
drivers/usb/gadget/udc/goku_udc.c
1433
| readl(®s->wLengthL));
drivers/usb/gadget/udc/goku_udc.c
1546
stat = readl(®s->int_status) & dev->int_enable;
drivers/usb/gadget/udc/goku_udc.c
1564
if (readl(&dev->regs->power_detect) & PW_DETECT) {
drivers/usb/gadget/udc/goku_udc.c
1581
if (readl(®s->ep_status[0]) & EPxSTATUS_SUSPEND) {
drivers/usb/gadget/udc/goku_udc.c
1689
(void)readl(®s->int_enable);
drivers/usb/gadget/udc/goku_udc.c
1693
readl(®s->int_status), dev->int_enable);
drivers/usb/gadget/udc/goku_udc.c
170
tmp |= readl(®s->EPxSingle);
drivers/usb/gadget/udc/goku_udc.c
174
tmp |= readl(®s->EPxBCS);
drivers/usb/gadget/udc/goku_udc.c
208
readl(®s->int_enable);
drivers/usb/gadget/udc/goku_udc.c
213
tmp = readl(&r->EPxSingle);
drivers/usb/gadget/udc/goku_udc.c
217
tmp = readl(&r->EPxBCS);
drivers/usb/gadget/udc/goku_udc.c
225
master = readl(®s->dma_master) & MST_RW_BITS;
drivers/usb/gadget/udc/goku_udc.c
357
tmp = readl(&dev->regs->DataSet);
drivers/usb/gadget/udc/goku_udc.c
429
set = readl(®s->DataSet) & DATASET_AB(ep->num);
drivers/usb/gadget/udc/goku_udc.c
430
size = readl(®s->EPxSizeLA[ep->num]);
drivers/usb/gadget/udc/goku_udc.c
439
size = readl(®s->EPxSizeLB[ep->num]);
drivers/usb/gadget/udc/goku_udc.c
457
u8 byte = (u8) readl(ep->reg_fifo);
drivers/usb/gadget/udc/goku_udc.c
542
master = readl(®s->dma_master) & MST_RW_BITS;
drivers/usb/gadget/udc/goku_udc.c
596
master = readl(®s->dma_master);
drivers/usb/gadget/udc/goku_udc.c
613
req->req.actual = readl(®s->in_dma_current);
drivers/usb/gadget/udc/goku_udc.c
621
req->req.actual = readl(®s->out_dma_current);
drivers/usb/gadget/udc/goku_udc.c
653
master = readl(®s->dma_master) & MST_RW_BITS;
drivers/usb/gadget/udc/goku_udc.c
661
if (unlikely((readl(®s->dma_master) & MST_RD_ENA) == 0))
drivers/usb/gadget/udc/goku_udc.c
663
curr = readl(®s->in_dma_current);
drivers/usb/gadget/udc/goku_udc.c
672
if (readl(®s->dma_master) & MST_RD_ENA)
drivers/usb/gadget/udc/goku_udc.c
676
if (unlikely((readl(®s->dma_master) & MST_WR_ENA) == 0))
drivers/usb/gadget/udc/goku_udc.c
678
curr = readl(®s->out_dma_current);
drivers/usb/gadget/udc/goku_udc.c
687
if (readl(®s->dma_master) & MST_WR_ENA)
drivers/usb/gadget/udc/goku_udc.c
911
&& (readl(&ep->dev->regs->DataSet)
drivers/usb/gadget/udc/goku_udc.c
920
readl(ep->reg_status);
drivers/usb/gadget/udc/goku_udc.c
942
size = readl(®s->EPxSizeLA[ep->num]) & DATASIZE;
drivers/usb/gadget/udc/goku_udc.c
943
size += readl(®s->EPxSizeLB[ep->num]) & DATASIZE;
drivers/usb/gadget/udc/goku_udc.c
966
size = readl(®s->EPxSizeLA[ep->num]);
drivers/usb/gadget/udc/lpc32xx_udc.c
1149
*p32++ = readl(USBD_RXDATA(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
1154
tmp = readl(USBD_RXDATA(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
1165
tmp = readl(USBD_RXDATA(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
1182
tmp = readl(USBD_RXDATA(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
1190
tmp = readl(USBD_RXDATA(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
1213
while ((((tmpv = readl(USBD_RXPLEN(udc->udp_baseaddr))) &
drivers/usb/gadget/udc/lpc32xx_udc.c
2001
if (readl(USBD_SYSERRTINTST(udc->udp_baseaddr)) &
drivers/usb/gadget/udc/lpc32xx_udc.c
2727
devstat = readl(USBD_DEVINTST(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
2769
tmp = readl(USBD_EPINTST(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
2808
tmp = readl(USBD_EOTINTST(udc->udp_baseaddr)) |
drivers/usb/gadget/udc/lpc32xx_udc.c
2809
(readl(USBD_EPDMAST(udc->udp_baseaddr)) &
drivers/usb/gadget/udc/lpc32xx_udc.c
2810
readl(USBD_NDDRTINTST(udc->udp_baseaddr))) |
drivers/usb/gadget/udc/lpc32xx_udc.c
2811
readl(USBD_SYSERRTINTST(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
699
u32 tmp = readl(USBD_DEVINTST(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
708
while (((readl(USBD_DEVINTST(udc->udp_baseaddr)) &
drivers/usb/gadget/udc/lpc32xx_udc.c
741
while ((!(readl(USBD_DEVINTST(udc->udp_baseaddr)) & USBD_CDFULL))
drivers/usb/gadget/udc/lpc32xx_udc.c
748
return readl(USBD_CMDDATA(udc->udp_baseaddr));
drivers/usb/gadget/udc/lpc32xx_udc.c
833
while ((!(readl(USBD_DEVINTST(udc->udp_baseaddr)) &
drivers/usb/gadget/udc/net2280.c
1034
(readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) {
drivers/usb/gadget/udc/net2280.c
1055
s = readl(&ep->regs->ep_stat);
drivers/usb/gadget/udc/net2280.c
1074
s = readl(&ep->regs->ep_stat);
drivers/usb/gadget/udc/net2280.c
1150
u32 const ep_dmacount = readl(&ep->dma->dmacount);
drivers/usb/gadget/udc/net2280.c
1162
u32 const ep_stat = readl(&ep->regs->ep_stat);
drivers/usb/gadget/udc/net2280.c
1172
u32 const ep_avail = readl(&ep->regs->ep_avail);
drivers/usb/gadget/udc/net2280.c
1255
dmactl = readl(&ep->dma->dmactl);
drivers/usb/gadget/udc/net2280.c
1285
readl(&ep->dma->dmacount),
drivers/usb/gadget/udc/net2280.c
1369
(void) readl(&ep->regs->ep_rsp);
drivers/usb/gadget/udc/net2280.c
1413
avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
drivers/usb/gadget/udc/net2280.c
1440
(void) readl(&ep->regs->ep_rsp);
drivers/usb/gadget/udc/net2280.c
1487
tmp = readl(&dev->usb->usbctl);
drivers/usb/gadget/udc/net2280.c
1507
tmp = readl(&dev->usb->usbctl);
drivers/usb/gadget/udc/net2280.c
1532
tmp = readl(&dev->usb->usbctl);
drivers/usb/gadget/udc/net2280.c
1678
readl(&dev->regs->devinit),
drivers/usb/gadget/udc/net2280.c
1679
readl(&dev->regs->fifoctl),
drivers/usb/gadget/udc/net2280.c
1681
readl(&dev->regs->pciirqenb0),
drivers/usb/gadget/udc/net2280.c
1682
readl(&dev->regs->pciirqenb1),
drivers/usb/gadget/udc/net2280.c
1683
readl(&dev->regs->irqstat0),
drivers/usb/gadget/udc/net2280.c
1684
readl(&dev->regs->irqstat1));
drivers/usb/gadget/udc/net2280.c
1689
t1 = readl(&dev->usb->usbctl);
drivers/usb/gadget/udc/net2280.c
1690
t2 = readl(&dev->usb->usbstat);
drivers/usb/gadget/udc/net2280.c
170
u32 tmp = readl(&ep->dev->regs->pciirqenb0);
drivers/usb/gadget/udc/net2280.c
1704
readl(&dev->usb->stdrsp), t1, t2,
drivers/usb/gadget/udc/net2280.c
1705
readl(&dev->usb->ouraddr), s);
drivers/usb/gadget/udc/net2280.c
1721
t1 = readl(&ep->cfg->ep_cfg);
drivers/usb/gadget/udc/net2280.c
1722
t2 = readl(&ep->regs->ep_rsp) & 0xff;
drivers/usb/gadget/udc/net2280.c
1743
readl(&ep->regs->ep_irqenb));
drivers/usb/gadget/udc/net2280.c
1750
readl(&ep->regs->ep_stat),
drivers/usb/gadget/udc/net2280.c
1751
readl(&ep->regs->ep_avail),
drivers/usb/gadget/udc/net2280.c
1764
readl(&ep->dma->dmactl),
drivers/usb/gadget/udc/net2280.c
1765
readl(&ep->dma->dmastat),
drivers/usb/gadget/udc/net2280.c
1766
readl(&ep->dma->dmacount),
drivers/usb/gadget/udc/net2280.c
1767
readl(&ep->dma->dmaaddr),
drivers/usb/gadget/udc/net2280.c
1768
readl(&ep->dma->dmadesc));
drivers/usb/gadget/udc/net2280.c
1852
if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
drivers/usb/gadget/udc/net2280.c
1858
readl(&ep->dma->dmacount));
drivers/usb/gadget/udc/net2280.c
1959
tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
drivers/usb/gadget/udc/net2280.c
1967
tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
drivers/usb/gadget/udc/net2280.c
1970
tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
drivers/usb/gadget/udc/net2280.c
2014
tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
drivers/usb/gadget/udc/net2280.c
2020
(readl(&dev->plregs->pl_ep_ctrl) |
drivers/usb/gadget/udc/net2280.c
2030
tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
drivers/usb/gadget/udc/net2280.c
2034
tmp = readl(&dev->plregs->pl_ep_ctrl) &
drivers/usb/gadget/udc/net2280.c
2062
(void) readl(&dev->usb->usbctl);
drivers/usb/gadget/udc/net2280.c
2082
tmp = readl(&dev->regs->devinit) |
drivers/usb/gadget/udc/net2280.c
2098
(void)readl(&dev->usb->usbctl);
drivers/usb/gadget/udc/net2280.c
2127
tmp = readl(&dev->regs->devinit) |
drivers/usb/gadget/udc/net2280.c
2237
tmp = readl(&dev->usb_ext->usbctl2) &
drivers/usb/gadget/udc/net2280.c
2243
val = readl(&dev->llregs->ll_lfps_5);
drivers/usb/gadget/udc/net2280.c
2248
val = readl(&dev->llregs->ll_lfps_6);
drivers/usb/gadget/udc/net2280.c
2258
val = readl(&dev->llregs->ll_tsn_counters_2);
drivers/usb/gadget/udc/net2280.c
2263
val = readl(&dev->llregs->ll_tsn_counters_3);
drivers/usb/gadget/udc/net2280.c
2274
val = readl(&dev->llregs->ll_lfps_timers_2);
drivers/usb/gadget/udc/net2280.c
2286
val = readl(&dev->llregs->ll_tsn_chicken_bit);
drivers/usb/gadget/udc/net2280.c
2348
(void) readl(&dev->usb->usbctl);
drivers/usb/gadget/udc/net2280.c
2389
(void)readl(&dev->usb->usbctl);
drivers/usb/gadget/udc/net2280.c
246
tmp = readl(&ep->cfg->ep_cfg);
drivers/usb/gadget/udc/net2280.c
2530
t = readl(&ep->regs->ep_stat);
drivers/usb/gadget/udc/net2280.c
2613
for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
drivers/usb/gadget/udc/net2280.c
2631
count = readl(&ep->dma->dmacount);
drivers/usb/gadget/udc/net2280.c
2633
if (readl(&ep->dma->dmadesc)
drivers/usb/gadget/udc/net2280.c
2644
readl(&ep->dma->dmadesc) !=
drivers/usb/gadget/udc/net2280.c
2646
count = readl(
drivers/usb/gadget/udc/net2280.c
2672
t = readl(&ep->regs->ep_avail);
drivers/usb/gadget/udc/net2280.c
2791
if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
drivers/usb/gadget/udc/net2280.c
2808
state = readl(&dev->plregs->pl_ep_status_1)
drivers/usb/gadget/udc/net2280.c
2854
val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f;
drivers/usb/gadget/udc/net2280.c
2897
status = readl(&e->regs->ep_rsp) &
drivers/usb/gadget/udc/net2280.c
2917
writel(readl(&dev->usb_ext->usbctl2) &
drivers/usb/gadget/udc/net2280.c
2925
writel(readl(&dev->usb_ext->usbctl2) &
drivers/usb/gadget/udc/net2280.c
2933
writel(readl(&dev->usb_ext->usbctl2) &
drivers/usb/gadget/udc/net2280.c
2945
writel(readl(&dev->usb->usbctl) &
drivers/usb/gadget/udc/net2280.c
2983
writel(readl(&dev->usb_ext->usbctl2) |
drivers/usb/gadget/udc/net2280.c
2991
writel(readl(&dev->usb_ext->usbctl2) |
drivers/usb/gadget/udc/net2280.c
2999
writel(readl(&dev->usb_ext->usbctl2) |
drivers/usb/gadget/udc/net2280.c
3011
writel(readl(&dev->usb->usbctl) |
drivers/usb/gadget/udc/net2280.c
3045
readl(&ep->cfg->ep_cfg));
drivers/usb/gadget/udc/net2280.c
3113
u32 val = readl(&dev->usb->usbstat);
drivers/usb/gadget/udc/net2280.c
3166
u.raw[0] = readl(&dev->usb->setup0123);
drivers/usb/gadget/udc/net2280.c
3167
u.raw[1] = readl(&dev->usb->setup4567);
drivers/usb/gadget/udc/net2280.c
3224
if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
drivers/usb/gadget/udc/net2280.c
327
tmp |= readl(&ep->regs->ep_irqenb);
drivers/usb/gadget/udc/net2280.c
3290
readl(&ep->cfg->ep_cfg));
drivers/usb/gadget/udc/net2280.c
331
tmp |= readl(&dev->regs->pciirqenb1);
drivers/usb/gadget/udc/net2280.c
3385
(readl(&dev->usb->usbctl) &
drivers/usb/gadget/udc/net2280.c
3391
(readl(&dev->usb->usbstat) & mask)
drivers/usb/gadget/udc/net2280.c
3481
tmp = readl(&dma->dmastat);
drivers/usb/gadget/udc/net2280.c
3486
u32 r_dmacount = readl(&dma->dmacount);
drivers/usb/gadget/udc/net2280.c
3513
tmp = readl(&dma->dmactl);
drivers/usb/gadget/udc/net2280.c
3543
(!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
drivers/usb/gadget/udc/net2280.c
3549
handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
drivers/usb/gadget/udc/net2280.c
3552
handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
drivers/usb/gadget/udc/net2280.c
3556
u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
drivers/usb/gadget/udc/net2280.c
3692
usbstat = readl(&dev->usb->usbstat);
drivers/usb/gadget/udc/net2280.c
397
tmp = readl(®s->pciirqenb0);
drivers/usb/gadget/udc/net2280.c
401
tmp = readl(®s->pciirqenb1);
drivers/usb/gadget/udc/net2280.c
475
dmastat = readl(&ep->dma->dmastat);
drivers/usb/gadget/udc/net2280.c
482
tmp = readl(®s->pciirqenb0);
drivers/usb/gadget/udc/net2280.c
487
tmp = readl(®s->pciirqenb1);
drivers/usb/gadget/udc/net2280.c
502
tmp = readl(&ep->cfg->ep_cfg);
drivers/usb/gadget/udc/net2280.c
534
(void)readl(&ep->cfg->ep_cfg);
drivers/usb/gadget/udc/net2280.c
675
tmp = readl(statp);
drivers/usb/gadget/udc/net2280.c
688
tmp = readl(statp);
drivers/usb/gadget/udc/net2280.c
721
tmp = readl(&ep->regs->ep_stat);
drivers/usb/gadget/udc/net2280.c
735
count = readl(®s->ep_avail);
drivers/usb/gadget/udc/net2280.c
738
tmp = readl(&ep->regs->ep_stat);
drivers/usb/gadget/udc/net2280.c
739
count = readl(®s->ep_avail);
drivers/usb/gadget/udc/net2280.c
770
tmp = readl(®s->ep_data);
drivers/usb/gadget/udc/net2280.c
777
tmp = readl(®s->ep_data);
drivers/usb/gadget/udc/net2280.c
788
(void) readl(&ep->regs->ep_rsp);
drivers/usb/gadget/udc/net2280.c
843
writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
drivers/usb/gadget/udc/net2280.c
856
writel(readl(&dma->dmastat), &dma->dmastat);
drivers/usb/gadget/udc/net2280.c
864
(void) readl(&ep->dev->pci->pcimstctl);
drivers/usb/gadget/udc/net2280.c
877
WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
drivers/usb/gadget/udc/net2280.c
881
if (!ep->is_in && (readl(&ep->regs->ep_stat) &
drivers/usb/gadget/udc/net2280.c
886
tmp = readl(&ep->regs->ep_avail);
drivers/usb/gadget/udc/net2280.c
888
writel(readl(&dma->dmastat), &dma->dmastat);
drivers/usb/gadget/udc/net2280.h
266
u32 val = readl(&dev->regs->gpioctl);
drivers/usb/gadget/udc/net2280.h
28
return readl(®s->idxdata);
drivers/usb/gadget/udc/net2280.h
289
u32 val = readl(&dev->regs->gpioctl);
drivers/usb/gadget/udc/net2280.h
302
writel(readl(&dev->regs->gpioctl) & ~0x0f,
drivers/usb/gadget/udc/net2280.h
338
u32 tmp = readl(&ep->cfg->ep_cfg) &
drivers/usb/gadget/udc/net2280.h
349
readl(&ep->regs->ep_rsp);
drivers/usb/gadget/udc/net2280.h
356
tmp = readl(&ep->regs->ep_stat);
drivers/usb/gadget/udc/pxa25x_udc.c
310
return readl(dev->regs + reg);
drivers/usb/gadget/udc/renesas_usbf.c
428
return readl(udc->regs + offset);
drivers/usb/gadget/udc/renesas_usbf.c
467
return readl(ep->regs + offset);
drivers/usb/gadget/udc/renesas_usbf.c
518
return readl(ep->dma_regs + offset);
drivers/usb/gadget/udc/rzv2m_usb3drd.c
24
u32 val = readl(usb3->reg + offs);
drivers/usb/gadget/udc/rzv2m_usb3drd.c
33
u32 val = readl(usb3->reg + offs);
drivers/usb/gadget/udc/snps_udc_core.c
1041
tmp = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1104
tmp = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1112
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1143
tmp = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1164
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1173
tmp = readl(&dev->regs->ep_irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
1179
tmp = readl(&dev->regs->ep_irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
1276
tmp = readl(&udc->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1333
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1352
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1399
tmp = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1472
tmp = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1478
tmp = readl(&dev->regs->cfg);
drivers/usb/gadget/udc/snps_udc_core.c
1510
tmp = readl(&dev->regs->cfg);
drivers/usb/gadget/udc/snps_udc_core.c
1530
tmp = readl(&dev->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
1577
reg = readl(&dev->ep[tmp].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1672
tmp = readl(&dev->regs->cfg);
drivers/usb/gadget/udc/snps_udc_core.c
1699
readl(&dev->regs->cfg);
drivers/usb/gadget/udc/snps_udc_core.c
1718
tmp = readl(&udc->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1722
} else if (readl(&udc->regs->sts)
drivers/usb/gadget/udc/snps_udc_core.c
1760
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1826
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1835
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->bufin_framenum);
drivers/usb/gadget/udc/snps_udc_core.c
1845
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->bufout_maxpkt);
drivers/usb/gadget/udc/snps_udc_core.c
1855
tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->bufout_maxpkt);
drivers/usb/gadget/udc/snps_udc_core.c
1865
tmp = readl(&dev->csr->ne[0]);
drivers/usb/gadget/udc/snps_udc_core.c
187
DBG(dev, "dev config = %08x\n", readl(&dev->regs->cfg));
drivers/usb/gadget/udc/snps_udc_core.c
188
DBG(dev, "dev control = %08x\n", readl(&dev->regs->ctl));
drivers/usb/gadget/udc/snps_udc_core.c
189
DBG(dev, "dev status = %08x\n", readl(&dev->regs->sts));
drivers/usb/gadget/udc/snps_udc_core.c
1891
tmp = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
1903
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
191
DBG(dev, "dev int's = %08x\n", readl(&dev->regs->irqsts));
drivers/usb/gadget/udc/snps_udc_core.c
1910
tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
192
DBG(dev, "dev intmask = %08x\n", readl(&dev->regs->irqmsk));
drivers/usb/gadget/udc/snps_udc_core.c
194
DBG(dev, "dev ep int's = %08x\n", readl(&dev->regs->ep_irqsts));
drivers/usb/gadget/udc/snps_udc_core.c
1948
tmp = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
195
DBG(dev, "dev ep intmask = %08x\n", readl(&dev->regs->ep_irqmsk));
drivers/usb/gadget/udc/snps_udc_core.c
1989
tmp = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2008
reg = readl(&dev->ep[tmp].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2019
reg = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2069
tmp = readl(&ep->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2074
ep->num, readl(&ep->regs->desptr));
drivers/usb/gadget/udc/snps_udc_core.c
2259
if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY))
drivers/usb/gadget/udc/snps_udc_core.c
2282
epsts = readl(&ep->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2289
(unsigned long) readl(&ep->regs->desptr));
drivers/usb/gadget/udc/snps_udc_core.c
2301
ep->num, (unsigned long) readl(&ep->regs->desptr));
drivers/usb/gadget/udc/snps_udc_core.c
2336
tmp = readl(&dev->regs->ep_irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
2399
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2407
tmp = readl(
drivers/usb/gadget/udc/snps_udc_core.c
2440
tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2463
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
247
tmp = readl(&dev->regs->ep_irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
2545
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2565
tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2611
count = readl(&dev->ep[UDC_EP0OUT_IX].regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2621
readl(&dev->ep[UDC_EP0OUT_IX].regs->confirm);
drivers/usb/gadget/udc/snps_udc_core.c
2630
if (readl(&dev->regs->sts) & AMD_BIT(UDC_DEVSTS_RXFIFO_EMPTY))
drivers/usb/gadget/udc/snps_udc_core.c
264
tmp = readl(&dev->regs->irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
2652
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2674
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2695
readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2755
tmp = readl(&dev->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2781
tmp = readl(&dev->csr->ne[udc_csr_epix]);
drivers/usb/gadget/udc/snps_udc_core.c
2790
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2805
tmp = readl(&dev->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2836
tmp = readl(&dev->csr->ne[udc_csr_epix]);
drivers/usb/gadget/udc/snps_udc_core.c
2849
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
2887
tmp = readl(&dev->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2900
tmp = readl(&dev->regs->cfg);
drivers/usb/gadget/udc/snps_udc_core.c
2911
tmp = readl(&dev->regs->irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
295
tmp = readl(&dev->ep[i].regs->bufin_framenum);
drivers/usb/gadget/udc/snps_udc_core.c
2952
tmp = readl(&dev->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
2955
tmp = readl(&dev->regs->irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
2980
reg = readl(&dev->regs->ep_irqsts);
drivers/usb/gadget/udc/snps_udc_core.c
3010
reg = readl(&dev->regs->irqsts);
drivers/usb/gadget/udc/snps_udc_core.c
308
if (readl(&ep->regs->ctl) & AMD_BIT(UDC_EPCTL_NAK)) {
drivers/usb/gadget/udc/snps_udc_core.c
3176
reg = readl(&dev->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
348
tmp = readl(&dev->ep[ep->num].regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
354
tmp = readl(&dev->ep[ep->num].regs->bufout_maxpkt);
drivers/usb/gadget/udc/snps_udc_core.c
366
tmp = readl(&dev->ep[ep->num].regs->bufin_framenum);
drivers/usb/gadget/udc/snps_udc_core.c
379
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
389
tmp = readl(&dev->csr->ne[ep->num - UDC_CSR_EP_OUT_IX_OFS]);
drivers/usb/gadget/udc/snps_udc_core.c
405
tmp = readl(&dev->csr->ne[udc_csr_epix]);
drivers/usb/gadget/udc/snps_udc_core.c
424
tmp = readl(&dev->regs->ep_irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
433
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
458
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
464
tmp = readl(®s->ep_irqmsk);
drivers/usb/gadget/udc/snps_udc_core.c
470
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
474
tmp = readl(&ep->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
479
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_core.c
687
*(buf + i) = readl(dev->rxfifo);
drivers/usb/gadget/udc/snps_udc_core.c
701
*((u32 *)(buf + (i<<2))) = readl(dev->rxfifo);
drivers/usb/gadget/udc/snps_udc_core.c
705
tmp = readl(dev->rxfifo);
drivers/usb/gadget/udc/snps_udc_core.c
725
bytes = readl(&ep->regs->sts);
drivers/usb/gadget/udc/snps_udc_core.c
946
tmp = readl(&ep->regs->ctl);
drivers/usb/gadget/udc/snps_udc_plat.c
40
reg = readl(&udc->regs->ctl);
drivers/usb/gadget/udc/snps_udc_plat.c
44
reg = readl(&udc->regs->ctl);
drivers/usb/gadget/udc/tegra-xudc.c
563
return readl(xudc->fpci + offset);
drivers/usb/gadget/udc/tegra-xudc.c
574
return readl(xudc->ipfs + offset);
drivers/usb/gadget/udc/tegra-xudc.c
585
return readl(xudc->base + offset);
drivers/usb/host/ehci-fsl.c
645
status = readl(&ehci->regs->port_status[port]);
drivers/usb/host/ehci-hub.c
1038
(readl(&ehci->debug->control) & DBGP_ENABLED)) {
drivers/usb/host/ehci-mv.c
159
offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
drivers/usb/host/ehci.h
763
readl(regs);
drivers/usb/host/ehci.h
765
return readl(regs);
drivers/usb/host/ohci.h
567
readl (regs);
drivers/usb/host/ohci.h
569
return readl (regs);
drivers/usb/host/oxu210hp-hcd.c
1901
u32 cmd = readl(&oxu->regs->command);
drivers/usb/host/oxu210hp-hcd.c
2102
int cmd = readl(&oxu->regs->command);
drivers/usb/host/oxu210hp-hcd.c
2147
(void) readl(&oxu->regs->command);
drivers/usb/host/oxu210hp-hcd.c
2287
cmd = readl(&oxu->regs->command) | CMD_PSE;
drivers/usb/host/oxu210hp-hcd.c
2293
oxu->next_uframe = readl(&oxu->regs->frame_index)
drivers/usb/host/oxu210hp-hcd.c
2313
cmd = readl(&oxu->regs->command) & ~CMD_PSE;
drivers/usb/host/oxu210hp-hcd.c
2662
clock = readl(&oxu->regs->frame_index);
drivers/usb/host/oxu210hp-hcd.c
2728
now = readl(&oxu->regs->frame_index) % mod;
drivers/usb/host/oxu210hp-hcd.c
2840
status = readl(&oxu->regs->status);
drivers/usb/host/oxu210hp-hcd.c
2857
readl(&oxu->regs->command); /* unblock posted write */
drivers/usb/host/oxu210hp-hcd.c
2883
if (!(readl(&oxu->regs->command) & CMD_RUN))
drivers/usb/host/oxu210hp-hcd.c
2887
int pstatus = readl(&oxu->regs->port_status[i]);
drivers/usb/host/oxu210hp-hcd.c
2909
status = readl(&oxu->regs->status);
drivers/usb/host/oxu210hp-hcd.c
2910
dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
drivers/usb/host/oxu210hp-hcd.c
2965
u32 status = readl(&oxu->regs->status);
drivers/usb/host/oxu210hp-hcd.c
3006
hcc_params = readl(&oxu->caps->hcc_params);
drivers/usb/host/oxu210hp-hcd.c
3073
HC_LENGTH(readl(&oxu->caps->hc_capbase));
drivers/usb/host/oxu210hp-hcd.c
3079
HC_LENGTH(readl(&oxu->caps->hc_capbase));
drivers/usb/host/oxu210hp-hcd.c
3084
oxu->hcs_params = readl(&oxu->caps->hcs_params);
drivers/usb/host/oxu210hp-hcd.c
3118
hcc_params = readl(&oxu->caps->hcc_params);
drivers/usb/host/oxu210hp-hcd.c
3136
readl(&oxu->regs->command); /* unblock posted writes */
drivers/usb/host/oxu210hp-hcd.c
3138
temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
drivers/usb/host/oxu210hp-hcd.c
3177
dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
drivers/usb/host/oxu210hp-hcd.c
3195
readl(&oxu->regs->configured_flag);
drivers/usb/host/oxu210hp-hcd.c
3459
return (readl(&oxu->regs->frame_index) >> 3) %
drivers/usb/host/oxu210hp-hcd.c
3499
temp = readl(&oxu->regs->port_status[i]);
drivers/usb/host/oxu210hp-hcd.c
3574
temp = readl(status_reg);
drivers/usb/host/oxu210hp-hcd.c
3623
readl(&oxu->regs->command); /* unblock posted write */
drivers/usb/host/oxu210hp-hcd.c
3638
temp = readl(status_reg);
drivers/usb/host/oxu210hp-hcd.c
3668
temp = readl(status_reg);
drivers/usb/host/oxu210hp-hcd.c
3706
readl(status_reg));
drivers/usb/host/oxu210hp-hcd.c
3716
temp = readl(status_reg);
drivers/usb/host/oxu210hp-hcd.c
3763
temp = readl(status_reg);
drivers/usb/host/oxu210hp-hcd.c
3819
readl(&oxu->regs->command); /* unblock posted writes */
drivers/usb/host/oxu210hp-hcd.c
3852
oxu->command = readl(&oxu->regs->command);
drivers/usb/host/oxu210hp-hcd.c
3865
u32 t1 = readl(reg) & ~PORT_RWC_BITS;
drivers/usb/host/oxu210hp-hcd.c
3900
readl(&oxu->regs->intr_enable);
drivers/usb/host/oxu210hp-hcd.c
3924
temp = readl(&oxu->regs->intr_enable);
drivers/usb/host/oxu210hp-hcd.c
3947
temp = readl(&oxu->regs->port_status[i]);
drivers/usb/host/oxu210hp-hcd.c
3959
temp = readl(&oxu->regs->port_status[i]);
drivers/usb/host/oxu210hp-hcd.c
3966
(void) readl(&oxu->regs->command);
drivers/usb/host/oxu210hp-hcd.c
658
return readl(base + reg);
drivers/usb/host/oxu210hp-hcd.c
743
u32 temp = readl(&oxu->regs->status);
drivers/usb/host/oxu210hp-hcd.c
751
temp = readl(&oxu->regs->command);
drivers/usb/host/oxu210hp-hcd.c
765
tmp = readl(reg_ptr);
drivers/usb/host/oxu210hp-hcd.c
774
u32 command = readl(&oxu->regs->command);
drivers/usb/host/oxu210hp-hcd.c
802
temp = readl(&oxu->regs->command) << 10;
drivers/usb/host/oxu210hp-hcd.c
811
temp = readl(&oxu->regs->command);
drivers/usb/host/pci-quirks.c
1005
val = readl(op_reg_base + EHCI_USBSTS);
drivers/usb/host/pci-quirks.c
1188
val = readl(base + ext_cap_offset);
drivers/usb/host/pci-quirks.c
1215
val = readl(base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
drivers/usb/host/pci-quirks.c
1227
op_reg_base = base + XHCI_HC_LENGTH(readl(base));
drivers/usb/host/pci-quirks.c
1236
val = readl(op_reg_base + XHCI_STS_OFFSET);
drivers/usb/host/pci-quirks.c
1243
val = readl(op_reg_base + XHCI_CMD_OFFSET);
drivers/usb/host/pci-quirks.c
1251
val = readl(op_reg_base + XHCI_STS_OFFSET);
drivers/usb/host/pci-quirks.c
781
control = readl(base + OHCI_CONTROL);
drivers/usb/host/pci-quirks.c
794
readl(base + OHCI_CONTROL) & OHCI_CTRL_IR) {
drivers/usb/host/pci-quirks.c
801
readl(base + OHCI_CONTROL));
drivers/usb/host/pci-quirks.c
810
readl(base + OHCI_CONTROL);
drivers/usb/host/pci-quirks.c
814
fminterval = readl(base + OHCI_FMINTERVAL);
drivers/usb/host/pci-quirks.c
820
if ((readl(base + OHCI_CMDSTATUS) & OHCI_HCR) == 0)
drivers/usb/host/pci-quirks.c
960
hcc_params = readl(base + EHCI_HCC_PARAMS);
drivers/usb/host/pci-quirks.c
994
val = readl(op_reg_base + EHCI_USBSTS);
drivers/usb/host/pci-quirks.c
996
val = readl(op_reg_base + EHCI_USBCMD);
drivers/usb/host/uhci-hcd.h
601
return readl(uhci->regs + uhci_aspeed_reg(reg));
drivers/usb/host/uhci-hcd.h
607
return readl(uhci->regs + reg);
drivers/usb/host/uhci-hcd.h
629
return readl(uhci->regs + uhci_aspeed_reg(reg));
drivers/usb/host/uhci-hcd.h
657
return readl(uhci->regs + uhci_aspeed_reg(reg));
drivers/usb/host/xhci-dbgcap.c
1123
dev_info = readl(ptr);
drivers/usb/host/xhci-dbgcap.c
1165
dev_info = readl(ptr);
drivers/usb/host/xhci-dbgcap.c
1206
dev_info = readl(ptr);
drivers/usb/host/xhci-dbgcap.c
1355
dev_info = readl(ptr);
drivers/usb/host/xhci-dbgcap.c
1444
if (readl(&dbc->regs->control) & DBC_CTRL_DBC_ENABLE)
drivers/usb/host/xhci-dbgcap.c
651
ctrl = readl(&dbc->regs->control);
drivers/usb/host/xhci-dbgcap.c
67
max_burst = DBC_CTRL_MAXBURST(readl(&dbc->regs->control));
drivers/usb/host/xhci-dbgcap.c
754
portsc = readl(&dbc->regs->portsc);
drivers/usb/host/xhci-dbgcap.c
895
portsc = readl(&dbc->regs->portsc);
drivers/usb/host/xhci-dbgcap.c
903
ctrl = readl(&dbc->regs->control);
drivers/usb/host/xhci-dbgcap.c
907
portsc = readl(&dbc->regs->portsc);
drivers/usb/host/xhci-dbgcap.c
916
portsc = readl(&dbc->regs->portsc);
drivers/usb/host/xhci-dbgcap.c
937
ctrl = readl(&dbc->regs->control);
drivers/usb/host/xhci-dbgcap.c
944
ctrl = readl(&dbc->regs->control);
drivers/usb/host/xhci-debugfs.c
153
psic = XHCI_EXT_PORT_PSIC(readl(base + offset + 8));
drivers/usb/host/xhci-debugfs.c
392
portli = readl(&port->port_reg->portli);
drivers/usb/host/xhci-debugfs.c
790
HC_LENGTH(readl(&xhci->cap_regs->hc_capbase)),
drivers/usb/host/xhci-debugfs.c
795
readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK,
drivers/usb/host/xhci-ext-caps.c
93
val = readl(base + offset);
drivers/usb/host/xhci-ext-caps.h
138
val = readl(base + XHCI_HCC_PARAMS_OFFSET);
drivers/usb/host/xhci-ext-caps.h
146
val = readl(base + offset);
drivers/usb/host/xhci-histb.c
56
regval = readl(histb->ctrl + REG_GUSB2PHYCFG0);
drivers/usb/host/xhci-histb.c
71
regval = readl(histb->ctrl + REG_GUSB3PIPECTL0);
drivers/usb/host/xhci-hub.c
112
reg = readl(&xhci->cap_regs->hcc_params);
drivers/usb/host/xhci-hub.c
117
reg = readl(&xhci->cap_regs->hcs_params3);
drivers/usb/host/xhci-hub.c
1291
port_li = readl(&port->port_reg->portli);
drivers/usb/host/xhci-hub.c
1523
temp = readl(&port->port_reg->portpmsc);
drivers/usb/host/xhci-hub.c
1531
temp = readl(&port->port_reg->portpmsc);
drivers/usb/host/xhci-hub.c
1976
(void) readl(&xhci->op_regs->command);
drivers/usb/host/xhci-hub.c
686
temp = readl(&port->port_reg->portpmsc);
drivers/usb/host/xhci-hub.c
789
if (readl(base + offset) & XHCI_INTEL_SPR_TUNEN)
drivers/usb/host/xhci-mem.c
1835
tmp = readl(&ir->ir_set->erst_size);
drivers/usb/host/xhci-mem.c
2027
temp = readl(addr);
drivers/usb/host/xhci-mem.c
2061
temp = readl(addr + 2);
drivers/usb/host/xhci-mem.c
2087
port_cap->psi[i] = readl(addr + 4 + i);
drivers/usb/host/xhci-mem.c
2331
erst_size = readl(&ir->ir_set->erst_size);
drivers/usb/host/xhci-mtk.c
148
value = readl(hcd->regs + HFCNTR_CFG);
drivers/usb/host/xhci-mtk.c
153
value = readl(hcd->regs + LS_EOF_CFG);
drivers/usb/host/xhci-mtk.c
158
value = readl(hcd->regs + FS_EOF_CFG);
drivers/usb/host/xhci-mtk.c
163
value = readl(hcd->regs + SS_GEN1_EOF_CFG);
drivers/usb/host/xhci-mtk.c
168
value = readl(hcd->regs + SS_GEN2_EOF_CFG);
drivers/usb/host/xhci-mtk.c
187
value = readl(hcd->regs + HSCH_CFG1);
drivers/usb/host/xhci-mtk.c
215
value = readl(&ippc->ip_pw_ctr1);
drivers/usb/host/xhci-mtk.c
226
value = readl(&ippc->u3_ctrl_p[i]);
drivers/usb/host/xhci-mtk.c
237
value = readl(&ippc->u2_ctrl_p[i]);
drivers/usb/host/xhci-mtk.c
278
value = readl(&ippc->u3_ctrl_p[i]);
drivers/usb/host/xhci-mtk.c
288
value = readl(&ippc->u2_ctrl_p[i]);
drivers/usb/host/xhci-mtk.c
294
value = readl(&ippc->ip_pw_ctr1);
drivers/usb/host/xhci-mtk.c
318
value = readl(&ippc->ip_pw_ctr0);
drivers/usb/host/xhci-mtk.c
322
value = readl(&ippc->ip_pw_ctr0);
drivers/usb/host/xhci-mtk.c
330
value = readl(&ippc->ip_pw_ctr2);
drivers/usb/host/xhci-mtk.c
334
value = readl(&ippc->ip_xhci_cap);
drivers/usb/host/xhci-pci.c
757
val = readl(reg) & ~PROG_DONE;
drivers/usb/host/xhci-pci.c
761
val = readl(reg);
drivers/usb/host/xhci-pci.c
769
val = readl(reg) | PROG_DONE;
drivers/usb/host/xhci-pci.c
771
readl(reg);
drivers/usb/host/xhci-pci.c
786
val = readl(reg);
drivers/usb/host/xhci-pci.c
788
readl(reg);
drivers/usb/host/xhci-pci.c
795
reg = readl(hcd->regs + SPARSE_CNTL_ENABLE);
drivers/usb/host/xhci-rcar.c
127
if (readl(regs + RCAR_USB3_DL_CTRL) & RCAR_USB3_DL_CTRL_FW_SUCCESS)
drivers/usb/host/xhci-rcar.c
136
temp = readl(regs + RCAR_USB3_DL_CTRL);
drivers/usb/host/xhci-rcar.c
147
temp = readl(regs + RCAR_USB3_DL_CTRL);
drivers/usb/host/xhci-rcar.c
158
temp = readl(regs + RCAR_USB3_DL_CTRL);
drivers/usb/host/xhci-rcar.c
64
temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
drivers/usb/host/xhci-rcar.c
85
int_en = readl(hcd->regs + RZG3E_USB3_HOST_INTEN);
drivers/usb/host/xhci-ring.c
1740
usbsts = readl(&xhci->op_regs->status);
drivers/usb/host/xhci-ring.c
1988
pll_lock_check = readl(hcd->regs + 0x1070);
drivers/usb/host/xhci-ring.c
2059
cmd_reg = readl(&xhci->op_regs->command);
drivers/usb/host/xhci-ring.c
3073
iman = readl(&ir->ir_set->iman);
drivers/usb/host/xhci-ring.c
3078
readl(&ir->ir_set->iman);
drivers/usb/host/xhci-ring.c
3185
status = readl(&xhci->op_regs->status);
drivers/usb/host/xhci-ring.c
4014
current_frame_id = readl(&xhci->run_regs->microframe_index);
drivers/usb/host/xhci-ring.c
4314
start_frame = readl(&xhci->run_regs->microframe_index);
drivers/usb/host/xhci-ring.c
433
readl(&xhci->dba->doorbell[0]);
drivers/usb/host/xhci-ring.c
572
readl(db_addr);
drivers/usb/host/xhci-rzv2m.c
35
int_en = readl(hcd->regs + RZV2M_USB3_INTEN);
drivers/usb/host/xhci-tegra.c
2229
usbcmd = readl(&xhci->op_regs->command);
drivers/usb/host/xhci-tegra.c
2276
usbcmd = readl(&xhci->op_regs->command);
drivers/usb/host/xhci-tegra.c
2348
usbcmd = readl(&xhci->op_regs->command);
drivers/usb/host/xhci-tegra.c
327
return readl(tegra->fpci_base + offset);
drivers/usb/host/xhci-tegra.c
338
return readl(tegra->ipfs_base + offset);
drivers/usb/host/xhci-tegra.c
349
return readl(tegra->bar2_base + offset);
drivers/usb/host/xhci-tegra.c
994
op_regs = tegra->regs + HC_LENGTH(readl(&cap_regs->hc_capbase));
drivers/usb/host/xhci.c
1013
command = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
1032
command = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
1047
res = readl(&xhci->op_regs->status);
drivers/usb/host/xhci.c
110
halted = readl(&xhci->op_regs->status) & STS_HALT;
drivers/usb/host/xhci.c
1130
command = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
114
cmd = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
1146
temp = readl(&xhci->op_regs->status);
drivers/usb/host/xhci.c
1181
temp = readl(&xhci->op_regs->status);
drivers/usb/host/xhci.c
1189
readl(&xhci->op_regs->status));
drivers/usb/host/xhci.c
1225
command = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
156
temp = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
1793
temp = readl(&xhci->op_regs->status);
drivers/usb/host/xhci.c
194
state = readl(&xhci->op_regs->status);
drivers/usb/host/xhci.c
208
command = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
276
val = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
281
val = readl(&xhci->op_regs->status);
drivers/usb/host/xhci.c
320
iman = readl(&ir->ir_set->iman);
drivers/usb/host/xhci.c
326
readl(&ir->ir_set->iman);
drivers/usb/host/xhci.c
337
iman = readl(&ir->ir_set->iman);
drivers/usb/host/xhci.c
342
iman = readl(&ir->ir_set->iman);
drivers/usb/host/xhci.c
361
imod = readl(&ir->ir_set->imod);
drivers/usb/host/xhci.c
4145
state = readl(&xhci->op_regs->status);
drivers/usb/host/xhci.c
4678
pm_val = readl(&port_reg->portpmsc);
drivers/usb/host/xhci.c
468
page_size = readl(&xhci->op_regs->page_size) & XHCI_PAGE_SIZE_MASK;
drivers/usb/host/xhci.c
4709
readl(&port_reg->porthlmpc);
drivers/usb/host/xhci.c
4717
pm_val = readl(&port_reg->portpmsc);
drivers/usb/host/xhci.c
4721
readl(&port_reg->portpmsc);
drivers/usb/host/xhci.c
4726
readl(&port_reg->portpmsc);
drivers/usb/host/xhci.c
487
config_reg = readl(&xhci->op_regs->config_reg);
drivers/usb/host/xhci.c
519
offset = readl(&xhci->cap_regs->db_off) & DBOFF_MASK;
drivers/usb/host/xhci.c
53
return readl(&port->port_reg->portsc);
drivers/usb/host/xhci.c
533
dev_notf = readl(&xhci->op_regs->dev_notification);
drivers/usb/host/xhci.c
5360
return readl(&xhci->run_regs->microframe_index) >> 3;
drivers/usb/host/xhci.c
5445
HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
drivers/usb/host/xhci.c
5447
(readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
drivers/usb/host/xhci.c
5449
hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
drivers/usb/host/xhci.c
5450
xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
drivers/usb/host/xhci.c
5451
xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
drivers/usb/host/xhci.c
5452
xhci->hci_version = HC_VERSION(readl(&xhci->cap_regs->hc_capbase));
drivers/usb/host/xhci.c
5453
xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
drivers/usb/host/xhci.c
5455
xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
drivers/usb/host/xhci.c
608
temp = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
743
temp = readl(&xhci->op_regs->status);
drivers/usb/host/xhci.c
752
readl(&xhci->op_regs->status));
drivers/usb/host/xhci.c
799
readl(&xhci->op_regs->status));
drivers/usb/host/xhci.c
809
xhci->s3.command = readl(&xhci->op_regs->command);
drivers/usb/host/xhci.c
810
xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
drivers/usb/host/xhci.c
812
xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
drivers/usb/host/xhci.c
821
ir->s3_erst_size = readl(&ir->ir_set->erst_size);
drivers/usb/host/xhci.c
824
ir->s3_iman = readl(&ir->ir_set->iman);
drivers/usb/host/xhci.c
825
ir->s3_imod = readl(&ir->ir_set->imod);
drivers/usb/host/xhci.c
934
status = readl(&xhci->op_regs->status);
drivers/usb/isp1760/isp1760-hcd.c
217
u32 port_status = readl(priv->base + portsc1_reg);
drivers/usb/isp1760/isp1760-if.c
115
reg_data = readl(iobase + PLX_INT_CSR_REG);
drivers/usb/isp1760/isp1760-if.c
82
reg_data = readl(iobase + ISP176x_HC_SCRATCH) & 0x0000ffff;
drivers/usb/misc/brcmstb-usb-pinmap.c
235
val = readl(pdata->regs) & pout->value_mask;
drivers/usb/misc/brcmstb-usb-pinmap.c
46
val = readl(reg);
drivers/usb/misc/brcmstb-usb-pinmap.c
55
val = readl(reg);
drivers/usb/misc/brcmstb-usb-pinmap.c
83
pr_debug("%s: reg: 0x%x\n", __func__, readl(pdata->regs));
drivers/usb/misc/brcmstb-usb-pinmap.c
86
val = readl(pdata->regs);
drivers/usb/misc/qcom_eud.c
118
reg = readl(chip->base + EUD_REG_CTL_OUT_1);
drivers/usb/misc/qcom_eud.c
131
reg = readl(chip->base + EUD_REG_SW_ATTACH_DET);
drivers/usb/misc/qcom_eud.c
152
reg = readl(chip->base + EUD_REG_INT_STATUS_1);
drivers/usb/mtu3/mtu3.h
406
return readl(base + offset);
drivers/usb/mtu3/mtu3.h
412
u32 tmp = readl(addr);
drivers/usb/mtu3/mtu3.h
420
u32 tmp = readl(addr);
drivers/usb/mtu3/mtu3_gadget_ep0.c
114
value = readl(fifo);
drivers/usb/phy/phy-am335x-control.c
52
val = readl(usb_ctrl->wkup);
drivers/usb/phy/phy-am335x-control.c
84
val = readl(usb_ctrl->phy_reg + reg);
drivers/usb/phy/phy-fsl-usb.c
101
#define fsl_readl(addr) readl(addr)
drivers/usb/phy/phy-keystone.c
35
return readl(base + offset);
drivers/usb/phy/phy-mxs-usb.c
272
phytx = readl(base + HW_USBPHY_TX);
drivers/usb/phy/phy-mxs-usb.c
609
if (readl(phy->io_priv + HW_USBPHY_CTRL) &
drivers/usb/phy/phy-omap-otg.c
128
rev = readl(otg_dev->base);
drivers/usb/phy/phy-omap-otg.c
44
l = readl(otg_dev->base + OMAP_OTG_CTRL);
drivers/usb/phy/phy-ulpi-viewport.c
44
return ULPI_VIEW_DATA_READ(readl(view));
drivers/usb/roles/intel-xhci-usb-role-switch.c
115
val = readl(data->base + DUAL_ROLE_CFG1);
drivers/usb/roles/intel-xhci-usb-role-switch.c
138
val = readl(data->base + DUAL_ROLE_CFG0);
drivers/usb/roles/intel-xhci-usb-role-switch.c
83
val = readl(data->base + DUAL_ROLE_CFG0);
drivers/usb/typec/mux/intel_pmc_mux.c
172
port->iom_status = readl(port->pmc->iom_base +
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
106
*addr = readl(qm->io_base + QM_MB_CMD_DATA_ADDR_L) |
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
107
((u64)readl(qm->io_base + QM_MB_CMD_DATA_ADDR_H) <<
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
121
*addr = readl(qm->io_base + QM_MB_CMD_DATA_ADDR_L) |
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
122
((u64)readl(qm->io_base + QM_MB_CMD_DATA_ADDR_H) <<
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
1234
val = readl(pf_qm->io_base + QM_MIG_REGION_SEL);
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
1471
value = readl(vf_qm->io_base + QM_MB_CMD_SEND_BASE);
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
325
sqc_vft = readl(qm->io_base + QM_VFT_CFG_DATA_L) |
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
326
((u64)readl(qm->io_base + QM_VFT_CFG_DATA_H) <<
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
38
state = readl(qm->io_base + regs);
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
41
state = readl(qm->io_base + regs);
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
57
data[i] = readl(qm->io_base + reg_addr);
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
88
sqc_vft = readl(qm->io_base + QM_MB_CMD_DATA_ADDR_L) |
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
89
((u64)readl(qm->io_base + QM_MB_CMD_DATA_ADDR_H) <<
drivers/vfio/platform/reset/vfio_platform_calxedaxgmac.c
39
u32 value = readl(ioaddr + XGMAC_DMA_CONTROL);
drivers/vfio/platform/reset/vfio_platform_calxedaxgmac.c
44
value = readl(ioaddr + XGMAC_CONTROL);
drivers/video/backlight/apple_dwi_bl.c
62
u32 cmd = readl(dwi_bl->base + DWI_BL_CMD);
drivers/video/fbdev/aty/aty128fb.c
525
return readl (par->regbase + regindex);
drivers/video/fbdev/aty/atyfb.h
237
return readl(par->ati_regbase + regindex);
drivers/video/fbdev/aty/radeonfb.h
380
#define INREG(addr) readl((rinfo->mmio_base)+addr)
drivers/video/fbdev/carminefb.c
149
return readl(par->display_reg + offset);
drivers/video/fbdev/carminefb.c
161
return readl(hw->v_regs + offset);
drivers/video/fbdev/clps711x-fb.c
62
writel((readl(cfb->base + regno) & ~mask) | level, cfb->base + regno);
drivers/video/fbdev/cobalt_lcdfb.c
61
return readl(info->screen_base) >> 24;
drivers/video/fbdev/cobalt_lcdfb.c
71
return readl(info->screen_base + LCD_DATA_REG_OFFSET) >> 24;
drivers/video/fbdev/geode/display_gx1.c
62
bank_cfg = readl(mc_regs + MC_BANK_CFG);
drivers/video/fbdev/geode/display_gx1.c
70
fb_base = (readl(mc_regs + MC_GBASE_ADD) & MC_GADD_GBADD_MASK) << 19;
drivers/video/fbdev/geode/display_gx1.c
85
readl(par->dc_regs + DC_UNLOCK);
drivers/video/fbdev/geode/display_gx1.c
88
gcfg = readl(par->dc_regs + DC_GENERAL_CFG);
drivers/video/fbdev/geode/display_gx1.c
89
tcfg = readl(par->dc_regs + DC_TIMING_CFG);
drivers/video/fbdev/geode/gxfb.h
295
return readl(par->gp_regs + 4*reg);
drivers/video/fbdev/geode/gxfb.h
305
return readl(par->dc_regs + 4*reg);
drivers/video/fbdev/geode/gxfb.h
315
return readl(par->vid_regs + 8*reg);
drivers/video/fbdev/geode/gxfb.h
325
return readl(par->vid_regs + 8*reg + VP_FP_START);
drivers/video/fbdev/geode/lxfb.h
378
return readl(par->gp_regs + 4*reg);
drivers/video/fbdev/geode/lxfb.h
388
return readl(par->dc_regs + 4*reg);
drivers/video/fbdev/geode/lxfb.h
398
return readl(par->vp_regs + 8*reg);
drivers/video/fbdev/geode/lxfb.h
408
return readl(par->vp_regs + 8*reg + VP_FP_START);
drivers/video/fbdev/geode/video_cs5530.c
100
dcfg = readl(par->vid_regs + CS5530_DISPLAY_CONFIG);
drivers/video/fbdev/geode/video_cs5530.c
159
dcfg = readl(par->vid_regs + CS5530_DISPLAY_CONFIG);
drivers/video/fbdev/goldfishfb.c
209
width = readl(fb->reg_base + FB_GET_WIDTH);
drivers/video/fbdev/goldfishfb.c
210
height = readl(fb->reg_base + FB_GET_HEIGHT);
drivers/video/fbdev/goldfishfb.c
226
fb->fb.var.height = readl(fb->reg_base + FB_GET_PHYS_HEIGHT);
drivers/video/fbdev/goldfishfb.c
227
fb->fb.var.width = readl(fb->reg_base + FB_GET_PHYS_WIDTH);
drivers/video/fbdev/goldfishfb.c
55
status = readl(fb->reg_base + FB_INT_STATUS);
drivers/video/fbdev/gxt4500.c
142
#define readreg(par, reg) readl((par)->regs + (reg))
drivers/video/fbdev/i740fb.c
832
itemp = readl(par->regs + FWATER_BLC);
drivers/video/fbdev/i810/i810.h
293
#define i810_readl(where, mmio) readl(mmio + where)
drivers/video/fbdev/imsttfb.c
410
return readl(base + regindex);
drivers/video/fbdev/imxfb.c
526
writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
drivers/video/fbdev/kyro/STG4000Reg.h
25
#define STG_READ_REG(reg) (readl(&pSTGReg->reg))
drivers/video/fbdev/matrox/matroxfb_base.h
140
return readl(va.vaddr + offs);
drivers/video/fbdev/mb862xx/mb862xxfb.h
108
#define gdc_read readl
drivers/video/fbdev/neofb.c
480
while (readl(&par->neo2200->bltStat) & 1)
drivers/video/fbdev/omap/sossi.c
74
return readl(sossi.base + reg);
drivers/video/fbdev/pmagb-b-fb.c
76
return readl(par->sfb + reg / 4);
drivers/video/fbdev/pxa168fb.c
297
x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0);
drivers/video/fbdev/pxa168fb.c
334
x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL1);
drivers/video/fbdev/pxa168fb.c
369
x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL) & 0x00000001;
drivers/video/fbdev/pxa168fb.c
418
x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL);
drivers/video/fbdev/pxa168fb.c
442
x = readl(fbi->reg_base + LCD_CFG_GRA_PITCH);
drivers/video/fbdev/pxa168fb.c
464
x = readl(fbi->reg_base + LCD_SPU_DUMB_CTRL);
drivers/video/fbdev/pxa168fb.c
532
u32 isr = readl(fbi->reg_base + SPU_IRQ_ISR);
drivers/video/fbdev/pxa168fb.c
776
data = readl(fbi->reg_base + LCD_SPU_DMA_CTRL0);
drivers/video/fbdev/s3c-fb.c
1147
data = readl(sfb->regs + SHADOWCON);
drivers/video/fbdev/s3c-fb.c
1345
reg = readl(sfb->regs + SHADOWCON);
drivers/video/fbdev/s3c-fb.c
1442
reg = readl(sfb->regs + VIDCON1);
drivers/video/fbdev/s3c-fb.c
1576
reg = readl(sfb->regs + VIDCON1);
drivers/video/fbdev/s3c-fb.c
432
reg = readl(sfb->regs + SHADOWCON);
drivers/video/fbdev/s3c-fb.c
440
reg = readl(sfb->regs + SHADOWCON);
drivers/video/fbdev/s3c-fb.c
454
u32 vidcon0 = readl(sfb->regs + VIDCON0);
drivers/video/fbdev/s3c-fb.c
579
data = readl(sfb->regs + SHADOWCON);
drivers/video/fbdev/s3c-fb.c
667
data = readl(sfb->regs + BLENDCON);
drivers/video/fbdev/s3c-fb.c
712
palcon = readl(sfb->regs + WPALCON);
drivers/video/fbdev/s3c-fb.c
807
wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
drivers/video/fbdev/s3c-fb.c
924
irq_ctrl_reg = readl(regs + VIDINTCON0);
drivers/video/fbdev/s3c-fb.c
949
irq_ctrl_reg = readl(regs + VIDINTCON0);
drivers/video/fbdev/s3c-fb.c
966
irq_sts_reg = readl(regs + VIDINTCON1);
drivers/video/fbdev/savage/savagefb-i2c.c
50
r = readl(chan->ioaddr + chan->reg);
drivers/video/fbdev/savage/savagefb-i2c.c
56
readl(chan->ioaddr + chan->reg); /* flush posted write */
drivers/video/fbdev/savage/savagefb-i2c.c
64
r = readl(chan->ioaddr + chan->reg);
drivers/video/fbdev/savage/savagefb-i2c.c
70
readl(chan->ioaddr + chan->reg); /* flush posted write */
drivers/video/fbdev/savage/savagefb-i2c.c
77
return (0 != (readl(chan->ioaddr + chan->reg) & SAVAGE4_I2C_SCL_IN));
drivers/video/fbdev/savage/savagefb-i2c.c
84
return (0 != (readl(chan->ioaddr + chan->reg) & SAVAGE4_I2C_SDA_IN));
drivers/video/fbdev/savage/savagefb.h
265
return readl(par->mmio.vbase + addr);
drivers/video/fbdev/sis/sis.h
393
#define MMIO_IN32(base, offset) readl((base+offset))
drivers/video/fbdev/sis/sis_main.c
4193
if(readl((FBAddress + 12)) == 0xCDEF0123L)
drivers/video/fbdev/sis/sis_main.c
4197
if(readl((FBAddress + 4)) == 0x456789ABL)
drivers/video/fbdev/sis/sis_main.c
4586
if(readl(ivideo->video_vbase) != 0)
drivers/video/fbdev/sis/sis_main.c
4592
if(readl(ivideo->video_vbase + pos) != pos)
drivers/video/fbdev/sstfb.c
185
u32 ret = readl(vbase + reg);
drivers/video/fbdev/sstfb.c
844
readl(fbbase_virt), readl(fbbase_virt + 0x100000),
drivers/video/fbdev/sstfb.c
845
readl(fbbase_virt + 0x200000));
drivers/video/fbdev/sstfb.c
850
readl(fbbase_virt), readl(fbbase_virt + 0x100000),
drivers/video/fbdev/sstfb.c
851
readl(fbbase_virt + 0x200000));
drivers/video/fbdev/sstfb.c
854
if (readl(fbbase_virt + 0x200000) == 0xdeadbeef)
drivers/video/fbdev/sstfb.c
856
else if (readl(fbbase_virt + 0x100000) == 0xdeadbeef)
drivers/video/fbdev/sunxvr500.c
312
ep->fb8_0_off = readl(ep->ramdac + RAMDAC_VID_8FB_0);
drivers/video/fbdev/sunxvr500.c
315
ep->fb8_1_off = readl(ep->ramdac + RAMDAC_VID_8FB_1);
drivers/video/fbdev/sunxvr500.c
334
line_length = (readl(ep->ramdac + RAMDAC_VID_CFG) >> 16) & 0xff;
drivers/video/fbdev/tdfxfb.c
244
return readl(par->regbase_virt + reg);
drivers/video/fbdev/tgafb.c
1463
tga_type = (readl(mem_base) >> 12) & 0x0f;
drivers/video/fbdev/via/accel.c
19
gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc;
drivers/video/fbdev/via/accel.c
483
temp = readl(viapar->shared->vdev->engine_mmio + VIA_REG_CURSOR_MODE);
drivers/video/fbdev/via/accel.c
517
while (!(readl(engine + VIA_REG_STATUS) &
drivers/video/fbdev/via/accel.c
526
while ((readl(engine + VIA_REG_STATUS) & mask) && (loop < MAXLOOP)) {
drivers/video/fbdev/via/viafbdev.c
800
temp = readl(engine + VIA_REG_CURSOR_MODE);
drivers/video/fbdev/vt8500lcdfb.c
112
control0 = readl(fbi->regbase) & ~0xf;
drivers/video/fbdev/vt8500lcdfb.c
114
while (readl(fbi->regbase + 0x38) & 0x10)
drivers/video/fbdev/vt8500lcdfb.c
188
readl(fbi->regbase + 0x38) & (1 << 3), HZ / 10);
drivers/video/fbdev/vt8500lcdfb.c
261
if (readl(fbi->regbase + 0x38) & (1 << 3))
drivers/video/fbdev/vt8500lcdfb.c
423
writel(readl(fbi->regbase) | 1, fbi->regbase);
drivers/video/fbdev/wmt_ge_rops.c
143
while ((readl(regbase + GE_STATUS_OFF) & 4) && --loops)
drivers/virtio/virtio_mmio.c
100
features = readl(vm_dev->base + VIRTIO_MMIO_DEVICE_FEATURES);
drivers/virtio/virtio_mmio.c
104
features |= readl(vm_dev->base + VIRTIO_MMIO_DEVICE_FEATURES);
drivers/virtio/virtio_mmio.c
162
l = cpu_to_le32(readl(base + offset));
drivers/virtio/virtio_mmio.c
166
l = cpu_to_le32(readl(base + offset));
drivers/virtio/virtio_mmio.c
226
return readl(vm_dev->base + VIRTIO_MMIO_CONFIG_GENERATION);
drivers/virtio/virtio_mmio.c
233
return readl(vm_dev->base + VIRTIO_MMIO_STATUS) & 0xff;
drivers/virtio/virtio_mmio.c
293
status = readl(vm_dev->base + VIRTIO_MMIO_INTERRUPT_STATUS);
drivers/virtio/virtio_mmio.c
322
WARN_ON(readl(vm_dev->base + VIRTIO_MMIO_QUEUE_READY));
drivers/virtio/virtio_mmio.c
368
if (readl(vm_dev->base + (vm_dev->version == 1 ?
drivers/virtio/virtio_mmio.c
374
num = readl(vm_dev->base + VIRTIO_MMIO_QUEUE_NUM_MAX);
drivers/virtio/virtio_mmio.c
440
WARN_ON(readl(vm_dev->base + VIRTIO_MMIO_QUEUE_READY));
drivers/virtio/virtio_mmio.c
502
len = (u64) readl(vm_dev->base + VIRTIO_MMIO_SHM_LEN_LOW);
drivers/virtio/virtio_mmio.c
503
len |= (u64) readl(vm_dev->base + VIRTIO_MMIO_SHM_LEN_HIGH) << 32;
drivers/virtio/virtio_mmio.c
514
addr = (u64) readl(vm_dev->base + VIRTIO_MMIO_SHM_BASE_LOW);
drivers/virtio/virtio_mmio.c
515
addr |= (u64) readl(vm_dev->base + VIRTIO_MMIO_SHM_BASE_HIGH) << 32;
drivers/virtio/virtio_mmio.c
594
magic = readl(vm_dev->base + VIRTIO_MMIO_MAGIC_VALUE);
drivers/virtio/virtio_mmio.c
602
vm_dev->version = readl(vm_dev->base + VIRTIO_MMIO_VERSION);
drivers/virtio/virtio_mmio.c
610
vm_dev->vdev.id.device = readl(vm_dev->base + VIRTIO_MMIO_DEVICE_ID);
drivers/virtio/virtio_mmio.c
619
vm_dev->vdev.id.vendor = readl(vm_dev->base + VIRTIO_MMIO_VENDOR_ID);
drivers/w1/masters/sgi_w1.c
33
mcr_val = readl(mcr);
drivers/watchdog/airoha_wdt.c
109
val = readl(airoha_wdt->base + WDT_TIMER_CUR_VALUE);
drivers/watchdog/airoha_wdt.c
59
val = readl(airoha_wdt->base + TIMER_CTRL);
drivers/watchdog/airoha_wdt.c
73
val = readl(airoha_wdt->base + TIMER_CTRL);
drivers/watchdog/airoha_wdt.c
85
val = readl(airoha_wdt->base + WDT_RELOAD);
drivers/watchdog/apple_wdt.c
136
(void)readl(wdt->regs + APPLE_WDT_WD1_CUR_TIME);
drivers/watchdog/armada_37xx_wdt.c
108
reg = readl(dev->reg + CNTR_CTRL(id));
drivers/watchdog/armada_37xx_wdt.c
117
reg = readl(dev->reg + CNTR_CTRL(id));
drivers/watchdog/armada_37xx_wdt.c
127
reg = readl(dev->reg + CNTR_CTRL(id));
drivers/watchdog/armada_37xx_wdt.c
194
reg = readl(dev->reg + CNTR_CTRL(CNTR_ID_WDOG));
drivers/watchdog/armada_37xx_wdt.c
92
val = readl(dev->reg + CNTR_COUNT_LOW(id));
drivers/watchdog/armada_37xx_wdt.c
93
val |= ((u64)readl(dev->reg + CNTR_COUNT_HIGH(id))) << 32;
drivers/watchdog/aspeed_wdt.c
315
u32 status = readl(wdt->base + WDT_TIMEOUT_STATUS);
drivers/watchdog/aspeed_wdt.c
393
u32 status = readl(wdt->base + WDT_TIMEOUT_STATUS);
drivers/watchdog/aspeed_wdt.c
488
if (readl(wdt->base + WDT_CTRL) & WDT_CTRL_ENABLE) {
drivers/watchdog/aspeed_wdt.c
502
u32 reg = readl(wdt->base + WDT_RESET_WIDTH);
drivers/watchdog/aspeed_wdt.c
556
status = readl(wdt->base + WDT_TIMEOUT_STATUS);
drivers/watchdog/bcm2835_wdt.c
61
cur = readl(wdt->base + PM_RSTC);
drivers/watchdog/dw_wdt.c
104
return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) &
drivers/watchdog/dw_wdt.c
112
val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
drivers/watchdog/dw_wdt.c
173
int top_val = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF;
drivers/watchdog/dw_wdt.c
262
u32 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
drivers/watchdog/dw_wdt.c
325
val = readl(dw_wdt->regs + WDOG_CURRENT_COUNT_REG_OFFSET);
drivers/watchdog/dw_wdt.c
329
val = readl(dw_wdt->regs + WDOG_INTERRUPT_STATUS_REG_OFFSET);
drivers/watchdog/dw_wdt.c
369
val = readl(dw_wdt->regs + WDOG_INTERRUPT_STATUS_REG_OFFSET);
drivers/watchdog/dw_wdt.c
382
dw_wdt->control = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
drivers/watchdog/dw_wdt.c
383
dw_wdt->timeout = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
drivers/watchdog/dw_wdt.c
470
data = readl(dw_wdt->regs + WDOG_COMP_PARAMS_1_REG_OFFSET);
drivers/watchdog/ep93xx_wdt.c
103
val = readl(priv->mmio + EP93XX_WATCHDOG);
drivers/watchdog/iTCO_wdt.c
204
val32 = readl(p->gcs_pmc);
drivers/watchdog/iTCO_wdt.c
210
newval32 = readl(p->gcs_pmc);
drivers/watchdog/imgpdc_wdt.c
104
val = readl(wdt->base + PDC_WDT_CONFIG);
drivers/watchdog/imgpdc_wdt.c
119
val = readl(wdt->base + PDC_WDT_CONFIG) & ~PDC_WDT_CONFIG_DELAY_MASK;
drivers/watchdog/imgpdc_wdt.c
144
val = readl(wdt->base + PDC_WDT_CONFIG);
drivers/watchdog/imgpdc_wdt.c
238
val = readl(pdc_wdt->base + PDC_WDT_TICKLE1);
drivers/watchdog/imx7ulp_wdt.c
106
u32 val = readl(wdt->base + WDOG_CS);
drivers/watchdog/imx7ulp_wdt.c
138
val = readl(wdt->base + WDOG_CS);
drivers/watchdog/imx7ulp_wdt.c
197
val = readl(wdt->base + WDOG_TOVAL);
drivers/watchdog/imx7ulp_wdt.c
250
val = readl(wdt->base + WDOG_CS);
drivers/watchdog/imx7ulp_wdt.c
293
if (readl(wdt->base + WDOG_CS) & WDOG_CS_EN) {
drivers/watchdog/imx7ulp_wdt.c
300
toval = readl(wdt->base + WDOG_TOVAL);
drivers/watchdog/imx7ulp_wdt.c
301
cs = readl(wdt->base + WDOG_CS);
drivers/watchdog/imx7ulp_wdt.c
72
u32 val = readl(base + WDOG_CS);
drivers/watchdog/imx7ulp_wdt.c
86
u32 val = readl(wdt->base + WDOG_CS);
drivers/watchdog/keembay_wdt.c
61
return readl(wdt->base + offset);
drivers/watchdog/loongson1_wdt.c
91
u32 val = readl(drvdata->base + WDT_EN);
drivers/watchdog/lpc18xx_wdt.c
129
val = readl(lpc18xx_wdt->base + LPC18XX_WDT_TV);
drivers/watchdog/lpc18xx_wdt.c
141
val = readl(lpc18xx_wdt->base + LPC18XX_WDT_MOD);
drivers/watchdog/lpc18xx_wdt.c
168
val = readl(lpc18xx_wdt->base + LPC18XX_WDT_MOD);
drivers/watchdog/meson_gxbb_wdt.c
103
reg = readl(data->reg_base + GXBB_WDT_TCNT_REG);
drivers/watchdog/meson_gxbb_wdt.c
194
ctrl_reg = readl(data->reg_base + GXBB_WDT_CTRL_REG) &
drivers/watchdog/meson_gxbb_wdt.c
55
writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) | GXBB_WDT_CTRL_EN,
drivers/watchdog/meson_gxbb_wdt.c
65
writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) & ~GXBB_WDT_CTRL_EN,
drivers/watchdog/meson_wdt.c
114
reg = readl(meson_wdt->wdt_base + MESON_WDT_TC);
drivers/watchdog/meson_wdt.c
129
reg = readl(meson_wdt->wdt_base + MESON_WDT_TC);
drivers/watchdog/meson_wdt.c
92
reg = readl(meson_wdt->wdt_base + MESON_WDT_TC);
drivers/watchdog/mtk_wdt.c
141
tmp = readl(data->wdt_base + WDT_SWSYSRST_EN);
drivers/watchdog/mtk_wdt.c
163
tmp = readl(data->wdt_base + WDT_SWSYSRST);
drivers/watchdog/mtk_wdt.c
238
reg = readl(wdt_base + WDT_MODE);
drivers/watchdog/mtk_wdt.c
295
if (readl(wdt_base + WDT_MODE) & WDT_MODE_EN) {
drivers/watchdog/mtk_wdt.c
307
reg = readl(wdt_base + WDT_MODE);
drivers/watchdog/npcm_wdt.c
169
return readl(wdt->reg) & NPCM_WTE;
drivers/watchdog/npcm_wdt.c
60
val = readl(wdt->reg);
drivers/watchdog/orion_wdt.c
218
reg = readl(dev->rstout);
drivers/watchdog/orion_wdt.c
245
reg = readl(dev->rstout);
drivers/watchdog/orion_wdt.c
299
reg = readl(dev->rstout);
drivers/watchdog/orion_wdt.c
318
reg = readl(dev->rstout);
drivers/watchdog/orion_wdt.c
342
enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
drivers/watchdog/orion_wdt.c
343
running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
drivers/watchdog/orion_wdt.c
352
masked = readl(dev->rstout_mask) & dev->data->rstout_mask_bit;
drivers/watchdog/orion_wdt.c
353
enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
drivers/watchdog/orion_wdt.c
354
running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
drivers/watchdog/orion_wdt.c
369
return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
drivers/watchdog/pic32-dmt.c
101
return readl(dmt->regs + DMTPSCNT_REG) / rate;
drivers/watchdog/pic32-dmt.c
115
v = readl(rst_base);
drivers/watchdog/pic32-dmt.c
65
val = readl(dmt->regs + DMTSTAT_REG);
drivers/watchdog/pic32-dmt.c
83
v = readl(dmt->regs + DMTSTAT_REG) & DMTSTAT_WINOPN;
drivers/watchdog/pic32-wdt.c
45
return !!(readl(wdt->regs + WDTCON_REG) & WDTCON_WIN_EN);
drivers/watchdog/pic32-wdt.c
50
u32 v = readl(wdt->regs + WDTCON_REG);
drivers/watchdog/pic32-wdt.c
57
u32 v = readl(wdt->regs + WDTCON_REG);
drivers/watchdog/pic32-wdt.c
64
u32 v = readl(wdt->rst_base);
drivers/watchdog/pnx4008_wdt.c
197
pnx4008_wdd.bootstatus = (readl(WDTIM_RES(wdt_base)) & WDOG_RESET) ?
drivers/watchdog/pnx4008_wdt.c
203
if (readl(WDTIM_CTRL(wdt_base)) & COUNT_ENAB)
drivers/watchdog/pnx4008_wdt.c
90
while (readl(WDTIM_COUNTER(wdt_base)))
drivers/watchdog/qcom-wdt.c
148
return (readl(wdt_addr(wdt, WDT_EN)) & QCOM_WDT_ENABLE);
drivers/watchdog/qcom-wdt.c
276
if (readl(wdt_addr(wdt, WDT_STS)) & 1)
drivers/watchdog/rc32434_wdt.c
69
writel((readl(&addr) | or) & ~nand, &addr)
drivers/watchdog/rti_wdt.c
267
if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
drivers/watchdog/rti_wdt.c
276
heartbeat_ms = readl(wdt->base + RTIDWDPRLD) + 1;
drivers/watchdog/rti_wdt.c
287
wsize = readl(wdt->base + RTIWWDSIZECTRL);
drivers/watchdog/rzv2h_wdt.c
101
u32 reg = readl(priv->wdtdcr + WDTDCR);
drivers/watchdog/rzv2h_wdt.c
94
u32 reg = readl(priv->wdtdcr + WDTDCR);
drivers/watchdog/s32g_wdt.c
102
val = readl(S32G_SWT_CR(wdev->base));
drivers/watchdog/s32g_wdt.c
149
counter = readl(S32G_SWT_CO(wdev->base));
drivers/watchdog/s32g_wdt.c
179
val = readl(S32G_SWT_CR(wdev->base));
drivers/watchdog/s32g_wdt.c
88
val = readl(S32G_SWT_CR(wdev->base));
drivers/watchdog/s3c2410_wdt.c
492
wtcon = readl(wdt->reg_base + S3C2410_WTCON);
drivers/watchdog/s3c2410_wdt.c
513
wtcon = readl(wdt->reg_base + S3C2410_WTCON);
drivers/watchdog/s3c2410_wdt.c
540
wtcon = readl(wdt->reg_base + S3C2410_WTCON);
drivers/watchdog/s3c2410_wdt.c
601
wtcon = readl(wdt->reg_base + S3C2410_WTCON);
drivers/watchdog/s3c2410_wdt.c
870
wtcon = readl(wdt->reg_base + S3C2410_WTCON);
drivers/watchdog/s3c2410_wdt.c
894
wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON);
drivers/watchdog/s3c2410_wdt.c
895
wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT);
drivers/watchdog/sbsa_gwdt.c
137
return readl(gwdt->control_base + SBSA_GWDT_WOR);
drivers/watchdog/sbsa_gwdt.c
210
!(readl(gwdt->control_base + SBSA_GWDT_WCS) & SBSA_GWDT_WCS_WS0))
drivers/watchdog/sbsa_gwdt.c
239
iidr = readl(gwdt->control_base + SBSA_GWDT_W_IIDR);
drivers/watchdog/sbsa_gwdt.c
346
status = readl(cf_base + SBSA_GWDT_WCS);
drivers/watchdog/sp5100_tco.c
114
val = readl(SP5100_WDT_CONTROL(tco->tcobase));
drivers/watchdog/sp5100_tco.c
130
val = readl(SP5100_WDT_CONTROL(tco->tcobase));
drivers/watchdog/sp5100_tco.c
142
val = readl(SP5100_WDT_CONTROL(tco->tcobase));
drivers/watchdog/sp5100_tco.c
166
return readl(SP5100_WDT_COUNT(tco->tcobase));
drivers/watchdog/sp5100_tco.c
297
val = readl(SP5100_WDT_CONTROL(tco->tcobase));
drivers/watchdog/starfive-wdt.c
225
val = readl(wdt->base + wdt->variant->control);
drivers/watchdog/starfive-wdt.c
233
return !!readl(wdt->base + wdt->variant->int_status);
drivers/watchdog/starfive-wdt.c
269
return readl(wdt->base + wdt->variant->value);
drivers/watchdog/starfive-wdt.c
277
val = readl(wdt->base + wdt->variant->enable);
drivers/watchdog/starfive-wdt.c
287
val = readl(wdt->base + wdt->variant->enable);
drivers/watchdog/sunplus_wdt.c
116
val = readl(base + WDT_CNT);
drivers/watchdog/sunxi_wdt.c
112
val = readl(wdt_base + regs->wdt_mode);
drivers/watchdog/sunxi_wdt.c
144
reg = readl(wdt_base + regs->wdt_mode);
drivers/watchdog/sunxi_wdt.c
180
reg = readl(wdt_base + regs->wdt_cfg);
drivers/watchdog/sunxi_wdt.c
187
reg = readl(wdt_base + regs->wdt_mode);
drivers/watchdog/sunxi_wdt.c
91
val = readl(wdt_base + regs->wdt_cfg);
drivers/watchdog/sunxi_wdt.c
98
val = readl(wdt_base + regs->wdt_mode);
drivers/watchdog/tegra_wdt.c
150
val = readl(wdt->wdt_regs + WDT_STS);
drivers/watchdog/via_wdt.c
110
unsigned int ctl = readl(wdt_mem);
drivers/watchdog/via_wdt.c
121
unsigned int ctl = readl(wdt_mem);
drivers/watchdog/via_wdt.c
212
if (readl(wdt_mem) & VIA_WDT_FIRED)
drivers/watchdog/via_wdt.c
77
unsigned int ctl = readl(wdt_mem);
drivers/watchdog/visconti_wdt.c
77
u32 cnt = readl(priv->base + WDT_CNT);
fs/debugfs/file.c
1334
readl(base + regs->offset));
include/asm-generic/io.h
222
#ifndef readl
include/asm-generic/io.h
223
#define readl readl
include/asm-generic/io.h
906
return readl(addr);
include/asm-generic/io.h
966
return swab32(readl(addr));
include/linux/coresight.h
464
cid |= readl(base + CORESIGHT_CIDRn(i)) << (i * 8);
include/linux/coresight.h
514
return readl(csa->base + offset);
include/linux/io-64-nonatomic-hi-lo.h
13
high = readl(p + 1);
include/linux/io-64-nonatomic-hi-lo.h
14
low = readl(p);
include/linux/io-64-nonatomic-lo-hi.h
13
low = readl(p);
include/linux/io-64-nonatomic-lo-hi.h
14
high = readl(p + 1);
include/linux/iopoll.h
228
readx_poll_timeout(readl, addr, val, cond, delay_us, timeout_us)
include/linux/iopoll.h
231
readx_poll_timeout_atomic(readl, addr, val, cond, delay_us, timeout_us)
include/linux/iosys-map.h
360
u32: val__ = readl(vaddr_iomem__), \
include/linux/irq.h
1239
return readl(gc->reg_base + reg_offset);
include/linux/litex.h
21
return le32_to_cpu((__le32 __force)readl(addr));
include/linux/qed/qed_if.h
444
#define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr))
include/linux/reset/bcm63xx_pmb.h
42
cmd = readl(master + PMB_CTRL);
include/linux/reset/bcm63xx_pmb.h
64
*val = readl(master + PMB_RD_DATA);
include/linux/sm501.h
165
#define smc501_readl(addr) readl(addr)
include/media/drv-intf/saa7146.h
23
#define saa7146_read(sxy,adr) readl(sxy->mem+(adr))
include/sound/hdaudio.h
461
#define snd_hdac_reg_readl(bus, addr) readl(addr)
include/sound/hdaudio.h
508
writel(((readl(addr + reg) & ~(mask)) | (val)), addr + reg)
include/ufs/ufshcd.h
1268
readl((hba)->mcq_base + (reg))
include/ufs/ufshcd.h
1278
readl((hba)->mmio_base + (reg))
include/video/tgafb.h
236
return readl(par->tga_regs_base +r);
lib/iomap.c
70
#define mmio_read32be(addr) swab32(readl(addr))
lib/iomap.c
99
IO_COND(addr, return inl(port), return readl(addr));
lib/stmp_device.c
32
while ((readl(addr) & mask) && --timeout)
lib/stmp_device.c
56
while ((!(readl(reset_addr) & STMP_MODULE_CLKGATE)) && --timeout)
rust/helpers/io.c
34
return readl(addr);
sound/arm/aaci.c
130
v = readl(aaci->base + AACI_SLFR);
sound/arm/aaci.c
146
v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
sound/arm/aaci.c
155
v = readl(aaci->base + AACI_SL1RX) >> 12;
sound/arm/aaci.c
157
v = readl(aaci->base + AACI_SL2RX) >> 4;
sound/arm/aaci.c
181
val = readl(aacirun->base + AACI_SR);
sound/arm/aaci.c
226
val = readl(aacirun->base + AACI_SR);
sound/arm/aaci.c
284
val = readl(aacirun->base + AACI_SR);
sound/arm/aaci.c
320
mask = readl(aaci->base + AACI_ALLINTS);
sound/arm/aaci.c
44
v = readl(aaci->base + AACI_SLFR);
sound/arm/aaci.c
46
readl(aaci->base + AACI_SL2RX);
sound/arm/aaci.c
48
readl(aaci->base + AACI_SL1RX);
sound/arm/aaci.c
50
if (maincr != readl(aaci->base + AACI_MAINCR)) {
sound/arm/aaci.c
52
readl(aaci->base + AACI_MAINCR);
sound/arm/aaci.c
552
ie = readl(aacirun->base + AACI_IE);
sound/arm/aaci.c
567
ie = readl(aacirun->base + AACI_IE);
sound/arm/aaci.c
625
ie = readl(aacirun->base + AACI_IE);
sound/arm/aaci.c
648
ie = readl(aacirun->base + AACI_IE);
sound/arm/aaci.c
920
for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
sound/arm/aaci.c
931
readl(aaci->base + AACI_MAINCR);
sound/arm/aaci.c
94
v = readl(aaci->base + AACI_SLFR);
sound/arm/aaci.c
995
readl(aaci->base + AACI_CSCH1);
sound/arm/pxa2xx-ac97-lib.c
107
if (wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_CDONE, 1) <= 0 &&
sound/arm/pxa2xx-ac97-lib.c
108
!((readl(ac97_reg_base + GSR) | gsr_bits) & GSR_CDONE)) {
sound/arm/pxa2xx-ac97-lib.c
110
__func__, reg, readl(ac97_reg_base + GSR) | gsr_bits);
sound/arm/pxa2xx-ac97-lib.c
123
writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR);
sound/arm/pxa2xx-ac97-lib.c
128
writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */
sound/arm/pxa2xx-ac97-lib.c
129
writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */
sound/arm/pxa2xx-ac97-lib.c
145
writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR);
sound/arm/pxa2xx-ac97-lib.c
152
writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */
sound/arm/pxa2xx-ac97-lib.c
153
writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */
sound/arm/pxa2xx-ac97-lib.c
171
writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR);
sound/arm/pxa2xx-ac97-lib.c
182
writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */
sound/arm/pxa2xx-ac97-lib.c
183
writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */
sound/arm/pxa2xx-ac97-lib.c
188
writel(readl(ac97_reg_base + GCR) & (~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN)), ac97_reg_base + GCR);
sound/arm/pxa2xx-ac97-lib.c
216
while (!((readl(ac97_reg_base + GSR) | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--)
sound/arm/pxa2xx-ac97-lib.c
219
gsr = readl(ac97_reg_base + GSR) | gsr_bits;
sound/arm/pxa2xx-ac97-lib.c
253
while (!((readl(ac97_reg_base + GSR) | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--)
sound/arm/pxa2xx-ac97-lib.c
256
gsr = readl(ac97_reg_base + GSR) | gsr_bits;
sound/arm/pxa2xx-ac97-lib.c
271
u32 gcr = readl(ac97_reg_base + GCR);
sound/arm/pxa2xx-ac97-lib.c
282
status = readl(ac97_reg_base + GSR);
sound/arm/pxa2xx-ac97-lib.c
306
writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR);
sound/arm/pxa2xx-ac97-lib.c
387
writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR);
sound/arm/pxa2xx-ac97-lib.c
403
writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR);
sound/arm/pxa2xx-ac97-lib.c
420
return readl(ac97_reg_base + MODR);
sound/arm/pxa2xx-ac97-lib.c
429
return readl(ac97_reg_base + MISR);
sound/arm/pxa2xx-ac97-lib.c
68
val = (readl(reg_addr) & 0xffff);
sound/arm/pxa2xx-ac97-lib.c
71
if (wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE, 1) <= 0 &&
sound/arm/pxa2xx-ac97-lib.c
72
!((readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE)) {
sound/arm/pxa2xx-ac97-lib.c
74
__func__, reg, readl(ac97_reg_base + GSR) | gsr_bits);
sound/arm/pxa2xx-ac97-lib.c
81
val = (readl(reg_addr) & 0xffff);
sound/arm/pxa2xx-ac97-lib.c
83
wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE, 1);
sound/atmel/ac97c.c
382
ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
sound/atmel/ac97c.c
415
bytes = readl(chip->regs + ATMEL_PDC_TPR);
sound/atmel/ac97c.c
432
bytes = readl(chip->regs + ATMEL_PDC_RPR);
sound/hda/codecs/ca0132.c
3657
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3659
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3660
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3676
readl(spec->mem_base + 0x860);
sound/hda/codecs/ca0132.c
3677
readl(spec->mem_base + 0x854);
sound/hda/codecs/ca0132.c
3678
readl(spec->mem_base + 0x840);
sound/hda/codecs/ca0132.c
3682
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3683
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3696
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3698
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3699
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3711
readl(spec->mem_base + 0x860);
sound/hda/codecs/ca0132.c
3712
readl(spec->mem_base + 0x854);
sound/hda/codecs/ca0132.c
3713
readl(spec->mem_base + 0x840);
sound/hda/codecs/ca0132.c
3717
readl(spec->mem_base + 0x210);
sound/hda/codecs/ca0132.c
3718
readl(spec->mem_base + 0x210);
sound/hda/controllers/intel.c
476
val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCAP);
sound/hda/controllers/intel.c
498
val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
sound/hda/controllers/intel.c
505
if (((readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL)) &
sound/hda/controllers/intel.c
522
val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL);
sound/hda/controllers/tegra.c
109
v = readl(hda->regs + HDA_IPFS_CONFIG);
sound/hda/controllers/tegra.c
114
v = readl(hda->regs + HDA_CFG_CMD);
sound/hda/controllers/tegra.c
124
v = readl(hda->regs + HDA_IPFS_INTR_MASK);
sound/hda/controllers/tegra.c
310
val = readl(hda->regs + FPCI_DBG_CFG_2) & ~FPCI_GCAP_NSDO_MASK;
sound/hda/core/bus.c
245
v = readl(aligned_addr);
sound/hda/core/bus.c
258
v = readl(aligned_addr);
sound/hda/core/ext/controller.c
104
leptr = readl(hlink->ml_addr + AZX_REG_ML_LEPTR);
sound/hda/core/ext/controller.c
196
val = readl(hlink->ml_addr + AZX_REG_ML_LCTL);
sound/hda/core/ext/controller.c
87
link_count = readl(bus->mlcap + AZX_REG_ML_MLCD) + 1;
sound/hda/core/ext/controller.c
99
hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
sound/hda/core/ext/stream.c
207
val = readl(hext_stream->pplc_addr + AZX_REG_PPLCCTL) &
sound/hda/core/ext/stream.c
220
val = readl(hext_stream->pplc_addr + AZX_REG_PPLCCTL) & AZX_PPLCCTL_STRST;
sound/hda/core/ext/stream.c
242
val = readl(hext_stream->pplc_addr + AZX_REG_PPLCCTL);
sound/mips/snd-n64.c
78
return readl(priv->mi_reg_base + reg);
sound/pci/ad1889.c
111
return readl(chip->iobase + reg);
sound/pci/atiixp.c
1499
snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
sound/pci/atiixp.c
303
old_data = data = readl(addr);
sound/pci/atiixp.c
318
readl(chip->remap_addr + ATI_REG_##reg)
sound/pci/atiixp.c
652
curptr = readl(chip->remap_addr + dma->ops->dt_cur);
sound/pci/atiixp.c
661
readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
sound/pci/atiixp.c
731
dma->saved_curptr = readl(chip->remap_addr +
sound/pci/atiixp_modem.c
1130
snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
sound/pci/atiixp_modem.c
271
old_data = data = readl(addr);
sound/pci/atiixp_modem.c
286
readl(chip->remap_addr + ATI_REG_##reg)
sound/pci/atiixp_modem.c
601
curptr = readl(chip->remap_addr + dma->ops->dt_cur);
sound/pci/atiixp_modem.c
610
readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
sound/pci/au88x0/au88x0.h
26
#define hwread(x,y) readl((x)+(y))
sound/pci/aw2/aw2-saa7146.c
29
#define READREG(addr) readl(chip->base_addr + (addr))
sound/pci/bt87x.c
203
return readl(chip->mmio + reg);
sound/pci/cs4281.c
503
return readl(chip->ba0 + offset);
sound/pci/cs46xx/cs46xx_lib.h
62
return readl(chip->region.idx[bank+1].remap_addr + offset);
sound/pci/cs46xx/cs46xx_lib.h
72
return readl(chip->region.name.ba0.remap_addr + offset);
sound/pci/cs46xx/dsp_spos.c
559
val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
sound/pci/cs46xx/dsp_spos.c
624
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
646
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
662
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
677
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
693
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
709
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
725
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
740
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
755
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos.c
771
snd_iprintf(buffer,"%08X ",readl(dst + i));
sound/pci/cs46xx/dsp_spos_scb_lib.c
74
snd_iprintf(buffer,"%08x ",readl(dst + (scb->address + j) * sizeof(u32)));
sound/pci/ctxfi/cthw20k1.c
1815
data[i] = readl(mem_base + UAA_CORE_CHANGE);
sound/pci/ctxfi/cthw20k2.c
2251
return readl(hw->mem_base + reg);
sound/pci/echoaudio/echoaudio.h
447
return readl(&chip->dsp_registers[index]);
sound/pci/korg1212/korg1212.c
1050
doorbellValue = readl(korg1212->inDoorbellPtr);
sound/pci/korg1212/korg1212.c
543
mailBox3Lo = readl(korg1212->mailbox3Ptr);
sound/pci/lola/lola.h
378
readl((chip)->bar[idx].remap_addr + LOLA_##idx##_##name)
sound/pci/lola/lola.h
391
readl((chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
sound/pci/lola/lola_mixer.c
217
oldval = val = readl(&chip->mixer.array->src_gain_enable);
sound/pci/lola/lola_mixer.c
281
val = readl(&chip->mixer.array->dest_mix_gain_enable[dest]);
sound/pci/lola/lola_mixer.c
638
mask = readl(&chip->mixer.array->src_gain_enable);
sound/pci/lola/lola_mixer.c
721
mask = readl(&chip->mixer.array->dest_mix_gain_enable[dst]);
sound/pci/lola/lola_proc.c
167
readl(chip->bar[BAR0].remap_addr + i));
sound/pci/lola/lola_proc.c
172
readl(chip->bar[BAR1].remap_addr + i));
sound/pci/lola/lola_proc.c
177
readl(chip->bar[BAR1].remap_addr + i));
sound/pci/mixart/mixart_core.c
404
it_reg = readl(MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
sound/pci/nm256/nm256.c
1323
sig = readl(temp);
sound/pci/nm256/nm256.c
1325
u32 pointer = readl(temp + 4);
sound/pci/nm256/nm256.c
276
return readl(chip->cport + offset);
sound/pci/rme32.c
1378
rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
sound/pci/rme32.c
237
return (readl(rme32->iobase + RME32_IO_GET_POS)
sound/pci/rme32.c
748
rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
sound/pci/rme32.c
764
rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
sound/pci/rme96.c
1067
rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
sound/pci/rme96.c
1072
rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
sound/pci/rme96.c
1095
rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
sound/pci/rme96.c
1666
rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
sound/pci/rme96.c
2298
rme96->playback_pointer = readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
sound/pci/rme96.c
2300
rme96->capture_pointer = readl(rme96->iobase + RME96_IO_GET_REC_POS)
sound/pci/rme96.c
296
return (readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
sound/pci/rme96.c
303
return (readl(rme96->iobase + RME96_IO_GET_REC_POS)
sound/pci/rme96.c
606
rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
sound/pci/rme9652/hdsp.c
4543
u32 val = readl(src);
sound/pci/rme9652/hdsp.c
4551
rms_low = readl(src_low);
sound/pci/rme9652/hdsp.c
4552
rms_high = readl(src_high);
sound/pci/rme9652/hdsp.c
4561
rms_low = readl(src_low) & 0xffffff00;
sound/pci/rme9652/hdsp.c
4562
rms_high = readl(src_high) & 0xffffff00;
sound/pci/rme9652/hdsp.c
643
return readl (hdsp->iobase + reg);
sound/pci/rme9652/hdspm.c
1142
return readl(hdspm->iobase + reg);
sound/pci/rme9652/hdspm.c
6106
readl(hdspm->iobase +
sound/pci/rme9652/hdspm.c
6109
readl(hdspm->iobase +
sound/pci/rme9652/hdspm.c
6112
readl(hdspm->iobase +
sound/pci/rme9652/hdspm.c
6116
((uint64_t) readl(hdspm->iobase +
sound/pci/rme9652/hdspm.c
6118
(uint64_t) readl(hdspm->iobase +
sound/pci/rme9652/hdspm.c
6121
((uint64_t)readl(hdspm->iobase +
sound/pci/rme9652/hdspm.c
6123
(uint64_t)readl(hdspm->iobase +
sound/pci/rme9652/hdspm.c
6126
((uint64_t)readl(hdspm->iobase +
sound/pci/rme9652/hdspm.c
6128
(uint64_t)readl(hdspm->iobase +
sound/pci/rme9652/rme9652.c
306
return readl(rme9652->iobase + reg);
sound/pci/sis7019.c
548
readl(ctrl_base);
sound/pci/sis7019.c
628
cso = readl(voice->ctrl_base + SIS_PLAY_DMA_FORMAT_CSO);
sound/pci/sis7019.c
825
readl(rec_base);
sound/pci/ymfpci/ymfpci_main.c
51
return readl(chip->reg_area_virt + offset);
sound/sh/aica.c
130
regval = readl(ARM_RESET_REGISTER);
sound/sh/aica.c
138
regval = readl(SPU_REGISTER_BASE + (i * 0x80));
sound/sh/aica.c
151
u32 regval = readl(ARM_RESET_REGISTER);
sound/sh/aica.c
300
readl
sound/sh/aica.c
402
return readl(AICA_CONTROL_CHANNEL_SAMPLE_NUMBER);
sound/sh/aica.c
73
if (!(readl(G2_FIFO) & 0x11))
sound/soc/amd/acp-pcm-dma.c
120
return readl(acp_mmio + (reg * 4));
sound/soc/amd/acp/acp-i2s.c
266
val = readl(chip->base + reg_val);
sound/soc/amd/acp/acp-i2s.c
272
val = readl(chip->base + reg_val);
sound/soc/amd/acp/acp-i2s.c
457
val = readl(chip->base + reg_val);
sound/soc/amd/acp/acp-i2s.c
497
val = readl(chip->base + reg_val);
sound/soc/amd/acp/acp-i2s.c
501
if (!(readl(chip->base + ACP_BTTDM_ITER) & BIT(0)) &&
sound/soc/amd/acp/acp-i2s.c
502
!(readl(chip->base + ACP_BTTDM_IRER) & BIT(0)))
sound/soc/amd/acp/acp-i2s.c
504
if (!(readl(chip->base + ACP_I2STDM_ITER) & BIT(0)) &&
sound/soc/amd/acp/acp-i2s.c
505
!(readl(chip->base + ACP_I2STDM_IRER) & BIT(0)))
sound/soc/amd/acp/acp-i2s.c
507
if (!(readl(chip->base + ACP_HSTDM_ITER) & BIT(0)) &&
sound/soc/amd/acp/acp-i2s.c
508
!(readl(chip->base + ACP_HSTDM_IRER) & BIT(0)))
sound/soc/amd/acp/acp-i2s.c
619
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, rsrc->irqp_used));
sound/soc/amd/acp/acp-legacy-common.c
125
ext_intr_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, rsrc->irqp_used));
sound/soc/amd/acp/acp-legacy-common.c
175
pdm_ctrl = readl(chip->base + ACP_WOV_MISC_CTRL);
sound/soc/amd/acp/acp-legacy-common.c
196
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, 0));
sound/soc/amd/acp/acp-legacy-common.c
299
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, rsrc->irqp_used));
sound/soc/amd/acp/acp-legacy-common.c
365
val = readl(chip->base + reg_val);
sound/soc/amd/acp/acp-legacy-common.c
401
val = readl(base + acp_pgfsm_stat_reg);
sound/soc/amd/acp/acp-legacy-common.c
498
val = readl(chip->base + ACP3X_PIN_CONFIG);
sound/soc/amd/acp/acp-legacy-common.c
514
val = readl(chip->base + ACP_PIN_CONFIG);
sound/soc/amd/acp/acp-legacy-common.c
543
val = readl(chip->base + ACP_PIN_CONFIG);
sound/soc/amd/acp/acp-legacy-common.c
90
ext_intr_stat1 = readl(ACP_EXTERNAL_INTR_STAT(chip, (rsrc->irqp_used - 1)));
sound/soc/amd/acp/acp-legacy-common.c
92
ext_intr_stat = readl(ACP_EXTERNAL_INTR_STAT(chip, rsrc->irqp_used));
sound/soc/amd/acp/acp-pdm.c
156
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, 0));
sound/soc/amd/acp/acp-pdm.c
171
ext_int_ctrl = readl(ACP_EXTERNAL_INTR_CNTL(chip, 0));
sound/soc/amd/acp/acp-pdm.c
40
dmic_ctrl = readl(chip->base + ACP_WOV_MISC_CTRL);
sound/soc/amd/acp/acp-pdm.c
75
dma_enable = readl(chip->base + ACP_WOV_PDM_DMA_ENABLE);
sound/soc/amd/acp/acp-pdm.c
88
dma_enable = readl(chip->base + ACP_WOV_PDM_DMA_ENABLE);
sound/soc/amd/acp/amd.h
321
high = readl(chip->base + ACP_BT_TX_LINEARPOSITIONCNTR_HIGH(chip));
sound/soc/amd/acp/amd.h
322
low = readl(chip->base + ACP_BT_TX_LINEARPOSITIONCNTR_LOW(chip));
sound/soc/amd/acp/amd.h
325
high = readl(chip->base + ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH(chip));
sound/soc/amd/acp/amd.h
326
low = readl(chip->base + ACP_I2S_TX_LINEARPOSITIONCNTR_LOW(chip));
sound/soc/amd/acp/amd.h
329
high = readl(chip->base + ACP_HS_TX_LINEARPOSITIONCNTR_HIGH);
sound/soc/amd/acp/amd.h
330
low = readl(chip->base + ACP_HS_TX_LINEARPOSITIONCNTR_LOW);
sound/soc/amd/acp/amd.h
339
high = readl(chip->base + ACP_BT_RX_LINEARPOSITIONCNTR_HIGH(chip));
sound/soc/amd/acp/amd.h
340
low = readl(chip->base + ACP_BT_RX_LINEARPOSITIONCNTR_LOW(chip));
sound/soc/amd/acp/amd.h
343
high = readl(chip->base + ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH(chip));
sound/soc/amd/acp/amd.h
344
low = readl(chip->base + ACP_I2S_RX_LINEARPOSITIONCNTR_LOW(chip));
sound/soc/amd/acp/amd.h
347
high = readl(chip->base + ACP_HS_RX_LINEARPOSITIONCNTR_HIGH);
sound/soc/amd/acp/amd.h
348
low = readl(chip->base + ACP_HS_RX_LINEARPOSITIONCNTR_LOW);
sound/soc/amd/acp/amd.h
351
high = readl(chip->base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH);
sound/soc/amd/acp/amd.h
352
low = readl(chip->base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW);
sound/soc/amd/ps/pci-ps.c
209
ext_intr_stat = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
sound/soc/amd/ps/pci-ps.c
218
ext_intr_stat1 = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT1);
sound/soc/amd/ps/pci-ps.c
49
ext_intr_stat1 = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT1);
sound/soc/amd/ps/ps-common.c
107
config = readl(acp_data->acp63_base + ACP_PIN_CONFIG);
sound/soc/amd/ps/ps-common.c
138
sdw0_en = readl(adata->acp63_base + ACP_SW0_EN);
sound/soc/amd/ps/ps-common.c
139
sdw1_en = readl(adata->acp63_base + ACP_SW1_EN);
sound/soc/amd/ps/ps-common.c
147
val = readl(adata->acp63_base + ACP_SW0_WAKE_EN);
sound/soc/amd/ps/ps-common.c
151
val = readl(adata->acp63_base + ACP_SW1_WAKE_EN);
sound/soc/amd/ps/ps-common.c
163
adata->acp_sw_pad_keeper_en = readl(adata->acp63_base + ACP_SW0_PAD_KEEPER_EN);
sound/soc/amd/ps/ps-common.c
164
adata->acp_pad_pulldown_ctrl = readl(adata->acp63_base + ACP_PAD_PULLDOWN_CTRL);
sound/soc/amd/ps/ps-common.c
215
acp_sw_pad_keeper_en = readl(adata->acp63_base + ACP_SW0_PAD_KEEPER_EN);
sound/soc/amd/ps/ps-common.c
26
val = readl(acp_base + ACP_PGFSM_STATUS);
sound/soc/amd/ps/ps-common.c
263
val = readl(acp_base + ACP_PGFSM_STATUS);
sound/soc/amd/ps/ps-common.c
295
ext_intr_cntl1 = readl(acp_base + ACP_EXTERNAL_INTR_CNTL1);
sound/soc/amd/ps/ps-common.c
306
sdw0_wake_en = readl(acp_base + ACP_SW0_WAKE_EN);
sound/soc/amd/ps/ps-common.c
307
sdw1_wake_en = readl(acp_base + ACP_SW1_WAKE_EN);
sound/soc/amd/ps/ps-common.c
358
config = readl(acp_data->acp63_base + ACP_PIN_CONFIG);
sound/soc/amd/ps/ps-common.c
420
adata->acp_sw_pad_keeper_en = readl(adata->acp63_base + ACP_SW0_PAD_KEEPER_EN);
sound/soc/amd/ps/ps-common.c
421
adata->acp_pad_pulldown_ctrl = readl(adata->acp63_base + ACP_PAD_PULLDOWN_CTRL);
sound/soc/amd/ps/ps-common.c
474
acp_sw_pad_keeper_en = readl(adata->acp63_base + ACP_SW0_PAD_KEEPER_EN);
sound/soc/amd/ps/ps-pdm-dma.c
118
pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
sound/soc/amd/ps/ps-pdm-dma.c
134
pdm_enable = readl(acp_base + ACP_WOV_PDM_ENABLE);
sound/soc/amd/ps/ps-pdm-dma.c
135
pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
sound/soc/amd/ps/ps-pdm-dma.c
141
pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
sound/soc/amd/ps/ps-pdm-dma.c
243
high = readl(rtd->acp63_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH);
sound/soc/amd/ps/ps-pdm-dma.c
245
low = readl(rtd->acp63_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW);
sound/soc/amd/ps/ps-pdm-dma.c
62
pdm_ctrl = readl(acp_base + ACP_WOV_MISC_CTRL);
sound/soc/amd/ps/ps-pdm-dma.c
73
ext_int_ctrl = readl(adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
sound/soc/amd/ps/ps-pdm-dma.c
84
ext_int_ctrl = readl(adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
sound/soc/amd/ps/ps-pdm-dma.c
96
pdm_enable = readl(acp_base + ACP_WOV_PDM_ENABLE);
sound/soc/amd/ps/ps-pdm-dma.c
97
pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
sound/soc/amd/ps/ps-sdw-dma.c
190
ext_intr_cntl = readl(acp_base + ACP_EXTERNAL_INTR_CNTL);
sound/soc/amd/ps/ps-sdw-dma.c
193
ext_intr_cntl1 = readl(acp_base + ACP_EXTERNAL_INTR_CNTL1);
sound/soc/amd/ps/ps-sdw-dma.c
197
ext_intr_cntl = readl(acp_base + ACP_EXTERNAL_INTR_CNTL);
sound/soc/amd/ps/ps-sdw-dma.c
200
ext_intr_cntl1 = readl(acp_base + ACP_EXTERNAL_INTR_CNTL1);
sound/soc/amd/ps/ps-sdw-dma.c
425
ext_intr_ctrl = readl(sdw_data->acp_base + acp_ext_intr_cntl_reg);
sound/soc/amd/ps/ps-sdw-dma.c
474
byte_count.bcount.high = readl(acp_base + pos_high_reg);
sound/soc/amd/ps/ps-sdw-dma.c
475
byte_count.bcount.low = readl(acp_base + pos_low_reg);
sound/soc/amd/raven/acp3x.h
116
return readl(base_addr - ACP3x_PHY_BASE_ADDRESS);
sound/soc/amd/renoir/rn_acp3x.h
84
return readl(base_addr - ACP_PHY_BASE_ADDRESS);
sound/soc/amd/rpl/rpl_acp6x.h
30
return readl(base_addr - ACP6x_PHY_BASE_ADDRESS);
sound/soc/amd/vangogh/acp5x.h
142
return readl(base_addr - ACP5x_PHY_BASE_ADDRESS);
sound/soc/amd/yc/acp6x.h
101
return readl(base_addr - ACP6x_PHY_BASE_ADDRESS);
sound/soc/bcm/cygnus-pcm.c
409
regval = readl(aio->cygaud->audio + p_rbuf->rdaddr);
sound/soc/bcm/cygnus-pcm.c
414
regval = readl(aio->cygaud->audio + p_rbuf->wraddr);
sound/soc/bcm/cygnus-pcm.c
440
esr_status0 = readl(audio_io + ESR0_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
441
esr_status0 &= ~readl(audio_io + ESR0_MASK_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
442
esr_status1 = readl(audio_io + ESR1_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
443
esr_status1 &= ~readl(audio_io + ESR1_MASK_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
444
esr_status3 = readl(audio_io + ESR3_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
445
esr_status3 &= ~readl(audio_io + ESR3_MASK_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
503
esr_status2 = readl(audio_io + ESR2_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
504
esr_status2 &= ~readl(audio_io + ESR2_MASK_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
505
esr_status4 = readl(audio_io + ESR4_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
506
esr_status4 &= ~readl(audio_io + ESR4_MASK_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
549
r5_status = readl(cygaud->audio + INTH_R5F_STATUS_OFFSET);
sound/soc/bcm/cygnus-pcm.c
678
cur = readl(aio->cygaud->audio + p_rbuf->rdaddr);
sound/soc/bcm/cygnus-pcm.c
680
cur = readl(aio->cygaud->audio + p_rbuf->wraddr);
sound/soc/bcm/cygnus-pcm.c
682
base = readl(aio->cygaud->audio + p_rbuf->baseaddr);
sound/soc/bcm/cygnus-ssp.c
1026
value = readl(aio->cygaud->i2s_in + aio->regs.i2s_cap_cfg);
sound/soc/bcm/cygnus-ssp.c
1034
value = readl(aio->cygaud->audio + aio->regs.i2s_cfg);
sound/soc/bcm/cygnus-ssp.c
1055
val = readl(aio->cygaud->audio + aio->regs.i2s_mclk_cfg);
sound/soc/bcm/cygnus-ssp.c
251
value = readl(aio->cygaud->audio + aio->regs.i2s_stream_cfg);
sound/soc/bcm/cygnus-ssp.c
265
value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
sound/soc/bcm/cygnus-ssp.c
272
value = readl(aio->cygaud->i2s_in +
sound/soc/bcm/cygnus-ssp.c
282
value = readl(aio->cygaud->audio + aio->regs.bf_destch_cfg);
sound/soc/bcm/cygnus-ssp.c
290
value = readl(aio->cygaud->audio + AUD_MISC_SEROUT_OE_REG_BASE);
sound/soc/bcm/cygnus-ssp.c
297
value = readl(aio->cygaud->audio + SPDIF_CTRL_OFFSET);
sound/soc/bcm/cygnus-ssp.c
302
value = readl(aio->cygaud->audio + SPDIF_STREAM_CFG_OFFSET);
sound/soc/bcm/cygnus-ssp.c
308
value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
sound/soc/bcm/cygnus-ssp.c
315
value = readl(aio->cygaud->audio + AUD_MISC_SEROUT_OE_REG_BASE);
sound/soc/bcm/cygnus-ssp.c
331
value = readl(aio->cygaud->audio + aio->regs.bf_destch_cfg);
sound/soc/bcm/cygnus-ssp.c
337
value = readl(aio->cygaud->audio + aio->regs.i2s_cfg);
sound/soc/bcm/cygnus-ssp.c
342
value = readl(aio->cygaud->i2s_in + aio->regs.i2s_cap_stream_cfg);
sound/soc/bcm/cygnus-ssp.c
353
value = readl(aio->cygaud->i2s_in + aio->regs.i2s_cap_stream_cfg);
sound/soc/bcm/cygnus-ssp.c
361
value = readl(aio->cygaud->audio + aio->regs.i2s_cfg);
sound/soc/bcm/cygnus-ssp.c
369
value = readl(aio->cygaud->audio + aio->regs.bf_destch_cfg);
sound/soc/bcm/cygnus-ssp.c
381
value = readl(aio->cygaud->audio + aio->regs.i2s_stream_cfg);
sound/soc/bcm/cygnus-ssp.c
387
value = readl(aio->cygaud->audio + aio->regs.i2s_cfg);
sound/soc/bcm/cygnus-ssp.c
392
value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
sound/soc/bcm/cygnus-ssp.c
399
value = readl(aio->cygaud->audio + SPDIF_FORMAT_CFG_OFFSET);
sound/soc/bcm/cygnus-ssp.c
405
value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
sound/soc/bcm/cygnus-ssp.c
429
value = readl(aio->cygaud->audio + aio->regs.i2s_cfg);
sound/soc/bcm/cygnus-ssp.c
436
value = readl(aio->cygaud->audio + BF_SRC_GRP_SYNC_DIS_OFFSET);
sound/soc/bcm/cygnus-ssp.c
442
value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
sound/soc/bcm/cygnus-ssp.c
447
value = readl(aio->cygaud->audio + BF_SRC_GRP_SYNC_DIS_OFFSET);
sound/soc/bcm/cygnus-ssp.c
451
value = readl(aio->cygaud->audio + aio->regs.i2s_stream_cfg);
sound/soc/bcm/cygnus-ssp.c
456
value = readl(aio->cygaud->i2s_in + IOP_SW_INIT_LOGIC);
sound/soc/bcm/cygnus-ssp.c
463
value = readl(aio->cygaud->audio + SPDIF_FORMAT_CFG_OFFSET);
sound/soc/bcm/cygnus-ssp.c
468
value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
sound/soc/bcm/cygnus-ssp.c
584
value = readl(aio->cygaud->audio + aio->regs.i2s_cfg);
sound/soc/bcm/cygnus-ssp.c
599
value = readl(aio->cygaud->audio + aio->regs.i2s_mclk_cfg);
sound/soc/bcm/cygnus-ssp.c
646
value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
sound/soc/bcm/cygnus-ssp.c
665
value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg);
sound/soc/bcm/cygnus-ssp.c
674
value = readl(aio->cygaud->audio +
sound/soc/bcm/cygnus-ssp.c
682
value = readl(aio->cygaud->audio +
sound/soc/bcm/cygnus-ssp.c
725
value = readl(aio->cygaud->audio + aio->regs.i2s_mclk_cfg);
sound/soc/bcm/cygnus-ssp.c
765
val = readl(aio->cygaud->audio + aio->regs.i2s_mclk_cfg);
sound/soc/bcm/cygnus-ssp.c
886
ssp_curcfg = readl(aio->cygaud->audio + aio->regs.i2s_cfg);
sound/soc/bcm/cygnus-ssp.c
894
ssp_curcfg = readl(aio->cygaud->i2s_in + aio->regs.i2s_cap_cfg);
sound/soc/bcm/cygnus-ssp.c
898
val = readl(aio->cygaud->audio + AUD_MISC_SEROUT_OE_REG_BASE);
sound/soc/codecs/jz4725b.c
560
tmp = readl(icdc->base + ICDC_RGADW_OFFSET);
sound/soc/codecs/jz4725b.c
567
*val = readl(icdc->base + ICDC_RGDATA_OFFSET) &
sound/soc/codecs/jz4760.c
761
tmp = readl(codec->base + ICDC_RGADW_OFFSET);
sound/soc/codecs/jz4760.c
768
*val = readl(codec->base + ICDC_RGDATA_OFFSET) &
sound/soc/codecs/jz4770.c
806
tmp = readl(codec->base + ICDC_RGADW_OFFSET);
sound/soc/codecs/jz4770.c
813
*val = readl(codec->base + ICDC_RGDATA_OFFSET) &
sound/soc/dwc/dwc-i2s.c
38
return readl(io_base + reg);
sound/soc/fsl/imx-audmux.c
330
regcache[i] = readl(audmux_base + i * 4);
sound/soc/fsl/imx-audmux.c
68
ptcr = readl(audmux_base + IMX_AUDMUX_V2_PTCR(port));
sound/soc/fsl/imx-audmux.c
69
pdcr = readl(audmux_base + IMX_AUDMUX_V2_PDCR(port));
sound/soc/google/chv3-i2s.c
108
return readl(i2s->iobase + offset);
sound/soc/google/chv3-i2s.c
116
reg = readl(i2s->iobase_irq + I2S_IRQ_CLR);
sound/soc/hisilicon/hi6210-i2s.c
87
return readl(i2s->base + reg);
sound/soc/img/img-i2s-in.c
107
return readl(i2s->channel_base + (chan * IMG_I2S_IN_CH_STRIDE) + reg);
sound/soc/img/img-i2s-in.c
95
return readl(i2s->base + reg);
sound/soc/img/img-i2s-out.c
106
return readl(i2s->base + reg);
sound/soc/img/img-i2s-out.c
118
return readl(i2s->channel_base + (chan * IMG_I2S_OUT_CH_STRIDE) + reg);
sound/soc/img/img-parallel-out.c
75
return readl(prl->base + reg);
sound/soc/img/img-spdif-in.c
121
return readl(spdif->base + reg);
sound/soc/img/img-spdif-out.c
91
return readl(spdif->base + reg);
sound/soc/intel/atom/sst/sst_pvt.c
38
return readl(addr + offset);
sound/soc/intel/avs/apl.c
123
#define avs_apl_is_entry_stackdump(addr) ((readl(addr) >> 30) & 0x1)
sound/soc/intel/avs/core.c
333
status = readl(bus->ppcap + AZX_REG_PP_PPSTS);
sound/soc/intel/avs/pcm.c
1154
host_stream->pphcllpl = readl(host_stream->pphc_addr + AZX_REG_PPHCLLPL);
sound/soc/intel/avs/pcm.c
1155
host_stream->pphcllpu = readl(host_stream->pphc_addr + AZX_REG_PPHCLLPU);
sound/soc/intel/avs/pcm.c
1156
host_stream->pphcldpl = readl(host_stream->pphc_addr + AZX_REG_PPHCLDPL);
sound/soc/intel/avs/pcm.c
1157
host_stream->pphcldpu = readl(host_stream->pphc_addr + AZX_REG_PPHCLDPU);
sound/soc/intel/avs/pcm.c
1318
return readl(hdac_stream(stream)->bus->remap_addr + AZX_REG_VS_SDXDPIB_XBASE +
sound/soc/intel/avs/skl.c
128
write = readl(avs_sram_addr(adev, AVS_FW_REGS_WINDOW) + FW_REGS_DBG_LOG_WP(msg->log.core));
sound/soc/intel/catpt/registers.h
155
readl(catpt_shim_addr(cdev) + CATPT_SHIM_##reg)
sound/soc/intel/catpt/registers.h
167
readl(cdev->pci_ba + CATPT_PCI_##reg)
sound/soc/intel/keembay/kmb_platform.c
146
readl(i2s_base + LRBR_LTHR(j));
sound/soc/intel/keembay/kmb_platform.c
148
readl(i2s_base + RRBR_RTHR(j));
sound/soc/intel/keembay/kmb_platform.c
151
readl(i2s_base + LRBR_LTHR(j));
sound/soc/intel/keembay/kmb_platform.c
153
readl(i2s_base + RRBR_RTHR(j));
sound/soc/intel/keembay/kmb_platform.c
189
readl(kmb_i2s->i2s_base + TOR(i));
sound/soc/intel/keembay/kmb_platform.c
192
readl(kmb_i2s->i2s_base + ROR(i));
sound/soc/intel/keembay/kmb_platform.c
208
irq = readl(kmb_i2s->i2s_base + IMR(i));
sound/soc/intel/keembay/kmb_platform.c
305
isr[i] = readl(kmb_i2s->i2s_base + ISR(i));
sound/soc/intel/keembay/kmb_platform.c
310
tx_enabled = readl(kmb_i2s->i2s_base + ITER);
sound/soc/intel/keembay/kmb_platform.c
420
dma_reg = readl(kmb_i2s->i2s_base + I2S_DMACR);
sound/soc/intel/keembay/kmb_platform.c
434
dma_reg = readl(kmb_i2s->i2s_base + I2S_DMACR);
sound/soc/intel/keembay/kmb_platform.c
868
comp1_reg = readl(kmb_i2s->i2s_base + I2S_COMP_PARAM_1);
sound/soc/kirkwood/kirkwood-dma.c
232
readl(priv->io + KIRKWOOD_PLAY_BYTE_COUNT));
sound/soc/kirkwood/kirkwood-dma.c
235
readl(priv->io + KIRKWOOD_REC_BYTE_COUNT));
sound/soc/kirkwood/kirkwood-dma.c
46
mask = readl(priv->io + KIRKWOOD_INT_MASK);
sound/soc/kirkwood/kirkwood-dma.c
47
status = readl(priv->io + KIRKWOOD_INT_CAUSE) & mask;
sound/soc/kirkwood/kirkwood-dma.c
49
cause = readl(priv->io + KIRKWOOD_ERR_CAUSE);
sound/soc/kirkwood/kirkwood-i2s.c
121
reg_val = readl(base + A38X_PLL_CONF_REG0);
sound/soc/kirkwood/kirkwood-i2s.c
126
reg_val = readl(base + A38X_PLL_CONF_REG2);
sound/soc/kirkwood/kirkwood-i2s.c
131
reg_val = readl(base + A38X_PLL_CONF_REG1);
sound/soc/kirkwood/kirkwood-i2s.c
175
value = readl(priv->io+KIRKWOOD_I2S_PLAYCTL);
sound/soc/kirkwood/kirkwood-i2s.c
180
value = readl(priv->io+KIRKWOOD_I2S_RECCTL);
sound/soc/kirkwood/kirkwood-i2s.c
210
value = readl(io + KIRKWOOD_DCO_SPCR_STATUS);
sound/soc/kirkwood/kirkwood-i2s.c
269
i2s_value = readl(priv->io+i2s_reg);
sound/soc/kirkwood/kirkwood-i2s.c
354
ctl = readl(priv->io + KIRKWOOD_PLAYCTL);
sound/soc/kirkwood/kirkwood-i2s.c
364
ctl = readl(priv->io + KIRKWOOD_PLAYCTL);
sound/soc/kirkwood/kirkwood-i2s.c
389
value = readl(priv->io + KIRKWOOD_INT_MASK);
sound/soc/kirkwood/kirkwood-i2s.c
404
value = readl(priv->io + KIRKWOOD_INT_MASK);
sound/soc/kirkwood/kirkwood-i2s.c
441
value = readl(priv->io + KIRKWOOD_RECCTL);
sound/soc/kirkwood/kirkwood-i2s.c
456
value = readl(priv->io + KIRKWOOD_INT_MASK);
sound/soc/kirkwood/kirkwood-i2s.c
466
value = readl(priv->io + KIRKWOOD_RECCTL);
sound/soc/kirkwood/kirkwood-i2s.c
470
value = readl(priv->io + KIRKWOOD_INT_MASK);
sound/soc/kirkwood/kirkwood-i2s.c
475
value = readl(priv->io + KIRKWOOD_RECCTL);
sound/soc/kirkwood/kirkwood-i2s.c
482
value = readl(priv->io + KIRKWOOD_RECCTL);
sound/soc/kirkwood/kirkwood-i2s.c
489
value = readl(priv->io + KIRKWOOD_RECCTL);
sound/soc/kirkwood/kirkwood-i2s.c
522
reg_data = readl(priv->io + 0x1200);
sound/soc/kirkwood/kirkwood-i2s.c
529
reg_data = readl(priv->io + 0x1200);
sound/soc/kirkwood/kirkwood-i2s.c
535
value = readl(priv->io + KIRKWOOD_PLAYCTL);
sound/soc/kirkwood/kirkwood-i2s.c
539
value = readl(priv->io + KIRKWOOD_RECCTL);
sound/soc/kirkwood/kirkwood-i2s.c
69
reg_val = readl(priv->soc_control);
sound/soc/kirkwood/kirkwood-i2s.c
95
reg_val = readl(base + A38X_PLL_CONF_REG1);
sound/soc/loongson/loongson_dma.c
112
while ((readl(order_reg) & DMA_ORDER_START))
sound/soc/loongson/loongson_dma.c
85
while (readl(order_reg) & DMA_ORDER_ASK_VALID)
sound/soc/loongson/loongson_i2s_plat.c
105
val = readl(regs);
sound/soc/pxa/pxa2xx-i2s.c
115
readl(i2s_reg_base + SADR);
sound/soc/pxa/pxa2xx-i2s.c
177
writel(readl(i2s_reg_base + SACR0) | (SACR0_BCKD), i2s_reg_base + SACR0);
sound/soc/pxa/pxa2xx-i2s.c
179
writel(readl(i2s_reg_base + SACR0) | (SACR0_RFTH(14) | SACR0_TFTH(1)), i2s_reg_base + SACR0);
sound/soc/pxa/pxa2xx-i2s.c
180
writel(readl(i2s_reg_base + SACR1) | (pxa_i2s.fmt), i2s_reg_base + SACR1);
sound/soc/pxa/pxa2xx-i2s.c
183
writel(readl(i2s_reg_base + SAIMR) | (SAIMR_TFS), i2s_reg_base + SAIMR);
sound/soc/pxa/pxa2xx-i2s.c
185
writel(readl(i2s_reg_base + SAIMR) | (SAIMR_RFS), i2s_reg_base + SAIMR);
sound/soc/pxa/pxa2xx-i2s.c
222
writel(readl(i2s_reg_base + SACR1) & (~SACR1_DRPL), i2s_reg_base + SACR1);
sound/soc/pxa/pxa2xx-i2s.c
224
writel(readl(i2s_reg_base + SACR1) & (~SACR1_DREC), i2s_reg_base + SACR1);
sound/soc/pxa/pxa2xx-i2s.c
225
writel(readl(i2s_reg_base + SACR0) | (SACR0_ENB), i2s_reg_base + SACR0);
sound/soc/pxa/pxa2xx-i2s.c
244
writel(readl(i2s_reg_base + SACR1) | (SACR1_DRPL), i2s_reg_base + SACR1);
sound/soc/pxa/pxa2xx-i2s.c
245
writel(readl(i2s_reg_base + SAIMR) & (~SAIMR_TFS), i2s_reg_base + SAIMR);
sound/soc/pxa/pxa2xx-i2s.c
247
writel(readl(i2s_reg_base + SACR1) | (SACR1_DREC), i2s_reg_base + SACR1);
sound/soc/pxa/pxa2xx-i2s.c
248
writel(readl(i2s_reg_base + SAIMR) & (~SAIMR_RFS), i2s_reg_base + SAIMR);
sound/soc/pxa/pxa2xx-i2s.c
251
if ((readl(i2s_reg_base + SACR1) & (SACR1_DREC | SACR1_DRPL)) == (SACR1_DREC | SACR1_DRPL)) {
sound/soc/pxa/pxa2xx-i2s.c
252
writel(readl(i2s_reg_base + SACR0) & (~SACR0_ENB), i2s_reg_base + SACR0);
sound/soc/pxa/pxa2xx-i2s.c
265
pxa_i2s.sacr0 = readl(i2s_reg_base + SACR0);
sound/soc/pxa/pxa2xx-i2s.c
266
pxa_i2s.sacr1 = readl(i2s_reg_base + SACR1);
sound/soc/pxa/pxa2xx-i2s.c
267
pxa_i2s.saimr = readl(i2s_reg_base + SAIMR);
sound/soc/pxa/pxa2xx-i2s.c
268
pxa_i2s.sadiv = readl(i2s_reg_base + SADIV);
sound/soc/pxa/pxa2xx-i2s.c
271
writel(readl(i2s_reg_base + SACR0) & (~SACR0_ENB), i2s_reg_base + SACR0);
sound/soc/pxa/pxa2xx-i2s.c
312
writel(readl(i2s_reg_base + SAIMR) & (~(SAIMR_RFS | SAIMR_TFS)), i2s_reg_base + SAIMR);
sound/soc/qcom/apq8016_sbc.c
70
writel(readl(pdata->spkr_iomux) | SPKR_CTL_PRI_WS_SLAVE_SEL_11,
sound/soc/qcom/apq8016_sbc.c
76
writel(readl(pdata->mic_iomux) | MIC_CTRL_QUA_WS_SLAVE_SEL_10 |
sound/soc/qcom/apq8016_sbc.c
82
value = readl(pdata->spkr_iomux) &
sound/soc/qcom/apq8016_sbc.c
90
writel(readl(pdata->mic_iomux) | MIC_CTRL_TER_WS_SLAVE_SEL |
sound/soc/renesas/rz-ssi.c
162
return readl(priv->base + reg);
sound/soc/renesas/rz-ssi.c
170
val = readl(priv->base + reg);
sound/soc/samsung/i2s.c
1024
u32 reg = readl(priv->addr + I2SFIC);
sound/soc/samsung/i2s.c
1032
delay = FICS_TXCOUNT(readl(priv->addr + I2SFICS));
sound/soc/samsung/i2s.c
1223
priv->suspend_i2smod = readl(priv->addr + I2SMOD);
sound/soc/samsung/i2s.c
1224
priv->suspend_i2scon = readl(priv->addr + I2SCON);
sound/soc/samsung/i2s.c
1225
priv->suspend_i2spsr = readl(priv->addr + I2SPSR);
sound/soc/samsung/i2s.c
1308
u32 val = readl(priv->addr + I2SPSR);
sound/soc/samsung/i2s.c
150
active = readl(i2s->priv->addr + I2SCON);
sound/soc/samsung/i2s.c
188
active = readl(i2s->priv->addr + I2SCON) & CON_RXDMA_ACTIVE;
sound/soc/samsung/i2s.c
254
rfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->rfs_off;
sound/soc/samsung/i2s.c
273
u32 mod = readl(priv->addr + I2SMOD);
sound/soc/samsung/i2s.c
314
bfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->bfs_off;
sound/soc/samsung/i2s.c
334
u32 mod = readl(priv->addr + I2SMOD);
sound/soc/samsung/i2s.c
385
int blc = readl(i2s->priv->addr + I2SMOD);
sound/soc/samsung/i2s.c
402
u32 con = readl(addr + I2SCON);
sound/soc/samsung/i2s.c
403
u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
sound/soc/samsung/i2s.c
453
u32 con = readl(addr + I2SCON);
sound/soc/samsung/i2s.c
454
u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
sound/soc/samsung/i2s.c
493
writel(readl(fic) | flush, fic);
sound/soc/samsung/i2s.c
500
writel(readl(fic) & ~flush, fic);
sound/soc/samsung/i2s.c
519
mod = readl(priv->addr + I2SMOD);
sound/soc/samsung/i2s.c
616
mod = readl(priv->addr + I2SMOD);
sound/soc/samsung/i2s.c
701
mod = readl(priv->addr + I2SMOD);
sound/soc/samsung/i2s.c
805
mod = readl(priv->addr + I2SMOD);
sound/soc/samsung/idma.c
111
u32 val = readl(idma.regs + I2SAHB);
sound/soc/samsung/idma.c
146
u32 mod = readl(idma.regs + I2SMOD);
sound/soc/samsung/idma.c
147
u32 ahb = readl(idma.regs + I2SAHB);
sound/soc/samsung/idma.c
262
iisahb = readl(idma.regs + I2SAHB);
sound/soc/samsung/idma.c
270
addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr;
sound/soc/samsung/idma.c
61
(readl(idma.regs + I2STRNCNT) & 0xffffff) * 4;
sound/soc/samsung/idma.c
86
val = readl(idma.regs + I2SSIZE);
sound/soc/samsung/idma.c
92
val = readl(idma.regs + I2SAHB);
sound/soc/samsung/pcm.c
159
clkctl = readl(regs + S3C_PCM_CLKCTL);
sound/soc/samsung/pcm.c
160
ctl = readl(regs + S3C_PCM_CTL);
sound/soc/samsung/pcm.c
190
ctl = readl(regs + S3C_PCM_CTL);
sound/soc/samsung/pcm.c
191
clkctl = readl(regs + S3C_PCM_CLKCTL);
sound/soc/samsung/pcm.c
284
clkctl = readl(regs + S3C_PCM_CLKCTL);
sound/soc/samsung/pcm.c
331
ctl = readl(regs + S3C_PCM_CTL);
sound/soc/samsung/pcm.c
411
u32 clkctl = readl(regs + S3C_PCM_CLKCTL);
sound/soc/samsung/spdif.c
112
clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
sound/soc/samsung/spdif.c
127
clkcon = readl(spdif->regs + CLKCON);
sound/soc/samsung/spdif.c
201
con = readl(regs + CON) & CON_MASK;
sound/soc/samsung/spdif.c
202
cstas = readl(regs + CSTAS) & CSTAS_MASK;
sound/soc/samsung/spdif.c
203
clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
sound/soc/samsung/spdif.c
289
con = readl(regs + CON) & CON_MASK;
sound/soc/samsung/spdif.c
290
clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
sound/soc/samsung/spdif.c
306
spdif->saved_clkcon = readl(spdif->regs + CLKCON) & CLKCTL_MASK;
sound/soc/samsung/spdif.c
307
spdif->saved_con = readl(spdif->regs + CON) & CON_MASK;
sound/soc/samsung/spdif.c
308
spdif->saved_cstas = readl(spdif->regs + CSTAS) & CSTAS_MASK;
sound/soc/sof/imx/imx8.c
141
pwrctl = readl(chip->dap + IMX8M_DAP_PWRCTL);
sound/soc/sof/imx/imx8.c
151
pwrctl = readl(chip->dap + IMX8M_DAP_PWRCTL);
sound/soc/sof/intel/bdw.c
136
reg = readl(sdev->bar[BDW_PCI_BAR] + PCI_PMCS)
sound/soc/sof/intel/hda-dai-ops.c
354
hext_stream->pplcllpl = readl(hext_stream->pplc_addr + AZX_REG_PPLCLLPL);
sound/soc/sof/intel/hda-dai-ops.c
355
hext_stream->pplcllpu = readl(hext_stream->pplc_addr + AZX_REG_PPLCLLPU);
sound/soc/sof/intel/hda-mlink.c
116
hlink->lcaps = readl(ml_addr + AZX_REG_ML_LCAP);
sound/soc/sof/intel/hda-mlink.c
146
h2link->leptr = readl(ml_addr + AZX_REG_ML_LEPTR);
sound/soc/sof/intel/hda-mlink.c
211
val = readl(lctl);
sound/soc/sof/intel/hda-mlink.c
232
val = readl(lctl);
sound/soc/sof/intel/hda-mlink.c
245
val = readl(lctl);
sound/soc/sof/intel/hda-mlink.c
258
val = readl(lctl);
sound/soc/sof/intel/hda-mlink.c
271
val = readl(lctl);
sound/soc/sof/intel/hda-mlink.c
282
reg_read = readl(base + offset);
sound/soc/sof/intel/hda-mlink.c
298
val = readl(lsync);
sound/soc/sof/intel/hda-mlink.c
320
val = readl(lsync);
sound/soc/sof/intel/hda-mlink.c
330
val = readl(lsync);
sound/soc/sof/intel/hda-mlink.c
340
val = readl(lsync);
sound/soc/sof/intel/hda-mlink.c
377
u32 val = readl(lctl);
sound/soc/sof/intel/hda-mlink.c
435
link_count = readl(bus->mlcap + AZX_REG_ML_MLCD) + 1;
sound/soc/sof/intel/hda-stream.c
1203
llp_l = readl(hext_stream->pplc_addr + AZX_REG_PPLCLLPL);
sound/soc/sof/intel/hda-stream.c
1204
llp_u = readl(hext_stream->pplc_addr + AZX_REG_PPLCLLPU);
sound/soc/sof/intel/hda-stream.c
1240
ldp_l = readl(hext_stream->pphc_addr + AZX_REG_PPHCLDPL);
sound/soc/sof/intel/hda-stream.c
1241
ldp_u = readl(hext_stream->pphc_addr + AZX_REG_PPHCLDPU);
sound/soc/sof/iomem-utils.c
34
return readl(addr);
sound/soc/sof/mediatek/mt8195/mt8195.c
125
srampool_con = readl(va_dspsysreg);
sound/soc/sof/mediatek/mt8195/mt8195.c
156
if (offset != readl(vaddr_emi_map)) {
sound/soc/sof/mediatek/mt8195/mt8195.c
157
dev_err(dev, "write emi map fail : %#x\n", readl(vaddr_emi_map));
sound/soc/sof/ops.h
355
return readl(sdev->bar[bar] + offset);
sound/soc/sophgo/cv1800b-sound-adc.c
122
val = readl(priv->regs + CV1800B_RXADC_CLK);
sound/soc/sophgo/cv1800b-sound-adc.c
135
val = readl(priv->regs + CV1800B_RXADC_CTRL0);
sound/soc/sophgo/cv1800b-sound-adc.c
175
val = readl(priv->regs + CV1800B_RXADCC_CTRL1);
sound/soc/sophgo/cv1800b-sound-adc.c
236
u32 ana0 = readl(priv->regs + CV1800B_RXADC_ANA0);
sound/soc/sophgo/cv1800b-sound-adc.c
256
val = readl(priv->regs + CV1800B_RXADC_ANA0);
sound/soc/sophgo/cv1800b-sound-dac.c
54
val = readl(priv->regs + CV1800B_TXDAC_CTRL0);
sound/soc/sophgo/cv1800b-sound-dac.c
68
val = readl(priv->regs + CV1800B_TXDAC_ANA2);
sound/soc/sophgo/cv1800b-sound-dac.c
81
val = readl(priv->regs + CV1800B_TXDAC_CTRL1);
sound/soc/sophgo/cv1800b-sound-dac.c
94
val = readl(priv->regs + CV1800B_TXDAC_AFE0);
sound/soc/sophgo/cv1800b-tdm.c
152
val = readl(i2s->base + CV1800B_FIFO_RESET);
sound/soc/sophgo/cv1800b-tdm.c
159
val = readl(i2s->base + CV1800B_FIFO_RESET);
sound/soc/sophgo/cv1800b-tdm.c
169
val = readl(i2s->base + CV1800B_I2S_RESET);
sound/soc/sophgo/cv1800b-tdm.c
176
val = readl(i2s->base + CV1800B_I2S_RESET);
sound/soc/sophgo/cv1800b-tdm.c
186
val = readl(i2s->base + CV1800B_CLK_CTRL1);
sound/soc/sophgo/cv1800b-tdm.c
196
val = readl(i2s->base + CV1800B_BLK_MODE_SETTING);
sound/soc/sophgo/cv1800b-tdm.c
209
val = readl(i2s->base + CV1800B_CLK_CTRL1);
sound/soc/sophgo/cv1800b-tdm.c
238
val = readl(i2s->base + CV1800B_DATA_FORMAT);
sound/soc/sophgo/cv1800b-tdm.c
248
val = readl(i2s->base + CV1800B_CLK_CTRL0);
sound/soc/sophgo/cv1800b-tdm.c
281
val = readl(i2s->base + CV1800B_SLOT_SETTING1);
sound/soc/sophgo/cv1800b-tdm.c
287
val = readl(i2s->base + CV1800B_FRAME_SETTING);
sound/soc/sophgo/cv1800b-tdm.c
437
val = readl(i2s->base + CV1800B_I2S_ENABLE);
sound/soc/sophgo/cv1800b-tdm.c
512
val = readl(i2s->base + CV1800B_BLK_MODE_SETTING);
sound/soc/sophgo/cv1800b-tdm.c
543
val = readl(i2s->base + CV1800B_CLK_CTRL0);
sound/soc/sophgo/cv1800b-tdm.c
588
val = readl(i2s->base + CV1800B_I2S_ENABLE);
sound/soc/sophgo/cv1800b-tdm.c
592
val = readl(i2s->base + CV1800B_CLK_CTRL0);
sound/soc/sophgo/cv1800b-tdm.c
597
val = readl(i2s->base + CV1800B_I2S_RESET);
sound/soc/sophgo/cv1800b-tdm.c
602
val = readl(i2s->base + CV1800B_FIFO_RESET);
sound/soc/sophgo/cv1800b-tdm.c
612
val = readl(i2s->base + CV1800B_BLK_MODE_SETTING);
sound/soc/sophgo/cv1800b-tdm.c
616
val = readl(i2s->base + CV1800B_CLK_CTRL0);
sound/soc/sophgo/cv1800b-tdm.c
622
val = readl(i2s->base + CV1800B_FIFO_THRESHOLD);
sound/soc/sophgo/cv1800b-tdm.c
628
val = readl(i2s->base + CV1800B_I2S_ENABLE);
sound/soc/spacemit/k1_i2s.c
120
val = readl(i2s->base + SSCR);
sound/soc/spacemit/k1_i2s.c
183
val = readl(i2s->base + SSCR);
sound/soc/spacemit/k1_i2s.c
216
sspsp_val = readl(i2s->base + SSPSP);
sound/soc/spacemit/k1_i2s.c
254
val = readl(i2s->base + SSCR);
sound/soc/spacemit/k1_i2s.c
267
val = readl(i2s->base + SSCR);
sound/soc/spear/spdif_in.c
128
ctrl = readl(host->io_base + SPDIF_IN_CTRL);
sound/soc/spear/spdif_in.c
137
ctrl = readl(host->io_base + SPDIF_IN_CTRL);
sound/soc/spear/spdif_in.c
183
u32 irq_status = readl(host->io_base + SPDIF_IN_IRQ);
sound/soc/spear/spdif_in.c
79
u32 ctrl = readl(host->io_base + SPDIF_IN_CTRL);
sound/soc/spear/spdif_out.c
165
ctrl = readl(host->io_base + SPDIF_OUT_CTRL);
sound/soc/spear/spdif_out.c
178
ctrl = readl(host->io_base + SPDIF_OUT_CTRL);
sound/soc/spear/spdif_out.c
197
val = readl(host->io_base + SPDIF_OUT_CTRL);
sound/soc/spear/spdif_out.c
48
writel(readl(host->io_base + SPDIF_OUT_SOFT_RST) & ~SPDIF_OUT_RESET,
sound/soc/spear/spdif_out.c
99
ctrl = readl(host->io_base + SPDIF_OUT_CTRL);
sound/soc/starfive/jh7110_pwmdac.c
108
return readl(io_base + reg);
sound/soc/sunxi/sun8i-adda-pr-regmap.c
35
writel(readl(base) | ADDA_PR_RESET, base);
sound/soc/sunxi/sun8i-adda-pr-regmap.c
38
writel(readl(base) & ~ADDA_PR_WRITE, base);
sound/soc/sunxi/sun8i-adda-pr-regmap.c
41
tmp = readl(base);
sound/soc/sunxi/sun8i-adda-pr-regmap.c
47
*val = readl(base) & ADDA_PR_DATA_OUT_MASK;
sound/soc/sunxi/sun8i-adda-pr-regmap.c
58
writel(readl(base) | ADDA_PR_RESET, base);
sound/soc/sunxi/sun8i-adda-pr-regmap.c
61
tmp = readl(base);
sound/soc/sunxi/sun8i-adda-pr-regmap.c
67
tmp = readl(base);
sound/soc/sunxi/sun8i-adda-pr-regmap.c
73
writel(readl(base) | ADDA_PR_WRITE, base);
sound/soc/sunxi/sun8i-adda-pr-regmap.c
76
writel(readl(base) & ~ADDA_PR_WRITE, base);
sound/soc/ux500/ux500_msp_i2s.c
203
temp_reg = readl(msp->registers + MSP_GCR) & ~TX_CLK_POL_RISING;
sound/soc/ux500/ux500_msp_i2s.c
206
temp_reg = readl(msp->registers + MSP_GCR) & ~RX_CLK_POL_RISING;
sound/soc/ux500/ux500_msp_i2s.c
222
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
261
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
291
reg_val_MCR = readl(msp->registers + MSP_MCR);
sound/soc/ux500/ux500_msp_i2s.c
312
reg_val_MCR = readl(msp->registers + MSP_MCR);
sound/soc/ux500/ux500_msp_i2s.c
331
reg_val_MCR = readl(msp->registers + MSP_MCR);
sound/soc/ux500/ux500_msp_i2s.c
363
reg_val_DMACR = readl(msp->registers + MSP_DMACR);
sound/soc/ux500/ux500_msp_i2s.c
373
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
384
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
387
reg_val_FLR = readl(msp->registers + MSP_FLR);
sound/soc/ux500/ux500_msp_i2s.c
389
readl(msp->registers + MSP_DR);
sound/soc/ux500/ux500_msp_i2s.c
390
reg_val_FLR = readl(msp->registers + MSP_FLR);
sound/soc/ux500/ux500_msp_i2s.c
401
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
405
reg_val_FLR = readl(msp->registers + MSP_FLR);
sound/soc/ux500/ux500_msp_i2s.c
407
readl(msp->registers + MSP_TSTDR);
sound/soc/ux500/ux500_msp_i2s.c
408
reg_val_FLR = readl(msp->registers + MSP_FLR);
sound/soc/ux500/ux500_msp_i2s.c
462
old_reg = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
488
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
490
reg_val_DMACR = readl(msp->registers + MSP_DMACR);
sound/soc/ux500/ux500_msp_i2s.c
492
reg_val_IMSC = readl(msp->registers + MSP_IMSC);
sound/soc/ux500/ux500_msp_i2s.c
504
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
506
reg_val_DMACR = readl(msp->registers + MSP_DMACR);
sound/soc/ux500/ux500_msp_i2s.c
508
reg_val_IMSC = readl(msp->registers + MSP_IMSC);
sound/soc/ux500/ux500_msp_i2s.c
521
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
525
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
533
writel((readl(msp->registers + MSP_GCR) &
sound/soc/ux500/ux500_msp_i2s.c
540
writel((readl(msp->registers + MSP_GCR) &
sound/soc/ux500/ux500_msp_i2s.c
572
reg_val_GCR = readl(msp->registers + MSP_GCR);
sound/soc/ux500/ux500_msp_i2s.c
601
writel((readl(msp->registers + MSP_GCR) &
sound/soc/xilinx/xlnx_formatter_pcm.c
251
val = readl(mmio_base + XLNX_AUD_CTRL);
sound/soc/xilinx/xlnx_formatter_pcm.c
255
val = readl(mmio_base + XLNX_AUD_CTRL);
sound/soc/xilinx/xlnx_formatter_pcm.c
260
val = readl(mmio_base + XLNX_AUD_CTRL);
sound/soc/xilinx/xlnx_formatter_pcm.c
272
val = readl(mmio_base + XLNX_AUD_CTRL);
sound/soc/xilinx/xlnx_formatter_pcm.c
288
val = readl(reg);
sound/soc/xilinx/xlnx_formatter_pcm.c
307
val = readl(reg);
sound/soc/xilinx/xlnx_formatter_pcm.c
367
val = readl(adata->mmio + XLNX_AUD_CORE_CONFIG);
sound/soc/xilinx/xlnx_formatter_pcm.c
412
val = readl(stream_data->mmio + XLNX_AUD_CTRL);
sound/soc/xilinx/xlnx_formatter_pcm.c
446
pos = readl(stream_data->mmio + XLNX_AUD_XFER_COUNT);
sound/soc/xilinx/xlnx_formatter_pcm.c
484
val = readl(stream_data->mmio + XLNX_AUD_STS);
sound/soc/xilinx/xlnx_formatter_pcm.c
486
aes_reg1_val = readl(stream_data->mmio +
sound/soc/xilinx/xlnx_formatter_pcm.c
488
aes_reg2_val = readl(stream_data->mmio +
sound/soc/xilinx/xlnx_formatter_pcm.c
505
val = readl(stream_data->mmio + XLNX_AUD_CTRL);
sound/soc/xilinx/xlnx_formatter_pcm.c
551
val = readl(stream_data->mmio + XLNX_AUD_CTRL);
sound/soc/xilinx/xlnx_formatter_pcm.c
558
val = readl(stream_data->mmio + XLNX_AUD_CTRL);
sound/soc/xilinx/xlnx_formatter_pcm.c
619
val = readl(aud_drv_data->mmio + XLNX_AUD_CORE_CONFIG);
sound/soc/xilinx/xlnx_i2s.c
229
drv_data->is_32bit_lrclk = readl(drv_data->base + I2S_CORE_CTRL_OFFSET) &
sound/soc/xilinx/xlnx_spdif.c
141
val = readl(ctx->base + XSPDIF_CONTROL_REG);
sound/soc/xilinx/xlnx_spdif.c
175
val = readl(ctx->base + XSPDIF_CONTROL_REG);
sound/soc/xilinx/xlnx_spdif.c
60
val = readl(ctx->base + XSPDIF_IRQ_STS_REG);
sound/soc/xilinx/xlnx_spdif.c
64
val = readl(ctx->base +
sound/soc/xilinx/xlnx_spdif.c
83
val = readl(ctx->base + XSPDIF_CONTROL_REG);
tools/arch/x86/include/asm/io.h
21
build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
tools/arch/x86/include/asm/io.h
37
#define readl readl
tools/include/asm-generic/io.h
179
#ifndef readl
tools/include/asm-generic/io.h
180
#define readl readl
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
136
return readl(base + offset);
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
283
uint32_t val = readl(redist_base + GICR_WAKER);
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
290
while (readl(redist_base + GICR_WAKER) & GICR_WAKER_ChildrenAsleep) {
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
394
readl(GICD_BASE_GVA + GICD_TYPER));
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
47
while (readl(GICD_BASE_GVA + GICD_CTLR) & GICD_CTLR_RWP) {
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
63
while (readl(gicr_base_cpu(cpu) + GICR_CTLR) & GICR_CTLR_RWP) {
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
128
status = readl(bar0 + IDXD_CMDSTS_OFFSET);
tools/testing/selftests/vfio/lib/drivers/dsa/dsa.c
62
cmd_cap = readl(bar0 + IDXD_CMDCAP_OFFSET);
tools/testing/selftests/vfio/lib/drivers/ioat/ioat.c
142
readl(registers + IOAT_CHANERR_OFFSET),
tools/testing/selftests/vfio/lib/drivers/ioat/ioat.c
76
errors = readl(registers + IOAT_CHANERR_OFFSET);
