root/arch/mips/pci/ops-bonito64.c
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 1999, 2000, 2004  MIPS Technologies, Inc.
 *      All rights reserved.
 *      Authors: Carsten Langgaard <carstenl@mips.com>
 *               Maciej W. Rozycki <macro@mips.com>
 *
 * MIPS boards specific PCI support.
 */
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>

#include <asm/mips-boards/bonito64.h>

#define PCI_ACCESS_READ  0
#define PCI_ACCESS_WRITE 1

#define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset))
#define ID_SEL_BEGIN 10
#define MAX_DEV_NUM (31 - ID_SEL_BEGIN)


static int bonito64_pcibios_config_access(unsigned char access_type,
                                      struct pci_bus *bus,
                                      unsigned int devfn, int where,
                                      u32 * data)
{
        u32 busnum = bus->number;
        u32 addr, type;
        u32 dummy;
        void *addrp;
        int device = PCI_SLOT(devfn);
        int function = PCI_FUNC(devfn);
        int reg = where & ~3;

        if (busnum == 0) {
                /* Type 0 configuration for onboard PCI bus */
                if (device > MAX_DEV_NUM)
                        return -1;

                addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg;
                type = 0;
        } else {
                /* Type 1 configuration for offboard PCI bus */
                addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
                type = 0x10000;
        }

        /* Clear aborts */
        BONITO_PCICMD |= BONITO_PCICMD_MABORT_CLR | BONITO_PCICMD_MTABORT_CLR;

        BONITO_PCIMAP_CFG = (addr >> 16) | type;

        /* Flush Bonito register block */
        dummy = BONITO_PCIMAP_CFG;
        mmiowb();

        addrp = CFG_SPACE_REG(addr & 0xffff);
        if (access_type == PCI_ACCESS_WRITE) {
                writel(cpu_to_le32(*data), addrp);
                /* Wait till done */
                while (BONITO_PCIMSTAT & 0xF);
        } else {
                *data = le32_to_cpu(readl(addrp));
        }

        /* Detect Master/Target abort */
        if (BONITO_PCICMD & (BONITO_PCICMD_MABORT_CLR |
                             BONITO_PCICMD_MTABORT_CLR)) {
                /* Error occurred */

                /* Clear bits */
                BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
                                  BONITO_PCICMD_MTABORT_CLR);

                return -1;
        }

        return 0;

}


/*
 * We can't address 8 and 16 bit words directly.  Instead we have to
 * read/write a 32bit word and mask/modify the data we actually want.
 */
static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn,
                             int where, int size, u32 * val)
{
        u32 data = 0;

        if ((size == 2) && (where & 1))
                return PCIBIOS_BAD_REGISTER_NUMBER;
        else if ((size == 4) && (where & 3))
                return PCIBIOS_BAD_REGISTER_NUMBER;

        if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
                                       &data))
                return -1;

        if (size == 1)
                *val = (data >> ((where & 3) << 3)) & 0xff;
        else if (size == 2)
                *val = (data >> ((where & 3) << 3)) & 0xffff;
        else
                *val = data;

        return PCIBIOS_SUCCESSFUL;
}

static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn,
                              int where, int size, u32 val)
{
        u32 data = 0;

        if ((size == 2) && (where & 1))
                return PCIBIOS_BAD_REGISTER_NUMBER;
        else if ((size == 4) && (where & 3))
                return PCIBIOS_BAD_REGISTER_NUMBER;

        if (size == 4)
                data = val;
        else {
                if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
                                               where, &data))
                        return -1;

                if (size == 1)
                        data = (data & ~(0xff << ((where & 3) << 3))) |
                                (val << ((where & 3) << 3));
                else if (size == 2)
                        data = (data & ~(0xffff << ((where & 3) << 3))) |
                                (val << ((where & 3) << 3));
        }

        if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
                                       &data))
                return -1;

        return PCIBIOS_SUCCESSFUL;
}

struct pci_ops bonito64_pci_ops = {
        .read = bonito64_pcibios_read,
        .write = bonito64_pcibios_write
};