Symbol: val
bin/chflags/chflags.c
132
val = strtol(flags, &ep, 8);
bin/chflags/chflags.c
133
if (val < 0)
bin/chflags/chflags.c
139
set = val;
bin/chflags/chflags.c
62
long val;
bin/chio/chio.c
177
int val;
bin/chio/chio.c
226
val = parse_special(*argv);
bin/chio/chio.c
227
switch (val) {
bin/chio/chio.c
255
int val;
bin/chio/chio.c
328
val = parse_special(*argv);
bin/chio/chio.c
330
switch (val) {
bin/chio/chio.c
364
int val;
bin/chio/chio.c
395
val = parse_special(*argv);
bin/chio/chio.c
396
switch (val) {
bin/chio/chio.c
889
int val;
bin/chio/chio.c
891
val = is_special(cp);
bin/chio/chio.c
892
if (val)
bin/chio/chio.c
893
return (val);
bin/date/vary.c
129
adjyear(struct tm *t, char type, int64_t val, int mk)
bin/date/vary.c
133
t->tm_year += val;
bin/date/vary.c
136
t->tm_year -= val;
bin/date/vary.c
139
t->tm_year = val;
bin/date/vary.c
150
adjmon(struct tm *t, char type, int64_t val, int istext, int mk)
bin/date/vary.c
154
if (val < 0)
bin/date/vary.c
160
if (val <= t->tm_mon)
bin/date/vary.c
161
val += 11 - t->tm_mon; /* early next year */
bin/date/vary.c
163
val -= t->tm_mon + 1; /* later this year */
bin/date/vary.c
165
if (val) {
bin/date/vary.c
166
if (!adjyear(t, '+', (t->tm_mon + val) / 12, 0))
bin/date/vary.c
168
val %= 12;
bin/date/vary.c
169
t->tm_mon += val;
bin/date/vary.c
177
if (val-1 > t->tm_mon)
bin/date/vary.c
178
val = 13 - val + t->tm_mon; /* later last year */
bin/date/vary.c
180
val = t->tm_mon - val + 1; /* early this year */
bin/date/vary.c
182
if (val) {
bin/date/vary.c
183
if (!adjyear(t, '-', val / 12, 0))
bin/date/vary.c
185
val %= 12;
bin/date/vary.c
186
if (val > t->tm_mon) {
bin/date/vary.c
189
val -= 12;
bin/date/vary.c
191
t->tm_mon -= val;
bin/date/vary.c
196
if (val > 12 || val < 1)
bin/date/vary.c
198
t->tm_mon = --val;
bin/date/vary.c
210
adjday(struct tm *t, char type, int64_t val, int mk)
bin/date/vary.c
216
while (val) {
bin/date/vary.c
218
if (val > lmdays - t->tm_mday) {
bin/date/vary.c
219
val -= lmdays - t->tm_mday + 1;
bin/date/vary.c
224
t->tm_mday += val;
bin/date/vary.c
225
val = 0;
bin/date/vary.c
230
while (val)
bin/date/vary.c
231
if (val >= t->tm_mday) {
bin/date/vary.c
232
val -= t->tm_mday;
bin/date/vary.c
238
t->tm_mday -= val;
bin/date/vary.c
239
val = 0;
bin/date/vary.c
243
if (val > 0 && val <= daysinmonth(t))
bin/date/vary.c
244
t->tm_mday = val;
bin/date/vary.c
254
adjwday(struct tm *t, char type, int64_t val, int istext, int mk)
bin/date/vary.c
256
if (val < 0)
bin/date/vary.c
262
if (val < t->tm_wday)
bin/date/vary.c
263
val = 7 - t->tm_wday + val; /* early next week */
bin/date/vary.c
265
val -= t->tm_wday; /* later this week */
bin/date/vary.c
267
val *= 7; /* "-v+5w" == "5 weeks in the future" */
bin/date/vary.c
268
return !val || adjday(t, '+', val, mk);
bin/date/vary.c
271
if (val > t->tm_wday)
bin/date/vary.c
272
val = 7 - val + t->tm_wday; /* later last week */
bin/date/vary.c
274
val = t->tm_wday - val; /* early this week */
bin/date/vary.c
276
val *= 7; /* "-v-5w" == "5 weeks ago" */
bin/date/vary.c
277
return !val || adjday(t, '-', val, mk);
bin/date/vary.c
279
if (val < t->tm_wday)
bin/date/vary.c
280
return adjday(t, '-', t->tm_wday - val, mk);
bin/date/vary.c
281
else if (val > 6)
bin/date/vary.c
283
else if (val > t->tm_wday)
bin/date/vary.c
284
return adjday(t, '+', val - t->tm_wday, mk);
bin/date/vary.c
290
adjhour(struct tm *t, char type, int64_t val, int mk)
bin/date/vary.c
292
if (val < 0)
bin/date/vary.c
297
if (val) {
bin/date/vary.c
300
days = (t->tm_hour + val) / 24;
bin/date/vary.c
301
val %= 24;
bin/date/vary.c
302
t->tm_hour += val;
bin/date/vary.c
310
if (val) {
bin/date/vary.c
313
days = val / 24;
bin/date/vary.c
314
val %= 24;
bin/date/vary.c
315
if (val > t->tm_hour) {
bin/date/vary.c
317
val -= 24;
bin/date/vary.c
319
t->tm_hour -= val;
bin/date/vary.c
326
if (val > 23)
bin/date/vary.c
328
t->tm_hour = val;
bin/date/vary.c
335
adjmin(struct tm *t, char type, int64_t val, int mk)
bin/date/vary.c
337
if (val < 0)
bin/date/vary.c
342
if (val) {
bin/date/vary.c
343
if (!adjhour(t, '+', (t->tm_min + val) / 60, 0))
bin/date/vary.c
345
val %= 60;
bin/date/vary.c
346
t->tm_min += val;
bin/date/vary.c
353
if (val) {
bin/date/vary.c
354
if (!adjhour(t, '-', val / 60, 0))
bin/date/vary.c
356
val %= 60;
bin/date/vary.c
357
if (val > t->tm_min) {
bin/date/vary.c
360
val -= 60;
bin/date/vary.c
362
t->tm_min -= val;
bin/date/vary.c
367
if (val > 59)
bin/date/vary.c
369
t->tm_min = val;
bin/date/vary.c
376
adjsec(struct tm *t, char type, int64_t val, int mk)
bin/date/vary.c
378
if (val < 0)
bin/date/vary.c
38
int64_t val;
bin/date/vary.c
383
if (val) {
bin/date/vary.c
384
if (!adjmin(t, '+', (t->tm_sec + val) / 60, 0))
bin/date/vary.c
386
val %= 60;
bin/date/vary.c
387
t->tm_sec += val;
bin/date/vary.c
394
if (val) {
bin/date/vary.c
395
if (!adjmin(t, '-', val / 60, 0))
bin/date/vary.c
397
val %= 60;
bin/date/vary.c
398
if (val > t->tm_sec) {
bin/date/vary.c
401
val -= 60;
bin/date/vary.c
403
t->tm_sec -= val;
bin/date/vary.c
408
if (val > 59)
bin/date/vary.c
410
t->tm_sec = val;
bin/date/vary.c
423
int64_t val;
bin/date/vary.c
440
val = trans(trans_wday, arg);
bin/date/vary.c
441
if (val != -1) {
bin/date/vary.c
442
if (!adjwday(t, type, val, 1, 1))
bin/date/vary.c
445
val = trans(trans_mon, arg);
bin/date/vary.c
446
if (val != -1) {
bin/date/vary.c
447
if (!adjmon(t, type, val, 1, 1))
bin/date/vary.c
453
val = atoi(arg);
bin/date/vary.c
458
if (!adjsec(t, type, val, 1))
bin/date/vary.c
462
if (!adjmin(t, type, val, 1))
bin/date/vary.c
466
if (!adjhour(t, type, val, 1))
bin/date/vary.c
471
if (!adjday(t, type, val, 1))
bin/date/vary.c
476
if (!adjwday(t, type, val, 0, 1))
bin/date/vary.c
481
if (!adjmon(t, type, val, 0, 1))
bin/date/vary.c
486
if (!adjyear(t, type, val, 1))
bin/date/vary.c
75
for (f = 0; t[f].val != -1; f++)
bin/date/vary.c
78
return t[f].val;
bin/dd/args.c
489
get_num(const char *val)
bin/dd/args.c
495
num = strtoumax(val, &expr, 0);
bin/dd/args.c
496
if (expr == val) /* No valid digits. */
bin/dd/args.c
538
get_off_t(const char *val)
bin/dd/args.c
544
num = strtoimax(val, &expr, 0);
bin/dd/args.c
545
if (expr == val) /* No valid digits. */
bin/df/df.c
607
int64width(int64_t val)
bin/df/df.c
613
if (val <= 0) {
bin/df/df.c
614
val = -val;
bin/df/df.c
617
while (val > 0) {
bin/df/df.c
619
val /= 10;
bin/expr/expr.y
117
struct val *
bin/expr/expr.y
120
struct val *vp;
bin/expr/expr.y
122
vp = (struct val *)malloc(sizeof(*vp));
bin/expr/expr.y
131
struct val *
bin/expr/expr.y
134
struct val *vp;
bin/expr/expr.y
136
vp = (struct val *)malloc(sizeof(*vp));
bin/expr/expr.y
149
free_value(struct val *vp)
bin/expr/expr.y
156
to_integer(struct val *vp)
bin/expr/expr.y
175
assert_to_integer(struct val *vp)
bin/expr/expr.y
184
to_string(struct val *vp)
bin/expr/expr.y
225
is_string(struct val *vp)
bin/expr/expr.y
252
yylval.val = make_str(p);
bin/expr/expr.y
257
is_zero_or_null(struct val *vp)
bin/expr/expr.y
305
struct val *
bin/expr/expr.y
306
op_or(struct val *a, struct val *b)
bin/expr/expr.y
319
struct val *
bin/expr/expr.y
320
op_and(struct val *a, struct val *b)
bin/expr/expr.y
333
compare_vals(struct val *a, struct val *b)
bin/expr/expr.y
357
struct val *
bin/expr/expr.y
358
op_eq(struct val *a, struct val *b)
bin/expr/expr.y
363
struct val *
bin/expr/expr.y
364
op_gt(struct val *a, struct val *b)
bin/expr/expr.y
369
struct val *
bin/expr/expr.y
370
op_lt(struct val *a, struct val *b)
bin/expr/expr.y
375
struct val *
bin/expr/expr.y
376
op_ge(struct val *a, struct val *b)
bin/expr/expr.y
381
struct val *
bin/expr/expr.y
382
op_le(struct val *a, struct val *b)
bin/expr/expr.y
387
struct val *
bin/expr/expr.y
388
op_ne(struct val *a, struct val *b)
bin/expr/expr.y
405
struct val *
bin/expr/expr.y
406
op_plus(struct val *a, struct val *b)
bin/expr/expr.y
408
struct val *r;
bin/expr/expr.y
428
struct val *
bin/expr/expr.y
429
op_minus(struct val *a, struct val *b)
bin/expr/expr.y
43
struct val *result;
bin/expr/expr.y
431
struct val *r;
bin/expr/expr.y
45
void assert_to_integer(struct val *);
bin/expr/expr.y
466
struct val *
bin/expr/expr.y
467
op_times(struct val *a, struct val *b)
bin/expr/expr.y
469
struct val *r;
bin/expr/expr.y
491
struct val *
bin/expr/expr.y
492
op_div(struct val *a, struct val *b)
bin/expr/expr.y
494
struct val *r;
bin/expr/expr.y
50
int compare_vals(struct val *, struct val *);
bin/expr/expr.y
507
struct val *
bin/expr/expr.y
508
op_rem(struct val *a, struct val *b)
bin/expr/expr.y
51
void free_value(struct val *);
bin/expr/expr.y
510
struct val *r;
bin/expr/expr.y
523
struct val *
bin/expr/expr.y
524
op_colon(struct val *a, struct val *b)
bin/expr/expr.y
53
int is_string(struct val *);
bin/expr/expr.y
530
struct val *v;
bin/expr/expr.y
54
int is_zero_or_null(struct val *);
bin/expr/expr.y
55
struct val *make_integer(intmax_t);
bin/expr/expr.y
56
struct val *make_str(const char *);
bin/expr/expr.y
57
struct val *op_and(struct val *, struct val *);
bin/expr/expr.y
58
struct val *op_colon(struct val *, struct val *);
bin/expr/expr.y
59
struct val *op_div(struct val *, struct val *);
bin/expr/expr.y
60
struct val *op_eq(struct val *, struct val *);
bin/expr/expr.y
61
struct val *op_ge(struct val *, struct val *);
bin/expr/expr.y
62
struct val *op_gt(struct val *, struct val *);
bin/expr/expr.y
63
struct val *op_le(struct val *, struct val *);
bin/expr/expr.y
64
struct val *op_lt(struct val *, struct val *);
bin/expr/expr.y
65
struct val *op_minus(struct val *, struct val *);
bin/expr/expr.y
66
struct val *op_ne(struct val *, struct val *);
bin/expr/expr.y
67
struct val *op_or(struct val *, struct val *);
bin/expr/expr.y
68
struct val *op_plus(struct val *, struct val *);
bin/expr/expr.y
69
struct val *op_rem(struct val *, struct val *);
bin/expr/expr.y
70
struct val *op_times(struct val *, struct val *);
bin/expr/expr.y
71
int to_integer(struct val *);
bin/expr/expr.y
72
void to_string(struct val *);
bin/expr/expr.y
80
struct val *val;
bin/expr/expr.y
83
%left <val> '|'
bin/expr/expr.y
84
%left <val> '&'
bin/expr/expr.y
85
%left <val> '=' '>' '<' GE LE NE
bin/expr/expr.y
86
%left <val> '+' '-'
bin/expr/expr.y
87
%left <val> '*' '/' '%'
bin/expr/expr.y
88
%left <val> ':'
bin/expr/expr.y
90
%token <val> TOKEN
bin/expr/expr.y
91
%type <val> start expr
bin/kenv/kenv.c
104
val = eq;
bin/kenv/kenv.c
128
} else if (val == NULL) {
bin/kenv/kenv.c
139
error = ksetenv(env, val);
bin/kenv/kenv.c
141
warnx("unable to set %s to %s", env, val);
bin/kenv/kenv.c
208
ksetenv(const char *env, char *val)
bin/kenv/kenv.c
212
ret = kenv(KENV_SET, env, val, strlen(val) + 1);
bin/kenv/kenv.c
214
printf("%s=\"%s\"\n", env, val);
bin/kenv/kenv.c
65
char *env, *eq, *val;
bin/kenv/kenv.c
68
val = NULL;
bin/pax/cpio.h
108
#define CHR_WR_0(val) ((char)(((val) >> 24) & 0xff))
bin/pax/cpio.h
109
#define CHR_WR_1(val) ((char)(((val) >> 16) & 0xff))
bin/pax/cpio.h
110
#define CHR_WR_2(val) ((char)(((val) >> 8) & 0xff))
bin/pax/cpio.h
111
#define CHR_WR_3(val) ((char)((val) & 0xff))
bin/pax/gen_subs.c
244
ul_asc(u_long val, char *str, int len, int base)
bin/pax/gen_subs.c
261
if ((digit = (val & 0xf)) < 10)
bin/pax/gen_subs.c
265
if ((val = (val >> 4)) == (u_long)0)
bin/pax/gen_subs.c
270
*pt-- = '0' + (char)(val & 0x7);
bin/pax/gen_subs.c
271
if ((val = (val >> 3)) == (u_long)0)
bin/pax/gen_subs.c
281
if (val != (u_long)0)
bin/pax/gen_subs.c
340
uqd_asc(u_quad_t val, char *str, int len, int base)
bin/pax/gen_subs.c
357
if ((digit = (val & 0xf)) < 10)
bin/pax/gen_subs.c
361
if ((val = (val >> 4)) == (u_quad_t)0)
bin/pax/gen_subs.c
366
*pt-- = '0' + (char)(val & 0x7);
bin/pax/gen_subs.c
367
if ((val = (val >> 3)) == (u_quad_t)0)
bin/pax/gen_subs.c
377
if (val != (u_quad_t)0)
bin/pax/options.c
1424
str_offt(char *val)
bin/pax/options.c
1429
num = strtoq(val, &expr, 0);
bin/pax/options.c
1430
if ((num == QUAD_MAX) || (num <= 0) || (expr == val))
bin/pax/tables.c
1231
u_int val;
bin/pax/tables.c
1258
dest = (char *)&val;
bin/pax/tables.c
1261
key += val;
bin/pax/tables.c
1268
val = 0;
bin/pax/tables.c
1270
dest = (char *)&val;
bin/pax/tables.c
1273
key += val;
bin/pax/tar.c
141
ul_oct(u_long val, char *str, int len, int term)
bin/pax/tar.c
171
*pt-- = '0' + (char)(val & 0x7);
bin/pax/tar.c
172
if ((val = val >> 3) == (u_long)0)
bin/pax/tar.c
178
if (val != (u_long)0)
bin/pax/tar.c
195
uqd_oct(u_quad_t val, char *str, int len, int term)
bin/pax/tar.c
225
*pt-- = '0' + (char)(val & 0x7);
bin/pax/tar.c
226
if ((val = val >> 3) == 0)
bin/pax/tar.c
232
if (val != (u_quad_t)0)
bin/ps/print.c
585
time_t val;
bin/ps/print.c
591
val = now - k->ki_p->ki_start.tv_sec;
bin/ps/print.c
592
days = val / (24 * 60 * 60);
bin/ps/print.c
593
val %= 24 * 60 * 60;
bin/ps/print.c
594
hours = val / (60 * 60);
bin/ps/print.c
595
val %= 60 * 60;
bin/ps/print.c
596
mins = val / 60;
bin/ps/print.c
597
secs = val % 60;
bin/ps/print.c
611
time_t val;
bin/ps/print.c
616
val = now - k->ki_p->ki_start.tv_sec;
bin/ps/print.c
617
asprintf(&str, "%jd", (intmax_t)val);
bin/sh/alias.c
168
out1qstr(a->val);
bin/sh/alias.c
56
setalias(const char *name, const char *val)
bin/sh/alias.c
65
ap->val = savestr(val);
bin/sh/alias.c
77
ckfree(ap->val);
bin/sh/alias.h
40
char *val;
bin/sh/arith_yacc.c
168
static arith_t primary(int token, union yystype *val, int op, int noeval)
bin/sh/arith_yacc.c
182
return val->val;
bin/sh/arith_yacc.c
185
return noeval ? val->val : arith_lookupvarint(val->name);
bin/sh/arith_yacc.c
188
*val = yylval;
bin/sh/arith_yacc.c
192
*val = yylval;
bin/sh/arith_yacc.c
193
return -primary(op, val, yylex(), noeval);
bin/sh/arith_yacc.c
195
*val = yylval;
bin/sh/arith_yacc.c
196
return !primary(op, val, yylex(), noeval);
bin/sh/arith_yacc.c
198
*val = yylval;
bin/sh/arith_yacc.c
199
return ~primary(op, val, yylex(), noeval);
bin/sh/arith_yacc.c
208
union yystype val;
bin/sh/arith_yacc.c
214
val = yylval;
bin/sh/arith_yacc.c
216
b = primary(token, &val, yylex(), noeval);
bin/sh/arith_yacc.c
235
static arith_t binop(int token, union yystype *val, int op, int noeval)
bin/sh/arith_yacc.c
237
arith_t a = primary(token, val, op, noeval);
bin/sh/arith_yacc.c
246
static arith_t and(int token, union yystype *val, int op, int noeval)
bin/sh/arith_yacc.c
248
arith_t a = binop(token, val, op, noeval);
bin/sh/arith_yacc.c
256
*val = yylval;
bin/sh/arith_yacc.c
258
b = and(token, val, yylex(), noeval | !a);
bin/sh/arith_yacc.c
263
static arith_t or(int token, union yystype *val, int op, int noeval)
bin/sh/arith_yacc.c
265
arith_t a = and(token, val, op, noeval);
bin/sh/arith_yacc.c
273
*val = yylval;
bin/sh/arith_yacc.c
275
b = or(token, val, yylex(), noeval | !!a);
bin/sh/arith_yacc.c
280
static arith_t cond(int token, union yystype *val, int op, int noeval)
bin/sh/arith_yacc.c
282
arith_t a = or(token, val, op, noeval);
bin/sh/arith_yacc.c
295
*val = yylval;
bin/sh/arith_yacc.c
297
c = cond(token, val, yylex(), noeval | !!a);
bin/sh/arith_yacc.c
304
union yystype val = yylval;
bin/sh/arith_yacc.c
310
return cond(var, &val, op, noeval);
bin/sh/arith_yacc.c
313
return cond(var, &val, op, noeval);
bin/sh/arith_yacc.c
320
result = do_binop(op - 11, arith_lookupvarint(val.name), result);
bin/sh/arith_yacc.c
322
setvar(val.name, sresult, 0);
bin/sh/arith_yacc.h
87
arith_t val;
bin/sh/arith_yylex.c
109
yylval.val = strtoarith_t(buf, &end);
bin/sh/arith_yylex.c
58
arith_t val;
bin/sh/arith_yylex.c
68
val = (arith_t)strtoumax(nptr, endptr, 0);
bin/sh/arith_yylex.c
69
if (val >= 0)
bin/sh/arith_yylex.c
70
return val;
bin/sh/arith_yylex.c
71
else if (val == ARITH_MIN) {
bin/sh/error.h
93
#define longjmp(jmploc, val) _longjmp(jmploc, val)
bin/sh/exec.c
759
out1qstr(ap->val);
bin/sh/exec.c
763
ap->val);
bin/sh/expand.c
1436
casematch(union node *pattern, const char *val)
bin/sh/expand.c
1449
result = patmatch(p, val);
bin/sh/expand.c
661
const char *val;
bin/sh/expand.c
681
val = NULL;
bin/sh/expand.c
684
val = NULL;
bin/sh/expand.c
686
val = bltinlookup(var, 1);
bin/sh/expand.c
687
if (val == NULL || ((varflags & VSNUL) && val[0] == '\0')) {
bin/sh/expand.c
688
val = NULL;
bin/sh/expand.c
724
val = stackblock() + startloc;
bin/sh/expand.c
725
for (;val != expdest; val++)
bin/sh/expand.c
726
if ((*val & 0xC0) == 0x80)
bin/sh/expand.c
733
for (;*val; val++)
bin/sh/expand.c
735
(*val & 0xC0) != 0x80)
bin/sh/expand.c
739
strtodest(val, flag, subtype,
bin/sh/expand.c
789
val = lookupvar(var);
bin/sh/expand.c
790
strtodest(val, flag, subtype, varflags & VSQUOTE, dst);
bin/sh/input.c
333
if (parsenextc != sp->ap->val &&
bin/sh/miscbltin.c
530
rlim_t val = 0;
bin/sh/miscbltin.c
533
val = limit->rlim_cur;
bin/sh/miscbltin.c
535
val = limit->rlim_max;
bin/sh/miscbltin.c
536
if (val == RLIM_INFINITY)
bin/sh/miscbltin.c
540
val /= l->factor;
bin/sh/miscbltin.c
541
out1fmt("%jd\n", (intmax_t)val);
bin/sh/miscbltin.c
548
rlim_t val = 0;
bin/sh/miscbltin.c
583
val = RLIM_INFINITY;
bin/sh/miscbltin.c
597
val = (rlim_t)uval;
bin/sh/miscbltin.c
598
if (val < 0 || (uintmax_t)val != uval ||
bin/sh/miscbltin.c
599
val == RLIM_INFINITY)
bin/sh/miscbltin.c
625
limit.rlim_cur = val;
bin/sh/miscbltin.c
627
limit.rlim_max = val;
bin/sh/options.c
149
int val;
bin/sh/options.c
158
val = 1;
bin/sh/options.c
184
val = 0;
bin/sh/options.c
200
minus_o(*argptr, val);
bin/sh/options.c
204
setoption(c, val);
bin/sh/options.c
250
minus_o(char *name, int val)
bin/sh/options.c
257
if (val) {
bin/sh/options.c
276
setoptionbyindex(i, val);
bin/sh/options.c
285
setoptionbyindex(int idx, int val)
bin/sh/options.c
287
if (&optval[idx] == &privileged && !val && privileged) {
bin/sh/options.c
293
optval[idx] = val;
bin/sh/options.c
294
if (val) {
bin/sh/options.c
304
setoption(int flag, int val)
bin/sh/options.c
310
setoptionbyindex(i, val);
bin/sh/parser.c
859
pushstring(ap->val, strlen(ap->val), ap);
bin/sh/var.c
193
setvarsafe(const char *name, const char *val, int flags)
bin/sh/var.c
205
setvar(name, val, flags);
bin/sh/var.c
218
setvar(const char *name, const char *val, int flags)
bin/sh/var.c
244
if (val == NULL) {
bin/sh/var.c
248
vallen = strlen(val);
bin/sh/var.c
255
if (val)
bin/sh/var.c
256
memcpy(nameeq + namelen + 1, val, vallen + 1);
bin/stty/cchar.c
115
val = strtol(arg, &ep, 10);
bin/stty/cchar.c
116
if (val > UCHAR_MAX) {
bin/stty/cchar.c
125
ip->t.c_cc[cp->sub] = val;
bin/stty/cchar.c
92
long val;
cddl/usr.sbin/zfsd/case_file.cc
1224
char val[ZFS_MAXPROPLEN];
cddl/usr.sbin/zfsd/case_file.cc
1232
vdev_prop, prop_str, val, sizeof (val), &srctype, B_FALSE) != 0)
cddl/usr.sbin/zfsd/case_file.cc
1236
if (zfs_isnumber(val) == B_FALSE)
cddl/usr.sbin/zfsd/case_file.cc
1239
return (atoi(val));
crypto/heimdal/appl/ftp/ftp/cmds.c
1004
int val;
crypto/heimdal/appl/ftp/ftp/cmds.c
1007
val = atoi(argv[1]);
crypto/heimdal/appl/ftp/ftp/cmds.c
1008
if (val < 0) {
crypto/heimdal/appl/ftp/ftp/cmds.c
1014
val = !debug;
crypto/heimdal/appl/ftp/ftp/cmds.c
1015
debug = val;
crypto/heimdal/appl/ftp/ftpd/ftpd.c
290
long val = 0;
crypto/heimdal/appl/ftp/ftpd/ftpd.c
293
val = strtol(guest_umask_string, &p, 8);
crypto/heimdal/appl/ftp/ftpd/ftpd.c
294
if (*p != '\0' || val < 0)
crypto/heimdal/appl/ftp/ftpd/ftpd.c
297
guest_umask = val;
crypto/heimdal/appl/ftp/ftpd/ftpd.c
300
val = strtol(umask_string, &p, 8);
crypto/heimdal/appl/ftp/ftpd/ftpd.c
301
if (*p != '\0' || val < 0)
crypto/heimdal/appl/ftp/ftpd/ftpd.c
304
defumask = val;
crypto/heimdal/appl/gssmask/gssmaestro.c
102
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
112
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
117
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
119
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
126
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
129
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
130
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
153
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
159
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
161
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
168
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
174
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
176
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
184
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
192
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
194
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
202
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
210
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
212
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
219
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
225
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
227
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
234
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
241
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
242
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
318
int32_t val = GSMERR_ERROR, ic = 0, ac = 0, deleg = 0;
crypto/heimdal/appl/gssmask/gssmaestro.c
333
val = GSMERR_ERROR;
crypto/heimdal/appl/gssmask/gssmaestro.c
337
val = init_sec_context(ipeer, &ic, &hCred, flags|first_call,
crypto/heimdal/appl/gssmask/gssmaestro.c
340
switch(val) {
crypto/heimdal/appl/gssmask/gssmaestro.c
350
ipeer->name, (int)val, step);
crypto/heimdal/appl/gssmask/gssmaestro.c
356
val = GSMERR_ERROR;
crypto/heimdal/appl/gssmask/gssmaestro.c
360
val = accept_sec_context(apeer, &ac, flags|first_call,
crypto/heimdal/appl/gssmask/gssmaestro.c
363
switch(val) {
crypto/heimdal/appl/gssmask/gssmaestro.c
373
apeer->name, (int)val, step);
crypto/heimdal/appl/gssmask/gssmaestro.c
374
val = GSMERR_ERROR;
crypto/heimdal/appl/gssmask/gssmaestro.c
378
val = GSMERR_OK;
crypto/heimdal/appl/gssmask/gssmaestro.c
381
if (iContext == NULL || val != GSMERR_OK) {
crypto/heimdal/appl/gssmask/gssmaestro.c
389
if (aContext == NULL || val != GSMERR_OK) {
crypto/heimdal/appl/gssmask/gssmaestro.c
397
if (hDelegCred == NULL || val != GSMERR_OK) {
crypto/heimdal/appl/gssmask/gssmaestro.c
406
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
413
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
420
val = get_mic(c1, hc1, &msg, &mic);
crypto/heimdal/appl/gssmask/gssmaestro.c
421
if (val)
crypto/heimdal/appl/gssmask/gssmaestro.c
423
val = verify_mic(c2, hc2, &msg, &mic);
crypto/heimdal/appl/gssmask/gssmaestro.c
424
if (val)
crypto/heimdal/appl/gssmask/gssmaestro.c
435
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
443
val = encrypt_token(c1, hc1, conf, &msg, &wrapped);
crypto/heimdal/appl/gssmask/gssmaestro.c
444
if (val) {
crypto/heimdal/appl/gssmask/gssmaestro.c
446
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
448
val = decrypt_token(c2, hc2, conf, &wrapped, &out);
crypto/heimdal/appl/gssmask/gssmaestro.c
449
if (val) {
crypto/heimdal/appl/gssmask/gssmaestro.c
452
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
458
val = GSMERR_ERROR;
crypto/heimdal/appl/gssmask/gssmaestro.c
461
val = GSMERR_ERROR;
crypto/heimdal/appl/gssmask/gssmaestro.c
466
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
474
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
488
val = wrap_token_ext(c1, hc1, conf, bflags, &header, &msg, &trailer, &wrapped);
crypto/heimdal/appl/gssmask/gssmaestro.c
489
if (val) {
crypto/heimdal/appl/gssmask/gssmaestro.c
491
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
493
val = unwrap_token_ext(c2, hc2, conf, bflags, &header, &wrapped, &trailer, &out);
crypto/heimdal/appl/gssmask/gssmaestro.c
494
if (val) {
crypto/heimdal/appl/gssmask/gssmaestro.c
497
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
503
val = GSMERR_ERROR;
crypto/heimdal/appl/gssmask/gssmaestro.c
506
val = GSMERR_ERROR;
crypto/heimdal/appl/gssmask/gssmaestro.c
511
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
518
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
527
val = test_wrap(c1, hc1, c2, hc2, 0);
crypto/heimdal/appl/gssmask/gssmaestro.c
528
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
529
val = test_wrap(c2, hc2, c1, hc1, 0);
crypto/heimdal/appl/gssmask/gssmaestro.c
530
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
532
val = test_wrap(c1, hc1, c2, hc2, 1);
crypto/heimdal/appl/gssmask/gssmaestro.c
533
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
534
val = test_wrap(c2, hc2, c1, hc1, 1);
crypto/heimdal/appl/gssmask/gssmaestro.c
535
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
539
val = test_wrap_ext(c1, hc1, c2, hc2, 1, 0);
crypto/heimdal/appl/gssmask/gssmaestro.c
540
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
541
val = test_wrap_ext(c2, hc2, c1, hc1, 1, 0);
crypto/heimdal/appl/gssmask/gssmaestro.c
542
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
544
val = test_wrap_ext(c1, hc1, c2, hc2, 1, 1);
crypto/heimdal/appl/gssmask/gssmaestro.c
545
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
546
val = test_wrap_ext(c2, hc2, c1, hc1, 1, 1);
crypto/heimdal/appl/gssmask/gssmaestro.c
547
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
549
val = test_wrap_ext(c1, hc1, c2, hc2, 0, 0);
crypto/heimdal/appl/gssmask/gssmaestro.c
550
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
551
val = test_wrap_ext(c2, hc2, c1, hc1, 0, 0);
crypto/heimdal/appl/gssmask/gssmaestro.c
552
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
554
val = test_wrap_ext(c1, hc1, c2, hc2, 0, 1);
crypto/heimdal/appl/gssmask/gssmaestro.c
555
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
556
val = test_wrap_ext(c2, hc2, c1, hc1, 0, 1);
crypto/heimdal/appl/gssmask/gssmaestro.c
557
if (val) return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
70
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
79
ret32(client, val);
crypto/heimdal/appl/gssmask/gssmaestro.c
81
return val;
crypto/heimdal/appl/gssmask/gssmaestro.c
814
int32_t hCred, val;
crypto/heimdal/appl/gssmask/gssmaestro.c
816
val = acquire_cred(clients[i], user, password, 1, &hCred);
crypto/heimdal/appl/gssmask/gssmaestro.c
817
if (val != GSMERR_OK) {
crypto/heimdal/appl/gssmask/gssmaestro.c
819
clients[i]->moniker, (int)val);
crypto/heimdal/appl/gssmask/gssmaestro.c
834
int32_t hCred, val, delegCred;
crypto/heimdal/appl/gssmask/gssmaestro.c
844
val = acquire_cred(c, user, password, 1, &hCred);
crypto/heimdal/appl/gssmask/gssmaestro.c
845
if (val != GSMERR_OK)
crypto/heimdal/appl/gssmask/gssmaestro.c
846
errx(1, "failed to acquire_cred: %d", (int)val);
crypto/heimdal/appl/gssmask/gssmaestro.c
848
val = build_context(c, c,
crypto/heimdal/appl/gssmask/gssmaestro.c
853
if (val == GSMERR_OK) {
crypto/heimdal/appl/gssmask/gssmaestro.c
860
warnx("build_context failed: %d", (int)val);
crypto/heimdal/appl/gssmask/gssmaestro.c
866
val = build_context(c, c,
crypto/heimdal/appl/gssmask/gssmaestro.c
869
if (val == GSMERR_OK) {
crypto/heimdal/appl/gssmask/gssmaestro.c
876
warnx("build_context failed: %d", (int)val);
crypto/heimdal/appl/gssmask/gssmaestro.c
893
int32_t hCred, val, delegCred = 0;
crypto/heimdal/appl/gssmask/gssmaestro.c
901
val = acquire_cred(client, user, password, 1, &hCred);
crypto/heimdal/appl/gssmask/gssmaestro.c
902
if (val != GSMERR_OK)
crypto/heimdal/appl/gssmask/gssmaestro.c
903
errx(1, "failed to acquire_cred: %d", (int)val);
crypto/heimdal/appl/gssmask/gssmaestro.c
915
val = build_context(client, server,
crypto/heimdal/appl/gssmask/gssmaestro.c
92
int32_t val;
crypto/heimdal/appl/gssmask/gssmaestro.c
920
if (val != GSMERR_OK) {
crypto/heimdal/appl/gssmask/gssmaestro.c
921
warnx("build_context failed: %d", (int)val);
crypto/heimdal/appl/gssmask/gssmaestro.c
925
val = test_token(client, clientC, server, serverC, wrap_ext);
crypto/heimdal/appl/gssmask/gssmaestro.c
926
if (val)
crypto/heimdal/appl/gssmask/gssmaestro.c
99
ret32(client, val);
crypto/heimdal/appl/telnet/telnet/authenc.c
77
telnet_getenv(const char *val)
crypto/heimdal/appl/telnet/telnet/authenc.c
79
return((char *)env_getvalue((unsigned char *)val));
crypto/heimdal/appl/telnet/telnet/commands.c
359
int val = 0;
crypto/heimdal/appl/telnet/telnet/commands.c
388
val = cpp - telopts;
crypto/heimdal/appl/telnet/telnet/commands.c
393
val *= 10;
crypto/heimdal/appl/telnet/telnet/commands.c
394
val += *cp - '0';
crypto/heimdal/appl/telnet/telnet/commands.c
401
} else if (val < 0 || val > 255) {
crypto/heimdal/appl/telnet/telnet/commands.c
411
(*func)(val, 1);
crypto/heimdal/appl/telnet/telnet/commands.c
470
togbinary(int val)
crypto/heimdal/appl/telnet/telnet/commands.c
474
if (val >= 0) {
crypto/heimdal/appl/telnet/telnet/commands.c
475
binmode = val;
crypto/heimdal/appl/telnet/telnet/commands.c
484
val = binmode ? 0 : 1;
crypto/heimdal/appl/telnet/telnet/commands.c
487
if (val == 1) {
crypto/heimdal/appl/telnet/telnet/commands.c
508
togrbinary(int val)
crypto/heimdal/appl/telnet/telnet/commands.c
512
if (val == -1)
crypto/heimdal/appl/telnet/telnet/commands.c
513
val = my_want_state_is_do(TELOPT_BINARY) ? 0 : 1;
crypto/heimdal/appl/telnet/telnet/commands.c
515
if (val == 1) {
crypto/heimdal/appl/telnet/telnet/commands.c
534
togxbinary(int val)
crypto/heimdal/appl/telnet/telnet/commands.c
538
if (val == -1)
crypto/heimdal/appl/telnet/telnet/commands.c
539
val = my_want_state_is_will(TELOPT_BINARY) ? 0 : 1;
crypto/heimdal/appl/telnet/telnet/commands.c
541
if (val == 1) {
crypto/heimdal/appl/telnet/telnet/externs.h
194
char *telnet_getenv(const char *val);
crypto/heimdal/appl/telnet/telnet/telnet.c
1071
cc_t val;
crypto/heimdal/appl/telnet/telnet/telnet.c
1089
spcp->val = 0;
crypto/heimdal/appl/telnet/telnet/telnet.c
1097
spcp->val = *spcp->valp; \
crypto/heimdal/appl/telnet/telnet/telnet.c
1100
spcp->val = 0; \
crypto/heimdal/appl/telnet/telnet/telnet.c
1191
if (spcp->val == (cc_t)(_POSIX_VDISABLE))
crypto/heimdal/appl/telnet/telnet/telnet.c
1196
spcp->val = *spcp->valp;
crypto/heimdal/appl/telnet/telnet/telnet.c
1197
slc_add_reply(spcp - spc_data, spcp->flags, spcp->val);
crypto/heimdal/appl/telnet/telnet/telnet.c
1233
if ((cp[SLC_VALUE] == (unsigned char)spcp->val) &&
crypto/heimdal/appl/telnet/telnet/telnet.c
1249
spcp->val = (cc_t)cp[SLC_VALUE];
crypto/heimdal/appl/telnet/telnet/telnet.c
1258
spcp->val = (cc_t)cp[SLC_VALUE];
crypto/heimdal/appl/telnet/telnet/telnet.c
1266
slc_add_reply(func, spcp->flags, spcp->val);
crypto/heimdal/appl/telnet/telnet/telnet.c
1280
if (spcp->valp && spcp->val != *spcp->valp) {
crypto/heimdal/appl/telnet/telnet/telnet.c
1281
spcp->val = *spcp->valp;
crypto/heimdal/appl/telnet/telnet/telnet.c
1282
if (spcp->val == (cc_t)(_POSIX_VDISABLE))
crypto/heimdal/appl/telnet/telnet/telnet.c
1286
slc_add_reply(spcp - spc_data, spcp->flags, spcp->val);
crypto/heimdal/appl/telnet/telnet/telnet.c
1357
if (spcp->valp && (*spcp->valp != spcp->val)) {
crypto/heimdal/appl/telnet/telnet/telnet.c
1358
*spcp->valp = spcp->val;
crypto/heimdal/appl/telnet/telnetd/authenc.c
70
telnet_getenv(const char *val)
crypto/heimdal/appl/telnet/telnetd/authenc.c
72
return(getenv(val));
crypto/heimdal/appl/telnet/telnetd/defs.h
91
cc_t val; /* the value of the special character */
crypto/heimdal/appl/telnet/telnetd/ext.h
115
void tty_tspeed (int val);
crypto/heimdal/appl/telnet/telnetd/ext.h
116
void tty_rspeed (int val);
crypto/heimdal/appl/telnet/telnetd/ext.h
81
char *telnet_getenv (const char *val);
crypto/heimdal/appl/telnet/telnetd/slc.c
52
spcset(i, &slctab[i].defset.val, &slctab[i].sptr);
crypto/heimdal/appl/telnet/telnetd/slc.c
54
slctab[i].current.val = 0;
crypto/heimdal/appl/telnet/telnetd/sys_term.c
1393
addarg(struct arg_val *argv, const char *val)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
1401
if((argv->argv[argv->argc++] = strdup(val)) == NULL)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
150
# define cfsetospeed(tp, val) (tp)->c_cflag &= ~CBAUD; \
crypto/heimdal/appl/telnet/telnetd/sys_term.c
151
(tp)->c_cflag |= (val)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
154
# define cfsetispeed(tp, val) (tp)->c_cflag &= ~CIBAUD; \
crypto/heimdal/appl/telnet/telnetd/sys_term.c
155
(tp)->c_cflag |= ((val)<<IBSHIFT)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
158
# define cfsetispeed(tp, val) (tp)->c_cflag &= ~CBAUD; \
crypto/heimdal/appl/telnet/telnetd/sys_term.c
159
(tp)->c_cflag |= (val)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
707
tty_tspeed(int val)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
712
for (tp = termspeeds; (tp->speed != -1) && (val > tp->speed); tp++)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
718
cfsetospeed(&termbuf, val);
crypto/heimdal/appl/telnet/telnetd/sys_term.c
723
tty_rspeed(int val)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
728
for (tp = termspeeds; (tp->speed != -1) && (val > tp->speed); tp++)
crypto/heimdal/appl/telnet/telnetd/sys_term.c
734
cfsetispeed(&termbuf, val);
crypto/heimdal/appl/test/uu_client.c
147
authz->val[i].ad_type,
crypto/heimdal/appl/test/uu_client.c
148
(unsigned long)authz->val[i].ad_data.length);
crypto/heimdal/base/array.c
114
ptr = realloc(array->val, (array->len + 1) * sizeof(array->val[0]));
crypto/heimdal/base/array.c
117
array->val = ptr;
crypto/heimdal/base/array.c
118
array->val[array->len++] = heim_retain(object);
crypto/heimdal/base/array.c
136
fn(array->val[n], ctx);
crypto/heimdal/base/array.c
152
fn(array->val[n]);
crypto/heimdal/base/array.c
185
return heim_retain(array->val[idx]);
crypto/heimdal/base/array.c
201
obj = array->val[idx];
crypto/heimdal/base/array.c
206
memmove(&array->val[idx], &array->val[idx + 1],
crypto/heimdal/base/array.c
207
(array->len - idx) * sizeof(array->val[0]));
crypto/heimdal/base/array.c
226
if (block(array->val[n])) {
crypto/heimdal/base/array.c
44
heim_object_t *val;
crypto/heimdal/base/array.c
53
heim_release(array->val[n]);
crypto/heimdal/base/array.c
54
free(array->val);
crypto/heimdal/base/array.c
82
array->val = NULL;
crypto/heimdal/base/bool.c
49
heim_bool_create(int val)
crypto/heimdal/base/bool.c
51
return heim_base_make_tagged_object(!!val, HEIM_TID_BOOL);
crypto/heimdal/kadmin/get.c
279
strlcat(buf, acl.val[i].subject, buf_len);
crypto/heimdal/kadmin/get.c
280
if (acl.val[i].issuer) {
crypto/heimdal/kadmin/get.c
282
strlcat(buf, *acl.val[i].issuer, buf_len);
crypto/heimdal/kadmin/get.c
284
if (acl.val[i].anchor) {
crypto/heimdal/kadmin/get.c
286
strlcat(buf, *acl.val[i].anchor, buf_len);
crypto/heimdal/kadmin/get.c
311
ret = krb5_unparse_name(context, &alias.aliases.val[i], &p);
crypto/heimdal/kadmin/load.c
165
key = realloc(ent->keys.val,
crypto/heimdal/kadmin/load.c
166
(ent->keys.len + 1) * sizeof(*ent->keys.val));
crypto/heimdal/kadmin/load.c
169
ent->keys.val = key;
crypto/heimdal/kadmin/load.c
170
key = ent->keys.val + ent->keys.len;
crypto/heimdal/kadmin/load.c
343
d = realloc((*e)->val, ((*e)->len + 1) * sizeof((*e)->val[0]));
crypto/heimdal/kadmin/load.c
346
(*e)->val = d;
crypto/heimdal/kadmin/load.c
347
(*e)->val[(*e)->len] = ext;
crypto/heimdal/kadmin/mod.c
122
ext.data.u.aliases.aliases.val = NULL;
crypto/heimdal/kadmin/mod.c
125
ext.data.u.aliases.aliases.val =
crypto/heimdal/kadmin/mod.c
127
sizeof(ext.data.u.aliases.aliases.val[0]));
crypto/heimdal/kadmin/mod.c
136
ret = copy_Principal(p, &ext.data.u.aliases.aliases.val[i]);
crypto/heimdal/kadmin/mod.c
171
ext.data.u.pkinit_acl.val = NULL;
crypto/heimdal/kadmin/mod.c
174
ext.data.u.pkinit_acl.val =
crypto/heimdal/kadmin/mod.c
176
sizeof(ext.data.u.pkinit_acl.val[0]));
crypto/heimdal/kadmin/mod.c
180
ext.data.u.pkinit_acl.val[i].subject = estrdup(strings->strings[i]);
crypto/heimdal/kadmin/mod.c
72
ext.data.u.allowed_to_delegate_to.val = NULL;
crypto/heimdal/kadmin/mod.c
78
ext.data.u.allowed_to_delegate_to.val =
crypto/heimdal/kadmin/mod.c
80
sizeof(ext.data.u.allowed_to_delegate_to.val[0]));
crypto/heimdal/kadmin/mod.c
87
ret = copy_Principal(p, &ext.data.u.allowed_to_delegate_to.val[i]);
crypto/heimdal/kcm/protocol.c
338
strcmp(mcreds.server->name.name_string.val[0], KRB5_TGS_NAME) == 0)
crypto/heimdal/kdc/announce.c
227
DNSRecordRef *val;
crypto/heimdal/kdc/announce.c
263
ptr = realloc(srvRefs.val, sizeof(srvRefs.val[0]) * (srvRefs.len + 1));
crypto/heimdal/kdc/announce.c
266
srvRefs.val = ptr;
crypto/heimdal/kdc/announce.c
271
&srvRefs.val[srvRefs.len],
crypto/heimdal/kdc/announce.c
294
DNSServiceRemoveRecord(g_dnsRef, srvRefs.val[i], 0);
crypto/heimdal/kdc/announce.c
296
free(srvRefs.val);
crypto/heimdal/kdc/announce.c
298
srvRefs.val = NULL;
crypto/heimdal/kdc/connect.c
337
init_socket(context, config, &d[num], &addresses.val[j],
crypto/heimdal/kdc/connect.c
343
krb5_print_address (&addresses.val[j], a_str,
crypto/heimdal/kdc/headers.h
113
(X)->val = calloc((X)->len, sizeof(*(X)->val)); } while(0)
crypto/heimdal/kdc/kerberos5.c
1101
client, b->etype.val, b->etype.len, &sessionetype,
crypto/heimdal/kdc/kerberos5.c
1361
method_data.val = NULL;
crypto/heimdal/kdc/kerberos5.c
1368
pa = &method_data.val[method_data.len-1];
crypto/heimdal/kdc/kerberos5.c
1379
pa = &method_data.val[method_data.len-1];
crypto/heimdal/kdc/kerberos5.c
1389
pa = &method_data.val[method_data.len-1];
crypto/heimdal/kdc/kerberos5.c
1400
client, b->etype.val, b->etype.len, NULL, &ckey);
crypto/heimdal/kdc/kerberos5.c
1617
ek.last_req.val = malloc(2 * sizeof(*ek.last_req.val));
crypto/heimdal/kdc/kerberos5.c
1618
if (ek.last_req.val == NULL) {
crypto/heimdal/kdc/kerberos5.c
1626
ek.last_req.val[ek.last_req.len].lr_type = LR_PW_EXPTIME;
crypto/heimdal/kdc/kerberos5.c
1627
ek.last_req.val[ek.last_req.len].lr_value = *client->entry.pw_end;
crypto/heimdal/kdc/kerberos5.c
1631
ek.last_req.val[ek.last_req.len].lr_type = LR_ACCT_EXPTIME;
crypto/heimdal/kdc/kerberos5.c
1632
ek.last_req.val[ek.last_req.len].lr_value = *client->entry.valid_end;
crypto/heimdal/kdc/kerberos5.c
1636
ek.last_req.val[ek.last_req.len].lr_type = LR_NONE;
crypto/heimdal/kdc/kerberos5.c
1637
ek.last_req.val[ek.last_req.len].lr_value = 0;
crypto/heimdal/kdc/kerberos5.c
232
pn->name_string.val = malloc(sizeof(*pn->name_string.val));
crypto/heimdal/kdc/kerberos5.c
233
if (pn->name_string.val == NULL)
crypto/heimdal/kdc/kerberos5.c
235
pn->name_string.val[0] = strdup("anonymous");
crypto/heimdal/kdc/kerberos5.c
236
if (pn->name_string.val[0] == NULL) {
crypto/heimdal/kdc/kerberos5.c
237
free(pn->name_string.val);
crypto/heimdal/kdc/kerberos5.c
238
pn->name_string.val = NULL;
crypto/heimdal/kdc/kerberos5.c
284
switch(padata->val[i].padata_type) {
crypto/heimdal/kdc/kerberos5.c
298
p = rk_strpoolprintf(p, "%d", padata->val[i].padata_type);
crypto/heimdal/kdc/kerberos5.c
52
pa = realloc(md->val, (md->len + 1) * sizeof(*md->val));
crypto/heimdal/kdc/kerberos5.c
533
pa.val = calloc(1, sizeof(pa.val[0]));
crypto/heimdal/kdc/kerberos5.c
534
if(pa.val == NULL)
crypto/heimdal/kdc/kerberos5.c
537
ret = make_etype_info_entry(context, &pa.val[0], ckey);
crypto/heimdal/kdc/kerberos5.c
55
md->val = pa;
crypto/heimdal/kdc/kerberos5.c
552
md->val[md->len - 1].padata_type = KRB5_PADATA_ETYPE_INFO;
crypto/heimdal/kdc/kerberos5.c
553
md->val[md->len - 1].padata_value.length = len;
crypto/heimdal/kdc/kerberos5.c
554
md->val[md->len - 1].padata_value.data = buf;
crypto/heimdal/kdc/kerberos5.c
645
pa.val = calloc(1, sizeof(pa.val[0]));
crypto/heimdal/kdc/kerberos5.c
646
if(pa.val == NULL)
crypto/heimdal/kdc/kerberos5.c
649
ret = make_etype_info2_entry(&pa.val[0], ckey);
crypto/heimdal/kdc/kerberos5.c
65
md->val[md->len - 1].padata_type = salt->type;
crypto/heimdal/kdc/kerberos5.c
664
md->val[md->len - 1].padata_type = KRB5_PADATA_ETYPE_INFO2;
crypto/heimdal/kdc/kerberos5.c
665
md->val[md->len - 1].padata_value.length = len;
crypto/heimdal/kdc/kerberos5.c
666
md->val[md->len - 1].padata_value.data = buf;
crypto/heimdal/kdc/kerberos5.c
67
&md->val[md->len - 1].padata_value);
crypto/heimdal/kdc/kerberos5.c
689
ret = krb5_enctype_to_string(context, b->etype.val[i], &str);
crypto/heimdal/kdc/kerberos5.c
694
p = rk_strpoolprintf(p, "%d", b->etype.val[i]);
crypto/heimdal/kdc/kerberos5.c
79
if(req->padata->val[*start - 1].padata_type == (unsigned)type)
crypto/heimdal/kdc/kerberos5.c
80
return &req->padata->val[*start - 1];
crypto/heimdal/kdc/kerberos5.c
888
if (addresses->val[i].addr_type != KRB5_ADDRESS_NETBIOS) {
crypto/heimdal/kdc/kerberos5.c
94
strcmp(principal->name.name_string.val[0], "afs") == 0 &&
crypto/heimdal/kdc/kerberos5.c
945
strcmp(principal->name.name_string.val[0], KRB5_WELLKNOWN_NAME) != 0 ||
crypto/heimdal/kdc/kerberos5.c
946
strcmp(principal->name.name_string.val[1], KRB5_ANON_NAME) != 0)
crypto/heimdal/kdc/kerberos5.c
992
rep.padata->val = NULL;
crypto/heimdal/kdc/krb5tgs.c
1128
name = server->name.name_string.val[0];
crypto/heimdal/kdc/krb5tgs.c
1130
name = server->name.name_string.val[1];
crypto/heimdal/kdc/krb5tgs.c
1546
t = &b->additional_tickets->val[0];
crypto/heimdal/kdc/krb5tgs.c
1694
if (b->etype.val[i] == adtkt.key.keytype)
crypto/heimdal/kdc/krb5tgs.c
1703
etype = b->etype.val[i];
crypto/heimdal/kdc/krb5tgs.c
1712
server, b->etype.val, b->etype.len, NULL,
crypto/heimdal/kdc/krb5tgs.c
2055
t = &b->additional_tickets->val[0];
crypto/heimdal/kdc/krb5tgs.c
304
if (ad->val[i].ad_type != KRB5_AUTHDATA_IF_RELEVANT)
crypto/heimdal/kdc/krb5tgs.c
307
ret = decode_AuthorizationData(ad->val[i].ad_data.data,
crypto/heimdal/kdc/krb5tgs.c
308
ad->val[i].ad_data.length,
crypto/heimdal/kdc/krb5tgs.c
318
if (child.val[j].ad_type == KRB5_AUTHDATA_WIN2K_PAC) {
crypto/heimdal/kdc/krb5tgs.c
324
child.val[j].ad_data.data,
crypto/heimdal/kdc/krb5tgs.c
325
child.val[j].ad_data.length,
crypto/heimdal/kdc/krb5tgs.c
44
&& strcmp(p->name_string.val[0], KRB5_TGS_NAME) == 0)
crypto/heimdal/kdc/krb5tgs.c
45
return p->name_string.val[1];
crypto/heimdal/kdc/krb5tgs.c
547
if (krb5_principal_compare(context, target, &acl->val[i]) == TRUE)
crypto/heimdal/kdc/krb5tgs.c
73
if (ad->val[pos].ad_type != KRB5_AUTHDATA_IF_RELEVANT)
crypto/heimdal/kdc/krb5tgs.c
76
ret = decode_AuthorizationData(ad->val[pos].ad_data.data,
crypto/heimdal/kdc/krb5tgs.c
77
ad->val[pos].ad_data.length,
crypto/heimdal/kdc/krb5tgs.c
900
ret = add_AuthorizationData(et.authorization_data, &auth_data->val[i]);
crypto/heimdal/kdc/krb5tgs.c
91
if (child.val[0].ad_type != KRB5_AUTHDATA_SIGNTICKET) {
crypto/heimdal/kdc/krb5tgs.c
916
free_AuthorizationDataElement(&ad->val[ad->len - 1]);
crypto/heimdal/kdc/krb5tgs.c
931
ek.last_req.val = calloc(1, sizeof(*ek.last_req.val));
crypto/heimdal/kdc/krb5tgs.c
932
if (ek.last_req.val == NULL) {
crypto/heimdal/kdc/krb5tgs.c
97
ret = der_copy_octet_string(&child.val[0].ad_data, data);
crypto/heimdal/kdc/misc.c
157
if (krb5_enctype_valid(context, h->entry.keys.val[i].key.keytype)
crypto/heimdal/kdc/misc.c
161
h->entry.keys.val[i].key.keytype, key);
crypto/heimdal/kdc/misc.c
76
ret = krb5_parse_name(context, principal->name.name_string.val[0],
crypto/heimdal/kdc/pkinit.c
1267
if (krb5_enctype_valid(context, req->req_body.etype.val[i]) == 0)
crypto/heimdal/kdc/pkinit.c
1275
enctype = req->req_body.etype.val[i];
crypto/heimdal/kdc/pkinit.c
1603
ret = decode_KRB5PrincipalName(list.val[i].data,
crypto/heimdal/kdc/pkinit.c
1604
list.val[i].length,
crypto/heimdal/kdc/pkinit.c
1613
if (size != list.val[i].length) {
crypto/heimdal/kdc/pkinit.c
1667
ret = decode_MS_UPN_SAN(list.val[0].data, list.val[0].length, &upn, &size);
crypto/heimdal/kdc/pkinit.c
1672
if (size != list.val[0].length) {
crypto/heimdal/kdc/pkinit.c
1753
pc->val[j].cert.data,
crypto/heimdal/kdc/pkinit.c
1754
pc->val[j].cert.length,
crypto/heimdal/kdc/pkinit.c
1798
if (strcmp(*subject_name, acl->val[0].subject) != 0)
crypto/heimdal/kdc/pkinit.c
1802
if (acl->val[0].issuer)
crypto/heimdal/kdc/pkinit.c
1804
if (acl->val[0].anchor)
crypto/heimdal/kdc/pkinit.c
1818
principal_mappings.val[i].principal);
crypto/heimdal/kdc/pkinit.c
1821
if (strcmp(principal_mappings.val[i].subject, *subject_name) != 0)
crypto/heimdal/kdc/pkinit.c
1852
tmp = realloc(principal_mappings.val,
crypto/heimdal/kdc/pkinit.c
1856
principal_mappings.val = tmp;
crypto/heimdal/kdc/pkinit.c
1862
principal_mappings.val[principal_mappings.len].principal = principal;
crypto/heimdal/kdc/pkinit.c
1864
principal_mappings.val[principal_mappings.len].subject = strdup(subject);
crypto/heimdal/kdc/pkinit.c
1865
if (principal_mappings.val[principal_mappings.len].subject == NULL) {
crypto/heimdal/kdc/pkinit.c
1974
principal_mappings.val = NULL;
crypto/heimdal/kdc/pkinit.c
550
pc->val[i].cert.data,
crypto/heimdal/kdc/pkinit.c
551
pc->val[i].cert.length,
crypto/heimdal/kdc/pkinit.c
651
if (edi->val[i].issuerAndSerialNumber == NULL)
crypto/heimdal/kdc/pkinit.c
661
ret = decode_IssuerAndSerialNumber(edi->val[i].issuerAndSerialNumber->data,
crypto/heimdal/kdc/pkinit.c
662
edi->val[i].issuerAndSerialNumber->length,
crypto/heimdal/kdc/pkinit.c
77
} *val;
crypto/heimdal/kdc/pkinit.c
862
ap.supportedCMSTypes->val,
crypto/heimdal/kpasswd/kpasswdd.c
684
krb5_addr2sockaddr (context, &addrs.val[i], sa, &sa_size, port);
crypto/heimdal/kpasswd/kpasswdd.c
694
ret = krb5_print_address (&addrs.val[i], str, sizeof(str), &len);
crypto/heimdal/kpasswd/kpasswdd.c
734
&addrs.val[i],
crypto/heimdal/kuser/klist.c
210
ret = krb5_print_address(&cred->addresses.val[j],
crypto/heimdal/kuser/klist.c
271
int val;
crypto/heimdal/kuser/klist.c
274
val = sec;
crypto/heimdal/kuser/klist.c
276
if (val < 0) {
crypto/heimdal/kuser/klist.c
278
val = -val;
crypto/heimdal/kuser/klist.c
281
unparse_time (val, buf, sizeof(buf));
crypto/heimdal/lib/asn1/asn1-template.h
114
void *val;
crypto/heimdal/lib/asn1/asn1_print.c
142
int val;
crypto/heimdal/lib/asn1/asn1_print.c
144
if (length <= sizeof(val)) {
crypto/heimdal/lib/asn1/asn1_print.c
145
ret = der_get_integer (buf, length, &val, NULL);
crypto/heimdal/lib/asn1/asn1_print.c
148
printf ("integer %d\n", val);
crypto/heimdal/lib/asn1/asn1parse.c
1958
(yyval.member)->val = (yyvsp[(3) - (4)].constant);
crypto/heimdal/lib/asn1/asn1parse.c
2421
(yyval.member)->val = (yyvsp[(3) - (4)].constant);
crypto/heimdal/lib/asn1/asn1parse.y
434
$$->val = $3;
crypto/heimdal/lib/asn1/asn1parse.y
817
$$->val = $3;
crypto/heimdal/lib/asn1/check-common.c
242
tests[i].val, &sz);
crypto/heimdal/lib/asn1/check-common.c
257
length_sz = (*length) (tests[i].val);
crypto/heimdal/lib/asn1/check-common.c
299
if ((*cmp)(data, tests[i].val) != 0) {
crypto/heimdal/lib/asn1/check-common.h
37
void *val;
crypto/heimdal/lib/asn1/check-der.c
100
test_one_int(int val)
crypto/heimdal/lib/asn1/check-der.c
106
len = _heim_len_int(val);
crypto/heimdal/lib/asn1/check-der.c
114
ret = der_put_integer(buf + 1 + len - 1, len, &val, &len_len);
crypto/heimdal/lib/asn1/check-der.c
116
printf("integer %d encode failed %d\n", val, ret);
crypto/heimdal/lib/asn1/check-der.c
121
val, ret, (unsigned long)len, (unsigned long)len_len);
crypto/heimdal/lib/asn1/check-der.c
127
printf("integer %d decode failed %d\n", val, ret);
crypto/heimdal/lib/asn1/check-der.c
132
val, (unsigned long)len, (unsigned long)len_len);
crypto/heimdal/lib/asn1/check-der.c
135
if (val != dval) {
crypto/heimdal/lib/asn1/check-der.c
137
val, dval);
crypto/heimdal/lib/asn1/check-der.c
142
printf("precanary dead %d\n", val);
crypto/heimdal/lib/asn1/check-der.c
146
printf("postecanary dead %d\n", val);
crypto/heimdal/lib/asn1/check-der.c
203
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-der.c
245
tests[0].val = &s1;
crypto/heimdal/lib/asn1/check-der.c
287
tests[0].val = &s1;
crypto/heimdal/lib/asn1/check-der.c
292
tests[1].val = &s2;
crypto/heimdal/lib/asn1/check-der.c
335
tests[0].val = &s1;
crypto/heimdal/lib/asn1/check-der.c
340
tests[1].val = &s2;
crypto/heimdal/lib/asn1/check-der.c
377
tests[0].val = &s1;
crypto/heimdal/lib/asn1/check-der.c
415
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-der.c
464
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-der.c
502
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-der.c
555
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-der.c
606
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-der.c
79
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-gen.c
1061
tests[0].val = &c1;
crypto/heimdal/lib/asn1/check-gen.c
1066
tests[1].val = &c2;
crypto/heimdal/lib/asn1/check-gen.c
1074
tests[2].val = &c3;
crypto/heimdal/lib/asn1/check-gen.c
1146
tests[0].val = &c0;
crypto/heimdal/lib/asn1/check-gen.c
1150
tests[1].val = &c1;
crypto/heimdal/lib/asn1/check-gen.c
1154
tests[2].val = &c2;
crypto/heimdal/lib/asn1/check-gen.c
1158
tests[3].val = &c3;
crypto/heimdal/lib/asn1/check-gen.c
1256
seq.val = NULL;
crypto/heimdal/lib/asn1/check-gen.c
126
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-gen.c
1387
tl.val = array;
crypto/heimdal/lib/asn1/check-gen.c
160
COMPARE_STRING(aa,ab,cname.name_string.val[i]);
crypto/heimdal/lib/asn1/check-gen.c
196
tests[i].val = &values[i];
crypto/heimdal/lib/asn1/check-gen.c
248
COMPARE_STRING(aa,ab,sname.name_string.val[i]);
crypto/heimdal/lib/asn1/check-gen.c
296
tests[0].val = &e1;
crypto/heimdal/lib/asn1/check-gen.c
347
n1.u.rdnSequence.val = rdn1;
crypto/heimdal/lib/asn1/check-gen.c
349
rdn1[0].val = atv1;
crypto/heimdal/lib/asn1/check-gen.c
366
n2.u.rdnSequence.val = rdn2;
crypto/heimdal/lib/asn1/check-gen.c
368
rdn2[0].val = atv2;
crypto/heimdal/lib/asn1/check-gen.c
384
tests[0].val = &n1;
crypto/heimdal/lib/asn1/check-gen.c
385
tests[1].val = &n2;
crypto/heimdal/lib/asn1/check-gen.c
432
tests[0].val = &ku1;
crypto/heimdal/lib/asn1/check-gen.c
437
tests[1].val = &ku2;
crypto/heimdal/lib/asn1/check-gen.c
441
tests[2].val = &ku3;
crypto/heimdal/lib/asn1/check-gen.c
444
tests[3].val = &ku4;
crypto/heimdal/lib/asn1/check-gen.c
492
tests[0].val = &tf1;
crypto/heimdal/lib/asn1/check-gen.c
497
tests[1].val = &tf2;
crypto/heimdal/lib/asn1/check-gen.c
501
tests[2].val = &tf3;
crypto/heimdal/lib/asn1/check-gen.c
504
tests[3].val = &tf4;
crypto/heimdal/lib/asn1/check-gen.c
545
tests[0].val = &times[0];
crypto/heimdal/lib/asn1/check-gen.c
546
tests[1].val = &times[1];
crypto/heimdal/lib/asn1/check-gen.c
697
tests[0].val = &lt1;
crypto/heimdal/lib/asn1/check-gen.c
89
COMPARE_STRING(pa,pb,name.name_string.val[i]);
crypto/heimdal/lib/asn1/check-gen.c
907
tests[0].val = &c1;
crypto/heimdal/lib/asn1/check-gen.c
912
tests[1].val = &c2_1;
crypto/heimdal/lib/asn1/check-gen.c
926
tests[1].val = &c2_2;
crypto/heimdal/lib/asn1/check-gen.c
977
tests[0].val = &c0;
crypto/heimdal/lib/asn1/der_get.c
106
int64_t val = 0;
crypto/heimdal/lib/asn1/der_get.c
109
if (len > sizeof(val))
crypto/heimdal/lib/asn1/der_get.c
113
val = (signed char)*p++;
crypto/heimdal/lib/asn1/der_get.c
115
val = val * 256 + *p++;
crypto/heimdal/lib/asn1/der_get.c
117
*ret = val;
crypto/heimdal/lib/asn1/der_get.c
124
size_t *val, size_t *size)
crypto/heimdal/lib/asn1/der_get.c
133
*val = v;
crypto/heimdal/lib/asn1/der_get.c
141
*val = ASN1_INDEFINITE;
crypto/heimdal/lib/asn1/der_get.c
150
*val = tmp;
crypto/heimdal/lib/asn1/der_get.c
48
unsigned val = 0;
crypto/heimdal/lib/asn1/der_get.c
51
if (len == sizeof(val) + 1 && p[0] == 0)
crypto/heimdal/lib/asn1/der_get.c
53
else if (len > sizeof(val))
crypto/heimdal/lib/asn1/der_get.c
57
val = val * 256 + *p++;
crypto/heimdal/lib/asn1/der_get.c
58
*ret = val;
crypto/heimdal/lib/asn1/der_get.c
67
uint64_t val = 0;
crypto/heimdal/lib/asn1/der_get.c
70
if (len == sizeof(val) + 1 && p[0] == 0)
crypto/heimdal/lib/asn1/der_get.c
72
else if (len > sizeof(val))
crypto/heimdal/lib/asn1/der_get.c
76
val = val * 256 + *p++;
crypto/heimdal/lib/asn1/der_get.c
77
*ret = val;
crypto/heimdal/lib/asn1/der_get.c
86
int val = 0;
crypto/heimdal/lib/asn1/der_get.c
89
if (len > sizeof(val))
crypto/heimdal/lib/asn1/der_get.c
93
val = (signed char)*p++;
crypto/heimdal/lib/asn1/der_get.c
95
val = val * 256 + *p++;
crypto/heimdal/lib/asn1/der_get.c
97
*ret = val;
crypto/heimdal/lib/asn1/der_length.c
104
_heim_len_int64 (int64_t val)
crypto/heimdal/lib/asn1/der_length.c
109
if (val >= 0) {
crypto/heimdal/lib/asn1/der_length.c
111
q = val % 256;
crypto/heimdal/lib/asn1/der_length.c
113
val /= 256;
crypto/heimdal/lib/asn1/der_length.c
114
} while(val);
crypto/heimdal/lib/asn1/der_length.c
118
val = ~val;
crypto/heimdal/lib/asn1/der_length.c
120
q = ~(val % 256);
crypto/heimdal/lib/asn1/der_length.c
122
val /= 256;
crypto/heimdal/lib/asn1/der_length.c
123
} while(val);
crypto/heimdal/lib/asn1/der_length.c
41
_heim_len_unsigned (unsigned val)
crypto/heimdal/lib/asn1/der_length.c
48
last_val_gt_128 = (val >= 128);
crypto/heimdal/lib/asn1/der_length.c
49
val /= 256;
crypto/heimdal/lib/asn1/der_length.c
50
} while (val);
crypto/heimdal/lib/asn1/der_length.c
59
_heim_len_unsigned64 (uint64_t val)
crypto/heimdal/lib/asn1/der_length.c
66
last_val_gt_128 = (val >= 128);
crypto/heimdal/lib/asn1/der_length.c
67
val /= 256;
crypto/heimdal/lib/asn1/der_length.c
68
} while (val);
crypto/heimdal/lib/asn1/der_length.c
77
_heim_len_int (int val)
crypto/heimdal/lib/asn1/der_length.c
82
if (val >= 0) {
crypto/heimdal/lib/asn1/der_length.c
84
q = val % 256;
crypto/heimdal/lib/asn1/der_length.c
86
val /= 256;
crypto/heimdal/lib/asn1/der_length.c
87
} while(val);
crypto/heimdal/lib/asn1/der_length.c
91
val = ~val;
crypto/heimdal/lib/asn1/der_length.c
93
q = ~(val % 256);
crypto/heimdal/lib/asn1/der_length.c
95
val /= 256;
crypto/heimdal/lib/asn1/der_length.c
96
} while(val);
crypto/heimdal/lib/asn1/der_put.c
114
int val = *v;
crypto/heimdal/lib/asn1/der_put.c
116
if(val >= 0) {
crypto/heimdal/lib/asn1/der_put.c
120
*p-- = val % 256;
crypto/heimdal/lib/asn1/der_put.c
122
val /= 256;
crypto/heimdal/lib/asn1/der_put.c
123
} while(val);
crypto/heimdal/lib/asn1/der_put.c
131
val = ~val;
crypto/heimdal/lib/asn1/der_put.c
135
*p-- = ~(val % 256);
crypto/heimdal/lib/asn1/der_put.c
137
val /= 256;
crypto/heimdal/lib/asn1/der_put.c
138
} while(val);
crypto/heimdal/lib/asn1/der_put.c
154
int64_t val = *v;
crypto/heimdal/lib/asn1/der_put.c
156
if(val >= 0) {
crypto/heimdal/lib/asn1/der_put.c
160
*p-- = val % 256;
crypto/heimdal/lib/asn1/der_put.c
162
val /= 256;
crypto/heimdal/lib/asn1/der_put.c
163
} while(val);
crypto/heimdal/lib/asn1/der_put.c
171
val = ~val;
crypto/heimdal/lib/asn1/der_put.c
175
*p-- = ~(val % 256);
crypto/heimdal/lib/asn1/der_put.c
177
val /= 256;
crypto/heimdal/lib/asn1/der_put.c
178
} while(val);
crypto/heimdal/lib/asn1/der_put.c
192
der_put_length (unsigned char *p, size_t len, size_t val, size_t *size)
crypto/heimdal/lib/asn1/der_put.c
197
if (val < 128) {
crypto/heimdal/lib/asn1/der_put.c
198
*p = val;
crypto/heimdal/lib/asn1/der_put.c
203
while(val > 0) {
crypto/heimdal/lib/asn1/der_put.c
206
*p-- = val % 256;
crypto/heimdal/lib/asn1/der_put.c
207
val /= 256;
crypto/heimdal/lib/asn1/der_put.c
50
unsigned val = *v;
crypto/heimdal/lib/asn1/der_put.c
52
if (val) {
crypto/heimdal/lib/asn1/der_put.c
53
while (len > 0 && val) {
crypto/heimdal/lib/asn1/der_put.c
54
*p-- = val % 256;
crypto/heimdal/lib/asn1/der_put.c
55
val /= 256;
crypto/heimdal/lib/asn1/der_put.c
58
if (val != 0)
crypto/heimdal/lib/asn1/der_put.c
82
uint64_t val = *v;
crypto/heimdal/lib/asn1/der_put.c
84
if (val) {
crypto/heimdal/lib/asn1/der_put.c
85
while (len > 0 && val) {
crypto/heimdal/lib/asn1/der_put.c
86
*p-- = val % 256;
crypto/heimdal/lib/asn1/der_put.c
87
val /= 256;
crypto/heimdal/lib/asn1/der_put.c
90
if (val != 0)
crypto/heimdal/lib/asn1/gen.c
299
gen_assign_defval(const char *var, struct value *val)
crypto/heimdal/lib/asn1/gen.c
301
switch(val->type) {
crypto/heimdal/lib/asn1/gen.c
303
fprintf(codefile, "if((%s = strdup(\"%s\")) == NULL)\nreturn ENOMEM;\n", var, val->u.stringvalue);
crypto/heimdal/lib/asn1/gen.c
306
fprintf(codefile, "%s = %" PRId64 ";\n", var, val->u.integervalue);
crypto/heimdal/lib/asn1/gen.c
309
if(val->u.booleanvalue)
crypto/heimdal/lib/asn1/gen.c
320
gen_compare_defval(const char *var, struct value *val)
crypto/heimdal/lib/asn1/gen.c
322
switch(val->type) {
crypto/heimdal/lib/asn1/gen.c
324
fprintf(codefile, "if(strcmp(%s, \"%s\") != 0)\n", var, val->u.stringvalue);
crypto/heimdal/lib/asn1/gen.c
327
fprintf(codefile, "if(%s != %" PRId64 ")\n", var, val->u.integervalue);
crypto/heimdal/lib/asn1/gen.c
330
if(val->u.booleanvalue)
crypto/heimdal/lib/asn1/gen.c
550
fprintf(headerfile, "%s(%d)%s\n", m->gen_name, m->val,
crypto/heimdal/lib/asn1/gen.c
574
fprintf (headerfile, "%s(%d)%s\n", m->name, m->val,
crypto/heimdal/lib/asn1/gen.c
720
fprintf(headerfile, "%s = %d%s\n", m->gen_name, m->val,
crypto/heimdal/lib/asn1/gen.c
768
while (pos < m->val) {
crypto/heimdal/lib/asn1/gen.c
809
fprintf (headerfile, "%s = %d%s\n", m->gen_name, m->val,
crypto/heimdal/lib/asn1/gen_decode.c
303
while (m->val / 8 > pos / 8) {
crypto/heimdal/lib/asn1/gen_decode.c
311
name, m->gen_name, 7 - m->val % 8);
crypto/heimdal/lib/asn1/gen_encode.c
170
pos = t->members->prev->val;
crypto/heimdal/lib/asn1/gen_encode.c
182
pos = ASN1_TAILQ_LAST(t->members, memhead)->val;
crypto/heimdal/lib/asn1/gen_encode.c
189
while (m->val / 8 < pos / 8) {
crypto/heimdal/lib/asn1/gen_encode.c
215
name, m->gen_name, 7 - m->val % 8);
crypto/heimdal/lib/asn1/gen_glue.c
117
"\t{\"%s\",\t1U << %d},\n", m->name, m->val);
crypto/heimdal/lib/asn1/gen_glue.c
57
m->gen_name, m->val);
crypto/heimdal/lib/asn1/gen_glue.c
82
m->gen_name, m->val);
crypto/heimdal/lib/asn1/gen_length.c
111
int pos = ASN1_TAILQ_LAST(t->members, memhead)->val;
crypto/heimdal/lib/asn1/gen_length.c
116
while (m->val / 8 < pos / 8) {
crypto/heimdal/lib/asn1/gen_template.c
569
add_line(&template, "{ 0, %d, 0 } /* %s */", m->val, m->gen_name);
crypto/heimdal/lib/asn1/symbol.h
91
int val;
crypto/heimdal/lib/asn1/template.c
1043
tel->val = calloc(fel->len, ellen);
crypto/heimdal/lib/asn1/template.c
1044
if (tel->val == NULL)
crypto/heimdal/lib/asn1/template.c
1051
DPOC(fel->val, (i * ellen)),
crypto/heimdal/lib/asn1/template.c
1052
DPO(tel->val, (i *ellen)));
crypto/heimdal/lib/asn1/template.c
330
tmp = realloc(el->val, newlen);
crypto/heimdal/lib/asn1/template.c
335
el->val = tmp;
crypto/heimdal/lib/asn1/template.c
338
DPO(el->val, vallength), &newsize);
crypto/heimdal/lib/asn1/template.c
533
struct heim_octet_string *val;
crypto/heimdal/lib/asn1/template.c
534
unsigned char *elptr = el->val;
crypto/heimdal/lib/asn1/template.c
540
if (el->len > UINT_MAX/sizeof(val[0]))
crypto/heimdal/lib/asn1/template.c
543
val = malloc(sizeof(val[0]) * el->len);
crypto/heimdal/lib/asn1/template.c
544
if (val == NULL)
crypto/heimdal/lib/asn1/template.c
551
val[i].length = _asn1_length(t->ptr, elptr);
crypto/heimdal/lib/asn1/template.c
552
val[i].data = malloc(val[i].length);
crypto/heimdal/lib/asn1/template.c
554
ret = _asn1_encode(t->ptr, DPO(val[i].data, val[i].length - 1),
crypto/heimdal/lib/asn1/template.c
555
val[i].length, elptr, &l);
crypto/heimdal/lib/asn1/template.c
565
totallen += val[i].length;
crypto/heimdal/lib/asn1/template.c
571
free(val[i].data);
crypto/heimdal/lib/asn1/template.c
573
free(val);
crypto/heimdal/lib/asn1/template.c
579
qsort(val, el->len, sizeof(val[0]), _heim_der_set_sort);
crypto/heimdal/lib/asn1/template.c
583
p -= val[i].length;
crypto/heimdal/lib/asn1/template.c
584
memcpy(p + 1, val[i].data, val[i].length);
crypto/heimdal/lib/asn1/template.c
585
free(val[i].data);
crypto/heimdal/lib/asn1/template.c
587
free(val);
crypto/heimdal/lib/asn1/template.c
597
unsigned char *elptr = el->val;
crypto/heimdal/lib/asn1/template.c
763
const unsigned char *element = el->val;
crypto/heimdal/lib/asn1/template.c
888
unsigned char *element = el->val;
crypto/heimdal/lib/asn1/template.c
895
free(el->val);
crypto/heimdal/lib/asn1/template.c
896
el->val = NULL;
crypto/heimdal/lib/gssapi/krb5/import_name.c
109
hostname = p->name.name_string.val[1];
crypto/heimdal/lib/gssapi/krb5/import_name.c
111
service = p->name.name_string.val[0];
crypto/heimdal/lib/gssapi/krb5/init_sec_context.c
355
name->name.name_string.val[1],
crypto/heimdal/lib/gssapi/krb5/sequence.c
113
elem_set(struct gss_msg_order *o, unsigned int slot, OM_uint32 val)
crypto/heimdal/lib/gssapi/krb5/sequence.c
115
o->elem[slot % o->jitter_window] = val;
crypto/heimdal/lib/gssapi/spnego/accept_sec_context.c
556
&ni->mechTypes.val[0],
crypto/heimdal/lib/gssapi/spnego/accept_sec_context.c
616
&ni->mechTypes.val[j],
crypto/heimdal/lib/gssapi/spnego/compat.c
122
if (ctx->initiator_mech_types.val != NULL)
crypto/heimdal/lib/gssapi/spnego/compat.c
247
mechtypelist->val = NULL;
crypto/heimdal/lib/gssapi/spnego/compat.c
65
ctx->initiator_mech_types.val = NULL;
crypto/heimdal/lib/gssapi/spnego/init_sec_context.c
344
ctx->initiator_mech_types.val = ni.mechTypes.val;
crypto/heimdal/lib/gssapi/spnego/init_sec_context.c
346
ni.mechTypes.val = NULL;
crypto/heimdal/lib/hdb/common.c
117
ret = krb5_parse_name(context, principal->name.name_string.val[0],
crypto/heimdal/lib/hdb/common.c
225
hdb_principal2key(context, &aliases->aliases.val[i], &akey);
crypto/heimdal/lib/hdb/common.c
254
hdb_principal2key(context, &aliases->aliases.val[i], &key);
crypto/heimdal/lib/hdb/common.c
286
hdb_principal2key(context, &aliases->aliases.val[i], &akey);
crypto/heimdal/lib/hdb/ext.c
128
HDB_extension *ext3 = &entry->extensions->val[i];
crypto/heimdal/lib/hdb/ext.c
160
es = realloc(entry->extensions->val,
crypto/heimdal/lib/hdb/ext.c
161
(entry->extensions->len+1)*sizeof(entry->extensions->val[0]));
crypto/heimdal/lib/hdb/ext.c
166
entry->extensions->val = es;
crypto/heimdal/lib/hdb/ext.c
169
&entry->extensions->val[entry->extensions->len]);
crypto/heimdal/lib/hdb/ext.c
189
if (entry->extensions->val[i].data.element == (unsigned)type) {
crypto/heimdal/lib/hdb/ext.c
190
free_HDB_extension(&entry->extensions->val[i]);
crypto/heimdal/lib/hdb/ext.c
191
memmove(&entry->extensions->val[i],
crypto/heimdal/lib/hdb/ext.c
192
&entry->extensions->val[i + 1],
crypto/heimdal/lib/hdb/ext.c
193
sizeof(entry->extensions->val[i]) * (entry->extensions->len - i - 1));
crypto/heimdal/lib/hdb/ext.c
198
free(entry->extensions->val);
crypto/heimdal/lib/hdb/ext.c
50
if (ent->extensions->val[i].data.element !=
crypto/heimdal/lib/hdb/ext.c
53
if (ent->extensions->val[i].mandatory) {
crypto/heimdal/lib/hdb/ext.c
72
if (entry->extensions->val[i].data.element == (unsigned)type)
crypto/heimdal/lib/hdb/ext.c
73
return &entry->extensions->val[i];
crypto/heimdal/lib/hdb/hdb-ldap.c
1023
ent->entry.keys.val = (Key *) calloc(ent->entry.keys.len, sizeof(Key));
crypto/heimdal/lib/hdb/hdb-ldap.c
1024
if (ent->entry.keys.val == NULL) {
crypto/heimdal/lib/hdb/hdb-ldap.c
1031
(size_t) keys[i]->bv_len, &ent->entry.keys.val[i], &l);
crypto/heimdal/lib/hdb/hdb-ldap.c
1042
ent->entry.keys.val = NULL;
crypto/heimdal/lib/hdb/hdb-ldap.c
1060
ent->entry.etypes->val = calloc(ent->entry.etypes->len, sizeof(int));
crypto/heimdal/lib/hdb/hdb-ldap.c
1061
if (ent->entry.etypes->val == NULL) {
crypto/heimdal/lib/hdb/hdb-ldap.c
1078
ent->entry.etypes->val[i] = atoi(buf);
crypto/heimdal/lib/hdb/hdb-ldap.c
1085
if (ent->entry.keys.val[i].key.keytype == ETYPE_ARCFOUR_HMAC_MD5) {
crypto/heimdal/lib/hdb/hdb-ldap.c
1098
keys = realloc(ent->entry.keys.val,
crypto/heimdal/lib/hdb/hdb-ldap.c
1099
(ent->entry.keys.len + 1) * sizeof(ent->entry.keys.val[0]));
crypto/heimdal/lib/hdb/hdb-ldap.c
1106
ent->entry.keys.val = keys;
crypto/heimdal/lib/hdb/hdb-ldap.c
1107
memset(&ent->entry.keys.val[ent->entry.keys.len], 0, sizeof(Key));
crypto/heimdal/lib/hdb/hdb-ldap.c
1108
ent->entry.keys.val[ent->entry.keys.len].key.keytype = ETYPE_ARCFOUR_HMAC_MD5;
crypto/heimdal/lib/hdb/hdb-ldap.c
1109
ret = krb5_data_alloc (&ent->entry.keys.val[ent->entry.keys.len].key.keyvalue, 16);
crypto/heimdal/lib/hdb/hdb-ldap.c
1117
ent->entry.keys.val[ent->entry.keys.len].key.keyvalue.data, 16);
crypto/heimdal/lib/hdb/hdb-ldap.c
1127
ent->entry.etypes->val = NULL;
crypto/heimdal/lib/hdb/hdb-ldap.c
1132
if (ent->entry.etypes->val[i] == ETYPE_ARCFOUR_HMAC_MD5)
crypto/heimdal/lib/hdb/hdb-ldap.c
1136
etypes = realloc(ent->entry.etypes->val,
crypto/heimdal/lib/hdb/hdb-ldap.c
1138
sizeof(ent->entry.etypes->val[0]));
crypto/heimdal/lib/hdb/hdb-ldap.c
1144
ent->entry.etypes->val = etypes;
crypto/heimdal/lib/hdb/hdb-ldap.c
1145
ent->entry.etypes->val[ent->entry.etypes->len] =
crypto/heimdal/lib/hdb/hdb-ldap.c
340
char *val;
crypto/heimdal/lib/hdb/hdb-ldap.c
342
ret = LDAP_get_string_value(db, entry, attribute, &val);
crypto/heimdal/lib/hdb/hdb-ldap.c
345
*ptr = atoi(val);
crypto/heimdal/lib/hdb/hdb-ldap.c
346
free(val);
crypto/heimdal/lib/hdb/hdb-ldap.c
630
&& ent->entry.keys.val[i].key.keytype == ETYPE_ARCFOUR_HMAC_MD5) {
crypto/heimdal/lib/hdb/hdb-ldap.c
637
ret = hdb_unseal_key(context, db, &ent->entry.keys.val[i]);
crypto/heimdal/lib/hdb/hdb-ldap.c
641
nt = ent->entry.keys.val[i].key.keyvalue.data;
crypto/heimdal/lib/hdb/hdb-ldap.c
674
ASN1_MALLOC_ENCODE(Key, buf, buf_size, &ent->entry.keys.val[i], &len, ret);
crypto/heimdal/lib/hdb/hdb-ldap.c
711
ent->entry.keys.val[i].key.keytype == ETYPE_ARCFOUR_HMAC_MD5)
crypto/heimdal/lib/hdb/hdb-ldap.c
717
ent->entry.etypes->val[i]);
crypto/heimdal/lib/hdb/hdb-mitdb.c
1000
return val;
crypto/heimdal/lib/hdb/hdb-mitdb.c
1006
int val;
crypto/heimdal/lib/hdb/hdb-mitdb.c
1008
sscanf(q, "%u", &val);
crypto/heimdal/lib/hdb/hdb-mitdb.c
1009
return val;
crypto/heimdal/lib/hdb/hdb-mitdb.c
145
Salt *salt = ent->keys.val[key_num].salt;
crypto/heimdal/lib/hdb/hdb-mitdb.c
163
len += strlen(ent->principal->name.name_string.val[i]);
crypto/heimdal/lib/hdb/hdb-mitdb.c
170
ent->principal->name.name_string.val[i],
crypto/heimdal/lib/hdb/hdb-mitdb.c
171
strlen(ent->principal->name.name_string.val[i]));
crypto/heimdal/lib/hdb/hdb-mitdb.c
172
p += strlen(ent->principal->name.name_string.val[i]);
crypto/heimdal/lib/hdb/hdb-mitdb.c
201
free(ent->keys.val[key_num].salt);
crypto/heimdal/lib/hdb/hdb-mitdb.c
202
ent->keys.val[key_num].salt = NULL;
crypto/heimdal/lib/hdb/hdb-mitdb.c
400
free_Key(&entry->keys.val[j]);
crypto/heimdal/lib/hdb/hdb-mitdb.c
401
free(entry->keys.val);
crypto/heimdal/lib/hdb/hdb-mitdb.c
403
entry->keys.val = NULL;
crypto/heimdal/lib/hdb/hdb-mitdb.c
411
ptr = realloc(entry->keys.val, sizeof(entry->keys.val[0]) * (entry->keys.len + 1));
crypto/heimdal/lib/hdb/hdb-mitdb.c
416
entry->keys.val = ptr;
crypto/heimdal/lib/hdb/hdb-mitdb.c
419
k = &entry->keys.val[entry->keys.len];
crypto/heimdal/lib/hdb/hdb-mitdb.c
997
int val;
crypto/heimdal/lib/hdb/hdb-mitdb.c
999
sscanf(q, "%d", &val);
crypto/heimdal/lib/hdb/hdb-sqlite.c
574
ret = krb5_unparse_name(context, &aliases->aliases.val[i],
crypto/heimdal/lib/hdb/hdb.c
104
for (k = *key ? (*key) + 1 : e->keys.val;
crypto/heimdal/lib/hdb/hdb.c
105
k < e->keys.val + e->keys.len;
crypto/heimdal/lib/hdb/hdb.c
178
k = &ent->entry.keys.val[i];
crypto/heimdal/lib/hdb/hdb.c
431
entry->entry.keys.val = calloc(1, sizeof(entry->entry.keys.val[0]));
crypto/heimdal/lib/hdb/hdb.c
432
if (entry->entry.keys.val == NULL)
crypto/heimdal/lib/hdb/hdb.c
436
entry->entry.keys.val[0].mkvno = NULL;
crypto/heimdal/lib/hdb/hdb.c
437
entry->entry.keys.val[0].salt = NULL;
crypto/heimdal/lib/hdb/hdb.c
441
&entry->entry.keys.val[0].key);
crypto/heimdal/lib/hdb/keys.c
225
tmp_keysets = realloc(hist_keys->val,
crypto/heimdal/lib/hdb/keys.c
226
sizeof (*hist_keys->val) * (hist_keys->len + 1));
crypto/heimdal/lib/hdb/keys.c
229
hist_keys->val = tmp_keysets;
crypto/heimdal/lib/hdb/keys.c
230
memmove(&hist_keys->val[1], hist_keys->val,
crypto/heimdal/lib/hdb/keys.c
231
sizeof (*hist_keys->val) * hist_keys->len++);
crypto/heimdal/lib/hdb/keys.c
239
hist_keys->val = calloc(1, sizeof (*hist_keys->val));
crypto/heimdal/lib/hdb/keys.c
240
if (hist_keys->val == NULL) {
crypto/heimdal/lib/hdb/keys.c
247
hist_keys->val[0].keys.val = entry->keys.val;
crypto/heimdal/lib/hdb/keys.c
248
hist_keys->val[0].keys.len = entry->keys.len;
crypto/heimdal/lib/hdb/keys.c
249
hist_keys->val[0].kvno = entry->kvno;
crypto/heimdal/lib/hdb/keys.c
250
hist_keys->val[0].replace_time = time(NULL);
crypto/heimdal/lib/hdb/keys.c
65
hdb_free_keys(context, keysets[i].keys.len, keysets[i].keys.val);
crypto/heimdal/lib/hdb/keys.c
66
keysets[i].keys.val = NULL;
crypto/heimdal/lib/hdb/keytab.c
232
enctype = ent.entry.keys.val[0].key.keytype;
crypto/heimdal/lib/hdb/keytab.c
235
if(ent.entry.keys.val[i].key.keytype == enctype) {
crypto/heimdal/lib/hdb/keytab.c
239
&ent.entry.keys.val[i].key,
crypto/heimdal/lib/hdb/keytab.c
371
&c->hdb_entry.entry.keys.val[c->key_idx].key,
crypto/heimdal/lib/hdb/mkey.c
516
if (mitkey == NULL || mit_strong_etype(ent->keys.val[i].key.keytype)) {
crypto/heimdal/lib/hdb/mkey.c
517
ret = _hdb_reseal_key_mkey(context, &ent->keys.val[i], mkey,
crypto/heimdal/lib/hdb/mkey.c
535
krb5_free_keyblock_contents(context, &ent->keys.val[0].key);
crypto/heimdal/lib/hdb/mkey.c
540
"XXXX", salt, &ent->keys.val[0].key);
crypto/heimdal/lib/hdb/mkey.c
590
tmp_val = ent->keys.val;
crypto/heimdal/lib/hdb/mkey.c
596
if (kvno != 0 && hist_keys->val[i].kvno != kvno)
crypto/heimdal/lib/hdb/mkey.c
598
for (k = 0; k < hist_keys->val[i].keys.len; k++) {
crypto/heimdal/lib/hdb/mkey.c
600
&hist_keys->val[i].keys.val[k],
crypto/heimdal/lib/hdb/mkey.c
629
tmp_keys = realloc(hist_keys->val,
crypto/heimdal/lib/hdb/mkey.c
630
sizeof (*hist_keys->val) * (hist_keys->len + 1));
crypto/heimdal/lib/hdb/mkey.c
635
sizeof (*hist_keys->val) * hist_keys->len++);
crypto/heimdal/lib/hdb/mkey.c
637
tmp_keys[0].keys.val = ent->keys.val;
crypto/heimdal/lib/hdb/mkey.c
641
ent->keys.len = hist_keys->val[i].keys.len;
crypto/heimdal/lib/hdb/mkey.c
642
ent->keys.val = hist_keys->val[i].keys.val;
crypto/heimdal/lib/hdb/mkey.c
701
ret = hdb_seal_key_mkey(context, &ent->keys.val[i], mkey);
crypto/heimdal/lib/hdb/print.c
225
if(ent->keys.val[i].mkvno)
crypto/heimdal/lib/hdb/print.c
227
*ent->keys.val[i].mkvno,
crypto/heimdal/lib/hdb/print.c
228
ent->keys.val[i].key.keytype);
crypto/heimdal/lib/hdb/print.c
231
ent->keys.val[i].key.keytype);
crypto/heimdal/lib/hdb/print.c
233
append_hex(context, sp, 0, 0, &ent->keys.val[i].key.keyvalue);
crypto/heimdal/lib/hdb/print.c
236
if(ent->keys.val[i].salt){
crypto/heimdal/lib/hdb/print.c
237
append_string(context, sp, "%u/", ent->keys.val[i].salt->type);
crypto/heimdal/lib/hdb/print.c
238
append_hex(context, sp, 0, 0, &ent->keys.val[i].salt->salt);
crypto/heimdal/lib/hdb/print.c
296
&ent->extensions->val[i], &sz, ret);
crypto/heimdal/lib/hdb/print.c
394
if (!mit_strong_etype(ent->keys.val[i].key.keytype))
crypto/heimdal/lib/hdb/print.c
405
if (hist_keys->val[i].kvno >= ent->kvno)
crypto/heimdal/lib/hdb/print.c
407
for (k = 0; k < hist_keys->val[i].keys.len; k++) {
crypto/heimdal/lib/hdb/print.c
408
if (ent->keys.val[k].key.keytype == ETYPE_DES_CBC_MD4 ||
crypto/heimdal/lib/hdb/print.c
409
ent->keys.val[k].key.keytype == ETYPE_DES_CBC_MD5)
crypto/heimdal/lib/hdb/print.c
447
time_t val;
crypto/heimdal/lib/hdb/print.c
451
val = ptr[0] | (ptr[1] << 8) | (ptr[2] << 16) | (ptr[3] << 24);
crypto/heimdal/lib/hdb/print.c
452
d.data = &val;
crypto/heimdal/lib/hdb/print.c
468
unsigned int val;
crypto/heimdal/lib/hdb/print.c
475
val = ptr[0] | (ptr[1] << 8) | (ptr[2] << 16) | (ptr[3] << 24);
crypto/heimdal/lib/hdb/print.c
476
d.data = &val;
crypto/heimdal/lib/hdb/print.c
500
unsigned int val;
crypto/heimdal/lib/hdb/print.c
506
val = ptr[0] | (ptr[1] << 8) | (ptr[2] << 16) | (ptr[3] << 24);
crypto/heimdal/lib/hdb/print.c
507
d.data = &val;
crypto/heimdal/lib/hdb/print.c
534
if (!mit_strong_etype(ent->keys.val[i].key.keytype))
crypto/heimdal/lib/hdb/print.c
537
&ent->keys.val[i]);
crypto/heimdal/lib/hdb/print.c
545
if (hist_keys->val[k].kvno != ent->kvno - i)
crypto/heimdal/lib/hdb/print.c
547
for (m = 0; m < hist_keys->val[k].keys.len; m++) {
crypto/heimdal/lib/hdb/print.c
548
if (ent->keys.val[k].key.keytype == ETYPE_DES_CBC_MD4 ||
crypto/heimdal/lib/hdb/print.c
549
ent->keys.val[k].key.keytype == ETYPE_DES_CBC_MD5)
crypto/heimdal/lib/hdb/print.c
552
hist_keys->val[k].kvno,
crypto/heimdal/lib/hdb/print.c
553
&hist_keys->val[k].keys.val[m]);
crypto/heimdal/lib/hx509/ca.c
1495
ai->authorityCertIssuer->val = gns.val;
crypto/heimdal/lib/hx509/ca.c
274
ret = hx509_ca_tbs_add_eku(context, tbs, &eku.val[i]);
crypto/heimdal/lib/hx509/ca.c
428
if (der_heim_oid_cmp(oid, &tbs->eku.val[i]) == 0)
crypto/heimdal/lib/hx509/ca.c
432
ptr = realloc(tbs->eku.val, sizeof(tbs->eku.val[0]) * (tbs->eku.len + 1));
crypto/heimdal/lib/hx509/ca.c
437
tbs->eku.val = ptr;
crypto/heimdal/lib/hx509/ca.c
438
ret = der_copy_oid(oid, &tbs->eku.val[tbs->eku.len]);
crypto/heimdal/lib/hx509/ca.c
481
name.u.fullName.val = &gn;
crypto/heimdal/lib/hx509/ca.c
628
p.principalName.name_string.val =
crypto/heimdal/lib/hx509/ca.c
629
calloc(n, sizeof(*p.principalName.name_string.val));
crypto/heimdal/lib/hx509/ca.c
630
if (p.principalName.name_string.val == NULL) {
crypto/heimdal/lib/hx509/ca.c
654
p.principalName.name_string.val[n++] = q;
crypto/heimdal/lib/hx509/ca.c
675
if (p.principalName.name_string.val)
crypto/heimdal/lib/hx509/ca.c
676
free (p.principalName.name_string.val);
crypto/heimdal/lib/hx509/cert.c
1191
hx509_cert *val;
crypto/heimdal/lib/hx509/cert.c
1192
val = realloc(path->val, (path->len + 1) * sizeof(path->val[0]));
crypto/heimdal/lib/hx509/cert.c
1193
if (val == NULL) {
crypto/heimdal/lib/hx509/cert.c
1198
path->val = val;
crypto/heimdal/lib/hx509/cert.c
1199
path->val[path->len] = hx509_cert_ref(cert);
crypto/heimdal/lib/hx509/cert.c
1211
hx509_cert_free(path->val[i]);
crypto/heimdal/lib/hx509/cert.c
1212
free(path->val);
crypto/heimdal/lib/hx509/cert.c
1213
path->val = NULL;
crypto/heimdal/lib/hx509/cert.c
1280
certificate_is_anchor(context, anchors, path->val[path->len - 1]))
crypto/heimdal/lib/hx509/cert.c
1282
hx509_cert_free(path->val[path->len - 1]);
crypto/heimdal/lib/hx509/cert.c
1678
NameConstraints *val;
crypto/heimdal/lib/hx509/cert.c
1679
val = realloc(nc->val, sizeof(nc->val[0]) * (nc->len + 1));
crypto/heimdal/lib/hx509/cert.c
1680
if (val == NULL) {
crypto/heimdal/lib/hx509/cert.c
1685
nc->val = val;
crypto/heimdal/lib/hx509/cert.c
1686
ret = copy_NameConstraints(&tnc, &nc->val[nc->len]);
crypto/heimdal/lib/hx509/cert.c
1710
if (der_heim_oid_cmp(&c->val[i].type, &n->val[i].type) != 0)
crypto/heimdal/lib/hx509/cert.c
1712
ret = _hx509_name_ds_cmp(&c->val[i].value, &n->val[i].value, &diff);
crypto/heimdal/lib/hx509/cert.c
1733
ret = match_RDN(&c->u.rdnSequence.val[i], &n->u.rdnSequence.val[i]);
crypto/heimdal/lib/hx509/cert.c
1845
if (n->element == sa.val[j].element) {
crypto/heimdal/lib/hx509/cert.c
1847
ret = match_general_name(n, &sa.val[j], match);
crypto/heimdal/lib/hx509/cert.c
1865
if (t->val[i].minimum && t->val[i].maximum)
crypto/heimdal/lib/hx509/cert.c
1874
if (t->val[i].base.element == choice_GeneralName_directoryName
crypto/heimdal/lib/hx509/cert.c
1886
ret = match_general_name(&t->val[i].base, &certname, &name);
crypto/heimdal/lib/hx509/cert.c
1894
ret = match_alt_name(&t->val[i].base, c, &same, &alt_name);
crypto/heimdal/lib/hx509/cert.c
1912
if (nc->val[i].permittedSubtrees) {
crypto/heimdal/lib/hx509/cert.c
1913
GeneralSubtrees_SET(&gs, nc->val[i].permittedSubtrees);
crypto/heimdal/lib/hx509/cert.c
1928
if (nc->val[i].excludedSubtrees) {
crypto/heimdal/lib/hx509/cert.c
1929
GeneralSubtrees_SET(&gs, nc->val[i].excludedSubtrees);
crypto/heimdal/lib/hx509/cert.c
1953
free_NameConstraints(&nc->val[i]);
crypto/heimdal/lib/hx509/cert.c
1954
free(nc->val);
crypto/heimdal/lib/hx509/cert.c
1992
path.val = NULL;
crypto/heimdal/lib/hx509/cert.c
2040
c = _hx509_get_cert(path.val[i]);
crypto/heimdal/lib/hx509/cert.c
2140
|| proxy_issuer.u.rdnSequence.val[j - 1].len > 1
crypto/heimdal/lib/hx509/cert.c
2141
|| der_heim_oid_cmp(&proxy_issuer.u.rdnSequence.val[j - 1].val[0].type,
crypto/heimdal/lib/hx509/cert.c
2152
free_RelativeDistinguishedName(&proxy_issuer.u.rdnSequence.val[j - 1]);
crypto/heimdal/lib/hx509/cert.c
2251
c = _hx509_get_cert(path.val[i]);
crypto/heimdal/lib/hx509/cert.c
2285
ret = hx509_certs_add(context, certs, path.val[i]);
crypto/heimdal/lib/hx509/cert.c
230
(*cert)->attrs.val = NULL;
crypto/heimdal/lib/hx509/cert.c
2304
path.val[i],
crypto/heimdal/lib/hx509/cert.c
2305
path.val[parent]);
crypto/heimdal/lib/hx509/cert.c
2324
c = _hx509_get_cert(path.val[i]);
crypto/heimdal/lib/hx509/cert.c
2330
signer = path.val[i];
crypto/heimdal/lib/hx509/cert.c
2341
signer = path.val[i + 1];
crypto/heimdal/lib/hx509/cert.c
2479
switch (san.val[j].element) {
crypto/heimdal/lib/hx509/cert.c
2485
if (der_printable_string_cmp(&san.val[j].u.dNSName, &hn) == 0) {
crypto/heimdal/lib/hx509/cert.c
2503
for (j = 0; ret == 0 && j < name->u.rdnSequence.val[i].len; j++) {
crypto/heimdal/lib/hx509/cert.c
2504
AttributeTypeAndValue *n = &name->u.rdnSequence.val[i].val[j];
crypto/heimdal/lib/hx509/cert.c
2556
d = realloc(cert->attrs.val,
crypto/heimdal/lib/hx509/cert.c
2557
sizeof(cert->attrs.val[0]) * (cert->attrs.len + 1));
crypto/heimdal/lib/hx509/cert.c
2562
cert->attrs.val = d;
crypto/heimdal/lib/hx509/cert.c
2571
cert->attrs.val[cert->attrs.len] = a;
crypto/heimdal/lib/hx509/cert.c
2595
if (der_heim_oid_cmp(oid, &cert->attrs.val[i]->oid) == 0)
crypto/heimdal/lib/hx509/cert.c
2596
return cert->attrs.val[i];
crypto/heimdal/lib/hx509/cert.c
2668
cert->friendlyname = malloc(n.val[0].length + 1);
crypto/heimdal/lib/hx509/cert.c
2674
for (i = 0; i < n.val[0].length; i++) {
crypto/heimdal/lib/hx509/cert.c
2675
if (n.val[0].data[i] <= 0xff)
crypto/heimdal/lib/hx509/cert.c
2676
cert->friendlyname[i] = n.val[0].data[i] & 0xff;
crypto/heimdal/lib/hx509/cert.c
3030
if (hx509_cert_cmp(q->path->val[i], cert) == 0)
crypto/heimdal/lib/hx509/cert.c
3280
if (der_heim_oid_cmp(eku, &e.val[i]) == 0) {
crypto/heimdal/lib/hx509/cert.c
3286
if (der_heim_oid_cmp(id_any_eku, &e.val[i]) == 0) {
crypto/heimdal/lib/hx509/cert.c
3478
ret = der_print_heim_oid(&eku.val[i], '.', &buf);
crypto/heimdal/lib/hx509/cert.c
350
der_free_octet_string(&cert->attrs.val[i]->data);
crypto/heimdal/lib/hx509/cert.c
351
der_free_oid(&cert->attrs.val[i]->oid);
crypto/heimdal/lib/hx509/cert.c
352
free(cert->attrs.val[i]);
crypto/heimdal/lib/hx509/cert.c
354
free(cert->attrs.val);
crypto/heimdal/lib/hx509/cert.c
595
if (der_heim_oid_cmp(&c->extensions->val[*idx].extnID, oid) == 0)
crypto/heimdal/lib/hx509/cert.c
596
return &c->extensions->val[(*idx)++];
crypto/heimdal/lib/hx509/cert.c
700
p = realloc(list->val, (list->len + 1) * sizeof(list->val[0]));
crypto/heimdal/lib/hx509/cert.c
703
list->val = p;
crypto/heimdal/lib/hx509/cert.c
704
ret = der_copy_octet_string(entry, &list->val[list->len]);
crypto/heimdal/lib/hx509/cert.c
725
der_free_octet_string(&list->val[i]);
crypto/heimdal/lib/hx509/cert.c
726
free(list->val);
crypto/heimdal/lib/hx509/cert.c
727
list->val = NULL;
crypto/heimdal/lib/hx509/cert.c
74
hx509_cert_attribute *val;
crypto/heimdal/lib/hx509/cert.c
758
list->val = NULL;
crypto/heimdal/lib/hx509/cert.c
774
if (sa.val[j].element == choice_GeneralName_otherName &&
crypto/heimdal/lib/hx509/cert.c
775
der_heim_oid_cmp(&sa.val[j].u.otherName.type_id, oid) == 0)
crypto/heimdal/lib/hx509/cert.c
777
ret = add_to_list(list, &sa.val[j].u.otherName.value);
crypto/heimdal/lib/hx509/cert.c
89
NameConstraints *val;
crypto/heimdal/lib/hx509/cert.c
94
(g)->len = (var)->len, (g)->val = (var)->val;
crypto/heimdal/lib/hx509/cert.c
970
if (ai.authorityCertIssuer->val[0].element != choice_GeneralName_directoryName)
crypto/heimdal/lib/hx509/cert.c
974
ai.authorityCertIssuer->val[0].u.directoryName.element;
crypto/heimdal/lib/hx509/cert.c
976
ai.authorityCertIssuer->val[0].u.directoryName.u.rdnSequence;
crypto/heimdal/lib/hx509/cms.c
1107
if ((*attr)[*len].value.val == NULL) {
crypto/heimdal/lib/hx509/cms.c
1112
(*attr)[*len].value.val[0].data = data->data;
crypto/heimdal/lib/hx509/cms.c
1113
(*attr)[*len].value.val[0].length = data->length;
crypto/heimdal/lib/hx509/cms.c
1228
ptr = realloc(sd->signerInfos.val,
crypto/heimdal/lib/hx509/cms.c
1229
(sd->signerInfos.len + 1) * sizeof(sd->signerInfos.val[0]));
crypto/heimdal/lib/hx509/cms.c
1234
sd->signerInfos.val = ptr;
crypto/heimdal/lib/hx509/cms.c
1236
signer_info = &sd->signerInfos.val[sd->signerInfos.len];
crypto/heimdal/lib/hx509/cms.c
1294
ret = add_one_attribute(&signer_info->signedAttrs->val,
crypto/heimdal/lib/hx509/cms.c
1316
ret = add_one_attribute(&signer_info->signedAttrs->val,
crypto/heimdal/lib/hx509/cms.c
1326
sa.val = signer_info->signedAttrs->val;
crypto/heimdal/lib/hx509/cms.c
1389
ret = hx509_certs_add(context, sigctx->certs, path.val[i]);
crypto/heimdal/lib/hx509/cms.c
1416
ptr = realloc(sigctx->sd.certificates->val,
crypto/heimdal/lib/hx509/cms.c
1417
(i + 1) * sizeof(sigctx->sd.certificates->val[0]));
crypto/heimdal/lib/hx509/cms.c
1420
sigctx->sd.certificates->val = ptr;
crypto/heimdal/lib/hx509/cms.c
1423
&sigctx->sd.certificates->val[i]);
crypto/heimdal/lib/hx509/cms.c
1537
&sigctx.sd.signerInfos.val[i].digestAlgorithm;
crypto/heimdal/lib/hx509/cms.c
1540
if (cmp_AlgorithmIdentifier(di, &sigctx.sd.digestAlgorithms.val[j]) == 0)
crypto/heimdal/lib/hx509/cms.c
414
ri = &ed.recipientInfos.val[i];
crypto/heimdal/lib/hx509/cms.c
57
#define ALLOC_SEQ(X, N) do { (X)->len = (N); ALLOC((X)->val, (N)); } while(0)
crypto/heimdal/lib/hx509/cms.c
643
if (ed.recipientInfos.val == NULL) {
crypto/heimdal/lib/hx509/cms.c
651
ri = &ed.recipientInfos.val[0];
crypto/heimdal/lib/hx509/cms.c
732
sd->certificates->val[i].data,
crypto/heimdal/lib/hx509/cms.c
733
sd->certificates->val[i].length,
crypto/heimdal/lib/hx509/cms.c
751
if (der_heim_oid_cmp(&attr->val[i].type, oid) == 0)
crypto/heimdal/lib/hx509/cms.c
752
return &attr->val[i];
crypto/heimdal/lib/hx509/cms.c
862
signer_info = &sd.signerInfos.val[i];
crypto/heimdal/lib/hx509/cms.c
899
sa.val = signer_info->signedAttrs->val;
crypto/heimdal/lib/hx509/cms.c
920
ret = decode_MessageDigest(attr->value.val[0].data,
crypto/heimdal/lib/hx509/cms.c
921
attr->value.val[0].length,
crypto/heimdal/lib/hx509/cms.c
958
ret = decode_ContentType(attr->value.val[0].data,
crypto/heimdal/lib/hx509/cms.c
959
attr->value.val[0].length,
crypto/heimdal/lib/hx509/collector.c
129
d = realloc(c->val.data, (c->val.len + 1) * sizeof(c->val.data[0]));
crypto/heimdal/lib/hx509/collector.c
135
c->val.data = d;
crypto/heimdal/lib/hx509/collector.c
163
c->val.data[c->val.len] = key;
crypto/heimdal/lib/hx509/collector.c
164
c->val.len++;
crypto/heimdal/lib/hx509/collector.c
271
for (i = 0; i < c->val.len; i++) {
crypto/heimdal/lib/hx509/collector.c
272
ret = match_localkeyid(context, c->val.data[i], certs);
crypto/heimdal/lib/hx509/collector.c
275
ret = match_keys(context, c->val.data[i], certs);
crypto/heimdal/lib/hx509/collector.c
294
for (i = 0, nkeys = 0; i < c->val.len; i++)
crypto/heimdal/lib/hx509/collector.c
295
if (c->val.data[i]->private_key)
crypto/heimdal/lib/hx509/collector.c
304
for (i = 0, nkeys = 0; i < c->val.len; i++) {
crypto/heimdal/lib/hx509/collector.c
305
if (c->val.data[i]->private_key) {
crypto/heimdal/lib/hx509/collector.c
306
(*keys)[nkeys++] = c->val.data[i]->private_key;
crypto/heimdal/lib/hx509/collector.c
307
c->val.data[i]->private_key = NULL;
crypto/heimdal/lib/hx509/collector.c
325
for (i = 0; i < c->val.len; i++)
crypto/heimdal/lib/hx509/collector.c
326
free_private_key(c->val.data[i]);
crypto/heimdal/lib/hx509/collector.c
327
if (c->val.data)
crypto/heimdal/lib/hx509/collector.c
328
free(c->val.data);
crypto/heimdal/lib/hx509/collector.c
49
} val;
crypto/heimdal/lib/hx509/collector.c
74
c->val.data = NULL;
crypto/heimdal/lib/hx509/collector.c
75
c->val.len = 0;
crypto/heimdal/lib/hx509/crypto.c
2943
password = pw->val[i];
crypto/heimdal/lib/hx509/crypto.c
3161
&peer->val[i].algorithm) != 0)
crypto/heimdal/lib/hx509/crypto.c
3168
ret = copy_AlgorithmIdentifier(&peer->val[i], selected);
crypto/heimdal/lib/hx509/crypto.c
3176
cipher = find_cipher_by_oid(&peer->val[i].algorithm);
crypto/heimdal/lib/hx509/crypto.c
3200
AlgorithmIdentifier **val,
crypto/heimdal/lib/hx509/crypto.c
3208
*val = NULL;
crypto/heimdal/lib/hx509/crypto.c
3236
ptr = realloc(*val, sizeof(**val) * (len + 1));
crypto/heimdal/lib/hx509/crypto.c
3239
*val = ptr;
crypto/heimdal/lib/hx509/crypto.c
3241
ret = copy_AlgorithmIdentifier(sig_algs[i]->sig_alg, &(*val)[len]);
crypto/heimdal/lib/hx509/crypto.c
3257
ptr = realloc(*val, sizeof(**val) * (len + 1));
crypto/heimdal/lib/hx509/crypto.c
3260
*val = ptr;
crypto/heimdal/lib/hx509/crypto.c
3262
ret = copy_AlgorithmIdentifier((ciphers[i].ai_func)(), &(*val)[len]);
crypto/heimdal/lib/hx509/crypto.c
3274
free_AlgorithmIdentifier(&(*val)[i]);
crypto/heimdal/lib/hx509/crypto.c
3275
free(*val);
crypto/heimdal/lib/hx509/crypto.c
3276
*val = NULL;
crypto/heimdal/lib/hx509/crypto.c
3282
hx509_crypto_free_algs(AlgorithmIdentifier *val,
crypto/heimdal/lib/hx509/crypto.c
3287
free_AlgorithmIdentifier(&val[i]);
crypto/heimdal/lib/hx509/crypto.c
3288
free(val);
crypto/heimdal/lib/hx509/hx509.h
108
heim_octet_string *val;
crypto/heimdal/lib/hx509/hx_locl.h
109
hx509_cert *val;
crypto/heimdal/lib/hx509/hx_locl.h
177
char **val;
crypto/heimdal/lib/hx509/hx_locl.h
93
AlgorithmIdentifier *val;
crypto/heimdal/lib/hx509/hxtool.c
121
AlgorithmIdentifier *val;
crypto/heimdal/lib/hx509/hxtool.c
128
val = calloc(s->num_strings, sizeof(*val));
crypto/heimdal/lib/hx509/hxtool.c
129
if (val == NULL)
crypto/heimdal/lib/hx509/hxtool.c
133
parse_oid(s->strings[i], NULL, &val[i].algorithm);
crypto/heimdal/lib/hx509/hxtool.c
135
ret = hx509_peer_info_set_cms_algs(contextp, *peer, val, s->num_strings);
crypto/heimdal/lib/hx509/hxtool.c
140
free_AlgorithmIdentifier(&val[i]);
crypto/heimdal/lib/hx509/hxtool.c
141
free(val);
crypto/heimdal/lib/hx509/hxtool.c
1451
AlgorithmIdentifier *val;
crypto/heimdal/lib/hx509/hxtool.c
1468
ret = hx509_crypto_available(context, type, NULL, &val, &len);
crypto/heimdal/lib/hx509/hxtool.c
1474
der_print_heim_oid (&val[i].algorithm, '.', &s);
crypto/heimdal/lib/hx509/hxtool.c
1479
hx509_crypto_free_algs(val, len);
crypto/heimdal/lib/hx509/keyset.c
83
struct hx509_keyset_ops **val;
crypto/heimdal/lib/hx509/keyset.c
88
val = realloc(context->ks_ops,
crypto/heimdal/lib/hx509/keyset.c
90
if (val == NULL)
crypto/heimdal/lib/hx509/keyset.c
92
val[context->ks_num_ops] = ops;
crypto/heimdal/lib/hx509/keyset.c
93
context->ks_ops = val;
crypto/heimdal/lib/hx509/ks_file.c
270
password = pw->val[i];
crypto/heimdal/lib/hx509/ks_mem.c
100
mem->certs.val = val;
crypto/heimdal/lib/hx509/ks_mem.c
101
mem->certs.val[mem->certs.len] = hx509_cert_ref(c);
crypto/heimdal/lib/hx509/ks_mem.c
139
*cert = hx509_cert_ref(mem->certs.val[*iter]);
crypto/heimdal/lib/hx509/ks_mem.c
46
hx509_cert *val;
crypto/heimdal/lib/hx509/ks_mem.c
78
hx509_cert_free(mem->certs.val[i]);
crypto/heimdal/lib/hx509/ks_mem.c
79
free(mem->certs.val);
crypto/heimdal/lib/hx509/ks_mem.c
93
hx509_cert *val;
crypto/heimdal/lib/hx509/ks_mem.c
95
val = realloc(mem->certs.val,
crypto/heimdal/lib/hx509/ks_mem.c
96
(mem->certs.len + 1) * sizeof(mem->certs.val[0]));
crypto/heimdal/lib/hx509/ks_mem.c
97
if (val == NULL)
crypto/heimdal/lib/hx509/ks_p12.c
205
&sc.val[i].bagId,
crypto/heimdal/lib/hx509/ks_p12.c
206
sc.val[i].bagValue.data,
crypto/heimdal/lib/hx509/ks_p12.c
207
sc.val[i].bagValue.length,
crypto/heimdal/lib/hx509/ks_p12.c
208
sc.val[i].bagAttributes);
crypto/heimdal/lib/hx509/ks_p12.c
422
&as.val[i].contentType,
crypto/heimdal/lib/hx509/ks_p12.c
423
as.val[i].content->data,
crypto/heimdal/lib/hx509/ks_p12.c
424
as.val[i].content->length,
crypto/heimdal/lib/hx509/ks_p12.c
457
ptr = realloc(as->val, sizeof(as->val[0]) * (as->len + 1));
crypto/heimdal/lib/hx509/ks_p12.c
462
as->val = ptr;
crypto/heimdal/lib/hx509/ks_p12.c
464
ret = der_copy_oid(oid, &as->val[as->len].contentType);
crypto/heimdal/lib/hx509/ks_p12.c
470
as->val[as->len].content = calloc(1, sizeof(*as->val[0].content));
crypto/heimdal/lib/hx509/ks_p12.c
471
if (as->val[as->len].content == NULL) {
crypto/heimdal/lib/hx509/ks_p12.c
472
der_free_oid(&as->val[as->len].contentType);
crypto/heimdal/lib/hx509/ks_p12.c
477
as->val[as->len].content->data = data;
crypto/heimdal/lib/hx509/ks_p12.c
478
as->val[as->len].content->length = length;
crypto/heimdal/lib/hx509/ks_p12.c
63
if (der_heim_oid_cmp(oid, &attrs->val[i].attrId) == 0)
crypto/heimdal/lib/hx509/ks_p12.c
64
return &attrs->val[i];
crypto/heimdal/lib/hx509/lock.c
102
lock->password.val = d;
crypto/heimdal/lib/hx509/lock.c
103
lock->password.val[lock->password.len] = s;
crypto/heimdal/lib/hx509/lock.c
126
free(lock->password.val[i]);
crypto/heimdal/lib/hx509/lock.c
127
free(lock->password.val);
crypto/heimdal/lib/hx509/lock.c
128
lock->password.val = NULL;
crypto/heimdal/lib/hx509/lock.c
96
d = realloc(lock->password.val,
crypto/heimdal/lib/hx509/lock.c
97
(lock->password.len + 1) * sizeof(lock->password.val[0]));
crypto/heimdal/lib/hx509/name.c
215
for (j = 0; j < n->u.rdnSequence.val[i].len; j++) {
crypto/heimdal/lib/hx509/name.c
216
DirectoryString *ds = &n->u.rdnSequence.val[i].val[j].value;
crypto/heimdal/lib/hx509/name.c
220
oidname = oidtostring(&n->u.rdnSequence.val[i].val[j].type);
crypto/heimdal/lib/hx509/name.c
294
if (j + 1 < n->u.rdnSequence.val[i].len)
crypto/heimdal/lib/hx509/name.c
452
*c = n1->u.rdnSequence.val[i].len - n2->u.rdnSequence.val[i].len;
crypto/heimdal/lib/hx509/name.c
456
for (j = 0; j < n1->u.rdnSequence.val[i].len; j++) {
crypto/heimdal/lib/hx509/name.c
457
*c = der_heim_oid_cmp(&n1->u.rdnSequence.val[i].val[j].type,
crypto/heimdal/lib/hx509/name.c
458
&n1->u.rdnSequence.val[i].val[j].type);
crypto/heimdal/lib/hx509/name.c
462
ret = _hx509_name_ds_cmp(&n1->u.rdnSequence.val[i].val[j].value,
crypto/heimdal/lib/hx509/name.c
463
&n2->u.rdnSequence.val[i].val[j].value,
crypto/heimdal/lib/hx509/name.c
524
ptr = realloc(name->u.rdnSequence.val,
crypto/heimdal/lib/hx509/name.c
525
sizeof(name->u.rdnSequence.val[0]) *
crypto/heimdal/lib/hx509/name.c
531
name->u.rdnSequence.val = ptr;
crypto/heimdal/lib/hx509/name.c
534
rdn = &name->u.rdnSequence.val[name->u.rdnSequence.len];
crypto/heimdal/lib/hx509/name.c
536
memmove(&name->u.rdnSequence.val[1],
crypto/heimdal/lib/hx509/name.c
537
&name->u.rdnSequence.val[0],
crypto/heimdal/lib/hx509/name.c
539
sizeof(name->u.rdnSequence.val[0]));
crypto/heimdal/lib/hx509/name.c
541
rdn = &name->u.rdnSequence.val[0];
crypto/heimdal/lib/hx509/name.c
543
rdn->val = malloc(sizeof(rdn->val[0]));
crypto/heimdal/lib/hx509/name.c
544
if (rdn->val == NULL)
crypto/heimdal/lib/hx509/name.c
547
ret = der_copy_oid(oid, &rdn->val[0].type);
crypto/heimdal/lib/hx509/name.c
550
rdn->val[0].value.element = choice_DirectoryString_utf8String;
crypto/heimdal/lib/hx509/name.c
551
rdn->val[0].value.u.utf8String = strdup(str);
crypto/heimdal/lib/hx509/name.c
552
if (rdn->val[0].value.u.utf8String == NULL)
crypto/heimdal/lib/hx509/name.c
745
for (j = 0; j < n->u.rdnSequence.val[i].len; j++) {
crypto/heimdal/lib/hx509/name.c
756
DirectoryString *ds = &n->u.rdnSequence.val[i].val[j].value;
crypto/heimdal/lib/hx509/peer.c
139
const AlgorithmIdentifier *val)
crypto/heimdal/lib/hx509/peer.c
144
ptr = realloc(peer->val, sizeof(peer->val[0]) * (peer->len + 1));
crypto/heimdal/lib/hx509/peer.c
149
peer->val = ptr;
crypto/heimdal/lib/hx509/peer.c
150
ret = copy_AlgorithmIdentifier(val, &peer->val[peer->len]);
crypto/heimdal/lib/hx509/peer.c
174
const AlgorithmIdentifier *val,
crypto/heimdal/lib/hx509/peer.c
181
peer->val = calloc(len, sizeof(*peer->val));
crypto/heimdal/lib/hx509/peer.c
182
if (peer->val == NULL) {
crypto/heimdal/lib/hx509/peer.c
190
ret = copy_AlgorithmIdentifier(&val[i], &peer->val[i]);
crypto/heimdal/lib/hx509/peer.c
73
if (peer->val) {
crypto/heimdal/lib/hx509/peer.c
76
free_AlgorithmIdentifier(&peer->val[i]);
crypto/heimdal/lib/hx509/peer.c
77
free(peer->val);
crypto/heimdal/lib/hx509/peer.c
78
peer->val = NULL;
crypto/heimdal/lib/hx509/print.c
398
ret = der_print_heim_oid (&eku.val[i], '.', &str);
crypto/heimdal/lib/hx509/print.c
439
kn.principalName.name_string.val[i]);
crypto/heimdal/lib/hx509/print.c
500
if (dp.val[i].distributionPoint) {
crypto/heimdal/lib/hx509/print.c
502
heim_any *data = dp.val[i].distributionPoint;
crypto/heimdal/lib/hx509/print.c
519
GeneralName *name = &dpname.u.fullName.val[j];
crypto/heimdal/lib/hx509/print.c
594
switch (gn.val[i].element) {
crypto/heimdal/lib/hx509/print.c
603
&gn.val[i].u.otherName.type_id) != 0)
crypto/heimdal/lib/hx509/print.c
608
(*altname_types[j].func)(ctx, &gn.val[i].u.otherName.value);
crypto/heimdal/lib/hx509/print.c
612
hx509_oid_print(&gn.val[i].u.otherName.type_id,
crypto/heimdal/lib/hx509/print.c
621
ret = hx509_general_name_unparse(&gn.val[i], &s);
crypto/heimdal/lib/hx509/print.c
739
hx509_oid_print(&aia.val[i].accessMethod, validate_vprint, ctx);
crypto/heimdal/lib/hx509/print.c
740
hx509_general_name_unparse(&aia.val[i].accessLocation, &str);
crypto/heimdal/lib/hx509/print.c
955
&t->extensions->val[i].extnID) == 0)
crypto/heimdal/lib/hx509/print.c
959
if (t->extensions->val[i].critical)
crypto/heimdal/lib/hx509/print.c
962
if (t->extensions->val[i].critical)
crypto/heimdal/lib/hx509/print.c
965
hx509_oid_print(&t->extensions->val[i].extnID,
crypto/heimdal/lib/hx509/print.c
977
&t->extensions->val[i]);
crypto/heimdal/lib/hx509/req.c
120
void *val;
crypto/heimdal/lib/hx509/req.c
123
val = realloc(req->eku.val, sizeof(req->eku.val[0]) * (req->eku.len + 1));
crypto/heimdal/lib/hx509/req.c
124
if (val == NULL)
crypto/heimdal/lib/hx509/req.c
126
req->eku.val = val;
crypto/heimdal/lib/hx509/req.c
128
ret = der_copy_oid(oid, &req->eku.val[req->eku.len]);
crypto/heimdal/lib/hx509/revoke.c
1006
es->val = calloc(es->len, sizeof(es->val[0]));
crypto/heimdal/lib/hx509/revoke.c
1007
if (es->val == NULL) {
crypto/heimdal/lib/hx509/revoke.c
1012
ret = der_copy_oid(&asn1_oid_id_pkix_ocsp_nonce, &es->val[0].extnID);
crypto/heimdal/lib/hx509/revoke.c
1018
es->val[0].extnValue.data = malloc(10);
crypto/heimdal/lib/hx509/revoke.c
1019
if (es->val[0].extnValue.data == NULL) {
crypto/heimdal/lib/hx509/revoke.c
1023
es->val[0].extnValue.length = 10;
crypto/heimdal/lib/hx509/revoke.c
1025
ret = RAND_bytes(es->val[0].extnValue.data,
crypto/heimdal/lib/hx509/revoke.c
1026
es->val[0].extnValue.length);
crypto/heimdal/lib/hx509/revoke.c
103
(*ctx)->crls.val = NULL;
crypto/heimdal/lib/hx509/revoke.c
1031
ret = der_copy_octet_string(nonce, &es->val[0].extnValue);
crypto/heimdal/lib/hx509/revoke.c
105
(*ctx)->ocsps.val = NULL;
crypto/heimdal/lib/hx509/revoke.c
1135
switch (ocsp.ocsp.tbsResponseData.responses.val[i].certStatus.element) {
crypto/heimdal/lib/hx509/revoke.c
1152
printable_time(ocsp.ocsp.tbsResponseData.responses.val[i].thisUpdate));
crypto/heimdal/lib/hx509/revoke.c
1153
if (ocsp.ocsp.tbsResponseData.responses.val[i].nextUpdate)
crypto/heimdal/lib/hx509/revoke.c
1155
printable_time(ocsp.ocsp.tbsResponseData.responses.val[i].thisUpdate));
crypto/heimdal/lib/hx509/revoke.c
1213
ret = der_heim_integer_cmp(&basic.tbsResponseData.responses.val[i].certID.serialNumber,
crypto/heimdal/lib/hx509/revoke.c
1221
&basic.tbsResponseData.responses.val[i].certID.hashAlgorithm,
crypto/heimdal/lib/hx509/revoke.c
1223
&basic.tbsResponseData.responses.val[i].certID.issuerNameHash);
crypto/heimdal/lib/hx509/revoke.c
1227
switch (basic.tbsResponseData.responses.val[i].certStatus.element) {
crypto/heimdal/lib/hx509/revoke.c
1236
if (basic.tbsResponseData.responses.val[i].thisUpdate >
crypto/heimdal/lib/hx509/revoke.c
1241
if (basic.tbsResponseData.responses.val[i].nextUpdate) {
crypto/heimdal/lib/hx509/revoke.c
1242
if (*basic.tbsResponseData.responses.val[i].nextUpdate < now)
crypto/heimdal/lib/hx509/revoke.c
1244
*expiration = *basic.tbsResponseData.responses.val[i].nextUpdate;
crypto/heimdal/lib/hx509/revoke.c
1385
ptr = realloc(c->revokedCertificates->val,
crypto/heimdal/lib/hx509/revoke.c
1386
(num + 1) * sizeof(c->revokedCertificates->val[0]));
crypto/heimdal/lib/hx509/revoke.c
1391
c->revokedCertificates->val = ptr;
crypto/heimdal/lib/hx509/revoke.c
1394
&c->revokedCertificates->val[num].userCertificate);
crypto/heimdal/lib/hx509/revoke.c
1399
c->revokedCertificates->val[num].revocationDate.element =
crypto/heimdal/lib/hx509/revoke.c
1401
c->revokedCertificates->val[num].revocationDate.u.generalTime =
crypto/heimdal/lib/hx509/revoke.c
1403
c->revokedCertificates->val[num].crlEntryExtensions = NULL;
crypto/heimdal/lib/hx509/revoke.c
154
free((*ctx)->crls.val[i].path);
crypto/heimdal/lib/hx509/revoke.c
155
free_CRLCertificateList(&(*ctx)->crls.val[i].crl);
crypto/heimdal/lib/hx509/revoke.c
159
free_ocsp(&(*ctx)->ocsps.val[i]);
crypto/heimdal/lib/hx509/revoke.c
160
free((*ctx)->ocsps.val);
crypto/heimdal/lib/hx509/revoke.c
162
free((*ctx)->crls.val);
crypto/heimdal/lib/hx509/revoke.c
364
ret = hx509_cert_init(context, &basic.certs->val[i], &c);
crypto/heimdal/lib/hx509/revoke.c
418
if (strcmp(ctx->ocsps.val[0].path, path) == 0)
crypto/heimdal/lib/hx509/revoke.c
422
data = realloc(ctx->ocsps.val,
crypto/heimdal/lib/hx509/revoke.c
423
(ctx->ocsps.len + 1) * sizeof(ctx->ocsps.val[0]));
crypto/heimdal/lib/hx509/revoke.c
429
ctx->ocsps.val = data;
crypto/heimdal/lib/hx509/revoke.c
431
memset(&ctx->ocsps.val[ctx->ocsps.len], 0,
crypto/heimdal/lib/hx509/revoke.c
432
sizeof(ctx->ocsps.val[0]));
crypto/heimdal/lib/hx509/revoke.c
434
ctx->ocsps.val[ctx->ocsps.len].path = strdup(path);
crypto/heimdal/lib/hx509/revoke.c
435
if (ctx->ocsps.val[ctx->ocsps.len].path == NULL) {
crypto/heimdal/lib/hx509/revoke.c
440
ret = load_ocsp(context, &ctx->ocsps.val[ctx->ocsps.len]);
crypto/heimdal/lib/hx509/revoke.c
442
free(ctx->ocsps.val[ctx->ocsps.len].path);
crypto/heimdal/lib/hx509/revoke.c
627
if (strcmp(ctx->crls.val[0].path, path) == 0)
crypto/heimdal/lib/hx509/revoke.c
631
data = realloc(ctx->crls.val,
crypto/heimdal/lib/hx509/revoke.c
632
(ctx->crls.len + 1) * sizeof(ctx->crls.val[0]));
crypto/heimdal/lib/hx509/revoke.c
637
ctx->crls.val = data;
crypto/heimdal/lib/hx509/revoke.c
639
memset(&ctx->crls.val[ctx->crls.len], 0, sizeof(ctx->crls.val[0]));
crypto/heimdal/lib/hx509/revoke.c
641
ctx->crls.val[ctx->crls.len].path = strdup(path);
crypto/heimdal/lib/hx509/revoke.c
642
if (ctx->crls.val[ctx->crls.len].path == NULL) {
crypto/heimdal/lib/hx509/revoke.c
648
&ctx->crls.val[ctx->crls.len].last_modfied,
crypto/heimdal/lib/hx509/revoke.c
649
&ctx->crls.val[ctx->crls.len].crl);
crypto/heimdal/lib/hx509/revoke.c
651
free(ctx->crls.val[ctx->crls.len].path);
crypto/heimdal/lib/hx509/revoke.c
694
struct revoke_ocsp *ocsp = &ctx->ocsps.val[i];
crypto/heimdal/lib/hx509/revoke.c
717
ret = der_heim_integer_cmp(&ocsp->ocsp.tbsResponseData.responses.val[j].certID.serialNumber,
crypto/heimdal/lib/hx509/revoke.c
725
&ocsp->ocsp.tbsResponseData.responses.val[i].certID.hashAlgorithm,
crypto/heimdal/lib/hx509/revoke.c
727
&ocsp->ocsp.tbsResponseData.responses.val[i].certID.issuerNameHash);
crypto/heimdal/lib/hx509/revoke.c
736
&ocsp->ocsp.tbsResponseData.responses.val[j].certID.hashAlgorithm,
crypto/heimdal/lib/hx509/revoke.c
738
&ocsp->ocsp.tbsResponseData.responses.val[j].certID.issuerKeyHash);
crypto/heimdal/lib/hx509/revoke.c
74
struct revoke_crl *val;
crypto/heimdal/lib/hx509/revoke.c
742
switch (ocsp->ocsp.tbsResponseData.responses.val[j].certStatus.element) {
crypto/heimdal/lib/hx509/revoke.c
755
if (ocsp->ocsp.tbsResponseData.responses.val[j].thisUpdate >
crypto/heimdal/lib/hx509/revoke.c
760
if (ocsp->ocsp.tbsResponseData.responses.val[j].nextUpdate) {
crypto/heimdal/lib/hx509/revoke.c
761
if (*ocsp->ocsp.tbsResponseData.responses.val[j].nextUpdate < now)
crypto/heimdal/lib/hx509/revoke.c
770
struct revoke_crl *crl = &ctx->crls.val[i];
crypto/heimdal/lib/hx509/revoke.c
78
struct revoke_ocsp *val;
crypto/heimdal/lib/hx509/revoke.c
807
if (crl->crl.tbsCertList.crlExtensions->val[j].critical) {
crypto/heimdal/lib/hx509/revoke.c
823
ret = der_heim_integer_cmp(&crl->crl.tbsCertList.revokedCertificates->val[j].userCertificate,
crypto/heimdal/lib/hx509/revoke.c
828
t = _hx509_Time2time_t(&crl->crl.tbsCertList.revokedCertificates->val[j].revocationDate);
crypto/heimdal/lib/hx509/revoke.c
832
if (crl->crl.tbsCertList.revokedCertificates->val[j].crlEntryExtensions)
crypto/heimdal/lib/hx509/revoke.c
833
for (k = 0; k < crl->crl.tbsCertList.revokedCertificates->val[j].crlEntryExtensions->len; k++)
crypto/heimdal/lib/hx509/revoke.c
834
if (crl->crl.tbsCertList.revokedCertificates->val[j].crlEntryExtensions->val[k].critical)
crypto/heimdal/lib/hx509/revoke.c
875
d = realloc(ctx->req->requestList.val,
crypto/heimdal/lib/hx509/revoke.c
876
sizeof(ctx->req->requestList.val[0]) *
crypto/heimdal/lib/hx509/revoke.c
880
ctx->req->requestList.val = d;
crypto/heimdal/lib/hx509/revoke.c
882
one = &ctx->req->requestList.val[ctx->req->requestList.len];
crypto/heimdal/lib/kadm5/chpass_s.c
73
keys = ent.entry.keys.val;
crypto/heimdal/lib/kadm5/chpass_s.c
76
ent.entry.keys.val = NULL;
crypto/heimdal/lib/kadm5/chpass_s.c
85
existsp = _kadm5_exists_keys (ent.entry.keys.val,
crypto/heimdal/lib/kadm5/create_s.c
170
ent.entry.keys.val = NULL;
crypto/heimdal/lib/kadm5/get_s.c
148
if(ent.entry.keys.val[n].mkvno) {
crypto/heimdal/lib/kadm5/get_s.c
149
out->mkvno = *ent.entry.keys.val[n].mkvno; /* XXX this isn't right */
crypto/heimdal/lib/kadm5/get_s.c
184
key = &ent.entry.keys.val[i];
crypto/heimdal/lib/kadm5/log.c
702
free_Key(&ent.entry.keys.val[i]);
crypto/heimdal/lib/kadm5/log.c
703
free (ent.entry.keys.val);
crypto/heimdal/lib/kadm5/log.c
708
ent.entry.keys.val = malloc(len * sizeof(*ent.entry.keys.val));
crypto/heimdal/lib/kadm5/log.c
709
if (ent.entry.keys.val == NULL) {
crypto/heimdal/lib/kadm5/log.c
714
ret = copy_Key(&log_ent.entry.keys.val[i],
crypto/heimdal/lib/kadm5/log.c
715
&ent.entry.keys.val[i]);
crypto/heimdal/lib/kadm5/rename_s.c
75
if(ent.entry.keys.val[i].salt == NULL){
crypto/heimdal/lib/kadm5/rename_s.c
76
ent.entry.keys.val[i].salt =
crypto/heimdal/lib/kadm5/rename_s.c
77
malloc(sizeof(*ent.entry.keys.val[i].salt));
crypto/heimdal/lib/kadm5/rename_s.c
78
if(ent.entry.keys.val[i].salt == NULL)
crypto/heimdal/lib/kadm5/rename_s.c
80
ret = copy_Salt(&salt, ent.entry.keys.val[i].salt);
crypto/heimdal/lib/kadm5/sample_passwd_check.c
78
strings[0] = principal->name.name_string.val[0]; /* XXX */
crypto/heimdal/lib/kadm5/set_keys.c
121
_kadm5_free_keys (context->context, ent->keys.len, ent->keys.val);
crypto/heimdal/lib/kadm5/set_keys.c
123
ent->keys.val = keys;
crypto/heimdal/lib/kadm5/set_keys.c
165
_kadm5_free_keys (context->context, ent->keys.len, ent->keys.val);
crypto/heimdal/lib/kadm5/set_keys.c
167
ent->keys.val = keys;
crypto/heimdal/lib/kadm5/set_keys.c
263
_kadm5_free_keys (context->context, ent->keys.len, ent->keys.val);
crypto/heimdal/lib/kadm5/set_keys.c
264
ent->keys.val = keys;
crypto/heimdal/lib/kadm5/set_keys.c
57
_kadm5_free_keys (context->context, ent->keys.len, ent->keys.val);
crypto/heimdal/lib/kadm5/set_keys.c
58
ent->keys.val = keys;
crypto/heimdal/lib/kafs/afskrb5.c
117
char *c, *val;
crypto/heimdal/lib/kafs/afskrb5.c
125
"afs-use-524", "2b", &val);
crypto/heimdal/lib/kafs/afskrb5.c
128
if (strcasecmp(val, "local") == 0 ||
crypto/heimdal/lib/kafs/afskrb5.c
129
strcasecmp(val, "2b") == 0)
crypto/heimdal/lib/kafs/afskrb5.c
134
free(val);
crypto/heimdal/lib/kafs/afssys.c
152
long val = strtol (begptr, &endptr, 0);
crypto/heimdal/lib/kafs/afssys.c
154
if (val != 0 && endptr != begptr) {
crypto/heimdal/lib/kafs/afssys.c
156
*res = val;
crypto/heimdal/lib/krb5/acache.c
230
cred->authdata.val = NULL;
crypto/heimdal/lib/krb5/acache.c
233
cred->addresses.val = NULL;
crypto/heimdal/lib/krb5/acache.c
240
cred->authdata.val = calloc(i, sizeof(cred->authdata.val[0]));
crypto/heimdal/lib/krb5/acache.c
241
if (cred->authdata.val == NULL)
crypto/heimdal/lib/krb5/acache.c
245
cred->authdata.val[i].ad_type = incred->authdata[i]->type;
crypto/heimdal/lib/krb5/acache.c
246
ret = krb5_data_copy(&cred->authdata.val[i].ad_data,
crypto/heimdal/lib/krb5/acache.c
258
cred->addresses.val = calloc(i, sizeof(cred->addresses.val[0]));
crypto/heimdal/lib/krb5/acache.c
259
if (cred->addresses.val == NULL)
crypto/heimdal/lib/krb5/acache.c
264
cred->addresses.val[i].addr_type = incred->addresses[i]->type;
crypto/heimdal/lib/krb5/acache.c
265
ret = krb5_data_copy(&cred->addresses.val[i].address,
crypto/heimdal/lib/krb5/acache.c
385
addr->type = incred->addresses.val[i].addr_type;
crypto/heimdal/lib/krb5/acache.c
386
addr->length = incred->addresses.val[i].address.length;
crypto/heimdal/lib/krb5/acache.c
393
memcpy(addr->data, incred->addresses.val[i].address.data,
crypto/heimdal/lib/krb5/addr_families.c
1167
addresses->val = NULL;
crypto/heimdal/lib/krb5/addr_families.c
1174
if (addresses->val == NULL) {
crypto/heimdal/lib/krb5/addr_families.c
1179
addresses->val[0] = addr;
crypto/heimdal/lib/krb5/addr_families.c
1200
if (addresses->val == NULL) {
crypto/heimdal/lib/krb5/addr_families.c
1209
if (krb5_sockaddr2address (context, ai->ai_addr, &addresses->val[i]))
crypto/heimdal/lib/krb5/addr_families.c
1211
if(krb5_address_search(context, &addresses->val[i], addresses)) {
crypto/heimdal/lib/krb5/addr_families.c
1212
krb5_free_address(context, &addresses->val[i]);
crypto/heimdal/lib/krb5/addr_families.c
1315
if (krb5_address_compare (context, addr, &addrlist->val[i]))
crypto/heimdal/lib/krb5/addr_families.c
1362
krb5_free_address(context, &addresses->val[i]);
crypto/heimdal/lib/krb5/addr_families.c
1363
free(addresses->val);
crypto/heimdal/lib/krb5/addr_families.c
1365
addresses->val = NULL;
crypto/heimdal/lib/krb5/addr_families.c
1413
if(inaddr->len > 0 && outaddr->val == NULL)
crypto/heimdal/lib/krb5/addr_families.c
1416
krb5_copy_address(context, &inaddr->val[i], &outaddr->val[i]);
crypto/heimdal/lib/krb5/addr_families.c
1442
tmp = realloc(dest->val, (dest->len + source->len) * sizeof(*tmp));
crypto/heimdal/lib/krb5/addr_families.c
1448
dest->val = tmp;
crypto/heimdal/lib/krb5/addr_families.c
1451
if(krb5_address_search(context, &source->val[i], dest))
crypto/heimdal/lib/krb5/addr_families.c
1454
&source->val[i],
crypto/heimdal/lib/krb5/addr_families.c
1455
&dest->val[dest->len]);
crypto/heimdal/lib/krb5/addr_families.c
503
ret = krb5_address_prefixlen_boundary(context, &addrmask.val[0], num,
crypto/heimdal/lib/krb5/addr_families.c
528
if(high.len != 1 || high.val[0].addr_type != low.val[0].addr_type) {
crypto/heimdal/lib/krb5/addr_families.c
534
ret = krb5_copy_address(context, &high.val[0], &high0);
crypto/heimdal/lib/krb5/addr_families.c
536
ret = krb5_copy_address(context, &low.val[0], &low0);
crypto/heimdal/lib/krb5/aes-test.c
203
int i, val = 0;
crypto/heimdal/lib/krb5/aes-test.c
235
val = 1;
crypto/heimdal/lib/krb5/aes-test.c
257
val = 1;
crypto/heimdal/lib/krb5/aes-test.c
265
val = 1;
crypto/heimdal/lib/krb5/aes-test.c
271
val = 1;
crypto/heimdal/lib/krb5/aes-test.c
282
return val;
crypto/heimdal/lib/krb5/aes-test.c
858
int val = 0;
crypto/heimdal/lib/krb5/aes-test.c
864
val |= string_to_key_test(context);
crypto/heimdal/lib/krb5/aes-test.c
866
val |= krb_enc_test(context);
crypto/heimdal/lib/krb5/aes-test.c
867
val |= random_to_key(context);
crypto/heimdal/lib/krb5/aes-test.c
868
val |= iov_test(context);
crypto/heimdal/lib/krb5/aes-test.c
870
if (verbose && val == 0)
crypto/heimdal/lib/krb5/aes-test.c
872
if (val)
crypto/heimdal/lib/krb5/aes-test.c
877
return val;
crypto/heimdal/lib/krb5/aname_to_localname.c
64
res = aname->name.name_string.val[0];
crypto/heimdal/lib/krb5/aname_to_localname.c
66
&& strcmp (aname->name.name_string.val[1], "root") == 0) {
crypto/heimdal/lib/krb5/appdefault.c
128
char *val;
crypto/heimdal/lib/krb5/appdefault.c
130
krb5_appdefault_string(context, appname, realm, option, NULL, &val);
crypto/heimdal/lib/krb5/appdefault.c
131
if (val == NULL) {
crypto/heimdal/lib/krb5/appdefault.c
135
if (krb5_string_to_deltat(val, &t))
crypto/heimdal/lib/krb5/appdefault.c
139
free(val);
crypto/heimdal/lib/krb5/build_auth.c
48
&etypes.len, &etypes.val,
crypto/heimdal/lib/krb5/build_auth.c
63
if (ad.val == NULL) {
crypto/heimdal/lib/krb5/build_auth.c
69
ad.val[0].ad_type = KRB5_AUTHDATA_GSS_API_ETYPE_NEGOTIATION;
crypto/heimdal/lib/krb5/build_auth.c
70
ad.val[0].ad_data.length = len;
crypto/heimdal/lib/krb5/build_auth.c
71
ad.val[0].ad_data.data = buf;
crypto/heimdal/lib/krb5/build_auth.c
90
if ((*auth_data)->val == NULL) {
crypto/heimdal/lib/krb5/build_auth.c
97
(*auth_data)->val[0].ad_type = KRB5_AUTHDATA_IF_RELEVANT;
crypto/heimdal/lib/krb5/build_auth.c
98
(*auth_data)->val[0].ad_data.length = len;
crypto/heimdal/lib/krb5/build_auth.c
99
(*auth_data)->val[0].ad_data.data = buf;
crypto/heimdal/lib/krb5/cache.c
1271
strcmp(principal->name.name_string.val[0], KRB5_CONF_NAME) != 0)
crypto/heimdal/lib/krb5/context.c
1437
krb5_enctype **val,
crypto/heimdal/lib/krb5/context.c
1443
ret = krb5_get_default_in_tkt_etypes(context, pdu_type, val);
crypto/heimdal/lib/krb5/context.c
1445
ret = copy_enctypes(context, etypes, val);
crypto/heimdal/lib/krb5/context.c
1451
while ((*val)[*len] != KRB5_ENCTYPE_NULL)
crypto/heimdal/lib/krb5/creds.c
255
match = (mcreds->authdata.val[i].ad_type ==
crypto/heimdal/lib/krb5/creds.c
256
creds->authdata.val[i].ad_type) &&
crypto/heimdal/lib/krb5/creds.c
257
(krb5_data_cmp(&mcreds->authdata.val[i].ad_data,
crypto/heimdal/lib/krb5/creds.c
258
&creds->authdata.val[i].ad_data) == 0);
crypto/heimdal/lib/krb5/crypto.c
2599
krb5_enctype **val)
crypto/heimdal/lib/krb5/crypto.c
2631
*val = ret;
crypto/heimdal/lib/krb5/deprecated.c
69
krb5_enctype **val)
crypto/heimdal/lib/krb5/deprecated.c
76
return krb5_keytype_to_enctypes (context, keytype, len, val);
crypto/heimdal/lib/krb5/deprecated.c
88
*val = ret;
crypto/heimdal/lib/krb5/derived-key-test.c
114
val = 1;
crypto/heimdal/lib/krb5/derived-key-test.c
120
return val;
crypto/heimdal/lib/krb5/derived-key-test.c
84
int val = 0;
crypto/heimdal/lib/krb5/get_addrs.c
131
res->val = calloc(num, sizeof(*res->val));
crypto/heimdal/lib/krb5/get_addrs.c
132
if (res->val == NULL) {
crypto/heimdal/lib/krb5/get_addrs.c
153
ret = krb5_sockaddr2address(context, ifa->ifa_addr, &res->val[idx]);
crypto/heimdal/lib/krb5/get_addrs.c
165
krb5_address_search(context, &res->val[idx], &ignore_addresses)) {
crypto/heimdal/lib/krb5/get_addrs.c
166
krb5_free_address(context, &res->val[idx]);
crypto/heimdal/lib/krb5/get_addrs.c
196
ifa->ifa_addr, &res->val[idx]);
crypto/heimdal/lib/krb5/get_addrs.c
200
krb5_address_search(context, &res->val[idx],
crypto/heimdal/lib/krb5/get_addrs.c
202
krb5_free_address(context, &res->val[idx]);
crypto/heimdal/lib/krb5/get_addrs.c
213
free(res->val);
crypto/heimdal/lib/krb5/get_addrs.c
214
res->val = NULL;
crypto/heimdal/lib/krb5/get_addrs.c
226
res->val = NULL;
crypto/heimdal/lib/krb5/get_addrs.c
252
free(res->val);
crypto/heimdal/lib/krb5/get_addrs.c
253
res->val = NULL;
crypto/heimdal/lib/krb5/get_addrs.c
66
res->val = malloc (sizeof(*res->val));
crypto/heimdal/lib/krb5/get_addrs.c
67
if (res->val == NULL) {
crypto/heimdal/lib/krb5/get_addrs.c
71
res->val[0].addr_type = hostent->h_addrtype;
crypto/heimdal/lib/krb5/get_addrs.c
72
res->val[0].address.data = NULL;
crypto/heimdal/lib/krb5/get_addrs.c
73
res->val[0].address.length = 0;
crypto/heimdal/lib/krb5/get_addrs.c
74
ret = krb5_data_copy (&res->val[0].address,
crypto/heimdal/lib/krb5/get_addrs.c
78
free (res->val);
crypto/heimdal/lib/krb5/get_cred.c
1016
referral_realm = ticket.server->name.name_string.val[1];
crypto/heimdal/lib/krb5/get_cred.c
161
if(t->req_body.etype.val == NULL) {
crypto/heimdal/lib/krb5/get_cred.c
167
t->req_body.etype.val[0] = in_creds->session.keytype;
crypto/heimdal/lib/krb5/get_cred.c
172
&t->req_body.etype.val,
crypto/heimdal/lib/krb5/get_cred.c
216
if (t->req_body.additional_tickets->val == NULL) {
crypto/heimdal/lib/krb5/get_cred.c
222
ret = copy_Ticket(second_ticket, t->req_body.additional_tickets->val);
crypto/heimdal/lib/krb5/get_cred.c
233
if (t->padata->val == NULL) {
crypto/heimdal/lib/krb5/get_cred.c
241
ret = copy_PA_DATA(&padata->val[i], &t->padata->val[i + 1]);
crypto/heimdal/lib/krb5/get_cred.c
266
&t->padata->val[0],
crypto/heimdal/lib/krb5/get_cred.c
420
padata.val = NULL;
crypto/heimdal/lib/krb5/get_cred.c
522
krbtgt->server->name.name_string.val[1],
crypto/heimdal/lib/krb5/get_cred.c
830
tgt_inst = tgt->server->name.name_string.val[1];
crypto/heimdal/lib/krb5/get_for_creds.c
211
addrs.val = NULL;
crypto/heimdal/lib/krb5/get_for_creds.c
268
if (cred.tickets.val == NULL) {
crypto/heimdal/lib/krb5/get_for_creds.c
275
cred.tickets.val, &len);
crypto/heimdal/lib/krb5/get_for_creds.c
281
if (enc_krb_cred_part.ticket_info.val == NULL) {
crypto/heimdal/lib/krb5/get_for_creds.c
363
krb_cred_info = enc_krb_cred_part.ticket_info.val;
crypto/heimdal/lib/krb5/get_for_creds.c
50
tmp = realloc(addr->val, (addr->len + n) * sizeof(*addr->val));
crypto/heimdal/lib/krb5/get_for_creds.c
56
addr->val = tmp;
crypto/heimdal/lib/krb5/get_for_creds.c
58
addr->val[i].addr_type = 0;
crypto/heimdal/lib/krb5/get_for_creds.c
59
krb5_data_zero(&addr->val[i].address);
crypto/heimdal/lib/krb5/get_for_creds.c
70
addr->val[i++] = ad;
crypto/heimdal/lib/krb5/get_in_tkt.c
119
pa2 = realloc (md->val, (md->len + netypes) * sizeof(*md->val));
crypto/heimdal/lib/krb5/get_in_tkt.c
124
md->val = pa2;
crypto/heimdal/lib/krb5/get_in_tkt.c
132
ret = make_pa_enc_timestamp (context, &md->val[md->len],
crypto/heimdal/lib/krb5/get_in_tkt.c
213
&a->req_body.etype.val,
crypto/heimdal/lib/krb5/get_in_tkt.c
256
a->padata->val = NULL;
crypto/heimdal/lib/krb5/get_in_tkt.c
259
if(preauth->val[i].type == KRB5_PADATA_ENC_TIMESTAMP){
crypto/heimdal/lib/krb5/get_in_tkt.c
262
for(j = 0; j < preauth->val[i].info.len; j++) {
crypto/heimdal/lib/krb5/get_in_tkt.c
264
if(preauth->val[i].info.val[j].salttype)
crypto/heimdal/lib/krb5/get_in_tkt.c
265
salt.salttype = *preauth->val[i].info.val[j].salttype;
crypto/heimdal/lib/krb5/get_in_tkt.c
268
if(preauth->val[i].info.val[j].salt)
crypto/heimdal/lib/krb5/get_in_tkt.c
269
salt.saltvalue = *preauth->val[i].info.val[j].salt;
crypto/heimdal/lib/krb5/get_in_tkt.c
277
&preauth->val[i].info.val[j].etype, 1,
crypto/heimdal/lib/krb5/get_in_tkt.c
296
a->padata->val = NULL;
crypto/heimdal/lib/krb5/get_in_tkt.c
300
key_proc, keyseed, a->req_body.etype.val,
crypto/heimdal/lib/krb5/get_in_tkt.c
307
key_proc, keyseed, a->req_body.etype.val,
crypto/heimdal/lib/krb5/get_in_tkt.c
339
switch(md.val[i].padata_type){
crypto/heimdal/lib/krb5/get_in_tkt.c
346
(*preauth)->val[0].type = KRB5_PADATA_ENC_TIMESTAMP;
crypto/heimdal/lib/krb5/get_in_tkt.c
347
decode_ETYPE_INFO(md.val[i].padata_value.data,
crypto/heimdal/lib/krb5/get_in_tkt.c
348
md.val[i].padata_value.length,
crypto/heimdal/lib/krb5/get_in_tkt.c
349
&(*preauth)->val[0].info,
crypto/heimdal/lib/krb5/get_in_tkt.c
412
free_ETYPE_INFO(&my_preauth->val[0].info);
crypto/heimdal/lib/krb5/get_in_tkt.c
413
free (my_preauth->val);
crypto/heimdal/lib/krb5/get_in_tkt.c
473
pa = krb5_find_padata(rep.kdc_rep.padata->val, rep.kdc_rep.padata->len,
crypto/heimdal/lib/krb5/get_in_tkt.c
477
pa = krb5_find_padata(rep.kdc_rep.padata->val,
crypto/heimdal/lib/krb5/init_creds_pw.c
1052
a->req_body.etype.val, a->req_body.etype.len,
crypto/heimdal/lib/krb5/init_creds_pw.c
1060
a->req_body.etype.val, a->req_body.etype.len,
crypto/heimdal/lib/krb5/init_creds_pw.c
1164
(*out_md)->val = NULL;
crypto/heimdal/lib/krb5/init_creds_pw.c
1170
_krb5_debug(context, 5, "KDC send PA-DATA type: %d", in_md->val[i].padata_type);
crypto/heimdal/lib/krb5/init_creds_pw.c
1285
pa = krb5_find_padata(rep->padata->val,
crypto/heimdal/lib/krb5/init_creds_pw.c
1291
pa = krb5_find_padata(rep->padata->val,
crypto/heimdal/lib/krb5/init_creds_pw.c
286
lre[i]->lr_type = lr->val[i].lr_type;
crypto/heimdal/lib/krb5/init_creds_pw.c
287
lre[i]->value = lr->val[i].lr_value;
crypto/heimdal/lib/krb5/init_creds_pw.c
313
if (lr->val[i].lr_value <= t) {
crypto/heimdal/lib/krb5/init_creds_pw.c
314
switch (abs(lr->val[i].lr_type)) {
crypto/heimdal/lib/krb5/init_creds_pw.c
319
lr->val[i].lr_value);
crypto/heimdal/lib/krb5/init_creds_pw.c
326
lr->val[i].lr_value);
crypto/heimdal/lib/krb5/init_creds_pw.c
677
&a->req_body.etype.val,
crypto/heimdal/lib/krb5/init_creds_pw.c
773
if (asreq->req_body.etype.val[j] == e.val[i].etype) {
crypto/heimdal/lib/krb5/init_creds_pw.c
775
if (e.val[i].salt == NULL)
crypto/heimdal/lib/krb5/init_creds_pw.c
778
salt.saltvalue.data = *e.val[i].salt;
crypto/heimdal/lib/krb5/init_creds_pw.c
779
salt.saltvalue.length = strlen(*e.val[i].salt);
crypto/heimdal/lib/krb5/init_creds_pw.c
783
ret = set_paid(paid, context, e.val[i].etype,
crypto/heimdal/lib/krb5/init_creds_pw.c
787
e.val[i].s2kparams);
crypto/heimdal/lib/krb5/init_creds_pw.c
788
if (e.val[i].salt == NULL)
crypto/heimdal/lib/krb5/init_creds_pw.c
822
if (asreq->req_body.etype.val[j] == e.val[i].etype) {
crypto/heimdal/lib/krb5/init_creds_pw.c
825
if (e.val[i].salt == NULL)
crypto/heimdal/lib/krb5/init_creds_pw.c
828
salt.saltvalue = *e.val[i].salt;
crypto/heimdal/lib/krb5/init_creds_pw.c
831
if (e.val[i].salttype)
crypto/heimdal/lib/krb5/init_creds_pw.c
832
salt.salttype = *e.val[i].salttype;
crypto/heimdal/lib/krb5/init_creds_pw.c
834
ret = set_paid(paid, context, e.val[i].etype,
crypto/heimdal/lib/krb5/init_creds_pw.c
839
if (e.val[i].salt == NULL)
crypto/heimdal/lib/krb5/init_creds_pw.c
899
if (md->val[i].padata_type == type)
crypto/heimdal/lib/krb5/init_creds_pw.c
900
return &md->val[i];
crypto/heimdal/lib/krb5/keytab.c
523
if (krb5_principal_compare(context, &entry->aliases->val[i], principal))
crypto/heimdal/lib/krb5/keytab_file.c
222
p->name.name_string.val = calloc(len, sizeof(*p->name.name_string.val));
crypto/heimdal/lib/krb5/keytab_file.c
223
if(p->name.name_string.val == NULL) {
crypto/heimdal/lib/krb5/keytab_file.c
230
ret = krb5_kt_ret_string(context, sp, p->name.name_string.val + i);
crypto/heimdal/lib/krb5/keytab_file.c
276
ret = krb5_kt_store_string(sp, p->name.name_string.val[i]);
crypto/heimdal/lib/krb5/krb5.h
308
krb5_preauthdata_entry *val;
crypto/heimdal/lib/krb5/krb5.h
661
struct facility *val;
crypto/heimdal/lib/krb5/krb5_locl.h
189
#define ALLOC_SEQ(X, N) do { (X)->len = (N); ALLOC((X)->val, (N)); } while(0)
crypto/heimdal/lib/krb5/log.c
115
return table->val;
crypto/heimdal/lib/krb5/log.c
394
(*fac->val[i].close_func)(fac->val[i].data);
crypto/heimdal/lib/krb5/log.c
395
free(fac->val);
crypto/heimdal/lib/krb5/log.c
397
fac->val = NULL;
crypto/heimdal/lib/krb5/log.c
424
if(fac->val[i].min <= level &&
crypto/heimdal/lib/krb5/log.c
425
(fac->val[i].max < 0 || fac->val[i].max >= level)) {
crypto/heimdal/lib/krb5/log.c
437
(*fac->val[i].log_func)(buf, actual, fac->val[i].data);
crypto/heimdal/lib/krb5/log.c
51
fp = realloc(f->val, (f->len + 1) * sizeof(*f->val));
crypto/heimdal/lib/krb5/log.c
55
f->val = fp;
crypto/heimdal/lib/krb5/log.c
62
int val;
crypto/heimdal/lib/krb5/misc.c
60
size = strlen(self->name.name_string.val[i]);
crypto/heimdal/lib/krb5/misc.c
61
ssize = krb5_storage_write(sp, self->name.name_string.val[i], size);
crypto/heimdal/lib/krb5/padata.c
37
krb5_find_padata(PA_DATA *val, unsigned len, int type, int *idx)
crypto/heimdal/lib/krb5/padata.c
40
if(val[*idx].padata_type == (unsigned)type)
crypto/heimdal/lib/krb5/padata.c
41
return val + *idx;
crypto/heimdal/lib/krb5/padata.c
51
pa = realloc (md->val, (md->len + 1) * sizeof(*md->val));
crypto/heimdal/lib/krb5/padata.c
57
md->val = pa;
crypto/heimdal/lib/krb5/parse-name-test.c
103
val = 1;
crypto/heimdal/lib/krb5/parse-name-test.c
107
princ->name.name_string.val[i]) != 0) {
crypto/heimdal/lib/krb5/parse-name-test.c
111
princ->name.name_string.val[i],
crypto/heimdal/lib/krb5/parse-name-test.c
114
val = 1;
crypto/heimdal/lib/krb5/parse-name-test.c
124
val = 1;
crypto/heimdal/lib/krb5/parse-name-test.c
137
val = 1;
crypto/heimdal/lib/krb5/parse-name-test.c
148
val = 1;
crypto/heimdal/lib/krb5/parse-name-test.c
160
val = 1;
crypto/heimdal/lib/krb5/parse-name-test.c
173
val = 1;
crypto/heimdal/lib/krb5/parse-name-test.c
184
val = 1;
crypto/heimdal/lib/krb5/parse-name-test.c
191
return val;
crypto/heimdal/lib/krb5/parse-name-test.c
70
int val = 0;
crypto/heimdal/lib/krb5/parse-name-test.c
95
val = 1;
crypto/heimdal/lib/krb5/pkinit.c
1115
ret = decode_KRB5PrincipalName(list.val[i].data,
crypto/heimdal/lib/krb5/pkinit.c
1116
list.val[i].length,
crypto/heimdal/lib/krb5/pkinit.c
1129
strcmp(r.principalName.name_string.val[0], KRB5_TGS_NAME) != 0 ||
crypto/heimdal/lib/krb5/pkinit.c
1130
strcmp(r.principalName.name_string.val[1], realm) != 0 ||
crypto/heimdal/lib/krb5/pkinit.c
2620
if (list.len > 0 && list.val[0].length > 0)
crypto/heimdal/lib/krb5/pkinit.c
2621
ret = decode_MS_UPN_SAN(list.val[0].data, list.val[0].length,
crypto/heimdal/lib/krb5/pkinit.c
347
p = realloc(ids->val, sizeof(ids->val[0]) * (ids->len + 1));
crypto/heimdal/lib/krb5/pkinit.c
353
ids->val = p;
crypto/heimdal/lib/krb5/pkinit.c
354
ids->val[ids->len] = id;
crypto/heimdal/lib/krb5/pkinit.c
624
&a->supportedCMSTypes->val,
crypto/heimdal/lib/krb5/principal.c
1134
strcmp(p->name.name_string.val[0], KRB5_TGS_NAME) == 0;
crypto/heimdal/lib/krb5/principal.c
360
(*principal)->name.name_string.val = comp;
crypto/heimdal/lib/krb5/principal.c
62
#define princ_comp(P) ((P)->name.name_string.val)
crypto/heimdal/lib/krb5/principal.c
63
#define princ_ncomp(P, N) ((P)->name.name_string.val[(N)])
crypto/heimdal/lib/krb5/principal.c
939
if(strcmp(princ_ncomp(princ1, i), princ2->name_string.val[i]) != 0)
crypto/heimdal/lib/krb5/rd_cred.c
259
KrbCredInfo *kci = &enc_krb_cred_part.ticket_info.val[i];
crypto/heimdal/lib/krb5/rd_cred.c
271
&cred.tickets.val[i], &len, ret);
crypto/heimdal/lib/krb5/rd_rep.c
113
krb5_ap_rep_enc_part *val)
crypto/heimdal/lib/krb5/rd_rep.c
115
if (val) {
crypto/heimdal/lib/krb5/rd_rep.c
116
free_EncAPRepPart (val);
crypto/heimdal/lib/krb5/rd_rep.c
117
free (val);
crypto/heimdal/lib/krb5/rd_req.c
183
etypes->val = NULL;
crypto/heimdal/lib/krb5/rd_req.c
190
if (ad->val[i].ad_type == KRB5_AUTHDATA_IF_RELEVANT) {
crypto/heimdal/lib/krb5/rd_req.c
191
ret = decode_AD_IF_RELEVANT(ad->val[i].ad_data.data,
crypto/heimdal/lib/krb5/rd_req.c
192
ad->val[i].ad_data.length,
crypto/heimdal/lib/krb5/rd_req.c
199
adIfRelevant.val[0].ad_type ==
crypto/heimdal/lib/krb5/rd_req.c
211
ret = decode_EtypeList(adIfRelevant.val[0].ad_data.data,
crypto/heimdal/lib/krb5/rd_req.c
212
adIfRelevant.val[0].ad_data.length,
crypto/heimdal/lib/krb5/rd_req.c
470
if (etypes.val) {
crypto/heimdal/lib/krb5/rd_req.c
474
if (krb5_enctype_valid(context, etypes.val[i]) == 0) {
crypto/heimdal/lib/krb5/rd_req.c
475
ac->keytype = etypes.val[i];
crypto/heimdal/lib/krb5/replay.c
190
EVP_DigestUpdate(m, auth->cname.name_string.val[i],
crypto/heimdal/lib/krb5/replay.c
191
strlen(auth->cname.name_string.val[i]));
crypto/heimdal/lib/krb5/salt.c
113
len += strlen(principal->name.name_string.val[i]);
crypto/heimdal/lib/krb5/salt.c
122
principal->name.name_string.val[i],
crypto/heimdal/lib/krb5/salt.c
123
strlen(principal->name.name_string.val[i]));
crypto/heimdal/lib/krb5/salt.c
124
p += strlen(principal->name.name_string.val[i]);
crypto/heimdal/lib/krb5/store.c
1179
ret = krb5_store_address(sp, p.val[i]);
crypto/heimdal/lib/krb5/store.c
1205
ret = size_too_large_num(sp, tmp, sizeof(adr->val[0]));
crypto/heimdal/lib/krb5/store.c
1208
ALLOC(adr->val, adr->len);
crypto/heimdal/lib/krb5/store.c
1209
if (adr->val == NULL && adr->len != 0)
crypto/heimdal/lib/krb5/store.c
1212
ret = krb5_ret_address(sp, &adr->val[i]);
crypto/heimdal/lib/krb5/store.c
1237
ret = krb5_store_int16(sp, auth.val[i].ad_type);
crypto/heimdal/lib/krb5/store.c
1239
ret = krb5_store_data(sp, auth.val[i].ad_data);
crypto/heimdal/lib/krb5/store.c
1265
ret = size_too_large_num(sp, tmp, sizeof(auth->val[0]));
crypto/heimdal/lib/krb5/store.c
1268
if (auth->val == NULL && tmp != 0)
crypto/heimdal/lib/krb5/store.c
1273
auth->val[i].ad_type = tmp2;
crypto/heimdal/lib/krb5/store.c
1274
ret = krb5_ret_data(sp, &auth->val[i].ad_data);
crypto/heimdal/lib/krb5/store.c
923
ret = krb5_store_string(sp, p->name.name_string.val[i]);
crypto/heimdal/lib/krb5/store.c
970
ret = size_too_large_num(sp, ncomp, sizeof(p->name.name_string.val[0]));
crypto/heimdal/lib/krb5/store.c
982
p->name.name_string.val = calloc(ncomp, sizeof(p->name.name_string.val[0]));
crypto/heimdal/lib/krb5/store.c
983
if(p->name.name_string.val == NULL && ncomp != 0){
crypto/heimdal/lib/krb5/store.c
989
ret = krb5_ret_string(sp, &p->name.name_string.val[i]);
crypto/heimdal/lib/krb5/store.c
992
free(p->name.name_string.val[i--]);
crypto/heimdal/lib/krb5/string-to-key-test.c
134
val = 1;
crypto/heimdal/lib/krb5/string-to-key-test.c
139
return val;
crypto/heimdal/lib/krb5/string-to-key-test.c
98
int val = 0;
crypto/heimdal/lib/krb5/test_addr.c
106
krb5_print_address(&addresses.val[0], buf, outlen + 1, &len);
crypto/heimdal/lib/krb5/test_addr.c
153
if (krb5_address_order(context, &range.val[0], &one.val[0]) == 0) {
crypto/heimdal/lib/krb5/test_addr.c
54
krb5_print_address(&addresses.val[i], buf, sizeof(buf), &len);
crypto/heimdal/lib/krb5/test_addr.c
61
krb5_print_address(&addresses.val[i], buf2, sizeof(buf2), &len);
crypto/heimdal/lib/krb5/test_addr.c
92
krb5_print_address(&addresses.val[0], buf, truncate_len, &len);
crypto/heimdal/lib/krb5/test_get_addrs.c
47
krb5_print_address (&addrs->val[i], buf, sizeof(buf), &len);
crypto/heimdal/lib/krb5/test_store.c
106
if (v != val[i])
crypto/heimdal/lib/krb5/test_store.c
116
uint8_t val[] = {
crypto/heimdal/lib/krb5/test_store.c
122
for (i = 0; i < sizeof(val[0])/sizeof(val); i++) {
crypto/heimdal/lib/krb5/test_store.c
124
ret = krb5_store_uint8(sp, val[i]);
crypto/heimdal/lib/krb5/test_store.c
131
if (v != val[i])
crypto/heimdal/lib/krb5/test_store.c
141
uint16_t val[] = {
crypto/heimdal/lib/krb5/test_store.c
147
for (i = 0; i < sizeof(val[0])/sizeof(val); i++) {
crypto/heimdal/lib/krb5/test_store.c
149
ret = krb5_store_uint16(sp, val[i]);
crypto/heimdal/lib/krb5/test_store.c
156
if (v != val[i])
crypto/heimdal/lib/krb5/test_store.c
166
uint32_t val[] = {
crypto/heimdal/lib/krb5/test_store.c
172
for (i = 0; i < sizeof(val[0])/sizeof(val); i++) {
crypto/heimdal/lib/krb5/test_store.c
174
ret = krb5_store_uint32(sp, val[i]);
crypto/heimdal/lib/krb5/test_store.c
181
if (v != val[i])
crypto/heimdal/lib/krb5/test_store.c
41
int8_t val[] = {
crypto/heimdal/lib/krb5/test_store.c
47
for (i = 0; i < sizeof(val[0])/sizeof(val); i++) {
crypto/heimdal/lib/krb5/test_store.c
49
ret = krb5_store_int8(sp, val[i]);
crypto/heimdal/lib/krb5/test_store.c
56
if (v != val[i])
crypto/heimdal/lib/krb5/test_store.c
66
int16_t val[] = {
crypto/heimdal/lib/krb5/test_store.c
72
for (i = 0; i < sizeof(val[0])/sizeof(val); i++) {
crypto/heimdal/lib/krb5/test_store.c
74
ret = krb5_store_int16(sp, val[i]);
crypto/heimdal/lib/krb5/test_store.c
81
if (v != val[i])
crypto/heimdal/lib/krb5/test_store.c
91
int32_t val[] = {
crypto/heimdal/lib/krb5/test_store.c
97
for (i = 0; i < sizeof(val[0])/sizeof(val); i++) {
crypto/heimdal/lib/krb5/test_store.c
99
ret = krb5_store_int32(sp, val[i]);
crypto/heimdal/lib/krb5/ticket.c
215
if (!*found && ad->val[i].ad_type == type) {
crypto/heimdal/lib/krb5/ticket.c
216
ret = der_copy_octet_string(&ad->val[i].ad_data, data);
crypto/heimdal/lib/krb5/ticket.c
225
switch (ad->val[i].ad_type) {
crypto/heimdal/lib/krb5/ticket.c
228
ret = decode_AuthorizationData(ad->val[i].ad_data.data,
crypto/heimdal/lib/krb5/ticket.c
229
ad->val[i].ad_data.length,
crypto/heimdal/lib/krb5/ticket.c
250
ret = decode_AD_KDCIssued(ad->val[i].ad_data.data,
crypto/heimdal/lib/krb5/ticket.c
251
ad->val[i].ad_data.length,
crypto/heimdal/lib/krb5/ticket.c
314
ad->val[i].ad_type);
crypto/heimdal/lib/krb5/ticket.c
394
pa = krb5_find_padata(rep->kdc_rep.padata->val,
crypto/heimdal/lib/krb5/ticket.c
447
const char *realm = returned->name.name_string.val[1];
crypto/heimdal/lib/krb5/ticket.c
525
pa = krb5_find_padata(rep->kdc_rep.padata->val,
crypto/heimdal/lib/krb5/ticket.c
828
creds->addresses.val = NULL;
crypto/heimdal/lib/krb5/ticket.c
833
creds->authdata.val = NULL;
crypto/heimdal/lib/krb5/verify_krb5_conf.c
228
int val;
crypto/heimdal/lib/krb5/verify_krb5_conf.c
282
return table->val;
crypto/heimdal/lib/roken/base64.c
105
unsigned int val = 0;
crypto/heimdal/lib/roken/base64.c
110
val *= 64;
crypto/heimdal/lib/roken/base64.c
116
val += pos(token[i]);
crypto/heimdal/lib/roken/base64.c
120
return (marker << 24) | val;
crypto/heimdal/lib/roken/base64.c
131
unsigned int val = token_decode(p);
crypto/heimdal/lib/roken/base64.c
132
unsigned int marker = (val >> 24) & 0xff;
crypto/heimdal/lib/roken/base64.c
133
if (val == DECODE_ERROR)
crypto/heimdal/lib/roken/base64.c
135
*q++ = (val >> 16) & 0xff;
crypto/heimdal/lib/roken/base64.c
137
*q++ = (val >> 8) & 0xff;
crypto/heimdal/lib/roken/base64.c
139
*q++ = val & 0xff;
crypto/heimdal/lib/roken/bswap.c
40
bswap32 (unsigned int val)
crypto/heimdal/lib/roken/bswap.c
42
return (val & 0xff) << 24 |
crypto/heimdal/lib/roken/bswap.c
43
(val & 0xff00) << 8 |
crypto/heimdal/lib/roken/bswap.c
44
(val & 0xff0000) >> 8 |
crypto/heimdal/lib/roken/bswap.c
45
(val & 0xff000000) >> 24;
crypto/heimdal/lib/roken/bswap.c
52
bswap16 (unsigned short val)
crypto/heimdal/lib/roken/bswap.c
54
return (val & 0xff) << 8 |
crypto/heimdal/lib/roken/bswap.c
55
(val & 0xff00) >> 8;
crypto/heimdal/lib/roken/environment.c
93
char *val = strdup(p);
crypto/heimdal/lib/roken/environment.c
94
if(val == NULL) {
crypto/heimdal/lib/roken/environment.c
99
l[i] = val;
crypto/heimdal/lib/roken/esetenv.c
41
esetenv(const char *var, const char *val, int rewrite)
crypto/heimdal/lib/roken/esetenv.c
43
if (setenv (rk_UNCONST(var), rk_UNCONST(val), rewrite))
crypto/heimdal/lib/roken/getarg.c
443
int val;
crypto/heimdal/lib/roken/getarg.c
446
val = 1;
crypto/heimdal/lib/roken/getarg.c
447
else if(sscanf(goptarg + 1, "%d", &val) != 1)
crypto/heimdal/lib/roken/getarg.c
449
*(int *)current->value += val;
crypto/heimdal/lib/roken/mkstemp.c
53
pid_t val;
crypto/heimdal/lib/roken/mkstemp.c
54
val = getpid();
crypto/heimdal/lib/roken/mkstemp.c
57
template[start] = '0' + val % 10;
crypto/heimdal/lib/roken/mkstemp.c
58
val /= 10;
crypto/heimdal/lib/roken/parse_bytes-test.c
41
int val;
crypto/heimdal/lib/roken/parse_bytes-test.c
65
int val = parse_bytes (tests[i].str, tests[i].def_unit);
crypto/heimdal/lib/roken/parse_bytes-test.c
68
if (val != tests[i].val) {
crypto/heimdal/lib/roken/parse_bytes-test.c
72
val, tests[i].val);
crypto/heimdal/lib/roken/parse_bytes-test.c
76
len = unparse_bytes (tests[i].val, buf, sizeof(buf));
crypto/heimdal/lib/roken/parse_bytes-test.c
79
tests[i].val, buf, tests[i].str);
crypto/heimdal/lib/roken/parse_reply-test.c
124
return val;
crypto/heimdal/lib/roken/parse_reply-test.c
66
static sig_atomic_t val = 0;
crypto/heimdal/lib/roken/parse_reply-test.c
71
val = 1;
crypto/heimdal/lib/roken/parse_reply-test.c
90
for (i = 0; val == 0 && i < sizeof(tests)/sizeof(tests[0]); ++i) {
crypto/heimdal/lib/roken/parse_time-test.c
104
if (j != tests[i].val)
crypto/heimdal/lib/roken/parse_time-test.c
111
if (j != tests[i].val)
crypto/heimdal/lib/roken/parse_time-test.c
43
int val;
crypto/heimdal/lib/roken/parse_time-test.c
65
sz = unparse_time(tests[i].val, NULL, 0);
crypto/heimdal/lib/roken/parse_time-test.c
74
sz = unparse_time(tests[i].val, buf, buf_sz);
crypto/heimdal/lib/roken/parse_time-test.c
88
sz = unparse_time(tests[i].val, buf, min(buf_sz, tests[i].size));
crypto/heimdal/lib/roken/parse_units.c
100
val = 1;
crypto/heimdal/lib/roken/parse_units.c
103
val = -1;
crypto/heimdal/lib/roken/parse_units.c
105
if (no_val_p && val == 0)
crypto/heimdal/lib/roken/parse_units.c
106
val = 1;
crypto/heimdal/lib/roken/parse_units.c
116
res = (*func)(res, val, u->mult);
crypto/heimdal/lib/roken/parse_units.c
129
res = (*func)(res, val, partial_unit->mult);
crypto/heimdal/lib/roken/parse_units.c
147
acc_units(int res, int val, unsigned mult)
crypto/heimdal/lib/roken/parse_units.c
149
return res + val * mult;
crypto/heimdal/lib/roken/parse_units.c
166
acc_flags(int res, int val, unsigned mult)
crypto/heimdal/lib/roken/parse_units.c
168
if(val == 1)
crypto/heimdal/lib/roken/parse_units.c
170
else if(val == -1)
crypto/heimdal/lib/roken/parse_units.c
172
else if (val == 0)
crypto/heimdal/lib/roken/parse_units.c
50
int (*func)(int res, int val, unsigned mult),
crypto/heimdal/lib/roken/parse_units.c
73
int val;
crypto/heimdal/lib/roken/parse_units.c
83
val = strtol(p, &next, 0);
crypto/heimdal/lib/roken/parse_units.c
85
val = 0;
crypto/heimdal/lib/roken/parse_units.c
94
res = (*func)(res, val, def_mult);
crypto/heimdal/lib/roken/setenv.c
48
setenv(const char *var, const char *val, int rewrite)
crypto/heimdal/lib/roken/setenv.c
56
if (asprintf (&t, "%s=%s", var, val) < 0 || t == NULL)
crypto/heimdal/lib/roken/setenv.c
69
if (SetEnvironmentVariable(var, val) == 0)
crypto/heimdal/lib/roken/snprintf.c
571
int val;
crypto/heimdal/lib/roken/snprintf.c
574
val = vasprintf (ret, format, args);
crypto/heimdal/lib/roken/snprintf.c
581
tmp = malloc (val + 1);
crypto/heimdal/lib/roken/snprintf.c
588
if (val != ret2 || strcmp(*ret, tmp))
crypto/heimdal/lib/roken/snprintf.c
594
return val;
crypto/heimdal/lib/roken/snprintf.c
603
int val;
crypto/heimdal/lib/roken/snprintf.c
606
val = vasnprintf (ret, max_sz, format, args);
crypto/heimdal/lib/roken/snprintf.c
612
tmp = malloc (val + 1);
crypto/heimdal/lib/roken/snprintf.c
617
if (val != ret2 || strcmp(*ret, tmp))
crypto/heimdal/lib/roken/snprintf.c
624
return val;
crypto/heimdal/lib/roken/socket.c
267
socket_set_reuseaddr (rk_socket_t sock, int val)
crypto/heimdal/lib/roken/socket.c
270
setsockopt(sock, SOL_SOCKET, SO_REUSEADDR, (void *)&val, sizeof(val));
crypto/heimdal/lib/roken/socket.c
279
socket_set_ipv6only (rk_socket_t sock, int val)
crypto/heimdal/lib/roken/socket.c
282
setsockopt(sock, IPPROTO_IPV6, IPV6_V6ONLY, (void *)&val, sizeof(val));
crypto/heimdal/lib/wind/normalize.c
231
return c->val;
crypto/heimdal/lib/wind/normalize_table.h
24
uint32_t val;
crypto/heimdal/lib/wind/punycode_examples.h
13
uint32_t val[MAX_LENGTH];
crypto/heimdal/lib/wind/test-punycode.c
56
ret = wind_punycode_label_toascii(e->val, e->len, buf, &len);
crypto/krb5/src/include/k5-buf.h
118
k5_buf_add_byte(struct k5buf *buf, uint8_t val)
crypto/krb5/src/include/k5-buf.h
120
k5_buf_add_len(buf, &val, 1);
crypto/krb5/src/include/k5-buf.h
124
k5_buf_add_uint16_be(struct k5buf *buf, uint16_t val)
crypto/krb5/src/include/k5-buf.h
129
store_16_be(val, p);
crypto/krb5/src/include/k5-buf.h
133
k5_buf_add_uint16_le(struct k5buf *buf, uint16_t val)
crypto/krb5/src/include/k5-buf.h
138
store_16_le(val, p);
crypto/krb5/src/include/k5-buf.h
142
k5_buf_add_uint32_be(struct k5buf *buf, uint32_t val)
crypto/krb5/src/include/k5-buf.h
147
store_32_be(val, p);
crypto/krb5/src/include/k5-buf.h
151
k5_buf_add_uint32_le(struct k5buf *buf, uint32_t val)
crypto/krb5/src/include/k5-buf.h
156
store_32_le(val, p);
crypto/krb5/src/include/k5-buf.h
160
k5_buf_add_uint64_be(struct k5buf *buf, uint64_t val)
crypto/krb5/src/include/k5-buf.h
165
store_64_be(val, p);
crypto/krb5/src/include/k5-buf.h
169
k5_buf_add_uint64_le(struct k5buf *buf, uint64_t val)
crypto/krb5/src/include/k5-buf.h
174
store_64_le(val, p);
crypto/krb5/src/include/k5-hashtab.h
70
void *val);
crypto/krb5/src/include/k5-int.h
1730
krb5int_ldap_encode_sequence_of_keys(const ldap_seqof_key_data *val,
crypto/krb5/src/include/k5-int.h
1926
(*asn1_ldap_encode_sequence_of_keys)(const ldap_seqof_key_data *val,
crypto/krb5/src/include/k5-int.h
948
krb5_algorithm_identifier *val);
crypto/krb5/src/include/k5-int.h
949
void k5_free_otp_tokeninfo(krb5_context context, krb5_otp_tokeninfo *val);
crypto/krb5/src/include/k5-int.h
951
krb5_pa_otp_challenge *val);
crypto/krb5/src/include/k5-int.h
952
void k5_free_pa_otp_req(krb5_context context, krb5_pa_otp_req *val);
crypto/krb5/src/include/k5-int.h
953
void k5_free_kkdcp_message(krb5_context context, krb5_kkdcp_message *val);
crypto/krb5/src/include/k5-int.h
954
void k5_free_cammac(krb5_context context, krb5_cammac *val);
crypto/krb5/src/include/k5-int.h
955
void k5_free_secure_cookie(krb5_context context, krb5_secure_cookie *val);
crypto/krb5/src/include/k5-int.h
993
k5_zapfree_pa_data(krb5_pa_data **val);
crypto/krb5/src/include/k5-json.h
134
int k5_json_array_add(k5_json_array array, k5_json_value val);
crypto/krb5/src/include/k5-json.h
135
void k5_json_array_set(k5_json_array array, size_t idx, k5_json_value val);
crypto/krb5/src/include/k5-json.h
162
k5_json_value val);
crypto/krb5/src/include/k5-json.h
176
int k5_json_object_set(k5_json_object obj, const char *key, k5_json_value val);
crypto/krb5/src/include/k5-json.h
215
int k5_json_encode(k5_json_value val, char **json_out);
crypto/krb5/src/include/k5-json.h
89
k5_json_tid k5_json_get_tid(k5_json_value val);
crypto/krb5/src/include/k5-json.h
96
k5_json_value k5_json_retain(k5_json_value val);
crypto/krb5/src/include/k5-json.h
97
void k5_json_release(k5_json_value val);
crypto/krb5/src/include/k5-platform.h
1133
int val;
crypto/krb5/src/include/k5-platform.h
562
store_16_be (unsigned int val, void *vp)
crypto/krb5/src/include/k5-platform.h
566
PUT(16,p,val);
crypto/krb5/src/include/k5-platform.h
568
PUTSWAPPED(16,p,val);
crypto/krb5/src/include/k5-platform.h
570
p[0] = (val >> 8) & 0xff;
crypto/krb5/src/include/k5-platform.h
571
p[1] = (val ) & 0xff;
crypto/krb5/src/include/k5-platform.h
575
store_32_be (unsigned int val, void *vp)
crypto/krb5/src/include/k5-platform.h
579
PUT(32,p,val);
crypto/krb5/src/include/k5-platform.h
581
PUTSWAPPED(32,p,val);
crypto/krb5/src/include/k5-platform.h
583
p[0] = (val >> 24) & 0xff;
crypto/krb5/src/include/k5-platform.h
584
p[1] = (val >> 16) & 0xff;
crypto/krb5/src/include/k5-platform.h
585
p[2] = (val >> 8) & 0xff;
crypto/krb5/src/include/k5-platform.h
586
p[3] = (val ) & 0xff;
crypto/krb5/src/include/k5-platform.h
590
store_64_be (uint64_t val, void *vp)
crypto/krb5/src/include/k5-platform.h
594
PUT(64,p,val);
crypto/krb5/src/include/k5-platform.h
596
PUTSWAPPED(64,p,val);
crypto/krb5/src/include/k5-platform.h
598
p[0] = (unsigned char)((val >> 56) & 0xff);
crypto/krb5/src/include/k5-platform.h
599
p[1] = (unsigned char)((val >> 48) & 0xff);
crypto/krb5/src/include/k5-platform.h
600
p[2] = (unsigned char)((val >> 40) & 0xff);
crypto/krb5/src/include/k5-platform.h
601
p[3] = (unsigned char)((val >> 32) & 0xff);
crypto/krb5/src/include/k5-platform.h
602
p[4] = (unsigned char)((val >> 24) & 0xff);
crypto/krb5/src/include/k5-platform.h
603
p[5] = (unsigned char)((val >> 16) & 0xff);
crypto/krb5/src/include/k5-platform.h
604
p[6] = (unsigned char)((val >> 8) & 0xff);
crypto/krb5/src/include/k5-platform.h
605
p[7] = (unsigned char)((val ) & 0xff);
crypto/krb5/src/include/k5-platform.h
647
store_16_le (unsigned int val, void *vp)
crypto/krb5/src/include/k5-platform.h
651
PUT(16,p,val);
crypto/krb5/src/include/k5-platform.h
653
PUTSWAPPED(16,p,val);
crypto/krb5/src/include/k5-platform.h
655
p[1] = (val >> 8) & 0xff;
crypto/krb5/src/include/k5-platform.h
656
p[0] = (val ) & 0xff;
crypto/krb5/src/include/k5-platform.h
660
store_32_le (unsigned int val, void *vp)
crypto/krb5/src/include/k5-platform.h
664
PUT(32,p,val);
crypto/krb5/src/include/k5-platform.h
666
PUTSWAPPED(32,p,val);
crypto/krb5/src/include/k5-platform.h
668
p[3] = (val >> 24) & 0xff;
crypto/krb5/src/include/k5-platform.h
669
p[2] = (val >> 16) & 0xff;
crypto/krb5/src/include/k5-platform.h
670
p[1] = (val >> 8) & 0xff;
crypto/krb5/src/include/k5-platform.h
671
p[0] = (val ) & 0xff;
crypto/krb5/src/include/k5-platform.h
675
store_64_le (uint64_t val, void *vp)
crypto/krb5/src/include/k5-platform.h
679
PUT(64,p,val);
crypto/krb5/src/include/k5-platform.h
681
PUTSWAPPED(64,p,val);
crypto/krb5/src/include/k5-platform.h
683
p[7] = (unsigned char)((val >> 56) & 0xff);
crypto/krb5/src/include/k5-platform.h
684
p[6] = (unsigned char)((val >> 48) & 0xff);
crypto/krb5/src/include/k5-platform.h
685
p[5] = (unsigned char)((val >> 40) & 0xff);
crypto/krb5/src/include/k5-platform.h
686
p[4] = (unsigned char)((val >> 32) & 0xff);
crypto/krb5/src/include/k5-platform.h
687
p[3] = (unsigned char)((val >> 24) & 0xff);
crypto/krb5/src/include/k5-platform.h
688
p[2] = (unsigned char)((val >> 16) & 0xff);
crypto/krb5/src/include/k5-platform.h
689
p[1] = (unsigned char)((val >> 8) & 0xff);
crypto/krb5/src/include/k5-platform.h
690
p[0] = (unsigned char)((val ) & 0xff);
crypto/krb5/src/include/k5-platform.h
734
store_16_n (unsigned int val, void *vp)
crypto/krb5/src/include/k5-platform.h
736
UINT16_TYPE n = val;
crypto/krb5/src/include/k5-platform.h
740
store_32_n (unsigned int val, void *vp)
crypto/krb5/src/include/k5-platform.h
742
UINT32_TYPE n = val;
crypto/krb5/src/include/k5-platform.h
746
store_64_n (uint64_t val, void *vp)
crypto/krb5/src/include/k5-platform.h
748
uint64_t n = val;
crypto/krb5/src/include/k5-platform.h
777
k5_htonll (uint64_t val)
crypto/krb5/src/include/k5-platform.h
780
return val;
crypto/krb5/src/include/k5-platform.h
782
return SWAP64 (val);
crypto/krb5/src/include/k5-platform.h
784
return load_64_be ((unsigned char *)&val);
crypto/krb5/src/include/k5-platform.h
788
k5_ntohll (uint64_t val)
crypto/krb5/src/include/k5-platform.h
790
return k5_htonll (val);
crypto/krb5/src/include/k5-spake.h
101
krb5_error_code encode_krb5_pa_spake(const krb5_pa_spake *val,
crypto/krb5/src/include/k5-spake.h
105
void k5_free_pa_spake(krb5_context context, krb5_pa_spake *val);
crypto/krb5/src/include/k5-spake.h
95
krb5_error_code encode_krb5_spake_factor(const krb5_spake_factor *val,
crypto/krb5/src/include/k5-spake.h
99
void k5_free_spake_factor(krb5_context context, krb5_spake_factor *val);
crypto/krb5/src/kprop/kpropd.c
385
int finet, s, ret, error, val, status;
crypto/krb5/src/kprop/kpropd.c
401
val = 1;
crypto/krb5/src/kprop/kpropd.c
402
if (setsockopt(finet, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val)) < 0)
crypto/krb5/src/kprop/kpropd.c
408
val = 0;
crypto/krb5/src/kprop/kpropd.c
410
setsockopt(finet, IPPROTO_IPV6, IPV6_V6ONLY, &val, sizeof(val)) < 0)
crypto/krb5/src/kprop/kproplog.c
202
print_attr(kdbe_val_t *val, int vverbose)
crypto/krb5/src/kprop/kproplog.c
204
switch (val->av_type) {
crypto/krb5/src/kprop/kproplog.c
208
print_flags(val->kdbe_val_t_u.av_attrflags);
crypto/krb5/src/kprop/kproplog.c
213
print_deltat(&val->kdbe_val_t_u.av_max_life);
crypto/krb5/src/kprop/kproplog.c
218
print_deltat(&val->kdbe_val_t_u.av_max_renew_life);
crypto/krb5/src/kprop/kproplog.c
223
print_time(&val->kdbe_val_t_u.av_exp);
crypto/krb5/src/kprop/kproplog.c
228
print_time(&val->kdbe_val_t_u.av_pw_exp);
crypto/krb5/src/kprop/kproplog.c
233
print_time(&val->kdbe_val_t_u.av_last_success);
crypto/krb5/src/kprop/kproplog.c
238
print_time(&val->kdbe_val_t_u.av_last_failed);
crypto/krb5/src/kprop/kproplog.c
243
printf("\t\t\t%d\n", val->kdbe_val_t_u.av_fail_auth_count);
crypto/krb5/src/kprop/kproplog.c
248
print_princ(&val->kdbe_val_t_u.av_princ);
crypto/krb5/src/kprop/kproplog.c
253
print_keydata(val->kdbe_val_t_u.av_keydata.av_keydata_val,
crypto/krb5/src/kprop/kproplog.c
254
val->kdbe_val_t_u.av_keydata.av_keydata_len);
crypto/krb5/src/kprop/kproplog.c
260
print_tldata(val->kdbe_val_t_u.av_tldata.av_tldata_val,
crypto/krb5/src/kprop/kproplog.c
261
val->kdbe_val_t_u.av_tldata.av_tldata_len);
crypto/krb5/src/kprop/kproplog.c
267
printf("\t\t\t%d\n", val->kdbe_val_t_u.av_len);
crypto/krb5/src/kprop/kproplog.c
272
print_time(&val->kdbe_val_t_u.av_pw_last_change);
crypto/krb5/src/kprop/kproplog.c
277
print_princ(&val->kdbe_val_t_u.av_mod_princ);
crypto/krb5/src/kprop/kproplog.c
282
print_time(&val->kdbe_val_t_u.av_mod_time);
crypto/krb5/src/kprop/kproplog.c
287
print_str("where", &val->kdbe_val_t_u.av_mod_where);
crypto/krb5/src/kprop/kproplog.c
292
print_str("policy", &val->kdbe_val_t_u.av_pw_policy);
crypto/krb5/src/kprop/kproplog.c
297
printf("\t\t\t%d\n", val->kdbe_val_t_u.av_pw_policy_switch);
crypto/krb5/src/kprop/kproplog.c
302
printf("\t\t\t%d\n", val->kdbe_val_t_u.av_pw_hist_kvno);
crypto/krb5/src/lib/apputils/net-server.c
1501
struct bind_address val;
crypto/krb5/src/lib/apputils/net-server.c
1506
FOREACH_ELT(bind_addresses, i, val)
crypto/krb5/src/lib/apputils/net-server.c
1507
free(val.address);
crypto/krb5/src/lib/apputils/net-server.c
192
#define ADD(set, val, tmpptr) \
crypto/krb5/src/lib/apputils/net-server.c
194
? (set.data[set.n++] = val, 1) \
crypto/krb5/src/lib/apputils/net-server.c
307
struct bind_address addr, val;
crypto/krb5/src/lib/apputils/net-server.c
321
FOREACH_ELT(bind_addresses, i, val) {
crypto/krb5/src/lib/apputils/net-server.c
322
if (type != val.type || port != val.port)
crypto/krb5/src/lib/apputils/net-server.c
327
if (address == NULL && val.address != NULL) {
crypto/krb5/src/lib/apputils/net-server.c
331
val.address);
crypto/krb5/src/lib/apputils/net-server.c
332
free(val.address);
crypto/krb5/src/lib/apputils/net-server.c
334
} else if (val.address == NULL || !strcmp(address, val.address)) {
crypto/krb5/src/lib/crypto/crypto_tests/t_kperf.c
110
krb5_c_verify_checksum(NULL, &kblock, 0, &block, &sum, &val);
crypto/krb5/src/lib/crypto/crypto_tests/t_kperf.c
119
krb5_k_verify_checksum(NULL, key, 0, &block, &sum, &val);
crypto/krb5/src/lib/crypto/crypto_tests/t_kperf.c
58
krb5_boolean val;
crypto/krb5/src/lib/crypto/krb/keyblocks.c
59
krb5int_c_free_keyblock(krb5_context context, krb5_keyblock *val)
crypto/krb5/src/lib/crypto/krb/keyblocks.c
61
krb5int_c_free_keyblock_contents(context, val);
crypto/krb5/src/lib/crypto/krb/keyblocks.c
62
free(val);
crypto/krb5/src/lib/crypto/krb/keyed_checksum_types.c
79
krb5_free_cksumtypes(krb5_context context, krb5_cksumtype *val)
crypto/krb5/src/lib/crypto/krb/keyed_checksum_types.c
81
free(val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
179
k5_json_value val;
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
188
ret = json_address(*addrs, &val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
191
ret = k5_json_array_add(array, val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
192
k5_json_release(val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
225
k5_json_value val;
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
234
ret = json_authdata_element(*authdata, &val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
237
ret = k5_json_array_add(array, val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
238
k5_json_release(val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
306
k5_json_value val;
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
317
ret = json_principal(context, princ, &val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
321
ret = k5_json_array_add(array, val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
322
k5_json_release(val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
331
ret = json_creds(context, &creds, &val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
335
ret = k5_json_array_add(array, val);
crypto/krb5/src/lib/gssapi/krb5/export_cred.c
336
k5_json_release(val);
crypto/krb5/src/lib/gssapi/mechglue/g_initialize.c
482
const char *val;
crypto/krb5/src/lib/gssapi/mechglue/g_initialize.c
489
val = secure_getenv("GSS_MECH_CONFIG");
crypto/krb5/src/lib/gssapi/mechglue/g_initialize.c
490
if (val != NULL) {
crypto/krb5/src/lib/gssapi/mechglue/g_initialize.c
491
load_if_changed(val, g_confFileModTime, &g_confFileModTime);
crypto/krb5/src/lib/kadm5/alt_prof.c
111
krb5_boolean val;
crypto/krb5/src/lib/kadm5/alt_prof.c
123
ret = string_to_boolean(valp, &val);
crypto/krb5/src/lib/kadm5/alt_prof.c
127
*retdata = val;
crypto/krb5/src/lib/kadm5/kadm_rpc_xdr.c
223
bool_t val;
crypto/krb5/src/lib/kadm5/kadm_rpc_xdr.c
227
if (!xdr_bool(xdrs, &val))
crypto/krb5/src/lib/kadm5/kadm_rpc_xdr.c
230
*kbool = (val == FALSE) ? FALSE : TRUE;
crypto/krb5/src/lib/kadm5/kadm_rpc_xdr.c
234
val = *kbool ? TRUE : FALSE;
crypto/krb5/src/lib/kadm5/kadm_rpc_xdr.c
235
return xdr_bool(xdrs, &val);
crypto/krb5/src/lib/kadm5/misc_free.c
12
kadm5_free_policy_ent(void *server_handle, kadm5_policy_ent_t val)
crypto/krb5/src/lib/kadm5/misc_free.c
18
if (val == NULL)
crypto/krb5/src/lib/kadm5/misc_free.c
21
free(val->policy);
crypto/krb5/src/lib/kadm5/misc_free.c
22
free(val->allowed_keysalts);
crypto/krb5/src/lib/kadm5/misc_free.c
23
for (; val->tl_data; val->tl_data = tl_next) {
crypto/krb5/src/lib/kadm5/misc_free.c
24
tl_next = val->tl_data->tl_data_next;
crypto/krb5/src/lib/kadm5/misc_free.c
25
free(val->tl_data->tl_data_contents);
crypto/krb5/src/lib/kadm5/misc_free.c
26
free(val->tl_data);
crypto/krb5/src/lib/kadm5/misc_free.c
28
memset(val, 0, sizeof(*val));
crypto/krb5/src/lib/kadm5/misc_free.c
74
kadm5_free_principal_ent(void *server_handle, kadm5_principal_ent_t val)
crypto/krb5/src/lib/kadm5/misc_free.c
82
if (!val)
crypto/krb5/src/lib/kadm5/misc_free.c
85
krb5_free_principal(handle->context, val->principal);
crypto/krb5/src/lib/kadm5/misc_free.c
86
krb5_free_principal(handle->context, val->mod_name);
crypto/krb5/src/lib/kadm5/misc_free.c
87
free(val->policy);
crypto/krb5/src/lib/kadm5/misc_free.c
88
if (val->n_key_data) {
crypto/krb5/src/lib/kadm5/misc_free.c
89
for (i = 0; i < val->n_key_data; i++)
crypto/krb5/src/lib/kadm5/misc_free.c
90
krb5_free_key_data_contents(handle->context, &val->key_data[i]);
crypto/krb5/src/lib/kadm5/misc_free.c
91
free(val->key_data);
crypto/krb5/src/lib/kadm5/misc_free.c
94
while (val->tl_data) {
crypto/krb5/src/lib/kadm5/misc_free.c
95
tl = val->tl_data->tl_data_next;
crypto/krb5/src/lib/kadm5/misc_free.c
96
free(val->tl_data->tl_data_contents);
crypto/krb5/src/lib/kadm5/misc_free.c
97
free(val->tl_data);
crypto/krb5/src/lib/kadm5/misc_free.c
98
val->tl_data = tl;
crypto/krb5/src/lib/kadm5/server_internal.h
165
osa_free_princ_ent(osa_princ_ent_t val);
crypto/krb5/src/lib/kadm5/srv/adb_xdr.c
100
osa_free_princ_ent(osa_princ_ent_t val)
crypto/krb5/src/lib/kadm5/srv/adb_xdr.c
106
xdr_osa_princ_ent_rec(&xdrs, val);
crypto/krb5/src/lib/kadm5/srv/adb_xdr.c
107
free(val);
crypto/krb5/src/lib/kdb/kdb5.c
135
krb5_dbe_free_key_list(krb5_context context, krb5_keylist_node *val)
crypto/krb5/src/lib/kdb/kdb5.c
137
krb5_keylist_node *temp = val, *prev;
crypto/krb5/src/lib/kdb/kdb5.c
148
krb5_dbe_free_actkvno_list(krb5_context context, krb5_actkvno_node *val)
crypto/krb5/src/lib/kdb/kdb5.c
150
krb5_actkvno_node *temp = val, *prev;
crypto/krb5/src/lib/kdb/kdb5.c
160
krb5_dbe_free_mkey_aux_list(krb5_context context, krb5_mkey_aux_node *val)
crypto/krb5/src/lib/kdb/kdb5.c
162
krb5_mkey_aux_node *temp = val, *prev;
crypto/krb5/src/lib/kdb/kdb5.c
2113
const char *key, *key_end, *val, *val_end;
crypto/krb5/src/lib/kdb/kdb5.c
2122
val = key_end + 1;
crypto/krb5/src/lib/kdb/kdb5.c
2123
val_end = memchr(val, '\0', end - val);
crypto/krb5/src/lib/kdb/kdb5.c
2128
*val_out = val;
crypto/krb5/src/lib/kdb/kdb5.c
2139
char *key = NULL, *val = NULL;
crypto/krb5/src/lib/kdb/kdb5.c
2156
val = strdup(mapval);
crypto/krb5/src/lib/kdb/kdb5.c
2157
if (key == NULL || val == NULL)
crypto/krb5/src/lib/kdb/kdb5.c
2160
strings[count].value = val;
crypto/krb5/src/lib/kdb/kdb5.c
2170
free(val);
crypto/krb5/src/lib/kdb/t_stringattr.c
46
char *val;
crypto/krb5/src/lib/kdb/t_stringattr.c
64
assert(krb5_dbe_get_string(context, ent, "foo", &val) == 0);
crypto/krb5/src/lib/kdb/t_stringattr.c
65
assert(val == NULL);
crypto/krb5/src/lib/kdb/t_stringattr.c
74
assert(krb5_dbe_get_string(context, ent, "price", &val) == 0);
crypto/krb5/src/lib/kdb/t_stringattr.c
75
assert(strcmp(val, "right") == 0);
crypto/krb5/src/lib/kdb/t_stringattr.c
76
krb5_dbe_free_string(context, val);
crypto/krb5/src/lib/kdb/t_stringattr.c
77
assert(krb5_dbe_get_string(context, ent, "time", &val) == 0);
crypto/krb5/src/lib/kdb/t_stringattr.c
78
assert(strcmp(val, "flies") == 0);
crypto/krb5/src/lib/kdb/t_stringattr.c
79
krb5_dbe_free_string(context, val);
crypto/krb5/src/lib/kdb/t_stringattr.c
80
assert(krb5_dbe_get_string(context, ent, "eggs", &val) == 0);
crypto/krb5/src/lib/kdb/t_stringattr.c
81
assert(val == NULL);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1003
free_atype(choice->options[count], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1004
free_atype_ptr(choice->options[count], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1014
free_sequence(const struct seq_info *seq, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1019
free_atype(seq->fields[i], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1021
free_atype_ptr(seq->fields[i], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1025
free_sequence_of(const struct atype_info *eltinfo, void *val, size_t count)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1031
eltptr = (char *)val + count * eltinfo->size;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
104
k5_asn1_encode_bytestring(asn1buf *buf, uint8_t *const *val, size_t len)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
106
if (len > 0 && val == NULL)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
108
insert_bytes(buf, *val, len);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1121
const struct cntype_info *c, void *val, size_t *count_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1127
void *val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
113
k5_asn1_encode_generaltime(asn1buf *buf, time_t val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1137
const struct atype_info *a, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1145
return fn->dec(t, asn1, len, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1148
return decode_sequence(asn1, len, a->tinfo, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1151
void *ptr = LOADPTR(val, ptrinfo);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1160
STOREPTR(ptr, ptrinfo, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1168
(char *)val + off->dataoff);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
117
time_t gmt_time = val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1172
return decode_atype(t, asn1, len, opt->basetype, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1176
void *dataptr = (char *)val + counted->dataoff;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1182
return store_count(count, counted, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1200
return decode_atype(tp, asn1, len, tag->basetype, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1207
return store_int(intval, a->size, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1214
return store_int(intval, a->size, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1221
return store_uint(intval, a->size, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1229
if (intval != imm->val && imm->err != 0)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1253
const struct cntype_info *c, void *val, size_t *count_out)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1261
return string->dec(asn1, len, val, count_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1264
return store_der(t, asn1, len, val, count_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1274
STOREPTR(seq, ptrinfo, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1282
ret = decode_atype(t, asn1, len, choice->options[i], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1362
omit_atype(const struct atype_info *a, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1378
return omit_atype(ptrinfo->basetype, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1382
return omit_atype(off->basetype, (char *)val + off->dataoff);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1386
return omit_atype(tag->basetype, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1391
opt->init(val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1402
void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1426
ret = omit_atype(seq->fields[i], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1434
ret = decode_atype(&t, contents, clen, seq->fields[i], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1441
ret = omit_atype(seq->fields[i], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1451
free_atype(seq->fields[j], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1453
free_atype_ptr(seq->fields[j], val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1505
k5_asn1_encode_atype(asn1buf *buf, const void *val, const struct atype_info *a,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1508
return encode_atype(buf, val, a, tag_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1513
const struct atype_info *a, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
1515
return decode_atype(t, asn1, len, a, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
165
k5_asn1_encode_bitstring(asn1buf *buf, uint8_t *const *val, size_t len)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
167
insert_bytes(buf, *val, len);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
175
k5_asn1_decode_bool(const uint8_t *asn1, size_t len, intmax_t *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
179
*val = (*asn1 != 0);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
186
k5_asn1_decode_int(const uint8_t *asn1, size_t len, intmax_t *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
199
*val = n;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
206
k5_asn1_decode_uint(const uint8_t *asn1, size_t len, uintmax_t *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
218
*val = n;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
461
encode_sequence_of(asn1buf *buf, size_t seqlen, const void *val,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
465
encode_nullterm_sequence_of(asn1buf *buf, const void *val,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
468
size_t len = get_nullterm_sequence_len(val, type);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
472
return encode_sequence_of(buf, len, val, type);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
476
load_int(const void *val, size_t size)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
479
case 1: return *(int8_t *)val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
480
case 2: return *(int16_t *)val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
481
case 4: return *(int32_t *)val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
482
case 8: return *(int64_t *)val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
488
load_uint(const void *val, size_t size)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
491
case 1: return *(uint8_t *)val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
492
case 2: return *(uint16_t *)val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
493
case 4: return *(uint32_t *)val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
494
case 8: return *(uint64_t *)val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
500
load_count(const void *val, const struct counted_info *counted,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
503
const void *countptr = (const char *)val + counted->lenoff;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
521
store_int(intmax_t intval, size_t size, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
527
*(int8_t *)val = intval;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
532
*(int16_t *)val = intval;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
537
*(int32_t *)val = intval;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
542
*(int64_t *)val = intval;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
550
store_uint(uintmax_t intval, size_t size, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
556
*(uint8_t *)val = intval;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
561
*(uint16_t *)val = intval;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
566
*(uint32_t *)val = intval;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
571
*(uint64_t *)val = intval;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
581
store_count(size_t count, const struct counted_info *counted, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
583
void *countptr = (char *)val + counted->lenoff;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
60
k5_asn1_encode_bool(asn1buf *buf, intmax_t val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
62
insert_byte(buf, val ? 0xFF : 0x00);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
620
store_der(const taginfo *t, const uint8_t *asn1, size_t len, void *val,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
632
*(uint8_t **)val = der;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
638
encode_sequence(asn1buf *buf, const void *val, const struct seq_info *seq);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
640
encode_cntype(asn1buf *buf, const void *val, size_t len,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
646
encode_atype(asn1buf *buf, const void *val, const struct atype_info *a,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
651
if (val == NULL)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
658
return fn->enc(buf, val, tag_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
66
k5_asn1_encode_int(asn1buf *buf, intmax_t val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
662
ret = encode_sequence(buf, val, a->tinfo);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
672
return encode_atype(buf, LOADPTR(val, ptr), ptr->basetype, tag_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
677
return encode_atype(buf, (const char *)val + off->dataoff,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
683
if (opt->is_present(val))
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
684
return encode_atype(buf, val, opt->basetype, tag_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
690
const void *dataptr = (const char *)val + counted->dataoff;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
693
ret = load_count(val, counted, &count);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
701
ret = encode_nullterm_sequence_of(buf, val, a->tinfo,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
71
valcopy = val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
713
ret = encode_atype(buf, val, tag->basetype, tag_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
727
k5_asn1_encode_bool(buf, load_int(val, a->size));
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
733
k5_asn1_encode_int(buf, load_int(val, a->size));
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
739
k5_asn1_encode_uint(buf, load_uint(val, a->size));
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
746
k5_asn1_encode_int(buf, imm->val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
762
encode_atype_and_tag(asn1buf *buf, const void *val, const struct atype_info *a)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
768
ret = encode_atype(buf, val, a, &t);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
783
encode_cntype(asn1buf *buf, const void *val, size_t count,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
79
if (val > 0 && (digit & 0x80) == 0x80)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
792
ret = string->enc(buf, val, count);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
801
return split_der(buf, val, count, tag_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
806
val = LOADPTR(val, ptr);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
807
ret = encode_sequence_of(buf, count, val, ptr->basetype);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
81
else if (val < 0 && (digit & 0x80) != 0x80)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
819
return encode_atype(buf, val, choice->options[count], tag_out);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
832
encode_sequence(asn1buf *buf, const void *val, const struct seq_info *seq)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
838
ret = encode_atype_and_tag(buf, val, seq->fields[i - 1]);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
848
encode_sequence_of(asn1buf *buf, size_t seqlen, const void *val,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
857
eltptr = (const char *)val + (i - 1) * eltinfo->size;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
86
k5_asn1_encode_uint(asn1buf *buf, uintmax_t val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
867
static void free_atype_ptr(const struct atype_info *a, void *val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
868
static void free_sequence(const struct seq_info *seq, void *val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
869
static void free_sequence_of(const struct atype_info *eltinfo, void *val,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
871
static void free_cntype(const struct cntype_info *a, void *val, size_t count);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
879
free_atype(const struct atype_info *a, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
885
fn->free_func(val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
889
free_sequence(a->tinfo, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
893
void *ptr = LOADPTR(val, ptrinfo);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
903
free_atype(off->basetype, (char *)val + off->dataoff);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
908
free_atype(opt->basetype, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
91
valcopy = val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
913
void *dataptr = (char *)val + counted->dataoff;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
915
if (load_count(val, counted, &count) == 0)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
921
size_t count = get_nullterm_sequence_len(val, a->tinfo);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
922
free_sequence_of(a->tinfo, val, count);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
927
free_atype(tag->basetype, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
941
free_atype_ptr(const struct atype_info *a, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
956
void *ptr = LOADPTR(val, ptrinfo);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
958
STOREPTR(NULL, ptrinfo, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
964
free_atype_ptr(off->basetype, (char *)val + off->dataoff);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
969
free_atype_ptr(opt->basetype, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
974
free_atype_ptr(tag->basetype, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
983
free_cntype(const struct cntype_info *c, void *val, size_t count)
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
988
free(*(char **)val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
989
*(char **)val = NULL;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
994
void *seqptr = LOADPTR(val, ptrinfo);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.c
997
STOREPTR(NULL, ptrinfo, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
184
intmax_t val;
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
326
aux_storeptr_##DESCNAME(void *ptr, void *val) \
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
328
*(aux_type_##DESCNAME *)val = ptr; \
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
393
const aux_type_##BASEDESC *val = p; \
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
394
return (*val != NULL && **val != NULL); \
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
48
void k5_asn1_encode_bool(asn1buf *buf, intmax_t val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
49
void k5_asn1_encode_int(asn1buf *buf, intmax_t val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
50
void k5_asn1_encode_uint(asn1buf *buf, uintmax_t val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
51
krb5_error_code k5_asn1_encode_bytestring(asn1buf *buf, uint8_t *const *val,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
525
k5_asn1_encode_atype(asn1buf *buf, const void *val, const struct atype_info *a,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
53
krb5_error_code k5_asn1_encode_bitstring(asn1buf *buf, uint8_t *const *val,
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
532
const struct atype_info *a, void *val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
55
krb5_error_code k5_asn1_encode_generaltime(asn1buf *buf, time_t val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
60
intmax_t *val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
62
intmax_t *val);
crypto/krb5/src/lib/krb5/asn.1/asn1_encode.h
64
uintmax_t *val);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
126
uint32_t val = *(uint32_t *)p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
130
k5_asn1_encode_uint(buf, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
137
intmax_t val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
138
ret = k5_asn1_decode_int(asn1, len, &val);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
141
if (val < INT32_MIN || val > 0xFFFFFFFF)
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
144
*(uint32_t *)p = val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
161
time_t val = ts2tt(*(krb5_timestamp *)p);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
165
return k5_asn1_encode_generaltime(buf, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
172
time_t val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
173
ret = k5_asn1_decode_generaltime(asn1, len, &val);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
176
*(krb5_timestamp *)p = val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
224
const krb5_enc_data *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
225
return (val->ciphertext.data != NULL);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
242
decode_krb5_flags(const taginfo *t, const uint8_t *asn1, size_t len, void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
254
*(krb5_flags *)val = f;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
320
int32_t val = *(int32_t *)p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
324
k5_asn1_encode_int(buf, val);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
331
intmax_t val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
332
ret = k5_asn1_decode_int(asn1, len, &val);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
335
if (val > INT32_MAX || val < INT32_MIN)
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
337
*(int32_t *)p = val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
392
const krb5_enc_kdc_rep_part *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
393
return (val->times.starttime != 0);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
398
krb5_enc_kdc_rep_part *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
399
val->times.starttime = val->times.authtime;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
404
const krb5_enc_kdc_rep_part *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
405
return (val->flags & TKT_FLG_RENEWABLE);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
472
const krb5_kdc_req *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
474
h.v = *val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
475
if (val->kdc_options & KDC_OPT_ENC_TKT_IN_SKEY) {
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
476
if (val->second_ticket != NULL && val->second_ticket[0] != NULL)
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
477
h.server_realm = val->second_ticket[0]->server->realm;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
480
} else if (val->server != NULL)
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
481
h.server_realm = val->server->realm;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
487
free_kdc_req_body(void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
489
krb5_kdc_req *req = val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
499
void *val)
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
503
krb5_kdc_req *b = val;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
557
const krb5_safe *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
558
return (val->timestamp != 0);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
59
const krb5_data *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
60
return (val->data != NULL && val->length != 0);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
600
const krb5_etype_info_entry *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
601
return (val->length != KRB5_ETYPE_NO_SALT);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
606
krb5_etype_info_entry *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
607
val->length = KRB5_ETYPE_NO_SALT;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
858
const krb5_priv_enc_part *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
859
return (val->timestamp != 0);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
891
const krb5_cred_enc_part *val = p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
892
return (val->timestamp != 0);
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
965
krb5_const_principal val = *(krb5_const_principal *)p;
crypto/krb5/src/lib/krb5/asn.1/asn1_k_encode.c
966
return (val->length != 0);
crypto/krb5/src/lib/krb5/asn.1/ldap_key_seq.c
63
const krb5_key_data *val = p;
crypto/krb5/src/lib/krb5/asn.1/ldap_key_seq.c
64
return (val->key_data_length[1] != 0);
crypto/krb5/src/lib/krb5/asn.1/ldap_key_seq.c
87
const krb5_key_data *val = p;
crypto/krb5/src/lib/krb5/asn.1/ldap_key_seq.c
88
return val->key_data_ver > 1;
crypto/krb5/src/lib/krb5/asn.1/ldap_key_seq.c
93
krb5_key_data *val = p;
crypto/krb5/src/lib/krb5/asn.1/ldap_key_seq.c
94
val->key_data_ver = 1;
crypto/krb5/src/lib/krb5/krb/authdata.c
1275
krb5_free_authdata(krb5_context context, krb5_authdata **val)
crypto/krb5/src/lib/krb5/krb/authdata.c
1279
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/authdata.c
1281
for (temp = val; *temp; temp++) {
crypto/krb5/src/lib/krb5/krb/authdata.c
1285
free(val);
crypto/krb5/src/lib/krb5/krb/deltat.c
1237
{ (yyval.val) = - (yyvsp[0].val); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1243
{ (yyval.val) = (yyvsp[0].val); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1255
{ DO ((yyvsp[-2].val), 0, 0, (yyvsp[0].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1261
{ DO ( 0, (yyvsp[-2].val), 0, (yyvsp[0].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1267
{ DO ( 0, 0, (yyvsp[-2].val), (yyvsp[0].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1273
{ DO ( 0, 0, 0, (yyvsp[-1].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1279
{ DO ((yyvsp[-6].val), (yyvsp[-4].val), (yyvsp[-2].val), (yyvsp[0].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1285
{ DO ( 0, (yyvsp[-4].val), (yyvsp[-2].val), (yyvsp[0].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1291
{ DO ( 0, (yyvsp[-2].val), (yyvsp[0].val), 0); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1297
{ DO ( 0, 0, 0, (yyvsp[0].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1303
{ if (HOUR_NOT_OK((yyvsp[-2].val))) YYERROR;
crypto/krb5/src/lib/krb5/krb/deltat.c
1304
DO_SUM((yyval.val), (yyvsp[-2].val) * 3600, (yyvsp[0].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1310
{ if (MIN_NOT_OK((yyvsp[-2].val))) YYERROR;
crypto/krb5/src/lib/krb5/krb/deltat.c
1311
DO_SUM((yyval.val), (yyvsp[-2].val) * 60, (yyvsp[0].val)); }
crypto/krb5/src/lib/krb5/krb/deltat.c
1317
{ (yyval.val) = 0; }
crypto/krb5/src/lib/krb5/krb/deltat.c
153
#define yylex(U, P) mylex (&(U)->val, (P))
crypto/krb5/src/lib/krb5/krb/deltat.c
215
int val;
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1178
k5_json_value val;
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1201
code = k5_json_decode(encoded, &val);
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1205
if (k5_json_get_tid(val) != K5_JSON_TID_OBJECT) {
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1206
k5_json_release(val);
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1209
ctx->cc_config_in = val;
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1241
int val;
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1243
val = k5_gic_opt_pac_request(ctx->opt);
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1244
if (val == -1)
crypto/krb5/src/lib/krb5/krb/get_in_tkt.c
1247
pac_req.include_pac = val;
crypto/krb5/src/lib/krb5/krb/init_ctx.c
535
krb5_free_enctypes(krb5_context context, krb5_enctype *val)
crypto/krb5/src/lib/krb5/krb/init_ctx.c
537
free (val);
crypto/krb5/src/lib/krb5/krb/kfree.c
100
krb5_free_ap_rep_enc_part(krb5_context context, krb5_ap_rep_enc_part *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
102
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
104
krb5_free_keyblock(context, val->subkey);
crypto/krb5/src/lib/krb5/krb/kfree.c
105
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
109
krb5_free_authenticator_contents(krb5_context context, krb5_authenticator *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
111
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
113
krb5_free_checksum(context, val->checksum);
crypto/krb5/src/lib/krb5/krb/kfree.c
114
val->checksum = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
115
krb5_free_principal(context, val->client);
crypto/krb5/src/lib/krb5/krb/kfree.c
116
val->client = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
117
krb5_free_keyblock(context, val->subkey);
crypto/krb5/src/lib/krb5/krb/kfree.c
118
val->subkey = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
119
krb5_free_authdata(context, val->authorization_data);
crypto/krb5/src/lib/krb5/krb/kfree.c
120
val->authorization_data = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
124
krb5_free_authenticator(krb5_context context, krb5_authenticator *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
126
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
128
krb5_free_authenticator_contents(context, val);
crypto/krb5/src/lib/krb5/krb/kfree.c
129
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
133
krb5_free_checksum(krb5_context context, krb5_checksum *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
135
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
137
krb5_free_checksum_contents(context, val);
crypto/krb5/src/lib/krb5/krb/kfree.c
138
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
142
krb5_free_checksum_contents(krb5_context context, krb5_checksum *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
144
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
146
free(val->contents);
crypto/krb5/src/lib/krb5/krb/kfree.c
147
val->contents = NULL;
crypto/krb5/src/lib/krb5/krb/kfree.c
148
val->length = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
152
krb5_free_cred(krb5_context context, krb5_cred *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
154
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
156
krb5_free_tickets(context, val->tickets);
crypto/krb5/src/lib/krb5/krb/kfree.c
157
free(val->enc_part.ciphertext.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
158
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
167
krb5_free_cred_contents(krb5_context context, krb5_creds *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
169
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
171
krb5_free_principal(context, val->client);
crypto/krb5/src/lib/krb5/krb/kfree.c
172
val->client = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
173
krb5_free_principal(context, val->server);
crypto/krb5/src/lib/krb5/krb/kfree.c
174
val->server = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
175
krb5_free_keyblock_contents(context, &val->keyblock);
crypto/krb5/src/lib/krb5/krb/kfree.c
176
free(val->ticket.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
177
val->ticket.data = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
178
free(val->second_ticket.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
179
val->second_ticket.data = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
180
krb5_free_addresses(context, val->addresses);
crypto/krb5/src/lib/krb5/krb/kfree.c
181
val->addresses = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
182
krb5_free_authdata(context, val->authdata);
crypto/krb5/src/lib/krb5/krb/kfree.c
183
val->authdata = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
187
krb5_free_cred_enc_part(krb5_context context, krb5_cred_enc_part *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
191
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
193
krb5_free_address(context, val->r_address);
crypto/krb5/src/lib/krb5/krb/kfree.c
194
val->r_address = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
195
krb5_free_address(context, val->s_address);
crypto/krb5/src/lib/krb5/krb/kfree.c
196
val->s_address = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
198
if (val->ticket_info) {
crypto/krb5/src/lib/krb5/krb/kfree.c
199
for (temp = val->ticket_info; *temp; temp++) {
crypto/krb5/src/lib/krb5/krb/kfree.c
206
free(val->ticket_info);
crypto/krb5/src/lib/krb5/krb/kfree.c
207
val->ticket_info = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
213
krb5_free_creds(krb5_context context, krb5_creds *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
215
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
217
krb5_free_cred_contents(context, val);
crypto/krb5/src/lib/krb5/krb/kfree.c
218
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
223
krb5_free_data(krb5_context context, krb5_data *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
225
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
227
free(val->data);
crypto/krb5/src/lib/krb5/krb/kfree.c
228
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
233
krb5_free_octet_data(krb5_context context, krb5_octet_data *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
235
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
237
free(val->data);
crypto/krb5/src/lib/krb5/krb/kfree.c
238
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
242
krb5_free_data_contents(krb5_context context, krb5_data *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
244
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
246
free(val->data);
crypto/krb5/src/lib/krb5/krb/kfree.c
247
val->data = NULL;
crypto/krb5/src/lib/krb5/krb/kfree.c
248
val->length = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
252
krb5_free_enc_data(krb5_context context, krb5_enc_data *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
254
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
256
krb5_free_data_contents(context, &val->ciphertext);
crypto/krb5/src/lib/krb5/krb/kfree.c
257
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
276
krb5_free_enc_kdc_rep_part(krb5_context context, krb5_enc_kdc_rep_part *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
278
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
280
krb5_free_keyblock(context, val->session);
crypto/krb5/src/lib/krb5/krb/kfree.c
281
krb5_free_last_req(context, val->last_req);
crypto/krb5/src/lib/krb5/krb/kfree.c
282
krb5_free_principal(context, val->server);
crypto/krb5/src/lib/krb5/krb/kfree.c
283
krb5_free_addresses(context, val->caddrs);
crypto/krb5/src/lib/krb5/krb/kfree.c
284
krb5_free_pa_data(context, val->enc_padata);
crypto/krb5/src/lib/krb5/krb/kfree.c
285
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
289
krb5_free_enc_tkt_part(krb5_context context, krb5_enc_tkt_part *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
291
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
293
krb5_free_keyblock(context, val->session);
crypto/krb5/src/lib/krb5/krb/kfree.c
294
krb5_free_principal(context, val->client);
crypto/krb5/src/lib/krb5/krb/kfree.c
295
free(val->transited.tr_contents.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
296
krb5_free_addresses(context, val->caddrs);
crypto/krb5/src/lib/krb5/krb/kfree.c
297
krb5_free_authdata(context, val->authorization_data);
crypto/krb5/src/lib/krb5/krb/kfree.c
298
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
303
krb5_free_error(krb5_context context, krb5_error *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
305
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
307
krb5_free_principal(context, val->client);
crypto/krb5/src/lib/krb5/krb/kfree.c
308
krb5_free_principal(context, val->server);
crypto/krb5/src/lib/krb5/krb/kfree.c
309
free(val->text.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
310
free(val->e_data.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
311
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
315
krb5_free_kdc_rep(krb5_context context, krb5_kdc_rep *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
317
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
319
krb5_free_pa_data(context, val->padata);
crypto/krb5/src/lib/krb5/krb/kfree.c
320
krb5_free_principal(context, val->client);
crypto/krb5/src/lib/krb5/krb/kfree.c
321
krb5_free_ticket(context, val->ticket);
crypto/krb5/src/lib/krb5/krb/kfree.c
322
free(val->enc_part.ciphertext.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
323
krb5_free_enc_kdc_rep_part(context, val->enc_part2);
crypto/krb5/src/lib/krb5/krb/kfree.c
324
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
329
krb5_free_kdc_req(krb5_context context, krb5_kdc_req *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
331
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
333
krb5_free_pa_data(context, val->padata);
crypto/krb5/src/lib/krb5/krb/kfree.c
334
krb5_free_principal(context, val->client);
crypto/krb5/src/lib/krb5/krb/kfree.c
335
krb5_free_principal(context, val->server);
crypto/krb5/src/lib/krb5/krb/kfree.c
336
free(val->ktype);
crypto/krb5/src/lib/krb5/krb/kfree.c
337
krb5_free_addresses(context, val->addresses);
crypto/krb5/src/lib/krb5/krb/kfree.c
338
free(val->authorization_data.ciphertext.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
339
krb5_free_authdata(context, val->unenc_authdata);
crypto/krb5/src/lib/krb5/krb/kfree.c
340
krb5_free_tickets(context, val->second_ticket);
crypto/krb5/src/lib/krb5/krb/kfree.c
341
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
351
krb5_free_keyblock(krb5_context context, krb5_keyblock *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
353
krb5int_c_free_keyblock (context, val);
crypto/krb5/src/lib/krb5/krb/kfree.c
359
krb5_free_last_req(krb5_context context, krb5_last_req_entry **val)
crypto/krb5/src/lib/krb5/krb/kfree.c
363
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
365
for (temp = val; *temp; temp++)
crypto/krb5/src/lib/krb5/krb/kfree.c
367
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
371
k5_zapfree_pa_data(krb5_pa_data **val)
crypto/krb5/src/lib/krb5/krb/kfree.c
375
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
377
for (pa = val; *pa != NULL; pa++) {
crypto/krb5/src/lib/krb5/krb/kfree.c
381
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
385
krb5_free_pa_data(krb5_context context, krb5_pa_data **val)
crypto/krb5/src/lib/krb5/krb/kfree.c
389
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
391
for (temp = val; *temp; temp++) {
crypto/krb5/src/lib/krb5/krb/kfree.c
395
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
399
krb5_free_principal(krb5_context context, krb5_principal val)
crypto/krb5/src/lib/krb5/krb/kfree.c
403
if (!val)
crypto/krb5/src/lib/krb5/krb/kfree.c
406
if (val->data) {
crypto/krb5/src/lib/krb5/krb/kfree.c
407
i = val->length;
crypto/krb5/src/lib/krb5/krb/kfree.c
409
free(val->data[i].data);
crypto/krb5/src/lib/krb5/krb/kfree.c
410
free(val->data);
crypto/krb5/src/lib/krb5/krb/kfree.c
412
free(val->realm.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
413
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
417
krb5_free_priv(krb5_context context, krb5_priv *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
419
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
421
free(val->enc_part.ciphertext.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
422
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
426
krb5_free_priv_enc_part(krb5_context context, krb5_priv_enc_part *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
428
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
430
free(val->user_data.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
431
krb5_free_address(context, val->r_address);
crypto/krb5/src/lib/krb5/krb/kfree.c
432
krb5_free_address(context, val->s_address);
crypto/krb5/src/lib/krb5/krb/kfree.c
433
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
437
krb5_free_safe(krb5_context context, krb5_safe *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
439
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
441
free(val->user_data.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
442
krb5_free_address(context, val->r_address);
crypto/krb5/src/lib/krb5/krb/kfree.c
443
krb5_free_address(context, val->s_address);
crypto/krb5/src/lib/krb5/krb/kfree.c
444
krb5_free_checksum(context, val->checksum);
crypto/krb5/src/lib/krb5/krb/kfree.c
445
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
450
krb5_free_ticket(krb5_context context, krb5_ticket *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
452
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
454
krb5_free_principal(context, val->server);
crypto/krb5/src/lib/krb5/krb/kfree.c
455
free(val->enc_part.ciphertext.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
456
krb5_free_enc_tkt_part(context, val->enc_part2);
crypto/krb5/src/lib/krb5/krb/kfree.c
457
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
461
krb5_free_tickets(krb5_context context, krb5_ticket **val)
crypto/krb5/src/lib/krb5/krb/kfree.c
465
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
467
for (temp = val; *temp; temp++)
crypto/krb5/src/lib/krb5/krb/kfree.c
469
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
485
krb5_free_tkt_authent(krb5_context context, krb5_tkt_authent *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
487
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
489
krb5_free_ticket(context, val->ticket);
crypto/krb5/src/lib/krb5/krb/kfree.c
490
krb5_free_authenticator(context, val->authenticator);
crypto/krb5/src/lib/krb5/krb/kfree.c
491
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
495
krb5_free_unparsed_name(krb5_context context, char *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
497
if (val != NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
498
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
502
krb5_free_string(krb5_context context, char *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
504
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
58
krb5_free_address(krb5_context context, krb5_address *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
60
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
62
free(val->contents);
crypto/krb5/src/lib/krb5/krb/kfree.c
63
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
659
krb5_free_fast_req(krb5_context context, krb5_fast_req *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
661
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
663
krb5_free_kdc_req(context, val->req_body);
crypto/krb5/src/lib/krb5/krb/kfree.c
664
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
668
krb5_free_fast_armor(krb5_context context, krb5_fast_armor *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
67
krb5_free_addresses(krb5_context context, krb5_address **val)
crypto/krb5/src/lib/krb5/krb/kfree.c
670
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
672
krb5_free_data_contents(context, &val->armor_value);
crypto/krb5/src/lib/krb5/krb/kfree.c
673
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
677
krb5_free_fast_response(krb5_context context, krb5_fast_response *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
679
if (!val)
crypto/krb5/src/lib/krb5/krb/kfree.c
681
krb5_free_pa_data(context, val->padata);
crypto/krb5/src/lib/krb5/krb/kfree.c
682
krb5_free_fast_finished(context, val->finished);
crypto/krb5/src/lib/krb5/krb/kfree.c
683
krb5_free_keyblock(context, val->strengthen_key);
crypto/krb5/src/lib/krb5/krb/kfree.c
684
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
688
krb5_free_fast_finished(krb5_context context, krb5_fast_finished *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
690
if (!val)
crypto/krb5/src/lib/krb5/krb/kfree.c
692
krb5_free_principal(context, val->client);
crypto/krb5/src/lib/krb5/krb/kfree.c
693
krb5_free_checksum_contents(context, &val->ticket_checksum);
crypto/krb5/src/lib/krb5/krb/kfree.c
694
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
698
krb5_free_fast_armored_req(krb5_context context, krb5_fast_armored_req *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
700
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
702
if (val->armor)
crypto/krb5/src/lib/krb5/krb/kfree.c
703
krb5_free_fast_armor(context, val->armor);
crypto/krb5/src/lib/krb5/krb/kfree.c
704
krb5_free_data_contents(context, &val->enc_part.ciphertext);
crypto/krb5/src/lib/krb5/krb/kfree.c
705
if (val->req_checksum.contents)
crypto/krb5/src/lib/krb5/krb/kfree.c
706
krb5_free_checksum_contents(context, &val->req_checksum);
crypto/krb5/src/lib/krb5/krb/kfree.c
707
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
71
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
73
for (temp = val; *temp; temp++) {
crypto/krb5/src/lib/krb5/krb/kfree.c
735
krb5_free_ad_kdcissued(krb5_context context, krb5_ad_kdcissued *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
737
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
740
krb5_free_checksum_contents(context, &val->ad_checksum);
crypto/krb5/src/lib/krb5/krb/kfree.c
741
krb5_free_principal(context, val->i_principal);
crypto/krb5/src/lib/krb5/krb/kfree.c
742
krb5_free_authdata(context, val->elements);
crypto/krb5/src/lib/krb5/krb/kfree.c
743
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
747
krb5_free_iakerb_header(krb5_context context, krb5_iakerb_header *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
749
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
752
krb5_free_data_contents(context, &val->target_realm);
crypto/krb5/src/lib/krb5/krb/kfree.c
753
krb5_free_data(context, val->cookie);
crypto/krb5/src/lib/krb5/krb/kfree.c
754
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
758
krb5_free_iakerb_finished(krb5_context context, krb5_iakerb_finished *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
760
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
763
krb5_free_checksum_contents(context, &val->checksum);
crypto/krb5/src/lib/krb5/krb/kfree.c
764
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
769
krb5_algorithm_identifier *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
77
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
771
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
773
free(val->algorithm.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
774
free(val->parameters.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
775
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
779
k5_free_otp_tokeninfo(krb5_context context, krb5_otp_tokeninfo *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
783
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
785
free(val->vendor.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
786
free(val->challenge.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
787
free(val->token_id.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
788
free(val->alg_id.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
789
for (alg = val->supported_hash_alg; alg != NULL && *alg != NULL; alg++)
crypto/krb5/src/lib/krb5/krb/kfree.c
791
free(val->supported_hash_alg);
crypto/krb5/src/lib/krb5/krb/kfree.c
792
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
796
k5_free_pa_otp_challenge(krb5_context context, krb5_pa_otp_challenge *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
800
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
802
free(val->nonce.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
803
free(val->service.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
804
for (ti = val->tokeninfo; *ti != NULL; ti++)
crypto/krb5/src/lib/krb5/krb/kfree.c
806
free(val->tokeninfo);
crypto/krb5/src/lib/krb5/krb/kfree.c
807
free(val->salt.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
808
free(val->s2kparams.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
809
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
81
krb5_free_ap_rep(krb5_context context, krb5_ap_rep *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
813
k5_free_pa_otp_req(krb5_context context, krb5_pa_otp_req *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
815
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
817
val->flags = 0;
crypto/krb5/src/lib/krb5/krb/kfree.c
818
free(val->nonce.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
819
free(val->enc_data.ciphertext.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
820
if (val->hash_alg != NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
821
k5_free_algorithm_identifier(context, val->hash_alg);
crypto/krb5/src/lib/krb5/krb/kfree.c
822
free(val->otp_value.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
823
free(val->pin.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
824
free(val->challenge.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
825
free(val->counter.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
826
free(val->token_id.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
827
free(val->alg_id.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
828
free(val->vendor.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
829
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
83
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
833
k5_free_kkdcp_message(krb5_context context, krb5_kkdcp_message *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
835
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
837
free(val->target_domain.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
838
free(val->kerb_message.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
839
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
843
free_vmac(krb5_context context, krb5_verifier_mac *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
845
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
847
krb5_free_principal(context, val->princ);
crypto/krb5/src/lib/krb5/krb/kfree.c
848
krb5_free_checksum_contents(context, &val->checksum);
crypto/krb5/src/lib/krb5/krb/kfree.c
849
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
85
free(val->enc_part.ciphertext.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
853
k5_free_cammac(krb5_context context, krb5_cammac *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
857
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
859
krb5_free_authdata(context, val->elements);
crypto/krb5/src/lib/krb5/krb/kfree.c
86
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
860
free_vmac(context, val->kdc_verifier);
crypto/krb5/src/lib/krb5/krb/kfree.c
861
free_vmac(context, val->svc_verifier);
crypto/krb5/src/lib/krb5/krb/kfree.c
862
for (vp = val->other_verifiers; vp != NULL && *vp != NULL; vp++)
crypto/krb5/src/lib/krb5/krb/kfree.c
864
free(val->other_verifiers);
crypto/krb5/src/lib/krb5/krb/kfree.c
865
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
869
k5_free_secure_cookie(krb5_context context, krb5_secure_cookie *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
871
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
873
k5_zapfree_pa_data(val->data);
crypto/krb5/src/lib/krb5/krb/kfree.c
874
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
878
k5_free_spake_factor(krb5_context context, krb5_spake_factor *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
880
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
882
if (val->data != NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
883
zapfree(val->data->data, val->data->length);
crypto/krb5/src/lib/krb5/krb/kfree.c
884
free(val->data);
crypto/krb5/src/lib/krb5/krb/kfree.c
885
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
889
k5_free_pa_spake(krb5_context context, krb5_pa_spake *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
893
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
895
switch (val->choice) {
crypto/krb5/src/lib/krb5/krb/kfree.c
897
free(val->u.support.groups);
crypto/krb5/src/lib/krb5/krb/kfree.c
90
krb5_free_ap_req(krb5_context context, krb5_ap_req *val)
crypto/krb5/src/lib/krb5/krb/kfree.c
900
krb5_free_data_contents(context, &val->u.challenge.pubkey);
crypto/krb5/src/lib/krb5/krb/kfree.c
901
for (f = val->u.challenge.factors; f != NULL && *f != NULL; f++)
crypto/krb5/src/lib/krb5/krb/kfree.c
903
free(val->u.challenge.factors);
crypto/krb5/src/lib/krb5/krb/kfree.c
906
krb5_free_data_contents(context, &val->u.response.pubkey);
crypto/krb5/src/lib/krb5/krb/kfree.c
907
krb5_free_data_contents(context, &val->u.response.factor.ciphertext);
crypto/krb5/src/lib/krb5/krb/kfree.c
910
krb5_free_data_contents(context, &val->u.encdata.ciphertext);
crypto/krb5/src/lib/krb5/krb/kfree.c
915
free(val);
crypto/krb5/src/lib/krb5/krb/kfree.c
92
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/kfree.c
94
krb5_free_ticket(context, val->ticket);
crypto/krb5/src/lib/krb5/krb/kfree.c
95
free(val->authenticator.ciphertext.data);
crypto/krb5/src/lib/krb5/krb/kfree.c
96
free(val);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
116
k5_json_value val;
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
118
val = k5_json_object_get(obj, key);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
119
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
122
if (k5_json_get_tid(val) != K5_JSON_TID_NUMBER)
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
125
*int32 = k5_json_number_value(val);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
380
k5_json_value val = NULL;
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
388
retval = k5_json_decode(answer, &val);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
392
if (k5_json_get_tid(val) != K5_JSON_TID_OBJECT)
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
395
retval = codec_value_to_int32(val, "tokeninfo", &indx);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
401
retval = codec_value_to_data(val, "value", &tmp);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
405
retval = codec_value_to_data(val, "pin", pin);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
420
k5_json_release(val);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
60
k5_json_value val;
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
63
val = k5_json_object_get(obj, key);
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
64
if (val == NULL)
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
67
if (k5_json_get_tid(val) != K5_JSON_TID_STRING)
crypto/krb5/src/lib/krb5/krb/preauth_otp.c
70
str = strdup(k5_json_string_utf8(val));
crypto/krb5/src/lib/krb5/krb/preauth_pkinit.c
47
get_one_challenge(void *arg, const char *key, k5_json_value val)
crypto/krb5/src/lib/krb5/krb/preauth_pkinit.c
56
if (k5_json_get_tid(val) != K5_JSON_TID_NUMBER) {
crypto/krb5/src/lib/krb5/krb/preauth_pkinit.c
61
token_flags = k5_json_number_value(val);
crypto/krb5/src/lib/krb5/krb/vfy_increds.c
42
int val;
crypto/krb5/src/lib/krb5/krb/vfy_increds.c
49
&val) == 0)
crypto/krb5/src/lib/krb5/krb/vfy_increds.c
50
return (val != 0);
crypto/krb5/src/lib/krb5/krb/x-deltat.y
120
#define yylex(U, P) mylex (&(U)->val, (P))
crypto/krb5/src/lib/krb5/krb/x-deltat.y
129
%union {int val;}
crypto/krb5/src/lib/krb5/krb/x-deltat.y
134
%token <val> tok_NUM tok_LONGNUM tok_OVERFLOW
crypto/krb5/src/lib/krb5/krb/x-deltat.y
137
%type <val> num opt_hms opt_ms opt_s wsnum posnum
crypto/krb5/src/lib/krb5/rcache/rc_base.c
31
const char *val;
crypto/krb5/src/lib/krb5/rcache/rc_base.c
37
val = secure_getenv("KRB5RCACHENAME");
crypto/krb5/src/lib/krb5/rcache/rc_base.c
38
if (val != NULL)
crypto/krb5/src/lib/krb5/rcache/rc_base.c
39
return k5_rc_resolve(context, val, rc_out);
crypto/krb5/src/lib/krb5/rcache/rc_base.c
43
val = secure_getenv("KRB5RCACHETYPE");
crypto/krb5/src/lib/krb5/rcache/rc_base.c
44
if (val != NULL) {
crypto/krb5/src/lib/krb5/rcache/rc_base.c
45
if (asprintf(&rcname, "%s:", val) < 0)
crypto/krb5/src/lib/rpc/getrpcent.c
156
char *key = NULL, *val = NULL;
crypto/krb5/src/lib/rpc/getrpcent.c
173
interpret(char *val, int len)
crypto/krb5/src/lib/rpc/getrpcent.c
181
strncpy(d->line, val, len);
crypto/krb5/src/lib/rpc/getrpcent.c
84
char adrstr[16], *val = NULL;
crypto/krb5/src/plugins/kadm5_auth/test/main.c
144
char *val = NULL;
crypto/krb5/src/plugins/kadm5_auth/test/main.c
148
ret = krb5_dbe_get_string(context, ent, "nodelete", &val);
crypto/krb5/src/plugins/kadm5_auth/test/main.c
150
ret = (ret != 0 || val != NULL) ? EPERM : KRB5_PLUGIN_NO_HANDLE;
crypto/krb5/src/plugins/kadm5_auth/test/main.c
151
krb5_dbe_free_string(context, val);
crypto/krb5/src/plugins/kadm5_auth/test/main.c
249
char *val = NULL, buf[10];
crypto/krb5/src/plugins/kadm5_auth/test/main.c
255
if (krb5_dbe_get_string(context, ent, "ends", &val) != 0 || val == NULL)
crypto/krb5/src/plugins/kadm5_auth/test/main.c
257
snprintf(buf, sizeof(buf), "%d", atoi(val) + 1);
crypto/krb5/src/plugins/kadm5_auth/test/main.c
264
krb5_dbe_free_string(context, val);
crypto/krb5/src/plugins/kdb/db2/adb_policy.c
374
osa_free_policy_ent(osa_policy_ent_t val)
crypto/krb5/src/plugins/kdb/db2/adb_policy.c
380
xdr_osa_policy_ent_rec(&xdrs, val);
crypto/krb5/src/plugins/kdb/db2/adb_policy.c
382
free(val);
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
127
get_db_opt(char *input, char **opt, char **val)
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
132
*val = strdup(input);
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
133
if (*val == NULL) {
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
138
*val = strdup(pos + 1);
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
139
if (!*opt || !*val) {
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
142
free(*val);
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
143
*val = NULL;
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
206
char **t_ptr, *opt = NULL, *val = NULL, *pval = NULL;
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
223
free(val);
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
224
status = get_db_opt(*t_ptr, &opt, &val);
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
226
dbc->db_name = strdup(val);
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
232
else if (!opt && !strcmp(val, "temporary")) {
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
234
} else if (!opt && !strcmp(val, "merge_nra")) {
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
238
} else if (!opt && !strcmp(val, "unlockiter")) {
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
240
} else if (!opt && !strcmp(val, "lockiter")) {
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
246
opt ? opt : val);
crypto/krb5/src/plugins/kdb/db2/kdb_db2.c
281
free(val);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
646
hash_access(HTAB *hashp, ACTION action, const DBT *key, DBT *val)
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
665
if (ISBIG(key->size + val->size, hashp))
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
668
item_info.seek_size = key->size + val->size;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
714
if (__addel(hashp, &item_info, key, val, num_items, 0))
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
735
if (__big_return(hashp, &item_info, val, 0))
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
738
val->data = page_val.data;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
739
val->size = page_val.size;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
745
__addel(hashp, &item_info, key, val, UNKNOWN, 0))
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
794
cursor_get(const DB *dbp, CURSOR *cursorp, DBT *key, DBT *val, u_int32_t flags)
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
812
__get_item_first(hashp, cursorp, key, val, &item_info);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
814
__get_item_next(hashp, cursorp, key, val, &item_info);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
840
__big_keydata(hashp, cursorp->pagep, key, val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
855
__get_item_next(hashp, cursorp, key, val, &item_info);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
876
hash_seq(const DB *dbp, DBT *key, DBT *val, u_int32_t flag)
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash.c
889
return (hashp->seq_cursor->get(dbp, hashp->seq_cursor, key, val, flag));
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
253
__big_keydata(HTAB *hashp, PAGE16 *pagep, DBT *key, DBT *val, int32_t ndx)
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
272
return (__big_return(hashp, &ii, val, 1));
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
307
__big_return(HTAB *hashp, ITEM_INFO *item_info, DBT *val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
334
val->size = collect_data(hashp, pagep, 0);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
335
if (val->size < 1)
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
337
val->data = (void *)hashp->bigdata_buf;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
86
__big_insert(HTAB *hashp, PAGE16 *pagep, const DBT *key, const DBT *val)
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
94
val_data = (int8_t *)val->data;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_bigkey.c
95
val_size = val->size;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_debug.c
67
DBT key, val;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_debug.c
80
__get_item_next(hashp, &cursor, &key, &val, &item_info);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_debug.c
88
if (__big_keydata(hashp, cursor.pagep, &key, &val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
143
val->size = KEY_OFF(cursorp->pagep, cursorp->pgndx) -
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
146
val->data = DATA(cursorp->pagep, cursorp->pgndx);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
186
__get_item_first(HTAB *hashp, CURSOR *cursorp, DBT *key, DBT *val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
191
return (__get_item_next(hashp, cursorp, key, val, item_info));
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
199
__get_item_next(HTAB *hashp, CURSOR *cursorp, DBT *key, DBT *val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
204
status = __get_item(hashp, cursorp, key, val, item_info);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
214
putpair(PAGE8 *p, const DBT *key, const DBT *val)
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
226
off -= val->size;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
227
memmove(p + off, val->data, val->size);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
399
DBT key, val;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
440
val.size = off - DATA_OFF(temp_pagep, n);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
441
val.data = DATA(temp_pagep, n);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
444
__addel(hashp, &old_ii, &key, &val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
447
__addel(hashp, &new_ii, &key, &val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
477
__addel(HTAB *hashp, ITEM_INFO *item_info, const DBT *key, const DBT *val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
480
__addel(hashp, item_info, key, val, num_items, expanding)
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
483
const DBT *key, *val;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
506
if (ISBIG(PAIRSIZE(key, val), hashp) && BIGPAIRFITS(pagep))
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
508
if (PAIRFITS(pagep, key, val))
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
517
if ((ISBIG(PAIRSIZE(key, val), hashp) &&
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
519
(!ISBIG(PAIRSIZE(key, val), hashp) &&
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
520
!PAIRFITS(pagep, key, val))) {
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
526
if ((ISBIG(PAIRSIZE(key, val), hashp) &&
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
528
(!ISBIG(PAIRSIZE(key, val), hashp) &&
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
529
!PAIRFITS(pagep, key, val))) {
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
537
if (ISBIG(PAIRSIZE(key, val), hashp)) {
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
538
if (__big_insert(hashp, pagep, key, val))
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
541
putpair((PAGE8 *)pagep, key, val);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
557
if (!ISBIG(PAIRSIZE(key, val), hashp))
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hash_page.c
87
__get_item(HTAB *hashp, CURSOR *cursorp, DBT *key, DBT *val,
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hsearch.c
70
DBT key, val;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hsearch.c
79
val.data = (u_char *)item.data;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hsearch.c
80
val.size = strlen(item.data) + 1;
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hsearch.c
81
status = (dbp->put)(dbp, &key, &val, R_NOOVERWRITE);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hsearch.c
86
status = (dbp->get)(dbp, &key, &val, 0);
crypto/krb5/src/plugins/kdb/db2/libdb2/hash/hsearch.c
90
item.data = (char *)val.data;
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
109
if (db->seq(db, &key, &val, 0) != 0) {
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
13
DBT key, val;
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
165
if (db->get(db, &key, &val, 0) != 0)
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
168
if (memcmp(val.data, (void *)get_val, val.size)) {
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
171
(char *)val.data);
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
47
val.size = strlen(val_line);
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
48
val.data = (void *)val_line;
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
49
if (db->put(db, &key, &val, 0) != 0)
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
51
if (db->get(db, &key, &val, 0) != 0)
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
79
if (db->get(db, &key, &val, 0) != 0)
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
82
if (memcmp(val.data, (void *)get_val, val.size)) {
crypto/krb5/src/plugins/kdb/db2/libdb2/test/hash2.tests/passtest.c
85
(char *)val.data);
crypto/krb5/src/plugins/kdb/db2/policy_db.h
103
void osa_free_policy_ent(osa_policy_ent_t val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/kdb_ldap.h
139
#define STORE16_INT(ptr, val) store_16_be(val, ptr)
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/kdb_ldap.h
140
#define STORE32_INT(ptr, val) store_32_be(val, ptr)
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/kdb_ldap.h
141
#define UNSTORE16_INT(ptr, val) (val = load_16_be(ptr))
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/kdb_ldap.h
142
#define UNSTORE32_INT(ptr, val) (val = load_32_be(ptr))
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
100
*out = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
104
dfl, &val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
107
*out = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1085
format_d(int val)
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1087
char tmpbuf[3 * sizeof(val) + 2];
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1089
snprintf(tmpbuf, sizeof(tmpbuf), "%d", val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
137
char *opt, *val = NULL;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1418
int val, pcount, objtype;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1496
if (krb5_ldap_get_value(ld, ent, "krbLoginFailedCount", &val) == 0) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1497
entry->fail_auth_count = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1500
if (krb5_ldap_get_value(ld, ent, "krbmaxticketlife", &val) == 0) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1501
entry->max_life = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1504
if (krb5_ldap_get_value(ld, ent, "krbmaxrenewableage", &val) == 0) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1505
entry->max_renewable_life = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1508
if (krb5_ldap_get_value(ld, ent, "krbticketflags", &val) == 0) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
1509
entry->attributes = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
159
val = strdup(pos);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
160
if (val == NULL) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
167
*val_out = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
203
char *opt = NULL, *val = NULL;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
210
ret = get_db_opt(*db_args, &opt, &val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
223
if (val == NULL) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
232
ctx->bind_dn = strdup(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
238
ctx->max_server_conns = atoi(val) ? atoi(val) :
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
242
ctx->bind_pwd = strdup(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
249
ctx->sasl_mech = strdup(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
256
ctx->sasl_authcid = strdup(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
263
ctx->sasl_authzid = strdup(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
270
ctx->sasl_realm = strdup(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
276
ret = add_server_entry(context, val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
280
ctx->ldap_debug = atoi(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
288
free(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
289
opt = val = NULL;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
294
free(val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
68
int val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
71
name, 0, &val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
74
if (val != 0) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
75
*out = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
79
dfl, &val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
82
*out = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
93
int val = 0;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
96
name, -1, &val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_misc.c
99
if (val != -1) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_principal2.c
398
ldap_seqof_key_data val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_principal2.c
408
val.key_data = key_data;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_principal2.c
409
val.n_key_data = n_key_data;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_principal2.c
410
val.mkvno = mkvno;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_principal2.c
411
val.kvno = key_data[0].key_data_kvno;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_principal2.c
413
return accessor.asn1_ldap_encode_sequence_of_keys(&val, code);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_pwd_policy.c
238
int val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_pwd_policy.c
240
krb5_ldap_get_value(ld, ent, name, &val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_pwd_policy.c
241
*out = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_service_stash.c
100
val = sep + 1;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_service_stash.c
106
if (val == NULL) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_service_stash.c
114
return dec_password(context, val, password_out);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_service_stash.c
69
const char *start, *sep, *val = NULL;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_tkt_policy.c
206
int objectmask=0, val=0;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_tkt_policy.c
253
if (krb5_ldap_get_value(ld, ent, "krbmaxticketlife", &val) == 0) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_tkt_policy.c
254
lpolicy->maxtktlife = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_tkt_policy.c
257
if (krb5_ldap_get_value(ld, ent, "krbmaxrenewableage", &val) == 0) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_tkt_policy.c
258
lpolicy->maxrenewlife = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_tkt_policy.c
261
if (krb5_ldap_get_value(ld, ent, "krbticketflags", &val) == 0) {
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/ldap_tkt_policy.c
262
lpolicy->tktflags = val;
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/princ_xdr.c
10
ldap_osa_free_princ_ent(osa_princ_ent_t val)
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/princ_xdr.c
15
xdr_osa_princ_ent_rec(&xdrs, val);
crypto/krb5/src/plugins/kdb/ldap/libkdb_ldap/princ_xdr.h
11
ldap_osa_free_princ_ent(osa_princ_ent_t val);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
1064
MDB_val key, val;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
1085
err = mdb_get(txn, dbc->lockout_db, &key, &val);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
1086
if (!err && val.mv_size >= LOCKOUT_RECORD_LEN) {
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
1087
klmdb_decode_princ_lockout(context, &dummy, val.mv_data);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
1104
val.mv_data = lockout;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
1105
val.mv_size = sizeof(lockout);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
1106
err = mdb_put(txn, dbc->lockout_db, &key, &val, 0);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
333
MDB_val val;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
340
err = mdb_get(txn, dbc->lockout_db, key, &val);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
341
if (!err && val.mv_size >= LOCKOUT_RECORD_LEN)
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
342
klmdb_decode_princ_lockout(context, entry, val.mv_data);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
360
MDB_val key = { strlen(keystr), keystr }, val = { len, bytes }, dummy;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
377
err = mdb_put(txn, db, &key, &val, putflags);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
718
MDB_val key, val;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
731
ret = fetch(context, dbc->princ_db, &key, &val);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
736
val.mv_data, val.mv_size, entry_out);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
752
MDB_val key, val, dummy;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
792
val.mv_data = lockout;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
793
val.mv_size = sizeof(lockout);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
801
err = mdb_put(txn, dbc->lockout_db, &key, &val, 0);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
850
MDB_val key, val;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
864
err = mdb_cursor_get(cursor, &key, &val, op);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
870
val.mv_data, val.mv_size, &entry);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
895
MDB_val key, val;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
903
ret = fetch(context, dbc->policy_db, &key, &val);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
907
val.mv_data, val.mv_size, policy);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
957
MDB_val key, val;
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
970
err = mdb_cursor_get(cursor, &key, &val, MDB_NEXT);
crypto/krb5/src/plugins/kdb/lmdb/kdb_lmdb.c
976
val.mv_data, val.mv_size, &pol);
crypto/krb5/src/plugins/kdb/test/kdb_test.c
146
char **values, *val;
crypto/krb5/src/plugins/kdb/test/kdb_test.c
154
val = estrdup(values[0]);
crypto/krb5/src/plugins/kdb/test/kdb_test.c
156
return val;
crypto/krb5/src/plugins/kdb/test/kdb_test.c
164
krb5_deltat val;
crypto/krb5/src/plugins/kdb/test/kdb_test.c
168
check(krb5_string_to_deltat(strval, &val));
crypto/krb5/src/plugins/kdb/test/kdb_test.c
170
return val;
crypto/krb5/src/plugins/kdb/test/kdb_test.c
179
krb5_deltat val;
crypto/krb5/src/plugins/kdb/test/kdb_test.c
183
check(krb5_string_to_deltat(strval, &val));
crypto/krb5/src/plugins/kdb/test/kdb_test.c
185
return val + time(NULL);
crypto/krb5/src/plugins/kdb/test/kdb_test.c
619
int val;
crypto/krb5/src/plugins/kdb/test/kdb_test.c
626
val = inds[i]->data[6];
crypto/krb5/src/plugins/kdb/test/kdb_test.c
631
inds[0]->data[6] = val + 1;
crypto/krb5/src/plugins/preauth/otp/otp_state.c
369
indicators_decode(krb5_context ctx, k5_json_value val, char ***indicators_out)
crypto/krb5/src/plugins/preauth/otp/otp_state.c
378
if (k5_json_get_tid(val) != K5_JSON_TID_ARRAY)
crypto/krb5/src/plugins/preauth/otp/otp_state.c
380
arr = val;
crypto/krb5/src/plugins/preauth/otp/otp_state.c
412
k5_json_value val;
crypto/krb5/src/plugins/preauth/otp/otp_state.c
419
val = k5_json_object_get(obj, "type");
crypto/krb5/src/plugins/preauth/otp/otp_state.c
420
if (val != NULL && k5_json_get_tid(val) == K5_JSON_TID_STRING)
crypto/krb5/src/plugins/preauth/otp/otp_state.c
421
typename = k5_json_string_utf8(val);
crypto/krb5/src/plugins/preauth/otp/otp_state.c
430
val = k5_json_object_get(obj, "username");
crypto/krb5/src/plugins/preauth/otp/otp_state.c
431
if (val != NULL && k5_json_get_tid(val) == K5_JSON_TID_STRING) {
crypto/krb5/src/plugins/preauth/otp/otp_state.c
432
username = strdup(k5_json_string_utf8(val));
crypto/krb5/src/plugins/preauth/otp/otp_state.c
443
val = k5_json_object_get(obj, "indicators");
crypto/krb5/src/plugins/preauth/otp/otp_state.c
444
if (val != NULL) {
crypto/krb5/src/plugins/preauth/otp/otp_state.c
445
retval = indicators_decode(ctx, val, &indicators);
crypto/krb5/src/plugins/preauth/otp/otp_state.c
479
k5_json_value val;
crypto/krb5/src/plugins/preauth/otp/otp_state.c
485
retval = k5_json_decode((config != NULL) ? config : "[{}]", &val);
crypto/krb5/src/plugins/preauth/otp/otp_state.c
488
if (k5_json_get_tid(val) != K5_JSON_TID_ARRAY) {
crypto/krb5/src/plugins/preauth/otp/otp_state.c
494
if (k5_json_array_length(val) == 0) {
crypto/krb5/src/plugins/preauth/otp/otp_state.c
498
retval = k5_json_array_add(val, obj);
crypto/krb5/src/plugins/preauth/otp/otp_state.c
504
*out = val;
crypto/krb5/src/plugins/preauth/otp/otp_state.c
508
k5_json_release(val);
crypto/krb5/src/plugins/preauth/pkinit/pkinit_clnt.c
850
save_one_password(void *arg, const char *key, k5_json_value val)
crypto/krb5/src/plugins/preauth/pkinit/pkinit_clnt.c
856
if (k5_json_get_tid(val) == K5_JSON_TID_STRING) {
crypto/krb5/src/plugins/preauth/pkinit/pkinit_clnt.c
857
password = k5_json_string_utf8(val);
crypto/krb5/src/util/profile/prof_get.c
136
char **vtvalues, **val;
crypto/krb5/src/util/profile/prof_get.c
146
for (val = vtvalues; *val; val++)
crypto/krb5/src/util/profile/prof_get.c
147
add_to_list(&values, *val);
crypto/krb5/src/util/support/base64.c
102
val += p - base64_chars;
crypto/krb5/src/util/support/base64.c
107
return (marker << 24) | val;
crypto/krb5/src/util/support/base64.c
114
unsigned int val, marker;
crypto/krb5/src/util/support/base64.c
131
val = decode_token(str);
crypto/krb5/src/util/support/base64.c
132
if (val == DECODE_ERROR) {
crypto/krb5/src/util/support/base64.c
136
marker = (val >> 24) & 0xff;
crypto/krb5/src/util/support/base64.c
137
*q++ = (val >> 16) & 0xff;
crypto/krb5/src/util/support/base64.c
139
*q++ = (val >> 8) & 0xff;
crypto/krb5/src/util/support/base64.c
141
*q++ = val & 0xff;
crypto/krb5/src/util/support/base64.c
89
unsigned int val = 0;
crypto/krb5/src/util/support/base64.c
93
val *= 64;
crypto/krb5/src/util/support/getopt_long.c
223
*long_options[match].flag = long_options[match].val;
crypto/krb5/src/util/support/getopt_long.c
226
retval = long_options[match].val;
crypto/krb5/src/util/support/hashtab.c
198
k5_hashtab_add(struct k5_hashtab *ht, const void *key, size_t klen, void *val)
crypto/krb5/src/util/support/hashtab.c
213
ent->val = val;
crypto/krb5/src/util/support/hashtab.c
249
return ent->val;
crypto/krb5/src/util/support/hashtab.c
40
void *val;
crypto/krb5/src/util/support/json.c
102
if (val == NULL)
crypto/krb5/src/util/support/json.c
103
return val;
crypto/krb5/src/util/support/json.c
104
p = PTR2BASE(val);
crypto/krb5/src/util/support/json.c
107
return val;
crypto/krb5/src/util/support/json.c
1075
k5_json_value val;
crypto/krb5/src/util/support/json.c
1081
ret = parse_value(&ctx, &val);
crypto/krb5/src/util/support/json.c
1085
k5_json_release(val);
crypto/krb5/src/util/support/json.c
1088
*val_out = val;
crypto/krb5/src/util/support/json.c
111
k5_json_release(k5_json_value val)
crypto/krb5/src/util/support/json.c
115
if (val == NULL)
crypto/krb5/src/util/support/json.c
117
p = PTR2BASE(val);
crypto/krb5/src/util/support/json.c
122
p->isa->dealloc(val);
crypto/krb5/src/util/support/json.c
129
get_isa(k5_json_value val)
crypto/krb5/src/util/support/json.c
131
struct value_base *p = PTR2BASE(val);
crypto/krb5/src/util/support/json.c
137
k5_json_get_tid(k5_json_value val)
crypto/krb5/src/util/support/json.c
139
json_type isa = get_isa(val);
crypto/krb5/src/util/support/json.c
230
k5_json_array_add(k5_json_array array, k5_json_value val)
crypto/krb5/src/util/support/json.c
246
array->values[array->len++] = k5_json_retain(val);
crypto/krb5/src/util/support/json.c
265
k5_json_array_set(k5_json_array array, size_t idx, k5_json_value val)
crypto/krb5/src/util/support/json.c
270
array->values[idx] = k5_json_retain(val);
crypto/krb5/src/util/support/json.c
283
k5_json_value val;
crypto/krb5/src/util/support/json.c
297
val = k5_json_retain(va_arg(ap, k5_json_value));
crypto/krb5/src/util/support/json.c
302
val = null;
crypto/krb5/src/util/support/json.c
308
val = b;
crypto/krb5/src/util/support/json.c
314
val = num;
crypto/krb5/src/util/support/json.c
320
val = num;
crypto/krb5/src/util/support/json.c
327
val = null;
crypto/krb5/src/util/support/json.c
331
val = str;
crypto/krb5/src/util/support/json.c
339
val = str;
crypto/krb5/src/util/support/json.c
344
ret = k5_json_array_add(array, val);
crypto/krb5/src/util/support/json.c
345
k5_json_release(val);
crypto/krb5/src/util/support/json.c
427
k5_json_object_set(k5_json_object obj, const char *key, k5_json_value val)
crypto/krb5/src/util/support/json.c
435
if (val == NULL) {
crypto/krb5/src/util/support/json.c
443
ent->value = k5_json_retain(val);
crypto/krb5/src/util/support/json.c
449
if (val == NULL)
crypto/krb5/src/util/support/json.c
466
obj->entries[obj->len].value = k5_json_retain(val);
crypto/krb5/src/util/support/json.c
582
static int encode_value(struct k5buf *buf, k5_json_value val);
crypto/krb5/src/util/support/json.c
631
encode_value(struct k5buf *buf, k5_json_value val)
crypto/krb5/src/util/support/json.c
638
if (val == NULL)
crypto/krb5/src/util/support/json.c
641
type = k5_json_get_tid(val);
crypto/krb5/src/util/support/json.c
645
len = k5_json_array_length(val);
crypto/krb5/src/util/support/json.c
649
ret = encode_value(buf, k5_json_array_get(val, i));
crypto/krb5/src/util/support/json.c
661
k5_json_object_iterate(val, encode_obj_entry, &ctx);
crypto/krb5/src/util/support/json.c
666
encode_string(buf, k5_json_string_utf8(val));
crypto/krb5/src/util/support/json.c
670
k5_buf_add_fmt(buf, "%lld", k5_json_number_value(val));
crypto/krb5/src/util/support/json.c
678
k5_buf_add(buf, k5_json_bool_value(val) ? "true" : "false");
crypto/krb5/src/util/support/json.c
687
k5_json_encode(k5_json_value val, char **json_out)
crypto/krb5/src/util/support/json.c
694
ret = encode_value(&buf, val);
crypto/krb5/src/util/support/json.c
81
typedef void (*type_dealloc_fn)(void *val);
crypto/krb5/src/util/support/json.c
858
k5_json_value val;
crypto/krb5/src/util/support/json.c
872
ret = parse_value(ctx, &val);
crypto/krb5/src/util/support/json.c
879
ret = k5_json_object_set(obj, key, val);
crypto/krb5/src/util/support/json.c
881
k5_json_release(val);
crypto/krb5/src/util/support/json.c
941
k5_json_value val;
crypto/krb5/src/util/support/json.c
944
ret = parse_value(ctx, &val);
crypto/krb5/src/util/support/json.c
947
ret = k5_json_array_add(array, val);
crypto/krb5/src/util/support/json.c
948
k5_json_release(val);
crypto/krb5/src/util/support/json.c
98
k5_json_retain(k5_json_value val)
crypto/krb5/src/util/verto/ev.c
1172
static inline T ecb_div_rd (T val, T div)
crypto/krb5/src/util/verto/ev.c
1174
return val < 0 ? - ((-val + div - 1) / div) : (val ) / div;
crypto/krb5/src/util/verto/ev.c
1177
static inline T ecb_div_ru (T val, T div)
crypto/krb5/src/util/verto/ev.c
1179
return val < 0 ? - ((-val ) / div) : (val + div - 1) / div;
crypto/krb5/src/util/verto/ev.c
1182
#define ecb_div_rd(val,div) ((val) < 0 ? - ((-(val) + (div) - 1) / (div)) : ((val) ) / (div))
crypto/krb5/src/util/verto/ev.c
1183
#define ecb_div_ru(val,div) ((val) < 0 ? - ((-(val) ) / (div)) : ((val) + (div) - 1) / (div))
crypto/libecc/include/libecc/fp/fp.h
89
ATTRIBUTE_WARN_UNUSED_RET int fp_set_word_value(fp_t out, word_t val);
crypto/libecc/include/libecc/nn/nn.h
68
word_t val[BIT_LEN_WORDS(NN_MAX_BIT_LEN)];
crypto/libecc/include/libecc/nn/nn.h
80
ATTRIBUTE_WARN_UNUSED_RET int nn_set_word_value(nn_t A, word_t val);
crypto/libecc/include/libecc/utils/utils.h
182
const u16 val = 0x0102;
crypto/libecc/include/libecc/utils/utils.h
183
const u8 *buf = (const u8 *)(&val);
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
1070
if(fp_ctx_mpinv.val[0] != fp_ctx_param.mpinv){
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
1072
printf("Imported mpinv from modulus=" PRINTF_WORD_HEX_FMT, fp_ctx_mpinv.val[0]);
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
1083
if((bitcnt_t)fp_ctx_pshift.val[0] != fp_ctx_param.p_shift){
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
1085
printf("Imported mpinv from modulus=%d", (bitcnt_t)fp_ctx_pshift.val[0]);
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
1109
if(fp_ctx_prec.val[0] != fp_ctx_param.p_reciprocal){
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
1111
printf("Imported mpinv from modulus=" PRINTF_WORD_HEX_FMT, fp_ctx_prec.val[0]);
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
95
out_nn->val[wlen - k] = strtoull(buf, NULL, 16);
crypto/libecc/src/arithmetic_tests/arithmetic_tests.c
99
out_nn->val[k - 1] = 0;
crypto/libecc/src/curves/ec_params.c
107
out_params->ec_gen_order_bitlen = (bitcnt_t)(tmp_order_bitlen.val[0]);
crypto/libecc/src/curves/ec_params.c
78
(bitcnt_t)(tmp_p_bitlen.val[0]),
crypto/libecc/src/curves/ec_params.c
80
tmp_mpinv.val[0], (bitcnt_t)tmp_p_shift.val[0],
crypto/libecc/src/curves/ec_params.c
81
&tmp_p_normalized, tmp_p_reciprocal.val[0]); EG(ret, err);
crypto/libecc/src/curves/prj_pt.c
1109
ATTRIBUTE_WARN_UNUSED_RET static int _prj_pt_dbl_monty_aliased(prj_pt_t val)
crypto/libecc/src/curves/prj_pt.c
1115
ret = _prj_pt_dbl_monty(&out_cpy, val); EG(ret, err);
crypto/libecc/src/curves/prj_pt.c
1116
ret = prj_pt_copy(val, &out_cpy);
crypto/libecc/src/examples/hash/gostr34_11_94.c
42
const u16 val = 0x0102;
crypto/libecc/src/examples/hash/gostr34_11_94.c
43
const u8 *buf = (const u8 *)(&val);
crypto/libecc/src/examples/sss/sss.c
289
ATTRIBUTE_WARN_UNUSED_RET static int _sss_raw_lagrange(const sss_share *shares, u16 k, sss_secret *secret, u16 val)
crypto/libecc/src/examples/sss/sss.c
318
if(val != 0){
crypto/libecc/src/examples/sss/sss.c
326
ret = fp_set_word_value(&x, (word_t)val); EG(ret, err);
crypto/libecc/src/examples/sss/sss.c
360
if(val != 0){
crypto/libecc/src/examples/sss/sss.c
401
if(val != 0){
crypto/libecc/src/fp/fp.c
248
word_t val;
crypto/libecc/src/fp/fp.c
254
val = isone ? WORD(0) : WORD(1);
crypto/libecc/src/fp/fp.c
256
ret = nn_set_word_value(&(out->fp_val), val); EG(ret, err);
crypto/libecc/src/fp/fp.c
266
int fp_set_word_value(fp_t out, word_t val)
crypto/libecc/src/fp/fp.c
273
ret = nn_cmp_word(&(out->ctx->p), val, &cmp); EG(ret, err);
crypto/libecc/src/fp/fp.c
277
ret = nn_set_word_value(&(out->fp_val), val); EG(ret, err);
crypto/libecc/src/fp/fp.c
396
out->fp_val.val[i] |= (tab[k]->fp_val.val[i] & mask);
crypto/libecc/src/nn/nn.c
116
A->val[i] = WORD(0);
crypto/libecc/src/nn/nn.c
145
int nn_set_word_value(nn_t A, word_t val)
crypto/libecc/src/nn/nn.c
151
A->val[0] = val;
crypto/libecc/src/nn/nn.c
200
t = ((in1->val[i] ^ in2->val[i]) & mask) ^ r_mask;
crypto/libecc/src/nn/nn.c
201
in1->val[i] ^= ((t & local_mask) ^ (r_mask & local_mask));
crypto/libecc/src/nn/nn.c
202
in2->val[i] ^= ((t & local_mask) ^ (r_mask & local_mask));
crypto/libecc/src/nn/nn.c
232
A->val[i] = (word_t)(A->val[i] & WORD_MASK_IFZERO((i >= new_wlen)));
crypto/libecc/src/nn/nn.c
259
notzero |= ((A->val[i] != 0) & mask);
crypto/libecc/src/nn/nn.c
284
notone = (A->val[0] != 1);
crypto/libecc/src/nn/nn.c
287
notone |= ((A->val[i] != 0) & mask);
crypto/libecc/src/nn/nn.c
308
*isodd = (A->wlen != 0) && (A->val[0] & 1);
crypto/libecc/src/nn/nn.c
342
tmp |= (in->val[i] != 0);
crypto/libecc/src/nn/nn.c
352
tmp += (int)(((word_t)(in->val[i] > w)) & (mask));
crypto/libecc/src/nn/nn.c
353
tmp -= (int)(((word_t)(in->val[i] < w)) & (mask));
crypto/libecc/src/nn/nn.c
383
tmp += ((A->val[i] > B->val[i]) & mask);
crypto/libecc/src/nn/nn.c
384
tmp -= ((A->val[i] < B->val[i]) & mask);
crypto/libecc/src/nn/nn.c
409
dst_nn->val[i] = src_nn->val[i];
crypto/libecc/src/nn/nn.c
430
while ((in1->wlen > 0) && (in1->val[in1->wlen - 1] == 0)) {
crypto/libecc/src/nn/nn.c
444
ATTRIBUTE_WARN_UNUSED_RET static int _ntohw(const u8 *val, word_t *out)
crypto/libecc/src/nn/nn.c
450
MUST_HAVE(((val != NULL) && (out != NULL)), ret, err);
crypto/libecc/src/nn/nn.c
455
res_buf[i] = val[i];
crypto/libecc/src/nn/nn.c
461
tmp = val[i];
crypto/libecc/src/nn/nn.c
462
res_buf[i] = val[WORD_BYTES - i - 1];
crypto/libecc/src/nn/nn.c
477
ATTRIBUTE_WARN_UNUSED_RET static inline int _htonw(const u8 *val, word_t *out)
crypto/libecc/src/nn/nn.c
479
return _ntohw(val, out);
crypto/libecc/src/nn/nn.c
49
word_t val = 0;
crypto/libecc/src/nn/nn.c
506
ret = _ntohw(tmp + buf_pos, &(out_nn->val[wpos])); EG(ret, err);
crypto/libecc/src/nn/nn.c
53
val |= (A)->val[i];
crypto/libecc/src/nn/nn.c
546
word_t val;
crypto/libecc/src/nn/nn.c
548
ret = _htonw((const u8 *)&in_nn->val[i], &val); EG(ret, err);
crypto/libecc/src/nn/nn.c
551
src_word_ptr = (u8 *)(&val) + wb - copylen;
crypto/libecc/src/nn/nn.c
56
return (val == 0);
crypto/libecc/src/nn/nn.c
602
out->val[i] |= (tab[k]->val[i] & mask);
crypto/libecc/src/nn/nn.c
95
A->val[i] = WORD(0);
crypto/libecc/src/nn/nn_add.c
137
out->val[out->wlen] = carry;
crypto/libecc/src/nn/nn_add.c
198
tmp = (word_t)(in1->val[i] + carry);
crypto/libecc/src/nn/nn_add.c
199
carry = (word_t)(tmp < in1->val[i]);
crypto/libecc/src/nn/nn_add.c
200
out->val[i] = tmp;
crypto/libecc/src/nn/nn_add.c
212
out->val[out->wlen] = carry;
crypto/libecc/src/nn/nn_add.c
270
tmp = (word_t)(in1->val[i] - (in2->val[i] & mask));
crypto/libecc/src/nn/nn_add.c
271
borrow1 = (word_t)(tmp > in1->val[i]);
crypto/libecc/src/nn/nn_add.c
272
out->val[i] = (word_t)(tmp - borrow);
crypto/libecc/src/nn/nn_add.c
273
borrow2 = (word_t)(out->val[i] > tmp);
crypto/libecc/src/nn/nn_add.c
310
tmp = (word_t)(in1->val[i] - borrow);
crypto/libecc/src/nn/nn_add.c
311
borrow = (word_t)(tmp > in1->val[i]);
crypto/libecc/src/nn/nn_add.c
312
out->val[i] = tmp;
crypto/libecc/src/nn/nn_add.c
82
tmp = (word_t)(in1->val[i] + (in2->val[i] & mask));
crypto/libecc/src/nn/nn_add.c
83
carry1 = (word_t)(tmp < in1->val[i]);
crypto/libecc/src/nn/nn_add.c
84
out->val[i] = (word_t)(tmp + _carry);
crypto/libecc/src/nn/nn_add.c
85
carry2 = (word_t)(out->val[i] < tmp);
crypto/libecc/src/nn/nn_div.c
129
WORD_MUL(prod_high, prod_low, in->val[i], w);
crypto/libecc/src/nn/nn_div.c
140
tmp = (word_t)(out->val[shift + i] - prod_low);
crypto/libecc/src/nn/nn_div.c
141
_borrow = (word_t)(prod_high + (tmp > out->val[shift + i]));
crypto/libecc/src/nn/nn_div.c
142
out->val[shift + i] = tmp;
crypto/libecc/src/nn/nn_div.c
203
MUST_HAVE(!(!((b->val[b->wlen - 1] >> (WORD_BITS - 1)) == WORD(1))), ret, err);
crypto/libecc/src/nn/nn_div.c
227
rh = r->val[i - 1];
crypto/libecc/src/nn/nn_div.c
228
rl = r->val[i - 2];
crypto/libecc/src/nn/nn_div.c
247
MUST_HAVE(!(r->val[i - 1] < borrow), ret, err);
crypto/libecc/src/nn/nn_div.c
248
r->val[i - 1] = (word_t)(r->val[i - 1] - borrow);
crypto/libecc/src/nn/nn_div.c
255
_small = ((!!(r->val[i - 1])) | (cmp >= 0));
crypto/libecc/src/nn/nn_div.c
258
MUST_HAVE(!(r->val[i - 1] != borrow), ret, err);
crypto/libecc/src/nn/nn_div.c
259
r->val[i - 1] = (word_t)(r->val[i - 1] - borrow);
crypto/libecc/src/nn/nn_div.c
265
q->val[shift] = qstar;
crypto/libecc/src/nn/nn_div.c
270
MUST_HAVE(!(r->val[r->wlen - 1] != WORD(0)), ret, err);
crypto/libecc/src/nn/nn_div.c
446
q->val[new_wlen - b_wlen] = (word_t) larger;
crypto/libecc/src/nn/nn_div.c
463
q->val[new_wlen - b_wlen] = (word_t) larger;
crypto/libecc/src/nn/nn_div.c
54
tmp += ((in1->val[shift + i - 1] > in2->val[i - 1]) & mask);
crypto/libecc/src/nn/nn_div.c
55
tmp -= ((in1->val[shift + i - 1] < in2->val[i - 1]) & mask);
crypto/libecc/src/nn/nn_div.c
843
ret = wreciprocal(tmp_nn.val[1], tmp_nn.val[0], p_reciprocal);
crypto/libecc/src/nn/nn_div.c
907
ret = wreciprocal(b_normalized.val[ptr->wlen - 1],
crypto/libecc/src/nn/nn_div.c
908
b_normalized.val[ptr->wlen - 2],
crypto/libecc/src/nn/nn_div.c
91
tmp = (word_t)(out->val[shift + i] - (in->val[i] & mask));
crypto/libecc/src/nn/nn_div.c
92
borrow1 = (word_t)(tmp > out->val[shift + i]);
crypto/libecc/src/nn/nn_div.c
93
out->val[shift + i] = (word_t)(tmp - _borrow);
crypto/libecc/src/nn/nn_div.c
94
borrow2 = (word_t)(out->val[shift + i] > tmp);
crypto/libecc/src/nn/nn_logical.c
123
lopart = WRSHIFT(in->val[ipos], lshift);
crypto/libecc/src/nn/nn_logical.c
128
hipart = WLSHIFT(in->val[ipos], hshift);
crypto/libecc/src/nn/nn_logical.c
131
out->val[opos] = hipart | lopart;
crypto/libecc/src/nn/nn_logical.c
177
lopart = WRSHIFT(in->val[ipos], lshift);
crypto/libecc/src/nn/nn_logical.c
182
hipart = WLSHIFT(in->val[ipos], hshift);
crypto/libecc/src/nn/nn_logical.c
185
out->val[opos] = hipart | lopart;
crypto/libecc/src/nn/nn_logical.c
244
lopart = WRSHIFT(in->val[ipos], lshift);
crypto/libecc/src/nn/nn_logical.c
249
hipart = WLSHIFT(in->val[ipos], hshift);
crypto/libecc/src/nn/nn_logical.c
252
out->val[opos] = hipart | lopart;
crypto/libecc/src/nn/nn_logical.c
261
out->val[opos] = 0;
crypto/libecc/src/nn/nn_logical.c
299
out->val[out->wlen - 1] &= mask;
crypto/libecc/src/nn/nn_logical.c
338
out->val[out->wlen - 1] &= mask;
crypto/libecc/src/nn/nn_logical.c
375
A->val[i] = (B->val[i] ^ C->val[i]);
crypto/libecc/src/nn/nn_logical.c
410
A->val[i] = (B->val[i] | C->val[i]);
crypto/libecc/src/nn/nn_logical.c
445
A->val[i] = (B->val[i] & C->val[i]);
crypto/libecc/src/nn/nn_logical.c
477
A->val[i] = (word_t)(~(B->val[i]));
crypto/libecc/src/nn/nn_logical.c
516
if (in->val[i - 1] == 0) {
crypto/libecc/src/nn/nn_logical.c
519
cnt = (bitcnt_t)(cnt + wclz(in->val[i - 1]));
crypto/libecc/src/nn/nn_logical.c
545
if (in->val[i - 1] != 0) {
crypto/libecc/src/nn/nn_logical.c
546
_blen = (bitcnt_t)((i * WORD_BITS) - wclz(in->val[i - 1]));
crypto/libecc/src/nn/nn_logical.c
573
(*bitval) = (u8)((((in->val[widx]) & (WORD(1) << bidx)) >> bidx) & 0x1);
crypto/libecc/src/nn/nn_logical.c
59
lopart = WRSHIFT(in->val[ipos], lshift);
crypto/libecc/src/nn/nn_logical.c
64
hipart = WLSHIFT(in->val[ipos], hshift);
crypto/libecc/src/nn/nn_logical.c
67
out->val[opos] = hipart | lopart;
crypto/libecc/src/nn/nn_modinv.c
294
A->val[A->wlen - 1] = WORD(1);
crypto/libecc/src/nn/nn_modinv.c
403
out.val[exp_wlen - 1] &= mask;
crypto/libecc/src/nn/nn_mul.c
190
w_nn.val[0] = w;
crypto/libecc/src/nn/nn_mul.c
77
in1->val[i], in2->val[j]);
crypto/libecc/src/nn/nn_mul.c
88
out->val[pos] = (word_t)(out->val[pos] + prod_low);
crypto/libecc/src/nn/nn_mul.c
89
carry = (word_t)(prod_high + (out->val[pos] < prod_low));
crypto/libecc/src/nn/nn_mul.c
97
out->val[pos + 1] = (word_t)(out->val[pos + 1] + carry);
crypto/libecc/src/nn/nn_mul_redc1.c
173
out->val[i] = 0;
crypto/libecc/src/nn/nn_mul_redc1.c
178
WORD_MUL(prod_high, prod_low, a->val[i], b->val[j]);
crypto/libecc/src/nn/nn_mul_redc1.c
181
out->val[j] = (word_t)(out->val[j] + prod_low);
crypto/libecc/src/nn/nn_mul_redc1.c
182
carry = (word_t)(prod_high + (out->val[j] < prod_low));
crypto/libecc/src/nn/nn_mul_redc1.c
185
out->val[j] = (word_t)(out->val[j] + carry);
crypto/libecc/src/nn/nn_mul_redc1.c
186
carry = (word_t)(out->val[j] < carry);
crypto/libecc/src/nn/nn_mul_redc1.c
188
out->val[j] = (word_t)(out->val[j] + carry);
crypto/libecc/src/nn/nn_mul_redc1.c
189
acc = (word_t)(out->val[j] < carry);
crypto/libecc/src/nn/nn_mul_redc1.c
191
m = (word_t)(out->val[0] * mpinv);
crypto/libecc/src/nn/nn_mul_redc1.c
192
WORD_MUL(prod_high, prod_low, m, p->val[0]);
crypto/libecc/src/nn/nn_mul_redc1.c
193
prod_low = (word_t)(prod_low + out->val[0]);
crypto/libecc/src/nn/nn_mul_redc1.c
194
carry = (word_t)(prod_high + (prod_low < out->val[0]));
crypto/libecc/src/nn/nn_mul_redc1.c
196
WORD_MUL(prod_high, prod_low, m, p->val[j]);
crypto/libecc/src/nn/nn_mul_redc1.c
199
out->val[j - 1] = (word_t)(prod_low + out->val[j]);
crypto/libecc/src/nn/nn_mul_redc1.c
200
carry = (word_t)(prod_high + (out->val[j - 1] < prod_low));
crypto/libecc/src/nn/nn_mul_redc1.c
202
out->val[j - 1] = (word_t)(carry + out->val[j]);
crypto/libecc/src/nn/nn_mul_redc1.c
203
carry = (word_t)(out->val[j - 1] < out->val[j]);
crypto/libecc/src/nn/nn_mul_redc1.c
204
out->val[j] = (word_t)(acc + carry);
crypto/libecc/src/nn/nn_mul_redc1.c
73
tmp_nn1.val[1] = WORD(1);
crypto/libecc/src/nn/nn_mul_redc1.c
77
_mpinv = tmp_nn1.val[0];
crypto/libecc/src/nn/nn_rand.c
117
ret = get_random((u8 *)tmp_rand.val, (u16)(2 * q_len)); EG(ret, err);
crypto/libecc/src/nn/nn_rand.c
38
ret = get_random((u8*) out->val, len);
crypto/libecc/src/sig/eddsa.c
645
cofactor = priv_key->params->ec_gen_cofactor.val[0];
crypto/libecc/src/utils/print_nn.c
30
ext_printf(PRINTF_WORD_HEX_FMT, a->val[w]);
crypto/openssh/channels.c
422
int val;
crypto/openssh/channels.c
454
(val = fcntl(rfd, F_GETFL)) != -1 && !(val & O_NONBLOCK)) {
crypto/openssh/channels.c
455
c->restore_flags[0] = val;
crypto/openssh/channels.c
460
(val = fcntl(wfd, F_GETFL)) != -1 && !(val & O_NONBLOCK)) {
crypto/openssh/channels.c
461
c->restore_flags[1] = val;
crypto/openssh/channels.c
466
(val = fcntl(efd, F_GETFL)) != -1 && !(val & O_NONBLOCK)) {
crypto/openssh/channels.c
467
c->restore_flags[2] = val;
crypto/openssh/clientloop.c
2667
client_send_env(struct ssh *ssh, int id, const char *name, const char *val)
crypto/openssh/clientloop.c
2671
debug("channel %d: setting env %s = \"%s\"", id, name, val);
crypto/openssh/clientloop.c
2674
(r = sshpkt_put_cstring(ssh, val)) != 0 ||
crypto/openssh/clientloop.c
2686
char *name, *val;
crypto/openssh/clientloop.c
2728
if ((val = strchr(name, '=')) == NULL) {
crypto/openssh/clientloop.c
2732
*val++ = '\0';
crypto/openssh/clientloop.c
2746
client_send_env(ssh, id, name, val);
crypto/openssh/clientloop.c
2753
if ((val = strchr(name, '=')) == NULL) {
crypto/openssh/clientloop.c
2757
*val++ = '\0';
crypto/openssh/clientloop.c
2758
client_send_env(ssh, id, name, val);
crypto/openssh/defines.h
780
((((u_int64_t)(f).val[0] & 0xffffffffUL) << 32) | \
crypto/openssh/defines.h
781
((f).val[1] & 0xffffffffUL))
crypto/openssh/gss-genr.c
234
char *val;
crypto/openssh/gss-genr.c
236
xasprintf(&val, "host@%s", host);
crypto/openssh/gss-genr.c
237
gssbuf.value = val;
crypto/openssh/kex.c
412
const u_char *val, size_t len, const char *want_ver, u_int flag)
crypto/openssh/kex.c
414
if (memchr(val, '\0', len) != NULL) {
crypto/openssh/kex.c
418
debug_f("%s=<%s>", name, val);
crypto/openssh/kex.c
419
if (strcmp(val, want_ver) == 0)
crypto/openssh/kex.c
483
u_char *val;
crypto/openssh/kex.c
503
if ((r = sshpkt_get_string(ssh, &val, &vlen)) != 0) {
crypto/openssh/kex.c
510
val, vlen)) != 0)
crypto/openssh/kex.c
514
val, vlen)) != 0)
crypto/openssh/kex.c
518
free(val);
crypto/openssh/libcrux_mlkem768_sha3.h
152
Eurydice_slice_to_array3(&(dst)->tag, (char *)&(dst)->val.case_Ok, src, \
crypto/openssh/libcrux_mlkem768_sha3.h
313
} val;
crypto/openssh/libcrux_mlkem768_sha3.h
327
memcpy(f0, self.val.case_Ok, (size_t)24U * sizeof(uint8_t));
crypto/openssh/libcrux_mlkem768_sha3.h
346
} val;
crypto/openssh/libcrux_mlkem768_sha3.h
360
memcpy(f0, self.val.case_Ok, (size_t)20U * sizeof(uint8_t));
crypto/openssh/libcrux_mlkem768_sha3.h
379
} val;
crypto/openssh/libcrux_mlkem768_sha3.h
393
memcpy(f0, self.val.case_Ok, (size_t)10U * sizeof(uint8_t));
crypto/openssh/libcrux_mlkem768_sha3.h
518
} val;
crypto/openssh/libcrux_mlkem768_sha3.h
532
memcpy(f0, self.val.case_Ok, (size_t)32U * sizeof(uint8_t));
crypto/openssh/libcrux_mlkem768_sha3.h
687
} val;
crypto/openssh/libcrux_mlkem768_sha3.h
701
memcpy(f0, self.val.case_Ok, (size_t)16U * sizeof(int16_t));
crypto/openssh/libcrux_mlkem768_sha3.h
720
} val;
crypto/openssh/libcrux_mlkem768_sha3.h
734
memcpy(f0, self.val.case_Ok, (size_t)8U * sizeof(uint8_t));
crypto/openssh/log.c
127
return log_facilities[i].val;
crypto/openssh/log.c
137
if (log_facilities[i].val == facility)
crypto/openssh/log.c
150
return log_levels[i].val;
crypto/openssh/log.c
160
if (log_levels[i].val == level)
crypto/openssh/log.c
77
SyslogFacility val;
crypto/openssh/log.c
98
LogLevel val;
crypto/openssh/misc.c
1295
char *ret = NULL, *var, *varend, *val;
crypto/openssh/misc.c
1339
if ((val = getenv(var)) == NULL) {
crypto/openssh/misc.c
1343
debug3_f("expand ${%s} -> '%s'", var, val);
crypto/openssh/misc.c
1344
if ((r = sshbuf_put(buf, val, strlen(val))) !=0)
crypto/openssh/misc.c
135
int val;
crypto/openssh/misc.c
137
val = fcntl(fd, F_GETFL);
crypto/openssh/misc.c
138
if (val == -1) {
crypto/openssh/misc.c
142
if (val & O_NONBLOCK) {
crypto/openssh/misc.c
147
val |= O_NONBLOCK;
crypto/openssh/misc.c
148
if (fcntl(fd, F_SETFL, val) == -1) {
crypto/openssh/misc.c
159
int val;
crypto/openssh/misc.c
161
val = fcntl(fd, F_GETFL);
crypto/openssh/misc.c
162
if (val == -1) {
crypto/openssh/misc.c
166
if (!(val & O_NONBLOCK)) {
crypto/openssh/misc.c
171
val &= ~O_NONBLOCK;
crypto/openssh/misc.c
172
if (fcntl(fd, F_SETFL, val) == -1) {
crypto/openssh/misc.c
1899
int val;
crypto/openssh/misc.c
1908
val = (int)strtonum(cp, 0, 255, &errstr);
crypto/openssh/misc.c
1911
return val;
crypto/openssh/misc.c
2463
atoi_err(const char *nptr, int *val)
crypto/openssh/misc.c
2469
*val = strtonum(nptr, 0, INT_MAX, &errstr);
crypto/openssh/openbsd-compat/arc4random.c
195
_rs_random_u32(uint32_t *val)
crypto/openssh/openbsd-compat/arc4random.c
199
_rs_stir_if_needed(sizeof(*val));
crypto/openssh/openbsd-compat/arc4random.c
200
if (rs->rs_have < sizeof(*val))
crypto/openssh/openbsd-compat/arc4random.c
203
memcpy(val, keystream, sizeof(*val));
crypto/openssh/openbsd-compat/arc4random.c
204
memset(keystream, 0, sizeof(*val));
crypto/openssh/openbsd-compat/arc4random.c
205
rs->rs_have -= sizeof(*val);
crypto/openssh/openbsd-compat/arc4random.c
211
uint32_t val;
crypto/openssh/openbsd-compat/arc4random.c
214
_rs_random_u32(&val);
crypto/openssh/openbsd-compat/arc4random.c
216
return val;
crypto/openssh/openbsd-compat/bsd-pselect.c
60
int val;
crypto/openssh/openbsd-compat/bsd-pselect.c
62
if ((val = fcntl(fd, F_GETFL)) == -1 ||
crypto/openssh/openbsd-compat/bsd-pselect.c
63
fcntl(fd, F_SETFL, val|O_NONBLOCK) == -1)
crypto/openssh/openbsd-compat/bsd-snprintf.c
643
static LDOUBLE POW10(int val)
crypto/openssh/openbsd-compat/bsd-snprintf.c
647
while (val) {
crypto/openssh/openbsd-compat/bsd-snprintf.c
649
val--;
crypto/openssh/openbsd-compat/getopt.h
63
int val;
crypto/openssh/openbsd-compat/getopt_long.c
248
optopt = long_options[match].val;
crypto/openssh/openbsd-compat/getopt_long.c
278
optopt = long_options[match].val;
crypto/openssh/openbsd-compat/getopt_long.c
297
*long_options[match].flag = long_options[match].val;
crypto/openssh/openbsd-compat/getopt_long.c
300
return (long_options[match].val);
crypto/openssh/openbsd-compat/getopt_long.c
86
int val;
crypto/openssh/openbsd-compat/inet_aton.c
104
val = 0; base = 10;
crypto/openssh/openbsd-compat/inet_aton.c
114
val = (val * base) + (c - '0');
crypto/openssh/openbsd-compat/inet_aton.c
117
val = (val << 4) |
crypto/openssh/openbsd-compat/inet_aton.c
132
*pp++ = val;
crypto/openssh/openbsd-compat/inet_aton.c
156
if ((val > 0xffffff) || (parts[0] > 0xff))
crypto/openssh/openbsd-compat/inet_aton.c
158
val |= parts[0] << 24;
crypto/openssh/openbsd-compat/inet_aton.c
162
if ((val > 0xffff) || (parts[0] > 0xff) || (parts[1] > 0xff))
crypto/openssh/openbsd-compat/inet_aton.c
164
val |= (parts[0] << 24) | (parts[1] << 16);
crypto/openssh/openbsd-compat/inet_aton.c
168
if ((val > 0xff) || (parts[0] > 0xff) || (parts[1] > 0xff) || (parts[2] > 0xff))
crypto/openssh/openbsd-compat/inet_aton.c
170
val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
crypto/openssh/openbsd-compat/inet_aton.c
174
addr->s_addr = htonl(val);
crypto/openssh/openbsd-compat/inet_aton.c
71
struct in_addr val;
crypto/openssh/openbsd-compat/inet_aton.c
73
if (inet_aton(cp, &val))
crypto/openssh/openbsd-compat/inet_aton.c
74
return (val.s_addr);
crypto/openssh/openbsd-compat/inet_aton.c
89
u_int32_t val;
crypto/openssh/openbsd-compat/regress/strtonumtest.c
45
long long val;
crypto/openssh/openbsd-compat/regress/strtonumtest.c
48
val = strtonum(p, lb, ub, &q);
crypto/openssh/openbsd-compat/regress/strtonumtest.c
54
fprintf(stderr, "%s [%lld-%lld] %lld ", p, lb, ub, val);
crypto/openssh/openbsd-compat/sys-tree.h
154
name##_SPLAY_MIN_MAX(struct name *head, int val) \
crypto/openssh/openbsd-compat/sys-tree.h
156
name##_SPLAY_MINMAX(head, val); \
crypto/openssh/openbsd-compat/sys-tree.h
709
name##_RB_MINMAX(struct name *head, int val) \
crypto/openssh/openbsd-compat/sys-tree.h
715
if (val < 0) \
crypto/openssh/packet.c
2612
sshpkt_put_u8(struct ssh *ssh, u_char val)
crypto/openssh/packet.c
2614
return sshbuf_put_u8(ssh->state->outgoing_packet, val);
crypto/openssh/packet.c
2618
sshpkt_put_u32(struct ssh *ssh, u_int32_t val)
crypto/openssh/packet.c
2620
return sshbuf_put_u32(ssh->state->outgoing_packet, val);
crypto/openssh/packet.c
2624
sshpkt_put_u64(struct ssh *ssh, u_int64_t val)
crypto/openssh/packet.c
2626
return sshbuf_put_u64(ssh->state->outgoing_packet, val);
crypto/openssh/packet.h
189
int sshpkt_put_u8(struct ssh *ssh, u_char val);
crypto/openssh/packet.h
190
int sshpkt_put_u32(struct ssh *ssh, u_int32_t val);
crypto/openssh/packet.h
191
int sshpkt_put_u64(struct ssh *ssh, u_int64_t val);
crypto/openssh/readconf.c
3463
fmt_multistate_int(int val, const struct multistate *m)
crypto/openssh/readconf.c
3468
if (m[i].value == val)
crypto/openssh/readconf.c
3475
fmt_intarg(OpCodes code, int val)
crypto/openssh/readconf.c
3477
if (val == -1)
crypto/openssh/readconf.c
3481
return fmt_multistate_int(val, multistate_addressfamily);
crypto/openssh/readconf.c
3483
return fmt_multistate_int(val, multistate_compression);
crypto/openssh/readconf.c
3486
return fmt_multistate_int(val, multistate_yesnoask);
crypto/openssh/readconf.c
3488
return fmt_multistate_int(val, multistate_strict_hostkey);
crypto/openssh/readconf.c
3490
return fmt_multistate_int(val, multistate_controlmaster);
crypto/openssh/readconf.c
3492
return fmt_multistate_int(val, multistate_tunnel);
crypto/openssh/readconf.c
3494
return fmt_multistate_int(val, multistate_requesttty);
crypto/openssh/readconf.c
3496
return fmt_multistate_int(val, multistate_sessiontype);
crypto/openssh/readconf.c
3498
return fmt_multistate_int(val, multistate_canonicalizehostname);
crypto/openssh/readconf.c
3500
return fmt_multistate_int(val, multistate_yesnoaskconfirm);
crypto/openssh/readconf.c
3502
return fmt_multistate_int(val, multistate_pubkey_auth);
crypto/openssh/readconf.c
3504
return ssh_digest_alg_name(val);
crypto/openssh/readconf.c
3506
switch (val) {
crypto/openssh/readconf.c
3529
dump_cfg_int(OpCodes code, int val)
crypto/openssh/readconf.c
3532
if (val == 0) {
crypto/openssh/readconf.c
3535
} else if (val == SSH_KEYSTROKE_DEFAULT_INTERVAL_MS) {
crypto/openssh/readconf.c
3541
printf("%s %d\n", lookup_opcode_name(code), val);
crypto/openssh/readconf.c
3545
dump_cfg_fmtint(OpCodes code, int val)
crypto/openssh/readconf.c
3547
printf("%s %s\n", lookup_opcode_name(code), fmt_intarg(code, val));
crypto/openssh/readconf.c
3551
dump_cfg_string(OpCodes code, const char *val)
crypto/openssh/readconf.c
3553
if (val == NULL)
crypto/openssh/readconf.c
3555
printf("%s %s\n", lookup_opcode_name(code), val);
crypto/openssh/regress/netcat.c
1222
map_tos(char *s, int *val)
crypto/openssh/regress/netcat.c
1228
int val;
crypto/openssh/regress/netcat.c
1262
*val = t->val;
crypto/openssh/regress/unittests/authopt/tests.c
201
#define FLAG_TEST(keyword, var, val) \
crypto/openssh/regress/unittests/authopt/tests.c
205
expected->var = val; \
crypto/openssh/regress/unittests/authopt/tests.c
209
expected->var = val; \
crypto/openssh/regress/unittests/authopt/tests.c
231
#define STRING_TEST(keyword, var, val) \
crypto/openssh/regress/unittests/authopt/tests.c
235
expected->var = strdup(val); \
crypto/openssh/regress/unittests/authopt/tests.c
237
opts = sshauthopt_parse(keyword "=" #val, &errstr); \
crypto/openssh/regress/unittests/authopt/tests.c
240
expected->var = strdup(val); \
crypto/openssh/regress/unittests/authopt/tests.c
243
"restrict," keyword "=" #val ",restrict", &errstr); \
crypto/openssh/regress/unittests/authopt/tests.c
256
#define ARRAY_TEST(label, keywords, var, nvar, val) \
crypto/openssh/regress/unittests/authopt/tests.c
260
expected->var = commasplit(val, &expected->nvar); \
crypto/openssh/regress/unittests/authopt/tests.c
265
expected->var = commasplit(val, &expected->nvar); \
crypto/openssh/regress/unittests/authopt/tests.c
422
#define FLAG_CASE(keybase, label, keyname, keywords, mostly_off, var, val) \
crypto/openssh/regress/unittests/authopt/tests.c
427
expected->var = val; \
crypto/openssh/scp.c
1656
#define TYPE_OVERFLOW(type, val) \
crypto/openssh/scp.c
1657
((sizeof(type) == 4 && (val) > INT32_MAX) || \
crypto/openssh/scp.c
1658
(sizeof(type) == 8 && (val) > INT64_MAX) || \
crypto/openssh/servconf.c
2297
for (i = 0; tunmode_desc[i].val != -1; i++)
crypto/openssh/servconf.c
2299
value = tunmode_desc[i].val;
crypto/openssh/servconf.c
2845
const char *val;
crypto/openssh/servconf.c
2848
if ((val = strprefix(p, "addr=", 0)) != NULL) {
crypto/openssh/servconf.c
2849
ci->address = xstrdup(val);
crypto/openssh/servconf.c
2850
} else if ((val = strprefix(p, "host=", 0)) != NULL) {
crypto/openssh/servconf.c
2851
ci->host = xstrdup(val);
crypto/openssh/servconf.c
2852
} else if ((val = strprefix(p, "user=", 0)) != NULL) {
crypto/openssh/servconf.c
2853
ci->user = xstrdup(val);
crypto/openssh/servconf.c
2854
} else if ((val = strprefix(p, "laddr=", 0)) != NULL) {
crypto/openssh/servconf.c
2855
ci->laddress = xstrdup(val);
crypto/openssh/servconf.c
2856
} else if ((val = strprefix(p, "rdomain=", 0)) != NULL) {
crypto/openssh/servconf.c
2857
ci->rdomain = xstrdup(val);
crypto/openssh/servconf.c
2858
} else if ((val = strprefix(p, "lport=", 0)) != NULL) {
crypto/openssh/servconf.c
2859
ci->lport = a2port(val);
crypto/openssh/servconf.c
3076
fmt_multistate_int(int val, const struct multistate *m)
crypto/openssh/servconf.c
3081
if (m[i].value == val)
crypto/openssh/servconf.c
3088
fmt_intarg(ServerOpCodes code, int val)
crypto/openssh/servconf.c
3090
if (val == -1)
crypto/openssh/servconf.c
3094
return fmt_multistate_int(val, multistate_addressfamily);
crypto/openssh/servconf.c
3096
return fmt_multistate_int(val, multistate_permitrootlogin);
crypto/openssh/servconf.c
3098
return fmt_multistate_int(val, multistate_gatewayports);
crypto/openssh/servconf.c
3100
return fmt_multistate_int(val, multistate_compression);
crypto/openssh/servconf.c
3102
return fmt_multistate_int(val, multistate_tcpfwd);
crypto/openssh/servconf.c
3104
return fmt_multistate_int(val, multistate_tcpfwd);
crypto/openssh/servconf.c
3106
return fmt_multistate_int(val, multistate_ignore_rhosts);
crypto/openssh/servconf.c
3108
return ssh_digest_alg_name(val);
crypto/openssh/servconf.c
3110
switch (val) {
crypto/openssh/servconf.c
3122
dump_cfg_int(ServerOpCodes code, int val)
crypto/openssh/servconf.c
3124
if (code == sUnusedConnectionTimeout && val == 0) {
crypto/openssh/servconf.c
3128
printf("%s %d\n", lookup_opcode_name(code), val);
crypto/openssh/servconf.c
3132
dump_cfg_oct(ServerOpCodes code, int val)
crypto/openssh/servconf.c
3134
printf("%s 0%o\n", lookup_opcode_name(code), val);
crypto/openssh/servconf.c
3138
dump_cfg_fmtint(ServerOpCodes code, int val)
crypto/openssh/servconf.c
3140
printf("%s %s\n", lookup_opcode_name(code), fmt_intarg(code, val));
crypto/openssh/servconf.c
3144
dump_cfg_string(ServerOpCodes code, const char *val)
crypto/openssh/servconf.c
3147
val == NULL ? "none" : val);
crypto/openssh/servconf.c
3375
for (i = 0; tunmode_desc[i].val != -1; i++) {
crypto/openssh/servconf.c
3376
if (tunmode_desc[i].val == o->permit_tun) {
crypto/openssh/servconf.c
771
int val;
crypto/openssh/session.c
1016
child_set_env(&env, &envsize, s->env[i].name, s->env[i].val);
crypto/openssh/session.c
1040
if ((val = strchr(*var, '=')) != NULL) {
crypto/openssh/session.c
1041
*val++ = '\0';
crypto/openssh/session.c
1042
child_set_env(&env, &envsize, *var, val);
crypto/openssh/session.c
2083
char *name, *val;
crypto/openssh/session.c
2088
(r = sshpkt_get_cstring(ssh, &val, NULL)) != 0 ||
crypto/openssh/session.c
2100
debug2("Setting env %d: %s=%s", s->num_env, name, val);
crypto/openssh/session.c
2104
s->env[s->num_env].val = val;
crypto/openssh/session.c
2113
free(val);
crypto/openssh/session.c
2459
free(s->env[i].val);
crypto/openssh/session.c
982
char **senv, **var, *val;
crypto/openssh/session.h
62
char *val;
crypto/openssh/sftp-server.c
383
int val;
crypto/openssh/sftp-server.c
387
val = get_u32(handle);
crypto/openssh/sftp-server.c
388
if (handle_is_ok(val, HANDLE_FILE) ||
crypto/openssh/sftp-server.c
389
handle_is_ok(val, HANDLE_DIR))
crypto/openssh/sftp-server.c
390
return val;
crypto/openssh/ssh-keygen.c
136
char *val;
crypto/openssh/ssh-keygen.c
1662
cert_ext[ncert_ext].val = value == NULL ? NULL : xstrdup(value);
crypto/openssh/ssh-keygen.c
1679
if ((a->val == NULL) != (b->val == NULL))
crypto/openssh/ssh-keygen.c
1680
return (a->val == NULL) ? -1 : 1;
crypto/openssh/ssh-keygen.c
1681
if (a->val != NULL && (r = strcmp(a->val, b->val)) != 0)
crypto/openssh/ssh-keygen.c
1704
if (ext->val == NULL) {
crypto/openssh/ssh-keygen.c
1712
debug3_f("%s=%s", ext->key, ext->val);
crypto/openssh/ssh-keygen.c
1715
(r = sshbuf_put_cstring(b, ext->val)) != 0 ||
crypto/openssh/ssh-keygen.c
2044
char *val, *cp;
crypto/openssh/ssh-keygen.c
2078
val = opt + 14;
crypto/openssh/ssh-keygen.c
2079
if (*val == '\0')
crypto/openssh/ssh-keygen.c
2083
certflags_command = xstrdup(val);
crypto/openssh/ssh-keygen.c
2085
val = opt + 15;
crypto/openssh/ssh-keygen.c
2086
if (*val == '\0')
crypto/openssh/ssh-keygen.c
2090
if (addr_match_cidr_list(NULL, val) != 0)
crypto/openssh/ssh-keygen.c
2092
certflags_src_addr = xstrdup(val);
crypto/openssh/ssh-keygen.c
2095
val = xstrdup(strchr(opt, ':') + 1);
crypto/openssh/ssh-keygen.c
2096
if ((cp = strchr(val, '=')) != NULL)
crypto/openssh/ssh-keygen.c
2098
cert_ext_add(val, cp, iscrit);
crypto/openssh/ssh-keygen.c
2099
free(val);
crypto/openssh/ssh-pkcs11.c
1338
#define FILL_ATTR(attr, idx, typ, val, len) \
crypto/openssh/ssh-pkcs11.c
1339
{ (attr[idx]).type=(typ); (attr[idx]).pValue=(val); (attr[idx]).ulValueLen=len; idx++; }
crypto/openssh/ssh-pkcs11.c
312
CK_ATTRIBUTE_TYPE type, int *val)
crypto/openssh/ssh-pkcs11.c
320
*val = 0;
crypto/openssh/ssh-pkcs11.c
339
*val = flag != 0;
crypto/openssh/ssh-pkcs11.c
341
k11->provider->name, k11->slotidx, obj, type, *val);
crypto/openssh/sshbuf-getput-basic.c
189
const u_char *val;
crypto/openssh/sshbuf-getput-basic.c
197
if ((r = sshbuf_get_string_direct(buf, &val, &len)) < 0)
crypto/openssh/sshbuf-getput-basic.c
205
memcpy(*valp, val, len);
crypto/openssh/sshbuf-getput-basic.c
392
sshbuf_put_u64(struct sshbuf *buf, u_int64_t val)
crypto/openssh/sshbuf-getput-basic.c
399
POKE_U64(p, val);
crypto/openssh/sshbuf-getput-basic.c
404
sshbuf_put_u32(struct sshbuf *buf, u_int32_t val)
crypto/openssh/sshbuf-getput-basic.c
411
POKE_U32(p, val);
crypto/openssh/sshbuf-getput-basic.c
416
sshbuf_put_u16(struct sshbuf *buf, u_int16_t val)
crypto/openssh/sshbuf-getput-basic.c
423
POKE_U16(p, val);
crypto/openssh/sshbuf-getput-basic.c
428
sshbuf_put_u8(struct sshbuf *buf, u_char val)
crypto/openssh/sshbuf-getput-basic.c
435
p[0] = val;
crypto/openssh/sshbuf-getput-basic.c
454
sshbuf_poke_u64(struct sshbuf *buf, size_t offset, u_int64_t val)
crypto/openssh/sshbuf-getput-basic.c
461
POKE_U64(p, val);
crypto/openssh/sshbuf-getput-basic.c
466
sshbuf_poke_u32(struct sshbuf *buf, size_t offset, u_int32_t val)
crypto/openssh/sshbuf-getput-basic.c
473
POKE_U32(p, val);
crypto/openssh/sshbuf-getput-basic.c
478
sshbuf_poke_u16(struct sshbuf *buf, size_t offset, u_int16_t val)
crypto/openssh/sshbuf-getput-basic.c
485
POKE_U16(p, val);
crypto/openssh/sshbuf-getput-basic.c
490
sshbuf_poke_u8(struct sshbuf *buf, size_t offset, u_char val)
crypto/openssh/sshbuf-getput-basic.c
497
*p = val;
crypto/openssh/sshbuf.h
160
int sshbuf_put_u64(struct sshbuf *buf, u_int64_t val);
crypto/openssh/sshbuf.h
161
int sshbuf_put_u32(struct sshbuf *buf, u_int32_t val);
crypto/openssh/sshbuf.h
162
int sshbuf_put_u16(struct sshbuf *buf, u_int16_t val);
crypto/openssh/sshbuf.h
163
int sshbuf_put_u8(struct sshbuf *buf, u_char val);
crypto/openssh/sshbuf.h
179
int sshbuf_poke_u64(struct sshbuf *buf, size_t offset, u_int64_t val);
crypto/openssh/sshbuf.h
180
int sshbuf_poke_u32(struct sshbuf *buf, size_t offset, u_int32_t val);
crypto/openssh/sshbuf.h
181
int sshbuf_poke_u16(struct sshbuf *buf, size_t offset, u_int16_t val);
crypto/openssh/sshbuf.h
182
int sshbuf_poke_u8(struct sshbuf *buf, size_t offset, u_char val);
crypto/openssl/apps/lib/app_provider.c
101
*(tmp = p.val++) = '\0';
crypto/openssl/apps/lib/app_provider.c
104
while (isspace(_UC(*p.val)))
crypto/openssl/apps/lib/app_provider.c
105
++p.val;
crypto/openssl/apps/lib/app_provider.c
73
char *val;
crypto/openssl/apps/lib/app_provider.c
84
return OSSL_PROVIDER_add_conf_parameter(prov, p->key, p->val);
crypto/openssl/apps/lib/app_provider.c
94
|| (p.val = strchr(copy, '=')) == NULL) {
crypto/openssl/apps/lib/apps.c
1273
CONF_VALUE *val;
crypto/openssl/apps/lib/apps.c
1280
val = sk_CONF_VALUE_value(vals, i);
crypto/openssl/apps/lib/apps.c
1281
if (!set_table_opts(flags, val->name, in_tbl))
crypto/openssl/apps/lib/apps.c
865
#define SET_EXPECT(val) \
crypto/openssl/apps/lib/apps.c
866
(expect = expect < 0 ? (val) : (expect == (val) ? (val) : 0))
crypto/openssl/apps/lib/apps.c
867
#define SET_EXPECT1(pvar, val) \
crypto/openssl/apps/lib/apps.c
870
SET_EXPECT(val); \
crypto/openssl/apps/lib/s_cb.c
40
static const char *lookup(int val, const STRINT_PAIR *list, const char *def)
crypto/openssl/apps/lib/s_cb.c
43
if (list->retval == val)
crypto/openssl/apps/openssl.c
199
char *val;
crypto/openssl/apps/openssl.c
209
val = OPENSSL_strdup(str);
crypto/openssl/apps/openssl.c
211
if (val != NULL) {
crypto/openssl/apps/openssl.c
212
char *valp = val;
crypto/openssl/apps/openssl.c
215
for (valp = val; (item = strtok(valp, ",")) != NULL; valp = NULL) {
crypto/openssl/apps/openssl.c
231
OPENSSL_free(val);
crypto/openssl/apps/speed.c
4926
long int val = 0;
crypto/openssl/apps/speed.c
4929
val = strtol(str, &end, 10);
crypto/openssl/apps/speed.c
4931
&& min_val <= val && val < upper_val) {
crypto/openssl/apps/speed.c
4932
*res = (int)val;
crypto/openssl/crypto/armcap.c
89
unsigned long val = 0ul;
crypto/openssl/crypto/armcap.c
91
if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
crypto/openssl/crypto/armcap.c
94
return val;
crypto/openssl/crypto/asn1/a_i2d_fp.c
111
BIO *ASN1_item_i2d_mem_bio(const ASN1_ITEM *it, const ASN1_VALUE *val)
crypto/openssl/crypto/asn1/a_i2d_fp.c
115
if (it == NULL || val == NULL) {
crypto/openssl/crypto/asn1/a_i2d_fp.c
122
if (ASN1_item_i2d_bio(it, res, val) <= 0) {
crypto/openssl/crypto/asn1/a_strex.c
426
const ASN1_STRING *val;
crypto/openssl/crypto/asn1/a_strex.c
506
val = X509_NAME_ENTRY_get_data(ent);
crypto/openssl/crypto/asn1/a_strex.c
548
len = do_print_ex(io_ch, arg, flags | orflags, val);
crypto/openssl/crypto/asn1/a_utf8.c
28
int UTF8_getc(const unsigned char *str, int len, unsigned long *val)
crypto/openssl/crypto/asn1/a_utf8.c
81
*val = value;
crypto/openssl/crypto/asn1/asn1_gen.c
25
#define ASN1_GEN_STR(str, val) { str, sizeof(str) - 1, val }
crypto/openssl/crypto/asn1/asn1_local.h
62
const ASN1_TEMPLATE *ossl_asn1_do_adb(const ASN1_VALUE *val,
crypto/openssl/crypto/asn1/asn_mime.c
105
static int B64_write_ASN1(BIO *out, ASN1_VALUE *val, BIO *in, int flags,
crypto/openssl/crypto/asn1/asn_mime.c
119
r = i2d_ASN1_bio_stream(out, val, in, flags, it);
crypto/openssl/crypto/asn1/asn_mime.c
128
int PEM_write_bio_ASN1_stream(BIO *out, ASN1_VALUE *val, BIO *in, int flags,
crypto/openssl/crypto/asn1/asn_mime.c
133
r = B64_write_ASN1(out, val, in, flags, it);
crypto/openssl/crypto/asn1/asn_mime.c
142
ASN1_VALUE *val;
crypto/openssl/crypto/asn1/asn_mime.c
149
val = ASN1_item_d2i_bio_ex(it, bio, x, libctx, propq);
crypto/openssl/crypto/asn1/asn_mime.c
150
if (!val)
crypto/openssl/crypto/asn1/asn_mime.c
155
return val;
crypto/openssl/crypto/asn1/asn_mime.c
249
int SMIME_write_ASN1_ex(BIO *bio, ASN1_VALUE *val, BIO *data, int flags,
crypto/openssl/crypto/asn1/asn_mime.c
294
if (!asn1_output_data(bio, data, val, flags, it))
crypto/openssl/crypto/asn1/asn_mime.c
305
B64_write_ASN1(bio, val, NULL, 0, it);
crypto/openssl/crypto/asn1/asn_mime.c
338
if (!B64_write_ASN1(bio, val, data, flags, it))
crypto/openssl/crypto/asn1/asn_mime.c
344
int SMIME_write_ASN1(BIO *bio, ASN1_VALUE *val, BIO *data, int flags,
crypto/openssl/crypto/asn1/asn_mime.c
348
return SMIME_write_ASN1_ex(bio, val, data, flags, ctype_nid, econt_nid,
crypto/openssl/crypto/asn1/asn_mime.c
355
static int asn1_output_data(BIO *out, BIO *data, ASN1_VALUE *val, int flags,
crypto/openssl/crypto/asn1/asn_mime.c
382
if (aux->asn1_cb(ASN1_OP_DETACHED_PRE, &val, it, &sarg) <= 0)
crypto/openssl/crypto/asn1/asn_mime.c
390
if (aux->asn1_cb(ASN1_OP_DETACHED_POST, &val, it, &sarg) <= 0)
crypto/openssl/crypto/asn1/asn_mime.c
419
ASN1_VALUE *val;
crypto/openssl/crypto/asn1/asn_mime.c
43
static int asn1_output_data(BIO *out, BIO *data, ASN1_VALUE *val, int flags,
crypto/openssl/crypto/asn1/asn_mime.c
483
if ((val = b64_read_asn1(asnin, it, x, libctx, propq)) == NULL) {
crypto/openssl/crypto/asn1/asn_mime.c
496
return val;
crypto/openssl/crypto/asn1/asn_mime.c
510
if ((val = b64_read_asn1(bio, it, x, libctx, propq)) == NULL) {
crypto/openssl/crypto/asn1/asn_mime.c
514
return val;
crypto/openssl/crypto/asn1/asn_mime.c
69
int i2d_ASN1_bio_stream(BIO *out, ASN1_VALUE *val, BIO *in, int flags,
crypto/openssl/crypto/asn1/asn_mime.c
77
bio = BIO_new_NDEF(out, val, it);
crypto/openssl/crypto/asn1/asn_mime.c
99
rv = ASN1_item_i2d_bio(it, out, val);
crypto/openssl/crypto/asn1/bio_ndef.c
113
ndef_aux->val = val;
crypto/openssl/crypto/asn1/bio_ndef.c
140
derlen = ASN1_item_ndef_i2d(ndef_aux->val, NULL, ndef_aux->it);
crypto/openssl/crypto/asn1/bio_ndef.c
148
ASN1_item_ndef_i2d(ndef_aux->val, &p, ndef_aux->it);
crypto/openssl/crypto/asn1/bio_ndef.c
210
&ndef_aux->val, ndef_aux->it, &sarg)
crypto/openssl/crypto/asn1/bio_ndef.c
214
derlen = ASN1_item_ndef_i2d(ndef_aux->val, NULL, ndef_aux->it);
crypto/openssl/crypto/asn1/bio_ndef.c
222
derlen = ASN1_item_ndef_i2d(ndef_aux->val, &p, ndef_aux->it);
crypto/openssl/crypto/asn1/bio_ndef.c
33
ASN1_VALUE *val;
crypto/openssl/crypto/asn1/bio_ndef.c
58
BIO *BIO_new_NDEF(BIO *out, ASN1_VALUE *val, const ASN1_ITEM *it)
crypto/openssl/crypto/asn1/bio_ndef.c
99
if (aux->asn1_cb(ASN1_OP_STREAM_PRE, &val, it, &sarg) <= 0) {
crypto/openssl/crypto/asn1/tasn_dec.c
47
static int asn1_template_noexp_d2i(ASN1_VALUE **val,
crypto/openssl/crypto/asn1/tasn_dec.c
522
static int asn1_template_ex_d2i(ASN1_VALUE **val,
crypto/openssl/crypto/asn1/tasn_dec.c
533
if (!val)
crypto/openssl/crypto/asn1/tasn_dec.c
560
ret = asn1_template_noexp_d2i(val, &p, len, tt, 0, ctx, depth, libctx,
crypto/openssl/crypto/asn1/tasn_dec.c
584
return asn1_template_noexp_d2i(val, in, inlen, tt, opt, ctx, depth,
crypto/openssl/crypto/asn1/tasn_dec.c
594
static int asn1_template_noexp_d2i(ASN1_VALUE **val,
crypto/openssl/crypto/asn1/tasn_dec.c
604
if (!val)
crypto/openssl/crypto/asn1/tasn_dec.c
616
tval = (ASN1_VALUE *)val;
crypto/openssl/crypto/asn1/tasn_dec.c
617
val = &tval;
crypto/openssl/crypto/asn1/tasn_dec.c
643
if (*val == NULL)
crypto/openssl/crypto/asn1/tasn_dec.c
644
*val = (ASN1_VALUE *)sk_ASN1_VALUE_new_null();
crypto/openssl/crypto/asn1/tasn_dec.c
649
STACK_OF(ASN1_VALUE) *sktmp = (STACK_OF(ASN1_VALUE) *)*val;
crypto/openssl/crypto/asn1/tasn_dec.c
657
if (*val == NULL) {
crypto/openssl/crypto/asn1/tasn_dec.c
687
if (!sk_ASN1_VALUE_push((STACK_OF(ASN1_VALUE) *)*val, skfield)) {
crypto/openssl/crypto/asn1/tasn_dec.c
699
ret = asn1_item_embed_d2i(val, &p, len,
crypto/openssl/crypto/asn1/tasn_dec.c
709
ret = asn1_item_embed_d2i(val, &p, len, ASN1_ITEM_ptr(tt->item),
crypto/openssl/crypto/asn1/tasn_enc.c
27
static int asn1_item_flags_i2d(const ASN1_VALUE *val, unsigned char **out,
crypto/openssl/crypto/asn1/tasn_enc.c
37
int ASN1_item_ndef_i2d(const ASN1_VALUE *val, unsigned char **out,
crypto/openssl/crypto/asn1/tasn_enc.c
40
return asn1_item_flags_i2d(val, out, it, ASN1_TFLG_NDEF);
crypto/openssl/crypto/asn1/tasn_enc.c
43
int ASN1_item_i2d(const ASN1_VALUE *val, unsigned char **out, const ASN1_ITEM *it)
crypto/openssl/crypto/asn1/tasn_enc.c
45
return asn1_item_flags_i2d(val, out, it, 0);
crypto/openssl/crypto/asn1/tasn_enc.c
55
static int asn1_item_flags_i2d(const ASN1_VALUE *val, unsigned char **out,
crypto/openssl/crypto/asn1/tasn_enc.c
62
len = ASN1_item_ex_i2d(&val, NULL, it, -1, flags);
crypto/openssl/crypto/asn1/tasn_enc.c
68
ASN1_item_ex_i2d(&val, &p, it, -1, flags);
crypto/openssl/crypto/asn1/tasn_enc.c
73
return ASN1_item_ex_i2d(&val, out, it, -1, flags);
crypto/openssl/crypto/asn1/tasn_fre.c
18
void ASN1_item_free(ASN1_VALUE *val, const ASN1_ITEM *it)
crypto/openssl/crypto/asn1/tasn_fre.c
20
ossl_asn1_item_embed_free(&val, it, 0);
crypto/openssl/crypto/asn1/tasn_utl.c
224
const ASN1_TEMPLATE *ossl_asn1_do_adb(const ASN1_VALUE *val,
crypto/openssl/crypto/asn1/tasn_utl.c
241
sfld = offset2ptr(val, adb->offset);
crypto/openssl/crypto/bn/bn_exp.c
1312
BIGNUM *val[TABLE_SIZE];
crypto/openssl/crypto/bn/bn_exp.c
1341
val[0] = BN_CTX_get(ctx);
crypto/openssl/crypto/bn/bn_exp.c
1342
if (val[0] == NULL)
crypto/openssl/crypto/bn/bn_exp.c
1345
if (!BN_nnmod(val[0], a, m, ctx))
crypto/openssl/crypto/bn/bn_exp.c
1347
if (BN_is_zero(val[0])) {
crypto/openssl/crypto/bn/bn_exp.c
1355
if (!BN_mod_mul(d, val[0], val[0], m, ctx))
crypto/openssl/crypto/bn/bn_exp.c
1359
if (((val[i] = BN_CTX_get(ctx)) == NULL) || !BN_mod_mul(val[i], val[i - 1], d, m, ctx))
crypto/openssl/crypto/bn/bn_exp.c
1420
if (!BN_mod_mul(r, r, val[wvalue >> 1], m, ctx))
crypto/openssl/crypto/bn/bn_exp.c
176
BIGNUM *val[TABLE_SIZE];
crypto/openssl/crypto/bn/bn_exp.c
203
val[0] = BN_CTX_get(ctx);
crypto/openssl/crypto/bn/bn_exp.c
204
if (val[0] == NULL)
crypto/openssl/crypto/bn/bn_exp.c
219
if (!BN_nnmod(val[0], a, m, ctx))
crypto/openssl/crypto/bn/bn_exp.c
221
if (BN_is_zero(val[0])) {
crypto/openssl/crypto/bn/bn_exp.c
229
if (!BN_mod_mul_reciprocal(aa, val[0], val[0], &recp, ctx))
crypto/openssl/crypto/bn/bn_exp.c
233
if (((val[i] = BN_CTX_get(ctx)) == NULL) || !BN_mod_mul_reciprocal(val[i], val[i - 1], aa, &recp, ctx))
crypto/openssl/crypto/bn/bn_exp.c
294
if (!BN_mod_mul_reciprocal(r, r, val[wvalue >> 1], &recp, ctx))
crypto/openssl/crypto/bn/bn_exp.c
319
BIGNUM *val[TABLE_SIZE];
crypto/openssl/crypto/bn/bn_exp.c
353
val[0] = BN_CTX_get(ctx);
crypto/openssl/crypto/bn/bn_exp.c
354
if (val[0] == NULL)
crypto/openssl/crypto/bn/bn_exp.c
371
if (!BN_nnmod(val[0], a, m, ctx))
crypto/openssl/crypto/bn/bn_exp.c
373
aa = val[0];
crypto/openssl/crypto/bn/bn_exp.c
376
if (!bn_to_mont_fixed_top(val[0], aa, mont, ctx))
crypto/openssl/crypto/bn/bn_exp.c
381
if (!bn_mul_mont_fixed_top(d, val[0], val[0], mont, ctx))
crypto/openssl/crypto/bn/bn_exp.c
385
if (((val[i] = BN_CTX_get(ctx)) == NULL) || !bn_mul_mont_fixed_top(val[i], val[i - 1], d, mont, ctx))
crypto/openssl/crypto/bn/bn_exp.c
451
if (!bn_mul_mont_fixed_top(r, r, val[wvalue >> 1], mont, ctx))
crypto/openssl/crypto/bn/bn_exp.c
468
val[0]->d[0] = 1; /* borrow val[0] */
crypto/openssl/crypto/bn/bn_exp.c
470
val[0]->d[i] = 0;
crypto/openssl/crypto/bn/bn_exp.c
471
val[0]->top = j;
crypto/openssl/crypto/bn/bn_exp.c
472
if (!BN_mod_mul_montgomery(rr, r, val[0], mont, ctx))
crypto/openssl/crypto/bn/bn_nist.c
1146
BN_ULONG *r_d, *a_d = a->d, t_d[BN_NIST_521_TOP], val, tmp, *res;
crypto/openssl/crypto/bn/bn_nist.c
1178
for (val = t_d[0], i = 0; i < BN_NIST_521_TOP - 1; i++) {
crypto/openssl/crypto/bn/bn_nist.c
1185
tmp = val >> BN_NIST_521_RSHIFT;
crypto/openssl/crypto/bn/bn_nist.c
1186
val = t_d[i + 1];
crypto/openssl/crypto/bn/bn_nist.c
1187
t_d[i] = (tmp | val << BN_NIST_521_LSHIFT) & BN_MASK2;
crypto/openssl/crypto/bn/bn_nist.c
1189
t_d[i] = (val >> BN_NIST_521_RSHIFT | (tmp = t_d[i + 1]) << BN_NIST_521_LSHIFT) & BN_MASK2;
crypto/openssl/crypto/bn/bn_nist.c
1190
val = tmp;
crypto/openssl/crypto/bn/bn_nist.c
1193
t_d[i] = val >> BN_NIST_521_RSHIFT;
crypto/openssl/crypto/bn/bn_nist.c
332
static ossl_inline void store_lo32(void *ptr, NIST_INT64 val)
crypto/openssl/crypto/bn/bn_nist.c
337
uint32_t tmp = (uint32_t)val;
crypto/openssl/crypto/bn/rsaz_exp.c
252
void rsaz_512_scatter4(void *tbl, const BN_ULONG *val, int power);
crypto/openssl/crypto/bn/rsaz_exp.c
253
void rsaz_512_gather4(BN_ULONG *val, const void *tbl, int power);
crypto/openssl/crypto/bn/rsaz_exp.c
31
void rsaz_1024_scatter5_avx2(void *tbl, const void *val, int i);
crypto/openssl/crypto/bn/rsaz_exp.c
32
void rsaz_1024_gather5_avx2(void *val, const void *tbl, int i);
crypto/openssl/crypto/cmp/cmp_asn.c
541
int64_t val;
crypto/openssl/crypto/cmp/cmp_asn.c
544
|| !ASN1_INTEGER_get_int64(&val, atav->value.rsaKeyLen))
crypto/openssl/crypto/cmp/cmp_asn.c
546
if (val <= 0 || val > INT_MAX)
crypto/openssl/crypto/cmp/cmp_asn.c
548
return (int)val;
crypto/openssl/crypto/cmp/cmp_ctx.c
256
int PREFIX##_set_##FIELD(OSSL_CMP_CTX *ctx, TYPE val) \
crypto/openssl/crypto/cmp/cmp_ctx.c
262
ctx->FIELD = val; \
crypto/openssl/crypto/cmp/cmp_ctx.c
43
int PREFIX##_set0##_##NAME(OSSL_CMP_CTX *ctx, TYPE *val) \
crypto/openssl/crypto/cmp/cmp_ctx.c
50
ctx->FIELD = val; \
crypto/openssl/crypto/cmp/cmp_ctx.c
568
int OSSL_CMP_CTX_set1_##FIELD(OSSL_CMP_CTX *ctx, const TYPE *val) \
crypto/openssl/crypto/cmp/cmp_ctx.c
577
if (val != NULL && (val_dup = TYPE##_dup(val)) == NULL) \
crypto/openssl/crypto/cmp/cmp_ctx.c
588
int PREFIX##_set1_##FIELD(OSSL_CMP_CTX *ctx, TYPE *val) \
crypto/openssl/crypto/cmp/cmp_ctx.c
596
if (val != NULL && TYPE##_invalid(val)) { \
crypto/openssl/crypto/cmp/cmp_ctx.c
600
if (val != NULL && !TYPE##_up_ref(val)) \
crypto/openssl/crypto/cmp/cmp_ctx.c
603
ctx->FIELD = val; \
crypto/openssl/crypto/cmp/cmp_ctx.c
875
int OSSL_CMP_CTX_set_option(OSSL_CMP_CTX *ctx, int opt, int val)
crypto/openssl/crypto/cmp/cmp_ctx.c
895
if (val < min_val) {
crypto/openssl/crypto/cmp/cmp_ctx.c
902
if (val > OSSL_CMP_LOG_MAX) {
crypto/openssl/crypto/cmp/cmp_ctx.c
906
ctx->log_verbosity = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
909
ctx->implicitConfirm = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
912
ctx->disableConfirm = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
915
ctx->unprotectedSend = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
918
ctx->unprotectedErrors = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
921
ctx->noCacheExtraCerts = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
924
ctx->days = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
927
ctx->SubjectAltName_nodefault = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
930
ctx->setSubjectAltNameCritical = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
933
ctx->setPoliciesCritical = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
936
ctx->ignore_keyusage = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
939
if (val > OSSL_CRMF_POPO_KEYAGREE) {
crypto/openssl/crypto/cmp/cmp_ctx.c
943
ctx->popoMethod = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
946
if (!cmp_ctx_set_md(ctx, &ctx->digest, val))
crypto/openssl/crypto/cmp/cmp_ctx.c
950
if (!cmp_ctx_set_md(ctx, &ctx->pbm_owf, val))
crypto/openssl/crypto/cmp/cmp_ctx.c
954
ctx->pbm_mac = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
957
ctx->keep_alive = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
960
ctx->msg_timeout = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
963
ctx->total_timeout = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
966
ctx->tls_used = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
969
ctx->permitTAInExtraCertsForIR = val;
crypto/openssl/crypto/cmp/cmp_ctx.c
972
if (val > OCSP_REVOKED_STATUS_AACOMPROMISE) {
crypto/openssl/crypto/cmp/cmp_ctx.c
976
ctx->revocationReason = val;
crypto/openssl/crypto/cmp/cmp_msg.c
176
ASN1_ENUMERATED *val = ASN1_ENUMERATED_new();
crypto/openssl/crypto/cmp/cmp_msg.c
179
if (val != NULL && ASN1_ENUMERATED_set(val, reason_code))
crypto/openssl/crypto/cmp/cmp_msg.c
180
res = add1_extension(pexts, NID_crl_reason, 0 /* non-critical */, val);
crypto/openssl/crypto/cmp/cmp_msg.c
181
ASN1_ENUMERATED_free(val);
crypto/openssl/crypto/cmp/cmp_server.c
127
int val)
crypto/openssl/crypto/cmp/cmp_server.c
133
srv_ctx->sendUnprotectedErrors = val != 0;
crypto/openssl/crypto/cmp/cmp_server.c
137
int OSSL_CMP_SRV_CTX_set_accept_unprotected(OSSL_CMP_SRV_CTX *srv_ctx, int val)
crypto/openssl/crypto/cmp/cmp_server.c
143
srv_ctx->acceptUnprotected = val != 0;
crypto/openssl/crypto/cmp/cmp_server.c
147
int OSSL_CMP_SRV_CTX_set_accept_raverified(OSSL_CMP_SRV_CTX *srv_ctx, int val)
crypto/openssl/crypto/cmp/cmp_server.c
153
srv_ctx->acceptRAVerified = val != 0;
crypto/openssl/crypto/cmp/cmp_server.c
158
int val)
crypto/openssl/crypto/cmp/cmp_server.c
164
srv_ctx->grantImplicitConfirm = val != 0;
crypto/openssl/crypto/core_namemap.c
143
HT_VALUE *val;
crypto/openssl/crypto/core_namemap.c
157
val = ossl_ht_get(namemap->namenum_ht, TO_HT_KEY(&key));
crypto/openssl/crypto/core_namemap.c
159
if (val != NULL)
crypto/openssl/crypto/core_namemap.c
161
number = (int)(intptr_t)val->value;
crypto/openssl/crypto/core_namemap.c
170
HT_VALUE *val;
crypto/openssl/crypto/core_namemap.c
184
val = ossl_ht_get(namemap->namenum_ht, TO_HT_KEY(&key));
crypto/openssl/crypto/core_namemap.c
186
if (val != NULL)
crypto/openssl/crypto/core_namemap.c
188
number = (int)(intptr_t)val->value;
crypto/openssl/crypto/core_namemap.c
260
HT_VALUE val = { 0 };
crypto/openssl/crypto/core_namemap.c
275
val.value = (void *)(intptr_t)number;
crypto/openssl/crypto/core_namemap.c
276
ret = ossl_ht_insert(namemap->namenum_ht, TO_HT_KEY(&key), &val, NULL);
crypto/openssl/crypto/ct/ct_x509v3.c
16
static char *i2s_poison(const X509V3_EXT_METHOD *method, void *val)
crypto/openssl/crypto/ec/ec_mult.c
421
EC_POINT **val = NULL; /* precomputation */
crypto/openssl/crypto/ec/ec_mult.c
651
val = OPENSSL_malloc((num_val + 1) * sizeof(val[0]));
crypto/openssl/crypto/ec/ec_mult.c
652
if (val == NULL)
crypto/openssl/crypto/ec/ec_mult.c
654
val[num_val] = NULL; /* pivot element */
crypto/openssl/crypto/ec/ec_mult.c
657
v = val;
crypto/openssl/crypto/ec/ec_mult.c
667
if (!(v == val + num_val)) {
crypto/openssl/crypto/ec/ec_mult.c
702
|| !group->meth->points_make_affine(group, num_val, val, ctx))
crypto/openssl/crypto/ec/ec_mult.c
784
if (val != NULL) {
crypto/openssl/crypto/ec/ec_mult.c
785
for (v = val; *v != NULL; v++)
crypto/openssl/crypto/ec/ec_mult.c
788
OPENSSL_free(val);
crypto/openssl/crypto/ec/ecp_nistz256.c
123
void ecp_nistz256_scatter_w5(P256_POINT *val,
crypto/openssl/crypto/ec/ecp_nistz256.c
125
void ecp_nistz256_gather_w5(P256_POINT *val,
crypto/openssl/crypto/ec/ecp_nistz256.c
127
void ecp_nistz256_scatter_w7(P256_POINT_AFFINE *val,
crypto/openssl/crypto/ec/ecp_nistz256.c
129
void ecp_nistz256_gather_w7(P256_POINT_AFFINE *val,
crypto/openssl/crypto/evp/ctrl_params_translate.c
1428
int val;
crypto/openssl/crypto/evp/ctrl_params_translate.c
1435
val = i == OSSL_NELEM(str_value_map) ? atoi(ctx->p2)
crypto/openssl/crypto/evp/ctrl_params_translate.c
1442
*(int *)ctx->orig_p2 = val;
crypto/openssl/crypto/evp/ctrl_params_translate.c
1444
ctx->p1 = val;
crypto/openssl/crypto/evp/ctrl_params_translate.c
1800
const int val)
crypto/openssl/crypto/evp/ctrl_params_translate.c
1804
ctx->p1 = val;
crypto/openssl/crypto/evp/ctrl_params_translate.c
1814
int val = 0;
crypto/openssl/crypto/evp/ctrl_params_translate.c
1820
val = EC_KEY_decoded_from_explicit_params(EVP_PKEY_get0_EC_KEY(pkey));
crypto/openssl/crypto/evp/ctrl_params_translate.c
1821
if (val < 0) {
crypto/openssl/crypto/evp/ctrl_params_translate.c
1832
return get_payload_int(state, translation, ctx, val);
crypto/openssl/crypto/evp/pmeth_lib.c
1201
int op, int ctrl, uint64_t val)
crypto/openssl/crypto/evp/pmeth_lib.c
1213
return EVP_PKEY_CTX_ctrl_uint64(ctx, -1, op, ctrl, val);
crypto/openssl/crypto/evp/pmeth_lib.c
1216
*p++ = OSSL_PARAM_construct_uint64(param, &val);
crypto/openssl/crypto/evp/pmeth_lib.c
1540
const void *val = ctx->cached_parameters.dist_id;
crypto/openssl/crypto/evp/pmeth_lib.c
1544
ret = evp_pkey_ctx_ctrl_str_int(ctx, name, val);
crypto/openssl/crypto/evp/pmeth_lib.c
1548
(int)len, (void *)val);
crypto/openssl/crypto/ex_data.c
468
int CRYPTO_set_ex_data(CRYPTO_EX_DATA *ad, int idx, void *val)
crypto/openssl/crypto/ex_data.c
485
if (sk_void_set(ad->sk, idx, val) != val) {
crypto/openssl/crypto/getenv.c
22
char *val = NULL;
crypto/openssl/crypto/getenv.c
67
val = OPENSSL_malloc(vallen);
crypto/openssl/crypto/getenv.c
69
if (NULL != val) {
crypto/openssl/crypto/getenv.c
71
if (WideCharToMultiByte(CP_UTF8, 0, valw, -1, val, vallen,
crypto/openssl/crypto/getenv.c
74
OPENSSL_free(val);
crypto/openssl/crypto/getenv.c
75
val = NULL;
crypto/openssl/crypto/getenv.c
85
return val;
crypto/openssl/crypto/modes/ccm128.c
298
size_t n = 8, val = 0;
crypto/openssl/crypto/modes/ccm128.c
303
val += counter[n] + (inc & 0xff);
crypto/openssl/crypto/modes/ccm128.c
304
counter[n] = (unsigned char)val;
crypto/openssl/crypto/modes/ccm128.c
305
val >>= 8; /* carry bit */
crypto/openssl/crypto/modes/ccm128.c
307
} while (n && (inc || val));
crypto/openssl/crypto/ocsp/ocsp_ext.c
237
unsigned char *val, int len)
crypto/openssl/crypto/ocsp/ocsp_ext.c
259
if (val)
crypto/openssl/crypto/ocsp/ocsp_ext.c
260
memcpy(tmpval, val, len);
crypto/openssl/crypto/ocsp/ocsp_ext.c
275
int OCSP_request_add1_nonce(OCSP_REQUEST *req, unsigned char *val, int len)
crypto/openssl/crypto/ocsp/ocsp_ext.c
277
return ocsp_add1_nonce(&req->tbsRequest.requestExtensions, val, len);
crypto/openssl/crypto/ocsp/ocsp_ext.c
282
int OCSP_basic_add1_nonce(OCSP_BASICRESP *resp, unsigned char *val, int len)
crypto/openssl/crypto/ocsp/ocsp_ext.c
284
return ocsp_add1_nonce(&resp->tbsResponseData.responseExtensions, val,
crypto/openssl/crypto/packet.c
406
int WPACKET_put_bytes__(WPACKET *pkt, uint64_t val, size_t size)
crypto/openssl/crypto/packet.c
413
|| !put_value(data, val, size))
crypto/openssl/crypto/params.c
1019
int OSSL_PARAM_get_size_t(const OSSL_PARAM *p, size_t *val)
crypto/openssl/crypto/params.c
1024
return OSSL_PARAM_get_uint32(p, (uint32_t *)val);
crypto/openssl/crypto/params.c
1026
return OSSL_PARAM_get_uint64(p, (uint64_t *)val);
crypto/openssl/crypto/params.c
1029
return general_get_uint(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
1032
int OSSL_PARAM_set_size_t(OSSL_PARAM *p, size_t val)
crypto/openssl/crypto/params.c
1037
return OSSL_PARAM_set_uint32(p, (uint32_t)val);
crypto/openssl/crypto/params.c
1039
return OSSL_PARAM_set_uint64(p, (uint64_t)val);
crypto/openssl/crypto/params.c
1042
return general_set_uint(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
1051
int OSSL_PARAM_get_time_t(const OSSL_PARAM *p, time_t *val)
crypto/openssl/crypto/params.c
1056
return OSSL_PARAM_get_int32(p, (int32_t *)val);
crypto/openssl/crypto/params.c
1058
return OSSL_PARAM_get_int64(p, (int64_t *)val);
crypto/openssl/crypto/params.c
1061
return general_get_int(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
1064
int OSSL_PARAM_set_time_t(OSSL_PARAM *p, time_t val)
crypto/openssl/crypto/params.c
1069
return OSSL_PARAM_set_int32(p, (int32_t)val);
crypto/openssl/crypto/params.c
1071
return OSSL_PARAM_set_int64(p, (int64_t)val);
crypto/openssl/crypto/params.c
1074
return general_set_int(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
1082
int OSSL_PARAM_get_BN(const OSSL_PARAM *p, BIGNUM **val)
crypto/openssl/crypto/params.c
1086
if (val == NULL || p == NULL || p->data == NULL) {
crypto/openssl/crypto/params.c
1093
b = BN_native2bn(p->data, (int)p->data_size, *val);
crypto/openssl/crypto/params.c
1096
b = BN_signed_native2bn(p->data, (int)p->data_size, *val);
crypto/openssl/crypto/params.c
1108
*val = b;
crypto/openssl/crypto/params.c
1112
int OSSL_PARAM_set_BN(OSSL_PARAM *p, const BIGNUM *val)
crypto/openssl/crypto/params.c
1121
if (val == NULL) {
crypto/openssl/crypto/params.c
1125
if (p->data_type == OSSL_PARAM_UNSIGNED_INTEGER && BN_is_negative(val)) {
crypto/openssl/crypto/params.c
1130
bytes = (size_t)BN_num_bytes(val);
crypto/openssl/crypto/params.c
1146
if (BN_bn2nativepad(val, p->data, p->data_size) < 0) {
crypto/openssl/crypto/params.c
1152
if (BN_signed_bn2native(val, p->data, p->data_size) < 0) {
crypto/openssl/crypto/params.c
1177
int OSSL_PARAM_get_double(const OSSL_PARAM *p, double *val)
crypto/openssl/crypto/params.c
1182
if (val == NULL || p == NULL || p->data == NULL) {
crypto/openssl/crypto/params.c
1190
*val = *(const double *)p->data;
crypto/openssl/crypto/params.c
1198
*val = *(const uint32_t *)p->data;
crypto/openssl/crypto/params.c
1203
*val = (double)u64;
crypto/openssl/crypto/params.c
1212
*val = *(const int32_t *)p->data;
crypto/openssl/crypto/params.c
1218
*val = 0.0 + i64;
crypto/openssl/crypto/params.c
1229
int OSSL_PARAM_set_double(OSSL_PARAM *p, double val)
crypto/openssl/crypto/params.c
1251
*(double *)p->data = val;
crypto/openssl/crypto/params.c
1265
if (val != (uint64_t)val) {
crypto/openssl/crypto/params.c
1271
if (val >= 0 && val < d_pow_32) {
crypto/openssl/crypto/params.c
1273
*(uint32_t *)p->data = (uint32_t)val;
crypto/openssl/crypto/params.c
1279
if (val >= 0 && val < d_pow_64) {
crypto/openssl/crypto/params.c
1281
*(uint64_t *)p->data = (uint64_t)val;
crypto/openssl/crypto/params.c
1296
if (val != (int64_t)val) {
crypto/openssl/crypto/params.c
1302
if (val >= -d_pow_31 && val < d_pow_31) {
crypto/openssl/crypto/params.c
1304
*(int32_t *)p->data = (int32_t)val;
crypto/openssl/crypto/params.c
1310
if (val >= -d_pow_63 && val < d_pow_63) {
crypto/openssl/crypto/params.c
1312
*(int64_t *)p->data = (int64_t)val;
crypto/openssl/crypto/params.c
1329
static int get_string_internal(const OSSL_PARAM *p, void **val,
crypto/openssl/crypto/params.c
1335
if ((val == NULL && used_len == NULL) || p == NULL) {
crypto/openssl/crypto/params.c
1359
if (val == NULL)
crypto/openssl/crypto/params.c
1362
if (*val == NULL) {
crypto/openssl/crypto/params.c
1367
*val = q;
crypto/openssl/crypto/params.c
1375
memcpy(*val, p->data, sz);
crypto/openssl/crypto/params.c
1379
int OSSL_PARAM_get_utf8_string(const OSSL_PARAM *p, char **val, size_t max_len)
crypto/openssl/crypto/params.c
1381
int ret = get_string_internal(p, (void **)val, &max_len, NULL,
crypto/openssl/crypto/params.c
1405
(*val)[data_length] = '\0';
crypto/openssl/crypto/params.c
1410
int OSSL_PARAM_get_octet_string(const OSSL_PARAM *p, void **val, size_t max_len,
crypto/openssl/crypto/params.c
1413
return get_string_internal(p, val, &max_len, used_len,
crypto/openssl/crypto/params.c
1417
static int set_string_internal(OSSL_PARAM *p, const void *val, size_t len,
crypto/openssl/crypto/params.c
1432
memcpy(p->data, val, len);
crypto/openssl/crypto/params.c
1439
int OSSL_PARAM_set_utf8_string(OSSL_PARAM *p, const char *val)
crypto/openssl/crypto/params.c
1441
if (p == NULL || val == NULL) {
crypto/openssl/crypto/params.c
1446
return set_string_internal(p, val, strlen(val), OSSL_PARAM_UTF8_STRING);
crypto/openssl/crypto/params.c
1449
int OSSL_PARAM_set_octet_string(OSSL_PARAM *p, const void *val,
crypto/openssl/crypto/params.c
1452
if (p == NULL || val == NULL) {
crypto/openssl/crypto/params.c
1457
return set_string_internal(p, val, len, OSSL_PARAM_OCTET_STRING);
crypto/openssl/crypto/params.c
1474
static int get_ptr_internal(const OSSL_PARAM *p, const void **val,
crypto/openssl/crypto/params.c
1477
if (val == NULL || p == NULL) {
crypto/openssl/crypto/params.c
1487
*val = *(const void **)p->data;
crypto/openssl/crypto/params.c
1491
int OSSL_PARAM_get_utf8_ptr(const OSSL_PARAM *p, const char **val)
crypto/openssl/crypto/params.c
1493
return get_ptr_internal(p, (const void **)val, NULL, OSSL_PARAM_UTF8_PTR);
crypto/openssl/crypto/params.c
1496
int OSSL_PARAM_get_octet_ptr(const OSSL_PARAM *p, const void **val,
crypto/openssl/crypto/params.c
1499
return get_ptr_internal(p, val, used_len, OSSL_PARAM_OCTET_PTR);
crypto/openssl/crypto/params.c
1502
static int set_ptr_internal(OSSL_PARAM *p, const void *val,
crypto/openssl/crypto/params.c
1511
*(const void **)p->data = val;
crypto/openssl/crypto/params.c
1515
int OSSL_PARAM_set_utf8_ptr(OSSL_PARAM *p, const char *val)
crypto/openssl/crypto/params.c
1522
return set_ptr_internal(p, val, OSSL_PARAM_UTF8_PTR,
crypto/openssl/crypto/params.c
1523
val == NULL ? 0 : strlen(val));
crypto/openssl/crypto/params.c
1526
int OSSL_PARAM_set_octet_ptr(OSSL_PARAM *p, const void *val,
crypto/openssl/crypto/params.c
1534
return set_ptr_internal(p, val, OSSL_PARAM_OCTET_PTR, used_len);
crypto/openssl/crypto/params.c
1661
static int get_string_ptr_internal(const OSSL_PARAM *p, const void **val,
crypto/openssl/crypto/params.c
1664
if (val == NULL || p == NULL) {
crypto/openssl/crypto/params.c
1674
*val = p->data;
crypto/openssl/crypto/params.c
1678
int OSSL_PARAM_get_utf8_string_ptr(const OSSL_PARAM *p, const char **val)
crypto/openssl/crypto/params.c
1683
rv = OSSL_PARAM_get_utf8_ptr(p, val);
crypto/openssl/crypto/params.c
1686
return rv || get_string_ptr_internal(p, (const void **)val, NULL, OSSL_PARAM_UTF8_STRING);
crypto/openssl/crypto/params.c
1689
int OSSL_PARAM_get_octet_string_ptr(const OSSL_PARAM *p, const void **val,
crypto/openssl/crypto/params.c
1695
rv = OSSL_PARAM_get_octet_ptr(p, val, used_len);
crypto/openssl/crypto/params.c
1698
return rv || get_string_ptr_internal(p, val, used_len, OSSL_PARAM_OCTET_STRING);
crypto/openssl/crypto/params.c
198
static int general_get_int(const OSSL_PARAM *p, void *val, size_t val_size)
crypto/openssl/crypto/params.c
205
return signed_from_signed(val, val_size, p->data, p->data_size);
crypto/openssl/crypto/params.c
207
return signed_from_unsigned(val, val_size, p->data, p->data_size);
crypto/openssl/crypto/params.c
213
static int general_set_int(OSSL_PARAM *p, void *val, size_t val_size)
crypto/openssl/crypto/params.c
222
r = signed_from_signed(p->data, p->data_size, val, val_size);
crypto/openssl/crypto/params.c
224
r = unsigned_from_signed(p->data, p->data_size, val, val_size);
crypto/openssl/crypto/params.c
232
static int general_get_uint(const OSSL_PARAM *p, void *val, size_t val_size)
crypto/openssl/crypto/params.c
240
return unsigned_from_signed(val, val_size, p->data, p->data_size);
crypto/openssl/crypto/params.c
242
return unsigned_from_unsigned(val, val_size, p->data, p->data_size);
crypto/openssl/crypto/params.c
248
static int general_set_uint(OSSL_PARAM *p, void *val, size_t val_size)
crypto/openssl/crypto/params.c
257
r = signed_from_unsigned(p->data, p->data_size, val, val_size);
crypto/openssl/crypto/params.c
259
r = unsigned_from_unsigned(p->data, p->data_size, val, val_size);
crypto/openssl/crypto/params.c
266
int OSSL_PARAM_get_int(const OSSL_PARAM *p, int *val)
crypto/openssl/crypto/params.c
271
return OSSL_PARAM_get_int32(p, (int32_t *)val);
crypto/openssl/crypto/params.c
273
return OSSL_PARAM_get_int64(p, (int64_t *)val);
crypto/openssl/crypto/params.c
276
return general_get_int(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
279
int OSSL_PARAM_set_int(OSSL_PARAM *p, int val)
crypto/openssl/crypto/params.c
284
return OSSL_PARAM_set_int32(p, (int32_t)val);
crypto/openssl/crypto/params.c
286
return OSSL_PARAM_set_int64(p, (int64_t)val);
crypto/openssl/crypto/params.c
289
return general_set_int(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
297
int OSSL_PARAM_get_uint(const OSSL_PARAM *p, unsigned int *val)
crypto/openssl/crypto/params.c
302
return OSSL_PARAM_get_uint32(p, (uint32_t *)val);
crypto/openssl/crypto/params.c
304
return OSSL_PARAM_get_uint64(p, (uint64_t *)val);
crypto/openssl/crypto/params.c
307
return general_get_uint(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
310
int OSSL_PARAM_set_uint(OSSL_PARAM *p, unsigned int val)
crypto/openssl/crypto/params.c
315
return OSSL_PARAM_set_uint32(p, (uint32_t)val);
crypto/openssl/crypto/params.c
317
return OSSL_PARAM_set_uint64(p, (uint64_t)val);
crypto/openssl/crypto/params.c
320
return general_set_uint(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
329
int OSSL_PARAM_get_long(const OSSL_PARAM *p, long int *val)
crypto/openssl/crypto/params.c
334
return OSSL_PARAM_get_int32(p, (int32_t *)val);
crypto/openssl/crypto/params.c
336
return OSSL_PARAM_get_int64(p, (int64_t *)val);
crypto/openssl/crypto/params.c
339
return general_get_int(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
342
int OSSL_PARAM_set_long(OSSL_PARAM *p, long int val)
crypto/openssl/crypto/params.c
347
return OSSL_PARAM_set_int32(p, (int32_t)val);
crypto/openssl/crypto/params.c
349
return OSSL_PARAM_set_int64(p, (int64_t)val);
crypto/openssl/crypto/params.c
352
return general_set_int(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
360
int OSSL_PARAM_get_ulong(const OSSL_PARAM *p, unsigned long int *val)
crypto/openssl/crypto/params.c
365
return OSSL_PARAM_get_uint32(p, (uint32_t *)val);
crypto/openssl/crypto/params.c
367
return OSSL_PARAM_get_uint64(p, (uint64_t *)val);
crypto/openssl/crypto/params.c
370
return general_get_uint(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
373
int OSSL_PARAM_set_ulong(OSSL_PARAM *p, unsigned long int val)
crypto/openssl/crypto/params.c
378
return OSSL_PARAM_set_uint32(p, (uint32_t)val);
crypto/openssl/crypto/params.c
380
return OSSL_PARAM_set_uint64(p, (uint64_t)val);
crypto/openssl/crypto/params.c
383
return general_set_uint(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
392
int OSSL_PARAM_get_int32(const OSSL_PARAM *p, int32_t *val)
crypto/openssl/crypto/params.c
394
if (val == NULL || p == NULL) {
crypto/openssl/crypto/params.c
410
*val = *(const int32_t *)p->data;
crypto/openssl/crypto/params.c
415
*val = (int32_t)i64;
crypto/openssl/crypto/params.c
422
return general_get_int(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
433
*val = (int32_t)u32;
crypto/openssl/crypto/params.c
441
*val = (int32_t)u64;
crypto/openssl/crypto/params.c
448
return general_get_int(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
458
*val = (int32_t)d;
crypto/openssl/crypto/params.c
472
int OSSL_PARAM_set_int32(OSSL_PARAM *p, int32_t val)
crypto/openssl/crypto/params.c
486
*(int32_t *)p->data = val;
crypto/openssl/crypto/params.c
490
*(int64_t *)p->data = (int64_t)val;
crypto/openssl/crypto/params.c
494
return general_set_int(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
495
} else if (p->data_type == OSSL_PARAM_UNSIGNED_INTEGER && val >= 0) {
crypto/openssl/crypto/params.c
502
*(uint32_t *)p->data = (uint32_t)val;
crypto/openssl/crypto/params.c
506
*(uint64_t *)p->data = (uint64_t)val;
crypto/openssl/crypto/params.c
510
return general_set_int(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
522
if (shift < 8 * sizeof(val) - 1) {
crypto/openssl/crypto/params.c
523
u32 = val < 0 ? -val : val;
crypto/openssl/crypto/params.c
529
*(double *)p->data = (double)val;
crypto/openssl/crypto/params.c
546
int OSSL_PARAM_get_uint32(const OSSL_PARAM *p, uint32_t *val)
crypto/openssl/crypto/params.c
548
if (val == NULL || p == NULL) {
crypto/openssl/crypto/params.c
564
*val = *(const uint32_t *)p->data;
crypto/openssl/crypto/params.c
569
*val = (uint32_t)u64;
crypto/openssl/crypto/params.c
576
return general_get_uint(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
586
*val = i32;
crypto/openssl/crypto/params.c
594
*val = (uint32_t)i64;
crypto/openssl/crypto/params.c
604
return general_get_uint(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
613
*val = (uint32_t)d;
crypto/openssl/crypto/params.c
627
int OSSL_PARAM_set_uint32(OSSL_PARAM *p, uint32_t val)
crypto/openssl/crypto/params.c
642
*(uint32_t *)p->data = val;
crypto/openssl/crypto/params.c
646
*(uint64_t *)p->data = val;
crypto/openssl/crypto/params.c
650
return general_set_uint(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
658
if (val <= INT32_MAX) {
crypto/openssl/crypto/params.c
659
*(int32_t *)p->data = (int32_t)val;
crypto/openssl/crypto/params.c
666
*(int64_t *)p->data = (int64_t)val;
crypto/openssl/crypto/params.c
670
return general_set_uint(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
682
if (shift < 8 * sizeof(val) && (val >> shift) != 0) {
crypto/openssl/crypto/params.c
686
*(double *)p->data = (double)val;
crypto/openssl/crypto/params.c
704
int OSSL_PARAM_get_int64(const OSSL_PARAM *p, int64_t *val)
crypto/openssl/crypto/params.c
706
if (val == NULL || p == NULL) {
crypto/openssl/crypto/params.c
720
*val = *(const int32_t *)p->data;
crypto/openssl/crypto/params.c
723
*val = *(const int64_t *)p->data;
crypto/openssl/crypto/params.c
727
return general_get_int(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
734
*val = *(const uint32_t *)p->data;
crypto/openssl/crypto/params.c
739
*val = (int64_t)u64;
crypto/openssl/crypto/params.c
746
return general_get_int(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
762
*val = (int64_t)d;
crypto/openssl/crypto/params.c
776
int OSSL_PARAM_set_int64(OSSL_PARAM *p, int64_t val)
crypto/openssl/crypto/params.c
791
if (val >= INT32_MIN && val <= INT32_MAX) {
crypto/openssl/crypto/params.c
793
*(int32_t *)p->data = (int32_t)val;
crypto/openssl/crypto/params.c
800
*(int64_t *)p->data = val;
crypto/openssl/crypto/params.c
804
return general_set_int(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
805
} else if (p->data_type == OSSL_PARAM_UNSIGNED_INTEGER && val >= 0) {
crypto/openssl/crypto/params.c
813
if (val <= UINT32_MAX) {
crypto/openssl/crypto/params.c
815
*(uint32_t *)p->data = (uint32_t)val;
crypto/openssl/crypto/params.c
822
*(uint64_t *)p->data = (uint64_t)val;
crypto/openssl/crypto/params.c
826
return general_set_int(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
837
u64 = val < 0 ? -val : val;
crypto/openssl/crypto/params.c
840
*(double *)p->data = (double)val;
crypto/openssl/crypto/params.c
859
int OSSL_PARAM_get_uint64(const OSSL_PARAM *p, uint64_t *val)
crypto/openssl/crypto/params.c
861
if (val == NULL || p == NULL) {
crypto/openssl/crypto/params.c
875
*val = *(const uint32_t *)p->data;
crypto/openssl/crypto/params.c
878
*val = *(const uint64_t *)p->data;
crypto/openssl/crypto/params.c
882
return general_get_uint(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
892
*val = (uint64_t)i32;
crypto/openssl/crypto/params.c
900
*val = (uint64_t)i64;
crypto/openssl/crypto/params.c
907
return general_get_uint(p, val, sizeof(*val));
crypto/openssl/crypto/params.c
923
*val = (uint64_t)d;
crypto/openssl/crypto/params.c
937
int OSSL_PARAM_set_uint64(OSSL_PARAM *p, uint64_t val)
crypto/openssl/crypto/params.c
953
if (val <= UINT32_MAX) {
crypto/openssl/crypto/params.c
955
*(uint32_t *)p->data = (uint32_t)val;
crypto/openssl/crypto/params.c
962
*(uint64_t *)p->data = val;
crypto/openssl/crypto/params.c
966
return general_set_uint(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
975
if (val <= INT32_MAX) {
crypto/openssl/crypto/params.c
977
*(int32_t *)p->data = (int32_t)val;
crypto/openssl/crypto/params.c
983
if (val <= INT64_MAX) {
crypto/openssl/crypto/params.c
985
*(int64_t *)p->data = (int64_t)val;
crypto/openssl/crypto/params.c
992
return general_set_uint(p, &val, sizeof(val));
crypto/openssl/crypto/params.c
997
if ((val >> real_shift()) == 0) {
crypto/openssl/crypto/params.c
999
*(double *)p->data = (double)val;
crypto/openssl/crypto/ppccap.c
110
unsigned long val = 0ul;
crypto/openssl/crypto/ppccap.c
112
if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
crypto/openssl/crypto/ppccap.c
115
return val;
crypto/openssl/crypto/ppccap.c
207
int val;
crypto/openssl/crypto/ppccap.c
208
size_t len = sizeof(val);
crypto/openssl/crypto/ppccap.c
210
if (sysctlbyname("hw.optional.64bitops", &val, &len, NULL, 0) == 0) {
crypto/openssl/crypto/ppccap.c
211
if (val)
crypto/openssl/crypto/ppccap.c
215
len = sizeof(val);
crypto/openssl/crypto/ppccap.c
216
if (sysctlbyname("hw.optional.altivec", &val, &len, NULL, 0) == 0) {
crypto/openssl/crypto/ppccap.c
217
if (val)
crypto/openssl/crypto/property/property_parse.c
671
static void put_num(int64_t val, char **buf, size_t *remain, size_t *needed)
crypto/openssl/crypto/property/property_parse.c
673
int64_t tmpval = val;
crypto/openssl/crypto/property/property_parse.c
688
BIO_snprintf(*buf, *remain, "%lld", (long long int)val);
crypto/openssl/crypto/property/property_parse.c
705
const char *val;
crypto/openssl/crypto/property/property_parse.c
727
val = ossl_property_name_str(ctx, prop->name_idx);
crypto/openssl/crypto/property/property_parse.c
728
if (val == NULL)
crypto/openssl/crypto/property/property_parse.c
730
put_str(val, &buf, &bufsize, &needed);
crypto/openssl/crypto/property/property_parse.c
741
val = ossl_property_value_str(ctx, prop->v.str_val);
crypto/openssl/crypto/property/property_parse.c
742
if (val == NULL)
crypto/openssl/crypto/property/property_parse.c
744
put_str(val, &buf, &bufsize, &needed);
crypto/openssl/crypto/provider_conf.c
276
const char *confvalue, int *val)
crypto/openssl/crypto/provider_conf.c
292
*val = 1;
crypto/openssl/crypto/provider_conf.c
300
*val = 0;
crypto/openssl/crypto/provider_core.c
859
char *val = NULL;
crypto/openssl/crypto/provider_core.c
864
param[0].data = (void *)&val;
crypto/openssl/crypto/provider_core.c
865
param[0].data_size = sizeof(val);
crypto/openssl/crypto/provider_core.c
871
&& val != NULL) {
crypto/openssl/crypto/provider_core.c
872
if ((strcmp(val, "1") == 0)
crypto/openssl/crypto/provider_core.c
873
|| (OPENSSL_strcasecmp(val, "yes") == 0)
crypto/openssl/crypto/provider_core.c
874
|| (OPENSSL_strcasecmp(val, "true") == 0)
crypto/openssl/crypto/provider_core.c
875
|| (OPENSSL_strcasecmp(val, "on") == 0))
crypto/openssl/crypto/provider_core.c
877
else if ((strcmp(val, "0") == 0)
crypto/openssl/crypto/provider_core.c
878
|| (OPENSSL_strcasecmp(val, "no") == 0)
crypto/openssl/crypto/provider_core.c
879
|| (OPENSSL_strcasecmp(val, "false") == 0)
crypto/openssl/crypto/provider_core.c
880
|| (OPENSSL_strcasecmp(val, "off") == 0))
crypto/openssl/crypto/rand/randfile.c
292
WCHAR *val = _alloca(envlen * sizeof(WCHAR));
crypto/openssl/crypto/rand/randfile.c
294
if (GetEnvironmentVariableW(var, val, envlen) < envlen
crypto/openssl/crypto/rand/randfile.c
295
&& (sz = WideCharToMultiByte(CP_UTF8, 0, val, -1, NULL, 0,
crypto/openssl/crypto/rand/randfile.c
299
if (WideCharToMultiByte(CP_UTF8, 0, val, -1, s, sz,
crypto/openssl/crypto/sha/keccak1600.c
50
static uint64_t ROL64(uint64_t val, int offset)
crypto/openssl/crypto/sha/keccak1600.c
53
return val;
crypto/openssl/crypto/sha/keccak1600.c
55
return (val << offset) | (val >> (64 - offset));
crypto/openssl/crypto/sha/keccak1600.c
57
uint32_t hi = (uint32_t)(val >> 32), lo = (uint32_t)val;
crypto/openssl/crypto/sparse_array.c
179
int ossl_sa_set(OPENSSL_SA *sa, ossl_uintmax_t posn, void *val)
crypto/openssl/crypto/sparse_array.c
210
if (val == NULL && *p != NULL)
crypto/openssl/crypto/sparse_array.c
212
else if (val != NULL && *p == NULL)
crypto/openssl/crypto/sparse_array.c
214
*p = val;
crypto/openssl/crypto/threads_none.c
197
int CRYPTO_THREAD_set_local(CRYPTO_THREAD_LOCAL *key, void *val)
crypto/openssl/crypto/threads_none.c
202
thread_local_storage[*key].data = val;
crypto/openssl/crypto/threads_none.c
228
int CRYPTO_atomic_add(int *val, int amount, int *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_none.c
230
*val += amount;
crypto/openssl/crypto/threads_none.c
231
*ret = *val;
crypto/openssl/crypto/threads_none.c
236
int CRYPTO_atomic_add64(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_none.c
239
*val += op;
crypto/openssl/crypto/threads_none.c
240
*ret = *val;
crypto/openssl/crypto/threads_none.c
245
int CRYPTO_atomic_and(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_none.c
248
*val &= op;
crypto/openssl/crypto/threads_none.c
249
*ret = *val;
crypto/openssl/crypto/threads_none.c
254
int CRYPTO_atomic_or(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_none.c
257
*val |= op;
crypto/openssl/crypto/threads_none.c
258
*ret = *val;
crypto/openssl/crypto/threads_none.c
263
int CRYPTO_atomic_load(uint64_t *val, uint64_t *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_none.c
265
*ret = *val;
crypto/openssl/crypto/threads_none.c
270
int CRYPTO_atomic_store(uint64_t *dst, uint64_t val, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_none.c
272
*dst = val;
crypto/openssl/crypto/threads_none.c
277
int CRYPTO_atomic_load_int(int *val, int *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_none.c
279
*ret = *val;
crypto/openssl/crypto/threads_pthread.c
750
int CRYPTO_THREAD_set_local(CRYPTO_THREAD_LOCAL *key, void *val)
crypto/openssl/crypto/threads_pthread.c
752
if (pthread_setspecific(*key, val) != 0)
crypto/openssl/crypto/threads_pthread.c
776
int CRYPTO_atomic_add(int *val, int amount, int *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_pthread.c
779
if (__atomic_is_lock_free(sizeof(*val), val)) {
crypto/openssl/crypto/threads_pthread.c
780
*ret = __atomic_add_fetch(val, amount, __ATOMIC_ACQ_REL);
crypto/openssl/crypto/threads_pthread.c
786
*ret = atomic_add_int_nv((volatile unsigned int *)val, amount);
crypto/openssl/crypto/threads_pthread.c
793
*val += amount;
crypto/openssl/crypto/threads_pthread.c
794
*ret = *val;
crypto/openssl/crypto/threads_pthread.c
802
int CRYPTO_atomic_add64(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_pthread.c
806
if (__atomic_is_lock_free(sizeof(*val), val)) {
crypto/openssl/crypto/threads_pthread.c
807
*ret = __atomic_add_fetch(val, op, __ATOMIC_ACQ_REL);
crypto/openssl/crypto/threads_pthread.c
813
*ret = atomic_add_64_nv(val, op);
crypto/openssl/crypto/threads_pthread.c
819
*val += op;
crypto/openssl/crypto/threads_pthread.c
820
*ret = *val;
crypto/openssl/crypto/threads_pthread.c
828
int CRYPTO_atomic_and(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_pthread.c
832
if (__atomic_is_lock_free(sizeof(*val), val)) {
crypto/openssl/crypto/threads_pthread.c
833
*ret = __atomic_and_fetch(val, op, __ATOMIC_ACQ_REL);
crypto/openssl/crypto/threads_pthread.c
839
*ret = atomic_and_64_nv(val, op);
crypto/openssl/crypto/threads_pthread.c
845
*val &= op;
crypto/openssl/crypto/threads_pthread.c
846
*ret = *val;
crypto/openssl/crypto/threads_pthread.c
854
int CRYPTO_atomic_or(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_pthread.c
858
if (__atomic_is_lock_free(sizeof(*val), val)) {
crypto/openssl/crypto/threads_pthread.c
859
*ret = __atomic_or_fetch(val, op, __ATOMIC_ACQ_REL);
crypto/openssl/crypto/threads_pthread.c
865
*ret = atomic_or_64_nv(val, op);
crypto/openssl/crypto/threads_pthread.c
871
*val |= op;
crypto/openssl/crypto/threads_pthread.c
872
*ret = *val;
crypto/openssl/crypto/threads_pthread.c
880
int CRYPTO_atomic_load(uint64_t *val, uint64_t *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_pthread.c
883
if (__atomic_is_lock_free(sizeof(*val), val)) {
crypto/openssl/crypto/threads_pthread.c
884
__atomic_load(val, ret, __ATOMIC_ACQUIRE);
crypto/openssl/crypto/threads_pthread.c
890
*ret = atomic_or_64_nv(val, 0);
crypto/openssl/crypto/threads_pthread.c
896
*ret = *val;
crypto/openssl/crypto/threads_pthread.c
903
int CRYPTO_atomic_store(uint64_t *dst, uint64_t val, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_pthread.c
907
__atomic_store(dst, &val, __ATOMIC_RELEASE);
crypto/openssl/crypto/threads_pthread.c
913
atomic_swap_64(dst, val);
crypto/openssl/crypto/threads_pthread.c
919
*dst = val;
crypto/openssl/crypto/threads_pthread.c
926
int CRYPTO_atomic_load_int(int *val, int *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_pthread.c
929
if (__atomic_is_lock_free(sizeof(*val), val)) {
crypto/openssl/crypto/threads_pthread.c
930
__atomic_load(val, ret, __ATOMIC_ACQUIRE);
crypto/openssl/crypto/threads_pthread.c
936
*ret = (int)atomic_or_uint_nv((unsigned int *)val, 0);
crypto/openssl/crypto/threads_pthread.c
942
*ret = *val;
crypto/openssl/crypto/threads_win.c
582
int CRYPTO_THREAD_set_local(CRYPTO_THREAD_LOCAL *key, void *val)
crypto/openssl/crypto/threads_win.c
584
if (TlsSetValue(*key, val) == 0)
crypto/openssl/crypto/threads_win.c
608
int CRYPTO_atomic_add(int *val, int amount, int *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_win.c
613
*val += amount;
crypto/openssl/crypto/threads_win.c
614
*ret = *val;
crypto/openssl/crypto/threads_win.c
621
*ret = (int)InterlockedExchangeAdd((LONG volatile *)val, (LONG)amount)
crypto/openssl/crypto/threads_win.c
627
int CRYPTO_atomic_add64(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_win.c
633
*val += op;
crypto/openssl/crypto/threads_win.c
634
*ret = *val;
crypto/openssl/crypto/threads_win.c
641
*ret = (uint64_t)InterlockedAdd64((LONG64 volatile *)val, (LONG64)op);
crypto/openssl/crypto/threads_win.c
646
int CRYPTO_atomic_and(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_win.c
652
*val &= op;
crypto/openssl/crypto/threads_win.c
653
*ret = *val;
crypto/openssl/crypto/threads_win.c
660
*ret = (uint64_t)InterlockedAnd64((LONG64 volatile *)val, (LONG64)op) & op;
crypto/openssl/crypto/threads_win.c
665
int CRYPTO_atomic_or(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/crypto/threads_win.c
671
*val |= op;
crypto/openssl/crypto/threads_win.c
672
*ret = *val;
crypto/openssl/crypto/threads_win.c
679
*ret = (uint64_t)InterlockedOr64((LONG64 volatile *)val, (LONG64)op) | op;
crypto/openssl/crypto/threads_win.c
684
int CRYPTO_atomic_load(uint64_t *val, uint64_t *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_win.c
689
*ret = *val;
crypto/openssl/crypto/threads_win.c
695
*ret = (uint64_t)InterlockedOr64((LONG64 volatile *)val, 0);
crypto/openssl/crypto/threads_win.c
700
int CRYPTO_atomic_store(uint64_t *dst, uint64_t val, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_win.c
705
*dst = val;
crypto/openssl/crypto/threads_win.c
711
InterlockedExchange64(dst, val);
crypto/openssl/crypto/threads_win.c
716
int CRYPTO_atomic_load_int(int *val, int *ret, CRYPTO_RWLOCK *lock)
crypto/openssl/crypto/threads_win.c
721
*ret = *val;
crypto/openssl/crypto/threads_win.c
728
*ret = (int)InterlockedOr((LONG volatile *)val, 0);
crypto/openssl/crypto/ts/ts_conf.c
337
CONF_VALUE *val = sk_CONF_VALUE_value(list, i);
crypto/openssl/crypto/ts/ts_conf.c
338
const char *extval = val->value ? val->value : val->name;
crypto/openssl/crypto/ts/ts_conf.c
378
CONF_VALUE *val = sk_CONF_VALUE_value(list, i);
crypto/openssl/crypto/ts/ts_conf.c
379
const char *extval = val->value ? val->value : val->name;
crypto/openssl/crypto/ts/ts_conf.c
409
CONF_VALUE *val = sk_CONF_VALUE_value(list, i);
crypto/openssl/crypto/ts/ts_conf.c
410
if (strcmp(val->name, ENV_VALUE_SECS) == 0) {
crypto/openssl/crypto/ts/ts_conf.c
411
if (val->value)
crypto/openssl/crypto/ts/ts_conf.c
412
secs = atoi(val->value);
crypto/openssl/crypto/ts/ts_conf.c
413
} else if (strcmp(val->name, ENV_VALUE_MILLISECS) == 0) {
crypto/openssl/crypto/ts/ts_conf.c
414
if (val->value)
crypto/openssl/crypto/ts/ts_conf.c
415
millis = atoi(val->value);
crypto/openssl/crypto/ts/ts_conf.c
416
} else if (strcmp(val->name, ENV_VALUE_MICROSECS) == 0) {
crypto/openssl/crypto/ts/ts_conf.c
417
if (val->value)
crypto/openssl/crypto/ts/ts_conf.c
418
micros = atoi(val->value);
crypto/openssl/crypto/x509/v3_addr.c
1012
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_addr.c
1024
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_addr.c
1037
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_addr.c
1042
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_addr.c
1047
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_addr.c
1063
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_addr.c
933
CONF_VALUE *val = sk_CONF_VALUE_value(values, i);
crypto/openssl/crypto/x509/v3_addr.c
939
if (!ossl_v3_name_cmp(val->name, "IPv4")) {
crypto/openssl/crypto/x509/v3_addr.c
941
} else if (!ossl_v3_name_cmp(val->name, "IPv6")) {
crypto/openssl/crypto/x509/v3_addr.c
943
} else if (!ossl_v3_name_cmp(val->name, "IPv4-SAFI")) {
crypto/openssl/crypto/x509/v3_addr.c
946
} else if (!ossl_v3_name_cmp(val->name, "IPv6-SAFI")) {
crypto/openssl/crypto/x509/v3_addr.c
951
"%s", val->name);
crypto/openssl/crypto/x509/v3_addr.c
971
if (val->value == NULL) {
crypto/openssl/crypto/x509/v3_addr.c
975
*safi = strtoul(val->value, &t, 0);
crypto/openssl/crypto/x509/v3_addr.c
979
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_addr.c
985
s = OPENSSL_strdup(val->value);
crypto/openssl/crypto/x509/v3_addr.c
997
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_admis.c
174
ASN1_STRING *val = sk_ASN1_STRING_value(pinfo->professionItems, k);
crypto/openssl/crypto/x509/v3_admis.c
177
|| ASN1_STRING_print(bp, val) <= 0
crypto/openssl/crypto/x509/v3_asid.c
509
CONF_VALUE *val = sk_CONF_VALUE_value(values, i);
crypto/openssl/crypto/x509/v3_asid.c
515
if (!ossl_v3_name_cmp(val->name, "AS")) {
crypto/openssl/crypto/x509/v3_asid.c
517
} else if (!ossl_v3_name_cmp(val->name, "RDI")) {
crypto/openssl/crypto/x509/v3_asid.c
521
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_asid.c
525
if (val->value == NULL) {
crypto/openssl/crypto/x509/v3_asid.c
533
if (strcmp(val->value, "inherit") == 0) {
crypto/openssl/crypto/x509/v3_asid.c
537
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_asid.c
544
i1 = strspn(val->value, "0123456789");
crypto/openssl/crypto/x509/v3_asid.c
545
if (val->value[i1] == '\0') {
crypto/openssl/crypto/x509/v3_asid.c
549
i2 = i1 + strspn(val->value + i1, " \t");
crypto/openssl/crypto/x509/v3_asid.c
550
if (val->value[i2] != '-') {
crypto/openssl/crypto/x509/v3_asid.c
552
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_asid.c
556
i2 = i2 + strspn(val->value + i2, " \t");
crypto/openssl/crypto/x509/v3_asid.c
557
i3 = i2 + strspn(val->value + i2, "0123456789");
crypto/openssl/crypto/x509/v3_asid.c
558
if (val->value[i3] != '\0') {
crypto/openssl/crypto/x509/v3_asid.c
560
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_asid.c
569
if (!X509V3_get_value_int(val, &min)) {
crypto/openssl/crypto/x509/v3_asid.c
574
char *s = OPENSSL_strdup(val->value);
crypto/openssl/crypto/x509/v3_battcons.c
61
CONF_VALUE *val;
crypto/openssl/crypto/x509/v3_battcons.c
69
val = sk_CONF_VALUE_value(values, i);
crypto/openssl/crypto/x509/v3_battcons.c
70
if (strcmp(val->name, "authority") == 0) {
crypto/openssl/crypto/x509/v3_battcons.c
71
if (!X509V3_get_value_bool(val, &battcons->authority))
crypto/openssl/crypto/x509/v3_battcons.c
73
} else if (strcmp(val->name, "pathlen") == 0) {
crypto/openssl/crypto/x509/v3_battcons.c
74
if (!X509V3_get_value_int(val, &battcons->pathlen))
crypto/openssl/crypto/x509/v3_battcons.c
78
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_bcons.c
60
CONF_VALUE *val;
crypto/openssl/crypto/x509/v3_bcons.c
68
val = sk_CONF_VALUE_value(values, i);
crypto/openssl/crypto/x509/v3_bcons.c
69
if (strcmp(val->name, "CA") == 0) {
crypto/openssl/crypto/x509/v3_bcons.c
70
if (!X509V3_get_value_bool(val, &bcons->ca))
crypto/openssl/crypto/x509/v3_bcons.c
72
} else if (strcmp(val->name, "pathlen") == 0) {
crypto/openssl/crypto/x509/v3_bcons.c
73
if (!X509V3_get_value_int(val, &bcons->pathlen))
crypto/openssl/crypto/x509/v3_bcons.c
77
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_bitst.c
60
CONF_VALUE *val;
crypto/openssl/crypto/x509/v3_bitst.c
69
val = sk_CONF_VALUE_value(nval, i);
crypto/openssl/crypto/x509/v3_bitst.c
71
if (strcmp(bnam->sname, val->name) == 0
crypto/openssl/crypto/x509/v3_bitst.c
72
|| strcmp(bnam->lname, val->name) == 0) {
crypto/openssl/crypto/x509/v3_bitst.c
83
"%s", val->name);
crypto/openssl/crypto/x509/v3_conf.c
314
const CONF_VALUE *val;
crypto/openssl/crypto/x509/v3_conf.c
320
val = sk_CONF_VALUE_value(nval, i);
crypto/openssl/crypto/x509/v3_conf.c
321
if (strcmp(val->name, "authorityKeyIdentifier") == 0)
crypto/openssl/crypto/x509/v3_conf.c
323
else if (strcmp(val->name, "subjectKeyIdentifier") == 0)
crypto/openssl/crypto/x509/v3_conf.c
327
val = sk_CONF_VALUE_value(nval, i);
crypto/openssl/crypto/x509/v3_conf.c
331
val = sk_CONF_VALUE_value(nval, skid);
crypto/openssl/crypto/x509/v3_conf.c
333
val = sk_CONF_VALUE_value(nval, akid);
crypto/openssl/crypto/x509/v3_conf.c
335
if ((ext = X509V3_EXT_nconf_int(conf, ctx, val->section,
crypto/openssl/crypto/x509/v3_conf.c
336
val->name, val->value))
crypto/openssl/crypto/x509/v3_crld.c
376
char *name, *val;
crypto/openssl/crypto/x509/v3_crld.c
386
val = cnf->value;
crypto/openssl/crypto/x509/v3_crld.c
405
if (!set_reasons(&idp->onlysomereasons, val))
crypto/openssl/crypto/x509/v3_extku.c
111
val = sk_CONF_VALUE_value(nval, i);
crypto/openssl/crypto/x509/v3_extku.c
112
if (val->value)
crypto/openssl/crypto/x509/v3_extku.c
113
extval = val->value;
crypto/openssl/crypto/x509/v3_extku.c
115
extval = val->name;
crypto/openssl/crypto/x509/v3_extku.c
99
CONF_VALUE *val;
crypto/openssl/crypto/x509/v3_group_ac.c
30
static char *i2s_GROUP_AC(const X509V3_EXT_METHOD *method, void *val)
crypto/openssl/crypto/x509/v3_ind_iss.c
30
static char *i2s_INDIRECT_ISSUER(const X509V3_EXT_METHOD *method, void *val)
crypto/openssl/crypto/x509/v3_ncons.c
152
CONF_VALUE tval, *val;
crypto/openssl/crypto/x509/v3_ncons.c
163
val = sk_CONF_VALUE_value(nval, i);
crypto/openssl/crypto/x509/v3_ncons.c
164
if (HAS_PREFIX(val->name, "permitted") && val->name[9]) {
crypto/openssl/crypto/x509/v3_ncons.c
166
tval.name = val->name + 10;
crypto/openssl/crypto/x509/v3_ncons.c
167
} else if (HAS_PREFIX(val->name, "excluded") && val->name[8]) {
crypto/openssl/crypto/x509/v3_ncons.c
169
tval.name = val->name + 9;
crypto/openssl/crypto/x509/v3_ncons.c
174
tval.value = val->value;
crypto/openssl/crypto/x509/v3_no_ass.c
30
static char *i2s_NO_ASSERTION(const X509V3_EXT_METHOD *method, void *val)
crypto/openssl/crypto/x509/v3_no_rev_avail.c
30
static char *i2s_NO_REV_AVAIL(const X509V3_EXT_METHOD *method, void *val)
crypto/openssl/crypto/x509/v3_pci.c
101
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
104
if ((*language = OBJ_txt2obj(val->value, 0)) == NULL) {
crypto/openssl/crypto/x509/v3_pci.c
106
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
109
} else if (strcmp(val->name, "pathlen") == 0) {
crypto/openssl/crypto/x509/v3_pci.c
113
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
116
if (!X509V3_get_value_int(val, pathlen)) {
crypto/openssl/crypto/x509/v3_pci.c
118
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
121
} else if (strcmp(val->name, "policy") == 0) {
crypto/openssl/crypto/x509/v3_pci.c
122
char *valp = val->value;
crypto/openssl/crypto/x509/v3_pci.c
130
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
139
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
160
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
170
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
185
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
199
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
209
val->value + 5, val_len);
crypto/openssl/crypto/x509/v3_pci.c
220
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
225
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
229
X509V3_conf_err(val);
crypto/openssl/crypto/x509/v3_pci.c
92
static int process_pci_value(CONF_VALUE *val,
crypto/openssl/crypto/x509/v3_pci.c
98
if (strcmp(val->name, "language") == 0) {
crypto/openssl/crypto/x509/v3_pcons.c
60
CONF_VALUE *val;
crypto/openssl/crypto/x509/v3_pcons.c
68
val = sk_CONF_VALUE_value(values, i);
crypto/openssl/crypto/x509/v3_pcons.c
69
if (strcmp(val->name, "requireExplicitPolicy") == 0) {
crypto/openssl/crypto/x509/v3_pcons.c
70
if (!X509V3_get_value_int(val, &pcons->requireExplicitPolicy))
crypto/openssl/crypto/x509/v3_pcons.c
72
} else if (strcmp(val->name, "inhibitPolicyMapping") == 0) {
crypto/openssl/crypto/x509/v3_pcons.c
73
if (!X509V3_get_value_int(val, &pcons->inhibitPolicyMapping))
crypto/openssl/crypto/x509/v3_pcons.c
77
"%s", val->name);
crypto/openssl/crypto/x509/v3_pmaps.c
69
CONF_VALUE *val;
crypto/openssl/crypto/x509/v3_pmaps.c
80
val = sk_CONF_VALUE_value(nval, i);
crypto/openssl/crypto/x509/v3_pmaps.c
81
if (!val->value || !val->name) {
crypto/openssl/crypto/x509/v3_pmaps.c
83
"%s", val->name);
crypto/openssl/crypto/x509/v3_pmaps.c
86
obj1 = OBJ_txt2obj(val->name, 0);
crypto/openssl/crypto/x509/v3_pmaps.c
87
obj2 = OBJ_txt2obj(val->value, 0);
crypto/openssl/crypto/x509/v3_pmaps.c
90
"%s", val->name);
crypto/openssl/crypto/x509/v3_prn.c
24
void X509V3_EXT_val_prn(BIO *out, STACK_OF(CONF_VALUE) *val, int indent,
crypto/openssl/crypto/x509/v3_prn.c
29
if (!val)
crypto/openssl/crypto/x509/v3_prn.c
31
if (!ml || !sk_CONF_VALUE_num(val)) {
crypto/openssl/crypto/x509/v3_prn.c
33
if (!sk_CONF_VALUE_num(val))
crypto/openssl/crypto/x509/v3_prn.c
36
for (i = 0; i < sk_CONF_VALUE_num(val); i++) {
crypto/openssl/crypto/x509/v3_prn.c
43
nval = sk_CONF_VALUE_value(val, i);
crypto/openssl/crypto/x509/v3_single_use.c
30
static char *i2s_SINGLE_USE(const X509V3_EXT_METHOD *method, void *val)
crypto/openssl/crypto/x509/v3_soa_id.c
30
static char *i2s_SOA_IDENTIFIER(const X509V3_EXT_METHOD *method, void *val)
crypto/openssl/crypto/x509/v3_tlsf.c
102
val = sk_CONF_VALUE_value(nval, i);
crypto/openssl/crypto/x509/v3_tlsf.c
103
if (val->value)
crypto/openssl/crypto/x509/v3_tlsf.c
104
extval = val->value;
crypto/openssl/crypto/x509/v3_tlsf.c
106
extval = val->name;
crypto/openssl/crypto/x509/v3_tlsf.c
117
X509V3_conf_add_error_name_value(val);
crypto/openssl/crypto/x509/v3_tlsf.c
91
CONF_VALUE *val;
crypto/openssl/crypto/x509/x509_local.h
12
#define X509V3_conf_add_error_name_value(val) \
crypto/openssl/crypto/x509/x509_local.h
13
ERR_add_error_data(4, "name=", (val)->name, ", value=", (val)->value)
crypto/openssl/crypto/x509/x509_vfy.c
3719
int ret, val;
crypto/openssl/crypto/x509/x509_vfy.c
3729
&val);
crypto/openssl/crypto/x509/x509_vfy.c
3730
return ret == 1 ? !val : -1;
crypto/openssl/crypto/x509/x_attrib.c
40
ASN1_TYPE *val = NULL;
crypto/openssl/crypto/x509/x_attrib.c
48
if ((val = ASN1_TYPE_new()) == NULL)
crypto/openssl/crypto/x509/x_attrib.c
50
if (!sk_ASN1_TYPE_push(ret->set, val))
crypto/openssl/crypto/x509/x_attrib.c
53
ASN1_TYPE_set(val, atrtype, value);
crypto/openssl/crypto/x509/x_attrib.c
57
ASN1_TYPE_free(val);
crypto/openssl/crypto/x509/x_ietfatt.c
121
OSSL_IETF_ATTR_SYNTAX_VALUE *val;
crypto/openssl/crypto/x509/x_ietfatt.c
123
val = sk_OSSL_IETF_ATTR_SYNTAX_VALUE_value(a->values, ind);
crypto/openssl/crypto/x509/x_ietfatt.c
124
if (val == NULL)
crypto/openssl/crypto/x509/x_ietfatt.c
128
*type = val->type;
crypto/openssl/crypto/x509/x_ietfatt.c
130
switch (val->type) {
crypto/openssl/crypto/x509/x_ietfatt.c
132
return val->u.octets;
crypto/openssl/crypto/x509/x_ietfatt.c
134
return val->u.oid;
crypto/openssl/crypto/x509/x_ietfatt.c
136
return val->u.string;
crypto/openssl/crypto/x509/x_ietfatt.c
145
OSSL_IETF_ATTR_SYNTAX_VALUE *val;
crypto/openssl/crypto/x509/x_ietfatt.c
161
if ((val = OSSL_IETF_ATTR_SYNTAX_VALUE_new()) == NULL)
crypto/openssl/crypto/x509/x_ietfatt.c
164
val->type = type;
crypto/openssl/crypto/x509/x_ietfatt.c
167
val->u.octets = data;
crypto/openssl/crypto/x509/x_ietfatt.c
170
val->u.oid = data;
crypto/openssl/crypto/x509/x_ietfatt.c
173
val->u.string = data;
crypto/openssl/crypto/x509/x_ietfatt.c
176
OSSL_IETF_ATTR_SYNTAX_VALUE_free(val);
crypto/openssl/crypto/x509/x_ietfatt.c
181
if (sk_OSSL_IETF_ATTR_SYNTAX_VALUE_push(a->values, val) <= 0) {
crypto/openssl/crypto/x509/x_ietfatt.c
182
OSSL_IETF_ATTR_SYNTAX_VALUE_free(val);
crypto/openssl/crypto/x509/x_ietfatt.c
72
OSSL_IETF_ATTR_SYNTAX_VALUE *val;
crypto/openssl/crypto/x509/x_ietfatt.c
74
val = sk_OSSL_IETF_ATTR_SYNTAX_VALUE_value(ias->values, i);
crypto/openssl/crypto/x509/x_ietfatt.c
76
ias->type = val->type;
crypto/openssl/crypto/x509/x_ietfatt.c
77
else if (val->type != ias->type)
crypto/openssl/crypto/x509/x_name.c
105
*val = (ASN1_VALUE *)ret;
crypto/openssl/crypto/x509/x_name.c
141
static int x509_name_ex_d2i(ASN1_VALUE **val,
crypto/openssl/crypto/x509/x_name.c
175
if (*val)
crypto/openssl/crypto/x509/x_name.c
176
x509_name_ex_free(val, NULL);
crypto/openssl/crypto/x509/x_name.c
201
*val = nm.a;
crypto/openssl/crypto/x509/x_name.c
214
static int x509_name_ex_i2d(const ASN1_VALUE **val, unsigned char **out,
crypto/openssl/crypto/x509/x_name.c
218
X509_NAME *a = (X509_NAME *)*val;
crypto/openssl/crypto/x509/x_name.c
26
static int x509_name_ex_d2i(ASN1_VALUE **val,
crypto/openssl/crypto/x509/x_name.c
31
static int x509_name_ex_i2d(const ASN1_VALUE **val, unsigned char **out,
crypto/openssl/crypto/x509/x_name.c
33
static int x509_name_ex_new(ASN1_VALUE **val, const ASN1_ITEM *it);
crypto/openssl/crypto/x509/x_name.c
34
static void x509_name_ex_free(ASN1_VALUE **val, const ASN1_ITEM *it);
crypto/openssl/crypto/x509/x_name.c
90
static int x509_name_ex_new(ASN1_VALUE **val, const ASN1_ITEM *it)
crypto/openssl/engines/e_ossltest.c
895
unsigned char val = 1;
crypto/openssl/engines/e_ossltest.c
898
*buf++ = val++;
crypto/openssl/fuzz/fuzz_rand.c
64
unsigned char val = 1;
crypto/openssl/fuzz/fuzz_rand.c
68
out[i] = val++;
crypto/openssl/fuzz/ml-dsa.c
34
static uint8_t *consume_uint8_t(const uint8_t *buf, size_t *len, uint8_t *val)
crypto/openssl/fuzz/ml-dsa.c
38
*val = *buf;
crypto/openssl/fuzz/ml-dsa.c
56
static uint8_t *consume_size_t(const uint8_t *buf, size_t *len, size_t *val)
crypto/openssl/fuzz/ml-dsa.c
60
*val = *buf;
crypto/openssl/fuzz/ml-kem.c
36
static uint8_t *consume_uint8t(const uint8_t *buf, size_t *len, uint8_t *val)
crypto/openssl/fuzz/ml-kem.c
40
*val = *buf;
crypto/openssl/fuzz/slh-dsa.c
37
static uint8_t *consume_uint8t(const uint8_t *buf, size_t *len, uint8_t *val)
crypto/openssl/fuzz/slh-dsa.c
41
*val = *buf;
crypto/openssl/include/crypto/modes.h
87
__inline u32 _bswap4(u32 val) {
crypto/openssl/include/crypto/modes.h
88
_asm mov eax, val _asm bswap eax
crypto/openssl/include/crypto/sparse_array.h
65
ossl_uintmax_t n, ctype *val) \
crypto/openssl/include/crypto/sparse_array.h
67
return ossl_sa_set((OPENSSL_SA *)sa, n, (void *)val); \
crypto/openssl/include/crypto/sparse_array.h
85
int ossl_sa_set(OPENSSL_SA *sa, ossl_uintmax_t n, void *val);
crypto/openssl/include/internal/packet.h
864
int WPACKET_put_bytes__(WPACKET *pkt, uint64_t val, size_t bytes);
crypto/openssl/include/internal/packet.h
870
#define WPACKET_put_bytes_u8(pkt, val) \
crypto/openssl/include/internal/packet.h
871
WPACKET_put_bytes__((pkt), (val), 1)
crypto/openssl/include/internal/packet.h
872
#define WPACKET_put_bytes_u16(pkt, val) \
crypto/openssl/include/internal/packet.h
873
WPACKET_put_bytes__((pkt), (val), 2)
crypto/openssl/include/internal/packet.h
874
#define WPACKET_put_bytes_u24(pkt, val) \
crypto/openssl/include/internal/packet.h
875
WPACKET_put_bytes__((pkt), (val), 3)
crypto/openssl/include/internal/packet.h
876
#define WPACKET_put_bytes_u32(pkt, val) \
crypto/openssl/include/internal/packet.h
877
WPACKET_put_bytes__((pkt), (val), 4)
crypto/openssl/include/internal/packet.h
878
#define WPACKET_put_bytes_u64(pkt, val) \
crypto/openssl/include/internal/packet.h
879
WPACKET_put_bytes__((pkt), (val), 8)
crypto/openssl/include/internal/refcount.h
101
*ret = __atomic_load_n(&refcnt->val, __ATOMIC_RELAXED);
crypto/openssl/include/internal/refcount.h
109
volatile int val;
crypto/openssl/include/internal/refcount.h
114
*ret = _InterlockedExchangeAdd((void *)&refcnt->val, 1) + 1;
crypto/openssl/include/internal/refcount.h
120
*ret = _InterlockedExchangeAdd((void *)&refcnt->val, -1) - 1;
crypto/openssl/include/internal/refcount.h
126
*ret = _InterlockedExchangeAdd((void *)&refcnt->val, 0);
crypto/openssl/include/internal/refcount.h
135
volatile int val;
crypto/openssl/include/internal/refcount.h
146
*ret = _InterlockedExchangeAdd_nf(&refcnt->val, 1) + 1;
crypto/openssl/include/internal/refcount.h
152
*ret = _InterlockedExchangeAdd(&refcnt->val, -1) - 1;
crypto/openssl/include/internal/refcount.h
158
*ret = _InterlockedExchangeAdd_acq((void *)&refcnt->val, 0);
crypto/openssl/include/internal/refcount.h
177
*ret = _InterlockedExchangeAdd(&refcnt->val, 1) + 1;
crypto/openssl/include/internal/refcount.h
183
*ret = _InterlockedExchangeAdd(&refcnt->val, -1) - 1;
crypto/openssl/include/internal/refcount.h
189
*ret = _InterlockedExchangeAdd(&refcnt->val, 0);
crypto/openssl/include/internal/refcount.h
206
int val;
crypto/openssl/include/internal/refcount.h
217
return CRYPTO_atomic_add(&refcnt->val, 1, ret, refcnt->lock);
crypto/openssl/include/internal/refcount.h
223
return CRYPTO_atomic_add(&refcnt->val, -1, ret, refcnt->lock);
crypto/openssl/include/internal/refcount.h
229
return CRYPTO_atomic_load_int(&refcnt->val, ret, refcnt->lock);
crypto/openssl/include/internal/refcount.h
235
refcnt->val = n;
crypto/openssl/include/internal/refcount.h
255
refcnt->val++;
crypto/openssl/include/internal/refcount.h
256
*ret = refcnt->val;
crypto/openssl/include/internal/refcount.h
263
refcnt->val--;
crypto/openssl/include/internal/refcount.h
264
*ret = refcnt->val;
crypto/openssl/include/internal/refcount.h
271
*ret = refcnt->val;
crypto/openssl/include/internal/refcount.h
281
refcnt->val = n;
crypto/openssl/include/internal/refcount.h
300
#define REF_PRINT_COUNT(text, val, object) \
crypto/openssl/include/internal/refcount.h
301
REF_PRINT_EX(text, val, (void *)object)
crypto/openssl/include/internal/refcount.h
36
_Atomic int val;
crypto/openssl/include/internal/refcount.h
41
*ret = atomic_fetch_add_explicit(&refcnt->val, 1, memory_order_relaxed) + 1;
crypto/openssl/include/internal/refcount.h
62
*ret = atomic_fetch_sub_explicit(&refcnt->val, 1, memory_order_acq_rel) - 1;
crypto/openssl/include/internal/refcount.h
64
*ret = atomic_fetch_sub_explicit(&refcnt->val, 1, memory_order_release) - 1;
crypto/openssl/include/internal/refcount.h
73
*ret = atomic_load_explicit(&refcnt->val, memory_order_acquire);
crypto/openssl/include/internal/refcount.h
82
int val;
crypto/openssl/include/internal/refcount.h
87
*ret = __atomic_fetch_add(&refcnt->val, 1, __ATOMIC_RELAXED) + 1;
crypto/openssl/include/internal/refcount.h
93
*ret = __atomic_fetch_sub(&refcnt->val, 1, __ATOMIC_RELEASE) - 1;
crypto/openssl/include/internal/tsan_assist.h
104
#define tsan_store(ptr, val) (sizeof(*(ptr)) == 8 ? __iso_volatile_store64((ptr), (val)) \
crypto/openssl/include/internal/tsan_assist.h
105
: __iso_volatile_store32((ptr), (val)))
crypto/openssl/include/internal/tsan_assist.h
108
#define tsan_store(ptr, val) __iso_volatile_store32((ptr), (val))
crypto/openssl/include/internal/tsan_assist.h
112
#define tsan_store(ptr, val) (*(ptr) = (val))
crypto/openssl/include/internal/tsan_assist.h
124
#define tsan_st_rel(ptr, val) (*(ptr) = (val))
crypto/openssl/include/internal/tsan_assist.h
139
#define tsan_store(ptr, val) (*(ptr) = (val))
crypto/openssl/include/internal/tsan_assist.h
62
#define tsan_store(ptr, val) atomic_store_explicit((ptr), (val), memory_order_relaxed)
crypto/openssl/include/internal/tsan_assist.h
65
#define tsan_st_rel(ptr, val) atomic_store_explicit((ptr), (val), memory_order_release)
crypto/openssl/include/internal/tsan_assist.h
74
#define tsan_store(ptr, val) __atomic_store_n((ptr), (val), __ATOMIC_RELAXED)
crypto/openssl/include/internal/tsan_assist.h
77
#define tsan_st_rel(ptr, val) __atomic_store_n((ptr), (val), __ATOMIC_RELEASE)
crypto/openssl/include/openssl/asn1.h
1022
void ASN1_item_free(ASN1_VALUE *val, const ASN1_ITEM *it);
crypto/openssl/include/openssl/asn1.h
1023
ASN1_VALUE *ASN1_item_d2i_ex(ASN1_VALUE **val, const unsigned char **in,
crypto/openssl/include/openssl/asn1.h
1026
ASN1_VALUE *ASN1_item_d2i(ASN1_VALUE **val, const unsigned char **in,
crypto/openssl/include/openssl/asn1.h
1028
int ASN1_item_i2d(const ASN1_VALUE *val, unsigned char **out, const ASN1_ITEM *it);
crypto/openssl/include/openssl/asn1.h
1029
int ASN1_item_ndef_i2d(const ASN1_VALUE *val, unsigned char **out,
crypto/openssl/include/openssl/asn1.h
1086
BIO *BIO_new_NDEF(BIO *out, ASN1_VALUE *val, const ASN1_ITEM *it);
crypto/openssl/include/openssl/asn1.h
1088
int i2d_ASN1_bio_stream(BIO *out, ASN1_VALUE *val, BIO *in, int flags,
crypto/openssl/include/openssl/asn1.h
1090
int PEM_write_bio_ASN1_stream(BIO *out, ASN1_VALUE *val, BIO *in, int flags,
crypto/openssl/include/openssl/asn1.h
1093
int SMIME_write_ASN1(BIO *bio, ASN1_VALUE *val, BIO *data, int flags,
crypto/openssl/include/openssl/asn1.h
1096
int SMIME_write_ASN1_ex(BIO *bio, ASN1_VALUE *val, BIO *data, int flags,
crypto/openssl/include/openssl/asn1.h
787
int UTF8_getc(const unsigned char *str, int len, unsigned long *val);
crypto/openssl/include/openssl/asn1.h
967
BIO *ASN1_item_i2d_mem_bio(const ASN1_ITEM *it, const ASN1_VALUE *val);
crypto/openssl/include/openssl/asn1t.h
467
#define ADB_ENTRY(val, template) { val, template }
crypto/openssl/include/openssl/byteorder.h
103
*out++ = (val & 0xff);
crypto/openssl/include/openssl/byteorder.h
104
*out++ = (val >> 8) & 0xff;
crypto/openssl/include/openssl/byteorder.h
110
OPENSSL_store_u16_be(unsigned char *out, uint16_t val)
crypto/openssl/include/openssl/byteorder.h
113
uint16_t t = OSSL_HTOBE16(val);
crypto/openssl/include/openssl/byteorder.h
118
*out++ = (val >> 8) & 0xff;
crypto/openssl/include/openssl/byteorder.h
119
*out++ = (val & 0xff);
crypto/openssl/include/openssl/byteorder.h
125
OPENSSL_store_u32_le(unsigned char *out, uint32_t val)
crypto/openssl/include/openssl/byteorder.h
128
uint32_t t = OSSL_HTOLE32(val);
crypto/openssl/include/openssl/byteorder.h
133
*out++ = (val & 0xff);
crypto/openssl/include/openssl/byteorder.h
134
*out++ = (val >> 8) & 0xff;
crypto/openssl/include/openssl/byteorder.h
135
*out++ = (val >> 16) & 0xff;
crypto/openssl/include/openssl/byteorder.h
136
*out++ = (val >> 24) & 0xff;
crypto/openssl/include/openssl/byteorder.h
142
OPENSSL_store_u32_be(unsigned char *out, uint32_t val)
crypto/openssl/include/openssl/byteorder.h
145
uint32_t t = OSSL_HTOBE32(val);
crypto/openssl/include/openssl/byteorder.h
150
*out++ = (val >> 24) & 0xff;
crypto/openssl/include/openssl/byteorder.h
151
*out++ = (val >> 16) & 0xff;
crypto/openssl/include/openssl/byteorder.h
152
*out++ = (val >> 8) & 0xff;
crypto/openssl/include/openssl/byteorder.h
153
*out++ = (val & 0xff);
crypto/openssl/include/openssl/byteorder.h
159
OPENSSL_store_u64_le(unsigned char *out, uint64_t val)
crypto/openssl/include/openssl/byteorder.h
162
uint64_t t = OSSL_HTOLE64(val);
crypto/openssl/include/openssl/byteorder.h
167
*out++ = (val & 0xff);
crypto/openssl/include/openssl/byteorder.h
168
*out++ = (val >> 8) & 0xff;
crypto/openssl/include/openssl/byteorder.h
169
*out++ = (val >> 16) & 0xff;
crypto/openssl/include/openssl/byteorder.h
170
*out++ = (val >> 24) & 0xff;
crypto/openssl/include/openssl/byteorder.h
171
*out++ = (val >> 32) & 0xff;
crypto/openssl/include/openssl/byteorder.h
172
*out++ = (val >> 40) & 0xff;
crypto/openssl/include/openssl/byteorder.h
173
*out++ = (val >> 48) & 0xff;
crypto/openssl/include/openssl/byteorder.h
174
*out++ = (val >> 56) & 0xff;
crypto/openssl/include/openssl/byteorder.h
180
OPENSSL_store_u64_be(unsigned char *out, uint64_t val)
crypto/openssl/include/openssl/byteorder.h
183
uint64_t t = OSSL_HTOBE64(val);
crypto/openssl/include/openssl/byteorder.h
188
*out++ = (val >> 56) & 0xff;
crypto/openssl/include/openssl/byteorder.h
189
*out++ = (val >> 48) & 0xff;
crypto/openssl/include/openssl/byteorder.h
190
*out++ = (val >> 40) & 0xff;
crypto/openssl/include/openssl/byteorder.h
191
*out++ = (val >> 32) & 0xff;
crypto/openssl/include/openssl/byteorder.h
192
*out++ = (val >> 24) & 0xff;
crypto/openssl/include/openssl/byteorder.h
193
*out++ = (val >> 16) & 0xff;
crypto/openssl/include/openssl/byteorder.h
194
*out++ = (val >> 8) & 0xff;
crypto/openssl/include/openssl/byteorder.h
195
*out++ = (val & 0xff);
crypto/openssl/include/openssl/byteorder.h
201
OPENSSL_load_u16_le(uint16_t *val, const unsigned char *in)
crypto/openssl/include/openssl/byteorder.h
207
*val = OSSL_LE16TOH(t);
crypto/openssl/include/openssl/byteorder.h
213
*val = b0 | (b1 << 8);
crypto/openssl/include/openssl/byteorder.h
219
OPENSSL_load_u16_be(uint16_t *val, const unsigned char *in)
crypto/openssl/include/openssl/byteorder.h
225
*val = OSSL_BE16TOH(t);
crypto/openssl/include/openssl/byteorder.h
231
*val = b0 | (b1 << 8);
crypto/openssl/include/openssl/byteorder.h
237
OPENSSL_load_u32_le(uint32_t *val, const unsigned char *in)
crypto/openssl/include/openssl/byteorder.h
243
*val = OSSL_LE32TOH(t);
crypto/openssl/include/openssl/byteorder.h
251
*val = b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
crypto/openssl/include/openssl/byteorder.h
257
OPENSSL_load_u32_be(uint32_t *val, const unsigned char *in)
crypto/openssl/include/openssl/byteorder.h
263
*val = OSSL_BE32TOH(t);
crypto/openssl/include/openssl/byteorder.h
271
*val = b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
crypto/openssl/include/openssl/byteorder.h
277
OPENSSL_load_u64_le(uint64_t *val, const unsigned char *in)
crypto/openssl/include/openssl/byteorder.h
283
*val = OSSL_LE64TOH(t);
crypto/openssl/include/openssl/byteorder.h
295
*val = b0 | (b1 << 8) | (b2 << 16) | (b3 << 24)
crypto/openssl/include/openssl/byteorder.h
302
OPENSSL_load_u64_be(uint64_t *val, const unsigned char *in)
crypto/openssl/include/openssl/byteorder.h
308
*val = OSSL_BE64TOH(t);
crypto/openssl/include/openssl/byteorder.h
320
*val = b0 | (b1 << 8) | (b2 << 16) | (b3 << 24)
crypto/openssl/include/openssl/byteorder.h
95
OPENSSL_store_u16_le(unsigned char *out, uint16_t val)
crypto/openssl/include/openssl/byteorder.h
98
uint16_t t = OSSL_HTOLE16(val);
crypto/openssl/include/openssl/cmp.h
522
int OSSL_CMP_CTX_set_option(OSSL_CMP_CTX *ctx, int opt, int val);
crypto/openssl/include/openssl/cmp.h
697
int val);
crypto/openssl/include/openssl/cmp.h
698
int OSSL_CMP_SRV_CTX_set_accept_unprotected(OSSL_CMP_SRV_CTX *srv_ctx, int val);
crypto/openssl/include/openssl/cmp.h
699
int OSSL_CMP_SRV_CTX_set_accept_raverified(OSSL_CMP_SRV_CTX *srv_ctx, int val);
crypto/openssl/include/openssl/cmp.h
701
int val);
crypto/openssl/include/openssl/crypto.h
286
int CRYPTO_set_ex_data(CRYPTO_EX_DATA *ad, int idx, void *val);
crypto/openssl/include/openssl/crypto.h
329
#define CRYPTO_THREADID_set_numeric(id, val)
crypto/openssl/include/openssl/crypto.h
563
int CRYPTO_THREAD_set_local(CRYPTO_THREAD_LOCAL *key, void *val);
crypto/openssl/include/openssl/crypto.h
89
int CRYPTO_atomic_add(int *val, int amount, int *ret, CRYPTO_RWLOCK *lock);
crypto/openssl/include/openssl/crypto.h
90
int CRYPTO_atomic_add64(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/include/openssl/crypto.h
92
int CRYPTO_atomic_and(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/include/openssl/crypto.h
94
int CRYPTO_atomic_or(uint64_t *val, uint64_t op, uint64_t *ret,
crypto/openssl/include/openssl/crypto.h
96
int CRYPTO_atomic_load(uint64_t *val, uint64_t *ret, CRYPTO_RWLOCK *lock);
crypto/openssl/include/openssl/crypto.h
97
int CRYPTO_atomic_load_int(int *val, int *ret, CRYPTO_RWLOCK *lock);
crypto/openssl/include/openssl/crypto.h
98
int CRYPTO_atomic_store(uint64_t *dst, uint64_t val, CRYPTO_RWLOCK *lock);
crypto/openssl/include/openssl/ocsp.h
311
int OCSP_request_add1_nonce(OCSP_REQUEST *req, unsigned char *val, int len);
crypto/openssl/include/openssl/ocsp.h
312
int OCSP_basic_add1_nonce(OCSP_BASICRESP *resp, unsigned char *val, int len);
crypto/openssl/include/openssl/param_build.h
26
int OSSL_PARAM_BLD_push_int(OSSL_PARAM_BLD *bld, const char *key, int val);
crypto/openssl/include/openssl/param_build.h
28
unsigned int val);
crypto/openssl/include/openssl/param_build.h
30
long int val);
crypto/openssl/include/openssl/param_build.h
32
unsigned long int val);
crypto/openssl/include/openssl/param_build.h
34
int32_t val);
crypto/openssl/include/openssl/param_build.h
36
uint32_t val);
crypto/openssl/include/openssl/param_build.h
38
int64_t val);
crypto/openssl/include/openssl/param_build.h
40
uint64_t val);
crypto/openssl/include/openssl/param_build.h
42
size_t val);
crypto/openssl/include/openssl/param_build.h
44
time_t val);
crypto/openssl/include/openssl/param_build.h
46
double val);
crypto/openssl/include/openssl/params.h
106
int OSSL_PARAM_get_int(const OSSL_PARAM *p, int *val);
crypto/openssl/include/openssl/params.h
107
int OSSL_PARAM_get_uint(const OSSL_PARAM *p, unsigned int *val);
crypto/openssl/include/openssl/params.h
108
int OSSL_PARAM_get_long(const OSSL_PARAM *p, long int *val);
crypto/openssl/include/openssl/params.h
109
int OSSL_PARAM_get_ulong(const OSSL_PARAM *p, unsigned long int *val);
crypto/openssl/include/openssl/params.h
110
int OSSL_PARAM_get_int32(const OSSL_PARAM *p, int32_t *val);
crypto/openssl/include/openssl/params.h
111
int OSSL_PARAM_get_uint32(const OSSL_PARAM *p, uint32_t *val);
crypto/openssl/include/openssl/params.h
112
int OSSL_PARAM_get_int64(const OSSL_PARAM *p, int64_t *val);
crypto/openssl/include/openssl/params.h
113
int OSSL_PARAM_get_uint64(const OSSL_PARAM *p, uint64_t *val);
crypto/openssl/include/openssl/params.h
114
int OSSL_PARAM_get_size_t(const OSSL_PARAM *p, size_t *val);
crypto/openssl/include/openssl/params.h
115
int OSSL_PARAM_get_time_t(const OSSL_PARAM *p, time_t *val);
crypto/openssl/include/openssl/params.h
117
int OSSL_PARAM_set_int(OSSL_PARAM *p, int val);
crypto/openssl/include/openssl/params.h
118
int OSSL_PARAM_set_uint(OSSL_PARAM *p, unsigned int val);
crypto/openssl/include/openssl/params.h
119
int OSSL_PARAM_set_long(OSSL_PARAM *p, long int val);
crypto/openssl/include/openssl/params.h
120
int OSSL_PARAM_set_ulong(OSSL_PARAM *p, unsigned long int val);
crypto/openssl/include/openssl/params.h
121
int OSSL_PARAM_set_int32(OSSL_PARAM *p, int32_t val);
crypto/openssl/include/openssl/params.h
122
int OSSL_PARAM_set_uint32(OSSL_PARAM *p, uint32_t val);
crypto/openssl/include/openssl/params.h
123
int OSSL_PARAM_set_int64(OSSL_PARAM *p, int64_t val);
crypto/openssl/include/openssl/params.h
124
int OSSL_PARAM_set_uint64(OSSL_PARAM *p, uint64_t val);
crypto/openssl/include/openssl/params.h
125
int OSSL_PARAM_set_size_t(OSSL_PARAM *p, size_t val);
crypto/openssl/include/openssl/params.h
126
int OSSL_PARAM_set_time_t(OSSL_PARAM *p, time_t val);
crypto/openssl/include/openssl/params.h
128
int OSSL_PARAM_get_double(const OSSL_PARAM *p, double *val);
crypto/openssl/include/openssl/params.h
129
int OSSL_PARAM_set_double(OSSL_PARAM *p, double val);
crypto/openssl/include/openssl/params.h
131
int OSSL_PARAM_get_BN(const OSSL_PARAM *p, BIGNUM **val);
crypto/openssl/include/openssl/params.h
132
int OSSL_PARAM_set_BN(OSSL_PARAM *p, const BIGNUM *val);
crypto/openssl/include/openssl/params.h
134
int OSSL_PARAM_get_utf8_string(const OSSL_PARAM *p, char **val, size_t max_len);
crypto/openssl/include/openssl/params.h
135
int OSSL_PARAM_set_utf8_string(OSSL_PARAM *p, const char *val);
crypto/openssl/include/openssl/params.h
137
int OSSL_PARAM_get_octet_string(const OSSL_PARAM *p, void **val, size_t max_len,
crypto/openssl/include/openssl/params.h
139
int OSSL_PARAM_set_octet_string(OSSL_PARAM *p, const void *val, size_t len);
crypto/openssl/include/openssl/params.h
141
int OSSL_PARAM_get_utf8_ptr(const OSSL_PARAM *p, const char **val);
crypto/openssl/include/openssl/params.h
142
int OSSL_PARAM_set_utf8_ptr(OSSL_PARAM *p, const char *val);
crypto/openssl/include/openssl/params.h
144
int OSSL_PARAM_get_octet_ptr(const OSSL_PARAM *p, const void **val,
crypto/openssl/include/openssl/params.h
146
int OSSL_PARAM_set_octet_ptr(OSSL_PARAM *p, const void *val,
crypto/openssl/include/openssl/params.h
149
int OSSL_PARAM_get_utf8_string_ptr(const OSSL_PARAM *p, const char **val);
crypto/openssl/include/openssl/params.h
150
int OSSL_PARAM_get_octet_string_ptr(const OSSL_PARAM *p, const void **val,
crypto/openssl/include/openssl/ssl.h
2124
void SSL_CTX_set_post_handshake_auth(SSL_CTX *ctx, int val);
crypto/openssl/include/openssl/ssl.h
2125
void SSL_set_post_handshake_auth(SSL *s, int val);
crypto/openssl/include/openssl/ssl.h
2197
void (*cb)(const SSL *ssl, int type, int val));
crypto/openssl/include/openssl/ssl.h
2199
int val);
crypto/openssl/include/openssl/ssl.h
2913
__owur int SSL_set1_client_cert_type(SSL *s, const unsigned char *val, size_t len);
crypto/openssl/include/openssl/ssl.h
2914
__owur int SSL_set1_server_cert_type(SSL *s, const unsigned char *val, size_t len);
crypto/openssl/include/openssl/ssl.h
2915
__owur int SSL_CTX_set1_client_cert_type(SSL_CTX *ctx, const unsigned char *val, size_t len);
crypto/openssl/include/openssl/ssl.h
2916
__owur int SSL_CTX_set1_server_cert_type(SSL_CTX *ctx, const unsigned char *val, size_t len);
crypto/openssl/include/openssl/ssl.h
768
void (*cb)(const SSL *ssl, int type, int val));
crypto/openssl/include/openssl/ssl.h
770
int val);
crypto/openssl/include/openssl/x509v3.h
1000
void X509V3_EXT_val_prn(BIO *out, STACK_OF(CONF_VALUE) *val, int indent,
crypto/openssl/include/openssl/x509v3.h
632
#define X509V3_conf_err(val) ERR_add_error_data(6, \
crypto/openssl/include/openssl/x509v3.h
633
"section:", (val)->section, \
crypto/openssl/include/openssl/x509v3.h
634
",name:", (val)->name, ",value:", (val)->value)
crypto/openssl/include/openssl/x509v3.h
920
void X509V3_conf_free(CONF_VALUE *val);
crypto/openssl/providers/common/provider_ctx.c
105
const char *val = ossl_prov_ctx_get_param(ctx, name, NULL);
crypto/openssl/providers/common/provider_ctx.c
107
if (val != NULL) {
crypto/openssl/providers/common/provider_ctx.c
108
if ((strcmp(val, "1") == 0)
crypto/openssl/providers/common/provider_ctx.c
109
|| (OPENSSL_strcasecmp(val, "yes") == 0)
crypto/openssl/providers/common/provider_ctx.c
110
|| (OPENSSL_strcasecmp(val, "true") == 0)
crypto/openssl/providers/common/provider_ctx.c
111
|| (OPENSSL_strcasecmp(val, "on") == 0))
crypto/openssl/providers/common/provider_ctx.c
113
else if ((strcmp(val, "0") == 0)
crypto/openssl/providers/common/provider_ctx.c
114
|| (OPENSSL_strcasecmp(val, "no") == 0)
crypto/openssl/providers/common/provider_ctx.c
115
|| (OPENSSL_strcasecmp(val, "false") == 0)
crypto/openssl/providers/common/provider_ctx.c
116
|| (OPENSSL_strcasecmp(val, "off") == 0))
crypto/openssl/providers/common/provider_ctx.c
81
char *val = NULL;
crypto/openssl/providers/common/provider_ctx.c
91
param[0].data = (void *)&val;
crypto/openssl/providers/common/provider_ctx.c
92
param[0].data_size = sizeof(val);
crypto/openssl/providers/common/provider_ctx.c
98
&& val != NULL)
crypto/openssl/providers/common/provider_ctx.c
99
return val;
crypto/openssl/providers/implementations/kdfs/tls1_prf.c
361
const void *val = NULL;
crypto/openssl/providers/implementations/kdfs/tls1_prf.c
367
if (!OSSL_PARAM_get_octet_string_ptr(p, &val, &sz))
crypto/openssl/providers/implementations/kdfs/tls1_prf.c
380
memcpy(ctx->seed + ctx->seedlen, val, sz);
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1038
#define COPY_INT_PARAM(params, key, val) \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1040
if (p != NULL && !OSSL_PARAM_get_int(p, &val)) \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1043
#define COPY_UTF8_PARAM(params, key, val) \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1048
OPENSSL_free(val); \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1049
val = OPENSSL_strdup(p->data); \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1050
if (val == NULL) \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1054
#define COPY_OCTET_PARAM(params, key, val, len) \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1059
OPENSSL_free(val); \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1061
val = OPENSSL_memdup(p->data, p->data_size); \
crypto/openssl/providers/implementations/keymgmt/ec_kmgmt.c
1062
if (val == NULL) \
crypto/openssl/providers/implementations/keymgmt/mlx_kmgmt.c
343
void *val;
crypto/openssl/providers/implementations/keymgmt/mlx_kmgmt.c
359
val = (void *)(in + off);
crypto/openssl/providers/implementations/keymgmt/mlx_kmgmt.c
364
parr[0] = OSSL_PARAM_construct_octet_string(pname, val, len);
crypto/openssl/ssl/d1_msg.c
43
void (*cb)(const SSL *ssl, int type, int val) = NULL;
crypto/openssl/ssl/record/rec_layer_d1.c
204
void (*cb)(const SSL *ssl, int type2, int val) = NULL;
crypto/openssl/ssl/record/rec_layer_s3.c
629
void (*cb)(const SSL *ssl, int type2, int val) = NULL;
crypto/openssl/ssl/s3_msg.c
82
void (*cb)(const SSL *ssl, int type, int val) = NULL;
crypto/openssl/ssl/ssl_lib.c
5604
void (*cb)(const SSL *ssl, int type, int val))
crypto/openssl/ssl/ssl_lib.c
7328
void SSL_CTX_set_post_handshake_auth(SSL_CTX *ctx, int val)
crypto/openssl/ssl/ssl_lib.c
7330
ctx->pha_enabled = val;
crypto/openssl/ssl/ssl_lib.c
7333
void SSL_set_post_handshake_auth(SSL *ssl, int val)
crypto/openssl/ssl/ssl_lib.c
7340
sc->pha_enabled = val;
crypto/openssl/ssl/ssl_lib.c
8190
static int validate_cert_type(const unsigned char *val, size_t len)
crypto/openssl/ssl/ssl_lib.c
8196
if (val == NULL && len == 0)
crypto/openssl/ssl/ssl_lib.c
8199
if (val == NULL || len == 0)
crypto/openssl/ssl/ssl_lib.c
8203
switch (val[i]) {
crypto/openssl/ssl/ssl_lib.c
8225
const unsigned char *val,
crypto/openssl/ssl/ssl_lib.c
8230
if (!validate_cert_type(val, len))
crypto/openssl/ssl/ssl_lib.c
8233
if (val != NULL && (tmp = OPENSSL_memdup(val, len)) == NULL)
crypto/openssl/ssl/ssl_lib.c
8242
int SSL_set1_client_cert_type(SSL *s, const unsigned char *val, size_t len)
crypto/openssl/ssl/ssl_lib.c
8250
val, len);
crypto/openssl/ssl/ssl_lib.c
8253
int SSL_set1_server_cert_type(SSL *s, const unsigned char *val, size_t len)
crypto/openssl/ssl/ssl_lib.c
8261
val, len);
crypto/openssl/ssl/ssl_lib.c
8264
int SSL_CTX_set1_client_cert_type(SSL_CTX *ctx, const unsigned char *val, size_t len)
crypto/openssl/ssl/ssl_lib.c
8267
val, len);
crypto/openssl/ssl/ssl_lib.c
8270
int SSL_CTX_set1_server_cert_type(SSL_CTX *ctx, const unsigned char *val, size_t len)
crypto/openssl/ssl/ssl_lib.c
8273
val, len);
crypto/openssl/ssl/ssl_local.h
1567
void (*info_callback)(const SSL *ssl, int type, int val);
crypto/openssl/ssl/ssl_local.h
906
void (*info_callback)(const SSL *ssl, int type, int val);
crypto/openssl/ssl/ssl_sess.c
1389
void (*cb)(const SSL *ssl, int type, int val))
crypto/openssl/ssl/ssl_sess.c
1395
int val)
crypto/openssl/ssl/statem/statem.c
358
void (*cb)(const SSL *ssl, int type, int val) = NULL;
crypto/openssl/ssl/statem/statem.c
596
void (*cb)(const SSL *ssl, int type, int val) = NULL;
crypto/openssl/ssl/statem/statem.c
816
void (*cb)(const SSL *ssl, int type, int val) = NULL;
crypto/openssl/ssl/statem/statem_lib.c
1434
void (*cb)(const SSL *ssl, int type, int val) = NULL;
crypto/openssl/ssl/t1_enc.c
438
unsigned char *val = NULL;
crypto/openssl/ssl/t1_enc.c
461
val = OPENSSL_malloc(vallen);
crypto/openssl/ssl/t1_enc.c
462
if (val == NULL)
crypto/openssl/ssl/t1_enc.c
465
memcpy(val + currentvalpos, (unsigned char *)label, llen);
crypto/openssl/ssl/t1_enc.c
467
memcpy(val + currentvalpos, s->s3.client_random, SSL3_RANDOM_SIZE);
crypto/openssl/ssl/t1_enc.c
469
memcpy(val + currentvalpos, s->s3.server_random, SSL3_RANDOM_SIZE);
crypto/openssl/ssl/t1_enc.c
473
val[currentvalpos] = (contextlen >> 8) & 0xff;
crypto/openssl/ssl/t1_enc.c
475
val[currentvalpos] = contextlen & 0xff;
crypto/openssl/ssl/t1_enc.c
478
memcpy(val + currentvalpos, context, contextlen);
crypto/openssl/ssl/t1_enc.c
487
if (memcmp(val, TLS_MD_CLIENT_FINISH_CONST,
crypto/openssl/ssl/t1_enc.c
491
if (memcmp(val, TLS_MD_SERVER_FINISH_CONST,
crypto/openssl/ssl/t1_enc.c
495
if (memcmp(val, TLS_MD_MASTER_SECRET_CONST,
crypto/openssl/ssl/t1_enc.c
499
if (memcmp(val, TLS_MD_EXTENDED_MASTER_SECRET_CONST,
crypto/openssl/ssl/t1_enc.c
503
if (memcmp(val, TLS_MD_KEY_EXPANSION_CONST,
crypto/openssl/ssl/t1_enc.c
509
val, vallen,
crypto/openssl/ssl/t1_enc.c
521
OPENSSL_clear_free(val, vallen);
crypto/openssl/ssl/t1_trce.c
24
#define ssl_trace_str(val, tbl) \
crypto/openssl/ssl/t1_trce.c
25
do_ssl_trace_str(val, tbl, OSSL_NELEM(tbl))
crypto/openssl/ssl/t1_trce.c
31
static const char *do_ssl_trace_str(int val, const ssl_trace_tbl *tbl,
crypto/openssl/ssl/t1_trce.c
37
if (tbl->num == val)
crypto/openssl/ssl/t1_trce.c
47
int val;
crypto/openssl/ssl/t1_trce.c
52
val = msg[0];
crypto/openssl/ssl/t1_trce.c
54
val = (val << 8) | msg[1];
crypto/openssl/ssl/t1_trce.c
56
BIO_printf(bio, "%s (%d)\n", do_ssl_trace_str(val, tbl, ntbl), val);
crypto/openssl/test/asn1_internal_test.c
197
unsigned long val;
crypto/openssl/test/asn1_internal_test.c
199
if (!TEST_int_lt(UTF8_getc(inv_utf8, sizeof(inv_utf8), &val), 0))
crypto/openssl/test/bioprinttest.c
190
static int dofptest(int test, int sub, double val, const char *width, int prec)
crypto/openssl/test/bioprinttest.c
206
BIO_snprintf(result, sizeof(result), format, val);
crypto/openssl/test/bntest.c
2402
BIGNUM *rng = NULL, *val = NULL;
crypto/openssl/test/bntest.c
2409
|| !TEST_ptr(val = BN_new())
crypto/openssl/test/bntest.c
2413
if (!TEST_true(BN_rand_range(val, rng))
crypto/openssl/test/bntest.c
2414
|| !TEST_uint_lt(v = (unsigned int)BN_get_word(val), range))
crypto/openssl/test/bntest.c
2435
BN_free(val);
crypto/openssl/test/cmp_ctx_test.c
504
static void char_free(char *val)
crypto/openssl/test/cmp_ctx_test.c
506
OPENSSL_free(val);
crypto/openssl/test/cmp_ctx_test.c
604
static int OSSL_CMP_CTX_##SETN##_##FIELD##_##ARG(CMP_CTX *ctx, T val) \
crypto/openssl/test/cmp_ctx_test.c
606
return OSSL_CMP_CTX_##SETN##_##FIELD(ctx, ARG, val); \
crypto/openssl/test/cmp_ctx_test.c
615
static int OSSL_CMP_CTX_##SETN##_##FIELD##_str(CMP_CTX *ctx, char *val) \
crypto/openssl/test/cmp_ctx_test.c
617
return OSSL_CMP_CTX_##SETN##_##FIELD(ctx, (unsigned char *)val, \
crypto/openssl/test/cmp_ctx_test.c
618
strlen(val)); \
crypto/openssl/test/cmp_hdr_test.c
347
ASN1_TYPE *val = ASN1_TYPE_new();
crypto/openssl/test/cmp_hdr_test.c
354
if (!TEST_ptr(val)
crypto/openssl/test/cmp_hdr_test.c
360
ASN1_TYPE_set(val, V_ASN1_INTEGER, asn1int);
crypto/openssl/test/cmp_hdr_test.c
361
if (!TEST_ptr(itav = OSSL_CMP_ITAV_create(OBJ_txt2obj(oid, 1), val))) {
crypto/openssl/test/cmp_hdr_test.c
362
ASN1_TYPE_free(val);
crypto/openssl/test/cmp_msg_test.c
46
#define SET_OPT_UNPROTECTED_SEND(ctx, val) \
crypto/openssl/test/cmp_msg_test.c
47
OSSL_CMP_CTX_set_option((ctx), OSSL_CMP_OPT_UNPROTECTED_SEND, (val))
crypto/openssl/test/cmp_protect_test.c
194
#define SET_OPT_UNPROTECTED_SEND(ctx, val) \
crypto/openssl/test/cmp_protect_test.c
195
OSSL_CMP_CTX_set_option((ctx), OSSL_CMP_OPT_UNPROTECTED_SEND, (val))
crypto/openssl/test/conf_include_test.c
104
val = 0;
crypto/openssl/test/conf_include_test.c
105
if (!TEST_int_eq(NCONF_get_number(conf, "CA_default", "default_days", &val), 1)
crypto/openssl/test/conf_include_test.c
106
|| !TEST_int_eq(val, 365)) {
crypto/openssl/test/conf_include_test.c
112
val = 0;
crypto/openssl/test/conf_include_test.c
113
if (!TEST_int_eq(NCONF_get_number(conf, "req", "default_bits", &val), 1)
crypto/openssl/test/conf_include_test.c
114
|| !TEST_int_eq(val, 2048)) {
crypto/openssl/test/conf_include_test.c
128
val = 0;
crypto/openssl/test/conf_include_test.c
129
if (!TEST_int_eq(NCONF_get_number(conf, "null_sect", "activate", &val), 1)
crypto/openssl/test/conf_include_test.c
130
|| !TEST_int_eq(val, 1)) {
crypto/openssl/test/conf_include_test.c
134
val = 0;
crypto/openssl/test/conf_include_test.c
135
if (!TEST_int_eq(NCONF_get_number(conf, "default_sect", "activate", &val), 1)
crypto/openssl/test/conf_include_test.c
136
|| !TEST_int_eq(val, 1)) {
crypto/openssl/test/conf_include_test.c
140
val = 0;
crypto/openssl/test/conf_include_test.c
141
if (!TEST_int_eq(NCONF_get_number(conf, "legacy_sect", "activate", &val), 1)
crypto/openssl/test/conf_include_test.c
142
|| !TEST_int_eq(val, 1)) {
crypto/openssl/test/conf_include_test.c
155
long val = 0;
crypto/openssl/test/conf_include_test.c
161
|| !TEST_true(NCONF_get_number(NULL, "missing", "FNORD", &val))
crypto/openssl/test/conf_include_test.c
162
|| !TEST_long_eq(val, 123)) {
crypto/openssl/test/conf_include_test.c
172
|| !TEST_false(NCONF_get_number(NULL, "missing", "FNORD", &val))) {
crypto/openssl/test/conf_include_test.c
185
long val = 0;
crypto/openssl/test/conf_include_test.c
191
if (!TEST_true(NCONF_get_number(NULL, "missing", "FNORD", &val))
crypto/openssl/test/conf_include_test.c
192
|| !TEST_long_eq(val, LONG_MAX))
crypto/openssl/test/conf_include_test.c
199
if (!TEST_false(NCONF_get_number(NULL, "missing", "FNORD", &val)))
crypto/openssl/test/conf_include_test.c
82
long val;
crypto/openssl/test/evp_extra_test2.c
3102
int val = 0;
crypto/openssl/test/evp_extra_test2.c
3105
&& TEST_true(OSSL_PARAM_get_int(p, &val))
crypto/openssl/test/evp_extra_test2.c
3106
&& TEST_int_eq(val, expected);
crypto/openssl/test/evp_pkey_dhkem_test.c
355
int val = 1;
crypto/openssl/test/evp_pkey_dhkem_test.c
358
badparams[0] = OSSL_PARAM_construct_int(OSSL_KEM_PARAM_OPERATION, &val);
crypto/openssl/test/evp_pkey_dhkem_test.c
377
badparams[0] = OSSL_PARAM_construct_int(OSSL_KEM_PARAM_IKME, &val);
crypto/openssl/test/evp_pkey_dhkem_test.c
389
badparams[0] = OSSL_PARAM_construct_int("unknownparam", &val);
crypto/openssl/test/params_api_test.c
798
int ret, val;
crypto/openssl/test/params_api_test.c
810
&& TEST_true(OSSL_PARAM_get_int(p, &val))
crypto/openssl/test/params_api_test.c
811
&& TEST_int_eq(val, 1)
crypto/openssl/test/params_api_test.c
813
&& TEST_true(OSSL_PARAM_get_int(p, &val))
crypto/openssl/test/params_api_test.c
814
&& TEST_int_eq(val, 2)
crypto/openssl/test/params_api_test.c
817
&& TEST_true(OSSL_PARAM_get_int(p, &val))
crypto/openssl/test/params_api_test.c
818
&& TEST_int_eq(val, 1)
crypto/openssl/test/params_api_test.c
820
&& TEST_true(OSSL_PARAM_get_int(p, &val))
crypto/openssl/test/params_api_test.c
821
&& TEST_int_eq(val, 2)
crypto/openssl/test/params_api_test.c
829
int val, ret;
crypto/openssl/test/params_api_test.c
843
&& TEST_true(OSSL_PARAM_get_int(p, &val))
crypto/openssl/test/params_api_test.c
844
&& TEST_int_eq(val, values[0])
crypto/openssl/test/params_api_test.c
846
&& TEST_true(OSSL_PARAM_get_int(cp, &val))
crypto/openssl/test/params_api_test.c
847
&& TEST_int_eq(val, values[2])
crypto/openssl/test/params_api_test.c
849
&& TEST_true(OSSL_PARAM_get_int(cp, &val))
crypto/openssl/test/params_api_test.c
850
&& TEST_int_eq(val, values[3]);
crypto/openssl/test/params_test.c
618
long int val = 0;
crypto/openssl/test/params_test.c
636
res = OSSL_PARAM_get_long(&param, &val);
crypto/openssl/test/params_test.c
645
if (val != a.expected_intval) {
crypto/openssl/test/params_test.c
647
a.argname, a.strval, a.expected_intval, val);
crypto/openssl/test/sanitytest.c
242
uint64_t val;
crypto/openssl/test/sanitytest.c
294
OSSL_sleep(td->val);
crypto/openssl/test/sanitytest.c
310
if (!TEST_uint64_t_ge(ms, td->val) + !TEST_uint64_t_le(ms, td->val + 20000))
crypto/openssl/test/stack_test.c
111
int *val = (finds[i].unsorted == -1) ? &notpresent
crypto/openssl/test/stack_test.c
114
if (!TEST_int_eq(sk_sint_find(s, val), finds[i].unsorted)) {
crypto/openssl/test/stack_test.c
122
int *val = (finds[i].unsorted == -1) ? &notpresent
crypto/openssl/test/stack_test.c
125
if (!TEST_int_eq(sk_sint_find_ex(s, val), finds[i].unsorted)) {
crypto/openssl/test/strtoultest.c
59
unsigned long val;
crypto/openssl/test/strtoultest.c
67
err = OPENSSL_strtoul(test->input, &endptr, test->base, &val);
crypto/openssl/test/strtoultest.c
84
if (!TEST_ulong_eq(val, test->expect_val))
crypto/openssl/test/testutil/testutil_init.c
104
char *val;
crypto/openssl/test/testutil/testutil_init.c
114
val = OPENSSL_strdup(str);
crypto/openssl/test/testutil/testutil_init.c
116
if (val != NULL) {
crypto/openssl/test/testutil/testutil_init.c
117
char *valp = val;
crypto/openssl/test/testutil/testutil_init.c
120
for (valp = val; (item = strtok(valp, ",")) != NULL; valp = NULL) {
crypto/openssl/test/testutil/testutil_init.c
136
OPENSSL_free(val);
crypto/openssl/test/threadstest.c
372
uint64_t val;
crypto/openssl/test/threadstest.c
383
val = (valp == NULL) ? 0 : *valp;
crypto/openssl/test/threadstest.c
385
if (oldval > val) {
crypto/openssl/test/threadstest.c
386
TEST_info("rcu torture value went backwards! %llu : %llu", (unsigned long long)oldval, (unsigned long long)val);
crypto/openssl/test/threadstest.c
391
oldval = val; /* just try to deref the pointer */
crypto/openssl/test/threadstest.c
624
int val = 0, ret = 0, testresult = 0;
crypto/openssl/test/threadstest.c
631
if (CRYPTO_atomic_add(&val, 1, &ret, NULL)) {
crypto/openssl/test/threadstest.c
633
if (!TEST_int_eq(val, 1) || !TEST_int_eq(val, ret))
crypto/openssl/test/threadstest.c
637
if (!TEST_int_eq(val, 0) || !TEST_int_eq(val, ret))
crypto/openssl/test/threadstest.c
640
val = 0;
crypto/openssl/test/threadstest.c
643
if (!TEST_true(CRYPTO_atomic_add(&val, 1, &ret, lock)))
crypto/openssl/test/threadstest.c
645
if (!TEST_int_eq(val, 1) || !TEST_int_eq(val, ret))
include/getopt.h
58
int val;
include/ssp/string.h
127
#define memset(dst, val, len) \
include/ssp/string.h
128
__ssp_bos_check3_typed(memset, void *, dst, int, val, len)
include/termios.h
53
#define CCEQ(val, c) ((c) == (val) && (val) != _POSIX_VDISABLE)
lib/geom/cache/geom_cache.c
136
intmax_t val;
lib/geom/cache/geom_cache.c
149
val = gctl_get_intmax(req, "blocksize");
lib/geom/cache/geom_cache.c
150
md.md_bsize = val;
lib/geom/cache/geom_cache.c
151
val = gctl_get_intmax(req, "size");
lib/geom/cache/geom_cache.c
152
md.md_size = val;
lib/geom/eli/geom_eli.c
1320
intmax_t val, old = 0;
lib/geom/eli/geom_eli.c
1323
val = gctl_get_intmax(req, "iterations");
lib/geom/eli/geom_eli.c
1325
if (val != -1)
lib/geom/eli/geom_eli.c
1326
md->md_iterations = val;
lib/geom/eli/geom_eli.c
1339
if (val == -1 && md->md_iterations != old) {
lib/geom/eli/geom_eli.c
1357
intmax_t val;
lib/geom/eli/geom_eli.c
1387
val = gctl_get_intmax(req, "keyno");
lib/geom/eli/geom_eli.c
1388
if (val != -1)
lib/geom/eli/geom_eli.c
1389
nkey = val;
lib/geom/eli/geom_eli.c
1399
val = gctl_get_intmax(req, "iterations");
lib/geom/eli/geom_eli.c
1401
if (val != -1 && md->md_iterations == -1) {
lib/geom/eli/geom_eli.c
1402
md->md_iterations = val;
lib/geom/eli/geom_eli.c
1403
} else if (val != -1 && val != md->md_iterations) {
lib/geom/eli/geom_eli.c
1414
md->md_iterations = val;
lib/geom/eli/geom_eli.c
1493
intmax_t val;
lib/geom/eli/geom_eli.c
1504
val = gctl_get_intmax(req, "keyno");
lib/geom/eli/geom_eli.c
1505
if (val == -1) {
lib/geom/eli/geom_eli.c
1509
nkey = val;
lib/geom/eli/geom_eli.c
732
intmax_t val;
lib/geom/eli/geom_eli.c
746
val = gctl_get_intmax(req, "mdversion");
lib/geom/eli/geom_eli.c
747
if (val == -1) {
lib/geom/eli/geom_eli.c
749
} else if (val < 0 || val > G_ELI_VERSION) {
lib/geom/eli/geom_eli.c
755
eli_version = val;
lib/geom/eli/geom_eli.c
830
val = gctl_get_intmax(req, "keylen");
lib/geom/eli/geom_eli.c
831
md.md_keylen = val;
lib/geom/eli/geom_eli.c
838
val = gctl_get_intmax(req, "iterations");
lib/geom/eli/geom_eli.c
839
if (val != -1) {
lib/geom/eli/geom_eli.c
853
md.md_iterations = val;
lib/geom/eli/geom_eli.c
855
val = gctl_get_intmax(req, "sectorsize");
lib/geom/eli/geom_eli.c
856
if (val > sysconf(_SC_PAGE_SIZE)) {
lib/geom/eli/geom_eli.c
898
val = gctl_get_intmax(r, "sectorsize");
lib/geom/eli/geom_eli.c
899
if (val == 0) {
lib/geom/eli/geom_eli.c
902
if (val < 0 || (val % secsize) != 0 || !powerof2(val)) {
lib/geom/eli/geom_eli.c
906
md.md_sectorsize = val;
lib/geom/mirror/geom_mirror.c
185
intmax_t val;
lib/geom/mirror/geom_mirror.c
206
val = gctl_get_intmax(req, "slice");
lib/geom/mirror/geom_mirror.c
207
md.md_slice = val;
lib/lib80211/lib80211_ioctl.c
128
lib80211_get80211val(int s, const char *name, int type, int *val)
lib/lib80211/lib80211_ioctl.c
137
*val = ireq.i_val;
lib/lib80211/lib80211_ioctl.c
142
lib80211_set80211(int s, const char *name, int type, int val, int len, void *data)
lib/lib80211/lib80211_ioctl.c
149
ireq.i_val = val;
lib/lib80211/lib80211_ioctl.h
65
extern int lib80211_get80211val(int s, const char *name, int type, int *val);
lib/lib80211/lib80211_ioctl.h
66
extern int lib80211_set80211(int s, const char *name, int type, int val,
lib/libbe/be.c
658
char *val;
lib/libbe/be.c
695
val = pval;
lib/libbe/be.c
697
val = be_mountpoint_augmented(dccb->lbh, val);
lib/libbe/be.c
699
nvlist_add_string(dccb->props, zfs_prop_to_name(prop), val);
lib/libbe/be_error.c
101
lbh->print_on_err = val;
lib/libbe/be_error.c
102
libzfs_print_on_error(lbh->lzh, val);
lib/libbe/be_error.c
98
libbe_print_on_error(libbe_handle_t *lbh, bool val)
lib/libc/db/hash/hash.c
573
hash_access(HTAB *hashp, ACTION action, DBT *key, DBT *val)
lib/libc/db/hash/hash.c
651
if (__addel(hashp, rbufp, key, val)) {
lib/libc/db/hash/hash.c
673
if (__big_return(hashp, rbufp, ndx, val, 0))
lib/libc/db/hash/hash.c
676
val->data = (u_char *)rbufp->page + (int)bp[ndx + 1];
lib/libc/db/hash/hash.c
677
val->size = bp[ndx] - bp[ndx + 1];
lib/libc/db/hash/hash.c
682
(__addel(hashp, rbufp, key, val))) {
lib/libc/db/hash/hash_bigkey.c
127
if (space == val_size && val_size == val->size)
lib/libc/db/hash/hash_bigkey.c
155
if (space == val_size && val_size == val->size)
lib/libc/db/hash/hash_bigkey.c
355
__big_return(HTAB *hashp, BUFHEAD *bufp, int ndx, DBT *val, int set_current)
lib/libc/db/hash/hash_bigkey.c
400
val->data = (u_char *)tp + off;
lib/libc/db/hash/hash_bigkey.c
401
val->size = bp[1] - off;
lib/libc/db/hash/hash_bigkey.c
424
val->size = (size_t)collect_data(hashp, bufp, (int)len, set_current);
lib/libc/db/hash/hash_bigkey.c
425
if (val->size == (size_t)-1)
lib/libc/db/hash/hash_bigkey.c
433
val->data = (u_char *)hashp->tmp_buf;
lib/libc/db/hash/hash_bigkey.c
494
__big_keydata(HTAB *hashp, BUFHEAD *bufp, DBT *key, DBT *val, int set)
lib/libc/db/hash/hash_bigkey.c
496
key->size = (size_t)collect_key(hashp, bufp, 0, val, set);
lib/libc/db/hash/hash_bigkey.c
508
collect_key(HTAB *hashp, BUFHEAD *bufp, int len, DBT *val, int set)
lib/libc/db/hash/hash_bigkey.c
526
if (__big_return(hashp, bufp, 1, val, set))
lib/libc/db/hash/hash_bigkey.c
531
collect_key(hashp, xbp, totlen, val, set)) < 1))
lib/libc/db/hash/hash_bigkey.c
557
DBT key, val;
lib/libc/db/hash/hash_bigkey.c
564
if (__big_keydata(hashp, big_keyp, &key, &val, 0))
lib/libc/db/hash/hash_bigkey.c
82
__big_insert(HTAB *hashp, BUFHEAD *bufp, const DBT *key, const DBT *val)
lib/libc/db/hash/hash_bigkey.c
95
val_data = (char *)val->data;
lib/libc/db/hash/hash_bigkey.c
96
val_size = val->size;
lib/libc/db/hash/hash_page.c
106
off -= val->size;
lib/libc/db/hash/hash_page.c
107
memmove(p + off, val->data, val->size);
lib/libc/db/hash/hash_page.c
184
DBT key, val;
lib/libc/db/hash/hash_page.c
232
val.data = (u_char *)op + ino[n + 1];
lib/libc/db/hash/hash_page.c
233
val.size = ino[n] - ino[n + 1];
lib/libc/db/hash/hash_page.c
234
putpair(np, &key, &val);
lib/libc/db/hash/hash_page.c
286
DBT key, val;
lib/libc/db/hash/hash_page.c
348
val.data = (u_char *)cino + ino[n + 1];
lib/libc/db/hash/hash_page.c
349
val.size = ino[n] - ino[n + 1];
lib/libc/db/hash/hash_page.c
354
if (PAIRFITS(op, (&key), (&val)))
lib/libc/db/hash/hash_page.c
355
putpair((char *)op, &key, &val);
lib/libc/db/hash/hash_page.c
362
putpair((char *)op, &key, &val);
lib/libc/db/hash/hash_page.c
367
if (PAIRFITS(np, (&key), (&val)))
lib/libc/db/hash/hash_page.c
368
putpair((char *)np, &key, &val);
lib/libc/db/hash/hash_page.c
375
putpair((char *)np, &key, &val);
lib/libc/db/hash/hash_page.c
394
__addel(HTAB *hashp, BUFHEAD *bufp, const DBT *key, const DBT *val)
lib/libc/db/hash/hash_page.c
418
FREESPACE(bp) >= PAIRSIZE(key, val)) {
lib/libc/db/hash/hash_page.c
419
squeeze_key(bp, key, val);
lib/libc/db/hash/hash_page.c
429
if (PAIRFITS(bp, key, val))
lib/libc/db/hash/hash_page.c
430
putpair(bufp->page, key, val);
lib/libc/db/hash/hash_page.c
438
if (PAIRFITS(sop, key, val))
lib/libc/db/hash/hash_page.c
439
putpair((char *)sop, key, val);
lib/libc/db/hash/hash_page.c
441
if (__big_insert(hashp, bufp, key, val))
lib/libc/db/hash/hash_page.c
877
squeeze_key(u_int16_t *sp, const DBT *key, const DBT *val)
lib/libc/db/hash/hash_page.c
891
off -= val->size;
lib/libc/db/hash/hash_page.c
893
memmove(p + off, val->data, val->size);
lib/libc/db/hash/hash_page.c
897
FREESPACE(sp) = free_space - PAIRSIZE(key, val);
lib/libc/db/hash/hash_page.c
92
putpair(char *p, const DBT *key, const DBT *val)
lib/libc/gen/arc4random.c
222
_rs_random_u32(uint32_t *val)
lib/libc/gen/arc4random.c
226
_rs_stir_if_needed(sizeof(*val));
lib/libc/gen/arc4random.c
227
if (rs->rs_have < sizeof(*val))
lib/libc/gen/arc4random.c
230
memcpy(val, keystream, sizeof(*val));
lib/libc/gen/arc4random.c
231
memset(keystream, 0, sizeof(*val));
lib/libc/gen/arc4random.c
232
rs->rs_have -= sizeof(*val);
lib/libc/gen/arc4random.c
238
uint32_t val;
lib/libc/gen/arc4random.c
241
_rs_random_u32(&val);
lib/libc/gen/arc4random.c
243
return val;
lib/libc/gen/dlfcn.c
369
rtld_set_var(const char *name __unused, const char *val __unused)
lib/libc/gen/sem.c
342
#define TIMESPEC_SUB(dst, src, val) \
lib/libc/gen/sem.c
344
(dst)->tv_sec = (src)->tv_sec - (val)->tv_sec; \
lib/libc/gen/sem.c
345
(dst)->tv_nsec = (src)->tv_nsec - (val)->tv_nsec; \
lib/libc/gen/sem.c
367
int val, retval;
lib/libc/gen/sem.c
382
while ((val = (*sem)->count) > 0) {
lib/libc/gen/sem.c
383
if (atomic_cmpset_acq_int(&(*sem)->count, val, val - 1))
lib/libc/gen/sem.c
416
int val;
lib/libc/gen/sem.c
424
while ((val = (*sem)->count) > 0) {
lib/libc/gen/sem.c
425
if (atomic_cmpset_acq_int(&(*sem)->count, val, val - 1))
lib/libc/gen/sem_new.c
377
int val;
lib/libc/gen/sem_new.c
382
while (USEM_COUNT(val = sem->_kern._count) > 0) {
lib/libc/gen/sem_new.c
383
if (atomic_cmpset_acq_int(&sem->_kern._count, val, val - 1))
lib/libc/gen/sem_new.c
394
int val, retval;
lib/libc/gen/sem_new.c
402
while (USEM_COUNT(val = sem->_kern._count) > 0) {
lib/libc/gen/sem_new.c
403
if (atomic_cmpset_acq_int(&sem->_kern._count, val,
lib/libc/gen/sem_new.c
404
val - 1))
lib/libc/iconv/citrus_db.c
217
uint16_t val;
lib/libc/iconv/citrus_db.c
227
memcpy(&val, _region_head(&r), 2);
lib/libc/iconv/citrus_db.c
228
*rval = be16toh(val);
lib/libc/iconv/citrus_db.c
239
uint32_t val;
lib/libc/iconv/citrus_db.c
250
memcpy(&val, _region_head(&r), 4);
lib/libc/iconv/citrus_db.c
251
*rval = be32toh(val);
lib/libc/iconv/citrus_db_factory.c
152
const char *key, uint8_t val)
lib/libc/iconv/citrus_db_factory.c
160
*p = val;
lib/libc/iconv/citrus_db_factory.c
167
const char *key, uint16_t val)
lib/libc/iconv/citrus_db_factory.c
175
*p = htons(val);
lib/libc/iconv/citrus_db_factory.c
182
const char *key, uint32_t val)
lib/libc/iconv/citrus_db_factory.c
190
*p = htonl(val);
lib/libc/iconv/citrus_db_factory.c
223
put8(struct _region *r, size_t *rofs, uint8_t val)
lib/libc/iconv/citrus_db_factory.c
226
*(uint8_t *)_region_offset(r, *rofs) = val;
lib/libc/iconv/citrus_db_factory.c
231
put32(struct _region *r, size_t *rofs, uint32_t val)
lib/libc/iconv/citrus_db_factory.c
234
val = htonl(val);
lib/libc/iconv/citrus_db_factory.c
235
memcpy(_region_offset(r, *rofs), &val, 4);
lib/libc/iconv/citrus_pivot_factory.c
111
uint32_t val;
lib/libc/iconv/citrus_pivot_factory.c
143
val = strtoul(data, &ep, 0);
lib/libc/iconv/citrus_pivot_factory.c
152
return (_db_factory_add32_by_s(se->se_df, key2, val));
lib/libc/iconv/citrus_region.h
100
return (val);
lib/libc/iconv/citrus_region.h
88
uint16_t val;
lib/libc/iconv/citrus_region.h
90
memcpy(&val, _citrus_region_offset(r, pos), (size_t)2);
lib/libc/iconv/citrus_region.h
91
return (val);
lib/libc/iconv/citrus_region.h
97
uint32_t val;
lib/libc/iconv/citrus_region.h
99
memcpy(&val, _citrus_region_offset(r, pos), (size_t)4);
lib/libc/inet/inet_addr.c
102
u_long val;
lib/libc/inet/inet_addr.c
118
val = 0; base = 10; digit = 0;
lib/libc/inet/inet_addr.c
132
val = (val * base) + (c - '0');
lib/libc/inet/inet_addr.c
137
val = (val << 4) |
lib/libc/inet/inet_addr.c
151
if (pp >= parts + 3 || val > 0xffU)
lib/libc/inet/inet_addr.c
153
*pp++ = val;
lib/libc/inet/inet_addr.c
178
if (val > 0xffffffU)
lib/libc/inet/inet_addr.c
180
val |= (uint32_t)parts[0] << 24;
lib/libc/inet/inet_addr.c
184
if (val > 0xffffU)
lib/libc/inet/inet_addr.c
186
val |= ((uint32_t)parts[0] << 24) | (parts[1] << 16);
lib/libc/inet/inet_addr.c
190
if (val > 0xffU)
lib/libc/inet/inet_addr.c
192
val |= ((uint32_t)parts[0] << 24) | (parts[1] << 16) |
lib/libc/inet/inet_addr.c
197
addr->s_addr = htonl(val);
lib/libc/inet/inet_addr.c
86
struct in_addr val;
lib/libc/inet/inet_addr.c
88
if (inet_aton(cp, &val))
lib/libc/inet/inet_addr.c
89
return (val.s_addr);
lib/libc/inet/inet_cidr_pton.c
155
u_int val;
lib/libc/inet/inet_cidr_pton.c
167
val = 0;
lib/libc/inet/inet_cidr_pton.c
175
val <<= 4;
lib/libc/inet/inet_cidr_pton.c
176
val |= (pch - xdigits);
lib/libc/inet/inet_cidr_pton.c
177
if (val > 0xffff)
lib/libc/inet/inet_cidr_pton.c
194
*tp++ = (u_char) (val >> 8) & 0xff;
lib/libc/inet/inet_cidr_pton.c
195
*tp++ = (u_char) val & 0xff;
lib/libc/inet/inet_cidr_pton.c
197
val = 0;
lib/libc/inet/inet_cidr_pton.c
217
*tp++ = (u_char) (val >> 8) & 0xff;
lib/libc/inet/inet_cidr_pton.c
218
*tp++ = (u_char) val & 0xff;
lib/libc/inet/inet_network.c
49
in_addr_t val, base, n;
lib/libc/inet/inet_network.c
55
val = 0; base = 10; digit = 0;
lib/libc/inet/inet_network.c
64
val = (val * base) + (c - '0');
lib/libc/inet/inet_network.c
70
val = (val << 4) +
lib/libc/inet/inet_network.c
80
if (pp >= parts + 4 || val > 0xffU)
lib/libc/inet/inet_network.c
83
*pp++ = val, cp++;
lib/libc/inet/inet_network.c
88
*pp++ = val;
lib/libc/inet/inet_network.c
92
for (val = 0, i = 0; i < n; i++) {
lib/libc/inet/inet_network.c
93
val <<= 8;
lib/libc/inet/inet_network.c
94
val |= parts[i] & 0xff;
lib/libc/inet/inet_network.c
96
return (val);
lib/libc/inet/inet_pton.c
135
u_int val;
lib/libc/inet/inet_pton.c
146
val = 0;
lib/libc/inet/inet_pton.c
153
val <<= 4;
lib/libc/inet/inet_pton.c
154
val |= (pch - xdigits);
lib/libc/inet/inet_pton.c
171
*tp++ = (u_char) (val >> 8) & 0xff;
lib/libc/inet/inet_pton.c
172
*tp++ = (u_char) val & 0xff;
lib/libc/inet/inet_pton.c
174
val = 0;
lib/libc/inet/inet_pton.c
188
*tp++ = (u_char) (val >> 8) & 0xff;
lib/libc/inet/inet_pton.c
189
*tp++ = (u_char) val & 0xff;
lib/libc/locale/collate.c
303
compar = key - p->val;
lib/libc/locale/collate.c
549
uint32_t val = (uint32_t)table->info->pri_count[pass];
lib/libc/locale/collate.c
552
while (val) {
lib/libc/locale/collate.c
555
val >>= XFRM_SHIFT;
lib/libc/locale/collate.h
110
int32_t val;
lib/libc/locale/wcstod.c
109
return (val);
lib/libc/locale/wcstod.c
54
double val;
lib/libc/locale/wcstod.c
93
val = strtod_l(buf, &end, locale);
lib/libc/locale/wcstof.c
48
float val;
lib/libc/locale/wcstof.c
76
val = strtof_l(buf, &end, locale);
lib/libc/locale/wcstof.c
86
return (val);
lib/libc/locale/wcstold.c
48
long double val;
lib/libc/locale/wcstold.c
76
val = strtold_l(buf, &end, locale);
lib/libc/locale/wcstold.c
86
return (val);
lib/libc/locale/xlocale_private.h
141
xlocale_retain(void *val)
lib/libc/locale/xlocale_private.h
143
struct xlocale_refcounted *obj = val;
lib/libc/locale/xlocale_private.h
145
return (val);
lib/libc/locale/xlocale_private.h
152
xlocale_release(void *val)
lib/libc/locale/xlocale_private.h
154
struct xlocale_refcounted *obj = val;
lib/libc/net/ip6opt.c
492
inet6_opt_set_val(void *databuf, int offset, void *val, socklen_t vallen)
lib/libc/net/ip6opt.c
495
memcpy((u_int8_t *)databuf + offset, val, vallen);
lib/libc/net/ip6opt.c
591
inet6_opt_get_val(void *databuf, int offset, void *val, socklen_t vallen)
lib/libc/net/ip6opt.c
595
memcpy(val, (u_int8_t *)databuf + offset, vallen);
lib/libc/resolv/res_debug.c
755
unsigned long val;
lib/libc/resolv/res_debug.c
761
val = mantissa * poweroften[exponent];
lib/libc/resolv/res_debug.c
763
(void) sprintf(retbuf, "%lu.%.2lu", val/100, val%100);
lib/libc/rpc/netnamer.c
115
(void) strncpy(val, val1, 1024);
lib/libc/rpc/netnamer.c
116
val[vallen] = 0;
lib/libc/rpc/netnamer.c
125
if (sscanf(val, "%ld", &luid) != 1)
lib/libc/rpc/netnamer.c
187
char *val;
lib/libc/rpc/netnamer.c
193
val = valbuf;
lib/libc/rpc/netnamer.c
194
if ((*val == '0') && (val[1] == ':')) {
lib/libc/rpc/netnamer.c
195
(void) strncpy(hostname, val + 2, hostlen);
lib/libc/rpc/netnamer.c
199
val = strchr(netname, '.');
lib/libc/rpc/netnamer.c
200
if (val == NULL)
lib/libc/rpc/netnamer.c
202
if (strncmp(netname, OPSYS, (val - netname)))
lib/libc/rpc/netnamer.c
204
val++;
lib/libc/rpc/netnamer.c
205
val2 = strchr(val, '@');
lib/libc/rpc/netnamer.c
208
vallen = val2 - val;
lib/libc/rpc/netnamer.c
211
(void) strncpy(hostname, val, vallen);
lib/libc/rpc/netnamer.c
75
char val[1024];
lib/libc/rpc/netnamer.c
81
if (getnetid(netname, val)) {
lib/libc/rpc/netnamer.c
82
char *res = val;
lib/libc/rpc/svc.c
740
int val;
lib/libc/rpc/svc.c
744
val = *(int *)arg;
lib/libc/rpc/svc.c
745
if (val <= 0)
lib/libc/rpc/svc.c
747
__svc_maxrec = val;
lib/libc/secure/memset_chk.c
41
__memset_chk(void * __restrict dst, int val, size_t len, size_t slen)
lib/libc/secure/memset_chk.c
45
return (memset(dst, val, len));
lib/libc/stdio/findfp.c
85
#define SET_GLUE_PTR(ptr, val) atomic_set_rel_ptr(&(ptr), (uintptr_t)(val))
lib/libc/stdio/findfp.c
87
#define SET_GLUE_PTR(ptr, val) ptr = val
lib/libc/stdio/printfcommon.h
163
__ultoa(u_long val, CHAR *endp, int base, int octzero, const char *xdigs)
lib/libc/stdio/printfcommon.h
174
if (val < 10) { /* many numbers are 1 digit */
lib/libc/stdio/printfcommon.h
175
*--cp = to_char(val);
lib/libc/stdio/printfcommon.h
184
if (val > LONG_MAX) {
lib/libc/stdio/printfcommon.h
185
*--cp = to_char(val % 10);
lib/libc/stdio/printfcommon.h
186
sval = val / 10;
lib/libc/stdio/printfcommon.h
188
sval = val;
lib/libc/stdio/printfcommon.h
197
*--cp = to_char(val & 1);
lib/libc/stdio/printfcommon.h
198
val >>= 1;
lib/libc/stdio/printfcommon.h
199
} while (val);
lib/libc/stdio/printfcommon.h
204
*--cp = to_char(val & 7);
lib/libc/stdio/printfcommon.h
205
val >>= 3;
lib/libc/stdio/printfcommon.h
206
} while (val);
lib/libc/stdio/printfcommon.h
213
*--cp = xdigs[val & 15];
lib/libc/stdio/printfcommon.h
214
val >>= 4;
lib/libc/stdio/printfcommon.h
215
} while (val);
lib/libc/stdio/printfcommon.h
226
__ujtoa(uintmax_t val, CHAR *endp, int base, int octzero, const char *xdigs)
lib/libc/stdio/printfcommon.h
233
if (val <= ULONG_MAX)
lib/libc/stdio/printfcommon.h
234
return (__ultoa((u_long)val, endp, base, octzero, xdigs));
lib/libc/stdio/printfcommon.h
237
if (val < 10) {
lib/libc/stdio/printfcommon.h
238
*--cp = to_char(val % 10);
lib/libc/stdio/printfcommon.h
241
if (val > INTMAX_MAX) {
lib/libc/stdio/printfcommon.h
242
*--cp = to_char(val % 10);
lib/libc/stdio/printfcommon.h
243
sval = val / 10;
lib/libc/stdio/printfcommon.h
245
sval = val;
lib/libc/stdio/printfcommon.h
254
*--cp = to_char(val & 1);
lib/libc/stdio/printfcommon.h
255
val >>= 1;
lib/libc/stdio/printfcommon.h
256
} while (val);
lib/libc/stdio/printfcommon.h
261
*--cp = to_char(val & 7);
lib/libc/stdio/printfcommon.h
262
val >>= 3;
lib/libc/stdio/printfcommon.h
263
} while (val);
lib/libc/stdio/printfcommon.h
270
*--cp = xdigs[val & 15];
lib/libc/stdio/printfcommon.h
271
val >>= 4;
lib/libc/stdio/printfcommon.h
272
} while (val);
lib/libc/stdio/vfprintf.c
423
#define GETASTER(val) \
lib/libc/stdio/vfprintf.c
440
val = GETARG (int); \
lib/libc/stdio/vfprintf.c
444
val = GETARG (int); \
lib/libc/stdio/vfwprintf.c
497
#define GETASTER(val) \
lib/libc/stdio/vfwprintf.c
514
val = GETARG (int); \
lib/libc/stdio/vfwprintf.c
518
val = GETARG (int); \
lib/libc/stdio/xprintf_int.c
102
if (val < 10) { /* many numbers are 1 digit */
lib/libc/stdio/xprintf_int.c
103
*--cp = to_char(val);
lib/libc/stdio/xprintf_int.c
113
if (val > LONG_MAX) {
lib/libc/stdio/xprintf_int.c
114
*--cp = to_char(val % 10);
lib/libc/stdio/xprintf_int.c
116
sval = val / 10;
lib/libc/stdio/xprintf_int.c
118
sval = val;
lib/libc/stdio/xprintf_int.c
144
*--cp = to_char(val & 7);
lib/libc/stdio/xprintf_int.c
145
val >>= 3;
lib/libc/stdio/xprintf_int.c
146
} while (val);
lib/libc/stdio/xprintf_int.c
151
*--cp = xdigs[val & 15];
lib/libc/stdio/xprintf_int.c
152
val >>= 4;
lib/libc/stdio/xprintf_int.c
153
} while (val);
lib/libc/stdio/xprintf_int.c
165
__ujtoa(uintmax_t val, char *endp, int base, const char *xdigs,
lib/libc/stdio/xprintf_int.c
174
if (val < 10) {
lib/libc/stdio/xprintf_int.c
175
*--cp = to_char(val % 10);
lib/libc/stdio/xprintf_int.c
179
if (val > INTMAX_MAX) {
lib/libc/stdio/xprintf_int.c
180
*--cp = to_char(val % 10);
lib/libc/stdio/xprintf_int.c
182
sval = val / 10;
lib/libc/stdio/xprintf_int.c
184
sval = val;
lib/libc/stdio/xprintf_int.c
210
*--cp = to_char(val & 7);
lib/libc/stdio/xprintf_int.c
211
val >>= 3;
lib/libc/stdio/xprintf_int.c
212
} while (val);
lib/libc/stdio/xprintf_int.c
217
*--cp = xdigs[val & 15];
lib/libc/stdio/xprintf_int.c
218
val >>= 4;
lib/libc/stdio/xprintf_int.c
219
} while (val);
lib/libc/stdio/xprintf_int.c
89
__ultoa(u_long val, char *endp, int base, const char *xdigs,
lib/libc/stdlib/getenv.c
453
const char *val;
lib/libc/stdlib/getenv.c
463
val = NULL;
lib/libc/stdlib/getenv.c
465
val = __findenv_environ(name, nameLen);
lib/libc/stdlib/getenv.c
468
val = __findenv(name, nameLen, &envNdx, true);
lib/libc/stdlib/getenv.c
470
if (val == NULL) {
lib/libc/stdlib/getenv.c
474
if (strlcpy(buf, val, len) >= len) {
lib/libc/stdlib/getopt_long.c
249
long_options[i].val != long_options[match].val)
lib/libc/stdlib/getopt_long.c
278
optopt = long_options[match].val;
lib/libc/stdlib/getopt_long.c
315
optopt = long_options[match].val;
lib/libc/stdlib/getopt_long.c
338
*long_options[match].flag = long_options[match].val;
lib/libc/stdlib/getopt_long.c
341
return (long_options[match].val);
lib/libc/stdlib/rand.c
124
u_long val;
lib/libc/stdlib/rand.c
127
val = *ctx;
lib/libc/stdlib/rand.c
128
r = do_rand(&val);
lib/libc/stdlib/rand.c
129
*ctx = (unsigned)val;
lib/libc/tests/stdio/sscanf_test.c
17
int ret, val, len;
lib/libc/tests/stdio/sscanf_test.c
177
int ret = 0, val = 0, len = 0; \
lib/libc/tests/stdio/sscanf_test.c
178
ret = sscanf(string, format "%n", &val, &len); \
lib/libc/tests/stdio/sscanf_test.c
181
ATF_CHECK_EQ(expval, val); \
lib/libc/tests/stdio/sscanf_test.c
194
SSCANF_TEST(input + 1, "%b", stc->b.ret, stc->b.val, stc->b.len);
lib/libc/tests/stdio/sscanf_test.c
196
SSCANF_TEST(input, "%b", stc->b.ret, stc->b.val, stc->b.len ? stc->b.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
198
SSCANF_TEST(input, "%b", stc->b.ret, -stc->b.val, stc->b.len ? stc->b.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
210
SSCANF_TEST(input + 1, "%o", stc->o.ret, stc->o.val, stc->o.len);
lib/libc/tests/stdio/sscanf_test.c
212
SSCANF_TEST(input, "%o", stc->o.ret, stc->o.val, stc->o.len ? stc->o.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
214
SSCANF_TEST(input, "%o", stc->o.ret, -stc->o.val, stc->o.len ? stc->o.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
226
SSCANF_TEST(input + 1, "%d", stc->d.ret, stc->d.val, stc->d.len);
lib/libc/tests/stdio/sscanf_test.c
228
SSCANF_TEST(input, "%d", stc->d.ret, stc->d.val, stc->d.len ? stc->d.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
230
SSCANF_TEST(input, "%d", stc->d.ret, -stc->d.val, stc->d.len ? stc->d.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
242
SSCANF_TEST(input + 1, "%x", stc->x.ret, stc->x.val, stc->x.len);
lib/libc/tests/stdio/sscanf_test.c
244
SSCANF_TEST(input, "%x", stc->x.ret, stc->x.val, stc->x.len ? stc->x.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
246
SSCANF_TEST(input, "%x", stc->x.ret, -stc->x.val, stc->x.len ? stc->x.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
258
SSCANF_TEST(input + 1, "%i", stc->i.ret, stc->i.val, stc->i.len);
lib/libc/tests/stdio/sscanf_test.c
260
SSCANF_TEST(input, "%i", stc->i.ret, stc->i.val, stc->i.len ? stc->i.len + 1 : 0);
lib/libc/tests/stdio/sscanf_test.c
262
SSCANF_TEST(input, "%i", stc->i.ret, -stc->i.val, stc->i.len ? stc->i.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
180
int ret = 0, val = 0, len = 0; \
lib/libc/tests/stdio/swscanf_test.c
181
ret = swscanf(string, format L"%n", &val, &len); \
lib/libc/tests/stdio/swscanf_test.c
184
ATF_CHECK_EQ(expval, val); \
lib/libc/tests/stdio/swscanf_test.c
197
SWSCANF_TEST(input + 1, L"%b", stc->b.ret, stc->b.val, stc->b.len);
lib/libc/tests/stdio/swscanf_test.c
199
SWSCANF_TEST(input, L"%b", stc->b.ret, stc->b.val, stc->b.len ? stc->b.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
20
int ret, val, len;
lib/libc/tests/stdio/swscanf_test.c
201
SWSCANF_TEST(input, L"%b", stc->b.ret, -stc->b.val, stc->b.len ? stc->b.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
213
SWSCANF_TEST(input + 1, L"%o", stc->o.ret, stc->o.val, stc->o.len);
lib/libc/tests/stdio/swscanf_test.c
215
SWSCANF_TEST(input, L"%o", stc->o.ret, stc->o.val, stc->o.len ? stc->o.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
217
SWSCANF_TEST(input, L"%o", stc->o.ret, -stc->o.val, stc->o.len ? stc->o.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
229
SWSCANF_TEST(input + 1, L"%d", stc->d.ret, stc->d.val, stc->d.len);
lib/libc/tests/stdio/swscanf_test.c
231
SWSCANF_TEST(input, L"%d", stc->d.ret, stc->d.val, stc->d.len ? stc->d.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
233
SWSCANF_TEST(input, L"%d", stc->d.ret, -stc->d.val, stc->d.len ? stc->d.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
245
SWSCANF_TEST(input + 1, L"%x", stc->x.ret, stc->x.val, stc->x.len);
lib/libc/tests/stdio/swscanf_test.c
247
SWSCANF_TEST(input, L"%x", stc->x.ret, stc->x.val, stc->x.len ? stc->x.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
249
SWSCANF_TEST(input, L"%x", stc->x.ret, -stc->x.val, stc->x.len ? stc->x.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
261
SWSCANF_TEST(input + 1, L"%i", stc->i.ret, stc->i.val, stc->i.len);
lib/libc/tests/stdio/swscanf_test.c
263
SWSCANF_TEST(input, L"%i", stc->i.ret, stc->i.val, stc->i.len ? stc->i.len + 1 : 0);
lib/libc/tests/stdio/swscanf_test.c
265
SWSCANF_TEST(input, L"%i", stc->i.ret, -stc->i.val, stc->i.len ? stc->i.len + 1 : 0);
lib/libc/tests/string/strnlen_test.c
110
size_t val = strnlen_fn(s, SIZE_MAX);
lib/libc/tests/string/strnlen_test.c
111
if (val != len) {
lib/libc/tests/string/strnlen_test.c
119
val = strnlen_fn(s, SIZE_MAX);
lib/libc/tests/string/strnlen_test.c
120
if (val != len) {
lib/libc/tests/string/strnlen_test.c
38
size_t val = strnlen_fn(s, maxlen);
lib/libc/tests/string/strnlen_test.c
39
if (val != len) {
lib/libc/tests/string/strnlen_test.c
48
val = strnlen_fn(s, maxlen);
lib/libc/tests/string/strnlen_test.c
49
if (val != len) {
lib/libc/tests/string/strnlen_test.c
65
size_t val = strnlen_fn(s, maxlen);
lib/libc/tests/string/strnlen_test.c
66
if (val != maxlen) {
lib/libc/tests/string/strnlen_test.c
75
val = strnlen_fn(s, maxlen);
lib/libc/tests/string/strnlen_test.c
76
if (val != maxlen) {
lib/libc/yp/xdryp.c
100
out.ypresp_all_u.val.val.valdat_len);
lib/libc/yp/xdryp.c
101
val[out.ypresp_all_u.val.val.valdat_len] = '\0';
lib/libc/yp/xdryp.c
105
key, out.ypresp_all_u.val.key.keydat_len,
lib/libc/yp/xdryp.c
106
val, out.ypresp_all_u.val.val.valdat_len,
lib/libc/yp/xdryp.c
110
free(val);
lib/libc/yp/xdryp.c
65
char *key, *val;
lib/libc/yp/xdryp.c
80
status = out.ypresp_all_u.val.stat;
lib/libc/yp/xdryp.c
83
key = (char *)malloc(out.ypresp_all_u.val.key.keydat_len + 1);
lib/libc/yp/xdryp.c
89
bcopy(out.ypresp_all_u.val.key.keydat_val, key,
lib/libc/yp/xdryp.c
90
out.ypresp_all_u.val.key.keydat_len);
lib/libc/yp/xdryp.c
91
key[out.ypresp_all_u.val.key.keydat_len] = '\0';
lib/libc/yp/xdryp.c
92
val = (char *)malloc(out.ypresp_all_u.val.val.valdat_len + 1);
lib/libc/yp/xdryp.c
93
if (val == NULL) {
lib/libc/yp/xdryp.c
99
bcopy(out.ypresp_all_u.val.val.valdat_val, val,
lib/libc/yp/yplib.c
165
valdat *val)
lib/libc/yp/yplib.c
212
new->ypc_val.valdat_val = malloc(val->valdat_len);
lib/libc/yp/yplib.c
222
new->ypc_val.valdat_len = val->valdat_len;
lib/libc/yp/yplib.c
224
bcopy(val->valdat_val, new->ypc_val.valdat_val, val->valdat_len);
lib/libc/yp/yplib.c
236
valdat *val)
lib/libc/yp/yplib.c
255
val->valdat_len = c->ypc_val.valdat_len;
lib/libc/yp/yplib.c
256
val->valdat_val = c->ypc_val.valdat_val;
lib/libc/yp/yplib.c
675
if (ypmatch_cache_lookup(ysd, yprk.map, &yprk.key, &yprv.val) == TRUE) {
lib/libc/yp/yplib.c
680
*outvallen = yprv.val.valdat_len;
lib/libc/yp/yplib.c
688
bcopy(yprv.val.valdat_val, *outval, *outvallen);
lib/libc/yp/yplib.c
723
*outvallen = yprv.val.valdat_len;
lib/libc/yp/yplib.c
732
bcopy(yprv.val.valdat_val, *outval, *outvallen);
lib/libc/yp/yplib.c
735
ypmatch_cache_insert(ysd, yprk.map, &yprk.key, &yprv.val);
lib/libc/yp/yplib.c
825
*outvallen = yprkv.val.valdat_len;
lib/libc/yp/yplib.c
835
bcopy(yprkv.val.valdat_val, *outval, *outvallen);
lib/libc/yp/yplib.c
906
*outvallen = yprkv.val.valdat_len;
lib/libc/yp/yplib.c
916
bcopy(yprkv.val.valdat_val, *outval, *outvallen);
lib/libcam/scsi_cmdparse.c
552
u_char val;
lib/libcam/scsi_cmdparse.c
561
val = 0;
lib/libcam/scsi_cmdparse.c
596
val |= (value << (8 - shift));
lib/libcam/scsi_cmdparse.c
600
buff[ind++] = val;
lib/libcam/scsi_cmdparse.c
601
val = 0;
lib/libcam/scsi_cmdparse.c
608
buff[ind++] = val;
lib/libcam/scsi_cmdparse.c
609
val = 0;
lib/libcam/scsi_cmdparse.c
653
buff[ind++] = val;
lib/libcam/scsi_cmdparse.c
654
val = 0;
lib/libcasper/services/cap_net/cap_net.c
453
uint64_t val;
lib/libcasper/services/cap_net/cap_net.c
455
val = family[0];
lib/libcasper/services/cap_net/cap_net.c
456
nvlist_add_number_array(nvl, "family", &val, 1);
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
100
int error, fd, val;
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
104
sz = sizeof(val);
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
105
n = read(fd, &val, sz);
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
112
error = sysctlbyname(name, NULL, NULL, &val, sz);
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
1604
int mib[2], val = 420;
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
1623
NULL, NULL, &val, sizeof(val)));
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
1625
NULL, NULL, &val, sizeof(val)));
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
1640
NULL, NULL, &val, sizeof(val)));
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
1642
NULL, NULL, &val, sizeof(val)));
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
80
int error, fd, val;
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
82
sz = sizeof(val);
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
83
error = sysctlbyname(name, &val, &sz, NULL, 0);
lib/libcasper/services/cap_sysctl/tests/sysctl_test.c
89
n = write(fd, &val, sz);
lib/libcuse/cuse_lib.c
640
cuse_set_local(int val)
lib/libcuse/cuse_lib.c
648
pe->is_local = val;
lib/libdevstat/devstat.c
166
#define KREADNL(kd, var, val) \
lib/libdevstat/devstat.c
167
readkmem_nl(kd, namelist[var], &val, sizeof(val))
lib/libdpv/dialogrc.c
112
char *val;
lib/libdpv/dialogrc.c
135
val = dialogrc_config_option(cp)->value.str;
lib/libdpv/dialogrc.c
136
if (val != NULL)
lib/libdpv/dialogrc.c
137
snprintf(option->value.str, STR_BUFSIZE, "%s", val);
lib/libefivar/efivar-dp-xlate.c
74
const char *val;
lib/libefivar/efivar-dp-xlate.c
93
val = geom_pp_attr(mesh, pp, "efimedia");
lib/libefivar/efivar-dp-xlate.c
94
if (val == NULL)
lib/libefivar/efivar-dp-xlate.c
96
if (strcasecmp(efimedia, val) == 0)
lib/libefivar/uefi-dplib.h
589
WriteUnaligned64(void *ptr, uint64_t val)
lib/libefivar/uefi-dplib.h
591
memcpy(ptr, &val, sizeof(val));
lib/libfetch/http.c
1385
int af, val;
lib/libfetch/http.c
1486
val = 1;
lib/libfetch/http.c
1487
setsockopt(conn->sd, IPPROTO_TCP, TCP_NOPUSH, &val, sizeof(val));
lib/libfetch/http.c
1592
int e, i, n, val;
lib/libfetch/http.c
1790
val = 0;
lib/libfetch/http.c
1791
setsockopt(conn->sd, IPPROTO_TCP, TCP_NOPUSH, &val,
lib/libfetch/http.c
1792
sizeof(val));
lib/libfetch/http.c
1793
val = 1;
lib/libfetch/http.c
1794
setsockopt(conn->sd, IPPROTO_TCP, TCP_NODELAY, &val,
lib/libfetch/http.c
1795
sizeof(val));
lib/libifconfig/libifconfig_sfp_tables.tpl.h
50
val, sym, desc, disp = table.unpack(item)
lib/libifconfig/libifconfig_sfp_tables.tpl.h
53
{*symbol*} = {*val*}, /**< {*desc*} */
lib/libipsec/pfkey_dump.c
83
if (p->val == (num)) \
lib/libipsec/pfkey_dump.c
99
int val;
lib/libipsec/policy_parse.y
102
} val;
lib/libipsec/policy_parse.y
110
%type <val> IPADDRESS LEVEL_SPECIFY
lib/libkvm/kvm_private.h
134
_kvm16toh(kvm_t *kd, uint16_t val)
lib/libkvm/kvm_private.h
138
return (le16toh(val));
lib/libkvm/kvm_private.h
140
return (be16toh(val));
lib/libkvm/kvm_private.h
144
_kvm32toh(kvm_t *kd, uint32_t val)
lib/libkvm/kvm_private.h
148
return (le32toh(val));
lib/libkvm/kvm_private.h
150
return (be32toh(val));
lib/libkvm/kvm_private.h
154
_kvm64toh(kvm_t *kd, uint64_t val)
lib/libkvm/kvm_private.h
158
return (le64toh(val));
lib/libkvm/kvm_private.h
160
return (be64toh(val));
lib/libnetbsd/strsuftoll.c
107
strsuftollx(const char *desc, const char *val,
lib/libnetbsd/strsuftoll.c
116
while (isspace((unsigned char)*val)) /* Skip leading space */
lib/libnetbsd/strsuftoll.c
117
val++;
lib/libnetbsd/strsuftoll.c
119
num = strtoll(val, &expr, 10);
lib/libnetbsd/strsuftoll.c
123
if (expr == val) /* No digits */
lib/libnetbsd/strsuftoll.c
189
"%s `%s': illegal number", desc, val);
lib/libnetbsd/strsuftoll.c
211
strsuftoll(const char *desc, const char *val,
lib/libnetbsd/strsuftoll.c
217
result = strsuftollx(desc, val, min, max, errbuf, sizeof(errbuf));
lib/libpam/modules/pam_krb5/pam_krb5.c
1053
return princ->name.name_string.val[n];
lib/libpam/modules/pam_ssh/pam_ssh.c
240
char *line, *p, *key, *val;
lib/libpam/modules/pam_ssh/pam_ssh.c
256
for (val = ++p; p < line + len; ++p)
lib/libpam/modules/pam_ssh/pam_ssh.c
264
openpam_log(PAM_LOG_DEBUG, "got %s: %s", key, val);
lib/libpam/modules/pam_ssh/pam_ssh.c
265
pam_setenv(pamh, key, val, 1);
lib/libpmc/pmu-events/jevents.c
230
static struct msrmap *lookup_msr(char *map, jsmntok_t *val)
lib/libpmc/pmu-events/jevents.c
232
jsmntok_t newval = *val;
lib/libpmc/pmu-events/jevents.c
243
json_len(val), map + val->start);
lib/libpmc/pmu-events/jevents.c
278
static const char *field_to_perf(struct map *table, char *map, jsmntok_t *val)
lib/libpmc/pmu-events/jevents.c
283
if (json_streq(map, val, table[i].json))
lib/libpmc/pmu-events/jevents.c
598
jsmntok_t *field, *val;
lib/libpmc/pmu-events/jevents.c
605
val = tok + j + 1;
lib/libpmc/pmu-events/jevents.c
606
EXPECT(val->type == JSMN_STRING, tok + j + 1,
lib/libpmc/pmu-events/jevents.c
609
nz = !json_streq(map, val, "0");
lib/libpmc/pmu-events/jevents.c
622
addfield(map, &umask, "", "umask=", val);
lib/libpmc/pmu-events/jevents.c
624
addfield(map, &allcores, "", "allcores=", val);
lib/libpmc/pmu-events/jevents.c
626
addfield(map, &allslices, "", "allslices=", val);
lib/libpmc/pmu-events/jevents.c
636
addfield(map, &sliceid, "", "sourceid=", val);
lib/libpmc/pmu-events/jevents.c
639
addfield(map, &threadmask, "", "l3_thread_mask=", val);
lib/libpmc/pmu-events/jevents.c
642
addfield(map, &cmask, "", "cmask=", val);
lib/libpmc/pmu-events/jevents.c
647
addfield(map, &inv, "", "inv=", val);
lib/libpmc/pmu-events/jevents.c
650
addfield(map, &any, "", "any=", val);
lib/libpmc/pmu-events/jevents.c
653
addfield(map, &edge, "", "edge=", val);
lib/libpmc/pmu-events/jevents.c
656
addfield(map, &period, "", "period=", val);
lib/libpmc/pmu-events/jevents.c
658
addfield(map, &fc_mask, "", "fc_mask=", val);
lib/libpmc/pmu-events/jevents.c
660
addfield(map, &ch_mask, "", "ch_mask=", val);
lib/libpmc/pmu-events/jevents.c
663
addfield(map, &code, "", "", val);
lib/libpmc/pmu-events/jevents.c
668
addfield(map, &code, "", "", val);
lib/libpmc/pmu-events/jevents.c
674
addfield(map, &code, "", "", val);
lib/libpmc/pmu-events/jevents.c
678
addfield(map, &je.name, "", "", val);
lib/libpmc/pmu-events/jevents.c
680
addfield(map, &je.compat, "", "", val);
lib/libpmc/pmu-events/jevents.c
682
addfield(map, &je.desc, "", "", val);
lib/libpmc/pmu-events/jevents.c
686
addfield(map, &je.long_desc, "", "", val);
lib/libpmc/pmu-events/jevents.c
689
precise = val;
lib/libpmc/pmu-events/jevents.c
691
msr = lookup_msr(map, val);
lib/libpmc/pmu-events/jevents.c
693
msrval = val;
lib/libpmc/pmu-events/jevents.c
695
!json_streq(map, val, "null")) {
lib/libpmc/pmu-events/jevents.c
697
" Spec update: ", val);
lib/libpmc/pmu-events/jevents.c
705
ppmu = field_to_perf(unit_to_pmu, map, val);
lib/libpmc/pmu-events/jevents.c
711
addfield(map, &je.pmu, "", "", val);
lib/libpmc/pmu-events/jevents.c
716
addfield(map, &filter, "", "", val);
lib/libpmc/pmu-events/jevents.c
718
addfield(map, &je.unit, "", "", val);
lib/libpmc/pmu-events/jevents.c
720
addfield(map, &je.perpkg, "", "", val);
lib/libpmc/pmu-events/jevents.c
722
addfield(map, &je.aggr_mode, "", "", val);
lib/libpmc/pmu-events/jevents.c
724
addfield(map, &je.deprecated, "", "", val);
lib/libpmc/pmu-events/jevents.c
726
addfield(map, &je.metric_name, "", "", val);
lib/libpmc/pmu-events/jevents.c
728
addfield(map, &je.metric_group, "", "", val);
lib/libpmc/pmu-events/jevents.c
730
addfield(map, &je.metric_group_nogroup, "", "", val);
lib/libpmc/pmu-events/jevents.c
732
addfield(map, &je.default_metric_group, "", "", val);
lib/libpmc/pmu-events/jevents.c
734
addfield(map, &je.metric_constraint, "", "", val);
lib/libpmc/pmu-events/jevents.c
736
addfield(map, &je.metric_expr, "", "", val);
lib/libpmc/pmu-events/jevents.c
738
addfield(map, &je.metric_threshold, "", "", val);
lib/libpmc/pmu-events/jevents.c
740
addfield(map, &arch_std, "", "", val);
lib/libpmc/pmu-events/jevents.c
781
if (json_streq(map, val, "1"))
lib/libproc/tests/proc_test.c
86
remove_bkpt(struct proc_handle *phdl, uintptr_t addr, u_long val)
lib/libproc/tests/proc_test.c
90
error = proc_bkptdel(phdl, addr, val);
lib/libprocstat/common_kvm.c
131
vn->vn_fsid = mount.mnt_stat.f_fsid.val[0];
lib/libprocstat/libprocstat.c
2779
rlim_t *val;
lib/libprocstat/libprocstat.c
2791
val = malloc(len);
lib/libprocstat/libprocstat.c
2792
if (val == NULL)
lib/libprocstat/libprocstat.c
2795
error = sysctl(name, nitems(name), val, &len, NULL, 0);
lib/libprocstat/libprocstat.c
2797
free(val);
lib/libprocstat/libprocstat.c
2801
return (val);
lib/libprocstat/libprocstat.c
2834
struct kinfo_knote *val;
lib/libprocstat/libprocstat.c
2851
val = malloc(len);
lib/libprocstat/libprocstat.c
2852
if (val == NULL) {
lib/libprocstat/libprocstat.c
2857
error = sysctl(name, nitems(name), val, &len, NULL, 0);
lib/libprocstat/libprocstat.c
2862
free(val);
lib/libprocstat/libprocstat.c
2865
*cntp = len / sizeof(*val);
lib/libprocstat/libprocstat.c
2866
return (val);
lib/libprocstat/smbfs.c
76
vn->vn_fsid = mnt.mnt_stat.f_fsid.val[0];
lib/libprocstat/zfs.c
105
vn->vn_fsid = mount.mnt_stat.f_fsid.val[0];
lib/librpcsec_gss/rpcsec_gss_prot.c
53
char *val;
lib/librpcsec_gss/rpcsec_gss_prot.c
57
val = p->value;
lib/librpcsec_gss/rpcsec_gss_prot.c
59
ret = xdr_bytes(xdrs, &val, &len, MAX_GSS_SIZE);
lib/librpcsec_gss/rpcsec_gss_prot.c
60
p->value = val;
lib/librpcsvc/xcrypt.c
155
unsigned val;
lib/librpcsvc/xcrypt.c
158
val = binnum[i];
lib/librpcsvc/xcrypt.c
159
hexnum[i*2] = hex[val >> 4];
lib/librpcsvc/xcrypt.c
160
hexnum[i*2+1] = hex[val & 0xf];
lib/librss/librss.c
102
return (val);
lib/librss/librss.c
47
rss_sock_set_recvrss(int fd, int af, int val)
lib/librss/librss.c
69
opt = val;
lib/librss/librss.c
78
opt = val;
lib/librss/librss.c
92
int val, retval;
lib/librss/librss.c
96
retval = sysctlbyname(s, &val, &rlen, NULL, 0);
lib/librss/librss.h
51
extern int rss_sock_set_recvrss(int fd, int af, int val);
lib/librt/aio.c
50
typedef void (*aio_func)(union sigval val, struct aiocb *iocb);
lib/librt/mq.c
106
typedef void (*mq_func)(union sigval val);
lib/librt/timer.c
66
typedef void (*timer_func)(union sigval val, int overrun);
lib/libsecureboot/openpgp/decode.c
65
int val;
lib/libsecureboot/openpgp/decode.c
67
for (val = i = 0; i < n; i++) {
lib/libsecureboot/openpgp/decode.c
68
val |= (*ptr++ << ((n - i - 1) * 8));
lib/libsecureboot/openpgp/decode.c
70
return (val);
lib/libsecureboot/verify_file.c
362
long val;
lib/libsecureboot/verify_file.c
364
val = def;
lib/libsecureboot/verify_file.c
367
val = strtol(cp, &ep, 0);
lib/libsecureboot/verify_file.c
368
if ((ep && *ep) || val != (int)val) {
lib/libsecureboot/verify_file.c
369
val = def;
lib/libsecureboot/verify_file.c
372
return (int)val;
lib/libstdthreads/tss.c
58
tss_set(tss_t key, void *val)
lib/libstdthreads/tss.c
61
if (pthread_setspecific(key, val) != 0)
lib/libsys/_libsys.h
550
int __sys_setsockopt(int s, int level, int name, const void * val, __socklen_t valsize);
lib/libsys/_libsys.h
554
int __sys_getsockopt(int s, int level, int name, void * val, __socklen_t * avalsize);
lib/libsys/_libsys.h
712
int __sys_ksem_getvalue(semid_t id, int * val);
lib/libsys/_libsys.h
752
int __sys__umtx_op(void * obj, int op, u_long val, void * uaddr1, void * uaddr2);
lib/libsys/_umtx_op_err.c
34
_umtx_op_err(void *obj, int op, u_long val, void *uaddr, void *uaddr2)
lib/libsys/_umtx_op_err.c
36
if (_umtx_op(obj, op, val, uaddr, uaddr2) == -1)
lib/libsysdecode/flags.c
1036
if (cap_rights_is_set(rightsp, t->val)) {
lib/libsysdecode/flags.c
1037
cap_rights_clear(&diff, t->val);
lib/libsysdecode/flags.c
1038
if (cap_rights_is_set(&sum, t->val)) {
lib/libsysdecode/flags.c
1042
cap_rights_set(&sum, t->val);
lib/libsysdecode/flags.c
1074
cap_rights_init(&tr, t->val);
lib/libsysdecode/flags.c
1076
cap_rights_init(&qr, q->val);
lib/libsysdecode/flags.c
206
uintmax_t val;
lib/libsysdecode/flags.c
219
val = type & (SOCK_CLOEXEC | SOCK_CLOFORK | SOCK_NONBLOCK);
lib/libsysdecode/flags.c
220
print_mask_part(fp, sockflags, &val, &printed);
lib/libsysdecode/flags.c
272
uintmax_t val;
lib/libsysdecode/flags.c
299
val = (unsigned)flags;
lib/libsysdecode/flags.c
300
print_mask_part(fp, openflags, &val, &printed);
lib/libsysdecode/flags.c
302
*rem = val | mode;
lib/libsysdecode/flags.c
811
uintmax_t val;
lib/libsysdecode/flags.c
815
val = (unsigned)op;
lib/libsysdecode/flags.c
816
print_mask_part(fp, umtxopflags, &val, &printed);
lib/libsysdecode/flags.c
818
*rem = val;
lib/libsysdecode/flags.c
924
uintmax_t val;
lib/libsysdecode/flags.c
933
val = (unsigned)flags & ~MAP_ALIGNMENT_MASK;
lib/libsysdecode/flags.c
934
print_mask_part(fp, mmapflags, &val, &printed);
lib/libsysdecode/flags.c
946
*rem = val;
lib/libsysdecode/linux.c
208
uintmax_t val;
lib/libsysdecode/linux.c
231
val = (unsigned)flags;
lib/libsysdecode/linux.c
232
print_mask_part(fp, openflags, &val, &printed);
lib/libsysdecode/linux.c
234
*rem = val | mode;
lib/libsysdecode/linux.c
241
uintmax_t val;
lib/libsysdecode/linux.c
248
val = (unsigned)flags & ~LINUX_CSIGNAL;
lib/libsysdecode/linux.c
249
print_mask_part(fp, cloneflags, &val, &printed);
lib/libsysdecode/linux.c
251
*rem = val;
lib/libsysdecode/support.c
101
if (val == 0) {
lib/libsysdecode/support.c
107
return (print_mask_int(fp, table, val, rem));
lib/libsysdecode/support.c
116
uintmax_t val;
lib/libsysdecode/support.c
127
val = lval;
lib/libsysdecode/support.c
128
print_mask_part(fp, table, &val, &printed);
lib/libsysdecode/support.c
130
*rem = val;
lib/libsysdecode/support.c
135
print_integer(FILE *fp, int val, int base)
lib/libsysdecode/support.c
140
fprintf(fp, "0%o", val);
lib/libsysdecode/support.c
143
fprintf(fp, "%d", val);
lib/libsysdecode/support.c
146
fprintf(fp, "0x%x", val);
lib/libsysdecode/support.c
155
print_value(FILE *fp, struct name_table *table, uintmax_t val)
lib/libsysdecode/support.c
159
str = lookup_value(table, val);
lib/libsysdecode/support.c
34
lookup_value(struct name_table *table, uintmax_t val)
lib/libsysdecode/support.c
38
if (table->val == val)
lib/libsysdecode/support.c
57
if ((table->val & rem) == table->val) {
lib/libsysdecode/support.c
62
if (table->val == 0 && *valp != 0)
lib/libsysdecode/support.c
66
rem &= ~table->val;
lib/libsysdecode/support.c
83
uintmax_t val;
lib/libsysdecode/support.c
87
val = (unsigned)ival;
lib/libsysdecode/support.c
88
print_mask_part(fp, table, &val, &printed);
lib/libsysdecode/support.c
90
*rem = val;
lib/libsysdecode/support.c
98
print_mask_0(FILE *fp, struct name_table *table, int val, int *rem)
lib/libsysdecode/support.h
34
uintmax_t val;
lib/libthr/tests/atfork_test.c
169
int mask, val;
lib/libthr/tests/atfork_test.c
172
val = *var;
lib/libthr/tests/atfork_test.c
178
multi_assert((val & mask) == 0, can_assert);
lib/libthr/tests/atfork_test.c
180
multi_assert(val == 0, can_assert);
lib/libthr/tests/atfork_test.c
182
multi_assert((val & ~mask) == (mask - 1), can_assert);
lib/libthr/thread/thr_cancel.c
86
int oldval, val;
lib/libthr/thread/thr_cancel.c
90
val = 0;
lib/libthr/thread/thr_cancel.c
93
val = 1;
lib/libthr/thread/thr_cancel.c
99
oldval = atomic_swap_int(&curthread->cancel_enable, val);
lib/libthr/thread/thr_private.h
115
#define TIMESPEC_ADD(dst, src, val) \
lib/libthr/thread/thr_private.h
117
(dst)->tv_sec = (src)->tv_sec + (val)->tv_sec; \
lib/libthr/thread/thr_private.h
118
(dst)->tv_nsec = (src)->tv_nsec + (val)->tv_nsec; \
lib/libthr/thread/thr_private.h
125
#define TIMESPEC_SUB(dst, src, val) \
lib/libthr/thread/thr_private.h
127
(dst)->tv_sec = (src)->tv_sec - (val)->tv_sec; \
lib/libthr/thread/thr_private.h
128
(dst)->tv_nsec = (src)->tv_nsec - (val)->tv_nsec; \
lib/libthr/thread/thr_pshared.c
113
h->val, NULL);
lib/libthr/thread/thr_pshared.c
117
munmap(h->val, page_size);
lib/libthr/thread/thr_pshared.c
133
return (h->val);
lib/libthr/thread/thr_pshared.c
139
pshared_insert(void *key, void **val)
lib/libthr/thread/thr_pshared.c
168
if (h->val != *val) {
lib/libthr/thread/thr_pshared.c
169
munmap(*val, page_size);
lib/libthr/thread/thr_pshared.c
170
*val = h->val;
lib/libthr/thread/thr_pshared.c
180
h->val = *val;
lib/libthr/thread/thr_pshared.c
190
void *val;
lib/libthr/thread/thr_pshared.c
196
val = h->val;
lib/libthr/thread/thr_pshared.c
198
return (val);
lib/libthr/thread/thr_pshared.c
205
pshared_clean(void *key, void *val)
lib/libthr/thread/thr_pshared.c
208
if (val != NULL)
lib/libthr/thread/thr_pshared.c
209
munmap(val, page_size);
lib/libthr/thread/thr_pshared.c
216
void *val;
lib/libthr/thread/thr_pshared.c
219
val = pshared_remove(key);
lib/libthr/thread/thr_pshared.c
221
pshared_clean(key, val);
lib/libthr/thread/thr_pshared.c
41
void *val;
lib/libthread_db/libpthread_db.c
133
#define LOOKUP_VAL(proc, sym, val) \
lib/libthread_db/libpthread_db.c
140
ret = ps_pread(proc, vaddr, val, sizeof(int)); \
lib/libthread_db/libthr_db.c
118
#define LOOKUP_VAL(proc, sym, val) \
lib/libthread_db/libthr_db.c
125
ret = ps_pread(proc, vaddr, val, sizeof(int)); \
lib/libthread_db/thread_db.c
277
thr_pread(struct ps_prochandle *ph, psaddr_t addr, uint64_t *val,
lib/libthread_db/thread_db.c
280
uint8_t buf[sizeof(*val)];
lib/libthread_db/thread_db.c
294
*val = buf[0];
lib/libthread_db/thread_db.c
297
*val = be16dec(buf);
lib/libthread_db/thread_db.c
300
*val = be32dec(buf);
lib/libthread_db/thread_db.c
303
*val = be64dec(buf);
lib/libthread_db/thread_db.c
312
*val = buf[0];
lib/libthread_db/thread_db.c
315
*val = le16dec(buf);
lib/libthread_db/thread_db.c
318
*val = le32dec(buf);
lib/libthread_db/thread_db.c
321
*val = le64dec(buf);
lib/libthread_db/thread_db.c
335
thr_pread_int(const struct td_thragent *ta, psaddr_t addr, uint32_t *val)
lib/libthread_db/thread_db.c
342
*val = tmp;
lib/libthread_db/thread_db.c
348
thr_pread_long(const struct td_thragent *ta, psaddr_t addr, uint64_t *val)
lib/libthread_db/thread_db.c
351
return (thr_pread(ta->ph, addr, val, sizeof(long), BYTE_ORDER));
lib/libthread_db/thread_db.c
355
thr_pread_ptr(const struct td_thragent *ta, psaddr_t addr, psaddr_t *val)
lib/libthread_db/thread_db.c
362
*val = tmp;
lib/libthread_db/thread_db.c
368
thr_pwrite(struct ps_prochandle *ph, psaddr_t addr, uint64_t val,
lib/libthread_db/thread_db.c
371
uint8_t buf[sizeof(val)];
lib/libthread_db/thread_db.c
381
buf[0] = (uint8_t)val;
lib/libthread_db/thread_db.c
384
be16enc(buf, (uint16_t)val);
lib/libthread_db/thread_db.c
387
be32enc(buf, (uint32_t)val);
lib/libthread_db/thread_db.c
390
be64enc(buf, (uint64_t)val);
lib/libthread_db/thread_db.c
399
buf[0] = (uint8_t)val;
lib/libthread_db/thread_db.c
402
le16enc(buf, (uint16_t)val);
lib/libthread_db/thread_db.c
405
le32enc(buf, (uint32_t)val);
lib/libthread_db/thread_db.c
408
le64enc(buf, (uint64_t)val);
lib/libthread_db/thread_db.c
423
thr_pwrite_int(const struct td_thragent *ta, psaddr_t addr, uint32_t val)
lib/libthread_db/thread_db.c
426
return (thr_pwrite(ta->ph, addr, val, sizeof(int), BYTE_ORDER));
lib/libthread_db/thread_db.c
430
thr_pwrite_long(const struct td_thragent *ta, psaddr_t addr, uint64_t val)
lib/libthread_db/thread_db.c
433
return (thr_pwrite(ta->ph, addr, val, sizeof(long), BYTE_ORDER));
lib/libthread_db/thread_db.c
437
thr_pwrite_ptr(const struct td_thragent *ta, psaddr_t addr, psaddr_t val)
lib/libthread_db/thread_db.c
440
return (thr_pwrite(ta->ph, addr, val, sizeof(void *), BYTE_ORDER));
lib/libutil/login_cap.c
727
rlim_t val;
lib/libutil/login_cap.c
752
val = strtoq(res, &ep, 0);
lib/libutil/login_cap.c
760
return val;
lib/libutil/login_cap.c
783
const char * const *val;
lib/libutil/login_cap.c
799
for (i = 0, val = values; *val != NULL; val++)
lib/libutil/login_cap.c
800
if (strcmp(cand, *val) == 0) {
lib/libutil/login_class.c
400
rlim_t val;
lib/libutil/login_class.c
406
val = login_getcapnum(lc, "umask", def_val, err_val);
lib/libutil/login_class.c
408
if (val != def_val) {
lib/libutil/login_class.c
409
if (val < 0 || val > UINT16_MAX) {
lib/libutil/login_class.c
420
const mode_t mode = val;
lib/libutil/login_times.c
47
u_short val;
lib/libutil/login_times.c
49
for (val = 0; *ptr && isdigit(*ptr); ptr++)
lib/libutil/login_times.c
50
val = (u_short)(val * 10 + (*ptr - '0'));
lib/libutil/login_times.c
52
*t = (u_short)((val / 100) * 60 + (val % 100));
lib/libutil/mntopts.c
266
build_iovec(struct iovec **iov, int *iovlen, const char *name, void *val,
lib/libutil/mntopts.c
282
(*iov)[i].iov_base = val;
lib/libutil/mntopts.c
284
if (val != NULL)
lib/libutil/mntopts.c
285
len = strlen(val) + 1;
lib/libutil/mntopts.c
302
char val[255] = { 0 };
lib/libutil/mntopts.c
305
vsnprintf(val, sizeof(val), fmt, ap);
lib/libutil/mntopts.c
307
build_iovec(iov, iovlen, name, strdup(val), (size_t)-1);
lib/libutil/mntopts.h
110
void build_iovec(struct iovec **iov, int *iovlen, const char *name, void *val, size_t len);
lib/libutil/tests/expand_number_test.c
37
int64_t val;
lib/libutil/tests/expand_number_test.c
39
ATF_REQUIRE_MSG(expand_number(str, &val) == 0,
lib/libutil/tests/expand_number_test.c
41
ATF_REQUIRE_MSG(val == exp_val,
lib/libutil/tests/expand_number_test.c
43
(intmax_t)val, (intmax_t)exp_val);
lib/libutil/tests/expand_number_test.c
49
int64_t val;
lib/libutil/tests/expand_number_test.c
51
ATF_REQUIRE_MSG(expand_number(str, &val) == -1,
lib/libutil/tests/expand_number_test.c
52
"String '%s' parsed as %jd instead of error", str, (intmax_t)val);
lib/libutil/uucplock.c
50
#define GORET(level, val) { err = errno; uuerr = (val); \
lib/libvgl/simple.c
676
byte val;
lib/libvgl/simple.c
681
outb(0x3C4, 0x01); val = inb(0x3C5); outb(0x3C4, 0x01);
lib/libvgl/simple.c
682
outb(0x3C5, ((blank) ? (val |= 0x20) : (val &= 0xDF)));
lib/libvmmapi/vmmapi.c
748
vm_set_register(struct vcpu *vcpu, int reg, uint64_t val)
lib/libvmmapi/vmmapi.c
755
vmreg.regval = val;
lib/libvmmapi/vmmapi.c
868
vm_set_capability(struct vcpu *vcpu, enum vm_cap_type cap, int val)
lib/libvmmapi/vmmapi.c
874
vmcap.capval = val;
lib/libvmmapi/vmmapi.h
155
int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val);
lib/libvmmapi/vmmapi.h
203
int val);
libexec/atf/atf-pytest-wrapper/atf_pytest_wrapper.cpp
50
for (auto &val: vec) {
libexec/atf/atf-pytest-wrapper/atf_pytest_wrapper.cpp
51
std::cerr << "'" << val << "' ";
libexec/getty/chat.c
106
int i, val = 0;
libexec/getty/chat.c
117
val = (val * base) + sval;
libexec/getty/chat.c
120
return val;
libexec/getty/subr.c
537
speed(int val)
libexec/getty/subr.c
541
if (val <= B230400)
libexec/getty/subr.c
542
return (val);
libexec/getty/subr.c
545
if (sp->speed == val)
libexec/phttpget/phttpget.c
319
int val; /* Value used for setsockopt call */
libexec/phttpget/phttpget.c
374
val = 1;
libexec/phttpget/phttpget.c
376
(void *)&val, sizeof(int));
libexec/rbootd/rmp_var.h
144
typedef struct _uword { u_int16_t val[2]; } u_word;
libexec/rbootd/rmp_var.h
147
((w.val[_WORD_HIGHPART] == 0) && (w.val[_WORD_LOWPART] == 0))
libexec/rbootd/rmp_var.h
149
(w).val[_WORD_HIGHPART] = (w).val[_WORD_LOWPART] = 0
libexec/rbootd/rmp_var.h
151
{ (w2).val[_WORD_HIGHPART] = (w1).val[_WORD_HIGHPART]; \
libexec/rbootd/rmp_var.h
152
(w2).val[_WORD_LOWPART] = (w1).val[_WORD_LOWPART]; \
libexec/rbootd/rmp_var.h
155
(i) = (((u_int32_t)ntohs((w).val[_WORD_HIGHPART])) << 16) | ntohs((w).val[_WORD_LOWPART])
libexec/rbootd/rmp_var.h
157
{ (w).val[_WORD_HIGHPART] = htons((u_int16_t) ((i >> 16) & 0xffff)); \
libexec/rbootd/rmp_var.h
158
(w).val[_WORD_LOWPART] = htons((u_int16_t) (i & 0xffff)); \
libexec/rpc.rstatd/rstat_proc.c
164
uint64_t val;
libexec/rpc.rstatd/rstat_proc.c
225
if (sysctlbyname("vm.stats." #cnt , &val, &len, NULL, 0) < 0) { \
libexec/rpc.rstatd/rstat_proc.c
229
stat = val; \
libexec/rtld-elf/arm/reloc.c
128
store_ptr(void *where, Elf_Addr val)
libexec/rtld-elf/arm/reloc.c
131
memcpy(where, &val, sizeof(val));
libexec/rtld-elf/rtld.c
289
int rtld_set_var(const char *name, const char *val) __exported;
libexec/rtld-elf/rtld.c
383
const char *val;
libexec/rtld-elf/rtld.c
431
return (ld_env_vars[idx].val);
libexec/rtld-elf/rtld.c
476
if (lvd->val != NULL) {
libexec/rtld-elf/rtld.c
483
lvd->val = v + 1;
libexec/rtld-elf/rtld.c
6476
l->val = v + 1;
libexec/rtld-elf/rtld.c
6490
ld_env_vars[ll].val = NULL;
libexec/rtld-elf/rtld.c
6673
return (lvd->val);
libexec/rtld-elf/rtld.c
6701
rtld_recalc_debug(lvd->val);
libexec/rtld-elf/rtld.c
6707
ld_library_path = lvd->val;
libexec/rtld-elf/rtld.c
6713
ld_library_dirs = lvd->val;
libexec/rtld-elf/rtld.c
6734
rtld_recalc_path_rpath(lvd->val);
libexec/rtld-elf/rtld.c
6747
ld_bind_now = lvd->val;
libexec/rtld-elf/rtld.c
6754
rtld_recalc_bind_not(lvd->val);
libexec/rtld-elf/rtld.c
6760
ld_dynamic_weak = lvd->val == NULL;
libexec/rtld-elf/rtld.c
6766
ld_loadfltr = lvd->val != NULL;
libexec/rtld-elf/rtld.c
6772
libmap_disable = lvd->val != NULL;
libexec/rtld-elf/rtld.c
6776
rtld_set_var(const char *name, const char *val)
libexec/rtld-elf/rtld.c
6794
free(__DECONST(char *, lvd->val));
libexec/rtld-elf/rtld.c
6795
if (val != NULL)
libexec/rtld-elf/rtld.c
6796
lvd->val = xstrdup(val);
libexec/rtld-elf/rtld.c
6798
lvd->val = NULL;
libexec/rtld-elf/rtld.c
744
lvd->val = NULL;
libexec/rtld-elf/tests/libdeep/libdeep.c
24
proxy_set_value(int val)
libexec/rtld-elf/tests/libdeep/libdeep.c
27
return (set_value(val));
libexec/rtld-elf/tests/libval/libval.c
18
return (val);
libexec/rtld-elf/tests/libval/libval.c
25
val = nval;
libexec/rtld-elf/tests/libval/libval.c
9
static int val;
libexec/ypxfr/ypxfr_main.c
123
ypxfr_foreach(int status, char *key, int keylen, char *val, int vallen,
libexec/ypxfr/ypxfr_main.c
145
dbval.data = val;
sbin/bectl/bectl_jail.c
101
if ((val = strchr(name, '=')) != NULL)
sbin/bectl/bectl_jail.c
102
*val++ = '\0';
sbin/bectl/bectl_jail.c
113
const char *name, *val;
sbin/bectl/bectl_jail.c
143
if (nvpair_value_string(nvp, &val) != 0)
sbin/bectl/bectl_jail.c
146
if (asprintf(&jargv[iarg++], "%s=%s", name, val) < 0)
sbin/bectl/bectl_jail.c
23
static void jailparam_add(const char *name, const char *val);
sbin/bectl/bectl_jail.c
41
jailparam_add(const char *name, const char *val)
sbin/bectl/bectl_jail.c
44
nvlist_add_string(jailparams, name, val);
sbin/bectl/bectl_jail.c
58
char *name, *val;
sbin/bectl/bectl_jail.c
64
if ((val = strchr(arg, '=')) == NULL) {
sbin/bectl/bectl_jail.c
70
*val++ = '\0';
sbin/bectl/bectl_jail.c
72
if (strlen(val) >= BE_MAXPATHLEN) {
sbin/bectl/bectl_jail.c
75
val, BE_MAXPATHLEN);
sbin/bectl/bectl_jail.c
78
strlcpy(mnt_loc, val, sizeof(mnt_loc));
sbin/bectl/bectl_jail.c
89
jailparam_add(name, val);
sbin/bectl/bectl_jail.c
96
char *name, *val;
sbin/bectl/bectl_list.c
19
const char *val;
sbin/bectl/bectl_list.c
338
nvlist_lookup_string(sc_prev.nvl, property, &sc_prev.val);
sbin/bectl/bectl_list.c
344
nvlist_lookup_string(sc_next.nvl, property, &sc_next.val);
sbin/bectl/bectl_list.c
353
lval = strtoull(sc_prev.val, NULL, 10);
sbin/bectl/bectl_list.c
354
rval = strtoull(sc_next.val, NULL, 10);
sbin/bectl/bectl_list.c
364
if ((strcmp(sc_prev.val, sc_next.val) < 0 && reverse) ||
sbin/bectl/bectl_list.c
365
(strcmp(sc_prev.val, sc_next.val) > 0 && !reverse))
sbin/camcontrol/camcontrol.c
5844
uint64_t val;
sbin/camcontrol/camcontrol.c
5866
val = 0;
sbin/camcontrol/camcontrol.c
5868
SSD_DESC_INFO, &val, NULL);
sbin/camcontrol/camcontrol.c
5869
*error = (val >> 24) & 0xff;
sbin/camcontrol/camcontrol.c
5870
*status = (val >> 16) & 0xff;
sbin/camcontrol/camcontrol.c
5871
*device = (val >> 8) & 0xff;
sbin/camcontrol/camcontrol.c
5872
*count = val & 0xff;
sbin/camcontrol/camcontrol.c
5874
val = 0;
sbin/camcontrol/camcontrol.c
5876
SSD_DESC_COMMAND, &val, NULL);
sbin/camcontrol/camcontrol.c
5877
*lba = ((val >> 16) & 0xff) | (val & 0xff00) |
sbin/camcontrol/camcontrol.c
5878
((val & 0xff) << 16);
sbin/camcontrol/camcontrol.c
5881
return ((val >> 28) & 0x06);
sbin/camcontrol/camcontrol.c
6693
uint32_t val;
sbin/camcontrol/camcontrol.c
6696
val = scsi_2btoul(&sks[1]);
sbin/camcontrol/camcontrol.c
6697
percentage = 10000ull * val;
sbin/camcontrol/camcontrol.c
6706
val, 0x10000);
sbin/camcontrol/camcontrol.c
6759
u_int val, perc;
sbin/camcontrol/camcontrol.c
6828
val = lba & 0xffff;
sbin/camcontrol/camcontrol.c
6829
perc = 10000 * val;
sbin/camcontrol/camcontrol.c
6834
val, 0x10000);
sbin/camcontrol/camcontrol.c
6849
u_int val, perc;
sbin/camcontrol/camcontrol.c
6905
val = scsi_2btoul(&sks[1]);
sbin/camcontrol/camcontrol.c
6906
perc = 10000 * val;
sbin/camcontrol/camcontrol.c
6911
val, 0x10000);
sbin/ccdconfig/ccdconfig.c
413
int i, tmp, val;
sbin/ccdconfig/ccdconfig.c
416
val = (int)strtol(flags, &cp, 0);
sbin/ccdconfig/ccdconfig.c
418
if (val & ~(CCDF_UNIFORM|CCDF_MIRROR))
sbin/ccdconfig/ccdconfig.c
420
return (val);
sbin/devd/devd.cc
1234
set_variable(const char *var, const char *val)
sbin/devd/devd.cc
1236
cfg.set_variable(var, val);
sbin/devd/devd.cc
1238
free(const_cast<char *>(val));
sbin/devd/devd.cc
1287
int val = 0;
sbin/devd/devd.cc
1290
len = sizeof(val);
sbin/devd/devd.cc
1291
if (sysctlbyname(SYSCTL, &val, &len, NULL, 0) != 0)
sbin/devd/devd.cc
1293
if (val == 0) {
sbin/devd/devd.cc
1295
val = 1000;
sbin/devd/devd.cc
1296
if (sysctlbyname(SYSCTL, NULL, NULL, &val, sizeof(val)))
sbin/devd/devd.cc
420
var_list::fix_value(const std::string &val) const
sbin/devd/devd.cc
422
std::string rv(val);
sbin/devd/devd.cc
432
var_list::set_variable(const string &var, const string &val)
sbin/devd/devd.cc
440
_vars[var] = fix_value(val);
sbin/devd/devd.cc
442
devdlog(LOG_DEBUG, "setting %s=%s\n", var.c_str(), val.c_str());
sbin/devd/devd.cc
626
config::set_variable(const char *var, const char *val)
sbin/devd/devd.cc
628
_var_list_table.back()->set_variable(var, val);
sbin/devd/devd.hh
162
void set_variable(const char *var, const char *val);
sbin/devd/devd.hh
45
void set_variable(const std::string &var, const std::string &val);
sbin/devd/devd.hh
59
std::string fix_value(const std::string &val) const;
sbin/devmatch/devmatch.c
161
getstr(void **ptr, char *val)
sbin/devmatch/devmatch.c
167
memcpy(val, c + 1, len);
sbin/devmatch/devmatch.c
168
val[len] = 0;
sbin/devmatch/devmatch.c
174
pnpval_as_int(const char *val, const char *pnpinfo)
sbin/devmatch/devmatch.c
183
cp = strchr(val, ';');
sbin/devmatch/devmatch.c
186
strlcpy(key + 1, val, sizeof(key) - 1);
sbin/devmatch/devmatch.c
188
memcpy(key + 1, val, cp - val);
sbin/devmatch/devmatch.c
189
key[cp - val + 1] = '\0';
sbin/devmatch/devmatch.c
218
pnpval_as_str(const char *val, const char *pnpinfo)
sbin/devmatch/devmatch.c
229
cp = strchr(val, ';');
sbin/devmatch/devmatch.c
232
strlcpy(key + 1, val, sizeof(key) - 1);
sbin/devmatch/devmatch.c
234
memcpy(key + 1, val, cp - val);
sbin/devmatch/devmatch.c
235
key[cp - val + 1] = '\0';
sbin/dhclient/clparse.c
110
token = peek_token(&val, cfile);
sbin/dhclient/clparse.c
115
token = next_token(&val, cfile); /* Clear the peek buffer */
sbin/dhclient/clparse.c
153
char *val;
sbin/dhclient/clparse.c
163
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
201
char *val;
sbin/dhclient/clparse.c
205
switch (next_token(&val, cfile)) {
sbin/dhclient/clparse.c
305
char *val;
sbin/dhclient/clparse.c
308
token = peek_token(&val, cfile);
sbin/dhclient/clparse.c
312
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
318
convert_num(&buf[len], val, 16, 8);
sbin/dhclient/clparse.c
324
token = peek_token(&val, cfile);
sbin/dhclient/clparse.c
326
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
328
val = (char *)buf;
sbin/dhclient/clparse.c
330
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
331
len = strlen(val);
sbin/dhclient/clparse.c
337
memcpy(buf, val, len + 1);
sbin/dhclient/clparse.c
355
char *val;
sbin/dhclient/clparse.c
359
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
366
if (!strcasecmp(dhcp_options[i].name, val))
sbin/dhclient/clparse.c
370
parse_warn("%s: unexpected option name.", val);
sbin/dhclient/clparse.c
376
parse_warn("%s: too many options.", val);
sbin/dhclient/clparse.c
380
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
398
char *val;
sbin/dhclient/clparse.c
401
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
408
ip = interface_or_dummy(val);
sbin/dhclient/clparse.c
416
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
424
token = peek_token(&val, cfile);
sbin/dhclient/clparse.c
433
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
498
char *val;
sbin/dhclient/clparse.c
500
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
516
token = peek_token(&val, cfile);
sbin/dhclient/clparse.c
526
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
625
char *val;
sbin/dhclient/clparse.c
628
switch (next_token(&val, cfile)) {
sbin/dhclient/clparse.c
633
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
639
ip = interface_or_dummy(val);
sbin/dhclient/clparse.c
64
char *val;
sbin/dhclient/clparse.c
676
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
686
char *val;
sbin/dhclient/clparse.c
700
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
707
if ((vendor = strdup(val)) == NULL)
sbin/dhclient/clparse.c
710
token = peek_token(&val, cfile);
sbin/dhclient/clparse.c
713
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
716
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
740
val = vendor;
sbin/dhclient/clparse.c
746
(unsigned char *)val, 0);
sbin/dhclient/clparse.c
750
if (val == vendor)
sbin/dhclient/clparse.c
751
parse_warn("no option named %s", val);
sbin/dhclient/clparse.c
754
val, vendor);
sbin/dhclient/clparse.c
775
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
781
len = strlen(val);
sbin/dhclient/clparse.c
788
memcpy(&hunkbuf[hunkix], val, len + 1);
sbin/dhclient/clparse.c
809
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
817
convert_num(buf, val, 0, 32);
sbin/dhclient/clparse.c
823
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
826
convert_num(buf, val, 0, 16);
sbin/dhclient/clparse.c
832
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
835
convert_num(buf, val, 0, 8);
sbin/dhclient/clparse.c
840
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
848
if (!strcasecmp(val, "true") ||
sbin/dhclient/clparse.c
849
!strcasecmp(val, "on"))
sbin/dhclient/clparse.c
851
else if (!strcasecmp(val, "false") ||
sbin/dhclient/clparse.c
852
!strcasecmp(val, "off"))
sbin/dhclient/clparse.c
868
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
889
char *val;
sbin/dhclient/clparse.c
901
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
908
valsize = strlen(val) + 1;
sbin/dhclient/clparse.c
912
memcpy(tmp->string, val, valsize);
sbin/dhclient/clparse.c
922
token = next_token(&val, cfile);
sbin/dhclient/clparse.c
935
char *val;
sbin/dhclient/clparse.c
954
token = next_token(&val, cfile);
sbin/dhclient/convert.c
104
putUShort(unsigned char *obuf, unsigned int val)
sbin/dhclient/convert.c
106
u_int16_t tmp = htons(val);
sbin/dhclient/convert.c
112
putShort(unsigned char *obuf, int val)
sbin/dhclient/convert.c
114
int16_t tmp = htons(val);
sbin/dhclient/convert.c
88
putULong(unsigned char *obuf, u_int32_t val)
sbin/dhclient/convert.c
90
u_int32_t tmp = htonl(val);
sbin/dhclient/convert.c
96
putLong(unsigned char *obuf, int32_t val)
sbin/dhclient/convert.c
98
int32_t tmp = htonl(val);
sbin/dhclient/parse.c
103
char *val;
sbin/dhclient/parse.c
105
token = next_token(&val, cfile);
sbin/dhclient/parse.c
120
char *val, *s;
sbin/dhclient/parse.c
124
token = next_token(&val, cfile);
sbin/dhclient/parse.c
130
valsize = strlen(val) + 1;
sbin/dhclient/parse.c
133
error("no memory for string %s.", val);
sbin/dhclient/parse.c
134
memcpy(s, val, valsize);
sbin/dhclient/parse.c
163
char *val;
sbin/dhclient/parse.c
165
token = next_token(&val, cfile);
sbin/dhclient/parse.c
208
token = next_token(&val, cfile);
sbin/dhclient/parse.c
221
char *val;
sbin/dhclient/parse.c
224
token = next_token(&val, cfile);
sbin/dhclient/parse.c
230
convert_num((unsigned char *)timep, val, 10, 32);
sbin/dhclient/parse.c
251
char *val, *t;
sbin/dhclient/parse.c
265
token = peek_token(&val, cfile);
sbin/dhclient/parse.c
270
token = next_token(&val, cfile);
sbin/dhclient/parse.c
277
token = next_token(&val, cfile);
sbin/dhclient/parse.c
279
token = next_token(&val, cfile);
sbin/dhclient/parse.c
299
convert_num(s, val, base, size);
sbin/dhclient/parse.c
302
valsize = strlen(val) + 1;
sbin/dhclient/parse.c
306
memcpy(t, val, valsize);
sbin/dhclient/parse.c
337
u_int32_t val = 0;
sbin/dhclient/parse.c
378
val = val * base + tval;
sbin/dhclient/parse.c
385
if (val > max) {
sbin/dhclient/parse.c
389
negative ? "-" : "", val, max);
sbin/dhclient/parse.c
393
negative ? "-" : "", val, max);
sbin/dhclient/parse.c
397
negative ? "-" : "", val, max);
sbin/dhclient/parse.c
405
*buf = -(unsigned long)val;
sbin/dhclient/parse.c
408
putShort(buf, -(unsigned long)val);
sbin/dhclient/parse.c
411
putLong(buf, -(unsigned long)val);
sbin/dhclient/parse.c
420
*buf = (u_int8_t)val;
sbin/dhclient/parse.c
423
putUShort(buf, (u_int16_t)val);
sbin/dhclient/parse.c
426
putULong(buf, val);
sbin/dhclient/parse.c
447
char *val;
sbin/dhclient/parse.c
450
token = next_token(&val, cfile);
sbin/dhclient/parse.c
457
tm.tm_wday = atoi(val);
sbin/dhclient/parse.c
460
token = next_token(&val, cfile);
sbin/dhclient/parse.c
467
tm.tm_year = atoi(val);
sbin/dhclient/parse.c
472
token = next_token(&val, cfile);
sbin/dhclient/parse.c
481
token = next_token(&val, cfile);
sbin/dhclient/parse.c
488
tm.tm_mon = atoi(val) - 1;
sbin/dhclient/parse.c
491
token = next_token(&val, cfile);
sbin/dhclient/parse.c
500
token = next_token(&val, cfile);
sbin/dhclient/parse.c
507
tm.tm_mday = atoi(val);
sbin/dhclient/parse.c
510
token = next_token(&val, cfile);
sbin/dhclient/parse.c
517
tm.tm_hour = atoi(val);
sbin/dhclient/parse.c
520
token = next_token(&val, cfile);
sbin/dhclient/parse.c
529
token = next_token(&val, cfile);
sbin/dhclient/parse.c
536
tm.tm_min = atoi(val);
sbin/dhclient/parse.c
539
token = next_token(&val, cfile);
sbin/dhclient/parse.c
548
token = next_token(&val, cfile);
sbin/dhclient/parse.c
555
tm.tm_sec = atoi(val);
sbin/dhclient/parse.c
562
token = next_token(&val, cfile);
sbin/dhclient/parse.c
69
char *val;
sbin/dhclient/parse.c
72
token = peek_token(&val, cfile);
sbin/dhclient/parse.c
75
token = next_token(&val, cfile);
sbin/dhclient/parse.c
83
token = next_token(&val, cfile);
sbin/dhclient/parse.c
92
token = next_token(&val, cfile);
sbin/dhclient/parse.c
95
token = next_token(&val, cfile);
sbin/dump/main.c
653
long val;
sbin/dump/main.c
655
val = strtol(optarg, &p, 10);
sbin/dump/main.c
658
if (val < vmin || (vmax && val > vmax))
sbin/dump/main.c
660
return (val);
sbin/dump/traverse.c
57
#define DIP_SET(dp, field, val) do {\
sbin/dump/traverse.c
59
(dp)->dp1.field = (val); \
sbin/dump/traverse.c
61
(dp)->dp2.field = (val); \
sbin/etherswitchcfg/etherswitchcfg.c
128
return (er.val);
sbin/etherswitchcfg/etherswitchcfg.c
137
er.val = v;
sbin/etherswitchcfg/etherswitchcfg.c
151
return (er.val);
sbin/etherswitchcfg/etherswitchcfg.c
155
write_phyregister(struct cfg *cfg, int phy, int reg, int val)
sbin/etherswitchcfg/etherswitchcfg.c
161
er.val = val;
sbin/etherswitchcfg/etherswitchcfg.c
415
int phy, reg, val;
sbin/etherswitchcfg/etherswitchcfg.c
428
val = strtoul(c+1, NULL, 0);
sbin/etherswitchcfg/etherswitchcfg.c
429
write_phyregister(cfg, phy, reg, val);
sbin/etherswitchcfg/ifmedia.c
247
setmedia(const char *val, int d, int s, const struct afswtch *afp)
sbin/etherswitchcfg/ifmedia.c
263
subtype = get_media_subtype(IFM_TYPE(ifmr->ifm_ulist[0]), val);
sbin/etherswitchcfg/ifmedia.c
274
setmediaopt(const char *val, int d, int s, const struct afswtch *afp)
sbin/etherswitchcfg/ifmedia.c
277
domediaopt(val, 0, s);
sbin/etherswitchcfg/ifmedia.c
281
unsetmediaopt(const char *val, int d, int s, const struct afswtch *afp)
sbin/etherswitchcfg/ifmedia.c
284
domediaopt(val, 1, s);
sbin/etherswitchcfg/ifmedia.c
288
domediaopt(const char *val, int clear, int s)
sbin/etherswitchcfg/ifmedia.c
295
options = get_media_options(IFM_TYPE(ifmr->ifm_ulist[0]), val);
sbin/etherswitchcfg/ifmedia.c
313
setmediainst(const char *val, int d, int s, const struct afswtch *afp)
sbin/etherswitchcfg/ifmedia.c
320
inst = atoi(val);
sbin/etherswitchcfg/ifmedia.c
322
errx(1, "invalid media instance: %s", val);
sbin/etherswitchcfg/ifmedia.c
332
setmediamode(const char *val, int d, int s, const struct afswtch *afp)
sbin/etherswitchcfg/ifmedia.c
339
mode = get_media_mode(IFM_TYPE(ifmr->ifm_ulist[0]), val);
sbin/etherswitchcfg/ifmedia.c
477
get_media_subtype(int type, const char *val)
sbin/etherswitchcfg/ifmedia.c
492
rval = lookup_media_word(ttos->subtypes[i].desc, val);
sbin/etherswitchcfg/ifmedia.c
496
errx(1, "unknown media subtype: %s", val);
sbin/etherswitchcfg/ifmedia.c
501
get_media_mode(int type, const char *val)
sbin/etherswitchcfg/ifmedia.c
516
rval = lookup_media_word(ttos->modes[i].desc, val);
sbin/etherswitchcfg/ifmedia.c
524
get_media_options(int type, const char *val)
sbin/etherswitchcfg/ifmedia.c
532
optlist = strdup(val);
sbin/etherswitchcfg/ifmedia.c
565
lookup_media_word(struct ifmedia_description *desc, const char *val)
sbin/etherswitchcfg/ifmedia.c
569
if (strcasecmp(desc->ifmt_string, val) == 0)
sbin/fdisk/fdisk.c
1106
unsigned long val;
sbin/fdisk/fdisk.c
1108
val = strtoul(str, &end, 0);
sbin/fdisk/fdisk.c
1116
val *= 1024UL / secsize;
sbin/fdisk/fdisk.c
1118
val *= 1024UL * 1024UL / secsize;
sbin/fdisk/fdisk.c
1120
val *= 1024UL * 1024UL * 1024UL / secsize;
sbin/fdisk/fdisk.c
1127
return val;
sbin/fsck_ffs/fsck.h
173
#define IBLK_SET(bp, i, val) do { \
sbin/fsck_ffs/fsck.h
175
(bp)->b_un.b_indir1[i] = (val); \
sbin/fsck_ffs/fsck.h
177
(bp)->b_un.b_indir2[i] = (val); \
sbin/fsck_ffs/fsck.h
82
#define DIP_SET(dp, field, val) do { \
sbin/fsck_ffs/fsck.h
84
(dp)->dp1.field = (val); \
sbin/fsck_ffs/fsck.h
86
(dp)->dp2.field = (val); \
sbin/fsdb/fsdb.c
1168
char *p, *val;
sbin/fsdb/fsdb.c
1174
nsec = strtoul(++p, &val, 0);
sbin/fsdb/fsdb.c
1175
if (val == p || *val != '\0' || nsec >= 1000000000 || nsec < 0) {
sbin/fsdb/fsdb.c
769
char *p, *val;
sbin/fsdb/fsdb.c
783
while ((val = strsep(&p, "/")) != NULL && *val == '\0');
sbin/fsdb/fsdb.c
784
if (val) {
sbin/fsdb/fsdb.c
785
printf("component `%s': ", val);
sbin/fsdb/fsdb.c
787
if (!dolookup(val)) {
sbin/fsdb/fsdbutil.c
58
char *p, *val;
sbin/fsdb/fsdbutil.c
60
while ((val = strsep(&p, " \t\n")) != NULL && *val == '\0')
sbin/fsdb/fsdbutil.c
62
if (val)
sbin/fsdb/fsdbutil.c
63
argv[i] = val;
sbin/fsdb/fsdbutil.c
76
char *p, *val;
sbin/fsdb/fsdbutil.c
78
while ((val = strsep(&p, " \t\n")) != NULL && *val == '\0')
sbin/fsdb/fsdbutil.c
80
if (val)
sbin/fsdb/fsdbutil.c
81
argv[i] = val;
sbin/geom/core/geom.c
252
set_option(struct gctl_req *req, struct g_option *opt, const char *val)
sbin/geom/core/geom.c
281
if (expand_number(val, &number) == -1) {
sbin/geom/core/geom.c
292
gctl_ro_param(req, optname, -1, val);
sbin/geom/core/geom.c
297
*(int *)ptr = *val - '0';
sbin/hastd/hastd.c
1002
val = errno;
sbin/hastd/hastd.c
1009
val = errno;
sbin/hastd/hastd.c
1015
val = 0;
sbin/hastd/hastd.c
1017
if (proto_send(res->hr_conn, &val, sizeof(val)) == -1) {
sbin/hastd/hastd.c
1021
if (val == 0 && proto_connection_send(res->hr_conn, conn) == -1)
sbin/hastd/hastd.c
989
int16_t val = 0;
sbin/hastd/hastd.c
995
if (proto_recv(res->hr_conn, &val, sizeof(val)) == -1) {
sbin/hastd/primary.c
572
int16_t val;
sbin/hastd/primary.c
574
val = 1;
sbin/hastd/primary.c
575
if (proto_send(res->hr_conn, &val, sizeof(val)) == -1) {
sbin/hastd/primary.c
579
if (proto_recv(res->hr_conn, &val, sizeof(val)) == -1) {
sbin/hastd/primary.c
583
if (val != 0) {
sbin/hastd/primary.c
584
errno = val;
sbin/hastd/proto_tcp.c
409
int ret, val;
sbin/hastd/proto_tcp.c
417
val = 1;
sbin/hastd/proto_tcp.c
419
(void)setsockopt(tctx->tc_fd, SOL_SOCKET, SO_REUSEADDR, &val,
sbin/hastd/proto_tcp.c
420
sizeof(val));
sbin/ifconfig/af_inet6.c
136
setip6lifetime(if_ctx *ctx, const char *cmd, const char *val)
sbin/ifconfig/af_inet6.c
149
newval = (time_t)strtoul(val, &ep, 0);
sbin/ifconfig/af_inet6.c
150
if (val == ep)
sbin/ifconfig/af_inet6.c
577
prefix(void *val, int size)
sbin/ifconfig/af_inet6.c
579
u_char *name = (u_char *)val;
sbin/ifconfig/carp.c
111
setcarp_vhid(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
115
carpr_vhid = atoi(val);
sbin/ifconfig/carp.c
169
setcarp_passwd(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
175
carpr_key = val;
sbin/ifconfig/carp.c
179
setcarp_advskew(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
185
carpr_advskew = atoi(val);
sbin/ifconfig/carp.c
189
setcarp_advbase(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
195
carpr_advbase = atoi(val);
sbin/ifconfig/carp.c
199
setcarp_state(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
207
if (strcasecmp(carp_states[i], val) == 0) {
sbin/ifconfig/carp.c
216
setcarp_peer(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
218
carp_addr.s_addr = inet_addr(val);
sbin/ifconfig/carp.c
222
setcarp_mcast(if_ctx *ctx __unused, const char *val __unused, int dummy __unused)
sbin/ifconfig/carp.c
228
setcarp_peer6(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
236
if (getaddrinfo(val, NULL, &hints, &res) != 0)
sbin/ifconfig/carp.c
237
errx(1, "Invalid IPv6 address %s", val);
sbin/ifconfig/carp.c
244
setcarp_mcast6(if_ctx *ctx __unused, const char *val __unused, int dummy __unused)
sbin/ifconfig/carp.c
253
setcarp_version(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
255
carpr_version = atoi(val);
sbin/ifconfig/carp.c
263
setvrrp_prio(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
265
carpr_vrrp_prio = atoi(val);
sbin/ifconfig/carp.c
269
setvrrp_interval(if_ctx *ctx __unused, const char *val, int dummy __unused)
sbin/ifconfig/carp.c
271
carpr_vrrp_adv_inter = atoi(val);
sbin/ifconfig/ifbridge.c
354
setbridge_delete(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
359
strlcpy(req.ifbr_ifsname, val, sizeof(req.ifbr_ifsname));
sbin/ifconfig/ifbridge.c
361
err(1, "BRDGDEL %s", val);
sbin/ifconfig/ifbridge.c
365
setbridge_discover(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
368
do_bridgeflag(ctx, val, IFBIF_DISCOVER, 1);
sbin/ifconfig/ifbridge.c
372
unsetbridge_discover(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
375
do_bridgeflag(ctx, val, IFBIF_DISCOVER, 0);
sbin/ifconfig/ifbridge.c
379
setbridge_learn(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
382
do_bridgeflag(ctx, val, IFBIF_LEARNING, 1);
sbin/ifconfig/ifbridge.c
386
unsetbridge_learn(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
389
do_bridgeflag(ctx, val, IFBIF_LEARNING, 0);
sbin/ifconfig/ifbridge.c
393
setbridge_sticky(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
396
do_bridgeflag(ctx, val, IFBIF_STICKY, 1);
sbin/ifconfig/ifbridge.c
400
unsetbridge_sticky(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
403
do_bridgeflag(ctx, val, IFBIF_STICKY, 0);
sbin/ifconfig/ifbridge.c
407
setbridge_span(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
412
strlcpy(req.ifbr_ifsname, val, sizeof(req.ifbr_ifsname));
sbin/ifconfig/ifbridge.c
414
err(1, "BRDGADDS %s", val);
sbin/ifconfig/ifbridge.c
418
unsetbridge_span(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
423
strlcpy(req.ifbr_ifsname, val, sizeof(req.ifbr_ifsname));
sbin/ifconfig/ifbridge.c
425
err(1, "BRDGDELS %s", val);
sbin/ifconfig/ifbridge.c
429
setbridge_stp(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
432
do_bridgeflag(ctx, val, IFBIF_STP, 1);
sbin/ifconfig/ifbridge.c
436
unsetbridge_stp(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
439
do_bridgeflag(ctx, val, IFBIF_STP, 0);
sbin/ifconfig/ifbridge.c
443
setbridge_edge(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
445
do_bridgeflag(ctx, val, IFBIF_BSTP_EDGE, 1);
sbin/ifconfig/ifbridge.c
449
unsetbridge_edge(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
451
do_bridgeflag(ctx, val, IFBIF_BSTP_EDGE, 0);
sbin/ifconfig/ifbridge.c
455
setbridge_autoedge(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
457
do_bridgeflag(ctx, val, IFBIF_BSTP_AUTOEDGE, 1);
sbin/ifconfig/ifbridge.c
461
unsetbridge_autoedge(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
463
do_bridgeflag(ctx, val, IFBIF_BSTP_AUTOEDGE, 0);
sbin/ifconfig/ifbridge.c
467
setbridge_ptp(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
469
do_bridgeflag(ctx, val, IFBIF_BSTP_PTP, 1);
sbin/ifconfig/ifbridge.c
473
unsetbridge_ptp(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
475
do_bridgeflag(ctx, val, IFBIF_BSTP_PTP, 0);
sbin/ifconfig/ifbridge.c
479
setbridge_autoptp(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
481
do_bridgeflag(ctx, val, IFBIF_BSTP_AUTOPTP, 1);
sbin/ifconfig/ifbridge.c
485
unsetbridge_autoptp(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
487
do_bridgeflag(ctx, val, IFBIF_BSTP_AUTOPTP, 0);
sbin/ifconfig/ifbridge.c
491
setbridge_flush(if_ctx *ctx, const char *val __unused, int dummy __unused)
sbin/ifconfig/ifbridge.c
502
setbridge_flushall(if_ctx *ctx, const char *val __unused, int dummy __unused)
sbin/ifconfig/ifbridge.c
589
setbridge_addr(if_ctx *ctx, const char *val __unused, int dummy __unused)
sbin/ifconfig/ifbridge.c
598
u_long val;
sbin/ifconfig/ifbridge.c
600
if (get_val(arg, &val) < 0 || (val & ~0xffffffff) != 0)
sbin/ifconfig/ifbridge.c
603
param.ifbrp_csize = val & 0xffffffff;
sbin/ifconfig/ifbridge.c
613
u_long val;
sbin/ifconfig/ifbridge.c
615
if (get_val(arg, &val) < 0 || (val & ~0xff) != 0)
sbin/ifconfig/ifbridge.c
618
param.ifbrp_hellotime = val & 0xff;
sbin/ifconfig/ifbridge.c
628
u_long val;
sbin/ifconfig/ifbridge.c
630
if (get_val(arg, &val) < 0 || (val & ~0xff) != 0)
sbin/ifconfig/ifbridge.c
633
param.ifbrp_fwddelay = val & 0xff;
sbin/ifconfig/ifbridge.c
643
u_long val;
sbin/ifconfig/ifbridge.c
645
if (get_val(arg, &val) < 0 || (val & ~0xff) != 0)
sbin/ifconfig/ifbridge.c
648
param.ifbrp_maxage = val & 0xff;
sbin/ifconfig/ifbridge.c
658
u_long val;
sbin/ifconfig/ifbridge.c
660
if (get_val(arg, &val) < 0 || (val & ~0xffff) != 0)
sbin/ifconfig/ifbridge.c
663
param.ifbrp_prio = val & 0xffff;
sbin/ifconfig/ifbridge.c
690
u_long val;
sbin/ifconfig/ifbridge.c
692
if (get_val(arg, &val) < 0 || (val & ~0xff) != 0)
sbin/ifconfig/ifbridge.c
695
param.ifbrp_txhc = val & 0xff;
sbin/ifconfig/ifbridge.c
705
u_long val;
sbin/ifconfig/ifbridge.c
709
if (get_val(pri, &val) < 0 || (val & ~0xff) != 0)
sbin/ifconfig/ifbridge.c
713
req.ifbr_priority = val & 0xff;
sbin/ifconfig/ifbridge.c
723
u_long val;
sbin/ifconfig/ifbridge.c
727
if (get_val(cost, &val) < 0)
sbin/ifconfig/ifbridge.c
731
req.ifbr_path_cost = val;
sbin/ifconfig/ifbridge.c
75
u_long val;
sbin/ifconfig/ifbridge.c
770
u_long val;
sbin/ifconfig/ifbridge.c
774
if (get_val(arg, &val) < 0 || (val & ~0xffffffff) != 0)
sbin/ifconfig/ifbridge.c
778
req.ifbr_addrmax = val & 0xffffffff;
sbin/ifconfig/ifbridge.c
78
val = strtoul(cp, &endptr, 0);
sbin/ifconfig/ifbridge.c
788
u_long val;
sbin/ifconfig/ifbridge.c
790
if (get_val(arg, &val) < 0 || (val & ~0xffffffff) != 0)
sbin/ifconfig/ifbridge.c
793
param.ifbrp_ctime = val & 0xffffffff;
sbin/ifconfig/ifbridge.c
800
setbridge_private(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
802
do_bridgeflag(ctx, val, IFBIF_PRIVATE, 1);
sbin/ifconfig/ifbridge.c
806
unsetbridge_private(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
808
do_bridgeflag(ctx, val, IFBIF_PRIVATE, 0);
sbin/ifconfig/ifbridge.c
82
*valp = val;
sbin/ifconfig/ifbridge.c
89
u_long val;
sbin/ifconfig/ifbridge.c
905
setbridge_flags(if_ctx *ctx, const char *val __unused, int newflags)
sbin/ifconfig/ifbridge.c
91
if (get_val(cp, &val) == -1)
sbin/ifconfig/ifbridge.c
919
unsetbridge_flags(if_ctx *ctx, const char *val __unused, int newflags)
sbin/ifconfig/ifbridge.c
93
if (val < DOT1Q_VID_MIN || val > DOT1Q_VID_MAX)
sbin/ifconfig/ifbridge.c
946
unsetbridge_defuntagged(if_ctx *ctx, const char *val __unused, int dummy __unused)
sbin/ifconfig/ifbridge.c
958
setbridge_qinq(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
96
*valp = (ether_vlanid_t)val;
sbin/ifconfig/ifbridge.c
960
do_bridgeflag(ctx, val, IFBIF_QINQ, 1);
sbin/ifconfig/ifbridge.c
964
unsetbridge_qinq(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifbridge.c
966
do_bridgeflag(ctx, val, IFBIF_QINQ, 0);
sbin/ifconfig/ifconfig.c
1523
setifmetric(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifconfig.c
1527
ifr.ifr_metric = atoi(val);
sbin/ifconfig/ifconfig.c
1533
setifmtu(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifconfig.c
1537
ifr.ifr_mtu = atoi(val);
sbin/ifconfig/ifconfig.c
1543
setifpcp(if_ctx *ctx, const char *val, int arg __unused)
sbin/ifconfig/ifconfig.c
1549
ul = strtoul(val, &endp, 0);
sbin/ifconfig/ifconfig.c
1560
disableifpcp(if_ctx *ctx, const char *val __unused, int arg __unused)
sbin/ifconfig/ifconfig.c
1570
setifname(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifconfig.c
1576
newname = strdup(val);
sbin/ifconfig/ifconfig.c
1589
setifdescr(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifconfig.c
1594
ifr.ifr_buffer.length = strlen(val) + 1;
sbin/ifconfig/ifconfig.c
1599
newdescr = strdup(val);
sbin/ifconfig/ifconfig.c
1614
unsetifdescr(if_ctx *ctx, const char *val __unused, int value __unused)
sbin/ifconfig/ifconfig.c
1684
bool first, val;
sbin/ifconfig/ifconfig.c
1707
val = nvlist_get_bool(nvcap, nvname);
sbin/ifconfig/ifconfig.c
1708
if (val) {
sbin/ifconfig/iffib.c
65
setiffib(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/iffib.c
71
fib = strtoul(val, &ep, 0);
sbin/ifconfig/iffib.c
73
errx(1, "fib %s not valid", val);
sbin/ifconfig/iffib.c
81
settunfib(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/iffib.c
87
fib = strtoul(val, &ep, 0);
sbin/ifconfig/iffib.c
89
errx(1, "fib %s not valid", val);
sbin/ifconfig/ifgif.c
72
setgifopts(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifgre.c
73
setifgrekey(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifgre.c
75
uint32_t grekey = strtol(val, NULL, 0);
sbin/ifconfig/ifgre.c
84
setifgreport(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifgre.c
86
uint32_t udpport = strtol(val, NULL, 0);
sbin/ifconfig/ifgre.c
94
setifgreopts(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1007
get_string(val, NULL, data, &len);
sbin/ifconfig/ifieee80211.c
1021
set80211rtsthreshold(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1024
isundefarg(val) ? IEEE80211_RTS_MAX : atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1028
set80211protmode(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1032
if (strcasecmp(val, "off") == 0) {
sbin/ifconfig/ifieee80211.c
1034
} else if (strcasecmp(val, "cts") == 0) {
sbin/ifconfig/ifieee80211.c
1036
} else if (strncasecmp(val, "rtscts", 3) == 0) {
sbin/ifconfig/ifieee80211.c
1046
set80211htprotmode(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1050
if (strcasecmp(val, "off") == 0) {
sbin/ifconfig/ifieee80211.c
1052
} else if (strncasecmp(val, "rts", 3) == 0) {
sbin/ifconfig/ifieee80211.c
1062
set80211txpower(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1064
double v = atof(val);
sbin/ifconfig/ifieee80211.c
1078
set80211roaming(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1082
if (strcasecmp(val, "device") == 0) {
sbin/ifconfig/ifieee80211.c
1084
} else if (strcasecmp(val, "auto") == 0) {
sbin/ifconfig/ifieee80211.c
1086
} else if (strcasecmp(val, "manual") == 0) {
sbin/ifconfig/ifieee80211.c
1095
set80211wme(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1101
set80211hidessid(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1107
set80211apbridge(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1113
set80211fastframes(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1119
set80211dturbo(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1125
set80211chanlist(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1130
temp = malloc(strlen(val) + 1);
sbin/ifconfig/ifieee80211.c
1133
strcpy(temp, val);
sbin/ifconfig/ifieee80211.c
1177
set80211bssid(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1179
if (!isanyarg(val)) {
sbin/ifconfig/ifieee80211.c
1183
temp = malloc(strlen(val) + 2); /* ':' and '\0' */
sbin/ifconfig/ifieee80211.c
1187
strcpy(temp + 1, val);
sbin/ifconfig/ifieee80211.c
1218
set80211cwmin(if_ctx *ctx, const char *ac, const char *val)
sbin/ifconfig/ifieee80211.c
1220
set80211(ctx, IEEE80211_IOC_WME_CWMIN, atoi(val), getac(ac), NULL);
sbin/ifconfig/ifieee80211.c
1224
set80211cwmax(if_ctx *ctx, const char *ac, const char *val)
sbin/ifconfig/ifieee80211.c
1226
set80211(ctx, IEEE80211_IOC_WME_CWMAX, atoi(val), getac(ac), NULL);
sbin/ifconfig/ifieee80211.c
1230
set80211aifs(if_ctx *ctx, const char *ac, const char *val)
sbin/ifconfig/ifieee80211.c
1232
set80211(ctx, IEEE80211_IOC_WME_AIFS, atoi(val), getac(ac), NULL);
sbin/ifconfig/ifieee80211.c
1236
set80211txoplimit(if_ctx *ctx, const char *ac, const char *val)
sbin/ifconfig/ifieee80211.c
1238
set80211(ctx, IEEE80211_IOC_WME_TXOPLIMIT, atoi(val), getac(ac), NULL);
sbin/ifconfig/ifieee80211.c
1265
set80211bsscwmin(if_ctx *ctx, const char *ac, const char *val)
sbin/ifconfig/ifieee80211.c
1267
set80211(ctx, IEEE80211_IOC_WME_CWMIN, atoi(val),
sbin/ifconfig/ifieee80211.c
1272
set80211bsscwmax(if_ctx *ctx, const char *ac, const char *val)
sbin/ifconfig/ifieee80211.c
1274
set80211(ctx, IEEE80211_IOC_WME_CWMAX, atoi(val),
sbin/ifconfig/ifieee80211.c
1279
set80211bssaifs(if_ctx *ctx, const char *ac, const char *val)
sbin/ifconfig/ifieee80211.c
1281
set80211(ctx, IEEE80211_IOC_WME_AIFS, atoi(val),
sbin/ifconfig/ifieee80211.c
1286
set80211bsstxoplimit(if_ctx *ctx, const char *ac, const char *val)
sbin/ifconfig/ifieee80211.c
1288
set80211(ctx, IEEE80211_IOC_WME_TXOPLIMIT, atoi(val),
sbin/ifconfig/ifieee80211.c
1293
set80211dtimperiod(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1295
set80211(ctx, IEEE80211_IOC_DTIM_PERIOD, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1299
set80211bintval(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1301
set80211(ctx, IEEE80211_IOC_BEACON_INTERVAL, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1305
set80211macmac(if_ctx *ctx, int op, const char *val)
sbin/ifconfig/ifieee80211.c
1310
temp = malloc(strlen(val) + 2); /* ':' and '\0' */
sbin/ifconfig/ifieee80211.c
1314
strcpy(temp + 1, val);
sbin/ifconfig/ifieee80211.c
1324
set80211addmac(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1326
set80211macmac(ctx, IEEE80211_IOC_ADDMAC, val);
sbin/ifconfig/ifieee80211.c
1330
set80211delmac(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1332
set80211macmac(ctx, IEEE80211_IOC_DELMAC, val);
sbin/ifconfig/ifieee80211.c
1336
set80211kickmac(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1342
temp = malloc(strlen(val) + 2); /* ':' and '\0' */
sbin/ifconfig/ifieee80211.c
1346
strcpy(temp + 1, val);
sbin/ifconfig/ifieee80211.c
1360
set80211maccmd(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1366
set80211meshrtmac(if_ctx *ctx, int req, const char *val)
sbin/ifconfig/ifieee80211.c
1371
temp = malloc(strlen(val) + 2); /* ':' and '\0' */
sbin/ifconfig/ifieee80211.c
1375
strcpy(temp + 1, val);
sbin/ifconfig/ifieee80211.c
1386
set80211addmeshrt(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1388
set80211meshrtmac(ctx, IEEE80211_MESH_RTCMD_ADD, val);
sbin/ifconfig/ifieee80211.c
1392
set80211delmeshrt(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1394
set80211meshrtmac(ctx, IEEE80211_MESH_RTCMD_DELETE, val);
sbin/ifconfig/ifieee80211.c
1398
set80211meshrtcmd(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1404
set80211hwmprootmode(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1408
if (strcasecmp(val, "normal") == 0)
sbin/ifconfig/ifieee80211.c
1410
else if (strcasecmp(val, "proactive") == 0)
sbin/ifconfig/ifieee80211.c
1412
else if (strcasecmp(val, "rann") == 0)
sbin/ifconfig/ifieee80211.c
1420
set80211hwmpmaxhops(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1422
set80211(ctx, IEEE80211_IOC_HWMP_MAXHOPS, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1426
set80211pureg(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1432
set80211quiet(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1438
set80211quietperiod(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1440
set80211(ctx, IEEE80211_IOC_QUIET_PERIOD, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1444
set80211quietcount(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1446
set80211(ctx, IEEE80211_IOC_QUIET_COUNT, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1450
set80211quietduration(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1452
set80211(ctx, IEEE80211_IOC_QUIET_DUR, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1456
set80211quietoffset(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1458
set80211(ctx, IEEE80211_IOC_QUIET_OFFSET, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1462
set80211bgscan(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1468
set80211bgscanidle(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1470
set80211(ctx, IEEE80211_IOC_BGSCAN_IDLE, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1474
set80211bgscanintvl(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1476
set80211(ctx, IEEE80211_IOC_BGSCAN_INTERVAL, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1480
set80211scanvalid(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1482
set80211(ctx, IEEE80211_IOC_SCANVALID, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1496
getmodeflags(const char *val)
sbin/ifconfig/ifieee80211.c
1503
cp = strchr(val, ':');
sbin/ifconfig/ifieee80211.c
1546
val, *cp);
sbin/ifconfig/ifieee80211.c
1622
set80211roamrssi(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1624
double v = atof(val);
sbin/ifconfig/ifieee80211.c
1630
flags = getmodeflags(val);
sbin/ifconfig/ifieee80211.c
1641
getrate(const char *val, const char *tag)
sbin/ifconfig/ifieee80211.c
1643
double v = atof(val);
sbin/ifconfig/ifieee80211.c
1653
set80211roamrate(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1657
rate = getrate(val, "roam");
sbin/ifconfig/ifieee80211.c
1658
flags = getmodeflags(val);
sbin/ifconfig/ifieee80211.c
1669
set80211mcastrate(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1673
rate = getrate(val, "mcast");
sbin/ifconfig/ifieee80211.c
1674
flags = getmodeflags(val);
sbin/ifconfig/ifieee80211.c
1685
set80211mgtrate(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1689
rate = getrate(val, "mgmt");
sbin/ifconfig/ifieee80211.c
1690
flags = getmodeflags(val);
sbin/ifconfig/ifieee80211.c
1701
set80211ucastrate(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1706
flags = getmodeflags(val);
sbin/ifconfig/ifieee80211.c
1707
if (isanyarg(val)) {
sbin/ifconfig/ifieee80211.c
1716
int rate = getrate(val, "ucast");
sbin/ifconfig/ifieee80211.c
1727
set80211maxretry(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1729
int v = atoi(val), flags;
sbin/ifconfig/ifieee80211.c
1731
flags = getmodeflags(val);
sbin/ifconfig/ifieee80211.c
1744
set80211fragthreshold(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1747
isundefarg(val) ? IEEE80211_FRAG_MAX : atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1751
set80211bmissthreshold(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1754
isundefarg(val) ? IEEE80211_HWBMISS_MAX : atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1758
set80211burst(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1764
set80211doth(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
177
static void set80211(if_ctx *ctx, int type, int val, int len, void *data);
sbin/ifconfig/ifieee80211.c
1770
set80211dfs(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1776
set80211shortgi(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1785
set80211ampdu(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
180
static int get80211val(if_ctx *ctx, int type, int *val);
sbin/ifconfig/ifieee80211.c
1800
set80211stbc(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
181
static const char *get_string(const char *val, const char *sep,
sbin/ifconfig/ifieee80211.c
1815
set80211ldpc(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1830
set80211uapsd(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1836
set80211ampdulimit(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1840
switch (atoi(val)) {
sbin/ifconfig/ifieee80211.c
1858
errx(-1, "invalid A-MPDU limit %s", val);
sbin/ifconfig/ifieee80211.c
1865
set80211ampdudensity(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1869
if (isanyarg(val) || strcasecmp(val, "na") == 0)
sbin/ifconfig/ifieee80211.c
1871
else switch ((int)(atof(val)*4)) {
sbin/ifconfig/ifieee80211.c
1897
errx(-1, "invalid A-MPDU density %s", val);
sbin/ifconfig/ifieee80211.c
1903
set80211amsdu(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1918
set80211amsdulimit(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1920
set80211(ctx, IEEE80211_IOC_AMSDU_LIMIT, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1924
set80211puren(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1930
set80211htcompat(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1936
set80211htconf(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1943
set80211dwds(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1949
set80211inact(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1955
set80211tsn(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1961
set80211dotd(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1967
set80211smps(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1973
set80211rifs(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1979
set80211vhtconf(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
1992
set80211tdmaslot(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
1994
set80211(ctx, IEEE80211_IOC_TDMA_SLOT, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
1998
set80211tdmaslotcnt(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
2000
set80211(ctx, IEEE80211_IOC_TDMA_SLOTCNT, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
2004
set80211tdmaslotlen(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
2006
set80211(ctx, IEEE80211_IOC_TDMA_SLOTLEN, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
2010
set80211tdmabintval(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
2012
set80211(ctx, IEEE80211_IOC_TDMA_BINTERVAL, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
2016
set80211meshttl(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
2018
set80211(ctx, IEEE80211_IOC_MESH_TTL, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
2022
set80211meshforward(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
2028
set80211meshgate(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
2034
set80211meshpeering(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
2040
set80211meshmetric(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
2044
memcpy(v, val, sizeof(v));
sbin/ifconfig/ifieee80211.c
2049
set80211meshpath(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
2053
memcpy(v, val, sizeof(v));
sbin/ifconfig/ifieee80211.c
2496
set80211regdomain(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
2501
rd = lib80211_regdomain_findbyname(rdp, val);
sbin/ifconfig/ifieee80211.c
2504
long sku = strtol(val, &eptr, 0);
sbin/ifconfig/ifieee80211.c
2506
if (eptr != val)
sbin/ifconfig/ifieee80211.c
2508
if (eptr == val || rd == NULL)
sbin/ifconfig/ifieee80211.c
2509
errx(1, "unknown regdomain %s", val);
sbin/ifconfig/ifieee80211.c
2524
set80211country(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
2529
cc = lib80211_country_findbyname(rdp, val);
sbin/ifconfig/ifieee80211.c
2532
long code = strtol(val, &eptr, 0);
sbin/ifconfig/ifieee80211.c
2534
if (eptr != val)
sbin/ifconfig/ifieee80211.c
2536
if (eptr == val || cc == NULL)
sbin/ifconfig/ifieee80211.c
2537
errx(1, "unknown ISO country code %s", val);
sbin/ifconfig/ifieee80211.c
2548
set80211location(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
2556
set80211ecm(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
398
int val;
sbin/ifconfig/ifieee80211.c
400
if (get80211val(ctx, IEEE80211_IOC_CHANNEL, &val) < 0)
sbin/ifconfig/ifieee80211.c
403
mapchan(&curchan, val, 0);
sbin/ifconfig/ifieee80211.c
4119
set80211scan(if_ctx *ctx, const char *val __unused, int dummy __unused)
sbin/ifconfig/ifieee80211.c
4573
get80211wme(if_ctx *ctx, int param, int ac, int *val)
sbin/ifconfig/ifieee80211.c
4586
*val = ireq.i_val;
sbin/ifconfig/ifieee80211.c
4593
int val;
sbin/ifconfig/ifieee80211.c
4598
if (get80211wme(ctx, IEEE80211_IOC_WME_CWMIN, ac, &val) != -1)
sbin/ifconfig/ifieee80211.c
4599
printf(" cwmin %2u", val);
sbin/ifconfig/ifieee80211.c
4600
if (get80211wme(ctx, IEEE80211_IOC_WME_CWMAX, ac, &val) != -1)
sbin/ifconfig/ifieee80211.c
4601
printf(" cwmax %2u", val);
sbin/ifconfig/ifieee80211.c
4602
if (get80211wme(ctx, IEEE80211_IOC_WME_AIFS, ac, &val) != -1)
sbin/ifconfig/ifieee80211.c
4603
printf(" aifs %2u", val);
sbin/ifconfig/ifieee80211.c
4604
if (get80211wme(ctx, IEEE80211_IOC_WME_TXOPLIMIT, ac, &val) != -1)
sbin/ifconfig/ifieee80211.c
4605
printf(" txopLimit %3u", val);
sbin/ifconfig/ifieee80211.c
4606
if (get80211wme(ctx, IEEE80211_IOC_WME_ACM, ac, &val) != -1) {
sbin/ifconfig/ifieee80211.c
4607
if (val)
sbin/ifconfig/ifieee80211.c
4614
if (get80211wme(ctx, IEEE80211_IOC_WME_ACKPOLICY, ac, &val) != -1) {
sbin/ifconfig/ifieee80211.c
4615
if (!val)
sbin/ifconfig/ifieee80211.c
5170
int i, num, wpa, wme, bgscan, bgscaninterval, val, len, wepmode;
sbin/ifconfig/ifieee80211.c
5236
if (get80211val(ctx, IEEE80211_IOC_AUTHMODE, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5237
switch (val) {
sbin/ifconfig/ifieee80211.c
5269
LINE_CHECK("authmode UNKNOWN (0x%x)", val);
sbin/ifconfig/ifieee80211.c
5275
if (get80211val(ctx, IEEE80211_IOC_WPS, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5276
if (val)
sbin/ifconfig/ifieee80211.c
5281
if (get80211val(ctx, IEEE80211_IOC_TSN, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5282
if (val)
sbin/ifconfig/ifieee80211.c
5287
if (ioctl(s, IEEE80211_IOC_COUNTERMEASURES, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5288
if (val)
sbin/ifconfig/ifieee80211.c
5349
if (get80211val(ctx, IEEE80211_IOC_WEPTXKEY, &val) < 0) {
sbin/ifconfig/ifieee80211.c
5353
if (val != -1)
sbin/ifconfig/ifieee80211.c
5354
LINE_CHECK("deftxkey %d", val+1);
sbin/ifconfig/ifieee80211.c
5399
if (get80211val(ctx, IEEE80211_IOC_POWERSAVE, &val) != -1 &&
sbin/ifconfig/ifieee80211.c
5400
val != IEEE80211_POWERSAVE_NOSUP ) {
sbin/ifconfig/ifieee80211.c
5401
if (val != IEEE80211_POWERSAVE_OFF || verbose) {
sbin/ifconfig/ifieee80211.c
5402
switch (val) {
sbin/ifconfig/ifieee80211.c
5416
if (get80211val(ctx, IEEE80211_IOC_POWERSAVESLEEP, &val) != -1)
sbin/ifconfig/ifieee80211.c
5417
LINE_CHECK("powersavesleep %d", val);
sbin/ifconfig/ifieee80211.c
5421
if (get80211val(ctx, IEEE80211_IOC_TXPOWER, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5422
if (val & 1)
sbin/ifconfig/ifieee80211.c
5423
LINE_CHECK("txpower %d.5", val/2);
sbin/ifconfig/ifieee80211.c
5425
LINE_CHECK("txpower %d", val/2);
sbin/ifconfig/ifieee80211.c
5428
if (get80211val(ctx, IEEE80211_IOC_TXPOWMAX, &val) != -1)
sbin/ifconfig/ifieee80211.c
5429
LINE_CHECK("txpowmax %.1f", val/2.);
sbin/ifconfig/ifieee80211.c
5432
if (get80211val(ctx, IEEE80211_IOC_DOTD, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5433
if (val)
sbin/ifconfig/ifieee80211.c
5439
if (get80211val(ctx, IEEE80211_IOC_RTSTHRESHOLD, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5440
if (val != IEEE80211_RTS_MAX || verbose)
sbin/ifconfig/ifieee80211.c
5441
LINE_CHECK("rtsthreshold %d", val);
sbin/ifconfig/ifieee80211.c
5444
if (get80211val(ctx, IEEE80211_IOC_FRAGTHRESHOLD, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5445
if (val != IEEE80211_FRAG_MAX || verbose)
sbin/ifconfig/ifieee80211.c
5446
LINE_CHECK("fragthreshold %d", val);
sbin/ifconfig/ifieee80211.c
5449
if (get80211val(ctx, IEEE80211_IOC_BMISSTHRESHOLD, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5450
if (val != IEEE80211_HWBMISS_MAX || verbose)
sbin/ifconfig/ifieee80211.c
5451
LINE_CHECK("bmiss %d", val);
sbin/ifconfig/ifieee80211.c
5474
if (get80211val(ctx, IEEE80211_IOC_SCANVALID, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5475
if (val != bgscaninterval || verbose)
sbin/ifconfig/ifieee80211.c
5476
LINE_CHECK("scanvalid %u", val);
sbin/ifconfig/ifieee80211.c
5489
if (get80211val(ctx, IEEE80211_IOC_BGSCAN_IDLE, &val) != -1)
sbin/ifconfig/ifieee80211.c
5490
LINE_CHECK("bgscanidle %u", val);
sbin/ifconfig/ifieee80211.c
5509
if (get80211val(ctx, IEEE80211_IOC_PUREG, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5510
if (val)
sbin/ifconfig/ifieee80211.c
5515
if (get80211val(ctx, IEEE80211_IOC_PROTMODE, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5516
switch (val) {
sbin/ifconfig/ifieee80211.c
5527
LINE_CHECK("protmode UNKNOWN (0x%x)", val);
sbin/ifconfig/ifieee80211.c
5548
if (get80211val(ctx, IEEE80211_IOC_HTCOMPAT, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5549
if (!val)
sbin/ifconfig/ifieee80211.c
5554
if (get80211val(ctx, IEEE80211_IOC_AMPDU, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5555
switch (val) {
sbin/ifconfig/ifieee80211.c
5572
if (get80211val(ctx, IEEE80211_IOC_AMPDU_LIMIT, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5573
switch (val) {
sbin/ifconfig/ifieee80211.c
5589
if (get80211val(ctx, IEEE80211_IOC_AMPDU_DENSITY, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5590
switch (val) {
sbin/ifconfig/ifieee80211.c
5618
if (get80211val(ctx, IEEE80211_IOC_AMSDU, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5619
switch (val) {
sbin/ifconfig/ifieee80211.c
5636
if (get80211val(ctx, IEEE80211_IOC_SHORTGI, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5637
if (val)
sbin/ifconfig/ifieee80211.c
5642
if (get80211val(ctx, IEEE80211_IOC_HTPROTMODE, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5643
if (val == IEEE80211_PROTMODE_OFF)
sbin/ifconfig/ifieee80211.c
5645
else if (val != IEEE80211_PROTMODE_RTSCTS)
sbin/ifconfig/ifieee80211.c
5646
LINE_CHECK("htprotmode UNKNOWN (0x%x)", val);
sbin/ifconfig/ifieee80211.c
5650
if (get80211val(ctx, IEEE80211_IOC_PUREN, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5651
if (val)
sbin/ifconfig/ifieee80211.c
5656
if (get80211val(ctx, IEEE80211_IOC_SMPS, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5657
if (val == IEEE80211_HTCAP_SMPS_DYNAMIC)
sbin/ifconfig/ifieee80211.c
5659
else if (val == IEEE80211_HTCAP_SMPS_ENA)
sbin/ifconfig/ifieee80211.c
5664
if (get80211val(ctx, IEEE80211_IOC_RIFS, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5665
if (val)
sbin/ifconfig/ifieee80211.c
5672
if (get80211val(ctx, IEEE80211_IOC_STBC, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5673
switch (val) {
sbin/ifconfig/ifieee80211.c
5689
if (get80211val(ctx, IEEE80211_IOC_LDPC, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5690
switch (val) {
sbin/ifconfig/ifieee80211.c
5706
if (get80211val(ctx, IEEE80211_IOC_UAPSD, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5707
switch (val) {
sbin/ifconfig/ifieee80211.c
5751
if (get80211val(ctx, IEEE80211_IOC_BURST, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5752
if (val)
sbin/ifconfig/ifieee80211.c
5758
if (get80211val(ctx, IEEE80211_IOC_FF, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5759
if (val)
sbin/ifconfig/ifieee80211.c
5764
if (get80211val(ctx, IEEE80211_IOC_TURBOP, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5765
if (val)
sbin/ifconfig/ifieee80211.c
5770
if (get80211val(ctx, IEEE80211_IOC_DWDS, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5771
if (val)
sbin/ifconfig/ifieee80211.c
5778
if (get80211val(ctx, IEEE80211_IOC_HIDESSID, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5779
if (val)
sbin/ifconfig/ifieee80211.c
5784
if (get80211val(ctx, IEEE80211_IOC_APBRIDGE, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5785
if (!val)
sbin/ifconfig/ifieee80211.c
5790
if (get80211val(ctx, IEEE80211_IOC_DTIM_PERIOD, &val) != -1)
sbin/ifconfig/ifieee80211.c
5791
LINE_CHECK("dtimperiod %u", val);
sbin/ifconfig/ifieee80211.c
5793
if (get80211val(ctx, IEEE80211_IOC_DOTH, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5794
if (!val)
sbin/ifconfig/ifieee80211.c
5799
if (get80211val(ctx, IEEE80211_IOC_DFS, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5800
if (!val)
sbin/ifconfig/ifieee80211.c
5805
if (get80211val(ctx, IEEE80211_IOC_INACTIVITY, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5806
if (!val)
sbin/ifconfig/ifieee80211.c
5812
if (get80211val(ctx, IEEE80211_IOC_ROAMING, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5813
if (val != IEEE80211_ROAMING_AUTO || verbose) {
sbin/ifconfig/ifieee80211.c
5814
switch (val) {
sbin/ifconfig/ifieee80211.c
5826
val);
sbin/ifconfig/ifieee80211.c
5834
if (get80211val(ctx, IEEE80211_IOC_TDMA_SLOT, &val) != -1)
sbin/ifconfig/ifieee80211.c
5835
LINE_CHECK("tdmaslot %u", val);
sbin/ifconfig/ifieee80211.c
5836
if (get80211val(ctx, IEEE80211_IOC_TDMA_SLOTCNT, &val) != -1)
sbin/ifconfig/ifieee80211.c
5837
LINE_CHECK("tdmaslotcnt %u", val);
sbin/ifconfig/ifieee80211.c
5838
if (get80211val(ctx, IEEE80211_IOC_TDMA_SLOTLEN, &val) != -1)
sbin/ifconfig/ifieee80211.c
5839
LINE_CHECK("tdmaslotlen %u", val);
sbin/ifconfig/ifieee80211.c
5840
if (get80211val(ctx, IEEE80211_IOC_TDMA_BINTERVAL, &val) != -1)
sbin/ifconfig/ifieee80211.c
5841
LINE_CHECK("tdmabintval %u", val);
sbin/ifconfig/ifieee80211.c
5842
} else if (get80211val(ctx, IEEE80211_IOC_BEACON_INTERVAL, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5844
if (val != 100 || verbose)
sbin/ifconfig/ifieee80211.c
5845
LINE_CHECK("bintval %u", val);
sbin/ifconfig/ifieee80211.c
5854
if (get80211val(ctx, IEEE80211_IOC_MESH_TTL, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5855
LINE_CHECK("meshttl %u", val);
sbin/ifconfig/ifieee80211.c
5857
if (get80211val(ctx, IEEE80211_IOC_MESH_AP, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5858
if (val)
sbin/ifconfig/ifieee80211.c
5863
if (get80211val(ctx, IEEE80211_IOC_MESH_FWRD, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5864
if (val)
sbin/ifconfig/ifieee80211.c
5869
if (get80211val(ctx, IEEE80211_IOC_MESH_GATE, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5870
if (val)
sbin/ifconfig/ifieee80211.c
5885
if (get80211val(ctx, IEEE80211_IOC_HWMP_ROOTMODE, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5886
switch (val) {
sbin/ifconfig/ifieee80211.c
5900
LINE_CHECK("hwmprootmode UNKNOWN(%d)", val);
sbin/ifconfig/ifieee80211.c
5904
if (get80211val(ctx, IEEE80211_IOC_HWMP_MAXHOPS, &val) != -1) {
sbin/ifconfig/ifieee80211.c
5905
LINE_CHECK("hwmpmaxhops %u", val);
sbin/ifconfig/ifieee80211.c
5933
get80211val(if_ctx *ctx, int type, int *val)
sbin/ifconfig/ifieee80211.c
5936
return (lib80211_get80211val(ctx->io_s, ctx->ifname, type, val));
sbin/ifconfig/ifieee80211.c
5940
set80211(if_ctx *ctx, int type, int val, int len, void *data)
sbin/ifconfig/ifieee80211.c
5944
ret = lib80211_set80211(ctx->io_s, ctx->ifname, type, val, len, data);
sbin/ifconfig/ifieee80211.c
5950
get_string(const char *val, const char *sep, u_int8_t *buf, int *lenp)
sbin/ifconfig/ifieee80211.c
5958
hexstr = (val[0] == '0' && tolower((u_char)val[1]) == 'x');
sbin/ifconfig/ifieee80211.c
5960
val += 2;
sbin/ifconfig/ifieee80211.c
5962
if (*val == '\0')
sbin/ifconfig/ifieee80211.c
5964
if (sep != NULL && strchr(sep, *val) != NULL) {
sbin/ifconfig/ifieee80211.c
5965
val++;
sbin/ifconfig/ifieee80211.c
5969
if (!isxdigit((u_char)val[0])) {
sbin/ifconfig/ifieee80211.c
5973
if (!isxdigit((u_char)val[1])) {
sbin/ifconfig/ifieee80211.c
5987
*p++ = (tohex((u_char)val[0]) << 4) |
sbin/ifconfig/ifieee80211.c
5988
tohex((u_char)val[1]);
sbin/ifconfig/ifieee80211.c
5990
val += 2;
sbin/ifconfig/ifieee80211.c
5992
*p++ = *val++;
sbin/ifconfig/ifieee80211.c
6002
return val;
sbin/ifconfig/ifieee80211.c
608
set80211ssid(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
615
len = strlen(val);
sbin/ifconfig/ifieee80211.c
6154
set80211clone_beacons(if_ctx *ctx __unused, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
616
if (len > 2 && isdigit((int)val[0]) && val[1] == ':') {
sbin/ifconfig/ifieee80211.c
6164
set80211clone_bssid(if_ctx *ctx __unused, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
617
ssid = atoi(val)-1;
sbin/ifconfig/ifieee80211.c
6173
set80211clone_wdslegacy(if_ctx *ctx __unused, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
618
val += 2;
sbin/ifconfig/ifieee80211.c
623
if (get_string(val, NULL, data, &len) == NULL)
sbin/ifconfig/ifieee80211.c
630
set80211meshid(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
637
if (get_string(val, NULL, data, &len) == NULL)
sbin/ifconfig/ifieee80211.c
644
set80211stationname(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
651
get_string(val, NULL, data, &len);
sbin/ifconfig/ifieee80211.c
669
getchannelflags(const char *val, int freq)
sbin/ifconfig/ifieee80211.c
678
cp = strchr(val, ':');
sbin/ifconfig/ifieee80211.c
715
val, *cp);
sbin/ifconfig/ifieee80211.c
719
cp = strchr(val, '/');
sbin/ifconfig/ifieee80211.c
751
errx(-1, "%s: Invalid channel width\n", val);
sbin/ifconfig/ifieee80211.c
812
getchannel(if_ctx *ctx, struct ieee80211_channel *chan, const char *val)
sbin/ifconfig/ifieee80211.c
818
if (isanyarg(val)) {
sbin/ifconfig/ifieee80211.c
824
v = strtol(val, &eptr, 10);
sbin/ifconfig/ifieee80211.c
825
if (val[0] == '\0' || val == eptr || errno == ERANGE ||
sbin/ifconfig/ifieee80211.c
830
flags = getchannelflags(val, v);
sbin/ifconfig/ifieee80211.c
839
set80211channel(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
843
getchannel(ctx, &chan, val);
sbin/ifconfig/ifieee80211.c
848
set80211chanswitch(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
852
getchannel(ctx, &csr.csa_chan, val);
sbin/ifconfig/ifieee80211.c
859
set80211authmode(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
863
if (strcasecmp(val, "none") == 0) {
sbin/ifconfig/ifieee80211.c
865
} else if (strcasecmp(val, "open") == 0) {
sbin/ifconfig/ifieee80211.c
867
} else if (strcasecmp(val, "shared") == 0) {
sbin/ifconfig/ifieee80211.c
869
} else if (strcasecmp(val, "8021x") == 0) {
sbin/ifconfig/ifieee80211.c
871
} else if (strcasecmp(val, "wpa") == 0) {
sbin/ifconfig/ifieee80211.c
881
set80211powersavemode(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
885
if (strcasecmp(val, "off") == 0) {
sbin/ifconfig/ifieee80211.c
887
} else if (strcasecmp(val, "on") == 0) {
sbin/ifconfig/ifieee80211.c
889
} else if (strcasecmp(val, "cam") == 0) {
sbin/ifconfig/ifieee80211.c
891
} else if (strcasecmp(val, "psp") == 0) {
sbin/ifconfig/ifieee80211.c
893
} else if (strcasecmp(val, "psp-cam") == 0) {
sbin/ifconfig/ifieee80211.c
903
set80211powersave(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
914
set80211powersavesleep(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
916
set80211(ctx, IEEE80211_IOC_POWERSAVESLEEP, atoi(val), 0, NULL);
sbin/ifconfig/ifieee80211.c
920
set80211wepmode(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
924
if (strcasecmp(val, "off") == 0) {
sbin/ifconfig/ifieee80211.c
926
} else if (strcasecmp(val, "on") == 0) {
sbin/ifconfig/ifieee80211.c
928
} else if (strcasecmp(val, "mixed") == 0) {
sbin/ifconfig/ifieee80211.c
938
set80211wep(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifieee80211.c
950
set80211weptxkey(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
952
if (isundefarg(val))
sbin/ifconfig/ifieee80211.c
955
set80211(ctx, IEEE80211_IOC_WEPTXKEY, atoi(val)-1, 0, NULL);
sbin/ifconfig/ifieee80211.c
959
set80211wepkey(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
965
if (isdigit((int)val[0]) && val[1] == ':') {
sbin/ifconfig/ifieee80211.c
966
key = atoi(val)-1;
sbin/ifconfig/ifieee80211.c
967
val += 2;
sbin/ifconfig/ifieee80211.c
972
get_string(val, NULL, data, &len);
sbin/ifconfig/ifieee80211.c
983
set80211nwkey(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifieee80211.c
991
if (isdigit((int)val[0]) && val[1] == ':') {
sbin/ifconfig/ifieee80211.c
992
txkey = val[0]-'0'-1;
sbin/ifconfig/ifieee80211.c
993
val += 2;
sbin/ifconfig/ifieee80211.c
998
val = get_string(val, ",", data, &len);
sbin/ifconfig/ifieee80211.c
999
if (val == NULL)
sbin/ifconfig/ifipsec.c
64
setreqid(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifipsec.c
70
v = strtoul(val, &ep, 0);
sbin/ifconfig/ifipsec.c
72
warn("Invalid reqid value %s", val);
sbin/ifconfig/iflagg.c
101
errx(1, "Invalid flowid_shift option: %s", val);
sbin/ifconfig/iflagg.c
108
setlaggrr_limit(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/iflagg.c
114
ro.ro_bkt = (uint32_t)strtoul(val, NULL, 10);
sbin/ifconfig/iflagg.c
116
errx(1, "Invalid round-robin stride: %s", val);
sbin/ifconfig/iflagg.c
123
setlaggsetopt(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/iflagg.c
152
setlagghash(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/iflagg.c
159
str = tmp = strdup(val);
sbin/ifconfig/iflagg.c
37
setlaggport(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/iflagg.c
42
strlcpy(rp.rp_portname, val, sizeof(rp.rp_portname));
sbin/ifconfig/iflagg.c
52
ctx->ifname, val, strerror(errno));
sbin/ifconfig/iflagg.c
58
unsetlaggport(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/iflagg.c
63
strlcpy(rp.rp_portname, val, sizeof(rp.rp_portname));
sbin/ifconfig/iflagg.c
70
setlaggproto(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/iflagg.c
79
if (strcmp(val, lpr[i].lpr_name) == 0) {
sbin/ifconfig/iflagg.c
85
errx(1, "Invalid aggregation protocol: %s", val);
sbin/ifconfig/iflagg.c
93
setlaggflowidshift(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/iflagg.c
99
ro.ro_flowid_shift = (int)strtol(val, NULL, 10);
sbin/ifconfig/ifmac.c
81
setifmaclabel(if_ctx *ctx, const char *val, int d __unused)
sbin/ifconfig/ifmac.c
87
if (mac_from_text(&label, val) == -1) {
sbin/ifconfig/ifmac.c
88
perror(val);
sbin/ifconfig/ifmedia.c
193
setmedia(if_ctx *ctx, const char *val, int d __unused)
sbin/ifconfig/ifmedia.c
209
subtype = get_media_subtype(ifmr->ifm_ulist[0], val);
sbin/ifconfig/ifmedia.c
218
setmediaopt(if_ctx *ctx, const char *val, int d __unused)
sbin/ifconfig/ifmedia.c
221
domediaopt(ctx, val, false);
sbin/ifconfig/ifmedia.c
225
unsetmediaopt(if_ctx *ctx, const char *val, int d __unused)
sbin/ifconfig/ifmedia.c
228
domediaopt(ctx, val, true);
sbin/ifconfig/ifmedia.c
232
domediaopt(if_ctx *ctx, const char *val, bool clear)
sbin/ifconfig/ifmedia.c
239
options = get_media_options(ifmr->ifm_ulist[0], val);
sbin/ifconfig/ifmedia.c
254
setmediainst(if_ctx *ctx, const char *val, int d __unused)
sbin/ifconfig/ifmedia.c
261
inst = atoi(val);
sbin/ifconfig/ifmedia.c
263
errx(1, "invalid media instance: %s", val);
sbin/ifconfig/ifmedia.c
271
setmediamode(if_ctx *ctx, const char *val, int d __unused)
sbin/ifconfig/ifmedia.c
278
mode = get_media_mode(ifmr->ifm_ulist[0], val);
sbin/ifconfig/ifmedia.c
286
get_media_subtype(ifmedia_t media, const char *val)
sbin/ifconfig/ifmedia.c
290
subtype = ifconfig_media_lookup_subtype(media, val);
sbin/ifconfig/ifmedia.c
297
errx(EXIT_FAILURE, "unknown media subtype: %s", val);
sbin/ifconfig/ifmedia.c
305
get_media_mode(ifmedia_t media, const char *val)
sbin/ifconfig/ifmedia.c
309
mode = ifconfig_media_lookup_mode(media, val);
sbin/ifconfig/ifmedia.c
324
get_media_options(ifmedia_t media, const char *val)
sbin/ifconfig/ifmedia.c
335
opts = strdup(val);
sbin/ifconfig/ifmedia.c
379
const char *val, **options;
sbin/ifconfig/ifmedia.c
381
val = ifconfig_media_get_type(media);
sbin/ifconfig/ifmedia.c
382
if (val == NULL) {
sbin/ifconfig/ifmedia.c
386
printf("%s", val);
sbin/ifconfig/ifmedia.c
389
val = ifconfig_media_get_subtype(media);
sbin/ifconfig/ifmedia.c
390
if (val == NULL) {
sbin/ifconfig/ifmedia.c
398
printf("%s", val);
sbin/ifconfig/ifmedia.c
401
val = ifconfig_media_get_mode(media);
sbin/ifconfig/ifmedia.c
402
if (val != NULL && strcasecmp("autoselect", val) != 0)
sbin/ifconfig/ifmedia.c
403
printf(" mode %s", val);
sbin/ifconfig/ifmedia.c
422
const char *val, **options;
sbin/ifconfig/ifmedia.c
424
val = ifconfig_media_get_type(media);
sbin/ifconfig/ifmedia.c
425
if (val == NULL) {
sbin/ifconfig/ifmedia.c
435
val = ifconfig_media_get_subtype(media);
sbin/ifconfig/ifmedia.c
436
if (val == NULL) {
sbin/ifconfig/ifmedia.c
441
printf("media %s", val);
sbin/ifconfig/ifmedia.c
443
val = ifconfig_media_get_mode(media);
sbin/ifconfig/ifmedia.c
444
if (val != NULL)
sbin/ifconfig/ifmedia.c
445
printf(" mode %s", val);
sbin/ifconfig/ifpfsync.c
171
setpfsync_syncdev(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifpfsync.c
175
if (strlen(val) > IFNAMSIZ)
sbin/ifconfig/ifpfsync.c
176
errx(1, "interface name %s is too long", val);
sbin/ifconfig/ifpfsync.c
184
nvlist_add_string(nvl, "syncdev", val);
sbin/ifconfig/ifpfsync.c
191
unsetpfsync_syncdev(if_ctx *ctx, const char *val __unused, int dummy __unused)
sbin/ifconfig/ifpfsync.c
208
setpfsync_syncpeer(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifpfsync.c
219
if ((ecode = getaddrinfo(val, NULL, NULL, &peerres)) != 0)
sbin/ifconfig/ifpfsync.c
241
errx(1, "syncpeer address %s not supported", val);
sbin/ifconfig/ifpfsync.c
258
unsetpfsync_syncpeer(if_ctx *ctx, const char *val __unused, int dummy __unused)
sbin/ifconfig/ifpfsync.c
281
setpfsync_maxupd(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifpfsync.c
286
maxupdates = atoi(val);
sbin/ifconfig/ifpfsync.c
288
errx(1, "maxupd %s: out of range", val);
sbin/ifconfig/ifpfsync.c
303
setpfsync_defer(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifpfsync.c
320
setpfsync_version(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifpfsync.c
326
version = atoi(val);
sbin/ifconfig/ifstf.c
102
setstf_set(if_ctx *ctx, const char *val, int d __unused)
sbin/ifconfig/ifstf.c
114
p = strrchr(val, '/');
sbin/ifconfig/ifstf.c
122
errx(1, "%s: bad value (prefix length %s)", val, errstr);
sbin/ifconfig/ifstf.c
125
if (!inet_aton(val, &sin.sin_addr))
sbin/ifconfig/ifstf.c
126
errx(1, "%s: bad value", val);
sbin/ifconfig/ifstf.c
130
err(1, "STF6RD_SV4NET %s", val);
sbin/ifconfig/ifstf.c
83
setstf_br(if_ctx *ctx, const char *val, int d __unused)
sbin/ifconfig/ifstf.c
93
if (!inet_aton(val, &sin.sin_addr))
sbin/ifconfig/ifstf.c
94
errx(1, "%s: bad value", val);
sbin/ifconfig/ifstf.c
98
err(1, "STF6RD_SBR%s", val);
sbin/ifconfig/ifvlan.c
188
setvlantag(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifvlan.c
195
ul = strtoul(val, &endp, 0);
sbin/ifconfig/ifvlan.c
219
setvlandev(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifvlan.c
224
strlcpy(params.vlr_parent, val, sizeof(params.vlr_parent));
sbin/ifconfig/ifvlan.c
231
setvlanproto(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifvlan.c
236
if (strncasecmp(proto_8021Q, val,
sbin/ifconfig/ifvlan.c
239
} else if ((strncasecmp(proto_8021ad, val, strlen(proto_8021ad)) == 0)
sbin/ifconfig/ifvlan.c
240
|| (strncasecmp(proto_qinq, val, strlen(proto_qinq)) == 0)) {
sbin/ifconfig/ifvlan.c
261
setvlanpcp(if_ctx *ctx, const char *val, int dummy __unused)
sbin/ifconfig/ifvlan.c
267
ul = strtoul(val, &endp, 0);
sbin/ifconfig/ifvlan.c
278
unsetvlandev(if_ctx *ctx, const char *val __unused, int dummy __unused)
sbin/ifconfig/ifvxlan.c
190
u_long val;
sbin/ifconfig/ifvxlan.c
192
if (get_val(arg, &val) < 0 || val >= VXLAN_VNI_MAX)
sbin/ifconfig/ifvxlan.c
197
params.vxlp_vni = val;
sbin/ifconfig/ifvxlan.c
202
cmd.vxlcmd_vni = val;
sbin/ifconfig/ifvxlan.c
404
u_long val;
sbin/ifconfig/ifvxlan.c
406
if (get_val(arg, &val) < 0 || val >= UINT16_MAX)
sbin/ifconfig/ifvxlan.c
411
params.vxlp_local_port = val;
sbin/ifconfig/ifvxlan.c
416
cmd.vxlcmd_port = val;
sbin/ifconfig/ifvxlan.c
426
u_long val;
sbin/ifconfig/ifvxlan.c
428
if (get_val(arg, &val) < 0 || val >= UINT16_MAX)
sbin/ifconfig/ifvxlan.c
433
params.vxlp_remote_port = val;
sbin/ifconfig/ifvxlan.c
438
cmd.vxlcmd_port = val;
sbin/ifconfig/ifvxlan.c
476
u_long val;
sbin/ifconfig/ifvxlan.c
478
if (get_val(arg, &val) < 0 || (val & ~0xFFFFFFFF) != 0)
sbin/ifconfig/ifvxlan.c
483
params.vxlp_ftable_timeout = val & 0xFFFFFFFF;
sbin/ifconfig/ifvxlan.c
488
cmd.vxlcmd_ftable_timeout = val & 0xFFFFFFFF;
sbin/ifconfig/ifvxlan.c
498
u_long val;
sbin/ifconfig/ifvxlan.c
500
if (get_val(arg, &val) < 0 || (val & ~0xFFFFFFFF) != 0)
sbin/ifconfig/ifvxlan.c
505
params.vxlp_ftable_max = val & 0xFFFFFFFF;
sbin/ifconfig/ifvxlan.c
510
cmd.vxlcmd_ftable_max = val & 0xFFFFFFFF;
sbin/ifconfig/ifvxlan.c
539
u_long val;
sbin/ifconfig/ifvxlan.c
541
if (get_val(arg, &val) < 0 || val > 256)
sbin/ifconfig/ifvxlan.c
546
params.vxlp_ttl = val;
sbin/ifconfig/ifvxlan.c
551
cmd.vxlcmd_ttl = val;
sbin/ifconfig/ifvxlan.c
577
setvxlan_flush(if_ctx *ctx, const char *val __unused, int d)
sbin/ifconfig/ifvxlan.c
61
u_long val;
sbin/ifconfig/ifvxlan.c
64
val = strtoul(cp, &endptr, 0);
sbin/ifconfig/ifvxlan.c
68
*valp = val;
sbin/ipf/iplang/iplang_y.y
1072
int val, len, val2, pad, optval;
sbin/ipf/iplang/iplang_y.y
1075
val = atoi(*arg);
sbin/ipf/iplang/iplang_y.y
1077
val = 0;
sbin/ipf/iplang/iplang_y.y
1124
*s++ = (u_char)val;
sbin/ipf/iplang/iplang_y.y
1126
*s++ = (u_char)((val >> 8) & 0xff);
sbin/ipf/iplang/iplang_y.y
1127
*s++ = (u_char)(val & 0xff);
sbin/ipf/iplang/iplang_y.y
1129
val2 = htonl(val);
sbin/ipf/iplang/iplang_y.y
721
int len = 0, todo = 0, quote = 0, val = 0;
sbin/ipf/iplang/iplang_y.y
731
val <<= 3;
sbin/ipf/iplang/iplang_y.y
732
val |= (c - '0');
sbin/ipf/iplang/iplang_y.y
735
*t++ = (u_char)(val & 0xff);
sbin/ipf/iplang/iplang_y.y
748
val = (c - '0');
sbin/ipf/iplang/iplang_y.y
779
*t++ = (u_char)(val & 0xff);
sbin/ipf/ipsend/dlcommon.c
1045
int val;
sbin/ipf/ipsend/dlcommon.c
1049
if (sscanf(p, "%x", &val) != 1)
sbin/ipf/ipsend/dlcommon.c
1051
if (val > 0xff)
sbin/ipf/ipsend/dlcommon.c
1053
*addr++ = val;
sbin/ipf/ipsend/ipsopt.c
118
val = atoi(class);
sbin/ipf/ipsend/ipsopt.c
119
bcopy((char *)&val, op, 2);
sbin/ipf/ipsend/ipsopt.c
130
op += val;
sbin/ipf/ipsend/ipsopt.c
75
u_short val;
sbin/ipf/ipsend/ipsopt.c
90
val = (class && *class) ? atoi(class) : 4;
sbin/ipf/ipsend/ipsopt.c
91
*op++ = val + io->on_siz;
sbin/ipf/ipsend/ipsopt.c
92
len += val;
sbin/ipf/libipf/addipopt.c
18
u_short val;
sbin/ipf/libipf/addipopt.c
51
val = atoi(class);
sbin/ipf/libipf/addipopt.c
52
bcopy((char *)&val, op, 2);
sbin/ipf/libipf/inet_addr.c
107
val = 0; base = 10;
sbin/ipf/libipf/inet_addr.c
117
val = (val * base) + (c - '0');
sbin/ipf/libipf/inet_addr.c
120
val = (val << 4) |
sbin/ipf/libipf/inet_addr.c
135
*pp++ = val;
sbin/ipf/libipf/inet_addr.c
159
if (val > 0xffffff)
sbin/ipf/libipf/inet_addr.c
161
val |= parts[0] << 24;
sbin/ipf/libipf/inet_addr.c
165
if (val > 0xffff)
sbin/ipf/libipf/inet_addr.c
167
val |= (parts[0] << 24) | (parts[1] << 16);
sbin/ipf/libipf/inet_addr.c
171
if (val > 0xff)
sbin/ipf/libipf/inet_addr.c
173
val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
sbin/ipf/libipf/inet_addr.c
177
addr->s_addr = htonl(val);
sbin/ipf/libipf/inet_addr.c
190
struct in_addr val;
sbin/ipf/libipf/inet_addr.c
192
if (inet_aton(cp, &val))
sbin/ipf/libipf/inet_addr.c
193
return (val.s_addr);
sbin/ipf/libipf/inet_addr.c
92
register u_long val;
sbin/ipfw/ipfw2.c
1238
int val;
sbin/ipfw/ipfw2.c
1241
val = strtoul(str, &s, 0);
sbin/ipfw/ipfw2.c
1242
if (s == str || *s != '\0' || val >= 0x100)
sbin/ipfw/ipfw2.c
1243
val = match_token(icmpcodes, str);
sbin/ipfw/ipfw2.c
1244
if (val < 0)
sbin/ipfw/ipfw2.c
1246
return (val);
sbin/ipfw/ipfw2.c
5361
int val;
sbin/ipfw/ipfw2.c
5378
if ((val = match_token(limit_masks, *av)) <= 0)
sbin/ipfw/ipfw2.c
5380
c->limit_mask |= val;
sbin/ipfw/ipfw2.c
852
int val;
sbin/ipfw/ipfw2.c
864
val = match_token(flags, p);
sbin/ipfw/ipfw2.c
865
if (val <= 0) {
sbin/ipfw/ipfw2.c
870
*which |= (uint32_t)val;
sbin/ipfw/ipv6.c
59
int val;
sbin/ipfw/ipv6.c
62
val = strtoul(str, &s, 0);
sbin/ipfw/ipv6.c
63
if (s == str || *s != '\0' || val >= 0x100)
sbin/ipfw/ipv6.c
64
val = match_token(icmp6codes, str);
sbin/ipfw/ipv6.c
65
if (val < 0)
sbin/ipfw/ipv6.c
67
return (val);
sbin/ipfw/nat64lsn.c
359
uint32_t val;
sbin/ipfw/nat64lsn.c
361
val = (uint32_t)strtol(arg, &p, 10);
sbin/ipfw/nat64lsn.c
364
return (val);
sbin/ipfw/tables.c
1514
set_legacy_value(uint32_t val, ipfw_table_value *v)
sbin/ipfw/tables.c
1516
v->tag = val;
sbin/ipfw/tables.c
1517
v->pipe = val;
sbin/ipfw/tables.c
1518
v->divert = val;
sbin/ipfw/tables.c
1519
v->skipto = val;
sbin/ipfw/tables.c
1520
v->netgraph = val;
sbin/ipfw/tables.c
1521
v->fib = val;
sbin/ipfw/tables.c
1522
v->nat = val;
sbin/ipfw/tables.c
1523
v->nh4 = val;
sbin/ipfw/tables.c
1524
v->dscp = (uint8_t)val;
sbin/ipfw/tables.c
1525
v->limit = val;
sbin/ipfw/tables.c
1536
uint32_t a4, flag, val;
sbin/ipfw/tables.c
1546
val = strtoul(arg, &p, 0);
sbin/ipfw/tables.c
1548
set_legacy_value(val, v);
sbin/ipfw/tables.c
1551
if (inet_pton(AF_INET, arg, &val) == 1) {
sbin/ipfw/tables.c
1552
set_legacy_value(ntohl(val), v);
sbin/ipfw/tables.c
409
int error, missing, orflush, tcmd, val;
sbin/ipfw/tables.c
431
val = match_token(tabletypes, *av);
sbin/ipfw/tables.c
432
if (val == -1) {
sbin/ipfw/tables.c
439
xi.type = val;
sbin/ipfw/tables.c
441
error = table_parse_type(val, p, &xi.tflags);
sbin/ipfw/tables.c
451
val = fill_flags(tablevaltypes, *av, &e, &fset, &fclear);
sbin/ipfw/tables.c
452
if (val != -1) {
sbin/mknod/mknod.c
60
u_long val;
sbin/mknod/mknod.c
68
val = strtoul(name, &ep, 10);
sbin/mknod/mknod.c
73
return (val);
sbin/mount/mount.c
689
if (sfp->f_fsid.val[0] != 0 || sfp->f_fsid.val[1] != 0) {
sbin/mount/mount.c
732
char *p, *s, *val;
sbin/mount/mount.c
767
val = strchr(p, '=');
sbin/mount/mount.c
768
if (val != NULL) {
sbin/mount/mount.c
769
++val;
sbin/mount/mount.c
770
if (*val != '\0')
sbin/mount/mount.c
771
mountprog = strdup(val);
sbin/mount/mount_fs.c
72
char *p, *val;
sbin/mount/mount_fs.c
87
val = NULL;
sbin/mount/mount_fs.c
90
val = p + 1;
sbin/mount/mount_fs.c
92
build_iovec(&iov, &iovlen, optarg, val, (size_t)-1);
sbin/mount_cd9660/mount_cd9660.c
114
val = NULL;
sbin/mount_cd9660/mount_cd9660.c
117
val = p + 1;
sbin/mount_cd9660/mount_cd9660.c
119
build_iovec(&iov, &iovlen, optarg, val, (size_t)-1);
sbin/mount_cd9660/mount_cd9660.c
78
char *dev, *dir, *p, *val, mntpath[MAXPATHLEN];
sbin/mount_msdosfs/mount_msdosfs.c
126
char *val = strdup("");
sbin/mount_msdosfs/mount_msdosfs.c
129
free(val);
sbin/mount_msdosfs/mount_msdosfs.c
131
val = p + 1;
sbin/mount_msdosfs/mount_msdosfs.c
133
build_iovec(&iov, &iovlen, optarg, val, (size_t)-1);
sbin/mount_nfs/mount_nfs.c
222
const char *val = "";
sbin/mount_nfs/mount_nfs.c
232
val = pval + 1;
sbin/mount_nfs/mount_nfs.c
245
gssname = val;
sbin/mount_nfs/mount_nfs.c
274
asprintf(&tmp, "%d", atoi(val));
sbin/mount_nfs/mount_nfs.c
282
if (strcmp(val, "tcp") == 0) {
sbin/mount_nfs/mount_nfs.c
287
} else if (strcmp(val, "udp") == 0) {
sbin/mount_nfs/mount_nfs.c
293
} else if (strcmp(val, "tcp6") == 0) {
sbin/mount_nfs/mount_nfs.c
298
} else if (strcmp(val, "udp6") == 0) {
sbin/mount_nfs/mount_nfs.c
307
val);
sbin/mount_nfs/mount_nfs.c
318
secflavor = sec_name_to_num(val);
sbin/mount_nfs/mount_nfs.c
322
val);
sbin/mount_nfs/mount_nfs.c
326
num = strtol(val, &p, 10);
sbin/mount_nfs/mount_nfs.c
328
errx(1, "illegal retrycnt value -- %s", val);
sbin/mount_nfs/mount_nfs.c
331
num = strtol(val, &p, 10);
sbin/mount_nfs/mount_nfs.c
333
errx(1, "illegal maxgroups value -- %s", val);
sbin/mount_nfs/mount_nfs.c
336
num = strtol(val, &p, 10);
sbin/mount_nfs/mount_nfs.c
339
"%s", val);
sbin/mount_nfs/mount_nfs.c
357
"value -- %s", val);
sbin/mount_nfs/mount_nfs.c
365
num = strtol(val, &p, 10);
sbin/mount_nfs/mount_nfs.c
368
"%s", val);
sbin/mount_nfs/mount_nfs.c
374
__DECONST(void *, val),
sbin/mount_nfs/mount_nfs.c
375
strlen(val) + 1);
sbin/mount_nullfs/mount_nullfs.c
62
char *p, *val;
sbin/mount_nullfs/mount_nullfs.c
77
val = strdup("");
sbin/mount_nullfs/mount_nullfs.c
80
free(val);
sbin/mount_nullfs/mount_nullfs.c
82
val = p + 1;
sbin/mount_nullfs/mount_nullfs.c
84
build_iovec(&iov, &iovlen, optarg, val, (size_t)-1);
sbin/mount_unionfs/mount_unionfs.c
122
char *p, *val;
sbin/mount_unionfs/mount_unionfs.c
136
val = NULL;
sbin/mount_unionfs/mount_unionfs.c
139
val = p + 1;
sbin/mount_unionfs/mount_unionfs.c
141
parse_gid(val, gid_str, sizeof(gid_str));
sbin/mount_unionfs/mount_unionfs.c
142
val = gid_str;
sbin/mount_unionfs/mount_unionfs.c
145
parse_uid(val, uid_str, sizeof(uid_str));
sbin/mount_unionfs/mount_unionfs.c
146
val = uid_str;
sbin/mount_unionfs/mount_unionfs.c
149
build_iovec(&iov, &iovlen, optarg, val, (size_t)-1);
sbin/newfs/mkfs.c
1204
ilog2(int val)
sbin/newfs/mkfs.c
1209
if (1 << n == val)
sbin/newfs/mkfs.c
1211
errx(1, "ilog2: %d is not a power of 2\n", val);
sbin/newfs_msdos/mkfs_msdos.c
1049
ckgeom(const char *fname, u_int val, const char *msg)
sbin/newfs_msdos/mkfs_msdos.c
1051
if (!val) {
sbin/newfs_msdos/mkfs_msdos.c
1055
if (val > MAXU16) {
sbin/newfs_msdos/mkfs_msdos.c
1056
warnx("%s: illegal %s %d", fname, msg, val);
sbin/nvmecontrol/comnd.c
167
for (i = 0; lopts[i].val != ch && lopts[i].name != NULL; i++)
sbin/nvmecontrol/comnd.c
198
lopts[i].val = opts[i].short_arg;
sbin/nvmecontrol/comnd.c
208
lopts[n].val = '?';
sbin/nvmecontrol/modules/wdc/wdc.c
708
uint64_t val;
sbin/nvmecontrol/modules/wdc/wdc.c
711
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
713
printf(" %-30s: %ju\n", "Host Read Commands", val);
sbin/nvmecontrol/modules/wdc/wdc.c
714
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
716
printf(" %-30s: %ju\n", "Host Read Blocks", val);
sbin/nvmecontrol/modules/wdc/wdc.c
717
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
719
printf(" %-30s: %ju\n", "Host Cache Read Hits Commands", val);
sbin/nvmecontrol/modules/wdc/wdc.c
720
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
722
printf(" %-30s: %ju\n", "Host Cache Read Hits Blocks", val);
sbin/nvmecontrol/modules/wdc/wdc.c
723
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
725
printf(" %-30s: %ju\n", "Host Read Commands Stalled", val);
sbin/nvmecontrol/modules/wdc/wdc.c
726
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
728
printf(" %-30s: %ju\n", "Host Write Commands", val);
sbin/nvmecontrol/modules/wdc/wdc.c
729
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
731
printf(" %-30s: %ju\n", "Host Write Blocks", val);
sbin/nvmecontrol/modules/wdc/wdc.c
732
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
734
printf(" %-30s: %ju\n", "Host Write Odd Start Commands", val);
sbin/nvmecontrol/modules/wdc/wdc.c
735
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
737
printf(" %-30s: %ju\n", "Host Write Odd End Commands", val);
sbin/nvmecontrol/modules/wdc/wdc.c
738
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
740
printf(" %-30s: %ju\n", "Host Write Commands Stalled", val);
sbin/nvmecontrol/modules/wdc/wdc.c
741
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
743
printf(" %-30s: %ju\n", "NAND Read Commands", val);
sbin/nvmecontrol/modules/wdc/wdc.c
744
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
746
printf(" %-30s: %ju\n", "NAND Read Blocks", val);
sbin/nvmecontrol/modules/wdc/wdc.c
747
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
749
printf(" %-30s: %ju\n", "NAND Write Commands", val);
sbin/nvmecontrol/modules/wdc/wdc.c
750
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
752
printf(" %-30s: %ju\n", "NAND Write Blocks", val);
sbin/nvmecontrol/modules/wdc/wdc.c
753
val = le64dec(walker);
sbin/nvmecontrol/modules/wdc/wdc.c
755
printf(" %-30s: %ju\n", "NAND Read Before Writes", val);
sbin/pfctl/parse.y
120
char *val;
sbin/pfctl/parse.y
4710
int val;
sbin/pfctl/parse.y
4713
if (map_tos($1, &val))
sbin/pfctl/parse.y
4714
$$ = val;
sbin/pfctl/parse.y
7396
char *p, *val;
sbin/pfctl/parse.y
7426
val = symget(buf);
sbin/pfctl/parse.y
7427
if (val == NULL) {
sbin/pfctl/parse.y
7431
p = val + strlen(val) - 1;
sbin/pfctl/parse.y
7433
while (p >= val) {
sbin/pfctl/parse.y
7694
free(sym->val);
sbin/pfctl/parse.y
7703
symset(const char *nam, const char *val, int persist)
sbin/pfctl/parse.y
7717
free(sym->val);
sbin/pfctl/parse.y
7730
sym->val = strdup(val);
sbin/pfctl/parse.y
7731
if (sym->val == NULL) {
sbin/pfctl/parse.y
7745
char *sym, *val;
sbin/pfctl/parse.y
7748
if ((val = strrchr(s, '=')) == NULL)
sbin/pfctl/parse.y
7751
sym = strndup(s, val - s);
sbin/pfctl/parse.y
7755
ret = symset(sym, val + 1, 1);
sbin/pfctl/parse.y
7769
return (sym->val);
sbin/pfctl/parse.y
8090
map_tos(char *s, int *val)
sbin/pfctl/parse.y
8129
*val = p->k_val;
sbin/pfctl/parse.y
917
double val;
sbin/pfctl/parse.y
920
val = strtod($2, &cp);
sbin/pfctl/parse.y
923
if (val <= 0 || val > 100) {
sbin/pfctl/parse.y
928
syncookie_opts.hi = val;
sbin/pfctl/parse.y
930
syncookie_opts.lo = val;
sbin/pfctl/pfctl.c
1317
uint32_t val, inc;
sbin/pfctl/pfctl.c
1320
val = ntohl(addr->addr32[i]);
sbin/pfctl/pfctl.c
1321
inc = val + 1;
sbin/pfctl/pfctl.c
1323
if (inc > val)
sbin/pfctl/pfctl.c
3179
pfctl_load_syncookies(struct pfctl *pf, u_int8_t val)
sbin/pfctl/pfctl.c
3185
cookies.mode = val;
sbin/pfctl/pfctl.c
3197
pfctl_cfg_syncookies(struct pfctl *pf, uint8_t val, struct pfctl_watermarks *w)
sbin/pfctl/pfctl.c
3199
if (val != PF_SYNCOOKIES_ADAPTIVE && w != NULL) {
sbin/pfctl/pfctl.c
3203
if (val == PF_SYNCOOKIES_ADAPTIVE && w != NULL) {
sbin/pfctl/pfctl.c
3218
if (val == PF_SYNCOOKIES_NEVER)
sbin/pfctl/pfctl.c
3220
else if (val == PF_SYNCOOKIES_ALWAYS)
sbin/pfctl/pfctl.c
3222
else if (val == PF_SYNCOOKIES_ADAPTIVE) {
sbin/pfctl/pfctl.c
3235
pf->syncookies = val;
sbin/pfctl/pfctl_osfp.c
774
long val = 0;
sbin/pfctl/pfctl_osfp.c
838
val = val * 10 + field[i] - '0';
sbin/pfctl/pfctl_osfp.c
839
if (val < 0) {
sbin/pfctl/pfctl_osfp.c
846
if (val > max) {
sbin/pfctl/pfctl_osfp.c
848
name, val, max);
sbin/pfctl/pfctl_osfp.c
851
*var = (int)val;
sbin/pflowctl/pflowctl.c
439
pflowctl_addr(const char *val, struct sockaddr_storage *ss)
sbin/pflowctl/pflowctl.c
452
if (strlcpy(buf, val, sizeof(buf)) >= sizeof(buf))
sbin/pflowctl/pflowctl.c
453
errx(1, "%s bad value", val);
sbin/rcorder/hash.h
105
#define Hash_SetValue(h, val) ((h)->clientData = (ClientData) (val))
sbin/restore/dirs.c
63
#define INOHASH(val) (val % HASHSIZE)
sbin/routed/parms.c
461
char *val,
sbin/routed/parms.c
472
assert(val != NULL);
sbin/routed/parms.c
486
val0 = val;
sbin/routed/parms.c
487
if (0 > parse_quote(&val, "| ,\n\r", &delim,
sbin/routed/parms.c
495
val0 = ++val;
sbin/routed/parms.c
497
if (0 > parse_quote(&val, "| ,\n\r", &delim, buf,sizeof(buf))
sbin/routed/parms.c
513
val0 = ++val;
sbin/routed/parms.c
514
if (NULL != (p = parse_ts(&k.start,&val,val0,&delim,
sbin/routed/parms.c
519
val0 = ++val;
sbin/routed/parms.c
520
if (NULL != (p = parse_ts(&k.end,&val,val0,&delim,
sbin/routed/parms.c
563
char delim, *val0 = NULL, *tgt, *val, *p;
sbin/routed/parms.c
571
&& *(val = &line[sizeof("subnet=")-1]) != '\0') {
sbin/routed/parms.c
572
if (0 > parse_quote(&val, ",", &delim, buf, sizeof(buf)))
sbin/routed/parms.c
578
intnetp->intnet_metric = (int)strtol(val+1,&p,0);
sbin/routed/parms.c
603
&& *(val = &line[sizeof("ripv1_mask=")-1]) != '\0') {
sbin/routed/parms.c
604
if (0 > parse_quote(&val, ",", &delim, buf, sizeof(buf))
sbin/routed/parms.c
607
if ((i = (int)strtol(val+1, &p, 0)) <= 0
sbin/setkey/parse.y
101
vchar_t val;
sbin/setkey/parse.y
132
%type <val> PL_REQUESTS portstr key_string
sbin/setkey/parse.y
133
%type <val> policy_requests
sbin/setkey/parse.y
134
%type <val> QUOTEDSTRING HEXSTRING STRING
sbin/setkey/parse.y
135
%type <val> F_AIFLAGS
sbin/setkey/parse.y
136
%type <val> upper_misc_spec policy_spec
sbin/swapon/swapon.c
796
sizetobuf(char *buf, size_t bufsize, int hflag, long long val, int hlen,
sbin/swapon/swapon.c
802
humanize_number(tmp, 5, (int64_t)val, "", HN_AUTOSCALE,
sbin/swapon/swapon.c
806
snprintf(buf, bufsize, "%*lld", hlen, val / blocksize);
sbin/sysctl/sysctl.c
1066
u_char *val, *oval, *p;
sbin/sysctl/sysctl.c
1179
val = oval = malloc(j + 1);
sbin/sysctl/sysctl.c
1180
if (val == NULL) {
sbin/sysctl/sysctl.c
1185
i = sysctl(oid, nlen, val, &len, 0, 0);
sbin/sysctl/sysctl.c
1192
fwrite(val, 1, len, stdout);
sbin/sysctl/sysctl.c
1196
val[len] = '\0';
sbin/sysctl/sysctl.c
1197
p = val;
sbin/sysctl/sysctl.c
1314
while (len-- && (xflag || p < val + 16))
sbin/umount/umount.c
410
snprintf(fsidbuf, sizeof(fsidbuf), "FSID:%d:%d", sfs->f_fsid.val[0],
sbin/umount/umount.c
411
sfs->f_fsid.val[1]);
sbin/umount/umount.c
414
if (errno != ENOENT || sfs->f_fsid.val[0] != 0 ||
sbin/umount/umount.c
415
sfs->f_fsid.val[1] != 0)
sbin/umount/umount.c
422
if (sfs->f_fsid.val[0] != 0 || sfs->f_fsid.val[1] != 0)
share/examples/ppi/ppilcd.c
306
u_int8_t val;
share/examples/ppi/ppilcd.c
310
hd_gdata(val); /* read data */
share/examples/ppi/ppilcd.c
313
debug(3, "0x%02x -> %s", val, (type == HD_COMMAND) ? "cmd " : "data");
share/examples/ppi/ppilcd.c
314
return(val);
share/examples/ppi/ppilcd.c
364
u_int8_t val;
share/examples/ppi/ppilcd.c
370
val = 0x30;
share/examples/ppi/ppilcd.c
372
val |= 0x08;
share/examples/ppi/ppilcd.c
374
val |= 0x04;
share/examples/ppi/ppilcd.c
375
hd44780_output(HD_COMMAND, val);
share/examples/ppi/ppilcd.c
377
hd44780_output(HD_COMMAND, val);
share/examples/ppi/ppilcd.c
379
hd44780_output(HD_COMMAND, val);
share/examples/ppi/ppilcd.c
381
val = 0x08; /* display off */
share/examples/ppi/ppilcd.c
382
hd44780_output(HD_COMMAND, val);
share/examples/ppi/ppilcd.c
384
val |= 0x04; /* display on */
share/examples/ppi/ppilcd.c
386
val |= 0x02;
share/examples/ppi/ppilcd.c
388
val |= 0x01;
share/examples/ppi/ppilcd.c
389
hd44780_output(HD_COMMAND, val);
share/examples/ppi/ppilcd.c
411
val = hd44780_input(HD_COMMAND) & 0x3f; /* mask character position, save line pos */
share/examples/ppi/ppilcd.c
412
hd44780_output(HD_COMMAND, 0x80 | val);
share/examples/ses/srcs/setencstat.c
48
long val;
share/examples/ses/srcs/setencstat.c
61
val = strtol(v[2], NULL, 0);
share/examples/ses/srcs/setencstat.c
62
stat = (encioc_enc_status_t)val;
stand/common/dev_net.c
380
char *ptr, *portp, *val;
stand/common/dev_net.c
408
portp = val = strchr(ptr, ':');
stand/common/dev_net.c
409
if (val != NULL) {
stand/common/dev_net.c
410
val++;
stand/common/dev_net.c
411
rootport = strtol(val, NULL, 10);
stand/common/dev_net.c
413
val = strchr(ptr, '/');
stand/common/dev_net.c
414
if (val != NULL) {
stand/common/dev_net.c
416
portp = val;
stand/common/dev_net.c
423
bcopy(val, rootpath, strlen(val) + 1);
stand/common/install.c
105
char *p, *tag, *val;
stand/common/install.c
127
val = strchr(tag, '=');
stand/common/install.c
128
if (val == NULL) {
stand/common/install.c
132
*val++ = '\0';
stand/common/install.c
133
p = strchr(val, '\n');
stand/common/install.c
141
setenv(&tag[4], val, 1);
stand/common/install.c
143
error = setpath(&inst_kernel, val);
stand/common/install.c
145
error = setmultipath(&inst_modules, val);
stand/common/install.c
147
error = setpath(&inst_rootfs, val);
stand/common/install.c
149
error = setpath(&inst_loader_rc, val);
stand/common/install.c
52
setpath(char **what, char *val)
stand/common/install.c
58
len = strlen(val) + 1;
stand/common/install.c
59
rel = (val[0] != '/') ? 1 : 0;
stand/common/install.c
64
strcpy(path + rel, val);
stand/common/install.c
71
setmultipath(char ***what, char *val)
stand/common/install.c
77
v = val;
stand/common/install.c
89
s = strchr(val, ',');
stand/common/install.c
92
error = setpath(*what + idx, val);
stand/common/install.c
95
val = s;
stand/common/interp_backslash.c
103
char val;
stand/common/interp_backslash.c
110
val = (DIGIT(*str) << 6) + (DIGIT(*(str + 1)) << 3) +
stand/common/interp_backslash.c
115
new_str[i++] = val;
stand/common/interp_backslash.c
127
val = DIGIT(*(str + 2));
stand/common/interp_backslash.c
129
val = (val << 4) + DIGIT(*(str + 3));
stand/common/interp_backslash.c
135
new_str[i++] = val;
stand/common/interp_parse.c
164
if ((val = variable_lookup(p)) != NULL) {
stand/common/interp_parse.c
165
size_t len = strlen(val);
stand/common/interp_parse.c
167
strncpy(buf + i, val, PARSE_BUFSIZE - (i + 1));
stand/common/interp_parse.c
88
char *val, *p, *q, *copy = NULL;
stand/common/load_elf.c
1277
Elf_Addr p, void *val, size_t len)
stand/common/load_elf.c
1295
ef->off, p, val, len);
stand/common/load_elf.c
1303
ef->off, p, val, len);
stand/common/load_elf.c
84
Elf_Addr p, void *val, size_t len);
stand/common/load_elf_obj.c
501
void *val, size_t len)
stand/common/load_elf_obj.c
533
&a, ELF_RELOC_RELA, base, off, val, len);
stand/common/load_elf_obj.c
546
&r, ELF_RELOC_REL, base, off, val, len);
stand/common/load_elf_obj.c
73
Elf_Addr p, void *val, size_t len);
stand/common/module.c
1251
getstr(void **ptr, char *val)
stand/common/module.c
1257
memcpy(val, c + 1, len);
stand/common/module.c
1258
val[len] = 0;
stand/common/module.c
1264
pnpval_as_int(const char *val, const char *pnpinfo)
stand/common/module.c
1273
cp = strchr(val, ';');
stand/common/module.c
1276
strlcpy(key + 1, val, sizeof(key) - 1);
stand/common/module.c
1278
memcpy(key + 1, val, cp - val);
stand/common/module.c
1279
key[cp - val + 1] = '\0';
stand/common/module.c
1308
pnpval_as_str(const char *val, const char *pnpinfo)
stand/common/module.c
1319
cp = strchr(val, ';');
stand/common/module.c
1322
strlcpy(key + 1, val, sizeof(key) - 1);
stand/common/module.c
1324
memcpy(key + 1, val, cp - val);
stand/common/module.c
1325
key[cp - val + 1] = '\0';
stand/common/reloc_elf.c
110
val = addr;
stand/common/reloc_elf.c
111
memcpy(where, &val, sizeof(val));
stand/common/reloc_elf.c
121
val = addr + addend;
stand/common/reloc_elf.c
122
*where = val;
stand/common/reloc_elf.c
132
Elf_Addr addend, addr, *where, val;
stand/common/reloc_elf.c
180
val = addr + addend;
stand/common/reloc_elf.c
181
*where = val;
stand/common/reloc_elf.c
53
Elf64_Addr *where, val;
stand/efi/libefi/efi_console.c
435
color_name_to_teken(const char *name, int *val)
stand/efi/libefi/efi_console.c
446
*val = TC_BLACK | light;
stand/efi/libefi/efi_console.c
450
*val = TC_RED | light;
stand/efi/libefi/efi_console.c
454
*val = TC_GREEN | light;
stand/efi/libefi/efi_console.c
458
*val = TC_YELLOW | light;
stand/efi/libefi/efi_console.c
462
*val = TC_BLUE | light;
stand/efi/libefi/efi_console.c
466
*val = TC_MAGENTA | light;
stand/efi/libefi/efi_console.c
470
*val = TC_CYAN | light;
stand/efi/libefi/efi_console.c
474
*val = TC_WHITE | light;
stand/efi/libefi/efi_console.c
483
int val = 0;
stand/efi/libefi/efi_console.c
492
if (color_name_to_teken(value, &val)) {
stand/efi/libefi/efi_console.c
493
snprintf(buf, sizeof (buf), "%d", val);
stand/efi/libefi/efi_console.c
506
val = (int)lval;
stand/efi/libefi/efi_console.c
514
if (ap->ta_fgcolor == val)
stand/efi/libefi/efi_console.c
516
a.ta_fgcolor = val;
stand/efi/libefi/efi_console.c
520
if (ap->ta_bgcolor == val)
stand/efi/libefi/efi_console.c
522
a.ta_bgcolor = val;
stand/efi/libefi/eficom.c
267
unsigned val;
stand/efi/libefi/eficom.c
296
if (comc_parse_intval(env, &val) == CMD_OK) {
stand/efi/libefi/eficom.c
297
comc_port->ioaddr = val;
stand/efi/libefi/eficom.c
351
if (comc_parse_intval(env, &val) == CMD_OK)
stand/efi/libefi/eficom.c
352
comc_port->newbaudrate = val;
stand/efi/libefi/env.c
1027
char *uuid, *var, *val;
stand/efi/libefi/env.c
1040
val = argv[3];
stand/efi/libefi/env.c
1049
strlen(val) + 1, val);
stand/efi/libefi/env.c
1056
printf("would set %s %s = %s\n", uuid, var, val);
stand/efi/loader/main.c
764
setenv_int(const char *key, int val)
stand/efi/loader/main.c
768
snprintf(buf, sizeof(buf), "%d", val);
stand/efi/loader/main.c
901
char *val = NULL;
stand/efi/loader/main.c
957
asprintf(&val, "db:%d,dt:%s,io:%#x,pa:%s,br:%d,xo=%d",
stand/efi/loader/main.c
960
asprintf(&val, "db:%d,dt:%s,pv:%#x,pd:%#x,pa:%s,br:%d,xo=%d",
stand/efi/loader/main.c
963
asprintf(&val, "db:%d,dt:%s,mm:%#jx,rs:%d,rw:%d,pa:%s,br:%d,xo=%d",
stand/efi/loader/main.c
966
env_setenv("hw.uart.console", EV_VOLATILE, val, NULL, NULL);
stand/efi/loader/main.c
967
free(val);
stand/i386/libi386/biospci.c
363
biospci_write_config(uint32_t locator, int offset, int width, uint32_t val)
stand/i386/libi386/biospci.c
370
v86.ecx = val;
stand/i386/libi386/biospci.c
381
biospci_read_config(uint32_t locator, int offset, int width, uint32_t *val)
stand/i386/libi386/biospci.c
394
*val = v86.ecx;
stand/i386/libi386/libi386.h
135
int biospci_read_config(uint32_t locator, int offset, int width, uint32_t *val);
stand/i386/libi386/libi386.h
137
int biospci_write_config(uint32_t locator, int offset, int width, uint32_t val);
stand/i386/libi386/vbe.c
185
vga_set_indexed(int reg, int indexreg, int datareg, uint8_t index, uint8_t val)
stand/i386/libi386/vbe.c
188
outb(reg + datareg, val);
stand/i386/libi386/vidconsole.c
1004
val = vga_get_atr(VGA_REG_BASE, VGA_AC_MODE_CONTROL);
stand/i386/libi386/vidconsole.c
1005
val &= ~VGA_AC_MC_BI;
stand/i386/libi386/vidconsole.c
1006
val &= ~VGA_AC_MC_ELG;
stand/i386/libi386/vidconsole.c
1007
vga_set_atr(VGA_REG_BASE, VGA_AC_MODE_CONTROL, val);
stand/i386/libi386/vidconsole.c
1010
val = vbe_default_mode();
stand/i386/libi386/vidconsole.c
1012
if (VBE_VALID_MODE(val)) {
stand/i386/libi386/vidconsole.c
1013
if (vbe_set_mode(val) != 0)
stand/i386/libi386/vidconsole.c
521
color_name_to_teken(const char *name, int *val)
stand/i386/libi386/vidconsole.c
532
*val = TC_BLACK | light;
stand/i386/libi386/vidconsole.c
536
*val = TC_RED | light;
stand/i386/libi386/vidconsole.c
540
*val = TC_GREEN | light;
stand/i386/libi386/vidconsole.c
544
*val = TC_YELLOW | light;
stand/i386/libi386/vidconsole.c
548
*val = TC_BLUE | light;
stand/i386/libi386/vidconsole.c
552
*val = TC_MAGENTA | light;
stand/i386/libi386/vidconsole.c
556
*val = TC_CYAN | light;
stand/i386/libi386/vidconsole.c
560
*val = TC_WHITE | light;
stand/i386/libi386/vidconsole.c
569
int val = 0;
stand/i386/libi386/vidconsole.c
578
if (color_name_to_teken(value, &val)) {
stand/i386/libi386/vidconsole.c
579
snprintf(buf, sizeof (buf), "%d", val);
stand/i386/libi386/vidconsole.c
592
val = (int)lval;
stand/i386/libi386/vidconsole.c
600
if (ap->ta_fgcolor == val)
stand/i386/libi386/vidconsole.c
602
a.ta_fgcolor = val;
stand/i386/libi386/vidconsole.c
606
if (ap->ta_bgcolor == val)
stand/i386/libi386/vidconsole.c
608
a.ta_bgcolor = val;
stand/i386/libi386/vidconsole.c
984
int val;
stand/kboot/include/util.h
14
bool file2u32(const char *fn, uint32_t *val);
stand/kboot/include/util.h
15
bool file2u64(const char *fn, uint64_t *val);
stand/kboot/libkboot/dfk.c
148
char *val, *name, *x, t;
stand/kboot/libkboot/dfk.c
156
val = line;
stand/kboot/libkboot/dfk.c
157
x = strchr(val, ' ');
stand/kboot/libkboot/dfk.c
175
v = strtoul(val, &eop, 16);
stand/kboot/libkboot/util.c
36
file2u64(const char *fn, uint64_t *val)
stand/kboot/libkboot/util.c
44
*val = v;
stand/kboot/libkboot/util.c
49
file2u32(const char *fn, uint32_t *val)
stand/kboot/libkboot/util.c
57
*val = v;
stand/liblua/lutils.c
217
const char *key, *val;
stand/liblua/lutils.c
220
val = luaL_checkstring(L, 2);
stand/liblua/lutils.c
221
lua_pushinteger(L, setenv(key, val, 1));
stand/libsa/bootp.c
323
const char *val;
stand/libsa/bootp.c
350
if ((val = getenv("dhcp.root-path")) == NULL)
stand/libsa/bootp.c
351
val = (const char *)cp;
stand/libsa/bootp.c
352
strlcpy(rootpath, val, sizeof(rootpath));
stand/libsa/bootp.c
355
if ((val = getenv("dhcp.host-name")) == NULL)
stand/libsa/bootp.c
356
val = (const char *)cp;
stand/libsa/bootp.c
357
strlcpy(hostname, val, sizeof(hostname));
stand/libsa/bootp.c
361
if ((val = getenv("dhcp.interface-mtu")) != NULL) {
stand/libsa/bootp.c
370
tmp = strtoul(val, &end, 0);
stand/libsa/bootp.c
372
*val == '\0' || *end != '\0' ||
stand/libsa/bootp.c
376
"dhcp.interface-mtu", val);
stand/libsa/net.c
151
u_long val;
stand/libsa/net.c
163
val = 0;
stand/libsa/net.c
166
val = (val * 10) + (c - '0');
stand/libsa/net.c
179
if (pp >= parts + 3 || val > 0xff)
stand/libsa/net.c
181
*pp++ = val, cp++;
stand/libsa/net.c
202
if (val > 0xffffff)
stand/libsa/net.c
204
val |= parts[0] << 24;
stand/libsa/net.c
208
if (val > 0xffff)
stand/libsa/net.c
210
val |= (parts[0] << 24) | (parts[1] << 16);
stand/libsa/net.c
214
if (val > 0xff)
stand/libsa/net.c
216
val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
stand/libsa/net.c
220
return (htonl(val));
stand/libsa/netif.c
106
int val;
stand/libsa/netif.c
135
val = netif_match(&cur_if, machdep_hint);
stand/libsa/netif.c
138
printf(" [%d -> %d]", s, val);
stand/libsa/netif.c
140
if (val > best_val) {
stand/libsa/netif.c
141
best_val = val;
stand/libsa/nfs.c
64
uint32_t val[2];
stand/libsa/nfs.c
721
uint32_t size = ntohl(d->fa.fa_size.val[1]);
stand/libsa/nfs.c
759
sb->st_size = ntohl(fp->fa.fa_size.val[1]);
stand/libsa/smbios.c
240
const char* val;
stand/libsa/smbios.c
242
val = smbios_getstring(addr, offset);
stand/libsa/smbios.c
243
if (val != NULL)
stand/libsa/smbios.c
244
setenv(name, val, 1);
stand/libsa/tftp.c
839
char *val = buf;
stand/libsa/tftp.c
849
if (&buf[i] > val) {
stand/libsa/tftp.c
850
tftp_options[option_idx] = val;
stand/libsa/tftp.c
851
val = &buf[i] + 1;
stand/libsa/uuid_to_string.c
40
tohex(char **buf, int len, uint32_t val)
stand/libsa/uuid_to_string.c
47
walker[i] = hexstr[val & 0xf];
stand/libsa/uuid_to_string.c
48
val >>= 4;
stand/libsa/zfs/nvlist.c
1486
nvlist_add_nvlist(nvlist_t *nvl, const char *name, nvlist_t *val)
stand/libsa/zfs/nvlist.c
1488
return (nvlist_add_common(nvl, name, DATA_TYPE_NVLIST, 1, val));
stand/libsa/zfs/zfs.c
1057
int64_t val;
stand/libsa/zfs/zfs.c
1060
val = strtoll(data, &end, 0);
stand/libsa/zfs/zfs.c
1064
*ip = val;
stand/libsa/zfs/zfs.c
1072
uint64_t val;
stand/libsa/zfs/zfs.c
1075
val = strtoull(data, &end, 0);
stand/libsa/zfs/zfs.c
1079
*ip = val;
stand/libsa/zfs/zfs.c
1096
int64_t val;
stand/libsa/zfs/zfs.c
1140
rv = get_int64(data, &val);
stand/libsa/zfs/zfs.c
1142
int8_t v = val;
stand/libsa/zfs/zfs.c
1148
rv = get_int64(data, &val);
stand/libsa/zfs/zfs.c
1150
int16_t v = val;
stand/libsa/zfs/zfs.c
1156
rv = get_int64(data, &val);
stand/libsa/zfs/zfs.c
1158
int32_t v = val;
stand/libsa/zfs/zfs.c
1164
rv = get_int64(data, &val);
stand/libsa/zfs/zfs.c
1166
rv = zfs_nvstore_setter(vdev, dt, name, &val,
stand/libsa/zfs/zfs.c
1167
sizeof (val));
stand/libsa/zfs/zfs.c
1220
rv = get_int64(data, &val);
stand/libsa/zfs/zfs.c
1222
boolean_t v = val;
stand/libsa/zfs/zfsimpl.c
2061
uint64_t val;
stand/libsa/zfs/zfsimpl.c
2086
NULL, &val, NULL) != 0) {
stand/libsa/zfs/zfsimpl.c
2091
if (!SPA_VERSION_IS_SUPPORTED(val)) {
stand/libsa/zfs/zfsimpl.c
2093
(unsigned)val, (unsigned)SPA_VERSION);
stand/libsa/zfs/zfsimpl.c
2106
NULL, &val, NULL) != 0) {
stand/libsa/zfs/zfsimpl.c
2111
if (val == POOL_STATE_DESTROYED) {
stand/powerpc/boot1.chrp/boot1.c
77
static char *__uitoa(char *buf, u_int val, int base);
stand/powerpc/boot1.chrp/boot1.c
78
static char *__ultoa(char *buf, u_long val, int base);
stand/powerpc/ofw/cas.c
115
uint32_t val;
stand/powerpc/ofw/cas.c
201
uint8_t buf[16], idx, val;
stand/powerpc/ofw/cas.c
222
val = buf[i + 1];
stand/powerpc/ofw/cas.c
223
DPRINTF("idx 0x%02x val 0x%02x\n", idx, val);
stand/powerpc/ofw/cas.c
231
if ((val & OV5_MMU_RADIX) || (val & OV5_MMU_EITHER))
stand/powerpc/ofw/cas.c
236
if (val & OV5_RADIX_GTSE)
stand/uboot/main.c
622
const char *val;
stand/uboot/main.c
662
val = ub_env_get(var);
stand/uboot/main.c
664
if (val == NULL)
stand/uboot/main.c
667
printf("uboot.%s=%s\n", var, val);
stand/uboot/main.c
669
if (val != NULL) {
stand/uboot/main.c
670
setenv(ldvar, val, 1);
stand/usb/tools/sysinit.c
66
read32(uint32_t val)
stand/usb/tools/sysinit.c
74
while (val) {
stand/usb/tools/sysinit.c
75
temp |= (val & 0xF) << ((endian & 0xF) * 4);
stand/usb/tools/sysinit.c
77
val >>= 4;
stand/userboot/userboot.h
220
int (*vm_set_register)(void *arg, int vcpu, int reg, uint64_t val);
sys/amd64/acpica/acpi_wakeup.c
82
#define WAKECODE_FIXUP(offset, type, val) do { \
sys/amd64/acpica/acpi_wakeup.c
85
*addr = val; \
sys/amd64/amd64/copyout.c
61
int fueword_nosmap(volatile const void *base, long *val);
sys/amd64/amd64/copyout.c
62
int fueword_smap(volatile const void *base, long *val);
sys/amd64/amd64/copyout.c
76
int fueword32_nosmap(volatile const void *base, int32_t *val);
sys/amd64/amd64/copyout.c
77
int fueword32_smap(volatile const void *base, int32_t *val);
sys/amd64/amd64/efirt_machdep.c
382
int error, val;
sys/amd64/amd64/efirt_machdep.c
384
val = 0;
sys/amd64/amd64/efirt_machdep.c
385
error = sysctl_handle_int(oidp, &val, 0, req);
sys/amd64/amd64/elf_machdep.c
279
Elf64_Addr *where, val;
sys/amd64/amd64/elf_machdep.c
330
val = addr + addend;
sys/amd64/amd64/elf_machdep.c
333
if (*where != val)
sys/amd64/amd64/elf_machdep.c
334
*where = val;
sys/amd64/amd64/elf_machdep.c
379
val = addr;
sys/amd64/amd64/elf_machdep.c
380
if (*where != val)
sys/amd64/amd64/elf_machdep.c
381
*where = val;
sys/amd64/amd64/elf_machdep.c
386
val = ((Elf64_Addr (*)(void))addr)();
sys/amd64/amd64/elf_machdep.c
387
if (*where != val)
sys/amd64/amd64/elf_machdep.c
388
*where = val;
sys/amd64/amd64/gdb_machdep.c
156
uintmax_t val;
sys/amd64/amd64/gdb_machdep.c
158
val = 0;
sys/amd64/amd64/gdb_machdep.c
162
val = rdr0();
sys/amd64/amd64/gdb_machdep.c
165
val = rdr1();
sys/amd64/amd64/gdb_machdep.c
168
val = rdr2();
sys/amd64/amd64/gdb_machdep.c
171
val = rdr3();
sys/amd64/amd64/gdb_machdep.c
179
if (val != 0) {
sys/amd64/amd64/gdb_machdep.c
181
gdb_tx_varhex(val);
sys/amd64/amd64/gdb_machdep.c
91
gdb_cpu_setreg(int regnum, void *val)
sys/amd64/amd64/gdb_machdep.c
93
register_t regval = *(register_t *)val;
sys/amd64/amd64/initcpu.c
207
u_int regs[4], val;
sys/amd64/amd64/initcpu.c
217
val = regs[3];
sys/amd64/amd64/initcpu.c
222
if ((val & VIA_CPUID_HAS_RNG) != 0) {
sys/amd64/amd64/initcpu.c
228
if ((val & VIA_CPUID_HAS_ACE) != 0)
sys/amd64/amd64/initcpu.c
230
if ((val & VIA_CPUID_HAS_ACE2) != 0)
sys/amd64/amd64/initcpu.c
232
if ((val & VIA_CPUID_HAS_PHE) != 0)
sys/amd64/amd64/initcpu.c
234
if ((val & VIA_CPUID_HAS_PMM) != 0)
sys/amd64/amd64/pmap.c
10023
int val;
sys/amd64/amd64/pmap.c
10033
val = 0;
sys/amd64/amd64/pmap.c
10042
val = MINCORE_PSIND(2);
sys/amd64/amd64/pmap.c
10051
val = MINCORE_PSIND(1);
sys/amd64/amd64/pmap.c
10055
val = 0;
sys/amd64/amd64/pmap.c
10061
val |= MINCORE_INCORE;
sys/amd64/amd64/pmap.c
10063
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/amd64/amd64/pmap.c
10065
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/amd64/amd64/pmap.c
10067
if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
sys/amd64/amd64/pmap.c
10074
return (val);
sys/amd64/amd64/trap.c
1236
int error, val;
sys/amd64/amd64/trap.c
1238
val = syscall_ret_l1d_flush_mode;
sys/amd64/amd64/trap.c
1239
error = sysctl_handle_int(oidp, &val, 0, req);
sys/amd64/amd64/trap.c
1242
syscall_ret_l1d_flush_mode = val;
sys/amd64/amd64/vm_machdep.c
414
cpu_procctl_kpti_ctl(struct proc *p, int val)
sys/amd64/amd64/vm_machdep.c
417
if (pti && val == PROC_KPTI_CTL_ENABLE_ON_EXEC)
sys/amd64/amd64/vm_machdep.c
419
if (val == PROC_KPTI_CTL_DISABLE_ON_EXEC)
sys/amd64/amd64/vm_machdep.c
424
cpu_procctl_kpti_status(struct proc *p, int *val)
sys/amd64/amd64/vm_machdep.c
426
*val = (p->p_md.md_flags & P_MD_KPTI) != 0 ?
sys/amd64/amd64/vm_machdep.c
430
*val |= PROC_KPTI_STATUS_ACTIVE;
sys/amd64/amd64/vm_machdep.c
434
cpu_procctl_la_ctl(struct proc *p, int val)
sys/amd64/amd64/vm_machdep.c
439
switch (val) {
sys/amd64/amd64/vm_machdep.c
460
cpu_procctl_la_status(struct proc *p, int *val)
sys/amd64/amd64/vm_machdep.c
474
*val = res;
sys/amd64/amd64/vm_machdep.c
481
int error, val;
sys/amd64/amd64/vm_machdep.c
499
error = copyin(data, &val, sizeof(val));
sys/amd64/amd64/vm_machdep.c
504
val != PROC_KPTI_CTL_ENABLE_ON_EXEC &&
sys/amd64/amd64/vm_machdep.c
505
val != PROC_KPTI_CTL_DISABLE_ON_EXEC) {
sys/amd64/amd64/vm_machdep.c
510
val != PROC_LA_CTL_LA48_ON_EXEC &&
sys/amd64/amd64/vm_machdep.c
511
val != PROC_LA_CTL_LA57_ON_EXEC &&
sys/amd64/amd64/vm_machdep.c
512
val != PROC_LA_CTL_DEFAULT_ON_EXEC) {
sys/amd64/amd64/vm_machdep.c
521
cpu_procctl_kpti_ctl(p, val);
sys/amd64/amd64/vm_machdep.c
524
cpu_procctl_kpti_status(p, &val);
sys/amd64/amd64/vm_machdep.c
527
error = cpu_procctl_la_ctl(p, val);
sys/amd64/amd64/vm_machdep.c
530
cpu_procctl_la_status(p, &val);
sys/amd64/amd64/vm_machdep.c
535
error = copyout(&val, data, sizeof(val));
sys/amd64/include/cpufunc.h
449
load_xcr(u_int reg, u_long val)
sys/amd64/include/cpufunc.h
453
low = val;
sys/amd64/include/cpufunc.h
454
high = val >> 32;
sys/amd64/include/cpufunc.h
978
int rdmsr_safe(u_int msr, uint64_t *val);
sys/amd64/include/pcpu.h
149
#define __PCPU_ADD(name, val) do { \
sys/amd64/include/pcpu.h
153
__val = (val); \
sys/amd64/include/pcpu.h
164
#define __PCPU_SET(name, val) do { \
sys/amd64/include/pcpu.h
168
__val = (val); \
sys/amd64/include/pcpu.h
212
#define __PCPU_ADD(name, val) do { \
sys/amd64/include/pcpu.h
218
__val = (val); \
sys/amd64/include/pcpu.h
233
#define __PCPU_SET(name, val) do { \
sys/amd64/include/pcpu.h
239
__val = (val); \
sys/amd64/include/pcpu.h
263
#define PCPU_ADD(member, val) __PCPU_ADD(pc_ ## member, val)
sys/amd64/include/pcpu.h
265
#define PCPU_SET(member, val) __PCPU_SET(pc_ ## member, val)
sys/amd64/include/vmm.h
185
DECLARE_VMMOPS_FUNC(int, setreg, (void *vcpui, int num, uint64_t val));
sys/amd64/include/vmm.h
191
DECLARE_VMMOPS_FUNC(int, setcap, (void *vcpui, int num, int val));
sys/amd64/include/vmm.h
237
int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val);
sys/amd64/include/vmm.h
252
int vm_get_capability(struct vcpu *vcpu, int type, int *val);
sys/amd64/include/vmm.h
253
int vm_set_capability(struct vcpu *vcpu, int type, int val);
sys/amd64/include/vmm_instruction_emul.h
84
uint64_t val, int size);
sys/amd64/linux/linux.h
192
l_int val;
sys/amd64/linux/linux.h
77
l_int val[2];
sys/amd64/linux/linux_machdep.c
333
uint64_t val;
sys/amd64/linux/linux_machdep.c
351
val = *(&reg.r15 + ((uintptr_t)addr / sizeof(reg.r15)));
sys/amd64/linux/linux_machdep.c
352
return (copyout(&val, data, sizeof(val)));
sys/amd64/linux/linux_machdep.c
356
linux_invalid_selector(u_short val)
sys/amd64/linux/linux_machdep.c
359
return (val != 0 && ISPL(val) != SEL_UPL);
sys/amd64/linux/linux_proto.h
719
char val_l_[PADL_(uint32_t)]; uint32_t val; char val_r_[PADR_(uint32_t)];
sys/amd64/linux/linux_systrace_args.c
1568
uarg[a++] = p->val; /* uint32_t */
sys/amd64/linux/linux_sysvec.c
809
Elf64_Addr *where, val;
sys/amd64/linux/linux_sysvec.c
845
val = addr;
sys/amd64/linux/linux_sysvec.c
846
if (*where != val)
sys/amd64/linux/linux_sysvec.c
847
*where = val;
sys/amd64/linux32/linux.h
299
l_int val;
sys/amd64/linux32/linux.h
89
l_int val[2];
sys/amd64/linux32/linux32_proto.h
1631
char val_l_[PADL_(uint32_t)]; uint32_t val; char val_r_[PADR_(uint32_t)];
sys/amd64/linux32/linux32_proto.h
795
char val_l_[PADL_(uint32_t)]; uint32_t val; char val_r_[PADR_(uint32_t)];
sys/amd64/linux32/linux32_systrace_args.c
1697
uarg[a++] = p->val; /* uint32_t */
sys/amd64/linux32/linux32_systrace_args.c
3143
uarg[a++] = p->val; /* uint32_t */
sys/amd64/vmm/amd/amdvi_hw.c
1309
uint64_t val;
sys/amd64/vmm/amd/amdvi_hw.c
1318
val = ( AMDVI_CTRL_EN |
sys/amd64/vmm/amd/amdvi_hw.c
1325
val |= AMDVI_CTRL_COH;
sys/amd64/vmm/amd/amdvi_hw.c
1327
val |= AMDVI_CTRL_HTT;
sys/amd64/vmm/amd/amdvi_hw.c
1329
val |= AMDVI_CTRL_RPPW;
sys/amd64/vmm/amd/amdvi_hw.c
1331
val |= AMDVI_CTRL_PPW;
sys/amd64/vmm/amd/amdvi_hw.c
1333
val |= AMDVI_CTRL_ISOC;
sys/amd64/vmm/amd/amdvi_hw.c
1335
ctrl->control = val;
sys/amd64/vmm/amd/svm.c
1088
svm_modify_intr_shadow(struct svm_vcpu *vcpu, uint64_t val)
sys/amd64/vmm/amd/svm.c
1095
newval = val ? 1 : 0;
sys/amd64/vmm/amd/svm.c
1104
svm_get_intr_shadow(struct svm_vcpu *vcpu, uint64_t *val)
sys/amd64/vmm/amd/svm.c
1109
*val = ctrl->intr_shadow;
sys/amd64/vmm/amd/svm.c
1237
uint64_t val, bool *retu)
sys/amd64/vmm/amd/svm.c
1242
error = lapic_wrmsr(vcpu->vcpu, num, val, retu);
sys/amd64/vmm/amd/svm.c
1244
error = svm_write_efer(sc, vcpu, val, retu);
sys/amd64/vmm/amd/svm.c
1246
error = svm_wrmsr(vcpu, num, val, retu);
sys/amd64/vmm/amd/svm.c
1356
uint64_t code, info1, info2, val;
sys/amd64/vmm/amd/svm.c
136
static int svm_setreg(void *vcpui, int ident, uint64_t val);
sys/amd64/vmm/amd/svm.c
137
static int svm_getreg(void *vcpui, int ident, uint64_t *val);
sys/amd64/vmm/amd/svm.c
1563
val = (uint64_t)edx << 32 | eax;
sys/amd64/vmm/amd/svm.c
1564
SVM_CTR2(vcpu, "wrmsr %#x val %#lx", ecx, val);
sys/amd64/vmm/amd/svm.c
1565
if (emulate_wrmsr(svm_sc, vcpu, ecx, val, &retu)) {
sys/amd64/vmm/amd/svm.c
1568
vmexit->u.msr.wval = val;
sys/amd64/vmm/amd/svm.c
2339
svm_getreg(void *vcpui, int ident, uint64_t *val)
sys/amd64/vmm/amd/svm.c
2347
return (svm_get_intr_shadow(vcpu, val));
sys/amd64/vmm/amd/svm.c
2350
if (vmcb_read(vcpu, ident, val) == 0) {
sys/amd64/vmm/amd/svm.c
2357
*val = *reg;
sys/amd64/vmm/amd/svm.c
2366
svm_setreg(void *vcpui, int ident, uint64_t val)
sys/amd64/vmm/amd/svm.c
2374
return (svm_modify_intr_shadow(vcpu, val));
sys/amd64/vmm/amd/svm.c
2379
if (vmcb_write(vcpu, ident, val) == 0) {
sys/amd64/vmm/amd/svm.c
2387
*reg = val;
sys/amd64/vmm/amd/svm.c
2423
uint64_t val;
sys/amd64/vmm/amd/svm.c
2426
ret = svm_getreg(vcpui, ident, &val);
sys/amd64/vmm/amd/svm.c
2430
SNAPSHOT_VAR_OR_LEAVE(val, meta, ret, done);
sys/amd64/vmm/amd/svm.c
2432
SNAPSHOT_VAR_OR_LEAVE(val, meta, ret, done);
sys/amd64/vmm/amd/svm.c
2434
ret = svm_setreg(vcpui, ident, val);
sys/amd64/vmm/amd/svm.c
2448
svm_setcap(void *vcpui, int type, int val)
sys/amd64/vmm/amd/svm.c
2460
VMCB_INTCPT_HLT, val);
sys/amd64/vmm/amd/svm.c
2464
VMCB_INTCPT_PAUSE, val);
sys/amd64/vmm/amd/svm.c
2468
if (val == 0)
sys/amd64/vmm/amd/svm.c
2472
svm_set_intercept(vcpu, VMCB_EXC_INTCPT, BIT(IDT_BP), val);
sys/amd64/vmm/amd/svm.c
2476
vlapic->ipi_exit = val;
sys/amd64/vmm/amd/svm.c
2480
vcpu->caps |= (val << VM_CAP_MASK_HWINTR);
sys/amd64/vmm/amd/svm.c
2490
if (val) {
sys/amd64/vmm/amd/svm.c
2519
svm_set_intercept(vcpu, VMCB_EXC_INTCPT, BIT(IDT_DB), val);
sys/amd64/vmm/amd/svm.c
2521
val);
sys/amd64/vmm/amd/svm.c
2523
val);
sys/amd64/vmm/amd/svm.c
740
uint64_t val;
sys/amd64/vmm/amd/svm.c
742
val = in ? regs->sctx_rdi : regs->sctx_rsi;
sys/amd64/vmm/amd/svm.c
744
return (val);
sys/amd64/vmm/amd/svm.c
750
uint64_t val;
sys/amd64/vmm/amd/svm.c
752
val = rep ? regs->sctx_rcx : 1;
sys/amd64/vmm/amd/svm.c
754
return (val);
sys/amd64/vmm/amd/svm_msr.c
142
svm_wrmsr(struct svm_vcpu *vcpu, u_int num, uint64_t val, bool *retu)
sys/amd64/vmm/amd/svm_msr.c
156
if (vm_wrmtrr(&vcpu->mtrr, num, val) != 0) {
sys/amd64/vmm/amd/svm_msr.c
174
svm_set_tsc_offset(vcpu, val - rdtsc());
sys/amd64/vmm/amd/svm_msr.h
40
int svm_wrmsr(struct svm_vcpu *vcpu, u_int num, uint64_t val, bool *retu);
sys/amd64/vmm/amd/vmcb.c
118
vmcb_access(struct svm_vcpu *vcpu, int write, int ident, uint64_t *val)
sys/amd64/vmm/amd/vmcb.c
134
*val = 0;
sys/amd64/vmm/amd/vmcb.c
142
memcpy(ptr + off, val, bytes);
sys/amd64/vmm/amd/vmcb.c
144
memcpy(val, ptr + off, bytes);
sys/amd64/vmm/amd/vmcb.c
268
vmcb_write(struct svm_vcpu *vcpu, int ident, uint64_t val)
sys/amd64/vmm/amd/vmcb.c
281
return (vmcb_access(vcpu, 1, ident, &val));
sys/amd64/vmm/amd/vmcb.c
285
state->cr0 = val;
sys/amd64/vmm/amd/vmcb.c
290
state->cr2 = val;
sys/amd64/vmm/amd/vmcb.c
295
state->cr3 = val;
sys/amd64/vmm/amd/vmcb.c
300
state->cr4 = val;
sys/amd64/vmm/amd/vmcb.c
305
state->dr6 = val;
sys/amd64/vmm/amd/vmcb.c
310
state->dr7 = val;
sys/amd64/vmm/amd/vmcb.c
316
state->efer = val | EFER_SVM;
sys/amd64/vmm/amd/vmcb.c
321
state->rax = val;
sys/amd64/vmm/amd/vmcb.c
325
state->rflags = val;
sys/amd64/vmm/amd/vmcb.c
329
state->rip = val;
sys/amd64/vmm/amd/vmcb.c
333
state->rsp = val;
sys/amd64/vmm/amd/vmcb.c
348
seg->selector = val;
sys/amd64/vmm/amd/vmcb.c
471
vmcb_getany(struct svm_vcpu *vcpu, int ident, uint64_t *val)
sys/amd64/vmm/amd/vmcb.c
480
error = vmcb_read(vcpu, ident, val);
sys/amd64/vmm/amd/vmcb.c
487
vmcb_setany(struct svm_vcpu *vcpu, int ident, uint64_t val)
sys/amd64/vmm/amd/vmcb.c
496
error = vmcb_write(vcpu, ident, val);
sys/amd64/vmm/amd/vmcb.c
539
uint64_t val;
sys/amd64/vmm/amd/vmcb.c
542
ret = vmcb_getany(vcpu, ident, &val);
sys/amd64/vmm/amd/vmcb.c
546
SNAPSHOT_VAR_OR_LEAVE(val, meta, ret, done);
sys/amd64/vmm/amd/vmcb.c
548
SNAPSHOT_VAR_OR_LEAVE(val, meta, ret, done);
sys/amd64/vmm/amd/vmcb.c
550
ret = vmcb_setany(vcpu, ident, val);
sys/amd64/vmm/amd/vmcb.h
356
int vmcb_write(struct svm_vcpu *vcpu, int ident, uint64_t val);
sys/amd64/vmm/amd/vmcb.h
361
int vmcb_getany(struct svm_vcpu *vcpu, int ident, uint64_t *val);
sys/amd64/vmm/amd/vmcb.h
362
int vmcb_setany(struct svm_vcpu *vcpu, int ident, uint64_t val);
sys/amd64/vmm/intel/vmcs.c
226
vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val)
sys/amd64/vmm/intel/vmcs.c
239
val = vmcs_fix_regval(encoding, val);
sys/amd64/vmm/intel/vmcs.c
244
error = vmwrite(encoding, val);
sys/amd64/vmm/intel/vmcs.c
435
vmcs_getany(struct vmcs *vmcs, int running, int ident, uint64_t *val)
sys/amd64/vmm/intel/vmcs.c
442
error = vmread(ident, val);
sys/amd64/vmm/intel/vmcs.c
451
vmcs_setany(struct vmcs *vmcs, int running, int ident, uint64_t val)
sys/amd64/vmm/intel/vmcs.c
458
error = vmwrite(ident, val);
sys/amd64/vmm/intel/vmcs.c
471
uint64_t val;
sys/amd64/vmm/intel/vmcs.c
474
ret = vmcs_getreg(vmcs, running, ident, &val);
sys/amd64/vmm/intel/vmcs.c
478
SNAPSHOT_VAR_OR_LEAVE(val, meta, ret, done);
sys/amd64/vmm/intel/vmcs.c
480
SNAPSHOT_VAR_OR_LEAVE(val, meta, ret, done);
sys/amd64/vmm/intel/vmcs.c
482
ret = vmcs_setreg(vmcs, running, ident, val);
sys/amd64/vmm/intel/vmcs.c
531
uint64_t val;
sys/amd64/vmm/intel/vmcs.c
534
ret = vmcs_getany(vmcs, running, ident, &val);
sys/amd64/vmm/intel/vmcs.c
538
SNAPSHOT_VAR_OR_LEAVE(val, meta, ret, done);
sys/amd64/vmm/intel/vmcs.c
540
SNAPSHOT_VAR_OR_LEAVE(val, meta, ret, done);
sys/amd64/vmm/intel/vmcs.c
542
ret = vmcs_setany(vmcs, running, ident, val);
sys/amd64/vmm/intel/vmcs.c
560
uint64_t cur_vmcs, val;
sys/amd64/vmm/intel/vmcs.c
581
val = vmcs_read(VMCS_GUEST_ACTIVITY);
sys/amd64/vmm/intel/vmcs.c
582
switch (val) {
sys/amd64/vmm/intel/vmcs.c
596
db_printf("Unknown: %#lx", val);
sys/amd64/vmm/intel/vmcs.c
60
vmcs_fix_regval(uint32_t encoding, uint64_t val)
sys/amd64/vmm/intel/vmcs.c
610
val = vmcs_read(VMCS_EXIT_INTR_INFO);
sys/amd64/vmm/intel/vmcs.c
612
switch (val >> 8 & 0x7) {
sys/amd64/vmm/intel/vmcs.c
626
db_printf("?? %lu", val >> 8 & 0x7);
sys/amd64/vmm/intel/vmcs.c
629
db_printf(" Vector: %lu", val & 0xff);
sys/amd64/vmm/intel/vmcs.c
630
if (val & 0x800)
sys/amd64/vmm/intel/vmcs.c
65
val = vmx_fix_cr0(val);
sys/amd64/vmm/intel/vmcs.c
68
val = vmx_fix_cr4(val);
sys/amd64/vmm/intel/vmcs.c
73
return (val);
sys/amd64/vmm/intel/vmcs.h
47
uint64_t val;
sys/amd64/vmm/intel/vmcs.h
54
int vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val);
sys/amd64/vmm/intel/vmcs.h
60
int vmcs_getany(struct vmcs *vmcs, int running, int ident, uint64_t *val);
sys/amd64/vmm/intel/vmcs.h
61
int vmcs_setany(struct vmcs *vmcs, int running, int ident, uint64_t val);
sys/amd64/vmm/intel/vmcs.h
78
uint64_t val;
sys/amd64/vmm/intel/vmcs.h
80
error = vmread(encoding, &val);
sys/amd64/vmm/intel/vmcs.h
82
return (val);
sys/amd64/vmm/intel/vmcs.h
86
vmcs_write(uint32_t encoding, uint64_t val)
sys/amd64/vmm/intel/vmcs.h
90
error = vmwrite(encoding, val);
sys/amd64/vmm/intel/vmx.c
2014
uint64_t val;
sys/amd64/vmm/intel/vmx.c
2019
error = vmx_getreg(vcpu, reg, &val);
sys/amd64/vmm/intel/vmx.c
2021
return (val);
sys/amd64/vmm/intel/vmx.c
2027
uint64_t val;
sys/amd64/vmm/intel/vmx.c
2031
error = vmx_getreg(vcpu, VM_REG_GUEST_RCX, &val);
sys/amd64/vmm/intel/vmx.c
2034
val = 1;
sys/amd64/vmm/intel/vmx.c
2036
return (val);
sys/amd64/vmm/intel/vmx.c
2342
emulate_wrmsr(struct vmx_vcpu *vcpu, u_int num, uint64_t val, bool *retu)
sys/amd64/vmm/intel/vmx.c
2347
error = lapic_wrmsr(vcpu->vcpu, num, val, retu);
sys/amd64/vmm/intel/vmx.c
2349
error = vmx_wrmsr(vcpu, num, val, retu);
sys/amd64/vmm/intel/vmx.c
318
static int vmxctx_setreg(struct vmxctx *vmxctx, int reg, uint64_t val);
sys/amd64/vmm/intel/vmx.c
3336
vmxctx_setreg(struct vmxctx *vmxctx, int reg, uint64_t val)
sys/amd64/vmm/intel/vmx.c
3341
*regp = val;
sys/amd64/vmm/intel/vmx.c
3360
vmx_modify_intr_shadow(struct vmx_vcpu *vcpu, int running, uint64_t val)
sys/amd64/vmm/intel/vmx.c
3369
if (val) {
sys/amd64/vmm/intel/vmx.c
3382
VMX_CTR2(vcpu, "Setting intr_shadow to %#lx %s", val,
sys/amd64/vmm/intel/vmx.c
3438
vmx_setreg(void *vcpui, int reg, uint64_t val)
sys/amd64/vmm/intel/vmx.c
3452
return (vmx_modify_intr_shadow(vcpu, running, val));
sys/amd64/vmm/intel/vmx.c
3454
if (vmxctx_setreg(&vcpu->ctx, reg, val) == 0)
sys/amd64/vmm/intel/vmx.c
3461
error = vmcs_setreg(vcpu->vmcs, running, reg, val);
sys/amd64/vmm/intel/vmx.c
3473
if (val & EFER_LMA)
sys/amd64/vmm/intel/vmx.c
3487
VMCS_IDENT(shadow), val);
sys/amd64/vmm/intel/vmx.c
3591
vmx_setcap(void *vcpui, int type, int val)
sys/amd64/vmm/intel/vmx.c
3678
vlapic->ipi_exit = val;
sys/amd64/vmm/intel/vmx.c
3691
if (val) {
sys/amd64/vmm/intel/vmx.c
3710
if (val) {
sys/amd64/vmm/intel/vmx.c
3902
uint64_t mask, val;
sys/amd64/vmm/intel/vmx.c
3913
val = vmcs_read(VMCS_EOI_EXIT(vector));
sys/amd64/vmm/intel/vmx.c
3915
val |= mask;
sys/amd64/vmm/intel/vmx.c
3917
val &= ~mask;
sys/amd64/vmm/intel/vmx.c
3918
vmcs_write(VMCS_EOI_EXIT(vector), val);
sys/amd64/vmm/intel/vmx.c
4008
uint64_t val, pirval;
sys/amd64/vmm/intel/vmx.c
4024
val = atomic_readandclear_long(&pir_desc->pir[0]);
sys/amd64/vmm/intel/vmx.c
4025
if (val != 0) {
sys/amd64/vmm/intel/vmx.c
4026
lapic->irr0 |= val;
sys/amd64/vmm/intel/vmx.c
4027
lapic->irr1 |= val >> 32;
sys/amd64/vmm/intel/vmx.c
4029
pirval = val;
sys/amd64/vmm/intel/vmx.c
4032
val = atomic_readandclear_long(&pir_desc->pir[1]);
sys/amd64/vmm/intel/vmx.c
4033
if (val != 0) {
sys/amd64/vmm/intel/vmx.c
4034
lapic->irr2 |= val;
sys/amd64/vmm/intel/vmx.c
4035
lapic->irr3 |= val >> 32;
sys/amd64/vmm/intel/vmx.c
4037
pirval = val;
sys/amd64/vmm/intel/vmx.c
4040
val = atomic_readandclear_long(&pir_desc->pir[2]);
sys/amd64/vmm/intel/vmx.c
4041
if (val != 0) {
sys/amd64/vmm/intel/vmx.c
4042
lapic->irr4 |= val;
sys/amd64/vmm/intel/vmx.c
4043
lapic->irr5 |= val >> 32;
sys/amd64/vmm/intel/vmx.c
4045
pirval = val;
sys/amd64/vmm/intel/vmx.c
4048
val = atomic_readandclear_long(&pir_desc->pir[3]);
sys/amd64/vmm/intel/vmx.c
4049
if (val != 0) {
sys/amd64/vmm/intel/vmx.c
4050
lapic->irr6 |= val;
sys/amd64/vmm/intel/vmx.c
4051
lapic->irr7 |= val >> 32;
sys/amd64/vmm/intel/vmx.c
4053
pirval = val;
sys/amd64/vmm/intel/vmx.c
955
msr_load_list[0].val = IA32_FLUSH_CMD_L1D;
sys/amd64/vmm/intel/vmx_cpufunc.h
118
vmwrite(uint64_t reg, uint64_t val)
sys/amd64/vmm/intel/vmx_cpufunc.h
125
: [val] "r" (val), [reg] "r" (reg)
sys/amd64/vmm/intel/vmx_msr.c
119
else if (vmx_ctl_allows_zero_setting(val, i))/* c(iii)*/
sys/amd64/vmm/intel/vmx_msr.c
121
else if (vmx_ctl_allows_one_setting(val, i)) /* c(iv) */
sys/amd64/vmm/intel/vmx_msr.c
224
pat_valid(uint64_t val)
sys/amd64/vmm/intel/vmx_msr.c
235
pa = (val >> (i * 8)) & 0xff;
sys/amd64/vmm/intel/vmx_msr.c
402
vmx_rdmsr(struct vmx_vcpu *vcpu, u_int num, uint64_t *val, bool *retu)
sys/amd64/vmm/intel/vmx_msr.c
411
*val = 0;
sys/amd64/vmm/intel/vmx_msr.c
419
if (vm_rdmtrr(&vcpu->mtrr, num, val) != 0) {
sys/amd64/vmm/intel/vmx_msr.c
424
*val = misc_enable;
sys/amd64/vmm/intel/vmx_msr.c
427
*val = platform_info;
sys/amd64/vmm/intel/vmx_msr.c
431
*val = turbo_ratio_limit;
sys/amd64/vmm/intel/vmx_msr.c
434
*val = vcpu->guest_msrs[IDX_MSR_PAT];
sys/amd64/vmm/intel/vmx_msr.c
444
vmx_wrmsr(struct vmx_vcpu *vcpu, u_int num, uint64_t val, bool *retu)
sys/amd64/vmm/intel/vmx_msr.c
461
if (vm_wrmtrr(&vcpu->mtrr, num, val) != 0) {
sys/amd64/vmm/intel/vmx_msr.c
466
changed = val ^ misc_enable;
sys/amd64/vmm/intel/vmx_msr.c
486
if (pat_valid(val))
sys/amd64/vmm/intel/vmx_msr.c
487
vcpu->guest_msrs[IDX_MSR_PAT] = val;
sys/amd64/vmm/intel/vmx_msr.c
492
error = vmx_set_tsc_offset(vcpu, val - rdtsc());
sys/amd64/vmm/intel/vmx_msr.c
501
vcpu->guest_msrs[IDX_MSR_TSC_AUX] = val;
sys/amd64/vmm/intel/vmx_msr.c
81
uint64_t val, trueval;
sys/amd64/vmm/intel/vmx_msr.c
90
val = rdmsr(ctl_reg);
sys/amd64/vmm/intel/vmx_msr.c
94
trueval = val; /* step a */
sys/amd64/vmm/intel/vmx_msr.h
40
int vmx_rdmsr(struct vmx_vcpu *vcpu, u_int num, uint64_t *val, bool *retu);
sys/amd64/vmm/intel/vmx_msr.h
41
int vmx_wrmsr(struct vmx_vcpu *vcpu, u_int num, uint64_t val, bool *retu);
sys/amd64/vmm/intel/vtd.c
266
volatile uint64_t *iotlb_reg, val;
sys/amd64/vmm/intel/vtd.c
277
val = *iotlb_reg;
sys/amd64/vmm/intel/vtd.c
278
if ((val & VTD_IIR_IVT) == 0)
sys/amd64/vmm/io/vatpic.c
273
vatpic_icw1(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
sys/amd64/vmm/io/vatpic.c
275
VATPIC_CTR1(vatpic, "atpic icw1 0x%x", val);
sys/amd64/vmm/io/vatpic.c
287
if ((val & ICW1_SNGL) != 0) {
sys/amd64/vmm/io/vatpic.c
292
if ((val & ICW1_IC4) == 0) {
sys/amd64/vmm/io/vatpic.c
303
vatpic_icw2(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
sys/amd64/vmm/io/vatpic.c
305
VATPIC_CTR1(vatpic, "atpic icw2 0x%x", val);
sys/amd64/vmm/io/vatpic.c
307
atpic->irq_base = val & 0xf8;
sys/amd64/vmm/io/vatpic.c
315
vatpic_icw3(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
sys/amd64/vmm/io/vatpic.c
317
VATPIC_CTR1(vatpic, "atpic icw3 0x%x", val);
sys/amd64/vmm/io/vatpic.c
325
vatpic_icw4(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
sys/amd64/vmm/io/vatpic.c
327
VATPIC_CTR1(vatpic, "atpic icw4 0x%x", val);
sys/amd64/vmm/io/vatpic.c
329
if ((val & ICW4_8086) == 0) {
sys/amd64/vmm/io/vatpic.c
334
if ((val & ICW4_AEOI) != 0)
sys/amd64/vmm/io/vatpic.c
337
if ((val & ICW4_SFNM) != 0) {
sys/amd64/vmm/io/vatpic.c
342
"mode on slave atpic: %#x", val);
sys/amd64/vmm/io/vatpic.c
353
vatpic_ocw1(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
sys/amd64/vmm/io/vatpic.c
355
VATPIC_CTR1(vatpic, "atpic ocw1 0x%x", val);
sys/amd64/vmm/io/vatpic.c
357
atpic->mask = val & 0xff;
sys/amd64/vmm/io/vatpic.c
363
vatpic_ocw2(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
sys/amd64/vmm/io/vatpic.c
365
VATPIC_CTR1(vatpic, "atpic ocw2 0x%x", val);
sys/amd64/vmm/io/vatpic.c
367
atpic->rotate = ((val & OCW2_R) != 0);
sys/amd64/vmm/io/vatpic.c
369
if ((val & OCW2_EOI) != 0) {
sys/amd64/vmm/io/vatpic.c
372
if ((val & OCW2_SL) != 0) {
sys/amd64/vmm/io/vatpic.c
374
isr_bit = val & 0x7;
sys/amd64/vmm/io/vatpic.c
386
} else if ((val & OCW2_SL) != 0 && atpic->rotate == true) {
sys/amd64/vmm/io/vatpic.c
388
atpic->lowprio = val & 0x7;
sys/amd64/vmm/io/vatpic.c
395
vatpic_ocw3(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
sys/amd64/vmm/io/vatpic.c
397
VATPIC_CTR1(vatpic, "atpic ocw3 0x%x", val);
sys/amd64/vmm/io/vatpic.c
399
if (val & OCW3_ESMM) {
sys/amd64/vmm/io/vatpic.c
400
atpic->smm = val & OCW3_SMM ? 1 : 0;
sys/amd64/vmm/io/vatpic.c
406
if (val & OCW3_RR) {
sys/amd64/vmm/io/vatpic.c
408
atpic->rd_cmd_reg = val & OCW3_RIS;
sys/amd64/vmm/io/vatpic.c
411
atpic->poll = ((val & OCW3_P) != 0);
sys/amd64/vmm/io/vatpic.c
670
uint8_t val;
sys/amd64/vmm/io/vatpic.c
673
val = *eax;
sys/amd64/vmm/io/vatpic.c
680
error = vatpic_icw2(vatpic, atpic, val);
sys/amd64/vmm/io/vatpic.c
683
error = vatpic_icw3(vatpic, atpic, val);
sys/amd64/vmm/io/vatpic.c
686
error = vatpic_icw4(vatpic, atpic, val);
sys/amd64/vmm/io/vatpic.c
689
error = vatpic_ocw1(vatpic, atpic, val);
sys/amd64/vmm/io/vatpic.c
693
if (val & (1 << 4))
sys/amd64/vmm/io/vatpic.c
694
error = vatpic_icw1(vatpic, atpic, val);
sys/amd64/vmm/io/vatpic.c
697
if (val & (1 << 3))
sys/amd64/vmm/io/vatpic.c
698
error = vatpic_ocw3(vatpic, atpic, val);
sys/amd64/vmm/io/vatpic.c
700
error = vatpic_ocw2(vatpic, atpic, val);
sys/amd64/vmm/io/vatpit.c
298
vatpit_update_mode(struct vatpit *vatpit, uint8_t val)
sys/amd64/vmm/io/vatpit.c
303
sel = val & TIMER_SEL_MASK;
sys/amd64/vmm/io/vatpit.c
304
rw = val & TIMER_RW_MASK;
sys/amd64/vmm/io/vatpit.c
305
mode = val & TIMER_MODE_MASK;
sys/amd64/vmm/io/vatpit.c
308
return (pit_readback(vatpit, val));
sys/amd64/vmm/io/vatpit.c
342
uint8_t val;
sys/amd64/vmm/io/vatpit.c
350
val = *eax;
sys/amd64/vmm/io/vatpit.c
359
error = vatpit_update_mode(vatpit, val);
sys/amd64/vmm/io/vhpet.c
152
uint32_t val;
sys/amd64/vmm/io/vhpet.c
155
val = vhpet->countbase;
sys/amd64/vmm/io/vhpet.c
161
val += delta / vhpet->freq_sbt;
sys/amd64/vmm/io/vhpet.c
172
return (val);
sys/amd64/vmm/io/vhpet.c
472
vhpet_mmio_write(struct vcpu *vcpu, uint64_t gpa, uint64_t val, int size,
sys/amd64/vmm/io/vhpet.c
490
data = val;
sys/amd64/vmm/io/vhpet.c
494
data = val;
sys/amd64/vmm/io/vhpet.h
41
int vhpet_mmio_write(struct vcpu *vcpu, uint64_t gpa, uint64_t val,
sys/amd64/vmm/io/vhpet.h
43
int vhpet_mmio_read(struct vcpu *vcpu, uint64_t gpa, uint64_t *val,
sys/amd64/vmm/io/vlapic.c
1217
vlapic_self_ipi_handler(struct vlapic *vlapic, uint64_t val)
sys/amd64/vmm/io/vlapic.c
1223
vec = val & 0xff;
sys/amd64/vmm/io/vlapic.c
1235
uint32_t *irrptr, val;
sys/amd64/vmm/io/vlapic.c
1246
val = atomic_load_acq_int(&irrptr[idx]);
sys/amd64/vmm/io/vlapic.c
1247
bitpos = fls(val);
sys/amd64/vmm/io/vlapic.c
372
uint32_t val;
sys/amd64/vmm/io/vlapic.c
375
val = atomic_load_acq_32(&vlapic->lvt_last[idx]);
sys/amd64/vmm/io/vlapic.c
376
return (val);
sys/amd64/vmm/io/vlapic.c
382
uint32_t *lvtptr, mask, val;
sys/amd64/vmm/io/vlapic.c
388
val = *lvtptr;
sys/amd64/vmm/io/vlapic.c
392
val |= APIC_LVT_M;
sys/amd64/vmm/io/vlapic.c
408
val &= mask;
sys/amd64/vmm/io/vlapic.c
409
*lvtptr = val;
sys/amd64/vmm/io/vlapic.c
410
atomic_store_rel_32(&vlapic->lvt_last[idx], val);
sys/amd64/vmm/io/vlapic.c
909
vlapic_set_tpr(struct vlapic *vlapic, uint8_t val)
sys/amd64/vmm/io/vlapic.c
913
if (lapic->tpr != val) {
sys/amd64/vmm/io/vlapic.c
915
lapic->tpr, val);
sys/amd64/vmm/io/vlapic.c
916
lapic->tpr = val;
sys/amd64/vmm/io/vlapic.c
930
vlapic_set_cr8(struct vlapic *vlapic, uint64_t val)
sys/amd64/vmm/io/vlapic.c
934
if (val & ~0xf) {
sys/amd64/vmm/io/vlapic.c
939
tpr = val << 4;
sys/amd64/vmm/io/vlapic.h
110
void vlapic_self_ipi_handler(struct vlapic *vlapic, uint64_t val);
sys/amd64/vmm/io/vlapic.h
79
int vlapic_set_apicbase(struct vlapic *vlapic, uint64_t val);
sys/amd64/vmm/io/vlapic.h
97
void vlapic_set_cr8(struct vlapic *vlapic, uint64_t val);
sys/amd64/vmm/io/vpmtmr.c
102
*val = vpmtmr->baseval + delta / vpmtmr->freq_sbt;
sys/amd64/vmm/io/vpmtmr.c
84
vpmtmr_handler(struct vm *vm, bool in, int port, int bytes, uint32_t *val)
sys/amd64/vmm/io/vpmtmr.h
40
int vpmtmr_handler(struct vm *vm, bool in, int port, int bytes, uint32_t *val);
sys/amd64/vmm/io/vrtc.c
171
rtcset(struct rtcdev *rtc, int val)
sys/amd64/vmm/io/vrtc.c
174
KASSERT(val >= 0 && val < 100, ("%s: invalid bin2bcd index %d",
sys/amd64/vmm/io/vrtc.c
175
__func__, val));
sys/amd64/vmm/io/vrtc.c
177
return ((rtc->reg_b & RTCSB_BIN) ? val : bin2bcd_data[val]);
sys/amd64/vmm/io/vrtc.c
262
rtcget(struct rtcdev *rtc, int val, int *retval)
sys/amd64/vmm/io/vrtc.c
267
*retval = val;
sys/amd64/vmm/io/vrtc.c
271
lower = val & 0xf;
sys/amd64/vmm/io/vrtc.c
272
upper = (val >> 4) & 0xf;
sys/amd64/vmm/io/vrtc.c
846
vrtc_addr_handler(struct vm *vm, bool in, int port, int bytes, uint32_t *val)
sys/amd64/vmm/io/vrtc.c
856
*val = 0xff;
sys/amd64/vmm/io/vrtc.c
861
vrtc->addr = *val & 0x7f;
sys/amd64/vmm/io/vrtc.c
868
vrtc_data_handler(struct vm *vm, bool in, int port, int bytes, uint32_t *val)
sys/amd64/vmm/io/vrtc.c
910
*val = vrtc->rtcdev.reg_c;
sys/amd64/vmm/io/vrtc.c
913
*val = *((uint8_t *)rtc + offset);
sys/amd64/vmm/io/vrtc.c
916
*val, offset);
sys/amd64/vmm/io/vrtc.c
920
VM_CTR1(vm, "RTC reg_a set to %#x", *val);
sys/amd64/vmm/io/vrtc.c
921
vrtc_set_reg_a(vrtc, *val);
sys/amd64/vmm/io/vrtc.c
924
VM_CTR1(vm, "RTC reg_b set to %#x", *val);
sys/amd64/vmm/io/vrtc.c
925
error = vrtc_set_reg_b(vrtc, *val);
sys/amd64/vmm/io/vrtc.c
929
*val);
sys/amd64/vmm/io/vrtc.c
933
*val);
sys/amd64/vmm/io/vrtc.c
939
*val &= 0x7f;
sys/amd64/vmm/io/vrtc.c
943
offset, *val);
sys/amd64/vmm/io/vrtc.c
944
*((uint8_t *)rtc + offset) = *val;
sys/amd64/vmm/io/vrtc.h
47
uint32_t *val);
sys/amd64/vmm/io/vrtc.h
49
uint32_t *val);
sys/amd64/vmm/vmm.c
141
DEFINE_VMMOPS_IFUNC(int, setreg, (void *vcpui, int num, uint64_t val))
sys/amd64/vmm/vmm.c
145
DEFINE_VMMOPS_IFUNC(int, setcap, (void *vcpui, int num, int val))
sys/amd64/vmm/vmm.c
1590
vm_set_capability(struct vcpu *vcpu, int type, int val)
sys/amd64/vmm/vmm.c
1595
return (vmmops_setcap(vcpu->cookie, type, val));
sys/amd64/vmm/vmm.c
1622
char *val, *cp, *cp2;
sys/amd64/vmm/vmm.c
1639
cp = val = kern_getenv(names[i]);
sys/amd64/vmm/vmm.c
1655
freeenv(val);
sys/amd64/vmm/vmm.c
605
vm_set_register(struct vcpu *vcpu, int reg, uint64_t val)
sys/amd64/vmm/vmm.c
613
error = vmmops_setreg(vcpu->cookie, reg, val);
sys/amd64/vmm/vmm.c
618
VMM_CTR1(vcpu, "Setting nextrip to %#lx", val);
sys/amd64/vmm/vmm.c
619
vcpu->nextrip = val;
sys/amd64/vmm/vmm_instruction_emul.c
1523
uint64_t cr0, rflags, rsp, stack_gla, val;
sys/amd64/vmm/vmm_instruction_emul.c
1526
val = 0;
sys/amd64/vmm/vmm_instruction_emul.c
1596
error = memread(vcpu, mmio_gpa, &val, size, arg);
sys/amd64/vmm/vmm_instruction_emul.c
1598
vm_copyout(&val, copyinfo, size);
sys/amd64/vmm/vmm_instruction_emul.c
1600
vm_copyin(copyinfo, &val, size);
sys/amd64/vmm/vmm_instruction_emul.c
1601
error = memwrite(vcpu, mmio_gpa, val, size, arg);
sys/amd64/vmm/vmm_instruction_emul.c
1689
uint64_t val, rflags;
sys/amd64/vmm/vmm_instruction_emul.c
1704
error = memread(vcpu, gpa, &val, vie->opsize, memarg);
sys/amd64/vmm/vmm_instruction_emul.c
1716
if (val & (1UL << bitoff))
sys/amd64/vmm/vmm_instruction_emul.c
321
uint64_t val;
sys/amd64/vmm/vmm_instruction_emul.c
326
error = vm_get_register(vcpu, reg, &val);
sys/amd64/vmm/vmm_instruction_emul.c
333
*rval = val >> 8;
sys/amd64/vmm/vmm_instruction_emul.c
335
*rval = val;
sys/amd64/vmm/vmm_instruction_emul.c
342
uint64_t origval, val, mask;
sys/amd64/vmm/vmm_instruction_emul.c
349
val = byte;
sys/amd64/vmm/vmm_instruction_emul.c
356
val <<= 8;
sys/amd64/vmm/vmm_instruction_emul.c
359
val |= origval & ~mask;
sys/amd64/vmm/vmm_instruction_emul.c
360
error = vm_set_register(vcpu, reg, val);
sys/amd64/vmm/vmm_instruction_emul.c
367
uint64_t val, int size)
sys/amd64/vmm/vmm_instruction_emul.c
378
val &= size2mask[size];
sys/amd64/vmm/vmm_instruction_emul.c
379
val |= origval & ~size2mask[size];
sys/amd64/vmm/vmm_instruction_emul.c
382
val &= 0xffffffffUL;
sys/amd64/vmm/vmm_instruction_emul.c
390
error = vm_set_register(vcpu, reg, val);
sys/amd64/vmm/vmm_instruction_emul.c
508
uint64_t val;
sys/amd64/vmm/vmm_instruction_emul.c
533
error = vie_read_register(vcpu, reg, &val);
sys/amd64/vmm/vmm_instruction_emul.c
535
val &= size2mask[size];
sys/amd64/vmm/vmm_instruction_emul.c
536
error = memwrite(vcpu, gpa, val, size, arg);
sys/amd64/vmm/vmm_instruction_emul.c
546
error = memread(vcpu, gpa, &val, size, arg);
sys/amd64/vmm/vmm_instruction_emul.c
548
error = vie_write_bytereg(vcpu, vie, val);
sys/amd64/vmm/vmm_instruction_emul.c
557
error = memread(vcpu, gpa, &val, size, arg);
sys/amd64/vmm/vmm_instruction_emul.c
560
error = vie_update_register(vcpu, reg, val, size);
sys/amd64/vmm/vmm_instruction_emul.c
570
error = memread(vcpu, gpa, &val, size, arg);
sys/amd64/vmm/vmm_instruction_emul.c
573
error = vie_update_register(vcpu, reg, val, size);
sys/amd64/vmm/vmm_instruction_emul.c
583
error = vie_read_register(vcpu, VM_REG_GUEST_RAX, &val);
sys/amd64/vmm/vmm_instruction_emul.c
585
val &= size2mask[size];
sys/amd64/vmm/vmm_instruction_emul.c
586
error = memwrite(vcpu, gpa, val, size, arg);
sys/amd64/vmm/vmm_instruction_emul.c
605
val = vie->immediate & size2mask[size];
sys/amd64/vmm/vmm_instruction_emul.c
606
error = memwrite(vcpu, gpa, val, size, arg);
sys/amd64/vmm/vmm_instruction_emul.c
621
uint64_t val;
sys/amd64/vmm/vmm_instruction_emul.c
638
error = memread(vcpu, gpa, &val, 1, arg);
sys/amd64/vmm/vmm_instruction_emul.c
646
val = (uint8_t)val;
sys/amd64/vmm/vmm_instruction_emul.c
649
error = vie_update_register(vcpu, reg, val, size);
sys/amd64/vmm/vmm_instruction_emul.c
659
error = memread(vcpu, gpa, &val, 2, arg);
sys/amd64/vmm/vmm_instruction_emul.c
666
val = (uint16_t)val;
sys/amd64/vmm/vmm_instruction_emul.c
668
error = vie_update_register(vcpu, reg, val, size);
sys/amd64/vmm/vmm_instruction_emul.c
681
error = memread(vcpu, gpa, &val, 1, arg);
sys/amd64/vmm/vmm_instruction_emul.c
689
val = (int8_t)val;
sys/amd64/vmm/vmm_instruction_emul.c
692
error = vie_update_register(vcpu, reg, val, size);
sys/amd64/vmm/vmm_instruction_emul.c
709
uint64_t cr0, val, rflags;
sys/amd64/vmm/vmm_instruction_emul.c
722
error = vie_read_register(vcpu, gpr, &val);
sys/amd64/vmm/vmm_instruction_emul.c
726
if (vie_calculate_gla(paging->cpu_mode, seg, &desc, val, opsize,
sys/amd64/vmm/vmm_instruction_emul.c
766
uint64_t dstaddr, srcaddr, dstgpa, srcgpa, val;
sys/amd64/vmm/vmm_instruction_emul.c
771
val = 0;
sys/amd64/vmm/vmm_instruction_emul.c
828
vm_copyin(copyinfo, &val, opsize);
sys/amd64/vmm/vmm_instruction_emul.c
830
error = memwrite(vcpu, gpa, val, opsize, arg);
sys/amd64/vmm/vmm_instruction_emul.c
860
error = memread(vcpu, gpa, &val, opsize, arg);
sys/amd64/vmm/vmm_instruction_emul.c
864
vm_copyout(&val, copyinfo, opsize);
sys/amd64/vmm/vmm_instruction_emul.c
885
error = memread(vcpu, srcgpa, &val, opsize, arg);
sys/amd64/vmm/vmm_instruction_emul.c
889
error = memwrite(vcpu, dstgpa, val, opsize, arg);
sys/amd64/vmm/vmm_instruction_emul.c
944
uint64_t val;
sys/amd64/vmm/vmm_instruction_emul.c
962
error = vie_read_register(vcpu, VM_REG_GUEST_RAX, &val);
sys/amd64/vmm/vmm_instruction_emul.c
965
error = memwrite(vcpu, gpa, val, opsize, arg);
sys/amd64/vmm/vmm_ioport.c
105
uint32_t mask, val = 0;
sys/amd64/vmm/vmm_ioport.c
120
val = vmexit->u.inout.eax & mask;
sys/amd64/vmm/vmm_ioport.c
124
vmexit->u.inout.port, vmexit->u.inout.bytes, &val);
sys/amd64/vmm/vmm_ioport.c
138
vmexit->u.inout.eax |= val & mask;
sys/amd64/vmm/vmm_ioport.h
33
bool in, int port, int bytes, uint32_t *val);
sys/amd64/vmm/vmm_lapic.c
177
lapic_wrmsr(struct vcpu *vcpu, u_int msr, uint64_t val, bool *retu)
sys/amd64/vmm/vmm_lapic.c
186
error = vlapic_set_apicbase(vlapic, val);
sys/amd64/vmm/vmm_lapic.c
189
error = vlapic_write(vlapic, 0, offset, val, retu);
sys/amd64/vmm/x86.c
685
vm_rdmtrr(struct vm_mtrr *mtrr, u_int num, uint64_t *val)
sys/amd64/vmm/x86.c
689
*val = MTRR_CAP_WC | MTRR_CAP_FIXED | VMM_MTRR_VAR_MAX;
sys/amd64/vmm/x86.c
692
*val = mtrr->def_type;
sys/amd64/vmm/x86.c
695
*val = mtrr->fixed4k[num - MSR_MTRR4kBase];
sys/amd64/vmm/x86.c
698
*val = mtrr->fixed16k[num - MSR_MTRR16kBase];
sys/amd64/vmm/x86.c
701
*val = mtrr->fixed64k;
sys/amd64/vmm/x86.c
706
*val = mtrr->var[offset / 2].base;
sys/amd64/vmm/x86.c
708
*val = mtrr->var[offset / 2].mask;
sys/amd64/vmm/x86.c
720
vm_wrmtrr(struct vm_mtrr *mtrr, u_int num, uint64_t val)
sys/amd64/vmm/x86.c
727
if (val & ~VMM_MTRR_DEF_MASK) {
sys/amd64/vmm/x86.c
731
mtrr->def_type = val;
sys/amd64/vmm/x86.c
734
mtrr->fixed4k[num - MSR_MTRR4kBase] = val;
sys/amd64/vmm/x86.c
737
mtrr->fixed16k[num - MSR_MTRR16kBase] = val;
sys/amd64/vmm/x86.c
740
mtrr->fixed64k = val;
sys/amd64/vmm/x86.c
745
if (val & ~VMM_MTRR_PHYSBASE_MASK) {
sys/amd64/vmm/x86.c
749
mtrr->var[offset / 2].base = val;
sys/amd64/vmm/x86.c
751
if (val & ~VMM_MTRR_PHYSMASK_MASK) {
sys/amd64/vmm/x86.c
755
mtrr->var[offset / 2].mask = val;
sys/amd64/vmm/x86.h
100
int vm_rdmtrr(struct vm_mtrr *mtrr, u_int num, uint64_t *val);
sys/amd64/vmm/x86.h
101
int vm_wrmtrr(struct vm_mtrr *mtrr, u_int num, uint64_t val);
sys/arm/allwinner/a10/a10_intc.c
110
#define aintc_write_4(sc, reg, val) \
sys/arm/allwinner/a10/a10_intc.c
111
bus_space_write_4(sc->aintc_bst, sc->aintc_bsh, reg, val)
sys/arm/allwinner/a10_ahci.c
129
uint32_t val = ATA_INL(m, off);
sys/arm/allwinner/a10_ahci.c
131
val |= set;
sys/arm/allwinner/a10_ahci.c
132
ATA_OUTL(m, off, val);
sys/arm/allwinner/a10_ahci.c
138
uint32_t val = ATA_INL(m, off);
sys/arm/allwinner/a10_ahci.c
140
val &= ~clr;
sys/arm/allwinner/a10_ahci.c
141
ATA_OUTL(m, off, val);
sys/arm/allwinner/a10_ahci.c
147
uint32_t val = ATA_INL(m, off);
sys/arm/allwinner/a10_ahci.c
149
val &= mask;
sys/arm/allwinner/a10_ahci.c
150
val |= set;
sys/arm/allwinner/a10_ahci.c
151
ATA_OUTL(m, off, val);
sys/arm/allwinner/a10_ahci.c
161
uint32_t to, val;
sys/arm/allwinner/a10_ahci.c
231
val = ATA_INL(ctlr->r_mem, AHCI_PHYCS0R);
sys/arm/allwinner/a10_ahci.c
232
if ((val & PHYCS0R_POWER_STATUS_MASK) == PHYCS0R_PS_GOOD)
sys/arm/allwinner/a10_ahci.c
237
device_printf(dev, "PHY Power Failed PHYCS0R = %#x\n", val);
sys/arm/allwinner/a10_ahci.c
245
val = ATA_INL(ctlr->r_mem, AHCI_PHYCS2R);
sys/arm/allwinner/a10_ahci.c
246
if ((val & PHYCS2R_CALIBRATE) == 0)
sys/arm/allwinner/a10_ahci.c
251
device_printf(dev, "PHY Cal Failed PHYCS2R %#x\n", val);
sys/arm/allwinner/a10_codec.c
1070
uint32_t val;
sys/arm/allwinner/a10_codec.c
1149
val = CODEC_READ(sc, AC_DAC_DPC(sc));
sys/arm/allwinner/a10_codec.c
1150
val |= DAC_DPC_EN_DA;
sys/arm/allwinner/a10_codec.c
1151
CODEC_WRITE(sc, AC_DAC_DPC(sc), val);
sys/arm/allwinner/a10_codec.c
179
#define CODEC_ANALOG_WRITE(sc, reg, val) bus_write_4((sc)->res[1], (reg), (val))
sys/arm/allwinner/a10_codec.c
182
#define CODEC_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/arm/allwinner/a10_codec.c
224
uint32_t val;
sys/arm/allwinner/a10_codec.c
230
val = CODEC_READ(sc, A10_DAC_ACTL);
sys/arm/allwinner/a10_codec.c
231
val |= A10_PAMUTE;
sys/arm/allwinner/a10_codec.c
232
CODEC_WRITE(sc, A10_DAC_ACTL, val);
sys/arm/allwinner/a10_codec.c
235
val = CODEC_READ(sc, A10_ADC_ACTL);
sys/arm/allwinner/a10_codec.c
236
val |= A10_PA_EN;
sys/arm/allwinner/a10_codec.c
237
CODEC_WRITE(sc, A10_ADC_ACTL, val);
sys/arm/allwinner/a10_codec.c
260
uint32_t val;
sys/arm/allwinner/a10_codec.c
266
val = CODEC_READ(sc, a10_mixers[dev].reg);
sys/arm/allwinner/a10_codec.c
267
val &= ~a10_mixers[dev].mask;
sys/arm/allwinner/a10_codec.c
268
val |= (nvol << a10_mixers[dev].shift);
sys/arm/allwinner/a10_codec.c
269
CODEC_WRITE(sc, a10_mixers[dev].reg, val);
sys/arm/allwinner/a10_codec.c
279
uint32_t val;
sys/arm/allwinner/a10_codec.c
281
val = CODEC_READ(sc, A10_ADC_ACTL);
sys/arm/allwinner/a10_codec.c
285
val &= ~A10_ADCIS_MASK;
sys/arm/allwinner/a10_codec.c
286
val |= (A10_ADC_IS_LINEIN << A10_ADCIS_SHIFT);
sys/arm/allwinner/a10_codec.c
289
val &= ~A10_ADCIS_MASK;
sys/arm/allwinner/a10_codec.c
290
val |= (A10_ADC_IS_MIC1 << A10_ADCIS_SHIFT);
sys/arm/allwinner/a10_codec.c
293
val &= ~A10_ADCIS_MASK;
sys/arm/allwinner/a10_codec.c
294
val |= (A10_ADC_IS_MIC2 << A10_ADCIS_SHIFT);
sys/arm/allwinner/a10_codec.c
300
CODEC_WRITE(sc, A10_ADC_ACTL, val);
sys/arm/allwinner/a10_codec.c
302
switch ((val & A10_ADCIS_MASK) >> A10_ADCIS_SHIFT) {
sys/arm/allwinner/a10_codec.c
317
uint32_t val;
sys/arm/allwinner/a10_codec.c
320
val = CODEC_READ(sc, A10_DAC_ACTL);
sys/arm/allwinner/a10_codec.c
323
val &= ~A10_DACAREN;
sys/arm/allwinner/a10_codec.c
324
val &= ~A10_DACALEN;
sys/arm/allwinner/a10_codec.c
325
val &= ~A10_DACPAS;
sys/arm/allwinner/a10_codec.c
328
val |= A10_DACAREN;
sys/arm/allwinner/a10_codec.c
329
val |= A10_DACALEN;
sys/arm/allwinner/a10_codec.c
330
val |= A10_DACPAS;
sys/arm/allwinner/a10_codec.c
332
CODEC_WRITE(sc, A10_DAC_ACTL, val);
sys/arm/allwinner/a10_codec.c
334
val = CODEC_READ(sc, A10_ADC_ACTL);
sys/arm/allwinner/a10_codec.c
339
val &= ~A10_ADCREN;
sys/arm/allwinner/a10_codec.c
340
val &= ~A10_ADCLEN;
sys/arm/allwinner/a10_codec.c
341
val &= ~A10_PREG1EN;
sys/arm/allwinner/a10_codec.c
342
val &= ~A10_VMICEN;
sys/arm/allwinner/a10_codec.c
347
val |= A10_ADCREN;
sys/arm/allwinner/a10_codec.c
348
val |= A10_ADCLEN;
sys/arm/allwinner/a10_codec.c
349
val |= A10_PREG1EN;
sys/arm/allwinner/a10_codec.c
350
val |= A10_VMICEN;
sys/arm/allwinner/a10_codec.c
352
CODEC_WRITE(sc, A10_ADC_ACTL, val);
sys/arm/allwinner/a10_codec.c
418
uint32_t val;
sys/arm/allwinner/a10_codec.c
421
val = CODEC_ANALOG_READ(sc, H3_PR_CFG);
sys/arm/allwinner/a10_codec.c
424
val |= H3_AC_PR_RST;
sys/arm/allwinner/a10_codec.c
425
CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
sys/arm/allwinner/a10_codec.c
428
val &= ~H3_AC_PR_RW;
sys/arm/allwinner/a10_codec.c
429
CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
sys/arm/allwinner/a10_codec.c
432
val &= ~H3_AC_PR_ADDR_MASK;
sys/arm/allwinner/a10_codec.c
433
val |= (addr << H3_AC_PR_ADDR_SHIFT);
sys/arm/allwinner/a10_codec.c
434
CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
sys/arm/allwinner/a10_codec.c
443
uint32_t val;
sys/arm/allwinner/a10_codec.c
446
val = CODEC_ANALOG_READ(sc, H3_PR_CFG);
sys/arm/allwinner/a10_codec.c
449
val |= H3_AC_PR_RST;
sys/arm/allwinner/a10_codec.c
450
CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
sys/arm/allwinner/a10_codec.c
453
val &= ~H3_AC_PR_ADDR_MASK;
sys/arm/allwinner/a10_codec.c
454
val |= (addr << H3_AC_PR_ADDR_SHIFT);
sys/arm/allwinner/a10_codec.c
455
CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
sys/arm/allwinner/a10_codec.c
458
val &= ~H3_ACDA_PR_WDAT_MASK;
sys/arm/allwinner/a10_codec.c
459
val |= (data << H3_ACDA_PR_WDAT_SHIFT);
sys/arm/allwinner/a10_codec.c
460
CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
sys/arm/allwinner/a10_codec.c
463
val |= H3_AC_PR_RW;
sys/arm/allwinner/a10_codec.c
464
CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
sys/arm/allwinner/a10_codec.c
555
uint32_t val;
sys/arm/allwinner/a10_codec.c
557
val = 0;
sys/arm/allwinner/a10_codec.c
562
val |= H3_ADCMIXSC_LINEIN;
sys/arm/allwinner/a10_codec.c
564
val |= H3_ADCMIXSC_MIC1;
sys/arm/allwinner/a10_codec.c
566
val |= H3_ADCMIXSC_MIC2;
sys/arm/allwinner/a10_codec.c
568
val |= H3_ADCMIXSC_OMIXER;
sys/arm/allwinner/a10_codec.c
570
h3_pr_write(sc, H3_LADCMIXSC, val);
sys/arm/allwinner/a10_codec.c
571
h3_pr_write(sc, H3_RADCMIXSC, val);
sys/arm/allwinner/a10_codec.c
724
uint32_t val;
sys/arm/allwinner/a10_codec.c
751
val = CODEC_READ(sc, AC_DAC_FIFOC(sc));
sys/arm/allwinner/a10_codec.c
752
val |= DAC_FIFOC_DRQ_EN;
sys/arm/allwinner/a10_codec.c
753
CODEC_WRITE(sc, AC_DAC_FIFOC(sc), val);
sys/arm/allwinner/a10_codec.c
777
val = CODEC_READ(sc, AC_ADC_FIFOC(sc));
sys/arm/allwinner/a10_codec.c
778
val |= ADC_FIFOC_DRQ_EN;
sys/arm/allwinner/a10_codec.c
779
CODEC_WRITE(sc, AC_ADC_FIFOC(sc), val);
sys/arm/allwinner/a10_dmac.c
221
a10dmac_write_ctl(struct a10dmac_channel *ch, uint32_t val)
sys/arm/allwinner/a10_dmac.c
224
DMACH_WRITE(ch, AWIN_NDMA_CTL_REG, val);
sys/arm/allwinner/a10_dmac.c
226
DMACH_WRITE(ch, AWIN_DDMA_CTL_REG, val);
sys/arm/allwinner/a10_dmac.c
234
uint32_t val;
sys/arm/allwinner/a10_dmac.c
291
val = (dst_dw << AWIN_DMA_CTL_DST_DATA_WIDTH_SHIFT) |
sys/arm/allwinner/a10_dmac.c
300
val |= AWIN_NDMA_CTL_DST_ADDR_NOINCR;
sys/arm/allwinner/a10_dmac.c
302
val |= AWIN_NDMA_CTL_SRC_ADDR_NOINCR;
sys/arm/allwinner/a10_dmac.c
304
DMACH_WRITE(ch, AWIN_NDMA_CTL_REG, val);
sys/arm/allwinner/a10_dmac.c
311
val |= (dst_am << AWIN_DDMA_CTL_DST_ADDR_MODE_SHIFT);
sys/arm/allwinner/a10_dmac.c
312
val |= (src_am << AWIN_DDMA_CTL_SRC_ADDR_MODE_SHIFT);
sys/arm/allwinner/a10_dmac.c
314
DMACH_WRITE(ch, AWIN_DDMA_CTL_REG, val);
sys/arm/allwinner/a10_dmac.c
87
#define DMA_WRITE(sc, reg, val) bus_write_4((sc)->sc_res[0], (reg), (val))
sys/arm/allwinner/a10_dmac.c
90
#define DMACH_WRITE(ch, reg, val) \
sys/arm/allwinner/a10_dmac.c
91
DMA_WRITE((ch)->ch_sc, (reg) + (ch)->ch_regoff, (val))
sys/arm/allwinner/a10_sramc.c
63
#define sramc_write_4(sc, reg, val) \
sys/arm/allwinner/a10_sramc.c
64
bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
sys/arm/allwinner/a20/a20_cpu_cfg.c
63
#define cpu_cfg_write_4(sc, reg, val) \
sys/arm/allwinner/a20/a20_cpu_cfg.c
64
bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
sys/arm/allwinner/a31_dmac.c
161
#define DMA_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/arm/allwinner/a33_codec.c
155
#define CODEC_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/arm/allwinner/a33_codec.c
179
uint32_t val;
sys/arm/allwinner/a33_codec.c
214
val = CODEC_READ(sc, SYSCLK_CTL);
sys/arm/allwinner/a33_codec.c
215
val |= AIF1CLK_ENA;
sys/arm/allwinner/a33_codec.c
216
val &= ~AIF1CLK_SRC_MASK;
sys/arm/allwinner/a33_codec.c
217
val |= AIF1CLK_SRC_PLL;
sys/arm/allwinner/a33_codec.c
218
val |= SYSCLK_ENA;
sys/arm/allwinner/a33_codec.c
219
val &= ~SYSCLK_SRC;
sys/arm/allwinner/a33_codec.c
220
CODEC_WRITE(sc, SYSCLK_CTL, val);
sys/arm/allwinner/a33_codec.c
229
val = CODEC_READ(sc, SYS_SR_CTRL);
sys/arm/allwinner/a33_codec.c
230
val &= ~AIF1_FS_MASK;
sys/arm/allwinner/a33_codec.c
231
val |= AIF_FS_48KHZ;
sys/arm/allwinner/a33_codec.c
232
CODEC_WRITE(sc, SYS_SR_CTRL, val);
sys/arm/allwinner/a33_codec.c
235
val = CODEC_READ(sc, AIF1CLK_CTRL);
sys/arm/allwinner/a33_codec.c
236
val &= ~AIF1_WORD_SIZ_MASK;
sys/arm/allwinner/a33_codec.c
237
val |= AIF1_WORD_SIZ_16;
sys/arm/allwinner/a33_codec.c
238
CODEC_WRITE(sc, AIF1CLK_CTRL, val);
sys/arm/allwinner/a33_codec.c
241
val = CODEC_READ(sc, AIF1_DACDAT_CTRL);
sys/arm/allwinner/a33_codec.c
242
val |= AIF1_DAC0L_ENA;
sys/arm/allwinner/a33_codec.c
243
val |= AIF1_DAC0R_ENA;
sys/arm/allwinner/a33_codec.c
244
CODEC_WRITE(sc, AIF1_DACDAT_CTRL, val);
sys/arm/allwinner/a33_codec.c
247
val = CODEC_READ(sc, AIF1_ADCDAT_CTRL);
sys/arm/allwinner/a33_codec.c
248
val |= AIF1_ADC0L_ENA;
sys/arm/allwinner/a33_codec.c
249
val |= AIF1_ADC0R_ENA;
sys/arm/allwinner/a33_codec.c
250
CODEC_WRITE(sc, AIF1_ADCDAT_CTRL, val);
sys/arm/allwinner/a33_codec.c
253
val = CODEC_READ(sc, DAC_MXR_SRC);
sys/arm/allwinner/a33_codec.c
254
val &= ~DACL_MXR_SRC_MASK;
sys/arm/allwinner/a33_codec.c
255
val |= DACL_MXR_SRC_AIF1_DAC0L;
sys/arm/allwinner/a33_codec.c
256
val &= ~DACR_MXR_SRC_MASK;
sys/arm/allwinner/a33_codec.c
257
val |= DACR_MXR_SRC_AIF1_DAC0R;
sys/arm/allwinner/a33_codec.c
258
CODEC_WRITE(sc, DAC_MXR_SRC, val);
sys/arm/allwinner/a33_codec.c
261
val = CODEC_READ(sc, AIF1_MXR_SRC);
sys/arm/allwinner/a33_codec.c
262
val &= ~AIF1L_MXR_SRC_MASK;
sys/arm/allwinner/a33_codec.c
263
val |= AIF1L_MXR_SRC_ADC;
sys/arm/allwinner/a33_codec.c
264
val &= ~AIF1R_MXR_SRC_MASK;
sys/arm/allwinner/a33_codec.c
265
val |= AIF1R_MXR_SRC_ADC;
sys/arm/allwinner/a33_codec.c
266
CODEC_WRITE(sc, AIF1_MXR_SRC, val);
sys/arm/allwinner/a33_codec.c
313
uint32_t val;
sys/arm/allwinner/a33_codec.c
321
val = CODEC_READ(sc, AIF1CLK_CTRL);
sys/arm/allwinner/a33_codec.c
323
val &= ~AIF1_DATA_FMT_MASK;
sys/arm/allwinner/a33_codec.c
326
val |= AIF1_DATA_FMT_I2S;
sys/arm/allwinner/a33_codec.c
329
val |= AIF1_DATA_FMT_RJ;
sys/arm/allwinner/a33_codec.c
332
val |= AIF1_DATA_FMT_LJ;
sys/arm/allwinner/a33_codec.c
336
val |= AIF1_DATA_FMT_DSP;
sys/arm/allwinner/a33_codec.c
342
val &= ~(AIF1_BCLK_INV|AIF1_LRCK_INV);
sys/arm/allwinner/a33_codec.c
345
val |= AIF1_LRCK_INV;
sys/arm/allwinner/a33_codec.c
347
val |= AIF1_BCLK_INV;
sys/arm/allwinner/a33_codec.c
351
val &= ~AIF1_MSTR_MOD; /* codec is master */
sys/arm/allwinner/a33_codec.c
354
val |= AIF1_MSTR_MOD; /* codec is slave */
sys/arm/allwinner/a33_codec.c
360
val &= ~AIF1_LRCK_DIV_MASK;
sys/arm/allwinner/a33_codec.c
361
val |= AIF1_LRCK_DIV_64;
sys/arm/allwinner/a33_codec.c
363
val &= ~AIF1_BCLK_DIV_MASK;
sys/arm/allwinner/a33_codec.c
364
val |= AIF1_BCLK_DIV_16;
sys/arm/allwinner/a33_codec.c
366
CODEC_WRITE(sc, AIF1CLK_CTRL, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
134
#define A64CODEC_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/arm/allwinner/a64/sun50i_a64_acodec.c
143
uint32_t val;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
146
val = A64CODEC_READ(sc, A64_PR_CFG);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
149
val |= A64_AC_PR_RST;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
150
A64CODEC_WRITE(sc, A64_PR_CFG, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
153
val &= ~A64_AC_PR_RW;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
154
A64CODEC_WRITE(sc, A64_PR_CFG, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
157
val &= ~A64_AC_PR_ADDR_MASK;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
158
val |= A64_AC_PR_ADDR(addr);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
159
A64CODEC_WRITE(sc, A64_PR_CFG, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
162
val = A64CODEC_READ(sc, A64_PR_CFG);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
163
return A64_ACDA_PR_RDAT(val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
169
uint32_t val;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
172
val = A64CODEC_READ(sc, A64_PR_CFG);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
175
val |= A64_AC_PR_RST;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
176
A64CODEC_WRITE(sc, A64_PR_CFG, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
179
val &= ~A64_AC_PR_ADDR_MASK;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
180
val |= A64_AC_PR_ADDR(addr);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
181
A64CODEC_WRITE(sc, A64_PR_CFG, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
184
val &= ~A64_ACDA_PR_WDAT_MASK;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
185
val |= A64_ACDA_PR_WDAT(data);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
186
A64CODEC_WRITE(sc, A64_PR_CFG, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
189
val |= A64_AC_PR_RW;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
190
A64CODEC_WRITE(sc, A64_PR_CFG, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
193
val &= ~A64_AC_PR_RW;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
194
A64CODEC_WRITE(sc, A64_PR_CFG, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
269
u_int val = a64_acodec_pr_read(sc, A64_HP_CTRL);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
270
val &= ~(0x3f);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
271
val |= 0x25;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
272
a64_acodec_pr_write(sc, A64_HP_CTRL, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
284
val = a64_acodec_pr_read(sc, A64_MIC2_CTRL);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
285
val &= ~(0x7);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
286
val |= (0x7);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
287
val &= ~(7 << 4);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
288
val |= (7 << 4);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
289
a64_acodec_pr_write(sc, A64_MIC2_CTRL, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
344
u_int val;
sys/arm/allwinner/a64/sun50i_a64_acodec.c
361
val = a64_acodec_pr_read(sc, A64_HP_CTRL);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
362
val &= ~(A64_HPVOL_MASK);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
363
val |= A64_HPVOL(left * 63 / 100);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
364
a64_acodec_pr_write(sc, A64_HP_CTRL, val);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
368
val = a64_acodec_pr_read(sc, A64_MIC2_CTRL);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
369
val &= ~(A64_MIC2BOOST_MASK);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
370
val |= A64_MIC2BOOST(left * 7 / 100);
sys/arm/allwinner/a64/sun50i_a64_acodec.c
371
a64_acodec_pr_write(sc, A64_MIC2_CTRL, val);
sys/arm/allwinner/aw_cir.c
213
unsigned char val, last;
sys/arm/allwinner/aw_cir.c
226
val = sc->buf[i];
sys/arm/allwinner/aw_cir.c
227
if (val & VAL_MASK)
sys/arm/allwinner/aw_cir.c
228
len += (val & PERIOD_MASK) + 1;
sys/arm/allwinner/aw_cir.c
237
if ((val & VAL_MASK) || (len <= AW_IR_L1_MIN)) {
sys/arm/allwinner/aw_cir.c
246
val = sc->buf[i];
sys/arm/allwinner/aw_cir.c
247
if (val & VAL_MASK) {
sys/arm/allwinner/aw_cir.c
252
len += (val & PERIOD_MASK) + 1;
sys/arm/allwinner/aw_cir.c
254
if ((!(val & VAL_MASK)) || (len <= AW_IR_L0_MIN)) {
sys/arm/allwinner/aw_cir.c
266
val = sc->buf[i];
sys/arm/allwinner/aw_cir.c
268
if (val & VAL_MASK)
sys/arm/allwinner/aw_cir.c
269
len += (val & PERIOD_MASK) + 1;
sys/arm/allwinner/aw_cir.c
279
len = (val & PERIOD_MASK) + 1;
sys/arm/allwinner/aw_cir.c
282
if (val & VAL_MASK) {
sys/arm/allwinner/aw_cir.c
299
len = (val & PERIOD_MASK) + 1;
sys/arm/allwinner/aw_cir.c
301
len += (val & PERIOD_MASK) + 1;
sys/arm/allwinner/aw_cir.c
330
uint32_t val;
sys/arm/allwinner/aw_cir.c
338
val = READ(sc, AW_IR_RXSTA);
sys/arm/allwinner/aw_cir.c
340
device_printf(sc->dev, "RX interrupt status: %x\n", val);
sys/arm/allwinner/aw_cir.c
343
WRITE(sc, AW_IR_RXSTA, val | AW_IR_RXSTA_CLEARALL);
sys/arm/allwinner/aw_cir.c
346
if (val & (AW_IR_RXINT_RAI_EN | AW_IR_RXINT_RPEI_EN)) {
sys/arm/allwinner/aw_cir.c
351
dcnt = AW_IR_RXSTA_COUNTER(val);
sys/arm/allwinner/aw_cir.c
364
if (val & AW_IR_RXINT_RPEI_EN) {
sys/arm/allwinner/aw_cir.c
383
if (val & AW_IR_RXINT_ROI_EN) {
sys/arm/allwinner/aw_cir.c
413
uint32_t val = 0;
sys/arm/allwinner/aw_cir.c
494
val = AW_IR_SAMPLE_128;
sys/arm/allwinner/aw_cir.c
495
val |= (AW_IR_RXFILT_VAL | AW_IR_RXIDLE_VAL);
sys/arm/allwinner/aw_cir.c
496
val |= (AW_IR_ACTIVE_T | AW_IR_ACTIVE_T_C);
sys/arm/allwinner/aw_cir.c
497
WRITE(sc, AW_IR_CIR, val);
sys/arm/allwinner/aw_cir.c
514
val = READ(sc, AW_IR_CTL);
sys/arm/allwinner/aw_cir.c
515
WRITE(sc, AW_IR_CTL, val | AW_IR_CTL_GEN | AW_IR_CTL_RXEN);
sys/arm/allwinner/aw_cir.c
78
#define AW_IR_RXINT_RAL(val) ((val) << 8)
sys/arm/allwinner/aw_cir.c
83
#define AW_IR_RXSTA_COUNTER(val) (((val) >> 8) & (sc->fifo_size * 2 - 1))
sys/arm/allwinner/aw_gmacclk.c
101
GMACCLK_READ(sc, &val);
sys/arm/allwinner/aw_gmacclk.c
104
switch ((val & GMAC_CLK_SRC) >> GMAC_CLK_SRC_SHIFT) {
sys/arm/allwinner/aw_gmacclk.c
123
uint32_t val, clk_src, pit;
sys/arm/allwinner/aw_gmacclk.c
141
GMACCLK_READ(sc, &val);
sys/arm/allwinner/aw_gmacclk.c
142
val &= ~(GMAC_CLK_SRC | GMAC_CLK_PIT);
sys/arm/allwinner/aw_gmacclk.c
143
val |= (clk_src << GMAC_CLK_SRC_SHIFT);
sys/arm/allwinner/aw_gmacclk.c
144
val |= (pit << GMAC_CLK_PIT_SHIFT);
sys/arm/allwinner/aw_gmacclk.c
145
GMACCLK_WRITE(sc, val);
sys/arm/allwinner/aw_gmacclk.c
87
#define GMACCLK_READ(sc, val) CLKDEV_READ_4((sc)->clkdev, (sc)->reg, (val))
sys/arm/allwinner/aw_gmacclk.c
88
#define GMACCLK_WRITE(sc, val) CLKDEV_WRITE_4((sc)->clkdev, (sc)->reg, (val))
sys/arm/allwinner/aw_gmacclk.c
96
uint32_t val, index;
sys/arm/allwinner/aw_gpio.c
481
uint32_t bank, offset, val;
sys/arm/allwinner/aw_gpio.c
490
val = AW_GPIO_READ(sc, AW_GPIO_GP_PUL(sc, bank, pin >> 4));
sys/arm/allwinner/aw_gpio.c
492
return ((val >> offset) & AW_GPIO_PUD_MASK);
sys/arm/allwinner/aw_gpio.c
498
uint32_t bank, offset, val;
sys/arm/allwinner/aw_gpio.c
510
val = AW_GPIO_READ(sc, AW_GPIO_GP_PUL(sc, bank, pin >> 4));
sys/arm/allwinner/aw_gpio.c
511
val &= ~(AW_GPIO_PUD_MASK << offset);
sys/arm/allwinner/aw_gpio.c
512
val |= (state << offset);
sys/arm/allwinner/aw_gpio.c
513
AW_GPIO_WRITE(sc, AW_GPIO_GP_PUL(sc, bank, pin >> 4), val);
sys/arm/allwinner/aw_gpio.c
519
uint32_t bank, idx, offset, val;
sys/arm/allwinner/aw_gpio.c
529
val = AW_GPIO_READ(sc, AW_GPIO_GP_DRV(sc, bank, idx));
sys/arm/allwinner/aw_gpio.c
531
return ((val >> offset) & AW_GPIO_DRV_MASK);
sys/arm/allwinner/aw_gpio.c
537
uint32_t bank, idx, offset, val;
sys/arm/allwinner/aw_gpio.c
550
val = AW_GPIO_READ(sc, AW_GPIO_GP_DRV(sc, bank, idx));
sys/arm/allwinner/aw_gpio.c
551
val &= ~(AW_GPIO_DRV_MASK << offset);
sys/arm/allwinner/aw_gpio.c
552
val |= (drive << offset);
sys/arm/allwinner/aw_gpio.c
553
AW_GPIO_WRITE(sc, AW_GPIO_GP_DRV(sc, bank, idx), val);
sys/arm/allwinner/aw_gpio.c
559
u_int val;
sys/arm/allwinner/aw_gpio.c
581
aw_gpio_pin_get_locked(sc, pin, &val);
sys/arm/allwinner/aw_gpio.c
582
aw_gpio_pin_set_locked(sc, pin, val);
sys/arm/allwinner/aw_gpio.c
756
unsigned int *val)
sys/arm/allwinner/aw_gpio.c
778
*val = (reg_data & (1 << pin)) ? 1 : 0;
sys/arm/allwinner/aw_gpio.c
856
aw_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/allwinner/aw_gpio.c
864
ret = aw_gpio_pin_get_locked(sc, pin, val);
sys/arm/allwinner/aw_i2s.c
238
#define I2S_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/arm/allwinner/aw_i2s.c
267
uint32_t val;
sys/arm/allwinner/aw_i2s.c
277
val = I2S_READ(sc, DA_CTL);
sys/arm/allwinner/aw_i2s.c
278
val &= ~(DA_CTL_TXEN|DA_CTL_RXEN|DA_CTL_GEN);
sys/arm/allwinner/aw_i2s.c
279
I2S_WRITE(sc, DA_CTL, val);
sys/arm/allwinner/aw_i2s.c
281
val = I2S_READ(sc, DA_FCTL);
sys/arm/allwinner/aw_i2s.c
282
val &= ~(DA_FCTL_FTX|DA_FCTL_FRX);
sys/arm/allwinner/aw_i2s.c
283
val &= ~(DA_FCTL_TXTL_MASK);
sys/arm/allwinner/aw_i2s.c
284
val |= DA_FCTL_TXTL(FIFO_LEVEL);
sys/arm/allwinner/aw_i2s.c
285
I2S_WRITE(sc, DA_FCTL, val);
sys/arm/allwinner/aw_i2s.c
291
val = I2S_READ(sc, DA_CTL);
sys/arm/allwinner/aw_i2s.c
292
val |= DA_CTL_GEN;
sys/arm/allwinner/aw_i2s.c
293
I2S_WRITE(sc, DA_CTL, val);
sys/arm/allwinner/aw_i2s.c
294
val |= DA_CTL_SDO_EN;
sys/arm/allwinner/aw_i2s.c
295
I2S_WRITE(sc, DA_CTL, val);
sys/arm/allwinner/aw_i2s.c
299
val = I2S_READ(sc, sc->cfg->txchsel);
sys/arm/allwinner/aw_i2s.c
300
val &= ~DA_CHSEL_EN_MASK;
sys/arm/allwinner/aw_i2s.c
301
val |= DA_CHSEL_EN(3);
sys/arm/allwinner/aw_i2s.c
302
val &= ~DA_CHSEL_SEL_MASK;
sys/arm/allwinner/aw_i2s.c
303
val |= DA_CHSEL_SEL(1);
sys/arm/allwinner/aw_i2s.c
304
I2S_WRITE(sc, sc->cfg->txchsel, val);
sys/arm/allwinner/aw_i2s.c
306
val = I2S_READ(sc, sc->cfg->rxchsel);
sys/arm/allwinner/aw_i2s.c
307
val &= ~DA_CHSEL_EN_MASK;
sys/arm/allwinner/aw_i2s.c
308
val |= DA_CHSEL_EN(3);
sys/arm/allwinner/aw_i2s.c
309
val &= ~DA_CHSEL_SEL_MASK;
sys/arm/allwinner/aw_i2s.c
310
val |= DA_CHSEL_SEL(1);
sys/arm/allwinner/aw_i2s.c
311
I2S_WRITE(sc, sc->cfg->rxchsel, val);
sys/arm/allwinner/aw_i2s.c
314
val = I2S_READ(sc, DA_CHCFG);
sys/arm/allwinner/aw_i2s.c
315
val &= ~DA_CHCFG_TX_SLOT_NUM_MASK;
sys/arm/allwinner/aw_i2s.c
316
val |= DA_CHCFG_TX_SLOT_NUM(1);
sys/arm/allwinner/aw_i2s.c
317
val &= ~DA_CHCFG_RX_SLOT_NUM_MASK;
sys/arm/allwinner/aw_i2s.c
318
val |= DA_CHCFG_RX_SLOT_NUM(1);
sys/arm/allwinner/aw_i2s.c
319
I2S_WRITE(sc, DA_CHCFG, val);
sys/arm/allwinner/aw_i2s.c
515
uint32_t val, status;
sys/arm/allwinner/aw_i2s.c
530
val = I2S_READ(sc, DA_FSTA);
sys/arm/allwinner/aw_i2s.c
531
empty = DA_FSTA_TXE_CNT(val);
sys/arm/allwinner/aw_i2s.c
541
val = (samples[readyptr++ % size] << 16);
sys/arm/allwinner/aw_i2s.c
542
val |= (samples[readyptr++ % size] << 24);
sys/arm/allwinner/aw_i2s.c
544
I2S_WRITE(sc, DA_TXFIFO, val);
sys/arm/allwinner/aw_i2s.c
555
val = I2S_READ(sc, DA_FSTA);
sys/arm/allwinner/aw_i2s.c
556
available = DA_FSTA_RXA_CNT(val);
sys/arm/allwinner/aw_i2s.c
567
val = I2S_READ(sc, DA_RXFIFO);
sys/arm/allwinner/aw_i2s.c
568
samples[freeptr++ % size] = (val >> 16) & 0xff;
sys/arm/allwinner/aw_i2s.c
569
samples[freeptr++ % size] = (val >> 24) & 0xff;
sys/arm/allwinner/aw_i2s.c
592
uint32_t val;
sys/arm/allwinner/aw_i2s.c
601
val = I2S_READ(sc, DA_FCTL);
sys/arm/allwinner/aw_i2s.c
602
I2S_WRITE(sc, DA_FCTL, val | DA_FCTL_FTX);
sys/arm/allwinner/aw_i2s.c
603
I2S_WRITE(sc, DA_FCTL, val & ~DA_FCTL_FTX);
sys/arm/allwinner/aw_i2s.c
609
val = I2S_READ(sc, DA_CTL);
sys/arm/allwinner/aw_i2s.c
610
I2S_WRITE(sc, DA_CTL, val | DA_CTL_TXEN);
sys/arm/allwinner/aw_i2s.c
613
val = I2S_READ(sc, DA_INT);
sys/arm/allwinner/aw_i2s.c
614
I2S_WRITE(sc, DA_INT, val | DA_INT_TXEI_EN);
sys/arm/allwinner/aw_i2s.c
619
val = I2S_READ(sc, DA_FCTL);
sys/arm/allwinner/aw_i2s.c
620
I2S_WRITE(sc, DA_FCTL, val | DA_FCTL_FRX);
sys/arm/allwinner/aw_i2s.c
621
I2S_WRITE(sc, DA_FCTL, val & ~DA_FCTL_FRX);
sys/arm/allwinner/aw_i2s.c
627
val = I2S_READ(sc, DA_CTL);
sys/arm/allwinner/aw_i2s.c
628
I2S_WRITE(sc, DA_CTL, val | DA_CTL_RXEN);
sys/arm/allwinner/aw_i2s.c
631
val = I2S_READ(sc, DA_INT);
sys/arm/allwinner/aw_i2s.c
632
I2S_WRITE(sc, DA_INT, val | DA_INT_RXAI_EN);
sys/arm/allwinner/aw_i2s.c
643
val = I2S_READ(sc, DA_CTL);
sys/arm/allwinner/aw_i2s.c
644
I2S_WRITE(sc, DA_CTL, val & ~DA_CTL_TXEN);
sys/arm/allwinner/aw_i2s.c
647
val = I2S_READ(sc, DA_INT);
sys/arm/allwinner/aw_i2s.c
648
I2S_WRITE(sc, DA_INT, val & ~DA_INT_TXEI_EN);
sys/arm/allwinner/aw_i2s.c
653
val = I2S_READ(sc, DA_CTL);
sys/arm/allwinner/aw_i2s.c
654
I2S_WRITE(sc, DA_CTL, val & ~DA_CTL_RXEN);
sys/arm/allwinner/aw_i2s.c
657
val = I2S_READ(sc, DA_INT);
sys/arm/allwinner/aw_i2s.c
658
I2S_WRITE(sc, DA_INT, val & ~DA_INT_RXAI_EN);
sys/arm/allwinner/aw_i2s.c
715
uint32_t val;
sys/arm/allwinner/aw_i2s.c
754
val = I2S_READ(sc, DA_CLKD);
sys/arm/allwinner/aw_i2s.c
756
val |= DA_CLKD_MCLKO_EN_SUN4I;
sys/arm/allwinner/aw_i2s.c
757
val &= ~DA_CLKD_BCLKDIV_SUN4I_MASK;
sys/arm/allwinner/aw_i2s.c
758
val |= DA_CLKD_BCLKDIV_SUN4I(bclk_val);
sys/arm/allwinner/aw_i2s.c
760
val |= DA_CLKD_MCLKO_EN_SUN8I;
sys/arm/allwinner/aw_i2s.c
761
val &= ~DA_CLKD_BCLKDIV_SUN8I_MASK;
sys/arm/allwinner/aw_i2s.c
762
val |= DA_CLKD_BCLKDIV_SUN8I(bclk_val);
sys/arm/allwinner/aw_i2s.c
764
val &= ~DA_CLKD_MCLKDIV_MASK;
sys/arm/allwinner/aw_i2s.c
765
val |= DA_CLKD_MCLKDIV(mclk_val);
sys/arm/allwinner/aw_i2s.c
766
I2S_WRITE(sc, DA_CLKD, val);
sys/arm/allwinner/aw_mmc.c
668
uint32_t val;
sys/arm/allwinner/aw_mmc.c
692
val = AW_MMC_READ_4(sc, AW_MMC_GCTL);
sys/arm/allwinner/aw_mmc.c
693
val &= ~AW_MMC_GCTL_FIFO_AC_MOD;
sys/arm/allwinner/aw_mmc.c
694
val |= AW_MMC_GCTL_DMA_ENB;
sys/arm/allwinner/aw_mmc.c
695
AW_MMC_WRITE_4(sc, AW_MMC_GCTL, val);
sys/arm/allwinner/aw_mmc.c
698
val |= AW_MMC_GCTL_DMA_RST;
sys/arm/allwinner/aw_mmc.c
699
AW_MMC_WRITE_4(sc, AW_MMC_GCTL, val);
sys/arm/allwinner/aw_mmc.c
706
val = AW_MMC_READ_4(sc, AW_MMC_IDIE);
sys/arm/allwinner/aw_mmc.c
708
val |= AW_MMC_IDST_TX_INT;
sys/arm/allwinner/aw_mmc.c
710
val |= AW_MMC_IDST_RX_INT;
sys/arm/allwinner/aw_mmc.c
711
AW_MMC_WRITE_4(sc, AW_MMC_IDIE, val);
sys/arm/allwinner/aw_mmc.c
799
uint32_t val, mask;
sys/arm/allwinner/aw_mmc.c
814
val = AW_MMC_READ_4(sc, AW_MMC_GCTL);
sys/arm/allwinner/aw_mmc.c
815
AW_MMC_WRITE_4(sc, AW_MMC_GCTL, val | mask);
sys/arm/allwinner/aw_mp.c
112
uint32_t val;
sys/arm/allwinner/aw_mp.c
142
val = bus_space_read_4(fdtbus_bs_tag, cpucfg, CPUCFG_GENCTL);
sys/arm/allwinner/aw_mp.c
144
val &= ~(1 << i);
sys/arm/allwinner/aw_mp.c
145
bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_GENCTL, val);
sys/arm/allwinner/aw_mp.c
148
val = bus_space_read_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1);
sys/arm/allwinner/aw_mp.c
150
val &= ~(1 << i);
sys/arm/allwinner/aw_mp.c
151
bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1, val);
sys/arm/allwinner/aw_mp.c
168
val = bus_space_read_4(fdtbus_bs_tag, prcm, CPU_PWROFF);
sys/arm/allwinner/aw_mp.c
170
val &= ~(1 << i);
sys/arm/allwinner/aw_mp.c
171
bus_space_write_4(fdtbus_bs_tag, prcm, CPU_PWROFF, val);
sys/arm/allwinner/aw_mp.c
173
val = bus_space_read_4(fdtbus_bs_tag,
sys/arm/allwinner/aw_mp.c
175
val &= ~(1 << 0);
sys/arm/allwinner/aw_mp.c
177
A20_CPU1_PWROFF_REG, val);
sys/arm/allwinner/aw_mp.c
187
val = bus_space_read_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1);
sys/arm/allwinner/aw_mp.c
189
val |= (1 << i);
sys/arm/allwinner/aw_mp.c
190
bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1, val);
sys/arm/allwinner/aw_mp.c
203
uint32_t val;
sys/arm/allwinner/aw_mp.c
207
val = bus_space_read_4(fdtbus_bs_tag, cpuxcfg, CPUX_CL_RST(cluster));
sys/arm/allwinner/aw_mp.c
208
val &= ~(1 << cpu);
sys/arm/allwinner/aw_mp.c
209
bus_space_write_4(fdtbus_bs_tag, cpuxcfg, CPUX_CL_RST(cluster), val);
sys/arm/allwinner/aw_mp.c
212
val = bus_space_read_4(fdtbus_bs_tag, cpuscfg, CPUS_CL_RST(cluster));
sys/arm/allwinner/aw_mp.c
213
val &= ~(1 << cpu);
sys/arm/allwinner/aw_mp.c
214
bus_space_write_4(fdtbus_bs_tag, cpuscfg, CPUS_CL_RST(cluster), val);
sys/arm/allwinner/aw_mp.c
217
val = bus_space_read_4(fdtbus_bs_tag, cpuxcfg, CPUX_CL_CTRL0(cluster));
sys/arm/allwinner/aw_mp.c
218
val &= ~(1 << cpu);
sys/arm/allwinner/aw_mp.c
219
bus_space_write_4(fdtbus_bs_tag, cpuxcfg, CPUX_CL_CTRL0(cluster), val);
sys/arm/allwinner/aw_mp.c
230
val = bus_space_read_4(fdtbus_bs_tag, prcm, PRCM_CL_PWROFF(cluster));
sys/arm/allwinner/aw_mp.c
231
val &= ~(1 << cpu);
sys/arm/allwinner/aw_mp.c
232
bus_space_write_4(fdtbus_bs_tag, prcm, PRCM_CL_PWROFF(cluster), val);
sys/arm/allwinner/aw_mp.c
235
val = bus_space_read_4(fdtbus_bs_tag, cpuscfg, CPUS_CL_RST(cluster));
sys/arm/allwinner/aw_mp.c
236
val |= (1 << cpu);
sys/arm/allwinner/aw_mp.c
237
bus_space_write_4(fdtbus_bs_tag, cpuscfg, CPUS_CL_RST(cluster), val);
sys/arm/allwinner/aw_mp.c
240
val = bus_space_read_4(fdtbus_bs_tag, cpuxcfg, CPUX_CL_RST(cluster));
sys/arm/allwinner/aw_mp.c
241
val |= (1 << cpu);
sys/arm/allwinner/aw_mp.c
242
bus_space_write_4(fdtbus_bs_tag, cpuxcfg, CPUX_CL_RST(cluster), val);
sys/arm/allwinner/aw_reset.c
67
#define RESET_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/arm/allwinner/aw_rsb.c
153
#define RSB_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/arm/allwinner/aw_rsb.c
190
uint32_t val;
sys/arm/allwinner/aw_rsb.c
193
val = 0;
sys/arm/allwinner/aw_rsb.c
195
val |= ((uint32_t)buf[n] << ((n - off) * NBBY));
sys/arm/allwinner/aw_rsb.c
197
return val;
sys/arm/allwinner/aw_rsb.c
201
rsb_decode(const uint32_t val, uint8_t *buf, u_int len, u_int off)
sys/arm/allwinner/aw_rsb.c
206
buf[n] = (val >> ((n - off) * NBBY)) & 0xff;
sys/arm/allwinner/aw_rtc.c
210
uint32_t val;
sys/arm/allwinner/aw_rtc.c
220
val = RTC_READ(sc, LOSC_CTRL_REG);
sys/arm/allwinner/aw_rtc.c
221
val |= LOSC_AUTO_SW_EN;
sys/arm/allwinner/aw_rtc.c
222
val |= LOSC_MAGIC | LOSC_GSM | LOSC_OSC_SRC;
sys/arm/allwinner/aw_rtc.c
223
RTC_WRITE(sc, LOSC_CTRL_REG, val);
sys/arm/allwinner/aw_rtc.c
228
val = RTC_READ(sc, sc->conf->rtc_losc_sta);
sys/arm/allwinner/aw_rtc.c
229
if ((val & LOSC_OSC_SRC) == 0)
sys/arm/allwinner/aw_rtc.c
93
#define RTC_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/arm/allwinner/aw_sid.c
287
#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/arm/allwinner/aw_sid.c
342
uint32_t val;
sys/arm/allwinner/aw_sid.c
368
val = SID_PRCTL_OFFSET(sc->sid_conf->efuses[i].offset + j) |
sys/arm/allwinner/aw_sid.c
371
WR4(sc, SID_PRCTL, val);
sys/arm/allwinner/aw_sid.c
375
val = RD4(sc, SID_RDKEY);
sys/arm/allwinner/aw_sid.c
377
val = RD4(sc, sc->sid_conf->efuses[i].base +
sys/arm/allwinner/aw_sid.c
379
out[j] = val & 0xFF;
sys/arm/allwinner/aw_sid.c
381
out[j + 1] = (val & 0xFF00) >> 8;
sys/arm/allwinner/aw_sid.c
383
out[j + 2] = (val & 0xFF0000) >> 16;
sys/arm/allwinner/aw_sid.c
385
out[j + 3] = (val & 0xFF000000) >> 24;
sys/arm/allwinner/aw_thermal.c
173
a83t_to_temp(uint32_t val, int sensor)
sys/arm/allwinner/aw_thermal.c
175
return ((A83T_TEMP_BASE - (val * A83T_TEMP_MUL)) / A83T_TEMP_DIV);
sys/arm/allwinner/aw_thermal.c
205
a64_to_temp(uint32_t val, int sensor)
sys/arm/allwinner/aw_thermal.c
207
return ((A64_TEMP_BASE - (val * A64_TEMP_MUL)) / A64_TEMP_DIV);
sys/arm/allwinner/aw_thermal.c
237
h3_to_temp(uint32_t val, int sensor)
sys/arm/allwinner/aw_thermal.c
239
return (H3_TEMP_BASE - ((val * H3_TEMP_MUL) / H3_TEMP_DIV));
sys/arm/allwinner/aw_thermal.c
243
h3_to_reg(int val, int sensor)
sys/arm/allwinner/aw_thermal.c
245
return ((H3_TEMP_MINUS - (val * H3_TEMP_DIV)) / H3_TEMP_MUL);
sys/arm/allwinner/aw_thermal.c
269
h5_to_temp(uint32_t val, int sensor)
sys/arm/allwinner/aw_thermal.c
274
if (val > 0x500) {
sys/arm/allwinner/aw_thermal.c
275
tmp = H5_TEMP_BASE - (val * H5_TEMP_MUL);
sys/arm/allwinner/aw_thermal.c
281
tmp = H5_TEMP_BASE_CPU - (val * H5_TEMP_MUL_CPU);
sys/arm/allwinner/aw_thermal.c
283
tmp = H5_TEMP_BASE_GPU - (val * H5_TEMP_MUL_GPU);
sys/arm/allwinner/aw_thermal.c
286
return (val);
sys/arm/allwinner/aw_thermal.c
294
h5_to_reg(int val, int sensor)
sys/arm/allwinner/aw_thermal.c
298
if (val < 70) {
sys/arm/allwinner/aw_thermal.c
299
tmp = H5_TEMP_BASE - (val << H5_TEMP_DIV);
sys/arm/allwinner/aw_thermal.c
303
tmp = H5_TEMP_BASE_CPU - (val << H5_TEMP_DIV);
sys/arm/allwinner/aw_thermal.c
306
tmp = H5_TEMP_BASE_GPU - (val << H5_TEMP_DIV);
sys/arm/allwinner/aw_thermal.c
310
return (val);
sys/arm/allwinner/aw_thermal.c
375
#define WR4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/arm/allwinner/aw_thermal.c
430
uint32_t val;
sys/arm/allwinner/aw_thermal.c
432
val = RD4(sc, THS_DATA0 + (sensor * 4));
sys/arm/allwinner/aw_thermal.c
434
return (sc->conf->to_temp(val, sensor));
sys/arm/allwinner/aw_thermal.c
440
uint32_t val;
sys/arm/allwinner/aw_thermal.c
442
val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4));
sys/arm/allwinner/aw_thermal.c
443
val = (val >> SHUT_T_HOT_SHIFT) & SHUT_T_HOT_MASK;
sys/arm/allwinner/aw_thermal.c
445
return (sc->conf->to_temp(val, sensor));
sys/arm/allwinner/aw_thermal.c
451
uint32_t val;
sys/arm/allwinner/aw_thermal.c
453
val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4));
sys/arm/allwinner/aw_thermal.c
454
val &= ~(SHUT_T_HOT_MASK << SHUT_T_HOT_SHIFT);
sys/arm/allwinner/aw_thermal.c
455
val |= (sc->conf->to_reg(temp, sensor) << SHUT_T_HOT_SHIFT);
sys/arm/allwinner/aw_thermal.c
456
WR4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4), val);
sys/arm/allwinner/aw_thermal.c
462
uint32_t val;
sys/arm/allwinner/aw_thermal.c
464
val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));
sys/arm/allwinner/aw_thermal.c
465
val = (val >> ALARM_T_HYST_SHIFT) & ALARM_T_HYST_MASK;
sys/arm/allwinner/aw_thermal.c
467
return (sc->conf->to_temp(val, sensor));
sys/arm/allwinner/aw_thermal.c
473
uint32_t val;
sys/arm/allwinner/aw_thermal.c
475
val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));
sys/arm/allwinner/aw_thermal.c
476
val = (val >> ALARM_T_HOT_SHIFT) & ALARM_T_HOT_MASK;
sys/arm/allwinner/aw_thermal.c
478
return (sc->conf->to_temp(val, sensor));
sys/arm/allwinner/aw_thermal.c
484
uint32_t val;
sys/arm/allwinner/aw_thermal.c
486
val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));
sys/arm/allwinner/aw_thermal.c
487
val &= ~(ALARM_T_HOT_MASK << ALARM_T_HOT_SHIFT);
sys/arm/allwinner/aw_thermal.c
488
val |= (sc->conf->to_reg(temp, sensor) << ALARM_T_HOT_SHIFT);
sys/arm/allwinner/aw_thermal.c
489
WR4(sc, THS_ALARM0_CTRL + (sensor * 4), val);
sys/arm/allwinner/aw_thermal.c
496
int sensor, val;
sys/arm/allwinner/aw_thermal.c
501
val = aw_thermal_gettemp(sc, sensor) + TEMP_C_TO_K;
sys/arm/allwinner/aw_thermal.c
503
return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
sys/arm/allwinner/aw_timer.c
106
#define timer_write_4(sc, reg, val) \
sys/arm/allwinner/aw_timer.c
107
bus_write_4(sc->res[AW_TIMER_MEMRES], reg, val)
sys/arm/allwinner/aw_timer.c
261
uint32_t val;
sys/arm/allwinner/aw_timer.c
268
val = timer_read_4(sc, TIMER_CTRL_REG(0));
sys/arm/allwinner/aw_timer.c
276
if ((val & (1<<1)) == 0 && sc->sc_period > 0) {
sys/arm/allwinner/aw_timer.c
281
val |= TIMER_CTRL_AUTORELOAD | TIMER_CTRL_START;
sys/arm/allwinner/aw_timer.c
282
timer_write_4(sc, TIMER_CTRL_REG(0), val);
sys/arm/allwinner/aw_timer.c
298
uint32_t val;
sys/arm/allwinner/aw_timer.c
301
val = timer_read_4(sc, TIMER_CTRL_REG(0));
sys/arm/allwinner/aw_timer.c
302
val &= ~TIMER_CTRL_PRESCALAR_MASK | ~TIMER_CTRL_MODE_MASK | ~TIMER_CTRL_CLKSRC_MASK;
sys/arm/allwinner/aw_timer.c
303
val |= TIMER_CTRL_PRESCALAR(1) | TIMER_CTRL_OSC24M;
sys/arm/allwinner/aw_timer.c
304
timer_write_4(sc, TIMER_CTRL_REG(0), val);
sys/arm/allwinner/aw_timer.c
307
val = timer_read_4(sc, TIMER_IRQ_EN_REG);
sys/arm/allwinner/aw_timer.c
308
val |= TIMER_IRQ_ENABLE(0);
sys/arm/allwinner/aw_timer.c
309
timer_write_4(sc, TIMER_IRQ_EN_REG, val);
sys/arm/allwinner/aw_timer.c
335
uint32_t val;
sys/arm/allwinner/aw_timer.c
352
val = timer_read_4(sc, TIMER_CTRL_REG(0));
sys/arm/allwinner/aw_timer.c
355
val |= TIMER_CTRL_AUTORELOAD;
sys/arm/allwinner/aw_timer.c
358
val &= ~TIMER_CTRL_AUTORELOAD;
sys/arm/allwinner/aw_timer.c
361
val |= TIMER_IRQ_ENABLE(0);
sys/arm/allwinner/aw_timer.c
362
timer_write_4(sc, TIMER_CTRL_REG(0), val);
sys/arm/allwinner/aw_timer.c
371
uint32_t val;
sys/arm/allwinner/aw_timer.c
376
val = timer_read_4(sc, TIMER_CTRL_REG(0));
sys/arm/allwinner/aw_timer.c
377
val &= ~TIMER_CTRL_START;
sys/arm/allwinner/aw_timer.c
378
timer_write_4(sc, TIMER_CTRL_REG(0), val);
sys/arm/allwinner/aw_timer.c
394
uint32_t val;
sys/arm/allwinner/aw_timer.c
397
val = timer_read_4(sc, TIMER_CTRL_REG(0));
sys/arm/allwinner/aw_timer.c
398
val &= ~TIMER_CTRL_PRESCALAR_MASK | ~TIMER_CTRL_MODE_MASK | ~TIMER_CTRL_CLKSRC_MASK;
sys/arm/allwinner/aw_timer.c
399
val |= TIMER_CTRL_PRESCALAR(1) | TIMER_CTRL_OSC24M;
sys/arm/allwinner/aw_timer.c
400
timer_write_4(sc, TIMER_CTRL_REG(0), val);
sys/arm/allwinner/aw_timer.c
404
val = timer_read_4(sc, TIMER_INTV_REG(0));
sys/arm/allwinner/aw_timer.c
407
val = timer_read_4(sc, TIMER_CTRL_REG(0));
sys/arm/allwinner/aw_timer.c
408
val |= TIMER_CTRL_AUTORELOAD | TIMER_CTRL_START;
sys/arm/allwinner/aw_timer.c
409
timer_write_4(sc, TIMER_CTRL_REG(0), val);
sys/arm/allwinner/aw_timer.c
411
val = timer_read_4(sc, TIMER_CURV_REG(0));
sys/arm/allwinner/aw_timer.c
427
uint32_t val;
sys/arm/allwinner/aw_timer.c
433
val = timer_read_4(sc, TIMER_CURV_REG(0));
sys/arm/allwinner/aw_timer.c
435
return (~0u - val);
sys/arm/allwinner/aw_ts.c
122
int val;
sys/arm/allwinner/aw_ts.c
126
val = READ(sc, TP_FIFOS);
sys/arm/allwinner/aw_ts.c
127
if (val & TP_FIFOS_TEMP_IRQ_PENDING) {
sys/arm/allwinner/aw_ts.c
133
WRITE(sc, TP_FIFOS, val);
sys/arm/allwinner/aw_usb3phy.c
114
uint32_t val;
sys/arm/allwinner/aw_usb3phy.c
123
val = RD4(sc->res, USB3PHY_PHY_EXTERNAL_CONTROL);
sys/arm/allwinner/aw_usb3phy.c
124
device_printf(dev, "EXTERNAL_CONTROL: %x\n", val);
sys/arm/allwinner/aw_usb3phy.c
125
val |= PEC_EXTERN_VBUS;
sys/arm/allwinner/aw_usb3phy.c
126
val |= PEC_SSC_EN;
sys/arm/allwinner/aw_usb3phy.c
127
val |= PEC_REF_SSP_EN;
sys/arm/allwinner/aw_usb3phy.c
128
device_printf(dev, "EXTERNAL_CONTROL: %x\n", val);
sys/arm/allwinner/aw_usb3phy.c
129
WR4(sc->res, USB3PHY_PHY_EXTERNAL_CONTROL, val);
sys/arm/allwinner/aw_usb3phy.c
131
val = RD4(sc->res, USB3PHY_PIPE_CLOCK_CONTROL);
sys/arm/allwinner/aw_usb3phy.c
132
device_printf(dev, "PIPE_CONTROL: %x\n", val);
sys/arm/allwinner/aw_usb3phy.c
133
val |= PCC_PIPE_CLK_OPEN;
sys/arm/allwinner/aw_usb3phy.c
134
device_printf(dev, "PIPE_CONTROL: %x\n", val);
sys/arm/allwinner/aw_usb3phy.c
135
WR4(sc->res, USB3PHY_PIPE_CLOCK_CONTROL, val);
sys/arm/allwinner/aw_usb3phy.c
137
val = RD4(sc->res, USB3PHY_APP);
sys/arm/allwinner/aw_usb3phy.c
138
device_printf(dev, "APP: %x\n", val);
sys/arm/allwinner/aw_usb3phy.c
139
val |= APP_FORCE_VBUS;
sys/arm/allwinner/aw_usb3phy.c
140
device_printf(dev, "APP: %x\n", val);
sys/arm/allwinner/aw_usb3phy.c
141
WR4(sc->res, USB3PHY_APP, val);
sys/arm/allwinner/aw_usb3phy.c
145
val = RD4(sc->res, USB3PHY_PHY_TUNE_HIGH);
sys/arm/allwinner/aw_usb3phy.c
146
device_printf(dev, "PHY_TUNE_HIGH: %x\n", val);
sys/arm/allwinner/aw_usb3phy.c
147
val |= PTH_TX_BOOST_LVL;
sys/arm/allwinner/aw_usb3phy.c
148
val |= PTH_LOS_BIAS;
sys/arm/allwinner/aw_usb3phy.c
149
val &= ~PTH_TX_SWING_FULL;
sys/arm/allwinner/aw_usb3phy.c
150
val |= __SHIFTIN(0x55, PTH_TX_SWING_FULL);
sys/arm/allwinner/aw_usb3phy.c
151
val &= ~PTH_TX_DEEMPH_6DB;
sys/arm/allwinner/aw_usb3phy.c
152
val |= __SHIFTIN(0x20, PTH_TX_DEEMPH_6DB);
sys/arm/allwinner/aw_usb3phy.c
153
val &= ~PTH_TX_DEEMPH_3P5DB;
sys/arm/allwinner/aw_usb3phy.c
154
val |= __SHIFTIN(0x15, PTH_TX_DEEMPH_3P5DB);
sys/arm/allwinner/aw_usb3phy.c
155
device_printf(dev, "PHY_TUNE_HIGH: %x\n", val);
sys/arm/allwinner/aw_usb3phy.c
156
WR4(sc->res, USB3PHY_PHY_TUNE_HIGH, val);
sys/arm/allwinner/aw_usbphy.c
232
uint32_t val;
sys/arm/allwinner/aw_usbphy.c
309
val = bus_read_4(sc->phy_ctrl, PHY_CSR);
sys/arm/allwinner/aw_usbphy.c
310
val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET);
sys/arm/allwinner/aw_usbphy.c
311
val |= (ID_PULLUP_EN | DPDM_PULLUP_EN);
sys/arm/allwinner/aw_usbphy.c
312
val &= ~FORCE_ID;
sys/arm/allwinner/aw_usbphy.c
313
val |= (FORCE_ID_LOW << FORCE_ID_SHIFT);
sys/arm/allwinner/aw_usbphy.c
314
val &= ~FORCE_VBUS_VALID;
sys/arm/allwinner/aw_usbphy.c
315
val |= (FORCE_VBUS_VALID_HIGH << FORCE_VBUS_VALID_SHIFT);
sys/arm/allwinner/aw_usbphy.c
316
bus_write_4(sc->phy_ctrl, PHY_CSR, val);
sys/arm/allwinner/aw_usbphy.c
322
awusbphy_vbus_detect(device_t dev, int *val)
sys/arm/allwinner/aw_usbphy.c
337
*val = active;
sys/arm/allwinner/aw_usbphy.c
346
*val = 1;
sys/arm/allwinner/aw_usbphy.c
425
uint32_t val;
sys/arm/allwinner/aw_usbphy.c
447
val = bus_read_4(sc->phy_ctrl, PHY_CSR);
sys/arm/allwinner/aw_usbphy.c
448
val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET);
sys/arm/allwinner/aw_usbphy.c
449
val |= (ID_PULLUP_EN | DPDM_PULLUP_EN);
sys/arm/allwinner/aw_usbphy.c
450
val &= ~FORCE_VBUS_VALID;
sys/arm/allwinner/aw_usbphy.c
451
val |= (vbus_det ? FORCE_VBUS_VALID_HIGH : FORCE_VBUS_VALID_LOW) <<
sys/arm/allwinner/aw_usbphy.c
453
val &= ~FORCE_ID;
sys/arm/allwinner/aw_usbphy.c
457
val |= (FORCE_ID_LOW << FORCE_ID_SHIFT);
sys/arm/allwinner/aw_usbphy.c
462
val |= (FORCE_ID_HIGH << FORCE_ID_SHIFT);
sys/arm/allwinner/aw_usbphy.c
470
bus_write_4(sc->phy_ctrl, PHY_CSR, val);
sys/arm/allwinner/axp209.c
1014
*val = 0;
sys/arm/allwinner/axp209.c
1017
*val = 1;
sys/arm/allwinner/axp209.c
1023
*val = (data & sc->pins[pin].status_mask);
sys/arm/allwinner/axp209.c
1024
*val >>= sc->pins[pin].status_shift;
sys/arm/allwinner/axp209.c
1038
axp2xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
sys/arm/allwinner/axp209.c
1057
if (pin == 2 && val == 1) {
sys/arm/allwinner/axp209.c
1062
data |= val;
sys/arm/allwinner/axp209.c
659
uint8_t val;
sys/arm/allwinner/axp209.c
663
axp2xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
sys/arm/allwinner/axp209.c
665
val |= sc->def->enable_mask;
sys/arm/allwinner/axp209.c
667
val &= ~sc->def->enable_mask;
sys/arm/allwinner/axp209.c
668
axp2xx_write(sc->base_dev, sc->def->enable_reg, val);
sys/arm/allwinner/axp209.c
676
axp2xx_regnode_reg_to_voltage(struct axp2xx_reg_sc *sc, uint8_t val, int *uv)
sys/arm/allwinner/axp209.c
678
if (val < sc->def->voltage_nstep)
sys/arm/allwinner/axp209.c
679
*uv = sc->def->voltage_min + val * sc->def->voltage_step;
sys/arm/allwinner/axp209.c
688
int max_uvolt, uint8_t *val)
sys/arm/allwinner/axp209.c
704
*val = nval;
sys/arm/allwinner/axp209.c
712
uint8_t val;
sys/arm/allwinner/axp209.c
717
axp2xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
sys/arm/allwinner/axp209.c
718
if (val & sc->def->enable_mask)
sys/arm/allwinner/axp209.c
729
uint8_t val;
sys/arm/allwinner/axp209.c
736
if (axp2xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
sys/arm/allwinner/axp209.c
739
axp2xx_write(sc->base_dev, sc->def->voltage_reg, val);
sys/arm/allwinner/axp209.c
750
uint8_t val;
sys/arm/allwinner/axp209.c
757
axp2xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
sys/arm/allwinner/axp209.c
758
axp2xx_regnode_reg_to_voltage(sc, val & sc->def->voltage_mask, uvolt);
sys/arm/allwinner/axp209.c
783
int val, error, i, found;
sys/arm/allwinner/axp209.c
801
val = ((data[0] & sc->sensors[i].h_value_mask) <<
sys/arm/allwinner/axp209.c
803
val |= ((data[1] & sc->sensors[i].l_value_mask) <<
sys/arm/allwinner/axp209.c
805
val *= sc->sensors[i].value_step;
sys/arm/allwinner/axp209.c
806
val += sc->sensors[i].value_convert;
sys/arm/allwinner/axp209.c
808
return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
sys/arm/allwinner/axp209.c
997
axp2xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/allwinner/axp81x.c
1004
val = !!(data & AXP_POWERMODE_BAT_CHARGING);
sys/arm/allwinner/axp81x.c
1011
val = BATT_CAPACITY_CRITICAL;
sys/arm/allwinner/axp81x.c
1013
val = BATT_CAPACITY_WARNING;
sys/arm/allwinner/axp81x.c
1015
val = BATT_CAPACITY_NORMAL;
sys/arm/allwinner/axp81x.c
1021
val = (data & AXP_BAT_CAP_PERCENT);
sys/arm/allwinner/axp81x.c
1026
val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
sys/arm/allwinner/axp81x.c
1027
val *= c->batsense_step;
sys/arm/allwinner/axp81x.c
1035
val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
sys/arm/allwinner/axp81x.c
1036
val *= c->charge_step;
sys/arm/allwinner/axp81x.c
1044
val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
sys/arm/allwinner/axp81x.c
1045
val *= c->discharge_step;
sys/arm/allwinner/axp81x.c
1051
val = AXP_SENSOR_COULOMB(hi, lo);
sys/arm/allwinner/axp81x.c
1052
val *= c->maxcap_step;
sys/arm/allwinner/axp81x.c
1058
val = AXP_SENSOR_COULOMB(hi, lo);
sys/arm/allwinner/axp81x.c
1059
val *= c->coulomb_step;
sys/arm/allwinner/axp81x.c
1064
return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
sys/arm/allwinner/axp81x.c
1071
uint8_t val;
sys/arm/allwinner/axp81x.c
1076
error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1);
sys/arm/allwinner/axp81x.c
1080
if (val) {
sys/arm/allwinner/axp81x.c
1082
device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val);
sys/arm/allwinner/axp81x.c
1083
if (val & AXP_IRQSTAT1_ACIN_HI)
sys/arm/allwinner/axp81x.c
1085
if (val & AXP_IRQSTAT1_ACIN_LO)
sys/arm/allwinner/axp81x.c
1087
if (val & AXP_IRQSTAT1_VBUS_HI)
sys/arm/allwinner/axp81x.c
1089
if (val & AXP_IRQSTAT1_VBUS_LO)
sys/arm/allwinner/axp81x.c
1092
axp8xx_write(dev, AXP_IRQSTAT1, val);
sys/arm/allwinner/axp81x.c
1095
error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1);
sys/arm/allwinner/axp81x.c
1099
if (val) {
sys/arm/allwinner/axp81x.c
1101
device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val);
sys/arm/allwinner/axp81x.c
1102
if (val & AXP_IRQSTAT2_BATCHGD)
sys/arm/allwinner/axp81x.c
1104
if (val & AXP_IRQSTAT2_BATCHGC)
sys/arm/allwinner/axp81x.c
1106
if (val & AXP_IRQSTAT2_BAT_NO)
sys/arm/allwinner/axp81x.c
1108
if (val & AXP_IRQSTAT2_BAT_IN)
sys/arm/allwinner/axp81x.c
1111
axp8xx_write(dev, AXP_IRQSTAT2, val);
sys/arm/allwinner/axp81x.c
1114
error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1);
sys/arm/allwinner/axp81x.c
1118
if (val) {
sys/arm/allwinner/axp81x.c
1120
axp8xx_write(dev, AXP_IRQSTAT3, val);
sys/arm/allwinner/axp81x.c
1123
error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1);
sys/arm/allwinner/axp81x.c
1127
if (val) {
sys/arm/allwinner/axp81x.c
1129
device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val);
sys/arm/allwinner/axp81x.c
1130
if (val & AXP_IRQSTAT4_BATLVL_LO0)
sys/arm/allwinner/axp81x.c
1132
if (val & AXP_IRQSTAT4_BATLVL_LO1)
sys/arm/allwinner/axp81x.c
1135
axp8xx_write(dev, AXP_IRQSTAT4, val);
sys/arm/allwinner/axp81x.c
1138
error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1);
sys/arm/allwinner/axp81x.c
1142
if (val != 0) {
sys/arm/allwinner/axp81x.c
1143
if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) {
sys/arm/allwinner/axp81x.c
1149
axp8xx_write(dev, AXP_IRQSTAT5, val);
sys/arm/allwinner/axp81x.c
1152
error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1);
sys/arm/allwinner/axp81x.c
1156
if (val) {
sys/arm/allwinner/axp81x.c
1158
axp8xx_write(dev, AXP_IRQSTAT6, val);
sys/arm/allwinner/axp81x.c
1259
axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/allwinner/axp81x.c
1276
*val = 0;
sys/arm/allwinner/axp81x.c
1279
*val = 1;
sys/arm/allwinner/axp81x.c
1284
*val = (data & (1 << pin)) ? 1 : 0;
sys/arm/allwinner/axp81x.c
1297
axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
sys/arm/allwinner/axp81x.c
1316
data |= (val << AXP_GPIO_FUNC_SHIFT);
sys/arm/allwinner/axp81x.c
1467
uint8_t chip_id, val;
sys/arm/allwinner/axp81x.c
1567
if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) {
sys/arm/allwinner/axp81x.c
1568
sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4;
sys/arm/allwinner/axp81x.c
1570
sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2);
sys/arm/allwinner/axp81x.c
1573
"Raw reg val: 0x%02x\n", val);
sys/arm/allwinner/axp81x.c
733
axp8xx_write(device_t dev, uint8_t reg, uint8_t val)
sys/arm/allwinner/axp81x.c
748
msg[1].buf = &val;
sys/arm/allwinner/axp81x.c
780
uint8_t val;
sys/arm/allwinner/axp81x.c
790
axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
sys/arm/allwinner/axp81x.c
791
val &= ~sc->def->enable_mask;
sys/arm/allwinner/axp81x.c
793
val |= sc->def->enable_value;
sys/arm/allwinner/axp81x.c
796
val |= sc->def->disable_value;
sys/arm/allwinner/axp81x.c
798
val &= ~sc->def->enable_value;
sys/arm/allwinner/axp81x.c
800
axp8xx_write(sc->base_dev, sc->def->enable_reg, val);
sys/arm/allwinner/axp81x.c
808
axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv)
sys/arm/allwinner/axp81x.c
810
if (val < sc->def->voltage_nstep1)
sys/arm/allwinner/axp81x.c
811
*uv = sc->def->voltage_min + val * sc->def->voltage_step1;
sys/arm/allwinner/axp81x.c
815
((val - sc->def->voltage_nstep1) * sc->def->voltage_step2);
sys/arm/allwinner/axp81x.c
821
int max_uvolt, uint8_t *val)
sys/arm/allwinner/axp81x.c
842
*val = nval;
sys/arm/allwinner/axp81x.c
850
uint8_t val;
sys/arm/allwinner/axp81x.c
855
axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
sys/arm/allwinner/axp81x.c
856
if (val & sc->def->enable_mask)
sys/arm/allwinner/axp81x.c
867
uint8_t val;
sys/arm/allwinner/axp81x.c
880
if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
sys/arm/allwinner/axp81x.c
883
axp8xx_write(sc->base_dev, sc->def->voltage_reg, val);
sys/arm/allwinner/axp81x.c
894
uint8_t val;
sys/arm/allwinner/axp81x.c
901
axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
sys/arm/allwinner/axp81x.c
902
axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt);
sys/arm/allwinner/axp81x.c
941
int val, error;
sys/arm/allwinner/axp81x.c
949
val = (data & AXP_CHARGERCTL1_CMASK);
sys/arm/allwinner/axp81x.c
950
error = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/allwinner/axp81x.c
954
if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX))
sys/arm/allwinner/axp81x.c
957
val |= (data & (AXP_CHARGERCTL1_CMASK << 4));
sys/arm/allwinner/axp81x.c
958
axp8xx_write(dev, AXP_CHARGERCTL1, val);
sys/arm/allwinner/axp81x.c
971
int val, i, found, batt_val;
sys/arm/allwinner/axp81x.c
990
val = !!(data & AXP_POWERSRC_ACIN);
sys/arm/allwinner/axp81x.c
994
val = !!(data & AXP_POWERSRC_VBUS);
sys/arm/allwinner/axp81x.c
999
val = !!(data & AXP_POWERMODE_BAT_PRESENT);
sys/arm/allwinner/if_awg.c
1054
uint32_t val;
sys/arm/allwinner/if_awg.c
1073
val = le32toh(sc->tx.desc_ring[i].status);
sys/arm/allwinner/if_awg.c
1074
if ((val & TX_DESC_CTL) != 0)
sys/arm/allwinner/if_awg.c
1092
val = le32toh(sc->rx.desc_ring[i].status);
sys/arm/allwinner/if_awg.c
1093
if ((val & RX_DESC_CTL) != 0)
sys/arm/allwinner/if_awg.c
1322
uint32_t val;
sys/arm/allwinner/if_awg.c
1327
val = RD4(sc, EMAC_INT_STA);
sys/arm/allwinner/if_awg.c
1328
WR4(sc, EMAC_INT_STA, val);
sys/arm/allwinner/if_awg.c
1330
if (val & RX_INT)
sys/arm/allwinner/if_awg.c
1333
if (val & TX_INT)
sys/arm/allwinner/if_awg.c
1336
if (val & (TX_INT | TX_BUF_UA_INT)) {
sys/arm/allwinner/if_awg.c
1349
uint32_t val;
sys/arm/allwinner/if_awg.c
1368
val = RD4(sc, EMAC_INT_STA);
sys/arm/allwinner/if_awg.c
1369
if (val != 0)
sys/arm/allwinner/if_awg.c
1370
WR4(sc, EMAC_INT_STA, val);
sys/arm/allwinner/if_awg.c
1397
syscon_write_emac_clk_reg(device_t dev, uint32_t val)
sys/arm/allwinner/if_awg.c
1403
SYSCON_WRITE_4(sc->syscon, EMAC_CLK_REG, val);
sys/arm/allwinner/if_awg.c
1405
bus_write_4(sc->res[_RES_SYSCON], 0, val);
sys/arm/allwinner/if_awg.c
226
static void syscon_write_emac_clk_reg(device_t dev, uint32_t val);
sys/arm/allwinner/if_awg.c
238
int retry, val;
sys/arm/allwinner/if_awg.c
241
val = 0;
sys/arm/allwinner/if_awg.c
250
val = RD4(sc, EMAC_MII_DATA);
sys/arm/allwinner/if_awg.c
260
return (val);
sys/arm/allwinner/if_awg.c
264
awg_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/arm/allwinner/if_awg.c
271
WR4(sc, EMAC_MII_DATA, val);
sys/arm/allwinner/if_awg.c
295
uint32_t val;
sys/arm/allwinner/if_awg.c
324
val = RD4(sc, EMAC_BASIC_CTL_0);
sys/arm/allwinner/if_awg.c
325
val &= ~(BASIC_CTL_SPEED | BASIC_CTL_DUPLEX);
sys/arm/allwinner/if_awg.c
329
val |= BASIC_CTL_SPEED_1000 << BASIC_CTL_SPEED_SHIFT;
sys/arm/allwinner/if_awg.c
331
val |= BASIC_CTL_SPEED_100 << BASIC_CTL_SPEED_SHIFT;
sys/arm/allwinner/if_awg.c
333
val |= BASIC_CTL_SPEED_10 << BASIC_CTL_SPEED_SHIFT;
sys/arm/allwinner/if_awg.c
336
val |= BASIC_CTL_DUPLEX;
sys/arm/allwinner/if_awg.c
338
WR4(sc, EMAC_BASIC_CTL_0, val);
sys/arm/allwinner/if_awg.c
340
val = RD4(sc, EMAC_RX_CTL_0);
sys/arm/allwinner/if_awg.c
341
val &= ~RX_FLOW_CTL_EN;
sys/arm/allwinner/if_awg.c
343
val |= RX_FLOW_CTL_EN;
sys/arm/allwinner/if_awg.c
344
WR4(sc, EMAC_RX_CTL_0, val);
sys/arm/allwinner/if_awg.c
346
val = RD4(sc, EMAC_TX_FLOW_CTL);
sys/arm/allwinner/if_awg.c
347
val &= ~(PAUSE_TIME|TX_FLOW_CTL_EN);
sys/arm/allwinner/if_awg.c
349
val |= TX_FLOW_CTL_EN;
sys/arm/allwinner/if_awg.c
351
val |= awg_pause_time << PAUSE_TIME_SHIFT;
sys/arm/allwinner/if_awg.c
352
WR4(sc, EMAC_TX_FLOW_CTL, val);
sys/arm/allwinner/if_awg.c
425
uint32_t val, hash[2], machi, maclo;
sys/arm/allwinner/if_awg.c
432
val = 0;
sys/arm/allwinner/if_awg.c
436
val |= DIS_ADDR_FILTER;
sys/arm/allwinner/if_awg.c
438
val |= RX_ALL_MULTICAST;
sys/arm/allwinner/if_awg.c
441
val |= HASH_MULTICAST;
sys/arm/allwinner/if_awg.c
456
WR4(sc, EMAC_RX_FRM_FLT, val);
sys/arm/allwinner/if_awg.c
462
uint32_t val;
sys/arm/allwinner/if_awg.c
466
val = awg_burst_len << BASIC_CTL_BURST_LEN_SHIFT;
sys/arm/allwinner/if_awg.c
468
val |= BASIC_CTL_RX_TX_PRI;
sys/arm/allwinner/if_awg.c
469
WR4(sc, EMAC_BASIC_CTL_1, val);
sys/arm/allwinner/if_awg.c
555
uint32_t val;
sys/arm/allwinner/if_awg.c
570
val = RD4(sc, EMAC_TX_CTL_1);
sys/arm/allwinner/if_awg.c
571
WR4(sc, EMAC_TX_CTL_1, val | TX_DMA_EN | TX_MD | TX_NEXT_FRAME);
sys/arm/allwinner/if_awg.c
574
val = RD4(sc, EMAC_RX_CTL_1);
sys/arm/allwinner/if_awg.c
575
WR4(sc, EMAC_RX_CTL_1, val | RX_DMA_EN | RX_MD);
sys/arm/allwinner/if_awg.c
581
uint32_t val;
sys/arm/allwinner/if_awg.c
586
val = RD4(sc, EMAC_TX_CTL_1);
sys/arm/allwinner/if_awg.c
587
val &= ~TX_DMA_EN;
sys/arm/allwinner/if_awg.c
588
val |= FLUSH_TX_FIFO;
sys/arm/allwinner/if_awg.c
589
WR4(sc, EMAC_TX_CTL_1, val);
sys/arm/allwinner/if_awg.c
595
val = RD4(sc, EMAC_TX_CTL_1);
sys/arm/allwinner/if_awg.c
596
WR4(sc, EMAC_TX_CTL_1, val & ~TX_DMA_EN);
sys/arm/allwinner/if_awg.c
599
val = RD4(sc, EMAC_RX_CTL_1);
sys/arm/allwinner/if_awg.c
600
WR4(sc, EMAC_RX_CTL_1, val & ~RX_DMA_EN);
sys/arm/allwinner/if_awg.c
72
#define WR4(sc, reg, val) bus_write_4((sc)->res[_RES_EMAC], (reg), (val))
sys/arm/allwinner/if_awg.c
946
uint32_t val;
sys/arm/allwinner/if_awg.c
951
val = RD4(sc, EMAC_TX_CTL_1);
sys/arm/allwinner/if_awg.c
952
WR4(sc, EMAC_TX_CTL_1, val | TX_DMA_START);
sys/arm/allwinner/if_emac.c
137
#define EMAC_WRITE_REG(sc, reg, val) \
sys/arm/allwinner/if_emac.c
138
bus_space_write_4(sc->emac_tag, sc->emac_handle, reg, val)
sys/arm/annapurna/alpine/alpine_machdep_mp.c
180
uint32_t val;
sys/arm/annapurna/alpine/alpine_machdep_mp.c
205
val = bus_space_read_4(fdtbus_bs_tag, cpu_resume_baddr,
sys/arm/annapurna/alpine/alpine_machdep_mp.c
207
if (((val & AL_CPU_RESUME_MAGIC_NUM_MASK) != AL_CPU_RESUME_MAGIC_NUM) ||
sys/arm/annapurna/alpine/alpine_machdep_mp.c
208
((val & AL_CPU_RESUME_MIN_VER_MASK) < AL_CPU_RESUME_MIN_VER)) {
sys/arm/annapurna/alpine/alpine_machdep_mp.c
222
val = bus_space_read_4(fdtbus_bs_tag, cpu_resume_baddr,
sys/arm/annapurna/alpine/alpine_machdep_mp.c
224
val &= ~AL_CPU_RESUME_FLG_PERCPU_DONT_RESUME;
sys/arm/annapurna/alpine/alpine_machdep_mp.c
226
AL_CPU_RESUME_PCPU_FLAGS(a), val);
sys/arm/annapurna/alpine/alpine_machdep_mp.c
243
val = bus_space_read_4(fdtbus_bs_tag, nb_baddr, AL_NB_INIT_CONTROL);
sys/arm/annapurna/alpine/alpine_machdep_mp.c
244
val |= start_mask;
sys/arm/annapurna/alpine/alpine_machdep_mp.c
245
bus_space_write_4(fdtbus_bs_tag, nb_baddr, AL_NB_INIT_CONTROL, val);
sys/arm/annapurna/alpine/alpine_nb_service.c
106
val = bus_read_4(sc->res, AL_NB_ACF_MISC_OFFSET);
sys/arm/annapurna/alpine/alpine_nb_service.c
107
val &= ~AL_NB_ACF_MISC_READ_BYPASS;
sys/arm/annapurna/alpine/alpine_nb_service.c
108
bus_write_4(sc->res, AL_NB_ACF_MISC_OFFSET, val);
sys/arm/annapurna/alpine/alpine_nb_service.c
94
uint32_t val;
sys/arm/annapurna/alpine/alpine_pci.c
117
uint32_t val;
sys/arm/annapurna/alpine/alpine_pci.c
139
val = PCIB_READ_CONFIG(dev, bus, slot, func,
sys/arm/annapurna/alpine/alpine_pci.c
141
val |= PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_OVRD_FROM_AXUSER_MASK;
sys/arm/annapurna/alpine/alpine_pci.c
143
AL_PCI_AXI_CFG_AND_CTR_0, val, 4);
sys/arm/annapurna/alpine/alpine_pci.c
145
val = PCIB_READ_CONFIG(dev, bus, slot, func,
sys/arm/annapurna/alpine/alpine_pci.c
147
val &= ~0xffff;
sys/arm/annapurna/alpine/alpine_pci.c
148
val |= PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_PF_VEC_MEM_ADDR54_63_SEL_TGTID_MASK;
sys/arm/annapurna/alpine/alpine_pci.c
150
AL_PCI_APP_CONTROL, val, 4);
sys/arm/arm/db_interface.c
291
db_branch_taken_read_int(void *cookie __unused, vm_offset_t offset, u_int *val)
sys/arm/arm/db_interface.c
296
*val = ret;
sys/arm/arm/debug_monitor.c
153
#define DBG_WB_READ(cn, cm, op2, val) do { \
sys/arm/arm/debug_monitor.c
154
__asm __volatile("mrc p14, 0, %0, " #cn "," #cm "," #op2 : "=r" (val)); \
sys/arm/arm/debug_monitor.c
157
#define DBG_WB_WRITE(cn, cm, op2, val) do { \
sys/arm/arm/debug_monitor.c
158
__asm __volatile("mcr p14, 0, %0, " #cn "," #cm "," #op2 :: "r" (val)); \
sys/arm/arm/debug_monitor.c
161
#define READ_WB_REG_CASE(op2, m, val) \
sys/arm/arm/debug_monitor.c
163
DBG_WB_READ(c0, c ## m, op2, val); \
sys/arm/arm/debug_monitor.c
166
#define WRITE_WB_REG_CASE(op2, m, val) \
sys/arm/arm/debug_monitor.c
168
DBG_WB_WRITE(c0, c ## m, op2, val); \
sys/arm/arm/debug_monitor.c
171
#define SWITCH_CASES_READ_WB_REG(op2, val) \
sys/arm/arm/debug_monitor.c
172
READ_WB_REG_CASE(op2, 0, val); \
sys/arm/arm/debug_monitor.c
173
READ_WB_REG_CASE(op2, 1, val); \
sys/arm/arm/debug_monitor.c
174
READ_WB_REG_CASE(op2, 2, val); \
sys/arm/arm/debug_monitor.c
175
READ_WB_REG_CASE(op2, 3, val); \
sys/arm/arm/debug_monitor.c
176
READ_WB_REG_CASE(op2, 4, val); \
sys/arm/arm/debug_monitor.c
177
READ_WB_REG_CASE(op2, 5, val); \
sys/arm/arm/debug_monitor.c
178
READ_WB_REG_CASE(op2, 6, val); \
sys/arm/arm/debug_monitor.c
179
READ_WB_REG_CASE(op2, 7, val); \
sys/arm/arm/debug_monitor.c
180
READ_WB_REG_CASE(op2, 8, val); \
sys/arm/arm/debug_monitor.c
181
READ_WB_REG_CASE(op2, 9, val); \
sys/arm/arm/debug_monitor.c
182
READ_WB_REG_CASE(op2, 10, val); \
sys/arm/arm/debug_monitor.c
183
READ_WB_REG_CASE(op2, 11, val); \
sys/arm/arm/debug_monitor.c
184
READ_WB_REG_CASE(op2, 12, val); \
sys/arm/arm/debug_monitor.c
185
READ_WB_REG_CASE(op2, 13, val); \
sys/arm/arm/debug_monitor.c
186
READ_WB_REG_CASE(op2, 14, val); \
sys/arm/arm/debug_monitor.c
187
READ_WB_REG_CASE(op2, 15, val)
sys/arm/arm/debug_monitor.c
189
#define SWITCH_CASES_WRITE_WB_REG(op2, val) \
sys/arm/arm/debug_monitor.c
190
WRITE_WB_REG_CASE(op2, 0, val); \
sys/arm/arm/debug_monitor.c
191
WRITE_WB_REG_CASE(op2, 1, val); \
sys/arm/arm/debug_monitor.c
192
WRITE_WB_REG_CASE(op2, 2, val); \
sys/arm/arm/debug_monitor.c
193
WRITE_WB_REG_CASE(op2, 3, val); \
sys/arm/arm/debug_monitor.c
194
WRITE_WB_REG_CASE(op2, 4, val); \
sys/arm/arm/debug_monitor.c
195
WRITE_WB_REG_CASE(op2, 5, val); \
sys/arm/arm/debug_monitor.c
196
WRITE_WB_REG_CASE(op2, 6, val); \
sys/arm/arm/debug_monitor.c
197
WRITE_WB_REG_CASE(op2, 7, val); \
sys/arm/arm/debug_monitor.c
198
WRITE_WB_REG_CASE(op2, 8, val); \
sys/arm/arm/debug_monitor.c
199
WRITE_WB_REG_CASE(op2, 9, val); \
sys/arm/arm/debug_monitor.c
200
WRITE_WB_REG_CASE(op2, 10, val); \
sys/arm/arm/debug_monitor.c
201
WRITE_WB_REG_CASE(op2, 11, val); \
sys/arm/arm/debug_monitor.c
202
WRITE_WB_REG_CASE(op2, 12, val); \
sys/arm/arm/debug_monitor.c
203
WRITE_WB_REG_CASE(op2, 13, val); \
sys/arm/arm/debug_monitor.c
204
WRITE_WB_REG_CASE(op2, 14, val); \
sys/arm/arm/debug_monitor.c
205
WRITE_WB_REG_CASE(op2, 15, val)
sys/arm/arm/debug_monitor.c
210
uint32_t val;
sys/arm/arm/debug_monitor.c
212
val = 0;
sys/arm/arm/debug_monitor.c
215
SWITCH_CASES_READ_WB_REG(DBG_WB_WVR, val);
sys/arm/arm/debug_monitor.c
216
SWITCH_CASES_READ_WB_REG(DBG_WB_WCR, val);
sys/arm/arm/debug_monitor.c
217
SWITCH_CASES_READ_WB_REG(DBG_WB_BVR, val);
sys/arm/arm/debug_monitor.c
218
SWITCH_CASES_READ_WB_REG(DBG_WB_BCR, val);
sys/arm/arm/debug_monitor.c
225
return (val);
sys/arm/arm/debug_monitor.c
229
dbg_wb_write_reg(int reg, int n, uint32_t val)
sys/arm/arm/debug_monitor.c
233
SWITCH_CASES_WRITE_WB_REG(DBG_WB_WVR, val);
sys/arm/arm/debug_monitor.c
234
SWITCH_CASES_WRITE_WB_REG(DBG_WB_WCR, val);
sys/arm/arm/debug_monitor.c
235
SWITCH_CASES_WRITE_WB_REG(DBG_WB_BVR, val);
sys/arm/arm/debug_monitor.c
236
SWITCH_CASES_WRITE_WB_REG(DBG_WB_BCR, val);
sys/arm/arm/elf_machdep.c
175
store_ptr(Elf_Addr *where, Elf_Addr val)
sys/arm/arm/elf_machdep.c
178
*where = val;
sys/arm/arm/elf_machdep.c
180
memcpy(where, &val, sizeof(val));
sys/arm/arm/gdb_machdep.c
102
kdb_frame->tf_pc = *(register_t *)val;
sys/arm/arm/gdb_machdep.c
105
kdb_frame->tf_svc_sp = *(register_t *)val;
sys/arm/arm/gdb_machdep.c
108
kdb_frame->tf_svc_lr = *(register_t *)val;
sys/arm/arm/gdb_machdep.c
113
*(&kdb_frame->tf_r0 + regnum) = *(register_t *)val;
sys/arm/arm/gdb_machdep.c
95
gdb_cpu_setreg(int regnum, void *val)
sys/arm/arm/generic_timer.c
177
#define set_el0(x, val) cp15_## x ##_set(val)
sys/arm/arm/generic_timer.c
178
#define set_el1(x, val) cp15_## x ##_set(val)
sys/arm/arm/generic_timer.c
184
#define set_el0(x, val) WRITE_SPECIALREG(x ##_el0, val)
sys/arm/arm/generic_timer.c
185
#define set_el1(x, val) WRITE_SPECIALREG(x ##_el1, val)
sys/arm/arm/generic_timer.c
200
uint64_t val;
sys/arm/arm/generic_timer.c
205
val = get_el0(cntpct);
sys/arm/arm/generic_timer.c
207
while (((val + 1) & 0x7FF) <= 1);
sys/arm/arm/generic_timer.c
211
val = get_el0(cntvct);
sys/arm/arm/generic_timer.c
213
while (((val + 1) & 0x7FF) <= 1);
sys/arm/arm/generic_timer.c
216
return (val);
sys/arm/arm/generic_timer.c
223
uint64_t val;
sys/arm/arm/generic_timer.c
227
val = get_el0(cntpct);
sys/arm/arm/generic_timer.c
229
val = get_el0(cntvct);
sys/arm/arm/generic_timer.c
231
return (val);
sys/arm/arm/generic_timer.c
242
uint64_t val;
sys/arm/arm/generic_timer.c
245
val = READ_SPECIALREG(CNTPCTSS_EL0_REG);
sys/arm/arm/generic_timer.c
247
val = READ_SPECIALREG(CNTVCTSS_EL0_REG);
sys/arm/arm/generic_timer.c
249
return (val);
sys/arm/arm/generic_timer.c
254
set_ctrl(uint32_t val, bool physical)
sys/arm/arm/generic_timer.c
258
set_el0(cntp_ctl, val);
sys/arm/arm/generic_timer.c
260
set_el0(cntv_ctl, val);
sys/arm/arm/generic_timer.c
267
set_tval(uint32_t val, bool physical)
sys/arm/arm/generic_timer.c
271
set_el0(cntp_tval, val);
sys/arm/arm/generic_timer.c
273
set_el0(cntv_tval, val);
sys/arm/arm/generic_timer.c
282
uint32_t val;
sys/arm/arm/generic_timer.c
285
val = get_el0(cntp_ctl);
sys/arm/arm/generic_timer.c
287
val = get_el0(cntv_ctl);
sys/arm/arm/generic_timer.c
289
return (val);
sys/arm/arm/generic_timer.c
314
uint64_t val;
sys/arm/arm/generic_timer.c
327
val = READ_SPECIALREG(cntvct_el0);
sys/arm/arm/generic_timer.c
329
frame->tf_x[reg] = val;
sys/arm/arm/generic_timer.c
331
frame->tf_lr = val;
sys/arm/arm/gic.c
1014
uint32_t val = 0, i;
sys/arm/arm/gic.c
1019
val |= arm_gic_map[i] << GICD_SGI_TARGET_SHIFT;
sys/arm/arm/gic.c
1023
gic_d_write_4(sc, GICD_SGIR, val | gi->gi_irq);
sys/arm/arm/gic.c
1189
uint32_t val;
sys/arm/arm/gic.c
1222
val = gic_d_read_4(sc, GICD_ICFGR(i)) >> 2 * (i & 0xf);
sys/arm/arm/gic.c
1223
if ((val & GICD_ICFGR_POL_MASK) == GICD_ICFGR_POL_LOW)
sys/arm/arm/gic.c
1227
if ((val & GICD_ICFGR_TRIG_MASK) == GICD_ICFGR_TRIG_LVL)
sys/arm/arm/identcpu-v6.c
191
uint32_t type, val, size, sets, ways, linesize;
sys/arm/arm/identcpu-v6.c
207
val = cp15_ccsidr_get();
sys/arm/arm/identcpu-v6.c
208
ways = CPUV7_CT_xSIZE_ASSOC(val) + 1;
sys/arm/arm/identcpu-v6.c
209
sets = CPUV7_CT_xSIZE_SET(val) + 1;
sys/arm/arm/identcpu-v6.c
210
linesize = 1 << (CPUV7_CT_xSIZE_LEN(val) + 4);
sys/arm/arm/identcpu-v6.c
219
if (val & CPUV7_CT_CTYPE_WT)
sys/arm/arm/identcpu-v6.c
221
if (val & CPUV7_CT_CTYPE_WB)
sys/arm/arm/identcpu-v6.c
223
if (val & CPUV7_CT_CTYPE_RA)
sys/arm/arm/identcpu-v6.c
225
if (val & CPUV7_CT_CTYPE_WA)
sys/arm/arm/identcpu-v6.c
232
val = cp15_ccsidr_get();
sys/arm/arm/identcpu-v6.c
233
ways = CPUV7_CT_xSIZE_ASSOC(val) + 1;
sys/arm/arm/identcpu-v6.c
234
sets = CPUV7_CT_xSIZE_SET(val) + 1;
sys/arm/arm/identcpu-v6.c
235
linesize = 1 << (CPUV7_CT_xSIZE_LEN(val) + 4);
sys/arm/arm/identcpu-v6.c
239
if (val & CPUV7_CT_CTYPE_WT)
sys/arm/arm/identcpu-v6.c
241
if (val & CPUV7_CT_CTYPE_WB)
sys/arm/arm/identcpu-v6.c
243
if (val & CPUV7_CT_CTYPE_RA)
sys/arm/arm/identcpu-v6.c
245
if (val & CPUV7_CT_CTYPE_WA)
sys/arm/arm/identcpu-v6.c
278
u_int val;
sys/arm/arm/identcpu-v6.c
304
val = (cpuinfo.mpidr >> 4)& 0xF;
sys/arm/arm/identcpu-v6.c
307
val = (cpuinfo.id_pfr0 >> 4)& 0xF;
sys/arm/arm/identcpu-v6.c
308
if (val == 1)
sys/arm/arm/identcpu-v6.c
310
else if (val == 3)
sys/arm/arm/identcpu-v6.c
313
val = (cpuinfo.id_pfr1 >> 4)& 0xF;
sys/arm/arm/identcpu-v6.c
314
if (val == 1 || val == 2)
sys/arm/arm/identcpu-v6.c
317
val = (cpuinfo.id_pfr1 >> 12)& 0xF;
sys/arm/arm/identcpu-v6.c
318
if (val == 1)
sys/arm/arm/identcpu-v6.c
321
val = (cpuinfo.id_pfr1 >> 16)& 0xF;
sys/arm/arm/identcpu-v6.c
322
if (val == 1)
sys/arm/arm/identcpu-v6.c
325
val = (cpuinfo.id_mmfr0 >> 0)& 0xF;
sys/arm/arm/identcpu-v6.c
326
if (val == 2) {
sys/arm/arm/identcpu-v6.c
328
} else if (val >= 3) {
sys/arm/arm/identcpu-v6.c
330
if (val >= 4)
sys/arm/arm/identcpu-v6.c
332
if (val >= 5)
sys/arm/arm/identcpu-v6.c
336
val = (cpuinfo.id_mmfr3 >> 20)& 0xF;
sys/arm/arm/identcpu-v6.c
337
if (val == 1)
sys/arm/arm/identcpu-v6.c
346
val = (cpuinfo.id_isar0 >> 24)& 0xF;
sys/arm/arm/identcpu-v6.c
347
if (val == 1)
sys/arm/arm/identcpu-v6.c
349
else if (val == 2)
sys/arm/arm/identcpu-v6.c
352
val = (cpuinfo.id_isar2 >> 20)& 0xF;
sys/arm/arm/identcpu-v6.c
353
if (val == 1 || val == 2)
sys/arm/arm/identcpu-v6.c
356
val = (cpuinfo.id_isar2 >> 16)& 0xF;
sys/arm/arm/identcpu-v6.c
357
if (val == 1 || val == 2 || val == 3)
sys/arm/arm/identcpu-v6.c
360
val = (cpuinfo.id_isar2 >> 12)& 0xF;
sys/arm/arm/identcpu-v6.c
361
if (val == 1)
sys/arm/arm/identcpu-v6.c
364
val = (cpuinfo.id_isar3 >> 4)& 0xF;
sys/arm/arm/identcpu-v6.c
365
if (val == 1)
sys/arm/arm/identcpu-v6.c
367
else if (val == 3)
sys/arm/arm/machdep_ptrace.c
84
ptrace_get_usr_int(void* cookie, vm_offset_t offset, u_int* val)
sys/arm/arm/machdep_ptrace.c
89
error = ptrace_read_int(td, offset, val);
sys/arm/arm/mpcore_timer.c
115
#define tmr_prv_write_4(sc, reg, val) bus_write_4((sc)->prv_mem, reg, val)
sys/arm/arm/mpcore_timer.c
117
#define tmr_gbl_write_4(sc, reg, val) bus_write_4((sc)->gbl_mem, reg, val)
sys/arm/arm/pl310.c
108
platform_pl310_write_ctrl(struct pl310_softc *sc, uint32_t val)
sys/arm/arm/pl310.c
111
PLATFORM_PL310_WRITE_CTRL(platform_obj(), sc, val);
sys/arm/arm/pl310.c
115
platform_pl310_write_debug(struct pl310_softc *sc, uint32_t val)
sys/arm/arm/pl310.c
118
PLATFORM_PL310_WRITE_DEBUG(platform_obj(), sc, val);
sys/arm/arm/pmap-v6.c
6249
int val;
sys/arm/arm/pmap-v6.c
6257
val = MINCORE_PSIND(1) | MINCORE_INCORE;
sys/arm/arm/pmap-v6.c
6259
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/arm/arm/pmap-v6.c
6261
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/arm/arm/pmap-v6.c
6268
val = MINCORE_INCORE;
sys/arm/arm/pmap-v6.c
6270
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/arm/arm/pmap-v6.c
6272
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/arm/arm/pmap-v6.c
6275
val = 0;
sys/arm/arm/pmap-v6.c
6277
if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
sys/arm/arm/pmap-v6.c
6282
return (val);
sys/arm/arm/sp804.c
109
#define sp804_timer_tc_write_4(reg, val) \
sys/arm/arm/sp804.c
110
bus_space_write_4(sc->bst, sc->bsh, reg, val)
sys/arm/arm/stdatomic.c
136
put_1(reg_t *r, const uint8_t *offset_ptr, uint8_t val)
sys/arm/arm/stdatomic.c
141
r->v8[offset] = val;
sys/arm/arm/stdatomic.c
154
put_2(reg_t *r, const uint16_t *offset_ptr, uint16_t val)
sys/arm/arm/stdatomic.c
163
bytes.in = val;
sys/arm/arm/stdatomic.c
192
__sync_lock_test_and_set_##N##_c(uintN_t *mem, uintN_t val) \
sys/arm/arm/stdatomic.c
200
put_##N(&val32, mem, val); \
sys/arm/arm/stdatomic.c
265
__sync_##name##_##N##_c(uintN_t *mem, uintN_t val) \
sys/arm/arm/stdatomic.c
273
put_##N(&val32, mem, val); \
sys/arm/arm/stdatomic.c
303
__sync_##name##_##N##_c(uintN_t *mem, uintN_t val) \
sys/arm/arm/stdatomic.c
311
put_##N(&val32, mem, val); \
sys/arm/arm/stdatomic.c
339
__sync_lock_test_and_set_4_c(uint32_t *mem, uint32_t val)
sys/arm/arm/stdatomic.c
351
: "r" (val), "m" (*mem));
sys/arm/arm/stdatomic.c
378
__sync_##name##_4##_c(uint32_t *mem, uint32_t val) \
sys/arm/arm/stdatomic.c
392
: "r" (val), "m" (*mem)); \
sys/arm/arm/vfp.c
100
return val;
sys/arm/arm/vfp.c
104
set_coprocessorACR(u_int val)
sys/arm/arm/vfp.c
107
: : "r" (val) : "cc");
sys/arm/arm/vfp.c
84
#define fmxr(reg, val) \
sys/arm/arm/vfp.c
86
" vmsr " __STRING(reg) ", %0" :: "r"(val));
sys/arm/arm/vfp.c
89
({ u_int val = 0;\
sys/arm/arm/vfp.c
91
" vmrs %0, " __STRING(reg) : "=r"(val)); \
sys/arm/arm/vfp.c
92
val; \
sys/arm/arm/vfp.c
98
u_int val;
sys/arm/arm/vfp.c
99
__asm __volatile("mrc p15, 0, %0, c1, c0, 2" : "=r" (val) : : "cc");
sys/arm/broadcom/bcm2835/bcm2835_audio.c
938
int val;
sys/arm/broadcom/bcm2835/bcm2835_audio.c
941
val = sc->dest;
sys/arm/broadcom/bcm2835/bcm2835_audio.c
942
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_audio.c
946
if ((val < 0) || (val > 2))
sys/arm/broadcom/bcm2835/bcm2835_audio.c
950
sc->dest = val;
sys/arm/broadcom/bcm2835/bcm2835_audio.c
955
device_printf(sc->dev, "destination set to %s\n", dest_description(val));
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
1003
val = val / 100 + TZ_ZEROC;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
1005
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
639
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
64
#define OFFSET2MVOLT(val) (((val) / 1000))
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
644
val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_FIRMWARE_CLOCK_ID_ARM);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
646
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
649
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
65
#define MVOLT2OFFSET(val) (((val) * 1000))
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
656
val);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
671
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
676
val = bcm2835_cpufreq_get_clock_rate(sc,
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
679
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
682
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
689
val);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
705
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
710
val = bcm2835_cpufreq_get_clock_rate(sc,
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
713
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
716
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
723
BCM2835_FIRMWARE_CLOCK_ID_SDRAM, val);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
738
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
743
val = bcm2835_cpufreq_get_turbo(sc);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
745
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
748
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
753
if (val > 0)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
774
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
779
val = bcm2835_cpufreq_get_voltage(sc, BCM2835_FIRMWARE_VOLTAGE_ID_CORE);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
781
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
784
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
789
if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
791
sc->voltage_core = val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
810
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
815
val = bcm2835_cpufreq_get_voltage(sc,
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
818
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
821
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
826
if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
828
sc->voltage_sdram_c = val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
848
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
853
val = bcm2835_cpufreq_get_voltage(sc,
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
856
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
859
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
864
if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
866
sc->voltage_sdram_i = val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
885
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
890
val = bcm2835_cpufreq_get_voltage(sc,
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
893
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
896
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
901
if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
903
sc->voltage_sdram_p = val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
922
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
928
val = 0;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
929
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
934
if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
936
sc->voltage_sdram = val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
940
BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_C, val);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
947
BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_I, val);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
954
BCM2835_FIRMWARE_VOLTAGE_ID_SDRAM_P, val);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
970
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
975
val = bcm2835_cpufreq_get_temperature(sc);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
977
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
980
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
992
int val;
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
997
val = bcm2835_cpufreq_get_temperature(sc);
sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c
999
if (val == MSG_ERROR)
sys/arm/broadcom/bcm2835/bcm2835_fb.c
709
bcmfb_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/arm/broadcom/bcm2835/bcm2835_fbd.c
176
int val;
sys/arm/broadcom/bcm2835/bcm2835_fbd.c
179
val = 0;
sys/arm/broadcom/bcm2835/bcm2835_fbd.c
180
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/broadcom/bcm2835/bcm2835_gpio.c
535
bcm_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/broadcom/bcm2835/bcm2835_gpio.c
551
*val = (reg_data & BCM_GPIO_MASK(pin)) ? 1 : 0;
sys/arm/broadcom/bcm2835/bcm2835_intr.c
144
#define intc_write_4(_sc, reg, val) \
sys/arm/broadcom/bcm2835/bcm2835_intr.c
145
bus_space_write_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg), (val))
sys/arm/broadcom/bcm2835/bcm2835_mbox.c
92
#define mbox_write_4(sc, reg, val) \
sys/arm/broadcom/bcm2835/bcm2835_mbox.c
93
bus_space_write_4((sc)->bst, (sc)->bsh, reg, val)
sys/arm/broadcom/bcm2835/bcm2835_rng.c
188
bcm2835_rng_write4(struct bcm2835_rng_softc *sc, bus_size_t off, uint32_t val)
sys/arm/broadcom/bcm2835/bcm2835_rng.c
191
bus_write_4(sc->sc_mem_res, off, val);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
197
uint32_t comblk2_osc, comblk1_osc, jclk_byp_div, val;
sys/arm/broadcom/bcm2835/bcm2835_rng.c
205
val = bcm2835_rng_read4(sc, sc->conf->control_reg);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
206
sbuf_printf(sbp, "RNG_CTRL (%08x)\n", val);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
208
comblk2_osc = (val & RNG_COMBLK2_OSC) >> RNG_COMBLK2_OSC_SHIFT;
sys/arm/broadcom/bcm2835/bcm2835_rng.c
214
comblk1_osc = (val & RNG_COMBLK1_OSC) >> RNG_COMBLK1_OSC_SHIFT;
sys/arm/broadcom/bcm2835/bcm2835_rng.c
220
jclk_byp_div = (val & RNG_JCLK_BYP_DIV_CNT) >>
sys/arm/broadcom/bcm2835/bcm2835_rng.c
227
(val & RNG_JCLK_BYP_SRC) ? "Use divided down APB clock" :
sys/arm/broadcom/bcm2835/bcm2835_rng.c
231
(val & RNG_JCLK_BYP_SEL) ? "Bypass internal jitter clock" :
sys/arm/broadcom/bcm2835/bcm2835_rng.c
234
if ((val & RNG_RBG2X) != 0)
sys/arm/broadcom/bcm2835/bcm2835_rng.c
237
if ((val & RNG_RBGEN_BIT) != 0)
sys/arm/broadcom/bcm2835/bcm2835_rng.c
241
val = bcm2835_rng_read4(sc, sc->conf->status_reg);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
242
sbuf_printf(sbp, "RNG_CTRL (%08x)\n", val);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
244
(val >> sc->conf->count_value_shift) & sc->conf->count_value_mask);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
245
sbuf_printf(sbp, " RND_WARM_CNT: %05x\n", val & sc->conf->warmup_count);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
248
val = bcm2835_rng_read4(sc, RNG_FF_THRES);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
249
sbuf_printf(sbp, "RNG_FF_THRES: %05x\n", val & RNG_FF_THRES_MASK);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
252
val = bcm2835_rng_read4(sc, sc->conf->intr_mask_reg);
sys/arm/broadcom/bcm2835/bcm2835_rng.c
254
((val & sc->conf->intr_disable_bit) != 0) ? "disabled" : "enabled");
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
434
uint32_t val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
435
return val;
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
439
WR4(struct bcm_sdhci_softc *sc, bus_size_t off, uint32_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
442
bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
456
uint32_t val = RD4(sc, off & ~3);
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
458
return ((val >> (off & 3)*8) & 0xff);
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
501
uint8_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
506
val32 |= (val << (off & 3)*8);
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
512
uint16_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
535
val32 |= (val << (off & 3)*8);
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
558
uint32_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
561
WR4(sc, off, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1034
bus_size_t off, uint8_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1046
if (val & SDHCI_CTRL_4BITBUS)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1049
__func__, val, val2);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1053
val2 = (val != 0) ? 1 : 0;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1055
__func__, val, val2);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1060
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1064
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1068
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1072
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1076
__func__, off, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1084
bcm_sdhost_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1094
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1095
sc->sdhci_blocksize = val;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1096
WR2(sc, HC_BLOCKSIZE, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1101
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1102
sc->sdhci_blockcount = val;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1103
WR2(sc, HC_BLOCKCOUNT, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1108
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1112
bcm_sdhost_command(dev, slot, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1116
val2 = (val & ~SDHCI_DIVIDER_MASK) >> SDHCI_DIVIDER_SHIFT;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1121
__func__, val, val2);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1127
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1132
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1137
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1142
__func__, off, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1150
bcm_sdhost_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint32_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1160
val2 = val;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1162
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1167
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1168
sc->sdhci_int_status = val;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1172
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1175
sc->sdhci_signal_enable = val;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1177
if (val != 0)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1184
__func__, val, hstcfg);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1189
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1193
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1197
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1201
__func__, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1205
__func__, off, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
235
uint32_t val;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
237
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
239
return (val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
243
WR4(struct bcm_sdhost_softc *sc, bus_size_t off, uint32_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
246
bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
253
uint32_t val;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
255
val = RD4(sc, off & ~3);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
257
return ((val >> (off & 3)*8) & 0xffff);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
264
uint32_t val;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
266
val = RD4(sc, off & ~3);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
268
return ((val >> (off & 3)*8) & 0xff);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
272
WR2(struct bcm_sdhost_softc *sc, bus_size_t off, uint16_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
278
val32 |= (val << (off & 3)*8);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
283
WR1(struct bcm_sdhost_softc *sc, bus_size_t off, uint8_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
289
val32 |= (val << (off & 3)*8);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
664
bcm_sdhost_command(device_t dev, struct sdhci_slot *slot, uint16_t val)
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
683
val2 = ((val >> 8) & HC_CMD_COMMAND_MASK) | HC_CMD_ENABLE;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
685
opcode = val >> 8;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
686
flags = val & 0xff;
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
711
__func__, val, val2);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
867
uint32_t val2, val; /* = RD4(sc, off & ~3); */
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
887
val = RD4(sc, HC_CLOCKDIVISOR);
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
888
val2 = (val << SDHCI_DIVIDER_SHIFT) |
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
892
__func__, val, val2);
sys/arm/broadcom/bcm2835/bcm2836.c
173
#define bcm_lintc_write_4(sc, reg, val) \
sys/arm/broadcom/bcm2835/bcm2836.c
174
bus_space_write_4((sc)->bls_bst, (sc)->bls_bsh, (reg), (val))
sys/arm/broadcom/bcm2835/bcm2836_mp.c
125
val = BSRD4(MBOX3CLR_CORE(i));
sys/arm/broadcom/bcm2835/bcm2836_mp.c
126
if (val == 0)
sys/arm/broadcom/bcm2835/bcm2836_mp.c
76
#define BSWR4(addr, val) \
sys/arm/broadcom/bcm2835/bcm2836_mp.c
77
bus_space_write_4(fdtbus_bs_tag, bs_periph, (addr), (val))
sys/arm/broadcom/bcm2835/bcm2836_mp.c
95
uint32_t val;
sys/arm/broadcom/bcm2835/bcm2838_pci.c
166
bcm_pcib_set_reg(struct bcm_pcib_softc *sc, uint32_t reg, uint32_t val)
sys/arm/broadcom/bcm2835/bcm2838_pci.c
169
bus_write_4(sc->base.base.res, reg, htole32(val));
sys/arm/broadcom/bcm2835/bcm2838_pci.c
182
uint32_t val;
sys/arm/broadcom/bcm2835/bcm2838_pci.c
184
val = bcm_pcib_read_reg(sc, REG_BRIDGE_CTRL);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
185
val = val | BRIDGE_RESET_FLAG | BRIDGE_DISABLE_FLAG;
sys/arm/broadcom/bcm2835/bcm2838_pci.c
186
bcm_pcib_set_reg(sc, REG_BRIDGE_CTRL, val);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
190
val = bcm_pcib_read_reg(sc, REG_BRIDGE_CTRL);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
191
val = val & ~BRIDGE_RESET_FLAG;
sys/arm/broadcom/bcm2835/bcm2838_pci.c
192
bcm_pcib_set_reg(sc, REG_BRIDGE_CTRL, val);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
204
uint32_t val;
sys/arm/broadcom/bcm2835/bcm2838_pci.c
206
val = bcm_pcib_read_reg(sc, REG_BRIDGE_CTRL);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
207
val = val & ~BRIDGE_DISABLE_FLAG;
sys/arm/broadcom/bcm2835/bcm2838_pci.c
208
bcm_pcib_set_reg(sc, REG_BRIDGE_CTRL, val);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
348
u_int func, u_int reg, uint32_t val, int bytes)
sys/arm/broadcom/bcm2835/bcm2838_pci.c
362
bus_write_1(sc->base.base.res, offset, val);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
365
bus_write_2(sc->base.base.res, offset, htole16(val));
sys/arm/broadcom/bcm2835/bcm2838_pci.c
368
bus_write_4(sc->base.base.res, offset, htole32(val));
sys/arm/broadcom/bcm2835/bcm2838_pci.c
572
uint16_t val;
sys/arm/broadcom/bcm2835/bcm2838_pci.c
576
val = bcm_pcib_read_config(dev, 0, 0, 0, PCIR_MEMBASE_1, 2);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
577
base = PCI_PPBMEMBASE(0, val);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
579
val = bcm_pcib_read_config(dev, 0, 0, 0, PCIR_MEMLIMIT_1, 2);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
580
size = PCI_PPBMEMLIMIT(0, val) - base;
sys/arm/broadcom/bcm2835/bcm2838_pci.c
583
val = (uint16_t) (new_base >> 16);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
584
bcm_pcib_write_config(dev, 0, 0, 0, PCIR_MEMBASE_1, val, 2);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
587
val = (uint16_t) (new_limit >> 16);
sys/arm/broadcom/bcm2835/bcm2838_pci.c
588
bcm_pcib_write_config(dev, 0, 0, 0, PCIR_MEMLIMIT_1, val, 2);
sys/arm/broadcom/bcm2835/raspberrypi_gpio.c
270
rpi_fw_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/broadcom/bcm2835/raspberrypi_gpio.c
296
*val = !state.resp.state;
sys/arm/broadcom/bcm2835/raspberrypi_virtgpio.c
164
rpi_virt_gpio_pin_get(device_t dev, uint32_t pin, uint32_t *val)
sys/arm/broadcom/bcm2835/raspberrypi_virtgpio.c
178
*val = ((uint16_t)(v >> 16) - (uint16_t)v) == 0 ? 0 : 1;
sys/arm/broadcom/bcm2835/raspberrypi_virtgpio.c
187
unsigned int val;
sys/arm/broadcom/bcm2835/raspberrypi_virtgpio.c
192
rv = rpi_virt_gpio_pin_get(dev, pin, &val);
sys/arm/broadcom/bcm2835/raspberrypi_virtgpio.c
196
rv = rpi_virt_gpio_pin_set(dev, pin, val == 0 ? 1 : 0);
sys/arm/freescale/imx/imx6_ahci.c
180
imx6_ahci_phy_read(struct ahci_controller* sc, uint32_t addr, uint16_t* val)
sys/arm/freescale/imx/imx6_ahci.c
208
*val = SATA_P0PHYSR_CR_DATA_OUT(v);
sys/arm/freescale/imx/imx6_anatop.c
483
uint32_t val;
sys/arm/freescale/imx/imx6_anatop.c
485
val = imx6_anatop_read_4(IMX6_ANALOG_TEMPMON_TEMPSENSE0);
sys/arm/freescale/imx/imx6_anatop.c
486
if (!(val & IMX6_ANALOG_TEMPMON_TEMPSENSE0_VALID))
sys/arm/freescale/imx/imx6_anatop.c
489
(val & IMX6_ANALOG_TEMPMON_TEMPSENSE0_TEMP_CNT_MASK) >>
sys/arm/freescale/imx/imx6_ccm.c
73
WR4(struct ccm_softc *sc, bus_size_t off, uint32_t val)
sys/arm/freescale/imx/imx6_ccm.c
76
bus_write_4(sc->mem_res, off, val);
sys/arm/freescale/imx/imx6_mp.c
105
uint32_t val;
sys/arm/freescale/imx/imx6_mp.c
125
val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_DIAG_CONTROL);
sys/arm/freescale/imx/imx6_mp.c
127
val | SCU_DIAG_DISABLE_MIGBIT);
sys/arm/freescale/imx/imx6_mp.c
136
val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG);
sys/arm/freescale/imx/imx6_mp.c
138
val | SCU_CONTROL_ENABLE);
sys/arm/freescale/imx/imx6_mp.c
145
val = bus_space_read_4(fdtbus_bs_tag, src, SRC_CONTROL_REG);
sys/arm/freescale/imx/imx6_mp.c
151
val |= ((1 << (SRC_CONTROL_C1ENA_SHIFT - 1 + i )) |
sys/arm/freescale/imx/imx6_mp.c
154
bus_space_write_4(fdtbus_bs_tag, src, SRC_CONTROL_REG, val);
sys/arm/freescale/imx/imx6_mp.c
78
uint32_t val;
sys/arm/freescale/imx/imx6_mp.c
86
val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONFIG_REG);
sys/arm/freescale/imx/imx6_mp.c
87
hwcpu = (val & SCU_CONFIG_REG_NCPU_MASK) + 1;
sys/arm/freescale/imx/imx6_src.c
64
WR4(struct src_softc *sc, bus_size_t off, uint32_t val)
sys/arm/freescale/imx/imx6_src.c
67
bus_write_4(sc->mem_res, off, val);
sys/arm/freescale/imx/imx_console.c
80
ub_setreg(uint32_t off, uint32_t val)
sys/arm/freescale/imx/imx_console.c
83
*((volatile uint32_t *)(imx_uart_base + off)) = val;
sys/arm/freescale/imx/imx_gpio.c
670
imx51_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/freescale/imx/imx_gpio.c
690
*val = (READ4(sc, IMX_GPIO_PSR_REG) >> pin) & 1;
sys/arm/freescale/imx/imx_gpio.c
692
*val = (READ4(sc, IMX_GPIO_DR_REG) >> pin) & 1;
sys/arm/freescale/imx/imx_i2c.c
216
i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val)
sys/arm/freescale/imx/imx_i2c.c
219
bus_write_1(sc->res, off, val);
sys/arm/freescale/imx/imx_iomux.c
112
WR4(struct iomux_softc *sc, bus_size_t off, uint32_t val)
sys/arm/freescale/imx/imx_iomux.c
115
bus_write_4(sc->mem_res, off, val);
sys/arm/freescale/imx/imx_iomux.c
119
iomux_configure_input(struct iomux_softc *sc, uint32_t reg, uint32_t val)
sys/arm/freescale/imx/imx_iomux.c
124
if (reg == 0 && val == 0)
sys/arm/freescale/imx/imx_iomux.c
134
if ((val & 0xff000000) == 0xff000000) {
sys/arm/freescale/imx/imx_iomux.c
135
select = val & 0x000000ff;
sys/arm/freescale/imx/imx_iomux.c
136
width = (val & 0x0000ff00) >> 8;
sys/arm/freescale/imx/imx_iomux.c
137
shift = (val & 0x00ff0000) >> 16;
sys/arm/freescale/imx/imx_iomux.c
139
val = (RD4(sc, reg) & ~mask) | (select << shift);
sys/arm/freescale/imx/imx_iomux.c
141
WR4(sc, reg, val);
sys/arm/freescale/imx/imx_iomux.c
277
imx_iomux_gpr_set(u_int regaddr, uint32_t val)
sys/arm/freescale/imx/imx_iomux.c
287
WR4(iomux_sc, regaddr, val);
sys/arm/freescale/imx/imx_iomux.c
294
uint32_t val;
sys/arm/freescale/imx/imx_iomux.c
302
val = RD4(iomux_sc, regaddr * 4);
sys/arm/freescale/imx/imx_iomux.c
303
val = (val & ~clrbits) | setbits;
sys/arm/freescale/imx/imx_iomux.c
304
WR4(iomux_sc, regaddr, val);
sys/arm/freescale/imx/imx_iomuxvar.h
44
void imx_iomux_gpr_set(u_int regaddr, uint32_t val);
sys/arm/freescale/imx/imx_wdog.c
94
WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val)
sys/arm/freescale/imx/imx_wdog.c
97
bus_write_2(sc->sc_res[MEMRES], offs, val);
sys/arm/freescale/vybrid/vf_gpio.c
246
vf_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/freescale/vybrid/vf_gpio.c
261
*val = (READ4(sc, GPIO_PDIR(i)) & (1 << (i % 32))) ? 1 : 0;
sys/arm/freescale/vybrid/vf_port.c
140
int val;
sys/arm/freescale/vybrid/vf_port.c
146
val = PCR_DMA_RE;
sys/arm/freescale/vybrid/vf_port.c
149
val = PCR_DMA_FE;
sys/arm/freescale/vybrid/vf_port.c
152
val = PCR_DMA_EE;
sys/arm/freescale/vybrid/vf_port.c
155
val = PCR_INT_LZ;
sys/arm/freescale/vybrid/vf_port.c
158
val = PCR_INT_RE;
sys/arm/freescale/vybrid/vf_port.c
161
val = PCR_INT_FE;
sys/arm/freescale/vybrid/vf_port.c
164
val = PCR_INT_EE;
sys/arm/freescale/vybrid/vf_port.c
167
val = PCR_INT_LO;
sys/arm/freescale/vybrid/vf_port.c
175
reg |= (val << PCR_IRQC_S);
sys/arm/include/atomic.h
101
atomic_add_64(volatile uint64_t *p, uint64_t val)
sys/arm/include/atomic.h
1019
: [val] "r" (v),
sys/arm/include/atomic.h
118
[val] "r" (val)
sys/arm/include/atomic.h
123
atomic_add_long(volatile u_long *p, u_long val)
sys/arm/include/atomic.h
126
atomic_add_32((volatile uint32_t *)p, val);
sys/arm/include/atomic.h
150
atomic_clear_64(volatile uint64_t *p, uint64_t val)
sys/arm/include/atomic.h
167
[val] "r" (val)
sys/arm/include/atomic.h
563
atomic_fetchadd_32(volatile uint32_t *p, uint32_t val)
sys/arm/include/atomic.h
574
: "+r" (ret), "=&r" (tmp), "+r" (tmp2), "+r" (p), "+r" (val)
sys/arm/include/atomic.h
580
atomic_fetchadd_64(volatile uint64_t *p, uint64_t val)
sys/arm/include/atomic.h
598
[val] "r" (val)
sys/arm/include/atomic.h
604
atomic_fetchadd_long(volatile u_long *p, u_long val)
sys/arm/include/atomic.h
607
return (atomic_fetchadd_32((volatile uint32_t *)p, val));
sys/arm/include/atomic.h
723
atomic_set_64(volatile uint64_t *p, uint64_t val)
sys/arm/include/atomic.h
740
[val] "r" (val)
sys/arm/include/atomic.h
756
atomic_subtract_32(volatile uint32_t *p, uint32_t val)
sys/arm/include/atomic.h
767
: "=&r" (tmp), "+r" (tmp2), "+r" (p), "+r" (val)
sys/arm/include/atomic.h
772
atomic_subtract_64(volatile uint64_t *p, uint64_t val)
sys/arm/include/atomic.h
789
[val] "r" (val)
sys/arm/include/atomic.h
794
atomic_subtract_long(volatile u_long *p, u_long val)
sys/arm/include/atomic.h
797
atomic_subtract_32((volatile uint32_t *)p, val);
sys/arm/include/atomic.h
805
atomic_store_64(volatile uint64_t *p, uint64_t val)
sys/arm/include/atomic.h
825
[val] "r" (val)
sys/arm/include/atomic.h
838
atomic_store_rel_64(volatile uint64_t *p, uint64_t val)
sys/arm/include/atomic.h
842
atomic_store_64(p, val);
sys/arm/include/atomic.h
85
atomic_add_32(volatile uint32_t *p, uint32_t val)
sys/arm/include/atomic.h
97
,"+r" (p), "+r" (val) : : "cc", "memory");
sys/arm/include/atomic.h
992
: [val] "r" (v),
sys/arm/include/pl310.h
175
pl310_write4(struct pl310_softc *sc, bus_size_t off, uint32_t val)
sys/arm/include/pl310.h
178
bus_write_4(sc->sc_mem_res, off, val);
sys/arm/mv/a37x0_gpio.c
175
a37x0_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/mv/a37x0_gpio.c
189
*val = ((reg & A37X0_GPIO_BIT(pin)) != 0) ? 1 : 0;
sys/arm/mv/a37x0_gpio.c
195
a37x0_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
sys/arm/mv/a37x0_gpio.c
205
if (val != 0)
sys/arm/mv/armada/wdt.c
194
mv_set_timer_control(uint32_t val)
sys/arm/mv/armada/wdt.c
197
bus_write_4(wdt_softc->wdt_res, CPU_TIMER_CONTROL, val);
sys/arm/mv/armada/wdt.c
201
mv_set_timer(uint32_t timer, uint32_t val)
sys/arm/mv/armada/wdt.c
204
bus_write_4(wdt_softc->wdt_res, CPU_TIMER0 + timer * 0x8, val);
sys/arm/mv/armada/wdt.c
209
uint32_t val, irq_cause, irq_mask;
sys/arm/mv/armada/wdt.c
219
val = read_cpu_ctrl(RSTOUTn_MASK);
sys/arm/mv/armada/wdt.c
220
val |= WD_RST_OUT_EN;
sys/arm/mv/armada/wdt.c
221
write_cpu_ctrl(RSTOUTn_MASK, val);
sys/arm/mv/armada/wdt.c
223
val = mv_get_timer_control();
sys/arm/mv/armada/wdt.c
224
val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO;
sys/arm/mv/armada/wdt.c
225
mv_set_timer_control(val);
sys/arm/mv/armada/wdt.c
231
uint32_t val, irq_cause;
sys/arm/mv/armada/wdt.c
237
val = read_cpu_mp_clocks(WD_RSTOUTn_MASK);
sys/arm/mv/armada/wdt.c
238
val |= (WD_GLOBAL_MASK | WD_CPU0_MASK);
sys/arm/mv/armada/wdt.c
239
write_cpu_mp_clocks(WD_RSTOUTn_MASK, val);
sys/arm/mv/armada/wdt.c
241
val = read_cpu_misc(RSTOUTn_MASK_ARMV7);
sys/arm/mv/armada/wdt.c
242
val &= ~RSTOUTn_MASK_WD;
sys/arm/mv/armada/wdt.c
243
write_cpu_misc(RSTOUTn_MASK_ARMV7, val);
sys/arm/mv/armada/wdt.c
249
uint32_t val, irq_cause;
sys/arm/mv/armada/wdt.c
257
val = mv_get_timer_control();
sys/arm/mv/armada/wdt.c
258
val |= CPU_TIMER_WD_EN | CPU_TIMER_WD_AUTO | CPU_TIMER_WD_25MHZ_EN;
sys/arm/mv/armada/wdt.c
259
mv_set_timer_control(val);
sys/arm/mv/armada/wdt.c
265
uint32_t val, irq_cause;
sys/arm/mv/armada/wdt.c
272
val = mv_get_timer_control();
sys/arm/mv/armada/wdt.c
273
val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO | CPU_TIMER_WD_25MHZ_EN;
sys/arm/mv/armada/wdt.c
274
mv_set_timer_control(val);
sys/arm/mv/armada/wdt.c
280
uint32_t val, irq_cause, irq_mask;
sys/arm/mv/armada/wdt.c
282
val = mv_get_timer_control();
sys/arm/mv/armada/wdt.c
283
val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO);
sys/arm/mv/armada/wdt.c
284
mv_set_timer_control(val);
sys/arm/mv/armada/wdt.c
286
val = read_cpu_ctrl(RSTOUTn_MASK);
sys/arm/mv/armada/wdt.c
287
val &= ~WD_RST_OUT_EN;
sys/arm/mv/armada/wdt.c
288
write_cpu_ctrl(RSTOUTn_MASK, val);
sys/arm/mv/armada/wdt.c
302
uint32_t val;
sys/arm/mv/armada/wdt.c
304
val = read_cpu_mp_clocks(WD_RSTOUTn_MASK);
sys/arm/mv/armada/wdt.c
305
val &= ~(WD_GLOBAL_MASK | WD_CPU0_MASK);
sys/arm/mv/armada/wdt.c
306
write_cpu_mp_clocks(WD_RSTOUTn_MASK, val);
sys/arm/mv/armada/wdt.c
308
val = read_cpu_misc(RSTOUTn_MASK_ARMV7);
sys/arm/mv/armada/wdt.c
309
val |= RSTOUTn_MASK_WD;
sys/arm/mv/armada/wdt.c
316
uint32_t val;
sys/arm/mv/armada/wdt.c
318
val = mv_get_timer_control();
sys/arm/mv/armada/wdt.c
319
val &= ~(CPU_TIMER_WD_EN | CPU_TIMER_WD_AUTO);
sys/arm/mv/armada/wdt.c
320
mv_set_timer_control(val);
sys/arm/mv/armada/wdt.c
328
uint32_t val;
sys/arm/mv/armada/wdt.c
330
val = mv_get_timer_control();
sys/arm/mv/armada/wdt.c
331
val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO);
sys/arm/mv/armada/wdt.c
332
mv_set_timer_control(val);
sys/arm/mv/armada38x/armada38x.c
126
uint32_t val;
sys/arm/mv/armada38x/armada38x.c
134
val = (MV_BOOTROM_WIN_SIZE & IO_WIN_SIZE_MASK) << IO_WIN_SIZE_SHIFT;
sys/arm/mv/armada38x/armada38x.c
135
val |= (MBUS_BOOTROM_ATTR & IO_WIN_ATTR_MASK) << IO_WIN_ATTR_SHIFT;
sys/arm/mv/armada38x/armada38x.c
136
val |= (MBUS_BOOTROM_TGT_ID & IO_WIN_TGT_MASK) << IO_WIN_TGT_SHIFT;
sys/arm/mv/armada38x/armada38x.c
138
val |= (0x1 & IO_WIN_SYNC_MASK) << IO_WIN_SYNC_SHIFT;
sys/arm/mv/armada38x/armada38x.c
139
val |= (0x1 & IO_WIN_ENA_MASK) << IO_WIN_ENA_SHIFT;
sys/arm/mv/armada38x/armada38x.c
143
val);
sys/arm/mv/armada38x/armada38x.c
204
uint32_t val;
sys/arm/mv/armada38x/armada38x.c
212
val = bus_space_read_4(fdtbus_bs_tag, vaddr_scu, MV_SCU_REG_CTRL);
sys/arm/mv/armada38x/armada38x.c
213
if (!(val & MV_SCU_ENABLE)) {
sys/arm/mv/armada38x/armada38x.c
215
val |= MV_SCU_SL_L2_ENABLE;
sys/arm/mv/armada38x/armada38x.c
218
val | MV_SCU_ENABLE);
sys/arm/mv/armada38x/armada38x_mp.c
113
val = bus_space_read_4(fdtbus_bs_tag, vaddr_scu, MV_SCU_REG_CONFIG);
sys/arm/mv/armada38x/armada38x_mp.c
115
reg_cpu_count = (val & SCU_CFG_REG_NCPU_MASK) + 1;
sys/arm/mv/armada38x/armada38x_mp.c
80
uint32_t val;
sys/arm/mv/armada38x/armada38x_pl310.c
69
mv_a38x_platform_pl310_write_ctrl(platform_t plat, struct pl310_softc *sc, uint32_t val)
sys/arm/mv/armada38x/armada38x_pl310.c
72
pl310_write4(sc, PL310_CTRL, val);
sys/arm/mv/armada38x/armada38x_pl310.c
76
mv_a38x_platform_pl310_write_debug(platform_t plat, struct pl310_softc *sc, uint32_t val)
sys/arm/mv/armada38x/armada38x_pl310.c
79
pl310_write4(sc, PL310_DEBUG_CTRL, val);
sys/arm/mv/armada38x/armada38x_pl310.h
32
void mv_a38x_platform_pl310_write_ctrl(platform_t plat, struct pl310_softc *sc, uint32_t val);
sys/arm/mv/armada38x/armada38x_pl310.h
33
void mv_a38x_platform_pl310_write_debug(platform_t plat, struct pl310_softc *sc, uint32_t val);
sys/arm/mv/armada38x/armada38x_rtc.c
118
uint32_t val);
sys/arm/mv/armada38x/armada38x_rtc.c
254
uint32_t val, val_check;
sys/arm/mv/armada38x/armada38x_rtc.c
265
val = mv_rtc_reg_read(sc, RTC_TIME);
sys/arm/mv/armada38x/armada38x_rtc.c
268
} while ((val_check - val) > 1);
sys/arm/mv/armada38x/armada38x_rtc.c
325
mv_rtc_reg_write(struct mv_rtc_softc *sc, bus_size_t off, uint32_t val)
sys/arm/mv/armada38x/armada38x_rtc.c
328
bus_write_4(sc->res[RTC_RES], off, val);
sys/arm/mv/armada38x/armada38x_rtc.c
337
int val;
sys/arm/mv/armada38x/armada38x_rtc.c
339
val = bus_read_4(sc->res[RTC_SOC_RES], A38X_RTC_BRIDGE_TIMING_CTRL);
sys/arm/mv/armada38x/armada38x_rtc.c
340
val &= ~(A38X_RTC_WRCLK_PERIOD_MASK | A38X_RTC_READ_OUTPUT_DELAY_MASK);
sys/arm/mv/armada38x/armada38x_rtc.c
341
val |= A38X_RTC_WRCLK_PERIOD_MAX << A38X_RTC_WRCLK_PERIOD_SHIFT;
sys/arm/mv/armada38x/armada38x_rtc.c
342
val |= A38X_RTC_READ_OUTPUT_DELAY_MAX << A38X_RTC_READ_OUTPUT_DELAY_SHIFT;
sys/arm/mv/armada38x/armada38x_rtc.c
343
bus_write_4(sc->res[RTC_SOC_RES], A38X_RTC_BRIDGE_TIMING_CTRL, val);
sys/arm/mv/armada38x/armada38x_rtc.c
349
int val;
sys/arm/mv/armada38x/armada38x_rtc.c
351
val = bus_read_4(sc->res[RTC_SOC_RES], A8K_RTC_BRIDGE_TIMING_CTRL0);
sys/arm/mv/armada38x/armada38x_rtc.c
352
val &= ~(A8K_RTC_WRCLK_PERIOD_MASK | A8K_RTC_WRCLK_SETUP_MASK);
sys/arm/mv/armada38x/armada38x_rtc.c
353
val |= A8K_RTC_WRCLK_PERIOD_VAL << A8K_RTC_WRCLK_PERIOD_SHIFT;
sys/arm/mv/armada38x/armada38x_rtc.c
354
val |= A8K_RTC_WRCLK_SETUP_VAL << A8K_RTC_WRCLK_SETUP_SHIFT;
sys/arm/mv/armada38x/armada38x_rtc.c
355
bus_write_4(sc->res[RTC_SOC_RES], A8K_RTC_BRIDGE_TIMING_CTRL1, val);
sys/arm/mv/armada38x/armada38x_rtc.c
357
val = bus_read_4(sc->res[RTC_SOC_RES], A8K_RTC_BRIDGE_TIMING_CTRL0);
sys/arm/mv/armada38x/armada38x_rtc.c
358
val &= ~A8K_RTC_READ_OUTPUT_DELAY_MASK;
sys/arm/mv/armada38x/armada38x_rtc.c
359
val |= A8K_RTC_READ_OUTPUT_DELAY_VAL << A8K_RTC_READ_OUTPUT_DELAY_SHIFT;
sys/arm/mv/armada38x/armada38x_rtc.c
360
bus_write_4(sc->res[RTC_SOC_RES], A8K_RTC_BRIDGE_TIMING_CTRL1, val);
sys/arm/mv/armadaxp/armadaxp.c
123
write_coher_fabric(uint32_t reg, uint32_t val)
sys/arm/mv/armadaxp/armadaxp.c
126
bus_space_write_4(fdtbus_bs_tag, MV_COHERENCY_FABRIC_BASE, reg, val);
sys/arm/mv/armadaxp/armadaxp.c
142
uint32_t val, cpus, mask;
sys/arm/mv/armadaxp/armadaxp.c
146
val = read_coher_fabric(COHER_FABRIC_CTRL);
sys/arm/mv/armadaxp/armadaxp.c
147
val |= (mask << 24);
sys/arm/mv/armadaxp/armadaxp.c
148
write_coher_fabric(COHER_FABRIC_CTRL, val);
sys/arm/mv/armadaxp/armadaxp.c
150
val = read_coher_fabric(COHER_FABRIC_CONF);
sys/arm/mv/armadaxp/armadaxp.c
151
val |= (mask << 24);
sys/arm/mv/armadaxp/armadaxp.c
152
val |= (1 << 15);
sys/arm/mv/armadaxp/armadaxp.c
153
write_coher_fabric(COHER_FABRIC_CONF, val);
sys/arm/mv/armadaxp/armadaxp.c
167
write_l2_cache(uint32_t reg, uint32_t val)
sys/arm/mv/armadaxp/armadaxp.c
170
bus_space_write_4(fdtbus_bs_tag, ARMADAXP_L2_BASE, reg, val);
sys/arm/mv/armadaxp/armadaxp_mp.c
82
write_cpu_clkdiv(uint32_t reg, uint32_t val)
sys/arm/mv/armadaxp/armadaxp_mp.c
85
bus_space_write_4(fdtbus_bs_tag, MV_AXP_CPU_DIVCLK_BASE, reg, val);
sys/arm/mv/clk/a37x0_periph_clk_driver.c
180
a37x0_periph_clk_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm/mv/clk/a37x0_periph_clk_driver.c
185
*val = bus_read_4(sc->res, addr);
sys/arm/mv/clk/a37x0_tbg.c
116
a37x0_tbg_read_4(device_t dev, bus_addr_t offset, uint32_t *val)
sys/arm/mv/clk/a37x0_tbg.c
122
*val = bus_read_4(sc->res, offset);
sys/arm/mv/clk/a37x0_tbg_pll.c
42
#define RD4(_clk, offset, val) \
sys/arm/mv/clk/a37x0_tbg_pll.c
43
CLKDEV_READ_4(clknode_get_device(_clk), offset, val)
sys/arm/mv/clk/a37x0_tbg_pll.c
57
unsigned int val;
sys/arm/mv/clk/a37x0_tbg_pll.c
61
RD4(clk, sc->tbg_bypass.offset, &val);
sys/arm/mv/clk/a37x0_tbg_pll.c
62
if ((val >> sc->tbg_bypass.shift) & sc->tbg_bypass.mask)
sys/arm/mv/clk/a37x0_tbg_pll.c
65
RD4(clk, sc->vcodiv.offset, &val);
sys/arm/mv/clk/a37x0_tbg_pll.c
66
vcodiv = 1 << ((val >> sc->vcodiv.shift) & sc->vcodiv.mask);
sys/arm/mv/clk/a37x0_tbg_pll.c
68
RD4(clk, sc->refdiv.offset, &val);
sys/arm/mv/clk/a37x0_tbg_pll.c
69
refdiv = (val >> sc->refdiv.shift) & sc->refdiv.mask;
sys/arm/mv/clk/a37x0_tbg_pll.c
71
RD4(clk, sc->fbdiv.offset, &val);
sys/arm/mv/clk/a37x0_tbg_pll.c
72
fbdiv = (val >> sc->fbdiv.shift) & sc->fbdiv.mask;
sys/arm/mv/clk/armada38x_coreclk.c
100
armada38x_coreclk_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm/mv/clk/armada38x_coreclk.c
109
bus_write_4(sc->res, addr, val);
sys/arm/mv/clk/armada38x_coreclk.c
85
armada38x_coreclk_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm/mv/clk/armada38x_coreclk.c
94
*val = bus_read_4(sc->res, addr);
sys/arm/mv/clk/armada38x_gateclk.c
234
armada38x_gateclk_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm/mv/clk/armada38x_gateclk.c
241
WR4(sc, addr, val);
sys/arm/mv/clk/armada38x_gateclk.c
246
armada38x_gateclk_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm/mv/clk/armada38x_gateclk.c
253
*val = RD4(sc, addr);
sys/arm/mv/clk/armada38x_gateclk.c
54
#define WR4(_sc, addr, val) bus_write_4(_sc->res, addr, val)
sys/arm/mv/clk/armada38x_gen.c
45
#define WR4(_clk, offset, val) \
sys/arm/mv/clk/armada38x_gen.c
46
CLKDEV_WRITE_4(clknode_get_device(_clk), offset, val)
sys/arm/mv/clk/armada38x_gen.c
47
#define RD4(_clk, offset, val) \
sys/arm/mv/clk/armada38x_gen.c
48
CLKDEV_READ_4(clknode_get_device(_clk), offset, val)
sys/arm/mv/clk/periph.h
53
#define RD4(_clk, offset, val) \
sys/arm/mv/clk/periph.h
54
CLKDEV_READ_4(clknode_get_device(_clk), offset, val)
sys/arm/mv/gpio.c
1035
mv_gpio_value_set(device_t dev, uint32_t pin, uint8_t val)
sys/arm/mv/gpio.c
1048
if (val)
sys/arm/mv/gpio.c
824
mv_gpio_out(device_t dev, uint32_t pin, uint8_t val, uint8_t enable)
sys/arm/mv/gpio.c
831
mv_gpio_value_set(dev, pin, val);
sys/arm/mv/gpio.c
872
mv_gpio_reg_write(device_t dev, uint32_t reg, uint32_t val)
sys/arm/mv/gpio.c
877
bus_space_write_4(sc->bst, sc->bsh, sc->offset + reg, val);
sys/arm/mv/mpic.c
156
#define MPIC_WRITE(softc, reg, val) \
sys/arm/mv/mpic.c
157
bus_space_write_4((softc)->mpic_bst, (softc)->mpic_bsh, (reg), (val))
sys/arm/mv/mpic.c
161
#define MPIC_CPU_WRITE(softc, reg, val) \
sys/arm/mv/mpic.c
162
bus_space_write_4((softc)->cpu_bst, (softc)->cpu_bsh, (reg), (val))
sys/arm/mv/mpic.c
166
#define MPIC_DRBL_WRITE(softc, reg, val) \
sys/arm/mv/mpic.c
167
bus_space_write_4((softc)->drbl_bst, (softc)->drbl_bsh, (reg), (val))
sys/arm/mv/mpic.c
222
uint32_t val;
sys/arm/mv/mpic.c
261
val = MPIC_READ(mv_mpic_sc, MPIC_CTRL);
sys/arm/mv/mpic.c
262
sc->nirqs = MPIC_CTRL_NIRQS(val);
sys/arm/mv/mpic.c
569
uint32_t val, i;
sys/arm/mv/mpic.c
571
val = 0x00000000;
sys/arm/mv/mpic.c
574
val |= (1 << (8 + i));
sys/arm/mv/mpic.c
575
val |= ipi;
sys/arm/mv/mpic.c
576
MPIC_WRITE(mv_mpic_sc, MPIC_SOFT_INT, val);
sys/arm/mv/mpic.c
582
uint32_t val;
sys/arm/mv/mpic.c
585
val = MPIC_CPU_READ(mv_mpic_sc, MPIC_IN_DRBL);
sys/arm/mv/mpic.c
586
if (val) {
sys/arm/mv/mpic.c
587
ipi = ffs(val) - 1;
sys/arm/mv/mv_ap806_clock.c
101
#define WR4(sc, reg, val) SYSCON_WRITE_4((sc)->syscon, (reg), (val))
sys/arm/mv/mv_ap806_gicp.c
79
#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/arm/mv/mv_ap806_sei.c
103
#define WR4(sc, reg, val) bus_write_4((sc)->mem_res, (reg), (val))
sys/arm/mv/mv_ap806_sei.c
111
struct mv_ap806_sei_irqsrc *sisrc, uint32_t val)
sys/arm/mv/mv_ap806_sei.c
119
if (val != 0)
sys/arm/mv/mv_common.c
1318
eth_bare_write(uint32_t base, int i, int val)
sys/arm/mv/mv_common.c
1324
v |= (val << i);
sys/arm/mv/mv_common.c
1329
eth_epap_write(uint32_t base, int i, int val)
sys/arm/mv/mv_common.c
1335
v |= (val << (i * 2));
sys/arm/mv/mv_common.c
443
write_cpu_ctrl(uint32_t reg, uint32_t val)
sys/arm/mv/mv_common.c
447
soc_decode_win_spec->write_cpu_ctrl(reg, val);
sys/arm/mv/mv_common.c
451
write_cpu_ctrl_armv7(uint32_t reg, uint32_t val)
sys/arm/mv/mv_common.c
454
bus_space_write_4(fdtbus_bs_tag, MV_CPU_CONTROL_BASE_ARMV7, reg, val);
sys/arm/mv/mv_common.c
465
write_cpu_mp_clocks(uint32_t reg, uint32_t val)
sys/arm/mv/mv_common.c
468
bus_space_write_4(fdtbus_bs_tag, MV_MP_CLOCKS_BASE, reg, val);
sys/arm/mv/mv_common.c
479
write_cpu_misc(uint32_t reg, uint32_t val)
sys/arm/mv/mv_common.c
482
bus_space_write_4(fdtbus_bs_tag, MV_MISC_BASE, reg, val);
sys/arm/mv/mv_common.c
660
win_cpu_cr_write(int i, uint32_t val)
sys/arm/mv/mv_common.c
664
soc_decode_win_spec->cr_write(i, val);
sys/arm/mv/mv_common.c
668
win_cpu_br_write(int i, uint32_t val)
sys/arm/mv/mv_common.c
672
soc_decode_win_spec->br_write(i, val);
sys/arm/mv/mv_common.c
676
win_cpu_remap_l_write(int i, uint32_t val)
sys/arm/mv/mv_common.c
680
soc_decode_win_spec->remap_l_write(i, val);
sys/arm/mv/mv_common.c
684
win_cpu_remap_h_write(int i, uint32_t val)
sys/arm/mv/mv_common.c
688
soc_decode_win_spec->remap_h_write(i, val);
sys/arm/mv/mv_common.c
772
ddr_br_write(int i, uint32_t val)
sys/arm/mv/mv_common.c
776
soc_decode_win_spec->ddr_br_write(i, val);
sys/arm/mv/mv_common.c
780
ddr_sz_write(int i, uint32_t val)
sys/arm/mv/mv_common.c
784
soc_decode_win_spec->ddr_sz_write(i, val);
sys/arm/mv/mv_common.c
84
void write_cpu_ctrl_armv7(uint32_t reg, uint32_t val);
sys/arm/mv/mv_cp110_clock.c
135
#define WR4(sc, reg, val) SYSCON_WRITE_4((sc)->syscon, (reg), (val))
sys/arm/mv/mv_cp110_clock.c
286
mv_cp110_clock_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm/mv/mv_cp110_clock.c
291
WR4(sc, addr, val);
sys/arm/mv/mv_cp110_clock.c
296
mv_cp110_clock_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm/mv/mv_cp110_clock.c
302
*val = RD4(sc, addr);
sys/arm/mv/mv_cp110_icu.c
100
#define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/arm/mv/mv_pci.c
1214
u_int reg, uint32_t val, int bytes)
sys/arm/mv/mv_pci.c
1223
mv_pcib_hw_cfgwrite(sc, bus, slot, func, reg, val, bytes);
sys/arm/mv/mv_pci.c
451
uint32_t val, reg0;
sys/arm/mv/mv_pci.c
504
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_CONTROL);
sys/arm/mv/mv_pci.c
505
sc->sc_mode = (val & PCIE_CONTROL_ROOT_CMPLX ? MV_MODE_ROOT :
sys/arm/mv/mv_pci.c
579
uint32_t val;
sys/arm/mv/mv_pci.c
594
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
sys/arm/mv/mv_pci.c
596
while (((val & PCIE_STATUS_LINK_DOWN) == 1) && (timeout > 0)) {
sys/arm/mv/mv_pci.c
599
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
sys/arm/mv/mv_pci.c
609
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIR_COMMAND);
sys/arm/mv/mv_pci.c
610
val |= PCIM_CMD_SERRESPEN | PCIM_CMD_BUSMASTEREN |
sys/arm/mv/mv_pci.c
612
bus_space_write_4(sc->sc_bst, sc->sc_bsh, PCIR_COMMAND, val);
sys/arm/mv/mv_thermal.c
123
#define WR4(sc, reg, val) \
sys/arm/mv/mv_thermal.c
124
SYSCON_WRITE_4((sc)->syscon, sc->config->regs[reg], (val))
sys/arm/mv/mv_thermal.c
260
int val = 0;
sys/arm/mv/mv_thermal.c
265
if (mv_thermal_read_sensor(sc, sensor, &val) == 0) {
sys/arm/mv/mv_thermal.c
267
val = val + 2732;
sys/arm/mv/mv_thermal.c
273
return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
sys/arm/mv/mvebu_gpio.c
123
struct gpio_pin *pin, uint32_t val)
sys/arm/mv/mvebu_gpio.c
129
(val & 1) << bit);
sys/arm/mv/mvebu_gpio.c
136
uint32_t val;
sys/arm/mv/mvebu_gpio.c
139
val = SYSCON_READ_4(sc->syscon,
sys/arm/mv/mvebu_gpio.c
142
return (val >> bit) & 1;
sys/arm/mv/mvebu_gpio.c
147
struct gpio_pin *pin, uint32_t val)
sys/arm/mv/mvebu_gpio.c
153
1 << bit, (val & 1) << bit);
sys/arm/mv/mvebu_gpio.c
268
mvebu_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/mv/mvebu_gpio.c
277
*val = gpio_read(sc, GPIO_DATA_IN, &sc->gpio_pins[pin]);
sys/arm/mv/mvebu_gpio.c
278
*val ^= gpio_read(sc, GPIO_DATA_IN_POL, &sc->gpio_pins[pin]);
sys/arm/mv/mvebu_gpio.c
288
uint32_t val;
sys/arm/mv/mvebu_gpio.c
295
mvebu_gpio_pin_get(sc->dev, pin, &val);
sys/arm/mv/mvebu_gpio.c
296
if (val != 0)
sys/arm/mv/mvebu_gpio.c
312
struct mvebu_gpio_irqsrc *mgi, uint32_t val)
sys/arm/mv/mvebu_gpio.c
319
(val & 1) << bit);
sys/arm/mv/mvebu_gpio.c
324
struct mvebu_gpio_irqsrc *mgi, uint32_t val)
sys/arm/mv/mvebu_gpio.c
328
intr_modify(sc, GPIO_INT_LEVEL_MASK, mgi, val);
sys/arm/mv/mvebu_gpio.c
330
intr_modify(sc, GPIO_INT_MASK, mgi, val);
sys/arm/mv/mvebu_pinctrl.c
107
#define WR4(sc, reg, val) SYSCON_WRITE_4((sc)->syscon, (reg), (val))
sys/arm/mv/mvvar.h
109
void write_cpu_mp_clocks(uint32_t reg, uint32_t val);
sys/arm/mv/mvvar.h
111
void write_cpu_misc(uint32_t reg, uint32_t val);
sys/arm/mv/mvvar.h
124
void mv_drbl_set_mask(uint32_t val, int dir, int unit);
sys/arm/mv/mvvar.h
126
void mv_drbl_set_cause(uint32_t val, int dir, int unit);
sys/arm/mv/mvvar.h
128
void mv_drbl_set_msg(uint32_t val, int mnr, int dir, int unit);
sys/arm/mv/mvwin.h
309
pre ## _ ## reg ## _write(int i, uint32_t val) \
sys/arm/mv/mvwin.h
311
bus_space_write_4(fdtbus_bs_tag, base, off(i), val); \
sys/arm/mv/mvwin.h
316
pre ## _ ## reg ## _write(int i, int j, uint32_t val) \
sys/arm/mv/mvwin.h
318
bus_space_write_4(fdtbus_bs_tag, base, off(i, j), val); \
sys/arm/mv/mvwin.h
323
pre ## _ ## reg ## _write(uint32_t base, int i, uint32_t val) \
sys/arm/mv/mvwin.h
325
bus_space_write_4(fdtbus_bs_tag, base, off(i), val); \
sys/arm/mv/mvwin.h
330
pre ## _ ## reg ## _write(uint32_t base, int i, int j, uint32_t val) \
sys/arm/mv/mvwin.h
332
bus_space_write_4(fdtbus_bs_tag, base, off(i, j), val); \
sys/arm/mv/mvwin.h
351
pre ## _ ## reg ## _write(uint32_t val) \
sys/arm/mv/mvwin.h
353
bus_space_write_4(fdtbus_bs_tag, base, off, val); \
sys/arm/mv/mvwin.h
358
pre ## _ ## reg ## _write(uint32_t base, uint32_t val) \
sys/arm/mv/mvwin.h
360
bus_space_write_4(fdtbus_bs_tag, base, off, val); \
sys/arm/mv/rtc.c
132
uint32_t val;
sys/arm/mv/rtc.c
136
val = mv_rtc_reg_read(sc, MV_RTC_TIME_REG);
sys/arm/mv/rtc.c
139
ct.sec = FROMBCD(val & 0x7f);
sys/arm/mv/rtc.c
140
ct.min = FROMBCD((val & 0x7f00) >> 8);
sys/arm/mv/rtc.c
141
ct.hour = FROMBCD((val & 0x3f0000) >> 16);
sys/arm/mv/rtc.c
142
ct.dow = FROMBCD((val & 0x7000000) >> 24) - 1;
sys/arm/mv/rtc.c
144
val = mv_rtc_reg_read(sc, MV_RTC_DATE_REG);
sys/arm/mv/rtc.c
146
ct.day = FROMBCD(val & 0x7f);
sys/arm/mv/rtc.c
147
ct.mon = FROMBCD((val & 0x1f00) >> 8);
sys/arm/mv/rtc.c
148
ct.year = YEAR_BASE + FROMBCD((val & 0xff0000) >> 16);
sys/arm/mv/rtc.c
158
uint32_t val;
sys/arm/mv/rtc.c
168
val = TOBCD(ct.sec) | (TOBCD(ct.min) << 8) |
sys/arm/mv/rtc.c
170
mv_rtc_reg_write(sc, MV_RTC_TIME_REG, val);
sys/arm/mv/rtc.c
172
val = TOBCD(ct.day) | (TOBCD(ct.mon) << 8) |
sys/arm/mv/rtc.c
174
mv_rtc_reg_write(sc, MV_RTC_DATE_REG, val);
sys/arm/mv/rtc.c
187
mv_rtc_reg_write(struct mv_rtc_softc *sc, bus_size_t off, uint32_t val)
sys/arm/mv/rtc.c
190
bus_write_4(sc->res[0], off, val);
sys/arm/mv/rtc.c
75
uint32_t val);
sys/arm/mv/timer.c
295
uint32_t val, val_temp;
sys/arm/mv/timer.c
298
val = mv_get_timer(1);
sys/arm/mv/timer.c
303
if (val > val_temp)
sys/arm/mv/timer.c
304
nticks -= (val - val_temp);
sys/arm/mv/timer.c
306
nticks -= (val + (INITIAL_TIMECOUNTER - val_temp));
sys/arm/mv/timer.c
308
val = val_temp;
sys/arm/mv/timer.c
316
uint32_t val;
sys/arm/mv/timer.c
320
for (val = 100; val > 0; val--)
sys/arm/mv/timer.c
339
mv_set_timer_control(uint32_t val)
sys/arm/mv/timer.c
343
timer_softc->timer_bsh, CPU_TIMER_CONTROL, val);
sys/arm/mv/timer.c
355
mv_set_timer(uint32_t timer, uint32_t val)
sys/arm/mv/timer.c
359
timer_softc->timer_bsh, CPU_TIMER0 + timer * 0x8, val);
sys/arm/mv/timer.c
363
mv_set_timer_rel(uint32_t timer, uint32_t val)
sys/arm/mv/timer.c
367
timer_softc->timer_bsh, CPU_TIMER0_REL + timer * 0x8, val);
sys/arm/mv/timer.c
373
uint32_t irq_cause, val;
sys/arm/mv/timer.c
379
val = read_cpu_mp_clocks(WD_RSTOUTn_MASK);
sys/arm/mv/timer.c
380
val |= (WD_GLOBAL_MASK | WD_CPU0_MASK);
sys/arm/mv/timer.c
381
write_cpu_mp_clocks(WD_RSTOUTn_MASK, val);
sys/arm/mv/timer.c
383
val = read_cpu_misc(RSTOUTn_MASK_ARMV7);
sys/arm/mv/timer.c
384
val &= ~RSTOUTn_MASK_WD;
sys/arm/mv/timer.c
385
write_cpu_misc(RSTOUTn_MASK_ARMV7, val);
sys/arm/mv/timer.c
387
val = mv_get_timer_control();
sys/arm/mv/timer.c
388
val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO | CPU_TIMER_WD_25MHZ_EN;
sys/arm/mv/timer.c
389
mv_set_timer_control(val);
sys/arm/mv/timer.c
395
uint32_t val, irq_cause;
sys/arm/mv/timer.c
397
val = read_cpu_mp_clocks(WD_RSTOUTn_MASK);
sys/arm/mv/timer.c
398
val &= ~(WD_GLOBAL_MASK | WD_CPU0_MASK);
sys/arm/mv/timer.c
399
write_cpu_mp_clocks(WD_RSTOUTn_MASK, val);
sys/arm/mv/timer.c
401
val = read_cpu_misc(RSTOUTn_MASK_ARMV7);
sys/arm/mv/timer.c
402
val |= RSTOUTn_MASK_WD;
sys/arm/mv/timer.c
409
val = mv_get_timer_control();
sys/arm/mv/timer.c
410
val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO);
sys/arm/mv/timer.c
411
mv_set_timer_control(val);
sys/arm/mv/timer.c
451
uint32_t val, val1;
sys/arm/mv/timer.c
456
val = ((uint32_t)sc->et.et_frequency * period) >> 32;
sys/arm/mv/timer.c
458
val = 0;
sys/arm/mv/timer.c
462
val1 = val;
sys/arm/mv/timer.c
465
mv_set_timer_rel(0, val);
sys/arm/mv/timer.c
467
val = mv_get_timer_control();
sys/arm/mv/timer.c
468
val |= CPU_TIMER0_EN;
sys/arm/mv/timer.c
470
val |= CPU_TIMER0_AUTO;
sys/arm/mv/timer.c
472
val &= ~CPU_TIMER0_AUTO;
sys/arm/mv/timer.c
473
mv_set_timer_control(val);
sys/arm/mv/timer.c
480
uint32_t val;
sys/arm/mv/timer.c
482
val = mv_get_timer_control();
sys/arm/mv/timer.c
483
val &= ~(CPU_TIMER0_EN | CPU_TIMER0_AUTO);
sys/arm/mv/timer.c
484
mv_set_timer_control(val);
sys/arm/mv/timer.c
491
uint32_t val;
sys/arm/mv/timer.c
495
val = mv_get_timer_control();
sys/arm/mv/timer.c
496
val &= ~(CPU_TIMER0_EN | CPU_TIMER0_AUTO);
sys/arm/mv/timer.c
497
val |= CPU_TIMER1_EN | CPU_TIMER1_AUTO;
sys/arm/mv/timer.c
501
val |= CPU_TIMER0_25MHZ_EN | CPU_TIMER1_25MHZ_EN;
sys/arm/mv/timer.c
504
mv_set_timer_control(val);
sys/arm/nvidia/as3722.c
125
as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val)
sys/arm/nvidia/as3722.c
136
data[1] = val;
sys/arm/nvidia/as3722.c
173
uint8_t val;
sys/arm/nvidia/as3722.c
176
rv = as3722_read(sc, reg, &val);
sys/arm/nvidia/as3722.c
180
val &= ~clear;
sys/arm/nvidia/as3722.c
181
val |= set;
sys/arm/nvidia/as3722.c
183
rv = as3722_write(sc, reg, val);
sys/arm/nvidia/as3722.c
77
as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val)
sys/arm/nvidia/as3722.c
83
{0, IIC_M_RD, 1, val},
sys/arm/nvidia/as3722.h
283
#define RD1(sc, reg, val) as3722_read(sc, reg, val)
sys/arm/nvidia/as3722.h
284
#define WR1(sc, reg, val) as3722_write(sc, reg, val)
sys/arm/nvidia/as3722.h
287
int as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val);
sys/arm/nvidia/as3722.h
288
int as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val);
sys/arm/nvidia/as3722.h
314
int as3722_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
sys/arm/nvidia/as3722_gpio.c
452
as3722_gpio_pin_set(device_t dev, uint32_t pin, uint32_t val)
sys/arm/nvidia/as3722_gpio.c
462
tmp = (val != 0) ? 1 : 0;
sys/arm/nvidia/as3722_gpio.c
473
as3722_gpio_pin_get(device_t dev, uint32_t pin, uint32_t *val)
sys/arm/nvidia/as3722_gpio.c
495
*val = tmp & (1 << pin) ? 1 : 0;
sys/arm/nvidia/as3722_gpio.c
497
*val ^= 1;
sys/arm/nvidia/as3722_regulators.c
415
uint8_t val;
sys/arm/nvidia/as3722_regulators.c
418
rv = RD1(sc->base_sc, AS3722_FUSE7, &val);
sys/arm/nvidia/as3722_regulators.c
421
return (val & AS3722_FUSE7_SD0_LOW_VOLTAGE ? true : false);
sys/arm/nvidia/as3722_regulators.c
427
uint8_t val;
sys/arm/nvidia/as3722_regulators.c
430
val = ext_pwr_ctrl << (ffs(sc->def->ext_enable_mask) - 1);
sys/arm/nvidia/as3722_regulators.c
432
sc->def->ext_enable_mask, val);
sys/arm/nvidia/as3722_regulators.c
656
as3722_regnode_enable(struct regnode *regnode, bool val, int *udelay)
sys/arm/nvidia/as3722_regulators.c
663
if (val)
sys/arm/nvidia/drm2/tegra_dc.c
1028
val |= CURSOR_CLIP(CC_DISPLAY);
sys/arm/nvidia/drm2/tegra_dc.c
1029
val |= CURSOR_START_ADDR(crtc->cursor_pbase);
sys/arm/nvidia/drm2/tegra_dc.c
1030
WR4(sc, DC_DISP_CURSOR_START_ADDR, val);
sys/arm/nvidia/drm2/tegra_dc.c
1032
val = RD4(sc, DC_DISP_BLEND_CURSOR_CONTROL);
sys/arm/nvidia/drm2/tegra_dc.c
1033
val &= ~CURSOR_DST_BLEND_FACTOR_SELECT(~0);
sys/arm/nvidia/drm2/tegra_dc.c
1034
val &= ~CURSOR_SRC_BLEND_FACTOR_SELECT(~0);
sys/arm/nvidia/drm2/tegra_dc.c
1035
val |= CURSOR_MODE_SELECT;
sys/arm/nvidia/drm2/tegra_dc.c
1036
val |= CURSOR_DST_BLEND_FACTOR_SELECT(DST_NEG_K1_TIMES_SRC);
sys/arm/nvidia/drm2/tegra_dc.c
1037
val |= CURSOR_SRC_BLEND_FACTOR_SELECT(SRC_BLEND_K1_TIMES_SRC);
sys/arm/nvidia/drm2/tegra_dc.c
1038
val |= CURSOR_ALPHA(~0);
sys/arm/nvidia/drm2/tegra_dc.c
1039
WR4(sc, DC_DISP_BLEND_CURSOR_CONTROL, val);
sys/arm/nvidia/drm2/tegra_dc.c
1041
val = RD4(sc, DC_DISP_DISP_WIN_OPTIONS);
sys/arm/nvidia/drm2/tegra_dc.c
1042
val |= CURSOR_ENABLE;
sys/arm/nvidia/drm2/tegra_dc.c
1043
WR4(sc, DC_DISP_DISP_WIN_OPTIONS, val);
sys/arm/nvidia/drm2/tegra_dc.c
1045
val = RD4(sc, DC_DISP_DISP_WIN_OPTIONS);
sys/arm/nvidia/drm2/tegra_dc.c
1046
val &= ~CURSOR_ENABLE;
sys/arm/nvidia/drm2/tegra_dc.c
1047
WR4(sc, DC_DISP_DISP_WIN_OPTIONS, val);
sys/arm/nvidia/drm2/tegra_dc.c
1120
uint32_t val;
sys/arm/nvidia/drm2/tegra_dc.c
1125
val = enable ? CTRL_MODE_C_DISPLAY: CTRL_MODE_STOP;
sys/arm/nvidia/drm2/tegra_dc.c
1126
WR4(sc, DC_CMD_DISPLAY_COMMAND, DISPLAY_CTRL_MODE(val));
sys/arm/nvidia/drm2/tegra_dc.c
1137
uint32_t val;
sys/arm/nvidia/drm2/tegra_dc.c
1141
val = RD4(sc, DC_DISP_DISP_WIN_OPTIONS);
sys/arm/nvidia/drm2/tegra_dc.c
1143
val |= HDMI_ENABLE;
sys/arm/nvidia/drm2/tegra_dc.c
1145
val &= ~HDMI_ENABLE;
sys/arm/nvidia/drm2/tegra_dc.c
1146
WR4(sc, DC_DISP_DISP_WIN_OPTIONS, val);
sys/arm/nvidia/drm2/tegra_dc.c
290
uint32_t val;
sys/arm/nvidia/drm2/tegra_dc.c
292
val = (src - 1) << 12 ; /* 4.12 fixed float */
sys/arm/nvidia/drm2/tegra_dc.c
293
val /= (dst - 1);
sys/arm/nvidia/drm2/tegra_dc.c
294
if (val > (maxscale << 12))
sys/arm/nvidia/drm2/tegra_dc.c
295
val = maxscale << 12;
sys/arm/nvidia/drm2/tegra_dc.c
296
return val;
sys/arm/nvidia/drm2/tegra_dc.c
356
uint32_t val;
sys/arm/nvidia/drm2/tegra_dc.c
422
val = WINDOW_A_SELECT << index;
sys/arm/nvidia/drm2/tegra_dc.c
423
WR4(sc, DC_CMD_DISPLAY_WINDOW_HEADER, val);
sys/arm/nvidia/drm2/tegra_dc.c
456
val = win->surface_kind;
sys/arm/nvidia/drm2/tegra_dc.c
458
val |= SURFACE_KIND_BLOCK_HEIGHT(win->block_height);
sys/arm/nvidia/drm2/tegra_dc.c
459
WR4(sc, DC_WINBUF_SURFACE_KIND, val);
sys/arm/nvidia/drm2/tegra_dc.c
473
val = WIN_ENABLE;
sys/arm/nvidia/drm2/tegra_dc.c
475
val |= CSC_ENABLE;
sys/arm/nvidia/drm2/tegra_dc.c
477
val |= COLOR_EXPAND;
sys/arm/nvidia/drm2/tegra_dc.c
479
val |= V_DIRECTION;
sys/arm/nvidia/drm2/tegra_dc.c
481
val |= H_DIRECTION;
sys/arm/nvidia/drm2/tegra_dc.c
483
val |= SCAN_COLUMN;
sys/arm/nvidia/drm2/tegra_dc.c
484
WR4(sc, DC_WINC_WIN_OPTIONS, val);
sys/arm/nvidia/drm2/tegra_dc.c
549
uint32_t val, idx;
sys/arm/nvidia/drm2/tegra_dc.c
563
val = RD4(sc, DC_WINC_WIN_OPTIONS);
sys/arm/nvidia/drm2/tegra_dc.c
564
val &= ~WIN_ENABLE;
sys/arm/nvidia/drm2/tegra_dc.c
565
WR4(sc, DC_WINC_WIN_OPTIONS, val);
sys/arm/nvidia/drm2/tegra_dc.c
738
uint32_t val;
sys/arm/nvidia/drm2/tegra_dc.c
752
val = RD4(sc, DC_CMD_DISPLAY_COMMAND);
sys/arm/nvidia/drm2/tegra_dc.c
753
val |= DISPLAY_CTRL_MODE(CTRL_MODE_C_DISPLAY);
sys/arm/nvidia/drm2/tegra_dc.c
754
WR4(sc, DC_CMD_DISPLAY_COMMAND, val);
sys/arm/nvidia/drm2/tegra_dc.c
770
uint32_t val;
sys/arm/nvidia/drm2/tegra_dc.c
777
val = RD4(sc, DC_CMD_INT_MASK);
sys/arm/nvidia/drm2/tegra_dc.c
778
val |= FRAME_END_INT;
sys/arm/nvidia/drm2/tegra_dc.c
779
WR4(sc, DC_CMD_INT_MASK, val);
sys/arm/nvidia/drm2/tegra_dc.c
781
val = RD4(sc, DC_CMD_INT_ENABLE);
sys/arm/nvidia/drm2/tegra_dc.c
782
val |= FRAME_END_INT;
sys/arm/nvidia/drm2/tegra_dc.c
783
WR4(sc, DC_CMD_INT_ENABLE, val);
sys/arm/nvidia/drm2/tegra_dc.c
840
uint32_t val;
sys/arm/nvidia/drm2/tegra_dc.c
846
val = RD4(sc, DC_CMD_INT_MASK);
sys/arm/nvidia/drm2/tegra_dc.c
847
val |= VBLANK_INT;
sys/arm/nvidia/drm2/tegra_dc.c
848
WR4(sc, DC_CMD_INT_MASK, val);
sys/arm/nvidia/drm2/tegra_dc.c
857
uint32_t val;
sys/arm/nvidia/drm2/tegra_dc.c
863
val = RD4(sc, DC_CMD_INT_MASK);
sys/arm/nvidia/drm2/tegra_dc.c
864
val &= ~VBLANK_INT;
sys/arm/nvidia/drm2/tegra_dc.c
865
WR4(sc, DC_CMD_INT_MASK, val);
sys/arm/nvidia/drm2/tegra_dc.c
977
uint32_t val, *src, *dst;
sys/arm/nvidia/drm2/tegra_dc.c
987
val = CURSOR_SIZE(C32x32);
sys/arm/nvidia/drm2/tegra_dc.c
990
val = CURSOR_SIZE(C64x64);
sys/arm/nvidia/drm2/tegra_dc.c
993
val = CURSOR_SIZE(C128x128);
sys/arm/nvidia/drm2/tegra_dc.c
996
val = CURSOR_SIZE(C256x256);
sys/arm/nvidia/drm2/tegra_hdmi.c
406
uint32_t val;
sys/arm/nvidia/drm2/tegra_hdmi.c
410
val = i << 8;
sys/arm/nvidia/drm2/tegra_hdmi.c
412
val |= sc->output.connector.eld[i];
sys/arm/nvidia/drm2/tegra_hdmi.c
413
WR4(sc, HDMI_NV_PDISP_SOR_AUDIO_HDA_ELD_BUFWR, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
511
uint32_t val;
sys/arm/nvidia/drm2/tegra_hdmi.c
547
val = RD4(sc, HDMI_NV_PDISP_SOR_AUDIO_SPARE0);
sys/arm/nvidia/drm2/tegra_hdmi.c
548
val |= SOR_AUDIO_SPARE0_HBR_ENABLE;
sys/arm/nvidia/drm2/tegra_hdmi.c
549
WR4(sc, HDMI_NV_PDISP_SOR_AUDIO_SPARE0, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
567
val = RD4(sc, HDMI_NV_PDISP_AUDIO_N);
sys/arm/nvidia/drm2/tegra_hdmi.c
568
val &= ~AUDIO_N_RESETF;
sys/arm/nvidia/drm2/tegra_hdmi.c
569
WR4(sc, HDMI_NV_PDISP_AUDIO_N, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
578
uint32_t val;
sys/arm/nvidia/drm2/tegra_hdmi.c
581
val = RD4(sc, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
sys/arm/nvidia/drm2/tegra_hdmi.c
582
val &= ~GENERIC_CTRL_AUDIO;
sys/arm/nvidia/drm2/tegra_hdmi.c
583
WR4(sc, HDMI_NV_PDISP_HDMI_GENERIC_CTRL, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
586
val = RD4(sc, HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
sys/arm/nvidia/drm2/tegra_hdmi.c
587
val &= ~AUDIO_INFOFRAME_CTRL_ENABLE;
sys/arm/nvidia/drm2/tegra_hdmi.c
588
WR4(sc, HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
593
uint32_t val;
sys/arm/nvidia/drm2/tegra_hdmi.c
599
val = RD4(sc, HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
sys/arm/nvidia/drm2/tegra_hdmi.c
600
val |= AUDIO_INFOFRAME_CTRL_ENABLE;
sys/arm/nvidia/drm2/tegra_hdmi.c
601
WR4(sc, HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
604
val = RD4(sc, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
sys/arm/nvidia/drm2/tegra_hdmi.c
605
val |= GENERIC_CTRL_AUDIO;
sys/arm/nvidia/drm2/tegra_hdmi.c
606
WR4(sc, HDMI_NV_PDISP_HDMI_GENERIC_CTRL, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
618
uint32_t val;
sys/arm/nvidia/drm2/tegra_hdmi.c
624
val = RD4(sc, HDMI_NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH0);
sys/arm/nvidia/drm2/tegra_hdmi.c
625
if ((val & (1 << 30)) == 0) {
sys/arm/nvidia/drm2/tegra_hdmi.c
632
sc->audio_freq = val & 0x00FFFFFF;
sys/arm/nvidia/drm2/tegra_hdmi.c
633
sc->audio_chans = (val >> 24) & 0x0f;
sys/arm/nvidia/drm2/tegra_hdmi.c
662
uint32_t val;
sys/arm/nvidia/drm2/tegra_hdmi.c
665
val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0);
sys/arm/nvidia/drm2/tegra_hdmi.c
666
val &= ~SOR_PLL0_PWR;
sys/arm/nvidia/drm2/tegra_hdmi.c
667
val &= ~SOR_PLL0_VCOPD;
sys/arm/nvidia/drm2/tegra_hdmi.c
668
val &= ~SOR_PLL0_PULLDOWN;
sys/arm/nvidia/drm2/tegra_hdmi.c
669
WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
672
val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0);
sys/arm/nvidia/drm2/tegra_hdmi.c
673
val &= ~SOR_PLL0_PDBG;
sys/arm/nvidia/drm2/tegra_hdmi.c
674
WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
681
val = RD4(sc, HDMI_NV_PDISP_SOR_PWR);
sys/arm/nvidia/drm2/tegra_hdmi.c
682
if ((val & SOR_PWR_SETTING_NEW) == 0)
sys/arm/nvidia/drm2/tegra_hdmi.c
691
val = SOR_STATE2_ASY_OWNER(ASY_OWNER_HEAD0) |
sys/arm/nvidia/drm2/tegra_hdmi.c
696
val |= SOR_STATE2_ASY_HSYNCPOL_NEG;
sys/arm/nvidia/drm2/tegra_hdmi.c
698
val |= SOR_STATE2_ASY_VSYNCPOL_NEG;
sys/arm/nvidia/drm2/tegra_hdmi.c
699
WR4(sc, HDMI_NV_PDISP_SOR_STATE2, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
707
val = RD4(sc, HDMI_NV_PDISP_SOR_STATE1);
sys/arm/nvidia/drm2/tegra_hdmi.c
708
val |= SOR_STATE1_ATTACHED;
sys/arm/nvidia/drm2/tegra_hdmi.c
709
WR4(sc, HDMI_NV_PDISP_SOR_STATE1, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
721
uint32_t val;
sys/arm/nvidia/drm2/tegra_hdmi.c
735
val = RD4(sc, HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL);
sys/arm/nvidia/drm2/tegra_hdmi.c
736
val &= ~AVI_INFOFRAME_CTRL_ENABLE;
sys/arm/nvidia/drm2/tegra_hdmi.c
737
WR4(sc, HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
752
uint32_t val, h_sync_width, h_back_porch, h_front_porch, h_pulse_start;
sys/arm/nvidia/drm2/tegra_hdmi.c
789
val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0);
sys/arm/nvidia/drm2/tegra_hdmi.c
790
val &= ~SOR_PLL0_PDBG;
sys/arm/nvidia/drm2/tegra_hdmi.c
791
WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
794
val = RD4(sc, HDMI_NV_PDISP_SOR_PLL0);
sys/arm/nvidia/drm2/tegra_hdmi.c
795
val &= ~SOR_PLL0_PWR;
sys/arm/nvidia/drm2/tegra_hdmi.c
796
WR4(sc, HDMI_NV_PDISP_SOR_PLL0, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
805
val = 0;
sys/arm/nvidia/drm2/tegra_hdmi.c
809
val |= ARM_VIDEO_RANGE_LIMITED;
sys/arm/nvidia/drm2/tegra_hdmi.c
810
WR4(sc, HDMI_NV_PDISP_INPUT_CONTROL, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
814
val = SOR_REFCLK_DIV_INT(div8_2 >> 2) | SOR_REFCLK_DIV_FRAC(div8_2);
sys/arm/nvidia/drm2/tegra_hdmi.c
815
WR4(sc, HDMI_NV_PDISP_SOR_REFCLK, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
826
val = HDMI_CTRL_REKEY(HDMI_REKEY_DEFAULT);
sys/arm/nvidia/drm2/tegra_hdmi.c
827
val |= HDMI_CTRL_MAX_AC_PACKET(h_max_ac_packet);
sys/arm/nvidia/drm2/tegra_hdmi.c
829
val |= HDMI_CTRL_ENABLE;
sys/arm/nvidia/drm2/tegra_hdmi.c
830
WR4(sc, HDMI_NV_PDISP_HDMI_CTRL, val);
sys/arm/nvidia/drm2/tegra_hdmi.c
845
val = SOR_SEQ_INST_WAIT_TIME(1) |
sys/arm/nvidia/drm2/tegra_hdmi.c
849
WR4(sc, HDMI_NV_PDISP_SOR_SEQ_INST(0), val);
sys/arm/nvidia/drm2/tegra_hdmi.c
850
WR4(sc, HDMI_NV_PDISP_SOR_SEQ_INST(8), val);
sys/arm/nvidia/drm2/tegra_hdmi.c
852
val = RD4(sc,HDMI_NV_PDISP_SOR_CSTM);
sys/arm/nvidia/drm2/tegra_hdmi.c
853
val &= ~SOR_CSTM_LVDS_ENABLE;
sys/arm/nvidia/drm2/tegra_hdmi.c
854
val &= ~SOR_CSTM_ROTCLK(~0);
sys/arm/nvidia/drm2/tegra_hdmi.c
855
val |= SOR_CSTM_ROTCLK(2);
sys/arm/nvidia/drm2/tegra_hdmi.c
856
val &= ~SOR_CSTM_MODE(~0);
sys/arm/nvidia/drm2/tegra_hdmi.c
857
val |= SOR_CSTM_MODE(CSTM_MODE_TMDS);
sys/arm/nvidia/drm2/tegra_hdmi.c
858
val |= SOR_CSTM_PLLDIV;
sys/arm/nvidia/drm2/tegra_hdmi.c
859
WR4(sc, HDMI_NV_PDISP_SOR_CSTM, val);
sys/arm/nvidia/tegra124/tegra124_car.c
367
uint32_t val;
sys/arm/nvidia/tegra124/tegra124_car.c
370
CLKDEV_READ_4(sc->dev, OSC_CTRL, &val);
sys/arm/nvidia/tegra124/tegra124_car.c
371
osc_idx = val >> OSC_CTRL_OSC_FREQ_SHIFT;
sys/arm/nvidia/tegra124/tegra124_car.c
378
val = (val >> OSC_CTRL_PLL_REF_DIV_SHIFT) & 3;
sys/arm/nvidia/tegra124/tegra124_car.c
379
fixed_osc_div_clk.div = 1 << val;
sys/arm/nvidia/tegra124/tegra124_car.c
462
tegra124_car_clkdev_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm/nvidia/tegra124/tegra124_car.c
467
*val = bus_read_4(sc->mem_res, addr);
sys/arm/nvidia/tegra124/tegra124_car.c
472
tegra124_car_clkdev_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm/nvidia/tegra124/tegra124_car.c
477
bus_write_4(sc->mem_res, addr, val);
sys/arm/nvidia/tegra124/tegra124_car.h
32
#define RD4(sc, reg, val) CLKDEV_READ_4((sc)->clkdev, reg, val)
sys/arm/nvidia/tegra124/tegra124_car.h
33
#define WR4(sc, reg, val) CLKDEV_WRITE_4((sc)->clkdev, reg, val)
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
473
get_masked(uint32_t val, uint32_t shift, uint32_t width)
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
476
return ((val >> shift) & ((1 << width) - 1));
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
480
set_masked(uint32_t val, uint32_t v, uint32_t shift, uint32_t width)
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
483
val &= ~(((1 << width) - 1) << shift);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
484
val |= (v & ((1 << width) - 1)) << shift;
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
485
return (val);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
491
uint32_t val;
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
495
RD4(sc, sc->base_reg, &val);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
496
*m = get_masked(val, PLL_BASE_DIVM_SHIFT, mnp_bits->m_width);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
497
*n = get_masked(val, PLL_BASE_DIVN_SHIFT, mnp_bits->n_width);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
498
*p = get_masked(val, mnp_bits->p_shift, mnp_bits->p_width);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
502
set_divisors(struct pll_sc *sc, uint32_t val, uint32_t m, uint32_t n,
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
508
val = set_masked(val, m, PLL_BASE_DIVM_SHIFT, mnp_bits->m_width);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
509
val = set_masked(val, n, PLL_BASE_DIVN_SHIFT, mnp_bits->n_width);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
510
val = set_masked(val, p, mnp_bits->p_shift, mnp_bits->p_width);
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
511
return (val);
sys/arm/nvidia/tegra124/tegra124_coretemp.c
116
snprintf(stemp, sizeof(stemp), "%d", val);
sys/arm/nvidia/tegra124/tegra124_coretemp.c
123
return (sysctl_handle_int(oidp, 0, val, req));
sys/arm/nvidia/tegra124/tegra124_coretemp.c
65
int val, temp, rv;
sys/arm/nvidia/tegra124/tegra124_coretemp.c
85
val = temp / 100;
sys/arm/nvidia/tegra124/tegra124_coretemp.c
86
val += 2731;
sys/arm/nvidia/tegra124/tegra124_coretemp.c
89
val = (sc->core_max_temp - temp) / 1000;
sys/arm/nvidia/tegra124/tegra124_coretemp.c
92
val = 1;
sys/arm/nvidia/tegra124/tegra124_coretemp.c
95
val = sc->core_max_temp / 100;
sys/arm/nvidia/tegra124/tegra124_coretemp.c
96
val += 2731;
sys/arm/nvidia/tegra124/tegra124_cpufreq.c
210
#define DIV_ROUND_CLOSEST(val, div) (((val) + ((div) / 2)) / (div))
sys/arm/nvidia/tegra124/tegra124_cpufreq.c
212
#define ROUND_UP(val, div) roundup(val, div)
sys/arm/nvidia/tegra124/tegra124_cpufreq.c
213
#define ROUND_DOWN(val, div) rounddown(val, div)
sys/arm/nvidia/tegra124/tegra124_mp.c
100
val = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_PWRGATE_STATUS);
sys/arm/nvidia/tegra124/tegra124_mp.c
102
if ((val & mask) == 0) {
sys/arm/nvidia/tegra124/tegra124_mp.c
105
val = bus_space_read_4(fdtbus_bs_tag, pmc,
sys/arm/nvidia/tegra124/tegra124_mp.c
107
} while ((val & PCM_PWRGATE_TOGGLE_START) != 0);
sys/arm/nvidia/tegra124/tegra124_mp.c
114
val = bus_space_read_4(fdtbus_bs_tag, pmc,
sys/arm/nvidia/tegra124/tegra124_mp.c
116
} while ((val & mask) == 0);
sys/arm/nvidia/tegra124/tegra124_mp.c
80
uint32_t val;
sys/arm/nvidia/tegra124/tegra124_mp.c
95
val = bus_space_read_4(fdtbus_bs_tag, pmc,
sys/arm/nvidia/tegra124/tegra124_mp.c
97
} while ((val & PCM_PWRGATE_TOGGLE_START) != 0);
sys/arm/nvidia/tegra_ahci.c
443
uint32_t val;
sys/arm/nvidia/tegra_ahci.c
447
val = tegra_fuse_read_4(FUSE_SATA_CALIB);
sys/arm/nvidia/tegra_ahci.c
448
calib = tegra124_pad_calibration + (val & FUSE_SATA_CALIB_MASK);
sys/arm/nvidia/tegra_ahci.c
451
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL1_GEN1);
sys/arm/nvidia/tegra_ahci.c
452
val &= ~(T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP_MASK <<
sys/arm/nvidia/tegra_ahci.c
454
val &= ~(T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK_MASK <<
sys/arm/nvidia/tegra_ahci.c
456
val |= calib->gen1_tx_amp << T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP_SHIFT;
sys/arm/nvidia/tegra_ahci.c
457
val |= calib->gen1_tx_peak << T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK_SHIFT;
sys/arm/nvidia/tegra_ahci.c
458
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL1_GEN1, val);
sys/arm/nvidia/tegra_ahci.c
460
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL1_GEN2);
sys/arm/nvidia/tegra_ahci.c
461
val &= ~(T_SATA0_CHX_PHY_CTRL1_GEN2_TX_AMP_MASK <<
sys/arm/nvidia/tegra_ahci.c
463
val &= ~(T_SATA0_CHX_PHY_CTRL1_GEN2_TX_PEAK_MASK <<
sys/arm/nvidia/tegra_ahci.c
465
val |= calib->gen2_tx_amp << T_SATA0_CHX_PHY_CTRL1_GEN2_TX_AMP_SHIFT;
sys/arm/nvidia/tegra_ahci.c
466
val |= calib->gen2_tx_peak << T_SATA0_CHX_PHY_CTRL1_GEN2_TX_PEAK_SHIFT;
sys/arm/nvidia/tegra_ahci.c
467
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL1_GEN2, val);
sys/arm/nvidia/tegra_ahci.c
483
uint32_t val;
sys/arm/nvidia/tegra_ahci.c
487
val = SATA_RD4(sc, SATA_FPCI_BAR5);
sys/arm/nvidia/tegra_ahci.c
488
val &= ~SATA_FPCI_BAR_START(~0);
sys/arm/nvidia/tegra_ahci.c
489
val |= SATA_FPCI_BAR_START(0x10000);
sys/arm/nvidia/tegra_ahci.c
490
val |= SATA_FPCI_BAR_ACCESS_TYPE;
sys/arm/nvidia/tegra_ahci.c
491
SATA_WR4(sc, SATA_FPCI_BAR5, val);
sys/arm/nvidia/tegra_ahci.c
494
val = SATA_RD4(sc, SATA_CONFIGURATION);
sys/arm/nvidia/tegra_ahci.c
495
val |= SATA_CONFIGURATION_EN_FPCI;
sys/arm/nvidia/tegra_ahci.c
496
SATA_WR4(sc, SATA_CONFIGURATION, val);
sys/arm/nvidia/tegra_ahci.c
505
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CFG_PHY);
sys/arm/nvidia/tegra_ahci.c
506
val |= T_SATA0_CFG_PHY_MASK_SQUELCH;
sys/arm/nvidia/tegra_ahci.c
507
val &= ~T_SATA0_CFG_PHY_USE_7BIT_ALIGN_DET_FOR_SPD;
sys/arm/nvidia/tegra_ahci.c
508
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CFG_PHY, val);
sys/arm/nvidia/tegra_ahci.c
510
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_NVOOB);
sys/arm/nvidia/tegra_ahci.c
511
val &= ~T_SATA0_NVOOB_COMMA_CNT_MASK;
sys/arm/nvidia/tegra_ahci.c
512
val &= ~T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH_MASK;
sys/arm/nvidia/tegra_ahci.c
513
val &= ~T_SATA0_NVOOB_SQUELCH_FILTER_MODE_MASK;
sys/arm/nvidia/tegra_ahci.c
514
val |= T_SATA0_NVOOB_COMMA_CNT;
sys/arm/nvidia/tegra_ahci.c
515
val |= T_SATA0_NVOOB_SQUELCH_FILTER_LENGTH;
sys/arm/nvidia/tegra_ahci.c
516
val |= T_SATA0_NVOOB_SQUELCH_FILTER_MODE;
sys/arm/nvidia/tegra_ahci.c
517
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_NVOOB, val);
sys/arm/nvidia/tegra_ahci.c
520
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
sys/arm/nvidia/tegra_ahci.c
521
val &= ~T_SATA0_CFG2NVOOB_2_COMWAKE_IDLE_CNT_LOW_MASK;
sys/arm/nvidia/tegra_ahci.c
522
val |= T_SATA0_CFG2NVOOB_2_COMWAKE_IDLE_CNT_LOW;
sys/arm/nvidia/tegra_ahci.c
523
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CFG2NVOOB_2, val);
sys/arm/nvidia/tegra_ahci.c
535
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CFG_SATA);
sys/arm/nvidia/tegra_ahci.c
536
val |= T_SATA0_CFG_SATA_BACKDOOR_PROG_IF_EN;
sys/arm/nvidia/tegra_ahci.c
537
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CFG_SATA, val);
sys/arm/nvidia/tegra_ahci.c
540
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_BKDOOR_CC);
sys/arm/nvidia/tegra_ahci.c
541
val &= ~T_SATA0_BKDOOR_CC_CLASS_CODE_MASK;
sys/arm/nvidia/tegra_ahci.c
542
val &= ~T_SATA0_BKDOOR_CC_PROG_IF_MASK;
sys/arm/nvidia/tegra_ahci.c
543
val |= T_SATA0_BKDOOR_CC_CLASS_CODE;
sys/arm/nvidia/tegra_ahci.c
544
val |= T_SATA0_BKDOOR_CC_PROG_IF;
sys/arm/nvidia/tegra_ahci.c
545
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_BKDOOR_CC, val);
sys/arm/nvidia/tegra_ahci.c
548
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
sys/arm/nvidia/tegra_ahci.c
549
val |= T_SATA0_AHCI_HBA_CAP_BKDR_PARTIAL_ST_CAP;
sys/arm/nvidia/tegra_ahci.c
550
val |= T_SATA0_AHCI_HBA_CAP_BKDR_SLUMBER_ST_CAP;
sys/arm/nvidia/tegra_ahci.c
551
val |= T_SATA0_AHCI_HBA_CAP_BKDR_SALP;
sys/arm/nvidia/tegra_ahci.c
552
val |= T_SATA0_AHCI_HBA_CAP_BKDR_SUPP_PM;
sys/arm/nvidia/tegra_ahci.c
553
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR, val);
sys/arm/nvidia/tegra_ahci.c
556
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CFG_SATA);
sys/arm/nvidia/tegra_ahci.c
557
val &= ~T_SATA0_CFG_SATA_BACKDOOR_PROG_IF_EN;
sys/arm/nvidia/tegra_ahci.c
558
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CFG_SATA, val);
sys/arm/nvidia/tegra_ahci.c
561
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CFG_35);
sys/arm/nvidia/tegra_ahci.c
562
val &= ~T_SATA0_CFG_35_IDP_INDEX_MASK;
sys/arm/nvidia/tegra_ahci.c
563
val |= T_SATA0_CFG_35_IDP_INDEX;
sys/arm/nvidia/tegra_ahci.c
564
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CFG_35, val);
sys/arm/nvidia/tegra_ahci.c
568
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CFG_PHY_1);
sys/arm/nvidia/tegra_ahci.c
569
val |= T_SATA0_CFG_PHY_1_PADS_IDDQ_EN;
sys/arm/nvidia/tegra_ahci.c
570
val |= T_SATA0_CFG_PHY_1_PAD_PLL_IDDQ_EN;
sys/arm/nvidia/tegra_ahci.c
571
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CFG_PHY_1, val);
sys/arm/nvidia/tegra_ahci.c
578
val = bus_read_4(sc->aux_mem, SATA_AUX_MISC_CNTL_1);
sys/arm/nvidia/tegra_ahci.c
579
val |= SATA_AUX_MISC_CNTL_1_DESO_SUPPORT;
sys/arm/nvidia/tegra_ahci.c
580
bus_write_4(sc->aux_mem, SATA_AUX_MISC_CNTL_1, val);
sys/arm/nvidia/tegra_ahci.c
584
val = SATA_RD4(sc, SCFG_OFFSET + SATA_CONFIGURATION);
sys/arm/nvidia/tegra_ahci.c
585
val &= ~SATA_CONFIGURATION_CLK_OVERRIDE;
sys/arm/nvidia/tegra_ahci.c
586
SATA_WR4(sc, SCFG_OFFSET + SATA_CONFIGURATION, val);
sys/arm/nvidia/tegra_ahci.c
590
val = SATA_RD4(sc, SCFG_OFFSET + T_SATA0_CFG_1);
sys/arm/nvidia/tegra_ahci.c
591
val |= T_SATA0_CFG_1_IO_SPACE;
sys/arm/nvidia/tegra_ahci.c
592
val |= T_SATA0_CFG_1_MEMORY_SPACE;
sys/arm/nvidia/tegra_ahci.c
593
val |= T_SATA0_CFG_1_BUS_MASTER;
sys/arm/nvidia/tegra_ahci.c
594
val |= T_SATA0_CFG_1_SERR;
sys/arm/nvidia/tegra_ahci.c
595
SATA_WR4(sc, SCFG_OFFSET + T_SATA0_CFG_1, val);
sys/arm/nvidia/tegra_ahci.c
602
val = SATA_RD4(sc, SATA_INTR_MASK);
sys/arm/nvidia/tegra_ahci.c
603
val |= SATA_INTR_MASK_IP_INT_MASK;
sys/arm/nvidia/tegra_ahci.c
604
SATA_WR4(sc, SATA_INTR_MASK, val);
sys/arm/nvidia/tegra_efuse.c
279
uint32_t val;
sys/arm/nvidia/tegra_efuse.c
281
val = 0;
sys/arm/nvidia/tegra_efuse.c
285
val |= (reg & 1) << 0;
sys/arm/nvidia/tegra_efuse.c
287
val |= (reg & 1) << 1;
sys/arm/nvidia/tegra_efuse.c
289
val |= (reg & 1) << 2;
sys/arm/nvidia/tegra_efuse.c
291
return (val);
sys/arm/nvidia/tegra_gpio.c
149
struct gpio_pin *pin, uint32_t val)
sys/arm/nvidia/tegra_gpio.c
156
tmp |= (val & 1) << bit; /* value */
sys/arm/nvidia/tegra_gpio.c
164
uint32_t val;
sys/arm/nvidia/tegra_gpio.c
167
val = bus_read_4(sc->mem_res, reg + GPIO_REGNUM(pin->gp_pin));
sys/arm/nvidia/tegra_gpio.c
168
return (val >> bit) & 1;
sys/arm/nvidia/tegra_gpio.c
302
tegra_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm/nvidia/tegra_gpio.c
311
*val = gpio_read(sc, GPIO_IN, &sc->gpio_pins[pin]);
sys/arm/nvidia/tegra_gpio.c
341
struct tegra_gpio_irqsrc *tgi, uint32_t val)
sys/arm/nvidia/tegra_gpio.c
348
tmp |= (val & 1) << bit; /* value */
sys/arm/nvidia/tegra_gpio.c
354
struct tegra_gpio_irqsrc *tgi, uint32_t val, uint32_t mask)
sys/arm/nvidia/tegra_gpio.c
363
tmp |= val << bit;
sys/arm/nvidia/tegra_gpio.c
370
struct tegra_gpio_irqsrc *tgi, uint32_t val)
sys/arm/nvidia/tegra_gpio.c
373
intr_write_masked(sc, GPIO_MSK_INT_ENB, tgi, val);
sys/arm/nvidia/tegra_gpio.c
394
u_int irq, i, j, val, basepin;
sys/arm/nvidia/tegra_gpio.c
408
val = bus_read_4(sc->mem_res, GPIO_INT_STA +
sys/arm/nvidia/tegra_gpio.c
410
val &= bus_read_4(sc->mem_res, GPIO_INT_ENB +
sys/arm/nvidia/tegra_gpio.c
414
if ((val & (1 << j)) == 0)
sys/arm/nvidia/tegra_pcie.c
422
uint32_t val;
sys/arm/nvidia/tegra_pcie.c
447
val = bus_space_read_4(sc->bus_tag, hndl, off & ~3);
sys/arm/nvidia/tegra_pcie.c
453
val >>= 16;
sys/arm/nvidia/tegra_pcie.c
454
val &= 0xffff;
sys/arm/nvidia/tegra_pcie.c
457
val >>= ((off & 3) << 3);
sys/arm/nvidia/tegra_pcie.c
458
val &= 0xff;
sys/arm/nvidia/tegra_pcie.c
461
return val;
sys/arm/nvidia/tegra_pcie.c
466
u_int reg, uint32_t val, int bytes)
sys/arm/nvidia/tegra_pcie.c
498
bus_space_write_4(sc->bus_tag, hndl, off, val);
sys/arm/nvidia/tegra_pcie.c
503
val2 |= ((val & 0xffff) << ((off & 3) << 3));
sys/arm/nvidia/tegra_pcie.c
509
val2 |= ((val & 0xff) << ((off & 3) << 3));
sys/arm/nvidia/tegra_pcie.c
586
struct tegra_pcib_irqsrc *tgi, uint32_t val)
sys/arm/nvidia/tegra_pcie.c
594
if (val != 0)
sys/arm/nvidia/tegra_pcie.c
597
if (val != 0)
sys/arm/nvidia/tegra_sdhci.c
169
uint8_t val)
sys/arm/nvidia/tegra_sdhci.c
174
bus_write_1(sc->mem_res, off, val);
sys/arm/nvidia/tegra_sdhci.c
179
uint16_t val)
sys/arm/nvidia/tegra_sdhci.c
184
bus_write_2(sc->mem_res, off, val);
sys/arm/nvidia/tegra_sdhci.c
189
uint32_t val)
sys/arm/nvidia/tegra_sdhci.c
194
bus_write_4(sc->mem_res, off, val);
sys/arm/nvidia/tegra_soctherm.c
378
int32_t val;
sys/arm/nvidia/tegra_soctherm.c
382
val = ((reg >> shift) & mask) << (32 - bits);
sys/arm/nvidia/tegra_soctherm.c
383
val >>= 32 - bits;
sys/arm/nvidia/tegra_soctherm.c
384
return ((int32_t)val);
sys/arm/nvidia/tegra_soctherm.c
400
uint32_t val;
sys/arm/nvidia/tegra_soctherm.c
405
val = tegra_fuse_read_4(FUSE_TSENSOR_COMMON);
sys/arm/nvidia/tegra_soctherm.c
406
cal->base_cp = TEGRA124_FUSE_COMMON_CP_TS_BASE(val);
sys/arm/nvidia/tegra_soctherm.c
407
cal->base_ft = TEGRA124_FUSE_COMMON_FT_TS_BASE(val);
sys/arm/nvidia/tegra_soctherm.c
409
calib_ft = extract_signed(val,
sys/arm/nvidia/tegra_soctherm.c
413
val = tegra_fuse_read_4(FUSE_SPARE_REALIGNMENT_REG);
sys/arm/nvidia/tegra_soctherm.c
414
calib_cp = extract_signed(val,
sys/arm/nvidia/tegra_soctherm.c
431
uint32_t val;
sys/arm/nvidia/tegra_soctherm.c
437
val = tegra_fuse_read_4(FUSE_TSENSOR_COMMON);
sys/arm/nvidia/tegra_soctherm.c
438
cal->base_cp = TEGRA210_FUSE_COMMON_CP_TS_BASE(val);
sys/arm/nvidia/tegra_soctherm.c
439
cal->base_ft = TEGRA210_FUSE_COMMON_FT_TS_BASE(val);
sys/arm/nvidia/tegra_soctherm.c
441
calib_ft = extract_signed(val,
sys/arm/nvidia/tegra_soctherm.c
444
calib_cp = extract_signed(val,
sys/arm/nvidia/tegra_soctherm.c
461
uint32_t val;
sys/arm/nvidia/tegra_soctherm.c
472
val = tegra_fuse_read_4(sensor->calib_fuse);
sys/arm/nvidia/tegra_soctherm.c
473
calib_cp = extract_signed(val,
sys/arm/nvidia/tegra_soctherm.c
478
calib_ft = extract_signed(val,
sys/arm/nvidia/tegra_soctherm.c
504
__func__, sensor->name, val, val & 0x1FFF, (val >> 13) & 0x1FFF,
sys/arm/nvidia/tegra_soctherm.c
516
uint32_t val;
sys/arm/nvidia/tegra_soctherm.c
521
val = RD4(sc, sensor->sensor_base + TSENSOR_CONFIG0);
sys/arm/nvidia/tegra_soctherm.c
522
val |= TSENSOR_CONFIG0_STOP;
sys/arm/nvidia/tegra_soctherm.c
523
val |= TSENSOR_CONFIG0_STATUS_CLR;
sys/arm/nvidia/tegra_soctherm.c
524
WR4(sc, sensor->sensor_base + TSENSOR_CONFIG0, val);
sys/arm/nvidia/tegra_soctherm.c
526
val = TSENSOR_CONFIG0_TALL(cfg->tall);
sys/arm/nvidia/tegra_soctherm.c
527
val |= TSENSOR_CONFIG0_STOP;
sys/arm/nvidia/tegra_soctherm.c
528
WR4(sc, sensor->sensor_base + TSENSOR_CONFIG0, val);
sys/arm/nvidia/tegra_soctherm.c
530
val = TSENSOR_CONFIG1_TSAMPLE(cfg->tsample - 1);
sys/arm/nvidia/tegra_soctherm.c
531
val |= TSENSOR_CONFIG1_TIDDQ_EN(cfg->tiddq_en);
sys/arm/nvidia/tegra_soctherm.c
532
val |= TSENSOR_CONFIG1_TEN_COUNT(cfg->ten_count);
sys/arm/nvidia/tegra_soctherm.c
533
val |= TSENSOR_CONFIG1_TEMP_ENABLE;
sys/arm/nvidia/tegra_soctherm.c
534
WR4(sc, sensor->sensor_base + TSENSOR_CONFIG1, val);
sys/arm/nvidia/tegra_soctherm.c
536
val = TSENSOR_CONFIG2_THERMA((uint16_t)sensor->therm_a) |
sys/arm/nvidia/tegra_soctherm.c
538
WR4(sc, sensor->sensor_base + TSENSOR_CONFIG2, val);
sys/arm/nvidia/tegra_soctherm.c
540
val = RD4(sc, sensor->sensor_base + TSENSOR_CONFIG0);
sys/arm/nvidia/tegra_soctherm.c
541
val &= ~TSENSOR_CONFIG0_STOP;
sys/arm/nvidia/tegra_soctherm.c
542
WR4(sc, sensor->sensor_base + TSENSOR_CONFIG0, val);
sys/arm/nvidia/tegra_soctherm.c
557
soctherm_convert_raw(uint32_t val)
sys/arm/nvidia/tegra_soctherm.c
561
t = READBACK_VALUE(val) * 1000;
sys/arm/nvidia/tegra_soctherm.c
562
if (val & READBACK_ADD_HALF)
sys/arm/nvidia/tegra_soctherm.c
564
if (val & READBACK_NEGATE)
sys/arm/nvidia/tegra_soctherm.c
574
uint32_t val;
sys/arm/nvidia/tegra_soctherm.c
578
val = RD4(sc, sensor->sensor_base + TSENSOR_STATUS1);
sys/arm/nvidia/tegra_soctherm.c
579
if ((val & TSENSOR_STATUS1_TEMP_VALID) != 0)
sys/arm/nvidia/tegra_soctherm.c
585
*temp = soctherm_convert_raw(val);
sys/arm/nvidia/tegra_soctherm.c
587
printf("%s: Raw: 0x%08X, temp: %d\n", __func__, val, *temp);
sys/arm/nvidia/tegra_soctherm.c
602
soctherm_get_temp(device_t dev, device_t cdev, uintptr_t id, int *val)
sys/arm/nvidia/tegra_soctherm.c
613
return(soctherm_read_temp(sc, sc->soc->tsensors + id, val));
sys/arm/nvidia/tegra_soctherm.c
619
val));
sys/arm/nvidia/tegra_soctherm.c
629
int val;
sys/arm/nvidia/tegra_soctherm.c
642
rv = soctherm_read_temp(sc, sc->soc->tsensors + id, &val);
sys/arm/nvidia/tegra_soctherm.c
646
val = val / 100;
sys/arm/nvidia/tegra_soctherm.c
647
val += 2731;
sys/arm/nvidia/tegra_soctherm.c
648
rv = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/nvidia/tegra_usbphy.c
309
#define WR4(sc, offs, val) \
sys/arm/nvidia/tegra_usbphy.c
310
bus_write_4(sc->mem_res, offs, val)
sys/arm/nvidia/tegra_usbphy.c
313
reg_wait(struct usbphy_softc *sc, uint32_t reg, uint32_t mask, uint32_t val)
sys/arm/nvidia/tegra_usbphy.c
318
if ((RD4(sc, reg) & mask) == val)
sys/arm/nvidia/tegra_usbphy.c
328
uint32_t val;
sys/arm/nvidia/tegra_usbphy.c
331
val = RD4(sc, CTRL_USB_HOSTPC1_DEVLC);
sys/arm/nvidia/tegra_usbphy.c
333
val &= ~USB_HOSTPC1_DEVLC_PHCD;
sys/arm/nvidia/tegra_usbphy.c
335
val |= USB_HOSTPC1_DEVLC_PHCD;
sys/arm/nvidia/tegra_usbphy.c
336
WR4(sc, CTRL_USB_HOSTPC1_DEVLC, val);
sys/arm/nvidia/tegra_usbphy.c
351
uint32_t val;
sys/arm/nvidia/tegra_usbphy.c
354
val = RD4(sc, IF_USB_SUSP_CTRL);
sys/arm/nvidia/tegra_usbphy.c
355
val |= UTMIP_RESET;
sys/arm/nvidia/tegra_usbphy.c
356
WR4(sc, IF_USB_SUSP_CTRL, val);
sys/arm/nvidia/tegra_usbphy.c
358
val = RD4(sc, UTMIP_TX_CFG0);
sys/arm/nvidia/tegra_usbphy.c
359
val |= UTMIP_FS_PREAMBLE_J;
sys/arm/nvidia/tegra_usbphy.c
360
WR4(sc, UTMIP_TX_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
362
val = RD4(sc, UTMIP_HSRX_CFG0);
sys/arm/nvidia/tegra_usbphy.c
363
val &= ~UTMIP_IDLE_WAIT(~0);
sys/arm/nvidia/tegra_usbphy.c
364
val &= ~UTMIP_ELASTIC_LIMIT(~0);
sys/arm/nvidia/tegra_usbphy.c
365
val |= UTMIP_IDLE_WAIT(sc->idle_wait_delay);
sys/arm/nvidia/tegra_usbphy.c
366
val |= UTMIP_ELASTIC_LIMIT(sc->elastic_limit);
sys/arm/nvidia/tegra_usbphy.c
367
WR4(sc, UTMIP_HSRX_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
369
val = RD4(sc, UTMIP_HSRX_CFG1);
sys/arm/nvidia/tegra_usbphy.c
370
val &= ~UTMIP_HS_SYNC_START_DLY(~0);
sys/arm/nvidia/tegra_usbphy.c
371
val |= UTMIP_HS_SYNC_START_DLY(sc->hssync_start_delay);
sys/arm/nvidia/tegra_usbphy.c
372
WR4(sc, UTMIP_HSRX_CFG1, val);
sys/arm/nvidia/tegra_usbphy.c
374
val = RD4(sc, UTMIP_DEBOUNCE_CFG0);
sys/arm/nvidia/tegra_usbphy.c
375
val &= ~UTMIP_BIAS_DEBOUNCE_A(~0);
sys/arm/nvidia/tegra_usbphy.c
376
val |= UTMIP_BIAS_DEBOUNCE_A(0x7530); /* For 12MHz */
sys/arm/nvidia/tegra_usbphy.c
377
WR4(sc, UTMIP_DEBOUNCE_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
379
val = RD4(sc, UTMIP_MISC_CFG0);
sys/arm/nvidia/tegra_usbphy.c
380
val &= ~UTMIP_SUSPEND_EXIT_ON_EDGE;
sys/arm/nvidia/tegra_usbphy.c
381
WR4(sc, UTMIP_MISC_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
384
val = RD4(sc,IF_USB_SUSP_CTRL);
sys/arm/nvidia/tegra_usbphy.c
385
val &= ~USB_WAKE_ON_CNNT_EN_DEV;
sys/arm/nvidia/tegra_usbphy.c
386
val &= ~USB_WAKE_ON_DISCON_EN_DEV;
sys/arm/nvidia/tegra_usbphy.c
387
WR4(sc, IF_USB_SUSP_CTRL, val);
sys/arm/nvidia/tegra_usbphy.c
389
val = RD4(sc, UTMIP_BAT_CHRG_CFG0);
sys/arm/nvidia/tegra_usbphy.c
390
val &= ~UTMIP_PD_CHRG;
sys/arm/nvidia/tegra_usbphy.c
391
WR4(sc, UTMIP_BAT_CHRG_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
393
val = RD4(sc, UTMIP_BAT_CHRG_CFG0);
sys/arm/nvidia/tegra_usbphy.c
394
val |= UTMIP_PD_CHRG;
sys/arm/nvidia/tegra_usbphy.c
395
WR4(sc, UTMIP_BAT_CHRG_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
413
val = bus_read_4(sc->pads_res, UTMIP_BIAS_CFG0);
sys/arm/nvidia/tegra_usbphy.c
414
val &= ~UTMIP_OTGPD;
sys/arm/nvidia/tegra_usbphy.c
415
val &= ~UTMIP_BIASPD;
sys/arm/nvidia/tegra_usbphy.c
416
val &= ~UTMIP_HSSQUELCH_LEVEL(~0);
sys/arm/nvidia/tegra_usbphy.c
417
val &= ~UTMIP_HSDISCON_LEVEL(~0);
sys/arm/nvidia/tegra_usbphy.c
418
val &= ~UTMIP_HSDISCON_LEVEL_MSB(~0);
sys/arm/nvidia/tegra_usbphy.c
419
val |= UTMIP_HSSQUELCH_LEVEL(sc->hssquelch_level);
sys/arm/nvidia/tegra_usbphy.c
420
val |= UTMIP_HSDISCON_LEVEL(sc->hsdiscon_level);
sys/arm/nvidia/tegra_usbphy.c
421
val |= UTMIP_HSDISCON_LEVEL_MSB(sc->hsdiscon_level);
sys/arm/nvidia/tegra_usbphy.c
422
bus_write_4(sc->pads_res, UTMIP_BIAS_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
432
val = RD4(sc, UTMIP_XCVR_CFG0);
sys/arm/nvidia/tegra_usbphy.c
433
val &= ~UTMIP_FORCE_PD_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
434
val &= ~UTMIP_FORCE_PD2_POWERDOWN ;
sys/arm/nvidia/tegra_usbphy.c
435
val &= ~UTMIP_FORCE_PDZI_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
436
val &= ~UTMIP_XCVR_LSBIAS_SEL;
sys/arm/nvidia/tegra_usbphy.c
437
val &= ~UTMIP_XCVR_LSFSLEW(~0);
sys/arm/nvidia/tegra_usbphy.c
438
val &= ~UTMIP_XCVR_LSRSLEW(~0);
sys/arm/nvidia/tegra_usbphy.c
439
val &= ~UTMIP_XCVR_HSSLEW(~0);
sys/arm/nvidia/tegra_usbphy.c
440
val &= ~UTMIP_XCVR_HSSLEW_MSB(~0);
sys/arm/nvidia/tegra_usbphy.c
441
val |= UTMIP_XCVR_LSFSLEW(sc->xcvr_lsfslew);
sys/arm/nvidia/tegra_usbphy.c
442
val |= UTMIP_XCVR_LSRSLEW(sc->xcvr_lsrslew);
sys/arm/nvidia/tegra_usbphy.c
443
val |= UTMIP_XCVR_HSSLEW(sc->xcvr_hsslew);
sys/arm/nvidia/tegra_usbphy.c
444
val |= UTMIP_XCVR_HSSLEW_MSB(sc->xcvr_hsslew);
sys/arm/nvidia/tegra_usbphy.c
446
val &= ~UTMIP_XCVR_SETUP(~0);
sys/arm/nvidia/tegra_usbphy.c
447
val &= ~UTMIP_XCVR_SETUP_MSB(~0);
sys/arm/nvidia/tegra_usbphy.c
448
val |= UTMIP_XCVR_SETUP(sc->xcvr_setup);
sys/arm/nvidia/tegra_usbphy.c
449
val |= UTMIP_XCVR_SETUP_MSB(sc->xcvr_setup);
sys/arm/nvidia/tegra_usbphy.c
451
WR4(sc, UTMIP_XCVR_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
453
val = RD4(sc, UTMIP_XCVR_CFG1);
sys/arm/nvidia/tegra_usbphy.c
454
val &= ~UTMIP_FORCE_PDDISC_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
455
val &= ~UTMIP_FORCE_PDCHRP_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
456
val &= ~UTMIP_FORCE_PDDR_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
457
val &= ~UTMIP_XCVR_TERM_RANGE_ADJ(~0);
sys/arm/nvidia/tegra_usbphy.c
458
val |= UTMIP_XCVR_TERM_RANGE_ADJ(sc->term_range_adj);
sys/arm/nvidia/tegra_usbphy.c
459
WR4(sc, UTMIP_XCVR_CFG1, val);
sys/arm/nvidia/tegra_usbphy.c
461
val = RD4(sc, UTMIP_BIAS_CFG1);
sys/arm/nvidia/tegra_usbphy.c
462
val &= ~UTMIP_BIAS_PDTRK_COUNT(~0);
sys/arm/nvidia/tegra_usbphy.c
463
val |= UTMIP_BIAS_PDTRK_COUNT(0x5);
sys/arm/nvidia/tegra_usbphy.c
464
WR4(sc, UTMIP_BIAS_CFG1, val);
sys/arm/nvidia/tegra_usbphy.c
466
val = RD4(sc, UTMIP_SPARE_CFG0);
sys/arm/nvidia/tegra_usbphy.c
468
val |= FUSE_SETUP_SEL;
sys/arm/nvidia/tegra_usbphy.c
470
val &= ~FUSE_SETUP_SEL;
sys/arm/nvidia/tegra_usbphy.c
471
WR4(sc, UTMIP_SPARE_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
473
val = RD4(sc, IF_USB_SUSP_CTRL);
sys/arm/nvidia/tegra_usbphy.c
474
val |= UTMIP_PHY_ENB;
sys/arm/nvidia/tegra_usbphy.c
475
WR4(sc, IF_USB_SUSP_CTRL, val);
sys/arm/nvidia/tegra_usbphy.c
477
val = RD4(sc, IF_USB_SUSP_CTRL);
sys/arm/nvidia/tegra_usbphy.c
478
val &= ~UTMIP_RESET;
sys/arm/nvidia/tegra_usbphy.c
479
WR4(sc, IF_USB_SUSP_CTRL, val);
sys/arm/nvidia/tegra_usbphy.c
483
val = RD4(sc, CTRL_USB_USBMODE);
sys/arm/nvidia/tegra_usbphy.c
484
val &= ~USB_USBMODE_MASK;
sys/arm/nvidia/tegra_usbphy.c
486
val |= USB_USBMODE_HOST;
sys/arm/nvidia/tegra_usbphy.c
488
val |= USB_USBMODE_DEVICE;
sys/arm/nvidia/tegra_usbphy.c
489
WR4(sc, CTRL_USB_USBMODE, val);
sys/arm/nvidia/tegra_usbphy.c
491
val = RD4(sc, CTRL_USB_HOSTPC1_DEVLC);
sys/arm/nvidia/tegra_usbphy.c
492
val &= ~USB_HOSTPC1_DEVLC_PTS(~0);
sys/arm/nvidia/tegra_usbphy.c
493
val |= USB_HOSTPC1_DEVLC_PTS(0);
sys/arm/nvidia/tegra_usbphy.c
494
WR4(sc, CTRL_USB_HOSTPC1_DEVLC, val);
sys/arm/nvidia/tegra_usbphy.c
503
uint32_t val;
sys/arm/nvidia/tegra_usbphy.c
508
val = RD4(sc, IF_USB_SUSP_CTRL);
sys/arm/nvidia/tegra_usbphy.c
509
val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0);
sys/arm/nvidia/tegra_usbphy.c
510
val |= USB_WAKE_ON_CNNT_EN_DEV;
sys/arm/nvidia/tegra_usbphy.c
511
val |= USB_WAKEUP_DEBOUNCE_COUNT(5);
sys/arm/nvidia/tegra_usbphy.c
512
WR4(sc, IF_USB_SUSP_CTRL, val);
sys/arm/nvidia/tegra_usbphy.c
515
val = RD4(sc, IF_USB_SUSP_CTRL);
sys/arm/nvidia/tegra_usbphy.c
516
val |= UTMIP_RESET;
sys/arm/nvidia/tegra_usbphy.c
517
WR4(sc, IF_USB_SUSP_CTRL, val);
sys/arm/nvidia/tegra_usbphy.c
519
val = RD4(sc, UTMIP_BAT_CHRG_CFG0);
sys/arm/nvidia/tegra_usbphy.c
520
val |= UTMIP_PD_CHRG;
sys/arm/nvidia/tegra_usbphy.c
521
WR4(sc, UTMIP_BAT_CHRG_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
523
val = RD4(sc, UTMIP_XCVR_CFG0);
sys/arm/nvidia/tegra_usbphy.c
524
val |= UTMIP_FORCE_PD_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
525
val |= UTMIP_FORCE_PD2_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
526
val |= UTMIP_FORCE_PDZI_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
527
WR4(sc, UTMIP_XCVR_CFG0, val);
sys/arm/nvidia/tegra_usbphy.c
529
val = RD4(sc, UTMIP_XCVR_CFG1);
sys/arm/nvidia/tegra_usbphy.c
530
val |= UTMIP_FORCE_PDDISC_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
531
val |= UTMIP_FORCE_PDCHRP_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
532
val |= UTMIP_FORCE_PDDR_POWERDOWN;
sys/arm/nvidia/tegra_usbphy.c
533
WR4(sc, UTMIP_XCVR_CFG1, val);
sys/arm/nvidia/tegra_usbphy.c
543
val =bus_read_4(sc->pads_res, UTMIP_BIAS_CFG0);
sys/arm/nvidia/tegra_usbphy.c
544
val |= UTMIP_OTGPD;
sys/arm/nvidia/tegra_usbphy.c
545
val |= UTMIP_BIASPD;
sys/arm/nvidia/tegra_usbphy.c
546
bus_write_4(sc->pads_res, UTMIP_BIAS_CFG0, val);
sys/arm/nvidia/tegra_xhci.c
374
CSB_WR4(struct tegra_xhci_softc *sc, uint32_t addr, uint32_t val)
sys/arm/nvidia/tegra_xhci.c
378
FPCI_WR4(sc, ARU_C11_CSBRANGE_ADDR(addr), val);
sys/arm/rockchip/rk32xx_mp.c
100
val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON);
sys/arm/rockchip/rk32xx_mp.c
102
val &= ~(1 << i);
sys/arm/rockchip/rk32xx_mp.c
103
bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val);
sys/arm/rockchip/rk32xx_mp.c
107
val = pmap_kextract((vm_offset_t)mpentry);
sys/arm/rockchip/rk32xx_mp.c
108
bus_space_write_4(fdtbus_bs_tag, imem, 8, val);
sys/arm/rockchip/rk32xx_mp.c
82
uint32_t val;
sys/arm/rockchip/rk32xx_mp.c
93
val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON);
sys/arm/rockchip/rk32xx_mp.c
95
val |= 1 << i;
sys/arm/rockchip/rk32xx_mp.c
96
bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val);
sys/arm/ti/aintc.c
88
#define aintc_write_4(_sc, reg, val) \
sys/arm/ti/aintc.c
89
bus_space_write_4((_sc)->aintc_bst, (_sc)->aintc_bsh, (reg), (val))
sys/arm/ti/am335x/am3359_cppi41.c
101
val = bus_space_read_4(sc->bst, sc->bsh, addr);
sys/arm/ti/am335x/am3359_cppi41.c
103
DPRINTF(sc->dev, "offset=%lx Read %x\n", addr, val);
sys/arm/ti/am335x/am3359_cppi41.c
104
return (val);
sys/arm/ti/am335x/am3359_cppi41.c
80
ti_am3359_cppi41_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm/ti/am335x/am3359_cppi41.c
85
DPRINTF(sc->dev, "offset=%lx write %x\n", addr, val);
sys/arm/ti/am335x/am3359_cppi41.c
87
bus_space_write_4(sc->bst, sc->bsh, addr, val);
sys/arm/ti/am335x/am3359_cppi41.c
96
uint32_t val;
sys/arm/ti/am335x/am335x_dmtimer.c
89
#define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->tmr_mem_res, (reg), (val))
sys/arm/ti/am335x/am335x_dmtpps.c
146
#define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->mem_res, (reg), (val))
sys/arm/ti/am335x/am335x_lcd.c
397
am335x_read_property(device_t dev, phandle_t node, const char *name, uint32_t *val)
sys/arm/ti/am335x/am335x_lcd.c
407
*val = cell;
sys/arm/ti/am335x/am335x_lcd_syscons.c
619
am335x_syscons_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/arm/ti/am335x/am335x_musb.c
104
#define USBCTRL_WRITE4(sc, reg, val) \
sys/arm/ti/am335x/am335x_musb.c
105
USB_WRITE4((sc), RES_USBCTRL, (reg), (val))
sys/arm/ti/am335x/am335x_musb.c
98
#define USB_WRITE4(sc, idx, reg, val) do { \
sys/arm/ti/am335x/am335x_musb.c
99
bus_write_4((sc)->sc_mem_res[idx], (reg), (val)); \
sys/arm/ti/clk/ti_clk_clkctrl.c
100
READ4(clk, sc->register_offset, &val);
sys/arm/ti/clk/ti_clk_clkctrl.c
102
val, GPIO_X_GDBCLK_MASK, MODULEMODE_MASK,
sys/arm/ti/clk/ti_clk_clkctrl.c
106
val = val & MODULEMODE_MASK;
sys/arm/ti/clk/ti_clk_clkctrl.c
107
val |= GPIOX_GDBCLK_ENABLE;
sys/arm/ti/clk/ti_clk_clkctrl.c
109
val = val & MODULEMODE_MASK;
sys/arm/ti/clk/ti_clk_clkctrl.c
110
val |= GPIOX_GDBCLK_DISABLE;
sys/arm/ti/clk/ti_clk_clkctrl.c
113
DPRINTF(sc->dev, "val %x\n", val);
sys/arm/ti/clk/ti_clk_clkctrl.c
114
WRITE4(clk, sc->register_offset, val);
sys/arm/ti/clk/ti_clk_clkctrl.c
118
READ4(clk, sc->register_offset, &val);
sys/arm/ti/clk/ti_clk_clkctrl.c
119
gpio_x_gdbclk = val & GPIO_X_GDBCLK_MASK;
sys/arm/ti/clk/ti_clk_clkctrl.c
139
uint32_t val, idlest, module;
sys/arm/ti/clk/ti_clk_clkctrl.c
150
READ4(clk, sc->register_offset, &val);
sys/arm/ti/clk/ti_clk_clkctrl.c
158
READ4(clk, sc->register_offset, &val);
sys/arm/ti/clk/ti_clk_clkctrl.c
159
idlest = val & IDLEST_MASK;
sys/arm/ti/clk/ti_clk_clkctrl.c
160
module = val & MODULEMODE_MASK;
sys/arm/ti/clk/ti_clk_clkctrl.c
70
#define WRITE4(_clk, off, val) \
sys/arm/ti/clk/ti_clk_clkctrl.c
71
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/arm/ti/clk/ti_clk_clkctrl.c
72
#define READ4(_clk, off, val) \
sys/arm/ti/clk/ti_clk_clkctrl.c
73
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/arm/ti/clk/ti_clk_clkctrl.c
95
uint32_t val, gpio_x_gdbclk;
sys/arm/ti/clk/ti_clk_dpll.c
142
ti_clk_get_factor(uint32_t val, struct ti_clk_factor *factor)
sys/arm/ti/clk/ti_clk_dpll.c
149
factor_val = (val & factor->mask) >> factor->shift;
sys/arm/ti/clk/ti_clk_dpll.c
159
uint32_t val;
sys/arm/ti/clk/ti_clk_dpll.c
165
val = raw;
sys/arm/ti/clk/ti_clk_dpll.c
168
val = factor->max_value;
sys/arm/ti/clk/ti_clk_dpll.c
170
val = raw - 1;
sys/arm/ti/clk/ti_clk_dpll.c
172
return (val);
sys/arm/ti/clk/ti_clk_dpll.c
181
uint32_t val, n, p, best_n, best_p, timeout;
sys/arm/ti/clk/ti_clk_dpll.c
215
READ4(clk, sc->ti_idlest_offset, &val);
sys/arm/ti/clk/ti_clk_dpll.c
216
} while (!(val & ST_MN_BYPASS_MASK) && timeout--);
sys/arm/ti/clk/ti_clk_dpll.c
224
READ4(clk, sc->ti_clksel_offset, &val);
sys/arm/ti/clk/ti_clk_dpll.c
228
val &= ~sc->n.mask;
sys/arm/ti/clk/ti_clk_dpll.c
229
val &= ~sc->p.mask;
sys/arm/ti/clk/ti_clk_dpll.c
230
val |= n << sc->n.shift;
sys/arm/ti/clk/ti_clk_dpll.c
231
val |= p << sc->p.shift;
sys/arm/ti/clk/ti_clk_dpll.c
233
WRITE4(clk, sc->ti_clksel_offset, val);
sys/arm/ti/clk/ti_clk_dpll.c
248
READ4(clk, sc->ti_idlest_offset, &val);
sys/arm/ti/clk/ti_clk_dpll.c
249
} while (!(val & ST_DPLL_CLK_MASK) && timeout--);
sys/arm/ti/clk/ti_clk_dpll.c
266
uint32_t val, n, p;
sys/arm/ti/clk/ti_clk_dpll.c
271
READ4(clk, sc->ti_clksel_offset, &val);
sys/arm/ti/clk/ti_clk_dpll.c
274
n = ti_clk_get_factor(val, &sc->n);
sys/arm/ti/clk/ti_clk_dpll.c
275
p = ti_clk_get_factor(val, &sc->p);
sys/arm/ti/clk/ti_clk_dpll.c
62
#define WRITE4(_clk, off, val) \
sys/arm/ti/clk/ti_clk_dpll.c
63
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/arm/ti/clk/ti_clk_dpll.c
64
#define READ4(_clk, off, val) \
sys/arm/ti/clk/ti_clk_dpll.c
65
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/arm/ti/cpsw/if_cpsw.c
375
#define cpsw_cpdma_read_bd(sc, slot, val) \
sys/arm/ti/cpsw/if_cpsw.c
376
bus_read_region_4(sc->mem_res, slot->bd_offset, (uint32_t *) val, 4)
sys/arm/ti/cpsw/if_cpsw.c
377
#define cpsw_cpdma_write_bd(sc, slot, val) \
sys/arm/ti/cpsw/if_cpsw.c
378
bus_write_region_4(sc->mem_res, slot->bd_offset, (uint32_t *) val, 4)
sys/arm/ti/cpsw/if_cpsw.c
381
#define cpsw_cpdma_write_bd_flags(sc, slot, val) \
sys/arm/ti/cpsw/if_cpsw.c
382
bus_write_2(sc->mem_res, slot->bd_offset + 14, val)
sys/arm/ti/cpsw/if_cpsw.c
390
#define cpsw_write_cp(sc, queue, val) \
sys/arm/ti/cpsw/if_cpsw.c
391
cpsw_write_4(sc, (queue)->hdp_offset + CP_OFFSET, (val))
sys/arm/ti/ti_adc.c
210
uint32_t reg, val;
sys/arm/ti/ti_adc.c
216
val = ADC_READ4(sc, reg);
sys/arm/ti/ti_adc.c
219
val &= ~ADC_STEP_DIFF_CNTRL;
sys/arm/ti/ti_adc.c
222
val &= ~ADC_STEP_RFM_MSK;
sys/arm/ti/ti_adc.c
225
val &= ~ADC_STEP_RFP_MSK;
sys/arm/ti/ti_adc.c
228
val &= ~ADC_STEP_AVG_MSK;
sys/arm/ti/ti_adc.c
229
val |= input->samples << ADC_STEP_AVG_SHIFT;
sys/arm/ti/ti_adc.c
232
val &= ~ADC_STEP_INP_MSK;
sys/arm/ti/ti_adc.c
233
val |= ain << ADC_STEP_INP_SHIFT;
sys/arm/ti/ti_adc.c
236
val &= ~ADC_STEP_MODE_MSK;
sys/arm/ti/ti_adc.c
238
ADC_WRITE4(sc, reg, val);
sys/arm/ti/ti_adc.c
618
uint32_t stepconfig, val;
sys/arm/ti/ti_adc.c
660
val = ADC_READ4(sc, ADC_IDLECONFIG);
sys/arm/ti/ti_adc.c
661
ADC_WRITE4(sc, ADC_TC_CHARGE_STEPCONFIG, val);
sys/arm/ti/ti_adc.c
692
uint32_t val;
sys/arm/ti/ti_adc.c
694
val = ADC_STEP_YNN_SW | ADC_STEP_INM(8) | ADC_STEP_INP(8) | ADC_STEP_YPN_SW;
sys/arm/ti/ti_adc.c
696
ADC_WRITE4(sc, ADC_IDLECONFIG, val);
sys/arm/ti/ti_edma3.c
124
#define ti_edma3_cc_wr_4(reg, val) bus_write_4(ti_edma3_sc->mem_res[0], reg, val)
sys/arm/ti/ti_gpio.c
172
uint32_t val)
sys/arm/ti/ti_gpio.c
174
bus_write_4(sc->sc_mem_res, off, val);
sys/arm/ti/ti_gpio.c
469
uint32_t oe, reg, val;
sys/arm/ti/ti_gpio.c
485
val = ti_gpio_read_4(sc, reg);
sys/arm/ti/ti_gpio.c
486
*value = (val & TI_GPIO_MASK(pin)) ? 1 : 0;
sys/arm/ti/ti_gpio.c
508
uint32_t reg, val;
sys/arm/ti/ti_gpio.c
516
val = ti_gpio_read_4(sc, TI_GPIO_DATAOUT);
sys/arm/ti/ti_gpio.c
517
if (val & TI_GPIO_MASK(pin))
sys/arm/ti/ti_i2c.c
171
ti_i2c_write_2(struct ti_i2c_softc *sc, bus_size_t off, uint16_t val)
sys/arm/ti/ti_i2c.c
174
bus_write_2(sc->sc_mem_res, off, val);
sys/arm/ti/ti_i2c.c
743
unsigned int val;
sys/arm/ti/ti_i2c.c
753
val = sc->sc_timeout;
sys/arm/ti/ti_i2c.c
756
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm/ti/ti_i2c.c
760
sc->sc_timeout = val;
sys/arm/ti/ti_mbox.c
110
ti_mbox_reg_write(struct ti_mbox_softc *sc, uint16_t reg, uint32_t val)
sys/arm/ti/ti_mbox.c
112
bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
sys/arm/ti/ti_pinmux.c
73
#define ti_pinmux_write_2(sc, reg, val) \
sys/arm/ti/ti_pinmux.c
74
bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
sys/arm/ti/ti_pinmux.c
77
#define ti_pinmux_write_4(sc, reg, val) \
sys/arm/ti/ti_pinmux.c
78
bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
sys/arm/ti/ti_prcm.c
194
ti_prcm_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm/ti/ti_prcm.c
199
DPRINTF(sc->dev, "offset=%lx write %x\n", addr, val);
sys/arm/ti/ti_prcm.c
200
bus_space_write_4(sc->bst, sc->bsh, addr, val);
sys/arm/ti/ti_prcm.c
204
ti_prcm_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm/ti/ti_prcm.c
210
*val = bus_space_read_4(sc->bst, sc->bsh, addr);
sys/arm/ti/ti_prcm.c
211
DPRINTF(sc->dev, "offset=%lx Read %x\n", addr, *val);
sys/arm/ti/ti_prcm.h
31
int ti_prcm_write_4(device_t dev, bus_addr_t addr, uint32_t val);
sys/arm/ti/ti_prcm.h
32
int ti_prcm_read_4(device_t dev, bus_addr_t addr, uint32_t *val);
sys/arm/ti/ti_prm.c
142
ti_prm_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm/ti/ti_prm.c
147
DPRINTF(dev, "offset=%lx write %x\n", addr, val);
sys/arm/ti/ti_prm.c
149
ti_prcm_write_4(parent, addr, val);
sys/arm/ti/ti_prm.c
155
ti_prm_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm/ti/ti_prm.c
162
ti_prcm_read_4(parent, addr, val);
sys/arm/ti/ti_prm.c
164
DPRINTF(dev, "offset=%lx Read %x\n", addr, *val);
sys/arm/ti/ti_prm.h
32
int ti_prm_write_4(device_t dev, bus_addr_t addr, uint32_t val);
sys/arm/ti/ti_prm.h
33
int ti_prm_read_4(device_t dev, bus_addr_t addr, uint32_t *val);
sys/arm/ti/ti_pruss.c
292
ti_pruss_reg_write(struct ti_pruss_softc *sc, uint32_t reg, uint32_t val)
sys/arm/ti/ti_pruss.c
294
bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
sys/arm/ti/ti_pruss.c
732
int val;
sys/arm/ti/ti_pruss.c
744
val = ti_pruss_reg_read(sc, PRUSS_INTC_HIER);
sys/arm/ti/ti_pruss.c
745
if (!(val & pru_int_mask))
sys/arm/ti/ti_scm.h
52
int ti_scm_reg_read_4(uint32_t reg, uint32_t *val);
sys/arm/ti/ti_scm.h
53
int ti_scm_reg_write_4(uint32_t reg, uint32_t val);
sys/arm/ti/ti_scm_syscon.c
101
uint32_t val;
sys/arm/ti/ti_scm_syscon.c
106
val = bus_space_read_4(sc->bst, sc->bsh, offset);
sys/arm/ti/ti_scm_syscon.c
108
DPRINTF(sc->dev, "offset=%lx Read %x\n", offset, val);
sys/arm/ti/ti_scm_syscon.c
109
return (val);
sys/arm/ti/ti_scm_syscon.c
212
ti_scm_syscon_clk_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm/ti/ti_scm_syscon.c
217
DPRINTF(sc->dev, "offset=%lx write %x\n", addr, val);
sys/arm/ti/ti_scm_syscon.c
218
bus_space_write_4(sc->bst, sc->bsh, addr, val);
sys/arm/ti/ti_scm_syscon.c
223
ti_scm_syscon_clk_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm/ti/ti_scm_syscon.c
229
*val = bus_space_read_4(sc->bst, sc->bsh, addr);
sys/arm/ti/ti_scm_syscon.c
230
DPRINTF(sc->dev, "offset=%lx Read %x\n", addr, *val);
sys/arm/ti/ti_scm_syscon.c
85
ti_scm_syscon_write_4(struct syscon *syscon, bus_size_t offset, uint32_t val)
sys/arm/ti/ti_scm_syscon.c
90
DPRINTF(sc->dev, "offset=%lx write %x\n", offset, val);
sys/arm/ti/ti_scm_syscon.c
92
bus_space_write_4(sc->bst, sc->bsh, offset, val);
sys/arm/ti/ti_sdhci.c
140
ti_mmchs_write_4(struct ti_sdhci_softc *sc, bus_size_t off, uint32_t val)
sys/arm/ti/ti_sdhci.c
143
bus_write_4(sc->mem_res, off + sc->mmchs_reg_off, val);
sys/arm/ti/ti_sdhci.c
154
WR4(struct ti_sdhci_softc *sc, bus_size_t off, uint32_t val)
sys/arm/ti/ti_sdhci.c
157
bus_write_4(sc->mem_res, off + sc->sdhci_reg_off, val);
sys/arm/ti/ti_sdhci.c
246
uint8_t val)
sys/arm/ti/ti_sdhci.c
256
if (val & SDHCI_CTRL_8BITBUS) {
sys/arm/ti/ti_sdhci.c
269
val32 |= (val << (off & 3) * 8);
sys/arm/ti/ti_sdhci.c
276
uint16_t val)
sys/arm/ti/ti_sdhci.c
287
clkdiv = (val >> SDHCI_DIVIDER_SHIFT) & SDHCI_DIVIDER_MASK;
sys/arm/ti/ti_sdhci.c
289
clkdiv |= ((val >> SDHCI_DIVIDER_HI_SHIFT) &
sys/arm/ti/ti_sdhci.c
296
val32 |= val & ~(MMCHS_SYSCTL_CLKD_MASK <<
sys/arm/ti/ti_sdhci.c
308
((uint32_t)val & 0x0000ffff);
sys/arm/ti/ti_sdhci.c
312
((uint32_t)val << 16);
sys/arm/ti/ti_sdhci.c
319
val32 |= ((val & 0xffff) << (off & 3) * 8);
sys/arm/ti/ti_sdhci.c
325
uint32_t val)
sys/arm/ti/ti_sdhci.c
329
WR4(sc, off, val);
sys/arm/ti/ti_sdma.c
173
ti_sdma_write_4(struct ti_sdma_softc *sc, bus_size_t off, uint32_t val)
sys/arm/ti/ti_sdma.c
175
bus_write_4(sc->sc_mem_res, off, val);
sys/arm/ti/ti_wdt.c
101
ti_wdt_reg_write(struct ti_wdt_softc *sc, uint32_t reg, uint32_t val)
sys/arm/ti/ti_wdt.c
104
bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
sys/arm/xilinx/zy7_devcfg.c
97
#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))
sys/arm/xilinx/zy7_gpio.c
181
#define WR4(sc, off, val) bus_write_4((sc)->mem_res, (off), (val))
sys/arm/xilinx/zy7_qspi.c
106
#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))
sys/arm/xilinx/zy7_slcr.c
74
#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))
sys/arm/xilinx/zy7_spi.c
93
#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))
sys/arm64/apple/apple_aic.c
59
#define AIC_INFO_NDIE(val) (((val) >> 24) & 0xf)
sys/arm64/apple/apple_aic.c
60
#define AIC_INFO_NIRQS(val) ((val) & 0x0000ffff)
sys/arm64/apple/apple_aic.c
64
#define AIC_EVENT_DIE(val) (((val) >> 24) & 0xff)
sys/arm64/apple/apple_aic.c
65
#define AIC_EVENT_TYPE(val) (((val) >> 16) & 0xff)
sys/arm64/apple/apple_aic.c
69
#define AIC_EVENT_IRQ(val) ((val) & 0xffff)
sys/arm64/apple/apple_pinctrl.c
306
apple_pinctrl_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm64/apple/apple_pinctrl.c
317
*val = !!(reg & GPIO_PIN_DATA);
sys/arm64/apple/apple_pinctrl.c
65
#define HWRITE4(sc, reg, val) \
sys/arm64/apple/apple_pinctrl.c
66
bus_write_4((sc)->sc_res[APPLE_PINCTRL_MEMRES], reg, val)
sys/arm64/arm64/cmn600.c
192
cmn600_node_write8(struct cmn600_node *nd, uint32_t reg, uint64_t val)
sys/arm64/arm64/cmn600.c
195
WR8(nd->sc, nd->nd_offset + reg, val);
sys/arm64/arm64/cmn600.c
206
cmn600_node_write4(struct cmn600_node *nd, uint32_t reg, uint32_t val)
sys/arm64/arm64/cmn600.c
209
WR4(nd->sc, nd->nd_offset + reg, val);
sys/arm64/arm64/cmn600.c
309
uint32_t val;
sys/arm64/arm64/cmn600.c
313
val = 0;
sys/arm64/arm64/cmn600.c
314
err = sysctl_handle_int(oidp, &val, 0, req);
sys/arm64/arm64/cmn600.c
319
if (val != 0)
sys/arm64/arm64/cmn600.c
331
uint64_t val;
sys/arm64/arm64/cmn600.c
343
val = node->nd_read8(node, POR_CFGM_NODE_INFO);
sys/arm64/arm64/cmn600.c
344
node->nd_type = FLD(val, POR_CFGM_NODE_INFO_NODE_TYPE);
sys/arm64/arm64/cmn600.c
345
node->nd_id = FLD(val, POR_CFGM_NODE_INFO_NODE_ID);
sys/arm64/arm64/cmn600.c
346
node->nd_logical_id = FLD(val, POR_CFGM_NODE_INFO_LOGICAL_ID);
sys/arm64/arm64/cmn600.c
348
val = node->nd_read8(node, POR_CFGM_CHILD_INFO);
sys/arm64/arm64/cmn600.c
349
node->nd_child_count = FLD(val, POR_CFGM_CHILD_INFO_CHILD_COUNT);
sys/arm64/arm64/cmn600.c
350
child_offset = FLD(val, POR_CFGM_CHILD_INFO_CHILD_PTR_OFFSET);
sys/arm64/arm64/cmn600.c
355
val = node->nd_read8(node, child_offset + (i * 8));
sys/arm64/arm64/cmn600.c
356
val &= POR_CFGM_CHILD_POINTER_BASE_MASK;
sys/arm64/arm64/cmn600.c
357
val = RD8(sc, val + POR_CFGM_NODE_INFO);
sys/arm64/arm64/cmn600.c
359
if (FLD(val, POR_CFGM_NODE_INFO_NODE_ID) != 8)
sys/arm64/arm64/cmn600.c
362
sc->sc_mesh_x = FLD(val, POR_CFGM_NODE_INFO_LOGICAL_ID);
sys/arm64/arm64/cmn600.c
373
val = node->nd_read8(node, POR_INFO_GLOBAL);
sys/arm64/arm64/cmn600.c
374
sc->sc_r2 = (val & POR_INFO_GLOBAL_R2_ENABLE) ? 1 : 0;
sys/arm64/arm64/cmn600.c
375
val = node->nd_read4(node, POR_CFGM_PERIPH_ID_2_PERIPH_ID_3);
sys/arm64/arm64/cmn600.c
376
sc->sc_rev = FLD(val, POR_CFGM_PERIPH_ID_2_REV);
sys/arm64/arm64/cmn600.c
400
val = node->nd_read8(node, child_offset + (i * 8));
sys/arm64/arm64/cmn600.c
401
node->nd_children[i] = cmn600_create_node(sc, val &
sys/arm64/arm64/cmn600.c
556
pmu_cmn600_wr4(void *arg, int nodeid, int node_type, off_t reg, uint32_t val)
sys/arm64/arm64/cmn600.c
566
cmn600_node_write4(node, reg, val);
sys/arm64/arm64/cmn600.c
585
pmu_cmn600_wr8(void *arg, int nodeid, int node_type, off_t reg, uint64_t val)
sys/arm64/arm64/cmn600.c
595
cmn600_node_write8(node, reg, val);
sys/arm64/arm64/cmn600.c
600
pmu_cmn600_set8(void *arg, int nodeid, int node_type, off_t reg, uint64_t val)
sys/arm64/arm64/cmn600.c
610
cmn600_node_write8(node, reg, cmn600_node_read8(node, reg) | val);
sys/arm64/arm64/cmn600.c
615
pmu_cmn600_clr8(void *arg, int nodeid, int node_type, off_t reg, uint64_t val)
sys/arm64/arm64/cmn600.c
625
cmn600_node_write8(node, reg, cmn600_node_read8(node, reg) & ~val);
sys/arm64/arm64/cmn600.c
631
uint64_t val)
sys/arm64/arm64/cmn600.c
642
val);
sys/arm64/arm64/cmn600.c
778
uint64_t mask, ready, val;
sys/arm64/arm64/cmn600.c
784
val = node->nd_read8(node, POR_DT_PMOVSR);
sys/arm64/arm64/cmn600.c
785
if (val & POR_DT_PMOVSR_CYCLE_COUNTER)
sys/arm64/arm64/cmn600.c
788
if (val & POR_DT_PMOVSR_EVENT_COUNTERS) {
sys/arm64/arm64/cmn600.c
791
if ((val & mask) == 0)
sys/arm64/arm64/cpu_feat.c
49
bool val;
sys/arm64/arm64/cpu_feat.c
61
if (TUNABLE_BOOL_FETCH(tunable, &val)) {
sys/arm64/arm64/cpu_feat.c
62
if (val) {
sys/arm64/arm64/debug_monitor.c
107
#define DBG_WB_READ(reg, num, val) do { \
sys/arm64/arm64/debug_monitor.c
108
__asm __volatile("mrs %0, dbg" reg #num "_el1" : "=r" (val)); \
sys/arm64/arm64/debug_monitor.c
111
#define DBG_WB_WRITE(reg, num, val) do { \
sys/arm64/arm64/debug_monitor.c
112
__asm __volatile("msr dbg" reg #num "_el1, %0" :: "r" (val)); \
sys/arm64/arm64/debug_monitor.c
115
#define READ_WB_REG_CASE(reg, num, offset, val) \
sys/arm64/arm64/debug_monitor.c
117
DBG_WB_READ(reg, num, val); \
sys/arm64/arm64/debug_monitor.c
120
#define WRITE_WB_REG_CASE(reg, num, offset, val) \
sys/arm64/arm64/debug_monitor.c
122
DBG_WB_WRITE(reg, num, val); \
sys/arm64/arm64/debug_monitor.c
125
#define SWITCH_CASES_READ_WB_REG(reg, offset, val) \
sys/arm64/arm64/debug_monitor.c
126
READ_WB_REG_CASE(reg, 0, offset, val); \
sys/arm64/arm64/debug_monitor.c
127
READ_WB_REG_CASE(reg, 1, offset, val); \
sys/arm64/arm64/debug_monitor.c
128
READ_WB_REG_CASE(reg, 2, offset, val); \
sys/arm64/arm64/debug_monitor.c
129
READ_WB_REG_CASE(reg, 3, offset, val); \
sys/arm64/arm64/debug_monitor.c
130
READ_WB_REG_CASE(reg, 4, offset, val); \
sys/arm64/arm64/debug_monitor.c
131
READ_WB_REG_CASE(reg, 5, offset, val); \
sys/arm64/arm64/debug_monitor.c
132
READ_WB_REG_CASE(reg, 6, offset, val); \
sys/arm64/arm64/debug_monitor.c
133
READ_WB_REG_CASE(reg, 7, offset, val); \
sys/arm64/arm64/debug_monitor.c
134
READ_WB_REG_CASE(reg, 8, offset, val); \
sys/arm64/arm64/debug_monitor.c
135
READ_WB_REG_CASE(reg, 9, offset, val); \
sys/arm64/arm64/debug_monitor.c
136
READ_WB_REG_CASE(reg, 10, offset, val); \
sys/arm64/arm64/debug_monitor.c
137
READ_WB_REG_CASE(reg, 11, offset, val); \
sys/arm64/arm64/debug_monitor.c
138
READ_WB_REG_CASE(reg, 12, offset, val); \
sys/arm64/arm64/debug_monitor.c
139
READ_WB_REG_CASE(reg, 13, offset, val); \
sys/arm64/arm64/debug_monitor.c
140
READ_WB_REG_CASE(reg, 14, offset, val); \
sys/arm64/arm64/debug_monitor.c
141
READ_WB_REG_CASE(reg, 15, offset, val)
sys/arm64/arm64/debug_monitor.c
143
#define SWITCH_CASES_WRITE_WB_REG(reg, offset, val) \
sys/arm64/arm64/debug_monitor.c
144
WRITE_WB_REG_CASE(reg, 0, offset, val); \
sys/arm64/arm64/debug_monitor.c
145
WRITE_WB_REG_CASE(reg, 1, offset, val); \
sys/arm64/arm64/debug_monitor.c
146
WRITE_WB_REG_CASE(reg, 2, offset, val); \
sys/arm64/arm64/debug_monitor.c
147
WRITE_WB_REG_CASE(reg, 3, offset, val); \
sys/arm64/arm64/debug_monitor.c
148
WRITE_WB_REG_CASE(reg, 4, offset, val); \
sys/arm64/arm64/debug_monitor.c
149
WRITE_WB_REG_CASE(reg, 5, offset, val); \
sys/arm64/arm64/debug_monitor.c
150
WRITE_WB_REG_CASE(reg, 6, offset, val); \
sys/arm64/arm64/debug_monitor.c
151
WRITE_WB_REG_CASE(reg, 7, offset, val); \
sys/arm64/arm64/debug_monitor.c
152
WRITE_WB_REG_CASE(reg, 8, offset, val); \
sys/arm64/arm64/debug_monitor.c
153
WRITE_WB_REG_CASE(reg, 9, offset, val); \
sys/arm64/arm64/debug_monitor.c
154
WRITE_WB_REG_CASE(reg, 10, offset, val); \
sys/arm64/arm64/debug_monitor.c
155
WRITE_WB_REG_CASE(reg, 11, offset, val); \
sys/arm64/arm64/debug_monitor.c
156
WRITE_WB_REG_CASE(reg, 12, offset, val); \
sys/arm64/arm64/debug_monitor.c
157
WRITE_WB_REG_CASE(reg, 13, offset, val); \
sys/arm64/arm64/debug_monitor.c
158
WRITE_WB_REG_CASE(reg, 14, offset, val); \
sys/arm64/arm64/debug_monitor.c
159
WRITE_WB_REG_CASE(reg, 15, offset, val)
sys/arm64/arm64/debug_monitor.c
165
uint64_t val = 0;
sys/arm64/arm64/debug_monitor.c
168
SWITCH_CASES_READ_WB_REG(DBG_WB_WVR, DBG_REG_BASE_WVR, val);
sys/arm64/arm64/debug_monitor.c
169
SWITCH_CASES_READ_WB_REG(DBG_WB_WCR, DBG_REG_BASE_WCR, val);
sys/arm64/arm64/debug_monitor.c
170
SWITCH_CASES_READ_WB_REG(DBG_WB_BVR, DBG_REG_BASE_BVR, val);
sys/arm64/arm64/debug_monitor.c
171
SWITCH_CASES_READ_WB_REG(DBG_WB_BCR, DBG_REG_BASE_BCR, val);
sys/arm64/arm64/debug_monitor.c
176
return val;
sys/arm64/arm64/debug_monitor.c
181
dbg_wb_write_reg(int reg, int n, uint64_t val)
sys/arm64/arm64/debug_monitor.c
184
SWITCH_CASES_WRITE_WB_REG(DBG_WB_WVR, DBG_REG_BASE_WVR, val);
sys/arm64/arm64/debug_monitor.c
185
SWITCH_CASES_WRITE_WB_REG(DBG_WB_WCR, DBG_REG_BASE_WCR, val);
sys/arm64/arm64/debug_monitor.c
186
SWITCH_CASES_WRITE_WB_REG(DBG_WB_BVR, DBG_REG_BASE_BVR, val);
sys/arm64/arm64/debug_monitor.c
187
SWITCH_CASES_WRITE_WB_REG(DBG_WB_BCR, DBG_REG_BASE_BCR, val);
sys/arm64/arm64/disassem.c
289
uint32_t mask, val;
sys/arm64/arm64/disassem.c
298
val = 0;
sys/arm64/arm64/disassem.c
319
val |= (1 << a);
sys/arm64/arm64/disassem.c
372
tab->pattern = val;
sys/arm64/arm64/disassem.c
393
const char *token, int *val)
sys/arm64/arm64/disassem.c
399
*val = (opcode >> insn->tokens[i].pos &
sys/arm64/arm64/disassem.c
410
const char *token, int *val)
sys/arm64/arm64/disassem.c
418
*val = ((opcode >> insn->tokens[i].pos) & msk);
sys/arm64/arm64/disassem.c
421
if (*val & (1 << (insn->tokens[i].len - 1)))
sys/arm64/arm64/disassem.c
422
*val |= ~msk;
sys/arm64/arm64/elf_machdep.c
179
reloc_instr_imm(Elf32_Addr *where, Elf_Addr val, u_int msb, u_int lsb)
sys/arm64/arm64/elf_machdep.c
183
if ((uint64_t)((int64_t)val >> (msb + 1)) + 1 > 1)
sys/arm64/arm64/elf_machdep.c
185
val >>= lsb;
sys/arm64/arm64/elf_machdep.c
186
val &= (1 << (msb - lsb + 1)) - 1;
sys/arm64/arm64/elf_machdep.c
187
*where |= (Elf32_Addr)val;
sys/arm64/arm64/elf_machdep.c
201
Elf_Addr *where, addr, addend, val;
sys/arm64/arm64/elf_machdep.c
276
val = ((Elf64_Addr (*)(void))addr)();
sys/arm64/arm64/elf_machdep.c
277
if (*where != val)
sys/arm64/arm64/elf_machdep.c
278
*where = val;
sys/arm64/arm64/gdb_machdep.c
78
gdb_cpu_setreg(int regnum, void *val)
sys/arm64/arm64/gdb_machdep.c
80
register_t regval = *(register_t *)val;
sys/arm64/arm64/gic_v3.c
1156
uint64_t aff, val, irq;
sys/arm64/arm64/gic_v3.c
1163
val = 0;
sys/arm64/arm64/gic_v3.c
1170
if (val != 0) {
sys/arm64/arm64/gic_v3.c
1171
gic_icc_write(SGI1R, val);
sys/arm64/arm64/gic_v3.c
1172
val = 0;
sys/arm64/arm64/gic_v3.c
1184
if (val == 0)
sys/arm64/arm64/gic_v3.c
1185
val = ICC_SGI1R_AFFINITY(aff) |
sys/arm64/arm64/gic_v3.c
1188
val |= 1 << CPU_AFF0(CPU_AFFINITY(i));
sys/arm64/arm64/gic_v3.c
1193
if (val != 0)
sys/arm64/arm64/gic_v3.c
1194
gic_icc_write(SGI1R, val);
sys/arm64/arm64/gic_v3.c
244
gic_r_write_4(device_t dev, bus_size_t offset, uint32_t val)
sys/arm64/arm64/gic_v3.c
252
bus_write_4(rdist, offset, val);
sys/arm64/arm64/gic_v3.c
256
gic_r_write_8(device_t dev, bus_size_t offset, uint64_t val)
sys/arm64/arm64/gic_v3.c
264
bus_write_8(rdist, offset, val);
sys/arm64/arm64/gic_v3_reg.h
503
#define gic_icc_write(reg, val) \
sys/arm64/arm64/gic_v3_reg.h
505
WRITE_SPECIALREG(icc_ ##reg ##_el1, val); \
sys/arm64/arm64/gic_v3_reg.h
511
uint64_t val; \
sys/arm64/arm64/gic_v3_reg.h
513
val = READ_SPECIALREG(icc_ ##reg ##_el1); \
sys/arm64/arm64/gic_v3_reg.h
514
(val); \
sys/arm64/arm64/gic_v3_reg.h
519
uint64_t val; \
sys/arm64/arm64/gic_v3_reg.h
520
val = gic_icc_read(reg); \
sys/arm64/arm64/gic_v3_reg.h
521
val |= (mask); \
sys/arm64/arm64/gic_v3_reg.h
522
gic_icc_write(reg, val); \
sys/arm64/arm64/gic_v3_reg.h
527
uint64_t val; \
sys/arm64/arm64/gic_v3_reg.h
528
val = gic_icc_read(reg); \
sys/arm64/arm64/gic_v3_reg.h
529
val &= ~(mask); \
sys/arm64/arm64/gic_v3_reg.h
530
gic_icc_write(reg, val); \
sys/arm64/arm64/gic_v3_var.h
141
#define gic_d_write(sc, len, reg, val) \
sys/arm64/arm64/gic_v3_var.h
143
bus_write_##len(sc->gic_dist, reg, val);\
sys/arm64/arm64/gic_v3_var.h
156
#define gic_r_write(sc, len, reg, val) \
sys/arm64/arm64/gic_v3_var.h
163
(val)); \
sys/arm64/arm64/gicv3_its.c
341
#define gic_its_write_4(sc, reg, val) \
sys/arm64/arm64/gicv3_its.c
342
bus_write_4((sc)->sc_its_res, (reg), (val))
sys/arm64/arm64/gicv3_its.c
343
#define gic_its_write_8(sc, reg, val) \
sys/arm64/arm64/gicv3_its.c
344
bus_write_8((sc)->sc_its_res, (reg), (val))
sys/arm64/arm64/identcpu.c
2518
get_kernel_reg_iss(u_int iss, uint64_t *val)
sys/arm64/arm64/identcpu.c
2524
*val = CPU_DESC_FIELD(kern_cpu_desc, i);
sys/arm64/arm64/identcpu.c
2540
uint64_t val;
sys/arm64/arm64/identcpu.c
2544
val = CPU_DESC_FIELD(kern_cpu_desc, i);
sys/arm64/arm64/identcpu.c
2548
fields[j].type, val, fields[j].width,
sys/arm64/arm64/identcpu.c
2560
get_user_reg_iss(u_int iss, uint64_t *val, bool fbsd)
sys/arm64/arm64/identcpu.c
2567
*val = CPU_DESC_FIELD(user_cpu_desc, i);
sys/arm64/arm64/identcpu.c
2569
*val = CPU_DESC_FIELD(l_user_cpu_desc, i);
sys/arm64/arm64/pmap.c
7433
pt_entry_t oldpte, *pte, set, clear, mask, val;
sys/arm64/arm64/pmap.c
7499
val = ATTR_S1_AP(ATTR_S1_AP_RW);
sys/arm64/arm64/pmap.c
7504
val = ATTR_S2_S2AP(ATTR_S2_S2AP_WRITE);
sys/arm64/arm64/pmap.c
7511
if ((oldpte & mask) == val)
sys/arm64/arm64/pmap.c
856
pt_entry_t val;
sys/arm64/arm64/pmap.c
859
val = ATTR_S1_IDX(memattr);
sys/arm64/arm64/pmap.c
861
val |= ATTR_S1_XN;
sys/arm64/arm64/pmap.c
862
return (val);
sys/arm64/arm64/pmap.c
865
val = 0;
sys/arm64/arm64/pmap.c
885
pt_entry_t val;
sys/arm64/arm64/pmap.c
887
val = 0;
sys/arm64/arm64/pmap.c
890
val |= ATTR_S1_XN;
sys/arm64/arm64/pmap.c
892
val |= ATTR_S1_AP(ATTR_S1_AP_RO);
sys/arm64/arm64/pmap.c
8941
int lvl, psind, val;
sys/arm64/arm64/pmap.c
895
val |= ATTR_S2_S2AP(ATTR_S2_S2AP_WRITE);
sys/arm64/arm64/pmap.c
8968
val = MINCORE_INCORE | MINCORE_PSIND(psind);
sys/arm64/arm64/pmap.c
897
val |= ATTR_S2_S2AP(ATTR_S2_S2AP_READ);
sys/arm64/arm64/pmap.c
8971
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/arm64/arm64/pmap.c
8973
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/arm64/arm64/pmap.c
8978
val = 0;
sys/arm64/arm64/pmap.c
8981
if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
sys/arm64/arm64/pmap.c
8986
return (val);
sys/arm64/arm64/pmap.c
899
val |= ATTR_S2_XN(ATTR_S2_XN_ALL);
sys/arm64/arm64/pmap.c
902
return (val);
sys/arm64/arm64/support_ifunc.c
68
DEFINE_IFUNC(, int, swapueword8, (volatile uint8_t *base, uint8_t *val))
sys/arm64/arm64/support_ifunc.c
76
DEFINE_IFUNC(, int, swapueword32, (volatile uint32_t *base, uint32_t *val))
sys/arm64/arm64/undefined.c
186
uint32_t val;
sys/arm64/arm64/undefined.c
209
val = regs[Rm];
sys/arm64/arm64/undefined.c
222
bval = val;
sys/arm64/arm64/undefined.c
224
val = bval;
sys/arm64/arm64/undefined.c
226
error = swapueword32((void *)vaddr, &val);
sys/arm64/arm64/undefined.c
240
regs[Rd] = val;
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
170
uint32_t val;
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
173
val = bus_read_4(sc->reg_base, MDIO_STAT_OFFSET);
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
174
if ((val & MDIO_STAT_DONE) == result)
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
197
uint16_t phyid, uint32_t reg, uint32_t val, uint32_t op)
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
210
param |= val << MDIO_PARAM_PHY_DATA;
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
234
uint32_t val;
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
237
val = bus_read_4(sc->reg_base, MDIO_SCAN_CTRL_OFFSET);
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
238
val |= 1 << MDIO_SCAN_CTRL_OVRIDE_EXT_MSTR;
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
239
bus_write_4(sc->reg_base, MDIO_SCAN_CTRL_OFFSET, val);
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
247
val = divisor;
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
248
val |= MDIO_RATE_ADJ_DIVIDENT << MDIO_RATE_ADJ_DIVIDENT_SHIFT;
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
249
bus_write_4(sc->reg_base, MDIO_RATE_ADJ_EXT_OFFSET, val);
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
250
bus_write_4(sc->reg_base, MDIO_RATE_ADJ_INT_OFFSET, val);
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
257
brcm_iproc_mdio_write_mux(device_t dev, int bus, int phy, int reg, int val)
sys/arm64/broadcom/brcmmdio/mdio_mux_iproc.c
268
return (brcm_iproc_mdio_op(sc, phy, reg, val, MDIO_CTRL_WRITE_OP));
sys/arm64/broadcom/brcmmdio/mdio_nexus_iproc.c
118
brcm_mdionexus_mdio_writereg(device_t dev, int phy, int reg, int val)
sys/arm64/broadcom/brcmmdio/mdio_nexus_iproc.c
125
sc->mux_id, phy, reg, val));
sys/arm64/broadcom/genet/if_genet.c
1019
uint32_t val;
sys/arm64/broadcom/genet/if_genet.c
1029
val = enaddr[3] | (enaddr[2] << 8) | (enaddr[1] << 16) |
sys/arm64/broadcom/genet/if_genet.c
1031
WR4(sc, GENET_UMAC_MAC0, val);
sys/arm64/broadcom/genet/if_genet.c
1032
val = enaddr[5] | (enaddr[4] << 8);
sys/arm64/broadcom/genet/if_genet.c
1033
WR4(sc, GENET_UMAC_MAC1, val);
sys/arm64/broadcom/genet/if_genet.c
1350
uint32_t val;
sys/arm64/broadcom/genet/if_genet.c
1354
val = RD4(sc, GENET_INTRL2_CPU_STAT);
sys/arm64/broadcom/genet/if_genet.c
1355
val &= ~RD4(sc, GENET_INTRL2_CPU_STAT_MASK);
sys/arm64/broadcom/genet/if_genet.c
1356
WR4(sc, GENET_INTRL2_CPU_CLEAR, val);
sys/arm64/broadcom/genet/if_genet.c
1358
if (val & GENET_IRQ_RXDMA_DONE)
sys/arm64/broadcom/genet/if_genet.c
1361
if (val & GENET_IRQ_TXDMA_DONE) {
sys/arm64/broadcom/genet/if_genet.c
1675
int retry, val;
sys/arm64/broadcom/genet/if_genet.c
1678
val = 0;
sys/arm64/broadcom/genet/if_genet.c
1682
val = RD4(sc, GENET_MDIO_CMD);
sys/arm64/broadcom/genet/if_genet.c
1683
WR4(sc, GENET_MDIO_CMD, val | GENET_MDIO_START_BUSY);
sys/arm64/broadcom/genet/if_genet.c
1685
if (((val = RD4(sc, GENET_MDIO_CMD)) &
sys/arm64/broadcom/genet/if_genet.c
1687
if (val & GENET_MDIO_READ_FAILED)
sys/arm64/broadcom/genet/if_genet.c
1689
val &= GENET_MDIO_VAL_MASK;
sys/arm64/broadcom/genet/if_genet.c
1699
return (val);
sys/arm64/broadcom/genet/if_genet.c
1703
gen_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/arm64/broadcom/genet/if_genet.c
1712
(val & GENET_MDIO_VAL_MASK));
sys/arm64/broadcom/genet/if_genet.c
1713
val = RD4(sc, GENET_MDIO_CMD);
sys/arm64/broadcom/genet/if_genet.c
1714
WR4(sc, GENET_MDIO_CMD, val | GENET_MDIO_START_BUSY);
sys/arm64/broadcom/genet/if_genet.c
1716
val = RD4(sc, GENET_MDIO_CMD);
sys/arm64/broadcom/genet/if_genet.c
1717
if ((val & GENET_MDIO_START_BUSY) == 0)
sys/arm64/broadcom/genet/if_genet.c
1732
uint32_t val;
sys/arm64/broadcom/genet/if_genet.c
1767
val = RD4(sc, GENET_EXT_RGMII_OOB_CTRL);
sys/arm64/broadcom/genet/if_genet.c
1768
val &= ~GENET_EXT_RGMII_OOB_OOB_DISABLE;
sys/arm64/broadcom/genet/if_genet.c
1769
val |= GENET_EXT_RGMII_OOB_RGMII_LINK;
sys/arm64/broadcom/genet/if_genet.c
1770
val |= GENET_EXT_RGMII_OOB_RGMII_MODE_EN;
sys/arm64/broadcom/genet/if_genet.c
1772
val |= GENET_EXT_RGMII_OOB_ID_MODE_DISABLE;
sys/arm64/broadcom/genet/if_genet.c
1774
val &= ~GENET_EXT_RGMII_OOB_ID_MODE_DISABLE;
sys/arm64/broadcom/genet/if_genet.c
1775
WR4(sc, GENET_EXT_RGMII_OOB_CTRL, val);
sys/arm64/broadcom/genet/if_genet.c
1777
val = RD4(sc, GENET_UMAC_CMD);
sys/arm64/broadcom/genet/if_genet.c
1778
val &= ~GENET_UMAC_CMD_SPEED;
sys/arm64/broadcom/genet/if_genet.c
1779
val |= speed;
sys/arm64/broadcom/genet/if_genet.c
1780
WR4(sc, GENET_UMAC_CMD, val);
sys/arm64/broadcom/genet/if_genet.c
449
uint32_t maclo, machi, val;
sys/arm64/broadcom/genet/if_genet.c
465
val = RD4(sc, GENET_SYS_RBUF_FLUSH_CTRL);
sys/arm64/broadcom/genet/if_genet.c
466
if ((val & GENET_SYS_RBUF_FLUSH_RESET) == 0) {
sys/arm64/broadcom/genet/if_genet.c
490
uint32_t val;
sys/arm64/broadcom/genet/if_genet.c
492
val = RD4(sc, GENET_SYS_RBUF_FLUSH_CTRL);
sys/arm64/broadcom/genet/if_genet.c
493
val |= GENET_SYS_RBUF_FLUSH_RESET;
sys/arm64/broadcom/genet/if_genet.c
494
WR4(sc, GENET_SYS_RBUF_FLUSH_CTRL, val);
sys/arm64/broadcom/genet/if_genet.c
497
val &= ~GENET_SYS_RBUF_FLUSH_RESET;
sys/arm64/broadcom/genet/if_genet.c
498
WR4(sc, GENET_SYS_RBUF_FLUSH_CTRL, val);
sys/arm64/broadcom/genet/if_genet.c
518
u_int val;
sys/arm64/broadcom/genet/if_genet.c
522
val = RD4(sc, GENET_RBUF_CTRL);
sys/arm64/broadcom/genet/if_genet.c
523
val |= GENET_RBUF_ALIGN_2B;
sys/arm64/broadcom/genet/if_genet.c
524
WR4(sc, GENET_RBUF_CTRL, val);
sys/arm64/broadcom/genet/if_genet.c
529
val = RD4(sc, GENET_UMAC_CMD);
sys/arm64/broadcom/genet/if_genet.c
530
val |= GENET_UMAC_CMD_TXEN;
sys/arm64/broadcom/genet/if_genet.c
531
val |= GENET_UMAC_CMD_RXEN;
sys/arm64/broadcom/genet/if_genet.c
532
WR4(sc, GENET_UMAC_CMD, val);
sys/arm64/broadcom/genet/if_genet.c
551
uint32_t val;
sys/arm64/broadcom/genet/if_genet.c
554
val = RD4(sc, GENET_UMAC_CMD);
sys/arm64/broadcom/genet/if_genet.c
555
val &= ~GENET_UMAC_CMD_RXEN;
sys/arm64/broadcom/genet/if_genet.c
556
WR4(sc, GENET_UMAC_CMD, val);
sys/arm64/broadcom/genet/if_genet.c
559
val = RD4(sc, GENET_UMAC_CMD);
sys/arm64/broadcom/genet/if_genet.c
560
val &= ~GENET_UMAC_CMD_TXEN;
sys/arm64/broadcom/genet/if_genet.c
561
WR4(sc, GENET_UMAC_CMD, val);
sys/arm64/broadcom/genet/if_genet.c
596
int val;
sys/arm64/broadcom/genet/if_genet.c
598
val = RD4(sc, GENET_TX_DMA_CTRL);
sys/arm64/broadcom/genet/if_genet.c
599
val &= ~GENET_TX_DMA_CTRL_EN;
sys/arm64/broadcom/genet/if_genet.c
600
val &= ~GENET_TX_DMA_CTRL_RBUF_EN(GENET_DMA_DEFAULT_QUEUE);
sys/arm64/broadcom/genet/if_genet.c
601
WR4(sc, GENET_TX_DMA_CTRL, val);
sys/arm64/broadcom/genet/if_genet.c
603
val = RD4(sc, GENET_RX_DMA_CTRL);
sys/arm64/broadcom/genet/if_genet.c
604
val &= ~GENET_RX_DMA_CTRL_EN;
sys/arm64/broadcom/genet/if_genet.c
605
val &= ~GENET_RX_DMA_CTRL_RBUF_EN(GENET_DMA_DEFAULT_QUEUE);
sys/arm64/broadcom/genet/if_genet.c
606
WR4(sc, GENET_RX_DMA_CTRL, val);
sys/arm64/broadcom/genet/if_genet.c
726
uint32_t val;
sys/arm64/broadcom/genet/if_genet.c
760
val = RD4(sc, GENET_TX_DMA_CTRL);
sys/arm64/broadcom/genet/if_genet.c
761
val |= GENET_TX_DMA_CTRL_EN;
sys/arm64/broadcom/genet/if_genet.c
762
val |= GENET_TX_DMA_CTRL_RBUF_EN(qid);
sys/arm64/broadcom/genet/if_genet.c
763
WR4(sc, GENET_TX_DMA_CTRL, val);
sys/arm64/broadcom/genet/if_genet.c
775
uint32_t val;
sys/arm64/broadcom/genet/if_genet.c
81
#define WR4(sc, reg, val) bus_write_4((sc)->res[_RES_MAC], (reg), (val))
sys/arm64/broadcom/genet/if_genet.c
810
val = RD4(sc, GENET_RX_DMA_CTRL);
sys/arm64/broadcom/genet/if_genet.c
811
val |= GENET_RX_DMA_CTRL_EN;
sys/arm64/broadcom/genet/if_genet.c
812
val |= GENET_RX_DMA_CTRL_RBUF_EN(qid);
sys/arm64/broadcom/genet/if_genet.c
813
WR4(sc, GENET_RX_DMA_CTRL, val);
sys/arm64/cavium/thunder_pcie_pem.c
614
u_int func, u_int reg, uint32_t val, int bytes)
sys/arm64/cavium/thunder_pcie_pem.c
638
bus_space_write_1(t, h, reg, val);
sys/arm64/cavium/thunder_pcie_pem.c
641
bus_space_write_2(t, h, reg, htole16(val));
sys/arm64/cavium/thunder_pcie_pem.c
644
bus_space_write_4(t, h, reg, htole32(val));
sys/arm64/cavium/thunder_pcie_pem.c
76
#define PEM_CFG_RD_REG_DATA(val) (((val) >> 32) & 0xFFFFFFFF)
sys/arm64/freescale/imx/clk/imx_clk_composite.c
102
READ4(clk, sc->offset, &val);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
104
val |= TARGET_ROOT_ENABLE;
sys/arm64/freescale/imx/clk/imx_clk_composite.c
106
val &= ~(TARGET_ROOT_ENABLE);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
107
WRITE4(clk, sc->offset, val);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
117
uint32_t val = 0;
sys/arm64/freescale/imx/clk/imx_clk_composite.c
123
READ4(clk, sc->offset, &val);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
124
val &= ~(TARGET_ROOT_MUX_MASK);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
125
val |= TARGET_ROOT_MUX(index);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
126
WRITE4(clk, sc->offset, val);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
213
uint32_t val;
sys/arm64/freescale/imx/clk/imx_clk_composite.c
266
READ4(clk, sc->offset, &val);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
267
val &= ~(TARGET_ROOT_PRE_PODF_MASK | TARGET_ROOT_POST_PODF_MASK);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
268
val |= TARGET_ROOT_PRE_PODF(pre_div);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
269
val |= TARGET_ROOT_POST_PODF(post_div);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
56
#define WRITE4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_composite.c
57
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_composite.c
58
#define READ4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_composite.c
59
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_composite.c
78
uint32_t val, idx;
sys/arm64/freescale/imx/clk/imx_clk_composite.c
83
READ4(clk, sc->offset, &val);
sys/arm64/freescale/imx/clk/imx_clk_composite.c
85
idx = (val & TARGET_ROOT_MUX_MASK) >> TARGET_ROOT_MUX_SHIFT;
sys/arm64/freescale/imx/clk/imx_clk_composite.c
96
uint32_t val = 0;
sys/arm64/freescale/imx/clk/imx_clk_frac_pll.c
42
#define WRITE4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_frac_pll.c
43
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_frac_pll.c
44
#define READ4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_frac_pll.c
45
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_gate.c
39
#define WR4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_gate.c
40
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_gate.c
41
#define RD4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_gate.c
42
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_mux.c
43
#define WR4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_mux.c
44
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_mux.c
45
#define RD4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_mux.c
46
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_sscg_pll.c
42
#define WRITE4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_sscg_pll.c
43
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/clk/imx_clk_sscg_pll.c
44
#define READ4(_clk, off, val) \
sys/arm64/freescale/imx/clk/imx_clk_sscg_pll.c
45
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/arm64/freescale/imx/imx_ccm.c
171
imx_ccm_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm64/freescale/imx/imx_ccm.c
176
CCU_WRITE4(sc, addr, val);
sys/arm64/freescale/imx/imx_ccm.c
181
imx_ccm_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm64/freescale/imx/imx_ccm.c
187
*val = CCU_READ4(sc, addr);
sys/arm64/freescale/imx/imx_ccm.c
68
CCU_WRITE4(struct imx_ccm_softc *sc, bus_size_t off, uint32_t val)
sys/arm64/freescale/imx/imx_ccm.c
71
bus_write_4(sc->mem_res, off, val);
sys/arm64/include/atomic.h
112
: "r" (p), "r" (val) \
sys/arm64/include/atomic.h
120
atomic_##op##_##bar##t##_lse(p, val); \
sys/arm64/include/atomic.h
122
atomic_##op##_##bar##t##_llsc(p, val); \
sys/arm64/include/atomic.h
143
_ATOMIC_OP(subtract, add, add, val = -val)
sys/arm64/include/atomic.h
277
atomic_fetchadd_##t##flav(volatile uint##t##_t *p, uint##t##_t val)
sys/arm64/include/atomic.h
291
: "r" (p), "r" (val) \
sys/arm64/include/atomic.h
307
: "r" (p), "r" (val) \
sys/arm64/include/atomic.h
317
return (atomic_fetchadd_##t##_lse(p, val)); \
sys/arm64/include/atomic.h
319
return (atomic_fetchadd_##t##_llsc(p, val)); \
sys/arm64/include/atomic.h
327
atomic_swap_##t##flav(volatile uint##t##_t *p, uint##t##_t val)
sys/arm64/include/atomic.h
344
: "r" (p), "r" (val) \
sys/arm64/include/atomic.h
360
: "r" (p), "r" (val) \
sys/arm64/include/atomic.h
370
return (atomic_swap_##t##_lse(p, val)); \
sys/arm64/include/atomic.h
372
return (atomic_swap_##t##_llsc(p, val)); \
sys/arm64/include/atomic.h
410
atomic_testand##op##_##bar##t##flav(volatile uint##t##_t *p, u_int val)
sys/arm64/include/atomic.h
418
mask = ((uint##t##_t)1) << (val & (t - 1)); \
sys/arm64/include/atomic.h
436
mask = ((uint##t##_t)1) << (val & (t - 1)); \
sys/arm64/include/atomic.h
452
return (atomic_testand##op##_##bar##t##_lse(p, val)); \
sys/arm64/include/atomic.h
454
return (atomic_testand##op##_##bar##t##_llsc(p, val)); \
sys/arm64/include/atomic.h
490
atomic_store_rel_##t(volatile uint##t##_t *p, uint##t##_t val) \
sys/arm64/include/atomic.h
495
: "r" (val), "r" (p) \
sys/arm64/include/atomic.h
82
atomic_##op##_##bar##t##flav(volatile uint##t##_t *p, uint##t##_t val)
sys/arm64/include/atomic.h
97
: "r" (p), "r" (val) \
sys/arm64/include/cmn600_reg.h
56
uint32_t val);
sys/arm64/include/cmn600_reg.h
59
uint64_t val);
sys/arm64/include/cmn600_reg.h
61
uint64_t val);
sys/arm64/include/cmn600_reg.h
63
uint64_t val);
sys/arm64/include/cmn600_reg.h
65
uint64_t mask, uint64_t val);
sys/arm64/include/cpu.h
179
#define CPU_IMPL_TO_MIDR(val) (((val) & 0xff) << 24)
sys/arm64/include/cpu.h
180
#define CPU_PART_TO_MIDR(val) (((val) & 0xfff) << 4)
sys/arm64/include/cpu.h
181
#define CPU_VAR_TO_MIDR(val) (((val) & 0xf) << 20)
sys/arm64/include/cpu.h
182
#define CPU_ARCH_TO_MIDR(val) (((val) & 0xf) << 16)
sys/arm64/include/cpu.h
183
#define CPU_REV_TO_MIDR(val) (((val) & 0xf) << 0)
sys/arm64/include/cpufunc.h
169
wfet(uint64_t val)
sys/arm64/include/cpufunc.h
174
: "r" ((val))
sys/arm64/include/cpufunc.h
179
wfit(uint64_t val)
sys/arm64/include/cpufunc.h
184
: "r" ((val))
sys/arm64/include/iodev.h
34
uint8_t val; \
sys/arm64/include/iodev.h
35
__asm __volatile("ldrb %w0, [%1]" : "=&r" (val) : "r"(a)); \
sys/arm64/include/iodev.h
36
val; \
sys/arm64/include/iodev.h
41
uint16_t val; \
sys/arm64/include/iodev.h
42
__asm __volatile("ldrh %w0, [%1]" : "=&r" (val) : "r"(a)); \
sys/arm64/include/iodev.h
43
val; \
sys/arm64/include/iodev.h
48
uint32_t val; \
sys/arm64/include/iodev.h
49
__asm __volatile("ldr %w0, [%1]" : "=&r" (val) : "r"(a)); \
sys/arm64/include/iodev.h
50
val; \
sys/arm64/include/md_var.h
72
int swapueword8(volatile uint8_t *base, uint8_t *val);
sys/arm64/include/md_var.h
73
int swapueword32(volatile uint32_t *base, uint32_t *val);
sys/arm64/include/vmm.h
164
DECLARE_VMMOPS_FUNC(int, setreg, (void *vcpui, int num, uint64_t val));
sys/arm64/include/vmm.h
166
DECLARE_VMMOPS_FUNC(int, setcap, (void *vcpui, int num, int val));
sys/arm64/include/vmm.h
180
int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val);
sys/arm64/include/vmm.h
184
int vm_get_capability(struct vcpu *vcpu, int type, int *val);
sys/arm64/include/vmm.h
185
int vm_set_capability(struct vcpu *vcpu, int type, int val);
sys/arm64/iommu/smmu.c
1030
val = l1_desc->pa & STRTAB_L1_DESC_L2PTR_M;
sys/arm64/iommu/smmu.c
1031
KASSERT(val == l1_desc->pa, ("bad allocation 4"));
sys/arm64/iommu/smmu.c
1032
val |= l1_desc->span;
sys/arm64/iommu/smmu.c
1033
*addr = val;
sys/arm64/iommu/smmu.c
1321
uint32_t val;
sys/arm64/iommu/smmu.c
1440
val = (reg & IDR1_CMDQS_M) >> IDR1_CMDQS_S;
sys/arm64/iommu/smmu.c
1441
sc->cmdq.size_log2 = val;
sys/arm64/iommu/smmu.c
1443
device_printf(sc->dev, "CMD queue bits %d\n", val);
sys/arm64/iommu/smmu.c
1445
val = (reg & IDR1_EVENTQS_M) >> IDR1_EVENTQS_S;
sys/arm64/iommu/smmu.c
1446
sc->evtq.size_log2 = val;
sys/arm64/iommu/smmu.c
1448
device_printf(sc->dev, "EVENT queue bits %d\n", val);
sys/arm64/iommu/smmu.c
1451
val = (reg & IDR1_PRIQS_M) >> IDR1_PRIQS_S;
sys/arm64/iommu/smmu.c
1452
sc->priq.size_log2 = val;
sys/arm64/iommu/smmu.c
1454
device_printf(sc->dev, "PRI queue bits %d\n", val);
sys/arm64/iommu/smmu.c
267
uint32_t val;
sys/arm64/iommu/smmu.c
270
val = (Q_OVF(q->lc.cons) | Q_WRP(q, cons) | Q_IDX(q, cons));
sys/arm64/iommu/smmu.c
272
return (val);
sys/arm64/iommu/smmu.c
279
uint32_t val;
sys/arm64/iommu/smmu.c
282
val = (Q_OVF(q->lc.prod) | Q_WRP(q, prod) | Q_IDX(q, prod));
sys/arm64/iommu/smmu.c
284
return (val);
sys/arm64/iommu/smmu.c
289
uint32_t reg_ack, uint32_t val)
sys/arm64/iommu/smmu.c
296
bus_write_4(sc->res[0], reg, val);
sys/arm64/iommu/smmu.c
300
if (v == val)
sys/arm64/iommu/smmu.c
422
evtq->lc.val = bus_read_8(sc->res[0], evtq->prod_off);
sys/arm64/iommu/smmu.c
563
q->lc.val = bus_read_8(sc->res[0], q->prod_off);
sys/arm64/iommu/smmu.c
702
uint64_t val;
sys/arm64/iommu/smmu.c
704
val = STE0_VALID | STE0_CONFIG_BYPASS;
sys/arm64/iommu/smmu.c
715
ste[0] = val;
sys/arm64/iommu/smmu.c
729
uint64_t val;
sys/arm64/iommu/smmu.c
731
val = STE0_VALID;
sys/arm64/iommu/smmu.c
751
val |= (cd->paddr & STE0_S1CONTEXTPTR_M);
sys/arm64/iommu/smmu.c
752
val |= STE0_CONFIG_S1_TRANS;
sys/arm64/iommu/smmu.c
757
ste[0] = val;
sys/arm64/iommu/smmu.c
828
uint64_t val;
sys/arm64/iommu/smmu.c
854
val = CD0_VALID;
sys/arm64/iommu/smmu.c
855
val |= CD0_AA64;
sys/arm64/iommu/smmu.c
856
val |= CD0_R;
sys/arm64/iommu/smmu.c
857
val |= CD0_A;
sys/arm64/iommu/smmu.c
858
val |= CD0_ASET;
sys/arm64/iommu/smmu.c
859
val |= (uint64_t)domain->asid << CD0_ASID_S;
sys/arm64/iommu/smmu.c
860
val |= CD0_TG0_4KB;
sys/arm64/iommu/smmu.c
861
val |= CD0_EPD1; /* Disable TT1 */
sys/arm64/iommu/smmu.c
862
val |= ((64 - sc->ias) << CD0_T0SZ_S);
sys/arm64/iommu/smmu.c
863
val |= CD0_IPS_48BITS;
sys/arm64/iommu/smmu.c
876
ptr[0] = val;
sys/arm64/iommu/smmu.c
998
uint64_t val;
sys/arm64/iommu/smmuvar.h
75
uint64_t val;
sys/arm64/linux/linux.h
176
l_int val;
sys/arm64/linux/linux.h
69
l_int val[2];
sys/arm64/linux/linux_proto.h
427
char val_l_[PADL_(uint32_t)]; uint32_t val; char val_r_[PADR_(uint32_t)];
sys/arm64/linux/linux_systrace_args.c
791
uarg[a++] = p->val; /* uint32_t */
sys/arm64/nvidia/tegra210/max77620.c
124
max77620_write(struct max77620_softc *sc, uint8_t reg, uint8_t val)
sys/arm64/nvidia/tegra210/max77620.c
135
data[1] = val;
sys/arm64/nvidia/tegra210/max77620.c
174
uint8_t val;
sys/arm64/nvidia/tegra210/max77620.c
177
rv = max77620_read(sc, reg, &val);
sys/arm64/nvidia/tegra210/max77620.c
181
val &= ~clear;
sys/arm64/nvidia/tegra210/max77620.c
182
val |= set;
sys/arm64/nvidia/tegra210/max77620.c
184
rv = max77620_write(sc, reg, val);
sys/arm64/nvidia/tegra210/max77620.c
194
int val;
sys/arm64/nvidia/tegra210/max77620.c
196
if (OF_getencprop(node, "maxim,shutdown-fps-time-period-us", &val,
sys/arm64/nvidia/tegra210/max77620.c
197
sizeof(val)) >= 0) {
sys/arm64/nvidia/tegra210/max77620.c
198
val = min(val, MAX77620_FPS_PERIOD_MAX_US);
sys/arm64/nvidia/tegra210/max77620.c
199
val = max(val, MAX77620_FPS_PERIOD_MIN_US);
sys/arm64/nvidia/tegra210/max77620.c
200
sc->shutdown_fps[id] = val;
sys/arm64/nvidia/tegra210/max77620.c
202
if (OF_getencprop(node, "maxim,suspend-fps-time-period-us", &val,
sys/arm64/nvidia/tegra210/max77620.c
203
sizeof(val)) >= 0) {
sys/arm64/nvidia/tegra210/max77620.c
204
val = min(val, MAX77620_FPS_PERIOD_MAX_US);
sys/arm64/nvidia/tegra210/max77620.c
205
val = max(val, MAX77620_FPS_PERIOD_MIN_US);
sys/arm64/nvidia/tegra210/max77620.c
206
sc->suspend_fps[id] = val;
sys/arm64/nvidia/tegra210/max77620.c
208
if (OF_getencprop(node, "maxim,fps-event-source", &val,
sys/arm64/nvidia/tegra210/max77620.c
209
sizeof(val)) >= 0) {
sys/arm64/nvidia/tegra210/max77620.c
210
if (val > 2) {
sys/arm64/nvidia/tegra210/max77620.c
212
"value: %d\n", val);
sys/arm64/nvidia/tegra210/max77620.c
215
sc->event_source[id] = val;
sys/arm64/nvidia/tegra210/max77620.c
275
max77620_encode_fps_period(struct max77620_softc *sc, int val)
sys/arm64/nvidia/tegra210/max77620.c
282
if (period >= val)
sys/arm64/nvidia/tegra210/max77620.c
292
uint8_t mask, val, tmp;
sys/arm64/nvidia/tegra210/max77620.c
296
val = 0;
sys/arm64/nvidia/tegra210/max77620.c
302
val |= (tmp << MAX77620_FPS_TIME_PERIOD_SHIFT) &
sys/arm64/nvidia/tegra210/max77620.c
309
val |= (tmp << MAX77620_FPS_EN_SRC_SHIFT) &
sys/arm64/nvidia/tegra210/max77620.c
313
val |= MAX77620_FPS_ENFPS_SW;
sys/arm64/nvidia/tegra210/max77620.c
317
rv = RM1(sc, MAX77620_REG_FPS_CFG0 + i, mask, val);
sys/arm64/nvidia/tegra210/max77620.c
76
max77620_read(struct max77620_softc *sc, uint8_t reg, uint8_t *val)
sys/arm64/nvidia/tegra210/max77620.c
82
{0, IIC_M_RD, 1, val},
sys/arm64/nvidia/tegra210/max77620.h
224
#define RD1(sc, reg, val) max77620_read(sc, reg, val)
sys/arm64/nvidia/tegra210/max77620.h
225
#define WR1(sc, reg, val) max77620_write(sc, reg, val)
sys/arm64/nvidia/tegra210/max77620.h
228
int max77620_read(struct max77620_softc *sc, uint8_t reg, uint8_t *val);
sys/arm64/nvidia/tegra210/max77620.h
229
int max77620_write(struct max77620_softc *sc, uint8_t reg, uint8_t val);
sys/arm64/nvidia/tegra210/max77620.h
253
int max77620_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
sys/arm64/nvidia/tegra210/max77620_gpio.c
590
max77620_gpio_pin_set(device_t dev, uint32_t pin, uint32_t val)
sys/arm64/nvidia/tegra210/max77620_gpio.c
601
MAX77620_REG_GPIO_OUTPUT_VAL(val));
sys/arm64/nvidia/tegra210/max77620_gpio.c
607
max77620_gpio_pin_get(device_t dev, uint32_t pin, uint32_t *val)
sys/arm64/nvidia/tegra210/max77620_gpio.c
621
*val = MAX77620_REG_GPIO_OUTPUT_VAL_GET(tmp);
sys/arm64/nvidia/tegra210/max77620_gpio.c
623
*val = MAX77620_REG_GPIO_INPUT_VAL_GET(tmp);
sys/arm64/nvidia/tegra210/max77620_regulators.c
397
uint8_t val;
sys/arm64/nvidia/tegra210/max77620_regulators.c
400
rv = RD1(sc->base_sc, sc->def->fps_reg, &val);
sys/arm64/nvidia/tegra210/max77620_regulators.c
404
*fps_src = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
sys/arm64/nvidia/tegra210/max77620_regulators.c
424
uint8_t mask, val;
sys/arm64/nvidia/tegra210/max77620_regulators.c
436
val = 0;
sys/arm64/nvidia/tegra210/max77620_regulators.c
439
val |= ((uint8_t)pu_slot << MAX77620_FPS_PU_PERIOD_SHIFT) &
sys/arm64/nvidia/tegra210/max77620_regulators.c
444
val |= ((uint8_t)pd_slot << MAX77620_FPS_PD_PERIOD_SHIFT) &
sys/arm64/nvidia/tegra210/max77620_regulators.c
448
rv = RM1(sc->base_sc, sc->def->fps_reg, mask, val);
sys/arm64/nvidia/tegra210/max77620_regulators.c
457
uint8_t val;
sys/arm64/nvidia/tegra210/max77620_regulators.c
460
rv = RD1(sc->base_sc, sc->def->pwr_mode_reg, &val);
sys/arm64/nvidia/tegra210/max77620_regulators.c
464
*pwr_mode = (val & sc->def->pwr_mode_mask) >> sc->def->pwr_mode_shift;
sys/arm64/nvidia/tegra210/max77620_regulators.c
484
uint8_t val;
sys/arm64/nvidia/tegra210/max77620_regulators.c
487
rv = RD1(sc->base_sc, sc->def->cfg_reg, &val);
sys/arm64/nvidia/tegra210/max77620_regulators.c
492
val = (val & MAX77620_SD_SR_MASK) >> MAX77620_SD_SR_SHIFT;
sys/arm64/nvidia/tegra210/max77620_regulators.c
493
if (val == 0)
sys/arm64/nvidia/tegra210/max77620_regulators.c
495
else if (val == 1)
sys/arm64/nvidia/tegra210/max77620_regulators.c
497
else if (val == 2)
sys/arm64/nvidia/tegra210/max77620_regulators.c
502
val = (val & MAX77620_LDO_SLEW_RATE_MASK) >>
sys/arm64/nvidia/tegra210/max77620_regulators.c
504
if (val == 0)
sys/arm64/nvidia/tegra210/max77620_regulators.c
516
uint8_t val, mask;
sys/arm64/nvidia/tegra210/max77620_regulators.c
521
val = 0;
sys/arm64/nvidia/tegra210/max77620_regulators.c
523
val = 1;
sys/arm64/nvidia/tegra210/max77620_regulators.c
525
val = 2;
sys/arm64/nvidia/tegra210/max77620_regulators.c
527
val = 3;
sys/arm64/nvidia/tegra210/max77620_regulators.c
528
val <<= MAX77620_SD_SR_SHIFT;
sys/arm64/nvidia/tegra210/max77620_regulators.c
532
val = 1;
sys/arm64/nvidia/tegra210/max77620_regulators.c
534
val = 0;
sys/arm64/nvidia/tegra210/max77620_regulators.c
535
val <<= MAX77620_LDO_SLEW_RATE_SHIFT;
sys/arm64/nvidia/tegra210/max77620_regulators.c
538
rv = RM1(sc->base_sc, sc->def->cfg_reg, mask, val);
sys/arm64/nvidia/tegra210/max77620_regulators.c
548
uint8_t val;
sys/arm64/nvidia/tegra210/max77620_regulators.c
564
rv = max77620_get_pwr_mode(sc, &val);
sys/arm64/nvidia/tegra210/max77620_regulators.c
570
sc->pwr_mode = val;
sys/arm64/nvidia/tegra210/max77620_regulators.c
583
rv = max77620_get_fps_src(sc, &val);
sys/arm64/nvidia/tegra210/max77620_regulators.c
589
sc->active_fps_src = val;
sys/arm64/nvidia/tegra210/max77620_regulators.c
819
max77620_regnode_enable(struct regnode *regnode, bool val, int *udelay)
sys/arm64/nvidia/tegra210/max77620_regulators.c
833
if (val)
sys/arm64/nvidia/tegra210/max77620_rtc.c
100
max77620_rtc_read(struct max77620_rtc_softc *sc, uint8_t reg, uint8_t *val)
sys/arm64/nvidia/tegra210/max77620_rtc.c
106
{0, IIC_M_RD, 1, val},
sys/arm64/nvidia/tegra210/max77620_rtc.c
149
max77620_rtc_write(struct max77620_rtc_softc *sc, uint8_t reg, uint8_t val)
sys/arm64/nvidia/tegra210/max77620_rtc.c
160
data[1] = val;
sys/arm64/nvidia/tegra210/max77620_rtc.c
199
uint8_t val;
sys/arm64/nvidia/tegra210/max77620_rtc.c
202
rv = max77620_rtc_read(sc, reg, &val);
sys/arm64/nvidia/tegra210/max77620_rtc.c
206
val &= ~clear;
sys/arm64/nvidia/tegra210/max77620_rtc.c
207
val |= set;
sys/arm64/nvidia/tegra210/max77620_rtc.c
209
rv = max77620_rtc_write(sc, reg, val);
sys/arm64/nvidia/tegra210/tegra210_car.c
358
uint32_t val;
sys/arm64/nvidia/tegra210/tegra210_car.c
361
CLKDEV_READ_4(sc->dev, OSC_CTRL, &val);
sys/arm64/nvidia/tegra210/tegra210_car.c
362
osc_idx = OSC_CTRL_OSC_FREQ_GET(val);
sys/arm64/nvidia/tegra210/tegra210_car.c
370
fixed_osc_div.div = 1 << OSC_CTRL_PLL_REF_DIV_GET(val);
sys/arm64/nvidia/tegra210/tegra210_car.c
375
CLKDEV_READ_4(sc->dev, SPARE_REG0, &val);
sys/arm64/nvidia/tegra210/tegra210_car.c
376
fixed_clk_m.div = SPARE_REG0_MDIV_GET(val) + 1;
sys/arm64/nvidia/tegra210/tegra210_car.c
460
tegra210_car_clkdev_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm64/nvidia/tegra210/tegra210_car.c
465
*val = bus_read_4(sc->mem_res, addr);
sys/arm64/nvidia/tegra210/tegra210_car.c
470
tegra210_car_clkdev_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm64/nvidia/tegra210/tegra210_car.c
475
bus_write_4(sc->mem_res, addr, val);
sys/arm64/nvidia/tegra210/tegra210_car.h
33
#define RD4(sc, reg, val) CLKDEV_READ_4((sc)->clkdev, reg, val)
sys/arm64/nvidia/tegra210/tegra210_car.h
34
#define WR4(sc, reg, val) CLKDEV_WRITE_4((sc)->clkdev, reg, val)
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
666
get_masked(uint32_t val, uint32_t shift, uint32_t width)
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
669
return ((val >> shift) & ((1 << width) - 1));
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
673
set_masked(uint32_t val, uint32_t v, uint32_t shift, uint32_t width)
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
676
val &= ~(((1 << width) - 1) << shift);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
677
val |= (v & ((1 << width) - 1)) << shift;
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
678
return (val);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
684
uint32_t val;
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
688
RD4(sc, sc->base_reg, &val);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
689
*m = get_masked(val, mnp_bits->m_shift, mnp_bits->m_width);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
690
*n = get_masked(val, mnp_bits->n_shift, mnp_bits->n_width);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
691
*p = get_masked(val, mnp_bits->p_shift, mnp_bits->p_width);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
695
set_divisors(struct pll_sc *sc, uint32_t val, uint32_t m, uint32_t n,
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
701
val = set_masked(val, m, mnp_bits->m_shift, mnp_bits->m_width);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
702
val = set_masked(val, n, mnp_bits->n_shift, mnp_bits->n_width);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
703
val = set_masked(val, p, mnp_bits->p_shift, mnp_bits->p_width);
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
704
return (val);
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
100
val += 2731;
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
121
snprintf(stemp, sizeof(stemp), "%d", val);
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
128
return (sysctl_handle_int(oidp, 0, val, req));
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
67
int val, temp, rv;
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
89
val = temp / 100;
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
90
val += 2731;
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
93
val = (sc->core_max_temp - temp) / 1000;
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
96
val = 1;
sys/arm64/nvidia/tegra210/tegra210_coretemp.c
99
val = sc->core_max_temp / 100;
sys/arm64/nvidia/tegra210/tegra210_cpufreq.c
167
#define DIV_ROUND_CLOSEST(val, div) (((val) + ((div) / 2)) / (div))
sys/arm64/nvidia/tegra210/tegra210_cpufreq.c
169
#define ROUND_UP(val, div) roundup(val, div)
sys/arm64/nvidia/tegra210/tegra210_cpufreq.c
170
#define ROUND_DOWN(val, div) rounddown(val, div)
sys/arm64/qoriq/clk/ls1028a_flexspi_clk.c
234
ls1028a_flexspi_clk_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm64/qoriq/clk/ls1028a_flexspi_clk.c
239
*val = SYSCON_READ_4(sc->syscon, addr);
sys/arm64/qoriq/clk/ls1028a_flexspi_clk.c
245
ls1028a_flexspi_clk_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm64/qoriq/clk/ls1028a_flexspi_clk.c
252
ret = SYSCON_WRITE_4(sc->syscon, addr, val);
sys/arm64/qoriq/clk/qoriq_clk_pll.c
50
#define WR4(_clk, offset, val) \
sys/arm64/qoriq/clk/qoriq_clk_pll.c
51
CLKDEV_WRITE_4(clknode_get_device(_clk), offset, val)
sys/arm64/qoriq/clk/qoriq_clk_pll.c
52
#define RD4(_clk, offset, val) \
sys/arm64/qoriq/clk/qoriq_clk_pll.c
53
CLKDEV_READ_4(clknode_get_device(_clk), offset, val)
sys/arm64/qoriq/clk/qoriq_clkgen.c
104
qoriq_clkgen_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/arm64/qoriq/clk/qoriq_clkgen.c
111
*val = le32toh(bus_read_4(sc->res, addr));
sys/arm64/qoriq/clk/qoriq_clkgen.c
113
*val = be32toh(bus_read_4(sc->res, addr));
sys/arm64/qoriq/clk/qoriq_clkgen.c
90
qoriq_clkgen_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/arm64/qoriq/clk/qoriq_clkgen.c
97
bus_write_4(sc->res, addr, htole32(val));
sys/arm64/qoriq/clk/qoriq_clkgen.c
99
bus_write_4(sc->res, addr, htobe32(val));
sys/arm64/qoriq/qoriq_therm.c
196
WR4(struct qoriq_therm_softc *sc, bus_size_t addr, uint32_t val)
sys/arm64/qoriq/qoriq_therm.c
199
val = sc->little_endian ? htole32(val): htobe32(val);
sys/arm64/qoriq/qoriq_therm.c
200
bus_write_4(sc->mem_res, addr, val);
sys/arm64/qoriq/qoriq_therm.c
206
uint32_t val;
sys/arm64/qoriq/qoriq_therm.c
208
val = bus_read_4(sc->mem_res, addr);
sys/arm64/qoriq/qoriq_therm.c
209
return (sc->little_endian ? le32toh(val): be32toh(val));
sys/arm64/qoriq/qoriq_therm.c
217
uint32_t val;
sys/arm64/qoriq/qoriq_therm.c
221
val = RD4(sc, TMU_TRITSR(sensor->site_id));
sys/arm64/qoriq/qoriq_therm.c
222
if (val & TMU_TRITSR_VALID)
sys/arm64/qoriq/qoriq_therm.c
229
*temp = (int)(val & 0x1FF) * 1000;
sys/arm64/qoriq/qoriq_therm.c
231
*temp = (int)(val & 0xFF) * 1000;
sys/arm64/qoriq/qoriq_therm.c
233
*temp = (int)(val & 0x1FF) * 1000 - 273100;
sys/arm64/qoriq/qoriq_therm.c
239
qoriq_therm_get_temp(device_t dev, device_t cdev, uintptr_t id, int *val)
sys/arm64/qoriq/qoriq_therm.c
246
return(qoriq_therm_read_temp(sc, sc->tsensors + id, val));
sys/arm64/qoriq/qoriq_therm.c
253
int val;
sys/arm64/qoriq/qoriq_therm.c
266
rv = qoriq_therm_read_temp(sc, sc->tsensors + id, &val);
sys/arm64/qoriq/qoriq_therm.c
270
val = val / 100;
sys/arm64/qoriq/qoriq_therm.c
271
val += 2731;
sys/arm64/qoriq/qoriq_therm.c
272
rv = sysctl_handle_int(oidp, &val, 0, req);
sys/arm64/rockchip/rk3328_codec.c
160
#define RKCODEC_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/arm64/rockchip/rk3328_codec.c
169
uint32_t val;
sys/arm64/rockchip/rk3328_codec.c
170
val = RKCODEC_READ(sc, CODEC_DAC_PRECHARGE_CTRL);
sys/arm64/rockchip/rk3328_codec.c
172
val |= DAC_PRECHARGE_CTRL_DAC_CHARGE_PRECHARGE;
sys/arm64/rockchip/rk3328_codec.c
174
val &= ~(DAC_PRECHARGE_CTRL_DAC_CHARGE_PRECHARGE);
sys/arm64/rockchip/rk3328_codec.c
175
RKCODEC_WRITE(sc, CODEC_DAC_PRECHARGE_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
179
val = RKCODEC_READ(sc, CODEC_DAC_PRECHARGE_CTRL);
sys/arm64/rockchip/rk3328_codec.c
181
val |= DAC_PRECHARGE_CTRL_DAC_CHARGE_CURRENT_ALL;
sys/arm64/rockchip/rk3328_codec.c
183
val &= ~(DAC_PRECHARGE_CTRL_DAC_CHARGE_CURRENT_ALL);
sys/arm64/rockchip/rk3328_codec.c
184
RKCODEC_WRITE(sc, CODEC_DAC_PRECHARGE_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
191
uint32_t val;
sys/arm64/rockchip/rk3328_codec.c
192
val = SOC_CON10_GPIOMUT_MASK;
sys/arm64/rockchip/rk3328_codec.c
194
val |= SOC_CON10_GPIOMUT;
sys/arm64/rockchip/rk3328_codec.c
195
SYSCON_WRITE_4(sc->grf, GRF_SOC_CON10, val);
sys/arm64/rockchip/rk3328_codec.c
226
uint32_t val;
sys/arm64/rockchip/rk3328_codec.c
248
val = SOC_CON2_I2S_ACODEC_EN | SOC_CON2_I2S_ACODEC_EN_MASK;
sys/arm64/rockchip/rk3328_codec.c
249
SYSCON_WRITE_4(sc->grf, GRF_SOC_CON2, val);
sys/arm64/rockchip/rk3328_codec.c
251
val = 0 | SOC_CON10_GPIOMUT_EN_MASK;
sys/arm64/rockchip/rk3328_codec.c
252
SYSCON_WRITE_4(sc->grf, GRF_SOC_CON10, val);
sys/arm64/rockchip/rk3328_codec.c
291
val = RKCODEC_READ(sc, CODEC_DAC_PWR_CTRL);
sys/arm64/rockchip/rk3328_codec.c
292
val |= DAC_PWR_CTRL_DAC_PWR;
sys/arm64/rockchip/rk3328_codec.c
293
RKCODEC_WRITE(sc, CODEC_DAC_PWR_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
296
val |= DAC_PWR_CTRL_DACL_PATH_REFV |
sys/arm64/rockchip/rk3328_codec.c
298
RKCODEC_WRITE(sc, CODEC_DAC_PWR_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
301
val |= DAC_PWR_CTRL_HPOUTL_ZERO_CROSSING |
sys/arm64/rockchip/rk3328_codec.c
303
RKCODEC_WRITE(sc, CODEC_DAC_PWR_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
306
val = RKCODEC_READ(sc, CODEC_HPOUT_POP_CTRL);
sys/arm64/rockchip/rk3328_codec.c
307
val |= HPOUT_POP_CTRL_HPOUTR_POP | HPOUT_POP_CTRL_HPOUTL_POP;
sys/arm64/rockchip/rk3328_codec.c
308
val &= ~(HPOUT_POP_CTRL_HPOUTR_POP_XCHARGE | HPOUT_POP_CTRL_HPOUTL_POP_XCHARGE);
sys/arm64/rockchip/rk3328_codec.c
309
RKCODEC_WRITE(sc, CODEC_HPOUT_POP_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
312
val = RKCODEC_READ(sc, CODEC_HPMIX_CTRL);
sys/arm64/rockchip/rk3328_codec.c
313
val |= HPMIX_CTRL_HPMIXL_EN | HPMIX_CTRL_HPMIXR_EN;
sys/arm64/rockchip/rk3328_codec.c
314
RKCODEC_WRITE(sc, CODEC_HPMIX_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
317
val |= HPMIX_CTRL_HPMIXL_INIT_EN | HPMIX_CTRL_HPMIXR_INIT_EN;
sys/arm64/rockchip/rk3328_codec.c
318
RKCODEC_WRITE(sc, CODEC_HPMIX_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
321
val = RKCODEC_READ(sc, CODEC_HPOUT_CTRL);
sys/arm64/rockchip/rk3328_codec.c
322
val |= HPOUT_CTRL_HPOUTL_EN | HPOUT_CTRL_HPOUTR_EN;
sys/arm64/rockchip/rk3328_codec.c
323
RKCODEC_WRITE(sc, CODEC_HPOUT_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
326
val |= HPOUT_CTRL_HPOUTL_INIT_EN | HPOUT_CTRL_HPOUTR_INIT_EN;
sys/arm64/rockchip/rk3328_codec.c
327
RKCODEC_WRITE(sc, CODEC_HPOUT_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
330
val = RKCODEC_READ(sc, CODEC_DAC_CLK_CTRL);
sys/arm64/rockchip/rk3328_codec.c
331
val |= DAC_CLK_CTRL_DACL_REFV_ON | DAC_CLK_CTRL_DACR_REFV_ON;
sys/arm64/rockchip/rk3328_codec.c
332
RKCODEC_WRITE(sc, CODEC_DAC_CLK_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
335
val |= DAC_CLK_CTRL_DACL_CLK_ON | DAC_CLK_CTRL_DACR_CLK_ON;
sys/arm64/rockchip/rk3328_codec.c
336
RKCODEC_WRITE(sc, CODEC_DAC_CLK_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
339
val |= DAC_CLK_CTRL_DACL_ON | DAC_CLK_CTRL_DACR_ON;
sys/arm64/rockchip/rk3328_codec.c
340
RKCODEC_WRITE(sc, CODEC_DAC_CLK_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
343
val |= DAC_CLK_CTRL_DACL_INIT_ON | DAC_CLK_CTRL_DACR_INIT_ON;
sys/arm64/rockchip/rk3328_codec.c
344
RKCODEC_WRITE(sc, CODEC_DAC_CLK_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
347
val = RKCODEC_READ(sc, CODEC_DAC_SELECT);
sys/arm64/rockchip/rk3328_codec.c
348
val |= DAC_SELECT_DACL_SELECT | DAC_SELECT_DACR_SELECT;
sys/arm64/rockchip/rk3328_codec.c
349
RKCODEC_WRITE(sc, CODEC_DAC_SELECT, val);
sys/arm64/rockchip/rk3328_codec.c
352
val = RKCODEC_READ(sc, CODEC_HPMIX_CTRL);
sys/arm64/rockchip/rk3328_codec.c
353
val |= HPMIX_CTRL_HPMIXL_INIT2_EN | HPMIX_CTRL_HPMIXR_INIT2_EN;
sys/arm64/rockchip/rk3328_codec.c
354
RKCODEC_WRITE(sc, CODEC_HPMIX_CTRL, val);
sys/arm64/rockchip/rk3328_codec.c
357
val = RKCODEC_READ(sc, CODEC_HPOUT_CTRL);
sys/arm64/rockchip/rk3328_codec.c
358
val |= HPOUT_CTRL_HPOUTL_UNMUTE | HPOUT_CTRL_HPOUTR_UNMUTE;
sys/arm64/rockchip/rk3328_codec.c
359
RKCODEC_WRITE(sc, CODEC_HPOUT_CTRL, val);
sys/arm64/rockchip/rk3399_emmcphy.c
132
uint32_t mask, val;
sys/arm64/rockchip/rk3399_emmcphy.c
149
val = SHIFTIN(0, PHYCTRL_DR_TY);
sys/arm64/rockchip/rk3399_emmcphy.c
151
(mask << 16) | val);
sys/arm64/rockchip/rk3399_emmcphy.c
155
val = PHYCTRL_OTAPDLYENA | SHIFTIN(4, PHYCTRL_OTAPDLYSEL);
sys/arm64/rockchip/rk3399_emmcphy.c
157
(mask << 16) | val);
sys/arm64/rockchip/rk3399_emmcphy.c
162
val = 0;
sys/arm64/rockchip/rk3399_emmcphy.c
163
SYSCON_WRITE_4(sc->syscon, GRF_EMMCPHY_CON6, (mask << 16) | val);
sys/arm64/rockchip/rk3399_emmcphy.c
204
val = PHYCTRL_PDB;
sys/arm64/rockchip/rk3399_emmcphy.c
205
SYSCON_WRITE_4(sc->syscon, GRF_EMMCPHY_CON6, (mask << 16) | val);
sys/arm64/rockchip/rk3399_emmcphy.c
209
val = SYSCON_READ_4(sc->syscon, GRF_EMMCPHY_STATUS);
sys/arm64/rockchip/rk3399_emmcphy.c
210
if ((val & PHYCTRL_CALDONE) == 0) {
sys/arm64/rockchip/rk3399_emmcphy.c
217
val = SHIFTIN(frqsel, PHYCTRL_FRQSEL);
sys/arm64/rockchip/rk3399_emmcphy.c
218
SYSCON_WRITE_4(sc->syscon, GRF_EMMCPHY_CON0, (mask << 16) | val);
sys/arm64/rockchip/rk3399_emmcphy.c
222
val = PHYCTRL_ENDLL;
sys/arm64/rockchip/rk3399_emmcphy.c
223
SYSCON_WRITE_4(sc->syscon, GRF_EMMCPHY_CON6, (mask << 16) | val);
sys/arm64/rockchip/rk3399_emmcphy.c
245
val = SYSCON_READ_4(sc->syscon, GRF_EMMCPHY_STATUS);
sys/arm64/rockchip/rk3399_emmcphy.c
246
if ((val & PHYCTRL_DLLRDY) == 0) {
sys/arm64/rockchip/rk3568_pcie.c
123
uint32_t val;
sys/arm64/rockchip/rk3568_pcie.c
125
val = bus_read_4(sc->apb_res, PCIE_CLIENT_LTSSM_STATUS);
sys/arm64/rockchip/rk3568_pcie.c
126
if (((val & (RDLH_LINK_UP | SMLH_LINK_UP)) ==
sys/arm64/rockchip/rk3568_pcie.c
128
((val & SMLH_LTSSM_STATE_MASK) == SMLH_LTSSM_STATE_LINK_UP))
sys/arm64/rockchip/rk_gpio.c
528
rk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm64/rockchip/rk_gpio.c
538
*val = rk_gpio_read_bit(sc, RK_GPIO_EXT_PORTA, pin);
sys/arm64/rockchip/rk_grf_gpio.c
111
*val = 1;
sys/arm64/rockchip/rk_grf_gpio.c
113
*val = 0;
sys/arm64/rockchip/rk_grf_gpio.c
122
uint32_t val;
sys/arm64/rockchip/rk_grf_gpio.c
129
val = SOC_CON10_GPIOMUT_MASK;
sys/arm64/rockchip/rk_grf_gpio.c
131
val |= SOC_CON10_GPIOMUT;
sys/arm64/rockchip/rk_grf_gpio.c
132
SYSCON_WRITE_4(sc->sc_grf, GRF_SOC_CON10, val);
sys/arm64/rockchip/rk_grf_gpio.c
99
rk_grf_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/arm64/rockchip/rk_i2s.c
164
#define RK_I2S_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/arm64/rockchip/rk_i2s.c
180
uint32_t val;
sys/arm64/rockchip/rk_i2s.c
191
val = I2S_INTCR_TFT(FIFO_SIZE/2);
sys/arm64/rockchip/rk_i2s.c
192
val |= I2S_INTCR_RFT(FIFO_SIZE/2);
sys/arm64/rockchip/rk_i2s.c
193
RK_I2S_WRITE_4(sc, I2S_INTCR, val);
sys/arm64/rockchip/rk_i2s.c
196
val = (I2S_IO_2CH_OUT_8CH_IN << I2S_IO_DIRECTION_SHIFT);
sys/arm64/rockchip/rk_i2s.c
197
val |= (I2S_IO_DIRECTION_MASK << I2S_IO_DIRECTION_SHIFT) << 16;
sys/arm64/rockchip/rk_i2s.c
198
SYSCON_WRITE_4(sc->grf, GRF_SOC_CON8, val);
sys/arm64/rockchip/rk_i2s.c
202
val = (1 << 1);
sys/arm64/rockchip/rk_i2s.c
203
val |= (1 << 1) << 16;
sys/arm64/rockchip/rk_i2s.c
204
SYSCON_WRITE_4(sc->grf, 0xe640, val);
sys/arm64/rockchip/rk_i2s.c
306
uint32_t val, txcr, rxcr;
sys/arm64/rockchip/rk_i2s.c
317
val = RK_I2S_READ_4(sc, I2S_CKR);
sys/arm64/rockchip/rk_i2s.c
319
val &= ~(I2S_CKR_MSS_MASK);
sys/arm64/rockchip/rk_i2s.c
322
val |= I2S_CKR_MSS_MASTER;
sys/arm64/rockchip/rk_i2s.c
325
val |= I2S_CKR_MSS_SLAVE;
sys/arm64/rockchip/rk_i2s.c
333
val |= I2S_CKR_CKP;
sys/arm64/rockchip/rk_i2s.c
336
val &= ~I2S_CKR_CKP;
sys/arm64/rockchip/rk_i2s.c
342
RK_I2S_WRITE_4(sc, I2S_CKR, val);
sys/arm64/rockchip/rk_i2s.c
391
uint32_t val = 0x00;
sys/arm64/rockchip/rk_i2s.c
412
val = (samples[readyptr++ % size] << 0);
sys/arm64/rockchip/rk_i2s.c
413
val |= (samples[readyptr++ % size] << 8);
sys/arm64/rockchip/rk_i2s.c
414
val |= (samples[readyptr++ % size] << 16);
sys/arm64/rockchip/rk_i2s.c
415
val |= (samples[readyptr++ % size] << 24);
sys/arm64/rockchip/rk_i2s.c
417
RK_I2S_WRITE_4(sc, I2S_TXDR, val);
sys/arm64/rockchip/rk_i2s.c
437
val = RK_I2S_READ_4(sc, I2S_RXDR);
sys/arm64/rockchip/rk_i2s.c
438
samples[freeptr++ % size] = val & 0xff;
sys/arm64/rockchip/rk_i2s.c
439
samples[freeptr++ % size] = (val >> 8) & 0xff;
sys/arm64/rockchip/rk_i2s.c
440
samples[freeptr++ % size] = (val >> 16) & 0xff;
sys/arm64/rockchip/rk_i2s.c
441
samples[freeptr++ % size] = (val >> 24) & 0xff;
sys/arm64/rockchip/rk_i2s.c
464
uint32_t val;
sys/arm64/rockchip/rk_i2s.c
472
val = RK_I2S_READ_4(sc, I2S_INTCR);
sys/arm64/rockchip/rk_i2s.c
474
val |= I2S_INTCR_TXEIE;
sys/arm64/rockchip/rk_i2s.c
476
val |= I2S_INTCR_RXFIE;
sys/arm64/rockchip/rk_i2s.c
477
RK_I2S_WRITE_4(sc, I2S_INTCR, val);
sys/arm64/rockchip/rk_i2s.c
479
val = I2S_XFER_TXS_START | I2S_XFER_RXS_START;
sys/arm64/rockchip/rk_i2s.c
480
RK_I2S_WRITE_4(sc, I2S_XFER, val);
sys/arm64/rockchip/rk_i2s.c
485
val = RK_I2S_READ_4(sc, I2S_INTCR);
sys/arm64/rockchip/rk_i2s.c
487
val &= ~I2S_INTCR_TXEIE;
sys/arm64/rockchip/rk_i2s.c
489
val &= ~I2S_INTCR_RXFIE;
sys/arm64/rockchip/rk_i2s.c
490
RK_I2S_WRITE_4(sc, I2S_INTCR, val);
sys/arm64/rockchip/rk_i2s.c
495
if ((val & (I2S_INTCR_TXEIE | I2S_INTCR_RXFIE)) == 0) {
sys/arm64/rockchip/rk_i2s.c
505
val = RK_I2S_READ_4(sc, I2S_CLR);
sys/arm64/rockchip/rk_i2s.c
506
val |= clear_bit;
sys/arm64/rockchip/rk_i2s.c
507
RK_I2S_WRITE_4(sc, I2S_CLR, val);
sys/arm64/rockchip/rk_i2s.c
596
uint32_t val;
sys/arm64/rockchip/rk_i2s.c
604
val = RK_I2S_READ_4(sc, I2S_CKR);
sys/arm64/rockchip/rk_i2s.c
606
if ((val & I2S_CKR_MSS_SLAVE) == 0) {
sys/arm64/rockchip/rk_i2s.c
616
val &= ~(I2S_CKR_MDIV_MASK | I2S_CKR_RSD_MASK | I2S_CKR_TSD_MASK);
sys/arm64/rockchip/rk_i2s.c
617
val |= I2S_CKR_MDIV(bus_clock_div);
sys/arm64/rockchip/rk_i2s.c
618
val |= I2S_CKR_RSD(lr_clock_div);
sys/arm64/rockchip/rk_i2s.c
619
val |= I2S_CKR_TSD(lr_clock_div);
sys/arm64/rockchip/rk_i2s.c
621
RK_I2S_WRITE_4(sc, I2S_CKR, val);
sys/arm64/rockchip/rk_pcie.c
1004
uint32_t val;
sys/arm64/rockchip/rk_pcie.c
1020
val = APB_RD4(sc, PCIE_RC_CONFIG_THP_CAP);
sys/arm64/rockchip/rk_pcie.c
1021
val &= ~PCIE_RC_CONFIG_THP_CAP_NEXT_MASK;
sys/arm64/rockchip/rk_pcie.c
1022
APB_WR4(sc, PCIE_RC_CONFIG_THP_CAP, val);
sys/arm64/rockchip/rk_pcie.c
1026
val = APB_RD4(sc, PCIE_RC_CONFIG_LINK_CAP);
sys/arm64/rockchip/rk_pcie.c
1027
val &= ~PCIE_RC_CONFIG_THP_CAP_NEXT_MASK;
sys/arm64/rockchip/rk_pcie.c
1028
APB_WR4(sc, PCIE_RC_CONFIG_LINK_CAP_L0S, val);
sys/arm64/rockchip/rk_pcie.c
1032
val = APB_RD4(sc, PCIE_RC_CONFIG_DCSR);
sys/arm64/rockchip/rk_pcie.c
1033
val &= ~PCIE_RC_CONFIG_DCSR_MPS_MASK;
sys/arm64/rockchip/rk_pcie.c
1034
val |= PCIE_RC_CONFIG_DCSR_MPS_128;
sys/arm64/rockchip/rk_pcie.c
1035
APB_WR4(sc, PCIE_RC_CONFIG_DCSR, val);
sys/arm64/rockchip/rk_pcie.c
1147
uint32_t val;
sys/arm64/rockchip/rk_pcie.c
1331
val =
sys/arm64/rockchip/rk_pcie.c
1339
APB_WR4(sc, PCIE_CLIENT_INT_MASK, (val << 16) & ~val);
sys/arm64/rockchip/rk_pcie.c
1341
val =
sys/arm64/rockchip/rk_pcie.c
1349
APB_WR4(sc, PCIE_CORE_INT_MASK, ~(val));
sys/arm64/rockchip/rk_pcie.c
1351
val = APB_RD4(sc, PCIE_RC_CONFIG_LCS);
sys/arm64/rockchip/rk_pcie.c
1352
val |= PCIEM_LINK_CTL_LBMIE | PCIEM_LINK_CTL_LABIE;
sys/arm64/rockchip/rk_pcie.c
1353
APB_WR4(sc, PCIE_RC_CONFIG_LCS, val);
sys/arm64/rockchip/rk_pcie.c
172
#define PRIV_CFG_WR4(sc, reg, val) \
sys/arm64/rockchip/rk_pcie.c
173
rk_pcie_local_cfg_write(sc, true, reg, val, 4)
sys/arm64/rockchip/rk_pcie.c
174
#define PRIV_CFG_WR2(sc, reg, val) \
sys/arm64/rockchip/rk_pcie.c
175
rk_pcie_local_cfg_write(sc, true, reg, val, 2)
sys/arm64/rockchip/rk_pcie.c
176
#define PRIV_CFG_WR1(sc, reg, val) \
sys/arm64/rockchip/rk_pcie.c
177
rk_pcie_local_cfg_write(sc, true, reg, val, 1)
sys/arm64/rockchip/rk_pcie.c
248
uint32_t val;
sys/arm64/rockchip/rk_pcie.c
258
val = bus_read_4(sc->apb_mem_res, base + reg);
sys/arm64/rockchip/rk_pcie.c
261
val = bus_read_2(sc->apb_mem_res, base + reg);
sys/arm64/rockchip/rk_pcie.c
264
val = bus_read_1(sc->apb_mem_res, base + reg);
sys/arm64/rockchip/rk_pcie.c
267
val = 0xFFFFFFFF;
sys/arm64/rockchip/rk_pcie.c
269
return (val);
sys/arm64/rockchip/rk_pcie.c
274
uint32_t val, int bytes)
sys/arm64/rockchip/rk_pcie.c
286
bus_write_4(sc->apb_mem_res, base + reg, val);
sys/arm64/rockchip/rk_pcie.c
291
val2 |= ((val & 0xffff) << ((reg & 3) << 3));
sys/arm64/rockchip/rk_pcie.c
297
val2 |= ((val & 0xff) << ((reg & 3) << 3));
sys/arm64/rockchip/rk_pcie.c
307
uint32_t val;
sys/arm64/rockchip/rk_pcie.c
321
val = APB_RD4(sc, PCIE_CLIENT_BASIC_STATUS1);
sys/arm64/rockchip/rk_pcie.c
322
if (STATUS1_LINK_ST_GET(val) != STATUS1_LINK_ST_UP)
sys/arm64/rockchip/rk_pcie.c
492
u_int func, u_int reg, uint32_t val, int bytes)
sys/arm64/rockchip/rk_pcie.c
504
return (rk_pcie_local_cfg_write(sc, false, reg, val, bytes));
sys/arm64/rockchip/rk_pcie.c
513
bus_poke_1(sc->axi_mem_res, addr, (uint8_t)val);
sys/arm64/rockchip/rk_pcie.c
516
bus_poke_2(sc->axi_mem_res, addr, (uint16_t)val);
sys/arm64/rockchip/rk_pcie.c
519
bus_poke_4(sc->axi_mem_res, addr, val);
sys/arm64/rockchip/rk_pcie.c
761
uint32_t val;
sys/arm64/rockchip/rk_pcie.c
876
val = STRAP_CONF_GEN_2 << 16 |
sys/arm64/rockchip/rk_pcie.c
878
val |= STRAP_CONF_MODE_RC << 16 | STRAP_CONF_MODE_RC;
sys/arm64/rockchip/rk_pcie.c
879
val |= STRAP_CONF_LANES(~0) << 16 | STRAP_CONF_LANES(sc->num_lanes);
sys/arm64/rockchip/rk_pcie.c
880
val |= STRAP_CONF_ARI_EN << 16 | STRAP_CONF_ARI_EN;
sys/arm64/rockchip/rk_pcie.c
881
val |= STRAP_CONF_CONF_EN << 16 | STRAP_CONF_CONF_EN;
sys/arm64/rockchip/rk_pcie.c
882
APB_WR4(sc, PCIE_CLIENT_BASIC_STRAP_CONF, val);
sys/arm64/rockchip/rk_pcie.c
919
uint32_t val;
sys/arm64/rockchip/rk_pcie.c
937
val = APB_RD4(sc, PCIE_CORE_CTRL1);
sys/arm64/rockchip/rk_pcie.c
938
val |= 0xFFFF << 8;
sys/arm64/rockchip/rk_pcie.c
939
APB_WR4(sc, PCIE_CORE_CTRL1, val);
sys/arm64/rockchip/rk_pcie.c
942
val = APB_RD4(sc, PCIE_RC_CONFIG_LCS);
sys/arm64/rockchip/rk_pcie.c
943
val |= PCIEM_LINK_CTL_COMMON_CLOCK;
sys/arm64/rockchip/rk_pcie.c
944
APB_WR4(sc, PCIE_RC_CONFIG_LCS, val);
sys/arm64/rockchip/rk_pcie.c
945
val = APB_RD4(sc, PCIE_RC_CONFIG_LCS);
sys/arm64/rockchip/rk_pcie.c
946
val |= PCIEM_LINK_CTL_RCB;
sys/arm64/rockchip/rk_pcie.c
947
APB_WR4(sc, PCIE_RC_CONFIG_LCS, val);
sys/arm64/rockchip/rk_pcie.c
964
val = APB_RD4(sc, PCIE_CLIENT_BASIC_STATUS1);
sys/arm64/rockchip/rk_pcie.c
965
if (STATUS1_LINK_ST_GET(val) == STATUS1_LINK_ST_UP)
sys/arm64/rockchip/rk_pcie.c
971
"Gen1 link training timeouted: 0x%08X.\n", val);
sys/arm64/rockchip/rk_pcie.c
976
val = APB_RD4(sc, PCIE_RC_CONFIG_LCS);
sys/arm64/rockchip/rk_pcie.c
977
val |= PCIEM_LINK_CTL_RETRAIN_LINK;
sys/arm64/rockchip/rk_pcie.c
978
APB_WR4(sc, PCIE_RC_CONFIG_LCS, val);
sys/arm64/rockchip/rk_pcie.c
982
val = APB_RD4(sc, PCIE_CLIENT_BASIC_STATUS1);
sys/arm64/rockchip/rk_pcie.c
983
if (STATUS1_LINK_ST_GET(val) ==
sys/arm64/rockchip/rk_pcie.c
990
"timeouted: 0x%08X.\n", val);
sys/arm64/rockchip/rk_pcie.c
993
val = APB_RD4(sc, PCIE_CORE_CTRL0);
sys/arm64/rockchip/rk_pcie.c
994
val = CORE_CTRL_LANES_GET(val);
sys/arm64/rockchip/rk_pcie.c
996
device_printf(sc->dev, "Link width: %d\n", 1 << val);
sys/arm64/rockchip/rk_pcie_phy.c
124
uint32_t val;
sys/arm64/rockchip/rk_pcie_phy.c
129
val = RD4(sc, GRF_SOC_STATUS1);
sys/arm64/rockchip/rk_pcie_phy.c
130
return ((val >> 8) & 0x0f);
sys/arm64/rockchip/rk_pcie_phy.c
136
uint32_t val;
sys/arm64/rockchip/rk_pcie_phy.c
159
val = cfg_read(sc, PHY_CFG_PLL_LOCK);
sys/arm64/rockchip/rk_pcie_phy.c
160
if (val & CLK_PLL_LOCKED)
sys/arm64/rockchip/rk_pcie_phy.c
165
device_printf(sc->dev, "PLL lock timeouted, 0x%02X\n", val);
sys/arm64/rockchip/rk_pcie_phy.c
176
val = cfg_read(sc, PHY_CFG_SCC_LOCK);
sys/arm64/rockchip/rk_pcie_phy.c
177
if ((val & CLK_SCC_100M_GATE) == 0)
sys/arm64/rockchip/rk_pcie_phy.c
189
val = cfg_read(sc, PHY_CFG_PLL_LOCK);
sys/arm64/rockchip/rk_pcie_phy.c
190
if (val & CLK_PLL_LOCKED)
sys/arm64/rockchip/rk_pcie_phy.c
98
#define WR4(sc, reg, mask, val) \
sys/arm64/rockchip/rk_pcie_phy.c
99
SYSCON_WRITE_4((sc)->syscon, (reg), ((mask) << GRF_HIWORD_SHIFT) | (val))
sys/arm64/rockchip/rk_tsadc.c
472
uint32_t val;
sys/arm64/rockchip/rk_tsadc.c
475
val = RD4(sc, TSADC_INT_EN);
sys/arm64/rockchip/rk_tsadc.c
478
val &= ~TSADC_INT_EN_2CRU_EN_SRC(sensor->channel);
sys/arm64/rockchip/rk_tsadc.c
479
val |= TSADC_INT_EN_2GPIO_EN_SRC(sensor->channel);
sys/arm64/rockchip/rk_tsadc.c
481
val |= TSADC_INT_EN_2CRU_EN_SRC(sensor->channel);
sys/arm64/rockchip/rk_tsadc.c
482
val &= ~TSADC_INT_EN_2GPIO_EN_SRC(sensor->channel);
sys/arm64/rockchip/rk_tsadc.c
484
WR4(sc, TSADC_INT_EN, val);
sys/arm64/rockchip/rk_tsadc.c
487
val = tsadc_temp_to_raw(sc, sc->shutdown_temp);
sys/arm64/rockchip/rk_tsadc.c
488
WR4(sc, TSADC_COMP_SHUT(sensor->channel), val);
sys/arm64/rockchip/rk_tsadc.c
489
val = RD4(sc, TSADC_AUTO_CON);
sys/arm64/rockchip/rk_tsadc.c
490
val |= TSADC_AUTO_SRC_EN(sensor->channel);
sys/arm64/rockchip/rk_tsadc.c
491
WR4(sc, TSADC_AUTO_CON, val);
sys/arm64/rockchip/rk_tsadc.c
494
val = tsadc_temp_to_raw(sc, sc->alarm_temp);
sys/arm64/rockchip/rk_tsadc.c
495
WR4(sc, TSADC_COMP_INT(sensor->channel), val);
sys/arm64/rockchip/rk_tsadc.c
496
val = RD4(sc, TSADC_INT_EN);
sys/arm64/rockchip/rk_tsadc.c
497
val |= TSADC_COMP_INT_SRC_EN(sensor->channel);
sys/arm64/rockchip/rk_tsadc.c
498
WR4(sc, TSADC_INT_EN, val);
sys/arm64/rockchip/rk_tsadc.c
504
uint32_t val;
sys/arm64/rockchip/rk_tsadc.c
507
val = 0; /* XXX Is this right? */
sys/arm64/rockchip/rk_tsadc.c
509
val |= TSADC_AUTO_CON_POL_HI;
sys/arm64/rockchip/rk_tsadc.c
511
val &= ~TSADC_AUTO_CON_POL_HI;
sys/arm64/rockchip/rk_tsadc.c
513
val |= TSADC_AUTO_Q_SEL;
sys/arm64/rockchip/rk_tsadc.c
514
WR4(sc, TSADC_AUTO_CON, val);
sys/arm64/rockchip/rk_tsadc.c
572
uint32_t val;
sys/arm64/rockchip/rk_tsadc.c
574
val = RD4(sc, TSADC_DATA(sensor->channel));
sys/arm64/rockchip/rk_tsadc.c
575
*temp = tsadc_raw_to_temp(sc, val);
sys/arm64/rockchip/rk_tsadc.c
579
__func__, sensor->id, sensor->channel, val, *temp);
sys/arm64/rockchip/rk_tsadc.c
590
tsadc_get_temp(device_t dev, device_t cdev, uintptr_t id, int *val)
sys/arm64/rockchip/rk_tsadc.c
602
rv =tsadc_read_temp(sc, sc->conf->tsensors + id, val);
sys/arm64/rockchip/rk_tsadc.c
613
int val;
sys/arm64/rockchip/rk_tsadc.c
626
rv = tsadc_read_temp(sc, sc->conf->tsensors + id, &val);
sys/arm64/rockchip/rk_tsadc.c
630
val = val / 100;
sys/arm64/rockchip/rk_tsadc.c
631
val += 2731;
sys/arm64/rockchip/rk_tsadc.c
632
rv = sysctl_handle_int(oidp, &val, 0, req);
sys/arm64/rockchip/rk_tsadc.c
667
uint32_t val;
sys/arm64/rockchip/rk_tsadc.c
671
val = RD4(sc, TSADC_INT_PD);
sys/arm64/rockchip/rk_tsadc.c
672
WR4(sc, TSADC_INT_PD, val);
sys/arm64/rockchip/rk_tsadc.c
675
if (val & 0x00F0) {
sys/arm64/rockchip/rk_tsadc.c
678
} else if (val & 0x000F) {
sys/arm64/rockchip/rk_tsadc.c
704
uint32_t val;
sys/arm64/rockchip/rk_tsadc.c
810
val = RD4(sc, TSADC_AUTO_CON);
sys/arm64/rockchip/rk_tsadc.c
811
val |= TSADC_AUTO_CON_AUTO;
sys/arm64/rockchip/rk_tsadc.c
812
WR4(sc, TSADC_AUTO_CON, val);
sys/arm64/rockchip/rk_typec_phy.c
135
#define RK_TYPEC_PHY_WRITE(sc, reg, val) bus_write_4(sc->res, (reg), (val))
sys/arm64/vmm/io/vgic_v3.c
620
gic_reg_value_64(uint64_t field, uint64_t val, u_int offset, u_int size)
sys/arm64/vmm/io/vgic_v3.c
627
val <<= (offset * 8);
sys/arm64/vmm/io/vgic_v3.c
629
val &= mask;
sys/arm64/vmm/io/vgic_v3.c
631
val |= field & ~mask;
sys/arm64/vmm/io/vgic_v3.c
634
return (val);
sys/arm64/vmm/io/vgic_v3.c
684
write_enabler(struct hypctx *hypctx,int n, bool set, uint64_t val)
sys/arm64/vmm/io/vgic_v3.c
693
if ((val & (1u << i)) == 0)
sys/arm64/vmm/io/vgic_v3.c
732
write_pendr(struct hypctx *hypctx, int n, bool set, uint64_t val)
sys/arm64/vmm/io/vgic_v3.c
748
if ((val & (1u << i)) == 0)
sys/arm64/vmm/io/vgic_v3.c
810
write_activer(struct hypctx *hypctx, u_int n, bool set, uint64_t val)
sys/arm64/vmm/io/vgic_v3.c
824
if ((val & (1u << i)) == 0)
sys/arm64/vmm/io/vgic_v3.c
884
write_priorityr(struct hypctx *hypctx, u_int irq_base, u_int size, uint64_t val)
sys/arm64/vmm/io/vgic_v3.c
896
irq->priority = (val >> (i * 8)) & 0xf8;
sys/arm64/vmm/io/vgic_v3.c
925
write_config(struct hypctx *hypctx, int n, uint64_t val)
sys/arm64/vmm/io/vgic_v3.c
947
irq->config = (val >> (i * 2)) & VGIC_CONFIG_MASK;
sys/arm64/vmm/io/vgic_v3.c
969
write_route(struct hypctx *hypctx, int n, uint64_t val, u_int offset,
sys/arm64/vmm/io/vgic_v3.c
978
irq->mpidr = gic_reg_value_64(irq->mpidr, val, offset, size) & GICD_AFF;
sys/arm64/vmm/vmm.c
444
uint64_t val;
sys/arm64/vmm/vmm.c
447
val = OSLSR_OSLM_1;
sys/arm64/vmm/vmm.c
449
val |= OSLSR_OSLK;
sys/arm64/vmm/vmm.c
450
*rval = val;
sys/arm64/vmm/vmm.c
780
vm_set_capability(struct vcpu *vcpu, int type, int val)
sys/arm64/vmm/vmm.c
785
return (vmmops_setcap(vcpu->cookie, type, val));
sys/arm64/vmm/vmm.c
804
vm_set_register(struct vcpu *vcpu, int reg, uint64_t val)
sys/arm64/vmm/vmm.c
810
error = vmmops_setreg(vcpu->cookie, reg, val);
sys/arm64/vmm/vmm.c
814
vcpu->nextpc = val;
sys/arm64/vmm/vmm_arm64.c
1298
vmmops_setreg(void *vcpui, int reg, uint64_t val)
sys/arm64/vmm/vmm_arm64.c
1313
*regp = val;
sys/arm64/vmm/vmm_arm64.c
1361
vmmops_setcap(void *vcpui, int num, int val)
sys/arm64/vmm/vmm_arm64.c
1370
if ((val != 0) == ((hypctx->setcaps & (1ul << num)) != 0))
sys/arm64/vmm/vmm_arm64.c
1372
if (val != 0)
sys/arm64/vmm/vmm_arm64.c
1378
if ((val != 0) == ((hypctx->setcaps & (1ul << num)) != 0))
sys/arm64/vmm/vmm_arm64.c
1381
if (val != 0) {
sys/arm64/vmm/vmm_arm64.c
1400
if ((val != 0) == ((hypctx->setcaps & (1ul << num)) != 0))
sys/arm64/vmm/vmm_arm64.c
1403
if (val != 0) {
sys/arm64/vmm/vmm_arm64.c
1420
if (val == 0)
sys/arm64/vmm/vmm_instruction_emul.c
59
uint64_t val;
sys/arm64/vmm/vmm_instruction_emul.c
63
error = memread(vcpu, gpa, &val, vie->access_size, memarg);
sys/arm64/vmm/vmm_instruction_emul.c
66
error = vm_set_register(vcpu, vie->reg, val);
sys/arm64/vmm/vmm_instruction_emul.c
68
error = vm_get_register(vcpu, vie->reg, &val);
sys/arm64/vmm/vmm_instruction_emul.c
73
val &= (1ul << (vie->access_size * 8)) - 1;
sys/arm64/vmm/vmm_instruction_emul.c
74
error = memwrite(vcpu, gpa, val, vie->access_size, memarg);
sys/arm64/vmm/vmm_instruction_emul.c
85
uint64_t val;
sys/arm64/vmm/vmm_instruction_emul.c
89
error = regread(vcpu, &val, regarg);
sys/arm64/vmm/vmm_instruction_emul.c
92
error = vm_set_register(vcpu, vre->reg, val);
sys/arm64/vmm/vmm_instruction_emul.c
94
error = vm_get_register(vcpu, vre->reg, &val);
sys/arm64/vmm/vmm_instruction_emul.c
97
error = regwrite(vcpu, val, regarg);
sys/bsm/audit_internal.h
103
#define ADD_U_INT64(loc, val) \
sys/bsm/audit_internal.h
105
be64enc((loc), (val)); \
sys/bsm/audit_internal.h
84
#define ADD_U_CHAR(loc, val) \
sys/bsm/audit_internal.h
86
*(loc) = (val); \
sys/bsm/audit_internal.h
91
#define ADD_U_INT16(loc, val) \
sys/bsm/audit_internal.h
93
be16enc((loc), (val)); \
sys/bsm/audit_internal.h
97
#define ADD_U_INT32(loc, val) \
sys/bsm/audit_internal.h
99
be32enc((loc), (val)); \
sys/cam/ata/ata_all.c
715
ata_pm_write_cmd(struct ccb_ataio *ataio, int reg, int port, uint32_t val)
sys/cam/ata/ata_all.c
721
ataio->cmd.sector_count = val;
sys/cam/ata/ata_all.c
722
ataio->cmd.lba_low = val >> 8;
sys/cam/ata/ata_all.c
723
ataio->cmd.lba_mid = val >> 16;
sys/cam/ata/ata_all.c
724
ataio->cmd.lba_high = val >> 24;
sys/cam/ata/ata_all.h
129
void ata_pm_write_cmd(struct ccb_ataio *ataio, int reg, int port, uint32_t val);
sys/cam/cam_iosched.c
1841
cam_iosched_set_sort_queue(struct cam_iosched_softc *isc, int val)
sys/cam/cam_iosched.c
1844
isc->sort_io_queue = val;
sys/cam/cam_iosched.c
1881
isqrt64(uint64_t val)
sys/cam/cam_iosched.c
1889
while (bit > val)
sys/cam/cam_iosched.c
1900
if (val >= res + bit) {
sys/cam/cam_iosched.c
1901
val -= res + bit;
sys/cam/cam_iosched.h
97
void cam_iosched_set_sort_queue(struct cam_iosched_softc *isc, int val);
sys/cam/cam_periph.c
559
int i, val, dunit, r;
sys/cam/cam_periph.c
600
resource_int_value(dname, dunit, "lun", &val) == 0 ||
sys/cam/cam_periph.c
601
resource_int_value(dname, dunit, "target", &val) == 0 ||
sys/cam/cam_periph.c
617
int i, val, dunit;
sys/cam/cam_periph.c
634
if (resource_int_value(dname, dunit, "target", &val) == 0) {
sys/cam/cam_periph.c
635
if (val != target)
sys/cam/cam_periph.c
639
if (resource_int_value(dname, dunit, "lun", &val) == 0) {
sys/cam/cam_periph.c
640
if (val != lun)
sys/cam/cam_xpt.c
4059
int i, dunit, val;
sys/cam/cam_xpt.c
4075
if (resource_int_value("scbus", dunit, "bus", &val) == 0) {
sys/cam/cam_xpt.c
4076
if (sim_bus == val) {
sys/cam/ctl/ctl.c
10152
const char *val;
sys/cam/ctl/ctl.c
10230
if (lun == NULL || (val = dnvlist_get_string(lun->be_lun->options,
sys/cam/ctl/ctl.c
10235
strncpy(inq_ptr->vendor, val,
sys/cam/ctl/ctl.c
10236
min(sizeof(inq_ptr->vendor), strlen(val)));
sys/cam/ctl/ctl.c
10241
} else if ((val = dnvlist_get_string(lun->be_lun->options, "product",
sys/cam/ctl/ctl.c
10263
strncpy(inq_ptr->product, val,
sys/cam/ctl/ctl.c
10264
min(sizeof(inq_ptr->product), strlen(val)));
sys/cam/ctl/ctl.c
10271
if (lun == NULL || (val = dnvlist_get_string(lun->be_lun->options,
sys/cam/ctl/ctl.c
10276
strncpy(inq_ptr->revision, val,
sys/cam/ctl/ctl.c
10277
min(sizeof(inq_ptr->revision), strlen(val)));
sys/cam/ctl/ctl.c
14396
uint64_t thres, val;
sys/cam/ctl/ctl.c
14440
val = lun->backend->lun_attr(lun->be_lun, attr);
sys/cam/ctl/ctl.c
14442
if (val == UINT64_MAX)
sys/cam/ctl/ctl.c
14446
e = (val >= thres);
sys/cam/ctl/ctl.c
14448
e = (val <= thres);
sys/cam/ctl/ctl.c
5687
const char *val;
sys/cam/ctl/ctl.c
5753
val = dnvlist_get_string(lun->be_lun->options,
sys/cam/ctl/ctl.c
5755
if (val != NULL)
sys/cam/ctl/ctl.c
5756
ctl_expand_number(val, &ival);
sys/cam/ctl/ctl.c
6744
uint64_t val;
sys/cam/ctl/ctl.c
6749
(val = lun->backend->lun_attr(lun->be_lun, "blocksavail"))
sys/cam/ctl/ctl.c
6756
scsi_ulto4b(val >> CTL_LBP_EXPONENT, data);
sys/cam/ctl/ctl.c
6762
(val = lun->backend->lun_attr(lun->be_lun, "blocksused"))
sys/cam/ctl/ctl.c
6769
scsi_ulto4b(val >> CTL_LBP_EXPONENT, data);
sys/cam/ctl/ctl.c
6775
(val = lun->backend->lun_attr(lun->be_lun, "poolblocksavail"))
sys/cam/ctl/ctl.c
6782
scsi_ulto4b(val >> CTL_LBP_EXPONENT, data);
sys/cam/ctl/ctl.c
6788
(val = lun->backend->lun_attr(lun->be_lun, "poolblocksused"))
sys/cam/ctl/ctl.c
6795
scsi_ulto4b(val >> CTL_LBP_EXPONENT, data);
sys/cam/ctl/ctl.c
9904
const char *val;
sys/cam/ctl/ctl.c
9934
val = dnvlist_get_string(lun->be_lun->options,
sys/cam/ctl/ctl.c
9936
if (val != NULL)
sys/cam/ctl/ctl.c
9937
ctl_expand_number(val, &ival);
sys/cam/ctl/ctl.c
9940
val = dnvlist_get_string(lun->be_lun->options,
sys/cam/ctl/ctl.c
9942
if (val != NULL)
sys/cam/ctl/ctl.c
9943
ctl_expand_number(val, &ival);
sys/cam/ctl/ctl.c
9959
val = dnvlist_get_string(lun->be_lun->options,
sys/cam/ctl/ctl.c
9961
if (val != NULL)
sys/cam/ctl/ctl.c
9962
ctl_expand_number(val, &ival);
sys/cam/ctl/ctl_backend_block.c
855
uint64_t val;
sys/cam/ctl/ctl_backend_block.c
858
val = UINT64_MAX;
sys/cam/ctl/ctl_backend_block.c
860
return (val);
sys/cam/ctl/ctl_backend_block.c
865
val = vattr.va_bytes / be_lun->cbe_lun.blocksize;
sys/cam/ctl/ctl_backend_block.c
871
val = statfs.f_bavail * statfs.f_bsize /
sys/cam/ctl/ctl_backend_block.c
875
return (val);
sys/cam/ctl/ctl_backend_ramdisk.c
1001
val = be_lun->cap_used / be_lun->cbe_lun.blocksize;
sys/cam/ctl/ctl_backend_ramdisk.c
1003
val = (be_lun->cap_bytes - be_lun->cap_used) /
sys/cam/ctl/ctl_backend_ramdisk.c
1007
return (val);
sys/cam/ctl/ctl_backend_ramdisk.c
994
uint64_t val;
sys/cam/ctl/ctl_backend_ramdisk.c
996
val = UINT64_MAX;
sys/cam/ctl/ctl_backend_ramdisk.c
998
return (val);
sys/cam/ctl/ctl_frontend_ioctl.c
174
const char *val;
sys/cam/ctl/ctl_frontend_ioctl.c
178
val = dnvlist_get_string(req->args_nvl, "pp", NULL);
sys/cam/ctl/ctl_frontend_ioctl.c
179
if (val != NULL)
sys/cam/ctl/ctl_frontend_ioctl.c
180
pp = strtol(val, NULL, 10);
sys/cam/ctl/ctl_frontend_ioctl.c
182
val = dnvlist_get_string(req->args_nvl, "vp", NULL);
sys/cam/ctl/ctl_frontend_ioctl.c
183
if (val != NULL)
sys/cam/ctl/ctl_frontend_ioctl.c
184
vp = strtol(val, NULL, 10);
sys/cam/ctl/ctl_frontend_ioctl.c
260
const char *val;
sys/cam/ctl/ctl_frontend_ioctl.c
263
val = dnvlist_get_string(req->args_nvl, "port_id", NULL);
sys/cam/ctl/ctl_frontend_ioctl.c
264
if (val != NULL)
sys/cam/ctl/ctl_frontend_ioctl.c
265
port_id = strtol(val, NULL, 10);
sys/cam/ctl/ctl_frontend_iscsi.c
2146
const char *target, *alias, *val;
sys/cam/ctl/ctl_frontend_iscsi.c
2159
val = dnvlist_get_string(req->args_nvl, "cfiscsi_portal_group_tag",
sys/cam/ctl/ctl_frontend_iscsi.c
2161
if (val == NULL) {
sys/cam/ctl/ctl_frontend_iscsi.c
2170
tag = strtoul(val, NULL, 0);
sys/cam/ctl/ctl_frontend_iscsi.c
2256
const char *target, *val;
sys/cam/ctl/ctl_frontend_iscsi.c
2267
val = dnvlist_get_string(req->args_nvl, "cfiscsi_portal_group_tag",
sys/cam/ctl/ctl_frontend_iscsi.c
2269
if (val == NULL) {
sys/cam/ctl/ctl_frontend_iscsi.c
2276
tag = strtoul(val, NULL, 0);
sys/cam/ctl/ctl_ha.c
305
int error, val;
sys/cam/ctl/ctl_ha.c
307
val = 1024 * 1024;
sys/cam/ctl/ctl_ha.c
308
error = soreserve(so, val, val);
sys/cam/ctl/ctl_ha.c
325
opt.sopt_val = &val;
sys/cam/ctl/ctl_ha.c
326
opt.sopt_valsize = sizeof(val);
sys/cam/ctl/ctl_ha.c
327
val = 1;
sys/cam/ctl/ctl_ha.c
334
val = 1;
sys/cam/ctl/ctl_ha.c
340
val = 3;
sys/cam/ctl/ctl_ha.c
346
val = 1;
sys/cam/ctl/ctl_ha.c
352
val = 1;
sys/cam/ctl/ctl_ha.c
358
val = 5;
sys/cam/ctl/ctl_ha.c
433
int error, val;
sys/cam/ctl/ctl_ha.c
447
opt.sopt_val = &val;
sys/cam/ctl/ctl_ha.c
448
opt.sopt_valsize = sizeof(val);
sys/cam/ctl/ctl_ha.c
449
val = 1;
sys/cam/ctl/ctl_ha.c
459
opt.sopt_val = &val;
sys/cam/ctl/ctl_ha.c
460
opt.sopt_valsize = sizeof(val);
sys/cam/ctl/ctl_ha.c
461
val = 1;
sys/cam/scsi/scsi_all.c
4998
uint64_t val;
sys/cam/scsi/scsi_all.c
5036
&val, NULL) == 0) {
sys/cam/scsi/scsi_all.c
5038
scsi_info_sbuf(sb, cdb, cdb_len, inq_data, val);
sys/cam/scsi/scsi_all.c
5046
&val, NULL) == 0) {
sys/cam/scsi/scsi_all.c
5048
scsi_fru_sbuf(sb, val);
sys/cam/scsi/scsi_all.c
5056
&val, NULL) == 0) {
sys/cam/scsi/scsi_all.c
5058
scsi_command_sbuf(sb, cdb, cdb_len, inq_data, val);
sys/cam/scsi/scsi_all.c
9639
uint32_t val = scsi_4btoul(sfixed->info);
sys/cam/scsi/scsi_all.c
9641
sbuf_printf(sb, "info=0x%x ", val);
sys/cam/scsi/scsi_all.c
9645
uint32_t val = scsi_4btoul(sfixed->cmd_spec_info);
sys/cam/scsi/scsi_all.c
9647
sbuf_printf(sb, "cmd_info=0x%x ", val);
sys/cam/scsi/scsi_all.h
4429
scsi_ulto2b(uint32_t val, uint8_t *bytes)
sys/cam/scsi/scsi_all.h
4432
bytes[0] = (val >> 8) & 0xff;
sys/cam/scsi/scsi_all.h
4433
bytes[1] = val & 0xff;
sys/cam/scsi/scsi_all.h
4437
scsi_ulto3b(uint32_t val, uint8_t *bytes)
sys/cam/scsi/scsi_all.h
4440
bytes[0] = (val >> 16) & 0xff;
sys/cam/scsi/scsi_all.h
4441
bytes[1] = (val >> 8) & 0xff;
sys/cam/scsi/scsi_all.h
4442
bytes[2] = val & 0xff;
sys/cam/scsi/scsi_all.h
4446
scsi_ulto4b(uint32_t val, uint8_t *bytes)
sys/cam/scsi/scsi_all.h
4449
bytes[0] = (val >> 24) & 0xff;
sys/cam/scsi/scsi_all.h
4450
bytes[1] = (val >> 16) & 0xff;
sys/cam/scsi/scsi_all.h
4451
bytes[2] = (val >> 8) & 0xff;
sys/cam/scsi/scsi_all.h
4452
bytes[3] = val & 0xff;
sys/cam/scsi/scsi_all.h
4456
scsi_u64to8b(uint64_t val, uint8_t *bytes)
sys/cam/scsi/scsi_all.h
4459
bytes[0] = (val >> 56) & 0xff;
sys/cam/scsi/scsi_all.h
4460
bytes[1] = (val >> 48) & 0xff;
sys/cam/scsi/scsi_all.h
4461
bytes[2] = (val >> 40) & 0xff;
sys/cam/scsi/scsi_all.h
4462
bytes[3] = (val >> 32) & 0xff;
sys/cam/scsi/scsi_all.h
4463
bytes[4] = (val >> 24) & 0xff;
sys/cam/scsi/scsi_all.h
4464
bytes[5] = (val >> 16) & 0xff;
sys/cam/scsi/scsi_all.h
4465
bytes[6] = (val >> 8) & 0xff;
sys/cam/scsi/scsi_all.h
4466
bytes[7] = val & 0xff;
sys/cam/scsi/scsi_ses.h
50
LS ## _set_ ## LF(struct LS *elem, int val) { \
sys/cam/scsi/scsi_ses.h
53
(val << MK_ENUM(US,UF,_SHIFT)) & MK_ENUM(US,UF,_MASK); \
sys/cam/scsi/scsi_ses.h
65
LS ## _set_ ## LF(struct LS *page, int val) { \
sys/cam/scsi/scsi_ses.h
68
(val << MK_ENUM(US,UF,_SHIFT)) & MK_ENUM(US,UF,_MASK); \
sys/cam/scsi/smp_all.c
63
static char *smp_yesno(int val);
sys/cam/scsi/smp_all.c
66
smp_yesno(int val)
sys/cam/scsi/smp_all.c
70
if (val)
sys/cddl/boot/zfs/zfsimpl.h
110
#define BF32_SET(x, low, len, val) \
sys/cddl/boot/zfs/zfsimpl.h
111
((x) ^= BF32_ENCODE((x >> low) ^ (val), low, len))
sys/cddl/boot/zfs/zfsimpl.h
112
#define BF64_SET(x, low, len, val) \
sys/cddl/boot/zfs/zfsimpl.h
113
((x) ^= BF64_ENCODE((x >> low) ^ (val), low, len))
sys/cddl/boot/zfs/zfsimpl.h
120
#define BF32_SET_SB(x, low, len, shift, bias, val) \
sys/cddl/boot/zfs/zfsimpl.h
121
BF32_SET(x, low, len, ((val) >> (shift)) - (bias))
sys/cddl/boot/zfs/zfsimpl.h
122
#define BF64_SET_SB(x, low, len, shift, bias, val) \
sys/cddl/boot/zfs/zfsimpl.h
123
BF64_SET(x, low, len, ((val) >> (shift)) - (bias))
sys/cddl/boot/zfs/zfssubr.c
1036
val = 0;
sys/cddl/boot/zfs/zfssubr.c
1040
val = vdev_raidz_pow2[ll];
sys/cddl/boot/zfs/zfssubr.c
1044
dst[cc][x] = val;
sys/cddl/boot/zfs/zfssubr.c
1046
dst[cc][x] ^= val;
sys/cddl/boot/zfs/zfssubr.c
983
uint8_t log, val;
sys/cddl/dev/dtrace/aarch64/dtrace_isa.c
271
uint64_t val;
sys/cddl/dev/dtrace/aarch64/dtrace_isa.c
284
memcpy(&val, (void *)p, sizeof(uint64_t));
sys/cddl/dev/dtrace/aarch64/dtrace_isa.c
285
return (val);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
365
uintptr_t val;
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
436
val = stack[arg];
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
439
kmsan_mark(&val, sizeof(val), KMSAN_STATE_INITED);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
441
return (val);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
627
uint8_t val;
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
634
val = dtrace_fuword8_nocheck(uaddr);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
635
kmsan_mark(&val, sizeof(val), KMSAN_STATE_INITED);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
636
return (val);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
642
uint16_t val;
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
649
val = dtrace_fuword16_nocheck(uaddr);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
650
kmsan_mark(&val, sizeof(val), KMSAN_STATE_INITED);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
651
return (val);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
657
uint32_t val;
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
664
val = dtrace_fuword32_nocheck(uaddr);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
665
kmsan_mark(&val, sizeof(val), KMSAN_STATE_INITED);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
666
return (val);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
672
uint64_t val;
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
679
val = dtrace_fuword64_nocheck(uaddr);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
680
kmsan_mark(&val, sizeof(val), KMSAN_STATE_INITED);
sys/cddl/dev/dtrace/amd64/dtrace_isa.c
681
return (val);
sys/cddl/dev/dtrace/dtrace_test.c
76
int val, error;
sys/cddl/dev/dtrace/dtrace_test.c
78
val = 0;
sys/cddl/dev/dtrace/dtrace_test.c
79
error = sysctl_handle_int(oidp, &val, 0, req);
sys/cddl/dev/dtrace/dtrace_test.c
82
else if (val == 0)
sys/cddl/dev/dtrace/i386/dtrace_isa.c
426
uintptr_t *stack, val;
sys/cddl/dev/dtrace/i386/dtrace_isa.c
467
val = stack[arg];
sys/cddl/dev/dtrace/i386/dtrace_isa.c
470
return (val);
sys/cddl/dev/dtrace/powerpc/dtrace_isa.c
425
uintptr_t val;
sys/cddl/dev/dtrace/powerpc/dtrace_isa.c
500
val = stack[arg];
sys/cddl/dev/dtrace/powerpc/dtrace_isa.c
503
return (val);
sys/cddl/dev/fbt/aarch64/fbt_isa.c
72
fbt_patch_tracepoint(fbt_probe_t *fbt, fbt_patchval_t val)
sys/cddl/dev/fbt/aarch64/fbt_isa.c
79
*(fbt_patchval_t *)addr = val;
sys/cddl/dev/fbt/arm/fbt_isa.c
80
fbt_patch_tracepoint(fbt_probe_t *fbt, fbt_patchval_t val)
sys/cddl/dev/fbt/arm/fbt_isa.c
83
*fbt->fbtp_patchpoint = val;
sys/cddl/dev/fbt/arm/fbt_isa.c
84
icache_sync((vm_offset_t)fbt->fbtp_patchpoint, sizeof(val));
sys/cddl/dev/fbt/powerpc/fbt_isa.c
96
fbt_patch_tracepoint(fbt_probe_t *fbt, fbt_patchval_t val)
sys/cddl/dev/fbt/powerpc/fbt_isa.c
99
*fbt->fbtp_patchpoint = val;
sys/cddl/dev/fbt/riscv/fbt_isa.c
76
fbt_patch_tracepoint(fbt_probe_t *fbt, fbt_patchval_t val)
sys/cddl/dev/fbt/riscv/fbt_isa.c
81
*(uint16_t *)fbt->fbtp_patchpoint = (uint16_t)val;
sys/cddl/dev/fbt/riscv/fbt_isa.c
85
*fbt->fbtp_patchpoint = val;
sys/cddl/dev/fbt/x86/fbt_isa.c
165
fbt_patch_tracepoint(fbt_probe_t *fbt, fbt_patchval_t val)
sys/cddl/dev/fbt/x86/fbt_isa.c
172
*fbt->fbtp_patchpoint = val;
sys/cddl/dev/kinst/aarch64/kinst_isa.c
236
kinst_patch_tracepoint(struct kinst_probe *kp, kinst_patchval_t val)
sys/cddl/dev/kinst/aarch64/kinst_isa.c
242
*(kinst_patchval_t *)addr = val;
sys/cddl/dev/kinst/amd64/kinst_isa.c
226
kinst_patch_tracepoint(struct kinst_probe *kp, kinst_patchval_t val)
sys/cddl/dev/kinst/amd64/kinst_isa.c
233
*kp->kp_patchpoint = val;
sys/cddl/dev/kinst/riscv/kinst_isa.c
347
kinst_patch_tracepoint(struct kinst_probe *kp, kinst_patchval_t val)
sys/cddl/dev/kinst/riscv/kinst_isa.c
351
*(uint16_t *)kp->kp_patchpoint = (uint16_t)val;
sys/cddl/dev/kinst/riscv/kinst_isa.c
355
*kp->kp_patchpoint = val;
sys/cddl/dev/profile/profile.c
322
hrtime_t val = 0, mult = 1, len = 0;
sys/cddl/dev/profile/profile.c
417
val += (name[j] - '0') * mult;
sys/cddl/dev/profile/profile.c
421
if (val == 0)
sys/cddl/dev/profile/profile.c
441
val = NANOSEC / val;
sys/cddl/dev/profile/profile.c
443
val *= mult;
sys/cddl/dev/profile/profile.c
446
profile_create(val, name, kind);
sys/compat/freebsd32/freebsd32_ipc.h
183
int val;
sys/compat/freebsd32/freebsd32_ipc.h
62
int val;
sys/compat/freebsd32/freebsd32_misc.c
3162
struct itimerspec val, oval, *ovalp;
sys/compat/freebsd32/freebsd32_misc.c
3168
ITS_CP(val32, val);
sys/compat/freebsd32/freebsd32_misc.c
3170
error = kern_ktimer_settime(td, uap->timerid, uap->flags, &val, ovalp);
sys/compat/freebsd32/freebsd32_misc.c
3183
struct itimerspec val;
sys/compat/freebsd32/freebsd32_misc.c
3186
error = kern_ktimer_gettime(td, uap->timerid, &val);
sys/compat/freebsd32/freebsd32_misc.c
3188
ITS_CP(val, val32);
sys/compat/freebsd32/freebsd32_proto.h
362
char val_l_[PADL_(u_long)]; u_long val; char val_r_[PADR_(u_long)];
sys/compat/freebsd32/freebsd32_systrace_args.c
1889
uarg[a++] = (intptr_t)p->val; /* int * */
sys/compat/freebsd32/freebsd32_systrace_args.c
2174
uarg[a++] = p->val; /* u_long */
sys/compat/freebsd32/freebsd32_systrace_args.c
587
uarg[a++] = (intptr_t)p->val; /* const void * */
sys/compat/freebsd32/freebsd32_systrace_args.c
622
uarg[a++] = (intptr_t)p->val; /* void * */
sys/compat/linprocfs/linprocfs.c
2226
int error, val;
sys/compat/linprocfs/linprocfs.c
2229
size = sizeof(val);
sys/compat/linprocfs/linprocfs.c
2231
__DECONST(void *, sysctl), &val, &size, NULL, 0, 0, 0);
sys/compat/linprocfs/linprocfs.c
2233
sbuf_printf(sb, "%d\n", val);
sys/compat/linprocfs/linprocfs.c
2245
val = (int)vall;
sys/compat/linprocfs/linprocfs.c
2248
&val, sizeof(val), 0, 0);
sys/compat/linprocfs/linprocfs.c
624
sp->f_fsid.val[0] ^ sp->f_fsid.val[1], mntto);
sys/compat/linux/linux_file.c
260
mount_id = (fh.fh_fsid.val[0] ^ fh.fh_fsid.val[1]);
sys/compat/linux/linux_futex.c
103
futex_wake(struct thread *td, uint32_t *uaddr, int val, bool shared)
sys/compat/linux/linux_futex.c
111
args.val = val;
sys/compat/linux/linux_futex.c
221
args->uaddr, args->val, args->val3);
sys/compat/linux/linux_futex.c
231
args->uaddr, args->val, args->val3);
sys/compat/linux/linux_futex.c
263
args->uaddr, args->val, args->val3, args->uaddr2,
sys/compat/linux/linux_futex.c
271
args->uaddr, args->val, args->uaddr2, args->val3,
sys/compat/linux/linux_futex.c
282
args->uaddr, args->val);
sys/compat/linux/linux_futex.c
649
ret = umtxq_signal_mask(&key, args->val, args->val3);
sys/compat/linux/linux_futex.c
684
nrwake = args->val;
sys/compat/linux/linux_futex.c
71
uint32_t val;
sys/compat/linux/linux_futex.c
732
td->td_retval[0] = umtxq_signal_mask(&key, args->val, args->val3);
sys/compat/linux/linux_futex.c
764
else if (uval != args->val)
sys/compat/linux/linux_futex.c
811
.val = args->val,
sys/compat/linux/linux_futex.c
845
.val = args->val,
sys/compat/linux/linux_futex.h
96
int futex_wake(struct thread *td, uint32_t *uaddr, int val, bool shared);
sys/compat/linux/linux_ioctl.c
827
int val;
sys/compat/linux/linux_ioctl.c
830
val = FREAD;
sys/compat/linux/linux_ioctl.c
833
val = FWRITE;
sys/compat/linux/linux_ioctl.c
836
val = FREAD | FWRITE;
sys/compat/linux/linux_ioctl.c
842
error = (fo_ioctl(fp,TIOCFLUSH,(caddr_t)&val,td->td_ucred,td));
sys/compat/linux/linux_ipc.c
566
semun.val = args->arg.val;
sys/compat/linux/linux_socket.c
2089
int error, level, name, val;
sys/compat/linux/linux_socket.c
2113
val = 0;
sys/compat/linux/linux_socket.c
2115
SO_BINTIME, &val, UIO_SYSSPACE, sizeof(val));
sys/compat/linux/linux_socket.c
2123
val = 0;
sys/compat/linux/linux_socket.c
2125
SO_TIMESTAMP, &val, UIO_SYSSPACE, sizeof(val));
sys/compat/linux/linux_socket.c
2239
linux_sockopt_copyout(struct thread *td, void *val, socklen_t len,
sys/compat/linux/linux_socket.c
2244
error = copyout(val, PTRIN(args->optval), len);
sys/compat/linux/linux_stats.c
366
linux_statfs->f_fsid.val[0] = bsd_statfs->f_fsid.val[0];
sys/compat/linux/linux_stats.c
367
linux_statfs->f_fsid.val[1] = bsd_statfs->f_fsid.val[1];
sys/compat/linux/linux_stats.c
405
linux_statfs->f_fsid.val[0] = bsd_statfs->f_fsid.val[0];
sys/compat/linux/linux_stats.c
406
linux_statfs->f_fsid.val[1] = bsd_statfs->f_fsid.val[1];
sys/compat/linux/linux_timer.c
119
struct itimerspec val, oval, *ovalp;
sys/compat/linux/linux_timer.c
125
error = linux_to_native_itimerspec(&val, &l_val);
sys/compat/linux/linux_timer.c
132
error = kern_ktimer_settime(td, uap->timerid, flags, &val, ovalp);
sys/compat/linux/linux_timer.c
146
struct itimerspec val, oval, *ovalp;
sys/compat/linux/linux_timer.c
152
error = linux_to_native_itimerspec64(&val, &l_val);
sys/compat/linux/linux_timer.c
159
error = kern_ktimer_settime(td, uap->timerid, flags, &val, ovalp);
sys/compat/linux/linux_timer.c
173
struct itimerspec val;
sys/compat/linux/linux_timer.c
176
error = kern_ktimer_gettime(td, uap->timerid, &val);
sys/compat/linux/linux_timer.c
178
error = native_to_linux_itimerspec(&l_val, &val);
sys/compat/linux/linux_timer.c
189
struct itimerspec val;
sys/compat/linux/linux_timer.c
192
error = kern_ktimer_gettime(td, uap->timerid, &val);
sys/compat/linux/linux_timer.c
194
error = native_to_linux_itimerspec64(&l_val, &val);
sys/compat/linux/linux_util.c
251
sb->st_dev = rootdevmp->mnt_stat.f_fsid.val[0];
sys/compat/linuxkpi/common/include/asm/atomic-long.h
83
atomic_long_xchg(atomic_long_t *v, long val)
sys/compat/linuxkpi/common/include/asm/atomic-long.h
85
return atomic_swap_long(&v->counter, val);
sys/compat/linuxkpi/common/include/asm/atomic.h
175
__typeof(*(ptr)) val; \
sys/compat/linuxkpi/common/include/asm/atomic.h
180
} __ret = { .val = (old) }, __new = { .val = (new) }; \
sys/compat/linuxkpi/common/include/asm/atomic.h
183
LINUXKPI_ATOMIC_8(sizeof(__ret.val) == 1 ||) \
sys/compat/linuxkpi/common/include/asm/atomic.h
184
LINUXKPI_ATOMIC_16(sizeof(__ret.val) == 2 ||) \
sys/compat/linuxkpi/common/include/asm/atomic.h
185
LINUXKPI_ATOMIC_64(sizeof(__ret.val) == 8 ||) \
sys/compat/linuxkpi/common/include/asm/atomic.h
186
sizeof(__ret.val) == 4); \
sys/compat/linuxkpi/common/include/asm/atomic.h
188
switch (sizeof(__ret.val)) { \
sys/compat/linuxkpi/common/include/asm/atomic.h
192
__ret.u8, __new.u8[0]) && __ret.val == (old)) \
sys/compat/linuxkpi/common/include/asm/atomic.h
199
__ret.u16, __new.u16[0]) && __ret.val == (old)) \
sys/compat/linuxkpi/common/include/asm/atomic.h
205
__ret.u32, __new.u32[0]) && __ret.val == (old)) \
sys/compat/linuxkpi/common/include/asm/atomic.h
211
__ret.u64, __new.u64[0]) && __ret.val == (old)) \
sys/compat/linuxkpi/common/include/asm/atomic.h
216
__ret.val; \
sys/compat/linuxkpi/common/include/asm/atomic.h
224
__typeof(*(ptr)) val; \
sys/compat/linuxkpi/common/include/asm/atomic.h
229
} __ret, __new = { .val = (new) }; \
sys/compat/linuxkpi/common/include/asm/atomic.h
232
LINUXKPI_ATOMIC_8(sizeof(__ret.val) == 1 ||) \
sys/compat/linuxkpi/common/include/asm/atomic.h
233
LINUXKPI_ATOMIC_16(sizeof(__ret.val) == 2 ||) \
sys/compat/linuxkpi/common/include/asm/atomic.h
234
LINUXKPI_ATOMIC_64(sizeof(__ret.val) == 8 ||) \
sys/compat/linuxkpi/common/include/asm/atomic.h
235
sizeof(__ret.val) == 4); \
sys/compat/linuxkpi/common/include/asm/atomic.h
237
switch (sizeof(__ret.val)) { \
sys/compat/linuxkpi/common/include/asm/atomic.h
240
__ret.val = READ_ONCE(*ptr); \
sys/compat/linuxkpi/common/include/asm/atomic.h
248
__ret.val = READ_ONCE(*ptr); \
sys/compat/linuxkpi/common/include/asm/atomic.h
265
__ret.val; \
sys/compat/linuxkpi/common/include/asm/byteorder.h
123
be64_add_cpu(uint64_t *var, uint64_t val)
sys/compat/linuxkpi/common/include/asm/byteorder.h
125
*var = cpu_to_be64(be64_to_cpu(*var) + val);
sys/compat/linuxkpi/common/include/asm/byteorder.h
129
be32_add_cpu(uint32_t *var, uint32_t val)
sys/compat/linuxkpi/common/include/asm/byteorder.h
131
*var = cpu_to_be32(be32_to_cpu(*var) + val);
sys/compat/linuxkpi/common/include/asm/byteorder.h
135
be16_add_cpu(uint16_t *var, uint16_t val)
sys/compat/linuxkpi/common/include/asm/byteorder.h
137
*var = cpu_to_be16(be16_to_cpu(*var) + val);
sys/compat/linuxkpi/common/include/asm/byteorder.h
141
le64_add_cpu(uint64_t *var, uint64_t val)
sys/compat/linuxkpi/common/include/asm/byteorder.h
143
*var = cpu_to_le64(le64_to_cpu(*var) + val);
sys/compat/linuxkpi/common/include/asm/byteorder.h
147
le32_add_cpu(uint32_t *var, uint32_t val)
sys/compat/linuxkpi/common/include/asm/byteorder.h
149
*var = cpu_to_le32(le32_to_cpu(*var) + val);
sys/compat/linuxkpi/common/include/asm/byteorder.h
153
le16_add_cpu(uint16_t *var, uint16_t val)
sys/compat/linuxkpi/common/include/asm/byteorder.h
155
*var = cpu_to_le16(le16_to_cpu(*var) + val);
sys/compat/linuxkpi/common/include/asm/msr.h
32
#define rdmsrl(msr, val) ((val) = rdmsr(msr))
sys/compat/linuxkpi/common/include/asm/msr.h
33
#define rdmsrl_safe(msr, val) rdmsr_safe(msr, val)
sys/compat/linuxkpi/common/include/linux/bitops.h
306
long val;
sys/compat/linuxkpi/common/include/linux/bitops.h
312
val = *var;
sys/compat/linuxkpi/common/include/linux/bitops.h
313
while (!atomic_fcmpset_long(var, &val, val & ~bit))
sys/compat/linuxkpi/common/include/linux/bitops.h
315
return !!(val & bit);
sys/compat/linuxkpi/common/include/linux/bitops.h
321
long val;
sys/compat/linuxkpi/common/include/linux/bitops.h
327
val = *var;
sys/compat/linuxkpi/common/include/linux/bitops.h
330
return !!(val & bit);
sys/compat/linuxkpi/common/include/linux/bitops.h
336
long val;
sys/compat/linuxkpi/common/include/linux/bitops.h
342
val = *var;
sys/compat/linuxkpi/common/include/linux/bitops.h
343
while (!atomic_fcmpset_long(var, &val, val | bit))
sys/compat/linuxkpi/common/include/linux/bitops.h
345
return !!(val & bit);
sys/compat/linuxkpi/common/include/linux/bitops.h
351
long val;
sys/compat/linuxkpi/common/include/linux/bitops.h
357
val = *var;
sys/compat/linuxkpi/common/include/linux/bitops.h
360
return !!(val & bit);
sys/compat/linuxkpi/common/include/linux/hash.h
41
hash_64(u64 val, u8 bits)
sys/compat/linuxkpi/common/include/linux/hash.h
49
u64 chunk = (val >> (8 * x)) & 0xFF;
sys/compat/linuxkpi/common/include/linux/hash.h
56
hash_32(u32 val, u8 bits)
sys/compat/linuxkpi/common/include/linux/hash.h
64
u32 chunk = (val >> (8 * x)) & 0xFF;
sys/compat/linuxkpi/common/include/linux/iosys-map.h
116
uint64_t val; \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
117
memcpy_fromio(&val, _addr, sizeof(uint64_t)); \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
118
val; \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
125
_type val; \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
128
val = _Generic(val, \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
134
val = READ_ONCE(*(_type *)((_ism)->vaddr + (_off))); \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
135
val; \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
138
_type val = (_val); \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
141
_Generic(val, \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
142
uint8_t : writeb(val, addr), \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
143
uint16_t: writew(val, addr), \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
144
uint32_t: writel(val, addr), \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
145
uint64_t: _iosys_map_writeq(val, addr)); \
sys/compat/linuxkpi/common/include/linux/iosys-map.h
147
WRITE_ONCE(*(_type *)((_ism)->vaddr + (_off)), val); \
sys/compat/linuxkpi/common/include/linux/kernel.h
269
#define u64_to_user_ptr(val) ((void *)(uintptr_t)(val))
sys/compat/linuxkpi/common/include/linux/minmax.h
68
#define clamp_val(val, lo, hi) clamp_t(typeof(val), val, lo, hi)
sys/compat/linuxkpi/common/include/linux/net_dim.h
250
#define IS_SIGNIFICANT_DIFF(val, ref) \
sys/compat/linuxkpi/common/include/linux/net_dim.h
251
(((100UL * abs((val) - (ref))) / (ref)) > 10) /* more than 10%
sys/compat/linuxkpi/common/include/linux/pci.h
1069
pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
sys/compat/linuxkpi/common/include/linux/pci.h
1077
return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val);
sys/compat/linuxkpi/common/include/linux/pci.h
1104
pcie_capability_set_word(struct pci_dev *dev, int pos, uint16_t val)
sys/compat/linuxkpi/common/include/linux/pci.h
1106
return (pcie_capability_clear_and_set_word(dev, pos, 0, val));
sys/compat/linuxkpi/common/include/linux/pci.h
1110
pcie_capability_clear_word(struct pci_dev *dev, int pos, uint16_t val)
sys/compat/linuxkpi/common/include/linux/pci.h
1112
return (pcie_capability_clear_and_set_word(dev, pos, val, 0));
sys/compat/linuxkpi/common/include/linux/pci.h
1379
int pos, uint32_t *val, int len)
sys/compat/linuxkpi/common/include/linux/pci.h
1382
*val = pci_read_config(bus->self->dev.bsddev, pos, len);
sys/compat/linuxkpi/common/include/linux/pci.h
1387
pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int pos, u16 *val)
sys/compat/linuxkpi/common/include/linux/pci.h
1393
*val = (u16)tmp;
sys/compat/linuxkpi/common/include/linux/pci.h
1398
pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, int pos, u8 *val)
sys/compat/linuxkpi/common/include/linux/pci.h
1404
*val = (u8)tmp;
sys/compat/linuxkpi/common/include/linux/pci.h
1410
uint32_t val, int size)
sys/compat/linuxkpi/common/include/linux/pci.h
1413
pci_write_config(bus->self->dev.bsddev, pos, val, size);
sys/compat/linuxkpi/common/include/linux/pci.h
1419
uint8_t val)
sys/compat/linuxkpi/common/include/linux/pci.h
1421
return (pci_bus_write_config(bus, devfn, pos, val, 1));
sys/compat/linuxkpi/common/include/linux/pci.h
1426
uint16_t val)
sys/compat/linuxkpi/common/include/linux/pci.h
1428
return (pci_bus_write_config(bus, devfn, pos, val, 2));
sys/compat/linuxkpi/common/include/linux/pci.h
260
#define PCI_SET_ERROR_RESPONSE(val) (*(val) = ((typeof(*(val))) PCI_ERROR_RESPONSE))
sys/compat/linuxkpi/common/include/linux/pci.h
261
#define PCI_POSSIBLE_ERROR(val) ((val) == ((typeof(val)) PCI_ERROR_RESPONSE))
sys/compat/linuxkpi/common/include/linux/pci.h
696
pci_read_config_byte(const struct pci_dev *pdev, int where, u8 *val)
sys/compat/linuxkpi/common/include/linux/pci.h
699
*val = (u8)pci_read_config(pdev->dev.bsddev, where, 1);
sys/compat/linuxkpi/common/include/linux/pci.h
704
pci_read_config_word(const struct pci_dev *pdev, int where, u16 *val)
sys/compat/linuxkpi/common/include/linux/pci.h
707
*val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);
sys/compat/linuxkpi/common/include/linux/pci.h
712
pci_read_config_dword(const struct pci_dev *pdev, int where, u32 *val)
sys/compat/linuxkpi/common/include/linux/pci.h
715
*val = (u32)pci_read_config(pdev->dev.bsddev, where, 4);
sys/compat/linuxkpi/common/include/linux/pci.h
720
pci_write_config_byte(const struct pci_dev *pdev, int where, u8 val)
sys/compat/linuxkpi/common/include/linux/pci.h
723
pci_write_config(pdev->dev.bsddev, where, val, 1);
sys/compat/linuxkpi/common/include/linux/pci.h
728
pci_write_config_word(const struct pci_dev *pdev, int where, u16 val)
sys/compat/linuxkpi/common/include/linux/pci.h
731
pci_write_config(pdev->dev.bsddev, where, val, 2);
sys/compat/linuxkpi/common/include/linux/pci.h
736
pci_write_config_dword(const struct pci_dev *pdev, int where, u32 val)
sys/compat/linuxkpi/common/include/linux/pci.h
739
pci_write_config(pdev->dev.bsddev, where, val, 4);
sys/compat/linuxkpi/common/include/linux/pfn.h
33
u64 val;
sys/compat/linuxkpi/common/include/linux/random.h
102
uint64_t val;
sys/compat/linuxkpi/common/include/linux/random.h
104
get_random_bytes(&val, sizeof(val));
sys/compat/linuxkpi/common/include/linux/random.h
105
return (val);
sys/compat/linuxkpi/common/include/linux/random.h
117
uint32_t val;
sys/compat/linuxkpi/common/include/linux/random.h
119
get_random_bytes(&val, sizeof(val));
sys/compat/linuxkpi/common/include/linux/random.h
120
return (val);
sys/compat/linuxkpi/common/include/linux/random.h
51
u_int val;
sys/compat/linuxkpi/common/include/linux/random.h
53
get_random_bytes(&val, sizeof(val));
sys/compat/linuxkpi/common/include/linux/random.h
54
return (val);
sys/compat/linuxkpi/common/include/linux/random.h
60
uint8_t val;
sys/compat/linuxkpi/common/include/linux/random.h
62
get_random_bytes(&val, sizeof(val));
sys/compat/linuxkpi/common/include/linux/random.h
63
return (val);
sys/compat/linuxkpi/common/include/linux/random.h
93
u_long val;
sys/compat/linuxkpi/common/include/linux/random.h
95
get_random_bytes(&val, sizeof(val));
sys/compat/linuxkpi/common/include/linux/random.h
96
return (val);
sys/compat/linuxkpi/common/include/linux/semaphore.h
51
linux_sema_init(struct semaphore *sem, int val)
sys/compat/linuxkpi/common/include/linux/semaphore.h
55
sema_init(&sem->sema, val, "lnxsema");
sys/compat/linuxkpi/common/include/linux/soc/airoha/airoha_offload.h
28
enum airoha_npu_wlan_set_cmd cmd, void *val, size_t len, gfp_t gfp)
sys/compat/linuxkpi/common/include/linux/soc/airoha/airoha_offload.h
36
enum airoha_npu_wlan_get_cmd cmd, void *val, size_t len, gfp_t gfp)
sys/compat/linuxkpi/common/include/net/mac80211.h
1923
uint8_t val;
sys/compat/linuxkpi/common/include/net/mac80211.h
1925
val = (map >> (2 * i)) & 0x03;
sys/compat/linuxkpi/common/include/net/mac80211.h
1926
if (val == IEEE80211_VHT_MCS_NOT_SUPPORTED)
sys/compat/linuxkpi/common/include/net/mac80211.h
1928
if (val >= mcs_s) {
sys/compat/linuxkpi/common/include/net/netlink.h
47
nla_put_u16(struct sk_buff *skb, int attr, uint32_t val)
sys/compat/linuxkpi/common/include/net/netlink.h
50
return (nla_put(skb, attr, sizeof(uint32_t), &val));
sys/compat/linuxkpi/common/src/linux_i2cbb.c
176
lkpi_iicbb_setsda(device_t dev, int val)
sys/compat/linuxkpi/common/src/linux_i2cbb.c
183
algo_data->setsda(algo_data->data, val);
sys/compat/linuxkpi/common/src/linux_i2cbb.c
187
lkpi_iicbb_setscl(device_t dev, int val)
sys/compat/linuxkpi/common/src/linux_i2cbb.c
194
algo_data->setscl(algo_data->data, val);
sys/compat/linuxkpi/common/src/linux_i2cbb.c
45
static void lkpi_iicbb_setsda(device_t dev, int val);
sys/compat/linuxkpi/common/src/linux_i2cbb.c
46
static void lkpi_iicbb_setscl(device_t dev, int val);
sys/compat/x86bios/x86bios.c
382
x86bios_emu_wrb(struct x86emu *emu, uint32_t addr, uint8_t val)
sys/compat/x86bios/x86bios.c
390
*va = val;
sys/compat/x86bios/x86bios.c
394
x86bios_emu_wrw(struct x86emu *emu, uint32_t addr, uint16_t val)
sys/compat/x86bios/x86bios.c
404
le16enc(va, val);
sys/compat/x86bios/x86bios.c
407
*va = htole16(val);
sys/compat/x86bios/x86bios.c
411
x86bios_emu_wrl(struct x86emu *emu, uint32_t addr, uint32_t val)
sys/compat/x86bios/x86bios.c
421
le32enc(va, val);
sys/compat/x86bios/x86bios.c
424
*va = htole32(val);
sys/compat/x86bios/x86bios.c
444
uint16_t val;
sys/compat/x86bios/x86bios.c
451
val = iodev_read_1(port);
sys/compat/x86bios/x86bios.c
452
val |= iodev_read_1(port + 1) << 8;
sys/compat/x86bios/x86bios.c
455
val = iodev_read_2(port);
sys/compat/x86bios/x86bios.c
457
return (val);
sys/compat/x86bios/x86bios.c
463
uint32_t val;
sys/compat/x86bios/x86bios.c
470
val = iodev_read_1(port);
sys/compat/x86bios/x86bios.c
471
val |= iodev_read_2(port + 1) << 8;
sys/compat/x86bios/x86bios.c
472
val |= iodev_read_1(port + 3) << 24;
sys/compat/x86bios/x86bios.c
474
val = iodev_read_2(port);
sys/compat/x86bios/x86bios.c
475
val |= iodev_read_2(port + 2) << 16;
sys/compat/x86bios/x86bios.c
478
val = iodev_read_4(port);
sys/compat/x86bios/x86bios.c
480
return (val);
sys/compat/x86bios/x86bios.c
484
x86bios_emu_outb(struct x86emu *emu, uint16_t port, uint8_t val)
sys/compat/x86bios/x86bios.c
494
iodev_write_1(port, val);
sys/compat/x86bios/x86bios.c
498
x86bios_emu_outw(struct x86emu *emu, uint16_t port, uint16_t val)
sys/compat/x86bios/x86bios.c
506
iodev_write_1(port, val);
sys/compat/x86bios/x86bios.c
507
iodev_write_1(port + 1, val >> 8);
sys/compat/x86bios/x86bios.c
510
iodev_write_2(port, val);
sys/compat/x86bios/x86bios.c
514
x86bios_emu_outl(struct x86emu *emu, uint16_t port, uint32_t val)
sys/compat/x86bios/x86bios.c
522
iodev_write_1(port, val);
sys/compat/x86bios/x86bios.c
523
iodev_write_2(port + 1, val >> 8);
sys/compat/x86bios/x86bios.c
524
iodev_write_1(port + 3, val >> 24);
sys/compat/x86bios/x86bios.c
526
iodev_write_2(port, val);
sys/compat/x86bios/x86bios.c
527
iodev_write_2(port + 2, val >> 16);
sys/compat/x86bios/x86bios.c
530
iodev_write_4(port, val);
sys/ddb/db_command.c
934
db_expr_t val;
sys/ddb/db_command.c
937
val = 0;
sys/ddb/db_command.c
942
val += (x % 16) * (y);
sys/ddb/db_command.c
946
return (val);
sys/ddb/db_pprint.c
211
db_expr_t val;
sys/ddb/db_pprint.c
218
val = db_get_value(addr, sizeof(int), 0);
sys/ddb/db_pprint.c
226
if (val == ep->cte_value) {
sys/ddb/db_pprint.c
229
db_printf("%s (0x%lx)", valname, (long)val);
sys/ddb/db_pprint.c
235
db_printf("0x%lx", (long)val);
sys/ddb/db_pprint.c
250
db_addr_t val;
sys/ddb/db_pprint.c
288
val = (addr != 0) ? db_get_value(addr, sizeof(db_addr_t), false) : 0;
sys/ddb/db_pprint.c
289
if (depth < max_depth && (val != 0)) {
sys/ddb/db_pprint.c
291
db_pprint_type(val, ref_type, depth + 1);
sys/ddb/db_pprint.c
297
asteriskstr, (long)val);
sys/ddb/db_pprint.c
300
(long)val);
sys/ddb/db_sym.c
369
db_search_symbol(db_addr_t val, db_strategy_t strategy, db_expr_t *offp)
sys/ddb/db_sym.c
383
if (val < PAGE_SIZE) {
sys/ddb/db_sym.c
389
newdiff = diff = val;
sys/ddb/db_sym.c
391
sym = X_db_search_symbol(&db_symtabs[i], val, strategy, &newdiff);
sys/ddb/db_sym.h
81
#define db_find_sym_and_offset(val,namep,offp) \
sys/ddb/db_sym.h
82
db_symbol_values(db_search_symbol(val,DB_STGY_ANY,offp),namep,0)
sys/ddb/db_sym.h
85
#define db_find_xtrn_sym_and_offset(val,namep,offp) \
sys/ddb/db_sym.h
86
db_symbol_values(db_search_symbol(val,DB_STGY_XTRN,offp),namep,0)
sys/dev/aac/aacvar.h
273
#define AAC_MEM0_SETREG4(sc, reg, val) bus_space_write_4(sc->aac_btag0, \
sys/dev/aac/aacvar.h
274
sc->aac_bhandle0, reg, val)
sys/dev/aac/aacvar.h
277
#define AAC_MEM0_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag0, \
sys/dev/aac/aacvar.h
278
sc->aac_bhandle0, reg, val)
sys/dev/aac/aacvar.h
281
#define AAC_MEM0_SETREG1(sc, reg, val) bus_space_write_1(sc->aac_btag0, \
sys/dev/aac/aacvar.h
282
sc->aac_bhandle0, reg, val)
sys/dev/aac/aacvar.h
286
#define AAC_MEM1_SETREG4(sc, reg, val) bus_space_write_4(sc->aac_btag1, \
sys/dev/aac/aacvar.h
287
sc->aac_bhandle1, reg, val)
sys/dev/aac/aacvar.h
290
#define AAC_MEM1_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag1, \
sys/dev/aac/aacvar.h
291
sc->aac_bhandle1, reg, val)
sys/dev/aac/aacvar.h
294
#define AAC_MEM1_SETREG1(sc, reg, val) bus_space_write_1(sc->aac_btag1, \
sys/dev/aac/aacvar.h
295
sc->aac_bhandle1, reg, val)
sys/dev/aacraid/aacraid.c
1848
uint32_t val;
sys/dev/aacraid/aacraid.c
1912
val = (cap != 0 ? pci_read_config(dev, cap + 2, 2) : 0);
sys/dev/aacraid/aacraid.c
1913
if (!(val & AAC_PCI_MSI_ENABLE)) {
sys/dev/aacraid/aacraid.c
1962
int next, val;
sys/dev/aacraid/aacraid.c
1964
val = pci_read_config(dev, ptr + PCICAP_ID, 1);
sys/dev/aacraid/aacraid.c
1965
if (val == cap)
sys/dev/aacraid/aacraid.c
2223
int val;
sys/dev/aacraid/aacraid.c
2228
val = AAC_MEM0_GETREG4(sc, AAC_SRC_ODBR_MSI);
sys/dev/aacraid/aacraid.c
2229
if (val & AAC_MSI_SYNC_STATUS)
sys/dev/aacraid/aacraid.c
2230
val = AAC_DB_SYNC_COMMAND;
sys/dev/aacraid/aacraid.c
2232
val = 0;
sys/dev/aacraid/aacraid.c
2234
val = AAC_MEM0_GETREG4(sc, AAC_SRC_ODBR_R) >> AAC_SRC_ODR_SHIFT;
sys/dev/aacraid/aacraid.c
2236
return(val);
sys/dev/aacraid/aacraid.c
2309
u_int32_t val;
sys/dev/aacraid/aacraid.c
2326
val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
sys/dev/aacraid/aacraid.c
2327
val |= 0x40;
sys/dev/aacraid/aacraid.c
2328
AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
sys/dev/aacraid/aacraid.c
2331
val = PMC_ALL_INTERRUPT_BITS;
sys/dev/aacraid/aacraid.c
2332
AAC_MEM0_SETREG4(sc, AAC_SRC_IOAR, val);
sys/dev/aacraid/aacraid.c
2333
val = AAC_MEM0_GETREG4(sc, AAC_SRC_OIMR);
sys/dev/aacraid/aacraid.c
2335
val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
sys/dev/aacraid/aacraid.c
2340
val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
sys/dev/aacraid/aacraid.c
2341
val &= ~0x40;
sys/dev/aacraid/aacraid.c
2342
AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
sys/dev/aacraid/aacraid.c
2348
val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
sys/dev/aacraid/aacraid.c
2349
val |= 0x20;
sys/dev/aacraid/aacraid.c
2350
AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
sys/dev/aacraid/aacraid.c
2356
val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
sys/dev/aacraid/aacraid.c
2357
val |= 0x10;
sys/dev/aacraid/aacraid.c
2358
AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
sys/dev/aacraid/aacraid.c
2364
val = AAC_MEM0_GETREG4(sc, AAC_SRC_IDBR);
sys/dev/aacraid/aacraid.c
2365
val |= 0x80;
sys/dev/aacraid/aacraid.c
2366
AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, val);
sys/dev/aacraid/aacraid.c
2369
val = PMC_ALL_INTERRUPT_BITS;
sys/dev/aacraid/aacraid.c
2370
AAC_MEM0_SETREG4(sc, AAC_SRC_IOAR, val);
sys/dev/aacraid/aacraid.c
2371
val = AAC_MEM0_GETREG4(sc, AAC_SRC_OIMR);
sys/dev/aacraid/aacraid.c
2373
val & (~(PMC_GLOBAL_INT_BIT2)));
sys/dev/aacraid/aacraid_var.h
281
#define AAC_MEM0_SETREG4(sc, reg, val) bus_space_write_4(sc->aac_btag0, \
sys/dev/aacraid/aacraid_var.h
282
sc->aac_bhandle0, reg, val)
sys/dev/aacraid/aacraid_var.h
285
#define AAC_MEM0_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag0, \
sys/dev/aacraid/aacraid_var.h
286
sc->aac_bhandle0, reg, val)
sys/dev/aacraid/aacraid_var.h
289
#define AAC_MEM0_SETREG1(sc, reg, val) bus_space_write_1(sc->aac_btag0, \
sys/dev/aacraid/aacraid_var.h
290
sc->aac_bhandle0, reg, val)
sys/dev/aacraid/aacraid_var.h
294
#define AAC_MEM1_SETREG4(sc, reg, val) bus_space_write_4(sc->aac_btag1, \
sys/dev/aacraid/aacraid_var.h
295
sc->aac_bhandle1, reg, val)
sys/dev/aacraid/aacraid_var.h
298
#define AAC_MEM1_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag1, \
sys/dev/aacraid/aacraid_var.h
299
sc->aac_bhandle1, reg, val)
sys/dev/aacraid/aacraid_var.h
302
#define AAC_MEM1_SETREG1(sc, reg, val) bus_space_write_1(sc->aac_btag1, \
sys/dev/aacraid/aacraid_var.h
303
sc->aac_bhandle1, reg, val)
sys/dev/acpi_support/acpi_asus.c
512
static int acpi_asus_sysctl_set(struct acpi_asus_softc *sc, int method, int val);
sys/dev/acpi_support/acpi_asus.c
957
int val = 0;
sys/dev/acpi_support/acpi_asus.c
964
val = sc->s_brn;
sys/dev/acpi_support/acpi_asus.c
967
val = sc->s_disp;
sys/dev/acpi_support/acpi_asus.c
970
val = sc->s_lcd;
sys/dev/acpi_support/acpi_asus.c
973
val = sc->s_cam;
sys/dev/acpi_support/acpi_asus.c
976
val = sc->s_crd;
sys/dev/acpi_support/acpi_asus.c
979
val = sc->s_wlan;
sys/dev/acpi_support/acpi_asus.c
983
return (val);
sys/dev/acpi_support/acpi_asus_wmi.c
427
devstate_to_kbd_bkl_level(UINT32 val)
sys/dev/acpi_support/acpi_asus_wmi.c
429
return (acpi_asus_wmi_backlight_levels[val & 0x3]);
sys/dev/acpi_support/acpi_asus_wmi.c
435
UINT32 val;
sys/dev/acpi_support/acpi_asus_wmi.c
442
val = (i - 1) & 0x3;
sys/dev/acpi_support/acpi_asus_wmi.c
443
if (val != 0)
sys/dev/acpi_support/acpi_asus_wmi.c
444
val |= 0x80;
sys/dev/acpi_support/acpi_asus_wmi.c
445
return(val);
sys/dev/acpi_support/acpi_asus_wmi.c
484
UINT32 val;
sys/dev/acpi_support/acpi_asus_wmi.c
508
if (acpi_wpi_asus_get_devstate(sc, dev_id, &val))
sys/dev/acpi_support/acpi_asus_wmi.c
541
ASUS_WMI_METHODID_INIT, 0, 0, 0, &val) && bootverbose)
sys/dev/acpi_support/acpi_asus_wmi.c
542
device_printf(dev, "Initialization: %#x\n", val);
sys/dev/acpi_support/acpi_asus_wmi.c
544
ASUS_WMI_METHODID_SPEC, 0, 0x9, 0, &val) && bootverbose)
sys/dev/acpi_support/acpi_asus_wmi.c
546
val >> 16, val & 0xFF);
sys/dev/acpi_support/acpi_asus_wmi.c
548
ASUS_WMI_METHODID_SFUN, 0, 0, 0, &val) && bootverbose)
sys/dev/acpi_support/acpi_asus_wmi.c
549
device_printf(dev, "SFUN value: %#x\n", val);
sys/dev/acpi_support/acpi_asus_wmi.c
561
if (acpi_wpi_asus_get_devstate(sc, dev_id, &val))
sys/dev/acpi_support/acpi_asus_wmi.c
568
if (val == 0)
sys/dev/acpi_support/acpi_asus_wmi.c
572
sc->kbd_bkl_level = devstate_to_kbd_bkl_level(val);
sys/dev/acpi_support/acpi_asus_wmi.c
576
if ((val & ASUS_WMI_DSTS_PRESENCE_BIT) == 0)
sys/dev/acpi_support/acpi_asus_wmi.c
728
UINT32 val = 0;
sys/dev/acpi_support/acpi_asus_wmi.c
740
acpi_wpi_asus_get_devstate(sc, dev_id, &val);
sys/dev/acpi_support/acpi_asus_wmi.c
744
val = (val - 2731 + 5) / 10;
sys/dev/acpi_support/acpi_asus_wmi.c
750
val &= ASUS_WMI_DSTS_BRIGHTNESS_MASK;
sys/dev/acpi_support/acpi_asus_wmi.c
753
val &= 0x3;
sys/dev/acpi_support/acpi_asus_wmi.c
756
if (val & ASUS_WMI_DSTS_UNKNOWN_BIT)
sys/dev/acpi_support/acpi_asus_wmi.c
757
val = -1;
sys/dev/acpi_support/acpi_asus_wmi.c
759
val = !!(val & ASUS_WMI_DSTS_STATUS_BIT);
sys/dev/acpi_support/acpi_asus_wmi.c
763
return (val);
sys/dev/acpi_support/acpi_asus_wmi.c
838
UINT32 val;
sys/dev/acpi_support/acpi_asus_wmi.c
851
ASUS_WMI_DEVID_KBD_BACKLIGHT, &val);
sys/dev/acpi_support/acpi_asus_wmi.c
852
val &= 0x3;
sys/dev/acpi_support/acpi_asus_wmi.c
854
if (val < 0x3)
sys/dev/acpi_support/acpi_asus_wmi.c
855
val++;
sys/dev/acpi_support/acpi_asus_wmi.c
856
} else if (val > 0)
sys/dev/acpi_support/acpi_asus_wmi.c
857
val--;
sys/dev/acpi_support/acpi_asus_wmi.c
858
if (val != 0)
sys/dev/acpi_support/acpi_asus_wmi.c
859
val |= 0x80;
sys/dev/acpi_support/acpi_asus_wmi.c
861
ASUS_WMI_DEVID_KBD_BACKLIGHT, val, NULL);
sys/dev/acpi_support/acpi_asus_wmi.c
862
sc->kbd_bkl_level = devstate_to_kbd_bkl_level(val);
sys/dev/acpi_support/acpi_asus_wmi.c
867
ASUS_WMI_DEVID_TOUCHPAD, &val);
sys/dev/acpi_support/acpi_asus_wmi.c
868
val = !(val & 1);
sys/dev/acpi_support/acpi_asus_wmi.c
870
ASUS_WMI_DEVID_TOUCHPAD, val, NULL);
sys/dev/acpi_support/acpi_fujitsu.c
577
int val;
sys/dev/acpi_support/acpi_fujitsu.c
591
sc->gvol.name, &val))) {
sys/dev/acpi_support/acpi_fujitsu.c
598
sc->gbls.name, &val))) {
sys/dev/acpi_support/acpi_fujitsu.c
606
sc->gbll.name, &val))) {
sys/dev/acpi_support/acpi_fujitsu.c
613
sc->ghks.name, &val))) {
sys/dev/acpi_support/acpi_fujitsu.c
620
sc->gmou.name, &val))) {
sys/dev/acpi_support/acpi_fujitsu.c
627
sc->rbll.name, &val))) {
sys/dev/acpi_support/acpi_fujitsu.c
634
sc->rvol.name, &val))) {
sys/dev/acpi_support/acpi_hp.c
315
int is_write, int val, int *retval);
sys/dev/acpi_support/acpi_hp.c
666
int val = 0;
sys/dev/acpi_support/acpi_hp.c
674
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
676
val = ((val & HP_MASK_WLAN_ENABLED) != 0);
sys/dev/acpi_support/acpi_hp.c
680
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
682
val = ((val & HP_MASK_WLAN_RADIO) != 0);
sys/dev/acpi_support/acpi_hp.c
686
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
688
val = ((val & HP_MASK_WLAN_ON_AIR) != 0);
sys/dev/acpi_support/acpi_hp.c
691
val = sc->wlan_enable_if_radio_on;
sys/dev/acpi_support/acpi_hp.c
694
val = sc->wlan_disable_if_radio_off;
sys/dev/acpi_support/acpi_hp.c
698
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
700
val = ((val & HP_MASK_BLUETOOTH_ENABLED) != 0);
sys/dev/acpi_support/acpi_hp.c
704
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
706
val = ((val & HP_MASK_BLUETOOTH_RADIO) != 0);
sys/dev/acpi_support/acpi_hp.c
710
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
712
val = ((val & HP_MASK_BLUETOOTH_ON_AIR) != 0);
sys/dev/acpi_support/acpi_hp.c
715
val = sc->bluetooth_enable_if_radio_on;
sys/dev/acpi_support/acpi_hp.c
718
val = sc->bluetooth_disable_if_radio_off;
sys/dev/acpi_support/acpi_hp.c
722
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
724
val = ((val & HP_MASK_WWAN_ENABLED) != 0);
sys/dev/acpi_support/acpi_hp.c
728
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
730
val = ((val & HP_MASK_WWAN_RADIO) != 0);
sys/dev/acpi_support/acpi_hp.c
734
ACPI_HP_WMI_WIRELESS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
736
val = ((val & HP_MASK_WWAN_ON_AIR) != 0);
sys/dev/acpi_support/acpi_hp.c
739
val = sc->wwan_enable_if_radio_on;
sys/dev/acpi_support/acpi_hp.c
742
val = sc->wwan_disable_if_radio_off;
sys/dev/acpi_support/acpi_hp.c
746
ACPI_HP_WMI_ALS_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
751
ACPI_HP_WMI_DISPLAY_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
756
ACPI_HP_WMI_HDDTEMP_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
761
ACPI_HP_WMI_DOCK_COMMAND, 0, 0, &val))
sys/dev/acpi_support/acpi_hp.c
765
val = sc->cmi_detail;
sys/dev/acpi_support/acpi_hp.c
768
val = sc->verbose;
sys/dev/acpi_support/acpi_hp.c
772
return (val);
sys/dev/acpi_support/acpi_hp.c
886
int val, int *retval)
sys/dev/acpi_support/acpi_hp.c
889
command, 4, val};
sys/dev/acpi_support/acpi_ibm.c
1131
int l, val;
sys/dev/acpi_support/acpi_ibm.c
1188
val = strtoul(cp, &ep, 16);
sys/dev/acpi_support/acpi_ibm.c
1190
val = strtoul(cp, &ep, 10);
sys/dev/acpi_support/acpi_ibm.c
1192
if (val == 0 || ep == cp || val >= 8 * sizeof(handler_events)) {
sys/dev/acpi_support/acpi_ibm.c
1199
handler_events |= 1 << (val - 1);
sys/dev/acpi_support/acpi_ibm.c
1213
int val, step;
sys/dev/acpi_support/acpi_ibm.c
1231
val = val_ec & IBM_EC_MASK_BRI;
sys/dev/acpi_support/acpi_ibm.c
1236
Arg.Integer.Value = (arg > val) ? IBM_CMOS_BRIGHTNESS_UP :
sys/dev/acpi_support/acpi_ibm.c
1239
step = (arg > val) ? 1 : -1;
sys/dev/acpi_support/acpi_ibm.c
1240
for (int i = val; i != arg; i += step) {
sys/dev/acpi_support/acpi_ibm.c
1245
if (i != val) {
sys/dev/acpi_support/acpi_ibm.c
1260
int val;
sys/dev/acpi_support/acpi_ibm.c
1268
val = (arg == 1) ? sc->wlan_bt_flags | IBM_NAME_MASK_BT :
sys/dev/acpi_support/acpi_ibm.c
1270
return acpi_SetInteger(sc->handle, IBM_NAME_WLAN_BT_SET, val);
sys/dev/acpi_support/acpi_ibm.c
1338
int val;
sys/dev/acpi_support/acpi_ibm.c
1340
status = acpi_ibm_privacyguard_acpi_call(sc, false, &val);
sys/dev/acpi_support/acpi_ibm.c
1342
(val & IBM_FLAG_PRIVACYGUARD_DEVICE_PRESENT))
sys/dev/acpi_support/acpi_ibm.c
1343
return (val & IBM_FLAG_PRIVACYGUARD_ON);
sys/dev/acpi_support/acpi_ibm.c
1360
int val, step;
sys/dev/acpi_support/acpi_ibm.c
1378
val = val_ec & IBM_EC_MASK_VOL;
sys/dev/acpi_support/acpi_ibm.c
1383
Arg.Integer.Value = (arg > val) ? IBM_CMOS_VOLUME_UP :
sys/dev/acpi_support/acpi_ibm.c
1386
step = (arg > val) ? 1 : -1;
sys/dev/acpi_support/acpi_ibm.c
1387
for (int i = val; i != arg; i += step) {
sys/dev/acpi_support/acpi_ibm.c
1392
if (i != val) {
sys/dev/acpi_support/acpi_ibm.c
1444
int val;
sys/dev/acpi_support/acpi_ibm.c
1471
val = val_ec & IBM_EC_MASK_BRI;
sys/dev/acpi_support/acpi_ibm.c
1472
val = (arg == IBM_EVENT_BRIGHTNESS_UP) ? val + 1 : val - 1;
sys/dev/acpi_support/acpi_ibm.c
1473
acpi_ibm_brightness_set(sc, val);
sys/dev/acpi_support/acpi_ibm.c
1487
val = val_ec & IBM_EC_MASK_VOL;
sys/dev/acpi_support/acpi_ibm.c
1488
val = (arg == IBM_EVENT_VOLUME_UP) ? val + 1 : val - 1;
sys/dev/acpi_support/acpi_ibm.c
1489
acpi_ibm_volume_set(sc, val);
sys/dev/acpi_support/acpi_ibm.c
1498
val = ((val_ec & IBM_EC_MASK_MUTE) == IBM_EC_MASK_MUTE);
sys/dev/acpi_support/acpi_ibm.c
1499
acpi_ibm_mute_set(sc, (val == 0));
sys/dev/acpi_support/acpi_ibm.c
339
static int acpi_ibm_sysctl_set(struct acpi_ibm_softc *sc, int method, int val);
sys/dev/acpi_support/acpi_ibm.c
341
static int acpi_ibm_eventmask_set(struct acpi_ibm_softc *sc, int val);
sys/dev/acpi_support/acpi_ibm.c
672
int val;
sys/dev/acpi_support/acpi_ibm.c
674
val = acpi_ibm_sysctl_get(sc, i);
sys/dev/acpi_support/acpi_ibm.c
679
acpi_ibm_sysctl_set(sc, i, val);
sys/dev/acpi_support/acpi_ibm.c
690
acpi_ibm_eventmask_set(struct acpi_ibm_softc *sc, int val)
sys/dev/acpi_support/acpi_ibm.c
706
arg[1].Integer.Value = (((1 << i) & val) != 0);
sys/dev/acpi_support/acpi_ibm.c
752
int val = 0, key;
sys/dev/acpi_support/acpi_ibm.c
759
acpi_GetInteger(sc->handle, IBM_NAME_EVENTS_STATUS_GET, &val);
sys/dev/acpi_support/acpi_ibm.c
764
acpi_GetInteger(sc->handle, IBM_NAME_EVENTS_MASK_GET, &val);
sys/dev/acpi_support/acpi_ibm.c
790
val = (IBM_RTC_MASK_HOME | IBM_RTC_MASK_SEARCH | IBM_RTC_MASK_MAIL | IBM_RTC_MASK_WLAN) & key;
sys/dev/acpi_support/acpi_ibm.c
792
val |= (IBM_RTC_MASK_THINKPAD | IBM_RTC_MASK_VIDEO | IBM_RTC_MASK_HIBERNATE) & key;
sys/dev/acpi_support/acpi_ibm.c
793
val |= (IBM_RTC_MASK_ZOOM & key) >> 1;
sys/dev/acpi_support/acpi_ibm.c
795
val |= (IBM_RTC_MASK_THINKLIGHT & key) << 4;
sys/dev/acpi_support/acpi_ibm.c
797
val |= (IBM_RTC_MASK_THINKLIGHT & key) << 4;
sys/dev/acpi_support/acpi_ibm.c
799
val |= (IBM_RTC_MASK_BRIGHTNESS & key) << 5;
sys/dev/acpi_support/acpi_ibm.c
801
val |= (IBM_RTC_MASK_VOLUME & key) << 4;
sys/dev/acpi_support/acpi_ibm.c
806
val = val_ec & IBM_EC_MASK_BRI;
sys/dev/acpi_support/acpi_ibm.c
811
val = val_ec & IBM_EC_MASK_VOL;
sys/dev/acpi_support/acpi_ibm.c
816
val = ((val_ec & IBM_EC_MASK_MUTE) == IBM_EC_MASK_MUTE);
sys/dev/acpi_support/acpi_ibm.c
821
acpi_GetInteger(sc->ec_handle, IBM_NAME_KEYLIGHT, &val);
sys/dev/acpi_support/acpi_ibm.c
823
val = sc->light_val;
sys/dev/acpi_support/acpi_ibm.c
827
acpi_GetInteger(sc->handle, IBM_NAME_WLAN_BT_GET, &val);
sys/dev/acpi_support/acpi_ibm.c
828
sc->wlan_bt_flags = val;
sys/dev/acpi_support/acpi_ibm.c
829
val = ((val & IBM_NAME_MASK_BT) != 0);
sys/dev/acpi_support/acpi_ibm.c
833
acpi_GetInteger(sc->handle, IBM_NAME_WLAN_BT_GET, &val);
sys/dev/acpi_support/acpi_ibm.c
834
sc->wlan_bt_flags = val;
sys/dev/acpi_support/acpi_ibm.c
835
val = ((val & IBM_NAME_MASK_WLAN) != 0);
sys/dev/acpi_support/acpi_ibm.c
840
if(ACPI_FAILURE(acpi_GetInteger(sc->fan_handle, NULL, &val)))
sys/dev/acpi_support/acpi_ibm.c
841
val = -1;
sys/dev/acpi_support/acpi_ibm.c
844
val = val_ec;
sys/dev/acpi_support/acpi_ibm.c
861
val = 8;
sys/dev/acpi_support/acpi_ibm.c
863
val = val_ec & IBM_EC_MASK_FANLEVEL;
sys/dev/acpi_support/acpi_ibm.c
870
val = (val_ec & IBM_EC_MASK_FANSTATUS) == IBM_EC_MASK_FANSTATUS;
sys/dev/acpi_support/acpi_ibm.c
872
val = -1;
sys/dev/acpi_support/acpi_ibm.c
879
val = -1;
sys/dev/acpi_support/acpi_ibm.c
883
val = acpi_ibm_privacyguard_get(sc);
sys/dev/acpi_support/acpi_ibm.c
887
return (val);
sys/dev/acpi_support/acpi_ibm.c
893
int val;
sys/dev/acpi_support/acpi_ibm.c
952
val = val_ec & ~(IBM_EC_MASK_FANLEVEL |
sys/dev/acpi_support/acpi_ibm.c
957
val |= 7 | IBM_EC_MASK_FANUNTHROTTLED;
sys/dev/acpi_support/acpi_ibm.c
959
val |= arg;
sys/dev/acpi_support/acpi_ibm.c
961
return (ACPI_EC_WRITE(sc->ec_dev, IBM_EC_FANSTATUS, val,
sys/dev/acpi_support/acpi_panasonic.c
323
acpi_panasonic_sset(ACPI_HANDLE h, UINT64 index, UINT64 val)
sys/dev/acpi_support/acpi_panasonic.c
332
obj[1].Integer.Value = val;
sys/dev/acpi_support/acpi_panasonic.c
339
hkey_lcd_brightness_max(ACPI_HANDLE h, int op, UINT32 *val)
sys/dev/acpi_support/acpi_panasonic.c
352
*val = acpi_panasonic_sinf(h, reg);
sys/dev/acpi_support/acpi_panasonic.c
360
hkey_lcd_brightness_min(ACPI_HANDLE h, int op, UINT32 *val)
sys/dev/acpi_support/acpi_panasonic.c
373
*val = acpi_panasonic_sinf(h, reg);
sys/dev/acpi_support/acpi_panasonic.c
381
hkey_lcd_brightness(ACPI_HANDLE h, int op, UINT32 *val)
sys/dev/acpi_support/acpi_panasonic.c
394
if (*val < min || *val > max)
sys/dev/acpi_support/acpi_panasonic.c
396
acpi_panasonic_sset(h, reg, *val);
sys/dev/acpi_support/acpi_panasonic.c
399
*val = acpi_panasonic_sinf(h, reg);
sys/dev/acpi_support/acpi_panasonic.c
407
hkey_sound_mute(ACPI_HANDLE h, int op, UINT32 *val)
sys/dev/acpi_support/acpi_panasonic.c
413
if (*val != 0 && *val != 1)
sys/dev/acpi_support/acpi_panasonic.c
415
acpi_panasonic_sset(h, HKEY_REG_SOUND_MUTE, *val);
sys/dev/acpi_support/acpi_panasonic.c
418
*val = acpi_panasonic_sinf(h, HKEY_REG_SOUND_MUTE);
sys/dev/acpi_support/acpi_panasonic.c
431
UINT64 val;
sys/dev/acpi_support/acpi_panasonic.c
445
val = res->Integer.Value;
sys/dev/acpi_support/acpi_panasonic.c
448
(val & 0x80) ? "Pressed" : "Released",
sys/dev/acpi_support/acpi_panasonic.c
449
(int)(val & 0x7f));
sys/dev/acpi_support/acpi_panasonic.c
451
if ((val & 0x7f) > 0 && (val & 0x7f) < 11) {
sys/dev/acpi_support/acpi_panasonic.c
452
*arg = val;
sys/dev/acpi_support/acpi_panasonic.c
88
UINT64 val);
sys/dev/acpi_support/acpi_rapidstart.c
110
int error = 0, val;
sys/dev/acpi_support/acpi_rapidstart.c
113
acpi_rapidstart_oids[function].getmethod, &val);
sys/dev/acpi_support/acpi_rapidstart.c
114
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/acpi_support/acpi_rapidstart.c
118
acpi_rapidstart_oids[function].setmethod, val);
sys/dev/acpi_support/acpi_sbl_wmi.c
103
*val = obj->Integer.Value;
sys/dev/acpi_support/acpi_sbl_wmi.c
116
uint32_t val;
sys/dev/acpi_support/acpi_sbl_wmi.c
118
val = in;
sys/dev/acpi_support/acpi_sbl_wmi.c
119
input.Length = sizeof(val);
sys/dev/acpi_support/acpi_sbl_wmi.c
120
input.Pointer = &val;
sys/dev/acpi_support/acpi_sbl_wmi.c
85
acpi_sbl_wmi_sysctl_get(struct acpi_sbl_wmi_softc *sc, int *val)
sys/dev/acpi_support/acpi_sony.c
176
int error = 0, val;
sys/dev/acpi_support/acpi_sony.c
179
acpi_sony_oids[function].getmethod, &val);
sys/dev/acpi_support/acpi_sony.c
180
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/acpi_support/acpi_sony.c
184
acpi_sony_oids[function].setmethod, val);
sys/dev/acpi_support/acpi_system76.c
178
devstate_to_backlight(uint32_t val)
sys/dev/acpi_support/acpi_system76.c
180
return (acpi_system76_backlight_levels[val >> 4 & 0xf]);
sys/dev/acpi_support/acpi_system76.c
187
uint32_t val;
sys/dev/acpi_support/acpi_system76.c
193
val = (i - 1) * 16;
sys/dev/acpi_support/acpi_system76.c
194
if (val > 224)
sys/dev/acpi_support/acpi_system76.c
195
val = 255;
sys/dev/acpi_support/acpi_system76.c
196
return (val);
sys/dev/acpi_support/acpi_system76.c
248
Arg[1].Integer.Value = ctrl->val;
sys/dev/acpi_support/acpi_system76.c
257
ctrl->val = Obj.Integer.Value;
sys/dev/acpi_support/acpi_system76.c
264
ctrl->val);
sys/dev/acpi_support/acpi_system76.c
267
&ctrl->val);
sys/dev/acpi_support/acpi_system76.c
300
sc->backlight_level = devstate_to_backlight(sc->kbb.val);
sys/dev/acpi_support/acpi_system76.c
325
s76_sysctl_table[method].get_method, &ctrl->val))) {
sys/dev/acpi_support/acpi_system76.c
361
int val, method, error;
sys/dev/acpi_support/acpi_system76.c
371
val = ctrl->val;
sys/dev/acpi_support/acpi_system76.c
372
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/acpi_support/acpi_system76.c
390
if (val > UINT8_MAX || val < 0)
sys/dev/acpi_support/acpi_system76.c
393
sc->backlight_level = devstate_to_backlight(val);
sys/dev/acpi_support/acpi_system76.c
396
if (val >= (1 << 24) || val < 0)
sys/dev/acpi_support/acpi_system76.c
402
if (val > 100 || val < 0 || val >= ctrl_cmp->val)
sys/dev/acpi_support/acpi_system76.c
408
if (val > 100 || val < 0 || val <= ctrl_cmp->val)
sys/dev/acpi_support/acpi_system76.c
412
ctrl->val = val;
sys/dev/acpi_support/acpi_system76.c
450
sc->backlight_level = devstate_to_backlight(sc->kbb.val);
sys/dev/acpi_support/acpi_system76.c
467
if (sc->kbb.val != backlight_to_devstate(props->brightness)) {
sys/dev/acpi_support/acpi_system76.c
468
sc->kbb.val = backlight_to_devstate(props->brightness);
sys/dev/acpi_support/acpi_system76.c
52
int val;
sys/dev/acpi_support/acpi_system76.c
546
ctrl->val = 0;
sys/dev/acpi_support/acpi_system76.c
561
ctrl->val = backlight_to_devstate(sc->backlight_level);
sys/dev/acpica/acpi.c
1963
const ACPI_OBJECT *pkg, *name, *val;
sys/dev/acpica/acpi.c
1988
val = &pkg->Package.Elements[1];
sys/dev/acpica/acpi.c
1993
*value = val;
sys/dev/acpica/acpi.c
2956
UINT8 *val;
sys/dev/acpica/acpi.c
2970
val = p->Buffer.Pointer;
sys/dev/acpica/acpi.c
2972
*number += val[i] << (i * 8);
sys/dev/acpica/acpi.c
382
int val;
sys/dev/acpica/acpi.c
415
if (resource_int_value("acpi", 0, "disabled", &val) == 0 && val == 0)
sys/dev/acpica/acpi.c
4494
bool val;
sys/dev/acpica/acpi.c
4497
val = sc->acpi_s4bios;
sys/dev/acpica/acpi.c
4498
error = sysctl_handle_bool(oidp, &val, 0, req);
sys/dev/acpica/acpi.c
4502
if (val && !sc->acpi_s4bios_supported)
sys/dev/acpica/acpi.c
4504
sc->acpi_s4bios = val;
sys/dev/acpica/acpi_acad.c
221
int val;
sys/dev/acpica/acpi_acad.c
224
val = sc->status;
sys/dev/acpica/acpi_acad.c
225
return (sysctl_handle_int(oidp, &val, 0, req));
sys/dev/acpica/acpi_apei.c
139
apei_bus_write_8(struct resource *res, bus_size_t offset, uint64_t val)
sys/dev/acpica/acpi_apei.c
141
bus_write_4(res, offset, val);
sys/dev/acpica/acpi_apei.c
142
bus_write_4(res, offset + 4, val >> 32);
sys/dev/acpica/acpi_apei.c
414
uint64_t val = READ8(ge->res2, 0);
sys/dev/acpica/acpi_apei.c
415
val &= ge->v2.ReadAckPreserve;
sys/dev/acpica/acpi_apei.c
416
val |= ge->v2.ReadAckWrite;
sys/dev/acpica/acpi_apei.c
417
WRITE8(ge->res2, 0, val);
sys/dev/acpica/acpi_apei.c
466
uint64_t val = READ8(ge->res2, 0);
sys/dev/acpica/acpi_apei.c
467
val &= ge->v2.ReadAckPreserve;
sys/dev/acpica/acpi_apei.c
468
val |= ge->v2.ReadAckWrite;
sys/dev/acpica/acpi_apei.c
469
WRITE8(ge->res2, 0, val);
sys/dev/acpica/acpi_battery.c
445
int val, error;
sys/dev/acpica/acpi_battery.c
448
val = *(u_int *)oidp->oid_arg1;
sys/dev/acpica/acpi_battery.c
449
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/acpica/acpi_cpu.c
112
#define CPU_SET_REG(reg, width, val) \
sys/dev/acpica/acpi_cpu.c
114
rman_get_bushandle((reg)), 0, (val)))
sys/dev/acpica/acpi_cpu.c
1316
uint32_t val;
sys/dev/acpica/acpi_cpu.c
1349
val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
sys/dev/acpica/acpi_cpu.c
1350
if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
sys/dev/acpica/acpi_cpu.c
1353
val |= PIIX4_STOP_BREAK_MASK;
sys/dev/acpica/acpi_cpu.c
1354
pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
sys/dev/acpica/acpi_cpu.c
1356
status = AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);
sys/dev/acpica/acpi_cpu.c
1357
if (ACPI_SUCCESS(status) && val != 0) {
sys/dev/acpica/acpi_cpu.c
1504
int val, error;
sys/dev/acpica/acpi_cpu.c
1514
val = MAX_CX_STATES;
sys/dev/acpica/acpi_cpu.c
1516
val = (int) strtol(state + 1, NULL, 10);
sys/dev/acpica/acpi_cpu.c
1517
if (val < 1 || val > MAX_CX_STATES)
sys/dev/acpica/acpi_cpu.c
1522
sc->cpu_cx_lowest_lim = val - 1;
sys/dev/acpica/acpi_cpu.c
1534
int val, error, i;
sys/dev/acpica/acpi_cpu.c
1543
val = MAX_CX_STATES;
sys/dev/acpica/acpi_cpu.c
1545
val = (int) strtol(state + 1, NULL, 10);
sys/dev/acpica/acpi_cpu.c
1546
if (val < 1 || val > MAX_CX_STATES)
sys/dev/acpica/acpi_cpu.c
1552
cpu_cx_lowest_lim = val - 1;
sys/dev/acpica/acpi_ec.c
238
UINT64 *val, int width);
sys/dev/acpica/acpi_ec.c
240
UINT64 val, int width);
sys/dev/acpica/acpi_ec.c
582
acpi_ec_read_method(device_t dev, u_int addr, UINT64 *val, int width)
sys/dev/acpica/acpi_ec.c
588
status = EcSpaceHandler(ACPI_READ, addr, width * 8, val, sc, NULL);
sys/dev/acpica/acpi_ec.c
595
acpi_ec_write_method(device_t dev, u_int addr, UINT64 val, int width)
sys/dev/acpica/acpi_ec.c
601
status = EcSpaceHandler(ACPI_WRITE, addr, width * 8, &val, sc, NULL);
sys/dev/acpica/acpi_hpet.c
183
uint32_t val;
sys/dev/acpica/acpi_hpet.c
185
val = bus_read_4(sc->mem_res, HPET_CONFIG);
sys/dev/acpica/acpi_hpet.c
187
val |= HPET_CNF_LEG_RT;
sys/dev/acpica/acpi_hpet.c
189
val &= ~HPET_CNF_LEG_RT;
sys/dev/acpica/acpi_hpet.c
190
val |= HPET_CNF_ENABLE;
sys/dev/acpica/acpi_hpet.c
191
bus_write_4(sc->mem_res, HPET_CONFIG, val);
sys/dev/acpica/acpi_hpet.c
197
uint32_t val;
sys/dev/acpica/acpi_hpet.c
199
val = bus_read_4(sc->mem_res, HPET_CONFIG);
sys/dev/acpica/acpi_hpet.c
200
val &= ~HPET_CNF_ENABLE;
sys/dev/acpica/acpi_hpet.c
201
bus_write_4(sc->mem_res, HPET_CONFIG, val);
sys/dev/acpica/acpi_hpet.c
320
uint32_t val;
sys/dev/acpica/acpi_hpet.c
322
val = bus_read_4(sc->mem_res, HPET_ISR);
sys/dev/acpica/acpi_hpet.c
323
if (val) {
sys/dev/acpica/acpi_hpet.c
324
bus_write_4(sc->mem_res, HPET_ISR, val);
sys/dev/acpica/acpi_hpet.c
325
val &= sc->useirq;
sys/dev/acpica/acpi_hpet.c
327
if ((val & (1 << i)) == 0)
sys/dev/acpica/acpi_hpet.c
479
uint32_t val, val2, cvectors, dvectors;
sys/dev/acpica/acpi_hpet.c
507
val = bus_read_4(sc->mem_res, HPET_PERIOD);
sys/dev/acpica/acpi_hpet.c
508
if (val == 0) {
sys/dev/acpica/acpi_hpet.c
515
sc->freq = (1000000000000000LL + val / 2) / val;
sys/dev/acpica/acpi_hpet.c
576
val = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER);
sys/dev/acpica/acpi_hpet.c
579
if (val == val2) {
sys/dev/acpica/acpi_perf.c
89
#define PX_SET_REG(reg, val) \
sys/dev/acpica/acpi_perf.c
91
rman_get_bushandle((reg)), 0, (val)))
sys/dev/acpica/acpi_quirk.c
112
switch (match->val) {
sys/dev/acpica/acpi_quirk.c
50
enum val_t val;
sys/dev/acpica/acpi_smbat.c
193
UINT64 val;
sys/dev/acpica/acpi_smbat.c
200
val = addr;
sys/dev/acpica/acpi_smbat.c
202
val, 1);
sys/dev/acpica/acpi_smbat.c
206
val = cmd;
sys/dev/acpica/acpi_smbat.c
208
val, 1);
sys/dev/acpica/acpi_smbat.c
212
val = 0x09; /* | 0x80 if PEC */
sys/dev/acpica/acpi_smbat.c
214
val, 1);
sys/dev/acpica/acpi_smbat.c
223
&val, 1);
sys/dev/acpica/acpi_smbat.c
226
if (val == 0)
sys/dev/acpica/acpi_smbat.c
235
error = ACPI_EC_READ(sc->ec_dev, sc->sb_base_addr + SMBUS_STS, &val, 1);
sys/dev/acpica/acpi_smbat.c
238
if (val & SMBUS_STS_MASK) {
sys/dev/acpica/acpi_smbat.c
240
__FUNCTION__, (int)(val & SMBUS_STS_MASK));
sys/dev/acpica/acpi_smbat.c
246
&val, 2);
sys/dev/acpica/acpi_smbat.c
250
*ptr = val;
sys/dev/acpica/acpi_smbat.c
260
UINT64 val;
sys/dev/acpica/acpi_smbat.c
269
val = addr;
sys/dev/acpica/acpi_smbat.c
271
val, 1);
sys/dev/acpica/acpi_smbat.c
275
val = cmd;
sys/dev/acpica/acpi_smbat.c
277
val, 1);
sys/dev/acpica/acpi_smbat.c
281
val = 0x0B /* | 0x80 if PEC */ ;
sys/dev/acpica/acpi_smbat.c
283
val, 1);
sys/dev/acpica/acpi_smbat.c
292
&val, 1);
sys/dev/acpica/acpi_smbat.c
295
if (val == 0)
sys/dev/acpica/acpi_smbat.c
304
error = ACPI_EC_READ(sc->ec_dev, sc->sb_base_addr + SMBUS_STS, &val, 1);
sys/dev/acpica/acpi_smbat.c
307
if (val & SMBUS_STS_MASK) {
sys/dev/acpica/acpi_smbat.c
309
__FUNCTION__, (int)(val & SMBUS_STS_MASK));
sys/dev/acpica/acpi_smbat.c
316
&val, 1);
sys/dev/acpica/acpi_smbat.c
319
val = (val & 0x1f) + 1;
sys/dev/acpica/acpi_smbat.c
322
if (len > val)
sys/dev/acpica/acpi_smbat.c
323
len = val;
sys/dev/acpica/acpi_smbat.c
330
+ len, &val, 1);
sys/dev/acpica/acpi_smbat.c
334
ptr[len] = val;
sys/dev/acpica/acpi_smbat.c
349
int16_t val;
sys/dev/acpica/acpi_smbat.c
363
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_BATTERY_MODE, &val))
sys/dev/acpica/acpi_smbat.c
365
if (val & SMBATT_BM_CAPACITY_MODE)
sys/dev/acpica/acpi_smbat.c
371
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_BATTERY_STATUS, &val))
sys/dev/acpica/acpi_smbat.c
375
if (val & SMBATT_BS_DISCHARGING)
sys/dev/acpica/acpi_smbat.c
378
if (val & SMBATT_BS_REMAINING_CAPACITY_ALARM)
sys/dev/acpica/acpi_smbat.c
385
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_CURRENT, &val))
sys/dev/acpica/acpi_smbat.c
388
if (val > 0) {
sys/dev/acpica/acpi_smbat.c
389
sc->bst.rate = val * factor;
sys/dev/acpica/acpi_smbat.c
392
} else if (val < 0)
sys/dev/acpica/acpi_smbat.c
393
sc->bst.rate = (-val) * factor;
sys/dev/acpica/acpi_smbat.c
397
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_REMAINING_CAPACITY, &val))
sys/dev/acpica/acpi_smbat.c
399
sc->bst.cap = val * factor;
sys/dev/acpica/acpi_smbat.c
401
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_VOLTAGE, &val))
sys/dev/acpica/acpi_smbat.c
403
sc->bst.volt = val;
sys/dev/acpica/acpi_smbat.c
421
uint16_t val;
sys/dev/acpica/acpi_smbat.c
441
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_BATTERY_MODE, &val))
sys/dev/acpica/acpi_smbat.c
443
if (val & SMBATT_BM_CAPACITY_MODE) {
sys/dev/acpica/acpi_smbat.c
451
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_DESIGN_CAPACITY, &val))
sys/dev/acpica/acpi_smbat.c
453
sc->bix.dcap = val * factor;
sys/dev/acpica/acpi_smbat.c
455
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_FULL_CHARGE_CAPACITY, &val))
sys/dev/acpica/acpi_smbat.c
457
sc->bix.lfcap = val * factor;
sys/dev/acpica/acpi_smbat.c
460
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_DESIGN_VOLTAGE, &val))
sys/dev/acpica/acpi_smbat.c
462
sc->bix.dvol = val;
sys/dev/acpica/acpi_smbat.c
474
if (acpi_smbus_read_2(sc, addr, SMBATT_CMD_SERIAL_NUMBER, &val))
sys/dev/acpica/acpi_smbat.c
476
snprintf(sc->bix.serial, sizeof(sc->bix.serial), "0x%04x", val);
sys/dev/acpica/acpi_thermal.c
138
static void acpi_tz_sanity(struct acpi_tz_softc *sc, int *val, char *what);
sys/dev/acpica/acpi_thermal.c
718
acpi_tz_sanity(struct acpi_tz_softc *sc, int *val, char *what)
sys/dev/acpica/acpi_thermal.c
720
if (*val != -1 && (*val < TZ_ZEROC || *val > TZ_ZEROC + 2000)) {
sys/dev/acpica/acpi_thermal.c
731
what, TZ_KELVTOC(*val));
sys/dev/acpica/acpi_thermal.c
737
*val = -1;
sys/dev/acpica/acpi_thermal.c
833
int val, *val_ptr;
sys/dev/acpica/acpi_thermal.c
838
val = *val_ptr;
sys/dev/acpica/acpi_thermal.c
839
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/acpica/acpi_thermal.c
849
*val_ptr = val;
sys/dev/acpica/acpi_throttle.c
68
#define THR_SET_REG(reg, val) \
sys/dev/acpica/acpi_throttle.c
70
rman_get_bushandle((reg)), 0, (val)))
sys/dev/acpica/acpi_video.c
1017
UINT32 adr, val;
sys/dev/acpica/acpi_video.c
1028
if (acpi_PkgInt32(argset->dod_pkg, i, &val) == 0 &&
sys/dev/acpica/acpi_video.c
1029
(val & DOD_DEVID_MASK_FULL) ==
sys/dev/acpica/acpi_video.c
1031
argset->callback(handle, val, argset->context);
sys/dev/ae/if_ae.c
112
static int ae_miibus_writereg(device_t dev, int phy, int reg, int val);
sys/dev/ae/if_ae.c
1268
uint32_t val;
sys/dev/ae/if_ae.c
1273
val = AE_PHY_READ(sc, AE_PHY_DBG_DATA);
sys/dev/ae/if_ae.c
1274
if (val & AE_PHY_DBG_POWERSAVE) {
sys/dev/ae/if_ae.c
1275
val &= ~AE_PHY_DBG_POWERSAVE;
sys/dev/ae/if_ae.c
1276
AE_PHY_WRITE(sc, AE_PHY_DBG_DATA, val);
sys/dev/ae/if_ae.c
1284
uint32_t val;
sys/dev/ae/if_ae.c
1292
val = AE_PHY_READ(sc, AE_PHY_DBG_DATA);
sys/dev/ae/if_ae.c
1293
AE_PHY_WRITE(sc, AE_PHY_DBG_ADDR, val | 0x1000);
sys/dev/ae/if_ae.c
1304
uint32_t val;
sys/dev/ae/if_ae.c
1330
val = AE_MAC_RX_EN | AE_MAC_CLK_PHY | \
sys/dev/ae/if_ae.c
1339
val |= AE_MAC_FULL_DUPLEX;
sys/dev/ae/if_ae.c
1340
AE_WRITE_4(sc, AE_MAC_REG, val);
sys/dev/ae/if_ae.c
1354
val = AE_READ_4(sc, AE_PCIE_PHYMISC_REG);
sys/dev/ae/if_ae.c
1355
val |= AE_PCIE_PHYMISC_FORCE_RCV_DET;
sys/dev/ae/if_ae.c
1356
AE_WRITE_4(sc, AE_PCIE_PHYMISC_REG, val);
sys/dev/ae/if_ae.c
1357
val = AE_READ_4(sc, AE_PCIE_DLL_TX_CTRL_REG);
sys/dev/ae/if_ae.c
1358
val |= AE_PCIE_DLL_TX_CTRL_SEL_NOR_CLK;
sys/dev/ae/if_ae.c
1359
AE_WRITE_4(sc, AE_PCIE_DLL_TX_CTRL_REG, val);
sys/dev/ae/if_ae.c
1560
uint32_t val;
sys/dev/ae/if_ae.c
1605
val = AE_READ_4(sc, AE_MAC_REG);
sys/dev/ae/if_ae.c
1606
val |= AE_MAC_TX_EN | AE_MAC_RX_EN;
sys/dev/ae/if_ae.c
1607
AE_WRITE_4(sc, AE_MAC_REG, val);
sys/dev/ae/if_ae.c
1615
uint32_t val;
sys/dev/ae/if_ae.c
1623
val = AE_READ_4(sc, AE_MAC_REG);
sys/dev/ae/if_ae.c
1624
if ((val & AE_MAC_RX_EN) != 0) {
sys/dev/ae/if_ae.c
1625
val &= ~AE_MAC_RX_EN;
sys/dev/ae/if_ae.c
1626
AE_WRITE_4(sc, AE_MAC_REG, val);
sys/dev/ae/if_ae.c
1639
val = AE_READ_4(sc, AE_IDLE_REG);
sys/dev/ae/if_ae.c
1640
if ((val & (AE_IDLE_RXMAC | AE_IDLE_DMAWRITE)) == 0)
sys/dev/ae/if_ae.c
1651
uint32_t val;
sys/dev/ae/if_ae.c
1659
val = AE_READ_4(sc, AE_MAC_REG);
sys/dev/ae/if_ae.c
1660
if ((val & AE_MAC_TX_EN) != 0) {
sys/dev/ae/if_ae.c
1661
val &= ~AE_MAC_TX_EN;
sys/dev/ae/if_ae.c
1662
AE_WRITE_4(sc, AE_MAC_REG, val);
sys/dev/ae/if_ae.c
1675
val = AE_READ_4(sc, AE_IDLE_REG);
sys/dev/ae/if_ae.c
1676
if ((val & (AE_IDLE_TXMAC | AE_IDLE_DMAREAD)) == 0)
sys/dev/ae/if_ae.c
1688
uint32_t val;
sys/dev/ae/if_ae.c
1693
val = AE_READ_4(sc, AE_MAC_REG);
sys/dev/ae/if_ae.c
1694
val &= ~AE_MAC_FULL_DUPLEX;
sys/dev/ae/if_ae.c
1698
val |= AE_MAC_FULL_DUPLEX;
sys/dev/ae/if_ae.c
1700
AE_WRITE_4(sc, AE_MAC_REG, val);
sys/dev/ae/if_ae.c
1707
uint32_t val;
sys/dev/ae/if_ae.c
1712
val = AE_READ_4(sc, AE_ISR_REG);
sys/dev/ae/if_ae.c
1713
if (val == 0 || (val & AE_IMR_DEFAULT) == 0)
sys/dev/ae/if_ae.c
1730
uint32_t val;
sys/dev/ae/if_ae.c
1738
val = AE_READ_4(sc, AE_ISR_REG); /* Read interrupt status. */
sys/dev/ae/if_ae.c
1739
if (val == 0) {
sys/dev/ae/if_ae.c
1747
AE_WRITE_4(sc, AE_ISR_REG, val | AE_ISR_DISABLE);
sys/dev/ae/if_ae.c
1750
if_printf(ifp, "Interrupt received: 0x%08x\n", val);
sys/dev/ae/if_ae.c
1754
if ((val & (AE_ISR_DMAR_TIMEOUT | AE_ISR_DMAW_TIMEOUT |
sys/dev/ae/if_ae.c
1761
if ((val & AE_ISR_TX_EVENT) != 0)
sys/dev/ae/if_ae.c
1763
if ((val & AE_ISR_RX_EVENT) != 0)
sys/dev/ae/if_ae.c
194
#define AE_WRITE_4(sc, reg, val) \
sys/dev/ae/if_ae.c
195
bus_write_4((sc)->mem[0], (reg), (val))
sys/dev/ae/if_ae.c
196
#define AE_WRITE_2(sc, reg, val) \
sys/dev/ae/if_ae.c
197
bus_write_2((sc)->mem[0], (reg), (val))
sys/dev/ae/if_ae.c
198
#define AE_WRITE_1(sc, reg, val) \
sys/dev/ae/if_ae.c
199
bus_write_1((sc)->mem[0], (reg), (val))
sys/dev/ae/if_ae.c
1994
uint32_t val;
sys/dev/ae/if_ae.c
1998
val = AE_READ_4(sc, AE_MAC_REG);
sys/dev/ae/if_ae.c
1999
val &= ~AE_MAC_RMVLAN_EN;
sys/dev/ae/if_ae.c
2001
val |= AE_MAC_RMVLAN_EN;
sys/dev/ae/if_ae.c
2002
AE_WRITE_4(sc, AE_MAC_REG, val);
sys/dev/ae/if_ae.c
202
#define AE_PHY_WRITE(sc, reg, val) \
sys/dev/ae/if_ae.c
203
ae_miibus_writereg(sc->dev, 0, reg, val)
sys/dev/ae/if_ae.c
547
uint32_t val;
sys/dev/ae/if_ae.c
572
val = eaddr[2] << 24 | eaddr[3] << 16 | eaddr[4] << 8 | eaddr[5];
sys/dev/ae/if_ae.c
573
AE_WRITE_4(sc, AE_EADDR0_REG, val);
sys/dev/ae/if_ae.c
574
val = eaddr[0] << 8 | eaddr[1];
sys/dev/ae/if_ae.c
575
AE_WRITE_4(sc, AE_EADDR1_REG, val);
sys/dev/ae/if_ae.c
601
val = ((AE_IFG_TXIPG_DEFAULT << AE_IFG_TXIPG_SHIFT) &
sys/dev/ae/if_ae.c
609
AE_WRITE_4(sc, AE_IFG_REG, val);
sys/dev/ae/if_ae.c
614
val = ((AE_HDPX_LCOL_DEFAULT << AE_HDPX_LCOL_SHIFT) &
sys/dev/ae/if_ae.c
622
AE_WRITE_4(sc, AE_HDPX_REG, val);
sys/dev/ae/if_ae.c
628
val = AE_READ_4(sc, AE_MASTER_REG);
sys/dev/ae/if_ae.c
629
val |= AE_MASTER_IMT_EN;
sys/dev/ae/if_ae.c
630
AE_WRITE_4(sc, AE_MASTER_REG, val);
sys/dev/ae/if_ae.c
640
val = if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +
sys/dev/ae/if_ae.c
642
AE_WRITE_2(sc, AE_MTU_REG, val);
sys/dev/ae/if_ae.c
678
val = AE_READ_4(sc, AE_ISR_REG);
sys/dev/ae/if_ae.c
679
if ((val & AE_ISR_PHY_LINKDOWN) != 0) {
sys/dev/ae/if_ae.c
693
val = AE_READ_4(sc, AE_MASTER_REG);
sys/dev/ae/if_ae.c
694
AE_WRITE_4(sc, AE_MASTER_REG, val | AE_MASTER_MANUAL_INT);
sys/dev/ae/if_ae.c
705
val = AE_MAC_TX_CRC_EN | AE_MAC_TX_AUTOPAD |
sys/dev/ae/if_ae.c
711
AE_WRITE_4(sc, AE_MAC_REG, val);
sys/dev/ae/if_ae.c
722
val = AE_READ_4(sc, AE_MAC_REG);
sys/dev/ae/if_ae.c
723
AE_WRITE_4(sc, AE_MAC_REG, val | AE_MAC_TX_EN | AE_MAC_RX_EN);
sys/dev/ae/if_ae.c
789
uint32_t val;
sys/dev/ae/if_ae.c
799
val = ((reg << AE_MDIO_REGADDR_SHIFT) & AE_MDIO_REGADDR_MASK) |
sys/dev/ae/if_ae.c
802
AE_WRITE_4(sc, AE_MDIO_REG, val);
sys/dev/ae/if_ae.c
809
val = AE_READ_4(sc, AE_MDIO_REG);
sys/dev/ae/if_ae.c
810
if ((val & (AE_MDIO_START | AE_MDIO_BUSY)) == 0)
sys/dev/ae/if_ae.c
817
return ((val << AE_MDIO_DATA_SHIFT) & AE_MDIO_DATA_MASK);
sys/dev/ae/if_ae.c
821
ae_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/ae/if_ae.c
837
((val << AE_MDIO_DATA_SHIFT) & AE_MDIO_DATA_MASK);
sys/dev/ae/if_ae.c
906
uint32_t val;
sys/dev/ae/if_ae.c
913
val = AE_READ_4(sc, AE_SPICTL_REG);
sys/dev/ae/if_ae.c
914
if ((val & AE_SPICTL_VPD_EN) != 0) {
sys/dev/ae/if_ae.c
915
val &= ~AE_SPICTL_VPD_EN;
sys/dev/ae/if_ae.c
916
AE_WRITE_4(sc, AE_SPICTL_REG, val);
sys/dev/ae/if_ae.c
925
uint32_t val;
sys/dev/ae/if_ae.c
933
val = 0x100 + reg * 4;
sys/dev/ae/if_ae.c
934
AE_WRITE_4(sc, AE_VPD_CAP_REG, (val << AE_VPD_CAP_ADDR_SHIFT) &
sys/dev/ae/if_ae.c
938
val = AE_READ_4(sc, AE_VPD_CAP_REG);
sys/dev/ae/if_ae.c
939
if ((val & AE_VPD_CAP_DONE) != 0)
sys/dev/ae/if_ae.c
954
uint32_t word, reg, val;
sys/dev/ae/if_ae.c
991
error = ae_vpd_read_word(sc, i, &val);
sys/dev/ae/if_ae.c
995
eaddr[0] = val;
sys/dev/ae/if_ae.c
997
eaddr[1] = val;
sys/dev/age/if_age.c
236
age_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/age/if_age.c
245
(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |
sys/dev/age/if_agevar.h
236
#define CSR_WRITE_4(_sc, reg, val) \
sys/dev/age/if_agevar.h
237
bus_write_4((_sc)->age_res[0], (reg), (val))
sys/dev/age/if_agevar.h
238
#define CSR_WRITE_2(_sc, reg, val) \
sys/dev/age/if_agevar.h
239
bus_write_2((_sc)->age_res[0], (reg), (val))
sys/dev/agp/agp_amd64.c
360
uint32_t val;
sys/dev/agp/agp_amd64.c
362
val = pci_cfgregread(0, 0, sc->mctrl[i], 3, AGP_AMD64_CACHECTRL,
sys/dev/agp/agp_amd64.c
364
val |= AGP_AMD64_CACHECTRL_INVGART;
sys/dev/agp/agp_amd64.c
365
pci_cfgregwrite(0, 0, sc->mctrl[i], 3, AGP_AMD64_CACHECTRL, val,
sys/dev/agp/agp_i810.c
2366
intel_gtt_write(u_int entry, uint32_t val)
sys/dev/agp/agp_i810.c
2371
return (sc->match->driver->write_gtt(intel_agp, entry, val));
sys/dev/agp/agp_i810.h
99
void intel_gtt_write(u_int entry, uint32_t val);
sys/dev/agp/agp_intel.c
395
u_int32_t val;
sys/dev/agp/agp_intel.c
397
val = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4);
sys/dev/agp/agp_intel.c
398
pci_write_config(dev, AGP_INTEL_AGPCTRL, val & ~(1 << 7), 4);
sys/dev/agp/agp_intel.c
399
pci_write_config(dev, AGP_INTEL_AGPCTRL, val, 4);
sys/dev/agp/agp_nvidia.c
285
u_int8_t val;
sys/dev/agp/agp_nvidia.c
299
val = pci_read_config(dev, AGP_NVIDIA_0_APSIZE, 1);
sys/dev/agp/agp_nvidia.c
300
pci_write_config(dev, AGP_NVIDIA_0_APSIZE, ((val & ~0x0f) | key), 1);
sys/dev/agp/agp_via.c
290
u_int32_t apsize, key, val;
sys/dev/agp/agp_via.c
342
val = pci_read_config(dev, sc->regs[REG_APSIZE], 2);
sys/dev/agp/agp_via.c
344
((val & ~0xfff) | key), 2);
sys/dev/ahci/ahci.c
105
ahci_ch_detval(struct ahci_channel *ch, uint32_t val)
sys/dev/ahci/ahci.c
108
return ch->disablephy ? ATA_SC_DET_DISABLE : val;
sys/dev/ahci/ahci.c
1672
uint8_t val;
sys/dev/ahci/ahci.c
1782
val = fis[2];
sys/dev/ahci/ahci.c
1785
if ((val & ATA_S_BUSY) == 0)
sys/dev/ahci/ahci.c
2408
uint32_t val;
sys/dev/ahci/ahci.c
2410
while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) &
sys/dev/ahci/ahci.c
2417
MAX(t, 0) + t0, val);
sys/dev/ahci/ahci.c
2653
uint32_t val, detval;
sys/dev/ahci/ahci.c
2656
val = ATA_INL(ch->r_mem, AHCI_P_CMD);
sys/dev/ahci/ahci.c
2657
val |= AHCI_P_CMD_SUD;
sys/dev/ahci/ahci.c
2658
ATA_OUTL(ch->r_mem, AHCI_P_CMD, val);
sys/dev/ahci/ahci.c
2663
val = ATA_SC_SPD_SPEED_GEN1;
sys/dev/ahci/ahci.c
2665
val = ATA_SC_SPD_SPEED_GEN2;
sys/dev/ahci/ahci.c
2667
val = ATA_SC_SPD_SPEED_GEN3;
sys/dev/ahci/ahci.c
2669
val = 0;
sys/dev/ahci/ahci.c
2672
detval | val |
sys/dev/ahci/ahci.c
2677
detval | val | ((ch->pm_level > 0) ? 0 :
sys/dev/ahci/ahci.c
2681
val = ATA_INL(ch->r_mem, AHCI_P_CMD);
sys/dev/ahci/ahci.c
2682
val &= ~AHCI_P_CMD_SUD;
sys/dev/ahci/ahci.c
2683
ATA_OUTL(ch->r_mem, AHCI_P_CMD, val);
sys/dev/ahci/ahci.c
83
static uint32_t ahci_ch_detval(struct ahci_channel *ch, uint32_t val);
sys/dev/ahci/ahci_fsl_fdt.c
193
uint32_t val;
sys/dev/ahci/ahci_fsl_fdt.c
213
val = ATA_INL(ctrl->r_ecc, AHCI_FSL_REG_ECC);
sys/dev/ahci/ahci_fsl_fdt.c
214
val = AHCI_FSL_REG_ECC_LS1043A;
sys/dev/ahci/ahci_fsl_fdt.c
215
ATA_OUTL(ctrl->r_ecc, AHCI_FSL_REG_ECC, val);
sys/dev/ahci/ahci_fsl_fdt.c
226
val = ATA_INL(ctrl->r_ecc, AHCI_FSL_REG_ECC);
sys/dev/ahci/ahci_fsl_fdt.c
227
val |= AHCI_FSL_REG_ECC_LS1028A;
sys/dev/ahci/ahci_fsl_fdt.c
228
ATA_OUTL(ctrl->r_ecc, AHCI_FSL_REG_ECC, val);
sys/dev/ahci/ahciem.c
294
int16_t val;
sys/dev/ahci/ahciem.c
300
val = 0;
sys/dev/ahci/ahciem.c
302
val |= (1 << 0);
sys/dev/ahci/ahciem.c
304
val |= (1 << 6) | (1 << 3);
sys/dev/ahci/ahciem.c
306
val |= (1 << 3);
sys/dev/ahci/ahciem.c
308
val |= (1 << 6);
sys/dev/ahci/ahciem.c
317
ATA_OUTL(enc->r_memt, 4, c | (0 << 8) | (val << 16));
sys/dev/al_eth/al_eth.c
473
al_eth_fpga_read_pci_config(void *handle, int where, uint32_t *val)
sys/dev/al_eth/al_eth.c
477
*val = al_reg_read32((void*)((u_long)handle + where));
sys/dev/al_eth/al_eth.c
483
al_eth_fpga_write_pci_config(void *handle, int where, uint32_t val)
sys/dev/al_eth/al_eth.c
487
al_reg_write32((void*)((u_long)handle + where), val);
sys/dev/al_eth/al_eth.c
492
al_eth_read_pci_config(void *handle, int where, uint32_t *val)
sys/dev/al_eth/al_eth.c
496
*val = pci_read_config((device_t)handle, where, sizeof(*val));
sys/dev/al_eth/al_eth.c
501
al_eth_write_pci_config(void *handle, int where, uint32_t val)
sys/dev/al_eth/al_eth.c
505
pci_write_config((device_t)handle, where, val, sizeof(val));
sys/dev/al_eth/al_eth.c
701
uint32_t val;
sys/dev/al_eth/al_eth.c
711
val = AL_ETH_FSM_DATA_OUTER_4_TUPLE |
sys/dev/al_eth/al_eth.c
716
val = AL_ETH_FSM_DATA_OUTER_2_TUPLE |
sys/dev/al_eth/al_eth.c
720
val = AL_ETH_FSM_DATA_DEFAULT_Q |
sys/dev/al_eth/al_eth.c
723
al_eth_fsm_table_set(&adapter->hal_adapter, i, val);
sys/dev/al_eth/al_init_eth_kr.c
421
unsigned int val;
sys/dev/al_eth/al_init_eth_kr.c
492
&val);
sys/dev/al_eth/al_init_eth_kr.c
499
al_dbg("%s: Rx Measure eye returned 0x%x\n", __func__, val);
sys/dev/al_eth/al_init_eth_kr.c
505
kr_data->qarray[QARRAY_SIZE-1] = val;
sys/dev/al_eth/al_init_eth_lm.c
1506
al_eth_lm_mode_convert_to_str(enum al_eth_lm_link_mode val)
sys/dev/al_eth/al_init_eth_lm.c
1509
switch (val) {
sys/dev/al_eth/al_init_eth_lm.h
174
uint8_t reg_addr, uint8_t *val);
sys/dev/al_eth/al_init_eth_lm.h
176
uint8_t reg_addr, uint8_t val);
sys/dev/al_eth/al_init_eth_lm.h
252
uint8_t reg_addr, uint8_t *val);
sys/dev/al_eth/al_init_eth_lm.h
254
uint8_t reg_addr, uint8_t val);
sys/dev/al_eth/al_init_eth_lm.h
363
const char *al_eth_lm_mode_convert_to_str(enum al_eth_lm_link_mode val);
sys/dev/alc/if_alc.c
1018
uint32_t val;
sys/dev/alc/if_alc.c
1020
val = CSR_READ_4(sc, ALC_GPHY_CFG);
sys/dev/alc/if_alc.c
1021
val &= ~(GPHY_CFG_EXT_RESET | GPHY_CFG_LED_MODE |
sys/dev/alc/if_alc.c
1024
val |= GPHY_CFG_SEL_ANA_RESET;
sys/dev/alc/if_alc.c
1026
val |= GPHY_CFG_HIB_PULSE | GPHY_CFG_HIB_EN | GPHY_CFG_SEL_ANA_RESET;
sys/dev/alc/if_alc.c
1029
val &= ~(GPHY_CFG_HIB_PULSE | GPHY_CFG_HIB_EN);
sys/dev/alc/if_alc.c
1031
CSR_WRITE_4(sc, ALC_GPHY_CFG, val);
sys/dev/alc/if_alc.c
1033
CSR_WRITE_4(sc, ALC_GPHY_CFG, val | GPHY_CFG_EXT_RESET);
sys/dev/alc/if_alc.c
1052
val = CSR_READ_4(sc, ALC_LPI_CTL);
sys/dev/alc/if_alc.c
1053
val &= ~LPI_CTL_ENB;
sys/dev/alc/if_alc.c
1054
CSR_WRITE_4(sc, ALC_LPI_CTL, val);
sys/dev/alc/if_alc.c
1062
val = alc_miidbg_readreg(sc, MII_DBG_GREENCFG2);
sys/dev/alc/if_alc.c
1063
val &= ~DBG_GREENCFG2_GATE_DFSE_EN;
sys/dev/alc/if_alc.c
1064
alc_miidbg_writereg(sc, MII_DBG_GREENCFG2, val);
sys/dev/alc/if_alc.c
1074
val = alc_miiext_readreg(sc, MII_EXT_PCS, MII_EXT_CLDCTL3);
sys/dev/alc/if_alc.c
1075
val |= EXT_CLDCTL3_BP_CABLE1TH_DET_GT;
sys/dev/alc/if_alc.c
1076
alc_miiext_writereg(sc, MII_EXT_PCS, MII_EXT_CLDCTL3, val);
sys/dev/alc/if_alc.c
1078
val = alc_miidbg_readreg(sc, MII_DBG_GREENCFG2);
sys/dev/alc/if_alc.c
1079
val |= DBG_GREENCFG2_BP_GREEN;
sys/dev/alc/if_alc.c
1080
alc_miidbg_writereg(sc, MII_DBG_GREENCFG2, val);
sys/dev/alc/if_alc.c
1082
val = alc_miiext_readreg(sc, MII_EXT_PCS, MII_EXT_CLDCTL5);
sys/dev/alc/if_alc.c
1083
val |= EXT_CLDCTL5_BP_VD_HLFBIAS;
sys/dev/alc/if_alc.c
1084
alc_miiext_writereg(sc, MII_EXT_PCS, MII_EXT_CLDCTL5, val);
sys/dev/alc/if_alc.c
1274
uint32_t cap, ctl, val;
sys/dev/alc/if_alc.c
1278
val = CSR_READ_4(sc, ALC_PEX_UNC_ERR_SEV);
sys/dev/alc/if_alc.c
1279
val &= ~(PEX_UNC_ERR_SEV_DLP | PEX_UNC_ERR_SEV_FCP);
sys/dev/alc/if_alc.c
1280
CSR_WRITE_4(sc, ALC_PEX_UNC_ERR_SEV, val);
sys/dev/alc/if_alc.c
1290
val = CSR_READ_4(sc, ALC_PCIE_PHYMISC2);
sys/dev/alc/if_alc.c
1291
val &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK |
sys/dev/alc/if_alc.c
1293
val |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
sys/dev/alc/if_alc.c
1294
val |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
sys/dev/alc/if_alc.c
1295
CSR_WRITE_4(sc, ALC_PCIE_PHYMISC2, val);
sys/dev/alc/if_alc.c
1322
val = CSR_READ_4(sc, ALC_PDLL_TRNS1);
sys/dev/alc/if_alc.c
1323
val &= ~PDLL_TRNS1_D3PLLOFF_ENB;
sys/dev/alc/if_alc.c
1324
CSR_WRITE_4(sc, ALC_PDLL_TRNS1, val);
sys/dev/alc/if_alc.c
1325
val = CSR_READ_4(sc, ALC_MASTER_CFG);
sys/dev/alc/if_alc.c
1328
if ((val & MASTER_WAKEN_25M) == 0 ||
sys/dev/alc/if_alc.c
1329
(val & MASTER_CLK_SEL_DIS) == 0) {
sys/dev/alc/if_alc.c
1330
val |= MASTER_WAKEN_25M | MASTER_CLK_SEL_DIS;
sys/dev/alc/if_alc.c
1331
CSR_WRITE_4(sc, ALC_MASTER_CFG, val);
sys/dev/alc/if_alc.c
1334
if ((val & MASTER_WAKEN_25M) == 0 ||
sys/dev/alc/if_alc.c
1335
(val & MASTER_CLK_SEL_DIS) != 0) {
sys/dev/alc/if_alc.c
1336
val |= MASTER_WAKEN_25M;
sys/dev/alc/if_alc.c
1337
val &= ~MASTER_CLK_SEL_DIS;
sys/dev/alc/if_alc.c
1338
CSR_WRITE_4(sc, ALC_MASTER_CFG, val);
sys/dev/alc/if_alc.c
348
alc_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/alc/if_alc.c
355
v = alc_mii_writereg_816x(sc, phy, reg, val);
sys/dev/alc/if_alc.c
357
v = alc_mii_writereg_813x(sc, phy, reg, val);
sys/dev/alc/if_alc.c
362
alc_mii_writereg_813x(struct alc_softc *sc, int phy, int reg, int val)
sys/dev/alc/if_alc.c
368
(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |
sys/dev/alc/if_alc.c
384
alc_mii_writereg_816x(struct alc_softc *sc, int phy, int reg, int val)
sys/dev/alc/if_alc.c
394
((val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT) | MDIO_REG_ADDR(reg) |
sys/dev/alc/if_alc.c
468
alc_miidbg_writereg(struct alc_softc *sc, int reg, int val)
sys/dev/alc/if_alc.c
474
ALC_MII_DBG_DATA, val));
sys/dev/alc/if_alc.c
508
alc_miiext_writereg(struct alc_softc *sc, int devaddr, int reg, int val)
sys/dev/alc/if_alc.c
520
((val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT) |
sys/dev/alc/if_alc.c
539
uint16_t agc, len, val;
sys/dev/alc/if_alc.c
562
val = alc_miiext_readreg(sc, MII_EXT_ANEG,
sys/dev/alc/if_alc.c
564
val |= ANEG_AFEE_10BT_100M_TH;
sys/dev/alc/if_alc.c
566
val);
sys/dev/alc/if_alc.c
570
val = alc_miiext_readreg(sc, MII_EXT_ANEG,
sys/dev/alc/if_alc.c
572
val &= ~ANEG_AFEE_10BT_100M_TH;
sys/dev/alc/if_alc.c
574
val);
sys/dev/alc/if_alc.c
583
val = alc_miidbg_readreg(sc, MII_DBG_MSE20DB);
sys/dev/alc/if_alc.c
584
val &= ~DBG_MSE20DB_TH_MASK;
sys/dev/alc/if_alc.c
585
val |= (DBG_MSE20DB_TH_HI <<
sys/dev/alc/if_alc.c
587
alc_miidbg_writereg(sc, MII_DBG_MSE20DB, val);
sys/dev/alc/if_alc.c
593
val = alc_miiext_readreg(sc, MII_EXT_ANEG, MII_EXT_ANEG_AFE);
sys/dev/alc/if_alc.c
594
val &= ~ANEG_AFEE_10BT_100M_TH;
sys/dev/alc/if_alc.c
595
alc_miiext_writereg(sc, MII_EXT_ANEG, MII_EXT_ANEG_AFE, val);
sys/dev/alc/if_alc.c
600
val = alc_miidbg_readreg(sc, MII_DBG_MSE20DB);
sys/dev/alc/if_alc.c
601
val &= ~DBG_MSE20DB_TH_MASK;
sys/dev/alc/if_alc.c
602
val |= (DBG_MSE20DB_TH_DEFAULT << DBG_MSE20DB_TH_SHIFT);
sys/dev/alc/if_alc.c
603
alc_miidbg_writereg(sc, MII_DBG_MSE20DB, val);
sys/dev/alc/if_alc.c
703
uint16_t val;
sys/dev/alc/if_alc.c
731
val = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr,
sys/dev/alc/if_alc.c
734
ALC_MII_DBG_DATA, val & 0xFF7F);
sys/dev/alc/if_alc.c
737
val = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr,
sys/dev/alc/if_alc.c
740
ALC_MII_DBG_DATA, val | 0x0008);
sys/dev/alc/if_alc.c
782
val = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr,
sys/dev/alc/if_alc.c
785
ALC_MII_DBG_DATA, val | 0x0080);
sys/dev/alc/if_alc.c
788
val = alc_miibus_readreg(sc->alc_dev, sc->alc_phyaddr,
sys/dev/alc/if_alc.c
791
ALC_MII_DBG_DATA, val & 0xFFF7);
sys/dev/alc/if_alcvar.h
259
#define CSR_WRITE_4(_sc, reg, val) \
sys/dev/alc/if_alcvar.h
260
bus_write_4((_sc)->alc_res[0], (reg), (val))
sys/dev/alc/if_alcvar.h
261
#define CSR_WRITE_2(_sc, reg, val) \
sys/dev/alc/if_alcvar.h
262
bus_write_2((_sc)->alc_res[0], (reg), (val))
sys/dev/alc/if_alcvar.h
263
#define CSR_WRITE_1(_sc, reg, val) \
sys/dev/alc/if_alcvar.h
264
bus_write_1((_sc)->alc_res[0], (reg), (val))
sys/dev/ale/if_ale.c
227
ale_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/ale/if_ale.c
236
(val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |
sys/dev/ale/if_alevar.h
228
#define CSR_WRITE_4(_sc, reg, val) \
sys/dev/ale/if_alevar.h
229
bus_write_4((_sc)->ale_res[0], (reg), (val))
sys/dev/ale/if_alevar.h
230
#define CSR_WRITE_2(_sc, reg, val) \
sys/dev/ale/if_alevar.h
231
bus_write_2((_sc)->ale_res[0], (reg), (val))
sys/dev/ale/if_alevar.h
232
#define CSR_WRITE_1(_sc, reg, val) \
sys/dev/ale/if_alevar.h
233
bus_write_1((_sc)->ale_res[0], (reg), (val))
sys/dev/amd_ecc_inject/ecc_inject.c
156
uint32_t val;
sys/dev/amd_ecc_inject/ecc_inject.c
159
val = DRAM_ECC_SEL | (quadrant << QUADRANT_SHIFT);
sys/dev/amd_ecc_inject/ecc_inject.c
160
pci_write_config(nbdev, NB_ARRAY_ADDR, val, 4);
sys/dev/amd_ecc_inject/ecc_inject.c
162
val = (word_mask << INJ_WORD_SHIFT) | DRAM_WR_REQ | bit_mask;
sys/dev/amd_ecc_inject/ecc_inject.c
163
pci_write_config(nbdev, NB_ARRAY_PORT, val, 4);
sys/dev/amd_ecc_inject/ecc_inject.c
167
val = pci_read_config(nbdev, NB_ARRAY_PORT, 4);
sys/dev/amd_ecc_inject/ecc_inject.c
168
if ((val & DRAM_WR_REQ) == 0)
sys/dev/amd_ecc_inject/ecc_inject.c
203
uint32_t val;
sys/dev/amd_ecc_inject/ecc_inject.c
215
val = pci_read_config(nbdev, NB_MCA_CFG, 4);
sys/dev/amd_ecc_inject/ecc_inject.c
216
if ((val & DRAM_ECC_EN) == 0) {
sys/dev/amdgpio/amdgpio.c
203
uint32_t reg, val;
sys/dev/amdgpio/amdgpio.c
230
val = amdgpio_read_4(sc, reg);
sys/dev/amdgpio/amdgpio.c
233
val &= ~BIT(OUTPUT_ENABLE_OFF);
sys/dev/amdgpio/amdgpio.c
235
val |= BIT(OUTPUT_ENABLE_OFF);
sys/dev/amdgpio/amdgpio.c
237
val &= ~(BIT(PULL_DOWN_ENABLE_OFF) | BIT(PULL_UP_ENABLE_OFF));
sys/dev/amdgpio/amdgpio.c
240
val |= BIT(PULL_DOWN_ENABLE_OFF);
sys/dev/amdgpio/amdgpio.c
242
val |= BIT(PULL_UP_ENABLE_OFF);
sys/dev/amdgpio/amdgpio.c
244
amdgpio_write_4(sc, reg, val);
sys/dev/amdgpio/amdgpio.c
248
pin, flags, val, sc->sc_gpio_pins[pin].gp_flags);
sys/dev/amdgpio/amdgpio.c
259
uint32_t reg, val;
sys/dev/amdgpio/amdgpio.c
272
val = amdgpio_read_4(sc, reg);
sys/dev/amdgpio/amdgpio.c
275
if (val & BIT(OUTPUT_VALUE_OFF))
sys/dev/amdgpio/amdgpio.c
280
if (val & BIT(PIN_STS_OFF))
sys/dev/amdgpio/amdgpio.c
297
uint32_t reg, val;
sys/dev/amdgpio/amdgpio.c
311
val = amdgpio_read_4(sc, reg);
sys/dev/amdgpio/amdgpio.c
314
val &= ~BIT(OUTPUT_VALUE_OFF);
sys/dev/amdgpio/amdgpio.c
316
val |= BIT(OUTPUT_VALUE_OFF);
sys/dev/amdgpio/amdgpio.c
318
amdgpio_write_4(sc, reg, val);
sys/dev/amdgpio/amdgpio.c
320
dprintf("pin %d value 0x%x val 0x%x\n", pin, value, val);
sys/dev/amdgpio/amdgpio.c
331
uint32_t reg, val;
sys/dev/amdgpio/amdgpio.c
346
val = amdgpio_read_4(sc, reg);
sys/dev/amdgpio/amdgpio.c
347
dprintf("pin %d value before 0x%x\n", pin, val);
sys/dev/amdgpio/amdgpio.c
348
val = val ^ BIT(OUTPUT_VALUE_OFF);
sys/dev/amdgpio/amdgpio.c
349
dprintf("pin %d value after 0x%x\n", pin, val);
sys/dev/amdgpio/amdgpio.c
350
amdgpio_write_4(sc, reg, val);
sys/dev/amdgpio/amdgpio.c
74
uint32_t val)
sys/dev/amdgpio/amdgpio.c
76
bus_write_4(sc->sc_res[0], off, val);
sys/dev/amdgpio/amdgpio.c
82
uint32_t reg, val;
sys/dev/amdgpio/amdgpio.c
89
val = amdgpio_read_4(sc, reg);
sys/dev/amdgpio/amdgpio.c
91
if (val & BIT(OUTPUT_ENABLE_OFF))
sys/dev/amdsbwd/amdsbwd.c
140
pmio_write(struct resource *res, uint8_t reg, uint8_t val)
sys/dev/amdsbwd/amdsbwd.c
143
bus_write_1(res, 1, val); /* Data */
sys/dev/amdsbwd/amdsbwd.c
153
wdctrl_write(struct amdsbwd_softc *sc, uint32_t val)
sys/dev/amdsbwd/amdsbwd.c
155
bus_write_4(sc->res_ctrl, 0, val);
sys/dev/amdsbwd/amdsbwd.c
165
wdcount_write(struct amdsbwd_softc *sc, uint32_t val)
sys/dev/amdsbwd/amdsbwd.c
167
bus_write_4(sc->res_count, 0, val);
sys/dev/amdsbwd/amdsbwd.c
173
uint32_t val;
sys/dev/amdsbwd/amdsbwd.c
175
val = wdctrl_read(sc);
sys/dev/amdsbwd/amdsbwd.c
176
val |= AMDSB_WD_RUN;
sys/dev/amdsbwd/amdsbwd.c
177
wdctrl_write(sc, val);
sys/dev/amdsbwd/amdsbwd.c
185
uint32_t val;
sys/dev/amdsbwd/amdsbwd.c
187
val = wdctrl_read(sc);
sys/dev/amdsbwd/amdsbwd.c
188
val &= ~AMDSB_WD_RUN;
sys/dev/amdsbwd/amdsbwd.c
189
wdctrl_write(sc, val);
sys/dev/amdsbwd/amdsbwd.c
197
uint32_t val;
sys/dev/amdsbwd/amdsbwd.c
199
val = wdctrl_read(sc);
sys/dev/amdsbwd/amdsbwd.c
200
val |= AMDSB_WD_RELOAD;
sys/dev/amdsbwd/amdsbwd.c
201
wdctrl_write(sc, val);
sys/dev/amdsbwd/amdsbwd.c
283
uint8_t val;
sys/dev/amdsbwd/amdsbwd.c
287
val = pmio_read(pmres, AMDSB_PM_RESET_STATUS0);
sys/dev/amdsbwd/amdsbwd.c
288
if (val != 0)
sys/dev/amdsbwd/amdsbwd.c
289
amdsbwd_verbose_printf(dev, "ResetStatus0 = %#04x\n", val);
sys/dev/amdsbwd/amdsbwd.c
290
val = pmio_read(pmres, AMDSB_PM_RESET_STATUS1);
sys/dev/amdsbwd/amdsbwd.c
291
if (val != 0)
sys/dev/amdsbwd/amdsbwd.c
292
amdsbwd_verbose_printf(dev, "ResetStatus1 = %#04x\n", val);
sys/dev/amdsbwd/amdsbwd.c
293
if ((val & AMDSB_WD_RST_STS) != 0)
sys/dev/amdsbwd/amdsbwd.c
304
val = pmio_read(pmres, AMDSB_PM_WDT_CTRL);
sys/dev/amdsbwd/amdsbwd.c
305
val &= ~AMDSB_WDT_RES_MASK;
sys/dev/amdsbwd/amdsbwd.c
306
val |= AMDSB_WDT_RES_1S;
sys/dev/amdsbwd/amdsbwd.c
307
pmio_write(pmres, AMDSB_PM_WDT_CTRL, val);
sys/dev/amdsbwd/amdsbwd.c
310
val = pmio_read(pmres, AMDSB_PM_WDT_CTRL);
sys/dev/amdsbwd/amdsbwd.c
311
val &= ~AMDSB_WDT_DISABLE;
sys/dev/amdsbwd/amdsbwd.c
312
pmio_write(pmres, AMDSB_PM_WDT_CTRL, val);
sys/dev/amdsbwd/amdsbwd.c
324
uint32_t val;
sys/dev/amdsbwd/amdsbwd.c
329
val = pmio_read(pmres, AMDSB8_PM_RESET_CTRL);
sys/dev/amdsbwd/amdsbwd.c
330
if ((val & AMDSB8_RST_STS_DIS) != 0) {
sys/dev/amdsbwd/amdsbwd.c
331
val &= ~AMDSB8_RST_STS_DIS;
sys/dev/amdsbwd/amdsbwd.c
332
pmio_write(pmres, AMDSB8_PM_RESET_CTRL, val);
sys/dev/amdsbwd/amdsbwd.c
334
val = 0;
sys/dev/amdsbwd/amdsbwd.c
336
val <<= 8;
sys/dev/amdsbwd/amdsbwd.c
337
val |= pmio_read(pmres, AMDSB8_PM_RESET_STATUS + i);
sys/dev/amdsbwd/amdsbwd.c
339
if (val != 0)
sys/dev/amdsbwd/amdsbwd.c
340
amdsbwd_verbose_printf(dev, "ResetStatus = 0x%08x\n", val);
sys/dev/amdsbwd/amdsbwd.c
341
if ((val & AMDSB8_WD_RST_STS) != 0)
sys/dev/amdsbwd/amdsbwd.c
352
val = pmio_read(pmres, AMDSB8_PM_WDT_CTRL);
sys/dev/amdsbwd/amdsbwd.c
353
val &= ~AMDSB8_WDT_RES_MASK;
sys/dev/amdsbwd/amdsbwd.c
354
val |= AMDSB8_WDT_1HZ;
sys/dev/amdsbwd/amdsbwd.c
355
pmio_write(pmres, AMDSB8_PM_WDT_CTRL, val);
sys/dev/amdsbwd/amdsbwd.c
357
val = pmio_read(pmres, AMDSB8_PM_WDT_CTRL);
sys/dev/amdsbwd/amdsbwd.c
358
amdsbwd_verbose_printf(dev, "AMDSB8_PM_WDT_CTRL value = %#04x\n", val);
sys/dev/amdsbwd/amdsbwd.c
365
val = pmio_read(pmres, AMDSB8_PM_WDT_EN);
sys/dev/amdsbwd/amdsbwd.c
366
val &= ~AMDSB8_WDT_DISABLE;
sys/dev/amdsbwd/amdsbwd.c
367
val |= AMDSB8_WDT_DEC_EN;
sys/dev/amdsbwd/amdsbwd.c
368
pmio_write(pmres, AMDSB8_PM_WDT_EN, val);
sys/dev/amdsbwd/amdsbwd.c
370
val = pmio_read(pmres, AMDSB8_PM_WDT_EN);
sys/dev/amdsbwd/amdsbwd.c
371
device_printf(dev, "AMDSB8_PM_WDT_EN value = %#04x\n", val);
sys/dev/amdsbwd/amdsbwd.c
379
uint8_t val;
sys/dev/amdsbwd/amdsbwd.c
384
val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN0);
sys/dev/amdsbwd/amdsbwd.c
385
val |= AMDFCH41_WDT_EN;
sys/dev/amdsbwd/amdsbwd.c
386
pmio_write(pmres, AMDFCH41_PM_DECODE_EN0, val);
sys/dev/amdsbwd/amdsbwd.c
388
val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN0);
sys/dev/amdsbwd/amdsbwd.c
389
device_printf(dev, "AMDFCH41_PM_DECODE_EN0 value = %#04x\n", val);
sys/dev/amdsbwd/amdsbwd.c
392
val = pmio_read(pmres, AMDFCH41_PM_ISA_CTRL);
sys/dev/amdsbwd/amdsbwd.c
393
if ((val & AMDFCH41_MMIO_EN) != 0) {
sys/dev/amdsbwd/amdsbwd.c
406
val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN3);
sys/dev/amdsbwd/amdsbwd.c
407
val &= ~AMDFCH41_WDT_RES_MASK;
sys/dev/amdsbwd/amdsbwd.c
408
val |= AMDFCH41_WDT_RES_1S;
sys/dev/amdsbwd/amdsbwd.c
409
val &= ~AMDFCH41_WDT_EN_MASK;
sys/dev/amdsbwd/amdsbwd.c
410
val |= AMDFCH41_WDT_ENABLE;
sys/dev/amdsbwd/amdsbwd.c
411
pmio_write(pmres, AMDFCH41_PM_DECODE_EN3, val);
sys/dev/amdsbwd/amdsbwd.c
413
val = pmio_read(pmres, AMDFCH41_PM_DECODE_EN3);
sys/dev/amdsbwd/amdsbwd.c
415
val);
sys/dev/amdsbwd/amdsbwd.c
571
uint32_t val;
sys/dev/amdsbwd/amdsbwd.c
574
val = wdctrl_read(sc);
sys/dev/amdsbwd/amdsbwd.c
575
val &= ~AMDSB_WD_RUN;
sys/dev/amdsbwd/amdsbwd.c
576
wdctrl_write(sc, val);
sys/dev/amdsmu/amdsmu.h
108
amdsmu_write4(const struct amdsmu_softc *sc, bus_size_t reg, uint32_t val)
sys/dev/amdsmu/amdsmu.h
110
bus_space_write_4(sc->bus_tag, sc->reg_space, reg, val);
sys/dev/amdtemp/amdtemp.c
743
amdtemp_decode_fam10h_to_17h(int32_t sc_offset, uint32_t val, bool minus49)
sys/dev/amdtemp/amdtemp.c
748
temp = (val & AMDTEMP_REPTMP10H_CURTMP_MASK) * 5 / 4;
sys/dev/amdtemp/amdtemp.c
758
amdtemp_decode_fam10h_to_16h(int32_t sc_offset, uint32_t val)
sys/dev/amdtemp/amdtemp.c
768
((val >> AMDTEMP_REPTMP10H_TJSEL_SHIFT) &
sys/dev/amdtemp/amdtemp.c
772
val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49));
sys/dev/amdtemp/amdtemp.c
776
amdtemp_decode_fam17h_tctl(int32_t sc_offset, uint32_t val)
sys/dev/amdtemp/amdtemp.c
780
minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0)
sys/dev/amdtemp/amdtemp.c
781
|| ((val & AMDTEMP_17H_CUR_TMP_TJ_SEL) == AMDTEMP_17H_CUR_TMP_TJ_SEL);
sys/dev/amdtemp/amdtemp.c
783
val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49));
sys/dev/amdtemp/amdtemp.c
800
uint32_t val;
sys/dev/amdtemp/amdtemp.c
803
error = amdsmn_read(sc->sc_smn, AMDTEMP_15H_M60H_REPTMP_CTRL, &val);
sys/dev/amdtemp/amdtemp.c
805
return (amdtemp_decode_fam10h_to_16h(sc->sc_offset, val));
sys/dev/amdtemp/amdtemp.c
812
uint32_t val;
sys/dev/amdtemp/amdtemp.c
818
error = amdsmn_read(sc->sc_smn, AMDTEMP_17H_CUR_TMP, &val);
sys/dev/amdtemp/amdtemp.c
820
return (amdtemp_decode_fam17h_tctl(sc->sc_offset, val));
sys/dev/amdtemp/amdtemp.c
824
(((int)sensor - CCD_BASE) * sizeof(val)), &val);
sys/dev/amdtemp/amdtemp.c
826
KASSERT((val & AMDTEMP_17H_CCD_TMP_VALID) != 0,
sys/dev/amdtemp/amdtemp.c
828
return (amdtemp_decode_fam10h_to_17h(sc->sc_offset, val, true));
sys/dev/amdtemp/amdtemp.c
839
uint32_t i, val;
sys/dev/amdtemp/amdtemp.c
845
(i * sizeof(val)), &val);
sys/dev/amdtemp/amdtemp.c
848
if ((val & AMDTEMP_17H_CCD_TMP_VALID) == 0)
sys/dev/aq/aq_fw1x.c
212
state.mode, state.speed, state.val);
sys/dev/aq/aq_fw1x.c
214
AQ_WRITE_REG(hw, FW1X_MPI_CONTROL_ADR, state.val);
sys/dev/aq/aq_fw1x.c
223
union fw1x_state_reg state = { .val = AQ_READ_REG(hw, AQ_HW_MPI_STATE_ADR) };
sys/dev/aq/aq_fw1x.c
226
state.val, AQ_READ_REG(hw, AQ_HW_MPI_CONTROL_ADR));
sys/dev/aq/aq_fw1x.c
70
uint32_t val;
sys/dev/aq/aq_hw.c
471
uint32_t val = (8U < HW_ATL_B0_LRO_RXD_MAX) ? 0x3U :
sys/dev/aq/aq_hw.c
476
rpo_lro_max_num_of_descriptors_set(hw, val, i);
sys/dev/aq/aq_hw.c
61
uint32_t val = reg_glb_mif_id_get(hw);
sys/dev/aq/aq_hw.c
62
uint32_t mif_rev = val & 0xFFU;
sys/dev/aq/aq_hw.c
628
uint32_t val = 0;
sys/dev/aq/aq_hw.c
633
val = AQ_READ_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR);
sys/dev/aq/aq_hw.c
634
AQ_WRITE_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR, (val & ~0x707) | 0x404);
sys/dev/aq/aq_hw_llh.c
1175
hw_atl_rpf_l3_l4_enf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1179
HW_ATL_RPF_L3_L4_ENF_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1183
hw_atl_rpf_l3_v6_enf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1187
HW_ATL_RPF_L3_V6_ENF_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1191
hw_atl_rpf_l3_saf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1195
HW_ATL_RPF_L3_SAF_EN_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1199
hw_atl_rpf_l3_daf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1203
HW_ATL_RPF_L3_DAF_EN_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1207
hw_atl_rpf_l4_spf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1211
HW_ATL_RPF_L4_SPF_EN_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1215
hw_atl_rpf_l4_dpf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1219
HW_ATL_RPF_L4_DPF_EN_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1223
hw_atl_rpf_l4_protf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1227
HW_ATL_RPF_L4_PROTF_EN_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1231
hw_atl_rpf_l3_arpf_en_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1235
HW_ATL_RPF_L3_ARPF_EN_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1239
hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw_s *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.c
1244
HW_ATL_RPF_L3_L4_RXQF_EN_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1248
hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw_s *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.c
1253
HW_ATL_RPF_L3_L4_MNG_RXQF_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1257
hw_atl_rpf_l3_l4_actf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1261
HW_ATL_RPF_L3_L4_ACTF_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1265
hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1269
HW_ATL_RPF_L3_L4_RXQF_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1273
hw_atl_rpf_l4_protf_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1277
HW_ATL_RPF_L4_PROTF_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1281
hw_atl_rpf_l4_spd_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1285
HW_ATL_RPF_L4_SPD_SHIFT, val);
sys/dev/aq/aq_hw_llh.c
1289
hw_atl_rpf_l4_dpd_set(struct aq_hw_s *aq_hw, uint32_t val, uint32_t filter)
sys/dev/aq/aq_hw_llh.c
1293
HW_ATL_RPF_L4_DPD_SHIFT, val);
sys/dev/aq/aq_hw_llh.h
1152
void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1156
void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1160
void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1164
void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1168
void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1172
void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1176
void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1180
void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1184
void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1188
void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1192
void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1196
void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1200
void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
1204
void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter);
sys/dev/aq/aq_hw_llh.h
1207
void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter);
sys/dev/aq/aq_hw_llh.h
623
void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
627
void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
631
void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
635
void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
639
void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
643
void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
647
void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
651
void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
655
void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
659
void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
663
void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
667
void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
671
void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
675
void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter);
sys/dev/aq/aq_hw_llh.h
678
void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter);
sys/dev/aq/aq_hw_llh.h
740
void hw_atl_rpf_l3_l4_enf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
744
void hw_atl_rpf_l3_v6_enf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
748
void hw_atl_rpf_l3_saf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
752
void hw_atl_rpf_l3_daf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
756
void hw_atl_rpf_l4_spf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
760
void hw_atl_rpf_l4_dpf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
764
void hw_atl_rpf_l4_protf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
768
void hw_atl_rpf_l3_arpf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
772
void hw_atl_rpf_l3_l4_rxqf_en_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
776
void hw_atl_rpf_l3_l4_mng_rxqf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
780
void hw_atl_rpf_l3_l4_actf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
784
void hw_atl_rpf_l3_l4_rxqf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
788
void hw_atl_rpf_l4_protf_set(struct aq_hw *aq_hw, uint32_t val,
sys/dev/aq/aq_hw_llh.h
792
void hw_atl_rpf_l4_spd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter);
sys/dev/aq/aq_hw_llh.h
795
void hw_atl_rpf_l4_dpd_set(struct aq_hw *aq_hw, uint32_t val, uint32_t filter);
sys/dev/aq/aq_main.c
1201
unsigned int val;
sys/dev/aq/aq_main.c
1206
val = tdm_tx_desc_head_ptr_get(&ring->dev->hw, ring->index);
sys/dev/aq/aq_main.c
1208
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/aq/aq_main.c
1220
unsigned int val;
sys/dev/aq/aq_main.c
1225
val = reg_tx_dma_desc_tail_ptr_get(&ring->dev->hw, ring->index);
sys/dev/aq/aq_main.c
1227
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/aq/aq_main.c
1239
unsigned int val;
sys/dev/aq/aq_main.c
1244
val = rdm_rx_desc_head_ptr_get(&ring->dev->hw, ring->index);
sys/dev/aq/aq_main.c
1246
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/aq/aq_main.c
1258
unsigned int val;
sys/dev/aq/aq_main.c
1263
val = reg_rx_dma_desc_tail_ptr_get(&ring->dev->hw, ring->index);
sys/dev/aq/aq_main.c
1265
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/asmc/asmc.c
1097
asmc_wait_ack(device_t dev, uint8_t val, int amount)
sys/dev/asmc/asmc.c
1102
val = val & ASMC_STATUS_MASK;
sys/dev/asmc/asmc.c
1105
if ((ASMC_CMDPORT_READ(sc) & ASMC_STATUS_MASK) == val)
sys/dev/asmc/asmc.c
1118
asmc_wait(device_t dev, uint8_t val)
sys/dev/asmc/asmc.c
1124
if (asmc_wait_ack(dev, val, 1000) == 0)
sys/dev/asmc/asmc.c
1131
val & ASMC_STATUS_MASK, ASMC_CMDPORT_READ(sc));
sys/dev/asmc/asmc.c
1510
uint16_t val;
sys/dev/asmc/asmc.c
1518
val = (buf[0] << 8) | buf[1];
sys/dev/asmc/asmc.c
1519
v = (val >> fan) & 0x01;
sys/dev/asmc/asmc.c
1532
val = (buf[0] << 8) | buf[1];
sys/dev/asmc/asmc.c
1536
val |= (1 << fan); /* Set to manual */
sys/dev/asmc/asmc.c
1538
val &= ~(1 << fan); /* Set to auto */
sys/dev/asmc/asmc.c
1541
buf[0] = val >> 8;
sys/dev/asmc/asmc.c
1542
buf[1] = val & 0xff;
sys/dev/asmc/asmc.c
1573
int error, val;
sys/dev/asmc/asmc.c
1575
val = asmc_temp_getvalue(dev, sc->sc_model->smc_temps[arg2]);
sys/dev/asmc/asmc.c
1576
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/asmc/asmc.c
1585
asmc_sms_read(device_t dev, const char *key, int16_t *val)
sys/dev/asmc/asmc.c
1603
*val = ((int16_t)buf[0] << 8) | buf[1];
sys/dev/asmc/asmc.c
1697
int16_t val;
sys/dev/asmc/asmc.c
1700
asmc_sms_read(dev, ASMC_KEY_SMS_X, &val);
sys/dev/asmc/asmc.c
1701
v = (int32_t)val;
sys/dev/asmc/asmc.c
1712
int16_t val;
sys/dev/asmc/asmc.c
1715
asmc_sms_read(dev, ASMC_KEY_SMS_Y, &val);
sys/dev/asmc/asmc.c
1716
v = (int32_t)val;
sys/dev/asmc/asmc.c
1727
int16_t val;
sys/dev/asmc/asmc.c
1730
asmc_sms_read(dev, ASMC_KEY_SMS_Z, &val);
sys/dev/asmc/asmc.c
1731
v = (int32_t)val;
sys/dev/asmc/asmc.c
1831
int val, error;
sys/dev/asmc/asmc.c
1837
val = (aupo != 0) ? 1 : 0;
sys/dev/asmc/asmc.c
1838
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/asmc/asmc.c
1843
aupo = (val != 0) ? 1 : 0;
sys/dev/asmc/asmc.c
86
static int asmc_wait(device_t dev, uint8_t val);
sys/dev/asmc/asmc.c
87
static int asmc_wait_ack(device_t dev, uint8_t val, int amount);
sys/dev/asmc/asmc.c
96
static int asmc_sms_read(device_t, const char *key, int16_t *val);
sys/dev/asmc/asmcvar.h
62
#define ASMC_DATAPORT_WRITE(sc, val) \
sys/dev/asmc/asmcvar.h
63
bus_write_1(sc->sc_ioport, 0x00, val)
sys/dev/asmc/asmcvar.h
70
#define ASMC_CMDPORT_WRITE(sc, val) \
sys/dev/asmc/asmcvar.h
71
bus_write_1(sc->sc_ioport, 0x04, val)
sys/dev/ata/ata-all.h
488
int ata_sata_scr_read(struct ata_channel *ch, int port, int reg, uint32_t *val);
sys/dev/ata/ata-all.h
489
int ata_sata_scr_write(struct ata_channel *ch, int port, int reg, uint32_t val);
sys/dev/ata/ata-pci.c
212
uint32_t val, int width)
sys/dev/ata/ata-pci.c
215
pci_write_config(dev, reg, val, width);
sys/dev/ata/ata-pci.h
537
uint32_t val, int width);
sys/dev/ata/ata-sata.c
101
ATA_IDX_OUTL(ch, reg, val);
sys/dev/ata/ata-sata.c
156
uint32_t val, val1;
sys/dev/ata/ata-sata.c
163
if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val))
sys/dev/ata/ata-sata.c
165
if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_IDLE) {
sys/dev/ata/ata-sata.c
194
if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val))
sys/dev/ata/ata-sata.c
196
if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_RESET)
sys/dev/ata/ata-sata.c
206
if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val))
sys/dev/ata/ata-sata.c
208
if ((val & ATA_SC_DET_MASK) == 0)
sys/dev/ata/ata-sata.c
82
ata_sata_scr_read(struct ata_channel *ch, int port, int reg, uint32_t *val)
sys/dev/ata/ata-sata.c
86
return (ch->hw.pm_read(ch->dev, port, reg, val));
sys/dev/ata/ata-sata.c
88
*val = ATA_IDX_INL(ch, reg);
sys/dev/ata/ata-sata.c
95
ata_sata_scr_write(struct ata_channel *ch, int port, int reg, uint32_t val)
sys/dev/ata/ata-sata.c
99
return (ch->hw.pm_write(ch->dev, port, reg, val));
sys/dev/ata/chipsets/ata-highpoint.c
200
u_int8_t reg, val, res;
sys/dev/ata/chipsets/ata-highpoint.c
204
val = pci_read_config(parent, reg, 1);
sys/dev/ata/chipsets/ata-highpoint.c
205
pci_write_config(parent, reg, val | 0x80, 1);
sys/dev/ata/chipsets/ata-highpoint.c
209
val = pci_read_config(parent, reg, 1);
sys/dev/ata/chipsets/ata-highpoint.c
210
pci_write_config(parent, reg, val & 0xfe, 1);
sys/dev/ata/chipsets/ata-highpoint.c
213
pci_write_config(parent, reg, val, 1);
sys/dev/ata/chipsets/ata-intel.c
798
uint32_t val;
sys/dev/ata/chipsets/ata-intel.c
802
ata_intel_sata_sidpr_read(dev, port, ATA_SCONTROL, &val);
sys/dev/ata/chipsets/ata-intel.c
803
if ((val & ATA_SC_IPM_MASK) ==
sys/dev/ata/chipsets/ata-intel.c
806
val |= ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER;
sys/dev/ata/chipsets/ata-intel.c
807
ata_intel_sata_sidpr_write(dev, port, ATA_SCONTROL, val);
sys/dev/ata/chipsets/ata-intel.c
808
ata_intel_sata_sidpr_read(dev, port, ATA_SCONTROL, &val);
sys/dev/ata/chipsets/ata-intel.c
809
if ((val & ATA_SC_IPM_MASK) ==
sys/dev/ata/chipsets/ata-intel.c
815
"SControl registers are not functional: %08x\n", val);
sys/dev/ata/chipsets/ata-siliconimage.c
329
uint32_t val;
sys/dev/ata/chipsets/ata-siliconimage.c
332
val = ATA_INL(ctlr->r_res2, 0x14c + offset);
sys/dev/ata/chipsets/ata-siliconimage.c
333
if ((val & 0x3) == 0x1)
sys/dev/ata/chipsets/ata-siliconimage.c
334
ATA_OUTL(ctlr->r_res2, 0x14c + offset, val & ~0x3);
sys/dev/ata/chipsets/ata-via.c
484
uint32_t val;
sys/dev/ata/chipsets/ata-via.c
490
val = pci_read_config(parent, 0xa0 + port, 1);
sys/dev/ata/chipsets/ata-via.c
491
*result = val & 0x03;
sys/dev/ata/chipsets/ata-via.c
493
if (val & 0x04)
sys/dev/ata/chipsets/ata-via.c
495
else if (val & 0x08)
sys/dev/ata/chipsets/ata-via.c
499
if (val & 0x10)
sys/dev/ata/chipsets/ata-via.c
509
val = pci_read_config(parent, 0xa4 + port, 1);
sys/dev/ata/chipsets/ata-via.c
511
if (val & 0x01)
sys/dev/ata/chipsets/ata-via.c
513
if (val & 0x02)
sys/dev/ata/chipsets/ata-via.c
515
if (val & 0x04)
sys/dev/ata/chipsets/ata-via.c
517
if (val & 0x08)
sys/dev/ata/chipsets/ata-via.c
530
uint32_t val;
sys/dev/ata/chipsets/ata-via.c
539
val = 0;
sys/dev/ata/chipsets/ata-via.c
541
val |= 0x01;
sys/dev/ata/chipsets/ata-via.c
543
val |= 0x02;
sys/dev/ata/chipsets/ata-via.c
545
val |= 0x04;
sys/dev/ata/chipsets/ata-via.c
547
val |= 0x08;
sys/dev/ata/chipsets/ata-via.c
548
pci_write_config(parent, 0xa4 + port, val, 1);
sys/dev/ath/ah_osdep.c
258
r->val = ah->ah_devid;
sys/dev/ath/ah_osdep.c
271
ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
sys/dev/ath/ah_osdep.c
281
__func__, reg, val, ah->ah_powerMode);
sys/dev/ath/ah_osdep.c
292
r->val = val;
sys/dev/ath/ah_osdep.c
298
bus_space_write_4(tag, h, reg, val);
sys/dev/ath/ah_osdep.c
309
u_int32_t val;
sys/dev/ath/ah_osdep.c
323
val = bus_space_read_4(tag, h, reg);
sys/dev/ath/ah_osdep.c
333
r->val = val;
sys/dev/ath/ah_osdep.c
337
return val;
sys/dev/ath/ah_osdep.c
350
r->val = v;
sys/dev/ath/ah_osdep.c
369
ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
sys/dev/ath/ah_osdep.c
379
__func__, reg, val, ah->ah_powerMode);
sys/dev/ath/ah_osdep.c
385
bus_space_write_4(tag, h, reg, val);
sys/dev/ath/ah_osdep.c
396
u_int32_t val;
sys/dev/ath/ah_osdep.c
410
val = bus_space_read_4(tag, h, reg);
sys/dev/ath/ah_osdep.c
413
return val;
sys/dev/ath/ah_osdep.h
140
extern void ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val);
sys/dev/ath/ath_hal/ah.c
303
ath_hal_wait(struct ath_hal *ah, u_int reg, uint32_t mask, uint32_t val)
sys/dev/ath/ath_hal/ah.c
306
return ath_hal_waitfor(ah, reg, mask, val, AH_TIMEOUT);
sys/dev/ath/ath_hal/ah.c
311
ath_hal_waitfor(struct ath_hal *ah, u_int reg, uint32_t mask, uint32_t val, uint32_t timeout)
sys/dev/ath/ath_hal/ah.c
316
if ((OS_REG_READ(ah, reg) & mask) == val)
sys/dev/ath/ath_hal/ah.c
322
__func__, reg, OS_REG_READ(ah, reg), mask, val);
sys/dev/ath/ath_hal/ah.c
331
ath_hal_reverseBits(uint32_t val, uint32_t n)
sys/dev/ath/ath_hal/ah.c
337
retval = (retval << 1) | (val & 1);
sys/dev/ath/ath_hal/ah.c
338
val >>= 1;
sys/dev/ath/ath_hal/ah.h
1373
uint32_t gpio, uint32_t val);
sys/dev/ath/ath_hal/ah_decode.h
35
uint32_t val;
sys/dev/ath/ath_hal/ah_eeprom_9287.c
100
*(int8_t *) val = pBase->pwrTableOffset;
sys/dev/ath/ath_hal/ah_eeprom_9287.c
104
*(int8_t *)val = pBase->tempSensSlope;
sys/dev/ath/ath_hal/ah_eeprom_9287.c
106
*(int8_t *)val = 0;
sys/dev/ath/ath_hal/ah_eeprom_9287.c
110
*(int8_t *)val = pBase->tempSensSlopePalOn;
sys/dev/ath/ath_hal/ah_eeprom_9287.c
112
*(int8_t *)val = 0;
sys/dev/ath/ath_hal/ah_eeprom_9287.c
27
v9287EepromGet(struct ath_hal *ah, int param, void *val)
sys/dev/ath/ath_hal/ah_eeprom_9287.c
41
*(int16_t *)val = pModal->noiseFloorThreshCh[0];
sys/dev/ath/ath_hal/ah_eeprom_9287.c
45
macaddr = val;
sys/dev/ath/ath_hal/ah_eeprom_9287.c
71
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_9287.c
77
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_9287.c
84
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_9287.c
94
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_9287.c
97
*(int8_t *) val = ee->ee_antennaGainMax[1];
sys/dev/ath/ath_hal/ah_eeprom_v1.c
26
v1EepromGet(struct ath_hal *ah, int param, void *val)
sys/dev/ath/ath_hal/ah_eeprom_v1.c
37
macaddr = val;
sys/dev/ath/ath_hal/ah_eeprom_v1.c
56
*(uint16_t *) val = ee->ee_regDomain[0];
sys/dev/ath/ath_hal/ah_eeprom_v1.c
59
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v1.c
62
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v14.c
102
*(uint8_t *) val = pBase->frac_n_5g;
sys/dev/ath/ath_hal/ah_eeprom_v14.c
104
*(uint8_t *) val = 0;
sys/dev/ath/ath_hal/ah_eeprom_v14.c
107
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v14.c
112
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v14.c
119
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v14.c
129
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v14.c
132
*(int8_t *) val = ee->ee_antennaGainMax[1];
sys/dev/ath/ath_hal/ah_eeprom_v14.c
135
*(int8_t *) val = ee->ee_antennaGainMax[0];
sys/dev/ath/ath_hal/ah_eeprom_v14.c
139
*(int8_t *) val = pBase->pwr_table_offset;
sys/dev/ath/ath_hal/ah_eeprom_v14.c
141
*(int8_t *) val = AR5416_PWR_TABLE_OFFSET_DB;
sys/dev/ath/ath_hal/ah_eeprom_v14.c
145
*(uint8_t *) val = pBase->pwdclkind;
sys/dev/ath/ath_hal/ah_eeprom_v14.c
26
v14EepromGet(struct ath_hal *ah, int param, void *val)
sys/dev/ath/ath_hal/ah_eeprom_v14.c
40
*(int16_t *)val = pModal[0].noiseFloorThreshCh[0];
sys/dev/ath/ath_hal/ah_eeprom_v14.c
43
*(int16_t *)val = pModal[1].noiseFloorThreshCh[0];
sys/dev/ath/ath_hal/ah_eeprom_v14.c
47
macaddr = val;
sys/dev/ath/ath_hal/ah_eeprom_v14.c
92
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v14.c
96
*(uint8_t *) val = pBase->dacHiPwrMode_5G;
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1557
legacyEepromGet(struct ath_hal *ah, int param, void *val)
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1567
*(uint16_t *) val = ee->ee_opCap;
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1570
*(uint16_t *) val = ee->ee_regdomain;
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1575
*(uint16_t *) val = eeval;
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1579
macaddr = val;
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1599
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1602
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1605
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1608
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1611
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1614
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1617
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1622
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1625
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1629
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1633
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1637
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1642
*(uint16_t *) val =
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1649
*(uint16_t *) val =
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1655
*(int8_t *) val = ee->ee_antennaGainMax[0];
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1658
*(int8_t *) val = ee->ee_antennaGainMax[1];
sys/dev/ath/ath_hal/ah_eeprom_v3.c
1661
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
104
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
107
*(int8_t *) val = ee->ee_antennaGainMax;
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
28
v4kEepromGet(struct ath_hal *ah, int param, void *val)
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
42
*(int16_t *)val = pModal->noiseFloorThreshCh[0];
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
46
macaddr = val;
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
80
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
83
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
88
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_eeprom_v4k.c
95
HALASSERT(val == AH_NULL);
sys/dev/ath/ath_hal/ah_internal.h
616
uint32_t mask, uint32_t val);
sys/dev/ath/ath_hal/ah_internal.h
618
uint32_t mask, uint32_t val, uint32_t timeout);
sys/dev/ath/ath_hal/ah_internal.h
621
extern uint32_t ath_hal_reverseBits(uint32_t val, uint32_t n);
sys/dev/ath/ath_hal/ah_internal.h
852
uint32_t val; /* reg value */
sys/dev/ath/ath_hal/ah_regdomain.c
254
uint64_t val;
sys/dev/ath/ath_hal/ah_regdomain.c
258
val = ((uint64_t) 1) << bitnum;
sys/dev/ath/ath_hal/ah_regdomain.c
259
return (bitmask[byteOffset] & val) != 0;
sys/dev/ath/ath_hal/ar5210/ar5210.h
269
extern void ar5210UpdateDiagReg(struct ath_hal *ah, uint32_t val);
sys/dev/ath/ath_hal/ar5210/ar5210.h
270
extern void ar5210SetNav(struct ath_hal *ah, u_int val);
sys/dev/ath/ath_hal/ar5210/ar5210_beacon.c
100
val |= AR_STA_ID1_NO_PSPOLL; /* XXX */
sys/dev/ath/ath_hal/ar5210/ar5210_beacon.c
103
val & ~(AR_STA_ID1_DEFAULT_ANTENNA | AR_STA_ID1_PCF));
sys/dev/ath/ath_hal/ar5210/ar5210_beacon.c
96
uint32_t val;
sys/dev/ath/ath_hal/ar5210/ar5210_beacon.c
99
val = OS_REG_READ(ah, AR_STA_ID1);
sys/dev/ath/ath_hal/ar5210/ar5210_keycache.c
46
uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));
sys/dev/ath/ath_hal/ar5210/ar5210_keycache.c
47
if (val & AR_KEYTABLE_VALID)
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
191
ar5210GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
199
reg |= (val&1) << gpio;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
212
uint32_t val = OS_REG_READ(ah, AR_GPIODI);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
213
val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
214
return val;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
226
uint32_t val = OS_REG_READ(ah, AR_GPIOCR);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
229
val &= ~(AR_GPIOCR_INT_SEL(gpio) | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA |
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
232
val |= AR_GPIOCR_INT_SEL(gpio) | AR_GPIOCR_INT_ENA;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
234
val |= AR_GPIOCR_INT_SELH;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
237
OS_REG_WRITE(ah, AR_GPIOCR, val);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
249
uint32_t val;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
251
val = OS_REG_READ(ah, AR_PCICFG);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
254
val &= ~(AR_PCICFG_LED_PEND | AR_PCICFG_LED_ACT);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
258
val &= ~AR_PCICFG_LED_PEND;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
259
val |= AR_PCICFG_LED_ACT;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
262
val |= AR_PCICFG_LED_PEND;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
263
val &= ~AR_PCICFG_LED_ACT;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
266
OS_REG_WRITE(ah, AR_PCICFG, val);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
275
uint32_t val = OS_REG_READ(ah, AR_STA_ID1);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
276
return (val & AR_STA_ID1_DEFAULT_ANTENNA ? 2 : 1);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
282
uint32_t val = OS_REG_READ(ah, AR_STA_ID1);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
284
if (antenna != (val & AR_STA_ID1_DEFAULT_ANTENNA ? 2 : 1)) {
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
288
OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_DEFAULT_ANTENNA);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
371
uint32_t val = OS_REG_READ(ah, AR_BEACON);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
373
OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
704
ar5210UpdateDiagReg(struct ath_hal *ah, uint32_t val)
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
708
val |= AR_DIAG_SW_DIS_CRYPTO;
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
709
OS_REG_WRITE(ah, AR_DIAG_SW, val);
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
728
ar5210SetNav(struct ath_hal *ah, u_int val)
sys/dev/ath/ath_hal/ar5210/ar5210_misc.c
731
OS_REG_WRITE(ah, AR_NAV, val);
sys/dev/ath/ath_hal/ar5210/ar5210_power.c
52
uint32_t val;
sys/dev/ath/ath_hal/ar5210/ar5210_power.c
60
val = OS_REG_READ(ah, AR_PCICFG);
sys/dev/ath/ath_hal/ar5210/ar5210_power.c
61
if ((val & AR_PCICFG_SPWR_DN) == 0)
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
119
uint32_t val;
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
124
val = OS_REG_READ(ah, AR_MCAST_FIL1);
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
125
OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
127
val = OS_REG_READ(ah, AR_MCAST_FIL0);
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
128
OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix)));
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
139
uint32_t val;
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
144
val = OS_REG_READ(ah, AR_MCAST_FIL1);
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
145
OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
147
val = OS_REG_READ(ah, AR_MCAST_FIL0);
sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
148
OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));
sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
312
uint32_t val;
sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
314
val = OS_REG_READ(ah, AR_STA_ID1) & 0xffff;
sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
317
OS_REG_WRITE(ah, AR_STA_ID1, val
sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
324
OS_REG_WRITE(ah, AR_STA_ID1, val
sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
331
OS_REG_WRITE(ah, AR_STA_ID1, val
sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
337
OS_REG_WRITE(ah, AR_STA_ID1, val
sys/dev/ath/ath_hal/ar5211/ar5211.h
248
extern HAL_BOOL ar5211GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
192
uint32_t val;
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
198
val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff;
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
199
val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
200
return ath_hal_reverseBits(val, 8);
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
214
uint32_t val;
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
264
val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M;
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
265
AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
266
AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M;
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
304
val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >>
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
306
if (val != AR_PCICFG_EEPROM_SIZE_16K) {
sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
308
"%u (0x%x) found\n", __func__, val, val);
sys/dev/ath/ath_hal/ar5211/ar5211_beacon.c
105
uint32_t val;
sys/dev/ath/ath_hal/ar5211/ar5211_beacon.c
108
val = OS_REG_READ(ah, AR_STA_ID1);
sys/dev/ath/ath_hal/ar5211/ar5211_beacon.c
109
val |= AR_STA_ID1_PWR_SAV; /* XXX */
sys/dev/ath/ath_hal/ar5211/ar5211_beacon.c
112
val & ~(AR_STA_ID1_DEFAULT_ANTENNA | AR_STA_ID1_PCF));
sys/dev/ath/ath_hal/ar5211/ar5211_keycache.c
50
uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));
sys/dev/ath/ath_hal/ar5211/ar5211_keycache.c
51
if (val & AR_KEYTABLE_VALID)
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
231
ar5211GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
239
reg |= (val&1) << gpio;
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
252
uint32_t val = OS_REG_READ(ah, AR_GPIODI);
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
253
val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
254
return val;
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
266
uint32_t val = OS_REG_READ(ah, AR_GPIOCR);
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
269
val &= ~(AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA |
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
272
val |= AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_ENA;
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
274
val |= AR_GPIOCR_INT_SELH;
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
277
OS_REG_WRITE(ah, AR_GPIOCR, val);
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
367
uint32_t val = OS_REG_READ(ah, AR_BEACON);
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
369
OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
751
ar5211SetNav(struct ath_hal *ah, u_int val)
sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
754
OS_REG_WRITE(ah, AR_NAV, val);
sys/dev/ath/ath_hal/ar5211/ar5211_power.c
41
uint32_t val;
sys/dev/ath/ath_hal/ar5211/ar5211_power.c
49
val = OS_REG_READ(ah, AR_PCICFG);
sys/dev/ath/ath_hal/ar5211/ar5211_power.c
50
if ((val & AR_PCICFG_SPWR_DN) == 0)
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
120
uint32_t val;
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
125
val = OS_REG_READ(ah, AR_MCAST_FIL1);
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
126
OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
128
val = OS_REG_READ(ah, AR_MCAST_FIL0);
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
129
OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix)));
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
140
uint32_t val;
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
145
val = OS_REG_READ(ah, AR_MCAST_FIL1);
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
146
OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
148
val = OS_REG_READ(ah, AR_MCAST_FIL0);
sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
149
OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));
sys/dev/ath/ath_hal/ar5211/ar5211_reset.c
2091
uint32_t val;
sys/dev/ath/ath_hal/ar5211/ar5211_reset.c
2093
val = OS_REG_READ(ah, AR_STA_ID1) & 0xffff;
sys/dev/ath/ath_hal/ar5211/ar5211_reset.c
2096
OS_REG_WRITE(ah, AR_STA_ID1, val
sys/dev/ath/ath_hal/ar5211/ar5211_reset.c
2102
OS_REG_WRITE(ah, AR_STA_ID1, val
sys/dev/ath/ath_hal/ar5211/ar5211_reset.c
2109
OS_REG_WRITE(ah, AR_STA_ID1, val
sys/dev/ath/ath_hal/ar5212/ar5212.h
476
extern HAL_BOOL ar5212GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
185
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
192
val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
193
val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
194
return ath_hal_reverseBits(val, 8);
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
329
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
354
val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
355
AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
356
AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
469
val = OS_REG_READ(ah, AR_PCICFG);
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
470
val = MS(val, AR_PCICFG_EEPROM_SIZE);
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
471
if (val == 0) {
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
475
__func__, val, val);
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
480
} else if (val != AR_PCICFG_EEPROM_SIZE_16K) {
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
481
if (AR_PCICFG_EEPROM_SIZE_FAILED == val) {
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
484
__func__, val, val);
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
490
__func__, val, AR_PCICFG_EEPROM_SIZE_16K);
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
723
uint16_t capField, val;
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
864
if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK)
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
865
pCap->halTotalQueues = val;
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
869
if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK)
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
870
pCap->halKeyCacheSize = val;
sys/dev/ath/ath_hal/ar5212/ar5212_beacon.c
129
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_beacon.c
132
val = OS_REG_READ(ah, AR_STA_ID1);
sys/dev/ath/ath_hal/ar5212/ar5212_beacon.c
133
val |= AR_STA_ID1_PWR_SAV; /* XXX */
sys/dev/ath/ath_hal/ar5212/ar5212_beacon.c
136
val & ~(AR_STA_ID1_USE_DEFANT | AR_STA_ID1_PCF));
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
107
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
110
val = OS_REG_READ(ah, AR_GPIOCR);
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
111
val &= ~(AR_GPIOCR_CR_A(gpio) |
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
113
val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA;
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
115
val |= AR_GPIOCR_INT_SELH; /* interrupt on pin high */
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
117
val |= AR_GPIOCR_INT_SELL; /* interrupt on pin low */
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
120
OS_REG_WRITE(ah, AR_GPIOCR, val);
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
72
ar5212GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
80
reg |= (val&1) << gpio;
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
93
uint32_t val = OS_REG_READ(ah, AR_GPIODI);
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
94
val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;
sys/dev/ath/ath_hal/ar5212/ar5212_gpio.c
95
return val;
sys/dev/ath/ath_hal/ar5212/ar5212_keycache.c
55
uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));
sys/dev/ath/ath_hal/ar5212/ar5212_keycache.c
56
if (val & AR_KEYTABLE_VALID)
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1166
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1167
val = OS_REG_READ(ah, AR_PHY_RADAR_0);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1170
val &= ~AR_PHY_RADAR_0_FIRPWR;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1171
val |= SM(pe->pe_firpwr, AR_PHY_RADAR_0_FIRPWR);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1174
val &= ~AR_PHY_RADAR_0_RRSSI;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1175
val |= SM(pe->pe_rrssi, AR_PHY_RADAR_0_RRSSI);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1178
val &= ~AR_PHY_RADAR_0_HEIGHT;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1179
val |= SM(pe->pe_height, AR_PHY_RADAR_0_HEIGHT);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1182
val &= ~AR_PHY_RADAR_0_PRSSI;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1183
val |= SM(pe->pe_prssi, AR_PHY_RADAR_0_PRSSI);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1186
val &= ~AR_PHY_RADAR_0_INBAND;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1187
val |= SM(pe->pe_inband, AR_PHY_RADAR_0_INBAND);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1190
val |= AR_PHY_RADAR_0_ENA;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1192
val &= ~ AR_PHY_RADAR_0_ENA;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1243
OS_REG_WRITE(ah, AR_PHY_RADAR_0, val);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1307
uint32_t val,temp;
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1309
val = OS_REG_READ(ah, AR_PHY_RADAR_0);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1311
temp = MS(val,AR_PHY_RADAR_0_FIRPWR);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1314
pe->pe_rrssi = MS(val, AR_PHY_RADAR_0_RRSSI);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1315
pe->pe_height = MS(val, AR_PHY_RADAR_0_HEIGHT);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1316
pe->pe_prssi = MS(val, AR_PHY_RADAR_0_PRSSI);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1317
pe->pe_inband = MS(val, AR_PHY_RADAR_0_INBAND);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1318
pe->pe_enabled = !! (val & AR_PHY_RADAR_0_ENA);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1331
val = OS_REG_READ(ah, AR_PHY_RADAR_2);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1332
pe->pe_relpwr = !! MS(val, AR_PHY_RADAR_2_RELPWR);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1333
pe->pe_relstep = !! MS(val, AR_PHY_RADAR_2_RELSTEP);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1334
pe->pe_maxlen = !! MS(val, AR_PHY_RADAR_2_MAXLEN);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1336
pe->pe_usefir128 = !! (val & AR_PHY_RADAR_2_USEFIR128);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1337
pe->pe_blockradar = !! (val & AR_PHY_RADAR_2_BLOCKOFDMWEAK);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1338
pe->pe_enmaxrssi = !! (val & AR_PHY_RADAR_2_ENMAXRSSI);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1339
pe->pe_enrelpwr = !! (val & AR_PHY_RADAR_2_ENRELPWRCHK);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1341
!! (val & AR_PHY_RADAR_2_ENRELSTEPCHK);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1481
ar5212SetNav(struct ath_hal *ah, u_int val)
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
1484
OS_REG_WRITE(ah, AR_NAV, val);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
280
uint32_t val = OS_REG_READ(ah, AR_BEACON);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
282
OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
290
OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
sys/dev/ath/ath_hal/ar5212/ar5212_power.c
44
uint32_t scr, val;
sys/dev/ath/ath_hal/ar5212/ar5212_power.c
69
val = OS_REG_READ(ah, AR_PCICFG);
sys/dev/ath/ath_hal/ar5212/ar5212_power.c
70
if ((val & AR_PCICFG_SPWR_DN) == 0)
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
129
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
134
val = OS_REG_READ(ah, AR_MCAST_FIL1);
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
135
OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
137
val = OS_REG_READ(ah, AR_MCAST_FIL0);
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
138
OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix)));
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
149
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
154
val = OS_REG_READ(ah, AR_MCAST_FIL1);
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
155
OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
157
val = OS_REG_READ(ah, AR_MCAST_FIL0);
sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
158
OS_REG_WRITE(ah, AR_MCAST_FIL0, (val | (1<<ix)));
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1396
int32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1447
val = OS_REG_READ(ah, AR_PHY(25));
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1448
val &= 0xFFFFFE00;
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1449
val |= (((uint32_t)nf << 1) & 0x1FF);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1450
OS_REG_WRITE(ah, AR_PHY(25), val);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1466
val &= 0xFFFFFE00;
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1467
val |= (((uint32_t)(-50) << 1) & 0x1FF);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1468
OS_REG_WRITE(ah, AR_PHY(25), val);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1761
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1807
val = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1808
val &= ~(AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1811
OS_REG_WRITE(ah, AR_PHY_MASK_CTL, val);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1895
val = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1896
val |= (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
1899
OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4, val);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
804
uint32_t val;
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
806
val = OS_REG_READ(ah, AR_STA_ID1);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
807
val &= ~(AR_STA_ID1_STA_AP | AR_STA_ID1_ADHOC);
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
810
OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_STA_AP
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
815
OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_ADHOC
sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
821
OS_REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_KSRCH_MODE);
sys/dev/ath/ath_hal/ar5312/ar5312.h
47
extern HAL_BOOL ar5312GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);
sys/dev/ath/ath_hal/ar5312/ar5312.h
55
extern HAL_BOOL ar5315GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
139
val = ((OS_REG_READ(ah, (AR5315_RSTIMER_BASE -((uint32_t) sh)) + AR5315_WREV)) >> AR5315_WREV_S)
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
141
AH_PRIVATE(ah)->ah_macVersion = val >> AR5315_WREV_ID_S;
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
142
AH_PRIVATE(ah)->ah_macRev = val & AR5315_WREV_REVISION;
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
149
val = OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + 0x0020);
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
150
val = OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + 0x0080);
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
152
val = ((OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + AR5312_WREV)) >> AR5312_WREV_S) & AR5312_WREV_ID;
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
153
AH_PRIVATE(ah)->ah_macVersion = val >> AR5312_WREV_ID_S;
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
154
AH_PRIVATE(ah)->ah_macRev = val & AR5312_WREV_REVISION;
sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
70
uint32_t val;
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
110
uint32_t val;
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
114
val = OS_REG_READ(ah, gpioOffset+AR5312_GPIOCR);
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
115
val &= ~(AR_GPIOCR_CR_A(gpio) |
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
117
val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA;
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
119
val |= AR_GPIOCR_INT_SELH; /* interrupt on pin high */
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
121
val |= AR_GPIOCR_INT_SELL; /* interrupt on pin low */
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
124
OS_REG_WRITE(ah, gpioOffset+AR5312_GPIOCR, val);
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
72
ar5312GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
81
reg |= (val&1) << gpio;
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
96
uint32_t val = OS_REG_READ(ah, gpioOffset+AR5312_GPIODI);
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
97
val = ((val & AR5312_GPIOD_MASK) >> gpio) & 0x1;
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
98
return val;
sys/dev/ath/ath_hal/ar5312/ar5312_misc.c
40
uint32_t val;
sys/dev/ath/ath_hal/ar5312/ar5312_misc.c
43
val = SM(AR5312_PCICFG_LEDSEL0, AR5312_PCICFG_LEDSEL) |
sys/dev/ath/ath_hal/ar5312/ar5312_misc.c
50
| val);
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
110
uint32_t val;
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
114
val = OS_REG_READ(ah, gpioOffset+AR5315_GPIOINT);
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
115
val &= ~(AR5315_GPIOINT_M | AR5315_GPIOINTLVL_M);
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
116
val |= gpio << AR5315_GPIOINT_S;
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
118
val |= 2 << AR5315_GPIOINTLVL_S; /* interrupt on pin high */
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
120
val |= 1 << AR5315_GPIOINTLVL_S; /* interrupt on pin low */
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
123
OS_REG_WRITE(ah, gpioOffset+AR5315_GPIOINT, val);
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
72
ar5315GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
81
reg |= (val&1) << gpio;
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
96
uint32_t val = OS_REG_READ(ah, gpioOffset+AR5315_GPIODI);
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
97
val = ((val & AR5315_GPIOD_MASK) >> gpio) & 0x1;
sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
98
return val;
sys/dev/ath/ath_hal/ar5416/ar5416.h
226
extern HAL_BOOL ar5416GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);
sys/dev/ath/ath_hal/ar5416/ar5416.h
251
HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t val,
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
282
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
289
val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
290
val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
291
return ath_hal_reverseBits(val, 8);
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
305
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
340
val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
341
AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
342
AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
892
uint16_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
955
if (ath_hal_eepromGet(ah, AR_EEP_MAXQCU, &val) == HAL_OK)
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
956
pCap->halTotalQueues = val;
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
960
if (ath_hal_eepromGet(ah, AR_EEP_KCENTRIES, &val) == HAL_OK)
sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
961
pCap->halKeyCacheSize = val;
sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c
133
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c
136
val = OS_REG_READ(ah, AR_STA_ID1);
sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c
137
val |= AR_STA_ID1_PWR_SAV; /* XXX */
sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c
140
val & ~(AR_STA_ID1_USE_DEFANT | AR_STA_ID1_PCF));
sys/dev/ath/ath_hal/ar5416/ar5416_btcoex.c
278
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_btcoex.c
280
val = OS_REG_READ(ah, AR9271_CLOCK_CONTROL);
sys/dev/ath/ath_hal/ar5416/ar5416_btcoex.c
281
val &= 0xFFFFFEFF;
sys/dev/ath/ath_hal/ar5416/ar5416_btcoex.c
282
OS_REG_WRITE(ah, AR9271_CLOCK_CONTROL, val);
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
599
int32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
636
val = OS_REG_READ(ah, ar5416_cca_regs[i]);
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
637
val &= 0xFFFFFE00;
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
638
val |= (((uint32_t) nf_val << 1) & 0x1ff);
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
640
OS_REG_WRITE(ah, ar5416_cca_regs[i], val);
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
679
val = OS_REG_READ(ah, ar5416_cca_regs[i]);
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
680
val &= 0xFFFFFE00;
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
681
val |= (((uint32_t)(-50) << 1) & 0x1ff);
sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
682
OS_REG_WRITE(ah, ar5416_cca_regs[i], val);
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcdc.c
101
val = OS_REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcdc.c
102
val &= 0xc0000fff;
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcdc.c
103
val |= (qDcMismatch << 12) | (iDcMismatch << 21);
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcdc.c
104
OS_REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcdc.c
76
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c
105
val = OS_REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c
106
val &= 0xfffff000;
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c
107
val |= (qGainMismatch) | (iGainMismatch << 6);
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c
108
OS_REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c
96
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
161
ar5416GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
167
"%s: gpio=%d, val=%d\n", __func__, gpio, val);
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
170
if (val & 1)
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
210
uint32_t val, mask;
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
217
val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE),
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
220
AR_INTR_ASYNC_ENABLE_GPIO, val);
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
228
val = MS(OS_REG_READ(ah, AR_INTR_SYNC_ENABLE),
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
231
AR_INTR_SYNC_ENABLE_GPIO, val);
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
238
val = MS(OS_REG_READ(ah, AR_INTR_SYNC_CAUSE),
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
241
AR_INTR_SYNC_ENABLE_GPIO, val);
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
243
val = MS(OS_REG_READ(ah, AR_GPIO_INTR_POL),
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
247
val &= ~AR_GPIO_BIT(gpio);
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
250
val |= AR_GPIO_BIT(gpio);
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
253
AR_GPIO_INTR_POL_VAL, val);
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
256
val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE),
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
259
AR_INTR_ASYNC_ENABLE_GPIO, val);
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
267
val = MS(OS_REG_READ(ah, AR_INTR_SYNC_ENABLE),
sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
270
AR_INTR_SYNC_ENABLE_GPIO, val);
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
378
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
380
val = OS_REG_READ(ah, AR_DIAG_SW);
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
383
if (val & AR_DIAG_RXCLEAR_CTL_LOW) {
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
387
if (val & AR_DIAG_RXCLEAR_EXT_LOW) {
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
565
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
582
val = OS_REG_READ(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS);
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
583
val &= ~AR_PHY_RIFS_INIT_DELAY;
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
584
OS_REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val);
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
722
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
741
if ((hang_sig & hang_list[i].mask) == hang_list[i].val) {
sys/dev/ath/ath_hal/ar5416/ar5416_power.c
40
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_power.c
66
val = OS_REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M;
sys/dev/ath/ath_hal/ar5416/ar5416_power.c
67
if (val == AR_RTC_STATUS_ON)
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
125
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
127
val = OS_REG_READ(ah, AR_PHY_RADAR_0);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
130
val &= ~AR_PHY_RADAR_0_FIRPWR;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
131
val |= SM(pe->pe_firpwr, AR_PHY_RADAR_0_FIRPWR);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
134
val &= ~AR_PHY_RADAR_0_RRSSI;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
135
val |= SM(pe->pe_rrssi, AR_PHY_RADAR_0_RRSSI);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
138
val &= ~AR_PHY_RADAR_0_HEIGHT;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
139
val |= SM(pe->pe_height, AR_PHY_RADAR_0_HEIGHT);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
142
val &= ~AR_PHY_RADAR_0_PRSSI;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
143
val |= SM(pe->pe_prssi, AR_PHY_RADAR_0_PRSSI);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
146
val &= ~AR_PHY_RADAR_0_INBAND;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
147
val |= SM(pe->pe_inband, AR_PHY_RADAR_0_INBAND);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
151
val |= AR_PHY_RADAR_0_FFT_ENA;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
152
OS_REG_WRITE(ah, AR_PHY_RADAR_0, val);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
176
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
177
val &= ~AR_PHY_RADAR_1_RELSTEP_THRESH;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
178
val |= SM(pe->pe_relstep, AR_PHY_RADAR_1_RELSTEP_THRESH);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
179
OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
182
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
183
val &= ~AR_PHY_RADAR_1_RELPWR_THRESH;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
184
val |= SM(pe->pe_relpwr, AR_PHY_RADAR_1_RELPWR_THRESH);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
185
OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
203
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
204
val &= ~AR_PHY_RADAR_1_MAXLEN;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
205
val |= SM(pe->pe_maxlen, AR_PHY_RADAR_1_MAXLEN);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
206
OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
83
uint32_t val, temp;
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
85
val = OS_REG_READ(ah, AR_PHY_RADAR_0);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
87
temp = MS(val,AR_PHY_RADAR_0_FIRPWR);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
90
pe->pe_rrssi = MS(val, AR_PHY_RADAR_0_RRSSI);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
91
pe->pe_height = MS(val, AR_PHY_RADAR_0_HEIGHT);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
92
pe->pe_prssi = MS(val, AR_PHY_RADAR_0_PRSSI);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
93
pe->pe_inband = MS(val, AR_PHY_RADAR_0_INBAND);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
96
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
97
pe->pe_relpwr = MS(val, AR_PHY_RADAR_1_RELPWR_THRESH);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
98
pe->pe_relstep = MS(val, AR_PHY_RADAR_1_RELSTEP_THRESH);
sys/dev/ath/ath_hal/ar5416/ar5416_radar.c
99
pe->pe_maxlen = MS(val, AR_PHY_RADAR_1_MAXLEN);
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
1360
uint32_t val = OS_REG_READ(ah, AR_RTC_DERIVED_CLK);
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
1361
val &= ~AR_RTC_DERIVED_CLK_PERIOD;
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
1362
val |= SM(1, AR_RTC_DERIVED_CLK_PERIOD);
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
1363
OS_REG_WRITE(ah, AR_RTC_DERIVED_CLK, val);
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
2662
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
2672
val = OS_REG_READ(ah, AR_PCU_MISC_MODE2);
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
2673
val &= (~AR_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE);
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
2675
val &= ~AR_PCU_MISC_MODE2_HWWAR1;
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
2678
val = val & (~AR_PCU_MISC_MODE2_HWWAR2);
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
2680
OS_REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
103
val &= ~AR_PHY_SPECTRAL_SCAN_PERIOD;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
104
val |= SM(ss->ss_period, AR_PHY_SPECTRAL_SCAN_PERIOD);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
110
val &= ~AR_PHY_SPECTRAL_SCAN_COUNT;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
111
val |= SM(ss->ss_count, AR_PHY_SPECTRAL_SCAN_COUNT);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
115
val |= AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
117
val &= ~AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
127
val &= ~AR_PHY_SPECTRAL_SCAN_COUNT_KIWI;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
128
val |= SM(ss->ss_count, AR_PHY_SPECTRAL_SCAN_COUNT_KIWI);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
132
val |= AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_KIWI;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
134
val &= ~AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_KIWI;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
138
val |= AR_PHY_SPECTRAL_SCAN_PHYERR_MASK_SELECT_KIWI;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
141
OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val | AR_PHY_SPECTRAL_SCAN_ENA);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
153
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
155
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
157
ss->ss_fft_period = MS(val, AR_PHY_SPECTRAL_SCAN_FFT_PERIOD);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
158
ss->ss_period = MS(val, AR_PHY_SPECTRAL_SCAN_PERIOD);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
160
ss->ss_count = MS(val, AR_PHY_SPECTRAL_SCAN_COUNT);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
161
ss->ss_short_report = MS(val, AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
163
ss->ss_count = MS(val, AR_PHY_SPECTRAL_SCAN_COUNT_KIWI);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
164
ss->ss_short_report = MS(val, AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_KIWI);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
166
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
167
ss->radar_bin_thresh_sel = MS(val, AR_PHY_RADAR_1_BIN_THRESH_SELECT);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
173
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
175
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
176
return MS(val, AR_PHY_SPECTRAL_SCAN_ACTIVE);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
182
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
184
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
185
return MS(val,AR_PHY_SPECTRAL_SCAN_ENA);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
191
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
196
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
197
val |= AR_PHY_SPECTRAL_SCAN_ENA;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
198
val |= AR_PHY_SPECTRAL_SCAN_ACTIVE;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
199
OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
200
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
201
val = OS_REG_READ(ah, AR_PHY_ERR_MASK_REG);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
202
OS_REG_WRITE(ah, AR_PHY_ERR_MASK_REG, val | AR_PHY_ERR_RADAR);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
208
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
209
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
212
val &= ~AR_PHY_SPECTRAL_SCAN_ENA;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
213
val &= ~AR_PHY_SPECTRAL_SCAN_ACTIVE;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
214
OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
215
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
216
val = OS_REG_READ(ah, AR_PHY_ERR_MASK_REG) & (~AR_PHY_ERR_RADAR);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
217
OS_REG_WRITE(ah, AR_PHY_ERR_MASK_REG, val);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
223
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
225
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
226
return val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
50
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
53
val = OS_REG_READ(ah, AR_PHY_RADAR_0);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
54
val |= AR_PHY_RADAR_0_FFT_ENA;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
57
val &= ~AR_PHY_RADAR_0_RRSSI;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
58
val |= SM(MAX_RADAR_RSSI_THRESH, AR_PHY_RADAR_0_RRSSI);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
60
val &= ~AR_PHY_RADAR_0_HEIGHT;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
61
val |= SM(MAX_RADAR_HEIGHT, AR_PHY_RADAR_0_HEIGHT);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
63
val &= ~(AR_PHY_RADAR_0_ENA);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
64
OS_REG_WRITE(ah, AR_PHY_RADAR_0, val);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
67
val = OS_REG_READ(ah, AR_PHY_RADAR_EXT);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
68
OS_REG_WRITE(ah, AR_PHY_RADAR_EXT, val & ~AR_PHY_RADAR_EXT_ENA);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
70
val = OS_REG_READ(ah, AR_RX_FILTER);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
71
val |= (1<<13);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
72
OS_REG_WRITE(ah, AR_RX_FILTER, val);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
86
uint32_t val;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
90
val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
93
val &= ~AR_PHY_SPECTRAL_SCAN_FFT_PERIOD;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
94
val |= SM(ss->ss_fft_period, AR_PHY_SPECTRAL_SCAN_FFT_PERIOD);
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
98
val &= ~AR_PHY_SPECTRAL_SCAN_PERIOD;
sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
99
val |= SM(ss->ss_period, AR_PHY_SPECTRAL_SCAN_PERIOD);
sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
123
uint32_t val;
sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
167
val = OS_REG_READ(ah, AR_SREV);
sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
170
__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
171
MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
174
(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
175
AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
176
AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
157
uint32_t val;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
229
val = OS_REG_READ(ah, AR_SREV);
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
232
__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
233
MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
236
(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
237
AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
238
AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
428
uint32_t val;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
447
val = OS_REG_READ(ah, AR_WA);
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
453
val &= ~(AR_WA_BIT6 | AR_WA_BIT7);
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
458
val |= AR_WA_BIT22;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
469
val |= AR_WA_D3_L1_DISABLE;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
471
OS_REG_WRITE(ah, AR_WA, val);
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
473
val = AR9280_WA_DEFAULT;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
478
val &= (~AR_WA_D3_L1_DISABLE);
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
479
OS_REG_WRITE(ah, AR_WA, val);
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
535
uint32_t val = HAL_INI_VAL(ia, i, modesIndex);
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
538
val &= ~AR_AN_TOP2_PWDCLKIND;
sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
540
OS_REG_WRITE(ah, reg, val);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
142
uint32_t val;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
215
val = OS_REG_READ(ah, AR_SREV);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
218
__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
219
MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
222
(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
223
AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
224
AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
402
uint32_t val;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
414
val = AH_PRIVATE(ah)->ah_config.ath_hal_war70c;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
415
if (val) {
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
416
val &= 0xffff00ff;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
417
val |= 0x6f00;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
418
OS_REG_WRITE(ah, 0x570c, val);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
440
val = OS_REG_READ(ah, AR_WA);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
446
val &= ~(AR_WA_BIT6 | AR_WA_BIT7);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
457
val |= AR_WA_D3_L1_DISABLE;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
460
val |= AR_WA_BIT23;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
462
OS_REG_WRITE(ah, AR_WA, val);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
464
val = AR9285_WA_DEFAULT;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
468
val &= (~AR_WA_D3_L1_DISABLE);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
471
val |= (AR_WA_BIT6 | AR_WA_BIT7);
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
474
val |= AR_WA_BIT23;
sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
476
OS_REG_WRITE(ah, AR_WA, val);
sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
120
uint32_t val;
sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
196
val = OS_REG_READ(ah, AR_SREV);
sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
199
__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
200
MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
203
(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
204
AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
205
AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
sys/dev/ath/ath_hal/ar9002/ar9287_olc.c
84
int8_t val;
sys/dev/ath/ath_hal/ar9002/ar9287_olc.c
85
(void) (ath_hal_eepromGet(ah, AR_EEP_TEMPSENSE_SLOPE, &val));
sys/dev/ath/ath_hal/ar9002/ar9287_olc.c
86
slope = val;
sys/dev/ath/if_ath.c
3639
uint32_t val, *mfilt = arg;
sys/dev/ath/if_ath.c
3645
val = le32dec(dl + 0);
sys/dev/ath/if_ath.c
3646
pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
sys/dev/ath/if_ath.c
3647
val = le32dec(dl + 3);
sys/dev/ath/if_ath.c
3648
pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
sys/dev/ath/if_ath_spectral.c
181
int val;
sys/dev/ath/if_ath_spectral.c
261
val = * ((int *) indata);
sys/dev/ath/if_ath_spectral.c
262
if (val == 0)
sys/dev/ath/if_ath_sysctl.c
1007
int val = 0;
sys/dev/ath/if_ath_sysctl.c
1010
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ath/if_ath_sysctl.c
1013
if (val == 0)
sys/dev/ath/if_ath_sysctl.c
1019
val = 0;
sys/dev/ath/if_ath_sysctl.c
705
int val = 0;
sys/dev/ath/if_ath_sysctl.c
708
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ath/if_ath_sysctl.c
711
if (val == 0)
sys/dev/ath/if_ath_sysctl.c
715
val = 0;
sys/dev/ath/if_ath_sysctl.c
723
int val = 0;
sys/dev/ath/if_ath_sysctl.c
730
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ath/if_ath_sysctl.c
733
if (val == 0)
sys/dev/ath/if_ath_sysctl.c
750
val = 0;
sys/dev/atkbdc/atkbd.c
1225
int val, error;
sys/dev/atkbdc/atkbd.c
1228
val = typematic(DEFAULT_DELAY, DEFAULT_RATE);
sys/dev/atkbdc/atkbd.c
1229
error = write_kbd(state->kbdc, KBDC_SET_TYPEMATIC, val);
sys/dev/atkbdc/atkbd.c
1231
kbd->kb_delay1 = typematic_delay(val);
sys/dev/atkbdc/atkbd.c
1232
kbd->kb_delay2 = typematic_rate(val);
sys/dev/atkbdc/atkbdc_subr.c
103
ivar->vendorid = (u_int32_t)val;
sys/dev/atkbdc/atkbdc_subr.c
106
ivar->serial = (u_int32_t)val;
sys/dev/atkbdc/atkbdc_subr.c
109
ivar->logicalid = (u_int32_t)val;
sys/dev/atkbdc/atkbdc_subr.c
112
ivar->compatid = (u_int32_t)val;
sys/dev/atkbdc/atkbdc_subr.c
71
atkbdc_read_ivar(device_t bus, device_t dev, int index, uintptr_t *val)
sys/dev/atkbdc/atkbdc_subr.c
78
*val = (u_long)ivar->vendorid;
sys/dev/atkbdc/atkbdc_subr.c
81
*val = (u_long)ivar->serial;
sys/dev/atkbdc/atkbdc_subr.c
84
*val = (u_long)ivar->logicalid;
sys/dev/atkbdc/atkbdc_subr.c
87
*val = (u_long)ivar->compatid;
sys/dev/atkbdc/atkbdc_subr.c
96
atkbdc_write_ivar(device_t bus, device_t dev, int index, uintptr_t val)
sys/dev/atkbdc/atkbdc_subr.h
48
int atkbdc_read_ivar(device_t bus, device_t dev, int index, uintptr_t *val);
sys/dev/atkbdc/atkbdc_subr.h
49
int atkbdc_write_ivar(device_t bus, device_t dev, int index, uintptr_t val);
sys/dev/atkbdc/psm.c
6791
trackpoint_command(struct psm_softc *sc, int cmd, int loc, int val)
sys/dev/atkbdc/psm.c
6793
const int seq[] = { 0xe2, cmd, loc, val };
sys/dev/atkbdc/psm.c
7101
elantech_read_1(KBDC kbdc, int hwversion, int reg, int *val)
sys/dev/atkbdc/psm.c
7116
*val = resp[retidx];
sys/dev/atkbdc/psm.c
7122
elantech_write_1(KBDC kbdc, int hwversion, int reg, int val)
sys/dev/atkbdc/psm.c
7137
res |= send_aux_command(kbdc, val) != PSM_ACK;
sys/dev/atkbdc/psm.c
7163
int i, val, res, hwversion, reg10;
sys/dev/atkbdc/psm.c
7190
if (elantech_read_1(kbdc, hwversion, 0x10, &val) == 0)
sys/dev/atkbdc/psm.c
897
set_mouse_resolution(KBDC kbdc, int val)
sys/dev/atkbdc/psm.c
901
res = send_aux_command_and_data(kbdc, PSMC_SET_RESOLUTION, val);
sys/dev/atkbdc/psm.c
902
VLOG(2, (LOG_DEBUG, "psm: SET_RESOLUTION (%d) %04x\n", val, res));
sys/dev/atkbdc/psm.c
904
return ((res == PSM_ACK) ? val : -1);
sys/dev/axgbe/if_axgbe_pci.c
321
int val;
sys/dev/axgbe/if_axgbe_pci.c
325
val = xgbe_phy_mii_read(pdata, phy, reg);
sys/dev/axgbe/if_axgbe_pci.c
327
axgbe_printf(2, "%s: val 0x%x\n", __func__, val);
sys/dev/axgbe/if_axgbe_pci.c
328
return (val & 0xFFFF);
sys/dev/axgbe/if_axgbe_pci.c
332
axgbe_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/axgbe/if_axgbe_pci.c
337
axgbe_printf(3, "%s: phy %d reg %d val 0x%x\n", __func__, phy, reg, val);
sys/dev/axgbe/if_axgbe_pci.c
339
xgbe_phy_mii_write(pdata, phy, reg, val);
sys/dev/axgbe/xgbe-dev.c
1180
uint16_t val)
sys/dev/axgbe/xgbe-dev.c
1190
XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, DATA, val);
sys/dev/axgbe/xgbe-dev.c
2049
unsigned int val;
sys/dev/axgbe/xgbe-dev.c
2051
val = (if_getmtu(pdata->netdev) > XGMAC_STD_PACKET_MTU) ? 1 : 0;
sys/dev/axgbe/xgbe-dev.c
2053
XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val);
sys/dev/axgbe/xgbe-dev.c
210
xgbe_config_rsf_mode(struct xgbe_prv_data *pdata, unsigned int val)
sys/dev/axgbe/xgbe-dev.c
2102
uint64_t val;
sys/dev/axgbe/xgbe-dev.c
2133
val = XGMAC_IOREAD(pdata, reg_lo);
sys/dev/axgbe/xgbe-dev.c
2136
val |= ((uint64_t)XGMAC_IOREAD(pdata, reg_lo + 4) << 32);
sys/dev/axgbe/xgbe-dev.c
2138
return (val);
sys/dev/axgbe/xgbe-dev.c
215
XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RSF, val);
sys/dev/axgbe/xgbe-dev.c
221
xgbe_config_tsf_mode(struct xgbe_prv_data *pdata, unsigned int val)
sys/dev/axgbe/xgbe-dev.c
226
XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TSF, val);
sys/dev/axgbe/xgbe-dev.c
232
xgbe_config_rx_threshold(struct xgbe_prv_data *pdata, unsigned int val)
sys/dev/axgbe/xgbe-dev.c
237
XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RTC, val);
sys/dev/axgbe/xgbe-dev.c
243
xgbe_config_tx_threshold(struct xgbe_prv_data *pdata, unsigned int val)
sys/dev/axgbe/xgbe-dev.c
248
XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TTC, val);
sys/dev/axgbe/xgbe-dev.c
329
int val = XGMAC_DMA_IOREAD_BITS(pdata->channel[i], DMA_CH_CR, SPH);
sys/dev/axgbe/xgbe-dev.c
331
(val ? "enabled" : "disabled"), i);
sys/dev/axgbe/xgbe-dev.c
340
unsigned int index, unsigned int val)
sys/dev/axgbe/xgbe-dev.c
352
XGMAC_IOWRITE(pdata, MAC_RSSDR, val);
sys/dev/axgbe/xgbe-dev.c
860
unsigned int val = enable ? 1 : 0;
sys/dev/axgbe/xgbe-dev.c
862
if (XGMAC_IOREAD_BITS(pdata, MAC_PFR, PR) == val)
sys/dev/axgbe/xgbe-dev.c
867
XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, val);
sys/dev/axgbe/xgbe-dev.c
886
unsigned int val = enable ? 1 : 0;
sys/dev/axgbe/xgbe-dev.c
888
if (XGMAC_IOREAD_BITS(pdata, MAC_PFR, PM) == val)
sys/dev/axgbe/xgbe-dev.c
892
XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, val);
sys/dev/axgbe/xgbe-phy-v2.c
434
unsigned int val)
sys/dev/axgbe/xgbe-phy-v2.c
447
*redrv_val = cpu_to_be16(val);
sys/dev/axgbe/xgbe-phy-v2.c
495
xgbe_phy_i2c_write(struct xgbe_prv_data *pdata, unsigned int target, void *val,
sys/dev/axgbe/xgbe-phy-v2.c
507
i2c_op.buf = val;
sys/dev/axgbe/xgbe-phy-v2.c
517
unsigned int reg_len, void *val, unsigned int val_len)
sys/dev/axgbe/xgbe-phy-v2.c
546
i2c_op.buf = val;
sys/dev/axgbe/xgbe-phy-v2.c
648
uint16_t val)
sys/dev/axgbe/xgbe-phy-v2.c
660
return (pdata->hw_if.write_ext_mii_regs(pdata, addr, reg, val));
sys/dev/axgbe/xgbe-phy-v2.c
664
xgbe_phy_i2c_mii_write(struct xgbe_prv_data *pdata, int reg, uint16_t val)
sys/dev/axgbe/xgbe-phy-v2.c
676
*mii_val = cpu_to_be16(val);
sys/dev/axgbe/xgbe-phy-v2.c
687
xgbe_phy_mii_write(struct xgbe_prv_data *pdata, int addr, int reg, uint16_t val)
sys/dev/axgbe/xgbe-phy-v2.c
692
axgbe_printf(3, "%s: addr %d reg %d val %#x\n", __func__, addr, reg, val);
sys/dev/axgbe/xgbe-phy-v2.c
698
ret = xgbe_phy_i2c_mii_write(pdata, reg, val);
sys/dev/axgbe/xgbe-phy-v2.c
700
ret = xgbe_phy_mdio_mii_write(pdata, addr, reg, val);
sys/dev/axgbe/xgbe-sysctl.c
236
void get_val(char *buf, char **op, char **val, int *n_op);
sys/dev/axgbe/xgbe-sysctl.c
279
get_val(char *buf, char **op, char **val, int *n_op)
sys/dev/axgbe/xgbe-sysctl.c
303
val[*n_op][j] = buf[i++];
sys/dev/axgbe/xgbe-sysctl.c
305
val[*n_op][j+1] = '\0';
sys/dev/axgbe/xgbe-sysctl.c
425
char **op, **val;
sys/dev/axgbe/xgbe-sysctl.c
431
val = alloc_sysctl_buffer();
sys/dev/axgbe/xgbe-sysctl.c
432
get_val(buf, op, val, &n_op);
sys/dev/axgbe/xgbe-sysctl.c
445
if (!strcmp(val[i], "on"))
sys/dev/axgbe/xgbe-sysctl.c
448
else if (!strcmp(val[i], "off"))
sys/dev/axgbe/xgbe-sysctl.c
456
sscanf(val[i], "%u", &value);
sys/dev/axgbe/xgbe-sysctl.c
460
if (!strcmp(val[i], "half"))
sys/dev/axgbe/xgbe-sysctl.c
463
else if (!strcmp(val[i], "full"))
sys/dev/axgbe/xgbe-sysctl.c
480
free(val[i], M_AXGBE);
sys/dev/axgbe/xgbe-sysctl.c
481
free(val, M_AXGBE);
sys/dev/axgbe/xgbe.h
1333
uint16_t val);
sys/dev/axgbe/xgbe_osdep.h
210
unsigned long val;
sys/dev/axgbe/xgbe_osdep.h
212
val = *p;
sys/dev/axgbe/xgbe_osdep.h
213
return ((val & 1ul << pos) != 0);
sys/dev/bce/if_bce.c
10086
u32 cmd, ctl, cur_depth, max_depth, valid_cnt, val;
sys/dev/bce/if_bce.c
10099
val = (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PPQ_VALID_CNT << 24) |
sys/dev/bce/if_bce.c
10103
REG_WR(sc, BCE_HC_STAT_GEN_SEL_0, val);
sys/dev/bce/if_bce.c
10105
val = (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCHQ_VALID_CNT << 24) |
sys/dev/bce/if_bce.c
10109
REG_WR(sc, BCE_HC_STAT_GEN_SEL_1, val);
sys/dev/bce/if_bce.c
10111
val = (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPATQ_VALID_CNT << 24) |
sys/dev/bce/if_bce.c
10115
REG_WR(sc, BCE_HC_STAT_GEN_SEL_2, val);
sys/dev/bce/if_bce.c
10117
val = (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMQ_VALID_CNT << 24) |
sys/dev/bce/if_bce.c
10121
REG_WR(sc, BCE_HC_STAT_GEN_SEL_3, val);
sys/dev/bce/if_bce.c
10268
val = (BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSQ_VALID_CNT << 16) |
sys/dev/bce/if_bce.c
10273
val = val |
sys/dev/bce/if_bce.c
10276
REG_WR(sc, BCE_HC_STAT_GEN_SEL_0, val);
sys/dev/bce/if_bce.c
1044
u32 val;
sys/dev/bce/if_bce.c
10775
u32 val;
sys/dev/bce/if_bce.c
10784
val = REG_RD(sc, BCE_MISC_ENABLE_STATUS_BITS);
sys/dev/bce/if_bce.c
10786
val, BCE_MISC_ENABLE_STATUS_BITS);
sys/dev/bce/if_bce.c
10788
val = REG_RD(sc, BCE_DMA_STATUS);
sys/dev/bce/if_bce.c
10790
val, BCE_DMA_STATUS);
sys/dev/bce/if_bce.c
10792
val = REG_RD(sc, BCE_CTX_STATUS);
sys/dev/bce/if_bce.c
10794
val, BCE_CTX_STATUS);
sys/dev/bce/if_bce.c
10796
val = REG_RD(sc, BCE_EMAC_STATUS);
sys/dev/bce/if_bce.c
10798
val, BCE_EMAC_STATUS);
sys/dev/bce/if_bce.c
10800
val = REG_RD(sc, BCE_RPM_STATUS);
sys/dev/bce/if_bce.c
10802
val, BCE_RPM_STATUS);
sys/dev/bce/if_bce.c
10805
val = REG_RD(sc, 0x2004);
sys/dev/bce/if_bce.c
10807
val, 0x2004);
sys/dev/bce/if_bce.c
10809
val = REG_RD(sc, BCE_RV2P_STATUS);
sys/dev/bce/if_bce.c
10811
val, BCE_RV2P_STATUS);
sys/dev/bce/if_bce.c
10814
val = REG_RD(sc, 0x2c04);
sys/dev/bce/if_bce.c
10816
val, 0x2c04);
sys/dev/bce/if_bce.c
10818
val = REG_RD(sc, BCE_TBDR_STATUS);
sys/dev/bce/if_bce.c
10820
val, BCE_TBDR_STATUS);
sys/dev/bce/if_bce.c
10822
val = REG_RD(sc, BCE_TDMA_STATUS);
sys/dev/bce/if_bce.c
10824
val, BCE_TDMA_STATUS);
sys/dev/bce/if_bce.c
10826
val = REG_RD(sc, BCE_HC_STATUS);
sys/dev/bce/if_bce.c
10828
val, BCE_HC_STATUS);
sys/dev/bce/if_bce.c
10830
val = REG_RD_IND(sc, BCE_TXP_CPU_STATE);
sys/dev/bce/if_bce.c
10832
val, BCE_TXP_CPU_STATE);
sys/dev/bce/if_bce.c
10834
val = REG_RD_IND(sc, BCE_TPAT_CPU_STATE);
sys/dev/bce/if_bce.c
10836
val, BCE_TPAT_CPU_STATE);
sys/dev/bce/if_bce.c
10838
val = REG_RD_IND(sc, BCE_RXP_CPU_STATE);
sys/dev/bce/if_bce.c
10840
val, BCE_RXP_CPU_STATE);
sys/dev/bce/if_bce.c
10842
val = REG_RD_IND(sc, BCE_COM_CPU_STATE);
sys/dev/bce/if_bce.c
10844
val, BCE_COM_CPU_STATE);
sys/dev/bce/if_bce.c
10846
val = REG_RD_IND(sc, BCE_MCP_CPU_STATE);
sys/dev/bce/if_bce.c
10848
val, BCE_MCP_CPU_STATE);
sys/dev/bce/if_bce.c
10850
val = REG_RD_IND(sc, BCE_CP_CPU_STATE);
sys/dev/bce/if_bce.c
10852
val, BCE_CP_CPU_STATE);
sys/dev/bce/if_bce.c
10953
u32 val;
sys/dev/bce/if_bce.c
10962
val = bce_shmem_rd(sc, BCE_BC_RESET_TYPE);
sys/dev/bce/if_bce.c
10964
val, BCE_BC_RESET_TYPE);
sys/dev/bce/if_bce.c
10966
val = bce_shmem_rd(sc, BCE_BC_STATE);
sys/dev/bce/if_bce.c
10968
val, BCE_BC_STATE);
sys/dev/bce/if_bce.c
10970
val = bce_shmem_rd(sc, BCE_BC_STATE_CONDITION);
sys/dev/bce/if_bce.c
10972
val, BCE_BC_STATE_CONDITION);
sys/dev/bce/if_bce.c
10974
val = bce_shmem_rd(sc, BCE_BC_STATE_DEBUG_CMD);
sys/dev/bce/if_bce.c
10976
val, BCE_BC_STATE_DEBUG_CMD);
sys/dev/bce/if_bce.c
10993
u32 val;
sys/dev/bce/if_bce.c
11006
val = REG_RD_IND(sc, BCE_TXP_CPU_MODE);
sys/dev/bce/if_bce.c
11008
val, BCE_TXP_CPU_MODE);
sys/dev/bce/if_bce.c
11010
val = REG_RD_IND(sc, BCE_TXP_CPU_STATE);
sys/dev/bce/if_bce.c
11012
val, BCE_TXP_CPU_STATE);
sys/dev/bce/if_bce.c
11014
val = REG_RD_IND(sc, BCE_TXP_CPU_EVENT_MASK);
sys/dev/bce/if_bce.c
11016
val, BCE_TXP_CPU_EVENT_MASK);
sys/dev/bce/if_bce.c
11051
u32 val;
sys/dev/bce/if_bce.c
11065
val = REG_RD_IND(sc, BCE_RXP_CPU_MODE);
sys/dev/bce/if_bce.c
11067
val, BCE_RXP_CPU_MODE);
sys/dev/bce/if_bce.c
11069
val = REG_RD_IND(sc, BCE_RXP_CPU_STATE);
sys/dev/bce/if_bce.c
11071
val, BCE_RXP_CPU_STATE);
sys/dev/bce/if_bce.c
11073
val = REG_RD_IND(sc, BCE_RXP_CPU_EVENT_MASK);
sys/dev/bce/if_bce.c
11075
val, BCE_RXP_CPU_EVENT_MASK);
sys/dev/bce/if_bce.c
11110
u32 val;
sys/dev/bce/if_bce.c
11124
val = REG_RD_IND(sc, BCE_TPAT_CPU_MODE);
sys/dev/bce/if_bce.c
11126
val, BCE_TPAT_CPU_MODE);
sys/dev/bce/if_bce.c
11128
val = REG_RD_IND(sc, BCE_TPAT_CPU_STATE);
sys/dev/bce/if_bce.c
11130
val, BCE_TPAT_CPU_STATE);
sys/dev/bce/if_bce.c
11132
val = REG_RD_IND(sc, BCE_TPAT_CPU_EVENT_MASK);
sys/dev/bce/if_bce.c
11134
val, BCE_TPAT_CPU_EVENT_MASK);
sys/dev/bce/if_bce.c
11169
u32 val;
sys/dev/bce/if_bce.c
11183
val = REG_RD_IND(sc, BCE_CP_CPU_MODE);
sys/dev/bce/if_bce.c
11185
val, BCE_CP_CPU_MODE);
sys/dev/bce/if_bce.c
11187
val = REG_RD_IND(sc, BCE_CP_CPU_STATE);
sys/dev/bce/if_bce.c
11189
val, BCE_CP_CPU_STATE);
sys/dev/bce/if_bce.c
11191
val = REG_RD_IND(sc, BCE_CP_CPU_EVENT_MASK);
sys/dev/bce/if_bce.c
11192
BCE_PRINTF("0x%08X - (0x%06X) cp_cpu_event_mask\n", val,
sys/dev/bce/if_bce.c
11228
u32 val;
sys/dev/bce/if_bce.c
11242
val = REG_RD_IND(sc, BCE_COM_CPU_MODE);
sys/dev/bce/if_bce.c
11244
val, BCE_COM_CPU_MODE);
sys/dev/bce/if_bce.c
11246
val = REG_RD_IND(sc, BCE_COM_CPU_STATE);
sys/dev/bce/if_bce.c
11248
val, BCE_COM_CPU_STATE);
sys/dev/bce/if_bce.c
11250
val = REG_RD_IND(sc, BCE_COM_CPU_EVENT_MASK);
sys/dev/bce/if_bce.c
11251
BCE_PRINTF("0x%08X - (0x%06X) com_cpu_event_mask\n", val,
sys/dev/bce/if_bce.c
11285
u32 val, pc1, pc2, fw_ver_high, fw_ver_low;
sys/dev/bce/if_bce.c
11293
val = REG_RD_IND(sc, BCE_RV2P_CONFIG);
sys/dev/bce/if_bce.c
11294
val |= BCE_RV2P_CONFIG_STALL_PROC1 | BCE_RV2P_CONFIG_STALL_PROC2;
sys/dev/bce/if_bce.c
11295
REG_WR_IND(sc, BCE_RV2P_CONFIG, val);
sys/dev/bce/if_bce.c
11298
val = 0x00000001;
sys/dev/bce/if_bce.c
11299
REG_WR_IND(sc, BCE_RV2P_PROC1_ADDR_CMD, val);
sys/dev/bce/if_bce.c
11306
val = 0x00000001;
sys/dev/bce/if_bce.c
11307
REG_WR_IND(sc, BCE_RV2P_PROC2_ADDR_CMD, val);
sys/dev/bce/if_bce.c
11315
val = REG_RD_IND(sc, BCE_RV2P_CONFIG);
sys/dev/bce/if_bce.c
11316
val &= ~(BCE_RV2P_CONFIG_STALL_PROC1 | BCE_RV2P_CONFIG_STALL_PROC2);
sys/dev/bce/if_bce.c
11317
REG_WR_IND(sc, BCE_RV2P_CONFIG, val);
sys/dev/bce/if_bce.c
11320
val = 0x68007800;
sys/dev/bce/if_bce.c
11321
REG_WR_IND(sc, BCE_RV2P_DEBUG_VECT_PEEK, val);
sys/dev/bce/if_bce.c
11322
val = REG_RD_IND(sc, BCE_RV2P_DEBUG_VECT_PEEK);
sys/dev/bce/if_bce.c
11323
pc1 = (val & BCE_RV2P_DEBUG_VECT_PEEK_1_VALUE);
sys/dev/bce/if_bce.c
11324
pc2 = (val & BCE_RV2P_DEBUG_VECT_PEEK_2_VALUE) >> 16;
sys/dev/bce/if_bce.c
11329
val = 0x68007800;
sys/dev/bce/if_bce.c
11330
REG_WR_IND(sc, BCE_RV2P_DEBUG_VECT_PEEK, val);
sys/dev/bce/if_bce.c
11331
val = REG_RD_IND(sc, BCE_RV2P_DEBUG_VECT_PEEK);
sys/dev/bce/if_bce.c
11332
pc1 = (val & BCE_RV2P_DEBUG_VECT_PEEK_1_VALUE);
sys/dev/bce/if_bce.c
11333
pc2 = (val & BCE_RV2P_DEBUG_VECT_PEEK_2_VALUE) >> 16;
sys/dev/bce/if_bce.c
1196
val = REG_RD_IND(sc, BCE_SHM_HDR_SIGNATURE);
sys/dev/bce/if_bce.c
1197
if ((val & BCE_SHM_HDR_SIGNATURE_SIG_MASK) == BCE_SHM_HDR_SIGNATURE_SIG)
sys/dev/bce/if_bce.c
1208
val = bce_shmem_rd(sc, BCE_DEV_INFO_BC_REV);
sys/dev/bce/if_bce.c
1212
num = (u8) (val >> (24 - (i * 8)));
sys/dev/bce/if_bce.c
1225
val = bce_shmem_rd(sc, BCE_PORT_FEATURE);
sys/dev/bce/if_bce.c
1226
if (val & BCE_PORT_FEATURE_ASF_ENABLED) {
sys/dev/bce/if_bce.c
1231
val = bce_shmem_rd(sc, BCE_BC_STATE_CONDITION);
sys/dev/bce/if_bce.c
1232
if (val & BCE_CONDITION_MFW_RUN_MASK)
sys/dev/bce/if_bce.c
1238
val = bce_shmem_rd(sc, BCE_BC_STATE_CONDITION);
sys/dev/bce/if_bce.c
1239
val &= BCE_CONDITION_MFW_RUN_MASK;
sys/dev/bce/if_bce.c
1240
if ((val != BCE_CONDITION_MFW_RUN_UNKNOWN) &&
sys/dev/bce/if_bce.c
1241
(val != BCE_CONDITION_MFW_RUN_NONE)) {
sys/dev/bce/if_bce.c
1247
val = bce_reg_rd_ind(sc, addr + j * 4);
sys/dev/bce/if_bce.c
1248
val = bswap32(val);
sys/dev/bce/if_bce.c
1249
memcpy(&sc->bce_mfw_ver[i], &val, 4);
sys/dev/bce/if_bce.c
1263
val = REG_RD(sc, BCE_PCICFG_MISC_STATUS);
sys/dev/bce/if_bce.c
1264
if (val & BCE_PCICFG_MISC_STATUS_PCIX_DET) {
sys/dev/bce/if_bce.c
1298
if (val & BCE_PCICFG_MISC_STATUS_M66EN)
sys/dev/bce/if_bce.c
1304
if (val & BCE_PCICFG_MISC_STATUS_32BIT_DET)
sys/dev/bce/if_bce.c
1597
u32 val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, offset);
sys/dev/bce/if_bce.c
1599
__FUNCTION__, offset, val);
sys/dev/bce/if_bce.c
1600
return val;
sys/dev/bce/if_bce.c
1610
bce_reg_wr16(struct bce_softc *sc, u32 offset, u16 val)
sys/dev/bce/if_bce.c
1613
__FUNCTION__, offset, val);
sys/dev/bce/if_bce.c
1614
bus_space_write_2(sc->bce_btag, sc->bce_bhandle, offset, val);
sys/dev/bce/if_bce.c
1624
bce_reg_wr(struct bce_softc *sc, u32 offset, u32 val)
sys/dev/bce/if_bce.c
1627
__FUNCTION__, offset, val);
sys/dev/bce/if_bce.c
1628
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, offset, val);
sys/dev/bce/if_bce.c
1651
u32 val;
sys/dev/bce/if_bce.c
1652
val = pci_read_config(dev, BCE_PCICFG_REG_WINDOW, 4);
sys/dev/bce/if_bce.c
1654
__FUNCTION__, offset, val);
sys/dev/bce/if_bce.c
1655
return val;
sys/dev/bce/if_bce.c
1673
bce_reg_wr_ind(struct bce_softc *sc, u32 offset, u32 val)
sys/dev/bce/if_bce.c
1679
__FUNCTION__, offset, val);
sys/dev/bce/if_bce.c
1682
pci_write_config(dev, BCE_PCICFG_REG_WINDOW, val, 4);
sys/dev/bce/if_bce.c
1694
bce_shmem_wr(struct bce_softc *sc, u32 offset, u32 val)
sys/dev/bce/if_bce.c
1697
"0x%08X\n", __FUNCTION__, val, offset);
sys/dev/bce/if_bce.c
1699
bce_reg_wr_ind(sc, sc->bce_shmem_base + offset, val);
sys/dev/bce/if_bce.c
1713
u32 val = bce_reg_rd_ind(sc, sc->bce_shmem_base + offset);
sys/dev/bce/if_bce.c
1716
"0x%08X\n", __FUNCTION__, val, offset);
sys/dev/bce/if_bce.c
1718
return val;
sys/dev/bce/if_bce.c
1734
u32 idx, offset, retry_cnt = 5, val;
sys/dev/bce/if_bce.c
1746
val = REG_RD(sc, BCE_CTX_CTX_CTRL);
sys/dev/bce/if_bce.c
1747
if ((val & BCE_CTX_CTX_CTRL_READ_REQ) == 0)
sys/dev/bce/if_bce.c
1752
if (val & BCE_CTX_CTX_CTRL_READ_REQ)
sys/dev/bce/if_bce.c
1757
val = REG_RD(sc, BCE_CTX_CTX_DATA);
sys/dev/bce/if_bce.c
1760
val = REG_RD(sc, BCE_CTX_DATA);
sys/dev/bce/if_bce.c
1764
"val = 0x%08X\n", __FUNCTION__, cid_addr, ctx_offset, val);
sys/dev/bce/if_bce.c
1766
return(val);
sys/dev/bce/if_bce.c
1783
u32 val, retry_cnt = 5;
sys/dev/bce/if_bce.c
1797
val = REG_RD(sc, BCE_CTX_CTX_CTRL);
sys/dev/bce/if_bce.c
1798
if ((val & BCE_CTX_CTX_CTRL_WRITE_REQ) == 0)
sys/dev/bce/if_bce.c
1803
if (val & BCE_CTX_CTX_CTRL_WRITE_REQ)
sys/dev/bce/if_bce.c
1826
u32 val;
sys/dev/bce/if_bce.c
1842
val = REG_RD(sc, BCE_EMAC_MDIO_MODE);
sys/dev/bce/if_bce.c
1843
val &= ~BCE_EMAC_MDIO_MODE_AUTO_POLL;
sys/dev/bce/if_bce.c
1845
REG_WR(sc, BCE_EMAC_MDIO_MODE, val);
sys/dev/bce/if_bce.c
1851
val = BCE_MIPHY(phy) | BCE_MIREG(reg) |
sys/dev/bce/if_bce.c
1854
REG_WR(sc, BCE_EMAC_MDIO_COMM, val);
sys/dev/bce/if_bce.c
1859
val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
sys/dev/bce/if_bce.c
1860
if (!(val & BCE_EMAC_MDIO_COMM_START_BUSY)) {
sys/dev/bce/if_bce.c
1863
val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
sys/dev/bce/if_bce.c
1864
val &= BCE_EMAC_MDIO_COMM_DATA;
sys/dev/bce/if_bce.c
1870
if (val & BCE_EMAC_MDIO_COMM_START_BUSY) {
sys/dev/bce/if_bce.c
1873
val = 0x0;
sys/dev/bce/if_bce.c
1875
val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
sys/dev/bce/if_bce.c
1879
val = REG_RD(sc, BCE_EMAC_MDIO_MODE);
sys/dev/bce/if_bce.c
1880
val |= BCE_EMAC_MDIO_MODE_AUTO_POLL;
sys/dev/bce/if_bce.c
1882
REG_WR(sc, BCE_EMAC_MDIO_MODE, val);
sys/dev/bce/if_bce.c
1888
DB_PRINT_PHY_REG(reg, val);
sys/dev/bce/if_bce.c
1889
return (val & 0xffff);
sys/dev/bce/if_bce.c
1901
bce_miibus_write_reg(device_t dev, int phy, int reg, int val)
sys/dev/bce/if_bce.c
1909
DB_PRINT_PHY_REG(reg, val);
sys/dev/bce/if_bce.c
1931
val1 = BCE_MIPHY(phy) | BCE_MIREG(reg) | val |
sys/dev/bce/if_bce.c
1978
int media_active, media_status, val;
sys/dev/bce/if_bce.c
2000
val = REG_RD(sc, BCE_EMAC_MODE);
sys/dev/bce/if_bce.c
2001
val &= ~(BCE_EMAC_MODE_PORT | BCE_EMAC_MODE_HALF_DUPLEX |
sys/dev/bce/if_bce.c
2011
val |= BCE_EMAC_MODE_PORT_MII_10;
sys/dev/bce/if_bce.c
2017
val |= BCE_EMAC_MODE_PORT_MII;
sys/dev/bce/if_bce.c
2021
val |= BCE_EMAC_MODE_25G;
sys/dev/bce/if_bce.c
2026
val |= BCE_EMAC_MODE_PORT_GMII;
sys/dev/bce/if_bce.c
2031
val |= BCE_EMAC_MODE_PORT_GMII;
sys/dev/bce/if_bce.c
2038
val |= BCE_EMAC_MODE_HALF_DUPLEX;
sys/dev/bce/if_bce.c
2043
REG_WR(sc, BCE_EMAC_MODE, val);
sys/dev/bce/if_bce.c
2088
u32 val;
sys/dev/bce/if_bce.c
2096
val = REG_RD(sc, BCE_NVM_SW_ARB);
sys/dev/bce/if_bce.c
2097
if (val & BCE_NVM_SW_ARB_ARB_ARB2)
sys/dev/bce/if_bce.c
2125
u32 val;
sys/dev/bce/if_bce.c
2136
val = REG_RD(sc, BCE_NVM_SW_ARB);
sys/dev/bce/if_bce.c
2137
if (!(val & BCE_NVM_SW_ARB_ARB_ARB2))
sys/dev/bce/if_bce.c
2164
u32 val;
sys/dev/bce/if_bce.c
2169
val = REG_RD(sc, BCE_MISC_CFG);
sys/dev/bce/if_bce.c
2170
REG_WR(sc, BCE_MISC_CFG, val | BCE_MISC_CFG_NVM_WR_EN_PCI);
sys/dev/bce/if_bce.c
2181
val = REG_RD(sc, BCE_NVM_COMMAND);
sys/dev/bce/if_bce.c
2182
if (val & BCE_NVM_COMMAND_DONE)
sys/dev/bce/if_bce.c
2208
u32 val;
sys/dev/bce/if_bce.c
2212
val = REG_RD(sc, BCE_MISC_CFG);
sys/dev/bce/if_bce.c
2213
REG_WR(sc, BCE_MISC_CFG, val & ~BCE_MISC_CFG_NVM_WR_EN);
sys/dev/bce/if_bce.c
2232
u32 val;
sys/dev/bce/if_bce.c
2236
val = REG_RD(sc, BCE_NVM_ACCESS_ENABLE);
sys/dev/bce/if_bce.c
2238
REG_WR(sc, BCE_NVM_ACCESS_ENABLE, val |
sys/dev/bce/if_bce.c
2255
u32 val;
sys/dev/bce/if_bce.c
2259
val = REG_RD(sc, BCE_NVM_ACCESS_ENABLE);
sys/dev/bce/if_bce.c
2262
REG_WR(sc, BCE_NVM_ACCESS_ENABLE, val &
sys/dev/bce/if_bce.c
2304
u32 val;
sys/dev/bce/if_bce.c
2308
val = REG_RD(sc, BCE_NVM_COMMAND);
sys/dev/bce/if_bce.c
2309
if (val & BCE_NVM_COMMAND_DONE)
sys/dev/bce/if_bce.c
2362
u32 val;
sys/dev/bce/if_bce.c
2366
val = REG_RD(sc, BCE_NVM_COMMAND);
sys/dev/bce/if_bce.c
2367
if (val & BCE_NVM_COMMAND_DONE) {
sys/dev/bce/if_bce.c
2368
val = REG_RD(sc, BCE_NVM_READ);
sys/dev/bce/if_bce.c
2370
val = bce_be32toh(val);
sys/dev/bce/if_bce.c
2371
memcpy(ret_val, &val, 4);
sys/dev/bce/if_bce.c
2399
bce_nvram_write_dword(struct bce_softc *sc, u32 offset, u8 *val,
sys/dev/bce/if_bce.c
2422
memcpy(&val32, val, 4);
sys/dev/bce/if_bce.c
2458
u32 val;
sys/dev/bce/if_bce.c
2470
val = REG_RD(sc, BCE_NVM_CFG1);
sys/dev/bce/if_bce.c
2481
if (val & 0x40000000) {
sys/dev/bce/if_bce.c
2489
if ((val & FLASH_BACKUP_STRAP_MASK) ==
sys/dev/bce/if_bce.c
2502
if (val & (1 << 23))
sys/dev/bce/if_bce.c
2510
if ((val & mask) == (flash->strapping & mask)) {
sys/dev/bce/if_bce.c
2543
val = bce_shmem_rd(sc, BCE_SHARED_HW_CFG_CONFIG2);
sys/dev/bce/if_bce.c
2544
val &= BCE_SHARED_HW_CFG2_NVM_SIZE_MASK;
sys/dev/bce/if_bce.c
2545
if (val)
sys/dev/bce/if_bce.c
2546
sc->bce_flash_size = val;
sys/dev/bce/if_bce.c
3014
u32 val;
sys/dev/bce/if_bce.c
3022
u32 val = REG_RD(sc, BCE_MISC_DUAL_MEDIA_CTRL);
sys/dev/bce/if_bce.c
3023
u32 bond_id = val & BCE_MISC_DUAL_MEDIA_CTRL_BOND_ID;
sys/dev/bce/if_bce.c
3041
if (val & BCE_MISC_DUAL_MEDIA_CTRL_STRAP_OVERRIDE)
sys/dev/bce/if_bce.c
3042
strap = (val &
sys/dev/bce/if_bce.c
3045
strap = (val &
sys/dev/bce/if_bce.c
3091
val = bce_shmem_rd(sc, BCE_SHARED_HW_CFG_CONFIG);
sys/dev/bce/if_bce.c
3092
if (val & BCE_SHARED_HW_CFG_PHY_2_5G) {
sys/dev/bce/if_bce.c
3863
u32 val;
sys/dev/bce/if_bce.c
3886
val = bce_shmem_rd(sc, BCE_FW_MB);
sys/dev/bce/if_bce.c
3887
if ((val & BCE_FW_MSG_ACK) == (msg_data & BCE_DRV_MSG_SEQ))
sys/dev/bce/if_bce.c
3893
if (((val & BCE_FW_MSG_ACK) != (msg_data & BCE_DRV_MSG_SEQ)) &&
sys/dev/bce/if_bce.c
3923
u32 val;
sys/dev/bce/if_bce.c
3939
val = (i / 8) | BCE_RV2P_PROC1_ADDR_CMD_RDWR;
sys/dev/bce/if_bce.c
3940
REG_WR(sc, BCE_RV2P_PROC1_ADDR_CMD, val);
sys/dev/bce/if_bce.c
3943
val = (i / 8) | BCE_RV2P_PROC2_ADDR_CMD_RDWR;
sys/dev/bce/if_bce.c
3944
REG_WR(sc, BCE_RV2P_PROC2_ADDR_CMD, val);
sys/dev/bce/if_bce.c
4047
u32 val;
sys/dev/bce/if_bce.c
4052
val = REG_RD_IND(sc, cpu_reg->mode);
sys/dev/bce/if_bce.c
4053
val &= ~cpu_reg->mode_value_halt;
sys/dev/bce/if_bce.c
4055
REG_WR_IND(sc, cpu_reg->mode, val);
sys/dev/bce/if_bce.c
4069
u32 val;
sys/dev/bce/if_bce.c
4074
val = REG_RD_IND(sc, cpu_reg->mode);
sys/dev/bce/if_bce.c
4075
val |= cpu_reg->mode_value_halt;
sys/dev/bce/if_bce.c
4076
REG_WR_IND(sc, cpu_reg->mode, val);
sys/dev/bce/if_bce.c
4648
u32 offset, val, vcid_addr;
sys/dev/bce/if_bce.c
4664
val = BCE_CTX_COMMAND_ENABLED |
sys/dev/bce/if_bce.c
4666
val |= (BCM_PAGE_BITS - 8) << 16;
sys/dev/bce/if_bce.c
4667
REG_WR(sc, BCE_CTX_COMMAND, val);
sys/dev/bce/if_bce.c
4671
val = REG_RD(sc, BCE_CTX_COMMAND);
sys/dev/bce/if_bce.c
4672
if (!(val & BCE_CTX_COMMAND_MEM_INIT))
sys/dev/bce/if_bce.c
4676
if ((val & BCE_CTX_COMMAND_MEM_INIT) != 0) {
sys/dev/bce/if_bce.c
4695
val = REG_RD(sc, BCE_CTX_HOST_PAGE_TBL_CTRL);
sys/dev/bce/if_bce.c
4696
if ((val &
sys/dev/bce/if_bce.c
4701
if ((val & BCE_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) != 0) {
sys/dev/bce/if_bce.c
4788
u32 val;
sys/dev/bce/if_bce.c
4797
val = (mac_addr[0] << 8) | mac_addr[1];
sys/dev/bce/if_bce.c
4799
REG_WR(sc, BCE_EMAC_MAC_MATCH0, val);
sys/dev/bce/if_bce.c
4801
val = (mac_addr[2] << 24) | (mac_addr[3] << 16) |
sys/dev/bce/if_bce.c
4804
REG_WR(sc, BCE_EMAC_MAC_MATCH1, val);
sys/dev/bce/if_bce.c
4856
u32 emac_mode_save, val;
sys/dev/bce/if_bce.c
4881
val = REG_RD(sc, BCE_MISC_ENABLE_CLR_BITS);
sys/dev/bce/if_bce.c
4886
val = REG_RD(sc, BCE_MISC_NEW_CORE_CTL);
sys/dev/bce/if_bce.c
4887
val &= ~BCE_MISC_NEW_CORE_CTL_DMA_ENABLE;
sys/dev/bce/if_bce.c
4888
REG_WR(sc, BCE_MISC_NEW_CORE_CTL, val);
sys/dev/bce/if_bce.c
4904
val = REG_RD(sc, BCE_MISC_ID);
sys/dev/bce/if_bce.c
4912
val = BCE_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
sys/dev/bce/if_bce.c
4915
pci_write_config(sc->bce_dev, BCE_PCICFG_MISC_CONFIG, val, 4);
sys/dev/bce/if_bce.c
4917
val = BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |
sys/dev/bce/if_bce.c
4920
REG_WR(sc, BCE_PCICFG_MISC_CONFIG, val);
sys/dev/bce/if_bce.c
4924
val = REG_RD(sc, BCE_PCICFG_MISC_CONFIG);
sys/dev/bce/if_bce.c
4925
if ((val & (BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |
sys/dev/bce/if_bce.c
4933
if (val & (BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |
sys/dev/bce/if_bce.c
4943
val = REG_RD(sc, BCE_PCI_SWAP_DIAG0);
sys/dev/bce/if_bce.c
4944
if (val != 0x01020304) {
sys/dev/bce/if_bce.c
4966
val = REG_RD(sc, BCE_EMAC_MODE);
sys/dev/bce/if_bce.c
4967
val = (val & ~emac_mode_mask) | emac_mode_save;
sys/dev/bce/if_bce.c
4968
REG_WR(sc, BCE_EMAC_MODE, val);
sys/dev/bce/if_bce.c
4978
u32 val;
sys/dev/bce/if_bce.c
4989
val = BCE_DMA_CONFIG_DATA_BYTE_SWAP |
sys/dev/bce/if_bce.c
4998
val |= (0x2 << 20) | BCE_DMA_CONFIG_CNTL_PCI_COMP_DLY;
sys/dev/bce/if_bce.c
5001
val |= BCE_DMA_CONFIG_PCI_FAST_CLK_CMP;
sys/dev/bce/if_bce.c
5011
val |= BCE_DMA_CONFIG_CNTL_PING_PONG_DMA;
sys/dev/bce/if_bce.c
5013
REG_WR(sc, BCE_DMA_CONFIG, val);
sys/dev/bce/if_bce.c
5030
val = REG_RD(sc, BCE_RPM_MGMT_PKT_CTRL) | BCE_RPM_MGMT_PKT_CTRL_MGMT_EN;
sys/dev/bce/if_bce.c
5031
REG_WR(sc, BCE_RPM_MGMT_PKT_CTRL, val);
sys/dev/bce/if_bce.c
5039
val = REG_RD(sc, BCE_MQ_CONFIG);
sys/dev/bce/if_bce.c
5040
val &= ~BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE;
sys/dev/bce/if_bce.c
5041
val |= BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256;
sys/dev/bce/if_bce.c
5045
val |= BCE_MQ_CONFIG_BIN_MQ_MODE;
sys/dev/bce/if_bce.c
5047
val |= BCE_MQ_CONFIG_HALT_DIS;
sys/dev/bce/if_bce.c
5050
REG_WR(sc, BCE_MQ_CONFIG, val);
sys/dev/bce/if_bce.c
5052
val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_CTX_SIZE);
sys/dev/bce/if_bce.c
5053
REG_WR(sc, BCE_MQ_KNL_BYP_WIND_START, val);
sys/dev/bce/if_bce.c
5054
REG_WR(sc, BCE_MQ_KNL_WIND_END, val);
sys/dev/bce/if_bce.c
5057
val = (BCM_PAGE_BITS - 8) << 24;
sys/dev/bce/if_bce.c
5058
REG_WR(sc, BCE_RV2P_CONFIG, val);
sys/dev/bce/if_bce.c
5061
val = REG_RD(sc, BCE_TBDR_CONFIG);
sys/dev/bce/if_bce.c
5062
val &= ~BCE_TBDR_CONFIG_PAGE_SIZE;
sys/dev/bce/if_bce.c
5063
val |= (BCM_PAGE_BITS - 8) << 24 | 0x40;
sys/dev/bce/if_bce.c
5064
REG_WR(sc, BCE_TBDR_CONFIG, val);
sys/dev/bce/if_bce.c
5084
u32 reg, val;
sys/dev/bce/if_bce.c
5093
val = sc->eaddr[0] + (sc->eaddr[1] << 8) +
sys/dev/bce/if_bce.c
5096
REG_WR(sc, BCE_EMAC_BACKOFF_SEED, val);
sys/dev/bce/if_bce.c
5140
val = BCE_HC_CONFIG_RX_TMR_MODE | BCE_HC_CONFIG_TX_TMR_MODE |
sys/dev/bce/if_bce.c
5161
val |= BCE_HC_CONFIG_SB_ADDR_INC_128B;
sys/dev/bce/if_bce.c
5170
val |= BCE_HC_CONFIG_ONE_SHOT;
sys/dev/bce/if_bce.c
5174
val |= BCE_HC_CONFIG_SB_ADDR_INC_128B;
sys/dev/bce/if_bce.c
5177
REG_WR(sc, BCE_HC_CONFIG, val);
sys/dev/bce/if_bce.c
5202
val = REG_RD(sc, BCE_MISC_NEW_CORE_CTL);
sys/dev/bce/if_bce.c
5203
val |= BCE_MISC_NEW_CORE_CTL_DMA_ENABLE;
sys/dev/bce/if_bce.c
5204
REG_WR(sc, BCE_MISC_NEW_CORE_CTL, val);
sys/dev/bce/if_bce.c
5219
val = REG_RD(sc, BCE_RPM_MGMT_PKT_CTRL) &
sys/dev/bce/if_bce.c
5221
REG_WR(sc, BCE_RPM_MGMT_PKT_CTRL, val);
sys/dev/bce/if_bce.c
5470
u32 val;
sys/dev/bce/if_bce.c
5477
val = BCE_L2CTX_TX_TYPE_TYPE_L2_XI |
sys/dev/bce/if_bce.c
5479
CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TX_TYPE_XI, val);
sys/dev/bce/if_bce.c
5480
val = BCE_L2CTX_TX_CMD_TYPE_TYPE_L2_XI | (8 << 16);
sys/dev/bce/if_bce.c
5482
BCE_L2CTX_TX_CMD_TYPE_XI, val);
sys/dev/bce/if_bce.c
5485
val = BCE_ADDR_HI(sc->tx_bd_chain_paddr[0]);
sys/dev/bce/if_bce.c
5487
BCE_L2CTX_TX_TBDR_BHADDR_HI_XI, val);
sys/dev/bce/if_bce.c
5488
val = BCE_ADDR_LO(sc->tx_bd_chain_paddr[0]);
sys/dev/bce/if_bce.c
5490
BCE_L2CTX_TX_TBDR_BHADDR_LO_XI, val);
sys/dev/bce/if_bce.c
5493
val = BCE_L2CTX_TX_TYPE_TYPE_L2 | BCE_L2CTX_TX_TYPE_SIZE_L2;
sys/dev/bce/if_bce.c
5494
CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TX_TYPE, val);
sys/dev/bce/if_bce.c
5495
val = BCE_L2CTX_TX_CMD_TYPE_TYPE_L2 | (8 << 16);
sys/dev/bce/if_bce.c
5496
CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TX_CMD_TYPE, val);
sys/dev/bce/if_bce.c
5499
val = BCE_ADDR_HI(sc->tx_bd_chain_paddr[0]);
sys/dev/bce/if_bce.c
5501
BCE_L2CTX_TX_TBDR_BHADDR_HI, val);
sys/dev/bce/if_bce.c
5502
val = BCE_ADDR_LO(sc->tx_bd_chain_paddr[0]);
sys/dev/bce/if_bce.c
5504
BCE_L2CTX_TX_TBDR_BHADDR_LO, val);
sys/dev/bce/if_bce.c
5619
u32 val;
sys/dev/bce/if_bce.c
5624
val = BCE_L2CTX_RX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
sys/dev/bce/if_bce.c
5662
val |= (lo_water << BCE_L2CTX_RX_LO_WATER_MARK_SHIFT) |
sys/dev/bce/if_bce.c
5666
CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_CTX_TYPE, val);
sys/dev/bce/if_bce.c
5670
val = REG_RD(sc, BCE_MQ_MAP_L2_5);
sys/dev/bce/if_bce.c
5671
REG_WR(sc, BCE_MQ_MAP_L2_5, val | BCE_MQ_MAP_L2_5_ARM);
sys/dev/bce/if_bce.c
5675
val = BCE_ADDR_HI(sc->rx_bd_chain_paddr[0]);
sys/dev/bce/if_bce.c
5676
CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_NX_BDHADDR_HI, val);
sys/dev/bce/if_bce.c
5677
val = BCE_ADDR_LO(sc->rx_bd_chain_paddr[0]);
sys/dev/bce/if_bce.c
5678
CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_NX_BDHADDR_LO, val);
sys/dev/bce/if_bce.c
5847
u32 val;
sys/dev/bce/if_bce.c
5886
val = (sc->rx_bd_mbuf_data_len << 16) | MCLBYTES;
sys/dev/bce/if_bce.c
5887
CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_PG_BUF_SIZE, val);
sys/dev/bce/if_bce.c
5894
val = BCE_ADDR_HI(sc->pg_bd_chain_paddr[0]);
sys/dev/bce/if_bce.c
5895
CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_NX_PG_BDHADDR_HI, val);
sys/dev/bce/if_bce.c
5896
val = BCE_ADDR_LO(sc->pg_bd_chain_paddr[0]);
sys/dev/bce/if_bce.c
5897
CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_NX_PG_BDHADDR_LO, val);
sys/dev/bce/if_bce.c
8738
u32 val[1];
sys/dev/bce/if_bce.c
8739
u8 *data = (u8 *) val;
sys/dev/bce/if_bce.c
8748
BCE_PRINTF("offset 0x%08X = 0x%08X\n", result, bce_be32toh(val[0]));
sys/dev/bce/if_bce.c
8765
u32 val, result;
sys/dev/bce/if_bce.c
8774
val = REG_RD(sc, result);
sys/dev/bce/if_bce.c
8775
BCE_PRINTF("reg 0x%08X = 0x%08X\n", result, val);
sys/dev/bce/if_bce.c
8777
val = REG_RD_IND(sc, result);
sys/dev/bce/if_bce.c
8778
BCE_PRINTF("reg 0x%08X = 0x%08X\n", result, val);
sys/dev/bce/if_bce.c
8797
u16 val;
sys/dev/bce/if_bce.c
8808
val = bce_miibus_read_reg(dev, sc->bce_phy_addr, result);
sys/dev/bce/if_bce.c
8809
BCE_PRINTF("phy 0x%02X = 0x%04X\n", result, val);
sys/dev/bce/if_bce.c
9503
u32 val;
sys/dev/bce/if_bce.c
9504
val = REG_RD(sc, BCE_MISC_COMMAND);
sys/dev/bce/if_bce.c
9505
val |= BCE_MISC_COMMAND_DISABLE_ALL;
sys/dev/bce/if_bce.c
9506
REG_WR(sc, BCE_MISC_COMMAND, val);
sys/dev/bce/if_bce.c
9519
u32 val;
sys/dev/bce/if_bce.c
9520
val = REG_RD(sc, BCE_MISC_COMMAND);
sys/dev/bce/if_bce.c
9521
val |= BCE_MISC_COMMAND_ENABLE_ALL;
sys/dev/bce/if_bce.c
9522
REG_WR(sc, BCE_MISC_COMMAND, val);
sys/dev/bce/if_bcereg.h
1053
#define REG_WR(sc, offset, val) bce_reg_wr(sc, offset, val)
sys/dev/bce/if_bcereg.h
1054
#define REG_WR16(sc, offset, val) bce_reg_wr16(sc, offset, val)
sys/dev/bce/if_bcereg.h
1057
#define REG_WR(sc, offset, val) \
sys/dev/bce/if_bcereg.h
1058
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, offset, val)
sys/dev/bce/if_bcereg.h
1059
#define REG_WR16(sc, offset, val) \
sys/dev/bce/if_bcereg.h
1060
bus_space_write_2(sc->bce_btag, sc->bce_bhandle, offset, val)
sys/dev/bce/if_bcereg.h
1066
#define REG_WR_IND(sc, offset, val) bce_reg_wr_ind(sc, offset, val)
sys/dev/bce/if_bcereg.h
1067
#define CTX_WR(sc, cid_addr, offset, val)bce_ctx_wr(sc, cid_addr, offset, val)
sys/dev/bce/if_bcereg.h
429
#define DB_PRINT_PHY_REG(reg, val) \
sys/dev/bce/if_bcereg.h
433
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff, \
sys/dev/bce/if_bcereg.h
437
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff, \
sys/dev/bce/if_bcereg.h
441
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff, \
sys/dev/bce/if_bcereg.h
445
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff, \
sys/dev/bce/if_bcereg.h
449
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff, \
sys/dev/bce/if_bcereg.h
453
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff, \
sys/dev/bce/if_bcereg.h
457
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff, \
sys/dev/bce/if_bcereg.h
461
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff, \
sys/dev/bce/if_bcereg.h
465
__FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff); \
sys/dev/bce/if_bcereg.h
486
#define DB_PRINT_PHY_REG(reg, val)
sys/dev/bfe/if_bfe.c
1023
u_int32_t val;
sys/dev/bfe/if_bfe.c
1036
val = CSR_READ_4(sc, BFE_SBIMSTATE);
sys/dev/bfe/if_bfe.c
1037
if (val & (BFE_IBE | BFE_TO))
sys/dev/bfe/if_bfe.c
1038
CSR_WRITE_4(sc, BFE_SBIMSTATE, val & ~(BFE_IBE | BFE_TO));
sys/dev/bfe/if_bfe.c
1054
u_int32_t val;
sys/dev/bfe/if_bfe.c
1056
val = ((u_int32_t) data[2]) << 24;
sys/dev/bfe/if_bfe.c
1057
val |= ((u_int32_t) data[3]) << 16;
sys/dev/bfe/if_bfe.c
1058
val |= ((u_int32_t) data[4]) << 8;
sys/dev/bfe/if_bfe.c
1059
val |= ((u_int32_t) data[5]);
sys/dev/bfe/if_bfe.c
1060
CSR_WRITE_4(sc, BFE_CAM_DATA_LO, val);
sys/dev/bfe/if_bfe.c
1061
val = (BFE_CAM_HI_VALID |
sys/dev/bfe/if_bfe.c
1064
CSR_WRITE_4(sc, BFE_CAM_DATA_HI, val);
sys/dev/bfe/if_bfe.c
1084
u_int32_t val;
sys/dev/bfe/if_bfe.c
1088
val = CSR_READ_4(sc, BFE_RXCONF);
sys/dev/bfe/if_bfe.c
1091
val |= BFE_RXCONF_PROMISC;
sys/dev/bfe/if_bfe.c
1093
val &= ~BFE_RXCONF_PROMISC;
sys/dev/bfe/if_bfe.c
1096
val &= ~BFE_RXCONF_DBCAST;
sys/dev/bfe/if_bfe.c
1098
val |= BFE_RXCONF_DBCAST;
sys/dev/bfe/if_bfe.c
1104
val |= BFE_RXCONF_ALLMULTI;
sys/dev/bfe/if_bfe.c
1106
val &= ~BFE_RXCONF_ALLMULTI;
sys/dev/bfe/if_bfe.c
1110
CSR_WRITE_4(sc, BFE_RXCONF, val);
sys/dev/bfe/if_bfe.c
1163
u_int32_t val = CSR_READ_4(sc, reg);
sys/dev/bfe/if_bfe.c
1165
if (clear && !(val & bit))
sys/dev/bfe/if_bfe.c
1167
if (!clear && (val & bit))
sys/dev/bfe/if_bfe.c
1181
bfe_readphy(struct bfe_softc *sc, u_int32_t reg, u_int32_t *val)
sys/dev/bfe/if_bfe.c
1193
*val = CSR_READ_4(sc, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA;
sys/dev/bfe/if_bfe.c
1199
bfe_writephy(struct bfe_softc *sc, u_int32_t reg, u_int32_t val)
sys/dev/bfe/if_bfe.c
1209
(val & BFE_MDIO_DATA_DATA)));
sys/dev/bfe/if_bfe.c
1222
u_int32_t val;
sys/dev/bfe/if_bfe.c
1225
bfe_readphy(sc, 26, &val);
sys/dev/bfe/if_bfe.c
1226
bfe_writephy(sc, 26, val & 0x7fff);
sys/dev/bfe/if_bfe.c
1227
bfe_readphy(sc, 26, &val);
sys/dev/bfe/if_bfe.c
1230
bfe_readphy(sc, 27, &val);
sys/dev/bfe/if_bfe.c
1231
bfe_writephy(sc, 27, val | (1 << 6));
sys/dev/bfe/if_bfe.c
1242
uint32_t reg, *val;
sys/dev/bfe/if_bfe.c
1246
val = mib;
sys/dev/bfe/if_bfe.c
1249
*val++ = CSR_READ_4(sc, reg);
sys/dev/bfe/if_bfe.c
1251
*val++ = CSR_READ_4(sc, reg);
sys/dev/bfe/if_bfe.c
627
bfe_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/bfe/if_bfe.c
632
bfe_writephy(sc, reg, val);
sys/dev/bfe/if_bfe.c
642
u_int32_t val;
sys/dev/bfe/if_bfe.c
664
val = CSR_READ_4(sc, BFE_TX_CTRL);
sys/dev/bfe/if_bfe.c
665
val &= ~BFE_TX_DUPLEX;
sys/dev/bfe/if_bfe.c
667
val |= BFE_TX_DUPLEX;
sys/dev/bfe/if_bfe.c
684
CSR_WRITE_4(sc, BFE_TX_CTRL, val);
sys/dev/bfe/if_bfe.c
854
u_int32_t bar_orig, val;
sys/dev/bfe/if_bfe.c
859
val = CSR_READ_4(sc, BFE_SBINTVEC);
sys/dev/bfe/if_bfe.c
860
val |= cores;
sys/dev/bfe/if_bfe.c
861
CSR_WRITE_4(sc, BFE_SBINTVEC, val);
sys/dev/bfe/if_bfe.c
863
val = CSR_READ_4(sc, BFE_SSB_PCI_TRANS_2);
sys/dev/bfe/if_bfe.c
864
val |= BFE_SSB_PCI_PREF | BFE_SSB_PCI_BURST;
sys/dev/bfe/if_bfe.c
865
CSR_WRITE_4(sc, BFE_SSB_PCI_TRANS_2, val);
sys/dev/bfe/if_bfe.c
887
u_int32_t val;
sys/dev/bfe/if_bfe.c
891
bfe_readphy(sc, 0, &val);
sys/dev/bfe/if_bfe.c
892
if (val & BMCR_RESET) {
sys/dev/bfe/if_bfe.c
918
u_int32_t val;
sys/dev/bfe/if_bfe.c
926
val = CSR_READ_4(sc, BFE_SBTMSLOW) &
sys/dev/bfe/if_bfe.c
928
if (val == BFE_CLOCK) {
sys/dev/bfe/if_bfe.c
953
val = CSR_READ_4(sc, BFE_DEVCTRL);
sys/dev/bfe/if_bfe.c
954
if (!(val & BFE_IPP))
sys/dev/bfe/if_bfereg.h
446
#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->bfe_res, reg, val)
sys/dev/bfe/if_bfereg.h
448
#define BFE_OR(sc, name, val) \
sys/dev/bfe/if_bfereg.h
449
CSR_WRITE_4(sc, name, CSR_READ_4(sc, name) | val)
sys/dev/bfe/if_bfereg.h
451
#define BFE_AND(sc, name, val) \
sys/dev/bfe/if_bfereg.h
452
CSR_WRITE_4(sc, name, CSR_READ_4(sc, name) & val)
sys/dev/bge/if_bge.c
1097
uint32_t val;
sys/dev/bge/if_bge.c
1118
val = CSR_READ_4(sc, BGE_MI_COMM);
sys/dev/bge/if_bge.c
1119
if ((val & BGE_MICOMM_BUSY) == 0) {
sys/dev/bge/if_bge.c
1121
val = CSR_READ_4(sc, BGE_MI_COMM);
sys/dev/bge/if_bge.c
1129
phy, reg, val);
sys/dev/bge/if_bge.c
1130
val = 0;
sys/dev/bge/if_bge.c
1141
if (val & BGE_MICOMM_READFAIL)
sys/dev/bge/if_bge.c
1144
return (val & 0xFFFF);
sys/dev/bge/if_bge.c
1148
bge_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/bge/if_bge.c
1170
BGE_MIPHY(phy) | BGE_MIREG(reg) | val);
sys/dev/bge/if_bge.c
1192
phy, reg, val);
sys/dev/bge/if_bge.c
1735
uint16_t val;
sys/dev/bge/if_bge.c
1762
val = pci_read_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, 2);
sys/dev/bge/if_bge.c
1763
val |= (1 << 10) | (1 << 12) | (1 << 13);
sys/dev/bge/if_bge.c
1764
pci_write_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, val, 2);
sys/dev/bge/if_bge.c
1925
uint32_t dmactl, rdmareg, val;
sys/dev/bge/if_bge.c
1981
val = BGE_BMANMODE_ENABLE | BGE_BMANMODE_LOMBUF_ATTN;
sys/dev/bge/if_bge.c
1989
val |= BGE_BMANMODE_NO_TX_UNDERRUN;
sys/dev/bge/if_bge.c
1990
CSR_WRITE_4(sc, BGE_BMAN_MODE, val);
sys/dev/bge/if_bge.c
2176
val = 8;
sys/dev/bge/if_bge.c
2178
val = BGE_STD_RX_RING_CNT / 8;
sys/dev/bge/if_bge.c
2179
CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, val);
sys/dev/bge/if_bge.c
2279
val = 0x2620;
sys/dev/bge/if_bge.c
2282
val |= CSR_READ_4(sc, BGE_TX_LENGTHS) &
sys/dev/bge/if_bge.c
2284
CSR_WRITE_4(sc, BGE_TX_LENGTHS, val);
sys/dev/bge/if_bge.c
2350
val = BGE_STATBLKSZ_FULL;
sys/dev/bge/if_bge.c
2353
val = BGE_STATBLKSZ_32BYTE;
sys/dev/bge/if_bge.c
2361
CSR_WRITE_4(sc, BGE_HCC_MODE, val | BGE_HCCMODE_ENABLE);
sys/dev/bge/if_bge.c
2375
val = BGE_MACMODE_TXDMA_ENB | BGE_MACMODE_RXDMA_ENB |
sys/dev/bge/if_bge.c
2381
val |= BGE_PORTMODE_TBI;
sys/dev/bge/if_bge.c
2383
val |= BGE_PORTMODE_GMII;
sys/dev/bge/if_bge.c
2385
val |= BGE_PORTMODE_MII;
sys/dev/bge/if_bge.c
2389
val |= BGE_MACMODE_APE_RX_EN | BGE_MACMODE_APE_TX_EN;
sys/dev/bge/if_bge.c
2391
CSR_WRITE_4(sc, BGE_MAC_MODE, val);
sys/dev/bge/if_bge.c
2409
val = BGE_WDMAMODE_ENABLE | BGE_WDMAMODE_ALL_ATTNS;
sys/dev/bge/if_bge.c
2413
val |= BGE_WDMAMODE_STATUS_TAG_FIX;
sys/dev/bge/if_bge.c
2417
val |= BGE_WDMAMODE_BURST_ALL_DATA;
sys/dev/bge/if_bge.c
2420
CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
sys/dev/bge/if_bge.c
2424
val = BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS;
sys/dev/bge/if_bge.c
2427
val |= BGE_RDMAMODE_MULT_DMA_RD_DIS;
sys/dev/bge/if_bge.c
2432
val |= BGE_RDMAMODE_BD_SBD_CRPT_ATTN |
sys/dev/bge/if_bge.c
2436
val |= BGE_RDMAMODE_FIFO_LONG_BURST;
sys/dev/bge/if_bge.c
2438
val |= BGE_RDMAMODE_TSO4_ENABLE;
sys/dev/bge/if_bge.c
2442
val |= BGE_RDMAMODE_TSO6_ENABLE;
sys/dev/bge/if_bge.c
2447
val |= CSR_READ_4(sc, BGE_RDMA_MODE) &
sys/dev/bge/if_bge.c
2453
val &= ~BGE_RDMAMODE_MULT_DMA_RD_DIS;
sys/dev/bge/if_bge.c
2509
CSR_WRITE_4(sc, BGE_RDMA_MODE, val);
sys/dev/bge/if_bge.c
2514
val = CSR_READ_4(sc, BGE_RDMA_LENGTH + i * 4);
sys/dev/bge/if_bge.c
2515
if ((val & 0xFFFF) > BGE_FRAMELEN)
sys/dev/bge/if_bge.c
2517
if (((val >> 16) & 0xFFFF) > BGE_FRAMELEN)
sys/dev/bge/if_bge.c
2521
val = CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL);
sys/dev/bge/if_bge.c
2523
val |= BGE_RDMA_TX_LENGTH_WA_5719;
sys/dev/bge/if_bge.c
2525
val |= BGE_RDMA_TX_LENGTH_WA_5720;
sys/dev/bge/if_bge.c
2526
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL, val);
sys/dev/bge/if_bge.c
2547
val = BGE_SDCMODE_ENABLE;
sys/dev/bge/if_bge.c
2549
val |= BGE_SDCMODE_CDELAY;
sys/dev/bge/if_bge.c
2550
CSR_WRITE_4(sc, BGE_SDC_MODE, val);
sys/dev/bge/if_bge.c
4011
uint32_t cachesize, command, mac_mode, mac_mode_mask, reset, val;
sys/dev/bge/if_bge.c
4089
val = CSR_READ_4(sc, BGE_VCPU_STATUS);
sys/dev/bge/if_bge.c
4091
val | BGE_VCPU_STATUS_DRV_RESET);
sys/dev/bge/if_bge.c
4092
val = CSR_READ_4(sc, BGE_VCPU_EXT_CTRL);
sys/dev/bge/if_bge.c
4094
val & ~BGE_VCPU_EXT_CTRL_HALT_CPU);
sys/dev/bge/if_bge.c
4117
val = pci_read_config(dev, 0xC4, 4);
sys/dev/bge/if_bge.c
4118
pci_write_config(dev, 0xC4, val | (1 << 15), 4);
sys/dev/bge/if_bge.c
4139
val = BGE_PCISTATE_ROM_ENABLE | BGE_PCISTATE_ROM_RETRY_ENABLE;
sys/dev/bge/if_bge.c
4142
val |= BGE_PCISTATE_RETRY_SAME_DMA;
sys/dev/bge/if_bge.c
4144
val |= BGE_PCISTATE_ALLOW_APE_CTLSPC_WR |
sys/dev/bge/if_bge.c
4147
pci_write_config(dev, BGE_PCI_PCISTATE, val, 4);
sys/dev/bge/if_bge.c
4174
val = pci_read_config(dev,
sys/dev/bge/if_bge.c
4178
val | PCIM_MSICTRL_MSI_ENABLE, 2);
sys/dev/bge/if_bge.c
4179
val = CSR_READ_4(sc, BGE_MSI_MODE);
sys/dev/bge/if_bge.c
4181
val | BGE_MSIMODE_ENABLE);
sys/dev/bge/if_bge.c
4183
val = CSR_READ_4(sc, BGE_MARB_MODE);
sys/dev/bge/if_bge.c
4184
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val);
sys/dev/bge/if_bge.c
4191
val = CSR_READ_4(sc, BGE_MAC_MODE);
sys/dev/bge/if_bge.c
4192
val = (val & ~mac_mode_mask) | mac_mode;
sys/dev/bge/if_bge.c
4193
CSR_WRITE_4(sc, BGE_MAC_MODE, val);
sys/dev/bge/if_bge.c
4200
val = CSR_READ_4(sc, BGE_VCPU_STATUS);
sys/dev/bge/if_bge.c
4201
if (val & BGE_VCPU_STATUS_INIT_DONE)
sys/dev/bge/if_bge.c
4218
val = bge_readmem_ind(sc, BGE_SRAM_FW_MB);
sys/dev/bge/if_bge.c
4219
if (val == ~BGE_SRAM_FW_MB_MAGIC)
sys/dev/bge/if_bge.c
4226
val);
sys/dev/bge/if_bge.c
4239
val = CSR_READ_4(sc, BGE_SERDES_CFG);
sys/dev/bge/if_bge.c
4240
val = (val & ~0xFFF) | 0x880;
sys/dev/bge/if_bge.c
4241
CSR_WRITE_4(sc, BGE_SERDES_CFG, val);
sys/dev/bge/if_bge.c
4250
val = CSR_READ_4(sc, 0x7C00);
sys/dev/bge/if_bge.c
4251
CSR_WRITE_4(sc, 0x7C00, val | (1 << 25));
sys/dev/bge/if_bge.c
4811
uint32_t val;
sys/dev/bge/if_bge.c
4916
val = CSR_READ_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL);
sys/dev/bge/if_bge.c
4918
val &= ~BGE_RDMA_TX_LENGTH_WA_5719;
sys/dev/bge/if_bge.c
4920
val &= ~BGE_RDMA_TX_LENGTH_WA_5720;
sys/dev/bge/if_bge.c
4921
CSR_WRITE_4(sc, BGE_RDMA_LSO_CRPTEN_CTRL, val);
sys/dev/bge/if_bge.c
555
uint32_t val;
sys/dev/bge/if_bge.c
564
val = pci_read_config(dev, BGE_PCI_MEMWIN_DATA, 4);
sys/dev/bge/if_bge.c
566
return (val);
sys/dev/bge/if_bge.c
570
bge_writemem_ind(struct bge_softc *sc, int off, int val)
sys/dev/bge/if_bge.c
581
pci_write_config(dev, BGE_PCI_MEMWIN_DATA, val, 4);
sys/dev/bge/if_bge.c
599
bge_writereg_ind(struct bge_softc *sc, int off, int val)
sys/dev/bge/if_bge.c
606
pci_write_config(dev, BGE_PCI_REG_DATA, val, 4);
sys/dev/bge/if_bge.c
610
bge_writemem_direct(struct bge_softc *sc, int off, int val)
sys/dev/bge/if_bge.c
612
CSR_WRITE_4(sc, off, val);
sys/dev/bge/if_bge.c
616
bge_writembx(struct bge_softc *sc, int off, int val)
sys/dev/bge/if_bge.c
621
CSR_WRITE_4(sc, off, val);
sys/dev/bge/if_bge.c
6623
uint32_t val;
sys/dev/bge/if_bge.c
6632
val = CSR_READ_4(sc, result);
sys/dev/bge/if_bge.c
6633
printf("reg 0x%06X = 0x%08X\n", result, val);
sys/dev/bge/if_bge.c
6645
uint32_t val;
sys/dev/bge/if_bge.c
6654
val = APE_READ_4(sc, result);
sys/dev/bge/if_bge.c
6655
printf("reg 0x%06X = 0x%08X\n", result, val);
sys/dev/bge/if_bge.c
6667
uint32_t val;
sys/dev/bge/if_bge.c
6676
val = bge_readmem_ind(sc, result);
sys/dev/bge/if_bge.c
6677
printf("mem 0x%06X = 0x%08X\n", result, val);
sys/dev/bge/if_bgereg.h
2203
#define BGE_MEMWIN_READ(sc, x, val) \
sys/dev/bge/if_bgereg.h
2207
val = CSR_READ_4(sc, BGE_MEMWIN_START + (x & 0xFFFF)); \
sys/dev/bge/if_bgereg.h
2210
#define BGE_MEMWIN_WRITE(sc, x, val) \
sys/dev/bge/if_bgereg.h
2214
CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0xFFFF), val); \
sys/dev/bge/if_bgereg.h
2249
#define RCB_WRITE_4(sc, rcb, offset, val) \
sys/dev/bge/if_bgereg.h
2250
bus_write_4(sc->bge_res, rcb + offsetof(struct bge_rcb, offset), val)
sys/dev/bge/if_bgereg.h
2803
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/bge/if_bgereg.h
2804
bus_write_4(sc->bge_res, reg, val)
sys/dev/bge/if_bgereg.h
2815
#define APE_WRITE_4(sc, reg, val) \
sys/dev/bge/if_bgereg.h
2816
bus_write_4(sc->bge_res2, reg, val)
sys/dev/bge/if_bgereg.h
2935
int val;
sys/dev/bhnd/bhndb/bhndb_pci.c
809
uint16_t val;
sys/dev/bhnd/bhndb/bhndb_pci.c
828
val = bhndb_pci_probe_read(probe, pci_addr, srsh_offset, sizeof(val));
sys/dev/bhnd/bhndb/bhndb_pci.c
829
srsh_val = (val & BHND_PCI_SRSH_PI_MASK) >> BHND_PCI_SRSH_PI_SHIFT;
sys/dev/bhnd/bhndb/bhndb_pci.c
836
val &= ~BHND_PCI_SRSH_PI_MASK;
sys/dev/bhnd/bhndb/bhndb_pci.c
837
val |= (pci_val << BHND_PCI_SRSH_PI_SHIFT);
sys/dev/bhnd/bhndb/bhndb_pci.c
838
bhndb_pci_probe_write(probe, pci_addr, srsh_offset, val,
sys/dev/bhnd/bhndb/bhndb_pci.c
839
sizeof(val));
sys/dev/bhnd/cores/chipc/chipc_gpiovar.h
133
#define CC_GPIO_WR4(sc, off, val) \
sys/dev/bhnd/cores/chipc/chipc_gpiovar.h
134
bhnd_bus_write_4((sc)->mem_res, (off), (val))
sys/dev/bhnd/cores/chipc/chipc_gpiovar.h
135
#define CC_GPIO_WRFLAG(sc, pin_num, flag, val) \
sys/dev/bhnd/cores/chipc/chipc_gpiovar.h
138
(val ? (1 << pin_num) : 0))
sys/dev/bhnd/cores/chipc/chipc_slicer.c
146
uint32_t val;
sys/dev/bhnd/cores/chipc/chipc_slicer.c
160
val = bus_read_4(res, ofs);
sys/dev/bhnd/cores/chipc/chipc_slicer.c
161
switch (val) {
sys/dev/bhnd/cores/chipc/chipc_spi.h
83
#define SPI_WRITE(sc, reg, val) bus_write_4(sc->sc_res, (reg), (val));
sys/dev/bhnd/cores/pci/bhnd_pci.c
238
uint32_t val;
sys/dev/bhnd/cores/pci/bhnd_pci.c
244
val = BHND_PCI_READ_4(sc, BHND_PCIE_IND_DATA);
sys/dev/bhnd/cores/pci/bhnd_pci.c
247
return (val);
sys/dev/bhnd/cores/pci/bhnd_pci.c
259
uint32_t val)
sys/dev/bhnd/cores/pci/bhnd_pci.c
265
BHND_PCI_WRITE_4(sc, BHND_PCIE_IND_DATA, val);
sys/dev/bhnd/cores/pci/bhnd_pci.c
374
uint16_t val;
sys/dev/bhnd/cores/pci/bhnd_pci.c
383
error = bhnd_pcie_mdio_cmd_read(sc, cmd, &val);
sys/dev/bhnd/cores/pci/bhnd_pci.c
392
return (val);
sys/dev/bhnd/cores/pci/bhnd_pci.c
396
bhnd_pcie_mdio_write(struct bhnd_pci_softc *sc, int phy, int reg, int val)
sys/dev/bhnd/cores/pci/bhnd_pci.c
406
cmd = BHND_PCIE_MDIODATA_ADDR(phy, reg) | (val & BHND_PCIE_MDIODATA_DATA_MASK);
sys/dev/bhnd/cores/pci/bhnd_pci.c
421
uint16_t val;
sys/dev/bhnd/cores/pci/bhnd_pci.c
446
error = bhnd_pcie_mdio_cmd_read(sc, cmd, &val);
sys/dev/bhnd/cores/pci/bhnd_pci.c
455
return (val);
sys/dev/bhnd/cores/pci/bhnd_pci.c
460
int reg, int val)
sys/dev/bhnd/cores/pci/bhnd_pci.c
466
return (bhnd_pcie_mdio_write(sc, phy, reg, val));
sys/dev/bhnd/cores/pci/bhnd_pci.c
487
(val & BHND_PCIE_MDIODATA_DATA_MASK);
sys/dev/bhnd/cores/pci/bhnd_pcivar.h
55
uint32_t addr, uint32_t val);
sys/dev/bhnd/cores/pci/bhnd_pcivar.h
59
int reg, int val);
sys/dev/bhnd/cores/pci/bhnd_pcivar.h
63
int devaddr, int reg, int val);
sys/dev/bhnd/cores/pcie2/bhnd_pcie2.c
215
uint32_t val)
sys/dev/bhnd/cores/pcie2/bhnd_pcie2.c
229
bhnd_pcie2_mdio_write(struct bhnd_pcie2_softc *sc, int phy, int reg, int val)
sys/dev/bhnd/cores/pcie2/bhnd_pcie2.c
245
int reg, int val)
sys/dev/bhnd/cores/pcie2/bhnd_pcie2_var.h
55
uint32_t addr, uint32_t val);
sys/dev/bhnd/cores/pcie2/bhnd_pcie2_var.h
59
int reg, int val);
sys/dev/bhnd/cores/pcie2/bhnd_pcie2_var.h
63
int phy, int devaddr, int reg, int val);
sys/dev/bhnd/cores/pmu/bhnd_pmu.c
585
bhnd_pmu_write_4(bus_size_t reg, uint32_t val, void *ctx)
sys/dev/bhnd/cores/pmu/bhnd_pmu.c
588
return (bhnd_bus_write_4(sc->res, reg, val));
sys/dev/bhnd/cores/pmu/bhnd_pmu.c
76
static void bhnd_pmu_write_4(bus_size_t reg, uint32_t val, void *ctx);
sys/dev/bhnd/cores/pmu/bhnd_pmu_private.h
98
uint32_t val, uint32_t mask);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1023
uint32_t val;
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1026
error = bhnd_nvram_getvar_uint32(sc->chipc_dev, name, &val);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1037
name, val, i);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1040
BHND_PMU_WRITE_4(sc, BHND_PMU_RES_UPDN_TIMER, val);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1099
uint32_t val;
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1102
error = bhnd_nvram_getvar_uint32(sc->chipc_dev, name, &val);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1113
val, i);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1116
BHND_PMU_WRITE_4(sc, BHND_PMU_RES_DEP_MASK, val);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
166
bus_size_t data, uint32_t reg, uint32_t val, uint32_t mask)
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
174
rval &= ~mask | (val & mask);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
176
rval = val;
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2865
uint32_t val;
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2912
val = BHND_PMU_READ_4(sc, BHND_PMU_REG_CONTROL_DATA);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2913
val &= ~((uint32_t) 0x07 << 29);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2914
val |= (uint32_t) (rcal_code & 0x07) << 29;
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2915
BHND_PMU_WRITE_4(sc, BHND_PMU_REG_CONTROL_DATA, val);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2918
val = BHND_PMU_READ_4(sc, BHND_PMU_REG_CONTROL_DATA);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2919
val &= ~(uint32_t) 0x01;
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2920
val |= (uint32_t) ((rcal_code >> 3) & 0x01);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2921
BHND_PMU_WRITE_4(sc, BHND_PMU_REG_CONTROL_DATA, val);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2925
val = BHND_PMU_READ_4(sc, BHND_PMU_CHIP_CONTROL_DATA);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2926
val &= ~((uint32_t) 0x03 << 30);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2927
val |= (uint32_t) (rcal_code & 0x03) << 30;
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2928
BHND_PMU_WRITE_4(sc, BHND_PMU_CHIP_CONTROL_DATA, val);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2931
val = BHND_PMU_READ_4(sc, BHND_PMU_CHIP_CONTROL_DATA);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2932
val &= ~(uint32_t) 0x03;
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2933
val |= (uint32_t) ((rcal_code >> 2) & 0x03);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2934
BHND_PMU_WRITE_4(sc, BHND_PMU_CHIP_CONTROL_DATA, val);
sys/dev/bhnd/cores/pmu/bhnd_pmuvar.h
88
void (*wr4)(bus_size_t reg, uint32_t val, void *ctx);
sys/dev/bhnd/nvram/bhnd_nvram_data.c
589
bhnd_nvram_val val;
sys/dev/bhnd/nvram/bhnd_nvram_data.c
606
error = bhnd_nvram_val_init(&val, fmt, vptr, vlen, vtype,
sys/dev/bhnd/nvram/bhnd_nvram_data.c
611
error = bhnd_nvram_val_encode(&val, outp, olen, otype);
sys/dev/bhnd/nvram/bhnd_nvram_data.c
614
bhnd_nvram_val_release(&val);
sys/dev/bhnd/nvram/bhnd_nvram_data.h
145
void *cookiep, bhnd_nvram_val **val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1066
union bhnd_nvram_sprom_storage *storage, bhnd_nvram_val *val)
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1261
return (bhnd_nvram_val_init(val, var->fmt, inp, ilen, var->type,
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1278
union bhnd_nvram_sprom_storage *storage, bhnd_nvram_val *val)
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1294
val));
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1320
bhnd_nvram_val val;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1325
error = bhnd_nvram_sprom_getvar_common(nv, cookiep, &storage, &val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1330
error = bhnd_nvram_val_encode(&val, buf, len, otype);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1333
bhnd_nvram_val_release(&val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1341
bhnd_nvram_val val;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1346
error = bhnd_nvram_sprom_getvar_common(nv, cookiep, &storage, &val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1351
*value = bhnd_nvram_val_copy(&val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
1352
bhnd_nvram_val_release(&val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
332
bhnd_nvram_val val;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
344
&val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
349
error = bhnd_nvram_val_encode(&val, buf, len, type);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
352
bhnd_nvram_val_release(&val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
690
bhnd_nvram_val *val;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
698
val = bhnd_nvram_prop_val(prop);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
700
val = BHND_NVRAM_VAL_NULL;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
705
error = bhnd_nvram_sprom_write_var(&state, entry, val, io);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom.c
82
bhnd_nvram_val *val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1045
&val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1049
if ((error = bhnd_sprom_opcode_set_var(state, val)))
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1151
&val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1155
if ((error = bhnd_sprom_opcode_set_mask(state, val)))
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1171
val = *state->input;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1172
if (val > INT8_MAX) {
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1174
"value: %#x\n", val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1177
shift = val;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1192
val = immd;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1195
error = bhnd_sprom_opcode_apply_scale(state, &val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1200
if (UINT32_MAX - state->offset < val) {
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1206
state->offset += val;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1210
&val);
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
1214
state->offset = val;
sys/dev/bhnd/nvram/bhnd_nvram_data_sprom_subr.c
998
uint32_t val;
sys/dev/bhnd/nvram/bhnd_nvram_data_tlv.c
531
const char *val;
sys/dev/bhnd/nvram/bhnd_nvram_data_tlv.c
542
'\0', NULL, NULL, &val, len);
sys/dev/bhnd/nvram/bhnd_nvram_data_tlv.c
549
return (val);
sys/dev/bhnd/nvram/bhnd_nvram_datavar.h
52
bhnd_nvram_val **val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
243
bhnd_nvram_val *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
249
if ((prop = bhnd_nvram_prop_new(name, val)) == NULL)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
313
const char *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
315
return (bhnd_nvram_plist_replace_bytes(plist, name, val, strlen(val)+1,
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
459
bhnd_nvram_val *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
464
if ((prop = bhnd_nvram_prop_new(name, val)) == NULL)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
517
const char *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
519
return (bhnd_nvram_plist_append_bytes(plist, name, val, strlen(val)+1,
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
652
u_char *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
654
return (bhnd_nvram_plist_get_encoded(plist, name, val, sizeof(*val),
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
673
uint8_t *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
675
return (bhnd_nvram_plist_get_encoded(plist, name, val, sizeof(*val),
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
694
uint16_t *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
696
return (bhnd_nvram_plist_get_encoded(plist, name, val, sizeof(*val),
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
715
uint32_t *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
717
return (bhnd_nvram_plist_get_encoded(plist, name, val, sizeof(*val),
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
736
uint64_t *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
738
return (bhnd_nvram_plist_get_encoded(plist, name, val, sizeof(*val),
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
757
bool *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
759
return (bhnd_nvram_plist_get_encoded(plist, name, val, sizeof(*val),
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
776
bhnd_nvram_prop_new(const char *name, bhnd_nvram_val *val)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
790
if ((prop->val = bhnd_nvram_val_copy(val)) == NULL)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
799
if (prop->val != NULL)
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
800
bhnd_nvram_val_release(prop->val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
826
bhnd_nvram_val *val;
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
830
error = bhnd_nvram_val_new(&val, NULL, inp, ilen, itype,
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
842
prop = bhnd_nvram_prop_new(name, val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
845
bhnd_nvram_val_release(val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
883
bhnd_nvram_val_release(prop->val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
907
return (prop->val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
918
return (bhnd_nvram_val_type(prop->val));
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
946
bytes = bhnd_nvram_val_bytes(prop->val, olen, otype);
sys/dev/bhnd/nvram/bhnd_nvram_plist.c
976
return (bhnd_nvram_val_encode(prop->val, outp, olen, otype));
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
101
const char *name, uint32_t *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
103
const char *name, uint64_t *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
105
const char *name, const char **val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
107
const char *name, bool *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
110
bhnd_nvram_val *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
61
const char *name, bhnd_nvram_val *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
66
const char *name, const char *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
71
const char *name, bhnd_nvram_val *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
76
const char *name, const char *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
95
const char *name, u_char *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
97
const char *name, uint8_t *val);
sys/dev/bhnd/nvram/bhnd_nvram_plist.h
99
const char *name, uint16_t *val);
sys/dev/bhnd/nvram/bhnd_nvram_plistvar.h
49
bhnd_nvram_val *val; /**< property value */
sys/dev/bhnd/nvram/bhnd_nvram_store.c
1223
bhnd_nvram_val val;
sys/dev/bhnd/nvram/bhnd_nvram_store.c
1226
error = bhnd_nvram_val_init(&val, NULL, inp, ilen, itype,
sys/dev/bhnd/nvram/bhnd_nvram_store.c
1234
error = bhnd_nvram_store_setval_common(sc, name, &val);
sys/dev/bhnd/nvram/bhnd_nvram_store.c
1237
bhnd_nvram_val_release(&val);
sys/dev/bhnd/nvram/bhnd_nvram_store.c
480
bhnd_nvram_val *val;
sys/dev/bhnd/nvram/bhnd_nvram_store.c
503
if ((error = bhnd_nvram_data_copy_val(sc->data, cookiep, &val)))
sys/dev/bhnd/nvram/bhnd_nvram_store.c
507
error = bhnd_nvram_plist_append_val(merged, name, val);
sys/dev/bhnd/nvram/bhnd_nvram_store.c
508
bhnd_nvram_val_release(val);
sys/dev/bhnd/nvram/bhnd_nvram_value_subr.c
436
bhnd_nvram_val val;
sys/dev/bhnd/nvram/bhnd_nvram_value_subr.c
440
error = bhnd_nvram_val_init(&val, NULL, inp, ilen, itype,
sys/dev/bhnd/nvram/bhnd_nvram_value_subr.c
446
error = bhnd_nvram_val_vprintf(&val, fmt, outp, olen, ap);
sys/dev/bhnd/nvram/bhnd_nvram_value_subr.c
449
bhnd_nvram_val_release(&val);
sys/dev/bhnd/nvram/bhnd_nvram_value_subr.c
532
bhnd_nvram_val val;
sys/dev/bhnd/nvram/bhnd_nvram_value_subr.c
536
error = bhnd_nvram_val_init(&val, NULL, inp, ilen,
sys/dev/bhnd/nvram/bhnd_nvram_value_subr.c
542
error = bhnd_nvram_val_encode(&val, outp, olen, otype);
sys/dev/bhnd/nvram/bhnd_nvram_value_subr.c
545
bhnd_nvram_val_release(&val);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1352
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1357
val = (bool)(softc->vnic_info.flags & BNXT_VNIC_FLAG_BD_STALL);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1358
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1362
if (val)
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1377
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1382
val = (bool)(softc->vnic_info.flags & BNXT_VNIC_FLAG_VLAN_STRIP);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1383
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1387
if (val)
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1402
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1407
val = softc->rx_coal_usecs;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1408
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1412
softc->rx_coal_usecs = val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1422
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1427
val = softc->rx_coal_frames;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1428
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1432
softc->rx_coal_frames = val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1442
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1447
val = softc->rx_coal_usecs_irq;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1448
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1452
softc->rx_coal_usecs_irq = val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1462
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1467
val = softc->rx_coal_frames_irq;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1468
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1472
softc->rx_coal_frames_irq = val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1482
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1487
val = softc->tx_coal_usecs;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1488
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1492
softc->tx_coal_usecs = val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1502
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1507
val = softc->tx_coal_frames;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1508
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1512
softc->tx_coal_frames = val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1522
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1527
val = softc->tx_coal_usecs_irq;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1528
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1532
softc->tx_coal_usecs_irq = val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1542
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1547
val = softc->tx_coal_frames_irq;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1548
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1552
softc->tx_coal_frames_irq = val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1667
int val; \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1672
val = softc->hw_lro.arg; \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1673
rc = sysctl_handle_int(oidp, &val, 0, req); \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1683
softc->hw_lro.arg = val; \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1701
int val; \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1706
val = softc->link_info.flow_ctrl.arg; \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1707
rc = sysctl_handle_int(oidp, &val, 0, req); \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1711
if (val) \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1712
val = 1; \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1714
if (softc->link_info.flow_ctrl.arg != val) { \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1715
softc->link_info.flow_ctrl.arg = val; \
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1792
int val;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1795
val = bnxt_dcb_getdcbx(softc);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1796
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1800
bnxt_dcb_setdcbx(softc, val);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1669
u32 reg_type, reg_off, val = 0;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1675
pci_read_config_dword(bp->pdev, reg_off, &val);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1681
val = readl_fbsd(bp, reg_off, 0);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1684
val = readl_fbsd(bp, reg_off, 2);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1688
val &= fw_health->fw_reset_inprog_reg_mask;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1689
return val;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1701
u16 val = 0;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1703
val = pci_read_config(bp->dev, PCI_SUBSYSTEM_ID, 2);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1704
if (val == 0xffff) {
sys/dev/bnxt/bnxt_en/if_bnxt.c
1731
u32 val;
sys/dev/bnxt/bnxt_en/if_bnxt.c
1733
val = bnxt_fw_health_readl(bp, BNXT_FW_HEARTBEAT_REG);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1734
if (val == fw_health->last_fw_heartbeat)
sys/dev/bnxt/bnxt_en/if_bnxt.c
1737
val = bnxt_fw_health_readl(bp, BNXT_FW_RESET_CNT_REG);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1738
if (val != fw_health->last_fw_reset_cnt)
sys/dev/bnxt/bnxt_en/if_bnxt.c
1791
u32 val = fw_health->fw_reset_seq_vals[reg_idx];
sys/dev/bnxt/bnxt_en/if_bnxt.c
1799
pci_write_config_dword(bp->pdev, reg_off, val);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1806
writel_fbsd(bp, reg_off, 0, val);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1809
writel_fbsd(bp, reg_off, 2, val);
sys/dev/bnxt/bnxt_en/if_bnxt.c
1813
pci_read_config_dword(bp->pdev, 0, &val);
sys/dev/bnxt/bnxt_en/if_bnxt.c
2110
u32 val;
sys/dev/bnxt/bnxt_en/if_bnxt.c
2112
val = bnxt_fw_health_readl(bp, BNXT_FW_HEALTH_REG);
sys/dev/bnxt/bnxt_en/if_bnxt.c
2113
if (!(val & BNXT_FW_STATUS_SHUTDOWN) &&
sys/dev/bnxt/bnxt_en/if_bnxt.c
2138
u16 val;
sys/dev/bnxt/bnxt_en/if_bnxt.c
2140
val = pci_read_config(bp->dev, PCI_SUBSYSTEM_ID, 2);
sys/dev/bnxt/bnxt_en/if_bnxt.c
2141
if (val == 0xffff) {
sys/dev/bnxt/bnxt_en/if_bnxt.c
299
void writel_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx, u32 val)
sys/dev/bnxt/bnxt_en/if_bnxt.c
303
bus_space_write_4(bp->doorbell_bar.tag, bp->doorbell_bar.handle, reg_off, htole32(val));
sys/dev/bnxt/bnxt_en/if_bnxt.c
305
bus_space_write_4(bp->hwrm_bar.tag, bp->hwrm_bar.handle, reg_off, htole32(val));
sys/dev/bnxt/bnxt_re/main.c
167
void writel_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx, u32 val)
sys/dev/bnxt/bnxt_re/main.c
170
bus_space_write_8(bp->doorbell_bar.tag, bp->doorbell_bar.handle, reg_off, htole32(val));
sys/dev/bnxt/bnxt_re/main.c
172
bus_space_write_8(bp->hwrm_bar.tag, bp->hwrm_bar.handle, reg_off, htole32(val));
sys/dev/bnxt/bnxt_re/qplib_res.h
165
(struct bnxt_qplib_chip_ctx *cctx, u8 val)
sys/dev/bnxt/bnxt_re/qplib_res.h
167
cctx->modes.dbr_primary_pf = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
102
((struct cmdq_base *)GET_TLV_DATA(req))->cookie = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
104
req->cookie = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
116
u32 size, __le64 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
119
((struct cmdq_base *)GET_TLV_DATA(req))->resp_addr = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
121
req->resp_addr = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
133
u32 size, u8 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
136
((struct cmdq_base *)GET_TLV_DATA(req))->resp_size = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
138
req->resp_size = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
150
u32 size, u8 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
153
((struct cmdq_base *)GET_TLV_DATA(req))->cmd_size = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
155
req->cmd_size = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
167
u32 size, __le16 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
170
((struct cmdq_base *)GET_TLV_DATA(req))->flags = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
172
req->flags = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
82
u32 size, u8 val)
sys/dev/bnxt/bnxt_re/qplib_tlv.h
85
((struct cmdq_base *)GET_TLV_DATA(req))->opcode = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
87
req->opcode = val;
sys/dev/bnxt/bnxt_re/qplib_tlv.h
99
u32 size, __le16 val)
sys/dev/bwi/bwimac.c
118
bwi_tmplt_write_4(struct bwi_mac *mac, uint32_t ofs, uint32_t val)
sys/dev/bwi/bwimac.c
123
val = bswap32(val);
sys/dev/bwi/bwimac.c
126
CSR_WRITE_4(sc, BWI_MAC_TMPLT_DATA, val);
sys/dev/bwi/bwimac.c
132
uint64_t val;
sys/dev/bwi/bwimac.c
134
val = flags & 0xffff;
sys/dev/bwi/bwimac.c
135
MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO, val);
sys/dev/bwi/bwimac.c
137
val = (flags >> 16) & 0xffff;
sys/dev/bwi/bwimac.c
138
MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI, val);
sys/dev/bwi/bwimac.c
146
uint64_t flags, val;
sys/dev/bwi/bwimac.c
151
val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI);
sys/dev/bwi/bwimac.c
152
flags |= val << 16;
sys/dev/bwi/bwimac.c
154
val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO);
sys/dev/bwi/bwimac.c
155
flags |= val;
sys/dev/bwi/bwimac.c
1558
uint32_t val;
sys/dev/bwi/bwimac.c
1563
val = CSR_READ_4(sc, BWI_MAC_STATUS);
sys/dev/bwi/bwimac.c
1564
if (val & BWI_MAC_STATUS_BSWAP) {
sys/dev/bwi/bwimac.c
1575
val = CSR_READ_4(sc, BWI_STATE_HI);
sys/dev/bwi/bwimac.c
1576
if (__SHIFTOUT(val, BWI_STATE_HI_FLAGS_MASK) &
sys/dev/bwi/bwimac.c
542
uint32_t orig_val, val;
sys/dev/bwi/bwimac.c
552
val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
sys/dev/bwi/bwimac.c
553
if (val != TEST_VAL1) {
sys/dev/bwi/bwimac.c
560
val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
sys/dev/bwi/bwimac.c
561
if (val != TEST_VAL2) {
sys/dev/bwi/bwimac.c
569
val = CSR_READ_4(sc, BWI_MAC_STATUS);
sys/dev/bwi/bwimac.c
570
if ((val & ~BWI_MAC_STATUS_PHYLNK) != BWI_MAC_STATUS_IHREN) {
sys/dev/bwi/bwimac.c
572
__func__, val);
sys/dev/bwi/bwimac.c
576
val = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
sys/dev/bwi/bwimac.c
577
if (val != 0) {
sys/dev/bwi/bwimac.c
579
__func__, val);
sys/dev/bwi/bwimac.h
73
#define MOBJ_WRITE_2(mac, objid, ofs, val) \
sys/dev/bwi/bwimac.h
74
bwi_memobj_write_2((mac), (objid), (ofs), (val))
sys/dev/bwi/bwimac.h
75
#define MOBJ_WRITE_4(mac, objid, ofs, val) \
sys/dev/bwi/bwimac.h
76
bwi_memobj_write_4((mac), (objid), (ofs), (val))
sys/dev/bwi/bwimac.h
93
#define TMPLT_WRITE_4(mac, ofs, val) bwi_tmplt_write_4((mac), (ofs), (val))
sys/dev/bwi/bwiphy.c
158
uint16_t val;
sys/dev/bwi/bwiphy.c
162
val = CSR_READ_2(sc, BWI_PHYINFO);
sys/dev/bwi/bwiphy.c
163
phyrev = __SHIFTOUT(val, BWI_PHYINFO_REV_MASK);
sys/dev/bwi/bwiphy.c
164
phytype = __SHIFTOUT(val, BWI_PHYINFO_TYPE_MASK);
sys/dev/bwi/bwiphy.c
165
phyver = __SHIFTOUT(val, BWI_PHYINFO_VER_MASK);
sys/dev/bwi/bwiphy.c
340
uint16_t val;
sys/dev/bwi/bwiphy.c
342
val = PHY_READ(mac, 0x400) & 0xff;
sys/dev/bwi/bwiphy.c
343
if (val == 3 || val == 5) {
sys/dev/bwi/bwiphy.c
346
if (val == 5) {
sys/dev/bwi/bwiphy.c
438
uint16_t val, ofs;
sys/dev/bwi/bwiphy.c
448
for (ofs = 0, val = 0x3c3d; ofs < 30; ++ofs, val -= 0x202)
sys/dev/bwi/bwiphy.c
449
PHY_WRITE(mac, 0x89 + ofs, val);
sys/dev/bwi/bwiphy.c
515
uint16_t ofs, val;
sys/dev/bwi/bwiphy.c
517
val = 0x2120;
sys/dev/bwi/bwiphy.c
519
PHY_WRITE(mac, ofs, val);
sys/dev/bwi/bwiphy.c
520
val += 0x202;
sys/dev/bwi/bwiphy.c
610
uint16_t val, ofs;
sys/dev/bwi/bwiphy.c
648
val = 0x1e1f;
sys/dev/bwi/bwiphy.c
650
PHY_WRITE(mac, ofs, val);
sys/dev/bwi/bwiphy.c
651
val -= 0x202;
sys/dev/bwi/bwiphy.c
654
val = 0x3e3f;
sys/dev/bwi/bwiphy.c
656
PHY_WRITE(mac, ofs, val);
sys/dev/bwi/bwiphy.c
657
val -= 0x202;
sys/dev/bwi/bwiphy.c
660
val = 0x2120;
sys/dev/bwi/bwiphy.c
662
PHY_WRITE(mac, ofs, (val & 0x3f3f));
sys/dev/bwi/bwiphy.c
663
val += 0x202;
sys/dev/bwi/bwiphy.h
67
#define PHY_WRITE(mac, ctrl, val) bwi_phy_write((mac), (ctrl), (val))
sys/dev/bwi/bwirf.c
1016
uint16_t val, calib;
sys/dev/bwi/bwirf.c
1019
val = RF_READ(mac, BWI_RFR_BBP_ATTEN);
sys/dev/bwi/bwirf.c
1020
idx = __SHIFTOUT(val, BWI_RFR_BBP_ATTEN_CALIB_IDX);
sys/dev/bwi/bwirf.c
1024
if (val & BWI_RFR_BBP_ATTEN_CALIB_BIT)
sys/dev/bwi/bwirf.c
1088
uint16_t sprom_ofs, val, mask;
sys/dev/bwi/bwirf.c
1095
val = bwi_read_sprom(sc, BWI_SPROM_MAX_TXPWR);
sys/dev/bwi/bwirf.c
1097
rf->rf_txpower_max = __SHIFTOUT(val,
sys/dev/bwi/bwirf.c
1100
rf->rf_txpower_max = __SHIFTOUT(val,
sys/dev/bwi/bwirf.c
1119
val = bwi_read_sprom(sc, BWI_SPROM_ANT_GAIN);
sys/dev/bwi/bwirf.c
1121
ant_gain = __SHIFTOUT(val, BWI_SPROM_ANT_GAIN_MASK_11A);
sys/dev/bwi/bwirf.c
1123
ant_gain = __SHIFTOUT(val, BWI_SPROM_ANT_GAIN_MASK_11BG);
sys/dev/bwi/bwirf.c
1208
val = bwi_read_sprom(sc, BWI_SPROM_IDLE_TSSI);
sys/dev/bwi/bwirf.c
1210
"sprom idle tssi: 0x%04x\n", val);
sys/dev/bwi/bwirf.c
1217
rf->rf_idle_tssi0 = (int)__SHIFTOUT(val, mask);
sys/dev/bwi/bwirf.c
1495
int val;
sys/dev/bwi/bwirf.c
1497
val = rf_atten * 2 + bbp_atten;
sys/dev/bwi/bwirf.c
1498
if (val > 14) {
sys/dev/bwi/bwirf.c
1500
if (val > 17)
sys/dev/bwi/bwirf.c
1502
if (val > 19)
sys/dev/bwi/bwirf.c
161
int16_t val;
sys/dev/bwi/bwirf.c
165
val = (int16_t)__SHIFTOUT(PHY_READ(mac, 0x47f), NRSSI_11G_MASK);
sys/dev/bwi/bwirf.c
166
if (val >= 32)
sys/dev/bwi/bwirf.c
167
val -= 64;
sys/dev/bwi/bwirf.c
168
return val;
sys/dev/bwi/bwirf.c
2089
int val;
sys/dev/bwi/bwirf.c
2091
val = (((i - d) * rf->rf_nrssi_slope) / 0x10000) + 0x3a;
sys/dev/bwi/bwirf.c
2092
if (val < 0)
sys/dev/bwi/bwirf.c
2093
val = 0;
sys/dev/bwi/bwirf.c
2094
else if (val > 0x3f)
sys/dev/bwi/bwirf.c
2095
val = 0x3f;
sys/dev/bwi/bwirf.c
2097
rf->rf_nrssi_table[i] = val;
sys/dev/bwi/bwirf.c
2107
int16_t val;
sys/dev/bwi/bwirf.c
2109
val = bwi_nrssi_read(mac, i);
sys/dev/bwi/bwirf.c
2111
val -= adjust;
sys/dev/bwi/bwirf.c
2112
if (val < -32)
sys/dev/bwi/bwirf.c
2113
val = -32;
sys/dev/bwi/bwirf.c
2114
else if (val > 31)
sys/dev/bwi/bwirf.c
2115
val = 31;
sys/dev/bwi/bwirf.c
2117
bwi_nrssi_write(mac, i, val);
sys/dev/bwi/bwirf.c
2162
_nrssi_threshold(const struct bwi_rf *rf, int32_t val)
sys/dev/bwi/bwirf.c
2164
val *= (rf->rf_nrssi[1] - rf->rf_nrssi[0]);
sys/dev/bwi/bwirf.c
2165
val += (rf->rf_nrssi[0] << 6);
sys/dev/bwi/bwirf.c
2166
if (val < 32)
sys/dev/bwi/bwirf.c
2167
val += 31;
sys/dev/bwi/bwirf.c
2169
val += 32;
sys/dev/bwi/bwirf.c
2170
val >>= 6;
sys/dev/bwi/bwirf.c
2171
if (val < -31)
sys/dev/bwi/bwirf.c
2172
val = -31;
sys/dev/bwi/bwirf.c
2173
else if (val > 31)
sys/dev/bwi/bwirf.c
2174
val = 31;
sys/dev/bwi/bwirf.c
2175
return val;
sys/dev/bwi/bwirf.c
2226
uint16_t val;
sys/dev/bwi/bwirf.c
2229
val = __SHIFTIN(BWI_INVALID_TSSI, BWI_LO_TSSI_MASK) |
sys/dev/bwi/bwirf.c
2234
BWI_COMM_MOBJ_TSSI_DS + (i * 2), val);
sys/dev/bwi/bwirf.c
2239
BWI_COMM_MOBJ_TSSI_OFDM + (i * 2), val);
sys/dev/bwi/bwirf.c
2294
uint16_t val;
sys/dev/bwi/bwirf.c
2305
val = BWI_ANT_MODE_AUTO;
sys/dev/bwi/bwirf.c
2307
val = ant_mode;
sys/dev/bwi/bwirf.c
2308
val <<= 7;
sys/dev/bwi/bwirf.c
2309
PHY_FILT_SETBITS(mac, 0x3e2, 0xfe7f, val);
sys/dev/bwi/bwirf.c
2312
val = ant_mode << 7;
sys/dev/bwi/bwirf.c
2313
PHY_FILT_SETBITS(mac, 0x401, 0x7e7f, val);
sys/dev/bwi/bwirf.c
2346
val = ant_mode << 8;
sys/dev/bwi/bwirf.c
2348
0xfc3f, val);
sys/dev/bwi/bwirf.c
2350
0xfc3f, val);
sys/dev/bwi/bwirf.c
2352
0xfc3f, val);
sys/dev/bwi/bwirf.c
2371
uint16_t val;
sys/dev/bwi/bwirf.c
2373
val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, ofs + i);
sys/dev/bwi/bwirf.c
2374
tssi[i++] = (int8_t)__SHIFTOUT(val, BWI_LO_TSSI_MASK);
sys/dev/bwi/bwirf.c
2375
tssi[i++] = (int8_t)__SHIFTOUT(val, BWI_HI_TSSI_MASK);
sys/dev/bwi/bwirf.c
249
uint32_t val;
sys/dev/bwi/bwirf.c
2506
uint16_t val;
sys/dev/bwi/bwirf.c
2509
val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_RF_NOISE);
sys/dev/bwi/bwirf.c
2510
noise = (int)val; /* XXX check bounds? */
sys/dev/bwi/bwirf.c
252
val = CSR_READ_2(sc, BWI_RF_DATA_HI);
sys/dev/bwi/bwirf.c
253
val <<= 16;
sys/dev/bwi/bwirf.c
2530
uint16_t val;
sys/dev/bwi/bwirf.c
2533
val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_RF_NOISE);
sys/dev/bwi/bwirf.c
2534
noise = (int)val; /* XXX check bounds? */
sys/dev/bwi/bwirf.c
2551
uint16_t val;
sys/dev/bwi/bwirf.c
2554
val = 0;
sys/dev/bwi/bwirf.c
256
val |= CSR_READ_2(sc, BWI_RF_DATA_LO);
sys/dev/bwi/bwirf.c
2563
val += PHY_READ(mac, 0x2c);
sys/dev/bwi/bwirf.c
2565
return val;
sys/dev/bwi/bwirf.c
2574
uint16_t rf_val, phy_val, min_val, val;
sys/dev/bwi/bwirf.c
258
manu = __SHIFTOUT(val, BWI_RFINFO_MANUFACT_MASK);
sys/dev/bwi/bwirf.c
259
type = __SHIFTOUT(val, BWI_RFINFO_TYPE_MASK);
sys/dev/bwi/bwirf.c
260
rev = __SHIFTOUT(val, BWI_RFINFO_REV_MASK);
sys/dev/bwi/bwirf.c
2632
val = bwi_rf_lo_measure_11b(mac) / 10;
sys/dev/bwi/bwirf.c
2633
if (val < min_val) {
sys/dev/bwi/bwirf.c
2634
min_val = val;
sys/dev/bwi/bwirf.c
2657
val = bwi_rf_lo_measure_11b(mac) / 10;
sys/dev/bwi/bwirf.c
2658
if (val < min_val) {
sys/dev/bwi/bwirf.c
2659
min_val = val;
sys/dev/bwi/bwirf.c
641
uint16_t val;
sys/dev/bwi/bwirf.c
643
val = (uint8_t)lo->ctrl_lo;
sys/dev/bwi/bwirf.c
644
val |= ((uint8_t)lo->ctrl_hi) << 8;
sys/dev/bwi/bwirf.c
646
PHY_WRITE(mac, BWI_PHYR_RF_LO, val);
sys/dev/bwi/bwirf.c
663
bitswap4(uint16_t val)
sys/dev/bwi/bwirf.c
667
ret = (val & 0x8) >> 3;
sys/dev/bwi/bwirf.c
668
ret |= (val & 0x4) >> 1;
sys/dev/bwi/bwirf.c
669
ret |= (val & 0x2) << 1;
sys/dev/bwi/bwirf.c
670
ret |= (val & 0x1) << 3;
sys/dev/bwi/bwirf.h
112
#define RF_WRITE(mac, ofs, val) bwi_rf_write((mac), (ofs), (val))
sys/dev/bwi/if_bwi.c
1043
uint32_t val;
sys/dev/bwi/if_bwi.c
1060
val = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
sys/dev/bwi/if_bwi.c
1061
if (val & BWI_PCIM_GPIO_OUT_CLKSRC) {
sys/dev/bwi/if_bwi.c
1069
val = CSR_READ_4(sc, BWI_CLOCK_CTRL);
sys/dev/bwi/if_bwi.c
1071
src = __SHIFTOUT(val, BWI_CLOCK_CTRL_CLKSRC);
sys/dev/bwi/if_bwi.c
1075
div = (__SHIFTOUT(val, BWI_CLOCK_CTRL_FDIV) + 1) << 2;
sys/dev/bwi/if_bwi.c
1082
val = CSR_READ_4(sc, BWI_CLOCK_INFO);
sys/dev/bwi/if_bwi.c
1085
div = (__SHIFTOUT(val, BWI_CLOCK_INFO_FDIV) + 1) << 2;
sys/dev/bwi/if_bwi.c
2327
uint32_t val, addr_hi, addr_lo;
sys/dev/bwi/if_bwi.c
2343
val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |
sys/dev/bwi/if_bwi.c
2346
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, val);
sys/dev/bwi/if_bwi.c
2348
val = __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |
sys/dev/bwi/if_bwi.c
2350
CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, val);
sys/dev/bwi/if_bwi.c
2359
uint32_t val, addr_hi, addr_lo;
sys/dev/bwi/if_bwi.c
2364
val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |
sys/dev/bwi/if_bwi.c
2367
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_RINGINFO, val);
sys/dev/bwi/if_bwi.c
2369
val = __SHIFTIN(hdr_size, BWI_RX32_CTRL_HDRSZ_MASK) |
sys/dev/bwi/if_bwi.c
2372
CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);
sys/dev/bwi/if_bwi.c
2686
uint32_t val, rx_ctrl;
sys/dev/bwi/if_bwi.c
2691
val = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);
sys/dev/bwi/if_bwi.c
2692
end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /
sys/dev/bwi/if_bwi.c
2768
uint32_t state, val;
sys/dev/bwi/if_bwi.c
2778
val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);
sys/dev/bwi/if_bwi.c
2779
state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);
sys/dev/bwi/if_bwi.c
2795
val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);
sys/dev/bwi/if_bwi.c
2796
state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);
sys/dev/bwi/if_bwi.c
3273
uint32_t val, ctrl_base;
sys/dev/bwi/if_bwi.c
3278
val = CSR_READ_4(sc, ctrl_base + BWI_RX32_STATUS);
sys/dev/bwi/if_bwi.c
3279
end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /
sys/dev/bwi/if_bwi.c
3433
uint32_t val;
sys/dev/bwi/if_bwi.c
3448
val = CSR_READ_4(sc, BWI_PLL_ON_DELAY);
sys/dev/bwi/if_bwi.c
3449
sc->sc_pwron_delay = howmany((val + 2) * 1000000, freq.clkfreq_min);
sys/dev/bwi/if_bwi.c
3514
uint32_t val, disable_bits;
sys/dev/bwi/if_bwi.c
3517
val = CSR_READ_4(sc, BWI_STATE_LO);
sys/dev/bwi/if_bwi.c
3519
if ((val & (BWI_STATE_LO_CLOCK |
sys/dev/bwi/if_bwi.c
3662
uint32_t val;
sys/dev/bwi/if_bwi.c
3674
n = sizeof(buf) / sizeof(val);
sys/dev/bwi/if_bwi.c
3679
val = 0;
sys/dev/bwi/if_bwi.c
3680
for (j = 0; j < sizeof(val); ++j)
sys/dev/bwi/if_bwi.c
3681
val |= ((uint32_t)(*p++)) << (j * 8);
sys/dev/bwi/if_bwi.c
3683
TMPLT_WRITE_4(mac, 0x20 + (i * sizeof(val)), val);
sys/dev/bwi/if_bwi.c
3783
uint16_t gpio, val[BWI_LED_MAX];
sys/dev/bwi/if_bwi.c
3796
val[0] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_0);
sys/dev/bwi/if_bwi.c
3797
val[1] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_1);
sys/dev/bwi/if_bwi.c
3800
val[2] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_2);
sys/dev/bwi/if_bwi.c
3801
val[3] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_3);
sys/dev/bwi/if_bwi.c
3806
if (val[i] == 0xff) {
sys/dev/bwi/if_bwi.c
3809
if (val[i] & BWI_LED_ACT_LOW)
sys/dev/bwi/if_bwi.c
3811
led->l_act = __SHIFTOUT(val[i], BWI_LED_ACT_MASK);
sys/dev/bwi/if_bwi.c
3839
bwi_led_onoff(const struct bwi_led *led, uint16_t val, int on)
sys/dev/bwi/if_bwi.c
3844
val |= led->l_mask;
sys/dev/bwi/if_bwi.c
3846
val &= ~led->l_mask;
sys/dev/bwi/if_bwi.c
3847
return val;
sys/dev/bwi/if_bwi.c
3854
uint16_t val;
sys/dev/bwi/if_bwi.c
3865
val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
sys/dev/bwi/if_bwi.c
3905
val = bwi_led_onoff(led, val, on);
sys/dev/bwi/if_bwi.c
3907
CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
sys/dev/bwi/if_bwi.c
3948
uint16_t val;
sys/dev/bwi/if_bwi.c
3950
val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
sys/dev/bwi/if_bwi.c
3951
val = bwi_led_onoff(led, val, 1);
sys/dev/bwi/if_bwi.c
3952
CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
sys/dev/bwi/if_bwi.c
3969
uint16_t val;
sys/dev/bwi/if_bwi.c
3971
val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
sys/dev/bwi/if_bwi.c
3972
val = bwi_led_onoff(sc->sc_blink_led, val, 0);
sys/dev/bwi/if_bwi.c
3973
CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
sys/dev/bwi/if_bwi.c
755
uint32_t val;
sys/dev/bwi/if_bwi.c
757
val = CSR_READ_4(sc, BWI_ID_HI);
sys/dev/bwi/if_bwi.c
758
*type = BWI_ID_HI_REGWIN_TYPE(val);
sys/dev/bwi/if_bwi.c
759
*rev = BWI_ID_HI_REGWIN_REV(val);
sys/dev/bwi/if_bwi.c
763
__SHIFTOUT(val, BWI_ID_HI_REGWIN_VENDOR_MASK));
sys/dev/bwi/if_bwi.c
910
uint32_t val;
sys/dev/bwi/if_bwi.c
923
val = CSR_READ_4(sc, BWI_FLAGS);
sys/dev/bwi/if_bwi.c
929
CSR_SETBITS_4(sc, BWI_INTRVEC, (val & BWI_FLAGS_INTR_MASK));
sys/dev/bwi/if_bwi.c
939
val = pci_read_config(sc->sc_dev, BWI_PCIR_INTCTL, 4);
sys/dev/bwi/if_bwi.c
940
val |= mac_mask << 8;
sys/dev/bwi/if_bwi.c
941
pci_write_config(sc->sc_dev, BWI_PCIR_INTCTL, val, 4);
sys/dev/bwi/if_bwivar.h
81
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/bwi/if_bwivar.h
82
bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
sys/dev/bwi/if_bwivar.h
83
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/bwi/if_bwivar.h
84
bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
sys/dev/bwn/if_bwn.c
3094
uint32_t val;
sys/dev/bwn/if_bwn.c
3096
val = BWN_DMA_READ(dr, BWN_DMA32_RXSTATUS);
sys/dev/bwn/if_bwn.c
3097
val &= BWN_DMA32_RXDPTR;
sys/dev/bwn/if_bwn.c
3099
return (val / sizeof(struct bwn_dmadesc32));
sys/dev/bwn/if_bwn.c
3198
uint32_t val;
sys/dev/bwn/if_bwn.c
3200
val = BWN_DMA_READ(dr, BWN_DMA64_RXSTATUS);
sys/dev/bwn/if_bwn.c
3201
val &= BWN_DMA64_RXSTATDPTR;
sys/dev/bwn/if_bwn.c
3203
return (val / sizeof(struct bwn_dmadesc64));
sys/dev/bwn/if_bwn.c
3914
bwn_ram_write(struct bwn_mac *mac, uint16_t offset, uint32_t val)
sys/dev/bwn/if_bwn.c
3926
BWN_WRITE_4(mac, BWN_RAM_DATA, val);
sys/dev/bwn/if_bwn.c
5512
uint32_t val = 0;
sys/dev/bwn/if_bwn.c
5514
val = bwn_shm_read_2(mac, BWN_SHARED, 0x08a);
sys/dev/bwn/if_bwn.c
5515
val <<= 16;
sys/dev/bwn/if_bwn.c
5516
val |= bwn_shm_read_2(mac, BWN_SHARED, 0x088);
sys/dev/bwn/if_bwn.c
5518
return (val);
sys/dev/bwn/if_bwn.c
7408
uint8_t val;
sys/dev/bwn/if_bwn.c
7414
&val);
sys/dev/bwn/if_bwn.c
7425
if (val & BWN_LED_ACT_LOW)
sys/dev/bwn/if_bwn.c
7427
led->led_act = val & BWN_LED_ACT_MASK;
sys/dev/bwn/if_bwn.c
7457
bwn_led_onoff(const struct bwn_led *led, uint16_t val, int on)
sys/dev/bwn/if_bwn.c
7463
val |= led->led_mask;
sys/dev/bwn/if_bwn.c
7465
val &= ~led->led_mask;
sys/dev/bwn/if_bwn.c
7466
return val;
sys/dev/bwn/if_bwn.c
7474
uint16_t val;
sys/dev/bwn/if_bwn.c
7485
val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
sys/dev/bwn/if_bwn.c
7525
val = bwn_led_onoff(led, val, on);
sys/dev/bwn/if_bwn.c
7527
BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
sys/dev/bwn/if_bwn.c
7571
uint16_t val;
sys/dev/bwn/if_bwn.c
7573
val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
sys/dev/bwn/if_bwn.c
7574
val = bwn_led_onoff(led, val, 1);
sys/dev/bwn/if_bwn.c
7575
BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
sys/dev/bwn/if_bwn.c
7593
uint16_t val;
sys/dev/bwn/if_bwn.c
7595
val = BWN_READ_2(mac, BWN_GPIO_CONTROL);
sys/dev/bwn/if_bwn.c
7596
val = bwn_led_onoff(sc->sc_blink_led, val, 0);
sys/dev/bwn/if_bwn.c
7597
BWN_WRITE_2(mac, BWN_GPIO_CONTROL, val);
sys/dev/bwn/if_bwn_phy_common.c
152
uint32_t val, mask;
sys/dev/bwn/if_bwn_phy_common.c
160
val = BHND_IOCTL_CLK_FORCE;
sys/dev/bwn/if_bwn_phy_common.c
162
val = 0;
sys/dev/bwn/if_bwn_phy_common.c
165
if ((error = bhnd_write_ioctl(sc->sc_dev, val, mask))) {
sys/dev/bwn/if_bwn_phy_common.c
178
uint16_t val;
sys/dev/bwn/if_bwn_phy_common.c
182
val = BWN_RF_READ(mac, offset);
sys/dev/bwn/if_bwn_phy_common.c
183
if ((val & mask) == value)
sys/dev/bwn/if_bwn_phy_common.c
194
uint32_t val, mask;
sys/dev/bwn/if_bwn_phy_common.c
201
val = BWN_IOCTL_MACPHYCLKEN;
sys/dev/bwn/if_bwn_phy_common.c
203
val = 0;
sys/dev/bwn/if_bwn_phy_common.c
206
if ((error = bhnd_write_ioctl(sc->sc_dev, val, mask))) {
sys/dev/bwn/if_bwn_phy_g.c
1427
uint16_t offset, val;
sys/dev/bwn/if_bwn_phy_g.c
1468
for (val = 0x1e1f, offset = 0x0088; offset < 0x0098; offset++) {
sys/dev/bwn/if_bwn_phy_g.c
1469
BWN_PHY_WRITE(mac, offset, val);
sys/dev/bwn/if_bwn_phy_g.c
1470
val -= 0x0202;
sys/dev/bwn/if_bwn_phy_g.c
1472
for (val = 0x3e3f, offset = 0x0098; offset < 0x00a8; offset++) {
sys/dev/bwn/if_bwn_phy_g.c
1473
BWN_PHY_WRITE(mac, offset, val);
sys/dev/bwn/if_bwn_phy_g.c
1474
val -= 0x0202;
sys/dev/bwn/if_bwn_phy_g.c
1476
for (val = 0x2120, offset = 0x00a8; offset < 0x00c8; offset++) {
sys/dev/bwn/if_bwn_phy_g.c
1477
BWN_PHY_WRITE(mac, offset, (val & 0x3f3f));
sys/dev/bwn/if_bwn_phy_g.c
1478
val += 0x0202;
sys/dev/bwn/if_bwn_phy_g.c
2595
uint16_t val;
sys/dev/bwn/if_bwn_phy_g.c
2610
val = (uint8_t)(cal->ctl.q);
sys/dev/bwn/if_bwn_phy_g.c
2611
val |= ((uint8_t)(cal->ctl.i)) << 4;
sys/dev/bwn/if_bwn_phy_g.c
2617
| ((val & 0x00ff) << 8);
sys/dev/bwn/if_bwn_phy_g.c
2620
| (val & 0x00ff);
sys/dev/bwn/if_bwn_phy_lp.c
1087
static const uint16_t val[] = {
sys/dev/bwn/if_bwn_phy_lp.c
1095
BWN_PHY_WRITE(mac, addr[i], val[i]);
sys/dev/bwn/if_bwn_phy_lp.c
3691
bwn_nbits(int32_t val)
sys/dev/bwn/if_bwn_phy_lp.c
3696
for (tmp = abs(val); tmp != 0; tmp >>= 1)
sys/dev/bwn/if_bwn_phy_lp.c
817
uint32_t count, freqref, freqvco, val[3], timeout, timeoutref,
sys/dev/bwn/if_bwn_phy_lp.c
869
val[0] = bwn_phy_lp_roundup(freqxtal, 1000000, 16);
sys/dev/bwn/if_bwn_phy_lp.c
870
val[1] = bwn_phy_lp_roundup(freqxtal, 1000000 * div, 16);
sys/dev/bwn/if_bwn_phy_lp.c
871
val[2] = bwn_phy_lp_roundup(freqvco, 3, 16);
sys/dev/bwn/if_bwn_phy_lp.c
873
count = (bwn_phy_lp_roundup(val[2], val[1] + 16, 16) * (timeout + 1) *
sys/dev/bwn/if_bwn_phy_lp.c
879
tmp[0] = ((val[2] * 62500) / freqref) << 4;
sys/dev/bwn/if_bwn_phy_lp.c
880
tmp[1] = ((val[2] * 62500) % freqref) << 4;
sys/dev/bwn/if_bwn_phy_lp.c
896
tmp[2] = ((41 * (val[2] - 3000)) /1200) + 27;
sys/dev/bwn/if_bwn_phy_lp.c
909
tmp[5] = bwn_phy_lp_roundup(100 * val[0], val[2], 16) * (tmp[4] * 8) *
sys/dev/bwn/if_bwn_phy_lp.c
923
if (val[0] == 45)
sys/dev/bwn/if_bwn_util.h
34
bwn_hweight32(uint32_t val)
sys/dev/bwn/if_bwn_util.h
39
r = r + (val & 1);
sys/dev/bwn/if_bwn_util.h
40
val = val >> 1;
sys/dev/bwn/if_bwn_util.h
47
bwn_clamp_val(int val, int lo, int hi)
sys/dev/bwn/if_bwn_util.h
49
if (val < lo)
sys/dev/bwn/if_bwn_util.h
51
if (val > hi)
sys/dev/bwn/if_bwn_util.h
53
return val;
sys/dev/bxe/bxe.c
10226
uint32_t val = REG_RD(sc, addr);
sys/dev/bxe/bxe.c
10233
val &= ~(HC_CONFIG_0_REG_SINGLE_ISR_EN_0 |
sys/dev/bxe/bxe.c
10235
val |= (HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 |
sys/dev/bxe/bxe.c
10238
val |= HC_CONFIG_0_REG_SINGLE_ISR_EN_0;
sys/dev/bxe/bxe.c
10241
val &= ~HC_CONFIG_0_REG_INT_LINE_EN_0;
sys/dev/bxe/bxe.c
10242
val |= (HC_CONFIG_0_REG_SINGLE_ISR_EN_0 |
sys/dev/bxe/bxe.c
10246
val |= (HC_CONFIG_0_REG_SINGLE_ISR_EN_0 |
sys/dev/bxe/bxe.c
10253
val, port, addr);
sys/dev/bxe/bxe.c
10255
REG_WR(sc, addr, val);
sys/dev/bxe/bxe.c
10257
val &= ~HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0;
sys/dev/bxe/bxe.c
10266
val, port, addr, ((msix) ? "MSI-X" : ((msi) ? "MSI" : "INTx")));
sys/dev/bxe/bxe.c
10268
REG_WR(sc, addr, val);
sys/dev/bxe/bxe.c
10276
val = (0xee0f | (1 << (SC_VN(sc) + 4)));
sys/dev/bxe/bxe.c
10279
val |= 0x1100;
sys/dev/bxe/bxe.c
10282
val = 0xffff;
sys/dev/bxe/bxe.c
10285
REG_WR(sc, (HC_REG_TRAILING_EDGE_0 + port*8), val);
sys/dev/bxe/bxe.c
10286
REG_WR(sc, (HC_REG_LEADING_EDGE_0 + port*8), val);
sys/dev/bxe/bxe.c
10296
uint32_t val;
sys/dev/bxe/bxe.c
10302
val = REG_RD(sc, IGU_REG_PF_CONFIGURATION);
sys/dev/bxe/bxe.c
10305
val &= ~(IGU_PF_CONF_INT_LINE_EN |
sys/dev/bxe/bxe.c
10307
val |= (IGU_PF_CONF_MSI_MSIX_EN |
sys/dev/bxe/bxe.c
10310
val |= IGU_PF_CONF_SINGLE_ISR_EN;
sys/dev/bxe/bxe.c
10313
val &= ~IGU_PF_CONF_INT_LINE_EN;
sys/dev/bxe/bxe.c
10314
val |= (IGU_PF_CONF_MSI_MSIX_EN |
sys/dev/bxe/bxe.c
10318
val &= ~IGU_PF_CONF_MSI_MSIX_EN;
sys/dev/bxe/bxe.c
10319
val |= (IGU_PF_CONF_INT_LINE_EN |
sys/dev/bxe/bxe.c
10326
REG_WR(sc, IGU_REG_PF_CONFIGURATION, val);
sys/dev/bxe/bxe.c
10330
val |= IGU_PF_CONF_FUNC_EN;
sys/dev/bxe/bxe.c
10333
val, ((msix) ? "MSI-X" : ((msi) ? "MSI" : "INTx")));
sys/dev/bxe/bxe.c
10335
REG_WR(sc, IGU_REG_PF_CONFIGURATION, val);
sys/dev/bxe/bxe.c
10341
val = (0xee0f | (1 << (SC_VN(sc) + 4)));
sys/dev/bxe/bxe.c
10344
val |= 0x1100;
sys/dev/bxe/bxe.c
10347
val = 0xffff;
sys/dev/bxe/bxe.c
10350
REG_WR(sc, IGU_REG_TRAILING_EDGE_LATCH, val);
sys/dev/bxe/bxe.c
10351
REG_WR(sc, IGU_REG_LEADING_EDGE_LATCH, val);
sys/dev/bxe/bxe.c
10372
uint32_t val = REG_RD(sc, addr);
sys/dev/bxe/bxe.c
10386
val &= ~(HC_CONFIG_0_REG_SINGLE_ISR_EN_0 |
sys/dev/bxe/bxe.c
10390
val &= ~(HC_CONFIG_0_REG_SINGLE_ISR_EN_0 |
sys/dev/bxe/bxe.c
10396
BLOGD(sc, DBG_INTR, "write %x to HC %d (addr 0x%x)\n", val, port, addr);
sys/dev/bxe/bxe.c
10401
REG_WR(sc, addr, val);
sys/dev/bxe/bxe.c
10402
if (REG_RD(sc, addr) != val) {
sys/dev/bxe/bxe.c
10410
uint32_t val = REG_RD(sc, IGU_REG_PF_CONFIGURATION);
sys/dev/bxe/bxe.c
10412
val &= ~(IGU_PF_CONF_MSI_MSIX_EN |
sys/dev/bxe/bxe.c
10416
BLOGD(sc, DBG_INTR, "write %x to IGU\n", val);
sys/dev/bxe/bxe.c
10421
REG_WR(sc, IGU_REG_PF_CONFIGURATION, val);
sys/dev/bxe/bxe.c
10422
if (REG_RD(sc, IGU_REG_PF_CONFIGURATION) != val) {
sys/dev/bxe/bxe.c
10702
uint32_t val;
sys/dev/bxe/bxe.c
10715
val = REG_RD(sc, HC_REG_CONFIG_1);
sys/dev/bxe/bxe.c
10717
(!close) ? (val | HC_CONFIG_1_REG_BLOCK_DISABLE_1) :
sys/dev/bxe/bxe.c
10718
(val & ~(uint32_t)HC_CONFIG_1_REG_BLOCK_DISABLE_1));
sys/dev/bxe/bxe.c
10720
val = REG_RD(sc, HC_REG_CONFIG_0);
sys/dev/bxe/bxe.c
10722
(!close) ? (val | HC_CONFIG_0_REG_BLOCK_DISABLE_0) :
sys/dev/bxe/bxe.c
10723
(val & ~(uint32_t)HC_CONFIG_0_REG_BLOCK_DISABLE_0));
sys/dev/bxe/bxe.c
10726
val = REG_RD(sc, IGU_REG_BLOCK_CONFIGURATION);
sys/dev/bxe/bxe.c
10730
(val | IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE) :
sys/dev/bxe/bxe.c
10731
(val & ~(uint32_t)IGU_BLOCK_CONFIGURATION_REG_BLOCK_ENABLE));
sys/dev/bxe/bxe.c
10772
uint32_t val = MFCFG_RD(sc, shared_mf_config.clp_mb);
sys/dev/bxe/bxe.c
10773
*magic_val = val & SHARED_MF_CLP_MAGIC;
sys/dev/bxe/bxe.c
10774
MFCFG_WR(sc, shared_mf_config.clp_mb, val | SHARED_MF_CLP_MAGIC);
sys/dev/bxe/bxe.c
10783
uint32_t val = MFCFG_RD(sc, shared_mf_config.clp_mb);
sys/dev/bxe/bxe.c
10785
(val & (~SHARED_MF_CLP_MAGIC)) | magic_val);
sys/dev/bxe/bxe.c
10831
uint32_t val = 0;
sys/dev/bxe/bxe.c
10839
val = SHMEM_RD(sc, validity_map[SC_PORT(sc)]);
sys/dev/bxe/bxe.c
10840
if (val & SHR_MEM_VALIDITY_MB)
sys/dev/bxe/bxe.c
10992
uint32_t val = 0;
sys/dev/bxe/bxe.c
11054
bxe_reset_mcp_prep(sc, &val);
sys/dev/bxe/bxe.c
11071
if (global && bxe_reset_mcp_comp(sc, val)) {
sys/dev/bxe/bxe.c
1113
uint32_t val = 0;
sys/dev/bxe/bxe.c
1129
val = REG_RD(sc, MCP_REG_MCPR_NVM_SW_ARB);
sys/dev/bxe/bxe.c
1130
if (val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port)) {
sys/dev/bxe/bxe.c
1137
if (!(val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port))) {
sys/dev/bxe/bxe.c
1140
port, val);
sys/dev/bxe/bxe.c
1152
uint32_t val = 0;
sys/dev/bxe/bxe.c
1165
val = REG_RD(sc, MCP_REG_MCPR_NVM_SW_ARB);
sys/dev/bxe/bxe.c
1166
if (!(val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port))) {
sys/dev/bxe/bxe.c
1173
if (val & (MCPR_NVM_SW_ARB_ARB_ARB1 << port)) {
sys/dev/bxe/bxe.c
1176
port, val);
sys/dev/bxe/bxe.c
1189
uint32_t val;
sys/dev/bxe/bxe.c
1191
val = REG_RD(sc, MCP_REG_MCPR_NVM_ACCESS_ENABLE);
sys/dev/bxe/bxe.c
1195
(val | MCPR_NVM_ACCESS_ENABLE_EN | MCPR_NVM_ACCESS_ENABLE_WR_EN));
sys/dev/bxe/bxe.c
1201
uint32_t val;
sys/dev/bxe/bxe.c
1203
val = REG_RD(sc, MCP_REG_MCPR_NVM_ACCESS_ENABLE);
sys/dev/bxe/bxe.c
1207
(val & ~(MCPR_NVM_ACCESS_ENABLE_EN |
sys/dev/bxe/bxe.c
1218
uint32_t val;
sys/dev/bxe/bxe.c
1244
val = REG_RD(sc, MCP_REG_MCPR_NVM_COMMAND);
sys/dev/bxe/bxe.c
1246
if (val & MCPR_NVM_COMMAND_DONE) {
sys/dev/bxe/bxe.c
1247
val = REG_RD(sc, MCP_REG_MCPR_NVM_READ);
sys/dev/bxe/bxe.c
1252
*ret_val = htobe32(val);
sys/dev/bxe/bxe.c
12593
uint32_t val;
sys/dev/bxe/bxe.c
1261
offset, cmd_flags, val);
sys/dev/bxe/bxe.c
1274
uint32_t val;
sys/dev/bxe/bxe.c
12795
val = SHMEM2_RD(sc, drv_capabilities_flag[SC_FW_MB_IDX(sc)]);
sys/dev/bxe/bxe.c
12797
(val |
sys/dev/bxe/bxe.c
1302
rc = bxe_nvram_read_dword(sc, offset, &val, cmd_flags);
sys/dev/bxe/bxe.c
1303
memcpy(ret_buf, &val, 4);
sys/dev/bxe/bxe.c
13102
uint32_t val = 0;
sys/dev/bxe/bxe.c
13111
val = REG_RD(sc, BAR_ME_REGISTER);
sys/dev/bxe/bxe.c
13114
(uint8_t)((val & ME_REG_PF_NUM) >> ME_REG_PF_NUM_SHIFT);
sys/dev/bxe/bxe.c
13116
(uint8_t)((val & ME_REG_ABS_PF_NUM) >> ME_REG_ABS_PF_NUM_SHIFT) & 1;
sys/dev/bxe/bxe.c
1314
rc = bxe_nvram_read_dword(sc, offset, &val, cmd_flags);
sys/dev/bxe/bxe.c
1315
memcpy(ret_buf, &val, 4);
sys/dev/bxe/bxe.c
13255
uint32_t val;
sys/dev/bxe/bxe.c
13259
val = MFCFG_RD(sc, func_mf_config[SC_ABS_FUNC(sc)].e1hov_tag);
sys/dev/bxe/bxe.c
13260
mf_info->ext_id = (uint16_t)val;
sys/dev/bxe/bxe.c
1328
uint32_t val,
sys/dev/bxe/bxe.c
13290
uint32_t val;
sys/dev/bxe/bxe.c
13292
val = MFCFG_RD(sc, func_ext_config[SC_ABS_FUNC(sc)].func_cfg);
sys/dev/bxe/bxe.c
13294
if (val & MACP_FUNC_CFG_FLAGS_ENABLED) {
sys/dev/bxe/bxe.c
13295
if (val & MACP_FUNC_CFG_FLAGS_ETHERNET) {
sys/dev/bxe/bxe.c
13298
if (val & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD) {
sys/dev/bxe/bxe.c
13301
if (val & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD) {
sys/dev/bxe/bxe.c
13313
uint32_t val;
sys/dev/bxe/bxe.c
13320
val = MFCFG_RD(sc, func_ext_config[SC_ABS_FUNC(sc)].func_cfg);
sys/dev/bxe/bxe.c
13322
mf_info->multi_vnics_mode = ((val & MACP_FUNC_CFG_FLAGS_MASK) != 0);
sys/dev/bxe/bxe.c
1340
REG_WR(sc, MCP_REG_MCPR_NVM_WRITE, val);
sys/dev/bxe/bxe.c
13482
uint32_t val, mac_upper;
sys/dev/bxe/bxe.c
13502
val = SHMEM_RD(sc, dev_info.shared_feature_config.config);
sys/dev/bxe/bxe.c
13504
switch (val & SHARED_FEAT_CFG_FORCE_SF_MODE_MASK)
sys/dev/bxe/bxe.c
13523
val = MFCFG_RD(sc, func_mf_config[SC_ABS_FUNC(sc)].e1hov_tag);
sys/dev/bxe/bxe.c
13525
if ((val & FUNC_MF_CFG_E1HOV_TAG_MASK) !=
sys/dev/bxe/bxe.c
13559
(val & SHARED_FEAT_CFG_FORCE_SF_MODE_MASK));
sys/dev/bxe/bxe.c
13577
val = MFCFG_RD(sc, func_mf_config[abs_func_other_port].e1hov_tag);
sys/dev/bxe/bxe.c
13579
mf_info->path_has_ovlan = VALID_OVLAN((uint16_t)val) ? 1 : 0;
sys/dev/bxe/bxe.c
1359
val = REG_RD(sc, MCP_REG_MCPR_NVM_COMMAND);
sys/dev/bxe/bxe.c
1360
if (val & MCPR_NVM_COMMAND_DONE) {
sys/dev/bxe/bxe.c
13626
val = MFCFG_RD(sc, func_mf_config[i].config);
sys/dev/bxe/bxe.c
13628
((val & FUNC_MF_CFG_MIN_BW_MASK) >> FUNC_MF_CFG_MIN_BW_SHIFT);
sys/dev/bxe/bxe.c
13630
((val & FUNC_MF_CFG_MAX_BW_MASK) >> FUNC_MF_CFG_MAX_BW_SHIFT);
sys/dev/bxe/bxe.c
13641
uint32_t mac_hi, mac_lo, val;
sys/dev/bxe/bxe.c
13674
val = SHMEM_RD(sc, dev_info.port_feature_config[port].link_config);
sys/dev/bxe/bxe.c
13675
sc->port.link_config[ELINK_INT_PHY] = val;
sys/dev/bxe/bxe.c
13676
sc->link_params.switch_cfg = (val & PORT_FEATURE_CONNECTED_SWITCH_MASK);
sys/dev/bxe/bxe.c
13681
val = SHMEM_RD(sc, dev_info.shared_feature_config.config);
sys/dev/bxe/bxe.c
13682
if (val & SHARED_FEAT_CFG_OVERRIDE_PREEMPHASIS_CFG_ENABLED) {
sys/dev/bxe/bxe.c
1369
offset, cmd_flags, val);
sys/dev/bxe/bxe.c
1385
uint32_t val;
sys/dev/bxe/bxe.c
13896
#define IGU_FID(val) GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID)
sys/dev/bxe/bxe.c
13897
#define IGU_VEC(val) GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR)
sys/dev/bxe/bxe.c
13904
uint32_t val;
sys/dev/bxe/bxe.c
13923
val = REG_RD(sc, IGU_REG_MAPPING_MEMORY + igu_sb_id * 4);
sys/dev/bxe/bxe.c
13924
if (!(val & IGU_REG_MAPPING_MEMORY_VALID)) {
sys/dev/bxe/bxe.c
13927
fid = IGU_FID(val);
sys/dev/bxe/bxe.c
13932
if (IGU_VEC(val) == 0) {
sys/dev/bxe/bxe.c
13967
uint32_t val;
sys/dev/bxe/bxe.c
14004
val = (REG_RD(sc, 0x2874) & 0x55);
sys/dev/bxe/bxe.c
14006
(CHIP_IS_E1(sc) && val) ||
sys/dev/bxe/bxe.c
14007
(CHIP_IS_E1H(sc) && (val == 0x55))) {
sys/dev/bxe/bxe.c
14023
val = REG_RD(sc, MISC_REG_PORT4MODE_EN_OVWR);
sys/dev/bxe/bxe.c
14024
if (val & 1) {
sys/dev/bxe/bxe.c
14025
val = ((val >> 1) & 1);
sys/dev/bxe/bxe.c
14027
val = REG_RD(sc, MISC_REG_PORT4MODE_EN);
sys/dev/bxe/bxe.c
14031
(val) ? CHIP_4_PORT_MODE : CHIP_2_PORT_MODE;
sys/dev/bxe/bxe.c
14033
BLOGD(sc, DBG_LOAD, "Port mode = %s\n", (val) ? "4" : "2");
sys/dev/bxe/bxe.c
14058
val = SHMEM_RD(sc, validity_map[SC_PORT(sc)]);
sys/dev/bxe/bxe.c
14059
if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) !=
sys/dev/bxe/bxe.c
1406
rc = bxe_nvram_read_dword(sc, align_offset, &val, cmd_flags);
sys/dev/bxe/bxe.c
14061
BLOGE(sc, "Invalid SHMEM validity signature: 0x%08x\n", val);
sys/dev/bxe/bxe.c
14064
BLOGD(sc, DBG_LOAD, "Valid SHMEM validity signature: 0x%08x\n", val);
sys/dev/bxe/bxe.c
1409
val &= ~(0xff << BYTE_OFFSET(offset));
sys/dev/bxe/bxe.c
1410
val |= (*data_buf << BYTE_OFFSET(offset));
sys/dev/bxe/bxe.c
14105
val = REG_RD(sc, MCP_REG_MCPR_NVM_CFG4);
sys/dev/bxe/bxe.c
14107
(NVRAM_1MB_SIZE << (val & MCPR_NVM_CFG4_FLASH_SIZE));
sys/dev/bxe/bxe.c
14119
val = pci_read_config(sc->dev,
sys/dev/bxe/bxe.c
14123
sc->igu_sb_cnt = (val & PCIM_MSIXCTRL_TABLE_SIZE);
sys/dev/bxe/bxe.c
14141
val = REG_RD(sc, IGU_REG_BLOCK_CONFIGURATION);
sys/dev/bxe/bxe.c
14143
if (val & IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN) {
sys/dev/bxe/bxe.c
14148
val &= ~(IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN);
sys/dev/bxe/bxe.c
14149
REG_WR(sc, IGU_REG_BLOCK_CONFIGURATION, val);
sys/dev/bxe/bxe.c
1415
val = be32toh(val);
sys/dev/bxe/bxe.c
14164
if (val & IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN) {
sys/dev/bxe/bxe.c
1417
rc = bxe_nvram_write_dword(sc, align_offset, val, cmd_flags);
sys/dev/bxe/bxe.c
1434
uint32_t val;
sys/dev/bxe/bxe.c
1479
memcpy(&val, data_buf, 4);
sys/dev/bxe/bxe.c
1481
rc = bxe_nvram_write_dword(sc, offset, val, cmd_flags);
sys/dev/bxe/bxe.c
15257
uint32_t val;
sys/dev/bxe/bxe.c
15260
val = REG_RD(sc, PGLUE_B_REG_PGLUE_B_INT_STS);
sys/dev/bxe/bxe.c
15261
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN) {
sys/dev/bxe/bxe.c
15434
uint32_t val, base_addr, offset, mask, reset_reg;
sys/dev/bxe/bxe.c
15448
val = REG_RD(sc, NIG_REG_BMAC0_REGS_OUT_EN + port * 4);
sys/dev/bxe/bxe.c
15450
if ((mask & reset_reg) && val) {
sys/dev/bxe/bxe.c
15482
val = REG_RD(sc, base_addr + XMAC_REG_PFC_CTRL_HI);
sys/dev/bxe/bxe.c
15483
REG_WR(sc, base_addr + XMAC_REG_PFC_CTRL_HI, val & ~(1 << 1));
sys/dev/bxe/bxe.c
15484
REG_WR(sc, base_addr + XMAC_REG_PFC_CTRL_HI, val | (1 << 1));
sys/dev/bxe/bxe.c
15508
#define BXE_PREV_UNDI_RCQ(val) ((val) & 0xffff)
sys/dev/bxe/bxe.c
15509
#define BXE_PREV_UNDI_BD(val) ((val) >> 16 & 0xffff)
sys/dev/bxe/bxe.c
16572
uint32_t val = 0x1400;
sys/dev/bxe/bxe.c
16578
val |= MISC_REGISTERS_RESET_REG_2_MSTAT0;
sys/dev/bxe/bxe.c
16579
val |= MISC_REGISTERS_RESET_REG_2_MSTAT1;
sys/dev/bxe/bxe.c
16582
REG_WR(sc, (GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR), val);
sys/dev/bxe/bxe.c
16615
uint32_t val = REG_RD(sc, IGU_REG_PF_CONFIGURATION);
sys/dev/bxe/bxe.c
16617
val &= ~IGU_PF_CONF_FUNC_EN;
sys/dev/bxe/bxe.c
16619
REG_WR(sc, IGU_REG_PF_CONFIGURATION, val);
sys/dev/bxe/bxe.c
16717
uint32_t val = 0;
sys/dev/bxe/bxe.c
16744
val = *BXE_SP(sc, wb_data[0]);
sys/dev/bxe/bxe.c
16745
if (val == 0x10) {
sys/dev/bxe/bxe.c
16753
if (val != 0x10) {
sys/dev/bxe/bxe.c
16754
BLOGE(sc, "NIG timeout val=0x%x\n", val);
sys/dev/bxe/bxe.c
16761
val = REG_RD(sc, PRS_REG_NUM_OF_PACKETS);
sys/dev/bxe/bxe.c
16762
if (val == 1) {
sys/dev/bxe/bxe.c
16770
if (val != 0x1) {
sys/dev/bxe/bxe.c
16771
BLOGE(sc, "PRS timeout val=0x%x\n", val);
sys/dev/bxe/bxe.c
16801
val = *BXE_SP(sc, wb_data[0]);
sys/dev/bxe/bxe.c
16802
if (val == 0xb0) {
sys/dev/bxe/bxe.c
16810
if (val != 0xb0) {
sys/dev/bxe/bxe.c
16811
BLOGE(sc, "NIG timeout val=0x%x\n", val);
sys/dev/bxe/bxe.c
16816
val = REG_RD(sc, PRS_REG_NUM_OF_PACKETS);
sys/dev/bxe/bxe.c
16817
if (val != 2) {
sys/dev/bxe/bxe.c
16818
BLOGE(sc, "PRS timeout val=0x%x\n", val);
sys/dev/bxe/bxe.c
16828
val = REG_RD(sc, PRS_REG_NUM_OF_PACKETS);
sys/dev/bxe/bxe.c
16829
if (val != 3) {
sys/dev/bxe/bxe.c
16830
BLOGE(sc, "PRS timeout val=0x%x\n", val);
sys/dev/bxe/bxe.c
16838
val = REG_RD(sc, NIG_REG_INGRESS_EOP_LB_EMPTY);
sys/dev/bxe/bxe.c
16839
if (val != 1) {
sys/dev/bxe/bxe.c
16840
BLOGE(sc, "clear of NIG failed val=0x%x\n", val);
sys/dev/bxe/bxe.c
16869
uint32_t val;
sys/dev/bxe/bxe.c
16873
val = (SHMEM_RD(sc, dev_info.shared_hw_config.config2) &
sys/dev/bxe/bxe.c
16876
if (val == SHARED_HW_CFG_FAN_FAILURE_ENABLED) {
sys/dev/bxe/bxe.c
16884
else if (val == SHARED_HW_CFG_FAN_FAILURE_PHY_TYPE) {
sys/dev/bxe/bxe.c
16903
val = REG_RD(sc, MISC_REG_SPIO_INT);
sys/dev/bxe/bxe.c
16904
val |= (MISC_SPIO_SPIO5 << MISC_SPIO_INT_OLD_SET_POS);
sys/dev/bxe/bxe.c
16905
REG_WR(sc, MISC_REG_SPIO_INT, val);
sys/dev/bxe/bxe.c
16908
val = REG_RD(sc, MISC_REG_SPIO_EVENT_EN);
sys/dev/bxe/bxe.c
16909
val |= MISC_SPIO_SPIO5;
sys/dev/bxe/bxe.c
16910
REG_WR(sc, MISC_REG_SPIO_EVENT_EN, val);
sys/dev/bxe/bxe.c
16916
uint32_t val;
sys/dev/bxe/bxe.c
16952
val = (PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_AFT |
sys/dev/bxe/bxe.c
16956
val |= (PXP2_PXP2_INT_MASK_0_REG_PGL_READ_BLOCKED |
sys/dev/bxe/bxe.c
16959
REG_WR(sc, PXP2_REG_PXP2_INT_MASK_0, val);
sys/dev/bxe/bxe.c
16986
uint32_t val;
sys/dev/bxe/bxe.c
17001
val = 0xfffc;
sys/dev/bxe/bxe.c
17003
val |= MISC_REGISTERS_RESET_REG_2_MSTAT0;
sys/dev/bxe/bxe.c
17004
val |= MISC_REGISTERS_RESET_REG_2_MSTAT1;
sys/dev/bxe/bxe.c
17007
REG_WR(sc, (GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET), val);
sys/dev/bxe/bxe.c
17079
val = REG_RD(sc, PXP2_REG_RQ_CFG_DONE);
sys/dev/bxe/bxe.c
17080
if (val != 1) {
sys/dev/bxe/bxe.c
17082
val);
sys/dev/bxe/bxe.c
17085
val = REG_RD(sc, PXP2_REG_RD_INIT_DONE);
sys/dev/bxe/bxe.c
17086
if (val != 1) {
sys/dev/bxe/bxe.c
17087
BLOGE(sc, "PXP2 RD_INIT failed val = 0x%x\n", val);
sys/dev/bxe/bxe.c
17208
val = REG_RD(sc, ATC_REG_ATC_INIT_DONE);
sys/dev/bxe/bxe.c
17209
} while (factor-- && (val != 1));
sys/dev/bxe/bxe.c
17211
if (val != 1) {
sys/dev/bxe/bxe.c
17212
BLOGE(sc, "ATC_INIT failed val = 0x%x\n", val);
sys/dev/bxe/bxe.c
17363
val = (4 << 24) + (0 << 12) + 1024;
sys/dev/bxe/bxe.c
17364
REG_WR(sc, CDU_REG_CDU_GLOBAL_PARAMS, val);
sys/dev/bxe/bxe.c
17419
val = reg_poll(sc, CFC_REG_LL_INIT_DONE, 1, 100, 10);
sys/dev/bxe/bxe.c
17420
if (val != 1) {
sys/dev/bxe/bxe.c
17421
BLOGE(sc, "CFC LL_INIT failed val=0x%x\n", val);
sys/dev/bxe/bxe.c
17424
val = reg_poll(sc, CFC_REG_AC_INIT_DONE, 1, 100, 10);
sys/dev/bxe/bxe.c
17425
if (val != 1) {
sys/dev/bxe/bxe.c
17426
BLOGE(sc, "CFC AC_INIT failed val=0x%x\n", val);
sys/dev/bxe/bxe.c
17429
val = reg_poll(sc, CFC_REG_CAM_INIT_DONE, 1, 100, 10);
sys/dev/bxe/bxe.c
17430
if (val != 1) {
sys/dev/bxe/bxe.c
17431
BLOGE(sc, "CFC CAM_INIT failed val=0x%x\n", val);
sys/dev/bxe/bxe.c
17439
val = *BXE_SP(sc, wb_data[0]);
sys/dev/bxe/bxe.c
17442
if ((val == 0) && bxe_int_mem_test(sc)) {
sys/dev/bxe/bxe.c
17443
BLOGE(sc, "internal mem self test failed val=0x%x\n", val);
sys/dev/bxe/bxe.c
17497
uint32_t val;
sys/dev/bxe/bxe.c
17547
val = sc->mtu;
sys/dev/bxe/bxe.c
17549
low = (96 + (val / 64) + ((val % 64) ? 1 : 0));
sys/dev/bxe/bxe.c
17640
val = IS_MF(sc) ? 0xF7 : 0x7;
sys/dev/bxe/bxe.c
17642
val |= CHIP_IS_E1(sc) ? 0 : 0x10;
sys/dev/bxe/bxe.c
17643
REG_WR(sc, MISC_REG_AEU_MASK_ATTN_FUNC_0 + port*4, val);
sys/dev/bxe/bxe.c
17678
val = 0;
sys/dev/bxe/bxe.c
17681
val = 1;
sys/dev/bxe/bxe.c
17685
val = 2;
sys/dev/bxe/bxe.c
17690
NIG_REG_LLH0_CLS_TYPE), val);
sys/dev/bxe/bxe.c
17698
val = REG_RD(sc, MISC_REG_SPIO_EVENT_EN);
sys/dev/bxe/bxe.c
17699
if (val & MISC_SPIO_SPIO5) {
sys/dev/bxe/bxe.c
17702
val = REG_RD(sc, reg_addr);
sys/dev/bxe/bxe.c
17703
val |= AEU_INPUTS_ATTN_BITS_SPIO5;
sys/dev/bxe/bxe.c
17704
REG_WR(sc, reg_addr, val);
sys/dev/bxe/bxe.c
17717
uint32_t val;
sys/dev/bxe/bxe.c
17719
while ((val = REG_RD(sc, reg)) != expected && cur_cnt--) {
sys/dev/bxe/bxe.c
17723
return (val);
sys/dev/bxe/bxe.c
17732
uint32_t val = bxe_flr_clnup_reg_poll(sc, reg, 0, poll_cnt);
sys/dev/bxe/bxe.c
17734
if (val != 0) {
sys/dev/bxe/bxe.c
17735
BLOGE(sc, "%s usage count=%d\n", msg, val);
sys/dev/bxe/bxe.c
17993
uint32_t val;
sys/dev/bxe/bxe.c
17995
val = REG_RD(sc, CFC_REG_WEAK_ENABLE_PF);
sys/dev/bxe/bxe.c
17996
BLOGD(sc, DBG_LOAD, "CFC_REG_WEAK_ENABLE_PF is 0x%x\n", val);
sys/dev/bxe/bxe.c
17998
val = REG_RD(sc, PBF_REG_DISABLE_PF);
sys/dev/bxe/bxe.c
17999
BLOGD(sc, DBG_LOAD, "PBF_REG_DISABLE_PF is 0x%x\n", val);
sys/dev/bxe/bxe.c
18001
val = REG_RD(sc, IGU_REG_PCI_PF_MSI_EN);
sys/dev/bxe/bxe.c
18002
BLOGD(sc, DBG_LOAD, "IGU_REG_PCI_PF_MSI_EN is 0x%x\n", val);
sys/dev/bxe/bxe.c
18004
val = REG_RD(sc, IGU_REG_PCI_PF_MSIX_EN);
sys/dev/bxe/bxe.c
18005
BLOGD(sc, DBG_LOAD, "IGU_REG_PCI_PF_MSIX_EN is 0x%x\n", val);
sys/dev/bxe/bxe.c
18007
val = REG_RD(sc, IGU_REG_PCI_PF_MSIX_FUNC_MASK);
sys/dev/bxe/bxe.c
18008
BLOGD(sc, DBG_LOAD, "IGU_REG_PCI_PF_MSIX_FUNC_MASK is 0x%x\n", val);
sys/dev/bxe/bxe.c
18010
val = REG_RD(sc, PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR);
sys/dev/bxe/bxe.c
18011
BLOGD(sc, DBG_LOAD, "PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR is 0x%x\n", val);
sys/dev/bxe/bxe.c
18013
val = REG_RD(sc, PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR);
sys/dev/bxe/bxe.c
18014
BLOGD(sc, DBG_LOAD, "PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR is 0x%x\n", val);
sys/dev/bxe/bxe.c
18016
val = REG_RD(sc, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER);
sys/dev/bxe/bxe.c
18017
BLOGD(sc, DBG_LOAD, "PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER is 0x%x\n", val);
sys/dev/bxe/bxe.c
18076
uint32_t addr, val;
sys/dev/bxe/bxe.c
18096
val = REG_RD(sc, addr);
sys/dev/bxe/bxe.c
18097
val |= HC_CONFIG_0_REG_MSI_ATTN_EN_0;
sys/dev/bxe/bxe.c
18098
REG_WR(sc, addr, val);
sys/dev/bxe/bxe.c
1815
uint32_t val)
sys/dev/bxe/bxe.c
1817
REG_WR(sc, reg_addr, val);
sys/dev/bxe/bxe.c
18337
val = REG_RD(sc, main_mem_prty_clr);
sys/dev/bxe/bxe.c
18338
if (val) {
sys/dev/bxe/bxe.c
18341
val);
sys/dev/bxe/bxe.c
18391
uint32_t val;
sys/dev/bxe/bxe.c
18411
val = REG_RD(sc, BRB1_REG_PORT_NUM_OCC_BLOCKS_0 + port*4);
sys/dev/bxe/bxe.c
18412
if (val) {
sys/dev/bxe/bxe.c
18414
"BRB1 is not empty, %d blocks are occupied\n", val);
sys/dev/bxe/bxe.c
18581
uint32_t val)
sys/dev/bxe/bxe.c
18583
bxe_reg_wr_ind(sc, addr, val);
sys/dev/bxe/bxe.c
4127
uint32_t val;
sys/dev/bxe/bxe.c
4136
val = REG_RD(sc, addr);
sys/dev/bxe/bxe.c
4137
val &= ~(0x300);
sys/dev/bxe/bxe.c
4138
REG_WR(sc, addr, val);
sys/dev/bxe/bxe.c
4140
val = REG_RD(sc, MISC_REG_AEU_GENERAL_MASK);
sys/dev/bxe/bxe.c
4141
val &= ~(MISC_AEU_GENERAL_MASK_REG_AEU_PXP_CLOSE_MASK |
sys/dev/bxe/bxe.c
4143
REG_WR(sc, MISC_REG_AEU_GENERAL_MASK, val);
sys/dev/bxe/bxe.c
4214
uint32_t val;
sys/dev/bxe/bxe.c
4234
val = SHMEM2_RD(sc, drv_capabilities_flag[SC_FW_MB_IDX(sc)]);
sys/dev/bxe/bxe.c
4236
val & ~DRV_FLAGS_CAPABILITIES_LOADED_L2);
sys/dev/bxe/bxe.c
6605
uint32_t val;
sys/dev/bxe/bxe.c
6607
val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6608
REG_WR(sc, BXE_RECOVERY_GLOB_REG, val | BXE_GLOBAL_RESET_BIT);
sys/dev/bxe/bxe.c
6616
uint32_t val;
sys/dev/bxe/bxe.c
6618
val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6619
REG_WR(sc, BXE_RECOVERY_GLOB_REG, val & (~BXE_GLOBAL_RESET_BIT));
sys/dev/bxe/bxe.c
6627
uint32_t val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6628
BLOGD(sc, DBG_LOAD, "GLOB_REG=0x%08x\n", val);
sys/dev/bxe/bxe.c
6629
return (val & BXE_GLOBAL_RESET_BIT) ? TRUE : FALSE;
sys/dev/bxe/bxe.c
6636
uint32_t val;
sys/dev/bxe/bxe.c
6642
val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6644
val &= ~bit;
sys/dev/bxe/bxe.c
6645
REG_WR(sc, BXE_RECOVERY_GLOB_REG, val);
sys/dev/bxe/bxe.c
6654
uint32_t val;
sys/dev/bxe/bxe.c
6660
val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6662
val |= bit;
sys/dev/bxe/bxe.c
6663
REG_WR(sc, BXE_RECOVERY_GLOB_REG, val);
sys/dev/bxe/bxe.c
6673
uint32_t val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6678
return (val & bit) ? FALSE : TRUE;
sys/dev/bxe/bxe.c
6690
uint32_t val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6692
BLOGD(sc, DBG_LOAD, "Old value for GLOB_REG=0x%08x\n", val);
sys/dev/bxe/bxe.c
6694
val = ((val & mask) >> shift);
sys/dev/bxe/bxe.c
6696
BLOGD(sc, DBG_LOAD, "Load mask engine %d = 0x%08x\n", engine, val);
sys/dev/bxe/bxe.c
6698
return (val != 0);
sys/dev/bxe/bxe.c
6706
uint32_t val;
sys/dev/bxe/bxe.c
6715
val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6716
BLOGD(sc, DBG_LOAD, "Old value for GLOB_REG=0x%08x\n", val);
sys/dev/bxe/bxe.c
6719
val1 = ((val & mask) >> shift);
sys/dev/bxe/bxe.c
6725
val &= ~mask;
sys/dev/bxe/bxe.c
6728
val |= ((val1 << shift) & mask);
sys/dev/bxe/bxe.c
6730
REG_WR(sc, BXE_RECOVERY_GLOB_REG, val);
sys/dev/bxe/bxe.c
6740
uint32_t val1, val;
sys/dev/bxe/bxe.c
6747
val = REG_RD(sc, BXE_RECOVERY_GLOB_REG);
sys/dev/bxe/bxe.c
6748
BLOGD(sc, DBG_LOAD, "Old GEN_REG_VAL=0x%08x\n", val);
sys/dev/bxe/bxe.c
6751
val1 = (val & mask) >> shift;
sys/dev/bxe/bxe.c
6757
val &= ~mask;
sys/dev/bxe/bxe.c
6760
val |= ((val1 << shift) & mask);
sys/dev/bxe/bxe.c
6762
REG_WR(sc, BXE_RECOVERY_GLOB_REG, val);
sys/dev/bxe/bxe.c
6918
uint32_t j, val;
sys/dev/bxe/bxe.c
6921
val = (1UL << 31);
sys/dev/bxe/bxe.c
6922
REG_WR(sc, GRCBASE_MCP + 0x9c, val);
sys/dev/bxe/bxe.c
6923
val = REG_RD(sc, GRCBASE_MCP + 0x9c);
sys/dev/bxe/bxe.c
6924
if (val & (1L << 31))
sys/dev/bxe/bxe.c
6930
if (!(val & (1L << 31))) {
sys/dev/bxe/bxe.c
7557
uint32_t val;
sys/dev/bxe/bxe.c
7561
val = REG_RD(sc, PGLUE_B_REG_PGLUE_B_INT_STS_CLR);
sys/dev/bxe/bxe.c
7562
BLOGE(sc, "PGLUE hw attention 0x%08x\n", val);
sys/dev/bxe/bxe.c
7564
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_ADDRESS_ERROR)
sys/dev/bxe/bxe.c
7566
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_INCORRECT_RCV_BEHAVIOR)
sys/dev/bxe/bxe.c
7568
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN)
sys/dev/bxe/bxe.c
7570
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_VF_LENGTH_VIOLATION_ATTN)
sys/dev/bxe/bxe.c
7572
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_VF_GRC_SPACE_VIOLATION_ATTN)
sys/dev/bxe/bxe.c
7574
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_VF_MSIX_BAR_VIOLATION_ATTN)
sys/dev/bxe/bxe.c
7576
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_ERROR_ATTN)
sys/dev/bxe/bxe.c
7578
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_TCPL_IN_TWO_RCBS_ATTN)
sys/dev/bxe/bxe.c
7580
if (val & PGLUE_B_PGLUE_B_INT_STS_REG_CSSNOOP_FIFO_OVERFLOW)
sys/dev/bxe/bxe.c
7585
val = REG_RD(sc, ATC_REG_ATC_INT_STS_CLR);
sys/dev/bxe/bxe.c
7586
BLOGE(sc, "ATC hw attention 0x%08x\n", val);
sys/dev/bxe/bxe.c
7588
if (val & ATC_ATC_INT_STS_REG_ADDRESS_ERROR)
sys/dev/bxe/bxe.c
7590
if (val & ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND)
sys/dev/bxe/bxe.c
7592
if (val & ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS)
sys/dev/bxe/bxe.c
7594
if (val & ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT)
sys/dev/bxe/bxe.c
7596
if (val & ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR)
sys/dev/bxe/bxe.c
7598
if (val & ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU)
sys/dev/bxe/bxe.c
7781
uint32_t val;
sys/dev/bxe/bxe.c
7798
val = (0xff0f | (1 << (SC_VN(sc) + 4)));
sys/dev/bxe/bxe.c
7800
REG_WR(sc, HC_REG_TRAILING_EDGE_0 + port*8, val);
sys/dev/bxe/bxe.c
7801
REG_WR(sc, HC_REG_LEADING_EDGE_0 + port*8, val);
sys/dev/bxe/bxe.c
7803
REG_WR(sc, IGU_REG_TRAILING_EDGE_LATCH, val);
sys/dev/bxe/bxe.c
7804
REG_WR(sc, IGU_REG_LEADING_EDGE_LATCH, val);
sys/dev/bxe/bxe.c
7916
uint32_t val;
sys/dev/bxe/bxe.c
7926
val = SHMEM_RD(sc, func_mb[SC_FW_MB_IDX(sc)].drv_status);
sys/dev/bxe/bxe.c
7928
if (val & DRV_STATUS_DCC_EVENT_MASK)
sys/dev/bxe/bxe.c
7929
bxe_dcc_event(sc, (val & DRV_STATUS_DCC_EVENT_MASK));
sys/dev/bxe/bxe.c
7931
if (val & DRV_STATUS_SET_MF_BW)
sys/dev/bxe/bxe.c
7934
if (val & DRV_STATUS_DRV_INFO_REQ)
sys/dev/bxe/bxe.c
7937
if ((sc->port.pmf == 0) && (val & DRV_STATUS_PMF))
sys/dev/bxe/bxe.c
7940
if (val & DRV_STATUS_EEE_NEGOTIATION_RESULTS)
sys/dev/bxe/bxe.c
7992
val = CHIP_IS_E1(sc) ? 0 : REG_RD(sc, MISC_REG_GRC_TIMEOUT_ATTN);
sys/dev/bxe/bxe.c
7993
BLOGE(sc, "GRC time-out 0x%08x\n", val);
sys/dev/bxe/bxe.c
7996
val = CHIP_IS_E1(sc) ? 0 : REG_RD(sc, MISC_REG_GRC_RSV_ATTN);
sys/dev/bxe/bxe.c
7997
BLOGE(sc, "GRC reserved 0x%08x\n", val);
sys/dev/bxe/bxe.c
8010
uint32_t val;
sys/dev/bxe/bxe.c
8014
val = REG_RD(sc, CFC_REG_CFC_INT_STS_CLR);
sys/dev/bxe/bxe.c
8015
BLOGE(sc, "CFC hw attention 0x%08x\n", val);
sys/dev/bxe/bxe.c
8017
if (val & 0x2) {
sys/dev/bxe/bxe.c
8024
val = REG_RD(sc, PXP_REG_PXP_INT_STS_CLR_0);
sys/dev/bxe/bxe.c
8025
BLOGE(sc, "PXP hw attention-0 0x%08x\n", val);
sys/dev/bxe/bxe.c
8027
if (val & 0x18000) {
sys/dev/bxe/bxe.c
8033
val = REG_RD(sc, PXP_REG_PXP_INT_STS_CLR_1);
sys/dev/bxe/bxe.c
8034
BLOGE(sc, "PXP hw attention-1 0x%08x\n", val);
sys/dev/bxe/bxe.c
8089
val = REG_RD(sc, reg_offset);
sys/dev/bxe/bxe.c
8090
val &= ~(attn & HW_INTERRUT_ASSERT_SET_2);
sys/dev/bxe/bxe.c
8091
REG_WR(sc, reg_offset, val);
sys/dev/bxe/bxe.c
8112
uint32_t val;
sys/dev/bxe/bxe.c
8116
val = REG_RD(sc, DORQ_REG_DORQ_INT_STS_CLR);
sys/dev/bxe/bxe.c
8117
BLOGE(sc, "DB hw attention 0x%08x\n", val);
sys/dev/bxe/bxe.c
8119
if (val & 0x2) {
sys/dev/bxe/bxe.c
8129
val = REG_RD(sc, reg_offset);
sys/dev/bxe/bxe.c
8130
val &= ~(attn & HW_INTERRUT_ASSERT_SET_1);
sys/dev/bxe/bxe.c
8131
REG_WR(sc, reg_offset, val);
sys/dev/bxe/bxe.c
8152
uint32_t val;
sys/dev/bxe/bxe.c
8158
val = REG_RD(sc, reg_offset);
sys/dev/bxe/bxe.c
8159
val &= ~AEU_INPUTS_ATTN_BITS_SPIO5;
sys/dev/bxe/bxe.c
8160
REG_WR(sc, reg_offset, val);
sys/dev/bxe/bxe.c
8176
val = REG_RD(sc, reg_offset);
sys/dev/bxe/bxe.c
8177
val &= ~(attn & HW_INTERRUT_ASSERT_SET_0);
sys/dev/bxe/bxe.c
8178
REG_WR(sc, reg_offset, val);
sys/dev/bxe/bxe.c
8199
uint32_t val;
sys/dev/bxe/bxe.c
8264
val = ~deasserted;
sys/dev/bxe/bxe.c
8266
"about to mask 0x%08x at %s addr 0x%08x\n", val,
sys/dev/bxe/bxe.c
8268
REG_WR(sc, reg_addr, val);
sys/dev/bxe/bxe.c
982
uint32_t val)
sys/dev/bxe/bxe.c
985
pci_write_config(sc->dev, PCICFG_GRC_DATA, val, 4);
sys/dev/bxe/bxe.c
993
uint32_t val;
sys/dev/bxe/bxe.c
996
val = pci_read_config(sc->dev, PCICFG_GRC_DATA, 4);
sys/dev/bxe/bxe.c
999
return (val);
sys/dev/bxe/bxe.h
1815
void bxe_reg_write8(struct bxe_softc *sc, bus_size_t offset, uint8_t val);
sys/dev/bxe/bxe.h
1816
void bxe_reg_write16(struct bxe_softc *sc, bus_size_t offset, uint16_t val);
sys/dev/bxe/bxe.h
1817
void bxe_reg_write32(struct bxe_softc *sc, bus_size_t offset, uint32_t val);
sys/dev/bxe/bxe.h
1823
#define REG_WR8(sc, offset, val) bxe_reg_write8(sc, offset, val)
sys/dev/bxe/bxe.h
1824
#define REG_WR16(sc, offset, val) bxe_reg_write16(sc, offset, val)
sys/dev/bxe/bxe.h
1825
#define REG_WR32(sc, offset, val) bxe_reg_write32(sc, offset, val)
sys/dev/bxe/bxe.h
1829
#define REG_WR8(sc, offset, val) \
sys/dev/bxe/bxe.h
1832
offset, val)
sys/dev/bxe/bxe.h
1834
#define REG_WR16(sc, offset, val) \
sys/dev/bxe/bxe.h
1837
offset, val)
sys/dev/bxe/bxe.h
1839
#define REG_WR32(sc, offset, val) \
sys/dev/bxe/bxe.h
1842
offset, val)
sys/dev/bxe/bxe.h
1862
#define REG_WR(sc, offset, val) REG_WR32(sc, offset, val)
sys/dev/bxe/bxe.h
1865
#define REG_WR_IND(sc, offset, val) bxe_reg_wr_ind(sc, offset, val)
sys/dev/bxe/bxe.h
1907
#define DOORBELL(sc, cid, val) \
sys/dev/bxe/bxe.h
1911
(uint32_t)val); \
sys/dev/bxe/bxe.h
1918
#define SHMEM_WR(sc, field, val) REG_WR(sc, SHMEM_ADDR(sc, field), val)
sys/dev/bxe/bxe.h
1926
#define SHMEM2_WR(sc, field, val) REG_WR(sc, SHMEM2_ADDR(sc, field), val)
sys/dev/bxe/bxe.h
1932
#define MFCFG_WR(sc, field, val) REG_WR(sc, MFCFG_ADDR(sc, field), val)
sys/dev/bxe/bxe.h
2106
uint32_t val);
sys/dev/bxe/bxe.h
2274
uint32_t val;
sys/dev/bxe/bxe.h
2277
val = REG_RD(sc, reg);
sys/dev/bxe/bxe.h
2278
if (val == expected) {
sys/dev/bxe/bxe.h
2285
return (val);
sys/dev/bxe/bxe_debug.c
103
val = bus_space_read_2(sc->bar[BAR0].tag,
sys/dev/bxe/bxe_debug.c
106
BLOGD(sc, DBG_REGS, "offset=0x%08lx val=0x%08x\n", offset, val);
sys/dev/bxe/bxe_debug.c
108
return (val);
sys/dev/bxe/bxe_debug.c
114
uint32_t val;
sys/dev/bxe/bxe_debug.c
120
val = bus_space_read_4(sc->bar[BAR0].tag,
sys/dev/bxe/bxe_debug.c
123
BLOGD(sc, DBG_REGS, "offset=0x%08lx val=0x%08x\n", offset, val);
sys/dev/bxe/bxe_debug.c
125
return (val);
sys/dev/bxe/bxe_debug.c
44
bxe_reg_write8(struct bxe_softc *sc, bus_size_t offset, uint8_t val)
sys/dev/bxe/bxe_debug.c
46
BLOGD(sc, DBG_REGS, "offset=0x%08lx val=0x%02x\n", offset, val);
sys/dev/bxe/bxe_debug.c
50
val);
sys/dev/bxe/bxe_debug.c
54
bxe_reg_write16(struct bxe_softc *sc, bus_size_t offset, uint16_t val)
sys/dev/bxe/bxe_debug.c
60
BLOGD(sc, DBG_REGS, "offset=0x%08lx val=0x%04x\n", offset, val);
sys/dev/bxe/bxe_debug.c
64
val);
sys/dev/bxe/bxe_debug.c
68
bxe_reg_write32(struct bxe_softc *sc, bus_size_t offset, uint32_t val)
sys/dev/bxe/bxe_debug.c
74
BLOGD(sc, DBG_REGS, "offset=0x%08lx val=0x%08x\n", offset, val);
sys/dev/bxe/bxe_debug.c
78
val);
sys/dev/bxe/bxe_debug.c
84
uint8_t val;
sys/dev/bxe/bxe_debug.c
86
val = bus_space_read_1(sc->bar[BAR0].tag,
sys/dev/bxe/bxe_debug.c
89
BLOGD(sc, DBG_REGS, "offset=0x%08lx val=0x%02x\n", offset, val);
sys/dev/bxe/bxe_debug.c
91
return (val);
sys/dev/bxe/bxe_debug.c
97
uint16_t val;
sys/dev/bxe/bxe_elink.c
10087
uint16_t val;
sys/dev/bxe/bxe_elink.c
10109
&val);
sys/dev/bxe/bxe_elink.c
10110
val &= 0xff8f;
sys/dev/bxe/bxe_elink.c
10111
val |= led_mode_bitmask;
sys/dev/bxe/bxe_elink.c
10115
val);
sys/dev/bxe/bxe_elink.c
10119
&val);
sys/dev/bxe/bxe_elink.c
10120
val &= 0xffe0;
sys/dev/bxe/bxe_elink.c
10121
val |= gpio_pins_bitmask;
sys/dev/bxe/bxe_elink.c
10125
val);
sys/dev/bxe/bxe_elink.c
10146
uint16_t tmp1, val;
sys/dev/bxe/bxe_elink.c
10164
MDIO_PMA_REG_8727_PCS_GP, &val);
sys/dev/bxe/bxe_elink.c
10165
val |= (3<<10);
sys/dev/bxe/bxe_elink.c
10168
MDIO_PMA_REG_8727_PCS_GP, val);
sys/dev/bxe/bxe_elink.c
10290
uint32_t val = REG_RD(sc, params->shmem_base +
sys/dev/bxe/bxe_elink.c
10352
if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) ==
sys/dev/bxe/bxe_elink.c
10558
uint16_t val, fw_ver2, cnt, i;
sys/dev/bxe/bxe_elink.c
10577
reg_set[i].reg, reg_set[i].val);
sys/dev/bxe/bxe_elink.c
10580
elink_cl45_read(sc, phy, MDIO_PMA_DEVAD, 0xA818, &val);
sys/dev/bxe/bxe_elink.c
10581
if (val & 1)
sys/dev/bxe/bxe_elink.c
10599
elink_cl45_read(sc, phy, MDIO_PMA_DEVAD, 0xA818, &val);
sys/dev/bxe/bxe_elink.c
10600
if (val & 1)
sys/dev/bxe/bxe_elink.c
10625
uint16_t val, offset, i;
sys/dev/bxe/bxe_elink.c
10638
MDIO_PMA_REG_8481_LINK_SIGNAL, &val);
sys/dev/bxe/bxe_elink.c
10639
val &= 0xFE00;
sys/dev/bxe/bxe_elink.c
10640
val |= 0x0092;
sys/dev/bxe/bxe_elink.c
10644
MDIO_PMA_REG_8481_LINK_SIGNAL, val);
sys/dev/bxe/bxe_elink.c
10648
reg_set[i].val);
sys/dev/bxe/bxe_elink.c
10856
uint16_t val;
sys/dev/bxe/bxe_elink.c
10868
MDIO_848xx_CMD_HDLR_STATUS, &val);
sys/dev/bxe/bxe_elink.c
10869
if ((val != PHY84858_STATUS_CMD_IN_PROGRESS) &&
sys/dev/bxe/bxe_elink.c
10870
(val != PHY84858_STATUS_CMD_SYSTEM_BUSY))
sys/dev/bxe/bxe_elink.c
10902
MDIO_848xx_CMD_HDLR_STATUS, &val);
sys/dev/bxe/bxe_elink.c
10903
if ((val == PHY84858_STATUS_CMD_COMPLETE_PASS) ||
sys/dev/bxe/bxe_elink.c
10904
(val == PHY84858_STATUS_CMD_COMPLETE_ERROR))
sys/dev/bxe/bxe_elink.c
10909
(val == PHY84858_STATUS_CMD_COMPLETE_ERROR)) {
sys/dev/bxe/bxe_elink.c
10932
uint16_t val;
sys/dev/bxe/bxe_elink.c
10945
MDIO_848xx_CMD_HDLR_STATUS, &val);
sys/dev/bxe/bxe_elink.c
10946
if (val == PHY84833_STATUS_CMD_OPEN_FOR_CMDS)
sys/dev/bxe/bxe_elink.c
10955
if (val == PHY84833_STATUS_CMD_COMPLETE_PASS ||
sys/dev/bxe/bxe_elink.c
10956
val == PHY84833_STATUS_CMD_COMPLETE_ERROR) {
sys/dev/bxe/bxe_elink.c
10978
MDIO_848xx_CMD_HDLR_STATUS, &val);
sys/dev/bxe/bxe_elink.c
10979
if ((val == PHY84833_STATUS_CMD_COMPLETE_PASS) ||
sys/dev/bxe/bxe_elink.c
10980
(val == PHY84833_STATUS_CMD_COMPLETE_ERROR))
sys/dev/bxe/bxe_elink.c
10985
(val == PHY84833_STATUS_CMD_COMPLETE_ERROR)) {
sys/dev/bxe/bxe_elink.c
10997
if (val == PHY84833_STATUS_CMD_COMPLETE_ERROR ||
sys/dev/bxe/bxe_elink.c
10998
val == PHY84833_STATUS_CMD_COMPLETE_PASS) {
sys/dev/bxe/bxe_elink.c
11173
uint16_t val;
sys/dev/bxe/bxe_elink.c
11225
MDIO_CTL_REG_84823_MEDIA, &val);
sys/dev/bxe/bxe_elink.c
11226
val &= ~(MDIO_CTL_REG_84823_MEDIA_MAC_MASK |
sys/dev/bxe/bxe_elink.c
11233
val &= ~(MDIO_CTL_REG_84823_MEDIA_MAC_MASK |
sys/dev/bxe/bxe_elink.c
11236
val |= (MDIO_CTL_REG_84823_CTRL_MAC_XFI |
sys/dev/bxe/bxe_elink.c
11247
val |= MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER;
sys/dev/bxe/bxe_elink.c
11250
val |= MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER;
sys/dev/bxe/bxe_elink.c
11256
val |= MDIO_CTL_REG_84823_MEDIA_COPPER_CORE_DOWN;
sys/dev/bxe/bxe_elink.c
11261
val |= MDIO_CTL_REG_84823_MEDIA_FIBER_1G;
sys/dev/bxe/bxe_elink.c
11264
MDIO_CTL_REG_84823_MEDIA, val);
sys/dev/bxe/bxe_elink.c
11266
params->multi_phy_config, val);
sys/dev/bxe/bxe_elink.c
11294
MDIO_CTL_REG_84823_USER_CTRL_REG, &val);
sys/dev/bxe/bxe_elink.c
11296
val |= MDIO_CTL_REG_84823_USER_CTRL_CMS;
sys/dev/bxe/bxe_elink.c
11298
val &= ~MDIO_CTL_REG_84823_USER_CTRL_CMS;
sys/dev/bxe/bxe_elink.c
11300
MDIO_CTL_REG_84823_USER_CTRL_REG, val);
sys/dev/bxe/bxe_elink.c
11304
MDIO_84833_TOP_CFG_FW_REV, &val);
sys/dev/bxe/bxe_elink.c
11307
if ((val >= MDIO_84833_TOP_CFG_FW_EEE) &&
sys/dev/bxe/bxe_elink.c
11308
(val != MDIO_84833_TOP_CFG_FW_NO_EEE) &&
sys/dev/bxe/bxe_elink.c
11347
uint16_t val, val1, val2;
sys/dev/bxe/bxe_elink.c
1141
static void elink_set_cfg_pin(struct bxe_softc *sc, uint32_t pin_cfg, uint32_t val)
sys/dev/bxe/bxe_elink.c
11421
&val);
sys/dev/bxe/bxe_elink.c
11422
if (val & (1<<5))
sys/dev/bxe/bxe_elink.c
11428
&val);
sys/dev/bxe/bxe_elink.c
11429
if ((val & (1<<0)) == 0)
sys/dev/bxe/bxe_elink.c
11441
MDIO_AN_REG_CL37_FC_LP, &val);
sys/dev/bxe/bxe_elink.c
11442
if (val & (1<<5))
sys/dev/bxe/bxe_elink.c
11445
if (val & (1<<6))
sys/dev/bxe/bxe_elink.c
11448
if (val & (1<<7))
sys/dev/bxe/bxe_elink.c
11451
if (val & (1<<8))
sys/dev/bxe/bxe_elink.c
11454
if (val & (1<<9))
sys/dev/bxe/bxe_elink.c
11459
MDIO_AN_REG_1000T_STATUS, &val);
sys/dev/bxe/bxe_elink.c
1146
elink_set_epio(sc, pin_cfg - PIN_CFG_EPIO0, val);
sys/dev/bxe/bxe_elink.c
11461
if (val & (1<<10))
sys/dev/bxe/bxe_elink.c
11464
if (val & (1<<11))
sys/dev/bxe/bxe_elink.c
11469
MDIO_AN_REG_MASTER_STATUS, &val);
sys/dev/bxe/bxe_elink.c
11471
if (val & (1<<11))
sys/dev/bxe/bxe_elink.c
1150
elink_cb_gpio_write(sc, gpio_num, (uint8_t)val, gpio_port);
sys/dev/bxe/bxe_elink.c
1154
static uint32_t elink_get_cfg_pin(struct bxe_softc *sc, uint32_t pin_cfg, uint32_t *val)
sys/dev/bxe/bxe_elink.c
11541
uint16_t val;
sys/dev/bxe/bxe_elink.c
1159
elink_get_epio(sc, pin_cfg - PIN_CFG_EPIO0, val);
sys/dev/bxe/bxe_elink.c
1163
*val = elink_cb_gpio_read(sc, gpio_num, gpio_port);
sys/dev/bxe/bxe_elink.c
11652
&val);
sys/dev/bxe/bxe_elink.c
11653
val &= 0x8000;
sys/dev/bxe/bxe_elink.c
11654
val |= 0x2492;
sys/dev/bxe/bxe_elink.c
11659
val);
sys/dev/bxe/bxe_elink.c
11722
&val);
sys/dev/bxe/bxe_elink.c
11724
if (!((val &
sys/dev/bxe/bxe_elink.c
11760
val = ((params->hw_led_mode <<
sys/dev/bxe/bxe_elink.c
11767
val);
sys/dev/bxe/bxe_elink.c
11773
&val);
sys/dev/bxe/bxe_elink.c
11774
val &= ~(7<<6);
sys/dev/bxe/bxe_elink.c
11775
val |= (1<<6); /* A83B[8:6]= 1 */
sys/dev/bxe/bxe_elink.c
11779
val);
sys/dev/bxe/bxe_elink.c
11805
MDIO_WC_REG_GP2_STATUS_GP_2_1, &val);
sys/dev/bxe/bxe_elink.c
12114
uint16_t val;
sys/dev/bxe/bxe_elink.c
12127
&val);
sys/dev/bxe/bxe_elink.c
12164
&val);
sys/dev/bxe/bxe_elink.c
12165
if (val & (1<<5))
sys/dev/bxe/bxe_elink.c
12170
&val);
sys/dev/bxe/bxe_elink.c
12171
if ((val & (1<<0)) == 0)
sys/dev/bxe/bxe_elink.c
12182
elink_cl22_read(sc, phy, 0x5, &val);
sys/dev/bxe/bxe_elink.c
12184
if (val & (1<<5))
sys/dev/bxe/bxe_elink.c
12187
if (val & (1<<6))
sys/dev/bxe/bxe_elink.c
12190
if (val & (1<<7))
sys/dev/bxe/bxe_elink.c
12193
if (val & (1<<8))
sys/dev/bxe/bxe_elink.c
12196
if (val & (1<<9))
sys/dev/bxe/bxe_elink.c
12200
elink_cl22_read(sc, phy, 0xa, &val);
sys/dev/bxe/bxe_elink.c
12201
if (val & (1<<10))
sys/dev/bxe/bxe_elink.c
12204
if (val & (1<<11))
sys/dev/bxe/bxe_elink.c
12220
uint16_t val;
sys/dev/bxe/bxe_elink.c
12234
elink_cl22_read(sc, phy, 0x00, &val);
sys/dev/bxe/bxe_elink.c
12235
val &= ~((1<<6) | (1<<12) | (1<<13));
sys/dev/bxe/bxe_elink.c
12236
val |= (1<<6) | (1<<8);
sys/dev/bxe/bxe_elink.c
12237
elink_cl22_write(sc, phy, 0x00, val);
sys/dev/bxe/bxe_elink.c
12244
elink_cl22_read(sc, phy, 0x18, &val);
sys/dev/bxe/bxe_elink.c
12245
elink_cl22_write(sc, phy, 0x18, val | (1<<10) | (1<<15));
sys/dev/bxe/bxe_elink.c
12272
uint16_t fw_ver1, fw_ver2, val;
sys/dev/bxe/bxe_elink.c
12292
MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, &val);
sys/dev/bxe/bxe_elink.c
12293
val |= 0x200;
sys/dev/bxe/bxe_elink.c
12295
MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, val);
sys/dev/bxe/bxe_elink.c
12363
uint16_t val, cnt;
sys/dev/bxe/bxe_elink.c
12367
MDIO_PMA_REG_7101_RESET, &val);
sys/dev/bxe/bxe_elink.c
12375
(val | (1<<15)));
sys/dev/bxe/bxe_elink.c
12379
MDIO_PMA_REG_7101_RESET, &val);
sys/dev/bxe/bxe_elink.c
12381
if ((val & (1<<15)) == 0)
sys/dev/bxe/bxe_elink.c
12399
uint16_t val = 0;
sys/dev/bxe/bxe_elink.c
12404
val = 2;
sys/dev/bxe/bxe_elink.c
12407
val = 1;
sys/dev/bxe/bxe_elink.c
12410
val = 0;
sys/dev/bxe/bxe_elink.c
12416
val);
sys/dev/bxe/bxe_elink.c
13804
uint8_t val = en * 0x1F;
sys/dev/bxe/bxe_elink.c
13808
val |= en * 0x20;
sys/dev/bxe/bxe_elink.c
13809
REG_WR(sc, NIG_REG_LLH0_BRB1_DRV_MASK + params->port*4, val);
sys/dev/bxe/bxe_elink.c
14237
uint16_t val;
sys/dev/bxe/bxe_elink.c
14315
MDIO_PMA_REG_TX_POWER_DOWN, &val);
sys/dev/bxe/bxe_elink.c
14321
(val | 1<<10));
sys/dev/bxe/bxe_elink.c
14335
MDIO_PMA_REG_TX_POWER_DOWN, &val);
sys/dev/bxe/bxe_elink.c
14339
MDIO_PMA_REG_TX_POWER_DOWN, (val & (~(1<<10))));
sys/dev/bxe/bxe_elink.c
14345
MDIO_PMA_REG_EDC_FFE_MAIN, &val);
sys/dev/bxe/bxe_elink.c
14348
MDIO_PMA_REG_EDC_FFE_MAIN, (val | (1<<12)));
sys/dev/bxe/bxe_elink.c
14361
uint32_t val;
sys/dev/bxe/bxe_elink.c
14366
val = REG_RD(sc, MISC_REG_GPIO_EVENT_EN);
sys/dev/bxe/bxe_elink.c
14367
val |= ((1<<MISC_REGISTERS_GPIO_3)|
sys/dev/bxe/bxe_elink.c
14369
REG_WR(sc, MISC_REG_GPIO_EVENT_EN, val);
sys/dev/bxe/bxe_elink.c
14625
uint32_t phy_ver, val;
sys/dev/bxe/bxe_elink.c
14638
val = REG_RD(sc, MISC_REG_GEN_PURP_HWG);
sys/dev/bxe/bxe_elink.c
14639
REG_WR(sc, MISC_REG_GEN_PURP_HWG, val | 1);
sys/dev/bxe/bxe_elink.c
15055
uint32_t val;
sys/dev/bxe/bxe_elink.c
15114
val = REG_RD(sc, MISC_REG_GPIO_EVENT_EN);
sys/dev/bxe/bxe_elink.c
15115
val |= 1 << (gpio_num + (gpio_port << 2));
sys/dev/bxe/bxe_elink.c
15116
REG_WR(sc, MISC_REG_GPIO_EVENT_EN, val);
sys/dev/bxe/bxe_elink.c
2045
uint32_t val = 0;
sys/dev/bxe/bxe_elink.c
2075
val = (!strict_cos) ? 0x2318 : 0x22E0;
sys/dev/bxe/bxe_elink.c
2076
REG_WR(sc, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, val);
sys/dev/bxe/bxe_elink.c
2260
uint32_t val;
sys/dev/bxe/bxe_elink.c
2271
val = REG_RD(sc, emac_base + EMAC_REG_EMAC_MODE);
sys/dev/bxe/bxe_elink.c
2272
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MODE, (val | EMAC_MODE_RESET));
sys/dev/bxe/bxe_elink.c
2276
val = REG_RD(sc, emac_base + EMAC_REG_EMAC_MODE);
sys/dev/bxe/bxe_elink.c
2277
ELINK_DEBUG_P1(sc, "EMAC reset reg is %u\n", val);
sys/dev/bxe/bxe_elink.c
2283
} while (val & EMAC_MODE_RESET);
sys/dev/bxe/bxe_elink.c
2287
val = ((params->mac_addr[0] << 8) |
sys/dev/bxe/bxe_elink.c
2289
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MAC_MATCH, val);
sys/dev/bxe/bxe_elink.c
2291
val = ((params->mac_addr[2] << 24) |
sys/dev/bxe/bxe_elink.c
2295
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MAC_MATCH + 4, val);
sys/dev/bxe/bxe_elink.c
2315
uint32_t val;
sys/dev/bxe/bxe_elink.c
2320
val = REG_RD(sc, umac_base + UMAC_REG_COMMAND_CONFIG);
sys/dev/bxe/bxe_elink.c
2322
val |= (UMAC_COMMAND_CONFIG_REG_TX_ENA |
sys/dev/bxe/bxe_elink.c
2325
val &= ~(UMAC_COMMAND_CONFIG_REG_TX_ENA |
sys/dev/bxe/bxe_elink.c
2328
REG_WR(sc, umac_base + UMAC_REG_COMMAND_CONFIG, val);
sys/dev/bxe/bxe_elink.c
2334
uint32_t val;
sys/dev/bxe/bxe_elink.c
2350
val = UMAC_COMMAND_CONFIG_REG_PROMIS_EN |
sys/dev/bxe/bxe_elink.c
2356
val |= (0<<2);
sys/dev/bxe/bxe_elink.c
2359
val |= (1<<2);
sys/dev/bxe/bxe_elink.c
2362
val |= (2<<2);
sys/dev/bxe/bxe_elink.c
2365
val |= (3<<2);
sys/dev/bxe/bxe_elink.c
2373
val |= UMAC_COMMAND_CONFIG_REG_IGNORE_TX_PAUSE;
sys/dev/bxe/bxe_elink.c
2376
val |= UMAC_COMMAND_CONFIG_REG_PAUSE_IGNORE;
sys/dev/bxe/bxe_elink.c
2379
val |= UMAC_COMMAND_CONFIG_REG_HD_ENA;
sys/dev/bxe/bxe_elink.c
2381
REG_WR(sc, umac_base + UMAC_REG_COMMAND_CONFIG, val);
sys/dev/bxe/bxe_elink.c
2405
val &= ~UMAC_COMMAND_CONFIG_REG_PAD_EN;
sys/dev/bxe/bxe_elink.c
2406
val |= UMAC_COMMAND_CONFIG_REG_TX_ENA |
sys/dev/bxe/bxe_elink.c
2408
REG_WR(sc, umac_base + UMAC_REG_COMMAND_CONFIG, val);
sys/dev/bxe/bxe_elink.c
2412
val &= ~UMAC_COMMAND_CONFIG_REG_SW_RESET;
sys/dev/bxe/bxe_elink.c
2416
val |= UMAC_COMMAND_CONFIG_REG_LOOP_ENA;
sys/dev/bxe/bxe_elink.c
2417
REG_WR(sc, umac_base + UMAC_REG_COMMAND_CONFIG, val);
sys/dev/bxe/bxe_elink.c
2497
uint32_t val;
sys/dev/bxe/bxe_elink.c
2511
val = REG_RD(sc, xmac_base + XMAC_REG_CTRL);
sys/dev/bxe/bxe_elink.c
2513
val |= (XMAC_CTRL_REG_TX_EN | XMAC_CTRL_REG_RX_EN);
sys/dev/bxe/bxe_elink.c
2515
val &= ~(XMAC_CTRL_REG_TX_EN | XMAC_CTRL_REG_RX_EN);
sys/dev/bxe/bxe_elink.c
2516
REG_WR(sc, xmac_base + XMAC_REG_CTRL, val);
sys/dev/bxe/bxe_elink.c
2523
uint32_t val, xmac_base;
sys/dev/bxe/bxe_elink.c
2570
val = XMAC_CTRL_REG_TX_EN | XMAC_CTRL_REG_RX_EN;
sys/dev/bxe/bxe_elink.c
2576
val |= XMAC_CTRL_REG_XLGMII_ALIGN_ENB;
sys/dev/bxe/bxe_elink.c
2580
val |= XMAC_CTRL_REG_LINE_LOCAL_LPBK;
sys/dev/bxe/bxe_elink.c
2581
REG_WR(sc, xmac_base + XMAC_REG_CTRL, val);
sys/dev/bxe/bxe_elink.c
2596
uint32_t val;
sys/dev/bxe/bxe_elink.c
2652
val = REG_RD(sc, emac_base + EMAC_REG_EMAC_MODE);
sys/dev/bxe/bxe_elink.c
2653
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MODE, (val | EMAC_MODE_PORT_GMII));
sys/dev/bxe/bxe_elink.c
2683
val = REG_RD(sc, emac_base + EMAC_REG_EMAC_RX_MODE);
sys/dev/bxe/bxe_elink.c
2684
val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS;
sys/dev/bxe/bxe_elink.c
2707
val |= EMAC_RX_MODE_KEEP_MAC_CONTROL;
sys/dev/bxe/bxe_elink.c
2709
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_RX_MODE, val);
sys/dev/bxe/bxe_elink.c
2712
val = REG_RD(sc, emac_base + EMAC_REG_EMAC_MODE);
sys/dev/bxe/bxe_elink.c
2714
val |= 0x810;
sys/dev/bxe/bxe_elink.c
2716
val &= ~0x810;
sys/dev/bxe/bxe_elink.c
2717
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MODE, val);
sys/dev/bxe/bxe_elink.c
2737
val = 0;
sys/dev/bxe/bxe_elink.c
2741
val = 1;
sys/dev/bxe/bxe_elink.c
2743
REG_WR(sc, NIG_REG_EMAC0_PAUSE_OUT_EN + port*4, val);
sys/dev/bxe/bxe_elink.c
2770
uint32_t val = 0x14;
sys/dev/bxe/bxe_elink.c
2775
val |= (1<<5);
sys/dev/bxe/bxe_elink.c
2776
wb_data[0] = val;
sys/dev/bxe/bxe_elink.c
2781
val = 0xc0;
sys/dev/bxe/bxe_elink.c
2785
val |= 0x800000;
sys/dev/bxe/bxe_elink.c
2786
wb_data[0] = val;
sys/dev/bxe/bxe_elink.c
2802
uint32_t val = 0x14;
sys/dev/bxe/bxe_elink.c
2808
val |= (1<<5);
sys/dev/bxe/bxe_elink.c
2809
wb_data[0] = val;
sys/dev/bxe/bxe_elink.c
2815
val = 0xc0;
sys/dev/bxe/bxe_elink.c
2819
val |= 0x800000;
sys/dev/bxe/bxe_elink.c
2820
wb_data[0] = val;
sys/dev/bxe/bxe_elink.c
2852
val = 0x8000;
sys/dev/bxe/bxe_elink.c
2854
val |= (1<<16); /* enable automatic re-send */
sys/dev/bxe/bxe_elink.c
2856
wb_data[0] = val;
sys/dev/bxe/bxe_elink.c
2862
val = 0x3; /* Enable RX and TX */
sys/dev/bxe/bxe_elink.c
2864
val |= 0x4; /* Local loopback */
sys/dev/bxe/bxe_elink.c
2869
val |= ((1<<6)|(1<<5));
sys/dev/bxe/bxe_elink.c
2871
wb_data[0] = val;
sys/dev/bxe/bxe_elink.c
3037
uint32_t val;
sys/dev/bxe/bxe_elink.c
3060
val = REG_RD(sc, MISC_REG_RESET_REG_2);
sys/dev/bxe/bxe_elink.c
3061
if ((val &
sys/dev/bxe/bxe_elink.c
3073
val = 0;
sys/dev/bxe/bxe_elink.c
3077
val = 1;
sys/dev/bxe/bxe_elink.c
3078
REG_WR(sc, NIG_REG_BMAC0_PAUSE_OUT_EN + params->port*4, val);
sys/dev/bxe/bxe_elink.c
3092
uint32_t val;
sys/dev/bxe/bxe_elink.c
3112
val = 0x3;
sys/dev/bxe/bxe_elink.c
3114
val |= 0x4;
sys/dev/bxe/bxe_elink.c
3117
wb_data[0] = val;
sys/dev/bxe/bxe_elink.c
3228
uint32_t val;
sys/dev/bxe/bxe_elink.c
3250
val = 0;
sys/dev/bxe/bxe_elink.c
3254
val = 1;
sys/dev/bxe/bxe_elink.c
3255
REG_WR(sc, NIG_REG_BMAC0_PAUSE_OUT_EN + port*4, val);
sys/dev/bxe/bxe_elink.c
3414
uint16_t reg, uint16_t val)
sys/dev/bxe/bxe_elink.c
3425
tmp = ((phy->addr << 21) | (reg << 16) | val |
sys/dev/bxe/bxe_elink.c
3451
uint32_t val, mode;
sys/dev/bxe/bxe_elink.c
3461
val = ((phy->addr << 21) | (reg << 16) |
sys/dev/bxe/bxe_elink.c
3464
REG_WR(sc, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, val);
sys/dev/bxe/bxe_elink.c
3469
val = REG_RD(sc, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM);
sys/dev/bxe/bxe_elink.c
3470
if (!(val & EMAC_MDIO_COMM_START_BUSY)) {
sys/dev/bxe/bxe_elink.c
3471
*ret_val = (uint16_t)(val & EMAC_MDIO_COMM_DATA);
sys/dev/bxe/bxe_elink.c
3476
if (val & EMAC_MDIO_COMM_START_BUSY) {
sys/dev/bxe/bxe_elink.c
3492
uint32_t val;
sys/dev/bxe/bxe_elink.c
3506
val = ((phy->addr << 21) | (devad << 16) | reg |
sys/dev/bxe/bxe_elink.c
3509
REG_WR(sc, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, val);
sys/dev/bxe/bxe_elink.c
3514
val = REG_RD(sc, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM);
sys/dev/bxe/bxe_elink.c
3515
if (!(val & EMAC_MDIO_COMM_START_BUSY)) {
sys/dev/bxe/bxe_elink.c
3520
if (val & EMAC_MDIO_COMM_START_BUSY) {
sys/dev/bxe/bxe_elink.c
3528
val = ((phy->addr << 21) | (devad << 16) |
sys/dev/bxe/bxe_elink.c
3531
REG_WR(sc, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM, val);
sys/dev/bxe/bxe_elink.c
3536
val = REG_RD(sc, phy->mdio_ctrl +
sys/dev/bxe/bxe_elink.c
3538
if (!(val & EMAC_MDIO_COMM_START_BUSY)) {
sys/dev/bxe/bxe_elink.c
3539
*ret_val = (uint16_t)(val & EMAC_MDIO_COMM_DATA);
sys/dev/bxe/bxe_elink.c
3543
if (val & EMAC_MDIO_COMM_START_BUSY) {
sys/dev/bxe/bxe_elink.c
3567
uint8_t devad, uint16_t reg, uint16_t val)
sys/dev/bxe/bxe_elink.c
3605
tmp = ((phy->addr << 21) | (devad << 16) | val |
sys/dev/bxe/bxe_elink.c
3800
uint16_t val = 0;
sys/dev/bxe/bxe_elink.c
3807
val |= 0x8;
sys/dev/bxe/bxe_elink.c
3811
val |= 0x4;
sys/dev/bxe/bxe_elink.c
3814
elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_EEE_ADV, val);
sys/dev/bxe/bxe_elink.c
3914
uint32_t val, i;
sys/dev/bxe/bxe_elink.c
3926
val = REG_RD(sc, MCP_REG_MCPR_IMC_COMMAND);
sys/dev/bxe/bxe_elink.c
3927
val |= MCPR_IMC_COMMAND_ENABLE;
sys/dev/bxe/bxe_elink.c
3928
REG_WR(sc, MCP_REG_MCPR_IMC_COMMAND, val);
sys/dev/bxe/bxe_elink.c
3931
val = (sl_devid << 16) | sl_addr;
sys/dev/bxe/bxe_elink.c
3932
REG_WR(sc, MCP_REG_MCPR_IMC_SLAVE_CONTROL, val);
sys/dev/bxe/bxe_elink.c
3935
val = (MCPR_IMC_COMMAND_ENABLE) |
sys/dev/bxe/bxe_elink.c
3939
REG_WR(sc, MCP_REG_MCPR_IMC_COMMAND, val);
sys/dev/bxe/bxe_elink.c
3943
val = REG_RD(sc, MCP_REG_MCPR_IMC_COMMAND);
sys/dev/bxe/bxe_elink.c
3944
while (((val >> MCPR_IMC_COMMAND_IMC_STATUS_BITSHIFT) & 0x3) != 1) {
sys/dev/bxe/bxe_elink.c
3946
val = REG_RD(sc, MCP_REG_MCPR_IMC_COMMAND);
sys/dev/bxe/bxe_elink.c
3958
val = (MCPR_IMC_COMMAND_ENABLE) |
sys/dev/bxe/bxe_elink.c
3963
REG_WR(sc, MCP_REG_MCPR_IMC_COMMAND, val);
sys/dev/bxe/bxe_elink.c
3967
val = REG_RD(sc, MCP_REG_MCPR_IMC_COMMAND);
sys/dev/bxe/bxe_elink.c
3968
while (((val >> MCPR_IMC_COMMAND_IMC_STATUS_BITSHIFT) & 0x3) != 1) {
sys/dev/bxe/bxe_elink.c
3970
val = REG_RD(sc, MCP_REG_MCPR_IMC_COMMAND);
sys/dev/bxe/bxe_elink.c
3995
uint16_t val;
sys/dev/bxe/bxe_elink.c
3996
elink_cl45_read(sc, phy, devad, reg, &val);
sys/dev/bxe/bxe_elink.c
3997
elink_cl45_write(sc, phy, devad, reg, val | or_val);
sys/dev/bxe/bxe_elink.c
4004
uint16_t val;
sys/dev/bxe/bxe_elink.c
4005
elink_cl45_read(sc, phy, devad, reg, &val);
sys/dev/bxe/bxe_elink.c
4006
elink_cl45_write(sc, phy, devad, reg, val & and_val);
sys/dev/bxe/bxe_elink.c
4027
uint8_t devad, uint16_t reg, uint16_t val)
sys/dev/bxe/bxe_elink.c
4037
reg, val);
sys/dev/bxe/bxe_elink.c
4151
uint32_t val;
sys/dev/bxe/bxe_elink.c
4155
val = ELINK_SERDES_RESET_BITS << (port*16);
sys/dev/bxe/bxe_elink.c
4158
REG_WR(sc, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val);
sys/dev/bxe/bxe_elink.c
4160
REG_WR(sc, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val);
sys/dev/bxe/bxe_elink.c
4187
uint32_t val;
sys/dev/bxe/bxe_elink.c
4191
val = ELINK_XGXS_RESET_BITS << (port*16);
sys/dev/bxe/bxe_elink.c
4194
REG_WR(sc, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, val);
sys/dev/bxe/bxe_elink.c
4196
REG_WR(sc, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val);
sys/dev/bxe/bxe_elink.c
4287
uint16_t val;
sys/dev/bxe/bxe_elink.c
4290
elink_cl45_read(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, &val);
sys/dev/bxe/bxe_elink.c
4292
val &= ~MDIO_AN_REG_ADV_PAUSE_BOTH;
sys/dev/bxe/bxe_elink.c
4299
val |= MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC;
sys/dev/bxe/bxe_elink.c
4304
val |= MDIO_AN_REG_ADV_PAUSE_PAUSE;
sys/dev/bxe/bxe_elink.c
4306
ELINK_DEBUG_P1(sc, "Ext phy AN advertize 0x%x\n", val);
sys/dev/bxe/bxe_elink.c
4307
elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV_PAUSE, val);
sys/dev/bxe/bxe_elink.c
4493
reg_set[i].val);
sys/dev/bxe/bxe_elink.c
4528
reg_set[i].val);
sys/dev/bxe/bxe_elink.c
4565
uint16_t lane, i, cl72_ctrl, an_adv = 0, val;
sys/dev/bxe/bxe_elink.c
4582
reg_set[i].val);
sys/dev/bxe/bxe_elink.c
4689
MDIO_WC_REG_RX0_PCI_CTRL + (lane << 4), &val);
sys/dev/bxe/bxe_elink.c
4693
val |= 1 << 11;
sys/dev/bxe/bxe_elink.c
4700
val |= 3 << 2;
sys/dev/bxe/bxe_elink.c
4702
val &= ~(3 << 2);
sys/dev/bxe/bxe_elink.c
4705
val);
sys/dev/bxe/bxe_elink.c
4735
reg_set[i].val);
sys/dev/bxe/bxe_elink.c
4787
uint16_t misc1_val, tap_val, tx_driver_val, lane, val;
sys/dev/bxe/bxe_elink.c
4820
MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, &val);
sys/dev/bxe/bxe_elink.c
4823
((val | 0x0006) & 0xFFFE));
sys/dev/bxe/bxe_elink.c
4920
uint16_t val;
sys/dev/bxe/bxe_elink.c
4938
MDIO_WC_REG_CL73_USERB0_CTRL, &val);
sys/dev/bxe/bxe_elink.c
4939
val &= ~(1<<5);
sys/dev/bxe/bxe_elink.c
4940
val |= (1<<6);
sys/dev/bxe/bxe_elink.c
4942
MDIO_WC_REG_CL73_USERB0_CTRL, val);
sys/dev/bxe/bxe_elink.c
4952
MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, &val);
sys/dev/bxe/bxe_elink.c
4953
val &= ~(3<<14);
sys/dev/bxe/bxe_elink.c
4954
val |= (1<<15);
sys/dev/bxe/bxe_elink.c
4956
MDIO_WC_REG_CL72_USERB0_CL72_MISC1_CONTROL, val);
sys/dev/bxe/bxe_elink.c
5111
uint16_t val;
sys/dev/bxe/bxe_elink.c
5114
MDIO_WC_REG_DIGITAL5_MISC6, &val);
sys/dev/bxe/bxe_elink.c
5116
val |= 0xC000;
sys/dev/bxe/bxe_elink.c
5118
val &= 0x3FFF;
sys/dev/bxe/bxe_elink.c
5120
MDIO_WC_REG_DIGITAL5_MISC6, val);
sys/dev/bxe/bxe_elink.c
5122
MDIO_WC_REG_DIGITAL5_MISC6, &val);
sys/dev/bxe/bxe_elink.c
5154
wc_regs[i].val);
sys/dev/bxe/bxe_elink.c
6023
uint16_t val = 0;
sys/dev/bxe/bxe_elink.c
6027
val |= MDIO_OVER_1G_UP1_2_5G;
sys/dev/bxe/bxe_elink.c
6029
val |= MDIO_OVER_1G_UP1_10G;
sys/dev/bxe/bxe_elink.c
6032
MDIO_OVER_1G_UP1, val);
sys/dev/bxe/bxe_elink.c
6044
uint16_t val;
sys/dev/bxe/bxe_elink.c
6052
MDIO_CL73_IEEEB1_AN_ADV1, &val);
sys/dev/bxe/bxe_elink.c
6053
val &= ~MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_BOTH;
sys/dev/bxe/bxe_elink.c
6054
val |= ((ieee_fc<<3) & MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK);
sys/dev/bxe/bxe_elink.c
6057
MDIO_CL73_IEEEB1_AN_ADV1, val);
sys/dev/bxe/bxe_elink.c
6508
uint16_t val;
sys/dev/bxe/bxe_elink.c
6511
MDIO_CL73_IEEEB1_AN_LP_ADV2, &val);
sys/dev/bxe/bxe_elink.c
6513
if (val & MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX)
sys/dev/bxe/bxe_elink.c
6516
if (val & (MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4 |
sys/dev/bxe/bxe_elink.c
6522
MDIO_OVER_1G_LP_UP1, &val);
sys/dev/bxe/bxe_elink.c
6524
if (val & MDIO_OVER_1G_UP1_2_5G)
sys/dev/bxe/bxe_elink.c
6527
if (val & (MDIO_OVER_1G_UP1_10G | MDIO_OVER_1G_UP1_10GH))
sys/dev/bxe/bxe_elink.c
6619
uint16_t val;
sys/dev/bxe/bxe_elink.c
6622
MDIO_AN_REG_LP_AUTO_NEG2, &val);
sys/dev/bxe/bxe_elink.c
6624
if (val & MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX)
sys/dev/bxe/bxe_elink.c
6627
if (val & (MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4 |
sys/dev/bxe/bxe_elink.c
6632
val, vars->link_status);
sys/dev/bxe/bxe_elink.c
6634
MDIO_WC_REG_DIGITAL3_LP_UP1, &val);
sys/dev/bxe/bxe_elink.c
6636
if (val & MDIO_OVER_1G_UP1_2_5G)
sys/dev/bxe/bxe_elink.c
6639
if (val & (MDIO_OVER_1G_UP1_10G | MDIO_OVER_1G_UP1_10GH))
sys/dev/bxe/bxe_elink.c
6643
val, vars->link_status);
sys/dev/bxe/bxe_elink.c
7651
uint32_t addr, val;
sys/dev/bxe/bxe_elink.c
7660
val = 0;
sys/dev/bxe/bxe_elink.c
7662
val = REG_RD(sc, addr) + 1;
sys/dev/bxe/bxe_elink.c
7663
REG_WR(sc, addr, val);
sys/dev/bxe/bxe_elink.c
7991
uint16_t val;
sys/dev/bxe/bxe_elink.c
7994
MDIO_AN_REG_STATUS, &val);
sys/dev/bxe/bxe_elink.c
7997
MDIO_AN_REG_STATUS, &val);
sys/dev/bxe/bxe_elink.c
7998
if (val & (1<<5))
sys/dev/bxe/bxe_elink.c
8000
if ((val & (1<<0)) == 0)
sys/dev/bxe/bxe_elink.c
8124
uint16_t val;
sys/dev/bxe/bxe_elink.c
8129
MDIO_PMA_REG_8073_CHIP_REV, &val);
sys/dev/bxe/bxe_elink.c
8131
if (val != 1) {
sys/dev/bxe/bxe_elink.c
8138
MDIO_PMA_REG_ROM_VER2, &val);
sys/dev/bxe/bxe_elink.c
8141
if (val != 0x102)
sys/dev/bxe/bxe_elink.c
8149
uint16_t val, cnt, cnt1 ;
sys/dev/bxe/bxe_elink.c
8153
MDIO_PMA_REG_8073_CHIP_REV, &val);
sys/dev/bxe/bxe_elink.c
8155
if (val > 0) {
sys/dev/bxe/bxe_elink.c
8169
&val);
sys/dev/bxe/bxe_elink.c
8174
if (!(val & (1<<14)) || !(val & (1<<13))) {
sys/dev/bxe/bxe_elink.c
8177
} else if (!(val & (1<<15))) {
sys/dev/bxe/bxe_elink.c
8187
MDIO_PMA_REG_8073_XAUI_WA, &val);
sys/dev/bxe/bxe_elink.c
8188
if (val & (1<<15)) {
sys/dev/bxe/bxe_elink.c
8272
uint16_t val = 0, tmp1;
sys/dev/bxe/bxe_elink.c
8305
MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL, &val);
sys/dev/bxe/bxe_elink.c
8309
(val | (3<<9)));
sys/dev/bxe/bxe_elink.c
8321
MDIO_AN_REG_8073_BAM, &val);
sys/dev/bxe/bxe_elink.c
8324
MDIO_AN_REG_8073_BAM, val | 1);
sys/dev/bxe/bxe_elink.c
8337
val = (1<<7);
sys/dev/bxe/bxe_elink.c
8339
val = (1<<5);
sys/dev/bxe/bxe_elink.c
8344
val = (1<<5);
sys/dev/bxe/bxe_elink.c
8346
val = 0;
sys/dev/bxe/bxe_elink.c
8349
val |= (1<<7);
sys/dev/bxe/bxe_elink.c
8355
val |= (1<<5);
sys/dev/bxe/bxe_elink.c
8356
ELINK_DEBUG_P1(sc, "807x autoneg val = 0x%x\n", val);
sys/dev/bxe/bxe_elink.c
8359
elink_cl45_write(sc, phy, MDIO_AN_DEVAD, MDIO_AN_REG_ADV, val);
sys/dev/bxe/bxe_elink.c
8411
((val & (1<<5)) > 0), ((val & (1<<7)) > 0));
sys/dev/bxe/bxe_elink.c
8683
uint16_t val;
sys/dev/bxe/bxe_elink.c
8701
&val);
sys/dev/bxe/bxe_elink.c
8704
val &= ~(1<<15);
sys/dev/bxe/bxe_elink.c
8706
val |= (1<<15);
sys/dev/bxe/bxe_elink.c
8711
val);
sys/dev/bxe/bxe_elink.c
8754
uint16_t val = 0;
sys/dev/bxe/bxe_elink.c
8780
MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val);
sys/dev/bxe/bxe_elink.c
8781
if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) ==
sys/dev/bxe/bxe_elink.c
8787
if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) !=
sys/dev/bxe/bxe_elink.c
8791
(val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK));
sys/dev/bxe/bxe_elink.c
8799
MDIO_PMA_REG_8726_TWO_WIRE_DATA_BUF + i, &val);
sys/dev/bxe/bxe_elink.c
8800
o_buf[i] = (uint8_t)(val & MDIO_PMA_REG_8726_TWO_WIRE_DATA_MASK);
sys/dev/bxe/bxe_elink.c
8806
MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val);
sys/dev/bxe/bxe_elink.c
8807
if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) ==
sys/dev/bxe/bxe_elink.c
8885
uint16_t val, i;
sys/dev/bxe/bxe_elink.c
8906
&val);
sys/dev/bxe/bxe_elink.c
8939
MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val);
sys/dev/bxe/bxe_elink.c
8940
if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) ==
sys/dev/bxe/bxe_elink.c
8946
if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) !=
sys/dev/bxe/bxe_elink.c
8950
(val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK));
sys/dev/bxe/bxe_elink.c
8958
MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF + i, &val);
sys/dev/bxe/bxe_elink.c
8959
o_buf[i] = (uint8_t)(val & MDIO_PMA_REG_8727_TWO_WIRE_DATA_MASK);
sys/dev/bxe/bxe_elink.c
8965
MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val);
sys/dev/bxe/bxe_elink.c
8966
if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) ==
sys/dev/bxe/bxe_elink.c
9021
uint8_t val[ELINK_SFP_EEPROM_FC_TX_TECH_ADDR + 1], check_limiting_mode = 0;
sys/dev/bxe/bxe_elink.c
9030
(uint8_t *)val) != 0) {
sys/dev/bxe/bxe_elink.c
9035
params->link_attr_sync |= val[ELINK_SFP_EEPROM_10G_COMP_CODE_ADDR] <<
sys/dev/bxe/bxe_elink.c
9038
switch (val[ELINK_SFP_EEPROM_CON_TYPE_ADDR]) {
sys/dev/bxe/bxe_elink.c
9046
copper_module_type = val[ELINK_SFP_EEPROM_FC_TX_TECH_ADDR];
sys/dev/bxe/bxe_elink.c
9078
if (((val[ELINK_SFP_EEPROM_10G_COMP_CODE_ADDR] &
sys/dev/bxe/bxe_elink.c
9082
(val[ELINK_SFP_EEPROM_1G_COMP_CODE_ADDR] != 0)) {
sys/dev/bxe/bxe_elink.c
9097
if (val[ELINK_SFP_EEPROM_1G_COMP_CODE_ADDR] &
sys/dev/bxe/bxe_elink.c
9122
val[ELINK_SFP_EEPROM_CON_TYPE_ADDR]);
sys/dev/bxe/bxe_elink.c
9168
uint32_t val, cmd;
sys/dev/bxe/bxe_elink.c
9173
val = REG_RD(sc, params->shmem_base +
sys/dev/bxe/bxe_elink.c
9176
if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) ==
sys/dev/bxe/bxe_elink.c
9232
if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) !=
sys/dev/bxe/bxe_elink.c
9242
uint8_t val;
sys/dev/bxe/bxe_elink.c
9253
phy, params, ELINK_I2C_DEV_ADDR_A0, 1, 1, &val,
sys/dev/bxe/bxe_elink.c
9258
1, 1, &val);
sys/dev/bxe/bxe_elink.c
9268
1, 1, &val);
sys/dev/bxe/bxe_elink.c
9276
uint16_t val;
sys/dev/bxe/bxe_elink.c
9291
val = (1<<4);
sys/dev/bxe/bxe_elink.c
9296
val = (1<<1);
sys/dev/bxe/bxe_elink.c
9301
val);
sys/dev/bxe/bxe_elink.c
9392
uint16_t val;
sys/dev/bxe/bxe_elink.c
9413
&val);
sys/dev/bxe/bxe_elink.c
9414
val |= (1<<12);
sys/dev/bxe/bxe_elink.c
9416
val |= (3<<5);
sys/dev/bxe/bxe_elink.c
9421
val &= 0xff8f; /* Reset bits 4-6 */
sys/dev/bxe/bxe_elink.c
9424
val);
sys/dev/bxe/bxe_elink.c
953
uint32_t val = REG_RD(sc, reg);
sys/dev/bxe/bxe_elink.c
9532
uint16_t val = 0;
sys/dev/bxe/bxe_elink.c
9539
MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE, &val);
sys/dev/bxe/bxe_elink.c
9540
val &= ~(0xf << (lane << 2));
sys/dev/bxe/bxe_elink.c
955
val |= bits;
sys/dev/bxe/bxe_elink.c
9555
val |= (mode << (lane << 2));
sys/dev/bxe/bxe_elink.c
9557
MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE, val);
sys/dev/bxe/bxe_elink.c
956
REG_WR(sc, reg, val);
sys/dev/bxe/bxe_elink.c
9560
MDIO_WC_REG_UC_INFO_B1_FIRMWARE_MODE, &val);
sys/dev/bxe/bxe_elink.c
957
return val;
sys/dev/bxe/bxe_elink.c
9593
uint32_t val = REG_RD(sc, params->shmem_base +
sys/dev/bxe/bxe_elink.c
9614
if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) ==
sys/dev/bxe/bxe_elink.c
962
uint32_t val = REG_RD(sc, reg);
sys/dev/bxe/bxe_elink.c
9634
((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) ==
sys/dev/bxe/bxe_elink.c
964
val &= ~bits;
sys/dev/bxe/bxe_elink.c
965
REG_WR(sc, reg, val);
sys/dev/bxe/bxe_elink.c
966
return val;
sys/dev/bxe/bxe_elink.c
9718
uint16_t alarm_status, val;
sys/dev/bxe/bxe_elink.c
9726
elink_cl45_read(sc, phy, MDIO_PMA_DEVAD, alarm_ctrl_offset, &val);
sys/dev/bxe/bxe_elink.c
9728
val &= ~(1<<0);
sys/dev/bxe/bxe_elink.c
9730
val |= (1<<0);
sys/dev/bxe/bxe_elink.c
9731
elink_cl45_write(sc, phy, MDIO_PMA_DEVAD, alarm_ctrl_offset, val);
sys/dev/bxe/bxe_elink.c
9803
uint16_t cnt, val, tmp1;
sys/dev/bxe/bxe_elink.c
9816
MDIO_PMA_DEVAD, MDIO_PMA_REG_ROM_VER1, &val);
sys/dev/bxe/bxe_elink.c
9817
if (val)
sys/dev/bxe/bxe_elink.c
9830
elink_cl45_read(sc, phy, MDIO_XS_DEVAD, reg, &val);
sys/dev/bxe/bxe_elink.c
9832
val &= ~0x7;
sys/dev/bxe/bxe_elink.c
9834
val |= (phy->rx_preemphasis[i] & 0x7);
sys/dev/bxe/bxe_elink.c
9836
" reg 0x%x <-- val 0x%x\n", reg, val);
sys/dev/bxe/bxe_elink.c
9837
elink_cl45_write(sc, phy, MDIO_XS_DEVAD, reg, val);
sys/dev/bxe/bxe_elink.h
259
uint16_t val;
sys/dev/bxe/bxe_elink.h
47
extern void elink_cb_reg_write(struct bxe_softc *sc, uint32_t reg_addr, uint32_t val);
sys/dev/bxe/bxe_elink.h
534
uint8_t devad, uint16_t reg, uint16_t val);
sys/dev/bxe/bxe_stats.c
1285
uint32_t val;
sys/dev/bxe/bxe_stats.c
1288
val = SHMEM2_RD(sc, edebug_driver_if[1]);
sys/dev/bxe/bxe_stats.c
1290
if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) {
sys/dev/bxe/ecore_hsi.h
11156
uint8_t val[MAX_VLAN_PRIORITIES] /* Inner to outer vlan priority translation table entry for current PF */;
sys/dev/bxe/ecore_hsi.h
11358
uint32_t val[HC_SB_MAX_DYNAMIC_INDICES] /* 4 bytes * 4 indices = 2 lines */;
sys/dev/bxe/ecore_hsi.h
2193
#define SHMEM_ARRAY_SET(a, i, eb, fb, val) \
sys/dev/bxe/ecore_hsi.h
2197
a[SHMEM_ARRAY_ENTRY(i, eb)] |= (((val) & SHMEM_ARRAY_MASK(eb)) << \
sys/dev/bxe/ecore_hsi.h
2208
#define DCBX_PRI_PG_SET(a, i, val) \
sys/dev/bxe/ecore_hsi.h
2209
SHMEM_ARRAY_SET(a, i, DCBX_PRI_PG_BITWIDTH, DCBX_PRI_PG_FBITS, val)
sys/dev/bxe/ecore_hsi.h
2214
#define DCBX_PG_BW_SET(a, i, val) \
sys/dev/bxe/ecore_hsi.h
2215
SHMEM_ARRAY_SET(a, i, DCBX_BW_PG_BITWIDTH, DCBX_BW_PG_BITWIDTH, val)
sys/dev/bxe/ecore_hsi.h
8915
uint16_t val /* Global value */;
sys/dev/bxe/ecore_hsi.h
9230
uint16_t val /* Global value */;
sys/dev/bxe/ecore_init.h
75
uint32_t val;
sys/dev/bxe/ecore_init.h
81
uint32_t val;
sys/dev/bxe/ecore_init_ops.h
284
REG_WR(sc, addr, op->write.val);
sys/dev/bxe/ecore_init_ops.h
43
static void ecore_reg_wr_ind(struct bxe_softc *sc, uint32_t addr, uint32_t val);
sys/dev/bxe/ecore_init_ops.h
507
uint32_t val, i;
sys/dev/bxe/ecore_init_ops.h
547
val = REG_RD(sc, write_arb_addr[i].l);
sys/dev/bxe/ecore_init_ops.h
549
val | (write_arb_data[i][w_order].l << 10));
sys/dev/bxe/ecore_init_ops.h
551
val = REG_RD(sc, write_arb_addr[i].add);
sys/dev/bxe/ecore_init_ops.h
553
val | (write_arb_data[i][w_order].add << 10));
sys/dev/bxe/ecore_init_ops.h
555
val = REG_RD(sc, write_arb_addr[i].ubound);
sys/dev/bxe/ecore_init_ops.h
557
val | (write_arb_data[i][w_order].ubound << 7));
sys/dev/bxe/ecore_init_ops.h
561
val = write_arb_data[NUM_WR_Q-1][w_order].add;
sys/dev/bxe/ecore_init_ops.h
562
val += write_arb_data[NUM_WR_Q-1][w_order].ubound << 10;
sys/dev/bxe/ecore_init_ops.h
563
val += write_arb_data[NUM_WR_Q-1][w_order].l << 17;
sys/dev/bxe/ecore_init_ops.h
564
REG_WR(sc, PXP2_REG_PSWRQ_BW_RD, val);
sys/dev/bxe/ecore_init_ops.h
566
val = read_arb_data[NUM_RD_Q-1][r_order].add;
sys/dev/bxe/ecore_init_ops.h
567
val += read_arb_data[NUM_RD_Q-1][r_order].ubound << 10;
sys/dev/bxe/ecore_init_ops.h
568
val += read_arb_data[NUM_RD_Q-1][r_order].l << 17;
sys/dev/bxe/ecore_init_ops.h
569
REG_WR(sc, PXP2_REG_PSWRQ_BW_WR, val);
sys/dev/bxe/ecore_init_ops.h
595
val = w_order;
sys/dev/bxe/ecore_init_ops.h
596
REG_WR(sc, PXP2_REG_WR_DMAE_MPS, val);
sys/dev/bxe/ecore_init_ops.h
598
val = ((w_order == 0) ? 2 : 3);
sys/dev/bxe/ecore_init_ops.h
602
REG_WR(sc, PXP2_REG_WR_HC_MPS, val);
sys/dev/bxe/ecore_init_ops.h
603
REG_WR(sc, PXP2_REG_WR_USDM_MPS, val);
sys/dev/bxe/ecore_init_ops.h
604
REG_WR(sc, PXP2_REG_WR_CSDM_MPS, val);
sys/dev/bxe/ecore_init_ops.h
605
REG_WR(sc, PXP2_REG_WR_TSDM_MPS, val);
sys/dev/bxe/ecore_init_ops.h
606
REG_WR(sc, PXP2_REG_WR_XSDM_MPS, val);
sys/dev/bxe/ecore_init_ops.h
607
REG_WR(sc, PXP2_REG_WR_QM_MPS, val);
sys/dev/bxe/ecore_init_ops.h
608
REG_WR(sc, PXP2_REG_WR_TM_MPS, val);
sys/dev/bxe/ecore_init_ops.h
609
REG_WR(sc, PXP2_REG_WR_SRC_MPS, val);
sys/dev/bxe/ecore_init_ops.h
610
REG_WR(sc, PXP2_REG_WR_DBG_MPS, val);
sys/dev/bxe/ecore_init_ops.h
611
REG_WR(sc, PXP2_REG_WR_CDU_MPS, val);
sys/dev/bxe/ecore_init_ops.h
616
val = REG_RD(sc, PCIE_REG_PCIER_TL_HDR_FC_ST);
sys/dev/bxe/ecore_init_ops.h
617
val &= 0xFF;
sys/dev/bxe/ecore_init_ops.h
618
if (val <= 0x20)
sys/dev/bxe/ecore_sp.c
6271
memcpy(rdata->c2s_pri_trans_table.val,
sys/dev/cadence/if_cgem.c
1376
int tries, val;
sys/dev/cadence/if_cgem.c
1393
val = RD4(sc, CGEM_PHY_MAINT) & CGEM_PHY_MAINT_DATA_MASK;
sys/dev/cadence/if_cgem.c
1400
val &= ~(EXTSR_1000XHDX | EXTSR_1000THDX);
sys/dev/cadence/if_cgem.c
1402
return (val);
sys/dev/cadence/if_cgem.c
221
#define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))
sys/dev/cas/if_cas.c
150
static int cas_mii_writereg(device_t dev, int phy, int reg, int val);
sys/dev/cas/if_cas.c
2193
cas_mii_writereg(device_t dev, int phy, int reg, int val)
sys/dev/cas/if_cas.c
2200
printf("%s: phy %d reg %d val %x\n", phy, reg, val, __func__);
sys/dev/cas/if_cas.c
2211
if ((val & CAS_PCS_CTRL_RESET) == 0)
sys/dev/cas/if_cas.c
2213
CAS_WRITE_4(sc, CAS_PCS_CTRL, val);
sys/dev/cas/if_cas.c
2225
CAS_WRITE_4(sc, CAS_PCS_ANAR, val);
sys/dev/cas/if_cas.c
2245
CAS_WRITE_4(sc, reg, val);
sys/dev/cas/if_cas.c
2255
(val & CAS_MIF_FRAME_DATA);
sys/dev/cas/if_casreg.h
1012
#define CAS_SET(val, bits) (((val) << (bits ## _SHFT)) & (bits ## _MASK))
sys/dev/cesa/cesa.c
1174
uint32_t d, r, val;
sys/dev/cesa/cesa.c
1320
val = CESA_TDMA_CR_DBL128 | CESA_TDMA_CR_SBL128 |
sys/dev/cesa/cesa.c
1326
val |= CESA_TDMA_NUM_OUTSTAND;
sys/dev/cesa/cesa.c
1328
CESA_TDMA_WRITE(sc, CESA_TDMA_CR, val);
sys/dev/cesa/cesa.h
93
#define CESA_REG_WRITE(sc, reg, val) \
sys/dev/cesa/cesa.h
94
bus_write_4((sc)->sc_res[RES_CESA_REGS], (reg), (val))
sys/dev/cesa/cesa.h
98
#define CESA_TDMA_WRITE(sc, reg, val) \
sys/dev/cesa/cesa.h
99
bus_write_4((sc)->sc_res[RES_TDMA_REGS], (reg), (val))
sys/dev/cfe/cfe_api.c
158
cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)
sys/dev/cfe/cfe_api.c
170
xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);
sys/dev/cfe/cfe_api.c
494
cfe_setenv(char *name, char *val)
sys/dev/cfe/cfe_api.c
506
xiocb.plist.xiocb_envbuf.val_ptr = XPTR_FROM_NATIVE(val);
sys/dev/cfe/cfe_api.c
507
xiocb.plist.xiocb_envbuf.val_length = cfe_strlen(val);
sys/dev/cfe/cfe_api.h
177
int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen);
sys/dev/cfe/cfe_api.h
194
int cfe_setenv(char *name, char *val);
sys/dev/cfe/cfe_env.c
45
char name[KENV_MNAMELEN], val[KENV_MVALLEN];
sys/dev/cfe/cfe_env.c
51
if (cfe_enumenv(idx, name, sizeof(name), val, sizeof(val)) != 0)
sys/dev/cfe/cfe_env.c
54
if (kern_setenv(name, val) != 0) {
sys/dev/cfe/cfe_env.c
56
name, val);
sys/dev/cfi/cfi_core.c
101
val = sval;
sys/dev/cfi/cfi_core.c
103
val = le16toh(sval);
sys/dev/cfi/cfi_core.c
107
val = bus_space_read_4(sc->sc_tag, sc->sc_handle, ofs);
sys/dev/cfi/cfi_core.c
109
val = le32toh(val);
sys/dev/cfi/cfi_core.c
113
val = ~0;
sys/dev/cfi/cfi_core.c
116
return (val);
sys/dev/cfi/cfi_core.c
120
cfi_write(struct cfi_softc *sc, u_int ofs, u_int val)
sys/dev/cfi/cfi_core.c
126
bus_space_write_1(sc->sc_tag, sc->sc_handle, ofs, val);
sys/dev/cfi/cfi_core.c
130
bus_space_write_2(sc->sc_tag, sc->sc_handle, ofs, val);
sys/dev/cfi/cfi_core.c
132
bus_space_write_2(sc->sc_tag, sc->sc_handle, ofs, htole16(val));
sys/dev/cfi/cfi_core.c
138
bus_space_write_4(sc->sc_tag, sc->sc_handle, ofs, val);
sys/dev/cfi/cfi_core.c
140
bus_space_write_4(sc->sc_tag, sc->sc_handle, ofs, htole32(val));
sys/dev/cfi/cfi_core.c
160
uint8_t val;
sys/dev/cfi/cfi_core.c
163
val = cfi_read(sc, ofs * sc->sc_width);
sys/dev/cfi/cfi_core.c
165
return (val);
sys/dev/cfi/cfi_core.c
511
uint32_t val;
sys/dev/cfi/cfi_core.c
515
val = cfi_read(sc, ofs + i);
sys/dev/cfi/cfi_core.c
518
if (val != 0xff)
sys/dev/cfi/cfi_core.c
522
if (val != 0xffff)
sys/dev/cfi/cfi_core.c
526
if (val != 0xffffffff)
sys/dev/cfi/cfi_core.c
623
uint32_t val;
sys/dev/cfi/cfi_core.c
67
uint32_t val;
sys/dev/cfi/cfi_core.c
72
val = bus_space_read_1(sc->sc_tag, sc->sc_handle, ofs);
sys/dev/cfi/cfi_core.c
75
val = bus_space_read_2(sc->sc_tag, sc->sc_handle, ofs);
sys/dev/cfi/cfi_core.c
78
val = bus_space_read_4(sc->sc_tag, sc->sc_handle, ofs);
sys/dev/cfi/cfi_core.c
809
val = *(ptr.x8 + i);
sys/dev/cfi/cfi_core.c
81
val = ~0;
sys/dev/cfi/cfi_core.c
812
val = *(ptr.x16 + i / 2);
sys/dev/cfi/cfi_core.c
815
val = *(ptr.x32 + i / 4);
sys/dev/cfi/cfi_core.c
819
if (cfi_read(sc, sc->sc_wrofs + i) == val)
sys/dev/cfi/cfi_core.c
84
return (val);
sys/dev/cfi/cfi_core.c
90
uint32_t val;
sys/dev/cfi/cfi_core.c
96
val = bus_space_read_1(sc->sc_tag, sc->sc_handle, ofs);
sys/dev/cfi/cfi_dev.c
114
val = cfi_read_raw(sc, sc->sc_wrofs + r);
sys/dev/cfi/cfi_dev.c
117
*(ptr.x8)++ = val;
sys/dev/cfi/cfi_dev.c
120
*(ptr.x16)++ = val;
sys/dev/cfi/cfi_dev.c
123
*(ptr.x32)++ = val;
sys/dev/cfi/cfi_dev.c
191
uint32_t val;
sys/dev/cfi/cfi_dev.c
203
val = cfi_read_raw(sc, ofs);
sys/dev/cfi/cfi_dev.c
206
buf.x8[0] = val;
sys/dev/cfi/cfi_dev.c
209
buf.x16[0] = val;
sys/dev/cfi/cfi_dev.c
212
buf.x32[0] = val;
sys/dev/cfi/cfi_dev.c
267
u_char val;
sys/dev/cfi/cfi_dev.c
287
val = cfi_read_qry(sc, rq->offset++);
sys/dev/cfi/cfi_dev.c
288
error = copyout(&val, rq->buffer++, 1);
sys/dev/cfi/cfi_dev.c
94
uint32_t val;
sys/dev/ciss/ciss.c
919
int val, i;
sys/dev/ciss/ciss.c
930
val = pci_msix_count(sc->ciss_dev);
sys/dev/ciss/ciss.c
931
if (val < CISS_MSI_COUNT) {
sys/dev/ciss/ciss.c
932
val = pci_msi_count(sc->ciss_dev);
sys/dev/ciss/ciss.c
933
device_printf(sc->ciss_dev, "got %d MSI messages]\n", val);
sys/dev/ciss/ciss.c
934
if (val < CISS_MSI_COUNT)
sys/dev/ciss/ciss.c
937
val = MIN(val, CISS_MSI_COUNT);
sys/dev/ciss/ciss.c
938
if (pci_alloc_msix(sc->ciss_dev, &val) != 0) {
sys/dev/ciss/ciss.c
939
if (pci_alloc_msi(sc->ciss_dev, &val) != 0)
sys/dev/ciss/ciss.c
943
sc->ciss_msi = val;
sys/dev/ciss/ciss.c
945
ciss_printf(sc, "Using %d MSIX interrupt%s\n", val,
sys/dev/ciss/ciss.c
946
(val != 1) ? "s" : "");
sys/dev/ciss/ciss.c
948
for (i = 0; i < val; i++)
sys/dev/ciss/cissreg.h
832
#define CISS_TL_SIMPLE_WRITE(sc, ofs, val) \
sys/dev/ciss/cissreg.h
833
bus_space_write_4(sc->ciss_regs_btag, sc->ciss_regs_bhandle, ofs, val)
sys/dev/clk/allwinner/aw_ccu.c
110
*val = bus_space_read_4(sc->bst, bsh, reg);
sys/dev/clk/allwinner/aw_ccu.c
121
uint32_t val;
sys/dev/clk/allwinner/aw_ccu.c
129
val = bus_space_read_4(sc->bst, bsh, reg);
sys/dev/clk/allwinner/aw_ccu.c
130
val &= ~clr;
sys/dev/clk/allwinner/aw_ccu.c
131
val |= set;
sys/dev/clk/allwinner/aw_ccu.c
132
bus_space_write_4(sc->bst, bsh, reg, val);
sys/dev/clk/allwinner/aw_ccu.c
80
aw_ccu_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/dev/clk/allwinner/aw_ccu.c
92
bus_space_write_4(sc->bst, bsh, reg, val);
sys/dev/clk/allwinner/aw_ccu.c
98
aw_ccu_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/dev/clk/allwinner/aw_ccung.c
120
uint32_t val;
sys/dev/clk/allwinner/aw_ccung.c
129
val = CCU_READ4(sc, sc->resets[id].offset);
sys/dev/clk/allwinner/aw_ccung.c
130
dprintf("offset=%x Read %x\n", sc->resets[id].offset, val);
sys/dev/clk/allwinner/aw_ccung.c
132
val &= ~(1 << sc->resets[id].shift);
sys/dev/clk/allwinner/aw_ccung.c
134
val |= 1 << sc->resets[id].shift;
sys/dev/clk/allwinner/aw_ccung.c
135
dprintf("offset=%x Write %x\n", sc->resets[id].offset, val);
sys/dev/clk/allwinner/aw_ccung.c
136
CCU_WRITE4(sc, sc->resets[id].offset, val);
sys/dev/clk/allwinner/aw_ccung.c
146
uint32_t val;
sys/dev/clk/allwinner/aw_ccung.c
154
val = CCU_READ4(sc, sc->resets[id].offset);
sys/dev/clk/allwinner/aw_ccung.c
155
dprintf("offset=%x Read %x\n", sc->resets[id].offset, val);
sys/dev/clk/allwinner/aw_ccung.c
156
*reset = (val & (1 << sc->resets[id].shift)) != 0 ? false : true;
sys/dev/clk/allwinner/aw_ccung.c
74
#define CCU_WRITE4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/dev/clk/allwinner/aw_ccung.c
77
aw_ccung_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/dev/clk/allwinner/aw_ccung.c
82
dprintf("offset=%lx write %x\n", addr, val);
sys/dev/clk/allwinner/aw_ccung.c
83
CCU_WRITE4(sc, addr, val);
sys/dev/clk/allwinner/aw_ccung.c
88
aw_ccung_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/dev/clk/allwinner/aw_ccung.c
94
*val = CCU_READ4(sc, addr);
sys/dev/clk/allwinner/aw_ccung.c
95
dprintf("offset=%lx Read %x\n", addr, *val);
sys/dev/clk/allwinner/aw_clk.h
101
aw_clk_get_factor(uint32_t val, struct aw_clk_factor *factor)
sys/dev/clk/allwinner/aw_clk.h
107
cond = (val & factor->cond_mask) >> factor->cond_shift;
sys/dev/clk/allwinner/aw_clk.h
115
factor_val = (val & factor->mask) >> factor->shift;
sys/dev/clk/allwinner/aw_clk.h
163
uint32_t val;
sys/dev/clk/allwinner/aw_clk.h
169
val = raw;
sys/dev/clk/allwinner/aw_clk.h
171
for (val = 0; raw != 1; val++)
sys/dev/clk/allwinner/aw_clk.h
174
val = factor->max_value;
sys/dev/clk/allwinner/aw_clk.h
176
val = raw - 1;
sys/dev/clk/allwinner/aw_clk.h
178
return (val);
sys/dev/clk/allwinner/aw_clk_frac.c
102
uint32_t val;
sys/dev/clk/allwinner/aw_clk_frac.c
111
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_frac.c
113
val |= (1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_frac.c
115
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_frac.c
116
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_frac.c
126
uint32_t val;
sys/dev/clk/allwinner/aw_clk_frac.c
135
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_frac.c
136
val &= ~sc->mux_mask;
sys/dev/clk/allwinner/aw_clk_frac.c
137
val |= index << sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_frac.c
138
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_frac.c
190
uint32_t val, m, n, best_m, best_n;
sys/dev/clk/allwinner/aw_clk_frac.c
264
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_frac.c
266
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_frac.c
267
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_frac.c
270
val &= ~sc->frac.mode_sel;
sys/dev/clk/allwinner/aw_clk_frac.c
272
val &= ~sc->m.mask;
sys/dev/clk/allwinner/aw_clk_frac.c
274
val &= ~sc->frac.freq_sel;
sys/dev/clk/allwinner/aw_clk_frac.c
276
val |= sc->frac.freq_sel;
sys/dev/clk/allwinner/aw_clk_frac.c
278
val |= sc->frac.mode_sel; /* Select integer mode */
sys/dev/clk/allwinner/aw_clk_frac.c
281
val &= ~sc->n.mask;
sys/dev/clk/allwinner/aw_clk_frac.c
282
val &= ~sc->m.mask;
sys/dev/clk/allwinner/aw_clk_frac.c
283
val |= n << sc->n.shift;
sys/dev/clk/allwinner/aw_clk_frac.c
284
val |= m << sc->m.shift;
sys/dev/clk/allwinner/aw_clk_frac.c
288
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_frac.c
291
val |= 1 << sc->gate_shift;
sys/dev/clk/allwinner/aw_clk_frac.c
292
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_frac.c
296
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_frac.c
297
if ((val & (1 << sc->lock_shift)) != 0)
sys/dev/clk/allwinner/aw_clk_frac.c
312
uint32_t val, m, n;
sys/dev/clk/allwinner/aw_clk_frac.c
317
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_frac.c
320
if ((val & sc->frac.mode_sel) == 0) {
sys/dev/clk/allwinner/aw_clk_frac.c
321
if (val & sc->frac.freq_sel)
sys/dev/clk/allwinner/aw_clk_frac.c
326
m = aw_clk_get_factor(val, &sc->m);
sys/dev/clk/allwinner/aw_clk_frac.c
327
n = aw_clk_get_factor(val, &sc->n);
sys/dev/clk/allwinner/aw_clk_frac.c
67
#define WRITE4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_frac.c
68
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_frac.c
69
#define READ4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_frac.c
70
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_frac.c
80
uint32_t val, idx;
sys/dev/clk/allwinner/aw_clk_frac.c
87
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_frac.c
90
idx = (val & sc->mux_mask) >> sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_m.c
101
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_m.c
103
val |= (1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_m.c
105
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_m.c
106
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_m.c
116
uint32_t val;
sys/dev/clk/allwinner/aw_clk_m.c
124
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_m.c
125
val &= ~sc->mux_mask;
sys/dev/clk/allwinner/aw_clk_m.c
126
val |= index << sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_m.c
127
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_m.c
167
uint32_t val, m, best_m;
sys/dev/clk/allwinner/aw_clk_m.c
207
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_m.c
210
val &= ~sc->m.mask;
sys/dev/clk/allwinner/aw_clk_m.c
211
val |= m << sc->m.shift;
sys/dev/clk/allwinner/aw_clk_m.c
213
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_m.c
226
uint32_t val, m;
sys/dev/clk/allwinner/aw_clk_m.c
231
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_m.c
234
m = aw_clk_get_factor(val, &sc->m);
sys/dev/clk/allwinner/aw_clk_m.c
59
#define WRITE4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_m.c
60
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_m.c
61
#define READ4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_m.c
62
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_m.c
72
uint32_t val, idx;
sys/dev/clk/allwinner/aw_clk_m.c
79
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_m.c
82
idx = (val & sc->mux_mask) >> sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_m.c
93
uint32_t val;
sys/dev/clk/allwinner/aw_clk_mipi.c
100
val |= (1 << LDO2_EN_SHIFT);
sys/dev/clk/allwinner/aw_clk_mipi.c
102
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_mipi.c
103
val &= ~(1 << LDO1_EN_SHIFT);
sys/dev/clk/allwinner/aw_clk_mipi.c
104
val &= ~(1 << LDO2_EN_SHIFT);
sys/dev/clk/allwinner/aw_clk_mipi.c
106
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_mipi.c
151
uint32_t val;
sys/dev/clk/allwinner/aw_clk_mipi.c
172
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_mipi.c
174
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_mipi.c
175
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_mipi.c
180
val &= ~sc->k.mask;
sys/dev/clk/allwinner/aw_clk_mipi.c
181
val &= ~sc->m.mask;
sys/dev/clk/allwinner/aw_clk_mipi.c
182
val &= ~sc->n.mask;
sys/dev/clk/allwinner/aw_clk_mipi.c
183
val |= k << sc->k.shift;
sys/dev/clk/allwinner/aw_clk_mipi.c
184
val |= m << sc->m.shift;
sys/dev/clk/allwinner/aw_clk_mipi.c
185
val |= n << sc->n.shift;
sys/dev/clk/allwinner/aw_clk_mipi.c
188
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_mipi.c
191
val |= 1 << sc->gate_shift;
sys/dev/clk/allwinner/aw_clk_mipi.c
192
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_mipi.c
196
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_mipi.c
197
if ((val & (1 << sc->lock_shift)) != 0)
sys/dev/clk/allwinner/aw_clk_mipi.c
212
uint32_t val, m, n, k;
sys/dev/clk/allwinner/aw_clk_mipi.c
217
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_mipi.c
220
k = aw_clk_get_factor(val, &sc->k);
sys/dev/clk/allwinner/aw_clk_mipi.c
221
m = aw_clk_get_factor(val, &sc->m);
sys/dev/clk/allwinner/aw_clk_mipi.c
222
n = aw_clk_get_factor(val, &sc->n);
sys/dev/clk/allwinner/aw_clk_mipi.c
65
#define WRITE4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_mipi.c
66
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_mipi.c
67
#define READ4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_mipi.c
68
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_mipi.c
90
uint32_t val;
sys/dev/clk/allwinner/aw_clk_mipi.c
96
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_mipi.c
98
val |= (1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_mipi.c
99
val |= (1 << LDO1_EN_SHIFT);
sys/dev/clk/allwinner/aw_clk_nkmp.c
106
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
108
val |= (1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_nkmp.c
110
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_nkmp.c
111
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
121
uint32_t val;
sys/dev/clk/allwinner/aw_clk_nkmp.c
129
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
130
val &= ~sc->mux_mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
131
val |= index << sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
132
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
193
uint32_t val, m, p;
sys/dev/clk/allwinner/aw_clk_nkmp.c
197
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
199
m = aw_clk_get_factor(val, &sc->m);
sys/dev/clk/allwinner/aw_clk_nkmp.c
200
p = aw_clk_get_factor(val, &sc->p);
sys/dev/clk/allwinner/aw_clk_nkmp.c
203
val &= ~sc->p.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
204
val |= aw_clk_factor_get_value(&sc->p, factor_p) << sc->p.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
205
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
210
val &= ~sc->m.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
211
val |= aw_clk_factor_get_value(&sc->m, factor_m) << sc->m.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
212
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
216
val &= ~sc->n.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
217
val &= ~sc->k.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
218
val |= aw_clk_factor_get_value(&sc->n, factor_n) << sc->n.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
219
val |= aw_clk_factor_get_value(&sc->k, factor_k) << sc->k.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
220
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
224
val &= ~sc->m.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
225
val |= aw_clk_factor_get_value(&sc->m, factor_m) << sc->m.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
226
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
231
val &= ~sc->p.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
232
val |= aw_clk_factor_get_value(&sc->p, factor_p) << sc->p.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
233
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
239
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
240
if ((val & (1 << sc->lock_shift)) != 0)
sys/dev/clk/allwinner/aw_clk_nkmp.c
255
uint32_t val, best_n, best_k, best_m, best_p;
sys/dev/clk/allwinner/aw_clk_nkmp.c
284
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
285
val &= ~sc->n.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
286
val &= ~sc->k.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
287
val &= ~sc->m.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
288
val &= ~sc->p.mask;
sys/dev/clk/allwinner/aw_clk_nkmp.c
289
val |= aw_clk_factor_get_value(&sc->n, best_n) << sc->n.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
290
val |= aw_clk_factor_get_value(&sc->k, best_k) << sc->k.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
291
val |= aw_clk_factor_get_value(&sc->m, best_m) << sc->m.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
292
val |= aw_clk_factor_get_value(&sc->p, best_p) << sc->p.shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
293
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
299
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
300
val |= 1 << sc->update_shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
301
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
308
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
309
if ((val & (1 << sc->lock_shift)) != 0)
sys/dev/clk/allwinner/aw_clk_nkmp.c
326
uint32_t val, m, n, k, p;
sys/dev/clk/allwinner/aw_clk_nkmp.c
331
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
334
n = aw_clk_get_factor(val, &sc->n);
sys/dev/clk/allwinner/aw_clk_nkmp.c
335
k = aw_clk_get_factor(val, &sc->k);
sys/dev/clk/allwinner/aw_clk_nkmp.c
336
m = aw_clk_get_factor(val, &sc->m);
sys/dev/clk/allwinner/aw_clk_nkmp.c
337
p = aw_clk_get_factor(val, &sc->p);
sys/dev/clk/allwinner/aw_clk_nkmp.c
62
#define WRITE4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_nkmp.c
63
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_nkmp.c
64
#define READ4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_nkmp.c
65
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_nkmp.c
77
uint32_t val, idx;
sys/dev/clk/allwinner/aw_clk_nkmp.c
84
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nkmp.c
87
idx = (val & sc->mux_mask) >> sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_nkmp.c
98
uint32_t val;
sys/dev/clk/allwinner/aw_clk_nm.c
102
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nm.c
104
val |= (1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_nm.c
106
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_nm.c
107
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nm.c
117
uint32_t val;
sys/dev/clk/allwinner/aw_clk_nm.c
125
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nm.c
126
val &= ~sc->mux_mask;
sys/dev/clk/allwinner/aw_clk_nm.c
127
val |= index << sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_nm.c
128
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nm.c
180
uint32_t val, m, n, best_m, best_n;
sys/dev/clk/allwinner/aw_clk_nm.c
237
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nm.c
241
val &= ~sc->n.mask;
sys/dev/clk/allwinner/aw_clk_nm.c
242
val &= ~sc->m.mask;
sys/dev/clk/allwinner/aw_clk_nm.c
243
val |= n << sc->n.shift;
sys/dev/clk/allwinner/aw_clk_nm.c
244
val |= m << sc->m.shift;
sys/dev/clk/allwinner/aw_clk_nm.c
246
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nm.c
251
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nm.c
252
if ((val & (1 << sc->lock_shift)) != 0)
sys/dev/clk/allwinner/aw_clk_nm.c
268
uint32_t val, m, n, prediv;
sys/dev/clk/allwinner/aw_clk_nm.c
273
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nm.c
276
m = aw_clk_get_factor(val, &sc->m);
sys/dev/clk/allwinner/aw_clk_nm.c
277
n = aw_clk_get_factor(val, &sc->n);
sys/dev/clk/allwinner/aw_clk_nm.c
279
prediv = aw_clk_get_factor(val, &sc->prediv);
sys/dev/clk/allwinner/aw_clk_nm.c
60
#define WRITE4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_nm.c
61
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_nm.c
62
#define READ4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_nm.c
63
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_nm.c
73
uint32_t val, idx;
sys/dev/clk/allwinner/aw_clk_nm.c
80
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nm.c
83
idx = (val & sc->mux_mask) >> sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_nm.c
94
uint32_t val;
sys/dev/clk/allwinner/aw_clk_nmm.c
144
uint32_t val, n, m0, m1, best_n, best_m0, best_m1;
sys/dev/clk/allwinner/aw_clk_nmm.c
172
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nmm.c
177
val &= ~sc->n.mask;
sys/dev/clk/allwinner/aw_clk_nmm.c
178
val &= ~sc->m0.mask;
sys/dev/clk/allwinner/aw_clk_nmm.c
179
val &= ~sc->m1.mask;
sys/dev/clk/allwinner/aw_clk_nmm.c
180
val |= n << sc->n.shift;
sys/dev/clk/allwinner/aw_clk_nmm.c
181
val |= m0 << sc->m0.shift;
sys/dev/clk/allwinner/aw_clk_nmm.c
182
val |= m1 << sc->m1.shift;
sys/dev/clk/allwinner/aw_clk_nmm.c
184
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_nmm.c
189
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nmm.c
190
if ((val & (1 << sc->lock_shift)) != 0)
sys/dev/clk/allwinner/aw_clk_nmm.c
206
uint32_t val, n, m0, m1;
sys/dev/clk/allwinner/aw_clk_nmm.c
211
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nmm.c
214
n = aw_clk_get_factor(val, &sc->n);
sys/dev/clk/allwinner/aw_clk_nmm.c
215
m0 = aw_clk_get_factor(val, &sc->m0);
sys/dev/clk/allwinner/aw_clk_nmm.c
216
m1 = aw_clk_get_factor(val, &sc->m1);
sys/dev/clk/allwinner/aw_clk_nmm.c
60
#define WRITE4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_nmm.c
61
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_nmm.c
62
#define READ4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_nmm.c
63
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_nmm.c
81
uint32_t val;
sys/dev/clk/allwinner/aw_clk_nmm.c
89
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_nmm.c
91
val |= (1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_nmm.c
93
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_nmm.c
94
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_np.c
136
uint32_t val, n, p, best_n, best_p;
sys/dev/clk/allwinner/aw_clk_np.c
164
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_np.c
168
val &= ~sc->n.mask;
sys/dev/clk/allwinner/aw_clk_np.c
169
val &= ~sc->p.mask;
sys/dev/clk/allwinner/aw_clk_np.c
170
val |= n << sc->n.shift;
sys/dev/clk/allwinner/aw_clk_np.c
171
val |= p << sc->p.shift;
sys/dev/clk/allwinner/aw_clk_np.c
173
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_np.c
178
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_np.c
179
if ((val & (1 << sc->lock_shift)) != 0)
sys/dev/clk/allwinner/aw_clk_np.c
195
uint32_t val, n, p;
sys/dev/clk/allwinner/aw_clk_np.c
200
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_np.c
203
n = aw_clk_get_factor(val, &sc->n);
sys/dev/clk/allwinner/aw_clk_np.c
204
p = aw_clk_get_factor(val, &sc->p);
sys/dev/clk/allwinner/aw_clk_np.c
59
#define WRITE4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_np.c
60
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_np.c
61
#define READ4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_np.c
62
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_np.c
80
uint32_t val;
sys/dev/clk/allwinner/aw_clk_np.c
88
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_np.c
90
val |= (1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_np.c
92
val &= ~(1 << sc->gate_shift);
sys/dev/clk/allwinner/aw_clk_np.c
93
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
100
WRITE4(clk, sc->offset, val);
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
110
uint32_t val, div, prediv;
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
115
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
118
div = aw_clk_get_factor(val, &sc->div);
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
119
prediv = aw_clk_get_factor(val, &sc->prediv);
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
58
#define WRITE4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
59
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
60
#define READ4(_clk, off, val) \
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
61
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
73
uint32_t val;
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
78
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
82
val = (val & sc->mux_mask) >> sc->mux_shift;
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
83
clknode_init_parent_idx(clk, val);
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
92
uint32_t val;
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
97
READ4(clk, sc->offset, &val);
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
98
val &= ~sc->mux_mask;
sys/dev/clk/allwinner/aw_clk_prediv_mux.c
99
val |= index << sc->mux_shift;
sys/dev/clk/clk_div.c
39
#define WR4(_clk, off, val) \
sys/dev/clk/clk_div.c
40
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/clk_div.c
41
#define RD4(_clk, off, val) \
sys/dev/clk/clk_div.c
42
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/clk_gate.c
39
#define WR4(_clk, off, val) \
sys/dev/clk/clk_gate.c
40
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/clk_gate.c
41
#define RD4(_clk, off, val) \
sys/dev/clk/clk_gate.c
42
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/clk_mux.c
39
#define WR4(_clk, off, val) \
sys/dev/clk/clk_mux.c
40
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/clk_mux.c
41
#define RD4(_clk, off, val) \
sys/dev/clk/clk_mux.c
42
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_armclk.c
102
uint32_t val = 0;
sys/dev/clk/rockchip/rk_clk_armclk.c
108
val |= index << sc->mux_shift;
sys/dev/clk/rockchip/rk_clk_armclk.c
109
val |= sc->mux_mask << RK_ARMCLK_WRITE_MASK_SHIFT;
sys/dev/clk/rockchip/rk_clk_armclk.c
110
dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);
sys/dev/clk/rockchip/rk_clk_armclk.c
111
WRITE4(clk, sc->muxdiv_offset, val);
sys/dev/clk/rockchip/rk_clk_armclk.c
148
uint32_t div = 0, val = 0;
sys/dev/clk/rockchip/rk_clk_armclk.c
193
val |= (div - 1) << sc->div_shift;
sys/dev/clk/rockchip/rk_clk_armclk.c
194
val |= sc->div_mask << RK_ARMCLK_WRITE_MASK_SHIFT;
sys/dev/clk/rockchip/rk_clk_armclk.c
195
dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);
sys/dev/clk/rockchip/rk_clk_armclk.c
196
WRITE4(clk, sc->muxdiv_offset, val);
sys/dev/clk/rockchip/rk_clk_armclk.c
60
#define WRITE4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_armclk.c
61
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_armclk.c
62
#define READ4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_armclk.c
63
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_armclk.c
82
uint32_t val, idx;
sys/dev/clk/rockchip/rk_clk_armclk.c
88
READ4(clk, sc->muxdiv_offset, &val);
sys/dev/clk/rockchip/rk_clk_armclk.c
91
idx = (val & sc->mux_mask) >> sc->mux_shift;
sys/dev/clk/rockchip/rk_clk_composite.c
120
uint32_t val, idx;
sys/dev/clk/rockchip/rk_clk_composite.c
133
READ4(clk, sc->muxdiv_offset, &val);
sys/dev/clk/rockchip/rk_clk_composite.c
136
idx = (val & sc->mux_mask) >> sc->mux_shift;
sys/dev/clk/rockchip/rk_clk_composite.c
148
uint32_t val = 0;
sys/dev/clk/rockchip/rk_clk_composite.c
157
val |= (index << sc->mux_shift);
sys/dev/clk/rockchip/rk_clk_composite.c
158
val |= sc->mux_mask << RK_CLK_COMPOSITE_MASK_SHIFT;
sys/dev/clk/rockchip/rk_clk_composite.c
159
dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);
sys/dev/clk/rockchip/rk_clk_composite.c
160
WRITE4(clk, sc->muxdiv_offset, val);
sys/dev/clk/rockchip/rk_clk_composite.c
230
uint32_t div, div_reg, best_div, best_div_reg, val;
sys/dev/clk/rockchip/rk_clk_composite.c
282
val = best_div_reg << sc->div_shift;
sys/dev/clk/rockchip/rk_clk_composite.c
283
val |= sc->div_mask << RK_CLK_COMPOSITE_MASK_SHIFT;
sys/dev/clk/rockchip/rk_clk_composite.c
284
dprintf("Write: muxdiv_offset=%x, val=%x\n", sc->muxdiv_offset, val);
sys/dev/clk/rockchip/rk_clk_composite.c
285
WRITE4(clk, sc->muxdiv_offset, val);
sys/dev/clk/rockchip/rk_clk_composite.c
55
#define WRITE4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_composite.c
56
rk_clk_composite_write_4(_clk, off, val)
sys/dev/clk/rockchip/rk_clk_composite.c
57
#define READ4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_composite.c
58
rk_clk_composite_read_4(_clk, off, val)
sys/dev/clk/rockchip/rk_clk_composite.c
74
rk_clk_composite_read_4(struct clknode *clk, bus_addr_t addr, uint32_t *val)
sys/dev/clk/rockchip/rk_clk_composite.c
80
*val = SYSCON_READ_4(sc->grf, addr);
sys/dev/clk/rockchip/rk_clk_composite.c
82
CLKDEV_READ_4(clknode_get_device(clk), addr, val);
sys/dev/clk/rockchip/rk_clk_composite.c
86
rk_clk_composite_write_4(struct clknode *clk, bus_addr_t addr, uint32_t val)
sys/dev/clk/rockchip/rk_clk_composite.c
92
SYSCON_WRITE_4(sc->grf, addr, val | (0xffff << 16));
sys/dev/clk/rockchip/rk_clk_composite.c
94
CLKDEV_WRITE_4(clknode_get_device(clk), addr, val);
sys/dev/clk/rockchip/rk_clk_fract.c
161
uint32_t val = 0;
sys/dev/clk/rockchip/rk_clk_fract.c
168
RD4(clk, sc->gate_offset, &val);
sys/dev/clk/rockchip/rk_clk_fract.c
170
val = 0;
sys/dev/clk/rockchip/rk_clk_fract.c
172
val |= 1 << sc->gate_shift;
sys/dev/clk/rockchip/rk_clk_fract.c
173
val |= (1 << sc->gate_shift) << RK_CLK_FRACT_MASK_SHIFT;
sys/dev/clk/rockchip/rk_clk_fract.c
175
WR4(clk, sc->gate_offset, val);
sys/dev/clk/rockchip/rk_clk_fract.c
38
#define WR4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_fract.c
39
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_fract.c
40
#define RD4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_fract.c
41
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_gate.c
39
#define WR4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_gate.c
40
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_gate.c
41
#define RD4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_gate.c
42
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_mux.c
46
#define WR4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_mux.c
47
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_mux.c
48
#define RD4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_mux.c
49
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_pll.c
53
#define WRITE4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_pll.c
54
CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_pll.c
55
#define READ4(_clk, off, val) \
sys/dev/clk/rockchip/rk_clk_pll.c
56
CLKDEV_READ_4(clknode_get_device(_clk), off, val)
sys/dev/clk/rockchip/rk_clk_pll.c
75
uint32_t val = 0;
sys/dev/clk/rockchip/rk_clk_pll.c
84
val |= 1 << sc->gate_shift;
sys/dev/clk/rockchip/rk_clk_pll.c
86
val |= (1 << sc->gate_shift) << RK_CLK_PLL_MASK_SHIFT;
sys/dev/clk/rockchip/rk_clk_pll.c
87
dprintf("Write: gate_offset=%x, val=%x\n", sc->gate_offset, val);
sys/dev/clk/rockchip/rk_clk_pll.c
89
WRITE4(clk, sc->gate_offset, val);
sys/dev/clk/rockchip/rk_cru.c
115
uint32_t val;
sys/dev/clk/rockchip/rk_cru.c
126
val = 0;
sys/dev/clk/rockchip/rk_cru.c
128
val = (1 << bit);
sys/dev/clk/rockchip/rk_cru.c
129
CCU_WRITE4(sc, reg, val | ((1 << bit) << 16));
sys/dev/clk/rockchip/rk_cru.c
141
uint32_t val;
sys/dev/clk/rockchip/rk_cru.c
151
val = CCU_READ4(sc, reg);
sys/dev/clk/rockchip/rk_cru.c
155
if (val & (1 << bit))
sys/dev/clk/rockchip/rk_cru.c
68
#define CCU_WRITE4(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/dev/clk/rockchip/rk_cru.c
73
rk_cru_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/dev/clk/rockchip/rk_cru.c
78
CCU_WRITE4(sc, addr, val);
sys/dev/clk/rockchip/rk_cru.c
83
rk_cru_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/dev/clk/rockchip/rk_cru.c
89
*val = CCU_READ4(sc, addr);
sys/dev/coretemp/coretemp.c
312
uint64_t val;
sys/dev/coretemp/coretemp.c
347
int val, tmp;
sys/dev/coretemp/coretemp.c
358
val = -1;
sys/dev/coretemp/coretemp.c
364
val = (sc->sc_tjmax - tmp) * 10 + TZ_ZEROC;
sys/dev/coretemp/coretemp.c
367
val = (msr >> THERM_STATUS_TEMP_SHIFT) &
sys/dev/coretemp/coretemp.c
371
val = (msr >> THERM_STATUS_RES_SHIFT) &
sys/dev/coretemp/coretemp.c
375
val = sc->sc_tjmax * 10 + TZ_ZEROC;
sys/dev/coretemp/coretemp.c
407
return (sysctl_handle_int(oidp, &val, 0, req));
sys/dev/coretemp/coretemp.c
415
int error, val;
sys/dev/coretemp/coretemp.c
427
val = sc->sc_throttle_log;
sys/dev/coretemp/coretemp.c
429
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/coretemp/coretemp.c
433
else if (val != 0)
sys/dev/cpufreq/ichss.c
89
#define ICH_SET_REG(reg, val) \
sys/dev/cpufreq/ichss.c
91
rman_get_bushandle((reg)), 0, (val)))
sys/dev/cxgb/common/cxgb_aq100x.c
119
int val;
sys/dev/cxgb/common/cxgb_aq100x.c
137
int val;
sys/dev/cxgb/common/cxgb_aq100x.c
69
(void) mdio_write(phy, regs[i].mmd, regs[i].reg, regs[i].val); \
sys/dev/cxgb/common/cxgb_common.h
149
int reg_addr, unsigned int *val);
sys/dev/cxgb/common/cxgb_common.h
151
int reg_addr, unsigned int val);
sys/dev/cxgb/common/cxgb_common.h
584
int reg_addr, unsigned int *val);
sys/dev/cxgb/common/cxgb_common.h
586
int reg_addr, unsigned int val);
sys/dev/cxgb/common/cxgb_common.h
597
unsigned int val)
sys/dev/cxgb/common/cxgb_common.h
599
return phy->mdio_write(phy->adapter, phy->addr, mmd, reg, val);
sys/dev/cxgb/common/cxgb_common.h
631
unsigned int val;
sys/dev/cxgb/common/cxgb_common.h
676
void t3_set_reg_field(adapter_t *adap, unsigned int addr, u32 mask, u32 val);
sys/dev/cxgb/common/cxgb_common.h
837
int t3_i2c_write8(adapter_t *adapter, int chained, u8 val);
sys/dev/cxgb/common/cxgb_common.h
842
unsigned int val);
sys/dev/cxgb/common/cxgb_mv88e1xxx.c
153
u32 val;
sys/dev/cxgb/common/cxgb_mv88e1xxx.c
156
return mdio_read(cphy, 0, MV88E1XXX_INTR_STATUS, &val);
sys/dev/cxgb/common/cxgb_t3_cpl.h
721
__be64 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
100
void t3_set_reg_field(adapter_t *adapter, unsigned int addr, u32 mask, u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
104
t3_write_reg(adapter, addr, v | val);
sys/dev/cxgb/common/cxgb_t3_hw.c
1078
unsigned int c, left, val, offset = addr & 0xff;
sys/dev/cxgb/common/cxgb_t3_hw.c
1083
val = swab32(addr) | SF_PROG_PAGE;
sys/dev/cxgb/common/cxgb_t3_hw.c
1086
(ret = sf1_write(adapter, 4, 1, val)) != 0)
sys/dev/cxgb/common/cxgb_t3_hw.c
1091
val = *(const u32*)data;
sys/dev/cxgb/common/cxgb_t3_hw.c
1094
val = htonl(val);
sys/dev/cxgb/common/cxgb_t3_hw.c
1096
ret = sf1_write(adapter, c, c != left, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
160
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
165
val = t3_read_reg(adap, mc7->offset + A_MC7_BD_OP);
sys/dev/cxgb/common/cxgb_t3_hw.c
166
while ((val & F_BUSY) && attempts--)
sys/dev/cxgb/common/cxgb_t3_hw.c
167
val = t3_read_reg(adap,
sys/dev/cxgb/common/cxgb_t3_hw.c
169
if (val & F_BUSY)
sys/dev/cxgb/common/cxgb_t3_hw.c
172
val = t3_read_reg(adap, mc7->offset + A_MC7_BD_DATA1);
sys/dev/cxgb/common/cxgb_t3_hw.c
176
val64 |= (u64)val << 32;
sys/dev/cxgb/common/cxgb_t3_hw.c
179
val >>= shift[mc7->width];
sys/dev/cxgb/common/cxgb_t3_hw.c
180
val64 |= (u64)val << (step[mc7->width] * i);
sys/dev/cxgb/common/cxgb_t3_hw.c
229
int t3_i2c_write8(adapter_t *adapter, int chained, u8 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
234
t3_write_reg(adapter, A_I2C_DATA, V_I2C_DATA(val));
sys/dev/cxgb/common/cxgb_t3_hw.c
251
u32 val = F_PREEN | V_CLKDIV(clkdiv);
sys/dev/cxgb/common/cxgb_t3_hw.c
253
t3_write_reg(adap, A_MI1_CFG, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
282
int reg_addr, unsigned int val)
sys/dev/cxgb/common/cxgb_t3_hw.c
2822
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
2831
0, SG_CONTEXT_CMD_ATTEMPTS, 1, &val))
sys/dev/cxgb/common/cxgb_t3_hw.c
2836
return G_CQ_INDEX(val);
sys/dev/cxgb/common/cxgb_t3_hw.c
293
t3_write_reg(adapter, A_MI1_DATA, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
2960
u32 val = i << 16;
sys/dev/cxgb/common/cxgb_t3_hw.c
2963
val |= (cpus[cpu_idx++] & 0x3f) << (8 * j);
sys/dev/cxgb/common/cxgb_t3_hw.c
2967
t3_write_reg(adapter, A_TP_RSS_LKP_TABLE, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
2992
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
2998
val = t3_read_reg(adapter, A_TP_RSS_LKP_TABLE);
sys/dev/cxgb/common/cxgb_t3_hw.c
2999
if (!(val & 0x80000000))
sys/dev/cxgb/common/cxgb_t3_hw.c
3001
*lkup++ = (u8)val;
sys/dev/cxgb/common/cxgb_t3_hw.c
3002
*lkup++ = (u8)(val >> 8);
sys/dev/cxgb/common/cxgb_t3_hw.c
3009
val = t3_read_reg(adapter, A_TP_RSS_MAP_TABLE);
sys/dev/cxgb/common/cxgb_t3_hw.c
3010
if (!(val & 0x80000000))
sys/dev/cxgb/common/cxgb_t3_hw.c
3012
*map++ = (u16)val;
sys/dev/cxgb/common/cxgb_t3_hw.c
3041
unsigned int mask, unsigned int val)
sys/dev/cxgb/common/cxgb_t3_hw.c
3044
val |= t3_read_reg(adap, A_TP_PIO_DATA) & ~mask;
sys/dev/cxgb/common/cxgb_t3_hw.c
3045
t3_write_reg(adap, A_TP_PIO_DATA, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
3164
static inline void tp_wr_indirect(adapter_t *adap, unsigned int addr, u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
3167
t3_write_reg(adap, A_TP_PIO_DATA, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
3301
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
3306
val = t3_read_reg(adap, A_TP_PARA_REG3);
sys/dev/cxgb/common/cxgb_t3_hw.c
3307
val &= ~(F_RXCOALESCEENABLE | F_RXCOALESCEPSHEN);
sys/dev/cxgb/common/cxgb_t3_hw.c
3310
val |= F_RXCOALESCEENABLE;
sys/dev/cxgb/common/cxgb_t3_hw.c
3312
val |= F_RXCOALESCEPSHEN;
sys/dev/cxgb/common/cxgb_t3_hw.c
3317
t3_write_reg(adap, A_TP_PARA_REG3, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
332
int reg_addr, unsigned int val)
sys/dev/cxgb/common/cxgb_t3_hw.c
344
t3_write_reg(adapter, A_MI1_DATA, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
3463
unsigned int val;
sys/dev/cxgb/common/cxgb_t3_hw.c
3466
val = t3_read_reg(adap, A_TP_MTU_TABLE);
sys/dev/cxgb/common/cxgb_t3_hw.c
3467
mtus[i] = val & 0x3fff;
sys/dev/cxgb/common/cxgb_t3_hw.c
373
unsigned int val;
sys/dev/cxgb/common/cxgb_t3_hw.c
375
ret = mdio_read(phy, mmd, reg, &val);
sys/dev/cxgb/common/cxgb_t3_hw.c
377
val &= ~clear;
sys/dev/cxgb/common/cxgb_t3_hw.c
378
ret = mdio_write(phy, mmd, reg, val | set);
sys/dev/cxgb/common/cxgb_t3_hw.c
3940
static int wrreg_wait(adapter_t *adapter, unsigned int addr, u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
3942
t3_write_reg(adapter, addr, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
3963
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
3971
val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
sys/dev/cxgb/common/cxgb_t3_hw.c
3972
slow = val & F_SLOW;
sys/dev/cxgb/common/cxgb_t3_hw.c
3973
width = G_WIDTH(val);
sys/dev/cxgb/common/cxgb_t3_hw.c
3974
density = G_DEN(val);
sys/dev/cxgb/common/cxgb_t3_hw.c
3976
t3_write_reg(adapter, mc7->offset + A_MC7_CFG, val | F_IFEN);
sys/dev/cxgb/common/cxgb_t3_hw.c
3977
val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); /* flush */
sys/dev/cxgb/common/cxgb_t3_hw.c
3999
val | F_CLKEN | F_TERM150);
sys/dev/cxgb/common/cxgb_t3_hw.c
4007
val = slow ? 3 : 6;
sys/dev/cxgb/common/cxgb_t3_hw.c
4011
wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val))
sys/dev/cxgb/common/cxgb_t3_hw.c
4026
wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val | 0x380) ||
sys/dev/cxgb/common/cxgb_t3_hw.c
4027
wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val))
sys/dev/cxgb/common/cxgb_t3_hw.c
4050
val = t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP);
sys/dev/cxgb/common/cxgb_t3_hw.c
4051
} while ((val & F_BUSY) && --attempts);
sys/dev/cxgb/common/cxgb_t3_hw.c
4052
if (val & F_BUSY) {
sys/dev/cxgb/common/cxgb_t3_hw.c
4080
u16 val, devid;
sys/dev/cxgb/common/cxgb_t3_hw.c
4086
&val);
sys/dev/cxgb/common/cxgb_t3_hw.c
4087
pldsize = (val & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
sys/dev/cxgb/common/cxgb_t3_hw.c
4097
val & ~PCI_EXP_DEVCTL_READRQ & ~PCI_EXP_DEVCTL_PAYLOAD);
sys/dev/cxgb/common/cxgb_t3_hw.c
4103
&val);
sys/dev/cxgb/common/cxgb_t3_hw.c
4110
if (val & 1) /* check LOsEnable */
sys/dev/cxgb/common/cxgb_t3_hw.c
4235
u16 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
4240
&val);
sys/dev/cxgb/common/cxgb_t3_hw.c
4241
p->width = (val >> 4) & 0x3f;
sys/dev/cxgb/common/cxgb_t3_hw.c
425
unsigned int val = 0;
sys/dev/cxgb/common/cxgb_t3_hw.c
427
err = mdio_read(phy, 0, MII_CTRL1000, &val);
sys/dev/cxgb/common/cxgb_t3_hw.c
431
val &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
sys/dev/cxgb/common/cxgb_t3_hw.c
433
val |= ADVERTISE_1000HALF;
sys/dev/cxgb/common/cxgb_t3_hw.c
435
val |= ADVERTISE_1000FULL;
sys/dev/cxgb/common/cxgb_t3_hw.c
4358
u32 val = V_PORTSPEED(is_10G(adapter) || adapter->params.nports > 2 ?
sys/dev/cxgb/common/cxgb_t3_hw.c
437
err = mdio_write(phy, 0, MII_CTRL1000, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
4371
val |= F_ENRGMII;
sys/dev/cxgb/common/cxgb_t3_hw.c
4374
t3_write_reg(adapter, A_XGM_PORT_CFG, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
4377
val |= F_CLKDIVRESET_;
sys/dev/cxgb/common/cxgb_t3_hw.c
4378
t3_write_reg(adapter, A_XGM_PORT_CFG, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
4380
t3_write_reg(adapter, XGM_REG(A_XGM_PORT_CFG, 1), val);
sys/dev/cxgb/common/cxgb_t3_hw.c
441
val = 1;
sys/dev/cxgb/common/cxgb_t3_hw.c
443
val |= ADVERTISE_10HALF;
sys/dev/cxgb/common/cxgb_t3_hw.c
445
val |= ADVERTISE_10FULL;
sys/dev/cxgb/common/cxgb_t3_hw.c
447
val |= ADVERTISE_100HALF;
sys/dev/cxgb/common/cxgb_t3_hw.c
449
val |= ADVERTISE_100FULL;
sys/dev/cxgb/common/cxgb_t3_hw.c
451
val |= ADVERTISE_PAUSE_CAP;
sys/dev/cxgb/common/cxgb_t3_hw.c
453
val |= ADVERTISE_PAUSE_ASYM;
sys/dev/cxgb/common/cxgb_t3_hw.c
454
return mdio_write(phy, 0, MII_ADVERTISE, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
4652
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
4654
val = port ? F_PORT1ACTIVE : F_PORT0ACTIVE;
sys/dev/cxgb/common/cxgb_t3_hw.c
4656
val);
sys/dev/cxgb/common/cxgb_t3_hw.c
467
unsigned int val = 0;
sys/dev/cxgb/common/cxgb_t3_hw.c
4671
static int t3_cim_hac_read(adapter_t *adapter, u32 addr, u32 *val)
sys/dev/cxgb/common/cxgb_t3_hw.c
4680
*val = t3_read_reg(adapter, A_CIM_HOST_ACC_DATA);
sys/dev/cxgb/common/cxgb_t3_hw.c
4685
static int t3_cim_hac_write(adapter_t *adapter, u32 addr, u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
4689
t3_write_reg(adapter, A_CIM_HOST_ACC_DATA, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
470
val |= ADVERTISE_1000XHALF;
sys/dev/cxgb/common/cxgb_t3_hw.c
472
val |= ADVERTISE_1000XFULL;
sys/dev/cxgb/common/cxgb_t3_hw.c
474
val |= ADVERTISE_1000XPAUSE;
sys/dev/cxgb/common/cxgb_t3_hw.c
476
val |= ADVERTISE_1000XPSE_ASYM;
sys/dev/cxgb/common/cxgb_t3_hw.c
477
return mdio_write(phy, 0, MII_ADVERTISE, val);
sys/dev/cxgb/common/cxgb_t3_hw.c
527
u32 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
529
return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val);
sys/dev/cxgb/common/cxgb_t3_hw.c
56
u32 val = t3_read_reg(adapter, reg);
sys/dev/cxgb/common/cxgb_t3_hw.c
58
if (!!(val & mask) == polarity) {
sys/dev/cxgb/common/cxgb_t3_hw.c
60
*valp = val;
sys/dev/cxgb/common/cxgb_t3_hw.c
657
u16 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
667
t3_os_pci_read_config_2(adapter, base + PCI_VPD_ADDR, &val);
sys/dev/cxgb/common/cxgb_t3_hw.c
668
} while (!(val & PCI_VPD_ADDR_F) && --attempts);
sys/dev/cxgb/common/cxgb_t3_hw.c
670
if (!(val & PCI_VPD_ADDR_F)) {
sys/dev/cxgb/common/cxgb_t3_hw.c
690
u16 val;
sys/dev/cxgb/common/cxgb_t3_hw.c
703
t3_os_pci_read_config_2(adapter, base + PCI_VPD_ADDR, &val);
sys/dev/cxgb/common/cxgb_t3_hw.c
704
} while ((val & PCI_VPD_ADDR_F) && --attempts);
sys/dev/cxgb/common/cxgb_t3_hw.c
706
if (val & PCI_VPD_ADDR_F) {
sys/dev/cxgb/common/cxgb_t3_hw.c
85
t3_write_reg(adapter, p->reg_addr + offset, p->val);
sys/dev/cxgb/common/cxgb_t3_hw.c
983
u32 val)
sys/dev/cxgb/common/cxgb_t3_hw.c
989
t3_write_reg(adapter, A_SF_DATA, val);
sys/dev/cxgb/common/cxgb_tn1010.c
112
int err, val;
sys/dev/cxgb/common/cxgb_tn1010.c
117
val = ADVERTISE_CSMA | ADVERTISE_ENPAGE | ADVERTISE_NPAGE;
sys/dev/cxgb/common/cxgb_tn1010.c
119
val |= ADVERTISE_PAUSE_CAP;
sys/dev/cxgb/common/cxgb_tn1010.c
121
val |= ADVERTISE_PAUSE_ASYM;
sys/dev/cxgb/common/cxgb_tn1010.c
122
err = mdio_write(phy, MDIO_DEV_ANEG, ANEG_ADVER, val);
sys/dev/cxgb/common/cxgb_tn1010.c
126
val = (advert & ADVERTISED_10000baseT_Full) ? ADVERTISE_10000FULL : 0;
sys/dev/cxgb/common/cxgb_tn1010.c
127
return mdio_write(phy, MDIO_DEV_ANEG, ANEG_10G_CTRL, val |
sys/dev/cxgb/common/cxgb_vsc7323.c
141
&sys_avp[i].val, 1)))
sys/dev/cxgb/common/cxgb_vsc7323.c
170
&fifo_avp[i].val, 1)))
sys/dev/cxgb/common/cxgb_vsc7323.c
175
&xg_avp[i].val, 1)))
sys/dev/cxgb/common/cxgb_vsc7323.c
69
static int elmr_write(adapter_t *adap, int addr, u32 val)
sys/dev/cxgb/common/cxgb_vsc7323.c
71
return t3_elmr_blk_write(adap, addr, &val, 1);
sys/dev/cxgb/common/cxgb_vsc8211.c
113
u32 val;
sys/dev/cxgb/common/cxgb_vsc8211.c
116
return mdio_read(cphy, 0, VSC8211_INTR_STATUS, &val);
sys/dev/cxgb/common/cxgb_vsc8211.c
395
unsigned int val = 4;
sys/dev/cxgb/common/cxgb_vsc8211.c
419
val = 3;
sys/dev/cxgb/common/cxgb_vsc8211.c
421
regval = V_VSC8211_TXFIFODEPTH(val) | V_VSC8211_RXFIFODEPTH(val) |
sys/dev/cxgb/common/cxgb_vsc8211.c
433
unsigned int val;
sys/dev/cxgb/common/cxgb_vsc8211.c
441
err = mdio_read(phy, 0, VSC8211_EXT_CTRL, &val);
sys/dev/cxgb/common/cxgb_vsc8211.c
444
if (val & VSC_CTRL_MEDIA_MODE_HI) {
sys/dev/cxgb/common/cxgb_vsc8211.c
458
val | VSC_CTRL_CLAUSE37_VIEW)) != 0 ||
sys/dev/cxgb/common/cxgb_xgmac.c
158
u32 val;
sys/dev/cxgb/common/cxgb_xgmac.c
207
val = xgm_reset_ctrl(mac);
sys/dev/cxgb/common/cxgb_xgmac.c
208
t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val);
sys/dev/cxgb/common/cxgb_xgmac.c
210
if ((val & F_PCS_RESET_) && adap->params.rev) {
sys/dev/cxgb/common/cxgb_xgmac.c
221
u32 val, store_mps;
sys/dev/cxgb/common/cxgb_xgmac.c
284
val = xgm_reset_ctrl(mac);
sys/dev/cxgb/common/cxgb_xgmac.c
285
t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val);
sys/dev/cxgb/common/cxgb_xgmac.c
287
if ((val & F_PCS_RESET_) && adap->params.rev) {
sys/dev/cxgb/common/cxgb_xgmac.c
49
int val = F_MAC_RESET_ | F_XGMAC_STOP_EN;
sys/dev/cxgb/common/cxgb_xgmac.c
54
val |= F_PCS_RESET_;
sys/dev/cxgb/common/cxgb_xgmac.c
56
val |= F_XG2G_RESET_;
sys/dev/cxgb/common/cxgb_xgmac.c
570
u32 val;
sys/dev/cxgb/common/cxgb_xgmac.c
58
val |= F_PCS_RESET_ | F_XG2G_RESET_;
sys/dev/cxgb/common/cxgb_xgmac.c
588
val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);
sys/dev/cxgb/common/cxgb_xgmac.c
589
val &= ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM);
sys/dev/cxgb/common/cxgb_xgmac.c
590
val |= V_RXFIFOPAUSEHWM(rx_fifo_hwm(rx_max_pkt_size) / 8);
sys/dev/cxgb/common/cxgb_xgmac.c
591
t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val);
sys/dev/cxgb/common/cxgb_xgmac.c
599
val = V_PORTSPEED(0);
sys/dev/cxgb/common/cxgb_xgmac.c
60
val |= F_RGMII_RESET_ | F_XG2G_RESET_;
sys/dev/cxgb/common/cxgb_xgmac.c
601
val = V_PORTSPEED(1);
sys/dev/cxgb/common/cxgb_xgmac.c
603
val = V_PORTSPEED(2);
sys/dev/cxgb/common/cxgb_xgmac.c
605
val = V_PORTSPEED(3);
sys/dev/cxgb/common/cxgb_xgmac.c
611
V_PORTSPEED(M_PORTSPEED), val);
sys/dev/cxgb/common/cxgb_xgmac.c
615
if ((old & V_PORTSPEED(M_PORTSPEED)) != val) {
sys/dev/cxgb/common/cxgb_xgmac.c
616
t3_mac_reset(mac, val);
sys/dev/cxgb/common/cxgb_xgmac.c
62
return (val);
sys/dev/cxgb/common/cxgb_xgmac.c
622
val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);
sys/dev/cxgb/common/cxgb_xgmac.c
623
val &= ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM);
sys/dev/cxgb/common/cxgb_xgmac.c
628
val |= V_RXFIFOPAUSEHWM(rx_fifo_hwm(rx_max_pkt_size) / 8);
sys/dev/cxgb/common/cxgb_xgmac.c
630
t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val);
sys/dev/cxgb/common/cxgb_xgmac.c
710
int val = xgm_reset_ctrl(mac);
sys/dev/cxgb/common/cxgb_xgmac.c
716
t3_write_reg(mac->adapter, A_XGM_RESET_CTRL + mac->offset, val);
sys/dev/cxgb/cxgb_adapter.h
435
t3_write_reg(adapter_t *adapter, uint32_t reg_addr, uint32_t val)
sys/dev/cxgb/cxgb_adapter.h
437
bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val);
sys/dev/cxgb/cxgb_adapter.h
441
t3_os_pci_read_config_4(adapter_t *adapter, int reg, uint32_t *val)
sys/dev/cxgb/cxgb_adapter.h
443
*val = pci_read_config(adapter->dev, reg, 4);
sys/dev/cxgb/cxgb_adapter.h
447
t3_os_pci_write_config_4(adapter_t *adapter, int reg, uint32_t val)
sys/dev/cxgb/cxgb_adapter.h
449
pci_write_config(adapter->dev, reg, val, 4);
sys/dev/cxgb/cxgb_adapter.h
453
t3_os_pci_read_config_2(adapter_t *adapter, int reg, uint16_t *val)
sys/dev/cxgb/cxgb_adapter.h
455
*val = pci_read_config(adapter->dev, reg, 2);
sys/dev/cxgb/cxgb_adapter.h
459
t3_os_pci_write_config_2(adapter_t *adapter, int reg, uint16_t val)
sys/dev/cxgb/cxgb_adapter.h
461
pci_write_config(adapter->dev, reg, val, 2);
sys/dev/cxgb/cxgb_ioctl.h
231
struct ch_filter_tuple val;
sys/dev/cxgb/cxgb_ioctl.h
74
uint32_t val;
sys/dev/cxgb/cxgb_main.c
2461
in_range(int val, int lo, int hi)
sys/dev/cxgb/cxgb_main.c
2463
return val < 0 || (val <= hi && val >= lo);
sys/dev/cxgb/cxgb_main.c
2502
uint32_t val;
sys/dev/cxgb/cxgb_main.c
2516
mid->reg_num, &val);
sys/dev/cxgb/cxgb_main.c
2519
mid->reg_num & 0x1f, &val);
sys/dev/cxgb/cxgb_main.c
2521
mid->val_out = val;
sys/dev/cxgb/cxgb_main.c
2549
t3_write_reg(sc, edata->addr, edata->val);
sys/dev/cxgb/cxgb_main.c
2556
edata->val = t3_read_reg(sc, edata->addr);
sys/dev/cxgb/cxgb_main.c
2633
edata->val = pi->nqsets;
sys/dev/cxgb/cxgb_main.c
3007
(f->val.dip && f->mask.dip != 0xffffffff) ||
sys/dev/cxgb/cxgb_main.c
3008
(f->val.sport && f->mask.sport != 0xffff) ||
sys/dev/cxgb/cxgb_main.c
3009
(f->val.dport && f->mask.dport != 0xffff) ||
sys/dev/cxgb/cxgb_main.c
3010
(f->val.vlan && f->mask.vlan != 0xfff) ||
sys/dev/cxgb/cxgb_main.c
3011
(f->val.vlan_prio &&
sys/dev/cxgb/cxgb_main.c
3026
p->sip = f->val.sip;
sys/dev/cxgb/cxgb_main.c
3028
p->dip = f->val.dip;
sys/dev/cxgb/cxgb_main.c
3029
p->sport = f->val.sport;
sys/dev/cxgb/cxgb_main.c
3030
p->dport = f->val.dport;
sys/dev/cxgb/cxgb_main.c
3031
p->vlan = f->mask.vlan ? f->val.vlan : 0xfff;
sys/dev/cxgb/cxgb_main.c
3032
p->vlan_prio = f->mask.vlan_prio ? (f->val.vlan_prio & 6) :
sys/dev/cxgb/cxgb_main.c
3097
f->val.sip = p->sip;
sys/dev/cxgb/cxgb_main.c
3099
f->val.dip = p->dip;
sys/dev/cxgb/cxgb_main.c
3101
f->val.sport = p->sport;
sys/dev/cxgb/cxgb_main.c
3103
f->val.dport = p->dport;
sys/dev/cxgb/cxgb_main.c
3105
f->val.vlan = p->vlan == 0xfff ? 0 : p->vlan;
sys/dev/cxgb/cxgb_main.c
3107
f->val.vlan_prio = p->vlan_prio == FILTER_NO_VLAN_PRI ?
sys/dev/cxgb/cxgb_main.c
3284
unsigned int word, u64 mask, u64 val)
sys/dev/cxgb/cxgb_main.c
3291
req->val = htobe64(val);
sys/dev/cxgb/cxgb_main.c
3296
unsigned int word, u64 mask, u64 val)
sys/dev/cxgb/cxgb_main.c
3302
mk_set_tcb_field(req, tid, word, mask, val);
sys/dev/cxgbe/adapter.h
1281
t4_write_reg(struct adapter *sc, uint32_t reg, uint32_t val)
sys/dev/cxgbe/adapter.h
1285
bus_write_4(sc->regs_res, reg, val);
sys/dev/cxgbe/adapter.h
1303
t4_write_reg64(struct adapter *sc, uint32_t reg, uint64_t val)
sys/dev/cxgbe/adapter.h
1308
bus_write_8(sc->regs_res, reg, val);
sys/dev/cxgbe/adapter.h
1310
bus_write_4(sc->regs_res, reg, val);
sys/dev/cxgbe/adapter.h
1311
bus_write_4(sc->regs_res, reg + 4, val>> 32);
sys/dev/cxgbe/adapter.h
1316
t4_os_pci_read_cfg1(struct adapter *sc, int reg, uint8_t *val)
sys/dev/cxgbe/adapter.h
1320
*val = pci_read_config(sc->dev, reg, 1);
sys/dev/cxgbe/adapter.h
1324
t4_os_pci_write_cfg1(struct adapter *sc, int reg, uint8_t val)
sys/dev/cxgbe/adapter.h
1328
pci_write_config(sc->dev, reg, val, 1);
sys/dev/cxgbe/adapter.h
1332
t4_os_pci_read_cfg2(struct adapter *sc, int reg, uint16_t *val)
sys/dev/cxgbe/adapter.h
1337
*val = pci_read_config(sc->dev, reg, 2);
sys/dev/cxgbe/adapter.h
1341
t4_os_pci_write_cfg2(struct adapter *sc, int reg, uint16_t val)
sys/dev/cxgbe/adapter.h
1345
pci_write_config(sc->dev, reg, val, 2);
sys/dev/cxgbe/adapter.h
1349
t4_os_pci_read_cfg4(struct adapter *sc, int reg, uint32_t *val)
sys/dev/cxgbe/adapter.h
1353
*val = pci_read_config(sc->dev, reg, 4);
sys/dev/cxgbe/adapter.h
1357
t4_os_pci_write_cfg4(struct adapter *sc, int reg, uint32_t val)
sys/dev/cxgbe/adapter.h
1361
pci_write_config(sc->dev, reg, val, 4);
sys/dev/cxgbe/adapter.h
1678
read_via_memwin(struct adapter *sc, int idx, uint32_t addr, uint32_t *val,
sys/dev/cxgbe/adapter.h
1682
return (rw_via_memwin(sc, idx, addr, val, len, 0));
sys/dev/cxgbe/adapter.h
1687
const uint32_t *val, int len)
sys/dev/cxgbe/adapter.h
1690
return (rw_via_memwin(sc, idx, addr, (void *)(uintptr_t)val, len, 1));
sys/dev/cxgbe/adapter.h
827
ofld_txq_group(int val, int mask)
sys/dev/cxgbe/adapter.h
833
return (val >> mshift & gmask);
sys/dev/cxgbe/common/common.h
1085
uint16_t word, uint64_t mask, uint64_t val, const int qid)
sys/dev/cxgbe/common/common.h
1120
req->val = htobe64(val);
sys/dev/cxgbe/common/common.h
1137
uint64_t mask, uint64_t val)
sys/dev/cxgbe/common/common.h
1139
return (mk_set_tcb_field_ulp_with_rpl(sc, cur, tid, word, mask, val, -1));
sys/dev/cxgbe/common/common.h
648
void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);
sys/dev/cxgbe/common/common.h
751
u32 val, bool sleep_ok);
sys/dev/cxgbe/common/common.h
851
unsigned int mask, unsigned int val);
sys/dev/cxgbe/common/common.h
899
u32 *val);
sys/dev/cxgbe/common/common.h
902
u32 *val, int rw);
sys/dev/cxgbe/common/common.h
906
const u32 *val, int timeout);
sys/dev/cxgbe/common/common.h
909
const u32 *val);
sys/dev/cxgbe/common/common.h
964
unsigned int mmd, unsigned int reg, unsigned int val);
sys/dev/cxgbe/common/common.h
999
int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val);
sys/dev/cxgbe/common/t4_hw.c
10350
u32 val;
sys/dev/cxgbe/common/t4_hw.c
10356
val = V_FW_VI_MAC_CMD_ENTRY_TYPE(FW_VI_MAC_TYPE_HASHVEC) |
sys/dev/cxgbe/common/t4_hw.c
10358
c.freemacs_to_len16 = cpu_to_be32(val);
sys/dev/cxgbe/common/t4_hw.c
105
u32 val = t4_read_reg(adap, reg);
sys/dev/cxgbe/common/t4_hw.c
108
if (!(val & (1 << 19))) {
sys/dev/cxgbe/common/t4_hw.c
10898
u16 val;
sys/dev/cxgbe/common/t4_hw.c
10903
t4_os_pci_read_cfg2(adapter, pcie_cap + PCI_EXP_LNKSTA, &val);
sys/dev/cxgbe/common/t4_hw.c
10904
p->speed = val & PCI_EXP_LNKSTA_CLS;
sys/dev/cxgbe/common/t4_hw.c
10905
p->width = (val & PCI_EXP_LNKSTA_NLW) >> 4;
sys/dev/cxgbe/common/t4_hw.c
11056
u16 val;
sys/dev/cxgbe/common/t4_hw.c
11061
t4_os_pci_read_cfg2(adapter, pcie_cap + PCI_EXP_DEVCTL2, &val);
sys/dev/cxgbe/common/t4_hw.c
11062
val &= 0xfff0;
sys/dev/cxgbe/common/t4_hw.c
11063
val |= range ;
sys/dev/cxgbe/common/t4_hw.c
11064
t4_os_pci_write_cfg2(adapter, pcie_cap + PCI_EXP_DEVCTL2, val);
sys/dev/cxgbe/common/t4_hw.c
11551
uint32_t v, param[2], val[2];
sys/dev/cxgbe/common/t4_hw.c
11561
rc = -t4_query_params(adap, adap->mbox, adap->pf, 0, 2, param, val);
sys/dev/cxgbe/common/t4_hw.c
11563
tpp->filter_mode = G_FW_PARAMS_PARAM_FILTER_MODE(val[0]);
sys/dev/cxgbe/common/t4_hw.c
11564
tpp->filter_mask = G_FW_PARAMS_PARAM_FILTER_MASK(val[0]);
sys/dev/cxgbe/common/t4_hw.c
11565
tpp->vnic_mode = val[1];
sys/dev/cxgbe/common/t4_hw.c
11845
u32 param, val;
sys/dev/cxgbe/common/t4_hw.c
11876
ret = t4_query_params(adap, mbox, pf, vf, 1, &param, &val);
sys/dev/cxgbe/common/t4_hw.c
11881
vi->rss_base = val & 0xffff;
sys/dev/cxgbe/common/t4_hw.c
12186
unsigned int cfg, val, idx;
sys/dev/cxgbe/common/t4_hw.c
12194
val = 0;
sys/dev/cxgbe/common/t4_hw.c
12196
&val);
sys/dev/cxgbe/common/t4_hw.c
12201
ret = t4_cim_read_core(adap, 1, coreid, A_UP_UP_DBG_LA_CFG, 1, &val);
sys/dev/cxgbe/common/t4_hw.c
12205
idx = G_UPDBGLAWRPTR(val);
sys/dev/cxgbe/common/t4_hw.c
12210
val = V_UPDBGLARDPTR(idx) | F_UPDBGLARDEN;
sys/dev/cxgbe/common/t4_hw.c
12212
&val);
sys/dev/cxgbe/common/t4_hw.c
12216
&val);
sys/dev/cxgbe/common/t4_hw.c
12219
if (val & F_UPDBGLARDEN) {
sys/dev/cxgbe/common/t4_hw.c
12242
val = cfg & ~F_UPDBGLARDEN;
sys/dev/cxgbe/common/t4_hw.c
12244
&val);
sys/dev/cxgbe/common/t4_hw.c
12265
unsigned int i, cfg, val, idx;
sys/dev/cxgbe/common/t4_hw.c
12272
val = t4_read_reg(adap, A_TP_DBG_LA_CONFIG);
sys/dev/cxgbe/common/t4_hw.c
12273
idx = G_DBGLAWPTR(val);
sys/dev/cxgbe/common/t4_hw.c
12274
last_incomplete = G_DBGLAMODE(val) >= 2 && (val & F_DBGLAWHLF) == 0;
sys/dev/cxgbe/common/t4_hw.c
12280
val &= 0xffff;
sys/dev/cxgbe/common/t4_hw.c
12281
val &= ~V_DBGLARPTR(M_DBGLARPTR);
sys/dev/cxgbe/common/t4_hw.c
12282
val |= adap->params.tp.la_mask;
sys/dev/cxgbe/common/t4_hw.c
12285
t4_write_reg(adap, A_TP_DBG_LA_CONFIG, V_DBGLARPTR(idx) | val);
sys/dev/cxgbe/common/t4_hw.c
12584
u32 params[1], val[1];
sys/dev/cxgbe/common/t4_hw.c
12590
val[0] = 0xff; /* Initialize all MCs */
sys/dev/cxgbe/common/t4_hw.c
12593
ret = t4_set_params_timeout(adap, adap->mbox, adap->pf, 0, 1, params, val,
sys/dev/cxgbe/common/t4_hw.c
12965
uint32_t param, val;
sys/dev/cxgbe/common/t4_hw.c
13026
val = V_FW_PARAMS_PARAM_FILTER_MODE(fmode) |
sys/dev/cxgbe/common/t4_hw.c
13029
&val);
sys/dev/cxgbe/common/t4_hw.c
13038
val = vnic_mode;
sys/dev/cxgbe/common/t4_hw.c
13040
&val);
sys/dev/cxgbe/common/t4_hw.c
133
u32 val)
sys/dev/cxgbe/common/t4_hw.c
13439
unsigned int param, val;
sys/dev/cxgbe/common/t4_hw.c
13451
ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, &param, &val);
sys/dev/cxgbe/common/t4_hw.c
13455
if (val == 1) {
sys/dev/cxgbe/common/t4_hw.c
13457
&param, &val);
sys/dev/cxgbe/common/t4_hw.c
13470
unsigned int param, val;
sys/dev/cxgbe/common/t4_hw.c
13480
ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, &param, &val);
sys/dev/cxgbe/common/t4_hw.c
13487
if (val != 1) {
sys/dev/cxgbe/common/t4_hw.c
13492
ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, &param, &val);
sys/dev/cxgbe/common/t4_hw.c
137
t4_write_reg(adapter, addr, v | val);
sys/dev/cxgbe/common/t4_hw.c
199
u32 val;
sys/dev/cxgbe/common/t4_hw.c
210
val = t4_read_reg(adap, A_PCIE_CFG_SPACE_DATA);
sys/dev/cxgbe/common/t4_hw.c
220
return val;
sys/dev/cxgbe/common/t4_hw.c
3448
u16 val;
sys/dev/cxgbe/common/t4_hw.c
3451
t4_os_pci_read_cfg2(adapter, base + PCI_VPD_ADDR, &val);
sys/dev/cxgbe/common/t4_hw.c
3457
if ((val & PCI_VPD_ADDR_F) == adapter->vpd_flag) {
sys/dev/cxgbe/common/t4_hw.c
3883
int lock, u32 val)
sys/dev/cxgbe/common/t4_hw.c
3889
t4_write_reg(adapter, A_SF_DATA, val);
sys/dev/cxgbe/common/t4_hw.c
3978
unsigned int i, c, left, val, offset = addr & 0xff;
sys/dev/cxgbe/common/t4_hw.c
3983
val = swab32(addr) | SF_PROG_PAGE;
sys/dev/cxgbe/common/t4_hw.c
3986
(ret = sf1_write(adapter, 4, 1, 1, val)) != 0)
sys/dev/cxgbe/common/t4_hw.c
3991
for (val = 0, i = 0; i < c; ++i)
sys/dev/cxgbe/common/t4_hw.c
3992
val = (val << 8) + *data++;
sys/dev/cxgbe/common/t4_hw.c
3995
val = cpu_to_be32(val);
sys/dev/cxgbe/common/t4_hw.c
3997
ret = sf1_write(adapter, c, c != left, 1, val);
sys/dev/cxgbe/common/t4_hw.c
4419
c.param[0].val = cpu_to_be32(op);
sys/dev/cxgbe/common/t4_hw.c
4429
u32 cfg, val, req, rsp;
sys/dev/cxgbe/common/t4_hw.c
4435
val = t4_read_reg(adap, A_CIM_DEBUGSTS);
sys/dev/cxgbe/common/t4_hw.c
4436
req = G_POLADBGWRPTR(val);
sys/dev/cxgbe/common/t4_hw.c
4437
rsp = G_PILADBGWRPTR(val);
sys/dev/cxgbe/common/t4_hw.c
5435
u32 val, fw_err;
sys/dev/cxgbe/common/t4_hw.c
5446
val = t4_read_reg(adap, A_CIM_HOST_INT_CAUSE);
sys/dev/cxgbe/common/t4_hw.c
5447
if (val & F_TIMER0INT && (!(fw_err & F_PCIE_FW_ERR) ||
sys/dev/cxgbe/common/t4_hw.c
66
u32 val = t4_read_reg(adapter, reg);
sys/dev/cxgbe/common/t4_hw.c
68
if (!!(val & mask) == polarity) {
sys/dev/cxgbe/common/t4_hw.c
70
*valp = val;
sys/dev/cxgbe/common/t4_hw.c
7174
u32 mask, val;
sys/dev/cxgbe/common/t4_hw.c
7179
val = F_ERR_DROPPED_DB | F_ERR_EGR_CTXT_PRIO | F_DBFIFO_HP_INT |
sys/dev/cxgbe/common/t4_hw.c
7182
val = F_ERR_PCIE_ERROR0 | F_ERR_PCIE_ERROR1 | F_FATAL_WRE_LEN;
sys/dev/cxgbe/common/t4_hw.c
7183
val |= F_ERR_CPL_EXCEED_IQE_SIZE | F_ERR_INVALID_CIDX_INC |
sys/dev/cxgbe/common/t4_hw.c
7188
mask = val;
sys/dev/cxgbe/common/t4_hw.c
7189
t4_set_reg_field(adap, A_SGE_INT_ENABLE3, mask, val);
sys/dev/cxgbe/common/t4_hw.c
7392
static int rd_rss_row(struct adapter *adap, int row, u32 *val)
sys/dev/cxgbe/common/t4_hw.c
7397
F_LKPTBLROWVLD, 1, 5, 0, val);
sys/dev/cxgbe/common/t4_hw.c
7401
A_TP_RSS_LKP_TABLE, 5, 0, val);
sys/dev/cxgbe/common/t4_hw.c
7414
u32 val;
sys/dev/cxgbe/common/t4_hw.c
7419
ret = rd_rss_row(adapter, i, &val);
sys/dev/cxgbe/common/t4_hw.c
7422
*map++ = G_LKPTBLQUEUE0(val);
sys/dev/cxgbe/common/t4_hw.c
7423
*map++ = G_LKPTBLQUEUE1(val);
sys/dev/cxgbe/common/t4_hw.c
7458
c.u.addrval.val = rw ? 0 : cpu_to_be32(vals[i]);
sys/dev/cxgbe/common/t4_hw.c
7465
vals[i] = be32_to_cpu(c.u.addrval.val);
sys/dev/cxgbe/common/t4_hw.c
7668
u32 val, bool sleep_ok)
sys/dev/cxgbe/common/t4_hw.c
7670
t4_tp_pio_write(adapter, &val, 1, A_TP_RSS_PF0_CONFIG + index,
sys/dev/cxgbe/common/t4_hw.c
7820
u32 val[A_TP_MIB_TCP_RXT_SEG_LO - A_TP_MIB_TCP_OUT_RST + 1];
sys/dev/cxgbe/common/t4_hw.c
7823
#define STAT(x) val[STAT_IDX(x)]
sys/dev/cxgbe/common/t4_hw.c
7827
t4_tp_mib_read(adap, val, ARRAY_SIZE(val),
sys/dev/cxgbe/common/t4_hw.c
7835
t4_tp_mib_read(adap, val, ARRAY_SIZE(val),
sys/dev/cxgbe/common/t4_hw.c
7971
u32 val[2];
sys/dev/cxgbe/common/t4_hw.c
7979
t4_tp_mib_read(adap, val, 2, A_TP_MIB_FCOE_BYTE_0_HI + 2 * idx,
sys/dev/cxgbe/common/t4_hw.c
7982
st->octets_ddp = ((u64)val[0] << 32) | val[1];
sys/dev/cxgbe/common/t4_hw.c
7996
u32 val[4];
sys/dev/cxgbe/common/t4_hw.c
7998
t4_tp_mib_read(adap, val, 4, A_TP_MIB_USM_PKTS, sleep_ok);
sys/dev/cxgbe/common/t4_hw.c
8000
st->frames = val[0];
sys/dev/cxgbe/common/t4_hw.c
8001
st->drops = val[1];
sys/dev/cxgbe/common/t4_hw.c
8002
st->octets = ((u64)val[2] << 32) | val[3];
sys/dev/cxgbe/common/t4_hw.c
8074
unsigned int mask, unsigned int val)
sys/dev/cxgbe/common/t4_hw.c
8077
val |= t4_read_reg(adap, A_TP_PIO_DATA) & ~mask;
sys/dev/cxgbe/common/t4_hw.c
8078
t4_write_reg(adap, A_TP_PIO_DATA, val);
sys/dev/cxgbe/common/t4_hw.c
8994
u32 addr, u32 val)
sys/dev/cxgbe/common/t4_hw.c
9007
c.u.addrval.val = cpu_to_be32(val);
sys/dev/cxgbe/common/t4_hw.c
9058
unsigned int mmd, unsigned int reg, unsigned int val)
sys/dev/cxgbe/common/t4_hw.c
9072
c.u.mdio.rval = cpu_to_be16(val);
sys/dev/cxgbe/common/t4_hw.c
9421
c.val = cpu_to_be32(reset);
sys/dev/cxgbe/common/t4_hw.c
9454
c.val = cpu_to_be32(F_PIORST | F_PIORSTMODE);
sys/dev/cxgbe/common/t4_hw.c
9586
u32 *val, int rw)
sys/dev/cxgbe/common/t4_hw.c
9605
*p = cpu_to_be32(*(val + i));
sys/dev/cxgbe/common/t4_hw.c
9619
for (i = 0, p = &c.param[0].val; i < nparams; i++, p += 2)
sys/dev/cxgbe/common/t4_hw.c
9620
*val++ = be32_to_cpu(*p);
sys/dev/cxgbe/common/t4_hw.c
9627
u32 *val)
sys/dev/cxgbe/common/t4_hw.c
9629
return t4_query_params_rw(adap, mbox, pf, vf, nparams, params, val, 0);
sys/dev/cxgbe/common/t4_hw.c
9649
const u32 *val, int timeout)
sys/dev/cxgbe/common/t4_hw.c
9666
*p++ = cpu_to_be32(*val++);
sys/dev/cxgbe/common/t4_hw.c
9687
const u32 *val)
sys/dev/cxgbe/common/t4_hw.c
9689
return t4_set_params_timeout(adap, mbox, pf, vf, nparams, params, val,
sys/dev/cxgbe/common/t4_hw.c
9936
u32 val;
sys/dev/cxgbe/common/t4_hw.c
9942
val = V_FW_CMD_LEN16(1) |
sys/dev/cxgbe/common/t4_hw.c
9944
c.freemacs_to_len16 = cpu_to_be32(val);
sys/dev/cxgbe/common/t4_hw.c
9983
u32 val;
sys/dev/cxgbe/common/t4_hw.c
9989
val = V_FW_CMD_LEN16(1) |
sys/dev/cxgbe/common/t4_hw.c
9991
c.freemacs_to_len16 = cpu_to_be32(val);
sys/dev/cxgbe/common/t4_msg.h
1209
__be64 val;
sys/dev/cxgbe/common/t4_msg.h
1217
__be64 val;
sys/dev/cxgbe/common/t4vf_hw.c
50
u32 val;
sys/dev/cxgbe/common/t4vf_hw.c
52
val = t4_read_reg(adapter, whoami);
sys/dev/cxgbe/common/t4vf_hw.c
53
if (val != notready1 && val != notready2)
sys/dev/cxgbe/common/t4vf_hw.c
56
val = t4_read_reg(adapter, whoami);
sys/dev/cxgbe/common/t4vf_hw.c
57
if (val != notready1 && val != notready2)
sys/dev/cxgbe/crypto/t6_kern_tls.c
277
uint16_t word, uint64_t mask, uint64_t val)
sys/dev/cxgbe/crypto/t6_kern_tls.c
302
cpl->val = htobe64(val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2947
u32 val;
sys/dev/cxgbe/cudbg/cudbg_lib.c
2954
val = t4_read_reg(padap, A_CIM_HOST_ACC_CTRL);
sys/dev/cxgbe/cudbg/cudbg_lib.c
2955
busy = (0 != (val & CUDBG_CIM_BUSY_BIT));
sys/dev/cxgbe/cudbg/cudbg_lib.c
2965
static int cim_ha_rreg(struct adapter *padap, u32 addr, u32 *val)
sys/dev/cxgbe/cudbg/cudbg_lib.c
2978
*val = t4_read_reg(padap, A_CIM_HOST_ACC_DATA);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3299
u32 para[7], val[7];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3349
rc = t4_query_params(padap, mbox, pf, 0, 7, para, val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3361
rc = t4_query_params(padap, mbox, pf, 0, 7, para, val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3372
tid->ftid_base = val[0];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3373
tid->nftids = val[1] - val[0] + 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3375
if (val[2] != val[3]) {
sys/dev/cxgbe/cudbg/cudbg_lib.c
3379
tid->aftid_base = val[2];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3380
tid->aftid_end = val[3];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3382
tid->ntids = val[4];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3384
tid->stid_base = val[5];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3385
tid->nstids = val[6] - val[5] + 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3390
rc = t4_query_params(padap, mbox, pf, 0, 2, para, val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3396
tid->hpftid_base = val[0];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3397
tid->nhpftids = val[1] - val[0] + 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3410
rc = t4_query_params(padap, mbox, pf, 0, 2, para, val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3416
if (val[0] != val[1]) {
sys/dev/cxgbe/cudbg/cudbg_lib.c
3417
tid->uotid_base = val[0];
sys/dev/cxgbe/cudbg/cudbg_lib.c
3418
tid->nuotids = val[1] - val[0] + 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3515
u64 tcamy, tcamx, val;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3546
val = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3547
tcamy = G_DMACH(val) << 32;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3562
G_VIDL(val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3566
tcam->ivlan = G_VIDL(val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3574
val = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3575
tcamx = G_DMACH(val) << 32;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3583
G_VIDL(val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3715
u32 val;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3722
val = (0x4 << S_DBGICMD) | tid;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3723
t4_write_reg(padap, A_LE_DB_DBGI_REQ_TCAM_CMD, val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3724
tid_data->dbig_cmd = val;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3726
val = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3727
val |= 1 << S_DBGICMDSTRT;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3728
val |= 1; /* LE mode */
sys/dev/cxgbe/cudbg/cudbg_lib.c
3729
t4_write_reg(padap, A_LE_DB_DBGI_CONFIG, val);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3730
tid_data->dbig_conf = val;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3733
val = 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3734
while (val) {
sys/dev/cxgbe/cudbg/cudbg_lib.c
3735
val = t4_read_reg(padap, A_LE_DB_DBGI_CONFIG);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3736
val = (val >> S_DBGICMDBUSY) & 1;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3747
val = 0;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3748
val = t4_read_reg(padap, A_LE_DB_DBGI_RSP_STATUS);
sys/dev/cxgbe/cudbg/cudbg_lib.c
3749
tid_data->dbig_rsp_stat = val;
sys/dev/cxgbe/cudbg/cudbg_lib.c
3750
if (!(val & 1)) {
sys/dev/cxgbe/cxgbei/cxgbei.c
458
u_int pdu_len, val;
sys/dev/cxgbe/cxgbei/cxgbei.c
469
val = be32toh(cpl->ddpvld);
sys/dev/cxgbe/cxgbei/cxgbei.c
474
__func__, tid, pdu_len, val, icp->icp_flags);
sys/dev/cxgbe/cxgbei/cxgbei.c
479
if (val & F_DDP_PADDING_ERR) {
sys/dev/cxgbe/cxgbei/cxgbei.c
484
if (val & F_DDP_HDRCRC_ERR) {
sys/dev/cxgbe/cxgbei/cxgbei.c
489
if (val & F_DDP_DATACRC_ERR) {
sys/dev/cxgbe/cxgbei/cxgbei.c
494
if (val & F_DDP_PDU && ip->ip_data_mbuf == NULL) {
sys/dev/cxgbe/cxgbei/cxgbei.c
553
if ((val & (F_DDP_PADDING_ERR | F_DDP_HDRCRC_ERR |
sys/dev/cxgbe/cxgbei/cxgbei.c
601
u_int val = be32toh(cpl->ddpvld);
sys/dev/cxgbe/cxgbei/cxgbei.c
608
if ((val & F_DDP_PDU) == 0) {
sys/dev/cxgbe/cxgbei/cxgbei.c
626
__func__, tid, pdu_len, val, icp);
sys/dev/cxgbe/cxgbei/cxgbei.c
639
if (val & F_DDP_PADDING_ERR) {
sys/dev/cxgbe/cxgbei/cxgbei.c
644
if (val & F_DDP_HDRCRC_ERR) {
sys/dev/cxgbe/cxgbei/cxgbei.c
649
if (val & F_DDP_DATACRC_ERR) {
sys/dev/cxgbe/cxgbei/cxgbei.c
693
if ((val & (F_DDP_PADDING_ERR | F_DDP_HDRCRC_ERR |
sys/dev/cxgbe/cxgbei/cxgbei.c
710
if (val & F_DDP_PDU && ip->ip_data_mbuf == NULL) {
sys/dev/cxgbe/cxgbei/icl_cxgbei.c
1000
val = V_TCB_ULP_TYPE(ULP_MODE_ISCSI) | V_TCB_ULP_RAW(ulp_submode);
sys/dev/cxgbe/cxgbei/icl_cxgbei.c
1002
V_TCB_ULP_TYPE(M_TCB_ULP_TYPE) | V_TCB_ULP_RAW(M_TCB_ULP_RAW), val,
sys/dev/cxgbe/cxgbei/icl_cxgbei.c
1005
val = V_TF_RX_FLOW_CONTROL_DISABLE(1ULL);
sys/dev/cxgbe/cxgbei/icl_cxgbei.c
1006
t4_set_tcb_field(sc, toep->ctrlq, toep, W_TCB_T_FLAGS, val, val, 0, 0);
sys/dev/cxgbe/cxgbei/icl_cxgbei.c
995
uint64_t val;
sys/dev/cxgbe/firmware/t4fw_interface.h
1073
__be32 val;
sys/dev/cxgbe/firmware/t4fw_interface.h
10757
__u8 val[6];
sys/dev/cxgbe/firmware/t4fw_interface.h
5397
__be32 val;
sys/dev/cxgbe/firmware/t4fw_interface.h
5482
__u8 val[33];
sys/dev/cxgbe/firmware/t4fw_interface.h
5605
__be32 val;
sys/dev/cxgbe/firmware/t4fw_interface.h
6223
__be32 val;
sys/dev/cxgbe/iw_cxgbe/cm.c
2973
uint64_t val = be64toh(*rpl);
sys/dev/cxgbe/iw_cxgbe/cm.c
2977
ret = (int)((val >> 8) & 0xff);
sys/dev/cxgbe/iw_cxgbe/t4.h
568
static inline void write_gts(struct t4_cq *cq, u32 val)
sys/dev/cxgbe/iw_cxgbe/t4.h
570
writel(val | V_INGRESSQID(cq->bar2_qid),
sys/dev/cxgbe/iw_cxgbe/t4.h
581
u32 val;
sys/dev/cxgbe/iw_cxgbe/t4.h
585
val = SEINTARM(0) | CIDXINC(CIDXINC_MASK) | TIMERREG(7);
sys/dev/cxgbe/iw_cxgbe/t4.h
586
writel(val | V_INGRESSQID(cq->bar2_qid),
sys/dev/cxgbe/iw_cxgbe/t4.h
590
val = SEINTARM(se) | CIDXINC(cq->cidx_inc) | TIMERREG(6);
sys/dev/cxgbe/iw_cxgbe/t4.h
591
writel(val | V_INGRESSQID(cq->bar2_qid),
sys/dev/cxgbe/iw_cxgbe/t4.h
622
u32 val;
sys/dev/cxgbe/iw_cxgbe/t4.h
624
val = SEINTARM(0) | CIDXINC(cq->cidx_inc) | TIMERREG(7);
sys/dev/cxgbe/iw_cxgbe/t4.h
625
write_gts(cq, val);
sys/dev/cxgbe/nvmf/nvmf_che.c
2351
uint64_t val)
sys/dev/cxgbe/nvmf/nvmf_che.c
2355
t4_set_tcb_field(sc, &toep->ofld_txq->wrq, toep, word, mask, val, 0, 0);
sys/dev/cxgbe/nvmf/nvmf_che.c
2361
uint64_t val;
sys/dev/cxgbe/nvmf/nvmf_che.c
2366
val = V_TCB_ULP_TYPE(ULP_MODE_NVMET) | V_TCB_ULP_RAW(ulp_submode);
sys/dev/cxgbe/nvmf/nvmf_che.c
2368
V_TCB_ULP_TYPE(M_TCB_ULP_TYPE) | V_TCB_ULP_RAW(M_TCB_ULP_RAW), val);
sys/dev/cxgbe/nvmf/nvmf_che.c
2370
val = V_TF_RX_FLOW_CONTROL_DISABLE(1ULL);
sys/dev/cxgbe/nvmf/nvmf_che.c
2371
t4_nvme_set_tcb_field(toep, W_TCB_T_FLAGS, val, val);
sys/dev/cxgbe/nvmf/nvmf_che.c
2373
val = V_TCB_RSVD((rxpda / 4) - 1);
sys/dev/cxgbe/nvmf/nvmf_che.c
2374
t4_nvme_set_tcb_field(toep, W_TCB_RSVD, V_TCB_RSVD(M_TCB_RSVD), val);
sys/dev/cxgbe/nvmf/nvmf_che.c
2377
val = 0;
sys/dev/cxgbe/nvmf/nvmf_che.c
2379
V_TCB_CMP_IMM_SZ(M_TCB_CMP_IMM_SZ), val);
sys/dev/cxgbe/nvmf/nvmf_che.c
3145
uint32_t val;
sys/dev/cxgbe/nvmf/nvmf_che.c
3152
val = t4_read_reg(sc, A_SGE_CONTROL2);
sys/dev/cxgbe/nvmf/nvmf_che.c
3153
nca->nvmt_data_iqe = (val & F_RXCPLMODE_NVMT) != 0;
sys/dev/cxgbe/t4_clip.c
822
int rc, val;
sys/dev/cxgbe/t4_clip.c
824
val = t4_clip_db_auto;
sys/dev/cxgbe/t4_clip.c
825
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/cxgbe/t4_clip.c
829
if (val == 0 || val == 1)
sys/dev/cxgbe/t4_clip.c
830
t4_clip_db_auto = val;
sys/dev/cxgbe/t4_filter.c
1002
*ftuple |= SFF(fs->val.matchtype, tp->matchtype_shift);
sys/dev/cxgbe/t4_filter.c
1006
*ftuple |= SFF(fs->val.frag, tp->frag_shift);
sys/dev/cxgbe/t4_filter.c
1010
*ftuple |= SFF(fs->val.roce, tp->roce_shift);
sys/dev/cxgbe/t4_filter.c
1014
*ftuple |= SFF(fs->val.synonly, tp->synonly_shift);
sys/dev/cxgbe/t4_filter.c
1018
*ftuple |= SFF(fs->val.tcpflags, tp->synonly_shift);
sys/dev/cxgbe/t4_filter.c
1031
*ftuple |= SFF(fs->val.fcoe, tp->fcoe_shift);
sys/dev/cxgbe/t4_filter.c
1035
*ftuple |= (uint64_t)fs->val.iport << tp->port_shift;
sys/dev/cxgbe/t4_filter.c
1048
*ftuple |= SFF(F_FT_VNID_ID_VLD | fs->val.vnic, tp->vnic_shift);
sys/dev/cxgbe/t4_filter.c
1052
*ftuple |= SFF(F_FT_VLAN_VLD | fs->val.vlan, tp->vlan_shift);
sys/dev/cxgbe/t4_filter.c
1056
*ftuple |= SFF(fs->val.tos, tp->tos_shift);
sys/dev/cxgbe/t4_filter.c
1060
*ftuple |= SFF(fs->val.proto, tp->protocol_shift);
sys/dev/cxgbe/t4_filter.c
1064
*ftuple |= SFF(fs->val.ethtype, tp->ethertype_shift);
sys/dev/cxgbe/t4_filter.c
1068
*ftuple |= SFF(fs->val.macidx, tp->macmatch_shift);
sys/dev/cxgbe/t4_filter.c
1072
*ftuple |= SFF(fs->val.matchtype, tp->matchtype_shift);
sys/dev/cxgbe/t4_filter.c
1076
*ftuple |= SFF(fs->val.frag, tp->frag_shift);
sys/dev/cxgbe/t4_filter.c
1161
if (t->fs.val.iport >= sc->params.nports)
sys/dev/cxgbe/t4_filter.c
1390
uint64_t val, int no_reply)
sys/dev/cxgbe/t4_filter.c
1415
req->val = htobe64(val);
sys/dev/cxgbe/t4_filter.c
1423
set_tcb_tflag(struct adapter *sc, int tid, u_int bit_pos, u_int val,
sys/dev/cxgbe/t4_filter.c
1428
(uint64_t)val << bit_pos, no_reply));
sys/dev/cxgbe/t4_filter.c
1737
cpl->local_port = htobe16(f->fs.val.dport);
sys/dev/cxgbe/t4_filter.c
1738
cpl->peer_port = htobe16(f->fs.val.sport);
sys/dev/cxgbe/t4_filter.c
1739
cpl->local_ip_hi = *(uint64_t *)(&f->fs.val.dip);
sys/dev/cxgbe/t4_filter.c
1740
cpl->local_ip_lo = *(((uint64_t *)&f->fs.val.dip) + 1);
sys/dev/cxgbe/t4_filter.c
1741
cpl->peer_ip_hi = *(uint64_t *)(&f->fs.val.sip);
sys/dev/cxgbe/t4_filter.c
1742
cpl->peer_ip_lo = *(((uint64_t *)&f->fs.val.sip) + 1);
sys/dev/cxgbe/t4_filter.c
1781
cpl->local_port = htobe16(f->fs.val.dport);
sys/dev/cxgbe/t4_filter.c
1782
cpl->peer_port = htobe16(f->fs.val.sport);
sys/dev/cxgbe/t4_filter.c
1783
cpl->local_ip = f->fs.val.dip[0] | f->fs.val.dip[1] << 8 |
sys/dev/cxgbe/t4_filter.c
1784
f->fs.val.dip[2] << 16 | f->fs.val.dip[3] << 24;
sys/dev/cxgbe/t4_filter.c
1785
cpl->peer_ip = f->fs.val.sip[0] | f->fs.val.sip[1] << 8 |
sys/dev/cxgbe/t4_filter.c
1786
f->fs.val.sip[2] << 16 | f->fs.val.sip[3] << 24;
sys/dev/cxgbe/t4_filter.c
1844
MPASS((t->fs.val.pfvf_vld & t->fs.val.ovlan_vld) == 0);
sys/dev/cxgbe/t4_filter.c
225
if (bcmp(&fs1->val.sip[0], &fs2->val.sip[0], n) ||
sys/dev/cxgbe/t4_filter.c
226
bcmp(&fs1->val.dip[0], &fs2->val.dip[0], n) ||
sys/dev/cxgbe/t4_filter.c
227
fs1->val.sport != fs2->val.sport ||
sys/dev/cxgbe/t4_filter.c
228
fs1->val.dport != fs2->val.dport)
sys/dev/cxgbe/t4_filter.c
237
fs1->val.vnic != fs2->val.vnic)
sys/dev/cxgbe/t4_filter.c
239
if (fs1->mask.vlan_vld && fs1->val.vlan != fs2->val.vlan)
sys/dev/cxgbe/t4_filter.c
241
if (fs1->mask.macidx && fs1->val.macidx != fs2->val.macidx)
sys/dev/cxgbe/t4_filter.c
243
if (fs1->mask.frag && fs1->val.frag != fs2->val.frag)
sys/dev/cxgbe/t4_filter.c
245
if (fs1->mask.matchtype && fs1->val.matchtype != fs2->val.matchtype)
sys/dev/cxgbe/t4_filter.c
247
if (fs1->mask.iport && fs1->val.iport != fs2->val.iport)
sys/dev/cxgbe/t4_filter.c
249
if (fs1->mask.fcoe && fs1->val.fcoe != fs2->val.fcoe)
sys/dev/cxgbe/t4_filter.c
251
if (fs1->mask.proto && fs1->val.proto != fs2->val.proto)
sys/dev/cxgbe/t4_filter.c
253
if (fs1->mask.tos && fs1->val.tos != fs2->val.tos)
sys/dev/cxgbe/t4_filter.c
255
if (fs1->mask.ethtype && fs1->val.ethtype != fs2->val.ethtype)
sys/dev/cxgbe/t4_filter.c
430
if (fs->val.tcpflags || fs->mask.tcpflags)
sys/dev/cxgbe/t4_filter.c
432
if (fs->val.synonly || fs->mask.synonly)
sys/dev/cxgbe/t4_filter.c
434
if (fs->val.roce || fs->mask.roce)
sys/dev/cxgbe/t4_filter.c
436
if (fs->val.frag || fs->mask.frag)
sys/dev/cxgbe/t4_filter.c
438
if (fs->val.matchtype || fs->mask.matchtype)
sys/dev/cxgbe/t4_filter.c
440
if (fs->val.macidx || fs->mask.macidx)
sys/dev/cxgbe/t4_filter.c
442
if (fs->val.ethtype || fs->mask.ethtype)
sys/dev/cxgbe/t4_filter.c
444
if (fs->val.proto || fs->mask.proto)
sys/dev/cxgbe/t4_filter.c
446
if (fs->val.tos || fs->mask.tos)
sys/dev/cxgbe/t4_filter.c
448
if (fs->val.vlan_vld || fs->mask.vlan_vld)
sys/dev/cxgbe/t4_filter.c
450
if (fs->val.ovlan_vld || fs->mask.ovlan_vld) {
sys/dev/cxgbe/t4_filter.c
455
if (fs->val.pfvf_vld || fs->mask.pfvf_vld) {
sys/dev/cxgbe/t4_filter.c
461
if (fs->val.encap_vld || fs->mask.encap_vld) {
sys/dev/cxgbe/t4_filter.c
467
if (fs->val.iport || fs->mask.iport)
sys/dev/cxgbe/t4_filter.c
469
if (fs->val.fcoe || fs->mask.fcoe)
sys/dev/cxgbe/t4_filter.c
471
if (fs->val.ipsecidx || fs->mask.ipsecidx)
sys/dev/cxgbe/t4_filter.c
474
if (fs->val.tcpflags || fs->mask.tcpflags ||
sys/dev/cxgbe/t4_filter.c
475
fs->val.synonly || fs->mask.synonly ||
sys/dev/cxgbe/t4_filter.c
476
fs->val.roce || fs->mask.roce ||
sys/dev/cxgbe/t4_filter.c
477
fs->val.ipsecidx || fs->mask.ipsecidx)
sys/dev/cxgbe/t4_filter.c
479
if (fs->val.frag || fs->mask.frag)
sys/dev/cxgbe/t4_filter.c
481
if (fs->val.matchtype || fs->mask.matchtype)
sys/dev/cxgbe/t4_filter.c
483
if (fs->val.macidx || fs->mask.macidx)
sys/dev/cxgbe/t4_filter.c
485
if (fs->val.ethtype || fs->mask.ethtype)
sys/dev/cxgbe/t4_filter.c
487
if (fs->val.proto || fs->mask.proto)
sys/dev/cxgbe/t4_filter.c
489
if (fs->val.tos || fs->mask.tos)
sys/dev/cxgbe/t4_filter.c
491
if (fs->val.vlan_vld || fs->mask.vlan_vld)
sys/dev/cxgbe/t4_filter.c
493
if (fs->val.ovlan_vld || fs->mask.ovlan_vld) {
sys/dev/cxgbe/t4_filter.c
498
if (fs->val.pfvf_vld || fs->mask.pfvf_vld) {
sys/dev/cxgbe/t4_filter.c
504
if (fs->val.encap_vld || fs->mask.encap_vld) {
sys/dev/cxgbe/t4_filter.c
510
if (fs->val.iport || fs->mask.iport)
sys/dev/cxgbe/t4_filter.c
512
if (fs->val.fcoe || fs->mask.fcoe)
sys/dev/cxgbe/t4_filter.c
781
MPASS((t->fs.val.pfvf_vld & t->fs.val.ovlan_vld) == 0);
sys/dev/cxgbe/t4_filter.c
834
if (t->fs.val.pfvf_vld || t->fs.val.ovlan_vld)
sys/dev/cxgbe/t4_filter.c
86
struct t4_filter_tuple *ft = &fs->val;
sys/dev/cxgbe/t4_filter.c
871
fwr->ethtype = htobe16(f->fs.val.ethtype);
sys/dev/cxgbe/t4_filter.c
874
(V_FW_FILTER_WR_FRAG(f->fs.val.frag) |
sys/dev/cxgbe/t4_filter.c
876
V_FW_FILTER_WR_IVLAN_VLD(f->fs.val.vlan_vld) |
sys/dev/cxgbe/t4_filter.c
884
htobe32(V_FW_FILTER_WR_MACI(f->fs.val.macidx) |
sys/dev/cxgbe/t4_filter.c
886
V_FW_FILTER_WR_FCOE(f->fs.val.fcoe) |
sys/dev/cxgbe/t4_filter.c
888
V_FW_FILTER_WR_PORT(f->fs.val.iport) |
sys/dev/cxgbe/t4_filter.c
890
V_FW_FILTER_WR_MATCHTYPE(f->fs.val.matchtype) |
sys/dev/cxgbe/t4_filter.c
892
fwr->ptcl = f->fs.val.proto;
sys/dev/cxgbe/t4_filter.c
894
fwr->ttyp = f->fs.val.tos;
sys/dev/cxgbe/t4_filter.c
896
fwr->ivlan = htobe16(f->fs.val.vlan);
sys/dev/cxgbe/t4_filter.c
898
fwr->ovlan = htobe16(f->fs.val.vnic);
sys/dev/cxgbe/t4_filter.c
900
bcopy(f->fs.val.dip, fwr->lip, sizeof (fwr->lip));
sys/dev/cxgbe/t4_filter.c
902
bcopy(f->fs.val.sip, fwr->fip, sizeof (fwr->fip));
sys/dev/cxgbe/t4_filter.c
904
fwr->lp = htobe16(f->fs.val.dport);
sys/dev/cxgbe/t4_filter.c
906
fwr->fp = htobe16(f->fs.val.sport);
sys/dev/cxgbe/t4_filter.c
957
*ftuple |= SFF(fs->val.ipsecidx, tp->ipsecidx_shift);
sys/dev/cxgbe/t4_filter.c
961
*ftuple |= SFF(fs->val.fcoe, tp->fcoe_shift);
sys/dev/cxgbe/t4_filter.c
965
*ftuple |= (uint64_t)fs->val.iport << tp->port_shift;
sys/dev/cxgbe/t4_filter.c
978
*ftuple |= SFF(F_FT_VNID_ID_VLD | fs->val.vnic, tp->vnic_shift);
sys/dev/cxgbe/t4_filter.c
982
*ftuple |= SFF(F_FT_VLAN_VLD | fs->val.vlan, tp->vlan_shift);
sys/dev/cxgbe/t4_filter.c
986
*ftuple |= SFF(fs->val.tos, tp->tos_shift);
sys/dev/cxgbe/t4_filter.c
990
*ftuple |= SFF(fs->val.proto, tp->protocol_shift);
sys/dev/cxgbe/t4_filter.c
994
*ftuple |= SFF(fs->val.ethtype, tp->ethertype_shift);
sys/dev/cxgbe/t4_filter.c
998
*ftuple |= SFF(fs->val.macidx, tp->macmatch_shift);
sys/dev/cxgbe/t4_ioctl.h
251
struct t4_filter_tuple val;
sys/dev/cxgbe/t4_ioctl.h
73
uint64_t val;
sys/dev/cxgbe/t4_main.c
10962
uint64_t tcamx, tcamy, val, mask;
sys/dev/cxgbe/t4_main.c
10976
val = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);
sys/dev/cxgbe/t4_main.c
10977
tcamy = G_DMACH(val) << 32;
sys/dev/cxgbe/t4_main.c
10990
(G_DATAVIDH1(data2) << 16) | G_VIDL(val);
sys/dev/cxgbe/t4_main.c
10997
ivlan = G_VIDL(val);
sys/dev/cxgbe/t4_main.c
11006
val = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11007
tcamx = G_DMACH(val) << 32;
sys/dev/cxgbe/t4_main.c
11018
(G_DATAVIDH1(data2) << 16) | G_VIDL(val);
sys/dev/cxgbe/t4_main.c
11142
uint64_t tcamx, tcamy, val, mask;
sys/dev/cxgbe/t4_main.c
11170
val = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA1_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11171
tcamy = G_DMACH(val) << 32;
sys/dev/cxgbe/t4_main.c
11184
G_DATAVIDH1(data2)) << 16) | G_VIDL(val);
sys/dev/cxgbe/t4_main.c
11191
ivlan = G_VIDL(val);
sys/dev/cxgbe/t4_main.c
11200
val = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA1_REQ_ID1);
sys/dev/cxgbe/t4_main.c
11201
tcamx = G_DMACH(val) << 32;
sys/dev/cxgbe/t4_main.c
11212
G_DATAVIDH1(data2)) << 16) | G_VIDL(val);
sys/dev/cxgbe/t4_main.c
12192
u_int val;
sys/dev/cxgbe/t4_main.c
12195
val = atomic_load_int(&sc->num_resets);
sys/dev/cxgbe/t4_main.c
12196
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/cxgbe/t4_main.c
12200
if (val == 0) {
sys/dev/cxgbe/t4_main.c
12206
if (val != 1)
sys/dev/cxgbe/t4_main.c
12220
u_int val, v;
sys/dev/cxgbe/t4_main.c
12231
val = v & F_GLFL ? 0 : 1;
sys/dev/cxgbe/t4_main.c
12232
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/cxgbe/t4_main.c
12235
if (val == 0)
sys/dev/cxgbe/t4_main.c
12287
unit_conv(char *buf, size_t len, u_int val, u_int factor)
sys/dev/cxgbe/t4_main.c
12289
u_int rem = val % factor;
sys/dev/cxgbe/t4_main.c
12292
snprintf(buf, len, "%u", val / factor);
sys/dev/cxgbe/t4_main.c
12296
snprintf(buf, len, "%u.%u", val / factor, rem);
sys/dev/cxgbe/t4_main.c
13271
edata->val = t4_read_reg(sc, edata->addr);
sys/dev/cxgbe/t4_main.c
13273
edata->val = t4_read_reg64(sc, edata->addr);
sys/dev/cxgbe/t4_main.c
13290
if (edata->val & 0xffffffff00000000)
sys/dev/cxgbe/t4_main.c
13292
t4_write_reg(sc, edata->addr, (uint32_t) edata->val);
sys/dev/cxgbe/t4_main.c
13294
t4_write_reg64(sc, edata->addr, edata->val);
sys/dev/cxgbe/t4_main.c
2069
uint32_t val;
sys/dev/cxgbe/t4_main.c
2090
val = t4_read_reg(sc, A_PL_WHOAMI);
sys/dev/cxgbe/t4_main.c
2091
if (val == 0xffffffff || val == 0xeeeeeeee) {
sys/dev/cxgbe/t4_main.c
3832
uint32_t param, val;
sys/dev/cxgbe/t4_main.c
3867
rc = t4_query_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
3871
MPASS((val >> 16) == vi->rss_size);
sys/dev/cxgbe/t4_main.c
3872
vi->rss_base = val & 0xffff;
sys/dev/cxgbe/t4_main.c
4160
uint32_t pf, reg, val;
sys/dev/cxgbe/t4_main.c
4175
val = (mw->mw_curpos >> X_T7_MEMOFST_SHIFT) | pf;
sys/dev/cxgbe/t4_main.c
4178
val = mw->mw_curpos | pf;
sys/dev/cxgbe/t4_main.c
4180
t4_write_reg(sc, reg, val);
sys/dev/cxgbe/t4_main.c
4185
rw_via_memwin(struct adapter *sc, int idx, uint32_t addr, uint32_t *val,
sys/dev/cxgbe/t4_main.c
4217
*val++ = le32toh(v);
sys/dev/cxgbe/t4_main.c
4219
v = *val++;
sys/dev/cxgbe/t4_main.c
5343
uint32_t mtype, moff, finicsum, cfcsum, param, val;
sys/dev/cxgbe/t4_main.c
5372
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
5379
mtype = G_FW_PARAMS_PARAM_Y(val);
sys/dev/cxgbe/t4_main.c
5380
moff = G_FW_PARAMS_PARAM_Z(val) << 16;
sys/dev/cxgbe/t4_main.c
5522
uint32_t param[2], val[2];
sys/dev/cxgbe/t4_main.c
5552
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val);
sys/dev/cxgbe/t4_main.c
5559
sc->params.portvec = val[0];
sys/dev/cxgbe/t4_main.c
5560
sc->params.nports = bitcount32(val[0]);
sys/dev/cxgbe/t4_main.c
5561
sc->params.vpd.cclk = val[1];
sys/dev/cxgbe/t4_main.c
5583
uint32_t param, val;
sys/dev/cxgbe/t4_main.c
5587
val = 1;
sys/dev/cxgbe/t4_main.c
5588
rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
5601
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
5602
if (rc == 0 && val == 1) {
sys/dev/cxgbe/t4_main.c
5604
&val);
sys/dev/cxgbe/t4_main.c
5614
val = 1;
sys/dev/cxgbe/t4_main.c
5615
rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
5616
if (rc == 0 && val == 1)
sys/dev/cxgbe/t4_main.c
5632
uint32_t param[7], val[7];
sys/dev/cxgbe/t4_main.c
5644
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 7, param, val);
sys/dev/cxgbe/t4_main.c
5651
sc->sge.iq_start = val[0];
sys/dev/cxgbe/t4_main.c
5652
sc->sge.eq_start = val[1];
sys/dev/cxgbe/t4_main.c
5653
if ((int)val[3] > (int)val[2]) {
sys/dev/cxgbe/t4_main.c
5654
sc->tids.ftid_base = val[2];
sys/dev/cxgbe/t4_main.c
5655
sc->tids.ftid_end = val[3];
sys/dev/cxgbe/t4_main.c
5656
sc->tids.nftids = val[3] - val[2] + 1;
sys/dev/cxgbe/t4_main.c
5658
sc->vres.l2t.start = val[4];
sys/dev/cxgbe/t4_main.c
5659
sc->vres.l2t.size = val[5] - val[4] + 1;
sys/dev/cxgbe/t4_main.c
5662
MPASS(fls(val[5]) <= S_SYNC_WR);
sys/dev/cxgbe/t4_main.c
5663
sc->params.core_vdd = val[6];
sys/dev/cxgbe/t4_main.c
5667
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val);
sys/dev/cxgbe/t4_main.c
5673
MPASS((int)val[0] >= sc->sge.iq_start);
sys/dev/cxgbe/t4_main.c
5674
sc->sge.iqmap_sz = val[0] - sc->sge.iq_start + 1;
sys/dev/cxgbe/t4_main.c
5675
MPASS((int)val[1] >= sc->sge.eq_start);
sys/dev/cxgbe/t4_main.c
5676
sc->sge.eqmap_sz = val[1] - sc->sge.eq_start + 1;
sys/dev/cxgbe/t4_main.c
5685
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val);
sys/dev/cxgbe/t4_main.c
5691
if ((int)val[1] > (int)val[0]) {
sys/dev/cxgbe/t4_main.c
5692
sc->tids.hpftid_base = val[0];
sys/dev/cxgbe/t4_main.c
5693
sc->tids.hpftid_end = val[1];
sys/dev/cxgbe/t4_main.c
5694
sc->tids.nhpftids = val[1] - val[0] + 1;
sys/dev/cxgbe/t4_main.c
5706
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val);
sys/dev/cxgbe/t4_main.c
5712
if ((int)val[1] > (int)val[0]) {
sys/dev/cxgbe/t4_main.c
5713
sc->rawf_base = val[0];
sys/dev/cxgbe/t4_main.c
5714
sc->nrawf = val[1] - val[0] + 1;
sys/dev/cxgbe/t4_main.c
5720
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5721
sc->params.tid_qid_sel_mask = rc == 0 ? val[0] : 0;
sys/dev/cxgbe/t4_main.c
5734
val[0] = 0;
sys/dev/cxgbe/t4_main.c
5735
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5737
sc->params.mps_bg_map = val[0];
sys/dev/cxgbe/t4_main.c
5742
val[0] = 0;
sys/dev/cxgbe/t4_main.c
5743
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5745
sc->params.tp_ch_map = val[0];
sys/dev/cxgbe/t4_main.c
5750
val[0] = 0;
sys/dev/cxgbe/t4_main.c
5751
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5753
sc->params.tx_tp_ch_map = val[0];
sys/dev/cxgbe/t4_main.c
5761
val[0] = 0;
sys/dev/cxgbe/t4_main.c
5762
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5764
sc->params.filter2_wr_support = val[0] != 0;
sys/dev/cxgbe/t4_main.c
5772
val[0] = 0;
sys/dev/cxgbe/t4_main.c
5773
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5775
sc->params.ulptx_memwrite_dsgl = val[0] != 0;
sys/dev/cxgbe/t4_main.c
5781
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5783
sc->params.fr_nsmr_tpte_wr_support = val[0] != 0;
sys/dev/cxgbe/t4_main.c
5789
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5791
sc->params.dev_512sgl_mr = val[0] != 0;
sys/dev/cxgbe/t4_main.c
5796
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5798
sc->params.max_pkts_per_eth_tx_pkts_wr = val[0];
sys/dev/cxgbe/t4_main.c
5803
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5805
MPASS(val[0] > 0 && val[0] < 256); /* nsched_cls is 8b */
sys/dev/cxgbe/t4_main.c
5806
sc->params.nsched_cls = val[0];
sys/dev/cxgbe/t4_main.c
5842
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
sys/dev/cxgbe/t4_main.c
5848
sc->tids.ntids = val[0];
sys/dev/cxgbe/t4_main.c
5860
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 3, param, val);
sys/dev/cxgbe/t4_main.c
5866
if ((int)val[1] > (int)val[0]) {
sys/dev/cxgbe/t4_main.c
5867
sc->tids.etid_base = val[0];
sys/dev/cxgbe/t4_main.c
5868
sc->tids.etid_end = val[1];
sys/dev/cxgbe/t4_main.c
5869
sc->tids.netids = val[1] - val[0] + 1;
sys/dev/cxgbe/t4_main.c
5870
sc->params.eo_wr_cred = val[2];
sys/dev/cxgbe/t4_main.c
5882
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val);
sys/dev/cxgbe/t4_main.c
5888
sc->tids.ntids = val[0];
sys/dev/cxgbe/t4_main.c
5894
if ((int)val[2] > (int)val[1]) {
sys/dev/cxgbe/t4_main.c
5895
sc->tids.stid_base = val[1];
sys/dev/cxgbe/t4_main.c
5896
sc->tids.nstids = val[2] - val[1] + 1;
sys/dev/cxgbe/t4_main.c
5898
sc->vres.ddp.start = val[3];
sys/dev/cxgbe/t4_main.c
5899
sc->vres.ddp.size = val[4] - val[3] + 1;
sys/dev/cxgbe/t4_main.c
5900
sc->params.ofldq_wr_cred = val[5];
sys/dev/cxgbe/t4_main.c
5920
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 4, param, val);
sys/dev/cxgbe/t4_main.c
5926
sc->vres.stag.start = val[0];
sys/dev/cxgbe/t4_main.c
5927
sc->vres.stag.size = val[1] - val[0] + 1;
sys/dev/cxgbe/t4_main.c
5928
sc->vres.pbl.start = val[2];
sys/dev/cxgbe/t4_main.c
5929
sc->vres.pbl.size = val[3] - val[2] + 1;
sys/dev/cxgbe/t4_main.c
5938
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val);
sys/dev/cxgbe/t4_main.c
5944
sc->vres.rq.start = val[0];
sys/dev/cxgbe/t4_main.c
5945
sc->vres.rq.size = val[1] - val[0] + 1;
sys/dev/cxgbe/t4_main.c
5946
sc->vres.qp.start = val[2];
sys/dev/cxgbe/t4_main.c
5947
sc->vres.qp.size = val[3] - val[2] + 1;
sys/dev/cxgbe/t4_main.c
5948
sc->vres.cq.start = val[4];
sys/dev/cxgbe/t4_main.c
5949
sc->vres.cq.size = val[5] - val[4] + 1;
sys/dev/cxgbe/t4_main.c
5957
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 6, param, val);
sys/dev/cxgbe/t4_main.c
5963
sc->vres.ocq.start = val[0];
sys/dev/cxgbe/t4_main.c
5964
sc->vres.ocq.size = val[1] - val[0] + 1;
sys/dev/cxgbe/t4_main.c
5965
sc->vres.srq.start = val[2];
sys/dev/cxgbe/t4_main.c
5966
sc->vres.srq.size = val[3] - val[2] + 1;
sys/dev/cxgbe/t4_main.c
5967
sc->params.max_ordird_qp = val[4];
sys/dev/cxgbe/t4_main.c
5968
sc->params.max_ird_adapter = val[5];
sys/dev/cxgbe/t4_main.c
5973
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val);
sys/dev/cxgbe/t4_main.c
5979
sc->vres.iscsi.start = val[0];
sys/dev/cxgbe/t4_main.c
5980
sc->vres.iscsi.size = val[1] - val[0] + 1;
sys/dev/cxgbe/t4_main.c
5985
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 2, param, val);
sys/dev/cxgbe/t4_main.c
5991
sc->vres.key.start = val[0];
sys/dev/cxgbe/t4_main.c
5992
sc->vres.key.size = val[1] - val[0] + 1;
sys/dev/cxgbe/t4_main.c
6058
uint32_t mask, param, val;
sys/dev/cxgbe/t4_main.c
6065
val = 1;
sys/dev/cxgbe/t4_main.c
6066
(void)t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
6070
val = 1;
sys/dev/cxgbe/t4_main.c
6071
if (t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val) == 0)
sys/dev/cxgbe/t4_main.c
6075
val = 1 << (G_MASKSIZE(t4_read_reg(sc, A_TP_RSS_CONFIG_TNL)) - 1);
sys/dev/cxgbe/t4_main.c
6077
V_MASKFILTER(val - 1));
sys/dev/cxgbe/t4_main.c
6083
val = 0;
sys/dev/cxgbe/t4_main.c
6087
val |= F_DROPERRORATTACK;
sys/dev/cxgbe/t4_main.c
6092
val |= F_DROPERRORFRAG;
sys/dev/cxgbe/t4_main.c
6095
val |= F_DROPERRORMAC | F_DROPERRORETHHDRLEN;
sys/dev/cxgbe/t4_main.c
6097
val |= F_DROPERRORIPVER | F_DROPERRORIPHDRLEN |
sys/dev/cxgbe/t4_main.c
6101
val |= F_DROPERRORTCPHDRLEN | F_DROPERRORPKTLEN |
sys/dev/cxgbe/t4_main.c
6104
t4_set_reg_field(sc, A_TP_ERR_CONFIG, mask, val);
sys/dev/cxgbe/t4_main.c
8726
int rc, val;
sys/dev/cxgbe/t4_main.c
8728
val = vi->rsrv_noflowq;
sys/dev/cxgbe/t4_main.c
8729
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/cxgbe/t4_main.c
8733
if ((val >= 1) && (vi->ntxq > 1))
sys/dev/cxgbe/t4_main.c
8746
int rc, val, i;
sys/dev/cxgbe/t4_main.c
8750
val = vi->flags & TX_USES_VM_WR ? 1 : 0;
sys/dev/cxgbe/t4_main.c
8751
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/cxgbe/t4_main.c
8755
if (val != 0 && val != 1)
sys/dev/cxgbe/t4_main.c
8777
if (val) {
sys/dev/cxgbe/t4_main.c
9148
int rc, val;
sys/dev/cxgbe/t4_main.c
9151
val = lc->requested_aneg == AUTONEG_DISABLE ? 0 : 1;
sys/dev/cxgbe/t4_main.c
9153
val = -1;
sys/dev/cxgbe/t4_main.c
9154
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/cxgbe/t4_main.c
9157
if (val == 0)
sys/dev/cxgbe/t4_main.c
9158
val = AUTONEG_DISABLE;
sys/dev/cxgbe/t4_main.c
9159
else if (val == 1)
sys/dev/cxgbe/t4_main.c
9160
val = AUTONEG_ENABLE;
sys/dev/cxgbe/t4_main.c
9162
val = AUTONEG_AUTO;
sys/dev/cxgbe/t4_main.c
9169
if (val == AUTONEG_ENABLE && !(lc->pcaps & FW_PORT_CAP32_ANEG)) {
sys/dev/cxgbe/t4_main.c
9173
lc->requested_aneg = val;
sys/dev/cxgbe/t4_main.c
9192
int rc, val;
sys/dev/cxgbe/t4_main.c
9194
val = lc->force_fec;
sys/dev/cxgbe/t4_main.c
9195
MPASS(val >= -1 && val <= 1);
sys/dev/cxgbe/t4_main.c
9196
rc = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/cxgbe/t4_main.c
9201
if (val < -1 || val > 1)
sys/dev/cxgbe/t4_main.c
9208
lc->force_fec = val;
sys/dev/cxgbe/t4_main.c
9224
uint64_t val;
sys/dev/cxgbe/t4_main.c
9231
val = t4_read_reg64(sc, reg);
sys/dev/cxgbe/t4_main.c
9235
rc = sysctl_handle_64(oidp, &val, 0, req);
sys/dev/cxgbe/t4_main.c
9245
uint64_t val;
sys/dev/cxgbe/t4_main.c
9251
val = 0;
sys/dev/cxgbe/t4_main.c
9253
val += t4_read_reg64(sc,
sys/dev/cxgbe/t4_main.c
9260
rc = sysctl_handle_64(oidp, &val, 0, req);
sys/dev/cxgbe/t4_main.c
9269
uint32_t param, val;
sys/dev/cxgbe/t4_main.c
9280
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
9287
t = val == 0 ? -1 : val;
sys/dev/cxgbe/t4_main.c
9298
uint32_t param, val;
sys/dev/cxgbe/t4_main.c
9312
&param, &val);
sys/dev/cxgbe/t4_main.c
9317
sc->params.core_vdd = val;
sys/dev/cxgbe/t4_main.c
9328
uint32_t param, val;
sys/dev/cxgbe/t4_main.c
9348
val = 1;
sys/dev/cxgbe/t4_main.c
9349
rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
9363
uint32_t param, val;
sys/dev/cxgbe/t4_main.c
9378
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_main.c
9388
if (val == 0xffffffff) {
sys/dev/cxgbe/t4_main.c
9392
sbuf_printf(sb, "%d %d %d", val & 0xff, (val >> 8) & 0xff,
sys/dev/cxgbe/t4_main.c
9393
(val >> 16) & 0xff);
sys/dev/cxgbe/t4_netmap.c
487
uint32_t param, val;
sys/dev/cxgbe/t4_netmap.c
492
val = 0xff;
sys/dev/cxgbe/t4_netmap.c
493
rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_sched.c
46
in_range(int val, int lo, int hi)
sys/dev/cxgbe/t4_sched.c
49
return (val < 0 || (val <= hi && val >= lo));
sys/dev/cxgbe/t4_sge.c
3963
uint32_t param, val;
sys/dev/cxgbe/t4_sge.c
3995
val = V_T7_DMAQ_CONM_CTXT_CNGTPMODE(cong_mode) |
sys/dev/cxgbe/t4_sge.c
3998
val = V_CONMCTXT_CNGTPMODE(cong_mode);
sys/dev/cxgbe/t4_sge.c
4005
val |= V_CONMCTXT_CNGCHMAP(ch_map);
sys/dev/cxgbe/t4_sge.c
4008
rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
sys/dev/cxgbe/t4_sge.c
6661
for (i = 0; i < nitems(e->u.acl.val); i++)
sys/dev/cxgbe/t4_sge.c
6662
log(LOG_ERR, " %02x", e->u.acl.val[i]);
sys/dev/cxgbe/t4_sge.c
6769
flowc->mnemval[0].val = htobe32(pfvf);
sys/dev/cxgbe/t4_sge.c
6772
flowc->mnemval[1].val = htobe32(pi->hw_port);
sys/dev/cxgbe/t4_sge.c
6774
flowc->mnemval[2].val = htobe32(pi->hw_port);
sys/dev/cxgbe/t4_sge.c
6776
flowc->mnemval[3].val = htobe32(cst->iqid);
sys/dev/cxgbe/t4_sge.c
6778
flowc->mnemval[4].val = htobe32(FW_FLOWC_MNEM_EOSTATE_ESTABLISHED);
sys/dev/cxgbe/t4_sge.c
6780
flowc->mnemval[5].val = htobe32(cst->schedcl);
sys/dev/cxgbe/t4_vf.c
235
uint32_t param[3], val[3];
sys/dev/cxgbe/t4_vf.c
240
rc = -t4vf_query_params(sc, nitems(param), param, val);
sys/dev/cxgbe/t4_vf.c
247
sc->params.fw_vers = val[0];
sys/dev/cxgbe/t4_vf.c
248
sc->params.tp_vers = val[1];
sys/dev/cxgbe/t4_vf.c
249
sc->params.vpd.cclk = val[2];
sys/dev/cxgbe/t4_vf.c
270
uint32_t param, val;
sys/dev/cxgbe/t4_vf.c
319
rc = -t4vf_query_params(sc, 1, &param, &val);
sys/dev/cxgbe/t4_vf.c
321
sc->params.max_pkts_per_eth_tx_pkts_wr = val;
sys/dev/cxgbe/t4_vf.c
336
uint32_t param, val;
sys/dev/cxgbe/t4_vf.c
340
val = 1;
sys/dev/cxgbe/t4_vf.c
341
(void)t4vf_set_params(sc, 1, &param, &val);
sys/dev/cxgbe/t4_vf.c
345
val = 1;
sys/dev/cxgbe/t4_vf.c
346
if (t4vf_set_params(sc, 1, &param, &val) == 0)
sys/dev/cxgbe/t4_vf.c
851
edata->val = t4_read_reg(sc, edata->addr);
sys/dev/cxgbe/t4_vf.c
853
edata->val = t4_read_reg64(sc, edata->addr);
sys/dev/cxgbe/t4_vf.c
866
if (edata->val & 0xffffffff00000000)
sys/dev/cxgbe/t4_vf.c
868
t4_write_reg(sc, edata->addr, (uint32_t) edata->val);
sys/dev/cxgbe/t4_vf.c
870
t4_write_reg64(sc, edata->addr, edata->val);
sys/dev/cxgbe/tom/t4_cpl_io.c
124
flowc->mnemval[paramidx].val = htobe32(__v); \
sys/dev/cxgbe/tom/t4_cpl_io.c
218
flowc->mnemval[0].val = htobe32(0xff);
sys/dev/cxgbe/tom/t4_cpl_io.c
220
flowc->mnemval[0].val = htobe32(tc_idx);
sys/dev/cxgbe/tom/t4_cpl_io.c
2285
uint16_t word, uint64_t mask, uint64_t val, int reply, int cookie)
sys/dev/cxgbe/tom/t4_cpl_io.c
2309
req->val = htobe64(val);
sys/dev/cxgbe/tom/t4_cpl_io.c
2314
uint16_t word, uint64_t mask, uint64_t val, int reply, int cookie)
sys/dev/cxgbe/tom/t4_cpl_io.c
2325
write_set_tcb_field(sc, wrtod(wr), toep, word, mask, val, reply,
sys/dev/cxgbe/tom/t4_listen.c
209
ssize_t val;
sys/dev/cxgbe/tom/t4_listen.c
226
for (i = 0; i + 1 < t->nstids; i = roundup2(val + 1, 2)) {
sys/dev/cxgbe/tom/t4_listen.c
227
bit_ffc_area_at(t->stid_bitmap, i, t->nstids, 2, &val);
sys/dev/cxgbe/tom/t4_listen.c
228
if (val == -1)
sys/dev/cxgbe/tom/t4_listen.c
230
if ((val & 1) == 0) {
sys/dev/cxgbe/tom/t4_listen.c
231
stid = val;
sys/dev/cxgbe/tom/t4_listen.c
242
bit_ffc_at(t->stid_bitmap, 0, t->nstids, &val);
sys/dev/cxgbe/tom/t4_listen.c
243
while (val != -1) {
sys/dev/cxgbe/tom/t4_listen.c
249
stid = val;
sys/dev/cxgbe/tom/t4_listen.c
250
if (val & 1 || bit_test(t->stid_bitmap, val + 1))
sys/dev/cxgbe/tom/t4_listen.c
262
pair_stid = val & 1 ? val - 1 : val + 1;
sys/dev/cxgbe/tom/t4_listen.c
268
val = roundup2(val + 1, 2);
sys/dev/cxgbe/tom/t4_listen.c
269
if (val >= t->nstids)
sys/dev/cxgbe/tom/t4_listen.c
271
bit_ffs_at(t->stid_bitmap, val, t->nstids, &val);
sys/dev/cxgbe/tom/t4_listen.c
510
flowc->mnemval[0].val = htobe32(pfvf);
sys/dev/cxgbe/tom/t4_listen.c
513
flowc->mnemval[1].val = htobe32(pi->hw_port);
sys/dev/cxgbe/tom/t4_listen.c
515
flowc->mnemval[2].val = htobe32(pi->hw_port);
sys/dev/cxgbe/tom/t4_listen.c
517
flowc->mnemval[3].val = htobe32(ofld_rxq->iq.abs_id);
sys/dev/cxgbe/tom/t4_listen.c
519
flowc->mnemval[4].val = htobe32(512);
sys/dev/cxgbe/tom/t4_listen.c
521
flowc->mnemval[5].val = htobe32(512);
sys/dev/cxgbe/tom/t4_tls.c
64
uint64_t val, int reply, int cookie)
sys/dev/cxgbe/tom/t4_tls.c
75
write_set_tcb_field(sc, mtod(m, void *), toep, word, mask, val, reply,
sys/dev/cxgbe/tom/t4_tom.c
2347
flowc->mnemval[0].val = htobe32(maxlen);
sys/dev/cxgbe/tom/t4_tom.c
889
flowc->mnemval[0].val = htobe32(toep->params.emss);
sys/dev/cyapa/cyapa.c
285
cyapa_read_bytes(device_t dev, uint8_t reg, uint8_t *val, int cnt)
sys/dev/cyapa/cyapa.c
290
{ addr, IIC_M_RD, cnt, val },
sys/dev/cyapa/cyapa.c
297
cyapa_write_bytes(device_t dev, uint8_t reg, const uint8_t *val, int cnt)
sys/dev/cyapa/cyapa.c
302
{ addr, IIC_M_WR | IIC_M_NOSTART, cnt, __DECONST(uint8_t *, val) },
sys/dev/dc/if_dc.c
622
dc_mii_bitbang_write(device_t dev, uint32_t val)
sys/dev/dc/if_dc.c
628
CSR_WRITE_4(sc, DC_SIO, val);
sys/dev/dc/if_dc.c
640
uint32_t val;
sys/dev/dc/if_dc.c
644
val = CSR_READ_4(sc, DC_SIO);
sys/dev/dc/if_dc.c
648
return (val);
sys/dev/dc/if_dcreg.h
805
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/dc/if_dcreg.h
806
bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val)
sys/dev/dialog/da9063/da9063_iic.c
103
da9063_iic_read(device_t dev, uint16_t addr, uint8_t *val)
sys/dev/dialog/da9063/da9063_iic.c
116
error = iicdev_readfrom(dev, DA9063_IIC_PAGE_OFF(addr), val, 1,
sys/dev/dialog/da9063/da9063_iic.c
128
da9063_iic_write(device_t dev, uint16_t addr, uint8_t val)
sys/dev/dialog/da9063/da9063_iic.c
141
error = iicdev_writeto(dev, DA9063_IIC_PAGE_OFF(addr), &val, 1,
sys/dev/dpaa/qman.c
450
uint32_t val;
sys/dev/dpaa/qman.c
464
val = QM_FQR_GetCounter(fqr, portal, fqid_off, counter);
sys/dev/dpaa/qman.c
468
return (val);
sys/dev/dpaa/qman.c
500
uint32_t val;
sys/dev/dpaa/qman.c
514
val = QM_FQR_GetFqid(fqr);
sys/dev/dpaa/qman.c
518
return (val);
sys/dev/dpaa2/dpaa2_console.c
476
uint32_t val;
sys/dev/dpaa2/dpaa2_console.c
489
val = DPAA2_MC_READ_4(sc, MC_REG_MCFBALR_OFF);
sys/dev/dpaa2/dpaa2_console.c
490
val &= MC_REG_MCFBALR_MASK;
sys/dev/dpaa2/dpaa2_console.c
491
sc->mcfba |= val;
sys/dev/dpaa2/dpaa2_console.c
492
val = DPAA2_MC_READ_4(sc, MC_REG_MCFBAHR_OFF);
sys/dev/dpaa2/dpaa2_console.c
493
val &= MC_REG_MCFBAHR_MASK;
sys/dev/dpaa2/dpaa2_console.c
494
sc->mcfba |= ((uint64_t)val << 32);
sys/dev/dpaa2/dpaa2_console.c
542
uint32_t val;
sys/dev/dpaa2/dpaa2_console.c
555
val = DPAA2_MC_READ_4(sc, MC_REG_MCFBALR_OFF);
sys/dev/dpaa2/dpaa2_console.c
556
val &= MC_REG_MCFBALR_MASK;
sys/dev/dpaa2/dpaa2_console.c
557
sc->mcfba |= val;
sys/dev/dpaa2/dpaa2_console.c
558
val = DPAA2_MC_READ_4(sc, MC_REG_MCFBAHR_OFF);
sys/dev/dpaa2/dpaa2_console.c
559
val &= MC_REG_MCFBAHR_MASK;
sys/dev/dpaa2/dpaa2_console.c
560
sc->mcfba |= ((uint64_t)val << 32);
sys/dev/dpaa2/dpaa2_io.c
496
int val;
sys/dev/dpaa2/dpaa2_io.c
498
val = pci_msi_count(sc->dev);
sys/dev/dpaa2/dpaa2_io.c
499
if (val < DPAA2_IO_MSI_COUNT)
sys/dev/dpaa2/dpaa2_io.c
500
device_printf(sc->dev, "MSI: actual=%d, expected=%d\n", val,
sys/dev/dpaa2/dpaa2_io.c
502
val = MIN(val, DPAA2_IO_MSI_COUNT);
sys/dev/dpaa2/dpaa2_io.c
504
if (pci_alloc_msi(sc->dev, &val) != 0)
sys/dev/dpaa2/dpaa2_io.c
507
for (int i = 0; i < val; i++)
sys/dev/dpaa2/dpaa2_mac.c
288
int val;
sys/dev/dpaa2/dpaa2_mac.c
290
val = pci_msi_count(sc->dev);
sys/dev/dpaa2/dpaa2_mac.c
291
if (val < DPAA2_MAC_MSI_COUNT)
sys/dev/dpaa2/dpaa2_mac.c
292
device_printf(sc->dev, "MSI: actual=%d, expected=%d\n", val,
sys/dev/dpaa2/dpaa2_mac.c
294
val = MIN(val, DPAA2_MAC_MSI_COUNT);
sys/dev/dpaa2/dpaa2_mac.c
296
if (pci_alloc_msi(sc->dev, &val) != 0)
sys/dev/dpaa2/dpaa2_mac.c
299
for (int i = 0; i < val; i++)
sys/dev/dpaa2/dpaa2_mc.c
133
uint32_t val;
sys/dev/dpaa2/dpaa2_mc.c
169
val = mcreg_read_4(sc, MC_REG_GCR1) &
sys/dev/dpaa2/dpaa2_mc.c
171
mcreg_write_4(sc, MC_REG_GCR1, val);
sys/dev/dpaa2/dpaa2_mc.c
177
val = mcreg_read_4(sc, MC_REG_GSR);
sys/dev/dpaa2/dpaa2_mc.c
178
if (GSR_MCS(val) != 0u)
sys/dev/dpaa2/dpaa2_ni.c
1539
int val;
sys/dev/dpaa2/dpaa2_ni.c
1541
val = pci_msi_count(sc->dev);
sys/dev/dpaa2/dpaa2_ni.c
1542
if (val < DPAA2_NI_MSI_COUNT)
sys/dev/dpaa2/dpaa2_ni.c
1543
device_printf(sc->dev, "MSI: actual=%d, expected=%d\n", val,
sys/dev/dpaa2/dpaa2_ni.c
1545
val = MIN(val, DPAA2_NI_MSI_COUNT);
sys/dev/dpaa2/dpaa2_ni.c
1547
if (pci_alloc_msi(sc->dev, &val) != 0)
sys/dev/dpaa2/dpaa2_ni.c
1550
for (int i = 0; i < val; i++)
sys/dev/dpaa2/dpaa2_rc.c
2295
uint8_t phy, uint16_t reg, uint16_t *val)
sys/dev/dpaa2/dpaa2_rc.c
2307
if (portal == NULL || cmd == NULL || val == NULL)
sys/dev/dpaa2/dpaa2_rc.c
2317
*val = cmd->params[0] & 0xFFFF;
sys/dev/dpaa2/dpaa2_rc.c
2324
uint8_t phy, uint16_t reg, uint16_t val)
sys/dev/dpaa2/dpaa2_rc.c
2330
uint16_t val;
sys/dev/dpaa2/dpaa2_rc.c
2342
args->val = val;
sys/dev/dpaa2/dpaa2_rc.c
3253
uint64_t val;
sys/dev/dpaa2/dpaa2_rc.c
3258
val = bus_read_8(mcp->map, 0);
sys/dev/dpaa2/dpaa2_rc.c
3259
hdr = (struct dpaa2_cmd_header *) &val;
sys/dev/dpaa2/dpaa2_rc.c
3271
cmd->header = val;
sys/dev/dpaa2/dpaa2_swp.c
820
uint32_t half_mask, full_mask, val, ci_offset;
sys/dev/dpaa2/dpaa2_swp.c
844
val = dpaa2_swp_read_reg(swp, ci_offset);
sys/dev/dpaa2/dpaa2_swp.c
846
swp->eqcr.ci = val & full_mask;
sys/dev/dpaa2/dpaa2_types.h
129
#define DPAA2_ATOMIC_XCHG(a, val) \
sys/dev/dpaa2/dpaa2_types.h
130
(atomic_swap_int(&(a)->counter, (val)))
sys/dev/dpaa2/dpaa2_types.h
133
#define DPAA2_ATOMIC_ADD(a, val) \
sys/dev/dpaa2/dpaa2_types.h
134
(atomic_add_acq_int(&(a)->counter, (val)))
sys/dev/dpaa2/memac_mdio_common.c
160
memac_write_4(struct memac_mdio_softc_common *sc, uint32_t reg, uint32_t val)
sys/dev/dpaa2/memac_mdio_common.c
165
v = htole32(val);
sys/dev/dpaa2/memac_mdio_common.c
167
v = htobe32(val);
sys/dev/dpaa2/memac_mdio_common.c
174
uint32_t count, val;
sys/dev/dpaa2/memac_mdio_common.c
177
val = memac_read_4(sc, MDIO_CFG);
sys/dev/dpaa2/memac_mdio_common.c
178
if ((val & MDIO_CFG_BUSY) == 0)
sys/dev/dpaa2/memac_mdio_common.c
192
uint32_t cfg, ctl, val;
sys/dev/dpaa2/memac_mdio_common.c
200
val = memac_miibus_wait_no_busy(sc);
sys/dev/dpaa2/memac_mdio_common.c
201
if (val != 0)
sys/dev/dpaa2/memac_mdio_common.c
209
val = memac_miibus_wait_no_busy(sc);
sys/dev/dpaa2/memac_mdio_common.c
210
if (val != 0)
sys/dev/dpaa2/memac_mdio_common.c
217
val = memac_read_4(sc, MDIO_DATA);
sys/dev/dpaa2/memac_mdio_common.c
218
val &= 0xffff;
sys/dev/dpaa2/memac_mdio_common.c
221
device_printf(sc->dev, "phy read %d:%d = %#06x\n", phy, reg, val);
sys/dev/dpaa2/memac_mdio_common.c
224
return (val);
sys/dev/dpaa2/memac_mdio_common.c
230
uint32_t cfg, ctl, val;
sys/dev/dpaa2/memac_mdio_common.c
242
val = memac_miibus_wait_no_busy(sc);
sys/dev/dpaa2/memac_mdio_common.c
243
if (val != 0)
sys/dev/dpaa2/memac_mdio_common.c
252
val = memac_miibus_wait_no_busy(sc);
sys/dev/dpaa2/memac_mdio_common.c
253
if (val != 0)
sys/dev/drm2/drmP.h
1644
#define DRM_GET_USER_UNCHECKED(val, uaddr) \
sys/dev/drm2/drmP.h
1645
((val) = fuword32(uaddr), 0)
sys/dev/drm2/drm_crtc.c
2932
struct drm_property *property, uint64_t val)
sys/dev/drm2/drm_crtc.c
2938
obj->properties->values[i] = val;
sys/dev/drm2/drm_crtc.c
2948
struct drm_property *property, uint64_t *val)
sys/dev/drm2/drm_crtc.c
2954
*val = obj->properties->values[i];
sys/dev/drm2/drm_crtc.c
43
char *fnname(int val) \
sys/dev/drm2/drm_crtc.c
47
if (list[i].type == val) \
sys/dev/drm2/drm_crtc.h
356
struct drm_property *property, uint64_t val);
sys/dev/drm2/drm_crtc.h
454
uint64_t val);
sys/dev/drm2/drm_crtc.h
629
struct drm_property *property, uint64_t val);
sys/dev/drm2/drm_crtc.h
873
extern char *drm_get_dpms_name(int val);
sys/dev/drm2/drm_crtc.h
874
extern char *drm_get_dvi_i_subconnector_name(int val);
sys/dev/drm2/drm_crtc.h
875
extern char *drm_get_dvi_i_select_name(int val);
sys/dev/drm2/drm_crtc.h
876
extern char *drm_get_tv_subconnector_name(int val);
sys/dev/drm2/drm_crtc.h
877
extern char *drm_get_dirty_info_name(int val);
sys/dev/drm2/drm_crtc.h
878
extern char *drm_get_tv_select_name(int val);
sys/dev/drm2/drm_crtc.h
929
uint64_t val);
sys/dev/drm2/drm_os_freebsd.h
142
#define DRM_WRITE8(map, offset, val) \
sys/dev/drm2/drm_os_freebsd.h
144
(vm_offset_t)(offset)) = val
sys/dev/drm2/drm_os_freebsd.h
145
#define DRM_WRITE16(map, offset, val) \
sys/dev/drm2/drm_os_freebsd.h
147
(vm_offset_t)(offset)) = htole16(val)
sys/dev/drm2/drm_os_freebsd.h
148
#define DRM_WRITE32(map, offset, val) \
sys/dev/drm2/drm_os_freebsd.h
150
(vm_offset_t)(offset)) = htole32(val)
sys/dev/drm2/drm_os_freebsd.h
151
#define DRM_WRITE64(map, offset, val) \
sys/dev/drm2/drm_os_freebsd.h
153
(vm_offset_t)(offset)) = htole64(val)
sys/dev/drm2/drm_os_freebsd.h
626
pci_read_config_byte(device_t kdev, int where, u8 *val)
sys/dev/drm2/drm_os_freebsd.h
629
*val = (u8)pci_read_config(kdev, where, 1);
sys/dev/drm2/drm_os_freebsd.h
634
pci_write_config_byte(device_t kdev, int where, u8 val)
sys/dev/drm2/drm_os_freebsd.h
637
pci_write_config(kdev, where, val, 1);
sys/dev/drm2/drm_os_freebsd.h
642
pci_read_config_word(device_t kdev, int where, uint16_t *val)
sys/dev/drm2/drm_os_freebsd.h
645
*val = (uint16_t)pci_read_config(kdev, where, 2);
sys/dev/drm2/drm_os_freebsd.h
650
pci_write_config_word(device_t kdev, int where, uint16_t val)
sys/dev/drm2/drm_os_freebsd.h
653
pci_write_config(kdev, where, val, 2);
sys/dev/drm2/drm_os_freebsd.h
658
pci_read_config_dword(device_t kdev, int where, uint32_t *val)
sys/dev/drm2/drm_os_freebsd.h
661
*val = (uint32_t)pci_read_config(kdev, where, 4);
sys/dev/drm2/drm_os_freebsd.h
666
pci_write_config_dword(device_t kdev, int where, uint32_t val)
sys/dev/drm2/drm_os_freebsd.h
669
pci_write_config(kdev, where, val, 4);
sys/dev/drm2/ttm/ttm_lock.h
219
static inline void ttm_lock_set_kill(struct ttm_lock *lock, bool val,
sys/dev/drm2/ttm/ttm_lock.h
222
lock->kill_takers = val;
sys/dev/drm2/ttm/ttm_lock.h
223
if (val)
sys/dev/drm2/ttm/ttm_memory.c
100
val64 = val;
sys/dev/drm2/ttm/ttm_memory.c
63
uint64_t val = 0;
sys/dev/drm2/ttm/ttm_memory.c
67
val = zone->zone_mem;
sys/dev/drm2/ttm/ttm_memory.c
69
val = zone->emer_mem;
sys/dev/drm2/ttm/ttm_memory.c
71
val = zone->max_mem;
sys/dev/drm2/ttm/ttm_memory.c
73
val = zone->swap_limit;
sys/dev/drm2/ttm/ttm_memory.c
75
val = zone->used_mem;
sys/dev/drm2/ttm/ttm_memory.c
79
(unsigned long long) val >> 10);
sys/dev/drm2/ttm/ttm_memory.c
93
unsigned long val;
sys/dev/drm2/ttm/ttm_memory.c
96
chars = sscanf(buffer, "%lu", &val);
sys/dev/drm2/ttm/ttm_page_alloc.c
223
unsigned val;
sys/dev/drm2/ttm/ttm_page_alloc.c
224
chars = sscanf(buffer, "%u", &val);
sys/dev/drm2/ttm/ttm_page_alloc.c
229
val = val / (PAGE_SIZE >> 10);
sys/dev/drm2/ttm/ttm_page_alloc.c
232
m->options.max_size = val;
sys/dev/drm2/ttm/ttm_page_alloc.c
234
m->options.small = val;
sys/dev/drm2/ttm/ttm_page_alloc.c
236
if (val > NUM_PAGES_TO_ALLOC*8) {
sys/dev/drm2/ttm/ttm_page_alloc.c
241
} else if (val > NUM_PAGES_TO_ALLOC) {
sys/dev/drm2/ttm/ttm_page_alloc.c
245
m->options.alloc_size = val;
sys/dev/drm2/ttm/ttm_page_alloc.c
254
unsigned val = 0;
sys/dev/drm2/ttm/ttm_page_alloc.c
257
val = m->options.max_size;
sys/dev/drm2/ttm/ttm_page_alloc.c
259
val = m->options.small;
sys/dev/drm2/ttm/ttm_page_alloc.c
261
val = m->options.alloc_size;
sys/dev/drm2/ttm/ttm_page_alloc.c
263
val = val * (PAGE_SIZE >> 10);
sys/dev/drm2/ttm/ttm_page_alloc.c
265
return snprintf(buffer, PAGE_SIZE, "%u\n", val);
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
213
unsigned val;
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
214
chars = sscanf(buffer, "%u", &val);
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
219
val = val / (PAGE_SIZE >> 10);
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
222
m->options.max_size = val;
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
224
m->options.small = val;
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
226
if (val > NUM_PAGES_TO_ALLOC*8) {
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
231
} else if (val > NUM_PAGES_TO_ALLOC) {
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
235
m->options.alloc_size = val;
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
246
unsigned val = 0;
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
249
val = m->options.max_size;
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
251
val = m->options.small;
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
253
val = m->options.alloc_size;
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
255
val = val * (PAGE_SIZE >> 10);
sys/dev/drm2/ttm/ttm_page_alloc_dma.c
257
return snprintf(buffer, PAGE_SIZE, "%u\n", val);
sys/dev/dwc/dwc1000_core.c
117
dwc1000_miibus_write_reg(device_t dev, int phy, int reg, int val)
sys/dev/dwc/dwc1000_core.c
130
WRITE4(sc, GMII_DATA, val);
sys/dev/dwc/dwc1000_core.c
278
uint8_t val;
sys/dev/dwc/dwc1000_core.c
282
val = bitreverse(~crc & 0xff);
sys/dev/dwc/dwc1000_core.c
288
val >>= 2; /* Only need lower 6 bits */
sys/dev/dwc/dwc1000_core.c
289
hashreg = (val >> 5);
sys/dev/dwc/dwc1000_core.c
290
hashbit = (val & 31);
sys/dev/dwc/dwc1000_core.h
34
int dwc1000_miibus_write_reg(device_t dev, int phy, int reg, int val);
sys/dev/dwwdt/dwwdt.c
121
static inline void dwwdt_set_timeout(const struct dwwdt_softc *sc, int val);
sys/dev/dwwdt/dwwdt.c
154
uint32_t val;
sys/dev/dwwdt/dwwdt.c
157
val = DWWDT_READ4(sc, DWWDT_CR);
sys/dev/dwwdt/dwwdt.c
158
val |= DWWDT_CR_WDT_EN | DWWDT_CR_RESP_MODE;
sys/dev/dwwdt/dwwdt.c
159
DWWDT_WRITE4(sc, DWWDT_CR, val);
sys/dev/dwwdt/dwwdt.c
172
dwwdt_set_timeout(const struct dwwdt_softc *sc, int val)
sys/dev/dwwdt/dwwdt.c
175
DWWDT_WRITE4(sc, DWWDT_TORR, val);
sys/dev/dwwdt/dwwdt.c
206
int val;
sys/dev/dwwdt/dwwdt.c
209
val = MAX(0, timeout + exponent - DWWDT_EXP_OFFSET + 1);
sys/dev/dwwdt/dwwdt.c
212
if (cmd == 0 || val > 0x0f) {
sys/dev/dwwdt/dwwdt.c
220
dwwdt_set_timeout(sc, val);
sys/dev/dwwdt/dwwdt.c
62
#define DWWDT_WRITE4(sc, reg, val) \
sys/dev/dwwdt/dwwdt.c
63
bus_write_4((sc)->sc_mem_res, (reg), (val))
sys/dev/e1000/if_em.c
2401
int rid, val;
sys/dev/e1000/if_em.c
2422
val = pci_read_config(dev, rid, 4);
sys/dev/e1000/if_em.c
2423
if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
sys/dev/e1000/if_em.c
2428
if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
sys/dev/e1000/if_em.c
4893
u_int val;
sys/dev/e1000/if_em.c
4896
val = E1000_READ_REG(&sc->hw, oidp->oid_arg2);
sys/dev/e1000/if_em.c
4897
return (sysctl_handle_int(oidp, &val, 0, req));
sys/dev/e1000/if_em.c
5502
u32 reg, val, shift;
sys/dev/e1000/if_em.c
5523
val = E1000_READ_REG(&sc->hw, reg);
sys/dev/e1000/if_em.c
5524
mask = (val >> shift) & 0xfff;
sys/dev/e1000/if_em.c
5530
val = (val & ~(0xfff << shift)) | (mask << shift);
sys/dev/e1000/if_em.c
5531
E1000_WRITE_REG(&sc->hw, reg, val);
sys/dev/ena/ena.h
545
#define clamp_val(val, lo, hi) clamp_t(__typeof(val), val, lo, hi)
sys/dev/ena/ena_sysctl.c
708
uint32_t val;
sys/dev/ena/ena_sysctl.c
717
val = 0;
sys/dev/ena/ena_sysctl.c
718
error = sysctl_wire_old_buffer(req, sizeof(val));
sys/dev/ena/ena_sysctl.c
720
val = adapter->buf_ring_size;
sys/dev/ena/ena_sysctl.c
721
error = sysctl_handle_32(oidp, &val, 0, req);
sys/dev/ena/ena_sysctl.c
726
if (!powerof2(val) || val == 0) {
sys/dev/ena/ena_sysctl.c
729
val);
sys/dev/ena/ena_sysctl.c
734
if (val != adapter->buf_ring_size) {
sys/dev/ena/ena_sysctl.c
737
val, adapter->buf_ring_size);
sys/dev/ena/ena_sysctl.c
739
error = ena_update_buf_ring_size(adapter, val);
sys/dev/ena/ena_sysctl.c
756
uint32_t val;
sys/dev/ena/ena_sysctl.c
765
val = 0;
sys/dev/ena/ena_sysctl.c
766
error = sysctl_wire_old_buffer(req, sizeof(val));
sys/dev/ena/ena_sysctl.c
768
val = adapter->requested_rx_ring_size;
sys/dev/ena/ena_sysctl.c
769
error = sysctl_handle_32(oidp, &val, 0, req);
sys/dev/ena/ena_sysctl.c
774
if (val < ENA_MIN_RING_SIZE || val > adapter->max_rx_ring_size) {
sys/dev/ena/ena_sysctl.c
777
val, ENA_MIN_RING_SIZE, adapter->max_rx_ring_size);
sys/dev/ena/ena_sysctl.c
783
if (!powerof2(val)) {
sys/dev/ena/ena_sysctl.c
786
val);
sys/dev/ena/ena_sysctl.c
791
if (val != adapter->requested_rx_ring_size) {
sys/dev/ena/ena_sysctl.c
793
"Requested new Rx queue size: %u. Old size: %u\n", val,
sys/dev/ena/ena_sysctl.c
797
adapter->requested_tx_ring_size, val);
sys/dev/enetc/enetc_hw.h
107
#define ENETC_SIRFSCAPR_GET_NUM_RFS(val) ((val) & 0x7f)
sys/dev/enetc/enetc_hw.h
109
#define ENETC_SIRSSCAPR_GET_NUM_RSS(val) (BIT((val) & 0xf) * 32)
sys/dev/enetc/enetc_hw.h
142
#define ENETC_TBMR_SET_PRIO(val) ((val) & ENETC_TBMR_PRIO_MASK)
sys/dev/enetc/enetc_hw.h
191
#define ENETC_PSIVLAN_SET_QOS(val) ((uint32_t)(val) << 12)
sys/dev/enetc/enetc_hw.h
194
#define ENETC_PCAPR0_RXBDR(val) ((val) >> 24)
sys/dev/enetc/enetc_hw.h
195
#define ENETC_PCAPR0_TXBDR(val) (((val) >> 16) & 0xff)
sys/dev/enetc/enetc_hw.h
198
#define ENETC_PSICFGR0_SET_TXBDR(val) ((val) & 0xff)
sys/dev/enetc/enetc_hw.h
199
#define ENETC_PSICFGR0_SET_RXBDR(val) (((val) & 0xff) << 16)
sys/dev/enetc/enetc_hw.h
211
#define ENETC_PRSSCAPR_GET_NUM_RSS(val) (BIT((val) & 0xf) * 32)
sys/dev/enetc/enetc_hw.h
218
#define ENETC_PRFSCAPR_GET_NUM_RFS(val) ((((val) & 0xf) + 1) * 16)
sys/dev/enetc/enetc_hw.h
248
#define ENETC_SET_TX_MTU(val) ((val) << 16)
sys/dev/enetc/enetc_hw.h
249
#define ENETC_SET_MAXFRM(val) ((val) & 0xffff)
sys/dev/enetc/enetc_hw.h
67
#define ENETC_SIMSGSR_SET_MC(val) ((val) << 16)
sys/dev/enetc/enetc_hw.h
68
#define ENETC_SIMSGSR_GET_MC(val) ((val) >> 16)
sys/dev/enetc/enetc_mdio.c
50
uint32_t val;
sys/dev/enetc/enetc_mdio.c
55
val = ENETC_MDIO_RD4(regs, mdio_base, ENETC_MDIO_CFG);
sys/dev/enetc/enetc_mdio.c
56
if ((val & MDIO_CFG_BSY) == 0)
sys/dev/enetc/if_enetc.c
1429
int val;
sys/dev/enetc/if_enetc.c
1434
val = enetc_mdio_read(sc->regs, ENETC_PORT_BASE + ENETC_EMDIO_BASE,
sys/dev/enetc/if_enetc.c
1438
return (val);
sys/dev/enetc/if_enetc.c
269
uint32_t val;
sys/dev/enetc/if_enetc.c
271
val = ENETC_PORT_RD4(sc, ENETC_PCAPR0);
sys/dev/enetc/if_enetc.c
272
*max_tx_nqueues = MIN(ENETC_PCAPR0_TXBDR(val), ENETC_MAX_QUEUES);
sys/dev/enetc/if_enetc.c
273
*max_rx_nqueues = MIN(ENETC_PCAPR0_RXBDR(val), ENETC_MAX_QUEUES);
sys/dev/enetc/if_enetc.c
688
uint32_t val;
sys/dev/enetc/if_enetc.c
695
val = ENETC_PSICFGR0_SET_TXBDR(sc->tx_num_queues);
sys/dev/enetc/if_enetc.c
696
val |= ENETC_PSICFGR0_SET_RXBDR(sc->rx_num_queues);
sys/dev/enetc/if_enetc.c
697
val |= ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S);
sys/dev/enetc/if_enetc.c
698
ENETC_PORT_WR4(sc, ENETC_PSICFGR0(0), val);
sys/dev/enic/vnic_devcmd.h
887
u8 val[FILTER_GENERIC_1_KEY_LEN];
sys/dev/enic/vnic_devcmd.h
991
uint32_t val[0];
sys/dev/eqos/if_eqos.c
115
int retry, val;
sys/dev/eqos/if_eqos.c
129
val = RD4(sc, GMAC_MAC_MDIO_DATA) & 0xFFFF;
sys/dev/eqos/if_eqos.c
139
return (val);
sys/dev/eqos/if_eqos.c
143
eqos_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/eqos/if_eqos.c
149
WR4(sc, GMAC_MAC_MDIO_DATA, val);
sys/dev/eqos/if_eqos.c
418
uint32_t val;
sys/dev/eqos/if_eqos.c
442
val = eaddr[4] | (eaddr[5] << 8);
sys/dev/eqos/if_eqos.c
443
WR4(sc, GMAC_MAC_ADDRESS0_HIGH, val);
sys/dev/eqos/if_eqos.c
444
val = eaddr[0] | (eaddr[1] << 8) | (eaddr[2] << 16) | (eaddr[3] << 24);
sys/dev/eqos/if_eqos.c
445
WR4(sc, GMAC_MAC_ADDRESS0_LOW, val);
sys/dev/eqos/if_eqos.c
458
uint32_t val;
sys/dev/eqos/if_eqos.c
464
val = RD4(sc, GMAC_DMA_MODE);
sys/dev/eqos/if_eqos.c
465
if (!(val & GMAC_DMA_MODE_SWR))
sys/dev/eqos/if_eqos.c
497
uint32_t val, mtl_tx_val, mtl_rx_val;
sys/dev/eqos/if_eqos.c
511
val = RD4(sc, GMAC_DMA_CHAN0_CONTROL);
sys/dev/eqos/if_eqos.c
512
val &= ~GMAC_DMA_CHAN0_CONTROL_DSL_MASK;
sys/dev/eqos/if_eqos.c
513
val |= ((DESC_ALIGN - 16) / 8) << GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT;
sys/dev/eqos/if_eqos.c
515
val |= GMAC_DMA_CHAN0_CONTROL_PBLX8;
sys/dev/eqos/if_eqos.c
516
WR4(sc, GMAC_DMA_CHAN0_CONTROL, val);
sys/dev/eqos/if_eqos.c
517
val = RD4(sc, GMAC_DMA_CHAN0_TX_CONTROL);
sys/dev/eqos/if_eqos.c
519
val |= (sc->txpbl << GMAC_DMA_CHAN0_TXRX_PBL_SHIFT);
sys/dev/eqos/if_eqos.c
520
val |= GMAC_DMA_CHAN0_TX_CONTROL_OSP;
sys/dev/eqos/if_eqos.c
521
val |= GMAC_DMA_CHAN0_TX_CONTROL_START;
sys/dev/eqos/if_eqos.c
522
WR4(sc, GMAC_DMA_CHAN0_TX_CONTROL, val);
sys/dev/eqos/if_eqos.c
523
val = RD4(sc, GMAC_DMA_CHAN0_RX_CONTROL);
sys/dev/eqos/if_eqos.c
525
val |= (sc->rxpbl << GMAC_DMA_CHAN0_TXRX_PBL_SHIFT);
sys/dev/eqos/if_eqos.c
526
val &= ~GMAC_DMA_CHAN0_RX_CONTROL_RBSZ_MASK;
sys/dev/eqos/if_eqos.c
527
val |= (MCLBYTES << GMAC_DMA_CHAN0_RX_CONTROL_RBSZ_SHIFT);
sys/dev/eqos/if_eqos.c
528
val |= GMAC_DMA_CHAN0_RX_CONTROL_START;
sys/dev/eqos/if_eqos.c
529
WR4(sc, GMAC_DMA_CHAN0_RX_CONTROL, val);
sys/dev/eqos/if_eqos.c
555
val = RD4(sc, GMAC_MAC_Q0_TX_FLOW_CTRL);
sys/dev/eqos/if_eqos.c
556
val |= 0xFFFFU << GMAC_MAC_Q0_TX_FLOW_CTRL_PT_SHIFT;
sys/dev/eqos/if_eqos.c
557
val |= GMAC_MAC_Q0_TX_FLOW_CTRL_TFE;
sys/dev/eqos/if_eqos.c
558
WR4(sc, GMAC_MAC_Q0_TX_FLOW_CTRL, val);
sys/dev/eqos/if_eqos.c
559
val = RD4(sc, GMAC_MAC_RX_FLOW_CTRL);
sys/dev/eqos/if_eqos.c
560
val |= GMAC_MAC_RX_FLOW_CTRL_RFE;
sys/dev/eqos/if_eqos.c
561
WR4(sc, GMAC_MAC_RX_FLOW_CTRL, val);
sys/dev/eqos/if_eqos.c
568
val = RD4(sc, GMAC_MAC_CONFIGURATION);
sys/dev/eqos/if_eqos.c
569
val |= GMAC_MAC_CONFIGURATION_BE;
sys/dev/eqos/if_eqos.c
570
val |= GMAC_MAC_CONFIGURATION_JD;
sys/dev/eqos/if_eqos.c
571
val |= GMAC_MAC_CONFIGURATION_JE;
sys/dev/eqos/if_eqos.c
572
val |= GMAC_MAC_CONFIGURATION_DCRS;
sys/dev/eqos/if_eqos.c
573
val |= GMAC_MAC_CONFIGURATION_TE;
sys/dev/eqos/if_eqos.c
574
val |= GMAC_MAC_CONFIGURATION_RE;
sys/dev/eqos/if_eqos.c
575
WR4(sc, GMAC_MAC_CONFIGURATION, val);
sys/dev/eqos/if_eqos.c
645
uint32_t val;
sys/dev/eqos/if_eqos.c
655
val = RD4(sc, GMAC_MAC_CONFIGURATION);
sys/dev/eqos/if_eqos.c
656
val &= ~GMAC_MAC_CONFIGURATION_RE;
sys/dev/eqos/if_eqos.c
657
WR4(sc, GMAC_MAC_CONFIGURATION, val);
sys/dev/eqos/if_eqos.c
660
val = RD4(sc, GMAC_DMA_CHAN0_RX_CONTROL);
sys/dev/eqos/if_eqos.c
661
val &= ~GMAC_DMA_CHAN0_RX_CONTROL_START;
sys/dev/eqos/if_eqos.c
662
WR4(sc, GMAC_DMA_CHAN0_RX_CONTROL, val);
sys/dev/eqos/if_eqos.c
665
val = RD4(sc, GMAC_DMA_CHAN0_TX_CONTROL);
sys/dev/eqos/if_eqos.c
666
val &= ~GMAC_DMA_CHAN0_TX_CONTROL_START;
sys/dev/eqos/if_eqos.c
667
WR4(sc, GMAC_DMA_CHAN0_TX_CONTROL, val);
sys/dev/eqos/if_eqos.c
670
val = RD4(sc, GMAC_MTL_TXQ0_OPERATION_MODE);
sys/dev/eqos/if_eqos.c
671
val |= GMAC_MTL_TXQ0_OPERATION_MODE_FTQ;
sys/dev/eqos/if_eqos.c
672
WR4(sc, GMAC_MTL_TXQ0_OPERATION_MODE, val);
sys/dev/eqos/if_eqos.c
674
val = RD4(sc, GMAC_MTL_TXQ0_OPERATION_MODE);
sys/dev/eqos/if_eqos.c
675
if (!(val & GMAC_MTL_TXQ0_OPERATION_MODE_FTQ))
sys/dev/eqos/if_eqos.c
683
val = RD4(sc, GMAC_MAC_CONFIGURATION);
sys/dev/eqos/if_eqos.c
684
val &= ~GMAC_MAC_CONFIGURATION_TE;
sys/dev/eqos/if_eqos.c
685
WR4(sc, GMAC_MAC_CONFIGURATION, val);
sys/dev/eqos/if_eqos.c
973
uint32_t val;
sys/dev/eqos/if_eqos.c
975
val = RD4(sc, GMAC_DMA_SYSBUS_MODE);
sys/dev/eqos/if_eqos.c
978
val &= ~GMAC_DMA_SYSBUS_MODE_WR_OSR_LMT_MASK;
sys/dev/eqos/if_eqos.c
979
val |= 0x03 << GMAC_DMA_SYSBUS_MODE_WR_OSR_LMT_SHIFT;
sys/dev/eqos/if_eqos.c
982
val &= ~GMAC_DMA_SYSBUS_MODE_RD_OSR_LMT_MASK;
sys/dev/eqos/if_eqos.c
983
val |= 0x07 << GMAC_DMA_SYSBUS_MODE_RD_OSR_LMT_SHIFT;
sys/dev/eqos/if_eqos.c
986
val |= GMAC_DMA_SYSBUS_MODE_BLEN16;
sys/dev/eqos/if_eqos.c
987
val |= GMAC_DMA_SYSBUS_MODE_BLEN8;
sys/dev/eqos/if_eqos.c
988
val |= GMAC_DMA_SYSBUS_MODE_BLEN4;
sys/dev/eqos/if_eqos.c
991
val |= GMAC_DMA_SYSBUS_MODE_MB;
sys/dev/eqos/if_eqos.c
993
WR4(sc, GMAC_DMA_SYSBUS_MODE, val);
sys/dev/eqos/if_eqos_fdt.c
81
#define EQOS_GMAC_CLK_RX_DL_CFG(val) (0x7f000000 | val << 8)
sys/dev/eqos/if_eqos_fdt.c
82
#define EQOS_GMAC_CLK_TX_DL_CFG(val) (0x007f0000 | val)
sys/dev/et/if_et.c
1128
uint32_t val;
sys/dev/et/if_et.c
1146
val = (10 << ET_MAC_HDX_ALT_BEB_TRUNC_SHIFT) |
sys/dev/et/if_et.c
1150
CSR_WRITE_4(sc, ET_MAC_HDX, val);
sys/dev/et/if_et.c
1836
uint32_t val;
sys/dev/et/if_et.c
1847
val = (56 << ET_IPG_NONB2B_1_SHIFT) |
sys/dev/et/if_et.c
1851
CSR_WRITE_4(sc, ET_IPG, val);
sys/dev/et/if_et.c
1856
val = (10 << ET_MAC_HDX_ALT_BEB_TRUNC_SHIFT) |
sys/dev/et/if_et.c
1860
CSR_WRITE_4(sc, ET_MAC_HDX, val);
sys/dev/et/if_et.c
1873
val = eaddr[2] | (eaddr[3] << 8) | (eaddr[4] << 16) | (eaddr[5] << 24);
sys/dev/et/if_et.c
1874
CSR_WRITE_4(sc, ET_MAC_ADDR1, val);
sys/dev/et/if_et.c
1875
val = (eaddr[0] << 16) | (eaddr[1] << 24);
sys/dev/et/if_et.c
1876
CSR_WRITE_4(sc, ET_MAC_ADDR2, val);
sys/dev/et/if_et.c
1890
uint32_t val;
sys/dev/et/if_et.c
1909
val = (eaddr[2] << 24) | (eaddr[3] << 16) | (eaddr[4] << 8) | eaddr[5];
sys/dev/et/if_et.c
1910
CSR_WRITE_4(sc, ET_WOL_SA_LO, val);
sys/dev/et/if_et.c
1911
val = (eaddr[0] << 8) | eaddr[1];
sys/dev/et/if_et.c
1912
CSR_WRITE_4(sc, ET_WOL_SA_HI, val);
sys/dev/et/if_et.c
1934
val = (ET_RXMAC_SEGSZ(256) & ET_RXMAC_MC_SEGSZ_MAX_MASK) |
sys/dev/et/if_et.c
1937
val = 0;
sys/dev/et/if_et.c
1939
CSR_WRITE_4(sc, ET_RXMAC_MC_SEGSZ, val);
sys/dev/et/if_et.c
1957
val = (ETHER_MIN_LEN << ET_PKTFILT_MINLEN_SHIFT) &
sys/dev/et/if_et.c
1959
val |= ET_PKTFILT_FRAG;
sys/dev/et/if_et.c
1960
CSR_WRITE_4(sc, ET_PKTFILT, val);
sys/dev/et/if_et.c
1994
uint32_t val;
sys/dev/et/if_et.c
1996
val = (sc->sc_rx_data[0].rbd_bufsize & ET_RXDMA_CTRL_RING0_SIZE_MASK) |
sys/dev/et/if_et.c
1998
val |= (sc->sc_rx_data[1].rbd_bufsize & ET_RXDMA_CTRL_RING1_SIZE_MASK) |
sys/dev/et/if_et.c
2001
CSR_WRITE_4(sc, ET_RXDMA_CTRL, val);
sys/dev/et/if_et.c
412
uint32_t val;
sys/dev/et/if_et.c
419
val = (phy << ET_MII_ADDR_PHY_SHIFT) & ET_MII_ADDR_PHY_MASK;
sys/dev/et/if_et.c
420
val |= (reg << ET_MII_ADDR_REG_SHIFT) & ET_MII_ADDR_REG_MASK;
sys/dev/et/if_et.c
421
CSR_WRITE_4(sc, ET_MII_ADDR, val);
sys/dev/et/if_et.c
429
val = CSR_READ_4(sc, ET_MII_IND);
sys/dev/et/if_et.c
430
if ((val & (ET_MII_IND_BUSY | ET_MII_IND_INVALID)) == 0)
sys/dev/et/if_et.c
443
val = CSR_READ_4(sc, ET_MII_STAT);
sys/dev/et/if_et.c
444
ret = val & ET_MII_STAT_VALUE_MASK;
sys/dev/et/if_et.c
456
uint32_t val;
sys/dev/et/if_et.c
463
val = (phy << ET_MII_ADDR_PHY_SHIFT) & ET_MII_ADDR_PHY_MASK;
sys/dev/et/if_et.c
464
val |= (reg << ET_MII_ADDR_REG_SHIFT) & ET_MII_ADDR_REG_MASK;
sys/dev/et/if_et.c
465
CSR_WRITE_4(sc, ET_MII_ADDR, val);
sys/dev/et/if_et.c
474
val = CSR_READ_4(sc, ET_MII_IND);
sys/dev/et/if_et.c
475
if ((val & ET_MII_IND_BUSY) == 0)
sys/dev/et/if_et.c
673
uint32_t val, max_plsz;
sys/dev/et/if_et.c
681
val = pci_read_config(sc->dev, ET_PCIR_EEPROM_STATUS, 1);
sys/dev/et/if_et.c
682
if (val & ET_PCIM_EEPROM_STATUS_ERROR) {
sys/dev/et/if_et.c
683
device_printf(sc->dev, "EEPROM status error 0x%02x\n", val);
sys/dev/et/if_et.c
696
val = pci_read_config(sc->dev,
sys/dev/et/if_et.c
698
max_plsz = val & PCIEM_CAP_MAX_PAYLOAD;
sys/dev/et/if_et.c
728
val = pci_read_config(sc->dev, ET_PCIR_L0S_L1_LATENCY, 4);
sys/dev/et/if_et.c
729
val &= ~(PCIEM_LINK_CAP_L0S_EXIT | PCIEM_LINK_CAP_L1_EXIT);
sys/dev/et/if_et.c
731
val |= 0x00005000;
sys/dev/et/if_et.c
733
val |= 0x00028000;
sys/dev/et/if_et.c
734
pci_write_config(sc->dev, ET_PCIR_L0S_L1_LATENCY, val, 4);
sys/dev/et/if_et.c
747
uint32_t val;
sys/dev/et/if_et.c
750
val = pci_read_config(dev, ET_PCIR_MAC_ADDR0, 4);
sys/dev/et/if_et.c
752
eaddr[i] = (val >> (8 * i)) & 0xff;
sys/dev/et/if_et.c
754
val = pci_read_config(dev, ET_PCIR_MAC_ADDR1, 2);
sys/dev/et/if_et.c
756
eaddr[i] = (val >> (8 * (i - 4))) & 0xff;
sys/dev/et/if_etvar.h
68
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/et/if_etvar.h
69
bus_write_4((sc)->sc_mem_res, (reg), (val))
sys/dev/etherswitch/ar40xx/ar40xx_hw.c
278
uint32_t val)
sys/dev/etherswitch/ar40xx/ar40xx_hw.c
286
if ((t & mask) == val)
sys/dev/etherswitch/ar40xx/ar40xx_hw.c
297
(unsigned int)reg, t, mask, val);
sys/dev/etherswitch/ar40xx/ar40xx_hw.h
35
uint32_t mask, uint32_t val);
sys/dev/etherswitch/ar40xx/ar40xx_hw_atu.c
106
uint32_t val;
sys/dev/etherswitch/ar40xx/ar40xx_hw_atu.c
122
val = AR40XX_ATU_FUNC_OP_FLUSH_UNICAST;
sys/dev/etherswitch/ar40xx/ar40xx_hw_atu.c
123
val |= (port << AR40XX_ATU_FUNC_PORT_NUM_S)
sys/dev/etherswitch/ar40xx/ar40xx_hw_atu.c
127
val | AR40XX_ATU_FUNC_BUSY);
sys/dev/etherswitch/ar40xx/ar40xx_hw_atu.c
137
uint32_t ret0, ret1, ret2, val;
sys/dev/etherswitch/ar40xx/ar40xx_hw_atu.c
174
val = AR40XX_REG_READ(sc, AR40XX_REG_ATU_FUNC);
sys/dev/etherswitch/ar40xx/ar40xx_hw_atu.c
175
val |= AR40XX_ATU_FUNC_BUSY;
sys/dev/etherswitch/ar40xx/ar40xx_hw_atu.c
176
AR40XX_REG_WRITE(sc, AR40XX_REG_ATU_FUNC, val);
sys/dev/etherswitch/ar40xx/ar40xx_hw_mib.c
172
uint64_t val;
sys/dev/etherswitch/ar40xx/ar40xx_hw_mib.c
182
val = 0;
sys/dev/etherswitch/ar40xx/ar40xx_hw_mib.c
184
val = AR40XX_REG_READ(sc, base + ar40xx_mibs[i].offset);
sys/dev/etherswitch/ar40xx/ar40xx_hw_mib.c
187
val |= ((uint64_t) reg << 32);
sys/dev/etherswitch/ar40xx/ar40xx_hw_mib.c
190
device_printf(sc->sc_dev, "%s[%d] = %llu\n", ar40xx_mibs[i].name, port, val);
sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c
83
uint32_t val)
sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c
86
reg, val);
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
112
uint32_t op, val, mode;
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
120
val = AR40XX_VTU_FUNC0_VALID | AR40XX_VTU_FUNC0_IVL;
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
134
val |= mode << AR40XX_VTU_FUNC0_EG_MODE_S(i);
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
136
ret = ar40xx_hw_vtu_op(sc, op, val);
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
162
uint32_t op, reg, val;
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
183
val = reg >> AR40XX_VTU_FUNC0_EG_MODE_S(i);
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
184
val = val & 0x3;
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
186
if (val == AR40XX_VTU_FUNC0_EG_MODE_TAG) {
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
188
} else if (val == AR40XX_VTU_FUNC0_EG_MODE_UNTAG) {
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
78
ar40xx_hw_vtu_op(struct ar40xx_softc *sc, uint32_t op, uint32_t val)
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
84
__func__, op, val);
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.c
92
AR40XX_REG_WRITE(sc, AR40XX_REG_VTU_FUNC0, val);
sys/dev/etherswitch/ar40xx/ar40xx_hw_vtu.h
31
uint32_t val);
sys/dev/etherswitch/ar40xx/ar40xx_main.c
123
ar40xx_writephy(device_t dev, int phy, int reg, int val)
sys/dev/etherswitch/ar40xx/ar40xx_main.c
127
return MDIO_WRITEREG(sc->sc_mdio_dev, phy, reg, val);
sys/dev/etherswitch/ar40xx/ar40xx_main.c
166
int val = 0;
sys/dev/etherswitch/ar40xx/ar40xx_main.c
172
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/etherswitch/ar40xx/ar40xx_main.c
176
if (val < 0 || val > 5) {
sys/dev/etherswitch/ar40xx/ar40xx_main.c
182
device_printf(sc->sc_dev, "port %d: PORT_STATUS=0x%08x\n", val,
sys/dev/etherswitch/ar40xx/ar40xx_main.c
183
AR40XX_REG_READ(sc, AR40XX_REG_PORT_STATUS(val)));
sys/dev/etherswitch/ar40xx/ar40xx_main.c
184
device_printf(sc->sc_dev, "port %d: PORT_HEADER=0x%08x\n", val,
sys/dev/etherswitch/ar40xx/ar40xx_main.c
185
AR40XX_REG_READ(sc, AR40XX_REG_PORT_HEADER(val)));
sys/dev/etherswitch/ar40xx/ar40xx_main.c
186
device_printf(sc->sc_dev, "port %d: PORT_VLAN0=0x%08x\n", val,
sys/dev/etherswitch/ar40xx/ar40xx_main.c
187
AR40XX_REG_READ(sc, AR40XX_REG_PORT_VLAN0(val)));
sys/dev/etherswitch/ar40xx/ar40xx_main.c
188
device_printf(sc->sc_dev, "port %d: PORT_VLAN1=0x%08x\n", val,
sys/dev/etherswitch/ar40xx/ar40xx_main.c
189
AR40XX_REG_READ(sc, AR40XX_REG_PORT_VLAN1(val)));
sys/dev/etherswitch/ar40xx/ar40xx_main.c
190
device_printf(sc->sc_dev, "port %d: PORT_LOOKUP=0x%08x\n", val,
sys/dev/etherswitch/ar40xx/ar40xx_main.c
191
AR40XX_REG_READ(sc, AR40XX_REG_PORT_LOOKUP(val)));
sys/dev/etherswitch/ar40xx/ar40xx_main.c
192
device_printf(sc->sc_dev, "port %d: PORT_HOL_CTRL1=0x%08x\n", val,
sys/dev/etherswitch/ar40xx/ar40xx_main.c
193
AR40XX_REG_READ(sc, AR40XX_REG_PORT_HOL_CTRL1(val)));
sys/dev/etherswitch/ar40xx/ar40xx_main.c
195
val, AR40XX_REG_READ(sc, AR40XX_REG_PORT_FLOWCTRL_THRESH(val)));
sys/dev/etherswitch/ar40xx/ar40xx_main.c
206
int val = 0;
sys/dev/etherswitch/ar40xx/ar40xx_main.c
212
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/etherswitch/ar40xx/ar40xx_main.c
216
if (val < 0 || val > 5) {
sys/dev/etherswitch/ar40xx/ar40xx_main.c
224
(void) ar40xx_hw_mib_fetch(sc, val);
sys/dev/etherswitch/ar40xx/ar40xx_var.h
37
#define AR40XX_REG_WRITE(sc, reg, val) do { \
sys/dev/etherswitch/ar40xx/ar40xx_var.h
38
bus_write_4(sc->sc_ess_mem_res, (reg), (val)); \
sys/dev/etherswitch/arswitch/arswitch.c
1257
arswitch_writephy(device_t dev, int phy, int reg, int val)
sys/dev/etherswitch/arswitch/arswitch.c
1261
return (sc->hal.arswitch_phy_write(dev, phy, reg, val));
sys/dev/etherswitch/arswitch/arswitch.c
304
int ret, val;
sys/dev/etherswitch/arswitch/arswitch.c
312
val = AR8216_ATU_OP_FLUSH_UNICAST;
sys/dev/etherswitch/arswitch/arswitch.c
317
val |= SM(port, AR8216_ATU_PORT_NUM);
sys/dev/etherswitch/arswitch/arswitch.c
326
val | AR8216_ATU_ACTIVE);
sys/dev/etherswitch/arswitch/arswitch.c
342
uint32_t ret0, ret1, ret2, val;
sys/dev/etherswitch/arswitch/arswitch.c
370
val = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU);
sys/dev/etherswitch/arswitch/arswitch.c
371
val |= AR8216_ATU_ACTIVE;
sys/dev/etherswitch/arswitch/arswitch.c
372
arswitch_writereg(sc->sc_dev, AR8216_REG_ATU, val);
sys/dev/etherswitch/arswitch/arswitch.c
416
uint32_t val;
sys/dev/etherswitch/arswitch/arswitch.c
431
val = 0;
sys/dev/etherswitch/arswitch/arswitch.c
432
val |= AR8216_ATU_CTRL_ARP_EN;
sys/dev/etherswitch/arswitch/arswitch.c
433
val |= AR8216_ATU_CTRL_LEARN_CHANGE;
sys/dev/etherswitch/arswitch/arswitch.c
434
val |= AR8216_ATU_CTRL_AGE_EN;
sys/dev/etherswitch/arswitch/arswitch.c
435
val |= 0x2b; /* 5 minutes; bits 15:0 */
sys/dev/etherswitch/arswitch/arswitch.c
439
val);
sys/dev/etherswitch/arswitch/arswitch.c
943
uint32_t val;
sys/dev/etherswitch/arswitch/arswitch.c
946
val = arswitch_readreg(dev,
sys/dev/etherswitch/arswitch/arswitch.c
948
val = (val>>ar8327_led_mapping[p->es_port-1][led].shift)&0x03;
sys/dev/etherswitch/arswitch/arswitch.c
952
if (led_pattern_table[style] == val) break;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1082
uint32_t val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1090
val = AR8327_ATU_FUNC_OP_FLUSH_UNICAST;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1091
val |= SM(port, AR8327_ATU_FUNC_PORT_NUM);
sys/dev/etherswitch/arswitch/arswitch_8327.c
1096
val | AR8327_ATU_FUNC_BUSY);
sys/dev/etherswitch/arswitch/arswitch_8327.c
1108
uint32_t ret0, ret1, ret2, val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1135
val = arswitch_readreg(sc->sc_dev, AR8327_REG_ATU_FUNC);
sys/dev/etherswitch/arswitch/arswitch_8327.c
1136
val |= AR8327_ATU_FUNC_BUSY;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1137
arswitch_writereg(sc->sc_dev, AR8327_REG_ATU_FUNC, val);
sys/dev/etherswitch/arswitch/arswitch_8327.c
1192
uint32_t op, reg, val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1214
val = reg >> AR8327_VTU_FUNC0_EG_MODE_S(i);
sys/dev/etherswitch/arswitch/arswitch_8327.c
1215
val = val & 0x3;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1217
if (val == AR8327_VTU_FUNC0_EG_MODE_TAG) {
sys/dev/etherswitch/arswitch/arswitch_8327.c
1219
} else if (val == AR8327_VTU_FUNC0_EG_MODE_UNTAG) {
sys/dev/etherswitch/arswitch/arswitch_8327.c
1233
uint32_t op, val, mode;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1249
val = AR8327_VTU_FUNC0_VALID | AR8327_VTU_FUNC0_IVL;
sys/dev/etherswitch/arswitch/arswitch_8327.c
1259
val |= mode << AR8327_VTU_FUNC0_EG_MODE_S(i);
sys/dev/etherswitch/arswitch/arswitch_8327.c
1262
return (ar8327_vlan_op(sc, op, vid, val));
sys/dev/etherswitch/arswitch/arswitch_8327.c
323
int val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
327
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
331
sbuf, &val);
sys/dev/etherswitch/arswitch/arswitch_8327.c
332
if (val != 1)
sys/dev/etherswitch/arswitch/arswitch_8327.c
340
sbuf, &val) == 0) {
sys/dev/etherswitch/arswitch/arswitch_8327.c
341
switch (val) {
sys/dev/etherswitch/arswitch/arswitch_8327.c
356
val);
sys/dev/etherswitch/arswitch/arswitch_8327.c
364
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
365
pcfg->duplex = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
370
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
371
pcfg->txpause = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
376
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
377
pcfg->rxpause = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
416
int val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
420
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
424
sbuf, &val) != 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
428
pc->mode = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
433
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
434
pc->rxclk_sel = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
439
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
440
pc->txclk_sel = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
445
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
446
pc->txclk_delay_sel = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
451
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
452
pc->rxclk_delay_sel = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
457
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
458
pc->txclk_delay_en = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
463
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
464
pc->rxclk_delay_en = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
469
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
470
pc->sgmii_delay_en = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
475
sbuf, &val) == 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
476
pc->pipe_rxclk_sel = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
506
int val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
509
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
512
"sgmii.ctrl", &val) != 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
514
scfg->sgmii_ctrl = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
517
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
520
"sgmii.serdes_aen", &val) != 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
522
scfg->serdes_aen = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
534
int val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
536
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
539
"led.ctrl0", &val) != 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
541
lcfg->led_ctrl0 = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
543
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
546
"led.ctrl1", &val) != 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
548
lcfg->led_ctrl1 = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
550
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
553
"led.ctrl2", &val) != 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
555
lcfg->led_ctrl2 = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
557
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
560
"led.ctrl3", &val) != 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
562
lcfg->led_ctrl3 = val;
sys/dev/etherswitch/arswitch/arswitch_8327.c
564
val = 0;
sys/dev/etherswitch/arswitch/arswitch_8327.c
567
"led.open_drain", &val) != 0)
sys/dev/etherswitch/arswitch/arswitch_8327.c
569
lcfg->open_drain = val;
sys/dev/etherswitch/arswitch/arswitch_reg.c
235
arswitch_waitreg(device_t dev, int addr, int mask, int val, int timeout)
sys/dev/etherswitch/arswitch/arswitch_reg.c
249
if (v == val) {
sys/dev/etherswitch/arswitch/arswitch_reg.c
261
__func__, addr, mask, val);
sys/dev/etherswitch/e6000sw/e6000sw.c
1196
e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
sys/dev/etherswitch/e6000sw/e6000sw.c
1207
addr_reg % 32, val);
sys/dev/etherswitch/e6000sw/e6000sw.c
1489
e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
sys/dev/etherswitch/e6000sw/e6000sw.c
1495
MDIO_WRITE(sc->dev, addr, reg, val);
sys/dev/etherswitch/e6000sw/e6000sw.c
1503
MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
sys/dev/etherswitch/e6000sw/e6000sw.c
410
e6000sw_check_hint_val(device_t dev, int *val, char *fmt, ...)
sys/dev/etherswitch/e6000sw/e6000sw.c
425
resname, val);
sys/dev/etherswitch/e6000sw/e6000sw.c
434
int err, val;
sys/dev/etherswitch/e6000sw/e6000sw.c
436
err = e6000sw_check_hint_val(sc->dev, &val, "port%ddisabled", port);
sys/dev/etherswitch/e6000sw/e6000sw.c
437
if (err == 0 && val != 0)
sys/dev/etherswitch/e6000sw/e6000sw.c
440
err = e6000sw_check_hint_val(sc->dev, &val, "port%dcpu", port);
sys/dev/etherswitch/e6000sw/e6000sw.c
441
if (err == 0 && val != 0) {
sys/dev/etherswitch/e6000sw/e6000sw.c
447
err = e6000sw_check_hint_val(sc->dev, &val, "port%dspeed", port);
sys/dev/etherswitch/e6000sw/e6000sw.c
448
if (err == 0 && val != 0) {
sys/dev/etherswitch/e6000sw/e6000sw.c
450
if (val == 2500)
sys/dev/etherswitch/e6000sw/e6000sw.c
735
e6000sw_write_xmdio(device_t dev, int phy, int devaddr, int devreg, int val)
sys/dev/etherswitch/e6000sw/e6000sw.c
76
#define MDIO_WRITE(dev, addr, reg, val) \
sys/dev/etherswitch/e6000sw/e6000sw.c
77
MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
sys/dev/etherswitch/e6000sw/e6000sw.c
793
uint32_t val;
sys/dev/etherswitch/e6000sw/e6000sw.c
816
val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG);
sys/dev/etherswitch/e6000sw/e6000sw.c
818
return (val & PHY_DATA_MASK);
sys/dev/etherswitch/etherswitch.c
155
reg->val = ETHERSWITCH_READREG(etherswitch, reg->reg);
sys/dev/etherswitch/etherswitch.c
162
error = ETHERSWITCH_WRITEREG(etherswitch, reg->reg, reg->val);
sys/dev/etherswitch/etherswitch.c
184
phyreg->val = ETHERSWITCH_READPHYREG(etherswitch, phyreg->phy, phyreg->reg);
sys/dev/etherswitch/etherswitch.c
189
error = ETHERSWITCH_WRITEPHYREG(etherswitch, phyreg->phy, phyreg->reg, phyreg->val);
sys/dev/etherswitch/etherswitch.h
16
uint32_t val;
sys/dev/etherswitch/etherswitch.h
23
uint16_t val;
sys/dev/etherswitch/felix/felix.c
776
felix_writereg_wrapper(device_t dev, int addr_reg, int val)
sys/dev/etherswitch/felix/felix.c
784
FELIX_WR4(sc, addr_reg, val);
sys/dev/etherswitch/ip17x/ip17x_phy.c
100
val = ip17x_readphy(dev, phy, reg);
sys/dev/etherswitch/ip17x/ip17x_phy.c
101
val &= ~mask;
sys/dev/etherswitch/ip17x/ip17x_phy.c
102
val |= value;
sys/dev/etherswitch/ip17x/ip17x_phy.c
103
return (ip17x_writephy(dev, phy, reg, val));
sys/dev/etherswitch/ip17x/ip17x_phy.c
98
int val;
sys/dev/etherswitch/miiproxy.c
292
miiproxy_writereg(device_t dev, int phy, int reg, int val)
sys/dev/etherswitch/miiproxy.c
297
return (MDIO_WRITEREG(sc->mdio, phy, reg, val));
sys/dev/etherswitch/mtkswitch/mtkswitch.c
595
mtkswitch_writephy(device_t dev, int phy, int reg, int val)
sys/dev/etherswitch/mtkswitch/mtkswitch.c
599
return (sc->hal.mtkswitch_phy_write(dev, phy, reg, val));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
100
mtkswitch_phy_write(device_t dev, int phy, int reg, int val)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
110
res = mtkswitch_phy_write_locked(sc, phy, reg, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
124
mtkswitch_reg_write32(struct mtkswitch_softc *sc, int reg, uint32_t val)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
127
MTKSWITCH_WRITE(sc, reg, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
146
mtkswitch_reg_write32_mt7621(struct mtkswitch_softc *sc, int reg, uint32_t val)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
152
MTKSWITCH_REG_LO(reg), MTKSWITCH_VAL_LO(val));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
154
MTKSWITCH_REG_HI(reg), MTKSWITCH_VAL_HI(val));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
162
uint32_t val;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
164
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_REG32(reg));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
166
return (MTKSWITCH_HI16(val));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
167
return (MTKSWITCH_LO16(val));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
171
mtkswitch_reg_write(device_t dev, int reg, int val)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
179
tmp |= MTKSWITCH_TO_HI16(val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
182
tmp |= MTKSWITCH_TO_LO16(val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
222
uint32_t val;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
227
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_PCR(port));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
228
val |= PCR_PORT_VLAN_SECURE;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
229
sc->hal.mtkswitch_write(sc, MTKSWITCH_PCR(port), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
232
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_PVC(port));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
233
val &= ~PVC_VLAN_ATTR_MASK;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
234
sc->hal.mtkswitch_write(sc, MTKSWITCH_PVC(port), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
236
val = PMCR_CFG_DEFAULT;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
238
val |= PMCR_FORCE_LINK | PMCR_FORCE_DPX | PMCR_FORCE_SPD_1000 |
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
241
sc->hal.mtkswitch_write(sc, MTKSWITCH_PMCR(port), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
247
uint32_t val, res, tmp;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
251
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_PMSR(port));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
253
if (val & PMSR_MAC_LINK_STS)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
255
if (val & PMSR_MAC_DPX_STS)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
257
tmp = PMSR_MAC_SPD(val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
264
if (val & PMSR_TX_FC_STS)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
266
if (val & PMSR_RX_FC_STS)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
352
uint32_t val, vid, i;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
360
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VTIM(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
361
val &= ~(VTIM_MASK << VTIM_OFF(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
362
val |= ((i + 1) << VTIM_OFF(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
363
sc->hal.mtkswitch_write(sc, MTKSWITCH_VTIM(i), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
375
val = VAWD1_IVL_MAC | VAWD1_VTAG_EN | VAWD1_VALID;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
377
val |= VAWD1_PORT_MEMBER(i);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
378
sc->hal.mtkswitch_write(sc, MTKSWITCH_VAWD1, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
380
val = VTCR_BUSY | VTCR_FUNC_VID_WRITE | vid;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
381
sc->hal.mtkswitch_write(sc, MTKSWITCH_VTCR, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
394
uint32_t val, i;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
421
while ((val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR)) & VTCR_BUSY);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
422
if (val & VTCR_IDX_INVALID) {
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
427
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VAWD1);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
428
if (val & VAWD1_VALID)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
434
v->es_member_ports = (val >> VAWD1_MEMBER_OFF) & VAWD1_MEMBER_MASK;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
436
val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VAWD2);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
438
if ((val & VAWD2_PORT_MASK(i)) == VAWD2_PORT_UNTAGGED(i))
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
449
uint32_t val, i, vid;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
464
val = sc->hal.mtkswitch_read(sc,
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
466
val &= ~(VTIM_MASK << VTIM_OFF(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
467
val |= ((v->es_vid & VTIM_MASK) << VTIM_OFF(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
469
val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
475
val = VAWD1_IVL_MAC | VAWD1_VTAG_EN | VAWD1_VALID;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
476
val |= ((v->es_member_ports & VAWD1_MEMBER_MASK) << VAWD1_MEMBER_OFF);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
477
sc->hal.mtkswitch_write(sc, MTKSWITCH_VAWD1, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
480
val = 0;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
483
val |= VAWD2_PORT_TAGGED(i);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
484
sc->hal.mtkswitch_write(sc, MTKSWITCH_VAWD2, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
489
while ((val = sc->hal.mtkswitch_read(sc, MTKSWITCH_VTCR)) & VTCR_BUSY);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
493
if (val & VTCR_IDX_INVALID)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
514
uint32_t val;
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
517
val = PPBV_VID(pvid & PPBV_VID_MASK);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
518
sc->hal.mtkswitch_write(sc, MTKSWITCH_PPBV1(port), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
519
sc->hal.mtkswitch_write(sc, MTKSWITCH_PPBV2(port), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
88
int val)
sys/dev/etherswitch/mtkswitch/mtkswitch_mt7620.c
93
(val & PIAC_MDIO_RW_DATA_MASK) | PIAC_MDIO_CMD_WRITE);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
101
val = (MTKSWITCH_READ(sc, MTKSWITCH_PCR1) >> PCR1_DATA_OFF) &
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
104
return (val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
108
mtkswitch_phy_write(device_t dev, int phy, int reg, int val)
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
116
PCR0_PHY(phy) | PCR0_DATA(val));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
169
uint32_t val, res;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
173
val = MTKSWITCH_READ(sc, MTKSWITCH_POA);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
175
if (val & POA_PRT_LINK(port))
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
177
if (val & POA_PRT_DPX(port))
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
181
if (val & POA_FE_SPEED(port))
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
183
if (val & POA_FE_XFC(port))
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
186
switch (POA_GE_SPEED(val, port)) {
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
198
val = POA_GE_XFC(val, port);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
199
if (val & POA_GE_XFC_TX_MSK)
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
201
if (val & POA_GE_XFC_RX_MSK)
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
217
uint32_t val;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
238
val = MTKSWITCH_READ(sc, MTKSWITCH_SGC2);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
240
val |= SGC2_DOUBLE_TAG_PORT(p->es_port);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
242
val &= ~SGC2_DOUBLE_TAG_PORT(p->es_port);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
243
MTKSWITCH_WRITE(sc, MTKSWITCH_SGC2, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
245
val = MTKSWITCH_READ(sc, MTKSWITCH_POC2);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
247
if (val & POC2_UNTAG_PORT(p->es_port))
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
248
val &= ~POC2_UNTAG_PORT(p->es_port);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
250
val |= POC2_UNTAG_PORT(p->es_port);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
252
val |= POC2_UNTAG_PORT(p->es_port);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
254
val &= ~POC2_UNTAG_PORT(p->es_port);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
255
MTKSWITCH_WRITE(sc, MTKSWITCH_POC2, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
264
uint32_t val;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
274
val = MTKSWITCH_READ(sc, MTKSWITCH_SGC2);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
275
if (val & SGC2_DOUBLE_TAG_PORT(p->es_port))
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
278
val = MTKSWITCH_READ(sc, MTKSWITCH_POC2);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
279
if (val & POC2_UNTAG_PORT(p->es_port))
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
292
uint32_t val, vid;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
307
val = MTKSWITCH_READ(sc, MTKSWITCH_VLANI(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
308
val &= ~(VLANI_MASK << VLANI_OFF(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
309
val |= ((i + 1) << VLANI_OFF(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
310
MTKSWITCH_WRITE(sc, MTKSWITCH_VLANI(i), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
315
val = MTKSWITCH_READ(sc, MTKSWITCH_VMSC(vid));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
316
val &= ~(VMSC_MASK << VMSC_OFF(vid));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
317
val |= (((1<<sc->numports)-1) << VMSC_OFF(vid));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
318
MTKSWITCH_WRITE(sc, MTKSWITCH_VMSC(vid), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
320
val = MTKSWITCH_READ(sc, MTKSWITCH_VUB(vid));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
321
val &= ~(VUB_MASK << VUB_OFF(vid));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
322
val |= (((1<<sc->numports)-1) << VUB_OFF(vid));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
323
MTKSWITCH_WRITE(sc, MTKSWITCH_VUB(vid), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
325
val = MTKSWITCH_READ(sc, MTKSWITCH_POC2);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
327
val |= POC2_UNTAG_VLAN;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
328
val |= ((1<<sc->numports)-1);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
329
MTKSWITCH_WRITE(sc, MTKSWITCH_POC2, val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
337
val = MTKSWITCH_READ(sc, MTKSWITCH_PVID(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
338
val &= ~(PVID_MASK << PVID_OFF(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
339
val |= (vid << PVID_OFF(i));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
340
MTKSWITCH_WRITE(sc, MTKSWITCH_PVID(i), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
349
uint32_t val;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
379
val = MTKSWITCH_READ(sc, MTKSWITCH_POC2);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
381
if ((val & POC2_UNTAG_VLAN) && sc->sc_switchtype != MTK_SWITCH_RT3050) {
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
382
val = (MTKSWITCH_READ(sc, MTKSWITCH_VUB(v->es_vlangroup)) >>
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
385
val &= VUB_MASK;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
387
v->es_untagged_ports &= val;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
396
uint32_t val, tmp;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
405
val = MTKSWITCH_READ(sc, MTKSWITCH_POC2);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
407
(val & POC2_UNTAG_VLAN) == 0) {
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
416
val &= VUB_MASK;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
428
if ((tmp & val) != tmp) {
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
437
if ((tmp & val) != 0) {
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
444
val = MTKSWITCH_READ(sc, MTKSWITCH_VUB(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
445
val &= ~(VUB_MASK << VUB_OFF(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
446
val |= (((v->es_untagged_ports) & VUB_MASK) <<
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
448
MTKSWITCH_WRITE(sc, MTKSWITCH_VUB(v->es_vlangroup), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
452
val = MTKSWITCH_READ(sc, MTKSWITCH_VLANI(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
453
val &= ~(VLANI_MASK << VLANI_OFF(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
454
val |= (v->es_vid & VLANI_MASK) << VLANI_OFF(v->es_vlangroup);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
455
MTKSWITCH_WRITE(sc, MTKSWITCH_VLANI(v->es_vlangroup), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
458
val = MTKSWITCH_READ(sc, MTKSWITCH_VMSC(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
459
val &= ~(VMSC_MASK << VMSC_OFF(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
460
val |= (v->es_member_ports << VMSC_OFF(v->es_vlangroup));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
461
MTKSWITCH_WRITE(sc, MTKSWITCH_VMSC(v->es_vlangroup), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
483
uint32_t val;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
486
val = MTKSWITCH_READ(sc, MTKSWITCH_PVID(port));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
487
val &= ~(PVID_MASK << PVID_OFF(port));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
488
val |= (pvid & PVID_MASK) << PVID_OFF(port);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
489
MTKSWITCH_WRITE(sc, MTKSWITCH_PVID(port), val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
60
uint32_t val;
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
63
val = MTKSWITCH_READ(sc, MTKSWITCH_REG32(reg));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
65
return (MTKSWITCH_HI16(val));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
66
return (MTKSWITCH_LO16(val));
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
70
mtkswitch_reg_write(device_t dev, int reg, int val)
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
79
tmp |= MTKSWITCH_TO_HI16(val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
82
tmp |= MTKSWITCH_TO_LO16(val);
sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.c
93
int val;
sys/dev/evdev/evdev.h
108
int32_t val[MT_CNT];
sys/dev/evdev/evdev.h
127
offsetof(union evdev_mt_slot, val[ABS_MT_INDEX(ABS_MT_TOOL_Y)]),
sys/dev/evdev/evdev_mt.c
188
state->val[ABS_MT_INDEX(i)]);
sys/dev/evdev/evdev_mt.c
438
val[ABS_MT_INDEX(code)] = value;
sys/dev/evdev/evdev_mt.c
498
return (mt->slots[slot].val[ABS_MT_INDEX(code)]);
sys/dev/evdev/evdev_mt.c
515
mt->slots[slot].val[ABS_MT_INDEX(code)] = value;
sys/dev/exca/exca.c
150
exca_mem_putb(struct exca_softc *sc, int reg, uint8_t val)
sys/dev/exca/exca.c
152
bus_space_write_1(sc->bst, sc->bsh, sc->offset + reg, val);
sys/dev/exca/exca.c
163
exca_io_putb(struct exca_softc *sc, int reg, uint8_t val)
sys/dev/exca/exca.c
166
bus_space_write_1(sc->bst, sc->bsh, EXCA_REG_DATA, val);
sys/dev/exca/excavar.h
136
exca_putb(struct exca_softc *sc, int reg, uint8_t val)
sys/dev/exca/excavar.h
138
sc->putb(sc, reg, val);
sys/dev/fb/fbreg.h
128
typedef int vi_fill_rect_t(video_adapter_t *adp, int val, int x, int y,
sys/dev/fb/fbreg.h
228
#define vidd_fill_rect(adp, val, x, y, cx, cy) \
sys/dev/fb/fbreg.h
229
(*vidsw[(adp)->va_index]->fill_rect)((adp), (val), (x), (y), \
sys/dev/fb/fbreg.h
66
void ofwfb_writew(u_int16_t *addr, u_int16_t val);
sys/dev/fb/fbreg.h
76
fillw(int val, uint16_t *buf, size_t size)
sys/dev/fb/fbreg.h
79
*buf++ = val;
sys/dev/fb/s3_pci.c
404
s3lfb_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/s3_pci.c
406
return (*prevvidsw->fill_rect)(adp, val, x, y, cx, cy);
sys/dev/fb/splash_bmp.c
241
bmp_SetPix(BMP_INFO *info, int x, int y, u_char val)
sys/dev/fb/splash_bmp.c
273
outw(GDCIDX, (val << 8) | 0x00); /* set/reset */
sys/dev/fb/splash_bmp.c
285
*(info->vidmem+sofs) = val;
sys/dev/fb/splash_bmp.c
300
u_char val;
sys/dev/fb/splash_bmp.c
340
val = *(info->index + 2 + (count / 2)); /* byte with nybbles */
sys/dev/fb/splash_bmp.c
342
val &= 0xf; /* get low nybble */
sys/dev/fb/splash_bmp.c
344
val = (val >> 4); /* get high nybble */
sys/dev/fb/splash_bmp.c
346
bmp_SetPix(info, x, y, val);
sys/dev/fb/splash_bmp.c
418
u_char val, mask, *p;
sys/dev/fb/splash_bmp.c
432
val = *p & 0xf; /* get low nybble */
sys/dev/fb/splash_bmp.c
435
val = *p >> 4; /* get high nybble */
sys/dev/fb/splash_bmp.c
437
bmp_SetPix(info, x, line, val);
sys/dev/fb/splash_bmp.c
446
val = (*p & mask) ? 1 : 0;
sys/dev/fb/splash_bmp.c
452
bmp_SetPix(info, x, line, val);
sys/dev/fb/vesa.c
1664
vesa_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/vesa.c
1667
return ((*prevvidsw->fill_rect)(adp, val, x, y, cx, cy));
sys/dev/fb/vga.c
1331
fill(int val, void *d, size_t size)
sys/dev/fb/vga.c
1336
*p++ = val;
sys/dev/fb/vga.c
1341
filll_io(int val, vm_offset_t d, size_t size)
sys/dev/fb/vga.c
1344
writel(d, val);
sys/dev/fb/vga.c
1798
u_char val = 0;
sys/dev/fb/vga.c
1826
outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */
sys/dev/fb/vga.c
1827
outb(TSIDX, 0x01); outb(TSREG, val | 0x20);
sys/dev/fb/vga.c
1848
outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */
sys/dev/fb/vga.c
1878
u_char val = 0;
sys/dev/fb/vga.c
1906
outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */
sys/dev/fb/vga.c
1907
outb(TSIDX, 0x01); outb(TSREG, val | 0x20);
sys/dev/fb/vga.c
1928
outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */
sys/dev/fb/vga.c
2387
u_char val;
sys/dev/fb/vga.c
2397
val = inb(TSREG);
sys/dev/fb/vga.c
2399
outb(TSREG, val | 0x20);
sys/dev/fb/vga.c
2401
val = inb(adp->va_crtc_addr + 1);
sys/dev/fb/vga.c
2402
outb(adp->va_crtc_addr + 1, val & ~0x80);
sys/dev/fb/vga.c
2406
val = inb(TSREG);
sys/dev/fb/vga.c
2408
outb(TSREG, val | 0x20);
sys/dev/fb/vga.c
2412
val = inb(TSREG);
sys/dev/fb/vga.c
2414
outb(TSREG, val & 0xDF);
sys/dev/fb/vga.c
2416
val = inb(adp->va_crtc_addr + 1);
sys/dev/fb/vga.c
2417
outb(adp->va_crtc_addr + 1, val | 0x80);
sys/dev/fb/vga.c
2490
planar_fill(video_adapter_t *adp, int val)
sys/dev/fb/vga.c
2500
outw(GDCIDX, (val << 8) | 0x00); /* set/reset */
sys/dev/fb/vga.c
2515
packed_fill(video_adapter_t *adp, int val)
sys/dev/fb/vga.c
2526
fill_io(val, adp->va_window, l);
sys/dev/fb/vga.c
2533
direct_fill(video_adapter_t *adp, int val)
sys/dev/fb/vga.c
2546
fillw_io(val, adp->va_window, l/sizeof(u_int16_t));
sys/dev/fb/vga.c
2552
filll_io(val, adp->va_window, l/sizeof(u_int32_t));
sys/dev/fb/vga.c
2582
planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/vga.c
2595
outw(GDCIDX, (val << 8) | 0x00); /* set/reset */
sys/dev/fb/vga.c
2651
packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/vga.c
2670
fill_io(val, adp->va_window + offset,
sys/dev/fb/vga.c
2677
fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size);
sys/dev/fb/vga.c
2685
direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/vga.c
2708
fillw_io(val, adp->va_window + offset,
sys/dev/fb/vga.c
2715
fillw_io(val, adp->va_window, end/sizeof(u_int16_t));
sys/dev/fb/vga.c
2723
direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/vga.c
2734
b[0] = val & 0x0000ff;
sys/dev/fb/vga.c
2735
b[1] = (val >> 8) & 0x0000ff;
sys/dev/fb/vga.c
2736
b[2] = (val >> 16) & 0x0000ff;
sys/dev/fb/vga.c
2767
direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/vga.c
2790
filll_io(val, adp->va_window + offset,
sys/dev/fb/vga.c
2797
filll_io(val, adp->va_window, end/sizeof(u_int32_t));
sys/dev/fb/vga.c
2805
vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/vga.c
2812
planar_fill_rect(adp, val, x, y, cx, cy);
sys/dev/fb/vga.c
2815
packed_fill_rect(adp, val, x, y, cx, cy);
sys/dev/fb/vga.c
2820
direct_fill_rect16(adp, val, x, y, cx, cy);
sys/dev/fb/vga.c
2823
direct_fill_rect24(adp, val, x, y, cx, cy);
sys/dev/fb/vga.c
2826
direct_fill_rect32(adp, val, x, y, cx, cy);
sys/dev/fb/vga.c
2835
vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/dev/fb/vga.c
438
static void filll_io(int val, vm_offset_t d, size_t size);
sys/dev/fb/vga.c
439
static void planar_fill(video_adapter_t *adp, int val);
sys/dev/fb/vga.c
440
static void packed_fill(video_adapter_t *adp, int val);
sys/dev/fb/vga.c
441
static void direct_fill(video_adapter_t *adp, int val);
sys/dev/fb/vga.c
443
static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y,
sys/dev/fb/vga.c
445
static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y,
sys/dev/fb/vga.c
447
static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y,
sys/dev/fb/vga.c
449
static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y,
sys/dev/fb/vga.c
451
static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y,
sys/dev/fdt/simple_mfd.c
102
bus_write_4(sc->mem_res, offset, val);
sys/dev/fdt/simple_mfd.c
111
uint32_t val;
sys/dev/fdt/simple_mfd.c
115
val = bus_read_4(sc->mem_res, offset);
sys/dev/fdt/simple_mfd.c
116
val &= ~clear_bits;
sys/dev/fdt/simple_mfd.c
117
val |= set_bits;
sys/dev/fdt/simple_mfd.c
118
bus_write_4(sc->mem_res, offset, val);
sys/dev/fdt/simple_mfd.c
60
uint32_t val);
sys/dev/fdt/simple_mfd.c
86
uint32_t val;
sys/dev/fdt/simple_mfd.c
90
val = bus_read_4(sc->mem_res, offset);
sys/dev/fdt/simple_mfd.c
91
return (val);
sys/dev/fdt/simple_mfd.c
96
uint32_t val)
sys/dev/fdt/simplebus.c
400
uint64_t val;
sys/dev/fdt/simplebus.c
440
val = (uint64_t)buffer[i] << 32 | buffer[i + 1];
sys/dev/fdt/simplebus.c
441
((uint64_t *)buffer)[i / 2] = val;
sys/dev/ffec/if_ffec.c
218
WR2(struct ffec_softc *sc, bus_size_t off, uint16_t val)
sys/dev/ffec/if_ffec.c
221
bus_write_2(sc->mem_res, off, val);
sys/dev/ffec/if_ffec.c
232
WR4(struct ffec_softc *sc, bus_size_t off, uint32_t val)
sys/dev/ffec/if_ffec.c
235
bus_write_4(sc->mem_res, off, val);
sys/dev/ffec/if_ffec.c
321
int val;
sys/dev/ffec/if_ffec.c
337
val = RD4(sc, FEC_MMFR_REG) & FEC_MMFR_DATA_MASK;
sys/dev/ffec/if_ffec.c
339
return (val);
sys/dev/ffec/if_ffec.c
343
ffec_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/ffec/if_ffec.c
355
(val & FEC_MMFR_DATA_MASK));
sys/dev/firewire/firewire.c
1497
off = offset + reg[i].val * sizeof(uint32_t);
sys/dev/firewire/fwcrom.c
118
ptr->dir = (struct csrdirectory *) (reg + reg->val);
sys/dev/firewire/fwcrom.c
168
if (reg->key == CSRKEY_SPEC && reg->val == spec)
sys/dev/firewire/fwcrom.c
173
if (reg->key == CSRKEY_VER && reg->val == ver)
sys/dev/firewire/fwcrom.c
197
(vm_offset_t)(reg + reg->val) > CROM_END(cc)) {
sys/dev/firewire/fwcrom.c
201
textleaf = (struct csrtext *)(reg + reg->val);
sys/dev/firewire/fwcrom.c
306
len -= snprintf(buf, len, "%d", reg->val);
sys/dev/firewire/fwcrom.c
314
reg->val, reg->val);
sys/dev/firewire/fwcrom.c
320
dir = (struct csrdirectory *)(reg + reg->val);
sys/dev/firewire/fwcrom.c
342
crom_desc_specver(0, reg->val, buf, len);
sys/dev/firewire/fwcrom.c
406
crom_add_entry(struct crom_chunk *chunk, int key, int val)
sys/dev/firewire/fwcrom.c
415
foo.reg.val = val;
sys/dev/firewire/fwcrom.c
503
reg->val = offset -
sys/dev/firewire/iec13213.h
129
val:24;
sys/dev/firewire/iec13213.h
131
uint32_t val:24,
sys/dev/firewire/sbp.c
431
lun = reg->val & 0xffff;
sys/dev/firewire/sbp.c
493
lun = reg->val & 0xffff;
sys/dev/firewire/sbp.c
520
sdev->type = (reg->val & 0xff0000) >> 16;
sys/dev/firewire/sbp.c
598
if (reg == NULL || reg->val == 0) {
sys/dev/firewire/sbp.c
604
target->mgm_lo = 0xf0000000 | (reg->val << 2);
sys/dev/firewire/sbp.c
638
if (reg->val == CSRVAL_T10SBP2)
sys/dev/firewire/sbp.c
646
"%06x", reg->val);
sys/dev/flash/w25n.c
139
uint8_t val;
sys/dev/flash/w25n.c
142
err = w25n_read_status_register(sc, STATUS_REG_3, &val);
sys/dev/flash/w25n.c
143
} while (err == 0 && (val & STATUS_REG_3_BUSY));
sys/dev/ftgpio/ftgpio.c
132
uint8_t ioreg, val;
sys/dev/ftgpio/ftgpio.c
135
val = superio_read(sc->dev, ioreg);
sys/dev/ftgpio/ftgpio.c
137
group, val, ioreg);
sys/dev/ftgpio/ftgpio.c
138
return (val);
sys/dev/ftgpio/ftgpio.c
165
uint8_t val;
sys/dev/ftgpio/ftgpio.c
181
val = ftgpio_group_get_output(sc, group);
sys/dev/ftgpio/ftgpio.c
183
val |= (1 << index);
sys/dev/ftgpio/ftgpio.c
185
val &= ~(1 << index);
sys/dev/ftgpio/ftgpio.c
186
ftgpio_group_set_output(sc, group, val);
sys/dev/ftgpio/ftgpio.c
194
uint8_t val;
sys/dev/ftgpio/ftgpio.c
208
val = ftgpio_group_get_output(sc, group);
sys/dev/ftgpio/ftgpio.c
210
val = ftgpio_group_get_status(sc, group);
sys/dev/ftgpio/ftgpio.c
211
pin_value = GET_BIT(val, index);
sys/dev/ftwd/ftwd.c
51
uint8_t val = 0;
sys/dev/ftwd/ftwd.c
64
val = timeout;
sys/dev/ftwd/ftwd.c
67
val = timeout / 60;
sys/dev/ftwd/ftwd.c
73
if (val == 0) {
sys/dev/ftwd/ftwd.c
78
val, minutes ? "minute" : "second",
sys/dev/ftwd/ftwd.c
79
val == 1 ? "" : "s",
sys/dev/ftwd/ftwd.c
85
superio_write(dev, 0xf6, val); // Set Counter
sys/dev/ftwd/ftwd.c
92
if (val)
sys/dev/ftwd/ftwd.c
94
if (val)
sys/dev/fxp/if_fxp.c
431
uint32_t val;
sys/dev/fxp/if_fxp.c
607
val = pci_read_config(dev, PCIR_COMMAND, 2);
sys/dev/fxp/if_fxp.c
608
if (val & PCIM_CMD_MWRICEN &&
sys/dev/fxp/if_fxpvar.h
247
#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->fxp_res[0], reg, val)
sys/dev/fxp/if_fxpvar.h
248
#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->fxp_res[0], reg, val)
sys/dev/fxp/if_fxpvar.h
249
#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->fxp_res[0], reg, val)
sys/dev/gem/if_gem.c
1890
gem_mii_writereg(device_t dev, int phy, int reg, int val)
sys/dev/gem/if_gem.c
1897
printf("%s: phy %d reg %d val %x\n", phy, reg, val, __func__);
sys/dev/gem/if_gem.c
1908
if ((val & GEM_MII_CONTROL_RESET) == 0)
sys/dev/gem/if_gem.c
1910
GEM_WRITE_4(sc, GEM_MII_CONTROL, val);
sys/dev/gem/if_gem.c
1922
GEM_WRITE_4(sc, GEM_MII_ANAR, val);
sys/dev/gem/if_gem.c
1942
GEM_WRITE_4(sc, reg, val);
sys/dev/gem/if_gem.c
1952
(val & GEM_MIF_FRAME_DATA);
sys/dev/gem/if_gemvar.h
260
int gem_mii_writereg(device_t dev, int phy, int reg, int val);
sys/dev/gpio/bytgpio.c
302
uint32_t val)
sys/dev/gpio/bytgpio.c
304
bus_write_4(sc->sc_mem_res, off, val);
sys/dev/gpio/bytgpio.c
372
uint32_t reg, val;
sys/dev/gpio/bytgpio.c
385
val = bytgpio_read_4(sc, reg);
sys/dev/gpio/bytgpio.c
386
if ((val & BYTGPIO_PAD_VAL_I_OUTPUT_ENABLED) == 0)
sys/dev/gpio/bytgpio.c
392
else if ((val & BYTGPIO_PAD_VAL_I_INPUT_ENABLED) == 0)
sys/dev/gpio/bytgpio.c
403
uint32_t reg, val;
sys/dev/gpio/bytgpio.c
430
val = bytgpio_read_4(sc, reg);
sys/dev/gpio/bytgpio.c
431
val = val | BYTGPIO_PAD_VAL_DIR_MASK;
sys/dev/gpio/bytgpio.c
433
val = val & ~BYTGPIO_PAD_VAL_I_INPUT_ENABLED;
sys/dev/gpio/bytgpio.c
435
val = val & ~BYTGPIO_PAD_VAL_I_OUTPUT_ENABLED;
sys/dev/gpio/bytgpio.c
436
bytgpio_write_4(sc, reg, val);
sys/dev/gpio/bytgpio.c
462
uint32_t reg, val;
sys/dev/gpio/bytgpio.c
473
val = bytgpio_read_4(sc, reg);
sys/dev/gpio/bytgpio.c
475
val = val & ~BYTGPIO_PAD_VAL_LEVEL;
sys/dev/gpio/bytgpio.c
477
val = val | BYTGPIO_PAD_VAL_LEVEL;
sys/dev/gpio/bytgpio.c
478
bytgpio_write_4(sc, reg, val);
sys/dev/gpio/bytgpio.c
488
uint32_t reg, val;
sys/dev/gpio/bytgpio.c
506
val = bytgpio_read_4(sc, reg);
sys/dev/gpio/bytgpio.c
507
if (val & BYTGPIO_PAD_VAL_LEVEL)
sys/dev/gpio/bytgpio.c
520
uint32_t reg, val;
sys/dev/gpio/bytgpio.c
532
val = bytgpio_read_4(sc, reg);
sys/dev/gpio/bytgpio.c
533
val = val ^ BYTGPIO_PAD_VAL_LEVEL;
sys/dev/gpio/bytgpio.c
534
bytgpio_write_4(sc, reg, val);
sys/dev/gpio/bytgpio.c
560
uint32_t reg, val;
sys/dev/gpio/bytgpio.c
607
val = bytgpio_read_4(sc, reg);
sys/dev/gpio/bytgpio.c
608
sc->sc_pad_funcs[pin] = val & BYTGPIO_PCONF0_FUNC_MASK;
sys/dev/gpio/chvgpio.c
124
chvgpio_write_pad_cfg0(struct chvgpio_softc *sc, int pin, uint32_t val)
sys/dev/gpio/chvgpio.c
126
bus_write_4(sc->sc_mem_res, chvgpio_pad_cfg0_offset(pin), val);
sys/dev/gpio/chvgpio.c
204
uint32_t val;
sys/dev/gpio/chvgpio.c
214
val = chvgpio_read_pad_cfg0(sc, pin);
sys/dev/gpio/chvgpio.c
216
if (val & CHVGPIO_PAD_CFG0_GPIOCFG_GPIO ||
sys/dev/gpio/chvgpio.c
217
val & CHVGPIO_PAD_CFG0_GPIOCFG_GPO)
sys/dev/gpio/chvgpio.c
220
if (val & CHVGPIO_PAD_CFG0_GPIOCFG_GPIO ||
sys/dev/gpio/chvgpio.c
221
val & CHVGPIO_PAD_CFG0_GPIOCFG_GPI)
sys/dev/gpio/chvgpio.c
224
val = chvgpio_read_pad_cfg1(sc, pin);
sys/dev/gpio/chvgpio.c
234
uint32_t val;
sys/dev/gpio/chvgpio.c
257
val = chvgpio_read_pad_cfg0(sc, pin);
sys/dev/gpio/chvgpio.c
259
val = val & CHVGPIO_PAD_CFG0_GPIOCFG_GPI;
sys/dev/gpio/chvgpio.c
261
val = val & CHVGPIO_PAD_CFG0_GPIOCFG_GPO;
sys/dev/gpio/chvgpio.c
262
chvgpio_write_pad_cfg0(sc, pin, val);
sys/dev/gpio/chvgpio.c
272
uint32_t val;
sys/dev/gpio/chvgpio.c
279
val = chvgpio_read_pad_cfg0(sc, pin);
sys/dev/gpio/chvgpio.c
281
val = val & ~CHVGPIO_PAD_CFG0_GPIOTXSTATE;
sys/dev/gpio/chvgpio.c
283
val = val | CHVGPIO_PAD_CFG0_GPIOTXSTATE;
sys/dev/gpio/chvgpio.c
284
chvgpio_write_pad_cfg0(sc, pin, val);
sys/dev/gpio/chvgpio.c
294
uint32_t val;
sys/dev/gpio/chvgpio.c
303
val = chvgpio_read_pad_cfg0(sc, pin);
sys/dev/gpio/chvgpio.c
304
if (val & CHVGPIO_PAD_CFG0_GPIORXSTATE)
sys/dev/gpio/chvgpio.c
318
uint32_t val;
sys/dev/gpio/chvgpio.c
327
val = chvgpio_read_pad_cfg0(sc, pin);
sys/dev/gpio/chvgpio.c
328
val = val ^ CHVGPIO_PAD_CFG0_GPIOTXSTATE;
sys/dev/gpio/chvgpio.c
329
chvgpio_write_pad_cfg0(sc, pin, val);
sys/dev/gpio/dwgpio/dwgpio.c
269
dwgpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/dev/gpio/dwgpio/dwgpio.c
284
*val = (READ4(sc, GPIO_EXT_PORT(sc->port)) & (1 << i)) ? 1 : 0;
sys/dev/gpio/dwgpio/dwgpio_bus.c
122
dwgpiobus_write(device_t dev, bus_size_t offset, int val)
sys/dev/gpio/dwgpio/dwgpio_bus.c
128
bus_write_4(sc->res[0], offset, val);
sys/dev/gpio/dwgpio/dwgpio_bus.c
137
int val;
sys/dev/gpio/dwgpio/dwgpio_bus.c
141
val = bus_read_4(sc->res[0], offset);
sys/dev/gpio/dwgpio/dwgpio_bus.c
143
return (val);
sys/dev/gpio/gpioiic.c
189
gpioiic_setsda(device_t dev, int val)
sys/dev/gpio/gpioiic.c
193
if (val) {
sys/dev/gpio/gpioiic.c
203
gpioiic_setscl(device_t dev, int val)
sys/dev/gpio/gpioiic.c
207
if (val) {
sys/dev/gpio/gpioiic.c
220
bool val;
sys/dev/gpio/gpioiic.c
223
gpio_pin_is_active(sc->sclpin, &val);
sys/dev/gpio/gpioiic.c
224
return (val);
sys/dev/gpio/gpioiic.c
231
bool val;
sys/dev/gpio/gpioiic.c
234
gpio_pin_is_active(sc->sdapin, &val);
sys/dev/gpio/gpioiic.c
235
return (val);
sys/dev/gpio/gpiomdio.c
148
unsigned int val;
sys/dev/gpio/gpiomdio.c
151
GPIOBUS_PIN_GET(sc->sc_busdev, sc->sc_dev, sc->mdio_pin, &val);
sys/dev/gpio/gpiomdio.c
153
return (val != 0 ? MDI_BIT : 0);
sys/dev/gpio/gpiomdio.c
157
gpiomdio_bb_write(device_t dev, uint32_t val)
sys/dev/gpio/gpiomdio.c
164
if ((val & (MDIRPHY_BIT | MDO_BIT)) == (MDIRPHY_BIT | MDO_BIT))
sys/dev/gpio/gpiomdio.c
166
else if ((val & (MDIRPHY_BIT | MDO_BIT)) == MDIRPHY_BIT)
sys/dev/gpio/gpiomdio.c
168
if (val & MDIRPHY_BIT)
sys/dev/gpio/gpiomdio.c
171
else if (val & MDIRHOST_BIT)
sys/dev/gpio/gpiomdio.c
176
if (val & MDC_BIT)
sys/dev/gpio/gpiomdio.c
195
gpiomdio_writereg(device_t dev, int phy, int reg, int val)
sys/dev/gpio/gpiomdio.c
200
mii_bitbang_writereg(dev, &sc->miibb_ops, phy, reg, val);
sys/dev/gpio/gpioregulator.c
134
if (sc->def->states[n].val >= min_uvolt &&
sys/dev/gpio/gpioregulator.c
135
sc->def->states[n].val <= max_uvolt) {
sys/dev/gpio/gpioregulator.c
175
*uvolt = sc->def->states[n].val;
sys/dev/gpio/gpioregulator.c
224
sc->init_def.states[n].val = pstates[n * 2 + 0];
sys/dev/gpio/gpioregulator.c
48
int val;
sys/dev/gpio/qoriq_gpio.c
214
uint32_t val;
sys/dev/gpio/qoriq_gpio.c
221
val = bus_read_4(sc->sc_mem, GPIO_GPDAT);
sys/dev/gpio/qoriq_gpio.c
222
val ^= (1 << (31 - pin));
sys/dev/gpio/qoriq_gpio.c
223
bus_write_4(sc->sc_mem, GPIO_GPDAT, val);
sys/dev/gve/gve.h
696
void gve_reg_bar_write_4(struct gve_priv *priv, bus_size_t offset, uint32_t val);
sys/dev/gve/gve.h
697
void gve_db_bar_write_4(struct gve_priv *priv, bus_size_t offset, uint32_t val);
sys/dev/gve/gve.h
698
void gve_db_bar_dqo_write_4(struct gve_priv *priv, bus_size_t offset, uint32_t val);
sys/dev/gve/gve_sysctl.c
297
gve_check_num_queues(struct gve_priv *priv, int val, bool is_rx)
sys/dev/gve/gve_sysctl.c
299
if (val < 1) {
sys/dev/gve/gve_sysctl.c
301
"Requested num queues (%u) must be a positive integer\n", val);
sys/dev/gve/gve_sysctl.c
305
if (val > (is_rx ? priv->rx_cfg.max_queues : priv->tx_cfg.max_queues)) {
sys/dev/gve/gve_sysctl.c
307
"Requested num queues (%u) is too large\n", val);
sys/dev/gve/gve_sysctl.c
318
int val;
sys/dev/gve/gve_sysctl.c
321
val = priv->tx_cfg.num_queues;
sys/dev/gve/gve_sysctl.c
322
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/gve/gve_sysctl.c
326
err = gve_check_num_queues(priv, val, /*is_rx=*/false);
sys/dev/gve/gve_sysctl.c
330
if (val != priv->tx_cfg.num_queues) {
sys/dev/gve/gve_sysctl.c
332
err = gve_adjust_tx_queues(priv, val);
sys/dev/gve/gve_sysctl.c
343
int val;
sys/dev/gve/gve_sysctl.c
346
val = priv->rx_cfg.num_queues;
sys/dev/gve/gve_sysctl.c
347
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/gve/gve_sysctl.c
351
err = gve_check_num_queues(priv, val, /*is_rx=*/true);
sys/dev/gve/gve_sysctl.c
356
if (val != priv->rx_cfg.num_queues) {
sys/dev/gve/gve_sysctl.c
358
err = gve_adjust_rx_queues(priv, val);
sys/dev/gve/gve_sysctl.c
366
gve_check_ring_size(struct gve_priv *priv, int val, bool is_rx)
sys/dev/gve/gve_sysctl.c
368
if (!powerof2(val) || val == 0) {
sys/dev/gve/gve_sysctl.c
370
"Requested ring size (%u) must be a power of 2\n", val);
sys/dev/gve/gve_sysctl.c
374
if (val < (is_rx ? priv->min_rx_desc_cnt : priv->min_tx_desc_cnt)) {
sys/dev/gve/gve_sysctl.c
376
"Requested ring size (%u) cannot be less than %d\n", val,
sys/dev/gve/gve_sysctl.c
382
if (val > (is_rx ? priv->max_rx_desc_cnt : priv->max_tx_desc_cnt)) {
sys/dev/gve/gve_sysctl.c
384
"Requested ring size (%u) cannot be greater than %d\n", val,
sys/dev/gve/gve_sysctl.c
396
int val;
sys/dev/gve/gve_sysctl.c
399
val = priv->tx_desc_cnt;
sys/dev/gve/gve_sysctl.c
400
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/gve/gve_sysctl.c
404
err = gve_check_ring_size(priv, val, /*is_rx=*/false);
sys/dev/gve/gve_sysctl.c
408
if (val != priv->tx_desc_cnt) {
sys/dev/gve/gve_sysctl.c
410
err = gve_adjust_ring_sizes(priv, val, /*is_rx=*/false);
sys/dev/gve/gve_sysctl.c
421
int val;
sys/dev/gve/gve_sysctl.c
424
val = priv->rx_desc_cnt;
sys/dev/gve/gve_sysctl.c
425
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/gve/gve_sysctl.c
429
err = gve_check_ring_size(priv, val, /*is_rx=*/true);
sys/dev/gve/gve_sysctl.c
433
if (val != priv->rx_desc_cnt) {
sys/dev/gve/gve_sysctl.c
435
err = gve_adjust_ring_sizes(priv, val, /*is_rx=*/true);
sys/dev/gve/gve_utils.c
41
gve_reg_bar_write_4(struct gve_priv *priv, bus_size_t offset, uint32_t val)
sys/dev/gve/gve_utils.c
43
bus_write_4(priv->reg_bar, offset, htobe32(val));
sys/dev/gve/gve_utils.c
47
gve_db_bar_write_4(struct gve_priv *priv, bus_size_t offset, uint32_t val)
sys/dev/gve/gve_utils.c
49
bus_write_4(priv->db_bar, offset, htobe32(val));
sys/dev/gve/gve_utils.c
53
gve_db_bar_dqo_write_4(struct gve_priv *priv, bus_size_t offset, uint32_t val)
sys/dev/gve/gve_utils.c
55
bus_write_4(priv->db_bar, offset, val);
sys/dev/hdmi/dwc_hdmi.c
250
uint8_t val;
sys/dev/hdmi/dwc_hdmi.c
252
val = RD1(sc, HDMI_PHY_TST0);
sys/dev/hdmi/dwc_hdmi.c
253
val &= ~HDMI_PHY_TST0_TSTCLR_MASK;
sys/dev/hdmi/dwc_hdmi.c
254
val |= (bit << HDMI_PHY_TST0_TSTCLR_OFFSET) &
sys/dev/hdmi/dwc_hdmi.c
256
WR1(sc, HDMI_PHY_TST0, val);
sys/dev/hdmi/dwc_hdmi.c
263
uint8_t val;
sys/dev/hdmi/dwc_hdmi.c
268
val = RD1(sc, HDMI_FC_INVIDCONF);
sys/dev/hdmi/dwc_hdmi.c
271
WR1(sc, HDMI_FC_INVIDCONF, val);
sys/dev/hdmi/dwc_hdmi.c
277
uint8_t val;
sys/dev/hdmi/dwc_hdmi.c
372
val = RD1(sc, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
sys/dev/hdmi/dwc_hdmi.c
373
while (val == 0) {
sys/dev/hdmi/dwc_hdmi.c
379
val = RD1(sc, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
sys/dev/hdmi/dwc_hdmi.c
439
uint8_t val;
sys/dev/hdmi/dwc_hdmi.c
467
val = RD1(sc, HDMI_AUD_CTS3);
sys/dev/hdmi/dwc_hdmi.c
468
val &= ~(HDMI_AUD_CTS3_N_SHIFT_MASK | HDMI_AUD_CTS3_CTS_MANUAL);
sys/dev/hdmi/dwc_hdmi.c
469
WR1(sc, HDMI_AUD_CTS3, val);
sys/dev/hdmi/dwc_hdmi.c
471
val = RD1(sc, HDMI_AUD_CONF0);
sys/dev/hdmi/dwc_hdmi.c
472
val &= ~HDMI_AUD_CONF0_INTERFACE_MASK;
sys/dev/hdmi/dwc_hdmi.c
473
val |= HDMI_AUD_CONF0_INTERFACE_IIS;
sys/dev/hdmi/dwc_hdmi.c
474
val &= ~HDMI_AUD_CONF0_I2SINEN_MASK;
sys/dev/hdmi/dwc_hdmi.c
475
val |= HDMI_AUD_CONF0_I2SINEN_CH2;
sys/dev/hdmi/dwc_hdmi.c
476
WR1(sc, HDMI_AUD_CONF0, val);
sys/dev/hdmi/dwc_hdmi.c
478
val = RD1(sc, HDMI_AUD_CONF1);
sys/dev/hdmi/dwc_hdmi.c
479
val &= ~HDMI_AUD_CONF1_DATAMODE_MASK;
sys/dev/hdmi/dwc_hdmi.c
480
val |= HDMI_AUD_CONF1_DATAMODE_IIS;
sys/dev/hdmi/dwc_hdmi.c
481
val &= ~HDMI_AUD_CONF1_DATWIDTH_MASK;
sys/dev/hdmi/dwc_hdmi.c
482
val |= HDMI_AUD_CONF1_DATWIDTH_16BIT;
sys/dev/hdmi/dwc_hdmi.c
483
WR1(sc, HDMI_AUD_CONF1, val);
sys/dev/hdmi/dwc_hdmi.c
494
val = RD1(sc, HDMI_MC_CLKDIS);
sys/dev/hdmi/dwc_hdmi.c
495
val &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE;
sys/dev/hdmi/dwc_hdmi.c
496
WR1(sc, HDMI_MC_CLKDIS, val);
sys/dev/hdmi/dwc_hdmi.c
505
uint8_t val;
sys/dev/hdmi/dwc_hdmi.c
511
val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
sys/dev/hdmi/dwc_hdmi.c
513
WR1(sc, HDMI_VP_PR_CD, val);
sys/dev/hdmi/dwc_hdmi.c
515
val = RD1(sc, HDMI_VP_STUFF);
sys/dev/hdmi/dwc_hdmi.c
516
val &= ~HDMI_VP_STUFF_PR_STUFFING_MASK;
sys/dev/hdmi/dwc_hdmi.c
517
val |= HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE;
sys/dev/hdmi/dwc_hdmi.c
518
WR1(sc, HDMI_VP_STUFF, val);
sys/dev/hdmi/dwc_hdmi.c
520
val = RD1(sc, HDMI_VP_CONF);
sys/dev/hdmi/dwc_hdmi.c
521
val &= ~(HDMI_VP_CONF_PR_EN_MASK |
sys/dev/hdmi/dwc_hdmi.c
523
val |= HDMI_VP_CONF_PR_EN_DISABLE |
sys/dev/hdmi/dwc_hdmi.c
525
WR1(sc, HDMI_VP_CONF, val);
sys/dev/hdmi/dwc_hdmi.c
527
val = RD1(sc, HDMI_VP_STUFF);
sys/dev/hdmi/dwc_hdmi.c
528
val &= ~HDMI_VP_STUFF_IDEFAULT_PHASE_MASK;
sys/dev/hdmi/dwc_hdmi.c
529
val |= 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET;
sys/dev/hdmi/dwc_hdmi.c
530
WR1(sc, HDMI_VP_STUFF, val);
sys/dev/hdmi/dwc_hdmi.c
535
val = RD1(sc, HDMI_VP_CONF);
sys/dev/hdmi/dwc_hdmi.c
536
val &= ~(HDMI_VP_CONF_BYPASS_EN_MASK |
sys/dev/hdmi/dwc_hdmi.c
539
val |= HDMI_VP_CONF_BYPASS_EN_DISABLE |
sys/dev/hdmi/dwc_hdmi.c
542
WR1(sc, HDMI_VP_CONF, val);
sys/dev/hdmi/dwc_hdmi.c
544
val = RD1(sc, HDMI_VP_CONF);
sys/dev/hdmi/dwc_hdmi.c
545
val &= ~(HDMI_VP_CONF_BYPASS_EN_MASK |
sys/dev/hdmi/dwc_hdmi.c
548
val |= HDMI_VP_CONF_BYPASS_EN_DISABLE |
sys/dev/hdmi/dwc_hdmi.c
551
WR1(sc, HDMI_VP_CONF, val);
sys/dev/hdmi/dwc_hdmi.c
553
val = RD1(sc, HDMI_VP_CONF);
sys/dev/hdmi/dwc_hdmi.c
554
val &= ~(HDMI_VP_CONF_BYPASS_EN_MASK |
sys/dev/hdmi/dwc_hdmi.c
557
val |= HDMI_VP_CONF_BYPASS_EN_ENABLE |
sys/dev/hdmi/dwc_hdmi.c
560
WR1(sc, HDMI_VP_CONF, val);
sys/dev/hdmi/dwc_hdmi.c
565
val = RD1(sc, HDMI_VP_STUFF);
sys/dev/hdmi/dwc_hdmi.c
566
val &= ~(HDMI_VP_STUFF_PP_STUFFING_MASK |
sys/dev/hdmi/dwc_hdmi.c
568
val |= HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE |
sys/dev/hdmi/dwc_hdmi.c
570
WR1(sc, HDMI_VP_STUFF, val);
sys/dev/hdmi/dwc_hdmi.c
572
val = RD1(sc, HDMI_VP_CONF);
sys/dev/hdmi/dwc_hdmi.c
573
val &= ~HDMI_VP_CONF_OUTPUT_SELECTOR_MASK;
sys/dev/hdmi/dwc_hdmi.c
574
val |= output_select;
sys/dev/hdmi/dwc_hdmi.c
575
WR1(sc, HDMI_VP_CONF, val);
sys/dev/hdmi/dwc_hdmi.c
582
uint8_t val;
sys/dev/hdmi/dwc_hdmi.c
585
val = HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE |
sys/dev/hdmi/dwc_hdmi.c
588
WR1(sc, HDMI_TX_INVID0, val);
sys/dev/hdmi/dwc_hdmi.c
591
val = HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE |
sys/dev/hdmi/dwc_hdmi.c
594
WR1(sc, HDMI_TX_INSTUFFING, val);
sys/dev/hdmi/dwc_hdmi.c
606
uint8_t de, val;
sys/dev/hdmi/dwc_hdmi.c
611
val = RD1(sc, HDMI_A_HDCPCFG0);
sys/dev/hdmi/dwc_hdmi.c
612
val &= ~HDMI_A_HDCPCFG0_RXDETECT_MASK;
sys/dev/hdmi/dwc_hdmi.c
613
val |= HDMI_A_HDCPCFG0_RXDETECT_DISABLE;
sys/dev/hdmi/dwc_hdmi.c
614
WR1(sc, HDMI_A_HDCPCFG0, val);
sys/dev/hdmi/dwc_hdmi.c
617
val = RD1(sc, HDMI_A_VIDPOLCFG);
sys/dev/hdmi/dwc_hdmi.c
618
val &= ~HDMI_A_VIDPOLCFG_DATAENPOL_MASK;
sys/dev/hdmi/dwc_hdmi.c
619
val |= de;
sys/dev/hdmi/dwc_hdmi.c
620
WR1(sc, HDMI_A_VIDPOLCFG, val);
sys/dev/hdmi/dwc_hdmi.c
623
val = RD1(sc, HDMI_A_HDCPCFG1);
sys/dev/hdmi/dwc_hdmi.c
624
val &= ~HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK;
sys/dev/hdmi/dwc_hdmi.c
625
val |= HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE;
sys/dev/hdmi/dwc_hdmi.c
626
WR1(sc, HDMI_A_HDCPCFG1, val);
sys/dev/hdmi/dwc_hdmi.c
75
uint8_t val;
sys/dev/hdmi/dwc_hdmi.c
77
val = RD1(sc, HDMI_IH_I2CMPHY_STAT0) &
sys/dev/hdmi/dwc_hdmi.c
79
while (val == 0) {
sys/dev/hdmi/dwc_hdmi.c
84
val = RD1(sc, HDMI_IH_I2CMPHY_STAT0) &
sys/dev/hdmi/dwc_hdmi.h
52
WR1(struct dwc_hdmi_softc *sc, bus_size_t off, uint8_t val)
sys/dev/hdmi/dwc_hdmi.h
54
bus_write_1(sc->sc_mem_res, off << sc->sc_reg_shift, val);
sys/dev/hid/hconf.c
135
hconf_set_feature_control(struct hconf_softc *sc, int ctrl_id, u_int val)
sys/dev/hid/hconf.c
166
i == ctrl_id ? val : ofc->val);
sys/dev/hid/hconf.c
174
fc->val = val;
sys/dev/hid/hconf.c
195
value = fc->val;
sys/dev/hid/hconf.c
273
sc->feature_controls[i].val = feature_control_descrs[i].value;
sys/dev/hid/hconf.c
300
if (sc->feature_controls[i].val ==
sys/dev/hid/hconf.c
304
sc->feature_controls[i].val);
sys/dev/hid/hconf.c
96
u_int val;
sys/dev/hid/hmt.c
575
slot_data->val[usage] = hid_get_udata(
sys/dev/hid/hmt.c
586
printf("%04x ", slot_data->val[usage]);
sys/dev/hid/hmt.c
598
if (slot_data->val[HMT_TIP_SWITCH] != 0 &&
sys/dev/hid/hmt.c
600
slot_data->val[HMT_CONFIDENCE] == 0)) {
sys/dev/hid/hmt.c
603
slot_data->dist = !slot_data->val[HMT_IN_RANGE];
sys/dev/hid/hmt.c
605
width = slot_data->val[HMT_WIDTH] >> 1;
sys/dev/hid/hmt.c
606
height = slot_data->val[HMT_HEIGHT] >> 1;
sys/dev/hid/ietp.c
615
uint16_t val;
sys/dev/hid/ietp.c
640
val = enable ? IETP_CTRL_ABSOLUTE : IETP_CTRL_STANDARD;
sys/dev/hid/ietp.c
641
if (ietp_iic_write_reg(dev, IETP_CONTROL, val) != 0) {
sys/dev/hid/ietp.c
655
ietp_iic_read_reg(device_t dev, uint16_t reg, size_t len, void *val)
sys/dev/hid/ietp.c
662
{ addr, IIC_M_RD, len, val },
sys/dev/hid/ietp.c
673
DPRINTF("Response: %*D\n", (int)len, val, " ");
sys/dev/hid/ietp.c
679
ietp_iic_write_reg(device_t dev, uint16_t reg, uint16_t val)
sys/dev/hid/ietp.c
684
val & 0xff, (val >> 8) & 0xff };
sys/dev/hid/ietp.c
690
DPRINTF("Write reg 0x%04x with value 0x%04x\n", reg, val);
sys/dev/hpt27xx/osm.h
142
#define os_writeb(addr, val) *(volatile HPT_U8 *)(addr) = (HPT_U8)(val)
sys/dev/hpt27xx/osm.h
143
#define os_writew(addr, val) *(volatile HPT_U16 *)(addr) = (HPT_U16)(val)
sys/dev/hpt27xx/osm.h
144
#define os_writel(addr, val) *(volatile HPT_U32 *)(addr) = (HPT_U32)(val)
sys/dev/hptiop/hptiop.c
785
_tag = hba->u.mvfrey.outlist[hba->u.mvfrey.outlist_rptr].val;
sys/dev/hptiop/hptiop.h
175
u_int32_t val;
sys/dev/hptmv/mv.c
49
MV_REG_WRITE_BYTE(MV_BUS_ADDR_T base, MV_U32 offset, MV_U8 val)
sys/dev/hptmv/mv.c
51
writeb((void *)((ULONG_PTR)base + offset), val);
sys/dev/hptmv/mv.c
55
MV_REG_WRITE_WORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U16 val)
sys/dev/hptmv/mv.c
57
writew((void *)((ULONG_PTR)base + offset), val);
sys/dev/hptmv/mv.c
61
MV_REG_WRITE_DWORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U32 val)
sys/dev/hptmv/mv.c
63
writel((void *)((ULONG_PTR)base + offset), val);
sys/dev/hptmv/mvOs.h
100
extern void HPTLIBAPI MV_REG_WRITE_DWORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U32 val);
sys/dev/hptmv/mvOs.h
98
extern void HPTLIBAPI MV_REG_WRITE_BYTE(MV_BUS_ADDR_T base, MV_U32 offset, MV_U8 val);
sys/dev/hptmv/mvOs.h
99
extern void HPTLIBAPI MV_REG_WRITE_WORD(MV_BUS_ADDR_T base, MV_U32 offset, MV_U16 val);
sys/dev/hptnr/osm.h
140
#define os_writeb(addr, val) *(volatile HPT_U8 *)(addr) = (HPT_U8)(val)
sys/dev/hptnr/osm.h
141
#define os_writew(addr, val) *(volatile HPT_U16 *)(addr) = (HPT_U16)(val)
sys/dev/hptnr/osm.h
142
#define os_writel(addr, val) *(volatile HPT_U32 *)(addr) = (HPT_U32)(val)
sys/dev/hptrr/osm.h
110
#define os_writeb(addr, val) *(volatile HPT_U8 *)(addr) = (HPT_U8)(val)
sys/dev/hptrr/osm.h
111
#define os_writew(addr, val) *(volatile HPT_U16 *)(addr) = (HPT_U16)(val)
sys/dev/hptrr/osm.h
112
#define os_writel(addr, val) *(volatile HPT_U32 *)(addr) = (HPT_U32)(val)
sys/dev/hwpmc/hwpmc_cmn600.c
108
u_int width, uint64_t val)
sys/dev/hwpmc/hwpmc_cmn600.c
122
((val >> POR_DTM_PMEVCNT_CNTR_WIDTH) & 0xffffffff) << shift);
sys/dev/hwpmc/hwpmc_cmn600.c
125
POR_DT_PMEVCNT(dtccntr & ~0x1), val >>
sys/dev/hwpmc/hwpmc_cmn600.c
129
val &= 0xffffUL;
sys/dev/hwpmc/hwpmc_cmn600.c
131
0xffffUL << shift, val << shift);
sys/dev/hwpmc/hwpmc_cmn600.c
529
uint64_t val;
sys/dev/hwpmc/hwpmc_cmn600.c
546
val = pmu_cmn600_rd8(desc->pd_rw_arg,
sys/dev/hwpmc/hwpmc_cmn600.c
549
if ((val & 0xf0) == 0)
sys/dev/hwpmc/hwpmc_e500.c
252
e500_pmcn_write(unsigned int pmc, uint32_t val)
sys/dev/hwpmc/hwpmc_e500.c
256
mtpmr(PMR_PMC0, val);
sys/dev/hwpmc/hwpmc_e500.c
259
mtpmr(PMR_PMC1, val);
sys/dev/hwpmc/hwpmc_e500.c
262
mtpmr(PMR_PMC2, val);
sys/dev/hwpmc/hwpmc_e500.c
265
mtpmr(PMR_PMC3, val);
sys/dev/hwpmc/hwpmc_mpc7xxx.c
319
mpc7xxx_pmcn_write(unsigned int pmc, uint32_t val)
sys/dev/hwpmc/hwpmc_mpc7xxx.c
323
mtspr(SPR_PMC1_74XX, val);
sys/dev/hwpmc/hwpmc_mpc7xxx.c
326
mtspr(SPR_PMC2_74XX, val);
sys/dev/hwpmc/hwpmc_mpc7xxx.c
329
mtspr(SPR_PMC3_74XX, val);
sys/dev/hwpmc/hwpmc_mpc7xxx.c
332
mtspr(SPR_PMC4_74XX, val);
sys/dev/hwpmc/hwpmc_mpc7xxx.c
335
mtspr(SPR_PMC5_74XX, val);
sys/dev/hwpmc/hwpmc_mpc7xxx.c
338
mtspr(SPR_PMC6_74XX, val);
sys/dev/hwpmc/hwpmc_powerpc.c
291
pmc_value_t val;
sys/dev/hwpmc/hwpmc_powerpc.c
298
val = mfspr(SPR_PMC1);
sys/dev/hwpmc/hwpmc_powerpc.c
301
val = mfspr(SPR_PMC2);
sys/dev/hwpmc/hwpmc_powerpc.c
304
val = mfspr(SPR_PMC3);
sys/dev/hwpmc/hwpmc_powerpc.c
307
val = mfspr(SPR_PMC4);
sys/dev/hwpmc/hwpmc_powerpc.c
310
val = mfspr(SPR_PMC5);
sys/dev/hwpmc/hwpmc_powerpc.c
313
val = mfspr(SPR_PMC6);
sys/dev/hwpmc/hwpmc_powerpc.c
316
val = mfspr(SPR_PMC7);
sys/dev/hwpmc/hwpmc_powerpc.c
319
val = mfspr(SPR_PMC8);
sys/dev/hwpmc/hwpmc_powerpc.c
323
return (val);
sys/dev/hwpmc/hwpmc_powerpc.c
327
powerpc_pmcn_write_default(unsigned int pmc, uint32_t val)
sys/dev/hwpmc/hwpmc_powerpc.c
334
mtspr(SPR_PMC1, val);
sys/dev/hwpmc/hwpmc_powerpc.c
337
mtspr(SPR_PMC2, val);
sys/dev/hwpmc/hwpmc_powerpc.c
340
mtspr(SPR_PMC3, val);
sys/dev/hwpmc/hwpmc_powerpc.c
343
mtspr(SPR_PMC4, val);
sys/dev/hwpmc/hwpmc_powerpc.c
346
mtspr(SPR_PMC5, val);
sys/dev/hwpmc/hwpmc_powerpc.c
349
mtspr(SPR_PMC6, val);
sys/dev/hwpmc/hwpmc_powerpc.c
352
mtspr(SPR_PMC7, val);
sys/dev/hwpmc/hwpmc_powerpc.c
355
mtspr(SPR_PMC8, val);
sys/dev/hwpmc/hwpmc_powerpc.c
63
void (*powerpc_pmcn_write)(unsigned int pmc, uint32_t val);
sys/dev/hwpmc/hwpmc_powerpc.h
106
void powerpc_pmcn_write_default(unsigned int pmc, uint32_t val);
sys/dev/hwpmc/hwpmc_powerpc.h
87
extern void (*powerpc_pmcn_write)(unsigned int pmc, uint32_t val);
sys/dev/hwpmc/pmu_dmc620.c
82
uint32_t val;
sys/dev/hwpmc/pmu_dmc620.c
87
val = RD4(sc, DMC620_REG(cntr, reg));
sys/dev/hwpmc/pmu_dmc620.c
88
return (val);
sys/dev/hwpmc/pmu_dmc620.c
92
pmu_dmc620_wr4(void *arg, u_int cntr, off_t reg, uint32_t val)
sys/dev/hwpmc/pmu_dmc620.c
99
WR4(sc, DMC620_REG(cntr, reg), val);
sys/dev/hwpmc/pmu_dmc620_reg.h
77
void pmu_dmc620_wr4(void *arg, u_int cntr, off_t reg, uint32_t val);
sys/dev/hyperv/pcib/vmbus_pcib.c
1020
dev_msg->wslot.val);
sys/dev/hyperv/pcib/vmbus_pcib.c
1204
res_assigned->wslot.val = hpdev->desc.wslot.val;
sys/dev/hyperv/pcib/vmbus_pcib.c
1210
res_assigned2->wslot.val = hpdev->desc.wslot.val;
sys/dev/hyperv/pcib/vmbus_pcib.c
1251
pkt.wslot.val = hpdev->desc.wslot.val;
sys/dev/hyperv/pcib/vmbus_pcib.c
1271
bus_size_t offset, uint##x##_t val) \
sys/dev/hyperv/pcib/vmbus_pcib.c
1273
return (bus_write_##s(bus->cfg_res, offset, val)); \
sys/dev/hyperv/pcib/vmbus_pcib.c
1286
uint32_t *val)
sys/dev/hyperv/pcib/vmbus_pcib.c
1295
memcpy(val, ((uint8_t *)&hpdev->desc.v_id) + where, size);
sys/dev/hyperv/pcib/vmbus_pcib.c
1298
memcpy(val, ((uint8_t *)&hpdev->desc.rev) + where -
sys/dev/hyperv/pcib/vmbus_pcib.c
1302
memcpy(val, (uint8_t *)&hpdev->desc.subsystem_id + where -
sys/dev/hyperv/pcib/vmbus_pcib.c
1307
*val = 0;
sys/dev/hyperv/pcib/vmbus_pcib.c
1315
*val = 0;
sys/dev/hyperv/pcib/vmbus_pcib.c
1320
hv_cfg_write_4(hbus, 0, hpdev->desc.wslot.val);
sys/dev/hyperv/pcib/vmbus_pcib.c
1328
*((uint8_t *)val) = hv_cfg_read_1(hbus, addr);
sys/dev/hyperv/pcib/vmbus_pcib.c
1331
*((uint16_t *)val) = hv_cfg_read_2(hbus, addr);
sys/dev/hyperv/pcib/vmbus_pcib.c
1334
*((uint32_t *)val) = hv_cfg_read_4(hbus, addr);
sys/dev/hyperv/pcib/vmbus_pcib.c
1346
memset(val, 0, size);
sys/dev/hyperv/pcib/vmbus_pcib.c
1352
uint32_t val)
sys/dev/hyperv/pcib/vmbus_pcib.c
1365
hv_cfg_write_4(hbus, 0, hpdev->desc.wslot.val);
sys/dev/hyperv/pcib/vmbus_pcib.c
1373
hv_cfg_write_1(hbus, addr, (uint8_t)val);
sys/dev/hyperv/pcib/vmbus_pcib.c
1376
hv_cfg_write_2(hbus, addr, (uint16_t)val);
sys/dev/hyperv/pcib/vmbus_pcib.c
1379
hv_cfg_write_4(hbus, addr, (uint32_t)val);
sys/dev/hyperv/pcib/vmbus_pcib.c
1642
vmbus_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *val)
sys/dev/hyperv/pcib/vmbus_pcib.c
1648
*val = sc->hbus->pci_domain;
sys/dev/hyperv/pcib/vmbus_pcib.c
1653
*val = 0;
sys/dev/hyperv/pcib/vmbus_pcib.c
1660
vmbus_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t val)
sys/dev/hyperv/pcib/vmbus_pcib.c
1951
ctxt.int_pkts.v1.wslot.val = hpdev->desc.wslot.val;
sys/dev/hyperv/pcib/vmbus_pcib.c
1963
ctxt.int_pkts.v3.wslot.val = hpdev->desc.wslot.val;
sys/dev/hyperv/pcib/vmbus_pcib.c
231
uint32_t val;
sys/dev/hyperv/pcib/vmbus_pcib.c
493
wslot.val = 0;
sys/dev/hyperv/pcib/vmbus_pcib.c
497
return (wslot.val);
sys/dev/hyperv/pcib/vmbus_pcib.c
507
encoding.val = wslot;
sys/dev/hyperv/pcib/vmbus_pcib.c
623
int_pkt->wslot.val = hpdev->desc.wslot.val;
sys/dev/hyperv/pcib/vmbus_pcib.c
640
devfn = wslot_to_devfn(hpdev->desc.wslot.val);
sys/dev/hyperv/pcib/vmbus_pcib.c
686
res_req->wslot.val = desc->wslot.val;
sys/dev/hyperv/pcib/vmbus_pcib.c
765
if ((hpdev->desc.wslot.val ==
sys/dev/hyperv/pcib/vmbus_pcib.c
766
new_desc->wslot.val) &&
sys/dev/hyperv/pcib/vmbus_pcib.c
814
if (hpdev->desc.wslot.val == wslot) {
sys/dev/hyperv/pcib/vmbus_pcib.c
901
eject_pkt->wslot.val = wslot.val;
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
52
void arm_hv_set_vreg(u32 msr, u64 val);
sys/dev/hyperv/vmbus/aarch64/hyperv_machdep.h
53
#define WRMSR(msr, val) arm_hv_set_vreg(msr, val)
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
183
uint64_t val, orig;
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
218
val = (pmap_kextract((vm_offset_t)hyperv_ref_tsc.tsc_ref) >>
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
220
val |= MSR_HV_REFTSC_ENABLE | (orig & MSR_HV_REFTSC_RSVD_MASK);
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
221
wrmsr(MSR_HV_REFERENCE_TSC, val);
sys/dev/hyperv/vmbus/vmbus.c
753
uint64_t val, orig;
sys/dev/hyperv/vmbus/vmbus.c
771
val = pmap_kextract((vm_offset_t)VMBUS_PCPU_GET(sc, message, cpu)) &
sys/dev/hyperv/vmbus/vmbus.c
773
val |= MSR_HV_SIMP_ENABLE | (orig & MSR_HV_SIMP_RSVD_MASK);
sys/dev/hyperv/vmbus/vmbus.c
774
WRMSR(MSR_HV_SIMP, val);
sys/dev/hyperv/vmbus/vmbus.c
779
val = pmap_kextract((vm_offset_t)VMBUS_PCPU_GET(sc, event_flags, cpu)) &
sys/dev/hyperv/vmbus/vmbus.c
781
val |= MSR_HV_SIEFP_ENABLE | (orig & MSR_HV_SIEFP_RSVD_MASK);
sys/dev/hyperv/vmbus/vmbus.c
782
WRMSR(MSR_HV_SIEFP, val);
sys/dev/hyperv/vmbus/vmbus.c
789
val = sc->vmbus_idtvec | MSR_HV_SINT_AUTOEOI |
sys/dev/hyperv/vmbus/vmbus.c
791
WRMSR(sint, val);
sys/dev/hyperv/vmbus/vmbus.c
801
val = MSR_HV_SCTRL_ENABLE | (orig & MSR_HV_SCTRL_RSVD_MASK);
sys/dev/hyperv/vmbus/vmbus.c
802
WRMSR(MSR_HV_SCONTROL, val);
sys/dev/hyperv/vmbus/vmbus_et.c
160
uint64_t val;
sys/dev/hyperv/vmbus/vmbus_et.c
165
val = rdmsr(MSR_HV_STIMER0_CONFIG);
sys/dev/hyperv/vmbus/vmbus_et.c
166
if ((val & MSR_HV_STIMER_CFG_ENABLE) == 0)
sys/dev/hyperv/vmbus/vmbus_et.c
89
struct timespec val;
sys/dev/hyperv/vmbus/vmbus_et.c
91
val = sbttots(time);
sys/dev/hyperv/vmbus/vmbus_et.c
92
return (val.tv_sec * HYPERV_TIMER_FREQ) +
sys/dev/hyperv/vmbus/vmbus_et.c
93
(val.tv_nsec / HYPERV_TIMER_NS_FACTOR);
sys/dev/hyperv/vmbus/x86/hyperv_machdep.h
35
#define WRMSR(msr, val) wrmsr(msr, val)
sys/dev/hyperv/vmbus/x86/vmbus_x86.c
120
uint64_t val, orig;
sys/dev/hyperv/vmbus/x86/vmbus_x86.c
124
val = sc->vmbus_idtvec | MSR_HV_SINT_AUTOEOI |
sys/dev/hyperv/vmbus/x86/vmbus_x86.c
126
WRMSR(sint, val);
sys/dev/iavf/iavf_adminq.c
682
u32 val = 0;
sys/dev/iavf/iavf_adminq.c
695
val = rd32(hw, hw->aq.asq.head);
sys/dev/iavf/iavf_adminq.c
696
if (val >= hw->aq.num_asq_entries) {
sys/dev/iavf/iavf_adminq.c
698
"AQTX: head overrun at %d\n", val);
sys/dev/iavf/iavf_osdep.c
352
iavf_wr32(struct iavf_hw *hw, uint32_t reg, uint32_t val)
sys/dev/iavf/iavf_osdep.c
361
osdep->mem_bus_space_handle, reg, val);
sys/dev/iavf/iavf_osdep.h
244
void iavf_wr32(struct iavf_hw *hw, uint32_t reg, uint32_t val);
sys/dev/iavf/iavf_osdep.h
247
#define wr32(hw, reg, val) iavf_wr32(hw, reg, val)
sys/dev/iavf/if_iavf_iflib.c
1376
u32 val;
sys/dev/iavf/if_iavf_iflib.c
1382
val = rd32(hw, IAVF_VFGEN_RSTAT) &
sys/dev/iavf/if_iavf_iflib.c
1384
if (val != VIRTCHNL_VFR_VFACTIVE
sys/dev/iavf/if_iavf_iflib.c
1385
&& val != VIRTCHNL_VFR_COMPLETED) {
sys/dev/iavf/if_iavf_iflib.c
1386
iavf_dbg_info(sc, "reset in progress! (%d)\n", val);
sys/dev/ice/ice_adminq_cmd.h
1869
int val;
sys/dev/ice/ice_common.c
1345
u32 val = 0;
sys/dev/ice/ice_common.c
1352
val = GLGEN_RTRIG_CORER_M;
sys/dev/ice/ice_common.c
1356
val = GLGEN_RTRIG_GLOBR_M;
sys/dev/ice/ice_common.c
1362
val |= rd32(hw, GLGEN_RTRIG);
sys/dev/ice/ice_common.c
1363
wr32(hw, GLGEN_RTRIG, val);
sys/dev/ice/ice_common.c
650
*output = buf.sto.txrx_equa_resp.val;
sys/dev/ice/ice_common.c
783
u32 val;
sys/dev/ice/ice_common.c
796
val = rd32(hw, E830_PRTMAC_CL01_PAUSE_QUANTA);
sys/dev/ice/ice_common.c
797
tx_timer_val = val & E830_PRTMAC_CL01_PAUSE_QUANTA_CL0_PAUSE_QUANTA_M;
sys/dev/ice/ice_common.c
801
val = rd32(hw, E830_PRTMAC_CL01_QUANTA_THRESH);
sys/dev/ice/ice_common.c
802
fc_thres_val = val & E830_PRTMAC_CL01_QUANTA_THRESH_CL0_QUANTA_THRESH_M;
sys/dev/ice/ice_common.c
805
val = rd32(hw, E800_PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(E800_IDX_OF_LFC));
sys/dev/ice/ice_common.c
806
tx_timer_val = val &
sys/dev/ice/ice_common.c
811
val = rd32(hw, E800_PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(E800_IDX_OF_LFC));
sys/dev/ice/ice_common.c
812
fc_thres_val = val & E800_PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M;
sys/dev/ice/ice_common.h
118
#define ice_arr_elem_idx(idx, val) [(idx)] = (val)
sys/dev/ice/ice_controlq.c
1032
u32 val = 0;
sys/dev/ice/ice_controlq.c
1064
val = rd32(hw, cq->sq.head);
sys/dev/ice/ice_controlq.c
1065
if (val >= cq->num_sq_entries) {
sys/dev/ice/ice_controlq.c
1067
val);
sys/dev/ice/ice_ddp_common.c
1002
u16 val;
sys/dev/ice/ice_ddp_common.c
1010
label_name = ice_enum_labels(ice_seg, type, &state, &val);
sys/dev/ice/ice_ddp_common.c
1012
*value = val;
sys/dev/ice/ice_ddp_common.c
2234
u16 val;
sys/dev/ice/ice_ddp_common.c
2244
&val);
sys/dev/ice/ice_ddp_common.c
2250
ice_add_tunnel_hint(hw, label_name, val);
sys/dev/ice/ice_ddp_common.c
2252
label_name = ice_enum_labels(NULL, 0, &state, &val);
sys/dev/ice/ice_flex_pipe.c
130
void ice_add_tunnel_hint(struct ice_hw *hw, char *label_name, u16 val)
sys/dev/ice/ice_flex_pipe.c
151
hw->tnl.tbl[hw->tnl.count].boost_addr = val;
sys/dev/ice/ice_flex_pipe.c
197
ice_gen_key_word(u8 val, u8 valid, u8 dont_care, u8 nvr_mtch, u8 *key,
sys/dev/ice/ice_flex_pipe.c
224
} else if (val & 0x01) { /* exact 1 match */
sys/dev/ice/ice_flex_pipe.c
235
val >>= 1;
sys/dev/ice/ice_flex_pipe.c
299
ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off,
sys/dev/ice/ice_flex_pipe.c
322
if (ice_gen_key_word(val[i], upd ? upd[i] : 0xff,
sys/dev/ice/ice_flex_pipe.h
105
void ice_add_tunnel_hint(struct ice_hw *hw, char *label_name, u16 val);
sys/dev/ice/ice_flex_type.h
385
u32 val;
sys/dev/ice/ice_flow.c
1191
seg->fields[fld].src.val = val_loc;
sys/dev/ice/ice_flow.c
1282
u64 val;
sys/dev/ice/ice_flow.c
1317
val = (u64)(seg->hdrs & ICE_FLOW_RSS_SEG_HDR_L3_MASKS);
sys/dev/ice/ice_flow.c
1318
if (val && !ice_is_pow2(val))
sys/dev/ice/ice_flow.c
1321
val = (u64)(seg->hdrs & ICE_FLOW_RSS_SEG_HDR_L4_MASKS);
sys/dev/ice/ice_flow.c
1322
if (val && !ice_is_pow2(val))
sys/dev/ice/ice_flow.h
229
#define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val))
sys/dev/ice/ice_flow.h
249
u16 val; /* Offset where the value is located */
sys/dev/ice/ice_lib.c
1386
u32 val;
sys/dev/ice/ice_lib.c
1390
val = (QINT_RQCTL_CAUSE_ENA_M |
sys/dev/ice/ice_lib.c
1393
wr32(hw, QINT_RQCTL(rxqid), val);
sys/dev/ice/ice_lib.c
1434
u32 val;
sys/dev/ice/ice_lib.c
1438
val = (QINT_TQCTL_CAUSE_ENA_M |
sys/dev/ice/ice_lib.c
1441
wr32(hw, QINT_TQCTL(txqid), val);
sys/dev/ice/ice_lib.c
1485
u32 reg, val;
sys/dev/ice/ice_lib.c
1489
val = rd32(hw, QINT_RQCTL(reg));
sys/dev/ice/ice_lib.c
1490
val &= ~QINT_RQCTL_CAUSE_ENA_M;
sys/dev/ice/ice_lib.c
1491
wr32(hw, QINT_RQCTL(reg), val);
sys/dev/ice/ice_lib.c
1522
u32 reg, val;
sys/dev/ice/ice_lib.c
1526
val = rd32(hw, QINT_TQCTL(reg));
sys/dev/ice/ice_lib.c
1527
val &= ~QINT_TQCTL_CAUSE_ENA_M;
sys/dev/ice/ice_lib.c
1528
wr32(hw, QINT_TQCTL(reg), val);
sys/dev/ice/ice_lib.c
2153
u32 val;
sys/dev/ice/ice_lib.c
2158
val = rd32(hw, cq->rq.len);
sys/dev/ice/ice_lib.c
2159
if (val & (PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
sys/dev/ice/ice_lib.c
2161
if (val & PF_FW_ARQLEN_ARQVFE_M)
sys/dev/ice/ice_lib.c
2164
if (val & PF_FW_ARQLEN_ARQOVFL_M)
sys/dev/ice/ice_lib.c
2168
if (val & PF_FW_ARQLEN_ARQCRIT_M)
sys/dev/ice/ice_lib.c
2172
val &= ~(PF_FW_ARQLEN_ARQVFE_M | PF_FW_ARQLEN_ARQOVFL_M |
sys/dev/ice/ice_lib.c
2174
wr32(hw, cq->rq.len, val);
sys/dev/ice/ice_lib.c
2177
val = rd32(hw, cq->sq.len);
sys/dev/ice/ice_lib.c
2178
if (val & (PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
sys/dev/ice/ice_lib.c
2180
if (val & PF_FW_ATQLEN_ATQVFE_M)
sys/dev/ice/ice_lib.c
2183
if (val & PF_FW_ATQLEN_ATQOVFL_M)
sys/dev/ice/ice_lib.c
2187
if (val & PF_FW_ATQLEN_ATQCRIT_M)
sys/dev/ice/ice_lib.c
2191
val &= ~(PF_FW_ATQLEN_ATQVFE_M | PF_FW_ATQLEN_ATQOVFL_M |
sys/dev/ice/ice_lib.c
2193
wr32(hw, cq->sq.len, val);
sys/dev/ice/ice_lib.c
5269
u32 val;
sys/dev/ice/ice_lib.c
5275
val = (PFINT_OICR_ECC_ERR_M |
sys/dev/ice/ice_lib.c
5283
wr32(hw, PFINT_OICR_ENA, val);
sys/dev/ice/ice_lib.h
232
#define ICE_UP_TABLE_TRANSLATE(val, i) \
sys/dev/ice/ice_lib.h
233
(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
sys/dev/ice/ice_osdep.c
237
wr32(struct ice_hw *hw, uint32_t reg, uint32_t val)
sys/dev/ice/ice_osdep.c
241
bus_space_write_4(sc->bar0.tag, sc->bar0.handle, reg, val);
sys/dev/ice/ice_osdep.c
256
wr64(struct ice_hw *hw, uint32_t reg, uint64_t val)
sys/dev/ice/ice_osdep.c
261
bus_space_write_8(sc->bar0.tag, sc->bar0.handle, reg, val);
sys/dev/ice/ice_osdep.c
269
lo_val = (uint32_t)val;
sys/dev/ice/ice_osdep.c
270
hi_val = (uint32_t)(val >> 32);
sys/dev/ice/ice_osdep.h
87
void wr32(struct ice_hw *hw, uint32_t reg, uint32_t val);
sys/dev/ice/ice_osdep.h
88
void wr64(struct ice_hw *hw, uint32_t reg, uint64_t val);
sys/dev/ice/ice_protocol_type.h
240
u32 val;
sys/dev/ice/ice_sched.c
1497
u32 val, clk_src;
sys/dev/ice/ice_sched.c
1499
val = rd32(hw, GLGEN_CLKSTAT_SRC);
sys/dev/ice/ice_sched.c
1500
clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
sys/dev/ice/virtchnl.h
1466
#define VIRTCHNL_TEST_PROTO_HDR_FIELD(hdr, val) \
sys/dev/ice/virtchnl.h
1467
((hdr)->field_selector & BIT((val) & PROTO_HDR_FIELD_MASK))
sys/dev/ice/virtchnl.h
1481
#define VIRTCHNL_TEST_PROTO_HDR_TYPE(hdr, val) \
sys/dev/ice/virtchnl.h
1482
((hdr)->type == ((s32)((val) >> PROTO_HDR_SHIFT)))
sys/dev/ice/virtchnl.h
1483
#define VIRTCHNL_TEST_PROTO_HDR(hdr, val) \
sys/dev/ice/virtchnl.h
1484
(VIRTCHNL_TEST_PROTO_HDR_TYPE(hdr, val) && \
sys/dev/ice/virtchnl.h
1485
VIRTCHNL_TEST_PROTO_HDR_FIELD(hdr, val))
sys/dev/ichiic/ig4_iic.c
177
ig4iic_set_intr_mask(ig4iic_softc_t *sc, uint32_t val)
sys/dev/ichiic/ig4_iic.c
179
if (sc->intr_mask != val) {
sys/dev/ichiic/ig4_iic.c
180
reg_write(sc, IG4_REG_INTR_MASK, val);
sys/dev/ichiic/ig4_iic.c
181
sc->intr_mask = val;
sys/dev/ichiic/ig4_iic.c
186
intrstat2iic(ig4iic_softc_t *sc, uint32_t val)
sys/dev/ichiic/ig4_iic.c
190
if (val & IG4_INTR_RX_UNDER)
sys/dev/ichiic/ig4_iic.c
192
if (val & IG4_INTR_RX_OVER)
sys/dev/ichiic/ig4_iic.c
194
if (val & IG4_INTR_TX_OVER)
sys/dev/ichiic/ig4_iic.c
197
if (val & IG4_INTR_TX_ABRT) {
sys/dev/ichiic/ig4_iic.c
226
if (val & (IG4_INTR_TX_OVER | IG4_INTR_RX_OVER))
sys/dev/ichiic/ig4_iic.c
228
if (val & IG4_INTR_RX_UNDER)
sys/dev/ichwd/i6300esbwd.c
55
i6300esbwd_cfg_write(struct i6300esbwd_softc *sc, uint16_t val)
sys/dev/ichwd/i6300esbwd.c
57
pci_write_config(sc->dev, WDT_CONFIG_REG, val, 2);
sys/dev/ichwd/i6300esbwd.c
67
i6300esbwd_lock_write(struct i6300esbwd_softc *sc, uint8_t val)
sys/dev/ichwd/i6300esbwd.c
69
pci_write_config(sc->dev, WDT_LOCK_REG, val, 1);
sys/dev/ichwd/ichwd.c
320
#define ichwd_write_tco_1(sc, off, val) \
sys/dev/ichwd/ichwd.c
321
bus_write_1((sc)->tco_res, (off), (val))
sys/dev/ichwd/ichwd.c
322
#define ichwd_write_tco_2(sc, off, val) \
sys/dev/ichwd/ichwd.c
323
bus_write_2((sc)->tco_res, (off), (val))
sys/dev/ichwd/ichwd.c
324
#define ichwd_write_tco_4(sc, off, val) \
sys/dev/ichwd/ichwd.c
325
bus_write_4((sc)->tco_res, (off), (val))
sys/dev/ichwd/ichwd.c
326
#define ichwd_write_smi_4(sc, off, val) \
sys/dev/ichwd/ichwd.c
327
bus_write_4((sc)->smi_res, (off), (val))
sys/dev/ichwd/ichwd.c
328
#define ichwd_write_gcs_4(sc, off, val) \
sys/dev/ichwd/ichwd.c
329
bus_write_4((sc)->gcs_res, (off), (val))
sys/dev/ichwd/ichwd.c
331
#define ichwd_write_pmc_4(sc, off, val) \
sys/dev/ichwd/ichwd.c
332
bus_write_4((sc)->gcs_res, (off), (val))
sys/dev/ichwd/ichwd.c
333
#define ichwd_write_gc_4(sc, off, val) \
sys/dev/ichwd/ichwd.c
334
bus_write_4((sc)->gc_res, (off), (val))
sys/dev/ida/idavar.h
43
#define ida_outb(ida, port, val) \
sys/dev/ida/idavar.h
44
bus_write_1((ida)->regs, port, val)
sys/dev/ida/idavar.h
45
#define ida_outw(ida, port, val) \
sys/dev/ida/idavar.h
46
bus_write_2((ida)->regs, port, val)
sys/dev/ida/idavar.h
47
#define ida_outl(ida, port, val) \
sys/dev/ida/idavar.h
48
bus_write_4((ida)->regs, port, val)
sys/dev/igc/if_igc.c
2627
u_int val;
sys/dev/igc/if_igc.c
2630
val = IGC_READ_REG(&sc->hw, oidp->oid_arg2);
sys/dev/igc/if_igc.c
2631
return (sysctl_handle_int(oidp, &val, 0, req));
sys/dev/igc/if_igc.c
3081
u32 reg, val, shift;
sys/dev/igc/if_igc.c
3102
val = IGC_READ_REG(&sc->hw, reg);
sys/dev/igc/if_igc.c
3103
mask = (val >> shift) & 0xfff;
sys/dev/igc/if_igc.c
3109
val = (val & ~(0xfff << shift)) | (mask << shift);
sys/dev/igc/if_igc.c
3110
IGC_WRITE_REG(&sc->hw, reg, val);
sys/dev/iicbus/acpi_iicbus.c
226
int val;
sys/dev/iicbus/acpi_iicbus.c
262
val = acpi_iicbus_recvb(dev, sb->SlaveAddress, gsb->data);
sys/dev/iicbus/acpi_iicbus.c
266
val = acpi_iicbus_sendb(dev, sb->SlaveAddress, gsb->data[0]);
sys/dev/iicbus/acpi_iicbus.c
270
val = acpi_iicbus_read(dev, sb->SlaveAddress, Address,
sys/dev/iicbus/acpi_iicbus.c
275
val = acpi_iicbus_write(dev, sb->SlaveAddress, Address,
sys/dev/iicbus/acpi_iicbus.c
280
val = acpi_iicbus_read(dev, sb->SlaveAddress, Address,
sys/dev/iicbus/acpi_iicbus.c
285
val = acpi_iicbus_write(dev, sb->SlaveAddress, Address,
sys/dev/iicbus/acpi_iicbus.c
290
val = acpi_iicbus_bread(dev, sb->SlaveAddress, Address,
sys/dev/iicbus/acpi_iicbus.c
295
val = acpi_iicbus_bwrite(dev, sb->SlaveAddress, Address,
sys/dev/iicbus/acpi_iicbus.c
300
val = acpi_iicbus_read(dev, sb->SlaveAddress, Address,
sys/dev/iicbus/acpi_iicbus.c
305
val = acpi_iicbus_write(dev, sb->SlaveAddress, Address,
sys/dev/iicbus/acpi_iicbus.c
316
gsb->status = val;
sys/dev/iicbus/acpi_iicbus.c
694
acpi_iicbus_write_ivar(device_t bus, device_t child, int which, uintptr_t val)
sys/dev/iicbus/acpi_iicbus.c
702
devi->handle = (ACPI_HANDLE)val;
sys/dev/iicbus/acpi_iicbus.c
705
return (iicbus_write_ivar(bus, child, which, val));
sys/dev/iicbus/adc/ad7417.c
223
buf[1] = out.val & 0xff;
sys/dev/iicbus/adc/ad7417.c
231
in->val = *((uint16_t*)buf);
sys/dev/iicbus/adc/ad7417.c
506
data.val = 0;
sys/dev/iicbus/adc/ad7417.c
508
err = ad7417_read_1(dev, addr, AD7417_CONFIG, &config.val);
sys/dev/iicbus/adc/ad7417.c
510
config.val = (config.val & ~AD7417_CONFMASK) | (tmp & AD7417_CONFMASK);
sys/dev/iicbus/adc/ad7417.c
516
*value = ((uint32_t)data.val) >> 6;
sys/dev/iicbus/adc/ad7417.c
74
uint8_t val;
sys/dev/iicbus/adc/ad7417.c
79
uint16_t val;
sys/dev/iicbus/adc/ads111x.c
168
ads111x_write_2(struct ads111x_softc *sc, int reg, int val)
sys/dev/iicbus/adc/ads111x.c
177
be16enc(&data[1], val);
sys/dev/iicbus/adc/ads111x.c
188
ads111x_read_2(struct ads111x_softc *sc, int reg, int *val)
sys/dev/iicbus/adc/ads111x.c
195
*val = (int16_t)be16dec(data);
sys/dev/iicbus/adc/pcf8591.c
143
int error, channel, val;
sys/dev/iicbus/adc/pcf8591.c
156
val = reading;
sys/dev/iicbus/adc/pcf8591.c
158
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/iicbus/controller/cadence/cdnc_i2c.c
112
#define WR2(sc, off, val) (bus_write_2((sc)->mem_res, (off), (val)))
sys/dev/iicbus/controller/cadence/cdnc_i2c.c
114
#define WR1(sc, off, val) (bus_write_1((sc)->mem_res, (off), (val)))
sys/dev/iicbus/controller/opencores/iicoc.c
62
uint8_t val;
sys/dev/iicbus/controller/opencores/iicoc.c
66
val = bus_read_1(sc->mem_res, reg<<sc->reg_shift);
sys/dev/iicbus/controller/opencores/iicoc.c
67
return (val);
sys/dev/iicbus/controller/qcom/geni_iic.c
126
#define WR(sc, reg, val) bus_write_4((sc)->regs_res, reg, val)
sys/dev/iicbus/controller/rockchip/rk_i2c.c
163
#define RK_I2C_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/dev/iicbus/controller/twsi/twsi.c
100
val = bus_read_4(sc->res[0], off);
sys/dev/iicbus/controller/twsi/twsi.c
102
debugf(sc, "read %x from %lx\n", val, off);
sys/dev/iicbus/controller/twsi/twsi.c
103
return (val);
sys/dev/iicbus/controller/twsi/twsi.c
107
TWSI_WRITE(struct twsi_softc *sc, bus_size_t off, uint32_t val)
sys/dev/iicbus/controller/twsi/twsi.c
111
debugf(sc, "Writing %x to %lx\n", val, off);
sys/dev/iicbus/controller/twsi/twsi.c
112
bus_write_4(sc->res[0], off, val);
sys/dev/iicbus/controller/twsi/twsi.c
118
uint32_t val;
sys/dev/iicbus/controller/twsi/twsi.c
120
val = TWSI_READ(sc, sc->reg_control);
sys/dev/iicbus/controller/twsi/twsi.c
121
debugf(sc, "read val=%x\n", val);
sys/dev/iicbus/controller/twsi/twsi.c
122
val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
sys/dev/iicbus/controller/twsi/twsi.c
123
val &= ~mask;
sys/dev/iicbus/controller/twsi/twsi.c
124
debugf(sc, "write val=%x\n", val);
sys/dev/iicbus/controller/twsi/twsi.c
125
TWSI_WRITE(sc, sc->reg_control, val);
sys/dev/iicbus/controller/twsi/twsi.c
131
uint32_t val;
sys/dev/iicbus/controller/twsi/twsi.c
133
val = TWSI_READ(sc, sc->reg_control);
sys/dev/iicbus/controller/twsi/twsi.c
134
debugf(sc, "read val=%x\n", val);
sys/dev/iicbus/controller/twsi/twsi.c
135
val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
sys/dev/iicbus/controller/twsi/twsi.c
136
val |= mask;
sys/dev/iicbus/controller/twsi/twsi.c
137
debugf(sc, "write val=%x\n", val);
sys/dev/iicbus/controller/twsi/twsi.c
138
TWSI_WRITE(sc, sc->reg_control, val);
sys/dev/iicbus/controller/twsi/twsi.c
98
uint32_t val;
sys/dev/iicbus/gpio/pcf8574.c
102
pcf8574_write(struct pcf8574_softc *sc, uint8_t val)
sys/dev/iicbus/gpio/pcf8574.c
110
msg.buf = &val;
sys/dev/iicbus/gpio/pcf8574.c
197
uint8_t val, stale;
sys/dev/iicbus/gpio/pcf8574.c
206
error = pcf8574_read(sc, &val);
sys/dev/iicbus/gpio/pcf8574.c
219
stale = val & sc->output_mask & ~sc->output_state;
sys/dev/iicbus/gpio/pcf8574.c
237
uint8_t val;
sys/dev/iicbus/gpio/pcf8574.c
261
val = sc->output_state | ~sc->output_mask;
sys/dev/iicbus/gpio/pcf8574.c
262
error = pcf8574_write(sc, val);
sys/dev/iicbus/gpio/pcf8574.c
286
uint8_t val;
sys/dev/iicbus/gpio/pcf8574.c
298
error = pcf8574_read(sc, &val);
sys/dev/iicbus/gpio/pcf8574.c
306
*on = (val & (1 << pin)) != 0;
sys/dev/iicbus/gpio/pcf8574.c
314
uint8_t val;
sys/dev/iicbus/gpio/pcf8574.c
335
val = sc->output_state | ~sc->output_mask;
sys/dev/iicbus/gpio/pcf8574.c
336
val &= ~(1 << pin);
sys/dev/iicbus/gpio/pcf8574.c
337
val |= (on != 0) << pin;
sys/dev/iicbus/gpio/pcf8574.c
339
error = pcf8574_write(sc, val);
sys/dev/iicbus/gpio/pcf8574.c
350
sc->output_state = val;
sys/dev/iicbus/gpio/pcf8574.c
359
uint8_t val;
sys/dev/iicbus/gpio/pcf8574.c
374
val = sc->output_state | ~sc->output_mask;
sys/dev/iicbus/gpio/pcf8574.c
375
val ^= 1 << pin;
sys/dev/iicbus/gpio/pcf8574.c
377
error = pcf8574_write(sc, val);
sys/dev/iicbus/gpio/pcf8574.c
384
sc->output_state = val;
sys/dev/iicbus/gpio/pcf8574.c
87
pcf8574_read(struct pcf8574_softc *sc, uint8_t *val)
sys/dev/iicbus/gpio/pcf8574.c
95
msg.buf = val;
sys/dev/iicbus/gpio/tca64xx.c
189
tca64xx_write(device_t dev, uint8_t reg, uint8_t val)
sys/dev/iicbus/gpio/tca64xx.c
194
uint8_t buffer[2] = {reg, val};
sys/dev/iicbus/gpio/tca64xx.c
345
uint8_t bit, val, addr;
sys/dev/iicbus/gpio/tca64xx.c
356
error = tca64xx_read(dev, addr, &val);
sys/dev/iicbus/gpio/tca64xx.c
360
*pflags = (val & (1 << bit)) ? GPIO_PIN_INPUT : GPIO_PIN_OUTPUT;
sys/dev/iicbus/gpio/tca64xx.c
363
error = tca64xx_read(dev, addr, &val);
sys/dev/iicbus/gpio/tca64xx.c
367
if (val & (1 << bit))
sys/dev/iicbus/gpio/tca64xx.c
376
uint8_t bit, val, addr, pins, inv_val;
sys/dev/iicbus/gpio/tca64xx.c
390
error = tca64xx_read(dev, addr, &val);
sys/dev/iicbus/gpio/tca64xx.c
400
val |= (1 << bit);
sys/dev/iicbus/gpio/tca64xx.c
402
val &= ~(1 << bit);
sys/dev/iicbus/gpio/tca64xx.c
410
error = tca64xx_write(dev, addr, val);
sys/dev/iicbus/gpio/tca64xx.c
465
tca64xx_pin_set(device_t dev, uint32_t pin, unsigned int val)
sys/dev/iicbus/gpio/tca64xx.c
480
dbg_dev_printf(dev, "Setting pin: %u to %u\n", pin, val);
sys/dev/iicbus/gpio/tca64xx.c
491
if (val != 0)
sys/dev/iicbus/mux/ltc430x.c
159
int chip, err, numchan, val;
sys/dev/iicbus/mux/ltc430x.c
177
if (OF_getprop(node, "freebsd,ctlreg2", &val, sizeof(val)) > 0) {
sys/dev/iicbus/mux/ltc430x.c
178
ctlreg2 = val;
sys/dev/iicbus/mux/ltc430x.c
183
"idle_disconnect", &val) == 0) {
sys/dev/iicbus/mux/ltc430x.c
184
sc->idle_disconnect = val;
sys/dev/iicbus/mux/ltc430x.c
188
"ctlreg2", &val) == 0) {
sys/dev/iicbus/mux/ltc430x.c
189
ctlreg2 = val;
sys/dev/iicbus/pmic/act8846.c
120
act8846_write(struct act8846_softc *sc, uint8_t reg, uint8_t val)
sys/dev/iicbus/pmic/act8846.c
131
data[1] = val;
sys/dev/iicbus/pmic/act8846.c
168
uint8_t val;
sys/dev/iicbus/pmic/act8846.c
171
rv = act8846_read(sc, reg, &val);
sys/dev/iicbus/pmic/act8846.c
175
val &= ~clear;
sys/dev/iicbus/pmic/act8846.c
176
val |= set;
sys/dev/iicbus/pmic/act8846.c
178
rv = act8846_write(sc, reg, val);
sys/dev/iicbus/pmic/act8846.c
72
act8846_read(struct act8846_softc *sc, uint8_t reg, uint8_t *val)
sys/dev/iicbus/pmic/act8846.c
78
{0, IIC_M_RD, 1, val},
sys/dev/iicbus/pmic/act8846.h
47
#define RD1(sc, reg, val) act8846_read(sc, reg, val)
sys/dev/iicbus/pmic/act8846.h
48
#define WR1(sc, reg, val) act8846_write(sc, reg, val)
sys/dev/iicbus/pmic/act8846.h
51
int act8846_read(struct act8846_softc *sc, uint8_t reg, uint8_t *val);
sys/dev/iicbus/pmic/act8846.h
52
int act8846_write(struct act8846_softc *sc, uint8_t reg, uint8_t val);
sys/dev/iicbus/pmic/fan53555.c
119
fan53555_read(device_t dev, uint8_t reg, uint8_t *val)
sys/dev/iicbus/pmic/fan53555.c
125
{0, IIC_M_RD, 1, val},
sys/dev/iicbus/pmic/fan53555.c
143
fan53555_write(device_t dev, uint8_t reg, uint8_t val)
sys/dev/iicbus/pmic/fan53555.c
154
data[1] = val;
sys/dev/iicbus/pmic/fan53555.c
205
uint8_t val;
sys/dev/iicbus/pmic/fan53555.c
211
fan53555_read(sc->base_dev, sc->live_reg, &val);
sys/dev/iicbus/pmic/fan53555.c
213
val |=FAN53555_VSEL_ENA;
sys/dev/iicbus/pmic/fan53555.c
215
val &= ~FAN53555_VSEL_ENA;
sys/dev/iicbus/pmic/fan53555.c
216
fan53555_write(sc->base_dev, sc->live_reg, val);
sys/dev/iicbus/pmic/rockchip/rk8xx.c
109
uint8_t val;
sys/dev/iicbus/pmic/rockchip/rk8xx.c
115
error = rk8xx_read(sc->dev, sc->dev_ctrl.dev_ctrl_reg, &val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx.c
118
val |= sc->dev_ctrl.pwr_off_mask;
sys/dev/iicbus/pmic/rockchip/rk8xx.c
125
val |= sc->dev_ctrl.pwr_rst_mask;
sys/dev/iicbus/pmic/rockchip/rk8xx.c
128
val |= sc->dev_ctrl.pwr_off_mask;
sys/dev/iicbus/pmic/rockchip/rk8xx.c
132
&val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c
53
uint8_t val;
sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c
57
rk8xx_read(sc->base_dev, CLK32OUT_REG, &val, sizeof(val));
sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c
59
val |= CLK32OUT_CLKOUT2_EN;
sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c
61
val &= ~CLK32OUT_CLKOUT2_EN;
sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c
62
rk8xx_write(sc->base_dev, CLK32OUT_REG, &val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
100
val |= sc->def->enable_mask;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
102
val &= ~sc->def->enable_mask;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
103
rk8xx_write(sc->base_dev, sc->def->enable_reg, &val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
111
rk8xx_regnode_reg_to_voltage(struct rk8xx_reg_sc *sc, uint8_t val, int *uv)
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
123
if (val > change) {
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
124
if (val < sc->def->voltage_nstep) {
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
126
(val - change) *
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
133
if (val < sc->def->voltage_nstep)
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
134
*uv = sc->def->voltage_min + val * sc->def->voltage_step;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
139
if (val < sc->def->voltage_nstep)
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
140
*uv = sc->def->voltage_min + val * sc->def->voltage_step;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
149
int max_uvolt, uint8_t *val)
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
176
*val = nval;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
184
uint8_t val;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
189
rk8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
190
if (val & sc->def->enable_mask)
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
201
uint8_t val, old;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
215
rk8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
216
old = val;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
217
if (rk8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
221
val |= (old &= ~sc->def->voltage_mask);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
223
rk8xx_write(sc->base_dev, sc->def->voltage_reg, &val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
225
rk8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
229
rk8xx_regnode_reg_to_voltage(sc, val, &uvolt);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
241
uint8_t val;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
253
rk8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
254
rk8xx_regnode_reg_to_voltage(sc, val & sc->def->voltage_mask, uvolt);
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
91
uint8_t val;
sys/dev/iicbus/pmic/rockchip/rk8xx_regulators.c
98
rk8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
sys/dev/iicbus/pmic/silergy/sy8106a.c
108
buffer[1] = val;
sys/dev/iicbus/pmic/silergy/sy8106a.c
128
uint8_t val;
sys/dev/iicbus/pmic/silergy/sy8106a.c
132
sy8106a_read(sc->base_dev, VOUT_COM, &val, 1);
sys/dev/iicbus/pmic/silergy/sy8106a.c
134
val &= ~COM_DISABLE;
sys/dev/iicbus/pmic/silergy/sy8106a.c
136
val |= COM_DISABLE;
sys/dev/iicbus/pmic/silergy/sy8106a.c
137
sy8106a_write(sc->base_dev, VOUT_COM, val);
sys/dev/iicbus/pmic/silergy/sy8106a.c
150
uint8_t val, oval;
sys/dev/iicbus/pmic/silergy/sy8106a.c
160
val = SEL_GO | ((min_uvolt - SEL_VOLTAGE_BASE) / SEL_VOLTAGE_STEP);
sys/dev/iicbus/pmic/silergy/sy8106a.c
161
sy8106a_write(sc->base_dev, VOUT1_SEL, val);
sys/dev/iicbus/pmic/silergy/sy8106a.c
174
uint8_t val;
sys/dev/iicbus/pmic/silergy/sy8106a.c
178
sy8106a_read(sc->base_dev, VOUT1_SEL, &val, 1);
sys/dev/iicbus/pmic/silergy/sy8106a.c
179
*uvolt = (val & SEL_VOLTAGE_MASK) * SEL_VOLTAGE_STEP +
sys/dev/iicbus/pmic/silergy/sy8106a.c
99
sy8106a_write(device_t dev, uint8_t reg, uint8_t val)
sys/dev/iicbus/pmic/silergy/syr827.c
109
uint8_t val;
sys/dev/iicbus/pmic/silergy/syr827.c
113
syr827_read(sc->base_dev, sc->volt_reg, &val, 1);
sys/dev/iicbus/pmic/silergy/syr827.c
115
val &= ~VSEL_BUCK_EN;
sys/dev/iicbus/pmic/silergy/syr827.c
117
val |= VSEL_BUCK_EN;
sys/dev/iicbus/pmic/silergy/syr827.c
118
syr827_write(sc->base_dev, sc->volt_reg, val);
sys/dev/iicbus/pmic/silergy/syr827.c
131
uint8_t val;
sys/dev/iicbus/pmic/silergy/syr827.c
136
syr827_read(sc->base_dev, sc->volt_reg, &val, 1);
sys/dev/iicbus/pmic/silergy/syr827.c
137
cur_uvolt = (val & VSEL_NSEL_MASK) * VSEL_VOLTAGE_STEP +
sys/dev/iicbus/pmic/silergy/syr827.c
141
val &= ~VSEL_NSEL_MASK;
sys/dev/iicbus/pmic/silergy/syr827.c
142
val |= ((min_uvolt - VSEL_VOLTAGE_BASE) / VSEL_VOLTAGE_STEP);
sys/dev/iicbus/pmic/silergy/syr827.c
143
syr827_write(sc->base_dev, sc->volt_reg, val);
sys/dev/iicbus/pmic/silergy/syr827.c
156
uint8_t val;
sys/dev/iicbus/pmic/silergy/syr827.c
160
syr827_read(sc->base_dev, sc->volt_reg, &val, 1);
sys/dev/iicbus/pmic/silergy/syr827.c
161
*uvolt = (val & VSEL_NSEL_MASK) * VSEL_VOLTAGE_STEP +
sys/dev/iicbus/pmic/silergy/syr827.c
257
uint8_t val;
sys/dev/iicbus/pmic/silergy/syr827.c
263
syr827_read(dev, ID1, &val, 1);
sys/dev/iicbus/pmic/silergy/syr827.c
265
(val & ID1_VENDOR_MASK) >> ID1_VENDOR_SHIFT,
sys/dev/iicbus/pmic/silergy/syr827.c
266
val & ID1_DIE_MASK);
sys/dev/iicbus/pmic/silergy/syr827.c
267
syr827_read(dev, ID2, &val, 1);
sys/dev/iicbus/pmic/silergy/syr827.c
268
device_printf(dev, "DIE Rev: %x\n", val & ID2_DIE_REV_MASK);
sys/dev/iicbus/pmic/silergy/syr827.c
94
syr827_write(device_t dev, uint8_t reg, uint8_t val)
sys/dev/iicbus/pmic/silergy/syr827.c
96
return (iicdev_writeto(dev, reg, &val, 1, IIC_INTRWAIT));
sys/dev/iicbus/pwm/adt746x.c
538
uint16_t val;
sys/dev/iicbus/pwm/adt746x.c
558
val = data[0] + (data1[0] << 8);
sys/dev/iicbus/pwm/adt746x.c
560
if (val == 0 || val == 0xffff)
sys/dev/iicbus/pwm/adt746x.c
563
tmp = (90000 * 60) / val;
sys/dev/iicbus/rtc/ds13rtc.c
204
read_reg(struct ds13rtc_softc *sc, uint8_t reg, uint8_t *val)
sys/dev/iicbus/rtc/ds13rtc.c
207
return (iicdev_readfrom(sc->dev, reg, val, sizeof(*val), IIC_WAIT));
sys/dev/iicbus/rtc/ds13rtc.c
211
write_reg(struct ds13rtc_softc *sc, uint8_t reg, uint8_t val)
sys/dev/iicbus/rtc/ds13rtc.c
214
return (iicdev_writeto(sc->dev, reg, &val, sizeof(val), IIC_WAIT));
sys/dev/iicbus/rtc/hym8563.c
128
hym8563_write_1(device_t dev, uint8_t reg, uint8_t val)
sys/dev/iicbus/rtc/hym8563.c
131
return (iicdev_writeto(dev, reg, &val, 1, IIC_WAIT));
sys/dev/iicbus/rtc/hym8563.c
139
uint8_t val;
sys/dev/iicbus/rtc/hym8563.c
144
rv = hym8563_read_1(sc->base_dev, HYM8563_CLKOUT, &val);
sys/dev/iicbus/rtc/hym8563.c
151
val |= HYM8563_CLKOUT_ENABLE;
sys/dev/iicbus/rtc/hym8563.c
153
val &= ~HYM8563_CLKOUT_ENABLE;
sys/dev/iicbus/rtc/hym8563.c
154
hym8563_write_1(sc->base_dev, HYM8563_CLKOUT, val);
sys/dev/iicbus/rtc/hym8563.c
167
uint8_t val;
sys/dev/iicbus/rtc/hym8563.c
172
rv = hym8563_read_1(sc->base_dev, HYM8563_CLKOUT, &val);
sys/dev/iicbus/rtc/hym8563.c
179
switch (val & HYM8563_CLKOUT_MASK) {
sys/dev/iicbus/rtc/hym8563.c
202
uint8_t val, tmp;
sys/dev/iicbus/rtc/hym8563.c
225
rv = hym8563_read_1(sc->base_dev, HYM8563_CLKOUT, &val);
sys/dev/iicbus/rtc/hym8563.c
232
val &= ~HYM8563_CLKOUT_MASK;
sys/dev/iicbus/rtc/hym8563.c
233
val |= tmp;
sys/dev/iicbus/rtc/hym8563.c
234
rv = hym8563_write_1(sc->base_dev, HYM8563_CLKOUT, val);
sys/dev/iicbus/rtc/isl12xx.c
157
isl12xx_write1(struct isl12xx_softc *sc, uint8_t reg, uint8_t val)
sys/dev/iicbus/rtc/isl12xx.c
160
return (iicdev_writeto(sc->dev, reg, &val, 1, WAITFLAGS));
sys/dev/iicbus/rtc/nxprtc.c
291
read_reg(struct nxprtc_softc *sc, uint8_t reg, uint8_t *val)
sys/dev/iicbus/rtc/nxprtc.c
294
return (nxprtc_readfrom(sc->dev, reg, val, sizeof(*val), WAITFLAGS));
sys/dev/iicbus/rtc/nxprtc.c
298
write_reg(struct nxprtc_softc *sc, uint8_t reg, uint8_t val)
sys/dev/iicbus/rtc/nxprtc.c
301
return (iicdev_writeto(sc->dev, reg, &val, sizeof(val), WAITFLAGS));
sys/dev/iicbus/rtc/rtc8583.c
122
rtc8583_write1(struct rtc8583_softc *sc, uint8_t reg, uint8_t val)
sys/dev/iicbus/rtc/rtc8583.c
125
return (rtc8583_writeto(sc->dev, reg, &val, 1, IIC_WAIT));
sys/dev/iicbus/sensor/ds1631.c
81
uint8_t val;
sys/dev/iicbus/sensor/ds1631.c
86
uint16_t val;
sys/dev/iicbus/sensor/max44009.c
101
val = ((valhi & 0x0f) << 4) | (vallo & 0x0f);
sys/dev/iicbus/sensor/max44009.c
102
val <<= (valhi & 0xf0) >> 4;
sys/dev/iicbus/sensor/max44009.c
103
val = val * 72 / 100;
sys/dev/iicbus/sensor/max44009.c
104
*reading = val;
sys/dev/iicbus/sensor/max44009.c
113
int error, val;
sys/dev/iicbus/sensor/max44009.c
120
val = reading;
sys/dev/iicbus/sensor/max44009.c
122
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/iicbus/sensor/max44009.c
72
u_int val;
sys/dev/intel/pchtherm.c
145
#define FLAG_PRINT(dev, str, val) device_printf \
sys/dev/intel/pchtherm.c
147
((val) & 0x80)? "Locked" : "", \
sys/dev/intel/pchtherm.c
148
((val) & 0x1)? "En" : "Dis")
sys/dev/intel/pchtherm.c
153
unsigned int val;
sys/dev/intel/pchtherm.c
184
val = bus_read_1(sc->tbar, PCHTHERM_REG_TSREL);
sys/dev/intel/pchtherm.c
186
FLAG_PRINT(dev, "SMBus report", val);
sys/dev/intel/pchtherm.c
188
val = bus_read_1(sc->tbar, PCHTHERM_REG_TSMIC);
sys/dev/intel/pchtherm.c
190
FLAG_PRINT(dev, "SMI on alert", val);
sys/dev/intel/pchtherm.c
192
val = bus_read_2(sc->tbar, PCHTHERM_REG_TSPM);
sys/dev/intel/pchtherm.c
193
flag = val >> 13;
sys/dev/intel/pchtherm.c
198
1<<((val>>9)&7));
sys/dev/intel/pchtherm.c
201
temp = val & PCHTHERM_TEMP_MASK;
sys/dev/intel/pchtherm.c
203
sc->pmtime = 1<<((val>>9)&7);
sys/dev/intel/pchtherm.c
214
val = bus_read_4(sc->tbar, PCHTHERM_REG_TL);
sys/dev/intel/pchtherm.c
215
flag = val>>29;
sys/dev/intel/pchtherm.c
240
val = bus_read_2(sc->tbar, PCHTHERM_REG_TL2);
sys/dev/intel/pchtherm.c
242
flag = val >>14;
sys/dev/intel/pchtherm.c
248
val = bus_read_2(sc->tbar, PCHTHERM_REG_PHLC);
sys/dev/intel/pchtherm.c
249
val <<= 16;
sys/dev/intel/pchtherm.c
250
val |= bus_read_2(sc->tbar, PCHTHERM_REG_PHL);
sys/dev/intel/pchtherm.c
251
if ((val & 0x10000) != 0x10000) {
sys/dev/intel/pchtherm.c
69
#define PCHTHERM_TEMP_TO_IK(val) (((val) & PCHTHERM_TEMP_MASK) * \
sys/dev/io/iodev.c
126
req->val = iodev_read_1(req->port);
sys/dev/io/iodev.c
130
req->val = iodev_read_1(req->port);
sys/dev/io/iodev.c
131
req->val |= iodev_read_1(req->port + 1) << 8;
sys/dev/io/iodev.c
133
req->val = iodev_read_2(req->port);
sys/dev/io/iodev.c
137
req->val = iodev_read_1(req->port);
sys/dev/io/iodev.c
138
req->val |= iodev_read_2(req->port + 1) << 8;
sys/dev/io/iodev.c
139
req->val |= iodev_read_1(req->port + 3) << 24;
sys/dev/io/iodev.c
141
req->val = iodev_read_2(req->port);
sys/dev/io/iodev.c
142
req->val |= iodev_read_2(req->port + 2) << 16;
sys/dev/io/iodev.c
144
req->val = iodev_read_4(req->port);
sys/dev/io/iodev.c
159
iodev_write_1(req->port, req->val);
sys/dev/io/iodev.c
163
iodev_write_1(req->port, req->val);
sys/dev/io/iodev.c
164
iodev_write_1(req->port + 1, req->val >> 8);
sys/dev/io/iodev.c
166
iodev_write_2(req->port, req->val);
sys/dev/io/iodev.c
170
iodev_write_1(req->port, req->val);
sys/dev/io/iodev.c
171
iodev_write_2(req->port + 1, req->val >> 8);
sys/dev/io/iodev.c
172
iodev_write_1(req->port + 3, req->val >> 24);
sys/dev/io/iodev.c
174
iodev_write_2(req->port, req->val);
sys/dev/io/iodev.c
175
iodev_write_2(req->port + 2, req->val >> 16);
sys/dev/io/iodev.c
177
iodev_write_4(req->port, req->val);
sys/dev/io/iodev.h
39
u_int val;
sys/dev/ioat/ioat_internal.h
62
bus_space_handle_t handle, bus_size_t offset, uint64_t val)
sys/dev/ioat/ioat_internal.h
64
bus_space_write_4(tag, handle, offset, val);
sys/dev/ioat/ioat_internal.h
65
bus_space_write_4(tag, handle, offset + 4, val >> 32);
sys/dev/ioat/ioat_internal.h
74
#define ioat_bus_space_write_8(tag, handle, offset, val) \
sys/dev/ioat/ioat_internal.h
75
bus_space_write_8((tag), (handle), (offset), (val))
sys/dev/ioat/ioat_test.c
217
uint32_t val = j + (index << 28);
sys/dev/ioat/ioat_test.c
220
((uint32_t *)tx->buf[2*k])[j] = ~val;
sys/dev/ioat/ioat_test.c
221
((uint32_t *)tx->buf[2*k+1])[j] = val;
sys/dev/ioat/ioat_test.c
580
char *val;
sys/dev/ioat/ioat_test.c
582
val = kern_getenv("hw.ioat.enable_ioat_test");
sys/dev/ioat/ioat_test.c
583
if (val != NULL && strcmp(val, "0") != 0)
sys/dev/ioat/ioat_test.c
585
freeenv(val);
sys/dev/ipmi/ipmi_isa.c
101
int i, unit, val;
sys/dev/ipmi/ipmi_isa.c
141
if (resource_int_value(name, unit, "port", &val) == 0 && val != 0) {
sys/dev/ipmi/ipmi_isa.c
142
info->address = val;
sys/dev/ipmi/ipmi_isa.c
144
} else if (resource_int_value(name, unit, "maddr", &val) == 0 &&
sys/dev/ipmi/ipmi_isa.c
145
val != 0) {
sys/dev/ipmi/ipmi_isa.c
146
info->address = val;
sys/dev/ipmi/ipmi_isa.c
151
if (resource_int_value(name, unit, "spacing", &val) == 0) {
sys/dev/ipmi/ipmi_isa.c
152
switch (val) {
sys/dev/ipw/if_ipw.c
227
uint16_t val;
sys/dev/ipw/if_ipw.c
2549
int val;
sys/dev/ipw/if_ipw.c
2551
val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) &&
sys/dev/ipw/if_ipw.c
2554
return SYSCTL_OUT(req, &val, sizeof val);
sys/dev/ipw/if_ipw.c
289
val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);
sys/dev/ipw/if_ipw.c
290
ic->ic_macaddr[0] = val >> 8;
sys/dev/ipw/if_ipw.c
291
ic->ic_macaddr[1] = val & 0xff;
sys/dev/ipw/if_ipw.c
292
val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);
sys/dev/ipw/if_ipw.c
293
ic->ic_macaddr[2] = val >> 8;
sys/dev/ipw/if_ipw.c
294
ic->ic_macaddr[3] = val & 0xff;
sys/dev/ipw/if_ipw.c
295
val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);
sys/dev/ipw/if_ipw.c
296
ic->ic_macaddr[4] = val >> 8;
sys/dev/ipw/if_ipw.c
297
ic->ic_macaddr[5] = val & 0xff;
sys/dev/ipw/if_ipw.c
918
uint16_t val;
sys/dev/ipw/if_ipw.c
948
val = 0;
sys/dev/ipw/if_ipw.c
953
val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;
sys/dev/ipw/if_ipw.c
963
return le16toh(val);
sys/dev/ipw/if_ipw.c
969
uint16_t val;
sys/dev/ipw/if_ipw.c
972
if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0)
sys/dev/ipw/if_ipw.c
973
val = 0x7ff; /* default to channels 1-11 */
sys/dev/ipw/if_ipw.c
974
val <<= 1;
sys/dev/ipw/if_ipw.c
976
return (val);
sys/dev/ipw/if_ipwreg.h
335
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/ipw/if_ipwreg.h
336
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/ipw/if_ipwreg.h
338
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/ipw/if_ipwreg.h
339
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/ipw/if_ipwreg.h
341
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/ipw/if_ipwreg.h
342
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/ipw/if_ipwreg.h
359
#define MEM_WRITE_1(sc, addr, val) do { \
sys/dev/ipw/if_ipwreg.h
361
CSR_WRITE_1((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sys/dev/ipw/if_ipwreg.h
364
#define MEM_WRITE_2(sc, addr, val) do { \
sys/dev/ipw/if_ipwreg.h
366
CSR_WRITE_2((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sys/dev/ipw/if_ipwreg.h
369
#define MEM_WRITE_4(sc, addr, val) do { \
sys/dev/ipw/if_ipwreg.h
371
CSR_WRITE_4((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sys/dev/ipw/if_ipwreg.h
382
#define IPW_EEPROM_CTL(sc, val) do { \
sys/dev/ipw/if_ipwreg.h
383
MEM_WRITE_4((sc), IPW_MEM_EEPROM_CTL, (val)); \
sys/dev/irdma/fbsd_kcompat.c
178
void *addr, u32 len, u32 val)
sys/dev/irdma/fbsd_kcompat.c
183
if (crc != val) {
sys/dev/irdma/fbsd_kcompat.c
184
irdma_pr_err("mpa crc check fail %x %x\n", crc, val);
sys/dev/irdma/fbsd_kcompat.c
187
printf("%s: result crc=%x value=%x\n", __func__, crc, val);
sys/dev/irdma/fbsd_kcompat.c
608
u32 val;
sys/dev/irdma/fbsd_kcompat.c
611
val = rd32(&rf->hw, GL_RDPU_CNTRL);
sys/dev/irdma/fbsd_kcompat.c
613
if_getdunit(rf->peer_info->ifp), GL_RDPU_CNTRL, val);
sys/dev/irdma/fbsd_kcompat.c
616
val &= ~(0x1 << 2);
sys/dev/irdma/fbsd_kcompat.c
617
wr32(&rf->hw, GL_RDPU_CNTRL, val);
sys/dev/irdma/fbsd_kcompat.c
618
val = rd32(&rf->hw, GL_RDPU_CNTRL);
sys/dev/irdma/fbsd_kcompat.c
620
if_getdunit(rf->peer_info->ifp), GL_RDPU_CNTRL, val);
sys/dev/irdma/icrdma_hw.c
101
u32 val;
sys/dev/irdma/icrdma_hw.c
106
val = FIELD_PREP(IRDMA_GLINT_DYN_CTL_ITR_INDX, IRDMA_IDX_ITR0) |
sys/dev/irdma/icrdma_hw.c
110
writel(val, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + idx);
sys/dev/irdma/icrdma_hw.c
436
u32 val;
sys/dev/irdma/icrdma_hw.c
438
val = rd32(hw, GL_RDPU_CNTRL);
sys/dev/irdma/icrdma_hw.c
439
val &= ~(0x3f << 10);
sys/dev/irdma/icrdma_hw.c
440
val |= (3 << 10);
sys/dev/irdma/icrdma_hw.c
441
wr32(hw, GL_RDPU_CNTRL, val);
sys/dev/irdma/irdma_ctrl.c
2761
irdma_get_cqp_reg_info(struct irdma_sc_cqp *cqp, u32 *val,
sys/dev/irdma/irdma_ctrl.c
2764
*val = readl(cqp->dev->hw_regs[IRDMA_CQPTAIL]);
sys/dev/irdma/irdma_ctrl.c
2765
*tail = FIELD_GET(IRDMA_CQPTAIL_WQTAIL, *val);
sys/dev/irdma/irdma_ctrl.c
2766
*error = FIELD_GET(IRDMA_CQPTAIL_CQP_OP_ERR, *val);
sys/dev/irdma/irdma_ctrl.c
2780
u32 newtail, error, val;
sys/dev/irdma/irdma_ctrl.c
2783
irdma_get_cqp_reg_info(cqp, &val, &newtail, &error);
sys/dev/irdma/irdma_ctrl.c
3192
u32 cnt = 0, p1, p2, val = 0, err_code;
sys/dev/irdma/irdma_ctrl.c
3266
val = readl(cqp->dev->hw_regs[IRDMA_CCQPSTATUS]);
sys/dev/irdma/irdma_ctrl.c
3267
} while (!val);
sys/dev/irdma/irdma_ctrl.c
3269
if (FLD_RS_32(cqp->dev, val, IRDMA_CCQPSTATUS_CCQP_ERR)) {
sys/dev/irdma/irdma_ctrl.c
3345
u32 cnt = 0, val;
sys/dev/irdma/irdma_ctrl.c
3357
val = readl(cqp->dev->hw_regs[IRDMA_CCQPSTATUS]);
sys/dev/irdma/irdma_ctrl.c
3358
} while (FLD_RS_32(cqp->dev, val, IRDMA_CCQPSTATUS_CCQP_DONE));
sys/dev/irdma/irdma_ctrl.c
3577
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
3597
irdma_get_cqp_reg_info(cqp, &val, &tail, &error);
sys/dev/irdma/irdma_ctrl.c
3640
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
3658
irdma_get_cqp_reg_info(cqp, &val, &tail, &error);
sys/dev/irdma/irdma_ctrl.c
4351
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
4379
irdma_get_cqp_reg_info(cqp, &val, &tail, &error);
sys/dev/irdma/irdma_ctrl.c
4602
u32 error, val, tail;
sys/dev/irdma/irdma_ctrl.c
4610
irdma_get_cqp_reg_info(cqp, &val, &tail, &error);
sys/dev/irdma/irdma_ctrl.c
4632
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
4650
irdma_get_cqp_reg_info(cqp, &val, &tail, &error);
sys/dev/irdma/irdma_ctrl.c
4721
u32 tail, val, error;
sys/dev/irdma/irdma_ctrl.c
4741
irdma_get_cqp_reg_info(cqp, &val, &tail, &error);
sys/dev/irdma/irdma_ctrl.c
5461
u32 val;
sys/dev/irdma/irdma_ctrl.c
5505
val = readl(dev->hw_regs[IRDMA_GLPCI_LBARCTRL]);
sys/dev/irdma/irdma_ctrl.c
5506
db_size = (u8)FIELD_GET(IRDMA_GLPCI_LBARCTRL_PE_DB_SIZE, val);
sys/dev/irdma/irdma_ctrl.c
5510
val, db_size);
sys/dev/irdma/irdma_ctrl.c
5564
u64 new_val = irdma_stat_val(gather_stats->val,
sys/dev/irdma/irdma_ctrl.c
5567
u64 last_val = irdma_stat_val(last_gather_stats->val,
sys/dev/irdma/irdma_defs.h
1586
static inline void set_64bit_val(__le64 *wqe_words, u32 byte_index, u64 val)
sys/dev/irdma/irdma_defs.h
1588
wqe_words[byte_index >> 3] = cpu_to_le64(val);
sys/dev/irdma/irdma_defs.h
1597
static inline void set_32bit_val(__le32 *wqe_words, u32 byte_index, u32 val)
sys/dev/irdma/irdma_defs.h
1599
wqe_words[byte_index >> 2] = cpu_to_le32(val);
sys/dev/irdma/irdma_defs.h
1608
static inline void get_64bit_val(__le64 *wqe_words, u32 byte_index, u64 *val)
sys/dev/irdma/irdma_defs.h
1610
*val = le64_to_cpu(wqe_words[byte_index >> 3]);
sys/dev/irdma/irdma_defs.h
1619
static inline void get_32bit_val(__le32 *wqe_words, u32 byte_index, u32 *val)
sys/dev/irdma/irdma_defs.h
1621
*val = le32_to_cpu(wqe_words[byte_index >> 2]);
sys/dev/irdma/irdma_defs.h
350
#define LS_64_1(val, bits) ((u64)(uintptr_t)(val) << (bits))
sys/dev/irdma/irdma_defs.h
351
#define RS_64_1(val, bits) ((u64)(uintptr_t)(val) >> (bits))
sys/dev/irdma/irdma_defs.h
352
#define LS_32_1(val, bits) ((u32)((val) << (bits)))
sys/dev/irdma/irdma_defs.h
353
#define RS_32_1(val, bits) ((u32)((val) >> (bits)))
sys/dev/irdma/irdma_defs.h
362
#define FIELD_PREP(mask, val) (((u64)(val) << mask##_S) & (mask))
sys/dev/irdma/irdma_defs.h
363
#define FIELD_GET(mask, val) (((val) & mask) >> mask##_S)
sys/dev/irdma/irdma_defs.h
366
#define FLD_LS_64(dev, val, field) \
sys/dev/irdma/irdma_defs.h
367
(((u64)(val) << (dev)->hw_shifts[field ## _S]) & (dev)->hw_masks[field ## _M])
sys/dev/irdma/irdma_defs.h
368
#define FLD_RS_64(dev, val, field) \
sys/dev/irdma/irdma_defs.h
369
((u64)((val) & (dev)->hw_masks[field ## _M]) >> (dev)->hw_shifts[field ## _S])
sys/dev/irdma/irdma_defs.h
370
#define FLD_LS_32(dev, val, field) \
sys/dev/irdma/irdma_defs.h
371
(((val) << (dev)->hw_shifts[field ## _S]) & (dev)->hw_masks[field ## _M])
sys/dev/irdma/irdma_defs.h
372
#define FLD_RS_32(dev, val, field) \
sys/dev/irdma/irdma_defs.h
373
((u64)((val) & (dev)->hw_masks[field ## _M]) >> (dev)->hw_shifts[field ## _S])
sys/dev/irdma/irdma_hmc.c
146
u32 val = FIELD_PREP(IRDMA_PFHMC_PDINV_PMSDIDX, sd_idx) |
sys/dev/irdma/irdma_hmc.c
150
writel(val, dev->hw_regs[IRDMA_PFHMC_PDINV]);
sys/dev/irdma/irdma_puda.h
203
int irdma_ieq_check_mpacrc(void *desc, void *addr, u32 len, u32 val);
sys/dev/irdma/irdma_type.h
322
u64 val[IRDMA_GATHER_STATS_BUF_SIZE / sizeof(u64)];
sys/dev/isci/isci_oem_parameters.c
157
uint8_t val = ((uint8_t *)&oem_data->controller_element[index])[i];
sys/dev/isci/isci_oem_parameters.c
158
isci_log_message(1, "ISCI", "%02x ", val);
sys/dev/isci/scil/scu_registers.h
719
#define SCU_PEG_SCUVZECR_GEN_VAL(name, val) \
sys/dev/isci/scil/scu_registers.h
720
SCU_GEN_VALUE(SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_##name, val)
sys/dev/isci/scil/scu_registers.h
741
#define SCU_PTSGCR_GEN_VAL(name, val) \
sys/dev/isci/scil/scu_registers.h
742
SCU_GEN_VALUE(SCU_PTSG_CONTROL_##name, val)
sys/dev/isci/scil/scu_registers.h
753
#define SCU_RTCR_GEN_VAL(name, val) \
sys/dev/isci/scil/scu_registers.h
754
SCU_GEN_VALUE(SCU_PTSG_##name, val)
sys/dev/isci/scil/scu_registers.h
761
#define SCU_RTCCR_GEN_VAL(name, val) \
sys/dev/isci/scil/scu_registers.h
762
SCU_GEN_VALUE(SCU_PTSG_REAL_TIME_CLOCK_CONTROL_##name, val)
sys/dev/isl/isl.c
77
isl_read_byte(device_t dev, uint8_t reg, uint8_t *val)
sys/dev/isl/isl.c
82
{ addr, IIC_M_RD, 1, val },
sys/dev/isl/isl.c
89
isl_write_byte(device_t dev, uint8_t reg, uint8_t val)
sys/dev/isl/isl.c
92
uint8_t bytes[] = { reg, val };
sys/dev/ismt/ismt.c
180
uint32_t val;
sys/dev/ismt/ismt.c
182
val = bus_read_4(sc->mmio_res, ISMT_MSTR_MSTS);
sys/dev/ismt/ismt.c
183
ISMT_DEBUG(sc->pcidev, "%s MSTS=0x%x\n", __func__, val);
sys/dev/ismt/ismt.c
185
val |= (ISMT_MSTS_MIS | ISMT_MSTS_MEIS);
sys/dev/ismt/ismt.c
186
bus_write_4(sc->mmio_res, ISMT_MSTR_MSTS, val);
sys/dev/ismt/ismt.c
248
uint32_t err, fmhp, val;
sys/dev/ismt/ismt.c
261
val = bus_read_4(sc->mmio_res, ISMT_MSTR_MCTRL);
sys/dev/ismt/ismt.c
262
val &= ~ISMT_MCTRL_FMHP;
sys/dev/ismt/ismt.c
263
val |= fmhp;
sys/dev/ismt/ismt.c
264
bus_write_4(sc->mmio_res, ISMT_MSTR_MCTRL, val);
sys/dev/ismt/ismt.c
267
val = bus_read_4(sc->mmio_res, ISMT_MSTR_MCTRL);
sys/dev/ismt/ismt.c
268
val |= ISMT_MCTRL_SS;
sys/dev/ismt/ismt.c
269
bus_write_4(sc->mmio_res, ISMT_MSTR_MCTRL, val);
sys/dev/ismt/ismt.c
584
int err, num_vectors, val;
sys/dev/ismt/ismt.c
652
val = bus_read_4(sc->mmio_res, ISMT_MSTR_MDS);
sys/dev/ismt/ismt.c
653
val &= ~ISMT_MDS_MASK;
sys/dev/ismt/ismt.c
654
val |= (ISMT_DESC_ENTRIES - 1);
sys/dev/ismt/ismt.c
655
bus_write_4(sc->mmio_res, ISMT_MSTR_MDS, val);
sys/dev/isp/isp.c
212
uint32_t code_org, val;
sys/dev/isp/isp.c
254
val = ISP_READ(isp, BIU2400_CSR);
sys/dev/isp/isp.c
255
if ((val & BIU2400_DMA_ACTIVE) == 0) {
sys/dev/isp/isp.c
259
if (val & BIU2400_DMA_ACTIVE)
sys/dev/isp/isp.c
269
val = ISP_READ(isp, OUTMAILBOX0);
sys/dev/isp/isp.c
270
if (val != 0x4)
sys/dev/isp/isp.c
273
switch (val) {
sys/dev/isp/isp.c
283
isp_prt(isp, ISP_LOGERR, "Unknown RISC Status Code 0x%x.", val);
sys/dev/isp/isp.c
299
val = ISP_READ(isp, OUTMAILBOX0);
sys/dev/isp/isp.c
300
if (val != 0x4)
sys/dev/isp/isp.c
303
switch (val) {
sys/dev/isp/isp.c
313
isp_prt(isp, ISP_LOGERR, "Unknown RISC Status Code 0x%x.", val);
sys/dev/isp/isp_pci.c
780
isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
sys/dev/isp/isp_pci.c
786
BXW4(isp, regoff, val);
sys/dev/isp/isp_pci.c
798
BXW2(isp, regoff, val);
sys/dev/isp/isp_pci.c
843
isp_pci_wr_reg_2600(ispsoftc_t *isp, int regoff, uint32_t val)
sys/dev/isp/isp_pci.c
872
isp_pci_wr_reg_2400(isp, regoff, val);
sys/dev/isp/isp_pci.c
875
B2W4(isp, off, val);
sys/dev/isp/ispvar.h
107
#define ISP_SETBITS(isp, reg, val) \
sys/dev/isp/ispvar.h
108
(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
sys/dev/isp/ispvar.h
110
#define ISP_CLRBITS(isp, reg, val) \
sys/dev/isp/ispvar.h
111
(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
sys/dev/isp/ispvar.h
577
#define ISP_SET_SENDMARKER(isp, chan, val) \
sys/dev/isp/ispvar.h
578
FCPARAM(isp, chan)->sendmarker = val \
sys/dev/isp/ispvar.h
93
#define ISP_WRITE(isp, reg, val) \
sys/dev/isp/ispvar.h
94
(*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
sys/dev/itwd/itwd.c
101
superio_write(dev, 0x73, val);
sys/dev/itwd/itwd.c
102
if (superio_read(dev, 0x73) != val)
sys/dev/itwd/itwd.c
103
superio_write(dev, 0x73, val);
sys/dev/itwd/itwd.c
110
uint8_t val;
sys/dev/itwd/itwd.c
112
val = superio_read(dev, 0x71);
sys/dev/itwd/itwd.c
114
device_printf(dev, "got interrupt, wdt status = %d\n", val & 1);
sys/dev/itwd/itwd.c
115
superio_write(dev, 0x71, val & ~((uint8_t)0x01));
sys/dev/itwd/itwd.c
55
uint8_t val;
sys/dev/itwd/itwd.c
88
val = timeout;
sys/dev/itwd/itwd.c
92
val = 0;
sys/dev/itwd/itwd.c
95
val = 0;
sys/dev/itwd/itwd.c
99
device_printf(dev, "setting timeout to %d\n", val);
sys/dev/iwi/if_iwi.c
1121
uint16_t val;
sys/dev/iwi/if_iwi.c
1151
val = 0;
sys/dev/iwi/if_iwi.c
1156
val |= ((tmp & IWI_EEPROM_Q) >> IWI_EEPROM_SHIFT_Q) << n;
sys/dev/iwi/if_iwi.c
1166
return val;
sys/dev/iwi/if_iwi.c
281
uint16_t val;
sys/dev/iwi/if_iwi.c
3320
int val = !iwi_getrfkill(sc);
sys/dev/iwi/if_iwi.c
3322
return SYSCTL_OUT(req, &val, sizeof val);
sys/dev/iwi/if_iwi.c
377
val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 0);
sys/dev/iwi/if_iwi.c
378
ic->ic_macaddr[0] = val & 0xff;
sys/dev/iwi/if_iwi.c
379
ic->ic_macaddr[1] = val >> 8;
sys/dev/iwi/if_iwi.c
380
val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 1);
sys/dev/iwi/if_iwi.c
381
ic->ic_macaddr[2] = val & 0xff;
sys/dev/iwi/if_iwi.c
382
ic->ic_macaddr[3] = val >> 8;
sys/dev/iwi/if_iwi.c
383
val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 2);
sys/dev/iwi/if_iwi.c
384
ic->ic_macaddr[4] = val & 0xff;
sys/dev/iwi/if_iwi.c
385
ic->ic_macaddr[5] = val >> 8;
sys/dev/iwi/if_iwireg.h
585
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/iwi/if_iwireg.h
586
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/iwi/if_iwireg.h
588
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/iwi/if_iwireg.h
589
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/iwi/if_iwireg.h
591
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/iwi/if_iwireg.h
592
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/iwi/if_iwireg.h
601
#define MEM_WRITE_1(sc, addr, val) do { \
sys/dev/iwi/if_iwireg.h
603
CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sys/dev/iwi/if_iwireg.h
606
#define MEM_WRITE_2(sc, addr, val) do { \
sys/dev/iwi/if_iwireg.h
608
CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sys/dev/iwi/if_iwireg.h
611
#define MEM_WRITE_4(sc, addr, val) do { \
sys/dev/iwi/if_iwireg.h
613
CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sys/dev/iwi/if_iwireg.h
624
#define IWI_EEPROM_CTL(sc, val) do { \
sys/dev/iwi/if_iwireg.h
625
MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \
sys/dev/iwm/if_iwm.c
2483
uint32_t val, last_read_idx = 0;
sys/dev/iwm/if_iwm.c
2516
val = IWM_READ(sc, IWM_FH_UCODE_LOAD_STATUS);
sys/dev/iwm/if_iwm.c
2517
val = val | (sec_num << shift_param);
sys/dev/iwm/if_iwm.c
2518
IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, val);
sys/dev/iwm/if_iwm.c
3139
uint32_t val;
sys/dev/iwm/if_iwm.c
3141
val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]);
sys/dev/iwm/if_iwm.c
3142
energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >>
sys/dev/iwm/if_iwm.c
3145
energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >>
sys/dev/iwm/if_iwm.c
3148
energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >>
sys/dev/iwm/if_iwm_pcie_trans.c
178
iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val)
sys/dev/iwm/if_iwm_pcie_trans.c
183
IWM_WRITE(sc, IWM_HBUS_TARG_PRPH_WDAT, val);
sys/dev/iwm/if_iwm_pcie_trans.c
187
iwm_write_prph64(struct iwm_softc *sc, uint64_t addr, uint64_t val)
sys/dev/iwm/if_iwm_pcie_trans.c
189
iwm_write_prph(sc, (uint32_t)addr, val & 0xffffffff);
sys/dev/iwm/if_iwm_pcie_trans.c
190
iwm_write_prph(sc, (uint32_t)addr + 4, val >> 32);
sys/dev/iwm/if_iwm_pcie_trans.c
238
uint32_t val = vals ? vals[offs] : 0;
sys/dev/iwm/if_iwm_pcie_trans.c
239
IWM_WRITE(sc, IWM_HBUS_TARG_MEM_WDAT, val);
sys/dev/iwm/if_iwm_pcie_trans.c
251
iwm_write_mem32(struct iwm_softc *sc, uint32_t addr, uint32_t val)
sys/dev/iwm/if_iwm_pcie_trans.c
253
return iwm_write_mem(sc, addr, &val, 1);
sys/dev/iwm/if_iwm_pcie_trans.c
315
uint32_t val;
sys/dev/iwm/if_iwm_pcie_trans.c
319
val = iwm_read_prph(sc, reg) & mask;
sys/dev/iwm/if_iwm_pcie_trans.c
320
val |= bits;
sys/dev/iwm/if_iwm_pcie_trans.c
321
iwm_write_prph(sc, reg, val);
sys/dev/iwm/if_iwm_pcie_trans.h
107
extern void iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val);
sys/dev/iwm/if_iwm_pcie_trans.h
109
uint64_t val);
sys/dev/iwm/if_iwm_pcie_trans.h
115
extern int iwm_write_mem32(struct iwm_softc *sc, uint32_t addr, uint32_t val);
sys/dev/iwm/if_iwmreg.h
6961
#define IWM_WRITE(sc, reg, val) \
sys/dev/iwm/if_iwmreg.h
6962
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/iwm/if_iwmreg.h
6964
#define IWM_WRITE_1(sc, reg, val) \
sys/dev/iwm/if_iwmreg.h
6965
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/iwn/if_iwn.c
1584
iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
sys/dev/iwn/if_iwn.c
1588
iwn_mem_write(sc, addr, val);
sys/dev/iwn/if_iwn.c
1685
uint32_t val, tmp;
sys/dev/iwn/if_iwn.c
1694
val = IWN_READ(sc, IWN_EEPROM);
sys/dev/iwn/if_iwn.c
1695
if (val & IWN_EEPROM_READ_VALID)
sys/dev/iwn/if_iwn.c
1718
*out++ = val >> 16;
sys/dev/iwn/if_iwn.c
1720
*out++ = val >> 24;
sys/dev/iwn/if_iwn.c
2189
uint16_t val;
sys/dev/iwn/if_iwn.c
2227
iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
sys/dev/iwn/if_iwn.c
2228
DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
sys/dev/iwn/if_iwn.c
2230
if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
sys/dev/iwn/if_iwn.c
2233
iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
sys/dev/iwn/if_iwn.c
2234
sc->rfcfg = le16toh(val);
sys/dev/iwn/if_iwn.c
2261
uint16_t val;
sys/dev/iwn/if_iwn.c
2276
iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
sys/dev/iwn/if_iwn.c
2277
sc->maxpwr2GHz = val & 0xff;
sys/dev/iwn/if_iwn.c
2278
sc->maxpwr5GHz = val >> 8;
sys/dev/iwn/if_iwn.c
2292
iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
sys/dev/iwn/if_iwn.c
2293
sc->eeprom_voltage = (int16_t)le16toh(val);
sys/dev/iwn/if_iwn.c
2349
uint16_t val;
sys/dev/iwn/if_iwn.c
2355
iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
sys/dev/iwn/if_iwn.c
2356
base = le16toh(val);
sys/dev/iwn/if_iwn.c
2370
iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
sys/dev/iwn/if_iwn.c
2371
base = le16toh(val);
sys/dev/iwn/if_iwn.c
2380
iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
sys/dev/iwn/if_iwn.c
2381
sc->eeprom_temp_high=le16toh(val);
sys/dev/iwn/if_iwn.c
2382
iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
sys/dev/iwn/if_iwn.c
2383
sc->eeprom_temp = le16toh(val);
sys/dev/iwn/if_iwn.c
2388
iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
sys/dev/iwn/if_iwn.c
2389
sc->eeprom_temp = le16toh(val);
sys/dev/iwn/if_iwn.c
2390
iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
sys/dev/iwn/if_iwn.c
2391
volt = le16toh(val);
sys/dev/iwn/if_iwn.c
2631
uint16_t val, base;
sys/dev/iwn/if_iwn.c
2638
iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
sys/dev/iwn/if_iwn.c
2639
base = le16toh(val);
sys/dev/iwn/if_iwn.c
5634
uint64_t val, mod;
sys/dev/iwn/if_iwn.c
5644
val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
sys/dev/iwn/if_iwn.c
5645
mod = le64toh(cmd.tstamp) % val;
sys/dev/iwn/if_iwn.c
5646
cmd.binitval = htole32((uint32_t)(val - mod));
sys/dev/iwn/if_iwn.c
5649
ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
sys/dev/iwn/if_iwn.c
6026
uint32_t val;
sys/dev/iwn/if_iwn.c
6041
val = MAX(calib->rssi[0], calib->rssi[1]);
sys/dev/iwn/if_iwn.c
6042
val = MAX(calib->rssi[2], val);
sys/dev/iwn/if_iwn.c
6047
if (val - calib->rssi[i] > 15 * 20)
sys/dev/iwn/if_iwn.c
6187
#define inc(val, inc, max) \
sys/dev/iwn/if_iwn.c
6188
if ((val) < (max)) { \
sys/dev/iwn/if_iwn.c
6189
if ((val) < (max) - (inc)) \
sys/dev/iwn/if_iwn.c
6190
(val) += (inc); \
sys/dev/iwn/if_iwn.c
6192
(val) = (max); \
sys/dev/iwn/if_iwn.c
6195
#define dec(val, dec, min) \
sys/dev/iwn/if_iwn.c
6196
if ((val) > (min)) { \
sys/dev/iwn/if_iwn.c
6197
if ((val) > (min) + (dec)) \
sys/dev/iwn/if_iwn.c
6198
(val) -= (dec); \
sys/dev/iwn/if_iwn.c
6200
(val) = (min); \
sys/dev/iwn/if_iwn.c
6206
uint32_t val, rxena, fa;
sys/dev/iwn/if_iwn.c
6246
val = MAX(noise[0], noise[1]);
sys/dev/iwn/if_iwn.c
6247
val = MAX(noise[2], val);
sys/dev/iwn/if_iwn.c
6249
calib->noise_samples[calib->cur_noise_sample] = val;
sys/dev/iwn/if_iwn.c
6260
val = MIN(energy[0], energy[1]);
sys/dev/iwn/if_iwn.c
6261
val = MIN(energy[2], val);
sys/dev/iwn/if_iwn.c
6263
calib->energy_samples[calib->cur_energy_sample] = val;
sys/dev/iwn/if_iwnreg.h
2337
#define IWN_WRITE(sc, reg, val) \
sys/dev/iwn/if_iwnreg.h
2338
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/iwn/if_iwnreg.h
2340
#define IWN_WRITE_1(sc, reg, val) \
sys/dev/iwn/if_iwnreg.h
2341
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/iwx/if_iwx.c
1789
iwx_write_prph_unlocked(struct iwx_softc *sc, uint32_t addr, uint32_t val)
sys/dev/iwx/if_iwx.c
1794
IWX_WRITE(sc, IWX_HBUS_TARG_PRPH_WDAT, val);
sys/dev/iwx/if_iwx.c
1798
iwx_write_prph(struct iwx_softc *sc, uint32_t addr, uint32_t val)
sys/dev/iwx/if_iwx.c
1801
iwx_write_prph_unlocked(sc, addr, val);
sys/dev/iwx/if_iwx.c
1811
iwx_write_umac_prph(struct iwx_softc *sc, uint32_t addr, uint32_t val)
sys/dev/iwx/if_iwx.c
1813
iwx_write_prph(sc, addr + sc->sc_umac_prph_offset, val);
sys/dev/iwx/if_iwx.c
1897
uint32_t val;
sys/dev/iwx/if_iwx.c
1900
val = iwx_read_prph(sc, reg) & mask;
sys/dev/iwx/if_iwx.c
1901
val |= bits;
sys/dev/iwx/if_iwx.c
1902
iwx_write_prph(sc, reg, val);
sys/dev/iwx/if_iwx.c
2863
uint32_t mask, val, reg_val = 0;
sys/dev/iwx/if_iwx.c
2890
val = IWX_READ(sc, IWX_CSR_HW_IF_CONFIG_REG);
sys/dev/iwx/if_iwx.c
2891
val &= ~mask;
sys/dev/iwx/if_iwx.c
2892
val |= reg_val;
sys/dev/iwx/if_iwx.c
2893
IWX_WRITE(sc, IWX_CSR_HW_IF_CONFIG_REG, val);
sys/dev/iwx/if_iwx.c
956
uint32_t addr, val;
sys/dev/iwx/if_iwx.c
960
val = le32toh(dest_v1->reg_ops[i].val);
sys/dev/iwx/if_iwx.c
963
DPRINTF(("%s: op=%u addr=%u val=%u\n", __func__, op, addr, val));
sys/dev/iwx/if_iwx.c
966
IWX_WRITE(sc, addr, val);
sys/dev/iwx/if_iwx.c
969
IWX_SETBITS(sc, addr, (1 << val));
sys/dev/iwx/if_iwx.c
972
IWX_CLRBITS(sc, addr, (1 << val));
sys/dev/iwx/if_iwx.c
975
iwx_write_prph(sc, addr, val);
sys/dev/iwx/if_iwx.c
978
err = iwx_set_bits_prph(sc, addr, (1 << val));
sys/dev/iwx/if_iwx.c
983
err = iwx_clear_bits_prph(sc, addr, (1 << val));
sys/dev/iwx/if_iwx.c
988
if (iwx_read_prph(sc, addr) & (1 << val))
sys/dev/iwx/if_iwxreg.h
2461
uint32_t val;
sys/dev/iwx/if_iwxreg.h
7908
#define IWX_WRITE(sc, reg, val) \
sys/dev/iwx/if_iwxreg.h
7909
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/iwx/if_iwxreg.h
7911
#define IWX_WRITE_1(sc, reg, val) \
sys/dev/iwx/if_iwxreg.h
7912
bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/ixgbe/if_ix.c
2204
unsigned int val;
sys/dev/ixgbe/if_ix.c
2213
val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me));
sys/dev/ixgbe/if_ix.c
2214
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ixgbe/if_ix.c
2231
unsigned int val;
sys/dev/ixgbe/if_ix.c
2239
val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me));
sys/dev/ixgbe/if_ix.c
2240
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ixgbe/if_ix.c
2257
unsigned int val;
sys/dev/ixgbe/if_ix.c
2265
val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me));
sys/dev/ixgbe/if_ix.c
2266
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ixgbe/if_ix.c
2283
unsigned int val;
sys/dev/ixgbe/if_ix.c
2291
val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me));
sys/dev/ixgbe/if_ix.c
2292
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ixgbe/if_ix.c
5648
u32 reg, val, shift;
sys/dev/ixgbe/if_ix.c
5669
val = IXGBE_READ_REG(&sc->hw, reg);
sys/dev/ixgbe/if_ix.c
5670
mask = (val >> shift) & 0xfff;
sys/dev/ixgbe/if_ix.c
5676
val = (val & ~(0xfff << shift)) | (mask << shift);
sys/dev/ixgbe/if_ix.c
5677
IXGBE_WRITE_REG(&sc->hw, reg, val);
sys/dev/ixgbe/ixgbe_82598.c
1079
s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/ixgbe/ixgbe_82598.c
1090
*val = (u8)atlas_ctl;
sys/dev/ixgbe/ixgbe_82598.c
1103
s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/ixgbe/ixgbe_82598.c
1109
atlas_ctl = (reg << 8) | val;
sys/dev/ixgbe/ixgbe_82598.h
45
s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/ixgbe/ixgbe_82598.h
46
s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/ixgbe/ixgbe_82599.c
2103
s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/ixgbe/ixgbe_82599.c
2114
*val = (u8)core_ctl;
sys/dev/ixgbe/ixgbe_82599.c
2127
s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/ixgbe/ixgbe_82599.c
2133
core_ctl = (reg << 8) | val;
sys/dev/ixgbe/ixgbe_82599.h
56
s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/ixgbe/ixgbe_82599.h
57
s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/ixgbe/ixgbe_api.c
1504
s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/ixgbe/ixgbe_api.c
1507
val), IXGBE_NOT_IMPLEMENTED);
sys/dev/ixgbe/ixgbe_api.c
1518
s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/ixgbe/ixgbe_api.c
1521
val), IXGBE_NOT_IMPLEMENTED);
sys/dev/ixgbe/ixgbe_api.c
1579
s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
sys/dev/ixgbe/ixgbe_api.c
1582
reg, val), IXGBE_NOT_IMPLEMENTED);
sys/dev/ixgbe/ixgbe_api.c
1594
s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
sys/dev/ixgbe/ixgbe_api.c
1597
(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
sys/dev/ixgbe/ixgbe_api.c
1644
s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
sys/dev/ixgbe/ixgbe_api.c
1647
(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
sys/dev/ixgbe/ixgbe_api.c
1659
s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
sys/dev/ixgbe/ixgbe_api.c
1662
(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
sys/dev/ixgbe/ixgbe_api.h
145
s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/ixgbe/ixgbe_api.h
146
s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/ixgbe/ixgbe_api.h
184
s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
sys/dev/ixgbe/ixgbe_api.h
185
s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
sys/dev/ixgbe/ixgbe_api.h
191
s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
sys/dev/ixgbe/ixgbe_api.h
192
s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
sys/dev/ixgbe/ixgbe_dcb.c
71
int val = min(bw[i] * multiplier, IXGBE_DCB_MAX_CREDIT_REFILL);
sys/dev/ixgbe/ixgbe_dcb.c
73
if (val < min_credit)
sys/dev/ixgbe/ixgbe_dcb.c
74
val = min_credit;
sys/dev/ixgbe/ixgbe_dcb.c
75
refill[i] = (u16)val;
sys/dev/ixgbe/ixgbe_osdep.c
62
ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)
sys/dev/ixgbe/ixgbe_osdep.c
66
reg, val);
sys/dev/ixgbe/ixgbe_osdep.c
78
ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)
sys/dev/ixgbe/ixgbe_osdep.c
82
reg + (offset << 2), val);
sys/dev/ixgbe/ixgbe_osdep.h
223
#define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val)
sys/dev/ixgbe/ixgbe_osdep.h
230
#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \
sys/dev/ixgbe/ixgbe_osdep.h
231
ixgbe_write_reg_array(a, reg, offset, val)
sys/dev/ixgbe/ixgbe_phy.c
110
u16 *val, bool lock)
sys/dev/ixgbe/ixgbe_phy.c
159
*val = (high_bits << 8) | low_bits;
sys/dev/ixgbe/ixgbe_phy.c
187
u16 val, bool lock)
sys/dev/ixgbe/ixgbe_phy.c
197
csum = ixgbe_ones_comp_byte_add(csum, val >> 8);
sys/dev/ixgbe/ixgbe_phy.c
198
csum = ixgbe_ones_comp_byte_add(csum, val & 0xFF);
sys/dev/ixgbe/ixgbe_phy.c
214
if (ixgbe_out_i2c_byte_ack(hw, val >> 8))
sys/dev/ixgbe/ixgbe_phy.c
217
if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF))
sys/dev/ixgbe/ixgbe_phy.h
217
u16 *val, bool lock);
sys/dev/ixgbe/ixgbe_phy.h
219
u16 val, bool lock);
sys/dev/ixgbe/ixgbe_type.h
4180
s32 (*read_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 *val);
sys/dev/ixgbe/ixgbe_type.h
4182
u16 *val);
sys/dev/ixgbe/ixgbe_type.h
4183
s32 (*write_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 val);
sys/dev/ixgbe/ixgbe_type.h
4185
u16 val);
sys/dev/ixgbe/ixgbe_x550.c
544
u16 reg, u16 *val)
sys/dev/ixgbe/ixgbe_x550.c
546
return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, true);
sys/dev/ixgbe/ixgbe_x550.c
560
u16 reg, u16 *val)
sys/dev/ixgbe/ixgbe_x550.c
562
return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, false);
sys/dev/ixgbe/ixgbe_x550.c
575
u8 addr, u16 reg, u16 val)
sys/dev/ixgbe/ixgbe_x550.c
577
return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, true);
sys/dev/ixgbe/ixgbe_x550.c
591
u8 addr, u16 reg, u16 val)
sys/dev/ixgbe/ixgbe_x550.c
593
return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false);
sys/dev/ixl/i40e_adminq.c
853
u32 val = 0;
sys/dev/ixl/i40e_adminq.c
866
val = rd32(hw, hw->aq.asq.head);
sys/dev/ixl/i40e_adminq.c
867
if (val >= hw->aq.num_asq_entries) {
sys/dev/ixl/i40e_adminq.c
869
"AQTX: head overrun at %d\n", val);
sys/dev/ixl/i40e_common.c
1422
u32 val;
sys/dev/ixl/i40e_common.c
1426
val = rd32(hw, I40E_GLPCI_CNF2);
sys/dev/ixl/i40e_common.c
1427
num_pf_int = (val & I40E_GLPCI_CNF2_MSI_X_PF_N_MASK) >>
sys/dev/ixl/i40e_common.c
1429
num_vf_int = (val & I40E_GLPCI_CNF2_MSI_X_VF_N_MASK) >>
sys/dev/ixl/i40e_common.c
1432
val = rd32(hw, I40E_PFLAN_QALLOC);
sys/dev/ixl/i40e_common.c
1433
base_queue = (val & I40E_PFLAN_QALLOC_FIRSTQ_MASK) >>
sys/dev/ixl/i40e_common.c
1435
j = (val & I40E_PFLAN_QALLOC_LASTQ_MASK) >>
sys/dev/ixl/i40e_common.c
1437
if (val & I40E_PFLAN_QALLOC_VALID_MASK)
sys/dev/ixl/i40e_common.c
1442
val = rd32(hw, I40E_PF_VT_PFALLOC);
sys/dev/ixl/i40e_common.c
1443
i = (val & I40E_PF_VT_PFALLOC_FIRSTVF_MASK) >>
sys/dev/ixl/i40e_common.c
1445
j = (val & I40E_PF_VT_PFALLOC_LASTVF_MASK) >>
sys/dev/ixl/i40e_common.c
1447
if (val & I40E_PF_VT_PFALLOC_VALID_MASK)
sys/dev/ixl/i40e_common.c
1454
val = 0x3 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
sys/dev/ixl/i40e_common.c
1456
wr32(hw, I40E_PFINT_DYN_CTLN(i), val);
sys/dev/ixl/i40e_common.c
1459
val = eol << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
sys/dev/ixl/i40e_common.c
1460
wr32(hw, I40E_PFINT_LNKLST0, val);
sys/dev/ixl/i40e_common.c
1462
wr32(hw, I40E_PFINT_LNKLSTN(i), val);
sys/dev/ixl/i40e_common.c
1463
val = eol << I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT;
sys/dev/ixl/i40e_common.c
1465
wr32(hw, I40E_VPINT_LNKLST0(i), val);
sys/dev/ixl/i40e_common.c
1467
wr32(hw, I40E_VPINT_LNKLSTN(i), val);
sys/dev/ixl/i40e_common.c
1479
val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
sys/dev/ixl/i40e_common.c
1480
val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK;
sys/dev/ixl/i40e_common.c
1481
val |= (abs_queue_idx << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT);
sys/dev/ixl/i40e_common.c
1482
val |= I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK;
sys/dev/ixl/i40e_common.c
1484
wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val);
sys/dev/ixl/i40e_common.c
5431
u32 val;
sys/dev/ixl/i40e_common.c
5495
val = rd32(hw, I40E_GLHMC_FCOEFMAX);
sys/dev/ixl/i40e_common.c
5496
fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
sys/dev/ixl/i40e_common.c
5518
u32 val;
sys/dev/ixl/i40e_common.c
5529
val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
sys/dev/ixl/i40e_common.c
5532
val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
sys/dev/ixl/i40e_common.c
5533
val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
sys/dev/ixl/i40e_common.c
5536
val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
sys/dev/ixl/i40e_common.c
5537
val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
sys/dev/ixl/i40e_common.c
5541
val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
sys/dev/ixl/i40e_common.c
5542
val |= ((u32)settings->fcoe_filt_num <<
sys/dev/ixl/i40e_common.c
5546
val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
sys/dev/ixl/i40e_common.c
5547
val |= ((u32)settings->fcoe_cntx_num <<
sys/dev/ixl/i40e_common.c
5552
val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
sys/dev/ixl/i40e_common.c
5555
val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
sys/dev/ixl/i40e_common.c
5560
val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
sys/dev/ixl/i40e_common.c
5562
val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
sys/dev/ixl/i40e_common.c
5564
val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
sys/dev/ixl/i40e_common.c
5566
i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, val);
sys/dev/ixl/i40e_common.c
6882
u16 *val)
sys/dev/ixl/i40e_common.c
6898
*val = (u16)reg_val_aq;
sys/dev/ixl/i40e_common.c
6911
*val = reg_val;
sys/dev/ixl/i40e_common.c
6982
u32 val;
sys/dev/ixl/i40e_common.c
7002
&val, NULL);
sys/dev/ixl/i40e_common.c
7007
stat->rx_lpi_status = !!(val & I40E_BCM_PHY_PCS_STATUS1_RX_LPI);
sys/dev/ixl/i40e_common.c
7008
stat->tx_lpi_status = !!(val & I40E_BCM_PHY_PCS_STATUS1_TX_LPI);
sys/dev/ixl/i40e_common.c
7013
val = rd32(hw, I40E_PRTPM_EEE_STAT);
sys/dev/ixl/i40e_common.c
7014
stat->rx_lpi_status = (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
sys/dev/ixl/i40e_common.c
7016
stat->tx_lpi_status = (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
sys/dev/ixl/i40e_common.c
7210
u32 val = 0;
sys/dev/ixl/i40e_common.c
7217
status = i40e_aq_rx_ctl_read_register(hw, reg_addr, &val, NULL);
sys/dev/ixl/i40e_common.c
7227
val = rd32(hw, reg_addr);
sys/dev/ixl/i40e_common.c
7229
return val;
sys/dev/ixl/i40e_nvm.c
869
static INLINE u8 i40e_nvmupd_get_module(u32 val)
sys/dev/ixl/i40e_nvm.c
871
return (u8)(val & I40E_NVM_MOD_PNT_MASK);
sys/dev/ixl/i40e_nvm.c
873
static INLINE u8 i40e_nvmupd_get_transaction(u32 val)
sys/dev/ixl/i40e_nvm.c
875
return (u8)((val & I40E_NVM_TRANS_MASK) >> I40E_NVM_TRANS_SHIFT);
sys/dev/ixl/i40e_nvm.c
878
static INLINE u8 i40e_nvmupd_get_preservation_flags(u32 val)
sys/dev/ixl/i40e_nvm.c
880
return (u8)((val & I40E_NVM_PRESERVATION_FLAGS_MASK) >>
sys/dev/ixl/i40e_prototype.h
99
u16 *val);
sys/dev/ixl/ixl_pf_iflib.c
773
u32 val;
sys/dev/ixl/ixl_pf_iflib.c
778
val = rd32(tx_que->vsi->hw, tx_que->txr.tail);
sys/dev/ixl/ixl_pf_iflib.c
779
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ixl/ixl_pf_iflib.c
795
u32 val;
sys/dev/ixl/ixl_pf_iflib.c
800
val = rd32(rx_que->vsi->hw, rx_que->rxr.tail);
sys/dev/ixl/ixl_pf_iflib.c
801
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/ixl/ixl_pf_iov.c
222
uint32_t val)
sys/dev/ixl/ixl_pf_iov.c
237
qtable |= val << shift;
sys/dev/ixl/ixl_pf_iov.c
37
static void ixl_vf_map_vsi_queue(struct i40e_hw *hw, struct ixl_vf *vf, int qnum, uint32_t val);
sys/dev/ixl/ixl_pf_main.c
3460
ixl_phy_type_string_ls(u8 val)
sys/dev/ixl/ixl_pf_main.c
3462
if (val >= 0x1F)
sys/dev/ixl/ixl_pf_main.c
3463
return ixl_phy_type_string(val - 0x1F, true);
sys/dev/ixl/ixl_pf_main.c
3465
return ixl_phy_type_string(val, false);
sys/dev/jedec_dimm/jedec_dimm.c
1053
jedec_dimm_readw_be(struct jedec_dimm_softc *sc, uint8_t reg, uint16_t *val)
sys/dev/jedec_dimm/jedec_dimm.c
1057
rc = smbus_readw(sc->smbus, sc->tsod_addr, reg, val);
sys/dev/jedec_dimm/jedec_dimm.c
1061
*val = be16toh(*val);
sys/dev/jedec_dimm/jedec_dimm.c
1102
uint16_t val;
sys/dev/jedec_dimm/jedec_dimm.c
1110
rc = jedec_dimm_readw_be(sc, TSOD_REG_TEMPERATURE, &val);
sys/dev/jedec_dimm/jedec_dimm.c
1116
temp = val & 0xfff;
sys/dev/jedec_dimm/jedec_dimm.c
1117
if ((val & 0x1000) != 0)
sys/dev/jedec_dimm/jedec_dimm.c
166
uint16_t *val);
sys/dev/jme/if_jme.c
215
uint32_t val;
sys/dev/jme/if_jme.c
228
if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0)
sys/dev/jme/if_jme.c
237
return ((val & SMI_DATA_MASK) >> SMI_DATA_SHIFT);
sys/dev/jme/if_jme.c
244
jme_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/jme/if_jme.c
256
((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
sys/dev/jme/if_jme.c
260
if (((val = CSR_READ_4(sc, JME_SMI)) & SMI_OP_EXECUTE) == 0)
sys/dev/jme/if_jme.c
349
jme_eeprom_read_byte(struct jme_softc *sc, uint8_t addr, uint8_t *val)
sys/dev/jme/if_jme.c
354
*val = 0;
sys/dev/jme/if_jme.c
382
*val = (reg & SMBINTF_RD_DATA_MASK) >> SMBINTF_RD_DATA_SHIFT;
sys/dev/jme/if_jme.c
391
uint8_t fup, reg, val;
sys/dev/jme/if_jme.c
413
&val) != 0)
sys/dev/jme/if_jme.c
415
eaddr[reg - JME_PAR0] = val;
sys/dev/jme/if_jme.c
516
uint32_t val;
sys/dev/jme/if_jme.c
531
val = JME_EFUSE_EEPROM_FUNC0 <<
sys/dev/jme/if_jme.c
533
val |= JME_EFUSE_EEPROM_PAGE_BAR1 <<
sys/dev/jme/if_jme.c
535
val |= (JME_PAR0 + i) <<
sys/dev/jme/if_jme.c
537
val |= eaddr[i] << JME_EFUSE_EEPROM_DATA_SHIFT;
sys/dev/jme/if_jme.c
539
val | JME_EFUSE_EEPROM_WRITE, 4);
sys/dev/jme/if_jmevar.h
229
#define CSR_WRITE_4(_sc, reg, val) \
sys/dev/jme/if_jmevar.h
230
bus_write_4((_sc)->jme_res[0], (reg), (val))
sys/dev/lge/if_lge.c
215
u_int32_t val;
sys/dev/lge/if_lge.c
229
val = CSR_READ_4(sc, LGE_EEDATA);
sys/dev/lge/if_lge.c
232
*dest = (val >> 16) & 0xFFFF;
sys/dev/lge/if_lge.c
234
*dest = val & 0xFFFF;
sys/dev/lge/if_lgereg.h
532
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/lge/if_lgereg.h
533
bus_space_write_4(sc->lge_btag, sc->lge_bhandle, reg, val)
sys/dev/lge/if_lgereg.h
538
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/lge/if_lgereg.h
539
bus_space_write_2(sc->lge_btag, sc->lge_bhandle, reg, val)
sys/dev/lge/if_lgereg.h
544
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/lge/if_lgereg.h
545
bus_space_write_1(sc->lge_btag, sc->lge_bhandle, reg, val)
sys/dev/liquidio/base/cn23xx_pf_device.c
1002
uint64_t val;
sys/dev/liquidio/base/cn23xx_pf_device.c
1004
val = lio_read_csr64(oct, LIO_CN23XX_SLI_SCRATCH2);
sys/dev/liquidio/base/cn23xx_pf_device.c
1005
return ((val >> SCR2_BIT_FW_LOADED) & 1ULL);
sys/dev/liquidio/base/lio_device.c
935
lio_pci_writeq(struct octeon_device *oct, uint64_t val, uint64_t addr)
sys/dev/liquidio/base/lio_device.c
943
lio_write_csr32(oct, oct->reg_list.pci_win_wr_data_hi, val >> 32);
sys/dev/liquidio/base/lio_device.c
948
val & 0xffffffff);
sys/dev/liquidio/base/lio_device.h
677
void lio_pci_writeq(struct octeon_device *oct, uint64_t val, uint64_t addr);
sys/dev/liquidio/base/lio_device.h
832
lio_write_csr8(struct octeon_device *oct, uint32_t reg, uint8_t val)
sys/dev/liquidio/base/lio_device.h
836
oct->mem_bus_space[0].handle, reg, val);
sys/dev/liquidio/base/lio_device.h
848
lio_write_csr16(struct octeon_device *oct, uint32_t reg, uint16_t val)
sys/dev/liquidio/base/lio_device.h
852
oct->mem_bus_space[0].handle, reg, val);
sys/dev/liquidio/base/lio_device.h
864
lio_write_csr32(struct octeon_device *oct, uint32_t reg, uint32_t val)
sys/dev/liquidio/base/lio_device.h
868
oct->mem_bus_space[0].handle, reg, val);
sys/dev/liquidio/base/lio_device.h
885
lio_write_csr64(struct octeon_device *oct, uint32_t reg, uint64_t val)
sys/dev/liquidio/base/lio_device.h
889
lio_write_csr32(oct, reg, (uint32_t)val);
sys/dev/liquidio/base/lio_device.h
890
lio_write_csr32(oct, reg + 4, val >> 32);
sys/dev/liquidio/base/lio_device.h
893
oct->mem_bus_space[0].handle, reg, val);
sys/dev/liquidio/base/lio_mem_ops.c
103
lio_write_bar1_mem32(oct, reg, (uint32_t)val);
sys/dev/liquidio/base/lio_mem_ops.c
104
lio_write_bar1_mem32(oct, reg + 4, val >> 32);
sys/dev/liquidio/base/lio_mem_ops.c
107
oct->mem_bus_space[1].handle, reg, val);
sys/dev/liquidio/base/lio_mem_ops.c
270
uint32_t val)
sys/dev/liquidio/base/lio_mem_ops.c
272
__be32 t = htobe32(val);
sys/dev/liquidio/base/lio_mem_ops.c
60
lio_write_bar1_mem8(struct octeon_device *oct, uint32_t reg, uint64_t val)
sys/dev/liquidio/base/lio_mem_ops.c
64
oct->mem_bus_space[1].handle, reg, val);
sys/dev/liquidio/base/lio_mem_ops.c
77
lio_write_bar1_mem32(struct octeon_device *oct, uint32_t reg, uint32_t val)
sys/dev/liquidio/base/lio_mem_ops.c
81
oct->mem_bus_space[1].handle, reg, val);
sys/dev/liquidio/base/lio_mem_ops.c
99
lio_write_bar1_mem64(struct octeon_device *oct, uint32_t reg, uint64_t val)
sys/dev/liquidio/base/lio_mem_ops.h
72
uint64_t core_addr, uint32_t val);
sys/dev/liquidio/lio_main.h
126
#define ROUNDUP4(val) (((val) + 3) & 0xfffffffc)
sys/dev/liquidio/lio_main.h
130
#define ROUNDUP8(val) (((val) + 7) & 0xfffffff8)
sys/dev/liquidio/lio_sysctl.c
1663
uint64_t val;
sys/dev/liquidio/lio_sysctl.c
1681
val = lio_read_csr64(oct, inst_cnt_reg);
sys/dev/liquidio/lio_sysctl.c
1686
val = (val & 0xFFFF000000000000ULL) |
sys/dev/liquidio/lio_sysctl.c
1689
lio_write_csr64(oct, inst_cnt_reg, val);
sys/dev/malo/if_malo.c
156
malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
sys/dev/malo/if_malo.c
159
__func__, (uintmax_t)off, val);
sys/dev/malo/if_malo.c
161
bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
sys/dev/malo/if_malohal.c
321
malo_hal_waitfor(struct malo_hal *mh, uint32_t val)
sys/dev/malo/if_malohal.c
327
if (malo_hal_read4(mh, MALO_REG_INT_CODE) == val)
sys/dev/malo/if_malohal.c
72
malo_hal_write4(struct malo_hal *mh, bus_size_t off, uint32_t val)
sys/dev/malo/if_malohal.c
74
bus_space_write_4(mh->mh_iot, mh->mh_ioh, off, val);
sys/dev/mana/hw_channel.c
153
uint32_t type, val;
sys/dev/mana/hw_channel.c
165
val = type_data.value;
sys/dev/mana/hw_channel.c
169
hwc->cq->gdma_cq->id = val;
sys/dev/mana/hw_channel.c
173
hwc->rxq->gdma_wq->id = val;
sys/dev/mana/hw_channel.c
177
hwc->txq->gdma_wq->id = val;
sys/dev/mana/hw_channel.c
181
hwc->hwc_init_q_depth_max = (uint16_t)val;
sys/dev/mana/hw_channel.c
185
hwc->hwc_init_max_req_msg_size = val;
sys/dev/mana/hw_channel.c
189
hwc->hwc_init_max_resp_msg_size = val;
sys/dev/mana/hw_channel.c
193
gd->gdma_context->max_num_cqs = val;
sys/dev/mana/hw_channel.c
197
hwc->gdma_dev->pdid = val;
sys/dev/mana/hw_channel.c
201
hwc->rxq->msg_buf->gpa_mkey = val;
sys/dev/mana/hw_channel.c
202
hwc->txq->msg_buf->gpa_mkey = val;
sys/dev/mana/mana_sysctl.c
113
uint32_t val;
sys/dev/mana/mana_sysctl.c
116
val = *((uint32_t *)((uint8_t *)rxq + offset));
sys/dev/mana/mana_sysctl.c
117
stat = val;
sys/dev/mana/mana_sysctl.c
359
uint8_t val;
sys/dev/mana/mana_sysctl.c
362
val = 0;
sys/dev/mana/mana_sysctl.c
363
err = sysctl_wire_old_buffer(req, sizeof(val));
sys/dev/mana/mana_sysctl.c
365
val = apc->bind_cleanup_thread_cpu;
sys/dev/mana/mana_sysctl.c
366
err = sysctl_handle_8(oidp, &val, 0, req);
sys/dev/mana/mana_sysctl.c
372
if (val != 0)
sys/dev/mana/mana_sysctl.c
93
uint16_t val;
sys/dev/mana/mana_sysctl.c
96
val = *((uint16_t *)((uint8_t *)rxq + offset));
sys/dev/mana/mana_sysctl.c
97
stat = val;
sys/dev/mdio/mdio.c
71
mdio_writereg(device_t dev, int phy, int reg, int val)
sys/dev/mdio/mdio.c
74
return (MDIO_WRITEREG(device_get_parent(dev), phy, reg, val));
sys/dev/mdio/mdio.c
86
int val)
sys/dev/mdio/mdio.c
89
return (MDIO_WRITEEXTREG(device_get_parent(dev), phy, devad, reg, val));
sys/dev/mfi/mfi_tbolt.c
663
union desc_value val;
sys/dev/mfi/mfi_tbolt.c
682
val.word = ((union mfi_mpi2_reply_descriptor *)desc)->words;
sys/dev/mfi/mfi_tbolt.c
685
while ((val.u.low != 0xFFFFFFFF) && (val.u.high != 0xFFFFFFFF)) {
sys/dev/mfi/mfi_tbolt.c
739
val.word = ((union mfi_mpi2_reply_descriptor*)desc)->words;
sys/dev/mfi/mfivar.h
594
#define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \
sys/dev/mfi/mfivar.h
595
sc->mfi_bhandle, (reg), (val))
sys/dev/mfi/mfivar.h
598
#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \
sys/dev/mfi/mfivar.h
599
sc->mfi_bhandle, (reg), (val))
sys/dev/mfi/mfivar.h
602
#define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \
sys/dev/mfi/mfivar.h
603
sc->mfi_bhandle, (reg), (val))
sys/dev/mgb/if_mgb.c
1514
int i, val;
sys/dev/mgb/if_mgb.c
1523
val = CSR_READ_REG(sc, reg);
sys/dev/mgb/if_mgb.c
1524
if ((val & set_bits) == set_bits && (val & clear_bits) == 0)
sys/dev/mgb/if_mgb.h
224
#define CSR_WRITE_BYTE(sc, reg, val) \
sys/dev/mgb/if_mgb.h
225
bus_write_1((sc)->regs, reg, val)
sys/dev/mgb/if_mgb.h
227
#define CSR_UPDATE_BYTE(sc, reg, val) \
sys/dev/mgb/if_mgb.h
228
CSR_WRITE_BYTE(sc, reg, CSR_READ_BYTE(sc, reg) | (val))
sys/dev/mgb/if_mgb.h
233
#define CSR_WRITE_REG(sc, reg, val) \
sys/dev/mgb/if_mgb.h
234
bus_write_4((sc)->regs, reg, val)
sys/dev/mgb/if_mgb.h
239
#define CSR_UPDATE_REG(sc, reg, val) \
sys/dev/mgb/if_mgb.h
240
CSR_WRITE_REG(sc, reg, CSR_READ_REG(sc, reg) | (val))
sys/dev/mge/if_mge.c
110
static uint32_t mge_tfut_ipg(uint32_t val, int ver);
sys/dev/mge/if_mge.c
111
static uint32_t mge_rx_ipg(uint32_t val, int ver);
sys/dev/mge/if_mge.c
370
mge_tfut_ipg(uint32_t val, int ver)
sys/dev/mge/if_mge.c
375
return ((val & 0x3fff) << 4);
sys/dev/mge/if_mge.c
378
return ((val & 0xffff) << 4);
sys/dev/mge/if_mge.c
383
mge_rx_ipg(uint32_t val, int ver)
sys/dev/mge/if_mge.c
388
return ((val & 0x3fff) << 8);
sys/dev/mge/if_mge.c
391
return (((val & 0x8000) << 10) | ((val & 0x7fff) << 7));
sys/dev/mge/if_mgevar.h
120
#define MGE_WRITE(sc,reg,val) bus_write_4((sc)->res[0], (reg), (val))
sys/dev/mge/if_mgevar.h
195
#define PORT_CONFIG_DFLT_RXQ(val) (((val) & 7) << 1) /* default RX queue */
sys/dev/mge/if_mgevar.h
196
#define PORT_CONFIG_ARO_RXQ(val) (((val) & 7) << 4) /* ARP RX queue */
sys/dev/mge/if_mgevar.h
214
#define MGE_SDMA_RX_BURST_SIZE(val) (((val) & 7) << 1)
sys/dev/mge/if_mgevar.h
215
#define MGE_SDMA_TX_BURST_SIZE(val) (((val) & 7) << 22)
sys/dev/mge/if_mgevar.h
231
#define PORT_SERIAL_FORCE_FC(val) (((val) & 3) << 5) /* pause enable & disable frames conf */
sys/dev/mge/if_mgevar.h
234
#define PORT_SERIAL_FORCE_BP(val) (((val) & 3) << 7) /* transmitting JAM configuration */
sys/dev/mge/if_mgevar.h
241
#define PORT_SERIAL_MRU(val) (((val) & 7) << 17)
sys/dev/mge/if_mgevar.h
277
#define MGE_COLLISION_LIMIT(val) (((val) & 0x3f) << 16)
sys/dev/mii/brgphy.c
1080
val = PHY_READ(sc, BRGPHY_SERDES_DIG_1000X_CTL1);
sys/dev/mii/brgphy.c
1081
val &= ~BRGPHY_SD_DIG_1000X_CTL1_AUTODET;
sys/dev/mii/brgphy.c
1082
val |= BRGPHY_SD_DIG_1000X_CTL1_FIBER;
sys/dev/mii/brgphy.c
1083
PHY_WRITE(sc, BRGPHY_SERDES_DIG_1000X_CTL1, val);
sys/dev/mii/brgphy.c
1089
val = PHY_READ(sc, BRGPHY_OVER_1G_UNFORMAT_PG1);
sys/dev/mii/brgphy.c
1091
val |= BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G;
sys/dev/mii/brgphy.c
1093
val &= ~BRGPHY_5708S_ANEG_NXT_PG_XMIT1_25G;
sys/dev/mii/brgphy.c
1094
PHY_WRITE(sc, BRGPHY_OVER_1G_UNFORMAT_PG1, val);
sys/dev/mii/brgphy.c
1100
val = PHY_READ(sc, BRGPHY_MRBE_MSG_PG5_NP);
sys/dev/mii/brgphy.c
1101
val |= BRGPHY_MRBE_MSG_PG5_NP_MBRE |
sys/dev/mii/brgphy.c
1103
PHY_WRITE(sc, BRGPHY_MRBE_MSG_PG5_NP, val);
sys/dev/mii/brgphy.c
332
int val;
sys/dev/mii/brgphy.c
367
val = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sys/dev/mii/brgphy.c
368
if (val & BMSR_LINK) {
sys/dev/mii/brgphy.c
494
int aux, bmcr, bmsr, val, xstat;
sys/dev/mii/brgphy.c
566
val = PHY_READ(sc, BRGPHY_SERDES_ANAR) & PHY_READ(sc, BRGPHY_SERDES_ANLPAR);
sys/dev/mii/brgphy.c
567
if (val & BRGPHY_SERDES_ANAR_FDX)
sys/dev/mii/brgphy.c
673
uint16_t val;
sys/dev/mii/brgphy.c
691
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
700
uint16_t val;
sys/dev/mii/brgphy.c
710
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
718
uint16_t val;
sys/dev/mii/brgphy.c
727
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
736
uint16_t val;
sys/dev/mii/brgphy.c
745
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
753
uint16_t val;
sys/dev/mii/brgphy.c
763
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
771
uint16_t val;
sys/dev/mii/brgphy.c
783
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
791
uint16_t val;
sys/dev/mii/brgphy.c
806
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
814
uint16_t val;
sys/dev/mii/brgphy.c
825
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
833
uint16_t val;
sys/dev/mii/brgphy.c
844
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sys/dev/mii/brgphy.c
850
uint32_t val;
sys/dev/mii/brgphy.c
853
val = PHY_READ(sc, BRGPHY_MII_DSP_RW_PORT);
sys/dev/mii/brgphy.c
854
val &= ~(1 << 8);
sys/dev/mii/brgphy.c
855
PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, val);
sys/dev/mii/brgphy.c
862
uint32_t val;
sys/dev/mii/brgphy.c
866
val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
sys/dev/mii/brgphy.c
867
PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4));
sys/dev/mii/brgphy.c
873
uint16_t val;
sys/dev/mii/brgphy.c
881
val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
sys/dev/mii/brgphy.c
882
val &= BRGPHY_AUXCTL_MISC_DATA_MASK;
sys/dev/mii/brgphy.c
884
val |= BRGPHY_AUXCTL_MISC_RGMII_SKEW_EN;
sys/dev/mii/brgphy.c
886
val &= ~BRGPHY_AUXCTL_MISC_RGMII_SKEW_EN;
sys/dev/mii/brgphy.c
888
BRGPHY_AUXCTL_SHADOW_MISC | val);
sys/dev/mii/brgphy.c
891
val = PHY_READ(sc, BRGPHY_MII_SHADOW_1C);
sys/dev/mii/brgphy.c
892
val &= BRGPHY_SHADOW_1C_DATA_MASK;
sys/dev/mii/brgphy.c
894
val |= BRGPHY_SHADOW_1C_GTXCLK_EN;
sys/dev/mii/brgphy.c
896
val &= ~BRGPHY_SHADOW_1C_GTXCLK_EN;
sys/dev/mii/brgphy.c
898
BRGPHY_SHADOW_1C_CLK_CTRL | val);
sys/dev/mii/brgphy.c
904
uint32_t val;
sys/dev/mii/brgphy.c
913
val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
sys/dev/mii/brgphy.c
915
val | BRGPHY_AUXCTL_LONG_PKT);
sys/dev/mii/brgphy.c
918
val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);
sys/dev/mii/brgphy.c
920
val | BRGPHY_PHY_EXTCTL_HIGH_LA);
sys/dev/mii/brgphy.c
923
val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
sys/dev/mii/brgphy.c
925
val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7));
sys/dev/mii/brgphy.c
927
val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);
sys/dev/mii/brgphy.c
929
val & ~BRGPHY_PHY_EXTCTL_HIGH_LA);
sys/dev/mii/brgphy.c
939
int i, val;
sys/dev/mii/ciphy.c
298
uint16_t val;
sys/dev/mii/ciphy.c
306
val = PHY_READ(sc, CIPHY_MII_ECTL1);
sys/dev/mii/ciphy.c
307
val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL);
sys/dev/mii/ciphy.c
308
val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII);
sys/dev/mii/ciphy.c
309
PHY_WRITE(sc, CIPHY_MII_ECTL1, val);
sys/dev/mii/ciphy.c
311
val = PHY_READ(sc, CIPHY_MII_AUXCSR);
sys/dev/mii/ciphy.c
312
val |= CIPHY_AUXCSR_MDPPS;
sys/dev/mii/ciphy.c
313
PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
sys/dev/mii/ciphy.c
314
val = PHY_READ(sc, CIPHY_MII_10BTCSR);
sys/dev/mii/ciphy.c
315
val |= CIPHY_10BTCSR_ECHO;
sys/dev/mii/ciphy.c
316
PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
sys/dev/mii/jmphy.c
226
uint16_t t2cr, val;
sys/dev/mii/jmphy.c
249
val = PHY_READ(sc, JMPHY_SPEC_DATA);
sys/dev/mii/jmphy.c
250
val &= ~0x0002;
sys/dev/mii/jmphy.c
251
val |= 0x0010 | 0x0001;
sys/dev/mii/jmphy.c
252
PHY_WRITE(sc, JMPHY_SPEC_DATA, val);
sys/dev/mii/jmphy.c
262
val = PHY_READ(sc, JMPHY_SPEC_DATA);
sys/dev/mii/jmphy.c
263
val &= ~(0x0001 | 0x0002 | 0x0010);
sys/dev/mii/jmphy.c
264
PHY_WRITE(sc, JMPHY_SPEC_DATA, val);
sys/dev/mii/mcommphy.c
326
pcell_t val;
sys/dev/mii/mcommphy.c
338
if (OF_getencprop(cfg->phynode, "rx-internal-delay-ps", &val,
sys/dev/mii/mcommphy.c
339
sizeof(val)) > 0) {
sys/dev/mii/mcommphy.c
340
sc->rx_delay_ps = val;
sys/dev/mii/mcommphy.c
342
if (OF_getencprop(cfg->phynode, "tx-internal-delay-ps", &val,
sys/dev/mii/mcommphy.c
343
sizeof(val)) > 0) {
sys/dev/mii/mcommphy.c
344
sc->tx_delay_ps = val;
sys/dev/mii/micphy.c
133
uint32_t val)
sys/dev/mii/micphy.c
143
PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, val);
sys/dev/mii/micphy.c
156
ksz9021_write(struct mii_softc *sc, uint32_t reg, uint32_t val)
sys/dev/mii/micphy.c
160
PHY_WRITE(sc, MII_KSZPHY_EXTREG_WRITE, val);
sys/dev/mii/micphy.c
171
int val;
sys/dev/mii/micphy.c
174
val = ksz9031_read(sc, dev, reg);
sys/dev/mii/micphy.c
176
val = ksz9021_read(sc, reg);
sys/dev/mii/micphy.c
180
val &= ~(f1mask << f1off);
sys/dev/mii/micphy.c
181
val |= (PS_TO_REG(dts_value[0]) & f1mask) << f1off;
sys/dev/mii/micphy.c
186
val &= ~(f2mask << f2off);
sys/dev/mii/micphy.c
187
val |= (PS_TO_REG(dts_value[0]) & f2mask) << f2off;
sys/dev/mii/micphy.c
192
val &= ~(f3mask << f3off);
sys/dev/mii/micphy.c
193
val |= (PS_TO_REG(dts_value[0]) & f3mask) << f3off;
sys/dev/mii/micphy.c
198
val &= ~(f4mask << f4off);
sys/dev/mii/micphy.c
199
val |= (PS_TO_REG(dts_value[0]) & f4mask) << f4off;
sys/dev/mii/micphy.c
203
ksz9031_write(sc, dev, reg, val);
sys/dev/mii/micphy.c
205
ksz9021_write(sc, reg, val);
sys/dev/mii/mii.c
243
u_int val;
sys/dev/mii/mii.c
245
if (resource_int_value(name, unit, "phyno", &val) != 0)
sys/dev/mii/mii.c
252
if (args->mii_phyno == val) {
sys/dev/mii/mii.c
274
ma->mii_phyno = val;
sys/dev/mii/mii.c
282
if (resource_int_value(name, unit, "id1", &val) == 0)
sys/dev/mii/mii.c
283
ma->mii_id1 = val;
sys/dev/mii/mii.c
284
if (resource_int_value(name, unit, "id2", &val) == 0)
sys/dev/mii/mii.c
285
ma->mii_id2 = val;
sys/dev/mii/mii.c
286
if (resource_int_value(name, unit, "capmask", &val) == 0)
sys/dev/mii/mii.c
287
ma->mii_capmask = val;
sys/dev/mii/mii_bitbang.c
119
int i, error, val;
sys/dev/mii/mii_bitbang.c
142
val = 0;
sys/dev/mii/mii_bitbang.c
144
val <<= 1;
sys/dev/mii/mii_bitbang.c
147
val |= 1;
sys/dev/mii/mii_bitbang.c
156
return (error != 0 ? 0 : val);
sys/dev/mii/mii_bitbang.c
166
int val)
sys/dev/mii/mii_bitbang.c
176
mii_bitbang_sendbits(dev, ops, val, 16);
sys/dev/mii/mii_bitbang.h
54
int phy, int reg, int val);
sys/dev/mii/mii_fdt.c
167
char val[32];
sys/dev/mii/mii_fdt.c
169
if (OF_getprop(macnode, "phy-mode", val, sizeof(val)) <= 0 &&
sys/dev/mii/mii_fdt.c
170
OF_getprop(macnode, "phy-connection-type", val, sizeof(val)) <= 0) {
sys/dev/mii/mii_fdt.c
173
return (mii_fdt_contype_from_name(val));
sys/dev/mii/mii_fdt.c
189
pcell_t val;
sys/dev/mii/mii_fdt.c
214
if (OF_getencprop(cfg->phynode, "max-speed", &val, sizeof(val)) > 0)
sys/dev/mii/mii_fdt.c
215
cfg->max_speed = val;
sys/dev/mii/rgephy.c
471
int val;
sys/dev/mii/rgephy.c
481
val = PHY_READ(sc, 4) & 0xFFF;
sys/dev/mii/rgephy.c
482
PHY_WRITE(sc, 4, val);
sys/dev/mii/rgephy.c
489
val = (PHY_READ(sc, 4) & 0xFFF) | 0x7000;
sys/dev/mii/rgephy.c
490
PHY_WRITE(sc, 4, val);
sys/dev/mii/rgephy.c
495
val = (PHY_READ(sc, 4) & 0xFFF) | 0xA000;
sys/dev/mii/rgephy.c
496
PHY_WRITE(sc, 4, val);
sys/dev/mii/rgephy.c
501
val = (PHY_READ(sc, 4) & 0xFFF) | 0xB000;
sys/dev/mii/rgephy.c
502
PHY_WRITE(sc, 4, val);
sys/dev/mii/rgephy.c
507
val = (PHY_READ(sc, 4) & 0xFFF) | 0xF000;
sys/dev/mii/rgephy.c
508
PHY_WRITE(sc, 4, val);
sys/dev/mii/rlswitch.c
137
int val;
sys/dev/mii/rlswitch.c
140
val = 0;
sys/dev/mii/rlswitch.c
141
val |= 0 << 10; /* enable 802.1q VLAN Tag support */
sys/dev/mii/rlswitch.c
142
val |= 0 << 9; /* enable VLAN ingress filtering */
sys/dev/mii/rlswitch.c
143
val |= 1 << 8; /* disable VLAN tag admit control */
sys/dev/mii/rlswitch.c
144
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
145
val |= 1 << 5; /* internal use */
sys/dev/mii/rlswitch.c
146
val |= 1 << 4; /* internal use */
sys/dev/mii/rlswitch.c
147
val |= 1 << 3; /* internal use */
sys/dev/mii/rlswitch.c
148
val |= 1 << 1; /* reserved */
sys/dev/mii/rlswitch.c
149
MIIBUS_WRITEREG(sc->mii_dev, 0, 16, val);
sys/dev/mii/rlswitch.c
152
val = 0;
sys/dev/mii/rlswitch.c
153
val |= 1 << 15; /* reserved */
sys/dev/mii/rlswitch.c
154
val |= 0 << 14; /* enable 1552 Bytes support */
sys/dev/mii/rlswitch.c
155
val |= 1 << 13; /* enable broadcast input drop */
sys/dev/mii/rlswitch.c
156
val |= 1 << 12; /* forward reserved control frames */
sys/dev/mii/rlswitch.c
157
val |= 1 << 11; /* disable forwarding unicast frames to other VLAN's */
sys/dev/mii/rlswitch.c
158
val |= 1 << 10; /* disable forwarding ARP broadcasts to other VLAN's */
sys/dev/mii/rlswitch.c
159
val |= 1 << 9; /* enable 48 pass 1 */
sys/dev/mii/rlswitch.c
160
val |= 0 << 8; /* enable VLAN */
sys/dev/mii/rlswitch.c
161
val |= 1 << 7; /* reserved */
sys/dev/mii/rlswitch.c
162
val |= 1 << 6; /* enable defer */
sys/dev/mii/rlswitch.c
163
val |= 1 << 5; /* 43ms LED blink time */
sys/dev/mii/rlswitch.c
164
val |= 3 << 3; /* 16:1 queue weight */
sys/dev/mii/rlswitch.c
165
val |= 1 << 2; /* disable broadcast storm control */
sys/dev/mii/rlswitch.c
166
val |= 1 << 1; /* enable power-on LED blinking */
sys/dev/mii/rlswitch.c
167
val |= 1 << 0; /* reserved */
sys/dev/mii/rlswitch.c
168
MIIBUS_WRITEREG(sc->mii_dev, 0, 18, val);
sys/dev/mii/rlswitch.c
171
val = 0;
sys/dev/mii/rlswitch.c
172
val |= 1 << 15; /* reserved */
sys/dev/mii/rlswitch.c
173
val |= 1 << 11; /* drop received packets with wrong VLAN tag */
sys/dev/mii/rlswitch.c
174
val |= 1 << 10; /* disable 802.1p priority classification */
sys/dev/mii/rlswitch.c
175
val |= 1 << 9; /* disable diffserv priority classification */
sys/dev/mii/rlswitch.c
176
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
177
val |= 3 << 4; /* internal use */
sys/dev/mii/rlswitch.c
178
val |= 1 << 3; /* internal use */
sys/dev/mii/rlswitch.c
179
val |= 1 << 2; /* internal use */
sys/dev/mii/rlswitch.c
180
val |= 1 << 0; /* remove VLAN tags on output */
sys/dev/mii/rlswitch.c
181
MIIBUS_WRITEREG(sc->mii_dev, 0, 22, val);
sys/dev/mii/rlswitch.c
184
val = 0;
sys/dev/mii/rlswitch.c
185
val |= 1 << 15; /* reserved */
sys/dev/mii/rlswitch.c
186
val |= 1 << 11; /* drop received packets with wrong VLAN tag */
sys/dev/mii/rlswitch.c
187
val |= 1 << 10; /* disable 802.1p priority classification */
sys/dev/mii/rlswitch.c
188
val |= 1 << 9; /* disable diffserv priority classification */
sys/dev/mii/rlswitch.c
189
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
190
val |= 3 << 4; /* internal use */
sys/dev/mii/rlswitch.c
191
val |= 1 << 3; /* internal use */
sys/dev/mii/rlswitch.c
192
val |= 1 << 2; /* internal use */
sys/dev/mii/rlswitch.c
193
val |= 1 << 0; /* remove VLAN tags on output */
sys/dev/mii/rlswitch.c
194
MIIBUS_WRITEREG(sc->mii_dev, 1, 22, val);
sys/dev/mii/rlswitch.c
197
val = 0;
sys/dev/mii/rlswitch.c
198
val |= 1 << 15; /* reserved */
sys/dev/mii/rlswitch.c
199
val |= 1 << 11; /* drop received packets with wrong VLAN tag */
sys/dev/mii/rlswitch.c
200
val |= 1 << 10; /* disable 802.1p priority classification */
sys/dev/mii/rlswitch.c
201
val |= 1 << 9; /* disable diffserv priority classification */
sys/dev/mii/rlswitch.c
202
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
203
val |= 3 << 4; /* internal use */
sys/dev/mii/rlswitch.c
204
val |= 1 << 3; /* internal use */
sys/dev/mii/rlswitch.c
205
val |= 1 << 2; /* internal use */
sys/dev/mii/rlswitch.c
206
val |= 1 << 0; /* remove VLAN tags on output */
sys/dev/mii/rlswitch.c
207
MIIBUS_WRITEREG(sc->mii_dev, 2, 22, val);
sys/dev/mii/rlswitch.c
210
val = 0;
sys/dev/mii/rlswitch.c
211
val |= 1 << 15; /* reserved */
sys/dev/mii/rlswitch.c
212
val |= 1 << 11; /* drop received packets with wrong VLAN tag */
sys/dev/mii/rlswitch.c
213
val |= 1 << 10; /* disable 802.1p priority classification */
sys/dev/mii/rlswitch.c
214
val |= 1 << 9; /* disable diffserv priority classification */
sys/dev/mii/rlswitch.c
215
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
216
val |= 3 << 4; /* internal use */
sys/dev/mii/rlswitch.c
217
val |= 1 << 3; /* internal use */
sys/dev/mii/rlswitch.c
218
val |= 1 << 2; /* internal use */
sys/dev/mii/rlswitch.c
219
val |= 1 << 0; /* remove VLAN tags on output */
sys/dev/mii/rlswitch.c
220
MIIBUS_WRITEREG(sc->mii_dev, 3, 22, val);
sys/dev/mii/rlswitch.c
223
val = 0;
sys/dev/mii/rlswitch.c
224
val |= 1 << 15; /* reserved */
sys/dev/mii/rlswitch.c
225
val |= 0 << 11; /* don't drop received packets with wrong VLAN tag */
sys/dev/mii/rlswitch.c
226
val |= 1 << 10; /* disable 802.1p priority classification */
sys/dev/mii/rlswitch.c
227
val |= 1 << 9; /* disable diffserv priority classification */
sys/dev/mii/rlswitch.c
228
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
229
val |= 3 << 4; /* internal use */
sys/dev/mii/rlswitch.c
230
val |= 1 << 3; /* internal use */
sys/dev/mii/rlswitch.c
231
val |= 1 << 2; /* internal use */
sys/dev/mii/rlswitch.c
232
val |= 2 << 0; /* add VLAN tags for untagged packets on output */
sys/dev/mii/rlswitch.c
233
MIIBUS_WRITEREG(sc->mii_dev, 4, 22, val);
sys/dev/mii/rlswitch.c
236
val = 0;
sys/dev/mii/rlswitch.c
237
val |= 0x0 << 12; /* Port 0 VLAN Index */
sys/dev/mii/rlswitch.c
238
val |= 1 << 11; /* internal use */
sys/dev/mii/rlswitch.c
239
val |= 1 << 10; /* internal use */
sys/dev/mii/rlswitch.c
240
val |= 1 << 9; /* internal use */
sys/dev/mii/rlswitch.c
241
val |= 1 << 7; /* internal use */
sys/dev/mii/rlswitch.c
242
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
243
val |= 0x11 << 0; /* VLAN A membership */
sys/dev/mii/rlswitch.c
244
MIIBUS_WRITEREG(sc->mii_dev, 0, 24, val);
sys/dev/mii/rlswitch.c
247
val = 0;
sys/dev/mii/rlswitch.c
248
val |= 1 << 15; /* internal use */
sys/dev/mii/rlswitch.c
249
val |= 1 << 14; /* internal use */
sys/dev/mii/rlswitch.c
250
val |= 1 << 13; /* internal use */
sys/dev/mii/rlswitch.c
251
val |= 1 << 12; /* internal use */
sys/dev/mii/rlswitch.c
252
val |= 0x100 << 0; /* VLAN A ID */
sys/dev/mii/rlswitch.c
253
MIIBUS_WRITEREG(sc->mii_dev, 0, 25, val);
sys/dev/mii/rlswitch.c
256
val = 0;
sys/dev/mii/rlswitch.c
257
val |= 0x1 << 12; /* Port 1 VLAN Index */
sys/dev/mii/rlswitch.c
258
val |= 1 << 11; /* internal use */
sys/dev/mii/rlswitch.c
259
val |= 1 << 10; /* internal use */
sys/dev/mii/rlswitch.c
260
val |= 1 << 9; /* internal use */
sys/dev/mii/rlswitch.c
261
val |= 1 << 7; /* internal use */
sys/dev/mii/rlswitch.c
262
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
263
val |= 0x12 << 0; /* VLAN B membership */
sys/dev/mii/rlswitch.c
264
MIIBUS_WRITEREG(sc->mii_dev, 1, 24, val);
sys/dev/mii/rlswitch.c
267
val = 0;
sys/dev/mii/rlswitch.c
268
val |= 1 << 15; /* internal use */
sys/dev/mii/rlswitch.c
269
val |= 1 << 14; /* internal use */
sys/dev/mii/rlswitch.c
270
val |= 1 << 13; /* internal use */
sys/dev/mii/rlswitch.c
271
val |= 1 << 12; /* internal use */
sys/dev/mii/rlswitch.c
272
val |= 0x101 << 0; /* VLAN B ID */
sys/dev/mii/rlswitch.c
273
MIIBUS_WRITEREG(sc->mii_dev, 1, 25, val);
sys/dev/mii/rlswitch.c
276
val = 0;
sys/dev/mii/rlswitch.c
277
val |= 0x2 << 12; /* Port 2 VLAN Index */
sys/dev/mii/rlswitch.c
278
val |= 1 << 11; /* internal use */
sys/dev/mii/rlswitch.c
279
val |= 1 << 10; /* internal use */
sys/dev/mii/rlswitch.c
280
val |= 1 << 9; /* internal use */
sys/dev/mii/rlswitch.c
281
val |= 1 << 7; /* internal use */
sys/dev/mii/rlswitch.c
282
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
283
val |= 0x14 << 0; /* VLAN C membership */
sys/dev/mii/rlswitch.c
284
MIIBUS_WRITEREG(sc->mii_dev, 2, 24, val);
sys/dev/mii/rlswitch.c
287
val = 0;
sys/dev/mii/rlswitch.c
288
val |= 1 << 15; /* internal use */
sys/dev/mii/rlswitch.c
289
val |= 1 << 14; /* internal use */
sys/dev/mii/rlswitch.c
290
val |= 1 << 13; /* internal use */
sys/dev/mii/rlswitch.c
291
val |= 1 << 12; /* internal use */
sys/dev/mii/rlswitch.c
292
val |= 0x102 << 0; /* VLAN C ID */
sys/dev/mii/rlswitch.c
293
MIIBUS_WRITEREG(sc->mii_dev, 2, 25, val);
sys/dev/mii/rlswitch.c
296
val = 0;
sys/dev/mii/rlswitch.c
297
val |= 0x3 << 12; /* Port 3 VLAN Index */
sys/dev/mii/rlswitch.c
298
val |= 1 << 11; /* internal use */
sys/dev/mii/rlswitch.c
299
val |= 1 << 10; /* internal use */
sys/dev/mii/rlswitch.c
300
val |= 1 << 9; /* internal use */
sys/dev/mii/rlswitch.c
301
val |= 1 << 7; /* internal use */
sys/dev/mii/rlswitch.c
302
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
303
val |= 0x18 << 0; /* VLAN D membership */
sys/dev/mii/rlswitch.c
304
MIIBUS_WRITEREG(sc->mii_dev, 3, 24, val);
sys/dev/mii/rlswitch.c
307
val = 0;
sys/dev/mii/rlswitch.c
308
val |= 1 << 15; /* internal use */
sys/dev/mii/rlswitch.c
309
val |= 1 << 14; /* internal use */
sys/dev/mii/rlswitch.c
310
val |= 1 << 13; /* internal use */
sys/dev/mii/rlswitch.c
311
val |= 1 << 12; /* internal use */
sys/dev/mii/rlswitch.c
312
val |= 0x103 << 0; /* VLAN D ID */
sys/dev/mii/rlswitch.c
313
MIIBUS_WRITEREG(sc->mii_dev, 3, 25, val);
sys/dev/mii/rlswitch.c
316
val = 0;
sys/dev/mii/rlswitch.c
317
val |= 0x0 << 12; /* Port 4 VLAN Index */
sys/dev/mii/rlswitch.c
318
val |= 1 << 11; /* internal use */
sys/dev/mii/rlswitch.c
319
val |= 1 << 10; /* internal use */
sys/dev/mii/rlswitch.c
320
val |= 1 << 9; /* internal use */
sys/dev/mii/rlswitch.c
321
val |= 1 << 7; /* internal use */
sys/dev/mii/rlswitch.c
322
val |= 1 << 6; /* internal use */
sys/dev/mii/rlswitch.c
323
val |= 0 << 0; /* VLAN E membership */
sys/dev/mii/rlswitch.c
324
MIIBUS_WRITEREG(sc->mii_dev, 4, 24, val);
sys/dev/mii/rlswitch.c
327
val = 0;
sys/dev/mii/rlswitch.c
328
val |= 1 << 15; /* internal use */
sys/dev/mii/rlswitch.c
329
val |= 1 << 14; /* internal use */
sys/dev/mii/rlswitch.c
330
val |= 1 << 13; /* internal use */
sys/dev/mii/rlswitch.c
331
val |= 1 << 12; /* internal use */
sys/dev/mii/rlswitch.c
332
val |= 0x104 << 0; /* VLAN E ID */
sys/dev/mii/rlswitch.c
333
MIIBUS_WRITEREG(sc->mii_dev, 4, 25, val);
sys/dev/mii/rlswitch.c
381
int phy, reg, val;
sys/dev/mii/rlswitch.c
389
val = MIIBUS_READREG(sc->mii_dev, phy, reg);
sys/dev/mii/rlswitch.c
390
printf(" 0x%x", val);
sys/dev/mii/vscphy.c
122
pcell_t val;
sys/dev/mii/vscphy.c
128
if (OF_getencprop(cfg->phynode, "rx-delay", &val, sizeof(val)) > 0)
sys/dev/mii/vscphy.c
129
vsc->rxdelay = val;
sys/dev/mii/vscphy.c
130
if (OF_getencprop(cfg->phynode, "tx-delay", &val, sizeof(val)) > 0)
sys/dev/mii/vscphy.c
131
vsc->txdelay = val;
sys/dev/mii/vscphy.c
140
u_int val;
sys/dev/mii/vscphy.c
142
val = PHY_READ(&sc->mii_sc, reg);
sys/dev/mii/vscphy.c
143
return (val);
sys/dev/mii/vscphy.c
147
vscphy_write(struct vscphy_softc *sc, u_int reg, u_int val)
sys/dev/mii/vscphy.c
150
PHY_WRITE(&sc->mii_sc, reg, val);
sys/dev/mlx/mlxreg.h
118
#define MLX_V4_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V4_MAILBOX + idx, val)
sys/dev/mlx/mlxreg.h
122
#define MLX_V4_PUT_IDBR(sc, val) bus_write_4(sc->mlx_mem, MLX_V4_IDBR, val)
sys/dev/mlx/mlxreg.h
124
#define MLX_V4_PUT_ODBR(sc, val) bus_write_4(sc->mlx_mem, MLX_V4_ODBR, val)
sys/dev/mlx/mlxreg.h
125
#define MLX_V4_PUT_IER(sc, val) bus_write_4(sc->mlx_mem, MLX_V4_IER, val)
sys/dev/mlx/mlxreg.h
127
#define MLX_V4_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V4_FWERROR, val)
sys/dev/mlx/mlxreg.h
163
#define MLX_V5_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V5_MAILBOX + idx, val)
sys/dev/mlx/mlxreg.h
167
#define MLX_V5_PUT_IDBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_IDBR, val)
sys/dev/mlx/mlxreg.h
169
#define MLX_V5_PUT_ODBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_ODBR, val)
sys/dev/mlx/mlxreg.h
170
#define MLX_V5_PUT_IER(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_IER, val)
sys/dev/mlx/mlxreg.h
172
#define MLX_V5_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_FWERROR, val)
sys/dev/mlx/mlxreg.h
81
#define MLX_V3_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V3_MAILBOX + idx, val)
sys/dev/mlx/mlxreg.h
85
#define MLX_V3_PUT_IDBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_IDBR, val)
sys/dev/mlx/mlxreg.h
87
#define MLX_V3_PUT_ODBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_ODBR, val)
sys/dev/mlx/mlxreg.h
88
#define MLX_V3_PUT_IER(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_IER, val)
sys/dev/mlx/mlxreg.h
90
#define MLX_V3_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_FWERROR, val)
sys/dev/mlx4/device.h
1443
int i, int val);
sys/dev/mlx4/doorbell.h
55
static inline void mlx4_write64(__be32 val[2], void __iomem *dest,
sys/dev/mlx4/doorbell.h
58
__raw_writeq(*(u64 *) val, dest);
sys/dev/mlx4/doorbell.h
73
static inline void mlx4_write64(__be32 val[2], void __iomem *dest,
sys/dev/mlx4/doorbell.h
79
__raw_writel((__force u32) val[0], dest);
sys/dev/mlx4/doorbell.h
80
__raw_writel((__force u32) val[1], (u8 *)dest + 4);
sys/dev/mlx4/mlx4_core/mlx4.h
1355
static inline void set_param_l(u64 *arg, u32 val)
sys/dev/mlx4/mlx4_core/mlx4.h
1357
*arg = (*arg & 0xffffffff00000000ULL) | (u64) val;
sys/dev/mlx4/mlx4_core/mlx4.h
1360
static inline void set_param_h(u64 *arg, u32 val)
sys/dev/mlx4/mlx4_core/mlx4.h
1362
*arg = (*arg & 0xffffffff) | ((u64) val << 32);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
265
u32 val;
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
280
val = param | (cmd << 16) | (priv->cmd.comm_toggle << 31);
sys/dev/mlx4/mlx4_core/mlx4_cmd.c
281
__raw_writel((__force u32) cpu_to_be32(val),
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1779
u32 val;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1782
val = ((u64_p_t *)addr)->value;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1783
val = swab32(val);
sys/dev/mlx4/mlx4_core/mlx4_fw.c
1784
((u64_p_t *)&bid_u32[i])->value = val;
sys/dev/mlx4/mlx4_core/mlx4_fw.c
64
u64 val; \
sys/dev/mlx4/mlx4_core/mlx4_fw.c
69
case 8: val = ((u64_p_t *)__p)->value; \
sys/dev/mlx4/mlx4_core/mlx4_fw.c
70
(dest) = be64_to_cpu(val); break; \
sys/dev/mlx4/mlx4_core/mlx4_main.c
744
void mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val)
sys/dev/mlx4/mlx4_core/mlx4_main.c
751
priv->virt2phys_pkey[slave][port - 1][i] = val;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1307
memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1311
mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1331
mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1333
mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1345
mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1347
mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1582
err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
1629
if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
sys/dev/mlx5/doorbell.h
42
static inline void mlx5_write64(__be32 val[2], void __iomem *dest,
sys/dev/mlx5/doorbell.h
45
__raw_writeq(*(u64 *)val, dest);
sys/dev/mlx5/doorbell.h
59
static inline void mlx5_write64(__be32 val[2], void __iomem *dest,
sys/dev/mlx5/doorbell.h
66
__raw_writel((__force u32) val[0], dest);
sys/dev/mlx5/doorbell.h
67
__raw_writel((__force u32) val[1], dest + 4);
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
350
static int setup_modify_header(struct mlx5_core_dev *mdev, u32 val, u8 dir,
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_fs.c
373
MLX5_SET(set_action_in, action, data, val);
sys/dev/mlx5/mlx5_core/fs_core.h
215
u32 val[MLX5_ST_SZ_DW_MATCH_PARAM];
sys/dev/mlx5/mlx5_core/mlx5_eq.c
215
u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24);
sys/dev/mlx5/mlx5_core/mlx5_eq.c
216
__raw_writel((__force u32) cpu_to_be32(val), addr);
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
522
memcpy(in_match_value, &fte->val, sizeof(fte->val));
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
1820
if (!memcmp(match_value, fte_tmp->val, sizeof_field(struct fs_fte, val)))
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
737
memcpy(fte->val, &spec->match_value, sizeof(fte->val));
sys/dev/mlx5/mlx5_core/mlx5_fwdump.c
317
rv.val = mdev->dump_data[i];
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1455
u8 val;
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1457
err = mlx5_nic_vport_query_local_lb(priv->mdev, MLX5_LOCAL_MC_LB, &val);
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1459
priv->params_ethtool.mc_local_lb = val;
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1461
err = mlx5_nic_vport_query_local_lb(priv->mdev, MLX5_LOCAL_UC_LB, &val);
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1463
priv->params_ethtool.uc_local_lb = val;
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
129
csum_reduce(uint32_t val)
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
131
while (val > 0xffff)
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
132
val = (val >> 16) + (val & 0xffff);
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
133
return (val);
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
137
csum_buf(uint32_t val, void *buf, int len)
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
144
val = csum_reduce(val + x);
sys/dev/mlx5/mlx5_en/mlx5_en_rx.c
146
return (val);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1800
static void set_proto(void *outer_c, void *outer_v, u8 mask, u8 val)
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1803
MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_protocol, val);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1806
static void set_tos(void *outer_c, void *outer_v, u8 mask, u8 val)
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1809
MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_ecn, val);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1811
MLX5_SET(fte_match_set_lyr_2_4, outer_v, ip_dscp, val >> 2);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1850
ib_spec->eth.val.dst_mac);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1857
ib_spec->eth.val.src_mac);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1868
first_vid, ntohs(ib_spec->eth.val.vlan_tag));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1875
ntohs(ib_spec->eth.val.vlan_tag) >> 12);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1882
ntohs(ib_spec->eth.val.vlan_tag) >> 13);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1887
ethertype, ntohs(ib_spec->eth.val.ether_type));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1904
&ib_spec->ipv4.val.src_ip,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1905
sizeof(ib_spec->ipv4.val.src_ip));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1912
&ib_spec->ipv4.val.dst_ip,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1913
sizeof(ib_spec->ipv4.val.dst_ip));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1916
ib_spec->ipv4.mask.tos, ib_spec->ipv4.val.tos);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1919
ib_spec->ipv4.mask.proto, ib_spec->ipv4.val.proto);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1936
&ib_spec->ipv6.val.src_ip,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1937
sizeof(ib_spec->ipv6.val.src_ip));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1944
&ib_spec->ipv6.val.dst_ip,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1945
sizeof(ib_spec->ipv6.val.dst_ip));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1949
ib_spec->ipv6.val.traffic_class);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1953
ib_spec->ipv6.val.next_hdr);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1960
ntohl(ib_spec->ipv6.val.flow_label));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1975
ntohs(ib_spec->tcp_udp.val.src_port));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1980
ntohs(ib_spec->tcp_udp.val.dst_port));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1995
ntohs(ib_spec->tcp_udp.val.src_port));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
2000
ntohs(ib_spec->tcp_udp.val.dst_port));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
2029
is_multicast_ether_addr(eth_spec->val.dst_mac);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
2044
ib_spec->eth.val.ether_type == htons(ETH_P_IP)))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
2286
.val = {.dst_mac = {0x1} }
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
2298
.val = {.dst_mac = {} }
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3293
__be32 val;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3311
val = *(__be32 *)(out + stats_offsets[i]);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3312
stats->value[i] = (u64)be32_to_cpu(val);
sys/dev/mlx5/mlx5io.h
33
uint32_t val;
sys/dev/mpi3mr/mpi3mr.h
249
volatile unsigned int val;
sys/dev/mpi3mr/mpi3mr.h
253
#define mpi3mr_atomic_read(v) atomic_load_acq_int(&(v)->val)
sys/dev/mpi3mr/mpi3mr.h
254
#define mpi3mr_atomic_set(v,i) atomic_store_rel_int(&(v)->val, i)
sys/dev/mpi3mr/mpi3mr.h
255
#define mpi3mr_atomic_dec(v) atomic_subtract_int(&(v)->val, 1)
sys/dev/mpi3mr/mpi3mr.h
256
#define mpi3mr_atomic_inc(v) atomic_add_int(&(v)->val, 1)
sys/dev/mpi3mr/mpi3mr.h
257
#define mpi3mr_atomic_add(v, u) atomic_add_int(&(v)->val, u)
sys/dev/mpi3mr/mpi3mr.h
258
#define mpi3mr_atomic_sub(v, u) atomic_subtract_int(&(v)->val, u)
sys/dev/mpi3mr/mpi3mr.h
787
mpi3mr_regwrite64(struct mpi3mr_softc *sc, uint32_t offset, uint64_t val)
sys/dev/mpi3mr/mpi3mr.h
789
bus_space_write_8(sc->mpi3mr_btag, sc->mpi3mr_bhandle, offset, val);
sys/dev/mpi3mr/mpi3mr.h
799
mpi3mr_regwrite(struct mpi3mr_softc *sc, uint32_t offset, uint32_t val)
sys/dev/mpi3mr/mpi3mr.h
801
bus_space_write_4(sc->mpi3mr_btag, sc->mpi3mr_bhandle, offset, val);
sys/dev/mpr/mprvar.h
550
mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)
sys/dev/mpr/mprvar.h
552
bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);
sys/dev/mps/mpsvar.h
505
mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
sys/dev/mps/mpsvar.h
507
bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
sys/dev/mpt/mpt.c
2262
int val, error;
sys/dev/mpt/mpt.c
2269
for (val = 0; val < MPT_MAX_LUNS; val++) {
sys/dev/mpt/mpt.c
2270
STAILQ_INIT(&mpt->trt[val].atios);
sys/dev/mpt/mpt.c
2271
STAILQ_INIT(&mpt->trt[val].inots);
sys/dev/mpt/mpt.c
2351
int val;
sys/dev/mpt/mpt.c
2359
for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) {
sys/dev/mpt/mpt.c
2360
request_t *req = &mpt->request_pool[val];
sys/dev/mpt/mpt.c
2620
int error, port, val;
sys/dev/mpt/mpt.c
2704
for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++) {
sys/dev/mpt/mpt.c
2705
request_t *req = &mpt->request_pool[val];
sys/dev/mpt/mpt.c
2876
int val;
sys/dev/mpt/mpt.c
2896
for (val = 0, pptr = mpt->reply_phys;
sys/dev/mpt/mpt.c
2900
if (++val == mpt->ioc_facts.GlobalCredits - 1)
sys/dev/mpt/mpt.h
789
mpt_write(struct mpt_softc *mpt, size_t offset, uint32_t val)
sys/dev/mpt/mpt.h
791
bus_space_write_4(mpt->pci_st, mpt->pci_sh, offset, val);
sys/dev/mpt/mpt.h
795
mpt_write_stream(struct mpt_softc *mpt, size_t offset, uint32_t val)
sys/dev/mpt/mpt.h
797
bus_space_write_stream_4(mpt->pci_st, mpt->pci_sh, offset, val);
sys/dev/mpt/mpt.h
812
mpt_pio_write(struct mpt_softc *mpt, size_t offset, uint32_t val)
sys/dev/mpt/mpt.h
815
bus_space_write_4(mpt->pci_pio_st, mpt->pci_pio_sh, offset, val);
sys/dev/mpt/mpt_pci.c
325
uint32_t val;
sys/dev/mpt/mpt_pci.c
382
val = pci_read_config(dev, PCIR_COMMAND, 2);
sys/dev/mpt/mpt_pci.c
383
val |= PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
sys/dev/mpt/mpt_pci.c
385
pci_write_config(dev, PCIR_COMMAND, val, 2);
sys/dev/mpt/mpt_pci.c
390
val = pci_read_config(dev, PCIR_BIOS, 4);
sys/dev/mpt/mpt_pci.c
391
val &= ~PCIM_BIOS_ENABLE;
sys/dev/mpt/mpt_pci.c
392
pci_write_config(dev, PCIR_BIOS, val, 4);
sys/dev/mpt/mpt_pci.c
416
val = pci_read_config(dev, PCIR_BAR(0), 4);
sys/dev/mpt/mpt_pci.c
417
if (PCI_BAR_IO(val)) {
sys/dev/mpt/mpt_pci.c
474
val = 1;
sys/dev/mpt/mpt_pci.c
475
if (pci_alloc_msix(dev, &val) == 0)
sys/dev/mpt/mpt_pci.c
477
val = 1;
sys/dev/mpt/mpt_pci.c
478
if (iqd == 0 && pci_alloc_msi(dev, &val) == 0)
sys/dev/mpt/mpt_pci.c
748
uint32_t val;
sys/dev/mpt/mpt_pci.c
751
val = pci_read_config(mpt->dev, offset, size); \
sys/dev/mpt/mpt_pci.c
752
if (mpt->pci_cfg.reg != val) { \
sys/dev/mpt/mpt_pci.c
755
mpt->pci_cfg.reg, val); \
sys/dev/mrsas/mrsas.c
2954
u_int32_t val, fw_state;
sys/dev/mrsas/mrsas.c
2958
val = mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, outbound_scratch_pad));
sys/dev/mrsas/mrsas.c
2959
fw_state = val & MFI_STATE_MASK;
sys/dev/mrsas/mrsas.h
702
volatile unsigned int val;
sys/dev/mrsas/mrsas.h
706
#define mrsas_atomic_read(v) atomic_load_acq_int(&(v)->val)
sys/dev/mrsas/mrsas.h
707
#define mrsas_atomic_set(v,i) atomic_store_rel_int(&(v)->val, i)
sys/dev/mrsas/mrsas.h
708
#define mrsas_atomic_dec(v) atomic_subtract_int(&(v)->val, 1)
sys/dev/mrsas/mrsas.h
709
#define mrsas_atomic_inc(v) atomic_add_int(&(v)->val, 1)
sys/dev/mrsas/mrsas.h
714
return 1 + atomic_fetchadd_int(&(v)->val, 1);
sys/dev/mrsas/mrsas_fp.c
1505
u_int8_t val = cdb[1] & 0xE0;
sys/dev/mrsas/mrsas_fp.c
1511
cdb[1] = val | ((u_int8_t)(start_blk >> 16) & 0x1f);
sys/dev/msk/if_msk.c
1246
uint32_t our, val;
sys/dev/msk/if_msk.c
1257
val = 0;
sys/dev/msk/if_msk.c
1261
val = Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
sys/dev/msk/if_msk.c
1268
CSR_WRITE_1(sc, B2_Y2_CLK_GATE, val);
sys/dev/msk/if_msk.c
1283
val = CSR_PCI_READ_4(sc, PCI_OUR_REG_4);
sys/dev/msk/if_msk.c
1284
val &= (PCI_FORCE_ASPM_REQUEST |
sys/dev/msk/if_msk.c
1288
CSR_PCI_WRITE_4(sc, PCI_OUR_REG_4, val);
sys/dev/msk/if_msk.c
1289
val = CSR_PCI_READ_4(sc, PCI_OUR_REG_5);
sys/dev/msk/if_msk.c
1290
val &= PCI_CTL_TIM_VMAIN_AV_MSK;
sys/dev/msk/if_msk.c
1291
CSR_PCI_WRITE_4(sc, PCI_OUR_REG_5, val);
sys/dev/msk/if_msk.c
1298
val = CSR_READ_4(sc, B2_GP_IO);
sys/dev/msk/if_msk.c
1299
val |= GLB_GPIO_STAT_RACE_DIS;
sys/dev/msk/if_msk.c
1300
CSR_WRITE_4(sc, B2_GP_IO, val);
sys/dev/msk/if_msk.c
1314
val = CSR_PCI_READ_4(sc, PCI_OUR_REG_1);
sys/dev/msk/if_msk.c
1315
val |= PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD;
sys/dev/msk/if_msk.c
1318
val &= ~PCI_Y2_PHY1_COMA;
sys/dev/msk/if_msk.c
1320
val &= ~PCI_Y2_PHY2_COMA;
sys/dev/msk/if_msk.c
1322
CSR_PCI_WRITE_4(sc, PCI_OUR_REG_1, val);
sys/dev/msk/if_msk.c
1324
val = Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
sys/dev/msk/if_msk.c
1330
val = 0;
sys/dev/msk/if_msk.c
1336
CSR_WRITE_1(sc, B2_Y2_CLK_GATE, val);
sys/dev/msk/if_msk.c
1350
uint32_t val;
sys/dev/msk/if_msk.c
1392
val = CSR_PCI_READ_4(sc, PEX_UNC_ERR_STAT);
sys/dev/msk/if_msk.c
1393
if ((val & PEX_RX_OV) != 0) {
sys/dev/msk/if_msk.c
1401
val = pci_read_config(sc->msk_dev, PCIR_CACHELNSZ, 1);
sys/dev/msk/if_msk.c
1402
if (val == 0)
sys/dev/msk/if_msk.c
1406
val = pci_read_config(sc->msk_dev, PCI_OUR_REG_1, 4);
sys/dev/msk/if_msk.c
1407
val |= PCI_CLS_OPT;
sys/dev/msk/if_msk.c
1408
pci_write_config(sc->msk_dev, PCI_OUR_REG_1, val, 4);
sys/dev/msk/if_msk.c
410
int i, val;
sys/dev/msk/if_msk.c
4118
uint32_t val;
sys/dev/msk/if_msk.c
4142
val = GMAC_READ_2(sc, sc_if->msk_port, GM_GP_CTRL);
sys/dev/msk/if_msk.c
4143
val &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
sys/dev/msk/if_msk.c
4144
GMAC_WRITE_2(sc, sc_if->msk_port, GM_GP_CTRL, val);
sys/dev/msk/if_msk.c
4152
val = CSR_READ_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR));
sys/dev/msk/if_msk.c
4154
if ((val & (BMU_STOP | BMU_IDLE)) == 0) {
sys/dev/msk/if_msk.c
4157
val = CSR_READ_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR));
sys/dev/msk/if_msk.c
419
val = GMAC_READ_2(sc, sc_if->msk_port, GM_SMI_CTRL);
sys/dev/msk/if_msk.c
420
if ((val & GM_SMI_CT_RD_VAL) != 0) {
sys/dev/msk/if_msk.c
421
val = GMAC_READ_2(sc, sc_if->msk_port, GM_SMI_DATA);
sys/dev/msk/if_msk.c
428
val = 0;
sys/dev/msk/if_msk.c
431
return (val);
sys/dev/msk/if_msk.c
435
msk_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/msk/if_msk.c
441
return (msk_phy_writereg(sc_if, phy, reg, val));
sys/dev/msk/if_msk.c
445
msk_phy_writereg(struct msk_if_softc *sc_if, int phy, int reg, int val)
sys/dev/msk/if_msk.c
452
GMAC_WRITE_2(sc, sc_if->msk_port, GM_SMI_DATA, val);
sys/dev/msk/if_mskreg.h
2124
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/msk/if_mskreg.h
2125
bus_write_4((sc)->msk_res[0], (reg), (val))
sys/dev/msk/if_mskreg.h
2126
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/msk/if_mskreg.h
2127
bus_write_2((sc)->msk_res[0], (reg), (val))
sys/dev/msk/if_mskreg.h
2128
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/msk/if_mskreg.h
2129
bus_write_1((sc)->msk_res[0], (reg), (val))
sys/dev/msk/if_mskreg.h
2138
#define CSR_PCI_WRITE_4(sc, reg, val) \
sys/dev/msk/if_mskreg.h
2139
bus_write_4((sc)->msk_res[0], Y2_CFG_SPC + (reg), (val))
sys/dev/msk/if_mskreg.h
2140
#define CSR_PCI_WRITE_2(sc, reg, val) \
sys/dev/msk/if_mskreg.h
2141
bus_write_2((sc)->msk_res[0], Y2_CFG_SPC + (reg), (val))
sys/dev/msk/if_mskreg.h
2142
#define CSR_PCI_WRITE_1(sc, reg, val) \
sys/dev/msk/if_mskreg.h
2143
bus_write_1((sc)->msk_res[0], Y2_CFG_SPC + (reg), (val))
sys/dev/msk/if_mskreg.h
2159
#define MSK_IF_WRITE_4(sc_if, reg, val) \
sys/dev/msk/if_mskreg.h
2160
CSR_WRITE_4((sc_if)->msk_softc, (reg), (val))
sys/dev/msk/if_mskreg.h
2161
#define MSK_IF_WRITE_2(sc_if, reg, val) \
sys/dev/msk/if_mskreg.h
2162
CSR_WRITE_2((sc_if)->msk_softc, (reg), (val))
sys/dev/msk/if_mskreg.h
2163
#define MSK_IF_WRITE_1(sc_if, reg, val) \
sys/dev/msk/if_mskreg.h
2164
CSR_WRITE_1((sc_if)->msk_softc, (reg), (val))
sys/dev/msk/if_mskreg.h
2168
#define GMAC_WRITE_2(sc, port, reg, val) \
sys/dev/msk/if_mskreg.h
2169
CSR_WRITE_2((sc), GMAC_REG((port), (reg)), (val))
sys/dev/msk/if_mskreg.h
320
#define PCI_OS_SPEED(val) ((val & PCI_OS_MODE_MSK) >> 28) /* PCI-X Speed */
sys/dev/mthca/mthca_cmd.c
1907
u8 val;
sys/dev/mthca/mthca_cmd.c
1914
val = in_wc->sl << 4;
sys/dev/mthca/mthca_cmd.c
1915
MTHCA_PUT(inbox, val, MAD_IFC_SL_OFFSET);
sys/dev/mthca/mthca_cmd.c
1917
val = in_wc->dlid_path_bits |
sys/dev/mthca/mthca_cmd.c
1919
MTHCA_PUT(inbox, val, MAD_IFC_G_PATH_OFFSET);
sys/dev/mthca/mthca_doorbell.h
102
static inline void mthca_write_db_rec(__be32 val[2], __be32 *db)
sys/dev/mthca/mthca_doorbell.h
104
db[0] = val[0];
sys/dev/mthca/mthca_doorbell.h
106
db[1] = val[1];
sys/dev/mthca/mthca_doorbell.h
54
static inline void mthca_write64_raw(__be64 val, void __iomem *dest)
sys/dev/mthca/mthca_doorbell.h
56
__raw_writeq((__force u64) val, dest);
sys/dev/mthca/mthca_doorbell.h
65
static inline void mthca_write_db_rec(__be32 val[2], __be32 *db)
sys/dev/mthca/mthca_doorbell.h
67
*(u64 *) db = *(u64 *) val;
sys/dev/mthca/mthca_doorbell.h
82
static inline void mthca_write64_raw(__be64 val, void __iomem *dest)
sys/dev/mthca/mthca_doorbell.h
84
__raw_writel(((__force u32 *) &val)[0], dest);
sys/dev/mthca/mthca_doorbell.h
85
__raw_writel(((__force u32 *) &val)[1], dest + 4);
sys/dev/mvs/mvs.c
1020
uint32_t val;
sys/dev/mvs/mvs.c
1023
val = ATA_INL(ch->r_mem, EDMA_RESQIP);
sys/dev/mvs/mvs.c
1024
if (val == 0)
sys/dev/mvs/mvs.c
1025
val = ATA_INL(ch->r_mem, EDMA_RESQIP);
sys/dev/mvs/mvs.c
1026
in_idx = (val & EDMA_RESQP_ERPQP_MASK) >>
sys/dev/mvs/mvs.c
1997
uint32_t val;
sys/dev/mvs/mvs.c
2000
val = ATA_INL(ch->r_mem, SATA_PHYM3);
sys/dev/mvs/mvs.c
2001
val &= ~(0x3 << 27); /* SELMUPF = 1 */
sys/dev/mvs/mvs.c
2002
val |= (0x1 << 27);
sys/dev/mvs/mvs.c
2003
val &= ~(0x3 << 29); /* SELMUPI = 1 */
sys/dev/mvs/mvs.c
2004
val |= (0x1 << 29);
sys/dev/mvs/mvs.c
2005
ATA_OUTL(ch->r_mem, SATA_PHYM3, val);
sys/dev/mvs/mvs.c
2007
val = ATA_INL(ch->r_mem, SATA_PHYM4);
sys/dev/mvs/mvs.c
2008
val &= ~0x1; /* SATU_OD8 = 0 */
sys/dev/mvs/mvs.c
2009
val |= (0x1 << 16); /* reserved bit 16 = 1 */
sys/dev/mvs/mvs.c
2010
ATA_OUTL(ch->r_mem, SATA_PHYM4, val);
sys/dev/mvs/mvs.c
2012
val = ATA_INL(ch->r_mem, SATA_PHYM9_GEN2);
sys/dev/mvs/mvs.c
2013
val &= ~0xf; /* TXAMP[3:0] = 8 */
sys/dev/mvs/mvs.c
2014
val |= 0x8;
sys/dev/mvs/mvs.c
2015
val &= ~(0x1 << 14); /* TXAMP[4] = 0 */
sys/dev/mvs/mvs.c
2016
ATA_OUTL(ch->r_mem, SATA_PHYM9_GEN2, val);
sys/dev/mvs/mvs.c
2018
val = ATA_INL(ch->r_mem, SATA_PHYM9_GEN1);
sys/dev/mvs/mvs.c
2019
val &= ~0xf; /* TXAMP[3:0] = 8 */
sys/dev/mvs/mvs.c
2020
val |= 0x8;
sys/dev/mvs/mvs.c
2021
val &= ~(0x1 << 14); /* TXAMP[4] = 0 */
sys/dev/mvs/mvs.c
2022
ATA_OUTL(ch->r_mem, SATA_PHYM9_GEN1, val);
sys/dev/mvs/mvs.c
2201
uint32_t val;
sys/dev/mvs/mvs.c
2205
val = SATA_SC_SPD_SPEED_GEN1;
sys/dev/mvs/mvs.c
2207
val = SATA_SC_SPD_SPEED_GEN2;
sys/dev/mvs/mvs.c
2209
val = SATA_SC_SPD_SPEED_GEN3;
sys/dev/mvs/mvs.c
2211
val = 0;
sys/dev/mvs/mvs.c
2213
SATA_SC_DET_RESET | val |
sys/dev/mvs/mvs.c
2217
SATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 :
sys/dev/mwl/if_mwl.c
279
WR4(struct mwl_softc *sc, bus_size_t off, uint32_t val)
sys/dev/mwl/if_mwl.c
281
bus_space_write_4(sc->sc_io0t, sc->sc_io0h, off, val);
sys/dev/mwl/mwlhal.c
221
WR4(struct mwl_hal_priv *mh, bus_size_t off, uint32_t val)
sys/dev/mwl/mwlhal.c
223
bus_space_write_4(mh->public.mh_iot, mh->public.mh_ioh, off, val);
sys/dev/mwl/mwlhal.c
2233
getRFReg(struct mwl_hal_priv *mh, int flag, uint32_t reg, uint32_t *val)
sys/dev/mwl/mwlhal.c
2242
pCmd->Value = htole32(*val);
sys/dev/mwl/mwlhal.c
2246
*val = pCmd->Value;
sys/dev/mwl/mwlhal.c
2252
getBBReg(struct mwl_hal_priv *mh, int flag, uint32_t reg, uint32_t *val)
sys/dev/mwl/mwlhal.c
2261
pCmd->Value = htole32(*val);
sys/dev/mwl/mwlhal.c
2265
*val = pCmd->Value;
sys/dev/mwl/mwlhal.c
2460
mwlWaitFor(struct mwl_hal_priv *mh, uint32_t val)
sys/dev/mwl/mwlhal.c
2466
if (RD4(mh, MACREG_REG_INT_CODE) == val)
sys/dev/mxge/if_mxge.c
336
uint32_t val;
sys/dev/mxge/if_mxge.c
386
val = pci_read_config(pdev, 0x178, 4);
sys/dev/mxge/if_mxge.c
387
if (val != 0xffffffff) {
sys/dev/mxge/if_mxge.c
388
val |= 0x40;
sys/dev/mxge/if_mxge.c
389
pci_write_config(pdev, 0x178, val, 4);
sys/dev/mxge/if_mxge.c
438
val = *ptr32;
sys/dev/mxge/if_mxge.c
440
if (val == 0xffffffff) {
sys/dev/mxge/if_mxge.c
445
*ptr32 = val | 0x40;
sys/dev/my/if_myreg.h
388
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/my/if_myreg.h
389
bus_space_write_4(sc->my_btag, sc->my_bhandle, reg, val)
sys/dev/my/if_myreg.h
390
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/my/if_myreg.h
391
bus_space_write_2(sc->my_btag, sc->my_bhandle, reg, val)
sys/dev/my/if_myreg.h
392
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/my/if_myreg.h
393
bus_space_write_1(sc->my_btag, sc->my_bhandle, reg, val)
sys/dev/nctgpio/nctgpio.c
1012
bool val;
sys/dev/nctgpio/nctgpio.c
1022
val = GET_BIT(sc->cache.out[group], bit);
sys/dev/nctgpio/nctgpio.c
1026
val, pin_num, group, bit);
sys/dev/nctgpio/nctgpio.c
1028
return (val);
sys/dev/nctgpio/nctgpio.c
1031
val = nct_get_pin_reg(sc, REG_DAT, pin_num);
sys/dev/nctgpio/nctgpio.c
1033
if (val)
sys/dev/nctgpio/nctgpio.c
1037
return (val);
sys/dev/nctgpio/nctgpio.c
782
uint8_t val;
sys/dev/nctgpio/nctgpio.c
786
val = bus_read_1(sc->iores, reg);
sys/dev/nctgpio/nctgpio.c
788
io2str(reg), val, reg);
sys/dev/nctgpio/nctgpio.c
789
return (val);
sys/dev/nctgpio/nctgpio.c
793
nct_io_write(struct nct_softc *sc, uint8_t grpnum, uint8_t reg, uint8_t val)
sys/dev/nctgpio/nctgpio.c
798
io2str(reg), val, reg);
sys/dev/nctgpio/nctgpio.c
799
bus_write_1(sc->iores, reg, val);
sys/dev/nctgpio/nctgpio.c
830
uint8_t val;
sys/dev/nctgpio/nctgpio.c
838
val = superio_ldn_read(sc->dev, gp->data_ldn, ioreg);
sys/dev/nctgpio/nctgpio.c
840
reg2str(reg), val, grpnum, ioreg);
sys/dev/nctgpio/nctgpio.c
841
return (val);
sys/dev/nctgpio/nctgpio.c
849
uint8_t val;
sys/dev/nctgpio/nctgpio.c
856
val = cache[group];
sys/dev/nctgpio/nctgpio.c
857
return (GET_BIT(val, bit));
sys/dev/nctgpio/nctgpio.c
861
nct_write_reg(struct nct_softc *sc, reg_t reg, uint8_t grpnum, uint8_t val)
sys/dev/nctgpio/nctgpio.c
869
nct_io_write(sc, grpnum, ioreg, val);
sys/dev/nctgpio/nctgpio.c
874
superio_ldn_write(sc->dev, gp->data_ldn, ioreg, val);
sys/dev/nctgpio/nctgpio.c
877
reg2str(reg), val, grpnum, ioreg);
sys/dev/nctgpio/nctgpio.c
881
nct_set_pin_reg(struct nct_softc *sc, reg_t reg, uint32_t pin_num, bool val)
sys/dev/nctgpio/nctgpio.c
897
bitval = (uint8_t)val << bit;
sys/dev/nctgpio/nctgpio.c
914
nct_set_pin_input(struct nct_softc *sc, uint32_t pin_num, bool val)
sys/dev/nctgpio/nctgpio.c
916
nct_set_pin_reg(sc, REG_IOR, pin_num, val);
sys/dev/nctgpio/nctgpio.c
932
nct_set_pin_inverted(struct nct_softc *sc, uint32_t pin_num, bool val)
sys/dev/nctgpio/nctgpio.c
934
nct_set_pin_reg(sc, REG_INV, pin_num, val);
sys/dev/nctgpio/nctgpio.c
951
nct_write_pin(struct nct_softc *sc, uint32_t pin_num, bool val)
sys/dev/nctgpio/nctgpio.c
961
GET_BIT(sc->cache.out[group], bit) == val) {
sys/dev/nctgpio/nctgpio.c
966
if (val)
sys/dev/nctgpio/nctgpio.c
978
uint8_t val;
sys/dev/nctgpio/nctgpio.c
986
val = nct_read_reg(sc, reg, group);
sys/dev/nctgpio/nctgpio.c
987
b = GET_BIT(val, bit);
sys/dev/ncthwm/ncthwm.c
119
ncthwm_write(struct ncthwm_softc *sc, uint8_t reg, uint8_t val)
sys/dev/ncthwm/ncthwm.c
122
bus_write_1(sc->iores, 1, val);
sys/dev/ncthwm/ncthwm.c
137
uint16_t val;
sys/dev/ncthwm/ncthwm.c
152
val = ncthwm_read(sc, fan->high_byte_offset) << 8;
sys/dev/ncthwm/ncthwm.c
153
val |= ncthwm_read(sc, fan->low_byte_offset);
sys/dev/ncthwm/ncthwm.c
156
fan->name, val, sc->nctdevp->fan_bank, fan->high_byte_offset, fan->low_byte_offset);
sys/dev/ncthwm/ncthwm.c
158
return (sysctl_handle_16(oidp, &val, 0, req));
sys/dev/neta/if_mvneta.c
3309
uint64_t val;
sys/dev/neta/if_mvneta.c
3322
val = arg->counter;
sys/dev/neta/if_mvneta.c
3324
return sysctl_handle_64(oidp, &val, 0, req);
sys/dev/neta/if_mvneta.c
3332
int err, val;
sys/dev/neta/if_mvneta.c
3334
val = 0;
sys/dev/neta/if_mvneta.c
3339
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/neta/if_mvneta.c
3343
if (val < 0 || val > 1)
sys/dev/neta/if_mvneta.c
3346
if (val == 1) {
sys/dev/neta/if_mvneta.c
3510
uint64_t val;
sys/dev/neta/if_mvneta.c
3513
val = MVNETA_READ_MIB(sc, mib->regnum);
sys/dev/neta/if_mvneta.c
3515
val |= (uint64_t)MVNETA_READ_MIB(sc, mib->regnum + 4) << 32;
sys/dev/neta/if_mvneta.c
3516
return (val);
sys/dev/neta/if_mvneta.c
3542
uint64_t val;
sys/dev/neta/if_mvneta.c
3547
val = mvneta_read_mib(sc, i);
sys/dev/neta/if_mvneta.c
3548
if (val == 0)
sys/dev/neta/if_mvneta.c
3551
sc->sysctl_mib[i].counter += val;
sys/dev/neta/if_mvneta.c
3554
if_inc_counter(sc->ifp, IFCOUNTER_IBYTES, val);
sys/dev/neta/if_mvneta.c
3557
if_inc_counter(sc->ifp, IFCOUNTER_IERRORS, val);
sys/dev/neta/if_mvneta.c
3560
if_inc_counter(sc->ifp, IFCOUNTER_IPACKETS, val);
sys/dev/neta/if_mvneta.c
3563
if_inc_counter(sc->ifp, IFCOUNTER_IMCASTS, val);
sys/dev/neta/if_mvneta.c
3566
if_inc_counter(sc->ifp, IFCOUNTER_OBYTES, val);
sys/dev/neta/if_mvneta.c
3569
if_inc_counter(sc->ifp, IFCOUNTER_OPACKETS, val);
sys/dev/neta/if_mvneta.c
3572
if_inc_counter(sc->ifp, IFCOUNTER_OMCASTS, val);
sys/dev/neta/if_mvneta.c
3575
if_inc_counter(sc->ifp, IFCOUNTER_COLLISIONS, val);
sys/dev/neta/if_mvneta.c
3580
if_inc_counter(sc->ifp, IFCOUNTER_OERRORS, val);
sys/dev/neta/if_mvneta.c
879
uint32_t smi, val;
sys/dev/neta/if_mvneta.c
933
val = smi & MVNETA_SMI_DATA_MASK;
sys/dev/neta/if_mvneta.c
937
reg, val);
sys/dev/neta/if_mvneta.c
939
return (val);
sys/dev/neta/if_mvneta.c
943
mvneta_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/neta/if_mvneta.c
954
phy, reg, val);
sys/dev/neta/if_mvneta.c
971
MVNETA_SMI_OPCODE_WRITE | (val & MVNETA_SMI_DATA_MASK);
sys/dev/neta/if_mvnetavar.h
62
#define MVNETA_WRITE(sc, reg, val) \
sys/dev/neta/if_mvnetavar.h
63
bus_write_4((sc)->res[0], (reg), (val))
sys/dev/neta/if_mvnetavar.h
65
#define MVNETA_READ_REGION(sc, reg, val, c) \
sys/dev/neta/if_mvnetavar.h
66
bus_read_region_4((sc)->res[0], (reg), (val), (c))
sys/dev/neta/if_mvnetavar.h
67
#define MVNETA_WRITE_REGION(sc, reg, val, c) \
sys/dev/neta/if_mvnetavar.h
68
bus_write_region_4((sc)->res[0], (reg), (val), (c))
sys/dev/netmap/netmap_freebsd.c
561
nm_vi_free_index(uint8_t val)
sys/dev/netmap/netmap_freebsd.c
568
if (nm_vi_indices.index[i] == val) {
sys/dev/netmap/netmap_freebsd.c
571
nm_vi_indices.index[lim-1] = val;
sys/dev/netmap/netmap_freebsd.c
578
nm_prerr("Index %u not found", val);
sys/dev/netmap/netmap_kloop.c
115
csb_ktoa_kick_enable(struct nm_csb_ktoa __user *csb_ktoa, uint32_t val)
sys/dev/netmap/netmap_kloop.c
117
CSB_WRITE(csb_ktoa, kern_need_kick, val);
sys/dev/nfe/if_nfe.c
1000
NFE_WRITE(sc, NFE_MISC1, val);
sys/dev/nfe/if_nfe.c
1009
uint32_t val;
sys/dev/nfe/if_nfe.c
1036
val = NFE_READ(sc, NFE_PHY_DATA);
sys/dev/nfe/if_nfe.c
1037
if (val != 0xffffffff && val != 0)
sys/dev/nfe/if_nfe.c
1040
DPRINTFN(sc, 2, "mii read phy %d reg 0x%x ret 0x%x\n", phy, reg, val);
sys/dev/nfe/if_nfe.c
1042
return (val);
sys/dev/nfe/if_nfe.c
1046
nfe_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/nfe/if_nfe.c
1059
NFE_WRITE(sc, NFE_PHY_DATA, val);
sys/dev/nfe/if_nfe.c
2686
uint32_t val;
sys/dev/nfe/if_nfe.c
2712
val = 0;
sys/dev/nfe/if_nfe.c
2714
val |= NFE_MAC_ADDR_INORDER;
sys/dev/nfe/if_nfe.c
2715
NFE_WRITE(sc, NFE_TX_UNK, val);
sys/dev/nfe/if_nfe.c
2768
val = NFE_READ(sc, NFE_PWR_STATE);
sys/dev/nfe/if_nfe.c
2769
if ((val & NFE_PWR_WAKEUP) == 0)
sys/dev/nfe/if_nfe.c
2770
NFE_WRITE(sc, NFE_PWR_STATE, val | NFE_PWR_WAKEUP);
sys/dev/nfe/if_nfe.c
2772
val = NFE_READ(sc, NFE_PWR_STATE);
sys/dev/nfe/if_nfe.c
2773
NFE_WRITE(sc, NFE_PWR_STATE, val | NFE_PWR_VALID);
sys/dev/nfe/if_nfe.c
2965
uint32_t val;
sys/dev/nfe/if_nfe.c
2968
val = NFE_READ(sc, NFE_MACADDR_LO);
sys/dev/nfe/if_nfe.c
2969
addr[0] = (val >> 8) & 0xff;
sys/dev/nfe/if_nfe.c
2970
addr[1] = (val & 0xff);
sys/dev/nfe/if_nfe.c
2972
val = NFE_READ(sc, NFE_MACADDR_HI);
sys/dev/nfe/if_nfe.c
2973
addr[2] = (val >> 24) & 0xff;
sys/dev/nfe/if_nfe.c
2974
addr[3] = (val >> 16) & 0xff;
sys/dev/nfe/if_nfe.c
2975
addr[4] = (val >> 8) & 0xff;
sys/dev/nfe/if_nfe.c
2976
addr[5] = (val & 0xff);
sys/dev/nfe/if_nfe.c
2978
val = NFE_READ(sc, NFE_MACADDR_LO);
sys/dev/nfe/if_nfe.c
2979
addr[5] = (val >> 8) & 0xff;
sys/dev/nfe/if_nfe.c
2980
addr[4] = (val & 0xff);
sys/dev/nfe/if_nfe.c
2982
val = NFE_READ(sc, NFE_MACADDR_HI);
sys/dev/nfe/if_nfe.c
2983
addr[3] = (val >> 24) & 0xff;
sys/dev/nfe/if_nfe.c
2984
addr[2] = (val >> 16) & 0xff;
sys/dev/nfe/if_nfe.c
2985
addr[1] = (val >> 8) & 0xff;
sys/dev/nfe/if_nfe.c
2986
addr[0] = (val & 0xff);
sys/dev/nfe/if_nfe.c
917
uint32_t val;
sys/dev/nfe/if_nfe.c
954
val = NFE_R1_MAGIC_1000;
sys/dev/nfe/if_nfe.c
956
val = NFE_R1_MAGIC_10_100;
sys/dev/nfe/if_nfe.c
958
val = NFE_R1_MAGIC_DEFAULT;
sys/dev/nfe/if_nfe.c
959
NFE_WRITE(sc, NFE_SETUP_R1, val);
sys/dev/nfe/if_nfe.c
969
val = NFE_READ(sc, NFE_RXFILTER);
sys/dev/nfe/if_nfe.c
972
val |= NFE_PFF_RX_PAUSE;
sys/dev/nfe/if_nfe.c
974
val &= ~NFE_PFF_RX_PAUSE;
sys/dev/nfe/if_nfe.c
975
NFE_WRITE(sc, NFE_RXFILTER, val);
sys/dev/nfe/if_nfe.c
977
val = NFE_READ(sc, NFE_MISC1);
sys/dev/nfe/if_nfe.c
982
val |= NFE_MISC1_TX_PAUSE;
sys/dev/nfe/if_nfe.c
984
val &= ~NFE_MISC1_TX_PAUSE;
sys/dev/nfe/if_nfe.c
988
NFE_WRITE(sc, NFE_MISC1, val);
sys/dev/nfe/if_nfe.c
992
val = NFE_READ(sc, NFE_RXFILTER);
sys/dev/nfe/if_nfe.c
993
val &= ~NFE_PFF_RX_PAUSE;
sys/dev/nfe/if_nfe.c
994
NFE_WRITE(sc, NFE_RXFILTER, val);
sys/dev/nfe/if_nfe.c
998
val = NFE_READ(sc, NFE_MISC1);
sys/dev/nfe/if_nfe.c
999
val &= ~NFE_MISC1_TX_PAUSE;
sys/dev/nfe/if_nfereg.h
291
#define NFE_WRITE(sc, reg, val) \
sys/dev/nfe/if_nfereg.h
292
bus_write_4((sc)->nfe_res[0], (reg), (val))
sys/dev/nge/if_nge.c
384
uint32_t val;
sys/dev/nge/if_nge.c
388
val = CSR_READ_4(sc, NGE_MEAR);
sys/dev/nge/if_nge.c
392
return (val);
sys/dev/nge/if_nge.c
399
nge_mii_bitbang_write(device_t dev, uint32_t val)
sys/dev/nge/if_nge.c
405
CSR_WRITE_4(sc, NGE_MEAR, val);
sys/dev/nge/if_ngereg.h
673
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/nge/if_ngereg.h
674
bus_write_4((sc)->nge_res, reg, val)
sys/dev/ntb/ntb.c
443
ntb_spad_write(device_t ntb, unsigned int idx, uint32_t val)
sys/dev/ntb/ntb.c
447
return (NTB_SPAD_WRITE(device_get_parent(ntb), idx + nc->spadoff, val));
sys/dev/ntb/ntb.c
451
ntb_spad_read(device_t ntb, unsigned int idx, uint32_t *val)
sys/dev/ntb/ntb.c
455
return (NTB_SPAD_READ(device_get_parent(ntb), idx + nc->spadoff, val));
sys/dev/ntb/ntb.c
459
ntb_peer_spad_write(device_t ntb, unsigned int idx, uint32_t val)
sys/dev/ntb/ntb.c
464
val));
sys/dev/ntb/ntb.c
468
ntb_peer_spad_read(device_t ntb, unsigned int idx, uint32_t *val)
sys/dev/ntb/ntb.c
473
val));
sys/dev/ntb/ntb.h
300
int ntb_spad_write(device_t ntb, unsigned int idx, uint32_t val);
sys/dev/ntb/ntb.h
313
int ntb_spad_read(device_t ntb, unsigned int idx, uint32_t *val);
sys/dev/ntb/ntb.h
326
int ntb_peer_spad_write(device_t ntb, unsigned int idx, uint32_t val);
sys/dev/ntb/ntb.h
339
int ntb_peer_spad_read(device_t ntb, unsigned int idx, uint32_t *val);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
145
bus_size_t offset, uint64_t val)
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
148
bus_space_write_4(tag, handle, offset, val);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
149
bus_space_write_4(tag, handle, offset + 4, val >> 32);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
605
amd_ntb_spad_read(device_t dev, unsigned int idx, uint32_t *val)
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
616
*val = amd_ntb_reg_read(4, AMD_SPAD_OFFSET + offset);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
617
amd_ntb_printf(2, "%s: offset 0x%x val 0x%x\n", __func__, offset, *val);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
623
amd_ntb_spad_write(device_t dev, unsigned int idx, uint32_t val)
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
634
amd_ntb_reg_write(4, AMD_SPAD_OFFSET + offset, val);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
635
amd_ntb_printf(2, "%s: offset 0x%x val 0x%x\n", __func__, offset, val);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
650
amd_ntb_peer_spad_read(device_t dev, unsigned int idx, uint32_t *val)
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
661
*val = amd_ntb_reg_read(4, AMD_SPAD_OFFSET + offset);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
662
amd_ntb_printf(2, "%s: offset 0x%x val 0x%x\n", __func__, offset, *val);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
668
amd_ntb_peer_spad_write(device_t dev, unsigned int idx, uint32_t val)
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
679
amd_ntb_reg_write(4, AMD_SPAD_OFFSET + offset, val);
sys/dev/ntb/ntb_hw/ntb_hw_amd.c
680
amd_ntb_printf(2, "%s: offset 0x%x val 0x%x\n", __func__, offset, val);
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
71
#define amd_ntb_bar_write(SIZE, bar, offset, val) \
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
73
ntb->bar_info[(bar)].pci_bus_handle, (offset), (val))
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
76
#define amd_ntb_reg_write(SIZE, offset, val) \
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
77
amd_ntb_bar_write(SIZE, NTB_CONFIG_BAR, offset, val)
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
80
#define amd_ntb_peer_reg_write(SIZE, offset, val) \
sys/dev/ntb/ntb_hw/ntb_hw_amd.h
81
amd_ntb_bar_write(SIZE, NTB_CONFIG_BAR, offset + AMD_PEER_OFFSET, val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
1423
db_iowrite(struct ntb_softc *ntb, uint64_t regoff, uint64_t val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
1426
KASSERT((val & ~ntb->db_valid_mask) == 0,
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
1428
(uintmax_t)(val & ~ntb->db_valid_mask),
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
1433
db_iowrite_raw(ntb, regoff, val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
1437
db_iowrite_raw(struct ntb_softc *ntb, uint64_t regoff, uint64_t val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
1444
intel_ntb_reg_write(8, regoff, val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
1447
intel_ntb_reg_write(2, regoff, (uint16_t)val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
2865
bool val;
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
2869
val = intel_ntb_atom_poll_link(ntb);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
287
bus_size_t offset, uint64_t val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
2872
val = intel_ntb_xeon_gen4_poll_link(ntb);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
2875
val = intel_ntb_xeon_gen1_poll_link(ntb);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
2878
return (val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
290
bus_space_write_4(tag, handle, offset, val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
291
bus_space_write_4(tag, handle, offset + 4, val >> 32);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
298
#define intel_ntb_bar_write(SIZE, bar, offset, val) \
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
300
ntb->bar_info[(bar)].pci_bus_handle, (offset), (val))
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
303
#define intel_ntb_reg_write(SIZE, offset, val) \
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
304
intel_ntb_bar_write(SIZE, NTB_CONFIG_BAR, offset, val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
308
#define intel_ntb_mw_write(SIZE, offset, val) \
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
310
offset, val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
323
static int intel_ntb_spad_read(device_t dev, unsigned int idx, uint32_t *val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
324
static int intel_ntb_peer_spad_write(device_t dev, unsigned int idx, uint32_t val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3387
uint32_t val;
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3412
intel_ntb_spad_read(ntb->device, NTB_MSIX_GUARD, &val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3413
if (val != NTB_MSIX_VER_GUARD)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3417
intel_ntb_spad_read(ntb->device, NTB_MSIX_DATA0 + i, &val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3418
intel_ntb_printf(2, "remote MSIX data(%u): 0x%x\n", i, val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3419
ntb->peer_msix_data[i].nmd_data = val;
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3420
intel_ntb_spad_read(ntb->device, NTB_MSIX_OFS0 + i, &val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3421
intel_ntb_printf(2, "remote MSIX addr(%u): 0x%x\n", i, val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3422
ntb->peer_msix_data[i].nmd_ofs = val;
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3429
intel_ntb_spad_read(ntb->device, NTB_MSIX_DONE, &val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3430
if (val != NTB_MSIX_RECEIVED)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3480
intel_ntb_spad_write(device_t dev, unsigned int idx, uint32_t val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3487
intel_ntb_reg_write(4, ntb->self_reg->spad + idx * 4, val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3506
intel_ntb_spad_read(device_t dev, unsigned int idx, uint32_t *val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3513
*val = intel_ntb_reg_read(4, ntb->self_reg->spad + idx * 4);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3519
intel_ntb_peer_spad_write(device_t dev, unsigned int idx, uint32_t val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3527
intel_ntb_mw_write(4, XEON_SPAD_OFFSET + idx * 4, val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3529
intel_ntb_reg_write(4, ntb->peer_reg->spad + idx * 4, val);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3535
intel_ntb_peer_spad_read(device_t dev, unsigned int idx, uint32_t *val)
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3543
*val = intel_ntb_mw_read(4, XEON_SPAD_OFFSET + idx * 4);
sys/dev/ntb/ntb_hw/ntb_hw_intel.c
3545
*val = intel_ntb_reg_read(4, ntb->peer_reg->spad + idx * 4);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
122
#define NTX_WRITE(sc, reg, val) \
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
123
bus_write_4((sc)->conf_res, PLX_NTX_OUR_BASE(sc) + (reg), (val))
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
128
#define PNTX_WRITE(sc, reg, val) \
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
129
bus_write_4((sc)->conf_res, PLX_NTX_PEER_BASE(sc) + (reg), (val))
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
135
#define BNTX_WRITE(sc, reg, val) \
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
137
PLX_NTX_BASE(sc) + (reg), (val))
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
176
uint32_t val;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
188
val = 0x20000000 * mw->mw_bar;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
189
PNTX_WRITE(sc, PCIR_BAR(0), val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
200
val = 0x20000000 * mw->mw_bar;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
201
NTX_WRITE(sc, 0xc3c + (mw->mw_bar - 2) * 4, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
223
val = (NTX_READ(sc, 0xc90) << 16) | 0x00010001;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
224
NTX_WRITE(sc, sc->link ? 0xdb4 : 0xd94, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
244
uint32_t val;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
251
val = NTX_READ(sc, 0xfe0);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
252
if (val == 0)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
254
NTX_WRITE(sc, 0xfe0, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
255
if (val & 1)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
257
if (val & 2)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
259
if (val & 4) {
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
264
if (val & 8)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
324
uint32_t val;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
329
val = pci_read_config(dev, 0xc8c, 4);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
330
sc->ntx = (val & 1) != 0;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
331
sc->link = (val & 0x80000000) != 0;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
349
val = bus_read_4(sc->conf_res, 0x360);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
350
sc->port = (val >> ((sc->ntx == 0) ? 8 : 16)) & 0x1f;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
353
val >>= 30;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
354
sc->alut = (val == 0x3) ? 1 : ((val & (1 << sc->ntx)) ? 2 : 0);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
376
val = pci_read_config(dev, PCIR_BAR(mw->mw_bar), 4);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
377
if ((val & PCIM_BAR_MEM_TYPE) == PCIM_BAR_MEM_64) {
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
557
uint32_t reg, val;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
566
val = bus_read_4(sc->conf_res, reg);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
567
if ((val & (1 << (sc->port & 7))) == 0) {
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
572
val &= ~(1 << (sc->port & 7));
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
573
bus_write_4(sc->conf_res, reg, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
581
uint32_t reg, val;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
588
val = bus_read_4(sc->conf_res, reg);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
589
val |= (1 << (sc->port & 7));
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
590
bus_write_4(sc->conf_res, reg, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
598
uint32_t reg, val;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
605
val = bus_read_4(sc->conf_res, reg);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
606
return ((val & (1 << (sc->port & 7))) == 0);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
711
uint32_t val;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
750
val = 0;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
752
val = (~(bsize - 1) & ~0xfffff);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
753
PNTX_WRITE(sc, 0xe8 + (mw->mw_bar - 2) * 4, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
778
val = sc->link ? 0 : 1;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
780
val += 2 * sc->ntx;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
781
val *= 0x1000 * sc->alut;
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
782
val += 0x38000 + i * 4 + (i >= 128 ? 0x0e00 : 0);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
783
bus_write_4(sc->conf_res, val, eaddr);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
784
bus_write_4(sc->conf_res, val + 0x400, eaddr >> 32);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
785
bus_write_4(sc->conf_res, val + 0x800,
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
879
ntb_plx_spad_write(device_t dev, unsigned int idx, uint32_t val)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
889
bus_write_4(sc->conf_res, off, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
899
bus_write_4(sc->conf_res, off, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
900
if (bus_read_4(sc->conf_res, off) == val)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
922
ntb_plx_spad_read(device_t dev, unsigned int idx, uint32_t *val)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
934
*val = bus_read_4(sc->conf_res, off);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
939
ntb_plx_peer_spad_write(device_t dev, unsigned int idx, uint32_t val)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
952
bus_write_4(sc->mw_info[sc->b2b_mw].mw_res, off, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
954
bus_write_4(sc->conf_res, off, val);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
959
ntb_plx_peer_spad_read(device_t dev, unsigned int idx, uint32_t *val)
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
972
*val = bus_read_4(sc->mw_info[sc->b2b_mw].mw_res, off);
sys/dev/ntb/ntb_hw/ntb_hw_plx.c
974
*val = bus_read_4(sc->conf_res, off);
sys/dev/ntb/ntb_transport.c
1137
uint32_t val;
sys/dev/ntb/ntb_transport.c
1166
val = 0;
sys/dev/ntb/ntb_transport.c
1168
ntb_spad_read(dev, NTBTC_PARAMS, &val);
sys/dev/ntb/ntb_transport.c
1169
if (val != ((nt->qp_count << 24) | (nt->mw_count << 16) |
sys/dev/ntb/ntb_transport.c
1173
ntb_spad_read(dev, NTBT_VERSION, &val);
sys/dev/ntb/ntb_transport.c
1174
if (val != NTB_TRANSPORT_VERSION)
sys/dev/ntb/ntb_transport.c
1177
ntb_spad_read(dev, NTBT_NUM_QPS, &val);
sys/dev/ntb/ntb_transport.c
1178
if (val != nt->qp_count)
sys/dev/ntb/ntb_transport.c
1181
ntb_spad_read(dev, NTBT_NUM_MWS, &val);
sys/dev/ntb/ntb_transport.c
1182
if (val != nt->mw_count)
sys/dev/ntb/ntb_transport.c
1188
ntb_spad_read(dev, NTBTC_MW0_SZ + i, &val);
sys/dev/ntb/ntb_transport.c
1189
val64 = val;
sys/dev/ntb/ntb_transport.c
1191
ntb_spad_read(dev, NTBT_MW0_SZ_HIGH + (i * 2), &val);
sys/dev/ntb/ntb_transport.c
1192
val64 = (uint64_t)val << 32;
sys/dev/ntb/ntb_transport.c
1194
ntb_spad_read(dev, NTBT_MW0_SZ_LOW + (i * 2), &val);
sys/dev/ntb/ntb_transport.c
1195
val64 |= val;
sys/dev/ntb/ntb_transport.c
1382
uint32_t val;
sys/dev/ntb/ntb_transport.c
1385
for (i = 0, val = 0; i < nt->qp_count; i++) {
sys/dev/ntb/ntb_transport.c
1387
val |= (1 << i);
sys/dev/ntb/ntb_transport.c
1389
ntb_peer_spad_write(dev, NTBT_QP_LINKS, val);
sys/dev/ntb/ntb_transport.c
1392
ntb_spad_read(dev, NTBT_QP_LINKS, &val);
sys/dev/ntb/ntb_transport.c
1393
if ((val & (1ull << qp->qp_num)) != 0) {
sys/dev/ntb/ntb_transport.c
1490
uint32_t val;
sys/dev/ntb/ntb_transport.c
1493
for (i = 0, val = 0; i < nt->qp_count; i++) {
sys/dev/ntb/ntb_transport.c
1495
val |= (1 << i);
sys/dev/ntb/ntb_transport.c
1497
ntb_peer_spad_write(qp->dev, NTBT_QP_LINKS, val);
sys/dev/ntb/ntb_transport.c
313
iowrite32(uint32_t val, void *addr)
sys/dev/ntb/ntb_transport.c
317
val);
sys/dev/ntb/test/ntb_tool.c
333
uint64_t val;
sys/dev/ntb/test/ntb_tool.c
335
val = ntb_link_is_up(tc->dev, NULL, NULL) & tc->link_mask;
sys/dev/ntb/test/ntb_tool.c
337
if (val == tc->link_bits) {
sys/dev/ntb/test/ntb_tool.c
382
read_out(struct sysctl_req *req, uint64_t val)
sys/dev/ntb/test/ntb_tool.c
387
snprintf(ubuf, sizeof(ubuf), "0x%jx", val);
sys/dev/ntb/test/ntb_tool.c
394
uint64_t (*fn_read)(device_t ), uint64_t val)
sys/dev/ntb/test/ntb_tool.c
397
return read_out(req, val);
sys/dev/ntb/test/ntb_tool.c
406
struct sysctl_req *req, char *ubuf, uint64_t *val, bool db_mask_sflag,
sys/dev/ntb/test/ntb_tool.c
432
if (val)
sys/dev/ntb/test/ntb_tool.c
433
*val |= bits;
sys/dev/ntb/test/ntb_tool.c
441
if (val)
sys/dev/ntb/test/ntb_tool.c
442
*val &= ~bits;
sys/dev/nvdimm/nvdimm_nfit.c
49
uint64_t val;
sys/dev/nvdimm/nvdimm_nfit.c
61
bcopy((char *)h + offset, &val, load_size);
sys/dev/nvdimm/nvdimm_nfit.c
62
val &= mask;
sys/dev/nvdimm/nvdimm_nfit.c
63
if (val == value) {
sys/dev/nvme/nvme_private.h
331
#define nvme_mmio_write_4(sc, reg, val) \
sys/dev/nvme/nvme_private.h
332
bus_write_4((sc)->resource, nvme_mmio_offsetof(reg), val)
sys/dev/nvme/nvme_private.h
334
#define nvme_mmio_write_8(sc, reg, val) \
sys/dev/nvme/nvme_private.h
337
(val) & 0xFFFFFFFF); \
sys/dev/nvme/nvme_private.h
339
((val) & 0xFFFFFFFF00000000ULL) >> 32); \
sys/dev/nvme/nvme_sysctl.c
275
uint32_t i, val = 0;
sys/dev/nvme/nvme_sysctl.c
277
int error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/nvme/nvme_sysctl.c
282
if (val != 0) {
sys/dev/nvme/nvme_sysctl.c
82
uint32_t val = 0;
sys/dev/nvme/nvme_sysctl.c
84
int error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/nvme/nvme_sysctl.c
89
if (val != 0)
sys/dev/nvmf/controller/nvmft_controller.c
109
uint32_t ioccsz, val;
sys/dev/nvmf/controller/nvmft_controller.c
111
val = nvmft_max_ioccsz(ctrlr->admin);
sys/dev/nvmf/controller/nvmft_controller.c
112
if (val != 0) {
sys/dev/nvmf/controller/nvmft_controller.c
114
if (val < ioccsz)
sys/dev/nvmf/controller/nvmft_controller.c
115
ctrlr->cdata.ioccsz = htole32(val / 16);
sys/dev/nvmf/host/nvmf.c
501
uint64_t mpsmin, val;
sys/dev/nvmf/host/nvmf.c
539
error = nvmf_read_property(sc, NVMF_PROP_VS, 4, &val);
sys/dev/nvmf/host/nvmf.c
545
sc->vs = val;
sys/dev/nvmf/host/nvmf.c
557
val = nvmf_max_xfer_size_qp(sc->io[0]);
sys/dev/nvmf/host/nvmf.c
558
if (val >= mpsmin)
sys/dev/nvmf/host/nvmf.c
560
rounddown2(val, mpsmin));
sys/dev/oce/oce_hw.c
197
uint32_t val;
sys/dev/oce/oce_hw.c
199
if (pci_find_cap(sc->dev, PCIY_PCIX, &val) == 0) {
sys/dev/oce/oce_hw.c
200
if (val != 0)
sys/dev/oce/oce_hw.c
204
if (pci_find_cap(sc->dev, PCIY_EXPRESS, &val) == 0) {
sys/dev/oce/oce_hw.c
205
if (val != 0) {
sys/dev/oce/oce_hw.c
207
pci_read_config(sc->dev, val + 0x12, 2);
sys/dev/oce/oce_hw.c
215
if (pci_find_cap(sc->dev, PCIY_MSI, &val) == 0) {
sys/dev/oce/oce_hw.c
216
if (val != 0)
sys/dev/oce/oce_hw.c
220
if (pci_find_cap(sc->dev, PCIY_MSIX, &val) == 0) {
sys/dev/oce/oce_hw.c
221
if (val != 0) {
sys/dev/oce/oce_hw.c
222
val = pci_msix_count(sc->dev);
sys/dev/oce/oce_if.c
1871
uint32_t val = 0;
sys/dev/oce/oce_if.c
1917
val |= rq->rq_id & DB_LRO_RQ_ID_MASK;
sys/dev/oce/oce_if.c
1918
val |= oce_max_rq_posts << 16;
sys/dev/oce/oce_if.c
1919
OCE_WRITE_REG32(sc, db, DB_OFFSET, val);
sys/dev/oce/oce_if.c
1929
val |= rq->rq_id & DB_LRO_RQ_ID_MASK;
sys/dev/oce/oce_if.c
1930
val |= added << 16;
sys/dev/oce/oce_if.c
1931
OCE_WRITE_REG32(sc, db, DB_OFFSET, val);
sys/dev/ocs_fc/ocs_hw.c
9176
(read_fcf->fcf_entry.val && !read_fcf->fcf_entry.sol)) {
sys/dev/ocs_fc/ocs_os.c
172
ocs_reg_write32(ocs_t *ocs, uint32_t rset, uint32_t off, uint32_t val)
sys/dev/ocs_fc/ocs_os.c
178
return bus_space_write_4(reg->btag, reg->bhandle, off, val);
sys/dev/ocs_fc/ocs_os.c
197
ocs_reg_write16(ocs_t *ocs, uint32_t rset, uint32_t off, uint16_t val)
sys/dev/ocs_fc/ocs_os.c
203
return bus_space_write_2(reg->btag, reg->bhandle, off, val);
sys/dev/ocs_fc/ocs_os.c
222
ocs_reg_write8(ocs_t *ocs, uint32_t rset, uint32_t off, uint8_t val)
sys/dev/ocs_fc/ocs_os.c
228
return bus_space_write_1(reg->btag, reg->bhandle, off, val);
sys/dev/ocs_fc/ocs_os.c
67
ocs_config_write8(ocs_os_handle_t os, uint32_t reg, uint8_t val)
sys/dev/ocs_fc/ocs_os.c
69
return pci_write_config(os->dev, reg, val, 1);
sys/dev/ocs_fc/ocs_os.c
73
ocs_config_write16(ocs_os_handle_t os, uint32_t reg, uint16_t val)
sys/dev/ocs_fc/ocs_os.c
75
return pci_write_config(os->dev, reg, val, 2);
sys/dev/ocs_fc/ocs_os.c
765
ocs_sem_init(ocs_sem_t *sem, int val, const char *name, ...)
sys/dev/ocs_fc/ocs_os.c
773
sema_init(&sem->sem, val, sem->name);
sys/dev/ocs_fc/ocs_os.c
79
ocs_config_write32(ocs_os_handle_t os, uint32_t reg, uint32_t val)
sys/dev/ocs_fc/ocs_os.c
81
return pci_write_config(os->dev, reg, val, 4);
sys/dev/ocs_fc/ocs_os.h
1106
extern void ocs_config_write8(ocs_os_handle_t os, uint32_t reg, uint8_t val);
sys/dev/ocs_fc/ocs_os.h
1119
extern void ocs_config_write16(ocs_os_handle_t os, uint32_t reg, uint16_t val);
sys/dev/ocs_fc/ocs_os.h
1132
extern void ocs_config_write32(ocs_os_handle_t os, uint32_t reg, uint32_t val);
sys/dev/ocs_fc/ocs_os.h
1179
extern void ocs_reg_write32(ocs_os_handle_t os, uint32_t rset, uint32_t off, uint32_t val);
sys/dev/ocs_fc/ocs_os.h
1190
extern void ocs_reg_write16(ocs_os_handle_t os, uint32_t rset, uint32_t off, uint16_t val);
sys/dev/ocs_fc/ocs_os.h
1201
extern void ocs_reg_write8(ocs_os_handle_t os, uint32_t rset, uint32_t off, uint8_t val);
sys/dev/ocs_fc/ocs_os.h
212
static inline uint32_t ocs_lg2(uint32_t val)
sys/dev/ocs_fc/ocs_os.h
221
return 31 - __builtin_clz(val);
sys/dev/ocs_fc/ocs_os.h
246
#define ocs_be32toh(val) be32toh(val)
sys/dev/ocs_fc/ocs_os.h
256
#define ocs_htobe32(val) htobe32(val)
sys/dev/ocs_fc/ocs_os.h
714
extern int ocs_sem_init(ocs_sem_t *sem, int val, const char *name, ...) __printflike(3, 4);
sys/dev/ocs_fc/ocs_pci.c
119
uint32_t val = 0;
sys/dev/ocs_fc/ocs_pci.c
122
val = pci_read_config(dev, PCIR_BAR(i), 4);
sys/dev/ocs_fc/ocs_pci.c
123
if (!PCI_BAR_MEM(val)) {
sys/dev/ocs_fc/ocs_pci.c
126
if (!(val & PCIM_BAR_MEM_BASE)) {
sys/dev/ocs_fc/ocs_pci.c
149
if (val & PCIM_BAR_MEM_64) {
sys/dev/ocs_fc/ocs_pci.c
868
uint16_t val = 0;
sys/dev/ocs_fc/ocs_pci.c
878
val = pci_read_config(ocs->dev, PCIR_STATUS, 2);
sys/dev/ocs_fc/ocs_pci.c
879
if (0xffff == val) {
sys/dev/ocs_fc/ocs_pci.c
883
if (0 == (val & PCIM_STATUS_INTR)) {
sys/dev/ocs_fc/ocs_pci.c
887
val = pci_read_config(ocs->dev, PCIR_COMMAND, 2);
sys/dev/ocs_fc/ocs_pci.c
888
val |= PCIM_CMD_INTxDIS;
sys/dev/ocs_fc/ocs_pci.c
889
pci_write_config(ocs->dev, PCIR_COMMAND, val, 2);
sys/dev/ocs_fc/ocs_scsi.c
2733
uint32_t val;
sys/dev/ocs_fc/ocs_scsi.c
2737
if (0 == ocs_hw_get(&ocs->hw, OCS_HW_MAX_SGE, &val)) {
sys/dev/ocs_fc/ocs_scsi.c
2738
return val;
sys/dev/ocs_fc/ocs_scsi.c
2749
if (0 == ocs_hw_get(&ocs->hw, OCS_HW_N_SGL, &val)) {
sys/dev/ocs_fc/ocs_scsi.c
2750
return val;
sys/dev/ocs_fc/ocs_scsi.c
2756
if (0 == ocs_hw_get(&ocs->hw, OCS_HW_DIF_CAPABLE, &val)) {
sys/dev/ocs_fc/ocs_scsi.c
2757
return val;
sys/dev/ocs_fc/ocs_scsi.c
2763
if (ocs_hw_get(&ocs->hw, OCS_HW_DIF_MULTI_SEPARATE, &val) == 0) {
sys/dev/ocs_fc/ocs_scsi.c
2764
return val;
sys/dev/ocs_fc/ocs_scsi.c
2769
if (ocs_hw_get(&ocs->hw, OCS_HW_SEND_FRAME_CAPABLE, &val) == 0) {
sys/dev/ocs_fc/ocs_scsi.c
2770
return ! val;
sys/dev/ocs_fc/sli4.c
2337
mq->val = TRUE;
sys/dev/ocs_fc/sli4.c
280
sli_reg_write(sli4_t *sli, sli4_regname_e reg, uint32_t val)
sys/dev/ocs_fc/sli4.c
289
ocs_reg_write32(sli->os, r->rset, r->off, val);
sys/dev/ocs_fc/sli4.c
300
sli_intf_valid_check(uint32_t val)
sys/dev/ocs_fc/sli4.c
302
return ((val >> SLI4_INTF_VALID_SHIFT) & SLI4_INTF_VALID_MASK) != SLI4_INTF_VALID;
sys/dev/ocs_fc/sli4.c
313
sli_intf_sli_revision(uint32_t val)
sys/dev/ocs_fc/sli4.c
315
return ((val >> SLI4_INTF_SLI_REVISION_SHIFT) & SLI4_INTF_SLI_REVISION_MASK);
sys/dev/ocs_fc/sli4.c
319
sli_intf_sli_family(uint32_t val)
sys/dev/ocs_fc/sli4.c
321
return ((val >> SLI4_INTF_SLI_FAMILY_SHIFT) & SLI4_INTF_SLI_FAMILY_MASK);
sys/dev/ocs_fc/sli4.c
3217
mcqe->val);
sys/dev/ocs_fc/sli4.c
332
sli_intf_if_type(uint32_t val)
sys/dev/ocs_fc/sli4.c
334
return ((val >> SLI4_INTF_IF_TYPE_SHIFT) & SLI4_INTF_IF_TYPE_MASK);
sys/dev/ocs_fc/sli4.c
345
sli_pci_rev_id(uint32_t val)
sys/dev/ocs_fc/sli4.c
347
return ((val >> SLI4_PCI_REV_ID_SHIFT) & SLI4_PCI_REV_ID_MASK);
sys/dev/ocs_fc/sli4.c
3488
uint32_t val = 0;
sys/dev/ocs_fc/sli4.c
3493
val = sli_iftype6_eq_doorbell(q->n_posted, q->id, FALSE);
sys/dev/ocs_fc/sli4.c
3495
val = sli_eq_doorbell(q->n_posted, q->id, FALSE);
sys/dev/ocs_fc/sli4.c
3496
ocs_reg_write32(sli4->os, q->doorbell_rset, q->doorbell_offset, val);
sys/dev/ocs_fc/sli4.c
3500
val = sli_iftype6_cq_doorbell(q->n_posted, q->id, FALSE);
sys/dev/ocs_fc/sli4.c
3502
val = sli_cq_doorbell(q->n_posted, q->id, FALSE);
sys/dev/ocs_fc/sli4.c
3503
ocs_reg_write32(sli4->os, q->doorbell_rset, q->doorbell_offset, val);
sys/dev/ocs_fc/sli4.c
3506
val = SLI4_MQ_DOORBELL(q->n_posted, q->id);
sys/dev/ocs_fc/sli4.c
3507
ocs_reg_write32(sli4->os, q->doorbell_rset, q->doorbell_offset, val);
sys/dev/ocs_fc/sli4.c
3541
val = SLI4_RQ_DOORBELL(n_posted, q->id);
sys/dev/ocs_fc/sli4.c
3542
ocs_reg_write32(sli4->os, q->doorbell_rset, q->doorbell_offset, val);
sys/dev/ocs_fc/sli4.c
3547
val = SLI4_WQ_DOORBELL(q->n_posted, 0, q->id);
sys/dev/ocs_fc/sli4.c
3550
val = SLI4_WQ_DOORBELL(q->n_posted, q->index, q->id);
sys/dev/ocs_fc/sli4.c
3553
ocs_reg_write32(sli4->os, q->doorbell_rset, q->doorbell_offset, val);
sys/dev/ocs_fc/sli4.c
358
sli_asic_gen(uint32_t val)
sys/dev/ocs_fc/sli4.c
360
return ((val >> SLI4_ASIC_GEN_SHIFT) & SLI4_ASIC_GEN_MASK);
sys/dev/ocs_fc/sli4.c
374
uint32_t val = 0;
sys/dev/ocs_fc/sli4.c
378
val = sli_reg_read(sli4, SLI4_REG_BMBX);
sys/dev/ocs_fc/sli4.c
380
} while(msec && !(val & SLI4_BMBX_RDY));
sys/dev/ocs_fc/sli4.c
382
return(!(val & SLI4_BMBX_RDY));
sys/dev/ocs_fc/sli4.c
395
uint32_t val = 0;
sys/dev/ocs_fc/sli4.c
399
val = SLI4_BMBX_WRITE_HI(sli4->bmbx.phys);
sys/dev/ocs_fc/sli4.c
400
sli_reg_write(sli4, SLI4_REG_BMBX, val);
sys/dev/ocs_fc/sli4.c
406
val = SLI4_BMBX_WRITE_LO(sli4->bmbx.phys);
sys/dev/ocs_fc/sli4.c
407
sli_reg_write(sli4, SLI4_REG_BMBX, val);
sys/dev/ocs_fc/sli4.c
4287
uint32_t val;
sys/dev/ocs_fc/sli4.c
4301
val = ocs_config_read32(sli4->os, SLI4_PCI_SOFT_RESET_CSR);
sys/dev/ocs_fc/sli4.c
4302
val |= SLI4_PCI_SOFT_RESET_MASK;
sys/dev/ocs_fc/sli4.c
4303
ocs_config_write32(sli4->os, SLI4_PCI_SOFT_RESET_CSR, val);
sys/dev/ocs_fc/sli4.c
4308
val = SLI4_PHYDEV_CONTROL_FRST;
sys/dev/ocs_fc/sli4.c
4309
sli_reg_write(sli4, SLI4_REG_PHYSDEV_CONTROL, val);
sys/dev/ocs_fc/sli4.c
5059
uint32_t val = 0;
sys/dev/ocs_fc/sli4.c
5063
val = sli_iftype6_eq_doorbell(q->n_posted, q->id, arm);
sys/dev/ocs_fc/sli4.c
5065
val = sli_eq_doorbell(q->n_posted, q->id, arm);
sys/dev/ocs_fc/sli4.c
5067
ocs_reg_write32(sli4->os, q->doorbell_rset, q->doorbell_offset, val);
sys/dev/ocs_fc/sli4.c
5087
uint32_t val = 0;
sys/dev/ocs_fc/sli4.c
5094
val = sli_iftype6_eq_doorbell(q->n_posted, q->id, arm);
sys/dev/ocs_fc/sli4.c
5096
val = sli_eq_doorbell(q->n_posted, q->id, arm);
sys/dev/ocs_fc/sli4.c
5097
ocs_reg_write32(sli4->os, q->doorbell_rset, q->doorbell_offset, val);
sys/dev/ocs_fc/sli4.c
5102
val = sli_iftype6_cq_doorbell(q->n_posted, q->id, arm);
sys/dev/ocs_fc/sli4.c
5104
val = sli_cq_doorbell(q->n_posted, q->id, arm);
sys/dev/ocs_fc/sli4.c
5105
ocs_reg_write32(sli4->os, q->doorbell_rset, q->doorbell_offset, val);
sys/dev/ocs_fc/sli4.c
534
if (((sli4_mcqe_t *)cqe)->val) {
sys/dev/ocs_fc/sli4.c
5733
uint32_t val;
sys/dev/ocs_fc/sli4.c
5748
val = sli_reg_read(sli4, SLI4_REG_SLIPORT_STATUS);
sys/dev/ocs_fc/sli4.c
5749
if (UINT32_MAX == val) {
sys/dev/ocs_fc/sli4.c
5753
return ((val & SLI4_PORT_STATUS_DIP) ? 1 : 0);
sys/dev/ocs_fc/sli4.c
5770
uint32_t val;
sys/dev/ocs_fc/sli4.c
5777
val = sli_reg_read(sli4, SLI4_REG_SLIPORT_STATUS);
sys/dev/ocs_fc/sli4.c
5778
if (UINT32_MAX == val) {
sys/dev/ocs_fc/sli4.c
5782
return ((val & SLI4_PORT_STATUS_RN) ? 1 : 0);
sys/dev/ocs_fc/sli4.c
5849
uint32_t val;
sys/dev/ocs_fc/sli4.c
5857
val = sli_reg_read(sli4, SLI4_REG_SLIPORT_SEMAPHORE);
sys/dev/ocs_fc/sli4.c
5859
SLI4_PORT_SEMAPHORE_PORT(val)) &&
sys/dev/ocs_fc/sli4.c
5860
(!SLI4_PORT_SEMAPHORE_IN_ERR(val)) ? 1 : 0);
sys/dev/ocs_fc/sli4.c
5863
val = sli_reg_read(sli4, SLI4_REG_SLIPORT_STATUS);
sys/dev/ocs_fc/sli4.c
5864
rc = (SLI4_PORT_STATUS_READY(val) ? 1 : 0);
sys/dev/ocs_fc/sli4.c
972
post_xri->val = TRUE;
sys/dev/ocs_fc/sli4.h
1807
val:1;
sys/dev/ocs_fc/sli4.h
2988
val:1; /** valid - contents of CQE are valid */
sys/dev/ocs_fc/sli4.h
3007
val:1; /** valid - contents of CQE are valid */
sys/dev/ocs_fc/sli4.h
4048
uint8_t val:1,
sys/dev/ocs_fc/sli4.h
5179
val:1; /** valid - contents of CQE are valid */
sys/dev/ocs_fc/sli4.h
5222
val:1; /** valid - contents of CQE are valid */
sys/dev/ocs_fc/sli4.h
5274
val:1; /** valid - contents of CQE are valid */
sys/dev/ocs_fc/sli4.h
758
val:1;
sys/dev/otus/if_otus.c
1304
otus_write(struct otus_softc *sc, uint32_t reg, uint32_t val)
sys/dev/otus/if_otus.c
1310
sc->write_buf[sc->write_idx].val = htole32(val);
sys/dev/otus/if_otus.c
2377
uint32_t val, *hashes = arg;
sys/dev/otus/if_otus.c
2379
val = le32dec(LLADDR(sdl) + 4);
sys/dev/otus/if_otus.c
2381
val = val & 0x0000ff00;
sys/dev/otus/if_otus.c
2382
val = val >> 8;
sys/dev/otus/if_otus.c
2385
val = val >> 2;
sys/dev/otus/if_otus.c
2386
if (val < 32)
sys/dev/otus/if_otus.c
2387
hashes[0] |= 1 << val;
sys/dev/otus/if_otus.c
2389
hashes[1] |= 1 << (val - 32);
sys/dev/otus/if_otus.c
2456
#define EXP2(val) ((1 << (val)) - 1)
sys/dev/otus/if_otus.c
2457
#define AIFS(val) ((val) * 9 + 10)
sys/dev/otus/if_otusreg.h
1055
uint32_t val;
sys/dev/ow/ow.c
172
int val = timing_ ## mode.param; \
sys/dev/ow/ow.c
174
err = sysctl_handle_int(oidp, &val, 0, req); \
sys/dev/ow/ow.c
177
if (val < timing_ ## mode ## _min.param) \
sys/dev/ow/ow.c
179
else if (val >= timing_ ## mode ## _max.param) \
sys/dev/ow/ow.c
181
timing_ ## mode.param = val; \
sys/dev/p2sb/lewisburg_gpiocm.c
200
uint32_t padreg, val;
sys/dev/p2sb/lewisburg_gpiocm.c
213
val = LBGGPIOCM_READ(sc, padreg);
sys/dev/p2sb/lewisburg_gpiocm.c
216
if (!(val & PADCFG0_GPIOTXDIS))
sys/dev/p2sb/lewisburg_gpiocm.c
217
*value = !!(val & PADCFG0_GPIOTXSTATE);
sys/dev/p2sb/lewisburg_gpiocm.c
219
*value = !!(val & PADCFG0_GPIORXSTATE);
sys/dev/p2sb/lewisburg_gpiocm.c
55
#define LBGGPIOCM_WRITE(sc, reg, val) \
sys/dev/p2sb/lewisburg_gpiocm.c
56
p2sb_port_write_4(sc->p2sb, sc->port, reg, val)
sys/dev/p2sb/p2sb.c
93
p2sb_port_write_4(device_t dev, uint8_t port, uint32_t reg, uint32_t val)
sys/dev/p2sb/p2sb.c
99
bus_write_4(sc->res, P2SB_PORT_ADDRESS(port) + reg, val);
sys/dev/p2sb/p2sb.h
8
void p2sb_port_write_4(device_t dev, uint8_t port, uint32_t reg, uint32_t val);
sys/dev/pbio/pbio.c
145
pboutb(struct pbio_softc *scp, int off, uint8_t val)
sys/dev/pbio/pbio.c
148
bus_write_1(scp->res, off, val);
sys/dev/pbio/pbio.c
157
unsigned char val;
sys/dev/pbio/pbio.c
179
val = pbinb(scp, PBIO_PORTA);
sys/dev/pbio/pbio.c
180
printf("pbio val=0x%02x (should be 0xa5)\n", val);
sys/dev/pbio/pbio.c
181
if (val != 0xa5) {
sys/dev/pbio/pbio.c
186
val = pbinb(scp, PBIO_PORTA);
sys/dev/pbio/pbio.c
187
printf("pbio val=0x%02x (should be 0x5a)\n", val);
sys/dev/pbio/pbio.c
188
if (val != 0x5a) {
sys/dev/pbio/pbio.c
318
portval(int port, struct pbio_softc *scp, char *val)
sys/dev/pbio/pbio.c
325
*val = pbinb(scp, PBIO_PORTA);
sys/dev/pbio/pbio.c
328
*val = pbinb(scp, PBIO_PORTB);
sys/dev/pbio/pbio.c
331
*val = (pbinb(scp, PBIO_PORTC) >> 4) & 0xf;
sys/dev/pbio/pbio.c
334
*val = pbinb(scp, PBIO_PORTC) & 0xf;
sys/dev/pbio/pbio.c
337
*val = 0;
sys/dev/pbio/pbio.c
341
if (*val != scp->pd[port].oldval) {
sys/dev/pbio/pbio.c
342
scp->pd[port].oldval = *val;
sys/dev/pbio/pbio.c
358
char val;
sys/dev/pbio/pbio.c
370
if ((err = portval(port, scp, &val)) != 0)
sys/dev/pbio/pbio.c
372
scp->pd[port].buff[i] = val;
sys/dev/pbio/pbio.c
386
char val, oval;
sys/dev/pbio/pbio.c
398
val = scp->pd[port].buff[i];
sys/dev/pbio/pbio.c
401
pboutb(scp, PBIO_PORTA, val);
sys/dev/pbio/pbio.c
404
pboutb(scp, PBIO_PORTB, val);
sys/dev/pbio/pbio.c
409
val <<= 4;
sys/dev/pbio/pbio.c
410
pboutb(scp, PBIO_PORTC, val | oval);
sys/dev/pbio/pbio.c
415
val &= 0xf;
sys/dev/pbio/pbio.c
416
pboutb(scp, PBIO_PORTC, oval | val);
sys/dev/pccard/pccardvar.h
166
pccard_attr_read_1(device_t dev, uint32_t offset, uint8_t *val)
sys/dev/pccard/pccardvar.h
168
return (CARD_ATTR_READ(device_get_parent(dev), dev, offset, val));
sys/dev/pccard/pccardvar.h
172
pccard_attr_write_1(device_t dev, uint32_t offset, uint8_t val)
sys/dev/pccard/pccardvar.h
174
return (CARD_ATTR_WRITE(device_get_parent(dev), dev, offset, val));
sys/dev/pccard/pccardvar.h
178
pccard_ccr_read_1(device_t dev, uint32_t offset, uint8_t *val)
sys/dev/pccard/pccardvar.h
180
return (CARD_CCR_READ(device_get_parent(dev), dev, offset, val));
sys/dev/pccard/pccardvar.h
184
pccard_ccr_write_1(device_t dev, uint32_t offset, uint8_t val)
sys/dev/pccard/pccardvar.h
186
return (CARD_CCR_WRITE(device_get_parent(dev), dev, offset, val));
sys/dev/pccbb/pccbb_pci.c
821
cbb_write_config(device_t brdev, u_int b, u_int s, u_int f, u_int reg, uint32_t val,
sys/dev/pccbb/pccbb_pci.c
828
b, s, f, reg, val, width);
sys/dev/pccbb/pccbbvar.h
145
cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val)
sys/dev/pccbb/pccbbvar.h
147
bus_space_write_4(sc->bst, sc->bsh, reg, val);
sys/dev/pci/controller/pci_n1sdp.c
304
u_int func, u_int reg, uint32_t val, int bytes)
sys/dev/pci/controller/pci_n1sdp.c
332
data |= (val & 0xff) << ((offset & 3) * 8);
sys/dev/pci/controller/pci_n1sdp.c
336
data |= (val & 0xffff) << ((offset & 3) * 8);
sys/dev/pci/controller/pci_n1sdp.c
339
data = val;
sys/dev/pci/fixup_pci.c
125
uint32_t val;
sys/dev/pci/fixup_pci.c
129
val = pci_read_config(dev, 0x6c, 4);
sys/dev/pci/fixup_pci.c
130
if (val & 0x000e0000) {
sys/dev/pci/fixup_pci.c
133
val &= ~0x000e0000;
sys/dev/pci/fixup_pci.c
134
pci_write_config(dev, 0x6c, val, 4);
sys/dev/pci/hostb_pci.c
126
uint32_t val, int width)
sys/dev/pci/hostb_pci.c
129
pci_write_config(dev, reg, val, width);
sys/dev/pci/pci.c
1010
val = REG(ptr + PCIER_FLAGS, 2);
sys/dev/pci/pci.c
1011
cfg->pcie.pcie_type = val & PCIEM_FLAGS_TYPE;
sys/dev/pci/pci.c
1091
uint32_t val;
sys/dev/pci/pci.c
1107
vrs->val = le32toh(reg);
sys/dev/pci/pci.c
1109
byte = vrs->val & 0xff;
sys/dev/pci/pci.c
1112
vrs->val = vrs->val >> 8;
sys/dev/pci/pci.c
1113
byte = vrs->val & 0xff;
sys/dev/pci/pci.c
1135
vrs->val = (vrs->val << 8) + data;
sys/dev/pci/pci.c
1464
uint16_t val;
sys/dev/pci/pci.c
1475
val = pci_read_config(child, ptr + PCIR_HT_COMMAND, 2);
sys/dev/pci/pci.c
1478
val &= 0xe000;
sys/dev/pci/pci.c
1480
val &= PCIM_HTCMD_CAP_MASK;
sys/dev/pci/pci.c
1481
if (val == capability) {
sys/dev/pci/pci.c
1505
uint16_t val;
sys/dev/pci/pci.c
1520
val = pci_read_config(child, ptr + PCIR_HT_COMMAND, 2);
sys/dev/pci/pci.c
1523
val &= 0xe000;
sys/dev/pci/pci.c
1525
val &= PCIM_HTCMD_CAP_MASK;
sys/dev/pci/pci.c
1526
if (val == capability) {
sys/dev/pci/pci.c
1741
uint32_t offset, val;
sys/dev/pci/pci.c
1745
val = bus_read_4(msix->msix_table_res, offset);
sys/dev/pci/pci.c
1746
val |= PCIM_MSIX_VCTRL_MASK;
sys/dev/pci/pci.c
1752
bus_write_4(msix->msix_table_res, offset, val);
sys/dev/pci/pci.c
1760
uint32_t offset, val;
sys/dev/pci/pci.c
1764
val = bus_read_4(msix->msix_table_res, offset);
sys/dev/pci/pci.c
1765
val &= ~PCIM_MSIX_VCTRL_MASK;
sys/dev/pci/pci.c
1771
bus_write_4(msix->msix_table_res, offset, val);
sys/dev/pci/pci.c
2258
uint16_t val;
sys/dev/pci/pci.c
2263
val = pci_read_config(dev, cap + PCIER_DEVICE_CTL, 2);
sys/dev/pci/pci.c
2264
val &= PCIEM_CTL_RELAXED_ORD_ENABLE;
sys/dev/pci/pci.c
2265
return (val != 0);
sys/dev/pci/pci.c
2273
uint16_t val;
sys/dev/pci/pci.c
2278
val = pci_read_config(dev, cap + PCIER_DEVICE_CTL, 2);
sys/dev/pci/pci.c
2279
val &= PCIEM_CTL_MAX_PAYLOAD;
sys/dev/pci/pci.c
2280
val >>= 5;
sys/dev/pci/pci.c
2281
return (1 << (val + 7));
sys/dev/pci/pci.c
2289
uint16_t val;
sys/dev/pci/pci.c
2294
val = pci_read_config(dev, cap + PCIER_DEVICE_CTL, 2);
sys/dev/pci/pci.c
2295
val &= PCIEM_CTL_MAX_READ_REQUEST;
sys/dev/pci/pci.c
2296
val >>= 12;
sys/dev/pci/pci.c
2297
return (1 << (val + 7));
sys/dev/pci/pci.c
2305
uint16_t val;
sys/dev/pci/pci.c
2315
val = pci_read_config(dev, cap + PCIER_DEVICE_CTL, 2);
sys/dev/pci/pci.c
2316
val &= ~PCIEM_CTL_MAX_READ_REQUEST;
sys/dev/pci/pci.c
2317
val |= (fls(size) - 8) << 12;
sys/dev/pci/pci.c
2318
pci_write_config(dev, cap + PCIER_DEVICE_CTL, val, 2);
sys/dev/pci/pci.c
6097
uint32_t val, int width)
sys/dev/pci/pci.c
6103
cfg->bus, cfg->slot, cfg->func, reg, val, width);
sys/dev/pci/pci.c
6162
long val;
sys/dev/pci/pci.c
6176
val = strtol(name + 3, &end, 10);
sys/dev/pci/pci.c
6177
if (val < 0 || val > INT_MAX || *end != ':')
sys/dev/pci/pci.c
6179
domain = val;
sys/dev/pci/pci.c
6180
val = strtol(end + 1, &end, 10);
sys/dev/pci/pci.c
6181
if (val < 0 || val > INT_MAX || *end != ':')
sys/dev/pci/pci.c
6183
bus = val;
sys/dev/pci/pci.c
6184
val = strtol(end + 1, &end, 10);
sys/dev/pci/pci.c
6185
if (val < 0 || val > INT_MAX)
sys/dev/pci/pci.c
6187
slot = val;
sys/dev/pci/pci.c
6189
val = strtol(end + 1, &end, 10);
sys/dev/pci/pci.c
6190
if (val < 0 || val > INT_MAX || *end != '\0')
sys/dev/pci/pci.c
6192
func = val;
sys/dev/pci/pci.c
819
uint32_t val;
sys/dev/pci/pci.c
846
val = REG(ptr, 4);
sys/dev/pci/pci.c
848
ent_size = (val & PCIM_EA_ES);
sys/dev/pci/pci.c
855
eae->eae_flags = val;
sys/dev/pci/pci.c
856
eae->eae_bei = (PCIM_EA_BEI & val) >> PCIM_EA_BEI_OFFSET;
sys/dev/pci/pci.c
893
uint32_t val;
sys/dev/pci/pci.c
931
val = REG(ptr + PCIR_HT_COMMAND, 2);
sys/dev/pci/pci.c
933
if ((val & 0xe000) == PCIM_HTCAP_SLAVE)
sys/dev/pci/pci.c
937
switch (val & PCIM_HTCMD_CAP_MASK) {
sys/dev/pci/pci.c
939
if (!(val & PCIM_HTCMD_MSI_FIXED)) {
sys/dev/pci/pci.c
956
cfg->ht.ht_msictrl = val;
sys/dev/pci/pci.c
969
val = REG(ptr + PCIR_MSIX_TABLE, 4);
sys/dev/pci/pci.c
970
cfg->msix.msix_table_bar = PCIR_BAR(val &
sys/dev/pci/pci.c
972
cfg->msix.msix_table_offset = val & ~PCIM_MSIX_BIR_MASK;
sys/dev/pci/pci.c
973
val = REG(ptr + PCIR_MSIX_PBA, 4);
sys/dev/pci/pci.c
974
cfg->msix.msix_pba_bar = PCIR_BAR(val &
sys/dev/pci/pci.c
976
cfg->msix.msix_pba_offset = val & ~PCIM_MSIX_BIR_MASK;
sys/dev/pci/pci.c
985
val = REG(ptr + PCIR_SUBVENDCAP_ID, 4);
sys/dev/pci/pci.c
986
cfg->subvendor = val & 0xffff;
sys/dev/pci/pci.c
987
cfg->subdevice = val >> 16;
sys/dev/pci/pci_dw.c
110
pci_dw_dbi_write(device_t dev, u_int reg, uint32_t val, int width)
sys/dev/pci/pci_dw.c
117
reg, val, width);
sys/dev/pci/pci_dw.c
121
bus_write_4(sc->dbi_res, reg, val);
sys/dev/pci/pci_dw.c
124
bus_write_2(sc->dbi_res, reg, val);
sys/dev/pci/pci_dw.c
127
bus_write_1(sc->dbi_res, reg, val);
sys/dev/pci/pci_dw.c
568
u_int func, u_int reg, uint32_t val, int bytes)
sys/dev/pci/pci_dw.c
597
bus_write_1(res, reg, val);
sys/dev/pci/pci_dw.c
600
bus_write_2(res, reg, val);
sys/dev/pci/pci_dw.c
603
bus_write_4(res, reg, val);
sys/dev/pci/pci_dw.c
64
#define DBI_WR1(sc, reg, val) pci_dw_dbi_wr1((sc)->dev, reg, val)
sys/dev/pci/pci_dw.c
65
#define DBI_WR2(sc, reg, val) pci_dw_dbi_wr2((sc)->dev, reg, val)
sys/dev/pci/pci_dw.c
66
#define DBI_WR4(sc, reg, val) pci_dw_dbi_wr4((sc)->dev, reg, val)
sys/dev/pci/pci_dw.c
71
#define IATU_UR_WR4(sc, reg, val) \
sys/dev/pci/pci_dw.c
72
bus_write_4((sc)->iatu_ur_res, (sc)->iatu_ur_offset + (reg), (val))
sys/dev/pci/pci_dw.h
135
pci_dw_dbi_wr4(device_t dev, u_int reg, uint32_t val)
sys/dev/pci/pci_dw.h
137
PCI_DW_DBI_WRITE(dev, reg, val, 4);
sys/dev/pci/pci_dw.h
141
pci_dw_dbi_wr2(device_t dev, u_int reg, uint16_t val)
sys/dev/pci/pci_dw.h
143
PCI_DW_DBI_WRITE(dev, reg, val, 2);
sys/dev/pci/pci_dw.h
147
pci_dw_dbi_wr1(device_t dev, u_int reg, uint8_t val)
sys/dev/pci/pci_dw.h
149
PCI_DW_DBI_WRITE(dev, reg, val, 1);
sys/dev/pci/pci_host_generic.c
334
u_int func, u_int reg, uint32_t val, int bytes)
sys/dev/pci/pci_host_generic.c
350
bus_write_1(sc->res, offset, val);
sys/dev/pci/pci_host_generic.c
353
bus_write_2(sc->res, offset, htole16(val));
sys/dev/pci/pci_host_generic.c
356
bus_write_4(sc->res, offset, htole32(val));
sys/dev/pci/pci_host_generic.c
74
u_int func, u_int reg, uint32_t val, int bytes);
sys/dev/pci/pci_host_generic_acpi.c
229
int found, val;
sys/dev/pci/pci_host_generic_acpi.c
261
status = acpi_GetInteger(handle, "_CBA", &val);
sys/dev/pci/pci_host_generic_acpi.c
263
base = val;
sys/dev/pci/pci_host_generic_den0115.c
227
u_int func, u_int reg, uint32_t val, int bytes)
sys/dev/pci/pci_host_generic_den0115.c
242
arm_smccc_invoke(SMCCC_PCI_WRITE, addr, reg, bytes, val, &result);
sys/dev/pci/pci_pci.c
1004
val |= PCIEM_SLOT_CTL_PI_ON;
sys/dev/pci/pci_pci.c
1006
val |= PCIEM_SLOT_CTL_PI_BLINK;
sys/dev/pci/pci_pci.c
1008
val |= PCIEM_SLOT_CTL_PI_OFF;
sys/dev/pci/pci_pci.c
1015
val |= PCIEM_SLOT_CTL_PC_ON;
sys/dev/pci/pci_pci.c
1017
val |= PCIEM_SLOT_CTL_PC_OFF;
sys/dev/pci/pci_pci.c
1031
val |= PCIEM_SLOT_CTL_EIC;
sys/dev/pci/pci_pci.c
1054
pcib_pcie_hotplug_command(sc, val, mask);
sys/dev/pci/pci_pci.c
1298
uint16_t mask, val;
sys/dev/pci/pci_pci.c
1325
val = PCIEM_SLOT_CTL_DLLSCE | PCIEM_SLOT_CTL_HPIE | PCIEM_SLOT_CTL_PDCE;
sys/dev/pci/pci_pci.c
1327
val |= PCIEM_SLOT_CTL_ABPE;
sys/dev/pci/pci_pci.c
1329
val |= PCIEM_SLOT_CTL_PFDE;
sys/dev/pci/pci_pci.c
1331
val |= PCIEM_SLOT_CTL_MRLSCE;
sys/dev/pci/pci_pci.c
1333
val |= PCIEM_SLOT_CTL_CCIE;
sys/dev/pci/pci_pci.c
1338
val |= PCIEM_SLOT_CTL_AI_OFF;
sys/dev/pci/pci_pci.c
1341
pcib_pcie_hotplug_update(sc, val, mask, false);
sys/dev/pci/pci_pci.c
1347
uint16_t mask, val;
sys/dev/pci/pci_pci.c
1369
val = 0;
sys/dev/pci/pci_pci.c
1374
val |= PCIEM_SLOT_CTL_AI_OFF;
sys/dev/pci/pci_pci.c
1377
pcib_pcie_hotplug_update(sc, val, mask, false);
sys/dev/pci/pci_pci.c
210
uint32_t val;
sys/dev/pci/pci_pci.c
214
val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
sys/dev/pci/pci_pci.c
215
if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
sys/dev/pci/pci_pci.c
231
val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
sys/dev/pci/pci_pci.c
232
if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
sys/dev/pci/pci_pci.c
2377
uint16_t val;
sys/dev/pci/pci_pci.c
2384
val = pci_read_config(dev, pcie_pos + PCIER_FLAGS, 2);
sys/dev/pci/pci_pci.c
2385
val &= PCIEM_FLAGS_TYPE;
sys/dev/pci/pci_pci.c
2386
if (val == PCIEM_TYPE_ROOT_PORT ||
sys/dev/pci/pci_pci.c
2387
val == PCIEM_TYPE_DOWNSTREAM_PORT)
sys/dev/pci/pci_pci.c
2465
pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width)
sys/dev/pci/pci_pci.c
2476
reg, val, width);
sys/dev/pci/pci_pci.c
492
uint32_t val;
sys/dev/pci/pci_pci.c
501
val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
sys/dev/pci/pci_pci.c
502
if (val == 0) {
sys/dev/pci/pci_pci.c
521
if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
sys/dev/pci/pci_pci.c
523
pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
sys/dev/pci/pci_pci.c
529
sc->io.base = PCI_PPBIOBASE(0, val);
sys/dev/pci/pci_pci.c
550
val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
sys/dev/pci/pci_pci.c
551
if (val == 0) {
sys/dev/pci/pci_pci.c
570
if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
sys/dev/pci/pci_pci.c
572
pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
sys/dev/pci/pci_pci.c
578
sc->pmem.base = PCI_PPBMEMBASE(0, val);
sys/dev/pci/pci_pci.c
80
u_int f, u_int reg, uint32_t val, int width);
sys/dev/pci/pci_pci.c
891
pcib_pcie_hotplug_command(struct pcib_softc *sc, uint16_t val, uint16_t mask)
sys/dev/pci/pci_pci.c
902
new = (ctl & ~mask) | val;
sys/dev/pci/pci_pci.c
988
pcib_pcie_hotplug_update(struct pcib_softc *sc, uint16_t val, uint16_t mask,
sys/dev/pci/pcivar.h
406
pci_write_config(device_t dev, int reg, uint32_t val, int width)
sys/dev/pci/pcivar.h
408
PCI_WRITE_CONFIG(device_get_parent(dev), dev, reg, val, width);
sys/dev/pci/vga_pci.c
499
uint32_t val, int width)
sys/dev/pci/vga_pci.c
502
pci_write_config(dev, reg, val, width);
sys/dev/pms/RefTisa/sallsdk/spc/sahw.c
1811
bit32 i, val;
sys/dev/pms/RefTisa/sallsdk/spc/sahw.c
1818
val = BIT32_TO_LEBIT32(src1[i]);
sys/dev/pms/RefTisa/sallsdk/spc/sahw.c
1819
ossaHwRegWriteExt(agRoot, busBaseNumber, (dstoffset + i * 4), val);
sys/dev/pms/RefTisa/sallsdk/spc/sahw.c
2997
bit32 i, val,offset;
sys/dev/pms/RefTisa/sallsdk/spc/sahw.c
3010
val = ossaHwRegReadExt(agRoot, busBaseNumber, offset);
sys/dev/pms/RefTisa/sallsdk/spc/sahw.c
3011
*dst1 = BIT32_TO_LEBIT32(val);
sys/dev/pms/RefTisa/sat/src/smdefs.h
563
#define SM_SET_ESGL_EXTEND(val) \
sys/dev/pms/RefTisa/sat/src/smdefs.h
564
((val) = (val) | 0x80000000)
sys/dev/pms/RefTisa/sat/src/smdefs.h
566
#define SM_CLEAR_ESGL_EXTEND(val) \
sys/dev/pms/RefTisa/sat/src/smdefs.h
567
((val) = (val) & 0x7FFFFFFF)
sys/dev/pms/RefTisa/tisa/api/tiglobal.h
40
#define TIDEBUG_MSG(mask, val, format)
sys/dev/pms/RefTisa/tisa/sassata/common/tddefs.h
379
#define SET_ESGL_EXTEND(val) \
sys/dev/pms/RefTisa/tisa/sassata/common/tddefs.h
380
((val) = (val) | 0x80000000)
sys/dev/pms/RefTisa/tisa/sassata/common/tddefs.h
382
#define CLEAR_ESGL_EXTEND(val) \
sys/dev/pms/RefTisa/tisa/sassata/common/tddefs.h
383
((val) = (val) & 0x7FFFFFFF)
sys/dev/pms/RefTisa/tisa/sassata/sas/tgt/ttdglobl.h
63
#define TD_XCHG_SET_STATE(xchg, val) (xchg->state) = (val)
sys/dev/pms/freebsd/driver/common/osdebug.h
102
#define TIDEBUG_MSG(mask, val, format)
sys/dev/pms/freebsd/driver/common/osdebug.h
65
#define AG_ERROR_MSG(mask, val, format) \
sys/dev/pms/freebsd/driver/common/osdebug.h
69
if (mask >= val) \
sys/dev/pms/freebsd/driver/common/osdebug.h
77
#define TIDEBUG_MSG(mask, val, format) \
sys/dev/pms/freebsd/driver/common/osdebug.h
81
if (!val) \
sys/dev/pms/freebsd/driver/common/osdebug.h
86
if (mask >= val) \
sys/dev/pms/freebsd/driver/common/osdebug.h
91
if (mask & val) \
sys/dev/ppbus/lpbb.c
167
lpbb_setsda(device_t dev, int val)
sys/dev/ppbus/lpbb.c
172
if (val == 0)
sys/dev/ppbus/lpbb.c
180
lpbb_setscl(device_t dev, int val)
sys/dev/ppbus/lpbb.c
185
if (val == 0)
sys/dev/ppbus/pcfclock.c
79
#define AUTOFEED_CLOCK(val) \
sys/dev/ppbus/pcfclock.c
80
ctr = (ctr & ~(AUTOFEED)) ^ (val); ppb_wctr(ppbus, ctr)
sys/dev/ppbus/ppbconf.c
116
ppbus_read_ivar(device_t bus, device_t dev, int index, uintptr_t* val)
sys/dev/ppbus/ppbconf.c
122
*val = (u_long)ppb_get_mode(bus);
sys/dev/ppbus/ppbconf.c
132
ppbus_write_ivar(device_t bus, device_t dev, int index, uintptr_t val)
sys/dev/ppbus/ppbconf.c
138
ppb_set_mode(bus, val);
sys/dev/ppbus/ppi.c
547
u_int8_t *val = (u_int8_t *)data;
sys/dev/ppbus/ppi.c
552
*val = ppb_rdtr(ppbus);
sys/dev/ppbus/ppi.c
555
*val = ppb_rstr(ppbus);
sys/dev/ppbus/ppi.c
558
*val = ppb_rctr(ppbus);
sys/dev/ppbus/ppi.c
561
*val = ppb_repp_D(ppbus);
sys/dev/ppbus/ppi.c
564
*val = ppb_recr(ppbus);
sys/dev/ppbus/ppi.c
567
*val = ppb_rfifo(ppbus);
sys/dev/ppbus/ppi.c
570
ppb_wdtr(ppbus, *val);
sys/dev/ppbus/ppi.c
573
ppb_wstr(ppbus, *val);
sys/dev/ppbus/ppi.c
576
ppb_wctr(ppbus, *val);
sys/dev/ppbus/ppi.c
579
ppb_wepp_D(ppbus, *val);
sys/dev/ppbus/ppi.c
582
ppb_wecr(ppbus, *val);
sys/dev/ppbus/ppi.c
585
ppb_wfifo(ppbus, *val);
sys/dev/ppbus/ppi.c
588
*val = ppb_repp_A(ppbus);
sys/dev/ppbus/ppi.c
591
ppb_wepp_A(ppbus, *val);
sys/dev/ppc/ppc.c
1917
ppc_read_ivar(device_t bus, device_t dev, int index, uintptr_t *val)
sys/dev/ppc/ppc.c
1924
*val = (u_long)ppc->ppc_epp;
sys/dev/ppc/ppc.c
1927
*val = (uintptr_t)&ppc->ppc_lock;
sys/dev/ppc/ppc.c
1937
ppc_write_ivar(device_t bus, device_t dev, int index, uintptr_t val)
sys/dev/ppc/ppc.c
1946
if (val == 0) {
sys/dev/ppc/ppc.c
1952
ppc->ppc_intr_hook = (void *)val;
sys/dev/ppc/ppc.c
423
int ptr, pcr, val, i;
sys/dev/ppc/ppc.c
445
val = inb(idport + 1);
sys/dev/ppc/ppc.c
446
if ((val & 0xf0) == 0x10) {
sys/dev/ppc/ppc.c
448
} else if ((val & 0xf8) == 0x70) {
sys/dev/ppc/ppc.c
450
} else if ((val & 0xf8) == 0x50) {
sys/dev/ppc/ppc.c
452
} else if ((val & 0xf8) == 0x40) { /* Should be 0x30 by the
sys/dev/ppc/ppc.c
457
if (bootverbose && (val != 0xff))
sys/dev/ppc/ppc.c
458
printf("PC873xx probe at 0x%x got unknown ID 0x%x\n", idport, val);
sys/dev/ppc/ppc.c
477
val = inb(idport + 1);
sys/dev/ppc/ppc.c
478
if (!(val & PC873_PPENABLE)) {
sys/dev/ppc/ppc.c
484
val = inb(idport + 1);
sys/dev/ppc/ppc.c
486
if (pc873xx_porttab[val & 0x3] != ppc->ppc_base) {
sys/dev/ppc/ppc.c
491
val &= 0xfc;
sys/dev/ppc/ppc.c
495
val &= 0xfd;
sys/dev/ppc/ppc.c
499
val &= 0xfe;
sys/dev/ppc/ppc.c
503
val &= 0xfd;
sys/dev/ppc/ppc.c
508
outb(idport + 1, val);
sys/dev/ppc/ppc.c
509
outb(idport + 1, val);
sys/dev/ppc/ppc.c
515
val = inb(idport + 1) & 0x3;
sys/dev/ppc/ppc.c
519
if (pc873xx_porttab[val] != ppc->ppc_base) {
sys/dev/ppc/ppc.c
522
pc873xx_porttab[val], ppc->ppc_base);
sys/dev/ppc/ppc.c
534
irq = pc873xx_irqtab[val];
sys/dev/ppc/ppcvar.h
34
int ppc_read_ivar(device_t bus, device_t dev, int index, uintptr_t *val);
sys/dev/ppc/ppcvar.h
35
int ppc_write_ivar(device_t bus, device_t dev, int index, uintptr_t val);
sys/dev/proto/proto_bus_pci.c
78
uint32_t val;
sys/dev/proto/proto_bus_pci.c
88
val = pci_read_config(dev, rid, 4);
sys/dev/proto/proto_bus_pci.c
89
type = (PCI_BAR_IO(val)) ? SYS_RES_IOPORT : SYS_RES_MEMORY;
sys/dev/proto/proto_bus_pci.c
97
if ((val & PCIM_BAR_MEM_TYPE) == PCIM_BAR_MEM_64)
sys/dev/pwm/controller/allwinner/aw_pwm.c
110
#define AW_PWM_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/dev/pwm/controller/rockchip/rk_pwm.c
124
#define RK_PWM_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/dev/pwm/controller/rockchip/rk_pwm.c
51
#define SET(reg,mask,val) reg = ((reg & ~mask) | val)
sys/dev/qat/include/adf_fw_counters.h
17
char val[FW_COUNTERS_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/include/common/adf_accel_devices.h
477
#define ADF_CSR_WR(csr_base, csr_offset, val) \
sys/dev/qat/include/common/adf_accel_devices.h
478
bus_write_4(csr_base, csr_offset, val)
sys/dev/qat/include/common/adf_accel_devices.h
482
#define ADF_CSR_WR64(csr_base, csr_offset, val) \
sys/dev/qat/include/common/adf_accel_devices.h
483
bus_write_8(csr_base, csr_offset, val)
sys/dev/qat/include/common/adf_accel_devices.h
491
#define ADF_CSR_WR64(csr_base, csr_offset, val) \
sys/dev/qat/include/common/adf_accel_devices.h
492
adf_csr_wr64(csr_base, csr_offset, val)
sys/dev/qat/include/common/adf_accel_devices.h
541
unsigned int val = ADF_CSR_RD(csr, offs);
sys/dev/qat/include/common/adf_accel_devices.h
543
val &= mask;
sys/dev/qat/include/common/adf_accel_devices.h
544
ADF_CSR_WR(csr, offs, val);
sys/dev/qat/include/common/adf_accel_devices.h
550
unsigned int val = ADF_CSR_RD(csr, offs);
sys/dev/qat/include/common/adf_accel_devices.h
552
val |= mask;
sys/dev/qat/include/common/adf_accel_devices.h
553
ADF_CSR_WR(csr, offs, val);
sys/dev/qat/include/common/adf_cfg.h
15
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/include/common/adf_cfg.h
52
const void *val,
sys/dev/qat/include/common/adf_cfg_user.h
11
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/include/common/icp_qat_hal.h
145
#define SET_CAP_CSR(handle, csr, val) \
sys/dev/qat/include/common/icp_qat_hal.h
146
ADF_CSR_WR(handle->hal_misc_addr_v, CAP_CSR_ADDR(csr), val)
sys/dev/qat/include/common/icp_qat_hal.h
149
#define SET_GLB_CSR(handle, csr, val) \
sys/dev/qat/include/common/icp_qat_hal.h
153
SET_CAP_CSR((handle), (csr), (val)) : \
sys/dev/qat/include/common/icp_qat_hal.h
154
SET_CAP_CSR((handle), (csr) + GLOBAL_CSR, val); \
sys/dev/qat/include/common/icp_qat_hal.h
163
#define SET_FCU_CSR(handle, csr, val) \
sys/dev/qat/include/common/icp_qat_hal.h
167
typeof(val) val_ = (val); \
sys/dev/qat/include/common/icp_qat_hal.h
193
#define SET_AE_CSR(handle, ae, csr, val) \
sys/dev/qat/include/common/icp_qat_hal.h
194
ADF_CSR_WR(handle->hal_misc_addr_v, AE_CSR_ADDR(handle, ae, csr), val)
sys/dev/qat/include/common/icp_qat_hal.h
201
#define SET_AE_XFER(handle, ae, reg, val) \
sys/dev/qat/include/common/icp_qat_hal.h
202
ADF_CSR_WR(handle->hal_misc_addr_v, AE_XFER_ADDR(handle, ae, reg), val)
sys/dev/qat/include/common/icp_qat_hal.h
203
#define SRAM_WRITE(handle, addr, val) \
sys/dev/qat/include/common/icp_qat_hal.h
204
ADF_CSR_WR((handle)->hal_sram_addr_v, addr, val)
sys/dev/qat/include/icp_qat_fw.h
11
(((val) & (mask)) << (bitpos))); \
sys/dev/qat/include/icp_qat_fw.h
124
#define ICP_QAT_FW_COMN_OV_SRV_TYPE_SET(icp_qat_fw_comn_req_hdr_t, val) \
sys/dev/qat/include/icp_qat_fw.h
125
icp_qat_fw_comn_req_hdr_t.service_type = val
sys/dev/qat/include/icp_qat_fw.h
130
#define ICP_QAT_FW_COMN_OV_SRV_CMD_ID_SET(icp_qat_fw_comn_req_hdr_t, val) \
sys/dev/qat/include/icp_qat_fw.h
131
icp_qat_fw_comn_req_hdr_t.service_cmd_id = val
sys/dev/qat/include/icp_qat_fw.h
136
#define ICP_QAT_FW_COMN_HDR_VALID_FLAG_SET(hdr_t, val) \
sys/dev/qat/include/icp_qat_fw.h
137
ICP_QAT_FW_COMN_VALID_FLAG_SET(hdr_t, val)
sys/dev/qat/include/icp_qat_fw.h
147
#define ICP_QAT_FW_COMN_VALID_FLAG_SET(hdr_t, val) \
sys/dev/qat/include/icp_qat_fw.h
149
(val), \
sys/dev/qat/include/icp_qat_fw.h
178
#define ICP_QAT_FW_COMN_PTR_TYPE_SET(flags, val) \
sys/dev/qat/include/icp_qat_fw.h
180
val, \
sys/dev/qat/include/icp_qat_fw.h
184
#define ICP_QAT_FW_COMN_CD_FLD_TYPE_SET(flags, val) \
sys/dev/qat/include/icp_qat_fw.h
186
val, \
sys/dev/qat/include/icp_qat_fw.h
199
#define ICP_QAT_FW_COMN_NEXT_ID_SET(cd_ctrl_hdr_t, val) \
sys/dev/qat/include/icp_qat_fw.h
204
((val << ICP_QAT_FW_COMN_NEXT_ID_BITPOS) & \
sys/dev/qat/include/icp_qat_fw.h
211
#define ICP_QAT_FW_COMN_CURR_ID_SET(cd_ctrl_hdr_t, val) \
sys/dev/qat/include/icp_qat_fw.h
216
((val)&ICP_QAT_FW_COMN_CURR_ID_MASK)); \
sys/dev/qat/include/icp_qat_fw.h
8
#define QAT_FIELD_SET(flags, val, bitpos, mask) \
sys/dev/qat/include/icp_qat_fw_init_admin.h
213
#define ICP_QAT_FW_COMN_HEARTBEAT_HDR_FLAG_SET(hdr_t, val) \
sys/dev/qat/include/icp_qat_fw_init_admin.h
214
ICP_QAT_FW_COMN_HEARTBEAT_FLAG_SET(hdr_t, val)
sys/dev/qat/include/icp_qat_hw.h
148
#define ICP_QAT_HW_AUTH_COUNT_BUILD(val) \
sys/dev/qat/include/icp_qat_hw.h
149
(((val)&QAT_AUTH_COUNT_MASK) << QAT_AUTH_COUNT_BITPOS)
sys/dev/qat/include/icp_qat_hw.h
157
#define QAT_HW_ROUND_UP(val, n) (((val) + ((n)-1)) & (~(n - 1)))
sys/dev/qat/include/icp_qat_hw.h
243
uint32_t val;
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat_cipher.c
621
Cpa32U val, reserved;
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat_cipher.c
638
val = ICP_QAT_HW_CIPHER_CONFIG_BUILD(
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat_cipher.c
644
pUCSCipherConfig->val = val;
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat_cipher.c
650
pCipherConfig->val = val;
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat_hash.c
653
pCipherConfig->val = ICP_QAT_HW_CIPHER_CONFIG_BUILD(
sys/dev/qat/qat_api/common/crypto/sym/qat/lac_sym_qat_hash.c
676
pCipherConfig->val = ICP_QAT_HW_CIPHER_CONFIG_BUILD(
sys/dev/qat/qat_api/common/utils/lac_lock_free_stack.h
56
push(lock_free_stack_t *stack, lac_mem_blk_t *val)
sys/dev/qat/qat_api/common/utils/lac_lock_free_stack.h
63
val->pNext = PTR(old_top.ptr);
sys/dev/qat/qat_api/common/utils/lac_lock_free_stack.h
64
new_top.ptr = (uintptr_t)val;
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
1011
#define ICP_QAT_FW_COMN_CD_FLD_TYPE_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
1013
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
1028
#define ICP_QAT_FW_COMN_BNP_ENABLE_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
1030
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
1058
#define ICP_QAT_FW_COMN_NEXT_ID_SET(cd_ctrl_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
1062
((val << ICP_QAT_FW_COMN_NEXT_ID_BITPOS) & \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
1068
#define ICP_QAT_FW_COMN_CURR_ID_SET(cd_ctrl_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
1072
((val)&ICP_QAT_FW_COMN_CURR_ID_MASK))
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
573
#define ICP_QAT_FW_COMN_OV_SRV_TYPE_SET(icp_qat_fw_comn_req_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
574
icp_qat_fw_comn_req_hdr_t.service_type = val
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
58
#define QAT_FIELD_SET(flags, val, bitpos, mask) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
60
(((val) & (mask)) << (bitpos)))
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
602
#define ICP_QAT_FW_COMN_OV_SRV_CMD_ID_SET(icp_qat_fw_comn_req_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
603
icp_qat_fw_comn_req_hdr_t.service_cmd_id = val
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
63
#define QAT_FLAG_SET(flags, val, bitpos) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
64
((flags) = (((flags) & (~(1 << (bitpos)))) | (((val)&1) << (bitpos))))
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
662
#define ICP_QAT_FW_COMN_HDR_VALID_FLAG_SET(hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
663
ICP_QAT_FW_COMN_VALID_FLAG_SET(hdr_t, val)
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
710
#define ICP_QAT_FW_COMN_HDR_ST_BLK_FLAG_SET(hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
712
(val), \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
727
#define ICP_QAT_FW_COMN_HDR_GENERATION_FLAG_SET(hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
728
ICP_QAT_FW_COMN_GENERATION_FLAG_SET(hdr_t, val)
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
742
#define ICP_QAT_FW_COMN_GENERATION_FLAG_SET(hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
744
(val), \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
794
#define ICP_QAT_FW_COMN_VALID_FLAG_SET(hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
796
(val), \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
994
#define ICP_QAT_FW_COMN_PTR_TYPE_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw.h
996
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
730
#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
732
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
762
#define ICP_QAT_FW_COMP_PART_DECOMP_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
764
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
794
#define ICP_QAT_FW_COMP_ZEROPAD_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_comp.h
796
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1430
#define ICP_QAT_FW_HASH_FLAG_SKIP_INNER_STATE1_LOAD_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1432
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1462
#define ICP_QAT_FW_HASH_FLAG_SKIP_OUTER_STATE1_LOAD_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1464
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1511
#define ICP_QAT_FW_HASH_FLAG_AUTH_HDR_NESTED_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1513
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1528
#define ICP_QAT_FW_HASH_FLAG_SKIP_INNER_STATE1_LOAD_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1530
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1545
#define ICP_QAT_FW_HASH_FLAG_SKIP_OUTER_STATE1_LOAD_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1547
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1562
#define ICP_QAT_FW_HASH_FLAG_SNOW3G_UIA2_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1564
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1579
#define ICP_QAT_FW_HASH_FLAG_ZUC_EIA3_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1581
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1596
#define ICP_QAT_FW_HASH_FLAG_MODE2_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
1597
QAT_FIELD_SET(flags, val, QAT_FW_LA_MODE2_BITPOS, QAT_FW_LA_MODE2_MASK)
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
2237
#define ICP_QAT_FW_CIPHER_NEXT_ID_SET(cd_ctrl_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
2241
((val << ICP_QAT_FW_COMN_NEXT_ID_BITPOS) & \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
2247
#define ICP_QAT_FW_CIPHER_CURR_ID_SET(cd_ctrl_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
2251
((val)&ICP_QAT_FW_COMN_CURR_ID_MASK))
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
2259
#define ICP_QAT_FW_AUTH_NEXT_ID_SET(cd_ctrl_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
2263
((val << ICP_QAT_FW_COMN_NEXT_ID_BITPOS) & \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
2269
#define ICP_QAT_FW_AUTH_CURR_ID_SET(cd_ctrl_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
2273
((val)&ICP_QAT_FW_COMN_CURR_ID_MASK))
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
733
#define ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
735
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
751
#define ICP_QAT_FW_LA_CIPH_AUTH_CFG_OFFSET_FLAG_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
753
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
768
#define ICP_QAT_FW_LA_ZUC_3G_PROTO_FLAG_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
770
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
785
#define ICP_QAT_FW_LA_SINGLE_PASS_PROTO_FLAG_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
787
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
802
#define ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
804
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
819
#define ICP_QAT_FW_LA_PROTO_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
820
QAT_FIELD_SET(flags, val, QAT_LA_PROTO_BITPOS, QAT_LA_PROTO_MASK)
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
833
#define ICP_QAT_FW_LA_CMP_AUTH_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
835
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
850
#define ICP_QAT_FW_LA_RET_AUTH_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
852
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
867
#define ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
869
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
884
#define ICP_QAT_FW_LA_UPDATE_STATE_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
886
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
901
#define ICP_QAT_FW_LA_PARTIAL_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
902
QAT_FIELD_SET(flags, val, QAT_LA_PARTIAL_BITPOS, QAT_LA_PARTIAL_MASK)
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
915
#define ICP_QAT_FW_USE_EXTENDED_PROTOCOL_FLAGS_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
917
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
932
#define ICP_QAT_FW_LA_SLICE_TYPE_SET(flags, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_la.h
934
val, \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_pke.h
346
#define ICP_QAT_FW_PKE_RQ_VALID_FLAG_SET(icp_qat_fw_req_pke_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_pke.h
347
ICP_QAT_FW_PKE_HDR_VALID_FLAG_SET(icp_qat_fw_req_pke_hdr_t, val)
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_pke.h
378
#define ICP_QAT_FW_PKE_RESP_VALID_FLAG_SET(icp_qat_fw_resp_pke_hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_pke.h
379
ICP_QAT_FW_PKE_HDR_VALID_FLAG_SET(icp_qat_fw_resp_pke_hdr_t, val)
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_pke.h
411
#define ICP_QAT_FW_PKE_HDR_VALID_FLAG_SET(hdr_t, val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_fw_pke.h
413
(val), \
sys/dev/qat/qat_api/firmware/include/icp_qat_hw.h
1180
uint32_t val;
sys/dev/qat/qat_api/firmware/include/icp_qat_hw.h
438
#define ICP_QAT_HW_AUTH_COUNT_BUILD(val) \
sys/dev/qat/qat_api/firmware/include/icp_qat_hw.h
439
(((val)&QAT_AUTH_COUNT_MASK) << QAT_AUTH_COUNT_BITPOS)
sys/dev/qat/qat_api/firmware/include/icp_qat_hw.h
460
#define QAT_HW_ROUND_UP(val, n) (((val) + ((n)-1)) & (~(n - 1)))
sys/dev/qat/qat_api/firmware/include/icp_qat_hw.h
769
uint32_t val;
sys/dev/qat/qat_api/firmware/include/icp_qat_hw.h
786
uint32_t val;
sys/dev/qat/qat_common/adf_cfg.c
290
char *val)
sys/dev/qat/qat_common/adf_cfg.c
298
memcpy(val, keyval->val, ADF_CFG_MAX_VAL_LEN_IN_BYTES);
sys/dev/qat/qat_common/adf_cfg.c
322
const void *val,
sys/dev/qat/qat_common/adf_cfg.c
339
snprintf(key_val->val,
sys/dev/qat/qat_common/adf_cfg.c
342
(*((const long *)val)));
sys/dev/qat/qat_common/adf_cfg.c
344
strlcpy(key_val->val, (const char *)val, sizeof(key_val->val));
sys/dev/qat/qat_common/adf_cfg.c
346
snprintf(key_val->val,
sys/dev/qat/qat_common/adf_cfg.c
349
(unsigned long)val);
sys/dev/qat/qat_common/adf_cfg.c
365
if (strncmp(temp_val, key_val->val, sizeof(temp_val)) != 0) {
sys/dev/qat/qat_common/adf_cfg.c
527
const char *val,
sys/dev/qat/qat_common/adf_cfg.c
542
strlcpy(key_val->val, val, sizeof(key_val->val));
sys/dev/qat/qat_common/adf_cfg.c
564
accel_dev, section->name, ptr->key, ptr->val, ptr->type);
sys/dev/qat/qat_common/adf_cfg_device.c
1029
val = ADF_CFG_STATIC_CONF_VER;
sys/dev/qat/qat_common/adf_cfg_device.c
1032
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1034
val = ADF_CFG_STATIC_CONF_AUTO_RESET;
sys/dev/qat/qat_common/adf_cfg_device.c
1037
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1064
val = cy_au;
sys/dev/qat/qat_common/adf_cfg_device.c
1069
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1071
val = dc_au;
sys/dev/qat/qat_common/adf_cfg_device.c
1076
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1078
val = ADF_CFG_STATIC_CONF_NUM_INLINE_ACCEL_UNITS;
sys/dev/qat/qat_common/adf_cfg_device.c
1083
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1086
val = ADF_CFG_STATIC_CONF_CY_ASYM_RING_SIZE;
sys/dev/qat/qat_common/adf_cfg_device.c
1089
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1091
val = ADF_CFG_STATIC_CONF_CY_SYM_RING_SIZE;
sys/dev/qat/qat_common/adf_cfg_device.c
1094
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1096
val = ADF_CFG_STATIC_CONF_DC_INTER_BUF_SIZE;
sys/dev/qat/qat_common/adf_cfg_device.c
1099
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1101
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DC;
sys/dev/qat/qat_common/adf_cfg_device.c
1104
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1106
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DH;
sys/dev/qat/qat_common/adf_cfg_device.c
1109
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1111
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DRBG;
sys/dev/qat/qat_common/adf_cfg_device.c
1114
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1116
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_DSA;
sys/dev/qat/qat_common/adf_cfg_device.c
1119
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1121
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ECC;
sys/dev/qat/qat_common/adf_cfg_device.c
1124
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1126
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_ENABLED;
sys/dev/qat/qat_common/adf_cfg_device.c
1129
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1131
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_KEYGEN;
sys/dev/qat/qat_common/adf_cfg_device.c
1134
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1136
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_LN;
sys/dev/qat/qat_common/adf_cfg_device.c
1139
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1141
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_PRIME;
sys/dev/qat/qat_common/adf_cfg_device.c
1144
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1146
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_RSA;
sys/dev/qat/qat_common/adf_cfg_device.c
1149
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
1151
val = ADF_CFG_STATIC_CONF_SAL_STATS_CFG_SYM;
sys/dev/qat/qat_common/adf_cfg_device.c
1154
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
291
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_common/adf_cfg_device.c
300
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_common/adf_cfg_device.c
316
if (!strncmp(val,
sys/dev/qat/qat_common/adf_cfg_device.c
326
val,
sys/dev/qat/qat_common/adf_cfg_device.c
438
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_common/adf_cfg_device.c
449
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_common/adf_cfg_device.c
471
if (!strncmp(val,
sys/dev/qat/qat_common/adf_cfg_device.c
481
val,
sys/dev/qat/qat_common/adf_cfg_device.c
491
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_common/adf_cfg_device.c
498
accel_dev, ADF_GENERAL_SEC, key, val)) {
sys/dev/qat/qat_common/adf_cfg_device.c
701
unsigned long val = 0;
sys/dev/qat/qat_common/adf_cfg_device.c
736
val = cy_user_instances;
sys/dev/qat/qat_common/adf_cfg_device.c
739
accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
741
val = dc_user_instances;
sys/dev/qat/qat_common/adf_cfg_device.c
744
accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
746
val = accel_dev->cfg->num_user_processes;
sys/dev/qat/qat_common/adf_cfg_device.c
749
accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
752
val = (accel_dev->accel_id * cy_user_instances + i) % cpus;
sys/dev/qat/qat_common/adf_cfg_device.c
758
accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
760
val = ADF_CFG_STATIC_CONF_POLL;
sys/dev/qat/qat_common/adf_cfg_device.c
766
accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
778
val = (accel_dev->accel_id * dc_user_instances + i) % cpus;
sys/dev/qat/qat_common/adf_cfg_device.c
784
accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
786
val = ADF_CFG_STATIC_CONF_POLL;
sys/dev/qat/qat_common/adf_cfg_device.c
792
accel_dev, ADF_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
815
unsigned long val = 0;
sys/dev/qat/qat_common/adf_cfg_device.c
866
val = (cy_poll_instances + cy_irq_instances);
sys/dev/qat/qat_common/adf_cfg_device.c
869
accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
871
val = dc_instances;
sys/dev/qat/qat_common/adf_cfg_device.c
874
accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
877
val = (accel_dev->accel_id * cy_irq_instances + i) % cpus;
sys/dev/qat/qat_common/adf_cfg_device.c
883
accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
885
val = ADF_CFG_STATIC_CONF_IRQ;
sys/dev/qat/qat_common/adf_cfg_device.c
891
accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
904
val = (accel_dev->accel_id * cy_poll_instances + i) % cpus;
sys/dev/qat/qat_common/adf_cfg_device.c
910
accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
912
val = ADF_CFG_STATIC_CONF_POLL;
sys/dev/qat/qat_common/adf_cfg_device.c
918
accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
930
val = (accel_dev->accel_id * dc_instances + i) % cpus;
sys/dev/qat/qat_common/adf_cfg_device.c
936
accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
938
val = ADF_CFG_STATIC_CONF_POLL;
sys/dev/qat/qat_common/adf_cfg_device.c
944
accel_dev, ADF_KERNEL_SAL_SEC, key, (void *)&val, ADF_DEC);
sys/dev/qat/qat_common/adf_cfg_device.c
962
unsigned long val = 0;
sys/dev/qat/qat_common/adf_cfg_section.c
1004
free(val, M_QAT);
sys/dev/qat/qat_common/adf_cfg_section.c
139
char *val = NULL;
sys/dev/qat/qat_common/adf_cfg_section.c
142
val = malloc(ADF_CFG_MAX_VAL_LEN_IN_BYTES, M_QAT, M_WAITOK | M_ZERO);
sys/dev/qat/qat_common/adf_cfg_section.c
144
if (adf_cfg_get_param_value(accel_dev, sec, key, val))
sys/dev/qat/qat_common/adf_cfg_section.c
148
if (compat_strtoul(val, 10, value) && compat_strtoul(val, 16, value))
sys/dev/qat/qat_common/adf_cfg_section.c
153
free(val, M_QAT);
sys/dev/qat/qat_common/adf_cfg_section.c
395
unsigned long val = 0;
sys/dev/qat/qat_common/adf_cfg_section.c
417
if (!compat_strtoul(ptr->val, 10, &val))
sys/dev/qat/qat_common/adf_cfg_section.c
421
(void *)&val,
sys/dev/qat/qat_common/adf_cfg_section.c
427
(void *)ptr->val,
sys/dev/qat/qat_common/adf_cfg_section.c
430
if (!compat_strtoul(ptr->val, 16, &val))
sys/dev/qat/qat_common/adf_cfg_section.c
434
(void *)val,
sys/dev/qat/qat_common/adf_cfg_section.c
456
char *val = NULL;
sys/dev/qat/qat_common/adf_cfg_section.c
460
val = malloc(ADF_CFG_MAX_VAL_LEN_IN_BYTES, M_QAT, M_WAITOK | M_ZERO);
sys/dev/qat/qat_common/adf_cfg_section.c
463
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_common/adf_cfg_section.c
465
if ((!strncmp(val, ADF_CFG_CY, ADF_CFG_MAX_VAL_LEN_IN_BYTES)) ||
sys/dev/qat/qat_common/adf_cfg_section.c
466
(!strncmp(val, ADF_CFG_ASYM, ADF_CFG_MAX_VAL_LEN_IN_BYTES)) ||
sys/dev/qat/qat_common/adf_cfg_section.c
467
(!strncmp(val, ADF_CFG_SYM, ADF_CFG_MAX_VAL_LEN_IN_BYTES))) {
sys/dev/qat/qat_common/adf_cfg_section.c
513
if (adf_cfg_get_param_value(accel_dev, processed_sec, key, val))
sys/dev/qat/qat_common/adf_cfg_section.c
516
strlcpy(crypto_inst->name, val, sizeof(crypto_inst->name));
sys/dev/qat/qat_common/adf_cfg_section.c
564
free(val, M_QAT);
sys/dev/qat/qat_common/adf_cfg_section.c
588
char *val = NULL;
sys/dev/qat/qat_common/adf_cfg_section.c
592
val = malloc(ADF_CFG_MAX_VAL_LEN_IN_BYTES, M_QAT, M_WAITOK | M_ZERO);
sys/dev/qat/qat_common/adf_cfg_section.c
597
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_common/adf_cfg_section.c
600
if (!strncmp(val, ADF_CFG_DC, ADF_CFG_MAX_VAL_LEN_IN_BYTES)) {
sys/dev/qat/qat_common/adf_cfg_section.c
647
if (adf_cfg_get_param_value(accel_dev, processed_sec, key, val))
sys/dev/qat/qat_common/adf_cfg_section.c
650
strlcpy(dc_inst->name, val, sizeof(dc_inst->name));
sys/dev/qat/qat_common/adf_cfg_section.c
674
free(val, M_QAT);
sys/dev/qat/qat_common/adf_cfg_section.c
696
char *val = NULL;
sys/dev/qat/qat_common/adf_cfg_section.c
701
val = malloc(ADF_CFG_MAX_VAL_LEN_IN_BYTES, M_QAT, M_WAITOK | M_ZERO);
sys/dev/qat/qat_common/adf_cfg_section.c
774
free(val, M_QAT);
sys/dev/qat/qat_common/adf_cfg_section.c
829
char *val = NULL;
sys/dev/qat/qat_common/adf_cfg_section.c
833
val = malloc(ADF_CFG_MAX_VAL_LEN_IN_BYTES, M_QAT, M_WAITOK | M_ZERO);
sys/dev/qat/qat_common/adf_cfg_section.c
862
free(val, M_QAT);
sys/dev/qat/qat_common/adf_cfg_section.c
930
char *val = NULL;
sys/dev/qat/qat_common/adf_cfg_section.c
940
val = malloc(ADF_CFG_MAX_VAL_LEN_IN_BYTES, M_QAT, M_WAITOK | M_ZERO);
sys/dev/qat/qat_common/adf_ctl_drv.c
110
accel_dev, section.name, key_val.key, val)) {
sys/dev/qat/qat_common/adf_ctl_drv.c
114
if (copyout(val, user_ptr,
sys/dev/qat/qat_common/adf_ctl_drv.c
91
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = {0};
sys/dev/qat/qat_common/adf_dev_err.c
159
u32 val)
sys/dev/qat/qat_common/adf_dev_err.c
166
val);
sys/dev/qat/qat_common/adf_dev_err.c
181
u32 val;
sys/dev/qat/qat_common/adf_dev_err.c
184
val = ADF_CSR_RD(csr, adf_err_regs[i].offs);
sys/dev/qat/qat_common/adf_dev_err.c
186
adf_print_reg(accel_dev, adf_err_regs[i].name, 0, val);
sys/dev/qat/qat_common/adf_dev_err.c
196
val = adf_accel_err_regs[i].read(csr, accel);
sys/dev/qat/qat_common/adf_dev_err.c
201
val);
sys/dev/qat/qat_common/adf_freebsd_admin.c
186
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 };
sys/dev/qat/qat_common/adf_freebsd_admin.c
190
accel_dev, ADF_GENERAL_SEC, ADF_INTER_BUF_SIZE, val)) {
sys/dev/qat/qat_common/adf_freebsd_admin.c
191
if (compat_strtoul(val, 0, &ibuf_size))
sys/dev/qat/qat_common/adf_freebsd_cfg_dev_dbg.c
36
sbuf_printf(&sb, "%s = %s\n", ptr->key, ptr->val);
sys/dev/qat/qat_common/adf_freebsd_uio.c
363
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { 0 };
sys/dev/qat/qat_common/adf_freebsd_uio.c
372
accel_dev, ADF_GENERAL_SEC, ADF_FIRST_USER_BUNDLE, val)) {
sys/dev/qat/qat_common/adf_fw_counters.c
171
sbuf_printf(sbuf, "%s:%s\n", count->key, count->val);
sys/dev/qat/qat_common/adf_fw_counters.c
26
const void *val);
sys/dev/qat/qat_common/adf_fw_counters.c
322
const void *val)
sys/dev/qat/qat_common/adf_fw_counters.c
331
long tmp = *((const long *)val);
sys/dev/qat/qat_common/adf_fw_counters.c
340
snprintf(key_val->val,
sys/dev/qat/qat_common/adf_fw_counters.c
344
snprintf(key_val->val,
sys/dev/qat/qat_common/adf_gen4_hw_data.c
158
u32 val;
sys/dev/qat/qat_common/adf_gen4_hw_data.c
172
val = ADF_CSR_RD(csr, ADF_WQM_CSR_RPRESETSTS(bank_number));
sys/dev/qat/qat_common/adf_gen4_hw_data.c
173
if (val & ADF_WQM_CSR_RPRESETSTS_MASK)
sys/dev/qat/qat_common/adf_init.c
101
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC))
sys/dev/qat/qat_common/adf_init.c
105
val = hw_data->accel_capabilities_mask;
sys/dev/qat/qat_common/adf_init.c
107
accel_dev, ADF_GENERAL_SEC, key, (void *)val, ADF_HEX))
sys/dev/qat/qat_common/adf_init.c
111
val = accel_dev->accel_id;
sys/dev/qat/qat_common/adf_init.c
113
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC))
sys/dev/qat/qat_common/adf_init.c
117
val = dev_to_node(GET_DEV(accel_dev));
sys/dev/qat/qat_common/adf_init.c
119
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC))
sys/dev/qat/qat_common/adf_init.c
123
val = hw_data->num_rings_per_bank;
sys/dev/qat/qat_common/adf_init.c
125
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC))
sys/dev/qat/qat_common/adf_init.c
180
unsigned long val;
sys/dev/qat/qat_common/adf_init.c
184
val = hw_data->extended_dc_capabilities;
sys/dev/qat/qat_common/adf_init.c
186
accel_dev, ADF_GENERAL_SEC, key, (void *)val, ADF_HEX))
sys/dev/qat/qat_common/adf_init.c
89
unsigned long val;
sys/dev/qat/qat_common/adf_init.c
99
val = GET_MAX_BANKS(accel_dev);
sys/dev/qat/qat_common/adf_isr.c
141
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_common/adf_isr.c
150
if (adf_cfg_get_param_value(accel_dev, "Accelerator0", bankName, val)) {
sys/dev/qat/qat_common/adf_isr.c
155
if (compat_strtouint(val, 10, &core)) {
sys/dev/qat/qat_common/adf_transport.c
384
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_common/adf_transport.c
403
if (adf_cfg_get_param_value(accel_dev, section, ring_name, val)) {
sys/dev/qat/qat_common/adf_transport.c
410
if (compat_strtouint(val, 10, &ring_num)) {
sys/dev/qat/qat_common/qat_hal.c
1696
unsigned int val)
sys/dev/qat/qat_common/qat_hal.c
1721
SET_AE_XFER(handle, ae, reg_addr, val);
sys/dev/qat/qat_common/qat_hal.c
1725
SET_AE_XFER(handle, ae, (reg_addr + dr_offset), val);
sys/dev/qat/qat_common/qat_hal.c
1797
unsigned int val)
sys/dev/qat/qat_common/qat_hal.c
1806
stat = qat_hal_put_rel_wr_xfer(handle, ae, ctx, ICP_NEIGH_REL, nn, val);
sys/dev/qat/qat_common/qat_uclo.c
146
const unsigned int *val,
sys/dev/qat/qat_common/qat_uclo.c
150
const unsigned char *ptr = (const unsigned char *)val;
sys/dev/qat/qat_common/qat_uclo.c
170
unsigned int *val,
sys/dev/qat/qat_common/qat_uclo.c
174
unsigned char *ptr = (unsigned char *)val;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
302
unsigned int val, i;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
310
val = ADF_CSR_RD(csr, ADF_200XX_AE_CTX_ENABLES(i));
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
311
val |= ADF_200XX_ENABLE_AE_ECC_ERR;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
312
ADF_CSR_WR(csr, ADF_200XX_AE_CTX_ENABLES(i), val);
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
313
val = ADF_CSR_RD(csr, ADF_200XX_AE_MISC_CONTROL(i));
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
314
val |= ADF_200XX_ENABLE_AE_ECC_PARITY_CORR;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
315
ADF_CSR_WR(csr, ADF_200XX_AE_MISC_CONTROL(i), val);
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
323
val = ADF_CSR_RD(csr, ADF_200XX_UERRSSMSH(i));
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
324
val |= ADF_200XX_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
325
ADF_CSR_WR(csr, ADF_200XX_UERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
326
val = ADF_CSR_RD(csr, ADF_200XX_CERRSSMSH(i));
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
327
val |= ADF_200XX_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
328
ADF_CSR_WR(csr, ADF_200XX_CERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
329
val = ADF_CSR_RD(csr, ADF_PPERR(i));
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
330
val |= ADF_200XX_PPERR_EN;
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
331
ADF_CSR_WR(csr, ADF_PPERR(i), val);
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
363
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
366
if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) {
sys/dev/qat/qat_hw/qat_200xx/adf_200xx_hw_data.c
367
if (kstrtouint(val, 0, storage_enabled))
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
131
char val[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
137
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
141
if (!strncmp(val,
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
151
val);
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
379
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
390
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_hw/qat_4xxx/adf_4xxx_hw_data.c
392
cur_str = val;
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
294
char val[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
308
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
312
if (!strncmp(val,
sys/dev/qat/qat_hw/qat_4xxxvf/adf_4xxxvf_hw_data.c
322
val);
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
182
unsigned int val, i;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
190
val = ADF_CSR_RD(csr, ADF_C3XXX_AE_CTX_ENABLES(i));
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
191
val |= ADF_C3XXX_ENABLE_AE_ECC_ERR;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
192
ADF_CSR_WR(csr, ADF_C3XXX_AE_CTX_ENABLES(i), val);
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
193
val = ADF_CSR_RD(csr, ADF_C3XXX_AE_MISC_CONTROL(i));
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
194
val |= ADF_C3XXX_ENABLE_AE_ECC_PARITY_CORR;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
195
ADF_CSR_WR(csr, ADF_C3XXX_AE_MISC_CONTROL(i), val);
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
203
val = ADF_CSR_RD(csr, ADF_C3XXX_UERRSSMSH(i));
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
204
val |= ADF_C3XXX_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
205
ADF_CSR_WR(csr, ADF_C3XXX_UERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
206
val = ADF_CSR_RD(csr, ADF_C3XXX_CERRSSMSH(i));
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
207
val |= ADF_C3XXX_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
208
ADF_CSR_WR(csr, ADF_C3XXX_CERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
237
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
240
if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) {
sys/dev/qat/qat_hw/qat_c3xxx/adf_c3xxx_hw_data.c
241
if (kstrtouint(val, 0, storage_enabled))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1082
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1085
accel_dev, ADF_INLINE_SEC, ADF_INLINE_IPSEC_ALGO_GROUP, val))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1087
if (kstrtoul(val, 0, ipsec_algo_group))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1502
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1510
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1512
cur_str = val;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1650
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1654
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1656
if (compat_strtou8(val, 10, num_cy_au))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1659
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1661
if (compat_strtou8(val, 10, num_dc_au))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1665
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1667
if (compat_strtou8(val, 10, num_inline_au))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1683
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1692
if (adf_cfg_get_param_value(accel_dev, ADF_INLINE_SEC, key, val)) {
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1696
value = val;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1702
if (adf_cfg_get_param_value(accel_dev, ADF_INLINE_SEC, key, val)) {
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1706
value = val;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1780
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1787
if (adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
1789
cur_str = val;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
639
unsigned int val, i = 0;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
648
val = ADF_CSR_RD(csr, ADF_C4XXX_AE_CTX_ENABLES(i));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
649
val |= ADF_C4XXX_ENABLE_AE_ECC_ERR;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
650
ADF_CSR_WR(csr, ADF_C4XXX_AE_CTX_ENABLES(i), val);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
651
val = ADF_CSR_RD(csr, ADF_C4XXX_AE_MISC_CONTROL(i));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
652
val |= ADF_C4XXX_ENABLE_AE_ECC_PARITY_CORR;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
653
ADF_CSR_WR(csr, ADF_C4XXX_AE_MISC_CONTROL(i), val);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
661
val = ADF_CSR_RD(csr, ADF_C4XXX_UERRSSMSH(i));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
662
val |= ADF_C4XXX_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
663
ADF_CSR_WR(csr, ADF_C4XXX_UERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
664
val = ADF_CSR_RD(csr, ADF_C4XXX_CERRSSMSH(i));
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
665
val |= ADF_C4XXX_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
666
ADF_CSR_WR(csr, ADF_C4XXX_CERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
797
unsigned long val;
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
815
val = sku_dc_au[sku];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
816
if (val) {
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
829
val = sku_cy_au[sku];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
831
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
835
val = sku_dc_au[sku];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
837
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC))
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
841
val = sku_inline_au[sku];
sys/dev/qat/qat_hw/qat_c4xxx/adf_c4xxx_hw_data.c
843
accel_dev, ADF_GENERAL_SEC, key, (void *)&val, ADF_DEC))
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
186
unsigned int val, i;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
194
val = ADF_CSR_RD(csr, ADF_C62X_AE_CTX_ENABLES(i));
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
195
val |= ADF_C62X_ENABLE_AE_ECC_ERR;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
196
ADF_CSR_WR(csr, ADF_C62X_AE_CTX_ENABLES(i), val);
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
197
val = ADF_CSR_RD(csr, ADF_C62X_AE_MISC_CONTROL(i));
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
198
val |= ADF_C62X_ENABLE_AE_ECC_PARITY_CORR;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
199
ADF_CSR_WR(csr, ADF_C62X_AE_MISC_CONTROL(i), val);
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
207
val = ADF_CSR_RD(csr, ADF_C62X_UERRSSMSH(i));
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
208
val |= ADF_C62X_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
209
ADF_CSR_WR(csr, ADF_C62X_UERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
210
val = ADF_CSR_RD(csr, ADF_C62X_CERRSSMSH(i));
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
211
val |= ADF_C62X_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
212
ADF_CSR_WR(csr, ADF_C62X_CERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
241
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
244
if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) {
sys/dev/qat/qat_hw/qat_c62x/adf_c62x_hw_data.c
245
if (kstrtouint(val, 0, storage_enabled))
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
199
unsigned int val, i;
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
207
val = ADF_CSR_RD(csr, ADF_DH895XCC_AE_CTX_ENABLES(i));
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
208
val |= ADF_DH895XCC_ENABLE_AE_ECC_ERR;
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
209
ADF_CSR_WR(csr, ADF_DH895XCC_AE_CTX_ENABLES(i), val);
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
210
val = ADF_CSR_RD(csr, ADF_DH895XCC_AE_MISC_CONTROL(i));
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
211
val |= ADF_DH895XCC_ENABLE_AE_ECC_PARITY_CORR;
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
212
ADF_CSR_WR(csr, ADF_DH895XCC_AE_MISC_CONTROL(i), val);
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
220
val = ADF_CSR_RD(csr, ADF_DH895XCC_UERRSSMSH(i));
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
221
val |= ADF_DH895XCC_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
222
ADF_CSR_WR(csr, ADF_DH895XCC_UERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
223
val = ADF_CSR_RD(csr, ADF_DH895XCC_CERRSSMSH(i));
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
224
val |= ADF_DH895XCC_ERRSSMSH_EN;
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
225
ADF_CSR_WR(csr, ADF_DH895XCC_CERRSSMSH(i), val);
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
260
char val[ADF_CFG_MAX_VAL_LEN_IN_BYTES];
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
263
if (!adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, key, val)) {
sys/dev/qat/qat_hw/qat_dh895xcc/adf_dh895xcc_hw_data.c
264
if (kstrtouint(val, 0, storage_enabled))
sys/dev/qat_c2xxx/qat.c
375
uint32_t val = pci_read_config(dev, PCIR_BAR(bar), 4);
sys/dev/qat_c2xxx/qat.c
376
if (val == 0 || !PCI_BAR_MEM(val))
sys/dev/qat_c2xxx/qat.c
391
if ((val & PCIM_BAR_MEM_TYPE) == PCIM_BAR_MEM_64)
sys/dev/qat_c2xxx/qat_ae.c
1202
uint32_t val;
sys/dev/qat_c2xxx/qat_ae.c
1213
val = qat_ae_read_4(sc, ae, AE_MISC_CONTROL, &val);
sys/dev/qat_c2xxx/qat_ae.c
1214
val &= ~AE_MISC_CONTROL_SHARE_CS;
sys/dev/qat_c2xxx/qat_ae.c
1215
qat_ae_write_4(sc, ae, AE_MISC_CONTROL, val);
sys/dev/qat_c2xxx/qat_ae.c
1219
qat_ae_read_4(sc, ae, CTX_ENABLES, &val);
sys/dev/qat_c2xxx/qat_ae.c
1220
val &= CTX_ENABLES_IGNORE_W1C_MASK;
sys/dev/qat_c2xxx/qat_ae.c
1221
val |= CTX_ENABLES_NN_MODE;
sys/dev/qat_c2xxx/qat_ae.c
1222
val &= ~CTX_ENABLES_CNTL_STORE_PARITY_ENABLE;
sys/dev/qat_c2xxx/qat_ae.c
1223
qat_ae_write_4(sc, ae, CTX_ENABLES, val);
sys/dev/qat_c2xxx/qat_ae.c
740
uint32_t val, nval;
sys/dev/qat_c2xxx/qat_ae.c
742
qat_ae_read_4(sc, ae, CTX_ENABLES, &val);
sys/dev/qat_c2xxx/qat_ae.c
743
val &= CTX_ENABLES_IGNORE_W1C_MASK;
sys/dev/qat_c2xxx/qat_ae.c
746
nval = val | CTX_ENABLES_INUSE_CONTEXTS;
sys/dev/qat_c2xxx/qat_ae.c
748
nval = val & ~CTX_ENABLES_INUSE_CONTEXTS;
sys/dev/qat_c2xxx/qat_ae.c
750
if (val != nval)
sys/dev/qat_c2xxx/qat_ae.c
757
uint32_t val, nval;
sys/dev/qat_c2xxx/qat_ae.c
759
qat_ae_read_4(sc, ae, CTX_ENABLES, &val);
sys/dev/qat_c2xxx/qat_ae.c
760
val &= CTX_ENABLES_IGNORE_W1C_MASK;
sys/dev/qat_c2xxx/qat_ae.c
763
nval = val | CTX_ENABLES_NN_MODE;
sys/dev/qat_c2xxx/qat_ae.c
765
nval = val & ~CTX_ENABLES_NN_MODE;
sys/dev/qat_c2xxx/qat_ae.c
767
if (val != nval)
sys/dev/qat_c2xxx/qat_ae.c
775
uint32_t val, nval;
sys/dev/qat_c2xxx/qat_ae.c
778
qat_ae_read_4(sc, ae, CTX_ENABLES, &val);
sys/dev/qat_c2xxx/qat_ae.c
779
val &= CTX_ENABLES_IGNORE_W1C_MASK;
sys/dev/qat_c2xxx/qat_ae.c
794
nval = val | bit;
sys/dev/qat_c2xxx/qat_ae.c
796
nval = val & ~bit;
sys/dev/qat_c2xxx/qat_ae.c
798
if (val != nval)
sys/dev/qat_c2xxx/qat_ae.c
805
uint32_t val, nval;
sys/dev/qat_c2xxx/qat_ae.c
807
qat_ae_read_4(sc, ae, AE_MISC_CONTROL, &val);
sys/dev/qat_c2xxx/qat_ae.c
810
nval = val | AE_MISC_CONTROL_SHARE_CS;
sys/dev/qat_c2xxx/qat_ae.c
812
nval = val & ~AE_MISC_CONTROL_SHARE_CS;
sys/dev/qat_c2xxx/qat_ae.c
814
if (val != nval)
sys/dev/qat_c2xxx/qat_ae.c
836
uint32_t val, cs_reload;
sys/dev/qat_c2xxx/qat_ae.c
860
qat_ae_read_4(sc, ae, AE_MISC_CONTROL, &val);
sys/dev/qat_c2xxx/qat_ae.c
861
val &= ~(AE_MISC_CONTROL_ONE_CTX_RELOAD |
sys/dev/qat_c2xxx/qat_ae.c
863
val |= __SHIFTIN(cs_reload, AE_MISC_CONTROL_CS_RELOAD) |
sys/dev/qat_c2xxx/qat_ae.c
865
qat_ae_write_4(sc, ae, AE_MISC_CONTROL, val);
sys/dev/qat_c2xxx/qat_ae.c
874
uint32_t val = 0;
sys/dev/qat_c2xxx/qat_ae.c
876
error = qat_ae_read_4(sc, ae, CTX_ENABLES, &val);
sys/dev/qat_c2xxx/qat_ae.c
877
if (error || val & CTX_ENABLES_ENABLE)
sys/dev/qat_c2xxx/qat_ae.c
880
qat_ae_read_4(sc, ae, ACTIVE_CTX_STATUS, &val);
sys/dev/qat_c2xxx/qat_ae.c
881
if (val & ACTIVE_CTX_STATUS_ABO)
sys/dev/qat_c2xxx/qat_ae.c
891
uint32_t val;
sys/dev/qat_c2xxx/qat_ae.c
896
qat_ae_read_4(sc, ae, ACTIVE_CTX_STATUS, &val);
sys/dev/qat_c2xxx/qat_ae.c
897
if (val & ACTIVE_CTX_STATUS_ABO)
sys/dev/qat_c2xxx/qat_ae.c
952
uint32_t mask, val = 0;
sys/dev/qat_c2xxx/qat_ae.c
991
qat_ae_read_4(sc, ae, SIGNATURE_ENABLE, &val);
sys/dev/qat_c2xxx/qat_ae.c
992
val |= 0x1;
sys/dev/qat_c2xxx/qat_ae.c
993
qat_ae_write_4(sc, ae, SIGNATURE_ENABLE, val);
sys/dev/qat_c2xxx/qat_hw15.c
554
cipher_config->val = qat_crypto_load_cipher_session(desc, qs);
sys/dev/qat_c2xxx/qatreg.h
1469
uint32_t val; /* Cipher slice configuration */
sys/dev/qcom_clk/qcom_clk_ro_div.c
86
if (idx == sc->div_tbl[i].val) {
sys/dev/qcom_clk/qcom_clk_ro_div.h
32
uint32_t val;
sys/dev/qcom_ess_edma/qcom_ess_edma.c
506
int val = 0;
sys/dev/qcom_ess_edma/qcom_ess_edma.c
510
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/qcom_ess_edma/qcom_ess_edma.c
513
if (val == 0)
sys/dev/qcom_ess_edma/qcom_ess_edma.c
567
int val = 0;
sys/dev/qcom_ess_edma/qcom_ess_edma.c
571
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/qcom_ess_edma/qcom_ess_edma.c
574
if (val == 0)
sys/dev/qcom_ess_edma/qcom_ess_edma.c
638
int val = 0;
sys/dev/qcom_ess_edma/qcom_ess_edma.c
645
val = usec;
sys/dev/qcom_ess_edma/qcom_ess_edma.c
647
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/qcom_ess_edma/qcom_ess_edma.c
652
error = qcom_ess_edma_hw_set_tx_intr_moderation(sc, (uint32_t) val);
sys/dev/qcom_ess_edma/qcom_ess_edma_var.h
46
#define EDMA_REG_WRITE(sc, reg, val) do { \
sys/dev/qcom_ess_edma/qcom_ess_edma_var.h
47
bus_write_4(sc->sc_mem_res, (reg), (val)); \
sys/dev/qcom_gcc/qcom_gcc_clock.c
49
qcom_gcc_clock_read(device_t dev, bus_addr_t addr, uint32_t *val)
sys/dev/qcom_gcc/qcom_gcc_clock.c
54
*val = bus_read_4(sc->reg, addr);
sys/dev/qcom_gcc/qcom_gcc_clock.c
59
qcom_gcc_clock_write(device_t dev, bus_addr_t addr, uint32_t val)
sys/dev/qcom_gcc/qcom_gcc_clock.c
64
bus_write_4(sc->reg, addr, val);
sys/dev/qcom_gcc/qcom_gcc_var.h
72
uint32_t *val);
sys/dev/qcom_gcc/qcom_gcc_var.h
74
uint32_t val);
sys/dev/qcom_mdio/qcom_mdio_ipq4018_var.h
39
#define MDIO_WRITE(sc, reg, val) do { \
sys/dev/qcom_mdio/qcom_mdio_ipq4018_var.h
40
bus_write_4(sc->sc_mem_res, (reg), (val)); \
sys/dev/qcom_qup/qcom_spi.c
288
int rid, ret, i, val;
sys/dev/qcom_qup/qcom_spi.c
361
&val, sizeof(val)) > 0)
sys/dev/qcom_qup/qcom_spi.c
362
sc->config.max_frequency = val;
sys/dev/qcom_qup/qcom_spi.c
370
&val, sizeof(val)) > 0)
sys/dev/qcom_qup/qcom_spi.c
371
sc->config.cs_select = val;
sys/dev/qcom_qup/qcom_spi.c
379
&val, sizeof(val)) > 0)
sys/dev/qcom_qup/qcom_spi.c
380
sc->config.num_cs = val;
sys/dev/qcom_qup/qcom_spi_hw.c
100
sc->config.output_block_size * (2 << val);
sys/dev/qcom_qup/qcom_spi_hw.c
67
uint32_t reg, val;
sys/dev/qcom_qup/qcom_spi_hw.c
743
uint32_t *val)
sys/dev/qcom_qup/qcom_spi_hw.c
75
val = (reg >> QUP_IO_M_INPUT_BLOCK_SIZE_SHIFT)
sys/dev/qcom_qup/qcom_spi_hw.c
752
*val |= (sc->transfer.tx_buf[sc->transfer.tx_offset] & 0xff)
sys/dev/qcom_qup/qcom_spi_hw.c
77
if (val == 0)
sys/dev/qcom_qup/qcom_spi_hw.c
80
sc->config.input_block_size = val * 16;
sys/dev/qcom_qup/qcom_spi_hw.c
83
val = (reg >> QUP_IO_M_OUTPUT_BLOCK_SIZE_SHIFT)
sys/dev/qcom_qup/qcom_spi_hw.c
847
qcom_spi_hw_read_into_rx_buf(struct qcom_spi_softc *sc, uint8_t val)
sys/dev/qcom_qup/qcom_spi_hw.c
85
if (val == 0)
sys/dev/qcom_qup/qcom_spi_hw.c
856
sc->transfer.rx_buf[sc->transfer.rx_offset] = val;
sys/dev/qcom_qup/qcom_spi_hw.c
88
sc->config.output_block_size = val * 16;
sys/dev/qcom_qup/qcom_spi_hw.c
91
val = (reg >> QUP_IO_M_INPUT_FIFO_SIZE_SHIFT)
sys/dev/qcom_qup/qcom_spi_hw.c
94
sc->config.input_block_size * (2 << val);
sys/dev/qcom_qup/qcom_spi_hw.c
97
val = (reg >> QUP_IO_M_OUTPUT_FIFO_SIZE_SHIFT)
sys/dev/qcom_qup/qcom_spi_var.h
117
#define QCOM_SPI_WRITE_4(sc, reg, val) bus_write_4((sc)->sc_mem_res, \
sys/dev/qcom_qup/qcom_spi_var.h
118
(reg), (val))
sys/dev/qcom_tcsr/qcom_tcsr.c
128
&val, sizeof(val)) > 0) {
sys/dev/qcom_tcsr/qcom_tcsr.c
132
val);
sys/dev/qcom_tcsr/qcom_tcsr.c
133
QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_USB_PORT_SEL, val);
sys/dev/qcom_tcsr/qcom_tcsr.c
140
&val, sizeof(val)) > 0) {
sys/dev/qcom_tcsr/qcom_tcsr.c
144
val);
sys/dev/qcom_tcsr/qcom_tcsr.c
145
QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_USB_HSPHY_CONFIG, val);
sys/dev/qcom_tcsr/qcom_tcsr.c
152
&val, sizeof(val)) > 0) {
sys/dev/qcom_tcsr/qcom_tcsr.c
158
val);
sys/dev/qcom_tcsr/qcom_tcsr.c
161
reg |= (val & QCOM_TCSR_ESS_INTERFACE_SEL_MASK);
sys/dev/qcom_tcsr/qcom_tcsr.c
169
&val, sizeof(val)) > 0) {
sys/dev/qcom_tcsr/qcom_tcsr.c
173
val);
sys/dev/qcom_tcsr/qcom_tcsr.c
174
QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_WIFI0_GLB_CFG_OFFSET, val);
sys/dev/qcom_tcsr/qcom_tcsr.c
175
QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_WIFI1_GLB_CFG_OFFSET, val);
sys/dev/qcom_tcsr/qcom_tcsr.c
183
&val, sizeof(val)) > 0) {
sys/dev/qcom_tcsr/qcom_tcsr.c
187
val);
sys/dev/qcom_tcsr/qcom_tcsr.c
188
QCOM_TCSR_WRITE_4(sc, QCOM_TCSR_PNOC_SNOC_MEMTYPE_M0_M2, val);
sys/dev/qcom_tcsr/qcom_tcsr.c
94
uint32_t val;
sys/dev/qcom_tcsr/qcom_tcsr_var.h
32
#define QCOM_TCSR_WRITE_4(sc, reg, val) bus_write_4((sc)->sc_mem_res, \
sys/dev/qcom_tcsr/qcom_tcsr_var.h
33
(reg), (val))
sys/dev/qcom_tlmm/qcom_tlmm_ipq4018_hw.c
219
uint32_t pin, unsigned int *val)
sys/dev/qcom_tlmm/qcom_tlmm_ipq4018_hw.c
231
*val = !! (reg & QCOM_TLMM_IPQ4018_REG_PIN_IO_INPUT_STATUS);
sys/dev/qcom_tlmm/qcom_tlmm_ipq4018_hw.c
242
uint32_t pin, unsigned int *val)
sys/dev/qcom_tlmm/qcom_tlmm_ipq4018_hw.c
254
*val = !! (reg & QCOM_TLMM_IPQ4018_REG_PIN_IO_INPUT_STATUS);
sys/dev/qcom_tlmm/qcom_tlmm_ipq4018_hw.h
50
uint32_t pin, unsigned int *val);
sys/dev/qcom_tlmm/qcom_tlmm_ipq4018_hw.h
53
uint32_t pin, unsigned int *val);
sys/dev/qcom_tlmm/qcom_tlmm_pin.c
160
uint32_t ret = 0, val;
sys/dev/qcom_tlmm/qcom_tlmm_pin.c
172
ret = qcom_tlmm_ipq4018_hw_pin_get_function(sc, pin, &val);
sys/dev/qcom_tlmm/qcom_tlmm_pin.c
261
qcom_tlmm_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/dev/qcom_tlmm/qcom_tlmm_pin.c
270
ret = qcom_tlmm_ipq4018_hw_pin_get_input_value(sc, pin, val);
sys/dev/qcom_tlmm/qcom_tlmm_pin.h
42
extern int qcom_tlmm_pin_get(device_t dev, uint32_t pin, unsigned int *val);
sys/dev/qcom_tlmm/qcom_tlmm_var.h
40
#define GPIO_WRITE(sc, reg, val) do { \
sys/dev/qcom_tlmm/qcom_tlmm_var.h
41
bus_write_4(sc->gpio_mem_res, (reg), (val)); \
sys/dev/qlnx/qlnxe/bcm_osal.h
117
#define OSAL_CPU_TO_BE64(val) htobe64(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
118
#define OSAL_BE64_TO_CPU(val) be64toh(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
120
#define OSAL_CPU_TO_BE32(val) htobe32(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
121
#define OSAL_BE32_TO_CPU(val) be32toh(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
123
#define OSAL_CPU_TO_LE32(val) htole32(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
124
#define OSAL_LE32_TO_CPU(val) le32toh(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
126
#define OSAL_CPU_TO_BE16(val) htobe16(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
127
#define OSAL_BE16_TO_CPU(val) be16toh(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
129
#define OSAL_CPU_TO_LE16(val) htole16(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
130
#define OSAL_LE16_TO_CPU(val) le16toh(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
184
#define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val)
sys/dev/qlnx/qlnxe/bcm_osal.h
185
#define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val)
sys/dev/qlnx/qlnxe/bcm_osal.h
385
#define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val))
sys/dev/qlnx/qlnxe/bcm_osal.h
397
#define OSAL_LOG2(val) qlnx_log2(val)
sys/dev/qlnx/qlnxe/bcm_osal.h
446
long val;
sys/dev/qlnx/qlnxe/bcm_osal.h
452
val = *var;
sys/dev/qlnx/qlnxe/bcm_osal.h
454
if (val & bit)
sys/dev/qlnx/qlnxe/ecore.h
1069
u32 val);
sys/dev/qlnx/qlnxe/ecore.h
151
#define U64_HI(val) ((u32)(((u64)(val)) >> 32))
sys/dev/qlnx/qlnxe/ecore.h
155
#define U64_LO(val) ((u32)(((u64)(val)) & 0xffffffff))
sys/dev/qlnx/qlnxe/ecore.h
251
#define D_TRINE(val, cond1, cond2, true1, true2, def) \
sys/dev/qlnx/qlnxe/ecore.h
252
(val == (cond1) ? true1 : \
sys/dev/qlnx/qlnxe/ecore.h
253
(val == (cond2) ? true2 : def))
sys/dev/qlnx/qlnxe/ecore_cxt.c
1032
u64 p_ent_phys = (u64)p_mngr->t2[i].p_phys, val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1036
val = p_ent_phys +
sys/dev/qlnx/qlnxe/ecore_cxt.c
1038
entries[j].next = OSAL_CPU_TO_BE64(val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1042
val = (u64)p_mngr->t2[i + 1].p_phys;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1044
val = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1045
entries[j].next = OSAL_CPU_TO_BE64(val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1070
size += (ilt_clients[i].last.val -
sys/dev/qlnx/qlnxe/ecore_cxt.c
1071
ilt_clients[i].first.val + 1);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1324
p_mngr->clients[i].p_size.val = p_hwfn->p_dev->ilt_page_size;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1494
page_sz = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC].p_size.val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1505
page_sz = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUT].p_size.val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
154
u32 val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1571
offset = (ILT_PAGE_IN_BYTES(p_cli->p_size.val) *
sys/dev/qlnx/qlnxe/ecore_cxt.c
1573
p_cli->first.val)) / CDUT_SEG_ALIGNMET_IN_BYTES;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1581
offset = (ILT_PAGE_IN_BYTES(p_cli->p_size.val) *
sys/dev/qlnx/qlnxe/ecore_cxt.c
1583
p_cli->first.val)) / CDUT_SEG_ALIGNMET_IN_BYTES;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1689
ilt_clients[i].first.val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1692
ilt_clients[i].last.val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1695
ilt_clients[i].p_size.val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1717
blk_factor = OSAL_LOG2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1731
blk_factor = OSAL_LOG2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1745
blk_factor = OSAL_LOG2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10);
sys/dev/qlnx/qlnxe/ecore_cxt.c
1778
line = clients[i].first.val - p_mngr->pf_start_line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1780
clients[i].first.val * ILT_ENTRY_IN_REGS;
sys/dev/qlnx/qlnxe/ecore_cxt.c
1782
for (; line <= clients[i].last.val - p_mngr->pf_start_line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2144
hw_p_size = p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC].p_size.val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2381
p_info->waste = ILT_PAGE_IN_BYTES(p_cli->p_size.val) -
sys/dev/qlnx/qlnxe/ecore_cxt.c
2437
hw_p_size = p_cli->p_size.val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
2582
hw_p_size = p_cli->p_size.val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
456
return ILT_PAGE_IN_BYTES(p_cli->p_size.val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
497
u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val;
sys/dev/qlnx/qlnxe/ecore_cxt.c
558
u32 ilt_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
581
p_cli->first.val = *p_line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
585
p_cli->last.val = *p_line-1;
sys/dev/qlnx/qlnxe/ecore_cxt.c
589
client_id, p_cli->first.val, p_cli->last.val,
sys/dev/qlnx/qlnxe/ecore_cxt.c
607
cxts_per_p = ILT_PAGE_IN_BYTES(p_cli->p_size.val) /
sys/dev/qlnx/qlnxe/ecore_cxt.c
620
p_cli->first.val = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
621
p_cli->last.val = 0;
sys/dev/qlnx/qlnxe/ecore_cxt.c
696
p_cli->first.val = curr_line;
sys/dev/qlnx/qlnxe/ecore_cxt.c
927
ilt_page_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val);
sys/dev/qlnx/qlnxe/ecore_cxt.c
987
psz = ILT_PAGE_IN_BYTES(p_src->p_size.val);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1825
u32 val)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
1829
dev_data->grc.param_val[grc_param] = val;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
2337
ecore_wr(p_hwfn, p_ptt, base_addr + SEM_FAST_REG_FILTER_EVENT_ID, eid_filter->mask.val);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
363
#define SHR(val, val_width, amount) (((val) | ((val) << (val_width))) >> (amount)) & ((1 << (val_width)) - 1)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
373
#define SET_VAR_FIELD(var, type, field, val) var[FIELD_DWORD_OFFSET(type, field)] &= (~FIELD_BIT_MASK(type, field)); var[FIELD_DWORD_OFFSET(type, field)] |= (val) << FIELD_DWORD_SHIFT(type, field)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
5268
storm_bus->eid_filter_params.mask.val = eid_val;
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6005
u32 val)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6009
DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG, "dbg_grc_config: paramId = %d, val = %d\n", grc_param, val);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6018
if (val < s_grc_param_defs[grc_param].min ||
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6019
val > s_grc_param_defs[grc_param].max)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6028
if (!val)
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.c
6047
ecore_grc_set_param(p_hwfn, grc_param, val);
sys/dev/qlnx/qlnxe/ecore_dbg_fw_funcs.h
565
u32 val);
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1029
u16 val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1033
u8 val = !!p_hwfn->p_dcbx_info->get.dscp.enabled;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1036
rc = ecore_all_ppfids_wr(p_hwfn, p_ptt, addr, val);
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1050
val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1052
val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1053
val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1054
ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1207
u32 val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1237
val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1238
p_ets->pri_tc_tbl[0] |= val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1365
u32 val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1375
val = 0;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1377
val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1380
p_dscp_map->dscp_pri_map[i] = val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1498
u32 mb_param = 0, mcp_resp = 0, mcp_param = 0, val = 0;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1503
val = LLDP_NEAREST_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1506
val = LLDP_NEAREST_NON_TPMR_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1509
val = LLDP_NEAREST_CUSTOMER_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1516
SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_AGENT, val);
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1566
u32 addr, val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1571
val = LLDP_NEAREST_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1574
val = LLDP_NEAREST_NON_TPMR_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1577
val = LLDP_NEAREST_CUSTOMER_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1585
offsetof(struct public_port, lldp_config_params[val]);
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1622
u32 addr, val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1627
val = LLDP_NEAREST_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1630
val = LLDP_NEAREST_NON_TPMR_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1633
val = LLDP_NEAREST_CUSTOMER_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1640
SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_AGENT, val);
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1642
offsetof(struct public_port, lldp_config_params[val]);
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1780
u32 mcp_resp = 0, mcp_param = 0, addr, val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1786
val = LLDP_NEAREST_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1789
val = LLDP_NEAREST_NON_TPMR_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1792
val = LLDP_NEAREST_CUSTOMER_BRIDGE;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
1800
val << DRV_MB_PARAM_LLDP_STATS_AGENT_OFFSET,
sys/dev/qlnx/qlnxe/ecore_dcbx.c
509
u8 val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
522
val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
523
p_prio->roce_v2 = val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
563
u32 val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
570
val = GET_MFW_FIELD(p_tbl[i].entry,
sys/dev/qlnx/qlnxe/ecore_dcbx.c
572
entry->sf_ieee = val ?
sys/dev/qlnx/qlnxe/ecore_dcbx.c
751
bool val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
771
val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
sys/dev/qlnx/qlnxe/ecore_dcbx.c
773
p_operational->ieee = val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
775
val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
sys/dev/qlnx/qlnxe/ecore_dcbx.c
777
p_operational->cee = val;
sys/dev/qlnx/qlnxe/ecore_dcbx.c
779
val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
sys/dev/qlnx/qlnxe/ecore_dcbx.c
781
p_operational->local = val;
sys/dev/qlnx/qlnxe/ecore_dev.c
1530
u32 val)
sys/dev/qlnx/qlnxe/ecore_dev.c
1541
ecore_ppfid_wr(p_hwfn, p_ptt, abs_ppfid, addr, val);
sys/dev/qlnx/qlnxe/ecore_dev.c
1645
u32 val;
sys/dev/qlnx/qlnxe/ecore_dev.c
1650
val = ecore_rd(p_hwfn, p_ptt, bar_reg);
sys/dev/qlnx/qlnxe/ecore_dev.c
1651
if (val)
sys/dev/qlnx/qlnxe/ecore_dev.c
1652
return 1 << (val + 15);
sys/dev/qlnx/qlnxe/ecore_dev.c
2906
u32 val, wr_mbs, cache_line_size;
sys/dev/qlnx/qlnxe/ecore_dev.c
2908
val = ecore_rd(p_hwfn, p_ptt, PSWRQ2_REG_WR_MBS0);
sys/dev/qlnx/qlnxe/ecore_dev.c
2909
switch (val) {
sys/dev/qlnx/qlnxe/ecore_dev.c
2922
val);
sys/dev/qlnx/qlnxe/ecore_dev.c
2929
val = 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
2932
val = 1;
sys/dev/qlnx/qlnxe/ecore_dev.c
2935
val = 2;
sys/dev/qlnx/qlnxe/ecore_dev.c
2938
val = 3;
sys/dev/qlnx/qlnxe/ecore_dev.c
2951
STORE_RT_REG(p_hwfn, PGLUE_REG_B_CACHE_LINE_SIZE_RT_OFFSET, val);
sys/dev/qlnx/qlnxe/ecore_dev.c
2952
if (val > 0) {
sys/dev/qlnx/qlnxe/ecore_dev.c
2953
STORE_RT_REG(p_hwfn, PSWRQ2_REG_DRAM_ALIGN_WR_RT_OFFSET, val);
sys/dev/qlnx/qlnxe/ecore_dev.c
2954
STORE_RT_REG(p_hwfn, PSWRQ2_REG_DRAM_ALIGN_RD_RT_OFFSET, val);
sys/dev/qlnx/qlnxe/ecore_dev.c
3451
u32 val;
sys/dev/qlnx/qlnxe/ecore_dev.c
3453
val = ecore_rd(p_hwfn, p_ptt, MISCS_REG_RESET_PL_HV);
sys/dev/qlnx/qlnxe/ecore_dev.c
3454
val |= 0x10;
sys/dev/qlnx/qlnxe/ecore_dev.c
3455
ecore_wr(p_hwfn, p_ptt, MISCS_REG_RESET_PL_HV, val);
sys/dev/qlnx/qlnxe/ecore_dev.c
3646
u32 delay_idx = 0, val, set_val = b_enable ? 1 : 0;
sys/dev/qlnx/qlnxe/ecore_dev.c
3654
val = ecore_rd(p_hwfn, p_ptt,
sys/dev/qlnx/qlnxe/ecore_dev.c
3656
if (val == set_val)
sys/dev/qlnx/qlnxe/ecore_dev.c
3662
if (val != set_val) {
sys/dev/qlnx/qlnxe/ecore_dev.c
4075
u32 val = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_dev.c
4077
if (val != expected_val) {
sys/dev/qlnx/qlnxe/ecore_dev.c
4080
addr, val, expected_val);
sys/dev/qlnx/qlnxe/ecore_dev.c
886
u32 addr, val, eng_sel;
sys/dev/qlnx/qlnxe/ecore_dev.c
918
val = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_dev.c
919
SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_NON_ROCE, eng_sel);
sys/dev/qlnx/qlnxe/ecore_dev.c
920
ecore_wr(p_hwfn, p_ptt, addr, val);
sys/dev/qlnx/qlnxe/ecore_dev.c
936
u32 addr, val, eng_sel;
sys/dev/qlnx/qlnxe/ecore_dev.c
971
val = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_dev.c
972
SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_ROCE, eng_sel);
sys/dev/qlnx/qlnxe/ecore_dev.c
973
ecore_wr(p_hwfn, p_ptt, addr, val);
sys/dev/qlnx/qlnxe/ecore_hsi_debug_tools.h
661
u8 val /* Event ID value */;
sys/dev/qlnx/qlnxe/ecore_hsi_fcoe.h
99
__le16 val /* Global value */;
sys/dev/qlnx/qlnxe/ecore_hw.c
1093
u32 size = OSAL_PAGE_SIZE / 2, val;
sys/dev/qlnx/qlnxe/ecore_hw.c
1112
val = (u32)(osal_uintptr_t)p_tmp;
sys/dev/qlnx/qlnxe/ecore_hw.c
1113
*p_tmp = val;
sys/dev/qlnx/qlnxe/ecore_hw.c
1140
val = (u32)(osal_uintptr_t)p_tmp - size;
sys/dev/qlnx/qlnxe/ecore_hw.c
1142
if (*p_tmp != val) {
sys/dev/qlnx/qlnxe/ecore_hw.c
1147
p_tmp, *p_tmp, val);
sys/dev/qlnx/qlnxe/ecore_hw.c
1159
u8 abs_ppfid, u32 hw_addr, u32 val)
sys/dev/qlnx/qlnxe/ecore_hw.c
1165
ecore_wr(p_hwfn, p_ptt, hw_addr, val);
sys/dev/qlnx/qlnxe/ecore_hw.c
1175
u32 val;
sys/dev/qlnx/qlnxe/ecore_hw.c
1179
val = ecore_rd(p_hwfn, p_ptt, hw_addr);
sys/dev/qlnx/qlnxe/ecore_hw.c
1184
return val;
sys/dev/qlnx/qlnxe/ecore_hw.c
276
u32 val)
sys/dev/qlnx/qlnxe/ecore_hw.c
284
REG_WR(p_hwfn, bar_addr, val);
sys/dev/qlnx/qlnxe/ecore_hw.c
287
bar_addr, hw_addr, val);
sys/dev/qlnx/qlnxe/ecore_hw.c
296
hw_addr, val);
sys/dev/qlnx/qlnxe/ecore_hw.c
302
u32 bar_addr, val;
sys/dev/qlnx/qlnxe/ecore_hw.c
307
val = REG_RD(p_hwfn, bar_addr);
sys/dev/qlnx/qlnxe/ecore_hw.c
311
bar_addr, hw_addr, val);
sys/dev/qlnx/qlnxe/ecore_hw.c
322
return val;
sys/dev/qlnx/qlnxe/ecore_hw.h
156
u32 val);
sys/dev/qlnx/qlnxe/ecore_hw.h
283
u8 abs_ppfid, u32 hw_addr, u32 val);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
370
static OSAL_INLINE bool comp_eq(u32 val, u32 expected_val)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
372
return (val == expected_val);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
375
static OSAL_INLINE bool comp_and(u32 val, u32 expected_val)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
377
return (val & expected_val) == expected_val;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
380
static OSAL_INLINE bool comp_or(u32 val, u32 expected_val)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
382
return (val | expected_val) > 0;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
390
bool (*comp_check)(u32 val, u32 expected_val);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
391
u32 delay = ECORE_INIT_POLL_PERIOD_US, val;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
404
val = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
427
i < ECORE_INIT_MAX_POLL_COUNT && !comp_check(val, data);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
430
val = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
436
OSAL_LE32_TO_CPU(cmd->expected_val), val,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
597
u32 val;
sys/dev/qlnx/qlnxe/ecore_init_ops.c
610
val = ecore_rd(p_hwfn, p_ptt,
sys/dev/qlnx/qlnxe/ecore_init_ops.c
612
} while ((val != 1) && --poll_cnt);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
73
u32 rt_offset, u32 val)
sys/dev/qlnx/qlnxe/ecore_init_ops.c
78
val, rt_offset, RUNTIME_ARRAY_SIZE);
sys/dev/qlnx/qlnxe/ecore_init_ops.c
82
p_hwfn->rt_data.init_val[rt_offset] = val;
sys/dev/qlnx/qlnxe/ecore_init_ops.h
100
#define OVERWRITE_RT_REG(hwfn, offset, val) \
sys/dev/qlnx/qlnxe/ecore_init_ops.h
101
ecore_init_store_rt_reg(hwfn, offset, val)
sys/dev/qlnx/qlnxe/ecore_init_ops.h
115
u32 *val,
sys/dev/qlnx/qlnxe/ecore_init_ops.h
118
#define STORE_RT_REG_AGG(hwfn, offset, val) \
sys/dev/qlnx/qlnxe/ecore_init_ops.h
119
ecore_init_store_rt_agg(hwfn, offset, (u32*)&val, sizeof(val))
sys/dev/qlnx/qlnxe/ecore_init_ops.h
95
u32 val);
sys/dev/qlnx/qlnxe/ecore_init_ops.h
97
#define STORE_RT_REG(hwfn, offset, val) \
sys/dev/qlnx/qlnxe/ecore_init_ops.h
98
ecore_init_store_rt_reg(hwfn, offset, val)
sys/dev/qlnx/qlnxe/ecore_int.c
1975
u32 cmd_ctrl = 0, val = 0, sb_bit = 0, sb_bit_addr = 0, data = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
2014
val = ecore_rd(p_hwfn, p_ptt, sb_bit_addr);
sys/dev/qlnx/qlnxe/ecore_int.c
2015
if ((val & sb_bit) == (cleanup_set ? sb_bit : 0))
sys/dev/qlnx/qlnxe/ecore_int.c
2023
val, igu_sb_id);
sys/dev/qlnx/qlnxe/ecore_int.c
2048
u32 val;
sys/dev/qlnx/qlnxe/ecore_int.c
2050
val = ecore_rd(p_hwfn, p_ptt,
sys/dev/qlnx/qlnxe/ecore_int.c
2053
if (val & (1 << (igu_sb_id % 32)))
sys/dev/qlnx/qlnxe/ecore_int.c
2077
u32 val = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
2080
val = ecore_rd(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION);
sys/dev/qlnx/qlnxe/ecore_int.c
2081
val |= IGU_REG_BLOCK_CONFIGURATION_VF_CLEANUP_EN;
sys/dev/qlnx/qlnxe/ecore_int.c
2082
val &= ~IGU_REG_BLOCK_CONFIGURATION_PXP_TPH_INTERFACE_EN;
sys/dev/qlnx/qlnxe/ecore_int.c
2083
ecore_wr(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION, val);
sys/dev/qlnx/qlnxe/ecore_int.c
2115
u32 val, rval;
sys/dev/qlnx/qlnxe/ecore_int.c
2183
val = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
2218
SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER,
sys/dev/qlnx/qlnxe/ecore_int.c
2220
SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, p_block->is_pf);
sys/dev/qlnx/qlnxe/ecore_int.c
2221
SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER,
sys/dev/qlnx/qlnxe/ecore_int.c
2225
SET_FIELD(val, IGU_MAPPING_LINE_VALID, p_block->is_pf);
sys/dev/qlnx/qlnxe/ecore_int.c
2231
if (rval != val) {
sys/dev/qlnx/qlnxe/ecore_int.c
2235
val);
sys/dev/qlnx/qlnxe/ecore_int.c
2241
rval, val);
sys/dev/qlnx/qlnxe/ecore_int.c
2272
u32 val = ecore_rd(p_hwfn, p_ptt,
sys/dev/qlnx/qlnxe/ecore_int.c
2279
p_block->function_id = GET_FIELD(val,
sys/dev/qlnx/qlnxe/ecore_int.c
2281
p_block->is_pf = GET_FIELD(val, IGU_MAPPING_LINE_PF_VALID);
sys/dev/qlnx/qlnxe/ecore_int.c
2282
p_block->vector_number = GET_FIELD(val,
sys/dev/qlnx/qlnxe/ecore_int.c
2386
u32 val = 0;
sys/dev/qlnx/qlnxe/ecore_int.c
2489
SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER,
sys/dev/qlnx/qlnxe/ecore_int.c
2491
SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, p_block->is_pf);
sys/dev/qlnx/qlnxe/ecore_int.c
2492
SET_FIELD(val, IGU_MAPPING_LINE_VALID, p_block->is_pf);
sys/dev/qlnx/qlnxe/ecore_int.c
2493
SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER,
sys/dev/qlnx/qlnxe/ecore_int.c
2498
val);
sys/dev/qlnx/qlnxe/ecore_int.c
557
u32 val = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt,
sys/dev/qlnx/qlnxe/ecore_int.c
560
if (val & ~(TM_REG_INT_STS_1_PEND_TASK_SCAN |
sys/dev/qlnx/qlnxe/ecore_int.c
564
if (val & (TM_REG_INT_STS_1_PEND_TASK_SCAN |
sys/dev/qlnx/qlnxe/ecore_int.c
567
val = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, TM_REG_INT_MASK_1);
sys/dev/qlnx/qlnxe/ecore_int.c
568
val |= TM_REG_INT_MASK_1_PEND_CONN_SCAN |
sys/dev/qlnx/qlnxe/ecore_int.c
570
ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, TM_REG_INT_MASK_1, val);
sys/dev/qlnx/qlnxe/ecore_int.c
946
u32 val;
sys/dev/qlnx/qlnxe/ecore_int.c
948
val = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg);
sys/dev/qlnx/qlnxe/ecore_int.c
949
ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg, (val & mask));
sys/dev/qlnx/qlnxe/ecore_int.c
969
u32 block_id = p_aeu->block_index, mask, val;
sys/dev/qlnx/qlnxe/ecore_int.c
989
val = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg);
sys/dev/qlnx/qlnxe/ecore_int.c
990
ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg, val & mask);
sys/dev/qlnx/qlnxe/ecore_int_api.h
121
u32 val;
sys/dev/qlnx/qlnxe/ecore_int_api.h
140
val = OSAL_LE32_TO_CPU(igu_ack.sb_id_and_flags);
sys/dev/qlnx/qlnxe/ecore_int_api.h
141
DIRECT_REG_WR(OSAL_NULL, sb_info->igu_addr, val);
sys/dev/qlnx/qlnxe/ecore_iov_api.h
481
int vfid, bool val);
sys/dev/qlnx/qlnxe/ecore_iov_api.h
588
int vfid, int val);
sys/dev/qlnx/qlnxe/ecore_iov_api.h
794
static OSAL_INLINE enum _ecore_status_t ecore_iov_spoofchk_set(struct ecore_hwfn OSAL_UNUSED *p_hwfn, int OSAL_UNUSED vfid, bool OSAL_UNUSED val) {return ECORE_INVAL;}
sys/dev/qlnx/qlnxe/ecore_iov_api.h
804
static OSAL_INLINE enum _ecore_status_t ecore_iov_configure_tx_rate(struct ecore_hwfn OSAL_UNUSED *p_hwfn, struct ecore_ptt OSAL_UNUSED *p_ptt, int OSAL_UNUSED vfid, int OSAL_UNUSED val) { return ECORE_INVAL; }
sys/dev/qlnx/qlnxe/ecore_l2.c
681
u16 val;
sys/dev/qlnx/qlnxe/ecore_l2.c
703
val = p_params->tpa_max_size;
sys/dev/qlnx/qlnxe/ecore_l2.c
704
p_tpa->tpa_max_size = OSAL_CPU_TO_LE16(val);
sys/dev/qlnx/qlnxe/ecore_l2.c
705
val = p_params->tpa_min_size_to_start;
sys/dev/qlnx/qlnxe/ecore_l2.c
706
p_tpa->tpa_min_size_to_start = OSAL_CPU_TO_LE16(val);
sys/dev/qlnx/qlnxe/ecore_l2.c
707
val = p_params->tpa_min_size_to_cont;
sys/dev/qlnx/qlnxe/ecore_l2.c
708
p_tpa->tpa_min_size_to_cont = OSAL_CPU_TO_LE16(val);
sys/dev/qlnx/qlnxe/ecore_l2.c
741
u8 abs_vport_id = 0, val;
sys/dev/qlnx/qlnxe/ecore_l2.c
778
val = p_params->update_accept_any_vlan_flg;
sys/dev/qlnx/qlnxe/ecore_l2.c
779
p_cmn->update_accept_any_vlan_flg = val;
sys/dev/qlnx/qlnxe/ecore_l2.c
782
val = p_params->update_inner_vlan_removal_flg;
sys/dev/qlnx/qlnxe/ecore_l2.c
783
p_cmn->update_inner_vlan_removal_en_flg = val;
sys/dev/qlnx/qlnxe/ecore_l2.c
786
val = p_params->update_default_vlan_enable_flg;
sys/dev/qlnx/qlnxe/ecore_l2.c
787
p_cmn->update_default_vlan_en_flg = val;
sys/dev/qlnx/qlnxe/ecore_l2.c
807
val = p_params->update_anti_spoofing_en_flg;
sys/dev/qlnx/qlnxe/ecore_l2.c
808
p_ramrod->common.update_anti_spoofing_en_flg = val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1358
u32 eee_status, val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1365
val = (eee_status & EEE_LD_ADV_STATUS_MASK) >> EEE_LD_ADV_STATUS_OFFSET;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1366
if (val & EEE_1G_ADV)
sys/dev/qlnx/qlnxe/ecore_mcp.c
1368
if (val & EEE_10G_ADV)
sys/dev/qlnx/qlnxe/ecore_mcp.c
1370
val = (eee_status & EEE_LP_ADV_STATUS_MASK) >> EEE_LP_ADV_STATUS_OFFSET;
sys/dev/qlnx/qlnxe/ecore_mcp.c
1371
if (val & EEE_1G_ADV)
sys/dev/qlnx/qlnxe/ecore_mcp.c
1373
if (val & EEE_10G_ADV)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2083
u32 port_cfg, val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2091
val = GET_MFW_FIELD(port_cfg, OEM_CFG_CHANNEL_TYPE);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2092
if (val != OEM_CFG_CHANNEL_TYPE_STAGGED)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2094
val);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2096
val = GET_MFW_FIELD(port_cfg, OEM_CFG_SCHED_TYPE);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2097
if (val == OEM_CFG_SCHED_TYPE_ETS)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2099
else if (val == OEM_CFG_SCHED_TYPE_VNIC_BW)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2104
val);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2109
val = GET_MFW_FIELD(shmem_info.oem_cfg_func, OEM_CFG_FUNC_TC);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2110
p_hwfn->ufp_info.tc = (u8)val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2111
val = GET_MFW_FIELD(shmem_info.oem_cfg_func,
sys/dev/qlnx/qlnxe/ecore_mcp.c
2113
if (val == OEM_CFG_FUNC_HOST_PRI_CTRL_VNIC)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2115
else if (val == OEM_CFG_FUNC_HOST_PRI_CTRL_OS)
sys/dev/qlnx/qlnxe/ecore_mcp.c
2120
val);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2241
OSAL_BE32 val = OSAL_CPU_TO_BE32(((u32 *)info->mfw_mb_cur)[i]);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2247
sizeof(u32) + i * sizeof(u32), val);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2954
OSAL_BE32 val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
2968
val = OSAL_CPU_TO_BE32(*(u32 *)p_name);
sys/dev/qlnx/qlnxe/ecore_mcp.c
2969
*(u32 *)&drv_version.name[i * sizeof(u32)] = val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3731
u32 drv_mb_param = 0, rsp, val = 0;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3737
drv_mb_param, &rsp, &val);
sys/dev/qlnx/qlnxe/ecore_mcp.c
3741
*gpio_direction = (val & DRV_MB_PARAM_GPIO_DIRECTION_MASK) >>
sys/dev/qlnx/qlnxe/ecore_mcp.c
3743
*gpio_ctrl = (val & DRV_MB_PARAM_GPIO_CTRL_MASK) >>
sys/dev/qlnx/qlnxe/ecore_mcp.c
3939
u32 val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
3955
val = mfw_temp_info.sensor[i];
sys/dev/qlnx/qlnxe/ecore_mcp.c
3957
p_temp_sensor->sensor_location = (val & SENSOR_LOCATION_MASK) >>
sys/dev/qlnx/qlnxe/ecore_mcp.c
3959
p_temp_sensor->threshold_high = (val & THRESHOLD_HIGH_MASK) >>
sys/dev/qlnx/qlnxe/ecore_mcp.c
3961
p_temp_sensor->critical = (val & CRITICAL_TEMPERATURE_MASK) >>
sys/dev/qlnx/qlnxe/ecore_mcp.c
3963
p_temp_sensor->current_temp = (val & CURRENT_TEMP_MASK) >>
sys/dev/qlnx/qlnxe/ecore_mcp.c
4536
u32 offset, u32 val)
sys/dev/qlnx/qlnxe/ecore_mcp.c
4540
u32 dword = val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4556
val, offset, mb_params.mcp_resp);
sys/dev/qlnx/qlnxe/ecore_mcp.c
4638
attr_cmd_write.val = p_drv_attr->val;
sys/dev/qlnx/qlnxe/ecore_mcp.c
4665
p_drv_attr->val, p_drv_attr->mask, p_drv_attr->offset,
sys/dev/qlnx/qlnxe/ecore_mcp.c
4670
p_drv_attr->val = mb_params.mcp_param;
sys/dev/qlnx/qlnxe/ecore_mcp.h
569
u32 offset, u32 val);
sys/dev/qlnx/qlnxe/ecore_mcp.h
614
u32 val;
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1299
u32 addr, size, offset, resp, param, val;
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1332
val = ecore_rd(p_hwfn, p_ptt, addr + offset);
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1333
val = OSAL_BE32_TO_CPU(val);
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1334
OSAL_MEMCPY(&p_mfw_buf[offset], &val, sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1383
OSAL_MEMCPY(&val, &p_mfw_buf[offset], sizeof(u32));
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1384
val = OSAL_CPU_TO_BE32(val);
sys/dev/qlnx/qlnxe/ecore_mng_tlv.c
1385
ecore_wr(p_hwfn, p_ptt, addr + offset, val);
sys/dev/qlnx/qlnxe/ecore_roce.c
144
u32 val = 0;
sys/dev/qlnx/qlnxe/ecore_roce.c
1529
u32 val;
sys/dev/qlnx/qlnxe/ecore_roce.c
1531
val = (p_hwfn->dcbx_no_edpm || p_hwfn->db_bar_no_edpm) ? 0 : 1;
sys/dev/qlnx/qlnxe/ecore_roce.c
1533
ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_DPM_ENABLE, val);
sys/dev/qlnx/qlnxe/ecore_roce.c
1536
val, p_hwfn->dcbx_no_edpm, p_hwfn->db_bar_no_edpm);
sys/dev/qlnx/qlnxe/ecore_roce.c
1542
u8 val;
sys/dev/qlnx/qlnxe/ecore_roce.c
1548
val = (ecore_rdma_allocated_qps(p_hwfn)) ? true : false;
sys/dev/qlnx/qlnxe/ecore_roce.c
1549
p_hwfn->dcbx_no_edpm = (u8)val;
sys/dev/qlnx/qlnxe/ecore_roce.c
161
val |= 1 << NIG_REG_ROCE_DUPLICATE_TO_HOST_ECN;
sys/dev/qlnx/qlnxe/ecore_roce.c
173
val |= 1 << NIG_REG_ROCE_DUPLICATE_TO_HOST_BTH;
sys/dev/qlnx/qlnxe/ecore_roce.c
187
val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1001
SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1005
sizeof(u32) * p_block->igu_sb_id, val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1042
u32 addr, val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
1050
val = ecore_rd(p_hwfn, p_ptt, addr);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1051
SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1052
ecore_wr(p_hwfn, p_ptt, addr, val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1601
u32 val = ecore_rd(p_hwfn, p_ptt, PGLUE_B_REG_VF_BAR1_SIZE);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1603
if (val)
sys/dev/qlnx/qlnxe/ecore_sriov.c
1604
return val + 11;
sys/dev/qlnx/qlnxe/ecore_sriov.c
1915
struct ecore_vf_info *p_vf, bool val)
sys/dev/qlnx/qlnxe/ecore_sriov.c
1920
if (val == p_vf->spoof_chk) {
sys/dev/qlnx/qlnxe/ecore_sriov.c
1923
val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1931
params.anti_spoofing_en = val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
1936
p_vf->spoof_chk = val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
1939
"Spoofchk val[%d] configured\n", val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
1943
val, p_vf->relative_vf_id);
sys/dev/qlnx/qlnxe/ecore_sriov.c
3833
u32 val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
3838
val = ecore_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
sys/dev/qlnx/qlnxe/ecore_sriov.c
3839
if (!val)
sys/dev/qlnx/qlnxe/ecore_sriov.c
3847
p_vf->abs_vf_id, val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
4631
int vfid, bool val)
sys/dev/qlnx/qlnxe/ecore_sriov.c
4648
vf->req_spoofchk_val = val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
4653
rc = __ecore_iov_spoofchk_set(p_hwfn, vf, val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
4765
int vfid, int val)
sys/dev/qlnx/qlnxe/ecore_sriov.c
4783
return ecore_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val,
sys/dev/qlnx/qlnxe/ecore_sriov.c
951
u32 reg_addr, val;
sys/dev/qlnx/qlnxe/ecore_sriov.c
960
val = enable ? (vf->abs_vf_id | (1 << 8)) : 0;
sys/dev/qlnx/qlnxe/ecore_sriov.c
961
ecore_wr(p_hwfn, p_ptt, reg_addr, val);
sys/dev/qlnx/qlnxe/ecore_sriov.c
986
u32 val = 0;
sys/dev/qlnx/qlnxe/ecore_sriov.c
993
SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
sys/dev/qlnx/qlnxe/ecore_sriov.c
994
SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
sys/dev/qlnx/qlnxe/ecore_sriov.c
995
SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
44
#define htonl(val) OSAL_CPU_TO_BE32(val)
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
48
#define ntohl(val) OSAL_BE32_TO_CPU(val)
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
52
#define htons(val) OSAL_CPU_TO_BE16(val)
sys/dev/qlnx/qlnxe/ecore_tcp_ip.h
56
#define ntohs(val) OSAL_BE16_TO_CPU(val)
sys/dev/qlnx/qlnxe/ecore_utils.h
48
#define DMA_REGPAIR_LE(x, val) (x).hi = DMA_HI_LE((val)); \
sys/dev/qlnx/qlnxe/ecore_utils.h
49
(x).lo = DMA_LO_LE((val))
sys/dev/qlnx/qlnxe/ecore_vf.c
725
enum ecore_tunn_mode val)
sys/dev/qlnx/qlnxe/ecore_vf.c
727
if (feature_mask & (1 << val)) {
sys/dev/qlnx/qlnxe/mcp_public.h
1187
u32 val;
sys/dev/qlnx/qlnxe/mcp_public.h
2206
u32 val;
sys/dev/qlnx/qlnxe/qlnx_def.h
668
#define QL_ERR_INJECT(ha, val) (ha->err_inject == val)
sys/dev/qlnx/qlnxe/qlnx_def.h
669
#define QL_RESET_ERR_INJECT(ha, val) {if (ha->err_inject == val) ha->err_inject = 0;}
sys/dev/qlnx/qlnxe/qlnx_ioctl.c
437
reg_rd_wr->val = qlnx_reg_rd32(p_hwfn,
sys/dev/qlnx/qlnxe/qlnx_ioctl.c
445
reg_rd_wr->val);
sys/dev/qlnx/qlnxe/qlnx_ioctl.c
464
pci_cfg_rd_wr->val = pci_read_config(ha->pci_dev,
sys/dev/qlnx/qlnxe/qlnx_ioctl.c
471
pci_cfg_rd_wr->val, pci_cfg_rd_wr->width);
sys/dev/qlnx/qlnxe/qlnx_ioctl.h
150
uint32_t val;
sys/dev/qlnx/qlnxe/qlnx_ioctl.h
168
uint32_t val;
sys/dev/qlxgb/qla_glbl.h
89
extern int qla_rdwr_indreg32(qla_host_t *ha, uint32_t addr, uint32_t *val,
sys/dev/qlxgb/qla_glbl.h
93
uint32_t *val, uint32_t num);
sys/dev/qlxgb/qla_glbl.h
94
extern int qla_flash_rd32(qla_host_t *ha, uint32_t addr, uint32_t *val);
sys/dev/qlxgb/qla_hw.h
794
#define QL_UPDATE_RDS_PRODUCER_INDEX(ha, i, val) \
sys/dev/qlxgb/qla_hw.h
796
0x1b2000), val)
sys/dev/qlxgb/qla_hw.h
798
#define QL_UPDATE_TX_PRODUCER_INDEX(ha, val) \
sys/dev/qlxgb/qla_hw.h
799
WRITE_REG32(ha, (ha->hw.tx_prod_reg + 0x1b2000), val)
sys/dev/qlxgb/qla_hw.h
801
#define QL_UPDATE_SDS_CONSUMER_INDEX(ha, i, val) \
sys/dev/qlxgb/qla_hw.h
803
0x1b2000), val)
sys/dev/qlxgb/qla_ioctl.c
101
rv->val = READ_OFFSET32(ha, rv->reg);
sys/dev/qlxgb/qla_ioctl.c
103
WRITE_OFFSET32(ha, rv->reg, rv->val);
sys/dev/qlxgb/qla_ioctl.c
106
if ((rval = qla_rdwr_indreg32(ha, rv->reg, &rv->val,
sys/dev/qlxgb/qla_ioctl.h
43
uint32_t val;
sys/dev/qlxgb/qla_misc.c
204
qla_rdwr_indreg32(qla_host_t *ha, uint32_t addr, uint32_t *val, uint32_t rd)
sys/dev/qlxgb/qla_misc.c
244
*val = READ_OFFSET32(ha, ((addr & 0xFFFF) | 0x1E0000));
sys/dev/qlxgb/qla_misc.c
246
WRITE_OFFSET32(ha, ((addr & 0xFFFF) | 0x1E0000), *val);
sys/dev/qlxgb/qla_misc.c
258
qla_rdwr_offchip_mem(qla_host_t *ha, uint64_t addr, offchip_mem_val_t *val,
sys/dev/qlxgb/qla_misc.c
268
WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_WRDATA_LO, val->data_lo);
sys/dev/qlxgb/qla_misc.c
269
WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_WRDATA_HI, val->data_hi);
sys/dev/qlxgb/qla_misc.c
270
WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_WRDATA_ULO, val->data_ulo);
sys/dev/qlxgb/qla_misc.c
271
WRITE_OFFSET32(ha, Q8_MIU_TEST_AGT_WRDATA_UHI, val->data_uhi);
sys/dev/qlxgb/qla_misc.c
281
val->data_lo = READ_OFFSET32(ha, \
sys/dev/qlxgb/qla_misc.c
283
val->data_hi = READ_OFFSET32(ha, \
sys/dev/qlxgb/qla_misc.c
285
val->data_ulo = READ_OFFSET32(ha, \
sys/dev/qlxgb/qla_misc.c
287
val->data_uhi = READ_OFFSET32(ha, \
sys/dev/qlxgb/qla_misc.c
306
uint32_t val;
sys/dev/qlxgb/qla_misc.c
315
val = addr;
sys/dev/qlxgb/qla_misc.c
316
qla_rdwr_indreg32(ha, Q8_ROM_ADDRESS, &val, 0);
sys/dev/qlxgb/qla_misc.c
317
val = 0;
sys/dev/qlxgb/qla_misc.c
318
qla_rdwr_indreg32(ha, Q8_ROM_DUMMY_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
319
val = 3;
sys/dev/qlxgb/qla_misc.c
320
qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
324
val = ROM_OPCODE_FAST_RD;
sys/dev/qlxgb/qla_misc.c
325
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
327
while (!((val = READ_OFFSET32(ha, Q8_ROM_STATUS)) & BIT_1)) {
sys/dev/qlxgb/qla_misc.c
335
val = 0;
sys/dev/qlxgb/qla_misc.c
336
qla_rdwr_indreg32(ha, Q8_ROM_DUMMY_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
337
qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
416
uint32_t val = 0, sig = 0;
sys/dev/qlxgb/qla_misc.c
423
qla_rd_flash32(ha, 4, &val);
sys/dev/qlxgb/qla_misc.c
424
QL_DPRINT2((ha->pci_dev, "%s: val[4] = 0x%08x\n", __func__, val));
sys/dev/qlxgb/qla_misc.c
426
count = val >> 16;
sys/dev/qlxgb/qla_misc.c
427
offset = val & 0xFFFF;
sys/dev/qlxgb/qla_misc.c
431
__func__, sig, val, count));
sys/dev/qlxgb/qla_misc.c
500
offchip_mem_val_t val;
sys/dev/qlxgb/qla_misc.c
504
qla_rd_flash32(ha, flash_off, &val.data_lo);
sys/dev/qlxgb/qla_misc.c
508
qla_rd_flash32(ha, flash_off, &val.data_hi);
sys/dev/qlxgb/qla_misc.c
512
qla_rd_flash32(ha, flash_off, &val.data_ulo);
sys/dev/qlxgb/qla_misc.c
516
qla_rd_flash32(ha, flash_off, &val.data_uhi);
sys/dev/qlxgb/qla_misc.c
520
qla_rdwr_offchip_mem(ha, mem_off, &val, 0);
sys/dev/qlxgb/qla_misc.c
595
uint32_t val, delay = 300;
sys/dev/qlxgb/qla_misc.c
605
val = READ_OFFSET32(ha, Q8_CMDPEG_STATE);
sys/dev/qlxgb/qla_misc.c
607
if (val == CMDPEG_PHAN_INIT_COMPLETE) {
sys/dev/qlxgb/qla_misc.c
619
val = READ_OFFSET32(ha, Q8_CMDPEG_STATE);
sys/dev/qlxgb/qla_misc.c
621
if (val != CMDPEG_PHAN_INIT_COMPLETE) {
sys/dev/qlxgb/qla_misc.c
629
if (qla_rd_flash32(ha, 0x100004, &val) == 0) {
sys/dev/qlxgb/qla_misc.c
630
if (((val & 0xFF) != ha->fw_ver_major) ||
sys/dev/qlxgb/qla_misc.c
631
(((val >> 8) & 0xFF) != ha->fw_ver_minor) ||
sys/dev/qlxgb/qla_misc.c
632
(((val >> 16) & 0xFF) != ha->fw_ver_sub)) {
sys/dev/qlxgb/qla_misc.c
652
uint32_t val;
sys/dev/qlxgb/qla_misc.c
657
val = READ_OFFSET32(ha, Q8_ROM_STATUS);
sys/dev/qlxgb/qla_misc.c
659
if (val & BIT_1)
sys/dev/qlxgb/qla_misc.c
669
uint32_t val, rval;
sys/dev/qlxgb/qla_misc.c
671
val = 0;
sys/dev/qlxgb/qla_misc.c
672
qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
674
val = ROM_OPCODE_WR_ENABLE;
sys/dev/qlxgb/qla_misc.c
675
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
688
uint32_t val, rval;
sys/dev/qlxgb/qla_misc.c
693
val = 0;
sys/dev/qlxgb/qla_misc.c
694
qla_rdwr_indreg32(ha, Q8_ROM_WR_DATA, &val, 0);
sys/dev/qlxgb/qla_misc.c
696
val = ROM_OPCODE_WR_STATUS_REG;
sys/dev/qlxgb/qla_misc.c
697
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
709
val = 0;
sys/dev/qlxgb/qla_misc.c
710
qla_rdwr_indreg32(ha, Q8_ROM_WR_DATA, &val, 0);
sys/dev/qlxgb/qla_misc.c
712
val = ROM_OPCODE_WR_STATUS_REG;
sys/dev/qlxgb/qla_misc.c
713
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
726
uint32_t val, rval;
sys/dev/qlxgb/qla_misc.c
731
val = 0x9C;
sys/dev/qlxgb/qla_misc.c
732
qla_rdwr_indreg32(ha, Q8_ROM_WR_DATA, &val, 0);
sys/dev/qlxgb/qla_misc.c
734
val = ROM_OPCODE_WR_STATUS_REG;
sys/dev/qlxgb/qla_misc.c
735
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
749
uint32_t val, rval;
sys/dev/qlxgb/qla_misc.c
752
val = 0;
sys/dev/qlxgb/qla_misc.c
753
qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
755
val = ROM_OPCODE_RD_STATUS_REG;
sys/dev/qlxgb/qla_misc.c
756
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
761
qla_rdwr_indreg32(ha, Q8_ROM_RD_DATA, &val, 1);
sys/dev/qlxgb/qla_misc.c
763
if ((val & BIT_0) == 0)
sys/dev/qlxgb/qla_misc.c
764
return (val);
sys/dev/qlxgb/qla_misc.c
804
uint32_t val;
sys/dev/qlxgb/qla_misc.c
810
val = start;
sys/dev/qlxgb/qla_misc.c
811
qla_rdwr_indreg32(ha, Q8_ROM_ADDRESS, &val, 0);
sys/dev/qlxgb/qla_misc.c
813
val = 3;
sys/dev/qlxgb/qla_misc.c
814
qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
816
val = ROM_OPCODE_SECTOR_ERASE;
sys/dev/qlxgb/qla_misc.c
817
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
864
uint32_t val;
sys/dev/qlxgb/qla_misc.c
867
val = data;
sys/dev/qlxgb/qla_misc.c
868
qla_rdwr_indreg32(ha, Q8_ROM_WR_DATA, &val, 0);
sys/dev/qlxgb/qla_misc.c
870
val = off;
sys/dev/qlxgb/qla_misc.c
871
qla_rdwr_indreg32(ha, Q8_ROM_ADDRESS, &val, 0);
sys/dev/qlxgb/qla_misc.c
873
val = 3;
sys/dev/qlxgb/qla_misc.c
874
qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
876
val = ROM_OPCODE_PROG_PAGE;
sys/dev/qlxgb/qla_misc.c
877
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
890
uint32_t val, count = 1000;
sys/dev/qlxgb/qla_misc.c
894
val = 0;
sys/dev/qlxgb/qla_misc.c
895
qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
sys/dev/qlxgb/qla_misc.c
897
val = ROM_OPCODE_RD_STATUS_REG;
sys/dev/qlxgb/qla_misc.c
898
qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
sys/dev/qlxgb/qla_misc.c
904
qla_rdwr_indreg32(ha, Q8_ROM_RD_DATA, &val, 1);
sys/dev/qlxgb/qla_misc.c
906
if ((val & BIT_0) == 0)
sys/dev/qlxgb/qla_reg.h
231
#define WRITE_REG32(ha, reg, val) \
sys/dev/qlxgb/qla_reg.h
233
bus_write_4((ha->pci_reg), reg, val);\
sys/dev/qlxgb/qla_reg.h
237
#define WRITE_REG32_MB(ha, reg, val) \
sys/dev/qlxgb/qla_reg.h
240
bus_write_4((ha->pci_reg), reg, val);\
sys/dev/qlxgb/qla_reg.h
243
#define WRITE_OFFSET32(ha, off, val)\
sys/dev/qlxgb/qla_reg.h
245
bus_write_4((ha->pci_reg), off, val);\
sys/dev/qlxgbe/ql_dbg.h
81
#define QL_ERR_INJECT(ha, val) (ha->err_inject == val)
sys/dev/qlxgbe/ql_dbg.h
99
#define QL_ERR_INJECT(ha, val) 0
sys/dev/qlxgbe/ql_glbl.h
89
extern int ql_rdwr_indreg32(qla_host_t *ha, uint32_t addr, uint32_t *val,
sys/dev/qlxgbe/ql_glbl.h
93
q80_offchip_mem_val_t *val, uint32_t rd);
sys/dev/qlxgbe/ql_hw.c
3812
uint32_t val;
sys/dev/qlxgbe/ql_hw.c
3821
val = READ_REG32(ha, Q8_ASIC_TEMPERATURE);
sys/dev/qlxgbe/ql_hw.c
3823
if (((val & 0xFFFF) == 2) || ((val & 0xFFFF) == 3) ||
sys/dev/qlxgbe/ql_hw.c
3827
__func__, qla_get_usec_timestamp(), val);
sys/dev/qlxgbe/ql_hw.c
3836
val = READ_REG32(ha, Q8_FIRMWARE_HEARTBEAT);
sys/dev/qlxgbe/ql_hw.c
3838
if ((val != ha->hw.hbeat_value) &&
sys/dev/qlxgbe/ql_hw.c
3840
ha->hw.hbeat_value = val;
sys/dev/qlxgbe/ql_hw.c
3849
__func__, val);
sys/dev/qlxgbe/ql_hw.c
3864
__func__, qla_get_usec_timestamp(), val,
sys/dev/qlxgbe/ql_hw.c
5041
q80_offchip_mem_val_t val;
sys/dev/qlxgbe/ql_hw.c
5049
ret = ql_rdwr_offchip_mem(ha, (addr & 0x0ffffffff), &val, 1);
sys/dev/qlxgbe/ql_hw.c
5053
*data_buff++ = val.data_lo;
sys/dev/qlxgbe/ql_hw.c
5054
*data_buff++ = val.data_hi;
sys/dev/qlxgbe/ql_hw.c
5055
*data_buff++ = val.data_ulo;
sys/dev/qlxgbe/ql_hw.c
5056
*data_buff++ = val.data_uhi;
sys/dev/qlxgbe/ql_hw.c
84
uint32_t val = 1;
sys/dev/qlxgbe/ql_hw.c
86
ql_rdwr_indreg32(ha, Q8_CRB_PEG_0, &val, 0);
sys/dev/qlxgbe/ql_hw.c
87
ql_rdwr_indreg32(ha, Q8_CRB_PEG_1, &val, 0);
sys/dev/qlxgbe/ql_hw.c
88
ql_rdwr_indreg32(ha, Q8_CRB_PEG_2, &val, 0);
sys/dev/qlxgbe/ql_hw.c
89
ql_rdwr_indreg32(ha, Q8_CRB_PEG_3, &val, 0);
sys/dev/qlxgbe/ql_hw.c
90
ql_rdwr_indreg32(ha, Q8_CRB_PEG_4, &val, 0);
sys/dev/qlxgbe/ql_hw.h
1715
#define QL_UPDATE_RDS_PRODUCER_INDEX(ha, prod_reg, val) \
sys/dev/qlxgbe/ql_hw.h
1716
bus_write_4((ha->pci_reg), prod_reg, val);
sys/dev/qlxgbe/ql_hw.h
1718
#define QL_UPDATE_TX_PRODUCER_INDEX(ha, val, i) \
sys/dev/qlxgbe/ql_hw.h
1719
WRITE_REG32(ha, ha->hw.tx_cntxt[i].tx_prod_reg, val)
sys/dev/qlxgbe/ql_hw.h
1721
#define QL_UPDATE_SDS_CONSUMER_INDEX(ha, i, val) \
sys/dev/qlxgbe/ql_hw.h
1722
bus_write_4((ha->pci_reg), (ha->hw.sds[i].sds_consumer), val);
sys/dev/qlxgbe/ql_hw.h
205
#define WRITE_REG32(ha, reg, val) \
sys/dev/qlxgbe/ql_hw.h
207
bus_write_4((ha->pci_reg), reg, val);\
sys/dev/qlxgbe/ql_ioctl.c
116
u.rv->val = READ_REG32(ha, u.rv->reg);
sys/dev/qlxgbe/ql_ioctl.c
118
WRITE_REG32(ha, u.rv->reg, u.rv->val);
sys/dev/qlxgbe/ql_ioctl.c
121
if ((rval = ql_rdwr_indreg32(ha, u.rv->reg, &u.rv->val,
sys/dev/qlxgbe/ql_ioctl.c
196
if ((rval = ql_rdwr_offchip_mem(ha, u.mem->off, &val,
sys/dev/qlxgbe/ql_ioctl.c
200
u.mem->data_lo = val.data_lo;
sys/dev/qlxgbe/ql_ioctl.c
201
u.mem->data_hi = val.data_hi;
sys/dev/qlxgbe/ql_ioctl.c
202
u.mem->data_ulo = val.data_ulo;
sys/dev/qlxgbe/ql_ioctl.c
203
u.mem->data_uhi = val.data_uhi;
sys/dev/qlxgbe/ql_ioctl.c
93
q80_offchip_mem_val_t val;
sys/dev/qlxgbe/ql_ioctl.h
43
uint32_t val;
sys/dev/qlxgbe/ql_misc.c
1187
q80_offchip_mem_val_t val;
sys/dev/qlxgbe/ql_misc.c
1192
val.data_lo = *data32++;
sys/dev/qlxgbe/ql_misc.c
1193
val.data_hi = *data32++;
sys/dev/qlxgbe/ql_misc.c
1194
val.data_ulo = *data32++;
sys/dev/qlxgbe/ql_misc.c
1195
val.data_uhi = *data32++;
sys/dev/qlxgbe/ql_misc.c
1197
if (ql_rdwr_offchip_mem(ha, addr, &val, 0))
sys/dev/qlxgbe/ql_misc.c
1206
bzero(&val, sizeof(q80_offchip_mem_val_t));
sys/dev/qlxgbe/ql_misc.c
1210
val.data_lo = *data32++;
sys/dev/qlxgbe/ql_misc.c
1211
val.data_hi = *data32++;
sys/dev/qlxgbe/ql_misc.c
1212
val.data_ulo = *data32++;
sys/dev/qlxgbe/ql_misc.c
1213
ret = ql_rdwr_offchip_mem(ha, addr, &val, 0);
sys/dev/qlxgbe/ql_misc.c
1217
val.data_lo = *data32++;
sys/dev/qlxgbe/ql_misc.c
1218
val.data_hi = *data32++;
sys/dev/qlxgbe/ql_misc.c
1219
ret = ql_rdwr_offchip_mem(ha, addr, &val, 0);
sys/dev/qlxgbe/ql_misc.c
1223
val.data_lo = *data32++;
sys/dev/qlxgbe/ql_misc.c
1224
ret = ql_rdwr_offchip_mem(ha, addr, &val, 0);
sys/dev/qlxgbe/ql_misc.c
126
data = val->data_lo;
sys/dev/qlxgbe/ql_misc.c
132
data = val->data_hi;
sys/dev/qlxgbe/ql_misc.c
138
data = val->data_ulo;
sys/dev/qlxgbe/ql_misc.c
144
data = val->data_uhi;
sys/dev/qlxgbe/ql_misc.c
176
val->data_lo = data;
sys/dev/qlxgbe/ql_misc.c
183
val->data_hi = data;
sys/dev/qlxgbe/ql_misc.c
190
val->data_ulo = data;
sys/dev/qlxgbe/ql_misc.c
197
val->data_uhi = data;
sys/dev/qlxgbe/ql_misc.c
209
(uint32_t)(addr), val->data_lo, val->data_hi, val->data_ulo,
sys/dev/qlxgbe/ql_misc.c
210
val->data_uhi, rd, step);
sys/dev/qlxgbe/ql_misc.c
63
ql_rdwr_indreg32(qla_host_t *ha, uint32_t addr, uint32_t *val, uint32_t rd)
sys/dev/qlxgbe/ql_misc.c
674
q80_offchip_mem_val_t val;
sys/dev/qlxgbe/ql_misc.c
684
ql_rd_flash32(ha, flash_off, &val.data_lo);
sys/dev/qlxgbe/ql_misc.c
688
ql_rd_flash32(ha, flash_off, &val.data_hi);
sys/dev/qlxgbe/ql_misc.c
692
ql_rd_flash32(ha, flash_off, &val.data_ulo);
sys/dev/qlxgbe/ql_misc.c
696
ql_rd_flash32(ha, flash_off, &val.data_uhi);
sys/dev/qlxgbe/ql_misc.c
700
ql_rdwr_offchip_mem(ha, mem_off, &val, 0);
sys/dev/qlxgbe/ql_misc.c
754
uint32_t val, delay = 300;
sys/dev/qlxgbe/ql_misc.c
762
val = READ_REG32(ha, Q8_CMDPEG_STATE);
sys/dev/qlxgbe/ql_misc.c
764
if (val == 0xFF01) {
sys/dev/qlxgbe/ql_misc.c
777
val = READ_REG32(ha, Q8_CMDPEG_STATE);
sys/dev/qlxgbe/ql_misc.c
778
if (!cold || (val != 0xFF01) || ha->qla_initiate_recovery) {
sys/dev/qlxgbe/ql_misc.c
79
__func__, addr, *val, rd);
sys/dev/qlxgbe/ql_misc.c
85
*val = READ_REG32(ha, Q8_WILD_CARD);
sys/dev/qlxgbe/ql_misc.c
87
WRITE_REG32(ha, Q8_WILD_CARD, *val);
sys/dev/qlxgbe/ql_misc.c
98
ql_rdwr_offchip_mem(qla_host_t *ha, uint64_t addr, q80_offchip_mem_val_t *val,
sys/dev/qlxge/qls_dump.c
1410
uint32_t val;
sys/dev/qlxge/qls_dump.c
1419
val = 0x04000000 | (type << 16) | (idx << 8);
sys/dev/qlxge/qls_dump.c
1420
WRITE_REG32(ha, Q81_CTL_ROUTING_INDEX, val);
sys/dev/qlxge/qls_dump.c
1452
uint32_t val;
sys/dev/qlxge/qls_dump.c
1523
val = initial_val | (type << 16) |
sys/dev/qlxge/qls_dump.c
1527
val);
sys/dev/qlxge/qls_hw.h
901
#define WRITE_REG32_ONLY(ha, reg, val) bus_write_4((ha->pci_reg), reg, val)
sys/dev/qlxge/qls_hw.h
903
#define WRITE_REG32(ha, reg, val) bus_write_4((ha->pci_reg), reg, val)
sys/dev/ral/rt2560.c
168
uint32_t val;
sys/dev/ral/rt2560.c
175
uint8_t val;
sys/dev/ral/rt2560.c
1949
rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
sys/dev/ral/rt2560.c
1964
tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
sys/dev/ral/rt2560.c
1967
DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
sys/dev/ral/rt2560.c
1973
uint32_t val;
sys/dev/ral/rt2560.c
1986
val = RT2560_BBP_BUSY | reg << 8;
sys/dev/ral/rt2560.c
1987
RAL_WRITE(sc, RT2560_BBPCSR, val);
sys/dev/ral/rt2560.c
1990
val = RAL_READ(sc, RT2560_BBPCSR);
sys/dev/ral/rt2560.c
1991
if (!(val & RT2560_BBP_BUSY))
sys/dev/ral/rt2560.c
1992
return val & 0xff;
sys/dev/ral/rt2560.c
2001
rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
sys/dev/ral/rt2560.c
2016
tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
sys/dev/ral/rt2560.c
2021
sc->rf_regs[reg] = val;
sys/dev/ral/rt2560.c
2023
DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
sys/dev/ral/rt2560.c
2412
uint16_t val;
sys/dev/ral/rt2560.c
2415
val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
sys/dev/ral/rt2560.c
2416
sc->rf_rev = (val >> 11) & 0x7;
sys/dev/ral/rt2560.c
2417
sc->hw_radio = (val >> 10) & 0x1;
sys/dev/ral/rt2560.c
2418
sc->led_mode = (val >> 6) & 0x7;
sys/dev/ral/rt2560.c
2419
sc->rx_ant = (val >> 4) & 0x3;
sys/dev/ral/rt2560.c
2420
sc->tx_ant = (val >> 2) & 0x3;
sys/dev/ral/rt2560.c
2421
sc->nb_ant = val & 0x3;
sys/dev/ral/rt2560.c
2425
val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
sys/dev/ral/rt2560.c
2426
if (val == 0 || val == 0xffff)
sys/dev/ral/rt2560.c
2429
sc->bbp_prom[i].reg = val >> 8;
sys/dev/ral/rt2560.c
2430
sc->bbp_prom[i].val = val & 0xff;
sys/dev/ral/rt2560.c
2435
val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
sys/dev/ral/rt2560.c
2436
sc->txpow[i * 2] = val & 0xff;
sys/dev/ral/rt2560.c
2437
sc->txpow[i * 2 + 1] = val >> 8;
sys/dev/ral/rt2560.c
2444
val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE);
sys/dev/ral/rt2560.c
2445
if ((val & 0xff) == 0xff)
sys/dev/ral/rt2560.c
2448
sc->rssi_corr = val & 0xff;
sys/dev/ral/rt2560.c
2450
sc->rssi_corr, val);
sys/dev/ral/rt2560.c
2493
rt2560_def_bbp[i].val);
sys/dev/ral/rt2560.c
2498
if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0)
sys/dev/ral/rt2560.c
2500
rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
sys/dev/ral/rt2560.c
2587
RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
sys/dev/ral/rt2560.c
804
uint16_t val;
sys/dev/ral/rt2560.c
836
val = 0;
sys/dev/ral/rt2560.c
840
val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
sys/dev/ral/rt2560.c
851
return val;
sys/dev/ral/rt2560reg.h
310
#define RAL_WRITE(sc, reg, val) \
sys/dev/ral/rt2560reg.h
311
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/ral/rt2560reg.h
316
#define RT2560_EEPROM_CTL(sc, val) do { \
sys/dev/ral/rt2560reg.h
317
RAL_WRITE((sc), RT2560_CSR21, (val)); \
sys/dev/ral/rt2560var.h
139
uint8_t val;
sys/dev/ral/rt2661.c
1685
rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
sys/dev/ral/rt2661.c
1700
tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
sys/dev/ral/rt2661.c
1703
DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
sys/dev/ral/rt2661.c
1709
uint32_t val;
sys/dev/ral/rt2661.c
1722
val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
sys/dev/ral/rt2661.c
1723
RAL_WRITE(sc, RT2661_PHY_CSR3, val);
sys/dev/ral/rt2661.c
1726
val = RAL_READ(sc, RT2661_PHY_CSR3);
sys/dev/ral/rt2661.c
1727
if (!(val & RT2661_BBP_BUSY))
sys/dev/ral/rt2661.c
1728
return val & 0xff;
sys/dev/ral/rt2661.c
1737
rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
sys/dev/ral/rt2661.c
174
uint32_t val;
sys/dev/ral/rt2661.c
1752
tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
sys/dev/ral/rt2661.c
1757
sc->rf_regs[reg] = val;
sys/dev/ral/rt2661.c
1759
DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
sys/dev/ral/rt2661.c
181
uint8_t val;
sys/dev/ral/rt2661.c
205
uint32_t val;
sys/dev/ral/rt2661.c
2096
uint16_t val;
sys/dev/ral/rt2661.c
2100
val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
sys/dev/ral/rt2661.c
2101
macaddr[0] = val & 0xff;
sys/dev/ral/rt2661.c
2102
macaddr[1] = val >> 8;
sys/dev/ral/rt2661.c
2104
val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
sys/dev/ral/rt2661.c
2105
macaddr[2] = val & 0xff;
sys/dev/ral/rt2661.c
2106
macaddr[3] = val >> 8;
sys/dev/ral/rt2661.c
2108
val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
sys/dev/ral/rt2661.c
2109
macaddr[4] = val & 0xff;
sys/dev/ral/rt2661.c
2110
macaddr[5] = val >> 8;
sys/dev/ral/rt2661.c
2112
val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
sys/dev/ral/rt2661.c
2114
sc->rf_rev = (val >> 11) & 0x1f;
sys/dev/ral/rt2661.c
2115
sc->hw_radio = (val >> 10) & 0x1;
sys/dev/ral/rt2661.c
2116
sc->rx_ant = (val >> 4) & 0x3;
sys/dev/ral/rt2661.c
2117
sc->tx_ant = (val >> 2) & 0x3;
sys/dev/ral/rt2661.c
2118
sc->nb_ant = val & 0x3;
sys/dev/ral/rt2661.c
2122
val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
sys/dev/ral/rt2661.c
2123
sc->ext_5ghz_lna = (val >> 6) & 0x1;
sys/dev/ral/rt2661.c
2124
sc->ext_2ghz_lna = (val >> 4) & 0x1;
sys/dev/ral/rt2661.c
2129
val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
sys/dev/ral/rt2661.c
2130
if ((val & 0xff) != 0xff)
sys/dev/ral/rt2661.c
2131
sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
sys/dev/ral/rt2661.c
2137
val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
sys/dev/ral/rt2661.c
2138
if ((val & 0xff) != 0xff)
sys/dev/ral/rt2661.c
2139
sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
sys/dev/ral/rt2661.c
2154
val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
sys/dev/ral/rt2661.c
2155
if ((val >> 8) != 0xff)
sys/dev/ral/rt2661.c
2156
sc->rfprog = (val >> 8) & 0x3;
sys/dev/ral/rt2661.c
2157
if ((val & 0xff) != 0xff)
sys/dev/ral/rt2661.c
2158
sc->rffreq = val & 0xff;
sys/dev/ral/rt2661.c
2164
val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
sys/dev/ral/rt2661.c
2165
sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
sys/dev/ral/rt2661.c
2168
sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
sys/dev/ral/rt2661.c
2175
val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
sys/dev/ral/rt2661.c
2176
if (val == 0 || val == 0xffff)
sys/dev/ral/rt2661.c
2178
sc->bbp_prom[i].reg = val >> 8;
sys/dev/ral/rt2661.c
2179
sc->bbp_prom[i].val = val & 0xff;
sys/dev/ral/rt2661.c
2181
sc->bbp_prom[i].val);
sys/dev/ral/rt2661.c
2189
uint8_t val;
sys/dev/ral/rt2661.c
219
if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
sys/dev/ral/rt2661.c
2193
val = rt2661_bbp_read(sc, 0);
sys/dev/ral/rt2661.c
2194
if (val != 0 && val != 0xff)
sys/dev/ral/rt2661.c
2206
rt2661_def_bbp[i].val);
sys/dev/ral/rt2661.c
2213
rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
sys/dev/ral/rt2661.c
2283
RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
sys/dev/ral/rt2661.c
233
device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
sys/dev/ral/rt2661.c
798
uint16_t val;
sys/dev/ral/rt2661.c
830
val = 0;
sys/dev/ral/rt2661.c
834
val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
sys/dev/ral/rt2661.c
845
return val;
sys/dev/ral/rt2661.c
854
uint32_t val;
sys/dev/ral/rt2661.c
862
val = RAL_READ(sc, RT2661_STA_CSR4);
sys/dev/ral/rt2661.c
863
if (!(val & RT2661_TX_STAT_VALID))
sys/dev/ral/rt2661.c
867
qid = RT2661_TX_QID(val);
sys/dev/ral/rt2661.c
881
switch (RT2661_TX_RESULT(val)) {
sys/dev/ral/rt2661.c
884
txs->long_retries = RT2661_TX_RETRYCNT(val);
sys/dev/ral/rt2661.c
895
txs->long_retries = RT2661_TX_RETRYCNT(val);
sys/dev/ral/rt2661.c
907
"sending data frame failed 0x%08x\n", val);
sys/dev/ral/rt2661reg.h
324
#define RAL_WRITE(sc, reg, val) \
sys/dev/ral/rt2661reg.h
325
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/ral/rt2661reg.h
334
#define RT2661_EEPROM_CTL(sc, val) do { \
sys/dev/ral/rt2661reg.h
335
RAL_WRITE((sc), RT2661_E2PROM_CSR, (val)); \
sys/dev/ral/rt2661var.h
138
uint8_t val;
sys/dev/ral/rt2860.c
1006
uint16_t val;
sys/dev/ral/rt2860.c
1038
val = 0;
sys/dev/ral/rt2860.c
1042
val |= ((tmp & RT2860_Q) >> RT2860_SHIFT_Q) << n;
sys/dev/ral/rt2860.c
1053
return val;
sys/dev/ral/rt2860.c
191
uint32_t val;
sys/dev/ral/rt2860.c
198
uint8_t val;
sys/dev/ral/rt2860.c
2024
rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
sys/dev/ral/rt2860.c
2040
RT2860_BBP_CSR_KICK | reg << 8 | val);
sys/dev/ral/rt2860.c
2050
uint32_t val;
sys/dev/ral/rt2860.c
2072
val = RAL_READ(sc, RT2860_H2M_BBPAGENT);
sys/dev/ral/rt2860.c
2073
if (!(val & RT2860_BBP_CSR_KICK))
sys/dev/ral/rt2860.c
2074
return val & 0xff;
sys/dev/ral/rt2860.c
2086
rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
sys/dev/ral/rt2860.c
2103
(val & 0x3fffff) << 2 | (reg & 3);
sys/dev/ral/rt2860.c
2139
rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
sys/dev/ral/rt2860.c
2154
tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;
sys/dev/ral/rt2860.c
220
uint8_t val;
sys/dev/ral/rt2860.c
2657
rt3090_def_rf[i].val);
sys/dev/ral/rt2860.c
2753
rt5392_def_rf[i].val);
sys/dev/ral/rt2860.c
2758
rt5390_def_rf[i].val);
sys/dev/ral/rt2860.c
2910
uint8_t *val)
sys/dev/ral/rt2860.c
2959
*val = rf24;
sys/dev/ral/rt2860.c
3000
rt3090_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);
sys/dev/ral/rt2860.c
3213
uint32_t val = arc4random();
sys/dev/ral/rt2860.c
3215
if (val >= 0x03ff00 && (val & 0xf8ff00) == 0x00ff00)
sys/dev/ral/rt2860.c
3216
val += 0x000100;
sys/dev/ral/rt2860.c
3217
iv[0] = val;
sys/dev/ral/rt2860.c
3218
iv[1] = val >> 8;
sys/dev/ral/rt2860.c
3219
iv[2] = val >> 16;
sys/dev/ral/rt2860.c
3351
uint16_t val;
sys/dev/ral/rt2860.c
3365
val = rt2860_srom_read(sc, RT2860_EEPROM_VERSION);
sys/dev/ral/rt2860.c
3366
DPRINTF(("EEPROM rev=%d, FAE=%d\n", val >> 8, val & 0xff));
sys/dev/ral/rt2860.c
3370
val = rt2860_srom_read(sc, RT2860_EEPROM_MAC01);
sys/dev/ral/rt2860.c
3371
macaddr[0] = val & 0xff;
sys/dev/ral/rt2860.c
3372
macaddr[1] = val >> 8;
sys/dev/ral/rt2860.c
3373
val = rt2860_srom_read(sc, RT2860_EEPROM_MAC23);
sys/dev/ral/rt2860.c
3374
macaddr[2] = val & 0xff;
sys/dev/ral/rt2860.c
3375
macaddr[3] = val >> 8;
sys/dev/ral/rt2860.c
3376
val = rt2860_srom_read(sc, RT2860_EEPROM_MAC45);
sys/dev/ral/rt2860.c
3377
macaddr[4] = val & 0xff;
sys/dev/ral/rt2860.c
3378
macaddr[5] = val >> 8;
sys/dev/ral/rt2860.c
3382
val = rt2860_srom_read(sc, RT2860_EEPROM_COUNTRY);
sys/dev/ral/rt2860.c
3383
DPRINTF(("EEPROM region code=0x%04x\n", val));
sys/dev/ral/rt2860.c
3388
val = rt2860_srom_read(sc, RT2860_EEPROM_BBP_BASE + i);
sys/dev/ral/rt2860.c
3389
sc->bbp[i].val = val & 0xff;
sys/dev/ral/rt2860.c
3390
sc->bbp[i].reg = val >> 8;
sys/dev/ral/rt2860.c
3391
DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val));
sys/dev/ral/rt2860.c
3396
val = rt2860_srom_read(sc, RT3071_EEPROM_RF_BASE + i);
sys/dev/ral/rt2860.c
3397
sc->rf[i].val = val & 0xff;
sys/dev/ral/rt2860.c
3398
sc->rf[i].reg = val >> 8;
sys/dev/ral/rt2860.c
3400
sc->rf[i].val));
sys/dev/ral/rt2860.c
3405
val = rt2860_srom_read(sc, RT2860_EEPROM_FREQ_LEDS);
sys/dev/ral/rt2860.c
3406
sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;
sys/dev/ral/rt2860.c
3408
if ((val >> 8) != 0xff) {
sys/dev/ral/rt2860.c
3410
sc->leds = val >> 8;
sys/dev/ral/rt2860.c
3425
val = rt2860_srom_read(sc, RT2860_EEPROM_ANTENNA);
sys/dev/ral/rt2860.c
3429
sc->rf_rev = (val >> 8) & 0xf;
sys/dev/ral/rt2860.c
3430
sc->ntxchains = (val >> 4) & 0xf;
sys/dev/ral/rt2860.c
3431
sc->nrxchains = val & 0xf;
sys/dev/ral/rt2860.c
3436
val = rt2860_srom_read(sc, RT2860_EEPROM_CONFIG);
sys/dev/ral/rt2860.c
3437
DPRINTF(("EEPROM CFG 0x%04x\n", val));
sys/dev/ral/rt2860.c
3439
if ((val >> 8) != 0xff)
sys/dev/ral/rt2860.c
3440
sc->patch_dac = (val >> 15) & 1;
sys/dev/ral/rt2860.c
3441
if ((val & 0xff) != 0xff) {
sys/dev/ral/rt2860.c
3442
sc->ext_5ghz_lna = (val >> 3) & 1;
sys/dev/ral/rt2860.c
3443
sc->ext_2ghz_lna = (val >> 2) & 1;
sys/dev/ral/rt2860.c
3447
sc->rfswitch = val & 1;
sys/dev/ral/rt2860.c
3451
val = rt2860_srom_read(sc, RT2860_EEPROM_PCIE_PSLEVEL);
sys/dev/ral/rt2860.c
3452
if ((val & 0xff) != 0xff) {
sys/dev/ral/rt2860.c
3453
sc->pslevel = val & 0x3;
sys/dev/ral/rt2860.c
3454
val = rt2860_srom_read(sc, RT2860_EEPROM_REV);
sys/dev/ral/rt2860.c
3455
if ((val & 0xff80) != 0x9280)
sys/dev/ral/rt2860.c
3463
val = rt2860_srom_read(sc,
sys/dev/ral/rt2860.c
3465
sc->txpow1[i + 0] = (int8_t)(val & 0xff);
sys/dev/ral/rt2860.c
3466
sc->txpow1[i + 1] = (int8_t)(val >> 8);
sys/dev/ral/rt2860.c
3469
val = rt2860_srom_read(sc,
sys/dev/ral/rt2860.c
3471
sc->txpow2[i + 0] = (int8_t)(val & 0xff);
sys/dev/ral/rt2860.c
3472
sc->txpow2[i + 1] = (int8_t)(val >> 8);
sys/dev/ral/rt2860.c
3490
val = rt2860_srom_read(sc,
sys/dev/ral/rt2860.c
3492
sc->txpow1[i + 14] = (int8_t)(val & 0xff);
sys/dev/ral/rt2860.c
3493
sc->txpow1[i + 15] = (int8_t)(val >> 8);
sys/dev/ral/rt2860.c
3495
val = rt2860_srom_read(sc,
sys/dev/ral/rt2860.c
3497
sc->txpow2[i + 14] = (int8_t)(val & 0xff);
sys/dev/ral/rt2860.c
3498
sc->txpow2[i + 15] = (int8_t)(val >> 8);
sys/dev/ral/rt2860.c
3512
val = rt2860_srom_read(sc, RT2860_EEPROM_DELTAPWR);
sys/dev/ral/rt2860.c
3514
if ((val & 0xff) != 0xff && (val & 0x80)) {
sys/dev/ral/rt2860.c
3515
delta_2ghz = val & 0xf;
sys/dev/ral/rt2860.c
3516
if (!(val & 0x40)) /* negative number */
sys/dev/ral/rt2860.c
3519
val >>= 8;
sys/dev/ral/rt2860.c
3520
if ((val & 0xff) != 0xff && (val & 0x80)) {
sys/dev/ral/rt2860.c
3521
delta_5ghz = val & 0xf;
sys/dev/ral/rt2860.c
3522
if (!(val & 0x40)) /* negative number */
sys/dev/ral/rt2860.c
3531
val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2);
sys/dev/ral/rt2860.c
3532
reg = val;
sys/dev/ral/rt2860.c
3533
val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1);
sys/dev/ral/rt2860.c
3534
reg |= (uint32_t)val << 16;
sys/dev/ral/rt2860.c
3546
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_2GHZ);
sys/dev/ral/rt2860.c
3547
sc->tssi_2ghz[0] = val & 0xff; /* [-4] */
sys/dev/ral/rt2860.c
3548
sc->tssi_2ghz[1] = val >> 8; /* [-3] */
sys/dev/ral/rt2860.c
3549
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_2GHZ);
sys/dev/ral/rt2860.c
3550
sc->tssi_2ghz[2] = val & 0xff; /* [-2] */
sys/dev/ral/rt2860.c
3551
sc->tssi_2ghz[3] = val >> 8; /* [-1] */
sys/dev/ral/rt2860.c
3552
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_2GHZ);
sys/dev/ral/rt2860.c
3553
sc->tssi_2ghz[4] = val & 0xff; /* [+0] */
sys/dev/ral/rt2860.c
3554
sc->tssi_2ghz[5] = val >> 8; /* [+1] */
sys/dev/ral/rt2860.c
3555
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_2GHZ);
sys/dev/ral/rt2860.c
3556
sc->tssi_2ghz[6] = val & 0xff; /* [+2] */
sys/dev/ral/rt2860.c
3557
sc->tssi_2ghz[7] = val >> 8; /* [+3] */
sys/dev/ral/rt2860.c
3558
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_2GHZ);
sys/dev/ral/rt2860.c
3559
sc->tssi_2ghz[8] = val & 0xff; /* [+4] */
sys/dev/ral/rt2860.c
3560
sc->step_2ghz = val >> 8;
sys/dev/ral/rt2860.c
3570
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_5GHZ);
sys/dev/ral/rt2860.c
3571
sc->tssi_5ghz[0] = val & 0xff; /* [-4] */
sys/dev/ral/rt2860.c
3572
sc->tssi_5ghz[1] = val >> 8; /* [-3] */
sys/dev/ral/rt2860.c
3573
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_5GHZ);
sys/dev/ral/rt2860.c
3574
sc->tssi_5ghz[2] = val & 0xff; /* [-2] */
sys/dev/ral/rt2860.c
3575
sc->tssi_5ghz[3] = val >> 8; /* [-1] */
sys/dev/ral/rt2860.c
3576
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_5GHZ);
sys/dev/ral/rt2860.c
3577
sc->tssi_5ghz[4] = val & 0xff; /* [+0] */
sys/dev/ral/rt2860.c
3578
sc->tssi_5ghz[5] = val >> 8; /* [+1] */
sys/dev/ral/rt2860.c
3579
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_5GHZ);
sys/dev/ral/rt2860.c
3580
sc->tssi_5ghz[6] = val & 0xff; /* [+2] */
sys/dev/ral/rt2860.c
3581
sc->tssi_5ghz[7] = val >> 8; /* [+3] */
sys/dev/ral/rt2860.c
3582
val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_5GHZ);
sys/dev/ral/rt2860.c
3583
sc->tssi_5ghz[8] = val & 0xff; /* [+4] */
sys/dev/ral/rt2860.c
3584
sc->step_5ghz = val >> 8;
sys/dev/ral/rt2860.c
3595
val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ);
sys/dev/ral/rt2860.c
3596
sc->rssi_2ghz[0] = val & 0xff; /* Ant A */
sys/dev/ral/rt2860.c
3597
sc->rssi_2ghz[1] = val >> 8; /* Ant B */
sys/dev/ral/rt2860.c
3598
val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ);
sys/dev/ral/rt2860.c
3604
if ((val & 0xff) != 0xff)
sys/dev/ral/rt2860.c
3605
sc->txmixgain_2ghz = val & 0x7;
sys/dev/ral/rt2860.c
3608
sc->rssi_2ghz[2] = val & 0xff; /* Ant C */
sys/dev/ral/rt2860.c
3609
sc->lna[2] = val >> 8; /* channel group 2 */
sys/dev/ral/rt2860.c
3611
val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ);
sys/dev/ral/rt2860.c
3612
sc->rssi_5ghz[0] = val & 0xff; /* Ant A */
sys/dev/ral/rt2860.c
3613
sc->rssi_5ghz[1] = val >> 8; /* Ant B */
sys/dev/ral/rt2860.c
3614
val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ);
sys/dev/ral/rt2860.c
3615
sc->rssi_5ghz[2] = val & 0xff; /* Ant C */
sys/dev/ral/rt2860.c
3616
sc->lna[3] = val >> 8; /* channel group 3 */
sys/dev/ral/rt2860.c
3618
val = rt2860_srom_read(sc, RT2860_EEPROM_LNA);
sys/dev/ral/rt2860.c
3622
sc->lna[0] = val & 0xff;
sys/dev/ral/rt2860.c
3623
sc->lna[1] = val >> 8; /* channel group 1 */
sys/dev/ral/rt2860.c
3675
rt2860_def_bbp[i].val);
sys/dev/ral/rt2860.c
3713
rt5390_def_bbp[i].val);
sys/dev/ral/rt2860.c
3879
RAL_WRITE(sc, rt2860_def_mac[i].reg, rt2860_def_mac[i].val);
sys/dev/ral/rt2860.c
3973
rt2860_mcu_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);
sys/dev/ral/rt2860reg.h
1000
#define RAL_WRITE(sc, reg, val) \
sys/dev/ral/rt2860reg.h
1001
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/ral/rt2860reg.h
1015
#define RAL_SET_REGION_4(sc, offset, val, count) \
sys/dev/ral/rt2860reg.h
1017
(val), (count))
sys/dev/ral/rt2860reg.h
1022
#define RT2860_EEPROM_CTL(sc, val) do { \
sys/dev/ral/rt2860reg.h
1023
RAL_WRITE((sc), RT2860_PCI_EECTRL, (val)); \
sys/dev/ral/rt2860var.h
188
uint8_t val;
sys/dev/random/armv8rng.c
56
u_long val;
sys/dev/random/armv8rng.c
66
: "=&r" (val), "=&r"(ret) :: "cc");
sys/dev/random/armv8rng.c
70
*buf = val;
sys/dev/random/random_harvestq.c
378
uint32_t val[HARVESTSIZE + 1];
sys/dev/random/random_harvestq.c
380
copy_event(val, event);
sys/dev/random/random_harvestq.c
381
if (memcmp(val, ht->ht_rct_value, sizeof(ht->ht_rct_value)) != 0) {
sys/dev/random/random_harvestq.c
383
memcpy(ht->ht_rct_value, val, sizeof(ht->ht_rct_value));
sys/dev/random/random_harvestq.c
404
uint32_t val[HARVESTSIZE + 1];
sys/dev/random/random_harvestq.c
411
copy_event(val, event);
sys/dev/random/random_harvestq.c
412
if (memcmp(val, ht->ht_apt_value, sizeof(ht->ht_apt_value)) == 0) {
sys/dev/rccgpio/rccgpio.c
202
rcc_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/dev/rccgpio/rccgpio.c
217
*val = (value & (1 << rcc_pins[pin].pin)) ? 1 : 0;
sys/dev/regulator/regulator_fixed.c
262
uint32_t val;
sys/dev/regulator/regulator_fixed.c
274
rv = GPIO_PIN_GET(pin->dev, pin->pin, &val);
sys/dev/regulator/regulator_fixed.c
276
if (!sc->param->enable_active_high ^ (val != 0))
sys/dev/rge/if_rge.c
1089
uint32_t rxconf, val;
sys/dev/rge/if_rge.c
1158
val = rge_read_csi(sc, 0x70c) & ~0x3f000000;
sys/dev/rge/if_rge.c
1159
rge_write_csi(sc, 0x70c, val | 0x27000000);
sys/dev/rge/if_rge.c
1163
val = rge_read_csi(sc, 0x890) & ~0x00000001;
sys/dev/rge/if_rge.c
1164
rge_write_csi(sc, 0x890, val);
sys/dev/rge/if_rge.c
1170
val = RGE_READ_2(sc, RGE_RXQUEUE_CTRL) & ~0x001c;
sys/dev/rge/if_rge.c
1171
RGE_WRITE_2(sc, RGE_RXQUEUE_CTRL, val | (fls(sc->sc_nqueues) - 1) << 2);
sys/dev/rge/if_rge.c
1189
val = rge_read_mac_ocp(sc, 0xe614);
sys/dev/rge/if_rge.c
1190
val &= (sc->rge_type == MAC_R27) ? ~0x0f00 : ~0x0700;
sys/dev/rge/if_rge.c
1192
rge_write_mac_ocp(sc, 0xe614, val | 0x0300);
sys/dev/rge/if_rge.c
1194
rge_write_mac_ocp(sc, 0xe614, val | 0x0200);
sys/dev/rge/if_rge.c
1196
rge_write_mac_ocp(sc, 0xe614, val | 0x0300);
sys/dev/rge/if_rge.c
1198
rge_write_mac_ocp(sc, 0xe614, val | 0x0f00);
sys/dev/rge/if_rge.c
1200
val = rge_read_mac_ocp(sc, 0xe63e) & ~0x0c00;
sys/dev/rge/if_rge.c
1201
rge_write_mac_ocp(sc, 0xe63e, val |
sys/dev/rge/if_rge.c
1204
val = rge_read_mac_ocp(sc, 0xe63e) & ~0x0030;
sys/dev/rge/if_rge.c
1205
rge_write_mac_ocp(sc, 0xe63e, val | 0x0020);
sys/dev/rge/if_rge.c
1212
val = rge_read_mac_ocp(sc, 0xeb6a) & ~0x00ff;
sys/dev/rge/if_rge.c
1213
rge_write_mac_ocp(sc, 0xeb6a, val | 0x0033);
sys/dev/rge/if_rge.c
1215
val = rge_read_mac_ocp(sc, 0xeb50) & ~0x03e0;
sys/dev/rge/if_rge.c
1216
rge_write_mac_ocp(sc, 0xeb50, val | 0x0040);
sys/dev/rge/if_rge.c
1224
val = rge_read_mac_ocp(sc, 0xea1c) & ~0x0003;
sys/dev/rge/if_rge.c
1225
rge_write_mac_ocp(sc, 0xea1c, val | 0x0001);
sys/dev/rge/if_rge.c
1235
val = rge_read_mac_ocp(sc, 0xd430) & ~0x0fff;
sys/dev/rge/if_rge.c
1236
rge_write_mac_ocp(sc, 0xd430, val | 0x045f);
sys/dev/rge/if_rge.c
1261
val = rge_read_mac_ocp(sc, 0xd40c) & ~0xe038;
sys/dev/rge/if_rge.c
1262
rge_write_phy_ocp(sc, 0xd40c, val | 0x8020);
sys/dev/rge/if_rge.c
1295
val = rge_read_csi(sc, 0x98) & ~0x0000ff00;
sys/dev/rge/if_rge.c
1296
rge_write_csi(sc, 0x98, val);
sys/dev/rge/if_rge.c
1299
val = rge_read_mac_ocp(sc, 0xe092) & ~0x00ff;
sys/dev/rge/if_rge.c
1300
rge_write_mac_ocp(sc, 0xe092, val | 0x0008);
sys/dev/rge/if_rge.c
1427
int anar, gig, val;
sys/dev/rge/if_rge.c
1438
val = rge_read_phy_ocp(sc, 0xa5d4);
sys/dev/rge/if_rge.c
1441
val &= ~RGE_ADV_10000TFDX;
sys/dev/rge/if_rge.c
1445
val &= ~RGE_ADV_5000TFDX;
sys/dev/rge/if_rge.c
1448
val &= ~RGE_ADV_2500TFDX;
sys/dev/rge/if_rge.c
1457
val |= RGE_ADV_2500TFDX;
sys/dev/rge/if_rge.c
1459
val |= RGE_ADV_5000TFDX;
sys/dev/rge/if_rge.c
1461
val |= RGE_ADV_5000TFDX | RGE_ADV_10000TFDX;
sys/dev/rge/if_rge.c
1464
val |= RGE_ADV_10000TFDX;
sys/dev/rge/if_rge.c
1468
val |= RGE_ADV_5000TFDX;
sys/dev/rge/if_rge.c
1472
val |= RGE_ADV_2500TFDX;
sys/dev/rge/if_rge.c
1500
rge_write_phy_ocp(sc, 0xa5d4, val);
sys/dev/rge/if_rge_hw.c
1000
rge_write_phy_ocp(sc, 0xbd96, val | 0x1000);
sys/dev/rge/if_rge_hw.c
1001
val = rge_read_phy_ocp(sc, 0xbf1c) & ~0x0007;
sys/dev/rge/if_rge_hw.c
1002
rge_write_phy_ocp(sc, 0xbf1c, val | 0x0007);
sys/dev/rge/if_rge_hw.c
1004
val = rge_read_phy_ocp(sc, 0xbf40) & ~0x0380;
sys/dev/rge/if_rge_hw.c
1005
rge_write_phy_ocp(sc, 0xbf40, val | 0x0280);
sys/dev/rge/if_rge_hw.c
1006
val = rge_read_phy_ocp(sc, 0xbf90) & ~0x0080;
sys/dev/rge/if_rge_hw.c
1007
rge_write_phy_ocp(sc, 0xbf90, val | 0x0060);
sys/dev/rge/if_rge_hw.c
1008
val = rge_read_phy_ocp(sc, 0xbf90) & ~0x0010;
sys/dev/rge/if_rge_hw.c
1009
rge_write_phy_ocp(sc, 0xbf90, val | 0x000c);
sys/dev/rge/if_rge_hw.c
1013
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1014
rge_write_phy_ocp(sc, 0xa438, val | 0x2000);
sys/dev/rge/if_rge_hw.c
1016
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1017
rge_write_phy_ocp(sc, 0xa438, val | 0x2000);
sys/dev/rge/if_rge_hw.c
1026
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1027
rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);
sys/dev/rge/if_rge_hw.c
1029
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1030
rge_write_phy_ocp(sc, 0xb87e, val | 0);
sys/dev/rge/if_rge_hw.c
1032
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1033
rge_write_phy_ocp(sc, 0xb87e, val | 0x7f00);
sys/dev/rge/if_rge_hw.c
1035
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1036
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1046
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1047
rge_write_phy_ocp(sc, 0xb87e, val | 0x0400);
sys/dev/rge/if_rge_hw.c
1051
val = rge_read_phy_ocp(sc, 0xac3c) & ~0xd000;
sys/dev/rge/if_rge_hw.c
1052
rge_write_phy_ocp(sc, 0xac3c, val | 0x2000);
sys/dev/rge/if_rge_hw.c
1053
val = rge_read_phy_ocp(sc, 0xac42) & ~0x0200;
sys/dev/rge/if_rge_hw.c
1054
rge_write_phy_ocp(sc, 0xac42, val | 0x01c0);
sys/dev/rge/if_rge_hw.c
1057
val = rge_read_phy_ocp(sc, 0xac42) & ~0x0002;
sys/dev/rge/if_rge_hw.c
1058
rge_write_phy_ocp(sc, 0xac42, val | 0x0005);
sys/dev/rge/if_rge_hw.c
1063
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1064
rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);
sys/dev/rge/if_rge_hw.c
1066
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1067
rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);
sys/dev/rge/if_rge_hw.c
1069
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1070
rge_write_phy_ocp(sc, 0xb87e, val | 0x0b00);
sys/dev/rge/if_rge_hw.c
1072
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1073
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1075
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1076
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1078
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1079
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1081
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1082
rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);
sys/dev/rge/if_rge_hw.c
1084
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1085
rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);
sys/dev/rge/if_rge_hw.c
1087
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1088
rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);
sys/dev/rge/if_rge_hw.c
1090
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1091
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1093
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1094
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1096
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1097
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1100
val = rge_read_phy_ocp(sc, 0xade8) & ~0xffc0;
sys/dev/rge/if_rge_hw.c
1101
rge_write_phy_ocp(sc, 0xade8, val | 0x1400);
sys/dev/rge/if_rge_hw.c
1103
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1104
rge_write_phy_ocp(sc, 0xb87e, val | 0x9d00);
sys/dev/rge/if_rge_hw.c
1112
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1113
rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00);
sys/dev/rge/if_rge_hw.c
1120
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1121
rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00);
sys/dev/rge/if_rge_hw.c
1130
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1131
rge_write_phy_ocp(sc, 0xb87e, val | 0);
sys/dev/rge/if_rge_hw.c
1132
val = rge_read_phy_ocp(sc, 0xb54c) & ~0xffc0;
sys/dev/rge/if_rge_hw.c
1133
rge_write_phy_ocp(sc, 0xb54c, val | 0x3700);
sys/dev/rge/if_rge_hw.c
1139
uint16_t val;
sys/dev/rge/if_rge_hw.c
1153
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1154
rge_write_phy_ocp(sc, 0xa438, val | 0x5900);
sys/dev/rge/if_rge_hw.c
1160
val = rge_read_phy_ocp(sc, 0xae06) & ~0xfc00;
sys/dev/rge/if_rge_hw.c
1161
rge_write_phy_ocp(sc, 0xae06, val | 0x7c00);
sys/dev/rge/if_rge_hw.c
1163
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1164
rge_write_phy_ocp(sc, 0xb87e, val | 0xe600);
sys/dev/rge/if_rge_hw.c
1166
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1167
rge_write_phy_ocp(sc, 0xb87e, val | 0x3000);
sys/dev/rge/if_rge_hw.c
1169
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1170
rge_write_phy_ocp(sc, 0xb87e, val | 0x3000);
sys/dev/rge/if_rge_hw.c
1174
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1175
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1177
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1178
rge_write_phy_ocp(sc, 0xb87e, val | 0x0200);
sys/dev/rge/if_rge_hw.c
1180
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1181
rge_write_phy_ocp(sc, 0xb87e, val | 0x0400);
sys/dev/rge/if_rge_hw.c
1183
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1184
rge_write_phy_ocp(sc, 0xa438, val | 0x7700);
sys/dev/rge/if_rge_hw.c
1193
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1194
rge_write_phy_ocp(sc, 0xa438, val | 0x2900);
sys/dev/rge/if_rge_hw.c
1196
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1197
rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);
sys/dev/rge/if_rge_hw.c
1199
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1200
rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);
sys/dev/rge/if_rge_hw.c
1202
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1203
rge_write_phy_ocp(sc, 0xb87e, val | 0x0b00);
sys/dev/rge/if_rge_hw.c
1205
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1206
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1208
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1209
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1211
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1212
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1214
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1215
rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);
sys/dev/rge/if_rge_hw.c
1217
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1218
rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);
sys/dev/rge/if_rge_hw.c
1220
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1221
rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);
sys/dev/rge/if_rge_hw.c
1223
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1224
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1226
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1227
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1229
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1230
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1232
val = rge_read_phy_ocp(sc, 0xade8) & ~0xffc0;
sys/dev/rge/if_rge_hw.c
1233
rge_write_phy_ocp(sc, 0xade8, val | 0x1400);
sys/dev/rge/if_rge_hw.c
1235
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1236
rge_write_phy_ocp(sc, 0xb87e, val | 0x9d00);
sys/dev/rge/if_rge_hw.c
1238
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1239
rge_write_phy_ocp(sc, 0xb87e, val | 0x1200);
sys/dev/rge/if_rge_hw.c
1252
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1253
rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00);
sys/dev/rge/if_rge_hw.c
1258
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1259
rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00);
sys/dev/rge/if_rge_hw.c
1263
val = rge_read_phy_ocp(sc, 0xb54c) & ~0xffc0;
sys/dev/rge/if_rge_hw.c
1264
rge_write_phy_ocp(sc, 0xb54c, val | 0x3700);
sys/dev/rge/if_rge_hw.c
1267
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1268
rge_write_phy_ocp(sc, 0xb87e, val | 0x5d00);
sys/dev/rge/if_rge_hw.c
1270
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1271
rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);
sys/dev/rge/if_rge_hw.c
1273
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1274
rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);
sys/dev/rge/if_rge_hw.c
1280
uint16_t val;
sys/dev/rge/if_rge_hw.c
1297
val = rge_read_phy_ocp(sc, 0xad16) & ~0x03ff;
sys/dev/rge/if_rge_hw.c
1298
rge_write_phy_ocp(sc, 0xad16, val | 0x03ff);
sys/dev/rge/if_rge_hw.c
1299
val = rge_read_phy_ocp(sc, 0xad32) & ~0x003f;
sys/dev/rge/if_rge_hw.c
1300
rge_write_phy_ocp(sc, 0xad32, val | 0x0006);
sys/dev/rge/if_rge_hw.c
1303
val = rge_read_phy_ocp(sc, 0xacc0) & ~0x0003;
sys/dev/rge/if_rge_hw.c
1304
rge_write_phy_ocp(sc, 0xacc0, val | 0x0002);
sys/dev/rge/if_rge_hw.c
1305
val = rge_read_phy_ocp(sc, 0xad40) & ~0x00e0;
sys/dev/rge/if_rge_hw.c
1306
rge_write_phy_ocp(sc, 0xad40, val | 0x0040);
sys/dev/rge/if_rge_hw.c
1307
val = rge_read_phy_ocp(sc, 0xad40) & ~0x0007;
sys/dev/rge/if_rge_hw.c
1308
rge_write_phy_ocp(sc, 0xad40, val | 0x0004);
sys/dev/rge/if_rge_hw.c
1311
val = rge_read_phy_ocp(sc, 0xac5e) & ~0x0007;
sys/dev/rge/if_rge_hw.c
1312
rge_write_phy_ocp(sc, 0xac5e, val | 0x0002);
sys/dev/rge/if_rge_hw.c
1315
val = rge_read_phy_ocp(sc, 0xac8a) & ~0x00f0;
sys/dev/rge/if_rge_hw.c
1316
rge_write_phy_ocp(sc, 0xac8a, val | 0x0030);
sys/dev/rge/if_rge_hw.c
1318
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1319
rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);
sys/dev/rge/if_rge_hw.c
1321
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1322
rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);
sys/dev/rge/if_rge_hw.c
1351
val = rge_read_phy_ocp(sc, 0xb54c) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1352
rge_write_phy_ocp(sc, 0xb54c, val | 0xdb00);
sys/dev/rge/if_rge_hw.c
1364
uint16_t val;
sys/dev/rge/if_rge_hw.c
1370
val = rge_read_phy_ocp(sc, 0xac46) & ~0x00f0;
sys/dev/rge/if_rge_hw.c
1371
rge_write_phy_ocp(sc, 0xac46, val | 0x0090);
sys/dev/rge/if_rge_hw.c
1372
val = rge_read_phy_ocp(sc, 0xad30) & ~0x0003;
sys/dev/rge/if_rge_hw.c
1373
rge_write_phy_ocp(sc, 0xad30, val | 0x0001);
sys/dev/rge/if_rge_hw.c
1379
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1380
rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);
sys/dev/rge/if_rge_hw.c
1381
val = rge_read_phy_ocp(sc, 0xbf00) & ~0xe000;
sys/dev/rge/if_rge_hw.c
1382
rge_write_phy_ocp(sc, 0xbf00, val | 0xa000);
sys/dev/rge/if_rge_hw.c
1383
val = rge_read_phy_ocp(sc, 0xbf46) & ~0x0f00;
sys/dev/rge/if_rge_hw.c
1384
rge_write_phy_ocp(sc, 0xbf46, val | 0x0300);
sys/dev/rge/if_rge_hw.c
1390
val = rge_read_phy_ocp(sc, 0xbf84) & ~0xe000;
sys/dev/rge/if_rge_hw.c
1391
rge_write_phy_ocp(sc, 0xbf84, val | 0xa000);
sys/dev/rge/if_rge_hw.c
1393
val = rge_read_phy_ocp(sc, 0xa438) & ~0x2700;
sys/dev/rge/if_rge_hw.c
1394
rge_write_phy_ocp(sc, 0xa438, val | 0xd800);
sys/dev/rge/if_rge_hw.c
1401
uint16_t val;
sys/dev/rge/if_rge_hw.c
1410
val = rge_read_phy_ocp(sc, 0xbf94) & ~0x0007;
sys/dev/rge/if_rge_hw.c
1411
rge_write_phy_ocp(sc, 0xbf94, val | 0x0005);
sys/dev/rge/if_rge_hw.c
1412
val = rge_read_phy_ocp(sc, 0xbf8e) & ~0x3c00;
sys/dev/rge/if_rge_hw.c
1413
rge_write_phy_ocp(sc, 0xbf8e, val | 0x2800);
sys/dev/rge/if_rge_hw.c
1414
val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;
sys/dev/rge/if_rge_hw.c
1415
rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000);
sys/dev/rge/if_rge_hw.c
1417
val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;
sys/dev/rge/if_rge_hw.c
1418
rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000);
sys/dev/rge/if_rge_hw.c
1419
val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f;
sys/dev/rge/if_rge_hw.c
1420
rge_write_phy_ocp(sc, 0xbc80, val | 0x0004);
sys/dev/rge/if_rge_hw.c
1423
val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f;
sys/dev/rge/if_rge_hw.c
1424
rge_write_phy_ocp(sc, 0xbc80, val | 0x0005);
sys/dev/rge/if_rge_hw.c
1425
val = rge_read_phy_ocp(sc, 0xbc82) & ~0x00e0;
sys/dev/rge/if_rge_hw.c
1426
rge_write_phy_ocp(sc, 0xbc82, val | 0x0040);
sys/dev/rge/if_rge_hw.c
1429
val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;
sys/dev/rge/if_rge_hw.c
1430
rge_write_phy_ocp(sc, 0xbcd8, val | 0x8000);
sys/dev/rge/if_rge_hw.c
1439
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1440
rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);
sys/dev/rge/if_rge_hw.c
1441
val = rge_read_phy_ocp(sc, 0xb106) & ~0x0700;
sys/dev/rge/if_rge_hw.c
1442
rge_write_phy_ocp(sc, 0xb106, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1443
val = rge_read_phy_ocp(sc, 0xb206) & ~0x0700;
sys/dev/rge/if_rge_hw.c
1444
rge_write_phy_ocp(sc, 0xb206, val | 0x0200);
sys/dev/rge/if_rge_hw.c
1445
val = rge_read_phy_ocp(sc, 0xb306) & ~0x0700;
sys/dev/rge/if_rge_hw.c
1446
rge_write_phy_ocp(sc, 0xb306, val | 0x0300);
sys/dev/rge/if_rge_hw.c
1448
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1449
rge_write_phy_ocp(sc, 0xb87e, val | 0x0300);
sys/dev/rge/if_rge_hw.c
1454
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1455
rge_write_phy_ocp(sc, 0xb87e, val | 0x0200);
sys/dev/rge/if_rge_hw.c
1458
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1459
rge_write_phy_ocp(sc, 0xb87e, val | 0x0100);
sys/dev/rge/if_rge_hw.c
1461
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1462
rge_write_phy_ocp(sc, 0xb87e, val | 0x0600);
sys/dev/rge/if_rge_hw.c
1464
val = rge_read_phy_ocp(sc, 0xac7e) & ~0x01fc;
sys/dev/rge/if_rge_hw.c
1465
rge_write_phy_ocp(sc, 0xac7e, val | 0x00B4);
sys/dev/rge/if_rge_hw.c
1467
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1468
rge_write_phy_ocp(sc, 0xb87e, val | 0x7a00);
sys/dev/rge/if_rge_hw.c
1470
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1471
rge_write_phy_ocp(sc, 0xb87e, val | 0x3a00);
sys/dev/rge/if_rge_hw.c
1473
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1474
rge_write_phy_ocp(sc, 0xb87e, val | 0x7400);
sys/dev/rge/if_rge_hw.c
1476
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1477
rge_write_phy_ocp(sc, 0xb87e, val | 0x3400);
sys/dev/rge/if_rge_hw.c
1479
val = rge_read_phy_ocp(sc, 0xad66) & ~0x000f;
sys/dev/rge/if_rge_hw.c
1480
rge_write_phy_ocp(sc, 0xad66, val | 0x0007);
sys/dev/rge/if_rge_hw.c
1481
val = rge_read_phy_ocp(sc, 0xad68) & ~0xf000;
sys/dev/rge/if_rge_hw.c
1482
rge_write_phy_ocp(sc, 0xad68, val | 0x8000);
sys/dev/rge/if_rge_hw.c
1483
val = rge_read_phy_ocp(sc, 0xad68) & ~0x0f00;
sys/dev/rge/if_rge_hw.c
1484
rge_write_phy_ocp(sc, 0xad68, val | 0x0500);
sys/dev/rge/if_rge_hw.c
1485
val = rge_read_phy_ocp(sc, 0xad68) & ~0x000f;
sys/dev/rge/if_rge_hw.c
1486
rge_write_phy_ocp(sc, 0xad68, val | 0x0002);
sys/dev/rge/if_rge_hw.c
1487
val = rge_read_phy_ocp(sc, 0xad6a) & ~0xf000;
sys/dev/rge/if_rge_hw.c
1488
rge_write_phy_ocp(sc, 0xad6a, val | 0x7000);
sys/dev/rge/if_rge_hw.c
1491
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1492
rge_write_phy_ocp(sc, 0xa438, val | 0x5400);
sys/dev/rge/if_rge_hw.c
1493
val = rge_read_phy_ocp(sc, 0xa864) & ~0x00f0;
sys/dev/rge/if_rge_hw.c
1494
rge_write_phy_ocp(sc, 0xa864, val | 0x00c0);
sys/dev/rge/if_rge_hw.c
1495
val = rge_read_phy_ocp(sc, 0xa42c) & ~0x00ff;
sys/dev/rge/if_rge_hw.c
1496
rge_write_phy_ocp(sc, 0xa42c, val | 0x0002);
sys/dev/rge/if_rge_hw.c
1498
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1499
rge_write_phy_ocp(sc, 0xa438, val | 0x0f00);
sys/dev/rge/if_rge_hw.c
1501
val = rge_read_phy_ocp(sc, 0xa438) & ~0xf000;
sys/dev/rge/if_rge_hw.c
1502
rge_write_phy_ocp(sc, 0xa438, val | 0x0700);
sys/dev/rge/if_rge_hw.c
1507
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1508
rge_write_phy_ocp(sc, 0xa438, val | 0xca00);
sys/dev/rge/if_rge_hw.c
1510
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1511
rge_write_phy_ocp(sc, 0xa438, val | 0xb300);
sys/dev/rge/if_rge_hw.c
1515
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1516
rge_write_phy_ocp(sc, 0xa438, val | 0xca00);
sys/dev/rge/if_rge_hw.c
1518
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1519
rge_write_phy_ocp(sc, 0xa438, val | 0xbb00);
sys/dev/rge/if_rge_hw.c
1525
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1526
rge_write_phy_ocp(sc, 0xa438, val | 0x5800);
sys/dev/rge/if_rge_hw.c
1534
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1535
rge_write_phy_ocp(sc, 0xa438, val | 0x1400);
sys/dev/rge/if_rge_hw.c
1542
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1543
rge_write_phy_ocp(sc, 0xa438, val | 0x0600);
sys/dev/rge/if_rge_hw.c
1545
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1546
rge_write_phy_ocp(sc, 0xa438, val | 0x0500);
sys/dev/rge/if_rge_hw.c
1548
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1549
rge_write_phy_ocp(sc, 0xa438, val | 0x1f00);
sys/dev/rge/if_rge_hw.c
1551
val = rge_read_phy_ocp(sc, 0xbc3a) & ~0x000f;
sys/dev/rge/if_rge_hw.c
1552
rge_write_phy_ocp(sc, 0xbc3a, val | 0x0006);
sys/dev/rge/if_rge_hw.c
1557
val = rge_read_phy_ocp(sc, 0xbfa0) & ~0xff70;
sys/dev/rge/if_rge_hw.c
1558
rge_write_phy_ocp(sc, 0xbfa0, val | 0x5500);
sys/dev/rge/if_rge_hw.c
1561
val = rge_read_phy_ocp(sc, 0xa438) & ~0x0700;
sys/dev/rge/if_rge_hw.c
1562
rge_write_phy_ocp(sc, 0xa438, val | 0x0200);
sys/dev/rge/if_rge_hw.c
1573
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1574
rge_write_phy_ocp(sc, 0xa438, val | 0x2900);
sys/dev/rge/if_rge_hw.c
1577
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1578
rge_write_phy_ocp(sc, 0xa438, val | 0x1700);
sys/dev/rge/if_rge_hw.c
1581
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1582
rge_write_phy_ocp(sc, 0xa438, val | 0x1700);
sys/dev/rge/if_rge_hw.c
1594
uint16_t val;
sys/dev/rge/if_rge_hw.c
1601
val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;
sys/dev/rge/if_rge_hw.c
1602
rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000);
sys/dev/rge/if_rge_hw.c
1604
val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;
sys/dev/rge/if_rge_hw.c
1605
rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000);
sys/dev/rge/if_rge_hw.c
1606
val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f;
sys/dev/rge/if_rge_hw.c
1607
rge_write_phy_ocp(sc, 0xbc80, val | 0x0004);
sys/dev/rge/if_rge_hw.c
1610
val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f;
sys/dev/rge/if_rge_hw.c
1611
rge_write_phy_ocp(sc, 0xbc80, val | 0x0005);
sys/dev/rge/if_rge_hw.c
1612
val = rge_read_phy_ocp(sc, 0xbc82) & ~0x00e0;
sys/dev/rge/if_rge_hw.c
1613
rge_write_phy_ocp(sc, 0xbc82, val | 0x0040);
sys/dev/rge/if_rge_hw.c
1616
val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000;
sys/dev/rge/if_rge_hw.c
1617
rge_write_phy_ocp(sc, 0xbcd8, val | 0x8000);
sys/dev/rge/if_rge_hw.c
1621
val = rge_read_phy_ocp(sc, 0xac7e) & ~0x01fc;
sys/dev/rge/if_rge_hw.c
1622
rge_write_phy_ocp(sc, 0xac7e, val | 0x00b4);
sys/dev/rge/if_rge_hw.c
1624
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1625
rge_write_phy_ocp(sc, 0xb87e, val | 0x7a00);
sys/dev/rge/if_rge_hw.c
1627
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1628
rge_write_phy_ocp(sc, 0xb87e, val | 0x3a00);
sys/dev/rge/if_rge_hw.c
1630
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1631
rge_write_phy_ocp(sc, 0xb87e, val | 0x7400);
sys/dev/rge/if_rge_hw.c
1633
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1634
rge_write_phy_ocp(sc, 0xb87e, val | 0x3400);
sys/dev/rge/if_rge_hw.c
1636
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1637
rge_write_phy_ocp(sc, 0xb87e, val | 0x0500);
sys/dev/rge/if_rge_hw.c
1639
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1640
rge_write_phy_ocp(sc, 0xb87e, val | 0x0700);
sys/dev/rge/if_rge_hw.c
1642
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
1643
rge_write_phy_ocp(sc, 0xb87e, val | 0xef00);
sys/dev/rge/if_rge_hw.c
1670
mac_r25_mcu[i].reg, mac_r25_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1682
mac_r25b_mcu[i].reg, mac_r25b_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1687
mac_r25d_1_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1694
mac_r25d_1_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1701
mac_r25d_1_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1706
mac_r25d_2_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1713
mac_r25d_2_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1717
mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1723
mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1727
mac_r26_2_mcu[i].reg, mac_r26_2_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1731
mac_r27_mcu[i].reg, mac_r27_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1737
mac_r27_mcu[i].reg, mac_r27_mcu[i].val);
sys/dev/rge/if_rge_hw.c
1957
uint16_t val;
sys/dev/rge/if_rge_hw.c
1959
val = rge_read_mac_ocp(sc, 0xe446) & ~0x0003;
sys/dev/rge/if_rge_hw.c
1960
val |= page;
sys/dev/rge/if_rge_hw.c
1961
rge_write_mac_ocp(sc, 0xe446, val);
sys/dev/rge/if_rge_hw.c
2012
rge_write_csi(struct rge_softc *sc, uint32_t reg, uint32_t val)
sys/dev/rge/if_rge_hw.c
2016
RGE_WRITE_4(sc, RGE_CSIDR, val);
sys/dev/rge/if_rge_hw.c
202
rtl8125_mac_bps[i].val);
sys/dev/rge/if_rge_hw.c
2049
rge_write_mac_ocp(struct rge_softc *sc, uint16_t reg, uint16_t val)
sys/dev/rge/if_rge_hw.c
2054
tmp += val;
sys/dev/rge/if_rge_hw.c
2062
uint32_t val;
sys/dev/rge/if_rge_hw.c
2064
val = (reg >> 1) << RGE_MACOCP_ADDR_SHIFT;
sys/dev/rge/if_rge_hw.c
2065
RGE_WRITE_4(sc, RGE_MACOCP, val);
sys/dev/rge/if_rge_hw.c
2071
rge_write_ephy(struct rge_softc *sc, uint16_t reg, uint16_t val)
sys/dev/rge/if_rge_hw.c
2077
tmp |= RGE_EPHYAR_BUSY | (val & RGE_EPHYAR_DATA_MASK);
sys/dev/rge/if_rge_hw.c
2092
uint32_t val;
sys/dev/rge/if_rge_hw.c
2095
val = (reg & RGE_EPHYAR_ADDR_MASK) << RGE_EPHYAR_ADDR_SHIFT;
sys/dev/rge/if_rge_hw.c
2096
RGE_WRITE_4(sc, RGE_EPHYAR, val);
sys/dev/rge/if_rge_hw.c
2100
val = RGE_READ_4(sc, RGE_EPHYAR);
sys/dev/rge/if_rge_hw.c
2101
if (val & RGE_EPHYAR_BUSY)
sys/dev/rge/if_rge_hw.c
2107
return (val & RGE_EPHYAR_DATA_MASK);
sys/dev/rge/if_rge_hw.c
2113
uint16_t val;
sys/dev/rge/if_rge_hw.c
2115
val = (reg >> 12);
sys/dev/rge/if_rge_hw.c
2116
rge_write_ephy(sc, RGE_EPHYAR_EXT_ADDR, val);
sys/dev/rge/if_rge_hw.c
2122
rge_r27_write_ephy(struct rge_softc *sc, uint16_t reg, uint16_t val)
sys/dev/rge/if_rge_hw.c
2124
rge_write_ephy(sc, rge_check_ephy_ext_add(sc, reg), val);
sys/dev/rge/if_rge_hw.c
2128
rge_write_phy(struct rge_softc *sc, uint16_t addr, uint16_t reg, uint16_t val)
sys/dev/rge/if_rge_hw.c
2139
rge_write_phy_ocp(sc, phyaddr, val);
sys/dev/rge/if_rge_hw.c
2158
rge_write_phy_ocp(struct rge_softc *sc, uint16_t reg, uint16_t val)
sys/dev/rge/if_rge_hw.c
2164
tmp |= RGE_PHYOCP_BUSY | val;
sys/dev/rge/if_rge_hw.c
2177
uint32_t val;
sys/dev/rge/if_rge_hw.c
2180
val = (reg >> 1) << RGE_PHYOCP_ADDR_SHIFT;
sys/dev/rge/if_rge_hw.c
2181
RGE_WRITE_4(sc, RGE_PHYOCP, val);
sys/dev/rge/if_rge_hw.c
2185
val = RGE_READ_4(sc, RGE_PHYOCP);
sys/dev/rge/if_rge_hw.c
2186
if (val & RGE_PHYOCP_BUSY)
sys/dev/rge/if_rge_hw.c
2190
return (val & RGE_PHYOCP_DATA_MASK);
sys/dev/rge/if_rge_hw.c
232
rtl8125b_mac_bps[i].val);
sys/dev/rge/if_rge_hw.c
280
rtl8125d_2_mac_bps[i].val);
sys/dev/rge/if_rge_hw.c
446
uint16_t val;
sys/dev/rge/if_rge_hw.c
450
rge_write_ephy(sc, mac_r25_ephy[i].reg, mac_r25_ephy[i].val);
sys/dev/rge/if_rge_hw.c
452
val = rge_read_ephy(sc, 0x002a) & ~0x7000;
sys/dev/rge/if_rge_hw.c
453
rge_write_ephy(sc, 0x002a, val | 0x3000);
sys/dev/rge/if_rge_hw.c
459
val = rge_read_ephy(sc, 0x006a) & ~0x7000;
sys/dev/rge/if_rge_hw.c
460
rge_write_ephy(sc, 0x006a, val | 0x3000);
sys/dev/rge/if_rge_hw.c
474
rge_write_ephy(sc, mac_r25b_ephy[i].reg, mac_r25b_ephy[i].val);
sys/dev/rge/if_rge_hw.c
484
mac_r27_ephy[i].val);
sys/dev/rge/if_rge_hw.c
493
uint16_t val = 0;
sys/dev/rge/if_rge_hw.c
507
val |= RGE_ADV_10000TFDX;
sys/dev/rge/if_rge_hw.c
511
val |= RGE_ADV_5000TFDX;
sys/dev/rge/if_rge_hw.c
514
val |= RGE_ADV_2500TFDX;
sys/dev/rge/if_rge_hw.c
517
RGE_PHY_CLRBIT(sc, 0xa5d4, val);
sys/dev/rge/if_rge_hw.c
589
uint16_t val;
sys/dev/rge/if_rge_hw.c
611
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
612
rge_write_phy_ocp(sc, 0xa438, val | 0x9300);
sys/dev/rge/if_rge_hw.c
614
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
615
rge_write_phy_ocp(sc, 0xa438, val | 0x0f00);
sys/dev/rge/if_rge_hw.c
617
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
618
rge_write_phy_ocp(sc, 0xa438, val | 0x0f00);
sys/dev/rge/if_rge_hw.c
620
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
621
rge_write_phy_ocp(sc, 0xa438, val | 0xb900);
sys/dev/rge/if_rge_hw.c
630
val = rge_read_phy_ocp(sc, 0xbf38) & ~0x01f0;
sys/dev/rge/if_rge_hw.c
631
rge_write_phy_ocp(sc, 0xbf38, val | 0x0160);
sys/dev/rge/if_rge_hw.c
632
val = rge_read_phy_ocp(sc, 0xbf3a) & ~0x001f;
sys/dev/rge/if_rge_hw.c
633
rge_write_phy_ocp(sc, 0xbf3a, val | 0x0014);
sys/dev/rge/if_rge_hw.c
636
val = rge_read_phy_ocp(sc, 0xbf28) & ~0x1fff;
sys/dev/rge/if_rge_hw.c
637
rge_write_phy_ocp(sc, 0xbf28, val | 0x0187);
sys/dev/rge/if_rge_hw.c
638
val = rge_read_phy_ocp(sc, 0xbf2a) & ~0x003f;
sys/dev/rge/if_rge_hw.c
639
rge_write_phy_ocp(sc, 0xbf2a, val | 0x0003);
sys/dev/rge/if_rge_hw.c
659
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
660
rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
sys/dev/rge/if_rge_hw.c
662
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
663
rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
sys/dev/rge/if_rge_hw.c
665
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
666
rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
sys/dev/rge/if_rge_hw.c
668
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
669
rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
sys/dev/rge/if_rge_hw.c
671
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
672
rge_write_phy_ocp(sc, 0xa438, val | 0x1400);
sys/dev/rge/if_rge_hw.c
674
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
675
rge_write_phy_ocp(sc, 0xa438, val | 0x1400);
sys/dev/rge/if_rge_hw.c
677
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
678
rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
sys/dev/rge/if_rge_hw.c
692
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
693
rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);
sys/dev/rge/if_rge_hw.c
695
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
696
rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);
sys/dev/rge/if_rge_hw.c
698
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
699
rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);
sys/dev/rge/if_rge_hw.c
701
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
702
rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);
sys/dev/rge/if_rge_hw.c
704
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
705
rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);
sys/dev/rge/if_rge_hw.c
707
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
708
rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);
sys/dev/rge/if_rge_hw.c
714
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
715
rge_write_phy_ocp(sc, 0xb87e, val | 0x2800);
sys/dev/rge/if_rge_hw.c
718
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
719
rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);
sys/dev/rge/if_rge_hw.c
721
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
722
rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);
sys/dev/rge/if_rge_hw.c
724
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
725
rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);
sys/dev/rge/if_rge_hw.c
726
val = rge_read_phy_ocp(sc, 0xae4e) & ~0x000f;
sys/dev/rge/if_rge_hw.c
727
rge_write_phy_ocp(sc, 0xae4e, val | 0x0001);
sys/dev/rge/if_rge_hw.c
729
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xf000;
sys/dev/rge/if_rge_hw.c
730
rge_write_phy_ocp(sc, 0xb87e, val | 0x4000);
sys/dev/rge/if_rge_hw.c
738
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
739
rge_write_phy_ocp(sc, 0xb87e, val | 0x6000);
sys/dev/rge/if_rge_hw.c
749
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
750
rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);
sys/dev/rge/if_rge_hw.c
758
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
759
rge_write_phy_ocp(sc, 0xb87e, val | 0xdc00);
sys/dev/rge/if_rge_hw.c
761
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xc000;
sys/dev/rge/if_rge_hw.c
762
rge_write_phy_ocp(sc, 0xb87e, val | 0x4000);
sys/dev/rge/if_rge_hw.c
770
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
771
rge_write_phy_ocp(sc, 0xb87e, val | 0x0e00);
sys/dev/rge/if_rge_hw.c
778
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
779
rge_write_phy_ocp(sc, 0xa438, val | 0x0700);
sys/dev/rge/if_rge_hw.c
781
val = rge_read_phy_ocp(sc, 0xb87e) & ~0x3f00;
sys/dev/rge/if_rge_hw.c
782
rge_write_phy_ocp(sc, 0xb87e, val | 0x2a00);
sys/dev/rge/if_rge_hw.c
784
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
785
rge_write_phy_ocp(sc, 0xa438, val | 0x0b00);
sys/dev/rge/if_rge_hw.c
787
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
788
rge_write_phy_ocp(sc, 0xb87e, val | 0x4e00);
sys/dev/rge/if_rge_hw.c
790
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
791
rge_write_phy_ocp(sc, 0xb87e, val | 0x2300);
sys/dev/rge/if_rge_hw.c
806
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
807
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
809
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
810
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
812
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
813
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
815
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
816
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
818
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
819
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
821
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
822
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
824
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
825
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
827
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
828
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
830
val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
sys/dev/rge/if_rge_hw.c
831
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
834
val = rge_read_phy_ocp(sc, 0xbfb4) & ~0x07ff;
sys/dev/rge/if_rge_hw.c
835
rge_write_phy_ocp(sc, 0xbfb4, val | 0x0328);
sys/dev/rge/if_rge_hw.c
845
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
846
rge_write_phy_ocp(sc, 0xb87e, val | 0x0200);
sys/dev/rge/if_rge_hw.c
848
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
849
rge_write_phy_ocp(sc, 0xa438, val | 0x0a00);
sys/dev/rge/if_rge_hw.c
851
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
852
rge_write_phy_ocp(sc, 0xa438, val | 0x1600);
sys/dev/rge/if_rge_hw.c
859
uint16_t val;
sys/dev/rge/if_rge_hw.c
878
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
879
rge_write_phy_ocp(sc, 0xa438, val | 0xed00);
sys/dev/rge/if_rge_hw.c
881
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
882
rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
sys/dev/rge/if_rge_hw.c
884
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
885
rge_write_phy_ocp(sc, 0xa438, val | 0xc800);
sys/dev/rge/if_rge_hw.c
887
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
888
rge_write_phy_ocp(sc, 0xa438, val | 0xc800);
sys/dev/rge/if_rge_hw.c
894
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
895
rge_write_phy_ocp(sc, 0xa438, val | 0x4700);
sys/dev/rge/if_rge_hw.c
896
val = rge_read_phy_ocp(sc, 0xa80c) & ~0x00c0;
sys/dev/rge/if_rge_hw.c
897
rge_write_phy_ocp(sc, 0xa80c, val | 0x0080);
sys/dev/rge/if_rge_hw.c
901
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
902
rge_write_phy_ocp(sc, 0xb87e, val | 0x1100);
sys/dev/rge/if_rge_hw.c
905
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
906
rge_write_phy_ocp(sc, 0xa438, val | 0x5900);
sys/dev/rge/if_rge_hw.c
911
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
912
rge_write_phy_ocp(sc, 0xb87e, val | 0x2f00);
sys/dev/rge/if_rge_hw.c
914
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
915
rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);
sys/dev/rge/if_rge_hw.c
918
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
919
rge_write_phy_ocp(sc, 0xb87e, val | 0x9900);
sys/dev/rge/if_rge_hw.c
92
static void rge_write_ephy(struct rge_softc *sc, uint16_t reg, uint16_t val);
sys/dev/rge/if_rge_hw.c
921
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
922
rge_write_phy_ocp(sc, 0xb87e, val | 0xc100);
sys/dev/rge/if_rge_hw.c
926
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
927
rge_write_phy_ocp(sc, 0xb87e, val | 0xe600);
sys/dev/rge/if_rge_hw.c
929
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
930
rge_write_phy_ocp(sc, 0xb87e, val | 0x1200);
sys/dev/rge/if_rge_hw.c
932
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
933
rge_write_phy_ocp(sc, 0xb87e, val | 0xe600);
sys/dev/rge/if_rge_hw.c
941
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
942
rge_write_phy_ocp(sc, 0xb87e, val | 0x5a00);
sys/dev/rge/if_rge_hw.c
946
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
947
rge_write_phy_ocp(sc, 0xb87e, val | 0x5a00);
sys/dev/rge/if_rge_hw.c
95
static void rge_r27_write_ephy(struct rge_softc *sc, uint16_t reg, uint16_t val);
sys/dev/rge/if_rge_hw.c
957
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
958
rge_write_phy_ocp(sc, 0xb87e, val | 0x3000);
sys/dev/rge/if_rge_hw.c
960
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
961
rge_write_phy_ocp(sc, 0xb87e, val | 0x3000);
sys/dev/rge/if_rge_hw.c
963
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
964
rge_write_phy_ocp(sc, 0xb87e, val | 0x3300);
sys/dev/rge/if_rge_hw.c
966
val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
sys/dev/rge/if_rge_hw.c
967
rge_write_phy_ocp(sc, 0xb87e, val | 0x3300);
sys/dev/rge/if_rge_hw.c
968
val = rge_read_phy_ocp(sc, 0xae06) & ~0xfc00;
sys/dev/rge/if_rge_hw.c
969
rge_write_phy_ocp(sc, 0xae06, val | 0x7c00);
sys/dev/rge/if_rge_hw.c
973
val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
sys/dev/rge/if_rge_hw.c
974
rge_write_phy_ocp(sc, 0xa438, val | 0x0a00);
sys/dev/rge/if_rge_hw.c
999
val = rge_read_phy_ocp(sc, 0xbd96) & ~0x1f00;
sys/dev/rge/if_rge_microcode.h
10246
uint16_t val;
sys/dev/rge/if_rge_microcode.h
28
uint16_t val;
sys/dev/rge/if_rgevar.h
217
#define RGE_WRITE_4(sc, reg, val) \
sys/dev/rge/if_rgevar.h
218
bus_space_write_4(sc->rge_btag, sc->rge_bhandle, reg, val)
sys/dev/rge/if_rgevar.h
219
#define RGE_WRITE_2(sc, reg, val) \
sys/dev/rge/if_rgevar.h
220
bus_space_write_2(sc->rge_btag, sc->rge_bhandle, reg, val)
sys/dev/rge/if_rgevar.h
221
#define RGE_WRITE_1(sc, reg, val) \
sys/dev/rge/if_rgevar.h
222
bus_space_write_1(sc->rge_btag, sc->rge_bhandle, reg, val)
sys/dev/rge/if_rgevar.h
239
#define RGE_SETBIT_4(sc, reg, val) \
sys/dev/rge/if_rgevar.h
240
RGE_WRITE_4(sc, reg, RGE_READ_4(sc, reg) | (val))
sys/dev/rge/if_rgevar.h
241
#define RGE_SETBIT_2(sc, reg, val) \
sys/dev/rge/if_rgevar.h
242
RGE_WRITE_2(sc, reg, RGE_READ_2(sc, reg) | (val))
sys/dev/rge/if_rgevar.h
243
#define RGE_SETBIT_1(sc, reg, val) \
sys/dev/rge/if_rgevar.h
244
RGE_WRITE_1(sc, reg, RGE_READ_1(sc, reg) | (val))
sys/dev/rge/if_rgevar.h
246
#define RGE_CLRBIT_4(sc, reg, val) \
sys/dev/rge/if_rgevar.h
247
RGE_WRITE_4(sc, reg, RGE_READ_4(sc, reg) & ~(val))
sys/dev/rge/if_rgevar.h
248
#define RGE_CLRBIT_2(sc, reg, val) \
sys/dev/rge/if_rgevar.h
249
RGE_WRITE_2(sc, reg, RGE_READ_2(sc, reg) & ~(val))
sys/dev/rge/if_rgevar.h
250
#define RGE_CLRBIT_1(sc, reg, val) \
sys/dev/rge/if_rgevar.h
251
RGE_WRITE_1(sc, reg, RGE_READ_1(sc, reg) & ~(val))
sys/dev/rge/if_rgevar.h
253
#define RGE_EPHY_SETBIT(sc, reg, val) \
sys/dev/rge/if_rgevar.h
254
rge_write_ephy(sc, reg, rge_read_ephy(sc, reg) | (val))
sys/dev/rge/if_rgevar.h
256
#define RGE_EPHY_CLRBIT(sc, reg, val) \
sys/dev/rge/if_rgevar.h
257
rge_write_ephy(sc, reg, rge_read_ephy(sc, reg) & ~(val))
sys/dev/rge/if_rgevar.h
259
#define RGE_PHY_SETBIT(sc, reg, val) \
sys/dev/rge/if_rgevar.h
260
rge_write_phy_ocp(sc, reg, rge_read_phy_ocp(sc, reg) | (val))
sys/dev/rge/if_rgevar.h
262
#define RGE_PHY_CLRBIT(sc, reg, val) \
sys/dev/rge/if_rgevar.h
263
rge_write_phy_ocp(sc, reg, rge_read_phy_ocp(sc, reg) & ~(val))
sys/dev/rge/if_rgevar.h
265
#define RGE_MAC_SETBIT(sc, reg, val) \
sys/dev/rge/if_rgevar.h
266
rge_write_mac_ocp(sc, reg, rge_read_mac_ocp(sc, reg) | (val))
sys/dev/rge/if_rgevar.h
268
#define RGE_MAC_CLRBIT(sc, reg, val) \
sys/dev/rge/if_rgevar.h
269
rge_write_mac_ocp(sc, reg, rge_read_mac_ocp(sc, reg) & ~(val))
sys/dev/rl/if_rl.c
361
uint32_t val;
sys/dev/rl/if_rl.c
365
val = CSR_READ_1(sc, RL_MII);
sys/dev/rl/if_rl.c
369
return (val);
sys/dev/rl/if_rl.c
376
rl_mii_bitbang_write(device_t dev, uint32_t val)
sys/dev/rl/if_rl.c
382
CSR_WRITE_1(sc, RL_MII, val);
sys/dev/rl/if_rlreg.h
945
#define CSR_WRITE_STREAM_4(sc, reg, val) \
sys/dev/rl/if_rlreg.h
946
bus_space_write_stream_4(sc->rl_btag, sc->rl_bhandle, reg, val)
sys/dev/rl/if_rlreg.h
947
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/rl/if_rlreg.h
948
bus_space_write_4(sc->rl_btag, sc->rl_bhandle, reg, val)
sys/dev/rl/if_rlreg.h
949
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/rl/if_rlreg.h
950
bus_space_write_2(sc->rl_btag, sc->rl_bhandle, reg, val)
sys/dev/rl/if_rlreg.h
951
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/rl/if_rlreg.h
952
bus_space_write_1(sc->rl_btag, sc->rl_bhandle, reg, val)
sys/dev/rl/if_rlreg.h
964
#define CSR_SETBIT_1(sc, offset, val) \
sys/dev/rl/if_rlreg.h
965
CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) | (val))
sys/dev/rl/if_rlreg.h
967
#define CSR_CLRBIT_1(sc, offset, val) \
sys/dev/rl/if_rlreg.h
968
CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) & ~(val))
sys/dev/rl/if_rlreg.h
970
#define CSR_SETBIT_2(sc, offset, val) \
sys/dev/rl/if_rlreg.h
971
CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) | (val))
sys/dev/rl/if_rlreg.h
973
#define CSR_CLRBIT_2(sc, offset, val) \
sys/dev/rl/if_rlreg.h
974
CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) & ~(val))
sys/dev/rl/if_rlreg.h
976
#define CSR_SETBIT_4(sc, offset, val) \
sys/dev/rl/if_rlreg.h
977
CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) | (val))
sys/dev/rl/if_rlreg.h
979
#define CSR_CLRBIT_4(sc, offset, val) \
sys/dev/rl/if_rlreg.h
980
CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val))
sys/dev/rndtest/rndtest.c
267
rndtest_runs_check(struct rndtest_state *rsp, int val, int *src)
sys/dev/rndtest/rndtest.c
276
val ? "ones" : "zeros",
sys/dev/rndtest/rndtest.c
283
val ? "ones" : "zeros",
sys/dev/rtsx/rtsx.c
1334
rtsx_read(struct rtsx_softc *sc, uint16_t addr, uint8_t *val)
sys/dev/rtsx/rtsx.c
1348
*val = (reg & 0xff);
sys/dev/rtsx/rtsx.c
1359
rtsx_read_cfg(struct rtsx_softc *sc, uint8_t func, uint16_t addr, uint32_t *val)
sys/dev/rtsx/rtsx.c
1382
*val = (data3 << 24) | (data2 << 16) | (data1 << 8) | data0;
sys/dev/rtsx/rtsx.c
1388
rtsx_write(struct rtsx_softc *sc, uint16_t addr, uint8_t mask, uint8_t val)
sys/dev/rtsx/rtsx.c
1396
(mask << 8) | val);
sys/dev/rtsx/rtsx.c
1402
if (val != (reg & 0xff)) {
sys/dev/rtsx/rtsx.c
1415
rtsx_read_phy(struct rtsx_softc *sc, uint8_t addr, uint16_t *val)
sys/dev/rtsx/rtsx.c
1433
*val = data1 << 8 | data0;
sys/dev/rtsx/rtsx.c
1439
rtsx_write_phy(struct rtsx_softc *sc, uint8_t addr, uint16_t val)
sys/dev/rtsx/rtsx.c
1444
RTSX_WRITE(sc, RTSX_PHY_DATA0, val);
sys/dev/rtsx/rtsx.c
1445
RTSX_WRITE(sc, RTSX_PHY_DATA1, val >> 8);
sys/dev/rtsx/rtsx.c
2083
uint8_t val;
sys/dev/rtsx/rtsx.c
2086
rtsx_read(sc, RTSX_SD_DATA_STATE, &val);
sys/dev/rtsx/rtsx.c
2087
if (val & RTSX_SD_DATA_IDLE)
sys/dev/rtsx/rtsx.c
214
static int rtsx_read_cfg(struct rtsx_softc *sc, uint8_t func, uint16_t addr, uint32_t *val);
sys/dev/rtsx/rtsx.c
215
static int rtsx_write(struct rtsx_softc *sc, uint16_t addr, uint8_t mask, uint8_t val);
sys/dev/rtsx/rtsx.c
216
static int rtsx_read_phy(struct rtsx_softc *sc, uint8_t addr, uint16_t *val);
sys/dev/rtsx/rtsx.c
217
static int rtsx_write_phy(struct rtsx_softc *sc, uint8_t addr, uint16_t val);
sys/dev/rtsx/rtsx.c
320
#define WRITE4(sc, reg, val) \
sys/dev/rtsx/rtsx.c
321
(bus_space_write_4((sc)->rtsx_mem_btag, (sc)->rtsx_mem_bhandle, (reg), (val)))
sys/dev/rtsx/rtsx.c
323
#define RTSX_READ(sc, reg, val) \
sys/dev/rtsx/rtsx.c
325
int err = rtsx_read((sc), (reg), (val)); \
sys/dev/rtsx/rtsx.c
3282
uint16_t val;
sys/dev/rtsx/rtsx.c
330
#define RTSX_WRITE(sc, reg, val) \
sys/dev/rtsx/rtsx.c
3308
if ((error = rtsx_read_phy(sc, RTSX_PHY_TUNE, &val)))
sys/dev/rtsx/rtsx.c
3311
(val & RTSX_PHY_TUNE_VOLTAGE_MASK) | RTSX_PHY_TUNE_VOLTAGE_3V3)))
sys/dev/rtsx/rtsx.c
332
int err = rtsx_write((sc), (reg), 0xff, (val)); \
sys/dev/rtsx/rtsx.c
724
uint8_t val;
sys/dev/rtsx/rtsx.c
898
val = pci_read_config(sc->rtsx_dev, sc->rtsx_pcie_cap + PCIER_LINK_CTL, 1);
sys/dev/rtsx/rtsx.c
899
pci_write_config(sc->rtsx_dev, sc->rtsx_pcie_cap + PCIER_LINK_CTL, val & 0xfc, 1);
sys/dev/rtwn/if_rtwn.c
1581
sc->mac_prog[i].val);
sys/dev/rtwn/if_rtwn.c
343
uint32_t val;
sys/dev/rtwn/if_rtwn.c
349
val = rtwn_read_4(sc, sc->sc_reg_addr);
sys/dev/rtwn/if_rtwn.c
351
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/rtwn/if_rtwn.c
355
rtwn_write_4(sc, sc->sc_reg_addr, val);
sys/dev/rtwn/if_rtwn_efuse.c
111
*val = MS(reg, R92C_EFUSE_CTRL_DATA);
sys/dev/rtwn/if_rtwn_efuse.c
82
rtwn_efuse_read_next(struct rtwn_softc *sc, uint8_t *val)
sys/dev/rtwn/if_rtwnreg.h
105
#define MS(val, field) \
sys/dev/rtwn/if_rtwnreg.h
106
(((val) & field##_M) >> field##_S)
sys/dev/rtwn/if_rtwnreg.h
109
#define SM(field, val) \
sys/dev/rtwn/if_rtwnreg.h
110
(((val) << field##_S) & field##_M)
sys/dev/rtwn/if_rtwnreg.h
113
#define RW(var, field, val) \
sys/dev/rtwn/if_rtwnreg.h
114
(((var) & ~field##_M) | SM(field, val))
sys/dev/rtwn/if_rtwnreg.h
123
uint8_t val;
sys/dev/rtwn/if_rtwnreg.h
132
const uint32_t *val;
sys/dev/rtwn/if_rtwnreg.h
139
const uint32_t *val;
sys/dev/rtwn/if_rtwnreg.h
150
const uint32_t *val;
sys/dev/rtwn/pci/rtwn_pci_reg.c
104
uint32_t val;
sys/dev/rtwn/pci/rtwn_pci_reg.c
106
val = bus_space_read_4(pc->pc_st, pc->pc_sh, addr);
sys/dev/rtwn/pci/rtwn_pci_reg.c
107
return le32toh(val);
sys/dev/rtwn/pci/rtwn_pci_reg.c
51
rtwn_pci_write_1(struct rtwn_softc *sc, uint16_t addr, uint8_t val)
sys/dev/rtwn/pci/rtwn_pci_reg.c
55
bus_space_write_1(pc->pc_st, pc->pc_sh, addr, val);
sys/dev/rtwn/pci/rtwn_pci_reg.c
61
rtwn_pci_write_2(struct rtwn_softc *sc, uint16_t addr, uint16_t val)
sys/dev/rtwn/pci/rtwn_pci_reg.c
65
val = htole16(val);
sys/dev/rtwn/pci/rtwn_pci_reg.c
66
bus_space_write_2(pc->pc_st, pc->pc_sh, addr, val);
sys/dev/rtwn/pci/rtwn_pci_reg.c
72
rtwn_pci_write_4(struct rtwn_softc *sc, uint16_t addr, uint32_t val)
sys/dev/rtwn/pci/rtwn_pci_reg.c
76
val = htole32(val);
sys/dev/rtwn/pci/rtwn_pci_reg.c
77
bus_space_write_4(pc->pc_st, pc->pc_sh, addr, val);
sys/dev/rtwn/pci/rtwn_pci_reg.c
94
uint16_t val;
sys/dev/rtwn/pci/rtwn_pci_reg.c
96
val = bus_space_read_2(pc->pc_st, pc->pc_sh, addr);
sys/dev/rtwn/pci/rtwn_pci_reg.c
97
return le16toh(val);
sys/dev/rtwn/rtl8188e/r88e_calib.c
312
uint32_t reg, val, x;
sys/dev/rtwn/rtl8188e/r88e_calib.c
319
val = ((reg >> 22) & 0x3ff);
sys/dev/rtwn/rtl8188e/r88e_calib.c
323
reg = (((x * val) >> 8) & 0x3ff);
sys/dev/rtwn/rtl8188e/r88e_calib.c
326
((x * val) & 0x80) << 24);
sys/dev/rtwn/rtl8188e/r88e_calib.c
331
tx_c = (y * val) >> 8;
sys/dev/rtwn/rtl8188e/r88e_calib.c
337
((y * val) & 0x80) << 22);
sys/dev/rtwn/rtl8188e/r88e_init.c
61
uint8_t val;
sys/dev/rtwn/rtl8188e/r88e_init.c
63
val = rs->crystalcap & 0x3f;
sys/dev/rtwn/rtl8188e/r88e_init.c
66
RW(reg, R92C_AFE_XTAL_CTRL_ADDR, val | val << 6));
sys/dev/rtwn/rtl8188e/r88e_rf.c
52
r88e_rf_write(struct rtwn_softc *sc, int chain, uint8_t addr, uint32_t val)
sys/dev/rtwn/rtl8188e/r88e_rf.c
56
SM(R92C_LSSI_PARAM_DATA, val));
sys/dev/rtwn/rtl8192c/pci/r92ce_calib.c
314
uint32_t reg, val, x;
sys/dev/rtwn/rtl8192c/pci/r92ce_calib.c
321
val = ((reg >> 22) & 0x3ff);
sys/dev/rtwn/rtl8192c/pci/r92ce_calib.c
325
reg = (((x * val) >> 8) & 0x3ff);
sys/dev/rtwn/rtl8192c/pci/r92ce_calib.c
328
((x * val) & 0x80) << 24);
sys/dev/rtwn/rtl8192c/pci/r92ce_calib.c
333
tx_c = (y * val) >> 8;
sys/dev/rtwn/rtl8192c/pci/r92ce_calib.c
339
((y * val) & 0x80) << 22);
sys/dev/rtwn/rtl8192c/r92c_calib.c
333
uint32_t reg, val, x;
sys/dev/rtwn/rtl8192c/r92c_calib.c
340
val = ((reg >> 22) & 0x3ff);
sys/dev/rtwn/rtl8192c/r92c_calib.c
344
reg = (((x * val) >> 8) & 0x3ff);
sys/dev/rtwn/rtl8192c/r92c_calib.c
347
((x * val) & 0x80) << 24);
sys/dev/rtwn/rtl8192c/r92c_calib.c
352
tx_c = (y * val) >> 8;
sys/dev/rtwn/rtl8192c/r92c_calib.c
358
((y * val) & 0x80) << 22);
sys/dev/rtwn/rtl8192c/r92c_init.c
142
bb_prog->reg[j], bb_prog->val[j]);
sys/dev/rtwn/rtl8192c/r92c_init.c
144
rtwn_bb_write(sc, bb_prog->reg[j], bb_prog->val[j]);
sys/dev/rtwn/rtl8192c/r92c_init.c
178
"AGC: val 0x%08x\n", agc_prog->val[j]);
sys/dev/rtwn/rtl8192c/r92c_init.c
181
agc_prog->val[j]);
sys/dev/rtwn/rtl8192c/r92c_init.c
212
prog->reg[j], prog->val[j]);
sys/dev/rtwn/rtl8192c/r92c_init.c
220
rtwn_delay(sc, prog->val[j]);
sys/dev/rtwn/rtl8192c/r92c_init.c
224
rtwn_rf_write(sc, chain, prog->reg[j], prog->val[j]);
sys/dev/rtwn/rtl8192c/r92c_rf.c
57
uint32_t reg[R92C_MAX_CHAINS], val;
sys/dev/rtwn/rtl8192c/r92c_rf.c
77
val = rtwn_bb_read(sc, R92C_HSPI_READBACK(chain));
sys/dev/rtwn/rtl8192c/r92c_rf.c
79
val = rtwn_bb_read(sc, R92C_LSSI_READBACK(chain));
sys/dev/rtwn/rtl8192c/r92c_rf.c
80
return (MS(val, R92C_LSSI_READBACK_DATA));
sys/dev/rtwn/rtl8192c/r92c_rf.c
85
uint32_t val)
sys/dev/rtwn/rtl8192c/r92c_rf.c
89
SM(R92C_LSSI_PARAM_DATA, val));
sys/dev/rtwn/rtl8192c/r92c_rom_defs.h
33
#define RTWN_SIGN4TO8(val) (((val) & 0x08) ? (val) | 0xf0 : (val))
sys/dev/rtwn/rtl8192e/r92e_init.c
124
bb_prog->reg[j], bb_prog->val[j]);
sys/dev/rtwn/rtl8192e/r92e_init.c
126
rtwn_bb_write(sc, bb_prog->reg[j], bb_prog->val[j]);
sys/dev/rtwn/rtl8192e/r92e_init.c
144
"AGC: val 0x%08x\n", agc_prog->val[j]);
sys/dev/rtwn/rtl8192e/r92e_init.c
147
agc_prog->val[j]);
sys/dev/rtwn/rtl8192e/r92e_init.c
84
uint8_t val;
sys/dev/rtwn/rtl8192e/r92e_init.c
86
val = rs->crystalcap & 0x3f;
sys/dev/rtwn/rtl8192e/r92e_init.c
89
RW(reg, R92E_AFE_XTAL_CTRL_ADDR, val | val << 6));
sys/dev/rtwn/rtl8192e/r92e_rf.c
60
uint32_t val;
sys/dev/rtwn/rtl8192e/r92e_rf.c
62
val = rtwn_bb_read(sc, R92C_HSSI_PARAM2(chain));
sys/dev/rtwn/rtl8192e/r92e_rf.c
64
RW(val, R92C_HSSI_PARAM2_READ_ADDR, addr) &
sys/dev/rtwn/rtl8192e/r92e_rf.c
74
val = rtwn_bb_read(sc, R92C_HSPI_READBACK(chain));
sys/dev/rtwn/rtl8192e/r92e_rf.c
76
val = rtwn_bb_read(sc, R92C_LSSI_READBACK(chain));
sys/dev/rtwn/rtl8192e/r92e_rf.c
77
return (MS(val, R92C_LSSI_READBACK_DATA));
sys/dev/rtwn/rtl8192e/r92e_rf.c
81
r92e_rf_write(struct rtwn_softc *sc, int chain, uint8_t addr, uint32_t val)
sys/dev/rtwn/rtl8192e/r92e_rf.c
86
SM(R88E_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));
sys/dev/rtwn/rtl8812a/r12a_chan.c
471
uint16_t val = 0;
sys/dev/rtwn/rtl8812a/r12a_chan.c
475
val = 0x200; /* 0 dB */
sys/dev/rtwn/rtl8812a/r12a_chan.c
478
val = 0x16a; /* -3 dB */
sys/dev/rtwn/rtl8812a/r12a_chan.c
481
val = 0x101; /* -6 dB */
sys/dev/rtwn/rtl8812a/r12a_chan.c
484
val = 0xb6; /* -9 dB */
sys/dev/rtwn/rtl8812a/r12a_chan.c
489
val << R12A_TX_SCALE_SWING_S);
sys/dev/rtwn/rtl8812a/r12a_chan.c
496
uint32_t val;
sys/dev/rtwn/rtl8812a/r12a_chan.c
504
val = 0x09280000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
506
val = 0x08a60000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
508
val = 0x08a40000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
510
val = 0x08240000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
512
val = 0x12d40000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
514
rtwn_bb_setbits(sc, R12A_FC_AREA, 0x1ffe0000, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
518
val = 0x10100;
sys/dev/rtwn/rtl8812a/r12a_chan.c
520
val = 0x30100;
sys/dev/rtwn/rtl8812a/r12a_chan.c
522
val = 0x50100;
sys/dev/rtwn/rtl8812a/r12a_chan.c
524
val = 0x00000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
526
rtwn_rf_setbits(sc, i, R92C_RF_CHNLBW, 0x70300, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
573
val = rtwn_bb_read(sc, R12A_RFMOD);
sys/dev/rtwn/rtl8812a/r12a_chan.c
574
val = RW(val, R12A_RFMOD_EXT_CHAN, ext20);
sys/dev/rtwn/rtl8812a/r12a_chan.c
575
rtwn_bb_write(sc, R12A_RFMOD, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
578
val = rtwn_bb_read(sc, R12A_CCA_ON_SEC);
sys/dev/rtwn/rtl8812a/r12a_chan.c
579
val = RW(val, R12A_CCA_ON_SEC_EXT_CHAN, ext20);
sys/dev/rtwn/rtl8812a/r12a_chan.c
580
rtwn_bb_write(sc, R12A_CCA_ON_SEC, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
584
val = 0x01400000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
586
val = 0x01800000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
588
val = 0x01c00000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
590
rtwn_bb_setbits(sc, R12A_L1_PEAK_TH, 0x03c00000, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
592
val = 0x0;
sys/dev/rtwn/rtl8812a/r12a_chan.c
610
val = rtwn_bb_read(sc, R12A_RFMOD);
sys/dev/rtwn/rtl8812a/r12a_chan.c
611
val = RW(val, R12A_RFMOD_EXT_CHAN, ext_chan);
sys/dev/rtwn/rtl8812a/r12a_chan.c
612
rtwn_bb_write(sc, R12A_RFMOD, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
614
val = rtwn_bb_read(sc, R12A_CCA_ON_SEC);
sys/dev/rtwn/rtl8812a/r12a_chan.c
615
val = RW(val, R12A_CCA_ON_SEC_EXT_CHAN, ext_chan);
sys/dev/rtwn/rtl8812a/r12a_chan.c
616
rtwn_bb_write(sc, R12A_CCA_ON_SEC, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
619
val = 0x01800000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
621
val = 0x01c00000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
623
val = 0x02000000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
625
rtwn_bb_setbits(sc, R12A_L1_PEAK_TH, 0x03c00000, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
632
val = 0x400;
sys/dev/rtwn/rtl8812a/r12a_chan.c
641
val = 0x01c00000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
643
val = 0x02000000;
sys/dev/rtwn/rtl8812a/r12a_chan.c
645
rtwn_bb_setbits(sc, R12A_L1_PEAK_TH, 0x03c00000, val);
sys/dev/rtwn/rtl8812a/r12a_chan.c
647
val = 0xc00;
sys/dev/rtwn/rtl8812a/r12a_chan.c
654
rtwn_rf_setbits(sc, i, R92C_RF_CHNLBW, 0xc00, val);
sys/dev/rtwn/rtl8812a/r12a_init.c
162
bb_prog->reg[j], bb_prog->val[j]);
sys/dev/rtwn/rtl8812a/r12a_init.c
164
rtwn_bb_write(sc, bb_prog->reg[j], bb_prog->val[j]);
sys/dev/rtwn/rtl8812a/r12a_init.c
184
"AGC: val 0x%08x\n", agc_prog->val[j]);
sys/dev/rtwn/rtl8812a/r12a_init.c
186
rtwn_bb_write(sc, 0x81c, agc_prog->val[j]);
sys/dev/rtwn/rtl8812a/r12a_init.c
220
uint8_t val;
sys/dev/rtwn/rtl8812a/r12a_init.c
222
val = rs->crystalcap & 0x3f;
sys/dev/rtwn/rtl8812a/r12a_init.c
224
reg = RW(reg, R12A_MAC_PHY_CRYSTALCAP, val | (val << 6));
sys/dev/rtwn/rtl8812a/r12a_rf.c
102
uint32_t val)
sys/dev/rtwn/rtl8812a/r12a_rf.c
106
SM(R92C_LSSI_PARAM_DATA, val));
sys/dev/rtwn/rtl8812a/r12a_rf.c
60
uint32_t pi_mode, val;
sys/dev/rtwn/rtl8812a/r12a_rf.c
66
val = rtwn_bb_read(sc, R12A_HSSI_PARAM1(chain));
sys/dev/rtwn/rtl8812a/r12a_rf.c
67
pi_mode = (val & R12A_HSSI_PARAM1_PI) ? 1 : 0;
sys/dev/rtwn/rtl8812a/r12a_rf.c
72
val = rtwn_bb_read(sc, pi_mode ? R12A_HSPI_READBACK(chain) :
sys/dev/rtwn/rtl8812a/r12a_rf.c
79
return (MS(val, R92C_LSSI_READBACK_DATA));
sys/dev/rtwn/rtl8812a/r12a_rf.c
85
uint32_t pi_mode, val;
sys/dev/rtwn/rtl8812a/r12a_rf.c
87
val = rtwn_bb_read(sc, R12A_HSSI_PARAM1(chain));
sys/dev/rtwn/rtl8812a/r12a_rf.c
88
pi_mode = (val & R12A_HSSI_PARAM1_PI) ? 1 : 0;
sys/dev/rtwn/rtl8812a/r12a_rf.c
94
val = rtwn_bb_read(sc, pi_mode ? R12A_HSPI_READBACK(chain) :
sys/dev/rtwn/rtl8812a/r12a_rf.c
97
return (MS(val, R92C_LSSI_READBACK_DATA));
sys/dev/rtwn/rtl8821a/r21a_init.c
323
uint8_t val;
sys/dev/rtwn/rtl8821a/r21a_init.c
325
val = rs->crystalcap & 0x3f;
sys/dev/rtwn/rtl8821a/r21a_init.c
327
reg = RW(reg, R21A_MAC_PHY_CRYSTALCAP, val | (val << 6));
sys/dev/rtwn/usb/rtwn_usb_reg.c
101
rtwn_usb_write_1(struct rtwn_softc *sc, uint16_t addr, uint8_t val)
sys/dev/rtwn/usb/rtwn_usb_reg.c
103
return (rtwn_usb_write_region_1(sc, addr, &val, sizeof(val)));
sys/dev/rtwn/usb/rtwn_usb_reg.c
107
rtwn_usb_write_2(struct rtwn_softc *sc, uint16_t addr, uint16_t val)
sys/dev/rtwn/usb/rtwn_usb_reg.c
109
val = htole16(val);
sys/dev/rtwn/usb/rtwn_usb_reg.c
110
return (rtwn_usb_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val)));
sys/dev/rtwn/usb/rtwn_usb_reg.c
114
rtwn_usb_write_4(struct rtwn_softc *sc, uint16_t addr, uint32_t val)
sys/dev/rtwn/usb/rtwn_usb_reg.c
116
val = htole32(val);
sys/dev/rtwn/usb/rtwn_usb_reg.c
117
return (rtwn_usb_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val)));
sys/dev/rtwn/usb/rtwn_usb_reg.c
137
uint8_t val;
sys/dev/rtwn/usb/rtwn_usb_reg.c
139
if (rtwn_usb_read_region_1(sc, addr, &val, 1) != 0)
sys/dev/rtwn/usb/rtwn_usb_reg.c
141
return (val);
sys/dev/rtwn/usb/rtwn_usb_reg.c
147
uint16_t val;
sys/dev/rtwn/usb/rtwn_usb_reg.c
149
if (rtwn_usb_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0)
sys/dev/rtwn/usb/rtwn_usb_reg.c
151
return (le16toh(val));
sys/dev/rtwn/usb/rtwn_usb_reg.c
157
uint32_t val;
sys/dev/rtwn/usb/rtwn_usb_reg.c
159
if (rtwn_usb_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0)
sys/dev/rtwn/usb/rtwn_usb_reg.c
161
return (le32toh(val));
sys/dev/safe/safe.c
169
#define WRITE_REG(sc,reg,val) \
sys/dev/safe/safe.c
170
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, reg, val)
sys/dev/safexcel/safexcel.c
362
uint32_t version, val;
sys/dev/safexcel/safexcel.c
367
val = SAFEXCEL_READ(sc, SAFEXCEL_HIA_AIC(sc) + SAFEXCEL_HIA_MST_CTRL);
sys/dev/safexcel/safexcel.c
369
val = SAFEXCEL_READ(sc,
sys/dev/safexcel/safexcel.c
371
val = val ^ (SAFEXCEL_MST_CTRL_NO_BYTE_SWAP >> 24);
sys/dev/safexcel/safexcel.c
374
val);
sys/dev/safexcel/safexcel.c
437
uint32_t val;
sys/dev/safexcel/safexcel.c
447
val = SAFEXCEL_READ(sc,
sys/dev/safexcel/safexcel.c
449
if ((val & SAFEXCEL_DSE_THR_RDR_ID_MASK) ==
sys/dev/safexcel/safexcel.c
554
uint32_t cd_size_rnd, mask, rd_size_rnd, val;
sys/dev/safexcel/safexcel.c
559
val = (sizeof(struct safexcel_res_descr) -
sys/dev/safexcel/safexcel.c
561
rd_size_rnd = (val + mask) >> sc->sc_config.hdw;
sys/dev/safexcel/safexcel_var.h
422
#define SAFEXCEL_WRITE(sc, off, val) bus_write_4((sc)->sc_res, (off), (val))
sys/dev/scc/scc_dev_quicc.c
51
#define quicc_write2(bas, reg, val) \
sys/dev/scc/scc_dev_quicc.c
52
bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
sys/dev/scc/scc_dev_quicc.c
53
#define quicc_write4(bas, reg, val) \
sys/dev/scc/scc_dev_quicc.c
54
bus_space_write_4((bas)->bst, (bas)->bsh, reg, val)
sys/dev/sdhci/fsl_sdhci.c
186
static void fsl_sdhc_set_clock(struct fsl_sdhci_softc *sc, uint16_t val);
sys/dev/sdhci/fsl_sdhci.c
197
WR4(struct fsl_sdhci_softc *sc, bus_size_t off, uint32_t val)
sys/dev/sdhci/fsl_sdhci.c
200
bus_write_4(sc->mem_res, off, val);
sys/dev/sdhci/fsl_sdhci.c
377
fsl_sdhci_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint8_t val)
sys/dev/sdhci/fsl_sdhci.c
391
val32 |= (val & SDHCI_CTRL_LED);
sys/dev/sdhci/fsl_sdhci.c
392
if (val & SDHCI_CTRL_8BITBUS)
sys/dev/sdhci/fsl_sdhci.c
395
val32 |= (val & SDHCI_CTRL_4BITBUS);
sys/dev/sdhci/fsl_sdhci.c
396
val32 |= (val & (SDHCI_CTRL_SDMA | SDHCI_CTRL_ADMA2)) << 4;
sys/dev/sdhci/fsl_sdhci.c
397
val32 |= (val & (SDHCI_CTRL_CARD_DET | SDHCI_CTRL_FORCE_CARD));
sys/dev/sdhci/fsl_sdhci.c
414
val32 |= (val << (off & 3) * 8);
sys/dev/sdhci/fsl_sdhci.c
420
fsl_sdhci_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val)
sys/dev/sdhci/fsl_sdhci.c
430
fsl_sdhc_set_clock(sc, val);
sys/dev/sdhci/fsl_sdhci.c
449
if (val & SDHCI_CMD_DATA) {
sys/dev/sdhci/fsl_sdhci.c
455
if ((val & SDHCI_CMD_RESP_MASK) == SDHCI_CMD_RESP_SHORT_BUSY) {
sys/dev/sdhci/fsl_sdhci.c
474
val32 |= val & 0x37;
sys/dev/sdhci/fsl_sdhci.c
482
(sc->cmd_and_mode & 0xffff0000) | val;
sys/dev/sdhci/fsl_sdhci.c
486
(sc->cmd_and_mode & 0xffff) | (val << 16);
sys/dev/sdhci/fsl_sdhci.c
494
val32 |= ((val & 0xffff) << (off & 3) * 8);
sys/dev/sdhci/fsl_sdhci.c
499
fsl_sdhci_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint32_t val)
sys/dev/sdhci/fsl_sdhci.c
505
sc->r1bfix_intmask &= ~val;
sys/dev/sdhci/fsl_sdhci.c
508
WR4(sc, off, val);
sys/dev/sdhci/fsl_sdhci.c
523
uint16_t val;
sys/dev/sdhci/fsl_sdhci.c
533
val = sc->sdclockreg_freq_bits;
sys/dev/sdhci/fsl_sdhci.c
540
val |= SDHCI_CLOCK_INT_EN;
sys/dev/sdhci/fsl_sdhci.c
542
val |= SDHCI_CLOCK_INT_STABLE;
sys/dev/sdhci/fsl_sdhci.c
559
val |= SDHCI_CLOCK_CARD_EN;
sys/dev/sdhci/fsl_sdhci.c
561
val |= SDHCI_CLOCK_CARD_EN;
sys/dev/sdhci/fsl_sdhci.c
564
return (val);
sys/dev/sdhci/fsl_sdhci.c
568
fsl_sdhc_set_clock(struct fsl_sdhci_softc *sc, uint16_t val)
sys/dev/sdhci/fsl_sdhci.c
579
sc->sdclockreg_freq_bits = val & SDHCI_DIVIDERS_MASK;
sys/dev/sdhci/fsl_sdhci.c
589
if ((val & SDHCI_CLOCK_CARD_EN) == 0) {
sys/dev/sdhci/fsl_sdhci.c
596
divisor = (val >> SDHCI_DIVIDER_SHIFT) & SDHCI_DIVIDER_MASK;
sys/dev/sdhci/fsl_sdhci.c
608
if ((val & SDHCI_CLOCK_CARD_EN) == 0)
sys/dev/sdhci/fsl_sdhci.c
610
divisor = ((val >> SDHCI_DIVIDER_SHIFT) & SDHCI_DIVIDER_MASK) |
sys/dev/sdhci/fsl_sdhci.c
611
((val >> SDHCI_DIVIDER_HI_SHIFT) & SDHCI_DIVIDER_HI_MASK) <<
sys/dev/sdhci/sdhci.c
1872
uint32_t val;
sys/dev/sdhci/sdhci.c
1903
val = RD4(slot, SDHCI_RESPONSE + i * 4);
sys/dev/sdhci/sdhci.c
1906
slot->curcmd->resp[3 - i] = val;
sys/dev/sdhci/sdhci.c
1909
(val << 8) | extra;
sys/dev/sdhci/sdhci.c
1910
extra = val >> 24;
sys/dev/sdhci/sdhci.c
2171
uint32_t val;
sys/dev/sdhci/sdhci.c
2174
val = RD4(slot, SDHCI_PRESENT_STATE);
sys/dev/sdhci/sdhci.c
2176
return (!(val & SDHCI_WRITE_PROTECT));
sys/dev/sdhci/sdhci.c
87
#define WR1(slot, off, val) SDHCI_WRITE_1((slot)->bus, (slot), (off), (val))
sys/dev/sdhci/sdhci.c
88
#define WR2(slot, off, val) SDHCI_WRITE_2((slot)->bus, (slot), (off), (val))
sys/dev/sdhci/sdhci.c
89
#define WR4(slot, off, val) SDHCI_WRITE_4((slot)->bus, (slot), (off), (val))
sys/dev/sdhci/sdhci_acpi.c
121
bus_size_t off, uint8_t val)
sys/dev/sdhci/sdhci_acpi.c
127
bus_write_1(sc->mem_res, off, val);
sys/dev/sdhci/sdhci_acpi.c
143
bus_size_t off, uint16_t val)
sys/dev/sdhci/sdhci_acpi.c
149
bus_write_2(sc->mem_res, off, val);
sys/dev/sdhci/sdhci_acpi.c
165
bus_size_t off, uint32_t val)
sys/dev/sdhci/sdhci_acpi.c
171
bus_write_4(sc->mem_res, off, val);
sys/dev/sdhci/sdhci_fdt.c
262
uint8_t val)
sys/dev/sdhci/sdhci_fdt.c
266
bus_write_1(sc->mem_res[slot->num], off, val);
sys/dev/sdhci/sdhci_fdt.c
279
uint16_t val)
sys/dev/sdhci/sdhci_fdt.c
283
bus_write_2(sc->mem_res[slot->num], off, val);
sys/dev/sdhci/sdhci_fdt.c
301
uint32_t val)
sys/dev/sdhci/sdhci_fdt.c
305
bus_write_4(sc->mem_res[slot->num], off, val);
sys/dev/sdhci/sdhci_fdt_rockchip.c
138
uint32_t mask, val;
sys/dev/sdhci/sdhci_fdt_rockchip.c
149
val = 0;
sys/dev/sdhci/sdhci_fdt_rockchip.c
150
SYSCON_WRITE_4(sc->syscon, RK3399_GRF_EMMCCORE_CON11, (mask << 16) | val);
sys/dev/sdhci/sdhci_fdt_rockchip.c
154
val = SHIFTIN((freq + (1000000 / 2)) / 1000000,
sys/dev/sdhci/sdhci_fdt_rockchip.c
156
SYSCON_WRITE_4(sc->syscon, RK3399_GRF_EMMCCORE_CON0, (mask << 16) | val);
sys/dev/sdhci/sdhci_fdt_rockchip.c
165
int32_t val;
sys/dev/sdhci/sdhci_fdt_rockchip.c
197
val = bus_read_4(sc->mem_res[slot->num],
sys/dev/sdhci/sdhci_fdt_rockchip.c
199
if (val & DLL_STATUS0_DLL_LOCK &&
sys/dev/sdhci/sdhci_fdt_rockchip.c
200
!(val & DLL_STATUS0_DLL_TIMEOUT))
sys/dev/sdhci/sdhci_fsl_fdt.c
1094
uint32_t val;
sys/dev/sdhci/sdhci_fsl_fdt.c
1105
val = RD4(sc, SDHCI_FSL_TBCTL);
sys/dev/sdhci/sdhci_fsl_fdt.c
1106
val &= ~SDHCI_FSL_TBCTL_TBEN;
sys/dev/sdhci/sdhci_fsl_fdt.c
1107
WR4(sc, SDHCI_FSL_TBCTL, val);
sys/dev/sdhci/sdhci_fsl_fdt.c
1115
val = RD4(sc, SDHCI_FSL_DLLCFG1);
sys/dev/sdhci/sdhci_fsl_fdt.c
1116
val &= ~SDHCI_FSL_DLLCFG1_PULSE_STRETCH;
sys/dev/sdhci/sdhci_fsl_fdt.c
1117
WR4(sc, SDHCI_FSL_DLLCFG1, val);
sys/dev/sdhci/sdhci_fsl_fdt.c
265
write_be(struct sdhci_fsl_fdt_softc *sc, bus_size_t off, uint32_t val)
sys/dev/sdhci/sdhci_fsl_fdt.c
268
bus_write_4(sc->mem_res, off, htobe32(val));
sys/dev/sdhci/sdhci_fsl_fdt.c
279
write_le(struct sdhci_fsl_fdt_softc *sc, bus_size_t off, uint32_t val)
sys/dev/sdhci/sdhci_fsl_fdt.c
282
bus_write_4(sc->mem_res, off, val);
sys/dev/sdhci/sdhci_fsl_fdt.c
289
uint16_t val;
sys/dev/sdhci/sdhci_fsl_fdt.c
291
val = sc->sdclk_bits | SDHCI_CLOCK_INT_EN;
sys/dev/sdhci/sdhci_fsl_fdt.c
293
val |= SDHCI_CLOCK_INT_STABLE;
sys/dev/sdhci/sdhci_fsl_fdt.c
295
val |= SDHCI_CLOCK_CARD_EN;
sys/dev/sdhci/sdhci_fsl_fdt.c
297
return (val);
sys/dev/sdhci/sdhci_fsl_fdt.c
317
uint16_t val)
sys/dev/sdhci/sdhci_fsl_fdt.c
321
sc->sdclk_bits = val & SDHCI_DIVIDERS_MASK;
sys/dev/sdhci/sdhci_fsl_fdt.c
324
if ((val & SDHCI_CLOCK_CARD_EN) == 0) {
sys/dev/sdhci/sdhci_fsl_fdt.c
469
uint8_t val)
sys/dev/sdhci/sdhci_fsl_fdt.c
480
val32 |= (val & SDHCI_CTRL_LED);
sys/dev/sdhci/sdhci_fsl_fdt.c
482
if (val & SDHCI_CTRL_8BITBUS)
sys/dev/sdhci/sdhci_fsl_fdt.c
486
val32 |= (val & SDHCI_CTRL_4BITBUS);
sys/dev/sdhci/sdhci_fsl_fdt.c
490
val32 |= (val & (SDHCI_CTRL_CARD_DET |
sys/dev/sdhci/sdhci_fsl_fdt.c
499
val32 |= (val << (off & 3) * 8);
sys/dev/sdhci/sdhci_fsl_fdt.c
507
uint16_t val)
sys/dev/sdhci/sdhci_fsl_fdt.c
516
fsl_sdhc_fdt_set_clock(sc, slot, val);
sys/dev/sdhci/sdhci_fsl_fdt.c
524
sc->cmd_and_mode = val;
sys/dev/sdhci/sdhci_fsl_fdt.c
528
(sc->cmd_and_mode & UINT16_MAX) | (val << 16);
sys/dev/sdhci/sdhci_fsl_fdt.c
537
if ((val & SDHCI_CTRL2_UHS_MASK) == SDHCI_CTRL2_MMC_HS400)
sys/dev/sdhci/sdhci_fsl_fdt.c
538
val &= ~SDHCI_CTRL2_MMC_HS400;
sys/dev/sdhci/sdhci_fsl_fdt.c
542
val32 |= ((val & UINT16_MAX) << (off & 3) * 8);
sys/dev/sdhci/sdhci_fsl_fdt.c
550
uint32_t val)
sys/dev/sdhci/sdhci_fsl_fdt.c
558
bus_write_4(sc->mem_res, off, val);
sys/dev/sdhci/sdhci_fsl_fdt.c
569
val &= ~SDHCI_INT_DMA_END;
sys/dev/sdhci/sdhci_fsl_fdt.c
572
WR4(sc, off, val);
sys/dev/sdhci/sdhci_fsl_fdt.c
699
uint32_t val_old, val;
sys/dev/sdhci/sdhci_fsl_fdt.c
705
val_old = val = RD4(sc, SDHCI_FSL_PROT_CTRL);
sys/dev/sdhci/sdhci_fsl_fdt.c
712
val |= SDHCI_FSL_PROT_CTRL_VOLT_SEL;
sys/dev/sdhci/sdhci_fsl_fdt.c
716
val &= ~SDHCI_FSL_PROT_CTRL_VOLT_SEL;
sys/dev/sdhci/sdhci_fsl_fdt.c
723
WR4(sc, SDHCI_FSL_PROT_CTRL, val);
sys/dev/sdhci/sdhci_fsl_fdt.c
867
uint32_t val, buf_order;
sys/dev/sdhci/sdhci_fsl_fdt.c
960
val = RD4(sc, SDHCI_FSL_PROT_CTRL);
sys/dev/sdhci/sdhci_fsl_fdt.c
961
val &= ~SDHCI_FSL_PROT_CTRL_BYTE_MASK;
sys/dev/sdhci/sdhci_fsl_fdt.c
962
WR4(sc, SDHCI_FSL_PROT_CTRL, val | buf_order);
sys/dev/sdhci/sdhci_fsl_fdt.c
969
val = RD4(sc, SDHCI_CLOCK_CONTROL);
sys/dev/sdhci/sdhci_fsl_fdt.c
970
WR4(sc, SDHCI_CLOCK_CONTROL, val & ~SDHCI_FSL_CLK_SDCLKEN);
sys/dev/sdhci/sdhci_fsl_fdt.c
971
val = RD4(sc, SDHCI_FSL_ESDHC_CTRL);
sys/dev/sdhci/sdhci_fsl_fdt.c
972
WR4(sc, SDHCI_FSL_ESDHC_CTRL, val | SDHCI_FSL_ESDHC_CTRL_CLK_DIV2);
sys/dev/sdhci/sdhci_pci.c
185
uint8_t val)
sys/dev/sdhci/sdhci_pci.c
191
bus_write_1(sc->mem_res[slot->num], off, val);
sys/dev/sdhci/sdhci_pci.c
206
uint16_t val)
sys/dev/sdhci/sdhci_pci.c
212
bus_write_2(sc->mem_res[slot->num], off, val);
sys/dev/sdhci/sdhci_pci.c
227
uint32_t val)
sys/dev/sdhci/sdhci_pci.c
233
bus_write_4(sc->mem_res[slot->num], off, val);
sys/dev/sdhci/sdhci_xenon.c
112
bus_size_t off, uint32_t val)
sys/dev/sdhci/sdhci_xenon.c
116
bus_write_4(sc->mem_res, off, val);
sys/dev/sdhci/sdhci_xenon.c
472
uint32_t val;
sys/dev/sdhci/sdhci_xenon.c
475
val = 0;
sys/dev/sdhci/sdhci_xenon.c
478
&val, sizeof(val), DEVICE_PROP_UINT32) > 0)
sys/dev/sdhci/sdhci_xenon.c
479
sc->slot->quirks = val;
sys/dev/sdhci/sdhci_xenon.c
482
&val, sizeof(val), DEVICE_PROP_UINT32) > 0)
sys/dev/sdhci/sdhci_xenon.c
483
sc->znr = val & XENON_ZNR_MASK;
sys/dev/sdhci/sdhci_xenon.c
486
&val, sizeof(val), DEVICE_PROP_UINT32) > 0)
sys/dev/sdhci/sdhci_xenon.c
487
sc->zpr = val & XENON_ZPR_MASK;
sys/dev/sdhci/sdhci_xenon.c
76
bus_size_t off, uint8_t val)
sys/dev/sdhci/sdhci_xenon.c
80
bus_write_1(sc->mem_res, off, val);
sys/dev/sdhci/sdhci_xenon.c
94
bus_size_t off, uint16_t val)
sys/dev/sdhci/sdhci_xenon.c
98
bus_write_2(sc->mem_res, off, val);
sys/dev/sdio/sdio_subr.c
160
sdio_write_1(struct sdio_func *f, uint32_t addr, uint8_t val, int *err)
sys/dev/sdio/sdio_subr.c
164
error = SDIO_WRITE_DIRECT(device_get_parent(f->dev), f->fn, addr, val);
sys/dev/sdio/sdio_subr.c
189
sdio_write_2(struct sdio_func *f, uint32_t addr, uint16_t val, int *err)
sys/dev/sdio/sdio_subr.c
194
sizeof(val), (uint8_t *)&val, true);
sys/dev/sdio/sdio_subr.c
219
sdio_write_4(struct sdio_func *f, uint32_t addr, uint32_t val, int *err)
sys/dev/sdio/sdio_subr.c
224
sizeof(val), (uint8_t *)&val, true);
sys/dev/sdio/sdio_subr.c
248
sdio_f0_write_1(struct sdio_func *f, uint32_t addr, uint8_t val, int *err)
sys/dev/sdio/sdio_subr.c
252
error = SDIO_WRITE_DIRECT(device_get_parent(f->dev), 0, addr, val);
sys/dev/sdio/sdio_subr.c
77
uint8_t val;
sys/dev/sdio/sdio_subr.c
81
error = SDIO_READ_DIRECT(pdev, 0, addr, &val);
sys/dev/sdio/sdio_subr.c
85
enabled = (val & (1 << fn)) ? true : false;
sys/dev/sdio/sdio_subr.c
90
val |= (1 << fn);
sys/dev/sdio/sdio_subr.c
92
val &= ~(1 << fn);
sys/dev/sdio/sdio_subr.c
93
error = SDIO_WRITE_DIRECT(pdev, 0, addr, val);
sys/dev/sdio/sdiob.c
142
uint8_t *val)
sys/dev/sdio/sdiob.c
147
KASSERT((val != NULL), ("%s val passed as NULL\n", __func__));
sys/dev/sdio/sdiob.c
156
fn, addr, wr, *val));
sys/dev/sdio/sdiob.c
161
arg |= SD_IO_RW_WR | SD_IO_RW_RAW | SD_IO_RW_DAT(*val);
sys/dev/sdio/sdiob.c
188
*val = sc->ccb->mmcio.cmd.resp[0] & 0xff;
sys/dev/sdio/sdiob.c
195
uint8_t *val)
sys/dev/sdio/sdiob.c
202
error = sdiob_rw_direct_sc(sc, fn, addr, wr, val);
sys/dev/sdio/sdiob.c
208
sdiob_read_direct(device_t dev, uint8_t fn, uint32_t addr, uint8_t *val)
sys/dev/sdio/sdiob.c
215
if (error == 0 && val != NULL)
sys/dev/sdio/sdiob.c
216
*val = v;
sys/dev/sdio/sdiob.c
221
sdiob_write_direct(device_t dev, uint8_t fn, uint32_t addr, uint8_t val)
sys/dev/sdio/sdiob.c
224
return (sdio_rw_direct(dev, fn, addr, true, &val));
sys/dev/sdio/sdiob.c
650
uint8_t *val)
sys/dev/sdio/sdiob.c
656
if (error == 0 && val != NULL)
sys/dev/sdio/sdiob.c
657
*val = v;
sys/dev/sdio/sdiob.c
789
uint8_t val;
sys/dev/sdio/sdiob.c
791
error = sdio_read_direct_sc(sc, 0, SD_IO_CCCR_CISPTR + 0, &val);
sys/dev/sdio/sdiob.c
794
a = val;
sys/dev/sdio/sdiob.c
795
error = sdio_read_direct_sc(sc, 0, SD_IO_CCCR_CISPTR + 1, &val);
sys/dev/sdio/sdiob.c
798
a |= (val << 8);
sys/dev/sdio/sdiob.c
799
error = sdio_read_direct_sc(sc, 0, SD_IO_CCCR_CISPTR + 2, &val);
sys/dev/sdio/sdiob.c
802
a |= (val << 16);
sys/dev/sdio/sdiob.c
821
uint8_t fn_max, val;
sys/dev/sdio/sdiob.c
836
error = sdio_read_direct_sc(sc, 0, SD_IO_CCCR_CARDCAP, &val);
sys/dev/sdio/sdiob.c
839
sc->cardinfo.support_multiblk = (val & CCCR_CC_SMB) ? true : false;
sys/dev/sdio/sdiob.c
852
error = sdio_read_direct_sc(sc, 0, fbr_addr++, &val);
sys/dev/sdio/sdiob.c
855
cis_addr = val;
sys/dev/sdio/sdiob.c
856
error = sdio_read_direct_sc(sc, 0, fbr_addr++, &val);
sys/dev/sdio/sdiob.c
859
cis_addr |= (val << 8);
sys/dev/sdio/sdiob.c
860
error = sdio_read_direct_sc(sc, 0, fbr_addr++, &val);
sys/dev/sdio/sdiob.c
863
cis_addr |= (val << 16);
sys/dev/sdio/sdiob.c
871
error = sdio_read_direct_sc(sc, 0, fbr_addr++, &val);
sys/dev/sdio/sdiob.c
874
sc->cardinfo.f[fn].class = (val & 0x0f);
sys/dev/sdio/sdiob.c
876
error = sdio_read_direct_sc(sc, 0, fbr_addr, &val);
sys/dev/sdio/sdiob.c
879
sc->cardinfo.f[fn].class = val;
sys/dev/sec/sec.h
223
#define SEC_WRITE(sc, reg, val) \
sys/dev/sec/sec.h
224
bus_space_write_8((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg), (val))
sys/dev/sec/sec.h
229
#define SEC_ADD(sc, cnt, wrap, val) \
sys/dev/sec/sec.h
230
((sc)->cnt = (((sc)->cnt) + (val)) & ((wrap) - 1))
sys/dev/sec/sec.h
237
#define SEC_PUT_GENERIC(sc, tab, cnt, wrap, val) \
sys/dev/sec/sec.h
238
((sc)->tab[SEC_INC(sc, cnt, wrap)] = val)
sys/dev/sfxge/sfxge_port.c
106
uint64_t val;
sys/dev/sfxge/sfxge_port.c
117
val = mac_stats[EFX_MAC_RX_PKTS];
sys/dev/sfxge/sfxge_port.c
120
val = mac_stats[EFX_MAC_RX_ERRORS];
sys/dev/sfxge/sfxge_port.c
123
val = mac_stats[EFX_MAC_TX_PKTS];
sys/dev/sfxge/sfxge_port.c
126
val = mac_stats[EFX_MAC_TX_ERRORS];
sys/dev/sfxge/sfxge_port.c
129
val = mac_stats[EFX_MAC_TX_SGL_COL_PKTS] +
sys/dev/sfxge/sfxge_port.c
135
val = mac_stats[EFX_MAC_RX_OCTETS];
sys/dev/sfxge/sfxge_port.c
138
val = mac_stats[EFX_MAC_TX_OCTETS];
sys/dev/sfxge/sfxge_port.c
141
val = mac_stats[EFX_MAC_TX_MULTICST_PKTS] +
sys/dev/sfxge/sfxge_port.c
160
return (val);
sys/dev/sfxge/sfxge_port.c
169
uint64_t val;
sys/dev/sfxge/sfxge_port.c
173
val = ((uint64_t *)sc->port.mac_stats.decode_buf)[id];
sys/dev/sfxge/sfxge_port.c
177
rc = SYSCTL_OUT(req, &val, sizeof(val));
sys/dev/sfxge/sfxge_port.c
619
uint32_t val;
sys/dev/sfxge/sfxge_port.c
623
val = ((uint32_t *)sc->port.phy_stats.decode_buf)[id];
sys/dev/sfxge/sfxge_port.c
627
rc = SYSCTL_OUT(req, &val, sizeof(val));
sys/dev/sge/if_sge.c
180
#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->sge_res, reg, val)
sys/dev/sge/if_sge.c
181
#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->sge_res, reg, val)
sys/dev/sge/if_sge.c
182
#define CSR_WRITE_1(cs, reg, val) bus_write_1(sc->sge_res, reg, val)
sys/dev/sge/if_sge.c
211
uint32_t val;
sys/dev/sge/if_sge.c
219
val = CSR_READ_4(sc, ROMInterface);
sys/dev/sge/if_sge.c
220
if ((val & EI_REQ) == 0)
sys/dev/sge/if_sge.c
226
"EEPROM read timeout : 0x%08x\n", val);
sys/dev/sge/if_sge.c
230
return ((val & EI_DATA) >> EI_DATA_SHIFT);
sys/dev/sge/if_sge.c
236
uint16_t val;
sys/dev/sge/if_sge.c
239
val = sge_read_eeprom(sc, EEPROMSignature);
sys/dev/sge/if_sge.c
240
if (val == 0xffff || val == 0) {
sys/dev/sge/if_sge.c
242
"invalid EEPROM signature : 0x%04x\n", val);
sys/dev/sge/if_sge.c
247
val = sge_read_eeprom(sc, EEPROMMACAddr + i / 2);
sys/dev/sge/if_sge.c
248
dest[i + 0] = (uint8_t)val;
sys/dev/sge/if_sge.c
249
dest[i + 1] = (uint8_t)(val >> 8);
sys/dev/sge/if_sge.c
332
uint32_t val;
sys/dev/sge/if_sge.c
340
val = CSR_READ_4(sc, GMIIControl);
sys/dev/sge/if_sge.c
341
if ((val & GMI_REQ) == 0)
sys/dev/sge/if_sge.c
349
return ((val & GMI_DATA) >> GMI_DATA_SHIFT);
sys/dev/sge/if_sge.c
356
uint32_t val;
sys/dev/sge/if_sge.c
365
val = CSR_READ_4(sc, GMIIControl);
sys/dev/sge/if_sge.c
366
if ((val & GMI_REQ) == 0)
sys/dev/siis/siis.c
1544
uint32_t val;
sys/dev/siis/siis.c
1547
while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) &
sys/dev/siis/siis.c
1552
"(timeout 100ms) status = %08x\n", val);
sys/dev/siis/siis.c
1564
uint32_t val;
sys/dev/siis/siis.c
1566
while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) &
sys/dev/siis/siis.c
1571
"status = %08x\n", t, val);
sys/dev/siis/siis.c
1583
uint32_t val;
sys/dev/siis/siis.c
1629
val = ATA_SC_SPD_SPEED_GEN1;
sys/dev/siis/siis.c
1631
val = ATA_SC_SPD_SPEED_GEN2;
sys/dev/siis/siis.c
1633
val = ATA_SC_SPD_SPEED_GEN3;
sys/dev/siis/siis.c
1635
val = 0;
sys/dev/siis/siis.c
1637
ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 :
sys/dev/sis/if_sis.c
118
#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->sis_res[0], reg, val)
sys/dev/sis/if_sis.c
2313
uint32_t val;
sys/dev/sis/if_sis.c
2325
val = 0;
sys/dev/sis/if_sis.c
2327
val |= NS_WCSR_WAKE_UCAST;
sys/dev/sis/if_sis.c
2329
val |= NS_WCSR_WAKE_MCAST;
sys/dev/sis/if_sis.c
2331
val |= NS_WCSR_WAKE_MAGIC;
sys/dev/sis/if_sis.c
2332
CSR_WRITE_4(sc, NS_WCSR, val);
sys/dev/sis/if_sis.c
2334
val = CSR_READ_4(sc, NS_CLKRUN);
sys/dev/sis/if_sis.c
2335
val |= NS_CLKRUN_PMEENB | NS_CLKRUN_PMESTS;
sys/dev/sis/if_sis.c
2336
CSR_WRITE_4(sc, NS_CLKRUN, val);
sys/dev/sis/if_sis.c
2340
val = 0;
sys/dev/sis/if_sis.c
2342
val |= SIS_PWRMAN_WOL_MAGIC;
sys/dev/sis/if_sis.c
2343
CSR_WRITE_4(sc, SIS_PWRMAN_CTL, val);
sys/dev/sis/if_sis.c
442
uint32_t val;
sys/dev/sis/if_sis.c
446
val = CSR_READ_4(sc, SIS_EECTL);
sys/dev/sis/if_sis.c
449
return (val);
sys/dev/sis/if_sis.c
456
sis_mii_bitbang_write(device_t dev, uint32_t val)
sys/dev/sis/if_sis.c
462
CSR_WRITE_4(sc, SIS_EECTL, val);
sys/dev/sis/if_sis.c
499
int i, val = 0;
sys/dev/sis/if_sis.c
519
val = (CSR_READ_4(sc, SIS_PHYCTL) >> 16) & 0xFFFF;
sys/dev/sis/if_sis.c
521
if (val == 0xFFFF)
sys/dev/sis/if_sis.c
524
return (val);
sys/dev/sk/if_sk.c
1357
u_int32_t chunk, val;
sys/dev/sk/if_sk.c
1360
val = sc->sk_rboff / sizeof(u_int64_t);
sys/dev/sk/if_sk.c
1361
sc_if->sk_rx_ramstart = val;
sys/dev/sk/if_sk.c
1362
val += (chunk / sizeof(u_int64_t));
sys/dev/sk/if_sk.c
1363
sc_if->sk_rx_ramend = val - 1;
sys/dev/sk/if_sk.c
1364
sc_if->sk_tx_ramstart = val;
sys/dev/sk/if_sk.c
1365
val += (chunk / sizeof(u_int64_t));
sys/dev/sk/if_sk.c
1366
sc_if->sk_tx_ramend = val - 1;
sys/dev/sk/if_sk.c
1368
u_int32_t chunk, val;
sys/dev/sk/if_sk.c
1371
val = (sc->sk_rboff + (chunk * 2 * sc_if->sk_port)) /
sys/dev/sk/if_sk.c
1373
sc_if->sk_rx_ramstart = val;
sys/dev/sk/if_sk.c
1374
val += (chunk / sizeof(u_int64_t));
sys/dev/sk/if_sk.c
1375
sc_if->sk_rx_ramend = val - 1;
sys/dev/sk/if_sk.c
1376
sc_if->sk_tx_ramstart = val;
sys/dev/sk/if_sk.c
1377
val += (chunk / sizeof(u_int64_t));
sys/dev/sk/if_sk.c
1378
sc_if->sk_tx_ramend = val - 1;
sys/dev/sk/if_sk.c
3094
u_int32_t val;
sys/dev/sk/if_sk.c
3097
val = sk_win_read_4(sc, SK_GPIO);
sys/dev/sk/if_sk.c
3099
val |= SK_GPIO_DIR0|SK_GPIO_DAT0;
sys/dev/sk/if_sk.c
3101
val |= SK_GPIO_DIR2|SK_GPIO_DAT2;
sys/dev/sk/if_sk.c
3102
sk_win_write_4(sc, SK_GPIO, val);
sys/dev/sk/if_sk.c
3123
bhack[i].reg, bhack[i].val);
sys/dev/sk/if_sk.c
3574
u_int32_t val;
sys/dev/sk/if_sk.c
3588
val = CSR_READ_4(sc, sc_if->sk_tx_bmu);
sys/dev/sk/if_sk.c
3589
if ((val & SK_TXBMU_TX_STOP) == 0)
sys/dev/sk/if_sk.c
3599
val = SK_IF_READ_4(sc_if, 0, SK_RXQ1_BMU_CSR);
sys/dev/sk/if_sk.c
3600
if ((val & SK_RXBMU_RX_STOP) == 0)
sys/dev/sk/if_sk.c
3610
val = sk_win_read_4(sc, SK_GPIO);
sys/dev/sk/if_sk.c
3612
val |= SK_GPIO_DIR0;
sys/dev/sk/if_sk.c
3613
val &= ~SK_GPIO_DAT0;
sys/dev/sk/if_sk.c
3615
val |= SK_GPIO_DIR2;
sys/dev/sk/if_sk.c
3616
val &= ~SK_GPIO_DAT2;
sys/dev/sk/if_sk.c
3618
sk_win_write_4(sc, SK_GPIO, val);
sys/dev/sk/if_sk.c
396
sk_win_write_4(struct sk_softc *sc, int reg, u_int32_t val)
sys/dev/sk/if_sk.c
400
CSR_WRITE_4(sc, SK_WIN_BASE + SK_REG(reg), val);
sys/dev/sk/if_sk.c
402
CSR_WRITE_4(sc, reg, val);
sys/dev/sk/if_sk.c
408
sk_win_write_2(struct sk_softc *sc, int reg, u_int32_t val)
sys/dev/sk/if_sk.c
412
CSR_WRITE_2(sc, SK_WIN_BASE + SK_REG(reg), val);
sys/dev/sk/if_sk.c
414
CSR_WRITE_2(sc, reg, val);
sys/dev/sk/if_sk.c
420
sk_win_write_1(struct sk_softc *sc, int reg, u_int32_t val)
sys/dev/sk/if_sk.c
424
CSR_WRITE_1(sc, SK_WIN_BASE + SK_REG(reg), val);
sys/dev/sk/if_sk.c
426
CSR_WRITE_1(sc, reg, val);
sys/dev/sk/if_sk.c
459
sk_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/sk/if_sk.c
469
v = sk_xmac_miibus_writereg(sc_if, phy, reg, val);
sys/dev/sk/if_sk.c
474
v = sk_marv_miibus_writereg(sc_if, phy, reg, val);
sys/dev/sk/if_sk.c
535
sk_xmac_miibus_writereg(struct sk_if_softc *sc_if, int phy, int reg, int val)
sys/dev/sk/if_sk.c
550
SK_XM_WRITE_2(sc_if, XM_PHY_DATA, val);
sys/dev/sk/if_sk.c
585
u_int16_t val;
sys/dev/sk/if_sk.c
598
val = SK_YU_READ_2(sc_if, YUKON_SMICR);
sys/dev/sk/if_sk.c
599
if (val & YU_SMICR_READ_VALID)
sys/dev/sk/if_sk.c
608
val = SK_YU_READ_2(sc_if, YUKON_SMIDR);
sys/dev/sk/if_sk.c
610
return(val);
sys/dev/sk/if_sk.c
614
sk_marv_miibus_writereg(struct sk_if_softc *sc_if, int phy, int reg, int val)
sys/dev/sk/if_sk.c
618
SK_YU_WRITE_2(sc_if, YUKON_SMIDR, val);
sys/dev/sk/if_skreg.h
1171
#define SK_XM_WRITE_4(sc, reg, val) \
sys/dev/sk/if_skreg.h
1173
((val) & 0xFFFF)); \
sys/dev/sk/if_skreg.h
1175
((val) >> 16) & 0xFFFF)
sys/dev/sk/if_skreg.h
1180
#define SK_XM_WRITE_4(sc, reg, val) \
sys/dev/sk/if_skreg.h
1181
sk_win_write_4(sc->sk_softc, SK_XMAC_REG(sc, reg), (val))
sys/dev/sk/if_skreg.h
1187
#define SK_XM_WRITE_2(sc, reg, val) \
sys/dev/sk/if_skreg.h
1188
sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg), val)
sys/dev/sk/if_skreg.h
1213
#define SK_YU_WRITE_4(sc, reg, val) \
sys/dev/sk/if_skreg.h
1214
sk_win_write_4((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))
sys/dev/sk/if_skreg.h
1216
#define SK_YU_WRITE_2(sc, reg, val) \
sys/dev/sk/if_skreg.h
1217
sk_win_write_2((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))
sys/dev/sk/if_skreg.h
1274
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/sk/if_skreg.h
1275
bus_write_4((sc)->sk_res[0], (reg), (val))
sys/dev/sk/if_skreg.h
1276
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/sk/if_skreg.h
1277
bus_write_2((sc)->sk_res[0], (reg), (val))
sys/dev/sk/if_skreg.h
1278
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/sk/if_skreg.h
1279
bus_write_1((sc)->sk_res[0], (reg), (val))
sys/dev/sk/if_skreg.h
1430
int val;
sys/dev/sk/if_skreg.h
184
#define SK_IF_WRITE_4(sc_if, skip, reg, val) \
sys/dev/sk/if_skreg.h
186
reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)
sys/dev/sk/if_skreg.h
187
#define SK_IF_WRITE_2(sc_if, skip, reg, val) \
sys/dev/sk/if_skreg.h
189
reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)
sys/dev/sk/if_skreg.h
190
#define SK_IF_WRITE_1(sc_if, skip, reg, val) \
sys/dev/sk/if_skreg.h
192
reg + ((sc_if->sk_port * (skip + 1)) * SK_WIN_LEN), val)
sys/dev/smartpqi/smartpqi_defines.h
864
static inline void PUT_BE16(uint16_t val, uint8_t *p)
sys/dev/smartpqi/smartpqi_defines.h
866
*p++ = val >> 8;
sys/dev/smartpqi/smartpqi_defines.h
867
*p++ = val;
sys/dev/smartpqi/smartpqi_defines.h
870
static inline void PUT_BE32(uint32_t val, uint8_t *p)
sys/dev/smartpqi/smartpqi_defines.h
872
PUT_BE16(val >> 16, p);
sys/dev/smartpqi/smartpqi_defines.h
873
PUT_BE16(val, p + 2);
sys/dev/smartpqi/smartpqi_defines.h
876
static inline void PUT_BE64(uint64_t val, uint8_t *p)
sys/dev/smartpqi/smartpqi_defines.h
878
PUT_BE32(val >> 32, p);
sys/dev/smartpqi/smartpqi_defines.h
879
PUT_BE32(val, p + 4);
sys/dev/smartpqi/smartpqi_defines.h
884
static inline uint64_t CALC_PERCENT_TOTAL(uint64_t val, uint64_t total)
sys/dev/smartpqi/smartpqi_defines.h
888
percent = (val * 100) / total;
sys/dev/smartpqi/smartpqi_defines.h
991
#define OS_ATOMIC64_INIT(p,val) atomic_store_rel_64(p, val)
sys/dev/smartpqi/smartpqi_init.c
410
uint64_t val = 0;
sys/dev/smartpqi/smartpqi_init.c
413
val = PCI_MEM_GET64(softs, &softs->pqi_reg->pqi_dev_adminq_cap, PQI_ADMINQ_CAP);
sys/dev/smartpqi/smartpqi_init.c
415
max_timeout = (val & 0xFFFF00000000) >> 32;
sys/dev/smartpqi/smartpqi_init.c
447
int val = PCI_MEM_GET32(softs, &softs->ioa_reg->host_to_ioa_db,
sys/dev/smartpqi/smartpqi_init.c
449
val |= SIS_PQI_RESET_QUIESCE;
sys/dev/smartpqi/smartpqi_init.c
451
LEGACY_SIS_IDBR, LE_32(val));
sys/dev/smartpqi/smartpqi_queue.c
112
uint64_t val = 0;
sys/dev/smartpqi/smartpqi_queue.c
115
val = LE_64(PCI_MEM_GET64(softs, &softs->pqi_reg->pqi_dev_adminq_cap, PQI_ADMINQ_CAP));
sys/dev/smartpqi/smartpqi_queue.c
118
softs->admin_ib_queue.num_elem = val & 0xFF;
sys/dev/smartpqi/smartpqi_queue.c
119
softs->admin_ob_queue.num_elem = (val & 0xFF00) >> 8;
sys/dev/smartpqi/smartpqi_queue.c
121
softs->admin_ib_queue.elem_size = ((val & 0xFF0000) >> 16) * 16;
sys/dev/smartpqi/smartpqi_queue.c
122
softs->admin_ob_queue.elem_size = ((val & 0xFF000000) >> 24) * 16;
sys/dev/smartpqi/smartpqi_sis.c
172
int val;
sys/dev/smartpqi/smartpqi_sis.c
195
val = PCI_MEM_GET32(softs, &softs->ioa_reg->ioa_to_host_db, LEGACY_SIS_ODBR_R);
sys/dev/smartpqi/smartpqi_sis.c
197
DBG_FUNC("val : %x\n",val);
sys/dev/smc/if_smc.c
1006
int val;
sys/dev/smc/if_smc.c
1014
val = mii_bitbang_readreg(dev, &smc_mii_bitbang_ops, phy, reg);
sys/dev/smc/if_smc.c
1017
return (val);
sys/dev/smc/if_smc.c
177
smc_write_1(struct smc_softc *sc, bus_size_t offset, uint8_t val)
sys/dev/smc/if_smc.c
180
bus_write_1(sc->smc_reg, offset, val);
sys/dev/smc/if_smc.c
191
smc_write_2(struct smc_softc *sc, bus_size_t offset, uint16_t val)
sys/dev/smc/if_smc.c
194
bus_write_2(sc->smc_reg, offset, val);
sys/dev/smc/if_smc.c
225
uint16_t val;
sys/dev/smc/if_smc.c
246
val = bus_read_2(reg, BSR);
sys/dev/smc/if_smc.c
247
if ((val & BSR_IDENTIFY_MASK) != BSR_IDENTIFY) {
sys/dev/smc/if_smc.c
259
val = bus_read_2(reg, BSR);
sys/dev/smc/if_smc.c
260
if ((val & BSR_IDENTIFY_MASK) != BSR_IDENTIFY) {
sys/dev/smc/if_smc.c
271
val = bus_read_2(reg, BAR);
sys/dev/smc/if_smc.c
272
val = BAR_ADDRESS(val);
sys/dev/smc/if_smc.c
273
if (rman_get_start(reg) != val) {
sys/dev/smc/if_smc.c
276
"I/O resource address %lx\n", val,
sys/dev/smc/if_smc.c
285
val = bus_read_2(reg, REV);
sys/dev/smc/if_smc.c
286
val = (val & REV_CHIP_MASK) >> REV_CHIP_SHIFT;
sys/dev/smc/if_smc.c
287
if (smc_chip_ids[val] == NULL) {
sys/dev/smc/if_smc.c
289
device_printf(dev, "Unknown chip revision: %d\n", val);
sys/dev/smc/if_smc.c
294
device_set_desc(dev, smc_chip_ids[val]);
sys/dev/smc/if_smc.c
305
uint16_t val;
sys/dev/smc/if_smc.c
346
val = smc_read_2(sc, REV);
sys/dev/smc/if_smc.c
347
sc->smc_chip = (val & REV_CHIP_MASK) >> REV_CHIP_SHIFT;
sys/dev/smc/if_smc.c
348
sc->smc_rev = (val * REV_REV_MASK) >> REV_REV_SHIFT;
sys/dev/smc/if_smc.c
967
uint32_t val;
sys/dev/smc/if_smc.c
977
val = smc_read_2(sc, MGMT);
sys/dev/smc/if_smc.c
981
return (val);
sys/dev/smc/if_smc.c
985
smc_mii_bitbang_write(device_t dev, uint32_t val)
sys/dev/smc/if_smc.c
997
smc_write_2(sc, MGMT, val);
sys/dev/smc/if_smcreg.h
126
#define BAR_ADDRESS(val) \
sys/dev/smc/if_smcreg.h
127
((val & BAR_HIGH_MASK) | ((val & BAR_LOW_MASK) >> BAR_LOW_SHIFT))
sys/dev/sound/macio/davbus.c
203
burgundy_write_locked(struct davbus_softc *d, u_int reg, u_int val)
sys/dev/sound/macio/davbus.c
213
((size + offset - 1) << 10) | (i << 8) | (val & 0xFF);
sys/dev/sound/macio/davbus.c
223
val >>= 8; /* next byte. */
sys/dev/sound/macio/davbus.c
375
screamer_write_locked(struct davbus_softc *d, u_int reg, u_int val)
sys/dev/sound/macio/davbus.c
379
KASSERT(val == (val & 0xfff), ("bad val"));
sys/dev/sound/macio/davbus.c
386
x |= val;
sys/dev/sound/pci/atiixp.c
964
int err, val;
sys/dev/sound/pci/atiixp.c
971
val = sc->polling;
sys/dev/sound/pci/atiixp.c
973
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/atiixp.c
977
if (val < 0 || val > 1)
sys/dev/sound/pci/atiixp.c
981
if (val != sc->polling) {
sys/dev/sound/pci/atiixp.c
984
else if (val == 0) {
sys/dev/sound/pci/cmi.c
182
int reg, int shift, u_int32_t mask, u_int32_t val)
sys/dev/sound/pci/cmi.c
188
r |= val << shift;
sys/dev/sound/pci/cmi.c
601
cmimix_wr(struct sc_info *sc, u_int8_t port, u_int8_t val)
sys/dev/sound/pci/cmi.c
604
cmi_wr(sc, CMPCI_REG_SBDATA, val, 1);
sys/dev/sound/pci/csamidi.c
138
unsigned int val;
sys/dev/sound/pci/csamidi.c
146
val = csamidi_readio(scp, BA0_MIDCR);
sys/dev/sound/pci/csamidi.c
152
csamidi_writeio(scp, BA0_MIDCR, val);
sys/dev/sound/pci/emu10k1.c
1042
u_int32_t val, sz;
sys/dev/sound/pci/emu10k1.c
1079
val = EMU_A_ADCCR_LCHANENABLE;
sys/dev/sound/pci/emu10k1.c
1081
val |= EMU_A_ADCCR_RCHANENABLE;
sys/dev/sound/pci/emu10k1.c
1082
val |= audigy_recval(ch->spd);
sys/dev/sound/pci/emu10k1.c
1084
val = EMU_ADCCR_LCHANENABLE;
sys/dev/sound/pci/emu10k1.c
1086
val |= EMU_ADCCR_RCHANENABLE;
sys/dev/sound/pci/emu10k1.c
1087
val |= emu_recval(ch->spd);
sys/dev/sound/pci/emu10k1.c
1091
emu_wrptr(sc, 0, ch->setupreg, val);
sys/dev/sound/pci/emu10k1.c
1093
val = emu_rd(sc, EMU_INTE, 4);
sys/dev/sound/pci/emu10k1.c
1094
val |= ch->irqmask;
sys/dev/sound/pci/emu10k1.c
1095
emu_wr(sc, EMU_INTE, val, 4);
sys/dev/sound/pci/emu10k1.c
1104
val = emu_rd(sc, EMU_INTE, 4);
sys/dev/sound/pci/emu10k1.c
1105
val &= ~ch->irqmask;
sys/dev/sound/pci/emu10k1.c
1106
emu_wr(sc, EMU_INTE, val, 4);
sys/dev/sound/pci/emu10k1.c
333
u_int32_t ptr, val, mask, size, offset;
sys/dev/sound/pci/emu10k1.c
337
val = emu_rd(sc, EMU_DATA, 4);
sys/dev/sound/pci/emu10k1.c
342
val &= mask;
sys/dev/sound/pci/emu10k1.c
343
val >>= offset;
sys/dev/sound/pci/emu10k1.c
345
return val;
sys/dev/sound/pci/emu10k1.c
470
int val;
sys/dev/sound/pci/emu10k1.c
472
val = 0;
sys/dev/sound/pci/emu10k1.c
473
while (val < 7 && speed < adcspeed[val])
sys/dev/sound/pci/emu10k1.c
474
val++;
sys/dev/sound/pci/emu10k1.c
475
return val;
sys/dev/sound/pci/emu10k1.c
480
int val;
sys/dev/sound/pci/emu10k1.c
482
val = 0;
sys/dev/sound/pci/emu10k1.c
483
while (val < 8 && speed < audigy_adcspeed[val])
sys/dev/sound/pci/emu10k1.c
484
val++;
sys/dev/sound/pci/emu10k1.c
485
return val;
sys/dev/sound/pci/emu10k1.c
643
u_int32_t sa, ea, start, val, silent_page;
sys/dev/sound/pci/emu10k1.c
657
val = v->stereo ? 28 : 30;
sys/dev/sound/pci/emu10k1.c
658
val *= v->b16 ? 1 : 2;
sys/dev/sound/pci/emu10k1.c
659
start = sa + val;
sys/dev/sound/pci/emu10kx-pcm.c
686
int val;
sys/dev/sound/pci/emu10kx-pcm.c
688
val = 0;
sys/dev/sound/pci/emu10kx-pcm.c
689
while ((val < 7) && (speed < emu10k1_adcspeed[val]))
sys/dev/sound/pci/emu10kx-pcm.c
690
val++;
sys/dev/sound/pci/emu10kx-pcm.c
691
return (val);
sys/dev/sound/pci/emu10kx-pcm.c
697
int val;
sys/dev/sound/pci/emu10kx-pcm.c
699
val = 0;
sys/dev/sound/pci/emu10kx-pcm.c
700
while ((val < 8) && (speed < emu10k2_adcspeed[val]))
sys/dev/sound/pci/emu10kx-pcm.c
701
val++;
sys/dev/sound/pci/emu10kx-pcm.c
702
return (val);
sys/dev/sound/pci/emu10kx-pcm.c
948
uint32_t val, sz;
sys/dev/sound/pci/emu10kx-pcm.c
978
val = sc->is_emu10k1 ? EMU_ADCCR_LCHANENABLE : EMU_A_ADCCR_LCHANENABLE;
sys/dev/sound/pci/emu10kx-pcm.c
980
val |= sc->is_emu10k1 ? EMU_ADCCR_RCHANENABLE : EMU_A_ADCCR_RCHANENABLE;
sys/dev/sound/pci/emu10kx-pcm.c
981
val |= sc->is_emu10k1 ? emu_k1_recval(ch->spd) : emu_k2_recval(ch->spd);
sys/dev/sound/pci/emu10kx-pcm.c
983
emu_wrptr(sc->card, 0, ch->setupreg, val);
sys/dev/sound/pci/emu10kx.c
1372
uint32_t start, val, silent_page;
sys/dev/sound/pci/emu10kx.c
1384
val = v->stereo ? 28 : 30;
sys/dev/sound/pci/emu10kx.c
1385
val *= v->b16 ? 1 : 2;
sys/dev/sound/pci/emu10kx.c
1386
start = v->sa + val;
sys/dev/sound/pci/emu10kx.c
2590
emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)
sys/dev/sound/pci/emu10kx.c
2601
emu_wrptr(sc, 0, GPR(gpr), val);
sys/dev/sound/pci/emu10kx.c
395
static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val);
sys/dev/sound/pci/emu10kx.c
648
uint32_t ptr, val, mask, size, offset;
sys/dev/sound/pci/emu10kx.c
654
val = emu_rd_nolock(sc, EMU_DATA, 4);
sys/dev/sound/pci/emu10kx.c
666
val &= mask;
sys/dev/sound/pci/emu10kx.c
667
val >>= offset;
sys/dev/sound/pci/emu10kx.c
669
return (val);
sys/dev/sound/pci/emu10kx.c
705
uint32_t val;
sys/dev/sound/pci/emu10kx.c
710
val = emu_rd_nolock(sc, EMU_DATA2, 4);
sys/dev/sound/pci/emu10kx.c
714
return (val);
sys/dev/sound/pci/envy24.c
1691
u_int32_t val, prev;
sys/dev/sound/pci/envy24.c
1698
for (i = 0; (val = envy24_speed[i]) != 0; i++) {
sys/dev/sound/pci/envy24.c
1699
if (abs(val - speed) < abs(prev - speed))
sys/dev/sound/pci/envy24.c
1700
prev = val;
sys/dev/sound/pci/envy24.c
882
i2c_wr(void *codec, void (*ctrl)(void*, unsigned int, unsigned int), u_int32_t dev, int reg, u_int8_t val)
sys/dev/sound/pci/envy24.c
900
i2c_wrbit(ptr, ctrl, val & mask);
sys/dev/sound/pci/envy24ht.c
1602
u_int32_t val, prev;
sys/dev/sound/pci/envy24ht.c
1609
for (i = 0; (val = envy24ht_speed[i]) != 0; i++) {
sys/dev/sound/pci/envy24ht.c
1610
if (abs(val - speed) < abs(prev - speed))
sys/dev/sound/pci/envy24ht.c
1611
prev = val;
sys/dev/sound/pci/es137x.c
1437
uint32_t val;
sys/dev/sound/pci/es137x.c
1443
val = pci_read_config(dev, PCIR_LATTIMER, 1);
sys/dev/sound/pci/es137x.c
1445
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/es137x.c
1449
if (val > 255)
sys/dev/sound/pci/es137x.c
1453
pci_write_config(dev, PCIR_LATTIMER, val, 1);
sys/dev/sound/pci/es137x.c
1464
uint32_t val;
sys/dev/sound/pci/es137x.c
1470
val = ES_FIXED_RATE(es->escfg);
sys/dev/sound/pci/es137x.c
1471
if (val < es_caps.minspeed)
sys/dev/sound/pci/es137x.c
1472
val = 0;
sys/dev/sound/pci/es137x.c
1474
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/es137x.c
1478
if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed))
sys/dev/sound/pci/es137x.c
1486
if (val) {
sys/dev/sound/pci/es137x.c
1487
if (val != ES_FIXED_RATE(es->escfg)) {
sys/dev/sound/pci/es137x.c
1488
es->escfg = ES_SET_FIXED_RATE(es->escfg, val);
sys/dev/sound/pci/es137x.c
1489
es->ch[ES_DAC2].caps.maxspeed = val;
sys/dev/sound/pci/es137x.c
1490
es->ch[ES_DAC2].caps.minspeed = val;
sys/dev/sound/pci/es137x.c
1491
es->ch[ES_ADC].caps.maxspeed = val;
sys/dev/sound/pci/es137x.c
1492
es->ch[ES_ADC].caps.minspeed = val;
sys/dev/sound/pci/es137x.c
1494
es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV;
sys/dev/sound/pci/es137x.c
1514
uint32_t val, set;
sys/dev/sound/pci/es137x.c
1527
val = set;
sys/dev/sound/pci/es137x.c
1529
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/es137x.c
1533
if (!(val == 0 || val == 1))
sys/dev/sound/pci/es137x.c
1535
if (val == set)
sys/dev/sound/pci/es137x.c
1556
if (val)
sys/dev/sound/pci/es137x.c
1561
if (!val) {
sys/dev/sound/pci/es137x.c
1593
int err, val;
sys/dev/sound/pci/es137x.c
1600
val = es->polling;
sys/dev/sound/pci/es137x.c
1602
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/es137x.c
1606
if (val < 0 || val > 1)
sys/dev/sound/pci/es137x.c
1610
if (val != es->polling) {
sys/dev/sound/pci/es137x.c
1613
else if (val == 0)
sys/dev/sound/pci/hda/hdaa.c
2641
uint32_t val;
sys/dev/sound/pci/hda/hdaa.c
2643
val = w->param.eapdbtl;
sys/dev/sound/pci/hda/hdaa.c
2645
val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
sys/dev/sound/pci/hda/hdaa.c
2647
HDA_CMD_SET_EAPD_BTL_ENABLE(0, w->nid, val));
sys/dev/sound/pci/hda/hdaa.c
385
uint32_t val;
sys/dev/sound/pci/hda/hdaa.c
399
val = connected ? 0 : 1;
sys/dev/sound/pci/hda/hdaa.c
400
if (val != ctl->forcemute) {
sys/dev/sound/pci/hda/hdaa.c
401
ctl->forcemute = val;
sys/dev/sound/pci/hda/hdaa.c
409
val = w->wclass.pin.ctrl |
sys/dev/sound/pci/hda/hdaa.c
412
val = w->wclass.pin.ctrl &
sys/dev/sound/pci/hda/hdaa.c
414
if (val != w->wclass.pin.ctrl) {
sys/dev/sound/pci/hda/hdaa.c
415
w->wclass.pin.ctrl = val;
sys/dev/sound/pci/hda/hdaa.c
429
val = connected ? 1 : 0;
sys/dev/sound/pci/hda/hdaa.c
430
if (val == ctl->forcemute)
sys/dev/sound/pci/hda/hdaa.c
432
ctl->forcemute = val;
sys/dev/sound/pci/hda/hdaa.c
442
val = w1->wclass.pin.ctrl &
sys/dev/sound/pci/hda/hdaa.c
445
val = w1->wclass.pin.ctrl |
sys/dev/sound/pci/hda/hdaa.c
447
if (val != w1->wclass.pin.ctrl) {
sys/dev/sound/pci/hda/hdaa.c
448
w1->wclass.pin.ctrl = val;
sys/dev/sound/pci/hda/hdaa.c
5257
uint32_t val;
sys/dev/sound/pci/hda/hdaa.c
5259
val = w->param.eapdbtl;
sys/dev/sound/pci/hda/hdaa.c
5262
val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
sys/dev/sound/pci/hda/hdaa.c
5265
val));
sys/dev/sound/pci/hda/hdaa.c
6475
int error, val;
sys/dev/sound/pci/hda/hdaa.c
6481
val = 0;
sys/dev/sound/pci/hda/hdaa.c
6482
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/hda/hdaa.c
6483
if (error != 0 || req->newptr == NULL || val == 0)
sys/dev/sound/pci/hda/hdaa.c
6934
int error, val, i;
sys/dev/sound/pci/hda/hdaa.c
6938
val = (ch->bit32 == 4) ? 32 : ((ch->bit32 == 3) ? 24 :
sys/dev/sound/pci/hda/hdaa.c
6940
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/hda/hdaa.c
6944
if (val == 32 && HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(pcmcap))
sys/dev/sound/pci/hda/hdaa.c
6946
else if (val == 24 && HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(pcmcap))
sys/dev/sound/pci/hda/hdaa.c
6948
else if (val == 20 && HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(pcmcap))
sys/dev/sound/pci/hda/hdaa.h
253
#define VAL2QDB(ctl, val) \
sys/dev/sound/pci/hda/hdaa.h
254
(((ctl)->size + 1) * ((int)(val) - (ctl)->offset))
sys/dev/sound/pci/hda/hdaa_patches.c
747
hdaa_write_coef(device_t dev, nid_t nid, uint16_t idx, uint16_t val)
sys/dev/sound/pci/hda/hdaa_patches.c
751
return (hda_command(dev, HDA_CMD_SET_PROCESSING_COEFF(0, nid, val)));
sys/dev/sound/pci/hda/hdaa_patches.c
758
uint32_t id, subid, val;
sys/dev/sound/pci/hda/hdaa_patches.c
789
val = hdaa_read_coef(dev, 0x20, 0x46);
sys/dev/sound/pci/hda/hdaa_patches.c
790
hdaa_write_coef(dev, 0x20, 0x46, val|0x3000);
sys/dev/sound/pci/hda/hdaa_patches.c
805
val = hdaa_read_coef(dev, 0x20, 0x07);
sys/dev/sound/pci/hda/hdaa_patches.c
806
hdaa_write_coef(dev, 0x20, 0x07, val|0x80);
sys/dev/sound/pci/hda/hdac.c
1395
int devcount, i, err, val;
sys/dev/sound/pci/hda/hdac.c
1401
val = 0;
sys/dev/sound/pci/hda/hdac.c
1402
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/hda/hdac.c
1403
if (err != 0 || req->newptr == NULL || val == 0)
sys/dev/sound/pci/hda/hdac.c
1407
if (val == 100) {
sys/dev/sound/pci/hda/hdac.c
1410
} else if (val == 101) {
sys/dev/sound/pci/hda/hdac.c
1502
int err, val;
sys/dev/sound/pci/hda/hdac.c
1509
val = sc->polling;
sys/dev/sound/pci/hda/hdac.c
1511
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/hda/hdac.c
1515
if (val < 0 || val > 1)
sys/dev/sound/pci/hda/hdac.c
1519
if (val != sc->polling) {
sys/dev/sound/pci/hda/hdac.c
1520
if (val == 0) {
sys/dev/sound/pci/maestro3.c
383
u_int16_t addr, val;
sys/dev/sound/pci/maestro3.c
492
m3_wr_assp_data(sc, ch->dac_data + pv[i].addr, pv[i].val);
sys/dev/sound/pci/maestro3.c
761
u_int16_t addr, val;
sys/dev/sound/pci/maestro3.c
866
m3_wr_assp_data(sc, ch->adc_data + rv[i].addr, rv[i].val);
sys/dev/sound/pci/solo.c
108
static void ess_wr(struct ess_info *sc, int reg, u_int8_t val);
sys/dev/sound/pci/solo.c
110
static int ess_cmd(struct ess_info *sc, u_char val);
sys/dev/sound/pci/solo.c
111
static int ess_cmd1(struct ess_info *sc, u_char cmd, int val);
sys/dev/sound/pci/solo.c
117
static int ess_write(struct ess_info *sc, u_char reg, int val);
sys/dev/sound/pci/solo.c
185
ess_wr(struct ess_info *sc, int reg, u_int8_t val)
sys/dev/sound/pci/solo.c
187
port_wr(sc->sb, reg, val, 1);
sys/dev/sound/pci/solo.c
197
ess_dspwr(struct ess_info *sc, u_char val)
sys/dev/sound/pci/solo.c
203
ess_wr(sc, SBDSP_CMD, val);
sys/dev/sound/pci/solo.c
208
printf("ess_dspwr(0x%02x) timed out.\n", val);
sys/dev/sound/pci/solo.c
213
ess_cmd(struct ess_info *sc, u_char val)
sys/dev/sound/pci/solo.c
215
DEB(printf("ess_cmd: %x\n", val));
sys/dev/sound/pci/solo.c
216
return ess_dspwr(sc, val);
sys/dev/sound/pci/solo.c
220
ess_cmd1(struct ess_info *sc, u_char cmd, int val)
sys/dev/sound/pci/solo.c
222
DEB(printf("ess_cmd1: %x, %x\n", cmd, val));
sys/dev/sound/pci/solo.c
224
return ess_dspwr(sc, val & 0xff);
sys/dev/sound/pci/solo.c
241
int val;
sys/dev/sound/pci/solo.c
245
val = ess_rd(sc, SB_MIX_DATA);
sys/dev/sound/pci/solo.c
248
return val;
sys/dev/sound/pci/solo.c
266
ess_write(struct ess_info *sc, u_char reg, int val)
sys/dev/sound/pci/solo.c
268
return ess_cmd1(sc, reg, val);
sys/dev/sound/pci/spicds.c
113
spicds_wrbit(codec, val & mask);
sys/dev/sound/pci/spicds.c
123
spicds_wrbit(codec, val & mask);
sys/dev/sound/pci/spicds.c
76
spicds_wrcd(struct spicds_info *codec, int reg, u_int16_t val)
sys/dev/sound/pci/spicds.c
81
device_printf(codec->dev, "spicds_wrcd(codec, 0x%02x, 0x%02x)\n", reg, val);
sys/dev/sound/pci/via8233.c
194
int err, val;
sys/dev/sound/pci/via8233.c
199
val = via->dxs_src;
sys/dev/sound/pci/via8233.c
201
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/via8233.c
205
if (val < 0 || val > 1)
sys/dev/sound/pci/via8233.c
209
via->dxs_src = val;
sys/dev/sound/pci/via8233.c
220
int err, val;
sys/dev/sound/pci/via8233.c
227
val = via->polling;
sys/dev/sound/pci/via8233.c
229
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pci/via8233.c
233
if (val < 0 || val > 1)
sys/dev/sound/pci/via8233.c
237
if (val != via->polling) {
sys/dev/sound/pci/via8233.c
240
else if (val == 0)
sys/dev/sound/pci/via8233.c
339
via_write_codec(kobj_t obj, void *addr, int reg, uint32_t val)
sys/dev/sound/pci/via8233.c
348
VIA_AC97_DATA(val), 4);
sys/dev/sound/pci/via82c686.c
177
via_write_codec(kobj_t obj, void *addr, int reg, u_int32_t val)
sys/dev/sound/pci/via82c686.c
183
via_wr(via, VIA_CODEC_CTL, VIA_CODEC_PRIVALID | VIA_CODEC_INDEX(reg) | val, 4);
sys/dev/sound/pci/vibes.c
127
_sv_direct_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)
sys/dev/sound/pci/vibes.c
130
bus_space_write_1(sc->enh_st, sc->enh_sh, reg, val);
sys/dev/sound/pci/vibes.c
133
if (n != val) {
sys/dev/sound/pci/vibes.c
134
device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line);
sys/dev/sound/pci/vibes.c
151
_sv_indirect_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)
sys/dev/sound/pci/vibes.c
157
bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_DATA, val);
sys/dev/sound/pci/vibes.c
163
if (n != val) {
sys/dev/sound/pci/vibes.c
164
device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line);
sys/dev/sound/pcm/ac97.c
321
ac97_wrcd(struct ac97_info *codec, int reg, u_int16_t val)
sys/dev/sound/pcm/ac97.c
323
AC97_WRITE(codec->methods, codec->devinfo, reg, val);
sys/dev/sound/pcm/ac97.c
417
int val = e->recidx - 1;
sys/dev/sound/pcm/ac97.c
418
val |= val << 8;
sys/dev/sound/pcm/ac97.c
420
ac97_wrcd(codec, AC97_REG_RECSEL, val);
sys/dev/sound/pcm/ac97.c
433
int mask, max, val, reg;
sys/dev/sound/pcm/ac97.c
456
val = (left << 8) | right;
sys/dev/sound/pcm/ac97.c
471
val &= max;
sys/dev/sound/pcm/ac97.c
472
val <<= e->ofs;
sys/dev/sound/pcm/ac97.c
484
val = AC97_MUTE;
sys/dev/sound/pcm/ac97.c
493
val |= cur & ~(mask);
sys/dev/sound/pcm/ac97.c
495
ac97_wrcd(codec, reg, val);
sys/dev/sound/pcm/ac97.c
845
ac97_setflags(struct ac97_info *codec, u_int32_t val)
sys/dev/sound/pcm/ac97.c
847
codec->flags = val;
sys/dev/sound/pcm/ac97.c
950
u_int16_t val;
sys/dev/sound/pcm/ac97.c
956
val = ac97_rdcd(codec, AC97_REG_POWER);
sys/dev/sound/pcm/ac97.c
958
ea = (val >> 15) ^ inv;
sys/dev/sound/pcm/ac97.c
964
if (ea != ((val >> 15) ^ inv)) {
sys/dev/sound/pcm/ac97.c
966
ac97_wrcd(codec, AC97_REG_POWER, val ^ 0x8000);
sys/dev/sound/pcm/ac97.c
976
u_int16_t orig, val;
sys/dev/sound/pcm/ac97.c
983
val = ac97_rdcd(codec, AC97_REG_POWER);
sys/dev/sound/pcm/ac97.c
986
if ((val & 0x8000) == (orig & 0x8000))
sys/dev/sound/pcm/ac97.h
107
void ac97_wrcd(struct ac97_info *codec, int reg, u_int16_t val);
sys/dev/sound/pcm/ac97.h
97
void ac97_setflags(struct ac97_info *codec, u_int32_t val);
sys/dev/sound/pcm/channel.c
104
int err, val;
sys/dev/sound/pcm/channel.c
106
val = chn_timeout;
sys/dev/sound/pcm/channel.c
107
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/channel.c
110
if (val < CHN_TIMEOUT_MIN || val > CHN_TIMEOUT_MAX)
sys/dev/sound/pcm/channel.c
113
chn_timeout = val;
sys/dev/sound/pcm/channel.c
1387
chn_setvolume_matrix(struct pcm_channel *c, int vc, int vt, int val)
sys/dev/sound/pcm/channel.c
1395
(val >= SND_VOL_0DB_MIN && val <= SND_VOL_0DB_MAX)),
sys/dev/sound/pcm/channel.c
1397
__func__, c, vc, vt, val));
sys/dev/sound/pcm/channel.c
1400
if (val < 0)
sys/dev/sound/pcm/channel.c
1401
val = 0;
sys/dev/sound/pcm/channel.c
1402
if (val > 100)
sys/dev/sound/pcm/channel.c
1403
val = 100;
sys/dev/sound/pcm/channel.c
1405
c->volume[vc][vt] = val;
sys/dev/sound/pcm/channel.c
1428
return (val);
sys/dev/sound/pcm/channel.c
160
int err, val;
sys/dev/sound/pcm/channel.c
162
val = chn_vol_0db_pcm;
sys/dev/sound/pcm/channel.c
163
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/channel.c
166
if (val < SND_VOL_0DB_MIN || val > SND_VOL_0DB_MAX)
sys/dev/sound/pcm/channel.c
169
chn_vol_0db_pcm = val;
sys/dev/sound/pcm/channel.c
170
chn_vpc_proc(0, val);
sys/dev/sound/pcm/channel.c
182
int err, val;
sys/dev/sound/pcm/channel.c
184
val = 0;
sys/dev/sound/pcm/channel.c
185
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/channel.c
186
if (err != 0 || req->newptr == NULL || val == 0)
sys/dev/sound/pcm/channel.c
58
int err, val;
sys/dev/sound/pcm/channel.c
60
val = chn_latency;
sys/dev/sound/pcm/channel.c
61
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/channel.c
64
if (val < CHN_LATENCY_MIN || val > CHN_LATENCY_MAX)
sys/dev/sound/pcm/channel.c
67
chn_latency = val;
sys/dev/sound/pcm/channel.c
81
int err, val;
sys/dev/sound/pcm/channel.c
83
val = chn_latency_profile;
sys/dev/sound/pcm/channel.c
84
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/channel.c
87
if (val < CHN_LATENCY_PROFILE_MIN || val > CHN_LATENCY_PROFILE_MAX)
sys/dev/sound/pcm/channel.c
90
chn_latency_profile = val;
sys/dev/sound/pcm/channel.h
275
int chn_setvolume_matrix(struct pcm_channel *c, int vc, int vt, int val);
sys/dev/sound/pcm/feeder_eq.c
477
int err, val, oval;
sys/dev/sound/pcm/feeder_eq.c
486
val = 2;
sys/dev/sound/pcm/feeder_eq.c
488
val = 1;
sys/dev/sound/pcm/feeder_eq.c
490
val = 0;
sys/dev/sound/pcm/feeder_eq.c
494
oval = val;
sys/dev/sound/pcm/feeder_eq.c
495
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/feeder_eq.c
497
if (err == 0 && req->newptr != NULL && val != oval) {
sys/dev/sound/pcm/feeder_eq.c
498
if (!(val == 0 || val == 1 || val == 2)) {
sys/dev/sound/pcm/feeder_eq.c
506
if (val == 2) {
sys/dev/sound/pcm/feeder_eq.c
507
val = FEEDEQ_BYPASS;
sys/dev/sound/pcm/feeder_eq.c
509
} else if (val == 1) {
sys/dev/sound/pcm/feeder_eq.c
510
val = FEEDEQ_ENABLE;
sys/dev/sound/pcm/feeder_eq.c
513
val = FEEDEQ_DISABLE;
sys/dev/sound/pcm/feeder_eq.c
519
(void)FEEDER_SET(f, FEEDEQ_STATE, val);
sys/dev/sound/pcm/feeder_eq.c
537
int err, val, oval;
sys/dev/sound/pcm/feeder_eq.c
546
val = d->eqpreamp;
sys/dev/sound/pcm/feeder_eq.c
549
FEEDEQ_PREAMP_SIGNMARK(val), FEEDEQ_PREAMP_IPART(val),
sys/dev/sound/pcm/feeder_eq.c
550
FEEDEQ_PREAMP_FPART(val));
sys/dev/sound/pcm/feeder_eq.c
554
oval = val;
sys/dev/sound/pcm/feeder_eq.c
558
val = feed_eq_scan_preamp_arg(buf);
sys/dev/sound/pcm/feeder_eq.c
559
if (val == FEEDEQ_PREAMP_INVALID) {
sys/dev/sound/pcm/feeder_eq.c
566
if (val != oval) {
sys/dev/sound/pcm/feeder_eq.c
567
if (val < FEEDEQ_PREAMP_MIN)
sys/dev/sound/pcm/feeder_eq.c
568
val = FEEDEQ_PREAMP_MIN;
sys/dev/sound/pcm/feeder_eq.c
569
else if (val > FEEDEQ_PREAMP_MAX)
sys/dev/sound/pcm/feeder_eq.c
570
val = FEEDEQ_PREAMP_MAX;
sys/dev/sound/pcm/feeder_eq.c
572
d->eqpreamp = val;
sys/dev/sound/pcm/feeder_eq.c
578
(void)FEEDER_SET(f, FEEDEQ_PREAMP, val);
sys/dev/sound/pcm/feeder_rate.c
156
int err, val;
sys/dev/sound/pcm/feeder_rate.c
158
val = feeder_rate_min;
sys/dev/sound/pcm/feeder_rate.c
159
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/feeder_rate.c
161
if (err != 0 || req->newptr == NULL || val == feeder_rate_min)
sys/dev/sound/pcm/feeder_rate.c
164
if (!(Z_FACTOR_SAFE(val) && val < feeder_rate_max))
sys/dev/sound/pcm/feeder_rate.c
167
feeder_rate_min = val;
sys/dev/sound/pcm/feeder_rate.c
179
int err, val;
sys/dev/sound/pcm/feeder_rate.c
181
val = feeder_rate_max;
sys/dev/sound/pcm/feeder_rate.c
182
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/feeder_rate.c
184
if (err != 0 || req->newptr == NULL || val == feeder_rate_max)
sys/dev/sound/pcm/feeder_rate.c
187
if (!(Z_FACTOR_SAFE(val) && val > feeder_rate_min))
sys/dev/sound/pcm/feeder_rate.c
190
feeder_rate_max = val;
sys/dev/sound/pcm/feeder_rate.c
202
int err, val;
sys/dev/sound/pcm/feeder_rate.c
204
val = feeder_rate_round;
sys/dev/sound/pcm/feeder_rate.c
205
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/feeder_rate.c
207
if (err != 0 || req->newptr == NULL || val == feeder_rate_round)
sys/dev/sound/pcm/feeder_rate.c
210
if (val < FEEDRATE_ROUNDHZ_MIN || val > FEEDRATE_ROUNDHZ_MAX)
sys/dev/sound/pcm/feeder_rate.c
213
feeder_rate_round = val - (val % FEEDRATE_ROUNDHZ);
sys/dev/sound/pcm/feeder_rate.c
228
int i, err, val;
sys/dev/sound/pcm/feeder_rate.c
230
val = feeder_rate_quality;
sys/dev/sound/pcm/feeder_rate.c
231
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/feeder_rate.c
233
if (err != 0 || req->newptr == NULL || val == feeder_rate_quality)
sys/dev/sound/pcm/feeder_rate.c
236
if (val < Z_QUALITY_MIN || val > Z_QUALITY_MAX)
sys/dev/sound/pcm/feeder_rate.c
239
feeder_rate_quality = val;
sys/dev/sound/pcm/feeder_rate.c
262
(void)FEEDER_SET(f, FEEDRATE_QUALITY, val);
sys/dev/sound/pcm/mixer.c
701
int i, unit, val;
sys/dev/sound/pcm/mixer.c
709
if (resource_int_value(name, unit, "eq", &val) == 0 &&
sys/dev/sound/pcm/mixer.c
710
val != 0) {
sys/dev/sound/pcm/mixer.c
712
if ((val & SD_F_EQ_MASK) == val)
sys/dev/sound/pcm/mixer.c
713
snddev->flags |= val;
sys/dev/sound/pcm/mixer.c
727
&val) == 0) {
sys/dev/sound/pcm/mixer.c
728
if (val >= 0 && val <= 100) {
sys/dev/sound/pcm/mixer.c
729
v = (u_int16_t) val;
sys/dev/sound/pcm/sound.c
227
pcm_setflags(device_t dev, uint32_t val)
sys/dev/sound/pcm/sound.c
231
d->flags = val;
sys/dev/sound/pcm/sound.c
276
int err, val;
sys/dev/sound/pcm/sound.c
284
val = (d->flags & SD_F_BITPERFECT) ? 1 : 0;
sys/dev/sound/pcm/sound.c
288
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/pcm/sound.c
291
if (!(val == 0 || val == 1)) {
sys/dev/sound/pcm/sound.c
299
d->flags |= (val != 0) ? SD_F_BITPERFECT : 0;
sys/dev/sound/pcm/sound.h
163
void pcm_setflags(device_t dev, u_int32_t val);
sys/dev/sound/usb/uaudio.c
118
int err, val;
sys/dev/sound/usb/uaudio.c
120
val = uaudio_buffer_ms;
sys/dev/sound/usb/uaudio.c
121
err = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/sound/usb/uaudio.c
123
if (err != 0 || req->newptr == NULL || val == uaudio_buffer_ms)
sys/dev/sound/usb/uaudio.c
126
if (val > UAUDIO_BUFFER_MS_MAX)
sys/dev/sound/usb/uaudio.c
127
val = UAUDIO_BUFFER_MS_MAX;
sys/dev/sound/usb/uaudio.c
128
else if (val < UAUDIO_BUFFER_MS_MIN)
sys/dev/sound/usb/uaudio.c
129
val = UAUDIO_BUFFER_MS_MIN;
sys/dev/sound/usb/uaudio.c
131
uaudio_buffer_ms = val;
sys/dev/sound/usb/uaudio.c
5147
int val;
sys/dev/sound/usb/uaudio.c
5184
val = 0;
sys/dev/sound/usb/uaudio.c
5188
val = (data[0] | (data[1] << 8));
sys/dev/sound/usb/uaudio.c
5191
val = (data[2] | (data[3] << 8));
sys/dev/sound/usb/uaudio.c
5194
val = (data[4] | (data[5] << 8));
sys/dev/sound/usb/uaudio.c
5197
val = (data[6] | (data[7] << 8));
sys/dev/sound/usb/uaudio.c
5200
val = 0;
sys/dev/sound/usb/uaudio.c
5204
val = (data[0] | (data[1] << 8));
sys/dev/sound/usb/uaudio.c
5208
val = uaudio_mixer_signext(mc->type, val);
sys/dev/sound/usb/uaudio.c
5210
DPRINTFN(3, "val=%d\n", val);
sys/dev/sound/usb/uaudio.c
5212
return (val);
sys/dev/sound/usb/uaudio.c
5350
uaudio_mixer_signext(uint8_t type, int val)
sys/dev/sound/usb/uaudio.c
5354
val = (int16_t)val;
sys/dev/sound/usb/uaudio.c
5356
val = (int8_t)val;
sys/dev/sound/usb/uaudio.c
5359
return (val);
sys/dev/sound/usb/uaudio.c
5363
uaudio_mixer_bsd2value(struct uaudio_mixer_node *mc, int val)
sys/dev/sound/usb/uaudio.c
5366
val = (val != 0);
sys/dev/sound/usb/uaudio.c
5369
val = (val * mc->mul) / 100;
sys/dev/sound/usb/uaudio.c
5372
val = val + mc->minval;
sys/dev/sound/usb/uaudio.c
5375
if (val > mc->maxval)
sys/dev/sound/usb/uaudio.c
5376
val = mc->maxval;
sys/dev/sound/usb/uaudio.c
5377
else if (val < mc->minval)
sys/dev/sound/usb/uaudio.c
5378
val = mc->minval;
sys/dev/sound/usb/uaudio.c
5381
mc->type, val, mc->minval, mc->maxval, val);
sys/dev/sound/usb/uaudio.c
5382
return (val);
sys/dev/sound/usb/uaudio.c
5387
uint8_t chan, int val)
sys/dev/sound/usb/uaudio.c
5389
val = uaudio_mixer_bsd2value(mc, val);
sys/dev/sound/usb/uaudio.c
5392
mc->wData[chan] = val;
sys/dev/spibus/acpi_spibus.c
179
uint64_t val;
sys/dev/spibus/acpi_spibus.c
212
val = comp[1].Buffer.Length >= 8 ?
sys/dev/spibus/acpi_spibus.c
216
printf(" %s: %ju\n", k, (intmax_t)val);
sys/dev/spibus/acpi_spibus.c
219
if (val != 0)
sys/dev/spibus/acpi_spibus.c
220
ivar->clock = 1000000000 / val;
sys/dev/spibus/acpi_spibus.c
222
if (val != 0)
sys/dev/spibus/acpi_spibus.c
225
if (val != 0)
sys/dev/spibus/acpi_spibus.c
228
ivar->cs_delay = val;
sys/dev/spibus/acpi_spibus.c
505
acpi_spibus_write_ivar(device_t bus, device_t child, int which, uintptr_t val)
sys/dev/spibus/acpi_spibus.c
513
devi->handle = (ACPI_HANDLE)val;
sys/dev/spibus/acpi_spibus.c
516
return (spibus_write_ivar(bus, child, which, val));
sys/dev/spibus/controller/allwinner/aw_spi.c
160
#define AW_SPI_WRITE_1(sc, reg, val) bus_write_1((sc)->res[0], (reg), (val))
sys/dev/spibus/controller/allwinner/aw_spi.c
162
#define AW_SPI_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/dev/spibus/controller/allwinner/aw_spi.c
405
uint8_t val;
sys/dev/spibus/controller/allwinner/aw_spi.c
415
val = AW_SPI_READ_1(sc, AW_SPI_RDX);
sys/dev/spibus/controller/allwinner/aw_spi.c
417
sc->rxbuf[sc->rxcnt++] = val;
sys/dev/spibus/controller/rockchip/rk_spi.c
124
#define RK_SPI_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
sys/dev/sram/mmio_sram.c
134
mmio_sram_write_1(device_t dev, bus_size_t offset, uint8_t val)
sys/dev/sram/mmio_sram.c
140
dprintf("%s: writing to %lx val %x\n", __func__, offset, val);
sys/dev/sram/mmio_sram.c
142
bus_write_1(sc->res[0], offset, val);
sys/dev/ste/if_ste.c
1499
uint8_t val;
sys/dev/ste/if_ste.c
1535
val = CSR_READ_1(sc, STE_WAKE_EVENT);
sys/dev/ste/if_ste.c
1536
val &= ~(STE_WAKEEVENT_WAKEPKT_ENB | STE_WAKEEVENT_MAGICPKT_ENB |
sys/dev/ste/if_ste.c
1538
CSR_WRITE_1(sc, STE_WAKE_EVENT, val);
sys/dev/ste/if_ste.c
1615
uint32_t val;
sys/dev/ste/if_ste.c
1628
val = CSR_READ_4(sc, STE_DMACTL);
sys/dev/ste/if_ste.c
1629
val |= STE_DMACTL_TXDMA_STALL | STE_DMACTL_RXDMA_STALL;
sys/dev/ste/if_ste.c
1630
CSR_WRITE_4(sc, STE_DMACTL, val);
sys/dev/ste/if_ste.c
1639
val = CSR_READ_2(sc, STE_MACCTL1);
sys/dev/ste/if_ste.c
1640
val |= STE_MACCTL1_TX_DISABLE | STE_MACCTL1_RX_DISABLE |
sys/dev/ste/if_ste.c
1642
CSR_WRITE_2(sc, STE_MACCTL1, val);
sys/dev/ste/if_ste.c
207
uint32_t val;
sys/dev/ste/if_ste.c
2086
uint8_t val;
sys/dev/ste/if_ste.c
2098
val = CSR_READ_1(sc, STE_WAKE_EVENT);
sys/dev/ste/if_ste.c
2099
val &= ~(STE_WAKEEVENT_WAKEPKT_ENB | STE_WAKEEVENT_MAGICPKT_ENB |
sys/dev/ste/if_ste.c
2102
val |= STE_WAKEEVENT_MAGICPKT_ENB | STE_WAKEEVENT_WAKEONLAN_ENB;
sys/dev/ste/if_ste.c
2103
CSR_WRITE_1(sc, STE_WAKE_EVENT, val);
sys/dev/ste/if_ste.c
211
val = CSR_READ_1(sc, STE_PHYCTL);
sys/dev/ste/if_ste.c
215
return (val);
sys/dev/ste/if_ste.c
222
ste_mii_bitbang_write(device_t dev, uint32_t val)
sys/dev/ste/if_ste.c
228
CSR_WRITE_1(sc, STE_PHYCTL, val);
sys/dev/ste/if_ste.c
837
uint32_t val;
sys/dev/ste/if_ste.c
844
val = (uint32_t)CSR_READ_2(sc, STE_STAT_RX_OCTETS_LO) |
sys/dev/ste/if_ste.c
846
val &= 0x000FFFFF;
sys/dev/ste/if_ste.c
847
stats->rx_bytes += val;
sys/dev/ste/if_ste.c
853
val = (uint32_t)CSR_READ_2(sc, STE_STAT_TX_OCTETS_LO) |
sys/dev/ste/if_ste.c
855
val &= 0x000FFFFF;
sys/dev/ste/if_ste.c
856
stats->tx_bytes += val;
sys/dev/ste/if_ste.c
861
val = CSR_READ_1(sc, STE_STAT_SINGLE_COLLS);
sys/dev/ste/if_ste.c
862
stats->tx_single_colls += val;
sys/dev/ste/if_ste.c
863
if_inc_counter(ifp, IFCOUNTER_COLLISIONS, val);
sys/dev/ste/if_ste.c
864
val = CSR_READ_1(sc, STE_STAT_MULTI_COLLS);
sys/dev/ste/if_ste.c
865
stats->tx_multi_colls += val;
sys/dev/ste/if_ste.c
866
if_inc_counter(ifp, IFCOUNTER_COLLISIONS, val);
sys/dev/ste/if_ste.c
867
val += CSR_READ_1(sc, STE_STAT_LATE_COLLS);
sys/dev/ste/if_ste.c
868
stats->tx_late_colls += val;
sys/dev/ste/if_ste.c
869
if_inc_counter(ifp, IFCOUNTER_COLLISIONS, val);
sys/dev/ste/if_stereg.h
481
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/ste/if_stereg.h
482
bus_write_4((sc)->ste_res, reg, val)
sys/dev/ste/if_stereg.h
483
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/ste/if_stereg.h
484
bus_write_2((sc)->ste_res, reg, val)
sys/dev/ste/if_stereg.h
485
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/ste/if_stereg.h
486
bus_write_1((sc)->ste_res, reg, val)
sys/dev/stge/if_stge.c
251
uint32_t val;
sys/dev/stge/if_stge.c
255
val = CSR_READ_1(sc, STGE_PhyCtrl);
sys/dev/stge/if_stge.c
258
return (val);
sys/dev/stge/if_stge.c
267
stge_mii_bitbang_write(device_t dev, uint32_t val)
sys/dev/stge/if_stge.c
273
CSR_WRITE_1(sc, STGE_PhyCtrl, val);
sys/dev/stge/if_stge.c
287
int error, val;
sys/dev/stge/if_stge.c
300
val = mii_bitbang_readreg(dev, &stge_mii_bitbang_ops, phy, reg);
sys/dev/stge/if_stge.c
302
return (val);
sys/dev/stge/if_stge.c
311
stge_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/stge/if_stge.c
318
mii_bitbang_writereg(dev, &stge_mii_bitbang_ops, phy, reg, val);
sys/dev/stge/if_stge.c
435
uint32_t val;
sys/dev/stge/if_stge.c
452
val = pci_read_config(dev, PCIR_BAR(1), 4);
sys/dev/stge/if_stge.c
453
if (PCI_BAR_IO(val))
sys/dev/stge/if_stge.c
456
val = pci_read_config(dev, PCIR_BAR(0), 4);
sys/dev/stge/if_stge.c
457
if (!PCI_BAR_IO(val)) {
sys/dev/stge/if_stgereg.h
89
#define CSR_WRITE_4(_sc, reg, val) \
sys/dev/stge/if_stgereg.h
90
bus_write_4((_sc)->sc_res[0], (reg), (val))
sys/dev/stge/if_stgereg.h
91
#define CSR_WRITE_2(_sc, reg, val) \
sys/dev/stge/if_stgereg.h
92
bus_write_2((_sc)->sc_res[0], (reg), (val))
sys/dev/stge/if_stgereg.h
93
#define CSR_WRITE_1(_sc, reg, val) \
sys/dev/stge/if_stgereg.h
94
bus_write_1((_sc)->sc_res[0], (reg), (val))
sys/dev/sume/adapter.h
118
#define SUME_LINK_STATUS(val) ((val >> 12) & 0x1)
sys/dev/sume/adapter.h
163
uint32_t val;
sys/dev/sume/adapter.h
228
uint32_t val;
sys/dev/sume/if_sume.c
1402
sifr.val = 0;
sys/dev/sume/if_sume.c
1405
nf_priv->stats.hw_rx_packets += sifr.val;
sys/dev/sume/if_sume.c
1409
sifr.val = 0;
sys/dev/sume/if_sume.c
1412
nf_priv->stats.hw_tx_packets += sifr.val;
sys/dev/sume/if_sume.c
173
write_reg(struct sume_adapter *adapter, int offset, uint32_t val)
sys/dev/sume/if_sume.c
176
bus_space_write_4(adapter->bt, adapter->bh, offset << 2, val);
sys/dev/sume/if_sume.c
762
data->val = htole32(sifr->val);
sys/dev/sume/if_sume.c
851
sifr->val = le32toh(data->val);
sys/dev/sume/if_sume.c
954
sifr.val = 0;
sys/dev/sume/if_sume.c
959
link_status = SUME_LINK_STATUS(sifr.val);
sys/dev/superio/superio.c
1069
s->val = sio_ldn_read(sc, s->ldn, s->cr);
sys/dev/superio/superio.c
1074
sio_ldn_write(sc, s->ldn, s->cr, s->val);
sys/dev/superio/superio.c
127
sio_write(struct resource* res, uint8_t reg, uint8_t val)
sys/dev/superio/superio.c
130
bus_write_1(res, 1, val);
sys/dev/superio/superio.c
166
sio_ldn_write(struct siosc *sc, uint8_t ldn, uint8_t reg, uint8_t val)
sys/dev/superio/superio.c
175
sio_write(sc->io_res, reg, val);
sys/dev/superio/superio.c
964
superio_ldn_write(device_t dev, uint8_t ldn, uint8_t reg, uint8_t val)
sys/dev/superio/superio.c
970
sio_ldn_write(sc, ldn, reg, val);
sys/dev/superio/superio.c
975
superio_write(device_t dev, uint8_t reg, uint8_t val)
sys/dev/superio/superio.c
979
return (superio_ldn_write(dev, dinfo->ldn, reg, val));
sys/dev/superio/superio.h
53
void superio_write(device_t dev, uint8_t reg, uint8_t val);
sys/dev/superio/superio.h
54
void superio_ldn_write(device_t dev, uint8_t ldn, uint8_t reg, uint8_t val);
sys/dev/superio/superio_io.h
36
uint8_t val;
sys/dev/syscon/syscon.c
130
uint32_t val;
sys/dev/syscon/syscon.c
133
val = SYSCON_UNLOCKED_READ_4(syscon, offset);
sys/dev/syscon/syscon.c
135
return(val);
sys/dev/syscon/syscon.c
139
syscon_method_write_4(struct syscon *syscon, bus_size_t offset, uint32_t val)
sys/dev/syscon/syscon.c
144
rv = SYSCON_UNLOCKED_WRITE_4(syscon, offset, val);
sys/dev/syscon/syscon.c
72
uint32_t val);
sys/dev/syscon/syscon_generic.c
102
syscon_generic_unlocked_write_4(struct syscon *syscon, bus_size_t offset, uint32_t val)
sys/dev/syscon/syscon_generic.c
108
bus_write_4(sc->mem_res, offset, val);
sys/dev/syscon/syscon_generic.c
117
uint32_t val;
sys/dev/syscon/syscon_generic.c
121
val = bus_read_4(sc->mem_res, offset);
sys/dev/syscon/syscon_generic.c
122
val &= ~clear_bits;
sys/dev/syscon/syscon_generic.c
123
val |= set_bits;
sys/dev/syscon/syscon_generic.c
124
bus_write_4(sc->mem_res, offset, val);
sys/dev/syscon/syscon_generic.c
59
bus_size_t offset, uint32_t val);
sys/dev/syscon/syscon_generic.c
93
uint32_t val;
sys/dev/syscon/syscon_generic.c
97
val = bus_read_4(sc->mem_res, offset);
sys/dev/syscon/syscon_generic.c
98
return (val);
sys/dev/syscons/dragon/dragon_saver.c
63
gpset(int x, int y, int val)
sys/dev/syscons/dragon/dragon_saver.c
68
vid[x + y * SCRW] = val;
sys/dev/syscons/dragon/dragon_saver.c
73
gdraw(int dx, int dy, int val)
sys/dev/syscons/dragon/dragon_saver.c
87
set |= gpset(i, cur_y, val);
sys/dev/syscons/dragon/dragon_saver.c
99
set |= gpset(cur_x, i, val);
sys/dev/thunderbolt/nhi.c
1043
uint32_t val, old_ci;
sys/dev/thunderbolt/nhi.c
106
val = TB_GET_DEBUG(sc->dev, &sc->debug);
sys/dev/thunderbolt/nhi.c
107
if (val != 0) {
sys/dev/thunderbolt/nhi.c
1132
val = r->rx_pi << RX_RING_PI_SHIFT | r->rx_ci;
sys/dev/thunderbolt/nhi.c
1134
"Writing new RX PICI= 0x%08x\n", val);
sys/dev/thunderbolt/nhi.c
1135
nhi_write_reg(sc, r->rx_pici_reg, val);
sys/dev/thunderbolt/nhi.c
127
if (TUNABLE_INT_FETCH("hw.nhi.max_rings", &val) != 0) {
sys/dev/thunderbolt/nhi.c
128
val = min(val, NHI_MAX_NUM_RINGS);
sys/dev/thunderbolt/nhi.c
129
sc->max_ring_count = max(val, 1);
sys/dev/thunderbolt/nhi.c
131
if (TUNABLE_INT_FETCH("hw.nhi.force_hcm", &val) != 0)
sys/dev/thunderbolt/nhi.c
132
sc->force_hcm = val;
sys/dev/thunderbolt/nhi.c
142
if (TUNABLE_INT_FETCH(tmpstr, &val) != 0) {
sys/dev/thunderbolt/nhi.c
143
val = min(val, NHI_MAX_NUM_RINGS);
sys/dev/thunderbolt/nhi.c
144
sc->max_ring_count = max(val, 1);
sys/dev/thunderbolt/nhi.c
148
if (TUNABLE_INT_FETCH(tmpstr, &val) != 0)
sys/dev/thunderbolt/nhi.c
149
sc->force_hcm = val;
sys/dev/thunderbolt/nhi.c
192
uint32_t val;
sys/dev/thunderbolt/nhi.c
207
val = nhi_read_reg(sc, TBT_INMAILCMD);
sys/dev/thunderbolt/nhi.c
208
tb_debug(sc, DBG_MBOX|DBG_FULL, "Reading INMAILCMD= 0x%08x\n", val);
sys/dev/thunderbolt/nhi.c
209
if (val & INMAILCMD_ERROR)
sys/dev/thunderbolt/nhi.c
211
if (val & INMAILCMD_OPREQ) {
sys/dev/thunderbolt/nhi.c
225
val = nhi_read_reg(sc, TBT_INMAILCMD);
sys/dev/thunderbolt/nhi.c
227
"Polling INMAILCMD= 0x%08x\n", val);
sys/dev/thunderbolt/nhi.c
228
if ((val & INMAILCMD_OPREQ) == 0)
sys/dev/thunderbolt/nhi.c
235
if (val & INMAILCMD_OPREQ) {
sys/dev/thunderbolt/nhi.c
239
if (val & INMAILCMD_ERROR) {
sys/dev/thunderbolt/nhi.c
251
nhi_outmail_cmd(struct nhi_softc *sc, uint32_t *val)
sys/dev/thunderbolt/nhi.c
254
if (val == NULL)
sys/dev/thunderbolt/nhi.c
256
*val = nhi_read_reg(sc, TBT_OUTMAILCMD);
sys/dev/thunderbolt/nhi.c
263
uint32_t val;
sys/dev/thunderbolt/nhi.c
278
val = GET_HOST_CAPS_PATHS(nhi_read_reg(sc, NHI_HOST_CAPS));
sys/dev/thunderbolt/nhi.c
279
tb_debug(sc, DBG_INIT|DBG_NOISY, "Total Paths= %d\n", val);
sys/dev/thunderbolt/nhi.c
280
if ((val == 0) || (val > 21) || ((NHI_IS_AR(sc) && val != 12))) {
sys/dev/thunderbolt/nhi.c
281
tb_printf(sc, "WARN: unexpected number of paths: %d\n", val);
sys/dev/thunderbolt/nhi.c
284
sc->path_count = val;
sys/dev/thunderbolt/nhi.c
479
uint32_t val;
sys/dev/thunderbolt/nhi.c
495
val = (ring->rx_buffer_size << 16) | ring->rx_ring_depth;
sys/dev/thunderbolt/nhi.c
498
nhi_write_reg(sc, NHI_RX_RING_SIZE + idx, val);
sys/dev/thunderbolt/nhi.c
501
ring->ring_num, val);
sys/dev/thunderbolt/nhi.c
697
uint32_t val;
sys/dev/thunderbolt/nhi.c
703
val = nhi_read_reg(sc, NHI_DMA_MISC);
sys/dev/thunderbolt/nhi.c
704
tb_debug(sc, DBG_INIT|DBG_FULL, "Read NHI_DMA_MISC= 0x%08x\n", val);
sys/dev/thunderbolt/nhi.c
705
val |= DMA_MISC_INT_AUTOCLEAR;
sys/dev/thunderbolt/nhi.c
706
tb_debug(sc, DBG_INIT, "Setting interrupt auto-ACK, 0x%08x\n", val);
sys/dev/thunderbolt/nhi.c
707
nhi_write_reg(sc, NHI_DMA_MISC, val);
sys/dev/thunderbolt/nhi.c
98
u_int val;
sys/dev/thunderbolt/nhi_pci.c
391
#define NHI_SET_INTERRUPT(offset, mask, val) \
sys/dev/thunderbolt/nhi_pci.c
396
ivr[reg] |= (val << offset); \
sys/dev/thunderbolt/nhi_pci.c
487
uint32_t val;
sys/dev/thunderbolt/nhi_pci.c
491
val = pci_read_config(dev, ICL_VSCAP_9, 4);
sys/dev/thunderbolt/nhi_pci.c
492
tb_debug(sc, DBG_INIT, "icl_poweron val= 0x%x\n", val);
sys/dev/thunderbolt/nhi_pci.c
493
if (val & ICL_VSCAP9_FWREADY)
sys/dev/thunderbolt/nhi_pci.c
496
val = pci_read_config(dev, ICL_VSCAP_22, 4);
sys/dev/thunderbolt/nhi_pci.c
497
val |= ICL_VSCAP22_FORCEPWR;
sys/dev/thunderbolt/nhi_pci.c
498
tb_debug(sc, DBG_INIT|DBG_FULL, "icl_poweron writing 0x%x\n", val);
sys/dev/thunderbolt/nhi_pci.c
499
pci_write_config(dev, ICL_VSCAP_22, val, 4);
sys/dev/thunderbolt/nhi_pci.c
504
val = pci_read_config(dev, ICL_VSCAP_9, 4);
sys/dev/thunderbolt/nhi_pci.c
505
if (val & ICL_VSCAP9_FWREADY) {
sys/dev/thunderbolt/nhi_pci.c
521
uint32_t val[4];
sys/dev/thunderbolt/nhi_pci.c
524
val[0] = pci_read_config(dev, ICL_VSCAP_10, 4);
sys/dev/thunderbolt/nhi_pci.c
525
val[1] = pci_read_config(dev, ICL_VSCAP_11, 4);
sys/dev/thunderbolt/nhi_pci.c
526
val[2] = 0xffffffff;
sys/dev/thunderbolt/nhi_pci.c
527
val[3] = 0xffffffff;
sys/dev/thunderbolt/nhi_pci.c
529
bcopy(val, &sc->uuid, 16);
sys/dev/thunderbolt/nhi_reg.h
179
#define GET_HOST_CAPS_PATHS(val) ((val) & 0x3f)
sys/dev/thunderbolt/nhi_reg.h
237
#define SET_LC_MBOXOUT_DATA(val) ((val) << LC_MBOXOUT_DATA_SHIFT)
sys/dev/thunderbolt/nhi_reg.h
245
#define GET_LC_MBOXIN_DATA(val) ((val) >> LC_MBOXIN_DATA_SHIFT)
sys/dev/thunderbolt/nhi_var.h
222
int nhi_read_lc_mailbox(struct nhi_softc *, u_int reg, uint32_t *val);
sys/dev/thunderbolt/nhi_var.h
223
int nhi_write_lc_mailbox(struct nhi_softc *, u_int reg, uint32_t val);
sys/dev/thunderbolt/nhi_var.h
253
nhi_write_reg(struct nhi_softc *sc, u_int offset, uint32_t val)
sys/dev/thunderbolt/nhi_var.h
256
htole32(val));
sys/dev/thunderbolt/nhi_wmi.c
173
uint32_t val, params[1];
sys/dev/thunderbolt/nhi_wmi.c
189
val = (uint32_t)obj->Integer.Value;
sys/dev/thunderbolt/nhi_wmi.c
191
val = 0;
sys/dev/thunderbolt/nhi_wmi.c
195
*retval = val;
sys/dev/thunderbolt/tb_acpi_pcib.c
101
return (val);
sys/dev/thunderbolt/tb_acpi_pcib.c
80
int val;
sys/dev/thunderbolt/tb_acpi_pcib.c
95
if ((val = tb_pcib_probe_common(dev, desc)) < 0) {
sys/dev/thunderbolt/tb_acpi_pcib.c
96
val++;
sys/dev/thunderbolt/tb_debug.c
318
tbdbg_dprintf(device_t dev, u_int debug, u_int val, const char *fmt, ...)
sys/dev/thunderbolt/tb_debug.c
327
if ((lvl >= (val & 0xc0000000)) &&
sys/dev/thunderbolt/tb_debug.c
328
((dbg & (val & 0x3fffffff)) != 0)) {
sys/dev/thunderbolt/tb_debug.h
82
void tbdbg_dprintf(device_t dev, u_int debug, u_int val, const char *fmt, ...) __printflike(4, 5);
sys/dev/thunderbolt/tb_pcib.c
209
int val;
sys/dev/thunderbolt/tb_pcib.c
211
if ((val = tb_pcib_probe_common(dev, desc)) <= 0)
sys/dev/thunderbolt/tb_pcib.c
214
return (val);
sys/dev/thunderbolt/tb_pcib.c
223
uint32_t val;
sys/dev/thunderbolt/tb_pcib.c
290
val = pci_read_config(dev, sc->vsec + AR_VSCAP_1C, 4);
sys/dev/thunderbolt/tb_pcib.c
291
tb_debug(sc, DBG_BRIDGE|DBG_FULL, "VSEC+0x1c= 0x%08x\n", val);
sys/dev/thunderbolt/tb_pcib.c
292
val |= (1 << 8);
sys/dev/thunderbolt/tb_pcib.c
293
pci_write_config(dev, sc->vsec + AR_VSCAP_1C, val, 4);
sys/dev/thunderbolt/tb_pcib.c
295
val = pci_read_config(dev, sc->vsec + AR_VSCAP_B0, 4);
sys/dev/thunderbolt/tb_pcib.c
296
tb_debug(sc, DBG_BRIDGE|DBG_FULL, "VSEC+0xb0= 0x%08x\n", val);
sys/dev/thunderbolt/tb_pcib.c
297
val |= (1 << 12);
sys/dev/thunderbolt/tb_pcib.c
298
pci_write_config(dev, sc->vsec + AR_VSCAP_B0, val, 4);
sys/dev/thunderbolt/tb_pcib.c
395
uint32_t val;
sys/dev/thunderbolt/tb_pcib.c
400
pci_read_config(dev, vsec + PCIE2CIO_CMD, &val);
sys/dev/thunderbolt/tb_pcib.c
401
if ((val & PCIE2CIO_CMD_START) == 0) {
sys/dev/thunderbolt/tb_pcib.c
402
if (val & PCIE2CIO_CMD_TIMEOUT)
sys/dev/thunderbolt/tb_pcib.c
416
uint32_t *val)
sys/dev/thunderbolt/tb_pcib.c
435
*val = pci_read_config(dev, vsec + PCIE2CIO_RDDATA, 4);
sys/dev/thunderbolt/tb_pcib.c
442
uint32_t val)
sys/dev/thunderbolt/tb_pcib.c
452
pci_write_config(dev, vsec + PCIE2CIO_WRDATA, val, 4);
sys/dev/thunderbolt/tb_pcib.c
475
uint32_t vsec, val;
sys/dev/thunderbolt/tb_pcib.c
497
val = pci_read_config(dev, vsec + 0x18, 4);
sys/dev/thunderbolt/tb_pcib.c
498
if ((val & 0x1f) > 0) {
sys/dev/ti/if_tireg.h
896
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/ti/if_tireg.h
897
bus_space_write_4((sc)->ti_btag, (sc)->ti_bhandle, (reg), (val))
sys/dev/tpm/tpm20.h
158
AND4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
sys/dev/tpm/tpm20.h
162
TPM_WRITE_4(sc->dev, off, v & val);
sys/dev/tpm/tpm20.h
165
OR1(struct tpm_sc *sc, bus_size_t off, uint8_t val)
sys/dev/tpm/tpm20.h
169
TPM_WRITE_1(sc->dev, off, v | val);
sys/dev/tpm/tpm20.h
172
OR4(struct tpm_sc *sc, bus_size_t off, uint32_t val)
sys/dev/tpm/tpm20.h
176
TPM_WRITE_4(sc->dev, off, v | val);
sys/dev/tpm/tpm_bus.c
64
tpm_write_1(device_t dev, bus_size_t off, uint8_t val)
sys/dev/tpm/tpm_bus.c
68
bus_write_1(sc->mem_res, off, val);
sys/dev/tpm/tpm_bus.c
72
tpm_write_4(device_t dev, bus_size_t off, uint32_t val)
sys/dev/tpm/tpm_bus.c
76
bus_write_4(sc->mem_res, off, val);
sys/dev/tpm/tpm_crb.c
139
uint32_t mask, uint32_t val, int32_t timeout);
sys/dev/tpm/tpm_crb.c
349
tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, uint32_t mask, uint32_t val,
sys/dev/tpm/tpm_crb.c
354
if ((TPM_READ_4(sc->dev, off) & mask) == val)
sys/dev/tpm/tpm_crb.c
358
if ((TPM_READ_4(sc->dev, off) & mask) == val)
sys/dev/tpm/tpm_spibus.c
145
spi_write_1(device_t dev, bus_size_t off, uint8_t val)
sys/dev/tpm/tpm_spibus.c
147
tpm_spi_write_n(dev, off, &val, 1);
sys/dev/tpm/tpm_spibus.c
151
spi_write_4(device_t dev, bus_size_t off, uint32_t val)
sys/dev/tpm/tpm_spibus.c
153
uint32_t tmp = htole32(val);
sys/dev/tpm/tpm_tis_core.c
238
tpm_wait_for_u32(struct tpm_sc *sc, bus_size_t off, uint32_t mask, uint32_t val,
sys/dev/tpm/tpm_tis_core.c
243
if ((TPM_READ_4(sc->dev, off) & mask) == val)
sys/dev/tpm/tpm_tis_core.c
251
return ((TPM_READ_4(sc->dev, off) & mask) == val);
sys/dev/tpm/tpm_tis_core.c
256
if ((TPM_READ_4(sc->dev, off) & mask) == val)
sys/dev/tpm/tpm_tis_core.c
91
uint32_t mask, uint32_t val, int32_t timeout);
sys/dev/tsec/if_tsec.c
372
uint32_t val, i;
sys/dev/tsec/if_tsec.c
409
val = (i & 0xffff)
sys/dev/tsec/if_tsec.c
412
TSEC_WRITE(sc, TSEC_REG_ECNTRL, TSEC_ECNTRL_STEN | val);
sys/dev/tsec/if_tsec.c
535
val = TSEC_READ(sc, TSEC_REG_MACCFG1);
sys/dev/tsec/if_tsec.c
536
val |= (TSEC_MACCFG1_RX_EN | TSEC_MACCFG1_TX_EN);
sys/dev/tsec/if_tsec.c
537
TSEC_WRITE(sc, TSEC_REG_MACCFG1, val);
sys/dev/tsec/if_tsec.h
139
#define TSEC_PUT_GENERIC(hand, tab, count, wrap, val) \
sys/dev/tsec/if_tsec.h
140
((hand)->tab[TSEC_INC((hand)->count, wrap)] = val)
sys/dev/tsec/if_tsec.h
177
#define TSEC_WRITE(sc, reg, val) \
sys/dev/tsec/if_tsec.h
178
bus_space_write_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg), (val))
sys/dev/tsec/if_tsec.h
186
#define TSEC_PHY_WRITE(sc, reg, val) \
sys/dev/tsec/if_tsec.h
188
(reg) + (sc)->phy_regoff, (val))
sys/dev/tws/tws_hdm.c
357
u_int64_t out_mfa=0, val=0;
sys/dev/tws/tws_hdm.c
367
val = tws_read_reg(sc, TWS_I2O0_HOBQPL, 4);
sys/dev/tws/tws_hdm.c
368
out_mfa = out_mfa | val;
sys/dev/tws/tws_services.c
141
tws_swap16(u_int16_t val)
sys/dev/tws/tws_services.c
143
return((val << 8) | (val >> 8));
sys/dev/tws/tws_services.c
147
tws_swap32(u_int32_t val)
sys/dev/tws/tws_services.c
149
return(((val << 24) | ((val << 8) & (0xFF0000)) |
sys/dev/tws/tws_services.c
150
((val >> 8) & (0xFF00)) | (val >> 24)));
sys/dev/tws/tws_services.c
154
tws_swap64(u_int64_t val)
sys/dev/tws/tws_services.c
156
return((((u_int64_t)(tws_swap32(((u_int32_t *)(&(val)))[1]))) << 32) |
sys/dev/tws/tws_services.c
157
((u_int32_t)(tws_swap32(((u_int32_t *)(&(val)))[0]))));
sys/dev/tws/tws_services.h
47
u_int16_t tws_swap16(u_int16_t val);
sys/dev/tws/tws_services.h
48
u_int32_t tws_swap32(u_int32_t val);
sys/dev/tws/tws_services.h
49
u_int64_t tws_swap64(u_int64_t val);
sys/dev/uart/uart_dev_ns8250.c
378
u_char val;
sys/dev/uart/uart_dev_ns8250.c
381
val = uart_getreg(bas, REG_IIR);
sys/dev/uart/uart_dev_ns8250.c
382
if (val & 0x30)
sys/dev/uart/uart_dev_ns8250.c
390
val = uart_getreg(bas, REG_MCR);
sys/dev/uart/uart_dev_ns8250.c
391
if (val & 0xa0)
sys/dev/uart/uart_dev_quicc.c
51
#define quicc_write2(bas, reg, val) \
sys/dev/uart/uart_dev_quicc.c
52
bus_space_write_2((bas)->bst, (bas)->bsh, reg, val)
sys/dev/uart/uart_dev_quicc.c
53
#define quicc_write4(bas, reg, val) \
sys/dev/uart/uart_dev_quicc.c
54
bus_space_write_4((bas)->bst, (bas)->bsh, reg, val)
sys/dev/uart/uart_dev_z8530.c
54
uart_setmreg(struct uart_bas *bas, int reg, int val)
sys/dev/uart/uart_dev_z8530.c
59
uart_setreg(bas, REG_CTRL, val);
sys/dev/ufshci/ufshci_private.h
421
#define ufshci_mmio_write_4(sc, reg, val) \
sys/dev/ufshci/ufshci_private.h
423
ufshci_mmio_offsetof(reg), val)
sys/dev/usb/controller/atmegadci.c
1499
#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
sys/dev/usb/controller/avr32dci.c
1448
#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
sys/dev/usb/controller/dwc_otg.c
4280
#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
sys/dev/usb/controller/ehci_pci.c
266
uint32_t val;
sys/dev/usb/controller/ehci_pci.c
273
val = pci_get_revid(smbdev);
sys/dev/usb/controller/ehci_pci.c
274
if (val != 0x3a && val != 0x3b)
sys/dev/usb/controller/ehci_pci.c
282
val = pci_read_config(self, 0x53, 1);
sys/dev/usb/controller/ehci_pci.c
283
if (!(val & 0x8)) {
sys/dev/usb/controller/ehci_pci.c
284
val |= 0x8;
sys/dev/usb/controller/ehci_pci.c
285
pci_write_config(self, 0x53, val, 1);
sys/dev/usb/controller/ehci_pci.c
293
uint32_t val;
sys/dev/usb/controller/ehci_pci.c
298
val = pci_read_config(self, 0x4b, 1);
sys/dev/usb/controller/ehci_pci.c
299
if (val & 0x20)
sys/dev/usb/controller/ehci_pci.c
301
val |= 0x20;
sys/dev/usb/controller/ehci_pci.c
302
pci_write_config(self, 0x4b, val, 1);
sys/dev/usb/controller/musb_otg.c
3525
#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
sys/dev/usb/controller/uss820dci.c
1794
#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
sys/dev/usb/controller/xhci.c
3200
#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
sys/dev/usb/input/wmt.c
551
slot_data->val[usage] = hid_get_udata(
sys/dev/usb/input/wmt.c
562
printf("%04x ", slot_data->val[usage]);
sys/dev/usb/input/wmt.c
574
if (slot_data->val[WMT_TIP_SWITCH] != 0 &&
sys/dev/usb/input/wmt.c
576
slot_data->val[WMT_CONFIDENCE] == 0)) {
sys/dev/usb/input/wmt.c
579
slot_data->dist = !slot_data->val[WMT_IN_RANGE];
sys/dev/usb/input/wmt.c
581
width = slot_data->val[WMT_WIDTH] >> 1;
sys/dev/usb/input/wmt.c
582
height = slot_data->val[WMT_HEIGHT] >> 1;
sys/dev/usb/net/if_aue.c
310
uint8_t val;
sys/dev/usb/net/if_aue.c
318
err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
sys/dev/usb/net/if_aue.c
321
return (val);
sys/dev/usb/net/if_aue.c
329
uint16_t val;
sys/dev/usb/net/if_aue.c
337
err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
sys/dev/usb/net/if_aue.c
340
return (le16toh(val));
sys/dev/usb/net/if_aue.c
344
aue_csr_write_1(struct aue_softc *sc, uint16_t reg, uint8_t val)
sys/dev/usb/net/if_aue.c
350
req.wValue[0] = val;
sys/dev/usb/net/if_aue.c
355
if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
sys/dev/usb/net/if_aue.c
361
aue_csr_write_2(struct aue_softc *sc, uint16_t reg, uint16_t val)
sys/dev/usb/net/if_aue.c
367
USETW(req.wValue, val);
sys/dev/usb/net/if_aue.c
371
val = htole16(val);
sys/dev/usb/net/if_aue.c
373
if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
sys/dev/usb/net/if_aue.c
423
uint16_t val = 0;
sys/dev/usb/net/if_aue.c
457
val = aue_csr_read_2(sc, AUE_PHY_DATA);
sys/dev/usb/net/if_aue.c
462
return (val);
sys/dev/usb/net/if_axe.c
297
axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
sys/dev/usb/net/if_axe.c
308
USETW(req.wValue, val);
sys/dev/usb/net/if_axe.c
321
uint16_t val;
sys/dev/usb/net/if_axe.c
329
axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val);
sys/dev/usb/net/if_axe.c
332
val = le16toh(val);
sys/dev/usb/net/if_axe.c
340
val &= ~BMSR_EXTCAP;
sys/dev/usb/net/if_axe.c
345
return (val);
sys/dev/usb/net/if_axe.c
349
axe_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/usb/net/if_axe.c
354
val = htole32(val);
sys/dev/usb/net/if_axe.c
360
axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val);
sys/dev/usb/net/if_axe.c
374
uint16_t val;
sys/dev/usb/net/if_axe.c
408
val = 0;
sys/dev/usb/net/if_axe.c
410
val |= AXE_MEDIA_FULL_DUPLEX;
sys/dev/usb/net/if_axe.c
414
val |= AXE_178_MEDIA_TXFLOW_CONTROL_EN;
sys/dev/usb/net/if_axe.c
417
val |= AXE_178_MEDIA_RXFLOW_CONTROL_EN;
sys/dev/usb/net/if_axe.c
421
val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC;
sys/dev/usb/net/if_axe.c
423
val |= AXE_178_MEDIA_ENCK;
sys/dev/usb/net/if_axe.c
426
val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
sys/dev/usb/net/if_axe.c
429
val |= AXE_178_MEDIA_100TX;
sys/dev/usb/net/if_axe.c
436
err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
sys/dev/usb/net/if_axe.c
551
uint16_t eeprom, val;
sys/dev/usb/net/if_axe.c
625
val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN :
sys/dev/usb/net/if_axe.c
627
AXE_GPIO_WRITE(val, hz / 32);
sys/dev/usb/net/if_axe.c
628
AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
sys/dev/usb/net/if_axe.c
629
AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4);
sys/dev/usb/net/if_axe.c
630
AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
sys/dev/usb/net/if_axe.c
636
val = axe_miibus_readreg(ue->ue_dev, sc->sc_phyno,
sys/dev/usb/net/if_axe.c
639
0x01, val | 0x0080);
sys/dev/usb/net/if_axge.c
218
uint16_t val, void *buf, int len)
sys/dev/usb/net/if_axge.c
226
USETW(req.wValue, val);
sys/dev/usb/net/if_axge.c
235
uint16_t val, void *buf, int len)
sys/dev/usb/net/if_axge.c
243
USETW(req.wValue, val);
sys/dev/usb/net/if_axge.c
255
uint8_t val;
sys/dev/usb/net/if_axge.c
257
axge_read_mem(sc, cmd, 1, reg, &val, 1);
sys/dev/usb/net/if_axge.c
258
return (val);
sys/dev/usb/net/if_axge.c
265
uint8_t val[2];
sys/dev/usb/net/if_axge.c
267
axge_read_mem(sc, cmd, index, reg, &val, 2);
sys/dev/usb/net/if_axge.c
268
return (UGETW(val));
sys/dev/usb/net/if_axge.c
272
axge_write_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg, uint8_t val)
sys/dev/usb/net/if_axge.c
274
axge_write_mem(sc, cmd, 1, reg, &val, 1);
sys/dev/usb/net/if_axge.c
279
uint16_t reg, uint16_t val)
sys/dev/usb/net/if_axge.c
283
USETW(temp, val);
sys/dev/usb/net/if_axge.c
291
uint16_t val;
sys/dev/usb/net/if_axge.c
299
val = axge_read_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy);
sys/dev/usb/net/if_axge.c
304
return (val);
sys/dev/usb/net/if_axge.c
308
axge_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/usb/net/if_axge.c
318
axge_write_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy, val);
sys/dev/usb/net/if_axge.c
333
uint16_t val;
sys/dev/usb/net/if_axge.c
367
val = 0;
sys/dev/usb/net/if_axge.c
369
val |= MSR_FD;
sys/dev/usb/net/if_axge.c
371
val |= MSR_TFC;
sys/dev/usb/net/if_axge.c
373
val |= MSR_RFC;
sys/dev/usb/net/if_axge.c
375
val |= MSR_RE;
sys/dev/usb/net/if_axge.c
378
val |= MSR_GM | MSR_EN_125MHZ;
sys/dev/usb/net/if_axge.c
387
val |= MSR_PS;
sys/dev/usb/net/if_axge.c
399
axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MSR, val);
sys/dev/usb/net/if_axge.c
608
uint16_t val;
sys/dev/usb/net/if_axge.c
623
val = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR);
sys/dev/usb/net/if_axge.c
624
val |= EPPRCR_BZ | EPPRCR_IPRL;
sys/dev/usb/net/if_axge.c
625
axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, val);
sys/dev/usb/net/if_axge.c
896
uint16_t val;
sys/dev/usb/net/if_axge.c
903
val = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MSR);
sys/dev/usb/net/if_axge.c
904
val &= ~MSR_RE;
sys/dev/usb/net/if_axge.c
905
axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MSR, val);
sys/dev/usb/net/if_cue.c
199
uint8_t val;
sys/dev/usb/net/if_cue.c
207
if (uether_do_request(&sc->sc_ue, &req, &val, 1000)) {
sys/dev/usb/net/if_cue.c
210
return (val);
sys/dev/usb/net/if_cue.c
217
uint16_t val;
sys/dev/usb/net/if_cue.c
225
(void)uether_do_request(&sc->sc_ue, &req, &val, 1000);
sys/dev/usb/net/if_cue.c
226
return (le16toh(val));
sys/dev/usb/net/if_cue.c
230
cue_csr_write_1(struct cue_softc *sc, uint16_t reg, uint16_t val)
sys/dev/usb/net/if_cue.c
236
USETW(req.wValue, val);
sys/dev/usb/net/if_kue.c
264
uint16_t val, void *data, int len)
sys/dev/usb/net/if_kue.c
274
USETW(req.wValue, val);
sys/dev/usb/net/if_mos.c
270
uByte val = 0;
sys/dev/usb/net/if_mos.c
278
err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
sys/dev/usb/net/if_mos.c
284
return (val);
sys/dev/usb/net/if_mos.c
292
uWord val;
sys/dev/usb/net/if_mos.c
294
USETW(val, 0);
sys/dev/usb/net/if_mos.c
302
err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
sys/dev/usb/net/if_mos.c
308
return (UGETW(val));
sys/dev/usb/net/if_mos.c
316
uByte val;
sys/dev/usb/net/if_mos.c
317
val = aval;
sys/dev/usb/net/if_mos.c
325
err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
sys/dev/usb/net/if_mos.c
339
uWord val;
sys/dev/usb/net/if_mos.c
341
USETW(val, aval);
sys/dev/usb/net/if_mos.c
349
err = uether_do_request(&sc->sc_ue, &req, &val, 1000);
sys/dev/usb/net/if_mos.c
451
mos_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/usb/net/if_mos.c
460
mos_reg_write_2(sc, MOS_PHY_DATA, val);
sys/dev/usb/net/if_mos.c
483
int val, err, locked;
sys/dev/usb/net/if_mos.c
490
val = mos_reg_read_1(sc, MOS_CTL);
sys/dev/usb/net/if_mos.c
491
val &= ~(MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);
sys/dev/usb/net/if_mos.c
492
mos_reg_write_1(sc, MOS_CTL, val);
sys/dev/usb/net/if_mos.c
498
val |= MOS_CTL_FDX_ENB;
sys/dev/usb/net/if_mos.c
500
val &= ~(MOS_CTL_FDX_ENB);
sys/dev/usb/net/if_mos.c
504
val |= MOS_CTL_SPEEDSEL;
sys/dev/usb/net/if_mos.c
507
val &= ~(MOS_CTL_SPEEDSEL);
sys/dev/usb/net/if_mos.c
512
val |= (MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);
sys/dev/usb/net/if_mos.c
513
err = mos_reg_write_1(sc, MOS_CTL, val);
sys/dev/usb/net/if_muge.c
1469
uint32_t val;
sys/dev/usb/net/if_muge.c
1470
lan78xx_read_reg(sc, 0, &val);
sys/dev/usb/net/if_muge.c
348
uint32_t val;
sys/dev/usb/net/if_muge.c
355
if ((err = lan78xx_read_reg(sc, reg, &val)) != 0)
sys/dev/usb/net/if_muge.c
357
if (!(val & bits))
sys/dev/usb/net/if_muge.c
387
uint32_t val, saved;
sys/dev/usb/net/if_muge.c
397
err = lan78xx_read_reg(sc, ETH_HW_CFG, &val);
sys/dev/usb/net/if_muge.c
398
saved = val;
sys/dev/usb/net/if_muge.c
400
val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_);
sys/dev/usb/net/if_muge.c
401
err = lan78xx_write_reg(sc, ETH_HW_CFG, val);
sys/dev/usb/net/if_muge.c
412
val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_;
sys/dev/usb/net/if_muge.c
413
val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i));
sys/dev/usb/net/if_muge.c
414
if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0)
sys/dev/usb/net/if_muge.c
419
if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) !=
sys/dev/usb/net/if_muge.c
422
if (!(val & ETH_E2P_CMD_BUSY_) ||
sys/dev/usb/net/if_muge.c
423
(val & ETH_E2P_CMD_TIMEOUT_))
sys/dev/usb/net/if_muge.c
429
if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) {
sys/dev/usb/net/if_muge.c
435
if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0)
sys/dev/usb/net/if_muge.c
438
buf[i] = (val & 0xff);
sys/dev/usb/net/if_muge.c
482
uint32_t val;
sys/dev/usb/net/if_muge.c
489
err = lan78xx_read_reg(sc, OTP_PWR_DN, &val);
sys/dev/usb/net/if_muge.c
492
if (val & OTP_PWR_DN_PWRDN_N) {
sys/dev/usb/net/if_muge.c
516
if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0)
sys/dev/usb/net/if_muge.c
519
buf[i] = (uint8_t)(val & 0xff);
sys/dev/usb/net/if_muge.c
579
uint32_t val;
sys/dev/usb/net/if_muge.c
587
val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
sys/dev/usb/net/if_muge.c
588
if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0)
sys/dev/usb/net/if_muge.c
591
val = (addr[5] << 8) | addr[4];
sys/dev/usb/net/if_muge.c
592
err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val);
sys/dev/usb/net/if_muge.c
657
uint32_t addr, val;
sys/dev/usb/net/if_muge.c
660
val = 0;
sys/dev/usb/net/if_muge.c
681
lan78xx_read_reg(sc, ETH_MII_DATA, &val);
sys/dev/usb/net/if_muge.c
682
val = le32toh(val);
sys/dev/usb/net/if_muge.c
688
return (val & 0xFFFF);
sys/dev/usb/net/if_muge.c
707
lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/usb/net/if_muge.c
726
val = htole32(val);
sys/dev/usb/net/if_muge.c
727
lan78xx_write_reg(sc, ETH_MII_DATA, val);
sys/dev/usb/net/if_rue.c
270
uint8_t val;
sys/dev/usb/net/if_rue.c
272
rue_read_mem(sc, reg, &val, 1);
sys/dev/usb/net/if_rue.c
273
return (val);
sys/dev/usb/net/if_rue.c
279
uint8_t val[2];
sys/dev/usb/net/if_rue.c
281
rue_read_mem(sc, reg, &val, 2);
sys/dev/usb/net/if_rue.c
282
return (UGETW(val));
sys/dev/usb/net/if_rue.c
286
rue_csr_write_1(struct rue_softc *sc, uint16_t reg, uint8_t val)
sys/dev/usb/net/if_rue.c
288
return (rue_write_mem(sc, reg, &val, 1));
sys/dev/usb/net/if_rue.c
292
rue_csr_write_2(struct rue_softc *sc, uint16_t reg, uint16_t val)
sys/dev/usb/net/if_rue.c
296
USETW(temp, val);
sys/dev/usb/net/if_rue.c
301
rue_csr_write_4(struct rue_softc *sc, int reg, uint32_t val)
sys/dev/usb/net/if_rue.c
305
USETDW(temp, val);
sys/dev/usb/net/if_smsc.c
339
uint32_t val;
sys/dev/usb/net/if_smsc.c
346
if ((err = smsc_read_reg(sc, reg, &val)) != 0)
sys/dev/usb/net/if_smsc.c
348
if (!(val & bits))
sys/dev/usb/net/if_smsc.c
379
uint32_t val;
sys/dev/usb/net/if_smsc.c
394
val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i));
sys/dev/usb/net/if_smsc.c
395
if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0)
sys/dev/usb/net/if_smsc.c
400
if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0)
sys/dev/usb/net/if_smsc.c
402
if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT))
sys/dev/usb/net/if_smsc.c
408
if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) {
sys/dev/usb/net/if_smsc.c
414
if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0)
sys/dev/usb/net/if_smsc.c
417
buf[i] = (val & 0xff);
sys/dev/usb/net/if_smsc.c
448
uint32_t val = 0;
sys/dev/usb/net/if_smsc.c
465
smsc_read_reg(sc, SMSC_MII_DATA, &val);
sys/dev/usb/net/if_smsc.c
466
val = le32toh(val);
sys/dev/usb/net/if_smsc.c
472
return (val & 0xFFFF);
sys/dev/usb/net/if_smsc.c
491
smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/usb/net/if_smsc.c
509
val = htole32(val);
sys/dev/usb/net/if_smsc.c
510
smsc_write_reg(sc, SMSC_MII_DATA, val);
sys/dev/usb/net/if_smsc.c
791
uint32_t val;
sys/dev/usb/net/if_smsc.c
799
err = smsc_read_reg(sc, SMSC_COE_CTRL, &val);
sys/dev/usb/net/if_smsc.c
807
val |= SMSC_COE_CTRL_RX_EN;
sys/dev/usb/net/if_smsc.c
809
val &= ~SMSC_COE_CTRL_RX_EN;
sys/dev/usb/net/if_smsc.c
813
val |= SMSC_COE_CTRL_TX_EN;
sys/dev/usb/net/if_smsc.c
815
val &= ~SMSC_COE_CTRL_TX_EN;
sys/dev/usb/net/if_smsc.c
817
err = smsc_write_reg(sc, SMSC_COE_CTRL, val);
sys/dev/usb/net/if_smsc.c
844
uint32_t val;
sys/dev/usb/net/if_smsc.c
851
val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
sys/dev/usb/net/if_smsc.c
852
if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0)
sys/dev/usb/net/if_smsc.c
855
val = (addr[5] << 8) | addr[4];
sys/dev/usb/net/if_smsc.c
856
err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val);
sys/dev/usb/net/if_udav.c
407
uint8_t val;
sys/dev/usb/net/if_udav.c
409
udav_csr_read(sc, offset, &val, 1);
sys/dev/usb/net/if_udav.c
410
return (val);
sys/dev/usb/net/if_udav.c
806
uint8_t val[2];
sys/dev/usb/net/if_udav.c
830
udav_csr_read(sc, UDAV_EPDRL, val, 2);
sys/dev/usb/net/if_udav.c
832
data16 = (val[0] | (val[1] << 8));
sys/dev/usb/net/if_udav.c
846
uint8_t val[2];
sys/dev/usb/net/if_udav.c
862
val[0] = (data & 0xff);
sys/dev/usb/net/if_udav.c
863
val[1] = (data >> 8) & 0xff;
sys/dev/usb/net/if_udav.c
864
udav_csr_write(sc, UDAV_EPDRL, val, 2);
sys/dev/usb/net/if_umb.c
1781
uint32_t val;
sys/dev/usb/net/if_umb.c
1843
val = le32toh(ic->ipv4_mtu);
sys/dev/usb/net/if_umb.c
1844
if (if_getmtu(ifp) != val && val <= sc->sc_maxpktlen) {
sys/dev/usb/net/if_umb.c
1845
if_setmtu(ifp, val);
sys/dev/usb/net/if_umb.c
1846
if (if_getmtu(ifp) > val)
sys/dev/usb/net/if_umb.c
1847
if_setmtu(ifp, val);
sys/dev/usb/net/if_umb.c
1849
log(LOG_INFO, "%s: MTU %d\n", DEVNAM(sc), val);
sys/dev/usb/net/if_umb.c
2674
uint32_t val;
sys/dev/usb/net/if_umb.c
2734
if (tlvlen != sizeof (val))
sys/dev/usb/net/if_umb.c
2736
val = UMB_GET32(&data[3]);
sys/dev/usb/net/if_umb.c
2739
if (val != 0) {
sys/dev/usb/net/if_umb.c
2742
val);
sys/dev/usb/net/if_umb.c
2748
if (val == 0)
sys/dev/usb/net/if_umb.c
2752
else if (val == 0x001a0001)
sys/dev/usb/net/if_umb.c
2758
"error 0x%x\n", DEVNAM(sc), val);
sys/dev/usb/net/if_umbreg.h
55
int val;
sys/dev/usb/net/if_umbreg.h
60
umb_val2descr(const struct umb_valdescr *vdp, int val)
sys/dev/usb/net/if_umbreg.h
65
if (vdp->val == val)
sys/dev/usb/net/if_umbreg.h
69
snprintf(sval, sizeof (sval), "#%d", val);
sys/dev/usb/net/if_ure.c
1634
uint16_t val;
sys/dev/usb/net/if_ure.c
1655
val = ure_ocp_reg_read(sc, URE_OCP_PHY_STATUS) &
sys/dev/usb/net/if_ure.c
1657
if (val == URE_PHY_STAT_LAN_ON || val == URE_PHY_STAT_PWRDN)
sys/dev/usb/net/if_ure.c
1668
val = ure_read_2(sc, URE_USB_SSPHYLINK2, URE_MCU_TYPE_USB);
sys/dev/usb/net/if_ure.c
1669
val &= ~URE_PWD_DN_SCALE_MASK;
sys/dev/usb/net/if_ure.c
1670
val |= URE_PWD_DN_SCALE(96);
sys/dev/usb/net/if_ure.c
1671
ure_write_2(sc, URE_USB_SSPHYLINK2, URE_MCU_TYPE_USB, val);
sys/dev/usb/net/if_ure.c
1678
val = ure_read_1(sc, URE_USB_CSR_DUMMY1, URE_MCU_TYPE_USB);
sys/dev/usb/net/if_ure.c
1681
val &= ~URE_DYNAMIC_BURST;
sys/dev/usb/net/if_ure.c
1683
val |= URE_DYNAMIC_BURST;
sys/dev/usb/net/if_ure.c
1684
ure_write_1(sc, URE_USB_CSR_DUMMY1, URE_MCU_TYPE_USB, val);
sys/dev/usb/net/if_ure.c
1695
val = URE_LPM_TIMER_500MS;
sys/dev/usb/net/if_ure.c
1697
val = URE_LPM_TIMER_500US;
sys/dev/usb/net/if_ure.c
1699
val | URE_FIFO_EMPTY_1FB | URE_ROK_EXIT_LPM);
sys/dev/usb/net/if_ure.c
1701
val = ure_read_2(sc, URE_USB_AFE_CTRL2, URE_MCU_TYPE_USB);
sys/dev/usb/net/if_ure.c
1702
val &= ~URE_SEN_VAL_MASK;
sys/dev/usb/net/if_ure.c
1703
val |= URE_SEN_VAL_NORMAL | URE_SEL_RXIDLE;
sys/dev/usb/net/if_ure.c
1704
ure_write_2(sc, URE_USB_AFE_CTRL2, URE_MCU_TYPE_USB, val);
sys/dev/usb/net/if_ure.c
1728
val = ure_read_2(sc, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB);
sys/dev/usb/net/if_ure.c
1730
val |= URE_U2P3_ENABLE;
sys/dev/usb/net/if_ure.c
1732
val &= ~URE_U2P3_ENABLE;
sys/dev/usb/net/if_ure.c
1733
ure_write_2(sc, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB, val);
sys/dev/usb/net/if_ure.c
1775
val = ure_read_2(sc, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB);
sys/dev/usb/net/if_ure.c
1777
val |= URE_U2P3_ENABLE;
sys/dev/usb/net/if_ure.c
1779
val &= ~URE_U2P3_ENABLE;
sys/dev/usb/net/if_ure.c
1780
ure_write_2(sc, URE_USB_U2P3_CTRL, URE_MCU_TYPE_USB, val);
sys/dev/usb/net/if_ure.c
1790
uint16_t val;
sys/dev/usb/net/if_ure.c
1830
val = ure_phy_status(sc, 0);
sys/dev/usb/net/if_ure.c
1831
if ((val == URE_PHY_STAT_EXT_INIT) &
sys/dev/usb/net/if_ure.c
1840
val = ure_ocp_reg_read(sc, URE_OCP_BASE_MII + MII_BMCR);
sys/dev/usb/net/if_ure.c
1841
if (val & BMCR_PDOWN) {
sys/dev/usb/net/if_ure.c
1842
val &= ~BMCR_PDOWN;
sys/dev/usb/net/if_ure.c
1843
ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_BMCR, val);
sys/dev/usb/net/if_ure.c
1887
val = ure_read_2(sc, URE_USB_FW_CTRL, URE_MCU_TYPE_USB);
sys/dev/usb/net/if_ure.c
1888
val |= URE_FLOW_CTRL_PATCH_OPT | 0x0100;
sys/dev/usb/net/if_ure.c
1889
val &= ~0x08;
sys/dev/usb/net/if_ure.c
1890
ure_write_2(sc, URE_USB_FW_CTRL, URE_MCU_TYPE_USB, val);
sys/dev/usb/net/if_ure.c
1896
val = ure_read_2(sc, URE_PLA_EXTRA_STATUS, URE_MCU_TYPE_PLA);
sys/dev/usb/net/if_ure.c
1898
val |= URE_CUR_LINK_OK;
sys/dev/usb/net/if_ure.c
1900
val &= ~URE_CUR_LINK_OK;
sys/dev/usb/net/if_ure.c
1901
val |= URE_POLL_LINK_CHG;
sys/dev/usb/net/if_ure.c
1902
ure_write_2(sc, URE_PLA_EXTRA_STATUS, URE_MCU_TYPE_PLA, val);
sys/dev/usb/net/if_ure.c
1907
val = ure_read_2(sc, URE_PLA_MAC_PWR_CTRL2, URE_MCU_TYPE_PLA);
sys/dev/usb/net/if_ure.c
1908
val &= ~0xff;
sys/dev/usb/net/if_ure.c
1909
val |= URE_MAC_CLK_SPDWN_EN | 0x03;
sys/dev/usb/net/if_ure.c
1910
ure_write_2(sc, URE_PLA_MAC_PWR_CTRL2, URE_MCU_TYPE_PLA, val);
sys/dev/usb/net/if_ure.c
1930
uint16_t val;
sys/dev/usb/net/if_ure.c
1982
val = ure_read_2(sc, 0xc012, URE_MCU_TYPE_PLA);
sys/dev/usb/net/if_ure.c
1983
val &= ~0x00c0;
sys/dev/usb/net/if_ure.c
1985
val |= 0x00c0;
sys/dev/usb/net/if_ure.c
1986
ure_write_2(sc, 0xc012, URE_MCU_TYPE_PLA, val);
sys/dev/usb/net/if_ure.c
1988
val = if_getmtu(ifp);
sys/dev/usb/net/if_ure.c
1989
ure_write_2(sc, URE_PLA_RMS, URE_MCU_TYPE_PLA, URE_FRAMELEN(val));
sys/dev/usb/net/if_ure.c
2027
(URE_FRAMELEN(val) + 0x100) / 16 );
sys/dev/usb/net/if_ure.c
2105
uint16_t val;
sys/dev/usb/net/if_ure.c
2109
val = ure_ocp_reg_read(sc, URE_OCP_PHY_STATUS) &
sys/dev/usb/net/if_ure.c
2112
if (val == desired)
sys/dev/usb/net/if_ure.c
2115
if (val == URE_PHY_STAT_LAN_ON ||
sys/dev/usb/net/if_ure.c
2116
val == URE_PHY_STAT_PWRDN ||
sys/dev/usb/net/if_ure.c
2117
val == URE_PHY_STAT_EXT_INIT)
sys/dev/usb/net/if_ure.c
2126
return (val);
sys/dev/usb/net/if_ure.c
236
ure_ctl(struct ure_softc *sc, uint8_t rw, uint16_t val, uint16_t index,
sys/dev/usb/net/if_ure.c
248
USETW(req.wValue, val);
sys/dev/usb/net/if_ure.c
274
uint32_t val;
sys/dev/usb/net/if_ure.c
282
val = UGETDW(temp);
sys/dev/usb/net/if_ure.c
283
val >>= shift;
sys/dev/usb/net/if_ure.c
285
return (val & 0xff);
sys/dev/usb/net/if_ure.c
291
uint32_t val;
sys/dev/usb/net/if_ure.c
299
val = UGETDW(temp);
sys/dev/usb/net/if_ure.c
300
val >>= shift;
sys/dev/usb/net/if_ure.c
302
return (val & 0xffff);
sys/dev/usb/net/if_ure.c
315
ure_write_1(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val)
sys/dev/usb/net/if_ure.c
323
val &= 0xff;
sys/dev/usb/net/if_ure.c
327
val <<= (shift << 3);
sys/dev/usb/net/if_ure.c
331
USETDW(temp, val);
sys/dev/usb/net/if_ure.c
336
ure_write_2(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val)
sys/dev/usb/net/if_ure.c
344
val &= 0xffff;
sys/dev/usb/net/if_ure.c
348
val <<= (shift << 3);
sys/dev/usb/net/if_ure.c
352
USETDW(temp, val);
sys/dev/usb/net/if_ure.c
357
ure_write_4(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val)
sys/dev/usb/net/if_ure.c
361
USETDW(temp, val);
sys/dev/usb/net/if_ure.c
398
uint16_t val;
sys/dev/usb/net/if_ure.c
413
val = ure_ocp_reg_read(sc, URE_OCP_BASE_MII + reg * 2);
sys/dev/usb/net/if_ure.c
417
return (val);
sys/dev/usb/net/if_ure.c
421
ure_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/usb/net/if_ure.c
434
ure_ocp_reg_write(sc, URE_OCP_BASE_MII + reg * 2, val);
sys/dev/usb/serial/uchcom.c
525
uchcom_set_dtr_rts_10(struct uchcom_softc *sc, uint8_t val)
sys/dev/usb/serial/uchcom.c
527
uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val);
sys/dev/usb/serial/uchcom.c
531
uchcom_set_dtr_rts_20(struct uchcom_softc *sc, uint8_t val)
sys/dev/usb/serial/uchcom.c
533
uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0);
sys/dev/usb/serial/uchcom.c
566
uint8_t val = 0;
sys/dev/usb/serial/uchcom.c
569
val |= UCHCOM_DTR_MASK;
sys/dev/usb/serial/uchcom.c
571
val |= UCHCOM_RTS_MASK;
sys/dev/usb/serial/uchcom.c
574
uchcom_set_dtr_rts_10(sc, ~val);
sys/dev/usb/serial/uchcom.c
576
uchcom_set_dtr_rts_20(sc, ~val);
sys/dev/usb/serial/ufintek.c
632
ufintek_cfg_write(struct ufintek_softc *sc, uint16_t reg, uint8_t val)
sys/dev/usb/serial/ufintek.c
644
data = val;
sys/dev/usb/serial/ufintek.c
656
uint8_t val;
sys/dev/usb/serial/ufintek.c
665
&req, &val, 0, 1000);
sys/dev/usb/serial/ufintek.c
667
DPRINTF("reg=0x%04x, val=0x%02x\n", reg, val);
sys/dev/usb/serial/ufintek.c
668
return (val);
sys/dev/usb/serial/umoscom.c
420
uint16_t val;
sys/dev/usb/serial/umoscom.c
422
val = sc->sc_lcr;
sys/dev/usb/serial/umoscom.c
424
val |= UMOSCOM_LCR_BREAK;
sys/dev/usb/serial/umoscom.c
426
umoscom_cfg_write(sc, UMOSCOM_LCR, val | UMOSCOM_UART_REG);
sys/dev/usb/serial/umoscom.c
551
umoscom_cfg_write(struct umoscom_softc *sc, uint16_t reg, uint16_t val)
sys/dev/usb/serial/umoscom.c
557
USETW(req.wValue, val);
sys/dev/usb/serial/umoscom.c
569
uint8_t val;
sys/dev/usb/serial/umoscom.c
578
&req, &val, 0, 1000);
sys/dev/usb/serial/umoscom.c
580
DPRINTF("reg=0x%04x, val=0x%02x\n", reg, val);
sys/dev/usb/serial/umoscom.c
582
return (val);
sys/dev/usb/storage/ustorage_fs.c
908
put_be16(uint8_t *buf, uint16_t val)
sys/dev/usb/storage/ustorage_fs.c
910
buf[0] = val >> 8;
sys/dev/usb/storage/ustorage_fs.c
911
buf[1] = val;
sys/dev/usb/storage/ustorage_fs.c
915
put_be32(uint8_t *buf, uint32_t val)
sys/dev/usb/storage/ustorage_fs.c
917
buf[0] = val >> 24;
sys/dev/usb/storage/ustorage_fs.c
918
buf[1] = val >> 16;
sys/dev/usb/storage/ustorage_fs.c
919
buf[2] = val >> 8;
sys/dev/usb/storage/ustorage_fs.c
920
buf[3] = val & 0xff;
sys/dev/usb/template/usb_template.c
129
int error, val;
sys/dev/usb/template/usb_template.c
131
val = usb_template_power;
sys/dev/usb/template/usb_template.c
132
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/usb/template/usb_template.c
136
if (val < 0 || val > 500)
sys/dev/usb/template/usb_template.c
139
usb_template_power = val;
sys/dev/usb/usb_debug.c
261
unsigned val;
sys/dev/usb/usb_debug.c
267
val = *(unsigned *)arg1;
sys/dev/usb/usb_debug.c
269
val = arg2;
sys/dev/usb/usb_debug.c
270
error = SYSCTL_OUT(req, &val, sizeof(unsigned));
sys/dev/usb/usb_debug.c
277
error = SYSCTL_IN(req, &val, sizeof(unsigned));
sys/dev/usb/usb_debug.c
286
if (val > 2000)
sys/dev/usb/usb_debug.c
289
*(unsigned *)arg1 = val;
sys/dev/usb/usb_device.c
236
int error, val;
sys/dev/usb/usb_device.c
238
val = usb_template;
sys/dev/usb/usb_device.c
239
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/usb/usb_device.c
240
if (error != 0 || req->newptr == NULL || usb_template == val)
sys/dev/usb/usb_device.c
243
usb_template = val;
sys/dev/usb/usb_hub.c
2387
usbd_transfer_power_ref(struct usb_xfer *xfer, int val)
sys/dev/usb/usb_hub.c
2411
udev->pwr_save.type_refs[xfer_type] += val;
sys/dev/usb/usb_hub.c
2414
udev->pwr_save.read_refs += val;
sys/dev/usb/usb_hub.c
2420
udev->pwr_save.write_refs += val;
sys/dev/usb/usb_hub.c
2423
udev->pwr_save.read_refs += val;
sys/dev/usb/usb_hub.c
2425
udev->pwr_save.write_refs += val;
sys/dev/usb/usb_hub.c
2428
if (val > 0) {
sys/dev/usb/usb_pf.c
102
val |= USBPF_FLAG_FORCE_SHORT_XFER;
sys/dev/usb/usb_pf.c
104
val |= USBPF_FLAG_SHORT_XFER_OK;
sys/dev/usb/usb_pf.c
106
val |= USBPF_FLAG_SHORT_FRAMES_OK;
sys/dev/usb/usb_pf.c
108
val |= USBPF_FLAG_PIPE_BOF;
sys/dev/usb/usb_pf.c
110
val |= USBPF_FLAG_PROXY_BUFFER;
sys/dev/usb/usb_pf.c
112
val |= USBPF_FLAG_EXT_BUFFER;
sys/dev/usb/usb_pf.c
114
val |= USBPF_FLAG_MANUAL_STATUS;
sys/dev/usb/usb_pf.c
116
val |= USBPF_FLAG_NO_PIPE_OK;
sys/dev/usb/usb_pf.c
118
val |= USBPF_FLAG_STALL_PIPE;
sys/dev/usb/usb_pf.c
119
return (val);
sys/dev/usb/usb_pf.c
125
uint32_t val = 0;
sys/dev/usb/usb_pf.c
128
val |= USBPF_STATUS_OPEN;
sys/dev/usb/usb_pf.c
130
val |= USBPF_STATUS_TRANSFERRING;
sys/dev/usb/usb_pf.c
132
val |= USBPF_STATUS_DID_DMA_DELAY;
sys/dev/usb/usb_pf.c
134
val |= USBPF_STATUS_DID_CLOSE;
sys/dev/usb/usb_pf.c
136
val |= USBPF_STATUS_DRAINING;
sys/dev/usb/usb_pf.c
138
val |= USBPF_STATUS_STARTED;
sys/dev/usb/usb_pf.c
140
val |= USBPF_STATUS_BW_RECLAIMED;
sys/dev/usb/usb_pf.c
142
val |= USBPF_STATUS_CONTROL_XFR;
sys/dev/usb/usb_pf.c
144
val |= USBPF_STATUS_CONTROL_HDR;
sys/dev/usb/usb_pf.c
146
val |= USBPF_STATUS_CONTROL_ACT;
sys/dev/usb/usb_pf.c
148
val |= USBPF_STATUS_CONTROL_STALL;
sys/dev/usb/usb_pf.c
150
val |= USBPF_STATUS_SHORT_FRAMES_OK;
sys/dev/usb/usb_pf.c
152
val |= USBPF_STATUS_SHORT_XFER_OK;
sys/dev/usb/usb_pf.c
155
val |= USBPF_STATUS_BDMA_ENABLE;
sys/dev/usb/usb_pf.c
157
val |= USBPF_STATUS_BDMA_NO_POST_SYNC;
sys/dev/usb/usb_pf.c
159
val |= USBPF_STATUS_BDMA_SETUP;
sys/dev/usb/usb_pf.c
162
val |= USBPF_STATUS_ISOCHRONOUS_XFR;
sys/dev/usb/usb_pf.c
164
val |= USBPF_STATUS_CURR_DMA_SET;
sys/dev/usb/usb_pf.c
166
val |= USBPF_STATUS_CAN_CANCEL_IMMED;
sys/dev/usb/usb_pf.c
168
val |= USBPF_STATUS_DOING_CALLBACK;
sys/dev/usb/usb_pf.c
170
return (val);
sys/dev/usb/usb_pf.c
99
uint32_t val = 0;
sys/dev/usb/usb_transfer.h
148
void usbd_transfer_power_ref(struct usb_xfer *xfer, int val);
sys/dev/usb/video/udl.c
917
udl_cmd_write_reg_1(struct udl_cmd_buf *cb, uint8_t reg, uint8_t val)
sys/dev/usb/video/udl.c
923
udl_cmd_insert_int_1(cb, val);
sys/dev/usb/video/udl.c
927
udl_cmd_write_reg_3(struct udl_cmd_buf *cb, uint8_t reg, uint32_t val)
sys/dev/usb/video/udl.c
930
udl_cmd_write_reg_1(cb, reg + 0, (val >> 16) & 0xff);
sys/dev/usb/video/udl.c
931
udl_cmd_write_reg_1(cb, reg + 1, (val >> 8) & 0xff);
sys/dev/usb/video/udl.c
932
udl_cmd_write_reg_1(cb, reg + 2, (val >> 0) & 0xff);
sys/dev/usb/wlan/if_mtw.c
1004
mtw_write_cfg(struct mtw_softc *sc, uint16_t reg, uint32_t val)
sys/dev/usb/wlan/if_mtw.c
1014
val = htole32(val);
sys/dev/usb/wlan/if_mtw.c
1015
error = usbd_do_request(sc->sc_udev, &sc->sc_mtx, &req, &val);
sys/dev/usb/wlan/if_mtw.c
1020
mtw_usb_dma_write(struct mtw_softc *sc, uint32_t val)
sys/dev/usb/wlan/if_mtw.c
1025
return (mtw_write(sc, MTW_USB_DMA_CFG, val));
sys/dev/usb/wlan/if_mtw.c
1246
mtw_read(struct mtw_softc *sc, uint16_t reg, uint32_t *val)
sys/dev/usb/wlan/if_mtw.c
1253
*val = le32toh(tmp);
sys/dev/usb/wlan/if_mtw.c
1255
*val = 0xffffffff;
sys/dev/usb/wlan/if_mtw.c
1274
mtw_write_2(struct mtw_softc *sc, uint16_t reg, uint16_t val)
sys/dev/usb/wlan/if_mtw.c
1280
USETW(req.wValue, val);
sys/dev/usb/wlan/if_mtw.c
1287
mtw_write(struct mtw_softc *sc, uint16_t reg, uint32_t val)
sys/dev/usb/wlan/if_mtw.c
1292
if ((error = mtw_write_2(sc, reg, val & 0xffff)) == 0) {
sys/dev/usb/wlan/if_mtw.c
1294
error = mtw_write_2(sc, reg + 2, val >> 16);
sys/dev/usb/wlan/if_mtw.c
1316
mtw_set_region_4(struct mtw_softc *sc, uint16_t reg, uint32_t val, int count)
sys/dev/usb/wlan/if_mtw.c
1322
error = mtw_write(sc, reg + i, val);
sys/dev/usb/wlan/if_mtw.c
1327
mtw_efuse_read_2(struct mtw_softc *sc, uint16_t addr, uint16_t *val)
sys/dev/usb/wlan/if_mtw.c
1359
*val = 0xffff; // address not found
sys/dev/usb/wlan/if_mtw.c
1367
*val = (addr & 2) ? tmp >> 16 : tmp & 0xffff;
sys/dev/usb/wlan/if_mtw.c
1372
mtw_srom_read(struct mtw_softc *sc, uint16_t addr, uint16_t *val)
sys/dev/usb/wlan/if_mtw.c
1375
return (sc->sc_srom_read(sc, addr, val));
sys/dev/usb/wlan/if_mtw.c
1379
mtw_bbp_read(struct mtw_softc *sc, uint8_t reg, uint8_t *val)
sys/dev/usb/wlan/if_mtw.c
1406
*val = tmp & 0xff;
sys/dev/usb/wlan/if_mtw.c
1411
mtw_bbp_write(struct mtw_softc *sc, uint8_t reg, uint8_t val)
sys/dev/usb/wlan/if_mtw.c
1425
tmp = MTW_BBP_CSR_KICK | reg << 8 | val;
sys/dev/usb/wlan/if_mtw.c
1467
uint16_t val;
sys/dev/usb/wlan/if_mtw.c
1472
mtw_srom_read(sc, MTW_EEPROM_PWR2GHZ_BASE1 + i / 2, &val);
sys/dev/usb/wlan/if_mtw.c
1473
sc->txpow1[i + 0] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_mtw.c
1474
sc->txpow1[i + 1] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_mtw.c
1475
mtw_srom_read(sc, MTW_EEPROM_PWR2GHZ_BASE2 + i / 2, &val);
sys/dev/usb/wlan/if_mtw.c
1476
sc->txpow2[i + 0] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_mtw.c
1477
sc->txpow2[i + 1] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_mtw.c
1502
uint16_t val;
sys/dev/usb/wlan/if_mtw.c
1508
mtw_srom_read(sc, MTW_EEPROM_CHIPID, &val);
sys/dev/usb/wlan/if_mtw.c
1509
sc->rf_rev = val;
sys/dev/usb/wlan/if_mtw.c
1510
mtw_srom_read(sc, MTW_EEPROM_ANTENNA, &val);
sys/dev/usb/wlan/if_mtw.c
1511
sc->ntxchains = (val >> 4) & 0xf;
sys/dev/usb/wlan/if_mtw.c
1512
sc->nrxchains = val & 0xf;
sys/dev/usb/wlan/if_mtw.c
1517
mtw_srom_read(sc, MTW_EEPROM_VERSION, &val);
sys/dev/usb/wlan/if_mtw.c
1518
MTW_DPRINTF(sc, MTW_DEBUG_ROM, "EEPROM rev=%d, FAE=%d\n", val & 0xff,
sys/dev/usb/wlan/if_mtw.c
1519
val >> 8);
sys/dev/usb/wlan/if_mtw.c
1522
mtw_srom_read(sc, MTW_EEPROM_MAC01, &val);
sys/dev/usb/wlan/if_mtw.c
1523
ic->ic_macaddr[0] = val & 0xff;
sys/dev/usb/wlan/if_mtw.c
1524
ic->ic_macaddr[1] = val >> 8;
sys/dev/usb/wlan/if_mtw.c
1525
mtw_srom_read(sc, MTW_EEPROM_MAC23, &val);
sys/dev/usb/wlan/if_mtw.c
1526
ic->ic_macaddr[2] = val & 0xff;
sys/dev/usb/wlan/if_mtw.c
1527
ic->ic_macaddr[3] = val >> 8;
sys/dev/usb/wlan/if_mtw.c
1528
mtw_srom_read(sc, MTW_EEPROM_MAC45, &val);
sys/dev/usb/wlan/if_mtw.c
1529
ic->ic_macaddr[4] = val & 0xff;
sys/dev/usb/wlan/if_mtw.c
1530
ic->ic_macaddr[5] = val >> 8;
sys/dev/usb/wlan/if_mtw.c
1536
mtw_srom_read(sc, i, &val);
sys/dev/usb/wlan/if_mtw.c
1537
printf(" %04x", val);
sys/dev/usb/wlan/if_mtw.c
1542
mtw_srom_read(sc, MTW_EEPROM_CONFIG, &val);
sys/dev/usb/wlan/if_mtw.c
1543
device_printf(sc->sc_dev, "EEPROM CFG 0x%04x\n", val);
sys/dev/usb/wlan/if_mtw.c
1544
if ((val & 0xff) != 0xff) {
sys/dev/usb/wlan/if_mtw.c
1545
sc->ext_5ghz_lna = (val >> 3) & 1;
sys/dev/usb/wlan/if_mtw.c
1546
sc->ext_2ghz_lna = (val >> 2) & 1;
sys/dev/usb/wlan/if_mtw.c
1548
sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1;
sys/dev/usb/wlan/if_mtw.c
1550
sc->rfswitch = val & 1;
sys/dev/usb/wlan/if_mtw.c
1554
mtw_srom_read(sc, MTW_EEPROM_FREQ_OFFSET, &val);
sys/dev/usb/wlan/if_mtw.c
1555
if ((val & 0xff) != 0xff)
sys/dev/usb/wlan/if_mtw.c
1556
sc->rf_freq_offset = val;
sys/dev/usb/wlan/if_mtw.c
1566
mtw_srom_read(sc, MTW_EEPROM_DELTAPWR, &val);
sys/dev/usb/wlan/if_mtw.c
1568
if ((val & 0xff) != 0xff && (val & 0x80)) {
sys/dev/usb/wlan/if_mtw.c
1569
delta_2ghz = val & 0xf;
sys/dev/usb/wlan/if_mtw.c
1570
if (!(val & 0x40)) /* negative number */
sys/dev/usb/wlan/if_mtw.c
1573
val >>= 8;
sys/dev/usb/wlan/if_mtw.c
1574
if ((val & 0xff) != 0xff && (val & 0x80)) {
sys/dev/usb/wlan/if_mtw.c
1575
delta_5ghz = val & 0xf;
sys/dev/usb/wlan/if_mtw.c
1576
if (!(val & 0x40)) /* negative number */
sys/dev/usb/wlan/if_mtw.c
1586
mtw_srom_read(sc, MTW_EEPROM_RPWR + ridx * 2, &val);
sys/dev/usb/wlan/if_mtw.c
1587
reg = val;
sys/dev/usb/wlan/if_mtw.c
1588
mtw_srom_read(sc, MTW_EEPROM_RPWR + ridx * 2 + 1, &val);
sys/dev/usb/wlan/if_mtw.c
1589
reg |= (uint32_t)val << 16;
sys/dev/usb/wlan/if_mtw.c
1603
val = 0;
sys/dev/usb/wlan/if_mtw.c
1604
mtw_srom_read(sc, MTW_EEPROM_RSSI1_2GHZ, &val);
sys/dev/usb/wlan/if_mtw.c
1605
sc->rssi_2ghz[0] = val & 0xff; /* Ant A */
sys/dev/usb/wlan/if_mtw.c
1606
sc->rssi_2ghz[1] = val >> 8; /* Ant B */
sys/dev/usb/wlan/if_mtw.c
1607
mtw_srom_read(sc, MTW_EEPROM_RSSI2_2GHZ, &val);
sys/dev/usb/wlan/if_mtw.c
1612
if ((val & 0xff) != 0xff)
sys/dev/usb/wlan/if_mtw.c
1613
sc->txmixgain_2ghz = val & 0x7;
sys/dev/usb/wlan/if_mtw.c
1616
sc->lna[2] = val >> 8; /* channel group 2 */
sys/dev/usb/wlan/if_mtw.c
1617
mtw_srom_read(sc, MTW_EEPROM_RSSI1_5GHZ, &val);
sys/dev/usb/wlan/if_mtw.c
1618
sc->rssi_5ghz[0] = val & 0xff; /* Ant A */
sys/dev/usb/wlan/if_mtw.c
1619
sc->rssi_5ghz[1] = val >> 8; /* Ant B */
sys/dev/usb/wlan/if_mtw.c
1620
mtw_srom_read(sc, MTW_EEPROM_RSSI2_5GHZ, &val);
sys/dev/usb/wlan/if_mtw.c
1621
sc->rssi_5ghz[2] = val & 0xff; /* Ant C */
sys/dev/usb/wlan/if_mtw.c
1623
sc->lna[3] = val >> 8; /* channel group 3 */
sys/dev/usb/wlan/if_mtw.c
1625
mtw_srom_read(sc, MTW_EEPROM_LNA, &val);
sys/dev/usb/wlan/if_mtw.c
1626
sc->lna[0] = val & 0xff; /* channel group 0 */
sys/dev/usb/wlan/if_mtw.c
1627
sc->lna[1] = val >> 8; /* channel group 1 */
sys/dev/usb/wlan/if_mtw.c
1701
cmd.val = htole32(which);
sys/dev/usb/wlan/if_mtw.c
201
static int mtw_mcu_radio(struct mtw_softc *sc, int func, uint32_t val);
sys/dev/usb/wlan/if_mtw.c
261
uint8_t val;
sys/dev/usb/wlan/if_mtw.c
267
uint32_t val;
sys/dev/usb/wlan/if_mtw.c
271
uint8_t val;
sys/dev/usb/wlan/if_mtw.c
3565
mtw_mcu_calibrate(struct mtw_softc *sc, int func, uint32_t val)
sys/dev/usb/wlan/if_mtw.c
3570
cmd.val = htole32(val);
sys/dev/usb/wlan/if_mtw.c
3575
mtw_rf_write(struct mtw_softc *sc, uint8_t bank, uint8_t reg, uint8_t val)
sys/dev/usb/wlan/if_mtw.c
3595
reg << 8 | val;
sys/dev/usb/wlan/if_mtw.c
3637
mtw_rf_read(struct mtw_softc *sc, uint8_t bank, uint8_t reg, uint8_t *val)
sys/dev/usb/wlan/if_mtw.c
3669
*val = tmp & 0xff;
sys/dev/usb/wlan/if_mtw.c
4178
mt7601_def_bbp[i].val)) != 0)
sys/dev/usb/wlan/if_mtw.c
4195
mt7601_rf_bank0[i].val);
sys/dev/usb/wlan/if_mtw.c
4202
mt7601_rf_bank4[i].val);
sys/dev/usb/wlan/if_mtw.c
4209
mt7601_rf_bank5[i].val);
sys/dev/usb/wlan/if_mtw.c
4292
mt7601_r49_read(struct mtw_softc *sc, uint8_t flag, int8_t *val)
sys/dev/usb/wlan/if_mtw.c
4302
return (mtw_bbp_read(sc, 49, val));
sys/dev/usb/wlan/if_mtw.c
4306
mt7601_rf_temperature(struct mtw_softc *sc, int8_t *val)
sys/dev/usb/wlan/if_mtw.c
4333
mt7601_r49_read(sc, MT7601_R47_TEMP, val);
sys/dev/usb/wlan/if_mtw.c
4423
mtw_mcu_radio(struct mtw_softc *sc, int func, uint32_t val)
sys/dev/usb/wlan/if_mtw.c
4428
cmd.r2 = htole32(val);
sys/dev/usb/wlan/if_mtw.c
4474
mt7601_def_mac[i].val);
sys/dev/usb/wlan/if_mtw.c
475
mtw_read_cfg(struct mtw_softc *sc, uint16_t reg, uint32_t *val)
sys/dev/usb/wlan/if_mtw.c
491
*val = le32toh(tmp);
sys/dev/usb/wlan/if_mtw.c
493
*val = 0xffffffff;
sys/dev/usb/wlan/if_mtwreg.h
884
uint32_t val;
sys/dev/usb/wlan/if_rsu.c
1079
rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val)
sys/dev/usb/wlan/if_rsu.c
1081
rsu_write_region_1(sc, addr, &val, 1);
sys/dev/usb/wlan/if_rsu.c
1085
rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val)
sys/dev/usb/wlan/if_rsu.c
1087
val = htole16(val);
sys/dev/usb/wlan/if_rsu.c
1088
rsu_write_region_1(sc, addr, (uint8_t *)&val, 2);
sys/dev/usb/wlan/if_rsu.c
1092
rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val)
sys/dev/usb/wlan/if_rsu.c
1094
val = htole32(val);
sys/dev/usb/wlan/if_rsu.c
1095
rsu_write_region_1(sc, addr, (uint8_t *)&val, 4);
sys/dev/usb/wlan/if_rsu.c
1116
uint8_t val;
sys/dev/usb/wlan/if_rsu.c
1118
if (rsu_read_region_1(sc, addr, &val, 1) != 0)
sys/dev/usb/wlan/if_rsu.c
1120
return (val);
sys/dev/usb/wlan/if_rsu.c
1126
uint16_t val;
sys/dev/usb/wlan/if_rsu.c
1128
if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0)
sys/dev/usb/wlan/if_rsu.c
1130
return (le16toh(val));
sys/dev/usb/wlan/if_rsu.c
1136
uint32_t val;
sys/dev/usb/wlan/if_rsu.c
1138
if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0)
sys/dev/usb/wlan/if_rsu.c
1140
return (le32toh(val));
sys/dev/usb/wlan/if_rsu.c
1636
rsu_cam_read(struct rsu_softc *sc, uint8_t addr, uint32_t *val)
sys/dev/usb/wlan/if_rsu.c
1655
*val = rsu_read_4(sc, R92S_CAMREAD);
sys/dev/usb/wlan/if_rsu.c
1673
uint32_t val;
sys/dev/usb/wlan/if_rsu.c
1679
error = rsu_cam_read(sc, R92S_CAM_CTL0(keyix), &val);
sys/dev/usb/wlan/if_rsu.c
1685
if (((val & R92S_CAM_VALID) == 0) ^ is_valid)
sys/dev/usb/wlan/if_rsu.c
1821
uint32_t val;
sys/dev/usb/wlan/if_rsu.c
1830
error = rsu_cam_read(sc, R92S_CAM_CTL0(keyix), &val);
sys/dev/usb/wlan/if_rsu.c
1831
if (error == 0 && (val & R92S_CAM_VALID) == 0) {
sys/dev/usb/wlan/if_rsureg.h
233
#define MS(val, field) \
sys/dev/usb/wlan/if_rsureg.h
234
(((val) & field##_M) >> field##_S)
sys/dev/usb/wlan/if_rsureg.h
237
#define SM(field, val) \
sys/dev/usb/wlan/if_rsureg.h
238
(((val) << field##_S) & field##_M)
sys/dev/usb/wlan/if_rsureg.h
241
#define RW(var, field, val) \
sys/dev/usb/wlan/if_rsureg.h
242
(((var) & ~field##_M) | SM(field, val))
sys/dev/usb/wlan/if_rum.c
1811
uint32_t val;
sys/dev/usb/wlan/if_rum.c
1813
rum_read_multi(sc, reg, &val, sizeof val);
sys/dev/usb/wlan/if_rum.c
1815
return le32toh(val);
sys/dev/usb/wlan/if_rum.c
1839
rum_write(struct rum_softc *sc, uint16_t reg, uint32_t val)
sys/dev/usb/wlan/if_rum.c
1841
uint32_t tmp = htole32(val);
sys/dev/usb/wlan/if_rum.c
1912
rum_bbp_write(struct rum_softc *sc, uint8_t reg, uint8_t val)
sys/dev/usb/wlan/if_rum.c
1923
tmp = RT2573_BBP_BUSY | (reg & 0x7f) << 8 | val;
sys/dev/usb/wlan/if_rum.c
1930
uint32_t val;
sys/dev/usb/wlan/if_rum.c
1940
val = RT2573_BBP_BUSY | RT2573_BBP_READ | reg << 8;
sys/dev/usb/wlan/if_rum.c
1941
rum_write(sc, RT2573_PHY_CSR3, val);
sys/dev/usb/wlan/if_rum.c
1944
val = rum_read(sc, RT2573_PHY_CSR3);
sys/dev/usb/wlan/if_rum.c
1945
if (!(val & RT2573_BBP_BUSY))
sys/dev/usb/wlan/if_rum.c
1946
return val & 0xff;
sys/dev/usb/wlan/if_rum.c
1956
rum_rf_write(struct rum_softc *sc, uint8_t reg, uint32_t val)
sys/dev/usb/wlan/if_rum.c
1972
tmp = RT2573_RF_BUSY | RT2573_RF_20BIT | (val & 0xfffff) << 2 |
sys/dev/usb/wlan/if_rum.c
1977
sc->rf_regs[reg] = val;
sys/dev/usb/wlan/if_rum.c
1979
DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0xfffff);
sys/dev/usb/wlan/if_rum.c
2405
uint16_t val;
sys/dev/usb/wlan/if_rum.c
2413
rum_eeprom_read(sc, RT2573_EEPROM_ANTENNA, &val, 2);
sys/dev/usb/wlan/if_rum.c
2414
val = le16toh(val);
sys/dev/usb/wlan/if_rum.c
2415
sc->rf_rev = (val >> 11) & 0x1f;
sys/dev/usb/wlan/if_rum.c
2416
sc->hw_radio = (val >> 10) & 0x1;
sys/dev/usb/wlan/if_rum.c
2417
sc->rx_ant = (val >> 4) & 0x3;
sys/dev/usb/wlan/if_rum.c
2418
sc->tx_ant = (val >> 2) & 0x3;
sys/dev/usb/wlan/if_rum.c
2419
sc->nb_ant = val & 0x3;
sys/dev/usb/wlan/if_rum.c
2423
rum_eeprom_read(sc, RT2573_EEPROM_CONFIG2, &val, 2);
sys/dev/usb/wlan/if_rum.c
2424
val = le16toh(val);
sys/dev/usb/wlan/if_rum.c
2425
sc->ext_5ghz_lna = (val >> 6) & 0x1;
sys/dev/usb/wlan/if_rum.c
2426
sc->ext_2ghz_lna = (val >> 4) & 0x1;
sys/dev/usb/wlan/if_rum.c
2431
rum_eeprom_read(sc, RT2573_EEPROM_RSSI_2GHZ_OFFSET, &val, 2);
sys/dev/usb/wlan/if_rum.c
2432
val = le16toh(val);
sys/dev/usb/wlan/if_rum.c
2433
if ((val & 0xff) != 0xff)
sys/dev/usb/wlan/if_rum.c
2434
sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
sys/dev/usb/wlan/if_rum.c
2440
rum_eeprom_read(sc, RT2573_EEPROM_RSSI_5GHZ_OFFSET, &val, 2);
sys/dev/usb/wlan/if_rum.c
2441
val = le16toh(val);
sys/dev/usb/wlan/if_rum.c
2442
if ((val & 0xff) != 0xff)
sys/dev/usb/wlan/if_rum.c
2443
sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
sys/dev/usb/wlan/if_rum.c
2457
rum_eeprom_read(sc, RT2573_EEPROM_FREQ_OFFSET, &val, 2);
sys/dev/usb/wlan/if_rum.c
2458
val = le16toh(val);
sys/dev/usb/wlan/if_rum.c
2459
if ((val & 0xff) != 0xff)
sys/dev/usb/wlan/if_rum.c
2460
sc->rffreq = val & 0xff;
sys/dev/usb/wlan/if_rum.c
2480
sc->bbp_prom[i].val);
sys/dev/usb/wlan/if_rum.c
2513
const uint8_t val = rum_bbp_read(sc, 0);
sys/dev/usb/wlan/if_rum.c
2514
if (val != 0 && val != 0xff)
sys/dev/usb/wlan/if_rum.c
2526
rum_bbp_write(sc, rum_def_bbp[i].reg, rum_def_bbp[i].val);
sys/dev/usb/wlan/if_rum.c
2532
rum_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
sys/dev/usb/wlan/if_rum.c
2562
rum_write(sc, rum_def_mac[i].reg, rum_def_mac[i].val);
sys/dev/usb/wlan/if_rum.c
280
uint32_t val;
sys/dev/usb/wlan/if_rum.c
308
uint8_t val;
sys/dev/usb/wlan/if_rumvar.h
155
uint8_t val;
sys/dev/usb/wlan/if_run.c
1350
run_read(struct run_softc *sc, uint16_t reg, uint32_t *val)
sys/dev/usb/wlan/if_run.c
1357
*val = le32toh(tmp);
sys/dev/usb/wlan/if_run.c
1359
*val = 0xffffffff;
sys/dev/usb/wlan/if_run.c
1378
run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val)
sys/dev/usb/wlan/if_run.c
1384
USETW(req.wValue, val);
sys/dev/usb/wlan/if_run.c
1392
run_write(struct run_softc *sc, uint16_t reg, uint32_t val)
sys/dev/usb/wlan/if_run.c
1396
if ((error = run_write_2(sc, reg, val & 0xffff)) == 0)
sys/dev/usb/wlan/if_run.c
1397
error = run_write_2(sc, reg + 2, val >> 16);
sys/dev/usb/wlan/if_run.c
1447
run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int len)
sys/dev/usb/wlan/if_run.c
1453
error = run_write(sc, reg + i, val);
sys/dev/usb/wlan/if_run.c
1458
run_efuse_read(struct run_softc *sc, uint16_t addr, uint16_t *val, int count)
sys/dev/usb/wlan/if_run.c
1490
*val = 0xffff; /* address not found */
sys/dev/usb/wlan/if_run.c
1499
*val = (addr & 1) ? tmp >> 16 : tmp & 0xffff;
sys/dev/usb/wlan/if_run.c
1506
run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val)
sys/dev/usb/wlan/if_run.c
1508
return (run_efuse_read(sc, addr, val, 2));
sys/dev/usb/wlan/if_run.c
1512
run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val)
sys/dev/usb/wlan/if_run.c
1527
*val = le16toh(tmp);
sys/dev/usb/wlan/if_run.c
1529
*val = 0xffff;
sys/dev/usb/wlan/if_run.c
1534
run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val)
sys/dev/usb/wlan/if_run.c
1537
return sc->sc_srom_read(sc, addr, val);
sys/dev/usb/wlan/if_run.c
1541
run_rt2870_rf_write(struct run_softc *sc, uint32_t val)
sys/dev/usb/wlan/if_run.c
1555
return (run_write(sc, RT2860_RF_CSR_CFG0, val));
sys/dev/usb/wlan/if_run.c
1559
run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val)
sys/dev/usb/wlan/if_run.c
1586
*val = tmp & 0xff;
sys/dev/usb/wlan/if_run.c
1591
run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val)
sys/dev/usb/wlan/if_run.c
1605
tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;
sys/dev/usb/wlan/if_run.c
1610
run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val)
sys/dev/usb/wlan/if_run.c
1637
*val = tmp & 0xff;
sys/dev/usb/wlan/if_run.c
1642
run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val)
sys/dev/usb/wlan/if_run.c
1656
tmp = RT2860_BBP_CSR_KICK | reg << 8 | val;
sys/dev/usb/wlan/if_run.c
1729
uint16_t addr, val;
sys/dev/usb/wlan/if_run.c
1736
run_srom_read(sc, addr + i / 2, &val);
sys/dev/usb/wlan/if_run.c
1737
sc->txpow1[i + 0] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1738
sc->txpow1[i + 1] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1742
run_srom_read(sc, addr + i / 2, &val);
sys/dev/usb/wlan/if_run.c
1743
sc->txpow2[i + 0] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1744
sc->txpow2[i + 1] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1748
&val);
sys/dev/usb/wlan/if_run.c
1749
sc->txpow3[i + 0] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1750
sc->txpow3[i + 1] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1766
run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE1 + i / 2, &val);
sys/dev/usb/wlan/if_run.c
1767
sc->txpow1[i + 14] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1768
sc->txpow1[i + 15] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1770
run_srom_read(sc, RT3593_EEPROM_PWR5GHZ_BASE2 + i / 2, &val);
sys/dev/usb/wlan/if_run.c
1771
sc->txpow2[i + 14] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1772
sc->txpow2[i + 15] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1776
&val);
sys/dev/usb/wlan/if_run.c
1777
sc->txpow3[i + 14] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1778
sc->txpow3[i + 15] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1786
uint16_t val;
sys/dev/usb/wlan/if_run.c
1791
run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val);
sys/dev/usb/wlan/if_run.c
1792
sc->txpow1[i + 0] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1793
sc->txpow1[i + 1] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1797
RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val);
sys/dev/usb/wlan/if_run.c
1798
sc->txpow2[i + 0] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1799
sc->txpow2[i + 1] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1824
run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val);
sys/dev/usb/wlan/if_run.c
1825
sc->txpow1[i + 14] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1826
sc->txpow1[i + 15] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1828
run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val);
sys/dev/usb/wlan/if_run.c
1829
sc->txpow2[i + 14] = (int8_t)(val & 0xff);
sys/dev/usb/wlan/if_run.c
1830
sc->txpow2[i + 15] = (int8_t)(val >> 8);
sys/dev/usb/wlan/if_run.c
1853
uint16_t val;
sys/dev/usb/wlan/if_run.c
1866
run_srom_read(sc, RT2860_EEPROM_VERSION, &val);
sys/dev/usb/wlan/if_run.c
1868
"EEPROM rev=%d, FAE=%d\n", val >> 8, val & 0xff);
sys/dev/usb/wlan/if_run.c
1871
run_srom_read(sc, RT2860_EEPROM_MAC01, &val);
sys/dev/usb/wlan/if_run.c
1872
ic->ic_macaddr[0] = val & 0xff;
sys/dev/usb/wlan/if_run.c
1873
ic->ic_macaddr[1] = val >> 8;
sys/dev/usb/wlan/if_run.c
1874
run_srom_read(sc, RT2860_EEPROM_MAC23, &val);
sys/dev/usb/wlan/if_run.c
1875
ic->ic_macaddr[2] = val & 0xff;
sys/dev/usb/wlan/if_run.c
1876
ic->ic_macaddr[3] = val >> 8;
sys/dev/usb/wlan/if_run.c
1877
run_srom_read(sc, RT2860_EEPROM_MAC45, &val);
sys/dev/usb/wlan/if_run.c
1878
ic->ic_macaddr[4] = val & 0xff;
sys/dev/usb/wlan/if_run.c
1879
ic->ic_macaddr[5] = val >> 8;
sys/dev/usb/wlan/if_run.c
1884
run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val);
sys/dev/usb/wlan/if_run.c
1885
sc->bbp[i].val = val & 0xff;
sys/dev/usb/wlan/if_run.c
1886
sc->bbp[i].reg = val >> 8;
sys/dev/usb/wlan/if_run.c
1888
"BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val);
sys/dev/usb/wlan/if_run.c
1894
&val);
sys/dev/usb/wlan/if_run.c
1895
sc->rf[i].val = val & 0xff;
sys/dev/usb/wlan/if_run.c
1896
sc->rf[i].reg = val >> 8;
sys/dev/usb/wlan/if_run.c
1898
sc->rf[i].reg, sc->rf[i].val);
sys/dev/usb/wlan/if_run.c
1905
RT3593_EEPROM_FREQ, &val);
sys/dev/usb/wlan/if_run.c
1906
sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;
sys/dev/usb/wlan/if_run.c
1911
RT3593_EEPROM_FREQ_LEDS, &val);
sys/dev/usb/wlan/if_run.c
1912
if (val >> 8 != 0xff) {
sys/dev/usb/wlan/if_run.c
1914
sc->leds = val >> 8;
sys/dev/usb/wlan/if_run.c
1934
run_srom_read(sc, 0x00, &val);
sys/dev/usb/wlan/if_run.c
1936
run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);
sys/dev/usb/wlan/if_run.c
1938
if (val == 0xffff) {
sys/dev/usb/wlan/if_run.c
1959
sc->rf_rev = val;
sys/dev/usb/wlan/if_run.c
1960
run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);
sys/dev/usb/wlan/if_run.c
1962
sc->rf_rev = (val >> 8) & 0xf;
sys/dev/usb/wlan/if_run.c
1963
sc->ntxchains = (val >> 4) & 0xf;
sys/dev/usb/wlan/if_run.c
1964
sc->nrxchains = val & 0xf;
sys/dev/usb/wlan/if_run.c
1970
run_srom_read(sc, RT2860_EEPROM_CONFIG, &val);
sys/dev/usb/wlan/if_run.c
1971
RUN_DPRINTF(sc, RUN_DEBUG_ROM, "EEPROM CFG 0x%04x\n", val);
sys/dev/usb/wlan/if_run.c
1973
if ((val >> 8) != 0xff)
sys/dev/usb/wlan/if_run.c
1974
sc->patch_dac = (val >> 15) & 1;
sys/dev/usb/wlan/if_run.c
1975
if ((val & 0xff) != 0xff) {
sys/dev/usb/wlan/if_run.c
1976
sc->ext_5ghz_lna = (val >> 3) & 1;
sys/dev/usb/wlan/if_run.c
1977
sc->ext_2ghz_lna = (val >> 2) & 1;
sys/dev/usb/wlan/if_run.c
1979
sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1;
sys/dev/usb/wlan/if_run.c
1981
sc->rfswitch = val & 1;
sys/dev/usb/wlan/if_run.c
1991
run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val);
sys/dev/usb/wlan/if_run.c
1993
if ((val & 0xff) != 0xff && (val & 0x80)) {
sys/dev/usb/wlan/if_run.c
1994
delta_2ghz = val & 0xf;
sys/dev/usb/wlan/if_run.c
1995
if (!(val & 0x40)) /* negative number */
sys/dev/usb/wlan/if_run.c
1998
val >>= 8;
sys/dev/usb/wlan/if_run.c
1999
if ((val & 0xff) != 0xff && (val & 0x80)) {
sys/dev/usb/wlan/if_run.c
2000
delta_5ghz = val & 0xf;
sys/dev/usb/wlan/if_run.c
2001
if (!(val & 0x40)) /* negative number */
sys/dev/usb/wlan/if_run.c
2010
run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val);
sys/dev/usb/wlan/if_run.c
2011
reg = val;
sys/dev/usb/wlan/if_run.c
2012
run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val);
sys/dev/usb/wlan/if_run.c
2013
reg |= (uint32_t)val << 16;
sys/dev/usb/wlan/if_run.c
2027
RT3593_EEPROM_RSSI1_2GHZ, &val);
sys/dev/usb/wlan/if_run.c
2028
sc->rssi_2ghz[0] = val & 0xff; /* Ant A */
sys/dev/usb/wlan/if_run.c
2029
sc->rssi_2ghz[1] = val >> 8; /* Ant B */
sys/dev/usb/wlan/if_run.c
2031
RT3593_EEPROM_RSSI2_2GHZ, &val);
sys/dev/usb/wlan/if_run.c
2035
sc->rssi_2ghz[2] = val & 0xff; /* Ant C */
sys/dev/usb/wlan/if_run.c
2041
if ((val & 0xff) != 0xff)
sys/dev/usb/wlan/if_run.c
2042
sc->txmixgain_2ghz = val & 0x7;
sys/dev/usb/wlan/if_run.c
2047
sc->rssi_2ghz[2] = val & 0xff; /* Ant C */
sys/dev/usb/wlan/if_run.c
2049
run_srom_read(sc, RT3593_EEPROM_LNA_5GHZ, &val);
sys/dev/usb/wlan/if_run.c
2050
sc->lna[2] = val >> 8; /* channel group 2 */
sys/dev/usb/wlan/if_run.c
2053
RT3593_EEPROM_RSSI1_5GHZ, &val);
sys/dev/usb/wlan/if_run.c
2054
sc->rssi_5ghz[0] = val & 0xff; /* Ant A */
sys/dev/usb/wlan/if_run.c
2055
sc->rssi_5ghz[1] = val >> 8; /* Ant B */
sys/dev/usb/wlan/if_run.c
2057
RT3593_EEPROM_RSSI2_5GHZ, &val);
sys/dev/usb/wlan/if_run.c
2063
if ((val & 0xff) != 0xff)
sys/dev/usb/wlan/if_run.c
2064
sc->txmixgain_5ghz = val & 0x7;
sys/dev/usb/wlan/if_run.c
2068
sc->rssi_5ghz[2] = val & 0xff; /* Ant C */
sys/dev/usb/wlan/if_run.c
2071
run_srom_read(sc, RT3593_EEPROM_LNA_5GHZ, &val);
sys/dev/usb/wlan/if_run.c
2073
sc->lna[3] = val >> 8; /* channel group 3 */
sys/dev/usb/wlan/if_run.c
2076
RT3593_EEPROM_LNA, &val);
sys/dev/usb/wlan/if_run.c
2077
sc->lna[0] = val & 0xff; /* channel group 0 */
sys/dev/usb/wlan/if_run.c
2078
sc->lna[1] = val >> 8; /* channel group 1 */
sys/dev/usb/wlan/if_run.c
3911
uint16_t val;
sys/dev/usb/wlan/if_run.c
3916
run_efuse_read(sc, RT5390_EEPROM_IQ_GAIN_CAL_TX0_2GHZ, &val, 1);
sys/dev/usb/wlan/if_run.c
3920
&val, 1);
sys/dev/usb/wlan/if_run.c
3924
&val, 1);
sys/dev/usb/wlan/if_run.c
3928
&val, 1);
sys/dev/usb/wlan/if_run.c
3930
val = 0;
sys/dev/usb/wlan/if_run.c
3931
run_bbp_write(sc, 159, val);
sys/dev/usb/wlan/if_run.c
3937
&val, 1);
sys/dev/usb/wlan/if_run.c
3941
&val, 1);
sys/dev/usb/wlan/if_run.c
3945
&val, 1);
sys/dev/usb/wlan/if_run.c
3949
&val, 1);
sys/dev/usb/wlan/if_run.c
3951
val = 0;
sys/dev/usb/wlan/if_run.c
3952
run_bbp_write(sc, 159, val);
sys/dev/usb/wlan/if_run.c
3958
&val, 1);
sys/dev/usb/wlan/if_run.c
3962
&val, 1);
sys/dev/usb/wlan/if_run.c
3966
&val, 1);
sys/dev/usb/wlan/if_run.c
3970
&val, 1);
sys/dev/usb/wlan/if_run.c
3972
val = 0;
sys/dev/usb/wlan/if_run.c
3973
run_bbp_write(sc, 159, val);
sys/dev/usb/wlan/if_run.c
3979
&val, 1);
sys/dev/usb/wlan/if_run.c
3983
&val, 1);
sys/dev/usb/wlan/if_run.c
3987
&val, 1);
sys/dev/usb/wlan/if_run.c
3991
&val, 1);
sys/dev/usb/wlan/if_run.c
3993
val = 0;
sys/dev/usb/wlan/if_run.c
3994
run_bbp_write(sc, 159, val);
sys/dev/usb/wlan/if_run.c
3999
&val, 1);
sys/dev/usb/wlan/if_run.c
4000
run_bbp_write(sc, 159, val);
sys/dev/usb/wlan/if_run.c
4005
RT5390_EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CTL, &val, 1);
sys/dev/usb/wlan/if_run.c
4006
run_bbp_write(sc, 159, val);
sys/dev/usb/wlan/if_run.c
4784
rt5592_2ghz_def_rf[i].val);
sys/dev/usb/wlan/if_run.c
4803
rt5592_5ghz_def_rf[i].val);
sys/dev/usb/wlan/if_run.c
4809
rt5592_chan_5ghz[i].val);
sys/dev/usb/wlan/if_run.c
5440
rt5592_def_bbp[i].val);
sys/dev/usb/wlan/if_run.c
5449
rt5390_def_bbp[i].val);
sys/dev/usb/wlan/if_run.c
5502
rt2860_def_bbp[i].val);
sys/dev/usb/wlan/if_run.c
5547
rt3572_def_rf[i].val);
sys/dev/usb/wlan/if_run.c
5552
rt3070_def_rf[i].val);
sys/dev/usb/wlan/if_run.c
5689
rt3593_def_rf[i].val);
sys/dev/usb/wlan/if_run.c
571
uint32_t val;
sys/dev/usb/wlan/if_run.c
5745
rt5592_def_rf[i].val);
sys/dev/usb/wlan/if_run.c
5752
rt5392_def_rf[i].val);
sys/dev/usb/wlan/if_run.c
5765
rt5390_def_rf[i].val);
sys/dev/usb/wlan/if_run.c
578
uint8_t val;
sys/dev/usb/wlan/if_run.c
5789
uint8_t *val)
sys/dev/usb/wlan/if_run.c
5838
*val = rf24;
sys/dev/usb/wlan/if_run.c
5926
run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);
sys/dev/usb/wlan/if_run.c
6182
run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val);
sys/dev/usb/wlan/if_run.c
626
uint8_t val;
sys/dev/usb/wlan/if_run.c
6261
run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);
sys/dev/usb/wlan/if_run.c
649
uint8_t val;
sys/dev/usb/wlan/if_runreg.h
958
#define RT2860_EEPROM_CTL(sc, val) do { \
sys/dev/usb/wlan/if_runreg.h
959
RAL_WRITE((sc), RT2860_PCI_EECTRL, (val)); \
sys/dev/usb/wlan/if_runvar.h
205
uint8_t val;
sys/dev/usb/wlan/if_uath.c
1082
uint32_t val;
sys/dev/usb/wlan/if_uath.c
1093
val = htobe32(0);
sys/dev/usb/wlan/if_uath.c
1094
uath_cmd_write(sc, WDCMSG_BIND, &val, sizeof val, 0);
sys/dev/usb/wlan/if_uath.c
1117
&val, sizeof(val), UATH_CMD_FLAG_MAGIC);
sys/dev/usb/wlan/if_uath.c
1124
uath_codename(WDCMSG_TARGET_START), be32toh(val));
sys/dev/usb/wlan/if_uath.c
1134
val = htobe32(TARGET_DEVICE_AWAKE);
sys/dev/usb/wlan/if_uath.c
1135
uath_cmd_write(sc, WDCMSG_SET_PWR_MODE, &val, sizeof val, 0);
sys/dev/usb/wlan/if_uath.c
1180
uath_config(struct uath_softc *sc, uint32_t reg, uint32_t val)
sys/dev/usb/wlan/if_uath.c
1187
*(uint32_t *)write.data = htobe32(val);
sys/dev/usb/wlan/if_uath.c
806
uath_get_capability(struct uath_softc *sc, uint32_t cap, uint32_t *val)
sys/dev/usb/wlan/if_uath.c
812
&cap, sizeof cap, val, sizeof(uint32_t), UATH_CMD_FLAG_MAGIC);
sys/dev/usb/wlan/if_uath.c
818
*val = be32toh(*val);
sys/dev/usb/wlan/if_ural.c
1405
uint16_t val;
sys/dev/usb/wlan/if_ural.c
1413
error = ural_do_request(sc, &req, &val);
sys/dev/usb/wlan/if_ural.c
1420
return le16toh(val);
sys/dev/usb/wlan/if_ural.c
1443
ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
sys/dev/usb/wlan/if_ural.c
1450
USETW(req.wValue, val);
sys/dev/usb/wlan/if_ural.c
1481
ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
sys/dev/usb/wlan/if_ural.c
1497
tmp = reg << 8 | val;
sys/dev/usb/wlan/if_ural.c
1504
uint16_t val;
sys/dev/usb/wlan/if_ural.c
1507
val = RAL_BBP_WRITE | reg << 8;
sys/dev/usb/wlan/if_ural.c
1508
ural_write(sc, RAL_PHY_CSR7, val);
sys/dev/usb/wlan/if_ural.c
1525
ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
sys/dev/usb/wlan/if_ural.c
1541
tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
sys/dev/usb/wlan/if_ural.c
1546
sc->rf_regs[reg] = val;
sys/dev/usb/wlan/if_ural.c
1548
DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
sys/dev/usb/wlan/if_ural.c
1910
uint16_t val;
sys/dev/usb/wlan/if_ural.c
1912
ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
sys/dev/usb/wlan/if_ural.c
1913
val = le16toh(val);
sys/dev/usb/wlan/if_ural.c
1914
sc->rf_rev = (val >> 11) & 0x7;
sys/dev/usb/wlan/if_ural.c
1915
sc->hw_radio = (val >> 10) & 0x1;
sys/dev/usb/wlan/if_ural.c
1916
sc->led_mode = (val >> 6) & 0x7;
sys/dev/usb/wlan/if_ural.c
1917
sc->rx_ant = (val >> 4) & 0x3;
sys/dev/usb/wlan/if_ural.c
1918
sc->tx_ant = (val >> 2) & 0x3;
sys/dev/usb/wlan/if_ural.c
1919
sc->nb_ant = val & 0x3;
sys/dev/usb/wlan/if_ural.c
1950
ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
sys/dev/usb/wlan/if_ural.c
1957
ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
sys/dev/usb/wlan/if_ural.c
200
uint16_t val;
sys/dev/usb/wlan/if_ural.c
2030
ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
sys/dev/usb/wlan/if_ural.c
226
uint8_t val;
sys/dev/usb/wlan/if_uralvar.h
118
uint8_t val;
sys/dev/usb/wlan/if_urtw.c
131
#define urtw_read8_m(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
132
error = urtw_read8_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
136
#define urtw_write8_m(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
137
error = urtw_write8_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
141
#define urtw_read16_m(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
142
error = urtw_read16_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
146
#define urtw_write16_m(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
147
error = urtw_write16_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
151
#define urtw_read32_m(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
152
error = urtw_read32_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
156
#define urtw_write32_m(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
157
error = urtw_write32_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
161
#define urtw_8187_write_phy_ofdm(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
162
error = urtw_8187_write_phy_ofdm_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
166
#define urtw_8187_write_phy_cck(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
167
error = urtw_8187_write_phy_cck_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
171
#define urtw_8225_write(sc, val, data) do { \
sys/dev/usb/wlan/if_urtw.c
172
error = urtw_8225_write_c(sc, val, data); \
sys/dev/usb/wlan/if_urtw.c
179
uint32_t val;
sys/dev/usb/wlan/if_urtw.c
1970
if (rate == urtw_ratetable[i].val)
sys/dev/usb/wlan/if_urtw.c
2017
urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data)
sys/dev/usb/wlan/if_urtw.c
2026
USETW(req.wValue, (val & 0xff) | 0xff00);
sys/dev/usb/wlan/if_urtw.c
2027
USETW(req.wIndex, (val >> 8) & 0x3);
sys/dev/usb/wlan/if_urtw.c
2035
urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data)
sys/dev/usb/wlan/if_urtw.c
2044
USETW(req.wValue, (val & 0xff) | 0xff00);
sys/dev/usb/wlan/if_urtw.c
2045
USETW(req.wIndex, (val >> 8) & 0x3);
sys/dev/usb/wlan/if_urtw.c
2053
urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data)
sys/dev/usb/wlan/if_urtw.c
2062
USETW(req.wValue, (val & 0xff) | 0xff00);
sys/dev/usb/wlan/if_urtw.c
2063
USETW(req.wIndex, (val >> 8) & 0x3);
sys/dev/usb/wlan/if_urtw.c
2071
urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data)
sys/dev/usb/wlan/if_urtw.c
2079
USETW(req.wValue, (val & 0xff) | 0xff00);
sys/dev/usb/wlan/if_urtw.c
2080
USETW(req.wIndex, (val >> 8) & 0x3);
sys/dev/usb/wlan/if_urtw.c
2087
urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data)
sys/dev/usb/wlan/if_urtw.c
2095
USETW(req.wValue, (val & 0xff) | 0xff00);
sys/dev/usb/wlan/if_urtw.c
2096
USETW(req.wIndex, (val >> 8) & 0x3);
sys/dev/usb/wlan/if_urtw.c
2103
urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data)
sys/dev/usb/wlan/if_urtw.c
2111
USETW(req.wValue, (val & 0xff) | 0xff00);
sys/dev/usb/wlan/if_urtw.c
2112
USETW(req.wIndex, (val >> 8) & 0x3);
sys/dev/usb/wlan/if_urtw.c
2522
urtw_8225_rf_part1[i].val);
sys/dev/usb/wlan/if_urtw.c
2554
urtw_8225_rf_part2[i].val);
sys/dev/usb/wlan/if_urtw.c
2564
urtw_8225_rf_part3[i].val);
sys/dev/usb/wlan/if_urtw.c
2904
urtw_8225v2_rf_part1[i].val);
sys/dev/usb/wlan/if_urtw.c
2959
urtw_8225v2_rf_part2[i].val);
sys/dev/usb/wlan/if_urtw.c
2968
urtw_8225v2_rf_part3[i].val);
sys/dev/usb/wlan/if_urtw.c
3267
urtw_8225v2b_rf_part1[i].val);
sys/dev/usb/wlan/if_urtw.c
3300
urtw_8225v2b_rf_part0[i].val);
sys/dev/usb/wlan/if_urtw.c
3345
urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val);
sys/dev/usb/wlan/if_urtw.c
3445
urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data)
sys/dev/usb/wlan/if_urtw.c
3452
USETW(req.wValue, val | 0xfe00);
sys/dev/usb/wlan/if_urtw.c
3461
urtw_write8e(struct urtw_softc *sc, int val, uint8_t data)
sys/dev/usb/wlan/if_urtw.c
3467
USETW(req.wValue, val | 0xfe00);
sys/dev/usb/wlan/if_urtw.c
3475
urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val)
sys/dev/usb/wlan/if_urtw.c
3486
urtw_write32_m(sc, URTW_ANAPARAM, val);
sys/dev/usb/wlan/if_urtw.c
3498
urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val)
sys/dev/usb/wlan/if_urtw.c
3509
urtw_write32_m(sc, URTW_ANAPARAM2, val);
sys/dev/usb/wlan/if_urtw.c
4123
uint64_t val;
sys/dev/usb/wlan/if_urtw.c
4130
val = le64toh(sc->sc_txstatus);
sys/dev/usb/wlan/if_urtw.c
4131
type = (val >> 30) & 0x3;
sys/dev/usb/wlan/if_urtw.c
4133
pktretry = val & 0xff;
sys/dev/usb/wlan/if_urtw.c
4137
pktretry, (val >> 16) & 0xff);
sys/dev/usb/wlan/if_zyd.c
1028
zyd_write16_m(sc, phyini[i].reg, phyini[i].val);
sys/dev/usb/wlan/if_zyd.c
1032
zyd_write16_m(sc, phy2230s[i].reg, phy2230s[i].val);
sys/dev/usb/wlan/if_zyd.c
1056
zyd_write16_m(sc, phypll[i].reg, phypll[i].val);
sys/dev/usb/wlan/if_zyd.c
1075
zyd_write16_m(sc, phy[i].reg, phy[i].val);
sys/dev/usb/wlan/if_zyd.c
1101
zyd_write16_m(sc, phy1[i].reg, phy1[i].val);
sys/dev/usb/wlan/if_zyd.c
1105
zyd_write16_m(sc, phyini[i].reg, phyini[i].val);
sys/dev/usb/wlan/if_zyd.c
1109
zyd_write16_m(sc, phy2230s[i].reg, phy2230s[i].val);
sys/dev/usb/wlan/if_zyd.c
1138
zyd_write16_m(sc, phy2[i].reg, phy2[i].val);
sys/dev/usb/wlan/if_zyd.c
1147
zyd_write16_m(sc, phy3[i].reg, phy3[i].val);
sys/dev/usb/wlan/if_zyd.c
1189
zyd_write16_m(sc, phy1[i].reg, phy1[i].val);
sys/dev/usb/wlan/if_zyd.c
1205
zyd_write16_m(sc, phy1[i].reg, phy1[i].val);
sys/dev/usb/wlan/if_zyd.c
1237
r[0].val = 0x12;
sys/dev/usb/wlan/if_zyd.c
1240
zyd_write16_m(sc, r[i].reg, r[i].val);
sys/dev/usb/wlan/if_zyd.c
1263
zyd_write16_m(sc, phyini_1[i].reg, phyini_1[i].val);
sys/dev/usb/wlan/if_zyd.c
1272
zyd_write16_m(sc, phyini_2[i].reg, phyini_2[i].val);
sys/dev/usb/wlan/if_zyd.c
1281
zyd_write16_m(sc, phyini_3[i].reg, phyini_3[i].val);
sys/dev/usb/wlan/if_zyd.c
1355
zyd_write16_m(sc, phyini[i].reg, phyini[i].val);
sys/dev/usb/wlan/if_zyd.c
1425
zyd_write16_m(sc, phyini[i].reg, phyini[i].val);
sys/dev/usb/wlan/if_zyd.c
1546
zyd_write16_m(sc, cmd[i].reg, cmd[i].val);
sys/dev/usb/wlan/if_zyd.c
1585
zyd_write16_m(sc, phyini[i].reg, phyini[i].val);
sys/dev/usb/wlan/if_zyd.c
1628
zyd_write16_m(sc, phyini[i].reg, phyini[i].val);
sys/dev/usb/wlan/if_zyd.c
1734
uint16_t val;
sys/dev/usb/wlan/if_zyd.c
1763
zyd_write16_m(sc, phyp->reg, phyp->val);
sys/dev/usb/wlan/if_zyd.c
1765
zyd_read16_m(sc, ZYD_EEPROM_PHY_REG, &val);
sys/dev/usb/wlan/if_zyd.c
1766
zyd_write32_m(sc, ZYD_CR157, val >> 8);
sys/dev/usb/wlan/if_zyd.c
1864
uint16_t val;
sys/dev/usb/wlan/if_zyd.c
1869
zyd_read16_m(sc, ZYD_EEPROM_PWR_CAL + i, &val);
sys/dev/usb/wlan/if_zyd.c
1870
sc->sc_pwrcal[i * 2] = val >> 8;
sys/dev/usb/wlan/if_zyd.c
1871
sc->sc_pwrcal[i * 2 + 1] = val & 0xff;
sys/dev/usb/wlan/if_zyd.c
1872
zyd_read16_m(sc, ZYD_EEPROM_PWR_INT + i, &val);
sys/dev/usb/wlan/if_zyd.c
1873
sc->sc_pwrint[i * 2] = val >> 8;
sys/dev/usb/wlan/if_zyd.c
1874
sc->sc_pwrint[i * 2 + 1] = val & 0xff;
sys/dev/usb/wlan/if_zyd.c
1875
zyd_read16_m(sc, ZYD_EEPROM_36M_CAL + i, &val);
sys/dev/usb/wlan/if_zyd.c
1876
sc->sc_ofdm36_cal[i * 2] = val >> 8;
sys/dev/usb/wlan/if_zyd.c
1877
sc->sc_ofdm36_cal[i * 2 + 1] = val & 0xff;
sys/dev/usb/wlan/if_zyd.c
1878
zyd_read16_m(sc, ZYD_EEPROM_48M_CAL + i, &val);
sys/dev/usb/wlan/if_zyd.c
1879
sc->sc_ofdm48_cal[i * 2] = val >> 8;
sys/dev/usb/wlan/if_zyd.c
1880
sc->sc_ofdm48_cal[i * 2 + 1] = val & 0xff;
sys/dev/usb/wlan/if_zyd.c
1881
zyd_read16_m(sc, ZYD_EEPROM_54M_CAL + i, &val);
sys/dev/usb/wlan/if_zyd.c
1882
sc->sc_ofdm54_cal[i * 2] = val >> 8;
sys/dev/usb/wlan/if_zyd.c
1883
sc->sc_ofdm54_cal[i * 2 + 1] = val & 0xff;
sys/dev/usb/wlan/if_zyd.c
2121
uint32_t val;
sys/dev/usb/wlan/if_zyd.c
2123
zyd_read32_m(sc, ZYD_CR_ATIM_WND_PERIOD, &val);
sys/dev/usb/wlan/if_zyd.c
2124
sc->sc_atim_wnd = val;
sys/dev/usb/wlan/if_zyd.c
2125
zyd_read32_m(sc, ZYD_CR_PRE_TBTT, &val);
sys/dev/usb/wlan/if_zyd.c
2126
sc->sc_pre_tbtt = val;
sys/dev/usb/wlan/if_zyd.c
2655
uint32_t val;
sys/dev/usb/wlan/if_zyd.c
2691
zyd_read32_m(sc, ZYD_EEPROM_SUBID, &val);
sys/dev/usb/wlan/if_zyd.c
2692
sc->sc_regdomain = val >> 16;
sys/dev/usb/wlan/if_zyd.c
292
#define zyd_read16_m(sc, val, data) do { \
sys/dev/usb/wlan/if_zyd.c
293
error = zyd_read16(sc, val, data); \
sys/dev/usb/wlan/if_zyd.c
297
#define zyd_write16_m(sc, val, data) do { \
sys/dev/usb/wlan/if_zyd.c
298
error = zyd_write16(sc, val, data); \
sys/dev/usb/wlan/if_zyd.c
302
#define zyd_read32_m(sc, val, data) do { \
sys/dev/usb/wlan/if_zyd.c
303
error = zyd_read32(sc, val, data); \
sys/dev/usb/wlan/if_zyd.c
307
#define zyd_write32_m(sc, val, data) do { \
sys/dev/usb/wlan/if_zyd.c
308
error = zyd_write32(sc, val, data); \
sys/dev/usb/wlan/if_zyd.c
837
zyd_read16(struct zyd_softc *sc, uint16_t reg, uint16_t *val)
sys/dev/usb/wlan/if_zyd.c
846
*val = le16toh(tmp.val);
sys/dev/usb/wlan/if_zyd.c
851
zyd_read32(struct zyd_softc *sc, uint16_t reg, uint32_t *val)
sys/dev/usb/wlan/if_zyd.c
862
*val = le16toh(tmp[0].val) << 16 | le16toh(tmp[1].val);
sys/dev/usb/wlan/if_zyd.c
867
zyd_write16(struct zyd_softc *sc, uint16_t reg, uint16_t val)
sys/dev/usb/wlan/if_zyd.c
872
pair.val = htole16(val);
sys/dev/usb/wlan/if_zyd.c
878
zyd_write32(struct zyd_softc *sc, uint16_t reg, uint32_t val)
sys/dev/usb/wlan/if_zyd.c
883
pair[0].val = htole16(val >> 16);
sys/dev/usb/wlan/if_zyd.c
885
pair[1].val = htole16(val & 0xffff);
sys/dev/usb/wlan/if_zyd.c
891
zyd_rfwrite(struct zyd_softc *sc, uint32_t val)
sys/dev/usb/wlan/if_zyd.c
905
if (val & (1 << (rf->width - 1 - i)))
sys/dev/usb/wlan/if_zyd.c
914
zyd_rfwrite_cr(struct zyd_softc *sc, uint32_t val)
sys/dev/usb/wlan/if_zyd.c
918
zyd_write16_m(sc, ZYD_CR244, (val >> 16) & 0xff);
sys/dev/usb/wlan/if_zyd.c
919
zyd_write16_m(sc, ZYD_CR243, (val >> 8) & 0xff);
sys/dev/usb/wlan/if_zyd.c
920
zyd_write16_m(sc, ZYD_CR242, (val >> 0) & 0xff);
sys/dev/usb/wlan/if_zyd.c
964
zyd_write16_m(sc, phyini[i].reg, phyini[i].val);
sys/dev/usb/wlan/if_zydreg.h
1118
uint16_t val;
sys/dev/usb/wlan/if_zydreg.h
1156
uint8_t val;
sys/dev/usb/wlan/if_zydreg.h
1161
uint32_t val;
sys/dev/vge/if_vge.c
2617
uint32_t mib[VGE_MIB_CNT], val;
sys/dev/vge/if_vge.c
2644
val = CSR_READ_4(sc, VGE_MIBDATA);
sys/dev/vge/if_vge.c
2645
if (i != VGE_MIB_DATA_IDX(val)) {
sys/dev/vge/if_vge.c
2649
mib[i] = val & VGE_MIB_DATA_MASK;
sys/dev/vge/if_vge.c
2826
uint8_t val;
sys/dev/vge/if_vge.c
2848
val = 0;
sys/dev/vge/if_vge.c
2850
val |= VGE_WOLCR1_UCAST;
sys/dev/vge/if_vge.c
2852
val |= VGE_WOLCR1_MAGIC;
sys/dev/vge/if_vge.c
2853
CSR_WRITE_1(sc, VGE_WOLCR1S, val);
sys/dev/vge/if_vge.c
2854
val = 0;
sys/dev/vge/if_vge.c
2856
val |= VGE_WOLCFG_SAM | VGE_WOLCFG_SAB;
sys/dev/vge/if_vge.c
2857
CSR_WRITE_1(sc, VGE_WOLCFGS, val | VGE_WOLCFG_PMEOVR);
sys/dev/vge/if_vge.c
2869
val = CSR_READ_1(sc, VGE_PWRSTAT);
sys/dev/vge/if_vge.c
2870
val |= VGE_STICKHW_SWPTAG;
sys/dev/vge/if_vge.c
2871
CSR_WRITE_1(sc, VGE_PWRSTAT, val);
sys/dev/vge/if_vge.c
2873
val = CSR_READ_1(sc, VGE_PWRSTAT);
sys/dev/vge/if_vge.c
2874
val |= VGE_STICKHW_DS0 | VGE_STICKHW_DS1;
sys/dev/vge/if_vge.c
2875
CSR_WRITE_1(sc, VGE_PWRSTAT, val);
sys/dev/vge/if_vge.c
2884
uint8_t val;
sys/dev/vge/if_vge.c
2886
val = CSR_READ_1(sc, VGE_PWRSTAT);
sys/dev/vge/if_vge.c
2887
val &= ~VGE_STICKHW_SWPTAG;
sys/dev/vge/if_vge.c
2888
CSR_WRITE_1(sc, VGE_PWRSTAT, val);
sys/dev/vge/if_vge.c
2890
val = CSR_READ_1(sc, VGE_PWRSTAT);
sys/dev/vge/if_vge.c
2891
val &= ~(VGE_STICKHW_DS0 | VGE_STICKHW_DS1);
sys/dev/vge/if_vge.c
2892
CSR_WRITE_1(sc, VGE_PWRSTAT, val);
sys/dev/vge/if_vgevar.h
214
#define CSR_WRITE_STREAM_4(sc, reg, val) \
sys/dev/vge/if_vgevar.h
215
bus_write_stream_4(sc->vge_res, reg, val)
sys/dev/vge/if_vgevar.h
216
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/vge/if_vgevar.h
217
bus_write_4(sc->vge_res, reg, val)
sys/dev/vge/if_vgevar.h
218
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/vge/if_vgevar.h
219
bus_write_2(sc->vge_res, reg, val)
sys/dev/vge/if_vgevar.h
220
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/vge/if_vgevar.h
221
bus_write_1(sc->vge_res, reg, val)
sys/dev/viapm/viapm.c
483
u_char val;
sys/dev/viapm/viapm.c
486
val = VIAPM_INB(GPIO_VAL);
sys/dev/viapm/viapm.c
489
val |= VIAPM_SCL;
sys/dev/viapm/viapm.c
491
val &= ~VIAPM_SCL;
sys/dev/viapm/viapm.c
493
VIAPM_OUTB(GPIO_VAL, val);
sys/dev/viapm/viapm.c
503
u_char val;
sys/dev/viapm/viapm.c
506
val = VIAPM_INB(GPIO_VAL);
sys/dev/viapm/viapm.c
509
val |= VIAPM_SDA;
sys/dev/viapm/viapm.c
511
val &= ~VIAPM_SDA;
sys/dev/viapm/viapm.c
513
VIAPM_OUTB(GPIO_VAL, val);
sys/dev/viapm/viapm.c
533
u_char val;
sys/dev/viapm/viapm.c
536
val = VIAPM_INB(EXTSMI_VAL);
sys/dev/viapm/viapm.c
538
return ((val & VIAPM_SCL) != 0);
sys/dev/viapm/viapm.c
545
u_char val;
sys/dev/viapm/viapm.c
548
val = VIAPM_INB(EXTSMI_VAL);
sys/dev/viapm/viapm.c
550
return ((val & VIAPM_SDA) != 0);
sys/dev/viapm/viapm.c
76
#define VIAPM_OUTB(port,val) \
sys/dev/viapm/viapm.c
77
(bus_write_1(viapm->iores, port, (u_char)(val)))
sys/dev/viawd/viawd.c
46
#define viawd_write_4(sc, off, val) \
sys/dev/viawd/viawd.c
47
bus_write_4((sc)->wd_res, (off), (val))
sys/dev/videomode/vesagtf.c
193
print_value(int n, const char *name, unsigned val)
sys/dev/videomode/vesagtf.c
195
printf("%2d: %-27s: %u\n", n, name, val);
sys/dev/videomode/vesagtf.c
198
#define print_value(n, name, val)
sys/dev/virtio/balloon/virtio_balloon.h
85
uint64_t val;
sys/dev/virtio/mmio/virtio_mmio_cmdline.c
123
char * val;
sys/dev/virtio/mmio/virtio_mmio_cmdline.c
126
if ((val = kern_getenv("virtio_mmio.device")) == NULL)
sys/dev/virtio/mmio/virtio_mmio_cmdline.c
128
parsearg(driver, parent, val);
sys/dev/virtio/mmio/virtio_mmio_cmdline.c
129
freeenv(val);
sys/dev/virtio/mmio/virtio_mmio_cmdline.c
134
if ((val = kern_getenv(name)) == NULL)
sys/dev/virtio/mmio/virtio_mmio_cmdline.c
136
parsearg(driver, parent, val);
sys/dev/virtio/mmio/virtio_mmio_cmdline.c
137
freeenv(val);
sys/dev/virtio/pci/virtio_pci_modern.c
1328
uint8_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1330
bus_write_1(&sc->vtpci_common_res_map.vtrm_map, off, val);
sys/dev/virtio/pci/virtio_pci_modern.c
1335
uint16_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1338
off, virtio_gtoh16(true, val));
sys/dev/virtio/pci/virtio_pci_modern.c
1343
uint32_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1346
off, virtio_gtoh32(true, val));
sys/dev/virtio/pci/virtio_pci_modern.c
1351
uint64_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1355
val0 = (uint32_t) val;
sys/dev/virtio/pci/virtio_pci_modern.c
1356
val1 = val >> 32;
sys/dev/virtio/pci/virtio_pci_modern.c
1364
uint16_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1366
bus_write_2(&sc->vtpci_notify_res_map.vtrm_map, off, val);
sys/dev/virtio/pci/virtio_pci_modern.c
1417
uint8_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1419
bus_write_1(&sc->vtpci_device_res_map.vtrm_map, off, val);
sys/dev/virtio/pci/virtio_pci_modern.c
1424
uint16_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1426
bus_write_2(&sc->vtpci_device_res_map.vtrm_map, off, val);
sys/dev/virtio/pci/virtio_pci_modern.c
1431
uint32_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1433
bus_write_4(&sc->vtpci_device_res_map.vtrm_map, off, val);
sys/dev/virtio/pci/virtio_pci_modern.c
1438
uint64_t val)
sys/dev/virtio/pci/virtio_pci_modern.c
1442
val0 = (uint32_t) val;
sys/dev/virtio/pci/virtio_pci_modern.c
1443
val1 = val >> 32;
sys/dev/virtio/pci/virtio_pci_modern.c
703
uint16_t val = virtio_gtoh16(true, *(const uint16_t *) src);
sys/dev/virtio/pci/virtio_pci_modern.c
704
vtpci_modern_write_device_2(sc, offset, val);
sys/dev/virtio/pci/virtio_pci_modern.c
708
uint32_t val = virtio_gtoh32(true, *(const uint32_t *) src);
sys/dev/virtio/pci/virtio_pci_modern.c
709
vtpci_modern_write_device_4(sc, offset, val);
sys/dev/virtio/pci/virtio_pci_modern.c
713
uint64_t val = virtio_gtoh64(true, *(const uint64_t *) src);
sys/dev/virtio/pci/virtio_pci_modern.c
714
vtpci_modern_write_device_8(sc, offset, val);
sys/dev/virtio/pci/virtio_pci_modern.c
984
uint32_t val;
sys/dev/virtio/pci/virtio_pci_modern.c
990
val = pci_read_config(sc->vtpci_dev, PCIR_BAR(bar), 4);
sys/dev/virtio/pci/virtio_pci_modern.c
991
if (PCI_BAR_IO(val))
sys/dev/virtio/virtio.c
111
virtio_feature_name(uint64_t val, struct virtio_feature_desc *desc)
sys/dev/virtio/virtio.c
122
if (val == descs[i][j].vfd_val)
sys/dev/virtio/virtio.c
135
uint64_t val;
sys/dev/virtio/virtio.c
140
for (n = 0, val = 1ULL << 63; val != 0; val >>= 1) {
sys/dev/virtio/virtio.c
145
if (((features & val) == 0) || val == VIRTIO_F_BAD_FEATURE)
sys/dev/virtio/virtio.c
153
name = virtio_feature_name(val, desc);
sys/dev/virtio/virtio.c
155
sbuf_printf(sb, "%#jx", (uintmax_t) val);
sys/dev/virtio/virtio.c
243
virtio_read_ivar(device_t dev, int ivar, uintptr_t *val)
sys/dev/virtio/virtio.c
246
*val = -1;
sys/dev/virtio/virtio.c
247
BUS_READ_IVAR(device_get_parent(dev), dev, ivar, val);
sys/dev/virtio/virtio.c
251
virtio_write_ivar(device_t dev, int ivar, uintptr_t val)
sys/dev/virtio/virtio.c
254
BUS_WRITE_IVAR(device_get_parent(dev), dev, ivar, val);
sys/dev/virtio/virtio.h
104
void virtio_read_ivar(device_t dev, int ivar, uintptr_t *val);
sys/dev/virtio/virtio.h
105
void virtio_write_ivar(device_t dev, int ivar, uintptr_t val);
sys/dev/virtio/virtio.h
134
type val; \
sys/dev/virtio/virtio.h
135
virtio_read_device_config(dev, offset, &val, sizeof(type)); \
sys/dev/virtio/virtio.h
136
return (val); \
sys/dev/virtio/virtio.h
141
bus_size_t offset, type val) \
sys/dev/virtio/virtio.h
143
virtio_write_device_config(dev, offset, &val, sizeof(type)); \
sys/dev/virtio/virtio.h
156
uintptr_t val; \
sys/dev/virtio/virtio.h
157
virtio_read_ivar(dev, ivar, &val); \
sys/dev/virtio/virtio.h
158
return ((int) val); \
sys/dev/virtio/virtio.h
172
__CONCAT(virtio_set_,name)(device_t dev, void *val) \
sys/dev/virtio/virtio.h
174
virtio_write_ivar(dev, ivar, (uintptr_t) val); \
sys/dev/virtio/virtio_endian.h
44
virtio_htog16(bool modern, uint16_t val)
sys/dev/virtio/virtio_endian.h
47
return (le16toh(val));
sys/dev/virtio/virtio_endian.h
49
return (val);
sys/dev/virtio/virtio_endian.h
53
virtio_gtoh16(bool modern, uint16_t val)
sys/dev/virtio/virtio_endian.h
56
return (htole16(val));
sys/dev/virtio/virtio_endian.h
58
return (val);
sys/dev/virtio/virtio_endian.h
62
virtio_htog32(bool modern, uint32_t val)
sys/dev/virtio/virtio_endian.h
65
return (le32toh(val));
sys/dev/virtio/virtio_endian.h
67
return (val);
sys/dev/virtio/virtio_endian.h
71
virtio_gtoh32(bool modern, uint32_t val)
sys/dev/virtio/virtio_endian.h
74
return (htole32(val));
sys/dev/virtio/virtio_endian.h
76
return (val);
sys/dev/virtio/virtio_endian.h
80
virtio_htog64(bool modern, uint64_t val)
sys/dev/virtio/virtio_endian.h
83
return (le64toh(val));
sys/dev/virtio/virtio_endian.h
85
return (val);
sys/dev/virtio/virtio_endian.h
89
virtio_gtoh64(bool modern, uint64_t val)
sys/dev/virtio/virtio_endian.h
92
return (htole64(val));
sys/dev/virtio/virtio_endian.h
94
return (val);
sys/dev/vmd/vmd.c
200
uint32_t val, int width)
sys/dev/vmd/vmd.c
213
return (bus_write_4(sc->vmd_regs_res[0], offset, val));
sys/dev/vmd/vmd.c
215
return (bus_write_2(sc->vmd_regs_res[0], offset, val));
sys/dev/vmd/vmd.c
217
return (bus_write_1(sc->vmd_regs_res[0], offset, val));
sys/dev/vmd/vmd.c
226
uint16_t val;
sys/dev/vmd/vmd.c
228
val = pci_read_config(dev, VMD_CONFIG, 2);
sys/dev/vmd/vmd.c
230
val |= VMD_BYPASS_MSI;
sys/dev/vmd/vmd.c
232
val &= ~VMD_BYPASS_MSI;
sys/dev/vmd/vmd.c
233
pci_write_config(dev, VMD_CONFIG, val, 2);
sys/dev/vmm/vmm_stat.h
107
uint64_t val)
sys/dev/vmm/vmm_stat.h
115
stats[vst->index + statidx] = val;
sys/dev/vmm/vmm_stat.h
129
vmm_stat_set(struct vcpu *vcpu, struct vmm_stat_type *vst, uint64_t val)
sys/dev/vmm/vmm_stat.h
133
vmm_stat_array_set(vcpu, vst, 0, val);
sys/dev/vmware/pvscsi/pvscsi.c
1120
uint32_t val;
sys/dev/vmware/pvscsi/pvscsi.c
1124
val = pvscsi_read_intr_status(sc);
sys/dev/vmware/pvscsi/pvscsi.c
1126
if ((val & PVSCSI_INTR_ALL_SUPPORTED) != 0) {
sys/dev/vmware/pvscsi/pvscsi.c
1127
pvscsi_write_intr_status(sc, val & PVSCSI_INTR_ALL_SUPPORTED);
sys/dev/vmware/pvscsi/pvscsi.c
260
pvscsi_reg_write(struct pvscsi_softc *sc, uint32_t offset, uint32_t val)
sys/dev/vmware/pvscsi/pvscsi.c
263
bus_write_4(sc->mm_res, offset, val);
sys/dev/vmware/pvscsi/pvscsi.c
274
pvscsi_write_intr_status(struct pvscsi_softc *sc, uint32_t val)
sys/dev/vmware/pvscsi/pvscsi.c
277
pvscsi_reg_write(sc, PVSCSI_REG_OFFSET_INTR_STATUS, val);
sys/dev/vmware/pvscsi/pvscsi.c
60
uint32_t val);
sys/dev/vmware/pvscsi/pvscsi.c
63
uint32_t val);
sys/dev/vmware/pvscsi/pvscsi.c
745
uint32_t val __unused;
sys/dev/vmware/pvscsi/pvscsi.c
750
val = pvscsi_read_intr_status(sc);
sys/dev/vmware/pvscsi/pvscsi.c
752
DEBUG_PRINTF(2, sc->dev, "adapter reset done: %u\n", val);
sys/dev/vmware/vmci/vmci_defs.h
416
type_safe_atomic_write_32(void *var, uint32_t val)
sys/dev/vmware/vmci/vmci_defs.h
418
atomic_store_32((volatile uint32_t *)(var), (uint32_t)(val));
sys/dev/vmware/vmxnet3/if_vmx.c
320
trunc_powerof2(int val)
sys/dev/vmware/vmxnet3/if_vmx.c
323
return (1U << (fls(val) - 1));
sys/dev/vnic/nic_main.c
370
uint64_t val)
sys/dev/vnic/nic_main.c
373
bus_write_8(nic->reg_base, offset, val);
sys/dev/vnic/nic_main.c
379
uint64_t val;
sys/dev/vnic/nic_main.c
381
val = bus_read_8(nic->reg_base, offset);
sys/dev/vnic/nic_main.c
382
return (val);
sys/dev/vnic/nicvf_main.c
795
nicvf_reg_write(struct nicvf *nic, bus_space_handle_t offset, uint64_t val)
sys/dev/vnic/nicvf_main.c
798
bus_write_8(nic->reg_base, offset, val);
sys/dev/vnic/nicvf_main.c
810
uint64_t qidx, uint64_t val)
sys/dev/vnic/nicvf_main.c
813
bus_write_8(nic->reg_base, offset + (qidx << NIC_Q_NUM_SHIFT), val);
sys/dev/vnic/nicvf_queues.c
123
uint64_t reg, int bit_pos, int bits, int val)
sys/dev/vnic/nicvf_queues.c
134
if (((reg_val & bit_mask) >> bit_pos) == val)
sys/dev/vnic/thunder_bgx.c
224
bgx_reg_write(struct bgx *bgx, uint8_t lmac, uint64_t offset, uint64_t val)
sys/dev/vnic/thunder_bgx.c
230
bus_write_8(bgx->reg_base, addr, val);
sys/dev/vnic/thunder_bgx.c
234
bgx_reg_modify(struct bgx *bgx, uint8_t lmac, uint64_t offset, uint64_t val)
sys/dev/vnic/thunder_bgx.c
240
bus_write_8(bgx->reg_base, addr, val | bus_read_8(bgx->reg_base, addr));
sys/dev/vnic/thunder_mdio.c
144
#define mdio_reg_write(sc, reg, val) \
sys/dev/vnic/thunder_mdio.c
145
bus_write_8((sc)->reg_base, (reg), (val))
sys/dev/vr/if_vrreg.h
749
#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->vr_res, reg, val)
sys/dev/vr/if_vrreg.h
750
#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val)
sys/dev/vr/if_vrreg.h
751
#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val)
sys/dev/vt/hw/vga/vt_vga.c
66
#define MEM_WRITE1(sc, ofs, val) \
sys/dev/vt/hw/vga/vt_vga.c
67
bus_space_write_1(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val)
sys/dev/vt/hw/vga/vt_vga.c
68
#define MEM_WRITE2(sc, ofs, val) \
sys/dev/vt/hw/vga/vt_vga.c
69
bus_space_write_2(sc->vga_fb_tag, sc->vga_fb_handle, ofs, val)
sys/dev/vt/hw/vga/vt_vga.c
72
#define REG_WRITE1(sc, reg, val) \
sys/dev/vt/hw/vga/vt_vga.c
73
bus_space_write_1(sc->vga_reg_tag, sc->vga_reg_handle, reg, val)
sys/dev/vte/if_vte.c
192
vte_miibus_writereg(device_t dev, int phy, int reg, int val)
sys/dev/vte/if_vte.c
199
CSR_WRITE_2(sc, VTE_MMWD, val);
sys/dev/vte/if_vte.c
220
uint16_t val;
sys/dev/vte/if_vte.c
251
val = 18 << VTE_IM_TIMER_SHIFT;
sys/dev/vte/if_vte.c
253
val = 1 << VTE_IM_TIMER_SHIFT;
sys/dev/vte/if_vte.c
254
val |= sc->vte_int_rx_mod << VTE_IM_BUNDLE_SHIFT;
sys/dev/vte/if_vte.c
256
CSR_WRITE_2(sc, VTE_MRICR, val);
sys/dev/vte/if_vte.c
259
val = 18 << VTE_IM_TIMER_SHIFT;
sys/dev/vte/if_vte.c
261
val = 1 << VTE_IM_TIMER_SHIFT;
sys/dev/vte/if_vte.c
262
val |= sc->vte_int_tx_mod << VTE_IM_BUNDLE_SHIFT;
sys/dev/vte/if_vte.c
264
CSR_WRITE_2(sc, VTE_MTICR, val);
sys/dev/vte/if_vtevar.h
149
#define CSR_WRITE_2(_sc, reg, val) \
sys/dev/vte/if_vtevar.h
150
bus_write_2((_sc)->vte_res, (reg), (val))
sys/dev/wbwd/wbwd.c
295
int error, val;
sys/dev/wbwd/wbwd.c
300
val = sc->test_nmi;
sys/dev/wbwd/wbwd.c
302
val = 0;
sys/dev/wbwd/wbwd.c
304
error = sysctl_handle_int(oidp, &val, 0, req);
sys/dev/wbwd/wbwd.c
312
if (test && val == 0) {
sys/dev/wdatwd/wdatwd.c
127
wdatwd_action(const struct wdatwd_softc *sc, const u_int action, const uint64_t val, uint64_t *ret)
sys/dev/wdatwd/wdatwd.c
185
x = val & wdat->entry.Mask;
sys/dev/wg/if_wg.c
802
static int wg_socket_set_sockopt(struct socket *so4, struct socket *so6, int name, void *val, size_t len)
sys/dev/wg/if_wg.c
809
.sopt_val = val,
sys/dev/wpi/if_wpi.c
3618
uint64_t val, mod;
sys/dev/wpi/if_wpi.c
3628
val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
sys/dev/wpi/if_wpi.c
3629
mod = le64toh(cmd.tstamp) % val;
sys/dev/wpi/if_wpi.c
3630
cmd.binitval = htole32((uint32_t)(val - mod));
sys/dev/wpi/if_wpi.c
3633
ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
sys/dev/wpi/if_wpi.c
857
uint32_t val;
sys/dev/wpi/if_wpi.c
868
val = WPI_READ(sc, WPI_EEPROM);
sys/dev/wpi/if_wpi.c
869
if (val & WPI_EEPROM_READ_VALID)
sys/dev/wpi/if_wpi.c
878
*out++= val >> 16;
sys/dev/wpi/if_wpi.c
880
*out ++= val >> 24;
sys/dev/wpi/if_wpireg.h
1013
#define WPI_WRITE(sc, reg, val) \
sys/dev/wpi/if_wpireg.h
1014
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sys/dev/xdma/controller/pl330.c
195
emit_mov(uint8_t *buf, uint32_t reg, uint32_t val)
sys/dev/xdma/controller/pl330.c
200
buf[2] = val;
sys/dev/xdma/controller/pl330.c
201
buf[3] = val >> 8;
sys/dev/xdma/controller/pl330.c
202
buf[4] = val >> 16;
sys/dev/xdma/controller/pl330.c
203
buf[5] = val >> 24;
sys/dev/xen/netfront/netfront.c
2070
int val;
sys/dev/xen/netfront/netfront.c
2075
"feature-sg", NULL, "%d", &val) != 0)
sys/dev/xen/netfront/netfront.c
2076
val = 0;
sys/dev/xen/netfront/netfront.c
2079
if (val) {
sys/dev/xen/netfront/netfront.c
2085
"feature-gso-tcpv4", NULL, "%d", &val) != 0)
sys/dev/xen/netfront/netfront.c
2086
val = 0;
sys/dev/xen/netfront/netfront.c
2089
if (val) {
sys/dev/xen/netfront/netfront.c
2099
"feature-no-csum-offload", NULL, "%d", &val) != 0)
sys/dev/xen/netfront/netfront.c
2100
val = 0;
sys/dev/xen/netfront/netfront.c
2103
if (val) {
sys/dev/xen/xenstore/xenstore.c
1494
char *val;
sys/dev/xen/xenstore/xenstore.c
1496
error = xs_read(t, dir, node, NULL, (void **) &val);
sys/dev/xen/xenstore/xenstore.c
1501
ns = vsscanf(val, fmt, ap);
sys/dev/xen/xenstore/xenstore.c
1503
free(val, M_XENSTORE);
sys/dev/xilinx/if_xae.c
860
xae_miibus_write_reg(device_t dev, int phy, int reg, int val)
sys/dev/xilinx/if_xae.c
874
XAE_WR4(sc, XAE_MDIO_WRITE, val);
sys/dev/xilinx/xlnx_pcib.c
134
uint32_t val, mask, status;
sys/dev/xilinx/xlnx_pcib.c
140
val = bus_read_4(sc->res, XLNX_PCIE_IDR);
sys/dev/xilinx/xlnx_pcib.c
143
status = val & mask;
sys/dev/xilinx/xlnx_pcib.c
198
bus_write_4(sc->res, XLNX_PCIE_IDR, val);
sys/dev/xilinx/xlnx_pcib.c
431
uint32_t val;
sys/dev/xilinx/xlnx_pcib.c
445
val = bus_space_read_4(t, h, XLNX_PCIE_PHYSCR);
sys/dev/xilinx/xlnx_pcib.c
446
if ((val & PHYSCR_LINK_UP) == 0) {
sys/dev/xilinx/xlnx_pcib.c
502
u_int func, u_int reg, uint32_t val, int bytes)
sys/dev/xilinx/xlnx_pcib.c
534
data |= (val & 0xff) << ((offset & 3) * 8);
sys/dev/xilinx/xlnx_pcib.c
540
data |= (val & 0xffff) << ((offset & 3) * 8);
sys/dev/xilinx/xlnx_pcib.c
544
bus_space_write_4(t, h, offset, htole32(val));
sys/dev/xl/if_xl.c
383
uint32_t val;
sys/dev/xl/if_xl.c
388
val = CSR_READ_2(sc, XL_W4_PHY_MGMT);
sys/dev/xl/if_xl.c
392
return (val);
sys/dev/xl/if_xl.c
399
xl_mii_bitbang_write(device_t dev, uint32_t val)
sys/dev/xl/if_xl.c
406
CSR_WRITE_2(sc, XL_W4_PHY_MGMT, val);
sys/dev/xl/if_xlreg.h
651
#define CSR_WRITE_4(sc, reg, val) \
sys/dev/xl/if_xlreg.h
652
bus_space_write_4(sc->xl_btag, sc->xl_bhandle, reg, val)
sys/dev/xl/if_xlreg.h
653
#define CSR_WRITE_2(sc, reg, val) \
sys/dev/xl/if_xlreg.h
654
bus_space_write_2(sc->xl_btag, sc->xl_bhandle, reg, val)
sys/dev/xl/if_xlreg.h
655
#define CSR_WRITE_1(sc, reg, val) \
sys/dev/xl/if_xlreg.h
656
bus_space_write_1(sc->xl_btag, sc->xl_bhandle, reg, val)
sys/fs/autofs/autofs_vnops.c
111
vap->va_fsid = mp->mnt_stat.f_fsid.val[0];
sys/fs/cd9660/cd9660_vfsops.c
386
mp->mnt_stat.f_fsid.val[0] = dev2udev(dev);
sys/fs/cd9660/cd9660_vfsops.c
387
mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;
sys/fs/ext2fs/ext2_alloc.c
527
e2fs_gd_set_nbfree(struct ext2_gd *gd, uint32_t val)
sys/fs/ext2fs/ext2_alloc.c
530
gd->ext2bgd_nbfree = htole16(val & 0xffff);
sys/fs/ext2fs/ext2_alloc.c
531
gd->ext4bgd_nbfree_hi = htole16(val >> 16);
sys/fs/ext2fs/ext2_alloc.c
543
e2fs_gd_set_nifree(struct ext2_gd *gd, uint32_t val)
sys/fs/ext2fs/ext2_alloc.c
546
gd->ext2bgd_nifree = htole16(val & 0xffff);
sys/fs/ext2fs/ext2_alloc.c
547
gd->ext4bgd_nifree_hi = htole16(val >> 16);
sys/fs/ext2fs/ext2_alloc.c
559
e2fs_gd_set_ndirs(struct ext2_gd *gd, uint32_t val)
sys/fs/ext2fs/ext2_alloc.c
562
gd->ext2bgd_ndirs = htole16(val & 0xffff);
sys/fs/ext2fs/ext2_alloc.c
563
gd->ext4bgd_ndirs_hi = htole16(val >> 16);
sys/fs/ext2fs/ext2_alloc.c
574
e2fs_gd_set_i_unused(struct ext2_gd *gd, uint32_t val)
sys/fs/ext2fs/ext2_alloc.c
577
gd->ext4bgd_i_unused = htole16(val & 0xffff);
sys/fs/ext2fs/ext2_alloc.c
578
gd->ext4bgd_i_unused_hi = htole16(val >> 16);
sys/fs/ext2fs/ext2_hash.c
186
int val, i;
sys/fs/ext2fs/ext2_hash.c
190
val = (u_int)*uname++;
sys/fs/ext2fs/ext2_hash.c
192
val = (int)*sname++;
sys/fs/ext2fs/ext2_hash.c
194
h0 = h2 + (h1 ^ (val * multi));
sys/fs/ext2fs/ext2_inode_cnv.c
109
ext2_old_decode_dev(uint16_t val)
sys/fs/ext2fs/ext2_inode_cnv.c
111
return (makedev((val >> 8) & 255, val & 255));
sys/fs/ext2fs/ext2_vfsops.c
955
mp->mnt_stat.f_fsid.val[0] = dev2udev(dev);
sys/fs/ext2fs/ext2_vfsops.c
956
mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;
sys/fs/fuse/fuse_internal.c
328
vp_cache_at->va_fsid = mp->mnt_stat.f_fsid.val[0];
sys/fs/fuse/fuse_node.c
134
int val, error;
sys/fs/fuse/fuse_node.c
136
val = *(int *)arg1;
sys/fs/fuse/fuse_node.c
137
error = sysctl_handle_int(oidp, &val, 0, req);
sys/fs/fuse/fuse_node.c
141
switch (val) {
sys/fs/fuse/fuse_node.c
145
*(int *)arg1 = val;
sys/fs/msdosfs/msdosfs_vfsops.c
854
mp->mnt_stat.f_fsid.val[0] = dev2udev(dev);
sys/fs/msdosfs/msdosfs_vfsops.c
855
mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;
sys/fs/nfs/nfs_commonsubs.c
1622
vp->v_mount->mnt_stat.f_fsid.val[0] ||
sys/fs/nfs/nfs_commonsubs.c
1624
vp->v_mount->mnt_stat.f_fsid.val[1])
sys/fs/nfs/nfs_commonsubs.c
3077
*tl++ = txdr_unsigned(fsidp->val[0]);
sys/fs/nfs/nfs_commonsubs.c
3079
*tl = txdr_unsigned(fsidp->val[1]);
sys/fs/nfs/nfs_commonsubs.c
4796
u_int32_t val = 0x0;
sys/fs/nfs/nfs_commonsubs.c
4822
val <<= 6;
sys/fs/nfs/nfs_commonsubs.c
4823
val |= (*cp & 0x3f);
sys/fs/nfs/nfs_commonsubs.c
4825
if (cnt == 0 && (val >> shift) == 0x0) {
sys/fs/nfs/nfs_commonsubs.c
4840
val = (*cp & (0x3f >> cnt));
sys/fs/nfs/nfs_commonsubs.c
4842
if (cnt == 2 && val == 0xd)
sys/fs/nfs/nfsclstate.h
441
nfsfldi_setstripeindex(struct nfscldevinfo *ndi, int pos, uint8_t val)
sys/fs/nfs/nfsclstate.h
449
*valp = val;
sys/fs/nfsclient/nfs_clvfsops.c
2078
val = (nmp->nm_flag & NFSMNT_NOLOCKS) ? 1 : 0;
sys/fs/nfsclient/nfs_clvfsops.c
2080
error = SYSCTL_OUT(req, &val, sizeof(val));
sys/fs/nfsclient/nfs_clvfsops.c
2085
error = SYSCTL_IN(req, &val, sizeof(val));
sys/fs/nfsclient/nfs_clvfsops.c
2088
if (val)
sys/fs/nfsserver/nfs_nfsdsocket.c
836
save_fsid.val[0] = save_fsid.val[1] = 0;
sys/fs/nfsserver/nfs_nfsdsocket.c
837
cur_fsid.val[0] = cur_fsid.val[1] = 0;
sys/fs/nfsserver/nfs_nfsdsubs.c
1948
char *fromcp, *tocp, val = '\0';
sys/fs/nfsserver/nfs_nfsdsubs.c
2059
val = (digit << 4);
sys/fs/nfsserver/nfs_nfsdsubs.c
2062
val += digit;
sys/fs/nfsserver/nfs_nfsdsubs.c
2064
*tocp++ = val;
sys/fs/nfsserver/nfs_nfsdsubs.c
2065
hash += ((u_char)val);
sys/fs/nullfs/null_vnops.c
584
ap->a_sb->st_dev = ap->a_vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/nullfs/null_vnops.c
596
ap->a_vap->va_fsid = ap->a_vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/p9fs/p9_protocol.c
115
int8_t *val = va_arg(ap, int8_t *);
sys/fs/p9fs/p9_protocol.c
117
if (buf_read(buf, val, sizeof(*val)))
sys/fs/p9fs/p9_protocol.c
123
int16_t *val = va_arg(ap, int16_t *);
sys/fs/p9fs/p9_protocol.c
125
if (buf_read(buf, val, sizeof(*val)))
sys/fs/p9fs/p9_protocol.c
131
int32_t *val = va_arg(ap, int32_t *);
sys/fs/p9fs/p9_protocol.c
133
if (buf_read(buf, val, sizeof(*val)))
sys/fs/p9fs/p9_protocol.c
139
int64_t *val = va_arg(ap, int64_t *);
sys/fs/p9fs/p9_protocol.c
141
if (buf_read(buf, val, sizeof(*val)))
sys/fs/p9fs/p9_protocol.c
169
uid_t *val = va_arg(ap, uid_t *);
sys/fs/p9fs/p9_protocol.c
171
if (buf_read(buf, val, sizeof(*val)))
sys/fs/p9fs/p9_protocol.c
178
gid_t *val = va_arg(ap, gid_t *);
sys/fs/p9fs/p9_protocol.c
180
if (buf_read(buf, val, sizeof(*val)))
sys/fs/p9fs/p9_protocol.c
343
int8_t val = va_arg(ap, int);
sys/fs/p9fs/p9_protocol.c
345
if (buf_write(buf, &val, sizeof(val)))
sys/fs/p9fs/p9_protocol.c
351
int16_t val = va_arg(ap, int);
sys/fs/p9fs/p9_protocol.c
353
if (buf_write(buf, &val, sizeof(val)))
sys/fs/p9fs/p9_protocol.c
359
int32_t val = va_arg(ap, int32_t);
sys/fs/p9fs/p9_protocol.c
361
if (buf_write(buf, &val, sizeof(val)))
sys/fs/p9fs/p9_protocol.c
367
int64_t val = va_arg(ap, int64_t);
sys/fs/p9fs/p9_protocol.c
369
if (buf_write(buf, &val, sizeof(val)))
sys/fs/p9fs/p9_protocol.c
389
uid_t val = va_arg(ap, uid_t);
sys/fs/p9fs/p9_protocol.c
391
if (buf_write(buf, &val, sizeof(val)))
sys/fs/p9fs/p9_protocol.c
398
gid_t val = va_arg(ap, gid_t);
sys/fs/p9fs/p9_protocol.c
400
if (buf_write(buf, &val, sizeof(val)))
sys/fs/p9fs/p9fs_vnops.c
910
vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/pseudofs/pseudofs_vnops.c
232
vap->va_fsid = vn->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/smbfs/smbfs_node.c
376
va->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/tarfs/tarfs_io.c
298
vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/tarfs/tarfs_vfsops.c
125
int64_t val;
sys/fs/tarfs/tarfs_vfsops.c
137
val = 0;
sys/fs/tarfs/tarfs_vfsops.c
141
val <<= 3;
sys/fs/tarfs/tarfs_vfsops.c
142
val += strp[idx] - '0';
sys/fs/tarfs/tarfs_vfsops.c
143
if (val > INT64_MAX / 8)
sys/fs/tarfs/tarfs_vfsops.c
147
*num = val * sign;
sys/fs/tarfs/tarfs_vfsops.c
160
int64_t val;
sys/fs/tarfs/tarfs_vfsops.c
167
val = (int64_t)-1;
sys/fs/tarfs/tarfs_vfsops.c
169
val = 0;
sys/fs/tarfs/tarfs_vfsops.c
170
val <<= 6;
sys/fs/tarfs/tarfs_vfsops.c
171
val |= (strp[0] & 0x3f);
sys/fs/tarfs/tarfs_vfsops.c
175
val <<= 8;
sys/fs/tarfs/tarfs_vfsops.c
176
val |= (0xff & (int64_t)strp[idx]);
sys/fs/tarfs/tarfs_vfsops.c
177
if (val > INT64_MAX / 256 || val < INT64_MIN / 256)
sys/fs/tarfs/tarfs_vfsops.c
181
*num = val;
sys/fs/tarfs/tarfs_vnops.c
201
vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/tmpfs/tmpfs_vnops.c
458
sb->st_dev = vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/tmpfs/tmpfs_vnops.c
512
vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/udf/udf_vfsops.c
342
mp->mnt_stat.f_fsid.val[0] = dev2udev(devvp->v_rdev);
sys/fs/udf/udf_vfsops.c
343
mp->mnt_stat.f_fsid.val[1] = mp->mnt_vfc->vfc_typenum;
sys/fs/unionfs/union_vnops.c
1050
ap->a_vp->v_mount->mnt_stat.f_fsid.val[0];
sys/fs/unionfs/union_vnops.c
1073
ap->a_vap->va_fsid = ap->a_vp->v_mount->mnt_stat.f_fsid.val[0];
sys/gdb/gdb_main.c
807
char *val;
sys/gdb/gdb_main.c
811
val = gdb_rxp;
sys/gdb/gdb_main.c
812
if (!gdb_rx_mem(val, gdb_cpu_regsz(r))) {
sys/gdb/gdb_main.c
817
gdb_cpu_setreg(r, val);
sys/gdb/gdb_main.c
887
char *val;
sys/gdb/gdb_main.c
889
val = gdb_rxp;
sys/gdb/gdb_main.c
891
!gdb_rx_mem(val, gdb_cpu_regsz(reg))) {
sys/gdb/gdb_main.c
895
gdb_cpu_setreg(reg, val);
sys/geom/cache/g_cache.c
70
u_int val = *(u_int *)arg1;
sys/geom/cache/g_cache.c
73
error = sysctl_handle_int(oidp, &val, 0, req);
sys/geom/cache/g_cache.c
76
if (val > 100)
sys/geom/cache/g_cache.c
78
if ((arg1 == &g_cache_used_lo && val > g_cache_used_hi) ||
sys/geom/cache/g_cache.c
79
(arg1 == &g_cache_used_hi && g_cache_used_lo > val))
sys/geom/cache/g_cache.c
81
*(u_int *)arg1 = val;
sys/geom/concat/g_concat.c
219
int val;
sys/geom/concat/g_concat.c
227
val = disk != NULL;
sys/geom/concat/g_concat.c
228
g_handleattr(bp, "GEOM::candelete", &val, sizeof(val));
sys/geom/geom.h
286
int g_handleattr(struct bio *bp, const char *attribute, const void *val,
sys/geom/geom.h
288
int g_handleattr_int(struct bio *bp, const char *attribute, int val);
sys/geom/geom.h
289
int g_handleattr_off_t(struct bio *bp, const char *attribute, off_t val);
sys/geom/geom.h
290
int g_handleattr_uint16_t(struct bio *bp, const char *attribute, uint16_t val);
sys/geom/geom_subr.c
1095
g_handleattr_int(struct bio *bp, const char *attribute, int val)
sys/geom/geom_subr.c
1098
return (g_handleattr(bp, attribute, &val, sizeof(val)));
sys/geom/geom_subr.c
1102
g_handleattr_uint16_t(struct bio *bp, const char *attribute, uint16_t val)
sys/geom/geom_subr.c
1105
return (g_handleattr(bp, attribute, &val, sizeof(val)));
sys/geom/geom_subr.c
1109
g_handleattr_off_t(struct bio *bp, const char *attribute, off_t val)
sys/geom/geom_subr.c
1112
return (g_handleattr(bp, attribute, &val, sizeof(val)));
sys/geom/geom_subr.c
1123
g_handleattr(struct bio *bp, const char *attribute, const void *val, int len)
sys/geom/geom_subr.c
1131
if (strlcpy(bp->bio_data, val, bp->bio_length) >=
sys/geom/geom_subr.c
1135
(intmax_t)bp->bio_length, strlen(val));
sys/geom/geom_subr.c
1139
bcopy(val, bp->bio_data, len);
sys/geom/mirror/g_mirror.c
1110
int val;
sys/geom/mirror/g_mirror.c
1117
val = disk != NULL;
sys/geom/mirror/g_mirror.c
1118
g_handleattr(bp, "GEOM::candelete", &val, sizeof(val));
sys/geom/mirror/g_mirror_ctl.c
374
intmax_t *val;
sys/geom/mirror/g_mirror_ctl.c
404
val = gctl_get_paraml(req, "slice", sizeof(*val));
sys/geom/mirror/g_mirror_ctl.c
405
if (val == NULL) {
sys/geom/mirror/g_mirror_ctl.c
409
md.md_slice = *val;
sys/geom/multipath/g_multipath.c
1110
int *nargs, i, *val;
sys/geom/multipath/g_multipath.c
1139
val = gctl_get_paraml(req, "active_active", sizeof(*val));
sys/geom/multipath/g_multipath.c
1140
if (val != NULL && *val != 0)
sys/geom/multipath/g_multipath.c
1142
val = gctl_get_paraml(req, "active_read", sizeof(*val));
sys/geom/multipath/g_multipath.c
1143
if (val != NULL && *val != 0)
sys/geom/multipath/g_multipath.c
1172
int error, *val;
sys/geom/multipath/g_multipath.c
1187
val = gctl_get_paraml(req, "active_active", sizeof(*val));
sys/geom/multipath/g_multipath.c
1188
if (val != NULL && *val != 0)
sys/geom/multipath/g_multipath.c
1190
val = gctl_get_paraml(req, "active_read", sizeof(*val));
sys/geom/multipath/g_multipath.c
1191
if (val != NULL && *val != 0)
sys/geom/multipath/g_multipath.c
1193
val = gctl_get_paraml(req, "active_passive", sizeof(*val));
sys/geom/multipath/g_multipath.c
1194
if (val != NULL && *val != 0)
sys/geom/nop/g_nop.c
539
intmax_t *val, error, rfailprob, wfailprob, count_until_fail, offset,
sys/geom/nop/g_nop.c
570
val = gctl_get_paraml_opt(req, "error", sizeof(*val));
sys/geom/nop/g_nop.c
571
if (val != NULL) {
sys/geom/nop/g_nop.c
572
error = *val;
sys/geom/nop/g_nop.c
574
val = gctl_get_paraml_opt(req, "rfailprob", sizeof(*val));
sys/geom/nop/g_nop.c
575
if (val != NULL) {
sys/geom/nop/g_nop.c
576
rfailprob = *val;
sys/geom/nop/g_nop.c
582
val = gctl_get_paraml_opt(req, "wfailprob", sizeof(*val));
sys/geom/nop/g_nop.c
583
if (val != NULL) {
sys/geom/nop/g_nop.c
584
wfailprob = *val;
sys/geom/nop/g_nop.c
590
val = gctl_get_paraml_opt(req, "delaymsec", sizeof(*val));
sys/geom/nop/g_nop.c
591
if (val != NULL) {
sys/geom/nop/g_nop.c
592
delaymsec = *val;
sys/geom/nop/g_nop.c
598
val = gctl_get_paraml_opt(req, "rdelayprob", sizeof(*val));
sys/geom/nop/g_nop.c
599
if (val != NULL) {
sys/geom/nop/g_nop.c
600
rdelayprob = *val;
sys/geom/nop/g_nop.c
606
val = gctl_get_paraml_opt(req, "wdelayprob", sizeof(*val));
sys/geom/nop/g_nop.c
607
if (val != NULL) {
sys/geom/nop/g_nop.c
608
wdelayprob = *val;
sys/geom/nop/g_nop.c
614
val = gctl_get_paraml_opt(req, "count_until_fail", sizeof(*val));
sys/geom/nop/g_nop.c
615
if (val != NULL) {
sys/geom/nop/g_nop.c
616
count_until_fail = *val;
sys/geom/nop/g_nop.c
623
val = gctl_get_paraml_opt(req, "offset", sizeof(*val));
sys/geom/nop/g_nop.c
624
if (val != NULL) {
sys/geom/nop/g_nop.c
625
offset = *val;
sys/geom/nop/g_nop.c
631
val = gctl_get_paraml_opt(req, "size", sizeof(*val));
sys/geom/nop/g_nop.c
632
if (val != NULL) {
sys/geom/nop/g_nop.c
633
size = *val;
sys/geom/nop/g_nop.c
639
val = gctl_get_paraml_opt(req, "secsize", sizeof(*val));
sys/geom/nop/g_nop.c
640
if (val != NULL) {
sys/geom/nop/g_nop.c
641
secsize = *val;
sys/geom/nop/g_nop.c
647
val = gctl_get_paraml_opt(req, "stripesize", sizeof(*val));
sys/geom/nop/g_nop.c
648
if (val != NULL) {
sys/geom/nop/g_nop.c
649
stripesize = *val;
sys/geom/nop/g_nop.c
655
val = gctl_get_paraml_opt(req, "stripeoffset", sizeof(*val));
sys/geom/nop/g_nop.c
656
if (val != NULL) {
sys/geom/nop/g_nop.c
657
stripeoffset = *val;
sys/geom/nop/g_nop.c
694
intmax_t *val, delaymsec, error, rdelayprob, rfailprob, wdelayprob,
sys/geom/nop/g_nop.c
718
val = gctl_get_paraml_opt(req, "error", sizeof(*val));
sys/geom/nop/g_nop.c
719
if (val != NULL) {
sys/geom/nop/g_nop.c
720
error = *val;
sys/geom/nop/g_nop.c
722
val = gctl_get_paraml_opt(req, "count_until_fail", sizeof(*val));
sys/geom/nop/g_nop.c
723
if (val != NULL) {
sys/geom/nop/g_nop.c
724
count_until_fail = *val;
sys/geom/nop/g_nop.c
726
val = gctl_get_paraml_opt(req, "rfailprob", sizeof(*val));
sys/geom/nop/g_nop.c
727
if (val != NULL) {
sys/geom/nop/g_nop.c
728
rfailprob = *val;
sys/geom/nop/g_nop.c
734
val = gctl_get_paraml_opt(req, "wfailprob", sizeof(*val));
sys/geom/nop/g_nop.c
735
if (val != NULL) {
sys/geom/nop/g_nop.c
736
wfailprob = *val;
sys/geom/nop/g_nop.c
742
val = gctl_get_paraml_opt(req, "delaymsec", sizeof(*val));
sys/geom/nop/g_nop.c
743
if (val != NULL) {
sys/geom/nop/g_nop.c
744
delaymsec = *val;
sys/geom/nop/g_nop.c
750
val = gctl_get_paraml_opt(req, "rdelayprob", sizeof(*val));
sys/geom/nop/g_nop.c
751
if (val != NULL) {
sys/geom/nop/g_nop.c
752
rdelayprob = *val;
sys/geom/nop/g_nop.c
758
val = gctl_get_paraml_opt(req, "wdelayprob", sizeof(*val));
sys/geom/nop/g_nop.c
759
if (val != NULL) {
sys/geom/nop/g_nop.c
760
wdelayprob = *val;
sys/geom/raid/g_raid.c
1076
int i, val;
sys/geom/raid/g_raid.c
1087
val = i < vol->v_disks_count;
sys/geom/raid/g_raid.c
1088
g_handleattr(bp, "GEOM::candelete", &val, sizeof(val));
sys/geom/raid/md_ddf.c
1043
uint32_t val;
sys/geom/raid/md_ddf.c
1078
val = GET32(meta, hdr->CRC);
sys/geom/raid/md_ddf.c
1081
if (crc32(ahdr, ss) != val) {
sys/geom/raid/md_ddf.c
1119
val = GET32(meta, hdr->CRC);
sys/geom/raid/md_ddf.c
1122
crc32(meta->hdr, ss) != val ||
sys/geom/raid/md_ddf.c
1146
if ((val = GET32(meta, hdr->bbmlog_section)) != 0xffffffff)
sys/geom/raid/md_ddf.c
1147
len = max(len, val + GET32(meta, hdr->bbmlog_length));
sys/geom/raid/md_ddf.c
1148
if ((val = GET32(meta, hdr->Diagnostic_Space)) != 0xffffffff)
sys/geom/raid/md_ddf.c
1149
len = max(len, val + GET32(meta, hdr->Diagnostic_Space_Length));
sys/geom/raid/md_ddf.c
1150
if ((val = GET32(meta, hdr->Vendor_Specific_Logs)) != 0xffffffff)
sys/geom/raid/md_ddf.c
1151
len = max(len, val + GET32(meta, hdr->Vendor_Specific_Logs_Length));
sys/geom/raid/md_ddf.c
1963
uint32_t val;
sys/geom/raid/md_ddf.c
1981
val = GET32D(pdmeta, vdc->Signature);
sys/geom/raid/md_ddf.c
1983
if (val == DDF_SA_SIGNATURE && spare == -1)
sys/geom/raid/md_ddf.c
1986
if (val != DDF_VDCR_SIGNATURE)
sys/geom/raid/md_ddf.c
2044
val = GET32(vmeta, bvdc[k]->Physical_Disk_Sequence[i]);
sys/geom/raid/md_ddf.c
2045
if (g_raid_md_ddf_get_disk(sc, NULL, val) != NULL)
sys/geom/raid/md_ddf.c
228
uint32_t val;
sys/geom/raid/md_ddf.c
320
val = GET32D(meta, vdc->Signature);
sys/geom/raid/md_ddf.c
321
switch (val) {
sys/geom/raid/md_ddf.c
411
printf("Unknown configuration signature %08x\n", val);
sys/geom/stripe/g_stripe.c
593
int val = (sc->sc_flags & G_STRIPE_FLAG_CANDELETE) != 0;
sys/geom/stripe/g_stripe.c
594
g_handleattr(bp, "GEOM::candelete", &val, sizeof(val));
sys/geom/union/g_union.c
372
intmax_t *val;
sys/geom/union/g_union.c
374
val = gctl_get_paraml_opt(req, name, sizeof(*val));
sys/geom/union/g_union.c
375
if (val == NULL)
sys/geom/union/g_union.c
377
if (*val >= 0)
sys/geom/union/g_union.c
378
return (*val);
sys/geom/union/g_union.c
380
"using default.", name, *val);
sys/geom/uzip/g_uzip.c
339
g_uzip_memvcmp(const void *memory, unsigned char val, size_t size)
sys/geom/uzip/g_uzip.c
344
return (*mm == val) && memcmp(mm, mm + 1, size - 1) == 0;
sys/i386/acpica/acpi_wakeup.c
96
#define WAKECODE_FIXUP(offset, type, val) do { \
sys/i386/acpica/acpi_wakeup.c
99
*addr = val; \
sys/i386/i386/copyout.c
327
fueword(volatile const void *base, long *val)
sys/i386/i386/copyout.c
331
if ((uintptr_t)base + sizeof(*val) < (uintptr_t)base ||
sys/i386/i386/copyout.c
332
(uintptr_t)base + sizeof(*val) > VM_MAXUSER_ADDRESS)
sys/i386/i386/copyout.c
335
if (fueword_fast_tramp(base, val, pmap_get_kcr3()) == 0)
sys/i386/i386/copyout.c
341
*val = res;
sys/i386/i386/copyout.c
346
fueword32(volatile const void *base, int32_t *val)
sys/i386/i386/copyout.c
349
return (fueword(base, (long *)val));
sys/i386/i386/copyout.c
54
int fueword_fast(volatile const void *base, long *val, u_int kcr3);
sys/i386/i386/copyout.c
56
int subyte_fast(volatile void *base, int val, u_int kcr3);
sys/i386/i386/copyout.c
58
int suword16_fast(volatile void *base, int val, u_int kcr3);
sys/i386/i386/copyout.c
60
int suword_fast(volatile void *base, long val, u_int kcr3);
sys/i386/i386/gdb_machdep.c
120
uintmax_t val;
sys/i386/i386/gdb_machdep.c
122
val = 0;
sys/i386/i386/gdb_machdep.c
126
val = rdr0();
sys/i386/i386/gdb_machdep.c
129
val = rdr1();
sys/i386/i386/gdb_machdep.c
132
val = rdr2();
sys/i386/i386/gdb_machdep.c
135
val = rdr3();
sys/i386/i386/gdb_machdep.c
143
if (val != 0) {
sys/i386/i386/gdb_machdep.c
145
gdb_tx_varhex(val);
sys/i386/i386/gdb_machdep.c
85
gdb_cpu_setreg(int regnum, void *val)
sys/i386/i386/gdb_machdep.c
90
kdb_thrctx->pcb_eip = *(register_t *)val;
sys/i386/i386/gdb_machdep.c
92
kdb_frame->tf_eip = *(register_t *)val;
sys/i386/i386/initcpu.c
566
u_int regs[4], val;
sys/i386/i386/initcpu.c
587
val = regs[3];
sys/i386/i386/initcpu.c
589
val = 0;
sys/i386/i386/initcpu.c
592
if ((val & VIA_CPUID_HAS_RNG) != 0) {
sys/i386/i386/initcpu.c
598
if ((val & VIA_CPUID_HAS_ACE) != 0)
sys/i386/i386/initcpu.c
600
if ((val & VIA_CPUID_HAS_ACE2) != 0)
sys/i386/i386/initcpu.c
602
if ((val & VIA_CPUID_HAS_PHE) != 0)
sys/i386/i386/initcpu.c
604
if ((val & VIA_CPUID_HAS_PMM) != 0)
sys/i386/i386/longrun.c
223
u_int val;
sys/i386/i386/longrun.c
228
val = *(u_int *)oidp->oid_arg1;
sys/i386/i386/longrun.c
229
error = sysctl_handle_int(oidp, &val, 0, req);
sys/i386/i386/perfmon.c
209
perfmon_read(int pmc, quad_t *val)
sys/i386/i386/perfmon.c
216
*val = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
sys/i386/i386/perfmon.c
218
*val = pmc_shadow[pmc];
sys/i386/i386/pmap.c
5825
int val;
sys/i386/i386/pmap.c
5835
val = MINCORE_PSIND(1);
sys/i386/i386/pmap.c
5839
val = 0;
sys/i386/i386/pmap.c
5844
val = 0;
sys/i386/i386/pmap.c
5847
val |= MINCORE_INCORE;
sys/i386/i386/pmap.c
5849
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/i386/i386/pmap.c
5851
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/i386/i386/pmap.c
5853
if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
sys/i386/i386/pmap.c
5859
return (val);
sys/i386/include/atomic.h
859
#define atomic_testandclear_ptr(p, val) \
sys/i386/include/atomic.h
860
atomic_testandclear_int((volatile u_int *)(p), (val))
sys/i386/include/atomic.h
861
#define atomic_testandset_ptr(p, val) \
sys/i386/include/atomic.h
862
atomic_testandset_int((volatile u_int *)(p), (val))
sys/i386/include/bootinfo.h
86
#define B_SLICE(val) (((val)>>B_SLICESHIFT) & B_SLICEMASK)
sys/i386/include/bootinfo.h
89
#define B_UNIT(val) (((val) >> B_UNITSHIFT) & B_UNITMASK)
sys/i386/include/bootinfo.h
92
#define B_PARTITION(val) (((val) >> B_PARTITIONSHIFT) & B_PARTITIONMASK)
sys/i386/include/bootinfo.h
95
#define B_TYPE(val) (((val) >> B_TYPESHIFT) & B_TYPEMASK)
sys/i386/include/counter.h
101
atomic_add_64(&arg->res, val);
sys/i386/include/counter.h
96
uint64_t val;
sys/i386/include/counter.h
99
val = counter_u64_read_one_8b((uint64_t *)((char *)arg->p +
sys/i386/include/cpufunc.h
451
load_xcr(u_int reg, uint64_t val)
sys/i386/include/cpufunc.h
455
low = val;
sys/i386/include/cpufunc.h
456
high = val >> 32;
sys/i386/include/cpufunc.h
700
int rdmsr_safe(u_int msr, uint64_t *val);
sys/i386/include/pcpu.h
138
#define __PCPU_ADD(name, val) do { \
sys/i386/include/pcpu.h
144
__val = (val); \
sys/i386/include/pcpu.h
159
#define __PCPU_SET(name, val) do { \
sys/i386/include/pcpu.h
165
__val = (val); \
sys/i386/include/pcpu.h
188
#define PCPU_ADD(member, val) __PCPU_ADD(pc_ ## member, val)
sys/i386/include/pcpu.h
190
#define PCPU_SET(member, val) __PCPU_SET(pc_ ## member, val)
sys/i386/linux/linux.h
273
l_int val;
sys/i386/linux/linux.h
80
l_int val[2];
sys/i386/linux/linux_proto.h
1625
char val_l_[PADL_(uint32_t)]; uint32_t val; char val_r_[PADR_(uint32_t)];
sys/i386/linux/linux_proto.h
793
char val_l_[PADL_(uint32_t)]; uint32_t val; char val_r_[PADR_(uint32_t)];
sys/i386/linux/linux_systrace_args.c
1728
uarg[a++] = p->val; /* uint32_t */
sys/i386/linux/linux_systrace_args.c
3174
uarg[a++] = p->val; /* uint32_t */
sys/isa/rtc.h
118
void writertc(int reg, u_char val);
sys/kern/imgact_elf.c
160
u_long val;
sys/kern/imgact_elf.c
163
val = __elfN(pie_base);
sys/kern/imgact_elf.c
164
error = sysctl_handle_long(oidp, &val, 0, req);
sys/kern/imgact_elf.c
167
if ((val & PAGE_MASK) != 0)
sys/kern/imgact_elf.c
169
__elfN(pie_base) = val;
sys/kern/kern_acct.c
460
int val, exp; /* Unnormalized value and exponent */
sys/kern/kern_acct.c
473
val = tv.tv_usec;
sys/kern/kern_acct.c
482
val = 1000000 * tv.tv_sec + tv.tv_usec;
sys/kern/kern_acct.c
485
val = (unsigned int)(((uint64_t)1000000 * tv.tv_sec +
sys/kern/kern_acct.c
490
norm_exp = fls(val) - 1;
sys/kern/kern_acct.c
494
val, exp, shift, norm_exp);
sys/kern/kern_acct.c
496
((shift > 0 ? (val << shift) : (val >> -shift)) & MANT_MASK));
sys/kern/kern_acct.c
499
((shift > 0 ? val << shift : val >> -shift) & MANT_MASK));
sys/kern/kern_acct.c
507
encode_long(long val)
sys/kern/kern_acct.c
512
if (val == 0)
sys/kern/kern_acct.c
514
if (val < 0) {
sys/kern/kern_acct.c
517
val);
sys/kern/kern_acct.c
518
val = LONG_MAX;
sys/kern/kern_acct.c
520
norm_exp = fls(val) - 1;
sys/kern/kern_acct.c
524
val, shift, norm_exp);
sys/kern/kern_acct.c
526
((shift > 0 ? (val << shift) : (val >> -shift)) & MANT_MASK));
sys/kern/kern_acct.c
529
((shift > 0 ? val << shift : val >> -shift) & MANT_MASK));
sys/kern/kern_clocksource.c
930
int error, val;
sys/kern/kern_clocksource.c
932
val = periodic;
sys/kern/kern_clocksource.c
933
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_clocksource.c
938
periodic = want_periodic = val;
sys/kern/kern_cpuset.c
2240
int val;
sys/kern/kern_cpuset.c
2246
val = fubyte(cp);
sys/kern/kern_cpuset.c
2247
if (val == -1) {
sys/kern/kern_cpuset.c
2251
if (val != 0) {
sys/kern/kern_environment.c
1030
char *val;
sys/kern/kern_environment.c
1036
val = kern_getenv(name);
sys/kern/kern_environment.c
1037
if (val == NULL)
sys/kern/kern_environment.c
1040
if ((strcmp(val, "1") == 0) || (strcasecmp(val, "true") == 0)) {
sys/kern/kern_environment.c
1043
} else if ((strcmp(val, "0") == 0) || (strcasecmp(val, "false") == 0)) {
sys/kern/kern_environment.c
1049
name, val);
sys/kern/kern_environment.c
1051
freeenv(val);
sys/kern/kern_environment.c
1062
bool val;
sys/kern/kern_environment.c
1064
if (getenv_bool(name, &val) != 0)
sys/kern/kern_environment.c
1065
return (val);
sys/kern/kern_environment.c
1075
bool val;
sys/kern/kern_environment.c
1077
if (getenv_bool(name, &val) != 0)
sys/kern/kern_environment.c
1078
return (!val);
sys/kern/kern_environment.c
543
char *val;
sys/kern/kern_environment.c
545
val = _getenv_static_from(md_envp, name);
sys/kern/kern_environment.c
546
if (val != NULL)
sys/kern/kern_environment.c
547
return (val);
sys/kern/kern_environment.c
548
val = _getenv_static_from(kern_envp, name);
sys/kern/kern_environment.c
549
if (val != NULL)
sys/kern/kern_environment.c
550
return (val);
sys/kern/kern_event.c
347
#define KN_HASH(val, mask) (((val) ^ (val >> 8)) & (mask))
sys/kern/kern_exec.c
172
unsigned int val;
sys/kern/kern_exec.c
173
val = (unsigned int)PROC_PS_STRINGS(p);
sys/kern/kern_exec.c
174
return (SYSCTL_OUT(req, &val, sizeof(val)));
sys/kern/kern_exec.c
185
vm_offset_t val;
sys/kern/kern_exec.c
196
val = round_page(p->p_vmspace->vm_stacktop);
sys/kern/kern_exec.c
197
return (SYSCTL_OUT(req, &val, sizeof(val)));
sys/kern/kern_malloc.c
338
u_int val;
sys/kern/kern_malloc.c
343
val = 0;
sys/kern/kern_malloc.c
345
val = desc[zone_offset % len];
sys/kern/kern_malloc.c
346
mtip->mti_zone = (val % numzones);
sys/kern/kern_mib.c
202
u_long val, p;
sys/kern/kern_mib.c
207
val = ctob(p);
sys/kern/kern_mib.c
208
return (sysctl_handle_long(oidp, &val, 0, req));
sys/kern/kern_mib.c
218
u_long val, p;
sys/kern/kern_mib.c
223
val = ctob(p);
sys/kern/kern_mib.c
224
return (sysctl_handle_long(oidp, &val, 0, req));
sys/kern/kern_mib.c
234
u_long val, p, p1;
sys/kern/kern_mib.c
240
val = ctob(p);
sys/kern/kern_mib.c
241
return (sysctl_handle_long(oidp, &val, 0, req));
sys/kern/kern_poll.c
115
uint32_t val = poll_burst_max;
sys/kern/kern_poll.c
118
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_poll.c
121
if (val < MIN_POLL_BURST_MAX || val > MAX_POLL_BURST_MAX)
sys/kern/kern_poll.c
125
poll_burst_max = val;
sys/kern/kern_poll.c
141
uint32_t val = poll_each_burst;
sys/kern/kern_poll.c
144
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_poll.c
147
if (val < 1)
sys/kern/kern_poll.c
151
if (val > poll_burst_max) {
sys/kern/kern_poll.c
155
poll_each_burst = val;
sys/kern/kern_poll.c
172
uint32_t val = user_frac;
sys/kern/kern_poll.c
175
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_poll.c
178
if (val > 99)
sys/kern/kern_poll.c
182
user_frac = val;
sys/kern/kern_poll.c
196
uint32_t val = reg_frac;
sys/kern/kern_poll.c
199
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_poll.c
202
if (val < 1 || val > hz)
sys/kern/kern_poll.c
206
reg_frac = val;
sys/kern/kern_proc.c
3612
int error, val;
sys/kern/kern_proc.c
3614
val = 0;
sys/kern/kern_proc.c
3616
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_proc.c
3619
if (val != 0) {
sys/kern/kern_prot.c
2234
int error, val;
sys/kern/kern_prot.c
2236
val = prison_allow(req->td->td_ucred, PR_ALLOW_UNPRIV_DEBUG);
sys/kern/kern_prot.c
2237
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_prot.c
2240
if (val != 0 && val != 1)
sys/kern/kern_prot.c
2242
prison_set_allow(req->td->td_ucred, PR_ALLOW_UNPRIV_DEBUG, val);
sys/kern/kern_rctl.c
225
int error, val = rctl_throttle_min;
sys/kern/kern_rctl.c
227
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_rctl.c
230
if (val < 1 || val > rctl_throttle_max)
sys/kern/kern_rctl.c
234
rctl_throttle_min = val;
sys/kern/kern_rctl.c
242
int error, val = rctl_throttle_max;
sys/kern/kern_rctl.c
244
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_rctl.c
247
if (val < rctl_throttle_min)
sys/kern/kern_rctl.c
251
rctl_throttle_max = val;
sys/kern/kern_rctl.c
259
int error, val = rctl_throttle_pct;
sys/kern/kern_rctl.c
261
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_rctl.c
264
if (val < 0)
sys/kern/kern_rctl.c
268
rctl_throttle_pct = val;
sys/kern/kern_rctl.c
276
int error, val = rctl_throttle_pct2;
sys/kern/kern_rctl.c
278
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_rctl.c
281
if (val < 0)
sys/kern/kern_rctl.c
285
rctl_throttle_pct2 = val;
sys/kern/kern_sig.c
4070
uint32_t val;
sys/kern/kern_sig.c
4072
(void)sigfastblock_fetch_sig(td, true, &val);
sys/kern/kern_switch.c
119
int val;
sys/kern/kern_switch.c
122
val = 0;
sys/kern/kern_switch.c
123
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_switch.c
126
if (val == 0)
sys/kern/kern_sysctl.c
2711
const u_char *val, *p;
sys/kern/kern_sysctl.c
2723
val = p = ptr;
sys/kern/kern_sysctl.c
2820
while (len-- && (xflag || p < val + 16))
sys/kern/kern_tc.c
1966
int error, val;
sys/kern/kern_tc.c
1968
val = tc_timepercentage;
sys/kern/kern_tc.c
1969
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_tc.c
1972
tc_timepercentage = val;
sys/kern/kern_time.c
1456
struct itimerspec val, oval, *ovalp;
sys/kern/kern_time.c
1459
error = copyin(uap->value, &val, sizeof(val));
sys/kern/kern_time.c
1463
error = kern_ktimer_settime(td, uap->timerid, uap->flags, &val, ovalp);
sys/kern/kern_time.c
1471
struct itimerspec *val, struct itimerspec *oval)
sys/kern/kern_time.c
1486
flags, val, oval));
sys/kern/kern_time.c
1502
struct itimerspec val;
sys/kern/kern_time.c
1505
error = kern_ktimer_gettime(td, uap->timerid, &val);
sys/kern/kern_time.c
1507
error = copyout(&val, uap->value, sizeof(val));
sys/kern/kern_time.c
1512
kern_ktimer_gettime(struct thread *td, int timer_id, struct itimerspec *val)
sys/kern/kern_time.c
1526
error = CLOCK_CALL(it->it_clockid, timer_gettime, (it, val));
sys/kern/kern_time.c
1621
struct itimerspec val;
sys/kern/kern_time.c
1626
val = *value;
sys/kern/kern_time.c
1627
if (itimespecfix(&val.it_value))
sys/kern/kern_time.c
1630
if (timespecisset(&val.it_value)) {
sys/kern/kern_time.c
1631
if (itimespecfix(&val.it_interval))
sys/kern/kern_time.c
1634
timespecclear(&val.it_interval);
sys/kern/kern_time.c
1640
it->it_time = val;
sys/kern/kern_time.c
1641
if (timespecisset(&val.it_value)) {
sys/kern/kern_time.c
1646
ts = val.it_value;
sys/kern/kern_timeout.c
1390
int error, val, i, count, tcum, pcum, maxc, c, medc;
sys/kern/kern_timeout.c
1393
val = 0;
sys/kern/kern_timeout.c
1394
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_ucoredump.c
79
int error, val;
sys/kern/kern_ucoredump.c
81
val = compress_user_cores;
sys/kern/kern_ucoredump.c
82
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/kern_ucoredump.c
85
if (val != 0 && !compressor_avail(val))
sys/kern/kern_ucoredump.c
87
compress_user_cores = val;
sys/kern/kern_umtx.c
3910
return (do_lock_umtx32(td, uap->obj, uap->val, ts));
sys/kern/kern_umtx.c
3912
return (do_lock_umtx(td, uap->obj, uap->val, ts));
sys/kern/kern_umtx.c
3921
return (do_unlock_umtx32(td, uap->obj, uap->val));
sys/kern/kern_umtx.c
3923
return (do_unlock_umtx(td, uap->obj, uap->val));
sys/kern/kern_umtx.c
3952
return (do_wait(td, uap->obj, uap->val, tm_p, ops->compat32, 0));
sys/kern/kern_umtx.c
3971
return (do_wait(td, uap->obj, uap->val, tm_p, 1, 0));
sys/kern/kern_umtx.c
3990
return (do_wait(td, uap->obj, uap->val, tm_p, 1, 1));
sys/kern/kern_umtx.c
3998
return (kern_umtx_wake(td, uap->obj, uap->val, 0));
sys/kern/kern_umtx.c
4010
for (count = uap->val, pos = 0; count > 0; count -= tocopy,
sys/kern/kern_umtx.c
4032
for (count = uap->val, pos = 0; count > 0; count -= tocopy,
sys/kern/kern_umtx.c
4062
return (kern_umtx_wake(td, uap->obj, uap->val, 1));
sys/kern/kern_umtx.c
4134
return (do_set_ceiling(td, uap->obj, uap->val, uap->uaddr1));
sys/kern/kern_umtx.c
4153
return (do_cv_wait(td, uap->obj, uap->uaddr1, ts, uap->val));
sys/kern/kern_umtx.c
4181
error = do_rw_rdlock(td, uap->obj, uap->val, 0);
sys/kern/kern_umtx.c
4187
error = do_rw_rdlock(td, uap->obj, uap->val, &timeout);
sys/kern/kern_umtx.c
4256
return (do_wake2_umutex(td, uap->obj, uap->val));
sys/kern/kern_umtx.c
4655
return (umtx_shm(td, uap->uaddr1, uap->val));
sys/kern/kern_umtx.c
4675
error = ops->copyin_robust_lists(uap->uaddr1, uap->val, &rb);
sys/kern/kern_umtx.c
4692
long val;
sys/kern/kern_umtx.c
4695
val = sbttons(td->td_proc->p_umtx_min_timeout);
sys/kern/kern_umtx.c
4697
val1 = (int)val;
sys/kern/kern_umtx.c
4700
error = copyout(&val, uap->uaddr1, sizeof(val));
sys/kern/kern_umtx.c
4709
if (uap->val < 0)
sys/kern/kern_umtx.c
4711
td->td_proc->p_umtx_min_timeout = nstosbt(uap->val);
sys/kern/kern_umtx.c
4986
kern__umtx_op(struct thread *td, void *obj, int op, unsigned long val,
sys/kern/kern_umtx.c
4992
.val = val,
sys/kern/kern_umtx.c
5024
return (kern__umtx_op(td, uap->obj, uap->op, uap->val, uap->uaddr1,
sys/kern/kern_umtx.c
5049
return (kern__umtx_op(td, uap->obj, uap->op, uap->val, uap->uaddr1,
sys/kern/link_elf.c
1663
caddr_t val;
sys/kern/link_elf.c
1666
val = *valp;
sys/kern/link_elf.c
1670
val = ((caddr_t (*)(void))val)();
sys/kern/link_elf.c
1671
if (link_elf_search_symbol(lf, val, &sym, &off) == 0 && off == 0) {
sys/kern/link_elf.c
1676
*valp = val;
sys/kern/link_elf.c
1687
caddr_t val;
sys/kern/link_elf.c
1696
val = (caddr_t)ef->address + es->st_value;
sys/kern/link_elf.c
1698
link_elf_ifunc_symbol_value(lf, &val, &size);
sys/kern/link_elf.c
1701
symval->value = val;
sys/kern/link_elf.c
1723
caddr_t val;
sys/kern/link_elf.c
1733
val = (caddr_t)ef->address + es->st_value;
sys/kern/link_elf.c
1735
link_elf_ifunc_symbol_value(lf, &val, &size);
sys/kern/link_elf.c
1738
symval->value = val;
sys/kern/link_elf.c
2055
caddr_t val;
sys/kern/link_elf.c
2060
val = (caddr_t)ef->address + symp->st_value;
sys/kern/link_elf.c
2061
*res = ((Elf_Addr (*)(void))val)();
sys/kern/link_elf_obj.c
1538
caddr_t val;
sys/kern/link_elf_obj.c
1541
val = *valp;
sys/kern/link_elf_obj.c
1544
val = ((caddr_t (*)(void))val)();
sys/kern/link_elf_obj.c
1545
if (link_elf_search_symbol(lf, val, &sym, &off) == 0 && off == 0) {
sys/kern/link_elf_obj.c
1550
*valp = val;
sys/kern/link_elf_obj.c
1561
caddr_t val;
sys/kern/link_elf_obj.c
1566
val = (caddr_t)es->st_value;
sys/kern/link_elf_obj.c
1571
val = (caddr_t)es->st_value;
sys/kern/link_elf_obj.c
1573
link_elf_ifunc_symbol_value(lf, &val, &size);
sys/kern/link_elf_obj.c
1576
symval->value = val;
sys/kern/posix4_mib.c
111
int error, num, val;
sys/kern/posix4_mib.c
116
val = facility_initialized[num - 1] ? facility[num - 1] : 0;
sys/kern/posix4_mib.c
117
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/posix4_mib.c
119
facility[num - 1] = val;
sys/kern/subr_asan.c
562
kasan_fueword(volatile const void *base, long *val)
sys/kern/subr_asan.c
564
kasan_shadow_check((unsigned long)val, sizeof(*val), true, __RET_ADDR);
sys/kern/subr_asan.c
565
return (fueword(base, val));
sys/kern/subr_asan.c
569
kasan_fueword32(volatile const void *base, int32_t *val)
sys/kern/subr_asan.c
571
kasan_shadow_check((unsigned long)val, sizeof(*val), true, __RET_ADDR);
sys/kern/subr_asan.c
572
return (fueword32(base, val));
sys/kern/subr_asan.c
576
kasan_fueword64(volatile const void *base, int64_t *val)
sys/kern/subr_asan.c
578
kasan_shadow_check((unsigned long)val, sizeof(*val), true, __RET_ADDR);
sys/kern/subr_asan.c
579
return (fueword64(base, val));
sys/kern/subr_asan.c
636
void kasan_atomic_add_##name(volatile type *ptr, type val) \
sys/kern/subr_asan.c
640
atomic_add_##name(ptr, val); \
sys/kern/subr_asan.c
649
void kasan_atomic_subtract_##name(volatile type *ptr, type val) \
sys/kern/subr_asan.c
653
atomic_subtract_##name(ptr, val); \
sys/kern/subr_asan.c
662
void kasan_atomic_set_##name(volatile type *ptr, type val) \
sys/kern/subr_asan.c
666
atomic_set_##name(ptr, val); \
sys/kern/subr_asan.c
675
void kasan_atomic_clear_##name(volatile type *ptr, type val) \
sys/kern/subr_asan.c
679
atomic_clear_##name(ptr, val); \
sys/kern/subr_asan.c
688
type kasan_atomic_fetchadd_##name(volatile type *ptr, type val) \
sys/kern/subr_asan.c
692
return (atomic_fetchadd_##name(ptr, val)); \
sys/kern/subr_asan.c
720
type kasan_atomic_swap_##name(volatile type *ptr, type val) \
sys/kern/subr_asan.c
724
return (atomic_swap_##name(ptr, val)); \
sys/kern/subr_asan.c
774
void kasan_atomic_store_##name(volatile type *ptr, type val) \
sys/kern/subr_asan.c
778
atomic_store_##name(ptr, val); \
sys/kern/subr_boot.c
100
val = GETENV(howto_names[i].ev);
sys/kern/subr_boot.c
101
if (val != NULL && strcasecmp(val, "no") != 0)
sys/kern/subr_boot.c
103
FREE(val);
sys/kern/subr_boot.c
96
char *val;
sys/kern/subr_bus.c
118
void *val;
sys/kern/subr_bus.c
2317
device_get_property(device_t dev, const char *prop, void *val, size_t sz,
sys/kern/subr_bus.c
2339
return (BUS_GET_PROPERTY(bus, dev, prop, val, sz, type));
sys/kern/subr_bus.c
6199
device_set_prop(device_t dev, const char *name, void *val,
sys/kern/subr_bus.c
6218
e1->val = val;
sys/kern/subr_bus.c
6227
e->dtr(dev, name, e->val, e->dtr_ctx);
sys/kern/subr_bus.c
6228
e->val = val;
sys/kern/subr_bus.c
6245
*valp = e->val;
sys/kern/subr_bus.c
6261
e->dtr(dev, e->name, e->val, e->dtr_ctx);
sys/kern/subr_bus.c
6276
e->dtr(dev, e->name, e->val, e->dtr_ctx);
sys/kern/subr_counter.c
182
int64_t val;
sys/kern/subr_counter.c
185
val = cr->cr_over;
sys/kern/subr_counter.c
200
val = counter_u64_fetch(cr->cr_rate);
sys/kern/subr_counter.c
204
if (val <= limit)
sys/kern/subr_counter.c
205
val = 0;
sys/kern/subr_counter.c
214
return (val);
sys/kern/subr_counter.c
221
val = cr->cr_over = -1;
sys/kern/subr_counter.c
223
return (val);
sys/kern/subr_coverage.c
202
__sanitizer_cov_trace_switch(uint64_t val, uint64_t *cases)
sys/kern/subr_coverage.c
231
val |= COV_CMP_CONST;
sys/kern/subr_coverage.c
234
if (!trace_cmp(type, val, cases[i + 2], ret))
sys/kern/subr_csan.c
381
void kcsan_atomic_add_##name(volatile type *ptr, type val) \
sys/kern/subr_csan.c
385
atomic_add_##name(ptr, val); \
sys/kern/subr_csan.c
394
void kcsan_atomic_clear_##name(volatile type *ptr, type val) \
sys/kern/subr_csan.c
398
atomic_clear_##name(ptr, val); \
sys/kern/subr_csan.c
435
type kcsan_atomic_fetchadd_##name(volatile type *ptr, type val) \
sys/kern/subr_csan.c
439
return (atomic_fetchadd_##name(ptr, val)); \
sys/kern/subr_csan.c
463
void kcsan_atomic_set_##name(volatile type *ptr, type val) \
sys/kern/subr_csan.c
467
atomic_set_##name(ptr, val); \
sys/kern/subr_csan.c
476
void kcsan_atomic_subtract_##name(volatile type *ptr, type val) \
sys/kern/subr_csan.c
480
atomic_subtract_##name(ptr, val); \
sys/kern/subr_csan.c
489
void kcsan_atomic_store_##name(volatile type *ptr, type val) \
sys/kern/subr_csan.c
493
atomic_store_##name(ptr, val); \
sys/kern/subr_csan.c
501
type kcsan_atomic_swap_##name(volatile type *ptr, type val) \
sys/kern/subr_csan.c
505
return(atomic_swap_##name(ptr, val)); \
sys/kern/subr_csan.c
509
int kcsan_atomic_testandclear_##name(volatile type *ptr, u_int val) \
sys/kern/subr_csan.c
513
return(atomic_testandclear_##name(ptr, val)); \
sys/kern/subr_csan.c
517
int kcsan_atomic_testandset_##name(volatile type *ptr, u_int val) \
sys/kern/subr_csan.c
521
return (atomic_testandset_##name(ptr, val)); \
sys/kern/subr_hints.c
343
unsigned long val;
sys/kern/subr_hints.c
353
val = strtoul(str, &op, 0);
sys/kern/subr_hints.c
356
*result = val;
sys/kern/subr_hints.c
367
unsigned long val;
sys/kern/subr_hints.c
377
val = strtoul(str, &op, 0);
sys/kern/subr_hints.c
380
*result = val;
sys/kern/subr_lock.c
134
lock_roundup_2(u_int val)
sys/kern/subr_lock.c
138
for (res = 1; res <= val; res <<= 1)
sys/kern/subr_msan.c
1086
void kmsan_atomic_add_##name(volatile type *ptr, type val) \
sys/kern/subr_msan.c
1088
kmsan_check_arg(sizeof(ptr) + sizeof(val), \
sys/kern/subr_msan.c
1092
atomic_add_##name(ptr, val); \
sys/kern/subr_msan.c
1101
void kmsan_atomic_subtract_##name(volatile type *ptr, type val) \
sys/kern/subr_msan.c
1103
kmsan_check_arg(sizeof(ptr) + sizeof(val), \
sys/kern/subr_msan.c
1107
atomic_subtract_##name(ptr, val); \
sys/kern/subr_msan.c
1116
void kmsan_atomic_set_##name(volatile type *ptr, type val) \
sys/kern/subr_msan.c
1118
kmsan_check_arg(sizeof(ptr) + sizeof(val), \
sys/kern/subr_msan.c
1122
atomic_set_##name(ptr, val); \
sys/kern/subr_msan.c
1131
void kmsan_atomic_clear_##name(volatile type *ptr, type val) \
sys/kern/subr_msan.c
1133
kmsan_check_arg(sizeof(ptr) + sizeof(val), \
sys/kern/subr_msan.c
1137
atomic_clear_##name(ptr, val); \
sys/kern/subr_msan.c
1146
type kmsan_atomic_fetchadd_##name(volatile type *ptr, type val) \
sys/kern/subr_msan.c
1148
kmsan_check_arg(sizeof(ptr) + sizeof(val), \
sys/kern/subr_msan.c
1153
return (atomic_fetchadd_##name(ptr, val)); \
sys/kern/subr_msan.c
1190
type kmsan_atomic_swap_##name(volatile type *ptr, type val) \
sys/kern/subr_msan.c
1192
kmsan_check_arg(sizeof(ptr) + sizeof(val), \
sys/kern/subr_msan.c
1197
return (atomic_swap_##name(ptr, val)); \
sys/kern/subr_msan.c
1256
void kmsan_atomic_store_##name(volatile type *ptr, type val) \
sys/kern/subr_msan.c
1258
kmsan_check_arg(sizeof(ptr) + sizeof(val), \
sys/kern/subr_msan.c
1262
atomic_store_##name(ptr, val); \
sys/kern/subr_msan.c
954
kmsan_fueword(volatile const void *base, long *val)
sys/kern/subr_msan.c
958
kmsan_check_arg(sizeof(base) + sizeof(val), "fueword(): args");
sys/kern/subr_msan.c
959
ret = fueword(base, val);
sys/kern/subr_msan.c
961
kmsan_shadow_fill((uintptr_t)val, KMSAN_STATE_INITED,
sys/kern/subr_msan.c
962
sizeof(*val));
sys/kern/subr_msan.c
968
kmsan_fueword32(volatile const void *base, int32_t *val)
sys/kern/subr_msan.c
972
kmsan_check_arg(sizeof(base) + sizeof(val), "fueword32(): args");
sys/kern/subr_msan.c
973
ret = fueword32(base, val);
sys/kern/subr_msan.c
975
kmsan_shadow_fill((uintptr_t)val, KMSAN_STATE_INITED,
sys/kern/subr_msan.c
976
sizeof(*val));
sys/kern/subr_msan.c
982
kmsan_fueword64(volatile const void *base, int64_t *val)
sys/kern/subr_msan.c
986
kmsan_check_arg(sizeof(base) + sizeof(val), "fueword64(): args");
sys/kern/subr_msan.c
987
ret = fueword64(base, val);
sys/kern/subr_msan.c
989
kmsan_shadow_fill((uintptr_t)val, KMSAN_STATE_INITED,
sys/kern/subr_msan.c
990
sizeof(*val));
sys/kern/subr_pctrie.c
190
pctrie_toleaf(uint64_t *val)
sys/kern/subr_pctrie.c
192
return ((void *)((uintptr_t)val | PCTRIE_ISLEAF));
sys/kern/subr_pctrie.c
385
uint64_t *val, struct pctrie_node **parent_out, uint64_t **found_out)
sys/kern/subr_pctrie.c
389
node = _pctrie_lookup_node(ptree, parent, *val, parent_out, NULL,
sys/kern/subr_pctrie.c
395
pctrie_toleaf(val), PCTRIE_LOCKED);
sys/kern/subr_pctrie.c
397
pctrie_addnode(*parent_out, *val,
sys/kern/subr_pctrie.c
398
pctrie_toleaf(val), PCTRIE_LOCKED);
sys/kern/subr_pctrie.c
401
if (__predict_false(pctrie_match_value(node, *val) != NULL)) {
sys/kern/subr_pctrie.c
411
return (pctrie_child(ptree, *parent_out, *val));
sys/kern/subr_pctrie.c
419
pctrie_insert_lookup_strict(struct pctrie *ptree, uint64_t *val,
sys/kern/subr_pctrie.c
425
parentp = _pctrie_insert_lookup(ptree, NULL, val, parent_out, &found);
sys/kern/subr_pctrie.c
428
(uintmax_t)*val);
sys/kern/subr_pctrie.c
437
pctrie_insert_lookup(struct pctrie *ptree, uint64_t *val,
sys/kern/subr_pctrie.c
440
return (_pctrie_insert_lookup(ptree, NULL, val, parent_out, found_out));
sys/kern/subr_pctrie.c
449
pctrie_iter_insert_lookup(struct pctrie_iter *it, uint64_t *val)
sys/kern/subr_pctrie.c
454
it->index = *val;
sys/kern/subr_pctrie.c
455
res = _pctrie_insert_lookup(it->ptree, it->node, val, &it->node,
sys/kern/subr_pctrie.c
469
pctrie_insert_node(uint64_t *val, struct pctrie_node *parent, void *parentp,
sys/kern/subr_pctrie.c
492
index = *val;
sys/kern/subr_pctrie.c
514
pctrie_addnode(child, index, pctrie_toleaf(val), PCTRIE_UNSERIALIZED);
sys/kern/subr_pctrie.c
569
uint64_t *val;
sys/kern/subr_pctrie.c
576
if ((val = pctrie_match_value(node, index + i)) == NULL)
sys/kern/subr_pctrie.c
578
value[i++] = val;
sys/kern/subr_pctrie.c
606
val = pctrie_toval(node);
sys/kern/subr_pctrie.c
607
if (access == PCTRIE_SMR && val == NULL)
sys/kern/subr_pctrie.c
609
value[i++] = val;
sys/kern/subr_pctrie.c
610
KASSERT(val != NULL,
sys/kern/subr_stats.c
1858
hist_dtype, bkts[i].val);
sys/kern/subr_stats.c
2786
bkt_lb = &VSD(dvhist32, hist)->bkts[i].val;
sys/kern/subr_stats.c
2799
bkt_lb = &VSD(dvhist64, hist)->bkts[i].val;
sys/kern/subr_stats.c
730
VSD(dvhist32, hist)->bkts[bkt].val = bkt_lb;
sys/kern/subr_stats.c
740
VSD(dvhist64, hist)->bkts[bkt].val = bkt_lb;
sys/kern/subr_uio.c
529
int32_t val;
sys/kern/subr_uio.c
531
rv = fueword32(addr, &val);
sys/kern/subr_uio.c
532
return (rv == -1 ? -1 : val);
sys/kern/subr_uio.c
540
int64_t val;
sys/kern/subr_uio.c
542
rv = fueword64(addr, &val);
sys/kern/subr_uio.c
543
return (rv == -1 ? -1 : val);
sys/kern/subr_uio.c
550
long val;
sys/kern/subr_uio.c
553
rv = fueword(addr, &val);
sys/kern/subr_uio.c
554
return (rv == -1 ? -1 : val);
sys/kern/subr_uio.c
561
uint32_t val;
sys/kern/subr_uio.c
563
rv = casueword32(addr, old, &val, new);
sys/kern/subr_uio.c
564
return (rv == -1 ? -1 : val);
sys/kern/subr_uio.c
571
u_long val;
sys/kern/subr_uio.c
573
rv = casueword(addr, old, &val, new);
sys/kern/subr_uio.c
574
return (rv == -1 ? -1 : val);
sys/kern/systrace_args.c
1988
uarg[a++] = (intptr_t)p->val; /* int * */
sys/kern/systrace_args.c
2316
uarg[a++] = p->val; /* u_long */
sys/kern/systrace_args.c
584
uarg[a++] = (intptr_t)p->val; /* const void * */
sys/kern/systrace_args.c
619
uarg[a++] = (intptr_t)p->val; /* void * */
sys/kern/sysv_sem.c
1861
semun.val = arg.val;
sys/kern/sysv_sem.c
1958
semun.val = arg.val;
sys/kern/sysv_sem.c
2030
semun.val = arg.val;
sys/kern/sysv_sem.c
668
semun.val = arg.val;
sys/kern/sysv_sem.c
900
if (arg->val < 0 || arg->val > seminfo.semvmx) {
sys/kern/sysv_sem.c
904
semakptr->u.__sem_base[semnum].semval = arg->val;
sys/kern/tty.c
2306
char val;
sys/kern/tty.c
2496
db_printf("%c", ttystates[i].val);
sys/kern/tty_info.c
105
return (val);
sys/kern/tty_info.c
249
enum stack_sbuf_fmt val;
sys/kern/tty_info.c
252
val = tty_info_kstacks;
sys/kern/tty_info.c
253
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/tty_info.c
257
switch (val) {
sys/kern/tty_info.c
261
tty_info_kstacks = val;
sys/kern/tty_info.c
91
int val;
sys/kern/tty_info.c
93
val = 0;
sys/kern/tty_info.c
99
val = 1;
sys/kern/uipc_mqueue.c
1210
vap->va_fsid = vp->v_mount->mnt_stat.f_fsid.val[0];
sys/kern/uipc_sem.c
875
int *val;
sys/kern/uipc_sem.c
884
int error, val;
sys/kern/uipc_sem.c
902
val = ks->ks_value;
sys/kern/uipc_sem.c
906
error = copyout(&val, uap->val, sizeof(val));
sys/kern/uipc_socket.c
253
u_int val;
sys/kern/uipc_socket.c
255
val = V_somaxconn;
sys/kern/uipc_socket.c
256
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/uipc_socket.c
266
if (val < 1 || val > UINT_MAX / 3)
sys/kern/uipc_socket.c
269
V_somaxconn = val;
sys/kern/uipc_socket.c
285
u_int val;
sys/kern/uipc_socket.c
289
val = curvnet->vnet_sockcnt;
sys/kern/uipc_socket.c
292
val = numopensockets;
sys/kern/uipc_socket.c
293
return (sysctl_handle_int(oidp, &val, 0, req));
sys/kern/uipc_socket.c
3862
sbintime_t val, *valp;
sys/kern/uipc_socket.c
3969
val = SBT_MAX;
sys/kern/uipc_socket.c
3971
val = tvtosbt(tv);
sys/kern/uipc_socket.c
3978
*valp = val;
sys/kern/uipc_socket.c
5132
so_options_set(struct socket *so, int val)
sys/kern/uipc_socket.c
5135
so->so_options = val;
sys/kern/uipc_socket.c
5146
so_error_set(struct socket *so, int val)
sys/kern/uipc_socket.c
5149
so->so_error = val;
sys/kern/uipc_syscalls.c
1224
uap->val, UIO_USERSPACE, uap->valsize));
sys/kern/uipc_syscalls.c
1228
kern_setsockopt(struct thread *td, int s, int level, int name, const void *val,
sys/kern/uipc_syscalls.c
1237
if (val == NULL && valsize != 0)
sys/kern/uipc_syscalls.c
1245
sopt.sopt_val = __DECONST(void *, val);
sys/kern/uipc_syscalls.c
1276
if (uap->val) {
sys/kern/uipc_syscalls.c
1283
uap->val, UIO_USERSPACE, &valsize);
sys/kern/uipc_syscalls.c
1295
kern_getsockopt(struct thread *td, int s, int level, int name, void *val,
sys/kern/uipc_syscalls.c
1304
if (val == NULL)
sys/kern/uipc_syscalls.c
1312
sopt.sopt_val = val;
sys/kern/vfs_cache.c
1158
u_int val;
sys/kern/vfs_cache.c
1161
val = ncnegminpct;
sys/kern/vfs_cache.c
1162
error = sysctl_handle_int(oidp, &val, 0, req);
sys/kern/vfs_cache.c
1166
if (val == ncnegminpct)
sys/kern/vfs_cache.c
1168
if (val < 0 || val > 99)
sys/kern/vfs_cache.c
1170
ncnegminpct = val;
sys/kern/vfs_cache.c
2752
cache_roundup_2(u_long val)
sys/kern/vfs_cache.c
2756
for (res = 1; res <= val; res <<= 1)
sys/kern/vfs_default.c
1554
sb->st_dev = vp->v_mount->mnt_stat.f_fsid.val[0];
sys/kern/vfs_mount.c
1764
if (sscanf(fsidbuf, "FSID:%d:%d", &fsid.val[0], &fsid.val[1]) != 2) {
sys/kern/vfs_mount.c
2636
uint64_t val)
sys/kern/vfs_mount.c
2644
*w |= val;
sys/kern/vfs_mount.c
2649
*w &= ~val;
sys/kern/vfs_mount.c
2882
mount_argsu(struct mntarg *ma, const char *name, const void *val, int len)
sys/kern/vfs_mount.c
2887
if (val == NULL)
sys/kern/vfs_mount.c
2898
ma->error = copyinstr(val, tbuf, len, NULL);
sys/kern/vfs_mount.c
2908
mount_arg(struct mntarg *ma, const char *name, const void *val, int len)
sys/kern/vfs_mount.c
2924
ma->v[ma->len].iov_base = (void *)(uintptr_t)val;
sys/kern/vfs_mount.c
2926
ma->v[ma->len].iov_len = strlen(val) + 1;
sys/kern/vfs_mount.c
3000
cp = (const uint8_t *)&sfp->f_fsid.val[0];
sys/kern/vfs_mountroot.c
1128
char *val, *val_arg;
sys/kern/vfs_mountroot.c
1143
val = strchr(name, '=');
sys/kern/vfs_mountroot.c
1144
if (val != NULL) {
sys/kern/vfs_mountroot.c
1145
*val = '\0';
sys/kern/vfs_mountroot.c
1146
++val;
sys/kern/vfs_mountroot.c
1158
if (val != NULL)
sys/kern/vfs_mountroot.c
1159
val_arg = strdup(val, M_MOUNT);
sys/kern/vfs_mountroot.c
509
char *val;
sys/kern/vfs_mountroot.c
511
val = kern_getenv(var);
sys/kern/vfs_mountroot.c
512
if (val != NULL) {
sys/kern/vfs_mountroot.c
513
printf(" %s=%s\n", var, val);
sys/kern/vfs_mountroot.c
514
freeenv(val);
sys/kern/vfs_subr.c
1016
hash = fsid->val[0] ^ fsid->val[1];
sys/kern/vfs_subr.c
1111
tfsid.val[1] = mtype;
sys/kern/vfs_subr.c
1114
tfsid.val[0] = makedev(255,
sys/kern/vfs_subr.c
1121
mp->mnt_stat.f_fsid.val[0] = tfsid.val[0];
sys/kern/vfs_subr.c
1122
mp->mnt_stat.f_fsid.val[1] = tfsid.val[1];
sys/kern/vfs_subr.c
347
u_long val;
sys/kern/vfs_subr.c
350
val = desiredvnodes;
sys/kern/vfs_subr.c
351
error = sysctl_handle_long(oidp, &val, 0, req);
sys/kern/vfs_subr.c
355
if (val == desiredvnodes)
sys/kern/vfs_subr.c
358
desiredvnodes = val;
sys/kern/vfs_subr.c
398
u_long val;
sys/kern/vfs_subr.c
401
val = wantfreevnodes;
sys/kern/vfs_subr.c
402
error = sysctl_handle_long(oidp, &val, 0, req);
sys/kern/vfs_subr.c
406
if (val == wantfreevnodes)
sys/kern/vfs_subr.c
409
wantfreevnodes = val;
sys/kern/vfs_subr.c
4883
(u_int)sp->f_owner, (int)sp->f_fsid.val[0], (int)sp->f_fsid.val[1]);
sys/kern/vfs_vnops.c
3034
vp->v_mount->mnt_stat.f_fsid.val[0];
sys/kern/vfs_vnops.c
3185
va->va_fsid = (uint32_t)f->val[1];
sys/kern/vfs_vnops.c
3186
va->va_fsid <<= sizeof(f->val[1]) * NBBY;
sys/kern/vfs_vnops.c
3187
va->va_fsid += (uint32_t)f->val[0];
sys/kern/vfs_vnops.c
877
foffset_unlock(struct file *fp, off_t val, int flags)
sys/kern/vfs_vnops.c
882
atomic_store_long(&fp->f_offset, val);
sys/kern/vfs_vnops.c
884
fp->f_nextoff[UIO_READ] = val;
sys/kern/vfs_vnops.c
886
fp->f_nextoff[UIO_WRITE] = val;
sys/kern/vfs_vnops.c
961
foffset_unlock(struct file *fp, off_t val, int flags)
sys/kern/vfs_vnops.c
970
fp->f_offset = val;
sys/kern/vfs_vnops.c
972
fp->f_nextoff[UIO_READ] = val;
sys/kern/vfs_vnops.c
974
fp->f_nextoff[UIO_WRITE] = val;
sys/kgssapi/gssd_prot.c
46
char *val;
sys/kgssapi/gssd_prot.c
50
val = buf->value;
sys/kgssapi/gssd_prot.c
51
if (!xdr_bytes(xdrs, &val, &len, ~0))
sys/kgssapi/gssd_prot.c
54
buf->value = val;
sys/kgssapi/gssd_prot.c
62
char *val;
sys/kgssapi/gssd_prot.c
66
val = oid->elements;
sys/kgssapi/gssd_prot.c
67
if (!xdr_bytes(xdrs, &val, &len, ~0))
sys/kgssapi/gssd_prot.c
70
oid->elements = val;
sys/libkern/inet_aton.c
110
if (val > 0xffffff || parts[0] > 0xff)
sys/libkern/inet_aton.c
112
val |= parts[0] << 24;
sys/libkern/inet_aton.c
116
if (val > 0xffff || parts[0] > 0xff || parts[1] > 0xff)
sys/libkern/inet_aton.c
118
val |= (parts[0] << 24) | (parts[1] << 16);
sys/libkern/inet_aton.c
122
if (val > 0xff || parts[0] > 0xff || parts[1] > 0xff ||
sys/libkern/inet_aton.c
125
val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
sys/libkern/inet_aton.c
130
addr->s_addr = htonl(val);
sys/libkern/inet_aton.c
40
in_addr_t val;
sys/libkern/inet_aton.c
61
val = (in_addr_t)l;
sys/libkern/inet_aton.c
71
parts[n] = val;
sys/libkern/inet_pton.c
131
u_int val;
sys/libkern/inet_pton.c
142
val = 0;
sys/libkern/inet_pton.c
149
val <<= 4;
sys/libkern/inet_pton.c
150
val |= (pch - xdigits);
sys/libkern/inet_pton.c
167
*tp++ = (u_char) (val >> 8) & 0xff;
sys/libkern/inet_pton.c
168
*tp++ = (u_char) val & 0xff;
sys/libkern/inet_pton.c
170
val = 0;
sys/libkern/inet_pton.c
184
*tp++ = (u_char) (val >> 8) & 0xff;
sys/libkern/inet_pton.c
185
*tp++ = (u_char) val & 0xff;
sys/net/altq/altq_codel.c
365
uint64_t val;
sys/net/altq/altq_codel.c
374
val = (3LL << 32) - ((u_int64_t)vars->count * invsqrt2);
sys/net/altq/altq_codel.c
375
val >>= 2; /* avoid overflow in following multiply */
sys/net/altq/altq_codel.c
376
val = (val * invsqrt) >> (32 - 2 + 1);
sys/net/altq/altq_codel.c
378
vars->rec_inv_sqrt = val >> REC_INV_SQRT_SHIFT;
sys/net/altq/altq_red.c
605
int32_t val;
sys/net/altq/altq_red.c
610
val = 1 << FP_SHIFT;
sys/net/altq/altq_red.c
612
return (val);
sys/net/altq/altq_red.c
618
val = (val * w->w_tab[i]) >> FP_SHIFT;
sys/net/altq/altq_red.c
624
return (val);
sys/net/altq/altq_subr.c
978
u_int64_t val;
sys/net/altq/altq_subr.c
982
val = rdtsc();
sys/net/altq/altq_subr.c
991
val = (((u_int64_t)(tv.tv_sec - boottime.tv_sec) * 1000000
sys/net/altq/altq_subr.c
994
return (val);
sys/net/ieee8023ad_lacp.h
42
#define LACP_TIMER_ARM(port, timer, val) \
sys/net/ieee8023ad_lacp.h
43
(port)->lp_timer[(timer)] = (val)
sys/net/if_arp.h
124
#define ARPSTAT_ADD(name, val) \
sys/net/if_arp.h
125
VNET_PCPUSTAT_ADD(struct arpstat, arpstat, name, (val))
sys/net/if_arp.h
126
#define ARPSTAT_SUB(name, val) ARPSTAT_ADD(name, -(val))
sys/net/if_lagg.c
1116
oldval = lp->port_counters.val[cnt];
sys/net/if_lagg.c
1134
vsum += sc->detached_counters.val[cnt];
sys/net/if_lagg.c
861
pval = lp->port_counters.val;
sys/net/if_lagg.c
958
pval = lp->port_counters.val;
sys/net/if_lagg.c
961
sc->detached_counters.val[i] += vdiff;
sys/net/if_lagg.h
229
uint64_t val[IFCOUNTERS];
sys/net/if_ovpn.c
253
#define OVPN_COUNTER_ADD(sc, name, val) \
sys/net/if_ovpn.c
254
counter_u64_add(OVPN_COUNTER(sc, name), val)
sys/net/if_ovpn.c
255
#define OVPN_PEER_COUNTER_ADD(p, name, val) \
sys/net/if_ovpn.c
256
counter_u64_add(OVPN_PEER_COUNTER(p, name), val)
sys/net/if_vxlan.c
1010
int val = 1;
sys/net/if_vxlan.c
1016
sopt.sopt_val = &val;
sys/net/if_vxlan.c
1017
sopt.sopt_valsize = sizeof(val);
sys/net/mppcc.c
105
putbits24(uint8_t *buf, uint32_t val, const uint32_t n, uint32_t *i, uint32_t *l)
sys/net/mppcc.c
111
val <<= *l;
sys/net/mppcc.c
112
*buf = *buf | ((val >> 16) & 0xff);
sys/net/mppcc.c
113
*(++buf) = (val >> 8) & 0xff;
sys/net/mppcc.c
114
*(++buf) = val & 0xff;
sys/net/mppcc.c
123
val <<= *l;
sys/net/mppcc.c
124
*buf = *buf | ((val >> 24) & 0xff);
sys/net/mppcc.c
125
*(++buf) = (val >> 16) & 0xff;
sys/net/mppcc.c
126
*(++buf) = (val >> 8) & 0xff;
sys/net/mppcc.c
127
*(++buf) = val & 0xff;
sys/net/mppcc.c
56
putbits8(uint8_t *buf, uint32_t val, const uint32_t n, uint32_t *i, uint32_t *l)
sys/net/mppcc.c
61
val <<= *l;
sys/net/mppcc.c
62
*buf = *buf | (val & 0xff);
sys/net/mppcc.c
71
val <<= *l;
sys/net/mppcc.c
72
*buf = *buf | ((val >> 8) & 0xff);
sys/net/mppcc.c
73
*(++buf) = val & 0xff;
sys/net/mppcc.c
79
putbits16(uint8_t *buf, uint32_t val, const uint32_t n, uint32_t *i, uint32_t *l)
sys/net/mppcc.c
85
val <<= *l;
sys/net/mppcc.c
86
*buf = *buf | ((val >> 8) & 0xff);
sys/net/mppcc.c
87
*(++buf) = val & 0xff;
sys/net/mppcc.c
96
val <<= *l;
sys/net/mppcc.c
97
*buf = *buf | ((val >> 16) & 0xff);
sys/net/mppcc.c
98
*(++buf) = (val >> 8) & 0xff;
sys/net/mppcc.c
99
*(++buf) = val & 0xff;
sys/net/mppcd.c
107
uint32_t olen, off, len, bits, val, sig, i, l;
sys/net/mppcd.c
122
val = getbyte(isrc, i++, l);
sys/net/mppcd.c
123
if (val < 0x80) { /* literal byte < 0x80 */
sys/net/mppcd.c
126
(state->hist)[(state->histptr)++] = (uint8_t) val;
sys/net/mppcd.c
137
sig = val & 0xc0;
sys/net/mppcd.c
142
(uint8_t) (0x80|((val&0x3f)<<1)|getbits(isrc, 1 , &i ,&l));
sys/net/mppcd.c
155
sig = val & 0xf0;
sys/net/mppcd.c
157
off = (((val&0x0f)<<2)|getbits(isrc, 2 , &i ,&l));
sys/net/mppcd.c
161
off = ((((val&0x0f)<<4)|getbits(isrc, 4 , &i ,&l))+64);
sys/net/mppcd.c
165
off = ((((val&0x1f)<<8)|getbyte(isrc, i++, l))+320);
sys/net/mppcd.c
178
val = getbyte(isrc, i, l);
sys/net/mppcd.c
179
if ((val & 0x80) == 0x00) { /* len = 3 */
sys/net/mppcd.c
183
} else if ((val & 0xc0) == 0x80) { /* 4 <= len < 8 */
sys/net/mppcd.c
184
len = 0x04 | ((val>>4) & 0x03);
sys/net/mppcd.c
187
} else if ((val & 0xe0) == 0xc0) { /* 8 <= len < 16 */
sys/net/mppcd.c
188
len = 0x08 | ((val>>2) & 0x07);
sys/net/mppcd.c
191
} else if ((val & 0xf0) == 0xe0) { /* 16 <= len < 32 */
sys/net/mppcd.c
192
len = 0x10 | (val & 0x0f);
sys/net/mppcd.c
197
val = (val << 8) | getbyte(isrc, ++i, l);
sys/net/mppcd.c
198
if ((val & 0xf800) == 0xf000) { /* 32 <= len < 64 */
sys/net/mppcd.c
199
len = 0x0020 | ((val >> 6) & 0x001f);
sys/net/mppcd.c
202
} else if ((val & 0xfc00) == 0xf800) { /* 64 <= len < 128 */
sys/net/mppcd.c
203
len = 0x0040 | ((val >> 4) & 0x003f);
sys/net/mppcd.c
206
} else if ((val & 0xfe00) == 0xfc00) { /* 128 <= len < 256 */
sys/net/mppcd.c
207
len = 0x0080 | ((val >> 2) & 0x007f);
sys/net/mppcd.c
210
} else if ((val & 0xff00) == 0xfe00) { /* 256 <= len < 512 */
sys/net/mppcd.c
211
len = 0x0100 | (val & 0x00ff);
sys/net/mppcd.c
216
val = (val << 8) | getbyte(isrc, ++i, l);
sys/net/mppcd.c
217
if ((val & 0xff8000) == 0xff0000) { /* 512 <= len < 1024 */
sys/net/mppcd.c
218
len = 0x000200 | ((val >> 6) & 0x0001ff);
sys/net/mppcd.c
221
} else if ((val & 0xffc000) == 0xff8000) {/* 1024 <= len < 2048 */
sys/net/mppcd.c
222
len = 0x000400 | ((val >> 4) & 0x0003ff);
sys/net/mppcd.c
225
} else if ((val & 0xffe000) == 0xffc000) {/* 2048 <= len < 4096 */
sys/net/mppcd.c
226
len = 0x000800 | ((val >> 2) & 0x0007ff);
sys/net/mppcd.c
229
} else if ((val & 0xfff000) == 0xffe000) {/* 4096 <= len < 8192 */
sys/net/mppcd.c
230
len = 0x001000 | (val & 0x000fff);
sys/net/pfvar.h
144
u_int32_t val;
sys/net/pfvar.h
148
val = atomic_load_int(&pcpu->current);
sys/net/pfvar.h
149
atomic_store_int(&pcpu->current, val + n);
sys/net/pfvar.h
166
u_int32_t val;
sys/net/pfvar.h
174
val = atomic_load_int(&pcpu->current);
sys/net/pfvar.h
175
sum += (uint32_t)(val - pcpu->snapshot);
sys/net/pfvar.h
176
pcpu->snapshot = val;
sys/net/route/route_var.h
132
#define RTSTAT_ADD(name, val) \
sys/net/route/route_var.h
133
VNET_PCPUSTAT_ADD(struct rtstat, rtstat, name, (val))
sys/net80211/ieee80211_crypto_gcm.c
100
WPA_PUT_BE32(v + 12, val);
sys/net80211/ieee80211_crypto_gcm.c
102
val = WPA_GET_BE32(v + 8);
sys/net80211/ieee80211_crypto_gcm.c
103
val >>= 1;
sys/net80211/ieee80211_crypto_gcm.c
105
val |= 0x80000000;
sys/net80211/ieee80211_crypto_gcm.c
106
WPA_PUT_BE32(v + 8, val);
sys/net80211/ieee80211_crypto_gcm.c
108
val = WPA_GET_BE32(v + 4);
sys/net80211/ieee80211_crypto_gcm.c
109
val >>= 1;
sys/net80211/ieee80211_crypto_gcm.c
111
val |= 0x80000000;
sys/net80211/ieee80211_crypto_gcm.c
112
WPA_PUT_BE32(v + 4, val);
sys/net80211/ieee80211_crypto_gcm.c
114
val = WPA_GET_BE32(v);
sys/net80211/ieee80211_crypto_gcm.c
115
val >>= 1;
sys/net80211/ieee80211_crypto_gcm.c
116
WPA_PUT_BE32(v, val);
sys/net80211/ieee80211_crypto_gcm.c
54
void WPA_PUT_BE64(uint8_t *a, uint64_t val)
sys/net80211/ieee80211_crypto_gcm.c
56
a[0] = val >> 56;
sys/net80211/ieee80211_crypto_gcm.c
57
a[1] = val >> 48;
sys/net80211/ieee80211_crypto_gcm.c
58
a[2] = val >> 40;
sys/net80211/ieee80211_crypto_gcm.c
59
a[3] = val >> 32;
sys/net80211/ieee80211_crypto_gcm.c
60
a[4] = val >> 24;
sys/net80211/ieee80211_crypto_gcm.c
61
a[5] = val >> 16;
sys/net80211/ieee80211_crypto_gcm.c
62
a[6] = val >> 8;
sys/net80211/ieee80211_crypto_gcm.c
63
a[7] = val & 0xff;
sys/net80211/ieee80211_crypto_gcm.c
67
WPA_PUT_BE32(uint8_t *a, uint32_t val)
sys/net80211/ieee80211_crypto_gcm.c
69
a[0] = (val >> 24) & 0xff;
sys/net80211/ieee80211_crypto_gcm.c
70
a[1] = (val >> 16) & 0xff;
sys/net80211/ieee80211_crypto_gcm.c
71
a[2] = (val >> 8) & 0xff;
sys/net80211/ieee80211_crypto_gcm.c
72
a[3] = val & 0xff;
sys/net80211/ieee80211_crypto_gcm.c
84
uint32_t val;
sys/net80211/ieee80211_crypto_gcm.c
86
val = WPA_GET_BE32(block + AES_BLOCK_LEN - 4);
sys/net80211/ieee80211_crypto_gcm.c
87
val++;
sys/net80211/ieee80211_crypto_gcm.c
88
WPA_PUT_BE32(block + AES_BLOCK_LEN - 4, val);
sys/net80211/ieee80211_crypto_gcm.c
94
uint32_t val;
sys/net80211/ieee80211_crypto_gcm.c
96
val = WPA_GET_BE32(v + 12);
sys/net80211/ieee80211_crypto_gcm.c
97
val >>= 1;
sys/net80211/ieee80211_crypto_gcm.c
99
val |= 0x80000000;
sys/net80211/ieee80211_crypto_tkip.c
517
static __inline u16 RotR1(u16 val)
sys/net80211/ieee80211_crypto_tkip.c
519
return (val >> 1) | (val << 15);
sys/net80211/ieee80211_crypto_tkip.c
522
static __inline u8 Lo8(u16 val)
sys/net80211/ieee80211_crypto_tkip.c
524
return val & 0xff;
sys/net80211/ieee80211_crypto_tkip.c
527
static __inline u8 Hi8(u16 val)
sys/net80211/ieee80211_crypto_tkip.c
529
return val >> 8;
sys/net80211/ieee80211_crypto_tkip.c
532
static __inline u16 Lo16(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
534
return val & 0xffff;
sys/net80211/ieee80211_crypto_tkip.c
537
static __inline u16 Hi16(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
539
return val >> 16;
sys/net80211/ieee80211_crypto_tkip.c
791
static __inline u32 rotl(u32 val, int bits)
sys/net80211/ieee80211_crypto_tkip.c
793
return (val << bits) | (val >> (32 - bits));
sys/net80211/ieee80211_crypto_tkip.c
796
static __inline u32 rotr(u32 val, int bits)
sys/net80211/ieee80211_crypto_tkip.c
798
return (val >> bits) | (val << (32 - bits));
sys/net80211/ieee80211_crypto_tkip.c
801
static __inline u32 xswap(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
803
return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
sys/net80211/ieee80211_scan_sta.c
977
match_id(const uint8_t *ie, const uint8_t *val, int len)
sys/net80211/ieee80211_scan_sta.c
979
return (ie[1] == len && memcmp(ie+2, val, len) == 0);
sys/net80211/ieee80211_vht.c
325
uint32_t val, val1, val2;
sys/net80211/ieee80211_vht.c
342
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
345
val = IEEE80211_VHT_MCS_NOT_SUPPORTED;
sys/net80211/ieee80211_vht.c
346
tx_mcs_map |= (val << (i*2));
sys/net80211/ieee80211_vht.c
401
uint32_t val, val1, val2;
sys/net80211/ieee80211_vht.c
424
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
425
new_vhtcap |= _IEEE80211_SHIFTMASK(val, IEEE80211_VHTCAP_MAX_MPDU_MASK);
sys/net80211/ieee80211_vht.c
440
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
441
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
451
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
452
new_vhtcap |= _IEEE80211_SHIFTMASK(val, IEEE80211_VHTCAP_RXLDPC);
sys/net80211/ieee80211_vht.c
461
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
462
new_vhtcap |= _IEEE80211_SHIFTMASK(val, IEEE80211_VHTCAP_SHORT_GI_80);
sys/net80211/ieee80211_vht.c
471
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
472
new_vhtcap |= _IEEE80211_SHIFTMASK(val, IEEE80211_VHTCAP_SHORT_GI_160);
sys/net80211/ieee80211_vht.c
497
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
499
val = 0;
sys/net80211/ieee80211_vht.c
500
new_vhtcap |= _IEEE80211_SHIFTMASK(val, IEEE80211_VHTCAP_TXSTBC);
sys/net80211/ieee80211_vht.c
510
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
512
val = 0;
sys/net80211/ieee80211_vht.c
513
new_vhtcap |= _IEEE80211_SHIFTMASK(val, IEEE80211_VHTCAP_RXSTBC_MASK);
sys/net80211/ieee80211_vht.c
520
if (val == 0)
sys/net80211/ieee80211_vht.c
539
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
540
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
550
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
551
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
561
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
563
val = 0;
sys/net80211/ieee80211_vht.c
564
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
573
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
575
val = 0;
sys/net80211/ieee80211_vht.c
576
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
588
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
590
val = 0;
sys/net80211/ieee80211_vht.c
592
val = 0;
sys/net80211/ieee80211_vht.c
593
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
605
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
607
val = 0;
sys/net80211/ieee80211_vht.c
609
val = 0;
sys/net80211/ieee80211_vht.c
610
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
619
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
620
new_vhtcap |= _IEEE80211_SHIFTMASK(val, IEEE80211_VHTCAP_VHT_TXOP_PS);
sys/net80211/ieee80211_vht.c
628
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
629
new_vhtcap |= _IEEE80211_SHIFTMASK(val, IEEE80211_VHTCAP_HTC_VHT);
sys/net80211/ieee80211_vht.c
638
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
639
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
651
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
653
val = 0;
sys/net80211/ieee80211_vht.c
654
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
668
val = MAX(val1, val2);
sys/net80211/ieee80211_vht.c
669
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
678
val = MAX(val1, val2);
sys/net80211/ieee80211_vht.c
679
new_vhtcap |= _IEEE80211_SHIFTMASK(val,
sys/net80211/ieee80211_vht.c
709
val = MIN(val1, val2);
sys/net80211/ieee80211_vht.c
711
val = 3;
sys/net80211/ieee80211_vht.c
713
vhtcap->supp_mcs.tx_mcs_map |= (val << (i*2));
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
237
u_int16_t val; \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
242
o->hdr.length = sizeof(o->val); \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
243
o->val = htole16(*(u_int16_t *)(_mtu)); \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
252
u_int16_t val; \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
257
o->hdr.length = sizeof(o->val); \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
258
o->val = htole16(*(u_int16_t *)(_flush_timo)); \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
267
ng_l2cap_flow_t val; \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
272
o->hdr.length = sizeof(o->val); \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
273
o->val.flags = ((ng_l2cap_flow_p)(_flow))->flags; \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
274
o->val.service_type = ((ng_l2cap_flow_p) \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
276
o->val.token_rate = \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
278
o->val.token_bucket_size = \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
281
o->val.peak_bandwidth = \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
284
o->val.latency = htole32(((ng_l2cap_flow_p) \
sys/netgraph/bluetooth/l2cap/ng_l2cap_cmds.h
286
o->val.delay_variation = \
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1415
ng_l2cap_cfg_opt_val_p val)
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1436
m_copydata(m, *off, NG_L2CAP_OPT_MTU_SIZE, (caddr_t) val);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1437
val->mtu = le16toh(val->mtu);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1446
m_copydata(m, *off, NG_L2CAP_OPT_FLUSH_TIMO_SIZE, (caddr_t)val);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1447
val->flush_timo = le16toh(val->flush_timo);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1455
m_copydata(m, *off, NG_L2CAP_OPT_QOS_SIZE, (caddr_t) val);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1456
val->flow.token_rate = le32toh(val->flow.token_rate);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1457
val->flow.token_bucket_size =
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1458
le32toh(val->flow.token_bucket_size);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1459
val->flow.peak_bandwidth = le32toh(val->flow.peak_bandwidth);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1460
val->flow.latency = le32toh(val->flow.latency);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
1461
val->flow.delay_variation = le32toh(val->flow.delay_variation);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
651
ng_l2cap_cfg_opt_val_t val;
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
690
error = get_next_l2cap_opt(m, &off, &hdr, &val);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
697
ch->omtu = val.mtu;
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
701
ch->flush_timo = val.flush_timo;
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
705
bcopy(&val.flow, &ch->iflow, sizeof(ch->iflow));
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
784
ng_l2cap_cfg_opt_val_t val;
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
846
error = get_next_l2cap_opt(m, &off, &hdr, &val);
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
852
cmd->ch->imtu = val.mtu;
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
856
cmd->ch->flush_timo = val.flush_timo;
sys/netgraph/bluetooth/l2cap/ng_l2cap_evnt.c
860
bcopy(&val.flow, &cmd->ch->oflow,
sys/netgraph/netgraph.h
158
#define _NG_HOOK_SET_PRIVATE(hook, val) do {(hook)->hk_private = val;} while (0)
sys/netgraph/netgraph.h
159
#define _NG_HOOK_SET_RCVMSG(hook, val) do {(hook)->hk_rcvmsg = val;} while (0)
sys/netgraph/netgraph.h
160
#define _NG_HOOK_SET_RCVDATA(hook, val) do {(hook)->hk_rcvdata = val;} while (0)
sys/netgraph/netgraph.h
186
void * val, char * file, int line);
sys/netgraph/netgraph.h
188
ng_rcvmsg_t *val, char * file, int line);
sys/netgraph/netgraph.h
190
ng_rcvdata_t *val, char * file, int line);
sys/netgraph/netgraph.h
236
_ng_hook_set_private(hook_p hook, void *val, char * file, int line)
sys/netgraph/netgraph.h
239
_NG_HOOK_SET_PRIVATE(hook, val);
sys/netgraph/netgraph.h
243
_ng_hook_set_rcvmsg(hook_p hook, ng_rcvmsg_t *val, char * file, int line)
sys/netgraph/netgraph.h
246
_NG_HOOK_SET_RCVMSG(hook, val);
sys/netgraph/netgraph.h
250
_ng_hook_set_rcvdata(hook_p hook, ng_rcvdata_t *val, char * file, int line)
sys/netgraph/netgraph.h
253
_NG_HOOK_SET_RCVDATA(hook, val);
sys/netgraph/netgraph.h
322
#define NG_HOOK_SET_PRIVATE(hook, val) _ng_hook_set_private(hook, val, _NN_)
sys/netgraph/netgraph.h
323
#define NG_HOOK_SET_RCVMSG(hook, val) _ng_hook_set_rcvmsg(hook, val, _NN_)
sys/netgraph/netgraph.h
324
#define NG_HOOK_SET_RCVDATA(hook, val) _ng_hook_set_rcvdata(hook, val, _NN_)
sys/netgraph/netgraph.h
340
#define NG_HOOK_SET_PRIVATE(hook, val) _NG_HOOK_SET_PRIVATE(hook, val)
sys/netgraph/netgraph.h
341
#define NG_HOOK_SET_RCVMSG(hook, val) _NG_HOOK_SET_RCVMSG(hook, val)
sys/netgraph/netgraph.h
342
#define NG_HOOK_SET_RCVDATA(hook, val) _NG_HOOK_SET_RCVDATA(hook, val)
sys/netgraph/netgraph.h
419
#define _NG_NODE_SET_PRIVATE(node, val) do {(node)->nd_private = val;} while (0)
sys/netgraph/netgraph.h
457
static __inline void _ng_node_set_private(node_p node, void * val,
sys/netgraph/netgraph.h
515
_ng_node_set_private(node_p node, void * val, char *file, int line)
sys/netgraph/netgraph.h
518
_NG_NODE_SET_PRIVATE(node, val);
sys/netgraph/netgraph.h
590
#define NG_NODE_SET_PRIVATE(node, val) _ng_node_set_private(node, val, _NN_)
sys/netgraph/netgraph.h
609
#define NG_NODE_SET_PRIVATE(node, val) _NG_NODE_SET_PRIVATE(node, val)
sys/netgraph/ng_base.c
3376
int val;
sys/netgraph/ng_base.c
3378
val = allocated;
sys/netgraph/ng_base.c
3379
error = sysctl_handle_int(oidp, &val, 0, req);
sys/netgraph/ng_base.c
3382
if (val == 42) {
sys/netgraph/ng_base.c
953
u_long val;
sys/netgraph/ng_base.c
961
val = strtoul(name + 1, &eptr, 16);
sys/netgraph/ng_base.c
962
if ((eptr - name != len - 1) || (val == ULONG_MAX) || (val == 0))
sys/netgraph/ng_base.c
965
return ((ng_ID_t)val);
sys/netgraph/ng_gif.c
94
#define IFP2NG_SET(ifp, val) (((struct gif_softc *)(ifp->if_softc))->gif_netgraph = (val))
sys/netgraph/ng_ksocket.c
1362
int k, val;
sys/netgraph/ng_ksocket.c
1373
val = (int)strtoul(s, &eptr, 10);
sys/netgraph/ng_ksocket.c
1374
if (val < 0 || *eptr != '\0')
sys/netgraph/ng_ksocket.c
1376
return (val);
sys/netgraph/ng_ksocket.c
292
u_long val;
sys/netgraph/ng_ksocket.c
295
val = strtoul(s + *off, &eptr, 10);
sys/netgraph/ng_ksocket.c
296
if (val > 0xff || eptr == s + *off)
sys/netgraph/ng_ksocket.c
299
((u_char *)&sin->sin_addr)[i] = (u_char)val;
sys/netgraph/ng_ksocket.c
306
val = strtoul(s + *off, &eptr, 10);
sys/netgraph/ng_ksocket.c
307
if (val > 0xffff || eptr == s + *off)
sys/netgraph/ng_ksocket.c
310
sin->sin_port = htons(val);
sys/netgraph/ng_parse.c
1020
u_long val;
sys/netgraph/ng_parse.c
1026
val = strtoul(s + *off, &eptr, 16);
sys/netgraph/ng_parse.c
1027
if (val > 0xff || eptr == s + *off)
sys/netgraph/ng_parse.c
1029
buf[i] = (u_char)val;
sys/netgraph/ng_parse.c
335
long val;
sys/netgraph/ng_parse.c
339
val = strtol(s + *off, &eptr, 0);
sys/netgraph/ng_parse.c
340
if (val < (int8_t)0x80 || val > (u_int8_t)0xff || eptr == s + *off)
sys/netgraph/ng_parse.c
343
val8 = (int8_t)val;
sys/netgraph/ng_parse.c
356
int8_t val;
sys/netgraph/ng_parse.c
358
bcopy(data + *off, &val, sizeof(int8_t));
sys/netgraph/ng_parse.c
362
fval = val;
sys/netgraph/ng_parse.c
366
fval = (u_int8_t)val;
sys/netgraph/ng_parse.c
370
fval = (u_int8_t)val;
sys/netgraph/ng_parse.c
385
int8_t val;
sys/netgraph/ng_parse.c
389
val = 0;
sys/netgraph/ng_parse.c
390
bcopy(&val, buf, sizeof(int8_t));
sys/netgraph/ng_parse.c
430
long val;
sys/netgraph/ng_parse.c
434
val = strtol(s + *off, &eptr, 0);
sys/netgraph/ng_parse.c
435
if (val < (int16_t)0x8000
sys/netgraph/ng_parse.c
436
|| val > (u_int16_t)0xffff || eptr == s + *off)
sys/netgraph/ng_parse.c
439
val16 = (int16_t)val;
sys/netgraph/ng_parse.c
452
int16_t val;
sys/netgraph/ng_parse.c
454
bcopy(data + *off, &val, sizeof(int16_t));
sys/netgraph/ng_parse.c
458
fval = val;
sys/netgraph/ng_parse.c
462
fval = (u_int16_t)val;
sys/netgraph/ng_parse.c
466
fval = (u_int16_t)val;
sys/netgraph/ng_parse.c
481
int16_t val;
sys/netgraph/ng_parse.c
485
val = 0;
sys/netgraph/ng_parse.c
486
bcopy(&val, buf, sizeof(int16_t));
sys/netgraph/ng_parse.c
526
long val; /* assumes long is at least 32 bits */
sys/netgraph/ng_parse.c
531
val = strtol(s + *off, &eptr, 0);
sys/netgraph/ng_parse.c
533
val = strtoul(s + *off, &eptr, 0);
sys/netgraph/ng_parse.c
534
if (val < (int32_t)0x80000000
sys/netgraph/ng_parse.c
535
|| val > (u_int32_t)0xffffffff || eptr == s + *off)
sys/netgraph/ng_parse.c
538
val32 = (int32_t)val;
sys/netgraph/ng_parse.c
551
int32_t val;
sys/netgraph/ng_parse.c
553
bcopy(data + *off, &val, sizeof(int32_t));
sys/netgraph/ng_parse.c
557
fval = val;
sys/netgraph/ng_parse.c
561
fval = (u_int32_t)val;
sys/netgraph/ng_parse.c
565
fval = (u_int32_t)val;
sys/netgraph/ng_parse.c
580
int32_t val;
sys/netgraph/ng_parse.c
584
val = 0;
sys/netgraph/ng_parse.c
585
bcopy(&val, buf, sizeof(int32_t));
sys/netgraph/ng_parse.c
625
quad_t val;
sys/netgraph/ng_parse.c
629
val = strtoq(s + *off, &eptr, 0);
sys/netgraph/ng_parse.c
633
val64 = (int64_t)val;
sys/netgraph/ng_parse.c
645
int64_t val;
sys/netgraph/ng_parse.c
648
bcopy(data + *off, &val, sizeof(int64_t));
sys/netgraph/ng_parse.c
652
fval = val;
sys/netgraph/ng_parse.c
656
fval = (u_int64_t)val;
sys/netgraph/ng_parse.c
660
fval = (u_int64_t)val;
sys/netgraph/ng_parse.c
675
int64_t val;
sys/netgraph/ng_parse.c
679
val = 0;
sys/netgraph/ng_parse.c
680
bcopy(&val, buf, sizeof(int64_t));
sys/netgraph/ng_patch.c
240
conf->ops[i].val.v8 = conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
243
conf->ops[i].val.v8 = conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
246
conf->ops[i].val.v8 = conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
266
conf->ops[i].val.v1 = (uint8_t) conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
269
conf->ops[i].val.v2 = (uint16_t) conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
272
conf->ops[i].val.v4 = (uint32_t) conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
354
union ng_patch_op_val val;
sys/netgraph/ng_patch.c
364
m_copydata(m, offset, privp->conf->ops[i].length, (caddr_t) &val);
sys/netgraph/ng_patch.c
372
val.v1 = privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
375
val.v1 += privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
378
val.v1 -= privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
381
val.v1 *= privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
384
val.v1 /= privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
387
*((int8_t *) &val) = - *((int8_t *) &val);
sys/netgraph/ng_patch.c
390
val.v1 &= privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
393
val.v1 |= privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
396
val.v1 ^= privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
399
val.v1 <<= privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
402
val.v1 >>= privp->conf->ops[i].val.v1;
sys/netgraph/ng_patch.c
408
val.v2 = ntohs(val.v2);
sys/netgraph/ng_patch.c
413
val.v2 = privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
416
val.v2 += privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
419
val.v2 -= privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
422
val.v2 *= privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
425
val.v2 /= privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
428
*((int16_t *) &val) = - *((int16_t *) &val);
sys/netgraph/ng_patch.c
431
val.v2 &= privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
434
val.v2 |= privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
437
val.v2 ^= privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
440
val.v2 <<= privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
443
val.v2 >>= privp->conf->ops[i].val.v2;
sys/netgraph/ng_patch.c
447
val.v2 = htons(val.v2);
sys/netgraph/ng_patch.c
452
val.v4 = ntohl(val.v4);
sys/netgraph/ng_patch.c
457
val.v4 = privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
460
val.v4 += privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
463
val.v4 -= privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
466
val.v4 *= privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
469
val.v4 /= privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
472
*((int32_t *) &val) = - *((int32_t *) &val);
sys/netgraph/ng_patch.c
475
val.v4 &= privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
478
val.v4 |= privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
481
val.v4 ^= privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
484
val.v4 <<= privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
487
val.v4 >>= privp->conf->ops[i].val.v4;
sys/netgraph/ng_patch.c
491
val.v4 = htonl(val.v4);
sys/netgraph/ng_patch.c
496
val.v8 = be64toh(val.v8);
sys/netgraph/ng_patch.c
501
val.v8 = privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
504
val.v8 += privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
507
val.v8 -= privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
510
val.v8 *= privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
513
val.v8 /= privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
516
*((int64_t *) &val) = - *((int64_t *) &val);
sys/netgraph/ng_patch.c
519
val.v8 &= privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
522
val.v8 |= privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
525
val.v8 ^= privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
528
val.v8 <<= privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
531
val.v8 >>= privp->conf->ops[i].val.v8;
sys/netgraph/ng_patch.c
535
val.v8 = htobe64(val.v8);
sys/netgraph/ng_patch.c
540
m_copyback(m, offset, privp->conf->ops[i].length, (caddr_t) &val);
sys/netgraph/ng_patch.h
109
union ng_patch_op_val val;
sys/netgraph/ng_pppoe.c
541
uint16_t val, hash;
sys/netgraph/ng_pppoe.c
545
val = pppoe_sid++;
sys/netgraph/ng_pppoe.c
547
if (val == 0xffff || val == 0x0000)
sys/netgraph/ng_pppoe.c
548
val = pppoe_sid = 1;
sys/netgraph/ng_pppoe.c
551
hash = SESSHASH(val);
sys/netgraph/ng_pppoe.c
554
if (tsp->Session_ID == val)
sys/netgraph/ng_pppoe.c
558
sp->Session_ID = val;
sys/netgraph/ng_pppoe.c
565
CTR2(KTR_NET, "%20s: new sid %d", __func__, val);
sys/netgraph/ng_pppoe.c
567
return (val);
sys/netgraph/ng_source.c
852
uint32_t val;
sys/netgraph/ng_source.c
854
val = htonl(cnt->next_val);
sys/netgraph/ng_source.c
855
cp = (caddr_t)&val + sizeof(val) - cnt->width;
sys/netinet/accf_dns.c
76
#define GET8(p, val) do { \
sys/netinet/accf_dns.c
89
val = *(mtod(p->m, unsigned char *) + (p->offset - p->moff)); \
sys/netinet/accf_dns.c
93
#define GET16(p, val) do { \
sys/netinet/accf_dns.c
97
val = v0 * 0x100 + v1; \
sys/netinet/cc/cc_newreno.c
462
nreno->beta = opt->val;
sys/netinet/cc/cc_newreno.c
465
nreno->beta_ecn = opt->val;
sys/netinet/cc/cc_newreno.c
475
opt->val = nreno->beta;
sys/netinet/cc/cc_newreno.c
478
opt->val = nreno->beta_ecn;
sys/netinet/cc/cc_newreno.h
49
uint32_t val;
sys/netinet/icmp6.h
642
#define ICMP6STAT_ADD(name, val) \
sys/netinet/icmp6.h
644
MIB_SDT_PROBE1(icmp6, count, name, (val)); \
sys/netinet/icmp6.h
645
VNET_PCPUSTAT_ADD(struct icmp6stat, icmp6stat, name, (val)); \
sys/netinet/icmp_var.h
67
#define ICMPSTAT_ADD(name, val) \
sys/netinet/icmp_var.h
69
MIB_SDT_PROBE1(icmp, count, name, (val)); \
sys/netinet/icmp_var.h
70
VNET_PCPUSTAT_ADD(struct icmpstat, icmpstat, name, (val)); \
sys/netinet/igmp_var.h
187
#define IGMPSTAT_ADD(name, val) \
sys/netinet/igmp_var.h
188
VNET_PCPUSTAT_ADD(struct igmpstat, igmpstat, name, (val))
sys/netinet/in_fib_dxr.c
565
uint32_t i, *val;
sys/netinet/in_fib_dxr.c
570
val = (uint32_t *)
sys/netinet/in_fib_dxr.c
572
hash += (*val << 5);
sys/netinet/in_fib_dxr.c
573
hash += (*val >> 5);
sys/netinet/ip_carp.c
257
#define CARPSTATS_ADD(name, val) \
sys/netinet/ip_carp.c
259
sizeof(uint64_t)], (val))
sys/netinet/ip_mroute.h
224
#define MRTSTAT_ADD(name, val) \
sys/netinet/ip_mroute.h
225
VNET_PCPUSTAT_ADD(struct mrtstat, mrtstat, name, (val))
sys/netinet/ip_output.c
1230
#define OPTSET2(bit, val) do { \
sys/netinet/ip_output.c
1232
if (val) \
sys/netinet/ip_var.h
146
#define IPSTAT_ADD(name, val) \
sys/netinet/ip_var.h
148
MIB_SDT_PROBE1(ip, count, name, (val)); \
sys/netinet/ip_var.h
149
VNET_PCPUSTAT_ADD(struct ipstat, ipstat, name, (val)); \
sys/netinet/ip_var.h
151
#define IPSTAT_SUB(name, val) IPSTAT_ADD(name, -(val))
sys/netinet/pim_var.h
63
#define PIMSTAT_ADD(name, val) \
sys/netinet/pim_var.h
64
VNET_PCPUSTAT_ADD(struct pimstat, pimstat, name, (val))
sys/netinet/sctp_asconf.c
2021
sctp_asconf_iterator_ep(struct sctp_inpcb *inp, void *ptr, uint32_t val SCTP_UNUSED)
sys/netinet/sctp_asconf.c
2066
sctp_asconf_iterator_ep_end(struct sctp_inpcb *inp, void *ptr, uint32_t val SCTP_UNUSED)
sys/netinet/sctp_asconf.c
2098
void *ptr, uint32_t val SCTP_UNUSED)
sys/netinet/sctp_asconf.c
2260
sctp_asconf_iterator_end(void *ptr, uint32_t val SCTP_UNUSED)
sys/netinet/sctp_asconf.h
61
uint32_t val);
sys/netinet/sctp_asconf.h
66
extern void sctp_asconf_iterator_end(void *ptr, uint32_t val);
sys/netinet/sctp_indata.c
2399
uint8_t val;
sys/netinet/sctp_indata.c
2414
val = asoc->nr_mapping_array[slide_from] | asoc->mapping_array[slide_from];
sys/netinet/sctp_indata.c
2415
if (val == 0xff) {
sys/netinet/sctp_indata.c
2419
at += sctp_map_lookup_tab[val];
sys/netinet/sctp_kdtrace.c
140
SDT_PROBE_DEFINE4(sctp, rwnd, assoc, val,
sys/netinet/sctp_kdtrace.c
151
SDT_PROBE_DEFINE5(sctp, flightsize, net, val,
sys/netinet/sctp_kdtrace.c
164
SDT_PROBE_DEFINE4(sctp, flightsize, assoc, val,
sys/netinet/sctp_kdtrace.h
77
SDT_PROBE_DECLARE(sctp, rwnd, assoc, val);
sys/netinet/sctp_kdtrace.h
79
SDT_PROBE_DECLARE(sctp, flightsize, net, val);
sys/netinet/sctp_kdtrace.h
81
SDT_PROBE_DECLARE(sctp, flightsize, assoc, val);
sys/netinet/sctp_os_bsd.h
460
#define SCTP_SAVE_ATOMIC_DECREMENT(addr, val) \
sys/netinet/sctp_os_bsd.h
463
oldval = atomic_fetchadd_int(addr, -val); \
sys/netinet/sctp_os_bsd.h
464
if (oldval < val) { \
sys/netinet/sctp_os_bsd.h
469
#define SCTP_SAVE_ATOMIC_DECREMENT(addr, val) \
sys/netinet/sctp_os_bsd.h
472
oldval = atomic_fetchadd_int(addr, -val); \
sys/netinet/sctp_os_bsd.h
473
if (oldval < val) { \
sys/netinet/sctp_output.c
6660
uint32_t val SCTP_UNUSED)
sys/netinet/sctp_output.c
6841
sctp_sendall_completes(void *ptr, uint32_t val SCTP_UNUSED)
sys/netinet/sctp_pcb.c
3176
(*it->function_atend) (it->pointer, it->val);
sys/netinet/sctp_pcb.c
5764
(*it->function_atend) (it->pointer, it->val);
sys/netinet/sctp_pcb.c
6936
it->val = argi;
sys/netinet/sctp_structs.h
103
uint32_t val);
sys/netinet/sctp_structs.h
104
typedef int (*inp_func) (struct sctp_inpcb *, void *ptr, uint32_t val);
sys/netinet/sctp_structs.h
105
typedef void (*end_func) (void *ptr, uint32_t val);
sys/netinet/sctp_structs.h
161
uint32_t val; /* value for apply func to use */
sys/netinet/sctp_usrreq.c
1509
int error, val = 0;
sys/netinet/sctp_usrreq.c
1535
val = sctp_is_feature_on(inp, SCTP_PCB_FLAGS_NO_FRAGMENT);
sys/netinet/sctp_usrreq.c
1538
val = sctp_is_feature_on(inp, SCTP_PCB_FLAGS_NEEDS_MAPPED_V4);
sys/netinet/sctp_usrreq.c
1543
val = sctp_is_feature_on(inp, SCTP_PCB_FLAGS_AUTO_ASCONF);
sys/netinet/sctp_usrreq.c
1551
val = sctp_is_feature_on(inp, SCTP_PCB_FLAGS_EXPLICIT_EOR);
sys/netinet/sctp_usrreq.c
1554
val = sctp_is_feature_on(inp, SCTP_PCB_FLAGS_NODELAY);
sys/netinet/sctp_usrreq.c
1557
val = sctp_is_feature_on(inp, SCTP_PCB_FLAGS_EXT_RCVINFO);
sys/netinet/sctp_usrreq.c
1561
val = sctp_ticks_to_secs(inp->sctp_ep.auto_close_time);
sys/netinet/sctp_usrreq.c
1563
val = 0;
sys/netinet/sctp_usrreq.c
1570
if (*optsize < sizeof(val)) {
sys/netinet/sctp_usrreq.c
1578
*(int *)optval = val;
sys/netinet/sctp_usrreq.c
1579
*optsize = sizeof(val);
sys/netinet/sctp_var.h
221
#define sctp_ucount_incr(val) { \
sys/netinet/sctp_var.h
222
val++; \
sys/netinet/sctp_var.h
225
#define sctp_ucount_decr(val) { \
sys/netinet/sctp_var.h
226
if (val > 0) { \
sys/netinet/sctp_var.h
227
val--; \
sys/netinet/sctp_var.h
229
val = 0; \
sys/netinet/sctputil.c
1472
(*it->function_atend) (it->pointer, it->val);
sys/netinet/sctputil.c
1505
inp_skip = (*it->function_inp) (it->inp, it->pointer, it->val);
sys/netinet/sctputil.c
1516
it->val);
sys/netinet/sctputil.c
1572
(*it->function_assoc) (it->inp, it->stcb, it->pointer, it->val);
sys/netinet/sctputil.c
1594
it->val);
sys/netinet/sctputil.c
947
sctp_get_prev_mtu(uint32_t val)
sys/netinet/sctputil.c
951
val &= 0xfffffffc;
sys/netinet/sctputil.c
952
if (val <= sctp_mtu_sizes[0]) {
sys/netinet/sctputil.c
953
return (val);
sys/netinet/sctputil.c
956
if (val <= sctp_mtu_sizes[i]) {
sys/netinet/sctputil.c
972
sctp_get_next_mtu(uint32_t val)
sys/netinet/sctputil.c
977
val &= 0xfffffffc;
sys/netinet/sctputil.c
979
if (val < sctp_mtu_sizes[i]) {
sys/netinet/sctputil.c
985
return (val);
sys/netinet/tcp_hostcache.c
829
int error, val;
sys/netinet/tcp_hostcache.c
831
val = 0;
sys/netinet/tcp_hostcache.c
832
error = sysctl_handle_int(oidp, &val, 0, req);
sys/netinet/tcp_hostcache.c
836
if (val == 2)
sys/netinet/tcp_input.c
245
kmod_tcpstat_add(int statnum, int val)
sys/netinet/tcp_input.c
248
counter_u64_add(VNET(tcpstat)[statnum], val);
sys/netinet/tcp_log_buf.c
3002
uint32_t val, ecr;
sys/netinet/tcp_log_buf.c
3113
bcopy(tlm_buf->tlb_opts + i + 2, &val,
sys/netinet/tcp_log_buf.c
3117
db_printf("TS val %u ecr %u", ntohl(val),
sys/netinet/tcp_stacks/bbr.c
10736
uint16_t val = 0;
sys/netinet/tcp_stacks/bbr.c
10757
val = 1;
sys/netinet/tcp_stacks/bbr.c
10774
val = 2;
sys/netinet/tcp_stacks/bbr.c
10783
val = 3;
sys/netinet/tcp_stacks/bbr.c
10788
if (val)
sys/netinet/tcp_stacks/bbr.c
10789
bbr_log_rtt_shrinks(bbr, cts, cur_rttp, newval, __LINE__, BBR_RTTS_RESETS_VALUES, val);
sys/netinet/tcp_stacks/bbr.c
3785
uint64_t val, lr2use;
sys/netinet/tcp_stacks/bbr.c
3790
val = ((uint64_t)bbr_get_rtt(bbr, BBR_RTT_PROP) * (uint64_t)1000);
sys/netinet/tcp_stacks/bbr.c
3791
val /= bbr_get_rtt(bbr, BBR_SRTT);
sys/netinet/tcp_stacks/bbr.c
3792
ratio = (uint32_t)val;
sys/netinet/tcp_stacks/bbr.c
3841
val = (uint64_t)cwnd * lr2use;
sys/netinet/tcp_stacks/bbr.c
3842
val /= 1000;
sys/netinet/tcp_stacks/bbr.c
3843
if (cwnd > val)
sys/netinet/tcp_stacks/bbr.c
3844
newcwnd = roundup((cwnd - val), maxseg);
sys/netinet/tcp_stacks/bbr.c
3848
val = (uint64_t)cwnd * (uint64_t)bbr_red_mul;
sys/netinet/tcp_stacks/bbr.c
3849
val /= (uint64_t)bbr_red_div;
sys/netinet/tcp_stacks/bbr.c
3850
newcwnd = roundup((uint32_t)val, maxseg);
sys/netinet/tcp_stacks/bbr.c
3874
bbr_log_type_cwndupd(bbr, bbr_red_mul, bbr_red_div, val, 22,
sys/netinet/tcp_stacks/rack.c
15308
uint32_t val;
sys/netinet/tcp_stacks/rack.c
15320
val = htonl(ae->ts_value);
sys/netinet/tcp_stacks/rack.c
15321
bcopy((char *)&val,
sys/netinet/tcp_stacks/rack.c
15323
val = htonl(ae->ts_echo);
sys/netinet/tcp_stacks/rack.c
15324
bcopy((char *)&val,
sys/netinet/tcp_stacks/rack.c
22808
uint64_t val;
sys/netinet/tcp_stacks/rack.c
22902
opt.val = optval;
sys/netinet/tcp_stacks/rack.c
23163
val = optval;
sys/netinet/tcp_stacks/rack.c
23165
val *= 1000;
sys/netinet/tcp_stacks/rack.c
23166
val /= 8;
sys/netinet/tcp_stacks/rack.c
23167
rack->r_ctl.init_rate = val;
sys/netinet/tcp_stacks/rack.c
23373
uint8_t val;
sys/netinet/tcp_stacks/rack.c
23374
val = optval & 0x0000ff;
sys/netinet/tcp_stacks/rack.c
23375
rack->r_ctl.rack_per_upper_bound_ca = val;
sys/netinet/tcp_stacks/rack.c
23376
val = (optval >> 16) & 0x0000ff;
sys/netinet/tcp_stacks/rack.c
23377
rack->r_ctl.rack_per_upper_bound_ss = val;
sys/netinet/tcp_stacks/rack.c
24297
uint64_t val, loptval;
sys/netinet/tcp_stacks/rack.c
24482
val = rack->r_ctl.init_rate;
sys/netinet/tcp_stacks/rack.c
24484
val *= 8;
sys/netinet/tcp_stacks/rack.c
24485
val /= 1000;
sys/netinet/tcp_stacks/rack.c
24486
optval = (uint32_t)val;
sys/netinet/tcp_stacks/rack.c
3855
uint32_t logged, new_per, ss_red, ca_red, rec_red, alt, val;
sys/netinet/tcp_stacks/rack.c
3877
val = alt;
sys/netinet/tcp_stacks/rack.c
3879
val = new_per;
sys/netinet/tcp_stacks/rack.c
3881
val = new_per = alt = rack_get_decrease(rack, rack->r_ctl.rack_per_of_gp_rec, rtt_diff);
sys/netinet/tcp_stacks/rack.c
3882
if (rack->r_ctl.rack_per_of_gp_rec > val) {
sys/netinet/tcp_stacks/rack.c
3883
rec_red = (rack->r_ctl.rack_per_of_gp_rec - val);
sys/netinet/tcp_stacks/rack.c
3884
rack->r_ctl.rack_per_of_gp_rec = (uint16_t)val;
sys/netinet/tcp_stacks/rack.c
3899
val = alt;
sys/netinet/tcp_stacks/rack.c
3901
val = new_per;
sys/netinet/tcp_stacks/rack.c
3903
val = new_per = alt = rack_get_decrease(rack, rack->r_ctl.rack_per_of_gp_ss, rtt_diff);
sys/netinet/tcp_stacks/rack.c
3905
ss_red = rack->r_ctl.rack_per_of_gp_ss - val;
sys/netinet/tcp_stacks/rack.c
3906
rack->r_ctl.rack_per_of_gp_ss = (uint16_t)val;
sys/netinet/tcp_stacks/rack.c
3932
val = alt;
sys/netinet/tcp_stacks/rack.c
3934
val = new_per;
sys/netinet/tcp_stacks/rack.c
3936
val = new_per = alt = rack_get_decrease(rack, rack->r_ctl.rack_per_of_gp_ca, rtt_diff);
sys/netinet/tcp_stacks/rack.c
3937
if (rack->r_ctl.rack_per_of_gp_ca > val) {
sys/netinet/tcp_stacks/rack.c
3938
ca_red = rack->r_ctl.rack_per_of_gp_ca - val;
sys/netinet/tcp_stacks/rack.c
3939
rack->r_ctl.rack_per_of_gp_ca = (uint16_t)val;
sys/netinet/tcp_stacks/rack.c
633
old_beta = opt.val;
sys/netinet/tcp_stacks/rack.c
640
old_beta_ecn = opt.val;
sys/netinet/tcp_stacks/rack.c
645
opt.val = rack->r_ctl.rc_saved_beta;
sys/netinet/tcp_stacks/rack.c
652
opt.val = rack->r_ctl.rc_saved_beta_ecn;
sys/netinet/tcp_stacks/rack.c
8697
uint32_t val;
sys/netinet/tcp_stacks/rack.c
8699
val = rack_probertt_lower_within * rack_time_between_probertt;
sys/netinet/tcp_stacks/rack.c
8700
val /= 100;
sys/netinet/tcp_stacks/rack.c
8703
((us_cts - rack->r_ctl.rc_lower_rtt_us_cts) >= (rack_time_between_probertt - val))) {
sys/netinet/tcp_subr.c
4481
uint32_t val, frac;
sys/netinet/tcp_subr.c
4483
val = tp->t_srtt >> TCP_RTT_SHIFT;
sys/netinet/tcp_subr.c
4485
tp->t_srtt = TICKS_2_USEC(val);
sys/netinet/tcp_subr.c
4501
uint32_t val, frac;
sys/netinet/tcp_subr.c
4503
val = tp->t_rttvar >> TCP_RTTVAR_SHIFT;
sys/netinet/tcp_subr.c
4505
tp->t_rttvar = TICKS_2_USEC(val);
sys/netinet/tcp_subr.c
4527
uint32_t val, frac;
sys/netinet/tcp_subr.c
4529
val = USEC_2_TICKS(tp->t_srtt);
sys/netinet/tcp_subr.c
4531
tp->t_srtt = val << TCP_RTT_SHIFT;
sys/netinet/tcp_subr.c
4548
uint32_t val, frac;
sys/netinet/tcp_subr.c
4550
val = USEC_2_TICKS(tp->t_rttvar);
sys/netinet/tcp_subr.c
4552
tp->t_rttvar = val << TCP_RTTVAR_SHIFT;
sys/netinet/tcp_subr.c
4658
uint16_t slot, uint8_t val, uint64_t offset, uint64_t nbytes)
sys/netinet/tcp_subr.c
4666
log.u_bbr.flex8 = val;
sys/netinet/tcp_var.h
1138
#define TCPSTAT_ADD(name, val) \
sys/netinet/tcp_var.h
1140
MIB_SDT_PROBE1(tcp, count, name, (val)); \
sys/netinet/tcp_var.h
1141
VNET_PCPUSTAT_ADD(struct tcpstat, tcpstat, name, (val)); \
sys/netinet/tcp_var.h
1148
void kmod_tcpstat_add(int statnum, int val);
sys/netinet/tcp_var.h
1149
#define KMOD_TCPSTAT_ADD(name, val) \
sys/netinet/tcp_var.h
1151
MIB_SDT_PROBE1(tcp, count, name, (val)); \
sys/netinet/tcp_var.h
1154
val); \
sys/netinet/tcp_var.h
1572
uint8_t val, uint64_t offset, uint64_t nbytes);
sys/netinet/udp_var.h
131
#define UDPSTAT_ADD(name, val) \
sys/netinet/udp_var.h
133
MIB_SDT_PROBE1(udp, count, name, (val)); \
sys/netinet/udp_var.h
134
VNET_PCPUSTAT_ADD(struct udpstat, udpstat, name, (val)); \
sys/netinet6/frag6.c
193
int error, val;
sys/netinet6/frag6.c
195
val = V_ip6_maxfragpackets;
sys/netinet6/frag6.c
196
error = sysctl_handle_int(oidp, &val, 0, req);
sys/netinet6/frag6.c
199
V_ip6_maxfragpackets = val;
sys/netinet6/frag6.c
238
int error, val;
sys/netinet6/frag6.c
240
val = V_ip6_fraglifetime;
sys/netinet6/frag6.c
241
error = sysctl_handle_int(oidp, &val, 0, req);
sys/netinet6/frag6.c
244
if (val <= 0)
sys/netinet6/frag6.c
245
val = IPV6_DEFFRAGTTL;
sys/netinet6/frag6.c
247
if (frag6_milli_to_callout_ticks(val) >= 65536)
sys/netinet6/frag6.c
248
val = frag6_callout_ticks_to_milli(65535);
sys/netinet6/frag6.c
255
if (val > host_val)
sys/netinet6/frag6.c
256
val = host_val;
sys/netinet6/frag6.c
259
V_ip6_fraglifetime = val;
sys/netinet6/in6_proto.c
217
int error, val, ndf;
sys/netinet6/in6_proto.c
219
val = V_ip6_temp_preferred_lifetime;
sys/netinet6/in6_proto.c
220
error = sysctl_handle_int(oidp, &val, 0, req);
sys/netinet6/in6_proto.c
223
ndf = TEMP_MAX_DESYNC_FACTOR_BASE + (val >> 2) + (val >> 3);
sys/netinet6/in6_proto.c
224
if (val < ndf + V_ip6_temp_regen_advance ||
sys/netinet6/in6_proto.c
225
val > V_ip6_temp_valid_lifetime)
sys/netinet6/in6_proto.c
227
V_ip6_temp_preferred_lifetime = val;
sys/netinet6/in6_proto.c
236
int error, val;
sys/netinet6/in6_proto.c
238
val = V_ip6_temp_valid_lifetime;
sys/netinet6/in6_proto.c
239
error = sysctl_handle_int(oidp, &val, 0, req);
sys/netinet6/in6_proto.c
242
if (val < V_ip6_temp_preferred_lifetime)
sys/netinet6/in6_proto.c
244
V_ip6_temp_valid_lifetime = val;
sys/netinet6/ip6_output.c
1661
#define OPTSET2_N(bit, val) do { \
sys/netinet6/ip6_output.c
1662
if (val) \
sys/netinet6/ip6_output.c
1667
#define OPTSET2(bit, val) do { \
sys/netinet6/ip6_output.c
1669
OPTSET2_N(bit, val); \
sys/netinet6/ip6_var.h
269
#define IP6STAT_ADD(name, val) \
sys/netinet6/ip6_var.h
271
MIB_SDT_PROBE1(ip6, count, name, (val)); \
sys/netinet6/ip6_var.h
272
VNET_PCPUSTAT_ADD(struct ip6stat, ip6stat, name, (val)); \
sys/netinet6/ip6_var.h
274
#define IP6STAT_SUB(name, val) IP6STAT_ADD(name, -(val))
sys/netinet6/raw_ip6.h
55
#define RIP6STAT_ADD(name, val) \
sys/netinet6/raw_ip6.h
56
VNET_PCPUSTAT_ADD(struct rip6stat, rip6stat, name, (val))
sys/netipsec/ah_var.h
80
#define AHSTAT_ADD(name, val) \
sys/netipsec/ah_var.h
82
MIB_SDT_PROBE1(ah, count, name, (val)); \
sys/netipsec/ah_var.h
83
VNET_PCPUSTAT_ADD(struct ahstat, ahstat, name, (val)); \
sys/netipsec/esp_var.h
82
#define ESPSTAT_ADD(name, val) \
sys/netipsec/esp_var.h
84
MIB_SDT_PROBE1(esp, count, name, (val)); \
sys/netipsec/esp_var.h
85
VNET_PCPUSTAT_ADD(struct espstat, espstat, name, (val)); \
sys/netipsec/ipcomp_var.h
74
#define IPCOMPSTAT_ADD(name, val) \
sys/netipsec/ipcomp_var.h
76
MIB_SDT_PROBE1(ipcomp, count, name, (val)); \
sys/netipsec/ipcomp_var.h
77
VNET_PCPUSTAT_ADD(struct ipcompstat, ipcompstat, name, (val)); \
sys/netipsec/key.c
322
key_u32hash(uint32_t val)
sys/netipsec/key.c
325
return (fnv_32_buf(&val, sizeof(val), FNV1_32_INIT));
sys/netipsec/keysock.h
79
#define PFKEYSTAT_ADD(name, val) \
sys/netipsec/keysock.h
80
VNET_PCPUSTAT_ADD(struct pfkeystat, pfkeystat, name, (val))
sys/netlink/netlink_domain.c
638
uint32_t val;
sys/netlink/netlink_domain.c
643
.val = nlp->nl_process_id,
sys/netlink/netlink_domain.c
648
.val = nlp->nl_port,
sys/netlink/netlink_message_parser.c
609
uint8_t val = *((const uint8_t *)src);
sys/netlink/netlink_message_parser.c
611
*((uint8_t *)target) = val;
sys/netlink/netlink_message_parser.c
89
nlmsg_report_cookie_u32(struct nl_pstate *npt, uint32_t val)
sys/netlink/netlink_message_parser.c
95
memcpy(nla + 1, &val, sizeof(uint32_t));
sys/netlink/netlink_message_parser.h
223
void nlmsg_report_cookie_u32(struct nl_pstate *npt, uint32_t val);
sys/netlink/netlink_snl.h
263
int val = 1;
sys/netlink/netlink_snl.h
264
socklen_t optlen = sizeof(val);
sys/netlink/netlink_snl.h
265
if (setsockopt(ss->fd, SOL_NETLINK, NETLINK_EXT_ACK, &val, optlen) == -1) {
sys/netlink/route/iface.c
364
uint32_t val = (if_getflags(ifp) & IFF_PROMISC) != 0;
sys/netlink/route/iface.c
365
nlattr_add_u32(nw, IFLA_PROMISCUITY, val);
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
102
ptr, val, sysctl_ipf_int_frag, "I", descr)
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
103
#define SYSCTL_DYN_IPF_AUTH(parent, nbr, name, access,ptr, val, descr) \
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
106
ptr, val, sysctl_ipf_int_auth, "I", descr)
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
87
#define SYSCTL_IPF(parent, nbr, name, access, ptr, val, descr) \
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
90
ptr, val, sysctl_ipf_int, "I", descr)
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
91
#define SYSCTL_DYN_IPF_NAT(parent, nbr, name, access,ptr, val, descr) \
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
94
ptr, val, sysctl_ipf_int_nat, "I", descr)
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
95
#define SYSCTL_DYN_IPF_STATE(parent, nbr, name, access,ptr, val, descr) \
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
98
ptr, val, sysctl_ipf_int_state, "I", descr)
sys/netpfil/ipfilter/netinet/mlfk_ipl.c
99
#define SYSCTL_DYN_IPF_FRAG(parent, nbr, name, access,ptr, val, descr) \
sys/netpfil/ipfw/ip_fw_sockopt.c
108
static uint32_t objhash_hash_idx(struct namedobj_instance *ni, uint32_t val);
sys/netpfil/ipfw/ip_fw_sockopt.c
3451
objhash_hash_idx(struct namedobj_instance *ni, uint32_t val)
sys/netpfil/ipfw/ip_fw_sockopt.c
3455
v = val % (ni->nv_size - 1);
sys/netpfil/ipfw/ip_fw_table.c
1345
void *paddr, uint32_t *val)
sys/netpfil/ipfw/ip_fw_table.c
1351
return (ti->lookup(ti, paddr, plen, val));
sys/netpfil/ipfw/ip_fw_table_algo.c
1062
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
1080
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
1095
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
1107
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
1125
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
1144
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
1156
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
1174
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
1191
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
1945
uint32_t *val);
sys/netpfil/ipfw/ip_fw_table_algo.c
2087
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
2094
*val = ifi->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
2646
uint32_t keylen, uint32_t *val);
sys/netpfil/ipfw/ip_fw_table_algo.c
2705
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
2712
*val = ri->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
3108
uint32_t *val);
sys/netpfil/ipfw/ip_fw_table_algo.c
3194
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
3221
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
3246
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
3778
uint32_t *val);
sys/netpfil/ipfw/ip_fw_table_algo.c
3798
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
3822
*val = 0;
sys/netpfil/ipfw/ip_fw_table_algo.c
384
uint32_t *val);
sys/netpfil/ipfw/ip_fw_table_algo.c
4034
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
4046
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
414
uint32_t *val)
sys/netpfil/ipfw/ip_fw_table_algo.c
426
*val = ent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
437
*val = xent->value;
sys/netpfil/ipfw/ip_fw_table_algo.c
963
uint32_t *val);
sys/netpfil/ipfw/ip_fw_table_algo.c
965
uint32_t keylen, uint32_t *val);
sys/netpfil/ipfw/ip_fw_table_algo.c
967
uint32_t *val);
sys/netpfil/pf/pf_nv.c
101
pf_nvbool(const nvlist_t *nvl, const char *name, bool *val)
sys/netpfil/pf/pf_nv.c
106
*val = nvlist_get_bool(nvl, name);
sys/netpfil/pf/pf_nv.c
138
pf_nvint(const nvlist_t *nvl, const char *name, int *val)
sys/netpfil/pf/pf_nv.c
149
*val = (int)raw;
sys/netpfil/pf/pf_nv.c
43
type *val, type dflt) \
sys/netpfil/pf/pf_nv.c
47
*val = dflt; \
sys/netpfil/pf/pf_nv.c
53
*val = (type)raw; \
sys/netpfil/pf/pf_nv.c
57
pf_nv ## fnname(const nvlist_t *nvl, const char *name, type *val) \
sys/netpfil/pf/pf_nv.c
65
*val = (type)raw; \
sys/netsmb/smb_trantcp.c
79
nb_setsockopt_int(struct socket *so, int level, int name, int val)
sys/netsmb/smb_trantcp.c
87
sopt.sopt_val = &val;
sys/netsmb/smb_trantcp.c
88
sopt.sopt_valsize = sizeof(val);
sys/nfs/bootp_subr.c
1054
int val;
sys/nfs/bootp_subr.c
1058
if (((val = getdec(&p)) < 0) || (val > 255))
sys/nfs/bootp_subr.c
1060
ip = val << 24;
sys/nfs/bootp_subr.c
1064
if (((val = getdec(&p)) < 0) || (val > 255))
sys/nfs/bootp_subr.c
1066
ip |= (val << 16);
sys/nfs/bootp_subr.c
1070
if (((val = getdec(&p)) < 0) || (val > 255))
sys/nfs/bootp_subr.c
1072
ip |= (val << 8);
sys/nfs/bootp_subr.c
1076
if (((val = getdec(&p)) < 0) || (val > 255))
sys/nfs/bootp_subr.c
1078
ip |= val;
sys/nfs/nfs_diskless.c
456
int len, val;
sys/nfs/nfs_diskless.c
472
if ((sscanf(cp, "%2x", &val) != 1) || (val > 0xff)) {
sys/nfs/nfs_diskless.c
476
*(fh++) = val;
sys/ofed/drivers/infiniband/core/ib_cache.c
260
const struct ib_gid_attr *val, bool default_gid,
sys/ofed/drivers/infiniband/core/ib_cache.c
287
attr->gid_type != val->gid_type)
sys/ofed/drivers/infiniband/core/ib_cache.c
295
attr->ndev != val->ndev)
sys/ofed/drivers/infiniband/core/ib_cache.c
460
const struct ib_gid_attr *val,
sys/ofed/drivers/infiniband/core/ib_cache.c
473
local_index = find_gid(table, gid, val, false, mask, NULL);
sys/ofed/drivers/infiniband/core/ib_cache.c
516
struct ib_gid_attr val = {.ndev = ndev, .gid_type = gid_type};
sys/ofed/drivers/infiniband/core/ib_cache.c
528
local_index = find_gid(table, gid, &val, false, mask, NULL);
sys/ofed/drivers/infiniband/core/ib_packer.c
101
val = 0;
sys/ofed/drivers/infiniband/core/ib_packer.c
105
*addr = (*addr & ~mask) | (cpu_to_be64(val) & mask);
sys/ofed/drivers/infiniband/core/ib_packer.c
128
static void value_write(int offset, int size, u64 val, void *structure)
sys/ofed/drivers/infiniband/core/ib_packer.c
131
case 8: *( u8 *) ((char *)structure + offset) = val; break;
sys/ofed/drivers/infiniband/core/ib_packer.c
132
case 16: *(__be16 *) ((char *)structure + offset) = cpu_to_be16(val); break;
sys/ofed/drivers/infiniband/core/ib_packer.c
133
case 32: *(__be32 *) ((char *)structure + offset) = cpu_to_be32(val); break;
sys/ofed/drivers/infiniband/core/ib_packer.c
134
case 64: *(__be64 *) ((char *)structure + offset) = cpu_to_be64(val); break;
sys/ofed/drivers/infiniband/core/ib_packer.c
163
u32 val;
sys/ofed/drivers/infiniband/core/ib_packer.c
170
val = (be32_to_cpup(addr) & mask) >> shift;
sys/ofed/drivers/infiniband/core/ib_packer.c
173
val,
sys/ofed/drivers/infiniband/core/ib_packer.c
177
u64 val;
sys/ofed/drivers/infiniband/core/ib_packer.c
184
val = (be64_to_cpup(addr) & mask) >> shift;
sys/ofed/drivers/infiniband/core/ib_packer.c
187
val,
sys/ofed/drivers/infiniband/core/ib_packer.c
74
u32 val;
sys/ofed/drivers/infiniband/core/ib_packer.c
80
val = value_read(desc[i].struct_offset_bytes,
sys/ofed/drivers/infiniband/core/ib_packer.c
84
val = 0;
sys/ofed/drivers/infiniband/core/ib_packer.c
88
*addr = (*addr & ~mask) | (cpu_to_be32(val) & mask);
sys/ofed/drivers/infiniband/core/ib_packer.c
91
u64 val;
sys/ofed/drivers/infiniband/core/ib_packer.c
97
val = value_read(desc[i].struct_offset_bytes,
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
153
static int uverbs_request_next(struct uverbs_req_iter *iter, void *val,
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
159
if (copy_from_user(val, iter->cur, len))
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2764
memcpy(&ib_spec->eth.val, kern_spec_val, actual_filter_sz);
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2775
memcpy(&ib_spec->ipv4.val, kern_spec_val, actual_filter_sz);
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2786
memcpy(&ib_spec->ipv6.val, kern_spec_val, actual_filter_sz);
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2790
(ntohl(ib_spec->ipv6.val.flow_label)) >= BIT(20))
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2802
memcpy(&ib_spec->tcp_udp.val, kern_spec_val, actual_filter_sz);
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2813
memcpy(&ib_spec->tunnel.val, kern_spec_val, actual_filter_sz);
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2817
(ntohl(ib_spec->tunnel.val.tunnel_id)) >= BIT(24))
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2828
memcpy(&ib_spec->esp.val, kern_spec_val, actual_filter_sz);
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2839
memcpy(&ib_spec->gre.val, kern_spec_val, actual_filter_sz);
sys/ofed/drivers/infiniband/core/ib_uverbs_cmd.c
2850
memcpy(&ib_spec->mpls.val, kern_spec_val, actual_filter_sz);
sys/ofed/drivers/infiniband/ulp/sdp/sdp.h
618
#define SDPSTATS_COUNTER_ADD(stat, val)
sys/ofed/drivers/infiniband/ulp/sdp/sdp_proc.c
229
int val = is_log ? (i == n-1 ? 0 : 1<<i) : i;
sys/ofed/drivers/infiniband/ulp/sdp/sdp_proc.c
233
seq_printf(seq, "%10d | %-50s - %d\n", val, s, h[i]);
sys/ofed/include/rdma/ib_hdrs.h
134
static inline void ib_u64_put(u64 val, __be64 *p)
sys/ofed/include/rdma/ib_hdrs.h
136
put_unaligned_be64(val, p);
sys/ofed/include/rdma/ib_hdrs.h
144
static inline void put_ib_reth_vaddr(u64 val, struct ib_reth *reth)
sys/ofed/include/rdma/ib_hdrs.h
146
ib_u64_put(val, &reth->vaddr);
sys/ofed/include/rdma/ib_hdrs.h
154
static inline void put_ib_ateth_vaddr(u64 val, struct ib_atomic_eth *ateth)
sys/ofed/include/rdma/ib_hdrs.h
156
ib_u64_put(val, &ateth->vaddr);
sys/ofed/include/rdma/ib_hdrs.h
164
static inline void put_ib_ateth_swap(u64 val, struct ib_atomic_eth *ateth)
sys/ofed/include/rdma/ib_hdrs.h
166
ib_u64_put(val, &ateth->swap_data);
sys/ofed/include/rdma/ib_hdrs.h
174
static inline void put_ib_ateth_compare(u64 val, struct ib_atomic_eth *ateth)
sys/ofed/include/rdma/ib_hdrs.h
176
ib_u64_put(val, &ateth->compare_data);
sys/ofed/include/rdma/ib_verbs.h
1719
struct ib_flow_eth_filter val;
sys/ofed/include/rdma/ib_verbs.h
1733
struct ib_flow_ib_filter val;
sys/ofed/include/rdma/ib_verbs.h
1758
struct ib_flow_ipv4_filter val;
sys/ofed/include/rdma/ib_verbs.h
1776
struct ib_flow_ipv6_filter val;
sys/ofed/include/rdma/ib_verbs.h
1790
struct ib_flow_tcp_udp_filter val;
sys/ofed/include/rdma/ib_verbs.h
1805
struct ib_flow_tunnel_filter val;
sys/ofed/include/rdma/ib_verbs.h
1819
struct ib_flow_esp_filter val;
sys/ofed/include/rdma/ib_verbs.h
1834
struct ib_flow_gre_filter val;
sys/ofed/include/rdma/ib_verbs.h
1847
struct ib_flow_mpls_filter val;
sys/ofed/include/uapi/rdma/ib_user_verbs.h
1062
struct ib_uverbs_flow_tunnel_filter val;
sys/ofed/include/uapi/rdma/ib_user_verbs.h
1080
struct ib_uverbs_flow_spec_esp_filter val;
sys/ofed/include/uapi/rdma/ib_user_verbs.h
1107
struct ib_uverbs_flow_gre_filter val;
sys/ofed/include/uapi/rdma/ib_user_verbs.h
1130
struct ib_uverbs_flow_mpls_filter val;
sys/ofed/include/uapi/rdma/ib_user_verbs.h
932
struct ib_uverbs_flow_eth_filter val;
sys/ofed/include/uapi/rdma/ib_user_verbs.h
954
struct ib_uverbs_flow_ipv4_filter val;
sys/ofed/include/uapi/rdma/ib_user_verbs.h
972
struct ib_uverbs_flow_tcp_udp_filter val;
sys/ofed/include/uapi/rdma/ib_user_verbs.h
995
struct ib_uverbs_flow_ipv6_filter val;
sys/powerpc/aim/mmu_oea.c
1951
int val;
sys/powerpc/aim/mmu_oea.c
1961
val = MINCORE_INCORE;
sys/powerpc/aim/mmu_oea.c
1974
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/powerpc/aim/mmu_oea.c
1977
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/powerpc/aim/mmu_oea.c
1980
if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
sys/powerpc/aim/mmu_oea.c
1986
return (val);
sys/powerpc/aim/mmu_oea64.c
1364
int val;
sys/powerpc/aim/mmu_oea64.c
1375
val = MINCORE_INCORE | MINCORE_PSIND(1);
sys/powerpc/aim/mmu_oea64.c
1377
val = MINCORE_INCORE;
sys/powerpc/aim/mmu_oea64.c
1390
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/powerpc/aim/mmu_oea64.c
1393
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/powerpc/aim/mmu_oea64.c
1396
if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
sys/powerpc/aim/mmu_oea64.c
1402
return (val);
sys/powerpc/aim/mmu_radix.c
5811
int val;
sys/powerpc/aim/mmu_radix.c
5823
val = MINCORE_PSIND(1);
sys/powerpc/aim/mmu_radix.c
5828
val = 0;
sys/powerpc/aim/mmu_radix.c
5833
val = 0;
sys/powerpc/aim/mmu_radix.c
5836
val |= MINCORE_INCORE;
sys/powerpc/aim/mmu_radix.c
5838
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/powerpc/aim/mmu_radix.c
5840
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/powerpc/aim/mmu_radix.c
5842
if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
sys/powerpc/aim/mmu_radix.c
5848
return (val);
sys/powerpc/aim/mmu_radix.c
96
#define PPC_BITLSHIFT_VAL(val, bit) ((val) << PPC_BITLSHIFT(bit))
sys/powerpc/include/atomic.h
598
atomic_store_rel_long(volatile u_long *addr, u_long val)
sys/powerpc/include/atomic.h
601
atomic_store_rel_int((volatile u_int *)addr, (u_int)val);
sys/powerpc/include/pmc_mdep.h
24
#define mtpmr(reg, val) \
sys/powerpc/include/pmc_mdep.h
25
__asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val))
sys/powerpc/include/pmc_mdep.h
27
( { register_t val; \
sys/powerpc/include/pmc_mdep.h
28
__asm __volatile("mfpmr %0,%1" : "=r"(val) : "K"(reg)); \
sys/powerpc/include/pmc_mdep.h
29
val; } )
sys/powerpc/include/spr.h
34
#define mtspr(reg, val) \
sys/powerpc/include/spr.h
35
__asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
sys/powerpc/include/spr.h
37
( { register_t val; \
sys/powerpc/include/spr.h
38
__asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
sys/powerpc/include/spr.h
39
val; } )
sys/powerpc/include/spr.h
64
( { register_t val; \
sys/powerpc/include/spr.h
77
: "=r"(scratch), "=r"(val) : "K"(reg), "r"(32), "r"(1)); \
sys/powerpc/include/spr.h
78
val; } )
sys/powerpc/mpc85xx/atpic.c
121
uint8_t val;
sys/powerpc/mpc85xx/atpic.c
123
val = bus_read_1(sc->sc_res[icu], ofs);
sys/powerpc/mpc85xx/atpic.c
124
return (val);
sys/powerpc/mpc85xx/atpic.c
128
atpic_write(struct atpic_softc *sc, int icu, int ofs, uint8_t val)
sys/powerpc/mpc85xx/atpic.c
131
bus_write_1(sc->sc_res[icu], ofs, val);
sys/powerpc/mpc85xx/ds1553_core.c
187
ds1553_direct_write(device_t dev, bus_size_t off, uint8_t val)
sys/powerpc/mpc85xx/ds1553_core.c
192
bus_space_write_1(sc->sc_bst, sc->sc_bsh, off, val);
sys/powerpc/mpc85xx/fsl_espi.c
105
#define FSL_ESPI_WRITE(sc,off,val) bus_write_4(sc->sc_mem_res, off, val)
sys/powerpc/mpc85xx/fsl_espi.c
107
#define FSL_ESPI_WRITE_FIFO(sc,off,val) bus_write_1(sc->sc_mem_res, off, val)
sys/powerpc/mpc85xx/fsl_sata.c
452
unsigned int mask, unsigned int val, int t)
sys/powerpc/mpc85xx/fsl_sata.c
457
while (((rval = ATA_INL(ch->r_mem, off)) & mask) != val) {
sys/powerpc/mpc85xx/i2c.c
127
i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val)
sys/powerpc/mpc85xx/i2c.c
130
bus_space_write_1(sc->bst, sc->bsh, off, val);
sys/powerpc/mpc85xx/lbc.c
872
lbc_write_reg(device_t child, u_int off, uint32_t val)
sys/powerpc/mpc85xx/lbc.c
888
sc->sc_ltesr ^= (val & sc->sc_ltesr);
sys/powerpc/mpc85xx/lbc.c
892
if (off == LBC85XX_LTEATR && (val & 1) == 0)
sys/powerpc/mpc85xx/lbc.c
894
bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
sys/powerpc/mpc85xx/lbc.c
902
uint32_t val;
sys/powerpc/mpc85xx/lbc.c
915
val = sc->sc_ltesr;
sys/powerpc/mpc85xx/lbc.c
917
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);
sys/powerpc/mpc85xx/lbc.c
918
return (val);
sys/powerpc/mpc85xx/lbc.h
136
void lbc_write_reg(device_t child, u_int off, uint32_t val);
sys/powerpc/mpc85xx/mpc85xx.c
70
ccsr_write4(uintptr_t addr, uint32_t val)
sys/powerpc/mpc85xx/mpc85xx.c
74
*ptr = val;
sys/powerpc/mpc85xx/mpc85xx.h
161
void ccsr_write4(uintptr_t addr, uint32_t val);
sys/powerpc/mpc85xx/mpc85xx_gpio.c
158
uint32_t val;
sys/powerpc/mpc85xx/mpc85xx_gpio.c
165
val = bus_read_4(sc->out_res, 0);
sys/powerpc/mpc85xx/mpc85xx_gpio.c
166
val ^= (1 << (31 - pin));
sys/powerpc/mpc85xx/mpc85xx_gpio.c
167
bus_write_4(sc->out_res, 0, val);
sys/powerpc/mpc85xx/pci_mpc85xx.c
573
u_int reg, uint32_t val, int bytes)
sys/powerpc/mpc85xx/pci_mpc85xx.c
580
fsl_pcib_cfgwrite(sc, bus, slot, func, reg, val, bytes);
sys/powerpc/ofw/ofw_syscons.c
1077
ofwfb_writew(u_int16_t *addr, u_int16_t val)
sys/powerpc/ofw/ofw_syscons.c
1079
*addr = val;
sys/powerpc/ofw/ofw_syscons.c
754
ofwfb_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy)
sys/powerpc/powermac/atibl.c
186
atibl_pll_wreg(struct atibl_softc *sc, uint32_t reg, uint32_t val)
sys/powerpc/powermac/atibl.c
195
bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA, val);
sys/powerpc/powermac/cpcht.c
219
uint32_t vend, val;
sys/powerpc/powermac/cpcht.c
265
val = PCIB_READ_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 2);
sys/powerpc/powermac/cpcht.c
266
if ((val & PCIM_HTCMD_CAP_MASK) != PCIM_HTCAP_INTERRUPT)
sys/powerpc/powermac/cpcht.c
347
u_int reg, u_int32_t val, int width)
sys/powerpc/powermac/cpcht.c
364
out8rb(caoff, val);
sys/powerpc/powermac/cpcht.c
367
out16rb(caoff, val);
sys/powerpc/powermac/cpcht.c
370
out32rb(caoff, val);
sys/powerpc/powermac/dbdma.c
243
dbdma_set_interrupt_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val)
sys/powerpc/powermac/dbdma.c
250
intr_select |= val;
sys/powerpc/powermac/dbdma.c
255
dbdma_set_branch_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val)
sys/powerpc/powermac/dbdma.c
262
br_select |= val;
sys/powerpc/powermac/dbdma.c
267
dbdma_set_wait_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val)
sys/powerpc/powermac/dbdma.c
273
wait_select |= val;
sys/powerpc/powermac/dbdma.c
378
dbdma_write_reg(dbdma_channel_t *chan, u_int offset, uint32_t val)
sys/powerpc/powermac/dbdma.c
381
bus_write_4(chan->sc_regs, chan->sc_off + offset, val);
sys/powerpc/powermac/grackle.c
181
u_int reg, u_int32_t val, int width)
sys/powerpc/powermac/grackle.c
192
out8rb(caoff, val);
sys/powerpc/powermac/grackle.c
196
out16rb(caoff, val);
sys/powerpc/powermac/grackle.c
200
out32rb(caoff, val);
sys/powerpc/powermac/hrowpic.c
108
uint32_t val)
sys/powerpc/powermac/hrowpic.c
114
bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
sys/powerpc/powermac/kiic.c
249
kiic_writereg(struct kiic_softc *sc, u_int reg, u_int val)
sys/powerpc/powermac/kiic.c
251
bus_write_4(sc->sc_reg, sc->sc_regstep * reg, val);
sys/powerpc/powermac/macgpio.c
283
u_char val;
sys/powerpc/powermac/macgpio.c
292
val = bus_read_1(sc->sc_gpios,dinfo->gpio_num);
sys/powerpc/powermac/macgpio.c
293
val |= 0x80;
sys/powerpc/powermac/macgpio.c
294
bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);
sys/powerpc/powermac/macgpio.c
305
u_char val;
sys/powerpc/powermac/macgpio.c
314
val = bus_read_1(sc->sc_gpios,dinfo->gpio_num);
sys/powerpc/powermac/macgpio.c
315
val &= ~0x80;
sys/powerpc/powermac/macgpio.c
316
bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);
sys/powerpc/powermac/macgpio.c
338
macgpio_write(device_t dev, uint8_t val)
sys/powerpc/powermac/macgpio.c
349
bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);
sys/powerpc/powermac/tbgpio.c
135
uint32_t val;
sys/powerpc/powermac/tbgpio.c
139
val = sc->sc_value;
sys/powerpc/powermac/tbgpio.c
141
val = ~val;
sys/powerpc/powermac/tbgpio.c
142
val &= sc->sc_mask;
sys/powerpc/powermac/tbgpio.c
144
macgpio_write(dev, val);
sys/powerpc/powermac/uninorthpci.c
182
u_int32_t val;
sys/powerpc/powermac/uninorthpci.c
186
val = 0xffffffff;
sys/powerpc/powermac/uninorthpci.c
192
val = in8rb(caoff);
sys/powerpc/powermac/uninorthpci.c
195
val = in16rb(caoff);
sys/powerpc/powermac/uninorthpci.c
198
val = in32rb(caoff);
sys/powerpc/powermac/uninorthpci.c
204
return (val);
sys/powerpc/powermac/uninorthpci.c
209
u_int reg, u_int32_t val, int width)
sys/powerpc/powermac/uninorthpci.c
221
out8rb(caoff, val);
sys/powerpc/powermac/uninorthpci.c
224
out16rb(caoff, val);
sys/powerpc/powermac/uninorthpci.c
227
out32rb(caoff, val);
sys/powerpc/powernv/opal.c
40
cell_t val[2];
sys/powerpc/powernv/opal.c
53
OF_getencprop(opal, "opal-base-address", val, sizeof(val));
sys/powerpc/powernv/opal.c
54
opal_data = ((uint64_t)val[0] << 32) | val[1];
sys/powerpc/powernv/opal.c
55
OF_getencprop(opal, "opal-entry-address", val, sizeof(val));
sys/powerpc/powernv/opal.c
56
opal_entrypoint = ((uint64_t)val[0] << 32) | val[1];
sys/powerpc/powernv/opal_pci.c
204
round_pow2(uint64_t val)
sys/powerpc/powernv/opal_pci.c
207
return (1 << (flsl(val + (val - 1)) - 1));
sys/powerpc/powernv/opal_pci.c
562
u_int reg, uint32_t val, int width)
sys/powerpc/powernv/opal_pci.c
575
config_addr, reg, val);
sys/powerpc/powernv/opal_pci.c
579
config_addr, reg, val);
sys/powerpc/powernv/opal_pci.c
583
config_addr, reg, val);
sys/powerpc/powernv/opal_sensor.c
115
*val = be32toh(val32);
sys/powerpc/powernv/opal_sensor.c
93
opal_sensor_get_val(struct opal_sensor_softc *sc, uint32_t key, uint64_t *val)
sys/powerpc/powernv/xive.c
266
xive_write_1(struct xive_softc *sc, bus_size_t offset, uint8_t val)
sys/powerpc/powernv/xive.c
269
bus_write_1(sc->sc_mem, sc->sc_offset + offset, val);
sys/powerpc/powernv/xive.c
280
xive_write_mmap8(vm_offset_t addr, uint64_t val)
sys/powerpc/powernv/xive.c
282
*(uint64_t *)(addr) = val;
sys/powerpc/powernv/xive.c
672
uint32_t val;
sys/powerpc/powernv/xive.c
678
val = bus_read_4(sc->sc_mem, XIVE_TM_QW2_HV_POOL + TM_WORD2);
sys/powerpc/powernv/xive.c
679
if (val & TM_QW2W2_VP)
sys/powerpc/powerpc/bus_machdep.c
302
native_bs_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
sys/powerpc/powerpc/bus_machdep.c
307
*addr = val;
sys/powerpc/powerpc/bus_machdep.c
309
CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
sys/powerpc/powerpc/bus_machdep.c
313
native_bs_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
sys/powerpc/powerpc/bus_machdep.c
318
*addr = val;
sys/powerpc/powerpc/bus_machdep.c
320
CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
sys/powerpc/powerpc/bus_machdep.c
324
native_bs_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
sys/powerpc/powerpc/bus_machdep.c
329
*addr = val;
sys/powerpc/powerpc/bus_machdep.c
331
CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
sys/powerpc/powerpc/bus_machdep.c
335
native_bs_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
sys/powerpc/powerpc/bus_machdep.c
340
*addr = val;
sys/powerpc/powerpc/bus_machdep.c
342
CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
sys/powerpc/powerpc/bus_machdep.c
418
native_bs_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
423
*d = val;
sys/powerpc/powerpc/bus_machdep.c
428
native_bs_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
433
*d = val;
sys/powerpc/powerpc/bus_machdep.c
438
native_bs_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
443
*d = val;
sys/powerpc/powerpc/bus_machdep.c
448
native_bs_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
453
*d = val;
sys/powerpc/powerpc/bus_machdep.c
458
native_bs_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
463
*d++ = val;
sys/powerpc/powerpc/bus_machdep.c
468
native_bs_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
473
*d++ = val;
sys/powerpc/powerpc/bus_machdep.c
478
native_bs_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
483
*d++ = val;
sys/powerpc/powerpc/bus_machdep.c
488
native_bs_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
493
*d++ = val;
sys/powerpc/powerpc/bus_machdep.c
613
swapped_bs_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
sys/powerpc/powerpc/bus_machdep.c
618
*addr = val;
sys/powerpc/powerpc/bus_machdep.c
620
CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
sys/powerpc/powerpc/bus_machdep.c
624
swapped_bs_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
sys/powerpc/powerpc/bus_machdep.c
629
__asm __volatile("sthbrx %0, 0, %1" :: "r"(val), "r"(addr));
sys/powerpc/powerpc/bus_machdep.c
631
CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
sys/powerpc/powerpc/bus_machdep.c
635
swapped_bs_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
sys/powerpc/powerpc/bus_machdep.c
640
__asm __volatile("stwbrx %0, 0, %1" :: "r"(val), "r"(addr));
sys/powerpc/powerpc/bus_machdep.c
642
CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
sys/powerpc/powerpc/bus_machdep.c
646
swapped_bs_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
sys/powerpc/powerpc/bus_machdep.c
651
*addr = htole64(val);
sys/powerpc/powerpc/bus_machdep.c
653
CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
sys/powerpc/powerpc/bus_machdep.c
725
swapped_bs_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
730
*d = val;
sys/powerpc/powerpc/bus_machdep.c
735
swapped_bs_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
740
out16rb(d, val);
sys/powerpc/powerpc/bus_machdep.c
745
swapped_bs_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
750
out32rb(d, val);
sys/powerpc/powerpc/bus_machdep.c
755
swapped_bs_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
761
swapped_bs_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
766
*d++ = val;
sys/powerpc/powerpc/bus_machdep.c
771
swapped_bs_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
776
out16rb(d++, val);
sys/powerpc/powerpc/bus_machdep.c
781
swapped_bs_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
sys/powerpc/powerpc/bus_machdep.c
786
out32rb(d++, val);
sys/powerpc/powerpc/bus_machdep.c
791
swapped_bs_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
sys/powerpc/powerpc/clock.c
124
int32_t val;
sys/powerpc/powerpc/clock.c
144
__asm ("mfdec %0" : "=r"(val));
sys/powerpc/powerpc/clock.c
145
while (val < 0) {
sys/powerpc/powerpc/clock.c
146
val += s->div;
sys/powerpc/powerpc/clock.c
149
mtdec(val);
sys/powerpc/powerpc/copyinout.c
111
int fueword32_remap(volatile const void *addr, int32_t *val);
sys/powerpc/powerpc/copyinout.c
112
int fueword32_direct(volatile const void *addr, int32_t *val);
sys/powerpc/powerpc/copyinout.c
113
int fueword64_remap(volatile const void *addr, int64_t *val);
sys/powerpc/powerpc/copyinout.c
114
int fueword64_direct(volatile const void *addr, int64_t *val);
sys/powerpc/powerpc/copyinout.c
115
int fueword_remap(volatile const void *addr, long *val);
sys/powerpc/powerpc/copyinout.c
116
int fueword_direct(volatile const void *addr, long *val);
sys/powerpc/powerpc/copyinout.c
424
int val;
sys/powerpc/powerpc/copyinout.c
440
val = *p;
sys/powerpc/powerpc/copyinout.c
443
return (val);
sys/powerpc/powerpc/copyinout.c
452
uint16_t *p, val;
sys/powerpc/powerpc/copyinout.c
468
val = *p;
sys/powerpc/powerpc/copyinout.c
471
return (val);
sys/powerpc/powerpc/copyinout.c
475
REMAP(fueword32)(volatile const void *addr, int32_t *val)
sys/powerpc/powerpc/copyinout.c
496
*val = *p;
sys/powerpc/powerpc/copyinout.c
504
REMAP(fueword64)(volatile const void *addr, int64_t *val)
sys/powerpc/powerpc/copyinout.c
525
*val = *p;
sys/powerpc/powerpc/copyinout.c
533
REMAP(fueword)(volatile const void *addr, long *val)
sys/powerpc/powerpc/copyinout.c
554
*val = *p;
sys/powerpc/powerpc/copyinout.c
567
uint32_t *p, val;
sys/powerpc/powerpc/copyinout.c
597
: "=&r" (val), "=m" (*p), "+&r" (res)
sys/powerpc/powerpc/copyinout.c
603
*oldvalp = val;
sys/powerpc/powerpc/copyinout.c
622
u_long *p, val;
sys/powerpc/powerpc/copyinout.c
652
: "=&r" (val), "=m" (*p), "+&r" (res)
sys/powerpc/powerpc/copyinout.c
658
*oldvalp = val;
sys/powerpc/powerpc/elf32_machdep.c
242
Elf_Addr addend, val;
sys/powerpc/powerpc/elf32_machdep.c
325
val = ((Elf32_Addr (*)(void))addr)();
sys/powerpc/powerpc/elf32_machdep.c
326
if (*where != val)
sys/powerpc/powerpc/elf32_machdep.c
327
*where = val;
sys/powerpc/powerpc/elf64_machdep.c
331
Elf_Addr addend, val;
sys/powerpc/powerpc/elf64_machdep.c
379
val = ((Elf64_Addr (*)(void))addr)();
sys/powerpc/powerpc/elf64_machdep.c
380
if (*where != val)
sys/powerpc/powerpc/elf64_machdep.c
381
*where = val;
sys/powerpc/powerpc/gdb_machdep.c
77
gdb_cpu_setreg(int regnum, void *val)
sys/powerpc/powerpc/openpic.c
67
openpic_write(struct openpic_softc *sc, u_int reg, uint32_t val)
sys/powerpc/powerpc/openpic.c
69
bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
sys/powerpc/ps3/if_glc.c
121
uint64_t mac64, val, junk;
sys/powerpc/ps3/if_glc.c
157
GELIC_VLAN_TX_ETHERNET, 0, 0, &val, &junk);
sys/powerpc/ps3/if_glc.c
159
sc->sc_tx_vlan = val;
sys/powerpc/ps3/if_glc.c
161
GELIC_VLAN_RX_ETHERNET, 0, 0, &val, &junk);
sys/powerpc/ps3/if_glc.c
163
sc->sc_rx_vlan = val;
sys/powerpc/pseries/rtas_pci.c
188
u_int reg, uint32_t val, int width)
sys/powerpc/pseries/rtas_pci.c
204
width, val, &pcierror);
sys/powerpc/pseries/rtas_pci.c
207
width, val, &pcierror);
sys/riscv/cvitek/cvitek_reset.c
106
val = SYSCON_READ_4(sc->syscon, offset);
sys/riscv/cvitek/cvitek_reset.c
108
val &= ~(1 << bit);
sys/riscv/cvitek/cvitek_reset.c
110
val |= (1 << bit);
sys/riscv/cvitek/cvitek_reset.c
111
SYSCON_WRITE_4(sc->syscon, offset, val);
sys/riscv/cvitek/cvitek_reset.c
98
uint32_t offset, val;
sys/riscv/cvitek/cvitek_restart.c
72
uint32_t val;
sys/riscv/cvitek/cvitek_restart.c
75
val = RTC_CTRL0_RESERVED_MASK;
sys/riscv/cvitek/cvitek_restart.c
77
val |= RTC_CTRL0_REQ_SHUTDOWN;
sys/riscv/cvitek/cvitek_restart.c
79
val |= RTC_CTRL0_REQ_POWERCYCLE;
sys/riscv/cvitek/cvitek_restart.c
81
val |= RTC_CTRL0_REQ_WARM_RESET;
sys/riscv/cvitek/cvitek_restart.c
85
bus_write_4(sc->reg, RTC_CTRL0, val);
sys/riscv/include/atomic.h
136
atomic_store_rel_16(volatile uint16_t *p, uint16_t val)
sys/riscv/include/atomic.h
141
*p = val;
sys/riscv/include/atomic.h
153
atomic_add_32(volatile uint32_t *p, uint32_t val)
sys/riscv/include/atomic.h
158
: "r" (val)
sys/riscv/include/atomic.h
163
atomic_subtract_32(volatile uint32_t *p, uint32_t val)
sys/riscv/include/atomic.h
168
: "r" (-val)
sys/riscv/include/atomic.h
173
atomic_set_32(volatile uint32_t *p, uint32_t val)
sys/riscv/include/atomic.h
178
: "r" (val)
sys/riscv/include/atomic.h
183
atomic_clear_32(volatile uint32_t *p, uint32_t val)
sys/riscv/include/atomic.h
188
: "r" (~val)
sys/riscv/include/atomic.h
241
atomic_fetchadd_32(volatile uint32_t *p, uint32_t val)
sys/riscv/include/atomic.h
247
: "r" (val)
sys/riscv/include/atomic.h
257
uint32_t val;
sys/riscv/include/atomic.h
259
val = 0;
sys/riscv/include/atomic.h
263
: "r" (val)
sys/riscv/include/atomic.h
270
atomic_testandclear_32(volatile uint32_t *p, u_int val)
sys/riscv/include/atomic.h
274
mask = 1u << (val & 31);
sys/riscv/include/atomic.h
284
atomic_testandset_32(volatile uint32_t *p, u_int val)
sys/riscv/include/atomic.h
288
mask = 1u << (val & 31);
sys/riscv/include/atomic.h
327
atomic_store_rel_32(volatile uint32_t *p, uint32_t val)
sys/riscv/include/atomic.h
332
*p = val;
sys/riscv/include/atomic.h
352
atomic_add_64(volatile uint64_t *p, uint64_t val)
sys/riscv/include/atomic.h
357
: "r" (val)
sys/riscv/include/atomic.h
362
atomic_subtract_64(volatile uint64_t *p, uint64_t val)
sys/riscv/include/atomic.h
367
: "r" (-val)
sys/riscv/include/atomic.h
372
atomic_set_64(volatile uint64_t *p, uint64_t val)
sys/riscv/include/atomic.h
377
: "r" (val)
sys/riscv/include/atomic.h
382
atomic_clear_64(volatile uint64_t *p, uint64_t val)
sys/riscv/include/atomic.h
387
: "r" (~val)
sys/riscv/include/atomic.h
440
atomic_fetchadd_64(volatile uint64_t *p, uint64_t val)
sys/riscv/include/atomic.h
446
: "r" (val)
sys/riscv/include/atomic.h
456
uint64_t val;
sys/riscv/include/atomic.h
458
val = 0;
sys/riscv/include/atomic.h
462
: "r" (val)
sys/riscv/include/atomic.h
469
atomic_testandclear_64(volatile uint64_t *p, u_int val)
sys/riscv/include/atomic.h
473
mask = 1ul << (val & 63);
sys/riscv/include/atomic.h
483
atomic_testandset_64(volatile uint64_t *p, u_int val)
sys/riscv/include/atomic.h
487
mask = 1ul << (val & 63);
sys/riscv/include/atomic.h
497
atomic_testandset_acq_64(volatile uint64_t *p, u_int val)
sys/riscv/include/atomic.h
501
mask = 1ul << (val & 63);
sys/riscv/include/atomic.h
511
atomic_swap_32(volatile uint32_t *p, uint32_t val)
sys/riscv/include/atomic.h
517
: "r" (val)
sys/riscv/include/atomic.h
524
atomic_swap_64(volatile uint64_t *p, uint64_t val)
sys/riscv/include/atomic.h
530
: "r" (val)
sys/riscv/include/atomic.h
584
atomic_store_rel_64(volatile uint64_t *p, uint64_t val)
sys/riscv/include/atomic.h
589
*p = val;
sys/riscv/include/riscvreg.h
226
#define CSR_ZIMM(val) \
sys/riscv/include/riscvreg.h
227
(__builtin_constant_p(val) && ((u_long)(val) < 32))
sys/riscv/include/riscvreg.h
229
#define csr_swap(csr, val) \
sys/riscv/include/riscvreg.h
231
if (CSR_ZIMM(val)) \
sys/riscv/include/riscvreg.h
233
: "=r" (ret) : "i" (val)); \
sys/riscv/include/riscvreg.h
236
: "=r" (ret) : "r" (val)); \
sys/riscv/include/riscvreg.h
240
#define csr_write(csr, val) \
sys/riscv/include/riscvreg.h
241
({ if (CSR_ZIMM(val)) \
sys/riscv/include/riscvreg.h
242
__asm __volatile("csrwi " #csr ", %0" :: "i" (val)); \
sys/riscv/include/riscvreg.h
244
__asm __volatile("csrw " #csr ", %0" :: "r" (val)); \
sys/riscv/include/riscvreg.h
247
#define csr_set(csr, val) \
sys/riscv/include/riscvreg.h
248
({ if (CSR_ZIMM(val)) \
sys/riscv/include/riscvreg.h
249
__asm __volatile("csrsi " #csr ", %0" :: "i" (val)); \
sys/riscv/include/riscvreg.h
251
__asm __volatile("csrs " #csr ", %0" :: "r" (val)); \
sys/riscv/include/riscvreg.h
254
#define csr_clear(csr, val) \
sys/riscv/include/riscvreg.h
255
({ if (CSR_ZIMM(val)) \
sys/riscv/include/riscvreg.h
256
__asm __volatile("csrci " #csr ", %0" :: "i" (val)); \
sys/riscv/include/riscvreg.h
258
__asm __volatile("csrc " #csr ", %0" :: "r" (val)); \
sys/riscv/include/riscvreg.h
262
({ u_long val; \
sys/riscv/include/riscvreg.h
263
__asm __volatile("csrr %0, " #csr : "=r" (val)); \
sys/riscv/include/riscvreg.h
264
val; \
sys/riscv/include/riscvreg.h
269
({ uint64_t val; \
sys/riscv/include/riscvreg.h
279
val = (low | ((uint64_t)high << 32)); \
sys/riscv/include/riscvreg.h
280
val; \
sys/riscv/include/sbi.h
178
void sbi_set_timer(uint64_t val);
sys/riscv/include/vmm.h
151
DECLARE_VMMOPS_FUNC(int, setreg, (void *vcpui, int num, uint64_t val));
sys/riscv/include/vmm.h
153
DECLARE_VMMOPS_FUNC(int, setcap, (void *vcpui, int num, int val));
sys/riscv/include/vmm.h
159
int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val);
sys/riscv/include/vmm.h
163
int vm_get_capability(struct vcpu *vcpu, int type, int *val);
sys/riscv/include/vmm.h
164
int vm_set_capability(struct vcpu *vcpu, int type, int val);
sys/riscv/riscv/aplic.c
160
#define aplic_write(sc, reg, val) bus_write_4(sc->mem_res, (reg), (val))
sys/riscv/riscv/db_disasm.c
351
uint32_t val;
sys/riscv/riscv/db_disasm.c
534
val = (insn >> 20) & 0x3f;
sys/riscv/riscv/db_disasm.c
535
db_printf("0x%x", val);
sys/riscv/riscv/db_disasm.c
538
val = (insn >> 20) & 0x1f;
sys/riscv/riscv/db_disasm.c
539
db_printf("0x%x", val);
sys/riscv/riscv/db_disasm.c
542
val = (insn >> 20) & 0xfff;
sys/riscv/riscv/db_disasm.c
544
switch (val) {
sys/riscv/riscv/db_disasm.c
552
db_printf("0x%x", val);
sys/riscv/riscv/elf_machdep.c
295
Elf_Addr val, addr;
sys/riscv/riscv/elf_machdep.c
364
val = addr - (Elf_Addr)where;
sys/riscv/riscv/elf_machdep.c
365
if (val <= -(1UL << 20) || (1UL << 20) <= val) {
sys/riscv/riscv/elf_machdep.c
371
*insn32p = insert_imm(*insn32p, val, 20, 20, 31);
sys/riscv/riscv/elf_machdep.c
372
*insn32p = insert_imm(*insn32p, val, 10, 1, 21);
sys/riscv/riscv/elf_machdep.c
373
*insn32p = insert_imm(*insn32p, val, 11, 11, 20);
sys/riscv/riscv/elf_machdep.c
374
*insn32p = insert_imm(*insn32p, val, 19, 12, 12);
sys/riscv/riscv/elf_machdep.c
391
val = addr - (Elf_Addr)where;
sys/riscv/riscv/elf_machdep.c
392
if (val <= -(1UL << 32) || (1UL << 32) <= val) {
sys/riscv/riscv/elf_machdep.c
399
imm20 = calc_hi20_imm(val);
sys/riscv/riscv/elf_machdep.c
404
insn32p[1] = insert_imm(insn32p[1], val, 11, 0, 20);
sys/riscv/riscv/elf_machdep.c
416
val = addr - (Elf_Addr)where;
sys/riscv/riscv/elf_machdep.c
419
imm20 = calc_hi20_imm(val);
sys/riscv/riscv/elf_machdep.c
432
val = addr - (Elf_Addr)where;
sys/riscv/riscv/elf_machdep.c
447
val = addr - (Elf_Addr)where;
sys/riscv/riscv/elf_machdep.c
463
val = addr;
sys/riscv/riscv/elf_machdep.c
466
imm20 = calc_hi20_imm(val);
sys/riscv/riscv/elf_machdep.c
479
val = addr;
sys/riscv/riscv/elf_machdep.c
494
val = addr;
sys/riscv/riscv/elf_machdep.c
506
val = ((Elf64_Addr (*)(void))addr)();
sys/riscv/riscv/elf_machdep.c
507
if (*where != val)
sys/riscv/riscv/elf_machdep.c
508
*where = val;
sys/riscv/riscv/gdb_machdep.c
83
gdb_cpu_setreg(int regnum, void *val)
sys/riscv/riscv/gdb_machdep.c
85
register_t regval = *(register_t *)val;
sys/riscv/riscv/plic.c
114
#define WR4(sc, reg, val) \
sys/riscv/riscv/plic.c
115
bus_write_4(sc->mem_res, (reg), (val))
sys/riscv/riscv/pmap.c
5140
int val;
sys/riscv/riscv/pmap.c
5148
val = MINCORE_INCORE | MINCORE_PSIND(1);
sys/riscv/riscv/pmap.c
5157
val = MINCORE_INCORE;
sys/riscv/riscv/pmap.c
5161
val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
sys/riscv/riscv/pmap.c
5163
val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
sys/riscv/riscv/pmap.c
5167
val = 0;
sys/riscv/riscv/pmap.c
5169
if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
sys/riscv/riscv/pmap.c
5174
return (val);
sys/riscv/riscv/sbi.c
185
sbi_set_timer(uint64_t val)
sys/riscv/riscv/sbi.c
191
ret = SBI_CALL1(SBI_EXT_ID_TIME, SBI_TIME_SET_TIMER, val);
sys/riscv/riscv/sbi.c
194
(void)SBI_CALL1(SBI_SET_TIMER, 0, val);
sys/riscv/sifive/fe310_aon.c
108
#define FEAON_WRITE_4(sc, reg, val) bus_write_4(sc->reg_res, reg, val)
sys/riscv/sifive/fe310_aon.c
110
#define FEAON_WDT_WRITE_4(sc, reg, val) do { \
sys/riscv/sifive/fe310_aon.c
112
FEAON_WRITE_4(sc, reg, val); \
sys/riscv/sifive/fe310_aon.c
131
uint32_t scale, val;
sys/riscv/sifive/fe310_aon.c
142
val = FEAON_READ_4(sc, FEAON_WDT_CFG);
sys/riscv/sifive/fe310_aon.c
143
val &= ~(FEAON_WDT_CFG_EN_ALWAYS | FEAON_WDT_CFG_EN_CORE_AWAKE);
sys/riscv/sifive/fe310_aon.c
144
FEAON_WDT_WRITE_4(sc, FEAON_WDT_CFG, val);
sys/riscv/sifive/fe310_aon.c
166
val = FEAON_READ_4(sc, FEAON_WDT_CFG);
sys/riscv/sifive/fe310_aon.c
167
val &= ~FEAON_WDT_CFG_SCALE_MASK;
sys/riscv/sifive/fe310_aon.c
168
val |= scale | FEAON_WDT_CFG_RST_EN | FEAON_WDT_CFG_EN_ALWAYS |
sys/riscv/sifive/fe310_aon.c
172
FEAON_WDT_WRITE_4(sc, FEAON_WDT_CFG, val);
sys/riscv/sifive/fu740_pci_dw.c
111
fupci_phy_read(struct fupci_softc *sc, int phy, uint32_t reg, uint32_t *val)
sys/riscv/sifive/fu740_pci_dw.c
132
*val = FUDW_MGMT_READ(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, READ_DATA));
sys/riscv/sifive/fu740_pci_dw.c
152
fupci_phy_write(struct fupci_softc *sc, int phy, uint32_t reg, uint32_t val)
sys/riscv/sifive/fu740_pci_dw.c
158
FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, WRITE_DATA), val);
sys/riscv/sifive/sifive_ccache.c
58
#define WR8(sc, off, val) (bus_write_8((sc)->res, (off), (val)))
sys/riscv/sifive/sifive_gpio.c
206
sfgpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
sys/riscv/sifive/sifive_gpio.c
218
if (val)
sys/riscv/sifive/sifive_gpio.c
229
sfgpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/riscv/sifive/sifive_gpio.c
244
*val = (reg & (1u << pin)) ? 1 : 0;
sys/riscv/sifive/sifive_prci.c
287
uint32_t val;
sys/riscv/sifive/sifive_prci.c
308
val = PRCI_READ(sc->parent_sc, sc->reg);
sys/riscv/sifive/sifive_prci.c
310
divf = (val & PRCI_PLL_DIVF_MASK) >> PRCI_PLL_DIVF_SHIFT;
sys/riscv/sifive/sifive_prci.c
311
divq = (val & PRCI_PLL_DIVQ_MASK) >> PRCI_PLL_DIVQ_SHIFT;
sys/riscv/sifive/sifive_prci.c
312
divr = (val & PRCI_PLL_DIVR_MASK) >> PRCI_PLL_DIVR_SHIFT;
sys/riscv/sifive/sifive_prci.c
570
prci_write_4(device_t dev, bus_addr_t addr, uint32_t val)
sys/riscv/sifive/sifive_prci.c
576
PRCI_WRITE(sc, addr, val);
sys/riscv/sifive/sifive_prci.c
582
prci_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
sys/riscv/sifive/sifive_prci.c
588
*val = PRCI_READ(sc, addr);
sys/riscv/sifive/sifive_spi.c
146
uint32_t val;
sys/riscv/sifive/sifive_spi.c
154
val = SFSPI_READ(sc, SFSPI_REG_TXDATA);
sys/riscv/sifive/sifive_spi.c
155
} while (val & SFSPI_TXDATA_FULL);
sys/riscv/sifive/sifive_spi.c
156
val = *p;
sys/riscv/sifive/sifive_spi.c
157
SFSPI_WRITE(sc, SFSPI_REG_TXDATA, val);
sys/riscv/sifive/sifive_spi.c
164
uint32_t val;
sys/riscv/sifive/sifive_spi.c
175
val = SFSPI_READ(sc, SFSPI_REG_RXDATA);
sys/riscv/sifive/sifive_spi.c
176
} while (val & SFSPI_RXDATA_EMPTY);
sys/riscv/sifive/sifive_spi.c
177
*p = val & SFSPI_RXDATA_DATA_MASK;
sys/riscv/starfive/jh7110_gpio.c
112
*val = (reg >> pin) & 0x1;
sys/riscv/starfive/jh7110_gpio.c
115
*val = (reg >> (pin - GPIO_PINS / GPIO_REGS)) & 0x1;
sys/riscv/starfive/jh7110_gpio.c
78
#define JH7110_GPIO_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
sys/riscv/starfive/jh7110_gpio.c
99
jh7110_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
sys/riscv/starfive/jh7110_pcie.c
158
#define LOW32(val) (uint32_t)(val)
sys/riscv/starfive/jh7110_pcie.c
159
#define HI32(val) (uint32_t)(val >> 32)
sys/riscv/starfive/jh7110_pcie.c
162
#define WR4(sc, reg, val) bus_write_4((sc)->reg_mem_res, (reg), (val))
sys/riscv/starfive/jh7110_pcie.c
197
u_int reg, uint32_t val, int bytes)
sys/riscv/starfive/jh7110_pcie.c
211
bus_write_1(sc->cfg_mem_res, offset, val);
sys/riscv/starfive/jh7110_pcie.c
214
bus_write_2(sc->cfg_mem_res, offset, htole16(val));
sys/riscv/starfive/jh7110_pcie.c
217
bus_write_4(sc->cfg_mem_res, offset, htole32(val));
sys/riscv/starfive/jh7110_pcie.c
556
uint32_t val, taddr_size;
sys/riscv/starfive/jh7110_pcie.c
561
val = PCIE_CONF_INTERFACE;
sys/riscv/starfive/jh7110_pcie.c
563
val = PCIE_TXRX_INTERFACE;
sys/riscv/starfive/jh7110_pcie.c
565
WR4(sc, ATR0_AXI4_SLV0_TRSL_PARAM + win_idx * ATR_ENTRY_SIZE, val);
sys/riscv/starfive/jh7110_pcie.c
568
val = LOW32(axi_begin) | taddr_size << ATR0_PCIE_ATR_SIZE_SHIFT |
sys/riscv/starfive/jh7110_pcie.c
571
WR4(sc, ATR0_AXI4_SLV0_SRCADDR_PARAM + win_idx * ATR_ENTRY_SIZE, val);
sys/riscv/starfive/jh7110_pcie.c
573
val = HI32(axi_begin);
sys/riscv/starfive/jh7110_pcie.c
574
WR4(sc, ATR0_AXI4_SLV0_SRC_ADDR + win_idx * ATR_ENTRY_SIZE, val);
sys/riscv/starfive/jh7110_pcie.c
576
val = LOW32(pci_begin);
sys/riscv/starfive/jh7110_pcie.c
577
WR4(sc, ATR0_AXI4_SLV0_TRSL_ADDR_LSB + win_idx * ATR_ENTRY_SIZE, val);
sys/riscv/starfive/jh7110_pcie.c
579
val = HI32(pci_begin);
sys/riscv/starfive/jh7110_pcie.c
580
WR4(sc, ATR0_AXI4_SLV0_TRSL_ADDR_UDW + win_idx * ATR_ENTRY_SIZE, val);
sys/riscv/starfive/jh7110_pcie.c
582
val = RD4(sc, ATR0_PCIE_WIN0_SRCADDR_PARAM);
sys/riscv/starfive/jh7110_pcie.c
583
val |= (ATR0_PCIE_ATR_SIZE << ATR0_PCIE_ATR_SIZE_SHIFT);
sys/riscv/starfive/jh7110_pcie.c
585
WR4(sc, ATR0_PCIE_WIN0_SRCADDR_PARAM, val);
sys/riscv/starfive/jh7110_pcie.c
592
uint32_t val;
sys/riscv/starfive/jh7110_pcie.c
665
err = OF_getencprop(sc->node, "linux,pci-domain", &val, sizeof(val));
sys/riscv/starfive/jh7110_pcie.c
672
if (val == 0) {
sys/riscv/starfive/jh7110_pcie.c
675
} else if (val == 1) {
sys/riscv/starfive/jh7110_pcie.c
737
uint32_t val;
sys/riscv/starfive/jh7110_pcie.c
865
val = RD4(sc, PCI_MISC_REG);
sys/riscv/starfive/jh7110_pcie.c
866
WR4(sc, PCI_MISC_REG, val | PHY_FUNC_DIS);
sys/riscv/starfive/jh7110_pcie.c
875
val = RD4(sc, PCI_GENERAL_SETUP_REG);
sys/riscv/starfive/jh7110_pcie.c
876
WR4(sc, PCI_GENERAL_SETUP_REG, val | ROOTPORT_ENABLE);
sys/riscv/starfive/jh7110_pcie.c
883
val = RD4(sc, PCIE_PCI_IDS_REG);
sys/riscv/starfive/jh7110_pcie.c
884
val &= REV_ID_MASK;
sys/riscv/starfive/jh7110_pcie.c
885
val |= (PCI_CLASS_BRIDGE_PCI << PCI_IDS_CLASS_CODE_SHIFT);
sys/riscv/starfive/jh7110_pcie.c
886
WR4(sc, PCIE_PCI_IDS_REG, val);
sys/riscv/starfive/jh7110_pcie.c
889
val = RD4(sc, PMSG_RX_SUPPORT_REG);
sys/riscv/starfive/jh7110_pcie.c
890
WR4(sc, PMSG_RX_SUPPORT_REG, val & ~PMSG_LTR_SUPPORT);
sys/riscv/starfive/jh7110_pcie.c
893
val = RD4(sc, PCIE_WINCONF);
sys/riscv/starfive/jh7110_pcie.c
894
WR4(sc, PCIE_WINCONF, val | PREF_MEM_WIN_64_SUPPORT);
sys/riscv/starfive/jh7110_pcie.c
924
val = SYSCON_READ_4(sc->stg_syscon,
sys/riscv/starfive/jh7110_pcie.c
926
if ((val & STG_LINK_UP) != 0) {
sys/riscv/starfive/jh7110_pcie.c
932
if ((val & STG_LINK_UP) == 0) {
sys/riscv/vmm/vmm.c
453
vm_set_capability(struct vcpu *vcpu, int type, int val)
sys/riscv/vmm/vmm.c
459
return (vmmops_setcap(vcpu->cookie, type, val));
sys/riscv/vmm/vmm.c
479
vm_set_register(struct vcpu *vcpu, int reg, uint64_t val)
sys/riscv/vmm/vmm.c
485
error = vmmops_setreg(vcpu->cookie, reg, val);
sys/riscv/vmm/vmm.c
489
vcpu->nextpc = val;
sys/riscv/vmm/vmm_aplic.c
120
aplic_handle_sourcecfg(struct aplic *aplic, int i, bool write, uint64_t *val)
sys/riscv/vmm/vmm_aplic.c
130
irq->sourcecfg = *val;
sys/riscv/vmm/vmm_aplic.c
132
*val = irq->sourcecfg;
sys/riscv/vmm/vmm_aplic.c
139
aplic_set_enabled(struct aplic *aplic, bool write, uint64_t *val, bool enabled)
sys/riscv/vmm/vmm_aplic.c
145
*val = 0;
sys/riscv/vmm/vmm_aplic.c
149
i = *val;
sys/riscv/vmm/vmm_aplic.c
169
uint64_t *val, bool enabled)
sys/riscv/vmm/vmm_aplic.c
175
*val = 0;
sys/riscv/vmm/vmm_aplic.c
184
if (*val & (1u << i)) {
sys/riscv/vmm/vmm_aplic.c
191
aplic_handle_target(struct aplic *aplic, int i, bool write, uint64_t *val)
sys/riscv/vmm/vmm_aplic.c
198
irq->target = *val;
sys/riscv/vmm/vmm_aplic.c
201
*val = irq->target;
sys/riscv/vmm/vmm_aplic.c
209
bool write, uint64_t *val)
sys/riscv/vmm/vmm_aplic.c
227
*val = (i << CLAIMI_IRQ_S) | (0 << CLAIMI_PRIO_S);
sys/riscv/vmm/vmm_aplic.c
236
*val = 0;
sys/riscv/vmm/vmm_aplic.c
243
bool write, uint64_t *val)
sys/riscv/vmm/vmm_aplic.c
255
error = aplic_handle_idc_claimi(hyp, aplic, cpu, write, val);
sys/riscv/vmm/vmm_aplic.c
266
bool write, uint64_t *val)
sys/riscv/vmm/vmm_aplic.c
278
error = aplic_handle_sourcecfg(aplic, i, write, val);
sys/riscv/vmm/vmm_aplic.c
284
error = aplic_handle_target(aplic, i, write, val);
sys/riscv/vmm/vmm_aplic.c
291
error = aplic_handle_idc(hyp, aplic, cpu, r, write, val);
sys/riscv/vmm/vmm_aplic.c
297
aplic_set_enabled_word(aplic, write, i, val, false);
sys/riscv/vmm/vmm_aplic.c
305
aplic->domaincfg = *val & DOMAINCFG_IE;
sys/riscv/vmm/vmm_aplic.c
307
*val = aplic->domaincfg;
sys/riscv/vmm/vmm_aplic.c
312
error = aplic_set_enabled(aplic, write, val, true);
sys/riscv/vmm/vmm_aplic.c
315
error = aplic_set_enabled(aplic, write, val, false);
sys/riscv/vmm/vmm_aplic.c
334
uint64_t val;
sys/riscv/vmm/vmm_aplic.c
348
error = aplic_mmio_access(hyp, aplic, reg, false, &val);
sys/riscv/vmm/vmm_aplic.c
350
*rval = val;
sys/riscv/vmm/vmm_aplic.c
363
uint64_t val;
sys/riscv/vmm/vmm_aplic.c
378
val = wval;
sys/riscv/vmm/vmm_aplic.c
380
error = aplic_mmio_access(hyp, aplic, reg, true, &val);
sys/riscv/vmm/vmm_instruction_emul.c
101
error = vm_get_register(vcpu, vre->reg, &val);
sys/riscv/vmm/vmm_instruction_emul.c
104
error = regwrite(vcpu, val, regarg);
sys/riscv/vmm/vmm_instruction_emul.c
64
uint64_t val;
sys/riscv/vmm/vmm_instruction_emul.c
68
error = memread(vcpu, gpa, &val, vie->access_size, memarg);
sys/riscv/vmm/vmm_instruction_emul.c
72
val &= (1ul << (vie->access_size * 8)) - 1;
sys/riscv/vmm/vmm_instruction_emul.c
73
error = vm_set_register(vcpu, vie->reg, val);
sys/riscv/vmm/vmm_instruction_emul.c
75
error = vm_get_register(vcpu, vie->reg, &val);
sys/riscv/vmm/vmm_instruction_emul.c
80
val &= (1ul << (vie->access_size * 8)) - 1;
sys/riscv/vmm/vmm_instruction_emul.c
81
error = memwrite(vcpu, gpa, val, vie->access_size, memarg);
sys/riscv/vmm/vmm_instruction_emul.c
92
uint64_t val;
sys/riscv/vmm/vmm_instruction_emul.c
96
error = regread(vcpu, &val, regarg);
sys/riscv/vmm/vmm_instruction_emul.c
99
error = vm_set_register(vcpu, vre->reg, val);
sys/riscv/vmm/vmm_riscv.c
274
uint64_t val;
sys/riscv/vmm/vmm_riscv.c
298
: [val] "=r" (val)
sys/riscv/vmm/vmm_riscv.c
306
if (trap->scause == -1 && (val & 0x3) == 0x3) {
sys/riscv/vmm/vmm_riscv.c
315
val |= (tmp << 16);
sys/riscv/vmm/vmm_riscv.c
323
*data = val;
sys/riscv/vmm/vmm_riscv.c
559
int val;
sys/riscv/vmm/vmm_riscv.c
562
val = atomic_swap_32(&hypctx->ipi_pending, 0);
sys/riscv/vmm/vmm_riscv.c
564
val = hypctx->ipi_pending;
sys/riscv/vmm/vmm_riscv.c
566
return (val);
sys/riscv/vmm/vmm_riscv.c
608
register_t val;
sys/riscv/vmm/vmm_riscv.c
649
val = intr_disable();
sys/riscv/vmm/vmm_riscv.c
653
intr_restore(val);
sys/riscv/vmm/vmm_riscv.c
659
intr_restore(val);
sys/riscv/vmm/vmm_riscv.c
705
intr_restore(val);
sys/riscv/vmm/vmm_riscv.c
883
vmmops_setreg(void *vcpui, int reg, uint64_t val)
sys/riscv/vmm/vmm_riscv.c
900
*regp = val;
sys/riscv/vmm/vmm_riscv.c
947
vmmops_setcap(void *vcpui, int num, int val)
sys/rpc/rpcsec_gss/rpcsec_gss_prot.c
59
char *val;
sys/rpc/rpcsec_gss/rpcsec_gss_prot.c
63
val = p->value;
sys/rpc/rpcsec_gss/rpcsec_gss_prot.c
65
ret = xdr_bytes(xdrs, &val, &len, MAX_GSS_SIZE);
sys/rpc/rpcsec_gss/rpcsec_gss_prot.c
66
p->value = val;
sys/security/mac_biba/mac_biba.c
134
#define SLOT_SET(l, val) mac_label_set((l), biba_slot, (uintptr_t)(val))
sys/security/mac_lomac/mac_lomac.c
127
#define SLOT_SET(l, val) mac_label_set((l), lomac_slot, (uintptr_t)(val))
sys/security/mac_lomac/mac_lomac.c
130
#define PSLOT_SET(l, val) mac_label_set((l), lomac_slot, (uintptr_t)(val))
sys/security/mac_mls/mac_mls.c
122
#define SLOT_SET(l, val) mac_label_set((l), mls_slot, (uintptr_t)(val))
sys/sys/_atomic_subword.h
101
_atomic_fcmpset_masked_word(uint32_t *addr, uint32_t *old, uint32_t val,
sys/sys/_atomic_subword.h
113
return (atomic_fcmpset_32(addr, old, (*old & ~mask) | val));
sys/sys/_atomic_subword.h
119
atomic_cmpset_8(__volatile uint8_t *addr, uint8_t old, uint8_t val)
sys/sys/_atomic_subword.h
126
old << shift, val << shift, 0xff << shift));
sys/sys/_atomic_subword.h
132
atomic_fcmpset_8(__volatile uint8_t *addr, uint8_t *old, uint8_t val)
sys/sys/_atomic_subword.h
140
&wold, val << shift, 0xff << shift);
sys/sys/_atomic_subword.h
149
atomic_cmpset_16(__volatile uint16_t *addr, uint16_t old, uint16_t val)
sys/sys/_atomic_subword.h
156
old << shift, val << shift, 0xffff << shift));
sys/sys/_atomic_subword.h
162
atomic_fcmpset_16(__volatile uint16_t *addr, uint16_t *old, uint16_t val)
sys/sys/_atomic_subword.h
170
&wold, val << shift, 0xffff << shift);
sys/sys/_atomic_subword.h
75
_atomic_cmpset_masked_word(uint32_t *addr, uint32_t old, uint32_t val,
sys/sys/_atomic_subword.h
92
ret = atomic_fcmpset_32(addr, &old, (old & ~mask) | val);
sys/sys/_semaphore.h
49
int ksem_getvalue(semid_t id, int *val);
sys/sys/abi_types.h
22
__uint32_t val[2];
sys/sys/abi_types.h
24
__uint64_t val;
sys/sys/arb.h
676
name##_ARB_CMINMAX(const struct name *head, int val) \
sys/sys/arb.h
682
if (val < 0) \
sys/sys/arb.h
692
name##_ARB_MINMAX(const struct name *head, int val) \
sys/sys/arb.h
693
{ return (__DECONST(struct type *, name##_ARB_CMINMAX(head, val))); }
sys/sys/bus.h
1009
typedef void (*device_prop_dtr_t)(device_t dev, const char *name, void *val,
sys/sys/bus.h
1011
int device_set_prop(device_t dev, const char *name, void *val,
sys/sys/bus.h
763
ssize_t device_get_property(device_t dev, const char *prop, void *val,
sys/sys/bus_dma.h
237
#define BD_PARENT(val) { BD_PARAM_PARENT, .ptr = val }
sys/sys/bus_dma.h
238
#define BD_ALIGNMENT(val) { BD_PARAM_ALIGNMENT, .num = val }
sys/sys/bus_dma.h
239
#define BD_BOUNDARY(val) { BD_PARAM_BOUNDARY, .num = val }
sys/sys/bus_dma.h
240
#define BD_LOWADDR(val) { BD_PARAM_LOWADDR, .pa = val }
sys/sys/bus_dma.h
241
#define BD_HIGHADDR(val) { BD_PARAM_HIGHADDR, .pa = val }
sys/sys/bus_dma.h
242
#define BD_MAXSIZE(val) { BD_PARAM_MAXSIZE, .num = val }
sys/sys/bus_dma.h
243
#define BD_NSEGMENTS(val) { BD_PARAM_NSEGMENTS, .num = val }
sys/sys/bus_dma.h
244
#define BD_MAXSEGSIZE(val) { BD_PARAM_MAXSEGSIZE, .num = val }
sys/sys/bus_dma.h
245
#define BD_FLAGS(val) { BD_PARAM_FLAGS, .num = val }
sys/sys/bus_dma.h
246
#define BD_LOCKFUNC(val) { BD_PARAM_LOCKFUNC, .ptr = val }
sys/sys/bus_dma.h
247
#define BD_LOCKFUNCARG(val) { BD_PARAM_LOCKFUNCARG, .ptr = val }
sys/sys/bus_dma.h
248
#define BD_NAME(val) { BD_PARAM_NAME, .ptr = val }
sys/sys/file.h
94
void foffset_unlock(struct file *fp, off_t val, int flags);
sys/sys/imgact_elf.h
38
#define AUXARGS_ENTRY(pos, id, val) \
sys/sys/imgact_elf.h
39
{(pos)->a_type = (id); (pos)->a_un.a_val = (val); (pos)++;}
sys/sys/link_elf.h
101
int rtld_set_var(const char *name, const char *val);
sys/sys/mount.h
1003
struct mntarg *mount_arg(struct mntarg *ma, const char *name, const void *val, int len);
sys/sys/mount.h
1006
struct mntarg *mount_argsu(struct mntarg *ma, const char *name, const void *val, int len);
sys/sys/mount.h
1017
uint64_t val);
sys/sys/mount.h
1183
#define vfs_mp_count_add_pcpu(_mpcpu, count, val) do { \
sys/sys/mount.h
1185
_mpcpu->mntp_##count += val; \
sys/sys/mount.h
1188
#define vfs_mp_count_sub_pcpu(_mpcpu, count, val) do { \
sys/sys/mount.h
1190
_mpcpu->mntp_##count -= val; \
sys/sys/mount.h
55
typedef struct fsid { int32_t val[2]; } fsid_t; /* filesystem id type */
sys/sys/mount.h
61
return (a->val[0] != b->val[0] || a->val[1] != b->val[1]);
sys/sys/pcpu.h
265
#define zpcpu_replace(base, val) ({ \
sys/sys/pcpu.h
266
__typeof(val) *_ptr = zpcpu_get(base); \
sys/sys/pcpu.h
267
__typeof(val) _old; \
sys/sys/pcpu.h
270
*_ptr = val; \
sys/sys/pcpu.h
274
#define zpcpu_replace_cpu(base, val, cpu) ({ \
sys/sys/pcpu.h
275
__typeof(val) *_ptr = zpcpu_get_cpu(base, cpu); \
sys/sys/pcpu.h
276
__typeof(val) _old; \
sys/sys/pcpu.h
279
*_ptr = val; \
sys/sys/pcpu.h
284
#define zpcpu_set_protected(base, val) ({ \
sys/sys/pcpu.h
286
__typeof(val) *_ptr = zpcpu_get(base); \
sys/sys/pcpu.h
288
*_ptr = (val); \
sys/sys/pcpu.h
293
#define zpcpu_add_protected(base, val) ({ \
sys/sys/pcpu.h
295
__typeof(val) *_ptr = zpcpu_get(base); \
sys/sys/pcpu.h
297
*_ptr += (val); \
sys/sys/pcpu.h
302
#define zpcpu_sub_protected(base, val) ({ \
sys/sys/pcpu.h
304
__typeof(val) *_ptr = zpcpu_get(base); \
sys/sys/pcpu.h
306
*_ptr -= (val); \
sys/sys/pctrie.h
110
name##_PCTRIE_NZVAL2PTR(uint64_t *val) \
sys/sys/pctrie.h
113
((uintptr_t)val - __offsetof(struct type, field)); \
sys/sys/pctrie.h
117
name##_PCTRIE_VAL2PTR(uint64_t *val) \
sys/sys/pctrie.h
119
if (val == NULL) \
sys/sys/pctrie.h
121
return (name##_PCTRIE_NZVAL2PTR(val)); \
sys/sys/pctrie.h
132
name##_PCTRIE_INSERT_BASE(struct pctrie *ptree, uint64_t *val, \
sys/sys/pctrie.h
149
pctrie_insert_node(val, *parent, parentp, child); \
sys/sys/pctrie.h
160
uint64_t *val = name##_PCTRIE_PTR2VAL(ptr); \
sys/sys/pctrie.h
162
parentp = pctrie_insert_lookup_strict(ptree, val, &parent); \
sys/sys/pctrie.h
163
return (name##_PCTRIE_INSERT_BASE(ptree, val, &parent, parentp, \
sys/sys/pctrie.h
173
uint64_t *val = name##_PCTRIE_PTR2VAL(ptr); \
sys/sys/pctrie.h
176
parentp = pctrie_insert_lookup(ptree, val, &parent, &found); \
sys/sys/pctrie.h
177
return (name##_PCTRIE_INSERT_BASE(ptree, val, &parent, parentp, \
sys/sys/pctrie.h
187
uint64_t *val = name##_PCTRIE_PTR2VAL(ptr); \
sys/sys/pctrie.h
191
parentp = pctrie_insert_lookup(ptree, val, &parent, &found); \
sys/sys/pctrie.h
192
retval = name##_PCTRIE_INSERT_BASE(ptree, val, &parent, parentp, \
sys/sys/pctrie.h
196
found = pctrie_subtree_lookup_lt(ptree, parent, *val); \
sys/sys/pctrie.h
205
uint64_t *val = name##_PCTRIE_PTR2VAL(ptr); \
sys/sys/pctrie.h
207
parentp = pctrie_iter_insert_lookup(it, val); \
sys/sys/pctrie.h
208
return (name##_PCTRIE_INSERT_BASE(it->ptree, val, &it->node, \
sys/sys/pctrie.h
381
uint64_t *val; \
sys/sys/pctrie.h
384
val = pctrie_remove_lookup(ptree, key, &freenode); \
sys/sys/pctrie.h
385
if (val == NULL) \
sys/sys/pctrie.h
393
uint64_t *val; \
sys/sys/pctrie.h
396
val = pctrie_remove_lookup(ptree, key, &freenode); \
sys/sys/pctrie.h
398
return name##_PCTRIE_VAL2PTR(val); \
sys/sys/pctrie.h
402
void *pctrie_insert_lookup(struct pctrie *ptree, uint64_t *val,
sys/sys/pctrie.h
404
void *pctrie_insert_lookup_strict(struct pctrie *ptree, uint64_t *val,
sys/sys/pctrie.h
406
void pctrie_insert_node(uint64_t *val, struct pctrie_node *parent,
sys/sys/pctrie.h
422
uint64_t *val);
sys/sys/refcount.h
39
#define REFCOUNT_SATURATED(val) (((val) & (1U << 31)) != 0)
sys/sys/sem.h
72
int val; /* value for SETVAL */
sys/sys/sem.h
83
int val; /* value for SETVAL */
sys/sys/sf_buf.h
189
#define SFSTAT_ADD(name, val) \
sys/sys/sf_buf.h
191
(val))
sys/sys/stats.h
258
struct voistatdata_numeric val;
sys/sys/stats.h
267
struct voistatdata_numeric val;
sys/sys/stats.h
559
#define DVBKT(val) DRBKT(val, val)
sys/sys/stats.h
764
stats_ctor_vsd_numeric(uint64_t val)
sys/sys/stats.h
768
tmp.int64.u64 = val;
sys/sys/syscallsubr.h
371
struct itimerspec *val, struct itimerspec *oval);
sys/sys/syscallsubr.h
373
struct itimerspec *val);
sys/sys/sysctl.h
416
#define SYSCTL_BOOL(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
419
ptr, val, sysctl_handle_bool, "CU", descr); \
sys/sys/sysctl.h
423
#define SYSCTL_ADD_BOOL(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
429
__ptr, val, sysctl_handle_bool, "CU", __DESCR(descr), \
sys/sys/sysctl.h
435
#define SYSCTL_S8(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
438
ptr, val, sysctl_handle_8, "C", descr); \
sys/sys/sysctl.h
443
#define SYSCTL_ADD_S8(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
450
__ptr, val, sysctl_handle_8, "C", __DESCR(descr), NULL); \
sys/sys/sysctl.h
455
#define SYSCTL_U8(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
458
ptr, val, sysctl_handle_8, "CU", descr); \
sys/sys/sysctl.h
463
#define SYSCTL_ADD_U8(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
470
__ptr, val, sysctl_handle_8, "CU", __DESCR(descr), NULL); \
sys/sys/sysctl.h
475
#define SYSCTL_S16(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
478
ptr, val, sysctl_handle_16, "S", descr); \
sys/sys/sysctl.h
483
#define SYSCTL_ADD_S16(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
490
__ptr, val, sysctl_handle_16, "S", __DESCR(descr), NULL); \
sys/sys/sysctl.h
495
#define SYSCTL_U16(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
498
ptr, val, sysctl_handle_16, "SU", descr); \
sys/sys/sysctl.h
503
#define SYSCTL_ADD_U16(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
510
__ptr, val, sysctl_handle_16, "SU", __DESCR(descr), NULL); \
sys/sys/sysctl.h
515
#define SYSCTL_S32(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
518
ptr, val, sysctl_handle_32, "I", descr); \
sys/sys/sysctl.h
523
#define SYSCTL_ADD_S32(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
530
__ptr, val, sysctl_handle_32, "I", __DESCR(descr), NULL); \
sys/sys/sysctl.h
535
#define SYSCTL_U32(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
538
ptr, val, sysctl_handle_32, "IU", descr); \
sys/sys/sysctl.h
543
#define SYSCTL_ADD_U32(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
550
__ptr, val, sysctl_handle_32, "IU", __DESCR(descr), NULL); \
sys/sys/sysctl.h
555
#define SYSCTL_S64(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
558
ptr, val, sysctl_handle_64, "Q", descr); \
sys/sys/sysctl.h
563
#define SYSCTL_ADD_S64(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
570
__ptr, val, sysctl_handle_64, "Q", __DESCR(descr), NULL); \
sys/sys/sysctl.h
575
#define SYSCTL_U64(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
578
ptr, val, sysctl_handle_64, "QU", descr); \
sys/sys/sysctl.h
583
#define SYSCTL_ADD_U64(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
590
__ptr, val, sysctl_handle_64, "QU", __DESCR(descr), NULL); \
sys/sys/sysctl.h
595
#define SYSCTL_INT(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
596
SYSCTL_INT_WITH_LABEL(parent, nbr, name, access, ptr, val, descr, NULL)
sys/sys/sysctl.h
598
#define SYSCTL_INT_WITH_LABEL(parent, nbr, name, access, ptr, val, descr, label) \
sys/sys/sysctl.h
601
ptr, val, sysctl_handle_int, "I", descr, label); \
sys/sys/sysctl.h
606
#define SYSCTL_ADD_INT(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
613
__ptr, val, sysctl_handle_int, "I", __DESCR(descr), NULL); \
sys/sys/sysctl.h
618
#define SYSCTL_UINT(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
621
ptr, val, sysctl_handle_int, "IU", descr); \
sys/sys/sysctl.h
626
#define SYSCTL_ADD_UINT(ctx, parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
633
__ptr, val, sysctl_handle_int, "IU", __DESCR(descr), NULL); \
sys/sys/sysctl.h
638
#define SYSCTL_LONG(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
641
ptr, val, sysctl_handle_long, "L", descr); \
sys/sys/sysctl.h
658
#define SYSCTL_ULONG(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
661
ptr, val, sysctl_handle_long, "LU", descr); \
sys/sys/sysctl.h
678
#define SYSCTL_QUAD(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
681
ptr, val, sysctl_handle_64, "Q", descr); \
sys/sys/sysctl.h
697
#define SYSCTL_UQUAD(parent, nbr, name, access, ptr, val, descr) \
sys/sys/sysctl.h
700
ptr, val, sysctl_handle_64, "QU", descr); \
sys/sys/sysproto.h
1063
char val_l_[PADL_(int *)]; int * val; char val_r_[PADR_(int *)];
sys/sys/sysproto.h
1231
char val_l_[PADL_(u_long)]; u_long val; char val_r_[PADR_(u_long)];
sys/sys/sysproto.h
348
char val_l_[PADL_(const void *)]; const void * val; char val_r_[PADR_(const void *)];
sys/sys/sysproto.h
367
char val_l_[PADL_(void *)]; void * val; char val_r_[PADR_(void *)];
sys/sys/systm.h
332
int __result_use_check fueword(volatile const void *base, long *val);
sys/sys/systm.h
333
int __result_use_check fueword32(volatile const void *base, int32_t *val);
sys/sys/systm.h
334
int __result_use_check fueword64(volatile const void *base, int64_t *val);
sys/sys/systm.h
350
int SAN_INTERCEPTOR(fueword)(volatile const void *base, long *val);
sys/sys/systm.h
351
int SAN_INTERCEPTOR(fueword32)(volatile const void *base, int32_t *val);
sys/sys/systm.h
352
int SAN_INTERCEPTOR(fueword64)(volatile const void *base, int64_t *val);
sys/sys/tree.h
1004
if (val < 0) \
sys/sys/tree.h
164
name##_SPLAY_MIN_MAX(struct name *head, int val) \
sys/sys/tree.h
166
name##_SPLAY_MINMAX(head, val); \
sys/sys/tree.h
998
name##_RB_MINMAX(struct name *head, int val) \
sys/sys/umtx.h
137
int _umtx_op(void *obj, int op, u_long val, void *uaddr, void *uaddr2);
sys/sys/umtx.h
138
int _umtx_op_err(void *obj, int op, u_long val, void *uaddr, void *uaddr2);
sys/ufs/ffs/ffs_vfsops.c
1018
mp->mnt_stat.f_fsid.val[0] = fs->fs_id[0];
sys/ufs/ffs/ffs_vfsops.c
1019
mp->mnt_stat.f_fsid.val[1] = fs->fs_id[1];
sys/ufs/ufs/inode.h
236
#define DIP_SET(ip, field, val) do { \
sys/ufs/ufs/inode.h
238
(ip)->i_din1->d##field = (val); \
sys/ufs/ufs/inode.h
240
(ip)->i_din2->d##field = (val); \
sys/ufs/ufs/inode.h
242
#define DIP_SET_NLINK(ip, val) do { \
sys/ufs/ufs/inode.h
246
DIP_SET(ip, i_nlink, val); \
sys/ufs/ufs/ufs_dirhash.c
64
#define WRAPINCR(val, limit) (((val) + 1 == (limit)) ? 0 : ((val) + 1))
sys/ufs/ufs/ufs_dirhash.c
65
#define WRAPDECR(val, limit) (((val) == 0) ? ((limit) - 1) : ((val) - 1))
sys/vm/vm_meter.c
307
uint64_t val;
sys/vm/vm_meter.c
312
val = counter_u64_fetch(*(counter_u64_t *)arg1);
sys/vm/vm_meter.c
315
val32 = val; /* truncate */
sys/vm/vm_meter.c
319
return (SYSCTL_OUT(req, &val, sizeof(val)));
sys/vm/vm_meter.c
367
uint32_t val;
sys/vm/vm_meter.c
370
val = fn();
sys/vm/vm_meter.c
371
return (SYSCTL_OUT(req, &val, sizeof(val)));
sys/vm/vm_page.h
797
uint32_t *addr, val;
sys/vm/vm_page.h
805
val = bits << VM_PAGE_AFLAG_SHIFT;
sys/vm/vm_page.h
806
atomic_clear_32(addr, val);
sys/vm/vm_page.h
815
uint32_t *addr, val;
sys/vm/vm_page.h
825
val = bits << VM_PAGE_AFLAG_SHIFT;
sys/vm/vm_page.h
826
atomic_set_32(addr, val);
sys/vm/vm_page.h
925
vm_page_drop(vm_page_t m, u_int val)
sys/vm/vm_page.h
934
old = atomic_fetchadd_int(&m->ref_count, -val);
sys/vm/vm_pageout.c
190
int error, val;
sys/vm/vm_pageout.c
192
val = *(int *)arg1;
sys/vm/vm_pageout.c
193
error = sysctl_handle_int(oidp, &val, 0, req);
sys/vm/vm_pageout.c
196
if (val < arg2 || val > 100)
sys/vm/vm_pageout.c
198
*(int *)arg1 = val;
sys/x86/cpufreq/hwpstate_amd.c
131
#define BITS_VALUE(bits, val) \
sys/x86/cpufreq/hwpstate_amd.c
132
(((val) & (bits)) >> (ffsll((bits)) - 1))
sys/x86/cpufreq/hwpstate_amd.c
133
#define BITS_WITH_VALUE(bits, val) \
sys/x86/cpufreq/hwpstate_amd.c
134
(((uintmax_t)(val) << (ffsll((bits)) - 1)) & (bits))
sys/x86/cpufreq/hwpstate_amd.c
135
#define SET_BITS_VALUE(var, bits, val) \
sys/x86/cpufreq/hwpstate_amd.c
136
((var) = ((var) & ~(bits)) | BITS_WITH_VALUE((bits), (val)))
sys/x86/cpufreq/hwpstate_amd.c
385
uint64_t val;
sys/x86/cpufreq/hwpstate_amd.c
391
error = rdmsr_safe(MSR_AMD_CPPC_REQUEST, &val);
sys/x86/cpufreq/hwpstate_amd.c
395
sc->cppc.request = val;
sys/x86/cpufreq/hwpstate_amd.c
501
u_int val;
sys/x86/cpufreq/hwpstate_amd.c
517
val = BITS_VALUE(arg2, sc->cppc.request);
sys/x86/cpufreq/hwpstate_amd.c
519
error = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/cpufreq/hwpstate_amd.c
523
if (val > max)
sys/x86/cpufreq/hwpstate_amd.c
525
error = set_cppc_request(dev, BITS_WITH_VALUE(arg2, val),
sys/x86/cpufreq/hwpstate_amd.c
539
hwpstate_amd_iscale(int val, int div)
sys/x86/cpufreq/hwpstate_amd.c
543
val /= 10;
sys/x86/cpufreq/hwpstate_amd.c
545
val /= 10;
sys/x86/cpufreq/hwpstate_amd.c
547
val /= 10;
sys/x86/cpufreq/hwpstate_amd.c
552
return (val);
sys/x86/cpufreq/hwpstate_intel.c
246
uint32_t val;
sys/x86/cpufreq/hwpstate_intel.c
263
val = (sc->req & IA32_HWP_REQUEST_ENERGY_PERFORMANCE_PREFERENCE) >> 24;
sys/x86/cpufreq/hwpstate_intel.c
264
val = raw_to_percent(val);
sys/x86/cpufreq/hwpstate_intel.c
278
val = sc->hwp_energy_perf_bias &
sys/x86/cpufreq/hwpstate_intel.c
280
val = raw_to_percent_perf_bias(val);
sys/x86/cpufreq/hwpstate_intel.c
283
MPASS(val >= 0 && val <= 100);
sys/x86/cpufreq/hwpstate_intel.c
285
ret = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/cpufreq/hwpstate_intel.c
289
if (val > 100) {
sys/x86/cpufreq/hwpstate_intel.c
295
val = percent_to_raw(val);
sys/x86/cpufreq/hwpstate_intel.c
299
| (val << 24u));
sys/x86/cpufreq/hwpstate_intel.c
306
val = percent_to_raw_perf_bias(val);
sys/x86/cpufreq/hwpstate_intel.c
307
MPASS((val & ~IA32_ENERGY_PERF_BIAS_POLICY_HINT_MASK) == 0);
sys/x86/cpufreq/hwpstate_intel.c
311
~IA32_ENERGY_PERF_BIAS_POLICY_HINT_MASK) | val);
sys/x86/cpufreq/p4tcc.c
237
int i, val;
sys/x86/cpufreq/p4tcc.c
247
val = TCC_NUM_SETTINGS;
sys/x86/cpufreq/p4tcc.c
248
for (i = 0; i < sc->set_count; i++, val--) {
sys/x86/cpufreq/p4tcc.c
249
sets[i].freq = TCC_SPEED_PERCENT(val);
sys/x86/cpufreq/p4tcc.c
262
int val;
sys/x86/cpufreq/p4tcc.c
272
val = set->freq * TCC_NUM_SETTINGS / 10000;
sys/x86/cpufreq/p4tcc.c
273
if (val * 10000 != set->freq * TCC_NUM_SETTINGS ||
sys/x86/cpufreq/p4tcc.c
274
val < sc->lowest_val || val > TCC_NUM_SETTINGS)
sys/x86/cpufreq/p4tcc.c
285
if (val < TCC_NUM_SETTINGS)
sys/x86/cpufreq/p4tcc.c
286
msr |= (val << TCC_REG_OFFSET) | TCC_ENABLE_ONDEMAND;
sys/x86/cpufreq/p4tcc.c
309
int val;
sys/x86/cpufreq/p4tcc.c
325
val = (msr >> TCC_REG_OFFSET) & (TCC_NUM_SETTINGS - 1);
sys/x86/cpufreq/p4tcc.c
327
val = TCC_NUM_SETTINGS;
sys/x86/cpufreq/p4tcc.c
330
set->freq = TCC_SPEED_PERCENT(val);
sys/x86/cpufreq/powernow.c
341
u_int val;
sys/x86/cpufreq/powernow.c
358
val = cvid - (1 << sc->mvs);
sys/x86/cpufreq/powernow.c
359
rv = pn8_write_fidvid(cfid, (val > 0) ? val : 0, 1ULL, &status);
sys/x86/cpufreq/powernow.c
393
val = cfid + fid_delta;
sys/x86/cpufreq/powernow.c
395
val = FID_TO_VCO_FID(cfid) + fid_delta;
sys/x86/cpufreq/powernow.c
397
val = cfid - fid_delta;
sys/x86/cpufreq/powernow.c
398
rv = pn8_write_fidvid(val, cvid,
sys/x86/include/vmware_guestrpc.h
34
int vmware_guestrpc_set_guestinfo(const char *keyword, const char *val);
sys/x86/iommu/amd_drv.c
840
amdiommu_dev_prop_dtr(device_t dev, const char *name, void *val, void *dtr_ctx)
sys/x86/iommu/amd_drv.c
842
free(val, M_DEVBUF);
sys/x86/iommu/amd_iommu.h
165
amdiommu_write4(const struct amdiommu_unit *unit, int reg, uint32_t val)
sys/x86/iommu/amd_iommu.h
167
bus_write_4(unit->mmio_res, reg, val);
sys/x86/iommu/amd_iommu.h
171
amdiommu_write8(const struct amdiommu_unit *unit, int reg, uint64_t val)
sys/x86/iommu/amd_iommu.h
176
low = val;
sys/x86/iommu/amd_iommu.h
177
high = val >> 32;
sys/x86/iommu/amd_iommu.h
181
bus_write_8(unit->mmio_res, reg, val);
sys/x86/iommu/intel_ctx.c
315
uint32_t val;
sys/x86/iommu/intel_ctx.c
336
val = pci_read_config(root, PCIR_PMBASEL_1, 2);
sys/x86/iommu/intel_ctx.c
337
if (val != 0 || pci_read_config(root, PCIR_PMLIMITL_1, 2) != 0) {
sys/x86/iommu/intel_ctx.c
338
if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
sys/x86/iommu/intel_ctx.c
341
val);
sys/x86/iommu/intel_ctx.c
346
base = PCI_PPBMEMBASE(0, val);
sys/x86/iommu/intel_dmar.h
293
dmar_write4(const struct dmar_unit *unit, int reg, uint32_t val)
sys/x86/iommu/intel_dmar.h
296
KASSERT(reg != DMAR_GCMD_REG || (val & DMAR_GCMD_TE) ==
sys/x86/iommu/intel_dmar.h
299
unit->hw_gcmd, val));
sys/x86/iommu/intel_dmar.h
300
bus_write_4(unit->regs, reg, val);
sys/x86/iommu/intel_dmar.h
304
dmar_write8(const struct dmar_unit *unit, int reg, uint64_t val)
sys/x86/iommu/intel_dmar.h
311
low = val;
sys/x86/iommu/intel_dmar.h
312
high = val >> 32;
sys/x86/iommu/intel_dmar.h
316
bus_write_8(unit->regs, reg, val);
sys/x86/iommu/intel_dmar.h
334
dmar_pte_store1(volatile uint64_t *dst, uint64_t val)
sys/x86/iommu/intel_dmar.h
340
hi = val >> 32;
sys/x86/iommu/intel_dmar.h
341
lo = val;
sys/x86/iommu/intel_dmar.h
346
*dst = val;
sys/x86/iommu/intel_dmar.h
351
dmar_pte_store(volatile uint64_t *dst, uint64_t val)
sys/x86/iommu/intel_dmar.h
355
dst, (uintmax_t)*dst, (uintmax_t)val));
sys/x86/iommu/intel_dmar.h
356
dmar_pte_store1(dst, val);
sys/x86/iommu/intel_dmar.h
360
dmar_pte_update(volatile uint64_t *dst, uint64_t val)
sys/x86/iommu/intel_dmar.h
369
dmar_pte_store1(dst, val);
sys/x86/iommu/intel_utils.c
537
uint64_t val;
sys/x86/iommu/intel_utils.c
540
val = dmar_get_timeout();
sys/x86/iommu/intel_utils.c
541
error = sysctl_handle_long(oidp, &val, 0, req);
sys/x86/iommu/intel_utils.c
544
dmar_update_timeout(val);
sys/x86/isa/atrtc.c
112
rtcout_locked(int reg, u_char val)
sys/x86/isa/atrtc.c
121
outb(IO_RTC + 1, val);
sys/x86/isa/atrtc.c
128
u_char val;
sys/x86/isa/atrtc.c
131
val = rtcin_locked(reg);
sys/x86/isa/atrtc.c
133
return (val);
sys/x86/isa/atrtc.c
137
writertc(int reg, u_char val)
sys/x86/isa/atrtc.c
141
rtcout_locked(reg, val);
sys/x86/pci/pci_early_quirks.c
100
val = ctrl & I855_GMCH_GMS_MASK;
sys/x86/pci/pci_early_quirks.c
102
switch (val) {
sys/x86/pci/pci_early_quirks.c
137
vm_paddr_t val;
sys/x86/pci/pci_early_quirks.c
140
val = (ctrl >> SNB_GMCH_GMS_SHIFT) & SNB_GMCH_GMS_MASK;
sys/x86/pci/pci_early_quirks.c
141
return (val * MiB(32));
sys/x86/pci/pci_early_quirks.c
148
vm_paddr_t val;
sys/x86/pci/pci_early_quirks.c
151
val = (ctrl >> BDW_GMCH_GMS_SHIFT) & BDW_GMCH_GMS_MASK;
sys/x86/pci/pci_early_quirks.c
152
return (val * MiB(32));
sys/x86/pci/pci_early_quirks.c
159
vm_paddr_t val;
sys/x86/pci/pci_early_quirks.c
162
val = (ctrl >> SNB_GMCH_GMS_SHIFT) & SNB_GMCH_GMS_MASK;
sys/x86/pci/pci_early_quirks.c
169
if (val < 0x11)
sys/x86/pci/pci_early_quirks.c
170
return (val * MiB(32));
sys/x86/pci/pci_early_quirks.c
171
else if (val < 0x17)
sys/x86/pci/pci_early_quirks.c
172
return ((val - 0x11) * MiB(4) + MiB(8));
sys/x86/pci/pci_early_quirks.c
174
return ((val - 0x17) * MiB(4) + MiB(36));
sys/x86/pci/pci_early_quirks.c
181
vm_paddr_t val;
sys/x86/pci/pci_early_quirks.c
184
val = (ctrl >> BDW_GMCH_GMS_SHIFT) & BDW_GMCH_GMS_MASK;
sys/x86/pci/pci_early_quirks.c
188
if (val < 0xF0)
sys/x86/pci/pci_early_quirks.c
189
return (val * MiB(32));
sys/x86/pci/pci_early_quirks.c
190
return ((val - 0xF0) * MiB(4) + MiB(4));
sys/x86/pci/pci_early_quirks.c
73
vm_paddr_t val;
sys/x86/pci/pci_early_quirks.c
76
val = ctrl & INTEL_BSM_MASK;
sys/x86/pci/pci_early_quirks.c
77
return (val);
sys/x86/pci/pci_early_quirks.c
84
vm_paddr_t val;
sys/x86/pci/pci_early_quirks.c
87
val = ctrl & INTEL_BSM_MASK;
sys/x86/pci/pci_early_quirks.c
88
val |= (uint64_t)pci_cfgregread(
sys/x86/pci/pci_early_quirks.c
90
return (val);
sys/x86/pci/pci_early_quirks.c
97
vm_paddr_t val;
sys/x86/x86/cpu_machdep.c
1150
int error, val;
sys/x86/x86/cpu_machdep.c
1152
val = hw_ibrs_disable;
sys/x86/x86/cpu_machdep.c
1153
error = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/x86/cpu_machdep.c
1156
hw_ibrs_disable = val != 0;
sys/x86/x86/cpu_machdep.c
1222
int error, val;
sys/x86/x86/cpu_machdep.c
1224
val = hw_ssb_disable;
sys/x86/x86/cpu_machdep.c
1225
error = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/x86/cpu_machdep.c
1228
hw_ssb_disable = val;
sys/x86/x86/cpu_machdep.c
1437
int error, val;
sys/x86/x86/cpu_machdep.c
1439
val = hw_mds_disable;
sys/x86/x86/cpu_machdep.c
1440
error = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/x86/cpu_machdep.c
1443
if (val < 0 || val > 3)
sys/x86/x86/cpu_machdep.c
1445
hw_mds_disable = val;
sys/x86/x86/cpu_machdep.c
1583
int error, val;
sys/x86/x86/cpu_machdep.c
1585
val = x86_taa_enable;
sys/x86/x86/cpu_machdep.c
1586
error = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/x86/cpu_machdep.c
1589
if (val < TAA_NONE || val > TAA_AUTO)
sys/x86/x86/cpu_machdep.c
1591
x86_taa_enable = val;
sys/x86/x86/cpu_machdep.c
1659
int error, val;
sys/x86/x86/cpu_machdep.c
1661
val = x86_rngds_mitg_enable;
sys/x86/x86/cpu_machdep.c
1662
error = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/x86/cpu_machdep.c
1665
x86_rngds_mitg_enable = val;
sys/x86/x86/cpu_machdep.c
1781
int error, val;
sys/x86/x86/cpu_machdep.c
1783
val = zenbleed_enable;
sys/x86/x86/cpu_machdep.c
1784
error = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/x86/cpu_machdep.c
1787
zenbleed_enable = val;
sys/x86/x86/identcpu.c
2481
uint64_t val;
sys/x86/x86/identcpu.c
2484
val = rdmsr(true_msr);
sys/x86/x86/identcpu.c
2486
val = rdmsr(msr);
sys/x86/x86/identcpu.c
2489
return (val >> 32);
sys/x86/x86/io_apic.c
112
static void ioapic_write(volatile ioapic_t *apic, int reg, u_int val);
sys/x86/x86/io_apic.c
216
ioapic_write(volatile ioapic_t *apic, int reg, u_int val)
sys/x86/x86/io_apic.c
221
apic->iowin = val;
sys/x86/x86/local_apic.c
367
lapic_write32(enum LAPIC_REGISTERS reg, uint32_t val)
sys/x86/x86/local_apic.c
373
wrmsr(MSR_APIC_000 + reg, val);
sys/x86/x86/local_apic.c
375
*(volatile uint32_t *)(lapic_map + reg * LAPIC_MEM_MUL) = val;
sys/x86/x86/local_apic.c
380
lapic_write32_nofence(enum LAPIC_REGISTERS reg, uint32_t val)
sys/x86/x86/local_apic.c
384
wrmsr(MSR_APIC_000 + reg, val);
sys/x86/x86/local_apic.c
386
*(volatile uint32_t *)(lapic_map + reg * LAPIC_MEM_MUL) = val;
sys/x86/x86/mca.c
176
u_int val;
sys/x86/x86/mca.c
178
val = mca_log_interval.tv_sec;
sys/x86/x86/mca.c
179
error = sysctl_handle_int(oidp, &val, 0, req);
sys/x86/x86/mca.c
182
mca_log_interval.tv_sec = val;
sys/x86/x86/vmware_guestrpc.c
261
vmware_guestrpc_set_guestinfo(const char *keyword, const char *val)
sys/x86/x86/vmware_guestrpc.c
268
printf("%s: %s=%s\n", __func__, keyword, val);
sys/x86/x86/vmware_guestrpc.c
273
sbuf_printf(&sb, "info-set guestinfo.fbsd.%s %s", keyword, val);
sys/x86/x86/x86_mem.c
125
x86_mtrr2mrt(int val)
sys/x86/x86/x86_mem.c
128
if (val < 0 || val >= MTRRTOMRTLEN)
sys/x86/x86/x86_mem.c
130
return (x86_mtrrtomrt[val]);
sys/x86/x86/x86_mem.c
292
int val;
sys/x86/x86/x86_mem.c
294
if ((val = x86_mtrrtype(flags)) == -1)
sys/x86/x86/x86_mem.c
296
return (val & 0xff);
tests/sys/arch/aarch64/sve.c
376
uint64_t *val;
tests/sys/arch/aarch64/sve.c
384
val = malloc(vl);
tests/sys/arch/aarch64/sve.c
385
ATF_REQUIRE(val != NULL);
tests/sys/arch/aarch64/sve.c
405
:: "r"(val) : "z8"
tests/sys/arch/aarch64/sve.c
412
for (size_t i = 0; i < vl / sizeof(*val); i++) {
tests/sys/arch/aarch64/sve.c
413
if (val[i] != 0x3c003c003c003c00)
tests/sys/arch/aarch64/sve.c
417
free(val);
tests/sys/arch/aarch64/sve.c
421
free(val);
tests/sys/arch/aarch64/sve.c
65
uint64_t reg, val;
tests/sys/arch/aarch64/sve.c
82
:: "r"(&val) : "z0", "d0"
tests/sys/arch/aarch64/sve.c
86
ATF_REQUIRE_EQ(val, 0x3c003c003c003c00);
tests/sys/audit/inter-process.c
907
semarg.val = 1;
tests/sys/file/fcntlflags_test.c
102
int fd, flags1, flags2, val;
tests/sys/file/fcntlflags_test.c
113
val = 1;
tests/sys/file/fcntlflags_test.c
114
ATF_REQUIRE_ERRNO(EINVAL, ioctl(fd, FIOASYNC, &val) == -1);
tests/sys/file/path_test.c
776
int pathfd, val;
tests/sys/file/path_test.c
784
val = 0;
tests/sys/file/path_test.c
785
ATF_REQUIRE_ERRNO(EBADF, ioctl(pathfd, FIONBIO, &val) == -1);
tests/sys/file/path_test.c
786
ATF_REQUIRE_ERRNO(EBADF, ioctl(pathfd, FIONREAD, &val) == -1);
tests/sys/file/path_test.c
787
ATF_REQUIRE_ERRNO(EBADF, ioctl(pathfd, FIONWRITE, &val) == -1);
tests/sys/file/path_test.c
788
ATF_REQUIRE_ERRNO(EBADF, ioctl(pathfd, FIONSPACE, &val) == -1);
tests/sys/fs/fusefs/mockfs.cc
483
char val[12];
tests/sys/fs/fusefs/mockfs.cc
485
snprintf(val, sizeof(val), "%d", m_maxread);
tests/sys/fs/fusefs/mockfs.cc
486
build_iovec(&iov, &iovlen, "max_read=", &val, -1);
tests/sys/fs/fusefs/read.cc
115
int val;
tests/sys/fs/fusefs/read.cc
117
size_t size = sizeof(val);
tests/sys/fs/fusefs/read.cc
118
ASSERT_EQ(0, sysctlbyname(node, &val, &size, NULL, 0))
tests/sys/fs/fusefs/read.cc
121
m_maxreadahead = val * get<1>(GetParam());
tests/sys/fs/fusefs/utils.cc
115
int val = 0;
tests/sys/fs/fusefs/utils.cc
116
size_t size = sizeof(val);
tests/sys/fs/fusefs/utils.cc
118
if (sysctlbyname(node, &val, &size, NULL, 0)) {
tests/sys/fs/fusefs/utils.cc
122
return (val != 0);
tests/sys/kern/acct/acct_test.c
42
#define KASSERT(val, msg) assert(val)
tests/sys/kern/jail_lookup_root.c
114
if (fsid.val[0] != fs.f_fsid.val[0] ||
tests/sys/kern/jail_lookup_root.c
115
fsid.val[1] != fs.f_fsid.val[1]) {
tests/sys/kern/sched_affinity.c
23
uint32_t val;
tests/sys/kern/sched_affinity.c
24
size_t sz = sizeof(val);
tests/sys/kern/sched_affinity.c
26
ATF_REQUIRE(sysctlbyname("kern.smp.cpus", &val, &sz, NULL, 0) == 0);
tests/sys/kern/sched_affinity.c
27
return (val);
tests/sys/kern/sched_affinity.c
33
uint32_t val;
tests/sys/kern/sched_affinity.c
34
size_t sz = sizeof(val);
tests/sys/kern/sched_affinity.c
36
ATF_REQUIRE(sysctlbyname("kern.smp.maxcpus", &val, &sz, NULL, 0) == 0);
tests/sys/kern/sched_affinity.c
37
return (val);
tests/sys/kern/sigsys.c
64
sysctlset(const char *name, int val)
tests/sys/kern/sigsys.c
76
ATF_REQUIRE(sysctlbyname(name, NULL, NULL, &val, sizeof(val)) == 0);
tests/sys/kern/sigwait.c
55
support_sysctlset(const char *name, int32_t val)
tests/sys/kern/sigwait.c
58
ATF_REQUIRE(sysctlbyname(name, NULL, NULL, &val, sizeof(val)) == 0);
tests/sys/kern/unix_passfd_test.c
202
int rc, val;
tests/sys/kern/unix_passfd_test.c
204
sz = sizeof(val);
tests/sys/kern/unix_passfd_test.c
205
rc = getsockopt(sockfd, 0, LOCAL_CREDS, &val, &sz);
tests/sys/kern/unix_passfd_test.c
208
return (val != 0);
tests/sys/netlink/netlink_socket.c
171
uint32_t val;
tests/sys/netlink/netlink_socket.c
188
ATF_REQUIRE(nlc[0].val == pid);
tests/sys/netlink/netlink_socket.c
191
ATF_REQUIRE(nlc[1].val == 0);
tests/sys/sys/buf_ring_test.c
35
void *val;
tests/sys/sys/buf_ring_test.c
37
val = buf_ring_peek(br);
tests/sys/sys/buf_ring_test.c
38
if (val != NULL)
tests/sys/sys/buf_ring_test.c
40
return (val);
tests/sys/sys/buf_ring_test.c
46
void *val;
tests/sys/sys/buf_ring_test.c
48
val = buf_ring_peek_clear_sc(br);
tests/sys/sys/buf_ring_test.c
49
if (val != NULL)
tests/sys/sys/buf_ring_test.c
51
return (val);
tests/sys/vm/mlock_test.c
48
int status, val;
tests/sys/vm/mlock_test.c
73
val = ptrace(PT_READ_D, pid, addr, 0);
tests/sys/vm/mlock_test.c
75
ATF_REQUIRE(ptrace(PT_WRITE_D, pid, addr, val) == 0);
tests/sys/vm/shared_shadow_inval_test.c
149
child_write(struct shared_state *ss, int val, size_t len)
tests/sys/vm/shared_shadow_inval_test.c
154
((int *)ss->p)[i / sizeof(int)] = val;
tools/bus_space/C/lang.c
37
uint8_t val;
tools/bus_space/C/lang.c
39
return ((!bs_read(rid, ofs, &val, sizeof(val))) ? -1 : (int)val);
tools/bus_space/C/lang.c
45
uint16_t val;
tools/bus_space/C/lang.c
47
return ((!bs_read(rid, ofs, &val, sizeof(val))) ? -1 : (int)val);
tools/bus_space/C/lang.c
53
uint32_t val;
tools/bus_space/C/lang.c
55
return ((!bs_read(rid, ofs, &val, sizeof(val))) ? -1 : (int64_t)val);
tools/bus_space/C/lang.c
59
bus_write_1(int rid, long ofs, uint8_t val)
tools/bus_space/C/lang.c
62
return ((!bs_write(rid, ofs, &val, sizeof(val))) ? errno : 0);
tools/bus_space/C/lang.c
66
bus_write_2(int rid, long ofs, uint16_t val)
tools/bus_space/C/lang.c
69
return ((!bs_write(rid, ofs, &val, sizeof(val))) ? errno : 0);
tools/bus_space/C/lang.c
73
bus_write_4(int rid, long ofs, uint32_t val)
tools/bus_space/C/lang.c
76
return ((!bs_write(rid, ofs, &val, sizeof(val))) ? errno : 0);
tools/bus_space/C/libbus.h
36
int bus_write_1(int rid, long ofs, uint8_t val);
tools/bus_space/C/libbus.h
37
int bus_write_2(int rid, long ofs, uint16_t val);
tools/bus_space/C/libbus.h
38
int bus_write_4(int rid, long ofs, uint32_t val);
tools/bus_space/Python/lang.c
102
uint16_t val;
tools/bus_space/Python/lang.c
104
if (!PyArg_ParseTuple(args, "ilH", &rid, &ofs, &val))
tools/bus_space/Python/lang.c
106
if (!bs_write(rid, ofs, &val, sizeof(val))) {
tools/bus_space/Python/lang.c
118
uint32_t val;
tools/bus_space/Python/lang.c
120
if (!PyArg_ParseTuple(args, "ilI", &rid, &ofs, &val))
tools/bus_space/Python/lang.c
122
if (!bs_write(rid, ofs, &val, sizeof(val))) {
tools/bus_space/Python/lang.c
38
uint8_t val;
tools/bus_space/Python/lang.c
42
if (!bs_read(rid, ofs, &val, sizeof(val))) {
tools/bus_space/Python/lang.c
46
return (Py_BuildValue("B", val));
tools/bus_space/Python/lang.c
54
uint16_t val;
tools/bus_space/Python/lang.c
58
if (!bs_read(rid, ofs, &val, sizeof(val))) {
tools/bus_space/Python/lang.c
62
return (Py_BuildValue("H", val));
tools/bus_space/Python/lang.c
70
uint32_t val;
tools/bus_space/Python/lang.c
74
if (!bs_read(rid, ofs, &val, sizeof(val))) {
tools/bus_space/Python/lang.c
78
return (Py_BuildValue("I", val));
tools/bus_space/Python/lang.c
86
uint8_t val;
tools/bus_space/Python/lang.c
88
if (!PyArg_ParseTuple(args, "ilB", &rid, &ofs, &val))
tools/bus_space/Python/lang.c
90
if (!bs_write(rid, ofs, &val, sizeof(val))) {
tools/regression/capsicum/syscalls/misc.c
102
iov.iov_base = &val;
tools/regression/capsicum/syscalls/misc.c
103
iov.iov_len = sizeof(val);
tools/regression/capsicum/syscalls/misc.c
88
int val;
tools/regression/netinet/ipsockopt/ipsockopt.c
392
int val[2];
tools/regression/netinet/ipsockopt/ipsockopt.c
399
val[0] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
400
val[1] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
401
len = sizeof(val);
tools/regression/netinet/ipsockopt/ipsockopt.c
402
if (getsockopt(sock, IPPROTO_IP, option, val, &len) < 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
406
if (len != sizeof(val[0]))
tools/regression/netinet/ipsockopt/ipsockopt.c
410
if (val[0] == -1)
tools/regression/netinet/ipsockopt/ipsockopt.c
414
if (val[0] != initial)
tools/regression/netinet/ipsockopt/ipsockopt.c
417
val[0], initial);
tools/regression/netinet/ipsockopt/ipsockopt.c
422
val[0] = 128;
tools/regression/netinet/ipsockopt/ipsockopt.c
423
val[1] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
424
if (setsockopt(sock, IPPROTO_IP, option, val, sizeof(val[0])) < 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
431
val[0] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
432
val[1] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
433
len = sizeof(val);
tools/regression/netinet/ipsockopt/ipsockopt.c
434
if (getsockopt(sock, IPPROTO_IP, option, val, &len) < 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
438
if (len != sizeof(val[0]))
tools/regression/netinet/ipsockopt/ipsockopt.c
442
if (val[0] == -1)
tools/regression/netinet/ipsockopt/ipsockopt.c
446
if (val[0] != 128)
tools/regression/netinet/ipsockopt/ipsockopt.c
448
"128 returned %d", socktypename, optionname, val[0]);
tools/regression/netinet/ipsockopt/ipsockopt.c
453
val[0] = 0;
tools/regression/netinet/ipsockopt/ipsockopt.c
454
val[1] = 0;
tools/regression/netinet/ipsockopt/ipsockopt.c
455
if (setsockopt(sock, IPPROTO_IP, option, val, sizeof(val[0])) < 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
459
if (len != sizeof(val[0]))
tools/regression/netinet/ipsockopt/ipsockopt.c
464
if (val[0] == -1)
tools/regression/netinet/ipsockopt/ipsockopt.c
468
if (val[0] != 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
471
val[0]);
tools/regression/netinet/ipsockopt/ipsockopt.c
479
val[0] = 32000;
tools/regression/netinet/ipsockopt/ipsockopt.c
480
val[1] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
481
if (setsockopt(sock, IPPROTO_IP, option, val, sizeof(val[0])) < 0) {
tools/regression/netinet/ipsockopt/ipsockopt.c
492
val[0] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
493
val[1] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
494
len = sizeof(val);
tools/regression/netinet/ipsockopt/ipsockopt.c
495
if (getsockopt(sock, IPPROTO_IP, option, val, &len) < 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
499
if (len != sizeof(val[0]))
tools/regression/netinet/ipsockopt/ipsockopt.c
504
if (val[0] == -1)
tools/regression/netinet/ipsockopt/ipsockopt.c
508
if (val[0] == 32000)
tools/regression/netinet/ipsockopt/ipsockopt.c
532
int newvalue, val[2];
tools/regression/netinet/ipsockopt/ipsockopt.c
545
val[0] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
546
val[1] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
547
len = sizeof(val);
tools/regression/netinet/ipsockopt/ipsockopt.c
548
if (getsockopt(sock, IPPROTO_IP, option, val, &len) < 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
551
if (len != sizeof(val[0]))
tools/regression/netinet/ipsockopt/ipsockopt.c
555
if (val[0] == -1)
tools/regression/netinet/ipsockopt/ipsockopt.c
559
if (val[0] != initial)
tools/regression/netinet/ipsockopt/ipsockopt.c
562
val[0], initial);
tools/regression/netinet/ipsockopt/ipsockopt.c
576
val[0] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
577
val[1] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
578
len = sizeof(val);
tools/regression/netinet/ipsockopt/ipsockopt.c
579
if (getsockopt(sock, IPPROTO_IP, option, val, &len) < 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
583
if (len != sizeof(val[0]))
tools/regression/netinet/ipsockopt/ipsockopt.c
588
if (val[0] == -1)
tools/regression/netinet/ipsockopt/ipsockopt.c
596
if (val[0] != (newvalue ? 1 : 0))
tools/regression/netinet/ipsockopt/ipsockopt.c
599
val[0]);
tools/regression/netinet/ipsockopt/ipsockopt.c
613
val[0] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
614
val[1] = -1;
tools/regression/netinet/ipsockopt/ipsockopt.c
615
len = sizeof(val);
tools/regression/netinet/ipsockopt/ipsockopt.c
616
if (getsockopt(sock, IPPROTO_IP, option, val, &len) < 0)
tools/regression/netinet/ipsockopt/ipsockopt.c
620
if (len != sizeof(val[0]))
tools/regression/netinet/ipsockopt/ipsockopt.c
624
if (val[0] == -1)
tools/regression/netinet/ipsockopt/ipsockopt.c
628
if (val[0] != newvalue)
tools/regression/posixsem/posixsem.c
1072
int val;
tools/regression/posixsem/posixsem.c
1078
if (ksem_getvalue(id, &val) < 0) {
tools/regression/posixsem/posixsem.c
1083
if (val != SEM_VALUE_MAX) {
tools/regression/posixsem/posixsem.c
1088
if (val < 0) {
tools/regression/posixsem/posixsem.c
448
int val;
tools/regression/posixsem/posixsem.c
450
if (ksem_getvalue(STDERR_FILENO, &val) >= 0) {
tools/regression/posixsem/posixsem.c
521
int val;
tools/regression/posixsem/posixsem.c
523
if (ksem_getvalue(id, &val) < 0) {
tools/regression/posixsem/posixsem.c
527
if (val != expected) {
tools/regression/posixsem/posixsem.c
528
fail_err("sem value should be %d instead of %d", expected, val);
tools/regression/redzone9/redzone.c
49
int error, val = 0;
tools/regression/redzone9/redzone.c
51
error = sysctl_handle_int(oidp, &val, sizeof(val), req);
tools/regression/sigqueue/sigqtest1/sigqtest1.c
23
union sigval val;
tools/regression/sigqueue/sigqtest1/sigqtest1.c
37
val.sival_int = i;
tools/regression/sigqueue/sigqtest1/sigqtest1.c
38
ret = sigqueue(getpid(), SIGRTMIN, val);
tools/regression/sigqueue/sigqtest2/sigqtest2.c
82
union sigval val;
tools/regression/sigqueue/sigqtest2/sigqtest2.c
95
val.sival_int = 1;
tools/regression/sigqueue/sigqtest2/sigqtest2.c
96
while (sigqueue(getpid(), SIGRTMIN, val))
tools/regression/sockets/unix_cmsg/t_cmsgcred_sockcred.c
49
int fd2, rv, val;
tools/regression/sockets/unix_cmsg/t_cmsgcred_sockcred.c
64
val = 1;
tools/regression/sockets/unix_cmsg/t_cmsgcred_sockcred.c
65
if (setsockopt(fd1, 0, LOCAL_CREDS, &val, sizeof(val)) < 0) {
tools/regression/sockets/unix_cmsg/t_sockcred.c
110
val = 1;
tools/regression/sockets/unix_cmsg/t_sockcred.c
111
if (setsockopt(fd2, 0, LOCAL_CREDS, &val, sizeof(val)) < 0) {
tools/regression/sockets/unix_cmsg/t_sockcred.c
77
int fd2, rv, val;
tools/regression/sockets/unix_cmsg/t_sockcred.c
91
val = 1;
tools/regression/sockets/unix_cmsg/t_sockcred.c
92
if (setsockopt(fd1, 0, LOCAL_CREDS, &val, sizeof(val)) < 0) {
tools/regression/sockets/unix_cmsg/uc_common.c
154
int val;
tools/regression/sockets/unix_cmsg/uc_common.c
160
val = fcntl(fd, F_GETFL, 0);
tools/regression/sockets/unix_cmsg/uc_common.c
161
if (val < 0) {
tools/regression/sockets/unix_cmsg/uc_common.c
165
if (fcntl(fd, F_SETFL, val | O_NONBLOCK) < 0) {
tools/regression/sockets/unix_cmsg/uc_common.c
356
int fd, rv, val;
tools/regression/sockets/unix_cmsg/uc_common.c
380
val = fcntl(fd, F_GETFL, 0);
tools/regression/sockets/unix_cmsg/uc_common.c
381
if (val < 0) {
tools/regression/sockets/unix_cmsg/uc_common.c
385
if (fcntl(fd, F_SETFL, val & ~O_NONBLOCK) < 0) {
tools/regression/sysvsem/semtest.c
194
sun.val = 1;
tools/regression/sysvsem/semtest.c
74
int val; /* value for SETVAL */
tools/test/buf_ring/buf_ring_test.c
119
void *val;
tools/test/buf_ring/buf_ring_test.c
139
val = buf_ring_dequeue_mc(br);
tools/test/buf_ring/buf_ring_test.c
142
val = buf_ring_dequeue_sc(br);
tools/test/buf_ring/buf_ring_test.c
145
val = buf_ring_peek(br);
tools/test/buf_ring/buf_ring_test.c
146
if (val != NULL)
tools/test/buf_ring/buf_ring_test.c
150
val = buf_ring_peek_clear_sc(br);
tools/test/buf_ring/buf_ring_test.c
151
if (val != NULL)
tools/test/buf_ring/buf_ring_test.c
157
if (val != NULL) {
tools/test/buf_ring/buf_ring_test.c
159
curr = (size_t)(uintptr_t)val;
tools/test/buf_ring/buf_ring_test.c
170
idx = ((size_t)(uintptr_t)val - 1) /
tools/test/buf_ring/buf_ring_test.c
172
bit = ((size_t)(uintptr_t)val - 1) %
tools/test/buf_ring/buf_ring_test.c
176
printf("Repeat ID: %zx\n", (size_t)(uintptr_t)val);
tools/test/buf_ring/buf_ring_test.c
179
max_vals[id] = (uintptr_t)val;
tools/test/stress2/lib/options.c
251
unsigned long val;
tools/test/stress2/lib/options.c
265
if (sscanf(buf, "%ld", &val) != 1)
tools/test/stress2/lib/options.c
267
return val;
tools/tools/ath/arcode/arcode.c
108
a.op, a.reg, a.val);
tools/tools/ath/arcode/arcode.c
45
printf("read\t%.8x = %.8x\n", a->reg, a->val);
tools/tools/ath/arcode/arcode.c
51
printf("write\t%.8x = %.8x\n", a->reg, a->val);
tools/tools/ath/arcode/arcode.c
57
printf("device\t0x%x/0x%x\n", a->reg, a->val);
tools/tools/ath/arcode/arcode.c
67
printf("mark\t%s (%d): %d\n", s, a->reg, a->val);
tools/tools/ath/athani/main.c
116
val = strtoul(value, NULL, 0);
tools/tools/ath/athani/main.c
128
args[1] = val;
tools/tools/ath/athani/main.c
97
uint32_t cmd, val;
tools/tools/ath/athdecode/main.c
115
r->val ? "change channel" : "no channel change");
tools/tools/ath/athdecode/main.c
118
fprintf(fd, "ar%u_reset.c; line %u", state.chipnum, r->val);
tools/tools/ath/athdecode/main.c
121
if (r->val)
tools/tools/ath/athdecode/main.c
123
state.chipnum, r->val);
tools/tools/ath/athdecode/main.c
128
fprintf(fd, "ar%uChipReset, channel %u MHz", state.chipnum, r->val);
tools/tools/ath/athdecode/main.c
131
fprintf(fd, "ar%uPerCalibration, channel %u MHz", state.chipnum, r->val);
tools/tools/ath/athdecode/main.c
134
fprintf(fd, "ar%uSetChannel, channel %u MHz", state.chipnum, r->val);
tools/tools/ath/athdecode/main.c
137
switch (r->val) {
tools/tools/ath/athdecode/main.c
151
fprintf(fd, "ar%uAniReset, opmode %u", state.chipnum, r->val);
tools/tools/ath/athdecode/main.c
156
fprintf(fd, "ar%uAniPoll, listenTime %u", state.chipnum, r->val);
tools/tools/ath/athdecode/main.c
159
switch (r->val) {
tools/tools/ath/athdecode/main.c
185
fprintf(fd, "ar%uAniControl, cmd %u", state.chipnum, r->val);
tools/tools/ath/athdecode/main.c
190
fprintf(fd, "mark #%u value %u/0x%x", r->reg, r->val, r->val);
tools/tools/ath/athdecode/main.c
201
switch (r->val) {
tools/tools/ath/athdecode/main.c
269
printf("Unknown device id 0x%x\n", r->val);
tools/tools/ath/athdecode/main.c
408
fprintf(fd, "%-30s %s 0x%x", buf, r->op ? "<=" : "=>", r->val);
tools/tools/ath/athdecode/main.c
415
if (r->val & (1 << (n - 1))) {
tools/tools/ath/athprom/athprom.c
129
uint16_t off, val, oval;
tools/tools/ath/athprom/athprom.c
143
val = (uint16_t) strtoul(cp+1, NULL, 0);
tools/tools/ath/athprom/athprom.c
144
if (val == 0 && errno == EINVAL)
tools/tools/ath/athprom/athprom.c
149
off, oval, val);
tools/tools/ath/athprom/athprom.c
153
eewrite(off, val);
tools/tools/ath/athradar/athradar.c
194
const char *val)
tools/tools/ath/athradar/athradar.c
198
v = atoi(val);
tools/tools/ath/athspectral/athspectral.c
189
spectral_enable_at_reset(struct spectralhandler *spectral, int val)
tools/tools/ath/athspectral/athspectral.c
191
int v = val;
tools/tools/ath/athspectral/athspectral.c
213
const char *val)
tools/tools/ath/athspectral/athspectral.c
217
v = atoi(val);
tools/tools/cxgbtool/cxgbtool.c
1142
printf("%u\n", reg.val);
tools/tools/cxgbtool/cxgbtool.c
1184
parse_val_mask_param(const char *s, uint32_t *val, uint32_t *mask,
tools/tools/cxgbtool/cxgbtool.c
1190
*val = strtoul(s, &p, 0);
tools/tools/cxgbtool/cxgbtool.c
1191
if (p == s || *val > default_mask)
tools/tools/cxgbtool/cxgbtool.c
1199
parse_trace_param(const char *s, uint32_t *val, uint32_t *mask)
tools/tools/cxgbtool/cxgbtool.c
1201
return strchr(s, '.') ? parse_ipaddr(s, val, mask) :
tools/tools/cxgbtool/cxgbtool.c
1202
parse_val_mask_param(s, val, mask, 0xffffffffU);
tools/tools/cxgbtool/cxgbtool.c
1208
uint32_t val, mask;
tools/tools/cxgbtool/cxgbtool.c
1241
int ret = parse_trace_param(argv[start_arg + 1], &val, &mask);
tools/tools/cxgbtool/cxgbtool.c
1244
trace.intf = val;
tools/tools/cxgbtool/cxgbtool.c
1247
trace.sip = val;
tools/tools/cxgbtool/cxgbtool.c
1250
trace.dip = val;
tools/tools/cxgbtool/cxgbtool.c
1253
trace.sport = val;
tools/tools/cxgbtool/cxgbtool.c
1256
trace.dport = val;
tools/tools/cxgbtool/cxgbtool.c
1259
trace.vlan = val;
tools/tools/cxgbtool/cxgbtool.c
1262
trace.proto = val;
tools/tools/cxgbtool/cxgbtool.c
1309
nsip.nip = htonl(op.val.sip);
tools/tools/cxgbtool/cxgbtool.c
1310
ndip.nip = htonl(op.val.dip);
tools/tools/cxgbtool/cxgbtool.c
1318
printf(op.val.sport ? "%5u " : " * ", op.val.sport);
tools/tools/cxgbtool/cxgbtool.c
1319
printf(op.val.dport ? "%5u " : " * ", op.val.dport);
tools/tools/cxgbtool/cxgbtool.c
1320
printf(op.val.vlan != 0xfff ? "%4u " : " * ", op.val.vlan);
tools/tools/cxgbtool/cxgbtool.c
1321
printf(op.val.vlan_prio == 7 ? " * " :
tools/tools/cxgbtool/cxgbtool.c
1322
"%1u/%1u ", op.val.vlan_prio, op.val.vlan_prio | 1);
tools/tools/cxgbtool/cxgbtool.c
1344
uint32_t val, mask;
tools/tools/cxgbtool/cxgbtool.c
1373
ret = parse_ipaddr(argv[start_arg + 1], &op.val.sip,
tools/tools/cxgbtool/cxgbtool.c
1376
ret = parse_ipaddr(argv[start_arg + 1], &op.val.dip,
tools/tools/cxgbtool/cxgbtool.c
1380
&val, &mask, 0xffff);
tools/tools/cxgbtool/cxgbtool.c
1381
op.val.sport = val;
tools/tools/cxgbtool/cxgbtool.c
1385
&val, &mask, 0xffff);
tools/tools/cxgbtool/cxgbtool.c
1386
op.val.dport = val;
tools/tools/cxgbtool/cxgbtool.c
1390
&val, &mask, 0xfff);
tools/tools/cxgbtool/cxgbtool.c
1391
op.val.vlan = val;
tools/tools/cxgbtool/cxgbtool.c
1395
&val, &mask, 7);
tools/tools/cxgbtool/cxgbtool.c
1396
op.val.vlan_prio = val;
tools/tools/cxgbtool/cxgbtool.c
1400
val = -1;
tools/tools/cxgbtool/cxgbtool.c
1402
ret = get_int_arg(argv[start_arg + 1], &val);
tools/tools/cxgbtool/cxgbtool.c
1403
op.mac_hit = val != (uint32_t)-1;
tools/tools/cxgbtool/cxgbtool.c
1404
op.mac_addr_idx = op.mac_hit ? val : 0;
tools/tools/cxgbtool/cxgbtool.c
1417
ret = get_int_arg(argv[start_arg + 1], &val);
tools/tools/cxgbtool/cxgbtool.c
1418
op.qset = val;
tools/tools/cxgbtool/cxgbtool.c
1463
unsigned int idx, val;
tools/tools/cxgbtool/cxgbtool.c
1483
!get_sched_param(argc, argv, start_arg, &val))
tools/tools/cxgbtool/cxgbtool.c
1484
op.channel = val;
tools/tools/cxgbtool/cxgbtool.c
1486
!get_sched_param(argc, argv, start_arg, &val))
tools/tools/cxgbtool/cxgbtool.c
1487
op.kbps = val;
tools/tools/cxgbtool/cxgbtool.c
1489
!get_sched_param(argc, argv, start_arg, &val))
tools/tools/cxgbtool/cxgbtool.c
1490
op.class_ipg = val;
tools/tools/cxgbtool/cxgbtool.c
1492
!get_sched_param(argc, argv, start_arg, &val))
tools/tools/cxgbtool/cxgbtool.c
1493
op.flow_ipg = val;
tools/tools/cxgbtool/cxgbtool.c
163
return reg.val;
tools/tools/cxgbtool/cxgbtool.c
167
write_reg(const char *iff_name, uint32_t addr, uint32_t val)
tools/tools/cxgbtool/cxgbtool.c
172
ch_reg.val = val;
tools/tools/cxgbtool/cxgbtool.c
183
uint32_t addr, val = 0, w = 0;
tools/tools/cxgbtool/cxgbtool.c
190
val = strtoul(p + 1, &p, 0);
tools/tools/cxgbtool/cxgbtool.c
199
write_reg(iff_name, addr, val);
tools/tools/cxgbtool/cxgbtool.c
201
val = read_reg(iff_name, addr);
tools/tools/cxgbtool/cxgbtool.c
202
printf("%#x [%u]\n", val, val);
tools/tools/cxgbtool/cxgbtool.c
211
unsigned int cmd, phy_addr, reg, mmd, val;
tools/tools/cxgbtool/cxgbtool.c
223
(cmd == CHELSIO_SET_MIIREG && get_int_arg(argv[start_arg + 3], &val)))
tools/tools/cxgbtool/cxgbtool.c
228
p.val_in = val;
tools/tools/cxgbtool/cxgbtool.c
238
uint32_t xtract(uint32_t val, int shift, int len)
tools/tools/cxgbtool/cxgbtool.c
240
return (val >> shift) & ((1 << len) - 1);
tools/tools/cxgbtool/cxgbtool.c
863
unsigned long val;
tools/tools/cxgbtool/cxgbtool.c
865
val = strtoul(s, &p, 0);
tools/tools/cxgbtool/cxgbtool.c
868
*num_pages = val;
tools/tools/cxgbtool/cxgbtool.c
872
*page_size = val;
tools/tools/fib_multibind/sink.c
52
int error, val;
tools/tools/fib_multibind/sink.c
56
len = sizeof(val);
tools/tools/fib_multibind/sink.c
57
error = sysctlbyname(sysctl, &val, &len, NULL, 0);
tools/tools/fib_multibind/sink.c
60
if (val != 0)
tools/tools/netmap/ctrs.h
20
norm2(char *buf, double val, const char *fmt, int normalize)
tools/tools/netmap/ctrs.h
25
for (i = 0; val >=1000 && i < sizeof(units)/sizeof(const char *) - 1; i++)
tools/tools/netmap/ctrs.h
26
val /= 1000;
tools/tools/netmap/ctrs.h
29
sprintf(buf, fmt, val, units[i]);
tools/tools/netmap/ctrs.h
34
norm(char *buf, double val, int normalize)
tools/tools/netmap/ctrs.h
37
return norm2(buf, val, "%.3f %s", normalize);
tools/tools/netmap/ctrs.h
39
return norm2(buf, val, "%.0f %s", normalize);
usr.bin/chat/chat.c
1343
unsigned long val = 0;
usr.bin/chat/chat.c
1403
val = -i;
usr.bin/chat/chat.c
1405
val = i;
usr.bin/chat/chat.c
1409
val = va_arg(args, unsigned int);
usr.bin/chat/chat.c
1413
val = va_arg(args, unsigned int);
usr.bin/chat/chat.c
1417
val = (unsigned long) va_arg(args, void *);
usr.bin/chat/chat.c
1489
*--str = hexchars[val % base];
usr.bin/chat/chat.c
1490
val = val / base;
usr.bin/chat/chat.c
1491
if (--prec <= 0 && val == 0)
usr.bin/chpass/edit.c
196
char *buf, *p, *val;
usr.bin/chpass/edit.c
216
val = NULL;
usr.bin/chpass/edit.c
245
free(val);
usr.bin/chpass/edit.c
246
asprintf(&val, "%.*s", (int)(buf + len - p), p);
usr.bin/chpass/edit.c
247
if (val == NULL)
usr.bin/chpass/edit.c
249
if (ep->except && strpbrk(val, ep->except)) {
usr.bin/chpass/edit.c
251
tfn, ep->prompt, val);
usr.bin/chpass/edit.c
254
if ((ep->func)(val, pw, ep))
usr.bin/chpass/edit.c
259
free(val);
usr.bin/chpass/edit.c
286
free(val);
usr.bin/cksum/cksum.c
107
if (cfncn(fd, &val, &len)) {
usr.bin/cksum/cksum.c
111
pfncn(fn, val, len);
usr.bin/cksum/cksum.c
51
uint32_t val;
usr.bin/cksum/print.c
40
pcrc(char *fn, uint32_t val, off_t len)
usr.bin/cksum/print.c
42
(void)printf("%lu %jd", (u_long)val, (intmax_t)len);
usr.bin/cksum/print.c
49
psum1(char *fn, uint32_t val, off_t len)
usr.bin/cksum/print.c
51
(void)printf("%lu %jd", (u_long)val, (intmax_t)(len + 1023) / 1024);
usr.bin/cksum/print.c
58
psum2(char *fn, uint32_t val, off_t len)
usr.bin/cksum/print.c
60
(void)printf("%lu %jd", (u_long)val, (intmax_t)(len + 511) / 512);
usr.bin/diff/diff.c
580
print_status(int val, char *path1, char *path2, const char *entry)
usr.bin/diff/diff.c
587
switch (val) {
usr.bin/dtc/fdt.cc
1403
phandle_set.insert({&i.val, i});
usr.bin/dtc/fdt.cc
1424
string target_name = i.get().val.string_data;
usr.bin/dtc/fdt.cc
1504
p->begin()->push_to_buffer(i.get().val.byte_data);
usr.bin/dtc/fdt.cc
1505
assert(i.get().val.byte_data.size() == 4);
usr.bin/dtc/fdt.cc
2166
value += std::to_string(i.prop->offset_of_value(i.val));
usr.bin/dtc/fdt.cc
2182
auto &val = i.get().val;
usr.bin/dtc/fdt.cc
2183
symbols.push_back(create_fixup_entry(i, val.string_data));
usr.bin/dtc/fdt.cc
2184
val.byte_data.push_back(0xde);
usr.bin/dtc/fdt.cc
2185
val.byte_data.push_back(0xad);
usr.bin/dtc/fdt.cc
2186
val.byte_data.push_back(0xbe);
usr.bin/dtc/fdt.cc
2187
val.byte_data.push_back(0xef);
usr.bin/dtc/fdt.cc
2188
val.type = property_value::BINARY;
usr.bin/dtc/fdt.cc
2202
if (!i.val.is_phandle())
usr.bin/dtc/fdt.cc
2241
push_big_endian(pv.byte_data, static_cast<uint32_t>(i.prop->offset_of_value(i.val)));
usr.bin/dtc/fdt.cc
2275
const char *val = strchr(def, '=');
usr.bin/dtc/fdt.cc
2276
if (!val)
usr.bin/dtc/fdt.cc
2286
string name(def, val-def);
usr.bin/dtc/fdt.cc
2288
val++;
usr.bin/dtc/fdt.cc
2289
std::unique_ptr<input_buffer> raw(new input_buffer(val, strlen(val)));
usr.bin/dtc/fdt.cc
334
unsigned long long val;
usr.bin/dtc/fdt.cc
335
if (!input.consume_integer_expression(val))
usr.bin/dtc/fdt.cc
349
if (cell_size < 64 && val >= (1ull << cell_size) &&
usr.bin/dtc/fdt.cc
350
(val | ((1ull << (cell_size - 1)) - 1)) !=
usr.bin/dtc/fdt.cc
362
v.byte_data.push_back(val);
usr.bin/dtc/fdt.cc
365
push_big_endian(v.byte_data, (uint16_t)val);
usr.bin/dtc/fdt.cc
368
push_big_endian(v.byte_data, (uint32_t)val);
usr.bin/dtc/fdt.cc
371
push_big_endian(v.byte_data, (uint64_t)val);
usr.bin/dtc/fdt.cc
399
uint8_t val;
usr.bin/dtc/fdt.cc
400
if (!input.consume_hex_byte(val))
usr.bin/dtc/fdt.cc
406
v.byte_data.push_back(val);
usr.bin/dtc/fdt.cc
712
property::offset_of_value(property_value &val)
usr.bin/dtc/fdt.cc
717
if (&v == &val)
usr.bin/dtc/fdt.hh
400
size_t offset_of_value(property_value &val);
usr.bin/dtc/fdt.hh
806
property_value &val;
usr.bin/dtc/input_buffer.cc
474
valty val;
usr.bin/dtc/input_buffer.cc
480
return {val, true};
usr.bin/dtc/input_buffer.cc
492
void dump_impl() override { std::cerr << val; }
usr.bin/dtc/input_buffer.cc
724
constexpr T operator()(const T &val) const
usr.bin/dtc/input_buffer.cc
726
return +val;
usr.bin/dtc/input_buffer.cc
733
constexpr T operator()(const T &val) const
usr.bin/dtc/input_buffer.cc
735
return ~val;
usr.bin/dtc/util.hh
102
v.push_back((val >> bit) & 0xff);
usr.bin/dtc/util.hh
96
inline void push_big_endian(byte_buffer &v, T val)
usr.bin/elfctl/elfctl.c
262
unsigned long long val;
usr.bin/elfctl/elfctl.c
265
val = strtoll(feature, &eptr, 0);
usr.bin/elfctl/elfctl.c
268
else if (val > UINT32_MAX)
usr.bin/elfctl/elfctl.c
275
input |= val;
usr.bin/elfctl/elfctl.c
298
edit_file_features(Elf *elf, int phcount, int fd, char *val, bool endian_swap)
usr.bin/elfctl/elfctl.c
310
if (!convert_to_feature_val(val, &features))
usr.bin/elfdump/elfdump.c
1102
u_int64_t val;
usr.bin/elfdump/elfdump.c
1104
val = 0;
usr.bin/elfdump/elfdump.c
1107
val = ((uint8_t *)base)[elf32_offsets[member]];
usr.bin/elfdump/elfdump.c
1110
val = ((uint8_t *)base)[elf64_offsets[member]];
usr.bin/elfdump/elfdump.c
1116
return val;
usr.bin/elfdump/elfdump.c
1122
u_int64_t val;
usr.bin/elfdump/elfdump.c
1124
val = 0;
usr.bin/elfdump/elfdump.c
1130
val = be16dec(base);
usr.bin/elfdump/elfdump.c
1133
val = le16dec(base);
usr.bin/elfdump/elfdump.c
1143
val = be16dec(base);
usr.bin/elfdump/elfdump.c
1146
val = le16dec(base);
usr.bin/elfdump/elfdump.c
1156
return val;
usr.bin/elfdump/elfdump.c
1163
u_int64_t val;
usr.bin/elfdump/elfdump.c
1165
val = 0;
usr.bin/elfdump/elfdump.c
1171
val = be16dec(base);
usr.bin/elfdump/elfdump.c
1174
val = le16dec(base);
usr.bin/elfdump/elfdump.c
1184
val = be32dec(base);
usr.bin/elfdump/elfdump.c
1187
val = le32dec(base);
usr.bin/elfdump/elfdump.c
1197
return val;
usr.bin/elfdump/elfdump.c
1204
u_int64_t val;
usr.bin/elfdump/elfdump.c
1206
val = 0;
usr.bin/elfdump/elfdump.c
1212
val = be32dec(base);
usr.bin/elfdump/elfdump.c
1215
val = le32dec(base);
usr.bin/elfdump/elfdump.c
1225
val = be32dec(base);
usr.bin/elfdump/elfdump.c
1228
val = le32dec(base);
usr.bin/elfdump/elfdump.c
1238
return val;
usr.bin/elfdump/elfdump.c
1244
u_int64_t val;
usr.bin/elfdump/elfdump.c
1246
val = 0;
usr.bin/elfdump/elfdump.c
1252
val = be32dec(base);
usr.bin/elfdump/elfdump.c
1255
val = le32dec(base);
usr.bin/elfdump/elfdump.c
1265
val = be64dec(base);
usr.bin/elfdump/elfdump.c
1268
val = le64dec(base);
usr.bin/elfdump/elfdump.c
1278
return val;
usr.bin/elfdump/elfdump.c
913
u_int64_t val;
usr.bin/elfdump/elfdump.c
925
val = elf_get_addr(e, d, D_VAL);
usr.bin/elfdump/elfdump.c
933
fprintf(out, "\td_val: %s\n", dynstr + val);
usr.bin/elfdump/elfdump.c
944
fprintf(out, "\td_val: %jd\n", (intmax_t)val);
usr.bin/factor/factor.c
112
BIGNUM *val;
usr.bin/factor/factor.c
117
val = BN_new();
usr.bin/factor/factor.c
118
if (val == NULL)
usr.bin/factor/factor.c
144
convert_str2bn(&val, p);
usr.bin/factor/factor.c
145
pr_fact(val);
usr.bin/factor/factor.c
150
convert_str2bn(&val, p);
usr.bin/factor/factor.c
151
pr_fact(val);
usr.bin/factor/factor.c
166
pr_fact(BIGNUM *val)
usr.bin/factor/factor.c
171
if (BN_is_zero(val)) /* Historical practice; 0 just exits. */
usr.bin/factor/factor.c
173
if (BN_is_one(val)) {
usr.bin/factor/factor.c
182
BN_print_fp(stdout, val);
usr.bin/factor/factor.c
184
BN_print_dec_fp(stdout, val);
usr.bin/factor/factor.c
186
for (fact = &prime[0]; !BN_is_one(val); ++fact) {
usr.bin/factor/factor.c
189
if (BN_mod_word(val, (BN_ULONG)*fact) == 0)
usr.bin/factor/factor.c
202
if (BN_cmp(bnfact, val) > 0 ||
usr.bin/factor/factor.c
203
BN_check_prime(val, NULL, NULL) == 1)
usr.bin/factor/factor.c
204
pr_print(val);
usr.bin/factor/factor.c
206
pollard_pminus1(val);
usr.bin/factor/factor.c
208
pr_print(val);
usr.bin/factor/factor.c
216
BN_div_word(val, (BN_ULONG)*fact);
usr.bin/factor/factor.c
217
} while (BN_mod_word(val, (BN_ULONG)*fact) == 0);
usr.bin/factor/factor.c
226
pr_print(BIGNUM *val)
usr.bin/factor/factor.c
230
BN_print_fp(stdout, val);
usr.bin/factor/factor.c
233
BN_print_dec_fp(stdout, val);
usr.bin/factor/factor.c
248
pollard_pminus1(BIGNUM *val)
usr.bin/factor/factor.c
266
BN_mod_exp(base, base, i, val, ctx);
usr.bin/factor/factor.c
272
if (!BN_gcd(x, x, val, ctx))
usr.bin/factor/factor.c
282
BN_div(num, NULL, val, x, ctx);
usr.bin/factor/factor.c
290
BN_copy(val, num);
usr.bin/factor/factor.c
383
convert_str2bn(BIGNUM **val, char *p)
usr.bin/factor/factor.c
393
n = BN_hex2bn(val, ++p);
usr.bin/factor/factor.c
395
n = is_hex_str(p) ? BN_hex2bn(val, p) : BN_dec2bn(val, p);
usr.bin/kdump/kdump.c
755
ioctlname(unsigned long val)
usr.bin/kdump/kdump.c
759
str = sysdecode_ioctlname(val);
usr.bin/kdump/kdump.c
763
printf("%lu", val);
usr.bin/kdump/kdump.c
765
printf("%#lx", val);
usr.bin/limits/limits.c
401
rlim_t val;
usr.bin/limits/limits.c
405
val = resources[rcswhich].func(lc, resources[rcswhich].cap, limits[rcswhich].rlim_cur, limits[rcswhich].rlim_cur);
usr.bin/limits/limits.c
406
limits[rcswhich].rlim_cur = resources[rcswhich].func(lc, str, val, val);
usr.bin/limits/limits.c
409
val = resources[rcswhich].func(lc, resources[rcswhich].cap, limits[rcswhich].rlim_max, limits[rcswhich].rlim_max);
usr.bin/limits/limits.c
410
limits[rcswhich].rlim_max = resources[rcswhich].func(lc, str, val, val);
usr.bin/localedef/charmap.c
353
add_charmap_char(const char *name, int val)
usr.bin/localedef/charmap.c
355
add_charmap_impl(name, val, 0);
usr.bin/localedef/collate.c
1290
large[i].val = htote(cc->wc);
usr.bin/localedef/ctype.c
195
add_ctype(int val)
usr.bin/localedef/ctype.c
199
if ((ctn = get_ctype(val)) == NULL) {
usr.bin/localedef/ctype.c
272
add_caseconv(int val, int wc)
usr.bin/localedef/ctype.c
276
ctn = get_ctype(val);
usr.bin/localedef/localedef.h
89
void add_charmap_char(const char *name, int val);
usr.bin/ministat/ministat.c
339
PlotSet(struct dataset *ds, int val)
usr.bin/ministat/ministat.c
353
bar = val-1;
usr.bin/ministat/ministat.c
400
pl->data[j * pl->width + x] |= val;
usr.bin/mkcsmapper/yacc.y
218
put8(void *ptr, size_t ofs, u_int32_t val)
usr.bin/mkcsmapper/yacc.y
221
*((u_int8_t *)ptr + ofs) = val;
usr.bin/mkcsmapper/yacc.y
225
put16(void *ptr, size_t ofs, u_int32_t val)
usr.bin/mkcsmapper/yacc.y
228
u_int16_t oval = htons(val);
usr.bin/mkcsmapper/yacc.y
233
put32(void *ptr, size_t ofs, u_int32_t val)
usr.bin/mkcsmapper/yacc.y
236
u_int32_t oval = htonl(val);
usr.bin/mkcsmapper/yacc.y
245
uint32_t val = 0;
usr.bin/mkcsmapper/yacc.y
262
val = dst_invalid;
usr.bin/mkcsmapper/yacc.y
265
val = dst_ilseq;
usr.bin/mkcsmapper/yacc.y
271
(*putfunc)(table, i, val);
usr.bin/mkcsmapper/yacc.y
444
set_src_zone(u_int32_t val)
usr.bin/mkcsmapper/yacc.y
453
rowcol_bits = val;
usr.bin/mkcsmapper/yacc.y
479
set_dst_invalid(u_int32_t val)
usr.bin/mkcsmapper/yacc.y
487
dst_invalid = val;
usr.bin/mkcsmapper/yacc.y
493
set_dst_ilseq(u_int32_t val)
usr.bin/mkcsmapper/yacc.y
501
dst_ilseq = val;
usr.bin/mkcsmapper/yacc.y
507
set_oob_mode(u_int32_t val)
usr.bin/mkcsmapper/yacc.y
515
oob_mode = val;
usr.bin/mkcsmapper/yacc.y
521
set_dst_unit_bits(u_int32_t val)
usr.bin/mkcsmapper/yacc.y
529
switch (val) {
usr.bin/mkcsmapper/yacc.y
532
dst_unit_bits = val;
usr.bin/mkcsmapper/yacc.y
536
dst_unit_bits = val;
usr.bin/mkcsmapper/yacc.y
540
dst_unit_bits = val;
usr.bin/mkesdb/yacc.y
235
register_named_csid(char *sym, u_int32_t val)
usr.bin/mkesdb/yacc.y
252
csid->ci_csid = val;
usr.bin/mkimg/mkimg.c
202
uint64_t val;
usr.bin/mkimg/mkimg.c
204
if (expand_number(arg, &val) == -1)
usr.bin/mkimg/mkimg.c
206
if (val > UINT_MAX || val < (uint64_t)min || val > (uint64_t)max)
usr.bin/mkimg/mkimg.c
208
*valp = (uint32_t)val;
usr.bin/mkimg/mkimg.c
215
uint64_t val;
usr.bin/mkimg/mkimg.c
217
if (expand_number(arg, &val) == -1)
usr.bin/mkimg/mkimg.c
219
if (val < min || val > max)
usr.bin/mkimg/mkimg.c
221
*valp = val;
usr.bin/mkimg/mkimg.c
631
long long val;
usr.bin/mkimg/mkimg.c
634
val = strtoll(optarg, &ep, 0);
usr.bin/mkimg/mkimg.c
639
timestamp = (time_t)val;
usr.bin/mkuzip/mkuzip.c
496
mkuz_memvcmp(const void *memory, unsigned char val, size_t size)
usr.bin/mkuzip/mkuzip.c
501
return (*mm == val) && memcmp(mm, mm + 1, size - 1) == 0;
usr.bin/netstat/ipsec.c
111
int val;
usr.bin/netstat/ipsec.c
239
if (p->val == (int)proto)
usr.bin/nl/nl.c
129
long val;
usr.bin/nl/nl.c
175
val = strtol(optarg, &ep, 10);
usr.bin/nl/nl.c
177
((val == LONG_MIN || val == LONG_MAX) && errno != 0))
usr.bin/nl/nl.c
180
incr = (int)val;
usr.bin/nl/nl.c
207
val = strtol(optarg, &ep, 10);
usr.bin/nl/nl.c
209
((val == LONG_MIN || val == LONG_MAX) && errno != 0))
usr.bin/nl/nl.c
212
startnum = (int)val;
usr.bin/nl/nl.c
216
val = strtol(optarg, &ep, 10);
usr.bin/nl/nl.c
218
((val == LONG_MIN || val == LONG_MAX) && errno != 0))
usr.bin/nl/nl.c
221
width = (int)val;
usr.bin/number/number.c
213
int val, rval;
usr.bin/number/number.c
225
val = (p[1] - '0') + (p[0] - '0') * 10;
usr.bin/number/number.c
226
if (val) {
usr.bin/number/number.c
229
if (val < 20)
usr.bin/number/number.c
230
(void)printf("%s", name1[val]);
usr.bin/number/number.c
232
(void)printf("%s", name2[val / 10]);
usr.bin/number/number.c
233
if (val % 10)
usr.bin/number/number.c
234
(void)printf("-%s", name1[val % 10]);
usr.bin/primes/primes.c
167
ubig val;
usr.bin/primes/primes.c
182
val = strtoumax(buf, &p, 0);
usr.bin/primes/primes.c
187
return (val);
usr.bin/printf/printf.c
395
intmax_t val;
usr.bin/printf/printf.c
402
if (getnum(&val, &uval, signedconv))
usr.bin/printf/printf.c
405
PF(f, val);
usr.bin/printf/printf.c
554
intmax_t val;
usr.bin/printf/printf.c
558
if (getnum(&val, &uval, 1))
usr.bin/printf/printf.c
561
if (val < INT_MIN || val > INT_MAX) {
usr.bin/printf/printf.c
565
*ip = (int)val;
usr.bin/renice/renice.c
152
getnum(const char *com, const char *str, int *val)
usr.bin/renice/renice.c
168
*val = (int)v;
usr.bin/rpcgen/rpc_clntout.c
61
def = (definition *) l->val;
usr.bin/rpcgen/rpc_hout.c
503
def = (definition *) l->val;
usr.bin/rpcgen/rpc_main.c
616
print_funcdef(l->val, headeronly);
usr.bin/rpcgen/rpc_sample.c
278
def = l->val;
usr.bin/rpcgen/rpc_scan.c
308
findstrconst(char **str, const char **val)
usr.bin/rpcgen/rpc_scan.c
325
*val = tmp;
usr.bin/rpcgen/rpc_scan.c
330
findchrconst(char **str, const char **val)
usr.bin/rpcgen/rpc_scan.c
350
*val = tmp;
usr.bin/rpcgen/rpc_scan.c
355
findconst(char **str, const char **val)
usr.bin/rpcgen/rpc_scan.c
375
*val = tmp;
usr.bin/rpcgen/rpc_svcout.c
207
def = (definition *) l->val;
usr.bin/rpcgen/rpc_svcout.c
242
def = (definition *) l->val;
usr.bin/rpcgen/rpc_svcout.c
299
def = (definition *) l->val;
usr.bin/rpcgen/rpc_svcout.c
307
def = (definition *) l->val;
usr.bin/rpcgen/rpc_svcout.c
628
def = (definition *) l->val;
usr.bin/rpcgen/rpc_svcout.c
845
def = (definition *) l->val;
usr.bin/rpcgen/rpc_svcout.c
992
def = (definition *) l->val;
usr.bin/rpcgen/rpc_tblout.c
68
def = (definition *) l->val;
usr.bin/rpcgen/rpc_util.c
101
storeval(list **lstp, definition *val)
usr.bin/rpcgen/rpc_util.c
108
lst->val = val;
usr.bin/rpcgen/rpc_util.c
87
findval(list *lst, const char *val, int (*cmp)(definition *, const char *))
usr.bin/rpcgen/rpc_util.c
90
if ((*cmp) (lst->val, val)) {
usr.bin/rpcgen/rpc_util.c
91
return (lst->val);
usr.bin/rpcgen/rpc_util.h
152
void storeval(list **lstp, definition *val);
usr.bin/rpcgen/rpc_util.h
161
definition *findval(list *lst, const char *val, int (*cmp)(definition *, const char *));
usr.bin/rpcgen/rpc_util.h
72
definition *val;
usr.bin/rs/rs.cc
337
long val;
usr.bin/rs/rs.cc
371
val = getnum(optarg);
usr.bin/rs/rs.cc
372
if (val <= 0)
usr.bin/rs/rs.cc
374
owidth = val;
usr.bin/rs/rs.cc
436
val = strtol(av[1], NULL, 10);
usr.bin/rs/rs.cc
437
if (val >= 0)
usr.bin/rs/rs.cc
438
ocols = val;
usr.bin/rs/rs.cc
441
val = strtol(av[0], NULL, 10);
usr.bin/rs/rs.cc
442
if (val >= 0)
usr.bin/rs/rs.cc
443
orows = val;
usr.bin/rs/rs.cc
456
long val;
usr.bin/rs/rs.cc
458
val = strtol(p, &ep, 10);
usr.bin/rs/rs.cc
461
return (val);
usr.bin/sdiotool/cam_sdio.c
207
uint8_t val;
usr.bin/sdiotool/cam_sdio.c
208
*ret = sdio_rw_direct(dev, func_number, addr, 0, NULL, &val);
usr.bin/sdiotool/cam_sdio.c
209
return val;
usr.bin/sdiotool/cam_sdio.c
213
sdio_write_1(struct cam_device *dev, uint8_t func_number, uint32_t addr, uint8_t val) {
usr.bin/sdiotool/cam_sdio.c
215
return sdio_rw_direct(dev, func_number, addr, 0, &val, &_val);
usr.bin/sdiotool/cam_sdio.c
220
uint16_t val;
usr.bin/sdiotool/cam_sdio.c
223
/* data */ (caddr_t) &val,
usr.bin/sdiotool/cam_sdio.c
224
/* datalen */ sizeof(val),
usr.bin/sdiotool/cam_sdio.c
228
return val;
usr.bin/sdiotool/cam_sdio.c
233
sdio_write_2(struct cam_device *dev, uint8_t func_number, uint32_t addr, uint16_t val) {
usr.bin/sdiotool/cam_sdio.c
236
/* data */ (caddr_t) &val,
usr.bin/sdiotool/cam_sdio.c
237
/* datalen */ sizeof(val),
usr.bin/sdiotool/cam_sdio.c
245
uint32_t val;
usr.bin/sdiotool/cam_sdio.c
248
/* data */ (caddr_t) &val,
usr.bin/sdiotool/cam_sdio.c
249
/* datalen */ sizeof(val),
usr.bin/sdiotool/cam_sdio.c
253
return val;
usr.bin/sdiotool/cam_sdio.c
258
sdio_write_4(struct cam_device *dev, uint8_t func_number, uint32_t addr, uint32_t val) {
usr.bin/sdiotool/cam_sdio.c
261
/* data */ (caddr_t) &val,
usr.bin/sdiotool/cam_sdio.c
262
/* datalen */ sizeof(val),
usr.bin/sdiotool/cam_sdio.h
77
int sdio_write_1(struct cam_device *dev, uint8_t func_number, uint32_t addr, uint8_t val);
usr.bin/sdiotool/cam_sdio.h
79
int sdio_write_2(struct cam_device *dev, uint8_t func_number, uint32_t addr, uint16_t val);
usr.bin/sdiotool/cam_sdio.h
81
int sdio_write_4(struct cam_device *dev, uint8_t func_number, uint32_t addr, uint32_t val);
usr.bin/showmount/showmount.c
264
int val, val2;
usr.bin/showmount/showmount.c
296
val = strcmp(mp->ml_host, tp->ml_host);
usr.bin/showmount/showmount.c
300
if (val == 0) {
usr.bin/showmount/showmount.c
305
val = val2;
usr.bin/showmount/showmount.c
313
val = val2;
usr.bin/showmount/showmount.c
316
if (val == 0) {
usr.bin/showmount/showmount.c
322
if (val < 0) {
usr.bin/systat/iolat.c
268
char val[BUFSIZ];
usr.bin/systat/iolat.c
281
l3 = sizeof(val);
usr.bin/systat/iolat.c
282
if (sysctl(oid, l2, val, &l3, 0, 0) != 0)
usr.bin/systat/iolat.c
284
val[l3] = '\0';
usr.bin/systat/iolat.c
286
if (split_u64(val, ",", latvals, &nlat) == 0)
usr.bin/systat/iostat.c
348
histogram(long double val, int colwidth, double scale)
usr.bin/systat/iostat.c
352
int v = (int)(val * scale) + 0.5;
usr.bin/systat/iostat.c
356
snprintf(buf, sizeof(buf), "%5.2Lf", val);
usr.bin/systat/sysput.c
100
sysputwuint64(WINDOW *wd, int row, int lcol, int width, uint64_t val, int flags)
usr.bin/systat/sysput.c
102
if(val == 0)
usr.bin/systat/sysput.c
105
sysputuint64(wd, row, lcol, width, val, flags);
usr.bin/systat/sysput.c
73
sysputuint64(WINDOW *wd, int row, int lcol, int width, uint64_t val, int flags)
usr.bin/systat/sysput.c
81
if (val > INT64_MAX)
usr.bin/systat/sysput.c
84
len = humanize_number(&wrtbuf[width], width + 1, val, "",
usr.bin/top/commands.c
148
int val = 0;
usr.bin/top/commands.c
162
val = val * 10 + (ch - '0');
usr.bin/top/commands.c
173
*intp = val;
usr.bin/top/utils.c
105
digits(int val)
usr.bin/top/utils.c
108
if (val == 0) {
usr.bin/top/utils.c
112
while (val > 0) {
usr.bin/top/utils.c
114
val /= 10;
usr.bin/top/utils.c
70
itoa(unsigned int val)
usr.bin/top/utils.c
77
sprintf(buffer, "%u", val);
usr.bin/top/utils.c
88
itoa7(int val)
usr.bin/top/utils.c
95
sprintf(buffer, "%6u", val);
usr.bin/touch/touch.c
311
int val, isutc = 0;
usr.bin/touch/touch.c
326
val = 100000000;
usr.bin/touch/touch.c
328
tvp[0].tv_nsec += val * (*p - '0');
usr.bin/touch/touch.c
330
val /= 10;
usr.bin/tr/str.c
341
int ch, cnt, val;
usr.bin/tr/str.c
345
for (cnt = val = 0;;) {
usr.bin/tr/str.c
349
val = val * 8 + ch - '0';
usr.bin/tr/str.c
358
return (val);
usr.bin/truss/syscalls.c
1663
unsigned int val;
usr.bin/truss/syscalls.c
1665
if (get_struct(pid, args[sc->offset], &val,
usr.bin/truss/syscalls.c
1666
sizeof(val)) == 0)
usr.bin/truss/syscalls.c
1667
fprintf(fp, "{ %u }", val);
usr.bin/truss/syscalls.c
1845
uint64_t val;
usr.bin/truss/syscalls.c
1847
if (get_struct(pid, args[sc->offset], &val,
usr.bin/truss/syscalls.c
1848
sizeof(val)) == 0)
usr.bin/truss/syscalls.c
1849
fprintf(fp, "{ 0x%jx }", (uintmax_t)val);
usr.bin/truss/syscalls.c
2278
if (buf.f_fsid.val[0] != 0 || buf.f_fsid.val[1] != 0) {
usr.bin/truss/syscalls.c
641
int val;
usr.bin/truss/syscalls.c
691
lookup(struct xlat *xlat, int val, int base)
usr.bin/truss/syscalls.c
696
if (xlat->val == val)
usr.bin/truss/syscalls.c
700
sprintf(tmp, "0%o", val);
usr.bin/truss/syscalls.c
703
sprintf(tmp, "0x%x", val);
usr.bin/truss/syscalls.c
706
sprintf(tmp, "%u", val);
usr.bin/truss/syscalls.c
715
xlookup(struct xlat *xlat, int val)
usr.bin/truss/syscalls.c
718
return (lookup(xlat, val, 16));
usr.bin/truss/syscalls.c
727
xlookup_bits(struct xlat *xlat, int val)
usr.bin/truss/syscalls.c
733
rem = val;
usr.bin/truss/syscalls.c
735
if ((xlat->val & rem) == xlat->val) {
usr.bin/truss/syscalls.c
740
if (xlat->val == 0 && val != 0)
usr.bin/truss/syscalls.c
743
rem &= ~(xlat->val);
usr.bin/usbhidaction/usbhidaction.c
206
val = hid_get_data(buf, &cmd->item);
usr.bin/usbhidaction/usbhidaction.c
210
val = hid_get_data(buf, &cmd->item);
usr.bin/usbhidaction/usbhidaction.c
211
if (val == cmd->value)
usr.bin/usbhidaction/usbhidaction.c
216
val = (i < cmd->item.report_count) ?
usr.bin/usbhidaction/usbhidaction.c
219
if (cmd->value != val && cmd->anyvalue == 0)
usr.bin/usbhidaction/usbhidaction.c
223
(cmd->lastseen != val)))) {
usr.bin/usbhidaction/usbhidaction.c
224
docmd(cmd, val, dev, argc, argv);
usr.bin/usbhidaction/usbhidaction.c
229
(abs(cmd->lastused - val) >= cmd->debounce))) {
usr.bin/usbhidaction/usbhidaction.c
230
docmd(cmd, val, dev, argc, argv);
usr.bin/usbhidaction/usbhidaction.c
231
cmd->lastused = val;
usr.bin/usbhidaction/usbhidaction.c
235
cmd->lastseen = val;
usr.bin/usbhidaction/usbhidaction.c
89
int fd, fp, ch, n, val, i;
usr.bin/usbhidctl/usbhid.c
127
var->val = atoi(tmp2);
usr.bin/usbhidctl/usbhid.c
424
hid_set_data(dbuf, &var->h, var->val);
usr.bin/usbhidctl/usbhid.c
49
int val;
usr.bin/vmstat/vmstat.c
1472
#define MEMATTR_STR(type, val) \
usr.bin/vmstat/vmstat.c
1474
str = (val); \
usr.bin/vtfontcvt/vtfontcvt.c
515
unsigned int val;
usr.bin/vtfontcvt/vtfontcvt.c
516
if (sscanf(ln + j * 2, "%2x", &val) ==
usr.bin/vtfontcvt/vtfontcvt.c
519
*(line + j) = (uint8_t)val;
usr.bin/vtfontcvt/vtfontcvt.c
589
unsigned int val;
usr.bin/vtfontcvt/vtfontcvt.c
590
if (sscanf(p + j * 2, "%2x", &val) == 0)
usr.bin/vtfontcvt/vtfontcvt.c
592
*(line + j) = (uint8_t)val;
usr.sbin/acpi/acpidb/acpidb.c
192
UINT64 val;
usr.sbin/acpi/acpidb/acpidb.c
194
val = def_val;
usr.sbin/acpi/acpidb/acpidb.c
199
printf("(default: 0x%jx ", (uintmax_t)val);
usr.sbin/acpi/acpidb/acpidb.c
200
printf(" / %ju) >>", (uintmax_t)val);
usr.sbin/acpi/acpidb/acpidb.c
212
val = strtoq(buf, &ep, 16);
usr.sbin/acpi/acpidb/acpidb.c
214
val = strtoq(buf, &ep, 10);
usr.sbin/acpi/acpidb/acpidb.c
218
return (val);
usr.sbin/acpi/acpidb/acpidb.c
302
UINT8 val;
usr.sbin/acpi/acpidb/acpidb.c
314
Address + i, &val);
usr.sbin/acpi/acpidb/acpidb.c
318
value |= val << (i * 8);
usr.sbin/acpi/acpidb/acpidb.c
344
val = value & 0xff;
usr.sbin/acpi/acpidb/acpidb.c
346
Address + i, &val);
usr.sbin/apm/apm.c
58
long val;
usr.sbin/apm/apm.c
60
val = strtoul(boolean, &endp, 0);
usr.sbin/apm/apm.c
62
return (val != 0 ? 1 : 0);
usr.sbin/autofs/automount.c
67
sb->f_fsid.val[0], sb->f_fsid.val[1]);
usr.sbin/autofs/autounmountd.c
131
mntbuf[i].f_fsid.val[0], mntbuf[i].f_fsid.val[1]);
usr.sbin/autofs/autounmountd.c
137
mntbuf[i].f_fsid.val[0], mntbuf[i].f_fsid.val[1]);
usr.sbin/autofs/autounmountd.c
146
af->af_mountpoint, af->af_fsid.val[0], af->af_fsid.val[1]);
usr.sbin/autofs/autounmountd.c
157
ret = asprintf(&fsid_str, "FSID:%d:%d", fsid.val[0], fsid.val[1]);
usr.sbin/autofs/autounmountd.c
196
af->af_fsid.val[0], af->af_fsid.val[1],
usr.sbin/autofs/autounmountd.c
207
af->af_mountpoint, af->af_fsid.val[0], af->af_fsid.val[1],
usr.sbin/bhyve/aarch64/bhyverun_machdep.c
259
uint64_t addr, int size __unused, uint64_t *val, void *arg1, long arg2)
usr.sbin/bhyve/aarch64/bhyverun_machdep.c
266
uart_pl011_write(sc, reg, *val);
usr.sbin/bhyve/aarch64/bhyverun_machdep.c
268
*val = uart_pl011_read(sc, reg);
usr.sbin/bhyve/aarch64/bhyverun_machdep.c
325
uint64_t addr, int size __unused, uint64_t *val, void *arg1, long arg2)
usr.sbin/bhyve/aarch64/bhyverun_machdep.c
332
rtc_pl031_write(sc, reg, *val);
usr.sbin/bhyve/aarch64/bhyverun_machdep.c
334
*val = rtc_pl031_read(sc, reg);
usr.sbin/bhyve/aarch64/fdt.c
46
#define SET_PROP_U32(prop, idx, val) \
usr.sbin/bhyve/aarch64/fdt.c
47
((uint32_t *)(prop))[(idx)] = cpu_to_fdt32(val)
usr.sbin/bhyve/aarch64/fdt.c
48
#define SET_PROP_U64(prop, idx, val) \
usr.sbin/bhyve/aarch64/fdt.c
49
((uint64_t *)(prop))[(idx)] = cpu_to_fdt64(val)
usr.sbin/bhyve/amd64/atkbdc.c
161
atkbdc_kbd_queue_data(struct atkbdc_softc *sc, uint8_t val)
usr.sbin/bhyve/amd64/atkbdc.c
166
sc->kbd.buffer[sc->kbd.bwr] = val;
usr.sbin/bhyve/amd64/atkbdc.c
215
uint8_t val;
usr.sbin/bhyve/amd64/atkbdc.c
221
while (ps2kbd_read(sc->ps2kbd_sc, &val) != -1) {
usr.sbin/bhyve/amd64/atkbdc.c
222
if (val == 0xf0) {
usr.sbin/bhyve/amd64/atkbdc.c
226
val = translation[val] | release;
usr.sbin/bhyve/amd64/atkbdc.c
228
atkbdc_kbd_queue_data(sc, val);
usr.sbin/bhyve/amd64/atkbdc.c
233
if (ps2kbd_read(sc->ps2kbd_sc, &val) != -1)
usr.sbin/bhyve/amd64/atkbdc.c
234
atkbdc_kbd_queue_data(sc, val);
usr.sbin/bhyve/amd64/fwctl.c
203
fget_result(struct iovec **data, int val)
usr.sbin/bhyve/amd64/fwctl.c
216
if (val) {
usr.sbin/bhyve/amd64/fwctl.c
485
fwctl_outw(uint16_t val)
usr.sbin/bhyve/amd64/fwctl.c
487
if (val == 0) {
usr.sbin/bhyve/amd64/fwctl.c
516
fwctl_outl(uint32_t val)
usr.sbin/bhyve/amd64/fwctl.c
521
if (fwctl_request(val))
usr.sbin/bhyve/amd64/inout.c
104
uint32_t eax, val;
usr.sbin/bhyve/amd64/inout.c
179
val = 0;
usr.sbin/bhyve/amd64/inout.c
181
vm_copyin(iov, &val, bytes);
usr.sbin/bhyve/amd64/inout.c
183
retval = handler(ctx, in, port, bytes, &val, arg);
usr.sbin/bhyve/amd64/inout.c
188
vm_copyout(&val, iov, bytes);
usr.sbin/bhyve/amd64/inout.c
221
val = eax & vie_size2mask(bytes);
usr.sbin/bhyve/amd64/inout.c
222
retval = handler(ctx, in, port, bytes, &val, arg);
usr.sbin/bhyve/amd64/inout.c
225
eax |= val & vie_size2mask(bytes);
usr.sbin/bhyve/amd64/kernemu_dev.c
48
uint64_t *val, void *arg1 __unused, long arg2 __unused)
usr.sbin/bhyve/amd64/kernemu_dev.c
51
size, val) != 0)
usr.sbin/bhyve/amd64/mem_x86.c
43
int size, uint64_t *val, void *arg1 __unused, long arg2 __unused)
usr.sbin/bhyve/amd64/mem_x86.c
48
*val = 0xff;
usr.sbin/bhyve/amd64/mem_x86.c
51
*val = 0xffff;
usr.sbin/bhyve/amd64/mem_x86.c
54
*val = 0xffffffff;
usr.sbin/bhyve/amd64/mem_x86.c
57
*val = 0xffffffffffffffff;
usr.sbin/bhyve/amd64/pci_gvt-d.c
66
uint64_t offset, int size, uint64_t val)
usr.sbin/bhyve/amd64/pci_gvt-d.c
70
pci_set_cfgdata8(pi, PCIR_BDSM_GEN11 + offset, val);
usr.sbin/bhyve/amd64/pci_gvt-d.c
73
pci_set_cfgdata16(pi, PCIR_BDSM_GEN11 + offset, val);
usr.sbin/bhyve/amd64/pci_gvt-d.c
76
pci_set_cfgdata32(pi, PCIR_BDSM_GEN11 + offset, val);
usr.sbin/bhyve/amd64/pci_irq.c
106
if (pirq->reg != (val & (PIRQ_DIS | PIRQ_IRQ))) {
usr.sbin/bhyve/amd64/pci_irq.c
109
pirq->reg = val & (PIRQ_DIS | PIRQ_IRQ);
usr.sbin/bhyve/amd64/pci_irq.c
99
pirq_write(struct vmctx *ctx, int pin, uint8_t val)
usr.sbin/bhyve/amd64/pci_irq_machdep.h
45
void pirq_write(struct vmctx *ctx, int pin, uint8_t val);
usr.sbin/bhyve/amd64/pci_lpc.c
425
pci_lpc_cfgwrite(struct pci_devinst *pi, int coff, int bytes, uint32_t val)
usr.sbin/bhyve/amd64/pci_lpc.c
436
pirq_write(pi->pi_vmctx, pirq_pin, val);
usr.sbin/bhyve/amd64/ps2kbd.c
232
fifo_put(struct ps2kbd_softc *sc, uint8_t val)
usr.sbin/bhyve/amd64/ps2kbd.c
238
fifo->buf[fifo->windex] = val;
usr.sbin/bhyve/amd64/ps2kbd.c
245
fifo_get(struct ps2kbd_softc *sc, uint8_t *val)
usr.sbin/bhyve/amd64/ps2kbd.c
251
*val = fifo->buf[fifo->rindex];
usr.sbin/bhyve/amd64/ps2kbd.c
261
ps2kbd_read(struct ps2kbd_softc *sc, uint8_t *val)
usr.sbin/bhyve/amd64/ps2kbd.c
266
retval = fifo_get(sc, val);
usr.sbin/bhyve/amd64/ps2kbd.c
273
ps2kbd_write(struct ps2kbd_softc *sc, uint8_t val)
usr.sbin/bhyve/amd64/ps2kbd.c
289
"command byte 0x%02x", val);
usr.sbin/bhyve/amd64/ps2kbd.c
294
switch (val) {
usr.sbin/bhyve/amd64/ps2kbd.c
317
sc->curcmd = val;
usr.sbin/bhyve/amd64/ps2kbd.c
326
sc->curcmd = val;
usr.sbin/bhyve/amd64/ps2kbd.c
333
sc->curcmd = val;
usr.sbin/bhyve/amd64/ps2kbd.c
338
"0x%02x", val);
usr.sbin/bhyve/amd64/ps2kbd.h
37
int ps2kbd_read(struct ps2kbd_softc *sc, uint8_t *val);
usr.sbin/bhyve/amd64/ps2kbd.h
38
void ps2kbd_write(struct ps2kbd_softc *sc, uint8_t val);
usr.sbin/bhyve/amd64/ps2mouse.c
133
fifo_put(struct ps2mouse_softc *sc, uint8_t val)
usr.sbin/bhyve/amd64/ps2mouse.c
139
fifo->buf[fifo->windex] = val;
usr.sbin/bhyve/amd64/ps2mouse.c
146
fifo_get(struct ps2mouse_softc *sc, uint8_t *val)
usr.sbin/bhyve/amd64/ps2mouse.c
152
*val = fifo->buf[fifo->rindex];
usr.sbin/bhyve/amd64/ps2mouse.c
246
ps2mouse_read(struct ps2mouse_softc *sc, uint8_t *val)
usr.sbin/bhyve/amd64/ps2mouse.c
251
retval = fifo_get(sc, val);
usr.sbin/bhyve/amd64/ps2mouse.c
279
ps2mouse_write(struct ps2mouse_softc *sc, uint8_t val, int insert)
usr.sbin/bhyve/amd64/ps2mouse.c
286
sc->sampling_rate = val;
usr.sbin/bhyve/amd64/ps2mouse.c
290
sc->resolution = val;
usr.sbin/bhyve/amd64/ps2mouse.c
295
"command byte 0x%02x", val);
usr.sbin/bhyve/amd64/ps2mouse.c
301
fifo_put(sc, val);
usr.sbin/bhyve/amd64/ps2mouse.c
303
switch (val) {
usr.sbin/bhyve/amd64/ps2mouse.c
328
sc->curcmd = val;
usr.sbin/bhyve/amd64/ps2mouse.c
354
sc->curcmd = val;
usr.sbin/bhyve/amd64/ps2mouse.c
364
"0x%02x", val);
usr.sbin/bhyve/amd64/ps2mouse.h
37
int ps2mouse_read(struct ps2mouse_softc *sc, uint8_t *val);
usr.sbin/bhyve/amd64/ps2mouse.h
38
void ps2mouse_write(struct ps2mouse_softc *sc, uint8_t val, int insert);
usr.sbin/bhyve/amd64/task_switch.c
102
uint64_t val;
usr.sbin/bhyve/amd64/task_switch.c
105
error = vm_get_register(vcpu, reg, &val);
usr.sbin/bhyve/amd64/task_switch.c
107
return (val);
usr.sbin/bhyve/amd64/task_switch.c
111
SETREG(struct vcpu *vcpu, int reg, uint64_t val)
usr.sbin/bhyve/amd64/task_switch.c
115
error = vm_set_register(vcpu, reg, val);
usr.sbin/bhyve/amd64/vga.c
1002
sc->vga_crtc.crtc_cursor_loc_high = val;
usr.sbin/bhyve/amd64/vga.c
1004
sc->vga_crtc.crtc_cursor_loc |= (val << 8);
usr.sbin/bhyve/amd64/vga.c
1007
sc->vga_crtc.crtc_cursor_loc_low = val;
usr.sbin/bhyve/amd64/vga.c
1009
sc->vga_crtc.crtc_cursor_loc |= (val & 0xff);
usr.sbin/bhyve/amd64/vga.c
1012
sc->vga_crtc.crtc_vert_retrace_start = val;
usr.sbin/bhyve/amd64/vga.c
1015
sc->vga_crtc.crtc_vert_retrace_end = val;
usr.sbin/bhyve/amd64/vga.c
1018
sc->vga_crtc.crtc_vert_disp_end = val;
usr.sbin/bhyve/amd64/vga.c
1021
sc->vga_crtc.crtc_offset = val;
usr.sbin/bhyve/amd64/vga.c
1024
sc->vga_crtc.crtc_underline_loc = val;
usr.sbin/bhyve/amd64/vga.c
1027
sc->vga_crtc.crtc_start_vert_blank = val;
usr.sbin/bhyve/amd64/vga.c
1030
sc->vga_crtc.crtc_end_vert_blank = val;
usr.sbin/bhyve/amd64/vga.c
1033
sc->vga_crtc.crtc_mode_ctrl = val;
usr.sbin/bhyve/amd64/vga.c
1036
sc->vga_crtc.crtc_line_compare = val;
usr.sbin/bhyve/amd64/vga.c
1048
sc->vga_atc.atc_index = val & ATC_IDX_MASK;
usr.sbin/bhyve/amd64/vga.c
1052
sc->vga_atc.atc_palette[sc->vga_atc.atc_index] = val & 0x3f;
usr.sbin/bhyve/amd64/vga.c
1055
sc->vga_atc.atc_mode = val;
usr.sbin/bhyve/amd64/vga.c
1058
sc->vga_atc.atc_overscan_color = val;
usr.sbin/bhyve/amd64/vga.c
1061
sc->vga_atc.atc_color_plane_enb = val;
usr.sbin/bhyve/amd64/vga.c
1064
sc->vga_atc.atc_horiz_pixel_panning = val;
usr.sbin/bhyve/amd64/vga.c
1067
sc->vga_atc.atc_color_select = val;
usr.sbin/bhyve/amd64/vga.c
1069
(val & ATC_CS_C45) << 4;
usr.sbin/bhyve/amd64/vga.c
1071
((val & ATC_CS_C67) >> 2) << 6;
usr.sbin/bhyve/amd64/vga.c
1084
sc->vga_seq.seq_index = val & 0x1f;
usr.sbin/bhyve/amd64/vga.c
1089
sc->vga_seq.seq_reset = val;
usr.sbin/bhyve/amd64/vga.c
1092
sc->vga_seq.seq_clock_mode = val;
usr.sbin/bhyve/amd64/vga.c
1093
sc->vga_seq.seq_cm_dots = (val & SEQ_CM_89) ? 8 : 9;
usr.sbin/bhyve/amd64/vga.c
1096
sc->vga_seq.seq_map_mask = val;
usr.sbin/bhyve/amd64/vga.c
1099
sc->vga_seq.seq_cmap_sel = val;
usr.sbin/bhyve/amd64/vga.c
1101
sc->vga_seq.seq_cmap_pri_off = ((((val & SEQ_CMS_SA) >> SEQ_CMS_SA_SHIFT) * 2) + ((val & SEQ_CMS_SAH) >> SEQ_CMS_SAH_SHIFT)) * 8 * KB;
usr.sbin/bhyve/amd64/vga.c
1102
sc->vga_seq.seq_cmap_sec_off = ((((val & SEQ_CMS_SB) >> SEQ_CMS_SB_SHIFT) * 2) + ((val & SEQ_CMS_SBH) >> SEQ_CMS_SBH_SHIFT)) * 8 * KB;
usr.sbin/bhyve/amd64/vga.c
1105
sc->vga_seq.seq_mm = val;
usr.sbin/bhyve/amd64/vga.c
1118
sc->vga_dac.dac_rd_index = val;
usr.sbin/bhyve/amd64/vga.c
1122
sc->vga_dac.dac_wr_index = val;
usr.sbin/bhyve/amd64/vga.c
1127
sc->vga_dac.dac_wr_subindex] = val;
usr.sbin/bhyve/amd64/vga.c
1146
sc->vga_gc.gc_index = val;
usr.sbin/bhyve/amd64/vga.c
1151
sc->vga_gc.gc_set_reset = val;
usr.sbin/bhyve/amd64/vga.c
1154
sc->vga_gc.gc_enb_set_reset = val;
usr.sbin/bhyve/amd64/vga.c
1157
sc->vga_gc.gc_color_compare = val;
usr.sbin/bhyve/amd64/vga.c
1160
sc->vga_gc.gc_rotate = val;
usr.sbin/bhyve/amd64/vga.c
1161
sc->vga_gc.gc_op = (val >> 3) & 0x3;
usr.sbin/bhyve/amd64/vga.c
1164
sc->vga_gc.gc_read_map_sel = val;
usr.sbin/bhyve/amd64/vga.c
1167
sc->vga_gc.gc_mode = val;
usr.sbin/bhyve/amd64/vga.c
1168
sc->vga_gc.gc_mode_c4 = (val & GC_MODE_C4) != 0;
usr.sbin/bhyve/amd64/vga.c
1170
sc->vga_gc.gc_mode_oe = (val & GC_MODE_OE) != 0;
usr.sbin/bhyve/amd64/vga.c
1171
sc->vga_gc.gc_mode_rm = (val >> 3) & 0x1;
usr.sbin/bhyve/amd64/vga.c
1172
sc->vga_gc.gc_mode_wm = val & 0x3;
usr.sbin/bhyve/amd64/vga.c
1178
sc->vga_gc.gc_misc = val;
usr.sbin/bhyve/amd64/vga.c
1179
sc->vga_gc.gc_misc_gm = val & GC_MISC_GM;
usr.sbin/bhyve/amd64/vga.c
1180
sc->vga_gc.gc_misc_mm = (val & GC_MISC_MM) >>
usr.sbin/bhyve/amd64/vga.c
1184
sc->vga_gc.gc_color_dont_care = val;
usr.sbin/bhyve/amd64/vga.c
1187
sc->vga_gc.gc_bit_mask = val;
usr.sbin/bhyve/amd64/vga.c
1197
sc->vga_misc = val;
usr.sbin/bhyve/amd64/vga.c
1206
printf("XXX vga_port_out_handler() unhandled port 0x%x, val 0x%x\n", port, val);
usr.sbin/bhyve/amd64/vga.c
1217
uint8_t val;
usr.sbin/bhyve/amd64/vga.c
1225
&val, arg);
usr.sbin/bhyve/amd64/vga.c
1227
*eax |= val & 0xff;
usr.sbin/bhyve/amd64/vga.c
1230
val = *eax & 0xff;
usr.sbin/bhyve/amd64/vga.c
1232
val, arg);
usr.sbin/bhyve/amd64/vga.c
1239
&val, arg);
usr.sbin/bhyve/amd64/vga.c
1241
*eax |= val & 0xff;
usr.sbin/bhyve/amd64/vga.c
1244
&val, arg);
usr.sbin/bhyve/amd64/vga.c
1246
*eax |= (val & 0xff) << 8;
usr.sbin/bhyve/amd64/vga.c
1249
val = *eax & 0xff;
usr.sbin/bhyve/amd64/vga.c
1251
val, arg);
usr.sbin/bhyve/amd64/vga.c
1252
val = (*eax >> 8) & 0xff;
usr.sbin/bhyve/amd64/vga.c
1254
val, arg);
usr.sbin/bhyve/amd64/vga.c
399
vga_mem_wr_handler(uint64_t addr, uint8_t val, void *arg1)
usr.sbin/bhyve/amd64/vga.c
452
val = (val >> sc->vga_gc.gc_rotate) |
usr.sbin/bhyve/amd64/vga.c
453
(val << (8 - sc->vga_gc.gc_rotate));
usr.sbin/bhyve/amd64/vga.c
462
c0 = (enb_set_reset & 1) ? (c0 & ~mask) : (val & mask);
usr.sbin/bhyve/amd64/vga.c
463
c1 = (enb_set_reset & 2) ? (c1 & ~mask) : (val & mask);
usr.sbin/bhyve/amd64/vga.c
464
c2 = (enb_set_reset & 4) ? (c2 & ~mask) : (val & mask);
usr.sbin/bhyve/amd64/vga.c
465
c3 = (enb_set_reset & 8) ? (c3 & ~mask) : (val & mask);
usr.sbin/bhyve/amd64/vga.c
478
c0 = enb_set_reset & 1 ? c0 & m0 : val & m0;
usr.sbin/bhyve/amd64/vga.c
479
c1 = enb_set_reset & 2 ? c1 & m1 : val & m1;
usr.sbin/bhyve/amd64/vga.c
480
c2 = enb_set_reset & 4 ? c2 & m2 : val & m2;
usr.sbin/bhyve/amd64/vga.c
481
c3 = enb_set_reset & 8 ? c3 & m3 : val & m3;
usr.sbin/bhyve/amd64/vga.c
489
c0 = enb_set_reset & 1 ? c0 | m0 : val | m0;
usr.sbin/bhyve/amd64/vga.c
490
c1 = enb_set_reset & 2 ? c1 | m1 : val | m1;
usr.sbin/bhyve/amd64/vga.c
491
c2 = enb_set_reset & 4 ? c2 | m2 : val | m2;
usr.sbin/bhyve/amd64/vga.c
492
c3 = enb_set_reset & 8 ? c3 | m3 : val | m3;
usr.sbin/bhyve/amd64/vga.c
500
c0 = enb_set_reset & 1 ? c0 ^ m0 : val ^ m0;
usr.sbin/bhyve/amd64/vga.c
501
c1 = enb_set_reset & 2 ? c1 ^ m1 : val ^ m1;
usr.sbin/bhyve/amd64/vga.c
502
c2 = enb_set_reset & 4 ? c2 ^ m2 : val ^ m2;
usr.sbin/bhyve/amd64/vga.c
503
c3 = enb_set_reset & 8 ? c3 ^ m3 : val ^ m3;
usr.sbin/bhyve/amd64/vga.c
516
m0 = (val & 1 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
517
m1 = (val & 2 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
518
m2 = (val & 4 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
519
m3 = (val & 8 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
532
m0 = (val & 1 ? 0xff : 0x00) | ~mask;
usr.sbin/bhyve/amd64/vga.c
533
m1 = (val & 2 ? 0xff : 0x00) | ~mask;
usr.sbin/bhyve/amd64/vga.c
534
m2 = (val & 4 ? 0xff : 0x00) | ~mask;
usr.sbin/bhyve/amd64/vga.c
535
m3 = (val & 8 ? 0xff : 0x00) | ~mask;
usr.sbin/bhyve/amd64/vga.c
543
m0 = (val & 1 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
544
m1 = (val & 2 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
545
m2 = (val & 4 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
546
m3 = (val & 8 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
554
m0 = (val & 1 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
555
m1 = (val & 2 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
556
m2 = (val & 4 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
557
m3 = (val & 8 ? 0xff : 0x00) & mask;
usr.sbin/bhyve/amd64/vga.c
568
mask = sc->vga_gc.gc_bit_mask & val;
usr.sbin/bhyve/amd64/vga.c
570
val = (val >> sc->vga_gc.gc_rotate) |
usr.sbin/bhyve/amd64/vga.c
571
(val << (8 - sc->vga_gc.gc_rotate));
usr.sbin/bhyve/amd64/vga.c
654
uint64_t *val, void *arg1, long arg2 __unused)
usr.sbin/bhyve/amd64/vga.c
659
vga_mem_wr_handler(addr, *val, arg1);
usr.sbin/bhyve/amd64/vga.c
662
vga_mem_wr_handler(addr, *val, arg1);
usr.sbin/bhyve/amd64/vga.c
663
vga_mem_wr_handler(addr + 1, *val >> 8, arg1);
usr.sbin/bhyve/amd64/vga.c
666
vga_mem_wr_handler(addr, *val, arg1);
usr.sbin/bhyve/amd64/vga.c
667
vga_mem_wr_handler(addr + 1, *val >> 8, arg1);
usr.sbin/bhyve/amd64/vga.c
668
vga_mem_wr_handler(addr + 2, *val >> 16, arg1);
usr.sbin/bhyve/amd64/vga.c
669
vga_mem_wr_handler(addr + 3, *val >> 24, arg1);
usr.sbin/bhyve/amd64/vga.c
672
vga_mem_wr_handler(addr, *val, arg1);
usr.sbin/bhyve/amd64/vga.c
673
vga_mem_wr_handler(addr + 1, *val >> 8, arg1);
usr.sbin/bhyve/amd64/vga.c
674
vga_mem_wr_handler(addr + 2, *val >> 16, arg1);
usr.sbin/bhyve/amd64/vga.c
675
vga_mem_wr_handler(addr + 3, *val >> 24, arg1);
usr.sbin/bhyve/amd64/vga.c
676
vga_mem_wr_handler(addr + 4, *val >> 32, arg1);
usr.sbin/bhyve/amd64/vga.c
677
vga_mem_wr_handler(addr + 5, *val >> 40, arg1);
usr.sbin/bhyve/amd64/vga.c
678
vga_mem_wr_handler(addr + 6, *val >> 48, arg1);
usr.sbin/bhyve/amd64/vga.c
679
vga_mem_wr_handler(addr + 7, *val >> 56, arg1);
usr.sbin/bhyve/amd64/vga.c
685
*val = vga_mem_rd_handler(addr, arg1);
usr.sbin/bhyve/amd64/vga.c
688
*val = vga_mem_rd_handler(addr, arg1);
usr.sbin/bhyve/amd64/vga.c
689
*val |= vga_mem_rd_handler(addr + 1, arg1) << 8;
usr.sbin/bhyve/amd64/vga.c
692
*val = vga_mem_rd_handler(addr, arg1);
usr.sbin/bhyve/amd64/vga.c
693
*val |= vga_mem_rd_handler(addr + 1, arg1) << 8;
usr.sbin/bhyve/amd64/vga.c
694
*val |= vga_mem_rd_handler(addr + 2, arg1) << 16;
usr.sbin/bhyve/amd64/vga.c
695
*val |= vga_mem_rd_handler(addr + 3, arg1) << 24;
usr.sbin/bhyve/amd64/vga.c
698
*val = vga_mem_rd_handler(addr, arg1);
usr.sbin/bhyve/amd64/vga.c
699
*val |= vga_mem_rd_handler(addr + 1, arg1) << 8;
usr.sbin/bhyve/amd64/vga.c
700
*val |= vga_mem_rd_handler(addr + 2, arg1) << 16;
usr.sbin/bhyve/amd64/vga.c
701
*val |= vga_mem_rd_handler(addr + 3, arg1) << 24;
usr.sbin/bhyve/amd64/vga.c
702
*val |= vga_mem_rd_handler(addr + 4, arg1) << 32;
usr.sbin/bhyve/amd64/vga.c
703
*val |= vga_mem_rd_handler(addr + 5, arg1) << 40;
usr.sbin/bhyve/amd64/vga.c
704
*val |= vga_mem_rd_handler(addr + 6, arg1) << 48;
usr.sbin/bhyve/amd64/vga.c
705
*val |= vga_mem_rd_handler(addr + 7, arg1) << 56;
usr.sbin/bhyve/amd64/vga.c
715
int bytes __unused, uint8_t *val, void *arg)
usr.sbin/bhyve/amd64/vga.c
722
*val = sc->vga_crtc.crtc_index;
usr.sbin/bhyve/amd64/vga.c
728
*val = sc->vga_crtc.crtc_horiz_total;
usr.sbin/bhyve/amd64/vga.c
731
*val = sc->vga_crtc.crtc_horiz_disp_end;
usr.sbin/bhyve/amd64/vga.c
734
*val = sc->vga_crtc.crtc_start_horiz_blank;
usr.sbin/bhyve/amd64/vga.c
737
*val = sc->vga_crtc.crtc_end_horiz_blank;
usr.sbin/bhyve/amd64/vga.c
740
*val = sc->vga_crtc.crtc_start_horiz_retrace;
usr.sbin/bhyve/amd64/vga.c
743
*val = sc->vga_crtc.crtc_end_horiz_retrace;
usr.sbin/bhyve/amd64/vga.c
746
*val = sc->vga_crtc.crtc_vert_total;
usr.sbin/bhyve/amd64/vga.c
749
*val = sc->vga_crtc.crtc_overflow;
usr.sbin/bhyve/amd64/vga.c
752
*val = sc->vga_crtc.crtc_present_row_scan;
usr.sbin/bhyve/amd64/vga.c
755
*val = sc->vga_crtc.crtc_max_scan_line;
usr.sbin/bhyve/amd64/vga.c
758
*val = sc->vga_crtc.crtc_cursor_start;
usr.sbin/bhyve/amd64/vga.c
761
*val = sc->vga_crtc.crtc_cursor_end;
usr.sbin/bhyve/amd64/vga.c
764
*val = sc->vga_crtc.crtc_start_addr_high;
usr.sbin/bhyve/amd64/vga.c
767
*val = sc->vga_crtc.crtc_start_addr_low;
usr.sbin/bhyve/amd64/vga.c
770
*val = sc->vga_crtc.crtc_cursor_loc_high;
usr.sbin/bhyve/amd64/vga.c
773
*val = sc->vga_crtc.crtc_cursor_loc_low;
usr.sbin/bhyve/amd64/vga.c
776
*val = sc->vga_crtc.crtc_vert_retrace_start;
usr.sbin/bhyve/amd64/vga.c
779
*val = sc->vga_crtc.crtc_vert_retrace_end;
usr.sbin/bhyve/amd64/vga.c
782
*val = sc->vga_crtc.crtc_vert_disp_end;
usr.sbin/bhyve/amd64/vga.c
785
*val = sc->vga_crtc.crtc_offset;
usr.sbin/bhyve/amd64/vga.c
788
*val = sc->vga_crtc.crtc_underline_loc;
usr.sbin/bhyve/amd64/vga.c
791
*val = sc->vga_crtc.crtc_start_vert_blank;
usr.sbin/bhyve/amd64/vga.c
794
*val = sc->vga_crtc.crtc_end_vert_blank;
usr.sbin/bhyve/amd64/vga.c
797
*val = sc->vga_crtc.crtc_mode_ctrl;
usr.sbin/bhyve/amd64/vga.c
800
*val = sc->vga_crtc.crtc_line_compare;
usr.sbin/bhyve/amd64/vga.c
809
*val = sc->vga_atc.atc_index;
usr.sbin/bhyve/amd64/vga.c
814
*val = sc->vga_atc.atc_palette[sc->vga_atc.atc_index];
usr.sbin/bhyve/amd64/vga.c
817
*val = sc->vga_atc.atc_mode;
usr.sbin/bhyve/amd64/vga.c
820
*val = sc->vga_atc.atc_overscan_color;
usr.sbin/bhyve/amd64/vga.c
823
*val = sc->vga_atc.atc_color_plane_enb;
usr.sbin/bhyve/amd64/vga.c
826
*val = sc->vga_atc.atc_horiz_pixel_panning;
usr.sbin/bhyve/amd64/vga.c
829
*val = sc->vga_atc.atc_color_select;
usr.sbin/bhyve/amd64/vga.c
838
*val = sc->vga_seq.seq_index;
usr.sbin/bhyve/amd64/vga.c
843
*val = sc->vga_seq.seq_reset;
usr.sbin/bhyve/amd64/vga.c
846
*val = sc->vga_seq.seq_clock_mode;
usr.sbin/bhyve/amd64/vga.c
849
*val = sc->vga_seq.seq_map_mask;
usr.sbin/bhyve/amd64/vga.c
852
*val = sc->vga_seq.seq_cmap_sel;
usr.sbin/bhyve/amd64/vga.c
855
*val = sc->vga_seq.seq_mm;
usr.sbin/bhyve/amd64/vga.c
864
*val = sc->vga_dac.dac_palette[3 * sc->vga_dac.dac_rd_index +
usr.sbin/bhyve/amd64/vga.c
873
*val = sc->vga_gc.gc_index;
usr.sbin/bhyve/amd64/vga.c
878
*val = sc->vga_gc.gc_set_reset;
usr.sbin/bhyve/amd64/vga.c
881
*val = sc->vga_gc.gc_enb_set_reset;
usr.sbin/bhyve/amd64/vga.c
884
*val = sc->vga_gc.gc_color_compare;
usr.sbin/bhyve/amd64/vga.c
887
*val = sc->vga_gc.gc_rotate;
usr.sbin/bhyve/amd64/vga.c
890
*val = sc->vga_gc.gc_read_map_sel;
usr.sbin/bhyve/amd64/vga.c
893
*val = sc->vga_gc.gc_mode;
usr.sbin/bhyve/amd64/vga.c
896
*val = sc->vga_gc.gc_misc;
usr.sbin/bhyve/amd64/vga.c
899
*val = sc->vga_gc.gc_color_dont_care;
usr.sbin/bhyve/amd64/vga.c
902
*val = sc->vga_gc.gc_bit_mask;
usr.sbin/bhyve/amd64/vga.c
911
*val = sc->vga_misc;
usr.sbin/bhyve/amd64/vga.c
921
*val = sc->vga_sts1;
usr.sbin/bhyve/amd64/vga.c
926
*val = 0;
usr.sbin/bhyve/amd64/vga.c
929
*val = 0;
usr.sbin/bhyve/amd64/vga.c
942
int bytes __unused, uint8_t val, void *arg)
usr.sbin/bhyve/amd64/vga.c
949
sc->vga_crtc.crtc_index = val;
usr.sbin/bhyve/amd64/vga.c
955
sc->vga_crtc.crtc_horiz_total = val;
usr.sbin/bhyve/amd64/vga.c
958
sc->vga_crtc.crtc_horiz_disp_end = val;
usr.sbin/bhyve/amd64/vga.c
961
sc->vga_crtc.crtc_start_horiz_blank = val;
usr.sbin/bhyve/amd64/vga.c
964
sc->vga_crtc.crtc_end_horiz_blank = val;
usr.sbin/bhyve/amd64/vga.c
967
sc->vga_crtc.crtc_start_horiz_retrace = val;
usr.sbin/bhyve/amd64/vga.c
970
sc->vga_crtc.crtc_end_horiz_retrace = val;
usr.sbin/bhyve/amd64/vga.c
973
sc->vga_crtc.crtc_vert_total = val;
usr.sbin/bhyve/amd64/vga.c
976
sc->vga_crtc.crtc_overflow = val;
usr.sbin/bhyve/amd64/vga.c
979
sc->vga_crtc.crtc_present_row_scan = val;
usr.sbin/bhyve/amd64/vga.c
982
sc->vga_crtc.crtc_max_scan_line = val;
usr.sbin/bhyve/amd64/vga.c
985
sc->vga_crtc.crtc_cursor_start = val;
usr.sbin/bhyve/amd64/vga.c
986
sc->vga_crtc.crtc_cursor_on = (val & CRTC_CS_CO) == 0;
usr.sbin/bhyve/amd64/vga.c
989
sc->vga_crtc.crtc_cursor_end = val;
usr.sbin/bhyve/amd64/vga.c
992
sc->vga_crtc.crtc_start_addr_high = val;
usr.sbin/bhyve/amd64/vga.c
994
sc->vga_crtc.crtc_start_addr |= (val << 8);
usr.sbin/bhyve/amd64/vga.c
997
sc->vga_crtc.crtc_start_addr_low = val;
usr.sbin/bhyve/amd64/vga.c
999
sc->vga_crtc.crtc_start_addr |= (val & 0xff);
usr.sbin/bhyve/amd64/vmexit.c
101
uint64_t val;
usr.sbin/bhyve/amd64/vmexit.c
107
val = 0;
usr.sbin/bhyve/amd64/vmexit.c
108
error = emulate_rdmsr(vcpu, vme->u.msr.code, &val);
usr.sbin/bhyve/amd64/vmexit.c
121
eax = val;
usr.sbin/bhyve/amd64/vmexit.c
125
edx = val >> 32;
usr.sbin/bhyve/amd64/xmsr.c
102
emulate_rdmsr(struct vcpu *vcpu __unused, uint32_t num, uint64_t *val)
usr.sbin/bhyve/amd64/xmsr.c
115
*val = 0;
usr.sbin/bhyve/amd64/xmsr.c
122
*val = 0x000a1003;
usr.sbin/bhyve/amd64/xmsr.c
130
*val = IA32_FEATURE_CONTROL_LOCK;
usr.sbin/bhyve/amd64/xmsr.c
139
*val = 0;
usr.sbin/bhyve/amd64/xmsr.c
146
*val = 0x01000010; /* Reset value */
usr.sbin/bhyve/amd64/xmsr.c
147
*val |= 1 << 9; /* MONITOR/MWAIT disable */
usr.sbin/bhyve/amd64/xmsr.c
157
*val = 0;
usr.sbin/bhyve/amd64/xmsr.c
168
*val = 0;
usr.sbin/bhyve/amd64/xmsr.c
179
*val = 0;
usr.sbin/bhyve/amd64/xmsr.c
188
*val = 0;
usr.sbin/bhyve/amd64/xmsr.c
195
*val = 0;
usr.sbin/bhyve/amd64/xmsr.c
204
*val = 1;
usr.sbin/bhyve/amd64/xmsr.c
213
*val = VM_CR_SVMDIS;
usr.sbin/bhyve/amd64/xmsr.c
48
emulate_wrmsr(struct vcpu *vcpu __unused, uint32_t num, uint64_t val __unused)
usr.sbin/bhyve/amd64/xmsr.h
33
int emulate_wrmsr(struct vcpu *vcpu, uint32_t code, uint64_t val);
usr.sbin/bhyve/amd64/xmsr.h
34
int emulate_rdmsr(struct vcpu *vcpu, uint32_t code, uint64_t *val);
usr.sbin/bhyve/basl.c
279
uint64_t gpa, val;
usr.sbin/bhyve/basl.c
320
val = basl_le_dec(gva + pointer->off, pointer->size);
usr.sbin/bhyve/basl.c
321
val += BHYVE_ACPI_BASE + src_table->off;
usr.sbin/bhyve/basl.c
322
basl_le_enc(gva + pointer->off, val, pointer->size);
usr.sbin/bhyve/basl.c
619
basl_table_append_int(struct basl_table *const table, const uint64_t val,
usr.sbin/bhyve/basl.c
624
assert(size <= sizeof(val));
usr.sbin/bhyve/basl.c
626
basl_le_enc(buf, val, size);
usr.sbin/bhyve/basl.c
86
basl_le_enc(void *pp, uint64_t val, size_t len)
usr.sbin/bhyve/basl.c
92
le64enc(buf, val);
usr.sbin/bhyve/basl.h
94
int basl_table_append_int(struct basl_table *table, uint64_t val, uint8_t size);
usr.sbin/bhyve/bootrom.c
102
var.cmd = *(uint8_t *)val;
usr.sbin/bhyve/bootrom.c
108
memset(val, 0, size);
usr.sbin/bhyve/bootrom.c
112
memcpy(val, var.mmap + offset, size);
usr.sbin/bhyve/bootrom.c
87
int size, uint64_t *val, void *arg1 __unused, long arg2 __unused)
usr.sbin/bhyve/bootrom.c
98
memcpy(var.mmap + offset, val, size);
usr.sbin/bhyve/gdb.c
1243
uint64_t gpa, gva, val;
usr.sbin/bhyve/gdb.c
1322
error = read_mem(vcpus[cur_vcpu], gpa, &val,
usr.sbin/bhyve/gdb.c
1334
append_byte(val);
usr.sbin/bhyve/gdb.c
1335
val >>= 8;
usr.sbin/bhyve/gdb.c
1357
uint64_t gpa, gva, val;
usr.sbin/bhyve/gdb.c
1436
val = parse_byte(data);
usr.sbin/bhyve/gdb.c
1439
val = be16toh(parse_integer(data, 4));
usr.sbin/bhyve/gdb.c
1442
val = be32toh(parse_integer(data, 8));
usr.sbin/bhyve/gdb.c
1444
error = write_mem(vcpus[cur_vcpu], gpa, val,
usr.sbin/bhyve/gdb.c
871
_gdb_set_step(struct vcpu *vcpu, int val)
usr.sbin/bhyve/gdb.c
880
error = vm_set_capability(vcpu, VM_CAP_MTRAP_EXIT, val);
usr.sbin/bhyve/gdb.c
882
error = vm_set_capability(vcpu, VM_CAP_RFLAGS_TF, val);
usr.sbin/bhyve/gdb.c
884
(void)vm_set_capability(vcpu, VM_CAP_MASK_HWINTR, val);
usr.sbin/bhyve/gdb.c
886
error = vm_set_capability(vcpu, VM_CAP_SS_EXIT, val);
usr.sbin/bhyve/gdb.c
888
error = vm_set_capability(vcpu, VM_CAP_MASK_HWINTR, val);
usr.sbin/bhyve/gdb.c
900
int val;
usr.sbin/bhyve/gdb.c
902
if (vm_get_capability(vcpu, VM_CAP_MTRAP_EXIT, &val) != 0) {
usr.sbin/bhyve/gdb.c
903
if (vm_get_capability(vcpu, VM_CAP_RFLAGS_TF, &val) != 0)
usr.sbin/bhyve/mem.c
264
uint64_t *val;
usr.sbin/bhyve/mem.c
276
rma->val, mr->arg1, mr->arg2));
usr.sbin/bhyve/mem.c
284
rma.val = rval;
usr.sbin/bhyve/mem.c
295
rma.val = &wval;
usr.sbin/bhyve/mem.h
37
int size, uint64_t *val, void *arg1, long arg2);
usr.sbin/bhyve/net_utils.c
69
unsigned long val;
usr.sbin/bhyve/net_utils.c
76
val = strtoul(mtu_str, &end, 0);
usr.sbin/bhyve/net_utils.c
81
if (val == ULONG_MAX)
usr.sbin/bhyve/net_utils.c
84
if (val == 0 && errno == EINVAL)
usr.sbin/bhyve/net_utils.c
87
*mtu = val;
usr.sbin/bhyve/pci_e82545.c
717
e82545_devctl(struct e82545_softc *sc, uint32_t val)
usr.sbin/bhyve/pci_e82545.c
720
sc->esc_CTRL = val & ~E1000_CTRL_RST;
usr.sbin/bhyve/pci_e82545.c
722
if (val & E1000_CTRL_RST) {
usr.sbin/bhyve/pci_e82545.c
723
DPRINTF("e1k: s/w reset, ctl %x", val);
usr.sbin/bhyve/pci_e82545.c
743
e82545_rx_ctl(struct e82545_softc *sc, uint32_t val)
usr.sbin/bhyve/pci_e82545.c
747
on = ((val & E1000_RCTL_EN) == E1000_RCTL_EN);
usr.sbin/bhyve/pci_e82545.c
750
sc->esc_RCTL = val & ~0xF9204c01;
usr.sbin/bhyve/pci_e82545.c
753
on ? "on" : "off", sc->esc_RCTL, val);
usr.sbin/bhyve/pci_e82545.c
791
e82545_tx_ctl(struct e82545_softc *sc, uint32_t val)
usr.sbin/bhyve/pci_e82545.c
795
on = ((val & E1000_TCTL_EN) == E1000_TCTL_EN);
usr.sbin/bhyve/pci_e82545.c
811
sc->esc_TCTL = val & ~0xFE800005;
usr.sbin/bhyve/pci_emul.c
1280
int bytes, uint32_t val)
usr.sbin/bhyve/pci_emul.c
1291
msgctrl |= val & rwmask;
usr.sbin/bhyve/pci_emul.c
1292
val = msgctrl;
usr.sbin/bhyve/pci_emul.c
1294
pi->pi_msix.enabled = val & PCIM_MSIXCTRL_MSIX_ENABLE;
usr.sbin/bhyve/pci_emul.c
1295
pi->pi_msix.function_mask = val & PCIM_MSIXCTRL_FUNCTION_MASK;
usr.sbin/bhyve/pci_emul.c
1299
CFGWRITE(pi, offset, val, bytes);
usr.sbin/bhyve/pci_emul.c
1304
int bytes, uint32_t val)
usr.sbin/bhyve/pci_emul.c
1317
msgctrl |= val & rwmask;
usr.sbin/bhyve/pci_emul.c
1318
val = msgctrl;
usr.sbin/bhyve/pci_emul.c
1320
CFGWRITE(pi, offset, val, bytes);
usr.sbin/bhyve/pci_emul.c
1343
int bytes, uint32_t val)
usr.sbin/bhyve/pci_emul.c
1347
CFGWRITE(pi, offset, val, bytes);
usr.sbin/bhyve/pci_emul.c
1385
pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes, uint32_t val,
usr.sbin/bhyve/pci_emul.c
1420
val >>= 16;
usr.sbin/bhyve/pci_emul.c
1427
msicap_cfgwrite(pi, capoff, offset, bytes, val);
usr.sbin/bhyve/pci_emul.c
1430
msixcap_cfgwrite(pi, capoff, offset, bytes, val);
usr.sbin/bhyve/pci_emul.c
1433
pciecap_cfgwrite(pi, capoff, offset, bytes, val);
usr.sbin/bhyve/pci_emul.c
1455
uint64_t addr __unused, int size __unused, uint64_t *val,
usr.sbin/bhyve/pci_emul.c
1463
*val = 0xffffffffffffffff;
usr.sbin/bhyve/pci_emul.c
1471
int bytes, uint64_t *val, void *arg1 __unused, long arg2 __unused)
usr.sbin/bhyve/pci_emul.c
1481
*val = ~0UL;
usr.sbin/bhyve/pci_emul.c
1482
pci_cfgrw(in, bus, slot, func, coff, bytes, (uint32_t *)val);
usr.sbin/bhyve/pci_emul.c
164
int bytes, uint32_t *val);
usr.sbin/bhyve/pci_emul.c
167
CFGWRITE(struct pci_devinst *pi, int coff, uint32_t val, int bytes)
usr.sbin/bhyve/pci_emul.c
171
pci_set_cfgdata8(pi, coff, val);
usr.sbin/bhyve/pci_emul.c
173
pci_set_cfgdata16(pi, coff, val);
usr.sbin/bhyve/pci_emul.c
175
pci_set_cfgdata32(pi, coff, val);
usr.sbin/bhyve/pci_emul.c
550
uint64_t addr, int size, uint64_t *val, void *arg1, long arg2)
usr.sbin/bhyve/pci_emul.c
565
*val = (*pe->pe_barread)(pdi, bidx, offset, size);
usr.sbin/bhyve/pci_emul.c
567
(*pe->pe_barwrite)(pdi, bidx, offset, size, *val);
usr.sbin/bhyve/pci_emul.c
575
uint64_t addr, int size, uint64_t *val, void *arg1, long arg2)
usr.sbin/bhyve/pci_emul.c
593
4, *val & 0xffffffff);
usr.sbin/bhyve/pci_emul.c
595
4, *val >> 32);
usr.sbin/bhyve/pci_emul.c
598
size, *val);
usr.sbin/bhyve/pci_emul.c
602
*val = (*pe->pe_barread)(pdi, bidx,
usr.sbin/bhyve/pci_emul.c
604
*val |= (*pe->pe_barread)(pdi, bidx,
usr.sbin/bhyve/pci_emul.c
607
*val = (*pe->pe_barread)(pdi, bidx,
usr.sbin/bhyve/pci_emul.h
244
uint32_t val, uint8_t capoff, int capid);
usr.sbin/bhyve/pci_emul.h
273
pci_set_cfgdata8(struct pci_devinst *pi, int offset, uint8_t val)
usr.sbin/bhyve/pci_emul.h
276
*(uint8_t *)(pi->pi_cfgdata + offset) = val;
usr.sbin/bhyve/pci_emul.h
280
pci_set_cfgdata16(struct pci_devinst *pi, int offset, uint16_t val)
usr.sbin/bhyve/pci_emul.h
283
*(uint16_t *)(pi->pi_cfgdata + offset) = val;
usr.sbin/bhyve/pci_emul.h
287
pci_set_cfgdata32(struct pci_devinst *pi, int offset, uint32_t val)
usr.sbin/bhyve/pci_emul.h
290
*(uint32_t *)(pi->pi_cfgdata + offset) = val;
usr.sbin/bhyve/pci_emul.h
67
int bytes, uint32_t val);
usr.sbin/bhyve/pci_passthru.c
1132
int coff, int bytes, uint32_t val)
usr.sbin/bhyve/pci_passthru.c
1141
pci_emul_capwrite(pi, coff, bytes, val, sc->psc_msi.capoff,
usr.sbin/bhyve/pci_passthru.c
1153
pci_emul_capwrite(pi, coff, bytes, val, sc->psc_msix.capoff,
usr.sbin/bhyve/pci_passthru.c
1187
passthru_write_config(&sc->psc_sel, PCIR_STATUS, val >> 16, 2);
usr.sbin/bhyve/pci_passthru.c
1191
pci_set_cfgdata16(pi, PCIR_COMMAND, val & 0xffff);
usr.sbin/bhyve/pci_passthru.c
1196
passthru_write_config(&sc->psc_sel, coff, bytes, val);
usr.sbin/bhyve/pci_passthru.c
1204
uint32_t val __unused)
usr.sbin/bhyve/pci_passthru.c
1210
passthru_cfgwrite(struct pci_devinst *pi, int coff, int bytes, uint32_t val)
usr.sbin/bhyve/pci_passthru.c
1217
return (sc->psc_pcir_whandler[coff](sc, pi, coff, bytes, val));
usr.sbin/bhyve/pci_passthru.c
1219
return (passthru_cfgwrite_default(sc, pi, coff, bytes, val));
usr.sbin/bhyve/pci_passthru.c
1275
uint64_t val;
usr.sbin/bhyve/pci_passthru.c
1280
val = msix_table_read(sc, offset, size);
usr.sbin/bhyve/pci_passthru.c
1312
val = pio.pbi_value;
usr.sbin/bhyve/pci_passthru.c
1315
return (val);
usr.sbin/bhyve/pci_passthru.h
37
struct pci_devinst *pi, int coff, int bytes, uint32_t val);
usr.sbin/bhyve/pci_passthru.h
41
int size, uint64_t val);
usr.sbin/bhyve/pci_passthru.h
50
int coff, int bytes, uint32_t val);
usr.sbin/bhyve/pci_uart.c
76
uint8_t val;
usr.sbin/bhyve/pci_uart.c
81
val = uart_ns16550_read(pi->pi_arg, offset);
usr.sbin/bhyve/pci_uart.c
82
return (val);
usr.sbin/bhyve/pci_virtio_console.c
211
uint32_t val __unused)
usr.sbin/bhyve/pci_virtio_scsi.c
399
uint32_t val __unused)
usr.sbin/bhyve/pci_xhci.c
1759
uint64_t val;
usr.sbin/bhyve/pci_xhci.c
1812
val = trb->qwTrb0;
usr.sbin/bhyve/pci_xhci.c
1816
memcpy(xfer->ureq, &val,
usr.sbin/bhyve/pctestdev.c
193
uint64_t addr, int size, uint64_t *val, void *arg1 __unused,
usr.sbin/bhyve/pctestdev.c
203
(void)memcpy(val, pctestdev_iomem_buf + offset, size);
usr.sbin/bhyve/pctestdev.c
206
(void)memcpy(pctestdev_iomem_buf + offset, val, size);
usr.sbin/bhyve/pctestdev.c
77
uint64_t addr, int size, uint64_t *val, void *arg1,
usr.sbin/bhyve/riscv/bhyverun_machdep.c
258
int size __unused, uint64_t *val, void *arg1, long arg2)
usr.sbin/bhyve/riscv/bhyverun_machdep.c
265
uart_ns16550_write(sc, reg, *val);
usr.sbin/bhyve/riscv/bhyverun_machdep.c
267
*val = uart_ns16550_read(sc, reg);
usr.sbin/bhyve/riscv/fdt.c
53
#define SET_PROP_U32(prop, idx, val) \
usr.sbin/bhyve/riscv/fdt.c
54
((uint32_t *)(prop))[(idx)] = cpu_to_fdt32(val)
usr.sbin/bhyve/riscv/fdt.c
55
#define SET_PROP_U64(prop, idx, val) \
usr.sbin/bhyve/riscv/fdt.c
56
((uint64_t *)(prop))[(idx)] = cpu_to_fdt64(val)
usr.sbin/bhyve/riscv/vmexit.c
239
uint32_t val;
usr.sbin/bhyve/riscv/vmexit.c
247
val = SBI_VERS_MAJOR << SBI_SPEC_VERS_MAJOR_OFFSET;
usr.sbin/bhyve/riscv/vmexit.c
248
val |= SBI_VERS_MINOR << SBI_SPEC_VERS_MINOR_OFFSET;
usr.sbin/bhyve/riscv/vmexit.c
251
val = SBI_IMPL_ID_BHYVE;
usr.sbin/bhyve/riscv/vmexit.c
254
val = BHYVE_VERSION;
usr.sbin/bhyve/riscv/vmexit.c
258
val = vmm_sbi_probe_extension(ext_id);
usr.sbin/bhyve/riscv/vmexit.c
261
val = MVENDORID_UNIMPL;
usr.sbin/bhyve/riscv/vmexit.c
264
val = MARCHID_UNIMPL;
usr.sbin/bhyve/riscv/vmexit.c
267
val = 0;
usr.sbin/bhyve/riscv/vmexit.c
273
error = vm_set_register(vcpu, VM_REG_GUEST_A1, val);
usr.sbin/bhyve/tpm_intf_crb.c
104
uint64_t val;
usr.sbin/bhyve/tpm_intf_crb.c
111
uint32_t val;
usr.sbin/bhyve/tpm_intf_crb.c
118
uint32_t val;
usr.sbin/bhyve/tpm_intf_crb.c
124
uint32_t val;
usr.sbin/bhyve/tpm_intf_crb.c
130
uint32_t val;
usr.sbin/bhyve/tpm_intf_crb.c
146
#define CRB_CMD_SIZE_WRITE(regs, val) \
usr.sbin/bhyve/tpm_intf_crb.c
148
regs.cmd_size = val; \
usr.sbin/bhyve/tpm_intf_crb.c
152
#define CRB_CMD_ADDR_WRITE(regs, val) \
usr.sbin/bhyve/tpm_intf_crb.c
154
regs.cmd_addr_lo = val & 0xFFFFFFFF; \
usr.sbin/bhyve/tpm_intf_crb.c
155
regs.cmd_addr_hi = val >> 32; \
usr.sbin/bhyve/tpm_intf_crb.c
158
#define CRB_RSP_SIZE_WRITE(regs, val) \
usr.sbin/bhyve/tpm_intf_crb.c
160
regs.rsp_size = val; \
usr.sbin/bhyve/tpm_intf_crb.c
163
#define CRB_RSP_ADDR_WRITE(regs, val) \
usr.sbin/bhyve/tpm_intf_crb.c
165
regs.rsp_addr = val; \
usr.sbin/bhyve/tpm_intf_crb.c
307
const uint64_t addr, const int size, uint64_t *const val, void *const arg1,
usr.sbin/bhyve/tpm_intf_crb.c
332
error = tpm_crb_mmiocpy(val, ptr, size);
usr.sbin/bhyve/tpm_intf_crb.c
343
*val = *val << shift;
usr.sbin/bhyve/tpm_intf_crb.c
344
tpm_crb_mmiocpy(&loc_ctrl, val, size);
usr.sbin/bhyve/tpm_intf_crb.c
362
*val = *val << shift;
usr.sbin/bhyve/tpm_intf_crb.c
363
tpm_crb_mmiocpy(&req, val, size);
usr.sbin/bhyve/tpm_intf_crb.c
391
*val = *val << shift;
usr.sbin/bhyve/tpm_intf_crb.c
394
tpm_crb_mmiocpy(&start, val, size);
usr.sbin/bhyve/tpm_intf_crb.c
424
error = tpm_crb_mmiocpy(ptr, val, size);
usr.sbin/bhyve/tpm_intf_crb.c
59
uint32_t val;
usr.sbin/bhyve/tpm_intf_crb.c
69
uint32_t val;
usr.sbin/bhyve/tpm_intf_crb.c
76
uint32_t val;
usr.sbin/bhyve/tpm_intf_crb.c
97
uint64_t val;
usr.sbin/bhyve/tpm_ppi_qemu.c
57
const uint64_t addr, const int size, uint64_t *const val, void *const arg1,
usr.sbin/bhyve/tpm_ppi_qemu.c
80
memcpy(val, ptr, size);
usr.sbin/bhyve/tpm_ppi_qemu.c
82
memcpy(ptr, val, size);
usr.sbin/bhyve/usb_mouse.c
151
#define MSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
usr.sbin/bhyve/usb_mouse.c
63
#define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
usr.sbin/bhyvectl/bhyvectl.c
165
o->val >= OPT_START_MD ? bhyvectl_opt_desc(o->val) :
usr.sbin/bhyvectl/bhyvectl.c
166
set_desc[o->val]);
usr.sbin/bhyvectl/bhyvectl.c
435
int captype, val, getcaptype;
usr.sbin/bhyvectl/bhyvectl.c
445
error = vm_get_capability(vcpu, captype, &val);
usr.sbin/bhyvectl/bhyvectl.c
449
val ? "set" : "not set", vcpuid);
usr.sbin/bhyveload/bhyveload.c
605
cb_vm_set_register(void *arg __unused, int vcpuid, int reg, uint64_t val)
usr.sbin/bhyveload/bhyveload.c
609
return (vm_set_register(vcpu, reg, val));
usr.sbin/bluetooth/bthidd/hid.c
173
int32_t report_id, usage, page, val,
usr.sbin/bluetooth/bthidd/hid.c
211
val = hid_get_data(data, &h);
usr.sbin/bluetooth/bthidd/hid.c
222
const uint32_t usage_offset = val - h.logical_minimum;
usr.sbin/bluetooth/bthidd/hid.c
230
mouse_x = val;
usr.sbin/bluetooth/bthidd/hid.c
235
mouse_y = val;
usr.sbin/bluetooth/bthidd/hid.c
240
mouse_z = -val;
usr.sbin/bluetooth/bthidd/hid.c
245
if (val)
usr.sbin/bluetooth/bthidd/hid.c
255
if (val && usage < kbd_maxkey())
usr.sbin/bluetooth/bthidd/hid.c
258
if (val && val < kbd_maxkey())
usr.sbin/bluetooth/bthidd/hid.c
259
bit_set(s->keys1, val);
usr.sbin/bluetooth/bthidd/hid.c
263
val = hid_get_data(data, &h);
usr.sbin/bluetooth/bthidd/hid.c
264
if (val && val < kbd_maxkey())
usr.sbin/bluetooth/bthidd/hid.c
265
bit_set(s->keys1, val);
usr.sbin/bluetooth/bthidd/hid.c
277
mouse_butt |= (val << (usage - 1));
usr.sbin/bluetooth/bthidd/hid.c
285
uinput_rep_cons(s->ukbd, usage, !!val);
usr.sbin/bluetooth/bthidd/hid.c
290
if (uinput_rep_cons(s->ukbd, val, 1)
usr.sbin/bluetooth/bthidd/hid.c
292
s->consk = val;
usr.sbin/bluetooth/bthidd/hid.c
296
if (!val)
usr.sbin/bluetooth/bthidd/hid.c
302
mouse_t = val;
usr.sbin/bluetooth/bthidd/hid.c
304
val = 0;
usr.sbin/bluetooth/bthidd/hid.c
308
val = 0x19;
usr.sbin/bluetooth/bthidd/hid.c
312
val = 0x10;
usr.sbin/bluetooth/bthidd/hid.c
316
val = 0x24;
usr.sbin/bluetooth/bthidd/hid.c
320
val = 0x22;
usr.sbin/bluetooth/bthidd/hid.c
324
val = 0x20;
usr.sbin/bluetooth/bthidd/hid.c
328
val = 0x30;
usr.sbin/bluetooth/bthidd/hid.c
332
val = 0x2E;
usr.sbin/bluetooth/bthidd/hid.c
336
val = 0x6D;
usr.sbin/bluetooth/bthidd/hid.c
340
val = 0x6C;
usr.sbin/bluetooth/bthidd/hid.c
344
val = 0x21;
usr.sbin/bluetooth/bthidd/hid.c
348
val = 0x6B;
usr.sbin/bluetooth/bthidd/hid.c
352
val = 0x65;
usr.sbin/bluetooth/bthidd/hid.c
356
val = 0x32;
usr.sbin/bluetooth/bthidd/hid.c
360
val = 0x6A;
usr.sbin/bluetooth/bthidd/hid.c
364
val = 0x69;
usr.sbin/bluetooth/bthidd/hid.c
368
val = 0x68;
usr.sbin/bluetooth/bthidd/hid.c
372
val = 0x67;
usr.sbin/bluetooth/bthidd/hid.c
376
val = 0x66;
usr.sbin/bluetooth/bthidd/hid.c
380
val = 0;
usr.sbin/bluetooth/bthidd/hid.c
385
if (val != 0) {
usr.sbin/bluetooth/bthidd/hid.c
387
int32_t buf[4] = { 0xe0, val,
usr.sbin/bluetooth/bthidd/hid.c
388
0xe0, val|0x80 };
usr.sbin/bluetooth/bthidd/hid.c
406
switch (val) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
398
op_dot1d_tp_fdb(struct snmp_context *c __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
413
if ((te = bridge_addrs_get(&val->var, sub, bif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
418
if ((te = bridge_addrs_getnext(&val->var, sub, bif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
420
bridge_addrs_index_append(&val->var, sub, te);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
433
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
435
return (string_get(val, te->tp_addr, ETHER_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
437
val->v.integer = te->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
440
val->v.integer = te->status;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
546
op_begemot_tp_fdb(struct snmp_context *c __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
556
if ((te = bridge_addrs_begemot_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
561
if ((te = bridge_addrs_begemot_getnext(&val->var,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
563
bridge_addrs_begemot_index_append(&val->var,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
578
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
580
return (string_get(val, te->tp_addr, ETHER_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
582
val->v.integer = te->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_addrs.c
585
val->v.integer = te->status;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1002
bif = bridge_if_index_get(&val->var, sub);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1004
switch (val->v.integer) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1050
if (bridge_name_index_get(&val->var, sub, bif_name) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1060
if (bridge_name_index_get(&val->var, sub, bif_name) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1082
struct snmp_value *val, uint sub)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1086
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1111
bridge_commit_if_status(struct snmp_value *val, uint sub)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1115
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1126
op_begemot_base_bridge(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1136
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1141
if ((bif = bridge_if_index_getnext(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1143
bridge_if_index_append(&val->var, sub, bif);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1147
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1149
return (bridge_set_if_status(ctx, val, sub));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1159
return (bridge_rollback_if_status(ctx, val, sub));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1162
return (bridge_commit_if_status(val, sub));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1167
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1169
return (string_get(val, bif->bif_name, -1));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1172
return (string_get(val, bif->br_addr.octet, ETHER_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1175
val->v.integer = bif->num_ports;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1179
val->v.integer = bif->br_type;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1183
val->v.integer = bif->if_status;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1191
op_begemot_stp(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1201
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1206
if ((bif = bridge_if_index_getnext(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1208
bridge_if_index_append(&val->var, sub, bif);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1212
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1215
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1217
if (val->v.integer > SNMP_BRIDGE_MAX_PRIORITY ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1218
val->v.integer % 4096 != 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1222
if (bridge_set_priority(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1227
if (val->v.integer < SNMP_BRIDGE_MIN_MAGE ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1228
val->v.integer > SNMP_BRIDGE_MAX_MAGE)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1232
if (bridge_set_maxage(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1237
if (val->v.integer < SNMP_BRIDGE_MIN_HTIME ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1238
val->v.integer > SNMP_BRIDGE_MAX_HTIME)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1242
if (bridge_set_hello_time(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1247
if (val->v.integer < SNMP_BRIDGE_MIN_FDELAY ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1248
val->v.integer > SNMP_BRIDGE_MAX_FDELAY)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1252
if (bridge_set_forward_delay(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1257
if (val->v.integer !=
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1259
val->v.integer != begemotBridgeStpVersion_rstp)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1263
if (bridge_set_stp_version(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1268
if (val->v.integer < SNMP_BRIDGE_MIN_TXHC ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1269
val->v.integer > SNMP_BRIDGE_MAX_TXHC)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1273
if (bridge_set_tx_hold_count(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1292
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1295
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1328
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1330
val->v.integer = bif->prot_spec;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1334
val->v.integer = bif->priority;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1338
if (bridge_get_time_since_tc(bif, &(val->v.uint32)) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1343
val->v.uint32 = bif->top_changes;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1347
return (string_get(val, bif->design_root, SNMP_BRIDGE_ID_LEN));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1350
val->v.integer = bif->root_cost;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1354
val->v.integer = bif->root_port;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1358
val->v.integer = bif->max_age;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1362
val->v.integer = bif->hello_time;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1366
val->v.integer = bif->hold_time;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1370
val->v.integer = bif->fwd_delay;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1374
val->v.integer = bif->bridge_max_age;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1378
val->v.integer = bif->bridge_hello_time;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1382
val->v.integer = bif->bridge_fwd_delay;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1386
val->v.integer = bif->stp_version;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1390
val->v.integer = bif->tx_hold_count;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1398
op_begemot_tp(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1408
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1413
if ((bif = bridge_if_index_getnext(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1415
bridge_if_index_append(&val->var, sub, bif);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1419
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1422
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1424
if (val->v.integer < SNMP_BRIDGE_MIN_AGE_TIME ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1425
val->v.integer > SNMP_BRIDGE_MAX_AGE_TIME)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1429
if (bridge_set_aging_time(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1435
if (bridge_set_max_cache(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1445
if ((bif = bridge_if_index_get(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1448
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1465
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1467
val->v.uint32 = bif->lrnt_drops;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1471
val->v.integer = bif->age_time;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
1475
val->v.integer = bif->max_addrs;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
672
op_dot1d_stp(struct snmp_context *ctx, struct snmp_value *val, uint sub,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
686
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
688
val->v.integer = bif->prot_spec;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
692
val->v.integer = bif->priority;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
697
&(val->v.uint32)) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
702
val->v.uint32 = bif->top_changes;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
706
return (string_get(val, bif->design_root,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
710
val->v.integer = bif->root_cost;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
714
val->v.integer = bif->root_port;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
718
val->v.integer = bif->max_age;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
722
val->v.integer = bif->hello_time;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
726
val->v.integer = bif->hold_time;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
730
val->v.integer = bif->fwd_delay;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
734
val->v.integer = bif->bridge_max_age;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
738
val->v.integer = bif->bridge_hello_time;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
742
val->v.integer = bif->bridge_fwd_delay;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
746
val->v.integer = bif->stp_version;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
750
val->v.integer = bif->tx_hold_count;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
759
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
761
if (val->v.integer > SNMP_BRIDGE_MAX_PRIORITY ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
762
val->v.integer % 4096 != 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
766
if (bridge_set_priority(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
771
if (val->v.integer < SNMP_BRIDGE_MIN_MAGE ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
772
val->v.integer > SNMP_BRIDGE_MAX_MAGE)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
776
if (bridge_set_maxage(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
781
if (val->v.integer < SNMP_BRIDGE_MIN_HTIME ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
782
val->v.integer > SNMP_BRIDGE_MAX_HTIME)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
786
if (bridge_set_hello_time(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
791
if (val->v.integer < SNMP_BRIDGE_MIN_FDELAY ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
792
val->v.integer > SNMP_BRIDGE_MAX_FDELAY)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
796
if (bridge_set_forward_delay(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
801
if (val->v.integer != dot1dStpVersion_stpCompatible &&
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
802
val->v.integer != dot1dStpVersion_rstp)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
806
if (bridge_set_stp_version(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
811
if (val->v.integer < SNMP_BRIDGE_MIN_TXHC ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
812
val->v.integer > SNMP_BRIDGE_MAX_TXHC)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
816
if (bridge_set_tx_hold_count(bif, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
835
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_if.c
997
struct snmp_value *val, uint sub)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
102
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
107
if (bridge_do_pfctl(val->var.subs[sub - 1] - 1,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
110
val->v.integer = val2snmp_truth(k_val);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
54
val2snmp_truth(uint8_t val)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
56
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
74
op_begemot_bridge_pf(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
79
if (val->var.subs[sub - 1] > LEAF_begemotBridgeLayer2PfStatus)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
86
bridge_do_pfctl(val->var.subs[sub - 1] - 1,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
95
bridge_get_pfval(val->var.subs[sub - 1]);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_pf.c
97
if ((k_val = snmp_truth2val(val->v.integer)) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1003
bridge_port_commit_status(struct snmp_value *val, uint sub)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1010
if (bridge_port_index_decode(&val->var, sub, b_name, &if_idx) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1035
struct snmp_value *val, uint sub)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1043
if (val->v.integer != begemotBridgeBaseSpanEnabled_enabled &&
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1044
val->v.integer != begemotBridgeBaseSpanEnabled_disabled)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1047
if (bridge_port_index_decode(&val->var, sub, b_name, &if_idx) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1067
bp->span_enable = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1074
op_begemot_base_port(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1084
which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1092
if ((bp = bridge_port_index_get(&val->var, sub,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1101
if ((bp = bridge_port_index_getnext(&val->var, sub,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1103
bridge_port_index_append(&val->var, sub, bp) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1110
return (bridge_port_set_span_enable(ctx, val, sub));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1113
return (bridge_port_set_status(ctx, val, sub));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1116
if ((bp = bridge_port_index_get(&val->var, sub,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1123
val->v.integer));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1138
return (bridge_port_rollback_status(ctx, val, sub));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1140
if ((bp = bridge_port_index_get(&val->var, sub,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1152
return (bridge_port_commit_status(val, sub));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1161
val->v.integer = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1165
val->v.integer = bp->if_idx;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1169
val->v.integer = bp->span_enable;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1173
val->v.uint32 = bp->dly_ex_drops;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1177
val->v.uint32 = bp->dly_mtu_drops;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1181
val->v.integer = bp->status;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1185
val->v.integer = bp->priv_set;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1193
op_begemot_stp_port(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1204
if ((bp = bridge_port_index_get(&val->var, sub, 0)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1209
if ((bp = bridge_port_index_getnext(&val->var, sub, 0)) ==
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1210
NULL || bridge_port_index_append(&val->var, sub, bp) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1215
if ((bp = bridge_port_index_get(&val->var, sub, 0)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1220
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1222
if (val->v.integer < 0 || val->v.integer > 255)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1227
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1232
if (val->v.integer !=
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1234
val->v.integer !=
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1240
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1245
if (val->v.integer < SNMP_PORT_MIN_PATHCOST ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1246
val->v.integer > SNMP_PORT_MAX_PATHCOST)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1251
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1267
if ((bp = bridge_port_index_get(&val->var, sub, 0)) == NULL ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1271
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1293
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1295
val->v.integer = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1299
val->v.integer = bp->priority;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1303
val->v.integer = bp->state;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1307
val->v.integer = bp->enable;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1311
val->v.integer = bp->path_cost;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1315
return (string_get(val, bp->design_root, SNMP_BRIDGE_ID_LEN));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1318
val->v.integer = bp->design_cost;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1322
return (string_get(val, bp->design_bridge, SNMP_BRIDGE_ID_LEN));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1325
return (string_get(val, bp->design_port, 2));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1328
val->v.uint32 = bp->fwd_trans;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1336
op_begemot_stp_ext_port(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1347
if ((bp = bridge_port_index_get(&val->var, sub, 0)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1352
if ((bp = bridge_port_index_getnext(&val->var, sub, 0)) ==
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1353
NULL || bridge_port_index_append(&val->var, sub, bp) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1358
if ((bp = bridge_port_index_get(&val->var, sub, 0)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1363
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1365
if (val->v.integer != TruthValue_true &&
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1366
val->v.integer != TruthValue_false)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1371
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1376
if (val->v.integer < 0 || val->v.integer >
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1382
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1387
if (val->v.integer < SNMP_PORT_MIN_PATHCOST ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1388
val->v.integer > SNMP_PORT_MAX_PATHCOST)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1393
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1405
if ((bp = bridge_port_index_get(&val->var, sub, 0)) == NULL ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1409
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1431
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1433
val->v.integer = bp->proto_migr;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1437
val->v.integer = bp->admin_edge;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1441
val->v.integer = bp->oper_edge;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1445
val->v.integer = bp->admin_ptp;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1449
val->v.integer = bp->oper_ptp;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1453
val->v.integer = bp->admin_path_cost;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1461
op_begemot_tp_port(struct snmp_context *c __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1471
if ((bp = bridge_port_index_get(&val->var, sub, 0)) == NULL)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1476
if ((bp = bridge_port_index_getnext(&val->var, sub, 0)) ==
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1477
NULL || bridge_port_index_append(&val->var, sub, bp) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1491
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1493
val->v.integer = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1497
val->v.integer = bp->max_info;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1501
val->v.uint32 = bp->in_frames;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1505
val->v.uint32 = bp->out_frames;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
1509
val->v.uint32 = bp->in_drops;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
344
op_dot1d_base_port(struct snmp_context *c __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
359
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
361
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
367
if (val->var.len - sub == 0) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
371
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
376
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
377
val->var.subs[sub] = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
390
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
392
val->v.integer = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
396
val->v.integer = bp->if_idx;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
400
val->v.oid = bp->circuit;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
404
val->v.uint32 = bp->dly_ex_drops;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
408
val->v.uint32 = bp->dly_mtu_drops;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
416
op_dot1d_stp_port(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
431
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
433
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
439
if (val->var.len - sub == 0) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
443
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
448
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
449
val->var.subs[sub] = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
453
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
455
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
459
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
461
if (val->v.integer < 0 || val->v.integer > 255)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
466
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
471
if (val->v.integer != dot1dStpPortEnable_enabled &&
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
472
val->v.integer != dot1dStpPortEnable_disabled)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
477
bp, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
482
if (val->v.integer < SNMP_PORT_MIN_PATHCOST ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
483
val->v.integer > SNMP_PORT_MAX_PATHCOST)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
488
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
504
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
507
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
529
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
531
val->v.integer = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
535
val->v.integer = bp->priority;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
539
val->v.integer = bp->state;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
543
val->v.integer = bp->enable;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
547
val->v.integer = bp->path_cost;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
551
return (string_get(val, bp->design_root,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
555
val->v.integer = bp->design_cost;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
559
return (string_get(val, bp->design_bridge,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
563
return (string_get(val, bp->design_port, 2));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
566
val->v.uint32 = bp->fwd_trans;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
574
op_dot1d_stp_ext_port(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
589
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
591
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
597
if (val->var.len - sub == 0) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
601
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
606
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
607
val->var.subs[sub] = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
611
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
613
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
617
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
619
if (val->v.integer != TruthValue_true &&
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
620
val->v.integer != TruthValue_false)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
625
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
630
if (val->v.integer < 0 || val->v.integer >
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
636
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
641
if (val->v.integer < SNMP_PORT_MIN_PATHCOST ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
642
val->v.integer > SNMP_PORT_MAX_PATHCOST)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
647
val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
659
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
663
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
685
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
687
val->v.integer = bp->proto_migr;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
691
val->v.integer = bp->admin_edge;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
695
val->v.integer = bp->oper_edge;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
699
val->v.integer = bp->admin_ptp;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
703
val->v.integer = bp->oper_ptp;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
707
val->v.integer = bp->admin_path_cost;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
715
op_dot1d_tp_port(struct snmp_context *c __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
730
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
732
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
738
if (val->var.len - sub == 0) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
742
if ((bp = bridge_port_find(val->var.subs[sub],
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
747
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
748
val->var.subs[sub] = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
761
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
763
val->v.integer = bp->port_no;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
767
val->v.integer = bp->max_info;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
771
val->v.uint32 = bp->in_frames;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
775
val->v.uint32 = bp->out_frames;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
779
val->v.uint32 = bp->in_drops;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
913
struct snmp_value *val, uint sub)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
921
if (bridge_port_index_decode(&val->var, sub, b_name, &if_idx) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
930
switch (val->v.integer) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
980
struct snmp_value *val, uint sub)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_port.c
987
if (bridge_port_index_decode(&val->var, sub, b_name, &if_idx) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
165
op_begemot_bridge_config(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
170
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
172
return (string_get(val, bridge_get_default_name(), -1));
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
175
val->v.integer = bridge_data_maxage;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
179
val->v.integer = bridge_poll_ticks / 100;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
188
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
199
if (bridge_set_default_name(val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
200
val->v.octetstring.len) < 0)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
205
if (val->v.integer < SNMP_BRIDGE_DATA_MAXAGE_MIN ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
206
val->v.integer > SNMP_BRIDGE_DATA_MAXAGE_MAX)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
209
bridge_data_maxage = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
213
if (val->v.integer < SNMP_BRIDGE_POLL_INTERVAL_MIN ||
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
214
val->v.integer > SNMP_BRIDGE_POLL_INTERVAL_MAX)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
216
ctx->scratch->int1 = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
222
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.c
235
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_snmp.h
355
int32_t bridge_do_pfctl(int32_t bridge_ctl, enum snmp_op op, int32_t *val);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_sys.c
1439
int32_t val;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_sys.c
1455
return (bridge_pf_sysctl[which - 1].val);
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_sys.c
1459
bridge_do_pfctl(int32_t bridge_ctl, enum snmp_op op, int32_t *val)
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_sys.c
1469
s_i = *val;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_sys.c
1489
bridge_pf_sysctl[bridge_ctl].val = i;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_sys.c
1490
*val = i;
usr.sbin/bsnmpd/modules/snmp_bridge/bridge_sys.c
1504
bridge_pf_sysctl[i].name, bridge_pf_sysctl[i].val);
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1002
pf_labels(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1005
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1017
val->v.uint32 = pfl_table_count;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1032
pf_lbltable(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1035
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1046
&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1048
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1049
val->var.subs[sub] = e->index;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1052
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1054
if ((e = pfl_table_find(val->var.subs[sub])) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1066
return (string_get(val, e->name, -1));
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1068
val->v.counter64 = e->evals;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1071
val->v.counter64 = e->bytes[IN];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1074
val->v.counter64 = e->bytes[OUT];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1077
val->v.counter64 = e->pkts[IN];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
1080
val->v.counter64 = e->pkts[OUT];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
153
pf_status(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
156
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
169
val->v.uint32 = pfs->running;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
174
val->v.uint32 = (uint32_t)(runtime * 100);
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
177
val->v.uint32 = pfs->debug;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
181
return (string_get(val, str, strlen(str)));
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
194
pf_counter(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
197
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
208
val->v.counter64 = pfctl_status_counter(pfs, PFRES_MATCH);
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
211
val->v.counter64 = pfctl_status_counter(pfs, PFRES_BADOFF);
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
214
val->v.counter64 = pfctl_status_counter(pfs, PFRES_FRAG);
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
217
val->v.counter64 = pfctl_status_counter(pfs, PFRES_SHORT);
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
220
val->v.counter64 = pfctl_status_counter(pfs, PFRES_NORM);
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
223
val->v.counter64 = pfctl_status_counter(pfs, PFRES_MEMORY);
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
237
pf_statetable(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
240
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
251
val->v.uint32 = pfs->states;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
254
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
258
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
262
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
277
pf_srcnodes(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
280
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
291
val->v.uint32 = pfs->src_nodes;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
294
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
298
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
302
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
317
pf_limits(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
320
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
348
val->v.uint32 = limit;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
357
pf_timeouts(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
360
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
438
val->v.integer = pt.seconds;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
447
pf_logif(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
450
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
463
return (string_get(val, str, strlen(str)));
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
465
val->v.counter64 = pfs->bcounters[IPV4][IN];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
468
val->v.counter64 = pfs->bcounters[IPV4][OUT];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
471
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
475
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
479
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
483
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
487
val->v.counter64 = pfs->bcounters[IPV6][IN];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
490
val->v.counter64 = pfs->bcounters[IPV6][OUT];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
493
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
497
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
501
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
505
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
520
pf_interfaces(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
523
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
535
val->v.uint32 = pfi_table_count;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
549
pf_iftable(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
552
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
563
&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
565
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
566
val->var.subs[sub] = e->index;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
569
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
571
if ((e = pfi_table_find(val->var.subs[sub])) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
583
return (string_get(val, e->pfi.pfik_name, -1));
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
585
val->v.integer = PFI_IFTYPE_INSTANCE;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
588
val->v.uint32 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
592
val->v.uint32 = e->pfi.pfik_rulerefs;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
595
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
599
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
603
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
607
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
611
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
615
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
619
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
623
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
627
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
631
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
635
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
639
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
643
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
647
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
651
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
655
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
667
pf_tables(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
670
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
682
val->v.uint32 = pft_table_count;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
696
pf_tbltable(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
699
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
710
&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
712
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
713
val->var.subs[sub] = e->index;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
716
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
718
if ((e = pft_table_find(val->var.subs[sub])) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
730
return (string_get(val, e->pft.pfrts_name, -1));
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
732
val->v.integer = e->pft.pfrts_cnt;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
735
val->v.uint32 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
739
val->v.integer =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
743
val->v.integer =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
747
val->v.counter64 = e->pft.pfrts_match;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
750
val->v.counter64 = e->pft.pfrts_nomatch;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
753
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
757
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
761
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
765
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
769
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
773
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
777
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
781
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
785
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
789
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
793
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
797
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
809
pf_tbladdr(struct snmp_context __unused *ctx, struct snmp_value __unused *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
812
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
823
&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
825
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
826
val->var.subs[sub] = e->index;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
829
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
831
if ((e = pfa_table_find(val->var.subs[sub])) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
844
val->v.integer = pfTablesAddrNetType_ipv4;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
846
val->v.integer = pfTablesAddrNetType_ipv6;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
852
return (string_get(val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
855
return (string_get(val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
861
val->v.integer = (int32_t) e->pfas.pfras_a.pfra_net;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
864
val->v.uint32 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
868
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
872
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
876
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
880
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
884
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
888
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
892
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
896
val->v.counter64 =
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
907
pf_altq_num(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
910
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
925
val->v.uint32 = pfq_table_count;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
940
pf_altqq(struct snmp_context __unused *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
943
asn_subid_t which = val->var.subs[sub - 1];
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
957
&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
959
val->var.len = sub + 1;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
960
val->var.subs[sub] = e->index;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
963
if (val->var.len - sub != 1)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
965
if ((e = pfq_table_find(val->var.subs[sub])) == NULL)
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
977
return (string_get(val, e->altq.qname, -1));
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
979
return (string_get(val, e->altq.parent, -1));
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
981
val->v.integer = e->altq.scheduler;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
984
val->v.uint32 = (e->altq.bandwidth > UINT_MAX) ?
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
988
val->v.integer = e->altq.priority;
usr.sbin/bsnmpd/modules/snmp_pf/pf_snmp.c
991
val->v.integer = e->altq.qlimit;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1002
return (bits_get(val, (uint8_t *)&bits, sizeof(bits)));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1004
val->v.integer = channel->ic_freq;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1007
val->v.integer = channel->ic_maxregpower;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1010
val->v.integer = channel->ic_maxpower;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1013
val->v.integer = channel->ic_minpower;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1017
return (bits_get(val, (uint8_t *)&bits, sizeof(bits)));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1019
val->v.integer = channel->ic_extieee;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1022
val->v.integer = channel->ic_maxantgain;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1030
op_wlan_roam_params(struct snmp_context *ctx __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1042
rparam = wlan_get_roam_param(&val->var, sub, &wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1047
rparam = wlan_get_next_roam_param(&val->var, sub, &wif, &phy);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1050
wlan_append_phy_index(&val->var, sub, wif->wname, phy);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1062
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1064
val->v.integer = rparam->rssi/2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1067
val->v.integer = rparam->rate/2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1077
op_wlan_tx_params(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1089
txparam = wlan_get_tx_param(&val->var, sub, &wif, &phy);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1095
txparam = wlan_get_next_tx_param(&val->var, sub, &wif, &phy);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1098
wlan_append_phy_index(&val->var, sub, wif->wname, phy);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1102
txparam = wlan_get_tx_param(&val->var, sub, &wif, &phy);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1105
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1108
txparam->ucastrate = val->v.integer * 2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1112
txparam->mcastrate = val->v.integer * 2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1116
txparam->mgmtrate = val->v.integer * 2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1120
txparam->maxretry = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1133
txparam = wlan_get_tx_param(&val->var, sub, &wif, &phy);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1136
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1160
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1162
val->v.integer = txparam->ucastrate / 2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1165
val->v.integer = txparam->mcastrate / 2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1168
val->v.integer = txparam->mgmtrate / 2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1171
val->v.integer = txparam->maxretry;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1181
op_wlan_scan_config(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1190
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1195
if ((wif = wlan_get_next_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1197
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1201
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1204
&& val->var.subs[sub - 1] != LEAF_wlanScanConfigStatus)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1206
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1209
wif->scan_flags = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1213
wif->scan_duration = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1217
wif->scan_mindwell = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1221
wif->scan_maxdwell = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1224
if (val->v.integer == wlanScanConfigStatus_running ||
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1225
val->v.integer == wlanScanConfigStatus_cancel) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1227
wif->scan_status = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1235
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1237
if (val->var.subs[sub - 1] == LEAF_wlanScanConfigStatus)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1243
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1245
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1267
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1269
val->v.integer = wif->scan_flags;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1272
val->v.integer = wif->scan_duration;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1275
val->v.integer = wif->scan_mindwell;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1278
val->v.integer = wif->scan_maxdwell;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1281
val->v.integer = wif->scan_status;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1289
op_wlan_scan_results(struct snmp_context *ctx __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1300
if ((sr = wlan_get_scanr(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1305
if ((sr = wlan_get_next_scanr(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1307
wlan_append_scanr_index(&val->var, sub, wif->wname, sr->ssid,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1321
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1323
return (string_get(val, sr->ssid, -1));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1325
return (string_get(val, sr->bssid, IEEE80211_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1327
val->v.integer = sr->opchannel; /* XXX */
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1330
val->v.integer = sr->rssi;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1333
val->v.integer = sr->noise;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1336
val->v.integer = sr->bintval;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1339
return (bits_get(val, &sr->capinfo, sizeof(sr->capinfo)));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1348
op_wlan_iface_stats(struct snmp_context *ctx __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1357
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1361
if ((wif = wlan_get_next_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1363
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1379
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1381
val->v.uint32 = wif->stats.is_rx_badversion;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1384
val->v.uint32 = wif->stats.is_rx_tooshort;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1387
val->v.uint32 = wif->stats.is_rx_wrongbss;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1390
val->v.uint32 = wif->stats.is_rx_dup;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1393
val->v.uint32 = wif->stats.is_rx_wrongdir;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1396
val->v.uint32 = wif->stats.is_rx_mcastecho;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1399
val->v.uint32 = wif->stats.is_rx_notassoc;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1402
val->v.uint32 = wif->stats.is_rx_noprivacy;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1405
val->v.uint32 = wif->stats.is_rx_unencrypted;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1408
val->v.uint32 = wif->stats.is_rx_wepfail;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1411
val->v.uint32 = wif->stats.is_rx_decap;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1414
val->v.uint32 = wif->stats.is_rx_mgtdiscard;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1417
val->v.uint32 = wif->stats.is_rx_ctl;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1420
val->v.uint32 = wif->stats.is_rx_beacon;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1423
val->v.uint32 = wif->stats.is_rx_rstoobig;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1426
val->v.uint32 = wif->stats.is_rx_elem_missing;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1429
val->v.uint32 = wif->stats.is_rx_elem_toobig;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1432
val->v.uint32 = wif->stats.is_rx_elem_toosmall;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1435
val->v.uint32 = wif->stats.is_rx_elem_unknown;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1438
val->v.uint32 = wif->stats.is_rx_chanmismatch;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1441
val->v.uint32 = wif->stats.is_rx_nodealloc;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1444
val->v.uint32 = wif->stats.is_rx_ssidmismatch;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1447
val->v.uint32 = wif->stats.is_rx_auth_unsupported;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1450
val->v.uint32 = wif->stats.is_rx_auth_fail;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1453
val->v.uint32 = wif->stats.is_rx_auth_countermeasures;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1456
val->v.uint32 = wif->stats.is_rx_assoc_bss;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1459
val->v.uint32 = wif->stats.is_rx_assoc_notauth;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1462
val->v.uint32 = wif->stats.is_rx_assoc_capmismatch;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1465
val->v.uint32 = wif->stats.is_rx_assoc_norate;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1468
val->v.uint32 = wif->stats.is_rx_assoc_badwpaie;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1471
val->v.uint32 = wif->stats.is_rx_deauth;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1474
val->v.uint32 = wif->stats.is_rx_disassoc;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1477
val->v.uint32 = wif->stats.is_rx_badsubtype;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1480
val->v.uint32 = wif->stats.is_rx_nobuf;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1483
val->v.uint32 = wif->stats.is_rx_bad_auth;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1486
val->v.uint32 = wif->stats.is_rx_unauth;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1489
val->v.uint32 = wif->stats.is_rx_badkeyid;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1492
val->v.uint32 = wif->stats.is_rx_ccmpreplay;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1495
val->v.uint32 = wif->stats.is_rx_ccmpformat;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1498
val->v.uint32 = wif->stats.is_rx_ccmpmic;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1501
val->v.uint32 = wif->stats.is_rx_tkipreplay;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1504
val->v.uint32 = wif->stats.is_rx_tkipformat;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1507
val->v.uint32 = wif->stats.is_rx_tkipmic;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1510
val->v.uint32 = wif->stats.is_rx_tkipicv;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1513
val->v.uint32 = wif->stats.is_rx_acl;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1516
val->v.uint32 = wif->stats.is_tx_nobuf;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1519
val->v.uint32 = wif->stats.is_tx_nonode;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1522
val->v.uint32 = wif->stats.is_tx_unknownmgt;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1525
val->v.uint32 = wif->stats.is_tx_badcipher;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1528
val->v.uint32 = wif->stats.is_tx_nodefkey;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1531
val->v.uint32 = wif->stats.is_tx_fragframes;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1534
val->v.uint32 = wif->stats.is_tx_frags;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1537
val->v.uint32 = wif->stats.is_scan_active;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1540
val->v.uint32 = wif->stats.is_scan_passive;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1543
val->v.uint32 = wif->stats.is_node_timeout;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1546
val->v.uint32 = wif->stats.is_crypto_nomem;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1549
val->v.uint32 = wif->stats.is_crypto_tkip;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1552
val->v.uint32 = wif->stats.is_crypto_tkipenmic;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1555
val->v.uint32 = wif->stats.is_crypto_tkipdemic;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1558
val->v.uint32 = wif->stats.is_crypto_tkipcm;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1561
val->v.uint32 = wif->stats.is_crypto_ccmp;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1564
val->v.uint32 = wif->stats.is_crypto_wep;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1567
val->v.uint32 = wif->stats.is_crypto_setkey_cipher;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1570
val->v.uint32 = wif->stats.is_crypto_setkey_nokey;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1573
val->v.uint32 = wif->stats.is_crypto_delkey;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1576
val->v.uint32 = wif->stats.is_crypto_badcipher;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1579
val->v.uint32 = wif->stats.is_crypto_attachfail;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1582
val->v.uint32 = wif->stats.is_crypto_keyfail;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1585
val->v.uint32 = wif->stats.is_crypto_enmicfail;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1588
val->v.uint32 = wif->stats.is_ibss_capmismatch;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1591
val->v.uint32 = wif->stats.is_ps_unassoc;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1594
val->v.uint32 = wif->stats.is_ps_badaid;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1597
val->v.uint32 = wif->stats.is_ps_qempty;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1600
val->v.uint32 = wif->stats.is_ff_badhdr;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1603
val->v.uint32 = wif->stats.is_ff_tooshort;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1606
val->v.uint32 = wif->stats.is_ff_split;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1609
val->v.uint32 = wif->stats.is_ff_decap;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1612
val->v.uint32 = wif->stats.is_ff_encap;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1615
val->v.uint32 = wif->stats.is_rx_badbintval;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1618
val->v.uint32 = wif->stats.is_rx_demicfail;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1621
val->v.uint32 = wif->stats.is_rx_defrag;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1624
val->v.uint32 = wif->stats.is_rx_mgmt;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1627
val->v.uint32 = wif->stats.is_rx_action;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1630
val->v.uint32 = wif->stats.is_amsdu_tooshort;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1633
val->v.uint32 = wif->stats.is_amsdu_split;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1636
val->v.uint32 = wif->stats.is_amsdu_decap;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1639
val->v.uint32 = wif->stats.is_amsdu_encap;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1642
val->v.uint32 = wif->stats.is_ampdu_bar_bad;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1645
val->v.uint32 = wif->stats.is_ampdu_bar_oow;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1648
val->v.uint32 = wif->stats.is_ampdu_bar_move;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1651
val->v.uint32 = wif->stats.is_ampdu_bar_rx;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1654
val->v.uint32 = wif->stats.is_ampdu_rx_oor;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1657
val->v.uint32 = wif->stats.is_ampdu_rx_copy;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1660
val->v.uint32 = wif->stats.is_ampdu_rx_drop;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1663
val->v.uint32 = wif->stats.is_tx_badstate;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1666
val->v.uint32 = wif->stats.is_tx_notassoc;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1669
val->v.uint32 = wif->stats.is_tx_classify;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1672
val->v.uint32 = wif->stats.is_dwds_mcast;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1675
val->v.uint32 = wif->stats.is_ht_assoc_nohtcap;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1678
val->v.uint32 = wif->stats.is_ht_assoc_downgrade;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1681
val->v.uint32 = wif->stats.is_ht_assoc_norate;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1684
val->v.uint32 = wif->stats.is_ampdu_rx_age;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1687
val->v.uint32 = wif->stats.is_ampdu_rx_move;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1690
val->v.uint32 = wif->stats.is_addba_reject;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1693
val->v.uint32 = wif->stats.is_addba_norequest;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1696
val->v.uint32 = wif->stats.is_addba_badtoken;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1699
val->v.uint32 = wif->stats.is_addba_badpolicy;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1702
val->v.uint32 = wif->stats.is_ampdu_stop;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1705
val->v.uint32 = wif->stats.is_ampdu_stop_failed;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1708
val->v.uint32 = wif->stats.is_ampdu_rx_reorder;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1711
val->v.uint32 = wif->stats.is_scan_bg;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1714
val->v.uint32 = wif->stats.is_rx_deauth_code;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1717
val->v.uint32 = wif->stats.is_rx_disassoc_code;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1720
val->v.uint32 = wif->stats.is_rx_authfail_code;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1723
val->v.uint32 = wif->stats.is_beacon_miss;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1726
val->v.uint32 = wif->stats.is_rx_badstate;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1729
val->v.uint32 = wif->stats.is_ff_flush;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1732
val->v.uint32 = wif->stats.is_tx_ctl;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1735
val->v.uint32 = wif->stats.is_ampdu_rexmt;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1738
val->v.uint32 = wif->stats.is_ampdu_rexmt_fail;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1741
val->v.uint32 = wlanStatsReset_no_op;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1751
op_wlan_wep_iface(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1760
if ((wif = wlan_get_interface(&val->var, sub)) == NULL ||
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1767
if ((wif = wlan_get_next_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1769
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1773
if ((wif = wlan_get_interface(&val->var, sub)) == NULL ||
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1776
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1778
if (val->v.integer < wlanWepMode_off ||
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1779
val->v.integer > wlanWepMode_mixed)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1782
wif->wepmode = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1789
if (val->v.integer < 0 ||
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1790
val->v.integer > IEEE80211_WEP_NKID)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1793
wif->weptxkey = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1808
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1810
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1830
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1834
val->v.integer = wif->wepmode;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1839
val->v.integer = wif->weptxkey;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1850
struct snmp_value *val __unused, uint32_t sub __unused,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1857
op_wlan_mac_access_control(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1866
if ((wif = wlan_get_interface(&val->var, sub)) == NULL ||
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1873
if ((wif = wlan_get_next_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1875
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1879
if ((wif = wlan_get_interface(&val->var, sub)) == NULL ||
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1882
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1885
wif->mac_policy = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1897
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1899
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1916
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1918
if (val->var.subs[sub - 1] == LEAF_wlanMACAccessControlPolicy)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1929
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1931
val->v.integer = wif->mac_policy;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1934
val->v.integer = wif->mac_nacls;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1937
val->v.integer = wlanMACAccessControlFlush_no_op;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1947
op_wlan_mac_acl_mac(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1958
if ((macl = wlan_get_acl_mac(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1963
if ((macl = wlan_get_next_acl_mac(&val->var, sub, &wif))
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1966
wlan_append_mac_index(&val->var, sub, wif->wname, macl->mac);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1970
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1974
return(wlan_acl_mac_set_status(ctx, val, sub));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1980
if ((macl = wlan_get_acl_mac(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1982
if (val->v.integer == RowStatus_destroy &&
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1988
if ((macl = wlan_get_acl_mac(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
1999
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2001
return (string_get(val, macl->mac, IEEE80211_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2003
val->v.integer = macl->mac_status;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2013
op_wlan_mesh_config(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2018
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2045
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2048
wlan_config.mesh_retryto = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2052
wlan_config.mesh_holdingto = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2056
wlan_config.mesh_confirmto = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2060
wlan_config.mesh_maxretries = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2071
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2093
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2095
val->v.integer = wlan_config.mesh_retryto;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2098
val->v.integer = wlan_config.mesh_holdingto;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2101
val->v.integer = wlan_config.mesh_confirmto;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2104
val->v.integer = wlan_config.mesh_maxretries;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2112
op_wlan_mesh_iface(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2122
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2127
if ((wif = wlan_mesh_get_next_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2129
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2133
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2135
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2137
if (val->v.octetstring.len > IEEE80211_NWID_LEN)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2139
ctx->scratch->ptr1 = malloc(val->v.octetstring.len + 1);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2143
val->v.octetstring.len + 1);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2145
memcpy(wif->desired_ssid, val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2146
val->v.octetstring.len);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2147
wif->desired_ssid[val->v.octetstring.len] = '\0';
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2151
wif->mesh_ttl = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2155
wif->mesh_peering = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2159
wif->mesh_forwarding = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2163
wif->mesh_metric = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2167
wif->mesh_path = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
217
op_wlan_iface(struct snmp_context *ctx, struct snmp_value *val, uint32_t sub,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2170
if (val->v.integer != wlanMeshRoutesFlush_flush)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2176
if (val->var.subs[sub - 1] == LEAF_wlanMeshId)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2178
val->v.octetstring.octets, val->v.octetstring.len);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2180
rc = wlan_mesh_config_set(wif, val->var.subs[sub - 1]);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2186
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2188
if (val->var.subs[sub - 1] == LEAF_wlanMeshRoutesFlush &&
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2191
if (val->var.subs[sub - 1] == LEAF_wlanMeshId)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2196
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2198
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2224
if (val->var.subs[sub - 1] == LEAF_wlanMeshId)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2228
rc = wlan_mesh_config_set(wif, val->var.subs[sub - 1]);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2237
if (val->var.subs[sub - 1] == LEAF_wlanMeshId)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2240
rc = wlan_mesh_config_get(wif, val->var.subs[sub - 1]);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2244
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2246
return (string_get(val, wif->desired_ssid, -1));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2248
val->v.integer = wif->mesh_ttl;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2251
val->v.integer = wif->mesh_peering;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2254
val->v.integer = wif->mesh_forwarding;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2257
val->v.integer = wif->mesh_metric;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2260
val->v.integer = wif->mesh_path;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2263
val->v.integer = wlanMeshRoutesFlush_no_op;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2273
op_wlan_mesh_neighbor(struct snmp_context *ctx __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
228
if ((wif = wlan_get_snmp_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2284
if ((wip = wlan_mesh_get_peer(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2288
wip = wlan_mesh_get_next_peer(&val->var, sub, &wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2291
wlan_append_mac_index(&val->var, sub, wif->wname,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2304
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2306
return (string_get(val, wip->pmac, IEEE80211_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2308
val->v.integer = wip->frequency;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2311
val->v.integer = wip->local_id;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2314
val->v.integer = wip->peer_id;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2317
return (bits_get(val, (uint8_t *)&wip->state,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2320
val->v.integer = wip->txrate;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2323
val->v.integer = wip->rssi;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2326
val->v.integer = wip->idle;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2329
val->v.integer = wip->txseqs;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
233
if ((wif = wlan_get_next_snmp_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2332
val->v.integer = wip->rxseqs;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2342
op_wlan_mesh_route(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
235
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2353
if ((wmr = wlan_mesh_get_route(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2358
wmr = wlan_mesh_get_next_route(&val->var, sub, &wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2361
wlan_append_mac_index(&val->var, sub, wif->wname,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2366
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2370
return(wlan_mesh_route_set_status(ctx, val, sub));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2377
if ((wmr = wlan_mesh_get_route(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2379
if (val->v.integer == RowStatus_destroy &&
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2385
if ((wmr = wlan_mesh_get_route(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
239
if ((wif = wlan_get_snmp_interface(&val->var, sub)) == NULL) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2396
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2398
return (string_get(val, wmr->imroute.imr_dest,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
240
if (val->var.subs[sub - 1] != LEAF_wlanIfaceName)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2401
return (string_get(val, wmr->imroute.imr_nexthop,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2404
val->v.integer = wmr->imroute.imr_nhops;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2407
val->v.integer = wmr->imroute.imr_metric;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2410
val->v.integer = wmr->imroute.imr_lifetime;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2413
val->v.integer = wmr->imroute.imr_lastmseq;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2416
val->v.integer = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2419
val->v.integer |= (0x1 << wlanMeshRouteFlags_valid);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
242
if (wlan_get_ifname(&val->var, sub, wname) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2422
val->v.integer |= (0x1 << wlanMeshRouteFlags_proxy);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2423
return (bits_get(val, (uint8_t *)&val->v.integer,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2424
sizeof(val->v.integer)));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2426
val->v.integer = wmr->mroute_status;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2434
op_wlan_mesh_stats(struct snmp_context *ctx __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2443
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2447
if ((wif = wlan_mesh_get_next_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2449
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2464
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2466
val->v.uint32 = wif->stats.is_mesh_wrongmesh;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2469
val->v.uint32 = wif->stats.is_mesh_nolink;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2472
val->v.uint32 = wif->stats.is_mesh_fwd_ttl;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2475
val->v.uint32 = wif->stats.is_mesh_fwd_nobuf;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2478
val->v.uint32 = wif->stats.is_mesh_fwd_tooshort;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2481
val->v.uint32 = wif->stats.is_mesh_fwd_disabled;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2484
val->v.uint32 = wif->stats.is_mesh_fwd_nopath;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2487
val->v.uint32 = wif->stats.is_mesh_badae;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
249
val->var.subs[sub - 1] != LEAF_wlanIfaceStatus &&
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2490
val->v.uint32 = wif->stats.is_mesh_rtaddfailed;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2493
val->v.uint32 = wif->stats.is_mesh_notproxy;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2496
val->v.uint32 = wif->stats.is_rx_badalign;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
250
val->var.subs[sub - 1] != LEAF_wlanIfaceState)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2506
op_wlan_hwmp_config(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2511
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
253
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2547
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2550
wlan_config.hwmp_inact = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2554
wlan_config.hwmp_rannint = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2558
wlan_config.hwmp_rootint = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2562
wlan_config.hwmp_roottimeout = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2566
wlan_config.hwmp_pathlifetime = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2570
wlan_config.hwmp_replyforward = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2574
wlan_config.hwmp_targetonly = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
258
if (val->v.octetstring.len >= IFNAMSIZ)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2585
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2616
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2618
val->v.integer = wlan_config.hwmp_inact;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2621
val->v.integer = wlan_config.hwmp_rannint;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2624
val->v.integer = wlan_config.hwmp_rootint;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2627
val->v.integer = wlan_config.hwmp_roottimeout;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
263
memcpy(wif->wname, val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2630
val->v.integer = wlan_config.hwmp_pathlifetime;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2633
val->v.integer = wlan_config.hwmp_replyforward;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2636
val->v.integer = wlan_config.hwmp_targetonly;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
264
val->v.octetstring.len);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2644
op_wlan_hwmp_iface(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
265
wif->wname[val->v.octetstring.len] = '\0';
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2653
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2658
if ((wif = wlan_mesh_get_next_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2660
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2664
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2666
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2669
wif->hwmp_root_mode = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2673
wif->hwmp_max_hops = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2678
if (wlan_hwmp_config_set(wif, val->var.subs[sub - 1]) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2686
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2688
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
269
if (val->v.octetstring.len >= IFNAMSIZ)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2698
if (wlan_hwmp_config_set(wif, val->var.subs[sub - 1]) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2706
if (wlan_hwmp_config_get(wif, val->var.subs[sub - 1]) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2709
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2711
val->v.integer = wif->hwmp_root_mode;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2714
val->v.integer = wif->hwmp_max_hops;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2724
op_wlan_hwmp_stats(struct snmp_context *ctx __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2733
if ((wif = wlan_mesh_get_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2737
if ((wif = wlan_mesh_get_next_iface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2739
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
274
memcpy(wif->pname, val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
275
val->v.octetstring.len);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2754
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2756
val->v.uint32 = wif->stats.is_hwmp_wrongseq;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2759
val->v.uint32 = wif->stats.is_hwmp_rootreqs;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
276
wif->pname[val->v.octetstring.len] = '\0';
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2762
val->v.uint32 = wif->stats.is_hwmp_rootrann;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
2765
val->v.uint32 = wif->stats.is_hwmp_proxy;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
281
wif->mode = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
285
if (val->v.octetstring.len > sizeof(wif->flags))
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
292
memcpy((uint8_t *)&wif->flags, val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
297
if (val->v.octetstring.len != IEEE80211_ADDR_LEN)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
304
memcpy(wif->dbssid, val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
309
if (val->v.octetstring.len != IEEE80211_ADDR_LEN)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
316
memcpy(wif->dlmac, val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
322
wif->status = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
337
wif->state = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
346
if ((wif = wlan_get_snmp_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
348
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
399
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
4037
wlan_acl_mac_set_status(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
4045
if (wlan_mac_index_decode(&val->var, sub, wname, mac) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
4047
macl = wlan_get_acl_mac(&val->var, sub, &wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
4049
switch (val->v.integer) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
414
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
416
val->v.integer = wif->index;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
419
return (string_get(val, wif->wname, -1));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
421
return (string_get(val, wif->pname, -1));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
423
val->v.integer = wif->mode;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
426
return (bits_get(val, (uint8_t *)&wif->flags,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
429
return (string_get(val, wif->dbssid, IEEE80211_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
431
return (string_get(val, wif->dlmac, IEEE80211_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
433
val->v.integer = wif->status;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
436
val->v.integer = wif->state;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
4376
wlan_mesh_route_set_status(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
4384
if (wlan_mac_index_decode(&val->var, sub, wname, mac) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
4386
wmr = wlan_mesh_get_route(&val->var, sub, &wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
4388
switch (val->v.integer) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
444
op_wlan_if_parent(struct snmp_context *ctx __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
453
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
457
if ((wif = wlan_get_next_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
459
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
471
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
473
return (bits_get(val, (uint8_t *)&wif->drivercaps,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
476
return (bits_get(val, (uint8_t *)&wif->cryptocaps,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
479
return (bits_get(val, (uint8_t *)&wif->htcaps,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
487
op_wlan_iface_config(struct snmp_context *ctx, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
498
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
503
if ((wif = wlan_get_next_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
505
wlan_append_ifindex(&val->var, sub, wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
509
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
512
intval = val->v.integer;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
517
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
519
if (val->v.octetstring.len != WLAN_COUNTRY_CODE_SIZE)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
523
if (val->v.octetstring.len > IEEE80211_NWID_LEN)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
527
if (val->v.octetstring.len != IEEE80211_ADDR_LEN)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
660
if (val->syntax != SNMP_SYNTAX_OCTETSTRING)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
663
ctx->scratch->int1 = val->v.octetstring.len;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
664
ctx->scratch->ptr1 = malloc(val->v.octetstring.len + 1);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
667
if (val->var.subs[sub - 1] == LEAF_wlanIfaceDesiredSsid)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
668
strlcpy(ctx->scratch->ptr1, val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
669
val->v.octetstring.len + 1);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
671
memcpy(ctx->scratch->ptr1, val->v.octetstring.octets,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
672
val->v.octetstring.len);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
673
strval = val->v.octetstring.octets;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
674
vlen = val->v.octetstring.len;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
682
if ((wif = wlan_get_interface(&val->var, sub)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
684
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
697
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
711
if (wlan_config_get_ioctl(wif, val->var.subs[sub - 1]) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
714
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
716
val->v.integer = wif->packet_burst;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
719
return (string_get(val, wif->country_code,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
722
val->v.integer = wif->reg_domain;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
725
return (string_get(val, wif->desired_ssid, -1));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
727
val->v.integer = wif->desired_channel;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
730
val->v.integer = wif->dyn_frequency;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
733
val->v.integer = wif->fast_frames;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
736
val->v.integer = wif->dturbo;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
739
val->v.integer = wif->tx_power;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
742
val->v.integer = wif->frag_threshold;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
745
val->v.integer = wif->rts_threshold;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
748
val->v.integer = wif->priv_subscribe;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
751
val->v.integer = wif->bg_scan;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
754
val->v.integer = wif->bg_scan_idle;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
757
val->v.integer = wif->bg_scan_interval;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
760
val->v.integer = wif->beacons_missed;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
763
return (string_get(val, wif->desired_bssid,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
766
val->v.integer = wif->roam_mode;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
769
val->v.integer = wif->dot11d;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
772
val->v.integer = wif->dot11h;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
775
val->v.integer = wif->dynamic_wds;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
778
val->v.integer = wif->power_save;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
781
val->v.integer = wif->ap_bridge;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
784
val->v.integer = wif->beacon_interval;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
787
val->v.integer = wif->dtim_period;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
790
val->v.integer = wif->hide_ssid;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
793
val->v.integer = wif->inact_process;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
796
val->v.integer = wif->do11g_protect;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
799
val->v.integer = wif->dot11g_pure;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
802
val->v.integer = wif->dot11n_pure;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
805
val->v.integer = wif->ampdu;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
808
val->v.integer = wif->ampdu_density;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
811
val->v.integer = wif->ampdu_limit;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
814
val->v.integer = wif->amsdu;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
817
val->v.integer = wif->amsdu_limit;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
820
val->v.integer = wif->ht_enabled;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
823
val->v.integer = wif->ht_compatible;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
826
val->v.integer = wif->ht_prot_mode;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
829
val->v.integer = wif->rifs;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
832
val->v.integer = wif->short_gi;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
835
val->v.integer = wif->smps_mode;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
838
val->v.integer = wif->tdma_slot;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
841
val->v.integer = wif->tdma_slot_count;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
844
val->v.integer = wif->tdma_slot_length;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
847
val->v.integer = wif->tdma_binterval;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
854
rc = wlan_config_set_ioctl(wif, val->var.subs[sub - 1], intval,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
858
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
876
op_wlan_if_peer(struct snmp_context *ctx, struct snmp_value *val, uint32_t sub,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
887
if ((wip = wlan_get_peer(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
891
if ((wip = wlan_get_next_peer(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
893
wlan_append_mac_index(&val->var, sub, wif->wname, wip->pmac);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
896
if ((wip = wlan_get_peer(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
898
if (val->var.subs[sub - 1] != LEAF_wlanIfacePeerVlanTag)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
901
if (wlan_peer_set_vlan(wif, wip, val->v.integer) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
907
if ((wip = wlan_get_peer(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
909
if (val->var.subs[sub - 1] != LEAF_wlanIfacePeerVlanTag)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
918
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
920
return (string_get(val, wip->pmac, IEEE80211_ADDR_LEN));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
922
val->v.integer = wip->associd;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
925
val->v.integer = wip->vlan;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
928
val->v.integer = wip->frequency;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
931
val->v.integer = wip->txrate;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
934
val->v.integer = wip->rssi;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
937
val->v.integer = wip->idle;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
940
val->v.integer = wip->txseqs;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
943
val->v.integer = wip->rxseqs;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
946
val->v.integer = wip->txpower;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
949
return (bits_get(val, (uint8_t *)&wip->capinfo,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
952
return (bits_get(val, (uint8_t *)&wip->state,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
962
op_wlan_channels(struct snmp_context *ctx __unused, struct snmp_value *val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
974
if ((channel = wlan_get_channel(&val->var, sub, &wif)) == NULL)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
978
channel = wlan_get_next_channel(&val->var, sub, &wif);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
981
wlan_append_channel_index(&val->var, sub, wif, channel);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
993
switch (val->var.subs[sub - 1]) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
995
val->v.integer = channel->ic_ieee;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.c
998
val->v.integer = wlan_get_channel_type(channel);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_snmp.h
236
int wlan_config_set_ioctl(struct wlan_iface *wif, int which, int val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1094
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1101
if (wlan_ioctl(wif->wname, IEEE80211_IOC_REGDOMAIN, &val, &regdomain,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1116
int val = 0, txpowermax;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1154
wlan_ioctl(wif->wname, IEEE80211_IOC_REGDOMAIN, &val, regdomain,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1174
int val = -1;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1182
IEEE80211_IOC_MESH_ID : IEEE80211_IOC_SSID, &val, ssid,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1197
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1202
IEEE80211_IOC_MESH_ID : IEEE80211_IOC_SSID, &val, ssid,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1218
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1226
if (wlan_ioctl(wif->wname, IEEE80211_IOC_CURCHAN, &val, &chan,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1243
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1254
if (wlan_ioctl(wif->wname, IEEE80211_IOC_CURCHAN, &val, &chan,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1266
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1272
if (wlan_ioctl(wif->wname, IEEE80211_IOC_BSSID, &val, bssid,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1284
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1287
if (wlan_ioctl(wif->wname, IEEE80211_IOC_BSSID, &val, bssid,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1301
wlan_config_set_snmp_intval(struct wlan_iface *wif, int op, int val)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1305
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1311
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1317
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1323
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1329
wif->tx_power = val / 2;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1332
wif->frag_threshold = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1335
wif->rts_threshold = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1338
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1344
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1350
wif->bg_scan_idle = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1353
wif->bg_scan_interval = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1356
wif->beacons_missed = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1359
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1374
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1380
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1386
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1392
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1398
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1404
wif->beacon_interval = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1407
wif->dtim_period = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1410
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1416
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1422
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1437
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1443
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1449
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1467
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1496
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1513
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1531
wif->amsdu_limit = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1534
if (val == 0) /* XXX */
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1540
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1546
if (val == IEEE80211_PROTMODE_RTSCTS)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1552
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1558
if (val == 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1564
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1579
wif->tdma_slot = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1582
wif->tdma_slot_count = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1585
wif->tdma_slot_length = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1588
wif->tdma_binterval = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
166
wlan_ioctl(char *wif_name, uint16_t req_type, int *val, void *arg,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
175
ireq.i_val = *val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
187
*val = ireq.i_val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
1997
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2002
if (wlan_ioctl(wif->wname, op, &val, NULL, &argsize, 0) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2004
wlan_config_set_snmp_intval(wif, op, val);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2013
int val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2017
if (wlan_config_snmp2value(op, sval, &val) != SNMP_ERR_NOERROR)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2019
if (wlan_ioctl(wif->wname, op, &val, NULL, &argsize, 1) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2021
wlan_config_set_snmp_intval(wif, op, val);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2051
wlan_config_set_ioctl(struct wlan_iface *wif, int which, int val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2062
val));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2066
return (wlan_config_set_dchannel(wif, val));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2071
return (wlan_config_set_intval(wif, op, val));
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2107
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2122
&val, &sr, &argsize, 1) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2187
int ssidlen, val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2195
if (wlan_ioctl(wif->wname, IEEE80211_IOC_SCAN_RESULTS, &val, &buf,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2248
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2251
if (wlan_ioctl(wif->wname, IEEE80211_IOC_WEP, &val, NULL,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2252
&argsize, 0) < 0 || val == IEEE80211_WEP_NOSUP) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2261
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2281
int val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2289
val = IEEE80211_WEP_OFF;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2292
val = IEEE80211_WEP_ON;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2295
val = IEEE80211_WEP_MIXED;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2301
if (wlan_ioctl(wif->wname, IEEE80211_IOC_WEP, &val, NULL,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2311
int val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2317
if (wlan_ioctl(wif->wname, IEEE80211_IOC_WEPTXKEY, &val, NULL,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2321
if (val == IEEE80211_KEYIX_NONE)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2324
wif->weptxkey = val + 1;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2332
int val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2342
val = IEEE80211_KEYIX_NONE;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2344
val = wif->weptxkey - 1;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2345
if (wlan_ioctl(wif->wname, IEEE80211_IOC_WEPTXKEY, &val, NULL,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2369
int val = IEEE80211_MACCMD_POLICY;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2395
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2413
val = IEEE80211_MACCMD_LIST;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2414
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MACCMD, &val, NULL,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2425
int val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2433
val = IEEE80211_MACCMD_POLICY_ALLOW;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2436
val = IEEE80211_MACCMD_POLICY_DENY;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2439
val = IEEE80211_MACCMD_POLICY_RADIUS;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2442
val = IEEE80211_MACCMD_POLICY_OPEN;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2448
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MACCMD, &val, NULL,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2458
int val = IEEE80211_MACCMD_FLUSH;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2461
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MACCMD, &val, NULL,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2489
int i, nacls, val = IEEE80211_MACCMD_LIST;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2524
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MACCMD, &val, data,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2540
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2544
if (wlan_ioctl(wif->wname, IEEE80211_IOC_ADDMAC, &val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2560
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MLME, &val, &mlme,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2570
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2574
if (wlan_ioctl(wif->wname, IEEE80211_IOC_DELMAC, &val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2590
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MLME, &val, &mlme,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2600
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2609
&val, &vreq, &argsize, 1) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2719
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2729
& val, &u, &len, 0) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2770
int val, sval;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2820
len = sizeof (val);
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2822
if (sysctlbyname(mib_name, &val, &len, (set? &sval : NULL), vlen) < 0) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2830
cfg->mesh_retryto = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2833
cfg->mesh_holdingto = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2836
cfg->mesh_confirmto = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2839
cfg->mesh_maxretries = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2842
cfg->hwmp_targetonly = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2845
cfg->hwmp_replyforward = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2848
cfg->hwmp_pathlifetime = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2851
cfg->hwmp_roottimeout = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2854
cfg->hwmp_rootint = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2857
cfg->hwmp_rannint = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2860
cfg->hwmp_inact = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2873
int op, val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2903
if (wlan_ioctl(wif->wname, op, &val, pd, &argsize, 0) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2908
wif->mesh_ttl = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2911
if (val)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2917
if (val)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2943
int op, val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2950
val = wif->mesh_ttl;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2955
val = 1;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2959
val = 1;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2984
if (wlan_ioctl(wif->wname, op, &val, pd, &argsize, 1) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2993
int val = IEEE80211_MESH_RTCMD_FLUSH;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
2996
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MESH_RTCMD, &val, NULL,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3006
int val = IEEE80211_MESH_RTCMD_ADD;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3009
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MESH_RTCMD, &val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3021
int val = IEEE80211_MESH_RTCMD_DELETE;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3024
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MESH_RTCMD, &val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3036
int i, nroutes, val = IEEE80211_MESH_RTCMD_LIST;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3043
if (wlan_ioctl(wif->wname, IEEE80211_IOC_MESH_RTCMD, &val, routes,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3064
int op, val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3078
if (wlan_ioctl(wif->wname, op, &val, NULL, &argsize, 0) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3083
switch (val) {
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3100
wif->hwmp_max_hops = val;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3110
int op, val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3118
val = IEEE80211_HWMP_ROOTMODE_DISABLED;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3121
val = IEEE80211_HWMP_ROOTMODE_NORMAL;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3124
val = IEEE80211_HWMP_ROOTMODE_PROACTIVE;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3127
val = IEEE80211_HWMP_ROOTMODE_RANN;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3135
val = wif->hwmp_max_hops;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
3141
if (wlan_ioctl(wif->wname, op, &val, NULL, &argsize, 1) < 0)
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
488
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
495
if (wlan_ioctl(wif->wname, IEEE80211_IOC_DEVCAPS, &val, &dc,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
587
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
600
if (wlan_ioctl(wif->wname, IEEE80211_IOC_CHANINFO, &val, chaninfo,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
605
if (wlan_ioctl(wif->wname, IEEE80211_IOC_CHANLIST, &val, &active,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
668
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
672
if (wlan_ioctl(wif->wname, IEEE80211_IOC_ROAM, &val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
682
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
690
if (wlan_ioctl(wif->wname, IEEE80211_IOC_TXPARAMS, &val,
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
700
int val = 0;
usr.sbin/bsnmpd/modules/snmp_wlan/wlan_sys.c
708
if (wlan_ioctl(wif->wname, IEEE80211_IOC_TXPARAMS, &val,
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
1044
if (pdu->version == SNMP_V1 && obj->val.syntax ==
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
1073
if (snmpset_add_value(&(pdu->bindings[pdu->nbindings]), &(obj->val))
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
1077
asn_append_oid(&(pdu->bindings[pdu->nbindings].var), &(obj->val.var));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
289
asn_append_oid(&(obj->val.var), &in_oid);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
293
} else if (obj->val.syntax > 0 && GET_PDUTYPE(snmptoolctx) ==
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
295
if (snmp_suboid_append(&(obj->val.var), (asn_subid_t) 0) < 0)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
310
if (snmp_parse_numoid(argv, &(obj->val.var)) < 0)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
314
snmp_parse_numoid(argv, &(obj->val.var)) < 0)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
327
asn_append_oid(&(pdu->bindings[pdu->nbindings].var), &(obj->val.var));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
340
if (pdu->version == SNMP_V1 && obj->val.syntax ==
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
350
if (pdu->type == SNMP_PDU_GET && obj->val.syntax == SNMP_SYNTAX_NULL) {
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
446
asn_append_oid(&(obj->val.var), &snmp_mibII_OID);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
554
parse_oid_numeric(struct snmp_value *value, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
563
suboid = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
565
warn("Value %s not supported", val);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
576
val = endptr + 1;
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
580
warnx("OID value %s not supported", val);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
606
asn_append_oid(&(value->v.oid), &(obj.val.var));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
611
parse_ip(struct snmp_value * value, char * val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
617
str = val;
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
633
parse_int(struct snmp_value *value, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
641
v = strtol(val, &endptr, 10);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
644
warn("Value %s not supported", val);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
657
parse_int_string(struct snmp_object *object, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
661
if (isdigit(val[0]))
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
662
return ((parse_int(&(object->val), val)));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
665
warnx("Unknown enumerated integer type - %s", val);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
668
if ((v = enum_number_lookup(object->info->snmp_enum, val)) < 0)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
669
warnx("Unknown enumerated integer type - %s", val);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
671
object->val.v.integer = v;
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
680
parse_uint(struct snmp_value *value, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
689
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
692
warn("Value %s not supported", val);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
704
parse_ticks(struct snmp_value *value, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
706
if (parse_uint(value, val) < 0)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
714
parse_gauge(struct snmp_value *value, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
716
if (parse_uint(value, val) < 0)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
724
parse_counter(struct snmp_value *value, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
726
if (parse_uint(value, val) < 0)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
734
parse_uint64(struct snmp_value *value, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
743
v = strtoull(val, &endptr, 10);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
746
warnx("Value %s not supported", val);
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
759
parse_syntax_val(struct snmp_value *value, enum snmp_syntax syntax, char *val)
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
763
return (parse_int(value, val));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
765
return (parse_ip(value, val));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
767
return (parse_counter(value, val));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
769
return (parse_gauge(value, val));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
771
return (parse_ticks(value, val));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
773
return (parse_uint64(value, val));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
775
return (snmp_tc2oct(SNMP_STRING, value, val));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
777
return (parse_oid_numeric(value, val));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
872
if (syn != object->val.syntax) {
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
877
object->val.syntax = syn;
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
883
switch (object->val.syntax) {
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
887
return (parse_ip(&(object->val), str + len));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
889
return (parse_counter(&(object->val), str + len));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
891
return (parse_gauge(&(object->val), str + len));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
893
return (parse_ticks(&(object->val), str + len));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
895
return (parse_uint64(&(object->val), str + len));
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
897
return (snmp_tc2oct(object->info->tc, &(object->val),
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
900
return (parse_oid_string(snmptoolctx, &(object->val),
usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.c
939
if (parse_pair_numoid_val(argv, &(obj->val)) < 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
281
uint32_t val;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
312
static u_long val; /* integer values */
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
328
val = 0;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
386
val = 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
388
val = 0;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
426
sscanf(nexttok, "%lu", &val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
456
val = keywords[c].val;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
461
val = t->syntax;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
519
if (enum_pair_insert(enums, val, nexttok) < 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
554
syntax = val;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
616
if (tok != TOK_NUM || val > ASN_MAXID ) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
723
oid2str->access |= (uint32_t) val;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
779
if (snmp_suboid_append(&(oid2str->var), (asn_subid_t) val) < 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
805
if (snmp_suboid_append(&current_oid, (asn_subid_t) val) < 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpimport.c
820
if (snmp_suboid_append(&current_oid, (asn_subid_t) val) < 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
1002
warnx("Unknown syntax - %d", s->val.syntax);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
727
if (asn_compare_oid(&(temp->var), &(s->val.var)) == 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
746
if ((asn_compare_oid(&(temp->var), &(s->val.var)) == 0) ||
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
747
(asn_is_suboid(&(temp->var), &(s->val.var)))) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
762
switch (s->val.syntax) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
789
warnx("Unknown syntax - %d", s->val.syntax);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
883
s->val.syntax = temp->syntax;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
885
asn_append_oid(&(s->val.var), &(temp->var));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
913
s->val.syntax = SNMP_SYNTAX_NULL;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
914
asn_append_oid(&(s->val.var), &(temp->var));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmpmap.c
973
switch (s->val.syntax) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
257
parse_octetstring(struct snmp_value *value, char *val)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
261
if ((len = strlen(val)) >= MAX_OCTSTRING_LEN) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
274
memcpy(value->v.octetstring.octets, val, len);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
495
parse_dateandtime(struct snmp_value *sv, char *val)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
502
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
507
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
510
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
514
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
517
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
521
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
524
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
528
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
531
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
535
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
538
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
542
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
545
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
549
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
552
if (*val != '-' && *val != '+')
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
554
date[8] = (uint8_t) *val;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
555
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
558
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
562
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
565
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
581
warnx("Date value %s not supported", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
650
parse_physaddress(struct snmp_value *sv, char *val)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
658
v = strtoul(val, &endptr, 16);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
660
warnx("Integer value %s not supported", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
664
warnx("Failed reading octet - %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
668
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
672
v = strtoul(val, &endptr, 16);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
674
warnx("Integer value %s not supported", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
779
parse_ntp_ts(struct snmp_value *sv, char *val)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
788
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
791
warnx("Integer value %s not supported", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
797
warnx("Failed reading octet - %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
806
val = endptr + 1;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
810
v = strtoul(val, &endptr, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptc.c
813
warnx("Integer value %s not supported", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1056
if ((endptr = snmp_parse_suboid(str, &(obj.val.var))) == NULL)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1058
if (snmp_suboid_append(oid, (asn_subid_t) obj.val.var.len) < 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1068
asn_append_oid(oid, &(obj.val.var));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1201
return (snmp_int2asn_oid(ptr, &(object->val.var)));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1204
&(object->val.var)));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1206
return (snmp_ip2asn_oid(ptr, &(object->val.var)));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1212
return (snmp_uint2asn_oid(ptr, &(object->val.var)));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1214
return (snmp_cnt64_2asn_oid(ptr, &(object->val.var)));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1216
return (snmp_tc2oid(idx->tc, ptr, &(object->val.var)));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1379
if (asn_compare_oid(&(temp->val.var), oid) == 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1388
if (temp->val.syntax == SNMP_SYNTAX_OCTETSTRING &&
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1389
temp->val.v.octetstring.octets != NULL)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1390
free(temp->val.v.octetstring.octets);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1404
if (o->val.syntax == SNMP_SYNTAX_OCTETSTRING &&
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1405
o->val.v.octetstring.octets != NULL)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1406
free(o->val.v.octetstring.octets);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1496
if (asn_compare_oid(&(err_value->var), &(obj->val.var)) == 0) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1681
asn_append_oid(&(obj.val.var), oid);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1766
snmp_output_numval(struct snmp_toolinfo *snmptoolctx, struct snmp_value *val,
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1769
if (val == NULL)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1775
switch (val->syntax) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1779
val->v.integer);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1781
snmp_output_int(snmptoolctx, NULL, val->v.integer);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1787
val->v.octetstring.len, val->v.octetstring.octets);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1790
val->v.octetstring.len, val->v.octetstring.octets);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1794
snmp_output_oid_value(snmptoolctx, &(val->v.oid));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1798
snmp_output_ipaddress(snmptoolctx, val->v.ipaddress);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1802
snmp_output_counter(snmptoolctx, val->v.uint32);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1806
snmp_output_gauge(snmptoolctx, val->v.uint32);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1810
snmp_output_ticks(snmptoolctx, val->v.uint32);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1814
snmp_output_counter64(snmptoolctx, val->v.counter64);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1819
return (val->syntax);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1823
return (val->syntax);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1827
return (val->syntax);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1832
return (val->syntax);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1847
struct snmp_value *val)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1852
if (obj == NULL || val == NULL)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1855
if ((suboid = snmp_suboid_pop(&(val->var))) > ASN_MAXID)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1859
asn_append_oid(&(obj->val.var), &(val->var));
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1860
obj->val.syntax = val->syntax;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1862
if (obj->val.syntax > 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1867
(void) snmp_suboid_append(&(val->var), suboid);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1868
(void) snmp_suboid_append(&(obj->val.var), suboid);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1961
o->val.var.subs[o->val.var.len - 1]);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1969
asn_slice_oid(&oid, &(o->val.var), (o->info->table_idx->var.len + len),
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1970
o->val.var.len);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1982
asn_slice_oid(&oid, &(o->val.var),
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
1983
(o->info->table_idx->var.len + len), o->val.var.len + 1);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
446
uint32_t val;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
461
if ((val = strtoul(dptr, NULL, 16)) > 0xFF || errno != 0) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
465
binstr[count] = (uint8_t) val;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
484
char *val, *option;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
493
while ((subopt = getsubopt1(&opt_arg, subopts, &val, &option)) != EOF) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
496
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
500
if (strlen(val) != 3) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
501
warnx("Unknown auth protocol - %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
504
if (strncasecmp("md5", val, strlen("md5")) == 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
507
else if (strncasecmp("sha", val, strlen("sha")) == 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
511
warnx("Unknown auth protocol - %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
516
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
520
if (parse_ascii(val, snmp_client.user.auth_key,
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
522
warnx("Bad authentication key- %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
539
char *val, *option;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
548
while ((subopt = getsubopt1(&opt_arg, subopts, &val, &option)) != EOF) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
551
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
555
if (strlen(val) != 3) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
556
warnx("Unknown privacy protocol - %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
559
if (strncasecmp("aes", val, strlen("aes")) == 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
561
else if (strncasecmp("des", val, strlen("des")) == 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
564
warnx("Unknown privacy protocol - %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
569
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
573
if (parse_ascii(val, snmp_client.user.priv_key,
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
575
warnx("Bad privacy key- %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
592
char *val, *option;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
601
while ((subopt = getsubopt1(&opt_arg, subopts, &val, &option)) != EOF) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
604
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
608
strlcpy(snmp_client.cname, val, SNMP_CONTEXT_NAME_SIZ);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
611
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
615
if ((int32_t)(snmp_client.clen = parse_ascii(val,
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
617
warnx("Bad EngineID - %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
634
char *val, *option;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
645
while ((subopt = getsubopt1(&opt_arg, subopts, &val, &option)) != EOF) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
648
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
652
snmp_client.engine.engine_len = parse_ascii(val,
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
655
warnx("Bad EngineID - %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
660
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
666
snmp_client.engine.engine_boots = strtoul(val, NULL, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
668
warn("Bad 'engine-boots' value %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
675
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
681
snmp_client.engine.engine_time = strtoul(val, NULL, 10);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
683
warn("Bad 'engine-time' value %s", val);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
690
strlcpy(snmp_client.user.sec_name, val,
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
719
char *val, *option;
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
745
while ((subopt = getsubopt1(&opt_arg, subopts, &val, &option)) != EOF) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
748
if (val == NULL) {
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
752
if (snmp_parse_numoid(val, &cut) < 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
759
if ((len = parse_path(val)) < 0)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
761
strlcpy(path, val, len + 1);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
765
if (val == NULL)
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
768
len = parse_flist(snmptoolctx, val, path, &IsoOrgDod_OID);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.c
770
len = parse_flist(snmptoolctx, val, path, &cut);
usr.sbin/bsnmpd/tools/libbsnmptools/bsnmptools.h
121
struct snmp_value val;
usr.sbin/chown/chown.c
235
unsigned long val;
usr.sbin/chown/chown.c
239
val = strtoul(name, &ep, 10);
usr.sbin/chown/chown.c
241
if (errno || *ep != '\0' || val > UID_MAX)
usr.sbin/chown/chown.c
243
return (val);
usr.sbin/config/config.y
3
int val;
usr.sbin/config/config.y
32
%token <val> NUMBER
usr.sbin/config/mkoptions.cc
326
insert_option(const char *fname, char *optname, char *val)
usr.sbin/config/mkoptions.cc
335
po->o_file = val;
usr.sbin/config/mkoptions.cc
341
update_option(const char *optname, char *val, int flags)
usr.sbin/config/mkoptions.cc
348
po->o_file = val;
usr.sbin/config/mkoptions.cc
365
char *optname, *val;
usr.sbin/config/mkoptions.cc
401
val = ns(genopt);
usr.sbin/config/mkoptions.cc
404
val = ns(wd);
usr.sbin/config/mkoptions.cc
412
insert_option(fname, optname, val);
usr.sbin/config/mkoptions.cc
414
update_option(optname, val, flags);
usr.sbin/cpucontrol/cpucontrol.c
120
uintmax_t val;
usr.sbin/cpucontrol/cpucontrol.c
123
val = strtoumax(str, endptr, base);
usr.sbin/cpucontrol/cpucontrol.c
124
if (*str == '\0' || errno == ERANGE || val > UINT32_MAX) {
usr.sbin/cpucontrol/cpucontrol.c
129
return ((uint32_t)val);
usr.sbin/cpucontrol/cpucontrol.c
77
#define HIGH(val) (uint32_t)(((val) >> 32) & 0xffffffff)
usr.sbin/cpucontrol/cpucontrol.c
78
#define LOW(val) (uint32_t)((val) & 0xffffffff)
usr.sbin/cron/lib/env.c
140
char name[MAX_ENVSTR], val[MAX_ENVSTR];
usr.sbin/cron/lib/env.c
163
bzero (val, sizeof val);
usr.sbin/cron/lib/env.c
207
str = val;
usr.sbin/cron/lib/env.c
232
c = val + strlen (val);
usr.sbin/cron/lib/env.c
233
while (c > val && isspace (*(c - 1)))
usr.sbin/cron/lib/env.c
239
if (snprintf(envstr, MAX_ENVSTR, "%s=%s", name, val) >= MAX_ENVSTR)
usr.sbin/cron/lib/env.c
241
Debug(DPARS, ("load_env, <%s> <%s> -> <%s>\n", name, val, envstr))
usr.sbin/ctld/nvmf.cc
127
int64_t val;
usr.sbin/ctld/nvmf.cc
133
if (expand_number(value, &val) == 0 && val >= 0 &&
usr.sbin/ctld/nvmf.cc
134
(uint64_t)val >= minv && (uint64_t)val <= maxv)
usr.sbin/ctld/nvmf.cc
135
return (uint64_t)val;
usr.sbin/cxgbetool/cxgbetool.c
1184
uint32_t val, mask;
usr.sbin/cxgbetool/cxgbetool.c
1204
} else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1205
t.fs.val.fcoe = val;
usr.sbin/cxgbetool/cxgbetool.c
1207
} else if (!parse_val_mask("iport", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1208
t.fs.val.iport = val;
usr.sbin/cxgbetool/cxgbetool.c
1210
} else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1211
t.fs.val.vnic = val;
usr.sbin/cxgbetool/cxgbetool.c
1213
t.fs.val.ovlan_vld = 1;
usr.sbin/cxgbetool/cxgbetool.c
1215
} else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1216
t.fs.val.vlan = val;
usr.sbin/cxgbetool/cxgbetool.c
1218
t.fs.val.vlan_vld = 1;
usr.sbin/cxgbetool/cxgbetool.c
1220
} else if (!parse_val_mask("pf", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1221
t.fs.val.vnic &= 0x1fff;
usr.sbin/cxgbetool/cxgbetool.c
1222
t.fs.val.vnic |= (val & 0x7) << 13;
usr.sbin/cxgbetool/cxgbetool.c
1225
t.fs.val.pfvf_vld = 1;
usr.sbin/cxgbetool/cxgbetool.c
1227
} else if (!parse_val_mask("vf", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1228
t.fs.val.vnic &= 0xe000;
usr.sbin/cxgbetool/cxgbetool.c
1229
t.fs.val.vnic |= val & 0x1fff;
usr.sbin/cxgbetool/cxgbetool.c
1232
t.fs.val.pfvf_vld = 1;
usr.sbin/cxgbetool/cxgbetool.c
1234
} else if (!parse_val_mask("tos", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1235
t.fs.val.tos = val;
usr.sbin/cxgbetool/cxgbetool.c
1237
} else if (!parse_val_mask("proto", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1238
t.fs.val.proto = val;
usr.sbin/cxgbetool/cxgbetool.c
1240
} else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1241
t.fs.val.ethtype = val;
usr.sbin/cxgbetool/cxgbetool.c
1243
} else if (!parse_val_mask("macidx", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1244
t.fs.val.macidx = val;
usr.sbin/cxgbetool/cxgbetool.c
1246
} else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1247
t.fs.val.matchtype = val;
usr.sbin/cxgbetool/cxgbetool.c
1249
} else if (!parse_val_mask("frag", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1250
t.fs.val.frag = val;
usr.sbin/cxgbetool/cxgbetool.c
1252
} else if (!parse_val_mask("dport", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1253
t.fs.val.dport = val;
usr.sbin/cxgbetool/cxgbetool.c
1255
} else if (!parse_val_mask("sport", args, &val, &mask, hash)) {
usr.sbin/cxgbetool/cxgbetool.c
1256
t.fs.val.sport = val;
usr.sbin/cxgbetool/cxgbetool.c
1258
} else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip,
usr.sbin/cxgbetool/cxgbetool.c
1261
} else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip,
usr.sbin/cxgbetool/cxgbetool.c
1268
} else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) {
usr.sbin/cxgbetool/cxgbetool.c
1269
t.fs.nat_dport = val;
usr.sbin/cxgbetool/cxgbetool.c
1270
} else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) {
usr.sbin/cxgbetool/cxgbetool.c
1271
t.fs.nat_sport = val;
usr.sbin/cxgbetool/cxgbetool.c
1285
} else if (!parse_val("hitcnts", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1286
t.fs.hitcnts = val;
usr.sbin/cxgbetool/cxgbetool.c
1287
} else if (!parse_val("prio", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1292
if (val != 0 && val != 1) {
usr.sbin/cxgbetool/cxgbetool.c
1297
t.fs.prio = val;
usr.sbin/cxgbetool/cxgbetool.c
1298
} else if (!parse_val("rpttid", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1300
} else if (!parse_val("queue", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1302
t.fs.iq = val; /* to the iq with this cntxt_id */
usr.sbin/cxgbetool/cxgbetool.c
1303
} else if (!parse_val("tcbhash", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1306
t.fs.iq = val;
usr.sbin/cxgbetool/cxgbetool.c
1307
} else if (!parse_val("tcbrss", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1313
t.fs.iq = val >> 1;
usr.sbin/cxgbetool/cxgbetool.c
1314
} else if (!parse_val("eport", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1315
t.fs.eport = val;
usr.sbin/cxgbetool/cxgbetool.c
1316
} else if (!parse_val("swapmac", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1339
} else if (!parse_val("natseq", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1340
t.fs.nat_seq_chk = val;
usr.sbin/cxgbetool/cxgbetool.c
1341
} else if (!parse_val("natflag", args, &val)) {
usr.sbin/cxgbetool/cxgbetool.c
1421
if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) {
usr.sbin/cxgbetool/cxgbetool.c
1436
long long val;
usr.sbin/cxgbetool/cxgbetool.c
1462
s = str_to_number(argv[0], NULL, &val);
usr.sbin/cxgbetool/cxgbetool.c
1463
if (*s || val < 0 || val > 0xffffffffU) {
usr.sbin/cxgbetool/cxgbetool.c
1477
idx = (uint32_t) val;
usr.sbin/cxgbetool/cxgbetool.c
1497
s = str_to_number(argv[3], NULL, &val);
usr.sbin/cxgbetool/cxgbetool.c
1498
if (*s || val < 0 || val > 1) {
usr.sbin/cxgbetool/cxgbetool.c
1503
prio = (int)val;
usr.sbin/cxgbetool/cxgbetool.c
159
str_to_number(const char *s, long *val, long long *vall)
usr.sbin/cxgbetool/cxgbetool.c
165
else if (val)
usr.sbin/cxgbetool/cxgbetool.c
166
*val = strtol(s, &p, 0);
usr.sbin/cxgbetool/cxgbetool.c
174
read_reg(long addr, int size, long long *val)
usr.sbin/cxgbetool/cxgbetool.c
181
reg.val = 0;
usr.sbin/cxgbetool/cxgbetool.c
185
*val = reg.val;
usr.sbin/cxgbetool/cxgbetool.c
191
write_reg(long addr, int size, long long val)
usr.sbin/cxgbetool/cxgbetool.c
197
reg.val = (uint64_t) val;
usr.sbin/cxgbetool/cxgbetool.c
207
long long val;
usr.sbin/cxgbetool/cxgbetool.c
222
p = str_to_number(v, NULL, &val);
usr.sbin/cxgbetool/cxgbetool.c
241
p = str_to_number(argv[1], NULL, &val);
usr.sbin/cxgbetool/cxgbetool.c
2455
long long val;
usr.sbin/cxgbetool/cxgbetool.c
2472
rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val);
usr.sbin/cxgbetool/cxgbetool.c
2476
addr = val + tid * TCB_SIZE;
usr.sbin/cxgbetool/cxgbetool.c
252
rc = write_reg(addr, size, val);
usr.sbin/cxgbetool/cxgbetool.c
254
rc = read_reg(addr, size, &val);
usr.sbin/cxgbetool/cxgbetool.c
256
printf("0x%llx [%llu]\n", val, val);
usr.sbin/cxgbetool/cxgbetool.c
2563
long long val;
usr.sbin/cxgbetool/cxgbetool.c
2566
rc = read_reg(0x9800, 4, &val);
usr.sbin/cxgbetool/cxgbetool.c
2569
printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED");
usr.sbin/cxgbetool/cxgbetool.c
263
xtract(uint32_t val, int shift, int len)
usr.sbin/cxgbetool/cxgbetool.c
265
return (val >> shift) & ((1 << len) - 1);
usr.sbin/cxgbetool/cxgbetool.c
2723
long long val;
usr.sbin/cxgbetool/cxgbetool.c
2741
s = str_to_number(argv[0], NULL, &val);
usr.sbin/cxgbetool/cxgbetool.c
2742
if (*s || val > 0xff) {
usr.sbin/cxgbetool/cxgbetool.c
2747
idx = (int8_t)val;
usr.sbin/cxgbetool/cxgbetool.c
2941
get_sched_param(const char *param, const char *args[], long *val)
usr.sbin/cxgbetool/cxgbetool.c
2948
p = str_to_number(args[1], val, NULL);
usr.sbin/cxgbetool/cxgbetool.c
3190
long val;
usr.sbin/cxgbetool/cxgbetool.c
3198
p = str_to_number(argv[0], &val, NULL);
usr.sbin/cxgbetool/cxgbetool.c
3199
if (*p || val > UCHAR_MAX) {
usr.sbin/cxgbetool/cxgbetool.c
3203
op.port = (uint8_t)val;
usr.sbin/cxgbetool/cxgbetool.c
3208
p = str_to_number(argv[1], &val, NULL);
usr.sbin/cxgbetool/cxgbetool.c
3209
if (*p || val < -1) {
usr.sbin/cxgbetool/cxgbetool.c
3213
op.queue = (int8_t)val;
usr.sbin/cxgbetool/cxgbetool.c
3219
p = str_to_number(argv[2], &val, NULL);
usr.sbin/cxgbetool/cxgbetool.c
3220
if (*p || val < -1) {
usr.sbin/cxgbetool/cxgbetool.c
3224
op.cl = (int8_t)val;
usr.sbin/cxgbetool/cxgbetool.c
3271
long val;
usr.sbin/cxgbetool/cxgbetool.c
3305
val = -1;
usr.sbin/cxgbetool/cxgbetool.c
3306
p = str_to_number(param, &val, NULL);
usr.sbin/cxgbetool/cxgbetool.c
3308
if (*p || val < 0 || val > 15) {
usr.sbin/cxgbetool/cxgbetool.c
3314
os->sched_class = val;
usr.sbin/cxgbetool/cxgbetool.c
3318
val = QUEUE_RANDOM;
usr.sbin/cxgbetool/cxgbetool.c
3320
val = QUEUE_ROUNDROBIN;
usr.sbin/cxgbetool/cxgbetool.c
3322
p = str_to_number(param, &val, NULL);
usr.sbin/cxgbetool/cxgbetool.c
3323
if (*p || val < 0 || val > 0xffff) {
usr.sbin/cxgbetool/cxgbetool.c
3332
os->txq = val;
usr.sbin/cxgbetool/cxgbetool.c
3333
os->rxq = val;
usr.sbin/cxgbetool/cxgbetool.c
3335
os->txq = val;
usr.sbin/cxgbetool/cxgbetool.c
3337
os->rxq = val;
usr.sbin/cxgbetool/cxgbetool.c
3342
val = -1;
usr.sbin/cxgbetool/cxgbetool.c
3343
p = str_to_number(param, &val, NULL);
usr.sbin/cxgbetool/cxgbetool.c
3344
if (*p || val <= 0) {
usr.sbin/cxgbetool/cxgbetool.c
3350
os->mss = val;
usr.sbin/cxgbetool/cxgbetool.c
3857
long long val;
usr.sbin/cxgbetool/cxgbetool.c
3874
rc = read_reg(A_PL_REV, 4, &val);
usr.sbin/cxgbetool/cxgbetool.c
3880
rc = read_reg(A_PL_VF_REV, 4, &val);
usr.sbin/cxgbetool/cxgbetool.c
3887
chip_id = (val >> 4) & 0xf;
usr.sbin/cxgbetool/cxgbetool.c
3894
rc = read_reg(whoami, 4, &val);
usr.sbin/cxgbetool/cxgbetool.c
3897
g.pf = g.chip_id > 5 ? (val >> 9) & 7 : (val >> 8) & 7;
usr.sbin/cxgbetool/cxgbetool.c
57
#define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo))
usr.sbin/cxgbetool/cxgbetool.c
652
parse_val_mask(const char *param, const char *args[], uint32_t *val,
usr.sbin/cxgbetool/cxgbetool.c
663
*val = (uint32_t)l;
usr.sbin/cxgbetool/cxgbetool.c
815
parse_val(const char *param, const char *args[], uint32_t *val)
usr.sbin/cxgbetool/cxgbetool.c
829
*val = (uint32_t)l;
usr.sbin/cxgbetool/cxgbetool.c
869
printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe);
usr.sbin/cxgbetool/cxgbetool.c
872
printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport);
usr.sbin/cxgbetool/cxgbetool.c
877
t->fs.val.pfvf_vld,
usr.sbin/cxgbetool/cxgbetool.c
878
(t->fs.val.vnic >> 13) & 0x7,
usr.sbin/cxgbetool/cxgbetool.c
879
t->fs.val.vnic & 0x1fff,
usr.sbin/cxgbetool/cxgbetool.c
885
t->fs.val.ovlan_vld, t->fs.val.vnic,
usr.sbin/cxgbetool/cxgbetool.c
891
t->fs.val.vlan_vld, t->fs.val.vlan,
usr.sbin/cxgbetool/cxgbetool.c
895
printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos);
usr.sbin/cxgbetool/cxgbetool.c
898
printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto);
usr.sbin/cxgbetool/cxgbetool.c
901
printf(" %04x/%04x", t->fs.val.ethtype,
usr.sbin/cxgbetool/cxgbetool.c
905
printf(" %03x/%03x", t->fs.val.macidx,
usr.sbin/cxgbetool/cxgbetool.c
909
printf(" %1x/%1x", t->fs.val.matchtype,
usr.sbin/cxgbetool/cxgbetool.c
913
printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag);
usr.sbin/cxgbetool/cxgbetool.c
924
filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip);
usr.sbin/cxgbetool/cxgbetool.c
925
filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip);
usr.sbin/cxgbetool/cxgbetool.c
927
t->fs.val.dport, t->fs.mask.dport,
usr.sbin/cxgbetool/cxgbetool.c
928
t->fs.val.sport, t->fs.mask.sport);
usr.sbin/cxgbetool/tcb_common.c
227
return tvp->val;
usr.sbin/cxgbetool/tcb_common.c
287
case COMP_NONE: tvp->val=rawval; break;
usr.sbin/cxgbetool/tcb_common.c
288
case COMP_ULP: tvp->val=rawval; break;
usr.sbin/cxgbetool/tcb_common.c
290
tvp->val=(tx_max - rawval) & 0xFFFFFFFF;
usr.sbin/cxgbetool/tcb_common.c
297
tvp->val=(rcv_nxt+rx_frag0_start_idx_raw+fragx) & 0xFFFFFFFF;
usr.sbin/cxgbetool/tcb_common.c
299
tvp->val=(rcv_nxt - rawval) & 0xFFFFFFFF;
usr.sbin/cxgbetool/tcb_common.c
302
case COMP_PTR: tvp->val=rawval; break;
usr.sbin/cxgbetool/tcb_common.c
305
tvp->val=rawval;
usr.sbin/cxgbetool/tcb_common.c
314
tvp->val=0;
usr.sbin/cxgbetool/tcb_common.c
315
tvp->val=rawval; /* comment this out to display altered value */
usr.sbin/cxgbetool/tcb_common.c
337
tvp->val=(unsigned) (tvp->rawval & 0xFFFFFFFF);
usr.sbin/cxgbetool/tcb_common.c
482
tx_max=tvp->val;
usr.sbin/cxgbetool/tcb_common.c
486
rcv_nxt=tvp->val;
usr.sbin/cxgbetool/tcb_common.c
491
rx_frag0_start_idx_raw=tvp->val;
usr.sbin/cxgbetool/tcb_common.c
498
ulp_type=tvp->val; /* ULP type is always first variable in TCB */
usr.sbin/cxgbetool/tcb_common.c
527
tvp->val=0;
usr.sbin/cxgbetool/tcb_common.c
558
printf(" -> %1u (0x%x)", tvp->val,tvp->val);
usr.sbin/cxgbetool/tcb_common.h
140
extern unsigned val(char *name);
usr.sbin/cxgbetool/tcb_common.h
88
unsigned val;
usr.sbin/cxgbetool/tcbshowt4.c
100
val("rcv_adv") << val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt4.c
101
val("recv_scale"), val("rcv_scale"), val("active_open"));
usr.sbin/cxgbetool/tcbshowt4.c
104
val("rcv_adv"), val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt4.c
105
val("recv_scale"), val("active_open"));
usr.sbin/cxgbetool/tcbshowt4.c
109
val("snd_cwnd") , val("snd_ssthresh"), val("snd_rec")
usr.sbin/cxgbetool/tcbshowt4.c
116
spr_cctrl_sel(val("cctrl_sel0"),val("cctrl_sel1")),
usr.sbin/cxgbetool/tcbshowt4.c
117
val("cctrl_ecn"), val("cctrl_ece"), val("cctrl_cwr"),
usr.sbin/cxgbetool/tcbshowt4.c
118
val("cctrl_rfr"));
usr.sbin/cxgbetool/tcbshowt4.c
120
val("t_dupacks"), val("dupack_count_odd"),val("fast_recovery"));
usr.sbin/cxgbetool/tcbshowt4.c
122
val("core_more"),val("core_urg"),val("core_push"));
usr.sbin/cxgbetool/tcbshowt4.c
123
PR(" core_flush %u\n",val("core_flush"));
usr.sbin/cxgbetool/tcbshowt4.c
125
val("nagle"), val("ssws_disabled"), val("turbo"));
usr.sbin/cxgbetool/tcbshowt4.c
126
PR(" tx_pdu_out %u\n",val("tx_pdu_out"));
usr.sbin/cxgbetool/tcbshowt4.c
128
val("tx_pace_auto"),val("tx_pace_fixed"),val("tx_queue"));
usr.sbin/cxgbetool/tcbshowt4.c
131
PR(" tx_quiesce %u\n",val("tx_quiesce"));
usr.sbin/cxgbetool/tcbshowt4.c
133
val("tx_channel"),
usr.sbin/cxgbetool/tcbshowt4.c
134
(val("tx_channel")>>1)&1,
usr.sbin/cxgbetool/tcbshowt4.c
135
val("tx_channel")&1
usr.sbin/cxgbetool/tcbshowt4.c
142
val("tx_hdr_ptr"),val("tx_last_ptr"),val("tx_compact"));
usr.sbin/cxgbetool/tcbshowt4.c
149
val("ts_last_ack_sent"),val("rx_compact"));
usr.sbin/cxgbetool/tcbshowt4.c
151
val("rcv_nxt"), val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt4.c
153
val("rx_frag0_start_idx"),
usr.sbin/cxgbetool/tcbshowt4.c
154
val("rx_frag0_len"),
usr.sbin/cxgbetool/tcbshowt4.c
155
val("rx_ptr"));
usr.sbin/cxgbetool/tcbshowt4.c
157
val("rx_frag1_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
158
val("rx_frag1_len"));
usr.sbin/cxgbetool/tcbshowt4.c
163
if (val("ulp_type")!=4) { /* RDMA has FRAG1 idx && len, but no ptr? Should I not display frag1 at all? */
usr.sbin/cxgbetool/tcbshowt4.c
164
PR("frag1_ptr 0x%-8x\n",val("rx_frag1_ptr"));
usr.sbin/cxgbetool/tcbshowt4.c
170
if (val("ulp_type") !=6 && val("ulp_type") != 5 && val("ulp_type") !=4) {
usr.sbin/cxgbetool/tcbshowt4.c
172
val("rx_frag2_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
173
val("rx_frag2_len"),
usr.sbin/cxgbetool/tcbshowt4.c
174
val("rx_frag2_ptr"));
usr.sbin/cxgbetool/tcbshowt4.c
176
val("rx_frag3_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
177
val("rx_frag3_len"),
usr.sbin/cxgbetool/tcbshowt4.c
178
val("rx_frag3_ptr"));
usr.sbin/cxgbetool/tcbshowt4.c
187
val("peer_fin"),val("rx_pdu_out"), val("pdu_len"));
usr.sbin/cxgbetool/tcbshowt4.c
192
if (val("recv_scale")) {
usr.sbin/cxgbetool/tcbshowt4.c
194
val("rcv_wnd"), val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt4.c
195
val("rcv_wnd") >> val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt4.c
196
val("recv_scale"));
usr.sbin/cxgbetool/tcbshowt4.c
199
val("rcv_wnd"), val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt4.c
200
val("recv_scale"));
usr.sbin/cxgbetool/tcbshowt4.c
207
val("dack_mss"),val("dack"),val("dack_not_acked"));
usr.sbin/cxgbetool/tcbshowt4.c
209
val("rcv_coalesce_enable"),
usr.sbin/cxgbetool/tcbshowt4.c
210
val("rcv_coalesce_push"),
usr.sbin/cxgbetool/tcbshowt4.c
211
val("rcv_coalesce_last_psh"),
usr.sbin/cxgbetool/tcbshowt4.c
212
val("rcv_coalesce_heartbeat"));
usr.sbin/cxgbetool/tcbshowt4.c
215
val("rx_channel"), val("rx_quiesce"),
usr.sbin/cxgbetool/tcbshowt4.c
216
val("rx_flow_control_disable"));
usr.sbin/cxgbetool/tcbshowt4.c
218
val("rx_flow_control_ddp"));
usr.sbin/cxgbetool/tcbshowt4.c
223
((val("pend_ctl2")<<2) | (val("pend_ctl1")<<1) |
usr.sbin/cxgbetool/tcbshowt4.c
224
val("pend_ctl0")),
usr.sbin/cxgbetool/tcbshowt4.c
225
val("unused"),val("main_slush"));
usr.sbin/cxgbetool/tcbshowt4.c
227
val("migrating"),
usr.sbin/cxgbetool/tcbshowt4.c
228
val("ask_mode"), val("non_offload"), val("rss_info"));
usr.sbin/cxgbetool/tcbshowt4.c
230
val("ulp_type"), spr_ulp_type(val("ulp_type")),val("ulp_raw"));
usr.sbin/cxgbetool/tcbshowt4.c
232
val("rdma_error"), val("rdma_flm_error"));
usr.sbin/cxgbetool/tcbshowt4.c
242
val("aux1_slush0"), val("aux1_slush1"));
usr.sbin/cxgbetool/tcbshowt4.c
243
PR(" pdu_hdr_len %u\n",val("pdu_hdr_len"));
usr.sbin/cxgbetool/tcbshowt4.c
255
val("qp_id"), val("pd_id"),val("stag"));
usr.sbin/cxgbetool/tcbshowt4.c
257
val("irs_ulp"),val("iss_ulp"));
usr.sbin/cxgbetool/tcbshowt4.c
259
val("tx_pdu_len"));
usr.sbin/cxgbetool/tcbshowt4.c
261
val("cq_idx_sq"),val("cq_idx_rq"));
usr.sbin/cxgbetool/tcbshowt4.c
263
val("rq_start"),val("rq_msn"),val("rq_max_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
264
val("rq_write_ptr"));
usr.sbin/cxgbetool/tcbshowt4.c
266
val("ord_l_bit_vld"),val("rdmap_opcode"));
usr.sbin/cxgbetool/tcbshowt4.c
268
val("tx_flush"),val("tx_oos_rxmt"),val("tx_oos_txmt"));
usr.sbin/cxgbetool/tcbshowt4.c
281
val("aux3_slush"),val("ddp_buf0_unused"),val("ddp_buf1_unused"),
usr.sbin/cxgbetool/tcbshowt4.c
282
val("ddp_main_unused"));
usr.sbin/cxgbetool/tcbshowt4.c
290
val("ddp_off"),val("ddp_active_buf"),val("ddp_indicate_out"),
usr.sbin/cxgbetool/tcbshowt4.c
291
val("ddp_wait_frag"),val("ddp_rx2tx"),val("ddp_buf_inf")
usr.sbin/cxgbetool/tcbshowt4.c
300
val("ddp_buf0_indicate"),
usr.sbin/cxgbetool/tcbshowt4.c
301
val("ddp_pshf_enable_0"), val("ddp_push_disable_0"),
usr.sbin/cxgbetool/tcbshowt4.c
302
val("ddp_buf0_flush"), val("ddp_psh_no_invalidate0")
usr.sbin/cxgbetool/tcbshowt4.c
305
val("ddp_buf1_indicate"),
usr.sbin/cxgbetool/tcbshowt4.c
306
val("ddp_pshf_enable_1"), val("ddp_push_disable_1"),
usr.sbin/cxgbetool/tcbshowt4.c
307
val("ddp_buf1_flush"), val("ddp_psh_no_invalidate1")
usr.sbin/cxgbetool/tcbshowt4.c
321
val("ddp_buf0_valid"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
322
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_tag")
usr.sbin/cxgbetool/tcbshowt4.c
326
if (0==val("ddp_off") && 1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt4.c
334
val("ddp_buf1_valid"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
335
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_tag")
usr.sbin/cxgbetool/tcbshowt4.c
341
if (0==val("ddp_off") && 1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt4.c
352
if (1==val("ddp_off")) {
usr.sbin/cxgbetool/tcbshowt4.c
354
} else if (1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt4.c
357
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
358
val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset")
usr.sbin/cxgbetool/tcbshowt4.c
360
if (1==val("ddp_buf1_valid")) {
usr.sbin/cxgbetool/tcbshowt4.c
362
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
363
val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset")
usr.sbin/cxgbetool/tcbshowt4.c
366
} else if (1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt4.c
369
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
370
val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset")
usr.sbin/cxgbetool/tcbshowt4.c
372
if (1==val("ddp_buf0_valid")) {
usr.sbin/cxgbetool/tcbshowt4.c
374
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt4.c
375
val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset")
usr.sbin/cxgbetool/tcbshowt4.c
378
} else if (0==val("ddp_buf0_valid") && 1==val("ddp_buf1_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt4.c
380
} else if (1==val("ddp_buf0_valid") && 0==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt4.c
388
if (0==val("ddp_indicate_out")) {
usr.sbin/cxgbetool/tcbshowt4.c
389
if (0==val("ddp_buf0_indicate") && 0==val("ddp_buf1_indicate")) {
usr.sbin/cxgbetool/tcbshowt4.c
391
if (0==val("rx_hdr_offset")) {
usr.sbin/cxgbetool/tcbshowt4.c
395
val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt4.c
400
} else if (1==val("ddp_indicate_out")) {
usr.sbin/cxgbetool/tcbshowt4.c
402
if (0==val("rx_hdr_offset")) {
usr.sbin/cxgbetool/tcbshowt4.c
406
val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt4.c
46
spr_tcp_state(val("t_state")),
usr.sbin/cxgbetool/tcbshowt4.c
47
val("t_state"),
usr.sbin/cxgbetool/tcbshowt4.c
48
spr_ip_version(val("ip_version")),
usr.sbin/cxgbetool/tcbshowt4.c
49
val("lock_tid"),
usr.sbin/cxgbetool/tcbshowt4.c
50
val("init")
usr.sbin/cxgbetool/tcbshowt4.c
53
val("l2t_ix"),
usr.sbin/cxgbetool/tcbshowt4.c
54
val("smac_sel"),
usr.sbin/cxgbetool/tcbshowt4.c
55
val("tos")
usr.sbin/cxgbetool/tcbshowt4.c
58
val("t_maxseg"), val("recv_scale"),
usr.sbin/cxgbetool/tcbshowt4.c
59
val("recv_tstmp"), val("recv_sack"));
usr.sbin/cxgbetool/tcbshowt4.c
64
val("timer"), val("dack_timer"));
usr.sbin/cxgbetool/tcbshowt4.c
66
val("mod_schd_tx"),
usr.sbin/cxgbetool/tcbshowt4.c
67
val("mod_schd_rx"),
usr.sbin/cxgbetool/tcbshowt4.c
68
((val("mod_schd_reason2")<<2) | (val("mod_schd_reason1")<<1) |
usr.sbin/cxgbetool/tcbshowt4.c
69
val("mod_schd_reason0"))
usr.sbin/cxgbetool/tcbshowt4.c
74
val("max_rt"), val("t_rxtshift"),
usr.sbin/cxgbetool/tcbshowt4.c
75
val("keepalive"));
usr.sbin/cxgbetool/tcbshowt4.c
77
val("timestamp_offset"),val("timestamp"));
usr.sbin/cxgbetool/tcbshowt4.c
81
val("t_rtt_ts_recent_age"), val("t_rtseq_recent"));
usr.sbin/cxgbetool/tcbshowt4.c
83
val("t_srtt"),val("t_rttvar"));
usr.sbin/cxgbetool/tcbshowt4.c
92
val("snd_una"),val("snd_nxt"),
usr.sbin/cxgbetool/tcbshowt4.c
93
val("snd_max"),val("tx_max"));
usr.sbin/cxgbetool/tcbshowt4.c
95
val("core_fin"), SEQ_SUB(val("tx_max"),val("snd_una"))
usr.sbin/cxgbetool/tcbshowt4.c
97
if (val("recv_scale") && !val("active_open")) {
usr.sbin/cxgbetool/tcbshowt4.c
99
val("rcv_adv"), val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt5.c
100
val("rcv_adv") << val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt5.c
101
val("recv_scale"), val("rcv_scale"), val("active_open"));
usr.sbin/cxgbetool/tcbshowt5.c
104
val("rcv_adv"), val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt5.c
105
val("recv_scale"), val("active_open"));
usr.sbin/cxgbetool/tcbshowt5.c
109
val("snd_cwnd") , val("snd_ssthresh"), val("snd_rec")
usr.sbin/cxgbetool/tcbshowt5.c
116
spr_cctrl_sel(val("cctrl_sel0"),val("cctrl_sel1")),
usr.sbin/cxgbetool/tcbshowt5.c
117
val("cctrl_ecn"), val("cctrl_ece"), val("cctrl_cwr"),
usr.sbin/cxgbetool/tcbshowt5.c
118
val("cctrl_rfr"));
usr.sbin/cxgbetool/tcbshowt5.c
120
val("t_dupacks"), val("dupack_count_odd"),val("fast_recovery"));
usr.sbin/cxgbetool/tcbshowt5.c
122
val("core_more"),val("core_urg"),val("core_push"));
usr.sbin/cxgbetool/tcbshowt5.c
123
PR(" core_flush %u\n",val("core_flush"));
usr.sbin/cxgbetool/tcbshowt5.c
125
val("nagle"), val("ssws_disabled"), val("turbo"));
usr.sbin/cxgbetool/tcbshowt5.c
126
PR(" tx_pdu_out %u\n",val("tx_pdu_out"));
usr.sbin/cxgbetool/tcbshowt5.c
128
val("tx_pace_auto"),val("tx_pace_fixed"),val("tx_queue"));
usr.sbin/cxgbetool/tcbshowt5.c
131
PR(" tx_quiesce %u\n",val("tx_quiesce"));
usr.sbin/cxgbetool/tcbshowt5.c
133
val("tx_channel"),
usr.sbin/cxgbetool/tcbshowt5.c
134
(val("tx_channel")>>1)&1,
usr.sbin/cxgbetool/tcbshowt5.c
135
val("tx_channel")&1
usr.sbin/cxgbetool/tcbshowt5.c
142
val("tx_hdr_ptr"),val("tx_last_ptr"),val("tx_compact"));
usr.sbin/cxgbetool/tcbshowt5.c
149
val("ts_last_ack_sent"),val("rx_compact"));
usr.sbin/cxgbetool/tcbshowt5.c
151
val("rcv_nxt"), val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt5.c
153
val("rx_frag0_start_idx"),
usr.sbin/cxgbetool/tcbshowt5.c
154
val("rx_frag0_len"),
usr.sbin/cxgbetool/tcbshowt5.c
155
val("rx_ptr"));
usr.sbin/cxgbetool/tcbshowt5.c
157
val("rx_frag1_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
158
val("rx_frag1_len"));
usr.sbin/cxgbetool/tcbshowt5.c
163
if (val("ulp_type")!=4) { /* RDMA has FRAG1 idx && len, but no ptr? Should I not display frag1 at all? */
usr.sbin/cxgbetool/tcbshowt5.c
164
PR("frag1_ptr 0x%-8x\n",val("rx_frag1_ptr"));
usr.sbin/cxgbetool/tcbshowt5.c
170
if (val("ulp_type") !=6 && val("ulp_type") != 5 && val("ulp_type") !=4) {
usr.sbin/cxgbetool/tcbshowt5.c
172
val("rx_frag2_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
173
val("rx_frag2_len"),
usr.sbin/cxgbetool/tcbshowt5.c
174
val("rx_frag2_ptr"));
usr.sbin/cxgbetool/tcbshowt5.c
176
val("rx_frag3_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
177
val("rx_frag3_len"),
usr.sbin/cxgbetool/tcbshowt5.c
178
val("rx_frag3_ptr"));
usr.sbin/cxgbetool/tcbshowt5.c
187
val("peer_fin"),val("rx_pdu_out"), val("pdu_len"));
usr.sbin/cxgbetool/tcbshowt5.c
192
if (val("recv_scale")) {
usr.sbin/cxgbetool/tcbshowt5.c
194
val("rcv_wnd"), val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt5.c
195
val("rcv_wnd") >> val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt5.c
196
val("recv_scale"));
usr.sbin/cxgbetool/tcbshowt5.c
199
val("rcv_wnd"), val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt5.c
200
val("recv_scale"));
usr.sbin/cxgbetool/tcbshowt5.c
207
val("dack_mss"),val("dack"),val("dack_not_acked"));
usr.sbin/cxgbetool/tcbshowt5.c
209
val("rcv_coalesce_enable"),
usr.sbin/cxgbetool/tcbshowt5.c
210
val("rcv_coalesce_push"),
usr.sbin/cxgbetool/tcbshowt5.c
211
val("rcv_coalesce_last_psh"),
usr.sbin/cxgbetool/tcbshowt5.c
212
val("rcv_coalesce_heartbeat"));
usr.sbin/cxgbetool/tcbshowt5.c
215
val("rx_channel"), val("rx_quiesce"),
usr.sbin/cxgbetool/tcbshowt5.c
216
val("rx_flow_control_disable"));
usr.sbin/cxgbetool/tcbshowt5.c
218
val("rx_flow_control_ddp"));
usr.sbin/cxgbetool/tcbshowt5.c
223
((val("pend_ctl2")<<2) | (val("pend_ctl1")<<1) |
usr.sbin/cxgbetool/tcbshowt5.c
224
val("pend_ctl0")),
usr.sbin/cxgbetool/tcbshowt5.c
225
val("unused"),val("main_slush"));
usr.sbin/cxgbetool/tcbshowt5.c
227
val("migrating"),
usr.sbin/cxgbetool/tcbshowt5.c
228
val("ask_mode"), val("non_offload"), val("rss_info"));
usr.sbin/cxgbetool/tcbshowt5.c
230
val("ulp_type"), spr_ulp_type(val("ulp_type")),
usr.sbin/cxgbetool/tcbshowt5.c
231
val("ulp_raw"));
usr.sbin/cxgbetool/tcbshowt5.c
235
PR(", ulp_ext %u",val("ulp_ext"));
usr.sbin/cxgbetool/tcbshowt5.c
243
val("rdma_error"), val("rdma_flm_error"));
usr.sbin/cxgbetool/tcbshowt5.c
253
val("aux1_slush0"), val("aux1_slush1"));
usr.sbin/cxgbetool/tcbshowt5.c
254
PR(" pdu_hdr_len %u\n",val("pdu_hdr_len"));
usr.sbin/cxgbetool/tcbshowt5.c
266
val("qp_id"), val("pd_id"),val("stag"));
usr.sbin/cxgbetool/tcbshowt5.c
268
val("irs_ulp"),val("iss_ulp"));
usr.sbin/cxgbetool/tcbshowt5.c
270
val("tx_pdu_len"));
usr.sbin/cxgbetool/tcbshowt5.c
272
val("cq_idx_sq"),val("cq_idx_rq"));
usr.sbin/cxgbetool/tcbshowt5.c
274
val("rq_start"),val("rq_msn"),val("rq_max_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
275
val("rq_write_ptr"));
usr.sbin/cxgbetool/tcbshowt5.c
277
val("ord_l_bit_vld"),val("rdmap_opcode"));
usr.sbin/cxgbetool/tcbshowt5.c
279
val("tx_flush"),val("tx_oos_rxmt"),val("tx_oos_txmt"));
usr.sbin/cxgbetool/tcbshowt5.c
292
val("aux3_slush"),val("ddp_buf0_unused"),val("ddp_buf1_unused"),
usr.sbin/cxgbetool/tcbshowt5.c
293
val("ddp_main_unused"));
usr.sbin/cxgbetool/tcbshowt5.c
301
val("ddp_off"),val("ddp_active_buf"),val("ddp_indicate_out"),
usr.sbin/cxgbetool/tcbshowt5.c
302
val("ddp_wait_frag"),val("ddp_rx2tx"),val("ddp_buf_inf")
usr.sbin/cxgbetool/tcbshowt5.c
311
val("ddp_buf0_indicate"),
usr.sbin/cxgbetool/tcbshowt5.c
312
val("ddp_pshf_enable_0"), val("ddp_push_disable_0"),
usr.sbin/cxgbetool/tcbshowt5.c
313
val("ddp_buf0_flush"), val("ddp_psh_no_invalidate0")
usr.sbin/cxgbetool/tcbshowt5.c
316
val("ddp_buf1_indicate"),
usr.sbin/cxgbetool/tcbshowt5.c
317
val("ddp_pshf_enable_1"), val("ddp_push_disable_1"),
usr.sbin/cxgbetool/tcbshowt5.c
318
val("ddp_buf1_flush"), val("ddp_psh_no_invalidate1")
usr.sbin/cxgbetool/tcbshowt5.c
332
val("ddp_buf0_valid"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
333
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_tag")
usr.sbin/cxgbetool/tcbshowt5.c
337
if (0==val("ddp_off") && 1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt5.c
345
val("ddp_buf1_valid"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
346
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_tag")
usr.sbin/cxgbetool/tcbshowt5.c
352
if (0==val("ddp_off") && 1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt5.c
363
if (1==val("ddp_off")) {
usr.sbin/cxgbetool/tcbshowt5.c
365
} else if (1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt5.c
368
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
369
val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset")
usr.sbin/cxgbetool/tcbshowt5.c
371
if (1==val("ddp_buf1_valid")) {
usr.sbin/cxgbetool/tcbshowt5.c
373
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
374
val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset")
usr.sbin/cxgbetool/tcbshowt5.c
377
} else if (1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt5.c
380
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
381
val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset")
usr.sbin/cxgbetool/tcbshowt5.c
383
if (1==val("ddp_buf0_valid")) {
usr.sbin/cxgbetool/tcbshowt5.c
385
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt5.c
386
val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset")
usr.sbin/cxgbetool/tcbshowt5.c
389
} else if (0==val("ddp_buf0_valid") && 1==val("ddp_buf1_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt5.c
391
} else if (1==val("ddp_buf0_valid") && 0==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt5.c
399
if (0==val("ddp_indicate_out")) {
usr.sbin/cxgbetool/tcbshowt5.c
400
if (0==val("ddp_buf0_indicate") && 0==val("ddp_buf1_indicate")) {
usr.sbin/cxgbetool/tcbshowt5.c
402
if (0==val("rx_hdr_offset")) {
usr.sbin/cxgbetool/tcbshowt5.c
406
val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt5.c
411
} else if (1==val("ddp_indicate_out")) {
usr.sbin/cxgbetool/tcbshowt5.c
413
if (0==val("rx_hdr_offset")) {
usr.sbin/cxgbetool/tcbshowt5.c
417
val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt5.c
46
spr_tcp_state(val("t_state")),
usr.sbin/cxgbetool/tcbshowt5.c
47
val("t_state"),
usr.sbin/cxgbetool/tcbshowt5.c
48
spr_ip_version(val("ip_version")),
usr.sbin/cxgbetool/tcbshowt5.c
49
val("lock_tid"),
usr.sbin/cxgbetool/tcbshowt5.c
50
val("rss_fw")
usr.sbin/cxgbetool/tcbshowt5.c
53
val("l2t_ix"),
usr.sbin/cxgbetool/tcbshowt5.c
54
val("smac_sel"),
usr.sbin/cxgbetool/tcbshowt5.c
55
val("tos")
usr.sbin/cxgbetool/tcbshowt5.c
58
val("t_maxseg"), val("recv_scale"),
usr.sbin/cxgbetool/tcbshowt5.c
59
val("recv_tstmp"), val("recv_sack"));
usr.sbin/cxgbetool/tcbshowt5.c
64
val("timer"), val("dack_timer"));
usr.sbin/cxgbetool/tcbshowt5.c
66
val("mod_schd_tx"),
usr.sbin/cxgbetool/tcbshowt5.c
67
val("mod_schd_rx"),
usr.sbin/cxgbetool/tcbshowt5.c
68
((val("mod_schd_reason2")<<2) | (val("mod_schd_reason1")<<1) |
usr.sbin/cxgbetool/tcbshowt5.c
69
val("mod_schd_reason0"))
usr.sbin/cxgbetool/tcbshowt5.c
74
val("max_rt"), val("t_rxtshift"),
usr.sbin/cxgbetool/tcbshowt5.c
75
val("keepalive"));
usr.sbin/cxgbetool/tcbshowt5.c
77
val("timestamp_offset"),val("timestamp"));
usr.sbin/cxgbetool/tcbshowt5.c
81
val("t_rtt_ts_recent_age"), val("t_rtseq_recent"));
usr.sbin/cxgbetool/tcbshowt5.c
83
val("t_srtt"),val("t_rttvar"));
usr.sbin/cxgbetool/tcbshowt5.c
92
val("snd_una"),val("snd_nxt"),
usr.sbin/cxgbetool/tcbshowt5.c
93
val("snd_max"),val("tx_max"));
usr.sbin/cxgbetool/tcbshowt5.c
95
val("core_fin"), SEQ_SUB(val("tx_max"),val("snd_una"))
usr.sbin/cxgbetool/tcbshowt5.c
97
if (val("recv_scale") && !val("active_open")) {
usr.sbin/cxgbetool/tcbshowt5.c
99
val("rcv_adv"), val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt6.c
100
val("rcv_adv") << val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt6.c
101
val("recv_scale"), val("rcv_scale"), val("active_open"));
usr.sbin/cxgbetool/tcbshowt6.c
104
val("rcv_adv"), val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt6.c
105
val("recv_scale"), val("active_open"));
usr.sbin/cxgbetool/tcbshowt6.c
109
val("snd_cwnd") , val("snd_ssthresh"), val("snd_rec")
usr.sbin/cxgbetool/tcbshowt6.c
116
spr_cctrl_sel(val("cctrl_sel0"),val("cctrl_sel1")),
usr.sbin/cxgbetool/tcbshowt6.c
117
val("cctrl_ecn"), val("cctrl_ece"), val("cctrl_cwr"),
usr.sbin/cxgbetool/tcbshowt6.c
118
val("cctrl_rfr"));
usr.sbin/cxgbetool/tcbshowt6.c
120
val("t_dupacks"), val("dupack_count_odd"),val("fast_recovery"));
usr.sbin/cxgbetool/tcbshowt6.c
122
val("core_more"),val("core_urg"),val("core_push"));
usr.sbin/cxgbetool/tcbshowt6.c
123
PR(" core_flush %u\n",val("core_flush"));
usr.sbin/cxgbetool/tcbshowt6.c
125
val("nagle"), val("ssws_disabled"), val("turbo"));
usr.sbin/cxgbetool/tcbshowt6.c
126
PR(" tx_pdu_out %u\n",val("tx_pdu_out"));
usr.sbin/cxgbetool/tcbshowt6.c
128
val("tx_pace_auto"),val("tx_pace_fixed"),val("tx_queue"));
usr.sbin/cxgbetool/tcbshowt6.c
131
PR(" tx_quiesce %u\n",val("tx_quiesce"));
usr.sbin/cxgbetool/tcbshowt6.c
133
val("tx_channel"),
usr.sbin/cxgbetool/tcbshowt6.c
134
(val("tx_channel")>>1)&1,
usr.sbin/cxgbetool/tcbshowt6.c
135
val("tx_channel")&1
usr.sbin/cxgbetool/tcbshowt6.c
142
val("tx_hdr_ptr"),val("tx_last_ptr"),val("tx_compact"));
usr.sbin/cxgbetool/tcbshowt6.c
149
val("ts_last_ack_sent"),val("rx_compact"));
usr.sbin/cxgbetool/tcbshowt6.c
151
val("rcv_nxt"), val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt6.c
153
val("rx_frag0_start_idx"),
usr.sbin/cxgbetool/tcbshowt6.c
154
val("rx_frag0_len"),
usr.sbin/cxgbetool/tcbshowt6.c
155
val("rx_ptr"));
usr.sbin/cxgbetool/tcbshowt6.c
157
val("rx_frag1_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
158
val("rx_frag1_len"));
usr.sbin/cxgbetool/tcbshowt6.c
163
if (val("ulp_type")!=4) { /* RDMA has FRAG1 idx && len, but no ptr? Should I not display frag1 at all? */
usr.sbin/cxgbetool/tcbshowt6.c
164
PR("frag1_ptr 0x%-8x\n",val("rx_frag1_ptr"));
usr.sbin/cxgbetool/tcbshowt6.c
170
if (val("ulp_type") != 9 && val("ulp_type")!=8 && val("ulp_type") !=6 &&
usr.sbin/cxgbetool/tcbshowt6.c
171
val("ulp_type") != 5 && val("ulp_type") !=4) {
usr.sbin/cxgbetool/tcbshowt6.c
173
val("rx_frag2_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
174
val("rx_frag2_len"),
usr.sbin/cxgbetool/tcbshowt6.c
175
val("rx_frag2_ptr"));
usr.sbin/cxgbetool/tcbshowt6.c
177
val("rx_frag3_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
178
val("rx_frag3_len"),
usr.sbin/cxgbetool/tcbshowt6.c
179
val("rx_frag3_ptr"));
usr.sbin/cxgbetool/tcbshowt6.c
188
val("peer_fin"),val("rx_pdu_out"), val("pdu_len"));
usr.sbin/cxgbetool/tcbshowt6.c
193
if (val("recv_scale")) {
usr.sbin/cxgbetool/tcbshowt6.c
195
val("rcv_wnd"), val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt6.c
196
val("rcv_wnd") >> val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt6.c
197
val("recv_scale"));
usr.sbin/cxgbetool/tcbshowt6.c
200
val("rcv_wnd"), val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt6.c
201
val("recv_scale"));
usr.sbin/cxgbetool/tcbshowt6.c
208
val("dack_mss"),val("dack"),val("dack_not_acked"));
usr.sbin/cxgbetool/tcbshowt6.c
210
val("rcv_coalesce_enable"),
usr.sbin/cxgbetool/tcbshowt6.c
211
val("rcv_coalesce_push"),
usr.sbin/cxgbetool/tcbshowt6.c
212
val("rcv_coalesce_last_psh"),
usr.sbin/cxgbetool/tcbshowt6.c
213
val("rcv_coalesce_heartbeat"));
usr.sbin/cxgbetool/tcbshowt6.c
216
val("rx_channel"), val("rx_quiesce"),
usr.sbin/cxgbetool/tcbshowt6.c
217
val("rx_flow_control_disable"));
usr.sbin/cxgbetool/tcbshowt6.c
219
val("rx_flow_control_ddp"));
usr.sbin/cxgbetool/tcbshowt6.c
224
((val("pend_ctl2")<<2) | (val("pend_ctl1")<<1) |
usr.sbin/cxgbetool/tcbshowt6.c
225
val("pend_ctl0")),
usr.sbin/cxgbetool/tcbshowt6.c
226
val("core_bypass"),val("main_slush"));
usr.sbin/cxgbetool/tcbshowt6.c
228
val("migrating"),
usr.sbin/cxgbetool/tcbshowt6.c
229
val("ask_mode"), val("non_offload"), val("rss_info"));
usr.sbin/cxgbetool/tcbshowt6.c
231
val("ulp_type"), spr_ulp_type(val("ulp_type")),
usr.sbin/cxgbetool/tcbshowt6.c
232
val("ulp_raw"));
usr.sbin/cxgbetool/tcbshowt6.c
236
PR(", ulp_ext %u",val("ulp_ext"));
usr.sbin/cxgbetool/tcbshowt6.c
244
val("rdma_error"), val("rdma_flm_error"));
usr.sbin/cxgbetool/tcbshowt6.c
254
val("aux1_slush0"), val("aux1_slush1"));
usr.sbin/cxgbetool/tcbshowt6.c
255
PR(" pdu_hdr_len %u\n",val("pdu_hdr_len"));
usr.sbin/cxgbetool/tcbshowt6.c
267
val("qp_id"), val("pd_id"),val("stag"));
usr.sbin/cxgbetool/tcbshowt6.c
269
val("irs_ulp"),val("iss_ulp"));
usr.sbin/cxgbetool/tcbshowt6.c
271
val("tx_pdu_len"));
usr.sbin/cxgbetool/tcbshowt6.c
273
val("cq_idx_sq"),val("cq_idx_rq"));
usr.sbin/cxgbetool/tcbshowt6.c
275
val("rq_start"),val("rq_msn"),val("rq_max_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
276
val("rq_write_ptr"));
usr.sbin/cxgbetool/tcbshowt6.c
278
val("ord_l_bit_vld"),val("rdmap_opcode"));
usr.sbin/cxgbetool/tcbshowt6.c
280
val("tx_flush"),val("tx_oos_rxmt"),val("tx_oos_txmt"));
usr.sbin/cxgbetool/tcbshowt6.c
295
val("aux3_slush"),val("ddp_buf0_unused"),val("ddp_buf1_unused"));
usr.sbin/cxgbetool/tcbshowt6.c
299
val("ddp_indicate_fll"),val("tls_key_mode"));
usr.sbin/cxgbetool/tcbshowt6.c
304
val("ddp_off"),val("ddp_active_buf"),val("ddp_indicate_out"),
usr.sbin/cxgbetool/tcbshowt6.c
305
val("ddp_wait_frag"),val("ddp_rx2tx"),val("ddp_buf_inf")
usr.sbin/cxgbetool/tcbshowt6.c
311
val("ddp_buf0_indicate"),
usr.sbin/cxgbetool/tcbshowt6.c
312
val("ddp_pshf_enable_0"), val("ddp_push_disable_0"),
usr.sbin/cxgbetool/tcbshowt6.c
313
val("ddp_buf0_flush"), val("ddp_psh_no_invalidate0")
usr.sbin/cxgbetool/tcbshowt6.c
316
val("ddp_buf1_indicate"),
usr.sbin/cxgbetool/tcbshowt6.c
317
val("ddp_pshf_enable_1"), val("ddp_push_disable_1"),
usr.sbin/cxgbetool/tcbshowt6.c
318
val("ddp_buf1_flush"), val("ddp_psh_no_invalidate1")
usr.sbin/cxgbetool/tcbshowt6.c
332
val("ddp_buf0_valid"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
333
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_tag")
usr.sbin/cxgbetool/tcbshowt6.c
337
if (0==val("ddp_off") && 1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt6.c
345
val("ddp_buf1_valid"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
346
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_tag")
usr.sbin/cxgbetool/tcbshowt6.c
352
if (0==val("ddp_off") && 1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt6.c
363
if (1==val("ddp_off")) {
usr.sbin/cxgbetool/tcbshowt6.c
365
} else if (1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt6.c
368
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
369
val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset")
usr.sbin/cxgbetool/tcbshowt6.c
371
if (1==val("ddp_buf1_valid")) {
usr.sbin/cxgbetool/tcbshowt6.c
373
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
374
val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset")
usr.sbin/cxgbetool/tcbshowt6.c
377
} else if (1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt6.c
380
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
381
val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset")
usr.sbin/cxgbetool/tcbshowt6.c
383
if (1==val("ddp_buf0_valid")) {
usr.sbin/cxgbetool/tcbshowt6.c
385
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt6.c
386
val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset")
usr.sbin/cxgbetool/tcbshowt6.c
389
} else if (0==val("ddp_buf0_valid") && 1==val("ddp_buf1_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt6.c
391
} else if (1==val("ddp_buf0_valid") && 0==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt6.c
399
if (0==val("ddp_indicate_out")) {
usr.sbin/cxgbetool/tcbshowt6.c
400
if (0==val("ddp_buf0_indicate") && 0==val("ddp_buf1_indicate")) {
usr.sbin/cxgbetool/tcbshowt6.c
402
if (0==val("rx_hdr_offset")) {
usr.sbin/cxgbetool/tcbshowt6.c
406
val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt6.c
411
} else if (1==val("ddp_indicate_out")) {
usr.sbin/cxgbetool/tcbshowt6.c
413
if (0==val("rx_hdr_offset")) {
usr.sbin/cxgbetool/tcbshowt6.c
417
val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt6.c
432
val("rx_tls_buf_offset"),val("rx_tls_buf_len"),
usr.sbin/cxgbetool/tcbshowt6.c
433
val("rx_tls_flags"));
usr.sbin/cxgbetool/tcbshowt6.c
436
val("rx_tls_buf_tag"),val("rx_tls_key_tag"));
usr.sbin/cxgbetool/tcbshowt6.c
46
spr_tcp_state(val("t_state")),
usr.sbin/cxgbetool/tcbshowt6.c
47
val("t_state"),
usr.sbin/cxgbetool/tcbshowt6.c
48
spr_ip_version(val("ip_version")),
usr.sbin/cxgbetool/tcbshowt6.c
49
val("lock_tid"),
usr.sbin/cxgbetool/tcbshowt6.c
50
val("rss_fw")
usr.sbin/cxgbetool/tcbshowt6.c
53
val("l2t_ix"),
usr.sbin/cxgbetool/tcbshowt6.c
54
val("smac_sel"),
usr.sbin/cxgbetool/tcbshowt6.c
55
val("tos")
usr.sbin/cxgbetool/tcbshowt6.c
58
val("t_maxseg"), val("recv_scale"),
usr.sbin/cxgbetool/tcbshowt6.c
59
val("recv_tstmp"), val("recv_sack"));
usr.sbin/cxgbetool/tcbshowt6.c
64
val("timer"), val("dack_timer"));
usr.sbin/cxgbetool/tcbshowt6.c
66
val("mod_schd_tx"),
usr.sbin/cxgbetool/tcbshowt6.c
67
val("mod_schd_rx"),
usr.sbin/cxgbetool/tcbshowt6.c
68
((val("mod_schd_reason2")<<2) | (val("mod_schd_reason1")<<1) |
usr.sbin/cxgbetool/tcbshowt6.c
69
val("mod_schd_reason0"))
usr.sbin/cxgbetool/tcbshowt6.c
74
val("max_rt"), val("t_rxtshift"),
usr.sbin/cxgbetool/tcbshowt6.c
75
val("keepalive"));
usr.sbin/cxgbetool/tcbshowt6.c
77
val("timestamp_offset"),val("timestamp"));
usr.sbin/cxgbetool/tcbshowt6.c
81
val("t_rtt_ts_recent_age"), val("t_rtseq_recent"));
usr.sbin/cxgbetool/tcbshowt6.c
83
val("t_srtt"),val("t_rttvar"));
usr.sbin/cxgbetool/tcbshowt6.c
92
val("snd_una"),val("snd_nxt"),
usr.sbin/cxgbetool/tcbshowt6.c
93
val("snd_max"),val("tx_max"));
usr.sbin/cxgbetool/tcbshowt6.c
95
val("core_fin"), SEQ_SUB(val("tx_max"),val("snd_una"))
usr.sbin/cxgbetool/tcbshowt6.c
97
if (val("recv_scale") && !val("active_open")) {
usr.sbin/cxgbetool/tcbshowt6.c
99
val("rcv_adv"), val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt7.c
100
val("tx_pace_auto"),val("tx_pace_fixed"),val("tx_queue"));
usr.sbin/cxgbetool/tcbshowt7.c
103
PR(" tx_quiesce %u\n",val("tx_quiesce"));
usr.sbin/cxgbetool/tcbshowt7.c
105
val("channel"),
usr.sbin/cxgbetool/tcbshowt7.c
106
val("channel_msb")
usr.sbin/cxgbetool/tcbshowt7.c
113
val("tx_hdr_ptr"),val("tx_last_ptr"),val("tx_compact"));
usr.sbin/cxgbetool/tcbshowt7.c
120
val("ts_last_ack_sent"),val("rx_compact"));
usr.sbin/cxgbetool/tcbshowt7.c
122
val("rcv_nxt"), val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt7.c
124
val("rx_frag0_start_idx"),
usr.sbin/cxgbetool/tcbshowt7.c
125
val("rx_frag0_len"),
usr.sbin/cxgbetool/tcbshowt7.c
126
val("rx_ptr"));
usr.sbin/cxgbetool/tcbshowt7.c
128
val("rx_frag1_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
129
val("rx_frag1_len"));
usr.sbin/cxgbetool/tcbshowt7.c
134
if (val("ulp_type")!=4 && val("ulp_type")!=7) { /* RDMA has FRAG1 idx && len, but no ptr? Should I not display frag1 at all? */
usr.sbin/cxgbetool/tcbshowt7.c
135
PR("frag1_ptr 0x%-8x\n",val("rx_frag1_ptr"));
usr.sbin/cxgbetool/tcbshowt7.c
141
if (val("ulp_type") != 9 && val("ulp_type")!=8 && val("ulp_type") !=6 &&
usr.sbin/cxgbetool/tcbshowt7.c
142
val("ulp_type") != 5 && val("ulp_type") !=4 && val("ulp_type") !=7) {
usr.sbin/cxgbetool/tcbshowt7.c
144
val("rx_frag2_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
145
val("rx_frag2_len"),
usr.sbin/cxgbetool/tcbshowt7.c
146
val("rx_frag2_ptr"));
usr.sbin/cxgbetool/tcbshowt7.c
148
val("rx_frag3_start_idx_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
149
val("rx_frag3_len"),
usr.sbin/cxgbetool/tcbshowt7.c
150
val("rx_frag3_ptr"));
usr.sbin/cxgbetool/tcbshowt7.c
159
val("peer_fin"),val("rx_pdu_out"), val("pdu_len"));
usr.sbin/cxgbetool/tcbshowt7.c
164
if (val("recv_scale")) {
usr.sbin/cxgbetool/tcbshowt7.c
166
val("rcv_wnd"), val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt7.c
167
val("rcv_wnd") >> val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt7.c
168
val("recv_scale"));
usr.sbin/cxgbetool/tcbshowt7.c
171
val("rcv_wnd"), val("snd_scale"),
usr.sbin/cxgbetool/tcbshowt7.c
172
val("recv_scale"));
usr.sbin/cxgbetool/tcbshowt7.c
179
val("dack_mss"),val("dack"),val("dack_not_acked"));
usr.sbin/cxgbetool/tcbshowt7.c
18
spr_tcp_state(val("t_state")),
usr.sbin/cxgbetool/tcbshowt7.c
181
val("rcv_coalesce_enable"),
usr.sbin/cxgbetool/tcbshowt7.c
182
val("rcv_coalesce_push"),
usr.sbin/cxgbetool/tcbshowt7.c
183
val("rcv_coalesce_last_psh"),
usr.sbin/cxgbetool/tcbshowt7.c
184
val("rcv_coalesce_heartbeat"));
usr.sbin/cxgbetool/tcbshowt7.c
187
val("rx_quiesce"),
usr.sbin/cxgbetool/tcbshowt7.c
188
val("rx_flow_control_disable"));
usr.sbin/cxgbetool/tcbshowt7.c
19
val("t_state"),
usr.sbin/cxgbetool/tcbshowt7.c
190
val("rx_flow_control_ddp"));
usr.sbin/cxgbetool/tcbshowt7.c
195
((val("pend_ctl2")<<2) | (val("pend_ctl1")<<1) |
usr.sbin/cxgbetool/tcbshowt7.c
196
val("pend_ctl0")),
usr.sbin/cxgbetool/tcbshowt7.c
197
val("core_bypass"),val("main_slush"));
usr.sbin/cxgbetool/tcbshowt7.c
199
val("migrating"),
usr.sbin/cxgbetool/tcbshowt7.c
20
spr_ip_version(val("ip_version")),
usr.sbin/cxgbetool/tcbshowt7.c
200
val("ask_mode"), val("non_offload"), val("rss_info"));
usr.sbin/cxgbetool/tcbshowt7.c
202
val("ulp_type"), spr_ulp_type(val("ulp_type")),
usr.sbin/cxgbetool/tcbshowt7.c
203
val("ulp_raw"));
usr.sbin/cxgbetool/tcbshowt7.c
207
PR(", ulp_ext %u",val("ulp_ext"));
usr.sbin/cxgbetool/tcbshowt7.c
21
val("lock_tid"),
usr.sbin/cxgbetool/tcbshowt7.c
215
val("rdma_error"), val("rdma_flm_error"));
usr.sbin/cxgbetool/tcbshowt7.c
22
val("rss_fw")
usr.sbin/cxgbetool/tcbshowt7.c
225
val("aux1_slush0"), val("aux1_slush1"));
usr.sbin/cxgbetool/tcbshowt7.c
226
PR(" pdu_hdr_len %u\n",val("pdu_hdr_len"));
usr.sbin/cxgbetool/tcbshowt7.c
238
val("qp_id"), val("pd_id"),val("stag"));
usr.sbin/cxgbetool/tcbshowt7.c
240
val("irs_ulp"),val("iss_ulp"));
usr.sbin/cxgbetool/tcbshowt7.c
242
val("tx_pdu_len"));
usr.sbin/cxgbetool/tcbshowt7.c
244
val("cq_idx_sq"),val("cq_idx_rq"));
usr.sbin/cxgbetool/tcbshowt7.c
246
val("rq_start"),val("rq_msn"),val("rq_max_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
247
val("rq_write_ptr"));
usr.sbin/cxgbetool/tcbshowt7.c
249
val("ord_l_bit_vld"),val("rdmap_opcode"));
usr.sbin/cxgbetool/tcbshowt7.c
25
val("l2t_ix"),
usr.sbin/cxgbetool/tcbshowt7.c
251
val("tx_flush"),val("tx_oos_rxmt"),val("tx_oos_txmt"));
usr.sbin/cxgbetool/tcbshowt7.c
26
val("smac_sel"),
usr.sbin/cxgbetool/tcbshowt7.c
266
val("aux3_slush"),val("ddp_buf0_unused"),val("ddp_buf1_unused"));
usr.sbin/cxgbetool/tcbshowt7.c
27
val("tos")
usr.sbin/cxgbetool/tcbshowt7.c
270
val("ddp_indicate_fll"),val("tls_key_mode"));
usr.sbin/cxgbetool/tcbshowt7.c
275
val("ddp_off"),val("ddp_active_buf"),val("ddp_indicate_out"),
usr.sbin/cxgbetool/tcbshowt7.c
276
val("ddp_wait_frag"),val("ddp_rx2tx"),val("ddp_buf_inf")
usr.sbin/cxgbetool/tcbshowt7.c
282
val("ddp_buf0_indicate"),
usr.sbin/cxgbetool/tcbshowt7.c
283
val("ddp_pshf_enable_0"), val("ddp_push_disable_0"),
usr.sbin/cxgbetool/tcbshowt7.c
284
val("ddp_buf0_flush"), val("ddp_psh_no_invalidate0")
usr.sbin/cxgbetool/tcbshowt7.c
287
val("ddp_buf1_indicate"),
usr.sbin/cxgbetool/tcbshowt7.c
288
val("ddp_pshf_enable_1"), val("ddp_push_disable_1"),
usr.sbin/cxgbetool/tcbshowt7.c
289
val("ddp_buf1_flush"), val("ddp_psh_no_invalidate1")
usr.sbin/cxgbetool/tcbshowt7.c
30
val("t_maxseg"), val("recv_scale"),
usr.sbin/cxgbetool/tcbshowt7.c
303
val("ddp_buf0_valid"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
304
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_tag")
usr.sbin/cxgbetool/tcbshowt7.c
308
if (0==val("ddp_off") && 1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt7.c
31
val("recv_tstmp"), val("recv_sack"));
usr.sbin/cxgbetool/tcbshowt7.c
316
val("ddp_buf1_valid"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
317
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_tag")
usr.sbin/cxgbetool/tcbshowt7.c
323
if (0==val("ddp_off") && 1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt7.c
334
if (1==val("ddp_off")) {
usr.sbin/cxgbetool/tcbshowt7.c
336
} else if (1==val("ddp_buf0_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt7.c
339
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
340
val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset")
usr.sbin/cxgbetool/tcbshowt7.c
342
if (1==val("ddp_buf1_valid")) {
usr.sbin/cxgbetool/tcbshowt7.c
344
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
345
val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset")
usr.sbin/cxgbetool/tcbshowt7.c
348
} else if (1==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt7.c
351
val("rx_ddp_buf1_len"),val("rx_ddp_buf1_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
352
val("rx_ddp_buf1_len")-val("rx_ddp_buf1_offset")
usr.sbin/cxgbetool/tcbshowt7.c
354
if (1==val("ddp_buf0_valid")) {
usr.sbin/cxgbetool/tcbshowt7.c
356
val("rx_ddp_buf0_len"),val("rx_ddp_buf0_offset"),
usr.sbin/cxgbetool/tcbshowt7.c
357
val("rx_ddp_buf0_len")-val("rx_ddp_buf0_offset")
usr.sbin/cxgbetool/tcbshowt7.c
36
val("timer"), val("dack_timer"));
usr.sbin/cxgbetool/tcbshowt7.c
360
} else if (0==val("ddp_buf0_valid") && 1==val("ddp_buf1_valid") && 0==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt7.c
362
} else if (1==val("ddp_buf0_valid") && 0==val("ddp_buf1_valid") && 1==val("ddp_active_buf")) {
usr.sbin/cxgbetool/tcbshowt7.c
370
if (0==val("ddp_indicate_out")) {
usr.sbin/cxgbetool/tcbshowt7.c
371
if (0==val("ddp_buf0_indicate") && 0==val("ddp_buf1_indicate")) {
usr.sbin/cxgbetool/tcbshowt7.c
373
if (0==val("rx_hdr_offset")) {
usr.sbin/cxgbetool/tcbshowt7.c
377
val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt7.c
38
val("mod_schd_tx"),
usr.sbin/cxgbetool/tcbshowt7.c
382
} else if (1==val("ddp_indicate_out")) {
usr.sbin/cxgbetool/tcbshowt7.c
384
if (0==val("rx_hdr_offset")) {
usr.sbin/cxgbetool/tcbshowt7.c
388
val("rx_hdr_offset"));
usr.sbin/cxgbetool/tcbshowt7.c
39
val("mod_schd_rx"),
usr.sbin/cxgbetool/tcbshowt7.c
40
((val("mod_schd_reason2")<<2) | (val("mod_schd_reason1")<<1) |
usr.sbin/cxgbetool/tcbshowt7.c
403
val("rx_tls_buf_offset"),val("rx_tls_buf_len"),
usr.sbin/cxgbetool/tcbshowt7.c
404
val("rx_tls_flags"));
usr.sbin/cxgbetool/tcbshowt7.c
407
val("rx_tls_buf_tag"),val("rx_tls_key_tag"));
usr.sbin/cxgbetool/tcbshowt7.c
41
val("mod_schd_reason0"))
usr.sbin/cxgbetool/tcbshowt7.c
46
val("max_rt"), val("t_rxtshift"),
usr.sbin/cxgbetool/tcbshowt7.c
47
val("keepalive"));
usr.sbin/cxgbetool/tcbshowt7.c
49
val("timestamp_offset"),val("timestamp"));
usr.sbin/cxgbetool/tcbshowt7.c
53
val("t_rtt_ts_recent_age"), val("t_rtseq_recent"));
usr.sbin/cxgbetool/tcbshowt7.c
55
val("t_srtt"),val("t_rttvar"));
usr.sbin/cxgbetool/tcbshowt7.c
64
val("snd_una"),val("snd_nxt"),
usr.sbin/cxgbetool/tcbshowt7.c
65
val("snd_max"),val("tx_max"));
usr.sbin/cxgbetool/tcbshowt7.c
67
val("core_fin"), SEQ_SUB(val("tx_max"),val("snd_una"))
usr.sbin/cxgbetool/tcbshowt7.c
69
if (val("recv_scale") && !val("active_open")) {
usr.sbin/cxgbetool/tcbshowt7.c
71
val("rcv_adv"), val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt7.c
72
val("rcv_adv") << val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt7.c
73
val("recv_scale"), val("rcv_scale"), val("active_open"));
usr.sbin/cxgbetool/tcbshowt7.c
76
val("rcv_adv"), val("rcv_scale"),
usr.sbin/cxgbetool/tcbshowt7.c
77
val("recv_scale"), val("active_open"));
usr.sbin/cxgbetool/tcbshowt7.c
81
val("snd_cwnd") , val("snd_ssthresh"), val("snd_rec")
usr.sbin/cxgbetool/tcbshowt7.c
88
spr_cctrl_sel(val("cctrl_sel0"),val("cctrl_sel1")),
usr.sbin/cxgbetool/tcbshowt7.c
89
val("cctrl_ecn"), val("cctrl_ece"), val("cctrl_cwr"),
usr.sbin/cxgbetool/tcbshowt7.c
90
val("cctrl_rfr"));
usr.sbin/cxgbetool/tcbshowt7.c
92
val("t_dupacks"), val("dupack_count_odd"),val("fast_recovery"));
usr.sbin/cxgbetool/tcbshowt7.c
94
val("core_more"),val("core_urg"),val("core_push"));
usr.sbin/cxgbetool/tcbshowt7.c
95
PR(" core_flush %u\n",val("core_flush"));
usr.sbin/cxgbetool/tcbshowt7.c
97
val("nagle"), val("ssws_disabled"), val("turbo"));
usr.sbin/cxgbetool/tcbshowt7.c
98
PR(" tx_pdu_out %u\n",val("tx_pdu_out"));
usr.sbin/dconschat/dconschat.c
288
printf("%d %02x %06x\n", state, reg->key, reg->val);
usr.sbin/dconschat/dconschat.c
292
reg->val == CSRVAL_VENDOR_PRIVATE)
usr.sbin/dconschat/dconschat.c
297
reg->val == DCONS_CSR_VAL_VER)
usr.sbin/dconschat/dconschat.c
303
hi = reg->val;
usr.sbin/dconschat/dconschat.c
306
lo = reg->val;
usr.sbin/dconschat/dconschat.c
309
reset_hi = reg->val;
usr.sbin/dconschat/dconschat.c
312
reset_lo = reg->val;
usr.sbin/devinfo/devinfo.c
303
const char *cp, *val;
usr.sbin/devinfo/devinfo.c
320
val = name + strlen("pci");
usr.sbin/devinfo/devinfo.c
321
if (match_value(cp, val))
usr.sbin/devinfo/devinfo.c
326
match_value(cp + strlen("0:"), val))
usr.sbin/efibootmgr/efibootmgr.c
435
uint16_t val;
usr.sbin/efibootmgr/efibootmgr.c
438
val = strtoul(&bootvar[4], NULL, 16);
usr.sbin/efibootmgr/efibootmgr.c
458
le16enc(new, val);
usr.sbin/efibootmgr/efibootmgr.c
881
os_indications_set(uint64_t mask, uint64_t val)
usr.sbin/efibootmgr/efibootmgr.c
885
le64enc(&new, (os_indications() & ~mask) | (val & mask));
usr.sbin/efivar/efivar.c
139
get_value(char *val, size_t *datalen)
usr.sbin/efivar/efivar.c
143
if (val != NULL) {
usr.sbin/efivar/efivar.c
144
*datalen = strlen(val);
usr.sbin/efivar/efivar.c
145
return ((uint8_t *)val);
usr.sbin/efivar/efivar.c
154
append_variable(char *name, char *val)
usr.sbin/efivar/efivar.c
162
data = get_value(val, &datalen);
usr.sbin/efivar/efivar.c
179
write_variable(char *name, char *val)
usr.sbin/efivar/efivar.c
187
data = get_value(val, &datalen);
usr.sbin/fwcontrol/fwcontrol.c
443
printf("vendor ID: 0x%06x\n", reg->val);
usr.sbin/fwcontrol/fwcontrol.c
478
reg->key & CSRKEY_MASK, reg->val,
usr.sbin/fwcontrol/fwcontrol.c
659
sysctl_set_int(const char *name, int val)
usr.sbin/fwcontrol/fwcontrol.c
661
if (sysctlbyname(name, NULL, NULL, &val, sizeof(int)) < 0)
usr.sbin/inetd/inetd.c
1867
u_long val;
usr.sbin/inetd/inetd.c
1869
val = strtoul(s + 1, &eptr, 10);
usr.sbin/inetd/inetd.c
1870
if (eptr == s + 1 || val > MAX_MAXCHLD) {
usr.sbin/inetd/inetd.c
1877
if (!sep->se_accept && val != 1)
usr.sbin/inetd/inetd.c
1879
" not recommended", val, sep->se_service);
usr.sbin/inetd/inetd.c
1880
sep->se_maxchild = val;
usr.sbin/iovctl/parse.c
101
uval = val;
usr.sbin/iovctl/parse.c
116
const char *val, *token;
usr.sbin/iovctl/parse.c
122
if (!ucl_object_tostring_safe(obj, &val))
usr.sbin/iovctl/parse.c
125
parse = strdup(val);
usr.sbin/iovctl/parse.c
166
int64_t val;
usr.sbin/iovctl/parse.c
177
if (!ucl_object_toint_safe(obj, &val))
usr.sbin/iovctl/parse.c
180
if (val < 0 || val > 4095)
usr.sbin/iovctl/parse.c
183
nvlist_add_number(config, key, val);
usr.sbin/iovctl/parse.c
60
bool val;
usr.sbin/iovctl/parse.c
62
if (!ucl_object_toboolean_safe(obj, &val))
usr.sbin/iovctl/parse.c
65
nvlist_add_bool(config, key, val);
usr.sbin/iovctl/parse.c
75
const char *val;
usr.sbin/iovctl/parse.c
77
if (!ucl_object_tostring_safe(obj, &val))
usr.sbin/iovctl/parse.c
80
nvlist_add_string(config, key, val);
usr.sbin/iovctl/parse.c
91
int64_t val;
usr.sbin/iovctl/parse.c
95
if (!ucl_object_toint_safe(obj, &val))
usr.sbin/iovctl/parse.c
98
if (val < 0)
usr.sbin/jail/command.c
149
? TAILQ_LAST(&j->intparams[comparam]->val,
usr.sbin/jail/command.c
151
: TAILQ_FIRST(&j->intparams[comparam]->val);
usr.sbin/jail/command.c
301
char *addr, *extrap, *p, *val;
usr.sbin/jail/command.c
370
val = alloca(strlen(comstring->s) + 1);
usr.sbin/jail/command.c
371
strcpy(val, comstring->s);
usr.sbin/jail/command.c
372
cs = val;
usr.sbin/jail/command.c
385
if ((cs = strchr(val, '|'))) {
usr.sbin/jail/command.c
386
argv[1] = acs = alloca(cs - val + 1);
usr.sbin/jail/command.c
387
strlcpy(acs, val, cs - val + 1);
usr.sbin/jail/command.c
391
addr = val;
usr.sbin/jail/command.c
427
val = alloca(strlen(comstring->s) + 1);
usr.sbin/jail/command.c
428
strcpy(val, comstring->s);
usr.sbin/jail/command.c
429
cs = val;
usr.sbin/jail/command.c
442
if ((cs = strchr(val, '|'))) {
usr.sbin/jail/command.c
443
argv[1] = acs = alloca(cs - val + 1);
usr.sbin/jail/command.c
444
strlcpy(acs, val, cs - val + 1);
usr.sbin/jail/command.c
448
addr = val;
usr.sbin/jail/command.c
638
TAILQ_FOREACH(s, &j->intparams[IP_COMMAND]->val, tq)
usr.sbin/jail/command.c
642
TAILQ_FOREACH(s, &j->intparams[IP_COMMAND]->val, tq)
usr.sbin/jail/config.c
199
TAILQ_FOREACH(s, &p->val, tq) {
usr.sbin/jail/config.c
204
if (!vp || TAILQ_EMPTY(&vp->val)) {
usr.sbin/jail/config.c
222
TAILQ_FOREACH(vs, &vp->val, tq)
usr.sbin/jail/config.c
231
vs = TAILQ_FIRST(&vp->val);
usr.sbin/jail/config.c
254
TAILQ_INSERT_AFTER(&p->val, s, ns, tq);
usr.sbin/jail/config.c
388
TAILQ_FOREACH(s, &p->val, tq) {
usr.sbin/jail/config.c
451
TAILQ_CONCAT(&dp->val, &nss, tq);
usr.sbin/jail/config.c
457
TAILQ_INIT(&np->val);
usr.sbin/jail/config.c
458
TAILQ_CONCAT(&np->val, &nss, tq);
usr.sbin/jail/config.c
496
(TAILQ_EMPTY(&p->val) ||
usr.sbin/jail/config.c
497
!strcasecmp(TAILQ_LAST(&p->val, cfstrings)->s, "true") ||
usr.sbin/jail/config.c
498
(strtol(TAILQ_LAST(&p->val, cfstrings)->s, NULL, 10)));
usr.sbin/jail/config.c
507
if (p == NULL || TAILQ_EMPTY(&p->val))
usr.sbin/jail/config.c
509
*ip = strtol(TAILQ_LAST(&p->val, cfstrings)->s, NULL, 10);
usr.sbin/jail/config.c
519
return (p && !TAILQ_EMPTY(&p->val)
usr.sbin/jail/config.c
520
? TAILQ_LAST(&p->val, cfstrings)->s : NULL);
usr.sbin/jail/config.c
533
const char *val;
usr.sbin/jail/config.c
557
if (!TAILQ_EMPTY(&p->val) && (p->flags & (PF_BOOL | PF_INT))) {
usr.sbin/jail/config.c
558
val = TAILQ_LAST(&p->val, cfstrings)->s;
usr.sbin/jail/config.c
560
if (strcasecmp(val, "false") &&
usr.sbin/jail/config.c
561
strcasecmp(val, "true") &&
usr.sbin/jail/config.c
562
((void)strtol(val, &ep, 10), *ep)) {
usr.sbin/jail/config.c
565
p->name, val);
usr.sbin/jail/config.c
569
(void)strtol(val, &ep, 10);
usr.sbin/jail/config.c
570
if (ep == val || *ep) {
usr.sbin/jail/config.c
573
p->name, val);
usr.sbin/jail/config.c
676
TAILQ_FOREACH(s, &j->intparams[KP_IP4_ADDR]->val, tq) {
usr.sbin/jail/config.c
697
TAILQ_FOREACH(s, &j->intparams[KP_IP6_ADDR]->val, tq) {
usr.sbin/jail/config.c
723
TAILQ_FOREACH(s, &j->intparams[IP_MOUNT_FSTAB]->val, tq) {
usr.sbin/jail/config.c
782
if (TAILQ_EMPTY(&p->val))
usr.sbin/jail/config.c
785
!TAILQ_NEXT(TAILQ_FIRST(&p->val), tq)) {
usr.sbin/jail/config.c
792
value = TAILQ_LAST(&p->val, cfstrings)->s;
usr.sbin/jail/config.c
799
TAILQ_FOREACH(s, &p->val, tq)
usr.sbin/jail/config.c
803
TAILQ_FOREACH_SAFE(s, &p->val, tq, ts) {
usr.sbin/jail/config.c
909
while ((s = TAILQ_FIRST(&p->val))) {
usr.sbin/jail/config.c
916
TAILQ_REMOVE(&p->val, s, tq);
usr.sbin/jail/jail.c
1021
if (p == NULL || TAILQ_EMPTY(&p->val))
usr.sbin/jail/jail.c
1025
TAILQ_FOREACH_SAFE(s, &p->val, tq, ts) {
usr.sbin/jail/jail.c
970
!TAILQ_EMPTY(&j->intparams[KP_IP4_ADDR]->val) &&
usr.sbin/jail/jail.c
972
!TAILQ_EMPTY(&j->intparams[KP_IP6_ADDR]->val))
usr.sbin/jail/jailp.h
165
struct cfstrings val;
usr.sbin/jail/jailparse.y
130
TAILQ_CONCAT(&$$->val, $3, tq);
usr.sbin/jail/jailparse.y
136
TAILQ_CONCAT(&$$->val, $3, tq);
usr.sbin/jail/jailparse.y
143
TAILQ_CONCAT(&$$->val, $2, tq);
usr.sbin/jail/jailparse.y
158
TAILQ_INIT(&$$->val);
usr.sbin/jail/jailparse.y
165
TAILQ_INIT(&$$->val);
usr.sbin/jail/jailparse.y
262
TAILQ_FOREACH(s, &p->val, tq) {
usr.sbin/jail/state.c
72
TAILQ_FOREACH(s, &p->val, tq) {
usr.sbin/jail/state.c
99
TAILQ_FOREACH(s, &p->val, tq) {
usr.sbin/kbdcontrol/kbdcontrol.c
409
int val = value & ~SPECIAL;
usr.sbin/kbdcontrol/kbdcontrol.c
504
if (val >= F_FN && val <= L_FN)
usr.sbin/kbdcontrol/kbdcontrol.c
505
fprintf(fp, " fkey%02d", val - F_FN + 1);
usr.sbin/kbdcontrol/kbdcontrol.c
506
else if (val >= F_SCR && val <= L_SCR)
usr.sbin/kbdcontrol/kbdcontrol.c
507
fprintf(fp, " scr%02d ", val - F_SCR + 1);
usr.sbin/kbdcontrol/kbdcontrol.c
508
else if (val >= F_ACC && val <= L_ACC)
usr.sbin/kbdcontrol/kbdcontrol.c
509
fprintf(fp, " %-6s", acc_names[val - F_ACC]);
usr.sbin/kbdcontrol/kbdcontrol.c
511
fprintf(fp, " 0x%02x ", val);
usr.sbin/kbdcontrol/kbdcontrol.c
513
fprintf(fp, " %3d ", val);
usr.sbin/kbdcontrol/kbdcontrol.c
516
if (val < ' ')
usr.sbin/kbdcontrol/kbdcontrol.c
517
fprintf(fp, " %s ", ctrl_names[val]);
usr.sbin/kbdcontrol/kbdcontrol.c
518
else if (val == 127)
usr.sbin/kbdcontrol/kbdcontrol.c
520
else if (isascii(val) && isprint(val))
usr.sbin/kbdcontrol/kbdcontrol.c
521
fprintf(fp, " '%c' ", val);
usr.sbin/kbdcontrol/kbdcontrol.c
523
fprintf(fp, " 0x%02x ", val);
usr.sbin/kbdcontrol/kbdcontrol.c
525
fprintf(fp, " %3d ", val);
usr.sbin/kldxref/kldxref.c
144
record_int(int val)
usr.sbin/kldxref/kldxref.c
150
le32enc(buf, val);
usr.sbin/kldxref/kldxref.c
152
be32enc(buf, val);
usr.sbin/kldxref/kldxref.c
166
u_char val;
usr.sbin/kldxref/kldxref.c
170
val = len = strlen(str);
usr.sbin/kldxref/kldxref.c
173
error = record_buf(&val, sizeof(val));
usr.sbin/kldxref/kldxref.c
57
#define check(val) if ((error = (val)) != 0) break
usr.sbin/kldxref/kldxref.c
84
write_int(int val)
usr.sbin/kldxref/kldxref.c
90
le32enc(buf, val);
usr.sbin/kldxref/kldxref.c
92
be32enc(buf, val);
usr.sbin/makefs/cd9660.c
317
cd9660_arguments_set_string(const char *val, const char *fieldtitle,
usr.sbin/makefs/cd9660.c
323
if (val == NULL)
usr.sbin/makefs/cd9660.c
325
else if ((len = strlen(val)) <= length) {
usr.sbin/makefs/cd9660.c
327
test = cd9660_valid_d_chars(val);
usr.sbin/makefs/cd9660.c
329
test = cd9660_valid_a_chars(val);
usr.sbin/makefs/cd9660.c
331
memcpy(dest, val, len);
usr.sbin/makefs/cd9660/cd9660_eltorito.c
552
uint8_t val;
usr.sbin/makefs/cd9660/cd9660_eltorito.c
558
val = 0x80; /* Bootable */
usr.sbin/makefs/cd9660/cd9660_eltorito.c
559
fwrite(&val, sizeof(val), 1, fd);
usr.sbin/makefs/cd9660/cd9660_eltorito.c
561
val = 0xff; /* CHS begin */
usr.sbin/makefs/cd9660/cd9660_eltorito.c
562
fwrite(&val, sizeof(val), 1, fd);
usr.sbin/makefs/cd9660/cd9660_eltorito.c
563
fwrite(&val, sizeof(val), 1, fd);
usr.sbin/makefs/cd9660/cd9660_eltorito.c
564
fwrite(&val, sizeof(val), 1, fd);
usr.sbin/makefs/cd9660/cd9660_eltorito.c
566
val = type; /* Part type */
usr.sbin/makefs/cd9660/cd9660_eltorito.c
567
fwrite(&val, sizeof(val), 1, fd);
usr.sbin/makefs/cd9660/cd9660_eltorito.c
569
val = 0xff; /* CHS end */
usr.sbin/makefs/cd9660/cd9660_eltorito.c
570
fwrite(&val, sizeof(val), 1, fd);
usr.sbin/makefs/cd9660/cd9660_eltorito.c
571
fwrite(&val, sizeof(val), 1, fd);
usr.sbin/makefs/cd9660/cd9660_eltorito.c
572
fwrite(&val, sizeof(val), 1, fd);
usr.sbin/makefs/ffs/mkfs.c
873
ilog2(int val)
usr.sbin/makefs/ffs/mkfs.c
878
if (1 << n == val)
usr.sbin/makefs/ffs/mkfs.c
880
errx(1, "%s: %d is not a power of 2", __func__, val);
usr.sbin/makefs/makefs.c
366
char *var, *val;
usr.sbin/makefs/makefs.c
372
for (val = var; *val; val++)
usr.sbin/makefs/makefs.c
373
if (*val == '=') {
usr.sbin/makefs/makefs.c
374
*val++ = '\0';
usr.sbin/makefs/makefs.c
377
retval = set_option_var(options, var, val, buf, len);
usr.sbin/makefs/makefs.c
383
set_option_var(const option_t *options, const char *var, const char *val,
usr.sbin/makefs/makefs.c
390
if (!*val) { \
usr.sbin/makefs/makefs.c
394
*(type *)options[i].value = (type)strsuftoll(options[i].desc, val, \
usr.sbin/makefs/makefs.c
408
strlcpy((void *)options[i].value, val, (size_t)
usr.sbin/makefs/makefs.c
412
s = estrdup(val);
usr.sbin/makefs/makefs.c
418
strlcpy(buf, val, len);
usr.sbin/makefs/makefs.c
430
val);
usr.sbin/makefs/mtree.c
465
intmax_t val;
usr.sbin/makefs/mtree.c
467
val = strtoimax(tok, &end, base);
usr.sbin/makefs/mtree.c
470
if (val < min || val > max)
usr.sbin/makefs/mtree.c
472
*res = val;
usr.sbin/makefs/zfs.c
115
char buf[BUFSIZ], *opt, *val;
usr.sbin/makefs/zfs.c
120
opt = val = estrdup(option);
usr.sbin/makefs/zfs.c
121
opt = strsep(&val, "=");
usr.sbin/makefs/zfs.c
123
if (val == NULL)
usr.sbin/makefs/zfs.c
131
dsdesc->params = estrdup(val);
usr.sbin/makefs/zfs/dsl.c
156
const char *val)
usr.sbin/makefs/zfs/dsl.c
161
if (val == NULL || val[0] == '\0')
usr.sbin/makefs/zfs/dsl.c
167
if (strcmp(val, "none") != 0) {
usr.sbin/makefs/zfs/dsl.c
168
if (val[0] != '/')
usr.sbin/makefs/zfs/dsl.c
169
errx(1, "mountpoint `%s' is not absolute", val);
usr.sbin/makefs/zfs/dsl.c
170
if (strcmp(val, zfs->rootpath) != 0 &&
usr.sbin/makefs/zfs/dsl.c
172
(strstr(val, zfs->rootpath) != val ||
usr.sbin/makefs/zfs/dsl.c
173
val[strlen(zfs->rootpath)] != '/')) {
usr.sbin/makefs/zfs/dsl.c
175
"the root path `%s'", val, zfs->rootpath);
usr.sbin/makefs/zfs/dsl.c
178
(void)nvlist_add_string(nvl, key, val);
usr.sbin/makefs/zfs/dsl.c
181
if (strcmp(val, "on") == 0)
usr.sbin/makefs/zfs/dsl.c
183
else if (strcmp(val, "off") == 0)
usr.sbin/makefs/zfs/dsl.c
186
errx(1, "invalid value `%s' for %s", val, key);
usr.sbin/makefs/zfs/dsl.c
188
if (strcmp(val, "noauto") == 0)
usr.sbin/makefs/zfs/dsl.c
190
else if (strcmp(val, "on") == 0)
usr.sbin/makefs/zfs/dsl.c
192
else if (strcmp(val, "off") == 0)
usr.sbin/makefs/zfs/dsl.c
195
errx(1, "invalid value `%s' for %s", val, key);
usr.sbin/makefs/zfs/dsl.c
221
if (strcmp(val, compression_algorithms[i].name) == 0) {
usr.sbin/makefs/zfs/dsl.c
228
errx(1, "invalid compression algorithm `%s'", val);
usr.sbin/makefs/zfs/dsl.c
310
char *key, *val;
usr.sbin/makefs/zfs/dsl.c
314
key = val = param;
usr.sbin/makefs/zfs/dsl.c
315
key = strsep(&val, "=");
usr.sbin/makefs/zfs/dsl.c
316
dsl_dir_set_prop(zfs, dir, key, val);
usr.sbin/makefs/zfs/dsl.c
502
uint64_t val;
usr.sbin/makefs/zfs/dsl.c
504
memcpy(&val, &nvdata->nv_data[0], sizeof(uint64_t));
usr.sbin/makefs/zfs/dsl.c
505
zap_add_uint64(dir->propszap, name, val);
usr.sbin/makefs/zfs/dsl.c
510
char *val;
usr.sbin/makefs/zfs/dsl.c
513
val = nvstring_get(nvstr);
usr.sbin/makefs/zfs/dsl.c
514
zap_add_string(dir->propszap, name, val);
usr.sbin/makefs/zfs/dsl.c
515
free(val);
usr.sbin/makefs/zfs/fs.c
234
fs_populate_attr(zfs_fs_t *fs, char *attrbuf, const void *val, uint16_t ind,
usr.sbin/makefs/zfs/fs.c
240
memcpy(attrbuf + fs->saoffs[ind], val, fs->satab[ind].size);
usr.sbin/makefs/zfs/fs.c
245
fs_populate_varszattr(zfs_fs_t *fs, char *attrbuf, const void *val,
usr.sbin/makefs/zfs/fs.c
252
memcpy(attrbuf + fs->saoffs[ind] + varoff, val, valsz);
usr.sbin/makefs/zfs/zap.c
132
const uint8_t *val)
usr.sbin/makefs/zfs/zap.c
154
memcpy(ent->valp, val, intcnt * intsz);
usr.sbin/makefs/zfs/zap.c
165
zap_add_uint64(zfs_zap_t *zap, const char *name, uint64_t val)
usr.sbin/makefs/zfs/zap.c
167
zap_add(zap, name, sizeof(uint64_t), 1, (uint8_t *)&val);
usr.sbin/makefs/zfs/zap.c
171
zap_add_uint64_self(zfs_zap_t *zap, uint64_t val)
usr.sbin/makefs/zfs/zap.c
175
(void)snprintf(name, sizeof(name), "%jx", (uintmax_t)val);
usr.sbin/makefs/zfs/zap.c
176
zap_add(zap, name, sizeof(uint64_t), 1, (uint8_t *)&val);
usr.sbin/makefs/zfs/zap.c
180
zap_add_string(zfs_zap_t *zap, const char *name, const char *val)
usr.sbin/makefs/zfs/zap.c
182
zap_add(zap, name, 1, strlen(val) + 1, (const uint8_t *)val);
usr.sbin/makefs/zfs/zap.c
246
const uint8_t *val)
usr.sbin/makefs/zfs/zap.c
253
for (uint16_t n, resid = sz; resid > 0; resid -= n, val += n, li++) {
usr.sbin/makefs/zfs/zap.c
259
memcpy(la->la_array, val, n);
usr.sbin/memcontrol/memcontrol.c
182
if (mrd[i].mr_flags & attrnames[j].val)
usr.sbin/memcontrol/memcontrol.c
238
mrd.mr_flags |= attrnames[i].val;
usr.sbin/memcontrol/memcontrol.c
44
int val;
usr.sbin/mfiutil/mfi_cmd.c
237
long val;
usr.sbin/mfiutil/mfi_cmd.c
241
val = strtol(name, &cp, 0);
usr.sbin/mfiutil/mfi_cmd.c
243
*target_id = val;
usr.sbin/mfiutil/mfi_drive.c
154
long val;
usr.sbin/mfiutil/mfi_drive.c
161
val = strtol(drive, &cp, 0);
usr.sbin/mfiutil/mfi_drive.c
163
if (val < 0 || val >= 0xffff)
usr.sbin/mfiutil/mfi_drive.c
165
*device_id = val;
usr.sbin/mfiutil/mfi_drive.c
176
val = strtol(cp, &cp, 0);
usr.sbin/mfiutil/mfi_drive.c
177
if (val < 0 || val > 0xff || *cp != ':')
usr.sbin/mfiutil/mfi_drive.c
179
encl = val;
usr.sbin/mfiutil/mfi_drive.c
188
val = strtol(cp, &cp, 0);
usr.sbin/mfiutil/mfi_drive.c
189
if (val < 0 || val > 0xff || *cp != '\0')
usr.sbin/mfiutil/mfi_drive.c
191
slot = val;
usr.sbin/mfiutil/mfi_evt.c
109
long val;
usr.sbin/mfiutil/mfi_evt.c
131
val = strtol(arg, &cp, 0);
usr.sbin/mfiutil/mfi_evt.c
132
if (*cp != '\0' || val < 0) {
usr.sbin/mfiutil/mfi_evt.c
136
*seq = val;
usr.sbin/mfiutil/mfi_evt.c
144
long val;
usr.sbin/mfiutil/mfi_evt.c
183
val = strtol(arg, &cp, 0);
usr.sbin/mfiutil/mfi_evt.c
184
if (*cp != '\0' || val < 0 || val > 0xffff) {
usr.sbin/mfiutil/mfi_evt.c
188
*locale = val;
usr.sbin/mfiutil/mfi_evt.c
196
long val;
usr.sbin/mfiutil/mfi_evt.c
226
val = strtol(arg, &cp, 0);
usr.sbin/mfiutil/mfi_evt.c
227
if (*cp != '\0' || val < -128 || val > 127) {
usr.sbin/mfiutil/mfi_evt.c
231
*class = val;
usr.sbin/mfiutil/mfi_evt.c
539
long val;
usr.sbin/mfiutil/mfi_evt.c
593
val = strtol(optarg, &cp, 0);
usr.sbin/mfiutil/mfi_evt.c
594
if (*cp != '\0' || val <= 0) {
usr.sbin/mfiutil/mfi_evt.c
599
num_events = val;
usr.sbin/mfiutil/mfi_flash.c
77
mbox_store_word(uint8_t *mbox, uint32_t val)
usr.sbin/mfiutil/mfi_flash.c
80
mbox[0] = val & 0xff;
usr.sbin/mfiutil/mfi_flash.c
81
mbox[1] = val >> 8 & 0xff;
usr.sbin/mfiutil/mfi_flash.c
82
mbox[2] = val >> 16 & 0xff;
usr.sbin/mfiutil/mfi_flash.c
83
mbox[3] = val >> 24;
usr.sbin/mfiutil/mfi_patrol.c
251
long val;
usr.sbin/mfiutil/mfi_patrol.c
270
val = strtol(av[2], &cp, 0);
usr.sbin/mfiutil/mfi_patrol.c
276
exec_freq = val;
usr.sbin/mfiutil/mfi_patrol.c
280
val = strtol(av[3], &cp, 0);
usr.sbin/mfiutil/mfi_patrol.c
281
if (*cp != '\0' || val < 0) {
usr.sbin/mfiutil/mfi_patrol.c
285
next_exec = val;
usr.sbin/mixer/mixer.c
350
const char *val;
usr.sbin/mixer/mixer.c
357
val = p;
usr.sbin/mixer/mixer.c
358
n = sscanf(val, "%7[^:]:%7s", lstr, rstr);
usr.sbin/mixer/mixer.c
360
warnx("invalid volume value: %s", val);
usr.sbin/mixer/mixer.c
425
const char *val;
usr.sbin/mixer/mixer.c
430
val = p;
usr.sbin/mixer/mixer.c
431
if (strncmp(val, "off", strlen(val)) == 0 ||
usr.sbin/mixer/mixer.c
432
strncmp(val, "0", strlen(val)) == 0)
usr.sbin/mixer/mixer.c
434
else if (strncmp(val, "on", strlen(val)) == 0 ||
usr.sbin/mixer/mixer.c
435
strncmp(val, "1", strlen(val)) == 0)
usr.sbin/mixer/mixer.c
437
else if (strncmp(val, "toggle", strlen(val)) == 0 ||
usr.sbin/mixer/mixer.c
438
strncmp(val, "^", strlen(val)) == 0)
usr.sbin/mixer/mixer.c
441
warnx("%s: no such modifier", val);
usr.sbin/mixer/mixer.c
446
warn("%s.%s=%s", m->dev->name, cp->name, val);
usr.sbin/mixer/mixer.c
461
const char *val;
usr.sbin/mixer/mixer.c
466
val = p;
usr.sbin/mixer/mixer.c
467
if (strncmp(val, "add", strlen(val)) == 0 ||
usr.sbin/mixer/mixer.c
468
strncmp(val, "+", strlen(val)) == 0)
usr.sbin/mixer/mixer.c
470
else if (strncmp(val, "remove", strlen(val)) == 0 ||
usr.sbin/mixer/mixer.c
471
strncmp(val, "-", strlen(val)) == 0)
usr.sbin/mixer/mixer.c
473
else if (strncmp(val, "set", strlen(val)) == 0 ||
usr.sbin/mixer/mixer.c
474
strncmp(val, "=", strlen(val)) == 0)
usr.sbin/mixer/mixer.c
476
else if (strncmp(val, "toggle", strlen(val)) == 0 ||
usr.sbin/mixer/mixer.c
477
strncmp(val, "^", strlen(val)) == 0)
usr.sbin/mixer/mixer.c
480
warnx("%s: no such modifier", val);
usr.sbin/mixer/mixer.c
485
warn("%s.%s=%s", m->dev->name, cp->name, val);
usr.sbin/mlx5tool/mlx5tool.c
116
fprintf(dump, "0x%08x\t0x%08x\n", rege->addr, rege->val);
usr.sbin/mountd/mountd.c
1734
fsb.f_fsid.val[0],
usr.sbin/mountd/mountd.c
1735
fsb.f_fsid.val[1]);
usr.sbin/mountd/mountd.c
1738
fsb.f_fsid.val[0],
usr.sbin/mountd/mountd.c
1739
fsb.f_fsid.val[1]);
usr.sbin/moused/moused/quirks.c
1864
quirks_get_int32(struct quirks *q, enum quirk which, int32_t *val)
usr.sbin/moused/moused/quirks.c
1876
*val = p->value.i;
usr.sbin/moused/moused/quirks.c
1882
quirks_get_uint32(struct quirks *q, enum quirk which, uint32_t *val)
usr.sbin/moused/moused/quirks.c
1894
*val = p->value.u;
usr.sbin/moused/moused/quirks.c
1900
quirks_get_double(struct quirks *q, enum quirk which, double *val)
usr.sbin/moused/moused/quirks.c
1912
*val = p->value.d;
usr.sbin/moused/moused/quirks.c
1918
quirks_get_string(struct quirks *q, enum quirk which, char **val)
usr.sbin/moused/moused/quirks.c
1930
*val = p->value.s;
usr.sbin/moused/moused/quirks.c
1936
quirks_get_bool(struct quirks *q, enum quirk which, bool *val)
usr.sbin/moused/moused/quirks.c
1948
*val = p->value.b;
usr.sbin/moused/moused/quirks.c
1956
struct quirk_dimensions *val)
usr.sbin/moused/moused/quirks.c
1968
*val = p->value.dim;
usr.sbin/moused/moused/quirks.c
1976
struct quirk_range *val)
usr.sbin/moused/moused/quirks.c
1988
*val = p->value.range;
usr.sbin/moused/moused/quirks.h
261
uint32_t *val);
usr.sbin/moused/moused/quirks.h
274
int32_t *val);
usr.sbin/moused/moused/quirks.h
287
double *val);
usr.sbin/moused/moused/quirks.h
303
char **val);
usr.sbin/moused/moused/quirks.h
316
bool *val);
usr.sbin/moused/moused/quirks.h
329
struct quirk_dimensions *val);
usr.sbin/moused/moused/quirks.h
342
struct quirk_range *val);
usr.sbin/moused/moused/util.c
405
int val = libevdev_property_from_name(s);
usr.sbin/moused/moused/util.c
406
if (val == -1)
usr.sbin/moused/moused/util.c
408
prop = (unsigned int)val;
usr.sbin/moused/moused/util.h
226
safe_atoi_base(const char *str, int *val, int base)
usr.sbin/moused/moused/util.h
247
*val = v;
usr.sbin/moused/moused/util.h
252
safe_atoi(const char *str, int *val)
usr.sbin/moused/moused/util.h
255
return safe_atoi_base(str, val, 10);
usr.sbin/moused/moused/util.h
259
safe_atou_base(const char *str, unsigned int *val, int base)
usr.sbin/moused/moused/util.h
280
*val = v;
usr.sbin/moused/moused/util.h
285
safe_atou(const char *str, unsigned int *val)
usr.sbin/moused/moused/util.h
288
return safe_atou_base(str, val, 10);
usr.sbin/moused/moused/util.h
292
safe_atod(const char *str, double *val)
usr.sbin/moused/moused/util.h
340
*val = v;
usr.sbin/moused/msconvd/msconvd.c
1019
rodent.mode.protocol = t->val;
usr.sbin/moused/msconvd/msconvd.c
123
int val;
usr.sbin/moused/msconvd/msconvd.c
2313
if (t->val != MOUSE_PROTO_UNKNOWN)
usr.sbin/moused/msconvd/msconvd.c
2329
if (t->val != MOUSE_PROTO_UNKNOWN)
usr.sbin/moused/msconvd/msconvd.c
2352
gettokenname(symtab_t *tab, int val)
usr.sbin/moused/msconvd/msconvd.c
2358
if (tab[i].val == val)
usr.sbin/moused/msconvd/msconvd.c
2365
gettokenval2(symtab_t *tab, int val)
usr.sbin/moused/msconvd/msconvd.c
2370
if (tab[i].val == val)
usr.sbin/moused/msconvd/msconvd.c
415
static const char *gettokenname(symtab_t *tab, int val);
usr.sbin/moused/msconvd/msconvd.c
416
static int gettokenval2(symtab_t *tab, int val);
usr.sbin/mptutil/mpt_drive.c
259
long val;
usr.sbin/mptutil/mpt_drive.c
264
val = strtol(drive, &cp, 0);
usr.sbin/mptutil/mpt_drive.c
266
if (val < 0 || val > 0xff)
usr.sbin/mptutil/mpt_drive.c
268
*PhysDiskNum = val;
usr.sbin/mptutil/mpt_drive.c
274
if (val < 0 || val > 0xff)
usr.sbin/mptutil/mpt_drive.c
276
bus = val;
usr.sbin/mptutil/mpt_drive.c
277
val = strtol(cp + 1, &cp, 0);
usr.sbin/mptutil/mpt_drive.c
280
if (val < 0 || val > 0xff)
usr.sbin/mptutil/mpt_drive.c
282
id = val;
usr.sbin/mptutil/mpt_drive.c
284
for (val = 0; val < list->ndrives; val++) {
usr.sbin/mptutil/mpt_drive.c
285
if (list->drives[val]->PhysDiskBus == bus &&
usr.sbin/mptutil/mpt_drive.c
286
list->drives[val]->PhysDiskID == id) {
usr.sbin/mptutil/mpt_drive.c
287
*PhysDiskNum = list->drives[val]->PhysDiskNum;
usr.sbin/nfsrevoke/nfsrevoke.c
63
u_char val;
usr.sbin/nfsrevoke/nfsrevoke.c
77
val = 0;
usr.sbin/nfsrevoke/nfsrevoke.c
80
val += (u_char)(*cp - '0');
usr.sbin/nfsrevoke/nfsrevoke.c
82
val += ((u_char)(*cp - 'A')) + 0xa;
usr.sbin/nfsrevoke/nfsrevoke.c
84
val += ((u_char)(*cp - 'a')) + 0xa;
usr.sbin/nfsrevoke/nfsrevoke.c
88
val <<= 4;
usr.sbin/nfsrevoke/nfsrevoke.c
91
revoke_handle.nclid_id[cnt++] = val;
usr.sbin/nfsrevoke/nfsrevoke.c
94
val = 0;
usr.sbin/nfsuserd/nfsuserd.c
806
long val;
usr.sbin/nfsuserd/nfsuserd.c
808
val = ifp->retval;
usr.sbin/nfsuserd/nfsuserd.c
809
return (xdr_long(xdrsp, &val));
usr.sbin/ofwdump/ofw_util.c
43
#define OFW_IOCTL(fd, cmd, val) do { \
usr.sbin/ofwdump/ofw_util.c
44
if (ioctl(fd, cmd, val) == -1) \
usr.sbin/pciconf/cap.c
1026
uint32_t val, hdr;
usr.sbin/pciconf/cap.c
1030
val = read_config(fd, &p->pc_sel, ptr, 4);
usr.sbin/pciconf/cap.c
1031
nextptr = PCI_EXTCAP_NEXTPTR(val);
usr.sbin/pciconf/cap.c
1045
val = read_config(fd, &p->pc_sel, ptr + i, 4);
usr.sbin/pciconf/cap.c
1048
printf("%02x %02x %02x %02x", val & 0xff, (val >> 8) & 0xff,
usr.sbin/pciconf/cap.c
1049
(val >> 16) & 0xff, (val >> 24) & 0xff);
usr.sbin/pciconf/cap.c
1060
uint32_t val;
usr.sbin/pciconf/cap.c
1067
val = read_config(fd, &p->pc_sel, ptr + 8, 4);
usr.sbin/pciconf/cap.c
1068
printf(" lane errors %#x\n", val);
usr.sbin/pciconf/cap.c
691
uint32_t pba_offset, table_offset, val;
usr.sbin/pciconf/cap.c
698
val = read_config(fd, &p->pc_sel, ptr + PCIR_MSIX_TABLE, 4);
usr.sbin/pciconf/cap.c
699
table_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);
usr.sbin/pciconf/cap.c
700
table_offset = val & ~PCIM_MSIX_BIR_MASK;
usr.sbin/pciconf/cap.c
702
val = read_config(fd, &p->pc_sel, ptr + PCIR_MSIX_PBA, 4);
usr.sbin/pciconf/cap.c
703
pba_bar = PCIR_BAR(val & PCIM_MSIX_BIR_MASK);
usr.sbin/pciconf/cap.c
704
pba_offset = val & ~PCIM_MSIX_BIR_MASK;
usr.sbin/pciconf/cap.c
799
uint32_t val;
usr.sbin/pciconf/cap.c
817
val = read_config(fd, &p->pc_sel, ptr, 4);
usr.sbin/pciconf/cap.c
819
fixed_sec_bus_nr = PCIM_EA_SEC_NR(val);
usr.sbin/pciconf/cap.c
820
fixed_sub_bus_nr = PCIM_EA_SUB_NR(val);
usr.sbin/pciconf/cap.c
829
val = read_config(fd, &p->pc_sel, ptr, 4);
usr.sbin/pciconf/cap.c
831
ent_size = (val & PCIM_EA_ES);
usr.sbin/pciconf/cap.c
838
flags = val;
usr.sbin/pciconf/cap.c
841
bei = (PCIM_EA_BEI & val) >> PCIM_EA_BEI_OFFSET;
usr.sbin/pciconf/pciconf.c
633
uint32_t val;
usr.sbin/pciconf/pciconf.c
644
val = read_config(fd, &p->pc_sel, PCIR_IOBASEL_1, 1);
usr.sbin/pciconf/pciconf.c
645
if (val != 0 || read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1) != 0) {
usr.sbin/pciconf/pciconf.c
646
if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
usr.sbin/pciconf/pciconf.c
649
val);
usr.sbin/pciconf/pciconf.c
655
base = PCI_PPBIOBASE(0, val);
usr.sbin/pciconf/pciconf.c
669
val = read_config(fd, &p->pc_sel, PCIR_PMBASEL_1, 2);
usr.sbin/pciconf/pciconf.c
670
if (val != 0 || read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2) != 0) {
usr.sbin/pciconf/pciconf.c
671
if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
usr.sbin/pciconf/pciconf.c
674
val);
usr.sbin/pciconf/pciconf.c
680
base = PCI_PPBMEMBASE(0, val);
usr.sbin/pciconf/pciconf.c
722
uint32_t val;
usr.sbin/pciconf/pciconf.c
725
val = read_config(fd, &p->pc_sel, basereg, 2);
usr.sbin/pciconf/pciconf.c
726
if ((val & PCIM_CBBIO_MASK) == PCIM_CBBIO_32) {
usr.sbin/pciconf/pciconf.c
731
base = PCI_CBBIOBASE(val);
usr.sbin/pkg/config.c
188
oldval = c[PACKAGESITE].val;
usr.sbin/pkg/config.c
54
const char *val;
usr.sbin/pkg/config.c
571
char *val;
usr.sbin/pkg/config.c
579
val = getenv(c[i].key);
usr.sbin/pkg/config.c
580
if (val != NULL) {
usr.sbin/pkg/config.c
587
for (env_list_item = strtok(val, ",");
usr.sbin/pkg/config.c
599
c[i].val = val;
usr.sbin/pkg/config.c
630
if (c[ABI].val == NULL && c[ABI].value == NULL) {
usr.sbin/pkg/config.c
635
c[ABI].val = abi;
usr.sbin/pkg/config.c
642
config_string(pkg_config_key k, const char **val)
usr.sbin/pkg/config.c
648
*val = c[k].value;
usr.sbin/pkg/config.c
650
*val = c[k].val;
usr.sbin/pkg/config.c
656
config_bool(pkg_config_key k, bool *val)
usr.sbin/pkg/config.c
663
*val = false;
usr.sbin/pkg/config.c
668
value = c[k].val;
usr.sbin/pkg/config.c
671
*val = true;
usr.sbin/pkg/config.c
687
subst_packagesite(c[ABI].value != NULL ? c[ABI].value : c[ABI].val);
usr.sbin/pmc/cmd_pmc_summary.cc
154
auto val = kv.second.back();
usr.sbin/pmc/cmd_pmc_summary.cc
156
std::cout << val.second << ": " << val.first << std::endl;
usr.sbin/pmcstudy/eval_expr.c
556
double val;
usr.sbin/pmcstudy/eval_expr.c
559
lastproc = gather_exp_to_paren_close(exp->next, &val);
usr.sbin/pmcstudy/eval_expr.c
560
*val_fill = val;
usr.sbin/ppp/ccp.c
189
(*algorithm[ccp->out.algorithm]->Disp)(&(*o)->val));
usr.sbin/ppp/ccp.c
365
if ((*o)->val.hdr.id == algorithm[f]->id && (*o)->algorithm == (int)f)
usr.sbin/ppp/ccp.c
374
(*o)->val.hdr.id = algorithm[f]->id;
usr.sbin/ppp/ccp.c
375
(*o)->val.hdr.len = 2;
usr.sbin/ppp/ccp.c
378
(*algorithm[f]->o.OptInit)(fp->bundle, &(*o)->val, &ccp->cfg);
usr.sbin/ppp/ccp.c
381
if (cp + (*o)->val.hdr.len > buff + sizeof buff) {
usr.sbin/ppp/ccp.c
385
memcpy(cp, &(*o)->val, (*o)->val.hdr.len);
usr.sbin/ppp/ccp.c
386
cp += (*o)->val.hdr.len;
usr.sbin/ppp/ccp.c
388
ccp->my_proto = (*o)->val.hdr.id;
usr.sbin/ppp/ccp.c
546
(fp->bundle, &(*o)->val);
usr.sbin/ppp/ccp.c
627
if (o->val.hdr.id == opt->hdr.id)
usr.sbin/ppp/ccp.c
633
memcpy(&o->val, opt, opt->hdr.len);
usr.sbin/ppp/ccp.c
634
if ((*algorithm[f]->o.Set)(fp->bundle, &o->val, &ccp->cfg) ==
usr.sbin/ppp/ccp.h
88
struct fsm_opt val;
usr.sbin/ppp/command.c
1095
int val = 1;
usr.sbin/ppp/command.c
1126
val = (*cmd->func) (&arg);
usr.sbin/ppp/command.c
1132
if (val == -1)
usr.sbin/ppp/command.c
1134
else if (val)
usr.sbin/ppp/command.c
1136
mkPrefix(argn+1, argv, prefix, sizeof prefix), val);
usr.sbin/ppp/command.c
1138
return val;
usr.sbin/ppp/command.c
3109
command_ShowNegval(unsigned val)
usr.sbin/ppp/command.c
3111
switch (val&3) {
usr.sbin/ppp/defs.c
332
NumStr(long val, char *buf, size_t sz)
usr.sbin/ppp/defs.c
340
snprintf(buf, sz, "<%ld>", val);
usr.sbin/ppp/defs.c
345
HexStr(long val, char *buf, size_t sz)
usr.sbin/ppp/defs.c
353
snprintf(buf, sz, "<0x%lx>", val);
usr.sbin/ppp/filter.c
248
int action, family, ruleno, val, width;
usr.sbin/ppp/filter.c
273
val = strtol(*argv, &wp, 0);
usr.sbin/ppp/filter.c
274
if (!*wp && val >= 0 && val < MAXFILTERS) {
usr.sbin/ppp/filter.c
275
if (val <= ruleno) {
usr.sbin/ppp/filter.c
280
action = val;
usr.sbin/ppp/filter.c
367
val = 1;
usr.sbin/ppp/filter.c
377
val = ParseUdpOrTcp(argc, argv, pe, &fe);
usr.sbin/ppp/filter.c
383
val = ParseIcmp(argc, argv, &fe);
usr.sbin/ppp/filter.c
386
val = ParseGeneric(argc, &fe);
usr.sbin/ppp/filter.c
402
if (val)
usr.sbin/ppp/filter.c
405
return val;
usr.sbin/ppp/mp.c
139
u_int16_t val;
usr.sbin/ppp/mp.c
141
ua_ntohs(MBUF_CTOP(m), &val);
usr.sbin/ppp/mp.c
142
if (val & 0x3000) {
usr.sbin/ppp/mp.c
146
header->begin = val & 0x8000 ? 1 : 0;
usr.sbin/ppp/mp.c
147
header->end = val & 0x4000 ? 1 : 0;
usr.sbin/ppp/mp.c
148
header->seq = val & 0x0fff;
usr.sbin/ppp/mp.c
640
u_int16_t val;
usr.sbin/ppp/mp.c
642
val = (begin << 15) | (end << 14) | (u_int16_t)mp->out.seq;
usr.sbin/ppp/mp.c
643
ua_htons(&val, prepend);
usr.sbin/ppp/mp.c
646
u_int32_t val;
usr.sbin/ppp/mp.c
648
val = (begin << 31) | (end << 30) | (u_int32_t)mp->out.seq;
usr.sbin/ppp/mp.c
649
ua_htonl(&val, prepend);
usr.sbin/ppp/mp.c
806
int val;
usr.sbin/ppp/mp.c
811
val = atoi(arg->argv[arg->argn]);
usr.sbin/ppp/mp.c
812
if (val <= 0) {
usr.sbin/ppp/mp.c
816
arg->cx->mp.bandwidth = val;
usr.sbin/ppp/mppe.c
385
u_int32_t val;
usr.sbin/ppp/mppe.c
389
ua_ntohl(o->data, &val);
usr.sbin/ppp/mppe.c
391
if ((n = snprintf(buf, sizeof buf, "value 0x%08x ", (unsigned)val)) > 0)
usr.sbin/ppp/mppe.c
393
if (!(val & MPPE_OPT_BITMASK)) {
usr.sbin/ppp/mppe.c
398
if (val & MPPE_OPT_128BIT) {
usr.sbin/ppp/mppe.c
403
if (val & MPPE_OPT_56BIT) {
usr.sbin/ppp/mppe.c
408
if (val & MPPE_OPT_40BIT) {
usr.sbin/ppp/mppe.c
416
(val & MPPE_OPT_STATELESS) ? "less" : "ful")) > 0)
usr.sbin/ppp/mppe.c
419
if (val & MPPE_OPT_COMPRESSED) {
usr.sbin/ppp/mppe.c
475
u_int32_t val;
usr.sbin/ppp/mppe.c
477
val = cfg->mppe.state == MPPE_STATELESS ? MPPE_OPT_STATELESS : 0;
usr.sbin/ppp/mppe.c
485
val |= MPPE_OPT_40BIT;
usr.sbin/ppp/mppe.c
487
val |= MPPE_OPT_128BIT;
usr.sbin/ppp/mppe.c
492
val |= MPPE_OPT_128BIT;
usr.sbin/ppp/mppe.c
495
val |= MPPE_OPT_56BIT;
usr.sbin/ppp/mppe.c
498
val |= MPPE_OPT_40BIT;
usr.sbin/ppp/mppe.c
501
val |= MPPE_OPT_128BIT | MPPE_OPT_56BIT | MPPE_OPT_40BIT;
usr.sbin/ppp/mppe.c
505
return val;
usr.sbin/ppp/mppe.c
648
u_int32_t val;
usr.sbin/ppp/mppe.c
651
ua_ntohl(o->data, &val);
usr.sbin/ppp/mppe.c
653
switch (val & MPPE_OPT_BITMASK) {
usr.sbin/ppp/mppe.c
667
log_Printf(LogWARN, "Unexpected MPPE options 0x%08x\n", val);
usr.sbin/ppp/mppe.c
672
mp->stateless = !!(val & MPPE_OPT_STATELESS);
usr.sbin/ppp/physical.c
240
int val;
usr.sbin/ppp/physical.c
242
val = GetParityValue(str);
usr.sbin/ppp/physical.c
243
if (val > 0) {
usr.sbin/ppp/physical.c
244
p->cfg.parity = val;
usr.sbin/ppp/physical.c
248
rstio.c_cflag |= val;
usr.sbin/ppp/timer.c
253
#define SECS(val) ((val) / SECTICKS)
usr.sbin/ppp/timer.c
254
#define HSECS(val) (((val) % SECTICKS) * 100 / SECTICKS)
usr.sbin/ppp/vjcomp.c
188
vj2asc(u_int32_t val)
usr.sbin/ppp/vjcomp.c
192
if (val)
usr.sbin/ppp/vjcomp.c
194
(int)((val>>8)&15)+1, val & 1 ? "" : "out");
usr.sbin/pstat/pstat.c
288
char val;
usr.sbin/pstat/pstat.c
346
putchar(ttystates[i].val);
usr.sbin/pw/psdate.c
164
long val;
usr.sbin/pw/psdate.c
176
val = strtol(str, &p, 0);
usr.sbin/pw/psdate.c
180
dt += (val * 3600L);
usr.sbin/pw/psdate.c
185
dt += (val * 60L);
usr.sbin/pw/psdate.c
189
dt += val;
usr.sbin/pw/psdate.c
193
dt += (val * 86400L);
usr.sbin/pw/psdate.c
197
dt += (val * 604800L);
usr.sbin/pw/psdate.c
202
T->tm_mon += (int) val;
usr.sbin/pw/psdate.c
208
T->tm_year += (int) val;
usr.sbin/pw/pw.h
109
char const *boolean_str(int val);
usr.sbin/pw/pw_conf.c
214
boolean_str(int val)
usr.sbin/pw/pw_conf.c
216
if (val == P_NO)
usr.sbin/pw/pw_conf.c
218
else if (val == P_RANDOM)
usr.sbin/pw/pw_conf.c
220
else if (val == P_NONE)
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
905
OTHERNAME *val;
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
917
val = genname->d.otherName;
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
920
slen = i2t_ASN1_OBJECT(usern, sizeof(usern), val->type_id);
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
926
if (val->value->type != V_ASN1_UTF8STRING ||
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
927
val->value->value.utf8string->length < 3 ||
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
928
(size_t)val->value->value.utf8string->length > sizeof(usern)
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
931
"type=%d\n", val->value->type);
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
936
memcpy(usern, val->value->value.utf8string->data,
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
937
val->value->value.utf8string->length);
usr.sbin/rpc.tlsservd/rpc.tlsservd.c
938
usern[val->value->value.utf8string->length] = '\0';
usr.sbin/rtadvd/config.c
347
int32_t val;
usr.sbin/rtadvd/config.c
404
MAYHAVE(val, "maxinterval", DEF_MAXRTRADVINTERVAL);
usr.sbin/rtadvd/config.c
405
if (val < MIN_MAXINTERVAL || val > MAX_MAXINTERVAL) {
usr.sbin/rtadvd/config.c
408
"(must be between %u and %u)", __func__, val,
usr.sbin/rtadvd/config.c
412
rai->rai_maxinterval = (uint16_t)val;
usr.sbin/rtadvd/config.c
414
MAYHAVE(val, "mininterval", rai->rai_maxinterval/3);
usr.sbin/rtadvd/config.c
415
if ((uint16_t)val < MIN_MININTERVAL ||
usr.sbin/rtadvd/config.c
416
(uint16_t)val > (rai->rai_maxinterval * 3) / 4) {
usr.sbin/rtadvd/config.c
420
__func__, val, ifi->ifi_ifname, MIN_MININTERVAL,
usr.sbin/rtadvd/config.c
424
rai->rai_mininterval = (uint16_t)val;
usr.sbin/rtadvd/config.c
426
MAYHAVE(val, "chlim", DEF_ADVCURHOPLIMIT);
usr.sbin/rtadvd/config.c
427
rai->rai_hoplimit = val & 0xff;
usr.sbin/rtadvd/config.c
430
val = 0;
usr.sbin/rtadvd/config.c
432
val |= ND_RA_FLAG_MANAGED;
usr.sbin/rtadvd/config.c
434
val |= ND_RA_FLAG_OTHER;
usr.sbin/rtadvd/config.c
436
val |= ND_RA_FLAG_RTPREF_HIGH;
usr.sbin/rtadvd/config.c
438
if ((val & ND_RA_FLAG_RTPREF_HIGH)) {
usr.sbin/rtadvd/config.c
443
val |= ND_RA_FLAG_RTPREF_LOW;
usr.sbin/rtadvd/config.c
446
MAYHAVE(val, "raflags", 0);
usr.sbin/rtadvd/config.c
448
rai->rai_managedflg = val & ND_RA_FLAG_MANAGED;
usr.sbin/rtadvd/config.c
449
rai->rai_otherflg = val & ND_RA_FLAG_OTHER;
usr.sbin/rtadvd/config.c
454
rai->rai_rtpref = val & ND_RA_FLAG_RTPREF_MASK;
usr.sbin/rtadvd/config.c
461
MAYHAVE(val, "rltime", rai->rai_maxinterval * 3);
usr.sbin/rtadvd/config.c
462
if ((uint16_t)val && ((uint16_t)val < rai->rai_maxinterval ||
usr.sbin/rtadvd/config.c
463
(uint16_t)val > MAXROUTERLIFETIME)) {
usr.sbin/rtadvd/config.c
467
__func__, val, ifi->ifi_ifname, rai->rai_maxinterval,
usr.sbin/rtadvd/config.c
471
rai->rai_lifetime = val & 0xffff;
usr.sbin/rtadvd/config.c
473
MAYHAVE(val, "rtime", DEF_ADVREACHABLETIME);
usr.sbin/rtadvd/config.c
474
if (val < 0 || val > MAXREACHABLETIME) {
usr.sbin/rtadvd/config.c
478
__func__, val, ifi->ifi_ifname, MAXREACHABLETIME);
usr.sbin/rtadvd/config.c
481
rai->rai_reachabletime = (uint32_t)val;
usr.sbin/rtadvd/config.c
504
MAYHAVE(val, "clockskew", 0);
usr.sbin/rtadvd/config.c
505
rai->rai_clockskew = val;
usr.sbin/rtadvd/config.c
541
MAYHAVE(val, entbuf, 64);
usr.sbin/rtadvd/config.c
542
if (val < 0 || val > 128) {
usr.sbin/rtadvd/config.c
545
__func__, val, addr, ifi->ifi_ifname);
usr.sbin/rtadvd/config.c
548
pfx->pfx_prefixlen = (int)val;
usr.sbin/rtadvd/config.c
552
val = 0;
usr.sbin/rtadvd/config.c
554
val |= ND_OPT_PI_FLAG_ONLINK;
usr.sbin/rtadvd/config.c
556
val |= ND_OPT_PI_FLAG_AUTO;
usr.sbin/rtadvd/config.c
558
MAYHAVE(val, entbuf,
usr.sbin/rtadvd/config.c
561
pfx->pfx_onlinkflg = val & ND_OPT_PI_FLAG_ONLINK;
usr.sbin/rtadvd/config.c
562
pfx->pfx_autoconfflg = val & ND_OPT_PI_FLAG_AUTO;
usr.sbin/rtadvd/config.c
718
MAYHAVE(val, entbuf, 256);
usr.sbin/rtadvd/config.c
719
if (val == 256) {
usr.sbin/rtadvd/config.c
721
MAYHAVE(val, oentbuf, 256);
usr.sbin/rtadvd/config.c
722
if (val != 256)
usr.sbin/rtadvd/config.c
726
val = 64;
usr.sbin/rtadvd/config.c
728
if (val < 0 || val > 128) {
usr.sbin/rtadvd/config.c
731
__func__, val, addr, ifi->ifi_ifname);
usr.sbin/rtadvd/config.c
734
rti->rti_prefixlen = (int)val;
usr.sbin/rtadvd/config.c
738
val = 0;
usr.sbin/rtadvd/config.c
740
val |= ND_RA_FLAG_RTPREF_HIGH;
usr.sbin/rtadvd/config.c
742
if ((val & ND_RA_FLAG_RTPREF_HIGH)) {
usr.sbin/rtadvd/config.c
749
val |= ND_RA_FLAG_RTPREF_LOW;
usr.sbin/rtadvd/config.c
752
MAYHAVE(val, entbuf, 256); /* XXX */
usr.sbin/rtadvd/config.c
753
if (val == 256) {
usr.sbin/rtadvd/config.c
755
MAYHAVE(val, oentbuf, 256);
usr.sbin/rtadvd/config.c
756
if (val != 256) {
usr.sbin/rtadvd/config.c
760
val = 0;
usr.sbin/rtadvd/config.c
762
rti->rti_rtpref = val & ND_RA_FLAG_RTPREF_MASK;
usr.sbin/rtadvd/config.c
839
MAYHAVE(val, entbuf, (rai->rai_maxinterval * 3 / 2));
usr.sbin/rtadvd/config.c
840
if ((uint16_t)val < rai->rai_maxinterval ||
usr.sbin/rtadvd/config.c
841
(uint16_t)val > rai->rai_maxinterval * 2) {
usr.sbin/rtadvd/config.c
844
entbuf, val, ifi->ifi_ifname, rai->rai_maxinterval,
usr.sbin/rtadvd/config.c
848
rdn->rd_ltime = val;
usr.sbin/rtadvd/config.c
893
MAYHAVE(val, entbuf, (rai->rai_maxinterval * 3 / 2));
usr.sbin/rtadvd/config.c
894
if ((uint16_t)val < rai->rai_maxinterval ||
usr.sbin/rtadvd/config.c
895
(uint16_t)val > rai->rai_maxinterval * 2) {
usr.sbin/rtadvd/config.c
898
entbuf, val, ifi->ifi_ifname, rai->rai_maxinterval,
usr.sbin/rtadvd/config.c
902
dns->dn_ltime = val;
usr.sbin/sndctl/sndctl.c
126
int val;
usr.sbin/sndctl/sndctl.c
276
if ((p->val & caps) == 0)
usr.sbin/sndctl/sndctl.c
298
if ((p->val & enc) == 0)
usr.sbin/sndctl/sndctl.c
793
const char *val = arg;
usr.sbin/sndctl/sndctl.c
801
if (strcmp(val, zero) == 0) {
usr.sbin/sndctl/sndctl.c
807
} else if (strcmp(val, one) == 0) {
usr.sbin/sndctl/sndctl.c
821
const char *val = arg;
usr.sbin/sndctl/sndctl.c
827
if (strcmp(val, "0") == 0) {
usr.sbin/sndctl/sndctl.c
834
} else if (strcmp(val, "1") == 0) {
usr.sbin/traceroute/traceroute.c
2011
register int val;
usr.sbin/traceroute/traceroute.c
2016
val = (int)strtol(cp, &ep, 16);
usr.sbin/traceroute/traceroute.c
2018
val = (int)strtol(str, &ep, 10);
usr.sbin/traceroute/traceroute.c
2024
if (val < mi && mi >= 0) {
usr.sbin/traceroute/traceroute.c
2033
if (val > ma && ma >= 0) {
usr.sbin/traceroute/traceroute.c
2037
return (val);
usr.sbin/uhsoctl/uhsoctl.c
1169
ra.val[0].ptr = NULL;
usr.sbin/uhsoctl/uhsoctl.c
1170
ra.val[1].int32 = 0;
usr.sbin/uhsoctl/uhsoctl.c
1172
if (ra.val[1].int32 > 0) {
usr.sbin/uhsoctl/uhsoctl.c
1175
buf = ra.val[0].ptr;
usr.sbin/uhsoctl/uhsoctl.c
1199
ra.val[0].ptr = NULL;
usr.sbin/uhsoctl/uhsoctl.c
1200
ra.val[1].int32 = 0;
usr.sbin/uhsoctl/uhsoctl.c
1202
buf = ra.val[0].ptr;
usr.sbin/uhsoctl/uhsoctl.c
1204
for (i = 0; i < ra.val[1].int32; i++) {
usr.sbin/uhsoctl/uhsoctl.c
148
resp_data val[2];
usr.sbin/uhsoctl/uhsoctl.c
692
int i = ra->val[1].int32;
usr.sbin/uhsoctl/uhsoctl.c
698
buf = realloc(ra->val[0].ptr, sizeof(char *) * (i + 1));
usr.sbin/uhsoctl/uhsoctl.c
704
ra->val[0].ptr = buf;
usr.sbin/uhsoctl/uhsoctl.c
705
ra->val[1].int32 = i + 1;
usr.sbin/uhsoctl/uhsoctl.c
714
buf = ra->val[0].ptr;
usr.sbin/uhsoctl/uhsoctl.c
715
for (i = 0; i < ra->val[1].int32; i++) {
usr.sbin/usbconfig/usbconfig.c
230
uid_t val;
usr.sbin/usbconfig/usbconfig.c
234
val = strtoul(name, &ep, 0);
usr.sbin/usbconfig/usbconfig.c
241
return (val);
usr.sbin/usbconfig/usbconfig.c
247
int val;
usr.sbin/usbconfig/usbconfig.c
251
val = strtoul(s, &ep, 0);
usr.sbin/usbconfig/usbconfig.c
258
return val;
usr.sbin/virtual_oss/virtual_oss/ctl.c
129
pvp = vprofile_by_index(&virtual_profile_client_head, data.val);
usr.sbin/virtual_oss/virtual_oss/ctl.c
140
pvp = vprofile_by_index(&virtual_profile_loopback_head, data.val);
usr.sbin/virtual_oss/virtual_oss/ctl.c
149
data.val = VIRTUAL_OSS_VERSION;
usr.sbin/virtual_oss/virtual_oss/ctl.c
333
pvm = vmonitor_alloc(&data.val,
usr.sbin/virtual_oss/virtual_oss/ctl.c
339
pvm = vmonitor_alloc(&data.val,
usr.sbin/virtual_oss/virtual_oss/ctl.c
345
pvm = vmonitor_alloc(&data.val,
usr.sbin/virtual_oss/virtual_oss/ctl.c
442
voss_is_recording = data.val ? 1 : 0;
usr.sbin/virtual_oss/virtual_oss/ctl.c
446
data.val = voss_is_recording;
usr.sbin/virtual_oss/virtual_oss/ctl.c
585
data.val = voss_dsp_sample_rate;
usr.sbin/virtual_oss/virtual_oss/ctl.c
84
int val;
usr.sbin/virtual_oss/virtual_oss/format.c
101
val = s == 0 ? format_max(fmt) :
usr.sbin/virtual_oss/virtual_oss/format.c
105
m = 0x800000 | (val & 0x7fffff);
usr.sbin/virtual_oss/virtual_oss/format.c
111
val = s == 0 ? m : -m;
usr.sbin/virtual_oss/virtual_oss/format.c
114
val <<= (64 - 32);
usr.sbin/virtual_oss/virtual_oss/format.c
115
val >>= (64 - 32);
usr.sbin/virtual_oss/virtual_oss/format.c
117
*dst++ = val;
usr.sbin/virtual_oss/virtual_oss/format.c
122
val = src[0];
usr.sbin/virtual_oss/virtual_oss/format.c
127
val = val ^ 0x80;
usr.sbin/virtual_oss/virtual_oss/format.c
129
val <<= (64 - 8);
usr.sbin/virtual_oss/virtual_oss/format.c
130
val >>= (64 - 8);
usr.sbin/virtual_oss/virtual_oss/format.c
132
*dst++ = val;
usr.sbin/virtual_oss/virtual_oss/format.c
141
int64_t val;
usr.sbin/virtual_oss/virtual_oss/format.c
146
val = *src++;
usr.sbin/virtual_oss/virtual_oss/format.c
148
if (val > 0x7FFF)
usr.sbin/virtual_oss/virtual_oss/format.c
149
val = 0x7FFF;
usr.sbin/virtual_oss/virtual_oss/format.c
150
else if (val < -0x7FFF)
usr.sbin/virtual_oss/virtual_oss/format.c
151
val = -0x7FFF;
usr.sbin/virtual_oss/virtual_oss/format.c
154
val = val ^ 0x8000;
usr.sbin/virtual_oss/virtual_oss/format.c
157
dst[0] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
158
dst[1] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
160
dst[1] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
161
dst[0] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
170
val = *src++;
usr.sbin/virtual_oss/virtual_oss/format.c
172
if (val > 0x7FFFFF)
usr.sbin/virtual_oss/virtual_oss/format.c
173
val = 0x7FFFFF;
usr.sbin/virtual_oss/virtual_oss/format.c
174
else if (val < -0x7FFFFF)
usr.sbin/virtual_oss/virtual_oss/format.c
175
val = -0x7FFFFF;
usr.sbin/virtual_oss/virtual_oss/format.c
178
val = val ^ 0x800000;
usr.sbin/virtual_oss/virtual_oss/format.c
181
dst[0] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
182
dst[1] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
183
dst[2] = val >> 16;
usr.sbin/virtual_oss/virtual_oss/format.c
185
dst[2] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
186
dst[1] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
187
dst[0] = val >> 16;
usr.sbin/virtual_oss/virtual_oss/format.c
196
val = *src++;
usr.sbin/virtual_oss/virtual_oss/format.c
198
if (val > 0x7FFFFFFFLL)
usr.sbin/virtual_oss/virtual_oss/format.c
199
val = 0x7FFFFFFFLL;
usr.sbin/virtual_oss/virtual_oss/format.c
200
else if (val < -0x7FFFFFFFLL)
usr.sbin/virtual_oss/virtual_oss/format.c
201
val = -0x7FFFFFFFLL;
usr.sbin/virtual_oss/virtual_oss/format.c
204
if (val == 0)
usr.sbin/virtual_oss/virtual_oss/format.c
206
else if (val == format_max(fmt))
usr.sbin/virtual_oss/virtual_oss/format.c
208
else if (val == -0x80000000LL)
usr.sbin/virtual_oss/virtual_oss/format.c
212
if (val < 0) {
usr.sbin/virtual_oss/virtual_oss/format.c
214
val = -val;
usr.sbin/virtual_oss/virtual_oss/format.c
217
while ((val & 0x7f000000) != 0) {
usr.sbin/virtual_oss/virtual_oss/format.c
218
val >>= 1;
usr.sbin/virtual_oss/virtual_oss/format.c
221
while ((val & 0x7f800000) == 0) {
usr.sbin/virtual_oss/virtual_oss/format.c
222
val <<= 1;
usr.sbin/virtual_oss/virtual_oss/format.c
226
r |= val & 0x7fffff;
usr.sbin/virtual_oss/virtual_oss/format.c
228
val = r;
usr.sbin/virtual_oss/virtual_oss/format.c
232
val = val ^ 0x80000000LL;
usr.sbin/virtual_oss/virtual_oss/format.c
235
dst[0] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
236
dst[1] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
237
dst[2] = val >> 16;
usr.sbin/virtual_oss/virtual_oss/format.c
238
dst[3] = val >> 24;
usr.sbin/virtual_oss/virtual_oss/format.c
240
dst[3] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
241
dst[2] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
242
dst[1] = val >> 16;
usr.sbin/virtual_oss/virtual_oss/format.c
243
dst[0] = val >> 24;
usr.sbin/virtual_oss/virtual_oss/format.c
252
val = *src++;
usr.sbin/virtual_oss/virtual_oss/format.c
254
if (val > 0x7F)
usr.sbin/virtual_oss/virtual_oss/format.c
255
val = 0x7F;
usr.sbin/virtual_oss/virtual_oss/format.c
256
else if (val < -0x7F)
usr.sbin/virtual_oss/virtual_oss/format.c
257
val = -0x7F;
usr.sbin/virtual_oss/virtual_oss/format.c
260
val = val ^ 0x80;
usr.sbin/virtual_oss/virtual_oss/format.c
262
dst[0] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
357
uint16_t val;
usr.sbin/virtual_oss/virtual_oss/format.c
360
val = 1U << 15;
usr.sbin/virtual_oss/virtual_oss/format.c
362
val = 0;
usr.sbin/virtual_oss/virtual_oss/format.c
366
dst[0] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
367
dst[1] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
369
dst[1] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
370
dst[0] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
376
uint32_t val;
usr.sbin/virtual_oss/virtual_oss/format.c
379
val = 1U << 23;
usr.sbin/virtual_oss/virtual_oss/format.c
381
val = 0;
usr.sbin/virtual_oss/virtual_oss/format.c
385
dst[0] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
386
dst[1] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
387
dst[2] = val >> 16;
usr.sbin/virtual_oss/virtual_oss/format.c
389
dst[2] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
390
dst[1] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
391
dst[0] = val >> 16;
usr.sbin/virtual_oss/virtual_oss/format.c
396
uint32_t val;
usr.sbin/virtual_oss/virtual_oss/format.c
399
val = 1U << 31;
usr.sbin/virtual_oss/virtual_oss/format.c
401
val = 0;
usr.sbin/virtual_oss/virtual_oss/format.c
405
dst[0] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
406
dst[1] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
407
dst[2] = val >> 16;
usr.sbin/virtual_oss/virtual_oss/format.c
408
dst[3] = val >> 24;
usr.sbin/virtual_oss/virtual_oss/format.c
41
int64_t val;
usr.sbin/virtual_oss/virtual_oss/format.c
410
dst[3] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
411
dst[2] = val >> 8;
usr.sbin/virtual_oss/virtual_oss/format.c
412
dst[1] = val >> 16;
usr.sbin/virtual_oss/virtual_oss/format.c
413
dst[0] = val >> 24;
usr.sbin/virtual_oss/virtual_oss/format.c
419
uint8_t val;
usr.sbin/virtual_oss/virtual_oss/format.c
422
val = 1U << 7;
usr.sbin/virtual_oss/virtual_oss/format.c
424
val = 0;
usr.sbin/virtual_oss/virtual_oss/format.c
427
dst[0] = val;
usr.sbin/virtual_oss/virtual_oss/format.c
46
val = src[0] | (src[1] << 8);
usr.sbin/virtual_oss/virtual_oss/format.c
48
val = src[1] | (src[0] << 8);
usr.sbin/virtual_oss/virtual_oss/format.c
53
val = val ^ 0x8000;
usr.sbin/virtual_oss/virtual_oss/format.c
55
val <<= (64 - 16);
usr.sbin/virtual_oss/virtual_oss/format.c
56
val >>= (64 - 16);
usr.sbin/virtual_oss/virtual_oss/format.c
58
*dst++ = val;
usr.sbin/virtual_oss/virtual_oss/format.c
64
val = src[0] | (src[1] << 8) | (src[2] << 16);
usr.sbin/virtual_oss/virtual_oss/format.c
66
val = src[2] | (src[1] << 8) | (src[0] << 16);
usr.sbin/virtual_oss/virtual_oss/format.c
71
val = val ^ 0x800000;
usr.sbin/virtual_oss/virtual_oss/format.c
73
val <<= (64 - 24);
usr.sbin/virtual_oss/virtual_oss/format.c
74
val >>= (64 - 24);
usr.sbin/virtual_oss/virtual_oss/format.c
76
*dst++ = val;
usr.sbin/virtual_oss/virtual_oss/format.c
83
val = src[0] | (src[1] << 8) | (src[2] << 16) | (src[3] << 24);
usr.sbin/virtual_oss/virtual_oss/format.c
85
val = src[3] | (src[2] << 8) | (src[1] << 16) | (src[0] << 24);
usr.sbin/virtual_oss/virtual_oss/format.c
90
val = val ^ 0x80000000LL;
usr.sbin/virtual_oss/virtual_oss/format.c
93
e = (val >> 23) & 0xff;
usr.sbin/virtual_oss/virtual_oss/format.c
96
val = 0;
usr.sbin/virtual_oss/virtual_oss/format.c
99
s = val & 0x80000000U;
usr.sbin/virtual_oss/virtual_oss/main.c
1127
int val;
usr.sbin/virtual_oss/virtual_oss/main.c
1169
data.val = SOUND_VERSION;
usr.sbin/virtual_oss/virtual_oss/main.c
1229
data.val = vclient_input_delay(pvc);
usr.sbin/virtual_oss/virtual_oss/main.c
1232
data.val = vring_total_read_len(&pvc->tx_ring[1]);
usr.sbin/virtual_oss/virtual_oss/main.c
1240
error = vclient_setup_buffers(pvc, data.val, 0, 0, 0, 0);
usr.sbin/virtual_oss/virtual_oss/main.c
1243
data.val = pvc->buffer_size;
usr.sbin/virtual_oss/virtual_oss/main.c
1246
if ((data.val & 0xFFFF) < 4) {
usr.sbin/virtual_oss/virtual_oss/main.c
1248
data.val &= ~0xFFFF;
usr.sbin/virtual_oss/virtual_oss/main.c
1249
data.val |= 4;
usr.sbin/virtual_oss/virtual_oss/main.c
1250
} else if ((data.val & 0xFFFF) > 24) {
usr.sbin/virtual_oss/virtual_oss/main.c
1252
data.val &= ~0xFFFF;
usr.sbin/virtual_oss/virtual_oss/main.c
1253
data.val |= 24;
usr.sbin/virtual_oss/virtual_oss/main.c
1256
(1 << (data.val & 0xFFFF)), (data.val >> 16), 0, 0, 0);
usr.sbin/virtual_oss/virtual_oss/main.c
1265
for (data.val = 0;
usr.sbin/virtual_oss/virtual_oss/main.c
1266
data.val < 24 && (1U << data.val) < pvc->buffer_size;
usr.sbin/virtual_oss/virtual_oss/main.c
1267
data.val++)
usr.sbin/virtual_oss/virtual_oss/main.c
1270
data.val |= (pvc->buffer_frags << 16);
usr.sbin/virtual_oss/virtual_oss/main.c
1279
if (data.val >= 8000 && data.val <= 96000 &&
usr.sbin/virtual_oss/virtual_oss/main.c
1281
error = vclient_setup_buffers(pvc, 0, 0, 0, 0, data.val);
usr.sbin/virtual_oss/virtual_oss/main.c
1284
data.val = (int)pvc->sample_rate;
usr.sbin/virtual_oss/virtual_oss/main.c
1287
data.val = (int)pvc->sample_rate;
usr.sbin/virtual_oss/virtual_oss/main.c
1290
if (data.val != 0) {
usr.sbin/virtual_oss/virtual_oss/main.c
1295
data.val = (pvc->channels == 2);
usr.sbin/virtual_oss/virtual_oss/main.c
1298
if (data.val < 0) {
usr.sbin/virtual_oss/virtual_oss/main.c
1299
data.val = 0;
usr.sbin/virtual_oss/virtual_oss/main.c
1303
if (data.val == 0) {
usr.sbin/virtual_oss/virtual_oss/main.c
1304
data.val = pvc->channels;
usr.sbin/virtual_oss/virtual_oss/main.c
1306
error = vclient_set_channels(pvc, data.val);
usr.sbin/virtual_oss/virtual_oss/main.c
1310
data.val = pvc->channels;
usr.sbin/virtual_oss/virtual_oss/main.c
1314
data.val = VSUPPORTED_AFMT | AFMT_FULLDUPLEX |
usr.sbin/virtual_oss/virtual_oss/main.c
1319
if (data.val != AFMT_QUERY) {
usr.sbin/virtual_oss/virtual_oss/main.c
1320
temp = data.val & VSUPPORTED_AFMT;
usr.sbin/virtual_oss/virtual_oss/main.c
1327
data.val = pvc->format;
usr.sbin/virtual_oss/virtual_oss/main.c
1359
data.val = PCM_CAP_REALTIME | PCM_CAP_DUPLEX |
usr.sbin/virtual_oss/virtual_oss/main.c
1364
data.val = vclient_sample_bytes(pvc) * 8;
usr.sbin/virtual_oss/virtual_oss/main.c
1367
if (data.val & PCM_ENABLE_INPUT) {
usr.sbin/virtual_oss/virtual_oss/main.c
1374
if (data.val & PCM_ENABLE_OUTPUT) {
usr.sbin/virtual_oss/virtual_oss/main.c
1382
data.val = 0;
usr.sbin/virtual_oss/virtual_oss/main.c
1384
data.val |= PCM_ENABLE_INPUT;
usr.sbin/virtual_oss/virtual_oss/main.c
1386
data.val |= PCM_ENABLE_OUTPUT;
usr.sbin/virtual_oss/virtual_oss/main.c
1389
data.val = vclient_output_delay_adjusted(pvc);
usr.sbin/virtual_oss/virtual_oss/main.c
1397
data.val = (temp & 0x00FF) |
usr.sbin/virtual_oss/virtual_oss/main.c
1401
pvc->rx_volume = ((data.val & 0xFF) << VVOLUME_UNIT_SHIFT) / 100;
usr.sbin/virtual_oss/virtual_oss/main.c
1405
data.val = (temp & 0x00FF) |
usr.sbin/virtual_oss/virtual_oss/main.c
1409
pvc->tx_volume = ((data.val & 0xFF) << VVOLUME_UNIT_SHIFT) / 100;
usr.sbin/virtual_oss/virtual_oss/main.c
1456
if (data.val > 0 && data.val <
usr.sbin/virtual_oss/virtual_oss/main.c
1458
pvc->low_water = data.val;
usr.sbin/virtual_oss/virtual_oss/main.c
1477
data.val = DSP_BIND_FRONT;
usr.sbin/virtual_oss/virtual_oss/main.c
1511
int val;
usr.sbin/virtual_oss/virtual_oss/main.c
1538
data.val = vclient_input_delay(pvc);
usr.sbin/virtual_oss/virtual_oss/main.c
2024
int val;
usr.sbin/virtual_oss/virtual_oss/main.c
2241
val = (voss_dsp_samples *
usr.sbin/virtual_oss/virtual_oss/main.c
2243
if (val <= 0 || val >= (1024 * 1024))
usr.sbin/virtual_oss/virtual_oss/main.c
2295
val = 0;
usr.sbin/virtual_oss/virtual_oss/main.c
2304
profile.tx_dst[idx / 2] = val;
usr.sbin/virtual_oss/virtual_oss/main.c
2306
profile.rx_src[idx / 2] = val;
usr.sbin/virtual_oss/virtual_oss/main.c
2309
val = 0;
usr.sbin/virtual_oss/virtual_oss/main.c
2314
val *= 10;
usr.sbin/virtual_oss/virtual_oss/main.c
2315
val += c - '0';
usr.sbin/virtual_oss/virtual_oss/main.c
2342
val = 0;
usr.sbin/virtual_oss/virtual_oss/main.c
2354
src = val;
usr.sbin/virtual_oss/virtual_oss/main.c
2357
dst = val;
usr.sbin/virtual_oss/virtual_oss/main.c
2360
pol = val ? 1 : 0;
usr.sbin/virtual_oss/virtual_oss/main.c
2363
mute = val ? 1 : 0;
usr.sbin/virtual_oss/virtual_oss/main.c
2366
if (val > 31) {
usr.sbin/virtual_oss/virtual_oss/main.c
2371
amp = neg ? -val : val;
usr.sbin/virtual_oss/virtual_oss/main.c
2378
val = 0;
usr.sbin/virtual_oss/virtual_oss/main.c
2384
val *= 10;
usr.sbin/virtual_oss/virtual_oss/main.c
2385
val += c - '0';
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
391
int64_t val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
405
val = -(buffer_local[(y * src_chans) + src] >> shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
406
buffer_data[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
407
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
408
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
409
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
410
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
414
val = -(buffer_local[(y * src_chans) + src] << shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
415
buffer_data[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
416
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
417
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
418
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
419
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
426
val = (buffer_local[(y * src_chans) + src] >> shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
427
buffer_data[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
428
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
429
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
430
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
431
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
435
val = (buffer_local[(y * src_chans) + src] << shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
436
buffer_data[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
437
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
438
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
439
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
440
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
641
int64_t val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
655
val = -(buffer_monitor[(y * src_chans) + src] >> shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
656
buffer_temp[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
657
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
658
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
659
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
660
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
664
val = -(buffer_monitor[(y * src_chans) + src] << shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
665
buffer_temp[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
666
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
667
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
668
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
669
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
676
val = (buffer_monitor[(y * src_chans) + src] >> shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
677
buffer_temp[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
678
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
679
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
680
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
681
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
685
val = (buffer_monitor[(y * src_chans) + src] << shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
686
buffer_temp[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
687
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
688
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
689
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
690
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
705
int64_t val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
719
val = -(buffer_monitor[(y * src_chans) + src] >> shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
720
buffer_temp[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
721
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
722
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
723
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
724
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
728
val = -(buffer_monitor[(y * src_chans) + src] << shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
729
buffer_temp[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
730
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
731
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
732
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
733
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
740
val = (buffer_monitor[(y * src_chans) + src] >> shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
741
buffer_temp[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
742
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
743
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
744
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
745
pvm->peak_value = val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
749
val = (buffer_monitor[(y * src_chans) + src] << shift);
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
750
buffer_temp[(y * src_chans) + x] += val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
751
if (val < 0)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
752
val = -val;
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
753
if (val > pvm->peak_value)
usr.sbin/virtual_oss/virtual_oss/virtual_oss.c
754
pvm->peak_value = val;
usr.sbin/ypldap/ber.c
1068
long long val = 0;
usr.sbin/ypldap/ber.c
1127
val <<= 8;
usr.sbin/ypldap/ber.c
1128
val |= c;
usr.sbin/ypldap/ber.c
1132
if (val >> ((i - 1) * 8) & 0x80)
usr.sbin/ypldap/ber.c
1133
val |= ULLONG_MAX << (i * 8);
usr.sbin/ypldap/ber.c
1134
elm->be_numeric = val;
usr.sbin/ypldap/ber.c
156
ber_add_enumerated(struct ber_element *prev, long long val)
usr.sbin/ypldap/ber.c
165
elm->be_numeric = val;
usr.sbin/ypldap/ber.c
168
cur = val & 0xff;
usr.sbin/ypldap/ber.c
174
val >>= 8;
usr.sbin/ypldap/ber.c
185
ber_add_integer(struct ber_element *prev, long long val)
usr.sbin/ypldap/ber.c
194
elm->be_numeric = val;
usr.sbin/ypldap/ber.c
197
cur = val & 0xff;
usr.sbin/ypldap/ber.c
203
val >>= 8;
usr.sbin/ypldap/parse.y
512
u_char *p, *val;
usr.sbin/ypldap/parse.y
542
val = symget(buf);
usr.sbin/ypldap/parse.y
543
if (val == NULL) {
usr.sbin/ypldap/parse.y
547
parsebuf = val;
usr.sbin/ypldap/parse.y
760
free(sym->val);
usr.sbin/ypldap/parse.y
774
symset(const char *nam, const char *val, int persist)
usr.sbin/ypldap/parse.y
787
free(sym->val);
usr.sbin/ypldap/parse.y
800
sym->val = strdup(val);
usr.sbin/ypldap/parse.y
801
if (sym->val == NULL) {
usr.sbin/ypldap/parse.y
815
char *sym, *val;
usr.sbin/ypldap/parse.y
819
if ((val = strrchr(s, '=')) == NULL)
usr.sbin/ypldap/parse.y
822
len = strlen(s) - strlen(val) + 1;
usr.sbin/ypldap/parse.y
828
ret = symset(sym, val + 1, 1);
usr.sbin/ypldap/parse.y
83
char *val;
usr.sbin/ypldap/parse.y
842
return (sym->val);
usr.sbin/ypldap/yp.c
647
res->val.valdat_len = strlen(buf);
usr.sbin/ypldap/yp.c
648
res->val.valdat_val = buf;
usr.sbin/ypldap/yp.c
674
res->val.valdat_len = strlen(buf);
usr.sbin/ypldap/yp.c
675
res->val.valdat_val = buf;
usr.sbin/yppush/yppush_main.c
435
yppush_foreach(int status, char *key, int keylen, char *val, int vallen,
usr.sbin/yppush/yppush_main.c
443
asprintf(&server, "%.*s", vallen, val);
usr.sbin/ypserv/common/yplib_host.c
165
*outvallen = yprv.val.valdat_len;
usr.sbin/ypserv/common/yplib_host.c
167
memcpy(*outval, yprv.val.valdat_val, *outvallen);
usr.sbin/ypserv/common/yplib_host.c
204
*outvallen = yprkv.val.valdat_len;
usr.sbin/ypserv/common/yplib_host.c
206
memcpy(*outval, yprkv.val.valdat_val, *outvallen);
usr.sbin/ypserv/common/yplib_host.c
245
*outvallen = yprkv.val.valdat_len;
usr.sbin/ypserv/common/yplib_host.c
247
memcpy(*outval, yprkv.val.valdat_val, *outvallen);
usr.sbin/ypserv/yp_dblookup.c
670
yp_getbykey(keydat *key, valdat *val)
usr.sbin/ypserv/yp_dblookup.c
682
val->valdat_val = db_val.data;
usr.sbin/ypserv/yp_dblookup.c
683
val->valdat_len = db_val.size;
usr.sbin/ypserv/yp_dblookup.c
690
yp_firstbykey(keydat *key, valdat *val)
usr.sbin/ypserv/yp_dblookup.c
700
val->valdat_val = db_val.data;
usr.sbin/ypserv/yp_dblookup.c
701
val->valdat_len = db_val.size;
usr.sbin/ypserv/yp_dblookup.c
708
yp_nextbykey(keydat *key, valdat *val)
usr.sbin/ypserv/yp_dblookup.c
721
val->valdat_val = db_val.data;
usr.sbin/ypserv/yp_dblookup.c
722
val->valdat_len = db_val.size;
usr.sbin/ypserv/yp_dnslookup.c
242
result_v2.val.valdat_len = strlen(buf);
usr.sbin/ypserv/yp_dnslookup.c
243
result_v2.val.valdat_val = buf;
usr.sbin/ypserv/yp_dnslookup.c
262
result_v1.YPVAL.val.valdat_len = strlen(buf);
usr.sbin/ypserv/yp_dnslookup.c
263
result_v1.YPVAL.val.valdat_val = buf;
usr.sbin/ypserv/yp_server.c
138
result.val.valdat_val = "";
usr.sbin/ypserv/yp_server.c
139
result.val.valdat_len = 0;
usr.sbin/ypserv/yp_server.c
160
result.stat = yp_getbykey(&argp->key, &result.val);
usr.sbin/ypserv/yp_server.c
209
result.val.valdat_val = result.key.keydat_val = "";
usr.sbin/ypserv/yp_server.c
210
result.val.valdat_len = result.key.keydat_len = 0;
usr.sbin/ypserv/yp_server.c
231
result.stat = yp_firstbykey(&result.key, &result.val);
usr.sbin/ypserv/yp_server.c
241
result.val.valdat_val = result.key.keydat_val = "";
usr.sbin/ypserv/yp_server.c
242
result.val.valdat_len = result.key.keydat_len = 0;
usr.sbin/ypserv/yp_server.c
266
result.stat = yp_nextbykey(&result.key, &result.val);
usr.sbin/ypserv/yp_server.c
469
if ((objp->ypresp_all_u.val.stat =
usr.sbin/ypserv/yp_server.c
470
yp_nextbykey(&objp->ypresp_all_u.val.key,
usr.sbin/ypserv/yp_server.c
471
&objp->ypresp_all_u.val.val)) == YP_TRUE) {
usr.sbin/ypserv/yp_server.c
496
result.ypresp_all_u.val.key.keydat_len = 0;
usr.sbin/ypserv/yp_server.c
497
result.ypresp_all_u.val.key.keydat_val = "";
usr.sbin/ypserv/yp_server.c
504
result.ypresp_all_u.val.stat = YP_YPERR;
usr.sbin/ypserv/yp_server.c
509
result.ypresp_all_u.val.stat = YP_BADARGS;
usr.sbin/ypserv/yp_server.c
519
result.ypresp_all_u.val.stat = YP_YPERR;
usr.sbin/ypserv/yp_server.c
535
result.ypresp_all_u.val.stat = YP_YPERR;
usr.sbin/ypserv/yp_server.c
554
&result.ypresp_all_u.val.key, 0) != YP_TRUE) {
usr.sbin/ypserv/yp_server.c
555
result.ypresp_all_u.val.stat = yp_errno;
usr.sbin/ypserv/yp_server.c
578
valdat val;
usr.sbin/ypserv/yp_server.c
609
result.stat = yp_getbykey(&key, &val);
usr.sbin/ypserv/yp_server.c
611
bcopy(val.valdat_val, &ypvalbuf, val.valdat_len);
usr.sbin/ypserv/yp_server.c
612
ypvalbuf[val.valdat_len] = '\0';
usr.sbin/ypserv/yp_server.c
625
valdat val;
usr.sbin/ypserv/yp_server.c
655
result.stat = yp_getbykey(&key, &val);
usr.sbin/ypserv/yp_server.c
658
result.ordernum = atoi(val.valdat_val);
usr.sbin/ypserv/yp_server.c
818
result.ypresponse_u.yp_resp_valtype.val.valdat_val = "";
usr.sbin/ypserv/yp_server.c
819
result.ypresponse_u.yp_resp_valtype.val.valdat_len = 0;
usr.sbin/ypserv/yp_server.c
846
result.ypresponse_u.yp_resp_key_valtype.val.valdat_val =
usr.sbin/ypserv/yp_server.c
848
result.ypresponse_u.yp_resp_key_valtype.val.valdat_len =
usr.sbin/ypserv/yp_server.c
877
result.ypresponse_u.yp_resp_key_valtype.val.valdat_val =
usr.sbin/ypserv/yp_server.c
879
result.ypresponse_u.yp_resp_key_valtype.val.valdat_len =