arch/arm64/include/asm/kvm_arm.h

182

FIELD_PREP(VTCR_EL2_SL0, (VTCR_EL2_TGRAN_SL0_BASE - (4 - (levels))))

arch/arm64/include/asm/kvm_emulate.h

86

u64 esr = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SVE) |

arch/arm64/include/asm/kvm_nested.h

134

xn &= FIELD_PREP(KVM_PTE_LEAF_ATTR_HI_S2_XN, 0b10);

arch/arm64/include/asm/kvm_nested.h

150

xn &= FIELD_PREP(KVM_PTE_LEAF_ATTR_HI_S2_XN, 0b10);

arch/arm64/include/asm/kvm_nested.h

246

return FIELD_PREP(KVM_NV_GUEST_MAP_SZ, trans->level);

arch/arm64/include/asm/kvm_pgtable.h

139

pte |= FIELD_PREP(KVM_PTE_ADDR_51_50_LPA2, pa >> 50);

arch/arm64/include/asm/kvm_pgtable.h

144

pte |= FIELD_PREP(KVM_PTE_ADDR_51_48, pa >> 48);

arch/arm64/include/asm/sysreg.h

1258

FIELD_PREP(reg##_##field##_MASK, val)

arch/arm64/include/asm/sysreg.h

1261

FIELD_PREP(reg##_##field##_MASK, \

arch/arm64/include/asm/tlbflush.h

108

arg |= FIELD_PREP(TLBI_TTL_MASK, ttl); \

arch/arm64/include/asm/tlbflush.h

148

__ta |= FIELD_PREP(TLBIR_BADDR_MASK, baddr); \

arch/arm64/include/asm/tlbflush.h

149

__ta |= FIELD_PREP(TLBIR_TTL_MASK, __ttl); \

arch/arm64/include/asm/tlbflush.h

150

__ta |= FIELD_PREP(TLBIR_NUM_MASK, num); \

arch/arm64/include/asm/tlbflush.h

151

__ta |= FIELD_PREP(TLBIR_SCALE_MASK, scale); \

arch/arm64/include/asm/tlbflush.h

152

__ta |= FIELD_PREP(TLBIR_TG_MASK, get_trans_granule()); \

arch/arm64/include/asm/tlbflush.h

153

__ta |= FIELD_PREP(TLBIR_ASID_MASK, asid); \

arch/arm64/kvm/arm.c

2084

tcr |= TCR_EL2_RES1 | FIELD_PREP(TCR_EL2_PS_MASK, ips);

arch/arm64/kvm/arm.c

2498

val |= FIELD_PREP(ID_AA64PFR0_EL1_CSV2,

arch/arm64/kvm/arm.c

2500

val |= FIELD_PREP(ID_AA64PFR0_EL1_CSV3,

arch/arm64/kvm/at.c

796

par |= FIELD_PREP(SYS_PAR_EL1_FST, tr->esr);

arch/arm64/kvm/at.c

863

par = FIELD_PREP(SYS_PAR_EL1_ATTR, final_attr);

arch/arm64/kvm/at.c

865

par |= FIELD_PREP(SYS_PAR_EL1_SH,

arch/arm64/kvm/at.c

880

par |= FIELD_PREP(SYS_PAR_EL1_FST, wr->fst);

arch/arm64/kvm/at.c

890

par |= FIELD_PREP(SYS_PAR_EL1_ATTR,

arch/arm64/kvm/at.c

892

par |= FIELD_PREP(SYS_PAR_EL1_SH, ATTR_NSH);

arch/arm64/kvm/at.c

894

par |= FIELD_PREP(SYS_PAR_EL1_ATTR, 0); /* nGnRnE */

arch/arm64/kvm/at.c

895

par |= FIELD_PREP(SYS_PAR_EL1_SH, ATTR_OSH);

arch/arm64/kvm/at.c

918

par |= FIELD_PREP(SYS_PAR_EL1_ATTR, mair);

arch/arm64/kvm/at.c

922

par |= FIELD_PREP(SYS_PAR_EL1_SH, sh);

arch/arm64/kvm/debug.c

45

vcpu->arch.mdcr_el2 = FIELD_PREP(MDCR_EL2_HPMN,

arch/arm64/kvm/emulate-nested.c

2712

esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_FPAC);

arch/arm64/kvm/emulate-nested.c

2854

u64 esr = FIELD_PREP(ESR_ELx_EC_MASK,

arch/arm64/kvm/emulate-nested.c

2873

esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SERROR);

arch/arm64/kvm/hyp/include/nvhe/memory.h

41

prot |= FIELD_PREP(PKVM_PAGE_STATE_PROT_MASK, state);

arch/arm64/kvm/hyp/pgtable.c

111

pte |= FIELD_PREP(KVM_PTE_TYPE, type);

arch/arm64/kvm/hyp/pgtable.c

119

return FIELD_PREP(KVM_INVALID_PTE_OWNER_MASK, owner_id);

arch/arm64/kvm/hyp/pgtable.c

337

kvm_pte_t attr = FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX, mtype);

arch/arm64/kvm/hyp/pgtable.c

369

attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_AP, ap);

arch/arm64/kvm/hyp/pgtable.c

371

attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh);

arch/arm64/kvm/hyp/pgtable.c

604

vtcr |= FIELD_PREP(VTCR_EL2_PS, kvm_get_parange(mmfr0));

arch/arm64/kvm/hyp/pgtable.c

605

vtcr |= FIELD_PREP(VTCR_EL2_T0SZ, (UL(64) - phys_shift));

arch/arm64/kvm/hyp/pgtable.c

703

*attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_HI_S2_XN, xn);

arch/arm64/kvm/hyp/pgtable.c

743

attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh);

arch/arm64/kvm/hyp/pgtable.c

99

pte |= FIELD_PREP(KVM_PTE_TYPE, KVM_PTE_TYPE_TABLE);

arch/arm64/kvm/hyp/vgic-v3-sr.c

1050

val |= FIELD_PREP(ICC_CTLR_EL1_EOImode_MASK,

arch/arm64/kvm/hyp/vgic-v3-sr.c

1053

val |= FIELD_PREP(ICC_CTLR_EL1_CBPR_MASK,

arch/arm64/kvm/hyp/vhe/switch.c

515

vcpu->arch.fault.esr_el2 = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SYS64) |

arch/arm64/kvm/hyp/vhe/switch.c

516

FIELD_PREP(ESR_ELx_ISS_MASK, iss) |

arch/arm64/kvm/inject_fault.c

262

u64 esr = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_DABT_LOW) |

arch/arm64/kvm/inject_fault.c

263

FIELD_PREP(ESR_ELx_FSC, ESR_ELx_FSC_EXCL_ATOMIC) |

arch/arm64/kvm/inject_fault.c

392

esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SERROR);

arch/arm64/kvm/nested.c

1350

esr |= FIELD_PREP(ESR_ELx_FSC,

arch/arm64/kvm/nested.c

1427

esr |= FIELD_PREP(ESR_ELx_FSC, vt->wr.fst);

arch/arm64/kvm/pmu-emul.c

1040

val |= FIELD_PREP(MDCR_EL2_HPMN, kvm->arch.nr_pmu_counters);

arch/arm64/kvm/sys_regs.h

264

(val) |= FIELD_PREP(reg##_##field##_MASK, \

arch/arm64/kvm/vgic-sys-reg-v3.c

105

*val = FIELD_PREP(ICC_PMR_EL1_MASK, vmcr.pmr);

arch/arm64/kvm/vgic-sys-reg-v3.c

128

*val = FIELD_PREP(ICC_BPR0_EL1_MASK, vmcr.bpr);

arch/arm64/kvm/vgic-sys-reg-v3.c

154

*val = FIELD_PREP(ICC_BPR1_EL1_MASK, vmcr.abpr);

arch/arm64/kvm/vgic-sys-reg-v3.c

180

*val = FIELD_PREP(ICC_IGRPEN0_EL1_MASK, vmcr.grpen0);

arch/arm64/kvm/vgic-sys-reg-v3.c

68

val |= FIELD_PREP(ICC_CTLR_EL1_PRI_BITS_MASK, vgic_v3_cpu->num_pri_bits - 1);

arch/arm64/kvm/vgic-sys-reg-v3.c

69

val |= FIELD_PREP(ICC_CTLR_EL1_ID_BITS_MASK, vgic_v3_cpu->num_id_bits);

arch/arm64/kvm/vgic-sys-reg-v3.c

70

val |= FIELD_PREP(ICC_CTLR_EL1_SEIS_MASK,

arch/arm64/kvm/vgic-sys-reg-v3.c

73

val |= FIELD_PREP(ICC_CTLR_EL1_A3V_MASK,

arch/arm64/kvm/vgic-sys-reg-v3.c

79

val |= FIELD_PREP(ICC_CTLR_EL1_CBPR_MASK, vmcr.cbpr);

arch/arm64/kvm/vgic-sys-reg-v3.c

80

val |= FIELD_PREP(ICC_CTLR_EL1_EOImode_MASK, vmcr.eoim);

arch/arm64/kvm/vgic/vgic-mmio-v3.c

145

val |= FIELD_PREP(GICD_CTLR_nASSGIreq, is_hwsgi);

arch/arm64/kvm/vgic/vgic-v3-nested.c

236

lr |= FIELD_PREP(ICH_LR_PHYS_ID_MASK, (u64)irq->hwintid);

arch/arm64/kvm/vgic/vgic-v3.c

141

gic_insn(intid | FIELD_PREP(GICV5_GIC_CDDI_TYPE_MASK, 1), CDDI);

arch/arm64/kvm/vgic/vgic-v3.c

411

vmcr = FIELD_PREP(ICH_VMCR_EL2_VAckCtl, vmcrp->ackctl);

arch/arm64/kvm/vgic/vgic-v3.c

412

vmcr |= FIELD_PREP(ICH_VMCR_EL2_VFIQEn, vmcrp->fiqen);

arch/arm64/kvm/vgic/vgic-v3.c

421

vmcr |= FIELD_PREP(ICH_VMCR_EL2_VCBPR, vmcrp->cbpr);

arch/arm64/kvm/vgic/vgic-v3.c

422

vmcr |= FIELD_PREP(ICH_VMCR_EL2_VEOIM, vmcrp->eoim);

arch/arm64/kvm/vgic/vgic-v3.c

423

vmcr |= FIELD_PREP(ICH_VMCR_EL2_VBPR1, vmcrp->abpr);

arch/arm64/kvm/vgic/vgic-v3.c

424

vmcr |= FIELD_PREP(ICH_VMCR_EL2_VBPR0, vmcrp->bpr);

arch/arm64/kvm/vgic/vgic-v3.c

425

vmcr |= FIELD_PREP(ICH_VMCR_EL2_VPMR, vmcrp->pmr);

arch/arm64/kvm/vgic/vgic-v3.c

426

vmcr |= FIELD_PREP(ICH_VMCR_EL2_VENG0, vmcrp->grpen0);

arch/arm64/kvm/vgic/vgic-v3.c

427

vmcr |= FIELD_PREP(ICH_VMCR_EL2_VENG1, vmcrp->grpen1);

arch/arm64/mm/context.c

361

ttbr0 |= FIELD_PREP(TTBR_ASID_MASK, asid);

arch/arm64/mm/context.c

365

ttbr1 |= FIELD_PREP(TTBR_ASID_MASK, asid);

arch/arm64/net/bpf_jit_comp.c

1168

ex->fixup = FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);

arch/arm64/net/bpf_jit_comp.c

1185

ex->fixup |= FIELD_PREP(BPF_FIXUP_OFFSET_MASK, off) |

arch/arm64/net/bpf_jit_comp.c

1186

FIELD_PREP(BPF_FIXUP_ARENA_REG_MASK, arena_reg);

arch/loongarch/net/bpf_jit.c

531

ex->fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, fixup_offset) |

arch/loongarch/net/bpf_jit.c

532

FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);

arch/mips/include/asm/mips-cm.h

191

(FIELD_PREP(CM_GCR_REV_MAJOR, major) | \

arch/mips/include/asm/mips-cm.h

192

FIELD_PREP(CM_GCR_REV_MINOR, minor))

arch/mips/kernel/mips-cm.c

327

val = FIELD_PREP(CM3_GCR_Cx_OTHER_CORE, core) |

arch/mips/kernel/mips-cm.c

328

FIELD_PREP(CM3_GCR_Cx_OTHER_VP, vp);

arch/mips/kernel/mips-cm.c

334

val |= FIELD_PREP(CM_GCR_Cx_OTHER_CLUSTER, cluster);

arch/mips/kernel/mips-cm.c

335

val |= FIELD_PREP(CM_GCR_Cx_OTHER_BLOCK, block);

arch/mips/kernel/mips-cm.c

365

val = FIELD_PREP(CM_GCR_Cx_OTHER_CORENUM, core);

arch/mips/kernel/mips-cpc.c

102

write_cpc_cl_other(FIELD_PREP(CPC_Cx_OTHER_CORENUM, core));

arch/powerpc/platforms/powernv/ocxl.c

542

val |= FIELD_PREP(PNV_OCXL_ATSD_AVA_AVA, addr >> (63-51));

arch/powerpc/platforms/powernv/ocxl.c

550

val |= FIELD_PREP(PNV_OCXL_ATSD_LNCH_RIC, 0b10);

arch/powerpc/platforms/powernv/ocxl.c

552

val |= FIELD_PREP(PNV_OCXL_ATSD_LNCH_IS, 0b00);

arch/powerpc/platforms/powernv/ocxl.c

554

val |= FIELD_PREP(PNV_OCXL_ATSD_LNCH_IS, 0b01);

arch/powerpc/platforms/powernv/ocxl.c

571

val |= FIELD_PREP(PNV_OCXL_ATSD_LNCH_AP, size);

arch/powerpc/platforms/powernv/ocxl.c

572

val |= FIELD_PREP(PNV_OCXL_ATSD_LNCH_PID, pid);

arch/powerpc/platforms/pseries/plpks.c

36

FIELD_PREP(WRAPFLAG_BE_GENMASK(be_bit_hi, be_bit_lo), (val))

arch/riscv/kernel/process.c

388

ret = FIELD_PREP(PR_PMLEN_MASK, PMLEN_7);

arch/riscv/kernel/process.c

391

ret = FIELD_PREP(PR_PMLEN_MASK, PMLEN_16);

arch/riscv/net/bpf_jit_comp64.c

827

ex->fixup = FIELD_PREP(BPF_FIXUP_OFFSET_MASK, fixup_offset) |

arch/riscv/net/bpf_jit_comp64.c

828

FIELD_PREP(BPF_FIXUP_REG_MASK, dst_reg);

arch/x86/net/bpf_jit_comp.c

2220

ex->fixup = FIELD_PREP(FIXUP_INSN_LEN_MASK, prog - start_of_ldx) |

arch/x86/net/bpf_jit_comp.c

2221

FIELD_PREP(FIXUP_ARENA_REG_MASK, arena_reg) |

arch/x86/net/bpf_jit_comp.c

2222

FIELD_PREP(FIXUP_REG_MASK, fixup_reg);

arch/x86/net/bpf_jit_comp.c

2225

ex->data |= FIELD_PREP(DATA_ARENA_OFFSET_MASK, insn->off);

arch/x86/net/bpf_jit_comp.c

2343

ex->fixup = FIELD_PREP(FIXUP_INSN_LEN_MASK, prog - start_of_ldx) |

arch/x86/net/bpf_jit_comp.c

2344

FIELD_PREP(FIXUP_REG_MASK, reg2pt_regs[dst_reg]);

drivers/accel/amdxdna/aie2_message.c

1099

req.type = FIELD_PREP(AIE2_MSG_SYNC_BO_SRC_TYPE, SYNC_BO_DEV_MEM) |

drivers/accel/amdxdna/aie2_message.c

1100

FIELD_PREP(AIE2_MSG_SYNC_BO_DST_TYPE, SYNC_BO_HOST_MEM);

drivers/accel/amdxdna/aie2_message.c

534

req.cfgs[i] = FIELD_PREP(AIE2_MSG_CFG_CU_PDI_ADDR,

drivers/accel/amdxdna/aie2_message.c

536

req.cfgs[i] |= FIELD_PREP(AIE2_MSG_CFG_CU_FUNC, cu->cu_func);

drivers/accel/amdxdna/amdxdna_ctx.c

148

cmd->header |= FIELD_PREP(AMDXDNA_CMD_STATE, error_state);

drivers/accel/amdxdna/amdxdna_ctx.h

157

cmd->header |= FIELD_PREP(AMDXDNA_CMD_STATE, s);

drivers/accel/amdxdna/amdxdna_error.h

46

(FIELD_PREP(AMDXDNA_ERR_NUM_MASK, err_num) | \

drivers/accel/amdxdna/amdxdna_error.h

49

FIELD_PREP(AMDXDNA_ERR_MOD_MASK, err_mod) | \

drivers/accel/amdxdna/amdxdna_error.h

56

(FIELD_PREP(AMDXDNA_EXTRA_ERR_COL_MASK, col) | \

drivers/accel/amdxdna/amdxdna_error.h

57

FIELD_PREP(AMDXDNA_EXTRA_ERR_ROW_MASK, row))

drivers/accel/amdxdna/amdxdna_mailbox.c

433

header->sz_ver = FIELD_PREP(MSG_BODY_SZ, msg->send_size) |

drivers/accel/amdxdna/amdxdna_mailbox.c

434

FIELD_PREP(MSG_PROTO_VER, MSG_PROTOCOL_VERSION);

drivers/accel/habanalabs/common/firmware_if.c

1812

val = FIELD_PREP(COMMS_COMMAND_CMD_MASK, cmd);

drivers/accel/habanalabs/common/firmware_if.c

1813

val |= FIELD_PREP(COMMS_COMMAND_SIZE_MASK, size);

drivers/accel/habanalabs/common/hw_queue.c

308

FIELD_PREP(CQ_ENTRY_SHADOW_INDEX_VALID_MASK, 1) |

drivers/accel/habanalabs/common/hw_queue.c

309

FIELD_PREP(CQ_ENTRY_READY_MASK, 1));

drivers/accel/habanalabs/common/pci/pci.c

277

ctrl_reg_val = FIELD_PREP(IATU_REGION_CTRL_REGION_EN_MASK, 1);

drivers/accel/habanalabs/common/pci/pci.c

278

ctrl_reg_val |= FIELD_PREP(IATU_REGION_CTRL_MATCH_MODE_MASK, pci_region->mode);

drivers/accel/habanalabs/common/pci/pci.c

279

ctrl_reg_val |= FIELD_PREP(IATU_REGION_CTRL_NUM_MATCH_EN_MASK, 1);

drivers/accel/habanalabs/common/pci/pci.c

282

ctrl_reg_val |= FIELD_PREP(IATU_REGION_CTRL_BAR_NUM_MASK, pci_region->bar);

drivers/accel/habanalabs/gaudi/gaudi.c

3139

FIELD_PREP(HW_CAP_TPC_MASK, 1 << tpc_id);

drivers/accel/habanalabs/gaudi/gaudi.c

4748

tmp = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_PROT);

drivers/accel/habanalabs/gaudi/gaudi.c

4749

tmp |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

4750

tmp |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5551

cq_padding->ctl = cpu_to_le32(FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_NOP));

drivers/accel/habanalabs/gaudi/gaudi.c

5555

tmp = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_PROT);

drivers/accel/habanalabs/gaudi/gaudi.c

5556

tmp |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5559

tmp |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5567

tmp = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_PROT);

drivers/accel/habanalabs/gaudi/gaudi.c

5568

tmp |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5597

ctl = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_LIN_DMA);

drivers/accel/habanalabs/gaudi/gaudi.c

5598

ctl |= FIELD_PREP(GAUDI_PKT_LIN_DMA_CTL_MEMSET_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5599

ctl |= FIELD_PREP(GAUDI_PKT_LIN_DMA_CTL_LIN_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5600

ctl |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5601

ctl |= FIELD_PREP(GAUDI_PKT_CTL_RB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5681

ctl = FIELD_PREP(GAUDI_PKT_LONG_CTL_OP_MASK, 0); /* write the value */

drivers/accel/habanalabs/gaudi/gaudi.c

5682

ctl |= FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_LONG);

drivers/accel/habanalabs/gaudi/gaudi.c

5683

ctl |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5684

ctl |= FIELD_PREP(GAUDI_PKT_CTL_RB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

5685

ctl |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

6387

tmp = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_PROT);

drivers/accel/habanalabs/gaudi/gaudi.c

6388

tmp |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

6389

tmp |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

6775

reg |= FIELD_PREP(GAUDI_ECC_MEM_INFO_CLR_DERR_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

6777

reg |= FIELD_PREP(GAUDI_ECC_MEM_INFO_CLR_SERR_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8471

value = FIELD_PREP(GAUDI_PKT_SHORT_VAL_SOB_SYNC_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8472

value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_SOB_MOD_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8474

ctl = FIELD_PREP(GAUDI_PKT_SHORT_CTL_ADDR_MASK, sob_id * 4);

drivers/accel/habanalabs/gaudi/gaudi.c

8475

ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_OP_MASK, 0); /* write the value */

drivers/accel/habanalabs/gaudi/gaudi.c

8476

ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_BASE_MASK, 3); /* W_S SOB base */

drivers/accel/habanalabs/gaudi/gaudi.c

8477

ctl |= FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_SHORT);

drivers/accel/habanalabs/gaudi/gaudi.c

8478

ctl |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, eb);

drivers/accel/habanalabs/gaudi/gaudi.c

8479

ctl |= FIELD_PREP(GAUDI_PKT_CTL_RB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8480

ctl |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8495

ctl = FIELD_PREP(GAUDI_PKT_SHORT_CTL_ADDR_MASK, addr);

drivers/accel/habanalabs/gaudi/gaudi.c

8496

ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_BASE_MASK, 2); /* W_S MON base */

drivers/accel/habanalabs/gaudi/gaudi.c

8497

ctl |= FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_SHORT);

drivers/accel/habanalabs/gaudi/gaudi.c

8498

ctl |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

8499

ctl |= FIELD_PREP(GAUDI_PKT_CTL_RB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8500

ctl |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 0); /* last pkt MB */

drivers/accel/habanalabs/gaudi/gaudi.c

8537

value = FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_SYNC_GID_MASK, sob_base / 8);

drivers/accel/habanalabs/gaudi/gaudi.c

8538

value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_SYNC_VAL_MASK, sob_val);

drivers/accel/habanalabs/gaudi/gaudi.c

8539

value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_MODE_MASK,

drivers/accel/habanalabs/gaudi/gaudi.c

8541

value |= FIELD_PREP(GAUDI_PKT_SHORT_VAL_MON_MASK_MASK, mask);

drivers/accel/habanalabs/gaudi/gaudi.c

8543

ctl = FIELD_PREP(GAUDI_PKT_SHORT_CTL_ADDR_MASK, msg_addr_offset);

drivers/accel/habanalabs/gaudi/gaudi.c

8544

ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_OP_MASK, 0); /* write the value */

drivers/accel/habanalabs/gaudi/gaudi.c

8545

ctl |= FIELD_PREP(GAUDI_PKT_SHORT_CTL_BASE_MASK, 2); /* W_S MON base */

drivers/accel/habanalabs/gaudi/gaudi.c

8546

ctl |= FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_SHORT);

drivers/accel/habanalabs/gaudi/gaudi.c

8547

ctl |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

8548

ctl |= FIELD_PREP(GAUDI_PKT_CTL_RB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8549

ctl |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8563

cfg = FIELD_PREP(GAUDI_PKT_FENCE_CFG_DEC_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8564

cfg |= FIELD_PREP(GAUDI_PKT_FENCE_CFG_TARGET_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8565

cfg |= FIELD_PREP(GAUDI_PKT_FENCE_CFG_ID_MASK, 2);

drivers/accel/habanalabs/gaudi/gaudi.c

8567

ctl = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_FENCE);

drivers/accel/habanalabs/gaudi/gaudi.c

8568

ctl |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

8569

ctl |= FIELD_PREP(GAUDI_PKT_CTL_RB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

8570

ctl |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

986

ctl = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_LIN_DMA);

drivers/accel/habanalabs/gaudi/gaudi.c

987

ctl |= FIELD_PREP(GAUDI_PKT_LIN_DMA_CTL_LIN_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

988

ctl |= FIELD_PREP(GAUDI_PKT_CTL_RB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

989

ctl |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

996

dst_addr = FIELD_PREP(GAUDI_PKT_LIN_DMA_DST_ADDR_MASK,

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

647

val = FIELD_PREP(

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

650

val |= FIELD_PREP(

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

656

val |= FIELD_PREP(PSOC_ETR_AXICTL_WRBURSTLEN_MASK,

drivers/accel/habanalabs/gaudi2/gaudi2.c

10638

ctl = FIELD_PREP(GAUDI2_PKT_CTL_OPCODE_MASK, PACKET_LIN_DMA);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10639

ctl |= FIELD_PREP(GAUDI2_PKT_LIN_DMA_CTL_MEMSET_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10640

ctl |= FIELD_PREP(GAUDI2_PKT_LIN_DMA_CTL_WRCOMP_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10641

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_EB_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10690

comp_val = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_INC_MASK, 1) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

10691

FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10692

mmubp = FIELD_PREP(ARC_FARM_KDMA_CTX_AXUSER_HB_MMU_BP_WR_MASK, 1) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

10693

FIELD_PREP(ARC_FARM_KDMA_CTX_AXUSER_HB_MMU_BP_RD_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11334

value = FIELD_PREP(GAUDI2_PKT_SHORT_VAL_SOB_SYNC_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11335

value |= FIELD_PREP(GAUDI2_PKT_SHORT_VAL_SOB_MOD_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11337

ctl = FIELD_PREP(GAUDI2_PKT_SHORT_CTL_ADDR_MASK, sob_id * 4);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11338

ctl |= FIELD_PREP(GAUDI2_PKT_SHORT_CTL_BASE_MASK, 1); /* SOB base */

drivers/accel/habanalabs/gaudi2/gaudi2.c

11339

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_OPCODE_MASK, PACKET_MSG_SHORT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11340

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_EB_MASK, eb);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11341

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11355

ctl = FIELD_PREP(GAUDI2_PKT_SHORT_CTL_ADDR_MASK, addr);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11356

ctl |= FIELD_PREP(GAUDI2_PKT_SHORT_CTL_BASE_MASK, 0); /* MON base */

drivers/accel/habanalabs/gaudi2/gaudi2.c

11357

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_OPCODE_MASK, PACKET_MSG_SHORT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11358

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_EB_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11359

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_MB_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11380

value = FIELD_PREP(GAUDI2_PKT_SHORT_VAL_MON_SYNC_GID_MASK, sob_base / 8);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11381

value |= FIELD_PREP(GAUDI2_PKT_SHORT_VAL_MON_SYNC_VAL_MASK, sob_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11382

value |= FIELD_PREP(GAUDI2_PKT_SHORT_VAL_MON_MODE_MASK, 0); /* GREATER OR EQUAL*/

drivers/accel/habanalabs/gaudi2/gaudi2.c

11383

value |= FIELD_PREP(GAUDI2_PKT_SHORT_VAL_MON_MASK_MASK, mask);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11385

ctl = FIELD_PREP(GAUDI2_PKT_SHORT_CTL_ADDR_MASK, addr);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11386

ctl |= FIELD_PREP(GAUDI2_PKT_SHORT_CTL_BASE_MASK, 0); /* MON base */

drivers/accel/habanalabs/gaudi2/gaudi2.c

11387

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_OPCODE_MASK, PACKET_MSG_SHORT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11388

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_EB_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11389

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11403

cfg = FIELD_PREP(GAUDI2_PKT_FENCE_CFG_DEC_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11404

cfg |= FIELD_PREP(GAUDI2_PKT_FENCE_CFG_TARGET_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11405

cfg |= FIELD_PREP(GAUDI2_PKT_FENCE_CFG_ID_MASK, 2);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11407

ctl = FIELD_PREP(GAUDI2_PKT_CTL_OPCODE_MASK, PACKET_FENCE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11408

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_EB_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11409

ctl |= FIELD_PREP(GAUDI2_PKT_CTL_MB_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

3622

reg_val = FIELD_PREP(ARC_FARM_ARC0_AUX_MME_ARC_UPPER_DCCM_EN_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

3632

reg_val = FIELD_PREP(ARC_FARM_ARC0_AUX_MME_ARC_UPPER_DCCM_EN_VAL_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4365

reg_val = FIELD_PREP(PDMA0_CORE_CFG_1_HALT_MASK, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4440

reg_val = FIELD_PREP(ROT_MSS_HALT_WBC_MASK, 0x1) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

4441

FIELD_PREP(ROT_MSS_HALT_RSB_MASK, 0x1) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

4442

FIELD_PREP(ROT_MSS_HALT_MRSB_MASK, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4851

u32 reg_val = FIELD_PREP(DCORE0_VDEC0_BRDG_CTRL_GRACEFUL_STOP_MASK, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4891

u32 reg_val = FIELD_PREP(DCORE0_VDEC0_BRDG_CTRL_GRACEFUL_STOP_MASK, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4949

reg_val = FIELD_PREP(ARC_FARM_ARC0_AUX_RUN_HALT_REQ_RUN_REQ_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4951

reg_val = FIELD_PREP(ARC_FARM_ARC0_AUX_RUN_HALT_REQ_HALT_REQ_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4986

val = FIELD_PREP(ARC_FARM_ARC0_AUX_RUN_HALT_REQ_RUN_REQ_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5065

reg_val = FIELD_PREP(DCORE0_TPC0_CFG_TPC_STALL_V_MASK,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5089

reg_val = FIELD_PREP(DCORE0_MME_CTRL_LO_QM_STALL_V_MASK,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5110

reg_val = FIELD_PREP(DCORE0_EDMA0_CORE_CFG_1_HALT_MASK,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5115

reg_val = FIELD_PREP(DCORE0_EDMA0_CORE_CFG_1_HALT_MASK, 0x1) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

5116

FIELD_PREP(DCORE0_EDMA0_CORE_CFG_1_FLUSH_MASK, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5414

WREG32(reg_base + QM_CP_CFG_OFFSET, FIELD_PREP(PDMA0_QM_CP_CFG_SWITCH_EN_MASK, 0x1));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5693

payload = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_VAL_MASK, 0x7FFF) | /* "-1" */

drivers/accel/habanalabs/gaudi2/gaudi2.c

5694

FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_SIGN_MASK, 1) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

5695

FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_INC_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5708

arm = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_ARM_SID_MASK, sob_group) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

5709

FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_ARM_MASK_MASK, mask) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

5710

FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_ARM_SOP_MASK, mode) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

5711

FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_ARM_SOD_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5719

config = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_CONFIG_WR_NUM_MASK, 2); /* "2": 3 writes */

drivers/accel/habanalabs/gaudi2/gaudi2.c

5762

reg_val = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_CONFIG_CQ_EN_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5763

reg_val |= FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_CONFIG_LBW_EN_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5769

reg_val = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_CONFIG_CQ_EN_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5803

reg_val = FIELD_PREP(MME_ACC_INTR_MASK_WBC_ERR_RESP_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5804

reg_val |= FIELD_PREP(MME_ACC_INTR_MASK_AP_SRC_POS_INF_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5805

reg_val |= FIELD_PREP(MME_ACC_INTR_MASK_AP_SRC_NEG_INF_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5806

reg_val |= FIELD_PREP(MME_ACC_INTR_MASK_AP_SRC_NAN_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5807

reg_val |= FIELD_PREP(MME_ACC_INTR_MASK_AP_RESULT_POS_INF_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5808

reg_val |= FIELD_PREP(MME_ACC_INTR_MASK_AP_RESULT_NEG_INF_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6379

FIELD_PREP(DCORE0_HMMU0_MMU_STATIC_MULTI_PAGE_SIZE_HOP5_PAGE_SIZE_MASK, 4) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

6380

FIELD_PREP(DCORE0_HMMU0_MMU_STATIC_MULTI_PAGE_SIZE_HOP4_PAGE_SIZE_MASK, 3) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

6381

FIELD_PREP(

drivers/accel/habanalabs/gaudi2/gaudi2.c

6427

FIELD_PREP(DCORE0_HMMU0_STLB_HOP_CONFIGURATION_FIRST_HOP_MASK, 0) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

6428

FIELD_PREP(DCORE0_HMMU0_STLB_HOP_CONFIGURATION_FIRST_LOOKUP_HOP_SMALL_P_MASK, 3) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

6429

FIELD_PREP(DCORE0_HMMU0_STLB_HOP_CONFIGURATION_FIRST_LOOKUP_HOP_LARGE_P_MASK, 3) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

6430

FIELD_PREP(DCORE0_HMMU0_STLB_HOP_CONFIGURATION_LAST_HOP_MASK, 3) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

6431

FIELD_PREP(DCORE0_HMMU0_STLB_HOP_CONFIGURATION_FOLLOWER_HOP_MASK, 3),

drivers/accel/habanalabs/gaudi2/gaudi2.c

7255

mon_arm = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_ARM_SOD_MASK, sync_value);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7256

mon_arm |= FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_ARM_SOP_MASK, mode);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7257

mon_arm |= FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_ARM_MASK_MASK, mask);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7258

mon_arm |= FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_ARM_SID_MASK, sync_group_id);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7280

comp_val = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_INC_MASK, 1) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

7281

FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_VAL_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7292

commit_mask = FIELD_PREP(ARC_FARM_KDMA_CTX_COMMIT_LIN_MASK, 1) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

7293

FIELD_PREP(ARC_FARM_KDMA_CTX_COMMIT_WR_COMP_EN_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7296

commit_mask |= FIELD_PREP(ARC_FARM_KDMA_CTX_COMMIT_MEM_SET_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8043

reg_val = FIELD_PREP(ARC_FARM_ARC0_AUX_ARC_REGION_CFG_MMU_BP_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8044

reg_val |= FIELD_PREP(ARC_FARM_ARC0_AUX_ARC_REGION_CFG_0_ASID_MASK, asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8106

rw_asid = FIELD_PREP(ARC_FARM_KDMA_CTX_AXUSER_HB_ASID_RD_MASK, asid) |

drivers/accel/habanalabs/gaudi2/gaudi2.c

8107

FIELD_PREP(ARC_FARM_KDMA_CTX_AXUSER_HB_ASID_WR_MASK, asid);

drivers/accel/habanalabs/gaudi2/gaudi2P.h

237

#define GAUDI2_SOB_INCREMENT_BY_ONE (FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_VAL_MASK, 1) | \

drivers/accel/habanalabs/gaudi2/gaudi2P.h

238

FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_SOB_OBJ_INC_MASK, 1))

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2259

val = FIELD_PREP(PSOC_ETR_AXICTL_PROTCTRLBIT0_MASK, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2261

val |= FIELD_PREP(PSOC_ETR_AXICTL_PROTCTRLBIT1_MASK, 1);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2263

val |= FIELD_PREP(PSOC_ETR_AXICTL_WRBURSTLEN_MASK, 0xF);

drivers/accel/habanalabs/goya/goya_coresight.c

444

val = FIELD_PREP(PSOC_ETR_AXICTL_PROTCTRLBIT0_MASK, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

446

val |= FIELD_PREP(PSOC_ETR_AXICTL_PROTCTRLBIT1_MASK, 1);

drivers/accel/habanalabs/goya/goya_coresight.c

448

val |= FIELD_PREP(PSOC_ETR_AXICTL_WRBURSTLEN_MASK, 7);

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

100

(FIELD_PREP(MME0_QM_GLBL_ERR_CFG_PQF_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

101

(FIELD_PREP(MME0_QM_GLBL_ERR_CFG_CQF_STOP_ON_ERR_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

102

(FIELD_PREP(MME0_QM_GLBL_ERR_CFG_CP_STOP_ON_ERR_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

103

(FIELD_PREP(MME0_QM_GLBL_ERR_CFG_ARB_STOP_ON_ERR_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

106

(FIELD_PREP(NIC0_QM0_GLBL_ERR_CFG_PQF_ERR_MSG_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

107

(FIELD_PREP(NIC0_QM0_GLBL_ERR_CFG_CQF_ERR_MSG_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

108

(FIELD_PREP(NIC0_QM0_GLBL_ERR_CFG_CP_ERR_MSG_EN_MASK, 0xF)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

111

(FIELD_PREP(NIC0_QM0_GLBL_ERR_CFG_PQF_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

112

(FIELD_PREP(NIC0_QM0_GLBL_ERR_CFG_CQF_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

113

(FIELD_PREP(NIC0_QM0_GLBL_ERR_CFG_CP_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

114

(FIELD_PREP(NIC0_QM0_GLBL_ERR_CFG_ARB_STOP_ON_ERR_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

116

#define QMAN_CGM1_PWR_GATE_EN (FIELD_PREP(DMA0_QM_CGM_CFG1_MASK_TH_MASK, 0xA))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

15

(FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

16

(FIELD_PREP(DMA0_QM_GLBL_CFG0_CQF_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

17

(FIELD_PREP(DMA0_QM_GLBL_CFG0_CP_EN_MASK, 0xF)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

20

(FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

21

(FIELD_PREP(DMA0_QM_GLBL_PROT_CQF_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

22

(FIELD_PREP(DMA0_QM_GLBL_PROT_CP_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

23

(FIELD_PREP(DMA0_QM_GLBL_PROT_ERR_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

26

(FIELD_PREP(DMA0_QM_GLBL_PROT_PQF_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

27

(FIELD_PREP(DMA0_QM_GLBL_PROT_ERR_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

30

(FIELD_PREP(DMA0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

31

(FIELD_PREP(DMA0_QM_GLBL_CFG0_CQF_EN_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

32

(FIELD_PREP(DMA0_QM_GLBL_CFG0_CP_EN_MASK, 0x1F)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

35

(FIELD_PREP(MME0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

36

(FIELD_PREP(MME0_QM_GLBL_CFG0_CQF_EN_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

37

(FIELD_PREP(MME0_QM_GLBL_CFG0_CP_EN_MASK, 0x1F)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

40

(FIELD_PREP(TPC0_QM_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

41

(FIELD_PREP(TPC0_QM_GLBL_CFG0_CQF_EN_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

42

(FIELD_PREP(TPC0_QM_GLBL_CFG0_CP_EN_MASK, 0x1F)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

45

(FIELD_PREP(NIC0_QM0_GLBL_CFG0_PQF_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

46

(FIELD_PREP(NIC0_QM0_GLBL_CFG0_CQF_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

47

(FIELD_PREP(NIC0_QM0_GLBL_CFG0_CP_EN_MASK, 0xF)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

50

(FIELD_PREP(DMA0_QM_CGM_CFG_IDLE_TH_MASK, 0x20)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

51

(FIELD_PREP(DMA0_QM_CGM_CFG_G2F_TH_MASK, 0xA)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

52

(FIELD_PREP(DMA0_QM_CGM_CFG_CP_IDLE_MASK_MASK, 0x10)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

53

(FIELD_PREP(DMA0_QM_CGM_CFG_EN_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

56

(FIELD_PREP(DMA0_QM_CGM_CFG_IDLE_TH_MASK, 0x20)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

57

(FIELD_PREP(DMA0_QM_CGM_CFG_G2F_TH_MASK, 0xA)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

58

(FIELD_PREP(DMA0_QM_CGM_CFG_CP_IDLE_MASK_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

59

(FIELD_PREP(DMA0_QM_CGM_CFG_EN_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

62

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_PQF_ERR_MSG_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

63

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_CQF_ERR_MSG_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

64

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_CP_ERR_MSG_EN_MASK, 0xF)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

67

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_PQF_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

68

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_CQF_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

69

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_CP_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

70

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_ARB_STOP_ON_ERR_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

73

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_PQF_ERR_MSG_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

74

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_CQF_ERR_MSG_EN_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

75

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_CP_ERR_MSG_EN_MASK, 0x1F)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

78

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_PQF_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

79

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_CQF_STOP_ON_ERR_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

80

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_CP_STOP_ON_ERR_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

81

(FIELD_PREP(DMA0_QM_GLBL_ERR_CFG_ARB_STOP_ON_ERR_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

84

(FIELD_PREP(TPC0_QM_GLBL_ERR_CFG_PQF_ERR_MSG_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

85

(FIELD_PREP(TPC0_QM_GLBL_ERR_CFG_CQF_ERR_MSG_EN_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

86

(FIELD_PREP(TPC0_QM_GLBL_ERR_CFG_CP_ERR_MSG_EN_MASK, 0x1F)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

89

(FIELD_PREP(TPC0_QM_GLBL_ERR_CFG_PQF_STOP_ON_ERR_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

90

(FIELD_PREP(TPC0_QM_GLBL_ERR_CFG_CQF_STOP_ON_ERR_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

91

(FIELD_PREP(TPC0_QM_GLBL_ERR_CFG_CP_STOP_ON_ERR_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

92

(FIELD_PREP(TPC0_QM_GLBL_ERR_CFG_ARB_STOP_ON_ERR_MASK, 0x1)))

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

95

(FIELD_PREP(MME0_QM_GLBL_ERR_CFG_PQF_ERR_MSG_EN_MASK, 0xF)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

96

(FIELD_PREP(MME0_QM_GLBL_ERR_CFG_CQF_ERR_MSG_EN_MASK, 0x1F)) | \

drivers/accel/habanalabs/include/gaudi/gaudi_masks.h

97

(FIELD_PREP(MME0_QM_GLBL_ERR_CFG_CP_ERR_MSG_EN_MASK, 0x1F)))

drivers/accel/ivpu/ivpu_drv.c

265

file_priv->job_limit.min = FIELD_PREP(IVPU_JOB_ID_CONTEXT_MASK, (file_priv->ctx.id - 1));

drivers/accel/ivpu/ivpu_hw_reg_io.h

35

FIELD_PREP(REG##_##FLD##_MASK, num)

drivers/accel/ivpu/ivpu_hw_reg_io.h

43

(((val) & ~(REG##_##FLD##_MASK)) | FIELD_PREP(REG##_##FLD##_MASK, num))

drivers/accel/ivpu/ivpu_hw_reg_io.h

51

FIELD_PREP(reg##_##fld##_MASK, exp_fld_val), timeout_us, \

drivers/accel/ivpu/ivpu_hw_reg_io.h

56

FIELD_PREP(reg##_##fld##_MASK, exp_fld_val), timeout_us, \

drivers/accel/ivpu/ivpu_mmu.c

516

val = FIELD_PREP(IVPU_MMU_CMD_OPCODE, CMD_SYNC);

drivers/accel/ivpu/ivpu_mmu.c

543

u64 data0 = FIELD_PREP(IVPU_MMU_CMD_OPCODE, CMD_CFGI_ALL);

drivers/accel/ivpu/ivpu_mmu.c

544

u64 data1 = FIELD_PREP(IVPU_MMU_CMD_CFGI_1_RANGE, 0x1f);

drivers/accel/ivpu/ivpu_mmu.c

551

u64 val = FIELD_PREP(IVPU_MMU_CMD_OPCODE, CMD_TLBI_NH_ASID) |

drivers/accel/ivpu/ivpu_mmu.c

552

FIELD_PREP(IVPU_MMU_CMD_TLBI_0_ASID, ssid);

drivers/accel/ivpu/ivpu_mmu.c

559

u64 val = FIELD_PREP(IVPU_MMU_CMD_OPCODE, CMD_TLBI_NSNH_ALL);

drivers/accel/ivpu/ivpu_mmu.c

584

val = FIELD_PREP(IVPU_MMU_CR1_TABLE_SH, IVPU_MMU_SH_ISH) |

drivers/accel/ivpu/ivpu_mmu.c

585

FIELD_PREP(IVPU_MMU_CR1_TABLE_OC, IVPU_MMU_CACHE_WB) |

drivers/accel/ivpu/ivpu_mmu.c

586

FIELD_PREP(IVPU_MMU_CR1_TABLE_IC, IVPU_MMU_CACHE_WB) |

drivers/accel/ivpu/ivpu_mmu.c

587

FIELD_PREP(IVPU_MMU_CR1_QUEUE_SH, IVPU_MMU_SH_ISH) |

drivers/accel/ivpu/ivpu_mmu.c

588

FIELD_PREP(IVPU_MMU_CR1_QUEUE_OC, IVPU_MMU_CACHE_WB) |

drivers/accel/ivpu/ivpu_mmu.c

589

FIELD_PREP(IVPU_MMU_CR1_QUEUE_IC, IVPU_MMU_CACHE_WB);

drivers/accel/ivpu/ivpu_mmu.c

646

str[0] = FIELD_PREP(IVPU_MMU_STE_0_CFG, IVPU_MMU_STE_0_CFG_S1_TRANS) |

drivers/accel/ivpu/ivpu_mmu.c

647

FIELD_PREP(IVPU_MMU_STE_0_S1CDMAX, IVPU_MMU_CDTAB_ENT_COUNT_LOG2) |

drivers/accel/ivpu/ivpu_mmu.c

648

FIELD_PREP(IVPU_MMU_STE_0_S1FMT, IVPU_MMU_STE_0_S1FMT_LINEAR) |

drivers/accel/ivpu/ivpu_mmu.c

652

str[1] = FIELD_PREP(IVPU_MMU_STE_1_S1DSS, IVPU_MMU_STE_1_S1DSS_TERMINATE) |

drivers/accel/ivpu/ivpu_mmu.c

653

FIELD_PREP(IVPU_MMU_STE_1_S1CIR, IVPU_MMU_STE_1_S1C_CACHE_NC) |

drivers/accel/ivpu/ivpu_mmu.c

654

FIELD_PREP(IVPU_MMU_STE_1_S1COR, IVPU_MMU_STE_1_S1C_CACHE_NC) |

drivers/accel/ivpu/ivpu_mmu.c

655

FIELD_PREP(IVPU_MMU_STE_1_S1CSH, IVPU_MMU_SH_NSH) |

drivers/accel/ivpu/ivpu_mmu.c

656

FIELD_PREP(IVPU_MMU_STE_1_PRIVCFG, IVPU_MMU_STE_1_PRIVCFG_UNPRIV) |

drivers/accel/ivpu/ivpu_mmu.c

657

FIELD_PREP(IVPU_MMU_STE_1_INSTCFG, IVPU_MMU_STE_1_INSTCFG_DATA) |

drivers/accel/ivpu/ivpu_mmu.c

658

FIELD_PREP(IVPU_MMU_STE_1_STRW, IVPU_MMU_STE_1_STRW_NSEL1) |

drivers/accel/ivpu/ivpu_mmu.c

659

FIELD_PREP(IVPU_MMU_STE_1_CONT, IVPU_MMU_STRTAB_CFG_LOG2SIZE) |

drivers/accel/ivpu/ivpu_mmu.c

713

cd[0] = FIELD_PREP(IVPU_MMU_CD_0_TCR_T0SZ, IVPU_MMU_T0SZ_48BIT) |

drivers/accel/ivpu/ivpu_mmu.c

714

FIELD_PREP(IVPU_MMU_CD_0_TCR_TG0, 0) |

drivers/accel/ivpu/ivpu_mmu.c

715

FIELD_PREP(IVPU_MMU_CD_0_TCR_IRGN0, 0) |

drivers/accel/ivpu/ivpu_mmu.c

716

FIELD_PREP(IVPU_MMU_CD_0_TCR_ORGN0, 0) |

drivers/accel/ivpu/ivpu_mmu.c

717

FIELD_PREP(IVPU_MMU_CD_0_TCR_SH0, 0) |

drivers/accel/ivpu/ivpu_mmu.c

718

FIELD_PREP(IVPU_MMU_CD_0_TCR_IPS, IVPU_MMU_IPS_48BIT) |

drivers/accel/ivpu/ivpu_mmu.c

719

FIELD_PREP(IVPU_MMU_CD_0_ASID, ssid) |

drivers/accel/qaic/qaic_data.c

46

FIELD_PREP(GENMASK(11, 0), (val)) | \

drivers/accel/qaic/qaic_data.c

47

FIELD_PREP(GENMASK(20, 16), (index)) | \

drivers/accel/qaic/qaic_data.c

48

FIELD_PREP(BIT(22), (sync)) | \

drivers/accel/qaic/qaic_data.c

49

FIELD_PREP(GENMASK(26, 24), (cmd)) | \

drivers/accel/qaic/qaic_data.c

50

FIELD_PREP(GENMASK(30, 29), (flags)) | \

drivers/accel/qaic/qaic_data.c

51

FIELD_PREP(BIT(31), (cmd) ? 1 : 0); \

drivers/ata/ahci_dwc.c

256

dpriv->timv = FIELD_PREP(AHCI_DWC_HOST_TIMV_MASK, rate);

drivers/ata/ahci_dwc.c

283

dmacr |= FIELD_PREP(AHCI_DWC_PORT_TXTS_MASK, ts);

drivers/ata/ahci_dwc.c

289

dmacr |= FIELD_PREP(AHCI_DWC_PORT_RXTS_MASK, ts);

drivers/bluetooth/hci_bcm4377.c

1074

u16 raw_msgid = FIELD_PREP(BCM4377_MSGID_GENERATION,

drivers/bluetooth/hci_bcm4377.c

1076

raw_msgid |= FIELD_PREP(BCM4377_MSGID_ID, i);

drivers/bluetooth/hci_bcm4377.c

618

db |= FIELD_PREP(BCM4377_BAR0_DOORBELL_VALUE, val);

drivers/bluetooth/hci_bcm4377.c

619

db |= FIELD_PREP(BCM4377_BAR0_DOORBELL_IDX, doorbell);

drivers/bluetooth/hci_bcm4377.c

918

raw_msgid = FIELD_PREP(BCM4377_MSGID_GENERATION, ring->generation);

drivers/bluetooth/hci_bcm4377.c

919

raw_msgid |= FIELD_PREP(BCM4377_MSGID_ID, msgid);

drivers/bus/mhi/common.h

121

#define MHI_TRE_CMD_NOOP_DWORD1 cpu_to_le32(FIELD_PREP(GENMASK(23, 16), MHI_CMD_NOP))

drivers/bus/mhi/common.h

126

#define MHI_TRE_CMD_RESET_DWORD1(chid) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \

drivers/bus/mhi/common.h

127

FIELD_PREP(GENMASK(23, 16), \

drivers/bus/mhi/common.h

133

#define MHI_TRE_CMD_STOP_DWORD1(chid) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \

drivers/bus/mhi/common.h

134

FIELD_PREP(GENMASK(23, 16), \

drivers/bus/mhi/common.h

140

#define MHI_TRE_CMD_START_DWORD1(chid) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \

drivers/bus/mhi/common.h

141

FIELD_PREP(GENMASK(23, 16), \

drivers/bus/mhi/common.h

150

#define MHI_TRE_EV_DWORD0(code, len) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), code) | \

drivers/bus/mhi/common.h

151

FIELD_PREP(GENMASK(15, 0), len))

drivers/bus/mhi/common.h

152

#define MHI_TRE_EV_DWORD1(chid, type) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), chid) | \

drivers/bus/mhi/common.h

153

FIELD_PREP(GENMASK(23, 16), type))

drivers/bus/mhi/common.h

170

#define MHI_SC_EV_DWORD0(state) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), state))

drivers/bus/mhi/common.h

171

#define MHI_SC_EV_DWORD1(type) cpu_to_le32(FIELD_PREP(GENMASK(23, 16), type))

drivers/bus/mhi/common.h

175

#define MHI_EE_EV_DWORD0(ee) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), ee))

drivers/bus/mhi/common.h

176

#define MHI_EE_EV_DWORD1(type) cpu_to_le32(FIELD_PREP(GENMASK(23, 16), type))

drivers/bus/mhi/common.h

181

#define MHI_CC_EV_DWORD0(code) cpu_to_le32(FIELD_PREP(GENMASK(31, 24), code))

drivers/bus/mhi/common.h

182

#define MHI_CC_EV_DWORD1(type) cpu_to_le32(FIELD_PREP(GENMASK(23, 16), type))

drivers/bus/mhi/common.h

186

#define MHI_TRE_DATA_DWORD0(len) cpu_to_le32(FIELD_PREP(GENMASK(15, 0), len))

drivers/bus/mhi/common.h

188

#define MHI_TRE_DATA_DWORD1(bei, ieot, ieob, chain) cpu_to_le32(FIELD_PREP(GENMASK(23, 16), \

drivers/bus/mhi/common.h

190

FIELD_PREP(BIT(10), bei) | \

drivers/bus/mhi/common.h

191

FIELD_PREP(BIT(9), ieot) | \

drivers/bus/mhi/common.h

192

FIELD_PREP(BIT(8), ieob) | \

drivers/bus/mhi/common.h

193

FIELD_PREP(BIT(0), chain))

drivers/bus/mhi/common.h

202

#define MHI_RSCTRE_DATA_PTR(ptr, len) cpu_to_le64(FIELD_PREP(GENMASK(64, 48), len) | ptr)

drivers/bus/mhi/common.h

204

#define MHI_RSCTRE_DATA_DWORD1 cpu_to_le32(FIELD_PREP(GENMASK(23, 16), \

drivers/bus/mhi/ep/main.c

1215

tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_SUSPENDED);

drivers/bus/mhi/ep/main.c

1245

tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_RUNNING);

drivers/bus/mhi/ep/main.c

210

tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_RUNNING);

drivers/bus/mhi/ep/main.c

266

tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_STOP);

drivers/bus/mhi/ep/main.c

300

tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_DISABLED);

drivers/bus/mhi/host/init.c

338

tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_DISABLED);

drivers/bus/mhi/host/init.c

340

tmp |= FIELD_PREP(CHAN_CTX_BRSTMODE_MASK, mhi_chan->db_cfg.brstmode);

drivers/bus/mhi/host/init.c

342

tmp |= FIELD_PREP(CHAN_CTX_POLLCFG_MASK, mhi_chan->db_cfg.pollcfg);

drivers/bus/mhi/host/init.c

374

tmp |= FIELD_PREP(EV_CTX_INTMODT_MASK, mhi_event->intmod);

drivers/bus/mhi/host/init.c

637

tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_DISABLED);

drivers/bus/mhi/host/init.c

674

tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_ENABLED);

drivers/cache/hisi_soc_hha.c

99

reg = FIELD_PREP(HISI_HHA_CTRL_TYPE, 1); /* Clean Invalid */

drivers/cache/starfive_starlink_cache.c

49

writeq(FIELD_PREP(STARLINK_CACHE_ADDRESS_RANGE_MASK, paddr),

drivers/cache/starfive_starlink_cache.c

51

writeq(FIELD_PREP(STARLINK_CACHE_ADDRESS_RANGE_MASK, paddr + size),

drivers/cache/starfive_starlink_cache.c

55

writeq(FIELD_PREP(STARLINK_CACHE_FLUSH_CTL_MODE_MASK,

drivers/cache/starfive_starlink_cache.c

64

writeq(FIELD_PREP(STARLINK_CACHE_ADDRESS_RANGE_MASK, paddr),

drivers/cache/starfive_starlink_cache.c

66

writeq(FIELD_PREP(STARLINK_CACHE_ADDRESS_RANGE_MASK, paddr + size),

drivers/cache/starfive_starlink_cache.c

70

writeq(FIELD_PREP(STARLINK_CACHE_FLUSH_CTL_MODE_MASK,

drivers/cache/starfive_starlink_cache.c

79

writeq(FIELD_PREP(STARLINK_CACHE_ADDRESS_RANGE_MASK, paddr),

drivers/cache/starfive_starlink_cache.c

81

writeq(FIELD_PREP(STARLINK_CACHE_ADDRESS_RANGE_MASK, paddr + size),

drivers/cache/starfive_starlink_cache.c

85

writeq(FIELD_PREP(STARLINK_CACHE_FLUSH_CTL_MODE_MASK,

drivers/char/ipmi/ipmi_si_ls2k.c

71

inb |= FIELD_PREP(LS2K_KCS_STS_OBF, obf)

drivers/char/ipmi/ipmi_si_ls2k.c

72

| FIELD_PREP(LS2K_KCS_STS_IBF, ibf)

drivers/char/ipmi/ipmi_si_ls2k.c

73

| FIELD_PREP(LS2K_KCS_STS_CMD, cmd);

drivers/clk/aspeed/clk-ast2700.c

858

val |= FIELD_PREP(SCU1_CLK_I3C_DIV_MASK, SCU1_CLK_I3C_DIV(4));

drivers/clk/at91/clk-generated.c

51

FIELD_PREP(AT91_PMC_PCR_GCKDIV_MASK, gck->gckdiv) |

drivers/clk/baikal-t1/ccu-pll.c

260

val = FIELD_PREP(CCU_PLL_CTL_CLKR_MASK, nr - 1) |

drivers/clk/baikal-t1/ccu-pll.c

261

FIELD_PREP(CCU_PLL_CTL_CLKF_MASK, nf - 1) |

drivers/clk/baikal-t1/ccu-pll.c

262

FIELD_PREP(CCU_PLL_CTL_CLKOD_MASK, od - 1);

drivers/clk/baikal-t1/ccu-pll.c

294

val = FIELD_PREP(CCU_PLL_CTL_CLKR_MASK, nr - 1) |

drivers/clk/baikal-t1/ccu-pll.c

295

FIELD_PREP(CCU_PLL_CTL_CLKF_MASK, nf - 1) |

drivers/clk/baikal-t1/ccu-pll.c

296

FIELD_PREP(CCU_PLL_CTL_CLKOD_MASK, od - 1);

drivers/clk/clk-apple-nco.c

140

return FIELD_PREP(DIV_COARSE, tbl->fwd[coarse - COARSE_DIV_OFFSET]) |

drivers/clk/clk-apple-nco.c

141

FIELD_PREP(DIV_FINE, div % 4);

drivers/clk/clk-k210.c

407

reg |= FIELD_PREP(K210_PLL_CLKR, pll_cfg->r);

drivers/clk/clk-k210.c

408

reg |= FIELD_PREP(K210_PLL_CLKF, pll_cfg->f);

drivers/clk/clk-k210.c

409

reg |= FIELD_PREP(K210_PLL_CLKOD, pll_cfg->od);

drivers/clk/clk-k210.c

410

reg |= FIELD_PREP(K210_PLL_BWADJ, pll_cfg->bwadj);

drivers/clk/clk-k210.c

518

reg |= FIELD_PREP(K210_PLL_SEL, index);

drivers/clk/clk-lan966x.c

136

val |= FIELD_PREP(GCK_PRESCALER, (div - 1));

drivers/clk/clk-lan966x.c

190

val |= FIELD_PREP(GCK_SRC_SEL, index);

drivers/clk/clk-lmk04832.c

1004

FIELD_PREP(LMK04832_BIT_SYNC_POL, 0) |

drivers/clk/clk-lmk04832.c

1005

FIELD_PREP(LMK04832_BIT_SYNC_EN, 1) |

drivers/clk/clk-lmk04832.c

1006

FIELD_PREP(LMK04832_BIT_SYNC_MODE, lmk->sync_mode));

drivers/clk/clk-lmk04832.c

1123

FIELD_PREP(LMK04832_BIT_DCLKX_Y_DCC, 1));

drivers/clk/clk-lmk04832.c

1274

FIELD_PREP(LMK04832_BIT_CLKOUT_SRC_MUX,

drivers/clk/clk-lmk04832.c

1354

FIELD_PREP(LMK04832_BIT_CLKOUT_SRC_MUX,

drivers/clk/clk-lmk04832.c

1364

int val = FIELD_PREP(LMK04832_BIT_CLKIN_SEL_MUX,

drivers/clk/clk-lmk04832.c

1366

FIELD_PREP(LMK04832_BIT_CLKIN_SEL_TYPE,

drivers/clk/clk-lmk04832.c

1387

val = FIELD_PREP(LMK04832_BIT_PLL1_LD_MUX,

drivers/clk/clk-lmk04832.c

1389

FIELD_PREP(LMK04832_BIT_PLL1_LD_TYPE,

drivers/clk/clk-lmk04832.c

395

pll2_n = FIELD_PREP(0x030000, tmp[0]) |

drivers/clk/clk-lmk04832.c

396

FIELD_PREP(0x00ff00, tmp[1]) |

drivers/clk/clk-lmk04832.c

397

FIELD_PREP(0x0000ff, tmp[2]);

drivers/clk/clk-lmk04832.c

403

pll2_r = FIELD_PREP(0x0f00, tmp[0]) |

drivers/clk/clk-lmk04832.c

404

FIELD_PREP(0x00ff, tmp[1]);

drivers/clk/clk-lmk04832.c

538

FIELD_PREP(LMK04832_BIT_VCO_MUX, vco_mux));

drivers/clk/clk-lmk04832.c

561

FIELD_PREP(LMK04832_BIT_PLL2_MISC_P, p));

drivers/clk/clk-lmk04832.c

610

FIELD_PREP(LMK04832_BIT_VCO_MUX,

drivers/clk/clk-lmk04832.c

618

FIELD_PREP(LMK04832_BIT_PLL2_RCLK_MUX,

drivers/clk/clk-lmk04832.c

620

FIELD_PREP(LMK04832_BIT_PLL2_NCLK_MUX,

drivers/clk/clk-lmk04832.c

632

FIELD_PREP(LMK04832_BIT_PLL2_LD_MUX,

drivers/clk/clk-lmk04832.c

634

FIELD_PREP(LMK04832_BIT_PLL2_LD_TYPE,

drivers/clk/clk-lmk04832.c

657

FIELD_PREP(LMK04832_BIT_DCLKX_Y_DDLY_PD, 0));

drivers/clk/clk-lmk04832.c

740

FIELD_PREP(LMK04832_BIT_SYSREF_DDLY_PD, 0));

drivers/clk/clk-lmk04832.c

757

FIELD_PREP(LMK04832_BIT_SYSREF_REQ_EN, 0) |

drivers/clk/clk-lmk04832.c

758

FIELD_PREP(LMK04832_BIT_SYSREF_MUX,

drivers/clk/clk-lmk04832.c

765

FIELD_PREP(LMK04832_BIT_SYNC_MODE,

drivers/clk/clk-lmk04832.c

784

FIELD_PREP(LMK04832_BIT_SYNC_CLR, 0x01));

drivers/clk/clk-lmk04832.c

790

FIELD_PREP(LMK04832_BIT_SYNC_CLR, 0x00));

drivers/clk/clk-lmk04832.c

802

FIELD_PREP(LMK04832_BIT_SYNC_POL, 0x01));

drivers/clk/clk-lmk04832.c

808

FIELD_PREP(LMK04832_BIT_SYNC_POL, 0x00));

drivers/clk/clk-lmk04832.c

820

FIELD_PREP(LMK04832_BIT_SYSREF_MUX,

drivers/clk/clk-lmk04832.c

827

FIELD_PREP(LMK04832_BIT_SYNC_MODE,

drivers/clk/clk-lmk04832.c

975

FIELD_PREP(LMK04832_BIT_SYSREF_MUX,

drivers/clk/clk-lmk04832.c

998

FIELD_PREP(LMK04832_BIT_SYSREF_DDLY_PD, 0) |

drivers/clk/clk-lmk04832.c

999

FIELD_PREP(LMK04832_BIT_SYSREF_PLSR_PD, 0));

drivers/clk/clk-plldig.c

163

val |= FIELD_PREP(PLLDIG_RFDPHI1_MASK, rfdphi1);

drivers/clk/clk-plldig.c

209

val = FIELD_PREP(PLLDIG_MFD_MASK, mfd);

drivers/clk/clk-plldig.c

214

val = FIELD_PREP(PLLDIG_FRAC_MASK, fracdiv);

drivers/clk/clk-plldig.c

89

val |= FIELD_PREP(PLLDIG_SSCGBYP_ENABLE, 0x0);

drivers/clk/clk-rp1.c

592

prim |= FIELD_PREP(PLL_PRIM_DIV1_MASK, prim_div1);

drivers/clk/clk-rp1.c

594

prim |= FIELD_PREP(PLL_PRIM_DIV2_MASK, prim_div2);

drivers/clk/clk-rp1.c

748

sec |= FIELD_PREP(PLL_SEC_DIV_MASK, div);

drivers/clk/clk-rp1.c

932

ctrl |= FIELD_PREP(CLK_CTRL_AUXSRC_MASK, index - data->num_std_parents);

drivers/clk/clk-si521xx.c

38

FIELD_PREP(SI521XX_REG_DA_AMP_MASK, \

drivers/clk/clk-sparx5.c

179

val |= FIELD_PREP(PLL_DIV, conf.div);

drivers/clk/clk-sparx5.c

182

val |= FIELD_PREP(PLL_ROT_SEL, conf.rot_sel);

drivers/clk/clk-sparx5.c

183

val |= FIELD_PREP(PLL_PRE_DIV, conf.pre_div);

drivers/clk/clk-stm32f4.c

711

FIELD_PREP(STM32F4_RCC_SSCGR_INCSTEP_MASK, incstep) |

drivers/clk/clk-stm32f4.c

712

FIELD_PREP(STM32F4_RCC_SSCGR_MODPER_MASK, modeper);

drivers/clk/clk-stm32f4.c

738

val |= FIELD_PREP(STM32F4_RCC_PLLCFGR_N_MASK, n);

drivers/clk/imx/clk-fracn-gppll.c

261

pll_div = FIELD_PREP(PLL_RDIV_MASK, rate->rdiv) | rate->odiv |

drivers/clk/imx/clk-fracn-gppll.c

262

FIELD_PREP(PLL_MFI_MASK, rate->mfi);

drivers/clk/imx/clk-fracn-gppll.c

267

writel_relaxed(FIELD_PREP(PLL_MFN_MASK, rate->mfn), pll->base + PLL_NUMERATOR);

drivers/clk/imx/clk-pll14xx.c

312

tmp |= FIELD_PREP(SDIV_MASK, rate->sdiv);

drivers/clk/imx/clk-pll14xx.c

331

div_val = FIELD_PREP(MDIV_MASK, rate->mdiv) | FIELD_PREP(PDIV_MASK, rate->pdiv) |

drivers/clk/imx/clk-pll14xx.c

332

FIELD_PREP(SDIV_MASK, rate->sdiv);

drivers/clk/imx/clk-pll14xx.c

374

div_ctl0 |= FIELD_PREP(SDIV_MASK, rate.sdiv);

drivers/clk/imx/clk-pll14xx.c

377

writel_relaxed(FIELD_PREP(KDIV_MASK, rate.kdiv),

drivers/clk/imx/clk-pll14xx.c

392

div_ctl0 = FIELD_PREP(MDIV_MASK, rate.mdiv) |

drivers/clk/imx/clk-pll14xx.c

393

FIELD_PREP(PDIV_MASK, rate.pdiv) |

drivers/clk/imx/clk-pll14xx.c

394

FIELD_PREP(SDIV_MASK, rate.sdiv);

drivers/clk/imx/clk-pll14xx.c

397

writel_relaxed(FIELD_PREP(KDIV_MASK, rate.kdiv), pll->base + DIV_CTL1);

drivers/clk/imx/clk-sscg-pll.c

368

val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, setup->bypass);

drivers/clk/imx/clk-sscg-pll.c

374

val |= FIELD_PREP(PLL_DIVF1_MASK, setup->divf1);

drivers/clk/imx/clk-sscg-pll.c

375

val |= FIELD_PREP(PLL_DIVF2_MASK, setup->divf2);

drivers/clk/imx/clk-sscg-pll.c

376

val |= FIELD_PREP(PLL_DIVR1_MASK, setup->divr1);

drivers/clk/imx/clk-sscg-pll.c

377

val |= FIELD_PREP(PLL_DIVR2_MASK, setup->divr2);

drivers/clk/imx/clk-sscg-pll.c

378

val |= FIELD_PREP(PLL_DIVQ_MASK, setup->divq);

drivers/clk/imx/clk-sscg-pll.c

405

val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, pll->setup.bypass);

drivers/clk/nuvoton/clk-ma35d1-pll.c

169

reg_ctl[0] = FIELD_PREP(PLL_CTL0_INDIV, m) |

drivers/clk/nuvoton/clk-ma35d1-pll.c

170

FIELD_PREP(PLL_CTL0_FBDIV, n);

drivers/clk/nuvoton/clk-ma35d1-pll.c

171

reg_ctl[1] = FIELD_PREP(PLL_CTL1_OUTDIV, p);

drivers/clk/nuvoton/clk-ma35d1-pll.c

202

reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_INT);

drivers/clk/nuvoton/clk-ma35d1-pll.c

205

reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_FRAC);

drivers/clk/nuvoton/clk-ma35d1-pll.c

208

reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_SS) |

drivers/clk/nuvoton/clk-ma35d1-pll.c

209

FIELD_PREP(PLL_CTL0_SSRATE, PLL_SS_RATE);

drivers/clk/nuvoton/clk-ma35d1-pll.c

210

reg_ctl[2] = FIELD_PREP(PLL_CTL2_SLOPE, PLL_SLOPE);

drivers/clk/qcom/apcs-msm8996.c

39

FIELD_PREP(APCS_AUX_DIV_MASK, APCS_AUX_DIV_2));

drivers/clk/qcom/clk-branch.h

103

FIELD_PREP(CBCR_SLEEP, val));

drivers/clk/qcom/clk-branch.h

97

FIELD_PREP(CBCR_WAKEUP, val));

drivers/clk/qcom/clk-cbf-8996.c

123

val = FIELD_PREP(CBF_MUX_PARENT_MASK, index);

drivers/clk/qcom/clk-cbf-8996.c

39

FIELD_PREP(CBF_MUX_AUTO_CLK_SEL_ALWAYS_ON_MASK, 0x03)

drivers/clk/qcom/clk-cpu-8996.c

291

val = FIELD_PREP(PMUX_MASK, index);

drivers/clk/qcom/clk-cpu-8996.c

90

FIELD_PREP(MUX_AUTO_CLK_SEL_ALWAYS_ON_MASK, 0x03)

drivers/clk/qcom/clk-regmap-phy-mux.c

44

FIELD_PREP(PHY_MUX_MASK, PHY_MUX_PHY_SRC));

drivers/clk/qcom/clk-regmap-phy-mux.c

54

FIELD_PREP(PHY_MUX_MASK, PHY_MUX_REF_SRC));

drivers/clk/qcom/ipq-cmn-pll.c

232

FIELD_PREP(CMN_PLL_REFCLK_INDEX, index));

drivers/clk/qcom/ipq-cmn-pll.c

243

FIELD_PREP(CMN_PLL_REFCLK_DIV, 2));

drivers/clk/qcom/ipq-cmn-pll.c

249

FIELD_PREP(CMN_PLL_REFCLK_SRC_DIV, 0));

drivers/clk/renesas/rcar-gen3-cpg.c

95

val |= FIELD_PREP(CPG_PLLnCR_STC_MASK, mult - 1);

drivers/clk/renesas/rcar-gen4-cpg.c

162

FIELD_PREP(CPG_PLLxCR0_NI8, ni - 1));

drivers/clk/renesas/rcar-gen4-cpg.c

165

FIELD_PREP(CPG_PLLxCR1_NF25, nf));

drivers/clk/renesas/rzv2h-cpg.c

610

writel(FIELD_PREP(CPG_PLL_CLK1_KDIV, (u16)params->k) |

drivers/clk/renesas/rzv2h-cpg.c

611

FIELD_PREP(CPG_PLL_CLK1_MDIV, params->m) |

drivers/clk/renesas/rzv2h-cpg.c

612

FIELD_PREP(CPG_PLL_CLK1_PDIV, params->p),

drivers/clk/renesas/rzv2h-cpg.c

617

writel((val & ~CPG_PLL_CLK2_SDIV) | FIELD_PREP(CPG_PLL_CLK2_SDIV, params->s),

drivers/clk/sophgo/clk-cv18xx-common.h

69

(((_reg) & ~(_field)) | FIELD_PREP((_field), (_val)))

drivers/clk/sophgo/clk-sg2042-pll.c

91

return FIELD_PREP(PLLCTRL_FBDIV_MASK, ctrl->fbdiv) |

drivers/clk/sophgo/clk-sg2042-pll.c

92

FIELD_PREP(PLLCTRL_POSTDIV2_MASK, ctrl->postdiv2) |

drivers/clk/sophgo/clk-sg2042-pll.c

93

FIELD_PREP(PLLCTRL_POSTDIV1_MASK, ctrl->postdiv1) |

drivers/clk/sophgo/clk-sg2042-pll.c

94

FIELD_PREP(PLLCTRL_REFDIV_MASK, ctrl->refdiv);

drivers/clk/sophgo/clk-sg2044-pll.c

250

*value = FIELD_PREP(PLL_REFDIV_MASK, best_refdiv) |

drivers/clk/sophgo/clk-sg2044-pll.c

251

FIELD_PREP(PLL_FBDIV_MASK, best_fbdiv) |

drivers/clk/sophgo/clk-sg2044-pll.c

252

FIELD_PREP(PLL_POSTDIV1_MASK, best_postdiv1) |

drivers/clk/sophgo/clk-sg2044-pll.c

253

FIELD_PREP(PLL_POSTDIV2_MASK, best_postdiv2);

drivers/clk/sophgo/clk-sg2044-pll.c

333

FIELD_PREP(PLL_VCOSEL_MASK, sel));

drivers/clk/sophgo/clk-sg2044-pll.c

35

#define PLL_CALIBRATE_DEFAULT FIELD_PREP(PLL_CALIBRATE_MASK, 2)

drivers/clk/tegra/clk-tegra210-emc.c

228

config->value |= FIELD_PREP(CLK_SOURCE_EMC_2X_CLK_SRC, index);

drivers/clk/thead/clk-th1520-ap.c

457

FIELD_PREP(TH1520_PLL_REFDIV, 1) |

drivers/clk/thead/clk-th1520-ap.c

458

FIELD_PREP(TH1520_PLL_FBDIV, cfg->fbdiv) |

drivers/clk/thead/clk-th1520-ap.c

459

FIELD_PREP(TH1520_PLL_POSTDIV1, cfg->postdiv1) |

drivers/clk/thead/clk-th1520-ap.c

460

FIELD_PREP(TH1520_PLL_POSTDIV2, cfg->postdiv2));

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

477

regval1 = FIELD_PREP(WZRD_DIVCLK_EDGE, edged);

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

498

regval1 = regval1 | FIELD_PREP(WZRD_P5EN, p5en) | FIELD_PREP(WZRD_P5FEDGE, p5fedge);

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

521

reg = FIELD_PREP(WZRD_CLKOUT_DIVIDE_MASK, divider->o) |

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

522

FIELD_PREP(WZRD_CLKOUT0_FRAC_MASK, divider->o_frac);

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

525

reg = FIELD_PREP(WZRD_CLKFBOUT_MULT_MASK, divider->m) |

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

526

FIELD_PREP(WZRD_CLKFBOUT_MULT_FRAC_MASK, divider->m_frac) |

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

527

FIELD_PREP(WZRD_DIVCLK_DIVIDE_MASK, divider->d);

drivers/clk/xilinx/xlnx_vcu.c

301

vcu_pll_ctrl |= FIELD_PREP(VCU_PLL_CTRL_FBDIV, cfg->fbdiv);

drivers/clk/xilinx/xlnx_vcu.c

304

cfg_val = FIELD_PREP(VCU_PLL_CFG_RES, cfg->res) |

drivers/clk/xilinx/xlnx_vcu.c

305

FIELD_PREP(VCU_PLL_CFG_CP, cfg->cp) |

drivers/clk/xilinx/xlnx_vcu.c

306

FIELD_PREP(VCU_PLL_CFG_LFHF, cfg->lfhf) |

drivers/clk/xilinx/xlnx_vcu.c

307

FIELD_PREP(VCU_PLL_CFG_LOCK_CNT, cfg->lock_cnt) |

drivers/clk/xilinx/xlnx_vcu.c

308

FIELD_PREP(VCU_PLL_CFG_LOCK_DLY, cfg->lock_dly);

drivers/clk/zynqmp/clkc.c

712

clock[i].clk_id = FIELD_PREP(CLK_ATTR_NODE_CLASS, class) |

drivers/clk/zynqmp/clkc.c

713

FIELD_PREP(CLK_ATTR_NODE_SUBCLASS, subclass) |

drivers/clk/zynqmp/clkc.c

714

FIELD_PREP(CLK_ATTR_NODE_TYPE, nodetype) |

drivers/clk/zynqmp/clkc.c

715

FIELD_PREP(CLK_ATTR_NODE_INDEX, i);

drivers/clocksource/arm_global_timer.c

248

reg |= FIELD_PREP(GT_CONTROL_PRESCALER_MASK, psv);

drivers/clocksource/arm_global_timer.c

272

writel(FIELD_PREP(GT_CONTROL_PRESCALER_MASK, psv - 1) |

drivers/clocksource/ingenic-sysost.c

159

val |= FIELD_PREP(OSTCCR_PRESCALE1_MASK, prescale);

drivers/clocksource/ingenic-sysost.c

175

val |= FIELD_PREP(OSTCCR_PRESCALE2_MASK, prescale);

drivers/clocksource/timer-meson6.c

173

val |= FIELD_PREP(MESON_ISA_TIMER_MUX_TIMERE_INPUT_CLOCK_MASK,

drivers/clocksource/timer-meson6.c

183

val |= FIELD_PREP(MESON_ISA_TIMER_MUX_TIMERA_INPUT_CLOCK_MASK,

drivers/counter/ftm-quaddec.c

24

flags |= FIELD_PREP(mask, val); \

drivers/counter/stm32-lptimer-cnt.c

111

val |= FIELD_PREP(STM32_LPTIM_CKPOL, enable ? priv->polarity : 0);

drivers/counter/stm32-lptimer-cnt.c

50

val = FIELD_PREP(STM32_LPTIM_ENABLE, enable);

drivers/cpufreq/amd-pstate.c

242

value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, max_perf);

drivers/cpufreq/amd-pstate.c

243

value |= FIELD_PREP(AMD_CPPC_DES_PERF_MASK, des_perf);

drivers/cpufreq/amd-pstate.c

244

value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, min_perf);

drivers/cpufreq/amd-pstate.c

245

value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);

drivers/cpufreq/amd-pstate.c

296

value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);

drivers/cpufreq/amd-pstate.c

368

value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);

drivers/cpufreq/amd-pstate.c

502

value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, max_perf);

drivers/cpufreq/amd-pstate.c

503

value |= FIELD_PREP(AMD_CPPC_DES_PERF_MASK, des_perf);

drivers/cpufreq/amd-pstate.c

504

value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, min_perf);

drivers/cpufreq/amd-pstate.c

505

value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);

drivers/cpufreq/apple-soc-cpufreq.c

192

reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate);

drivers/crypto/axis/artpec6_crypto.c

1329

req_ctx->key_md = FIELD_PREP(A6_CRY_MD_OPER,

drivers/crypto/axis/artpec6_crypto.c

1332

req_ctx->key_md = FIELD_PREP(A7_CRY_MD_OPER,

drivers/crypto/axis/artpec6_crypto.c

1365

req_ctx->hash_md |= FIELD_PREP(A6_CRY_MD_HASH_SEL_CTX, sel_ctx);

drivers/crypto/axis/artpec6_crypto.c

1372

req_ctx->hash_md |= FIELD_PREP(A7_CRY_MD_HASH_SEL_CTX, sel_ctx);

drivers/crypto/axis/artpec6_crypto.c

1686

ctx->key_md = FIELD_PREP(A6_CRY_MD_OPER, a6_regk_crypto_dlkey);

drivers/crypto/axis/artpec6_crypto.c

1688

ctx->key_md = FIELD_PREP(A7_CRY_MD_OPER, a7_regk_crypto_dlkey);

drivers/crypto/axis/artpec6_crypto.c

1757

req_ctx->cipher_md |= FIELD_PREP(A6_CRY_MD_OPER, oper);

drivers/crypto/axis/artpec6_crypto.c

1758

req_ctx->cipher_md |= FIELD_PREP(A6_CRY_MD_CIPHER_LEN,

drivers/crypto/axis/artpec6_crypto.c

1763

req_ctx->cipher_md |= FIELD_PREP(A7_CRY_MD_OPER, oper);

drivers/crypto/axis/artpec6_crypto.c

1764

req_ctx->cipher_md |= FIELD_PREP(A7_CRY_MD_CIPHER_LEN,

drivers/crypto/axis/artpec6_crypto.c

1848

ctx->key_md = FIELD_PREP(A6_CRY_MD_OPER,

drivers/crypto/axis/artpec6_crypto.c

1851

ctx->key_md = FIELD_PREP(A7_CRY_MD_OPER,

drivers/crypto/axis/artpec6_crypto.c

1881

req_ctx->cipher_md |= FIELD_PREP(A6_CRY_MD_OPER,

drivers/crypto/axis/artpec6_crypto.c

1883

req_ctx->cipher_md |= FIELD_PREP(A6_CRY_MD_CIPHER_LEN,

drivers/crypto/axis/artpec6_crypto.c

1888

req_ctx->cipher_md |= FIELD_PREP(A7_CRY_MD_OPER,

drivers/crypto/axis/artpec6_crypto.c

1890

req_ctx->cipher_md |= FIELD_PREP(A7_CRY_MD_CIPHER_LEN,

drivers/crypto/axis/artpec6_crypto.c

2288

req_ctx->hash_md = FIELD_PREP(A6_CRY_MD_OPER, oper);

drivers/crypto/axis/artpec6_crypto.c

2290

req_ctx->hash_md = FIELD_PREP(A7_CRY_MD_OPER, oper);

drivers/crypto/axis/artpec6_crypto.c

2479

ctx->hash_md = FIELD_PREP(A6_CRY_MD_OPER, state->oper);

drivers/crypto/axis/artpec6_crypto.c

2481

ctx->hash_md = FIELD_PREP(A7_CRY_MD_OPER, state->oper);

drivers/crypto/axis/artpec6_crypto.c

2524

in = FIELD_PREP(PDMA_IN_BUF_CFG_DATA_BUF_SIZE, in_data_buf_size) |

drivers/crypto/axis/artpec6_crypto.c

2525

FIELD_PREP(PDMA_IN_BUF_CFG_DESCR_BUF_SIZE, in_descr_buf_size) |

drivers/crypto/axis/artpec6_crypto.c

2526

FIELD_PREP(PDMA_IN_BUF_CFG_STAT_BUF_SIZE, in_stat_buf_size);

drivers/crypto/axis/artpec6_crypto.c

2528

out = FIELD_PREP(PDMA_OUT_BUF_CFG_DATA_BUF_SIZE, out_data_buf_size) |

drivers/crypto/axis/artpec6_crypto.c

2529

FIELD_PREP(PDMA_OUT_BUF_CFG_DESCR_BUF_SIZE, out_descr_buf_size);

drivers/crypto/axis/artpec6_crypto.c

490

ind = FIELD_PREP(PDMA_IN_DESCRQ_PUSH_LEN, dma->in_cnt - 1) |

drivers/crypto/axis/artpec6_crypto.c

491

FIELD_PREP(PDMA_IN_DESCRQ_PUSH_ADDR, dma->in_dma_addr >> 6);

drivers/crypto/axis/artpec6_crypto.c

493

statd = FIELD_PREP(PDMA_IN_STATQ_PUSH_LEN, dma->in_cnt - 1) |

drivers/crypto/axis/artpec6_crypto.c

494

FIELD_PREP(PDMA_IN_STATQ_PUSH_ADDR, dma->stat_dma_addr >> 6);

drivers/crypto/axis/artpec6_crypto.c

496

outd = FIELD_PREP(PDMA_OUT_DESCRQ_PUSH_LEN, dma->out_cnt - 1) |

drivers/crypto/axis/artpec6_crypto.c

497

FIELD_PREP(PDMA_OUT_DESCRQ_PUSH_ADDR, dma->out_dma_addr >> 6);

drivers/crypto/ccp/platform-access.c

106

cmd_reg = FIELD_PREP(PSP_CMDRESP_CMD, msg);

drivers/crypto/ccp/platform-access.c

170

iowrite32(FIELD_PREP(DOORBELL_CMDRESP_STS, msg), cmd);

drivers/crypto/ccp/platform-access.c

35

expected = FIELD_PREP(PSP_CMDRESP_RESP, 1);

drivers/crypto/ccp/psp-dev.c

72

*cmdresp = FIELD_PREP(PSP_C2PMSG_17_CMDRESP_CMD, cmd);

drivers/crypto/ccp/sev-dev.c

931

reg = FIELD_PREP(SEV_CMDRESP_CMD, cmd);

drivers/crypto/ccree/cc_driver.c

117

cache_params |= FIELD_PREP(mask, val);

drivers/crypto/ccree/cc_driver.c

121

cache_params |= FIELD_PREP(mask, val);

drivers/crypto/ccree/cc_driver.c

125

cache_params |= FIELD_PREP(mask, val);

drivers/crypto/ccree/cc_driver.c

143

ace_const |= FIELD_PREP(mask, val);

drivers/crypto/ccree/cc_driver.c

147

ace_const |= FIELD_PREP(mask, val);

drivers/crypto/ccree/cc_hw_queue_defs.h

224

pdesc->word[3] |= FIELD_PREP(WORD3_QUEUE_LAST_IND, 1);

drivers/crypto/ccree/cc_hw_queue_defs.h

242

pdesc->word[5] |= FIELD_PREP(WORD5_DIN_ADDR_HIGH, upper_32_bits(addr));

drivers/crypto/ccree/cc_hw_queue_defs.h

244

pdesc->word[1] |= FIELD_PREP(WORD1_DIN_DMA_MODE, dma_mode) |

drivers/crypto/ccree/cc_hw_queue_defs.h

245

FIELD_PREP(WORD1_DIN_SIZE, size) |

drivers/crypto/ccree/cc_hw_queue_defs.h

246

FIELD_PREP(WORD1_NS_BIT, axi_sec);

drivers/crypto/ccree/cc_hw_queue_defs.h

260

pdesc->word[1] |= FIELD_PREP(WORD1_DIN_SIZE, size);

drivers/crypto/ccree/cc_hw_queue_defs.h

273

pdesc->word[1] |= FIELD_PREP(WORD1_DIN_SIZE, CC_CPP_DIN_SIZE);

drivers/crypto/ccree/cc_hw_queue_defs.h

274

pdesc->word[1] |= FIELD_PREP(WORD1_LOCK_QUEUE, 1);

drivers/crypto/ccree/cc_hw_queue_defs.h

276

pdesc->word[4] |= FIELD_PREP(WORD4_SETUP_OPERATION, slot);

drivers/crypto/ccree/cc_hw_queue_defs.h

291

pdesc->word[1] |= FIELD_PREP(WORD1_DIN_SIZE, size) |

drivers/crypto/ccree/cc_hw_queue_defs.h

292

FIELD_PREP(WORD1_DIN_DMA_MODE, DMA_SRAM);

drivers/crypto/ccree/cc_hw_queue_defs.h

305

pdesc->word[1] |= FIELD_PREP(WORD1_DIN_CONST_VALUE, 1) |

drivers/crypto/ccree/cc_hw_queue_defs.h

306

FIELD_PREP(WORD1_DIN_DMA_MODE, DMA_SRAM) |

drivers/crypto/ccree/cc_hw_queue_defs.h

307

FIELD_PREP(WORD1_DIN_SIZE, size);

drivers/crypto/ccree/cc_hw_queue_defs.h

317

pdesc->word[1] |= FIELD_PREP(WORD1_NOT_LAST, 1);

drivers/crypto/ccree/cc_hw_queue_defs.h

335

pdesc->word[5] |= FIELD_PREP(WORD5_DOUT_ADDR_HIGH, upper_32_bits(addr));

drivers/crypto/ccree/cc_hw_queue_defs.h

337

pdesc->word[3] |= FIELD_PREP(WORD3_DOUT_DMA_MODE, dma_mode) |

drivers/crypto/ccree/cc_hw_queue_defs.h

338

FIELD_PREP(WORD3_DOUT_SIZE, size) |

drivers/crypto/ccree/cc_hw_queue_defs.h

339

FIELD_PREP(WORD3_NS_BIT, axi_sec);

drivers/crypto/ccree/cc_hw_queue_defs.h

357

pdesc->word[3] |= FIELD_PREP(WORD3_DOUT_LAST_IND, last_ind);

drivers/crypto/ccree/cc_hw_queue_defs.h

374

pdesc->word[3] |= FIELD_PREP(WORD3_DOUT_LAST_IND, last_ind);

drivers/crypto/ccree/cc_hw_queue_defs.h

390

pdesc->word[3] |= FIELD_PREP(WORD3_DOUT_SIZE, size) |

drivers/crypto/ccree/cc_hw_queue_defs.h

391

FIELD_PREP(WORD3_DOUT_LAST_IND, write_enable);

drivers/crypto/ccree/cc_hw_queue_defs.h

412

pdesc->word[3] |= FIELD_PREP(WORD3_HASH_XOR_BIT, 1);

drivers/crypto/ccree/cc_hw_queue_defs.h

423

pdesc->word[4] |= FIELD_PREP(WORD4_AES_SEL_N_HASH, 1);

drivers/crypto/ccree/cc_hw_queue_defs.h

434

pdesc->word[4] |= FIELD_PREP(WORD4_AES_XOR_CRYPTO_KEY, 1);

drivers/crypto/ccree/cc_hw_queue_defs.h

449

pdesc->word[3] |= FIELD_PREP(WORD3_DOUT_DMA_MODE, DMA_SRAM) |

drivers/crypto/ccree/cc_hw_queue_defs.h

450

FIELD_PREP(WORD3_DOUT_SIZE, size);

drivers/crypto/ccree/cc_hw_queue_defs.h

486

pdesc->word[4] |= FIELD_PREP(WORD4_DATA_FLOW_MODE, mode);

drivers/crypto/ccree/cc_hw_queue_defs.h

497

pdesc->word[4] |= FIELD_PREP(WORD4_CIPHER_MODE, mode);

drivers/crypto/ccree/cc_hw_queue_defs.h

524

pdesc->word[4] |= FIELD_PREP(WORD4_CIPHER_CONF0, mode);

drivers/crypto/ccree/cc_hw_queue_defs.h

536

pdesc->word[4] |= FIELD_PREP(WORD4_CIPHER_CONF1, config);

drivers/crypto/ccree/cc_hw_queue_defs.h

548

pdesc->word[4] |= FIELD_PREP(WORD4_CIPHER_DO,

drivers/crypto/ccree/cc_hw_queue_defs.h

550

FIELD_PREP(WORD4_CIPHER_CONF2,

drivers/crypto/ccree/cc_hw_queue_defs.h

562

pdesc->word[4] |= FIELD_PREP(WORD4_BYTES_SWAP, config);

drivers/crypto/ccree/cc_hw_queue_defs.h

572

pdesc->word[4] |= FIELD_PREP(WORD4_CMAC_SIZE0, 1);

drivers/crypto/ccree/cc_hw_queue_defs.h

583

pdesc->word[4] |= FIELD_PREP(WORD4_KEY_SIZE, size);

drivers/crypto/ccree/cc_hw_queue_defs.h

617

pdesc->word[4] |= FIELD_PREP(WORD4_SETUP_OPERATION, mode);

drivers/crypto/ccree/cc_hw_queue_defs.h

629

pdesc->word[4] |= FIELD_PREP(WORD4_CIPHER_DO,

drivers/crypto/ccree/cc_lli_defs.h

49

lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_HADDR_MASK, (addr >> 32));

drivers/crypto/ccree/cc_lli_defs.h

56

lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_SIZE_MASK, size);

drivers/crypto/hisilicon/sec2/sec_main.c

700

CQC_CACHE_WB_ENABLE | FIELD_PREP(SQC_CACHE_WB_THRD, 1) |

drivers/crypto/hisilicon/sec2/sec_main.c

701

FIELD_PREP(CQC_CACHE_WB_THRD, 1), qm->io_base + QM_CACHE_CTL);

drivers/crypto/hisilicon/zip/zip_crypto.c

197

val |= FIELD_PREP(HZIP_BUF_TYPE_M, buf_type);

drivers/crypto/hisilicon/zip/zip_crypto.c

206

val |= FIELD_PREP(HZIP_REQ_TYPE_M, req_type);

drivers/crypto/hisilicon/zip/zip_crypto.c

215

val |= FIELD_PREP(HZIP_WIN_SIZE_M, win_size);

drivers/crypto/hisilicon/zip/zip_crypto.c

230

val |= FIELD_PREP(HZIP_SQE_TYPE_M, sqe_type);

drivers/crypto/hisilicon/zip/zip_main.c

641

CQC_CACHE_WB_ENABLE | FIELD_PREP(SQC_CACHE_WB_THRD, 1) |

drivers/crypto/hisilicon/zip/zip_main.c

642

FIELD_PREP(CQC_CACHE_WB_THRD, 1), base + QM_CACHE_CTL);

drivers/crypto/inside-secure/eip93/eip93-aead.c

140

sa_record->sa_cmd0_word |= FIELD_PREP(EIP93_SA_CMD_OPCODE,

drivers/crypto/inside-secure/eip93/eip93-aead.c

143

sa_record->sa_cmd0_word |= FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH,

drivers/crypto/inside-secure/eip93/eip93-aead.c

168

ctx->sa_record->sa_cmd0_word |= FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH,

drivers/crypto/inside-secure/eip93/eip93-aead.c

180

sa_record->sa_cmd1_word |= FIELD_PREP(EIP93_SA_CMD_HASH_CRYPT_OFFSET,

drivers/crypto/inside-secure/eip93/eip93-common.c

315

sa_record->sa_cmd1_word |= FIELD_PREP(EIP93_SA_CMD_AES_KEY_LENGTH,

drivers/crypto/inside-secure/eip93/eip93-common.c

478

cdesc->pe_length_word = FIELD_PREP(EIP93_PE_LENGTH_HOST_PE_READY,

drivers/crypto/inside-secure/eip93/eip93-common.c

480

cdesc->pe_length_word |= FIELD_PREP(EIP93_PE_LENGTH_LENGTH, len);

drivers/crypto/inside-secure/eip93/eip93-common.c

489

cdesc->user_id |= FIELD_PREP(EIP93_PE_USER_ID_DESC_FLAGS,

drivers/crypto/inside-secure/eip93/eip93-common.c

591

cdesc.pe_ctrl_stat_word = FIELD_PREP(EIP93_PE_CTRL_PE_READY_DES_TRING_OWN,

drivers/crypto/inside-secure/eip93/eip93-common.c

600

cdesc.user_id = FIELD_PREP(EIP93_PE_USER_ID_CRYPTO_IDR, (u16)crypto_async_idr) |

drivers/crypto/inside-secure/eip93/eip93-common.c

601

FIELD_PREP(EIP93_PE_USER_ID_DESC_FLAGS, rctx->desc_flags);

drivers/crypto/inside-secure/eip93/eip93-hash.c

172

sa_record->sa_cmd0_word |= FIELD_PREP(EIP93_SA_CMD_OPCODE,

drivers/crypto/inside-secure/eip93/eip93-hash.c

175

sa_record->sa_cmd0_word |= FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH,

drivers/crypto/inside-secure/eip93/eip93-hash.c

226

cdesc.pe_ctrl_stat_word = FIELD_PREP(EIP93_PE_CTRL_PE_READY_DES_TRING_OWN,

drivers/crypto/inside-secure/eip93/eip93-hash.c

233

cdesc.pe_length_word = FIELD_PREP(EIP93_PE_LENGTH_HOST_PE_READY,

drivers/crypto/inside-secure/eip93/eip93-hash.c

235

cdesc.pe_length_word |= FIELD_PREP(EIP93_PE_LENGTH_LENGTH,

drivers/crypto/inside-secure/eip93/eip93-hash.c

238

cdesc.user_id |= FIELD_PREP(EIP93_PE_USER_ID_DESC_FLAGS, EIP93_DESC_HASH);

drivers/crypto/inside-secure/eip93/eip93-hash.c

266

cdesc.user_id |= FIELD_PREP(EIP93_PE_USER_ID_CRYPTO_IDR, (u16)crypto_async_idr) |

drivers/crypto/inside-secure/eip93/eip93-hash.c

267

FIELD_PREP(EIP93_PE_USER_ID_DESC_FLAGS, EIP93_DESC_LAST);

drivers/crypto/inside-secure/eip93/eip93-main.c

331

val = FIELD_PREP(EIP93_PE_OUTBUF_THRESH, 128) |

drivers/crypto/inside-secure/eip93/eip93-main.c

332

FIELD_PREP(EIP93_PE_INBUF_THRESH, 128);

drivers/crypto/inside-secure/eip93/eip93-main.c

340

val = FIELD_PREP(EIPR93_PE_CDR_THRESH, EIP93_RING_NUM - EIP93_RING_BUSY);

drivers/crypto/inside-secure/eip93/eip93-main.c

345

val |= FIELD_PREP(EIPR93_PE_RD_TIMEOUT, 5) | EIPR93_PE_TIMEROUT_EN;

drivers/crypto/inside-secure/eip93/eip93-main.c

390

val = FIELD_PREP(EIP93_PE_RING_SIZE, EIP93_RING_NUM - 1);

drivers/crypto/inside-secure/eip93/eip93-regs.h

102

#define EIP93_PE_TARGET_AUTO_RING_MODE FIELD_PREP(EIP93_PE_CONFIG_PE_MODE, 0x3)

drivers/crypto/inside-secure/eip93/eip93-regs.h

103

#define EIP93_PE_TARGET_COMMAND_NO_RDR_MODE FIELD_PREP(EIP93_PE_CONFIG_PE_MODE, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

104

#define EIP93_PE_TARGET_COMMAND_WITH_RDR_MODE FIELD_PREP(EIP93_PE_CONFIG_PE_MODE, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

105

#define EIP93_PE_DIRECT_HOST_MODE FIELD_PREP(EIP93_PE_CONFIG_PE_MODE, 0x0)

drivers/crypto/inside-secure/eip93/eip93-regs.h

202

#define EIP93_SA_CMD_HASH_NO_LOAD FIELD_PREP(EIP93_SA_CMD_HASH_SOURCE, 0x3)

drivers/crypto/inside-secure/eip93/eip93-regs.h

203

#define EIP93_SA_CMD_HASH_FROM_STATE FIELD_PREP(EIP93_SA_CMD_HASH_SOURCE, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

204

#define EIP93_SA_CMD_HASH_FROM_SA FIELD_PREP(EIP93_SA_CMD_HASH_SOURCE, 0x0)

drivers/crypto/inside-secure/eip93/eip93-regs.h

206

#define EIP93_SA_CMD_IV_FROM_PRNG FIELD_PREP(EIP93_SA_CMD_IV_SOURCE, 0x3)

drivers/crypto/inside-secure/eip93/eip93-regs.h

207

#define EIP93_SA_CMD_IV_FROM_STATE FIELD_PREP(EIP93_SA_CMD_IV_SOURCE, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

208

#define EIP93_SA_CMD_IV_FROM_INPUT FIELD_PREP(EIP93_SA_CMD_IV_SOURCE, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

209

#define EIP93_SA_CMD_IV_NO_LOAD FIELD_PREP(EIP93_SA_CMD_IV_SOURCE, 0x0)

drivers/crypto/inside-secure/eip93/eip93-regs.h

211

#define EIP93_SA_CMD_DIGEST_10WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0xa) /* SRTP and TLS */

drivers/crypto/inside-secure/eip93/eip93-regs.h

212

#define EIP93_SA_CMD_DIGEST_8WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x8) /* SHA-256 */

drivers/crypto/inside-secure/eip93/eip93-regs.h

213

#define EIP93_SA_CMD_DIGEST_7WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x7) /* SHA-224 */

drivers/crypto/inside-secure/eip93/eip93-regs.h

214

#define EIP93_SA_CMD_DIGEST_6WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x6)

drivers/crypto/inside-secure/eip93/eip93-regs.h

215

#define EIP93_SA_CMD_DIGEST_5WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x5) /* SHA1 */

drivers/crypto/inside-secure/eip93/eip93-regs.h

216

#define EIP93_SA_CMD_DIGEST_4WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x4) /* MD5 and AES-based */

drivers/crypto/inside-secure/eip93/eip93-regs.h

217

#define EIP93_SA_CMD_DIGEST_3WORD_IPSEC FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x3) /* IPSEC */

drivers/crypto/inside-secure/eip93/eip93-regs.h

218

#define EIP93_SA_CMD_DIGEST_2WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

219

#define EIP93_SA_CMD_DIGEST_1WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

220

#define EIP93_SA_CMD_DIGEST_3WORD FIELD_PREP(EIP93_SA_CMD_DIGEST_LENGTH, 0x0) /* 96bit output */

drivers/crypto/inside-secure/eip93/eip93-regs.h

225

#define EIP93_SA_CMD_HASH_NULL FIELD_PREP(EIP93_SA_CMD_HASH, 0xf)

drivers/crypto/inside-secure/eip93/eip93-regs.h

226

#define EIP93_SA_CMD_HASH_SHA256 FIELD_PREP(EIP93_SA_CMD_HASH, 0x3)

drivers/crypto/inside-secure/eip93/eip93-regs.h

227

#define EIP93_SA_CMD_HASH_SHA224 FIELD_PREP(EIP93_SA_CMD_HASH, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

228

#define EIP93_SA_CMD_HASH_SHA1 FIELD_PREP(EIP93_SA_CMD_HASH, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

229

#define EIP93_SA_CMD_HASH_MD5 FIELD_PREP(EIP93_SA_CMD_HASH, 0x0)

drivers/crypto/inside-secure/eip93/eip93-regs.h

231

#define EIP93_SA_CMD_CIPHER_NULL FIELD_PREP(EIP93_SA_CMD_CIPHER, 0xf)

drivers/crypto/inside-secure/eip93/eip93-regs.h

232

#define EIP93_SA_CMD_CIPHER_AES FIELD_PREP(EIP93_SA_CMD_CIPHER, 0x3)

drivers/crypto/inside-secure/eip93/eip93-regs.h

233

#define EIP93_SA_CMD_CIPHER_ARC4 FIELD_PREP(EIP93_SA_CMD_CIPHER, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

234

#define EIP93_SA_CMD_CIPHER_3DES FIELD_PREP(EIP93_SA_CMD_CIPHER, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

235

#define EIP93_SA_CMD_CIPHER_DES FIELD_PREP(EIP93_SA_CMD_CIPHER, 0x0)

drivers/crypto/inside-secure/eip93/eip93-regs.h

237

#define EIP93_SA_CMD_PAD_CONST_SSL FIELD_PREP(EIP93_SA_CMD_PAD_TYPE, 0x6)

drivers/crypto/inside-secure/eip93/eip93-regs.h

238

#define EIP93_SA_CMD_PAD_TLS_DTLS FIELD_PREP(EIP93_SA_CMD_PAD_TYPE, 0x5)

drivers/crypto/inside-secure/eip93/eip93-regs.h

239

#define EIP93_SA_CMD_PAD_ZERO FIELD_PREP(EIP93_SA_CMD_PAD_TYPE, 0x3)

drivers/crypto/inside-secure/eip93/eip93-regs.h

240

#define EIP93_SA_CMD_PAD_CONST FIELD_PREP(EIP93_SA_CMD_PAD_TYPE, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

241

#define EIP93_SA_CMD_PAD_PKCS7 FIELD_PREP(EIP93_SA_CMD_PAD_TYPE, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

242

#define EIP93_SA_CMD_PAD_IPSEC FIELD_PREP(EIP93_SA_CMD_PAD_TYPE, 0x0)

drivers/crypto/inside-secure/eip93/eip93-regs.h

244

#define EIP93_SA_CMD_OP_EXT FIELD_PREP(EIP93_SA_CMD_OPGROUP, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

245

#define EIP93_SA_CMD_OP_PROTOCOL FIELD_PREP(EIP93_SA_CMD_OPGROUP, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

246

#define EIP93_SA_CMD_OP_BASIC FIELD_PREP(EIP93_SA_CMD_OPGROUP, 0x0)

drivers/crypto/inside-secure/eip93/eip93-regs.h

278

#define EIP93_SA_CMD_AES_KEY_256BIT FIELD_PREP(EIP93_SA_CMD_AES_KEY_LENGTH, 0x4)

drivers/crypto/inside-secure/eip93/eip93-regs.h

279

#define EIP93_SA_CMD_AES_KEY_192BIT FIELD_PREP(EIP93_SA_CMD_AES_KEY_LENGTH, 0x3)

drivers/crypto/inside-secure/eip93/eip93-regs.h

280

#define EIP93_SA_CMD_AES_KEY_128BIT FIELD_PREP(EIP93_SA_CMD_AES_KEY_LENGTH, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

288

#define EIP93_SA_CMD_CHIPER_MODE_ICM FIELD_PREP(EIP93_SA_CMD_CHIPER_MODE, 0x3)

drivers/crypto/inside-secure/eip93/eip93-regs.h

289

#define EIP93_SA_CMD_CHIPER_MODE_CTR FIELD_PREP(EIP93_SA_CMD_CHIPER_MODE, 0x2)

drivers/crypto/inside-secure/eip93/eip93-regs.h

290

#define EIP93_SA_CMD_CHIPER_MODE_CBC FIELD_PREP(EIP93_SA_CMD_CHIPER_MODE, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

291

#define EIP93_SA_CMD_CHIPER_MODE_ECB FIELD_PREP(EIP93_SA_CMD_CHIPER_MODE, 0x0)

drivers/crypto/inside-secure/eip93/eip93-regs.h

293

#define EIP93_SA_CMD_CHIPER_MODE_STATEFULL FIELD_PREP(EIP93_SA_CMD_CHIPER_MODE, 0x1)

drivers/crypto/inside-secure/eip93/eip93-regs.h

294

#define EIP93_SA_CMD_CHIPER_MODE_STATELESS FIELD_PREP(EIP93_SA_CMD_CHIPER_MODE, 0x0)

drivers/crypto/intel/qat/qat_common/adf_gen4_pm.c

47

msg = FIELD_PREP(ADF_GEN4_PM_MSG_PAYLOAD_BIT_MASK,

drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c

156

resp.data = FIELD_PREP(ADF_PF2VF_BLKMSG_RESP_TYPE_MASK,

drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c

158

FIELD_PREP(ADF_PF2VF_BLKMSG_RESP_DATA_MASK,

drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c

185

resp.data = FIELD_PREP(ADF_PF2VF_BLKMSG_RESP_TYPE_MASK, resp_type) |

drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c

186

FIELD_PREP(ADF_PF2VF_BLKMSG_RESP_DATA_MASK, resp_data);

drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c

259

resp->data = FIELD_PREP(ADF_PF2VF_VERSION_RESP_VERS_MASK,

drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c

261

FIELD_PREP(ADF_PF2VF_VERSION_RESP_RESULT_MASK, compat);

drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c

280

resp->data = FIELD_PREP(ADF_PF2VF_VERSION_RESP_VERS_MASK, 0x11) |

drivers/crypto/intel/qat/qat_common/adf_pfvf_pf_proto.c

281

FIELD_PREP(ADF_PF2VF_VERSION_RESP_RESULT_MASK, compat);

drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c

120

blk_type = FIELD_PREP(ADF_VF2PF_SMALL_BLOCK_TYPE_MASK, *type);

drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c

121

blk_byte = FIELD_PREP(ADF_VF2PF_SMALL_BLOCK_BYTE_MASK, *data);

drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c

125

blk_type = FIELD_PREP(ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK,

drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c

127

blk_byte = FIELD_PREP(ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK, *data);

drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c

131

blk_type = FIELD_PREP(ADF_VF2PF_LARGE_BLOCK_TYPE_MASK,

drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c

133

blk_byte = FIELD_PREP(ADF_VF2PF_LARGE_BLOCK_BYTE_MASK, *data);

drivers/crypto/intel/qat/qat_common/adf_pfvf_vf_proto.c

150

req.data = blk_type | blk_byte | FIELD_PREP(ADF_VF2PF_BLOCK_CRC_REQ_MASK, crc);

drivers/crypto/sa2ul.c

650

FIELD_PREP(SA_CMDL_SOP_BYPASS_LEN_MASK,

drivers/crypto/sa2ul.c

670

FIELD_PREP(SA_CMDL_SOP_BYPASS_LEN_MASK,

drivers/crypto/sa2ul.c

693

swinfo[0] |= FIELD_PREP(SA_SW0_FLAGS_MASK, flags);

drivers/crypto/sa2ul.c

695

swinfo[0] |= FIELD_PREP(SA_SW0_CMDL_INFO_MASK,

drivers/crypto/sa2ul.c

697

swinfo[0] |= FIELD_PREP(SA_SW0_ENG_ID_MASK, eng_id);

drivers/crypto/sa2ul.c

702

swinfo[2] |= FIELD_PREP(SA_SW2_EGRESS_LENGTH, hash_size);

drivers/crypto/tegra/tegra-se.h

123

#define SE_AES_CFG_ENC_MODE(x) FIELD_PREP(GENMASK(31, 24), x)

drivers/crypto/tegra/tegra-se.h

130

#define SE_AES_CFG_DEC_MODE(x) FIELD_PREP(GENMASK(23, 16), x)

drivers/crypto/tegra/tegra-se.h

136

#define SE_AES_CFG_ENC_ALG(x) FIELD_PREP(GENMASK(15, 12), x)

drivers/crypto/tegra/tegra-se.h

145

#define SE_AES_CFG_DEC_ALG(x) FIELD_PREP(GENMASK(11, 8), x)

drivers/crypto/tegra/tegra-se.h

149

#define SE_AES_CFG_DST(x) FIELD_PREP(GENMASK(4, 2), x)

drivers/crypto/tegra/tegra-se.h

156

#define SE_AES_KEY2_INDEX(x) FIELD_PREP(GENMASK(31, 28), x)

drivers/crypto/tegra/tegra-se.h

157

#define SE_AES_KEY_INDEX(x) FIELD_PREP(GENMASK(27, 24), x)

drivers/crypto/tegra/tegra-se.h

159

#define SE_AES_CRYPTO_CFG_SCC_DIS FIELD_PREP(BIT(20), 1)

drivers/crypto/tegra/tegra-se.h

161

#define SE_AES_CRYPTO_CFG_CTR_CNTN(x) FIELD_PREP(GENMASK(18, 11), x)

drivers/crypto/tegra/tegra-se.h

163

#define SE_AES_CRYPTO_CFG_IV_MODE(x) FIELD_PREP(BIT(10), x)

drivers/crypto/tegra/tegra-se.h

167

#define SE_AES_CRYPTO_CFG_CORE_SEL(x) FIELD_PREP(BIT(9), x)

drivers/crypto/tegra/tegra-se.h

171

#define SE_AES_CRYPTO_CFG_IV_SEL(x) FIELD_PREP(GENMASK(8, 7), x)

drivers/crypto/tegra/tegra-se.h

176

#define SE_AES_CRYPTO_CFG_VCTRAM_SEL(x) FIELD_PREP(GENMASK(6, 5), x)

drivers/crypto/tegra/tegra-se.h

182

#define SE_AES_CRYPTO_CFG_INPUT_SEL(x) FIELD_PREP(GENMASK(4, 3), x)

drivers/crypto/tegra/tegra-se.h

189

#define SE_AES_CRYPTO_CFG_XOR_POS(x) FIELD_PREP(GENMASK(2, 1), x)

drivers/crypto/tegra/tegra-se.h

195

#define SE_AES_CRYPTO_CFG_HASH_EN(x) FIELD_PREP(BIT(0), x)

drivers/crypto/tegra/tegra-se.h

199

#define SE_LAST_BLOCK_VAL(x) FIELD_PREP(GENMASK(19, 0), x)

drivers/crypto/tegra/tegra-se.h

200

#define SE_LAST_BLOCK_RES_BITS(x) FIELD_PREP(GENMASK(26, 20), x)

drivers/crypto/tegra/tegra-se.h

202

#define SE_AES_OP_LASTBUF FIELD_PREP(BIT(16), 1)

drivers/crypto/tegra/tegra-se.h

203

#define SE_AES_OP_WRSTALL FIELD_PREP(BIT(15), 1)

drivers/crypto/tegra/tegra-se.h

204

#define SE_AES_OP_FINAL FIELD_PREP(BIT(5), 1)

drivers/crypto/tegra/tegra-se.h

205

#define SE_AES_OP_INIT FIELD_PREP(BIT(4), 1)

drivers/crypto/tegra/tegra-se.h

207

#define SE_AES_OP_OP(x) FIELD_PREP(GENMASK(2, 0), x)

drivers/crypto/tegra/tegra-se.h

214

#define SE_KAC_SIZE(x) FIELD_PREP(GENMASK(15, 14), x)

drivers/crypto/tegra/tegra-se.h

219

#define SE_KAC_EXPORTABLE FIELD_PREP(BIT(12), 1)

drivers/crypto/tegra/tegra-se.h

221

#define SE_KAC_PURPOSE(x) FIELD_PREP(GENMASK(11, 8), x)

drivers/crypto/tegra/tegra-se.h

232

#define SE_KAC_USER_NS FIELD_PREP(GENMASK(6, 4), 3)

drivers/crypto/tegra/tegra-se.h

234

#define SE_AES_KEY_DST_INDEX(x) FIELD_PREP(GENMASK(11, 8), x)

drivers/crypto/tegra/tegra-se.h

235

#define SE_ADDR_HI_MSB(x) FIELD_PREP(GENMASK(31, 24), x)

drivers/crypto/tegra/tegra-se.h

236

#define SE_ADDR_HI_SZ(x) FIELD_PREP(GENMASK(23, 0), x)

drivers/crypto/tegra/tegra-se.h

39

#define SE_SHA_ENC_MODE(x) FIELD_PREP(GENMASK(31, 24), x)

drivers/crypto/tegra/tegra-se.h

56

#define SE_SHA_CFG_ENC_ALG(x) FIELD_PREP(GENMASK(15, 12), x)

drivers/crypto/tegra/tegra-se.h

68

#define SE_SHA_OP_LASTBUF FIELD_PREP(BIT(16), 1)

drivers/crypto/tegra/tegra-se.h

69

#define SE_SHA_OP_WRSTALL FIELD_PREP(BIT(15), 1)

drivers/crypto/tegra/tegra-se.h

71

#define SE_SHA_OP_OP(x) FIELD_PREP(GENMASK(2, 0), x)

drivers/crypto/tegra/tegra-se.h

78

#define SE_SHA_CFG_DEC_ALG(x) FIELD_PREP(GENMASK(11, 8), x)

drivers/crypto/tegra/tegra-se.h

84

#define SE_SHA_CFG_DST(x) FIELD_PREP(GENMASK(4, 2), x)

drivers/cxl/core/edac.c

1218

FIELD_PREP(CXL_SPARING_QUERY_RESOURCE_FLAG, val)

drivers/cxl/core/edac.c

1220

FIELD_PREP(CXL_SET_HARD_SPARING_FLAG, val)

drivers/cxl/core/edac.c

1222

FIELD_PREP(CXL_SPARING_SUB_CHNL_VALID_FLAG, val)

drivers/cxl/core/edac.c

1224

FIELD_PREP(CXL_SPARING_NIB_MASK_VALID_FLAG, val)

drivers/cxl/core/edac.c

674

*log_cap = FIELD_PREP(CXL_ECS_LOG_ENTRY_TYPE_MASK, val);

drivers/cxl/core/edac.c

686

*config |= FIELD_PREP(CXL_ECS_THRESHOLD_COUNT_MASK,

drivers/cxl/core/edac.c

690

*config |= FIELD_PREP(CXL_ECS_THRESHOLD_COUNT_MASK,

drivers/cxl/core/edac.c

694

*config |= FIELD_PREP(CXL_ECS_THRESHOLD_COUNT_MASK,

drivers/cxl/core/edac.c

721

*config |= FIELD_PREP(CXL_ECS_COUNT_MODE_MASK, val);

drivers/cxl/core/edac.c

733

*config |= FIELD_PREP(CXL_ECS_RESET_COUNTER_MASK, val);

drivers/cxl/core/edac.c

74

FIELD_PREP(CXL_SCRUB_CONTROL_CYCLE_MASK, cycle)

drivers/cxl/core/edac.c

75

#define CXL_SET_SCRUB_EN(en) FIELD_PREP(CXL_SCRUB_CONTROL_ENABLE, en)

drivers/cxl/core/hdm.c

716

*tgt = FIELD_PREP(GENMASK(7, 0), t[0]->port_id);

drivers/cxl/core/hdm.c

718

*tgt |= FIELD_PREP(GENMASK(15, 8), t[1]->port_id);

drivers/cxl/core/hdm.c

720

*tgt |= FIELD_PREP(GENMASK(23, 16), t[2]->port_id);

drivers/cxl/core/hdm.c

722

*tgt |= FIELD_PREP(GENMASK(31, 24), t[3]->port_id);

drivers/cxl/core/hdm.c

724

*tgt |= FIELD_PREP(GENMASK_ULL(39, 32), t[4]->port_id);

drivers/cxl/core/hdm.c

726

*tgt |= FIELD_PREP(GENMASK_ULL(47, 40), t[5]->port_id);

drivers/cxl/core/hdm.c

728

*tgt |= FIELD_PREP(GENMASK_ULL(55, 48), t[6]->port_id);

drivers/cxl/core/hdm.c

730

*tgt |= FIELD_PREP(GENMASK_ULL(63, 56), t[7]->port_id);

drivers/cxl/core/pci.c

460

(FIELD_PREP(CXL_DOE_TABLE_ACCESS_REQ_CODE, \

drivers/cxl/core/pci.c

462

FIELD_PREP(CXL_DOE_TABLE_ACCESS_TABLE_TYPE, \

drivers/cxl/core/pci.c

464

FIELD_PREP(CXL_DOE_TABLE_ACCESS_ENTRY_HANDLE, (entry_handle)))

drivers/cxl/core/pci.c

790

ctrl = FIELD_PREP(base, GPF_TIMEOUT_BASE_MAX);

drivers/cxl/core/pci.c

791

ctrl |= FIELD_PREP(scale, GPF_TIMEOUT_SCALE_MAX);

drivers/cxl/pci.c

248

cmd_reg = FIELD_PREP(CXLDEV_MBOX_CMD_COMMAND_OPCODE_MASK,

drivers/cxl/pci.c

254

cmd_reg |= FIELD_PREP(CXLDEV_MBOX_CMD_PAYLOAD_LENGTH_MASK,

drivers/dma/amd/ptdma/ptdma-dev.c

242

cmd_q->qcontrol |= FIELD_PREP(CMD_Q_SIZE, QUEUE_SIZE_VAL);

drivers/dma/amd/ptdma/ptdma-dev.c

77

desc->dw0 |= FIELD_PREP(DWORD0_IOC, desc->dw0);

drivers/dma/amd/ptdma/ptdma-dmaengine.c

120

desc->dwouv.dw0 |= FIELD_PREP(DWORD0_IOC, desc->dwouv.dw0);

drivers/dma/apple-admac.c

172

*out = FIELD_PREP(CHAN_SRAM_CARVEOUT_BASE, i * SRAM_BLOCK) |

drivers/dma/apple-admac.c

173

FIELD_PREP(CHAN_SRAM_CARVEOUT_SIZE, SRAM_BLOCK);

drivers/dma/apple-admac.c

796

writel_relaxed(FIELD_PREP(CHAN_FIFOCTL_LIMIT, 0x30 * wordsize)

drivers/dma/apple-admac.c

797

| FIELD_PREP(CHAN_FIFOCTL_THRESHOLD, 0x18 * wordsize),

drivers/dma/arm-dma350.c

235

cmd[1] = FIELD_PREP(CH_CTRL_TRANSIZE, desc->tsz) |

drivers/dma/arm-dma350.c

236

FIELD_PREP(CH_CTRL_XTYPE, CH_CTRL_XTYPE_CONTINUE) |

drivers/dma/arm-dma350.c

237

FIELD_PREP(CH_CTRL_DONETYPE, CH_CTRL_DONETYPE_CMD);

drivers/dma/arm-dma350.c

243

cmd[6] = FIELD_PREP(CH_XY_SRC, desc->xsize) | FIELD_PREP(CH_XY_DES, desc->xsize);

drivers/dma/arm-dma350.c

244

cmd[7] = FIELD_PREP(CH_XY_SRC, desc->xsizehi) | FIELD_PREP(CH_XY_DES, desc->xsizehi);

drivers/dma/arm-dma350.c

247

cmd[10] = FIELD_PREP(CH_XY_SRC, 1) | FIELD_PREP(CH_XY_DES, 1);

drivers/dma/arm-dma350.c

273

cmd[1] = FIELD_PREP(CH_CTRL_TRANSIZE, desc->tsz) |

drivers/dma/arm-dma350.c

274

FIELD_PREP(CH_CTRL_XTYPE, CH_CTRL_XTYPE_FILL) |

drivers/dma/arm-dma350.c

275

FIELD_PREP(CH_CTRL_DONETYPE, CH_CTRL_DONETYPE_CMD);

drivers/dma/arm-dma350.c

279

cmd[4] = FIELD_PREP(CH_XY_DES, desc->xsize);

drivers/dma/arm-dma350.c

280

cmd[5] = FIELD_PREP(CH_XY_DES, desc->xsizehi);

drivers/dma/arm-dma350.c

282

cmd[7] = FIELD_PREP(CH_XY_DES, 1);

drivers/dma/arm-dma350.c

613

reg = FIELD_PREP(CH_LINK_SHAREATTR, coherent ? SHAREATTR_ISH : SHAREATTR_OSH);

drivers/dma/arm-dma350.c

614

reg |= FIELD_PREP(CH_LINK_MEMATTR, coherent ? MEMATTR_WB : MEMATTR_NC);

drivers/dma/arm-dma350.c

81

FIELD_PREP(CH_CFG_MAXBURSTLEN, 0xf) | \

drivers/dma/arm-dma350.c

82

FIELD_PREP(CH_CFG_SHAREATTR, SHAREATTR_OSH) | \

drivers/dma/arm-dma350.c

83

FIELD_PREP(CH_CFG_MEMATTR, MEMATTR_DEVICE)

drivers/dma/arm-dma350.c

85

FIELD_PREP(CH_CFG_MAXBURSTLEN, 0xf) | \

drivers/dma/arm-dma350.c

86

FIELD_PREP(CH_CFG_SHAREATTR, SHAREATTR_OSH) | \

drivers/dma/arm-dma350.c

87

FIELD_PREP(CH_CFG_MEMATTR, MEMATTR_NC)

drivers/dma/arm-dma350.c

89

FIELD_PREP(CH_CFG_MAXBURSTLEN, 0xf) | \

drivers/dma/arm-dma350.c

90

FIELD_PREP(CH_CFG_SHAREATTR, SHAREATTR_ISH) | \

drivers/dma/arm-dma350.c

91

FIELD_PREP(CH_CFG_MEMATTR, MEMATTR_WB)

drivers/dma/at_hdmac.c

1001

FIELD_PREP(ATC_SRC_ADDR_MODE, ATC_SRC_ADDR_MODE_INCR) |

drivers/dma/at_hdmac.c

1002

FIELD_PREP(ATC_DST_ADDR_MODE, ATC_DST_ADDR_MODE_INCR) |

drivers/dma/at_hdmac.c

1003

FIELD_PREP(ATC_FC, ATC_FC_MEM2MEM);

drivers/dma/at_hdmac.c

1011

ctrla = FIELD_PREP(ATC_SRC_WIDTH, src_width) |

drivers/dma/at_hdmac.c

1012

FIELD_PREP(ATC_DST_WIDTH, dst_width);

drivers/dma/at_hdmac.c

1057

u32 ctrla = FIELD_PREP(ATC_SRC_WIDTH, 2) | FIELD_PREP(ATC_DST_WIDTH, 2);

drivers/dma/at_hdmac.c

1059

FIELD_PREP(ATC_SRC_ADDR_MODE, ATC_SRC_ADDR_MODE_FIXED) |

drivers/dma/at_hdmac.c

1060

FIELD_PREP(ATC_DST_ADDR_MODE, ATC_DST_ADDR_MODE_INCR) |

drivers/dma/at_hdmac.c

1061

FIELD_PREP(ATC_FC, ATC_FC_MEM2MEM);

drivers/dma/at_hdmac.c

1282

ctrla = FIELD_PREP(ATC_SCSIZE, sconfig->src_maxburst) |

drivers/dma/at_hdmac.c

1283

FIELD_PREP(ATC_DCSIZE, sconfig->dst_maxburst);

drivers/dma/at_hdmac.c

1289

ctrla |= FIELD_PREP(ATC_DST_WIDTH, reg_width);

drivers/dma/at_hdmac.c

1290

ctrlb |= FIELD_PREP(ATC_DST_ADDR_MODE,

drivers/dma/at_hdmac.c

1292

FIELD_PREP(ATC_SRC_ADDR_MODE, ATC_SRC_ADDR_MODE_INCR) |

drivers/dma/at_hdmac.c

1293

FIELD_PREP(ATC_FC, ATC_FC_MEM2PER) |

drivers/dma/at_hdmac.c

1294

FIELD_PREP(ATC_SIF, atchan->mem_if) |

drivers/dma/at_hdmac.c

1295

FIELD_PREP(ATC_DIF, atchan->per_if);

drivers/dma/at_hdmac.c

1324

FIELD_PREP(ATC_SRC_WIDTH, mem_width) |

drivers/dma/at_hdmac.c

1337

ctrla |= FIELD_PREP(ATC_SRC_WIDTH, reg_width);

drivers/dma/at_hdmac.c

1338

ctrlb |= FIELD_PREP(ATC_DST_ADDR_MODE, ATC_DST_ADDR_MODE_INCR) |

drivers/dma/at_hdmac.c

1339

FIELD_PREP(ATC_SRC_ADDR_MODE,

drivers/dma/at_hdmac.c

1341

FIELD_PREP(ATC_FC, ATC_FC_PER2MEM) |

drivers/dma/at_hdmac.c

1342

FIELD_PREP(ATC_SIF, atchan->per_if) |

drivers/dma/at_hdmac.c

1343

FIELD_PREP(ATC_DIF, atchan->mem_if);

drivers/dma/at_hdmac.c

1373

FIELD_PREP(ATC_DST_WIDTH, mem_width) |

drivers/dma/at_hdmac.c

1447

lli->ctrlb = FIELD_PREP(ATC_DST_ADDR_MODE,

drivers/dma/at_hdmac.c

1449

FIELD_PREP(ATC_SRC_ADDR_MODE,

drivers/dma/at_hdmac.c

1451

FIELD_PREP(ATC_FC, ATC_FC_MEM2PER) |

drivers/dma/at_hdmac.c

1452

FIELD_PREP(ATC_SIF, atchan->mem_if) |

drivers/dma/at_hdmac.c

1453

FIELD_PREP(ATC_DIF, atchan->per_if);

drivers/dma/at_hdmac.c

1460

lli->ctrlb = FIELD_PREP(ATC_DST_ADDR_MODE,

drivers/dma/at_hdmac.c

1462

FIELD_PREP(ATC_SRC_ADDR_MODE,

drivers/dma/at_hdmac.c

1464

FIELD_PREP(ATC_FC, ATC_FC_PER2MEM) |

drivers/dma/at_hdmac.c

1465

FIELD_PREP(ATC_SIF, atchan->per_if) |

drivers/dma/at_hdmac.c

1466

FIELD_PREP(ATC_DIF, atchan->mem_if);

drivers/dma/at_hdmac.c

1473

lli->ctrla = FIELD_PREP(ATC_SCSIZE, sconfig->src_maxburst) |

drivers/dma/at_hdmac.c

1474

FIELD_PREP(ATC_DCSIZE, sconfig->dst_maxburst) |

drivers/dma/at_hdmac.c

1475

FIELD_PREP(ATC_DST_WIDTH, reg_width) |

drivers/dma/at_hdmac.c

1476

FIELD_PREP(ATC_SRC_WIDTH, reg_width) |

drivers/dma/at_hdmac.c

1841

atslave->cfg |= FIELD_PREP(ATC_FIFOCFG,

drivers/dma/at_hdmac.c

1845

atslave->cfg |= FIELD_PREP(ATC_FIFOCFG,

drivers/dma/at_hdmac.c

185

FIELD_PREP(ATC_SRC_PER_MSB, FIELD_GET(ATC_PER_MSB, _id)) | \

drivers/dma/at_hdmac.c

1850

atslave->cfg |= FIELD_PREP(ATC_FIFOCFG, ATC_FIFOCFG_HALFFIFO);

drivers/dma/at_hdmac.c

186

FIELD_PREP(ATC_SRC_PER, _id); })

drivers/dma/at_hdmac.c

189

FIELD_PREP(ATC_DST_PER_MSB, FIELD_GET(ATC_PER_MSB, _id)) | \

drivers/dma/at_hdmac.c

190

FIELD_PREP(ATC_DST_PER, _id); })

drivers/dma/at_hdmac.c

491

#define ATC_DEFAULT_CFG FIELD_PREP(ATC_FIFOCFG, ATC_FIFOCFG_HALFFIFO)

drivers/dma/at_hdmac.c

492

#define ATC_DEFAULT_CTRLB (FIELD_PREP(ATC_SIF, AT_DMA_MEM_IF) | \

drivers/dma/at_hdmac.c

493

FIELD_PREP(ATC_DIF, AT_DMA_MEM_IF))

drivers/dma/at_hdmac.c

579

FIELD_PREP(ATC_SPIP_HOLE, desc->src_hole) |

drivers/dma/at_hdmac.c

580

FIELD_PREP(ATC_SPIP_BOUNDARY, desc->boundary));

drivers/dma/at_hdmac.c

582

FIELD_PREP(ATC_DPIP_HOLE, desc->dst_hole) |

drivers/dma/at_hdmac.c

583

FIELD_PREP(ATC_DPIP_BOUNDARY, desc->boundary));

drivers/dma/at_hdmac.c

923

ctrla = FIELD_PREP(ATC_SRC_WIDTH, dwidth) |

drivers/dma/at_hdmac.c

924

FIELD_PREP(ATC_DST_WIDTH, dwidth);

drivers/dma/at_hdmac.c

927

FIELD_PREP(ATC_SRC_ADDR_MODE, ATC_SRC_ADDR_MODE_INCR) |

drivers/dma/at_hdmac.c

928

FIELD_PREP(ATC_DST_ADDR_MODE, ATC_DST_ADDR_MODE_INCR) |

drivers/dma/at_hdmac.c

930

FIELD_PREP(ATC_FC, ATC_FC_MEM2MEM);

drivers/dma/dw-edma/dw-edma-v0-core.c

115

viewport_sel = FIELD_PREP(EDMA_V0_VIEWPORT_MASK, ch);

drivers/dma/dw-edma/dw-edma-v0-core.c

140

viewport_sel = FIELD_PREP(EDMA_V0_VIEWPORT_MASK, ch);

drivers/dma/dw-edma/dw-edma-v0-core.c

210

FIELD_PREP(EDMA_V0_DONE_INT_MASK, BIT(chan->id)));

drivers/dma/dw-edma/dw-edma-v0-core.c

218

FIELD_PREP(EDMA_V0_ABORT_INT_MASK, BIT(chan->id)));

drivers/dma/dw-edma/dw-edma-v0-core.c

412

tmp &= ~FIELD_PREP(EDMA_V0_DONE_INT_MASK, BIT(chan->id));

drivers/dma/dw-edma/dw-edma-v0-core.c

413

tmp &= ~FIELD_PREP(EDMA_V0_ABORT_INT_MASK, BIT(chan->id));

drivers/dma/dw-edma/dw-edma-v0-core.c

417

tmp |= FIELD_PREP(EDMA_V0_LINKED_LIST_ERR_MASK, BIT(chan->id));

drivers/dma/dw-edma/dw-edma-v0-core.c

434

FIELD_PREP(EDMA_V0_DOORBELL_CH_MASK, chan->id));

drivers/dma/dw-edma/dw-edma-v0-core.c

474

tmp |= FIELD_PREP(EDMA_V0_CH_ODD_MSI_DATA_MASK,

drivers/dma/dw-edma/dw-edma-v0-core.c

479

tmp |= FIELD_PREP(EDMA_V0_CH_EVEN_MSI_DATA_MASK,

drivers/dma/dw-edma/dw-edma-v0-debugfs.c

83

viewport_sel |= FIELD_PREP(EDMA_V0_VIEWPORT_MASK, entry->ch);

drivers/dma/hisi_dma.c

525

sqe->dw0 = cpu_to_le32(FIELD_PREP(OPCODE_MASK, OPCODE_M2M));

drivers/dma/imx-sdma.c

1307

FIELD_PREP(SDMA_WATERMARK_LEVEL_N_FIFOS, n_fifos);

drivers/dma/imx-sdma.c

1309

FIELD_PREP(SDMA_WATERMARK_LEVEL_OFF_FIFOS, stride_fifos);

drivers/dma/imx-sdma.c

1312

FIELD_PREP(SDMA_WATERMARK_LEVEL_WORDS_PER_FIFO, (words_per_fifo - 1));

drivers/dma/lgm/lgm-dma.c

1197

hw_ds->field |= FIELD_PREP(DESC_SOP, 1);

drivers/dma/lgm/lgm-dma.c

1200

hw_ds->field |= FIELD_PREP(DESC_EOP, 1);

drivers/dma/lgm/lgm-dma.c

1205

hw_ds->field |= FIELD_PREP(DESC_SOP, 1);

drivers/dma/lgm/lgm-dma.c

1208

hw_ds->field |= FIELD_PREP(DESC_EOP, 0);

drivers/dma/lgm/lgm-dma.c

1211

hw_ds->field |= FIELD_PREP(DESC_SOP, 0);

drivers/dma/lgm/lgm-dma.c

1213

hw_ds->field |= FIELD_PREP(DESC_EOP, 1);

drivers/dma/lgm/lgm-dma.c

1216

hw_ds->field |= FIELD_PREP(DESC_SOP, 0);

drivers/dma/lgm/lgm-dma.c

1219

hw_ds->field |= FIELD_PREP(DESC_EOP, 0);

drivers/dma/lgm/lgm-dma.c

1227

hw_ds->field |= FIELD_PREP(DESC_DATA_LEN, len);

drivers/dma/lgm/lgm-dma.c

1230

hw_ds->field |= FIELD_PREP(DESC_C, 0);

drivers/dma/lgm/lgm-dma.c

1233

hw_ds->field |= FIELD_PREP(DESC_BYTE_OFF, addr & 0x3);

drivers/dma/lgm/lgm-dma.c

1238

hw_ds->field |= FIELD_PREP(DESC_OWN, DMA_OWN);

drivers/dma/lgm/lgm-dma.c

369

val |= FIELD_PREP(DMA_CPOLL_CNT, d->pollcnt);

drivers/dma/lgm/lgm-dma.c

414

val = DMA_ORRC_EN | FIELD_PREP(DMA_ORRC_ORRCNT, d->inst->orrc);

drivers/dma/lgm/lgm-dma.c

428

val = DMA_CTRL_DESC_TMOUT_EN_V31 | FIELD_PREP(DMA_CTRL_DESC_TMOUT_CNT_V31, tcnt);

drivers/dma/lgm/lgm-dma.c

539

val |= FIELD_PREP(DMA_CCTRL_CLASS, class_low);

drivers/dma/lgm/lgm-dma.c

541

val |= FIELD_PREP(DMA_CCTRL_CLASSH, class_high);

drivers/dma/lgm/lgm-dma.c

585

class_val = FIELD_PREP(DMA_CCTRL_CLASS, val & 0x7);

drivers/dma/lgm/lgm-dma.c

587

class_val |= FIELD_PREP(DMA_CCTRL_CLASSH, (val >> 3) & 0x3);

drivers/dma/lgm/lgm-dma.c

650

FIELD_PREP(DMA_CDBA_MSB, hi), DMA_CCTRL);

drivers/dma/lgm/lgm-dma.c

728

val = FIELD_PREP(DMA_C_BOFF_BOF_LEN, boff_len) | DMA_C_BOFF_EN;

drivers/dma/lgm/lgm-dma.c

744

val = DMA_C_END_DE_EN | FIELD_PREP(DMA_C_END_DATAENDI, endian_type);

drivers/dma/lgm/lgm-dma.c

760

val = DMA_C_END_DES_EN | FIELD_PREP(DMA_C_END_DESENDI, endian_type);

drivers/dma/lgm/lgm-dma.c

825

reg = FIELD_PREP(DMA_PCTRL_TXENDI, p->txendi);

drivers/dma/lgm/lgm-dma.c

826

reg |= FIELD_PREP(DMA_PCTRL_RXENDI, p->rxendi);

drivers/dma/lgm/lgm-dma.c

829

reg |= FIELD_PREP(DMA_PCTRL_TXBL, p->txbl);

drivers/dma/lgm/lgm-dma.c

830

reg |= FIELD_PREP(DMA_PCTRL_RXBL, p->rxbl);

drivers/dma/lgm/lgm-dma.c

832

reg |= FIELD_PREP(DMA_PCTRL_PDEN, p->pkt_drop);

drivers/dma/lgm/lgm-dma.c

839

reg |= FIELD_PREP(DMA_PCTRL_TXBL, DMA_PCTRL_TXBL_8);

drivers/dma/lgm/lgm-dma.c

846

reg |= FIELD_PREP(DMA_PCTRL_RXBL, DMA_PCTRL_RXBL_8);

drivers/dma/milbeaut-hdmac.c

139

cb |= FIELD_PREP(MLB_HDMAC_TW, (width >> 1));

drivers/dma/milbeaut-hdmac.c

140

cb |= FIELD_PREP(MLB_HDMAC_MS, 2);

drivers/dma/milbeaut-hdmac.c

147

ca = FIELD_PREP(MLB_HDMAC_IS, mc->slave_id);

drivers/dma/milbeaut-hdmac.c

149

ca |= FIELD_PREP(MLB_HDMAC_BT, 0xf);

drivers/dma/milbeaut-hdmac.c

151

ca |= FIELD_PREP(MLB_HDMAC_BT, 0xd);

drivers/dma/milbeaut-hdmac.c

153

ca |= FIELD_PREP(MLB_HDMAC_BT, 0xb);

drivers/dma/milbeaut-hdmac.c

155

ca |= FIELD_PREP(MLB_HDMAC_TC, (len / burst - 1));

drivers/dma/milbeaut-hdmac.c

181

val &= ~(FIELD_PREP(MLB_HDMAC_SS, HDMAC_PAUSE));

drivers/dma/milbeaut-xdmac.c

129

val |= FIELD_PREP(M10V_XDSAC_SBS, M10V_DEFBS) |

drivers/dma/milbeaut-xdmac.c

130

FIELD_PREP(M10V_XDSAC_SBL, M10V_DEFBL);

drivers/dma/milbeaut-xdmac.c

135

val |= FIELD_PREP(M10V_XDDAC_DBS, M10V_DEFBS) |

drivers/dma/milbeaut-xdmac.c

136

FIELD_PREP(M10V_XDDAC_DBL, M10V_DEFBL);

drivers/dma/milbeaut-xdmac.c

143

val |= FIELD_PREP(M10V_XDDES_CE, 1) | FIELD_PREP(M10V_XDDES_SE, 1) |

drivers/dma/milbeaut-xdmac.c

144

FIELD_PREP(M10V_XDDES_TF, 1) | FIELD_PREP(M10V_XDDES_EI, 1) |

drivers/dma/milbeaut-xdmac.c

145

FIELD_PREP(M10V_XDDES_TI, 1);

drivers/dma/milbeaut-xdmac.c

168

val = FIELD_PREP(M10V_XDDSD_IS_MASK, 0x0);

drivers/dma/milbeaut-xdmac.c

220

val |= FIELD_PREP(M10V_XDDES_CE, 0);

drivers/dma/qcom/gpi.c

114

(FIELD_PREP(GPII_n_EV_k_CNTXT_0_EL_SIZE, el_size) | \

drivers/dma/qcom/gpi.c

115

FIELD_PREP(GPII_n_EV_k_CNTXT_0_INTYPE, inttype) | \

drivers/dma/qcom/gpi.c

116

FIELD_PREP(GPII_n_EV_k_CNTXT_0_CHTYPE, chtype))

drivers/dma/qcom/gpi.c

143

(FIELD_PREP(GPII_n_EV_CMD_OPCODE, opcode) | \

drivers/dma/qcom/gpi.c

144

FIELD_PREP(GPII_n_EV_CMD_CHID, chid))

drivers/dma/qcom/gpi.c

214

(FIELD_PREP(GPII_n_CH_k_SCRATCH_0_PAIR, pair) | \

drivers/dma/qcom/gpi.c

215

FIELD_PREP(GPII_n_CH_k_SCRATCH_0_PROTO, proto) | \

drivers/dma/qcom/gpi.c

216

FIELD_PREP(GPII_n_CH_k_SCRATCH_0_SEID, seid))

drivers/dma/qcom/gpi.c

79

(FIELD_PREP(GPII_n_CH_k_CNTXT_0_EL_SIZE, el_size) | \

drivers/dma/qcom/gpi.c

80

FIELD_PREP(GPII_n_CH_k_CNTXT_0_ERIDX, erindex) | \

drivers/dma/qcom/gpi.c

81

FIELD_PREP(GPII_n_CH_k_CNTXT_0_DIR, dir) | \

drivers/dma/qcom/gpi.c

82

FIELD_PREP(GPII_n_CH_k_CNTXT_0_PROTO, chtype_proto))

drivers/dma/qcom/gpi.c

94

(FIELD_PREP(GPII_n_CH_CMD_OPCODE, opcode) | \

drivers/dma/qcom/gpi.c

95

FIELD_PREP(GPII_n_CH_CMD_CHID, chid))

drivers/dma/sh/rz-dmac.c

643

channel->chcfg |= FIELD_PREP(CHCFG_FILL_DDS_MASK, val);

drivers/dma/sh/rz-dmac.c

653

channel->chcfg |= FIELD_PREP(CHCFG_FILL_SDS_MASK, val);

drivers/dma/stm32/stm32-dma.c

1045

dma_scr = FIELD_PREP(STM32_DMA_SCR_DIR_MASK, STM32_DMA_DEV_TO_MEM) |

drivers/dma/stm32/stm32-dma.c

1046

FIELD_PREP(STM32_DMA_SCR_PSIZE_MASK, src_bus_width) |

drivers/dma/stm32/stm32-dma.c

1047

FIELD_PREP(STM32_DMA_SCR_MSIZE_MASK, dst_bus_width) |

drivers/dma/stm32/stm32-dma.c

1048

FIELD_PREP(STM32_DMA_SCR_PBURST_MASK, src_burst_size) |

drivers/dma/stm32/stm32-dma.c

1049

FIELD_PREP(STM32_DMA_SCR_MBURST_MASK, dst_burst_size);

drivers/dma/stm32/stm32-dma.c

1054

chan->chan_reg.dma_sfcr |= FIELD_PREP(STM32_DMA_SFCR_FTH_MASK, fifoth);

drivers/dma/stm32/stm32-dma.c

1276

FIELD_PREP(STM32_DMA_SCR_DIR_MASK, STM32_DMA_MEM_TO_MEM) |

drivers/dma/stm32/stm32-dma.c

1277

FIELD_PREP(STM32_DMA_SCR_PBURST_MASK, dma_burst) |

drivers/dma/stm32/stm32-dma.c

1278

FIELD_PREP(STM32_DMA_SCR_MBURST_MASK, dma_burst) |

drivers/dma/stm32/stm32-dma.c

1284

desc->sg_req[i].chan_reg.dma_sfcr |= FIELD_PREP(STM32_DMA_SFCR_FTH_MASK, threshold);

drivers/dma/stm32/stm32-dma.c

1508

chan->chan_reg.dma_scr |= FIELD_PREP(STM32_DMA_SCR_REQ_MASK, cfg->request_line);

drivers/dma/stm32/stm32-dma.c

988

dma_scr = FIELD_PREP(STM32_DMA_SCR_DIR_MASK, STM32_DMA_MEM_TO_DEV) |

drivers/dma/stm32/stm32-dma.c

989

FIELD_PREP(STM32_DMA_SCR_PSIZE_MASK, dst_bus_width) |

drivers/dma/stm32/stm32-dma.c

990

FIELD_PREP(STM32_DMA_SCR_MSIZE_MASK, src_bus_width) |

drivers/dma/stm32/stm32-dma.c

991

FIELD_PREP(STM32_DMA_SCR_PBURST_MASK, dst_burst_size) |

drivers/dma/stm32/stm32-dma.c

992

FIELD_PREP(STM32_DMA_SCR_MBURST_MASK, src_burst_size);

drivers/dma/stm32/stm32-dma.c

997

chan->chan_reg.dma_sfcr |= FIELD_PREP(STM32_DMA_SFCR_FTH_MASK, fifoth);

drivers/dma/stm32/stm32-dma3.c

1217

chan->dt_config.ch_conf = FIELD_PREP(STM32_DMA3_DT_PRIO, CCR_PRIO_VERY_HIGH);

drivers/dma/stm32/stm32-dma3.c

1218

chan->dt_config.ch_conf |= FIELD_PREP(STM32_DMA3_DT_FIFO, chan->fifo_size);

drivers/dma/stm32/stm32-dma3.c

1220

chan->dt_config.tr_conf |= FIELD_PREP(STM32_DMA3_DT_TCEM, CTR2_TCEM_CHANNEL);

drivers/dma/stm32/stm32-dma3.c

511

hwdesc->cbr1 = FIELD_PREP(CBR1_BNDT, len);

drivers/dma/stm32/stm32-dma3.c

624

_ctr2 |= FIELD_PREP(CTR2_REQSEL, chan->dt_config.req_line) & ~CTR2_SWREQ;

drivers/dma/stm32/stm32-dma3.c

630

_ctr2 |= FIELD_PREP(CTR2_TCEM, tcem);

drivers/dma/stm32/stm32-dma3.c

653

_ctr1 |= FIELD_PREP(CTR1_SDW_LOG2, ilog2(sdw));

drivers/dma/stm32/stm32-dma3.c

654

_ctr1 |= FIELD_PREP(CTR1_SBL_1, sbl_max - 1);

drivers/dma/stm32/stm32-dma3.c

655

_ctr1 |= FIELD_PREP(CTR1_DDW_LOG2, ilog2(ddw));

drivers/dma/stm32/stm32-dma3.c

656

_ctr1 |= FIELD_PREP(CTR1_DBL_1, dbl_max - 1);

drivers/dma/stm32/stm32-dma3.c

659

_ctr1 |= FIELD_PREP(CTR1_PAM, CTR1_PAM_PACK_UNPACK);

drivers/dma/stm32/stm32-dma3.c

689

_ctr1 |= FIELD_PREP(CTR1_SDW_LOG2, ilog2(sdw));

drivers/dma/stm32/stm32-dma3.c

690

_ctr1 |= FIELD_PREP(CTR1_SBL_1, sbl_max - 1);

drivers/dma/stm32/stm32-dma3.c

691

_ctr1 |= FIELD_PREP(CTR1_DDW_LOG2, ilog2(ddw));

drivers/dma/stm32/stm32-dma3.c

692

_ctr1 |= FIELD_PREP(CTR1_DBL_1, dbl_max - 1);

drivers/dma/stm32/stm32-dma3.c

695

_ctr1 |= FIELD_PREP(CTR1_PAM, CTR1_PAM_PACK_UNPACK);

drivers/dma/stm32/stm32-dma3.c

734

_ctr1 |= FIELD_PREP(CTR1_SDW_LOG2, ilog2(sdw));

drivers/dma/stm32/stm32-dma3.c

735

_ctr1 |= FIELD_PREP(CTR1_SBL_1, sbl_max - 1);

drivers/dma/stm32/stm32-dma3.c

736

_ctr1 |= FIELD_PREP(CTR1_DDW_LOG2, ilog2(ddw));

drivers/dma/stm32/stm32-dma3.c

737

_ctr1 |= FIELD_PREP(CTR1_DBL_1, dbl_max - 1);

drivers/dma/stm32/stm32-dma3.c

740

_ctr1 |= FIELD_PREP(CTR1_PAM, CTR1_PAM_PACK_UNPACK);

drivers/dma/stm32/stm32-dma3.c

760

*ccr |= FIELD_PREP(CCR_PRIO, FIELD_GET(STM32_DMA3_DT_PRIO, ch_conf));

drivers/dma/stm32/stm32-mdma.c

100

#define STM32_MDMA_CTCR_TLEN(n) FIELD_PREP(STM32_MDMA_CTCR_TLEN_MSK, (n))

drivers/dma/stm32/stm32-mdma.c

103

#define STM32_MDMA_CTCR_LEN2(n) FIELD_PREP(STM32_MDMA_CTCR_LEN2_MSK, (n))

drivers/dma/stm32/stm32-mdma.c

106

#define STM32_MDMA_CTCR_DBURST(n) FIELD_PREP(STM32_MDMA_CTCR_DBURST_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

108

#define STM32_MDMA_CTCR_SBURST(n) FIELD_PREP(STM32_MDMA_CTCR_SBURST_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

110

#define STM32_MDMA_CTCR_DINCOS(n) FIELD_PREP(STM32_MDMA_CTCR_DINCOS_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

112

#define STM32_MDMA_CTCR_SINCOS(n) FIELD_PREP(STM32_MDMA_CTCR_SINCOS_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

114

#define STM32_MDMA_CTCR_DSIZE(n) FIELD_PREP(STM32_MDMA_CTCR_DSIZE_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

116

#define STM32_MDMA_CTCR_SSIZE(n) FIELD_PREP(STM32_MDMA_CTCR_SSIZE_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

118

#define STM32_MDMA_CTCR_DINC(n) FIELD_PREP(STM32_MDMA_CTCR_DINC_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

120

#define STM32_MDMA_CTCR_SINC(n) FIELD_PREP(STM32_MDMA_CTCR_SINC_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

131

#define STM32_MDMA_CBNDTR_BRC(n) FIELD_PREP(STM32_MDMA_CBNDTR_BRC_MK, (n))

drivers/dma/stm32/stm32-mdma.c

137

#define STM32_MDMA_CBNDTR_BNDT(n) FIELD_PREP(STM32_MDMA_CBNDTR_BNDT_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

148

#define STM32_MDMA_CBRUR_DUV(n) FIELD_PREP(STM32_MDMA_CBRUR_DUV_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

150

#define STM32_MDMA_CBRUR_SUV(n) FIELD_PREP(STM32_MDMA_CBRUR_SUV_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

160

#define STM32_MDMA_CTBR_TSEL(n) FIELD_PREP(STM32_MDMA_CTBR_TSEL_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

76

#define STM32_MDMA_CCR_PL(n) FIELD_PREP(STM32_MDMA_CCR_PL_MASK, (n))

drivers/dma/stm32/stm32-mdma.c

94

#define STM32_MDMA_CTCR_TRGM(n) FIELD_PREP(STM32_MDMA_CTCR_TRGM_MSK, (n))

drivers/dma/stm32/stm32-mdma.c

97

#define STM32_MDMA_CTCR_PAM(n) FIELD_PREP(STM32_MDMA_CTCR_PAM_MASK, (n))

drivers/dma/tegra186-gpc-dma.c

1042

csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id);

drivers/dma/tegra186-gpc-dma.c

1046

csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);

drivers/dma/tegra186-gpc-dma.c

1058

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP0,

drivers/dma/tegra186-gpc-dma.c

1060

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP1,

drivers/dma/tegra186-gpc-dma.c

1062

mmio_seq |= FIELD_PREP(TEGRA_GPCDMA_MMIOSEQ_WRAP_WORD, 1);

drivers/dma/tegra186-gpc-dma.c

1065

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_REQ_COUNT, 1);

drivers/dma/tegra186-gpc-dma.c

108

FIELD_PREP(TEGRA_GPCDMA_MMIOSEQ_BUS_WIDTH, 0)

drivers/dma/tegra186-gpc-dma.c

110

FIELD_PREP(TEGRA_GPCDMA_MMIOSEQ_BUS_WIDTH, 1)

drivers/dma/tegra186-gpc-dma.c

1102

FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_SRC_PTR, (mem >> 32));

drivers/dma/tegra186-gpc-dma.c

1107

FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (mem >> 32));

drivers/dma/tegra186-gpc-dma.c

112

FIELD_PREP(TEGRA_GPCDMA_MMIOSEQ_BUS_WIDTH, 2)

drivers/dma/tegra186-gpc-dma.c

1177

csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id);

drivers/dma/tegra186-gpc-dma.c

1181

csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);

drivers/dma/tegra186-gpc-dma.c

1187

mmio_seq |= FIELD_PREP(TEGRA_GPCDMA_MMIOSEQ_WRAP_WORD, 1);

drivers/dma/tegra186-gpc-dma.c

1194

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP0,

drivers/dma/tegra186-gpc-dma.c

1196

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP1,

drivers/dma/tegra186-gpc-dma.c

1200

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_REQ_COUNT, 1);

drivers/dma/tegra186-gpc-dma.c

1223

FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_SRC_PTR, (mem >> 32));

drivers/dma/tegra186-gpc-dma.c

1228

FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (mem >> 32));

drivers/dma/tegra186-gpc-dma.c

1353

reg_val |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_STREAM_ID0_MASK, stream_id);

drivers/dma/tegra186-gpc-dma.c

1354

reg_val |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_STREAM_ID1_MASK, stream_id);

drivers/dma/tegra186-gpc-dma.c

32

FIELD_PREP(TEGRA_GPCDMA_CSR_FC_MODE, 0)

drivers/dma/tegra186-gpc-dma.c

34

FIELD_PREP(TEGRA_GPCDMA_CSR_FC_MODE, 1)

drivers/dma/tegra186-gpc-dma.c

36

FIELD_PREP(TEGRA_GPCDMA_CSR_FC_MODE, 2)

drivers/dma/tegra186-gpc-dma.c

38

FIELD_PREP(TEGRA_GPCDMA_CSR_FC_MODE, 3)

drivers/dma/tegra186-gpc-dma.c

42

FIELD_PREP(TEGRA_GPCDMA_CSR_DMA, 0)

drivers/dma/tegra186-gpc-dma.c

44

FIELD_PREP(TEGRA_GPCDMA_CSR_DMA, 1)

drivers/dma/tegra186-gpc-dma.c

46

FIELD_PREP(TEGRA_GPCDMA_CSR_DMA, 2)

drivers/dma/tegra186-gpc-dma.c

48

FIELD_PREP(TEGRA_GPCDMA_CSR_DMA, 3)

drivers/dma/tegra186-gpc-dma.c

50

FIELD_PREP(TEGRA_GPCDMA_CSR_DMA, 4)

drivers/dma/tegra186-gpc-dma.c

52

FIELD_PREP(TEGRA_GPCDMA_CSR_DMA, 6)

drivers/dma/tegra186-gpc-dma.c

56

FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, 4)

drivers/dma/tegra186-gpc-dma.c

894

csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);

drivers/dma/tegra186-gpc-dma.c

901

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP0,

drivers/dma/tegra186-gpc-dma.c

903

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP1,

drivers/dma/tegra186-gpc-dma.c

907

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_REQ_COUNT, 1);

drivers/dma/tegra186-gpc-dma.c

922

FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (dest >> 32));

drivers/dma/tegra186-gpc-dma.c

93

FIELD_PREP(TEGRA_GPCDMA_MCSEQ_BURST, 0)

drivers/dma/tegra186-gpc-dma.c

95

FIELD_PREP(TEGRA_GPCDMA_MCSEQ_BURST, 3)

drivers/dma/tegra186-gpc-dma.c

962

csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);

drivers/dma/tegra186-gpc-dma.c

970

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP0,

drivers/dma/tegra186-gpc-dma.c

972

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_WRAP1,

drivers/dma/tegra186-gpc-dma.c

976

mc_seq |= FIELD_PREP(TEGRA_GPCDMA_MCSEQ_REQ_COUNT, 1);

drivers/dma/tegra186-gpc-dma.c

991

FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_SRC_PTR, (src >> 32));

drivers/dma/tegra186-gpc-dma.c

993

FIELD_PREP(TEGRA_GPCDMA_HIGH_ADDR_DST_PTR, (dest >> 32));

drivers/dma/uniphier-xdmac.c

156

src_width = FIELD_PREP(XDMAC_SADM_STW_MASK, __ffs(buswidth));

drivers/dma/uniphier-xdmac.c

165

dst_width = FIELD_PREP(XDMAC_DADM_DTW_MASK, __ffs(buswidth));

drivers/dma/uniphier-xdmac.c

168

val = FIELD_PREP(XDMAC_TFA_MCNT_MASK, XDMAC_INTERVAL_CLKS);

drivers/dma/uniphier-xdmac.c

169

val |= FIELD_PREP(XDMAC_TFA_MASK, xc->req_factor);

drivers/dma/xilinx/xdma-regs.h

43

(FIELD_PREP(XDMA_DESC_MAGIC_BITS, XDMA_DESC_MAGIC) | \

drivers/dma/xilinx/xdma-regs.h

44

FIELD_PREP(XDMA_DESC_ADJACENT_BITS, (adjacent) - 1) | \

drivers/dma/xilinx/xdma-regs.h

45

FIELD_PREP(XDMA_DESC_FLAGS_BITS, (flag)))

drivers/dma/xilinx/xilinx_dpdma.c

517

FIELD_PREP(XILINX_DPDMA_DESC_ADDR_EXT_SRC_ADDR_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

541

FIELD_PREP(XILINX_DPDMA_DESC_ADDR_EXT_NEXT_ADDR_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

719

FIELD_PREP(XILINX_DPDMA_DESC_HSIZE_STRIDE_HSIZE_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

721

FIELD_PREP(XILINX_DPDMA_DESC_HSIZE_STRIDE_STRIDE_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

738

FIELD_PREP(XILINX_DPDMA_DESC_ADDR_EXT_NEXT_ADDR_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

796

FIELD_PREP(XILINX_DPDMA_DESC_HSIZE_STRIDE_HSIZE_MASK, hsize) |

drivers/dma/xilinx/xilinx_dpdma.c

797

FIELD_PREP(XILINX_DPDMA_DESC_HSIZE_STRIDE_STRIDE_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

831

| FIELD_PREP(XILINX_DPDMA_CH_CNTL_QOS_DSCR_WR_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

833

| FIELD_PREP(XILINX_DPDMA_CH_CNTL_QOS_DSCR_RD_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

835

| FIELD_PREP(XILINX_DPDMA_CH_CNTL_QOS_DATA_RD_MASK,

drivers/dma/xilinx/xilinx_dpdma.c

947

FIELD_PREP(XILINX_DPDMA_CH_DESC_START_ADDRE_MASK,

drivers/dpll/zl3073x/core.c

770

dpll_meas_ctrl |= FIELD_PREP(ZL_DPLL_MEAS_CTRL_AVG_FACTOR, value);

drivers/dpll/zl3073x/dpll.c

1272

mode_refsel = FIELD_PREP(ZL_DPLL_MODE_REFSEL_MODE, hw_mode);

drivers/dpll/zl3073x/dpll.c

1275

mode_refsel |= FIELD_PREP(ZL_DPLL_MODE_REFSEL_REF, ref);

drivers/dpll/zl3073x/dpll.c

184

ref.sync_ctrl |= FIELD_PREP(ZL_REF_SYNC_CTRL_MODE, sync_mode);

drivers/dpll/zl3073x/dpll.c

355

mode_refsel = FIELD_PREP(ZL_DPLL_MODE_REFSEL_MODE, mode) |

drivers/dpll/zl3073x/dpll.c

356

FIELD_PREP(ZL_DPLL_MODE_REFSEL_REF, ref);

drivers/dpll/zl3073x/dpll.c

595

ref_prio |= FIELD_PREP(ZL_DPLL_REF_PRIO_REF_P, prio);

drivers/dpll/zl3073x/dpll.c

598

ref_prio |= FIELD_PREP(ZL_DPLL_REF_PRIO_REF_N, prio);

drivers/dpll/zl3073x/dpll.c

888

out.mode |= FIELD_PREP(ZL_OUTPUT_MODE_CLOCK_TYPE, clock_type);

drivers/dpll/zl3073x/flash.c

198

value |= FIELD_PREP(ZL_WRITE_FLASH_OP, operation);

drivers/dpll/zl3073x/regs.h

48

(FIELD_PREP(ZL_REG_OFFSET_MASK, \

drivers/edac/thunderx_edac.c

754

l2c_ioaddr = ioremap(L2C_CTL | FIELD_PREP(THUNDERX_NODE, lmc->node), PAGE_SIZE);

drivers/edac/versal_edac.c

727

regval |= FIELD_PREP(XDDR_NOC_COL_MATCH_MASK, col);

drivers/edac/versal_edac.c

728

regval |= FIELD_PREP(XDDR_NOC_BANK_MATCH_MASK, bank);

drivers/edac/versal_edac.c

729

regval |= FIELD_PREP(XDDR_NOC_GRP_MATCH_MASK, grp);

drivers/edac/versal_edac.c

733

regval |= FIELD_PREP(XDDR_NOC_LRANK_MATCH_MASK, lrank);

drivers/edac/versal_edac.c

734

regval |= FIELD_PREP(XDDR_NOC_CH_MATCH_MASK, ch);

drivers/extcon/extcon-usbc-tusb320.c

230

FIELD_PREP(TUSB320_REG8_CURRENT_MODE_ADVERTISE,

drivers/firmware/arm_ffa/driver.c

55

(FIELD_PREP(SENDER_ID_MASK, (s)) | FIELD_PREP(RECEIVER_ID_MASK, (r)))

drivers/firmware/arm_ffa/driver.c

846

(FIELD_PREP(NOTIFICATION_LOW_MASK, (low)) | \

drivers/firmware/arm_ffa/driver.c

847

FIELD_PREP(NOTIFICATION_HIGH_MASK, (high)))

drivers/firmware/arm_ffa/driver.c

851

(FIELD_PREP(RECEIVER_VCPU_MASK, (vcpu_r)) | \

drivers/firmware/arm_ffa/driver.c

852

FIELD_PREP(RECEIVER_ID_MASK, (r)))

drivers/firmware/arm_scmi/clock.c

740

attrs = FIELD_PREP(REGMASK_OEM_TYPE_SET, oem_type) |

drivers/firmware/arm_scmi/clock.c

741

FIELD_PREP(REGMASK_CLK_STATE, state);

drivers/firmware/arm_scmi/clock.c

809

flags = FIELD_PREP(REGMASK_OEM_TYPE_GET, oem_type);

drivers/firmware/arm_scmi/common.h

107

return FIELD_PREP(MSG_ID_MASK, hdr->id) |

drivers/firmware/arm_scmi/common.h

108

FIELD_PREP(MSG_TYPE_MASK, hdr->type) |

drivers/firmware/arm_scmi/common.h

109

FIELD_PREP(MSG_TOKEN_ID_MASK, hdr->seq) |

drivers/firmware/arm_scmi/common.h

110

FIELD_PREP(MSG_PROTOCOL_ID_MASK, hdr->protocol_id);

drivers/firmware/arm_scmi/notify.c

109

(FIELD_PREP(PROTO_ID_MASK, (p)) | \

drivers/firmware/arm_scmi/notify.c

110

FIELD_PREP(EVT_ID_MASK, (e)) | \

drivers/firmware/arm_scmi/notify.c

111

FIELD_PREP(SRC_ID_MASK, (s)))

drivers/firmware/arm_scmi/pinctrl.c

337

attributes = FIELD_PREP(SELECTOR_MASK, p->type);

drivers/firmware/arm_scmi/pinctrl.c

340

attributes |= FIELD_PREP(CONFIG_FLAG_MASK, 1) |

drivers/firmware/arm_scmi/pinctrl.c

341

FIELD_PREP(SKIP_CONFIGS_MASK, desc_index);

drivers/firmware/arm_scmi/pinctrl.c

343

attributes |= FIELD_PREP(CONFIG_TYPE_MASK, p->config_types[0]);

drivers/firmware/arm_scmi/pinctrl.c

498

attributes = FIELD_PREP(GENMASK(1, 0), type) |

drivers/firmware/arm_scmi/pinctrl.c

499

FIELD_PREP(GENMASK(9, 2), chunk);

drivers/firmware/arm_scmi/pinctrl.c

544

attributes = FIELD_PREP(GENMASK(1, 0), type) | BIT(10);

drivers/firmware/arm_scmi/powercap.c

381

cpu_to_le32(FIELD_PREP(CAP_SET_ASYNC, pc->async_powercap_cap_set) |

drivers/firmware/arm_scmi/powercap.c

382

FIELD_PREP(CAP_SET_IGNORE_DRESP, ignore_dresp));

drivers/firmware/arm_scmi/powercap.c

618

(FIELD_PREP(GENMASK_ULL(31, 0), power_thresh_low) |

drivers/firmware/arm_scmi/powercap.c

619

FIELD_PREP(GENMASK_ULL(63, 32), power_thresh_high));

drivers/firmware/arm_scpi.c

442

t->cmd |= FIELD_PREP(CMD_TOKEN_ID_MASK, ch->token);

drivers/firmware/arm_scpi.c

47

(FIELD_PREP(CMD_ID_MASK, cmd_id) | \

drivers/firmware/arm_scpi.c

48

FIELD_PREP(CMD_DATA_SIZE_MASK, tx_sz))

drivers/firmware/arm_scpi.c

50

(FIELD_PREP(CMD_ID_MASK, cmd_id) | \

drivers/firmware/arm_scpi.c

51

FIELD_PREP(CMD_LEGACY_DATA_SIZE_MASK, tx_sz))

drivers/firmware/qcom/qcom_scm.c

1223

.args[0] = 0xffff0000 | FIELD_PREP(QCOM_SCM_CP_APERTURE_CONTEXT_MASK, context_bank),

drivers/firmware/qcom/qcom_scm.c

561

FIELD_PREP(QCOM_DLOAD_MASK, dload_mode));

drivers/firmware/samsung/exynos-acpm-dvfs.c

39

cmd[0] = FIELD_PREP(ACPM_DVFS_ID, clk_id);

drivers/firmware/samsung/exynos-acpm-dvfs.c

41

cmd[2] = FIELD_PREP(ACPM_DVFS_REQ_TYPE, ACPM_DVFS_FREQ_REQ);

drivers/firmware/samsung/exynos-acpm-dvfs.c

60

cmd[0] = FIELD_PREP(ACPM_DVFS_ID, clk_id);

drivers/firmware/samsung/exynos-acpm-dvfs.c

61

cmd[2] = FIELD_PREP(ACPM_DVFS_REQ_TYPE, ACPM_DVFS_FREQ_GET);

drivers/firmware/samsung/exynos-acpm-pmic.c

103

cmd[0] = FIELD_PREP(ACPM_PMIC_TYPE, type) |

drivers/firmware/samsung/exynos-acpm-pmic.c

104

FIELD_PREP(ACPM_PMIC_REG, reg) |

drivers/firmware/samsung/exynos-acpm-pmic.c

105

FIELD_PREP(ACPM_PMIC_CHANNEL, chan);

drivers/firmware/samsung/exynos-acpm-pmic.c

106

cmd[1] = FIELD_PREP(ACPM_PMIC_FUNC, ACPM_PMIC_BULK_READ) |

drivers/firmware/samsung/exynos-acpm-pmic.c

107

FIELD_PREP(ACPM_PMIC_VALUE, count);

drivers/firmware/samsung/exynos-acpm-pmic.c

145

cmd[0] = FIELD_PREP(ACPM_PMIC_TYPE, type) |

drivers/firmware/samsung/exynos-acpm-pmic.c

146

FIELD_PREP(ACPM_PMIC_REG, reg) |

drivers/firmware/samsung/exynos-acpm-pmic.c

147

FIELD_PREP(ACPM_PMIC_CHANNEL, chan);

drivers/firmware/samsung/exynos-acpm-pmic.c

148

cmd[1] = FIELD_PREP(ACPM_PMIC_FUNC, ACPM_PMIC_WRITE) |

drivers/firmware/samsung/exynos-acpm-pmic.c

149

FIELD_PREP(ACPM_PMIC_VALUE, value);

drivers/firmware/samsung/exynos-acpm-pmic.c

176

cmd[0] = FIELD_PREP(ACPM_PMIC_TYPE, type) |

drivers/firmware/samsung/exynos-acpm-pmic.c

177

FIELD_PREP(ACPM_PMIC_REG, reg) |

drivers/firmware/samsung/exynos-acpm-pmic.c

178

FIELD_PREP(ACPM_PMIC_CHANNEL, chan);

drivers/firmware/samsung/exynos-acpm-pmic.c

179

cmd[1] = FIELD_PREP(ACPM_PMIC_FUNC, ACPM_PMIC_BULK_WRITE) |

drivers/firmware/samsung/exynos-acpm-pmic.c

180

FIELD_PREP(ACPM_PMIC_VALUE, count);

drivers/firmware/samsung/exynos-acpm-pmic.c

214

cmd[0] = FIELD_PREP(ACPM_PMIC_TYPE, type) |

drivers/firmware/samsung/exynos-acpm-pmic.c

215

FIELD_PREP(ACPM_PMIC_REG, reg) |

drivers/firmware/samsung/exynos-acpm-pmic.c

216

FIELD_PREP(ACPM_PMIC_CHANNEL, chan);

drivers/firmware/samsung/exynos-acpm-pmic.c

217

cmd[1] = FIELD_PREP(ACPM_PMIC_FUNC, ACPM_PMIC_UPDATE) |

drivers/firmware/samsung/exynos-acpm-pmic.c

218

FIELD_PREP(ACPM_PMIC_VALUE, value) |

drivers/firmware/samsung/exynos-acpm-pmic.c

219

FIELD_PREP(ACPM_PMIC_MASK, mask);

drivers/firmware/samsung/exynos-acpm-pmic.c

73

cmd[0] = FIELD_PREP(ACPM_PMIC_TYPE, type) |

drivers/firmware/samsung/exynos-acpm-pmic.c

74

FIELD_PREP(ACPM_PMIC_REG, reg) |

drivers/firmware/samsung/exynos-acpm-pmic.c

75

FIELD_PREP(ACPM_PMIC_CHANNEL, chan);

drivers/firmware/samsung/exynos-acpm-pmic.c

76

cmd[1] = FIELD_PREP(ACPM_PMIC_FUNC, ACPM_PMIC_READ);

drivers/firmware/samsung/exynos-acpm.c

380

txd[0] |= FIELD_PREP(ACPM_PROTOCOL_SEQNUM, achan->seqnum);

drivers/firmware/stratix10-svc.c

81

(FIELD_PREP(STRATIX10_JOB_FIELD, jobid))

drivers/firmware/stratix10-svc.c

84

(FIELD_PREP(STRATIX10_CLIENT_FIELD, clientid))

drivers/firmware/stratix10-svc.c

90

(FIELD_PREP(STRATIX10_TRANS_ID_FIELD, transaction_id))

drivers/firmware/xilinx/zynqmp.c

245

smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | feature_check_api_id;

drivers/firmware/xilinx/zynqmp.c

409

smc_arg[1] = ((u64)args[0] << 32U) | FIELD_PREP(PLM_MODULE_ID_MASK, module_id) |

drivers/fpga/dfl-afu-main.c

196

v |= FIELD_PREP(PORT_CTRL_LATENCY, ltr ? 1 : 0);

drivers/fpga/dfl-fme-error.c

195

v |= FIELD_PREP(INJECT_ERROR_MASK, inject_error);

drivers/fpga/dfl-fme-main.c

433

v |= FIELD_PREP(PWR_THRESHOLD1, val);

drivers/fpga/dfl-fme-main.c

439

v |= FIELD_PREP(PWR_THRESHOLD2, val);

drivers/fpga/dfl-fme-mgr.c

159

pr_ctrl |= FIELD_PREP(FME_PR_CTRL_PR_RGN_ID, info->region_id);

drivers/fpga/dfl-fme-mgr.c

209

pr_data |= FIELD_PREP(FME_PR_DATA_PR_DATA_RAW,

drivers/fpga/dfl-fme-perf.c

330

v |= FIELD_PREP(CACHE_CHANNEL_SEL, channel);

drivers/fpga/dfl-fme-perf.c

331

v |= FIELD_PREP(CACHE_CTRL_EVNT, event);

drivers/fpga/dfl-fme-perf.c

402

v |= FIELD_PREP(FAB_PORT_FILTER, FAB_PORT_FILTER_DISABLE);

drivers/fpga/dfl-fme-perf.c

404

v |= FIELD_PREP(FAB_PORT_FILTER, FAB_PORT_FILTER_ENABLE);

drivers/fpga/dfl-fme-perf.c

405

v |= FIELD_PREP(FAB_PORT_ID, portid);

drivers/fpga/dfl-fme-perf.c

430

v |= FIELD_PREP(FAB_CTRL_EVNT, event);

drivers/fpga/dfl-fme-perf.c

463

v |= FIELD_PREP(VTD_CTRL_EVNT, event);

drivers/fpga/dfl-fme-perf.c

494

v |= FIELD_PREP(VTD_SIP_CTRL_EVNT, event);

drivers/fpga/dfl-n3000-nios.c

104

(FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A0_MSK, \

drivers/fpga/dfl-n3000-nios.c

106

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A1_MSK, \

drivers/fpga/dfl-n3000-nios.c

108

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A2_MSK, \

drivers/fpga/dfl-n3000-nios.c

110

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A3_MSK, \

drivers/fpga/dfl-n3000-nios.c

112

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B0_MSK, \

drivers/fpga/dfl-n3000-nios.c

114

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B1_MSK, \

drivers/fpga/dfl-n3000-nios.c

116

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B2_MSK, \

drivers/fpga/dfl-n3000-nios.c

118

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B3_MSK, \

drivers/fpga/dfl-n3000-nios.c

122

(FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A0_MSK, \

drivers/fpga/dfl-n3000-nios.c

124

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A1_MSK, \

drivers/fpga/dfl-n3000-nios.c

126

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A2_MSK, \

drivers/fpga/dfl-n3000-nios.c

128

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A3_MSK, \

drivers/fpga/dfl-n3000-nios.c

130

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B0_MSK, \

drivers/fpga/dfl-n3000-nios.c

132

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B1_MSK, \

drivers/fpga/dfl-n3000-nios.c

134

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B2_MSK, \

drivers/fpga/dfl-n3000-nios.c

136

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B3_MSK, \

drivers/fpga/dfl-n3000-nios.c

140

(FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A0_MSK, \

drivers/fpga/dfl-n3000-nios.c

142

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A1_MSK, \

drivers/fpga/dfl-n3000-nios.c

144

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A2_MSK, \

drivers/fpga/dfl-n3000-nios.c

146

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_A3_MSK, \

drivers/fpga/dfl-n3000-nios.c

148

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B0_MSK, \

drivers/fpga/dfl-n3000-nios.c

150

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B1_MSK, \

drivers/fpga/dfl-n3000-nios.c

152

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B2_MSK, \

drivers/fpga/dfl-n3000-nios.c

154

FIELD_PREP(N3000_NIOS_INIT_REQ_FEC_MODE_B3_MSK, \

drivers/fpga/dfl-n3000-nios.c

484

v = FIELD_PREP(N3000_NS_CTRL_CMD_MSK, N3000_NS_CTRL_CMD_WR) |

drivers/fpga/dfl-n3000-nios.c

485

FIELD_PREP(N3000_NS_CTRL_ADDR, reg) |

drivers/fpga/dfl-n3000-nios.c

486

FIELD_PREP(N3000_NS_CTRL_WR_DATA, val);

drivers/fpga/dfl-n3000-nios.c

503

v = FIELD_PREP(N3000_NS_CTRL_CMD_MSK, N3000_NS_CTRL_CMD_RD) |

drivers/fpga/dfl-n3000-nios.c

504

FIELD_PREP(N3000_NS_CTRL_ADDR, reg);

drivers/fpga/dfl.c

1788

v |= FIELD_PREP(FME_PORT_OFST_ACC_CTRL,

drivers/fpga/intel-m10-bmc-sec-update.c

382

FIELD_PREP(DRBL_HOST_STATUS,

drivers/fpga/intel-m10-bmc-sec-update.c

454

FIELD_PREP(DRBL_HOST_STATUS,

drivers/fpga/intel-m10-bmc-sec-update.c

520

FIELD_PREP(DRBL_HOST_STATUS,

drivers/gpio/gpio-aspeed-sgpio.c

670

iowrite32(FIELD_PREP(ASPEED_SGPIO_CLK_DIV_MASK, sgpio_clk_div) | gpio_cnt_regval |

drivers/gpio/gpio-graniterapids.c

43

#define GNR_CFG_DW_RX_DISABLE FIELD_PREP(GNR_CFG_DW_RX_MASK, 2)

drivers/gpio/gpio-graniterapids.c

44

#define GNR_CFG_DW_RX_EDGE FIELD_PREP(GNR_CFG_DW_RX_MASK, 1)

drivers/gpio/gpio-graniterapids.c

45

#define GNR_CFG_DW_RX_LEVEL FIELD_PREP(GNR_CFG_DW_RX_MASK, 0)

drivers/gpio/gpio-ljca.c

39

#define LJCA_GPIO_CONF_EDGE FIELD_PREP(LJCA_GPIO_INT_TYPE, 1)

drivers/gpio/gpio-ljca.c

40

#define LJCA_GPIO_CONF_LEVEL FIELD_PREP(LJCA_GPIO_INT_TYPE, 0)

drivers/gpio/gpio-max7360.c

88

val = FIELD_PREP(MAX7360_PORTS, available_gpios);

drivers/gpu/drm/bridge/chipone-icn6211.c

432

sys_ctrl_1 |= FIELD_PREP(SYS_CTRL_1_CLK_PHASE_MSK, CLK_PHASE_0);

drivers/gpu/drm/bridge/chipone-icn6211.c

434

sys_ctrl_1 |= FIELD_PREP(SYS_CTRL_1_CLK_PHASE_MSK, CLK_PHASE_1_2);

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pai.c

23

#define WTMK_HIGH(n) FIELD_PREP(WTMK_HIGH_MASK, (n))

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pai.c

24

#define WTMK_LOW(n) FIELD_PREP(WTMK_LOW_MASK, (n))

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pai.c

25

#define NUM_CH(n) FIELD_PREP(NUM_CH_MASK, (n) - 1)

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pai.c

77

val = FIELD_PREP(D_SEL, width - 24);

drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c

72

val = FIELD_PREP(PVI_CTRL_MODE_MASK, PVI_CTRL_MODE_LCDIF) | PVI_CTRL_EN;

drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c

34

#define PC_SKIP_NUMBER(n) FIELD_PREP(PC_SKIP_NUMBER_MASK, (n))

drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c

37

FIELD_PREP(PC_DISP0_PIX_DATA_FORMAT_MASK, (fmt))

drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c

40

FIELD_PREP(PC_DISP1_PIX_DATA_FORMAT_MASK, (fmt))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

29

#define CFGCLKFREQRANGE(x) FIELD_PREP(CFGCLKFREQRANGE_MASK, (x))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

31

#define CLKSEL_STOP FIELD_PREP(CLKSEL_MASK, 0)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

32

#define CLKSEL_GEN FIELD_PREP(CLKSEL_MASK, 1)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

33

#define CLKSEL_EXT FIELD_PREP(CLKSEL_MASK, 2)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

35

#define HSFREQRANGE(x) FIELD_PREP(HSFREQRANGE_MASK, (x))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

42

#define M(x) FIELD_PREP(M_MASK, ((x) - 2))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

44

#define N(x) FIELD_PREP(N_MASK, ((x) - 1))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

46

#define VCO_CTRL(x) FIELD_PREP(VCO_CTRL_MASK, (x))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

48

#define PROP_CTRL(x) FIELD_PREP(PROP_CTRL_MASK, (x))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

50

#define INT_CTRL(x) FIELD_PREP(INT_CTRL_MASK, (x))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

54

#define GMP_CTRL(x) FIELD_PREP(GMP_CTRL_MASK, (x))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

56

#define CPBIAS_CTRL(x) FIELD_PREP(CPBIAS_CTRL_MASK, (x))

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

62

#define RGB666_CONFIG1 FIELD_PREP(MIPI_DSI_RGB666_MAP_CFG, 0)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

63

#define RGB666_CONFIG2 FIELD_PREP(MIPI_DSI_RGB666_MAP_CFG, 1)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

65

#define RGB565_CONFIG1 FIELD_PREP(MIPI_DSI_RGB565_MAP_CFG, 0)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

66

#define RGB565_CONFIG2 FIELD_PREP(MIPI_DSI_RGB565_MAP_CFG, 1)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

67

#define RGB565_CONFIG3 FIELD_PREP(MIPI_DSI_RGB565_MAP_CFG, 2)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

69

#define RGB888_TO_RGB888 FIELD_PREP(LCDIF_CROSS_LINE_PATTERN, 0)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

70

#define RGB888_TO_RGB666 FIELD_PREP(LCDIF_CROSS_LINE_PATTERN, 6)

drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

71

#define RGB565_TO_RGB565 FIELD_PREP(LCDIF_CROSS_LINE_PATTERN, 7)

drivers/gpu/drm/bridge/ite-it6263.c

146

#define HDMI_COLOR_DEPTH_24 FIELD_PREP(HDMI_COLOR_DEPTH, 4)

drivers/gpu/drm/bridge/ite-it6263.c

49

#define BIT8 FIELD_PREP(REG_COL_DEP, 1)

drivers/gpu/drm/bridge/nwl-dsi.h

109

#define NWL_DSI_WC(x) FIELD_PREP(GENMASK(15, 0), (x))

drivers/gpu/drm/bridge/nwl-dsi.h

110

#define NWL_DSI_TX_VC(x) FIELD_PREP(GENMASK(17, 16), (x))

drivers/gpu/drm/bridge/nwl-dsi.h

111

#define NWL_DSI_TX_DT(x) FIELD_PREP(GENMASK(23, 18), (x))

drivers/gpu/drm/bridge/nwl-dsi.h

112

#define NWL_DSI_HS_SEL(x) FIELD_PREP(GENMASK(24, 24), (x))

drivers/gpu/drm/bridge/nwl-dsi.h

113

#define NWL_DSI_BTA_TX(x) FIELD_PREP(GENMASK(25, 25), (x))

drivers/gpu/drm/bridge/nwl-dsi.h

114

#define NWL_DSI_BTA_NO_TX(x) FIELD_PREP(GENMASK(26, 26), (x))

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1065

FIELD_PREP(SDP_REGS, get_unaligned_le32(payload)));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1140

FIELD_PREP(PIXEL_MODE_SELECT, dp->pixel_mode));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1208

FIELD_PREP(VSTART, vstart) | FIELD_PREP(HSTART, hstart));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1209

regmap_write(dp->regmap, DW_DP_VIDEO_MSA2, FIELD_PREP(MISC0, misc));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1210

regmap_write(dp->regmap, DW_DP_VIDEO_MSA3, FIELD_PREP(MISC1, misc >> 8));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1218

FIELD_PREP(VIDEO_STREAM_ENABLE, 0));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1257

FIELD_PREP(VIDEO_MAPPING, state->video_mapping));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1262

value |= FIELD_PREP(HSYNC_IN_POLARITY, 1);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1264

value |= FIELD_PREP(VSYNC_IN_POLARITY, 1);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1270

value = FIELD_PREP(HACTIVE, hactive) | FIELD_PREP(HBLANK, hblank);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1272

value |= FIELD_PREP(I_P, 1);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1288

FIELD_PREP(VBLANK, vblank) | FIELD_PREP(VACTIVE, vactive));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1294

FIELD_PREP(H_SYNC_WIDTH, h_sync_width) |

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1295

FIELD_PREP(H_FRONT_PORCH, h_front_porch));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1301

FIELD_PREP(V_SYNC_WIDTH, v_sync_width) |

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1302

FIELD_PREP(V_FRONT_PORCH, v_front_porch));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1378

FIELD_PREP(INIT_THRESHOLD_HI, init_threshold >> 6) |

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1379

FIELD_PREP(AVERAGE_BYTES_PER_TU_FRAC, average_bytes_per_tu_frac) |

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1380

FIELD_PREP(INIT_THRESHOLD, init_threshold) |

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1381

FIELD_PREP(AVERAGE_BYTES_PER_TU, average_bytes_per_tu));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1386

FIELD_PREP(HBLANK_INTERVAL_EN, 1) |

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1387

FIELD_PREP(HBLANK_INTERVAL, hblank_interval));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1391

FIELD_PREP(VIDEO_STREAM_ENABLE, 1));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1404

FIELD_PREP(HPD_UNPLUG_EN, 1) |

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1405

FIELD_PREP(HPD_PLUG_EN, 1) |

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1406

FIELD_PREP(HPD_IRQ_EN, 1));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1410

HPD_EVENT_EN, FIELD_PREP(HPD_EVENT_EN, 1));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1416

AUX_REPLY_EVENT_EN, FIELD_PREP(AUX_REPLY_EVENT_EN, 1));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1422

FIELD_PREP(DEFAULT_FAST_LINK_TRAIN_EN, 0));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1489

value = FIELD_PREP(AUX_LEN_REQ, msg->size - 1);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1491

value = FIELD_PREP(I2C_ADDR_ONLY, 1);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1492

value |= FIELD_PREP(AUX_CMD_TYPE, msg->request);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1493

value |= FIELD_PREP(AUX_ADDR, msg->address);

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1692

FIELD_PREP(CONTROLLER_RESET, 1));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

1695

FIELD_PREP(CONTROLLER_RESET, 0));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

443

FIELD_PREP(TPS_SEL, pattern));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

463

FIELD_PREP(XMIT_ENABLE, xmit_enable));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

604

FIELD_PREP(PHY_POWERDOWN, 0x3));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

617

FIELD_PREP(PHY_LANES, lanes / 2));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

621

FIELD_PREP(PHY_POWERDOWN, 0x0));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

644

FIELD_PREP(ENHANCE_FRAMING_EN, 1));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

647

FIELD_PREP(ENHANCE_FRAMING_EN, 0));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

694

FIELD_PREP(SCRAMBLE_DIS, 1));

drivers/gpu/drm/bridge/synopsys/dw-dp.c

697

FIELD_PREP(SCRAMBLE_DIS, 0));

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

109

#define VID_MODE_TYPE(x) FIELD_PREP(GENMASK(1, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

111

#define CMD_TX_MODE(x) FIELD_PREP(BIT(24), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

117

#define IPI_DEPTH(x) FIELD_PREP(GENMASK(7, 4), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

122

#define IPI_FORMAT(x) FIELD_PREP(GENMASK(3, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

126

#define VID_HSA_TIME(x) FIELD_PREP(GENMASK(29, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

128

#define VID_HBP_TIME(x) FIELD_PREP(GENMASK(29, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

130

#define VID_HACT_TIME(x) FIELD_PREP(GENMASK(29, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

132

#define VID_HLINE_TIME(x) FIELD_PREP(GENMASK(29, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

134

#define VID_VSA_LINES(x) FIELD_PREP(GENMASK(9, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

136

#define VID_VBP_LINES(x) FIELD_PREP(GENMASK(9, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

138

#define VID_VACT_LINES(x) FIELD_PREP(GENMASK(13, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

140

#define VID_VFP_LINES(x) FIELD_PREP(GENMASK(9, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

142

#define MAX_PIX_PKT(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

32

#define CMD_TX_MODE(x) FIELD_PREP(BIT(24), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

54

#define TO_HSTX(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

56

#define TO_HSTXRDY(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

58

#define TO_LPRXRDY(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

60

#define TO_LPTXRDY(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

62

#define TO_LPTXTRIG(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

64

#define TO_LPTXULPS(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

66

#define TO_BTA(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

69

#define PPI_WIDTH(x) FIELD_PREP(GENMASK(9, 8), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

70

#define PHY_LANES(x) FIELD_PREP(GENMASK(5, 4), (x) - 1)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

71

#define PHY_TYPE(x) FIELD_PREP(BIT(0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

73

#define PHY_LPTX_CLK_DIV(x) FIELD_PREP(GENMASK(12, 8), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

78

#define PHY_LP2HS_TIME(x) FIELD_PREP(GENMASK(28, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

80

#define PHY_HS2LP_TIME(x) FIELD_PREP(GENMASK(28, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

82

#define PHY_MAX_RD_TIME(x) FIELD_PREP(GENMASK(26, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

84

#define PHY_ESC_CMD_TIME(x) FIELD_PREP(GENMASK(28, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

86

#define PHY_ESC_BYTE_TIME(x) FIELD_PREP(GENMASK(28, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

89

#define PHY_IPI_RATIO(x) FIELD_PREP(GENMASK(21, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

91

#define PHY_SYS_RATIO(x) FIELD_PREP(GENMASK(16, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

97

#define TX_VCID(x) FIELD_PREP(GENMASK(1, 0), x)

drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c

99

#define SCRAMBLING_SEED(x) FIELD_PREP(GENMASK(31, 16), x)

drivers/gpu/drm/bridge/tc358767.c

1015

FIELD_PREP(THRESH_DLY, max_tu_symbol) |

drivers/gpu/drm/bridge/tc358767.c

1016

FIELD_PREP(VID_SYNC_DLY, vid_sync_dly));

drivers/gpu/drm/bridge/tc358767.c

1019

FIELD_PREP(H_TOTAL, mode->htotal) |

drivers/gpu/drm/bridge/tc358767.c

1020

FIELD_PREP(V_TOTAL, mode->vtotal));

drivers/gpu/drm/bridge/tc358767.c

1025

FIELD_PREP(H_START, left_margin + hsync_len) |

drivers/gpu/drm/bridge/tc358767.c

1026

FIELD_PREP(V_START, upper_margin + vsync_len));

drivers/gpu/drm/bridge/tc358767.c

1031

FIELD_PREP(V_ACT, mode->vdisplay) |

drivers/gpu/drm/bridge/tc358767.c

1032

FIELD_PREP(H_ACT, mode->hdisplay));

drivers/gpu/drm/bridge/tc358767.c

1036

dp0_syncval = FIELD_PREP(VS_WIDTH, vsync_len) |

drivers/gpu/drm/bridge/tc358767.c

1037

FIELD_PREP(HS_WIDTH, hsync_len);

drivers/gpu/drm/bridge/tc358767.c

1062

FIELD_PREP(MAX_TU_SYMBOL, max_tu_symbol) |

drivers/gpu/drm/bridge/tc358767.c

1063

FIELD_PREP(TU_SIZE, TU_SIZE_RECOMMENDED) |

drivers/gpu/drm/bridge/tc358767.c

1110

FIELD_PREP(DP0_SRCCTRL_PRE0, tc->pre_emphasis[0]) |

drivers/gpu/drm/bridge/tc358767.c

1111

FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1]));

drivers/gpu/drm/bridge/tc358767.c

1118

FIELD_PREP(DP1_SRCCTRL_PRE, tc->pre_emphasis[1]));

drivers/gpu/drm/bridge/tc358767.c

1211

FIELD_PREP(DP_TRAIN_PRE_EMPHASIS_MASK, tc->pre_emphasis[0]);

drivers/gpu/drm/bridge/tc358767.c

1213

FIELD_PREP(DP_TRAIN_PRE_EMPHASIS_MASK, tc->pre_emphasis[1]);

drivers/gpu/drm/bridge/tc358767.c

1238

FIELD_PREP(DP0_SRCCTRL_PRE0, tc->pre_emphasis[0]) |

drivers/gpu/drm/bridge/tc358767.c

1239

FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1]));

drivers/gpu/drm/bridge/tc358767.c

1275

FIELD_PREP(DP0_SRCCTRL_PRE0, tc->pre_emphasis[0]) |

drivers/gpu/drm/bridge/tc358767.c

1276

FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1]));

drivers/gpu/drm/bridge/tc358767.c

1303

FIELD_PREP(DP0_SRCCTRL_PRE0, tc->pre_emphasis[0]) |

drivers/gpu/drm/bridge/tc358767.c

1304

FIELD_PREP(DP0_SRCCTRL_PRE1, tc->pre_emphasis[1]));

drivers/gpu/drm/bridge/tc358767.c

468

auxcfg0 |= FIELD_PREP(DP0_AUXCFG0_BSIZE, size - 1);

drivers/gpu/drm/bridge/tc358767.c

927

FIELD_PREP(VSDELAY, right_margin + 10) |

drivers/gpu/drm/bridge/tc358767.c

933

FIELD_PREP(HBPR, ALIGN(left_margin, 2)) |

drivers/gpu/drm/bridge/tc358767.c

934

FIELD_PREP(HPW, ALIGN(hsync_len, 2)));

drivers/gpu/drm/bridge/tc358767.c

939

FIELD_PREP(HDISPR, ALIGN(mode->hdisplay, 2)) |

drivers/gpu/drm/bridge/tc358767.c

940

FIELD_PREP(HFPR, ALIGN(right_margin, 2)));

drivers/gpu/drm/bridge/tc358767.c

945

FIELD_PREP(VBPR, upper_margin) |

drivers/gpu/drm/bridge/tc358767.c

946

FIELD_PREP(VSPR, vsync_len));

drivers/gpu/drm/bridge/tc358767.c

951

FIELD_PREP(VFPR, lower_margin) |

drivers/gpu/drm/bridge/tc358767.c

952

FIELD_PREP(VDISPR, mode->vdisplay));

drivers/gpu/drm/bridge/tc358767.c

962

FIELD_PREP(COLOR_R, 120) |

drivers/gpu/drm/bridge/tc358767.c

963

FIELD_PREP(COLOR_G, 20) |

drivers/gpu/drm/bridge/tc358767.c

964

FIELD_PREP(COLOR_B, 99) |

drivers/gpu/drm/bridge/tc358767.c

966

FIELD_PREP(COLOR_BAR_MODE, COLOR_BAR_MODE_BARS));

drivers/gpu/drm/bridge/tc358775.c

31

#define FLD_VAL(val, start, end) FIELD_PREP(GENMASK(start, end), val)

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1654

pwm_en_inv = FIELD_PREP(SN_PWM_EN_MASK, state->enabled) |

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1655

FIELD_PREP(SN_PWM_INV_MASK, state->polarity == PWM_POLARITY_INVERSED);

drivers/gpu/drm/display/drm_dp_mst_topology.c

454

buf[idx] |= FIELD_PREP(GENMASK(1, 0), msg->stream_event);

drivers/gpu/drm/display/drm_dp_mst_topology.c

456

buf[idx] |= FIELD_PREP(GENMASK(4, 3), msg->stream_behavior);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

71

aux_cmd |= FIELD_PREP(HIBMC_AUX_CMD_REQ_LEN, (msg->size - 1));

drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

73

aux_cmd |= FIELD_PREP(HIBMC_AUX_CMD_I2C_ADDR_ONLY, 1);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c

75

aux_cmd |= FIELD_PREP(HIBMC_AUX_CMD_ADDR, msg->address);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h

53

(reg_value) |= FIELD_PREP(mask, val); \

drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c

28

writel(FIELD_PREP(HIBMC_DP_PMA_TXDEEMPH, cfg[i]),

drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c

65

writel(FIELD_PREP(HIBMC_DP_PMA_TXDEEMPH, DP_SERDES_VOL0_PRE0),

drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c

67

writel(FIELD_PREP(HIBMC_DP_PMA_TXDEEMPH, DP_SERDES_VOL0_PRE0),

drivers/gpu/drm/i915/gt/intel_lrc.c

1418

*cs++ = FIELD_PREP(XY_FAST_COLOR_BLT_MOCS_MASK, mocs) | 0x3f;

drivers/gpu/drm/i915/gt/intel_lrc.h

100

#define GEN12_CTX_PRIORITY_LOW FIELD_PREP(GEN12_CTX_PRIORITY_MASK, 0)

drivers/gpu/drm/i915/gt/intel_lrc.h

98

#define GEN12_CTX_PRIORITY_HIGH FIELD_PREP(GEN12_CTX_PRIORITY_MASK, 2)

drivers/gpu/drm/i915/gt/intel_lrc.h

99

#define GEN12_CTX_PRIORITY_NORMAL FIELD_PREP(GEN12_CTX_PRIORITY_MASK, 1)

drivers/gpu/drm/i915/gt/intel_migrate.c

568

FIELD_PREP(XY_CTRL_SURF_MOCS_MASK, mocs);

drivers/gpu/drm/i915/gt/intel_migrate.c

571

FIELD_PREP(XY_CTRL_SURF_MOCS_MASK, mocs);

drivers/gpu/drm/i915/gt/intel_migrate.c

942

*cs++ = FIELD_PREP(XY_FAST_COLOR_BLT_MOCS_MASK, mocs) |

drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c

201

FIELD_PREP(GSC_PROXY_TYPE, GSC_PROXY_MSG_TYPE_PROXY_QUERY) |

drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c

202

FIELD_PREP(GSC_PROXY_PAYLOAD_LENGTH, 0);

drivers/gpu/drm/i915/gt/uc/intel_guc.c

543

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN,

drivers/gpu/drm/i915/gt/uc/intel_guc.c

861

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/i915/gt/uc/intel_guc.c

862

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/i915/gt/uc/intel_guc.c

863

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_ACTION_HOST2GUC_SELF_CFG),

drivers/gpu/drm/i915/gt/uc/intel_guc.c

864

FIELD_PREP(HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY, key) |

drivers/gpu/drm/i915/gt/uc/intel_guc.c

865

FIELD_PREP(HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN, len),

drivers/gpu/drm/i915/gt/uc/intel_guc.c

866

FIELD_PREP(HOST2GUC_SELF_CFG_REQUEST_MSG_2_VALUE32, lower_32_bits(value)),

drivers/gpu/drm/i915/gt/uc/intel_guc.c

867

FIELD_PREP(HOST2GUC_SELF_CFG_REQUEST_MSG_3_VALUE64, upper_32_bits(value)),

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

344

FIELD_PREP(GUC_REGSET_STEERING_GROUP, (group)) | \

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

345

FIELD_PREP(GUC_REGSET_STEERING_INSTANCE, (instance)) | \

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

823

FIELD_PREP(GUC_KLV_0_KEY, klv_id) |

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

824

FIELD_PREP(GUC_KLV_0_LEN, 0),

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

267

ext->flags = FIELD_PREP(GUC_REGSET_STEERING_GROUP, slice_id);

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

268

ext->flags |= FIELD_PREP(GUC_REGSET_STEERING_INSTANCE, subslice_id);

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

566

listnode->header.info = FIELD_PREP(GUC_CAPTURELISTHDR_NUMDESCR, (u32)num_regs);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

191

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

192

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

193

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_ACTION_HOST2GUC_CONTROL_CTB),

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

194

FIELD_PREP(HOST2GUC_CONTROL_CTB_REQUEST_MSG_1_CONTROL, control),

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

468

header = FIELD_PREP(GUC_CTB_MSG_0_FORMAT, GUC_CTB_FORMAT_HXG) |

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

469

FIELD_PREP(GUC_CTB_MSG_0_NUM_DWORDS, len) |

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

470

FIELD_PREP(GUC_CTB_MSG_0_FENCE, fence);

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

474

hxg = FIELD_PREP(GUC_HXG_MSG_0_TYPE, type) |

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

475

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION |

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h

131

(FIELD_PREP(INTEL_GUC_CT_SEND_G2H_DW_MASK, len_) | INTEL_GUC_CT_SEND_NB); \

drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

160

FIELD_PREP(HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID, id) | \

drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

161

FIELD_PREP(HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC, c) \

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2691

FIELD_PREP(GUC_KLV_0_KEY, GUC_CONTEXT_POLICIES_KLV_ID_##id) | \

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2692

FIELD_PREP(GUC_KLV_0_LEN, 1); \

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

4707

*(klv_ptr++) = FIELD_PREP(GUC_KLV_0_KEY, action) |

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

4708

FIELD_PREP(GUC_KLV_0_LEN, len);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

843

*wqi = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_NOOP) |

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

844

FIELD_PREP(WQ_LEN_MASK, len_dw);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

879

*wqi++ = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) |

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

880

FIELD_PREP(WQ_LEN_MASK, len_dw);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

882

*wqi++ = FIELD_PREP(WQ_GUC_ID_MASK, ce->guc_id.id) |

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

883

FIELD_PREP(WQ_RING_TAIL_MASK, ce->ring->tail / sizeof(u64));

drivers/gpu/drm/i915/i915_hwmon.c

223

r = FIELD_PREP(PKG_MAX_WIN, PKG_MAX_WIN_DEFAULT);

drivers/gpu/drm/i915/intel_wakeref.h

180

FIELD_PREP(INTEL_WAKEREF_PUT_DELAY_MASK, delay));

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

220

msg_in.header.stream_id = (FIELD_PREP(PXP43_INIT_SESSION_APPID, arb_session_id) |

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

221

FIELD_PREP(PXP43_INIT_SESSION_VALID, 1) |

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

222

FIELD_PREP(PXP43_INIT_SESSION_APPTYPE, 0));

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

264

msg_in.header.stream_id = FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_VALID, 1);

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

265

msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_APP_TYPE, 0);

drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c

266

msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_ID, session_id);

drivers/gpu/drm/i915/pxp/intel_pxp_tee.c

383

msg_in.header.stream_id = FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_VALID, 1);

drivers/gpu/drm/i915/pxp/intel_pxp_tee.c

384

msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_APP_TYPE, 0);

drivers/gpu/drm/i915/pxp/intel_pxp_tee.c

385

msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_ID, session_id);

drivers/gpu/drm/imx/dc/dc-cf.c

21

#define HEIGHT(x) FIELD_PREP(GENMASK(29, 16), ((x) - 1))

drivers/gpu/drm/imx/dc/dc-cf.c

22

#define WIDTH(x) FIELD_PREP(GENMASK(13, 0), ((x) - 1))

drivers/gpu/drm/imx/dc/dc-cf.c

25

#define BLUE(x) FIELD_PREP(GENMASK(15, 8), (x))

drivers/gpu/drm/imx/dc/dc-ed.c

19

#define DIV(x) FIELD_PREP(DIV_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fg.c

25

#define FGSYNCMODE(x) FIELD_PREP(FGSYNCMODE_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fg.c

29

#define HTOTAL(x) FIELD_PREP(GENMASK(29, 16), ((x) - 1))

drivers/gpu/drm/imx/dc/dc-fg.c

30

#define HACT(x) FIELD_PREP(GENMASK(13, 0), (x))

drivers/gpu/drm/imx/dc/dc-fg.c

34

#define HSBP(x) FIELD_PREP(GENMASK(29, 16), ((x) - 1))

drivers/gpu/drm/imx/dc/dc-fg.c

35

#define HSYNC(x) FIELD_PREP(GENMASK(13, 0), ((x) - 1))

drivers/gpu/drm/imx/dc/dc-fg.c

38

#define VTOTAL(x) FIELD_PREP(GENMASK(29, 16), ((x) - 1))

drivers/gpu/drm/imx/dc/dc-fg.c

39

#define VACT(x) FIELD_PREP(GENMASK(13, 0), (x))

drivers/gpu/drm/imx/dc/dc-fg.c

43

#define VSBP(x) FIELD_PREP(GENMASK(29, 16), ((x) - 1))

drivers/gpu/drm/imx/dc/dc-fg.c

44

#define VSYNC(x) FIELD_PREP(GENMASK(13, 0), ((x) - 1))

drivers/gpu/drm/imx/dc/dc-fg.c

49

#define ROW(x) FIELD_PREP(GENMASK(29, 16), (x))

drivers/gpu/drm/imx/dc/dc-fg.c

50

#define COL(x) FIELD_PREP(GENMASK(13, 0), (x))

drivers/gpu/drm/imx/dc/dc-fg.c

54

#define STARTY(x) FIELD_PREP(GENMASK(29, 16), ((x) + 1))

drivers/gpu/drm/imx/dc/dc-fg.c

55

#define STARTX(x) FIELD_PREP(GENMASK(13, 0), ((x) + 1))

drivers/gpu/drm/imx/dc/dc-fg.c

64

#define CCGREEN(x) FIELD_PREP(GENMASK(19, 10), (x))

drivers/gpu/drm/imx/dc/dc-fu.c

16

#define SHDLDREQSTICKY(x) FIELD_PREP(SHDLDREQSTICKY_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fu.c

18

#define BASEADDRESSAUTOUPDATE(x) FIELD_PREP(BASEADDRESSAUTOUPDATE_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fu.c

23

#define SETBURSTLENGTH(x) FIELD_PREP(SETBURSTLENGTH_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fu.c

25

#define SETNUMBUFFERS(x) FIELD_PREP(SETNUMBUFFERS_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fu.c

29

#define BITSPERPIXEL(x) FIELD_PREP(BITSPERPIXEL_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fu.c

31

#define STRIDE(x) FIELD_PREP(STRIDE_MASK, (x) - 1)

drivers/gpu/drm/imx/dc/dc-fu.c

34

#define LINECOUNT(x) FIELD_PREP(GENMASK(29, 16), (x))

drivers/gpu/drm/imx/dc/dc-fu.c

35

#define LINEWIDTH(x) FIELD_PREP(GENMASK(13, 0), (x))

drivers/gpu/drm/imx/dc/dc-fu.c

38

#define LAYERYOFFSET(x) FIELD_PREP(GENMASK(30, 16), (x))

drivers/gpu/drm/imx/dc/dc-fu.c

39

#define LAYERXOFFSET(x) FIELD_PREP(GENMASK(14, 0), (x))

drivers/gpu/drm/imx/dc/dc-fu.c

42

#define CLIPWINDOWYOFFSET(x) FIELD_PREP(GENMASK(30, 16), (x))

drivers/gpu/drm/imx/dc/dc-fu.c

43

#define CLIPWINDOWXOFFSET(x) FIELD_PREP(GENMASK(14, 0), (x))

drivers/gpu/drm/imx/dc/dc-fu.c

46

#define CLIPWINDOWHEIGHT(x) FIELD_PREP(GENMASK(29, 16), (x) - 1)

drivers/gpu/drm/imx/dc/dc-fu.c

47

#define CLIPWINDOWWIDTH(x) FIELD_PREP(GENMASK(13, 0), (x) - 1)

drivers/gpu/drm/imx/dc/dc-fu.h

38

#define YUVCONVERSIONMODE(x) FIELD_PREP(YUVCONVERSIONMODE_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fu.h

41

#define FRAMEHEIGHT(x) FIELD_PREP(GENMASK(29, 16), (x))

drivers/gpu/drm/imx/dc/dc-fu.h

42

#define FRAMEWIDTH(x) FIELD_PREP(GENMASK(13, 0), (x))

drivers/gpu/drm/imx/dc/dc-fu.h

46

#define INPUTSELECT(x) FIELD_PREP(INPUTSELECT_MASK, (x))

drivers/gpu/drm/imx/dc/dc-fu.h

48

#define RASTERMODE(x) FIELD_PREP(RASTERMODE_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

22

FIELD_PREP(PIXENGCFG_DYNAMIC_SEC_SEL_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

25

FIELD_PREP(PIXENGCFG_DYNAMIC_PRIM_SEL_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

29

#define SHDTOKSEL(x) FIELD_PREP(SHDTOKSEL_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

31

#define SHDLDSEL(x) FIELD_PREP(SHDLDSEL_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

35

#define CTRL_MODE(x) FIELD_PREP(CTRL_MODE_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

39

#define ALPHA(x) FIELD_PREP(ALPHA_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

42

FIELD_PREP(SEC_A_BLD_FUNC_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

45

FIELD_PREP(PRIM_A_BLD_FUNC_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

48

FIELD_PREP(SEC_C_BLD_FUNC_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

51

FIELD_PREP(PRIM_C_BLD_FUNC_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

55

#define YPOS(x) FIELD_PREP(YPOS_MASK, (x))

drivers/gpu/drm/imx/dc/dc-lb.c

57

#define XPOS(x) FIELD_PREP(XPOS_MASK, (x))

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

162

framesize = FIELD_PREP(IMX21LCDC_LSR_XMAX, crtc->mode.hdisplay >> 4) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

163

FIELD_PREP(IMX21LCDC_LSR_YMAX, crtc->mode.vdisplay);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

167

lhcr = FIELD_PREP(IMX21LCDC_LHCR_HFPORCH, crtc->mode.hsync_start - crtc->mode.hdisplay - 1) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

168

FIELD_PREP(IMX21LCDC_LHCR_HWIDTH, crtc->mode.hsync_end - crtc->mode.hsync_start - 1) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

169

FIELD_PREP(IMX21LCDC_LHCR_HBPORCH, crtc->mode.htotal - crtc->mode.hsync_end - 3);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

173

lvcr = FIELD_PREP(IMX21LCDC_LVCR_VFPORCH, crtc->mode.vsync_start - crtc->mode.vdisplay) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

174

FIELD_PREP(IMX21LCDC_LVCR_VWIDTH, crtc->mode.vsync_end - crtc->mode.vsync_start) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

175

FIELD_PREP(IMX21LCDC_LVCR_VBPORCH, crtc->mode.vtotal - crtc->mode.vsync_end);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

180

lpcr |= FIELD_PREP(IMX21LCDC_LPCR_BPIX, imx_lcdc_get_format(fb->format->format));

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

212

writel(FIELD_PREP(IMX21LCDC_LPCR_PCD, clk_div - 1) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

213

FIELD_PREP(IMX21LCDC_LPCR_LPPOL, hsync_pol) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

214

FIELD_PREP(IMX21LCDC_LPCR_FLMPOL, vsync_pol) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

215

FIELD_PREP(IMX21LCDC_LPCR_OEPOL, data_enable_pol) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

216

FIELD_PREP(IMX21LCDC_LPCR_TFT, 1) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

217

FIELD_PREP(IMX21LCDC_LPCR_COLOR, 1) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

218

FIELD_PREP(IMX21LCDC_LPCR_PBSIZ, 3) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

219

FIELD_PREP(IMX21LCDC_LPCR_BPIX, bpp) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

220

FIELD_PREP(IMX21LCDC_LPCR_SCLKSEL, 1) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

221

FIELD_PREP(IMX21LCDC_LPCR_PIXPOL, 0) |

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

222

FIELD_PREP(IMX21LCDC_LPCR_CLKPOL, clk_pol),

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

718

FIELD_PREP(JZ_LCD_DESSIZE_HEIGHT_MASK, height - 1) |

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

719

FIELD_PREP(JZ_LCD_DESSIZE_WIDTH_MASK, width - 1);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

120

word = FIELD_PREP(DISP_AAL_GAMMA_LUT_R, hwlut.red);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

121

word |= FIELD_PREP(DISP_AAL_GAMMA_LUT_G, hwlut.green);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

122

word |= FIELD_PREP(DISP_AAL_GAMMA_LUT_B, hwlut.blue);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

129

cfg_val |= FIELD_PREP(AAL_GAMMA_LUT_EN, 1);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

74

sz = FIELD_PREP(DISP_AAL_SIZE_HSIZE, w);

drivers/gpu/drm/mediatek/mtk_disp_aal.c

75

sz |= FIELD_PREP(DISP_AAL_SIZE_VSIZE, h);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

135

data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

141

lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

156

word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

157

word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

158

word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

160

word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

161

word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

162

word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

175

word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

176

word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

177

word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

179

word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

180

word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

181

word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

195

cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

201

cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

216

sz = FIELD_PREP(DISP_GAMMA_SIZE_HSIZE, w);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

217

sz |= FIELD_PREP(DISP_GAMMA_SIZE_VSIZE, h);

drivers/gpu/drm/mediatek/mtk_dpi.c

190

val = FIELD_PREP(DPI_PAT_SEL, type) | DPI_PAT_EN;

drivers/gpu/drm/mediatek/mtk_dsi.c

269

timcon0 = FIELD_PREP(LPX, timing->lpx) |

drivers/gpu/drm/mediatek/mtk_dsi.c

270

FIELD_PREP(HS_PREP, timing->da_hs_prepare) |

drivers/gpu/drm/mediatek/mtk_dsi.c

271

FIELD_PREP(HS_ZERO, timing->da_hs_zero) |

drivers/gpu/drm/mediatek/mtk_dsi.c

272

FIELD_PREP(HS_TRAIL, timing->da_hs_trail);

drivers/gpu/drm/mediatek/mtk_dsi.c

274

timcon1 = FIELD_PREP(TA_GO, timing->ta_go) |

drivers/gpu/drm/mediatek/mtk_dsi.c

275

FIELD_PREP(TA_SURE, timing->ta_sure) |

drivers/gpu/drm/mediatek/mtk_dsi.c

276

FIELD_PREP(TA_GET, timing->ta_get) |

drivers/gpu/drm/mediatek/mtk_dsi.c

277

FIELD_PREP(DA_HS_EXIT, timing->da_hs_exit);

drivers/gpu/drm/mediatek/mtk_dsi.c

279

timcon2 = FIELD_PREP(DA_HS_SYNC, 1) |

drivers/gpu/drm/mediatek/mtk_dsi.c

280

FIELD_PREP(CLK_ZERO, timing->clk_hs_zero) |

drivers/gpu/drm/mediatek/mtk_dsi.c

281

FIELD_PREP(CLK_TRAIL, timing->clk_hs_trail);

drivers/gpu/drm/mediatek/mtk_dsi.c

283

timcon3 = FIELD_PREP(CLK_HS_PREP, timing->clk_hs_prepare) |

drivers/gpu/drm/mediatek/mtk_dsi.c

284

FIELD_PREP(CLK_HS_POST, timing->clk_hs_post) |

drivers/gpu/drm/mediatek/mtk_dsi.c

285

FIELD_PREP(CLK_HS_EXIT, timing->clk_hs_exit);

drivers/gpu/drm/mediatek/mtk_dsi.c

385

regval = FIELD_PREP(LANE_NUM, tmp_reg);

drivers/gpu/drm/mediatek/mtk_dsi.c

406

ps_wc = FIELD_PREP(DSI_PS_WC, dsi->vm.hactive * dsi_buf_bpp);

drivers/gpu/drm/mediatek/mtk_dsi.c

414

ps_val |= FIELD_PREP(DSI_PS_SEL, PACKED_PS_24BIT_RGB888);

drivers/gpu/drm/mediatek/mtk_dsi.c

417

ps_val |= FIELD_PREP(DSI_PS_SEL, LOOSELY_PS_24BIT_RGB666);

drivers/gpu/drm/mediatek/mtk_dsi.c

420

ps_val |= FIELD_PREP(DSI_PS_SEL, PACKED_PS_18BIT_RGB666);

drivers/gpu/drm/mediatek/mtk_dsi.c

423

ps_val |= FIELD_PREP(DSI_PS_SEL, PACKED_PS_16BIT_RGB565);

drivers/gpu/drm/mediatek/mtk_dsi.c

428

vact_nl = FIELD_PREP(VACT_NL, dsi->vm.vactive);

drivers/gpu/drm/mediatek/mtk_dsi.c

490

hstx_cklp_wc = FIELD_PREP(HSTX_CKL_WC, (hstx_cklp_wc_min + hstx_cklp_wc_max) / 2);

drivers/gpu/drm/mediatek/mtk_dsi.c

495

horizontal_frontporch_byte |= FIELD_PREP(HFP_HS_EN, 1) |

drivers/gpu/drm/mediatek/mtk_dsi.c

496

FIELD_PREP(HFP_HS_VB_PS_WC, hs_vb_ps_wc);

drivers/gpu/drm/mediatek/mtk_dsi.c

577

writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) |

drivers/gpu/drm/mediatek/mtk_dsi.c

578

FIELD_PREP(DSI_WIDTH, vm->hactive),

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

102

FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_SEQ_WRITE) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

103

FIELD_PREP(DDC_CTRL_DIN_CNT, wr_data == NULL ? 0 : data_cnt) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

104

FIELD_PREP(DDC_CTRL_OFFSET, offset_id) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

105

FIELD_PREP(DDC_CTRL_ADDR, addr_id));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

115

FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_ABORT_XFER));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

141

FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_CLEAR_FIFO));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

161

FIELD_PREP(HPD_DDC_DELAY_CNT, dly_cnt));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

172

FIELD_PREP(SCDC_DDC_SEGMENT, uc_dev - DDC_ADDR));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

175

FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_ENH_READ_NOACK) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

176

FIELD_PREP(DDC_CTRL_DIN_CNT, temp_length) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

177

FIELD_PREP(DDC_CTRL_OFFSET, addr + i * temp_length) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

178

FIELD_PREP(DDC_CTRL_ADDR, DDC_ADDR));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

188

FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_SEQ_READ_NOACK) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

189

FIELD_PREP(DDC_CTRL_DIN_CNT, temp_length) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

190

FIELD_PREP(DDC_CTRL_OFFSET, addr + offset) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

191

FIELD_PREP(DDC_CTRL_ADDR, uc_dev));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

203

FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_ABORT_XFER));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

218

FIELD_PREP(SI2C_ADDR, SI2C_ADDR_READ) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

225

FIELD_PREP(SI2C_ADDR, SI2C_ADDR_READ) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

51

FIELD_PREP(DDC_CTRL_CMD, DDC_CMD_CLOCK_SCL));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

87

FIELD_PREP(HPD_DDC_DELAY_CNT, DDC2_DLY_CNT));

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

96

FIELD_PREP(SI2C_ADDR, SI2C_ADDR_READ) |

drivers/gpu/drm/mediatek/mtk_hdmi_ddc_v2.c

97

FIELD_PREP(SI2C_WDATA, wr_data[i]) |

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

1248

FIELD_PREP(HDMI_ABIST_VIDEO_FORMAT, abist_format));

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

351

val = FIELD_PREP(SD0_MAP, sd0) | FIELD_PREP(SD1_MAP, sd1);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

352

val |= FIELD_PREP(SD2_MAP, sd2) | FIELD_PREP(SD3_MAP, sd3);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

353

val |= FIELD_PREP(SD4_MAP, sd4) | FIELD_PREP(SD5_MAP, sd5);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

354

val |= FIELD_PREP(SD6_MAP, sd6) | FIELD_PREP(SD7_MAP, sd7);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

384

regmap_update_bits(hdmi->regs, AIP_CTRL, I2S_EN, FIELD_PREP(I2S_EN, chnum));

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

416

fifo_map = FIELD_PREP(FIFO0_MAP, 0) | FIELD_PREP(FIFO1_MAP, 1);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

417

fifo_map |= FIELD_PREP(FIFO2_MAP, 2) | FIELD_PREP(FIFO3_MAP, 3);

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

483

regmap_update_bits(hdmi->regs, AIP_CTRL, SPDIF_EN, FIELD_PREP(SPDIF_EN, spdif_i2s));

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

560

FIELD_PREP(MAX_2UI_I2S_HI_WRITE, MAX_2UI_I2S_LFE_CC_SWAP));

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

585

FIELD_PREP(MAX_1UI_WRITE, 4));

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

587

FIELD_PREP(MAX_2UI_SPDIF_WRITE, 9));

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

589

FIELD_PREP(AUD_ERR_THRESH, 4));

drivers/gpu/drm/mediatek/mtk_hdmi_v2.c

725

FIELD_PREP(TMDS_PACK_MODE, TMDS_PACK_MODE_8BPP));

drivers/gpu/drm/meson/meson_crtc.c

139

writel(FIELD_PREP(GENMASK(11, 0), 2303),

drivers/gpu/drm/meson/meson_crtc.c

99

writel(FIELD_PREP(GENMASK(11, 0), 2303),

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

128

writel_relaxed(FIELD_PREP(MIPI_DSI_TOP_DPI_COLOR_MODE, dpi_data_format) |

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

129

FIELD_PREP(MIPI_DSI_TOP_IN_COLOR_MODE, venc_data_width) |

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

130

FIELD_PREP(MIPI_DSI_TOP_COMP2_SEL, 2) |

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

131

FIELD_PREP(MIPI_DSI_TOP_COMP1_SEL, 1) |

drivers/gpu/drm/meson/meson_dw_mipi_dsi.c

132

FIELD_PREP(MIPI_DSI_TOP_COMP0_SEL, 0),

drivers/gpu/drm/meson/meson_osd_afbcd.c

103

writel_relaxed(FIELD_PREP(OSD1_AFBCD_ID_FIFO_THRD, 0x40) |

drivers/gpu/drm/meson/meson_osd_afbcd.c

121

u32 mode = FIELD_PREP(OSD1_AFBCD_MIF_URGENT, 3) |

drivers/gpu/drm/meson/meson_osd_afbcd.c

122

FIELD_PREP(OSD1_AFBCD_HOLD_LINE_NUM, 4) |

drivers/gpu/drm/meson/meson_osd_afbcd.c

123

FIELD_PREP(OSD1_AFBCD_RGBA_EXCHAN_CTRL, 0x34) |

drivers/gpu/drm/meson/meson_osd_afbcd.c

135

writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,

drivers/gpu/drm/meson/meson_osd_afbcd.c

137

FIELD_PREP(OSD1_AFBCD_HREG_HSIZE_IN,

drivers/gpu/drm/meson/meson_osd_afbcd.c

165

writel_relaxed(FIELD_PREP(OSD1_AFBCD_DEC_PIXEL_BGN_H, 0) |

drivers/gpu/drm/meson/meson_osd_afbcd.c

166

FIELD_PREP(OSD1_AFBCD_DEC_PIXEL_END_H,

drivers/gpu/drm/meson/meson_osd_afbcd.c

170

writel_relaxed(FIELD_PREP(OSD1_AFBCD_DEC_PIXEL_BGN_V, 0) |

drivers/gpu/drm/meson/meson_osd_afbcd.c

171

FIELD_PREP(OSD1_AFBCD_DEC_PIXEL_END_V,

drivers/gpu/drm/meson/meson_osd_afbcd.c

357

format |= FIELD_PREP(VPU_MAFBC_SUPER_BLOCK_ASPECT, 1);

drivers/gpu/drm/meson/meson_overlay.c

103

#define AFBC_HSIZE_IN(value) FIELD_PREP(GENMASK(28, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

104

#define AFBC_VSIZE_IN(value) FIELD_PREP(GENMASK(12, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

107

#define AFBC_DEF_COLOR_Y(value) FIELD_PREP(GENMASK(29, 20), value)

drivers/gpu/drm/meson/meson_overlay.c

108

#define AFBC_DEF_COLOR_U(value) FIELD_PREP(GENMASK(19, 10), value)

drivers/gpu/drm/meson/meson_overlay.c

109

#define AFBC_DEF_COLOR_V(value) FIELD_PREP(GENMASK(9, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

112

#define AFBC_CONV_LBUF_LEN(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

115

#define AFBC_DEC_LBUF_DEPTH(value) FIELD_PREP(GENMASK(27, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

116

#define AFBC_MIF_LBUF_DEPTH(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

119

#define AFBC_HSIZE_OUT(value) FIELD_PREP(GENMASK(28, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

120

#define AFBC_VSIZE_OUT(value) FIELD_PREP(GENMASK(12, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

121

#define AFBC_OUT_HORZ_BGN(value) FIELD_PREP(GENMASK(28, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

122

#define AFBC_OUT_HORZ_END(value) FIELD_PREP(GENMASK(12, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

125

#define AFBC_OUT_VERT_BGN(value) FIELD_PREP(GENMASK(28, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

126

#define AFBC_OUT_VERT_END(value) FIELD_PREP(GENMASK(12, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

130

#define AFBC_HORZ_Y_C_RATIO(value) FIELD_PREP(GENMASK(22, 21), value)

drivers/gpu/drm/meson/meson_overlay.c

133

#define AFBC_VERT_INITIAL_PHASE(value) FIELD_PREP(GENMASK(11, 8), value)

drivers/gpu/drm/meson/meson_overlay.c

134

#define AFBC_VERT_PHASE_STEP(value) FIELD_PREP(GENMASK(7, 1), value)

drivers/gpu/drm/meson/meson_overlay.c

138

#define AFBC_VD_V_WIDTH(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

139

#define AFBC_VD_H_WIDTH(value) FIELD_PREP(GENMASK(27, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

142

#define AFBC_MIF_BLK_BGN_H(value) FIELD_PREP(GENMASK(25, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

143

#define AFBC_MIF_BLK_END_H(value) FIELD_PREP(GENMASK(9, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

146

#define AFBC_MIF_BLK_BGN_V(value) FIELD_PREP(GENMASK(27, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

147

#define AFBC_MIF_BLK_END_V(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

150

#define AFBC_DEC_PIXEL_BGN_H(value) FIELD_PREP(GENMASK(28, 16), \

drivers/gpu/drm/meson/meson_overlay.c

152

#define AFBC_DEC_PIXEL_END_H(value) FIELD_PREP(GENMASK(12, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

155

#define AFBC_DEC_PIXEL_BGN_V(value) FIELD_PREP(GENMASK(28, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

156

#define AFBC_DEC_PIXEL_END_V(value) FIELD_PREP(GENMASK(12, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

159

#define AFBC_VD_HEIGHT(value) FIELD_PREP(GENMASK(12, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

29

#define VD_HOLD_LINES(lines) FIELD_PREP(GENMASK(24, 19), lines)

drivers/gpu/drm/meson/meson_overlay.c

31

#define VD_BYTES_PER_PIXEL(val) FIELD_PREP(GENMASK(15, 14), val)

drivers/gpu/drm/meson/meson_overlay.c

38

#define CANVAS_ADDR2(addr) FIELD_PREP(GENMASK(23, 16), addr)

drivers/gpu/drm/meson/meson_overlay.c

39

#define CANVAS_ADDR1(addr) FIELD_PREP(GENMASK(15, 8), addr)

drivers/gpu/drm/meson/meson_overlay.c

40

#define CANVAS_ADDR0(addr) FIELD_PREP(GENMASK(7, 0), addr)

drivers/gpu/drm/meson/meson_overlay.c

43

#define VD_X_START(value) FIELD_PREP(GENMASK(14, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

44

#define VD_X_END(value) FIELD_PREP(GENMASK(30, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

47

#define VD_Y_START(value) FIELD_PREP(GENMASK(12, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

48

#define VD_Y_END(value) FIELD_PREP(GENMASK(28, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

51

#define VD_COLOR_MAP(value) FIELD_PREP(GENMASK(1, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

54

#define VD_HORZ_Y_C_RATIO(value) FIELD_PREP(GENMASK(22, 21), value)

drivers/gpu/drm/meson/meson_overlay.c

57

#define VD_VERT_INITIAL_PHASE(value) FIELD_PREP(GENMASK(11, 8), value)

drivers/gpu/drm/meson/meson_overlay.c

58

#define VD_VERT_PHASE_STEP(value) FIELD_PREP(GENMASK(7, 1), value)

drivers/gpu/drm/meson/meson_overlay.c

62

#define VD_H_END(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

63

#define VD_H_START(value) FIELD_PREP(GENMASK(27, 16), \

drivers/gpu/drm/meson/meson_overlay.c

67

#define VD_V_END(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

68

#define VD_V_START(value) FIELD_PREP(GENMASK(27, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

71

#define VD2_V_END(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

72

#define VD2_V_START(value) FIELD_PREP(GENMASK(27, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

75

#define VD_V_WIDTH(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

76

#define VD_H_WIDTH(value) FIELD_PREP(GENMASK(27, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

79

#define VD_REGION24_START(value) FIELD_PREP(GENMASK(11, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

80

#define VD_REGION13_END(value) FIELD_PREP(GENMASK(27, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

87

#define AFBC_HORZ_SKIP_UV(value) FIELD_PREP(GENMASK(1, 0), value)

drivers/gpu/drm/meson/meson_overlay.c

88

#define AFBC_VERT_SKIP_UV(value) FIELD_PREP(GENMASK(3, 2), value)

drivers/gpu/drm/meson/meson_overlay.c

89

#define AFBC_HORZ_SKIP_Y(value) FIELD_PREP(GENMASK(5, 4), value)

drivers/gpu/drm/meson/meson_overlay.c

90

#define AFBC_VERT_SKIP_Y(value) FIELD_PREP(GENMASK(7, 6), value)

drivers/gpu/drm/meson/meson_overlay.c

91

#define AFBC_COMPBITS_YUV(value) FIELD_PREP(GENMASK(13, 8), value)

drivers/gpu/drm/meson/meson_overlay.c

94

#define AFBC_BURST_LEN(value) FIELD_PREP(GENMASK(15, 14), value)

drivers/gpu/drm/meson/meson_overlay.c

95

#define AFBC_HOLD_LINE_NUM(value) FIELD_PREP(GENMASK(22, 16), value)

drivers/gpu/drm/meson/meson_overlay.c

96

#define AFBC_MIF_URGENT(value) FIELD_PREP(GENMASK(25, 24), value)

drivers/gpu/drm/meson/meson_overlay.c

97

#define AFBC_REV_MODE(value) FIELD_PREP(GENMASK(27, 26), value)

drivers/gpu/drm/meson/meson_plane.c

31

#define SCI_WH_M1_W(w) FIELD_PREP(GENMASK(28, 16), w)

drivers/gpu/drm/meson/meson_plane.c

32

#define SCI_WH_M1_H(h) FIELD_PREP(GENMASK(12, 0), h)

drivers/gpu/drm/meson/meson_plane.c

36

#define SCO_HV_START(start) FIELD_PREP(GENMASK(27, 16), start)

drivers/gpu/drm/meson/meson_plane.c

37

#define SCO_HV_END(end) FIELD_PREP(GENMASK(11, 0), end)

drivers/gpu/drm/meson/meson_plane.c

44

#define VSC_BANK_LEN(value) FIELD_PREP(GENMASK(2, 0), value)

drivers/gpu/drm/meson/meson_plane.c

45

#define VSC_TOP_INI_RCV_NUM(value) FIELD_PREP(GENMASK(6, 3), value)

drivers/gpu/drm/meson/meson_plane.c

46

#define VSC_TOP_RPT_L0_NUM(value) FIELD_PREP(GENMASK(9, 8), value)

drivers/gpu/drm/meson/meson_plane.c

47

#define VSC_BOT_INI_RCV_NUM(value) FIELD_PREP(GENMASK(14, 11), value)

drivers/gpu/drm/meson/meson_plane.c

48

#define VSC_BOT_RPT_L0_NUM(value) FIELD_PREP(GENMASK(17, 16), value)

drivers/gpu/drm/meson/meson_plane.c

53

#define VSC_INI_PHASE_BOT(bottom) FIELD_PREP(GENMASK(31, 16), bottom)

drivers/gpu/drm/meson/meson_plane.c

54

#define VSC_INI_PHASE_TOP(top) FIELD_PREP(GENMASK(15, 0), top)

drivers/gpu/drm/meson/meson_plane.c

57

#define HSC_BANK_LENGTH(value) FIELD_PREP(GENMASK(2, 0), value)

drivers/gpu/drm/meson/meson_plane.c

58

#define HSC_INI_RCV_NUM0(value) FIELD_PREP(GENMASK(6, 3), value)

drivers/gpu/drm/meson/meson_plane.c

59

#define HSC_RPT_P0_NUM0(value) FIELD_PREP(GENMASK(9, 8), value)

drivers/gpu/drm/meson/meson_plane.c

64

#define SC_PHASE_STEP(value) FIELD_PREP(GENMASK(27, 0), value)

drivers/gpu/drm/meson/meson_rdma.c

130

FIELD_PREP(RDMA_ACCESS_TRIGGER_CHAN1,

drivers/gpu/drm/meson/meson_rdma.c

41

FIELD_PREP(RDMA_CTRL_AHB_WR_BURST, 3) |

drivers/gpu/drm/meson/meson_rdma.c

42

FIELD_PREP(RDMA_CTRL_AHB_RD_BURST, 0),

drivers/gpu/drm/meson/meson_rdma.c

79

FIELD_PREP(RDMA_ACCESS_ADDR_INC_CHAN1,

drivers/gpu/drm/meson/meson_venc.c

1596

FIELD_PREP(L_GAMMA_ADDR_PORT_ADDR, 0),

drivers/gpu/drm/meson/meson_venc.c

1615

FIELD_PREP(L_GAMMA_ADDR_PORT_ADDR, 0x23),

drivers/gpu/drm/meson/meson_viu.c

342

(FIELD_PREP(VIU_OSD1_MALI_AFBCD_A_REORDER, \

drivers/gpu/drm/meson/meson_viu.c

344

FIELD_PREP(VIU_OSD1_MALI_AFBCD_B_REORDER, \

drivers/gpu/drm/meson/meson_viu.c

346

FIELD_PREP(VIU_OSD1_MALI_AFBCD_G_REORDER, \

drivers/gpu/drm/meson/meson_viu.c

348

FIELD_PREP(VIU_OSD1_MALI_AFBCD_R_REORDER, \

drivers/gpu/drm/meson/meson_viu.c

352

(FIELD_PREP(VIU_OSD1_MALI_AFBCD_A_REORDER, \

drivers/gpu/drm/meson/meson_viu.c

354

FIELD_PREP(VIU_OSD1_MALI_AFBCD_B_REORDER, \

drivers/gpu/drm/meson/meson_viu.c

356

FIELD_PREP(VIU_OSD1_MALI_AFBCD_G_REORDER, \

drivers/gpu/drm/meson/meson_viu.c

358

FIELD_PREP(VIU_OSD1_MALI_AFBCD_R_REORDER, \

drivers/gpu/drm/meson/meson_viu.c

404

writel_bits_relaxed(MALI_AFBC_MISC, FIELD_PREP(MALI_AFBC_MISC, 0x90),

drivers/gpu/drm/meson/meson_viu.c

410

writel_bits_relaxed(MALI_AFBC_MISC, FIELD_PREP(MALI_AFBC_MISC, 0x00),

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

954

FIELD_PREP(GENMASK(30, 18), fence_range_upper) |

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

955

FIELD_PREP(GENMASK(17, 0), fence_range_lower));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1405

FIELD_PREP(GENMASK(7, 0), 0x4));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1470

FIELD_PREP(GENMASK(19, 16), 6) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1471

FIELD_PREP(GENMASK(15, 12), 6) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1472

FIELD_PREP(GENMASK(11, 8), 9) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1474

FIELD_PREP(GENMASK(1, 0), 2));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2059

cntl1_regval |= FIELD_PREP(GENMASK(29, 25), gpuhtw_scid);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2100

FIELD_PREP(GENMASK(29, 25), gpu_scid) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2101

FIELD_PREP(GENMASK(24, 20), gpu_scid) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2102

FIELD_PREP(GENMASK(19, 15), gpu_scid) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2103

FIELD_PREP(GENMASK(14, 10), gpu_scid) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2104

FIELD_PREP(GENMASK(9, 5), gpu_scid) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2105

FIELD_PREP(GENMASK(4, 0), gpu_scid));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2108

FIELD_PREP(GENMASK(14, 10), gpu_scid) |

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

857

FIELD_PREP(GENMASK(8, 5), hbb_lo));

drivers/gpu/drm/msm/adreno/a6xx_hfi.h

216

#define AB_VOTE(vote) FIELD_PREP(AB_VOTE_MASK, (vote))

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

112

adreno_gpu->chip_id |= FIELD_PREP(GENMASK(7, 4), hweight32(slice_mask));

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1131

FIELD_PREP(GENMASK(29, 24), gpu_scid) |

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1132

FIELD_PREP(GENMASK(23, 18), gpu_scid) |

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1133

FIELD_PREP(GENMASK(17, 12), gpu_scid) |

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1134

FIELD_PREP(GENMASK(11, 6), gpu_scid) |

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1135

FIELD_PREP(GENMASK(5, 0), gpu_scid));

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1138

FIELD_PREP(GENMASK(27, 22), gpu_scid) |

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1139

FIELD_PREP(GENMASK(21, 16), gpu_scid) |

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1140

FIELD_PREP(GENMASK(15, 10), gpu_scid) |

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

560

FIELD_PREP(GENMASK(7, 0), 0x4));

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

107

FIELD_PREP(CDM_CDWN2_H_PIXEL_METHOD_MASK, CDM_CDWN2_METHOD_OFFSITE);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

126

FIELD_PREP(CDM_CDWN2_V_PIXEL_METHOD_MASK,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

131

FIELD_PREP(CDM_CDWN2_V_PIXEL_METHOD_MASK,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

136

FIELD_PREP(CDM_CDWN2_V_PIXEL_METHOD_MASK,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

144

FIELD_PREP(CDM_CDWN2_V_PIXEL_METHOD_MASK,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

86

FIELD_PREP(CDM_CDWN2_H_PIXEL_METHOD_MASK,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

91

FIELD_PREP(CDM_CDWN2_H_PIXEL_METHOD_MASK,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

96

FIELD_PREP(CDM_CDWN2_H_PIXEL_METHOD_MASK,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.c

40

cwb_mux_cfg = FIELD_PREP(CWB_MUX_MASK, pp - PINGPONG_0);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.c

42

input = FIELD_PREP(CWB_MODE_MASK, input);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

236

sel |= FIELD_PREP(MDP_DP_PHY_INTF_SEL_INTF0, phys[0]);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

237

sel |= FIELD_PREP(MDP_DP_PHY_INTF_SEL_INTF1, phys[1]);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

242

sel |= FIELD_PREP(MDP_DP_PHY_INTF_SEL_PHY0, intf + 1);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

245

sel |= FIELD_PREP(MDP_DP_PHY_INTF_SEL_PHY1, intf + 1);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

248

sel |= FIELD_PREP(MDP_DP_PHY_INTF_SEL_PHY2, intf + 1);

drivers/gpu/drm/msm/dp/dp_reg.h

128

#define DP_MAINLINK_FLUSH_MODE_UPDATE_SDP FIELD_PREP(DP_MAINLINK_CTRL_FLUSH_MODE_MASK, 1)

drivers/gpu/drm/msm/dp/dp_reg.h

129

#define DP_MAINLINK_FLUSH_MODE_SDE_PERIPH_UPDATE FIELD_PREP(DP_MAINLINK_CTRL_FLUSH_MODE_MASK, 3)

drivers/gpu/drm/msm/dp/dp_utils.c

79

header_buff[0] = FIELD_PREP(HEADER_0_MASK, sdp_header->HB0) |

drivers/gpu/drm/msm/dp/dp_utils.c

80

FIELD_PREP(PARITY_0_MASK, msm_dp_utils_calculate_parity(sdp_header->HB0)) |

drivers/gpu/drm/msm/dp/dp_utils.c

81

FIELD_PREP(HEADER_1_MASK, sdp_header->HB1) |

drivers/gpu/drm/msm/dp/dp_utils.c

82

FIELD_PREP(PARITY_1_MASK, msm_dp_utils_calculate_parity(sdp_header->HB1));

drivers/gpu/drm/msm/dp/dp_utils.c

84

header_buff[1] = FIELD_PREP(HEADER_2_MASK, sdp_header->HB2) |

drivers/gpu/drm/msm/dp/dp_utils.c

85

FIELD_PREP(PARITY_2_MASK, msm_dp_utils_calculate_parity(sdp_header->HB2)) |

drivers/gpu/drm/msm/dp/dp_utils.c

86

FIELD_PREP(HEADER_3_MASK, sdp_header->HB3) |

drivers/gpu/drm/msm/dp/dp_utils.c

87

FIELD_PREP(PARITY_3_MASK, msm_dp_utils_calculate_parity(sdp_header->HB3));

drivers/gpu/drm/mxsfb/lcdif_kms.c

351

writel(FIELD_PREP(PANIC0_THRES_LOW_MASK, 1 * PANIC0_THRES_MAX / 3) |

drivers/gpu/drm/mxsfb/lcdif_kms.c

352

FIELD_PREP(PANIC0_THRES_HIGH_MASK, 2 * PANIC0_THRES_MAX / 3),

drivers/gpu/drm/panel/panel-auo-a030jtn01.c

87

err = regmap_write(priv->map, REG06, FIELD_PREP(REG06_VBLK, 0x1e));

drivers/gpu/drm/panel/panel-auo-a030jtn01.c

92

err = regmap_write(priv->map, REG07, FIELD_PREP(REG07_HBLK, 0xd8));

drivers/gpu/drm/panel/panel-himax-hx8279.c

404

cmd_set_goa[1] = FIELD_PREP(HX8279_P3_GOA_STV_LEAD,

drivers/gpu/drm/panel/panel-himax-hx8279.c

412

cmd_set_goa[1] = FIELD_PREP(HX8279_P3_GOA_CKV_DUMMY,

drivers/gpu/drm/panel/panel-himax-hx8279.c

420

cmd_set_goa[1] = FIELD_PREP(HX8279_P3_GOA_CKV_LEAD,

drivers/gpu/drm/panel/panel-himax-hx8279.c

422

cmd_set_goa[1] |= FIELD_PREP(HX8279_P3_GOA_CKV_NONOVERLAP,

drivers/gpu/drm/panel/panel-himax-hx8279.c

466

cmd_set_goa[1] = FIELD_PREP(HX8279_P3_GOA_CLR_CFG_STARTPOS,

drivers/gpu/drm/panel/panel-himax-hx8279.c

468

cmd_set_goa[1] |= FIELD_PREP(HX8279_P3_GOA_CLR_CFG_POLARITY,

drivers/gpu/drm/panel/panel-himax-hx8279.c

500

cmd_set_mipi[1] = FIELD_PREP(HX8279_P5_TIMING_TLPX, desc->bta_tlpx);

drivers/gpu/drm/panel/panel-himax-hx8279.c

501

cmd_set_mipi[1] |= FIELD_PREP(HX8279_P5_TIMING_THS_SETTLE,

drivers/gpu/drm/panel/panel-himax-hx8279.c

503

cmd_set_mipi[1] |= FIELD_PREP(HX8279_P5_TIMING_LHS_SETTLE,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

200

val = ST7701_CMD2 | FIELD_PREP(ST7701_CMD2BK_MASK, bkx);

drivers/gpu/drm/panel/panel-sitronix-st7701.c

242

FIELD_PREP(ST7701_CMD2_BK0_LNESET_LINE_MASK, linecount8 - 1) |

drivers/gpu/drm/panel/panel-sitronix-st7701.c

244

FIELD_PREP(ST7701_CMD2_BK0_LNESET_LINEDELTA, linecountrem2));

drivers/gpu/drm/panel/panel-sitronix-st7701.c

246

FIELD_PREP(ST7701_CMD2_BK0_PORCTRL_VBP_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

248

FIELD_PREP(ST7701_CMD2_BK0_PORCTRL_VFP_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

258

FIELD_PREP(ST7701_CMD2_BK0_INVSEL_NLINV_MASK, desc->nlinv),

drivers/gpu/drm/panel/panel-sitronix-st7701.c

259

FIELD_PREP(ST7701_CMD2_BK0_INVSEL_RTNI_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

267

FIELD_PREP(ST7701_CMD2_BK1_VRHA_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

272

FIELD_PREP(ST7701_CMD2_BK1_VCOM_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

277

FIELD_PREP(ST7701_CMD2_BK1_VGHSS_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

288

FIELD_PREP(ST7701_CMD2_BK1_VGLS_MASK, st7701_vgls_map(st7701)));

drivers/gpu/drm/panel/panel-sitronix-st7701.c

291

FIELD_PREP(ST7701_CMD2_BK1_PWRCTRL1_AP_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

293

FIELD_PREP(ST7701_CMD2_BK1_PWRCTRL1_APIS_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

295

FIELD_PREP(ST7701_CMD2_BK1_PWRCTRL1_APOS_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

300

FIELD_PREP(ST7701_CMD2_BK1_PWRCTRL2_AVDD_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

302

FIELD_PREP(ST7701_CMD2_BK1_PWRCTRL2_AVCL_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

308

FIELD_PREP(ST7701_CMD2_BK1_SPD1_T2D_MASK,

drivers/gpu/drm/panel/panel-sitronix-st7701.c

314

FIELD_PREP(ST7701_CMD2_BK1_SPD2_T3D_MASK,

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

171

#define TXVMPSPHSETR_DT_RGB16 FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x0e)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

172

#define TXVMPSPHSETR_DT_RGB18 FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x1e)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

173

#define TXVMPSPHSETR_DT_RGB18_LS FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x2e)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

174

#define TXVMPSPHSETR_DT_RGB24 FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x3e)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

175

#define TXVMPSPHSETR_DT_YCBCR16 FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x2c)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

182

#define TXVMVPRMSET0R_BPP_16 FIELD_PREP(TXVMVPRMSET0R_BPP_MASK, 0)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

183

#define TXVMVPRMSET0R_BPP_18 FIELD_PREP(TXVMVPRMSET0R_BPP_MASK, 1)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

184

#define TXVMVPRMSET0R_BPP_24 FIELD_PREP(TXVMVPRMSET0R_BPP_MASK, 2)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

188

#define TXVMVPRMSET1R_VACTIVE(n) FIELD_PREP(TXVMVPRMSET1R_VACTIVE_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

190

#define TXVMVPRMSET1R_VSA(n) FIELD_PREP(TXVMVPRMSET1R_VSA_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

194

#define TXVMVPRMSET2R_VFP(n) FIELD_PREP(TXVMVPRMSET2R_VFP_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

196

#define TXVMVPRMSET2R_VBP(n) FIELD_PREP(TXVMVPRMSET2R_VBP_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

200

#define TXVMVPRMSET3R_HACTIVE(n) FIELD_PREP(TXVMVPRMSET3R_HACTIVE_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

202

#define TXVMVPRMSET3R_HSA(n) FIELD_PREP(TXVMVPRMSET3R_HSA_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

206

#define TXVMVPRMSET4R_HFP(n) FIELD_PREP(TXVMVPRMSET4R_HFP_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

208

#define TXVMVPRMSET4R_HBP(n) FIELD_PREP(TXVMVPRMSET4R_HBP_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

257

#define VCLKSET_DIV_V3U(n) FIELD_PREP(VCLKSET_DIV_V3U_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

259

#define VCLKSET_DIV_V4H(n) FIELD_PREP(VCLKSET_DIV_V4H_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

261

#define VCLKSET_BPP_16 FIELD_PREP(VCLKSET_BPP_MASK, 0)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

262

#define VCLKSET_BPP_18 FIELD_PREP(VCLKSET_BPP_MASK, 1)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

263

#define VCLKSET_BPP_18L FIELD_PREP(VCLKSET_BPP_MASK, 2)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

264

#define VCLKSET_BPP_24 FIELD_PREP(VCLKSET_BPP_MASK, 3)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

266

#define VCLKSET_LANE(n) FIELD_PREP(VCLKSET_LANE_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

273

#define PHYSETUP_HSFREQRANGE(n) FIELD_PREP(PHYSETUP_HSFREQRANGE_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

282

#define CLOCKSET1_CLKINSEL_EXTAL FIELD_PREP(CLOCKSET1_CLKINSEL_MASK, 0)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

283

#define CLOCKSET1_CLKINSEL_DIG FIELD_PREP(CLOCKSET1_CLKINSEL_MASK, 1)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

284

#define CLOCKSET1_CLKINSEL_DU FIELD_PREP(CLOCKSET1_CLKINSEL_MASK, 2)

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

290

#define CLOCKSET2_M(n) FIELD_PREP(CLOCKSET2_M_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

292

#define CLOCKSET2_VCO_CNTRL(n) FIELD_PREP(CLOCKSET2_VCO_CNTRL_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

294

#define CLOCKSET2_N(n) FIELD_PREP(CLOCKSET2_N_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

298

#define CLOCKSET3_PROP_CNTRL(n) FIELD_PREP(CLOCKSET3_PROP_CNTRL_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

300

#define CLOCKSET3_INT_CNTRL(n) FIELD_PREP(CLOCKSET3_INT_CNTRL_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

302

#define CLOCKSET3_CPBIAS_CNTRL(n) FIELD_PREP(CLOCKSET3_CPBIAS_CNTRL_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

304

#define CLOCKSET3_GMP_CNTRL(n) FIELD_PREP(CLOCKSET3_GMP_CNTRL_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

44

#define TXCMPHDR_VC(n) FIELD_PREP(TXCMPHDR_VC_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

46

#define TXCMPHDR_DT(n) FIELD_PREP(TXCMPHDR_DT_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

48

#define TXCMPHDR_DATA1(n) FIELD_PREP(TXCMPHDR_DATA1_MASK, (n))

drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h

50

#define TXCMPHDR_DATA0(n) FIELD_PREP(TXCMPHDR_DATA0_MASK, (n))

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1272

value |= FIELD_PREP(SQCH0DSC0AR_BTA, SQCH0DSC0AR_BTA_NON_READ);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1275

value |= FIELD_PREP(SQCH0DSC0AR_BTA, SQCH0DSC0AR_BTA_READ);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1278

value |= FIELD_PREP(SQCH0DSC0AR_BTA, SQCH0DSC0AR_BTA_NONE);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1288

value |= FIELD_PREP(SQCH0DSC0AR_DT, packet.header[0]) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1289

FIELD_PREP(SQCH0DSC0AR_DATA0, packet.header[1]) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

1290

FIELD_PREP(SQCH0DSC0AR_DATA1, packet.header[2]);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

672

phytclksetr = FIELD_PREP(PHYTCLKSETR_TCLKTRAILCTL, dphy_timings.tclk_trail) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

673

FIELD_PREP(PHYTCLKSETR_TCLKPOSTCTL, dphy_timings.tclk_post) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

674

FIELD_PREP(PHYTCLKSETR_TCLKZEROCTL, dphy_timings.tclk_zero) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

675

FIELD_PREP(PHYTCLKSETR_TCLKPRPRCTL, dphy_timings.tclk_prepare);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

676

phythssetr = FIELD_PREP(PHYTHSSETR_THSEXITCTL, dphy_timings.ths_exit) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

677

FIELD_PREP(PHYTHSSETR_THSTRAILCTL, dphy_timings.ths_trail) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

678

FIELD_PREP(PHYTHSSETR_THSZEROCTL, dphy_timings.ths_zero) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

679

FIELD_PREP(PHYTHSSETR_THSPRPRCTL, dphy_timings.ths_prepare);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

681

phytlpxsetr |= FIELD_PREP(PHYTLPXSETR_TLPXCTL, dphy_timings.tlpx);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

683

phycr |= FIELD_PREP(PHYCR_ULPSEXIT, ulpsexit);

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

692

FIELD_PREP(PLLCLKSET0R_PLL_S, dsi_parameters->s) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

693

FIELD_PREP(PLLCLKSET0R_PLL_P, dsi_parameters->p) |

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

694

FIELD_PREP(PLLCLKSET0R_PLL_M, dsi_parameters->m));

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

696

FIELD_PREP(PLLCLKSET1R_PLL_K, dsi_parameters->k));

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c

812

dsisetr |= FIELD_PREP(DSISETR_MRPSZ, RZG2L_DCS_BUF_SIZE);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1472

FIELD_PREP(RK3588_LUT_PORT_SEL__GAMMA_AHB_WRITE_SEL, vp->id));

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1546

*dsp_ctrl |= FIELD_PREP(RK3568_VP_DSP_CTRL__DITHER_DOWN_SEL,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1689

dsp_ctrl |= FIELD_PREP(RK3568_VP_DSP_CTRL__OUT_MODE, out_mode);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

496

return FIELD_PREP(TRANSFORM_XOFFSET, tx) |

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

497

FIELD_PREP(TRANSFORM_YOFFSET, ty);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1404

FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_RGB_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1406

dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1415

FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_HDMI_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1417

dip |= FIELD_PREP(RK3568_DSP_IF_POL__HDMI_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1422

FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_EDP_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1424

dip |= FIELD_PREP(RK3568_DSP_IF_POL__EDP_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1429

FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_MIPI0_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1431

dip |= FIELD_PREP(RK3568_DSP_IF_POL__MIPI_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1436

FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_MIPI1_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1438

dip |= FIELD_PREP(RK3568_DSP_IF_POL__MIPI_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1443

FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_LVDS0_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1445

dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1450

FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_LVDS1_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1452

dip |= FIELD_PREP(RK3568_DSP_IF_POL__RGB_LVDS_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1533

ctrl |= FIELD_PREP(RK3576_DSP_IF_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1534

ctrl |= FIELD_PREP(RK3576_DSP_IF_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1537

vp_clk_div = FIELD_PREP(RK3588_VP_CLK_CTRL__DCLK_CORE_DIV, dclk_core_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1538

vp_clk_div |= FIELD_PREP(RK3588_VP_CLK_CTRL__DCLK_OUT_DIV, dclk_out_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1701

vp_clk_div = FIELD_PREP(RK3588_VP_CLK_CTRL__DCLK_CORE_DIV, dclk_core_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1702

vp_clk_div |= FIELD_PREP(RK3588_VP_CLK_CTRL__DCLK_OUT_DIV, dclk_out_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1712

div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV, if_dclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1713

div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_PCLK_DIV, if_pixclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1716

FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_EDP_HDMI0_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1725

div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI1_DCLK_DIV, if_dclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1726

div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI1_PCLK_DIV, if_pixclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1729

FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_EDP_HDMI1_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1738

div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV, if_dclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1739

div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_PCLK_DIV, if_pixclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1742

FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_EDP_HDMI0_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1748

div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV, if_dclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1749

div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_PCLK_DIV, if_pixclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1752

FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_EDP_HDMI1_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1757

div |= FIELD_PREP(RK3588_DSP_IF_MIPI0_PCLK_DIV, if_pixclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1761

FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_MIPI0_MUX, !!val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1765

div |= FIELD_PREP(RK3588_DSP_IF_MIPI1_PCLK_DIV, if_pixclk_div);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1769

FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_MIPI1_MUX, val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1774

FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_DP0_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1776

dip |= FIELD_PREP(RK3588_DSP_IF_POL__DP0_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1781

FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_DP1_MUX, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1783

dip |= FIELD_PREP(RK3588_DSP_IF_POL__DP1_PIN_POL, polflags);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2169

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT0_MUX,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2172

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT0_MUX, 8);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2175

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2178

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX, 8);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2181

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2184

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX, 8);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2188

port_sel |= FIELD_PREP(RK3588_OVL_PORT_SET__PORT3_MUX, 7);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2225

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__CLUSTER0, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2229

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__CLUSTER1, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2233

port_sel |= FIELD_PREP(RK3588_OVL_PORT_SEL__CLUSTER2, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2237

port_sel |= FIELD_PREP(RK3588_OVL_PORT_SEL__CLUSTER3, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2241

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__ESMART0, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2245

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__ESMART1, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2249

port_sel |= FIELD_PREP(RK3588_OVL_PORT_SEL__ESMART2, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2253

port_sel |= FIELD_PREP(RK3588_OVL_PORT_SEL__ESMART3, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2257

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__SMART0, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2261

port_sel |= FIELD_PREP(RK3568_OVL_PORT_SEL__SMART1, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2293

ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2332

cdly |= FIELD_PREP(RK3568_CLUSTER_DLY_NUM__CLUSTER0_0, dly);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2333

cdly |= FIELD_PREP(RK3568_CLUSTER_DLY_NUM__CLUSTER0_1, dly);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2336

cdly |= FIELD_PREP(RK3568_CLUSTER_DLY_NUM__CLUSTER1_0, dly);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2337

cdly |= FIELD_PREP(RK3568_CLUSTER_DLY_NUM__CLUSTER1_1, dly);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2340

sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__ESMART0, dly);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2343

sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__ESMART1, dly);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2347

sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__SMART0, dly);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2351

sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__SMART1, dly);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2463

FIELD_PREP(RK3568_VP_BG_MIX_CTRL__BG_DLY, bg_dly));

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2483

FIELD_PREP(RK3576_OVL_BG_MIX_CTRL__BG_DLY, bg_dly));

drivers/gpu/drm/sitronix/st7571.c

47

#define ST7571_SET_COLUMN_LSB(c) (0x00 | FIELD_PREP(GENMASK(3, 0), (c)))

drivers/gpu/drm/sitronix/st7571.c

48

#define ST7571_SET_COLUMN_MSB(c) (0x10 | FIELD_PREP(GENMASK(2, 0), (c) >> 4))

drivers/gpu/drm/sitronix/st7571.c

49

#define ST7571_SET_COM0_LSB(x) (FIELD_PREP(GENMASK(6, 0), (x)))

drivers/gpu/drm/sitronix/st7571.c

51

#define ST7571_SET_COM_SCAN_DIR(d) (0xc0 | FIELD_PREP(GENMASK(3, 3), (d)))

drivers/gpu/drm/sitronix/st7571.c

52

#define ST7571_SET_CONTRAST_LSB(c) (FIELD_PREP(GENMASK(5, 0), (c)))

drivers/gpu/drm/sitronix/st7571.c

54

#define ST7571_SET_DISPLAY_DUTY_LSB(d) (FIELD_PREP(GENMASK(7, 0), (d)))

drivers/gpu/drm/sitronix/st7571.c

56

#define ST7571_SET_ENTIRE_DISPLAY_ON(p) (0xa4 | FIELD_PREP(GENMASK(0, 0), (p)))

drivers/gpu/drm/sitronix/st7571.c

57

#define ST7571_SET_LCD_BIAS(b) (0x50 | FIELD_PREP(GENMASK(2, 0), (b)))

drivers/gpu/drm/sitronix/st7571.c

58

#define ST7571_SET_MODE_LSB(m) (FIELD_PREP(GENMASK(7, 2), (m)))

drivers/gpu/drm/sitronix/st7571.c

60

#define ST7571_SET_PAGE(p) (0xb0 | FIELD_PREP(GENMASK(3, 0), (p)))

drivers/gpu/drm/sitronix/st7571.c

61

#define ST7571_SET_POWER(p) (0x28 | FIELD_PREP(GENMASK(2, 0), (p)))

drivers/gpu/drm/sitronix/st7571.c

62

#define ST7571_SET_REGULATOR_REG(r) (0x20 | FIELD_PREP(GENMASK(2, 0), (r)))

drivers/gpu/drm/sitronix/st7571.c

63

#define ST7571_SET_REVERSE(r) (0xa6 | FIELD_PREP(GENMASK(0, 0), (r)))

drivers/gpu/drm/sitronix/st7571.c

64

#define ST7571_SET_SEG_SCAN_DIR(d) (0xa0 | FIELD_PREP(GENMASK(0, 0), (d)))

drivers/gpu/drm/sitronix/st7571.c

65

#define ST7571_SET_START_LINE_LSB(l) (FIELD_PREP(GENMASK(6, 0), (l)))

drivers/gpu/drm/sitronix/st7571.c

70

#define ST7571_SET_COLOR_MODE(c) (0x10 | FIELD_PREP(GENMASK(0, 0), (c)))

drivers/gpu/drm/sitronix/st7571.c

74

#define ST7567_SET_LCD_BIAS(m) (0xa2 | FIELD_PREP(GENMASK(0, 0), (m)))

drivers/gpu/drm/solomon/ssd130x.c

58

#define SSD13XX_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD13XX_SET_SEG_REMAP_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

79

#define SSD130X_PAGE_COL_START_HIGH_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4)

drivers/gpu/drm/solomon/ssd130x.c

80

#define SSD130X_PAGE_COL_START_LOW_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

82

#define SSD130X_START_PAGE_ADDRESS_SET(val) FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

84

#define SSD130X_SET_COM_SCAN_DIR_SET(val) FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

86

#define SSD130X_SET_CLOCK_DIV_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

88

#define SSD130X_SET_CLOCK_FREQ_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

90

#define SSD130X_SET_PRECHARGE_PERIOD1_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

92

#define SSD130X_SET_PRECHARGE_PERIOD2_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

94

#define SSD130X_SET_COM_PINS_CONFIG1_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, (val))

drivers/gpu/drm/solomon/ssd130x.c

96

#define SSD130X_SET_COM_PINS_CONFIG2_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val))

drivers/gpu/drm/sun4i/sun8i_tcon_top.c

48

val |= FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, tcon - 1);

drivers/gpu/drm/sun4i/sun8i_tcon_top.c

83

reg |= FIELD_PREP(TCON_TOP_PORT_DE0_MSK, tcon);

drivers/gpu/drm/sun4i/sun8i_tcon_top.c

86

reg |= FIELD_PREP(TCON_TOP_PORT_DE1_MSK, tcon);

drivers/gpu/drm/tidss/tidss_dispc.c

1160

FIELD_PREP(DISPC_VP_TIMING_H_SYNC_PULSE_MASK, hsw - 1) |

drivers/gpu/drm/tidss/tidss_dispc.c

1161

FIELD_PREP(DISPC_VP_TIMING_H_FRONT_PORCH_MASK, hfp - 1) |

drivers/gpu/drm/tidss/tidss_dispc.c

1162

FIELD_PREP(DISPC_VP_TIMING_H_BACK_PORCH_MASK, hbp - 1));

drivers/gpu/drm/tidss/tidss_dispc.c

1165

FIELD_PREP(DISPC_VP_TIMING_V_SYNC_PULSE_MASK, vsw - 1) |

drivers/gpu/drm/tidss/tidss_dispc.c

1166

FIELD_PREP(DISPC_VP_TIMING_V_FRONT_PORCH_MASK, vfp) |

drivers/gpu/drm/tidss/tidss_dispc.c

1167

FIELD_PREP(DISPC_VP_TIMING_V_BACK_PORCH_MASK, vbp));

drivers/gpu/drm/tidss/tidss_dispc.c

1190

FIELD_PREP(DISPC_VP_POL_FREQ_ALIGN_MASK, align) |

drivers/gpu/drm/tidss/tidss_dispc.c

1191

FIELD_PREP(DISPC_VP_POL_FREQ_ONOFF_MASK, onoff) |

drivers/gpu/drm/tidss/tidss_dispc.c

1192

FIELD_PREP(DISPC_VP_POL_FREQ_RF_MASK, rf) |

drivers/gpu/drm/tidss/tidss_dispc.c

1193

FIELD_PREP(DISPC_VP_POL_FREQ_IEO_MASK, ieo) |

drivers/gpu/drm/tidss/tidss_dispc.c

1194

FIELD_PREP(DISPC_VP_POL_FREQ_IPC_MASK, ipc) |

drivers/gpu/drm/tidss/tidss_dispc.c

1195

FIELD_PREP(DISPC_VP_POL_FREQ_IHS_MASK, ihs) |

drivers/gpu/drm/tidss/tidss_dispc.c

1196

FIELD_PREP(DISPC_VP_POL_FREQ_IVS_MASK, ivs));

drivers/gpu/drm/tidss/tidss_dispc.c

1199

FIELD_PREP(DISPC_VP_SIZE_SCREEN_HDISPLAY_MASK,

drivers/gpu/drm/tidss/tidss_dispc.c

1201

FIELD_PREP(DISPC_VP_SIZE_SCREEN_VDISPLAY_MASK,

drivers/gpu/drm/tidss/tidss_dispc.c

1543

#define OVAL(x, y) (FIELD_PREP(GENMASK(15, 3), x) | FIELD_PREP(GENMASK(31, 19), y))

drivers/gpu/drm/tidss/tidss_dispc.c

1550

#define CVAL(x, y) (FIELD_PREP(GENMASK(10, 0), x) | FIELD_PREP(GENMASK(26, 16), y))

drivers/gpu/drm/tidss/tidss_dispc.c

1790

c12 = FIELD_PREP(GENMASK(19, 10), c1) | FIELD_PREP(GENMASK(29, 20),

drivers/gpu/drm/tidss/tidss_dispc.c

2213

FIELD_PREP(DISPC_VID_PICTURE_SIZE_MEMSIZEY_MASK, scale.in_h - 1) |

drivers/gpu/drm/tidss/tidss_dispc.c

2214

FIELD_PREP(DISPC_VID_PICTURE_SIZE_MEMSIZEX_MASK, scale.in_w - 1));

drivers/gpu/drm/tidss/tidss_dispc.c

2251

FIELD_PREP(DISPC_VID_SIZE_SIZEY_MASK,

drivers/gpu/drm/tidss/tidss_dispc.c

2253

FIELD_PREP(DISPC_VID_SIZE_SIZEX_MASK,

drivers/gpu/drm/tidss/tidss_dispc.c

2268

FIELD_PREP(DISPC_VID_GLOBAL_ALPHA_GLOBALALPHA_MASK,

drivers/gpu/drm/tidss/tidss_dispc.c

2295

FIELD_PREP(DISPC_VID_MFLAG_THRESHOLD_HT_MFLAG_MASK, high) |

drivers/gpu/drm/tidss/tidss_dispc.c

2296

FIELD_PREP(DISPC_VID_MFLAG_THRESHOLD_LT_MFLAG_MASK, low));

drivers/gpu/drm/tidss/tidss_dispc.c

2303

FIELD_PREP(DISPC_VID_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK,

drivers/gpu/drm/tidss/tidss_dispc.c

2305

FIELD_PREP(DISPC_VID_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK,

drivers/gpu/drm/tidss/tidss_dispc.c

2452

FIELD_PREP(DISPC_CONNECTIONS_DPI_0_CONN_MASK, 2) | /* VP1 to DPI0 */

drivers/gpu/drm/tidss/tidss_dispc.c

2453

FIELD_PREP(DISPC_CONNECTIONS_DPI_1_CONN_MASK, 8) /* VP3 to DPI1 */

drivers/gpu/drm/tidss/tidss_dispc.c

2631

#define CVAL(xR, xG, xB) (FIELD_PREP(GENMASK(9, 0), xR) | FIELD_PREP(GENMASK(20, 11), xG) | \

drivers/gpu/drm/tidss/tidss_dispc.c

2632

FIELD_PREP(GENMASK(31, 22), xB))

drivers/gpu/drm/vc4/vc4_regs.h

17

FIELD_PREP(field##_MASK, value); \

drivers/gpu/drm/vc4/vc4_regs.h

27

FIELD_PREP(hvs->vc4->gen == VC4_GEN_6_C ? \

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

171

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

172

FIELD_PREP(GUC_HXG_MSG_0_TYPE, 4), /* only 4 is undefined */

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

257

reply[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_GUC) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

258

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_EVENT) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

259

FIELD_PREP(GUC_HXG_EVENT_MSG_0_ACTION, action);

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

283

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

284

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

285

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_RELAY_ACTION_VFXPF_TESTLOOP) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

286

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_DATA0, VFXPF_TESTLOOP_OPCODE_NOP),

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

311

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

312

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

313

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_RELAY_ACTION_VFXPF_TESTLOOP) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

314

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_DATA0, VFXPF_TESTLOOP_OPCODE_ECHO),

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

344

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

345

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

346

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_RELAY_ACTION_VFXPF_TESTLOOP) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

347

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_DATA0, VFXPF_TESTLOOP_OPCODE_FAIL),

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

367

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

368

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

369

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_RELAY_ACTION_VFXPF_TESTLOOP) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

370

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_DATA0, VFXPF_TESTLOOP_OPCODE_BUSY),

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

392

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

393

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

394

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_RELAY_ACTION_VFXPF_TESTLOOP) |

drivers/gpu/drm/xe/tests/xe_guc_relay_test.c

395

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_DATA0, VFXPF_TESTLOOP_OPCODE_RETRY),

drivers/gpu/drm/xe/xe_execlist.c

56

lrc_desc |= FIELD_PREP(XEHP_SW_CTX_ID, ctx_id);

drivers/gpu/drm/xe/xe_execlist.c

59

lrc_desc |= FIELD_PREP(SW_CTX_ID, ctx_id);

drivers/gpu/drm/xe/xe_ggtt.c

1000

return FIELD_PREP(GGTT_PTE_VFID, vfid) | XE_PAGE_PRESENT;

drivers/gpu/drm/xe/xe_gsc_proxy.c

211

FIELD_PREP(GSC_PROXY_TYPE, GSC_PROXY_MSG_TYPE_PROXY_QUERY) |

drivers/gpu/drm/xe/xe_gsc_proxy.c

212

FIELD_PREP(GSC_PROXY_PAYLOAD_LENGTH, 0));

drivers/gpu/drm/xe/xe_gsc_submit.c

74

host_session_id |= FIELD_PREP(HOST_SESSION_CLIENT_MASK, heci_client_id);

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

140

FIELD_PREP(GUC_KLV_0_KEY, key) | FIELD_PREP(GUC_KLV_0_LEN, 1),

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

150

FIELD_PREP(GUC_KLV_0_KEY, key) | FIELD_PREP(GUC_KLV_0_LEN, 2),

drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c

209

klv[0] = FIELD_PREP(GUC_KLV_0_KEY, key) | FIELD_PREP(GUC_KLV_0_LEN, count);

drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c

49

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c

50

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c

51

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_ACTION_PF2GUC_VF_CONTROL),

drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c

52

FIELD_PREP(PF2GUC_VF_CONTROL_REQUEST_MSG_1_VFID, vfid),

drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c

53

FIELD_PREP(PF2GUC_VF_CONTROL_REQUEST_MSG_2_COMMAND, cmd),

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

158

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

159

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

160

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_ACTION_PF2GUC_SAVE_RESTORE_VF) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

161

FIELD_PREP(PF2GUC_SAVE_RESTORE_VF_REQUEST_MSG_0_OPCODE, opcode),

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

162

FIELD_PREP(PF2GUC_SAVE_RESTORE_VF_REQUEST_MSG_1_VFID, vfid),

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

163

FIELD_PREP(PF2GUC_SAVE_RESTORE_VF_REQUEST_MSG_2_ADDR_LO, lower_32_bits(addr)),

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

164

FIELD_PREP(PF2GUC_SAVE_RESTORE_VF_REQUEST_MSG_3_ADDR_HI, upper_32_bits(addr)),

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

165

FIELD_PREP(PF2GUC_SAVE_RESTORE_VF_REQUEST_MSG_4_SIZE, ndwords),

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

273

response[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

274

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_RESPONSE_SUCCESS) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

275

FIELD_PREP(GUC_HXG_RESPONSE_MSG_0_DATA0, 0);

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

276

response[1] = FIELD_PREP(VF2PF_HANDSHAKE_RESPONSE_MSG_1_MAJOR, major) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

277

FIELD_PREP(VF2PF_HANDSHAKE_RESPONSE_MSG_1_MINOR, minor);

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

348

response[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

349

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_RESPONSE_SUCCESS) |

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

350

FIELD_PREP(VF2PF_QUERY_RUNTIME_RESPONSE_MSG_0_COUNT, ret);

drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c

351

response[1] = FIELD_PREP(VF2PF_QUERY_RUNTIME_RESPONSE_MSG_1_REMAINING, remaining);

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

128

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

129

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

130

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION,

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

132

FIELD_PREP(VF2GUC_MATCH_VERSION_REQUEST_MSG_1_BRANCH, wanted->branch) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

133

FIELD_PREP(VF2GUC_MATCH_VERSION_REQUEST_MSG_1_MAJOR, wanted->major) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

134

FIELD_PREP(VF2GUC_MATCH_VERSION_REQUEST_MSG_1_MINOR, wanted->minor),

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

336

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

337

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

338

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_ACTION_VF2GUC_RESFIX_START) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

339

FIELD_PREP(VF2GUC_RESFIX_START_REQUEST_MSG_0_MARKER, marker),

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

364

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

365

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

366

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_ACTION_VF2GUC_RESFIX_DONE) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

367

FIELD_PREP(VF2GUC_RESFIX_DONE_REQUEST_MSG_0_MARKER, marker),

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

391

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

392

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

393

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION,

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

395

FIELD_PREP(VF2GUC_QUERY_SINGLE_KLV_REQUEST_MSG_1_KEY, key),

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

736

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

737

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

738

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_RELAY_ACTION_VF2PF_HANDSHAKE),

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

739

FIELD_PREP(VF2PF_HANDSHAKE_REQUEST_MSG_1_MAJOR, *major) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

740

FIELD_PREP(VF2PF_HANDSHAKE_REQUEST_MSG_1_MINOR, *minor),

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

78

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

79

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

80

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, GUC_ACTION_VF2GUC_VF_RESET),

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

947

request[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

948

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

949

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION,

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

951

FIELD_PREP(VF2PF_QUERY_RUNTIME_REQUEST_MSG_0_LIMIT, limit);

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

954

request[1] = FIELD_PREP(VF2PF_QUERY_RUNTIME_REQUEST_MSG_1_START, start);

drivers/gpu/drm/xe/xe_guc.c

134

FIELD_PREP(GUC_LOG_CRASH_DUMP, XE_GUC_LOG_CRASH_DUMP_BUFFER_SIZE / LOG_UNIT - 1) |

drivers/gpu/drm/xe/xe_guc.c

135

FIELD_PREP(GUC_LOG_EVENT_DATA, XE_GUC_LOG_EVENT_DATA_BUFFER_SIZE / LOG_UNIT - 1) |

drivers/gpu/drm/xe/xe_guc.c

136

FIELD_PREP(GUC_LOG_STATE_CAPTURE, XE_GUC_LOG_STATE_CAPTURE_BUFFER_SIZE /

drivers/gpu/drm/xe/xe_guc.c

138

FIELD_PREP(GUC_LOG_BUF_ADDR, offset);

drivers/gpu/drm/xe/xe_guc.c

1454

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_GUC),

drivers/gpu/drm/xe/xe_guc.c

1480

u32 resp_mask = FIELD_PREP(GUC_HXG_MSG_0_TYPE, resp_bits);

drivers/gpu/drm/xe/xe_guc.c

151

u32 flags = FIELD_PREP(GUC_ADS_ADDR, ads);

drivers/gpu/drm/xe/xe_guc.c

1556

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc.c

1557

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_guc.c

1558

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION,

drivers/gpu/drm/xe/xe_guc.c

1560

FIELD_PREP(HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY, key) |

drivers/gpu/drm/xe/xe_guc.c

1561

FIELD_PREP(HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN, len),

drivers/gpu/drm/xe/xe_guc.c

1562

FIELD_PREP(HOST2GUC_SELF_CFG_REQUEST_MSG_2_VALUE32,

drivers/gpu/drm/xe/xe_guc.c

1564

FIELD_PREP(HOST2GUC_SELF_CFG_REQUEST_MSG_3_VALUE64,

drivers/gpu/drm/xe/xe_guc.c

299

FIELD_PREP(XE_G2G_REGISTER_SIZE, size / SZ_4K - 1) |

drivers/gpu/drm/xe/xe_guc.c

300

FIELD_PREP(XE_G2G_REGISTER_TYPE, type) |

drivers/gpu/drm/xe/xe_guc.c

301

FIELD_PREP(XE_G2G_REGISTER_TILE, dst_tile) |

drivers/gpu/drm/xe/xe_guc.c

302

FIELD_PREP(XE_G2G_REGISTER_DEVICE, dst_dev),

drivers/gpu/drm/xe/xe_guc.c

319

FIELD_PREP(XE_G2G_DEREGISTER_TYPE, type) |

drivers/gpu/drm/xe/xe_guc.c

320

FIELD_PREP(XE_G2G_DEREGISTER_TILE, dst_tile) |

drivers/gpu/drm/xe/xe_guc.c

321

FIELD_PREP(XE_G2G_DEREGISTER_DEVICE, dst_dev),

drivers/gpu/drm/xe/xe_guc.c

80

flags |= FIELD_PREP(GUC_LOG_VERBOSITY, GUC_LOG_LEVEL_TO_VERBOSITY(level));

drivers/gpu/drm/xe/xe_guc_ads.c

300

FIELD_PREP(GUC_KLV_0_KEY, klv_id) | FIELD_PREP(GUC_KLV_0_LEN, data_len_dw));

drivers/gpu/drm/xe/xe_guc_ads.c

722

entry.flags |= FIELD_PREP(GUC_REGSET_STEERING_GROUP, group);

drivers/gpu/drm/xe/xe_guc_ads.c

723

entry.flags |= FIELD_PREP(GUC_REGSET_STEERING_INSTANCE, instance);

drivers/gpu/drm/xe/xe_guc_capture.c

385

ext->flags = FIELD_PREP(GUC_REGSET_STEERING_NEEDED, 1);

drivers/gpu/drm/xe/xe_guc_capture.c

386

ext->flags |= FIELD_PREP(GUC_REGSET_STEERING_GROUP, slice_id);

drivers/gpu/drm/xe/xe_guc_capture.c

387

ext->flags |= FIELD_PREP(GUC_REGSET_STEERING_INSTANCE, subslice_id);

drivers/gpu/drm/xe/xe_guc_capture.c

694

listnode->header.info = FIELD_PREP(GUC_CAPTURELISTHDR_NUMDESCR, (u32)num_regs);

drivers/gpu/drm/xe/xe_guc_ct.c

504

FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc_ct.c

505

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_guc_ct.c

506

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION,

drivers/gpu/drm/xe/xe_guc_ct.c

508

FIELD_PREP(HOST2GUC_CONTROL_CTB_REQUEST_MSG_1_CONTROL,

drivers/gpu/drm/xe/xe_guc_ct.c

892

FIELD_PREP(GUC_HXG_MSG_0_TYPE, type) | \

drivers/gpu/drm/xe/xe_guc_ct.c

893

FIELD_PREP(GUC_HXG_EVENT_MSG_0_ACTION | \

drivers/gpu/drm/xe/xe_guc_ct.c

979

cmd[0] = FIELD_PREP(GUC_CTB_MSG_0_FORMAT, GUC_CTB_FORMAT_HXG) |

drivers/gpu/drm/xe/xe_guc_ct.c

980

FIELD_PREP(GUC_CTB_MSG_0_NUM_DWORDS, len) |

drivers/gpu/drm/xe/xe_guc_ct.c

981

FIELD_PREP(GUC_CTB_MSG_0_FENCE, ct_fence_value);

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

101

msg[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

102

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_NO_RESPONSE_RETRY) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

103

FIELD_PREP(GUC_HXG_RETRY_MSG_0_REASON, reason);

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

73

msg[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

74

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_RESPONSE_SUCCESS) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

75

FIELD_PREP(GUC_HXG_RESPONSE_MSG_0_DATA0, data0);

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

82

msg[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

83

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_RESPONSE_FAILURE) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

84

FIELD_PREP(GUC_HXG_FAILURE_MSG_0_HINT, hint) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

85

FIELD_PREP(GUC_HXG_FAILURE_MSG_0_ERROR, error);

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

92

msg[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

93

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_NO_RESPONSE_BUSY) |

drivers/gpu/drm/xe/xe_guc_hxg_helpers.h

94

FIELD_PREP(GUC_HXG_BUSY_MSG_0_COUNTER, counter);

drivers/gpu/drm/xe/xe_guc_klv_helpers.h

27

(FIELD_PREP(GUC_KLV_0_KEY, (key)) | \

drivers/gpu/drm/xe/xe_guc_klv_helpers.h

28

FIELD_PREP(GUC_KLV_0_LEN, (len)))

drivers/gpu/drm/xe/xe_guc_log.c

281

lfd.header |= FIELD_PREP(GUC_LFD_DATA_HEADER_MASK_TYPE, type);

drivers/gpu/drm/xe/xe_guc_log.c

330

lfd.header |= FIELD_PREP(GUC_LFD_DATA_HEADER_MASK_TYPE, GUC_LFD_TYPE_OS_ID);

drivers/gpu/drm/xe/xe_guc_log.c

469

lfd.header |= FIELD_PREP(GUC_LFD_DATA_HEADER_MASK_TYPE, GUC_LFD_TYPE_LOG_EVENTS_BUFFER);

drivers/gpu/drm/xe/xe_guc_log.c

533

lfd.header |= FIELD_PREP(GUC_LFD_DATA_HEADER_MASK_TYPE, GUC_LFD_TYPE_FW_CRASH_DUMP);

drivers/gpu/drm/xe/xe_guc_pagefault.c

23

FIELD_PREP(PFR_VALID, 1) |

drivers/gpu/drm/xe/xe_guc_pagefault.c

24

FIELD_PREP(PFR_SUCCESS, !!err) |

drivers/gpu/drm/xe/xe_guc_pagefault.c

25

FIELD_PREP(PFR_REPLY, PFR_ACCESS) |

drivers/gpu/drm/xe/xe_guc_pagefault.c

26

FIELD_PREP(PFR_DESC_TYPE, FAULT_RESPONSE_DESC) |

drivers/gpu/drm/xe/xe_guc_pagefault.c

27

FIELD_PREP(PFR_ASID, pf->consumer.asid),

drivers/gpu/drm/xe/xe_guc_pagefault.c

29

FIELD_PREP(PFR_VFID, vfid) |

drivers/gpu/drm/xe/xe_guc_pagefault.c

30

FIELD_PREP(PFR_ENG_INSTANCE, engine_instance) |

drivers/gpu/drm/xe/xe_guc_pagefault.c

31

FIELD_PREP(PFR_ENG_CLASS, engine_class) |

drivers/gpu/drm/xe/xe_guc_pagefault.c

32

FIELD_PREP(PFR_PDATA, pdata),

drivers/gpu/drm/xe/xe_guc_pc.c

131

(FIELD_PREP(HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID, id) | \

drivers/gpu/drm/xe/xe_guc_pc.c

132

FIELD_PREP(HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC, count))

drivers/gpu/drm/xe/xe_guc_relay.c

198

msg[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc_relay.c

199

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_guc_relay.c

200

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, XE_GUC_ACTION_PF2GUC_RELAY_TO_VF);

drivers/gpu/drm/xe/xe_guc_relay.c

201

msg[1] = FIELD_PREP(PF2GUC_RELAY_TO_VF_REQUEST_MSG_1_VFID, target);

drivers/gpu/drm/xe/xe_guc_relay.c

202

msg[2] = FIELD_PREP(PF2GUC_RELAY_TO_VF_REQUEST_MSG_2_RELAY_ID, rid);

drivers/gpu/drm/xe/xe_guc_relay.c

209

msg[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc_relay.c

210

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_REQUEST) |

drivers/gpu/drm/xe/xe_guc_relay.c

211

FIELD_PREP(GUC_HXG_REQUEST_MSG_0_ACTION, XE_GUC_ACTION_VF2GUC_RELAY_TO_PF);

drivers/gpu/drm/xe/xe_guc_relay.c

212

msg[1] = FIELD_PREP(VF2GUC_RELAY_TO_PF_REQUEST_MSG_1_RELAY_ID, rid);

drivers/gpu/drm/xe/xe_guc_relay.c

403

msg[0] = FIELD_PREP(GUC_HXG_MSG_0_ORIGIN, GUC_HXG_ORIGIN_HOST) |

drivers/gpu/drm/xe/xe_guc_relay.c

404

FIELD_PREP(GUC_HXG_MSG_0_TYPE, GUC_HXG_TYPE_RESPONSE_FAILURE) |

drivers/gpu/drm/xe/xe_guc_relay.c

405

FIELD_PREP(GUC_HXG_FAILURE_MSG_0_HINT, hint) |

drivers/gpu/drm/xe/xe_guc_relay.c

406

FIELD_PREP(GUC_HXG_FAILURE_MSG_0_ERROR, error);

drivers/gpu/drm/xe/xe_guc_submit.c

1045

FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_NOOP) |

drivers/gpu/drm/xe/xe_guc_submit.c

1046

FIELD_PREP(WQ_LEN_MASK, len_dw));

drivers/gpu/drm/xe/xe_guc_submit.c

1070

wqi[i++] = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) |

drivers/gpu/drm/xe/xe_guc_submit.c

1071

FIELD_PREP(WQ_LEN_MASK, len_dw);

drivers/gpu/drm/xe/xe_guc_submit.c

1073

wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |

drivers/gpu/drm/xe/xe_guc_submit.c

1074

FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc[0]->ring.tail / sizeof(u64));

drivers/gpu/drm/xe/xe_guc_submit.c

2434

FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_NOOP) |

drivers/gpu/drm/xe/xe_guc_submit.c

2435

FIELD_PREP(WQ_LEN_MASK, 0));

drivers/gpu/drm/xe/xe_guc_submit.c

504

FIELD_PREP(GUC_KLV_0_KEY, \

drivers/gpu/drm/xe/xe_guc_submit.c

506

FIELD_PREP(GUC_KLV_0_LEN, 1); \

drivers/gpu/drm/xe/xe_guc_submit.c

934

FIELD_PREP(CONTEXT_REGISTRATION_FLAG_TYPE, ctx_type);

drivers/gpu/drm/xe/xe_hwmon.c

619

r = FIELD_PREP(PKG_MAX_WIN, PKG_MAX_WIN_DEFAULT);

drivers/gpu/drm/xe/xe_lmtt_2l.c

132

return FIELD_PREP(LMTT_2L_PTE_LMEM_PAGE, offset / SZ_2M) | LMTT_2L_PTE_VALID;

drivers/gpu/drm/xe/xe_lmtt_2l.c

136

return FIELD_PREP(LMTT_2L_PDE_LMTT_PTR, offset / SZ_64K) | LMTT_2L_PDE_VALID;

drivers/gpu/drm/xe/xe_lmtt_ml.c

142

return FIELD_PREP(LMTT_ML_PTE_LMEM_PAGE, offset / SZ_2M) | LMTT_ML_PTE_VALID;

drivers/gpu/drm/xe/xe_lmtt_ml.c

147

return FIELD_PREP(LMTT_ML_PDE_LMTT_PTR, offset / SZ_64K) | LMTT_ML_PDE_VALID;

drivers/gpu/drm/xe/xe_lrc.c

1431

lrc->desc |= FIELD_PREP(LRC_PRIORITY, xe_multi_queue_prio_to_lrc(lrc, priority));

drivers/gpu/drm/xe/xe_lrc.c

1561

lrc->desc |= FIELD_PREP(LRC_ADDRESSING_MODE, LRC_LEGACY_64B_CONTEXT);

drivers/gpu/drm/xe/xe_lrc.c

1571

lrc->desc |= FIELD_PREP(LRC_ENGINE_INSTANCE, hwe->instance);

drivers/gpu/drm/xe/xe_lrc.c

1572

lrc->desc |= FIELD_PREP(LRC_ENGINE_CLASS, hwe->class);

drivers/gpu/drm/xe/xe_migrate.c

1403

*cs++ = FIELD_PREP(XE2_MEM_SET_MOCS_INDEX_MASK, gt->mocs.uc_index);

drivers/gpu/drm/xe/xe_migrate.c

1405

*cs++ = FIELD_PREP(PVC_MEM_SET_MOCS_INDEX_MASK, gt->mocs.uc_index);

drivers/gpu/drm/xe/xe_migrate.c

1425

*cs++ = FIELD_PREP(XE2_XY_FAST_COLOR_BLT_MOCS_INDEX_MASK, gt->mocs.uc_index) |

drivers/gpu/drm/xe/xe_migrate.c

1428

*cs++ = FIELD_PREP(XY_FAST_COLOR_BLT_MOCS_MASK, gt->mocs.uc_index) |

drivers/gpu/drm/xe/xe_migrate.c

682

mocs = FIELD_PREP(XE2_XY_CTRL_SURF_MOCS_INDEX_MASK, gt->mocs.uc_index);

drivers/gpu/drm/xe/xe_migrate.c

690

mocs = FIELD_PREP(XY_CTRL_SURF_MOCS_MASK, gt->mocs.uc_index);

drivers/gpu/drm/xe/xe_migrate.c

720

mocs = FIELD_PREP(XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK, gt->mocs.uc_index);

drivers/gpu/drm/xe/xe_migrate.c

776

bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |

drivers/gpu/drm/xe/xe_migrate.c

777

FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);

drivers/gpu/drm/xe/xe_pcode.h

33

(FIELD_PREP(PCODE_MB_COMMAND, mbcmd)\

drivers/gpu/drm/xe/xe_pcode.h

34

| FIELD_PREP(PCODE_MB_PARAM1, param1)\

drivers/gpu/drm/xe/xe_pcode.h

35

| FIELD_PREP(PCODE_MB_PARAM2, param2))

drivers/gpu/drm/xe/xe_pt.c

1629

FIELD_PREP(XE_PAGE_RECLAIM_VALID, 1) |

drivers/gpu/drm/xe/xe_pt.c

1630

FIELD_PREP(XE_PAGE_RECLAIM_SIZE, reclamation_size) |

drivers/gpu/drm/xe/xe_pt.c

1631

FIELD_PREP(XE_PAGE_RECLAIM_ADDR_LO, phys_page) |

drivers/gpu/drm/xe/xe_pt.c

1632

FIELD_PREP(XE_PAGE_RECLAIM_ADDR_HI, phys_page >> 20);

drivers/gpu/drm/xe/xe_pxp_submit.c

526

msg_in.header.stream_id = (FIELD_PREP(PXP43_INIT_SESSION_APPID, id) |

drivers/gpu/drm/xe/xe_pxp_submit.c

527

FIELD_PREP(PXP43_INIT_SESSION_VALID, 1) |

drivers/gpu/drm/xe/xe_pxp_submit.c

528

FIELD_PREP(PXP43_INIT_SESSION_APPTYPE, 0));

drivers/gpu/drm/xe/xe_pxp_submit.c

579

msg_in.header.stream_id = FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_VALID, 1);

drivers/gpu/drm/xe/xe_pxp_submit.c

580

msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_APP_TYPE, 0);

drivers/gpu/drm/xe/xe_pxp_submit.c

581

msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_ID, id);

drivers/gpu/drm/xe/xe_vm_types.h

233

#define XE_VM_FLAG_SET_TILE_ID(tile) FIELD_PREP(GENMASK(7, 6), (tile)->id)

drivers/gpu/drm/xlnx/zynqmp_dp.c

1848

dpcd_train |= FIELD_PREP(DP_LINK_QUAL_PATTERN_11_MASK,

drivers/hid/hid-playstation.c

1258

bt->seq_tag = FIELD_PREP(DS_OUTPUT_SEQ_NO, ds->output_seq) |

drivers/hid/hid-playstation.c

1259

FIELD_PREP(DS_OUTPUT_SEQ_TAG, 0x0);

drivers/hid/hid-playstation.c

126

#define DS_FEATURE_VERSION(major, minor) (FIELD_PREP(DS_FEATURE_VERSION_MAJOR, major) | \

drivers/hid/hid-playstation.c

127

FIELD_PREP(DS_FEATURE_VERSION_MINOR, minor))

drivers/hid/hid-playstation.c

136

#define DS_TOUCH_POINT_X(hi, lo) (FIELD_PREP(DS_TOUCH_POINT_X_HI, hi) | \

drivers/hid/hid-playstation.c

137

FIELD_PREP(DS_TOUCH_POINT_X_LO, lo))

drivers/hid/hid-playstation.c

1375

FIELD_PREP(DS_OUTPUT_AUDIO_FLAGS_OUTPUT_PATH_SEL,

drivers/hid/hid-playstation.c

1388

FIELD_PREP(DS_OUTPUT_AUDIO_FLAGS2_SP_PREAMP_GAIN,

drivers/hid/hid-playstation.c

140

#define DS_TOUCH_POINT_Y(hi, lo) (FIELD_PREP(DS_TOUCH_POINT_Y_HI, hi) | \

drivers/hid/hid-playstation.c

141

FIELD_PREP(DS_TOUCH_POINT_Y_LO, lo))

drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-protocol.c

62

*cmd_buf = FIELD_PREP(HIDI2C_CMD_OPCODE, opcode) |

drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-protocol.c

63

FIELD_PREP(HIDI2C_CMD_REPORT_TYPE, report_type);

drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-protocol.c

66

*cmd_buf |= FIELD_PREP(HIDI2C_CMD_REPORT_ID, report_id);

drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-protocol.c

69

*cmd_buf |= FIELD_PREP(HIDI2C_CMD_REPORT_ID, HIDI2C_CMD_MAX_RI) |

drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-protocol.c

70

FIELD_PREP(HIDI2C_CMD_3RD_BYTE, report_id);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1084

FIELD_PREP(THC_M_PRT_SPI_DUTYC_CFG_SPI_CSA_CK_DELAY_VAL,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1095

ctrl = FIELD_PREP(THC_M_PRT_CONTROL_THC_ARB_POLICY,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1105

ctrl = FIELD_PREP(THC_M_PRT_CONTROL_PORT_TYPE, port_type);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1193

cfg = FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_TCRF, freq_div) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1194

FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_TRMODE, io_mode) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1196

FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_RD_MPS, spi_rd_mps);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1206

opcode = FIELD_PREP(THC_M_PRT_SPI_ICRRD_OPCODE_SPI_QIO, opcode);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1208

opcode = FIELD_PREP(THC_M_PRT_SPI_ICRRD_OPCODE_SPI_DIO, opcode);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1210

opcode = FIELD_PREP(THC_M_PRT_SPI_ICRRD_OPCODE_SPI_SIO, opcode);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1246

cfg = FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_TCWF, freq_div) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1247

FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_TWMODE, io_mode) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1249

FIELD_PREP(THC_M_PRT_SPI_CFG_SPI_WR_MPS, spi_wr_mps);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1259

opcode = FIELD_PREP(THC_M_PRT_SPI_ICRRD_OPCODE_SPI_QIO, opcode);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1261

opcode = FIELD_PREP(THC_M_PRT_SPI_ICRRD_OPCODE_SPI_DIO, opcode);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1263

opcode = FIELD_PREP(THC_M_PRT_SPI_ICRRD_OPCODE_SPI_SIO, opcode);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1416

val |= FIELD_PREP(THC_I2C_IC_CON_SPEED, speed);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1474

val |= FIELD_PREP(THC_I2C_IC_TAR_IC_TAR, target_address);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1601

val |= FIELD_PREP(THC_M_PRT_SPI_ICRRD_OPCODE_I2C_MAX_SIZE, max_rx_size);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

1672

val |= FIELD_PREP(THC_M_PRT_SPI_ICRRD_OPCODE_I2C_INTERVAL, DIV_ROUND_UP(delay_us, 10));

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

248

ctrl = FIELD_PREP(THC_M_PRT_SW_SEQ_CNTRL_THC_SS_BC, size) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

249

FIELD_PREP(THC_M_PRT_SW_SEQ_CNTRL_THC_SS_CMD, pio_op);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

260

addr = FIELD_PREP(THC_M_PRT_SW_SEQ_DATA0_ADDR_THC_SW_SEQ_DATA0_ADDR, address);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

442

i2c_ctrl = FIELD_PREP(THC_M_PRT_SW_SEQ_I2C_WR_CNTRL_THC_PIO_I2C_WBC, write_size);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

570

mbits = FIELD_PREP(THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_INTTYP_OFFSET,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

572

FIELD_PREP(THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_INTTYP_LEN,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

574

FIELD_PREP(THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_EOF_OFFSET,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

576

FIELD_PREP(THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_INTTYP_DATA_VAL,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

585

mbits = FIELD_PREP(THC_M_PRT_DEVINT_CFG_2_THC_M_PRT_UFSIZE_OFFSET,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

587

FIELD_PREP(THC_M_PRT_DEVINT_CFG_2_THC_M_PRT_UFSIZE_LEN,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

589

FIELD_PREP(THC_M_PRT_DEVINT_CFG_2_THC_M_PRT_UFSIZE_UNIT,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

737

ltr_ctrl = FIELD_PREP(THC_M_CMN_LTR_CTRL_ACT_LTR_VAL, active_ltr_us) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

738

FIELD_PREP(THC_M_CMN_LTR_CTRL_ACT_LTR_SCALE, active_ltr_scale) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

741

FIELD_PREP(THC_M_CMN_LTR_CTRL_LP_LTR_VAL, lp_ltr_us) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

742

FIELD_PREP(THC_M_CMN_LTR_CTRL_LP_LTR_SCALE, lp_ltr_scale) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

107

ctrl = FIELD_PREP(THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_PTEC, entry_count);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

110

ctrl = FIELD_PREP(THC_M_PRT_RPRD_CNTRL_PTEC, entry_count) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

111

FIELD_PREP(THC_M_PRT_RPRD_CNTRL_PCD, cb_depth);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

167

ctrl = FIELD_PREP(THC_M_PRT_READ_DMA_CNTRL_TPCWP, value);

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

41

mbits = FIELD_PREP(THC_M_PRT_DEVINT_CFG_1_THC_M_PRT_INTTYP_DATA_VAL,

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

56

ctrl = FIELD_PREP(THC_M_PRT_READ_DMA_CNTRL_TPCWP, THC_POINTER_WRAPAROUND) | mbits;

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

69

ctrl = FIELD_PREP(THC_M_PRT_READ_DMA_CNTRL_TPCWP, THC_POINTER_WRAPAROUND) | mbits;

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

746

val = FIELD_PREP(THC_M_PRT_RPRD_CNTRL_SW_THC_SWDMA_I2C_WBC, write_len) |

drivers/hid/intel-thc-hid/intel-thc/intel-thc-dma.c

753

val = FIELD_PREP(THC_M_PRT_SW_DMA_PRD_TABLE_LEN_THC_M_PRT_SW_DMA_PRD_TABLE_LEN,

drivers/hwmon/amc6821.c

555

u8 regval = FIELD_PREP(AMC6821_TEMP_LIMIT_MASK, temps[1] / 4);

drivers/hwmon/amc6821.c

571

regval |= FIELD_PREP(AMC6821_TEMP_SLOPE_MASK, tmp);

drivers/hwmon/aspeed-g6-pwm-tach.c

235

val |= FIELD_PREP(PWM_ASPEED_DUTY_CYCLE_PERIOD,

drivers/hwmon/aspeed-g6-pwm-tach.c

249

val |= FIELD_PREP(PWM_ASPEED_DUTY_CYCLE_FALLING_POINT, duty_pt);

drivers/hwmon/aspeed-g6-pwm-tach.c

257

val |= FIELD_PREP(PWM_ASPEED_CTRL_CLK_DIV_H, div_h) |

drivers/hwmon/aspeed-g6-pwm-tach.c

258

FIELD_PREP(PWM_ASPEED_CTRL_CLK_DIV_L, div_l) |

drivers/hwmon/aspeed-g6-pwm-tach.c

259

FIELD_PREP(PWM_ASPEED_CTRL_PIN_ENABLE, state->enabled) |

drivers/hwmon/aspeed-g6-pwm-tach.c

260

FIELD_PREP(PWM_ASPEED_CTRL_CLK_ENABLE, clk_en) |

drivers/hwmon/aspeed-g6-pwm-tach.c

261

FIELD_PREP(PWM_ASPEED_CTRL_INVERSE, state->polarity);

drivers/hwmon/aspeed-g6-pwm-tach.c

351

reg_val |= FIELD_PREP(TACH_ASPEED_CLK_DIV_T_MASK,

drivers/hwmon/aspeed-g6-pwm-tach.c

418

FIELD_PREP(TACH_ASPEED_CLK_DIV_T_MASK,

drivers/hwmon/bt1-pvt.c

138

mode = FIELD_PREP(PVT_CTRL_MODE_MASK, mode);

drivers/hwmon/bt1-pvt.c

156

trim = FIELD_PREP(PVT_CTRL_TRIM_MASK, trim);

drivers/hwmon/bt1-pvt.c

355

data = FIELD_PREP(PVT_THRES_LO_MASK, data);

drivers/hwmon/bt1-pvt.c

360

data = FIELD_PREP(PVT_THRES_HI_MASK, data);

drivers/hwmon/ina2xx.c

247

return FIELD_PREP(INA226_AVG_RD_MASK, avg_bits);

drivers/hwmon/ina2xx.c

900

FIELD_PREP(INA226_ALERT_POLARITY, active_high));

drivers/hwmon/jc42.c

342

FIELD_PREP(JC42_CFG_HYST_MASK, hyst);

drivers/hwmon/lan966x-hwmon.c

184

FIELD_PREP(FAN_CFG_DUTY_CYCLE, val));

drivers/hwmon/lan966x-hwmon.c

200

FIELD_PREP(FAN_PWM_FREQ_FREQ, val));

drivers/hwmon/lan966x-hwmon.c

308

val |= FIELD_PREP(SENSOR_CFG_CLK_CFG, div);

drivers/hwmon/ltc2947-core.c

25

#define LTC2947_CONT_MODE(x) FIELD_PREP(LTC2947_CONT_MODE_MASK, x)

drivers/hwmon/ltc2947-core.c

27

#define LTC2947_PRE(x) FIELD_PREP(LTC2947_PRE_MASK, x)

drivers/hwmon/ltc2947-core.c

29

#define LTC2947_DIV(x) FIELD_PREP(LTC2947_DIV_MASK, x)

drivers/hwmon/ltc2947-core.c

33

#define LTC2947_ACCUM_POL_1(x) FIELD_PREP(LTC2947_ACCUM_POL_1_MASK, x)

drivers/hwmon/ltc2947-core.c

35

#define LTC2947_ACCUM_POL_2(x) FIELD_PREP(LTC2947_ACCUM_POL_2_MASK, x)

drivers/hwmon/ltc2947-core.c

39

#define LTC2947_GPIO_EN(x) FIELD_PREP(LTC2947_GPIO_EN_MASK, x)

drivers/hwmon/ltc2947-core.c

41

#define LTC2947_GPIO_FAN_EN(x) FIELD_PREP(LTC2947_GPIO_FAN_EN_MASK, x)

drivers/hwmon/ltc2947-core.c

43

#define LTC2947_GPIO_FAN_POL(x) FIELD_PREP(LTC2947_GPIO_FAN_POL_MASK, x)

drivers/hwmon/ltc4282.c

1163

FIELD_PREP(LTC4282_CLK_DIV_MASK, val));

drivers/hwmon/ltc4282.c

1266

FIELD_PREP(LTC4282_GPIO_1_CONFIG_MASK, ret));

drivers/hwmon/ltc4282.c

1286

FIELD_PREP(LTC4282_GPIO_2_FET_STRESS_MASK, 1));

drivers/hwmon/ltc4282.c

1373

FIELD_PREP(LTC4282_CTRL_VIN_MODE_MASK, val));

drivers/hwmon/ltc4282.c

1380

FIELD_PREP(LTC4282_FOLDBACK_MODE_MASK, val));

drivers/hwmon/ltc4282.c

1426

FIELD_PREP(LTC4282_ILIM_ADJUST_MASK, reg_val));

drivers/hwmon/ltc4282.c

1447

FIELD_PREP(LTC4282_CTRL_OV_MODE_MASK, div));

drivers/hwmon/ltc4282.c

1462

FIELD_PREP(LTC4282_CTRL_UV_MODE_MASK, div));

drivers/hwmon/ltc4282.c

165

FIELD_PREP(LTC4282_CLKOUT_MASK, val));

drivers/hwmon/ltc4282.c

854

FIELD_PREP(LTC4282_VDD_MONITOR_MASK, !!__val));

drivers/hwmon/ltc4282.c

958

FIELD_PREP(LTC4282_METER_HALT_MASK, !val));

drivers/hwmon/macsmc-hwmon.c

248

fval = FIELD_PREP(FLT_SIGN_MASK, neg) |

drivers/hwmon/macsmc-hwmon.c

249

FIELD_PREP(FLT_EXP_MASK, exp + FLT_EXP_BIAS) |

drivers/hwmon/macsmc-hwmon.c

250

FIELD_PREP(FLT_MANT_MASK, val & FLT_MANT_MASK);

drivers/hwmon/max31760.c

297

FIELD_PREP(CR1_DRV, pwm_index));

drivers/hwmon/max31827.c

379

res = FIELD_PREP(MAX31827_CONFIGURATION_CNV_RATE_MASK,

drivers/hwmon/max31827.c

451

FIELD_PREP(MAX31827_CONFIGURATION_RESOLUTION_MASK,

drivers/hwmon/max31827.c

491

res |= FIELD_PREP(MAX31827_CONFIGURATION_COMP_INT_MASK, prop);

drivers/hwmon/max31827.c

494

res |= FIELD_PREP(MAX31827_CONFIGURATION_TIMEOUT_MASK, !prop);

drivers/hwmon/max31827.c

503

res |= FIELD_PREP(MAX31827_CONFIGURATION_ALRM_POL_MASK, !!data);

drivers/hwmon/max31827.c

511

res |= FIELD_PREP(MAX31827_CONFIGURATION_ALRM_POL_MASK,

drivers/hwmon/max31827.c

515

res |= FIELD_PREP(MAX31827_CONFIGURATION_ALRM_POL_MASK,

drivers/hwmon/max31827.c

539

res |= FIELD_PREP(MAX31827_CONFIGURATION_FLT_Q_MASK, lsb_idx);

drivers/hwmon/max31827.c

546

res |= FIELD_PREP(MAX31827_CONFIGURATION_FLT_Q_MASK,

drivers/hwmon/max31827.c

551

res |= FIELD_PREP(MAX31827_CONFIGURATION_FLT_Q_MASK,

drivers/hwmon/max6697.c

51

(FIELD_PREP(MAX6697_EXTERNAL_MASK_CHIP, FIELD_GET(MAX6697_EXTERNAL_MASK_DT, reg)) | \

drivers/hwmon/max6697.c

52

FIELD_PREP(MAX6697_LOCAL_MASK_CHIP, FIELD_GET(MAX6697_LOCAL_MASK_DT, reg)))

drivers/hwmon/nct6694-hwmon.c

636

FIELD_PREP(NCT6694_TIN_HYST_MASK, temp_hyst);

drivers/hwmon/pmbus/mp2869.c

197

FIELD_PREP(GENMASK(2, 2),

drivers/hwmon/pmbus/mp2869.c

219

FIELD_PREP(GENMASK(6, 6),

drivers/hwmon/pmbus/mp2869.c

221

FIELD_PREP(GENMASK(7, 7),

drivers/hwmon/pmbus/mp2869.c

259

FIELD_PREP(GENMASK(2, 2),

drivers/hwmon/pmbus/mp2869.c

428

FIELD_PREP(GENMASK(8, 0),

drivers/hwmon/pmbus/mp2869.c

437

FIELD_PREP(GENMASK(8, 0),

drivers/hwmon/pmbus/mp2869.c

453

FIELD_PREP(GENMASK(8, 0),

drivers/hwmon/pmbus/mp2869.c

462

FIELD_PREP(GENMASK(8, 0),

drivers/hwmon/pmbus/mp2869.c

486

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp2869.c

502

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp2869.c

520

FIELD_PREP(GENMASK(9, 0),

drivers/hwmon/pmbus/mp2869.c

541

FIELD_PREP(GENMASK(11, 0),

drivers/hwmon/pmbus/mp2891.c

415

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp2891.c

423

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp2891.c

439

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp2891.c

447

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp2891.c

464

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp2891.c

480

FIELD_PREP(GENMASK(7, 0), word + MP2891_TEMP_LIMIT_OFFSET));

drivers/hwmon/pmbus/mp2925.c

174

FIELD_PREP(GENMASK(11, 0),

drivers/hwmon/pmbus/mp29502.c

261

FIELD_PREP(GENMASK(12, 7),

drivers/hwmon/pmbus/mp29502.c

492

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp29502.c

508

FIELD_PREP(GENMASK(9, 0),

drivers/hwmon/pmbus/mp29502.c

524

FIELD_PREP(GENMASK(8, 0),

drivers/hwmon/pmbus/mp29502.c

554

FIELD_PREP(GENMASK(7, 0),

drivers/hwmon/pmbus/mp9941.c

106

ret = (ret & ~GENMASK(3, 2)) | FIELD_PREP(GENMASK(3, 2), 0);

drivers/hwmon/pmbus/mp9941.c

124

ret = (ret & ~GENMASK(15, 13)) | FIELD_PREP(GENMASK(15, 13), 0);

drivers/hwmon/pmbus/mp9941.c

62

ret = (ret & ~GENMASK(7, 6)) | FIELD_PREP(GENMASK(7, 6), 3);

drivers/hwmon/pmbus/tps25990.c

269

FIELD_PREP(PK_MIN_AVG_AVG_CNT, value));

drivers/hwmon/scmi-hwmon.c

243

u32 sensor_config = FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,

drivers/hwmon/sparx5-temp.c

35

val |= FIELD_PREP(TEMP_CFG_CYCLES, clk);

drivers/hwmon/tmp108.c

221

FIELD_PREP(TMP108_CONF_CONVRATE_FLD, index));

drivers/hwmon/tsc1641.c

186

return FIELD_PREP(TSC1641_CONV_TIME_MASK, conv_bits);

drivers/hwmon/tsc1641.c

689

FIELD_PREP(TSC1641_ALERT_POL_MASK, active_high));

drivers/hwtracing/coresight/coresight-etm-perf.c

546

hw_id = FIELD_PREP(CS_AUX_HW_ID_MAJOR_VERSION_MASK,

drivers/hwtracing/coresight/coresight-etm-perf.c

548

hw_id |= FIELD_PREP(CS_AUX_HW_ID_MINOR_VERSION_MASK,

drivers/hwtracing/coresight/coresight-etm-perf.c

550

hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, path->trace_id);

drivers/hwtracing/coresight/coresight-etm-perf.c

551

hw_id |= FIELD_PREP(CS_AUX_HW_ID_SINK_ID_MASK, coresight_get_sink_id(sink));

drivers/hwtracing/coresight/coresight-etm4x-core.c

1322

trfcr = (FIELD_PREP(TRFCR_EL1_TS_MASK, TRFCR_EL1_TS_VIRTUAL) |

drivers/hwtracing/coresight/coresight-etm4x-core.c

1553

config->vinst_ctrl = FIELD_PREP(TRCVICTLR_EVENT_MASK, 0x01);

drivers/hwtracing/coresight/coresight-etm4x-core.c

719

FIELD_PREP(TRCCNTCTLRn_RLDEVENT_MASK,

drivers/hwtracing/coresight/coresight-etm4x-core.c

721

FIELD_PREP(TRCCNTCTLRn_CNTEVENT_MASK,

drivers/hwtracing/coresight/coresight-etm4x-core.c

733

config->res_ctrl[rselector] = FIELD_PREP(TRCRSCTLRn_GROUP_MASK, 2) |

drivers/hwtracing/coresight/coresight-etm4x-core.c

734

FIELD_PREP(TRCRSCTLRn_SELECT_MASK, 1 << ctridx);

drivers/hwtracing/coresight/coresight-etm4x-core.c

741

config->ts_ctrl = FIELD_PREP(TRCTSCTLR_EVENT_MASK,

drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

1801

config->ss_ctrl[idx] = FIELD_PREP(TRCSSCCRn_SAC_ARC_RST_MASK, val);

drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

1851

config->ss_pe_cmp[idx] = FIELD_PREP(TRCSSPCICRn_PC_MASK, val);

drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

211

config->vinst_ctrl = FIELD_PREP(TRCVICTLR_EVENT_MASK, 0x01);

drivers/hwtracing/coresight/coresight-etm4x-sysfs.c

747

config->vinst_ctrl |= FIELD_PREP(TRCVICTLR_EVENT_MASK, val);

drivers/hwtracing/coresight/coresight-etm4x.h

259

return FIELD_PREP(ETM4_RES_SEL_SINGLE_MASK, res_sel_idx);

drivers/hwtracing/coresight/coresight-etm4x.h

268

return FIELD_PREP(ETM4_RES_SEL_PAIR_MASK, res_sel_idx) |

drivers/hwtracing/coresight/coresight-tpda.c

142

val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid);

drivers/hwtracing/coresight/coresight-tpda.c

44

*val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x2);

drivers/hwtracing/coresight/coresight-tpda.c

46

*val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x1);

drivers/hwtracing/coresight/coresight-tpdm.c

287

*val |= FIELD_PREP(TPDM_DSB_CR_TEST_MODE, mode);

drivers/hwtracing/coresight/coresight-tpdm.c

292

*val |= FIELD_PREP(TPDM_DSB_CR_HPSEL, mode);

drivers/hwtracing/coresight/coresight-tpdm.c

449

val |= FIELD_PREP(TPDM_CMB_CR_XTRIG_LNSEL,

drivers/hwtracing/coresight/coresight-tpdm.c

454

val |= FIELD_PREP(TPDM_CMB_CR_E_LN,

drivers/hwtracing/coresight/ultrasoc-smb.h

33

#define SMB_GLB_CFG_DEFAULT (FIELD_PREP(SMB_GLB_CFG_BURST_LEN_MSK, 0xf) | \

drivers/hwtracing/coresight/ultrasoc-smb.h

34

FIELD_PREP(SMB_GLB_CFG_IDLE_PRD_MSK, 0xf) | \

drivers/hwtracing/coresight/ultrasoc-smb.h

35

FIELD_PREP(SMB_GLB_CFG_MEM_WR_MSK, 0x3) | \

drivers/hwtracing/coresight/ultrasoc-smb.h

36

FIELD_PREP(SMB_GLB_CFG_MEM_RD_MSK, 0x1b))

drivers/hwtracing/coresight/ultrasoc-smb.h

55

FIELD_PREP(SMB_LB_CFG_LO_FLOW_MSK, 0xf))

drivers/hwtracing/coresight/ultrasoc-smb.h

59

#define SMB_LB_CFG_HI_DEFAULT FIELD_PREP(SMB_LB_CFG_HI_RANGE_UP_MSK, 0xff)

drivers/hwtracing/coresight/ultrasoc-smb.h

74

FIELD_PREP(SMB_LB_INT_CTRL_BUF_NOTE_MSK, 0xf))

drivers/hwtracing/coresight/ultrasoc-smb.h

79

#define SMB_LB_INT_STS_RESET FIELD_PREP(SMB_LB_INT_STS_BUF_RESET_MSK, 0xf)

drivers/hwtracing/ptt/hisi_ptt.c

230

val = FIELD_PREP(HISI_PTT_TRACE_CTRL_TYPE_SEL, ctrl->type);

drivers/hwtracing/ptt/hisi_ptt.c

231

val |= FIELD_PREP(HISI_PTT_TRACE_CTRL_RXTX_SEL, ctrl->direction);

drivers/hwtracing/ptt/hisi_ptt.c

232

val |= FIELD_PREP(HISI_PTT_TRACE_CTRL_DATA_FORMAT, ctrl->format);

drivers/hwtracing/ptt/hisi_ptt.c

233

val |= FIELD_PREP(HISI_PTT_TRACE_CTRL_TARGET_SEL, hisi_ptt->trace_ctrl.filter);

drivers/hwtracing/ptt/hisi_ptt.c

54

reg |= FIELD_PREP(HISI_PTT_TUNING_CTRL_CODE | HISI_PTT_TUNING_CTRL_SUB,

drivers/hwtracing/ptt/hisi_ptt.c

94

reg |= FIELD_PREP(HISI_PTT_TUNING_CTRL_CODE | HISI_PTT_TUNING_CTRL_SUB,

drivers/hwtracing/ptt/hisi_ptt.c

97

writel(FIELD_PREP(HISI_PTT_TUNING_DATA_VAL_MASK, val),

drivers/i2c/busses/i2c-fsi.c

197

mode |= FIELD_PREP(I2C_MODE_CLKDIV, I2C_DEFAULT_CLK_DIV);

drivers/i2c/busses/i2c-fsi.c

207

watermark = FIELD_PREP(I2C_WATERMARK_HI,

drivers/i2c/busses/i2c-fsi.c

209

watermark |= FIELD_PREP(I2C_WATERMARK_LO, I2C_FIFO_LO_LVL);

drivers/i2c/busses/i2c-fsi.c

227

mode = (mode & ~I2C_MODE_PORT) | FIELD_PREP(I2C_MODE_PORT, port->port);

drivers/i2c/busses/i2c-fsi.c

250

cmd |= FIELD_PREP(I2C_CMD_ADDR, msg->addr);

drivers/i2c/busses/i2c-fsi.c

251

cmd |= FIELD_PREP(I2C_CMD_LEN, msg->len);

drivers/i2c/busses/i2c-fsi.c

460

mode |= FIELD_PREP(I2C_MODE_PORT, port);

drivers/i2c/busses/i2c-hisi.c

168

reg |= FIELD_PREP(HISI_I2C_SLV_ADDR_VAL, msg->addr);

drivers/i2c/busses/i2c-hisi.c

307

cmd |= FIELD_PREP(HISI_I2C_CMD_TXDATA_DATA,

drivers/i2c/busses/i2c-hisi.c

443

reg |= FIELD_PREP(HISI_I2C_FRAME_CTRL_SPEED_MODE, speed_mode);

drivers/i2c/busses/i2c-hisi.c

448

reg = FIELD_PREP(HISI_I2C_SDA_HOLD_TX, sda_hold_cnt);

drivers/i2c/busses/i2c-hisi.c

453

reg = FIELD_PREP(HISI_I2C_FIFO_RX_AF_THRESH, HISI_I2C_RX_F_AF_THRESH);

drivers/i2c/busses/i2c-hisi.c

454

reg |= FIELD_PREP(HISI_I2C_FIFO_TX_AE_THRESH, HISI_I2C_TX_F_AE_THRESH);

drivers/i2c/busses/i2c-k1.c

194

writel(FIELD_PREP(SPACEMIT_RCR_FIELD_RST_CYC, 1),

drivers/i2c/busses/i2c-ljca.c

19

#define LJCA_I2C_INIT_FLAG_MODE_POLLING FIELD_PREP(LJCA_I2C_INIT_FLAG_MODE, 0)

drivers/i2c/busses/i2c-ljca.c

20

#define LJCA_I2C_INIT_FLAG_MODE_INTERRUPT FIELD_PREP(LJCA_I2C_INIT_FLAG_MODE, 1)

drivers/i2c/busses/i2c-ljca.c

25

#define LJCA_I2C_INIT_FLAG_FREQ_100K FIELD_PREP(LJCA_I2C_INIT_FLAG_FREQ, 0)

drivers/i2c/busses/i2c-ljca.c

26

#define LJCA_I2C_INIT_FLAG_FREQ_400K FIELD_PREP(LJCA_I2C_INIT_FLAG_FREQ, 1)

drivers/i2c/busses/i2c-ljca.c

27

#define LJCA_I2C_INIT_FLAG_FREQ_1M FIELD_PREP(LJCA_I2C_INIT_FLAG_FREQ, 2)

drivers/i2c/busses/i2c-meson.c

171

FIELD_PREP(REG_CTRL_CLKDIV_MASK, div_h & GENMASK(9, 0)));

drivers/i2c/busses/i2c-meson.c

174

FIELD_PREP(REG_CTRL_CLKDIVEXT_MASK, div_h >> 10));

drivers/i2c/busses/i2c-meson.c

178

FIELD_PREP(REG_SLV_SCL_LOW_MASK, div_l));

drivers/i2c/busses/i2c-meson.c

203

FIELD_PREP(REG_CTRL_CLKDIV_MASK, div & GENMASK(9, 0)));

drivers/i2c/busses/i2c-meson.c

206

FIELD_PREP(REG_CTRL_CLKDIVEXT_MASK, div >> 10));

drivers/i2c/busses/i2c-meson.c

346

FIELD_PREP(REG_SLV_ADDR_MASK, msg->addr << 1));

drivers/i2c/busses/i2c-nomadik.c

340

#define DEFAULT_I2C_REG_CR (FIELD_PREP(I2C_CR_OM, I2C_OM_MASTER) | I2C_CR_PE)

drivers/i2c/busses/i2c-nomadik.c

355

mcr |= FIELD_PREP(I2C_MCR_A7, priv->cli.slave_adr);

drivers/i2c/busses/i2c-nomadik.c

359

mcr |= FIELD_PREP(I2C_MCR_AM, 2);

drivers/i2c/busses/i2c-nomadik.c

369

mcr |= FIELD_PREP(I2C_MCR_EA10, slave_adr_3msb_bits);

drivers/i2c/busses/i2c-nomadik.c

372

mcr |= FIELD_PREP(I2C_MCR_AM, 1);

drivers/i2c/busses/i2c-nomadik.c

376

mcr |= FIELD_PREP(I2C_MCR_SB, 0);

drivers/i2c/busses/i2c-nomadik.c

380

mcr |= FIELD_PREP(I2C_MCR_OP, I2C_WRITE);

drivers/i2c/busses/i2c-nomadik.c

382

mcr |= FIELD_PREP(I2C_MCR_OP, I2C_READ);

drivers/i2c/busses/i2c-nomadik.c

386

mcr |= FIELD_PREP(I2C_MCR_STOP, 1);

drivers/i2c/busses/i2c-nomadik.c

388

mcr &= ~FIELD_PREP(I2C_MCR_STOP, 1);

drivers/i2c/busses/i2c-nomadik.c

390

mcr |= FIELD_PREP(I2C_MCR_LENGTH, priv->cli.count);

drivers/i2c/busses/i2c-nomadik.c

443

writel(FIELD_PREP(I2C_SCR_SLSU, slsu), priv->virtbase + I2C_SCR);

drivers/i2c/busses/i2c-nomadik.c

465

brcr = FIELD_PREP(I2C_BRCR_BRCNT1, brcr);

drivers/i2c/busses/i2c-nomadik.c

467

brcr = FIELD_PREP(I2C_BRCR_BRCNT2, brcr);

drivers/i2c/busses/i2c-nomadik.c

473

writel(FIELD_PREP(I2C_CR_SM, priv->sm), priv->virtbase + I2C_CR);

drivers/i2c/busses/i2c-npcm7xx.c

2102

iowrite8(FIELD_PREP(I2CCTL2_SCLFRQ6_0, smb_timing[scl_table_cnt].sclfrq & 0x7F),

drivers/i2c/busses/i2c-npcm7xx.c

2106

iowrite8(FIELD_PREP(I2CCTL3_SCLFRQ8_7, (smb_timing[scl_table_cnt].sclfrq >> 7) & 0x3) |

drivers/i2c/busses/i2c-npcm7xx.c

873

sa_reg = (addr & 0x7F) | FIELD_PREP(NPCM_I2CADDR_SAEN, enable);

drivers/i2c/busses/i2c-tegra.c

1263

val = FIELD_PREP(I2C_BC_SCLK_THRESHOLD, 9) | I2C_BC_STOP_COND |

drivers/i2c/busses/i2c-tegra.c

1299

packet_header = FIELD_PREP(PACKET_HEADER0_HEADER_SIZE, 0) |

drivers/i2c/busses/i2c-tegra.c

1300

FIELD_PREP(PACKET_HEADER0_PROTOCOL,

drivers/i2c/busses/i2c-tegra.c

1302

FIELD_PREP(PACKET_HEADER0_CONT_ID, i2c_dev->cont_id) |

drivers/i2c/busses/i2c-tegra.c

1303

FIELD_PREP(PACKET_HEADER0_PACKET_ID, 1);

drivers/i2c/busses/i2c-tegra.c

420

val = FIELD_PREP(I2C_SW_MUTEX_REQUEST, I2C_SW_MUTEX_ID_CCPLEX);

drivers/i2c/busses/i2c-tegra.c

624

value = FIELD_PREP(I2C_INTERFACE_TIMING_THIGH, 2) |

drivers/i2c/busses/i2c-tegra.c

625

FIELD_PREP(I2C_INTERFACE_TIMING_TLOW, 4);

drivers/i2c/busses/i2c-tegra.c

628

value = FIELD_PREP(I2C_INTERFACE_TIMING_TBUF, 4) |

drivers/i2c/busses/i2c-tegra.c

629

FIELD_PREP(I2C_INTERFACE_TIMING_TSU_STO, 7) |

drivers/i2c/busses/i2c-tegra.c

630

FIELD_PREP(I2C_INTERFACE_TIMING_THD_STA, 4) |

drivers/i2c/busses/i2c-tegra.c

631

FIELD_PREP(I2C_INTERFACE_TIMING_TSU_STA, 4);

drivers/i2c/busses/i2c-tegra.c

634

value = FIELD_PREP(I2C_HS_INTERFACE_TIMING_THIGH, 3) |

drivers/i2c/busses/i2c-tegra.c

635

FIELD_PREP(I2C_HS_INTERFACE_TIMING_TLOW, 8);

drivers/i2c/busses/i2c-tegra.c

638

value = FIELD_PREP(I2C_HS_INTERFACE_TIMING_TSU_STO, 11) |

drivers/i2c/busses/i2c-tegra.c

639

FIELD_PREP(I2C_HS_INTERFACE_TIMING_THD_STA, 11) |

drivers/i2c/busses/i2c-tegra.c

640

FIELD_PREP(I2C_HS_INTERFACE_TIMING_TSU_STA, 11);

drivers/i2c/busses/i2c-tegra.c

643

value = FIELD_PREP(I2C_BC_SCLK_THRESHOLD, 9) | I2C_BC_STOP_COND;

drivers/i2c/busses/i2c-tegra.c

762

FIELD_PREP(I2C_CNFG_DEBOUNCE_CNT, 2);

drivers/i2c/busses/i2c-tegra.c

810

clk_divisor = FIELD_PREP(I2C_CLK_DIVISOR_HSMODE,

drivers/i2c/busses/i2c-tegra.c

812

FIELD_PREP(I2C_CLK_DIVISOR_STD_FAST_MODE, non_hs_mode);

drivers/i2c/busses/i2c-tegra.c

816

val = FIELD_PREP(I2C_INTERFACE_TIMING_THIGH, thigh) |

drivers/i2c/busses/i2c-tegra.c

817

FIELD_PREP(I2C_INTERFACE_TIMING_TLOW, tlow);

drivers/i2c/busses/i2c-tegra.c

834

val = FIELD_PREP(I2C_HS_INTERFACE_TIMING_THIGH, thigh) |

drivers/i2c/busses/i2c-tegra.c

835

FIELD_PREP(I2C_HS_INTERFACE_TIMING_TLOW, tlow);

drivers/i3c/master/adi-i3c-master.c

45

#define REG_CMD_FIFO_0_LEN(l) FIELD_PREP(GENMASK(19, 8), (l))

drivers/i3c/master/adi-i3c-master.c

46

#define REG_CMD_FIFO_0_DEV_ADDR(a) FIELD_PREP(GENMASK(7, 1), (a))

drivers/i3c/master/adi-i3c-master.c

48

#define REG_CMD_FIFO_1_CCC(id) FIELD_PREP(GENMASK(7, 0), (id))

drivers/i3c/master/adi-i3c-master.c

70

#define REG_OPS_SET_SG(x) FIELD_PREP(REG_OPS_PP_SG_MASK, (x))

drivers/i3c/master/adi-i3c-master.c

79

#define REG_DEV_CHAR_BCR_IBI(x) FIELD_PREP(GENMASK(3, 2), (x))

drivers/i3c/master/adi-i3c-master.c

81

#define REG_DEV_CHAR_ADDR(x) FIELD_PREP(GENMASK(15, 9), (x))

drivers/i3c/master/dw-i3c-master.c

219

FIELD_PREP(DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK, (x))

drivers/i3c/master/dw-i3c-master.c

221

#define DEV_ADDR_TABLE_DYNAMIC_ADDR(x) FIELD_PREP(DEV_ADDR_TABLE_DYNAMIC_MASK, x)

drivers/i3c/master/dw-i3c-master.c

222

#define DEV_ADDR_TABLE_STATIC_ADDR(x) FIELD_PREP(DEV_ADDR_TABLE_STATIC_MASK, x)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

100

#define CMD_M0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

22

#define CMD_0_ATTR_A FIELD_PREP(CMD_0_ATTR, 0x2)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

26

#define CMD_A0_DEV_COUNT(v) FIELD_PREP(W0_MASK(29, 26), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

27

#define CMD_A0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

28

#define CMD_A0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

29

#define CMD_A0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

35

#define CMD_0_ATTR_I FIELD_PREP(CMD_0_ATTR, 0x1)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

37

#define CMD_I1_DATA_BYTE_4(v) FIELD_PREP(W1_MASK(63, 56), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

38

#define CMD_I1_DATA_BYTE_3(v) FIELD_PREP(W1_MASK(55, 48), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

39

#define CMD_I1_DATA_BYTE_2(v) FIELD_PREP(W1_MASK(47, 40), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

40

#define CMD_I1_DATA_BYTE_1(v) FIELD_PREP(W1_MASK(39, 32), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

41

#define CMD_I1_DEF_BYTE(v) FIELD_PREP(W1_MASK(39, 32), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

45

#define CMD_I0_MODE(v) FIELD_PREP(W0_MASK(28, 26), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

46

#define CMD_I0_DTT(v) FIELD_PREP(W0_MASK(25, 23), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

47

#define CMD_I0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

49

#define CMD_I0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

50

#define CMD_I0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

56

#define CMD_0_ATTR_R FIELD_PREP(CMD_0_ATTR, 0x0)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

58

#define CMD_R1_DATA_LENGTH(v) FIELD_PREP(W1_MASK(63, 48), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

59

#define CMD_R1_DEF_BYTE(v) FIELD_PREP(W1_MASK(39, 32), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

63

#define CMD_R0_MODE(v) FIELD_PREP(W0_MASK(28, 26), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

65

#define CMD_R0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

67

#define CMD_R0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

68

#define CMD_R0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

74

#define CMD_0_ATTR_C FIELD_PREP(CMD_0_ATTR, 0x3)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

76

#define CMD_C1_DATA_LENGTH(v) FIELD_PREP(W1_MASK(63, 48), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

77

#define CMD_C1_OFFSET(v) FIELD_PREP(W1_MASK(47, 32), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

81

#define CMD_C0_MODE(v) FIELD_PREP(W0_MASK(28, 26), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

84

#define CMD_C0_DATA_LENGTH_POSITION(v) FIELD_PREP(W0_MASK(23, 22), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

85

#define CMD_C0_DEV_INDEX(v) FIELD_PREP(W0_MASK(20, 16), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

87

#define CMD_C0_CMD(v) FIELD_PREP(W0_MASK(14, 7), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

88

#define CMD_C0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c

94

#define CMD_0_ATTR_M FIELD_PREP(CMD_0_ATTR, 0x7)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

23

#define CMD_0_ATTR_U FIELD_PREP(CMD_0_ATTR, 0x4)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

25

#define CMD_U3_HDR_TSP_ML_CTRL(v) FIELD_PREP(W3_MASK(107, 104), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

26

#define CMD_U3_IDB4(v) FIELD_PREP(W3_MASK(103, 96), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

27

#define CMD_U3_HDR_CMD(v) FIELD_PREP(W3_MASK(103, 96), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

28

#define CMD_U2_IDB3(v) FIELD_PREP(W2_MASK( 95, 88), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

29

#define CMD_U2_HDR_BT(v) FIELD_PREP(W2_MASK( 95, 88), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

30

#define CMD_U2_IDB2(v) FIELD_PREP(W2_MASK( 87, 80), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

31

#define CMD_U2_BT_CMD2(v) FIELD_PREP(W2_MASK( 87, 80), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

32

#define CMD_U2_IDB1(v) FIELD_PREP(W2_MASK( 79, 72), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

33

#define CMD_U2_BT_CMD1(v) FIELD_PREP(W2_MASK( 79, 72), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

34

#define CMD_U2_IDB0(v) FIELD_PREP(W2_MASK( 71, 64), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

35

#define CMD_U2_BT_CMD0(v) FIELD_PREP(W2_MASK( 71, 64), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

36

#define CMD_U1_ERR_HANDLING(v) FIELD_PREP(W1_MASK( 63, 62), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

37

#define CMD_U1_ADD_FUNC(v) FIELD_PREP(W1_MASK( 61, 56), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

39

#define CMD_U1_DATA_LENGTH(v) FIELD_PREP(W1_MASK( 53, 32), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

43

#define CMD_U0_NACK_RCNT(v) FIELD_PREP(W0_MASK( 28, 27), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

44

#define CMD_U0_IDB_COUNT(v) FIELD_PREP(W0_MASK( 26, 24), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

45

#define CMD_U0_MODE_INDEX(v) FIELD_PREP(W0_MASK( 22, 18), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

46

#define CMD_U0_XFER_RATE(v) FIELD_PREP(W0_MASK( 17, 15), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

47

#define CMD_U0_DEV_ADDRESS(v) FIELD_PREP(W0_MASK( 14, 8), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

49

#define CMD_U0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

55

#define CMD_0_ATTR_A FIELD_PREP(CMD_0_ATTR, 0x2)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

57

#define CMD_A1_DATA_LENGTH(v) FIELD_PREP(W1_MASK( 53, 32), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

60

#define CMD_A0_XFER_RATE(v) FIELD_PREP(W0_MASK( 17, 15), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

61

#define CMD_A0_ASSIGN_ADDRESS(v) FIELD_PREP(W0_MASK( 14, 8), v)

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c

62

#define CMD_A0_TID(v) FIELD_PREP(W0_MASK( 6, 3), v)

drivers/i3c/master/mipi-i3c-hci/core.c

246

reg_write(DCT_SECTION, FIELD_PREP(DCT_TABLE_INDEX, 0));

drivers/i3c/master/mipi-i3c-hci/core.c

45

#define MASTER_DYNAMIC_ADDR(v) FIELD_PREP(GENMASK(22, 16), v)

drivers/i3c/master/mipi-i3c-hci/dat_v1.c

128

dat_w0 |= FIELD_PREP(DAT_0_DYNAMIC_ADDRESS, address) |

drivers/i3c/master/mipi-i3c-hci/dat_v1.c

140

dat_w0 |= FIELD_PREP(DAT_0_STATIC_ADDRESS, address);

drivers/i3c/master/mipi-i3c-hci/dma.c

221

regval = FIELD_PREP(CR_RING_SIZE, rh->xfer_entries);

drivers/i3c/master/mipi-i3c-hci/dma.c

240

regval = FIELD_PREP(IBI_STATUS_RING_SIZE, rh->ibi_status_entries) |

drivers/i3c/master/mipi-i3c-hci/dma.c

241

FIELD_PREP(IBI_DATA_CHUNK_SIZE, ilog2(rh->ibi_chunk_sz) - 2) |

drivers/i3c/master/mipi-i3c-hci/dma.c

242

FIELD_PREP(IBI_DATA_CHUNK_COUNT, rh->ibi_chunks_total);

drivers/i3c/master/mipi-i3c-hci/dma.c

271

regval = FIELD_PREP(MAX_HEADER_COUNT, rings->total);

drivers/i3c/master/mipi-i3c-hci/dma.c

511

FIELD_PREP(DATA_BUF_BLOCK_SIZE, xfer->data_len) |

drivers/i3c/master/mipi-i3c-hci/dma.c

535

op1_val |= FIELD_PREP(RING_OP1_CR_ENQ_PTR, enqueue_ptr);

drivers/i3c/master/mipi-i3c-hci/dma.c

585

*ring_data++ = FIELD_PREP(CMD_0_ATTR, 0x7) | FIELD_PREP(CMD_0_TID, xfer->cmd_tid);

drivers/i3c/master/mipi-i3c-hci/dma.c

660

op1_val |= FIELD_PREP(RING_OP1_CR_SW_DEQ_PTR, done_ptr);

drivers/i3c/master/mipi-i3c-hci/dma.c

843

op1_val |= FIELD_PREP(RING_OP1_IBI_DEQ_PTR, deq_ptr);

drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c

56

#define INTEL_LTR_SCALE_1US FIELD_PREP(INTEL_LTR_SCALE_MASK, 2)

drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c

57

#define INTEL_LTR_SCALE_32US FIELD_PREP(INTEL_LTR_SCALE_MASK, 3)

drivers/i3c/master/mipi-i3c-hci/pio.c

166

val = FIELD_PREP(DATA_RX_BUF_THLD, rx_thresh) |

drivers/i3c/master/mipi-i3c-hci/pio.c

167

FIELD_PREP(DATA_TX_BUF_THLD, tx_thresh);

drivers/i3c/master/mipi-i3c-hci/pio.c

177

val = FIELD_PREP(QUEUE_IBI_STATUS_THLD, 1) |

drivers/i3c/master/mipi-i3c-hci/pio.c

178

FIELD_PREP(QUEUE_IBI_DATA_THLD, pio->max_ibi_thresh) |

drivers/i3c/master/mipi-i3c-hci/pio.c

179

FIELD_PREP(QUEUE_RESP_BUF_THLD, 1) |

drivers/i3c/master/mipi-i3c-hci/pio.c

180

FIELD_PREP(QUEUE_CMD_EMPTY_BUF_THLD, 1);

drivers/i3c/master/mipi-i3c-hci/pio.c

698

p->response = FIELD_PREP(RESP_ERR_FIELD, RESP_ERR_HC_TERMINATED);

drivers/i3c/master/mipi-i3c-hci/pio.c

703

p->response = FIELD_PREP(RESP_ERR_FIELD, RESP_ERR_HC_TERMINATED);

drivers/i3c/master/mipi-i3c-hci/pio.c

776

regval |= FIELD_PREP(QUEUE_IBI_STATUS_THLD, thresh_val);

drivers/i3c/master/renesas-i3c.c

101

#define NCMDQP_DEV_INDEX(x) FIELD_PREP(GENMASK(20, 16), x)

drivers/i3c/master/renesas-i3c.c

102

#define NCMDQP_BYTE_CNT(x) FIELD_PREP(GENMASK(25, 23), x)

drivers/i3c/master/renesas-i3c.c

103

#define NCMDQP_DEV_COUNT(x) FIELD_PREP(GENMASK(29, 26), x)

drivers/i3c/master/renesas-i3c.c

104

#define NCMDQP_MODE(x) FIELD_PREP(GENMASK(28, 26), x)

drivers/i3c/master/renesas-i3c.c

105

#define NCMDQP_RNW(x) FIELD_PREP(GENMASK(29, 29), x)

drivers/i3c/master/renesas-i3c.c

108

#define NCMDQP_DATA_LENGTH(x) FIELD_PREP(GENMASK(31, 16), x)

drivers/i3c/master/renesas-i3c.c

128

#define NQTHCTL_CMDQTH(x) FIELD_PREP(GENMASK(1, 0), x)

drivers/i3c/master/renesas-i3c.c

129

#define NQTHCTL_IBIDSSZ(x) FIELD_PREP(GENMASK(23, 16), x)

drivers/i3c/master/renesas-i3c.c

192

#define DATBAS_DVSTAD(x) FIELD_PREP(GENMASK(6, 0), x)

drivers/i3c/master/renesas-i3c.c

193

#define DATBAS_DVDYAD(x) FIELD_PREP(GENMASK(23, 16), x)

drivers/i3c/master/renesas-i3c.c

38

#define MSDVAD_MDYAD(x) FIELD_PREP(GENMASK(21, 16), x)

drivers/i3c/master/renesas-i3c.c

55

#define REFCKCTL_IREFCKS(x) FIELD_PREP(GENMASK(2, 0), x)

drivers/i3c/master/renesas-i3c.c

58

#define STDBR_SBRLO(cond, x) FIELD_PREP(GENMASK(7, 0), (x) >> (cond))

drivers/i3c/master/renesas-i3c.c

59

#define STDBR_SBRHO(cond, x) FIELD_PREP(GENMASK(15, 8), (x) >> (cond))

drivers/i3c/master/renesas-i3c.c

60

#define STDBR_SBRLP(x) FIELD_PREP(GENMASK(21, 16), x)

drivers/i3c/master/renesas-i3c.c

61

#define STDBR_SBRHP(x) FIELD_PREP(GENMASK(29, 24), x)

drivers/i3c/master/renesas-i3c.c

65

#define EXTBR_EBRLO(x) FIELD_PREP(GENMASK(7, 0), x)

drivers/i3c/master/renesas-i3c.c

66

#define EXTBR_EBRHO(x) FIELD_PREP(GENMASK(15, 8), x)

drivers/i3c/master/renesas-i3c.c

67

#define EXTBR_EBRLP(x) FIELD_PREP(GENMASK(21, 16), x)

drivers/i3c/master/renesas-i3c.c

68

#define EXTBR_EBRHP(x) FIELD_PREP(GENMASK(29, 24), x)

drivers/i3c/master/renesas-i3c.c

71

#define BFRECDT_FRECYC(x) FIELD_PREP(GENMASK(8, 0), x)

drivers/i3c/master/renesas-i3c.c

74

#define BAVLCDT_AVLCYC(x) FIELD_PREP(GENMASK(8, 0), x)

drivers/i3c/master/renesas-i3c.c

77

#define BIDLCDT_IDLCYC(x) FIELD_PREP(GENMASK(17, 0), x)

drivers/i3c/master/renesas-i3c.c

95

#define NCMDQP_CMD_ATTR(x) FIELD_PREP(GENMASK(2, 0), x)

drivers/i3c/master/renesas-i3c.c

98

#define NCMDQP_TID(x) FIELD_PREP(GENMASK(6, 3), x)

drivers/i3c/master/renesas-i3c.c

99

#define NCMDQP_CMD(x) FIELD_PREP(GENMASK(14, 7), x)

drivers/i3c/master/svc-i3c-master.c

130

#define SVC_MDYNADDR_ADDR(x) FIELD_PREP(GENMASK(7, 1), (x))

drivers/i3c/master/svc-i3c-master.c

27

#define SVC_I3C_MCONFIG_DISTO(x) FIELD_PREP(BIT(3), (x))

drivers/i3c/master/svc-i3c-master.c

28

#define SVC_I3C_MCONFIG_HKEEP(x) FIELD_PREP(GENMASK(5, 4), (x))

drivers/i3c/master/svc-i3c-master.c

29

#define SVC_I3C_MCONFIG_ODSTOP(x) FIELD_PREP(BIT(6), (x))

drivers/i3c/master/svc-i3c-master.c

30

#define SVC_I3C_MCONFIG_PPBAUD(x) FIELD_PREP(GENMASK(11, 8), (x))

drivers/i3c/master/svc-i3c-master.c

31

#define SVC_I3C_MCONFIG_PPLOW(x) FIELD_PREP(GENMASK(15, 12), (x))

drivers/i3c/master/svc-i3c-master.c

32

#define SVC_I3C_MCONFIG_ODBAUD(x) FIELD_PREP(GENMASK(23, 16), (x))

drivers/i3c/master/svc-i3c-master.c

33

#define SVC_I3C_MCONFIG_ODHPP(x) FIELD_PREP(BIT(24), (x))

drivers/i3c/master/svc-i3c-master.c

34

#define SVC_I3C_MCONFIG_SKEW(x) FIELD_PREP(GENMASK(27, 25), (x))

drivers/i3c/master/svc-i3c-master.c

36

#define SVC_I3C_MCONFIG_I2CBAUD(x) FIELD_PREP(GENMASK(31, 28), (x))

drivers/i3c/master/svc-i3c-master.c

55

#define SVC_I3C_MCTRL_DIR(x) FIELD_PREP(BIT(8), (x))

drivers/i3c/master/svc-i3c-master.c

58

#define SVC_I3C_MCTRL_ADDR(x) FIELD_PREP(GENMASK(15, 9), (x))

drivers/i3c/master/svc-i3c-master.c

59

#define SVC_I3C_MCTRL_RDTERM(x) FIELD_PREP(GENMASK(23, 16), (x))

drivers/i3c/master/svc-i3c-master.c

89

#define SVC_I3C_IBIRULES_ADDR(slot, addr) FIELD_PREP(GENMASK(29, 0), \

drivers/iio/accel/adxl313_core.c

1000

FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK, ADXL313_FIFO_BYPASS));

drivers/iio/accel/adxl313_core.c

1189

FIELD_PREP(ADXL313_RANGE_MSK, ADXL313_RANGE_MAX));

drivers/iio/accel/adxl313_core.c

1277

FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK,

drivers/iio/accel/adxl313_core.c

351

FIELD_PREP(ADXL313_RATE_MSK, ADXL313_RATE_BASE + i));

drivers/iio/accel/adxl313_core.c

982

FIELD_PREP(ADXL313_REG_FIFO_CTL_SAMPLES_MSK, data->watermark) |

drivers/iio/accel/adxl313_core.c

983

FIELD_PREP(ADXL313_REG_FIFO_CTL_MODE_MSK, ADXL313_FIFO_STREAM));

drivers/iio/accel/adxl345_core.c

1012

FIELD_PREP(ADXL345_DATA_FORMAT_RANGE, range));

drivers/iio/accel/adxl345_core.c

1520

FIELD_PREP(ADXL345_FIFO_CTL_SAMPLES_MSK,

drivers/iio/accel/adxl345_core.c

1522

FIELD_PREP(ADXL345_FIFO_CTL_TRIGGER_MSK, intio) |

drivers/iio/accel/adxl345_core.c

1523

FIELD_PREP(ADXL345_FIFO_CTL_MODE_MSK,

drivers/iio/accel/adxl345_core.c

2014

FIELD_PREP(ADXL345_FIFO_CTL_MODE_MSK,

drivers/iio/accel/adxl345_core.c

968

FIELD_PREP(ADXL345_BW_RATE_MSK, odr));

drivers/iio/accel/adxl355_core.c

269

FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK,

drivers/iio/accel/adxl355_core.c

368

FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK, 1));

drivers/iio/accel/adxl355_core.c

425

FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));

drivers/iio/accel/adxl355_core.c

464

FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));

drivers/iio/accel/adxl367.c

279

FIELD_PREP(ADXL367_POWER_CTL_MODE_MASK,

drivers/iio/accel/adxl367.c

316

st->act_threshold_buf[0] = FIELD_PREP(ADXL367_THRESH_H_MASK,

drivers/iio/accel/adxl367.c

319

st->act_threshold_buf[1] = FIELD_PREP(ADXL367_THRESH_L_MASK,

drivers/iio/accel/adxl367.c

360

FIELD_PREP(ADXL367_ACT_LINKLOOP_MASK,

drivers/iio/accel/adxl367.c

430

FIELD_PREP(ADXL367_FIFO_CTL_MODE_MASK,

drivers/iio/accel/adxl367.c

439

FIELD_PREP(ADXL367_FIFO_CTL_FORMAT_MASK,

drivers/iio/accel/adxl367.c

455

fifo_samples_h = FIELD_PREP(ADXL367_SAMPLES_H_MASK,

drivers/iio/accel/adxl367.c

458

fifo_samples_l = FIELD_PREP(ADXL367_SAMPLES_L_MASK,

drivers/iio/accel/adxl367.c

491

FIELD_PREP(ADXL367_FILTER_CTL_RANGE_MASK,

drivers/iio/accel/adxl367.c

553

st->inact_time_buf[0] = FIELD_PREP(ADXL367_TIME_INACT_H_MASK,

drivers/iio/accel/adxl367.c

556

st->inact_time_buf[1] = FIELD_PREP(ADXL367_TIME_INACT_L_MASK,

drivers/iio/accel/adxl367.c

599

FIELD_PREP(ADXL367_FILTER_CTL_ODR_MASK,

drivers/iio/accel/adxl380.c

1088

FIELD_PREP(ADXL380_INT_MAP0_FIFO_WM_INT0_MSK, 1));

drivers/iio/accel/adxl380.c

1111

FIELD_PREP(ADXL380_FIFO_EN_MSK, 1));

drivers/iio/accel/adxl380.c

1132

FIELD_PREP(ADXL380_INT_MAP0_FIFO_WM_INT0_MSK, 0));

drivers/iio/accel/adxl380.c

1145

FIELD_PREP(ADXL380_FIFO_EN_MSK, 0));

drivers/iio/accel/adxl380.c

1858

FIELD_PREP(ADXL380_INT0_POL_MSK, polarity));

drivers/iio/accel/adxl380.c

1925

FIELD_PREP(ADXL380_FIFO_MODE_MSK, ADXL380_FIFO_STREAMED));

drivers/iio/accel/adxl380.c

1932

FIELD_PREP(ADXL380_ACT_INACT_AXIS_EN_MSK,

drivers/iio/accel/adxl380.c

282

FIELD_PREP(ADXL380_OP_MODE_MSK, op_mode));

drivers/iio/accel/adxl380.c

506

field = FIELD_PREP(ADXL380_TRIG_CFG_DEC_2X_MSK, mul & 1);

drivers/iio/accel/adxl380.c

512

field = FIELD_PREP(ADXL380_TRIG_CFG_SINC_RATE_MSK, mul >> 1);

drivers/iio/accel/adxl380.c

590

FIELD_PREP(ADXL380_FILTER_EQ_FILT_MSK, eq_bypass));

drivers/iio/accel/adxl380.c

596

FIELD_PREP(ADXL380_FILTER_LPF_MODE_MSK, lpf));

drivers/iio/accel/adxl380.c

638

FIELD_PREP(ADXL380_FILTER_HPF_PATH_MSK, hpf_path));

drivers/iio/accel/adxl380.c

644

FIELD_PREP(ADXL380_FILTER_HPF_CORNER_MSK, hpf));

drivers/iio/accel/adxl380.c

707

FIELD_PREP(ADXL380_OP_MODE_RANGE_MSK, range));

drivers/iio/accel/adxl380.c

737

FIELD_PREP(ADXL380_ACT_EN_MSK, en));

drivers/iio/accel/adxl380.c

741

FIELD_PREP(ADXL380_INACT_EN_MSK, en));

drivers/iio/accel/adxl380.c

772

FIELD_PREP(ADXL380_INT_MAP0_ACT_INT0_MSK, en));

drivers/iio/accel/adxl380.c

776

FIELD_PREP(ADXL380_INT_MAP0_INACT_INT0_MSK, en));

drivers/iio/accel/adxl380.c

809

FIELD_PREP(ADXL380_TAP_AXIS_MSK, axis));

drivers/iio/accel/adxl380.c

841

FIELD_PREP(ADXL380_INT_MAP1_SINGLE_TAP_INT0_MSK, en));

drivers/iio/accel/adxl380.c

845

FIELD_PREP(ADXL380_INT_MAP1_DOUBLE_TAP_INT0_MSK, en));

drivers/iio/accel/adxl380.c

879

FIELD_PREP(ADXL380_FIFO_SAMPLES_8_MSK,

drivers/iio/accel/bma220_core.c

220

FIELD_PREP(BMA220_INT_EN_DRDY_MSK, state));

drivers/iio/accel/bma220_core.c

326

FIELD_PREP(BMA220_RANGE_MASK, index));

drivers/iio/accel/bma220_core.c

341

FIELD_PREP(BMA220_FILTER_MASK, index));

drivers/iio/accel/bma220_i2c.c

23

FIELD_PREP(BMA220_WDT_MASK, val));

drivers/iio/accel/bma400_core.c

1185

FIELD_PREP(BMA400_INT_CONFIG1_STEP_INT_MASK,

drivers/iio/accel/bma400_core.c

1219

FIELD_PREP(BMA400_GENINT_CONFIG0_DATA_SRC_MASK, ACCEL_FILT2)|

drivers/iio/accel/bma400_core.c

1220

FIELD_PREP(BMA400_GENINT_CONFIG0_REF_UPD_MODE_MASK,

drivers/iio/accel/bma400_core.c

1226

regval = FIELD_PREP(BMA400_GENINT_CONFIG1_AXES_COMB_MASK, BMA400_EVAL_X_OR_Y_OR_Z) |

drivers/iio/accel/bma400_core.c

1227

FIELD_PREP(BMA400_GENINT_CONFIG1_DETCT_CRIT_MASK, detect_criterion);

drivers/iio/accel/bma400_core.c

1284

FIELD_PREP(BMA400_INT_CONFIG1_S_TAP_MASK, state));

drivers/iio/accel/bma400_core.c

1292

FIELD_PREP(BMA400_INT_CONFIG1_S_TAP_MASK, state));

drivers/iio/accel/bma400_core.c

1297

FIELD_PREP(BMA400_INT_CONFIG1_D_TAP_MASK, state));

drivers/iio/accel/bma400_core.c

1521

FIELD_PREP(BMA400_GENINT_CONFIG0_HYST_MASK,

drivers/iio/accel/bma400_core.c

1535

FIELD_PREP(BMA400_TAP_CONFIG_SEN_MASK,

drivers/iio/accel/bma400_core.c

1545

FIELD_PREP(BMA400_TAP_CONFIG1_QUIET_MASK,

drivers/iio/accel/bma400_core.c

1555

FIELD_PREP(BMA400_TAP_CONFIG1_QUIETDT_MASK,

drivers/iio/accel/bma400_core.c

1574

FIELD_PREP(BMA400_INT_CONFIG0_DRDY_MASK, state));

drivers/iio/accel/bma400_core.c

1580

FIELD_PREP(BMA400_INT_CONFIG0_DRDY_MASK, state));

drivers/iio/accel/bma400_core.c

342

FIELD_PREP(BMA400_TAP_CONFIG1_TICSTH_MASK, raw));

drivers/iio/accel/bma400_core.c

676

FIELD_PREP(BMA400_ACC_CONFIG0_LP_OSR_MASK, val));

drivers/iio/accel/bma400_core.c

692

FIELD_PREP(BMA400_ACC_CONFIG1_NP_OSR_MASK, val));

drivers/iio/accel/bma400_core.c

758

FIELD_PREP(BMA400_ACC_CONFIG1_ACC_RANGE_MASK, raw));

drivers/iio/accel/bma400_core.c

825

FIELD_PREP(BMA400_INT_CONFIG1_STEP_INT_MASK, val ? 1 : 0));

drivers/iio/accel/fxls8962af-core.c

62

#define FXLS8962AF_SC1_FSR_PREP(x) FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))

drivers/iio/accel/fxls8962af-core.c

68

#define FXLS8962AF_SC3_WAKE_ODR_PREP(x) FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))

drivers/iio/accel/fxls8962af-core.c

72

#define FXLS8962AF_SC4_INT_PP_OD_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))

drivers/iio/accel/fxls8962af-core.c

74

#define FXLS8962AF_SC4_INT_POL_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))

drivers/iio/accel/fxls8962af-core.c

95

#define FXLS8962AF_BC1_BUF_MODE_PREP(x) FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))

drivers/iio/adc/ad4000.c

747

reg_val |= FIELD_PREP(AD4000_CFG_SPAN_COMP, span_comp_en);

drivers/iio/adc/ad4000.c

996

reg_val |= FIELD_PREP(AD4000_CFG_HIGHZ, 1);

drivers/iio/adc/ad4000.c

999

reg_val |= FIELD_PREP(AD4000_CFG_TURBO, 1);

drivers/iio/adc/ad4030.c

520

FIELD_PREP(AD4030_REG_AVG_MASK_AVG_VAL, avg_log2));

drivers/iio/adc/ad4030.c

978

reg_modes = FIELD_PREP(AD4030_REG_MODES_MASK_LANE_MODE,

drivers/iio/adc/ad4030.c

981

reg_modes = FIELD_PREP(AD4030_REG_MODES_MASK_LANE_MODE,

drivers/iio/adc/ad4062.c

1367

FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_1, reg_val));

drivers/iio/adc/ad4062.c

1371

FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0, reg_val));

drivers/iio/adc/ad4062.c

1395

u8 val = FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0, AD4062_GP_DISABLED) |

drivers/iio/adc/ad4062.c

1396

FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_1, AD4062_GP_DISABLED);

drivers/iio/adc/ad4062.c

1435

val |= FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0, AD4062_GP_STATIC_LOW);

drivers/iio/adc/ad4062.c

1439

val |= FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_1, AD4062_GP_STATIC_LOW);

drivers/iio/adc/ad4062.c

1573

FIELD_PREP(AD4062_REG_DEVICE_CONFIG_POWER_MODE_MSK,

drivers/iio/adc/ad4062.c

450

FIELD_PREP(AD4062_REG_TIMER_CONFIG_FS_MASK, val));

drivers/iio/adc/ad4062.c

512

FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_0,

drivers/iio/adc/ad4062.c

519

FIELD_PREP(AD4062_REG_GP_CONF_MODE_MSK_1,

drivers/iio/adc/ad4062.c

526

FIELD_PREP(AD4062_REG_ADC_CONFIG_REF_EN_MSK,

drivers/iio/adc/ad4062.c

538

FIELD_PREP(AD4062_REG_INTR_CONF_EN_MSK_0,

drivers/iio/adc/ad4062.c

545

FIELD_PREP(AD4062_REG_INTR_CONF_EN_MSK_1,

drivers/iio/adc/ad4062.c

846

FIELD_PREP(AD4062_REG_ADC_CONFIG_SCALE_EN_MSK,

drivers/iio/adc/ad4080.c

251

FIELD_PREP(AD4080_FILTER_CONFIG_SINC_DEC_RATE_MSK,

drivers/iio/adc/ad4080.c

364

FIELD_PREP(AD4080_FILTER_CONFIG_FILTER_SEL_MSK,

drivers/iio/adc/ad4080.c

546

FIELD_PREP(AD4080_GPIO_CONFIG_B_GPIO_1_SEL_MSK,

drivers/iio/adc/ad4080.c

562

FIELD_PREP(AD4080_ADC_DATA_INTF_CONFIG_B_LVDS_CNV_CLK_CNT_MSK,

drivers/iio/adc/ad4130.c

1273

FIELD_PREP(AD4130_FIFO_CONTROL_WM_MASK,

drivers/iio/adc/ad4130.c

1789

FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK,

drivers/iio/adc/ad4130.c

1901

val = FIELD_PREP(AD4130_ADC_CONTROL_CSB_EN_MASK, 1);

drivers/iio/adc/ad4130.c

1902

val |= FIELD_PREP(AD4130_ADC_CONTROL_BIPOLAR_MASK, st->bipolar);

drivers/iio/adc/ad4130.c

1903

val |= FIELD_PREP(AD4130_ADC_CONTROL_INT_REF_EN_MASK, st->int_ref_en);

drivers/iio/adc/ad4130.c

1904

val |= FIELD_PREP(AD4130_ADC_CONTROL_MODE_MASK, AD4130_MODE_IDLE);

drivers/iio/adc/ad4130.c

1905

val |= FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK, st->mclk_sel);

drivers/iio/adc/ad4130.c

1906

val |= FIELD_PREP(AD4130_ADC_CONTROL_INT_REF_VAL_MASK, int_ref_val);

drivers/iio/adc/ad4130.c

1919

val |= FIELD_PREP(AD4130_IO_CONTROL_GPIO_CTRL_MASK, BIT(i));

drivers/iio/adc/ad4130.c

1921

val |= FIELD_PREP(AD4130_IO_CONTROL_INT_PIN_SEL_MASK, st->int_pin_sel);

drivers/iio/adc/ad4130.c

1951

val = FIELD_PREP(AD4130_CHANNEL_AINP_MASK, chan->channel) |

drivers/iio/adc/ad4130.c

1952

FIELD_PREP(AD4130_CHANNEL_AINM_MASK, chan->channel2) |

drivers/iio/adc/ad4130.c

1953

FIELD_PREP(AD4130_CHANNEL_IOUT1_MASK, chan_info->iout0) |

drivers/iio/adc/ad4130.c

1954

FIELD_PREP(AD4130_CHANNEL_IOUT2_MASK, chan_info->iout1);

drivers/iio/adc/ad4130.c

529

unsigned int mask = FIELD_PREP(AD4130_IO_CONTROL_GPIO_DATA_MASK,

drivers/iio/adc/ad4130.c

540

FIELD_PREP(AD4130_ADC_CONTROL_MODE_MASK, mode));

drivers/iio/adc/ad4130.c

547

FIELD_PREP(AD4130_FIFO_CONTROL_WM_INT_EN_MASK, en));

drivers/iio/adc/ad4130.c

563

FIELD_PREP(AD4130_FIFO_CONTROL_MODE_MASK, mode));

drivers/iio/adc/ad4130.c

703

FIELD_PREP(AD4130_CHANNEL_SETUP_MASK, slot));

drivers/iio/adc/ad4130.c

720

val = FIELD_PREP(AD4130_CONFIG_IOUT1_VAL_MASK, setup_info->iout0_val) |

drivers/iio/adc/ad4130.c

721

FIELD_PREP(AD4130_CONFIG_IOUT1_VAL_MASK, setup_info->iout1_val) |

drivers/iio/adc/ad4130.c

722

FIELD_PREP(AD4130_CONFIG_BURNOUT_MASK, setup_info->burnout) |

drivers/iio/adc/ad4130.c

723

FIELD_PREP(AD4130_CONFIG_REF_BUFP_MASK, setup_info->ref_bufp) |

drivers/iio/adc/ad4130.c

724

FIELD_PREP(AD4130_CONFIG_REF_BUFM_MASK, setup_info->ref_bufm) |

drivers/iio/adc/ad4130.c

725

FIELD_PREP(AD4130_CONFIG_REF_SEL_MASK, setup_info->ref_sel) |

drivers/iio/adc/ad4130.c

726

FIELD_PREP(AD4130_CONFIG_PGA_MASK, setup_info->pga);

drivers/iio/adc/ad4130.c

732

val = FIELD_PREP(AD4130_FILTER_MODE_MASK, setup_info->filter_type) |

drivers/iio/adc/ad4130.c

733

FIELD_PREP(AD4130_FILTER_SELECT_MASK, setup_info->fs);

drivers/iio/adc/ad4130.c

832

FIELD_PREP(AD4130_CHANNEL_EN_MASK, status));

drivers/iio/adc/ad4134.c

312

FIELD_PREP(AD4134_DIF_IF_CFG_FORMAT_MASK,

drivers/iio/adc/ad4134.c

459

FIELD_PREP(AD4134_DATA_PACKET_CONFIG_FRAME_MASK,

drivers/iio/adc/ad4134.c

467

FIELD_PREP(AD4134_DEVICE_CONFIG_POWER_MODE_MASK,

drivers/iio/adc/ad4170-4.c

1207

FIELD_PREP(AD4170_ADC_CTRL_MODE_MSK,

drivers/iio/adc/ad4170-4.c

1473

setup->afe |= FIELD_PREP(AD4170_AFE_PGA_GAIN_MSK, pga);

drivers/iio/adc/ad4170-4.c

1951

current_src |= FIELD_PREP(AD4170_CURRENT_SRC_I_OUT_PIN_MSK, pin);

drivers/iio/adc/ad4170-4.c

1952

current_src |= FIELD_PREP(AD4170_CURRENT_SRC_I_OUT_VAL_MSK, exc_cur);

drivers/iio/adc/ad4170-4.c

2007

setup->misc |= FIELD_PREP(AD4170_MISC_CHOP_IEXC_MSK,

drivers/iio/adc/ad4170-4.c

2051

setup->misc |= FIELD_PREP(AD4170_MISC_CHOP_ADC_MSK, 0x3);

drivers/iio/adc/ad4170-4.c

2055

FIELD_PREP(AD4170_GPIO_MODE_GPIO3_MSK,

drivers/iio/adc/ad4170-4.c

2057

FIELD_PREP(AD4170_GPIO_MODE_GPIO2_MSK,

drivers/iio/adc/ad4170-4.c

2069

FIELD_PREP(AD4170_GPIO_OUTPUT_GPIO_MSK(3), 0) |

drivers/iio/adc/ad4170-4.c

2070

FIELD_PREP(AD4170_GPIO_OUTPUT_GPIO_MSK(2), 1));

drivers/iio/adc/ad4170-4.c

2077

setup->misc |= FIELD_PREP(AD4170_MISC_CHOP_ADC_MSK, 0x2);

drivers/iio/adc/ad4170-4.c

2082

FIELD_PREP(AD4170_GPIO_MODE_GPIO3_MSK,

drivers/iio/adc/ad4170-4.c

2084

FIELD_PREP(AD4170_GPIO_MODE_GPIO2_MSK,

drivers/iio/adc/ad4170-4.c

2086

FIELD_PREP(AD4170_GPIO_MODE_GPIO1_MSK,

drivers/iio/adc/ad4170-4.c

2088

FIELD_PREP(AD4170_GPIO_MODE_GPIO0_MSK,

drivers/iio/adc/ad4170-4.c

2102

FIELD_PREP(AD4170_GPIO_OUTPUT_GPIO_MSK(3), 0) |

drivers/iio/adc/ad4170-4.c

2103

FIELD_PREP(AD4170_GPIO_OUTPUT_GPIO_MSK(2), 1) |

drivers/iio/adc/ad4170-4.c

2104

FIELD_PREP(AD4170_GPIO_OUTPUT_GPIO_MSK(1), 0) |

drivers/iio/adc/ad4170-4.c

2105

FIELD_PREP(AD4170_GPIO_OUTPUT_GPIO_MSK(0), 1));

drivers/iio/adc/ad4170-4.c

2197

setup->afe |= FIELD_PREP(AD4170_AFE_REF_BUF_P_MSK,

drivers/iio/adc/ad4170-4.c

2207

setup->afe |= FIELD_PREP(AD4170_AFE_REF_BUF_M_MSK,

drivers/iio/adc/ad4170-4.c

2218

setup->afe |= FIELD_PREP(AD4170_AFE_REF_SELECT_MSK, aux);

drivers/iio/adc/ad4170-4.c

2336

setup->afe |= FIELD_PREP(AD4170_AFE_BIPOLAR_MSK, bipolar);

drivers/iio/adc/ad4170-4.c

2392

setup->afe |= FIELD_PREP(AD4170_AFE_REF_SELECT_MSK,

drivers/iio/adc/ad4170-4.c

2425

st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, clk_sel);

drivers/iio/adc/ad4170-4.c

2505

st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK,

drivers/iio/adc/ad4170-4.c

2520

st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK,

drivers/iio/adc/ad4170-4.c

2563

reg_data = FIELD_PREP(AD4170_PIN_MUXING_DIG_AUX1_CTRL_MSK,

drivers/iio/adc/ad4170-4.c

2617

FIELD_PREP(AD4170_ADC_CTRL_MODE_MSK,

drivers/iio/adc/ad4170-4.c

2642

val = FIELD_PREP(AD4170_CHAN_MAP_AINP_MSK, chan->channel) |

drivers/iio/adc/ad4170-4.c

2643

FIELD_PREP(AD4170_CHAN_MAP_AINM_MSK, chan->channel2);

drivers/iio/adc/ad4170-4.c

2700

FIELD_PREP(AD4170_ADC_CTRL_MODE_MSK,

drivers/iio/adc/ad4170-4.c

2711

FIELD_PREP(AD4170_ADC_CTRL_CONT_READ_MSK,

drivers/iio/adc/ad4170-4.c

2732

FIELD_PREP(AD4170_ADC_CTRL_CONT_READ_MSK,

drivers/iio/adc/ad4170-4.c

2739

FIELD_PREP(AD4170_ADC_CTRL_MODE_MSK,

drivers/iio/adc/ad4170-4.c

675

FIELD_PREP(AD4170_CHAN_SETUP_SETUP_MSK, setup_num));

drivers/iio/adc/ad4170-4.c

695

FIELD_PREP(AD4170_ADC_CTRL_MODE_MSK,

drivers/iio/adc/ad4170-4.c

890

setup->filter |= FIELD_PREP(AD4170_FILTER_FILTER_TYPE_MSK,

drivers/iio/adc/ad4695.c

1231

FIELD_PREP(AD4695_REG_CONFIG_IN_OSR_SET, osr));

drivers/iio/adc/ad4695.c

1916

FIELD_PREP(AD4695_REG_SETUP_LDO_EN,

drivers/iio/adc/ad4695.c

467

FIELD_PREP(AD4695_REG_AS_SLOT_INX, channel));

drivers/iio/adc/ad4695.c

494

FIELD_PREP(AD4695_REG_SEQ_CTRL_STD_SEQ_EN, 0) |

drivers/iio/adc/ad4695.c

495

FIELD_PREP(AD4695_REG_SEQ_CTRL_NUM_SLOTS_AS, n - 1));

drivers/iio/adc/ad4695.c

501

FIELD_PREP(AD4695_REG_SETUP_SPI_MODE, 1) |

drivers/iio/adc/ad4695.c

502

FIELD_PREP(AD4695_REG_SETUP_SPI_CYC_CTRL, 0));

drivers/iio/adc/ad4695.c

581

FIELD_PREP(AD4695_REG_REF_CTRL_VREF_SET, val));

drivers/iio/adc/ad4695.c

613

val = FIELD_PREP(AD4695_REG_CONFIG_IN_MODE, cfg->bipolar ? 1 : 0);

drivers/iio/adc/ad4695.c

616

val |= FIELD_PREP(AD4695_REG_CONFIG_IN_PAIR, cfg->pin_pairing);

drivers/iio/adc/ad4695.c

619

val |= FIELD_PREP(AD4695_REG_CONFIG_IN_AINHIGHZ_EN,

drivers/iio/adc/ad4695.c

668

FIELD_PREP(AD4695_REG_AS_SLOT_INX, bit));

drivers/iio/adc/ad4695.c

725

FIELD_PREP(AD4695_REG_AS_SLOT_INX, 0));

drivers/iio/adc/ad4695.c

751

FIELD_PREP(AD4695_REG_TEMP_CTRL_TEMP_EN, temp_en));

drivers/iio/adc/ad4695.c

830

FIELD_PREP(AD4695_REG_AS_SLOT_INX, bit));

drivers/iio/adc/ad4695.c

849

FIELD_PREP(AD4695_REG_TEMP_CTRL_TEMP_EN,

drivers/iio/adc/ad4851.c

317

FIELD_PREP(AD4851_OS_EN_MSK, 1) |

drivers/iio/adc/ad4851.c

318

FIELD_PREP(AD4851_OS_RATIO_MSK, val));

drivers/iio/adc/ad4851.c

362

FIELD_PREP(AD4851_PACKET_FORMAT_MASK, 1));

drivers/iio/adc/ad7091r8.c

155

st->tx_buf = cpu_to_be16(FIELD_PREP(AD7091R8_REG_DATA_MSK, val) |

drivers/iio/adc/ad7091r8.c

156

FIELD_PREP(AD7091R8_RD_WR_FLAG_MSK, 1) |

drivers/iio/adc/ad7091r8.c

157

FIELD_PREP(AD7091R8_REG_ADDR_MSK, reg));

drivers/iio/adc/ad7124.c

1267

st->channels[channel].ain = FIELD_PREP(AD7124_CHANNEL_AINP, ain[0]) |

drivers/iio/adc/ad7124.c

1268

FIELD_PREP(AD7124_CHANNEL_AINM, ain[1]);

drivers/iio/adc/ad7124.c

1293

.ain = FIELD_PREP(AD7124_CHANNEL_AINP, AD7124_CHANNEL_AINx_TEMPSENSOR) |

drivers/iio/adc/ad7124.c

1294

FIELD_PREP(AD7124_CHANNEL_AINM, AD7124_CHANNEL_AINx_AVSS),

drivers/iio/adc/ad7124.c

1442

st->adc_control |= FIELD_PREP(AD7124_ADC_CONTROL_CLK_SEL, clk_sel);

drivers/iio/adc/ad7124.c

1445

st->adc_control |= FIELD_PREP(AD7124_ADC_CONTROL_POWER_MODE, power_mode);

drivers/iio/adc/ad7124.c

1448

st->adc_control |= FIELD_PREP(AD7124_ADC_CONTROL_MODE, AD_SD_MODE_IDLE);

drivers/iio/adc/ad7124.c

1567

st->adc_control |= FIELD_PREP(AD7124_ADC_CONTROL_POWER_MODE, AD7124_MID_POWER);

drivers/iio/adc/ad7124.c

286

st->adc_control |= FIELD_PREP(AD7124_ADC_CONTROL_MODE, mode);

drivers/iio/adc/ad7124.c

465

val = FIELD_PREP(AD7124_CONFIG_BIPOLAR, cfg->bipolar) |

drivers/iio/adc/ad7124.c

466

FIELD_PREP(AD7124_CONFIG_REF_SEL, cfg->refsel) |

drivers/iio/adc/ad7124.c

469

FIELD_PREP(AD7124_CONFIG_PGA, cfg->pga_bits);

drivers/iio/adc/ad7124.c

525

FIELD_PREP(AD7124_FILTER_FILTER, filter) |

drivers/iio/adc/ad7124.c

526

FIELD_PREP(AD7124_FILTER_REJ60, rej60) |

drivers/iio/adc/ad7124.c

527

FIELD_PREP(AD7124_FILTER_POST_FILTER, post) |

drivers/iio/adc/ad7124.c

528

FIELD_PREP(AD7124_FILTER_SINGLE_CYCLE,

drivers/iio/adc/ad7124.c

530

FIELD_PREP(AD7124_FILTER_FS, cfg->odr_sel_bits));

drivers/iio/adc/ad7124.c

620

FIELD_PREP(AD7124_CHANNEL_SETUP, cfg->cfg_slot) |

drivers/iio/adc/ad7173.c

128

FIELD_PREP(AD7173_INTERFACE_DATA_STAT, x)

drivers/iio/adc/ad7173.c

1601

st->adc_mode |= FIELD_PREP(AD7173_ADC_MODE_CLOCKSEL_MASK, clk_sel);

drivers/iio/adc/ad7173.c

1979

st->adc_mode |= FIELD_PREP(AD7173_ADC_MODE_CLOCKSEL_MASK,

drivers/iio/adc/ad7173.c

1985

st->adc_mode |= FIELD_PREP(AD7173_ADC_MODE_CLOCKSEL_MASK,

drivers/iio/adc/ad7173.c

68

(FIELD_PREP(AD7173_CH_SETUP_AINPOS_MASK, pos) | \

drivers/iio/adc/ad7173.c

69

FIELD_PREP(AD7173_CH_SETUP_AINNEG_MASK, neg))

drivers/iio/adc/ad7173.c

731

config = FIELD_PREP(AD7173_SETUP_REF_SEL_MASK, cfg->ref_sel);

drivers/iio/adc/ad7173.c

750

FIELD_PREP(AD7173_FILTER_SINC3_MAP, 1) |

drivers/iio/adc/ad7173.c

751

FIELD_PREP(AD7173_FILTER_SINC3_MAP_DIV,

drivers/iio/adc/ad7173.c

778

FIELD_PREP(AD7173_FILTER_SINC3_MAP, 0) |

drivers/iio/adc/ad7173.c

779

FIELD_PREP(AD7173_FILTER_ENHFILT_MASK,

drivers/iio/adc/ad7173.c

781

FIELD_PREP(AD7173_FILTER_ENHFILTEN,

drivers/iio/adc/ad7173.c

783

FIELD_PREP(AD7173_FILTER_ORDER, 0) |

drivers/iio/adc/ad7173.c

784

FIELD_PREP(AD7173_FILTER_ODR_MASK,

drivers/iio/adc/ad7173.c

826

FIELD_PREP(AD7173_CH_SETUP_SEL_MASK, st->channels[channel].cfg.cfg_slot) |

drivers/iio/adc/ad7173.c

841

st->adc_mode |= FIELD_PREP(AD7173_ADC_MODE_MODE_MASK, mode);

drivers/iio/adc/ad7192.c

1003

st->mode |= FIELD_PREP(AD7192_MODE_AVG_MASK, i);

drivers/iio/adc/ad7192.c

1093

conf |= FIELD_PREP(AD7192_CONF_CHAN_MASK, BIT(i));

drivers/iio/adc/ad7192.c

308

st->conf |= FIELD_PREP(AD7192_CONF_CHAN_MASK, channel);

drivers/iio/adc/ad7192.c

319

st->mode |= FIELD_PREP(AD7192_MODE_SEL_MASK, mode);

drivers/iio/adc/ad7192.c

331

mode |= FIELD_PREP(AD7192_MODE_STA_MASK, append);

drivers/iio/adc/ad7192.c

592

st->mode = FIELD_PREP(AD7192_MODE_SEL_MASK, AD7192_MODE_IDLE) |

drivers/iio/adc/ad7192.c

593

FIELD_PREP(AD7192_MODE_CLKSRC_MASK, st->clock_sel) |

drivers/iio/adc/ad7192.c

594

FIELD_PREP(AD7192_MODE_RATE_MASK, 480);

drivers/iio/adc/ad7192.c

596

st->conf = FIELD_PREP(AD7192_CONF_GAIN_MASK, 0);

drivers/iio/adc/ad7192.c

973

st->conf |= FIELD_PREP(AD7192_CONF_GAIN_MASK, i);

drivers/iio/adc/ad7192.c

990

st->mode |= FIELD_PREP(AD7192_MODE_RATE_MASK, div);

drivers/iio/adc/ad7280a.c

1031

st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) |

drivers/iio/adc/ad7280a.c

1032

FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en);

drivers/iio/adc/ad7280a.c

1069

FIELD_PREP(AD7280A_ALERT_REMOVE_MSK,

drivers/iio/adc/ad7280a.c

250

unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) |

drivers/iio/adc/ad7280a.c

251

FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) |

drivers/iio/adc/ad7280a.c

252

FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) |

drivers/iio/adc/ad7280a.c

253

FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all);

drivers/iio/adc/ad7280a.c

255

reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK,

drivers/iio/adc/ad7280a.c

273

FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,

drivers/iio/adc/ad7280a.c

275

FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,

drivers/iio/adc/ad7280a.c

277

FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,

drivers/iio/adc/ad7280a.c

284

FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,

drivers/iio/adc/ad7280a.c

286

FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,

drivers/iio/adc/ad7280a.c

288

FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,

drivers/iio/adc/ad7280a.c

295

FIELD_PREP(AD7280A_READ_ADDR_MSK, addr));

drivers/iio/adc/ad7280a.c

320

FIELD_PREP(AD7280A_READ_ADDR_MSK, addr));

drivers/iio/adc/ad7280a.c

325

FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,

drivers/iio/adc/ad7280a.c

327

FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,

drivers/iio/adc/ad7280a.c

329

FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,

drivers/iio/adc/ad7280a.c

335

FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,

drivers/iio/adc/ad7280a.c

337

FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,

drivers/iio/adc/ad7280a.c

339

FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK,

drivers/iio/adc/ad7280a.c

341

FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,

drivers/iio/adc/ad7280a.c

374

FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,

drivers/iio/adc/ad7280a.c

376

FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,

drivers/iio/adc/ad7280a.c

378

FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK,

drivers/iio/adc/ad7280a.c

380

FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,

drivers/iio/adc/ad7280a.c

412

FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio));

drivers/iio/adc/ad7280a.c

421

FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) |

drivers/iio/adc/ad7280a.c

422

FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) |

drivers/iio/adc/ad7280a.c

424

FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) |

drivers/iio/adc/ad7280a.c

430

FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) |

drivers/iio/adc/ad7280a.c

431

FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) |

drivers/iio/adc/ad7280a.c

433

FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) |

drivers/iio/adc/ad7280a.c

439

FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG));

drivers/iio/adc/ad7280a.c

466

FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio));

drivers/iio/adc/ad7280a.c

506

FIELD_PREP(AD7280A_CELL_BALANCE_CHAN_BITMAP_MSK,

drivers/iio/adc/ad7280a.c

557

FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val));

drivers/iio/adc/ad7380.c

1077

FIELD_PREP(AD7380_CONFIG1_CH, ch));

drivers/iio/adc/ad7380.c

1257

FIELD_PREP(AD7380_CONFIG1_SEQ, 0));

drivers/iio/adc/ad7380.c

1306

FIELD_PREP(AD7380_CONFIG1_SEQ, 1));

drivers/iio/adc/ad7380.c

1336

FIELD_PREP(AD7380_CONFIG1_SEQ, 0));

drivers/iio/adc/ad7380.c

1551

FIELD_PREP(AD7380_CONFIG1_OSR, osr) |

drivers/iio/adc/ad7380.c

1552

FIELD_PREP(AD7380_CONFIG1_RES, boost));

drivers/iio/adc/ad7380.c

1567

FIELD_PREP(AD7380_CONFIG2_RESET,

drivers/iio/adc/ad7380.c

1642

FIELD_PREP(AD7380_CONFIG1_ALERTEN, state));

drivers/iio/adc/ad7380.c

1801

FIELD_PREP(AD7380_CONFIG2_RESET,

drivers/iio/adc/ad7380.c

1821

FIELD_PREP(AD7380_CONFIG2_SDO,

drivers/iio/adc/ad7380.c

930

st->tx = FIELD_PREP(AD7380_REG_WR, 1) |

drivers/iio/adc/ad7380.c

931

FIELD_PREP(AD7380_REG_REGADDR, reg) |

drivers/iio/adc/ad7380.c

932

FIELD_PREP(AD7380_REG_DATA, val);

drivers/iio/adc/ad7380.c

961

st->tx = FIELD_PREP(AD7380_REG_WR, 0) |

drivers/iio/adc/ad7380.c

962

FIELD_PREP(AD7380_REG_REGADDR, reg) |

drivers/iio/adc/ad7380.c

963

FIELD_PREP(AD7380_REG_DATA, 0);

drivers/iio/adc/ad7768-1.c

101

#define AD7768_REG_ANALOG2_VCM(x) FIELD_PREP(AD7768_REG_ANALOG2_VCM_MSK, (x))

drivers/iio/adc/ad7768-1.c

604

regval = FIELD_PREP(GENMASK(12, 0), dec_rate);

drivers/iio/adc/ad7768-1.c

84

#define AD7768_PWR_MCLK_DIV(x) FIELD_PREP(AD7768_PWR_MCLK_DIV_MSK, x)

drivers/iio/adc/ad7768-1.c

86

#define AD7768_PWR_PWRMODE(x) FIELD_PREP(AD7768_PWR_PWRMODE_MSK, x)

drivers/iio/adc/ad7768-1.c

91

#define AD7768_DIG_FIL_FIL(x) FIELD_PREP(AD7768_DIG_FIL_FIL_MSK, x)

drivers/iio/adc/ad7768-1.c

93

#define AD7768_DIG_FIL_DEC_RATE(x) FIELD_PREP(AD7768_DIG_FIL_DEC_MSK, x)

drivers/iio/adc/ad7768-1.c

97

#define AD7768_CONV_MODE(x) FIELD_PREP(AD7768_CONV_MODE_MSK, x)

drivers/iio/adc/ad7779.c

368

FIELD_PREP(AD7779_FILTER_MSK, mode));

drivers/iio/adc/ad7779.c

558

FIELD_PREP(AD7779_MOD_SPI_EN_MSK, 1));

drivers/iio/adc/ad7779.c

744

FIELD_PREP(AD7779_SPI_CRC_EN_MSK, 1));

drivers/iio/adc/ad7779.c

750

FIELD_PREP(AD7779_USRMOD_INIT_MSK, 5));

drivers/iio/adc/ad7779.c

756

FIELD_PREP(AD7779_DCLK_CLK_DIV_MSK, 1));

drivers/iio/adc/ad7779.c

762

FIELD_PREP(AD7779_REFMUX_CTRL_MSK, 1));

drivers/iio/adc/ad7779.c

801

FIELD_PREP(AD7779_DOUT_FORMAT_MSK, 2 - ilog2(num_lanes)));

drivers/iio/adc/ad7779.c

866

FIELD_PREP(AD7779_DCLK_CLK_DIV_MSK, 7));

drivers/iio/adc/ad7779.c

970

FIELD_PREP(AD7779_MOD_POWERMODE_MSK,

drivers/iio/adc/ad7779.c

981

FIELD_PREP(AD7779_MOD_POWERMODE_MSK,

drivers/iio/adc/ad7949.c

141

FIELD_PREP(AD7949_CFG_MASK_INX, channel),

drivers/iio/adc/ad7949.c

284

cfg = FIELD_PREP(AD7949_CFG_MASK_OVERWRITE, 1) |

drivers/iio/adc/ad7949.c

285

FIELD_PREP(AD7949_CFG_MASK_INCC, AD7949_CFG_VAL_INCC_UNIPOLAR_GND) |

drivers/iio/adc/ad7949.c

286

FIELD_PREP(AD7949_CFG_MASK_INX, ad7949_adc->current_channel) |

drivers/iio/adc/ad7949.c

287

FIELD_PREP(AD7949_CFG_MASK_BW_FULL, 1) |

drivers/iio/adc/ad7949.c

288

FIELD_PREP(AD7949_CFG_MASK_REF, ad7949_adc->refsel) |

drivers/iio/adc/ad7949.c

289

FIELD_PREP(AD7949_CFG_MASK_SEQ, 0x0) |

drivers/iio/adc/ad7949.c

290

FIELD_PREP(AD7949_CFG_MASK_RBN, 1);

drivers/iio/adc/ade9000.c

1476

wfb_cfg_val |= FIELD_PREP(ADE9000_WF_SRC_MASK, st->wf_src);

drivers/iio/adc/ade9000.c

419

FIELD_PREP(ADE9000_WF_SRC_MASK, val));

drivers/iio/adc/ade9000.c

662

addr = FIELD_PREP(ADE9000_REG_ADDR_MASK, reg);

drivers/iio/adc/ade9000.c

691

addr = FIELD_PREP(ADE9000_REG_ADDR_MASK, reg) |

drivers/iio/adc/ade9000.c

734

addr = FIELD_PREP(ADE9000_REG_ADDR_MASK, wfb_addr) |

drivers/iio/adc/adi-axi-adc.c

174

val = FIELD_PREP(ADI_AXI_REG_CHAN_CTRL_FMT_EN, true);

drivers/iio/adc/adi-axi-adc.c

176

val |= FIELD_PREP(ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT, true);

drivers/iio/adc/adi-axi-adc.c

178

val |= FIELD_PREP(ADI_AXI_REG_CHAN_CTRL_FMT_TYPE, true);

drivers/iio/adc/adi-axi-adc.c

243

FIELD_PREP(ADI_AXI_ADC_CHAN_PN_SEL_MASK, 0));

drivers/iio/adc/adi-axi-adc.c

247

FIELD_PREP(ADI_AXI_ADC_CHAN_PN_SEL_MASK, 1));

drivers/iio/adc/adi-axi-adc.c

262

FIELD_PREP(ADI_AXI_ADC_CHAN_USR_CTRL_2_DEC_RATE_N_MASK,

drivers/iio/adc/adi-axi-adc.c

401

FIELD_PREP(AXI_AD485X_CNTRL_3_PACKET_FORMAT_MSK, val));

drivers/iio/adc/adi-axi-adc.c

468

FIELD_PREP(ADI_AXI_ADC_CTRL_NUM_LANES_MSK, num_lanes));

drivers/iio/adc/adi-axi-adc.c

522

addr = FIELD_PREP(ADI_AXI_REG_ADDRESS_MASK, reg) | ADI_AXI_REG_READ_BIT;

drivers/iio/adc/adi-axi-adc.c

544

buf = FIELD_PREP(ADI_AXI_REG_ADDRESS_MASK, reg) |

drivers/iio/adc/adi-axi-adc.c

545

FIELD_PREP(ADI_AXI_REG_VALUE_MASK, val);

drivers/iio/adc/aspeed_adc.c

226

(FIELD_PREP(ASPEED_ADC_OP_MODE, ASPEED_ADC_OP_MODE_NORMAL) |

drivers/iio/adc/aspeed_adc.c

292

FIELD_PREP(ASPEED_ADC_CH7_MODE,

drivers/iio/adc/aspeed_adc.c

402

writel(FIELD_PREP(ASPEED_ADC_OP_MODE, ASPEED_ADC_OP_MODE_PWR_DOWN),

drivers/iio/adc/aspeed_adc.c

429

FIELD_PREP(

drivers/iio/adc/aspeed_adc.c

435

FIELD_PREP(

drivers/iio/adc/aspeed_adc.c

453

FIELD_PREP(ASPEED_ADC_REF_VOLTAGE,

drivers/iio/adc/aspeed_adc.c

458

FIELD_PREP(ASPEED_ADC_REF_VOLTAGE,

drivers/iio/adc/aspeed_adc.c

588

FIELD_PREP(ASPEED_ADC_OP_MODE, ASPEED_ADC_OP_MODE_NORMAL) |

drivers/iio/adc/aspeed_adc.c

74

#define ASPEED_ADC_CTRL_CHANNEL_ENABLE(ch) FIELD_PREP(ASPEED_ADC_CTRL_CHANNEL, BIT(ch))

drivers/iio/adc/axp20x_adc.c

905

regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO0, !!val);

drivers/iio/adc/axp20x_adc.c

910

regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO1, !!val);

drivers/iio/adc/axp20x_adc.c

915

regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO2, !!val);

drivers/iio/adc/axp20x_adc.c

920

regval = FIELD_PREP(AXP192_GPIO30_IN_RANGE_GPIO3, !!val);

drivers/iio/adc/axp20x_adc.c

950

regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO0, !!val);

drivers/iio/adc/axp20x_adc.c

955

regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO1, !!val);

drivers/iio/adc/imx8qxp-adc.c

129

ctrl |= FIELD_PREP(IMX8QXP_ADC_CTRL_SOFTWARE_RESET_MASK, 1);

drivers/iio/adc/imx8qxp-adc.c

132

ctrl &= ~FIELD_PREP(IMX8QXP_ADC_CTRL_SOFTWARE_RESET_MASK, 1);

drivers/iio/adc/imx8qxp-adc.c

136

ctrl |= FIELD_PREP(IMX8QXP_ADC_CTRL_FIFO_RESET_MASK, 1);

drivers/iio/adc/imx8qxp-adc.c

145

adc_cfg = FIELD_PREP(IMX8QXP_ADC_CFG_PWREN_MASK, 1) |

drivers/iio/adc/imx8qxp-adc.c

146

FIELD_PREP(IMX8QXP_ADC_CFG_PUDLY_MASK, 0x80)|

drivers/iio/adc/imx8qxp-adc.c

147

FIELD_PREP(IMX8QXP_ADC_CFG_REFSEL_MASK, 0) |

drivers/iio/adc/imx8qxp-adc.c

148

FIELD_PREP(IMX8QXP_ADC_CFG_PWRSEL_MASK, 3) |

drivers/iio/adc/imx8qxp-adc.c

149

FIELD_PREP(IMX8QXP_ADC_CFG_TPRICTRL_MASK, 0);

drivers/iio/adc/imx8qxp-adc.c

153

adc_tctrl = FIELD_PREP(IMX8QXP_ADC_TCTRL_TCMD_MASK, 1) |

drivers/iio/adc/imx8qxp-adc.c

154

FIELD_PREP(IMX8QXP_ADC_TCTRL_TDLY_MASK, 0) |

drivers/iio/adc/imx8qxp-adc.c

155

FIELD_PREP(IMX8QXP_ADC_TCTRL_TPRI_MASK, IMX8QXP_ADC_TCTRL_TPRI_PRIORITY_HIGH) |

drivers/iio/adc/imx8qxp-adc.c

156

FIELD_PREP(IMX8QXP_ADC_TCTRL_HTEN_MASK, IMX8QXP_ADC_TCTRL_HTEN_HW_TIRG_DIS);

drivers/iio/adc/imx8qxp-adc.c

160

adc_cmdl = FIELD_PREP(IMX8QXP_ADC_CMDL_CSCALE_MASK, IMX8QXP_ADC_CMDL_CHANNEL_SCALE_FULL) |

drivers/iio/adc/imx8qxp-adc.c

161

FIELD_PREP(IMX8QXP_ADC_CMDL_MODE_MASK, IMX8QXP_ADC_CMDL_STANDARD_RESOLUTION) |

drivers/iio/adc/imx8qxp-adc.c

162

FIELD_PREP(IMX8QXP_ADC_CMDL_DIFF_MASK, IMX8QXP_ADC_CMDL_MODE_SINGLE) |

drivers/iio/adc/imx8qxp-adc.c

163

FIELD_PREP(IMX8QXP_ADC_CMDL_ABSEL_MASK, IMX8QXP_ADC_CMDL_SEL_A_A_B_CHANNEL) |

drivers/iio/adc/imx8qxp-adc.c

164

FIELD_PREP(IMX8QXP_ADC_CMDL_ADCH_MASK, channel);

drivers/iio/adc/imx8qxp-adc.c

167

adc_cmdh = FIELD_PREP(IMX8QXP_ADC_CMDH_NEXT_MASK, 0) |

drivers/iio/adc/imx8qxp-adc.c

168

FIELD_PREP(IMX8QXP_ADC_CMDH_LOOP_MASK, 0) |

drivers/iio/adc/imx8qxp-adc.c

169

FIELD_PREP(IMX8QXP_ADC_CMDH_AVGS_MASK, 7) |

drivers/iio/adc/imx8qxp-adc.c

170

FIELD_PREP(IMX8QXP_ADC_CMDH_STS_MASK, 0) |

drivers/iio/adc/imx8qxp-adc.c

171

FIELD_PREP(IMX8QXP_ADC_CMDH_LWI_MASK, IMX8QXP_ADC_CMDH_LWI_INCREMENT_DIS) |

drivers/iio/adc/imx8qxp-adc.c

172

FIELD_PREP(IMX8QXP_ADC_CMDH_CMPEN_MASK, IMX8QXP_ADC_CMDH_CMPEN_DIS);

drivers/iio/adc/imx8qxp-adc.c

183

fifo_ctrl |= FIELD_PREP(IMX8QXP_ADC_FCTRL_FWMARK_MASK, 0);

drivers/iio/adc/imx8qxp-adc.c

188

interrupt_en |= FIELD_PREP(IMX8QXP_ADC_IE_FWMIE_MASK, 1);

drivers/iio/adc/imx8qxp-adc.c

197

ctrl &= ~FIELD_PREP(IMX8QXP_ADC_CTRL_ADC_EN_MASK, 1);

drivers/iio/adc/imx8qxp-adc.c

224

ctrl |= FIELD_PREP(IMX8QXP_ADC_CTRL_ADC_EN_MASK, 1);

drivers/iio/adc/imx93_adc.c

111

mcr |= FIELD_PREP(IMX93_ADC_MCR_PWDN_MASK, 1);

drivers/iio/adc/imx93_adc.c

130

mcr &= ~FIELD_PREP(IMX93_ADC_MCR_PWDN_MASK, 1);

drivers/iio/adc/imx93_adc.c

143

mcr |= FIELD_PREP(IMX93_ADC_MCR_ADCLKSE_MASK, 1);

drivers/iio/adc/imx93_adc.c

159

mcr &= ~FIELD_PREP(IMX93_ADC_MCR_ADCLKSE_MASK, 1);

drivers/iio/adc/imx93_adc.c

176

mcr |= FIELD_PREP(IMX93_ADC_MCR_CALSTART_MASK, 1);

drivers/iio/adc/imx93_adc.c

220

imr = FIELD_PREP(IMX93_ADC_IMR_EOC_MASK, 1);

drivers/iio/adc/imx93_adc.c

226

mcr &= ~FIELD_PREP(IMX93_ADC_MCR_MODE_MASK, 1);

drivers/iio/adc/imx93_adc.c

231

mcr |= FIELD_PREP(IMX93_ADC_MCR_NSTART_MASK, 1);

drivers/iio/adc/intel_dc_ti_adc.c

165

FIELD_PREP(DC_TI_ADC_CH_SEL, ch));

drivers/iio/adc/ltc2309.c

109

din = FIELD_PREP(LTC2309_DIN_CH_MASK, address & 0x0f) |

drivers/iio/adc/ltc2309.c

110

FIELD_PREP(LTC2309_DIN_UNI, 1) |

drivers/iio/adc/ltc2309.c

111

FIELD_PREP(LTC2309_DIN_SLEEP, 0);

drivers/iio/adc/max11410.c

368

regval = FIELD_PREP(MAX11410_CTRL_VREFP_BUF_BIT, cfg.buffered_vrefp) |

drivers/iio/adc/max11410.c

369

FIELD_PREP(MAX11410_CTRL_VREFN_BUF_BIT, cfg.buffered_vrefn) |

drivers/iio/adc/max11410.c

370

FIELD_PREP(MAX11410_CTRL_REFSEL_MASK, cfg.refsel) |

drivers/iio/adc/max11410.c

371

FIELD_PREP(MAX11410_CTRL_UNIPOLAR_BIT, cfg.bipolar ? 0 : 1);

drivers/iio/adc/max11410.c

380

regval = FIELD_PREP(MAX11410_PGA_SIG_PATH_MASK, cfg.sig_path) |

drivers/iio/adc/max11410.c

381

FIELD_PREP(MAX11410_PGA_GAIN_MASK, cfg.gain);

drivers/iio/adc/max11410.c

868

FIELD_PREP(MAX11410_FILTER_RATE_MASK,

drivers/iio/adc/max11410.c

879

FIELD_PREP(MAX11410_PGA_SIG_PATH_MASK,

drivers/iio/adc/max11410.c

909

FIELD_PREP(MAX11410_PGA_SIG_PATH_MASK,

drivers/iio/adc/max14001.c

106

addr = FIELD_PREP(MAX14001_MASK_ADDR, reg);

drivers/iio/adc/max14001.c

142

addr = FIELD_PREP(MAX14001_MASK_ADDR, reg) |

drivers/iio/adc/max14001.c

143

FIELD_PREP(MAX14001_MASK_WR, 1) |

drivers/iio/adc/max14001.c

144

FIELD_PREP(MAX14001_MASK_DATA, val);

drivers/iio/adc/mcp3564.c

116

#define MCP3564_MUX_SET(x, y) (FIELD_PREP(MCP3564_MUX_VIN_P_MASK, (x)) | \

drivers/iio/adc/mcp3564.c

117

FIELD_PREP(MCP3564_MUX_VIN_N_MASK, (y)))

drivers/iio/adc/mcp3564.c

121

#define MCP3564_SCAN_CH_SEL_SET(x) FIELD_PREP(MCP3564_SCAN_CH_SEL_MASK, (x))

drivers/iio/adc/mcp3564.c

123

#define MCP3564_SCAN_DELAY_TIME_SET(x) FIELD_PREP(MCP3564_SCAN_DELAY_TIME_MASK, (x))

drivers/iio/adc/mcp3564.c

1290

FIELD_PREP(MCP3464_EN_FASTCMD_MASK, 1) |

drivers/iio/adc/mcp3564.c

1291

FIELD_PREP(MCP3464_EN_STP_MASK, 1));

drivers/iio/adc/mcp3564.c

1295

tmp_reg = FIELD_PREP(MCP3464_CONFIG3_CONV_MODE_MASK,

drivers/iio/adc/mcp3564.c

1297

tmp_reg |= FIELD_PREP(MCP3464_CONFIG3_DATA_FORMAT_MASK,

drivers/iio/adc/mcp3564.c

1306

tmp_reg = FIELD_PREP(MCP3564_CONFIG2_BOOST_CURRENT_MASK, MCP3564_BOOST_CURRENT_x1_00);

drivers/iio/adc/mcp3564.c

1307

tmp_reg |= FIELD_PREP(MCP3564_CONFIG2_HARDWARE_GAIN_MASK, 0x01);

drivers/iio/adc/mcp3564.c

1308

tmp_reg |= FIELD_PREP(MCP3564_CONFIG2_AZ_MUX_MASK, 1);

drivers/iio/adc/mcp3564.c

1319

tmp_reg = FIELD_PREP(MCP3564_CONFIG1_OVERSPL_RATIO_MASK, MCP3564_OVERSAMPLING_RATIO_98304);

drivers/iio/adc/mcp3564.c

1327

tmp_reg = FIELD_PREP(MCP3564_CONFIG0_ADC_MODE_MASK, MCP3564_ADC_MODE_STANDBY);

drivers/iio/adc/mcp3564.c

1328

tmp_reg |= FIELD_PREP(MCP3564_CONFIG0_CS_SEL_MASK, MCP3564_CONFIG0_CS_SEL_0_0_uA);

drivers/iio/adc/mcp3564.c

1329

tmp_reg |= FIELD_PREP(MCP3564_CONFIG0_CLK_SEL_MASK, MCP3564_CONFIG0_USE_INT_CLK);

drivers/iio/adc/mcp3564.c

1333

tmp_reg |= FIELD_PREP(MCP3456_CONFIG0_VREF_MASK, 1);

drivers/iio/adc/mcp3564.c

388

return FIELD_PREP(MCP3564_CMD_HW_ADDR_MASK, chip_addr) |

drivers/iio/adc/mcp3564.c

389

FIELD_PREP(MCP3564_CMD_ADDR_MASK, reg) |

drivers/iio/adc/mcp3564.c

395

return FIELD_PREP(MCP3564_CMD_HW_ADDR_MASK, chip_addr) |

drivers/iio/adc/mcp3564.c

396

FIELD_PREP(MCP3564_CMD_ADDR_MASK, reg) |

drivers/iio/adc/mcp3564.c

469

val = FIELD_PREP(MCP3564_CMD_HW_ADDR_MASK, adc->dev_addr) |

drivers/iio/adc/mcp3564.c

470

FIELD_PREP(MCP3564_CMD_ADDR_MASK, fast_cmd);

drivers/iio/adc/mcp3564.c

503

FIELD_PREP(MCP3564_CONFIG2_BOOST_CURRENT_MASK, mode));

drivers/iio/adc/mcp3564.c

566

FIELD_PREP(MCP3564_CONFIG2_AZ_MUX_MASK, auto_zero));

drivers/iio/adc/mcp3564.c

603

FIELD_PREP(MCP3564_CONFIG2_AZ_REF_MASK, auto_zero));

drivers/iio/adc/mcp3564.c

909

FIELD_PREP(MCP3564_CONFIG0_CS_SEL_MASK, burnout));

drivers/iio/adc/mcp3564.c

953

FIELD_PREP(MCP3564_CONFIG1_OVERSPL_RATIO_MASK,

drivers/iio/adc/mcp3564.c

974

FIELD_PREP(MCP3564_CONFIG2_HARDWARE_GAIN_MASK, hwgain));

drivers/iio/adc/mcp3911.c

264

unsigned int osr = FIELD_PREP(MCP3910_CONFIG0_OSR, val);

drivers/iio/adc/mcp3911.c

272

unsigned int osr = FIELD_PREP(MCP3911_CONFIG_OSR, val);

drivers/iio/adc/mcp3911.c

571

regval |= FIELD_PREP(MCP3911_CONFIG_VREFEXT, 1);

drivers/iio/adc/mcp3911.c

574

regval |= FIELD_PREP(MCP3911_CONFIG_VREFEXT, 0);

drivers/iio/adc/mcp3911.c

580

regval |= FIELD_PREP(MCP3911_CONFIG_CLKEXT, 1);

drivers/iio/adc/mcp3911.c

583

regval |= FIELD_PREP(MCP3911_CONFIG_CLKEXT, 0);

drivers/iio/adc/mcp3911.c

596

regval |= FIELD_PREP(MCP3911_STATUSCOM_READ, 0x02);

drivers/iio/adc/mcp3911.c

600

regval |= FIELD_PREP(MCP3911_STATUSCOM_DRHIZ, 0);

drivers/iio/adc/mcp3911.c

602

regval |= FIELD_PREP(MCP3911_STATUSCOM_DRHIZ, 1);

drivers/iio/adc/mcp3911.c

637

regval |= FIELD_PREP(MCP3910_CONFIG1_VREFEXT, 1);

drivers/iio/adc/mcp3911.c

640

regval |= FIELD_PREP(MCP3910_CONFIG1_VREFEXT, 0);

drivers/iio/adc/mcp3911.c

646

regval |= FIELD_PREP(MCP3910_CONFIG1_CLKEXT, 1);

drivers/iio/adc/mcp3911.c

649

regval |= FIELD_PREP(MCP3910_CONFIG1_CLKEXT, 0);

drivers/iio/adc/mcp3911.c

662

regval |= FIELD_PREP(MCP3910_STATUSCOM_READ, 0x02);

drivers/iio/adc/mcp3911.c

666

regval |= FIELD_PREP(MCP3910_STATUSCOM_DRHIZ, 0);

drivers/iio/adc/mcp3911.c

668

regval |= FIELD_PREP(MCP3910_STATUSCOM_DRHIZ, 1);

drivers/iio/adc/meson_saradc.c

1000

regval = FIELD_PREP(MESON_SAR_ADC_REG11_CMV_SEL,

drivers/iio/adc/meson_saradc.c

1059

regval = FIELD_PREP(MESON_SAR_ADC_REG0_FIFO_CNT_IRQ_MASK, 1);

drivers/iio/adc/meson_saradc.c

433

regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, sel);

drivers/iio/adc/meson_saradc.c

504

regval = FIELD_PREP(MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK, 0);

drivers/iio/adc/meson_saradc.c

509

regval = FIELD_PREP(MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK(0),

drivers/iio/adc/meson_saradc.c

514

regval = FIELD_PREP(MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK,

drivers/iio/adc/meson_saradc.c

520

regval = FIELD_PREP(MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK,

drivers/iio/adc/meson_saradc.c

885

FIELD_PREP(MESON_SAR_ADC_DELAY_SAMPLE_DLY_CNT_MASK,

drivers/iio/adc/meson_saradc.c

889

FIELD_PREP(MESON_SAR_ADC_DELAY_SAMPLE_DLY_SEL_MASK,

drivers/iio/adc/meson_saradc.c

895

FIELD_PREP(MESON_SAR_ADC_DELAY_INPUT_DLY_CNT_MASK,

drivers/iio/adc/meson_saradc.c

899

FIELD_PREP(MESON_SAR_ADC_DELAY_INPUT_DLY_SEL_MASK,

drivers/iio/adc/meson_saradc.c

906

regval = FIELD_PREP(MESON_SAR_ADC_CHAN_10_SW_CHAN0_MUX_SEL_MASK, 0);

drivers/iio/adc/meson_saradc.c

910

regval = FIELD_PREP(MESON_SAR_ADC_CHAN_10_SW_CHAN1_MUX_SEL_MASK, 1);

drivers/iio/adc/meson_saradc.c

950

regval = FIELD_PREP(MESON_SAR_ADC_DELTA_10_TS_C_MASK,

drivers/iio/adc/meson_saradc.c

977

regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,

drivers/iio/adc/meson_saradc.c

984

regval = FIELD_PREP(MESON_SAR_ADC_REG11_EOC, priv->param->adc_eoc);

drivers/iio/adc/meson_saradc.c

989

regval = FIELD_PREP(MESON_SAR_ADC_REG11_VREF_SEL,

drivers/iio/adc/meson_saradc.c

995

regval = FIELD_PREP(MESON_SAR_ADC_REG11_VREF_VOLTAGE,

drivers/iio/adc/mt6359-auxadc.c

708

ext_sel = FIELD_PREP(MT6363_EXT_PURES_MASK, desc->ext_sel_pu);

drivers/iio/adc/mt6359-auxadc.c

709

ext_sel |= FIELD_PREP(MT6363_EXT_CHAN_MASK, desc->ext_sel_ch);

drivers/iio/adc/mt6359-auxadc.c

743

ext_sel = FIELD_PREP(MT6363_EXT_PURES_MASK, MT6363_PULLUP_RES_OPEN);

drivers/iio/adc/mt6370-adc.c

77

FIELD_PREP(MT6370_ADC_IN_SEL_MASK, addr);

drivers/iio/adc/nct7201.c

261

FIELD_PREP(NCT7201_REG_VIN_MASK, val));

drivers/iio/adc/nct7201.c

264

FIELD_PREP(NCT7201_REG_VIN_MASK, val));

drivers/iio/adc/pac1921.c

1075

val = FIELD_PREP(PAC1921_GAIN_DI_GAIN_MASK, priv->di_gain) |

drivers/iio/adc/pac1921.c

1076

FIELD_PREP(PAC1921_GAIN_DV_GAIN_MASK, priv->dv_gain);

drivers/iio/adc/pac1921.c

1088

val = FIELD_PREP(PAC1921_INT_CFG_SMPL_MASK, priv->n_samples) |

drivers/iio/adc/pac1921.c

1101

val = FIELD_PREP(PAC1921_CONTROL_MXSL_MASK,

drivers/iio/adc/pac1921.c

624

reg_val = FIELD_PREP(PAC1921_INT_CFG_SMPL_MASK, n_samples);

drivers/iio/adc/pac1934.c

1248

FIELD_PREP(PAC1934_CHAN_DIS_CH1_OFF_MASK, info->active_channels[0] ? 0 : 1) |

drivers/iio/adc/pac1934.c

1249

FIELD_PREP(PAC1934_CHAN_DIS_CH2_OFF_MASK, info->active_channels[1] ? 0 : 1) |

drivers/iio/adc/pac1934.c

1250

FIELD_PREP(PAC1934_CHAN_DIS_CH3_OFF_MASK, info->active_channels[2] ? 0 : 1) |

drivers/iio/adc/pac1934.c

1251

FIELD_PREP(PAC1934_CHAN_DIS_CH4_OFF_MASK, info->active_channels[3] ? 0 : 1) |

drivers/iio/adc/pac1934.c

1252

FIELD_PREP(PAC1934_SMBUS_TIMEOUT_MASK, 0) |

drivers/iio/adc/pac1934.c

1253

FIELD_PREP(PAC1934_SMBUS_BYTECOUNT_MASK, 0) |

drivers/iio/adc/pac1934.c

1254

FIELD_PREP(PAC1934_SMBUS_NO_SKIP_MASK, 0);

drivers/iio/adc/pac1934.c

1257

FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) |

drivers/iio/adc/pac1934.c

1258

FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) |

drivers/iio/adc/pac1934.c

1259

FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) |

drivers/iio/adc/pac1934.c

1260

FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) |

drivers/iio/adc/pac1934.c

1261

FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) |

drivers/iio/adc/pac1934.c

1262

FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) |

drivers/iio/adc/pac1934.c

1263

FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) |

drivers/iio/adc/pac1934.c

1264

FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]);

drivers/iio/adc/pac1934.c

1290

ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, PAC1934_SAMP_1024SPS);

drivers/iio/adc/pac1934.c

542

FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) |

drivers/iio/adc/pac1934.c

543

FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) |

drivers/iio/adc/pac1934.c

544

FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) |

drivers/iio/adc/pac1934.c

545

FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) |

drivers/iio/adc/pac1934.c

546

FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) |

drivers/iio/adc/pac1934.c

547

FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) |

drivers/iio/adc/pac1934.c

548

FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) |

drivers/iio/adc/pac1934.c

549

FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]);

drivers/iio/adc/pac1934.c

927

ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, ret);

drivers/iio/adc/qcom-spmi-rradc.c

960

batt_id_delay = FIELD_PREP(BATT_ID_SETTLE_MASK, batt_id_delay);

drivers/iio/adc/rockchip_saradc.c

104

val = FIELD_PREP(SARADC2_EN_END_INT, 1);

drivers/iio/adc/rockchip_saradc.c

107

val = FIELD_PREP(SARADC2_START, 1) |

drivers/iio/adc/rockchip_saradc.c

108

FIELD_PREP(SARADC2_SINGLE_MODE, 1) |

drivers/iio/adc/rockchip_saradc.c

109

FIELD_PREP(SARADC2_CONV_CHANNELS, chn);

drivers/iio/adc/rohm-bd79124.c

411

regval = FIELD_PREP(BD79124_MSK_CONV_MODE, BD79124_CONV_MODE_AUTO);

drivers/iio/adc/rohm-bd79124.c

442

int regval = FIELD_PREP(BD79124_MSK_CONV_MODE,

drivers/iio/adc/rohm-bd79124.c

688

regval = FIELD_PREP(BD79124_MSK_CONV_MODE,

drivers/iio/adc/rohm-bd79124.c

981

regval = FIELD_PREP(BD79124_MSK_AUTO_INTERVAL, BD79124_INTERVAL_750_US);

drivers/iio/adc/rohm-bd79124.c

994

regval = FIELD_PREP(BD79124_MSK_CONV_MODE, BD79124_CONV_MODE_MANSEQ);

drivers/iio/adc/rzg2l_adc.c

406

reg |= FIELD_PREP(RZG2L_ADM3_ADCMP_MASK, hw_params->default_adcmp) |

drivers/iio/adc/rzg2l_adc.c

49

#define RZG2L_ADIVC_DIVADC_4 FIELD_PREP(RZG2L_ADIVC_DIVADC_MASK, 0x4)

drivers/iio/adc/rzn1-adc.c

150

FIELD_PREP(RZN1_ADC_VC_ADC1_CHANNEL_SEL_MASK, adc1_ch);

drivers/iio/adc/rzn1-adc.c

154

FIELD_PREP(RZN1_ADC_VC_ADC2_CHANNEL_SEL_MASK, adc2_ch);

drivers/iio/adc/sophgo-cv1800b-adc.c

201

writel(FIELD_PREP(CV1800B_MASK_STARTUP_CYCLE, 15) |

drivers/iio/adc/sophgo-cv1800b-adc.c

202

FIELD_PREP(CV1800B_MASK_SAMPLE_WINDOW, 15) |

drivers/iio/adc/sophgo-cv1800b-adc.c

203

FIELD_PREP(CV1800B_MASK_CLKDIV, 1) |

drivers/iio/adc/sophgo-cv1800b-adc.c

204

FIELD_PREP(CV1800B_MASK_COMPARE_CYCLE, 15),

drivers/iio/adc/spear_adc.c

161

status = FIELD_PREP(SPEAR_ADC_STATUS_CHANNEL_NUM_MASK, chan->channel) |

drivers/iio/adc/spear_adc.c

162

FIELD_PREP(SPEAR_ADC_STATUS_AVG_SAMPLE_MASK, st->avg_samples) |

drivers/iio/adc/stm32-adc-core.h

169

#define STM32H7_OVSR(v) FIELD_PREP(STM32H7_OVSR_MASK, v)

drivers/iio/adc/stm32-adc-core.h

171

#define STM32H7_OVSS(v) FIELD_PREP(STM32H7_OVSS_MASK, v)

drivers/iio/adc/stm32-adc-core.h

242

#define STM32MP13_OVSR(v) FIELD_PREP(STM32MP13_OVSR_MASK, v)

drivers/iio/adc/stm32-adc-core.h

244

#define STM32MP13_OVSS(v) FIELD_PREP(STM32MP13_OVSS_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

115

#define DFSDM_CR1_DFEN(v) FIELD_PREP(DFSDM_CR1_DFEN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

117

#define DFSDM_CR1_JSWSTART(v) FIELD_PREP(DFSDM_CR1_JSWSTART_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

119

#define DFSDM_CR1_JSYNC(v) FIELD_PREP(DFSDM_CR1_JSYNC_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

121

#define DFSDM_CR1_JSCAN(v) FIELD_PREP(DFSDM_CR1_JSCAN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

123

#define DFSDM_CR1_JDMAEN(v) FIELD_PREP(DFSDM_CR1_JDMAEN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

125

#define DFSDM_CR1_JEXTSEL(v) FIELD_PREP(DFSDM_CR1_JEXTSEL_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

127

#define DFSDM_CR1_JEXTEN(v) FIELD_PREP(DFSDM_CR1_JEXTEN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

129

#define DFSDM_CR1_RSWSTART(v) FIELD_PREP(DFSDM_CR1_RSWSTART_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

131

#define DFSDM_CR1_RCONT(v) FIELD_PREP(DFSDM_CR1_RCONT_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

133

#define DFSDM_CR1_RSYNC(v) FIELD_PREP(DFSDM_CR1_RSYNC_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

135

#define DFSDM_CR1_RDMAEN(v) FIELD_PREP(DFSDM_CR1_RDMAEN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

137

#define DFSDM_CR1_RCH(v) FIELD_PREP(DFSDM_CR1_RCH_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

139

#define DFSDM_CR1_FAST(v) FIELD_PREP(DFSDM_CR1_FAST_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

141

#define DFSDM_CR1_AWFSEL(v) FIELD_PREP(DFSDM_CR1_AWFSEL_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

145

#define DFSDM_CR2_IE(v) FIELD_PREP(DFSDM_CR2_IE_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

147

#define DFSDM_CR2_JEOCIE(v) FIELD_PREP(DFSDM_CR2_JEOCIE_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

149

#define DFSDM_CR2_REOCIE(v) FIELD_PREP(DFSDM_CR2_REOCIE_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

151

#define DFSDM_CR2_JOVRIE(v) FIELD_PREP(DFSDM_CR2_JOVRIE_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

153

#define DFSDM_CR2_ROVRIE(v) FIELD_PREP(DFSDM_CR2_ROVRIE_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

155

#define DFSDM_CR2_AWDIE(v) FIELD_PREP(DFSDM_CR2_AWDIE_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

157

#define DFSDM_CR2_SCDIE(v) FIELD_PREP(DFSDM_CR2_SCDIE_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

159

#define DFSDM_CR2_CKABIE(v) FIELD_PREP(DFSDM_CR2_CKABIE_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

161

#define DFSDM_CR2_EXCH(v) FIELD_PREP(DFSDM_CR2_EXCH_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

163

#define DFSDM_CR2_AWDCH(v) FIELD_PREP(DFSDM_CR2_AWDCH_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

167

#define DFSDM_ISR_JEOCF(v) FIELD_PREP(DFSDM_ISR_JEOCF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

169

#define DFSDM_ISR_REOCF(v) FIELD_PREP(DFSDM_ISR_REOCF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

171

#define DFSDM_ISR_JOVRF(v) FIELD_PREP(DFSDM_ISR_JOVRF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

173

#define DFSDM_ISR_ROVRF(v) FIELD_PREP(DFSDM_ISR_ROVRF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

175

#define DFSDM_ISR_AWDF(v) FIELD_PREP(DFSDM_ISR_AWDF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

177

#define DFSDM_ISR_JCIP(v) FIELD_PREP(DFSDM_ISR_JCIP_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

179

#define DFSDM_ISR_RCIP(v) FIELD_PREP(DFSDM_ISR_RCIP, v)

drivers/iio/adc/stm32-dfsdm.h

181

#define DFSDM_ISR_CKABF(v) FIELD_PREP(DFSDM_ISR_CKABF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

183

#define DFSDM_ISR_SCDF(v) FIELD_PREP(DFSDM_ISR_SCDF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

187

#define DFSDM_ICR_CLRJOVRF(v) FIELD_PREP(DFSDM_ICR_CLRJOVRF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

189

#define DFSDM_ICR_CLRROVRF(v) FIELD_PREP(DFSDM_ICR_CLRROVRF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

191

#define DFSDM_ICR_CLRCKABF(v) FIELD_PREP(DFSDM_ICR_CLRCKABF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

196

#define DFSDM_ICR_CLRSCDF(v) FIELD_PREP(DFSDM_ICR_CLRSCDF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

203

#define DFSDM_FCR_IOSR(v) FIELD_PREP(DFSDM_FCR_IOSR_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

205

#define DFSDM_FCR_FOSR(v) FIELD_PREP(DFSDM_FCR_FOSR_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

207

#define DFSDM_FCR_FORD(v) FIELD_PREP(DFSDM_FCR_FORD_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

216

#define DFSDM_AWLTR_BKAWL(v) FIELD_PREP(DFSDM_AWLTR_BKAWL_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

218

#define DFSDM_AWLTR_AWLT(v) FIELD_PREP(DFSDM_AWLTR_AWLT_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

222

#define DFSDM_AWHTR_BKAWH(v) FIELD_PREP(DFSDM_AWHTR_BKAWH_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

224

#define DFSDM_AWHTR_AWHT(v) FIELD_PREP(DFSDM_AWHTR_AWHT_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

228

#define DFSDM_AWSR_AWLTF(v) FIELD_PREP(DFSDM_AWSR_AWLTF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

230

#define DFSDM_AWSR_AWHTF(v) FIELD_PREP(DFSDM_AWSR_AWHTF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

234

#define DFSDM_AWCFR_AWLTF(v) FIELD_PREP(DFSDM_AWCFR_AWLTF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

236

#define DFSDM_AWCFR_AWHTF(v) FIELD_PREP(DFSDM_AWCFR_AWHTF_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

52

#define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

54

#define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

56

#define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

58

#define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

60

#define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

62

#define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

64

#define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

66

#define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

68

#define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

70

#define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

72

#define DFSDM_CHCFGR1_DFSDMEN(v) FIELD_PREP(DFSDM_CHCFGR1_DFSDMEN_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

76

#define DFSDM_CHCFGR2_DTRBS(v) FIELD_PREP(DFSDM_CHCFGR2_DTRBS_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

78

#define DFSDM_CHCFGR2_OFFSET(v) FIELD_PREP(DFSDM_CHCFGR2_OFFSET_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

82

#define DFSDM_AWSCDR_SCDT(v) FIELD_PREP(DFSDM_AWSCDR_SCDT_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

84

#define DFSDM_AWSCDR_BKSCD(v) FIELD_PREP(DFSDM_AWSCDR_BKSCD_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

86

#define DFSDM_AWSCDR_AWFOSR(v) FIELD_PREP(DFSDM_AWSCDR_AWFOSR_MASK, v)

drivers/iio/adc/stm32-dfsdm.h

88

#define DFSDM_AWSCDR_AWFORD(v) FIELD_PREP(DFSDM_AWSCDR_AWFORD_MASK, v)

drivers/iio/adc/sun20i-gpadc-iio.c

233

writel(FIELD_PREP(SUN20I_GPADC_CTRL_ADC_AUTOCALI_EN_MASK, 1) |

drivers/iio/adc/sun20i-gpadc-iio.c

234

FIELD_PREP(SUN20I_GPADC_CTRL_WORK_MODE_MASK, SUN20I_GPADC_WORK_MODE_SINGLE),

drivers/iio/adc/sun20i-gpadc-iio.c

87

ctrl |= FIELD_PREP(SUN20I_GPADC_CTRL_ADC_EN_MASK, 1);

drivers/iio/adc/ti-ads1018.c

273

cfg |= FIELD_PREP(ADS1018_CFG_MUX_MASK, chan->scan_index);

drivers/iio/adc/ti-ads1018.c

274

cfg |= FIELD_PREP(ADS1018_CFG_PGA_MASK, pga_mode);

drivers/iio/adc/ti-ads1018.c

275

cfg |= FIELD_PREP(ADS1018_CFG_MODE_MASK, ADS1018_MODE_ONESHOT);

drivers/iio/adc/ti-ads1018.c

276

cfg |= FIELD_PREP(ADS1018_CFG_DRATE_MASK, max_drate_mode);

drivers/iio/adc/ti-ads1018.c

499

cfg |= FIELD_PREP(ADS1018_CFG_MUX_MASK, addr);

drivers/iio/adc/ti-ads1018.c

500

cfg |= FIELD_PREP(ADS1018_CFG_PGA_MASK, pga);

drivers/iio/adc/ti-ads1018.c

501

cfg |= FIELD_PREP(ADS1018_CFG_MODE_MASK, ADS1018_MODE_CONTINUOUS);

drivers/iio/adc/ti-ads1018.c

502

cfg |= FIELD_PREP(ADS1018_CFG_DRATE_MASK, drate);

drivers/iio/adc/ti-ads1018.c

519

cfg |= FIELD_PREP(ADS1018_CFG_MODE_MASK, ADS1018_MODE_ONESHOT);

drivers/iio/adc/ti-ads1100.c

164

FIELD_PREP(ADS1100_DR_MASK, i));

drivers/iio/adc/ti-ads1119.c

172

FIELD_PREP(ADS1119_CONFIG_CM_FIELD, mode));

drivers/iio/adc/ti-ads1119.c

204

FIELD_PREP(ADS1119_CONFIG_MUX_FIELD, mux));

drivers/iio/adc/ti-ads1119.c

209

FIELD_PREP(ADS1119_CONFIG_GAIN_FIELD,

drivers/iio/adc/ti-ads1119.c

215

FIELD_PREP(ADS1119_CONFIG_DR_FIELD,

drivers/iio/adc/ti-ads1119.c

554

FIELD_PREP(ADS1119_CONFIG_VREF_FIELD,

drivers/iio/adc/ti-ads131e08.c

268

reg |= FIELD_PREP(ADS131E08_CFG1R_DR_MASK,

drivers/iio/adc/ti-ads131e08.c

315

reg |= FIELD_PREP(ADS131E08_CHR_GAIN_MASK, field_value);

drivers/iio/adc/ti-ads131e08.c

348

reg |= FIELD_PREP(ADS131E08_CHR_MUX_MASK, mux);

drivers/iio/adc/ti-ads131e08.c

363

reg |= FIELD_PREP(ADS131E08_CHR_PWD_MASK, value);

drivers/iio/adc/ti-ads131e08.c

378

reg |= FIELD_PREP(ADS131E08_CFG3R_PDB_REFBUF_MASK, 1);

drivers/iio/adc/ti-ads131e08.c

380

reg |= FIELD_PREP(ADS131E08_CFG3R_VREF_4V_MASK,

drivers/iio/adc/ti-ads131m02.c

84

FIELD_PREP(ADS131M_CMD_ADDR_MASK, a) | \

drivers/iio/adc/ti-ads131m02.c

85

FIELD_PREP(ADS131M_CMD_NUM_MASK, n))

drivers/iio/adc/ti-ads131m02.c

88

FIELD_PREP(ADS131M_CMD_ADDR_MASK, a) | \

drivers/iio/adc/ti-ads131m02.c

89

FIELD_PREP(ADS131M_CMD_NUM_MASK, n))

drivers/iio/adc/ti-ads7138.c

314

value |= FIELD_PREP(ADS7138_OPMODE_CFG_FREQ_MASK, bits);

drivers/iio/adc/ti-ads7138.c

390

values[0] |= FIELD_PREP(ADS7138_THRESHOLD_LSB_MASK, val);

drivers/iio/adc/ti-ads7138.c

407

values[0] |= FIELD_PREP(ADS7138_THRESHOLD_LSB_MASK, ret >> 4);

drivers/iio/adc/ti-ads7924.c

296

mode_field = FIELD_PREP(ADS7924_MODECNTRL_MODE_MASK,

drivers/iio/adc/ti-ads7924.c

309

mode_field = FIELD_PREP(ADS7924_MODECNTRL_MODE_MASK, mode);

drivers/iio/adc/ti-ads7924.c

420

FIELD_PREP(ADS7924_ACQTIME_MASK, 0));

drivers/iio/adc/ti-ads7924.c

428

FIELD_PREP(ADS7924_PWRUPTIME_MASK, 0));

drivers/iio/adc/ti-tsc2046.c

265

return TI_TSC2046_START | FIELD_PREP(TI_TSC2046_ADDR, ch_idx) | pd;

drivers/iio/adc/xilinx-ams.c

359

cfg = ~(FIELD_PREP(AMS_CONF1_ALARM_2_TO_0_MASK, val));

drivers/iio/adc/xilinx-ams.c

362

cfg &= ~(FIELD_PREP(AMS_CONF1_ALARM_6_TO_3_MASK, val));

drivers/iio/adc/xilinx-ams.c

367

cfg = ~(FIELD_PREP(AMS_CONF1_ALARM_12_TO_7_MASK, val));

drivers/iio/adc/xilinx-ams.c

380

cfg = ~(FIELD_PREP(AMS_CONF1_ALARM_2_TO_0_MASK, val));

drivers/iio/adc/xilinx-ams.c

383

cfg &= ~(FIELD_PREP(AMS_CONF1_ALARM_6_TO_3_MASK, val));

drivers/iio/adc/xilinx-ams.c

388

cfg = ~(FIELD_PREP(AMS_CONF1_ALARM_12_TO_7_MASK, val));

drivers/iio/adc/xilinx-ams.c

94

#define AMS_CONF1_SEQ_DEFAULT FIELD_PREP(AMS_CONF1_SEQ_MASK, 0)

drivers/iio/adc/xilinx-ams.c

95

#define AMS_CONF1_SEQ_CONTINUOUS FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)

drivers/iio/adc/xilinx-ams.c

96

#define AMS_CONF1_SEQ_SINGLE_CHANNEL FIELD_PREP(AMS_CONF1_SEQ_MASK, 3)

drivers/iio/addac/ad74115.c

1533

FIELD_PREP(AD74115_ADC_CONFIG_CONV2_RANGE_MASK, i));

drivers/iio/addac/ad74115.c

1639

FIELD_PREP(AD74115_OUTPUT_SLEW_EN_MASK,

drivers/iio/addac/ad74115.c

1662

FIELD_PREP(AD74115_DIN_SINK_MASK, val));

drivers/iio/addac/ad74115.c

1696

FIELD_PREP(AD74115_BURNOUT_EXT2_EN_MASK, 1));

drivers/iio/addac/ad74115.c

1708

FIELD_PREP(AD74115_BURNOUT_EXT1_EN_MASK, 1));

drivers/iio/addac/ad74115.c

1720

FIELD_PREP(AD74115_BURNOUT_VIOUT_EN_MASK, 1));

drivers/iio/addac/ad74115.c

490

FIELD_PREP(AD74115_GPIO_CONFIG_SELECT_MASK, cfg));

drivers/iio/addac/ad74115.c

553

FIELD_PREP(AD74115_GPIO_CONFIG_GPO_DATA,

drivers/iio/addac/ad74115.c

571

FIELD_PREP(AD74115_DIN_DEBOUNCE_MASK, val));

drivers/iio/addac/ad74115.c

655

FIELD_PREP(AD74115_ADC_CONV_SEQ_MASK, conv_seq));

drivers/iio/addac/ad74115.c

839

FIELD_PREP(AD74115_ADC_DATA_RDY_MASK, 1));

drivers/iio/addac/ad74115.c

902

FIELD_PREP(AD74115_COMP_THRESH_MASK, val));

drivers/iio/addac/ad74115.c

942

FIELD_PREP(AD74115_ADC_CONFIG_CONV1_RATE_MASK, i));

drivers/iio/addac/ad74115.c

946

FIELD_PREP(AD74115_ADC_CONFIG_CONV2_RATE_MASK, i));

drivers/iio/addac/ad74115.c

993

tmp = FIELD_PREP(AD74115_OUTPUT_SLEW_EN_MASK, en_val);

drivers/iio/addac/ad74115.c

994

tmp |= FIELD_PREP(AD74115_OUTPUT_SLEW_LIN_STEP_MASK, step_val);

drivers/iio/addac/ad74115.c

995

tmp |= FIELD_PREP(AD74115_OUTPUT_SLEW_LIN_RATE_MASK, rate_val);

drivers/iio/addac/ad74413r.c

276

FIELD_PREP(AD74413R_DIN_SINK_MASK, strength / 120));

drivers/iio/addac/ad74413r.c

492

FIELD_PREP(AD74413R_CONV_SEQ_MASK, status));

drivers/iio/addac/ad74413r.c

550

FIELD_PREP(AD74413R_ADC_CONFIG_REJECTION_MASK,

drivers/iio/amplifiers/ada4250.c

141

FIELD_PREP(ADA4250_RANGE_SET_MSK, range));

drivers/iio/amplifiers/ada4250.c

213

FIELD_PREP(ADA4250_GAIN_MUX_MSK, ilog2(val)));

drivers/iio/amplifiers/ada4250.c

225

FIELD_PREP(ADA4250_BIAS_SET_MSK, val));

drivers/iio/amplifiers/ada4250.c

309

FIELD_PREP(ADA4250_RESET_MSK, 1));

drivers/iio/amplifiers/ada4250.c

324

FIELD_PREP(ADA4250_REFBUF_MSK, st->refbuf_en));

drivers/iio/cdc/ad7150.c

219

timeout = FIELD_PREP(AD7150_CH_TIMEOUT_APPROACHING,

drivers/iio/cdc/ad7150.c

221

timeout |= FIELD_PREP(AD7150_CH_TIMEOUT_RECEDING,

drivers/iio/cdc/ad7150.c

288

cfg |= FIELD_PREP(AD7150_CFG_FIX, fixed) |

drivers/iio/cdc/ad7150.c

289

FIELD_PREP(AD7150_CFG_THRESHTYPE_MSK, thresh_type);

drivers/iio/cdc/ad7746.c

275

cap_setup = FIELD_PREP(AD7746_CAPSETUP_CIN2,

drivers/iio/cdc/ad7746.c

277

FIELD_PREP(AD7746_CAPSETUP_CAPDIFF,

drivers/iio/cdc/ad7746.c

279

FIELD_PREP(AD7746_CAPSETUP_CAPEN, 1);

drivers/iio/cdc/ad7746.c

292

vt_setup = FIELD_PREP(AD7746_VTSETUP_VTMD_MASK,

drivers/iio/cdc/ad7746.c

294

FIELD_PREP(AD7746_VTSETUP_VTEN, 1);

drivers/iio/cdc/ad7746.c

379

FIELD_PREP(AD7746_CONF_MODE_MASK,

drivers/iio/cdc/ad7746.c

395

FIELD_PREP(AD7746_CONF_MODE_MASK,

drivers/iio/cdc/ad7746.c

423

chip->config |= FIELD_PREP(AD7746_CONF_CAPFS_MASK, i);

drivers/iio/cdc/ad7746.c

441

chip->config |= FIELD_PREP(AD7746_CONF_VTFS_MASK, i);

drivers/iio/cdc/ad7746.c

519

FIELD_PREP(AD7746_CAPDAC_DACP_MASK, val) | AD7746_CAPDAC_DACEN : 0;

drivers/iio/cdc/ad7746.c

594

regval = chip->config | FIELD_PREP(AD7746_CONF_MODE_MASK,

drivers/iio/cdc/ad7746.c

767

regval |= FIELD_PREP(AD7746_EXCSETUP_EXCLVL_MASK, 0);

drivers/iio/cdc/ad7746.c

770

regval |= FIELD_PREP(AD7746_EXCSETUP_EXCLVL_MASK, 1);

drivers/iio/cdc/ad7746.c

773

regval |= FIELD_PREP(AD7746_EXCSETUP_EXCLVL_MASK, 2);

drivers/iio/cdc/ad7746.c

776

regval |= FIELD_PREP(AD7746_EXCSETUP_EXCLVL_MASK, 3);

drivers/iio/chemical/bme680_core.c

644

osrs = FIELD_PREP(BME680_OSRS_HUMIDITY_MASK,

drivers/iio/chemical/bme680_core.c

665

osrs = FIELD_PREP(BME680_OSRS_TEMP_MASK,

drivers/iio/chemical/bme680_core.c

667

FIELD_PREP(BME680_OSRS_PRESS_MASK,

drivers/iio/chemical/bme680_core.c

729

FIELD_PREP(BME680_RUN_GAS_MASK, 1) |

drivers/iio/chemical/bme680_core.c

730

FIELD_PREP(BME680_NB_CONV_MASK, 0));

drivers/iio/common/scmi_sensors/scmi_iio.c

114

sensor_config |= FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,

drivers/iio/common/scmi_sensors/scmi_iio.c

174

sensor_config |= FIELD_PREP(SCMI_SENS_CFG_UPDATE_SECS_MASK, sec);

drivers/iio/common/scmi_sensors/scmi_iio.c

176

sensor_config |= FIELD_PREP(SCMI_SENS_CFG_UPDATE_EXP_MASK, -mult);

drivers/iio/common/scmi_sensors/scmi_iio.c

180

sensor_config |= FIELD_PREP(SCMI_SENS_CFG_TSTAMP_ENABLED_MASK,

drivers/iio/common/scmi_sensors/scmi_iio.c

186

FIELD_PREP(SCMI_SENS_CFG_ROUND_MASK, SCMI_SENS_CFG_ROUND_AUTO);

drivers/iio/common/scmi_sensors/scmi_iio.c

293

sensor_config = FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,

drivers/iio/common/scmi_sensors/scmi_iio.c

314

sensor_config = FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,

drivers/iio/common/scmi_sensors/scmi_iio.c

93

sensor_config |= FIELD_PREP(SCMI_SENS_CFG_TSTAMP_ENABLED_MASK,

drivers/iio/common/scmi_sensors/scmi_iio.c

96

sensor_config |= FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,

drivers/iio/dac/ad3530r.c

392

val = FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(0), AD3530R_NORMAL_OP) |

drivers/iio/dac/ad3530r.c

393

FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(1), AD3530R_NORMAL_OP) |

drivers/iio/dac/ad3530r.c

394

FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(2), AD3530R_NORMAL_OP) |

drivers/iio/dac/ad3530r.c

395

FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(3), AD3530R_NORMAL_OP);

drivers/iio/dac/ad3552r-common.c

88

return FIELD_PREP(AD3552R_MASK_CH_RANGE_OVERRIDE, 1) |

drivers/iio/dac/ad3552r-common.c

89

FIELD_PREP(AD3552R_MASK_CH_GAIN_SCALING_P, p) |

drivers/iio/dac/ad3552r-common.c

90

FIELD_PREP(AD3552R_MASK_CH_GAIN_SCALING_N, n) |

drivers/iio/dac/ad3552r-common.c

91

FIELD_PREP(AD3552R_MASK_CH_OFFSET_BIT_8, abs(goffs)) |

drivers/iio/dac/ad3552r-common.c

92

FIELD_PREP(AD3552R_MASK_CH_OFFSET_POLARITY, goffs < 0);

drivers/iio/dac/ad3552r-hs.c

208

FIELD_PREP(AD3552R_MASK_MULTI_IO_MODE,

drivers/iio/dac/ad3552r-hs.c

318

FIELD_PREP(AD3552R_MASK_MULTI_IO_MODE,

drivers/iio/dac/ad3552r-hs.c

408

val = FIELD_PREP(AD3552R_MASK_CH0_RANGE, mode);

drivers/iio/dac/ad3552r-hs.c

410

val = FIELD_PREP(AD3552R_MASK_CH1_RANGE, mode);

drivers/iio/dac/ad3552r-hs.c

700

FIELD_PREP(AD3552R_MASK_SDO_DRIVE_STRENGTH, val);

drivers/iio/dac/ad3552r.c

204

val = FIELD_PREP(AD3552R_MASK_CH_DAC_POWERDOWN(0), !val);

drivers/iio/dac/ad3552r.c

206

val = FIELD_PREP(AD3552R_MASK_CH_DAC_POWERDOWN(1), !val);

drivers/iio/dac/ad3552r.c

421

FIELD_PREP(AD3552R_MASK_ADDR_ASCENSION, val));

drivers/iio/dac/ad3552r.c

478

FIELD_PREP(AD3552R_MASK_REFERENCE_VOLTAGE_SEL, val));

drivers/iio/dac/ad3552r.c

487

FIELD_PREP(AD3552R_MASK_SDO_DRIVE_STRENGTH, val));

drivers/iio/dac/ad3552r.c

515

val = FIELD_PREP(AD3552R_MASK_CH_OUTPUT_RANGE_SEL(0), val);

drivers/iio/dac/ad3552r.c

517

val = FIELD_PREP(AD3552R_MASK_CH_OUTPUT_RANGE_SEL(1), val);

drivers/iio/dac/ad3552r.c

541

val = FIELD_PREP(AD3552R_MASK_CH(0), 1);

drivers/iio/dac/ad3552r.c

543

val = FIELD_PREP(AD3552R_MASK_CH(1), 1);

drivers/iio/dac/ad3552r.c

560

val = FIELD_PREP(AD3552R_MASK_CH_AMPLIFIER_POWERDOWN(0), 1);

drivers/iio/dac/ad3552r.c

562

val = FIELD_PREP(AD3552R_MASK_CH_AMPLIFIER_POWERDOWN(1), 1);

drivers/iio/dac/ad5770r.c

45

#define ADI_SPI_IF_SINGLE_INS_SEL(x) FIELD_PREP(ADI_SPI_IF_SINGLE_INS_MSK, x)

drivers/iio/dac/ad5770r.c

47

#define ADI_SPI_IF_SHORT_INS_SEL(x) FIELD_PREP(ADI_SPI_IF_SINGLE_INS_MSK, x)

drivers/iio/dac/ad7293.c

24

#define AD7293_PAGE(x) FIELD_PREP(AD7293_PAGE_ADDR_MSK, x)

drivers/iio/dac/ad7293.c

357

FIELD_PREP(AD7293_REG_VOUT_OFFSET_MSK, offset));

drivers/iio/dac/ad7293.c

397

FIELD_PREP(AD7293_REG_DATA_RAW_MSK, raw));

drivers/iio/dac/ad8460.c

133

FIELD_PREP(AD8460_APG_MODE_ENABLE_MSK, val));

drivers/iio/dac/ad8460.c

139

FIELD_PREP(AD8460_WAVE_GEN_MODE_MSK, val));

drivers/iio/dac/ad8460.c

170

state->spi_tx_buf = cpu_to_le16(FIELD_PREP(AD8460_DATA_BYTE_FULL_MSK, val));

drivers/iio/dac/ad8460.c

238

FIELD_PREP(AD8460_PATTERN_DEPTH_MSK, sym));

drivers/iio/dac/ad8460.c

314

FIELD_PREP(AD8460_HVDAC_SLEEP_MSK, pwr_down));

drivers/iio/dac/ad8460.c

332

FIELD_PREP(AD8460_HV_SLEEP_MSK, !pwr_down));

drivers/iio/dac/ad8460.c

371

FIELD_PREP(AD8460_PATTERN_DEPTH_MSK, 0));

drivers/iio/dac/ad8460.c

380

FIELD_PREP(AD8460_FAULT_LIMIT_MSK, threshold));

drivers/iio/dac/ad8460.c

404

FIELD_PREP(AD8460_FAULT_ARM_MSK, en));

drivers/iio/dac/ad8460.c

440

FIELD_PREP(AD8460_QUIESCENT_CURRENT_MSK, val));

drivers/iio/dac/ad8460.c

878

FIELD_PREP(AD8460_FAULT_ARM_MSK, 1) |

drivers/iio/dac/ad8460.c

883

FIELD_PREP(AD8460_FAULT_ARM_MSK, 1) |

drivers/iio/dac/ad8460.c

892

FIELD_PREP(AD8460_FAULT_ARM_MSK, 1) |

drivers/iio/dac/ad8460.c

897

FIELD_PREP(AD8460_FAULT_ARM_MSK, 1) |

drivers/iio/dac/ad8460.c

906

FIELD_PREP(AD8460_FAULT_ARM_MSK, 1) |

drivers/iio/dac/ad9739a.c

245

FIELD_PREP(AD9739A_FINE_DEL_SKW_MASK, 2));

drivers/iio/dac/adi-axi-dac.c

371

raw = FIELD_PREP(AXI_DAC_CHAN_CNTRL_3_SCALE_SIGN, 1);

drivers/iio/dac/adi-axi-dac.c

424

FIELD_PREP(AXI_DAC_CHAN_CNTRL_2_PHASE, raw));

drivers/iio/dac/adi-axi-dac.c

686

FIELD_PREP(AXI_DAC_CUSTOM_CTRL_ADDRESS,

drivers/iio/dac/adi-axi-dac.c

719

ival = FIELD_PREP(AXI_DAC_CUSTOM_WR_DATA_16, val);

drivers/iio/dac/adi-axi-dac.c

721

ival = FIELD_PREP(AXI_DAC_CUSTOM_WR_DATA_8, val);

drivers/iio/dac/adi-axi-dac.c

738

FIELD_PREP(AXI_DAC_CUSTOM_CTRL_ADDRESS, reg));

drivers/iio/dac/adi-axi-dac.c

803

FIELD_PREP(AXI_DAC_CUSTOM_CTRL_MULTI_IO_MODE, mode));

drivers/iio/dac/ltc2688.c

209

code = FIELD_PREP(LTC2688_DITHER_RAW_MASK, code);

drivers/iio/dac/ltc2688.c

337

FIELD_PREP(LTC2688_CH_CALIBBIAS_MASK, val));

drivers/iio/dac/ltc2688.c

477

FIELD_PREP(LTC2688_CH_DIT_PER_MSK, freq));

drivers/iio/dac/ltc2688.c

554

FIELD_PREP(LTC2688_CH_DIT_PH_MSK, phase));

drivers/iio/dac/ltc2688.c

783

val |= FIELD_PREP(LTC2688_CH_SPAN_MSK, span);

drivers/iio/dac/ltc2688.c

803

val |= FIELD_PREP(LTC2688_CH_TD_SEL_MSK, clk_input + 1);

drivers/iio/dac/ltc2688.c

813

val |= FIELD_PREP(LTC2688_CH_MODE_MSK, 1);

drivers/iio/dac/max22007.c

213

reg_val = FIELD_PREP(MAX22007_DAC_DATA_MASK, data);

drivers/iio/dac/mcp4728.c

126

outbuf[0] = FIELD_PREP(MCP4728_CMD_MASK, MCP4728_SW_CMD);

drivers/iio/dac/mcp4728.c

132

outbuf[offset] = FIELD_PREP(MCP4728_VREF_MASK, ch->ref_mode);

drivers/iio/dac/mcp4728.c

137

outbuf[offset] |= FIELD_PREP(MCP4728_PDMODE_MASK,

drivers/iio/dac/mcp4728.c

141

outbuf[offset] |= FIELD_PREP(MCP4728_GAIN_MASK, ch->g_mode);

drivers/iio/dac/mcp4728.c

143

FIELD_PREP(MCP4728_DAC_H_MASK, ch->dac_value >> 8);

drivers/iio/dac/mcp4728.c

145

FIELD_PREP(MCP4728_DAC_L_MASK, ch->dac_value);

drivers/iio/dac/mcp4728.c

193

outbuf[0] = FIELD_PREP(MCP4728_CMD_MASK, MCP4728_MW_CMD);

drivers/iio/dac/mcp4728.c

194

outbuf[0] |= FIELD_PREP(MCP4728_CHSEL_MASK, channel);

drivers/iio/dac/mcp4728.c

195

outbuf[0] |= FIELD_PREP(MCP4728_UDAC_MASK, 0);

drivers/iio/dac/mcp4728.c

197

outbuf[1] = FIELD_PREP(MCP4728_VREF_MASK, ch->ref_mode);

drivers/iio/dac/mcp4728.c

200

outbuf[1] |= FIELD_PREP(MCP4728_PDMODE_MASK, ch->pd_mode + 1);

drivers/iio/dac/mcp4728.c

202

outbuf[1] |= FIELD_PREP(MCP4728_GAIN_MASK, ch->g_mode);

drivers/iio/dac/mcp4728.c

203

outbuf[1] |= FIELD_PREP(MCP4728_DAC_H_MASK, ch->dac_value >> 8);

drivers/iio/dac/mcp4728.c

204

outbuf[2] = FIELD_PREP(MCP4728_DAC_L_MASK, ch->dac_value);

drivers/iio/filter/admv8818.c

196

FIELD_PREP(ADMV8818_SW_IN_SET_WR0_MSK, 1) |

drivers/iio/filter/admv8818.c

197

FIELD_PREP(ADMV8818_SW_IN_WR0_MSK, hpf_band));

drivers/iio/filter/admv8818.c

203

FIELD_PREP(ADMV8818_HPF_WR0_MSK, hpf_state));

drivers/iio/filter/admv8818.c

272

FIELD_PREP(ADMV8818_SW_OUT_SET_WR0_MSK, 1) |

drivers/iio/filter/admv8818.c

273

FIELD_PREP(ADMV8818_SW_OUT_WR0_MSK, lpf_band));

drivers/iio/filter/admv8818.c

279

FIELD_PREP(ADMV8818_LPF_WR0_MSK, lpf_state));

drivers/iio/filter/admv8818.c

495

FIELD_PREP(ADMV8818_SW_IN_SET_WR0_MSK, 1) |

drivers/iio/filter/admv8818.c

496

FIELD_PREP(ADMV8818_SW_IN_WR0_MSK, 0) |

drivers/iio/filter/admv8818.c

497

FIELD_PREP(ADMV8818_SW_OUT_SET_WR0_MSK, 1) |

drivers/iio/filter/admv8818.c

498

FIELD_PREP(ADMV8818_SW_OUT_WR0_MSK, 0));

drivers/iio/filter/admv8818.c

505

FIELD_PREP(ADMV8818_HPF_WR0_MSK, 0) |

drivers/iio/filter/admv8818.c

506

FIELD_PREP(ADMV8818_LPF_WR0_MSK, 0));

drivers/iio/filter/admv8818.c

690

FIELD_PREP(ADMV8818_SINGLE_INSTRUCTION_MSK, 1));

drivers/iio/frequency/adf4371.c

26

#define ADF4371_ADDR_ASC(x) FIELD_PREP(ADF4371_ADDR_ASC_MSK, x)

drivers/iio/frequency/adf4371.c

28

#define ADF4371_ADDR_ASC_R(x) FIELD_PREP(ADF4371_ADDR_ASC_R_MSK, x)

drivers/iio/frequency/adf4371.c

33

#define ADF4371_FRAC2WORD_L(x) FIELD_PREP(ADF4371_FRAC2WORD_L_MSK, x)

drivers/iio/frequency/adf4371.c

35

#define ADF4371_FRAC1WORD(x) FIELD_PREP(ADF4371_FRAC1WORD_MSK, x)

drivers/iio/frequency/adf4371.c

39

#define ADF4371_FRAC2WORD_H(x) FIELD_PREP(ADF4371_FRAC2WORD_H_MSK, x)

drivers/iio/frequency/adf4371.c

43

#define ADF4371_MOD2WORD(x) FIELD_PREP(ADF4371_MOD2WORD_MSK, x)

drivers/iio/frequency/adf4371.c

47

#define ADF4371_REFIN_MODE(x) FIELD_PREP(ADF4371_REFIN_MODE_MASK, x)

drivers/iio/frequency/adf4371.c

49

#define ADF4371_REF_DOUB(x) FIELD_PREP(ADF4371_REF_DOUB_MASK, x)\

drivers/iio/frequency/adf4371.c

53

#define ADF4371_RF_DIV_SEL(x) FIELD_PREP(ADF4371_RF_DIV_SEL_MSK, x)

drivers/iio/frequency/adf4371.c

57

#define ADF4371_MUTE_LD(x) FIELD_PREP(ADF4371_MUTE_LD_MSK, x)

drivers/iio/frequency/adf4371.c

61

#define ADF4371_TIMEOUT(x) FIELD_PREP(ADF4371_TIMEOUT_MSK, x)

drivers/iio/frequency/adf4371.c

65

#define ADF4371_VCO_ALC_TOUT(x) FIELD_PREP(ADF4371_VCO_ALC_TOUT_MSK, x)

drivers/iio/frequency/adf4377.c

505

FIELD_PREP(ADF4377_0000_SOFT_RESET_MSK, 1) |

drivers/iio/frequency/adf4377.c

506

FIELD_PREP(ADF4377_0000_SOFT_RESET_R_MSK, 1));

drivers/iio/frequency/adf4377.c

557

FIELD_PREP(ADF4377_001C_EN_DNCLK_MSK, 1) |

drivers/iio/frequency/adf4377.c

558

FIELD_PREP(ADF4377_001C_EN_DRCLK_MSK, 1));

drivers/iio/frequency/adf4377.c

564

FIELD_PREP(ADF4377_0011_EN_AUTOCAL_MSK, 1) |

drivers/iio/frequency/adf4377.c

565

FIELD_PREP(ADF4377_0011_DCLK_DIV2_MSK, st->dclk_div2));

drivers/iio/frequency/adf4377.c

572

FIELD_PREP(ADF4377_002E_EN_ADC_CNV_MSK, 1) |

drivers/iio/frequency/adf4377.c

573

FIELD_PREP(ADF4377_002E_EN_ADC_MSK, 1) |

drivers/iio/frequency/adf4377.c

574

FIELD_PREP(ADF4377_002E_ADC_A_CONV_MSK,

drivers/iio/frequency/adf4377.c

580

FIELD_PREP(ADF4377_0020_EN_ADC_CLK_MSK, 1));

drivers/iio/frequency/adf4377.c

585

FIELD_PREP(ADF4377_002F_DCLK_DIV1_MSK, st->dclk_div1));

drivers/iio/frequency/adf4377.c

590

FIELD_PREP(ADF4377_0024_DCLK_MODE_MSK, st->dclk_mode));

drivers/iio/frequency/adf4377.c

595

FIELD_PREP(ADF4377_0027_SYNTH_LOCK_TO_LSB_MSK,

drivers/iio/frequency/adf4377.c

601

FIELD_PREP(ADF4377_0028_SYNTH_LOCK_TO_MSB_MSK,

drivers/iio/frequency/adf4377.c

607

FIELD_PREP(ADF4377_0029_VCO_ALC_TO_LSB_MSK,

drivers/iio/frequency/adf4377.c

613

FIELD_PREP(ADF4377_002A_VCO_ALC_TO_MSB_MSK,

drivers/iio/frequency/adf4377.c

619

FIELD_PREP(ADF4377_0026_VCO_BAND_DIV_MSK, st->vco_band_div));

drivers/iio/frequency/adf4377.c

624

FIELD_PREP(ADF4377_002D_ADC_CLK_DIV_MSK, st->adc_clk_div));

drivers/iio/frequency/adf4377.c

641

FIELD_PREP(ADF4377_0011_EN_RDBLR_MSK, 0) |

drivers/iio/frequency/adf4377.c

642

FIELD_PREP(ADF4377_0011_N_INT_MSB_MSK, st->n_int >> 8));

drivers/iio/frequency/adf4377.c

648

FIELD_PREP(ADF4377_0012_CLKOUT_DIV_MSK, st->clkout_div_sel) |

drivers/iio/frequency/adf4377.c

649

FIELD_PREP(ADF4377_0012_R_DIV_MSK, st->ref_div_factor));

drivers/iio/frequency/adf4377.c

654

FIELD_PREP(ADF4377_0010_N_INT_LSB_MSK, st->n_int));

drivers/iio/frequency/adf4377.c

666

FIELD_PREP(ADF4377_001C_EN_DNCLK_MSK, 0) |

drivers/iio/frequency/adf4377.c

667

FIELD_PREP(ADF4377_001C_EN_DRCLK_MSK, 0));

drivers/iio/frequency/adf4377.c

673

FIELD_PREP(ADF4377_0020_EN_ADC_CLK_MSK, 0));

drivers/iio/frequency/adf4377.c

680

FIELD_PREP(ADF4377_0019_CLKOUT1_OP_MSK,

drivers/iio/frequency/adf4377.c

682

FIELD_PREP(ADF4377_0019_CLKOUT2_OP_MSK,

drivers/iio/frequency/adf4377.c

729

FIELD_PREP(ADF4377_0000_SDO_ACTIVE_MSK,

drivers/iio/frequency/adf4377.c

731

FIELD_PREP(ADF4377_0000_SDO_ACTIVE_R_MSK,

drivers/iio/frequency/adf4377.c

742

FIELD_PREP(ADF4377_001A_PD_ALL_MSK, 0) |

drivers/iio/frequency/adf4377.c

743

FIELD_PREP(ADF4377_001A_PD_RDIV_MSK, 0) |

drivers/iio/frequency/adf4377.c

744

FIELD_PREP(ADF4377_001A_PD_NDIV_MSK, 0) |

drivers/iio/frequency/adf4377.c

745

FIELD_PREP(ADF4377_001A_PD_VCO_MSK, 0) |

drivers/iio/frequency/adf4377.c

746

FIELD_PREP(ADF4377_001A_PD_LD_MSK, 0) |

drivers/iio/frequency/adf4377.c

747

FIELD_PREP(ADF4377_001A_PD_PFDCP_MSK, 0) |

drivers/iio/frequency/adf4377.c

748

FIELD_PREP(ADF4377_001A_PD_CLKOUT1_MSK, 0) |

drivers/iio/frequency/adf4377.c

749

FIELD_PREP(ADF4377_001A_PD_CLKOUT2_MSK, 0));

drivers/iio/frequency/adf4377.c

758

FIELD_PREP(ADF4377_001D_MUXOUT_MSK, st->muxout_select));

drivers/iio/frequency/adf4377.c

968

FIELD_PREP(ADF4377_001A_PD_CLKOUT1_MSK, 0) |

drivers/iio/frequency/adf4377.c

969

FIELD_PREP(ADF4377_001A_PD_CLKOUT2_MSK, 0));

drivers/iio/frequency/adf4377.c

978

FIELD_PREP(ADF4377_001A_PD_CLKOUT1_MSK, 1) |

drivers/iio/frequency/adf4377.c

979

FIELD_PREP(ADF4377_001A_PD_CLKOUT2_MSK, 1));

drivers/iio/frequency/admv1013.c

111

st->data[0] = ADMV1013_READ | FIELD_PREP(ADMV1013_REG_ADDR_READ_MSK, reg);

drivers/iio/frequency/admv1013.c

144

put_unaligned_be24(FIELD_PREP(ADMV1013_REG_DATA_MSK, val) |

drivers/iio/frequency/admv1013.c

145

FIELD_PREP(ADMV1013_REG_ADDR_WRITE_MSK, reg), &st->data[0]);

drivers/iio/frequency/admv1013.c

247

data = FIELD_PREP(ADMV1013_MIXER_OFF_ADJ_P_MSK, val);

drivers/iio/frequency/admv1013.c

250

data = FIELD_PREP(ADMV1013_MIXER_OFF_ADJ_N_MSK, val);

drivers/iio/frequency/admv1013.c

301

data = FIELD_PREP(ADMV1013_LOAMP_PH_ADJ_FINE_MSK, data);

drivers/iio/frequency/admv1013.c

341

FIELD_PREP(ADMV1013_QUAD_FILTERS_MSK, filt_raw));

drivers/iio/frequency/admv1013.c

357

FIELD_PREP(ADMV1013_MIXER_VGATE_MSK, mixer_vgate));

drivers/iio/frequency/admv1013.c

449

FIELD_PREP(ADMV1013_SPI_SOFT_RESET_MSK, 1));

drivers/iio/frequency/admv1013.c

455

FIELD_PREP(ADMV1013_SPI_SOFT_RESET_MSK, 0));

drivers/iio/frequency/admv1013.c

473

data = FIELD_PREP(ADMV1013_QUAD_SE_MODE_MSK, st->quad_se_mode);

drivers/iio/frequency/admv1013.c

507

enable_reg = FIELD_PREP(ADMV1013_VGA_PD_MSK, 1) |

drivers/iio/frequency/admv1013.c

508

FIELD_PREP(ADMV1013_MIXER_PD_MSK, 1) |

drivers/iio/frequency/admv1013.c

509

FIELD_PREP(ADMV1013_QUAD_PD_MSK, 7) |

drivers/iio/frequency/admv1013.c

510

FIELD_PREP(ADMV1013_BG_PD_MSK, 1) |

drivers/iio/frequency/admv1013.c

511

FIELD_PREP(ADMV1013_MIXER_IF_EN_MSK, 0) |

drivers/iio/frequency/admv1013.c

512

FIELD_PREP(ADMV1013_DET_EN_MSK, 0);

drivers/iio/frequency/admv1014.c

142

st->data[0] = ADMV1014_READ | FIELD_PREP(ADMV1014_REG_ADDR_READ_MSK, reg);

drivers/iio/frequency/admv1014.c

175

put_unaligned_be24(FIELD_PREP(ADMV1014_REG_DATA_MSK, val) |

drivers/iio/frequency/admv1014.c

176

FIELD_PREP(ADMV1014_REG_ADDR_WRITE_MSK, reg), &st->data[0]);

drivers/iio/frequency/admv1014.c

236

FIELD_PREP(ADMV1014_QUAD_FILTERS_MSK, filt_raw));

drivers/iio/frequency/admv1014.c

252

FIELD_PREP(ADMV1014_MIXER_VGATE_MSK,

drivers/iio/frequency/admv1014.c

258

bb_sw_hl_cm = FIELD_PREP(ADMV1014_BB_SWITCH_HIGH_LOW_CM_MSK, bb_sw_hl_cm);

drivers/iio/frequency/admv1014.c

263

FIELD_PREP(ADMV1014_BB_AMP_REF_GEN_MSK, i) |

drivers/iio/frequency/admv1014.c

332

data = FIELD_PREP(ADMV1014_BB_AMP_OFFSET_I_MSK, val);

drivers/iio/frequency/admv1014.c

335

data = FIELD_PREP(ADMV1014_BB_AMP_OFFSET_Q_MSK, val);

drivers/iio/frequency/admv1014.c

342

data = FIELD_PREP(ADMV1014_LOAMP_PH_ADJ_I_FINE_MSK, val);

drivers/iio/frequency/admv1014.c

345

data = FIELD_PREP(ADMV1014_LOAMP_PH_ADJ_Q_FINE_MSK, val);

drivers/iio/frequency/admv1014.c

352

FIELD_PREP(ADMV1014_DET_PROG_MSK, val));

drivers/iio/frequency/admv1014.c

356

FIELD_PREP(ADMV1014_BB_AMP_GAIN_CTRL_MSK, val));

drivers/iio/frequency/admv1014.c

422

data = FIELD_PREP(ADMV1014_IF_AMP_COARSE_GAIN_I_MSK, data);

drivers/iio/frequency/admv1014.c

426

data = FIELD_PREP(ADMV1014_IF_AMP_COARSE_GAIN_Q_MSK, data);

drivers/iio/frequency/admv1014.c

434

data = FIELD_PREP(ADMV1014_IF_AMP_FINE_GAIN_I_MSK, data);

drivers/iio/frequency/admv1014.c

437

data = FIELD_PREP(ADMV1014_IF_AMP_FINE_GAIN_Q_MSK, data);

drivers/iio/frequency/admv1014.c

598

enable_reg = FIELD_PREP(ADMV1014_IBIAS_PD_MSK, 1) |

drivers/iio/frequency/admv1014.c

599

FIELD_PREP(ADMV1014_IF_AMP_PD_MSK, 1) |

drivers/iio/frequency/admv1014.c

600

FIELD_PREP(ADMV1014_QUAD_BG_PD_MSK, 1) |

drivers/iio/frequency/admv1014.c

601

FIELD_PREP(ADMV1014_BB_AMP_PD_MSK, 1) |

drivers/iio/frequency/admv1014.c

602

FIELD_PREP(ADMV1014_QUAD_IBIAS_PD_MSK, 1) |

drivers/iio/frequency/admv1014.c

603

FIELD_PREP(ADMV1014_BG_PD_MSK, 1);

drivers/iio/frequency/admv1014.c

645

FIELD_PREP(ADMV1014_SPI_SOFT_RESET_MSK, 1));

drivers/iio/frequency/admv1014.c

653

FIELD_PREP(ADMV1014_SPI_SOFT_RESET_MSK, 0));

drivers/iio/frequency/admv1014.c

677

FIELD_PREP(ADMV1014_QUAD_SE_MODE_MSK,

drivers/iio/frequency/admv1014.c

701

enable_reg = FIELD_PREP(ADMV1014_P1DB_COMPENSATION_MSK, st->p1db_comp ? 3 : 0) |

drivers/iio/frequency/admv1014.c

702

FIELD_PREP(ADMV1014_IF_AMP_PD_MSK,

drivers/iio/frequency/admv1014.c

704

FIELD_PREP(ADMV1014_BB_AMP_PD_MSK,

drivers/iio/frequency/admv1014.c

706

FIELD_PREP(ADMV1014_DET_EN_MSK, st->det_en);

drivers/iio/frequency/admv4420.c

325

FIELD_PREP(ADMV4420_REFERENCE_MODE_MASK, st->ref_block.ref_single_ended) |

drivers/iio/frequency/admv4420.c

326

FIELD_PREP(ADMV4420_REFERENCE_DOUBLER_MASK, st->ref_block.doubler_en));

drivers/iio/frequency/adrf6780.c

185

FIELD_PREP(ADRF6780_ADC_EN_MSK, 1) |

drivers/iio/frequency/adrf6780.c

186

FIELD_PREP(ADRF6780_ADC_CLOCK_EN_MSK, 1) |

drivers/iio/frequency/adrf6780.c

187

FIELD_PREP(ADRF6780_ADC_START_MSK, 1));

drivers/iio/frequency/adrf6780.c

205

FIELD_PREP(ADRF6780_ADC_START_MSK, 0));

drivers/iio/frequency/adrf6780.c

280

FIELD_PREP(ADRF6780_I_PATH_PHASE_ACCURACY_MSK, val));

drivers/iio/frequency/adrf6780.c

285

FIELD_PREP(ADRF6780_Q_PATH_PHASE_ACCURACY_MSK, val));

drivers/iio/frequency/adrf6780.c

353

FIELD_PREP(ADRF6780_SOFT_RESET_MSK, 1));

drivers/iio/frequency/adrf6780.c

361

FIELD_PREP(ADRF6780_SOFT_RESET_MSK, 0));

drivers/iio/frequency/adrf6780.c

401

enable_reg = FIELD_PREP(ADRF6780_VGA_BUFFER_EN_MSK, st->vga_buff_en) |

drivers/iio/frequency/adrf6780.c

402

FIELD_PREP(ADRF6780_DETECTOR_EN_MSK, 1) |

drivers/iio/frequency/adrf6780.c

403

FIELD_PREP(ADRF6780_LO_BUFFER_EN_MSK, st->lo_buff_en) |

drivers/iio/frequency/adrf6780.c

404

FIELD_PREP(ADRF6780_IF_MODE_EN_MSK, st->if_mode_en) |

drivers/iio/frequency/adrf6780.c

405

FIELD_PREP(ADRF6780_IQ_MODE_EN_MSK, st->iq_mode_en) |

drivers/iio/frequency/adrf6780.c

406

FIELD_PREP(ADRF6780_LO_X2_EN_MSK, st->lo_x2_en) |

drivers/iio/frequency/adrf6780.c

407

FIELD_PREP(ADRF6780_LO_PPF_EN_MSK, st->lo_ppf_en) |

drivers/iio/frequency/adrf6780.c

408

FIELD_PREP(ADRF6780_LO_EN_MSK, st->lo_en) |

drivers/iio/frequency/adrf6780.c

409

FIELD_PREP(ADRF6780_UC_BIAS_EN_MSK, st->uc_bias_en);

drivers/iio/frequency/adrf6780.c

418

FIELD_PREP(ADRF6780_LO_SIDEBAND_MSK, st->lo_sideband));

drivers/iio/frequency/adrf6780.c

424

FIELD_PREP(ADRF6780_VDET_OUTPUT_SELECT_MSK, st->vdet_out_en));

drivers/iio/gyro/adxrs290.c

45

#define ADXRS290_SYNC(x) FIELD_PREP(ADXRS290_SYNC_MASK, x)

drivers/iio/gyro/adxrs290.c

47

#define ADXRS290_LPF(x) FIELD_PREP(ADXRS290_LPF_MASK, x)

drivers/iio/gyro/adxrs290.c

49

#define ADXRS290_HPF(x) FIELD_PREP(ADXRS290_HPF_MASK, x)

drivers/iio/health/max30100.c

353

FIELD_PREP(MAX30100_REG_SPO2_CONFIG_PW_MASK, pulse_width));

drivers/iio/humidity/hdc3020.c

427

thresh = FIELD_PREP(HDC3020_THRESH_TEMP_MASK, temp);

drivers/iio/humidity/hdc3020.c

446

thresh = FIELD_PREP(HDC3020_THRESH_HUM_MASK, hum);

drivers/iio/humidity/hts221_buffer.c

103

FIELD_PREP(HTS221_REG_DRDY_HL_MASK,

drivers/iio/humidity/hts221_buffer.c

116

FIELD_PREP(HTS221_REG_DRDY_PP_OD_MASK,

drivers/iio/humidity/hts221_buffer.c

46

FIELD_PREP(HTS221_REG_DRDY_EN_MASK, state));

drivers/iio/humidity/hts221_core.c

160

FIELD_PREP(HTS221_ODR_MASK,

drivers/iio/humidity/hts221_core.c

250

FIELD_PREP(HTS221_ENABLE_MASK, enable));

drivers/iio/humidity/hts221_core.c

601

FIELD_PREP(HTS221_BDU_MASK, 1));

drivers/iio/humidity/hts221_core.c

660

FIELD_PREP(HTS221_ENABLE_MASK, false));

drivers/iio/humidity/hts221_core.c

672

FIELD_PREP(HTS221_ENABLE_MASK,

drivers/iio/imu/adis16475.c

1468

en = FIELD_PREP(ADIS16500_BURST_DATA_SEL_MASK, 0);

drivers/iio/imu/adis16475.c

1470

en = FIELD_PREP(ADIS16500_BURST_DATA_SEL_MASK, 1);

drivers/iio/imu/adis16475.c

49

#define ADIS16475_FILT_CTRL(x) FIELD_PREP(ADIS16475_FILT_CTRL_MASK, x)

drivers/iio/imu/adis16475.c

53

FIELD_PREP(ADIS16475_MSG_CTRL_DR_POL_MASK, x)

drivers/iio/imu/adis16475.c

55

#define ADIS16475_SYNC_MODE(x) FIELD_PREP(ADIS16475_SYNC_MODE_MASK, x)

drivers/iio/imu/adis16475.c

57

#define ADIS16575_SYNC_4KHZ(x) FIELD_PREP(ADIS16575_SYNC_4KHZ_MASK, x)

drivers/iio/imu/adis16475.c

69

#define ADIS16500_BURST32(x) FIELD_PREP(ADIS16500_BURST32_MASK, x)

drivers/iio/imu/adis16475.c

85

#define ADIS16575_WM_LVL(x) FIELD_PREP(ADIS16575_WM_LVL_MASK, x)

drivers/iio/imu/adis16475.c

87

#define ADIS16575_WM_POL(x) FIELD_PREP(ADIS16575_WM_POL_MASK, x)

drivers/iio/imu/adis16475.c

89

#define ADIS16575_WM_EN(x) FIELD_PREP(ADIS16575_WM_EN_MASK, x)

drivers/iio/imu/adis16475.c

91

#define ADIS16575_STOP_ENQUEUE FIELD_PREP(ADIS16575_OVERFLOW_MASK, 0)

drivers/iio/imu/adis16475.c

92

#define ADIS16575_OVERWRITE_OLDEST FIELD_PREP(ADIS16575_OVERFLOW_MASK, 1)

drivers/iio/imu/adis16475.c

94

#define ADIS16575_FIFO_EN(x) FIELD_PREP(ADIS16575_FIFO_EN_MASK, x)

drivers/iio/imu/adis16480.c

124

#define ADIS16480_DRDY_SEL(x) FIELD_PREP(ADIS16480_DRDY_SEL_MSK, x)

drivers/iio/imu/adis16480.c

126

#define ADIS16480_DRDY_POL(x) FIELD_PREP(ADIS16480_DRDY_POL_MSK, x)

drivers/iio/imu/adis16480.c

128

#define ADIS16480_DRDY_EN(x) FIELD_PREP(ADIS16480_DRDY_EN_MSK, x)

drivers/iio/imu/adis16480.c

130

#define ADIS16480_SYNC_SEL(x) FIELD_PREP(ADIS16480_SYNC_SEL_MSK, x)

drivers/iio/imu/adis16480.c

132

#define ADIS16480_SYNC_EN(x) FIELD_PREP(ADIS16480_SYNC_EN_MSK, x)

drivers/iio/imu/adis16480.c

134

#define ADIS16480_SYNC_MODE(x) FIELD_PREP(ADIS16480_SYNC_MODE_MSK, x)

drivers/iio/imu/adis16480.c

1510

en = FIELD_PREP(ADIS16545_BURST_DATA_SEL_MASK, 0);

drivers/iio/imu/adis16480.c

1513

en = FIELD_PREP(ADIS16545_BURST_DATA_SEL_MASK, 1);

drivers/iio/imu/adis16550.c

181

__din = FIELD_PREP(ADIS16550_SPI_REG_MASK, reg);

drivers/iio/imu/adis16550.c

184

__din |= FIELD_PREP(ADIS16550_SPI_R_W_MASK, 1);

drivers/iio/imu/adis16550.c

185

__din |= FIELD_PREP(ADIS16550_SPI_DATA_MASK, data);

drivers/iio/imu/adis16550.c

189

__din |= FIELD_PREP(ADIS16550_SPI_CRC_MASK, crc);

drivers/iio/imu/adis16550.c

512

u16 val = FIELD_PREP(ADIS16550_ACCL_FIR_EN_MASK, en);

drivers/iio/imu/adis16550.c

538

u16 val = FIELD_PREP(ADIS16550_GYRO_FIR_EN_MASK, en);

drivers/iio/imu/adis16550.c

963

mode = FIELD_PREP(ADIS16550_SYNC_MODE_MASK, sync_mode_data->sync_mode) |

drivers/iio/imu/adis16550.c

964

FIELD_PREP(ADIS16550_SYNC_EN_MASK, true);

drivers/iio/imu/bmi270/bmi270_core.c

1140

regval = FIELD_PREP(BMI270_STEP_SC26_WTRMRK_MSK, raw);

drivers/iio/imu/bmi270/bmi270_core.c

1161

regval = FIELD_PREP(BMI270_FEAT_MOTION_THRESHOLD_MSK, raw);

drivers/iio/imu/bmi270/bmi270_core.c

1170

regval = FIELD_PREP(BMI270_FEAT_MOTION_DURATION_MSK, raw);

drivers/iio/imu/bmi270/bmi270_core.c

1348

FIELD_PREP(BMI270_INT_LATCH_REG_MSK, latch));

drivers/iio/imu/bmi270/bmi270_core.c

1363

field_value = FIELD_PREP(BMI270_INT_IO_CTRL_LVL_MSK, active_high) |

drivers/iio/imu/bmi270/bmi270_core.c

1364

FIELD_PREP(BMI270_INT_IO_CTRL_OD_MSK, open_drain) |

drivers/iio/imu/bmi270/bmi270_core.c

1365

FIELD_PREP(BMI270_INT_IO_CTRL_OP_MSK, 1);

drivers/iio/imu/bmi270/bmi270_core.c

1447

FIELD_PREP(BMI270_FEAT_MOTION_XYZ_EN_MSK, 0));

drivers/iio/imu/bmi270/bmi270_core.c

1560

FIELD_PREP(BMI270_ACC_CONF_ODR_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

1562

FIELD_PREP(BMI270_ACC_CONF_BWP_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

1568

FIELD_PREP(BMI270_GYR_CONF_ODR_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

1570

FIELD_PREP(BMI270_GYR_CONF_BWP_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

440

FIELD_PREP(BMI270_STEP_SC26_EN_CNT_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

489

FIELD_PREP(BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

540

axis_field_val = FIELD_PREP(BMI270_FEAT_MOTION_X_EN_MSK, state);

drivers/iio/imu/bmi270/bmi270_core.c

546

axis_field_val = FIELD_PREP(BMI270_FEAT_MOTION_Y_EN_MSK, state);

drivers/iio/imu/bmi270/bmi270_core.c

552

axis_field_val = FIELD_PREP(BMI270_FEAT_MOTION_Z_EN_MSK, state);

drivers/iio/imu/bmi270/bmi270_core.c

567

FIELD_PREP(BMI270_FEAT_MOTION_ENABLE_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

574

FIELD_PREP(BMI270_INT_MAP_FEAT_ANYMOTION_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

590

FIELD_PREP(BMI270_FEAT_MOTION_XYZ_EN_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

597

FIELD_PREP(BMI270_FEAT_MOTION_ENABLE_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

604

FIELD_PREP(BMI270_INT_MAP_FEAT_NOMOTION_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

817

FIELD_PREP(BMI270_INT_MAP_DATA_DRDY_INT1_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

823

FIELD_PREP(BMI270_INT_MAP_DATA_DRDY_INT2_MSK,

drivers/iio/imu/bmi270/bmi270_core.c

961

FIELD_PREP(BMI270_STEP_SC26_RST_CNT_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

1151

FIELD_PREP(BMI323_FIFO_WTRMRK_MSK, 0));

drivers/iio/imu/bmi323/bmi323_core.c

1187

FIELD_PREP(BMI323_FIFO_CONF_ACC_GYR_EN_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

1194

FIELD_PREP(BMI323_FIFO_WTRMRK_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

1375

FIELD_PREP(BMI323_GYR_DRDY_MSK, irq_pin));

drivers/iio/imu/bmi323/bmi323_core.c

1381

FIELD_PREP(BMI323_ACC_DRDY_MSK, irq_pin));

drivers/iio/imu/bmi323/bmi323_core.c

1463

FIELD_PREP(BMI323_ACC_GYRO_CONF_AVG_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

1500

FIELD_PREP(BMI323_FEAT_IO0_STP_CNT_MSK, val ? 1 : 0));

drivers/iio/imu/bmi323/bmi323_core.c

1628

FIELD_PREP(BMI323_ACC_GYRO_CONF_ODR_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

1667

FIELD_PREP(BMI323_ACC_GYRO_CONF_SCL_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

1741

FIELD_PREP(BMI323_STEP_SC1_RST_CNT_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

1850

FIELD_PREP(BMI323_IO_INT_LTCH_MSK, latch));

drivers/iio/imu/bmi323/bmi323_core.c

1856

FIELD_PREP(BMI323_GEN_HOLD_DUR_MSK, 0));

drivers/iio/imu/bmi323/bmi323_core.c

1864

field_value = FIELD_PREP(BMI323_IO_INT1_LVL_MSK, active_high) |

drivers/iio/imu/bmi323/bmi323_core.c

1865

FIELD_PREP(BMI323_IO_INT1_OD_MSK, open_drain) |

drivers/iio/imu/bmi323/bmi323_core.c

1866

FIELD_PREP(BMI323_IO_INT1_OP_EN_MSK, 1);

drivers/iio/imu/bmi323/bmi323_core.c

1871

field_value = FIELD_PREP(BMI323_IO_INT2_LVL_MSK, active_high) |

drivers/iio/imu/bmi323/bmi323_core.c

1872

FIELD_PREP(BMI323_IO_INT2_OD_MSK, open_drain) |

drivers/iio/imu/bmi323/bmi323_core.c

1873

FIELD_PREP(BMI323_IO_INT2_OP_EN_MSK, 1);

drivers/iio/imu/bmi323/bmi323_core.c

2020

FIELD_PREP(BMI323_ACC_GYRO_CONF_BW_MSK, bw));

drivers/iio/imu/bmi323/bmi323_core.c

356

FIELD_PREP(BMI323_ACC_GYRO_CONF_MODE_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

486

FIELD_PREP(BMI323_STEP_SC1_WTRMRK_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

493

FIELD_PREP(BMI323_STEP_CNT_MSK, step_irq));

drivers/iio/imu/bmi323/bmi323_core.c

527

irq_field_val = FIELD_PREP(BMI323_MOTION_MSK, motion_irq);

drivers/iio/imu/bmi323/bmi323_core.c

528

field_value = FIELD_PREP(BMI323_FEAT_IO0_XYZ_MOTION_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

536

irq_field_val = FIELD_PREP(BMI323_NOMOTION_MSK, motion_irq);

drivers/iio/imu/bmi323/bmi323_core.c

537

field_value = FIELD_PREP(BMI323_FEAT_IO0_XYZ_NOMOTION_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

551

FIELD_PREP(BMI323_MO1_REF_UP_MSK, 0));

drivers/iio/imu/bmi323/bmi323_core.c

558

FIELD_PREP(BMI323_MO1_SLOPE_TH_MSK, raw));

drivers/iio/imu/bmi323/bmi323_core.c

594

FIELD_PREP(BMI323_FEAT_IO0_S_TAP_MSK, state));

drivers/iio/imu/bmi323/bmi323_core.c

604

FIELD_PREP(BMI323_FEAT_IO0_D_TAP_MSK, state));

drivers/iio/imu/bmi323/bmi323_core.c

621

FIELD_PREP(BMI323_TAP_MSK, tap_irq));

drivers/iio/imu/bmi323/bmi323_core.c

630

FIELD_PREP(BMI323_TAP1_MAX_PEAKS_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

637

FIELD_PREP(BMI323_TAP1_AXIS_SEL_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

644

FIELD_PREP(BMI323_TAP1_TIMOUT_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

691

FIELD_PREP(BMI323_TAP2_MAX_DUR_MSK, raw));

drivers/iio/imu/bmi323/bmi323_core.c

741

FIELD_PREP(BMI323_TAP1_TIMOUT_MSK, val));

drivers/iio/imu/bmi323/bmi323_core.c

876

FIELD_PREP(BMI323_TAP2_THRES_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

887

FIELD_PREP(BMI323_TAP3_QT_AFT_GES_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

898

FIELD_PREP(BMI323_TAP3_QT_BW_TAP_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

918

FIELD_PREP(BMI323_MO1_SLOPE_TH_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

930

FIELD_PREP(BMI323_MO3_DURA_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

942

FIELD_PREP(BMI323_MO2_HYSTR_MSK,

drivers/iio/imu/bmi323/bmi323_core.c

954

FIELD_PREP(BMI323_STEP_SC1_WTRMRK_MSK,

drivers/iio/imu/fxos8700_core.c

511

val |= FIELD_PREP(FXOS8700_CTRL_ODR_MSK, fxos8700_odr[i].bits) | FXOS8700_ACTIVE;

drivers/iio/imu/fxos8700_core.c

667

FIELD_PREP(FXOS8700_CTRL_ODR_MSK, FXOS8700_CTRL_ODR_MAX) |

drivers/iio/imu/inv_icm42600/inv_icm42600.h

216

FIELD_PREP(INV_ICM42600_DRIVE_CONFIG_I2C_MASK, (_rate))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

219

FIELD_PREP(INV_ICM42600_DRIVE_CONFIG_SPI_MASK, (_rate))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

234

FIELD_PREP(INV_ICM42600_FIFO_CONFIG_MASK, 0)

drivers/iio/imu/inv_icm42600/inv_icm42600.h

236

FIELD_PREP(INV_ICM42600_FIFO_CONFIG_MASK, 1)

drivers/iio/imu/inv_icm42600/inv_icm42600.h

238

FIELD_PREP(INV_ICM42600_FIFO_CONFIG_MASK, 2)

drivers/iio/imu/inv_icm42600/inv_icm42600.h

294

FIELD_PREP(INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK, 2)

drivers/iio/imu/inv_icm42600/inv_icm42600.h

296

FIELD_PREP(INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK, 3)

drivers/iio/imu/inv_icm42600/inv_icm42600.h

305

FIELD_PREP(GENMASK(3, 2), (_mode))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

307

FIELD_PREP(GENMASK(1, 0), (_mode))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

311

FIELD_PREP(GENMASK(7, 5), (_fs))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

313

FIELD_PREP(GENMASK(3, 0), (_odr))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

317

FIELD_PREP(GENMASK(7, 5), (_fs))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

319

FIELD_PREP(GENMASK(3, 0), (_odr))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

323

FIELD_PREP(GENMASK(7, 4), (_f))

drivers/iio/imu/inv_icm42600/inv_icm42600.h

325

FIELD_PREP(GENMASK(3, 0), (_f))

drivers/iio/imu/inv_icm45600/inv_icm45600_buffer.c

272

val = FIELD_PREP(INV_ICM45600_FIFO_CONFIG0_MODE_MASK,

drivers/iio/imu/inv_icm45600/inv_icm45600_buffer.c

309

val = FIELD_PREP(INV_ICM45600_FIFO_CONFIG0_MODE_MASK,

drivers/iio/imu/inv_icm45600/inv_icm45600_buffer.c

540

val = FIELD_PREP(INV_ICM45600_FIFO_CONFIG0_MODE_MASK,

drivers/iio/imu/inv_icm45600/inv_icm45600_buffer.c

542

FIELD_PREP(INV_ICM45600_FIFO_CONFIG0_FIFO_DEPTH_MASK,

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

304

val = FIELD_PREP(INV_ICM45600_PWR_MGMT0_GYRO_MODE_MASK, gyro) |

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

305

FIELD_PREP(INV_ICM45600_PWR_MGMT0_ACCEL_MODE_MASK, accel);

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

375

val = FIELD_PREP(INV_ICM45600_ACCEL_CONFIG0_FS_MASK, conf->fs) |

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

376

FIELD_PREP(INV_ICM45600_ACCEL_CONFIG0_ODR_MASK, conf->odr);

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

420

val = FIELD_PREP(INV_ICM45600_GYRO_CONFIG0_FS_MASK, conf->fs) |

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

421

FIELD_PREP(INV_ICM45600_GYRO_CONFIG0_ODR_MASK, conf->odr);

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

431

val = FIELD_PREP(INV_ICM45600_IPREG_SYS1_170_GYRO_LP_AVG_MASK, conf->filter);

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

463

val = FIELD_PREP(INV_ICM45600_PWR_MGMT0_GYRO_MODE_MASK, conf->gyro.mode) |

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

464

FIELD_PREP(INV_ICM45600_PWR_MGMT0_ACCEL_MODE_MASK, conf->accel.mode);

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

469

val = FIELD_PREP(INV_ICM45600_GYRO_CONFIG0_FS_MASK, conf->gyro.fs) |

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

470

FIELD_PREP(INV_ICM45600_GYRO_CONFIG0_ODR_MASK, conf->gyro.odr);

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

475

val = FIELD_PREP(INV_ICM45600_ACCEL_CONFIG0_FS_MASK, conf->accel.fs) |

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

476

FIELD_PREP(INV_ICM45600_ACCEL_CONFIG0_ODR_MASK, conf->accel.odr);

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

815

val = FIELD_PREP(INV_ICM45600_FIFO_CONFIG0_MODE_MASK,

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c

859

val = FIELD_PREP(INV_ICM45600_FIFO_CONFIG0_MODE_MASK,

drivers/iio/imu/inv_icm45600/inv_icm45600_spi.c

25

FIELD_PREP(INV_ICM45600_DRIVE_CONFIG0_SPI_MASK,

drivers/iio/imu/smi240.c

196

request = FIELD_PREP(SMI240_WRITE_BUS_ID_MASK, SMI240_BUS_ID);

drivers/iio/imu/smi240.c

197

request |= FIELD_PREP(SMI240_WRITE_CAP_BIT_MASK, iio_priv_data->capture);

drivers/iio/imu/smi240.c

198

request |= FIELD_PREP(SMI240_WRITE_ADDR_MASK, *(u8 *)reg_buf);

drivers/iio/imu/smi240.c

244

request = FIELD_PREP(SMI240_WRITE_BUS_ID_MASK, SMI240_BUS_ID);

drivers/iio/imu/smi240.c

245

request |= FIELD_PREP(SMI240_WRITE_BIT_MASK, 1);

drivers/iio/imu/smi240.c

246

request |= FIELD_PREP(SMI240_WRITE_ADDR_MASK, reg_addr);

drivers/iio/imu/smi240.c

247

request |= FIELD_PREP(SMI240_WRITE_DATA_MASK, reg_data);

drivers/iio/imu/smi240.c

306

request = FIELD_PREP(SMI240_SOFT_CONFIG_EOC_MASK, 1);

drivers/iio/imu/smi240.c

307

request |= FIELD_PREP(SMI240_SOFT_CONFIG_GYR_BW_MASK, gyr_bw);

drivers/iio/imu/smi240.c

308

request |= FIELD_PREP(SMI240_SOFT_CONFIG_ACC_BW_MASK, acc_bw);

drivers/iio/imu/smi240.c

309

request |= FIELD_PREP(SMI240_SOFT_CONFIG_BITE_AUTO_MASK, 1);

drivers/iio/imu/smi240.c

310

request |= FIELD_PREP(SMI240_SOFT_CONFIG_BITE_REP_MASK,

drivers/iio/imu/smi330/smi330_core.c

673

val = FIELD_PREP(SMI330_IO_INT_CTRL_INT1_MASK, val);

drivers/iio/imu/smi330/smi330_core.c

680

val = FIELD_PREP(SMI330_IO_INT_CTRL_INT2_MASK, val);

drivers/iio/imu/smi330/smi330_core.c

692

FIELD_PREP(SMI330_INT_CONF_LATCH_MASK,

drivers/iio/imu/smi330/smi330_core.c

785

val = FIELD_PREP(SMI330_INT_MAP2_ACC_DRDY_MASK,

drivers/iio/imu/smi330/smi330_core.c

787

val |= FIELD_PREP(SMI330_INT_MAP2_GYR_DRDY_MASK,

drivers/iio/imu/smi330/smi330_core.c

831

mode = FIELD_PREP(SMI330_CFG_MODE_MASK, SMI330_MODE_NORMAL);

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c

216

data = FIELD_PREP(ST_LSM6DSX_FIFO_MODE_MASK, fifo_mode);

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c

254

FIELD_PREP(ST_LSM6DSX_FIFO_ODR_MASK,

drivers/iio/light/adux1020.c

55

#define ADUX1020_DATA_OUT_PROX_I FIELD_PREP(ADUX1020_DATA_OUT_MODE_MASK, 1)

drivers/iio/light/adux1020.c

78

#define ADUX1020_PROX_FREQ(x) FIELD_PREP(ADUX1020_PROX_FREQ_MASK, x)

drivers/iio/light/al3010.c

106

FIELD_PREP(AL3010_GAIN_MASK, AL3XXX_RANGE_3));

drivers/iio/light/al3010.c

159

FIELD_PREP(AL3010_GAIN_MASK, i));

drivers/iio/light/al3320a.c

120

FIELD_PREP(AL3320A_GAIN_MASK, AL3320A_RANGE_3));

drivers/iio/light/al3320a.c

183

FIELD_PREP(AL3320A_GAIN_MASK, i));

drivers/iio/light/as73211.c

53

#define AS73211_OSR_DOS_CONFIG FIELD_PREP(AS73211_OSR_DOS_MASK, 0x2)

drivers/iio/light/as73211.c

54

#define AS73211_OSR_DOS_MEASURE FIELD_PREP(AS73211_OSR_DOS_MASK, 0x3)

drivers/iio/light/as73211.c

545

data->creg3 |= FIELD_PREP(AS73211_CREG3_CCLK_MASK, reg_bits);

drivers/iio/light/as73211.c

566

data->creg1 |= FIELD_PREP(AS73211_CREG1_GAIN_MASK, reg_bits);

drivers/iio/light/as73211.c

57

#define AS73211_AGEN_DEVID(x) FIELD_PREP(AS73211_AGEN_DEVID_MASK, (x))

drivers/iio/light/as73211.c

59

#define AS73211_AGEN_MUT(x) FIELD_PREP(AS73211_AGEN_MUT_MASK, (x))

drivers/iio/light/as73211.c

595

data->creg1 |= FIELD_PREP(AS73211_CREG1_TIME_MASK, reg_bits);

drivers/iio/light/bh1745.c

656

value | FIELD_PREP(BH1745_INTR_SOURCE_MASK,

drivers/iio/light/bh1745.c

661

value | FIELD_PREP(BH1745_INTR_SOURCE_MASK,

drivers/iio/light/bh1745.c

666

value | FIELD_PREP(BH1745_INTR_SOURCE_MASK,

drivers/iio/light/bh1745.c

671

value | FIELD_PREP(BH1745_INTR_SOURCE_MASK,

drivers/iio/light/ltr390.c

62

#define LTR390_ALS_UVS_INT_TIME(x) FIELD_PREP(LTR390_ALS_UVS_INT_TIME_MASK, (x))

drivers/iio/light/ltr390.c

64

#define LTR390_INT_PST_VAL(x) FIELD_PREP(LTR390_INT_PST_MASK, (x))

drivers/iio/light/opt4001.c

214

reg = FIELD_PREP(OPT4001_CTRL_RANGE_MASK, OPT4001_CTRL_LIGHT_SCALE_AUTO);

drivers/iio/light/opt4001.c

215

reg |= FIELD_PREP(OPT4001_CTRL_CONV_TIME_MASK, chip->int_time);

drivers/iio/light/opt4001.c

216

reg |= FIELD_PREP(OPT4001_CTRL_OPER_MODE_MASK, OPT4001_CTRL_OPER_MODE_CONTINUOUS);

drivers/iio/light/opt4060.c

1008

reg = FIELD_PREP(OPT4060_CTRL_RANGE_MASK,

drivers/iio/light/opt4060.c

1010

reg |= FIELD_PREP(OPT4060_CTRL_CONV_TIME_MASK, chip->int_time);

drivers/iio/light/opt4060.c

1011

reg |= FIELD_PREP(OPT4060_CTRL_OPER_MODE_MASK,

drivers/iio/light/opt4060.c

227

regval = FIELD_PREP(OPT4060_INT_CTRL_INT_CFG, state);

drivers/iio/light/opt4060.c

248

reg |= FIELD_PREP(OPT4060_CTRL_OPER_MODE_MASK,

drivers/iio/light/opt4060.c

251

reg |= FIELD_PREP(OPT4060_CTRL_OPER_MODE_MASK,

drivers/iio/light/opt4060.c

501

regval = FIELD_PREP(OPT4060_CTRL_CONV_TIME_MASK, chip->int_time);

drivers/iio/light/opt4060.c

762

regval = FIELD_PREP(OPT4060_CTRL_FAULT_COUNT_MASK, fault_count_val);

drivers/iio/light/opt4060.c

786

regval = FIELD_PREP(OPT4060_INT_CTRL_THRESH_SEL, ch_sel);

drivers/iio/light/rohm-bu27034.c

356

val = FIELD_PREP(BU27034_MASK_D01_GAIN, sel);

drivers/iio/light/vcnl4000.c

122

(FIELD_PREP(VCNL4040_PS_CONF3_MPS, VCNL4040_CONF3_PS_MPS_16BITS) | \

drivers/iio/light/vcnl4000.c

123

FIELD_PREP(VCNL4040_PS_MS_LED_I, VCNL4040_CONF3_PS_LED_I_16BITS))

drivers/iio/light/vcnl4000.c

629

regval = FIELD_PREP(VCNL4040_ALS_CONF_IT, i);

drivers/iio/light/vcnl4000.c

684

FIELD_PREP(VCNL4040_PS_CONF2_PS_IT, index);

drivers/iio/light/vcnl4000.c

744

regval = FIELD_PREP(VCNL4040_ALS_CONF_PERS, i);

drivers/iio/light/vcnl4000.c

806

regval = FIELD_PREP(VCNL4040_CONF1_PS_PERS, i);

drivers/iio/light/vcnl4000.c

853

regval = FIELD_PREP(VCNL4040_PS_CONF3_MPS, i);

drivers/iio/light/vcnl4000.c

902

regval |= FIELD_PREP(VCNL4040_PS_MS_LED_I, i);

drivers/iio/light/veml6040.c

118

FIELD_PREP(VEML6040_CONF_IT_MSK, i));

drivers/iio/light/veml6040.c

211

FIELD_PREP(VEML6040_CONF_IT_MSK, VEML6040_CONF_IT_40_MS) |

drivers/iio/light/veml6040.c

212

FIELD_PREP(VEML6040_CONF_AF_MSK, 0) |

drivers/iio/light/veml6040.c

213

FIELD_PREP(VEML6040_CONF_SD_MSK, 0);

drivers/iio/light/veml6046x00.c

549

new_scale = FIELD_PREP(VEML6046X00_CONF1_GAIN,

drivers/iio/light/veml6070.c

289

data->config = FIELD_PREP(VEML6070_COMMAND_IT, VEML6070_IT_10) |

drivers/iio/light/veml6070.c

98

FIELD_PREP(VEML6070_COMMAND_IT, it_idx);

drivers/iio/light/veml6075.c

353

FIELD_PREP(VEML6075_CONF_IT, i));

drivers/iio/light/veml6075.c

443

config = FIELD_PREP(VEML6075_CONF_IT, VEML6075_IT_100_MS) |

drivers/iio/light/veml6075.c

444

FIELD_PREP(VEML6075_CONF_AF, VEML6075_AF_ENABLE) |

drivers/iio/light/veml6075.c

445

FIELD_PREP(VEML6075_CONF_SD, VEML6075_SD_ENABLE);

drivers/iio/magnetometer/mmc5633.c

161

FIELD_PREP(MMC5633_CTRL1_BW_MASK, 0));

drivers/iio/magnetometer/mmc5633.c

361

FIELD_PREP(MMC5633_CTRL1_BW_MASK, ret));

drivers/iio/magnetometer/tmag5273.c

226

FIELD_PREP(TMAG5273_AVG_MODE_MASK, i));

drivers/iio/magnetometer/tmag5273.c

536

FIELD_PREP(TMAG5273_MAG_CH_EN_MASK,

drivers/iio/magnetometer/tmag5273.c

542

FIELD_PREP(TMAG5273_ANGLE_EN_MASK,

drivers/iio/magnetometer/tmag5273.c

559

data->version = FIELD_PREP(TMAG5273_VERSION_MASK, val);

drivers/iio/magnetometer/tmag5273.c

63

#define TMAG5273_AVG_1_MODE FIELD_PREP(TMAG5273_AVG_MODE_MASK, 0)

drivers/iio/magnetometer/tmag5273.c

64

#define TMAG5273_AVG_2_MODE FIELD_PREP(TMAG5273_AVG_MODE_MASK, 1)

drivers/iio/magnetometer/tmag5273.c

65

#define TMAG5273_AVG_4_MODE FIELD_PREP(TMAG5273_AVG_MODE_MASK, 2)

drivers/iio/magnetometer/tmag5273.c

66

#define TMAG5273_AVG_8_MODE FIELD_PREP(TMAG5273_AVG_MODE_MASK, 3)

drivers/iio/magnetometer/tmag5273.c

67

#define TMAG5273_AVG_16_MODE FIELD_PREP(TMAG5273_AVG_MODE_MASK, 4)

drivers/iio/magnetometer/tmag5273.c

68

#define TMAG5273_AVG_32_MODE FIELD_PREP(TMAG5273_AVG_MODE_MASK, 5)

drivers/iio/magnetometer/tmag5273.c

72

#define TMAG5273_OP_MODE_STANDBY FIELD_PREP(TMAG5273_OP_MODE_MASK, 0)

drivers/iio/magnetometer/tmag5273.c

73

#define TMAG5273_OP_MODE_SLEEP FIELD_PREP(TMAG5273_OP_MODE_MASK, 1)

drivers/iio/magnetometer/tmag5273.c

74

#define TMAG5273_OP_MODE_CONT FIELD_PREP(TMAG5273_OP_MODE_MASK, 2)

drivers/iio/magnetometer/tmag5273.c

75

#define TMAG5273_OP_MODE_WAKEUP FIELD_PREP(TMAG5273_OP_MODE_MASK, 3)

drivers/iio/magnetometer/yamaha-yas530.c

1047

FIELD_PREP(YAS537_MTC3_MASK_PREP,

drivers/iio/magnetometer/yamaha-yas530.c

1053

FIELD_PREP(YAS537_HCK_MASK_PREP,

drivers/iio/magnetometer/yamaha-yas530.c

1058

FIELD_PREP(YAS537_LCK_MASK_PREP,

drivers/iio/magnetometer/yamaha-yas530.c

1276

val = FIELD_PREP(YAS5XX_CONFIG_CCK_MASK, yas5xx->calibration.dck);

drivers/iio/pressure/bmp280-core.c

1080

u8 osrs = FIELD_PREP(BMP280_OSRS_TEMP_MASK, data->oversampling_temp + 1) |

drivers/iio/pressure/bmp280-core.c

1081

FIELD_PREP(BMP280_OSRS_PRESS_MASK, data->oversampling_press + 1);

drivers/iio/pressure/bmp280-core.c

1209

u8 osrs = FIELD_PREP(BME280_OSRS_HUMIDITY_MASK, data->oversampling_humid + 1);

drivers/iio/pressure/bmp280-core.c

1685

FIELD_PREP(BMP380_MODE_MASK,

drivers/iio/pressure/bmp280-core.c

1750

osrs = FIELD_PREP(BMP380_OSRS_TEMP_MASK, data->oversampling_temp) |

drivers/iio/pressure/bmp280-core.c

1751

FIELD_PREP(BMP380_OSRS_PRESS_MASK, data->oversampling_press);

drivers/iio/pressure/bmp280-core.c

1775

FIELD_PREP(BMP380_FILTER_MASK, data->iir_filter_coeff));

drivers/iio/pressure/bmp280-core.c

1851

FIELD_PREP(BMP380_INT_CTRL_DRDY_EN, !!state));

drivers/iio/pressure/bmp280-core.c

1864

int pin_drive_cfg = FIELD_PREP(BMP380_INT_CTRL_OPEN_DRAIN,

drivers/iio/pressure/bmp280-core.c

1866

int pin_level_cfg = FIELD_PREP(BMP380_INT_CTRL_LEVEL,

drivers/iio/pressure/bmp280-core.c

2212

FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP));

drivers/iio/pressure/bmp280-core.c

2224

FIELD_PREP(BMP580_NVM_ROW_ADDR_MASK, addr));

drivers/iio/pressure/bmp280-core.c

2277

FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP));

drivers/iio/pressure/bmp280-core.c

2290

FIELD_PREP(BMP580_NVM_ROW_ADDR_MASK, addr));

drivers/iio/pressure/bmp280-core.c

2407

FIELD_PREP(BMP580_MODE_MASK,

drivers/iio/pressure/bmp280-core.c

2460

FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP));

drivers/iio/pressure/bmp280-core.c

2469

reg_val = FIELD_PREP(BMP580_DSP_COMP_MASK, BMP580_DSP_PRESS_TEMP_COMP_EN) |

drivers/iio/pressure/bmp280-core.c

2482

reg_val = FIELD_PREP(BMP580_OSR_TEMP_MASK, data->oversampling_temp) |

drivers/iio/pressure/bmp280-core.c

2483

FIELD_PREP(BMP580_OSR_PRESS_MASK, data->oversampling_press) |

drivers/iio/pressure/bmp280-core.c

2499

FIELD_PREP(BMP580_ODR_MASK, data->sampling_freq),

drivers/iio/pressure/bmp280-core.c

2508

reg_val = FIELD_PREP(BMP580_DSP_IIR_PRESS_MASK, data->iir_filter_coeff) |

drivers/iio/pressure/bmp280-core.c

2509

FIELD_PREP(BMP580_DSP_IIR_TEMP_MASK, data->iir_filter_coeff);

drivers/iio/pressure/bmp280-core.c

2552

FIELD_PREP(BMP580_INT_CONFIG_INT_EN, !!state));

drivers/iio/pressure/bmp280-core.c

2565

int pin_drive_cfg = FIELD_PREP(BMP580_INT_CONFIG_OPEN_DRAIN,

drivers/iio/pressure/bmp280-core.c

2567

int pin_level_cfg = FIELD_PREP(BMP580_INT_CONFIG_LEVEL,

drivers/iio/pressure/bmp280-core.c

2752

FIELD_PREP(BMP180_MEAS_CTRL_MASK, BMP180_MEAS_TEMP) |

drivers/iio/pressure/bmp280-core.c

2864

FIELD_PREP(BMP180_MEAS_CTRL_MASK, BMP180_MEAS_PRESS) |

drivers/iio/pressure/bmp280-core.c

2865

FIELD_PREP(BMP180_OSRS_PRESS_MASK, oss) |

drivers/iio/pressure/bmp280-core.c

391

h4_upper = FIELD_PREP(BME280_COMP_H4_PREP_MASK_UP, tmp_2);

drivers/iio/pressure/mpl3115.c

262

FIELD_PREP(MPL3115_CTRL2_ST, i));

drivers/iio/pressure/rohm-bm1390.c

528

regval = FIELD_PREP(BM1390_MASK_FIFO_LEN,

drivers/iio/proximity/aw96103.c

392

FIELD_PREP(AW96103_OUTDEB_MASK, val));

drivers/iio/proximity/aw96103.c

398

FIELD_PREP(AW96103_INDEB_MASK, val));

drivers/iio/proximity/aw96103.c

406

FIELD_PREP(AW96103_THHYST_MASK, val));

drivers/iio/proximity/sx9310.c

546

regval = FIELD_PREP(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);

drivers/iio/proximity/sx9310.c

574

hyst = FIELD_PREP(SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);

drivers/iio/proximity/sx9310.c

590

regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val);

drivers/iio/proximity/sx9310.c

607

regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val);

drivers/iio/proximity/sx9310.c

661

FIELD_PREP(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, i));

drivers/iio/proximity/sx9310.c

675

gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN0_MASK, gain);

drivers/iio/proximity/sx9310.c

680

gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN12_MASK, gain);

drivers/iio/proximity/sx9310.c

852

reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,

drivers/iio/proximity/sx9310.c

864

reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,

drivers/iio/proximity/sx9310.c

875

reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK,

drivers/iio/proximity/sx9324.c

1004

reg_def->def |= FIELD_PREP(SX9324_REG_ADV_CTRL5_STARTUPSENS_MASK,

drivers/iio/proximity/sx9324.c

1017

reg_def->def |= FIELD_PREP(SX9324_REG_PROX_CTRL4_AVGPOSFILT_MASK,

drivers/iio/proximity/sx9324.c

1031

reg_def->def |= FIELD_PREP(SX9324_REG_PROX_CTRL0_RAWFILT_MASK,

drivers/iio/proximity/sx9324.c

655

hyst = FIELD_PREP(SX9324_REG_PROX_CTRL5_HYST_MASK, hyst);

drivers/iio/proximity/sx9324.c

671

regval = FIELD_PREP(SX9324_REG_PROX_CTRL5_FAR_DEBOUNCE_MASK, val);

drivers/iio/proximity/sx9324.c

689

regval = FIELD_PREP(SX9324_REG_PROX_CTRL5_CLOSE_DEBOUNCE_MASK, val);

drivers/iio/proximity/sx9324.c

739

gain = FIELD_PREP(SX9324_REG_PROX_CTRL0_GAIN_MASK, gain);

drivers/iio/proximity/sx9324.c

961

reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL4_RESOLUTION_MASK,

drivers/iio/proximity/sx9324.c

972

reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL8_RESFILTIN_MASK,

drivers/iio/proximity/sx9324.c

993

reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL9_AGAIN_MASK,

drivers/iio/proximity/sx9360.c

537

hyst = FIELD_PREP(SX9360_REG_PROX_CTRL4_HYST_MASK, hyst);

drivers/iio/proximity/sx9360.c

552

regval = FIELD_PREP(SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK, val);

drivers/iio/proximity/sx9360.c

569

regval = FIELD_PREP(SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK, val);

drivers/iio/proximity/sx9360.c

614

gain = FIELD_PREP(SX9360_REG_PROX_CTRL0_GAIN_MASK, gain);

drivers/iio/proximity/sx9360.c

708

reg_def->def |= FIELD_PREP(SX9360_REG_AFE_CTRL1_RESFILTIN_MASK,

drivers/iio/proximity/sx9360.c

720

reg_def->def |= FIELD_PREP(SX9360_REG_AFE_PARAM0_RESOLUTION_MASK, raw);

drivers/iio/proximity/sx9360.c

729

reg_def->def |= FIELD_PREP(SX9360_REG_PROX_CTRL0_RAWFILT_MASK, raw);

drivers/iio/proximity/sx9360.c

740

reg_def->def |= FIELD_PREP(SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK, raw);

drivers/iio/resolver/ad2s1210.c

1117

data = FIELD_PREP(AD2S1210_PHASE_LOCK_RANGE_44, 1);

drivers/iio/resolver/ad2s1210.c

1118

data |= FIELD_PREP(AD2S1210_ENABLE_HYSTERESIS, 1);

drivers/iio/resolver/ad2s1210.c

1119

data |= FIELD_PREP(AD2S1210_SET_ENRES, 0x3);

drivers/iio/resolver/ad2s1210.c

1120

data |= FIELD_PREP(AD2S1210_SET_RES, st->resolution);

drivers/iio/temperature/ltc2983.c

100

FIELD_PREP(LTC2983_RTD_N_WIRES_MASK, x)

drivers/iio/temperature/ltc2983.c

103

FIELD_PREP(LTC2983_RTD_R_SHARE_MASK, 1)

drivers/iio/temperature/ltc2983.c

109

#define LTC2983_STATUS_START(x) FIELD_PREP(LTC2983_STATUS_START_MASK, x)

drivers/iio/temperature/ltc2983.c

115

FIELD_PREP(LTC2983_STATUS_CHAN_SEL_MASK, x)

drivers/iio/temperature/ltc2983.c

118

#define LTC2983_TEMP_UNITS(x) FIELD_PREP(LTC2983_TEMP_UNITS_MASK, x)

drivers/iio/temperature/ltc2983.c

121

#define LTC2983_NOTCH_FREQ(x) FIELD_PREP(LTC2983_NOTCH_FREQ_MASK, x)

drivers/iio/temperature/ltc2983.c

128

#define LTC2983_CHAN_TYPE(x) FIELD_PREP(LTC2983_CHAN_TYPE_MASK, x)

drivers/iio/temperature/ltc2983.c

132

#define LTC2983_CHAN_ASSIGN(x) FIELD_PREP(LTC2983_CHAN_ASSIGN_MASK, x)

drivers/iio/temperature/ltc2983.c

135

#define LTC2983_CUSTOM_LEN(x) FIELD_PREP(LTC2983_CUSTOM_LEN_MASK, x)

drivers/iio/temperature/ltc2983.c

138

#define LTC2983_CUSTOM_ADDR(x) FIELD_PREP(LTC2983_CUSTOM_ADDR_MASK, x)

drivers/iio/temperature/ltc2983.c

142

FIELD_PREP(LTC2983_THERMOCOUPLE_CFG_MASK, x)

drivers/iio/temperature/ltc2983.c

147

#define LTC2983_RTD_CFG(x) FIELD_PREP(LTC2983_RTD_CFG_MASK, x)

drivers/iio/temperature/ltc2983.c

150

FIELD_PREP(LTC2983_RTD_EXC_CURRENT_MASK, x)

drivers/iio/temperature/ltc2983.c

152

#define LTC2983_RTD_CURVE(x) FIELD_PREP(LTC2983_RTD_CURVE_MASK, x)

drivers/iio/temperature/ltc2983.c

156

FIELD_PREP(LTC2983_THERMISTOR_CFG_MASK, x)

drivers/iio/temperature/ltc2983.c

159

FIELD_PREP(LTC2983_THERMISTOR_EXC_CURRENT_MASK, x)

drivers/iio/temperature/ltc2983.c

162

#define LTC2983_DIODE_CFG(x) FIELD_PREP(LTC2983_DIODE_CFG_MASK, x)

drivers/iio/temperature/ltc2983.c

165

FIELD_PREP(LTC2983_DIODE_EXC_CURRENT_MASK, x)

drivers/iio/temperature/ltc2983.c

168

FIELD_PREP(LTC2983_DIODE_IDEAL_FACTOR_MASK, x)

drivers/iio/temperature/ltc2983.c

171

#define LTC2983_R_SENSE_VAL(x) FIELD_PREP(LTC2983_R_SENSE_VAL_MASK, x)

drivers/iio/temperature/ltc2983.c

175

FIELD_PREP(LTC2983_ADC_SINGLE_ENDED_MASK, x)

drivers/iio/temperature/ltc2983.c

65

FIELD_PREP(LTC2983_THERMOCOUPLE_DIFF_MASK, x)

drivers/iio/temperature/ltc2983.c

68

FIELD_PREP(LTC2983_THERMOCOUPLE_OC_CURR_MASK, x)

drivers/iio/temperature/ltc2983.c

71

FIELD_PREP(LTC2983_THERMOCOUPLE_OC_CHECK_MASK, x)

drivers/iio/temperature/ltc2983.c

75

FIELD_PREP(LTC2983_THERMISTOR_DIFF_MASK, x)

drivers/iio/temperature/ltc2983.c

78

FIELD_PREP(LTC2983_THERMISTOR_R_SHARE_MASK, x)

drivers/iio/temperature/ltc2983.c

81

FIELD_PREP(LTC2983_THERMISTOR_C_ROTATE_MASK, x)

drivers/iio/temperature/ltc2983.c

85

FIELD_PREP(LTC2983_DIODE_DIFF_MASK, x)

drivers/iio/temperature/ltc2983.c

88

FIELD_PREP(LTC2983_DIODE_3_CONV_CYCLE_MASK, x)

drivers/iio/temperature/ltc2983.c

91

FIELD_PREP(LTC2983_DIODE_AVERAGE_ON_MASK, x)

drivers/iio/temperature/ltc2983.c

96

FIELD_PREP(LTC2983_RTD_ROTATION_MASK, x)

drivers/iio/temperature/mcp9600.c

130

cfg = FIELD_PREP(MCP9600_SENSOR_TYPE_MASK,

drivers/iio/temperature/mlx90635.c

243

FIELD_PREP(MLX90635_CTRL2_MODE_MASK, MLX90635_PWR_STATUS_SLEEP_STEP));

drivers/iio/temperature/mlx90635.c

259

FIELD_PREP(MLX90635_CTRL2_MODE_MASK, MLX90635_PWR_STATUS_CONTINUOUS));

drivers/iio/temperature/mlx90635.c

393

FIELD_PREP(MLX90635_CTRL2_SOB_MASK, 1),

drivers/iio/temperature/mlx90635.c

394

FIELD_PREP(MLX90635_CTRL2_SOB_MASK, 1));

drivers/infiniband/hw/efa/efa_common_defs.h

20

FIELD_PREP(mask##_MASK, value); \

drivers/infiniband/hw/erdma/erdma_cmdq.c

12

u64 db_data = FIELD_PREP(ERDMA_CQDB_CI_MASK, cmdq->cq.ci) |

drivers/infiniband/hw/erdma/erdma_cmdq.c

13

FIELD_PREP(ERDMA_CQDB_ARM_MASK, 1) |

drivers/infiniband/hw/erdma/erdma_cmdq.c

14

FIELD_PREP(ERDMA_CQDB_CMDSN_MASK, cmdq->cq.cmdsn) |

drivers/infiniband/hw/erdma/erdma_cmdq.c

15

FIELD_PREP(ERDMA_CQDB_IDX_MASK, cmdq->cq.cmdsn);

drivers/infiniband/hw/erdma/erdma_cmdq.c

26

u64 db_data = FIELD_PREP(ERDMA_CMD_HDR_WQEBB_INDEX_MASK, cmdq->sq.pi);

drivers/infiniband/hw/erdma/erdma_cmdq.c

272

hdr |= FIELD_PREP(ERDMA_CMD_HDR_WQEBB_INDEX_MASK, cmdq->sq.pi) |

drivers/infiniband/hw/erdma/erdma_cmdq.c

273

FIELD_PREP(ERDMA_CMD_HDR_CONTEXT_COOKIE_MASK,

drivers/infiniband/hw/erdma/erdma_cmdq.c

275

FIELD_PREP(ERDMA_CMD_HDR_WQEBB_CNT_MASK, cmdq->sq.wqebb_cnt - 1);

drivers/infiniband/hw/erdma/erdma_cmdq.c

394

*hdr = FIELD_PREP(ERDMA_CMD_HDR_SUB_MOD_MASK, mod) |

drivers/infiniband/hw/erdma/erdma_cmdq.c

395

FIELD_PREP(ERDMA_CMD_HDR_OPCODE_MASK, op);

drivers/infiniband/hw/erdma/erdma_cq.c

22

FIELD_PREP(ERDMA_CQDB_IDX_MASK, (cq->kern_cq.notify_cnt)) |

drivers/infiniband/hw/erdma/erdma_cq.c

23

FIELD_PREP(ERDMA_CQDB_CQN_MASK, cq->cqn) |

drivers/infiniband/hw/erdma/erdma_cq.c

24

FIELD_PREP(ERDMA_CQDB_ARM_MASK, 1) |

drivers/infiniband/hw/erdma/erdma_cq.c

25

FIELD_PREP(ERDMA_CQDB_SOL_MASK, solcitied) |

drivers/infiniband/hw/erdma/erdma_cq.c

259

FIELD_PREP(ERDMA_CQE_HDR_OWNER_MASK, owner));

drivers/infiniband/hw/erdma/erdma_cq.c

26

FIELD_PREP(ERDMA_CQDB_CMDSN_MASK, cq->kern_cq.cmdsn) |

drivers/infiniband/hw/erdma/erdma_cq.c

27

FIELD_PREP(ERDMA_CQDB_CI_MASK, cq->kern_cq.ci);

drivers/infiniband/hw/erdma/erdma_eq.c

13

u64 db_data = FIELD_PREP(ERDMA_EQDB_CI_MASK, eq->ci) |

drivers/infiniband/hw/erdma/erdma_eq.c

14

FIELD_PREP(ERDMA_EQDB_ARM_MASK, 1);

drivers/infiniband/hw/erdma/erdma_main.c

208

u32 ctrl = FIELD_PREP(ERDMA_REG_DEV_CTRL_RESET_MASK, 1);

drivers/infiniband/hw/erdma/erdma_main.c

218

FIELD_PREP(ERDMA_REG_DEV_CTRL_INIT_MASK, 1));

drivers/infiniband/hw/erdma/erdma_main.c

438

req.cfg = FIELD_PREP(ERDMA_CMD_CONFIG_DEVICE_PGSHIFT_MASK, PAGE_SHIFT) |

drivers/infiniband/hw/erdma/erdma_main.c

439

FIELD_PREP(ERDMA_CMD_CONFIG_DEVICE_PS_EN_MASK, 1);

drivers/infiniband/hw/erdma/erdma_qp.c

132

req.cfg = FIELD_PREP(ERDMA_CMD_MODIFY_QP_STATE_MASK, params->state) |

drivers/infiniband/hw/erdma/erdma_qp.c

133

FIELD_PREP(ERDMA_CMD_MODIFY_QP_QPN_MASK, QP_ID(qp));

drivers/infiniband/hw/erdma/erdma_qp.c

226

req.cfg0 = FIELD_PREP(ERDMA_CMD_MODIFY_QP_QPN_MASK, QP_ID(qp));

drivers/infiniband/hw/erdma/erdma_qp.c

229

req.cfg0 |= FIELD_PREP(ERDMA_CMD_MODIFY_QP_STATE_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

233

req.cfg1 = FIELD_PREP(ERDMA_CMD_MODIFY_QP_DQPN_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

474

wqe_hdr = FIELD_PREP(

drivers/infiniband/hw/erdma/erdma_qp.c

477

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_SE_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

479

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_FENCE_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

481

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_INLINE_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

483

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_QPN_MASK, QP_ID(qp));

drivers/infiniband/hw/erdma/erdma_qp.c

491

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, hw_op);

drivers/infiniband/hw/erdma/erdma_qp.c

518

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, hw_op);

drivers/infiniband/hw/erdma/erdma_qp.c

552

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, hw_op);

drivers/infiniband/hw/erdma/erdma_qp.c

556

FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK, ERDMA_OP_REG_MR);

drivers/infiniband/hw/erdma/erdma_qp.c

565

attrs = FIELD_PREP(ERDMA_SQE_MR_ACCESS_MASK, mr->access) |

drivers/infiniband/hw/erdma/erdma_qp.c

566

FIELD_PREP(ERDMA_SQE_MR_MTT_CNT_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

570

attrs |= FIELD_PREP(ERDMA_SQE_MR_MTT_TYPE_MASK, 0);

drivers/infiniband/hw/erdma/erdma_qp.c

578

attrs |= FIELD_PREP(ERDMA_SQE_MR_MTT_TYPE_MASK, 1);

drivers/infiniband/hw/erdma/erdma_qp.c

585

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

595

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

602

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

630

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_SGL_LEN_MASK, ret);

drivers/infiniband/hw/erdma/erdma_qp.c

636

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_SGL_LEN_MASK,

drivers/infiniband/hw/erdma/erdma_qp.c

642

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_WQEBB_CNT_MASK, wqebb_cnt - 1);

drivers/infiniband/hw/erdma/erdma_qp.c

644

wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_WQEBB_INDEX_MASK, *pi);

drivers/infiniband/hw/erdma/erdma_qp.c

653

u64 db_data = FIELD_PREP(ERDMA_SQE_HDR_QPN_MASK, QP_ID(qp)) |

drivers/infiniband/hw/erdma/erdma_qp.c

654

FIELD_PREP(ERDMA_SQE_HDR_WQEBB_INDEX_MASK, pi);

drivers/infiniband/hw/erdma/erdma_qp.c

85

req.cfg = FIELD_PREP(ERDMA_CMD_MODIFY_QP_STATE_MASK, params->state) |

drivers/infiniband/hw/erdma/erdma_qp.c

86

FIELD_PREP(ERDMA_CMD_MODIFY_QP_CC_MASK, params->cc) |

drivers/infiniband/hw/erdma/erdma_qp.c

87

FIELD_PREP(ERDMA_CMD_MODIFY_QP_QPN_MASK, QP_ID(qp));

drivers/infiniband/hw/erdma/erdma_verbs.c

100

FIELD_PREP(ERDMA_CMD_CREATE_QP_CQN_MASK, qp->rcq->cqn);

drivers/infiniband/hw/erdma/erdma_verbs.c

103

req.sq_mtt_cfg |= FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_CNT_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

107

req.rq_mtt_cfg |= FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_CNT_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

120

FIELD_PREP(ERDMA_CMD_CREATE_QP_DB_CFG_MASK, 1);

drivers/infiniband/hw/erdma/erdma_verbs.c

122

FIELD_PREP(ERDMA_CMD_CREATE_QP_SQDB_CFG_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

124

FIELD_PREP(ERDMA_CMD_CREATE_QP_RQDB_CFG_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

1300

req.cfg = FIELD_PREP(ERDMA_CMD_MR_MPT_IDX_MASK, ibmr->lkey >> 8) |

drivers/infiniband/hw/erdma/erdma_verbs.c

1301

FIELD_PREP(ERDMA_CMD_MR_KEY_MASK, ibmr->lkey & 0xFF);

drivers/infiniband/hw/erdma/erdma_verbs.c

1472

req.cfg = FIELD_PREP(ERDMA_CMD_EXT_DB_CQ_EN_MASK, 1) |

drivers/infiniband/hw/erdma/erdma_verbs.c

1473

FIELD_PREP(ERDMA_CMD_EXT_DB_RQ_EN_MASK, 1) |

drivers/infiniband/hw/erdma/erdma_verbs.c

1474

FIELD_PREP(ERDMA_CMD_EXT_DB_SQ_EN_MASK, 1);

drivers/infiniband/hw/erdma/erdma_verbs.c

1504

req.cfg = FIELD_PREP(ERDMA_CMD_EXT_DB_CQ_EN_MASK, 1) |

drivers/infiniband/hw/erdma/erdma_verbs.c

1505

FIELD_PREP(ERDMA_CMD_EXT_DB_RQ_EN_MASK, 1) |

drivers/infiniband/hw/erdma/erdma_verbs.c

1506

FIELD_PREP(ERDMA_CMD_EXT_DB_SQ_EN_MASK, 1);

drivers/infiniband/hw/erdma/erdma_verbs.c

160

req.cfg0 = FIELD_PREP(ERDMA_CMD_MR_VALID_MASK, mr->valid) |

drivers/infiniband/hw/erdma/erdma_verbs.c

161

FIELD_PREP(ERDMA_CMD_MR_KEY_MASK, mr->ibmr.lkey & 0xFF) |

drivers/infiniband/hw/erdma/erdma_verbs.c

162

FIELD_PREP(ERDMA_CMD_MR_MPT_IDX_MASK, mr->ibmr.lkey >> 8);

drivers/infiniband/hw/erdma/erdma_verbs.c

163

req.cfg1 = FIELD_PREP(ERDMA_CMD_REGMR_PD_MASK, pd->pdn) |

drivers/infiniband/hw/erdma/erdma_verbs.c

164

FIELD_PREP(ERDMA_CMD_REGMR_TYPE_MASK, mr->type) |

drivers/infiniband/hw/erdma/erdma_verbs.c

165

FIELD_PREP(ERDMA_CMD_REGMR_RIGHT_MASK, mr->access);

drivers/infiniband/hw/erdma/erdma_verbs.c

166

req.cfg2 = FIELD_PREP(ERDMA_CMD_REGMR_PAGESIZE_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

168

FIELD_PREP(ERDMA_CMD_REGMR_MTT_LEVEL_MASK, mtt_level) |

drivers/infiniband/hw/erdma/erdma_verbs.c

169

FIELD_PREP(ERDMA_CMD_REGMR_MTT_CNT_MASK, mr->mem.page_cnt);

drivers/infiniband/hw/erdma/erdma_verbs.c

180

req.cfg0 |= FIELD_PREP(ERDMA_CMD_MR_VERSION_MASK, 1);

drivers/infiniband/hw/erdma/erdma_verbs.c

181

req.cfg2 |= FIELD_PREP(ERDMA_CMD_REGMR_MTT_PAGESIZE_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

202

req.cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_CQ_CQN_MASK, cq->cqn) |

drivers/infiniband/hw/erdma/erdma_verbs.c

203

FIELD_PREP(ERDMA_CMD_CREATE_CQ_DEPTH_MASK, ilog2(cq->depth));

drivers/infiniband/hw/erdma/erdma_verbs.c

204

req.cfg1 = FIELD_PREP(ERDMA_CMD_CREATE_CQ_EQN_MASK, cq->assoc_eqn);

drivers/infiniband/hw/erdma/erdma_verbs.c

208

req.cfg0 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_PAGESIZE_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

213

req.cfg1 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_CNT_MASK, 1) |

drivers/infiniband/hw/erdma/erdma_verbs.c

214

FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_LEVEL_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

2156

req.cfg = FIELD_PREP(ERDMA_CMD_SET_GID_SGID_IDX_MASK, idx) |

drivers/infiniband/hw/erdma/erdma_verbs.c

2157

FIELD_PREP(ERDMA_CMD_SET_GID_OP_MASK, op);

drivers/infiniband/hw/erdma/erdma_verbs.c

2165

req.cfg |= FIELD_PREP(ERDMA_CMD_SET_GID_NTYPE_MASK, ntype);

drivers/infiniband/hw/erdma/erdma_verbs.c

2206

av_cfg->cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_AV_FL_MASK, av->flow_label) |

drivers/infiniband/hw/erdma/erdma_verbs.c

2207

FIELD_PREP(ERDMA_CMD_CREATE_AV_NTYPE_MASK, av->ntype);

drivers/infiniband/hw/erdma/erdma_verbs.c

222

FIELD_PREP(ERDMA_CMD_CREATE_CQ_PAGESIZE_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

228

FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_LEVEL_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

234

FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_LEVEL_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

237

req.cfg1 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_MTT_CNT_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

244

req.cfg1 |= FIELD_PREP(

drivers/infiniband/hw/erdma/erdma_verbs.c

246

req.cfg2 = FIELD_PREP(ERDMA_CMD_CREATE_CQ_DB_CFG_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

29

*cfg |= FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_LEVEL_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

34

*cfg |= FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_LEVEL_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

51

req.cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_QP_SQ_DEPTH_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

53

FIELD_PREP(ERDMA_CMD_CREATE_QP_QPN_MASK, QP_ID(qp));

drivers/infiniband/hw/erdma/erdma_verbs.c

54

req.cfg1 = FIELD_PREP(ERDMA_CMD_CREATE_QP_RQ_DEPTH_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

56

FIELD_PREP(ERDMA_CMD_CREATE_QP_PD_MASK, pd->pdn);

drivers/infiniband/hw/erdma/erdma_verbs.c

59

req.cfg2 = FIELD_PREP(ERDMA_CMD_CREATE_QP_TYPE_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

62

req.cfg2 = FIELD_PREP(ERDMA_CMD_CREATE_QP_TYPE_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

69

FIELD_PREP(ERDMA_CMD_CREATE_QP_PAGE_SIZE_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

71

FIELD_PREP(ERDMA_CMD_CREATE_QP_CQN_MASK, qp->scq->cqn);

drivers/infiniband/hw/erdma/erdma_verbs.c

73

FIELD_PREP(ERDMA_CMD_CREATE_QP_PAGE_SIZE_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

75

FIELD_PREP(ERDMA_CMD_CREATE_QP_CQN_MASK, qp->rcq->cqn);

drivers/infiniband/hw/erdma/erdma_verbs.c

78

FIELD_PREP(ERDMA_CMD_CREATE_QP_PAGE_OFFSET_MASK, 0) |

drivers/infiniband/hw/erdma/erdma_verbs.c

79

FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_CNT_MASK, 1) |

drivers/infiniband/hw/erdma/erdma_verbs.c

80

FIELD_PREP(ERDMA_CMD_CREATE_QP_MTT_LEVEL_MASK,

drivers/infiniband/hw/erdma/erdma_verbs.c

90

req.sq_cqn_mtt_cfg = FIELD_PREP(

drivers/infiniband/hw/erdma/erdma_verbs.c

94

FIELD_PREP(ERDMA_CMD_CREATE_QP_CQN_MASK, qp->scq->cqn);

drivers/infiniband/hw/erdma/erdma_verbs.c

96

req.rq_cqn_mtt_cfg = FIELD_PREP(

drivers/infiniband/hw/hns/hns_roce_common.h

91

*((__le32 *)ptr + (field_h) / 32) |= cpu_to_le32(FIELD_PREP( \

drivers/infiniband/hw/irdma/ctrl.c

1032

qw0 = FIELD_PREP(IRDMAQPC_RQWQESIZE, qp->qp_uk.rq_wqe_size) |

drivers/infiniband/hw/irdma/ctrl.c

1033

FIELD_PREP(IRDMAQPC_RCVTPHEN, qp->rcv_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

1034

FIELD_PREP(IRDMAQPC_XMITTPHEN, qp->xmit_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

1035

FIELD_PREP(IRDMAQPC_RQTPHEN, qp->rq_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

1036

FIELD_PREP(IRDMAQPC_SQTPHEN, qp->sq_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

1037

FIELD_PREP(IRDMAQPC_PPIDX, push_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1038

FIELD_PREP(IRDMAQPC_PMENA, push_mode_en) |

drivers/infiniband/hw/irdma/ctrl.c

1039

FIELD_PREP(IRDMAQPC_DC_TCP_EN, roce_info->dctcp_en) |

drivers/infiniband/hw/irdma/ctrl.c

1040

FIELD_PREP(IRDMAQPC_ISQP1, roce_info->is_qp1) |

drivers/infiniband/hw/irdma/ctrl.c

1041

FIELD_PREP(IRDMAQPC_ROCE_TVER, roce_info->roce_tver) |

drivers/infiniband/hw/irdma/ctrl.c

1042

FIELD_PREP(IRDMAQPC_IPV4, udp->ipv4) |

drivers/infiniband/hw/irdma/ctrl.c

1043

FIELD_PREP(IRDMAQPC_USE_SRQ, !qp->qp_uk.srq_uk ? 0 : 1) |

drivers/infiniband/hw/irdma/ctrl.c

1044

FIELD_PREP(IRDMAQPC_INSERTVLANTAG, udp->insert_vlan_tag);

drivers/infiniband/hw/irdma/ctrl.c

1048

qw3 = FIELD_PREP(IRDMAQPC_RQSIZE, qp->hw_rq_size) |

drivers/infiniband/hw/irdma/ctrl.c

1049

FIELD_PREP(IRDMAQPC_SQSIZE, qp->hw_sq_size) |

drivers/infiniband/hw/irdma/ctrl.c

1050

FIELD_PREP(IRDMAQPC_TTL, udp->ttl) |

drivers/infiniband/hw/irdma/ctrl.c

1051

FIELD_PREP(IRDMAQPC_TOS, udp->tos) |

drivers/infiniband/hw/irdma/ctrl.c

1052

FIELD_PREP(IRDMAQPC_SRCPORTNUM, udp->src_port) |

drivers/infiniband/hw/irdma/ctrl.c

1053

FIELD_PREP(IRDMAQPC_DESTPORTNUM, udp->dst_port);

drivers/infiniband/hw/irdma/ctrl.c

1056

FIELD_PREP(IRDMAQPC_DESTIPADDR2, udp->dest_ip_addr[2]) |

drivers/infiniband/hw/irdma/ctrl.c

1057

FIELD_PREP(IRDMAQPC_DESTIPADDR3, udp->dest_ip_addr[3]));

drivers/infiniband/hw/irdma/ctrl.c

1059

FIELD_PREP(IRDMAQPC_DESTIPADDR0, udp->dest_ip_addr[0]) |

drivers/infiniband/hw/irdma/ctrl.c

1060

FIELD_PREP(IRDMAQPC_DESTIPADDR1, udp->dest_ip_addr[1]));

drivers/infiniband/hw/irdma/ctrl.c

1062

FIELD_PREP(IRDMAQPC_SNDMSS, udp->snd_mss) |

drivers/infiniband/hw/irdma/ctrl.c

1063

FIELD_PREP(IRDMAQPC_VLANTAG, udp->vlan_tag) |

drivers/infiniband/hw/irdma/ctrl.c

1064

FIELD_PREP(IRDMAQPC_ARPIDX, udp->arp_idx));

drivers/infiniband/hw/irdma/ctrl.c

1065

qw7 = FIELD_PREP(IRDMAQPC_PKEY, roce_info->p_key) |

drivers/infiniband/hw/irdma/ctrl.c

1066

FIELD_PREP(IRDMAQPC_ACKCREDITS, roce_info->ack_credits) |

drivers/infiniband/hw/irdma/ctrl.c

1067

FIELD_PREP(IRDMAQPC_FLOWLABEL, udp->flow_label);

drivers/infiniband/hw/irdma/ctrl.c

1069

qw8 = FIELD_PREP(IRDMAQPC_QKEY, roce_info->qkey) |

drivers/infiniband/hw/irdma/ctrl.c

1070

FIELD_PREP(IRDMAQPC_DESTQP, roce_info->dest_qp);

drivers/infiniband/hw/irdma/ctrl.c

1073

FIELD_PREP(IRDMAQPC_PSNNXT, udp->psn_nxt) |

drivers/infiniband/hw/irdma/ctrl.c

1074

FIELD_PREP(IRDMAQPC_LSN, udp->lsn));

drivers/infiniband/hw/irdma/ctrl.c

1076

FIELD_PREP(IRDMAQPC_EPSN, udp->epsn));

drivers/infiniband/hw/irdma/ctrl.c

1078

FIELD_PREP(IRDMAQPC_PSNMAX, udp->psn_max) |

drivers/infiniband/hw/irdma/ctrl.c

1079

FIELD_PREP(IRDMAQPC_PSNUNA, udp->psn_una));

drivers/infiniband/hw/irdma/ctrl.c

1081

FIELD_PREP(IRDMAQPC_CWNDROCE, udp->cwnd));

drivers/infiniband/hw/irdma/ctrl.c

1083

FIELD_PREP(IRDMAQPC_MINRNR_TIMER, udp->min_rnr_timer) |

drivers/infiniband/hw/irdma/ctrl.c

1084

FIELD_PREP(IRDMAQPC_RNRNAK_THRESH, udp->rnr_nak_thresh) |

drivers/infiniband/hw/irdma/ctrl.c

1085

FIELD_PREP(IRDMAQPC_REXMIT_THRESH, udp->rexmit_thresh) |

drivers/infiniband/hw/irdma/ctrl.c

1086

FIELD_PREP(IRDMAQPC_RNRNAK_TMR, udp->rnr_nak_tmr) |

drivers/infiniband/hw/irdma/ctrl.c

1087

FIELD_PREP(IRDMAQPC_RTOMIN, roce_info->rtomin));

drivers/infiniband/hw/irdma/ctrl.c

1089

FIELD_PREP(IRDMAQPC_TXCQNUM, info->send_cq_num) |

drivers/infiniband/hw/irdma/ctrl.c

1090

FIELD_PREP(IRDMAQPC_RXCQNUM, info->rcv_cq_num));

drivers/infiniband/hw/irdma/ctrl.c

1092

FIELD_PREP(IRDMAQPC_MACADDRESS,

drivers/infiniband/hw/irdma/ctrl.c

1094

FIELD_PREP(IRDMAQPC_LOCALACKTIMEOUT,

drivers/infiniband/hw/irdma/ctrl.c

1097

FIELD_PREP(IRDMAQPC_ORDSIZE_GEN3, roce_info->ord_size) |

drivers/infiniband/hw/irdma/ctrl.c

1098

FIELD_PREP(IRDMAQPC_IRDSIZE_GEN3,

drivers/infiniband/hw/irdma/ctrl.c

1100

FIELD_PREP(IRDMAQPC_WRRDRSPOK, roce_info->wr_rdresp_en) |

drivers/infiniband/hw/irdma/ctrl.c

1101

FIELD_PREP(IRDMAQPC_RDOK, roce_info->rd_en) |

drivers/infiniband/hw/irdma/ctrl.c

1102

FIELD_PREP(IRDMAQPC_USESTATSINSTANCE,

drivers/infiniband/hw/irdma/ctrl.c

1104

FIELD_PREP(IRDMAQPC_BINDEN, roce_info->bind_en) |

drivers/infiniband/hw/irdma/ctrl.c

1105

FIELD_PREP(IRDMAQPC_FASTREGEN, roce_info->fast_reg_en) |

drivers/infiniband/hw/irdma/ctrl.c

1106

FIELD_PREP(IRDMAQPC_DCQCNENABLE, roce_info->dcqcn_en) |

drivers/infiniband/hw/irdma/ctrl.c

1107

FIELD_PREP(IRDMAQPC_RCVNOICRC, roce_info->rcv_no_icrc) |

drivers/infiniband/hw/irdma/ctrl.c

1108

FIELD_PREP(IRDMAQPC_FW_CC_ENABLE,

drivers/infiniband/hw/irdma/ctrl.c

1110

FIELD_PREP(IRDMAQPC_UDPRIVCQENABLE,

drivers/infiniband/hw/irdma/ctrl.c

1112

FIELD_PREP(IRDMAQPC_PRIVEN, roce_info->priv_mode_en) |

drivers/infiniband/hw/irdma/ctrl.c

1113

FIELD_PREP(IRDMAQPC_REMOTE_ATOMIC_EN,

drivers/infiniband/hw/irdma/ctrl.c

1115

FIELD_PREP(IRDMAQPC_TIMELYENABLE, roce_info->timely_en));

drivers/infiniband/hw/irdma/ctrl.c

1117

FIELD_PREP(IRDMAQPC_QPCOMPCTX, info->qp_compl_ctx));

drivers/infiniband/hw/irdma/ctrl.c

1119

FIELD_PREP(IRDMAQPC_SQTPHVAL, qp->sq_tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

1120

FIELD_PREP(IRDMAQPC_RQTPHVAL, qp->rq_tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

1121

FIELD_PREP(IRDMAQPC_QSHANDLE, qp->qs_handle));

drivers/infiniband/hw/irdma/ctrl.c

1123

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR3, udp->local_ipaddr[3]) |

drivers/infiniband/hw/irdma/ctrl.c

1124

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR2, udp->local_ipaddr[2]));

drivers/infiniband/hw/irdma/ctrl.c

1126

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR1, udp->local_ipaddr[1]) |

drivers/infiniband/hw/irdma/ctrl.c

1127

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR0, udp->local_ipaddr[0]));

drivers/infiniband/hw/irdma/ctrl.c

1129

FIELD_PREP(IRDMAQPC_THIGH, roce_info->t_high) |

drivers/infiniband/hw/irdma/ctrl.c

1130

FIELD_PREP(IRDMAQPC_SRQ_ID,

drivers/infiniband/hw/irdma/ctrl.c

1133

FIELD_PREP(IRDMAQPC_TLOW, roce_info->t_low));

drivers/infiniband/hw/irdma/ctrl.c

1135

FIELD_PREP(IRDMAQPC_STAT_INDEX_GEN3, info->stats_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1136

FIELD_PREP(IRDMAQPC_PKT_LIMIT, qp->pkt_limit));

drivers/infiniband/hw/irdma/ctrl.c

1166

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE,

drivers/infiniband/hw/irdma/ctrl.c

1168

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

1203

header = FIELD_PREP(IRDMA_CQPSQ_MLM_TABLEIDX, info->entry_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1204

FIELD_PREP(IRDMA_CQPSQ_OPCODE,

drivers/infiniband/hw/irdma/ctrl.c

1206

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

1238

header = FIELD_PREP(IRDMA_CQPSQ_MLM_TABLEIDX, entry_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1239

FIELD_PREP(IRDMA_CQPSQ_OPCODE,

drivers/infiniband/hw/irdma/ctrl.c

1241

FIELD_PREP(IRDMA_CQPSQ_MLM_FREEENTRY, 1) |

drivers/infiniband/hw/irdma/ctrl.c

1242

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/ctrl.c

1243

FIELD_PREP(IRDMA_CQPSQ_MLM_IGNORE_REF_CNT, ignore_ref_count);

drivers/infiniband/hw/irdma/ctrl.c

1290

qw0 = FIELD_PREP(IRDMAQPC_RQWQESIZE, qp->qp_uk.rq_wqe_size) |

drivers/infiniband/hw/irdma/ctrl.c

1291

FIELD_PREP(IRDMAQPC_RCVTPHEN, qp->rcv_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

1292

FIELD_PREP(IRDMAQPC_XMITTPHEN, qp->xmit_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

1293

FIELD_PREP(IRDMAQPC_RQTPHEN, qp->rq_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

1294

FIELD_PREP(IRDMAQPC_SQTPHEN, qp->sq_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

1295

FIELD_PREP(IRDMAQPC_PPIDX, push_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1296

FIELD_PREP(IRDMAQPC_PMENA, push_mode_en);

drivers/infiniband/hw/irdma/ctrl.c

1301

qw3 = FIELD_PREP(IRDMAQPC_RQSIZE, qp->hw_rq_size) |

drivers/infiniband/hw/irdma/ctrl.c

1302

FIELD_PREP(IRDMAQPC_SQSIZE, qp->hw_sq_size);

drivers/infiniband/hw/irdma/ctrl.c

1304

qw3 |= FIELD_PREP(IRDMAQPC_GEN1_SRCMACADDRIDX,

drivers/infiniband/hw/irdma/ctrl.c

1307

FIELD_PREP(IRDMAQPC_TXCQNUM, info->send_cq_num) |

drivers/infiniband/hw/irdma/ctrl.c

1308

FIELD_PREP(IRDMAQPC_RXCQNUM, info->rcv_cq_num));

drivers/infiniband/hw/irdma/ctrl.c

1310

FIELD_PREP(IRDMAQPC_QPCOMPCTX, info->qp_compl_ctx));

drivers/infiniband/hw/irdma/ctrl.c

1312

FIELD_PREP(IRDMAQPC_SQTPHVAL, qp->sq_tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

1313

FIELD_PREP(IRDMAQPC_RQTPHVAL, qp->rq_tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

1314

FIELD_PREP(IRDMAQPC_QSHANDLE, qp->qs_handle) |

drivers/infiniband/hw/irdma/ctrl.c

1315

FIELD_PREP(IRDMAQPC_EXCEPTION_LAN_QUEUE, qp->ieq_qp));

drivers/infiniband/hw/irdma/ctrl.c

1317

qw0 |= FIELD_PREP(IRDMAQPC_DDP_VER, iw->ddp_ver) |

drivers/infiniband/hw/irdma/ctrl.c

1318

FIELD_PREP(IRDMAQPC_RDMAP_VER, iw->rdmap_ver) |

drivers/infiniband/hw/irdma/ctrl.c

1319

FIELD_PREP(IRDMAQPC_DC_TCP_EN, iw->dctcp_en) |

drivers/infiniband/hw/irdma/ctrl.c

1320

FIELD_PREP(IRDMAQPC_ECN_EN, iw->ecn_en) |

drivers/infiniband/hw/irdma/ctrl.c

1321

FIELD_PREP(IRDMAQPC_IBRDENABLE, iw->ib_rd_en) |

drivers/infiniband/hw/irdma/ctrl.c

1322

FIELD_PREP(IRDMAQPC_PDIDXHI, iw->pd_id >> 16) |

drivers/infiniband/hw/irdma/ctrl.c

1323

FIELD_PREP(IRDMAQPC_ERR_RQ_IDX_VALID,

drivers/infiniband/hw/irdma/ctrl.c

1325

qw7 |= FIELD_PREP(IRDMAQPC_PDIDX, iw->pd_id);

drivers/infiniband/hw/irdma/ctrl.c

1326

qw16 |= FIELD_PREP(IRDMAQPC_ERR_RQ_IDX, iw->err_rq_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1327

FIELD_PREP(IRDMAQPC_RTOMIN, iw->rtomin);

drivers/infiniband/hw/irdma/ctrl.c

1329

FIELD_PREP(IRDMAQPC_Q2ADDR, qp->q2_pa >> 8) |

drivers/infiniband/hw/irdma/ctrl.c

1330

FIELD_PREP(IRDMAQPC_STAT_INDEX, info->stats_idx));

drivers/infiniband/hw/irdma/ctrl.c

1336

mac << 16 | FIELD_PREP(IRDMAQPC_LASTBYTESENT, iw->last_byte_sent));

drivers/infiniband/hw/irdma/ctrl.c

1338

FIELD_PREP(IRDMAQPC_ORDSIZE, iw->ord_size) |

drivers/infiniband/hw/irdma/ctrl.c

1339

FIELD_PREP(IRDMAQPC_IRDSIZE, irdma_sc_get_encoded_ird_size(iw->ird_size)) |

drivers/infiniband/hw/irdma/ctrl.c

1340

FIELD_PREP(IRDMAQPC_WRRDRSPOK, iw->wr_rdresp_en) |

drivers/infiniband/hw/irdma/ctrl.c

1341

FIELD_PREP(IRDMAQPC_RDOK, iw->rd_en) |

drivers/infiniband/hw/irdma/ctrl.c

1342

FIELD_PREP(IRDMAQPC_SNDMARKERS, iw->snd_mark_en) |

drivers/infiniband/hw/irdma/ctrl.c

1343

FIELD_PREP(IRDMAQPC_BINDEN, iw->bind_en) |

drivers/infiniband/hw/irdma/ctrl.c

1344

FIELD_PREP(IRDMAQPC_FASTREGEN, iw->fast_reg_en) |

drivers/infiniband/hw/irdma/ctrl.c

1345

FIELD_PREP(IRDMAQPC_PRIVEN, iw->priv_mode_en) |

drivers/infiniband/hw/irdma/ctrl.c

1346

FIELD_PREP(IRDMAQPC_USESTATSINSTANCE, info->stats_idx_valid) |

drivers/infiniband/hw/irdma/ctrl.c

1347

FIELD_PREP(IRDMAQPC_IWARPMODE, 1) |

drivers/infiniband/hw/irdma/ctrl.c

1348

FIELD_PREP(IRDMAQPC_RCVMARKERS, iw->rcv_mark_en) |

drivers/infiniband/hw/irdma/ctrl.c

1349

FIELD_PREP(IRDMAQPC_ALIGNHDRS, iw->align_hdrs) |

drivers/infiniband/hw/irdma/ctrl.c

1350

FIELD_PREP(IRDMAQPC_RCVNOMPACRC, iw->rcv_no_mpa_crc) |

drivers/infiniband/hw/irdma/ctrl.c

1351

FIELD_PREP(IRDMAQPC_RCVMARKOFFSET, iw->rcv_mark_offset || !tcp ? iw->rcv_mark_offset : tcp->rcv_nxt) |

drivers/infiniband/hw/irdma/ctrl.c

1352

FIELD_PREP(IRDMAQPC_SNDMARKOFFSET, iw->snd_mark_offset || !tcp ? iw->snd_mark_offset : tcp->snd_nxt) |

drivers/infiniband/hw/irdma/ctrl.c

1353

FIELD_PREP(IRDMAQPC_TIMELYENABLE, iw->timely_en));

drivers/infiniband/hw/irdma/ctrl.c

1356

qw0 |= FIELD_PREP(IRDMAQPC_IPV4, tcp->ipv4) |

drivers/infiniband/hw/irdma/ctrl.c

1357

FIELD_PREP(IRDMAQPC_NONAGLE, tcp->no_nagle) |

drivers/infiniband/hw/irdma/ctrl.c

1358

FIELD_PREP(IRDMAQPC_INSERTVLANTAG,

drivers/infiniband/hw/irdma/ctrl.c

1360

FIELD_PREP(IRDMAQPC_TIMESTAMP, tcp->time_stamp) |

drivers/infiniband/hw/irdma/ctrl.c

1361

FIELD_PREP(IRDMAQPC_LIMIT, tcp->cwnd_inc_limit) |

drivers/infiniband/hw/irdma/ctrl.c

1362

FIELD_PREP(IRDMAQPC_DROPOOOSEG, tcp->drop_ooo_seg) |

drivers/infiniband/hw/irdma/ctrl.c

1363

FIELD_PREP(IRDMAQPC_DUPACK_THRESH, tcp->dup_ack_thresh);

drivers/infiniband/hw/irdma/ctrl.c

1368

qw3 |= FIELD_PREP(IRDMAQPC_TTL, tcp->ttl) |

drivers/infiniband/hw/irdma/ctrl.c

1369

FIELD_PREP(IRDMAQPC_AVOIDSTRETCHACK, tcp->avoid_stretch_ack) |

drivers/infiniband/hw/irdma/ctrl.c

1370

FIELD_PREP(IRDMAQPC_TOS, tcp->tos) |

drivers/infiniband/hw/irdma/ctrl.c

1371

FIELD_PREP(IRDMAQPC_SRCPORTNUM, tcp->src_port) |

drivers/infiniband/hw/irdma/ctrl.c

1372

FIELD_PREP(IRDMAQPC_DESTPORTNUM, tcp->dst_port);

drivers/infiniband/hw/irdma/ctrl.c

1374

qw3 |= FIELD_PREP(IRDMAQPC_GEN1_SRCMACADDRIDX, tcp->src_mac_addr_idx);

drivers/infiniband/hw/irdma/ctrl.c

1379

FIELD_PREP(IRDMAQPC_DESTIPADDR2, tcp->dest_ip_addr[2]) |

drivers/infiniband/hw/irdma/ctrl.c

1380

FIELD_PREP(IRDMAQPC_DESTIPADDR3, tcp->dest_ip_addr[3]));

drivers/infiniband/hw/irdma/ctrl.c

1382

FIELD_PREP(IRDMAQPC_DESTIPADDR0, tcp->dest_ip_addr[0]) |

drivers/infiniband/hw/irdma/ctrl.c

1383

FIELD_PREP(IRDMAQPC_DESTIPADDR1, tcp->dest_ip_addr[1]));

drivers/infiniband/hw/irdma/ctrl.c

1385

FIELD_PREP(IRDMAQPC_SNDMSS, tcp->snd_mss) |

drivers/infiniband/hw/irdma/ctrl.c

1386

FIELD_PREP(IRDMAQPC_SYN_RST_HANDLING, tcp->syn_rst_handling) |

drivers/infiniband/hw/irdma/ctrl.c

1387

FIELD_PREP(IRDMAQPC_VLANTAG, tcp->vlan_tag) |

drivers/infiniband/hw/irdma/ctrl.c

1388

FIELD_PREP(IRDMAQPC_ARPIDX, tcp->arp_idx));

drivers/infiniband/hw/irdma/ctrl.c

1389

qw7 |= FIELD_PREP(IRDMAQPC_FLOWLABEL, tcp->flow_label) |

drivers/infiniband/hw/irdma/ctrl.c

1390

FIELD_PREP(IRDMAQPC_WSCALE, tcp->wscale) |

drivers/infiniband/hw/irdma/ctrl.c

1391

FIELD_PREP(IRDMAQPC_IGNORE_TCP_OPT,

drivers/infiniband/hw/irdma/ctrl.c

1393

FIELD_PREP(IRDMAQPC_IGNORE_TCP_UNS_OPT,

drivers/infiniband/hw/irdma/ctrl.c

1395

FIELD_PREP(IRDMAQPC_TCPSTATE, tcp->tcp_state) |

drivers/infiniband/hw/irdma/ctrl.c

1396

FIELD_PREP(IRDMAQPC_RCVSCALE, tcp->rcv_wscale) |

drivers/infiniband/hw/irdma/ctrl.c

1397

FIELD_PREP(IRDMAQPC_SNDSCALE, tcp->snd_wscale);

drivers/infiniband/hw/irdma/ctrl.c

1399

FIELD_PREP(IRDMAQPC_TIMESTAMP_RECENT, tcp->time_stamp_recent) |

drivers/infiniband/hw/irdma/ctrl.c

1400

FIELD_PREP(IRDMAQPC_TIMESTAMP_AGE, tcp->time_stamp_age));

drivers/infiniband/hw/irdma/ctrl.c

1402

FIELD_PREP(IRDMAQPC_SNDNXT, tcp->snd_nxt) |

drivers/infiniband/hw/irdma/ctrl.c

1403

FIELD_PREP(IRDMAQPC_SNDWND, tcp->snd_wnd));

drivers/infiniband/hw/irdma/ctrl.c

1405

FIELD_PREP(IRDMAQPC_RCVNXT, tcp->rcv_nxt) |

drivers/infiniband/hw/irdma/ctrl.c

1406

FIELD_PREP(IRDMAQPC_RCVWND, tcp->rcv_wnd));

drivers/infiniband/hw/irdma/ctrl.c

1408

FIELD_PREP(IRDMAQPC_SNDMAX, tcp->snd_max) |

drivers/infiniband/hw/irdma/ctrl.c

1409

FIELD_PREP(IRDMAQPC_SNDUNA, tcp->snd_una));

drivers/infiniband/hw/irdma/ctrl.c

1411

FIELD_PREP(IRDMAQPC_SRTT, tcp->srtt) |

drivers/infiniband/hw/irdma/ctrl.c

1412

FIELD_PREP(IRDMAQPC_RTTVAR, tcp->rtt_var));

drivers/infiniband/hw/irdma/ctrl.c

1414

FIELD_PREP(IRDMAQPC_SSTHRESH, tcp->ss_thresh) |

drivers/infiniband/hw/irdma/ctrl.c

1415

FIELD_PREP(IRDMAQPC_CWND, tcp->cwnd));

drivers/infiniband/hw/irdma/ctrl.c

1417

FIELD_PREP(IRDMAQPC_SNDWL1, tcp->snd_wl1) |

drivers/infiniband/hw/irdma/ctrl.c

1418

FIELD_PREP(IRDMAQPC_SNDWL2, tcp->snd_wl2));

drivers/infiniband/hw/irdma/ctrl.c

1419

qw16 |= FIELD_PREP(IRDMAQPC_MAXSNDWND, tcp->max_snd_window) |

drivers/infiniband/hw/irdma/ctrl.c

1420

FIELD_PREP(IRDMAQPC_REXMIT_THRESH, tcp->rexmit_thresh);

drivers/infiniband/hw/irdma/ctrl.c

1422

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR3, tcp->local_ipaddr[3]) |

drivers/infiniband/hw/irdma/ctrl.c

1423

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR2, tcp->local_ipaddr[2]));

drivers/infiniband/hw/irdma/ctrl.c

1425

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR1, tcp->local_ipaddr[1]) |

drivers/infiniband/hw/irdma/ctrl.c

1426

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR0, tcp->local_ipaddr[0]));

drivers/infiniband/hw/irdma/ctrl.c

1428

FIELD_PREP(IRDMAQPC_THIGH, iw->t_high) |

drivers/infiniband/hw/irdma/ctrl.c

1429

FIELD_PREP(IRDMAQPC_TLOW, iw->t_low));

drivers/infiniband/hw/irdma/ctrl.c

1431

FIELD_PREP(IRDMAQPC_REMENDPOINTIDX, info->rem_endpoint_idx));

drivers/infiniband/hw/irdma/ctrl.c

1476

FIELD_PREP(IRDMA_CQPSQ_STAG_STAGLEN, info->total_len));

drivers/infiniband/hw/irdma/ctrl.c

1478

FIELD_PREP(IRDMA_CQPSQ_STAG_IDX, info->stag_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1479

FIELD_PREP(IRDMA_CQPSQ_STAG_PDID_HI, info->pd_id >> 18));

drivers/infiniband/hw/irdma/ctrl.c

1481

FIELD_PREP(IRDMA_CQPSQ_STAG_HMCFNIDX, info->hmc_fcn_index));

drivers/infiniband/hw/irdma/ctrl.c

1485

FIELD_PREP(IRDMA_CQPSQ_STAG_FIRSTPMPBLIDX, info->first_pm_pbl_idx));

drivers/infiniband/hw/irdma/ctrl.c

1487

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_ALLOC_STAG) |

drivers/infiniband/hw/irdma/ctrl.c

1488

FIELD_PREP(IRDMA_CQPSQ_STAG_MR, 1) |

drivers/infiniband/hw/irdma/ctrl.c

1489

FIELD_PREP(IRDMA_CQPSQ_STAG_ARIGHTS, info->access_rights) |

drivers/infiniband/hw/irdma/ctrl.c

1490

FIELD_PREP(IRDMA_CQPSQ_STAG_LPBLSIZE, info->chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

1491

FIELD_PREP(IRDMA_CQPSQ_STAG_HPAGESIZE, page_size) |

drivers/infiniband/hw/irdma/ctrl.c

1492

FIELD_PREP(IRDMA_CQPSQ_STAG_REMACCENABLED, info->remote_access) |

drivers/infiniband/hw/irdma/ctrl.c

1493

FIELD_PREP(IRDMA_CQPSQ_STAG_USEHMCFNIDX, info->use_hmc_fcn_index) |

drivers/infiniband/hw/irdma/ctrl.c

1494

FIELD_PREP(IRDMA_CQPSQ_STAG_USEPFRID, info->use_pf_rid) |

drivers/infiniband/hw/irdma/ctrl.c

1495

FIELD_PREP(IRDMA_CQPSQ_STAG_REMOTE_ATOMIC_EN,

drivers/infiniband/hw/irdma/ctrl.c

1497

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

1562

FIELD_PREP(IRDMA_CQPSQ_STAG_STAGLEN, info->total_len) |

drivers/infiniband/hw/irdma/ctrl.c

1565

FIELD_PREP(IRDMA_CQPSQ_STAG_KEY, info->stag_key) |

drivers/infiniband/hw/irdma/ctrl.c

1566

FIELD_PREP(IRDMA_CQPSQ_STAG_PDID_HI, info->pd_id >> 18) |

drivers/infiniband/hw/irdma/ctrl.c

1567

FIELD_PREP(IRDMA_CQPSQ_STAG_IDX, info->stag_idx));

drivers/infiniband/hw/irdma/ctrl.c

1574

FIELD_PREP(IRDMA_CQPSQ_STAG_FIRSTPMPBLIDX, info->first_pm_pbl_index));

drivers/infiniband/hw/irdma/ctrl.c

1580

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_REG_MR) |

drivers/infiniband/hw/irdma/ctrl.c

1581

FIELD_PREP(IRDMA_CQPSQ_STAG_MR, 1) |

drivers/infiniband/hw/irdma/ctrl.c

1582

FIELD_PREP(IRDMA_CQPSQ_STAG_LPBLSIZE, info->chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

1583

FIELD_PREP(IRDMA_CQPSQ_STAG_HPAGESIZE, page_size) |

drivers/infiniband/hw/irdma/ctrl.c

1584

FIELD_PREP(IRDMA_CQPSQ_STAG_ARIGHTS, info->access_rights) |

drivers/infiniband/hw/irdma/ctrl.c

1585

FIELD_PREP(IRDMA_CQPSQ_STAG_REMACCENABLED, remote_access) |

drivers/infiniband/hw/irdma/ctrl.c

1586

FIELD_PREP(IRDMA_CQPSQ_STAG_VABASEDTO, addr_type) |

drivers/infiniband/hw/irdma/ctrl.c

1587

FIELD_PREP(IRDMA_CQPSQ_STAG_USEHMCFNIDX, info->use_hmc_fcn_index) |

drivers/infiniband/hw/irdma/ctrl.c

1588

FIELD_PREP(IRDMA_CQPSQ_STAG_USEPFRID, info->use_pf_rid) |

drivers/infiniband/hw/irdma/ctrl.c

1589

FIELD_PREP(IRDMA_CQPSQ_STAG_REMOTE_ATOMIC_EN,

drivers/infiniband/hw/irdma/ctrl.c

1591

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

1627

FIELD_PREP(IRDMA_CQPSQ_STAG_IDX, info->stag_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1628

FIELD_PREP(IRDMA_CQPSQ_STAG_PDID_HI, info->pd_id >> 18));

drivers/infiniband/hw/irdma/ctrl.c

1630

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_DEALLOC_STAG) |

drivers/infiniband/hw/irdma/ctrl.c

1631

FIELD_PREP(IRDMA_CQPSQ_STAG_MR, info->mr) |

drivers/infiniband/hw/irdma/ctrl.c

1632

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

1668

FIELD_PREP(IRDMA_CQPSQ_STAG_IDX, info->mw_stag_index) |

drivers/infiniband/hw/irdma/ctrl.c

1669

FIELD_PREP(IRDMA_CQPSQ_STAG_PDID_HI, info->pd_id >> 18));

drivers/infiniband/hw/irdma/ctrl.c

1671

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_ALLOC_STAG) |

drivers/infiniband/hw/irdma/ctrl.c

1672

FIELD_PREP(IRDMA_CQPSQ_STAG_MWTYPE, info->mw_wide) |

drivers/infiniband/hw/irdma/ctrl.c

1673

FIELD_PREP(IRDMA_CQPSQ_STAG_MW1_BIND_DONT_VLDT_KEY,

drivers/infiniband/hw/irdma/ctrl.c

1675

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

1733

FIELD_PREP(IRDMAQPSQ_FIRSTPMPBLIDXHI, temp) |

drivers/infiniband/hw/irdma/ctrl.c

1734

FIELD_PREP(IRDMAQPSQ_PBLADDR >> IRDMA_HW_PAGE_SHIFT, info->reg_addr_pa));

drivers/infiniband/hw/irdma/ctrl.c

1737

FIELD_PREP(IRDMAQPSQ_FIRSTPMPBLIDXLO, info->first_pm_pbl_index));

drivers/infiniband/hw/irdma/ctrl.c

1739

hdr = FIELD_PREP(IRDMAQPSQ_STAGKEY, info->stag_key) |

drivers/infiniband/hw/irdma/ctrl.c

1740

FIELD_PREP(IRDMAQPSQ_STAGINDEX, info->stag_idx) |

drivers/infiniband/hw/irdma/ctrl.c

1741

FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_FAST_REGISTER) |

drivers/infiniband/hw/irdma/ctrl.c

1742

FIELD_PREP(IRDMAQPSQ_LPBLSIZE, info->chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

1743

FIELD_PREP(IRDMAQPSQ_HPAGESIZE, page_size) |

drivers/infiniband/hw/irdma/ctrl.c

1744

FIELD_PREP(IRDMAQPSQ_STAGRIGHTS, info->access_rights) |

drivers/infiniband/hw/irdma/ctrl.c

1745

FIELD_PREP(IRDMAQPSQ_VABASEDTO, info->addr_type) |

drivers/infiniband/hw/irdma/ctrl.c

1746

FIELD_PREP(IRDMAQPSQ_READFENCE, info->read_fence) |

drivers/infiniband/hw/irdma/ctrl.c

1747

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, info->local_fence) |

drivers/infiniband/hw/irdma/ctrl.c

1748

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/ctrl.c

1749

FIELD_PREP(IRDMAQPSQ_REMOTE_ATOMICS_EN, info->remote_atomics_en) |

drivers/infiniband/hw/irdma/ctrl.c

1750

FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity);

drivers/infiniband/hw/irdma/ctrl.c

1778

hdr = FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_NOP) |

drivers/infiniband/hw/irdma/ctrl.c

1779

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, 1) |

drivers/infiniband/hw/irdma/ctrl.c

1780

FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity);

drivers/infiniband/hw/irdma/ctrl.c

1788

hdr = FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_GEN_RTS_AE) |

drivers/infiniband/hw/irdma/ctrl.c

1789

FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity);

drivers/infiniband/hw/irdma/ctrl.c

1817

FIELD_PREP(IRDMAQPSQ_GEN1_FRAG_LEN, size) |

drivers/infiniband/hw/irdma/ctrl.c

1818

FIELD_PREP(IRDMAQPSQ_GEN1_FRAG_STAG, stag));

drivers/infiniband/hw/irdma/ctrl.c

1821

FIELD_PREP(IRDMAQPSQ_FRAG_LEN, size) |

drivers/infiniband/hw/irdma/ctrl.c

1822

FIELD_PREP(IRDMAQPSQ_FRAG_STAG, stag) |

drivers/infiniband/hw/irdma/ctrl.c

1823

FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity));

drivers/infiniband/hw/irdma/ctrl.c

1827

hdr = FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_RDMA_SEND) |

drivers/infiniband/hw/irdma/ctrl.c

1828

FIELD_PREP(IRDMAQPSQ_STREAMMODE, 1) |

drivers/infiniband/hw/irdma/ctrl.c

1829

FIELD_PREP(IRDMAQPSQ_WAITFORRCVPDU, 1) |

drivers/infiniband/hw/irdma/ctrl.c

1830

FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity);

drivers/infiniband/hw/irdma/ctrl.c

1861

FIELD_PREP(IRDMAQPSQ_GEN1_FRAG_STAG, 0xabcd));

drivers/infiniband/hw/irdma/ctrl.c

1864

(u64)0xabcd | FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity));

drivers/infiniband/hw/irdma/ctrl.c

1866

hdr = FIELD_PREP(IRDMAQPSQ_REMSTAG, 0x1234) |

drivers/infiniband/hw/irdma/ctrl.c

1867

FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_RDMA_READ) |

drivers/infiniband/hw/irdma/ctrl.c

1868

FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity);

drivers/infiniband/hw/irdma/ctrl.c

1875

FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity));

drivers/infiniband/hw/irdma/ctrl.c

1877

hdr = FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_RDMA_WRITE) |

drivers/infiniband/hw/irdma/ctrl.c

1878

FIELD_PREP(IRDMAQPSQ_VALID, qp->qp_uk.swqe_polarity);

drivers/infiniband/hw/irdma/ctrl.c

204

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_MANAGE_ARP) |

drivers/infiniband/hw/irdma/ctrl.c

205

FIELD_PREP(IRDMA_CQPSQ_MAT_PERMANENT, (info->permanent ? 1 : 0)) |

drivers/infiniband/hw/irdma/ctrl.c

206

FIELD_PREP(IRDMA_CQPSQ_MAT_ENTRYVALID, 1) |

drivers/infiniband/hw/irdma/ctrl.c

207

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

238

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_MANAGE_ARP) |

drivers/infiniband/hw/irdma/ctrl.c

239

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

2477

FIELD_PREP(IRDMA_CQPSQ_STATS_HMC_FCN_INDEX, info->hmc_fcn_index));

drivers/infiniband/hw/irdma/ctrl.c

2480

temp = FIELD_PREP(IRDMA_CQPSQ_STATS_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/ctrl.c

2481

FIELD_PREP(IRDMA_CQPSQ_STATS_USE_INST, info->use_stats_inst) |

drivers/infiniband/hw/irdma/ctrl.c

2482

FIELD_PREP(IRDMA_CQPSQ_STATS_INST_INDEX,

drivers/infiniband/hw/irdma/ctrl.c

2484

FIELD_PREP(IRDMA_CQPSQ_STATS_USE_HMC_FCN_INDEX,

drivers/infiniband/hw/irdma/ctrl.c

2486

FIELD_PREP(IRDMA_CQPSQ_STATS_OP, IRDMA_CQP_OP_GATHER_STATS);

drivers/infiniband/hw/irdma/ctrl.c

2521

FIELD_PREP(IRDMA_CQPSQ_STATS_HMC_FCN_INDEX, info->hmc_fn_id));

drivers/infiniband/hw/irdma/ctrl.c

2522

temp = FIELD_PREP(IRDMA_CQPSQ_STATS_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/ctrl.c

2523

FIELD_PREP(IRDMA_CQPSQ_STATS_ALLOC_INST, alloc) |

drivers/infiniband/hw/irdma/ctrl.c

2524

FIELD_PREP(IRDMA_CQPSQ_STATS_USE_HMC_FCN_INDEX,

drivers/infiniband/hw/irdma/ctrl.c

2526

FIELD_PREP(IRDMA_CQPSQ_STATS_INST_INDEX, info->stats_idx) |

drivers/infiniband/hw/irdma/ctrl.c

2527

FIELD_PREP(IRDMA_CQPSQ_STATS_OP, IRDMA_CQP_OP_MANAGE_STATS);

drivers/infiniband/hw/irdma/ctrl.c

2562

FIELD_PREP(IRDMA_CQPSQ_UP_CNPOVERRIDE, info->cnp_up_override) |

drivers/infiniband/hw/irdma/ctrl.c

2563

FIELD_PREP(IRDMA_CQPSQ_UP_HMCFCNIDX, info->hmc_fcn_idx));

drivers/infiniband/hw/irdma/ctrl.c

2565

temp = FIELD_PREP(IRDMA_CQPSQ_UP_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/ctrl.c

2566

FIELD_PREP(IRDMA_CQPSQ_UP_USEVLAN, info->use_vlan) |

drivers/infiniband/hw/irdma/ctrl.c

2567

FIELD_PREP(IRDMA_CQPSQ_UP_USEOVERRIDE,

drivers/infiniband/hw/irdma/ctrl.c

2569

FIELD_PREP(IRDMA_CQPSQ_UP_OP, IRDMA_CQP_OP_UP_MAP);

drivers/infiniband/hw/irdma/ctrl.c

2600

FIELD_PREP(IRDMA_CQPSQ_WS_VSI, info->vsi) |

drivers/infiniband/hw/irdma/ctrl.c

2601

FIELD_PREP(IRDMA_CQPSQ_WS_WEIGHT, info->weight));

drivers/infiniband/hw/irdma/ctrl.c

2603

temp = FIELD_PREP(IRDMA_CQPSQ_WS_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/ctrl.c

2604

FIELD_PREP(IRDMA_CQPSQ_WS_NODEOP, node_op) |

drivers/infiniband/hw/irdma/ctrl.c

2605

FIELD_PREP(IRDMA_CQPSQ_WS_ENABLENODE, info->enable) |

drivers/infiniband/hw/irdma/ctrl.c

2606

FIELD_PREP(IRDMA_CQPSQ_WS_NODETYPE, info->type_leaf) |

drivers/infiniband/hw/irdma/ctrl.c

2607

FIELD_PREP(IRDMA_CQPSQ_WS_PRIOTYPE, info->prio_type) |

drivers/infiniband/hw/irdma/ctrl.c

2608

FIELD_PREP(IRDMA_CQPSQ_WS_TC, info->tc) |

drivers/infiniband/hw/irdma/ctrl.c

2609

FIELD_PREP(IRDMA_CQPSQ_WS_OP, IRDMA_CQP_OP_WORK_SCHED_NODE) |

drivers/infiniband/hw/irdma/ctrl.c

2610

FIELD_PREP(IRDMA_CQPSQ_WS_PARENTID, info->parent_id) |

drivers/infiniband/hw/irdma/ctrl.c

2611

FIELD_PREP(IRDMA_CQPSQ_WS_NODEID, info->id);

drivers/infiniband/hw/irdma/ctrl.c

2661

temp |= FIELD_PREP(IRDMA_CQPSQ_FWQE_RQMNERR,

drivers/infiniband/hw/irdma/ctrl.c

2663

FIELD_PREP(IRDMA_CQPSQ_FWQE_RQMJERR,

drivers/infiniband/hw/irdma/ctrl.c

2666

temp |= FIELD_PREP(IRDMA_CQPSQ_FWQE_SQMNERR,

drivers/infiniband/hw/irdma/ctrl.c

2668

FIELD_PREP(IRDMA_CQPSQ_FWQE_SQMJERR,

drivers/infiniband/hw/irdma/ctrl.c

2674

info->ae_code | FIELD_PREP(IRDMA_CQPSQ_FWQE_AESOURCE,

drivers/infiniband/hw/irdma/ctrl.c

2679

FIELD_PREP(IRDMA_CQPSQ_FWQE_ERR_SQ_IDX, info->err_sq_idx));

drivers/infiniband/hw/irdma/ctrl.c

2681

FIELD_PREP(IRDMA_CQPSQ_FWQE_ERR_RQ_IDX, info->err_rq_idx));

drivers/infiniband/hw/irdma/ctrl.c

2685

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_FLUSH_WQES) |

drivers/infiniband/hw/irdma/ctrl.c

2686

FIELD_PREP(IRDMA_CQPSQ_FWQE_GENERATE_AE, info->generate_ae) |

drivers/infiniband/hw/irdma/ctrl.c

2687

FIELD_PREP(IRDMA_CQPSQ_FWQE_USERFLCODE, info->userflushcode) |

drivers/infiniband/hw/irdma/ctrl.c

2688

FIELD_PREP(IRDMA_CQPSQ_FWQE_FLUSHSQ, flush_sq) |

drivers/infiniband/hw/irdma/ctrl.c

2689

FIELD_PREP(IRDMA_CQPSQ_FWQE_FLUSHRQ, flush_rq) |

drivers/infiniband/hw/irdma/ctrl.c

2690

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

2692

hdr |= FIELD_PREP(IRDMA_CQPSQ_FWQE_ERR_SQ_IDX_VALID, info->err_sq_idx_valid) |

drivers/infiniband/hw/irdma/ctrl.c

2693

FIELD_PREP(IRDMA_CQPSQ_FWQE_ERR_RQ_IDX_VALID, info->err_rq_idx_valid);

drivers/infiniband/hw/irdma/ctrl.c

2727

temp = info->ae_code | FIELD_PREP(IRDMA_CQPSQ_FWQE_AESOURCE,

drivers/infiniband/hw/irdma/ctrl.c

273

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_MANAGE_APBVT) |

drivers/infiniband/hw/irdma/ctrl.c

2731

hdr = qp->qp_uk.qp_id | FIELD_PREP(IRDMA_CQPSQ_OPCODE,

drivers/infiniband/hw/irdma/ctrl.c

2733

FIELD_PREP(IRDMA_CQPSQ_FWQE_GENERATE_AE, 1) |

drivers/infiniband/hw/irdma/ctrl.c

2734

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

274

FIELD_PREP(IRDMA_CQPSQ_MAPT_ADDPORT, info->add) |

drivers/infiniband/hw/irdma/ctrl.c

275

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

2768

hdr = FIELD_PREP(IRDMA_CQPSQ_UCTX_QPID, info->qp_id) |

drivers/infiniband/hw/irdma/ctrl.c

2769

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_UPLOAD_CONTEXT) |

drivers/infiniband/hw/irdma/ctrl.c

2770

FIELD_PREP(IRDMA_CQPSQ_UCTX_QPTYPE, info->qp_type) |

drivers/infiniband/hw/irdma/ctrl.c

2771

FIELD_PREP(IRDMA_CQPSQ_UCTX_RAWFORMAT, info->raw_format) |

drivers/infiniband/hw/irdma/ctrl.c

2772

FIELD_PREP(IRDMA_CQPSQ_UCTX_FREEZEQP, info->freeze_qp) |

drivers/infiniband/hw/irdma/ctrl.c

2773

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

2809

hdr = FIELD_PREP(IRDMA_CQPSQ_MPP_PPIDX, info->push_idx) |

drivers/infiniband/hw/irdma/ctrl.c

2810

FIELD_PREP(IRDMA_CQPSQ_MPP_PPTYPE, info->push_page_type) |

drivers/infiniband/hw/irdma/ctrl.c

2811

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_MANAGE_PUSH_PAGES) |

drivers/infiniband/hw/irdma/ctrl.c

2812

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/ctrl.c

2813

FIELD_PREP(IRDMA_CQPSQ_MPP_FREE_PAGE, info->free_page);

drivers/infiniband/hw/irdma/ctrl.c

2842

hdr = FIELD_PREP(IRDMA_CQPSQ_SUSPENDQP_QPID, qp->qp_uk.qp_id) |

drivers/infiniband/hw/irdma/ctrl.c

2843

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_SUSPEND_QP) |

drivers/infiniband/hw/irdma/ctrl.c

2844

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

2873

FIELD_PREP(IRDMA_CQPSQ_RESUMEQP_QSHANDLE, qp->qs_handle));

drivers/infiniband/hw/irdma/ctrl.c

2875

hdr = FIELD_PREP(IRDMA_CQPSQ_RESUMEQP_QPID, qp->qp_uk.qp_id) |

drivers/infiniband/hw/irdma/ctrl.c

2876

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_RESUME_QP) |

drivers/infiniband/hw/irdma/ctrl.c

2877

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

2952

FIELD_PREP(IRDMA_CQPSQ_CQ_SHADOW_READ_THRESHOLD, cq->shadow_read_threshold));

drivers/infiniband/hw/irdma/ctrl.c

2956

FIELD_PREP(IRDMA_CQPSQ_CQ_FIRSTPMPBLIDX, (cq->virtual_map ? cq->first_pm_pbl_idx : 0)));

drivers/infiniband/hw/irdma/ctrl.c

2958

FIELD_PREP(IRDMA_CQPSQ_TPHVAL, cq->tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

2959

FIELD_PREP(IRDMA_CQPSQ_VSIIDX, cq->vsi->vsi_idx));

drivers/infiniband/hw/irdma/ctrl.c

2964

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_CREATE_CQ) |

drivers/infiniband/hw/irdma/ctrl.c

2965

FIELD_PREP(IRDMA_CQPSQ_CQ_LPBLSIZE, cq->pbl_chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

2966

FIELD_PREP(IRDMA_CQPSQ_CQ_CHKOVERFLOW, check_overflow) |

drivers/infiniband/hw/irdma/ctrl.c

2967

FIELD_PREP(IRDMA_CQPSQ_CQ_VIRTMAP, cq->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

2968

FIELD_PREP(IRDMA_CQPSQ_CQ_CQID_HIGH, cq->cq_uk.cq_id >> 22) |

drivers/infiniband/hw/irdma/ctrl.c

2969

FIELD_PREP(IRDMA_CQPSQ_CQ_CEQID_HIGH,

drivers/infiniband/hw/irdma/ctrl.c

2971

FIELD_PREP(IRDMA_CQPSQ_CQ_ENCEQEMASK, cq->ceqe_mask) |

drivers/infiniband/hw/irdma/ctrl.c

2972

FIELD_PREP(IRDMA_CQPSQ_CQ_CEQIDVALID, cq->ceq_id_valid) |

drivers/infiniband/hw/irdma/ctrl.c

2973

FIELD_PREP(IRDMA_CQPSQ_TPHEN, cq->tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

2974

FIELD_PREP(IRDMA_CQPSQ_CQ_AVOIDMEMCNFLCT,

drivers/infiniband/hw/irdma/ctrl.c

2976

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

3015

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_DESTROY_CQ) |

drivers/infiniband/hw/irdma/ctrl.c

3016

FIELD_PREP(IRDMA_CQPSQ_CQ_LPBLSIZE, cq->pbl_chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

3017

FIELD_PREP(IRDMA_CQPSQ_CQ_VIRTMAP, cq->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

3018

FIELD_PREP(IRDMA_CQPSQ_CQ_ENCEQEMASK, cq->ceqe_mask) |

drivers/infiniband/hw/irdma/ctrl.c

3019

FIELD_PREP(IRDMA_CQPSQ_CQ_CEQIDVALID, cq->ceq_id_valid) |

drivers/infiniband/hw/irdma/ctrl.c

3020

FIELD_PREP(IRDMA_CQPSQ_TPHEN, cq->tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

3021

FIELD_PREP(IRDMA_CQPSQ_CQ_AVOIDMEMCNFLCT, cq->cq_uk.avoid_mem_cflct) |

drivers/infiniband/hw/irdma/ctrl.c

3022

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

3078

FIELD_PREP(IRDMA_CQPSQ_CQ_SHADOW_READ_THRESHOLD, info->shadow_read_threshold));

drivers/infiniband/hw/irdma/ctrl.c

3083

FIELD_PREP(IRDMA_CQPSQ_TPHVAL, cq->tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

3084

FIELD_PREP(IRDMA_CQPSQ_VSIIDX, cq->vsi->vsi_idx));

drivers/infiniband/hw/irdma/ctrl.c

3087

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_MODIFY_CQ) |

drivers/infiniband/hw/irdma/ctrl.c

3088

FIELD_PREP(IRDMA_CQPSQ_CQ_CQRESIZE, info->cq_resize) |

drivers/infiniband/hw/irdma/ctrl.c

3089

FIELD_PREP(IRDMA_CQPSQ_CQ_LPBLSIZE, info->pbl_chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

3090

FIELD_PREP(IRDMA_CQPSQ_CQ_CHKOVERFLOW, info->check_overflow) |

drivers/infiniband/hw/irdma/ctrl.c

3091

FIELD_PREP(IRDMA_CQPSQ_CQ_VIRTMAP, info->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

3092

FIELD_PREP(IRDMA_CQPSQ_CQ_ENCEQEMASK, cq->ceqe_mask) |

drivers/infiniband/hw/irdma/ctrl.c

3093

FIELD_PREP(IRDMA_CQPSQ_TPHEN, cq->tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

3094

FIELD_PREP(IRDMA_CQPSQ_CQ_AVOIDMEMCNFLCT,

drivers/infiniband/hw/irdma/ctrl.c

3096

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

324

qw1 = FIELD_PREP(IRDMA_CQPSQ_QHASH_QPN, info->qp_num) |

drivers/infiniband/hw/irdma/ctrl.c

325

FIELD_PREP(IRDMA_CQPSQ_QHASH_DEST_PORT, info->dest_port);

drivers/infiniband/hw/irdma/ctrl.c

328

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR3, info->dest_ip[0]));

drivers/infiniband/hw/irdma/ctrl.c

331

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR0, info->dest_ip[0]) |

drivers/infiniband/hw/irdma/ctrl.c

332

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR1, info->dest_ip[1]));

drivers/infiniband/hw/irdma/ctrl.c

335

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR2, info->dest_ip[2]) |

drivers/infiniband/hw/irdma/ctrl.c

336

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR3, info->dest_ip[3]));

drivers/infiniband/hw/irdma/ctrl.c

338

qw2 = FIELD_PREP(IRDMA_CQPSQ_QHASH_QS_HANDLE,

drivers/infiniband/hw/irdma/ctrl.c

341

qw2 |= FIELD_PREP(IRDMA_CQPSQ_QHASH_VLANID, info->vlan_id);

drivers/infiniband/hw/irdma/ctrl.c

344

qw1 |= FIELD_PREP(IRDMA_CQPSQ_QHASH_SRC_PORT, info->src_port);

drivers/infiniband/hw/irdma/ctrl.c

347

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR0, info->src_ip[0]) |

drivers/infiniband/hw/irdma/ctrl.c

348

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR1, info->src_ip[1]));

drivers/infiniband/hw/irdma/ctrl.c

350

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR2, info->src_ip[2]) |

drivers/infiniband/hw/irdma/ctrl.c

351

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR3, info->src_ip[3]));

drivers/infiniband/hw/irdma/ctrl.c

354

FIELD_PREP(IRDMA_CQPSQ_QHASH_ADDR3, info->src_ip[0]));

drivers/infiniband/hw/irdma/ctrl.c

359

temp = FIELD_PREP(IRDMA_CQPSQ_QHASH_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/ctrl.c

360

FIELD_PREP(IRDMA_CQPSQ_QHASH_OPCODE,

drivers/infiniband/hw/irdma/ctrl.c

362

FIELD_PREP(IRDMA_CQPSQ_QHASH_MANAGE, info->manage) |

drivers/infiniband/hw/irdma/ctrl.c

363

FIELD_PREP(IRDMA_CQPSQ_QHASH_IPV4VALID, info->ipv4_valid) |

drivers/infiniband/hw/irdma/ctrl.c

364

FIELD_PREP(IRDMA_CQPSQ_QHASH_VLANVALID, info->vlan_valid) |

drivers/infiniband/hw/irdma/ctrl.c

365

FIELD_PREP(IRDMA_CQPSQ_QHASH_ENTRYTYPE, info->entry_type);

drivers/infiniband/hw/irdma/ctrl.c

3690

temp = FIELD_PREP(IRDMA_CQPHC_SQSIZE, cqp->hw_sq_size) |

drivers/infiniband/hw/irdma/ctrl.c

3691

FIELD_PREP(IRDMA_CQPHC_SVER, cqp->struct_ver) |

drivers/infiniband/hw/irdma/ctrl.c

3692

FIELD_PREP(IRDMA_CQPHC_DISABLE_PFPDUS, cqp->disable_packed) |

drivers/infiniband/hw/irdma/ctrl.c

3693

FIELD_PREP(IRDMA_CQPHC_CEQPERVF, cqp->ceqs_per_vf);

drivers/infiniband/hw/irdma/ctrl.c

3695

temp |= FIELD_PREP(IRDMA_CQPHC_ROCEV2_RTO_POLICY,

drivers/infiniband/hw/irdma/ctrl.c

3697

FIELD_PREP(IRDMA_CQPHC_PROTOCOL_USED,

drivers/infiniband/hw/irdma/ctrl.c

3701

temp |= FIELD_PREP(IRDMA_CQPHC_EN_FINE_GRAINED_TIMERS,

drivers/infiniband/hw/irdma/ctrl.c

3707

temp = FIELD_PREP(IRDMA_CQPHC_ENABLED_VFS, cqp->ena_vf_count) |

drivers/infiniband/hw/irdma/ctrl.c

3708

FIELD_PREP(IRDMA_CQPHC_HMC_PROFILE, cqp->hmc_profile);

drivers/infiniband/hw/irdma/ctrl.c

3711

temp |= FIELD_PREP(IRDMA_CQPHC_OOISC_BLKSIZE,

drivers/infiniband/hw/irdma/ctrl.c

3713

FIELD_PREP(IRDMA_CQPHC_RRSP_BLKSIZE,

drivers/infiniband/hw/irdma/ctrl.c

3715

FIELD_PREP(IRDMA_CQPHC_Q1_BLKSIZE, cqp->q1_blksize) |

drivers/infiniband/hw/irdma/ctrl.c

3716

FIELD_PREP(IRDMA_CQPHC_XMIT_BLKSIZE,

drivers/infiniband/hw/irdma/ctrl.c

3718

FIELD_PREP(IRDMA_CQPHC_BLKSIZES_VALID,

drivers/infiniband/hw/irdma/ctrl.c

3720

FIELD_PREP(IRDMA_CQPHC_TIMESTAMP_OVERRIDE,

drivers/infiniband/hw/irdma/ctrl.c

3722

FIELD_PREP(IRDMA_CQPHC_TS_SHIFT, cqp->ts_shift);

drivers/infiniband/hw/irdma/ctrl.c

3725

temp = FIELD_PREP(IRDMA_CQPHC_HW_MAJVER, cqp->hw_maj_ver) |

drivers/infiniband/hw/irdma/ctrl.c

3726

FIELD_PREP(IRDMA_CQPHC_HW_MINVER, cqp->hw_min_ver);

drivers/infiniband/hw/irdma/ctrl.c

3728

temp |= FIELD_PREP(IRDMA_CQPHC_MIN_RATE, cqp->dcqcn_params.min_rate) |

drivers/infiniband/hw/irdma/ctrl.c

3729

FIELD_PREP(IRDMA_CQPHC_MIN_DEC_FACTOR, cqp->dcqcn_params.min_dec_factor);

drivers/infiniband/hw/irdma/ctrl.c

3735

temp |= FIELD_PREP(IRDMA_CQPHC_DCQCN_T, cqp->dcqcn_params.dcqcn_t) |

drivers/infiniband/hw/irdma/ctrl.c

3736

FIELD_PREP(IRDMA_CQPHC_RAI_FACTOR, cqp->dcqcn_params.rai_factor) |

drivers/infiniband/hw/irdma/ctrl.c

3737

FIELD_PREP(IRDMA_CQPHC_HAI_FACTOR, cqp->dcqcn_params.hai_factor);

drivers/infiniband/hw/irdma/ctrl.c

3742

temp |= FIELD_PREP(IRDMA_CQPHC_DCQCN_B, cqp->dcqcn_params.dcqcn_b) |

drivers/infiniband/hw/irdma/ctrl.c

3743

FIELD_PREP(IRDMA_CQPHC_DCQCN_F, cqp->dcqcn_params.dcqcn_f) |

drivers/infiniband/hw/irdma/ctrl.c

3744

FIELD_PREP(IRDMA_CQPHC_CC_CFG_VALID, cqp->dcqcn_params.cc_cfg_valid) |

drivers/infiniband/hw/irdma/ctrl.c

3745

FIELD_PREP(IRDMA_CQPHC_RREDUCE_MPERIOD, cqp->dcqcn_params.rreduce_mperiod);

drivers/infiniband/hw/irdma/ctrl.c

3874

temp_val = FIELD_PREP(IRDMA_CQ_DBSA_ARM_SEQ_NUM, arm_seq_num) |

drivers/infiniband/hw/irdma/ctrl.c

3875

FIELD_PREP(IRDMA_CQ_DBSA_SW_CQ_SELECT, sw_cq_sel) |

drivers/infiniband/hw/irdma/ctrl.c

3876

FIELD_PREP(IRDMA_CQ_DBSA_ARM_NEXT_SE, arm_next_se) |

drivers/infiniband/hw/irdma/ctrl.c

3877

FIELD_PREP(IRDMA_CQ_DBSA_ARM_NEXT, 1);

drivers/infiniband/hw/irdma/ctrl.c

4133

hdr = FIELD_PREP(IRDMA_CQPSQ_MHMC_VFIDX, info->vf_id) |

drivers/infiniband/hw/irdma/ctrl.c

4134

FIELD_PREP(IRDMA_CQPSQ_OPCODE,

drivers/infiniband/hw/irdma/ctrl.c

4136

FIELD_PREP(IRDMA_CQPSQ_MHMC_FREEPMFN, info->free_fcn) |

drivers/infiniband/hw/irdma/ctrl.c

4137

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

4188

hdr = FIELD_PREP(IRDMA_CQPSQ_BUFSIZE, IRDMA_COMMIT_FPM_BUF_SIZE) |

drivers/infiniband/hw/irdma/ctrl.c

4189

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_COMMIT_FPM_VAL) |

drivers/infiniband/hw/irdma/ctrl.c

4190

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

4249

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_QUERY_FPM_VAL) |

drivers/infiniband/hw/irdma/ctrl.c

4250

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

4337

FIELD_PREP(IRDMA_CQPSQ_TPHVAL, ceq->tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

4338

FIELD_PREP(IRDMA_CQPSQ_PASID, ceq->pasid) |

drivers/infiniband/hw/irdma/ctrl.c

4339

FIELD_PREP(IRDMA_CQPSQ_VSIIDX, ceq->vsi_idx));

drivers/infiniband/hw/irdma/ctrl.c

4340

hdr = FIELD_PREP(IRDMA_CQPSQ_CEQ_CEQID, ceq->ceq_id) |

drivers/infiniband/hw/irdma/ctrl.c

4341

FIELD_PREP(IRDMA_CQPSQ_CEQ_CEQID_HIGH, ceq->ceq_id >> 10) |

drivers/infiniband/hw/irdma/ctrl.c

4342

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_CREATE_CEQ) |

drivers/infiniband/hw/irdma/ctrl.c

4343

FIELD_PREP(IRDMA_CQPSQ_CEQ_LPBLSIZE, ceq->pbl_chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

4344

FIELD_PREP(IRDMA_CQPSQ_CEQ_VMAP, ceq->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

4345

FIELD_PREP(IRDMA_CQPSQ_CEQ_ITRNOEXPIRE, ceq->itr_no_expire) |

drivers/infiniband/hw/irdma/ctrl.c

4346

FIELD_PREP(IRDMA_CQPSQ_TPHEN, ceq->tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

4347

FIELD_PREP(IRDMA_CQPSQ_PASID_VALID, ceq->pasid_valid) |

drivers/infiniband/hw/irdma/ctrl.c

4348

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

4428

FIELD_PREP(IRDMA_CQPSQ_PASID, ceq->pasid));

drivers/infiniband/hw/irdma/ctrl.c

4430

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_DESTROY_CEQ) |

drivers/infiniband/hw/irdma/ctrl.c

4431

FIELD_PREP(IRDMA_CQPSQ_CEQ_LPBLSIZE, ceq->pbl_chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

4432

FIELD_PREP(IRDMA_CQPSQ_CEQ_VMAP, ceq->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

4433

FIELD_PREP(IRDMA_CQPSQ_TPHEN, ceq->tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

4434

FIELD_PREP(IRDMA_CQPSQ_PASID_VALID, ceq->pasid_valid) |

drivers/infiniband/hw/irdma/ctrl.c

4435

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

4585

FIELD_PREP(IRDMA_CQPSQ_PASID, aeq->pasid));

drivers/infiniband/hw/irdma/ctrl.c

4587

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_CREATE_AEQ) |

drivers/infiniband/hw/irdma/ctrl.c

4588

FIELD_PREP(IRDMA_CQPSQ_AEQ_LPBLSIZE, aeq->pbl_chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

4589

FIELD_PREP(IRDMA_CQPSQ_AEQ_VMAP, aeq->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

4590

FIELD_PREP(IRDMA_CQPSQ_PASID_VALID, aeq->pasid_valid) |

drivers/infiniband/hw/irdma/ctrl.c

4591

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

4630

FIELD_PREP(IRDMA_CQPSQ_PASID, aeq->pasid));

drivers/infiniband/hw/irdma/ctrl.c

4631

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_DESTROY_AEQ) |

drivers/infiniband/hw/irdma/ctrl.c

4632

FIELD_PREP(IRDMA_CQPSQ_AEQ_LPBLSIZE, aeq->pbl_chunk_size) |

drivers/infiniband/hw/irdma/ctrl.c

4633

FIELD_PREP(IRDMA_CQPSQ_AEQ_VMAP, aeq->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

4634

FIELD_PREP(IRDMA_CQPSQ_PASID_VALID, aeq->pasid_valid) |

drivers/infiniband/hw/irdma/ctrl.c

4635

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

4965

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_DESTROY_CQ) |

drivers/infiniband/hw/irdma/ctrl.c

4966

FIELD_PREP(IRDMA_CQPSQ_CQ_ENCEQEMASK, ccq->ceqe_mask) |

drivers/infiniband/hw/irdma/ctrl.c

4967

FIELD_PREP(IRDMA_CQPSQ_CQ_CEQIDVALID, ccq->ceq_id_valid) |

drivers/infiniband/hw/irdma/ctrl.c

4968

FIELD_PREP(IRDMA_CQPSQ_TPHEN, ccq->tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

4969

FIELD_PREP(IRDMA_CQPSQ_CQ_AVOIDMEMCNFLCT, ccq->cq_uk.avoid_mem_cflct) |

drivers/infiniband/hw/irdma/ctrl.c

4970

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

514

FIELD_PREP(IRDMA_CQPSQ_SRQ_SRQ_LIMIT, srq->srq_limit) |

drivers/infiniband/hw/irdma/ctrl.c

5148

data |= FIELD_PREP(IRDMA_CQPSQ_UPESD_HMCFNID, info->hmc_fn_id);

drivers/infiniband/hw/irdma/ctrl.c

515

FIELD_PREP(IRDMA_CQPSQ_SRQ_RQSIZE, srq->hw_srq_size) |

drivers/infiniband/hw/irdma/ctrl.c

5154

(FIELD_PREP(IRDMA_CQPSQ_UPESD_SDCMD, info->entry[2].cmd) |

drivers/infiniband/hw/irdma/ctrl.c

5155

FIELD_PREP(IRDMA_CQPSQ_UPESD_ENTRY_VALID, 1)));

drivers/infiniband/hw/irdma/ctrl.c

516

FIELD_PREP(IRDMA_CQPSQ_SRQ_RQ_WQE_SIZE, srq->srq_uk.wqe_size));

drivers/infiniband/hw/irdma/ctrl.c

5161

(FIELD_PREP(IRDMA_CQPSQ_UPESD_SDCMD, info->entry[1].cmd) |

drivers/infiniband/hw/irdma/ctrl.c

5162

FIELD_PREP(IRDMA_CQPSQ_UPESD_ENTRY_VALID, 1)));

drivers/infiniband/hw/irdma/ctrl.c

5168

FIELD_PREP(IRDMA_CQPSQ_UPESD_SDCMD, info->entry[0].cmd));

drivers/infiniband/hw/irdma/ctrl.c

5176

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_UPDATE_PE_SDS) |

drivers/infiniband/hw/irdma/ctrl.c

5177

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/ctrl.c

5178

FIELD_PREP(IRDMA_CQPSQ_UPESD_ENTRY_COUNT, mem_entries);

drivers/infiniband/hw/irdma/ctrl.c

519

FIELD_PREP(IRDMA_CQPSQ_SRQ_PD_ID, srq->pd->pd_id));

drivers/infiniband/hw/irdma/ctrl.c

521

FIELD_PREP(IRDMA_CQPSQ_SRQ_PHYSICAL_BUFFER_ADDR,

drivers/infiniband/hw/irdma/ctrl.c

525

FIELD_PREP(IRDMA_CQPSQ_SRQ_DB_SHADOW_ADDR,

drivers/infiniband/hw/irdma/ctrl.c

5258

FIELD_PREP(IRDMA_SHMC_PAGE_ALLOCATED_HMC_FN_ID, hmc_fn_id));

drivers/infiniband/hw/irdma/ctrl.c

5260

hdr = FIELD_PREP(IRDMA_CQPSQ_OPCODE,

drivers/infiniband/hw/irdma/ctrl.c

5262

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

529

FIELD_PREP(IRDMA_CQPSQ_SRQ_FIRST_PM_PBL_IDX,

drivers/infiniband/hw/irdma/ctrl.c

533

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_CREATE_SRQ) |

drivers/infiniband/hw/irdma/ctrl.c

534

FIELD_PREP(IRDMA_CQPSQ_SRQ_LEAF_PBL_SIZE, srq->leaf_pbl_size) |

drivers/infiniband/hw/irdma/ctrl.c

535

FIELD_PREP(IRDMA_CQPSQ_SRQ_VIRTMAP, srq->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

5358

temp = FIELD_PREP(IRDMA_CQPSQ_QUERY_RDMA_FEATURES_WQEVALID,

drivers/infiniband/hw/irdma/ctrl.c

536

FIELD_PREP(IRDMA_CQPSQ_SRQ_ARM_LIMIT_EVENT,

drivers/infiniband/hw/irdma/ctrl.c

5360

FIELD_PREP(IRDMA_CQPSQ_QUERY_RDMA_FEATURES_BUF_LEN, buf->size) |

drivers/infiniband/hw/irdma/ctrl.c

5361

FIELD_PREP(IRDMA_CQPSQ_UP_OP, IRDMA_CQP_OP_QUERY_RDMA_FEATURES);

drivers/infiniband/hw/irdma/ctrl.c

538

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

578

FIELD_PREP(IRDMA_CQPSQ_SRQ_SRQ_LIMIT, info->srq_limit) |

drivers/infiniband/hw/irdma/ctrl.c

579

FIELD_PREP(IRDMA_CQPSQ_SRQ_RQSIZE, srq->hw_srq_size) |

drivers/infiniband/hw/irdma/ctrl.c

580

FIELD_PREP(IRDMA_CQPSQ_SRQ_RQ_WQE_SIZE, srq->srq_uk.wqe_size));

drivers/infiniband/hw/irdma/ctrl.c

582

FIELD_PREP(IRDMA_CQPSQ_SRQ_SRQCTX, srq->srq_uk.srq_id));

drivers/infiniband/hw/irdma/ctrl.c

584

FIELD_PREP(IRDMA_CQPSQ_SRQ_PD_ID, srq->pd->pd_id));

drivers/infiniband/hw/irdma/ctrl.c

586

FIELD_PREP(IRDMA_CQPSQ_SRQ_PHYSICAL_BUFFER_ADDR,

drivers/infiniband/hw/irdma/ctrl.c

590

FIELD_PREP(IRDMA_CQPSQ_SRQ_DB_SHADOW_ADDR,

drivers/infiniband/hw/irdma/ctrl.c

594

FIELD_PREP(IRDMA_CQPSQ_SRQ_FIRST_PM_PBL_IDX,

drivers/infiniband/hw/irdma/ctrl.c

598

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_MODIFY_SRQ) |

drivers/infiniband/hw/irdma/ctrl.c

599

FIELD_PREP(IRDMA_CQPSQ_SRQ_LEAF_PBL_SIZE, srq->leaf_pbl_size) |

drivers/infiniband/hw/irdma/ctrl.c

600

FIELD_PREP(IRDMA_CQPSQ_SRQ_VIRTMAP, srq->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

601

FIELD_PREP(IRDMA_CQPSQ_SRQ_ARM_LIMIT_EVENT,

drivers/infiniband/hw/irdma/ctrl.c

603

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

6360

reg_val = FIELD_PREP(IRDMA_PFINT_AEQCTL_CAUSE_ENA, enable) |

drivers/infiniband/hw/irdma/ctrl.c

6361

FIELD_PREP(IRDMA_PFINT_AEQCTL_MSIX_INDX, idx) |

drivers/infiniband/hw/irdma/ctrl.c

6362

FIELD_PREP(IRDMA_PFINT_AEQCTL_ITR_INDX, 3);

drivers/infiniband/hw/irdma/ctrl.c

638

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_DESTROY_SRQ) |

drivers/infiniband/hw/irdma/ctrl.c

639

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

679

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_CREATE_QP) |

drivers/infiniband/hw/irdma/ctrl.c

680

FIELD_PREP(IRDMA_CQPSQ_QP_ORDVALID, (info->ord_valid ? 1 : 0)) |

drivers/infiniband/hw/irdma/ctrl.c

681

FIELD_PREP(IRDMA_CQPSQ_QP_TOECTXVALID, info->tcp_ctx_valid) |

drivers/infiniband/hw/irdma/ctrl.c

682

FIELD_PREP(IRDMA_CQPSQ_QP_MACVALID, info->mac_valid) |

drivers/infiniband/hw/irdma/ctrl.c

683

FIELD_PREP(IRDMA_CQPSQ_QP_QPTYPE, qp->qp_uk.qp_type) |

drivers/infiniband/hw/irdma/ctrl.c

684

FIELD_PREP(IRDMA_CQPSQ_QP_VQ, qp->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

685

FIELD_PREP(IRDMA_CQPSQ_QP_FORCELOOPBACK, info->force_lpb) |

drivers/infiniband/hw/irdma/ctrl.c

686

FIELD_PREP(IRDMA_CQPSQ_QP_CQNUMVALID, info->cq_num_valid) |

drivers/infiniband/hw/irdma/ctrl.c

687

FIELD_PREP(IRDMA_CQPSQ_QP_ARPTABIDXVALID,

drivers/infiniband/hw/irdma/ctrl.c

689

FIELD_PREP(IRDMA_CQPSQ_QP_NEXTIWSTATE, info->next_iwarp_state) |

drivers/infiniband/hw/irdma/ctrl.c

690

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

735

FIELD_PREP(IRDMA_CQPSQ_QP_NEWMSS, info->new_mss) |

drivers/infiniband/hw/irdma/ctrl.c

736

FIELD_PREP(IRDMA_CQPSQ_QP_TERMLEN, term_len));

drivers/infiniband/hw/irdma/ctrl.c

741

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_MODIFY_QP) |

drivers/infiniband/hw/irdma/ctrl.c

742

FIELD_PREP(IRDMA_CQPSQ_QP_ORDVALID, info->ord_valid) |

drivers/infiniband/hw/irdma/ctrl.c

743

FIELD_PREP(IRDMA_CQPSQ_QP_TOECTXVALID, info->tcp_ctx_valid) |

drivers/infiniband/hw/irdma/ctrl.c

744

FIELD_PREP(IRDMA_CQPSQ_QP_CACHEDVARVALID,

drivers/infiniband/hw/irdma/ctrl.c

746

FIELD_PREP(IRDMA_CQPSQ_QP_VQ, qp->virtual_map) |

drivers/infiniband/hw/irdma/ctrl.c

747

FIELD_PREP(IRDMA_CQPSQ_QP_FORCELOOPBACK, info->force_lpb) |

drivers/infiniband/hw/irdma/ctrl.c

748

FIELD_PREP(IRDMA_CQPSQ_QP_CQNUMVALID, info->cq_num_valid) |

drivers/infiniband/hw/irdma/ctrl.c

749

FIELD_PREP(IRDMA_CQPSQ_QP_MACVALID, info->mac_valid) |

drivers/infiniband/hw/irdma/ctrl.c

750

FIELD_PREP(IRDMA_CQPSQ_QP_QPTYPE, qp->qp_uk.qp_type) |

drivers/infiniband/hw/irdma/ctrl.c

751

FIELD_PREP(IRDMA_CQPSQ_QP_MSSCHANGE, info->mss_change) |

drivers/infiniband/hw/irdma/ctrl.c

752

FIELD_PREP(IRDMA_CQPSQ_QP_REMOVEHASHENTRY,

drivers/infiniband/hw/irdma/ctrl.c

754

FIELD_PREP(IRDMA_CQPSQ_QP_TERMACT, term_actions) |

drivers/infiniband/hw/irdma/ctrl.c

755

FIELD_PREP(IRDMA_CQPSQ_QP_RESETCON, info->reset_tcp_conn) |

drivers/infiniband/hw/irdma/ctrl.c

756

FIELD_PREP(IRDMA_CQPSQ_QP_ARPTABIDXVALID,

drivers/infiniband/hw/irdma/ctrl.c

758

FIELD_PREP(IRDMA_CQPSQ_QP_NEXTIWSTATE, info->next_iwarp_state) |

drivers/infiniband/hw/irdma/ctrl.c

759

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

796

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_DESTROY_QP) |

drivers/infiniband/hw/irdma/ctrl.c

797

FIELD_PREP(IRDMA_CQPSQ_QP_QPTYPE, qp->qp_uk.qp_type) |

drivers/infiniband/hw/irdma/ctrl.c

798

FIELD_PREP(IRDMA_CQPSQ_QP_IGNOREMWBOUND, ignore_mw_bnd) |

drivers/infiniband/hw/irdma/ctrl.c

799

FIELD_PREP(IRDMA_CQPSQ_QP_REMOVEHASHENTRY, remove_hash_idx) |

drivers/infiniband/hw/irdma/ctrl.c

800

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/ctrl.c

868

FIELD_PREP(IRDMAQPC_RQWQESIZE, qp->qp_uk.rq_wqe_size) |

drivers/infiniband/hw/irdma/ctrl.c

869

FIELD_PREP(IRDMAQPC_RCVTPHEN, qp->rcv_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

870

FIELD_PREP(IRDMAQPC_XMITTPHEN, qp->xmit_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

871

FIELD_PREP(IRDMAQPC_RQTPHEN, qp->rq_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

872

FIELD_PREP(IRDMAQPC_SQTPHEN, qp->sq_tph_en) |

drivers/infiniband/hw/irdma/ctrl.c

873

FIELD_PREP(IRDMAQPC_PPIDX, push_idx) |

drivers/infiniband/hw/irdma/ctrl.c

874

FIELD_PREP(IRDMAQPC_PMENA, push_mode_en) |

drivers/infiniband/hw/irdma/ctrl.c

875

FIELD_PREP(IRDMAQPC_PDIDXHI, roce_info->pd_id >> 16) |

drivers/infiniband/hw/irdma/ctrl.c

876

FIELD_PREP(IRDMAQPC_DC_TCP_EN, roce_info->dctcp_en) |

drivers/infiniband/hw/irdma/ctrl.c

877

FIELD_PREP(IRDMAQPC_ERR_RQ_IDX_VALID, roce_info->err_rq_idx_valid) |

drivers/infiniband/hw/irdma/ctrl.c

878

FIELD_PREP(IRDMAQPC_ISQP1, roce_info->is_qp1) |

drivers/infiniband/hw/irdma/ctrl.c

879

FIELD_PREP(IRDMAQPC_ROCE_TVER, roce_info->roce_tver) |

drivers/infiniband/hw/irdma/ctrl.c

880

FIELD_PREP(IRDMAQPC_IPV4, udp->ipv4) |

drivers/infiniband/hw/irdma/ctrl.c

881

FIELD_PREP(IRDMAQPC_INSERTVLANTAG, udp->insert_vlan_tag));

drivers/infiniband/hw/irdma/ctrl.c

888

FIELD_PREP(IRDMAQPC_RQSIZE, qp->hw_rq_size) |

drivers/infiniband/hw/irdma/ctrl.c

889

FIELD_PREP(IRDMAQPC_SQSIZE, qp->hw_sq_size) |

drivers/infiniband/hw/irdma/ctrl.c

890

FIELD_PREP(IRDMAQPC_TTL, udp->ttl) | FIELD_PREP(IRDMAQPC_TOS, udp->tos) |

drivers/infiniband/hw/irdma/ctrl.c

891

FIELD_PREP(IRDMAQPC_SRCPORTNUM, udp->src_port) |

drivers/infiniband/hw/irdma/ctrl.c

892

FIELD_PREP(IRDMAQPC_DESTPORTNUM, udp->dst_port));

drivers/infiniband/hw/irdma/ctrl.c

894

FIELD_PREP(IRDMAQPC_DESTIPADDR2, udp->dest_ip_addr[2]) |

drivers/infiniband/hw/irdma/ctrl.c

895

FIELD_PREP(IRDMAQPC_DESTIPADDR3, udp->dest_ip_addr[3]));

drivers/infiniband/hw/irdma/ctrl.c

897

FIELD_PREP(IRDMAQPC_DESTIPADDR0, udp->dest_ip_addr[0]) |

drivers/infiniband/hw/irdma/ctrl.c

898

FIELD_PREP(IRDMAQPC_DESTIPADDR1, udp->dest_ip_addr[1]));

drivers/infiniband/hw/irdma/ctrl.c

900

FIELD_PREP(IRDMAQPC_SNDMSS, udp->snd_mss) |

drivers/infiniband/hw/irdma/ctrl.c

901

FIELD_PREP(IRDMAQPC_VLANTAG, udp->vlan_tag) |

drivers/infiniband/hw/irdma/ctrl.c

902

FIELD_PREP(IRDMAQPC_ARPIDX, udp->arp_idx));

drivers/infiniband/hw/irdma/ctrl.c

904

FIELD_PREP(IRDMAQPC_PKEY, roce_info->p_key) |

drivers/infiniband/hw/irdma/ctrl.c

905

FIELD_PREP(IRDMAQPC_PDIDX, roce_info->pd_id) |

drivers/infiniband/hw/irdma/ctrl.c

906

FIELD_PREP(IRDMAQPC_ACKCREDITS, roce_info->ack_credits) |

drivers/infiniband/hw/irdma/ctrl.c

907

FIELD_PREP(IRDMAQPC_FLOWLABEL, udp->flow_label));

drivers/infiniband/hw/irdma/ctrl.c

909

FIELD_PREP(IRDMAQPC_QKEY, roce_info->qkey) |

drivers/infiniband/hw/irdma/ctrl.c

910

FIELD_PREP(IRDMAQPC_DESTQP, roce_info->dest_qp));

drivers/infiniband/hw/irdma/ctrl.c

912

FIELD_PREP(IRDMAQPC_PSNNXT, udp->psn_nxt) |

drivers/infiniband/hw/irdma/ctrl.c

913

FIELD_PREP(IRDMAQPC_LSN, udp->lsn));

drivers/infiniband/hw/irdma/ctrl.c

915

FIELD_PREP(IRDMAQPC_EPSN, udp->epsn));

drivers/infiniband/hw/irdma/ctrl.c

917

FIELD_PREP(IRDMAQPC_PSNMAX, udp->psn_max) |

drivers/infiniband/hw/irdma/ctrl.c

918

FIELD_PREP(IRDMAQPC_PSNUNA, udp->psn_una));

drivers/infiniband/hw/irdma/ctrl.c

920

FIELD_PREP(IRDMAQPC_CWNDROCE, udp->cwnd));

drivers/infiniband/hw/irdma/ctrl.c

922

FIELD_PREP(IRDMAQPC_ERR_RQ_IDX, roce_info->err_rq_idx) |

drivers/infiniband/hw/irdma/ctrl.c

923

FIELD_PREP(IRDMAQPC_RNRNAK_THRESH, udp->rnr_nak_thresh) |

drivers/infiniband/hw/irdma/ctrl.c

924

FIELD_PREP(IRDMAQPC_REXMIT_THRESH, udp->rexmit_thresh) |

drivers/infiniband/hw/irdma/ctrl.c

925

FIELD_PREP(IRDMAQPC_RTOMIN, roce_info->rtomin));

drivers/infiniband/hw/irdma/ctrl.c

927

FIELD_PREP(IRDMAQPC_TXCQNUM, info->send_cq_num) |

drivers/infiniband/hw/irdma/ctrl.c

928

FIELD_PREP(IRDMAQPC_RXCQNUM, info->rcv_cq_num));

drivers/infiniband/hw/irdma/ctrl.c

930

FIELD_PREP(IRDMAQPC_STAT_INDEX, info->stats_idx));

drivers/infiniband/hw/irdma/ctrl.c

933

FIELD_PREP(IRDMAQPC_ORDSIZE, roce_info->ord_size) |

drivers/infiniband/hw/irdma/ctrl.c

934

FIELD_PREP(IRDMAQPC_IRDSIZE, irdma_sc_get_encoded_ird_size(roce_info->ird_size)) |

drivers/infiniband/hw/irdma/ctrl.c

935

FIELD_PREP(IRDMAQPC_WRRDRSPOK, roce_info->wr_rdresp_en) |

drivers/infiniband/hw/irdma/ctrl.c

936

FIELD_PREP(IRDMAQPC_RDOK, roce_info->rd_en) |

drivers/infiniband/hw/irdma/ctrl.c

937

FIELD_PREP(IRDMAQPC_USESTATSINSTANCE, info->stats_idx_valid) |

drivers/infiniband/hw/irdma/ctrl.c

938

FIELD_PREP(IRDMAQPC_BINDEN, roce_info->bind_en) |

drivers/infiniband/hw/irdma/ctrl.c

939

FIELD_PREP(IRDMAQPC_FASTREGEN, roce_info->fast_reg_en) |

drivers/infiniband/hw/irdma/ctrl.c

940

FIELD_PREP(IRDMAQPC_DCQCNENABLE, roce_info->dcqcn_en) |

drivers/infiniband/hw/irdma/ctrl.c

941

FIELD_PREP(IRDMAQPC_RCVNOICRC, roce_info->rcv_no_icrc) |

drivers/infiniband/hw/irdma/ctrl.c

942

FIELD_PREP(IRDMAQPC_FW_CC_ENABLE, roce_info->fw_cc_enable) |

drivers/infiniband/hw/irdma/ctrl.c

943

FIELD_PREP(IRDMAQPC_UDPRIVCQENABLE, roce_info->udprivcq_en) |

drivers/infiniband/hw/irdma/ctrl.c

944

FIELD_PREP(IRDMAQPC_PRIVEN, roce_info->priv_mode_en) |

drivers/infiniband/hw/irdma/ctrl.c

945

FIELD_PREP(IRDMAQPC_TIMELYENABLE, roce_info->timely_en));

drivers/infiniband/hw/irdma/ctrl.c

947

FIELD_PREP(IRDMAQPC_QPCOMPCTX, info->qp_compl_ctx));

drivers/infiniband/hw/irdma/ctrl.c

949

FIELD_PREP(IRDMAQPC_SQTPHVAL, qp->sq_tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

950

FIELD_PREP(IRDMAQPC_RQTPHVAL, qp->rq_tph_val) |

drivers/infiniband/hw/irdma/ctrl.c

951

FIELD_PREP(IRDMAQPC_QSHANDLE, qp->qs_handle));

drivers/infiniband/hw/irdma/ctrl.c

953

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR3, udp->local_ipaddr[3]) |

drivers/infiniband/hw/irdma/ctrl.c

954

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR2, udp->local_ipaddr[2]));

drivers/infiniband/hw/irdma/ctrl.c

956

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR1, udp->local_ipaddr[1]) |

drivers/infiniband/hw/irdma/ctrl.c

957

FIELD_PREP(IRDMAQPC_LOCAL_IPADDR0, udp->local_ipaddr[0]));

drivers/infiniband/hw/irdma/ctrl.c

959

FIELD_PREP(IRDMAQPC_THIGH, roce_info->t_high) |

drivers/infiniband/hw/irdma/ctrl.c

960

FIELD_PREP(IRDMAQPC_TLOW, roce_info->t_low));

drivers/infiniband/hw/irdma/ctrl.c

962

FIELD_PREP(IRDMAQPC_REMENDPOINTIDX, info->rem_endpoint_idx));

drivers/infiniband/hw/irdma/hmc.c

108

u32 val = FIELD_PREP(IRDMA_PFHMC_PDINV_PMSDIDX, sd_idx) |

drivers/infiniband/hw/irdma/hmc.c

109

FIELD_PREP(IRDMA_PFHMC_PDINV_PMSDPARTSEL, 1) |

drivers/infiniband/hw/irdma/hmc.c

110

FIELD_PREP(IRDMA_PFHMC_PDINV_PMPDIDX, pd_idx);

drivers/infiniband/hw/irdma/hmc.c

75

FIELD_PREP(IRDMA_PFHMC_SDDATALOW_PMSDBPCOUNT, IRDMA_HMC_MAX_BP_COUNT) |

drivers/infiniband/hw/irdma/hmc.c

76

FIELD_PREP(IRDMA_PFHMC_SDDATALOW_PMSDTYPE,

drivers/infiniband/hw/irdma/hmc.c

78

FIELD_PREP(IRDMA_PFHMC_SDDATALOW_PMSDVALID, 1);

drivers/infiniband/hw/irdma/hmc.c

80

entry->cmd = idx | FIELD_PREP(IRDMA_PFHMC_SDCMD_PMSDWR, 1) | BIT(15);

drivers/infiniband/hw/irdma/hmc.c

92

entry->data = FIELD_PREP(IRDMA_PFHMC_SDDATALOW_PMSDBPCOUNT, IRDMA_HMC_MAX_BP_COUNT) |

drivers/infiniband/hw/irdma/hmc.c

93

FIELD_PREP(IRDMA_PFHMC_SDDATALOW_PMSDTYPE,

drivers/infiniband/hw/irdma/hmc.c

96

entry->cmd = idx | FIELD_PREP(IRDMA_PFHMC_SDCMD_PMSDWR, 1) | BIT(15);

drivers/infiniband/hw/irdma/i40iw_hw.c

113

reg_val = FIELD_PREP(I40E_PFINT_LNKLSTN_FIRSTQ_INDX, ceq_id) |

drivers/infiniband/hw/irdma/i40iw_hw.c

114

FIELD_PREP(I40E_PFINT_LNKLSTN_FIRSTQ_TYPE, QUEUE_TYPE_CEQ);

drivers/infiniband/hw/irdma/i40iw_hw.c

117

reg_val = FIELD_PREP(I40E_PFINT_DYN_CTLN_ITR_INDX, 0x3) |

drivers/infiniband/hw/irdma/i40iw_hw.c

118

FIELD_PREP(I40E_PFINT_DYN_CTLN_INTENA, 0x1);

drivers/infiniband/hw/irdma/i40iw_hw.c

121

reg_val = FIELD_PREP(IRDMA_GLINT_CEQCTL_CAUSE_ENA, enable) |

drivers/infiniband/hw/irdma/i40iw_hw.c

122

FIELD_PREP(IRDMA_GLINT_CEQCTL_MSIX_INDX, idx) |

drivers/infiniband/hw/irdma/i40iw_hw.c

123

FIELD_PREP(I40E_PFINT_CEQCTL_NEXTQ_INDX, NULL_QUEUE_INDEX) |

drivers/infiniband/hw/irdma/i40iw_hw.c

124

FIELD_PREP(IRDMA_GLINT_CEQCTL_ITR_INDX, 0x3);

drivers/infiniband/hw/irdma/i40iw_hw.c

138

val = FIELD_PREP(IRDMA_GLINT_DYN_CTL_INTENA, 0x1) |

drivers/infiniband/hw/irdma/i40iw_hw.c

139

FIELD_PREP(IRDMA_GLINT_DYN_CTL_CLEARPBA, 0x1) |

drivers/infiniband/hw/irdma/i40iw_hw.c

140

FIELD_PREP(IRDMA_GLINT_DYN_CTL_ITR_INDX, 0x3);

drivers/infiniband/hw/irdma/icrdma_hw.c

102

reg_val = FIELD_PREP(IRDMA_GLINT_CEQCTL_CAUSE_ENA, enable) |

drivers/infiniband/hw/irdma/icrdma_hw.c

103

FIELD_PREP(IRDMA_GLINT_CEQCTL_MSIX_INDX, idx) |

drivers/infiniband/hw/irdma/icrdma_hw.c

104

FIELD_PREP(IRDMA_GLINT_CEQCTL_ITR_INDX, 3);

drivers/infiniband/hw/irdma/icrdma_hw.c

66

val = FIELD_PREP(IRDMA_GLINT_DYN_CTL_ITR_INDX, 0) |

drivers/infiniband/hw/irdma/icrdma_hw.c

67

FIELD_PREP(IRDMA_GLINT_DYN_CTL_INTERVAL, interval) |

drivers/infiniband/hw/irdma/icrdma_hw.c

68

FIELD_PREP(IRDMA_GLINT_DYN_CTL_INTENA, 1) |

drivers/infiniband/hw/irdma/icrdma_hw.c

69

FIELD_PREP(IRDMA_GLINT_DYN_CTL_CLEARPBA, 1);

drivers/infiniband/hw/irdma/ig3rdma_hw.c

23

val = FIELD_PREP(IRDMA_GLINT_DYN_CTL_INTENA, 1) |

drivers/infiniband/hw/irdma/ig3rdma_hw.c

24

FIELD_PREP(IRDMA_GLINT_DYN_CTL_CLEARPBA, 1);

drivers/infiniband/hw/irdma/puda.c

100

FIELD_PREP(IRDMAQPSQ_GEN1_FRAG_LEN, buf->mem.size));

drivers/infiniband/hw/irdma/puda.c

103

FIELD_PREP(IRDMAQPSQ_FRAG_LEN, buf->mem.size) |

drivers/infiniband/hw/irdma/puda.c

1127

offset8 &= ~FIELD_PREP(IRDMAQPSQ_VALID, 1);

drivers/infiniband/hw/irdma/puda.c

1129

offset8 |= FIELD_PREP(IRDMAQPSQ_VALID, 1);

drivers/infiniband/hw/irdma/puda.c

1136

offset24 = FIELD_PREP(IRDMAQPSQ_VALID, 1);

drivers/infiniband/hw/irdma/puda.c

453

hdr[1] = FIELD_PREP(IRDMA_UDA_QPSQ_OPCODE, IRDMA_OP_TYPE_SEND) |

drivers/infiniband/hw/irdma/puda.c

454

FIELD_PREP(IRDMA_UDA_QPSQ_L4LEN, l4len) |

drivers/infiniband/hw/irdma/puda.c

455

FIELD_PREP(IRDMAQPSQ_AHID, info->ah_id) |

drivers/infiniband/hw/irdma/puda.c

456

FIELD_PREP(IRDMA_UDA_QPSQ_SIGCOMPL, 1) |

drivers/infiniband/hw/irdma/puda.c

457

FIELD_PREP(IRDMA_UDA_QPSQ_VALID,

drivers/infiniband/hw/irdma/puda.c

464

FIELD_PREP(IRDMAQPSQ_FRAG_LEN, info->len) |

drivers/infiniband/hw/irdma/puda.c

465

FIELD_PREP(IRDMA_UDA_QPSQ_VALID, qp->qp_uk.swqe_polarity));

drivers/infiniband/hw/irdma/puda.c

467

hdr[0] = FIELD_PREP(IRDMA_UDA_QPSQ_MACLEN, info->maclen >> 1) |

drivers/infiniband/hw/irdma/puda.c

468

FIELD_PREP(IRDMA_UDA_QPSQ_IPLEN, iplen) |

drivers/infiniband/hw/irdma/puda.c

469

FIELD_PREP(IRDMA_UDA_QPSQ_L4T, 1) |

drivers/infiniband/hw/irdma/puda.c

470

FIELD_PREP(IRDMA_UDA_QPSQ_IIPT, iipt) |

drivers/infiniband/hw/irdma/puda.c

471

FIELD_PREP(IRDMA_GEN1_UDA_QPSQ_L4LEN, l4len);

drivers/infiniband/hw/irdma/puda.c

473

hdr[1] = FIELD_PREP(IRDMA_UDA_QPSQ_OPCODE, IRDMA_OP_TYPE_SEND) |

drivers/infiniband/hw/irdma/puda.c

474

FIELD_PREP(IRDMA_UDA_QPSQ_SIGCOMPL, 1) |

drivers/infiniband/hw/irdma/puda.c

475

FIELD_PREP(IRDMA_UDA_QPSQ_DOLOOPBACK, info->do_lpb) |

drivers/infiniband/hw/irdma/puda.c

476

FIELD_PREP(IRDMA_UDA_QPSQ_VALID, qp->qp_uk.swqe_polarity);

drivers/infiniband/hw/irdma/puda.c

482

FIELD_PREP(IRDMAQPSQ_GEN1_FRAG_LEN, info->len));

drivers/infiniband/hw/irdma/puda.c

574

FIELD_PREP(IRDMAQPC_RQSIZE, qp->hw_rq_size) |

drivers/infiniband/hw/irdma/puda.c

575

FIELD_PREP(IRDMAQPC_SQSIZE, qp->hw_sq_size));

drivers/infiniband/hw/irdma/puda.c

577

FIELD_PREP(IRDMAQPC_SNDMSS, rsrc->buf_size));

drivers/infiniband/hw/irdma/puda.c

582

FIELD_PREP(IRDMAQPC_TXCQNUM, rsrc->cq_id) |

drivers/infiniband/hw/irdma/puda.c

583

FIELD_PREP(IRDMAQPC_RXCQNUM, rsrc->cq_id));

drivers/infiniband/hw/irdma/puda.c

585

FIELD_PREP(IRDMAQPC_STAT_INDEX, rsrc->stats_idx));

drivers/infiniband/hw/irdma/puda.c

587

FIELD_PREP(IRDMAQPC_PRIVEN, 1) |

drivers/infiniband/hw/irdma/puda.c

588

FIELD_PREP(IRDMAQPC_USESTATSINSTANCE, rsrc->stats_idx_valid));

drivers/infiniband/hw/irdma/puda.c

590

FIELD_PREP(IRDMAQPC_QPCOMPCTX, (uintptr_t)qp));

drivers/infiniband/hw/irdma/puda.c

592

FIELD_PREP(IRDMAQPC_SQTPHVAL, qp->sq_tph_val) |

drivers/infiniband/hw/irdma/puda.c

593

FIELD_PREP(IRDMAQPC_RQTPHVAL, qp->rq_tph_val) |

drivers/infiniband/hw/irdma/puda.c

594

FIELD_PREP(IRDMAQPC_QSHANDLE, qp->qs_handle));

drivers/infiniband/hw/irdma/puda.c

622

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_CREATE_QP) |

drivers/infiniband/hw/irdma/puda.c

623

FIELD_PREP(IRDMA_CQPSQ_QP_QPTYPE, IRDMA_QP_TYPE_UDA) |

drivers/infiniband/hw/irdma/puda.c

624

FIELD_PREP(IRDMA_CQPSQ_QP_CQNUMVALID, 1) |

drivers/infiniband/hw/irdma/puda.c

625

FIELD_PREP(IRDMA_CQPSQ_QP_NEXTIWSTATE, 2) |

drivers/infiniband/hw/irdma/puda.c

626

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/puda.c

737

FIELD_PREP(IRDMA_CQPSQ_CQ_SHADOW_READ_THRESHOLD, cq->shadow_read_threshold));

drivers/infiniband/hw/irdma/puda.c

741

FIELD_PREP(IRDMA_CQPSQ_TPHVAL, cq->tph_val) |

drivers/infiniband/hw/irdma/puda.c

742

FIELD_PREP(IRDMA_CQPSQ_VSIIDX, cq->vsi->vsi_idx));

drivers/infiniband/hw/irdma/puda.c

745

FIELD_PREP(IRDMA_CQPSQ_OPCODE, IRDMA_CQP_OP_CREATE_CQ) |

drivers/infiniband/hw/irdma/puda.c

746

FIELD_PREP(IRDMA_CQPSQ_CQ_CHKOVERFLOW, 1) |

drivers/infiniband/hw/irdma/puda.c

747

FIELD_PREP(IRDMA_CQPSQ_CQ_ENCEQEMASK, 1) |

drivers/infiniband/hw/irdma/puda.c

748

FIELD_PREP(IRDMA_CQPSQ_CQ_CEQIDVALID, 1) |

drivers/infiniband/hw/irdma/puda.c

749

FIELD_PREP(IRDMA_CQPSQ_WQEVALID, cqp->polarity);

drivers/infiniband/hw/irdma/puda.c

94

offset24 = (offset24) ? 0 : FIELD_PREP(IRDMAQPSQ_VALID, 1);

drivers/infiniband/hw/irdma/uda.c

100

FIELD_PREP(IRDMA_UDA_MGCTX_DESTPORT, entry_info->dest_port) |

drivers/infiniband/hw/irdma/uda.c

101

FIELD_PREP(IRDMA_UDA_MGCTX_VALIDENT, entry_info->valid_entry) |

drivers/infiniband/hw/irdma/uda.c

102

FIELD_PREP(IRDMA_UDA_MGCTX_QPID, entry_info->qp_id));

drivers/infiniband/hw/irdma/uda.c

136

FIELD_PREP(IRDMA_UDA_CQPSQ_MG_VLANID, info->vlan_id) |

drivers/infiniband/hw/irdma/uda.c

137

FIELD_PREP(IRDMA_UDA_CQPSQ_QS_HANDLE, info->qs_handle));

drivers/infiniband/hw/irdma/uda.c

140

FIELD_PREP(IRDMA_UDA_CQPSQ_MG_HMC_FCN_ID, info->hmc_fcn_id));

drivers/infiniband/hw/irdma/uda.c

144

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR0, info->dest_ip_addr[0]) |

drivers/infiniband/hw/irdma/uda.c

145

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR1, info->dest_ip_addr[1]));

drivers/infiniband/hw/irdma/uda.c

147

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR2, info->dest_ip_addr[2]) |

drivers/infiniband/hw/irdma/uda.c

148

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR3, info->dest_ip_addr[3]));

drivers/infiniband/hw/irdma/uda.c

151

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR3, info->dest_ip_addr[0]));

drivers/infiniband/hw/irdma/uda.c

157

FIELD_PREP(IRDMA_UDA_CQPSQ_MG_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/uda.c

158

FIELD_PREP(IRDMA_UDA_CQPSQ_MG_OPCODE, op) |

drivers/infiniband/hw/irdma/uda.c

159

FIELD_PREP(IRDMA_UDA_CQPSQ_MG_MGIDX, info->mg_id) |

drivers/infiniband/hw/irdma/uda.c

160

FIELD_PREP(IRDMA_UDA_CQPSQ_MG_VLANVALID, info->vlan_valid) |

drivers/infiniband/hw/irdma/uda.c

161

FIELD_PREP(IRDMA_UDA_CQPSQ_MG_IPV4VALID, info->ipv4_valid));

drivers/infiniband/hw/irdma/uda.c

31

qw1 = FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_PDINDEXLO, info->pd_idx) |

drivers/infiniband/hw/irdma/uda.c

32

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_TC, info->tc_tos) |

drivers/infiniband/hw/irdma/uda.c

33

FIELD_PREP(IRDMA_UDAQPC_VLANTAG, info->vlan_tag);

drivers/infiniband/hw/irdma/uda.c

35

qw2 = FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ARPINDEX, info->dst_arpindex) |

drivers/infiniband/hw/irdma/uda.c

36

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_FLOWLABEL, info->flow_label) |

drivers/infiniband/hw/irdma/uda.c

37

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_HOPLIMIT, info->hop_ttl) |

drivers/infiniband/hw/irdma/uda.c

38

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_PDINDEXHI, info->pd_idx >> 16);

drivers/infiniband/hw/irdma/uda.c

42

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR0, info->dest_ip_addr[0]) |

drivers/infiniband/hw/irdma/uda.c

43

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR1, info->dest_ip_addr[1]));

drivers/infiniband/hw/irdma/uda.c

45

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR2, info->dest_ip_addr[2]) |

drivers/infiniband/hw/irdma/uda.c

46

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR3, info->dest_ip_addr[3]));

drivers/infiniband/hw/irdma/uda.c

49

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR0, info->src_ip_addr[0]) |

drivers/infiniband/hw/irdma/uda.c

50

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR1, info->src_ip_addr[1]));

drivers/infiniband/hw/irdma/uda.c

52

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR2, info->src_ip_addr[2]) |

drivers/infiniband/hw/irdma/uda.c

53

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR3, info->src_ip_addr[3]));

drivers/infiniband/hw/irdma/uda.c

56

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR3, info->dest_ip_addr[0]));

drivers/infiniband/hw/irdma/uda.c

59

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_ADDR3, info->src_ip_addr[0]));

drivers/infiniband/hw/irdma/uda.c

69

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_WQEVALID, cqp->polarity) |

drivers/infiniband/hw/irdma/uda.c

70

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_OPCODE, op) |

drivers/infiniband/hw/irdma/uda.c

71

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_DOLOOPBACKK, info->do_lpbk) |

drivers/infiniband/hw/irdma/uda.c

72

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_IPV4VALID, info->ipv4_valid) |

drivers/infiniband/hw/irdma/uda.c

73

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_AVIDX, info->ah_idx) |

drivers/infiniband/hw/irdma/uda.c

74

FIELD_PREP(IRDMA_UDA_CQPSQ_MAV_INSERTVLANTAG, info->insert_vlan_tag));

drivers/infiniband/hw/irdma/uk.c

1026

hdr = FIELD_PREP(IRDMAQPSQ_ADDFRAGCNT, addl_frag_cnt) |

drivers/infiniband/hw/irdma/uk.c

1027

FIELD_PREP(IRDMAQPSQ_VALID, qp->rwqe_polarity);

drivers/infiniband/hw/irdma/uk.c

1072

temp_val = FIELD_PREP(IRDMA_CQ_DBSA_ARM_SEQ_NUM, arm_seq_num) |

drivers/infiniband/hw/irdma/uk.c

1073

FIELD_PREP(IRDMA_CQ_DBSA_SW_CQ_SELECT, sw_cq_sel) |

drivers/infiniband/hw/irdma/uk.c

1074

FIELD_PREP(IRDMA_CQ_DBSA_ARM_NEXT_SE, arm_next_se) |

drivers/infiniband/hw/irdma/uk.c

1075

FIELD_PREP(IRDMA_CQ_DBSA_ARM_NEXT, arm_next);

drivers/infiniband/hw/irdma/uk.c

1102

temp_val = FIELD_PREP(IRDMA_CQ_DBSA_ARM_SEQ_NUM, arm_seq_num) |

drivers/infiniband/hw/irdma/uk.c

1103

FIELD_PREP(IRDMA_CQ_DBSA_SW_CQ_SELECT, sw_cq_sel) |

drivers/infiniband/hw/irdma/uk.c

1104

FIELD_PREP(IRDMA_CQ_DBSA_ARM_NEXT_SE, arm_next_se) |

drivers/infiniband/hw/irdma/uk.c

1105

FIELD_PREP(IRDMA_CQ_DBSA_ARM_NEXT, arm_next);

drivers/infiniband/hw/irdma/uk.c

1240

qword3 |= FIELD_PREP(IRDMA_CQ_MINERR, FLUSH_GENERAL_ERR);

drivers/infiniband/hw/irdma/uk.c

1430

qword3 |= FIELD_PREP(IRDMA_CQ_WQEIDX, pring->tail);

drivers/infiniband/hw/irdma/uk.c

166

wqe_0[3] = cpu_to_le64(FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity ? 0 : 1));

drivers/infiniband/hw/irdma/uk.c

1835

hdr = FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_NOP) |

drivers/infiniband/hw/irdma/uk.c

1836

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, signaled) |

drivers/infiniband/hw/irdma/uk.c

1837

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

20

FIELD_PREP(IRDMAQPSQ_FRAG_TO, sge->addr));

drivers/infiniband/hw/irdma/uk.c

22

FIELD_PREP(IRDMAQPSQ_VALID, valid) |

drivers/infiniband/hw/irdma/uk.c

23

FIELD_PREP(IRDMAQPSQ_FRAG_LEN, sge->length) |

drivers/infiniband/hw/irdma/uk.c

24

FIELD_PREP(IRDMAQPSQ_FRAG_STAG, sge->lkey));

drivers/infiniband/hw/irdma/uk.c

266

FIELD_PREP(IRDMAQPSQ_FRAG_TO, op_info->rem_addr.addr));

drivers/infiniband/hw/irdma/uk.c

270

FIELD_PREP(IRDMAQPSQ_IMMDATA, info->imm_data));

drivers/infiniband/hw/irdma/uk.c

28

FIELD_PREP(IRDMAQPSQ_VALID, valid));

drivers/infiniband/hw/irdma/uk.c

295

hdr = FIELD_PREP(IRDMAQPSQ_REMSTAG, op_info->rem_addr.lkey) |

drivers/infiniband/hw/irdma/uk.c

296

FIELD_PREP(IRDMAQPSQ_OPCODE, info->op_type) |

drivers/infiniband/hw/irdma/uk.c

297

FIELD_PREP(IRDMAQPSQ_IMMDATAFLAG, info->imm_data_valid) |

drivers/infiniband/hw/irdma/uk.c

298

FIELD_PREP(IRDMAQPSQ_REPORTRTT, info->report_rtt) |

drivers/infiniband/hw/irdma/uk.c

299

FIELD_PREP(IRDMAQPSQ_ADDFRAGCNT, addl_frag_cnt) |

drivers/infiniband/hw/irdma/uk.c

300

FIELD_PREP(IRDMAQPSQ_READFENCE, read_fence) |

drivers/infiniband/hw/irdma/uk.c

301

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, info->local_fence) |

drivers/infiniband/hw/irdma/uk.c

302

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/uk.c

303

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

339

FIELD_PREP(IRDMAQPSQ_STAG, op_info->stag));

drivers/infiniband/hw/irdma/uk.c

342

hdr = FIELD_PREP(IRDMAQPSQ_ADDFRAGCNT, 1) |

drivers/infiniband/hw/irdma/uk.c

343

FIELD_PREP(IRDMAQPSQ_REMOTE_STAG, op_info->remote_stag) |

drivers/infiniband/hw/irdma/uk.c

344

FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_ATOMIC_FETCH_ADD) |

drivers/infiniband/hw/irdma/uk.c

345

FIELD_PREP(IRDMAQPSQ_READFENCE, info->read_fence) |

drivers/infiniband/hw/irdma/uk.c

346

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, info->local_fence) |

drivers/infiniband/hw/irdma/uk.c

347

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/uk.c

348

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

354

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity));

drivers/infiniband/hw/irdma/uk.c

390

FIELD_PREP(IRDMAQPSQ_STAG, op_info->stag));

drivers/infiniband/hw/irdma/uk.c

393

hdr = FIELD_PREP(IRDMAQPSQ_ADDFRAGCNT, 1) |

drivers/infiniband/hw/irdma/uk.c

394

FIELD_PREP(IRDMAQPSQ_REMOTE_STAG, op_info->remote_stag) |

drivers/infiniband/hw/irdma/uk.c

395

FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_ATOMIC_COMPARE_SWAP_ADD) |

drivers/infiniband/hw/irdma/uk.c

396

FIELD_PREP(IRDMAQPSQ_READFENCE, info->read_fence) |

drivers/infiniband/hw/irdma/uk.c

397

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, info->local_fence) |

drivers/infiniband/hw/irdma/uk.c

398

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/uk.c

399

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

405

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity));

drivers/infiniband/hw/irdma/uk.c

44

FIELD_PREP(IRDMAQPSQ_FRAG_TO, sge->addr));

drivers/infiniband/hw/irdma/uk.c

457

hdr = FIELD_PREP(IRDMAQPSQ_ADDFRAGCNT, addl_frag_cnt) |

drivers/infiniband/hw/irdma/uk.c

458

FIELD_PREP(IRDMAQPSQ_VALID, srq->srwqe_polarity);

drivers/infiniband/hw/irdma/uk.c

46

FIELD_PREP(IRDMAQPSQ_GEN1_FRAG_LEN, sge->length) |

drivers/infiniband/hw/irdma/uk.c

47

FIELD_PREP(IRDMAQPSQ_GEN1_FRAG_STAG, sge->lkey));

drivers/infiniband/hw/irdma/uk.c

529

FIELD_PREP(IRDMAQPSQ_FRAG_TO, op_info->rem_addr.addr));

drivers/infiniband/hw/irdma/uk.c

530

hdr = FIELD_PREP(IRDMAQPSQ_REMSTAG, op_info->rem_addr.lkey) |

drivers/infiniband/hw/irdma/uk.c

531

FIELD_PREP(IRDMAQPSQ_REPORTRTT, (info->report_rtt ? 1 : 0)) |

drivers/infiniband/hw/irdma/uk.c

532

FIELD_PREP(IRDMAQPSQ_ADDFRAGCNT, addl_frag_cnt) |

drivers/infiniband/hw/irdma/uk.c

533

FIELD_PREP(IRDMAQPSQ_OPCODE,

drivers/infiniband/hw/irdma/uk.c

535

FIELD_PREP(IRDMAQPSQ_READFENCE, info->read_fence) |

drivers/infiniband/hw/irdma/uk.c

536

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, local_fence) |

drivers/infiniband/hw/irdma/uk.c

537

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/uk.c

538

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

594

FIELD_PREP(IRDMAQPSQ_IMMDATA, info->imm_data));

drivers/infiniband/hw/irdma/uk.c

619

FIELD_PREP(IRDMAQPSQ_DESTQKEY, op_info->qkey) |

drivers/infiniband/hw/irdma/uk.c

620

FIELD_PREP(IRDMAQPSQ_DESTQPN, op_info->dest_qp));

drivers/infiniband/hw/irdma/uk.c

621

hdr = FIELD_PREP(IRDMAQPSQ_REMSTAG, info->stag_to_inv) |

drivers/infiniband/hw/irdma/uk.c

622

FIELD_PREP(IRDMAQPSQ_AHID, op_info->ah_id) |

drivers/infiniband/hw/irdma/uk.c

623

FIELD_PREP(IRDMAQPSQ_IMMDATAFLAG,

drivers/infiniband/hw/irdma/uk.c

625

FIELD_PREP(IRDMAQPSQ_REPORTRTT, (info->report_rtt ? 1 : 0)) |

drivers/infiniband/hw/irdma/uk.c

626

FIELD_PREP(IRDMAQPSQ_OPCODE, info->op_type) |

drivers/infiniband/hw/irdma/uk.c

627

FIELD_PREP(IRDMAQPSQ_ADDFRAGCNT, addl_frag_cnt) |

drivers/infiniband/hw/irdma/uk.c

628

FIELD_PREP(IRDMAQPSQ_READFENCE, read_fence) |

drivers/infiniband/hw/irdma/uk.c

629

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, info->local_fence) |

drivers/infiniband/hw/irdma/uk.c

630

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/uk.c

631

FIELD_PREP(IRDMAQPSQ_UDPHEADER, info->udp_hdr) |

drivers/infiniband/hw/irdma/uk.c

632

FIELD_PREP(IRDMAQPSQ_L4LEN, info->l4len) |

drivers/infiniband/hw/irdma/uk.c

633

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

655

FIELD_PREP(IRDMAQPSQ_PARENTMRSTAG, op_info->mw_stag) |

drivers/infiniband/hw/irdma/uk.c

656

FIELD_PREP(IRDMAQPSQ_MWSTAG, op_info->mr_stag));

drivers/infiniband/hw/irdma/uk.c

717

FIELD_PREP(IRDMAQPSQ_PARENTMRSTAG, op_info->mr_stag) |

drivers/infiniband/hw/irdma/uk.c

718

FIELD_PREP(IRDMAQPSQ_MWSTAG, op_info->mw_stag));

drivers/infiniband/hw/irdma/uk.c

77

hdr = FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMAQP_OP_NOP) |

drivers/infiniband/hw/irdma/uk.c

78

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, signaled) |

drivers/infiniband/hw/irdma/uk.c

79

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

835

FIELD_PREP(IRDMAQPSQ_FRAG_TO, op_info->rem_addr.addr));

drivers/infiniband/hw/irdma/uk.c

837

hdr = FIELD_PREP(IRDMAQPSQ_REMSTAG, op_info->rem_addr.lkey) |

drivers/infiniband/hw/irdma/uk.c

838

FIELD_PREP(IRDMAQPSQ_OPCODE, info->op_type) |

drivers/infiniband/hw/irdma/uk.c

839

FIELD_PREP(IRDMAQPSQ_INLINEDATALEN, total_size) |

drivers/infiniband/hw/irdma/uk.c

840

FIELD_PREP(IRDMAQPSQ_REPORTRTT, info->report_rtt ? 1 : 0) |

drivers/infiniband/hw/irdma/uk.c

841

FIELD_PREP(IRDMAQPSQ_INLINEDATAFLAG, 1) |

drivers/infiniband/hw/irdma/uk.c

842

FIELD_PREP(IRDMAQPSQ_IMMDATAFLAG, info->imm_data_valid ? 1 : 0) |

drivers/infiniband/hw/irdma/uk.c

843

FIELD_PREP(IRDMAQPSQ_READFENCE, read_fence) |

drivers/infiniband/hw/irdma/uk.c

844

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, info->local_fence) |

drivers/infiniband/hw/irdma/uk.c

845

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/uk.c

846

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

850

FIELD_PREP(IRDMAQPSQ_IMMDATA, info->imm_data));

drivers/infiniband/hw/irdma/uk.c

902

FIELD_PREP(IRDMAQPSQ_DESTQKEY, op_info->qkey) |

drivers/infiniband/hw/irdma/uk.c

903

FIELD_PREP(IRDMAQPSQ_DESTQPN, op_info->dest_qp));

drivers/infiniband/hw/irdma/uk.c

906

hdr = FIELD_PREP(IRDMAQPSQ_REMSTAG, info->stag_to_inv) |

drivers/infiniband/hw/irdma/uk.c

907

FIELD_PREP(IRDMAQPSQ_AHID, op_info->ah_id) |

drivers/infiniband/hw/irdma/uk.c

908

FIELD_PREP(IRDMAQPSQ_OPCODE, info->op_type) |

drivers/infiniband/hw/irdma/uk.c

909

FIELD_PREP(IRDMAQPSQ_INLINEDATALEN, total_size) |

drivers/infiniband/hw/irdma/uk.c

910

FIELD_PREP(IRDMAQPSQ_IMMDATAFLAG,

drivers/infiniband/hw/irdma/uk.c

912

FIELD_PREP(IRDMAQPSQ_REPORTRTT, (info->report_rtt ? 1 : 0)) |

drivers/infiniband/hw/irdma/uk.c

913

FIELD_PREP(IRDMAQPSQ_INLINEDATAFLAG, 1) |

drivers/infiniband/hw/irdma/uk.c

914

FIELD_PREP(IRDMAQPSQ_READFENCE, read_fence) |

drivers/infiniband/hw/irdma/uk.c

915

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, info->local_fence) |

drivers/infiniband/hw/irdma/uk.c

916

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/uk.c

917

FIELD_PREP(IRDMAQPSQ_UDPHEADER, info->udp_hdr) |

drivers/infiniband/hw/irdma/uk.c

918

FIELD_PREP(IRDMAQPSQ_L4LEN, info->l4len) |

drivers/infiniband/hw/irdma/uk.c

919

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/infiniband/hw/irdma/uk.c

923

FIELD_PREP(IRDMAQPSQ_IMMDATA, info->imm_data));

drivers/infiniband/hw/irdma/uk.c

969

hdr = FIELD_PREP(IRDMAQPSQ_OPCODE, IRDMA_OP_TYPE_INV_STAG) |

drivers/infiniband/hw/irdma/uk.c

970

FIELD_PREP(IRDMAQPSQ_READFENCE, info->read_fence) |

drivers/infiniband/hw/irdma/uk.c

971

FIELD_PREP(IRDMAQPSQ_LOCALFENCE, local_fence) |

drivers/infiniband/hw/irdma/uk.c

972

FIELD_PREP(IRDMAQPSQ_SIGCOMPL, info->signaled) |

drivers/infiniband/hw/irdma/uk.c

973

FIELD_PREP(IRDMAQPSQ_VALID, qp->swqe_polarity);

drivers/input/keyboard/cap11xx.c

248

u32_val = ~(FIELD_PREP(CAP11XX_REG_SENSITIVITY_CONTROL_DELTA_SENSE_MASK,

drivers/input/keyboard/max7360-keypad.c

120

FIELD_PREP(MAX7360_DEBOUNCE, val));

drivers/input/keyboard/max7360-keypad.c

127

FIELD_PREP(MAX7360_INTERRUPT_TIME_MASK, 1));

drivers/input/keyboard/pxa27x_keypad.c

51

#define KPC_MKRN(n) FIELD_PREP(KPC_MKRN_MASK, (n) - 1)

drivers/input/keyboard/pxa27x_keypad.c

52

#define KPC_MKCN(n) FIELD_PREP(KPC_MKCN_MASK, (n) - 1)

drivers/input/keyboard/pxa27x_keypad.c

53

#define KPC_DKN(n) FIELD_PREP(KPC_DKN_MASK, (n) - 1)

drivers/input/misc/atc260x-onkey.c

223

press_time = FIELD_PREP(ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_TIME,

drivers/input/misc/atc260x-onkey.c

225

reset_time = FIELD_PREP(ATC2603C_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL,

drivers/input/misc/atc260x-onkey.c

230

press_time = FIELD_PREP(ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_TIME,

drivers/input/misc/atc260x-onkey.c

232

reset_time = FIELD_PREP(ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL,

drivers/input/misc/aw86927.c

252

FIELD_PREP(AW86927_SYSCTRL3_STANDBY_MASK,

drivers/input/misc/aw86927.c

260

FIELD_PREP(AW86927_SYSCTRL3_STANDBY_MASK,

drivers/input/misc/aw86927.c

271

FIELD_PREP(AW86927_PLAYCFG3_PLAY_MODE_MASK,

drivers/input/misc/aw86927.c

279

FIELD_PREP(AW86927_PLAYCFG1_BST_MODE_MASK,

drivers/input/misc/aw86927.c

287

FIELD_PREP(AW86927_VBATCTRL_VBAT_MODE_MASK,

drivers/input/misc/aw86927.c

352

FIELD_PREP(AW86927_PLAYCFG3_AUTO_BST_MASK,

drivers/input/misc/aw86927.c

360

FIELD_PREP(AW86927_WAVCFG1_WAVSEQ1_MASK, 1));

drivers/input/misc/aw86927.c

367

FIELD_PREP(AW86927_WAVCFG2_WAVSEQ2_MASK, 0));

drivers/input/misc/aw86927.c

374

FIELD_PREP(AW86927_WAVCFG9_SEQ1LOOP_MASK,

drivers/input/misc/aw86927.c

440

FIELD_PREP(AW86927_SYSCTRL4_WAVDAT_MODE_MASK,

drivers/input/misc/aw86927.c

449

FIELD_PREP(AW86927_SYSCTRL4_GAIN_BYPASS_MASK,

drivers/input/misc/aw86927.c

466

FIELD_PREP(AW86927_ANACFG12_BST_SKIP_MASK,

drivers/input/misc/aw86927.c

474

FIELD_PREP(AW86927_ANACFG15_BST_PEAK_MODE_MASK,

drivers/input/misc/aw86927.c

482

FIELD_PREP(AW86927_ANACFG16_BST_SRC_MASK,

drivers/input/misc/aw86927.c

495

FIELD_PREP(AW86927_CONTCFG1_BRK_BST_MD_MASK, 0x00));

drivers/input/misc/aw86927.c

501

FIELD_PREP(AW86927_CONTCFG5_BST_BRK_GAIN_MASK, 0x05) |

drivers/input/misc/aw86927.c

502

FIELD_PREP(AW86927_CONTCFG5_BRK_GAIN_MASK, 0x08));

drivers/input/misc/aw86927.c

508

FIELD_PREP(AW86927_CONTCFG10_BRK_TIME_MASK,

drivers/input/misc/aw86927.c

515

FIELD_PREP(AW86927_CONTCFG13_TSET_MASK, 0x06) |

drivers/input/misc/aw86927.c

516

FIELD_PREP(AW86927_CONTCFG13_BEME_SET_MASK, 0x02));

drivers/input/misc/aw86927.c

523

FIELD_PREP(AW86927_DETCFG2_D2S_GAIN_MASK,

drivers/input/misc/aw86927.c

531

FIELD_PREP(AW86927_PWMCFG1_PRC_EN_MASK,

drivers/input/misc/aw86927.c

538

FIELD_PREP(AW86927_PWMCFG3_PR_EN_MASK, 0x01) |

drivers/input/misc/aw86927.c

539

FIELD_PREP(AW86927_PWMCFG3_PRCTIME_MASK, 0x3f));

drivers/input/misc/aw86927.c

546

FIELD_PREP(AW86927_PWMCFG4_PRTIME_MASK, 0x32));

drivers/input/misc/aw86927.c

558

FIELD_PREP(AW86927_ANACFG13_BST_PC_MASK,

drivers/input/misc/aw86927.c

571

FIELD_PREP(AW86927_PLAYCFG1_BST_VOUT_VREFSET_MASK,

drivers/input/misc/aw86927.c

579

FIELD_PREP(AW86927_PLAYCFG3_AUTO_BST_MASK,

drivers/input/misc/aw86927.c

599

FIELD_PREP(AW86927_SYSCTRL3_EN_RAMINIT_MASK,

drivers/input/misc/aw86927.c

639

FIELD_PREP(AW86927_DETCFG2_DET_SEQ0_MASK,

drivers/input/misc/aw86927.c

647

FIELD_PREP(AW86927_DETCFG1_DET_GO_MASK,

drivers/input/misc/aw86927.c

657

FIELD_PREP(AW86927_DETCFG1_DET_GO_MASK,

drivers/input/misc/aw86927.c

666

FIELD_PREP(AW86927_SYSCTRL3_EN_RAMINIT_MASK,

drivers/input/misc/aw86927.c

773

FIELD_PREP(AW86927_SYSCTRL4_INT_MODE_MASK,

drivers/input/misc/aw86927.c

775

FIELD_PREP(AW86927_SYSCTRL4_INT_EDGE_MODE_MASK,

drivers/input/misc/da7280.c

1018

val = FIELD_PREP(DA7280_ACTUATOR_TYPE_MASK,

drivers/input/misc/da7280.c

1020

FIELD_PREP(DA7280_BEMF_SENSE_EN_MASK,

drivers/input/misc/da7280.c

1022

FIELD_PREP(DA7280_FREQ_TRACK_EN_MASK,

drivers/input/misc/da7280.c

1024

FIELD_PREP(DA7280_ACCELERATION_EN_MASK,

drivers/input/misc/da7280.c

1026

FIELD_PREP(DA7280_RAPID_STOP_EN_MASK,

drivers/input/misc/da7280.c

1028

FIELD_PREP(DA7280_AMP_PID_EN_MASK,

drivers/input/misc/da7280.c

1093

val = FIELD_PREP(DA7280_PS_SEQ_ID_MASK, haptics->ps_seq_id) |

drivers/input/misc/da7280.c

1094

FIELD_PREP(DA7280_PS_SEQ_LOOP_MASK, haptics->ps_seq_loop);

drivers/input/misc/da7280.c

1101

val = FIELD_PREP(DA7280_GPI0_SEQUENCE_ID_MASK,

drivers/input/misc/da7280.c

1103

FIELD_PREP(DA7280_GPI0_MODE_MASK,

drivers/input/misc/da7280.c

1105

FIELD_PREP(DA7280_GPI0_POLARITY_MASK,

drivers/input/misc/da7280.c

604

val = FIELD_PREP(DA7280_PS_SEQ_ID_MASK, haptics->ps_seq_id) |

drivers/input/misc/da7280.c

605

FIELD_PREP(DA7280_PS_SEQ_LOOP_MASK,

drivers/input/misc/da7280.c

636

val = FIELD_PREP(DA7280_GPI0_SEQUENCE_ID_MASK,

drivers/input/misc/max7360-rotary.c

90

val = FIELD_PREP(MAX7360_ROT_DEBOUNCE, max7360_rotary->debounce_ms) |

drivers/input/misc/max7360-rotary.c

91

FIELD_PREP(MAX7360_ROT_INTCNT, 1) | MAX7360_ROT_INTCNT_DLY;

drivers/input/misc/palmas-pwrbutton.c

188

val = FIELD_PREP(PALMAS_LPK_TIME_MASK, config.long_press_time_val) |

drivers/input/misc/palmas-pwrbutton.c

189

FIELD_PREP(PALMAS_PWRON_DEBOUNCE_MASK, config.pwron_debounce_val);

drivers/input/touchscreen/imx6ul_tsc.c

122

adc_cfg |= FIELD_PREP(ADC_CONV_MODE_MASK, ADC_12BIT_MODE) |

drivers/input/touchscreen/imx6ul_tsc.c

123

FIELD_PREP(ADC_INPUT_CLK_MASK, ADC_IPG_CLK);

drivers/input/touchscreen/imx6ul_tsc.c

125

adc_cfg |= FIELD_PREP(ADC_CLK_DIV_MASK, ADC_CLK_DIV_8);

drivers/input/touchscreen/imx6ul_tsc.c

128

adc_cfg |= FIELD_PREP(ADC_AVGS_MASK, tsc->average_select);

drivers/input/touchscreen/imx6ul_tsc.c

135

adc_hc |= FIELD_PREP(ADC_ADCH_MASK, ADC_CONV_DISABLE);

drivers/input/touchscreen/imx6ul_tsc.c

175

adc_hc0 = FIELD_PREP(ADC_AIEN, 0);

drivers/input/touchscreen/imx6ul_tsc.c

178

adc_hc1 = FIELD_PREP(ADC_AIEN, 0) |

drivers/input/touchscreen/imx6ul_tsc.c

179

FIELD_PREP(ADC_ADCH_MASK, SELECT_CHANNEL_4);

drivers/input/touchscreen/imx6ul_tsc.c

182

adc_hc2 = FIELD_PREP(ADC_AIEN, 0);

drivers/input/touchscreen/imx6ul_tsc.c

185

adc_hc3 = FIELD_PREP(ADC_AIEN, 0) |

drivers/input/touchscreen/imx6ul_tsc.c

186

FIELD_PREP(ADC_ADCH_MASK, SELECT_CHANNEL_1);

drivers/input/touchscreen/imx6ul_tsc.c

189

adc_hc4 = FIELD_PREP(ADC_AIEN, 0);

drivers/input/touchscreen/imx6ul_tsc.c

204

basic_setting |= FIELD_PREP(MEASURE_DELAY_TIME_MASK,

drivers/input/touchscreen/imx6ul_tsc.c

209

debug_mode2 = FIELD_PREP(DE_GLITCH_MASK, tsc->de_glitch);

drivers/interconnect/qcom/icc-rpmh.c

40

FIELD_PREP(QOS_DISABLE_MASK, qos->prio_fwd_disable));

drivers/interconnect/qcom/icc-rpmh.c

44

FIELD_PREP(QOS_DFLT_PRIO_MASK, qos->prio));

drivers/interconnect/qcom/icc-rpmh.c

48

FIELD_PREP(QOS_SLV_URG_MSG_EN_MASK, qos->urg_fwd));

drivers/iommu/amd/iommu.c

2086

FIELD_PREP(DTE_GLX, gcr3_info->glx) |

drivers/iommu/amd/iommu.c

2087

FIELD_PREP(DTE_GCR3_14_12, gcr3 >> 12) |

drivers/iommu/amd/iommu.c

2090

new->data[1] |= FIELD_PREP(DTE_DOMID_MASK, dev_data->gcr3_info.domid) |

drivers/iommu/amd/iommu.c

2091

FIELD_PREP(DTE_GCR3_30_15, gcr3 >> 15) |

drivers/iommu/amd/iommu.c

2093

FIELD_PREP(DTE_GCR3_51_31, gcr3 >> 31);

drivers/iommu/amd/iommu.c

2097

new->data[2] |= FIELD_PREP(DTE_GPT_LEVEL_MASK, GUEST_PGTABLE_5_LEVEL);

drivers/iommu/amd/iommu.c

2099

new->data[2] |= FIELD_PREP(DTE_GPT_LEVEL_MASK, GUEST_PGTABLE_4_LEVEL);

drivers/iommu/amd/iommu.c

2111

FIELD_PREP(DTE_MODE_MASK, pt_info->mode) |

drivers/iommu/amd/iommu.c

2113

FIELD_PREP(DTE_HOST_TRP, host_pt_root >> 12) |

drivers/iommu/amd/iommu.c

2116

new->data[1] |= FIELD_PREP(DTE_DOMID_MASK, domid) |

drivers/iommu/amd/iommu.c

2150

new->data[1] |= FIELD_PREP(DTE_DOMID_MASK, domain->id) |

drivers/iommu/apple-dart.c

425

u32 val = FIELD_PREP(DART_T8110_TLB_CMD_OP, command) |

drivers/iommu/apple-dart.c

426

FIELD_PREP(DART_T8110_TLB_CMD_STREAM, sid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c

326

FIELD_PREP(CMDQ_TLBI_0_VMID, vsmmu->vmid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c

334

cmd->cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, vsmmu->vmid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c

344

cmd->cmd[0] |= FIELD_PREP(CMDQ_CFGI_0_SID, sid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c

478

FIELD_PREP(EVTQ_0_SID, vmaster->vsid));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c

50

FIELD_PREP(STRTAB_STE_0_CFG,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

69

FIELD_PREP(CTXDESC_CD_0_TCR_IPS, par) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

75

FIELD_PREP(CTXDESC_CD_0_ASID, asid));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

84

FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

86

FIELD_PREP(CTXDESC_CD_0_TCR_TG0, page_size_to_cd()) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

87

FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

89

FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

91

FIELD_PREP(CTXDESC_CD_0_TCR_SH0, ARM_LPAE_TCR_SH_IS));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c

224

FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_NESTED));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1101

FIELD_PREP(STRTAB_STE_1_EATS, STRTAB_STE_1_EATS_S1CHK);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1103

FIELD_PREP(STRTAB_STE_1_EATS, STRTAB_STE_1_EATS_TRANS);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1447

FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1448

FIELD_PREP(CTXDESC_CD_0_TCR_TG0, tcr->tg) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1449

FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, tcr->irgn) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1450

FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, tcr->orgn) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1451

FIELD_PREP(CTXDESC_CD_0_TCR_SH0, tcr->sh) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1457

FIELD_PREP(CTXDESC_CD_0_TCR_IPS, tcr->ips) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1463

FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid)

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1575

val |= FIELD_PREP(STRTAB_L1_DESC_SPAN, STRTAB_SPLIT + 1);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1640

FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_ABORT));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1651

FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_BYPASS));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1654

target->data[1] = cpu_to_le64(FIELD_PREP(STRTAB_STE_1_SHCFG,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1670

FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1671

FIELD_PREP(STRTAB_STE_0_S1FMT, cd_table->s1fmt) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1673

FIELD_PREP(STRTAB_STE_0_S1CDMAX, cd_table->s1cdmax));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1676

FIELD_PREP(STRTAB_STE_1_S1DSS, s1dss) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1677

FIELD_PREP(STRTAB_STE_1_S1CIR, STRTAB_STE_1_S1C_CACHE_WBRA) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1678

FIELD_PREP(STRTAB_STE_1_S1COR, STRTAB_STE_1_S1C_CACHE_WBRA) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1679

FIELD_PREP(STRTAB_STE_1_S1CSH, ARM_SMMU_SH_ISH) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1684

FIELD_PREP(STRTAB_STE_1_EATS,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1689

target->data[1] |= cpu_to_le64(FIELD_PREP(

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1702

FIELD_PREP(STRTAB_STE_1_STRW, STRTAB_STE_1_STRW_EL2));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1705

FIELD_PREP(STRTAB_STE_1_STRW, STRTAB_STE_1_STRW_NSEL1));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1712

cpu_to_le64(FIELD_PREP(STRTAB_STE_2_S2VMID, 0));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1733

FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S2_TRANS));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1736

FIELD_PREP(STRTAB_STE_1_EATS,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1742

target->data[1] |= cpu_to_le64(FIELD_PREP(STRTAB_STE_1_SHCFG,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1745

vtcr_val = FIELD_PREP(STRTAB_STE_2_VTCR_S2T0SZ, vtcr->tsz) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1746

FIELD_PREP(STRTAB_STE_2_VTCR_S2SL0, vtcr->sl) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1747

FIELD_PREP(STRTAB_STE_2_VTCR_S2IR0, vtcr->irgn) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1748

FIELD_PREP(STRTAB_STE_2_VTCR_S2OR0, vtcr->orgn) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1749

FIELD_PREP(STRTAB_STE_2_VTCR_S2SH0, vtcr->sh) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1750

FIELD_PREP(STRTAB_STE_2_VTCR_S2TG, vtcr->tg) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1751

FIELD_PREP(STRTAB_STE_2_VTCR_S2PS, vtcr->ps);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1753

FIELD_PREP(STRTAB_STE_2_S2VMID, s2_cfg->vmid) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

1754

FIELD_PREP(STRTAB_STE_2_VTCR, vtcr_val) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

272

cmd[0] |= FIELD_PREP(CMDQ_0_OP, ent->opcode);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

279

cmd[0] |= FIELD_PREP(CMDQ_PREFETCH_0_SID, ent->prefetch.sid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

282

cmd[0] |= FIELD_PREP(CMDQ_CFGI_0_SSID, ent->cfgi.ssid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

285

cmd[0] |= FIELD_PREP(CMDQ_CFGI_0_SID, ent->cfgi.sid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

286

cmd[1] |= FIELD_PREP(CMDQ_CFGI_1_LEAF, ent->cfgi.leaf);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

289

cmd[0] |= FIELD_PREP(CMDQ_CFGI_0_SID, ent->cfgi.sid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

293

cmd[1] |= FIELD_PREP(CMDQ_CFGI_1_RANGE, 31);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

296

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, ent->tlbi.vmid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

299

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_NUM, ent->tlbi.num);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

300

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_SCALE, ent->tlbi.scale);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

301

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

302

cmd[1] |= FIELD_PREP(CMDQ_TLBI_1_LEAF, ent->tlbi.leaf);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

303

cmd[1] |= FIELD_PREP(CMDQ_TLBI_1_TTL, ent->tlbi.ttl);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

304

cmd[1] |= FIELD_PREP(CMDQ_TLBI_1_TG, ent->tlbi.tg);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

308

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_NUM, ent->tlbi.num);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

309

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_SCALE, ent->tlbi.scale);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

310

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, ent->tlbi.vmid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

311

cmd[1] |= FIELD_PREP(CMDQ_TLBI_1_LEAF, ent->tlbi.leaf);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

312

cmd[1] |= FIELD_PREP(CMDQ_TLBI_1_TTL, ent->tlbi.ttl);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

313

cmd[1] |= FIELD_PREP(CMDQ_TLBI_1_TG, ent->tlbi.tg);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

317

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

321

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, ent->tlbi.vmid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

3223

FIELD_PREP(CTXDESC_CD_0_ASID, smmu_domain->cd.asid));

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

324

cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

327

cmd[0] |= FIELD_PREP(CMDQ_0_SSV, ent->substream_valid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

328

cmd[0] |= FIELD_PREP(CMDQ_ATC_0_GLOBAL, ent->atc.global);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

329

cmd[0] |= FIELD_PREP(CMDQ_ATC_0_SSID, ent->atc.ssid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

330

cmd[0] |= FIELD_PREP(CMDQ_ATC_0_SID, ent->atc.sid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

331

cmd[1] |= FIELD_PREP(CMDQ_ATC_1_SIZE, ent->atc.size);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

335

cmd[0] |= FIELD_PREP(CMDQ_0_SSV, ent->substream_valid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

336

cmd[0] |= FIELD_PREP(CMDQ_PRI_0_SSID, ent->pri.ssid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

337

cmd[0] |= FIELD_PREP(CMDQ_PRI_0_SID, ent->pri.sid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

338

cmd[1] |= FIELD_PREP(CMDQ_PRI_1_GRPID, ent->pri.grpid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

347

cmd[1] |= FIELD_PREP(CMDQ_PRI_1_RESP, ent->pri.resp);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

350

cmd[0] |= FIELD_PREP(CMDQ_RESUME_0_SID, ent->resume.sid);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

351

cmd[0] |= FIELD_PREP(CMDQ_RESUME_0_RESP, ent->resume.resp);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

352

cmd[1] |= FIELD_PREP(CMDQ_RESUME_1_STAG, ent->resume.stag);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

356

cmd[0] |= FIELD_PREP(CMDQ_SYNC_0_CS, CMDQ_SYNC_0_CS_IRQ);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

359

cmd[0] |= FIELD_PREP(CMDQ_SYNC_0_CS, CMDQ_SYNC_0_CS_SEV);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

361

cmd[0] |= FIELD_PREP(CMDQ_SYNC_0_MSH, ARM_SMMU_SH_ISH);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

362

cmd[0] |= FIELD_PREP(CMDQ_SYNC_0_MSIATTR, ARM_SMMU_MEMATTR_OIWB);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

3811

q->q_base |= FIELD_PREP(Q_BASE_LOG2SIZE, q->llq.max_n_shift);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4158

reg = FIELD_PREP(STRTAB_BASE_CFG_FMT,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4160

FIELD_PREP(STRTAB_BASE_CFG_LOG2SIZE,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4162

FIELD_PREP(STRTAB_BASE_CFG_SPLIT, STRTAB_SPLIT);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4165

reg = FIELD_PREP(STRTAB_BASE_CFG_FMT,

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4167

FIELD_PREP(STRTAB_BASE_CFG_LOG2SIZE, smmu->sid_bits);

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4193

reg = FIELD_PREP(CR1_TABLE_SH, ARM_SMMU_SH_ISH) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4194

FIELD_PREP(CR1_TABLE_OC, CR1_CACHE_WB) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4195

FIELD_PREP(CR1_TABLE_IC, CR1_CACHE_WB) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4196

FIELD_PREP(CR1_QUEUE_SH, ARM_SMMU_SH_ISH) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4197

FIELD_PREP(CR1_QUEUE_OC, CR1_CACHE_WB) |

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4198

FIELD_PREP(CR1_QUEUE_IC, CR1_CACHE_WB);

drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c

432

cmd_sync[0] = FIELD_PREP(CMDQ_0_OP, CMDQ_OP_CMD_SYNC) |

drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c

433

FIELD_PREP(CMDQ_SYNC_0_CS, CMDQ_SYNC_0_CS_NONE);

drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c

555

regval = FIELD_PREP(VINTF_HYP_OWN, hyp_own) |

drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c

556

FIELD_PREP(VINTF_VMID, vintf->vsmmu.vmid);

drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c

603

regval = FIELD_PREP(CMDQV_CMDQ_ALLOC_VINTF, idx);

drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c

604

regval |= FIELD_PREP(CMDQV_CMDQ_ALLOC_LVCMDQ, lidx);

drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c

640

q->q_base |= FIELD_PREP(VCMDQ_LOG2SIZE, q->llq.max_n_shift);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

212

val |= FIELD_PREP(DEBUG_SID_HALT_SID, sid);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

215

val = FIELD_PREP(DEBUG_AXUSER_CDMID, DEBUG_AXUSER_CDMID_VAL);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

219

val = FIELD_PREP(DEBUG_TXN_AXCACHE, 0xf);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

222

val |= FIELD_PREP(DEBUG_TXN_AXPROT, DEBUG_TXN_AXPROT_NSEC);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c

225

val |= FIELD_PREP(DEBUG_TXN_AXPROT, DEBUG_TXN_AXPROT_PRIV);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

195

reg |= FIELD_PREP(GFX_ACTLR_PRR, 1);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

275

cb->ttbr[0] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, cb->cfg->asid);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

288

cb->ttbr[0] |= FIELD_PREP(ARM_SMMU_TTBRn_ASID, cb->cfg->asid);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

483

reg = FIELD_PREP(ARM_SMMU_S2CR_TYPE, S2CR_TYPE_BYPASS) |

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

484

FIELD_PREP(ARM_SMMU_S2CR_CBNDX, 0xff) |

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

485

FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, S2CR_PRIVCFG_DEFAULT);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

496

reg = FIELD_PREP(ARM_SMMU_CBAR_TYPE, CBAR_TYPE_S1_TRANS_S2_BYPASS);

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

566

reg = FIELD_PREP(ARM_SMMU_S2CR_TYPE, type) |

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

567

FIELD_PREP(ARM_SMMU_S2CR_CBNDX, cbndx) |

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c

568

FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, s2cr->privcfg);

drivers/iommu/arm/arm-smmu/arm-smmu.c

1020

smr = FIELD_PREP(ARM_SMMU_SMR_ID, smmu->streamid_mask);

drivers/iommu/arm/arm-smmu/arm-smmu.c

1025

smr = FIELD_PREP(ARM_SMMU_SMR_MASK, smmu->streamid_mask);

drivers/iommu/arm/arm-smmu/arm-smmu.c

1596

fwid |= FIELD_PREP(ARM_SMMU_SMR_ID, args->args[0]);

drivers/iommu/arm/arm-smmu/arm-smmu.c

1599

fwid |= FIELD_PREP(ARM_SMMU_SMR_MASK, args->args[1]);

drivers/iommu/arm/arm-smmu/arm-smmu.c

1601

fwid |= FIELD_PREP(ARM_SMMU_SMR_MASK, mask);

drivers/iommu/arm/arm-smmu/arm-smmu.c

550

cb->ttbr[0] = FIELD_PREP(ARM_SMMU_TTBRn_ASID,

drivers/iommu/arm/arm-smmu/arm-smmu.c

552

cb->ttbr[1] = FIELD_PREP(ARM_SMMU_TTBRn_ASID,

drivers/iommu/arm/arm-smmu/arm-smmu.c

599

reg |= FIELD_PREP(ARM_SMMU_CBA2R_VMID16, cfg->vmid);

drivers/iommu/arm/arm-smmu/arm-smmu.c

605

reg = FIELD_PREP(ARM_SMMU_CBAR_TYPE, cfg->cbar);

drivers/iommu/arm/arm-smmu/arm-smmu.c

607

reg |= FIELD_PREP(ARM_SMMU_CBAR_IRPTNDX, cfg->irptndx);

drivers/iommu/arm/arm-smmu/arm-smmu.c

614

reg |= FIELD_PREP(ARM_SMMU_CBAR_S1_BPSHCFG,

drivers/iommu/arm/arm-smmu/arm-smmu.c

616

FIELD_PREP(ARM_SMMU_CBAR_S1_MEMATTR,

drivers/iommu/arm/arm-smmu/arm-smmu.c

620

reg |= FIELD_PREP(ARM_SMMU_CBAR_VMID, cfg->vmid);

drivers/iommu/arm/arm-smmu/arm-smmu.c

956

u32 reg = FIELD_PREP(ARM_SMMU_SMR_ID, smr->id) |

drivers/iommu/arm/arm-smmu/arm-smmu.c

957

FIELD_PREP(ARM_SMMU_SMR_MASK, smr->mask);

drivers/iommu/arm/arm-smmu/arm-smmu.c

974

reg = FIELD_PREP(ARM_SMMU_S2CR_TYPE, s2cr->type) |

drivers/iommu/arm/arm-smmu/arm-smmu.c

975

FIELD_PREP(ARM_SMMU_S2CR_CBNDX, s2cr->cbndx) |

drivers/iommu/arm/arm-smmu/arm-smmu.c

976

FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, s2cr->privcfg);

drivers/iommu/arm/arm-smmu/arm-smmu.h

397

u32 tcr = FIELD_PREP(ARM_SMMU_TCR_TG0, cfg->arm_lpae_s1_cfg.tcr.tg) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

398

FIELD_PREP(ARM_SMMU_TCR_SH0, cfg->arm_lpae_s1_cfg.tcr.sh) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

399

FIELD_PREP(ARM_SMMU_TCR_ORGN0, cfg->arm_lpae_s1_cfg.tcr.orgn) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

400

FIELD_PREP(ARM_SMMU_TCR_IRGN0, cfg->arm_lpae_s1_cfg.tcr.irgn) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

401

FIELD_PREP(ARM_SMMU_TCR_T0SZ, cfg->arm_lpae_s1_cfg.tcr.tsz);

drivers/iommu/arm/arm-smmu/arm-smmu.h

418

return FIELD_PREP(ARM_SMMU_TCR2_PASIZE, cfg->arm_lpae_s1_cfg.tcr.ips) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

419

FIELD_PREP(ARM_SMMU_TCR2_SEP, ARM_SMMU_TCR2_SEP_UPSTREAM);

drivers/iommu/arm/arm-smmu/arm-smmu.h

425

FIELD_PREP(ARM_SMMU_VTCR_PS, cfg->arm_lpae_s2_cfg.vtcr.ps) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

426

FIELD_PREP(ARM_SMMU_VTCR_TG0, cfg->arm_lpae_s2_cfg.vtcr.tg) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

427

FIELD_PREP(ARM_SMMU_VTCR_SH0, cfg->arm_lpae_s2_cfg.vtcr.sh) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

428

FIELD_PREP(ARM_SMMU_VTCR_ORGN0, cfg->arm_lpae_s2_cfg.vtcr.orgn) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

429

FIELD_PREP(ARM_SMMU_VTCR_IRGN0, cfg->arm_lpae_s2_cfg.vtcr.irgn) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

430

FIELD_PREP(ARM_SMMU_VTCR_SL0, cfg->arm_lpae_s2_cfg.vtcr.sl) |

drivers/iommu/arm/arm-smmu/arm-smmu.h

431

FIELD_PREP(ARM_SMMU_VTCR_T0SZ, cfg->arm_lpae_s2_cfg.vtcr.tsz);

drivers/iommu/arm/arm-smmu/qcom_iommu.c

280

FIELD_PREP(ARM_SMMU_TTBRn_ASID, ctx->asid));

drivers/iommu/generic_pt/fmt/amdv1.h

207

FIELD_PREP(AMDV1PT_FMT_OA, log2_div(oa, PT_GRANULE_LG2SZ)) |

drivers/iommu/generic_pt/fmt/amdv1.h

211

entry |= FIELD_PREP(AMDV1PT_FMT_NEXT_LEVEL,

drivers/iommu/generic_pt/fmt/amdv1.h

218

entry |= FIELD_PREP(AMDV1PT_FMT_NEXT_LEVEL,

drivers/iommu/generic_pt/fmt/amdv1.h

220

FIELD_PREP(AMDV1PT_FMT_OA,

drivers/iommu/generic_pt/fmt/amdv1.h

249

FIELD_PREP(AMDV1PT_FMT_NEXT_LEVEL, pts->level) |

drivers/iommu/generic_pt/fmt/amdv1.h

250

FIELD_PREP(AMDV1PT_FMT_OA,

drivers/iommu/generic_pt/fmt/vtdss.h

114

entry = FIELD_PREP(VTDSS_FMT_OA, log2_div(oa, PT_GRANULE_LG2SZ)) |

drivers/iommu/generic_pt/fmt/vtdss.h

131

FIELD_PREP(VTDSS_FMT_OA, log2_div(table_pa, PT_GRANULE_LG2SZ));

drivers/iommu/generic_pt/fmt/x86_64.h

137

FIELD_PREP(X86_64_FMT_OA, log2_div(oa, PT_GRANULE_LG2SZ)) |

drivers/iommu/generic_pt/fmt/x86_64.h

154

FIELD_PREP(X86_64_FMT_OA, log2_div(table_pa, PT_GRANULE_LG2SZ));

drivers/iommu/io-pgtable-dart.c

129

pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_START, 0);

drivers/iommu/io-pgtable-dart.c

130

pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_END, 0xfff);

drivers/iommu/riscv/iommu-bits.h

713

cmd->dword0 = FIELD_PREP(RISCV_IOMMU_CMD_OPCODE, RISCV_IOMMU_CMD_IOTINVAL_OPCODE) |

drivers/iommu/riscv/iommu-bits.h

714

FIELD_PREP(RISCV_IOMMU_CMD_FUNC, RISCV_IOMMU_CMD_IOTINVAL_FUNC_VMA);

drivers/iommu/riscv/iommu-bits.h

721

cmd->dword1 = FIELD_PREP(RISCV_IOMMU_CMD_IOTINVAL_ADDR, phys_to_pfn(addr));

drivers/iommu/riscv/iommu-bits.h

728

cmd->dword0 |= FIELD_PREP(RISCV_IOMMU_CMD_IOTINVAL_PSCID, pscid) |

drivers/iommu/riscv/iommu-bits.h

735

cmd->dword0 |= FIELD_PREP(RISCV_IOMMU_CMD_IOTINVAL_GSCID, gscid) |

drivers/iommu/riscv/iommu-bits.h

741

cmd->dword0 = FIELD_PREP(RISCV_IOMMU_CMD_OPCODE, RISCV_IOMMU_CMD_IOFENCE_OPCODE) |

drivers/iommu/riscv/iommu-bits.h

742

FIELD_PREP(RISCV_IOMMU_CMD_FUNC, RISCV_IOMMU_CMD_IOFENCE_FUNC_C) |

drivers/iommu/riscv/iommu-bits.h

750

cmd->dword0 = FIELD_PREP(RISCV_IOMMU_CMD_OPCODE, RISCV_IOMMU_CMD_IOFENCE_OPCODE) |

drivers/iommu/riscv/iommu-bits.h

751

FIELD_PREP(RISCV_IOMMU_CMD_FUNC, RISCV_IOMMU_CMD_IOFENCE_FUNC_C) |

drivers/iommu/riscv/iommu-bits.h

752

FIELD_PREP(RISCV_IOMMU_CMD_IOFENCE_DATA, data) |

drivers/iommu/riscv/iommu-bits.h

759

cmd->dword0 = FIELD_PREP(RISCV_IOMMU_CMD_OPCODE, RISCV_IOMMU_CMD_IODIR_OPCODE) |

drivers/iommu/riscv/iommu-bits.h

760

FIELD_PREP(RISCV_IOMMU_CMD_FUNC, RISCV_IOMMU_CMD_IODIR_FUNC_INVAL_DDT);

drivers/iommu/riscv/iommu-bits.h

766

cmd->dword0 = FIELD_PREP(RISCV_IOMMU_CMD_OPCODE, RISCV_IOMMU_CMD_IODIR_OPCODE) |

drivers/iommu/riscv/iommu-bits.h

767

FIELD_PREP(RISCV_IOMMU_CMD_FUNC, RISCV_IOMMU_CMD_IODIR_FUNC_INVAL_PDT);

drivers/iommu/riscv/iommu-bits.h

774

cmd->dword0 |= FIELD_PREP(RISCV_IOMMU_CMD_IODIR_DID, devid) |

drivers/iommu/riscv/iommu-bits.h

781

cmd->dword0 |= FIELD_PREP(RISCV_IOMMU_CMD_IODIR_PID, pasid);

drivers/iommu/riscv/iommu.c

1335

fsc = FIELD_PREP(RISCV_IOMMU_PC_FSC_MODE, domain->pgd_mode) |

drivers/iommu/riscv/iommu.c

1336

FIELD_PREP(RISCV_IOMMU_PC_FSC_PPN, virt_to_pfn(domain->pgd_root));

drivers/iommu/riscv/iommu.c

1337

ta = FIELD_PREP(RISCV_IOMMU_PC_TA_PSCID, domain->pscid) |

drivers/iommu/riscv/iommu.c

1591

iommu->icvec = FIELD_PREP(RISCV_IOMMU_ICVEC_FIV, 1 % iommu->irqs_count) |

drivers/iommu/riscv/iommu.c

1592

FIELD_PREP(RISCV_IOMMU_ICVEC_PIV, 2 % iommu->irqs_count) |

drivers/iommu/riscv/iommu.c

1593

FIELD_PREP(RISCV_IOMMU_ICVEC_PMIV, 3 % iommu->irqs_count);

drivers/iommu/riscv/iommu.c

178

FIELD_PREP(RISCV_IOMMU_QUEUE_LOG2SZ_FIELD, logsz);

drivers/iommu/riscv/iommu.c

658

FIELD_PREP(RISCV_IOMMU_DDTP_IOMMU_MODE,

drivers/iommu/riscv/iommu.c

690

FIELD_PREP(RISCV_IOMMU_DDTP_IOMMU_MODE, mode));

drivers/iommu/riscv/iommu.c

740

rq_ddtp = FIELD_PREP(RISCV_IOMMU_DDTP_IOMMU_MODE, rq_mode);

drivers/iommu/sun50i-iommu.c

286

flags |= FIELD_PREP(SUN50I_PTE_ACI_MASK, aci);

drivers/irqchip/irq-apple-aic.c

206

#define AIC_IRQ_HWIRQ(die, irq) (FIELD_PREP(AIC_EVENT_DIE, die) | \

drivers/irqchip/irq-apple-aic.c

207

FIELD_PREP(AIC_EVENT_TYPE, AIC_EVENT_TYPE_IRQ) | \

drivers/irqchip/irq-apple-aic.c

208

FIELD_PREP(AIC_EVENT_NUM, irq))

drivers/irqchip/irq-apple-aic.c

209

#define AIC_FIQ_HWIRQ(x) (FIELD_PREP(AIC_EVENT_TYPE, AIC_EVENT_TYPE_FIQ) | \

drivers/irqchip/irq-apple-aic.c

210

FIELD_PREP(AIC_EVENT_NUM, x))

drivers/irqchip/irq-apple-aic.c

584

(FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_FIQ) | PMCR0_IACT))

drivers/irqchip/irq-apple-aic.c

594

FIELD_PREP(UPMCR0_IMODE, UPMCR0_IMODE_OFF));

drivers/irqchip/irq-apple-aic.c

787

write_sysreg_s(FIELD_PREP(IPI_RR_CPU, idx), SYS_IMP_APL_IPI_RR_LOCAL_EL1);

drivers/irqchip/irq-apple-aic.c

789

write_sysreg_s(FIELD_PREP(IPI_RR_CPU, idx) | FIELD_PREP(IPI_RR_CLUSTER, cluster),

drivers/irqchip/irq-apple-aic.c

866

FIELD_PREP(PMCR0_IMODE, PMCR0_IMODE_OFF));

drivers/irqchip/irq-apple-aic.c

871

FIELD_PREP(UPMCR0_IMODE, UPMCR0_IMODE_OFF));

drivers/irqchip/irq-gic-v3-its.c

1578

val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id);

drivers/irqchip/irq-gic-v3-its.c

1579

val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid);

drivers/irqchip/irq-gic-v3-its.c

2566

val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet);

drivers/irqchip/irq-gic-v3-its.c

2567

val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr);

drivers/irqchip/irq-gic-v3-its.c

2641

val |= FIELD_PREP(GITS_BASER_PAGE_SIZE_MASK, gpsz);

drivers/irqchip/irq-gic-v3-its.c

2765

val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE,

drivers/irqchip/irq-gic-v3-its.c

2775

val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12);

drivers/irqchip/irq-gic-v3-its.c

2777

val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK,

drivers/irqchip/irq-gic-v3-its.c

2779

val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK,

drivers/irqchip/irq-gic-v3-its.c

2782

val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1);

drivers/irqchip/irq-gic-v3-its.c

2939

val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K);

drivers/irqchip/irq-gic-v3-its.c

2965

val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz);

drivers/irqchip/irq-gic-v3-its.c

2966

val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz);

drivers/irqchip/irq-gic-v3-its.c

2990

val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1);

drivers/irqchip/irq-gic-v3-its.c

3005

val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12);

drivers/irqchip/irq-gic-v3-its.c

3901

val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id);

drivers/irqchip/irq-gic-v3-its.c

4247

val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);

drivers/irqchip/irq-gic-v3-its.c

4397

val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id);

drivers/irqchip/irq-gic-v3-its.c

4398

val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq);

drivers/irqchip/irq-gic-v3-its.c

4788

its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1);

drivers/irqchip/irq-gic-v3-its.c

4809

its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1);

drivers/irqchip/irq-gic-v3-its.c

4845

its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1);

drivers/irqchip/irq-gic-v3.c

1833

phys |= FIELD_PREP(T241_CHIPN_MASK, i);

drivers/irqchip/irq-gic-v5-irs.c

103

cfgr = FIELD_PREP(GICV5_IRS_IST_CFGR_STRUCTURE,

drivers/irqchip/irq-gic-v5-irs.c

105

FIELD_PREP(GICV5_IRS_IST_CFGR_ISTSZ, istsz) |

drivers/irqchip/irq-gic-v5-irs.c

106

FIELD_PREP(GICV5_IRS_IST_CFGR_L2SZ,

drivers/irqchip/irq-gic-v5-irs.c

108

FIELD_PREP(GICV5_IRS_IST_CFGR_LPI_ID_BITS, lpi_id_bits);

drivers/irqchip/irq-gic-v5-irs.c

114

FIELD_PREP(GICV5_IRS_IST_BASER_VALID, 0x1);

drivers/irqchip/irq-gic-v5-irs.c

153

cfgr = FIELD_PREP(GICV5_IRS_IST_CFGR_STRUCTURE,

drivers/irqchip/irq-gic-v5-irs.c

155

FIELD_PREP(GICV5_IRS_IST_CFGR_ISTSZ, istsz) |

drivers/irqchip/irq-gic-v5-irs.c

156

FIELD_PREP(GICV5_IRS_IST_CFGR_L2SZ, l2sz) |

drivers/irqchip/irq-gic-v5-irs.c

157

FIELD_PREP(GICV5_IRS_IST_CFGR_LPI_ID_BITS, lpi_id_bits);

drivers/irqchip/irq-gic-v5-irs.c

171

FIELD_PREP(GICV5_IRS_IST_BASER_VALID, 0x1);

drivers/irqchip/irq-gic-v5-irs.c

229

l2istr = FIELD_PREP(GICV5_IRS_MAP_L2_ISTR_ID, lpi);

drivers/irqchip/irq-gic-v5-irs.c

473

selr = FIELD_PREP(GICV5_IRS_SPI_SELR_ID, d->hwirq);

drivers/irqchip/irq-gic-v5-irs.c

479

cfgr = FIELD_PREP(GICV5_IRS_SPI_CFGR_TM, level);

drivers/irqchip/irq-gic-v5-irs.c

500

syncr = FIELD_PREP(GICV5_IRS_SYNCR_SYNC, 1);

drivers/irqchip/irq-gic-v5-irs.c

526

selr = FIELD_PREP(GICV5_IRS_PE_SELR_IAFFID, iaffid);

drivers/irqchip/irq-gic-v5-irs.c

535

cr0 = FIELD_PREP(GICV5_IRS_PE_CR0_DPS, 0x1);

drivers/irqchip/irq-gic-v5-irs.c

563

cr1 = FIELD_PREP(GICV5_IRS_CR1_VPED_WA, GICV5_NO_WRITE_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

564

FIELD_PREP(GICV5_IRS_CR1_VPED_RA, GICV5_NO_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

565

FIELD_PREP(GICV5_IRS_CR1_VMD_WA, GICV5_NO_WRITE_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

566

FIELD_PREP(GICV5_IRS_CR1_VMD_RA, GICV5_NO_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

567

FIELD_PREP(GICV5_IRS_CR1_VPET_RA, GICV5_NO_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

568

FIELD_PREP(GICV5_IRS_CR1_VMT_RA, GICV5_NO_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

569

FIELD_PREP(GICV5_IRS_CR1_IST_WA, GICV5_NO_WRITE_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

570

FIELD_PREP(GICV5_IRS_CR1_IST_RA, GICV5_NO_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

571

FIELD_PREP(GICV5_IRS_CR1_IC, GICV5_NON_CACHE) |

drivers/irqchip/irq-gic-v5-irs.c

572

FIELD_PREP(GICV5_IRS_CR1_OC, GICV5_NON_CACHE);

drivers/irqchip/irq-gic-v5-irs.c

575

cr1 = FIELD_PREP(GICV5_IRS_CR1_VPED_WA, GICV5_WRITE_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

576

FIELD_PREP(GICV5_IRS_CR1_VPED_RA, GICV5_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

577

FIELD_PREP(GICV5_IRS_CR1_VMD_WA, GICV5_WRITE_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

578

FIELD_PREP(GICV5_IRS_CR1_VMD_RA, GICV5_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

579

FIELD_PREP(GICV5_IRS_CR1_VPET_RA, GICV5_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

580

FIELD_PREP(GICV5_IRS_CR1_VMT_RA, GICV5_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

581

FIELD_PREP(GICV5_IRS_CR1_IST_WA, GICV5_WRITE_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

582

FIELD_PREP(GICV5_IRS_CR1_IST_RA, GICV5_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-irs.c

583

FIELD_PREP(GICV5_IRS_CR1_IC, GICV5_WB_CACHE) |

drivers/irqchip/irq-gic-v5-irs.c

584

FIELD_PREP(GICV5_IRS_CR1_OC, GICV5_WB_CACHE) |

drivers/irqchip/irq-gic-v5-irs.c

585

FIELD_PREP(GICV5_IRS_CR1_SH, GICV5_INNER_SHARE);

drivers/irqchip/irq-gic-v5-irs.c

590

cr0 = FIELD_PREP(GICV5_IRS_CR0_IRSEN, 0x1);

drivers/irqchip/irq-gic-v5-its.c

1059

u32 cr0 = FIELD_PREP(GICV5_ITS_CR0_ITSEN, enable);

drivers/irqchip/irq-gic-v5-its.c

1155

cr1 = FIELD_PREP(GICV5_ITS_CR1_ITT_RA, GICV5_NO_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-its.c

1156

FIELD_PREP(GICV5_ITS_CR1_DT_RA, GICV5_NO_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-its.c

1157

FIELD_PREP(GICV5_ITS_CR1_IC, GICV5_NON_CACHE) |

drivers/irqchip/irq-gic-v5-its.c

1158

FIELD_PREP(GICV5_ITS_CR1_OC, GICV5_NON_CACHE);

drivers/irqchip/irq-gic-v5-its.c

1161

cr1 = FIELD_PREP(GICV5_ITS_CR1_ITT_RA, GICV5_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-its.c

1162

FIELD_PREP(GICV5_ITS_CR1_DT_RA, GICV5_READ_ALLOC) |

drivers/irqchip/irq-gic-v5-its.c

1163

FIELD_PREP(GICV5_ITS_CR1_IC, GICV5_WB_CACHE) |

drivers/irqchip/irq-gic-v5-its.c

1164

FIELD_PREP(GICV5_ITS_CR1_OC, GICV5_WB_CACHE) |

drivers/irqchip/irq-gic-v5-its.c

1165

FIELD_PREP(GICV5_ITS_CR1_SH, GICV5_INNER_SHARE);

drivers/irqchip/irq-gic-v5-its.c

128

didr = FIELD_PREP(GICV5_ITS_DIDR_DEVICEID, device_id);

drivers/irqchip/irq-gic-v5-its.c

129

eidr = FIELD_PREP(GICV5_ITS_EIDR_EVENTID, event_id);

drivers/irqchip/irq-gic-v5-its.c

130

eventr = FIELD_PREP(GICV5_ITS_INV_EVENTR_I, 0x1);

drivers/irqchip/irq-gic-v5-its.c

258

FIELD_PREP(GICV5_ITTL1E_SPAN, span) |

drivers/irqchip/irq-gic-v5-its.c

259

FIELD_PREP(GICV5_ITTL1E_VALID, 0x1);

drivers/irqchip/irq-gic-v5-its.c

369

didr = FIELD_PREP(GICV5_ITS_DIDR_DEVICEID, its_dev->device_id);

drivers/irqchip/irq-gic-v5-its.c

370

devicer = FIELD_PREP(GICV5_ITS_INV_DEVICER_I, 0x1) |

drivers/irqchip/irq-gic-v5-its.c

371

FIELD_PREP(GICV5_ITS_INV_DEVICER_EVENTID_BITS,

drivers/irqchip/irq-gic-v5-its.c

373

FIELD_PREP(GICV5_ITS_INV_DEVICER_L1, 0x0);

drivers/irqchip/irq-gic-v5-its.c

412

l1dte = FIELD_PREP(GICV5_DTL1E_SPAN, span) |

drivers/irqchip/irq-gic-v5-its.c

414

FIELD_PREP(GICV5_DTL1E_VALID, 0x1);

drivers/irqchip/irq-gic-v5-its.c

525

val = FIELD_PREP(GICV5_DTL2E_EVENT_ID_BITS, event_id_bits) |

drivers/irqchip/irq-gic-v5-its.c

526

FIELD_PREP(GICV5_DTL2E_ITT_STRUCTURE, itt_struct) |

drivers/irqchip/irq-gic-v5-its.c

528

FIELD_PREP(GICV5_DTL2E_ITT_L2SZ, itt_l2sz) |

drivers/irqchip/irq-gic-v5-its.c

529

FIELD_PREP(GICV5_DTL2E_VALID, 0x1);

drivers/irqchip/irq-gic-v5-its.c

602

cfgr = FIELD_PREP(GICV5_ITS_DT_CFGR_STRUCTURE,

drivers/irqchip/irq-gic-v5-its.c

604

FIELD_PREP(GICV5_ITS_DT_CFGR_L2SZ, 0) |

drivers/irqchip/irq-gic-v5-its.c

605

FIELD_PREP(GICV5_ITS_DT_CFGR_DEVICEID_BITS, device_id_bits);

drivers/irqchip/irq-gic-v5-its.c

663

l1devtab[i] = cpu_to_le64(FIELD_PREP(GICV5_DTL1E_SPAN, l2_bits));

drivers/irqchip/irq-gic-v5-its.c

667

cfgr = FIELD_PREP(GICV5_ITS_DT_CFGR_STRUCTURE,

drivers/irqchip/irq-gic-v5-its.c

669

FIELD_PREP(GICV5_ITS_DT_CFGR_L2SZ, devtab_l2sz) |

drivers/irqchip/irq-gic-v5-its.c

670

FIELD_PREP(GICV5_ITS_DT_CFGR_DEVICEID_BITS, device_id_bits);

drivers/irqchip/irq-gic-v5-its.c

857

itt_entry = FIELD_PREP(GICV5_ITTL2E_LPI_ID, lpi) |

drivers/irqchip/irq-gic-v5-its.c

858

FIELD_PREP(GICV5_ITTL2E_VALID, 0x1);

drivers/irqchip/irq-gic-v5-its.c

96

syncr = FIELD_PREP(GICV5_ITS_SYNCR_SYNC, 1) |

drivers/irqchip/irq-gic-v5-its.c

97

FIELD_PREP(GICV5_ITS_SYNCR_DEVICEID, its_dev->device_id);

drivers/irqchip/irq-gic-v5-its.c

970

hwirq = FIELD_PREP(GICV5_ITS_HWIRQ_DEVICE_ID, device_id) |

drivers/irqchip/irq-gic-v5-its.c

971

FIELD_PREP(GICV5_ITS_HWIRQ_EVENT_ID, (u64)event_id_base + i);

drivers/irqchip/irq-gic-v5.c

105

cdpri = FIELD_PREP(GICV5_GIC_CDPRI_PRIORITY_MASK, priority) |

drivers/irqchip/irq-gic-v5.c

106

FIELD_PREP(GICV5_GIC_CDPRI_TYPE_MASK, hwirq_type) |

drivers/irqchip/irq-gic-v5.c

107

FIELD_PREP(GICV5_GIC_CDPRI_ID_MASK, hwirq);

drivers/irqchip/irq-gic-v5.c

115

cdaff = FIELD_PREP(GICV5_GIC_CDAFF_IAFFID_MASK, iaffid) |

drivers/irqchip/irq-gic-v5.c

116

FIELD_PREP(GICV5_GIC_CDAFF_TYPE_MASK, hwirq_type) |

drivers/irqchip/irq-gic-v5.c

117

FIELD_PREP(GICV5_GIC_CDAFF_ID_MASK, hwirq);

drivers/irqchip/irq-gic-v5.c

144

cddis = FIELD_PREP(GICV5_GIC_CDDIS_ID_MASK, d->hwirq) |

drivers/irqchip/irq-gic-v5.c

145

FIELD_PREP(GICV5_GIC_CDDIS_TYPE_MASK, hwirq_type);

drivers/irqchip/irq-gic-v5.c

193

cden = FIELD_PREP(GICV5_GIC_CDEN_ID_MASK, d->hwirq) |

drivers/irqchip/irq-gic-v5.c

194

FIELD_PREP(GICV5_GIC_CDEN_TYPE_MASK, hwirq_type);

drivers/irqchip/irq-gic-v5.c

217

cddi = FIELD_PREP(GICV5_GIC_CDDI_ID_MASK, hwirq_id) |

drivers/irqchip/irq-gic-v5.c

218

FIELD_PREP(GICV5_GIC_CDDI_TYPE_MASK, hwirq_type);

drivers/irqchip/irq-gic-v5.c

263

cdaff = FIELD_PREP(GICV5_GIC_CDAFF_IAFFID_MASK, iaffid) |

drivers/irqchip/irq-gic-v5.c

264

FIELD_PREP(GICV5_GIC_CDAFF_TYPE_MASK, hwirq_type) |

drivers/irqchip/irq-gic-v5.c

265

FIELD_PREP(GICV5_GIC_CDAFF_ID_MASK, d->hwirq);

drivers/irqchip/irq-gic-v5.c

375

cdrcfg = d->hwirq | FIELD_PREP(GICV5_GIC_CDRCFG_TYPE_MASK, hwirq_type);

drivers/irqchip/irq-gic-v5.c

439

cdpend = FIELD_PREP(GICV5_GIC_CDPEND_TYPE_MASK, hwirq_type) |

drivers/irqchip/irq-gic-v5.c

440

FIELD_PREP(GICV5_GIC_CDPEND_ID_MASK, d->hwirq) |

drivers/irqchip/irq-gic-v5.c

441

FIELD_PREP(GICV5_GIC_CDPEND_PENDING_MASK, state);

drivers/irqchip/irq-gic-v5.c

783

cdhm = FIELD_PREP(GICV5_GIC_CDHM_HM_MASK, 0) |

drivers/irqchip/irq-gic-v5.c

784

FIELD_PREP(GICV5_GIC_CDHM_TYPE_MASK, GICV5_HWIRQ_TYPE_LPI) |

drivers/irqchip/irq-gic-v5.c

785

FIELD_PREP(GICV5_GIC_CDHM_ID_MASK, d->hwirq);

drivers/irqchip/irq-gic-v5.c

957

cr0 = FIELD_PREP(ICC_CR0_EL1_EN, 0);

drivers/irqchip/irq-gic-v5.c

970

pcr = FIELD_PREP(ICC_PCR_EL1_PRIORITY, GICV5_IRQ_PRI_MI);

drivers/irqchip/irq-gic-v5.c

973

cr0 = FIELD_PREP(ICC_CR0_EL1_EN, 1);

drivers/irqchip/irq-owl-sirq.c

85

return FIELD_PREP(INTC_EXTCTL_SIRQ0_MASK, val);

drivers/irqchip/irq-owl-sirq.c

87

return FIELD_PREP(INTC_EXTCTL_SIRQ1_MASK, val);

drivers/irqchip/irq-owl-sirq.c

90

return FIELD_PREP(INTC_EXTCTL_SIRQ2_MASK, val);

drivers/irqchip/irq-renesas-rzt2h.c

45

#define RZT2H_ICU_PORTNF_MDi_PREP(i, val) (FIELD_PREP(GENMASK(1, 0), val) << ((i) * 2))

drivers/irqchip/irq-renesas-rzt2h.c

54

#define RZT2H_ICU_DMAC_REQ_SELx_PREP(x, val) (FIELD_PREP(GENMASK(9, 0), val) << ((x) * 10))

drivers/irqchip/irq-renesas-rzv2h.c

125

#define ICU_DMAC_PREP_DMAREQ(sel, up) (FIELD_PREP(ICU_DMAC_DkRQ_SEL_MASK, (sel)) \

drivers/irqchip/irq-riscv-aplic-direct.c

293

v = FIELD_PREP(APLIC_TARGET_HART_IDX, idc->hart_index);

drivers/irqchip/irq-riscv-aplic-direct.c

294

v |= FIELD_PREP(APLIC_TARGET_IPRIO, APLIC_DEFAULT_PRIORITY);

drivers/irqchip/irq-riscv-aplic-direct.c

71

val = FIELD_PREP(APLIC_TARGET_HART_IDX, idc->hart_index);

drivers/irqchip/irq-riscv-aplic-direct.c

72

val |= FIELD_PREP(APLIC_TARGET_IPRIO, APLIC_DEFAULT_PRIORITY);

drivers/irqchip/irq-riscv-aplic-main.c

263

valh = FIELD_PREP(APLIC_xMSICFGADDRH_BAPPN, upper_32_bits(priv->msicfg.base_ppn));

drivers/irqchip/irq-riscv-aplic-main.c

264

valh |= FIELD_PREP(APLIC_xMSICFGADDRH_LHXW, priv->msicfg.lhxw);

drivers/irqchip/irq-riscv-aplic-main.c

265

valh |= FIELD_PREP(APLIC_xMSICFGADDRH_HHXW, priv->msicfg.hhxw);

drivers/irqchip/irq-riscv-aplic-main.c

266

valh |= FIELD_PREP(APLIC_xMSICFGADDRH_LHXS, priv->msicfg.lhxs);

drivers/irqchip/irq-riscv-aplic-main.c

267

valh |= FIELD_PREP(APLIC_xMSICFGADDRH_HHXS, priv->msicfg.hhxs);

drivers/irqchip/irq-riscv-aplic-msi.c

125

val = FIELD_PREP(APLIC_TARGET_HART_IDX, hart_index);

drivers/irqchip/irq-riscv-aplic-msi.c

126

val |= FIELD_PREP(APLIC_TARGET_GUEST_IDX, guest_index);

drivers/irqchip/irq-riscv-aplic-msi.c

127

val |= FIELD_PREP(APLIC_TARGET_EIID, msg->data);

drivers/leds/blink/leds-lgm-sso.c

515

FIELD_PREP(SSO_CON1_FCDSC, val));

drivers/leds/blink/leds-lgm-sso.c

532

FIELD_PREP(SSO_CON1_US, US_SW));

drivers/leds/blink/leds-lgm-sso.c

537

FIELD_PREP(SSO_CON1_US, US_FPID));

drivers/leds/blink/leds-lgm-sso.c

539

FIELD_PREP(SSO_CON1_FPID, val));

drivers/leds/blink/leds-lgm-sso.c

544

FIELD_PREP(SSO_CON1_US, US_GPTC));

drivers/leds/blink/leds-lgm-sso.c

546

FIELD_PREP(SSO_CON1_GPTD, val));

drivers/leds/blink/leds-lgm-sso.c

591

FIELD_PREP(SSO_CON0_RZFL, priv->gpio.edge));

drivers/leds/flash/leds-qcom-flash.c

425

strobe_sel = FIELD_PREP(FLASH_STROBE_HW_SW_SEL_BIT, SW_STROBE_VAL);

drivers/leds/flash/leds-qcom-flash.c

427

strobe_sel = FIELD_PREP(FLASH_STROBE_HW_SW_SEL_BIT, HW_STROBE_VAL);

drivers/leds/flash/leds-qcom-flash.c

430

FIELD_PREP(FLASH_HW_STROBE_TRIGGER_SEL_BIT, STROBE_LEVEL_TRIGGER_VAL) |

drivers/leds/flash/leds-qcom-flash.c

431

FIELD_PREP(FLASH_STROBE_POLARITY_BIT, STROBE_ACTIVE_HIGH_VAL);

drivers/leds/leds-as3668.c

155

FIELD_PREP(AS3668_CURR1_MODE_MASK, AS3668_CURR_MODE_OFF) |

drivers/leds/leds-as3668.c

156

FIELD_PREP(AS3668_CURR2_MODE_MASK, AS3668_CURR_MODE_OFF) |

drivers/leds/leds-as3668.c

157

FIELD_PREP(AS3668_CURR3_MODE_MASK, AS3668_CURR_MODE_OFF) |

drivers/leds/leds-as3668.c

158

FIELD_PREP(AS3668_CURR4_MODE_MASK, AS3668_CURR_MODE_OFF));

drivers/leds/leds-lp5569.c

178

val |= FIELD_PREP(LP5569_CP_MODE_MASK, chip->pdata->charge_pump_mode);

drivers/leds/leds-lp5569.c

228

FIELD_PREP(LP5569_CP_MODE_MASK, LP55XX_CP_BOOST),

drivers/leds/leds-lp5569.c

321

FIELD_PREP(LP5569_CP_MODE_MASK, LP55XX_CP_BYPASS),

drivers/leds/leds-sun50i-a100.c

161

control = FIELD_PREP(LEDC_DMA_CTRL_REG_DMA_EN, use_dma) |

drivers/leds/leds-sun50i-a100.c

167

control |= FIELD_PREP(LEDC_CTRL_REG_DATA_LENGTH, length) | LEDC_CTRL_REG_LEDC_EN;

drivers/leds/leds-sun50i-a100.c

273

control |= FIELD_PREP(LEDC_CTRL_REG_RGB_MODE, priv->format);

drivers/leds/leds-sun50i-a100.c

312

control = FIELD_PREP(LEDC_T01_TIMING_CTRL_REG_T1H, timing->t1h_ns / cycle_ns) |

drivers/leds/leds-sun50i-a100.c

313

FIELD_PREP(LEDC_T01_TIMING_CTRL_REG_T1L, timing->t1l_ns / cycle_ns) |

drivers/leds/leds-sun50i-a100.c

314

FIELD_PREP(LEDC_T01_TIMING_CTRL_REG_T0H, timing->t0h_ns / cycle_ns) |

drivers/leds/leds-sun50i-a100.c

315

FIELD_PREP(LEDC_T01_TIMING_CTRL_REG_T0L, timing->t0l_ns / cycle_ns);

drivers/leds/leds-sun50i-a100.c

318

control = FIELD_PREP(LEDC_RESET_TIMING_CTRL_REG_TR, timing->treset_ns / cycle_ns) |

drivers/leds/leds-sun50i-a100.c

319

FIELD_PREP(LEDC_RESET_TIMING_CTRL_REG_LED_NUM, priv->max_addr);

drivers/leds/rgb/leds-qcom-lpg.c

564

val |= FIELD_PREP(PWM_SIZE_SELECT_MASK, chan->pwm_resolution_sel);

drivers/leds/rgb/leds-qcom-lpg.c

567

val |= FIELD_PREP(PWM_SIZE_HI_RES_MASK, chan->pwm_resolution_sel);

drivers/leds/rgb/leds-qcom-lpg.c

577

val = FIELD_PREP(PWM_FREQ_PRE_DIV_MASK, chan->pre_div_sel) |

drivers/leds/rgb/leds-qcom-lpg.c

578

FIELD_PREP(PWM_FREQ_EXP_MASK, chan->pre_div_exp);

drivers/mailbox/arm_mhuv3.c

220

_rval |= FIELD_PREP((unsigned long long)_bmask, _value);\

drivers/mailbox/bcm74110-mailbox.c

85

hdr |= FIELD_PREP(BCM_MSG_##field##_MASK, val); \

drivers/mailbox/qcom-ipcc.c

70

return FIELD_PREP(IPCC_CLIENT_ID_MASK, client_id) |

drivers/mailbox/qcom-ipcc.c

71

FIELD_PREP(IPCC_SIGNAL_ID_MASK, signal_id);

drivers/md/dm-pcache/cache.c

70

cache_info->flags |= FIELD_PREP(PCACHE_CACHE_FLAGS_GC_PERCENT_MASK, percent);

drivers/md/dm-pcache/cache.h

476

cache->cache_info.flags |= FIELD_PREP(PCACHE_CACHE_FLAGS_CACHE_MODE_MASK, cache_mode);

drivers/md/dm-pcache/segment.h

29

seg_info->flags |= FIELD_PREP(PCACHE_SEG_INFO_FLAGS_TYPE_MASK, type);

drivers/media/cec/platform/meson/ao-cec-g12a.c

274

FIELD_PREP(CECB_CLK_CNTL_N1, 733 - 1));

drivers/media/cec/platform/meson/ao-cec-g12a.c

278

FIELD_PREP(CECB_CLK_CNTL_N2, 732 - 1));

drivers/media/cec/platform/meson/ao-cec-g12a.c

283

FIELD_PREP(CECB_CLK_CNTL_M1, 8 - 1));

drivers/media/cec/platform/meson/ao-cec-g12a.c

287

FIELD_PREP(CECB_CLK_CNTL_M2, 11 - 1));

drivers/media/cec/platform/meson/ao-cec-g12a.c

376

u32 reg = FIELD_PREP(CECB_RW_ADDR, addr);

drivers/media/cec/platform/meson/ao-cec-g12a.c

400

u32 reg = FIELD_PREP(CECB_RW_ADDR, addr) |

drivers/media/cec/platform/meson/ao-cec-g12a.c

401

FIELD_PREP(CECB_RW_WR_DATA, data) |

drivers/media/cec/platform/meson/ao-cec-g12a.c

577

FIELD_PREP(CECB_CTRL_TYPE, type));

drivers/media/cec/platform/meson/ao-cec-g12a.c

598

FIELD_PREP(CECB_GEN_CNTL_FILTER_TICK_SEL,

drivers/media/cec/platform/meson/ao-cec-g12a.c

600

FIELD_PREP(CECB_GEN_CNTL_FILTER_DEL, 7));

drivers/media/cec/platform/meson/ao-cec-g12a.c

610

FIELD_PREP(CECB_GEN_CNTL_CLK_CTRL_MASK,

drivers/media/cec/platform/meson/ao-cec-g12a.c

619

FIELD_PREP(CECB_CTRL2_RISE_DEL_MAX, 2));

drivers/media/cec/platform/meson/ao-cec.c

248

u32 reg = FIELD_PREP(CEC_RW_ADDR, address);

drivers/media/cec/platform/meson/ao-cec.c

281

u32 reg = FIELD_PREP(CEC_RW_ADDR, address) |

drivers/media/cec/platform/meson/ao-cec.c

282

FIELD_PREP(CEC_RW_WR_DATA, data) |

drivers/media/cec/platform/meson/ao-cec.c

558

FIELD_PREP(CEC_GEN_CNTL_CLK_CTRL_MASK,

drivers/media/i2c/ds90ub913.c

787

FIELD_PREP(UB913_REG_GENERAL_CFG_PCLK_RISING,

drivers/media/i2c/max96714.c

211

val = FIELD_PREP(MAX96714_PATGEN_MODE, priv->pattern);

drivers/media/i2c/max96714.c

687

val = FIELD_PREP(MAX96714_CSI2_LANE_CNT_MASK, mipi->num_data_lanes - 1);

drivers/media/i2c/max96717.c

235

val = FIELD_PREP(MAX96717_VTX_MODE, priv->pattern);

drivers/media/i2c/max96717.c

813

val = FIELD_PREP(REFGEN_PREDEF_FREQ_MASK,

drivers/media/i2c/max96717.c

910

FIELD_PREP(MAX96717_MIPI_LANES_CNT,

drivers/media/i2c/max96717.c

928

FIELD_PREP(MAX96717_PHY2_LANES_POL, val), &ret);

drivers/media/i2c/max96717.c

932

FIELD_PREP(MAX96717_PHY1_LANES_POL,

drivers/media/i2c/max96717.c

954

FIELD_PREP(MAX96717_PHY1_LANES_MAP, val), &ret);

drivers/media/i2c/max96717.c

958

FIELD_PREP(MAX96717_PHY2_LANES_MAP, val >> 4),

drivers/media/i2c/ov01a10.c

321

val |= FIELD_PREP(OV01A10_HFLIP_MASK, 0x1);

drivers/media/i2c/ov01a10.c

324

val |= FIELD_PREP(OV01A10_VFLIP_MASK, 0x1);

drivers/media/i2c/tc358746.c

108

#define NOL(val) FIELD_PREP(GENMASK(2, 1), (val))

drivers/media/i2c/tc358746.c

111

#define MODE(val) FIELD_PREP(GENMASK(31, 29), (val))

drivers/media/i2c/tc358746.c

113

#define ADDRESS(val) FIELD_PREP(GENMASK(28, 24), (val))

drivers/media/i2c/tc358746.c

115

#define DATA(val) FIELD_PREP(GENMASK(15, 0), (val))

drivers/media/i2c/tc358746.c

41

#define PDATAF(val) FIELD_PREP(PDATAF_MASK, (val))

drivers/media/i2c/tc358746.c

47

#define PDFMT(val) FIELD_PREP(GENMASK(7, 4), (val))

drivers/media/i2c/tc358746.c

52

#define MCLK_HIGH(val) FIELD_PREP(MCLK_HIGH_MASK, (val))

drivers/media/i2c/tc358746.c

53

#define MCLK_LOW(val) FIELD_PREP(MCLK_LOW_MASK, (val))

drivers/media/i2c/tc358746.c

57

#define PLL_PRD(val) FIELD_PREP(PLL_PRD_MASK, (val))

drivers/media/i2c/tc358746.c

59

#define PLL_FBD(val) FIELD_PREP(PLL_FBD_MASK, (val))

drivers/media/i2c/tc358746.c

63

#define PLL_FRS(val) FIELD_PREP(PLL_FRS_MASK, (val))

drivers/media/i2c/tc358746.c

70

#define MCLKDIV(val) FIELD_PREP(MCLKDIV_MASK, (val))

drivers/media/i2c/tc358746.c

92

#define TCLK_ZEROCNT(val) FIELD_PREP(GENMASK(15, 8), (val))

drivers/media/i2c/tc358746.c

93

#define TCLK_PREPARECNT(val) FIELD_PREP(GENMASK(6, 0), (val))

drivers/media/i2c/tc358746.c

97

#define THS_ZEROCNT(val) FIELD_PREP(GENMASK(14, 8), (val))

drivers/media/i2c/tc358746.c

98

#define THS_PREPARECNT(val) FIELD_PREP(GENMASK(6, 0), (val))

drivers/media/pci/intel/ipu6/ipu6-buttress.c

463

FIELD_PREP(BUTTRESS_FREQ_CTL_RATIO_MASK,

drivers/media/pci/intel/ipu6/ipu6-buttress.c

465

FIELD_PREP(BUTTRESS_FREQ_CTL_QOS_FLOOR_MASK,

drivers/media/pci/intel/ipu6/ipu6-cpd.c

154

*p = FIELD_PREP(PKG_DIR_SIZE_MASK, dir_ent->len) |

drivers/media/pci/intel/ipu6/ipu6-cpd.c

155

FIELD_PREP(PKG_DIR_TYPE_MASK, id) |

drivers/media/pci/intel/ipu6/ipu6-cpd.c

156

FIELD_PREP(PKG_DIR_VERSION_MASK, ver);

drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c

332

writel(FIELD_PREP(PPI_INTF_CONFIG_NOF_ENABLED_DLANES_MASK, nlanes - 1),

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

37

#define IFC_REQ(req, addr, data) (FIELD_PREP(GENMASK(23, 16), data) | \

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

38

FIELD_PREP(GENMASK(15, 4), addr) | \

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

39

FIELD_PREP(GENMASK(1, 0), req))

drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c

78

val |= FIELD_PREP(GENMASK(6, 1), 13);

drivers/media/platform/allegro-dvt/allegro-mail.c

108

dst[i++] = FIELD_PREP(GENMASK(31, 24), codec) |

drivers/media/platform/allegro-dvt/allegro-mail.c

109

FIELD_PREP(GENMASK(23, 8), param->constraint_set_flags) |

drivers/media/platform/allegro-dvt/allegro-mail.c

110

FIELD_PREP(GENMASK(7, 0), param->profile);

drivers/media/platform/allegro-dvt/allegro-mail.c

111

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->tier) |

drivers/media/platform/allegro-dvt/allegro-mail.c

112

FIELD_PREP(GENMASK(15, 0), param->level);

drivers/media/platform/allegro-dvt/allegro-mail.c

116

val |= FIELD_PREP(GENMASK(7, 4), param->log2_max_frame_num);

drivers/media/platform/allegro-dvt/allegro-mail.c

118

val |= FIELD_PREP(GENMASK(3, 0), param->log2_max_poc - 1);

drivers/media/platform/allegro-dvt/allegro-mail.c

120

val |= FIELD_PREP(GENMASK(3, 0), param->log2_max_poc);

drivers/media/platform/allegro-dvt/allegro-mail.c

145

dst[i++] = FIELD_PREP(GENMASK(15, 8), param->beta_offset) |

drivers/media/platform/allegro-dvt/allegro-mail.c

146

FIELD_PREP(GENMASK(7, 0), param->tc_offset);

drivers/media/platform/allegro-dvt/allegro-mail.c

153

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->clip_vrt_range) |

drivers/media/platform/allegro-dvt/allegro-mail.c

154

FIELD_PREP(GENMASK(15, 0), param->clip_hrz_range);

drivers/media/platform/allegro-dvt/allegro-mail.c

155

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->me_range[1]) |

drivers/media/platform/allegro-dvt/allegro-mail.c

156

FIELD_PREP(GENMASK(15, 0), param->me_range[0]);

drivers/media/platform/allegro-dvt/allegro-mail.c

157

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->me_range[3]) |

drivers/media/platform/allegro-dvt/allegro-mail.c

158

FIELD_PREP(GENMASK(15, 0), param->me_range[2]);

drivers/media/platform/allegro-dvt/allegro-mail.c

159

dst[i++] = FIELD_PREP(GENMASK(31, 24), param->min_tu_size) |

drivers/media/platform/allegro-dvt/allegro-mail.c

160

FIELD_PREP(GENMASK(23, 16), param->max_tu_size) |

drivers/media/platform/allegro-dvt/allegro-mail.c

161

FIELD_PREP(GENMASK(15, 8), param->min_cu_size) |

drivers/media/platform/allegro-dvt/allegro-mail.c

162

FIELD_PREP(GENMASK(8, 0), param->max_cu_size);

drivers/media/platform/allegro-dvt/allegro-mail.c

163

dst[i++] = FIELD_PREP(GENMASK(15, 8), param->max_transfo_depth_intra) |

drivers/media/platform/allegro-dvt/allegro-mail.c

164

FIELD_PREP(GENMASK(7, 0), param->max_transfo_depth_inter);

drivers/media/platform/allegro-dvt/allegro-mail.c

171

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->clk_ratio) |

drivers/media/platform/allegro-dvt/allegro-mail.c

172

FIELD_PREP(GENMASK(15, 0), param->framerate);

drivers/media/platform/allegro-dvt/allegro-mail.c

175

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->min_qp) |

drivers/media/platform/allegro-dvt/allegro-mail.c

176

FIELD_PREP(GENMASK(15, 0), param->initial_qp);

drivers/media/platform/allegro-dvt/allegro-mail.c

177

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->ip_delta) |

drivers/media/platform/allegro-dvt/allegro-mail.c

178

FIELD_PREP(GENMASK(15, 0), param->max_qp);

drivers/media/platform/allegro-dvt/allegro-mail.c

179

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->golden_ref) |

drivers/media/platform/allegro-dvt/allegro-mail.c

180

FIELD_PREP(GENMASK(15, 0), param->pb_delta);

drivers/media/platform/allegro-dvt/allegro-mail.c

181

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->golden_ref_frequency) |

drivers/media/platform/allegro-dvt/allegro-mail.c

182

FIELD_PREP(GENMASK(15, 0), param->golden_delta);

drivers/media/platform/allegro-dvt/allegro-mail.c

190

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->max_pixel_value) |

drivers/media/platform/allegro-dvt/allegro-mail.c

191

FIELD_PREP(GENMASK(15, 0), param->max_psnr);

drivers/media/platform/allegro-dvt/allegro-mail.c

202

dst[i++] = FIELD_PREP(GENMASK(31, 24), param->freq_golden_ref) |

drivers/media/platform/allegro-dvt/allegro-mail.c

203

FIELD_PREP(GENMASK(23, 16), param->num_b) |

drivers/media/platform/allegro-dvt/allegro-mail.c

204

FIELD_PREP(GENMASK(15, 0), param->gop_length);

drivers/media/platform/allegro-dvt/allegro-mail.c

211

dst[i++] = FIELD_PREP(GENMASK(31, 24), param->freq_golden_ref) |

drivers/media/platform/allegro-dvt/allegro-mail.c

212

FIELD_PREP(GENMASK(23, 16), param->num_b) |

drivers/media/platform/allegro-dvt/allegro-mail.c

213

FIELD_PREP(GENMASK(15, 0), param->gop_length);

drivers/media/platform/allegro-dvt/allegro-mail.c

327

dst[i++] = FIELD_PREP(GENMASK(31, 16), msg->padding) |

drivers/media/platform/allegro-dvt/allegro-mail.c

328

FIELD_PREP(GENMASK(15, 0), msg->pps_qp);

drivers/media/platform/allegro-dvt/allegro-mail.c

505

dst[0] = FIELD_PREP(GENMASK(31, 16), header->type) |

drivers/media/platform/allegro-dvt/allegro-mail.c

506

FIELD_PREP(GENMASK(15, 0), size);

drivers/media/platform/allegro-dvt/allegro-mail.c

98

dst[i++] = FIELD_PREP(GENMASK(31, 16), param->height) |

drivers/media/platform/allegro-dvt/allegro-mail.c

99

FIELD_PREP(GENMASK(15, 0), param->width);

drivers/media/platform/amlogic/meson-ge2d/ge2d-regs.h

293

(FIELD_PREP(GE2D_ALU_BLEND_MODE, __op) | \

drivers/media/platform/amlogic/meson-ge2d/ge2d-regs.h

294

FIELD_PREP(GE2D_ALU_SRC_COLOR_BLEND_FACTOR, __src_factor) | \

drivers/media/platform/amlogic/meson-ge2d/ge2d-regs.h

295

FIELD_PREP(GE2D_ALU_DST_COLOR_BLEND_FACTOR, __dst_factor))

drivers/media/platform/amlogic/meson-ge2d/ge2d-regs.h

301

(FIELD_PREP(GE2D_ALU_ALPHA_BLEND_MODE, __op) | \

drivers/media/platform/amlogic/meson-ge2d/ge2d-regs.h

302

FIELD_PREP(GE2D_ALU_SRC_ALPHA_BLEND_FACTOR, __src_factor) | \

drivers/media/platform/amlogic/meson-ge2d/ge2d-regs.h

303

FIELD_PREP(GE2D_ALU_DST_ALPHA_BLEND_FACTOR, __dst_factor))

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

204

FIELD_PREP(GE2D_INTERRUPT_CTRL, 2) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

205

FIELD_PREP(GE2D_SRC2_BURST_SIZE_CTRL, 3) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

206

FIELD_PREP(GE2D_SRC1_BURST_SIZE_CTRL, 0x3f));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

212

FIELD_PREP(GE2D_DST1_COLOR_MAP, ctx->out.fmt->hw_map) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

213

FIELD_PREP(GE2D_DST1_FORMAT, ctx->out.fmt->hw_fmt) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

214

FIELD_PREP(GE2D_SRC2_COLOR_MAP, ctx->out.fmt->hw_map) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

215

FIELD_PREP(GE2D_SRC2_FORMAT, ctx->out.fmt->hw_fmt) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

216

FIELD_PREP(GE2D_SRC1_COLOR_MAP, ctx->in.fmt->hw_map) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

217

FIELD_PREP(GE2D_SRC1_FORMAT, ctx->in.fmt->hw_fmt));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

222

FIELD_PREP(GE2D_START, ctx->in.crop.top) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

223

FIELD_PREP(GE2D_END, ctx->in.crop.top + ctx->in.crop.height - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

225

FIELD_PREP(GE2D_START, ctx->in.crop.left) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

226

FIELD_PREP(GE2D_END, ctx->in.crop.left + ctx->in.crop.width - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

228

FIELD_PREP(GE2D_START, ctx->out.crop.top) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

229

FIELD_PREP(GE2D_END, ctx->out.crop.top + ctx->out.crop.height - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

231

FIELD_PREP(GE2D_START, ctx->out.crop.left) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

232

FIELD_PREP(GE2D_END, ctx->out.crop.left + ctx->out.crop.width - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

234

FIELD_PREP(GE2D_START, ctx->out.crop.top) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

235

FIELD_PREP(GE2D_END, ctx->out.crop.top + ctx->out.crop.height - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

237

FIELD_PREP(GE2D_START, ctx->out.crop.left) |

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

238

FIELD_PREP(GE2D_END, ctx->out.crop.left + ctx->out.crop.width - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

241

FIELD_PREP(GE2D_END, ctx->in.pix_fmt.height - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

243

FIELD_PREP(GE2D_END, ctx->in.pix_fmt.width - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

245

FIELD_PREP(GE2D_END, ctx->out.pix_fmt.height - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

247

FIELD_PREP(GE2D_END, ctx->out.pix_fmt.width - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

249

FIELD_PREP(GE2D_END, ctx->out.pix_fmt.height - 1));

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

251

FIELD_PREP(GE2D_END, ctx->out.pix_fmt.width - 1));

drivers/media/platform/amphion/vpu_malone.c

78

(FIELD_PREP(0xF0000, maj) | FIELD_PREP(0xFF00, min) | FIELD_PREP(0xFF, inc))

drivers/media/platform/aspeed/aspeed-video.c

1233

FIELD_PREP(VE_TGS_FIRST,

drivers/media/platform/aspeed/aspeed-video.c

1235

FIELD_PREP(VE_TGS_LAST,

drivers/media/platform/aspeed/aspeed-video.c

1238

FIELD_PREP(VE_TGS_FIRST, video->frame_top) |

drivers/media/platform/aspeed/aspeed-video.c

1239

FIELD_PREP(VE_TGS_LAST,

drivers/media/platform/aspeed/aspeed-video.c

1311

u32 comp_ctrl = FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |

drivers/media/platform/aspeed/aspeed-video.c

1312

FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10) |

drivers/media/platform/aspeed/aspeed-video.c

1313

FIELD_PREP(VE_COMP_CTRL_EN_HQ, video->hq_mode) |

drivers/media/platform/aspeed/aspeed-video.c

1314

FIELD_PREP(VE_COMP_CTRL_HQ_DCT_LUM, jpeg_hq_quality) |

drivers/media/platform/aspeed/aspeed-video.c

1315

FIELD_PREP(VE_COMP_CTRL_HQ_DCT_CHR, jpeg_hq_quality | 0x10);

drivers/media/platform/aspeed/aspeed-video.c

1340

ctrl |= FIELD_PREP(VE_CTRL_FRC, video->frame_rate);

drivers/media/platform/aspeed/aspeed-video.c

1343

comp_ctrl &= ~FIELD_PREP(VE_COMP_CTRL_EN_HQ, video->hq_mode);

drivers/media/platform/aspeed/aspeed-video.c

1371

FIELD_PREP(VE_CTRL_CAPTURE_FMT, VIDEO_CAP_FMT_YUV_FULL_SWING);

drivers/media/platform/aspeed/aspeed-video.c

1400

FIELD_PREP(VE_MODE_DT_HOR_TOLER, 2) |

drivers/media/platform/aspeed/aspeed-video.c

1401

FIELD_PREP(VE_MODE_DT_VER_TOLER, 2) |

drivers/media/platform/aspeed/aspeed-video.c

1402

FIELD_PREP(VE_MODE_DT_HOR_STABLE, 6) |

drivers/media/platform/aspeed/aspeed-video.c

1403

FIELD_PREP(VE_MODE_DT_VER_STABLE, 6) |

drivers/media/platform/aspeed/aspeed-video.c

1404

FIELD_PREP(VE_MODE_DT_EDG_THROD, 0x65));

drivers/media/platform/aspeed/aspeed-video.c

1609

FIELD_PREP(VE_CTRL_FRC, frame_rate));

drivers/media/platform/cadence/cdns-csi2rx.c

383

FIELD_PREP(CSI2RX_STREAM_CFG_NUM_PIXELS_MASK,

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

296

val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

298

val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_u));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

300

val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_v));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

314

val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

316

val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_u));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

318

val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_v));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

354

val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(ptr));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c

368

val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c

101

addr_ext = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(dma_addr));

drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c

132

addr_ext = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(dma_addr));

drivers/media/platform/nuvoton/npcm-video.c

262

temp = FIELD_PREP(ECE_RECT_DIMEN_WLTR, w_size - 1) |

drivers/media/platform/nuvoton/npcm-video.c

263

FIELD_PREP(ECE_RECT_DIMEN_HLTR, h_size - 1) |

drivers/media/platform/nuvoton/npcm-video.c

264

FIELD_PREP(ECE_RECT_DIMEN_WR, w_tile - 1) |

drivers/media/platform/nuvoton/npcm-video.c

265

FIELD_PREP(ECE_RECT_DIMEN_HR, h_tile - 1);

drivers/media/platform/nuvoton/npcm-video.c

606

res = FIELD_PREP(VCD_CAP_RES_VERT_RES, vert_res) |

drivers/media/platform/nuvoton/npcm-video.c

607

FIELD_PREP(VCD_CAP_RES_HOR_RES, hor_res);

drivers/media/platform/nuvoton/npcm-video.c

723

regmap_write(vcd, VCD_FB_LP, FIELD_PREP(VCD_FBA_LP, pitch) |

drivers/media/platform/nuvoton/npcm-video.c

724

FIELD_PREP(VCD_FBB_LP, pitch));

drivers/media/platform/nuvoton/npcm-video.c

743

cmd |= FIELD_PREP(VCD_CMD_OPERATION, value);

drivers/media/platform/nuvoton/npcm-video.c

772

regmap_write(vcd, VCD_RCHG, FIELD_PREP(VCD_RCHG_TIM_PRSCL, 0xf) |

drivers/media/platform/nuvoton/npcm-video.c

773

FIELD_PREP(VCD_RCHG_IG_CHG0, 0x3));

drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c

21

#define GASKET_CTRL_DATA_TYPE(dt) FIELD_PREP(GENMASK(13, 8), dt)

drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c

62

#define DISP_MIX_CAMERA_MUX_DATA_TYPE(x) FIELD_PREP(GENMASK(8, 3), x)

drivers/media/platform/nxp/imx8mq-mipi-csi2.c

215

FIELD_PREP(CSI2SS_PHY_CTRL_RX_HS_SETTLE_MASK, hs_settle) |

drivers/media/platform/qcom/camss/camss-csid-340.c

101

val |= FIELD_PREP(CSID_RDI_CFG0_DT_MASK, format->data_type);

drivers/media/platform/qcom/camss/camss-csid-340.c

102

val |= FIELD_PREP(CSID_RDI_CFG0_VC_MASK, vc);

drivers/media/platform/qcom/camss/camss-csid-340.c

103

val |= FIELD_PREP(CSID_RDI_CFG0_DTID_MASK, dt_id);

drivers/media/platform/qcom/camss/camss-csid-340.c

62

val = FIELD_PREP(CSI2_RX_CFG0_NUM_ACTIVE_LANES_MASK, phy->lane_cnt - 1);

drivers/media/platform/qcom/camss/camss-csid-340.c

63

val |= FIELD_PREP(CSI2_RX_CFG0_DLX_INPUT_SEL_MASK, phy->lane_assign);

drivers/media/platform/qcom/camss/camss-csid-340.c

64

val |= FIELD_PREP(CSI2_RX_CFG0_PHY_NUM_SEL_MASK,

drivers/media/platform/qcom/camss/camss-vfe-340.c

37

#define TFE_BUS_IRQ_MASK_RUP_DONE(sc) FIELD_PREP(TFE_BUS_IRQ_MASK_RUP_DONE_MASK, BIT(sc))

drivers/media/platform/qcom/camss/camss-vfe-340.c

39

#define TFE_BUS_IRQ_MASK_BUF_DONE(sg) FIELD_PREP(TFE_BUS_IRQ_MASK_BUF_DONE_MASK, BIT(sg))

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

272

payload[0] = FIELD_PREP(GENMASK(31, 16), left_offset) | top_offset;

drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c

273

payload[1] = FIELD_PREP(GENMASK(31, 16), right_offset) | bottom_offset;

drivers/media/platform/rockchip/rkisp1/rkisp1-params.c

1384

value |= FIELD_PREP(RKISP1_CIF_ISP_WDR_RGB_FACTOR_MASK,

drivers/media/platform/rockchip/rkisp1/rkisp1-params.c

1392

value = FIELD_PREP(RKISP1_CIF_ISP_WDR_RGB_OFFSET_MASK,

drivers/media/platform/rockchip/rkisp1/rkisp1-params.c

1394

| FIELD_PREP(RKISP1_CIF_ISP_WDR_LUM_OFFSET_MASK,

drivers/media/platform/rockchip/rkisp1/rkisp1-params.c

1399

value = FIELD_PREP(RKISP1_CIF_ISP_WDR_DMIN_THRESH_MASK,

drivers/media/platform/rockchip/rkisp1/rkisp1-params.c

1401

| FIELD_PREP(RKISP1_CIF_ISP_WDR_DMIN_STRENGTH_MASK,

drivers/media/platform/synopsys/hdmirx/snps_hdmirx.h

15

#define UPDATE(x, h, l) FIELD_PREP(GENMASK((h), (l)), (x))

drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c

527

reg |= FIELD_PREP(SHIM_DMACNTX_FMT, fmt->csi_dt);

drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c

552

reg |= FIELD_PREP(SHIM_DMACNTX_YUV422,

drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c

557

reg |= FIELD_PREP(SHIM_DMACNTX_SIZE, fmt->size);

drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c

561

reg |= FIELD_PREP(SHIM_DMACNTX_SIZE,

drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c

568

reg = FIELD_PREP(SHIM_PSI_CFG0_SRC_TAG, 0) |

drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c

569

FIELD_PREP(SHIM_PSI_CFG0_DST_TAG, 0);

drivers/media/rc/meson-ir.c

278

regval = FIELD_PREP(IR_DEC_REG0_BASE_TIME, MESON_HW_TRATE - 1);

drivers/media/rc/meson-ir.c

283

FIELD_PREP(IR_DEC_REG0_FILTER, 7));

drivers/media/rc/meson-ir.c

286

regval = FIELD_PREP(IR_DEC_REG2_MODE, timings->hw_protocol);

drivers/media/rc/meson-ir.c

322

regval = FIELD_PREP(IR_DEC_REG0_FRAME_TIME_MAX,

drivers/media/rc/meson-ir.c

328

regval = FIELD_PREP(IR_DEC_REG1_FRAME_LEN, timings->code_length - 1);

drivers/media/rc/meson-ir.c

332

regval = FIELD_PREP(IR_DEC_LDR_ACTIVE_MAX,

drivers/media/rc/meson-ir.c

334

FIELD_PREP(IR_DEC_LDR_ACTIVE_MIN,

drivers/media/rc/meson-ir.c

340

regval = FIELD_PREP(IR_DEC_LDR_IDLE_MAX, timings->leader_idle_max) |

drivers/media/rc/meson-ir.c

341

FIELD_PREP(IR_DEC_LDR_IDLE_MIN, timings->leader_idle_min);

drivers/media/rc/meson-ir.c

346

regval = FIELD_PREP(IR_DEC_LDR_REPEAT_MAX, timings->repeat_leader_max) |

drivers/media/rc/meson-ir.c

347

FIELD_PREP(IR_DEC_LDR_REPEAT_MIN, timings->repeat_leader_min);

drivers/media/rc/meson-ir.c

355

regval = FIELD_PREP(IR_DEC_BIT_0_MAX, timings->bit0_max) |

drivers/media/rc/meson-ir.c

356

FIELD_PREP(IR_DEC_BIT_0_MIN, timings->bit0_min);

drivers/media/rc/meson-ir.c

364

regval = FIELD_PREP(IR_DEC_STATUS_BIT_1_MAX, timings->bit1_max) |

drivers/media/rc/meson-ir.c

365

FIELD_PREP(IR_DEC_STATUS_BIT_1_MIN, timings->bit1_min);

drivers/media/rc/meson-ir.c

378

regval = FIELD_PREP(IR_DEC_DURATN2_MAX, timings->duration2_max) |

drivers/media/rc/meson-ir.c

379

FIELD_PREP(IR_DEC_DURATN2_MIN, timings->duration2_min);

drivers/media/rc/meson-ir.c

387

regval = FIELD_PREP(IR_DEC_DURATN3_MAX, timings->duration3_max) |

drivers/media/rc/meson-ir.c

388

FIELD_PREP(IR_DEC_DURATN3_MIN, timings->duration3_min);

drivers/media/rc/meson-ir.c

421

FIELD_PREP(IR_DEC_REG1_MODE,

drivers/media/rc/meson-ir.c

425

FIELD_PREP(IR_DEC_REG2_MODE,

drivers/media/rc/meson-ir.c

430

FIELD_PREP(IR_DEC_REG0_BASE_TIME,

drivers/media/rc/meson-ir.c

434

FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL));

drivers/media/rc/meson-ir.c

557

FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_NEC));

drivers/media/rc/meson-ir.c

560

FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_NEC));

drivers/media/rc/meson-ir.c

564

FIELD_PREP(IR_DEC_REG0_BASE_TIME,

drivers/memory/bt1-l2-ctl.c

112

data = FIELD_PREP(L2_CTL_WS_STALL_MASK, val);

drivers/memory/bt1-l2-ctl.c

116

data = FIELD_PREP(L2_CTL_TAG_STALL_MASK, val);

drivers/memory/bt1-l2-ctl.c

120

data = FIELD_PREP(L2_CTL_DATA_STALL_MASK, val);

drivers/memory/stm32-fmc2-ebi.c

262

u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);

drivers/memory/stm32-fmc2-ebi.c

340

u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);

drivers/memory/stm32-fmc2-ebi.c

357

u32 bcr, bxtr, val = FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);

drivers/memory/stm32-fmc2-ebi.c

527

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_SRAM);

drivers/memory/stm32-fmc2-ebi.c

538

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);

drivers/memory/stm32-fmc2-ebi.c

545

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_SRAM);

drivers/memory/stm32-fmc2-ebi.c

547

btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A);

drivers/memory/stm32-fmc2-ebi.c

548

bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A);

drivers/memory/stm32-fmc2-ebi.c

555

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);

drivers/memory/stm32-fmc2-ebi.c

557

btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A);

drivers/memory/stm32-fmc2-ebi.c

558

bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_A);

drivers/memory/stm32-fmc2-ebi.c

565

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);

drivers/memory/stm32-fmc2-ebi.c

573

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);

drivers/memory/stm32-fmc2-ebi.c

575

btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_B);

drivers/memory/stm32-fmc2-ebi.c

576

bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_B);

drivers/memory/stm32-fmc2-ebi.c

583

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);

drivers/memory/stm32-fmc2-ebi.c

585

btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_C);

drivers/memory/stm32-fmc2-ebi.c

586

bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_C);

drivers/memory/stm32-fmc2-ebi.c

593

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);

drivers/memory/stm32-fmc2-ebi.c

595

btr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);

drivers/memory/stm32-fmc2-ebi.c

596

bwtr |= FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);

drivers/memory/stm32-fmc2-ebi.c

603

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);

drivers/memory/stm32-fmc2-ebi.c

611

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_PSRAM);

drivers/memory/stm32-fmc2-ebi.c

619

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);

drivers/memory/stm32-fmc2-ebi.c

627

bcr |= FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR);

drivers/memory/stm32-fmc2-ebi.c

652

val = FIELD_PREP(FMC2_BCR_MWID, FMC2_BCR_MWID_8);

drivers/memory/stm32-fmc2-ebi.c

655

val = FIELD_PREP(FMC2_BCR_MWID, FMC2_BCR_MWID_16);

drivers/memory/stm32-fmc2-ebi.c

675

val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_0);

drivers/memory/stm32-fmc2-ebi.c

678

val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_128);

drivers/memory/stm32-fmc2-ebi.c

681

val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_256);

drivers/memory/stm32-fmc2-ebi.c

684

val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_512);

drivers/memory/stm32-fmc2-ebi.c

687

val = FIELD_PREP(FMC2_BCR_CPSIZE, FMC2_BCR_CPSIZE_1024);

drivers/memory/stm32-fmc2-ebi.c

706

val = FIELD_PREP(FMC2_BCR_NBLSET, val);

drivers/memory/stm32-fmc2-ebi.c

717

u32 val = FIELD_PREP(FMC2_BXTR_ACCMOD, FMC2_BXTR_EXTMOD_D);

drivers/memory/stm32-fmc2-ebi.c

739

val = FIELD_PREP(FMC2_BXTR_ADDSET, val);

drivers/memory/stm32-fmc2-ebi.c

757

val = FIELD_PREP(FMC2_BXTR_ADDHLD, val);

drivers/memory/stm32-fmc2-ebi.c

775

val = FIELD_PREP(FMC2_BXTR_DATAST, val);

drivers/memory/stm32-fmc2-ebi.c

793

val = FIELD_PREP(FMC2_BXTR_BUSTURN, val);

drivers/memory/stm32-fmc2-ebi.c

814

val = FIELD_PREP(FMC2_BXTR_DATAHLD, val);

drivers/memory/stm32-fmc2-ebi.c

827

val = FIELD_PREP(FMC2_BTR_CLKDIV, val);

drivers/memory/stm32-fmc2-ebi.c

846

val = FIELD_PREP(FMC2_CFGR_CLKDIV, val);

drivers/memory/stm32-fmc2-ebi.c

850

val = FIELD_PREP(FMC2_BTR_CLKDIV, val);

drivers/memory/stm32-fmc2-ebi.c

864

val = FIELD_PREP(FMC2_BTR_DATLAT, val);

drivers/memory/stm32-fmc2-ebi.c

895

new_val = FIELD_PREP(FMC2_PCSCNTR_CSCOUNT, new_val);

drivers/memory/stm32-fmc2-ebi.c

909

val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_0);

drivers/memory/stm32-fmc2-ebi.c

911

val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_1);

drivers/memory/stm32-fmc2-ebi.c

913

val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_64);

drivers/memory/stm32-fmc2-ebi.c

915

val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_256);

drivers/memory/stm32_omm.c

248

req2ack = FIELD_PREP(CR_REQ2ACK_MASK, req2ack);

drivers/memory/stm32_omm.c

251

omm->cr |= FIELD_PREP(CR_REQ2ACK_MASK, req2ack);

drivers/memory/stm32_omm.c

263

omm->cr |= FIELD_PREP(CR_MUXENMODE_MASK, mux);

drivers/memory/stm32_omm.c

270

omm->cr |= FIELD_PREP(CR_CSSEL_OVR_MASK, cssel_ovr);

drivers/memory/tegra/tegra20-emc.c

548

val = FIELD_PREP(EMC_MRR_DEV_SELECTN, memory_dev);

drivers/memory/tegra/tegra20-emc.c

549

val |= FIELD_PREP(EMC_MRR_MRR_MA, register_addr);

drivers/memory/tegra/tegra20.c

440

control = FIELD_PREP(MC_STAT_CONTROL_EVENT, g->event);

drivers/memory/tegra/tegra20.c

441

control |= FIELD_PREP(MC_STAT_CONTROL_CLIENT_ID, g->client);

drivers/memory/tegra/tegra20.c

442

control |= FIELD_PREP(MC_STAT_CONTROL_PRI_EVENT, g->pri_event);

drivers/memory/tegra/tegra20.c

443

control |= FIELD_PREP(MC_STAT_CONTROL_FILTER_PRI, g->pri_filter);

drivers/memory/tegra/tegra20.c

444

control |= FIELD_PREP(MC_STAT_CONTROL_FILTER_CLIENT_ENABLE, g->client_enb);

drivers/memory/tegra/tegra30-emc.c

1069

val = FIELD_PREP(EMC_MRR_DEV_SELECTN, memory_dev);

drivers/memory/tegra/tegra30-emc.c

1070

val |= FIELD_PREP(EMC_MRR_MRR_MA, register_addr);

drivers/mfd/adp5585.c

373

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET1_POL, 1);

drivers/mfd/adp5585.c

376

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET2_POL, 1);

drivers/mfd/adp5585.c

379

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RST_PASSTHRU_EN, 1);

drivers/mfd/adp5585.c

385

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET_TRIG_TIME, 0);

drivers/mfd/adp5585.c

388

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET_TRIG_TIME, 1);

drivers/mfd/adp5585.c

391

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET_TRIG_TIME, 2);

drivers/mfd/adp5585.c

394

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET_TRIG_TIME, 3);

drivers/mfd/adp5585.c

397

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET_TRIG_TIME, 4);

drivers/mfd/adp5585.c

400

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET_TRIG_TIME, 5);

drivers/mfd/adp5585.c

403

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET_TRIG_TIME, 6);

drivers/mfd/adp5585.c

406

adp5585->reset_cfg |= FIELD_PREP(ADP5585_RESET_TRIG_TIME, 7);

drivers/mfd/adp5585.c

419

adp5585->reset_cfg |= FIELD_PREP(ADP5585_PULSE_WIDTH, 0);

drivers/mfd/adp5585.c

422

adp5585->reset_cfg |= FIELD_PREP(ADP5585_PULSE_WIDTH, 1);

drivers/mfd/adp5585.c

425

adp5585->reset_cfg |= FIELD_PREP(ADP5585_PULSE_WIDTH, 2);

drivers/mfd/adp5585.c

428

adp5585->reset_cfg |= FIELD_PREP(ADP5585_PULSE_WIDTH, 3);

drivers/mfd/intel-m10-bmc-pmci.c

198

writel(FIELD_PREP(M10BMC_N6000_FLASH_READ_COUNT, read_count) |

drivers/mfd/intel-m10-bmc-pmci.c

242

FIELD_PREP(M10BMC_N6000_FLASH_HOST_REQUEST, request));

drivers/mfd/ls2k-bmc-core.c

355

ddata->bridge_pci_data.gen2_ctrl |= FIELD_PREP(LS7A_GEN2_SPEED_CHANG, 0x1) |

drivers/mfd/ls2k-bmc-core.c

356

FIELD_PREP(LS7A_CONF_PHY_TX, 0x0);

drivers/mfd/macsmc.c

262

msg = (FIELD_PREP(SMC_MSG, SMC_MSG_WRITE_KEY) |

drivers/mfd/macsmc.c

263

FIELD_PREP(SMC_SIZE, size) |

drivers/mfd/macsmc.c

264

FIELD_PREP(SMC_ID, smc->msg_id) |

drivers/mfd/macsmc.c

265

FIELD_PREP(SMC_DATA, key));

drivers/mfd/macsmc.c

446

FIELD_PREP(SMC_MSG, SMC_MSG_INITIALIZE), NULL, false);

drivers/mfd/macsmc.c

72

msg = (FIELD_PREP(SMC_MSG, cmd) |

drivers/mfd/macsmc.c

73

FIELD_PREP(SMC_SIZE, size) |

drivers/mfd/macsmc.c

74

FIELD_PREP(SMC_WSIZE, wsize) |

drivers/mfd/macsmc.c

75

FIELD_PREP(SMC_ID, smc->msg_id) |

drivers/mfd/macsmc.c

76

FIELD_PREP(SMC_DATA, arg));

drivers/mfd/rk8xx-core.c

812

FIELD_PREP(RK806_RST_FUN_MSK, rst_fun));

drivers/mfd/stm32-timers.c

116

dbl = FIELD_PREP(TIM_DCR_DBL, bursts - 1);

drivers/mfd/stm32-timers.c

117

dba = FIELD_PREP(TIM_DCR_DBA, reg >> 2);

drivers/misc/dw-xdata-pcie.c

31

#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a)

drivers/misc/mrvl_cn10k_dpi.c

40

#define DPI_DMA_IDS_DMA_NPA_PF_FUNC(x) FIELD_PREP(GENMASK_ULL(31, 16), x)

drivers/misc/mrvl_cn10k_dpi.c

41

#define DPI_DMA_IDS_INST_STRM(x) FIELD_PREP(GENMASK_ULL(47, 40), x)

drivers/misc/mrvl_cn10k_dpi.c

42

#define DPI_DMA_IDS_DMA_STRM(x) FIELD_PREP(GENMASK_ULL(39, 32), x)

drivers/misc/mrvl_cn10k_dpi.c

43

#define DPI_DMA_ENG_EN_MOLR(x) FIELD_PREP(GENMASK_ULL(41, 32), x)

drivers/misc/mrvl_cn10k_dpi.c

44

#define DPI_EBUS_PORTX_CFG_MPS(x) FIELD_PREP(GENMASK(6, 4), x)

drivers/misc/mrvl_cn10k_dpi.c

45

#define DPI_DMA_IDS_DMA_SSO_PF_FUNC(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/misc/mrvl_cn10k_dpi.c

46

#define DPI_DMA_IDS2_INST_AURA(x) FIELD_PREP(GENMASK(19, 0), x)

drivers/misc/mrvl_cn10k_dpi.c

47

#define DPI_DMA_IBUFF_CSIZE_CSIZE(x) FIELD_PREP(GENMASK(13, 0), x)

drivers/misc/mrvl_cn10k_dpi.c

48

#define DPI_EBUS_PORTX_CFG_MRRS(x) FIELD_PREP(GENMASK(2, 0), x)

drivers/misc/mrvl_cn10k_dpi.c

49

#define DPI_ENG_BUF_BLKS(x) FIELD_PREP(GENMASK(5, 0), x)

drivers/mmc/host/cavium.c

188

*reg |= FIELD_PREP(GENMASK(61, 60), bus_id);

drivers/mmc/host/cavium.c

291

emm_sample = FIELD_PREP(MIO_EMM_SAMPLE_CMD_CNT, slot->cmd_cnt) |

drivers/mmc/host/cavium.c

292

FIELD_PREP(MIO_EMM_SAMPLE_DAT_CNT, slot->dat_cnt);

drivers/mmc/host/cavium.c

429

emm_dma |= FIELD_PREP(MIO_EMM_DMA_VAL, 1) |

drivers/mmc/host/cavium.c

430

FIELD_PREP(MIO_EMM_DMA_DAT_NULL, 1);

drivers/mmc/host/cavium.c

527

dma_cfg = FIELD_PREP(MIO_EMM_DMA_CFG_EN, 1) |

drivers/mmc/host/cavium.c

528

FIELD_PREP(MIO_EMM_DMA_CFG_RW, rw);

drivers/mmc/host/cavium.c

530

dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_ENDIAN, 1);

drivers/mmc/host/cavium.c

532

dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_SIZE,

drivers/mmc/host/cavium.c

537

dma_cfg |= FIELD_PREP(MIO_EMM_DMA_CFG_ADR, addr);

drivers/mmc/host/cavium.c

581

fifo_cmd = FIELD_PREP(MIO_EMM_DMA_FIFO_CMD_RW, rw);

drivers/mmc/host/cavium.c

584

fifo_cmd |= FIELD_PREP(MIO_EMM_DMA_FIFO_CMD_INTDIS,

drivers/mmc/host/cavium.c

588

fifo_cmd |= FIELD_PREP(MIO_EMM_DMA_FIFO_CMD_ENDIAN, 1);

drivers/mmc/host/cavium.c

590

fifo_cmd |= FIELD_PREP(MIO_EMM_DMA_FIFO_CMD_SIZE,

drivers/mmc/host/cavium.c

630

emm_dma = FIELD_PREP(MIO_EMM_DMA_VAL, 1) |

drivers/mmc/host/cavium.c

631

FIELD_PREP(MIO_EMM_DMA_SECTOR,

drivers/mmc/host/cavium.c

633

FIELD_PREP(MIO_EMM_DMA_RW,

drivers/mmc/host/cavium.c

635

FIELD_PREP(MIO_EMM_DMA_BLOCK_CNT, mrq->data->blocks) |

drivers/mmc/host/cavium.c

636

FIELD_PREP(MIO_EMM_DMA_CARD_ADDR, mrq->cmd->arg);

drivers/mmc/host/cavium.c

641

emm_dma |= FIELD_PREP(MIO_EMM_DMA_MULTI, 1);

drivers/mmc/host/cavium.c

795

emm_cmd = FIELD_PREP(MIO_EMM_CMD_VAL, 1) |

drivers/mmc/host/cavium.c

796

FIELD_PREP(MIO_EMM_CMD_CTYPE_XOR, mods.ctype_xor) |

drivers/mmc/host/cavium.c

797

FIELD_PREP(MIO_EMM_CMD_RTYPE_XOR, mods.rtype_xor) |

drivers/mmc/host/cavium.c

798

FIELD_PREP(MIO_EMM_CMD_IDX, cmd->opcode) |

drivers/mmc/host/cavium.c

799

FIELD_PREP(MIO_EMM_CMD_ARG, cmd->arg);

drivers/mmc/host/cavium.c

802

emm_cmd |= FIELD_PREP(MIO_EMM_CMD_OFFSET,

drivers/mmc/host/cavium.c

879

emm_switch = FIELD_PREP(MIO_EMM_SWITCH_HS_TIMING,

drivers/mmc/host/cavium.c

881

FIELD_PREP(MIO_EMM_SWITCH_BUS_WIDTH, bus_width) |

drivers/mmc/host/cavium.c

882

FIELD_PREP(MIO_EMM_SWITCH_POWER_CLASS, power_class) |

drivers/mmc/host/cavium.c

883

FIELD_PREP(MIO_EMM_SWITCH_CLK_HI, clk_period) |

drivers/mmc/host/cavium.c

884

FIELD_PREP(MIO_EMM_SWITCH_CLK_LO, clk_period);

drivers/mmc/host/cavium.c

925

emm_switch = FIELD_PREP(MIO_EMM_SWITCH_POWER_CLASS, 10);

drivers/mmc/host/cavium.c

926

emm_switch |= FIELD_PREP(MIO_EMM_SWITCH_CLK_HI,

drivers/mmc/host/cavium.c

928

emm_switch |= FIELD_PREP(MIO_EMM_SWITCH_CLK_LO,

drivers/mmc/host/dw_mmc-bluefield.c

34

reg |= FIELD_PREP(UHS_REG_EXT_SAMPLE_MASK,

drivers/mmc/host/dw_mmc-bluefield.c

37

reg |= FIELD_PREP(UHS_REG_EXT_DRIVE_MASK, BLUEFIELD_UHS_REG_EXT_DRIVE);

drivers/mmc/host/dw_mmc-k3.c

252

reg_value = FIELD_PREP(UHS_REG_EXT_SAMPLE_PHASE_MASK, smpl_phase) |

drivers/mmc/host/dw_mmc-k3.c

253

FIELD_PREP(UHS_REG_EXT_SAMPLE_DLY_MASK, smpl_dly) |

drivers/mmc/host/dw_mmc-k3.c

254

FIELD_PREP(UHS_REG_EXT_SAMPLE_DRVPHASE_MASK, drv_phase);

drivers/mmc/host/dw_mmc-k3.c

259

reg_value = FIELD_PREP(GPIO_CLK_DIV_MASK, GENCLK_DIV) |

drivers/mmc/host/dw_mmc-k3.c

260

FIELD_PREP(GPIO_USE_SAMPLE_DLY_MASK, use_smpl_dly);

drivers/mmc/host/dw_mmc-starfive.c

49

reg_value |= FIELD_PREP(STARFIVE_SMPL_PHASE, smpl_phase);

drivers/mmc/host/loongson2-mmc.c

270

cctrl = FIELD_PREP(LOONGSON2_MMC_CCTL_INDEX, cmd->opcode);

drivers/mmc/host/loongson2-mmc.c

293

dctrl = FIELD_PREP(LOONGSON2_MMC_DCTL_BNUM, data->blocks);

drivers/mmc/host/loongson2-mmc.c

494

val = FIELD_PREP(LOONGSON2_MMC_DLLCTL_TIME, 0xc8)

drivers/mmc/host/loongson2-mmc.c

495

| FIELD_PREP(LOONGSON2_MMC_DLLCTL_INCRE, 0x1)

drivers/mmc/host/loongson2-mmc.c

496

| FIELD_PREP(LOONGSON2_MMC_DLLCTL_START, 0x1)

drivers/mmc/host/loongson2-mmc.c

497

| FIELD_PREP(LOONGSON2_MMC_DLLCTL_CLK_MODE, 0x1)

drivers/mmc/host/loongson2-mmc.c

498

| FIELD_PREP(LOONGSON2_MMC_DLLCTL_START_BIT, 0x1)

drivers/mmc/host/loongson2-mmc.c

499

| FIELD_PREP(LOONGSON2_MMC_DLLCTL_TIME_BPASS, 0xf);

drivers/mmc/host/loongson2-mmc.c

512

delay = FIELD_PREP(LOONGSON2_MMC_DELAY_PAD, pad_delay)

drivers/mmc/host/loongson2-mmc.c

513

| FIELD_PREP(LOONGSON2_MMC_DELAY_RD, pad_delay + 1);

drivers/mmc/host/loongson2-mmc.c

693

val |= FIELD_PREP(LS2K0500_SDIO_DMA_MASK, LS2K0500_DMA2_CONF);

drivers/mmc/host/loongson2-mmc.c

725

val |= FIELD_PREP(LS2K1000_SDIO_DMA_MASK, LS2K1000_DMA1_CONF);

drivers/mmc/host/meson-gx-mmc.c

1064

cfg |= FIELD_PREP(CFG_RESP_TIMEOUT_MASK,

drivers/mmc/host/meson-gx-mmc.c

1066

cfg |= FIELD_PREP(CFG_RC_CC_MASK, ilog2(SD_EMMC_CFG_CMD_GAP));

drivers/mmc/host/meson-gx-mmc.c

1067

cfg |= FIELD_PREP(CFG_BLK_LEN_MASK, ilog2(SD_EMMC_CFG_BLK_SIZE));

drivers/mmc/host/meson-gx-mmc.c

433

clk_reg |= FIELD_PREP(CLK_CORE_PHASE_MASK, CLK_PHASE_180);

drivers/mmc/host/meson-gx-mmc.c

434

clk_reg |= FIELD_PREP(CLK_TX_PHASE_MASK, CLK_PHASE_0);

drivers/mmc/host/meson-gx-mmc.c

435

clk_reg |= FIELD_PREP(CLK_RX_PHASE_MASK, CLK_PHASE_0);

drivers/mmc/host/meson-gx-mmc.c

547

val |= FIELD_PREP(ADJUST_ADJ_DELAY_MASK, (dly + i) % max_dly);

drivers/mmc/host/meson-gx-mmc.c

641

val |= FIELD_PREP(CFG_BUS_WIDTH_MASK, bus_width);

drivers/mmc/host/meson-gx-mmc.c

684

cfg |= FIELD_PREP(CFG_BLK_LEN_MASK, blksz);

drivers/mmc/host/meson-gx-mmc.c

729

desc[i].cmd_cfg |= FIELD_PREP(CMD_CFG_LENGTH_MASK, len);

drivers/mmc/host/meson-gx-mmc.c

802

cmd_cfg |= FIELD_PREP(CMD_CFG_CMD_INDEX_MASK, cmd->opcode);

drivers/mmc/host/meson-gx-mmc.c

811

cmd_cfg |= FIELD_PREP(CMD_CFG_TIMEOUT_MASK,

drivers/mmc/host/meson-gx-mmc.c

821

cmd_cfg |= FIELD_PREP(CMD_CFG_LENGTH_MASK,

drivers/mmc/host/meson-gx-mmc.c

825

cmd_cfg |= FIELD_PREP(CMD_CFG_LENGTH_MASK, data->blksz);

drivers/mmc/host/meson-gx-mmc.c

842

cmd_cfg |= FIELD_PREP(CMD_CFG_TIMEOUT_MASK,

drivers/mmc/host/meson-mx-sdhc-mmc.c

146

send = FIELD_PREP(MESON_SDHC_SEND_CMD_INDEX, cmd->opcode);

drivers/mmc/host/meson-mx-sdhc-mmc.c

150

send |= FIELD_PREP(MESON_SDHC_SEND_TOTAL_PACK,

drivers/mmc/host/meson-mx-sdhc-mmc.c

220

FIELD_PREP(MESON_SDHC_CTRL_PACK_LEN, pack_len));

drivers/mmc/host/meson-mx-sdhc-mmc.c

298

FIELD_PREP(MESON_SDHC_CLK2_RX_CLK_PHASE,

drivers/mmc/host/meson-mx-sdhc-mmc.c

340

FIELD_PREP(MESON_SDHC_CTRL_DAT_TYPE, 0));

drivers/mmc/host/meson-mx-sdhc-mmc.c

346

FIELD_PREP(MESON_SDHC_CTRL_DAT_TYPE, 1));

drivers/mmc/host/meson-mx-sdhc-mmc.c

352

FIELD_PREP(MESON_SDHC_CTRL_DAT_TYPE, 2));

drivers/mmc/host/meson-mx-sdhc-mmc.c

444

FIELD_PREP(MESON_SDHC_CLK2_RX_CLK_PHASE,

drivers/mmc/host/meson-mx-sdhc-mmc.c

484

FIELD_PREP(MESON_SDHC_CLK2_RX_CLK_PHASE,

drivers/mmc/host/meson-mx-sdhc-mmc.c

530

FIELD_PREP(MESON_SDHC_PDMA_PIO_RDRESP, idx));

drivers/mmc/host/meson-mx-sdhc-mmc.c

594

val = FIELD_PREP(MESON_SDHC_PDMA_RXFIFO_MANUAL_FLUSH,

drivers/mmc/host/meson-mx-sdhc-mmc.c

638

FIELD_PREP(MESON_SDHC_MISC_TXSTART_THRES, 7) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

639

FIELD_PREP(MESON_SDHC_MISC_WCRC_ERR_PATT, 5) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

640

FIELD_PREP(MESON_SDHC_MISC_WCRC_OK_PATT, 2));

drivers/mmc/host/meson-mx-sdhc-mmc.c

643

FIELD_PREP(MESON_SDHC_ENHC_RXFIFO_TH, 63) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

645

FIELD_PREP(MESON_SDHC_ENHC_MESON6_RX_TIMEOUT, 255) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

646

FIELD_PREP(MESON_SDHC_ENHC_SDIO_IRQ_PERIOD, 12));

drivers/mmc/host/meson-mx-sdhc-mmc.c

659

FIELD_PREP(MESON_SDHC_PDMA_RD_BURST, 31) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

666

FIELD_PREP(MESON_SDHC_PDMA_RXFIFO_MANUAL_FLUSH,

drivers/mmc/host/meson-mx-sdhc-mmc.c

672

FIELD_PREP(MESON_SDHC_PDMA_RD_BURST, 15));

drivers/mmc/host/meson-mx-sdhc-mmc.c

705

FIELD_PREP(MESON_SDHC_MISC_TXSTART_THRES, 6) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

706

FIELD_PREP(MESON_SDHC_MISC_WCRC_ERR_PATT, 5) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

707

FIELD_PREP(MESON_SDHC_MISC_WCRC_OK_PATT, 2));

drivers/mmc/host/meson-mx-sdhc-mmc.c

710

FIELD_PREP(MESON_SDHC_ENHC_RXFIFO_TH, 64) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

711

FIELD_PREP(MESON_SDHC_ENHC_MESON8M2_DEBUG, 1) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

713

FIELD_PREP(MESON_SDHC_ENHC_SDIO_IRQ_PERIOD, 12));

drivers/mmc/host/meson-mx-sdhc-mmc.c

731

FIELD_PREP(MESON_SDHC_CTRL_RX_PERIOD, 0xf) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

732

FIELD_PREP(MESON_SDHC_CTRL_RX_TIMEOUT, 0x7f) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

733

FIELD_PREP(MESON_SDHC_CTRL_RX_ENDIAN, 0x7) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

734

FIELD_PREP(MESON_SDHC_CTRL_TX_ENDIAN, 0x7));

drivers/mmc/host/meson-mx-sdhc-mmc.c

743

FIELD_PREP(MESON_SDHC_CLK2_SD_CLK_PHASE, 1));

drivers/mmc/host/meson-mx-sdhc-mmc.c

747

FIELD_PREP(MESON_SDHC_PDMA_WR_BURST, 7) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

748

FIELD_PREP(MESON_SDHC_PDMA_TXFIFO_TH, 49) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

749

FIELD_PREP(MESON_SDHC_PDMA_RD_BURST, 15) |

drivers/mmc/host/meson-mx-sdhc-mmc.c

750

FIELD_PREP(MESON_SDHC_PDMA_RXFIFO_TH, 7));

drivers/mmc/host/meson-mx-sdio.c

163

send |= FIELD_PREP(MESON_MX_SDIO_SEND_CMD_RESP_BITS_MASK, 45);

drivers/mmc/host/meson-mx-sdio.c

167

send |= FIELD_PREP(MESON_MX_SDIO_SEND_CMD_RESP_BITS_MASK, 133);

drivers/mmc/host/meson-mx-sdio.c

181

send |= FIELD_PREP(MESON_MX_SDIO_SEND_REPEAT_PACKAGE_TIMES_MASK,

drivers/mmc/host/meson-mx-sdio.c

190

ext |= FIELD_PREP(MESON_MX_SDIO_EXT_DATA_RW_NUMBER_MASK,

drivers/mmc/host/meson-mx-sdio.c

201

send |= FIELD_PREP(MESON_MX_SDIO_SEND_COMMAND_INDEX_MASK,

drivers/mmc/host/meson-mx-sdio.c

208

FIELD_PREP(MESON_MX_SDIO_MULT_PORT_SEL_MASK,

drivers/mmc/host/meson-mx-sdio.c

357

FIELD_PREP(MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK,

drivers/mmc/host/meson-mx-sdio.c

713

conf |= FIELD_PREP(MESON_MX_SDIO_CONF_CMD_ARGUMENT_BITS_MASK, 39);

drivers/mmc/host/meson-mx-sdio.c

714

conf |= FIELD_PREP(MESON_MX_SDIO_CONF_M_ENDIAN_MASK, 0x3);

drivers/mmc/host/meson-mx-sdio.c

715

conf |= FIELD_PREP(MESON_MX_SDIO_CONF_WRITE_NWR_MASK, 0x2);

drivers/mmc/host/meson-mx-sdio.c

716

conf |= FIELD_PREP(MESON_MX_SDIO_CONF_WRITE_CRC_OK_STATUS_MASK, 0x2);

drivers/mmc/host/mmci_stm32_sdmmc.c

494

cfgr = FIELD_PREP(DLYB_CFGR_UNIT_MASK, unit) |

drivers/mmc/host/mmci_stm32_sdmmc.c

495

FIELD_PREP(DLYB_CFGR_SEL_MASK, phase);

drivers/mmc/host/mmci_stm32_sdmmc.c

559

cr |= FIELD_PREP(DLYBSD_CR_RXTAPSEL_MASK, phase);

drivers/mmc/host/mtk-sd.c

1925

val |= FIELD_PREP(MSDC_PATCH_BIT_BUSYDLY, 15);

drivers/mmc/host/mtk-sd.c

1931

val |= FIELD_PREP(MSDC_CKGEN_MSDC_DLY_SEL, 1);

drivers/mmc/host/mtk-sd.c

1937

pb1_val = FIELD_PREP(MSDC_PB1_WRDAT_CRC_TACNTR, 1);

drivers/mmc/host/mtk-sd.c

1938

pb1_val |= FIELD_PREP(MSDC_PATCH_BIT1_CMDTA, 1);

drivers/mmc/host/mtk-sd.c

1959

pb1_val |= FIELD_PREP(MSDC_PATCH_BIT1_STOP_DLY,

drivers/mmc/host/mtk-sd.c

1964

pb2_val |= FIELD_PREP(MSDC_PB2_POP_EN_CNT,

drivers/mmc/host/mtk-sd.c

1975

pb2_val |= FIELD_PREP(MSDC_PB2_RESPWAIT, 3);

drivers/mmc/host/mtk-sd.c

1984

pb2_val |= FIELD_PREP(MSDC_PB2_RESPSTSENSEL, 2);

drivers/mmc/host/mtk-sd.c

1985

pb2_val |= FIELD_PREP(MSDC_PB2_CRCSTSENSEL, 2);

drivers/mmc/host/mtk-sd.c

2230

regval |= FIELD_PREP(PAD_CMD_RXDLY, value);

drivers/mmc/host/mtk-sd.c

2232

regval |= FIELD_PREP(PAD_CMD_RXDLY, PAD_DELAY_HALF - 1);

drivers/mmc/host/mtk-sd.c

2233

regval |= FIELD_PREP(PAD_CMD_RXDLY2, value - PAD_DELAY_HALF);

drivers/mmc/host/mtk-sd.c

2260

regval |= FIELD_PREP(PAD_DAT_RD_RXDLY, value);

drivers/mmc/host/mtk-sd.c

2261

regval |= FIELD_PREP(PAD_DAT_RD_RXDLY2, value);

drivers/mmc/host/mtk-sd.c

2263

regval |= FIELD_PREP(PAD_DAT_RD_RXDLY, PAD_DELAY_HALF - 1);

drivers/mmc/host/mtk-sd.c

2264

regval |= FIELD_PREP(PAD_DAT_RD_RXDLY2, value - PAD_DELAY_HALF);

drivers/mmc/host/sdhci-cadence.c

139

tmp = FIELD_PREP(SDHCI_CDNS_HRS04_WDATA, data) |

drivers/mmc/host/sdhci-cadence.c

140

FIELD_PREP(SDHCI_CDNS_HRS04_ADDR, addr);

drivers/mmc/host/sdhci-cadence.c

227

tmp |= FIELD_PREP(SDHCI_CDNS_HRS06_MODE, mode);

drivers/mmc/host/sdhci-cadence.c

251

tmp |= FIELD_PREP(SDHCI_CDNS_HRS06_TUNE, val);

drivers/mmc/host/sdhci-esdhc-imx.c

1189

writel(FIELD_PREP(ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK, val),

drivers/mmc/host/sdhci-esdhc-imx.c

1271

clk_tune_ctrl_status = FIELD_PREP(ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK,

drivers/mmc/host/sdhci-esdhc-imx.c

1273

FIELD_PREP(ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK,

drivers/mmc/host/sdhci-esdhc-imx.c

1275

FIELD_PREP(ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK,

drivers/mmc/host/sdhci-esdhc-imx.c

1611

tmp |= FIELD_PREP(ESDHC_TUNING_WINDOW_MASK, ESDHC_AUTO_TUNING_WINDOW);

drivers/mmc/host/sdhci-esdhc-imx.c

1700

writel(FIELD_PREP(ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_PRE_MASK,

drivers/mmc/host/sdhci-esdhc-imx.c

1702

FIELD_PREP(ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_OUT_MASK,

drivers/mmc/host/sdhci-esdhc-imx.c

1704

FIELD_PREP(ESDHC_TUNE_CTRL_STATUS_DLY_CELL_SET_POST_MASK,

drivers/mmc/host/sdhci-esdhc-imx.c

565

| FIELD_PREP(SDHCI_RETUNING_MODE_MASK,

drivers/mmc/host/sdhci-esdhc-imx.c

581

val |= FIELD_PREP(SDHCI_MAX_CURRENT_330_MASK, 0xFF);

drivers/mmc/host/sdhci-esdhc-imx.c

582

val |= FIELD_PREP(SDHCI_MAX_CURRENT_300_MASK, 0xFF);

drivers/mmc/host/sdhci-esdhc-imx.c

583

val |= FIELD_PREP(SDHCI_MAX_CURRENT_180_MASK, 0xFF);

drivers/mmc/host/sdhci-esdhc-imx.c

894

FIELD_PREP(ESDHC_SYS_CTRL_DTOCV_MASK, val),

drivers/mmc/host/sdhci-of-at91.c

191

caps0 |= FIELD_PREP(SDHCI_CLOCK_V3_BASE_MASK, clk_base);

drivers/mmc/host/sdhci-of-at91.c

193

caps1 |= FIELD_PREP(SDHCI_CLOCK_MUL_MASK, clk_mul);

drivers/mmc/host/sdhci-of-dwcmshc.c

1055

val = (FIELD_PREP(CV18XX_PHY_TX_DLY_MSK, 0) |

drivers/mmc/host/sdhci-of-dwcmshc.c

1056

FIELD_PREP(CV18XX_PHY_TX_SRC_MSK, CV18XX_PHY_TX_SRC_INVERT_CLK_TX) |

drivers/mmc/host/sdhci-of-dwcmshc.c

1057

FIELD_PREP(CV18XX_PHY_RX_DLY_MSK, 0) |

drivers/mmc/host/sdhci-of-dwcmshc.c

1058

FIELD_PREP(CV18XX_PHY_RX_SRC_MSK, CV18XX_PHY_RX_SRC_INVERT_RX_CLK));

drivers/mmc/host/sdhci-of-dwcmshc.c

1077

val = (FIELD_PREP(CV18XX_PHY_TX_DLY_MSK, 0) |

drivers/mmc/host/sdhci-of-dwcmshc.c

1078

FIELD_PREP(CV18XX_PHY_TX_SRC_MSK, CV18XX_PHY_TX_SRC_INVERT_CLK_TX) |

drivers/mmc/host/sdhci-of-dwcmshc.c

1079

FIELD_PREP(CV18XX_PHY_RX_DLY_MSK, tap));

drivers/mmc/host/sdhci-of-dwcmshc.c

1176

val |= FIELD_PREP(PHY_CNFG_PHY_PWRGOOD_MASK, 1);

drivers/mmc/host/sdhci-of-dwcmshc.c

1177

val |= FIELD_PREP(PHY_CNFG_PAD_SP_MASK, PHY_CNFG_PAD_SP_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1178

val |= FIELD_PREP(PHY_CNFG_PAD_SN_MASK, PHY_CNFG_PAD_SN_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1183

val |= FIELD_PREP(PHY_PAD_WEAKPULL_MASK, PHY_PAD_WEAKPULL_PULLUP);

drivers/mmc/host/sdhci-of-dwcmshc.c

1184

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_P);

drivers/mmc/host/sdhci-of-dwcmshc.c

1185

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1191

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_P);

drivers/mmc/host/sdhci-of-dwcmshc.c

1192

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1196

val |= FIELD_PREP(PHY_PAD_WEAKPULL_MASK, PHY_PAD_WEAKPULL_PULLDOWN);

drivers/mmc/host/sdhci-of-dwcmshc.c

1197

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_P);

drivers/mmc/host/sdhci-of-dwcmshc.c

1198

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1222

val = FIELD_PREP(PHY_ATDL_CNFG_INPSEL_MASK, PHY_ATDL_CNFG_INPSEL_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1287

drv = FIELD_PREP(PHY_CNFG_PAD_SP_MASK, priv->drive_impedance & 0xF);

drivers/mmc/host/sdhci-of-dwcmshc.c

1288

drv |= FIELD_PREP(PHY_CNFG_PAD_SN_MASK, (priv->drive_impedance >> 4) & 0xF);

drivers/mmc/host/sdhci-of-dwcmshc.c

1300

val = FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1301

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1302

val |= FIELD_PREP(PHY_PAD_WEAKPULL_MASK, PHY_PAD_WEAKPULL_PULLUP);

drivers/mmc/host/sdhci-of-dwcmshc.c

1309

val = FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1310

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1315

val = FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1316

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042);

drivers/mmc/host/sdhci-of-dwcmshc.c

1547

val &= ~(FIELD_PREP(AT_CTRL_POST_CHANGE_DLY_MASK, AT_CTRL_POST_CHANGE_DLY));

drivers/mmc/host/sdhci-of-dwcmshc.c

1549

val |= FIELD_PREP(AT_CTRL_POST_CHANGE_DLY_MASK, 0x2);

drivers/mmc/host/sdhci-of-dwcmshc.c

1552

sdhci_writeb(host, FIELD_PREP(PHY_DLL_CNFG1_SLVDLY_MASK, PHY_DLL_CNFG1_SLVDLY) |

drivers/mmc/host/sdhci-of-dwcmshc.c

1556

sdhci_writeb(host, FIELD_PREP(PHY_DLLDL_CNFG_SLV_INPSEL_MASK,

drivers/mmc/host/sdhci-of-dwcmshc.c

421

val |= FIELD_PREP(PHY_CNFG_PAD_SP_MASK, PHY_CNFG_PAD_SP);

drivers/mmc/host/sdhci-of-dwcmshc.c

422

val |= FIELD_PREP(PHY_CNFG_PAD_SN_MASK, PHY_CNFG_PAD_SN);

drivers/mmc/host/sdhci-of-dwcmshc.c

439

val |= FIELD_PREP(PHY_PAD_WEAKPULL_MASK, PHY_PAD_WEAKPULL_PULLUP);

drivers/mmc/host/sdhci-of-dwcmshc.c

440

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_P);

drivers/mmc/host/sdhci-of-dwcmshc.c

441

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N);

drivers/mmc/host/sdhci-of-dwcmshc.c

446

val = FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_P);

drivers/mmc/host/sdhci-of-dwcmshc.c

447

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N);

drivers/mmc/host/sdhci-of-dwcmshc.c

451

val |= FIELD_PREP(PHY_PAD_WEAKPULL_MASK, PHY_PAD_WEAKPULL_PULLDOWN);

drivers/mmc/host/sdhci-of-dwcmshc.c

452

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_P);

drivers/mmc/host/sdhci-of-dwcmshc.c

453

val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N);

drivers/mmc/host/sdhci-of-dwcmshc.c

458

u8 sel = FIELD_PREP(PHY_DLLDL_CNFG_SLV_INPSEL_MASK, PHY_DLLDL_CNFG_SLV_INPSEL);

drivers/mmc/host/sdhci-of-dwcmshc.c

483

sdhci_writeb(host, FIELD_PREP(PHY_DLL_CNFG1_SLVDLY_MASK, PHY_DLL_CNFG1_SLVDLY) |

drivers/mmc/host/sdhci-of-dwcmshc.c

939

sdhci_writeb(host, FIELD_PREP(PHY_ATDL_CNFG_INPSEL_MASK, PHY_ATDL_CNFG_INPSEL),

drivers/mmc/host/sdhci-of-dwcmshc.c

952

FIELD_PREP(AT_CTRL_WIN_EDGE_SEL_MASK, AT_CTRL_WIN_EDGE_SEL));

drivers/mmc/host/sdhci-of-dwcmshc.c

964

val |= FIELD_PREP(AT_CTRL_PRE_CHANGE_DLY_MASK, AT_CTRL_PRE_CHANGE_DLY);

drivers/mmc/host/sdhci-of-dwcmshc.c

965

val |= FIELD_PREP(AT_CTRL_POST_CHANGE_DLY_MASK, AT_CTRL_POST_CHANGE_DLY);

drivers/mmc/host/sdhci-of-dwcmshc.c

966

val |= FIELD_PREP(AT_CTRL_SWIN_TH_VAL_MASK, AT_CTRL_SWIN_TH_VAL);

drivers/mmc/host/sdhci-of-k1.c

139

FIELD_PREP(SDHC_DLL_PREDLY_NUM, 1) |

drivers/mmc/host/sdhci-of-k1.c

140

FIELD_PREP(SDHC_DLL_FULLDLY_RANGE, 1) |

drivers/mmc/host/sdhci-of-k1.c

141

FIELD_PREP(SDHC_DLL_VREG_CTRL, 1),

drivers/mmc/host/sdhci-of-k1.c

145

FIELD_PREP(SDHC_DLL_REG1_CTRL, 0x92),

drivers/mmc/host/sdhci-of-k1.c

98

SDHC_RX_BIAS_CTRL | FIELD_PREP(SDHC_PHY_DRIVE_SEL, 4),

drivers/mmc/host/sdhci-pci-core.c

1029

dly = FIELD_PREP(GLK_DLY, FIELD_GET(GLK_PATH_PLL, glk_rx_ctrl1) +

drivers/mmc/host/sdhci-pci-core.c

246

FIELD_PREP(SDHCI_TIMEOUT_CLK_MASK, 0x21) |

drivers/mmc/host/sdhci-pci-core.c

247

FIELD_PREP(SDHCI_CLOCK_BASE_MASK, 0x21) |

drivers/mmc/host/sdhci-pci-gli.c

1076

vhs_value |= FIELD_PREP(GLI_9767_VHS_REV, GLI_9767_VHS_REV_R);

drivers/mmc/host/sdhci-pci-gli.c

1093

vhs_value |= FIELD_PREP(GLI_9767_VHS_REV, GLI_9767_VHS_REV_W);

drivers/mmc/host/sdhci-pci-gli.c

1125

pll |= FIELD_PREP(PCIE_GLI_9767_SD_PLL_CTL_SSC_STEP_SETTING, step) |

drivers/mmc/host/sdhci-pci-gli.c

1126

FIELD_PREP(PCIE_GLI_9767_SD_PLL_CTL_SSC_EN, enable);

drivers/mmc/host/sdhci-pci-gli.c

1127

ssc |= FIELD_PREP(PCIE_GLI_9767_SD_PLL_CTL2_PLLSSC_PPM, ppm);

drivers/mmc/host/sdhci-pci-gli.c

1144

pll |= FIELD_PREP(PCIE_GLI_9767_SD_PLL_CTL_PLL_LDIV, ldiv) |

drivers/mmc/host/sdhci-pci-gli.c

1145

FIELD_PREP(PCIE_GLI_9767_SD_PLL_CTL_PLL_PDIV, pdiv) |

drivers/mmc/host/sdhci-pci-gli.c

1146

FIELD_PREP(PCIE_GLI_9767_SD_PLL_CTL_PLL_DIR_EN, dir);

drivers/mmc/host/sdhci-pci-gli.c

1294

value |= FIELD_PREP(SDHCI_GLI_9767_SD_HOST_OPERATION_CTL_DEBOUNCE,

drivers/mmc/host/sdhci-pci-gli.c

1296

FIELD_PREP(SDHCI_GLI_9767_SD_HOST_OPERATION_CTL_DEBOUNCE_SCALE,

drivers/mmc/host/sdhci-pci-gli.c

1299

value |= FIELD_PREP(SDHCI_GLI_9767_SD_HOST_OPERATION_CTL_DEBOUNCE,

drivers/mmc/host/sdhci-pci-gli.c

1301

FIELD_PREP(SDHCI_GLI_9767_SD_HOST_OPERATION_CTL_DEBOUNCE_SCALE,

drivers/mmc/host/sdhci-pci-gli.c

1339

FIELD_PREP(PCIE_GLI_9767_PWR_MACRO_CTL_LD0_LOW_OUTPUT_VOLTAGE,

drivers/mmc/host/sdhci-pci-gli.c

1341

FIELD_PREP(PCIE_GLI_9767_PWR_MACRO_CTL_RCLK_AMPLITUDE_CTL,

drivers/mmc/host/sdhci-pci-gli.c

1425

value |= FIELD_PREP(PCIE_GLI_9767_SD_DATA_MULTI_CTL_DISCONNECT_TIME,

drivers/mmc/host/sdhci-pci-gli.c

1501

value |= FIELD_PREP(PCIE_GLI_9767_UHS2_PHY_SET_REG1_SERDES_INTR,

drivers/mmc/host/sdhci-pci-gli.c

1506

value |= FIELD_PREP(PCIE_GLI_9767_UHS2_PHY_SET_REG2_SSC_PPM_SETTING,

drivers/mmc/host/sdhci-pci-gli.c

1511

value |= FIELD_PREP(PCIE_GLI_9767_UHS2_CTL1_TRANS_PASS,

drivers/mmc/host/sdhci-pci-gli.c

1513

FIELD_PREP(PCIE_GLI_9767_UHS2_CTL1_DECODING_CTL,

drivers/mmc/host/sdhci-pci-gli.c

1515

FIELD_PREP(PCIE_GLI_9767_UHS2_CTL1_SERDES_TRAN,

drivers/mmc/host/sdhci-pci-gli.c

1517

FIELD_PREP(PCIE_GLI_9767_UHS2_CTL1_SERDES_RECV,

drivers/mmc/host/sdhci-pci-gli.c

1519

FIELD_PREP(PCIE_GLI_9767_UHS2_CTL1_DIR_TRANS,

drivers/mmc/host/sdhci-pci-gli.c

1521

FIELD_PREP(PCIE_GLI_9767_UHS2_CTL1_DIR_RECV,

drivers/mmc/host/sdhci-pci-gli.c

1523

FIELD_PREP(PCIE_GLI_9767_UHS2_CTL1_PDRST,

drivers/mmc/host/sdhci-pci-gli.c

1528

value |= FIELD_PREP(PCIE_GLI_9767_UHS2_CTL2_ZC,

drivers/mmc/host/sdhci-pci-gli.c

1530

FIELD_PREP(PCIE_GLI_9767_UHS2_CTL2_ZC_CTL,

drivers/mmc/host/sdhci-pci-gli.c

1695

value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);

drivers/mmc/host/sdhci-pci-gli.c

1709

value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);

drivers/mmc/host/sdhci-pci-gli.c

1838

value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);

drivers/mmc/host/sdhci-pci-gli.c

1852

value |= FIELD_PREP(GLI_9763E_CFG2_L1DLY, GLI_9763E_CFG2_L1DLY_MID);

drivers/mmc/host/sdhci-pci-gli.c

1857

value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);

drivers/mmc/host/sdhci-pci-gli.c

1865

value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);

drivers/mmc/host/sdhci-pci-gli.c

321

wt_value |= FIELD_PREP(SDHCI_GLI_9750_WT_EN, GLI_9750_WT_EN_ON);

drivers/mmc/host/sdhci-pci-gli.c

338

wt_value |= FIELD_PREP(SDHCI_GLI_9750_WT_EN, GLI_9750_WT_EN_OFF);

drivers/mmc/host/sdhci-pci-gli.c

370

driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_1,

drivers/mmc/host/sdhci-pci-gli.c

372

driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2,

drivers/mmc/host/sdhci-pci-gli.c

379

sw_ctrl_value |= FIELD_PREP(SDHCI_GLI_9750_SW_CTRL_4,

drivers/mmc/host/sdhci-pci-gli.c

386

pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_INV,

drivers/mmc/host/sdhci-pci-gli.c

388

pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_DLY,

drivers/mmc/host/sdhci-pci-gli.c

394

misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_TX1_INV,

drivers/mmc/host/sdhci-pci-gli.c

396

misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,

drivers/mmc/host/sdhci-pci-gli.c

398

misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_TX1_DLY,

drivers/mmc/host/sdhci-pci-gli.c

402

parameter_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY,

drivers/mmc/host/sdhci-pci-gli.c

407

control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1,

drivers/mmc/host/sdhci-pci-gli.c

409

control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2,

drivers/mmc/host/sdhci-pci-gli.c

422

control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN,

drivers/mmc/host/sdhci-pci-gli.c

431

control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN,

drivers/mmc/host/sdhci-pci-gli.c

452

misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,

drivers/mmc/host/sdhci-pci-gli.c

455

misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,

drivers/mmc/host/sdhci-pci-gli.c

536

pll |= FIELD_PREP(SDHCI_GLI_9750_PLL_LDIV, ldiv) |

drivers/mmc/host/sdhci-pci-gli.c

537

FIELD_PREP(SDHCI_GLI_9750_PLL_PDIV, pdiv) |

drivers/mmc/host/sdhci-pci-gli.c

538

FIELD_PREP(SDHCI_GLI_9750_PLL_DIR, dir);

drivers/mmc/host/sdhci-pci-gli.c

570

pll |= FIELD_PREP(SDHCI_GLI_9750_PLLSSC_STEP, step) |

drivers/mmc/host/sdhci-pci-gli.c

571

FIELD_PREP(SDHCI_GLI_9750_PLLSSC_EN, enable);

drivers/mmc/host/sdhci-pci-gli.c

572

ssc |= FIELD_PREP(SDHCI_GLI_9750_PLLSSC_PPM, ppm);

drivers/mmc/host/sdhci-pci-gli.c

644

value |= FIELD_PREP(SDHCI_GLI_9750_CFG2_L1DLY,

drivers/mmc/host/sdhci-pci-gli.c

685

wt_value |= FIELD_PREP(PCI_GLI_9755_WT_EN, GLI_9755_WT_EN_ON);

drivers/mmc/host/sdhci-pci-gli.c

702

wt_value |= FIELD_PREP(PCI_GLI_9755_WT_EN, GLI_9755_WT_EN_OFF);

drivers/mmc/host/sdhci-pci-gli.c

727

pll |= FIELD_PREP(PCI_GLI_9755_PLL_LDIV, ldiv) |

drivers/mmc/host/sdhci-pci-gli.c

728

FIELD_PREP(PCI_GLI_9755_PLL_PDIV, pdiv) |

drivers/mmc/host/sdhci-pci-gli.c

729

FIELD_PREP(PCI_GLI_9755_PLL_DIR, dir);

drivers/mmc/host/sdhci-pci-gli.c

761

pll |= FIELD_PREP(PCI_GLI_9755_PLLSSC_STEP, step) |

drivers/mmc/host/sdhci-pci-gli.c

762

FIELD_PREP(PCI_GLI_9755_PLLSSC_EN, enable);

drivers/mmc/host/sdhci-pci-gli.c

763

ssc |= FIELD_PREP(PCI_GLI_9755_PLLSSC_PPM, ppm);

drivers/mmc/host/sdhci-pci-gli.c

853

value |= FIELD_PREP(PCI_GLI_9755_CFG2_L1DLY,

drivers/mmc/host/sdhci-pci-gli.c

879

serdes |= FIELD_PREP(PCI_GLI_9755_UHS2_SERDES_TRAN,

drivers/mmc/host/sdhci-pci-gli.c

882

serdes |= FIELD_PREP(PCI_GLI_9755_UHS2_SERDES_RECV,

drivers/mmc/host/sdhci-pci-gli.c

885

serdes |= FIELD_PREP(PCI_GLI_9755_UHS2_SERDES_INTR,

drivers/mmc/host/sdhci-pci-gli.c

888

serdes |= FIELD_PREP(PCI_GLI_9755_UHS2_SERDES_ZC1,

drivers/mmc/host/sdhci-pci-gli.c

891

serdes |= FIELD_PREP(PCI_GLI_9755_UHS2_SERDES_ZC2,

drivers/mmc/host/sdhci-pci-gli.c

897

uhs2_pll |= FIELD_PREP(PCI_GLI_9755_UHS2_PLL_SSC,

drivers/mmc/host/sdhci-pci-gli.c

900

uhs2_pll |= FIELD_PREP(PCI_GLI_9755_UHS2_PLL_DELAY,

drivers/mmc/host/sdhci-pci-gli.c

903

uhs2_pll |= FIELD_PREP(PCI_GLI_9755_UHS2_PLL_PDRST,

drivers/mmc/host/sdhci-pci-gli.c

909

pllssc |= FIELD_PREP(PCI_GLI_9755_PLLSSC_RTL,

drivers/mmc/host/sdhci-pci-gli.c

912

pllssc |= FIELD_PREP(PCI_GLI_9755_PLLSSC_TRANS_PASS,

drivers/mmc/host/sdhci-pci-gli.c

915

pllssc |= FIELD_PREP(PCI_GLI_9755_PLLSSC_RECV,

drivers/mmc/host/sdhci-pci-gli.c

918

pllssc |= FIELD_PREP(PCI_GLI_9755_PLLSSC_TRAN,

drivers/mmc/host/sdhci-pci-o2micro.c

62

#define O2_SD_FIX_PHASE FIELD_PREP(O2_SD_PHASE_MASK, 0x9)

drivers/mmc/host/sdhci-tegra.c

1643

tegra_sdhci_writel(host, FIELD_PREP(GENMASK(15, 8), tegra_host->stream_id) |

drivers/mmc/host/sdhci-tegra.c

1644

FIELD_PREP(GENMASK(7, 0), tegra_host->stream_id),

drivers/mmc/host/sdhci-uhs2.c

223

cmd_res |= FIELD_PREP(SDHCI_UHS2_TIMER_CTRL_DEADLOCK_MASK, dead_lock);

drivers/mmc/host/sdhci-uhs2.c

266

cmd_res |= FIELD_PREP(SDHCI_UHS2_TIMER_CTRL_DEADLOCK_MASK, dead_lock);

drivers/mmc/host/sdhci-uhs2.c

483

value = FIELD_PREP(SDHCI_UHS2_GEN_SETTINGS_N_LANES_MASK, host->mmc->uhs2_caps.n_lanes_set);

drivers/mmc/host/sdhci-uhs2.c

487

value = FIELD_PREP(SDHCI_UHS2_PHY_N_LSS_DIR_MASK, host->mmc->uhs2_caps.n_lss_dir_set) |

drivers/mmc/host/sdhci-uhs2.c

488

FIELD_PREP(SDHCI_UHS2_PHY_N_LSS_SYN_MASK, host->mmc->uhs2_caps.n_lss_sync_set);

drivers/mmc/host/sdhci-uhs2.c

495

value = FIELD_PREP(SDHCI_UHS2_TRAN_RETRY_CNT_MASK, host->mmc->uhs2_caps.max_retry_set) |

drivers/mmc/host/sdhci-uhs2.c

496

FIELD_PREP(SDHCI_UHS2_TRAN_N_FCU_MASK, host->mmc->uhs2_caps.n_fcu_set);

drivers/mmc/host/sdhci-uhs2.c

666

cmd_reg = FIELD_PREP(SDHCI_UHS2_CMD_PACK_LEN_MASK, cmd->uhs2_cmd->packet_len);

drivers/mmc/host/sdhci.c

4674

FIELD_PREP(SDHCI_MAX_CURRENT_330_MASK, curr) |

drivers/mmc/host/sdhci.c

4675

FIELD_PREP(SDHCI_MAX_CURRENT_300_MASK, curr) |

drivers/mmc/host/sdhci.c

4676

FIELD_PREP(SDHCI_MAX_CURRENT_180_MASK, curr);

drivers/mmc/host/sunplus-mmc.c

247

value |= FIELD_PREP(SPMMC_CLOCK_DIVISION, clkdiv);

drivers/mmc/host/sunplus-mmc.c

285

value |= FIELD_PREP(SPMMC_SD_WRITE_DATA_DELAY, delay);

drivers/mmc/host/sunplus-mmc.c

287

value |= FIELD_PREP(SPMMC_SD_WRITE_COMMAND_DELAY, delay);

drivers/mmc/host/sunplus-mmc.c

410

value |= FIELD_PREP(SPMMC_SD_TRANS_MODE, 2);

drivers/mmc/host/sunplus-mmc.c

415

srcdst |= FIELD_PREP(SPMMC_DMA_SOURCE, 0x2);

drivers/mmc/host/sunplus-mmc.c

417

srcdst |= FIELD_PREP(SPMMC_DMA_DESTINATION, 0x1);

drivers/mmc/host/sunplus-mmc.c

421

value |= FIELD_PREP(SPMMC_SD_TRANS_MODE, 1);

drivers/mmc/host/sunplus-mmc.c

424

srcdst |= FIELD_PREP(SPMMC_DMA_SOURCE, 0x1);

drivers/mmc/host/sunplus-mmc.c

426

srcdst |= FIELD_PREP(SPMMC_DMA_DESTINATION, 0x2);

drivers/mmc/host/sunplus-mmc.c

480

value |= FIELD_PREP(SPMMC_SDINT_SDCMPEN, 1); /* sdcmpen */

drivers/mmc/host/sunplus-mmc.c

509

value |= FIELD_PREP(SPMMC_SDINT_SDCMPEN, 0);

drivers/mmc/host/sunplus-mmc.c

579

timing_cfg0 |= FIELD_PREP(SPMMC_SD_READ_CRC_DELAY,

drivers/mmc/host/sunplus-mmc.c

582

timing_cfg0 |= FIELD_PREP(SPMMC_SD_READ_DATA_DELAY,

drivers/mmc/host/sunplus-mmc.c

585

timing_cfg0 |= FIELD_PREP(SPMMC_SD_READ_RESPONSE_DELAY,

drivers/mmc/host/sunplus-mmc.c

588

timing_cfg0 |= FIELD_PREP(SPMMC_SD_WRITE_COMMAND_DELAY,

drivers/mmc/host/sunplus-mmc.c

591

timing_cfg0 |= FIELD_PREP(SPMMC_SD_WRITE_DATA_DELAY,

drivers/mmc/host/sunplus-mmc.c

678

value |= FIELD_PREP(SPMMC_MEDIA_TYPE, SPMMC_MEDIA_SD);

drivers/mmc/host/sunplus-mmc.c

813

value |= FIELD_PREP(SPMMC_SD_READ_RESPONSE_DELAY, smpl_dly);

drivers/mmc/host/sunplus-mmc.c

815

value |= FIELD_PREP(SPMMC_SD_READ_DATA_DELAY, smpl_dly);

drivers/mmc/host/sunplus-mmc.c

817

value |= FIELD_PREP(SPMMC_SD_READ_CRC_DELAY, smpl_dly);

drivers/mmc/host/sunplus-mmc.c

831

value |= FIELD_PREP(SPMMC_SD_READ_RESPONSE_DELAY, smpl_dly);

drivers/mmc/host/sunplus-mmc.c

833

value |= FIELD_PREP(SPMMC_SD_READ_DATA_DELAY, smpl_dly);

drivers/mmc/host/sunplus-mmc.c

835

value |= FIELD_PREP(SPMMC_SD_READ_CRC_DELAY, smpl_dly);

drivers/mmc/host/uniphier-sd.c

283

dma_mode = FIELD_PREP(UNIPHIER_SD_DMA_MODE_DIR_MASK, dma_mode_dir);

drivers/mmc/host/uniphier-sd.c

284

dma_mode |= FIELD_PREP(UNIPHIER_SD_DMA_MODE_WIDTH_MASK,

drivers/mmc/host/uniphier-sd.c

568

tmp |= FIELD_PREP(UNIPHIER_SD_VOLT_MASK, val);

drivers/mtd/nand/raw/arasan-nand-controller.c

104

#define DIFACE_SDR_MODE(x) FIELD_PREP(GENMASK(2, 0), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

105

#define DIFACE_DDR_MODE(x) FIELD_PREP(GENMASK(5, 3), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

30

#define PKT_SIZE(x) FIELD_PREP(GENMASK(10, 0), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

31

#define PKT_STEPS(x) FIELD_PREP(GENMASK(23, 12), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

36

#define ADDR2_STRENGTH(x) FIELD_PREP(GENMASK(27, 25), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

37

#define ADDR2_CS(x) FIELD_PREP(GENMASK(31, 30), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

40

#define CMD_1(x) FIELD_PREP(GENMASK(7, 0), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

41

#define CMD_2(x) FIELD_PREP(GENMASK(15, 8), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

42

#define CMD_PAGE_SIZE(x) FIELD_PREP(GENMASK(25, 23), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

44

#define CMD_NADDRS(x) FIELD_PREP(GENMASK(30, 28), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

81

#define DQS_BUFF_SEL_IN(x) FIELD_PREP(GENMASK(6, 3), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

82

#define DQS_BUFF_SEL_OUT(x) FIELD_PREP(GENMASK(18, 15), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

87

#define ECC_CONF_COL(x) FIELD_PREP(GENMASK(15, 0), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

88

#define ECC_CONF_LEN(x) FIELD_PREP(GENMASK(26, 16), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

96

#define ECC_SP_CMD1(x) FIELD_PREP(GENMASK(7, 0), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

97

#define ECC_SP_CMD2(x) FIELD_PREP(GENMASK(15, 8), (x))

drivers/mtd/nand/raw/arasan-nand-controller.c

98

#define ECC_SP_ADDRS(x) FIELD_PREP(GENMASK(30, 28), (x))

drivers/mtd/nand/raw/cadence-nand-controller.c

1059

reg = FIELD_PREP(CMD_REG0_CT, CMD_REG0_CT_CDMA);

drivers/mtd/nand/raw/cadence-nand-controller.c

1061

reg |= FIELD_PREP(CMD_REG0_TN, thread);

drivers/mtd/nand/raw/cadence-nand-controller.c

1298

reg |= FIELD_PREP(TRAN_CFG_0_OFFSET, offset);

drivers/mtd/nand/raw/cadence-nand-controller.c

1299

reg |= FIELD_PREP(TRAN_CFG_0_SEC_CNT, sec_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

1303

reg |= FIELD_PREP(TRAN_CFG_1_LAST_SEC_SIZE, last_sec_size);

drivers/mtd/nand/raw/cadence-nand-controller.c

1304

reg |= FIELD_PREP(TRAN_CFG_1_SECTOR_SIZE, sec_size);

drivers/mtd/nand/raw/cadence-nand-controller.c

1310

reg |= FIELD_PREP(CONTROL_DATA_CTRL_SIZE, data_ctrl_size);

drivers/mtd/nand/raw/cadence-nand-controller.c

2106

mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INSTR,

drivers/mtd/nand/raw/cadence-nand-controller.c

2108

mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INPUT_CMD,

drivers/mtd/nand/raw/cadence-nand-controller.c

2140

mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INSTR,

drivers/mtd/nand/raw/cadence-nand-controller.c

2150

mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INPUT_ADDR,

drivers/mtd/nand/raw/cadence-nand-controller.c

2152

mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INPUT_ADDR_SIZE,

drivers/mtd/nand/raw/cadence-nand-controller.c

2221

mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INSTR,

drivers/mtd/nand/raw/cadence-nand-controller.c

2225

mini_ctrl_cmd |= FIELD_PREP(GCMD_DIR,

drivers/mtd/nand/raw/cadence-nand-controller.c

2230

mini_ctrl_cmd |= FIELD_PREP(GCMD_SECT_CNT, 1);

drivers/mtd/nand/raw/cadence-nand-controller.c

2231

mini_ctrl_cmd |= FIELD_PREP(GCMD_LAST_SIZE, len);

drivers/mtd/nand/raw/cadence-nand-controller.c

2550

reg = FIELD_PREP(ASYNC_TOGGLE_TIMINGS_TRH, trh_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2551

reg |= FIELD_PREP(ASYNC_TOGGLE_TIMINGS_TRP, trp_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2552

reg |= FIELD_PREP(ASYNC_TOGGLE_TIMINGS_TWH, twh_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2553

reg |= FIELD_PREP(ASYNC_TOGGLE_TIMINGS_TWP, twp_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2561

reg = FIELD_PREP(TIMINGS0_TADL, tadl_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2568

reg |= FIELD_PREP(TIMINGS0_TCCS, tccs_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2572

reg |= FIELD_PREP(TIMINGS0_TWHR, twhr_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2573

reg |= FIELD_PREP(TIMINGS0_TRHW, trhw_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2592

reg = FIELD_PREP(TIMINGS1_TRHZ, trhz_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2593

reg |= FIELD_PREP(TIMINGS1_TWB, twb_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2594

reg |= FIELD_PREP(TIMINGS1_TVDLY, tvdly_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2605

reg = FIELD_PREP(TIMINGS2_TFEAT, tfeat_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2606

reg |= FIELD_PREP(TIMINGS2_CS_HOLD_TIME, tceh_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2607

reg |= FIELD_PREP(TIMINGS2_CS_SETUP_TIME, tcs_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2618

reg |= FIELD_PREP(DLL_PHY_CTRL_RS_HIGH_WAIT_CNT, 7);

drivers/mtd/nand/raw/cadence-nand-controller.c

2619

reg |= FIELD_PREP(DLL_PHY_CTRL_RS_IDLE_CNT, 7);

drivers/mtd/nand/raw/cadence-nand-controller.c

2632

FIELD_PREP(PHY_DQS_TIMING_DQS_SEL_OE_END, 4);

drivers/mtd/nand/raw/cadence-nand-controller.c

2658

reg = FIELD_PREP(PHY_CTRL_PHONY_DQS, phony_dqs_timing);

drivers/mtd/nand/raw/cadence-nand-controller.c

2671

reg = FIELD_PREP(PHY_GATE_LPBK_CTRL_RDS, rd_del_sel);

drivers/mtd/nand/raw/cadence-nand-controller.c

2710

reg = FIELD_PREP(SYNC_TWRCK, twrck_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2711

reg |= FIELD_PREP(SYNC_TCAD, tcad_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2719

reg = FIELD_PREP(TIMINGS0_TADL, tadl_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2720

reg |= FIELD_PREP(TIMINGS0_TCCS, tccs_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2721

reg |= FIELD_PREP(TIMINGS0_TWHR, twhr_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2722

reg |= FIELD_PREP(TIMINGS0_TRHW, trhw_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2737

reg = FIELD_PREP(TIMINGS1_TWB, twb_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2738

reg |= FIELD_PREP(TIMINGS1_TVDLY, tvdly_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2739

reg |= FIELD_PREP(TIMINGS1_TRHZ, trhz_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2740

reg |= FIELD_PREP(TIMINGS1_TCWAW, tcwaw_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2750

reg = FIELD_PREP(TIMINGS2_TFEAT, tfeat_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2751

reg |= FIELD_PREP(TIMINGS2_CS_HOLD_TIME, tceh_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2752

reg |= FIELD_PREP(TIMINGS2_CS_SETUP_TIME, tcs_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2756

reg = FIELD_PREP(DLL_PHY_CTRL_RS_HIGH_WAIT_CNT, NVDDR_RS_HIGH_WAIT_CNT);

drivers/mtd/nand/raw/cadence-nand-controller.c

2757

reg |= FIELD_PREP(DLL_PHY_CTRL_RS_IDLE_CNT, NVDDR_RS_IDLE_CNT);

drivers/mtd/nand/raw/cadence-nand-controller.c

2781

reg = FIELD_PREP(SYNC_TCKWR, tckwr_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2782

reg |= FIELD_PREP(SYNC_TWRCK, twrck_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2783

reg |= FIELD_PREP(SYNC_TCAD, tcad_cnt);

drivers/mtd/nand/raw/cadence-nand-controller.c

2800

reg = FIELD_PREP(PHY_GATE_LPBK_CTRL_GATE_CFG, dll_phy_gate_open_delay);

drivers/mtd/nand/raw/cadence-nand-controller.c

2801

reg |= FIELD_PREP(PHY_GATE_LPBK_CTRL_GATE_CFG_CLOSE, gate_close_delay);

drivers/mtd/nand/raw/cadence-nand-controller.c

2802

reg |= FIELD_PREP(PHY_GATE_LPBK_CTRL_RDS, rd_del_sel);

drivers/mtd/nand/raw/cadence-nand-controller.c

2816

reg = FIELD_PREP(PHY_DQ_TIMING_OE_END, NVDDR_DATA_SEL_OE_END);

drivers/mtd/nand/raw/cadence-nand-controller.c

2817

reg |= FIELD_PREP(PHY_DQ_TIMING_OE_START, NVDDR_DATA_SEL_OE_START);

drivers/mtd/nand/raw/cadence-nand-controller.c

2818

reg |= FIELD_PREP(PHY_DQ_TIMING_TSEL_END, NVDDR_DATA_SEL_OE_END);

drivers/mtd/nand/raw/cadence-nand-controller.c

2819

reg |= FIELD_PREP(PHY_DQ_TIMING_TSEL_START, NVDDR_DATA_SEL_OE_START);

drivers/mtd/nand/raw/cadence-nand-controller.c

2823

reg = FIELD_PREP(PHY_DQS_TIMING_DQS_SEL_OE_END, oe_end);

drivers/mtd/nand/raw/cadence-nand-controller.c

2824

reg |= FIELD_PREP(PHY_DQS_TIMING_DQS_SEL_OE_START, oe_start);

drivers/mtd/nand/raw/cadence-nand-controller.c

2825

reg |= FIELD_PREP(PHY_DQS_TIMING_DQS_SEL_TSEL_END, oe_end);

drivers/mtd/nand/raw/cadence-nand-controller.c

2829

reg = FIELD_PREP(PHY_IE_TIMING_DQS_IE_START, ie_start);

drivers/mtd/nand/raw/cadence-nand-controller.c

2830

reg |= FIELD_PREP(PHY_IE_TIMING_DQ_IE_START, ie_start);

drivers/mtd/nand/raw/cadence-nand-controller.c

2831

reg |= FIELD_PREP(PHY_IE_TIMING_IE_ALWAYS_ON, 0);

drivers/mtd/nand/raw/cadence-nand-controller.c

662

reg |= FIELD_PREP(ECC_CONFIG_0_CORR_STR, corr_str_idx);

drivers/mtd/nand/raw/cadence-nand-controller.c

695

reg |= FIELD_PREP(SKIP_BYTES_MARKER_VALUE,

drivers/mtd/nand/raw/cadence-nand-controller.c

722

reg |= FIELD_PREP(SKIP_BYTES_NUM_OF_BYTES,

drivers/mtd/nand/raw/cadence-nand-controller.c

724

skip_bytes_offset = FIELD_PREP(SKIP_BYTES_OFFSET_VALUE,

drivers/mtd/nand/raw/cadence-nand-controller.c

886

mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_CS, chip_nr);

drivers/mtd/nand/raw/cadence-nand-controller.c

901

reg = FIELD_PREP(CMD_REG0_CT, CMD_REG0_CT_GEN);

drivers/mtd/nand/raw/cadence-nand-controller.c

903

reg |= FIELD_PREP(CMD_REG0_TN, 0);

drivers/mtd/nand/raw/denali.c

209

iowrite32(FIELD_PREP(ECC_CORRECTION__ERASE_THRESHOLD, 1) |

drivers/mtd/nand/raw/denali.c

210

FIELD_PREP(ECC_CORRECTION__VALUE, chip->ecc.strength),

drivers/mtd/nand/raw/denali.c

806

tmp |= FIELD_PREP(RE_2_WE__VALUE, re_2_we);

drivers/mtd/nand/raw/denali.c

815

tmp |= FIELD_PREP(RE_2_RE__VALUE, re_2_re);

drivers/mtd/nand/raw/denali.c

829

tmp |= FIELD_PREP(TWHR2_AND_WE_2_RE__WE_2_RE, we_2_re);

drivers/mtd/nand/raw/denali.c

844

tmp |= FIELD_PREP(TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA, addr_2_data);

drivers/mtd/nand/raw/denali.c

854

tmp |= FIELD_PREP(RDWR_EN_HI_CNT__VALUE, rdwr_en_hi);

drivers/mtd/nand/raw/denali.c

893

tmp |= FIELD_PREP(ACC_CLKS__VALUE, acc_clks);

drivers/mtd/nand/raw/denali.c

898

tmp |= FIELD_PREP(RDWR_EN_LO_CNT__VALUE, rdwr_en_lo);

drivers/mtd/nand/raw/denali.c

909

tmp |= FIELD_PREP(CS_SETUP_CNT__VALUE, cs_setup);

drivers/mtd/nand/raw/loongson-nand-controller.c

746

FIELD_PREP(LOONGSON_NAND_CELL_SIZE_MASK, cell_size));

drivers/mtd/nand/raw/loongson-nand-controller.c

749

FIELD_PREP(LOONGSON_NAND_HOLD_CYCLE_MASK, host->data->hold_cycle));

drivers/mtd/nand/raw/loongson-nand-controller.c

752

FIELD_PREP(LOONGSON_NAND_WAIT_CYCLE_MASK, host->data->wait_cycle));

drivers/mtd/nand/raw/loongson-nand-controller.c

782

val |= FIELD_PREP(LS2K1000_NAND_DMA_MASK, LS2K1000_DMA0_CONF);

drivers/mtd/nand/raw/loongson-nand-controller.c

807

val = FIELD_PREP(LOONGSON_NAND_MAP_CS1_SEL, LOONGSON_NAND_CS_SEL1) |

drivers/mtd/nand/raw/loongson-nand-controller.c

808

FIELD_PREP(LOONGSON_NAND_MAP_RDY1_SEL, LOONGSON_NAND_CS_RDY1) |

drivers/mtd/nand/raw/loongson-nand-controller.c

809

FIELD_PREP(LOONGSON_NAND_MAP_CS2_SEL, LOONGSON_NAND_CS_SEL2) |

drivers/mtd/nand/raw/loongson-nand-controller.c

810

FIELD_PREP(LOONGSON_NAND_MAP_RDY2_SEL, LOONGSON_NAND_CS_RDY2) |

drivers/mtd/nand/raw/loongson-nand-controller.c

811

FIELD_PREP(LOONGSON_NAND_MAP_CS3_SEL, LOONGSON_NAND_CS_SEL3) |

drivers/mtd/nand/raw/loongson-nand-controller.c

812

FIELD_PREP(LOONGSON_NAND_MAP_RDY3_SEL, LOONGSON_NAND_CS_RDY3);

drivers/mtd/nand/raw/qcom_nandc.c

1497

host->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, (cwperpage - 1)) |

drivers/mtd/nand/raw/qcom_nandc.c

1498

FIELD_PREP(UD_SIZE_BYTES_MASK, host->cw_data) |

drivers/mtd/nand/raw/qcom_nandc.c

1499

FIELD_PREP(DISABLE_STATUS_AFTER_WRITE, 0) |

drivers/mtd/nand/raw/qcom_nandc.c

1500

FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |

drivers/mtd/nand/raw/qcom_nandc.c

1501

FIELD_PREP(ECC_PARITY_SIZE_BYTES_RS, host->ecc_bytes_hw) |

drivers/mtd/nand/raw/qcom_nandc.c

1502

FIELD_PREP(STATUS_BFR_READ, 0) |

drivers/mtd/nand/raw/qcom_nandc.c

1503

FIELD_PREP(SET_RD_MODE_AFTER_STATUS, 1) |

drivers/mtd/nand/raw/qcom_nandc.c

1504

FIELD_PREP(SPARE_SIZE_BYTES_MASK, host->spare_bytes);

drivers/mtd/nand/raw/qcom_nandc.c

1506

host->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |

drivers/mtd/nand/raw/qcom_nandc.c

1507

FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, bad_block_byte) |

drivers/mtd/nand/raw/qcom_nandc.c

1508

FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 0) |

drivers/mtd/nand/raw/qcom_nandc.c

1509

FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) |

drivers/mtd/nand/raw/qcom_nandc.c

1510

FIELD_PREP(WIDE_FLASH, wide_bus) |

drivers/mtd/nand/raw/qcom_nandc.c

1511

FIELD_PREP(ENABLE_BCH_ECC, host->bch_enabled);

drivers/mtd/nand/raw/qcom_nandc.c

1513

host->cfg0_raw = FIELD_PREP(CW_PER_PAGE_MASK, (cwperpage - 1)) |

drivers/mtd/nand/raw/qcom_nandc.c

1514

FIELD_PREP(UD_SIZE_BYTES_MASK, host->cw_size) |

drivers/mtd/nand/raw/qcom_nandc.c

1515

FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |

drivers/mtd/nand/raw/qcom_nandc.c

1516

FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);

drivers/mtd/nand/raw/qcom_nandc.c

1518

host->cfg1_raw = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |

drivers/mtd/nand/raw/qcom_nandc.c

1519

FIELD_PREP(CS_ACTIVE_BSY, 0) |

drivers/mtd/nand/raw/qcom_nandc.c

1520

FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |

drivers/mtd/nand/raw/qcom_nandc.c

1521

FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) |

drivers/mtd/nand/raw/qcom_nandc.c

1522

FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) |

drivers/mtd/nand/raw/qcom_nandc.c

1523

FIELD_PREP(WIDE_FLASH, wide_bus) |

drivers/mtd/nand/raw/qcom_nandc.c

1524

FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1);

drivers/mtd/nand/raw/qcom_nandc.c

1526

host->ecc_bch_cfg = FIELD_PREP(ECC_CFG_ECC_DISABLE, !host->bch_enabled) |

drivers/mtd/nand/raw/qcom_nandc.c

1527

FIELD_PREP(ECC_SW_RESET, 0) |

drivers/mtd/nand/raw/qcom_nandc.c

1528

FIELD_PREP(ECC_NUM_DATA_BYTES_MASK, host->cw_data) |

drivers/mtd/nand/raw/qcom_nandc.c

1529

FIELD_PREP(ECC_FORCE_CLK_OPEN, 1) |

drivers/mtd/nand/raw/qcom_nandc.c

1530

FIELD_PREP(ECC_MODE_MASK, ecc_mode) |

drivers/mtd/nand/raw/qcom_nandc.c

1531

FIELD_PREP(ECC_PARITY_SIZE_BYTES_BCH_MASK, host->ecc_bytes_hw);

drivers/mtd/nand/raw/qcom_nandc.c

1534

host->ecc_buf_cfg = FIELD_PREP(NUM_STEPS_MASK, 0x203);

drivers/mtd/nand/raw/qcom_nandc.c

168

u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) |

drivers/mtd/nand/raw/qcom_nandc.c

169

FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) |

drivers/mtd/nand/raw/qcom_nandc.c

170

FIELD_PREP(READ_LOCATION_LAST_MASK, is_last_read_loc);

drivers/mtd/nand/raw/qcom_nandc.c

1889

nandc->regs->cfg0 = cpu_to_le32(FIELD_PREP(CW_PER_PAGE_MASK, 0) |

drivers/mtd/nand/raw/qcom_nandc.c

1890

FIELD_PREP(UD_SIZE_BYTES_MASK, 512) |

drivers/mtd/nand/raw/qcom_nandc.c

1891

FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |

drivers/mtd/nand/raw/qcom_nandc.c

1892

FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0));

drivers/mtd/nand/raw/qcom_nandc.c

1894

nandc->regs->cfg1 = cpu_to_le32(FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |

drivers/mtd/nand/raw/qcom_nandc.c

1895

FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |

drivers/mtd/nand/raw/qcom_nandc.c

1896

FIELD_PREP(CS_ACTIVE_BSY, 0) |

drivers/mtd/nand/raw/qcom_nandc.c

1897

FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) |

drivers/mtd/nand/raw/qcom_nandc.c

1898

FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) |

drivers/mtd/nand/raw/qcom_nandc.c

1899

FIELD_PREP(WIDE_FLASH, 0) |

drivers/mtd/nand/raw/qcom_nandc.c

1900

FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1));

drivers/mtd/nand/raw/qcom_nandc.c

1909

FIELD_PREP(READ_ADDR_MASK, NAND_CMD_PARAM));

drivers/mtd/nand/raw/qcom_nandc.c

200

u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) |

drivers/mtd/nand/raw/qcom_nandc.c

201

FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) |

drivers/mtd/nand/raw/qcom_nandc.c

202

FIELD_PREP(READ_LOCATION_LAST_MASK, is_last_read_loc);

drivers/mtd/nand/raw/qcom_nandc.c

275

FIELD_PREP(CW_PER_PAGE_MASK, (num_cw - 1)));

drivers/mtd/nand/raw/qcom_nandc.c

281

FIELD_PREP(CW_PER_PAGE_MASK, (num_cw - 1)));

drivers/mtd/nand/raw/qcom_nandc.c

885

host->cfg0 |= FIELD_PREP(SPARE_SIZE_BYTES_MASK, host->spare_bytes) |

drivers/mtd/nand/raw/qcom_nandc.c

886

FIELD_PREP(UD_SIZE_BYTES_MASK, host->cw_data);

drivers/mtd/nand/raw/qcom_nandc.c

889

host->ecc_bch_cfg |= FIELD_PREP(ECC_NUM_DATA_BYTES_MASK, host->cw_data);

drivers/mtd/nand/raw/qcom_nandc.c

890

host->ecc_buf_cfg = FIELD_PREP(NUM_STEPS_MASK, host->cw_data - 1);

drivers/mtd/nand/raw/renesas-nand-controller.c

114

#define MEM_CTRL_CS(cs) FIELD_PREP(GENMASK(1, 0), (cs))

drivers/mtd/nand/raw/renesas-nand-controller.c

115

#define MEM_CTRL_DIS_WP(cs) FIELD_PREP(GENMASK(11, 8), BIT((cs)))

drivers/mtd/nand/raw/renesas-nand-controller.c

118

#define DATA_SIZE(x) FIELD_PREP(GENMASK(14, 0), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

121

#define TIMINGS_ASYN_TRWP(x) FIELD_PREP(GENMASK(3, 0), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

122

#define TIMINGS_ASYN_TRWH(x) FIELD_PREP(GENMASK(7, 4), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

125

#define TIM_SEQ0_TCCS(x) FIELD_PREP(GENMASK(5, 0), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

126

#define TIM_SEQ0_TADL(x) FIELD_PREP(GENMASK(13, 8), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

127

#define TIM_SEQ0_TRHW(x) FIELD_PREP(GENMASK(21, 16), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

128

#define TIM_SEQ0_TWHR(x) FIELD_PREP(GENMASK(29, 24), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

131

#define TIM_SEQ1_TWB(x) FIELD_PREP(GENMASK(5, 0), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

132

#define TIM_SEQ1_TRR(x) FIELD_PREP(GENMASK(13, 8), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

133

#define TIM_SEQ1_TWW(x) FIELD_PREP(GENMASK(21, 16), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

136

#define TIM_GEN_SEQ0_D0(x) FIELD_PREP(GENMASK(5, 0), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

137

#define TIM_GEN_SEQ0_D1(x) FIELD_PREP(GENMASK(13, 8), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

138

#define TIM_GEN_SEQ0_D2(x) FIELD_PREP(GENMASK(21, 16), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

139

#define TIM_GEN_SEQ0_D3(x) FIELD_PREP(GENMASK(29, 24), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

142

#define TIM_GEN_SEQ1_D4(x) FIELD_PREP(GENMASK(5, 0), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

143

#define TIM_GEN_SEQ1_D5(x) FIELD_PREP(GENMASK(13, 8), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

144

#define TIM_GEN_SEQ1_D6(x) FIELD_PREP(GENMASK(21, 16), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

145

#define TIM_GEN_SEQ1_D7(x) FIELD_PREP(GENMASK(29, 24), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

148

#define TIM_GEN_SEQ2_D8(x) FIELD_PREP(GENMASK(5, 0), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

149

#define TIM_GEN_SEQ2_D9(x) FIELD_PREP(GENMASK(13, 8), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

150

#define TIM_GEN_SEQ2_D10(x) FIELD_PREP(GENMASK(21, 16), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

151

#define TIM_GEN_SEQ2_D11(x) FIELD_PREP(GENMASK(29, 24), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

168

#define GEN_SEQ_COL_A0(x) FIELD_PREP(GENMASK(5, 4), min((x), 2U))

drivers/mtd/nand/raw/renesas-nand-controller.c

169

#define GEN_SEQ_COL_A1(x) FIELD_PREP(GENMASK(7, 6), min((x), 2U))

drivers/mtd/nand/raw/renesas-nand-controller.c

170

#define GEN_SEQ_ROW_A0(x) FIELD_PREP(GENMASK(9, 8), min((x), 3U))

drivers/mtd/nand/raw/renesas-nand-controller.c

171

#define GEN_SEQ_ROW_A1(x) FIELD_PREP(GENMASK(11, 10), min((x), 3U))

drivers/mtd/nand/raw/renesas-nand-controller.c

173

#define GEN_SEQ_DELAY_EN(x) FIELD_PREP(GENMASK(14, 13), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

177

#define GEN_SEQ_COMMAND_3(x) FIELD_PREP(GENMASK(26, 16), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

180

#define DMA_TLVL(x) FIELD_PREP(GENMASK(7, 0), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

184

#define TIM_GEN_SEQ3_D12(x) FIELD_PREP(GENMASK(5, 0), max((x), 1U) - 1)

drivers/mtd/nand/raw/renesas-nand-controller.c

23

#define COMMAND_SEQ(x) FIELD_PREP(GENMASK(5, 0), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

36

#define COMMAND_0(x) FIELD_PREP(GENMASK(15, 8), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

37

#define COMMAND_1(x) FIELD_PREP(GENMASK(23, 16), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

38

#define COMMAND_2(x) FIELD_PREP(GENMASK(31, 24), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

42

#define CONTROL_ECC_BLOCK_SIZE(x) FIELD_PREP(GENMASK(2, 1), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

48

#define CONTROL_BLOCK_SIZE(x) FIELD_PREP(GENMASK(7, 6), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

59

#define ECC_CTRL_CAP(x) FIELD_PREP(GENMASK(2, 0), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

66

#define ECC_CTRL_ERR_THRESHOLD(x) FIELD_PREP(GENMASK(13, 8), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

72

#define INT_MEM_RDY(cs) FIELD_PREP(GENMASK(11, 8), BIT(cs))

drivers/mtd/nand/raw/renesas-nand-controller.c

78

#define ECC_OFFSET(x) FIELD_PREP(GENMASK(15, 0), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

85

#define ADDR0_COL(x) FIELD_PREP(GENMASK(15, 0), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

88

#define ADDR0_ROW(x) FIELD_PREP(GENMASK(23, 0), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

91

#define ADDR1_COL(x) FIELD_PREP(GENMASK(15, 0), (x))

drivers/mtd/nand/raw/renesas-nand-controller.c

94

#define ADDR1_ROW(x) FIELD_PREP(GENMASK(23, 0), (x))

drivers/mtd/nand/raw/stm32_fmc2_nand.c

1395

pcr |= FIELD_PREP(FMC2_PCR_ECCSS, FMC2_PCR_ECCSS_2048);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

1399

pcr |= FIELD_PREP(FMC2_PCR_TCLR, FMC2_PCR_TCLR_DEFAULT);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

1401

pcr |= FIELD_PREP(FMC2_PCR_TAR, FMC2_PCR_TAR_DEFAULT);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

303

FIELD_PREP(FMC2_PCR_TCLR, timings->tclr) |

drivers/mtd/nand/raw/stm32_fmc2_nand.c

304

FIELD_PREP(FMC2_PCR_TAR, timings->tar));

drivers/mtd/nand/raw/stm32_fmc2_nand.c

307

pmem = FIELD_PREP(FMC2_PMEM_MEMSET, timings->tset_mem);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

308

pmem |= FIELD_PREP(FMC2_PMEM_MEMWAIT, timings->twait);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

309

pmem |= FIELD_PREP(FMC2_PMEM_MEMHOLD, timings->thold_mem);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

310

pmem |= FIELD_PREP(FMC2_PMEM_MEMHIZ, timings->thiz);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

314

patt = FIELD_PREP(FMC2_PATT_ATTSET, timings->tset_att);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

315

patt |= FIELD_PREP(FMC2_PATT_ATTWAIT, timings->twait);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

316

patt |= FIELD_PREP(FMC2_PATT_ATTHOLD, timings->thold_att);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

317

patt |= FIELD_PREP(FMC2_PATT_ATTHIZ, timings->thiz);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

339

pcr |= FIELD_PREP(FMC2_PCR_PWID, FMC2_PCR_PWID_BUSWIDTH_16);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

343

pcr |= FIELD_PREP(FMC2_PCR_ECCSS, FMC2_PCR_ECCSS_512);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

419

pcr = set ? FIELD_PREP(FMC2_PCR_PWID, FMC2_PCR_PWID_BUSWIDTH_16) :

drivers/mtd/nand/raw/stm32_fmc2_nand.c

420

FIELD_PREP(FMC2_PCR_PWID, FMC2_PCR_PWID_BUSWIDTH_8);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

780

cfg[0] |= FIELD_PREP(FMC2_CSQCFGR1_CMD1, NAND_CMD_SEQIN);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

782

cfg[0] |= FIELD_PREP(FMC2_CSQCFGR1_CMD1, NAND_CMD_READ0) |

drivers/mtd/nand/raw/stm32_fmc2_nand.c

784

FIELD_PREP(FMC2_CSQCFGR1_CMD2, NAND_CMD_READSTART) |

drivers/mtd/nand/raw/stm32_fmc2_nand.c

794

cfg[1] = FIELD_PREP(FMC2_CSQCFGR2_RCMD1, NAND_CMD_RNDIN);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

796

cfg[1] = FIELD_PREP(FMC2_CSQCFGR2_RCMD1, NAND_CMD_RNDOUT) |

drivers/mtd/nand/raw/stm32_fmc2_nand.c

798

FIELD_PREP(FMC2_CSQCFGR2_RCMD2, NAND_CMD_RNDOUTSTART) |

drivers/mtd/nand/raw/stm32_fmc2_nand.c

810

cfg[2] = FIELD_PREP(FMC2_CSQCFGR3_SNBR, chip->ecc.steps - 1);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

824

cfg[3] = FIELD_PREP(FMC2_CSQCAR1_ADDC3, page);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

825

cfg[3] |= FIELD_PREP(FMC2_CSQCAR1_ADDC4, page >> 8);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

833

cfg[4] = FIELD_PREP(FMC2_CSQCAR2_NANDCEN, nfc->cs_sel);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

835

cfg[4] |= FIELD_PREP(FMC2_CSQCAR2_SAO, ecc_offset >> 1);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

837

cfg[4] |= FIELD_PREP(FMC2_CSQCAR2_SAO, ecc_offset);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

839

cfg[0] |= FIELD_PREP(FMC2_CSQCFGR1_ACYNBR, 5);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

840

cfg[4] |= FIELD_PREP(FMC2_CSQCAR2_ADDC5, page >> 16);

drivers/mtd/nand/raw/stm32_fmc2_nand.c

842

cfg[0] |= FIELD_PREP(FMC2_CSQCFGR1_ACYNBR, 4);

drivers/mtd/nand/spi/macronix.c

24

#define CFG_BFT(x) FIELD_PREP(GENMASK(7, 4), (x))

drivers/mtd/spi-nor/spansion.c

186

*buf |= FIELD_PREP(SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK,

drivers/net/can/at91_can.c

300

const u32 reg_mmr = FIELD_PREP(AT91_MMR_MOT_MASK, mode) |

drivers/net/can/at91_can.c

301

FIELD_PREP(AT91_MMR_PRIOR_MASK, prio);

drivers/net/can/at91_can.c

317

reg_mid = FIELD_PREP(AT91_MID_MIDVA_MASK | AT91_MID_MIDVB_MASK, can_id) |

drivers/net/can/at91_can.c

320

reg_mid = FIELD_PREP(AT91_MID_MIDVA_MASK, can_id);

drivers/net/can/at91_can.c

371

reg_br |= FIELD_PREP(AT91_BR_BRP_MASK, bt->brp - 1) |

drivers/net/can/at91_can.c

372

FIELD_PREP(AT91_BR_SJW_MASK, bt->sjw - 1) |

drivers/net/can/at91_can.c

373

FIELD_PREP(AT91_BR_PROPAG_MASK, bt->prop_seg - 1) |

drivers/net/can/at91_can.c

374

FIELD_PREP(AT91_BR_PHASE1_MASK, bt->phase_seg1 - 1) |

drivers/net/can/at91_can.c

375

FIELD_PREP(AT91_BR_PHASE2_MASK, bt->phase_seg2 - 1);

drivers/net/can/at91_can.c

492

reg_mcr = FIELD_PREP(AT91_MCR_MDLC_MASK, cf->len) |

drivers/net/can/bxcan.c

235

FIELD_PREP(BXCAN_FMR_CANSB_MASK, 14) |

drivers/net/can/bxcan.c

669

set = FIELD_PREP(BXCAN_BTR_BRP_MASK, bt->brp - 1) |

drivers/net/can/bxcan.c

670

FIELD_PREP(BXCAN_BTR_TS1_MASK, bt->phase_seg1 +

drivers/net/can/bxcan.c

672

FIELD_PREP(BXCAN_BTR_TS2_MASK, bt->phase_seg2 - 1) |

drivers/net/can/bxcan.c

673

FIELD_PREP(BXCAN_BTR_SJW_MASK, bt->sjw - 1);

drivers/net/can/bxcan.c

703

FIELD_PREP(BXCAN_ESR_LEC_MASK, BXCAN_LEC_UNUSED));

drivers/net/can/bxcan.c

858

id = FIELD_PREP(BXCAN_TIxR_EXID_MASK, cf->can_id) |

drivers/net/can/bxcan.c

861

id = FIELD_PREP(BXCAN_TIxR_STID_MASK, cf->can_id);

drivers/net/can/bxcan.c

870

writel(FIELD_PREP(BXCAN_TDTxR_DLC_MASK, cf->len), &mb_regs->dlc);

drivers/net/can/ctucanfd/ctucanfd_base.c

234

btr = FIELD_PREP(REG_BTR_PROP, prop_seg);

drivers/net/can/ctucanfd/ctucanfd_base.c

235

btr |= FIELD_PREP(REG_BTR_PH1, phase_seg1);

drivers/net/can/ctucanfd/ctucanfd_base.c

236

btr |= FIELD_PREP(REG_BTR_PH2, bt->phase_seg2);

drivers/net/can/ctucanfd/ctucanfd_base.c

237

btr |= FIELD_PREP(REG_BTR_BRP, bt->brp);

drivers/net/can/ctucanfd/ctucanfd_base.c

238

btr |= FIELD_PREP(REG_BTR_SJW, bt->sjw);

drivers/net/can/ctucanfd/ctucanfd_base.c

242

btr = FIELD_PREP(REG_BTR_FD_PROP_FD, prop_seg);

drivers/net/can/ctucanfd/ctucanfd_base.c

243

btr |= FIELD_PREP(REG_BTR_FD_PH1_FD, phase_seg1);

drivers/net/can/ctucanfd/ctucanfd_base.c

244

btr |= FIELD_PREP(REG_BTR_FD_PH2_FD, bt->phase_seg2);

drivers/net/can/ctucanfd/ctucanfd_base.c

245

btr |= FIELD_PREP(REG_BTR_FD_BRP_FD, bt->brp);

drivers/net/can/ctucanfd/ctucanfd_base.c

246

btr |= FIELD_PREP(REG_BTR_FD_SJW_FD, bt->sjw);

drivers/net/can/ctucanfd/ctucanfd_base.c

312

ssp_cfg = FIELD_PREP(REG_TRV_DELAY_SSP_OFFSET, ssp_offset);

drivers/net/can/ctucanfd/ctucanfd_base.c

313

ssp_cfg |= FIELD_PREP(REG_TRV_DELAY_SSP_SRC, 0x0);

drivers/net/can/ctucanfd/ctucanfd_base.c

351

mode_reg &= ~FIELD_PREP(REG_MODE_RTRTH, 0xF);

drivers/net/can/ctucanfd/ctucanfd_base.c

546

ffw |= FIELD_PREP(REG_FRAME_FORMAT_W_DLC, can_fd_len2dlc(cf->len));

drivers/net/can/ctucanfd/ctucanfd_base.c

552

idw = FIELD_PREP(REG_IDENTIFIER_W_IDENTIFIER_BASE, cf->can_id & CAN_SFF_MASK);

drivers/net/can/esd/esdacc.c

372

brp = FIELD_PREP(ACC_REG_BRP_FD_MASK_BRP, bt->brp - 1);

drivers/net/can/esd/esdacc.c

374

btr = FIELD_PREP(ACC_REG_BTR_FD_MASK_TSEG1, bt->phase_seg1 + bt->prop_seg - 1);

drivers/net/can/esd/esdacc.c

375

btr |= FIELD_PREP(ACC_REG_BTR_FD_MASK_TSEG2, bt->phase_seg2 - 1);

drivers/net/can/esd/esdacc.c

376

btr |= FIELD_PREP(ACC_REG_BTR_FD_MASK_SJW, bt->sjw - 1);

drivers/net/can/esd/esdacc.c

389

brp = FIELD_PREP(ACC_REG_BRP_CL_MASK_BRP, bt->brp - 1);

drivers/net/can/esd/esdacc.c

391

btr = FIELD_PREP(ACC_REG_BTR_CL_MASK_TSEG1, bt->phase_seg1 + bt->prop_seg - 1);

drivers/net/can/esd/esdacc.c

392

btr |= FIELD_PREP(ACC_REG_BTR_CL_MASK_TSEG2, bt->phase_seg2 - 1);

drivers/net/can/esd/esdacc.c

393

btr |= FIELD_PREP(ACC_REG_BTR_CL_MASK_SJW, bt->sjw - 1);

drivers/net/can/flexcan/flexcan-core.c

1246

FIELD_PREP(FLEXCAN_CBT_EPRESDIV_MASK, bt->brp - 1) |

drivers/net/can/flexcan/flexcan-core.c

1247

FIELD_PREP(FLEXCAN_CBT_ERJW_MASK, bt->sjw - 1) |

drivers/net/can/flexcan/flexcan-core.c

1248

FIELD_PREP(FLEXCAN_CBT_EPROPSEG_MASK, bt->prop_seg - 1) |

drivers/net/can/flexcan/flexcan-core.c

1249

FIELD_PREP(FLEXCAN_CBT_EPSEG1_MASK, bt->phase_seg1 - 1) |

drivers/net/can/flexcan/flexcan-core.c

1250

FIELD_PREP(FLEXCAN_CBT_EPSEG2_MASK, bt->phase_seg2 - 1);

drivers/net/can/flexcan/flexcan-core.c

1276

reg_fdcbt &= ~(FIELD_PREP(FLEXCAN_FDCBT_FPRESDIV_MASK, 0x3ff) |

drivers/net/can/flexcan/flexcan-core.c

1277

FIELD_PREP(FLEXCAN_FDCBT_FRJW_MASK, 0x7) |

drivers/net/can/flexcan/flexcan-core.c

1278

FIELD_PREP(FLEXCAN_FDCBT_FPROPSEG_MASK, 0x1f) |

drivers/net/can/flexcan/flexcan-core.c

1279

FIELD_PREP(FLEXCAN_FDCBT_FPSEG1_MASK, 0x7) |

drivers/net/can/flexcan/flexcan-core.c

1280

FIELD_PREP(FLEXCAN_FDCBT_FPSEG2_MASK, 0x7));

drivers/net/can/flexcan/flexcan-core.c

1282

reg_fdcbt |= FIELD_PREP(FLEXCAN_FDCBT_FPRESDIV_MASK, dbt->brp - 1) |

drivers/net/can/flexcan/flexcan-core.c

1283

FIELD_PREP(FLEXCAN_FDCBT_FRJW_MASK, dbt->sjw - 1) |

drivers/net/can/flexcan/flexcan-core.c

1284

FIELD_PREP(FLEXCAN_FDCBT_FPROPSEG_MASK, dbt->prop_seg) |

drivers/net/can/flexcan/flexcan-core.c

1285

FIELD_PREP(FLEXCAN_FDCBT_FPSEG1_MASK, dbt->phase_seg1 - 1) |

drivers/net/can/flexcan/flexcan-core.c

1286

FIELD_PREP(FLEXCAN_FDCBT_FPSEG2_MASK, dbt->phase_seg2 - 1);

drivers/net/can/flexcan/flexcan-core.c

1304

FIELD_PREP(FLEXCAN_FDCTRL_TDCOFF, 0x1f));

drivers/net/can/flexcan/flexcan-core.c

1314

FIELD_PREP(FLEXCAN_FDCTRL_TDCOFF,

drivers/net/can/flexcan/flexcan-core.c

1580

reg_fdctrl &= ~(FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1, 0x3) |

drivers/net/can/flexcan/flexcan-core.c

1581

FIELD_PREP(FLEXCAN_FDCTRL_MBDSR0, 0x3));

drivers/net/can/flexcan/flexcan-core.c

1585

FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1,

drivers/net/can/flexcan/flexcan-core.c

1587

FIELD_PREP(FLEXCAN_FDCTRL_MBDSR0,

drivers/net/can/flexcan/flexcan-core.c

1591

FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1,

drivers/net/can/flexcan/flexcan-core.c

1593

FIELD_PREP(FLEXCAN_FDCTRL_MBDSR0,

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

1438

iowrite32(FIELD_PREP(KVASER_PCIEFD_KCAN_CTRL_TYPE_MASK,

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

460

iowrite32(FIELD_PREP(KVASER_PCIEFD_KCAN_CMD_MASK, cmd) |

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

461

FIELD_PREP(KVASER_PCIEFD_KCAN_CMD_SEQ_MASK, ++can->cmd_seq),

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

642

pwm_ctrl |= FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, top);

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

658

pwm_ctrl = FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, top);

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

659

pwm_ctrl |= FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TOP_MASK, top);

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

664

pwm_ctrl = FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, trigger);

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

665

pwm_ctrl |= FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TOP_MASK, top);

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

737

p->header[0] |= FIELD_PREP(KVASER_PCIEFD_RPACKET_ID_MASK, cf->can_id);

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

741

p->header[1] |= FIELD_PREP(KVASER_PCIEFD_RPACKET_DLC_MASK,

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

750

FIELD_PREP(KVASER_PCIEFD_RPACKET_DLC_MASK,

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

754

p->header[1] |= FIELD_PREP(KVASER_PCIEFD_PACKET_SEQ_MASK, seq);

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

824

btrn = FIELD_PREP(KVASER_PCIEFD_KCAN_BTRN_TSEG2_MASK, bt->phase_seg2 - 1) |

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

825

FIELD_PREP(KVASER_PCIEFD_KCAN_BTRN_TSEG1_MASK, bt->prop_seg + bt->phase_seg1 - 1) |

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

826

FIELD_PREP(KVASER_PCIEFD_KCAN_BTRN_SJW_MASK, bt->sjw - 1) |

drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c

827

FIELD_PREP(KVASER_PCIEFD_KCAN_BTRN_BRP_MASK, bt->brp - 1);

drivers/net/can/m_can/m_can.c

1196

m_can_write(cdev, M_CAN_TXEFA, FIELD_PREP(TXEFA_EFAI_MASK,

drivers/net/can/m_can/m_can.c

1420

reg_btp = FIELD_PREP(NBTP_NBRP_MASK, brp) |

drivers/net/can/m_can/m_can.c

1421

FIELD_PREP(NBTP_NSJW_MASK, sjw) |

drivers/net/can/m_can/m_can.c

1422

FIELD_PREP(NBTP_NTSEG1_MASK, tseg1) |

drivers/net/can/m_can/m_can.c

1423

FIELD_PREP(NBTP_NTSEG2_MASK, tseg2);

drivers/net/can/m_can/m_can.c

1460

FIELD_PREP(TDCR_TDCO_MASK, tdco));

drivers/net/can/m_can/m_can.c

1463

reg_btp |= FIELD_PREP(DBTP_DBRP_MASK, brp) |

drivers/net/can/m_can/m_can.c

1464

FIELD_PREP(DBTP_DSJW_MASK, sjw) |

drivers/net/can/m_can/m_can.c

1465

FIELD_PREP(DBTP_DTSEG1_MASK, tseg1) |

drivers/net/can/m_can/m_can.c

1466

FIELD_PREP(DBTP_DTSEG2_MASK, tseg2);

drivers/net/can/m_can/m_can.c

1508

FIELD_PREP(RXESC_RBDS_MASK, RXESC_64B) |

drivers/net/can/m_can/m_can.c

1509

FIELD_PREP(RXESC_F1DS_MASK, RXESC_64B) |

drivers/net/can/m_can/m_can.c

1510

FIELD_PREP(RXESC_F0DS_MASK, RXESC_64B));

drivers/net/can/m_can/m_can.c

1517

m_can_write(cdev, M_CAN_TXBC, FIELD_PREP(TXBC_NDTB_MASK, 1) |

drivers/net/can/m_can/m_can.c

1522

FIELD_PREP(TXBC_TFQS_MASK,

drivers/net/can/m_can/m_can.c

1529

FIELD_PREP(TXESC_TBDS_MASK, TXESC_TBDS_64B));

drivers/net/can/m_can/m_can.c

1534

FIELD_PREP(TXEFC_EFS_MASK, 1) |

drivers/net/can/m_can/m_can.c

1539

FIELD_PREP(TXEFC_EFWM_MASK,

drivers/net/can/m_can/m_can.c

1541

FIELD_PREP(TXEFC_EFS_MASK,

drivers/net/can/m_can/m_can.c

1548

FIELD_PREP(RXFC_FWM_MASK, cdev->rx_max_coalesced_frames_irq) |

drivers/net/can/m_can/m_can.c

1549

FIELD_PREP(RXFC_FS_MASK, cdev->mcfg[MRAM_RXF0].num) |

drivers/net/can/m_can/m_can.c

1553

FIELD_PREP(RXFC_FS_MASK, cdev->mcfg[MRAM_RXF1].num) |

drivers/net/can/m_can/m_can.c

1563

FIELD_PREP(CCCR_CMR_MASK, FIELD_MAX(CCCR_CMR_MASK)) |

drivers/net/can/m_can/m_can.c

1564

FIELD_PREP(CCCR_CME_MASK, FIELD_MAX(CCCR_CME_MASK)));

drivers/net/can/m_can/m_can.c

1567

cccr |= FIELD_PREP(CCCR_CME_MASK, CCCR_CME_CANFD_BRS);

drivers/net/can/m_can/m_can.c

1620

FIELD_PREP(TSCC_TCP_MASK, 0xf) |

drivers/net/can/m_can/m_can.c

1621

FIELD_PREP(TSCC_TSS_MASK, TSCC_TSS_INTERNAL));

drivers/net/can/m_can/m_can.c

1907

cccr |= FIELD_PREP(CCCR_CMR_MASK,

drivers/net/can/m_can/m_can.c

1910

cccr |= FIELD_PREP(CCCR_CMR_MASK,

drivers/net/can/m_can/m_can.c

1913

cccr |= FIELD_PREP(CCCR_CMR_MASK, CCCR_CMR_CAN);

drivers/net/can/m_can/m_can.c

1942

fifo_element.dlc = FIELD_PREP(TX_BUF_MM_MASK, putidx) |

drivers/net/can/m_can/m_can.c

1943

FIELD_PREP(TX_BUF_DLC_MASK, can_fd_len2dlc(cf->len)) |

drivers/net/can/rcar/rcar_can.c

432

bcr = FIELD_PREP(RCAR_CAN_BCR_TSEG1, bt->phase_seg1 + bt->prop_seg - 1) |

drivers/net/can/rcar/rcar_can.c

433

FIELD_PREP(RCAR_CAN_BCR_BRP, bt->brp - 1) |

drivers/net/can/rcar/rcar_can.c

434

FIELD_PREP(RCAR_CAN_BCR_SJW, bt->sjw - 1) |

drivers/net/can/rcar/rcar_can.c

435

FIELD_PREP(RCAR_CAN_BCR_TSEG2, bt->phase_seg2 - 1);

drivers/net/can/rcar/rcar_can.c

459

ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_FORCE_RESET);

drivers/net/can/rcar/rcar_can.c

467

ctlr |= FIELD_PREP(RCAR_CAN_CTLR_IDFM, RCAR_CAN_CTLR_IDFM_MIXED);

drivers/net/can/rcar/rcar_can.c

469

ctlr |= FIELD_PREP(RCAR_CAN_CTLR_BOM, RCAR_CAN_CTLR_BOM_ENT);

drivers/net/can/rcar/rcar_can.c

500

ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_OPER);

drivers/net/can/rcar/rcar_can.c

562

ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_FORCE_RESET);

drivers/net/can/rcar/rcar_can.c

603

data = FIELD_PREP(RCAR_CAN_EID, cf->can_id & CAN_EFF_MASK) |

drivers/net/can/rcar/rcar_can.c

606

data = FIELD_PREP(RCAR_CAN_SID, cf->can_id & CAN_SFF_MASK);

drivers/net/can/rcar/rcar_can.c

855

ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_HALT);

drivers/net/can/rcar/rcar_canfd.c

1054

if (gerfl & FIELD_PREP(RCANFD_GERFL_EEF, BIT(ch))) {

drivers/net/can/rcar/rcar_canfd.c

1422

nbrp = FIELD_PREP(RCANFD_NCFG_NBRP, brp);

drivers/net/can/rcar/rcar_canfd.c

1424

ntseg1 = FIELD_PREP(RCANFD_CFG_TSEG1, tseg1);

drivers/net/can/rcar/rcar_canfd.c

1425

ntseg2 = FIELD_PREP(RCANFD_CFG_TSEG2, tseg2);

drivers/net/can/rcar/rcar_canfd.c

1426

nsjw = FIELD_PREP(RCANFD_CFG_SJW, sjw);

drivers/net/can/rcar/rcar_canfd.c

1427

nbrp = FIELD_PREP(RCANFD_CFG_BRP, brp);

drivers/net/can/rcar/rcar_canfd.c

1441

dbrp = FIELD_PREP(RCANFD_DCFG_DBRP, brp);

drivers/net/can/rcar/rcar_canfd.c

1490

tdcmode | FIELD_PREP(RCANFD_FDCFG_TDCO, tdco));

drivers/net/can/rcar/rcar_canfd.c

87

((x) & ((FIELD_PREP(RCANFD_GERFL_EEF, (_gpriv)->channels_mask)) | \

drivers/net/can/rockchip/rockchip_canfd-core.c

126

reg_nbt = FIELD_PREP(RKCANFD_REG_FD_NOMINAL_BITTIMING_SJW,

drivers/net/can/rockchip/rockchip_canfd-core.c

128

FIELD_PREP(RKCANFD_REG_FD_NOMINAL_BITTIMING_BRP,

drivers/net/can/rockchip/rockchip_canfd-core.c

130

FIELD_PREP(RKCANFD_REG_FD_NOMINAL_BITTIMING_TSEG2,

drivers/net/can/rockchip/rockchip_canfd-core.c

132

FIELD_PREP(RKCANFD_REG_FD_NOMINAL_BITTIMING_TSEG1,

drivers/net/can/rockchip/rockchip_canfd-core.c

140

reg_dbt = FIELD_PREP(RKCANFD_REG_FD_DATA_BITTIMING_SJW,

drivers/net/can/rockchip/rockchip_canfd-core.c

142

FIELD_PREP(RKCANFD_REG_FD_DATA_BITTIMING_BRP,

drivers/net/can/rockchip/rockchip_canfd-core.c

144

FIELD_PREP(RKCANFD_REG_FD_DATA_BITTIMING_TSEG2,

drivers/net/can/rockchip/rockchip_canfd-core.c

146

FIELD_PREP(RKCANFD_REG_FD_DATA_BITTIMING_TSEG1,

drivers/net/can/rockchip/rockchip_canfd-core.c

154

reg_tdc = FIELD_PREP(RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION_TDC_OFFSET, tdco) |

drivers/net/can/rockchip/rockchip_canfd-timestamp.c

60

reg = FIELD_PREP(RKCANFD_REG_TIMESTAMP_CTRL_TIME_BASE_COUNTER_PRESCALE,

drivers/net/can/rockchip/rockchip_canfd-tx.c

110

reg_frameinfo |= FIELD_PREP(RKCANFD_REG_FD_FRAMEINFO_DATA_LENGTH,

drivers/net/can/rockchip/rockchip_canfd-tx.c

113

reg_frameinfo |= FIELD_PREP(RKCANFD_REG_FD_FRAMEINFO_DATA_LENGTH,

drivers/net/can/rockchip/rockchip_canfd-tx.c

95

reg_id = FIELD_PREP(RKCANFD_REG_FD_ID_EFF, cfd->can_id);

drivers/net/can/rockchip/rockchip_canfd-tx.c

98

reg_id = FIELD_PREP(RKCANFD_REG_FD_ID_SFF, cfd->can_id);

drivers/net/can/rockchip/rockchip_canfd.h

150

(FIELD_PREP(RKCANFD_REG_ERROR_CODE_TYPE, \

drivers/net/can/spi/mcp251x.c

523

bits |= FIELD_PREP(MCP251X_GPIO_INPUT_MASK, val);

drivers/net/can/spi/mcp251x.c

528

bits |= FIELD_PREP(MCP251X_GPIO_OUTPUT_MASK, val);

drivers/net/can/spi/mcp251x.c

567

mask = FIELD_PREP(BFPCTRL_BFS_MASK, mask);

drivers/net/can/spi/mcp251x.c

570

val = FIELD_PREP(BFPCTRL_BFS_MASK, val);

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

31

fifo_con = FIELD_PREP(MCP251XFD_REG_FIFOCON_FSIZE_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

38

fifo_con |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

41

fifo_con |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

71

val = FIELD_PREP(MCP251XFD_REG_TEFCON_FSIZE_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

82

val = FIELD_PREP(MCP251XFD_REG_FIFOCON_FSIZE_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

88

val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

91

val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

95

val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_TXAT_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c

98

val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_TXAT_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

1921

val = FIELD_PREP(MCP251XFD_REG_IOCON_LAT_MASK, *bits);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

254

con_reqop = FIELD_PREP(MCP251XFD_REG_CON_REQOP_MASK, mode_req);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

360

osc = FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

392

osc = FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

435

FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

493

FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

550

val = FIELD_PREP(MCP251XFD_REG_CON_REQOP_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

555

FIELD_PREP(MCP251XFD_REG_CON_WFT_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

568

val = FIELD_PREP(MCP251XFD_REG_NBTCFG_BRP_MASK, bt->brp - 1) |

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

569

FIELD_PREP(MCP251XFD_REG_NBTCFG_TSEG1_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

571

FIELD_PREP(MCP251XFD_REG_NBTCFG_TSEG2_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

573

FIELD_PREP(MCP251XFD_REG_NBTCFG_SJW_MASK, bt->sjw - 1);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

583

val = FIELD_PREP(MCP251XFD_REG_DBTCFG_BRP_MASK, dbt->brp - 1) |

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

584

FIELD_PREP(MCP251XFD_REG_DBTCFG_TSEG1_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

586

FIELD_PREP(MCP251XFD_REG_DBTCFG_TSEG2_MASK,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

588

FIELD_PREP(MCP251XFD_REG_DBTCFG_SJW_MASK, dbt->sjw - 1);

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

602

val = FIELD_PREP(MCP251XFD_REG_TDC_TDCMOD_MASK, tdcmod) |

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

603

FIELD_PREP(MCP251XFD_REG_TDC_TDCV_MASK, priv->can.fd.tdc.tdcv) |

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c

604

FIELD_PREP(MCP251XFD_REG_TDC_TDCO_MASK, priv->can.fd.tdc.tdco);

drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c

134

FIELD_PREP(MCP251XFD_REG_FRAME_EFF_EID_MASK, eid) |

drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c

135

FIELD_PREP(MCP251XFD_REG_FRAME_EFF_SID_MASK, sid);

drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c

49

id = FIELD_PREP(MCP251XFD_OBJ_ID_EID_MASK, eid) |

drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c

50

FIELD_PREP(MCP251XFD_OBJ_ID_SID_MASK, sid);

drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c

54

id = FIELD_PREP(MCP251XFD_OBJ_ID_SID_MASK, cfd->can_id);

drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c

62

flags |= FIELD_PREP(MCP251XFD_OBJ_FLAGS_SEQ_MCP2518FD_MASK, seq);

drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c

85

flags |= FIELD_PREP(MCP251XFD_OBJ_FLAGS_DLC_MASK, dlc);

drivers/net/can/usb/f81604.c

842

btr0 = FIELD_PREP(F81604_BRP_MASK, bt->brp - 1) |

drivers/net/can/usb/f81604.c

843

FIELD_PREP(F81604_SJW_MASK, bt->sjw - 1);

drivers/net/can/usb/f81604.c

845

btr1 = FIELD_PREP(F81604_SEG1_MASK,

drivers/net/can/usb/f81604.c

847

FIELD_PREP(F81604_SEG2_MASK, bt->phase_seg2 - 1);

drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c

1999

FIELD_PREP(KVASER_USB_HYDRA_LED_IDX_MASK,

drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c

983

FIELD_PREP(KVASER_USB_LEAF_LED_IDX_MASK,

drivers/net/can/usb/nct6694_canfd.c

546

setting->nbtp = cpu_to_le32(FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NSJW,

drivers/net/can/usb/nct6694_canfd.c

548

FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NBRP,

drivers/net/can/usb/nct6694_canfd.c

550

FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NTSEG2,

drivers/net/can/usb/nct6694_canfd.c

552

FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NTSEG1,

drivers/net/can/usb/nct6694_canfd.c

560

setting->dbtp = cpu_to_le32(FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DSJW,

drivers/net/can/usb/nct6694_canfd.c

562

FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DBRP,

drivers/net/can/usb/nct6694_canfd.c

564

FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DTSEG2,

drivers/net/can/usb/nct6694_canfd.c

566

FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DTSEG1,

drivers/net/can/xilinx_can.c

520

btr0 |= FIELD_PREP(XCAN_BRPR_TDCO_MASK, priv->can.fd.tdc.tdco) |

drivers/net/can/xilinx_can.c

523

btr0 |= FIELD_PREP(XCAN_2_BRPR_TDCO_MASK, priv->can.fd.tdc.tdco) |

drivers/net/dsa/lantiq/lantiq_gswip_common.c

1175

mac_bridge.key[3] = FIELD_PREP(GSWIP_TABLE_MAC_BRIDGE_KEY3_FID, fid);

drivers/net/dsa/lantiq/lantiq_gswip_common.c

555

FIELD_PREP(GSWIP_PCE_VCTRL_VINR, vinr));

drivers/net/dsa/lantiq/mxl-gsw1xx.c

264

val = FIELD_PREP(GSW1XX_SGMII_PHY_RX0_CFG2_EQ,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

268

FIELD_PREP(GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

290

val = FIELD_PREP(GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

372

anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

376

anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

380

anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

384

anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

400

anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_ANMODE,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

405

anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_ANMODE,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

493

lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

496

lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

499

lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,

drivers/net/dsa/lantiq/mxl-gsw1xx.c

502

lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,

drivers/net/dsa/microchip/ksz8.c

1049

data |= FIELD_PREP(PHY_CABLE_DIAG_RESULT_M,

drivers/net/dsa/microchip/ksz8.c

1052

data |= FIELD_PREP(PHY_CABLE_FAULT_COUNTER_M,

drivers/net/dsa/microchip/ksz9477.c

1215

value |= FIELD_PREP(SW_AGE_CNT_M, data);

drivers/net/dsa/microchip/ksz9477_acl.c

1217

val = FIELD_PREP(KSZ9477_ACL_MD_MASK, KSZ9477_ACL_MD_L2_MAC) |

drivers/net/dsa/microchip/ksz9477_acl.c

1218

FIELD_PREP(KSZ9477_ACL_ENB_MASK, enb) |

drivers/net/dsa/microchip/ksz9477_acl.c

1219

FIELD_PREP(KSZ9477_ACL_SD_SRC, is_src) | KSZ9477_ACL_EQ_EQUAL;

drivers/net/dsa/microchip/ksz9477_acl.c

1290

val = FIELD_PREP(KSZ9477_ACL_PM_M, prio_mode) |

drivers/net/dsa/microchip/ksz9477_acl.c

1291

FIELD_PREP(KSZ9477_ACL_P_M, prio_val);

drivers/net/dsa/microchip/ksz9477_acl.c

831

val = FIELD_PREP(KSZ9477_ACL_INDEX_M, idx) | KSZ9477_ACL_WRITE;

drivers/net/dsa/microchip/ksz9477_acl.c

893

FIELD_PREP(PORT_AUTHEN_MODE, PORT_AUTHEN_PASS));

drivers/net/dsa/microchip/ksz_common.c

3904

data8 |= FIELD_PREP(P_GMII_1GBIT_M, bitval[P_GMII_1GBIT]);

drivers/net/dsa/microchip/ksz_common.c

3906

data8 |= FIELD_PREP(P_GMII_1GBIT_M, bitval[P_GMII_NOT_1GBIT]);

drivers/net/dsa/microchip/ksz_common.c

3923

data8 |= FIELD_PREP(P_MII_100MBIT_M, bitval[P_MII_100MBIT]);

drivers/net/dsa/microchip/ksz_common.c

3925

data8 |= FIELD_PREP(P_MII_100MBIT_M, bitval[P_MII_10MBIT]);

drivers/net/dsa/microchip/ksz_common.c

3955

val = FIELD_PREP(P_MII_DUPLEX_M, bitval[P_MII_FULL_DUPLEX]);

drivers/net/dsa/microchip/ksz_common.c

3957

val = FIELD_PREP(P_MII_DUPLEX_M, bitval[P_MII_HALF_DUPLEX]);

drivers/net/dsa/microchip/ksz_common.c

4173

FIELD_PREP(MTI_SCHEDULE_MODE_M, scheduler) |

drivers/net/dsa/microchip/ksz_common.c

4174

FIELD_PREP(MTI_SHAPING_M, shaper));

drivers/net/dsa/microchip/ksz_ptp.c

149

data = FIELD_PREP(TRIG_NOTIFY, 1) |

drivers/net/dsa/microchip/ksz_ptp.c

150

FIELD_PREP(TRIG_GPO_M, index) |

drivers/net/dsa/microchip/ksz_ptp.c

151

FIELD_PREP(TRIG_PATTERN_M, TRIG_POS_PERIOD);

drivers/net/dsa/microchip/ksz_ptp.c

200

data32 = FIELD_PREP(PTP_GPIO_INDEX, pin) |

drivers/net/dsa/microchip/ksz_ptp.c

201

FIELD_PREP(PTP_TOU_INDEX, request->index);

drivers/net/dsa/microchip/ksz_ptp.c

65

data = FIELD_PREP(TRIG_DONE_M, BIT(unit));

drivers/net/dsa/microchip/ksz_ptp.c

70

data = FIELD_PREP(TRIG_INT_M, BIT(unit));

drivers/net/dsa/microchip/lan937x_main.c

516

value8 |= FIELD_PREP(SW_AGE_CNT_M, data);

drivers/net/dsa/microchip/lan937x_main.c

544

data16 |= FIELD_PREP(PORT_TUNE_ADJ, val);

drivers/net/dsa/mt7530.c

3011

val = FIELD_PREP(LPI_THRESH_MASK, timer);

drivers/net/dsa/mt7530.c

3205

val = FIELD_PREP(ERLCR_CIR_MASK, (rate >> 5)) |

drivers/net/dsa/mt7530.c

3206

FIELD_PREP(ERLCR_EN_MASK, !!rate) |

drivers/net/dsa/mt7530.c

3207

FIELD_PREP(ERLCR_EXP_MASK, tick) |

drivers/net/dsa/mt7530.c

3209

FIELD_PREP(ERLCR_MANT_MASK, 0xf);

drivers/net/dsa/mt7530.c

3249

FIELD_PREP(AN7583_CSR_ETHER_AFE_PWD, 0));

drivers/net/dsa/mt7530.h

104

#define PAE_EG_TAG(x) FIELD_PREP(PAE_EG_TAG_MASK, x)

drivers/net/dsa/mt7530.h

106

#define PAE_PORT_FW(x) FIELD_PREP(PAE_PORT_FW_MASK, x)

drivers/net/dsa/mt7530.h

108

#define BPDU_EG_TAG(x) FIELD_PREP(BPDU_EG_TAG_MASK, x)

drivers/net/dsa/mt7530.h

115

#define R02_EG_TAG(x) FIELD_PREP(R02_EG_TAG_MASK, x)

drivers/net/dsa/mt7530.h

117

#define R02_PORT_FW(x) FIELD_PREP(R02_PORT_FW_MASK, x)

drivers/net/dsa/mt7530.h

120

#define R01_EG_TAG(x) FIELD_PREP(R01_EG_TAG_MASK, x)

drivers/net/dsa/mt7530.h

127

#define R0E_EG_TAG(x) FIELD_PREP(R0E_EG_TAG_MASK, x)

drivers/net/dsa/mt7530.h

129

#define R0E_PORT_FW(x) FIELD_PREP(R0E_PORT_FW_MASK, x)

drivers/net/dsa/mt7530.h

132

#define R03_EG_TAG(x) FIELD_PREP(R03_EG_TAG_MASK, x)

drivers/net/dsa/mt7530.h

351

#define PMCR_IFG_XMIT(x) FIELD_PREP(PMCR_IFG_XMIT_MASK, x)

drivers/net/dsa/mt7530.h

396

#define WAKEUP_TIME_1000(x) FIELD_PREP(WAKEUP_TIME_1000_MASK, x)

drivers/net/dsa/mt7530.h

398

#define WAKEUP_TIME_100(x) FIELD_PREP(WAKEUP_TIME_100_MASK, x)

drivers/net/dsa/mt7530.h

401

#define LPI_THRESH_SET(x) FIELD_PREP(LPI_THRESH_MASK, x)

drivers/net/dsa/mt7530.h

44

#define BC_FFP(x) FIELD_PREP(BC_FFP_MASK, x)

drivers/net/dsa/mt7530.h

46

#define UNM_FFP(x) FIELD_PREP(UNM_FFP_MASK, x)

drivers/net/dsa/mt7530.h

48

#define UNU_FFP(x) FIELD_PREP(UNU_FFP_MASK, x)

drivers/net/dsa/mt7530.h

51

#define MT7530_CPU_PORT(x) FIELD_PREP(MT7530_CPU_PORT_MASK, x)

drivers/net/dsa/mt7530.h

55

#define MT7530_MIRROR_PORT_SET(x) FIELD_PREP(MT7530_MIRROR_PORT_MASK, x)

drivers/net/dsa/mt7530.h

57

#define MT7531_QRY_FFP(x) FIELD_PREP(MT7531_QRY_FFP_MASK, x)

drivers/net/dsa/mt7530.h

64

#define MT7531_MIRROR_PORT_SET(x) FIELD_PREP(MT7531_MIRROR_PORT_MASK, x)

drivers/net/dsa/mt7530.h

66

#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x)

drivers/net/dsa/qca/ar9331.c

304

FIELD_PREP(AR9331_SW_MDIO_CTRL_PHY_ADDR_M, port) |

drivers/net/dsa/qca/ar9331.c

305

FIELD_PREP(AR9331_SW_MDIO_CTRL_REG_ADDR_M, regnum) |

drivers/net/dsa/qca/ar9331.c

306

FIELD_PREP(AR9331_SW_MDIO_CTRL_DATA_M, data));

drivers/net/dsa/qca/ar9331.c

334

FIELD_PREP(AR9331_SW_MDIO_CTRL_PHY_ADDR_M, port) |

drivers/net/dsa/qca/ar9331.c

335

FIELD_PREP(AR9331_SW_MDIO_CTRL_REG_ADDR_M, regnum));

drivers/net/dsa/qca/ar9331.c

400

port_ctrl = FIELD_PREP(AR9331_SW_PORT_CTRL_PORT_STATE,

drivers/net/dsa/qca/ar9331.c

421

val = FIELD_PREP(AR9331_SW_PORT_VLAN_8021Q_MODE,

drivers/net/dsa/qca/ar9331.c

423

FIELD_PREP(AR9331_SW_PORT_VLAN_PORT_VID_MEMBER, port_mask);

drivers/net/dsa/qca/ar9331.c

840

p = FIELD_PREP(AR9331_SW_MDIO_PHY_MODE_M, mode) |

drivers/net/dsa/qca/ar9331.c

851

p = FIELD_PREP(AR9331_SW_MDIO_PHY_MODE_M, AR9331_SW_MDIO_PHY_MODE_REG) |

drivers/net/dsa/qca/qca8k-8xxx.c

1713

FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_CAST) |

drivers/net/dsa/qca/qca8k-8xxx.c

1907

FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) |

drivers/net/dsa/qca/qca8k-8xxx.c

1908

FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL));

drivers/net/dsa/qca/qca8k-8xxx.c

1920

FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, BIT(cpu_port)) |

drivers/net/dsa/qca/qca8k-8xxx.c

1921

FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, BIT(cpu_port)) |

drivers/net/dsa/qca/qca8k-8xxx.c

1922

FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, BIT(cpu_port)) |

drivers/net/dsa/qca/qca8k-8xxx.c

1923

FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, BIT(cpu_port)));

drivers/net/dsa/qca/qca8k-8xxx.c

266

hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION);

drivers/net/dsa/qca/qca8k-8xxx.c

267

hdr |= FIELD_PREP(QCA_HDR_XMIT_PRIORITY, priority);

drivers/net/dsa/qca/qca8k-8xxx.c

269

hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(0));

drivers/net/dsa/qca/qca8k-8xxx.c

270

hdr |= FIELD_PREP(QCA_HDR_XMIT_CONTROL, QCA_HDR_XMIT_TYPE_RW_REG);

drivers/net/dsa/qca/qca8k-8xxx.c

272

command = FIELD_PREP(QCA_HDR_MGMT_ADDR, reg);

drivers/net/dsa/qca/qca8k-8xxx.c

273

command |= FIELD_PREP(QCA_HDR_MGMT_LENGTH, real_len);

drivers/net/dsa/qca/qca8k-8xxx.c

274

command |= FIELD_PREP(QCA_HDR_MGMT_CMD, cmd);

drivers/net/dsa/qca/qca8k-8xxx.c

275

command |= FIELD_PREP(QCA_HDR_MGMT_CHECK_CODE,

drivers/net/dsa/qca/qca8k-8xxx.c

307

seq = FIELD_PREP(QCA_HDR_MGMT_SEQ_NUM, seq_num);

drivers/net/dsa/qca/qca8k-common.c

146

reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid);

drivers/net/dsa/qca/qca8k-common.c

148

reg[2] |= FIELD_PREP(QCA8K_ATU_STATUS_MASK, aging);

drivers/net/dsa/qca/qca8k-common.c

150

reg[1] = FIELD_PREP(QCA8K_ATU_PORT_MASK, port_mask);

drivers/net/dsa/qca/qca8k-common.c

152

reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR0_MASK, mac[0]);

drivers/net/dsa/qca/qca8k-common.c

153

reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR1_MASK, mac[1]);

drivers/net/dsa/qca/qca8k-common.c

154

reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR2_MASK, mac[2]);

drivers/net/dsa/qca/qca8k-common.c

155

reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR3_MASK, mac[3]);

drivers/net/dsa/qca/qca8k-common.c

156

reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR4_MASK, mac[4]);

drivers/net/dsa/qca/qca8k-common.c

157

reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]);

drivers/net/dsa/qca/qca8k-common.c

175

reg |= FIELD_PREP(QCA8K_ATU_FUNC_PORT_MASK, port);

drivers/net/dsa/qca/qca8k-common.c

334

reg |= FIELD_PREP(QCA8K_VTU_FUNC1_VID_MASK, vid);

drivers/net/dsa/qca/qca8k-common.c

446

FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) |

drivers/net/dsa/qca/qca8k-common.c

925

val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM,

drivers/net/dsa/qca/qca8k-common.c

981

val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, 0xF);

drivers/net/dsa/qca/qca8k.h

164

#define QCA8K_SGMII_MODE_CTRL(x) FIELD_PREP(QCA8K_SGMII_MODE_CTRL_MASK, x)

drivers/net/dsa/qca/qca8k.h

189

#define QCA8K_PORT_VLAN_CVID(x) FIELD_PREP(QCA8K_PORT_VLAN_CVID_MASK, x)

drivers/net/dsa/qca/qca8k.h

191

#define QCA8K_PORT_VLAN_SVID(x) FIELD_PREP(QCA8K_PORT_VLAN_SVID_MASK, x)

drivers/net/dsa/qca/qca8k.h

229

#define QCA8K_VTU_FUNC0_EG_MODE_UNMOD FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x0)

drivers/net/dsa/qca/qca8k.h

231

#define QCA8K_VTU_FUNC0_EG_MODE_UNTAG FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x1)

drivers/net/dsa/qca/qca8k.h

233

#define QCA8K_VTU_FUNC0_EG_MODE_TAG FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x2)

drivers/net/dsa/qca/qca8k.h

235

#define QCA8K_VTU_FUNC0_EG_MODE_NOT FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x3)

drivers/net/dsa/qca/qca8k.h

243

#define QCA8K_ATU_AGE_TIME(x) FIELD_PREP(QCA8K_ATU_AGE_TIME_MASK, (x))

drivers/net/dsa/qca/qca8k.h

255

#define QCA8K_PORT_LOOKUP_VLAN_MODE(x) FIELD_PREP(QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, x)

drivers/net/dsa/qca/qca8k.h

261

#define QCA8K_PORT_LOOKUP_STATE(x) FIELD_PREP(QCA8K_PORT_LOOKUP_STATE_MASK, x)

drivers/net/dsa/qca/qca8k.h

294

#define QCA8K_GLOBAL_FC_GOL_XON_THRES(x) FIELD_PREP(QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK, x)

drivers/net/dsa/qca/qca8k.h

296

#define QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x) FIELD_PREP(QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK, x)

drivers/net/dsa/qca/qca8k.h

300

#define QCA8K_PORT_HOL_CTRL0_EG_PRI0(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF_MASK, x)

drivers/net/dsa/qca/qca8k.h

302

#define QCA8K_PORT_HOL_CTRL0_EG_PRI1(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF_MASK, x)

drivers/net/dsa/qca/qca8k.h

304

#define QCA8K_PORT_HOL_CTRL0_EG_PRI2(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF_MASK, x)

drivers/net/dsa/qca/qca8k.h

306

#define QCA8K_PORT_HOL_CTRL0_EG_PRI3(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF_MASK, x)

drivers/net/dsa/qca/qca8k.h

308

#define QCA8K_PORT_HOL_CTRL0_EG_PRI4(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF_MASK, x)

drivers/net/dsa/qca/qca8k.h

310

#define QCA8K_PORT_HOL_CTRL0_EG_PRI5(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF_MASK, x)

drivers/net/dsa/qca/qca8k.h

312

#define QCA8K_PORT_HOL_CTRL0_EG_PORT(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF_MASK, x)

drivers/net/dsa/qca/qca8k.h

316

#define QCA8K_PORT_HOL_CTRL1_ING(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK, x)

drivers/net/dsa/qca/qca8k.h

55

#define QCA8K_PORT_PAD_RGMII_TX_DELAY(x) FIELD_PREP(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, x)

drivers/net/dsa/qca/qca8k.h

57

#define QCA8K_PORT_PAD_RGMII_RX_DELAY(x) FIELD_PREP(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, x)

drivers/net/dsa/qca/qca8k.h

82

#define QCA8K_MDIO_MASTER_PHY_ADDR(x) FIELD_PREP(QCA8K_MDIO_MASTER_PHY_ADDR_MASK, x)

drivers/net/dsa/qca/qca8k.h

84

#define QCA8K_MDIO_MASTER_REG_ADDR(x) FIELD_PREP(QCA8K_MDIO_MASTER_REG_ADDR_MASK, x)

drivers/net/dsa/qca/qca8k.h

86

#define QCA8K_MDIO_MASTER_DATA(x) FIELD_PREP(QCA8K_MDIO_MASTER_DATA_MASK, x)

drivers/net/dsa/realtek/rtl8365mb.c

1003

val = FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_EN_MASK, 1) |

drivers/net/dsa/realtek/rtl8365mb.c

1004

FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_TXPAUSE_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

1006

FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_RXPAUSE_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

1008

FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_LINK_MASK, r_link) |

drivers/net/dsa/realtek/rtl8365mb.c

1009

FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_DUPLEX_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

1011

FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_SPEED_MASK, r_speed);

drivers/net/dsa/realtek/rtl8365mb.c

1159

FIELD_PREP(RTL8365MB_CFG0_MAX_LEN_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

1680

FIELD_PREP(RTL8365MB_INTR_LINK_CHANGE_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

1761

FIELD_PREP(RTL8365MB_INTR_POLARITY_MASK, val));

drivers/net/dsa/realtek/rtl8365mb.c

1844

FIELD_PREP(RTL8365MB_CPU_PORT_MASK_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

1849

val = FIELD_PREP(RTL8365MB_CPU_CTRL_EN_MASK, cpu->enable ? 1 : 0) |

drivers/net/dsa/realtek/rtl8365mb.c

1850

FIELD_PREP(RTL8365MB_CPU_CTRL_INSERTMODE_MASK, cpu->insert) |

drivers/net/dsa/realtek/rtl8365mb.c

1851

FIELD_PREP(RTL8365MB_CPU_CTRL_TAG_POSITION_MASK, cpu->position) |

drivers/net/dsa/realtek/rtl8365mb.c

1852

FIELD_PREP(RTL8365MB_CPU_CTRL_RXBYTECOUNT_MASK, cpu->rx_length) |

drivers/net/dsa/realtek/rtl8365mb.c

1853

FIELD_PREP(RTL8365MB_CPU_CTRL_TAG_FORMAT_MASK, cpu->format) |

drivers/net/dsa/realtek/rtl8365mb.c

1854

FIELD_PREP(RTL8365MB_CPU_CTRL_TRAP_PORT_MASK, cpu->trap_port & 0x7) |

drivers/net/dsa/realtek/rtl8365mb.c

1855

FIELD_PREP(RTL8365MB_CPU_CTRL_TRAP_PORT_EXT_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

1930

FIELD_PREP(RTL8365MB_CHIP_RESET_HW_MASK, 1));

drivers/net/dsa/realtek/rtl8365mb.c

670

FIELD_PREP(RTL8365MB_GPHY_OCP_MSB_0_CFG_CPU_OCPADR_MASK, val));

drivers/net/dsa/realtek/rtl8365mb.c

676

val |= FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_ADDRESS_PHYNUM_MASK, phy);

drivers/net/dsa/realtek/rtl8365mb.c

677

val |= FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_ADDRESS_OCPADR_5_1_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

679

val |= FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_ADDRESS_OCPADR_9_6_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

706

val = FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_CTRL_CMD_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

708

FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_CTRL_RW_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

756

val = FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_CTRL_CMD_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

758

FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_CTRL_RW_MASK,

drivers/net/dsa/realtek/rtl8365mb.c

933

FIELD_PREP(RTL8365MB_EXT_RGMXF_TXDELAY_MASK, tx_delay) |

drivers/net/dsa/realtek/rtl8365mb.c

934

FIELD_PREP(RTL8365MB_EXT_RGMXF_RXDELAY_MASK, rx_delay));

drivers/net/dsa/realtek/rtl8366rb-leds.c

13

return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));

drivers/net/dsa/realtek/rtl8366rb-leds.c

15

return FIELD_PREP(RTL8366RB_LED_X_1_CTRL_MASK, BIT(port));

drivers/net/dsa/realtek/rtl8366rb-leds.c

17

return FIELD_PREP(RTL8366RB_LED_2_X_CTRL_MASK, BIT(port));

drivers/net/dsa/realtek/rtl8366rb-leds.c

19

return FIELD_PREP(RTL8366RB_LED_X_3_CTRL_MASK, BIT(port));

drivers/net/dsa/rzn1_a5psw.c

1063

cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_REG_ADDR, phy_reg);

drivers/net/dsa/rzn1_a5psw.c

1064

cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_PHY_ADDR, phy_id);

drivers/net/dsa/rzn1_a5psw.c

1087

cmd = FIELD_PREP(A5PSW_MDIO_COMMAND_REG_ADDR, phy_reg);

drivers/net/dsa/rzn1_a5psw.c

1088

cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_PHY_ADDR, phy_id);

drivers/net/dsa/rzn1_a5psw.c

1110

cfgstatus = FIELD_PREP(A5PSW_MDIO_CFG_STATUS_CLKDIV, div);

drivers/net/dsa/rzn1_a5psw.c

696

vlan_res = FIELD_PREP(A5PSW_VLAN_RES_VLANID, newvid);

drivers/net/dsa/rzn1_a5psw.c

947

reg = FIELD_PREP(A5PSW_MGMT_TAG_CFG_TAGFIELD, ETH_P_DSA_A5PSW);

drivers/net/dsa/vitesse-vsc73xx-core.c

1909

u16 hash = FIELD_PREP(VSC73XX_HASH0_VID_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1911

FIELD_PREP(VSC73XX_HASH0_MAC0_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1914

hash ^= FIELD_PREP(VSC73XX_HASH1_MAC0_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1916

FIELD_PREP(VSC73XX_HASH1_MAC1_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1919

hash ^= FIELD_PREP(VSC73XX_HASH2_MAC1_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1921

FIELD_PREP(VSC73XX_HASH2_MAC2_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1923

FIELD_PREP(VSC73XX_HASH2_MAC3_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1926

hash ^= FIELD_PREP(VSC73XX_HASH3_MAC3_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1928

FIELD_PREP(VSC73XX_HASH3_MAC4_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1931

hash ^= FIELD_PREP(VSC73XX_HASH4_MAC4_TO_MASK,

drivers/net/dsa/vitesse-vsc73xx-core.c

1971

FIELD_PREP(VSC73XX_MACTINDX_BUCKET_MSK, i) |

drivers/net/dsa/vitesse-vsc73xx-core.c

2032

val = FIELD_PREP(VSC73XX_MACHDATA_VID, vid) |

drivers/net/dsa/vitesse-vsc73xx-core.c

2033

FIELD_PREP(VSC73XX_MACHDATA_MAC0, addr[0]) |

drivers/net/dsa/vitesse-vsc73xx-core.c

2034

FIELD_PREP(VSC73XX_MACHDATA_MAC1, addr[1]);

drivers/net/dsa/vitesse-vsc73xx-core.c

2040

val = FIELD_PREP(VSC73XX_MACLDATA_MAC2, addr[2]) |

drivers/net/dsa/vitesse-vsc73xx-core.c

2041

FIELD_PREP(VSC73XX_MACLDATA_MAC3, addr[3]) |

drivers/net/dsa/vitesse-vsc73xx-core.c

2042

FIELD_PREP(VSC73XX_MACLDATA_MAC4, addr[4]) |

drivers/net/dsa/vitesse-vsc73xx-core.c

2043

FIELD_PREP(VSC73XX_MACLDATA_MAC5, addr[5]);

drivers/net/dsa/vitesse-vsc73xx-core.c

2125

FIELD_PREP(VSC73XX_MACACCESS_DEST_IDX_MASK, port) |

drivers/net/dsa/vitesse-vsc73xx-core.c

634

FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) |

drivers/net/dsa/vitesse-vsc73xx-core.c

635

FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum);

drivers/net/dsa/vitesse-vsc73xx-core.c

673

cmd = FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) |

drivers/net/dsa/vitesse-vsc73xx-core.c

674

FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum) |

drivers/net/dsa/vitesse-vsc73xx-core.c

675

FIELD_PREP(VSC73XX_MII_CMD_WRITE_DATA, val);

drivers/net/dsa/vitesse-vsc73xx-core.c

927

FIELD_PREP(VSC73XX_MII_MPRES_PRESCALEVAL,

drivers/net/dsa/yt921x.h

106

#define YT921X_PORT_SPEED(x) FIELD_PREP(YT921X_PORT_SPEED_M, (x))

drivers/net/dsa/yt921x.h

12

#define YT921X_SMI_SWITCHID(x) FIELD_PREP(YT921X_SMI_SWITCHID_M, (x))

drivers/net/dsa/yt921x.h

121

#define YT921X_MDIO_POLLING_SPEED(x) FIELD_PREP(YT921X_MDIO_POLLING_SPEED_M, (x))

drivers/net/dsa/yt921x.h

136

#define YT921X_XMII_MODE(x) FIELD_PREP(YT921X_XMII_MODE_M, (x))

drivers/net/dsa/yt921x.h

147

#define YT921X_XMII_RGMII_TX_DELAY_150PS(x) FIELD_PREP(YT921X_XMII_RGMII_TX_DELAY_150PS_M, (x))

drivers/net/dsa/yt921x.h

153

#define YT921X_XMII_RGMII_RX_DELAY_150PS(x) FIELD_PREP(YT921X_XMII_RGMII_RX_DELAY_150PS_M, (x))

drivers/net/dsa/yt921x.h

160

#define YT921X_MAC_FRAME_SIZE(x) FIELD_PREP(YT921X_MAC_FRAME_SIZE_M, (x))

drivers/net/dsa/yt921x.h

171

#define YT921X_MIB_CTRL_PORT(x) FIELD_PREP(YT921X_MIB_CTRL_PORT_M, (x))

drivers/net/dsa/yt921x.h

233

#define YT921X_EDATA_CTRL_ADDR(x) FIELD_PREP(YT921X_EDATA_CTRL_ADDR_M, (x))

drivers/net/dsa/yt921x.h

235

#define YT921X_EDATA_CTRL_OP(x) FIELD_PREP(YT921X_EDATA_CTRL_OP_M, (x))

drivers/net/dsa/yt921x.h

240

#define YT921X_EDATA_DATA_STATUS(x) FIELD_PREP(YT921X_EDATA_DATA_STATUS_M, (x))

drivers/net/dsa/yt921x.h

249

#define YT921X_MBUS_CTRL_PORT(x) FIELD_PREP(YT921X_MBUS_CTRL_PORT_M, (x))

drivers/net/dsa/yt921x.h

251

#define YT921X_MBUS_CTRL_REG(x) FIELD_PREP(YT921X_MBUS_CTRL_REG_M, (x))

drivers/net/dsa/yt921x.h

253

#define YT921X_MBUS_CTRL_TYPE(x) FIELD_PREP(YT921X_MBUS_CTRL_TYPE_M, (x))

drivers/net/dsa/yt921x.h

256

#define YT921X_MBUS_CTRL_OP(x) FIELD_PREP(YT921X_MBUS_CTRL_OP_M, (x))

drivers/net/dsa/yt921x.h

266

#define YT921X_PORT_EGR_TPID_CTAG(x) FIELD_PREP(YT921X_PORT_EGR_TPID_CTAG_M, (x))

drivers/net/dsa/yt921x.h

268

#define YT921X_PORT_EGR_TPID_STAG(x) FIELD_PREP(YT921X_PORT_EGR_TPID_STAG_M, (x))

drivers/net/dsa/yt921x.h

275

#define YT921X_IPM_PRIO(x) FIELD_PREP(YT921X_IPM_PRIO_M, (x))

drivers/net/dsa/yt921x.h

277

#define YT921X_IPM_COLOR(x) FIELD_PREP(YT921X_IPM_COLOR_M, (x))

drivers/net/dsa/yt921x.h

285

#define YT921X_PORT_QOS_PRIO(x) FIELD_PREP(YT921X_PORT_QOS_PRIO_M, (x))

drivers/net/dsa/yt921x.h

325

#define YT921X_PORT_LEARN_LIMIT(x) FIELD_PREP(YT921X_PORT_LEARN_LIMIT_M, (x))

drivers/net/dsa/yt921x.h

328

#define YT921X_PORT_LEARN_MODE(x) FIELD_PREP(YT921X_PORT_LEARN_MODE_M, (x))

drivers/net/dsa/yt921x.h

33

#define YT921X_EXT_CPU_PORT_PORT(x) FIELD_PREP(YT921X_EXT_CPU_PORT_PORT_M, (x))

drivers/net/dsa/yt921x.h

339

#define YT921X_FDB_OP_INDEX(x) FIELD_PREP(YT921X_FDB_OP_INDEX_M, (x))

drivers/net/dsa/yt921x.h

343

#define YT921X_FDB_OP_FLUSH(x) FIELD_PREP(YT921X_FDB_OP_FLUSH_M, (x))

drivers/net/dsa/yt921x.h

350

#define YT921X_FDB_OP_NEXT_TYPE(x) FIELD_PREP(YT921X_FDB_OP_NEXT_TYPE_M, (x))

drivers/net/dsa/yt921x.h

356

#define YT921X_FDB_OP_OP(x) FIELD_PREP(YT921X_FDB_OP_OP_M, (x))

drivers/net/dsa/yt921x.h

368

#define YT921X_FDB_RESULT_INDEX(x) FIELD_PREP(YT921X_FDB_RESULT_INDEX_M, (x))

drivers/net/dsa/yt921x.h

374

#define YT921X_FDB_IO1_STATUS(x) FIELD_PREP(YT921X_FDB_IO1_STATUS_M, (x))

drivers/net/dsa/yt921x.h

382

#define YT921X_FDB_IO1_FID(x) FIELD_PREP(YT921X_FDB_IO1_FID_M, (x))

drivers/net/dsa/yt921x.h

388

#define YT921X_FDB_IO2_EGR_PORTS(x) FIELD_PREP(YT921X_FDB_IO2_EGR_PORTS_M, (x))

drivers/net/dsa/yt921x.h

393

#define YT921X_FDB_IO2_PRIO(x) FIELD_PREP(YT921X_FDB_IO2_PRIO_M, (x))

drivers/net/dsa/yt921x.h

395

#define YT921X_FDB_IO2_NEW_VID(x) FIELD_PREP(YT921X_FDB_IO2_NEW_VID_M, (x))

drivers/net/dsa/yt921x.h

401

#define YT921X_FILTER_PORTS(x) FIELD_PREP(YT921X_FILTER_PORTS_M, (x))

drivers/net/dsa/yt921x.h

407

#define YT921X_LAG_GROUP_PORTS(x) FIELD_PREP(YT921X_LAG_GROUP_PORTS_M, (x))

drivers/net/dsa/yt921x.h

409

#define YT921X_LAG_GROUP_MEMBER_NUM(x) FIELD_PREP(YT921X_LAG_GROUP_MEMBER_NUM_M, (x))

drivers/net/dsa/yt921x.h

412

#define YT921X_LAG_MEMBER_PORT(x) FIELD_PREP(YT921X_LAG_MEMBER_PORT_M, (x))

drivers/net/dsa/yt921x.h

433

#define YT921X_VLAN_CTRL_UNTAG_PORTS(x) FIELD_PREP(YT921X_VLAN_CTRL_UNTAG_PORTS_M, (x))

drivers/net/dsa/yt921x.h

436

#define YT921X_VLAN_CTRL_STP_ID(x) FIELD_PREP(YT921X_VLAN_CTRL_STP_ID_M, (x))

drivers/net/dsa/yt921x.h

439

#define YT921X_VLAN_CTRL_FID(x) FIELD_PREP(YT921X_VLAN_CTRL_FID_M, (x))

drivers/net/dsa/yt921x.h

443

#define YT921X_VLAN_CTRL_PRIO(x) FIELD_PREP(YT921X_VLAN_CTRL_PRIO_M, (x))

drivers/net/dsa/yt921x.h

445

#define YT921X_VLAN_CTRL_PORTS(x) FIELD_PREP(YT921X_VLAN_CTRL_PORTS_M, (x))

drivers/net/dsa/yt921x.h

47

#define YT9215_IO_LEVEL_NORMAL(x) FIELD_PREP(YT9215_IO_LEVEL_NORMAL_M, (x))

drivers/net/dsa/yt921x.h

472

#define YT921X_PORT_VLAN_CTRL_SVID(x) FIELD_PREP(YT921X_PORT_VLAN_CTRL_SVID_M, (x))

drivers/net/dsa/yt921x.h

474

#define YT921X_PORT_VLAN_CTRL_CVID(x) FIELD_PREP(YT921X_PORT_VLAN_CTRL_CVID_M, (x))

drivers/net/dsa/yt921x.h

487

#define YT921X_MIRROR_IGR_PORTS(x) FIELD_PREP(YT921X_MIRROR_IGR_PORTS_M, (x))

drivers/net/dsa/yt921x.h

490

#define YT921X_MIRROR_EGR_PORTS(x) FIELD_PREP(YT921X_MIRROR_EGR_PORTS_M, (x))

drivers/net/dsa/yt921x.h

493

#define YT921X_MIRROR_PORT(x) FIELD_PREP(YT921X_MIRROR_PORT_M, (x))

drivers/net/dsa/yt921x.h

51

#define YT9215_IO_LEVEL_RGMII1(x) FIELD_PREP(YT9215_IO_LEVEL_RGMII1_M, (x))

drivers/net/dsa/yt921x.h

56

#define YT9215_IO_LEVEL_RGMII0(x) FIELD_PREP(YT9215_IO_LEVEL_RGMII0_M, (x))

drivers/net/dsa/yt921x.h

61

#define YT9218_IO_LEVEL_RGMII1(x) FIELD_PREP(YT9218_IO_LEVEL_RGMII1_M, (x))

drivers/net/dsa/yt921x.h

66

#define YT9218_IO_LEVEL_RGMII0(x) FIELD_PREP(YT9218_IO_LEVEL_RGMII0_M, (x))

drivers/net/dsa/yt921x.h

71

#define YT9218_IO_LEVEL_NORMAL(x) FIELD_PREP(YT9218_IO_LEVEL_NORMAL_M, (x))

drivers/net/dsa/yt921x.h

78

#define YT921X_SERDES_MODE(x) FIELD_PREP(YT921X_SERDES_MODE_M, (x))

drivers/net/dsa/yt921x.h

89

#define YT921X_SERDES_SPEED(x) FIELD_PREP(YT921X_SERDES_SPEED_M, (x))

drivers/net/ethernet/adi/adin1110.c

449

val |= FIELD_PREP(ADIN1110_MDIO_OP, ADIN1110_MDIO_OP_RD);

drivers/net/ethernet/adi/adin1110.c

450

val |= FIELD_PREP(ADIN1110_MDIO_ST, 0x1);

drivers/net/ethernet/adi/adin1110.c

451

val |= FIELD_PREP(ADIN1110_MDIO_PRTAD, phy_id);

drivers/net/ethernet/adi/adin1110.c

452

val |= FIELD_PREP(ADIN1110_MDIO_DEVAD, reg);

drivers/net/ethernet/adi/adin1110.c

486

val |= FIELD_PREP(ADIN1110_MDIO_OP, ADIN1110_MDIO_OP_WR);

drivers/net/ethernet/adi/adin1110.c

487

val |= FIELD_PREP(ADIN1110_MDIO_ST, 0x1);

drivers/net/ethernet/adi/adin1110.c

488

val |= FIELD_PREP(ADIN1110_MDIO_PRTAD, phy_id);

drivers/net/ethernet/adi/adin1110.c

489

val |= FIELD_PREP(ADIN1110_MDIO_DEVAD, reg);

drivers/net/ethernet/adi/adin1110.c

490

val |= FIELD_PREP(ADIN1110_MDIO_DATA, reg_val);

drivers/net/ethernet/airoha/airoha_eth.c

101

FIELD_PREP(GDM_UCFQ_MASK, val));

drivers/net/ethernet/airoha/airoha_eth.c

1014

FIELD_PREP(TX_IRQ_DEPTH_MASK, size));

drivers/net/ethernet/airoha/airoha_eth.c

1016

FIELD_PREP(TX_IRQ_THR_MASK, 1));

drivers/net/ethernet/airoha/airoha_eth.c

1117

FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK, !!id));

drivers/net/ethernet/airoha/airoha_eth.c

1119

FIELD_PREP(FWD_DSCP_LOW_THR_MASK, 128));

drivers/net/ethernet/airoha/airoha_eth.c

1123

FIELD_PREP(HW_FWD_DESC_NUM_MASK, num_desc) |

drivers/net/ethernet/airoha/airoha_eth.c

1146

FIELD_PREP(EGRESS_RATE_METER_WINDOW_SZ_MASK, 0x1f));

drivers/net/ethernet/airoha/airoha_eth.c

1149

FIELD_PREP(EGRESS_RATE_METER_TIMESLICE_MASK, 0x7ff));

drivers/net/ethernet/airoha/airoha_eth.c

1155

FIELD_PREP(GLB_FAST_TICK_MASK, 25));

drivers/net/ethernet/airoha/airoha_eth.c

1157

FIELD_PREP(GLB_SLOW_TICK_RATIO_MASK, 40));

drivers/net/ethernet/airoha/airoha_eth.c

1161

FIELD_PREP(EGRESS_FAST_TICK_MASK, 25));

drivers/net/ethernet/airoha/airoha_eth.c

1164

FIELD_PREP(EGRESS_SLOW_TICK_RATIO_MASK, 40));

drivers/net/ethernet/airoha/airoha_eth.c

1170

FIELD_PREP(INGRESS_FAST_TICK_MASK, 125));

drivers/net/ethernet/airoha/airoha_eth.c

1173

FIELD_PREP(INGRESS_SLOW_TICK_RATIO_MASK, 8));

drivers/net/ethernet/airoha/airoha_eth.c

1177

FIELD_PREP(SLA_FAST_TICK_MASK, 25));

drivers/net/ethernet/airoha/airoha_eth.c

1179

FIELD_PREP(SLA_SLOW_TICK_RATIO_MASK, 40));

drivers/net/ethernet/airoha/airoha_eth.c

1192

FIELD_PREP(CNTR_CHAN_MASK, i));

drivers/net/ethernet/airoha/airoha_eth.c

1198

FIELD_PREP(CNTR_SRC_MASK, 1) |

drivers/net/ethernet/airoha/airoha_eth.c

1199

FIELD_PREP(CNTR_CHAN_MASK, i));

drivers/net/ethernet/airoha/airoha_eth.c

1240

FIELD_PREP(GLOBAL_CFG_DMA_PREFERENCE_MASK, 3) |

drivers/net/ethernet/airoha/airoha_eth.c

1247

FIELD_PREP(GLOBAL_CFG_MAX_ISSUE_NUM_MASK, 2));

drivers/net/ethernet/airoha/airoha_eth.c

144

FIELD_PREP(CDM_VLAN_MASK, 0x8100));

drivers/net/ethernet/airoha/airoha_eth.c

156

PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |

drivers/net/ethernet/airoha/airoha_eth.c

161

PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |

drivers/net/ethernet/airoha/airoha_eth.c

1645

FIELD_PREP(GDM_SHORT_LEN_MASK, 60) |

drivers/net/ethernet/airoha/airoha_eth.c

1646

FIELD_PREP(GDM_LONG_LEN_MASK, len));

drivers/net/ethernet/airoha/airoha_eth.c

166

PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |

drivers/net/ethernet/airoha/airoha_eth.c

1721

FIELD_PREP(LPBK_CHAN_MASK, chan) |

drivers/net/ethernet/airoha/airoha_eth.c

1726

FIELD_PREP(GDM_SHORT_LEN_MASK, 60) |

drivers/net/ethernet/airoha/airoha_eth.c

1727

FIELD_PREP(GDM_LONG_LEN_MASK, AIROHA_MAX_MTU));

drivers/net/ethernet/airoha/airoha_eth.c

173

FIELD_PREP(PATN_TYPE_MASK, 4) | PATN_EN_MASK);

drivers/net/ethernet/airoha/airoha_eth.c

1741

FIELD_PREP(WAN0_MASK, src_port));

drivers/net/ethernet/airoha/airoha_eth.c

1751

FIELD_PREP(FC_ID_OF_SRC_PORT24_MASK, 2));

drivers/net/ethernet/airoha/airoha_eth.c

179

FIELD_PREP(PATN_TYPE_MASK, 4) | PATN_EN_MASK);

drivers/net/ethernet/airoha/airoha_eth.c

1835

FIELD_PREP(GDM_LONG_LEN_MASK, len));

drivers/net/ethernet/airoha/airoha_eth.c

185

FIELD_PREP(PATN_TYPE_MASK, 4) | PATN_EN_MASK);

drivers/net/ethernet/airoha/airoha_eth.c

189

PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |

drivers/net/ethernet/airoha/airoha_eth.c

1937

msg0 = FIELD_PREP(QDMA_ETH_TXMSG_CHAN_MASK,

drivers/net/ethernet/airoha/airoha_eth.c

1939

FIELD_PREP(QDMA_ETH_TXMSG_QUEUE_MASK,

drivers/net/ethernet/airoha/airoha_eth.c

1941

FIELD_PREP(QDMA_ETH_TXMSG_SP_TAG_MASK, tag);

drivers/net/ethernet/airoha/airoha_eth.c

1943

msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TCO_MASK, 1) |

drivers/net/ethernet/airoha/airoha_eth.c

1944

FIELD_PREP(QDMA_ETH_TXMSG_UCO_MASK, 1) |

drivers/net/ethernet/airoha/airoha_eth.c

1945

FIELD_PREP(QDMA_ETH_TXMSG_ICO_MASK, 1);

drivers/net/ethernet/airoha/airoha_eth.c

1957

msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TSO_MASK, 1);

drivers/net/ethernet/airoha/airoha_eth.c

196

FIELD_PREP(PATN_TYPE_MASK, 4) | PATN_EN_MASK);

drivers/net/ethernet/airoha/airoha_eth.c

1962

msg1 = FIELD_PREP(QDMA_ETH_TXMSG_FPORT_MASK, fport) |

drivers/net/ethernet/airoha/airoha_eth.c

1963

FIELD_PREP(QDMA_ETH_TXMSG_METER_MASK, 0x7f);

drivers/net/ethernet/airoha/airoha_eth.c

200

PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |

drivers/net/ethernet/airoha/airoha_eth.c

2008

val = FIELD_PREP(QDMA_DESC_LEN_MASK, len);

drivers/net/ethernet/airoha/airoha_eth.c

2010

val |= FIELD_PREP(QDMA_DESC_MORE_MASK, 1);

drivers/net/ethernet/airoha/airoha_eth.c

2013

val = FIELD_PREP(QDMA_DESC_NEXT_ID_MASK, index);

drivers/net/ethernet/airoha/airoha_eth.c

2030

FIELD_PREP(TX_RING_CPU_IDX_MASK, index));

drivers/net/ethernet/airoha/airoha_eth.c

2143

FIELD_PREP(TWRR_CHAN_IDX_MASK, channel) |

drivers/net/ethernet/airoha/airoha_eth.c

2144

FIELD_PREP(TWRR_QUEUE_IDX_MASK, i) |

drivers/net/ethernet/airoha/airoha_eth.c

2145

FIELD_PREP(TWRR_VALUE_MASK, weights[i]));

drivers/net/ethernet/airoha/airoha_eth.c

220

FIELD_PREP(PSE_CFG_PORT_ID_MASK, port) |

drivers/net/ethernet/airoha/airoha_eth.c

221

FIELD_PREP(PSE_CFG_QUEUE_ID_MASK, queue));

drivers/net/ethernet/airoha/airoha_eth.c

2264

u32 val, config = FIELD_PREP(RATE_LIMIT_PARAM_TYPE_MASK, param) |

drivers/net/ethernet/airoha/airoha_eth.c

2265

FIELD_PREP(RATE_LIMIT_METER_GROUP_MASK, group) |

drivers/net/ethernet/airoha/airoha_eth.c

2266

FIELD_PREP(RATE_LIMIT_PARAM_INDEX_MASK, idx);

drivers/net/ethernet/airoha/airoha_eth.c

2288

FIELD_PREP(RATE_LIMIT_PARAM_TYPE_MASK, param) |

drivers/net/ethernet/airoha/airoha_eth.c

2289

FIELD_PREP(RATE_LIMIT_METER_GROUP_MASK, group) |

drivers/net/ethernet/airoha/airoha_eth.c

2290

FIELD_PREP(RATE_LIMIT_PARAM_INDEX_MASK, idx);

drivers/net/ethernet/airoha/airoha_eth.c

231

FIELD_PREP(PSE_CFG_OQ_RSV_MASK, val));

drivers/net/ethernet/airoha/airoha_eth.c

2343

rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;

drivers/net/ethernet/airoha/airoha_eth.c

2344

rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |

drivers/net/ethernet/airoha/airoha_eth.c

2345

FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);

drivers/net/ethernet/airoha/airoha_eth.c

235

FIELD_PREP(PSE_CFG_PORT_ID_MASK, port) |

drivers/net/ethernet/airoha/airoha_eth.c

236

FIELD_PREP(PSE_CFG_QUEUE_ID_MASK, queue) |

drivers/net/ethernet/airoha/airoha_eth.c

2384

u32 val, config = FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |

drivers/net/ethernet/airoha/airoha_eth.c

2385

FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |

drivers/net/ethernet/airoha/airoha_eth.c

2386

FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |

drivers/net/ethernet/airoha/airoha_eth.c

2387

FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);

drivers/net/ethernet/airoha/airoha_eth.c

2409

FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |

drivers/net/ethernet/airoha/airoha_eth.c

2410

FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |

drivers/net/ethernet/airoha/airoha_eth.c

2411

FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |

drivers/net/ethernet/airoha/airoha_eth.c

2412

FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);

drivers/net/ethernet/airoha/airoha_eth.c

2464

rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;

drivers/net/ethernet/airoha/airoha_eth.c

2465

rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |

drivers/net/ethernet/airoha/airoha_eth.c

2466

FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);

drivers/net/ethernet/airoha/airoha_eth.c

259

FIELD_PREP(PSE_ALLRSV_MASK, all_rsv));

drivers/net/ethernet/airoha/airoha_eth.c

267

FIELD_PREP(PSE_SHARE_USED_HTHD_MASK, tmp));

drivers/net/ethernet/airoha/airoha_eth.c

272

FIELD_PREP(PSE_SHARE_USED_MTHD_MASK, tmp));

drivers/net/ethernet/airoha/airoha_eth.c

276

FIELD_PREP(PSE_SHARE_USED_LTHD_MASK, tmp));

drivers/net/ethernet/airoha/airoha_eth.c

373

val = FIELD_PREP(MC_VLAN_CFG_TABLE_ID_MASK, i) |

drivers/net/ethernet/airoha/airoha_eth.c

386

val = FIELD_PREP(MC_VLAN_CFG_TABLE_ID_MASK, i) |

drivers/net/ethernet/airoha/airoha_eth.c

387

FIELD_PREP(MC_VLAN_CFG_PORT_ID_MASK, j) |

drivers/net/ethernet/airoha/airoha_eth.c

408

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),

drivers/net/ethernet/airoha/airoha_eth.c

412

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),

drivers/net/ethernet/airoha/airoha_eth.c

416

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),

drivers/net/ethernet/airoha/airoha_eth.c

420

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),

drivers/net/ethernet/airoha/airoha_eth.c

424

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),

drivers/net/ethernet/airoha/airoha_eth.c

429

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),

drivers/net/ethernet/airoha/airoha_eth.c

433

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),

drivers/net/ethernet/airoha/airoha_eth.c

437

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),

drivers/net/ethernet/airoha/airoha_eth.c

441

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),

drivers/net/ethernet/airoha/airoha_eth.c

445

FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),

drivers/net/ethernet/airoha/airoha_eth.c

455

FIELD_PREP(PSE_IQ_RES1_P2_MASK, 0x10));

drivers/net/ethernet/airoha/airoha_eth.c

458

FIELD_PREP(PSE_IQ_RES2_P5_MASK, 0x40) |

drivers/net/ethernet/airoha/airoha_eth.c

459

FIELD_PREP(PSE_IQ_RES2_P4_MASK, 0x34));

drivers/net/ethernet/airoha/airoha_eth.c

466

FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));

drivers/net/ethernet/airoha/airoha_eth.c

468

FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));

drivers/net/ethernet/airoha/airoha_eth.c

474

FIELD_PREP(GDM_SPORT_OFF2_MASK, 8) |

drivers/net/ethernet/airoha/airoha_eth.c

475

FIELD_PREP(GDM_SPORT_OFF1_MASK, 8) |

drivers/net/ethernet/airoha/airoha_eth.c

476

FIELD_PREP(GDM_SPORT_OFF0_MASK, 8));

drivers/net/ethernet/airoha/airoha_eth.c

481

FIELD_PREP(FE_DMA_GLO_L2_SPACE_MASK, 2) |

drivers/net/ethernet/airoha/airoha_eth.c

503

FIELD_PREP(CDM_OAM_QSEL_MASK, 15));

drivers/net/ethernet/airoha/airoha_eth.c

509

FIELD_PREP(IP_FRAGMENT_PORT_MASK, 6) |

drivers/net/ethernet/airoha/airoha_eth.c

510

FIELD_PREP(IP_FRAGMENT_NBQ_MASK, 3));

drivers/net/ethernet/airoha/airoha_eth.c

514

FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |

drivers/net/ethernet/airoha/airoha_eth.c

515

FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));

drivers/net/ethernet/airoha/airoha_eth.c

528

FIELD_PREP(MBI_RX_AGE_SEL_MASK, 3) |

drivers/net/ethernet/airoha/airoha_eth.c

529

FIELD_PREP(MBI_TX_AGE_SEL_MASK, 3));

drivers/net/ethernet/airoha/airoha_eth.c

566

val = FIELD_PREP(QDMA_DESC_LEN_MASK, e->dma_len);

drivers/net/ethernet/airoha/airoha_eth.c

569

val = FIELD_PREP(QDMA_DESC_NEXT_ID_MASK, q->head);

drivers/net/ethernet/airoha/airoha_eth.c

578

FIELD_PREP(RX_RING_CPU_IDX_MASK, q->head));

drivers/net/ethernet/airoha/airoha_eth.c

781

FIELD_PREP(RX_RING_SIZE_MASK, ndesc));

drivers/net/ethernet/airoha/airoha_eth.c

785

FIELD_PREP(RX_RING_THR_MASK, thr));

drivers/net/ethernet/airoha/airoha_eth.c

787

FIELD_PREP(RX_RING_DMA_IDX_MASK, q->head));

drivers/net/ethernet/airoha/airoha_eth.c

824

FIELD_PREP(RX_RING_DMA_IDX_MASK, q->tail));

drivers/net/ethernet/airoha/airoha_eth.c

95

FIELD_PREP(GDM_OCFQ_MASK, val));

drivers/net/ethernet/airoha/airoha_eth.c

97

FIELD_PREP(GDM_MCFQ_MASK, val));

drivers/net/ethernet/airoha/airoha_eth.c

975

u32 val = FIELD_PREP(QDMA_DESC_DONE_MASK, 1);

drivers/net/ethernet/airoha/airoha_eth.c

987

FIELD_PREP(TX_RING_CPU_IDX_MASK, 0));

drivers/net/ethernet/airoha/airoha_eth.c

989

FIELD_PREP(TX_RING_DMA_IDX_MASK, 0));

drivers/net/ethernet/airoha/airoha_eth.c

99

FIELD_PREP(GDM_BCFQ_MASK, val));

drivers/net/ethernet/airoha/airoha_npu.c

182

val = FIELD_PREP(MBOX_MSG_FUNC_ID, func_id) | MBOX_MSG_WAIT_RSP;

drivers/net/ethernet/airoha/airoha_ppe.c

114

FIELD_PREP(PPE_BIND_AGE0_DELTA_NON_L4, 1) |

drivers/net/ethernet/airoha/airoha_ppe.c

115

FIELD_PREP(PPE_BIND_AGE0_DELTA_UDP, 12));

drivers/net/ethernet/airoha/airoha_ppe.c

119

FIELD_PREP(PPE_BIND_AGE1_DELTA_TCP_FIN, 1) |

drivers/net/ethernet/airoha/airoha_ppe.c

120

FIELD_PREP(PPE_BIND_AGE1_DELTA_TCP, 7));

drivers/net/ethernet/airoha/airoha_ppe.c

130

FIELD_PREP(PPE_SRAM_TABLE_EN_MASK, 1) |

drivers/net/ethernet/airoha/airoha_ppe.c

131

FIELD_PREP(PPE_SRAM_HASH1_EN_MASK, 1) |

drivers/net/ethernet/airoha/airoha_ppe.c

132

FIELD_PREP(PPE_SRAM_HASH1_MODE_MASK, 1) |

drivers/net/ethernet/airoha/airoha_ppe.c

133

FIELD_PREP(PPE_DRAM_HASH1_MODE_MASK, 3));

drivers/net/ethernet/airoha/airoha_ppe.c

141

FIELD_PREP(PPE_TB_CFG_SEARCH_MISS_MASK, 3) |

drivers/net/ethernet/airoha/airoha_ppe.c

1419

FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port->id) |

drivers/net/ethernet/airoha/airoha_ppe.c

142

FIELD_PREP(PPE_TB_ENTRY_SIZE_MASK, 0) |

drivers/net/ethernet/airoha/airoha_ppe.c

1425

FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port->id) |

drivers/net/ethernet/airoha/airoha_ppe.c

1426

FIELD_PREP(PPE_UPDMEM_OFFSET_MASK, 1) |

drivers/net/ethernet/airoha/airoha_ppe.c

143

FIELD_PREP(PPE_SRAM_TB_NUM_ENTRY_MASK,

drivers/net/ethernet/airoha/airoha_ppe.c

145

FIELD_PREP(PPE_DRAM_TB_NUM_ENTRY_MASK,

drivers/net/ethernet/airoha/airoha_ppe.c

154

FIELD_PREP(FP0_EGRESS_MTU_MASK,

drivers/net/ethernet/airoha/airoha_ppe.c

156

FIELD_PREP(FP1_EGRESS_MTU_MASK,

drivers/net/ethernet/airoha/airoha_ppe.c

277

u32 qdata = FIELD_PREP(AIROHA_FOE_SHAPER_ID, 0x7f), ports_pad, val;

drivers/net/ethernet/airoha/airoha_ppe.c

284

val = FIELD_PREP(AIROHA_FOE_IB1_BIND_STATE, AIROHA_FOE_STATE_BIND) |

drivers/net/ethernet/airoha/airoha_ppe.c

285

FIELD_PREP(AIROHA_FOE_IB1_BIND_PACKET_TYPE, type) |

drivers/net/ethernet/airoha/airoha_ppe.c

286

FIELD_PREP(AIROHA_FOE_IB1_BIND_UDP, l4proto == IPPROTO_UDP) |

drivers/net/ethernet/airoha/airoha_ppe.c

287

FIELD_PREP(AIROHA_FOE_IB1_BIND_VLAN_LAYER, data->vlan.num) |

drivers/net/ethernet/airoha/airoha_ppe.c

288

FIELD_PREP(AIROHA_FOE_IB1_BIND_VPM, data->vlan.num) |

drivers/net/ethernet/airoha/airoha_ppe.c

289

FIELD_PREP(AIROHA_FOE_IB1_BIND_PPPOE, data->pppoe.num) |

drivers/net/ethernet/airoha/airoha_ppe.c

293

val = FIELD_PREP(AIROHA_FOE_IB2_PORT_AG, 0x1f);

drivers/net/ethernet/airoha/airoha_ppe.c

298

val |= FIELD_PREP(AIROHA_FOE_IB2_NBQ, info.idx) |

drivers/net/ethernet/airoha/airoha_ppe.c

299

FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT,

drivers/net/ethernet/airoha/airoha_ppe.c

301

qdata |= FIELD_PREP(AIROHA_FOE_ACTDP, info.bss);

drivers/net/ethernet/airoha/airoha_ppe.c

302

wlan_etype = FIELD_PREP(AIROHA_FOE_MAC_WDMA_BAND,

drivers/net/ethernet/airoha/airoha_ppe.c

304

FIELD_PREP(AIROHA_FOE_MAC_WDMA_WCID,

drivers/net/ethernet/airoha/airoha_ppe.c

321

val |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, pse_port) |

drivers/net/ethernet/airoha/airoha_ppe.c

329

val |= FIELD_PREP(AIROHA_FOE_IB2_NBQ,

drivers/net/ethernet/airoha/airoha_ppe.c

374

l2->src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID, smac_id) |

drivers/net/ethernet/airoha/airoha_ppe.c

375

FIELD_PREP(AIROHA_FOE_MAC_PPPOE_ID,

drivers/net/ethernet/airoha/airoha_ppe.c

591

FIELD_PREP(AIROHA_FOE_ACTDP, val);

drivers/net/ethernet/airoha/airoha_ppe.c

595

*meter |= FIELD_PREP(AIROHA_FOE_TUNNEL_MTU, val);

drivers/net/ethernet/airoha/airoha_ppe.c

600

*ib2 |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, 6) |

drivers/net/ethernet/airoha/airoha_ppe.c

601

FIELD_PREP(AIROHA_FOE_IB2_NBQ, nbq);

drivers/net/ethernet/airoha/airoha_ppe.c

619

FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |

drivers/net/ethernet/airoha/airoha_ppe.c

677

FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |

drivers/net/ethernet/airoha/airoha_ppe.c

701

e->ib1 |= FIELD_PREP(AIROHA_FOE_IB1_BIND_TIMESTAMP, ts);

drivers/net/ethernet/airoha/airoha_ppe.c

731

e->data.ib1 |= FIELD_PREP(AIROHA_FOE_IB1_BIND_STATE,

drivers/net/ethernet/airoha/airoha_ppe.c

801

hwe.ipv6.l2.src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID,

drivers/net/ethernet/amd/xgbe/xgbe-dev.c

1142

hi_mask = FIELD_PREP(XGBE_GEN_HI_MASK, mmd_data);

drivers/net/ethernet/amd/xgbe/xgbe-dev.c

1145

hi_mask = FIELD_PREP(XGBE_GEN_HI_MASK,

drivers/net/ethernet/freescale/enetc/enetc.c

344

temp_bd.l3_aux0 = FIELD_PREP(ENETC_TX_BD_L3_START,

drivers/net/ethernet/freescale/enetc/enetc.c

346

temp_bd.l3_aux1 = FIELD_PREP(ENETC_TX_BD_L3_HDR_LEN,

drivers/net/ethernet/freescale/enetc/enetc.c

348

temp_bd.l3_aux1 |= FIELD_PREP(ENETC_TX_BD_L3T,

drivers/net/ethernet/freescale/enetc/enetc.c

351

temp_bd.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T,

drivers/net/ethernet/freescale/enetc/enetc.c

354

temp_bd.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T,

drivers/net/ethernet/freescale/enetc/enetc.c

725

txbd_tmp.l3_aux0 = FIELD_PREP(ENETC_TX_BD_L3_START, lso->l3_start);

drivers/net/ethernet/freescale/enetc/enetc.c

727

txbd_tmp.l3_aux1 = FIELD_PREP(ENETC_TX_BD_L3_HDR_LEN,

drivers/net/ethernet/freescale/enetc/enetc.c

734

txbd_tmp.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T, lso->tcp ?

drivers/net/ethernet/freescale/enetc/enetc4_hw.h

196

#define PM_SINGLE_STEP_OFFSET_SET(o) FIELD_PREP(PM_SINGLE_STEP_OFFSET, o)

drivers/net/ethernet/freescale/enetc/enetc4_hw.h

21

#define SILSOSFMR0_VAL_SET(first, mid) (FIELD_PREP(SILSOSFMR0_TCP_MID_SEG, mid) | \

drivers/net/ethernet/freescale/enetc/enetc4_hw.h

22

FIELD_PREP(SILSOSFMR0_TCP_1ST_SEG, first))

drivers/net/ethernet/freescale/enetc/ntmp.c

198

cbd->req_hdr.access_method = FIELD_PREP(NTMP_ACCESS_METHOD,

drivers/net/ethernet/freescale/enetc/ntmp.c

201

cbd->req_hdr.ver_cci_rr = FIELD_PREP(NTMP_HDR_VERSION,

drivers/net/ethernet/freescale/enetc/ntmp_private.h

22

#define NTMP_LEN(req, resp) (FIELD_PREP(NTMP_REQ_LEN, (req)) | \

drivers/net/ethernet/freescale/enetc/ntmp_private.h

70

#define NTMP_TBLV_QACT(v, a) (FIELD_PREP(NTMP_TBL_VER, (v)) | \

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

301

value |= FIELD_PREP(HBG_REG_FIFO_THRSLD_FULL_M, full);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

302

value |= FIELD_PREP(HBG_REG_FIFO_THRSLD_EMPTY_M, empty);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

319

value |= FIELD_PREP(HBG_REG_CFG_FIFO_THRSLD_TX_FULL_M, full);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

320

value |= FIELD_PREP(HBG_REG_CFG_FIFO_THRSLD_TX_EMPTY_M, empty);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

324

value |= FIELD_PREP(HBG_REG_CFG_FIFO_THRSLD_RX_FULL_M, full);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

325

value |= FIELD_PREP(HBG_REG_CFG_FIFO_THRSLD_RX_EMPTY_M, empty);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

335

ctrl |= FIELD_PREP(HBG_REG_TRANSMIT_CTRL_AN_EN_B, HBG_STATUS_ENABLE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

336

ctrl |= FIELD_PREP(HBG_REG_TRANSMIT_CTRL_CRC_ADD_B, HBG_STATUS_ENABLE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

337

ctrl |= FIELD_PREP(HBG_REG_TRANSMIT_CTRL_PAD_EN_B, HBG_STATUS_ENABLE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

346

ctrl |= FIELD_PREP(HBG_REG_RX_CTRL_RX_GET_ADDR_MODE_B,

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

348

ctrl |= FIELD_PREP(HBG_REG_RX_CTRL_TIME_INF_EN_B, HBG_STATUS_DISABLE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

349

ctrl |= FIELD_PREP(HBG_REG_RX_CTRL_RXBUF_1ST_SKIP_SIZE_M, HBG_RX_SKIP1);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

350

ctrl |= FIELD_PREP(HBG_REG_RX_CTRL_RXBUF_1ST_SKIP_SIZE2_M,

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

352

ctrl |= FIELD_PREP(HBG_REG_RX_CTRL_RX_ALIGN_NUM_M, NET_IP_ALIGN);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c

353

ctrl |= FIELD_PREP(HBG_REG_RX_CTRL_PORT_NUM, priv->dev_specs.mac_id);

drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h

35

(reg_value) |= FIELD_PREP(mask, value); })

drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c

110

cmd |= FIELD_PREP(HBG_REG_MDIO_COMMAND_ST_M, HBG_MDIO_C22_MODE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c

111

cmd |= FIELD_PREP(HBG_REG_MDIO_COMMAND_AUTO_SCAN_B, HBG_STATUS_DISABLE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c

114

cmd |= FIELD_PREP(HBG_REG_MDIO_COMMAND_CLK_SEL_B, freq & 0x1);

drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c

115

cmd |= FIELD_PREP(HBG_REG_MDIO_COMMAND_CLK_SEL_EXP_B,

drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c

116

word0 |= FIELD_PREP(HBG_TX_DESC_W0_WB_B, HBG_STATUS_ENABLE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c

117

word0 |= FIELD_PREP(HBG_TX_DESC_W0_IP_OFF_M, ip_offset);

drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c

119

word0 |= FIELD_PREP(HBG_TX_DESC_W0_l3_CS_B, HBG_STATUS_ENABLE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c

120

word0 |= FIELD_PREP(HBG_TX_DESC_W0_l4_CS_B, HBG_STATUS_ENABLE);

drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c

124

tx_desc->word1 = FIELD_PREP(HBG_TX_DESC_W1_SEND_LEN_M,

drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c

28

FIELD_PREP(CMDQ_CTXT_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c

38

FIELD_PREP(CMDQ_WQE_HDR_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c

47

FIELD_PREP(CMDQ_CTRL_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c

57

FIELD_PREP(CMDQ_DB_INFO_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c

62

FIELD_PREP(CMDQ_DB_HEAD_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_csr.h

46

FIELD_PREP(HINIC3_MSI_CLR_INDIR_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c

17

FIELD_PREP(AEQ_CTRL_0_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c

23

FIELD_PREP(AEQ_CTRL_1_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c

32

FIELD_PREP(CEQ_CTRL_0_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c

36

FIELD_PREP(CEQ_CTRL_1_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c

57

FIELD_PREP(EQ_CI_SIMPLE_INDIR_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c

20

FIELD_PREP(HINIC3_DMA_ATTR_INDIR_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c

28

FIELD_PREP(HINIC3_DMA_ATTR_ENTRY_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c

53

FIELD_PREP(HINIC3_AF4_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c

63

FIELD_PREP(HINIC3_AF6_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c

69

FIELD_PREP(HINIC3_PPF_ELECTION_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c

21

FIELD_PREP(MBOX_INT_##field##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c

27

FIELD_PREP(MBOX_CTRL_##field##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c

53

((FIELD_PREP(MBOX_WB_STATUS_MASK, (wb))) != MBOX_WB_STATUS_NOT_FINISHED)

drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c

55

((FIELD_PREP(MBOX_WB_STATUS_MASK, (wb))) == \

drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h

29

FIELD_PREP(MBOX_MSG_HEADER_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h

176

FIELD_PREP(L2NIC_RSS_TYPE_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

123

FIELD_PREP(SQ_CTXT_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

128

FIELD_PREP(SQ_CTXT_MODE_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

133

FIELD_PREP(SQ_CTXT_WQ_PAGE_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

138

FIELD_PREP(SQ_CTXT_PKT_DROP_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

142

FIELD_PREP(SQ_CTXT_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

147

FIELD_PREP(SQ_CTXT_VLAN_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

159

FIELD_PREP(SQ_CTXT_PREF_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

163

FIELD_PREP(SQ_CTXT_WQ_BLOCK_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

171

FIELD_PREP(RQ_CTXT_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

176

FIELD_PREP(RQ_CTXT_CEQ_ATTR_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

182

FIELD_PREP(RQ_CTXT_WQ_PAGE_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

186

FIELD_PREP(RQ_CTXT_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

198

FIELD_PREP(RQ_CTXT_PREF_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c

202

FIELD_PREP(RQ_CTXT_WQ_BLOCK_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h

63

FIELD_PREP(DB_INFO_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_tx.h

50

FIELD_PREP(SQ_CTRL_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_tx.h

59

FIELD_PREP(SQ_CTRL_QUEUE_INFO_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_tx.h

71

FIELD_PREP(SQ_TASK_INFO0_##member##_MASK, val)

drivers/net/ethernet/huawei/hinic3/hinic3_tx.h

77

FIELD_PREP(SQ_TASK_INFO3_##member##_MASK, val)

drivers/net/ethernet/intel/e1000e/80003es2lan.c

1212

kmrnctrlsta = FIELD_PREP(E1000_KMRNCTRLSTA_OFFSET, offset) |

drivers/net/ethernet/intel/e1000e/80003es2lan.c

1247

kmrnctrlsta = FIELD_PREP(E1000_KMRNCTRLSTA_OFFSET, offset) | data;

drivers/net/ethernet/intel/e1000e/phy.c

507

kmrnctrlsta = FIELD_PREP(E1000_KMRNCTRLSTA_OFFSET, offset) |

drivers/net/ethernet/intel/e1000e/phy.c

580

kmrnctrlsta = FIELD_PREP(E1000_KMRNCTRLSTA_OFFSET, offset) | data;

drivers/net/ethernet/intel/fm10k/fm10k_pf.c

869

txqctl = FIELD_PREP(FM10K_TXQCTL_VID_MASK, vf_vid);

drivers/net/ethernet/intel/i40e/i40e_common.c

205

vsi_id = FIELD_PREP(I40E_AQC_SET_RSS_LUT_VSI_ID_MASK, vsi_id) |

drivers/net/ethernet/intel/i40e/i40e_common.c

206

FIELD_PREP(I40E_AQC_SET_RSS_LUT_VSI_VALID, 1);

drivers/net/ethernet/intel/i40e/i40e_common.c

210

flags = FIELD_PREP(I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK,

drivers/net/ethernet/intel/i40e/i40e_common.c

213

flags = FIELD_PREP(I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK,

drivers/net/ethernet/intel/i40e/i40e_common.c

286

vsi_id = FIELD_PREP(I40E_AQC_SET_RSS_KEY_VSI_ID_MASK, vsi_id) |

drivers/net/ethernet/intel/i40e/i40e_common.c

287

FIELD_PREP(I40E_AQC_SET_RSS_KEY_VSI_VALID, 1);

drivers/net/ethernet/intel/i40e/i40e_common.c

3022

cmd->type |= FIELD_PREP(I40E_AQ_LLDP_BRIDGE_TYPE_MASK, bridge_type);

drivers/net/ethernet/intel/i40e/i40e_common.c

3701

val |= FIELD_PREP(I40E_PFQF_CTL_0_PEHSIZE_MASK, settings->pe_filt_num);

drivers/net/ethernet/intel/i40e/i40e_common.c

3704

val |= FIELD_PREP(I40E_PFQF_CTL_0_PEDSIZE_MASK, settings->pe_cntx_num);

drivers/net/ethernet/intel/i40e/i40e_common.c

3708

val |= FIELD_PREP(I40E_PFQF_CTL_0_PFFCHSIZE_MASK,

drivers/net/ethernet/intel/i40e/i40e_common.c

3712

val |= FIELD_PREP(I40E_PFQF_CTL_0_PFFCDSIZE_MASK,

drivers/net/ethernet/intel/i40e/i40e_common.c

3719

val |= FIELD_PREP(I40E_PFQF_CTL_0_HASHLUTSIZE_MASK, hash_lut_size);

drivers/net/ethernet/intel/i40e/i40e_common.c

4632

FIELD_PREP(I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_MASK,

drivers/net/ethernet/intel/i40e/i40e_common.c

966

FIELD_PREP(I40E_GLGEN_GPIO_CTL_PIN_FUNC_MASK,

drivers/net/ethernet/intel/i40e/i40e_common.c

971

gpio_val |= FIELD_PREP(I40E_GLGEN_GPIO_CTL_LED_MODE_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1286

reg |= FIELD_PREP(I40E_PRTDCB_RETSC_ETS_MODE_MASK, ets_mode);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1289

reg |= FIELD_PREP(I40E_PRTDCB_RETSC_NON_ETS_MODE_MASK, non_ets_mode);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1292

reg |= FIELD_PREP(I40E_PRTDCB_RETSC_ETS_MAX_EXP_MASK, max_exponent);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1295

reg |= FIELD_PREP(I40E_PRTDCB_RETSC_LLTC_MASK, lltc_map);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1350

reg |= FIELD_PREP(I40E_PRT_SWR_PM_THR_THRESHOLD_MASK, threshold);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1355

reg |= FIELD_PREP(I40E_PRTDCB_RPPMC_RX_FIFO_SIZE_MASK, fifo_size);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1397

reg |= FIELD_PREP(I40E_PRTDCB_MFLCN_RPFCM_MASK, 1);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1398

reg |= FIELD_PREP(I40E_PRTDCB_MFLCN_RPFCE_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1406

reg |= FIELD_PREP(I40E_PRTDCB_FCCFG_TFCE_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1425

reg |= FIELD_PREP(I40E_PRTMAC_HSEC_CTL_RX_PAUSE_ENABLE_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1431

reg |= FIELD_PREP(I40E_PRTMAC_HSEC_CTL_TX_PAUSE_ENABLE_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1439

reg |= FIELD_PREP(I40E_PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1452

reg |= FIELD_PREP(I40E_PRTDCB_TC2PFC_TC2PFC_MASK, tc2pfc);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1457

reg |= FIELD_PREP(I40E_PRTDCB_RUP_NOVLANUP_MASK, first_pfc_prio);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1489

reg |= FIELD_PREP(I40E_PRTDCB_GENC_NUMTC_MASK, num_tc);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1514

reg |= FIELD_PREP(I40E_PRTDCB_RETSTCC_BWSHARE_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1516

reg |= FIELD_PREP(I40E_PRTDCB_RETSTCC_UPINTC_MODE_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1518

reg |= FIELD_PREP(I40E_PRTDCB_RETSTCC_ETSTC_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1659

reg |= FIELD_PREP(I40E_PRTRPB_SLW_SLW_MASK, new_val);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1672

reg |= FIELD_PREP(I40E_PRTRPB_SLT_SLT_TCN_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1682

reg |= FIELD_PREP(I40E_PRTRPB_DLW_DLW_TCN_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1694

reg |= FIELD_PREP(I40E_PRTRPB_SHW_SHW_MASK, new_val);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1707

reg |= FIELD_PREP(I40E_PRTRPB_SHT_SHT_TCN_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1717

reg |= FIELD_PREP(I40E_PRTRPB_DHW_DHW_TCN_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1728

reg |= FIELD_PREP(I40E_PRTRPB_DPS_DPS_TCN_MASK, new_val);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1736

reg |= FIELD_PREP(I40E_PRTRPB_SPS_SPS_MASK, new_val);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1745

reg |= FIELD_PREP(I40E_PRTRPB_SLW_SLW_MASK, new_val);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1758

reg |= FIELD_PREP(I40E_PRTRPB_SLT_SLT_TCN_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1768

reg |= FIELD_PREP(I40E_PRTRPB_DLW_DLW_TCN_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1780

reg |= FIELD_PREP(I40E_PRTRPB_SHW_SHW_MASK, new_val);

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1793

reg |= FIELD_PREP(I40E_PRTRPB_SHT_SHT_TCN_MASK,

drivers/net/ethernet/intel/i40e/i40e_dcb.c

1803

reg |= FIELD_PREP(I40E_PRTRPB_DHW_DHW_TCN_MASK,

drivers/net/ethernet/intel/i40e/i40e_main.c

10804

FIELD_PREP(I40E_OEM_GEN_MASK | I40E_OEM_SNAP_MASK, gen_snap) |

drivers/net/ethernet/intel/i40e/i40e_main.c

10805

FIELD_PREP(I40E_OEM_RELEASE_MASK, release);

drivers/net/ethernet/intel/i40e/i40e_main.c

3526

qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_VFVM_INDX_MASK,

drivers/net/ethernet/intel/i40e/i40e_main.c

3531

qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_VFVM_INDX_MASK,

drivers/net/ethernet/intel/i40e/i40e_main.c

3538

qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_PF_INDX_MASK, hw->pf_id);

drivers/net/ethernet/intel/i40e/i40e_txrx.c

2633

FIELD_PREP(I40E_PFINT_DYN_CTLN_ITR_INDX_MASK, itr_idx) |

drivers/net/ethernet/intel/i40e/i40e_txrx.c

2634

FIELD_PREP(I40E_PFINT_DYN_CTLN_INTERVAL_MASK, interval);

drivers/net/ethernet/intel/i40e/i40e_txrx.c

2643

FIELD_PREP(I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK,

drivers/net/ethernet/intel/i40e/i40e_txrx.c

2946

flex_ptype = FIELD_PREP(I40E_TXD_FLTR_QW0_QINDEX_MASK,

drivers/net/ethernet/intel/i40e/i40e_txrx.c

2973

FIELD_PREP(I40E_TXD_FLTR_QW1_CNTINDEX_MASK,

drivers/net/ethernet/intel/i40e/i40e_txrx.c

2977

FIELD_PREP(I40E_TXD_FLTR_QW1_CNTINDEX_MASK,

drivers/net/ethernet/intel/i40e/i40e_txrx.c

38

flex_ptype = FIELD_PREP(I40E_TXD_FLTR_QW0_QINDEX_MASK, fdata->q_index);

drivers/net/ethernet/intel/i40e/i40e_txrx.c

40

flex_ptype |= FIELD_PREP(I40E_TXD_FLTR_QW0_FLEXOFF_MASK,

drivers/net/ethernet/intel/i40e/i40e_txrx.c

43

flex_ptype |= FIELD_PREP(I40E_TXD_FLTR_QW0_PCTYPE_MASK, fdata->pctype);

drivers/net/ethernet/intel/i40e/i40e_txrx.c

47

flex_ptype |= FIELD_PREP(I40E_TXD_FLTR_QW0_DEST_VSI_MASK, vsi_id);

drivers/net/ethernet/intel/i40e/i40e_txrx.c

57

dtype_cmd |= FIELD_PREP(I40E_TXD_FLTR_QW1_DEST_MASK, fdata->dest_ctl);

drivers/net/ethernet/intel/i40e/i40e_txrx.c

59

dtype_cmd |= FIELD_PREP(I40E_TXD_FLTR_QW1_FD_STATUS_MASK,

drivers/net/ethernet/intel/i40e/i40e_txrx.c

64

dtype_cmd |= FIELD_PREP(I40E_TXD_FLTR_QW1_CNTINDEX_MASK,

drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c

451

FIELD_PREP(I40E_QINT_RQCTL_ITR_INDX_MASK, itr_idx);

drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c

691

qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_PF_INDX_MASK, hw->pf_id);

drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c

692

qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_VFVM_INDX_MASK,

drivers/net/ethernet/intel/iavf/iavf_common.c

288

vsi_id = FIELD_PREP(IAVF_AQC_SET_RSS_LUT_VSI_ID_MASK, vsi_id) |

drivers/net/ethernet/intel/iavf/iavf_common.c

289

FIELD_PREP(IAVF_AQC_SET_RSS_LUT_VSI_VALID, 1);

drivers/net/ethernet/intel/iavf/iavf_common.c

293

flags = FIELD_PREP(IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_MASK,

drivers/net/ethernet/intel/iavf/iavf_common.c

296

flags = FIELD_PREP(IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_MASK,

drivers/net/ethernet/intel/iavf/iavf_common.c

354

vsi_id = FIELD_PREP(IAVF_AQC_SET_RSS_KEY_VSI_ID_MASK, vsi_id) |

drivers/net/ethernet/intel/iavf/iavf_common.c

355

FIELD_PREP(IAVF_AQC_SET_RSS_KEY_VSI_VALID, 1);

drivers/net/ethernet/intel/iavf/iavf_fdir.c

361

iph->flow_lbl[0] = FIELD_PREP(0xF0, fltr->ip_data.tclass);

drivers/net/ethernet/intel/ice/ice_base.c

1244

itr_idx = FIELD_PREP(QINT_TQCTL_ITR_INDX_M, itr_idx);

drivers/net/ethernet/intel/ice/ice_base.c

1247

FIELD_PREP(QINT_TQCTL_MSIX_INDX_M, msix_idx);

drivers/net/ethernet/intel/ice/ice_base.c

1276

itr_idx = FIELD_PREP(QINT_RQCTL_ITR_INDX_M, itr_idx);

drivers/net/ethernet/intel/ice/ice_base.c

1279

FIELD_PREP(QINT_RQCTL_MSIX_INDX_M, msix_idx);

drivers/net/ethernet/intel/ice/ice_base.c

235

regval = FIELD_PREP(GLINT_CTL_ITR_GRAN_200_M, ICE_ITR_GRAN_US) |

drivers/net/ethernet/intel/ice/ice_base.c

236

FIELD_PREP(GLINT_CTL_ITR_GRAN_100_M, ICE_ITR_GRAN_US) |

drivers/net/ethernet/intel/ice/ice_base.c

237

FIELD_PREP(GLINT_CTL_ITR_GRAN_50_M, ICE_ITR_GRAN_US) |

drivers/net/ethernet/intel/ice/ice_base.c

238

FIELD_PREP(GLINT_CTL_ITR_GRAN_25_M, ICE_ITR_GRAN_US);

drivers/net/ethernet/intel/ice/ice_common.c

1584

reg = FIELD_PREP(GLCOMM_QTX_CNTX_CTL_CMD_M,

drivers/net/ethernet/intel/ice/ice_common.c

1586

FIELD_PREP(GLCOMM_QTX_CNTX_CTL_QUEUE_ID_M,

drivers/net/ethernet/intel/ice/ice_common.c

1625

reg = FIELD_PREP(GLCOMM_QTX_CNTX_CTL_CMD_M,

drivers/net/ethernet/intel/ice/ice_common.c

1627

FIELD_PREP(GLCOMM_QTX_CNTX_CTL_QUEUE_ID_M,

drivers/net/ethernet/intel/ice/ice_common.c

4440

i2c_bus_addr = FIELD_PREP(ICE_AQC_SFF_I2CBUS_7BIT_M, bus_addr >> 1) |

drivers/net/ethernet/intel/ice/ice_common.c

4441

FIELD_PREP(ICE_AQC_SFF_SET_EEPROM_PAGE_M, set_page);

drivers/net/ethernet/intel/ice/ice_common.c

4520

glob_lut_idx = FIELD_PREP(ICE_AQC_LUT_GLOBAL_IDX,

drivers/net/ethernet/intel/ice/ice_common.c

469

FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_TYPE_M, node_type) |

drivers/net/ethernet/intel/ice/ice_common.c

470

FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M, ctx);

drivers/net/ethernet/intel/ice/ice_common.c

4717

vmvf_and_timeout = FIELD_PREP(ICE_AQC_Q_DIS_TIMEOUT_M, 5);

drivers/net/ethernet/intel/ice/ice_common.c

4811

cmd->port_num_chng |= FIELD_PREP(ICE_AQC_Q_CFG_DST_PRT_M, newport);

drivers/net/ethernet/intel/ice/ice_common.c

4812

cmd->port_num_chng |= FIELD_PREP(ICE_AQC_Q_CFG_MODE_M,

drivers/net/ethernet/intel/ice/ice_common.c

4814

cmd->time_out = FIELD_PREP(ICE_AQC_Q_CFG_TIMEOUT_M, 5);

drivers/net/ethernet/intel/ice/ice_common.c

6111

FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M,

drivers/net/ethernet/intel/ice/ice_dcb.c

38

cmd->type |= FIELD_PREP(ICE_AQ_LLDP_BRID_TYPE_M, bridge_type);

drivers/net/ethernet/intel/ice/ice_dcb.c

76

cmd->command |= FIELD_PREP(ICE_AQ_LLDP_MIB_PENDING_M,

drivers/net/ethernet/intel/ice/ice_dcb_lib.c

942

first->vid |= FIELD_PREP(VLAN_PRIO_MASK, skb->priority);

drivers/net/ethernet/intel/ice/ice_eswitch.c

257

dst_vsi = FIELD_PREP(ICE_TXD_CTX_QW1_VSI_M,

drivers/net/ethernet/intel/ice/ice_fdir.c

614

qword = FIELD_PREP(ICE_FXD_FLTR_QW0_QINDEX_M, ctx->qindex);

drivers/net/ethernet/intel/ice/ice_fdir.c

615

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_COMP_Q_M, ctx->comp_q);

drivers/net/ethernet/intel/ice/ice_fdir.c

616

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_COMP_REPORT_M, ctx->comp_report);

drivers/net/ethernet/intel/ice/ice_fdir.c

617

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_FD_SPACE_M, ctx->fd_space);

drivers/net/ethernet/intel/ice/ice_fdir.c

618

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_STAT_CNT_M, ctx->cnt_index);

drivers/net/ethernet/intel/ice/ice_fdir.c

619

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_STAT_ENA_M, ctx->cnt_ena);

drivers/net/ethernet/intel/ice/ice_fdir.c

620

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_EVICT_ENA_M, ctx->evict_ena);

drivers/net/ethernet/intel/ice/ice_fdir.c

621

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_TO_Q_M, ctx->toq);

drivers/net/ethernet/intel/ice/ice_fdir.c

622

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_TO_Q_PRI_M, ctx->toq_prio);

drivers/net/ethernet/intel/ice/ice_fdir.c

623

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_DPU_RECIPE_M, ctx->dpu_recipe);

drivers/net/ethernet/intel/ice/ice_fdir.c

624

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_DROP_M, ctx->drop);

drivers/net/ethernet/intel/ice/ice_fdir.c

625

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_FLEX_PRI_M, ctx->flex_prio);

drivers/net/ethernet/intel/ice/ice_fdir.c

626

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_FLEX_MDID_M, ctx->flex_mdid);

drivers/net/ethernet/intel/ice/ice_fdir.c

627

qword |= FIELD_PREP(ICE_FXD_FLTR_QW0_FLEX_VAL_M, ctx->flex_val);

drivers/net/ethernet/intel/ice/ice_fdir.c

631

qword = FIELD_PREP(ICE_FXD_FLTR_QW1_DTYPE_M, ctx->dtype);

drivers/net/ethernet/intel/ice/ice_fdir.c

632

qword |= FIELD_PREP(ICE_FXD_FLTR_QW1_PCMD_M, ctx->pcmd);

drivers/net/ethernet/intel/ice/ice_fdir.c

633

qword |= FIELD_PREP(ICE_FXD_FLTR_QW1_PROF_PRI_M, ctx->desc_prof_prio);

drivers/net/ethernet/intel/ice/ice_fdir.c

634

qword |= FIELD_PREP(ICE_FXD_FLTR_QW1_PROF_M, ctx->desc_prof);

drivers/net/ethernet/intel/ice/ice_fdir.c

635

qword |= FIELD_PREP(ICE_FXD_FLTR_QW1_FD_VSI_M, ctx->fd_vsi);

drivers/net/ethernet/intel/ice/ice_fdir.c

636

qword |= FIELD_PREP(ICE_FXD_FLTR_QW1_SWAP_M, ctx->swap);

drivers/net/ethernet/intel/ice/ice_fdir.c

637

qword |= FIELD_PREP(ICE_FXD_FLTR_QW1_FDID_PRI_M, ctx->fdid_prio);

drivers/net/ethernet/intel/ice/ice_fdir.c

638

qword |= FIELD_PREP(ICE_FXD_FLTR_QW1_FDID_MDID_M, ctx->fdid_mdid);

drivers/net/ethernet/intel/ice/ice_fdir.c

639

qword |= FIELD_PREP(ICE_FXD_FLTR_QW1_FDID_M, ctx->fdid);

drivers/net/ethernet/intel/ice/ice_flex_pipe.c

1413

val = FIELD_PREP(GLQF_HMASK_MSK_INDEX_M, idx);

drivers/net/ethernet/intel/ice/ice_flex_pipe.c

1414

val |= FIELD_PREP(GLQF_HMASK_MASK_M, mask);

drivers/net/ethernet/intel/ice/ice_flex_pipe.c

1418

val = FIELD_PREP(GLQF_FDMASK_MSK_INDEX_M, idx);

drivers/net/ethernet/intel/ice/ice_flex_pipe.c

1419

val |= FIELD_PREP(GLQF_FDMASK_MASK_M, mask);

drivers/net/ethernet/intel/ice/ice_gnss.c

107

FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M,

drivers/net/ethernet/intel/ice/ice_gnss.c

30

FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M,

drivers/net/ethernet/intel/ice/ice_lag.c

259

act |= FIELD_PREP(ICE_SINGLE_ACT_VSI_ID_M, vsi_num);

drivers/net/ethernet/intel/ice/ice_lag.c

407

FIELD_PREP(ICE_SINGLE_ACT_VSI_ID_M,

drivers/net/ethernet/intel/ice/ice_lib.c

1054

qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset);

drivers/net/ethernet/intel/ice/ice_lib.c

1055

qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);

drivers/net/ethernet/intel/ice/ice_lib.c

1138

val = FIELD_PREP(ICE_AQ_VSI_FD_DEF_Q_M, dflt_q);

drivers/net/ethernet/intel/ice/ice_lib.c

1140

val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_GRP_M, dflt_q_group);

drivers/net/ethernet/intel/ice/ice_lib.c

1143

val = FIELD_PREP(ICE_AQ_VSI_FD_REPORT_Q_M, report_q);

drivers/net/ethernet/intel/ice/ice_lib.c

1145

val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_PRIORITY_M, dflt_q_prio);

drivers/net/ethernet/intel/ice/ice_lib.c

1184

FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) |

drivers/net/ethernet/intel/ice/ice_lib.c

1185

FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hash_type);

drivers/net/ethernet/intel/ice/ice_lib.c

1198

qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset);

drivers/net/ethernet/intel/ice/ice_lib.c

1199

qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);

drivers/net/ethernet/intel/ice/ice_lib.c

1794

regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_IDX_M, rxdid);

drivers/net/ethernet/intel/ice/ice_lib.c

1795

regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_PRIO_M, prio);

drivers/net/ethernet/intel/ice/ice_lib.c

3281

qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, tc0_offset);

drivers/net/ethernet/intel/ice/ice_lib.c

3282

qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);

drivers/net/ethernet/intel/ice/ice_lib.c

959

ctxt->info.inner_vlan_flags = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_TX_MODE_M,

drivers/net/ethernet/intel/ice/ice_lib.c

968

FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M,

drivers/net/ethernet/intel/ice/ice_lib.c

971

FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M,

drivers/net/ethernet/intel/ice/ice_lib.c

974

FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M,

drivers/net/ethernet/intel/ice/ice_lib.c

977

FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M,

drivers/net/ethernet/intel/ice/ice_main.c

8112

FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hfunc);

drivers/net/ethernet/intel/ice/ice_ptp.c

1559

gpio_reg = FIELD_PREP(GLGEN_GPIO_CTL_PIN_FUNC_M,

drivers/net/ethernet/intel/ice/ice_ptp.c

1673

val |= FIELD_PREP(GLGEN_GPIO_CTL_PIN_FUNC_M,

drivers/net/ethernet/intel/ice/ice_ptp.c

415

REG_LL_PROXY_H_TS_INTR_ENA | FIELD_PREP(REG_LL_PROXY_H_TS_IDX, idx) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1064

*tstamp = FIELD_PREP(PHY_40B_HIGH_M, hi) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1065

FIELD_PREP(PHY_40B_LOW_M, lo);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1487

val |= FIELD_PREP(PHY_GPCS_CONFIG_REG0_TX_THR_M,

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1558

val = FIELD_PREP(PHY_PTP_1STEP_PD_DELAY_M, peer_delay);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1588

val |= FIELD_PREP(PHY_MAC_XIF_1STEP_ENA_M, enable) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1589

FIELD_PREP(PHY_MAC_XIF_TS_BIN_MODE_M, enable) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1590

FIELD_PREP(PHY_MAC_XIF_TS_SFD_ENA_M, sfd_ena);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1704

deskew_i = FIELD_PREP(ICE_ETH56G_MAC_CFG_RX_OFFSET_INT, deskew_i);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1809

val = FIELD_PREP(PHY_MAC_TSU_CFG_TX_MODE_M,

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1811

FIELD_PREP(PHY_MAC_TSU_CFG_TX_MII_MK_DLY_M, cfg->tx_mk_dly) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1812

FIELD_PREP(PHY_MAC_TSU_CFG_TX_MII_CW_DLY_M,

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1815

FIELD_PREP(PHY_MAC_TSU_CFG_RX_MODE_M,

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1817

FIELD_PREP(PHY_MAC_TSU_CFG_RX_MII_MK_DLY_M,

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1819

FIELD_PREP(PHY_MAC_TSU_CFG_RX_MII_CW_DLY_M,

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1821

FIELD_PREP(PHY_MAC_TSU_CFG_BLKS_PER_CLK_M, cfg->blks_per_clk);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

1868

val |= FIELD_PREP(PHY_TS_INT_CONFIG_THRESHOLD_M, threshold);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

2674

*tstamp = FIELD_PREP(PHY_40B_HIGH_M, hi) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

2675

FIELD_PREP(PHY_40B_LOW_M, lo);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4230

val |= FIELD_PREP(Q_REG_TX_MEM_GBL_CFG_INTR_THR_M, threshold);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4342

val = FIELD_PREP(REG_LL_PROXY_H_TS_IDX, idx) | REG_LL_PROXY_H_EXEC;

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4435

*tstamp = FIELD_PREP(PHY_EXT_40B_HIGH_M, hi) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4436

FIELD_PREP(PHY_EXT_40B_LOW_M, lo);

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4575

val = FIELD_PREP(REG_LL_PROXY_H_PHY_TMR_CMD_M, REG_LL_PROXY_H_PHY_TMR_CMD_ADJ) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4576

FIELD_PREP(REG_LL_PROXY_H_PHY_TMR_IDX_M, tmr_idx) | REG_LL_PROXY_H_EXEC;

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4667

val = FIELD_PREP(REG_LL_PROXY_H_PHY_TMR_CMD_M, REG_LL_PROXY_H_PHY_TMR_CMD_FREQ) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4668

FIELD_PREP(REG_LL_PROXY_H_TS_HIGH, (u8)upper_32_bits(incval)) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4669

FIELD_PREP(REG_LL_PROXY_H_PHY_TMR_IDX_M, tmr_idx) | REG_LL_PROXY_H_EXEC;

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4994

*tstamp = FIELD_PREP(PHY_EXT_40B_HIGH_M, hi) |

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

4995

FIELD_PREP(PHY_EXT_40B_LOW_M, lo);

drivers/net/ethernet/intel/ice/ice_sched.c

3753

data->generic |= FIELD_PREP(ICE_AQC_ELEM_GENERIC_PRIO_M, priority);

drivers/net/ethernet/intel/ice/ice_sched.c

3780

data->generic |= FIELD_PREP(ICE_AQC_ELEM_GENERIC_SP_M, 0x0);

drivers/net/ethernet/intel/ice/ice_sriov.c

111

reg = FIELD_PREP(GLINT_VECT2FUNC_IS_PF_M, 1) |

drivers/net/ethernet/intel/ice/ice_sriov.c

112

FIELD_PREP(GLINT_VECT2FUNC_PF_NUM_M, hw->pf_id);

drivers/net/ethernet/intel/ice/ice_sriov.c

249

reg = FIELD_PREP(VPINT_ALLOC_FIRST_M, device_based_first_msix) |

drivers/net/ethernet/intel/ice/ice_sriov.c

250

FIELD_PREP(VPINT_ALLOC_LAST_M, device_based_last_msix) |

drivers/net/ethernet/intel/ice/ice_sriov.c

254

reg = FIELD_PREP(VPINT_ALLOC_PCI_FIRST_M, device_based_first_msix) |

drivers/net/ethernet/intel/ice/ice_sriov.c

255

FIELD_PREP(VPINT_ALLOC_PCI_LAST_M, device_based_last_msix) |

drivers/net/ethernet/intel/ice/ice_sriov.c

261

reg = FIELD_PREP(GLINT_VECT2FUNC_VF_NUM_M, device_based_vf_id) |

drivers/net/ethernet/intel/ice/ice_sriov.c

262

FIELD_PREP(GLINT_VECT2FUNC_PF_NUM_M, hw->pf_id);

drivers/net/ethernet/intel/ice/ice_sriov.c

295

reg = FIELD_PREP(VPLAN_TX_QBASE_VFFIRSTQ_M, vsi->txq_map[0]) |

drivers/net/ethernet/intel/ice/ice_sriov.c

296

FIELD_PREP(VPLAN_TX_QBASE_VFNUMQ_M, max_txq - 1);

drivers/net/ethernet/intel/ice/ice_sriov.c

311

reg = FIELD_PREP(VPLAN_RX_QBASE_VFFIRSTQ_M, vsi->rxq_map[0]) |

drivers/net/ethernet/intel/ice/ice_sriov.c

312

FIELD_PREP(VPLAN_RX_QBASE_VFNUMQ_M, max_rxq - 1);

drivers/net/ethernet/intel/ice/ice_switch.c

2187

res_type = FIELD_PREP(ICE_AQC_RES_TYPE_M, ICE_AQC_RES_TYPE_RECIPE);

drivers/net/ethernet/intel/ice/ice_switch.c

2637

act |= FIELD_PREP(ICE_SINGLE_ACT_VSI_ID_M,

drivers/net/ethernet/intel/ice/ice_switch.c

2645

act |= FIELD_PREP(ICE_SINGLE_ACT_VSI_LIST_ID_M,

drivers/net/ethernet/intel/ice/ice_switch.c

2653

act |= FIELD_PREP(ICE_SINGLE_ACT_Q_INDEX_M,

drivers/net/ethernet/intel/ice/ice_switch.c

2664

act |= FIELD_PREP(ICE_SINGLE_ACT_Q_INDEX_M,

drivers/net/ethernet/intel/ice/ice_switch.c

2666

act |= FIELD_PREP(ICE_SINGLE_ACT_Q_REGION_M, q_rgn);

drivers/net/ethernet/intel/ice/ice_switch.c

2792

act |= FIELD_PREP(ICE_LG_ACT_VSI_LIST_ID_M, id);

drivers/net/ethernet/intel/ice/ice_switch.c

2800

act |= FIELD_PREP(ICE_LG_ACT_GENERIC_VALUE_M, 1);

drivers/net/ethernet/intel/ice/ice_switch.c

2803

act = FIELD_PREP(ICE_LG_ACT_GENERIC_OFFSET_M,

drivers/net/ethernet/intel/ice/ice_switch.c

2808

act |= FIELD_PREP(ICE_LG_ACT_GENERIC_VALUE_M, sw_marker);

drivers/net/ethernet/intel/ice/ice_switch.c

2818

act |= FIELD_PREP(ICE_SINGLE_ACT_PTR_VAL_M, l_id);

drivers/net/ethernet/intel/ice/ice_switch.c

4570

buf->res_type = cpu_to_le16(FIELD_PREP(ICE_AQC_RES_TYPE_M, type) |

drivers/net/ethernet/intel/ice/ice_switch.c

4598

buf->res_type = cpu_to_le16(FIELD_PREP(ICE_AQC_RES_TYPE_M, type) |

drivers/net/ethernet/intel/ice/ice_switch.c

4629

res_type = FIELD_PREP(ICE_AQC_RES_TYPE_M, type);

drivers/net/ethernet/intel/ice/ice_switch.c

5131

FIELD_PREP(ICE_AQ_RECIPE_RESULT_DATA_M,

drivers/net/ethernet/intel/ice/ice_switch.c

5274

res_type = FIELD_PREP(ICE_AQC_RES_TYPE_M, ICE_AQC_RES_TYPE_RECIPE) |

drivers/net/ethernet/intel/ice/ice_switch.c

6163

act |= FIELD_PREP(ICE_SINGLE_ACT_VSI_ID_M,

drivers/net/ethernet/intel/ice/ice_switch.c

6169

act |= FIELD_PREP(ICE_SINGLE_ACT_Q_INDEX_M,

drivers/net/ethernet/intel/ice/ice_switch.c

6176

act |= FIELD_PREP(ICE_SINGLE_ACT_Q_INDEX_M,

drivers/net/ethernet/intel/ice/ice_switch.c

6178

act |= FIELD_PREP(ICE_SINGLE_ACT_Q_REGION_M, q_rgn);

drivers/net/ethernet/intel/ice/ice_switch.c

6186

act |= FIELD_PREP(ICE_SINGLE_ACT_VSI_ID_M,

drivers/net/ethernet/intel/ice/ice_switch.c

6190

act |= FIELD_PREP(ICE_SINGLE_ACT_VSI_ID_M,

drivers/net/ethernet/intel/ice/ice_tspll.c

214

r9 |= FIELD_PREP(ICE_CGU_R9_TIME_REF_FREQ_SEL, clk_freq);

drivers/net/ethernet/intel/ice/ice_tspll.c

225

val |= FIELD_PREP(ICE_CGU_R19_TSPLL_FBDIV_INTGR_E82X,

drivers/net/ethernet/intel/ice/ice_tspll.c

227

val |= FIELD_PREP(ICE_CGU_R19_TSPLL_NDIVRATIO, 1);

drivers/net/ethernet/intel/ice/ice_tspll.c

240

val |= FIELD_PREP(ICE_CGU_R22_TIME1588CLK_DIV,

drivers/net/ethernet/intel/ice/ice_tspll.c

254

r24 |= FIELD_PREP(ICE_CGU_R23_R24_REF1588_CK_DIV,

drivers/net/ethernet/intel/ice/ice_tspll.c

256

r24 |= FIELD_PREP(ICE_CGU_R24_FBDIV_FRAC,

drivers/net/ethernet/intel/ice/ice_tspll.c

258

r24 |= FIELD_PREP(ICE_CGU_R23_R24_TIME_REF_SEL, clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

384

r9 |= FIELD_PREP(ICE_CGU_R9_TIME_REF_FREQ_SEL, clk_freq);

drivers/net/ethernet/intel/ice/ice_tspll.c

399

val |= FIELD_PREP(ICE_CGU_R16_TSPLL_CK_REFCLKFREQ,

drivers/net/ethernet/intel/ice/ice_tspll.c

412

val |= FIELD_PREP(ICE_CGU_R19_TSPLL_FBDIV_INTGR_E825,

drivers/net/ethernet/intel/ice/ice_tspll.c

414

val |= FIELD_PREP(ICE_CGU_R19_TSPLL_NDIVRATIO,

drivers/net/ethernet/intel/ice/ice_tspll.c

428

val |= FIELD_PREP(ICE_CGU_R22_TIME1588CLK_DIV, 5);

drivers/net/ethernet/intel/ice/ice_tspll.c

440

r23 |= FIELD_PREP(ICE_CGU_R23_R24_TIME_REF_SEL, clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

528

val |= FIELD_PREP(ICE_CGU_R9_ONE_PPS_OUT_EN, enable) |

drivers/net/ethernet/intel/ice/ice_tspll.c

711

r10 |= FIELD_PREP(ICE_CGU_R10_SYNCE_S_REF_CLK, first_mux);

drivers/net/ethernet/intel/ice/ice_tspll.c

712

r10 |= FIELD_PREP(ICE_CGU_R10_SYNCE_ETHCLKO_SEL,

drivers/net/ethernet/intel/ice/ice_tspll.c

723

val |= FIELD_PREP(ICE_CGU_R11_SYNCE_S_BYP_CLK, first_mux);

drivers/net/ethernet/intel/ice/ice_tspll.c

729

r10 |= FIELD_PREP(ICE_CGU_R10_SYNCE_CLKO_SEL,

drivers/net/ethernet/intel/ice/ice_tspll.c

819

val |= FIELD_PREP(ICE_CGU_R10_SYNCE_ETHDIV_M1, divider - 1);

drivers/net/ethernet/intel/ice/ice_tspll.c

828

val |= FIELD_PREP(ICE_CGU_R10_SYNCE_CLKODIV_M1, divider - 1);

drivers/net/ethernet/intel/ice/ice_txrx.c

1250

FIELD_PREP(GLINT_DYN_CTL_ITR_INDX_M, ICE_ITR_NONE) |

drivers/net/ethernet/intel/ice/ice_txrx.c

1251

FIELD_PREP(GLINT_DYN_CTL_INTENA_MSK_M, 1) |

drivers/net/ethernet/intel/ice/ice_txrx.c

1252

FIELD_PREP(GLINT_DYN_CTL_WB_ON_ITR_M, 1));

drivers/net/ethernet/intel/ice/ice_txrx.c

1745

gcs_params = FIELD_PREP(ICE_TX_GCS_DESC_START_M, csum_start) |

drivers/net/ethernet/intel/ice/ice_txrx.c

1746

FIELD_PREP(ICE_TX_GCS_DESC_OFFSET_M, csum_offset) |

drivers/net/ethernet/intel/ice/ice_txrx.c

1747

FIELD_PREP(ICE_TX_GCS_DESC_TYPE_M,

drivers/net/ethernet/intel/ice/ice_txrx_lib.h

66

return cpu_to_le32(FIELD_PREP(ICE_TXTIME_TX_DESC_IDX_M, tx_desc) |

drivers/net/ethernet/intel/ice/ice_txrx_lib.h

67

FIELD_PREP(ICE_TXTIME_STAMP_M, tstamp));

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

156

*ivf = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M,

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

160

*ivf = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M,

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

495

FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M, tag_type);

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

600

FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M,

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

602

FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M, tag_type);

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

651

FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M,

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

710

FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M, tag_type) |

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

807

FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_TX_MODE_M,

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

811

FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M,

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

814

FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M,

drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c

817

FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M,

drivers/net/ethernet/intel/ice/virt/queues.c

157

reg = FIELD_PREP(GLCOMM_QUANTA_PROF_QUANTA_SIZE_M, quanta_size) |

drivers/net/ethernet/intel/ice/virt/queues.c

158

FIELD_PREP(GLCOMM_QUANTA_PROF_MAX_CMD_M, n_cmd) |

drivers/net/ethernet/intel/ice/virt/queues.c

159

FIELD_PREP(GLCOMM_QUANTA_PROF_MAX_DESC_M, n_desc);

drivers/net/ethernet/intel/ice/virt/rss.c

391

ctx->info.q_opt_rss |= FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M,

drivers/net/ethernet/intel/idpf/idpf_dev.c

131

FIELD_PREP(PF_GLINT_DYN_CTL_ITR_INDX_M, IDPF_NO_ITR_UPDATE_IDX);

drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c

1082

#define IDPF_RXD_ERR_S FIELD_PREP(VIRTCHNL2_RX_BASE_DESC_QW1_ERROR_M, \

drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c

389

qw1 |= FIELD_PREP(IDPF_TXD_CTX_QW1_TSO_LEN_M,

drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c

391

qw1 |= FIELD_PREP(IDPF_TXD_CTX_QW1_MSS_M, offload->mss);

drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c

42

offset = FIELD_PREP(0x3F << IDPF_TX_DESC_LEN_MACLEN_S, l2_len / 2);

drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c

91

tunnel |= FIELD_PREP(IDPF_TXD_CTX_QW0_TUNN_EXT_IPLEN_M,

drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c

98

tunnel |= FIELD_PREP(IDPF_TXD_CTX_QW0_TUNN_NATLEN_M,

drivers/net/ethernet/intel/idpf/idpf_txrx.c

244

FIELD_PREP(IDPF_RFL_BI_BUFID_M, i) |

drivers/net/ethernet/intel/idpf/idpf_txrx.c

245

FIELD_PREP(IDPF_RFL_BI_GEN_M,

drivers/net/ethernet/intel/idpf/idpf_txrx.c

586

FIELD_PREP(IDPF_RFL_BI_BUFID_M, buf_id) |

drivers/net/ethernet/intel/idpf/idpf_txrx.c

587

FIELD_PREP(IDPF_RFL_BI_GEN_M,

drivers/net/ethernet/intel/idpf/idpf_vf_dev.c

130

FIELD_PREP(VF_INT_DYN_CTLN_ITR_INDX_M, IDPF_NO_ITR_UPDATE_IDX);

drivers/net/ethernet/intel/idpf/idpf_virtchnl.c

466

cookie = FIELD_PREP(IDPF_VC_XN_SALT_M, xn->salt) |

drivers/net/ethernet/intel/idpf/idpf_virtchnl.c

467

FIELD_PREP(IDPF_VC_XN_IDX_M, xn->idx);

drivers/net/ethernet/intel/idpf/xdp.c

246

FIELD_PREP(IDPF_TXD_COMPLQ_COMPL_TYPE_M,

drivers/net/ethernet/intel/idpf/xdp.h

37

cmd = FIELD_PREP(IDPF_FLEX_TXD_QW1_DTYPE_M,

drivers/net/ethernet/intel/idpf/xdp.h

40

cmd |= FIELD_PREP(IDPF_FLEX_TXD_QW1_CMD_M,

drivers/net/ethernet/intel/idpf/xdp.h

43

cmd |= FIELD_PREP(IDPF_FLEX_TXD_QW1_CMD_M,

drivers/net/ethernet/intel/idpf/xdp.h

64

cmd = FIELD_PREP(IDPF_FLEX_TXD_QW1_CMD_M, IDPF_TX_DESC_CMD_RS);

drivers/net/ethernet/intel/igb/e1000_phy.c

258

*data = ((i2ccmd >> 8) & 0x00FF) | FIELD_PREP(0xFF00, i2ccmd);

drivers/net/ethernet/intel/igb/e1000_phy.c

285

phy_data_swapped = ((data >> 8) & 0x00FF) | FIELD_PREP(0xFF00, data);

drivers/net/ethernet/intel/igb/igb_ethtool.c

2709

etqf |= FIELD_PREP(E1000_ETQF_QUEUE_MASK, input->action);

drivers/net/ethernet/intel/igb/igb_main.c

10129

reg |= FIELD_PREP(E1000_FCRTC_RTH_COAL_MASK, hwm);

drivers/net/ethernet/intel/igb/igb_main.c

10138

reg |= FIELD_PREP(E1000_DMACR_DMACTHR_MASK, dmac_thr);

drivers/net/ethernet/intel/igb/igb_main.c

9940

bcnrc_val |= FIELD_PREP(E1000_RTTBCNRC_RF_INT_MASK, rf_int);

drivers/net/ethernet/intel/igc/igc.h

503

#define IGC_TXDCTL_PTHRESH(x) FIELD_PREP(IGC_TXDCTL_PTHRESH_MASK, (x))

drivers/net/ethernet/intel/igc/igc.h

504

#define IGC_TXDCTL_HTHRESH(x) FIELD_PREP(IGC_TXDCTL_HTHRESH_MASK, (x))

drivers/net/ethernet/intel/igc/igc.h

505

#define IGC_TXDCTL_WTHRESH(x) FIELD_PREP(IGC_TXDCTL_WTHRESH_MASK, (x))

drivers/net/ethernet/intel/igc/igc.h

507

#define IGC_TXDCTL_QUEUE_ENABLE FIELD_PREP(IGC_TXDCTL_QUEUE_ENABLE_MASK, 1)

drivers/net/ethernet/intel/igc/igc.h

509

#define IGC_TXDCTL_SWFLUSH FIELD_PREP(IGC_TXDCTL_SWFLUSH_MASK, 1)

drivers/net/ethernet/intel/igc/igc.h

510

#define IGC_TXDCTL_PRIORITY(x) FIELD_PREP(IGC_TXDCTL_PRIORITY_MASK, (x))

drivers/net/ethernet/intel/igc/igc_base.h

91

#define IGC_SRRCTL_BSIZEPKT(x) FIELD_PREP(IGC_SRRCTL_BSIZEPKT_MASK, \

drivers/net/ethernet/intel/igc/igc_base.h

94

#define IGC_SRRCTL_BSIZEHDR(x) FIELD_PREP(IGC_SRRCTL_BSIZEHDR_MASK, \

drivers/net/ethernet/intel/igc/igc_base.h

97

#define IGC_SRRCTL_DESCTYPE_ADV_ONEBUF FIELD_PREP(IGC_SRRCTL_DESCTYPE_MASK, 1)

drivers/net/ethernet/intel/igc/igc_defines.h

415

#define IGC_RXPBSIZE_EXP(x) FIELD_PREP(IGC_RXPBSIZE_EXP_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

417

#define IGC_BMC2OSPBSIZE(x) FIELD_PREP(IGC_BMC2OSPBSIZE_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

419

#define IGC_RXPBSIZE_BE(x) FIELD_PREP(IGC_RXPBSIZE_BE_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

421

#define IGC_RXPBS_CFG_TS_EN FIELD_PREP(IGC_RXPBS_CFG_TS_EN_MASK, 1)

drivers/net/ethernet/intel/igc/igc_defines.h

436

#define IGC_TXPB0SIZE(x) FIELD_PREP(IGC_TXPB0SIZE_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

437

#define IGC_TXPB1SIZE(x) FIELD_PREP(IGC_TXPB1SIZE_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

438

#define IGC_TXPB2SIZE(x) FIELD_PREP(IGC_TXPB2SIZE_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

439

#define IGC_TXPB3SIZE(x) FIELD_PREP(IGC_TXPB3SIZE_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

441

#define IGC_OS2BMCPBSIZE(x) FIELD_PREP(IGC_OS2BMCPBSIZE_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

610

#define IGC_TXARB_TXQ_PRIO_0(x) FIELD_PREP(IGC_TXARB_TXQ_PRIO_0_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

611

#define IGC_TXARB_TXQ_PRIO_1(x) FIELD_PREP(IGC_TXARB_TXQ_PRIO_1_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

612

#define IGC_TXARB_TXQ_PRIO_2(x) FIELD_PREP(IGC_TXARB_TXQ_PRIO_2_MASK, (x))

drivers/net/ethernet/intel/igc/igc_defines.h

613

#define IGC_TXARB_TXQ_PRIO_3(x) FIELD_PREP(IGC_TXARB_TXQ_PRIO_3_MASK, (x))

drivers/net/ethernet/intel/igc/igc_main.c

3650

queuing |= FIELD_PREP(IGC_FHFT_QUEUE_MASK, input->rx_queue);

drivers/net/ethernet/intel/igc/igc_main.c

3651

queuing |= FIELD_PREP(IGC_FHFT_PRIO_MASK, input->prio);

drivers/net/ethernet/intel/igc/igc_main.c

3887

mrqc |= FIELD_PREP(IGC_MRQC_DEFAULT_QUEUE_MASK, queue);

drivers/net/ethernet/intel/igc/igc_tsn.c

615

tqavctrl |= FIELD_PREP(IGC_TQAVCTRL_MIN_FRAG_MASK, frag_size_mult);

drivers/net/ethernet/intel/igc/igc_tsn.c

69

olinfo_status |= FIELD_PREP(IGC_ADVTXD_PAYLEN_MASK, buffer->bytecount);

drivers/net/ethernet/intel/igc/igc_tsn.c

74

olinfo_status |= FIELD_PREP(IGC_TXD_POPTS_SMD_MASK, type);

drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c

798

rar_high |= FIELD_PREP(IXGBE_RAH_VIND_MASK, vmdq);

drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c

1163

FIELD_PREP(IXGBE_ACI_LINK_TOPO_NODE_CTX_M,

drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c

1168

FIELD_PREP(IXGBE_ACI_LINK_TOPO_NODE_TYPE_M,

drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c

673

fcoe_q_h = FIELD_PREP(IXGBE_FCRETA_ENTRY_HIGH_MASK,

drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c

1294

FIELD_PREP(IXGBE_ADVTXD_DTYP_MASK, IXGBE_ADVTXD_DTYP_CTXT);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

6759

FIELD_PREP(MVPP2_GMAC_LPI_CTRL0_TS_MASK, ts));

drivers/net/ethernet/marvell/octeon_ep/octep_regs_cn9k_pf.h

403

pem_addr_bits = FIELD_PREP(CN9K_PEM_GENMASK, pem);

drivers/net/ethernet/marvell/octeon_ep/octep_regs_cn9k_pf.h

404

pf_addr_bits = FIELD_PREP(CN9K_PF_GENMASK, pf);

drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h

185

FIELD_PREP((m), (y)))

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

1406

cfg |= FIELD_PREP(MCSX_LINK_LMAC_RANGE_MASK, ilog2(16));

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

1407

cfg |= FIELD_PREP(MCSX_LINK_LMAC_BASE_MASK, base);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

376

cfg |= FIELD_PREP(LBK_LINK_CFG_RANGE_MASK, ilog2(chans));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

377

cfg |= FIELD_PREP(LBK_LINK_CFG_ID_MASK, lbkid);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

378

cfg |= FIELD_PREP(LBK_LINK_CFG_BASE_MASK, hw->lbk_chan_base);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

46

cfg = FIELD_PREP(LMT_MAP_ENTRY_ENA, 0x1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

470

cfg |= FIELD_PREP(NIX_AF_LINKX_RANGE_MASK, ilog2(cgx_chans));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

471

cfg |= FIELD_PREP(NIX_AF_LINKX_BASE_MASK, start);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

48

cfg |= FIELD_PREP(LMT_MAP_ENTRY_LINES, 0x6);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

480

cfg |= FIELD_PREP(NIX_AF_LINKX_RANGE_MASK, ilog2(lbk_chans));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

481

cfg |= FIELD_PREP(NIX_AF_LINKX_BASE_MASK, start);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

490

cfg |= FIELD_PREP(NIX_AF_LINKX_RANGE_MASK, ilog2(sdp_chans));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

491

cfg |= FIELD_PREP(NIX_AF_LINKX_BASE_MASK, start);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

500

cfg |= FIELD_PREP(NIX_AF_LINKX_RANGE_MASK, ilog2(cpt_chans));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

501

cfg |= FIELD_PREP(NIX_AF_LINKX_BASE_MASK, start);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

528

cfg |= FIELD_PREP(RPMX_CMRX_LINK_RANGE_MASK, ilog2(16));

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

529

cfg |= FIELD_PREP(RPMX_CMRX_LINK_BASE_MASK, base);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

582

reg |= FIELD_PREP(LMTST_THROTTLE_MASK, LMTST_WR_PEND_MAX);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

1311

reg_val |= FIELD_PREP(MAX_RXC_ICB_CNT,

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

915

dfrg_reg = FIELD_PREP(RXC_ZOMBIE_THRES, req->zombie_thres);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

916

dfrg_reg |= FIELD_PREP(RXC_ZOMBIE_LIMIT, req->zombie_limit);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

917

dfrg_reg |= FIELD_PREP(RXC_ACTIVE_THRES, req->active_thres);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

918

dfrg_reg |= FIELD_PREP(RXC_ACTIVE_LIMIT, req->active_limit);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

4786

cfg |= FIELD_PREP(NIX_AF_LINKX_MCS_CNT_MASK, nix_hw->cc_mcs_cnt);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5519

val |= FIELD_PREP(IPSEC_GEN_CFG_EGRP, req->gen_cfg.egrp);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5520

val |= FIELD_PREP(IPSEC_GEN_CFG_OPCODE, req->gen_cfg.opcode);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5521

val |= FIELD_PREP(IPSEC_GEN_CFG_PARAM1, req->gen_cfg.param1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5522

val |= FIELD_PREP(IPSEC_GEN_CFG_PARAM2, req->gen_cfg.param2);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5527

val = FIELD_PREP(CPT_INST_QSEL_SLOT, req->inst_qsel.cpt_slot);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5528

val |= FIELD_PREP(CPT_INST_QSEL_PF_FUNC,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5534

val |= FIELD_PREP(CPT_INST_QSEL_BLOCK, cpt_blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5546

val = FIELD_PREP(CPT_INST_CREDIT_CNT, req->cpt_credit);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5547

val |= FIELD_PREP(CPT_INST_CREDIT_BPID, req->bpid);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5548

val |= FIELD_PREP(CPT_INST_CREDIT_TH, req->credit_th);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

5867

prof_idx = FIELD_PREP(NIX_BW_PROF_HI_MASK, req->prof.band_prof_id_h);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6078

leaf_prof = FIELD_PREP(NIX_RQ_PROF_HI_MASK, aq_rsp.rq.band_prof_id_h);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6117

mid_prof = FIELD_PREP(NIX_BW_PROF_HI_MASK,

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

6242

mid_prof = FIELD_PREP(NIX_BW_PROF_HI_MASK, aq_rsp.prof.band_prof_id_h);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

115

val |= FIELD_PREP(NPC_AF_ACTION0_PTR_ADVANCE,

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

2037

tx_kex |= FIELD_PREP(NPC_PARSE_NIBBLE, nibble_ena);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1181

entry->vtag_action = FIELD_PREP(RX_VTAG0_VALID_BIT, req->vtag0_valid) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1182

FIELD_PREP(RX_VTAG0_TYPE_MASK, req->vtag0_type) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1183

FIELD_PREP(RX_VTAG0_LID_MASK, NPC_LID_LB) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1184

FIELD_PREP(RX_VTAG0_RELPTR_MASK, 0) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1185

FIELD_PREP(RX_VTAG1_VALID_BIT, req->vtag1_valid) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1186

FIELD_PREP(RX_VTAG1_TYPE_MASK, req->vtag1_type) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1187

FIELD_PREP(RX_VTAG1_LID_MASK, NPC_LID_LB) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1188

FIELD_PREP(RX_VTAG1_RELPTR_MASK, 4);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1225

entry->vtag_action = FIELD_PREP(TX_VTAG0_DEF_MASK, req->vtag0_def) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1226

FIELD_PREP(TX_VTAG0_OP_MASK, req->vtag0_op) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1227

FIELD_PREP(TX_VTAG0_LID_MASK, NPC_LID_LA) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1228

FIELD_PREP(TX_VTAG0_RELPTR_MASK, 20) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1229

FIELD_PREP(TX_VTAG1_DEF_MASK, req->vtag1_def) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1230

FIELD_PREP(TX_VTAG1_OP_MASK, req->vtag1_op) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1231

FIELD_PREP(TX_VTAG1_LID_MASK, NPC_LID_LA) |

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

1232

FIELD_PREP(TX_VTAG1_RELPTR_MASK, 24);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

594

u64 mdata = FIELD_PREP(GENMASK_ULL(63, 63), enable ? 1 : 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

597

mdata |= FIELD_PREP(GENMASK_ULL(61, 60), ctype);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

600

mdata |= FIELD_PREP(GENMASK_ULL(59, 48), chan);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

603

mdata |= FIELD_PREP(GENMASK_ULL(47, 0), ldata);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

639

reg_val = FIELD_PREP(GENMASK_ULL(39, 32), 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

642

reg_val |= FIELD_PREP(GENMASK_ULL(18, 16), ETH_ALEN - 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

645

reg_val |= FIELD_PREP(GENMASK_ULL(11, 11), 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

646

reg_val |= FIELD_PREP(GENMASK_ULL(10, 8), NPC_LID_LA);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

651

reg_val |= FIELD_PREP(GENMASK_ULL(12, 12), 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

654

reg_val |= FIELD_PREP(GENMASK_ULL(7, 4), 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

657

reg_val |= FIELD_PREP(GENMASK_ULL(3, 0), 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

678

reg |= FIELD_PREP(GENMASK_ULL(42, 32), (depth - 1));

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

682

reg |= FIELD_PREP(GENMASK_ULL(10, 0), 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c

701

mask |= FIELD_PREP(GENMASK_ULL(61, 60), 0);

drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c

207

req.tx.vtag0 = FIELD_PREP(NIX_VLAN_ETYPE_MASK, etype) | vlan_tci;

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

284

reg_val = FIELD_PREP(CPT_LF_Q_SIZE_DIV40, CN10K_CPT_SIZE_DIV40 +

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

484

reg_val = FIELD_PREP(CPT_LF_CTX_FLUSH_CPTR, sa_iova >> 7);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

274

policy = FIELD_PREP(MCS_RX_SECY_PLCY_RW_MASK, secy->replay_window);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

293

policy |= FIELD_PREP(MCS_RX_SECY_PLCY_CIP, cipher);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

294

policy |= FIELD_PREP(MCS_RX_SECY_PLCY_VAL, secy->validate_frames);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

329

req->data[0] = FIELD_PREP(MCS_TCAM0_MAC_DA_MASK, mac_da);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

333

req->data[1] = FIELD_PREP(MCS_TCAM1_ETYPE_MASK, ETH_P_MACSEC);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

534

policy = FIELD_PREP(MCS_TX_SECY_PLCY_MTU,

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

537

policy |= FIELD_PREP(MCS_TX_SECY_PLCY_ST_TCI, sectag_tci >> 2);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

538

policy |= FIELD_PREP(MCS_TX_SECY_PLCY_ST_OFFSET, tag_offset);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

555

policy |= FIELD_PREP(MCS_TX_SECY_PLCY_CIP, cipher);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

597

req->data[0] = FIELD_PREP(MCS_TCAM0_MAC_SA_MASK, mac_sa);

drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c

598

req->data[1] = FIELD_PREP(MCS_TCAM1_MAC_SA_MASK, mac_sa >> 16);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c

649

req->regval[0] |= FIELD_PREP(GENMASK_ULL(58, 57),

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

134

regval = FIELD_PREP(TLX_BURST_EXPONENT, (u64)burst_exp) |

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

135

FIELD_PREP(TLX_BURST_MANTISSA, (u64)burst_mantissa) |

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

136

FIELD_PREP(TLX_RATE_DIVIDER_EXPONENT, div_exp) |

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

137

FIELD_PREP(TLX_RATE_EXPONENT, exp) |

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

138

FIELD_PREP(TLX_RATE_MANTISSA, mantissa) | BIT_ULL(0);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

140

regval = FIELD_PREP(CN10K_TLX_BURST_EXPONENT, (u64)burst_exp) |

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

141

FIELD_PREP(CN10K_TLX_BURST_MANTISSA, (u64)burst_mantissa) |

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

142

FIELD_PREP(TLX_RATE_DIVIDER_EXPONENT, div_exp) |

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

143

FIELD_PREP(TLX_RATE_EXPONENT, exp) |

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

144

FIELD_PREP(TLX_RATE_MANTISSA, mantissa) | BIT_ULL(0);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

914

FIELD_PREP(OTX2_FLOWER_MASK_MPLS_LB,

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

916

FIELD_PREP(OTX2_FLOWER_MASK_MPLS_TC,

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

918

FIELD_PREP(OTX2_FLOWER_MASK_MPLS_BOS,

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

922

FIELD_PREP(OTX2_FLOWER_MASK_MPLS_LB,

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

924

FIELD_PREP(OTX2_FLOWER_MASK_MPLS_TC,

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

926

FIELD_PREP(OTX2_FLOWER_MASK_MPLS_BOS,

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

934

FIELD_PREP(OTX2_FLOWER_MASK_MPLS_TTL,

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c

937

FIELD_PREP(OTX2_FLOWER_MASK_MPLS_TTL,

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

67

dsa->vlan.vid |= FIELD_PREP(PRESTERA_DSA_VID, field);

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

72

dsa->hw_dev_num |= FIELD_PREP(PRESTERA_DSA_DEV_NUM, field);

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

89

words[0] |= FIELD_PREP(PRESTERA_DSA_W0_CMD, PRESTERA_DSA_CMD_FROM_CPU);

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

91

words[0] |= FIELD_PREP(PRESTERA_DSA_W0_DEV_NUM, dev_num);

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

93

words[3] |= FIELD_PREP(PRESTERA_DSA_W3_DEV_NUM, dev_num);

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

95

words[3] |= FIELD_PREP(PRESTERA_DSA_W3_DST_EPORT, dsa->port_num);

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

97

words[0] |= FIELD_PREP(PRESTERA_DSA_W0_EXT_BIT, 1);

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

98

words[1] |= FIELD_PREP(PRESTERA_DSA_W1_EXT_BIT, 1);

drivers/net/ethernet/marvell/prestera/prestera_dsa.c

99

words[2] |= FIELD_PREP(PRESTERA_DSA_W2_EXT_BIT, 1);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

1473

FIELD_PREP(TX_DMA_PQID, info->qid);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

2716

FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

2717

FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

752

FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

753

FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

762

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 103) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

763

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 2) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

764

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 1);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

768

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 103) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

769

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 3) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

770

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 1);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

774

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 105) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

775

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 4) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

776

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 10);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

785

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 1) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

786

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 4) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

787

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 1);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

791

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 1) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

792

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 5) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

793

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 1);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

797

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 1) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

798

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 6) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

799

FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 10);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

929

val = FIELD_PREP(MAC_EEE_LPI_TXIDLE_THD, timer);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

939

val |= FIELD_PREP(MAC_EEE_WAKEUP_TIME_1000, 17) |

drivers/net/ethernet/mediatek/mtk_eth_soc.c

940

FIELD_PREP(MAC_EEE_WAKEUP_TIME_100, 36);

drivers/net/ethernet/mediatek/mtk_eth_soc.c

964

val = FIELD_PREP(PPSC_MDC_CFG, eth->mdc_divider);

drivers/net/ethernet/mediatek/mtk_eth_soc.h

1444

return FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER_V2, val);

drivers/net/ethernet/mediatek/mtk_eth_soc.h

1446

return FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, val);

drivers/net/ethernet/mediatek/mtk_eth_soc.h

349

# define TX_DMA_PREP_ADDR64(x) FIELD_PREP(TX_DMA_ADDR64_MASK, ((x) >> 32))

drivers/net/ethernet/mediatek/mtk_eth_soc.h

369

# define RX_DMA_PREP_ADDR64(x) FIELD_PREP(RX_DMA_ADDR64_MASK, ((x) >> 32))

drivers/net/ethernet/mediatek/mtk_eth_soc.h

414

#define PHY_IAC_REG(x) FIELD_PREP(PHY_IAC_REG_MASK, (x))

drivers/net/ethernet/mediatek/mtk_eth_soc.h

416

#define PHY_IAC_ADDR(x) FIELD_PREP(PHY_IAC_ADDR_MASK, (x))

drivers/net/ethernet/mediatek/mtk_eth_soc.h

418

#define PHY_IAC_CMD_C45_ADDR FIELD_PREP(PHY_IAC_CMD_MASK, 0)

drivers/net/ethernet/mediatek/mtk_eth_soc.h

419

#define PHY_IAC_CMD_WRITE FIELD_PREP(PHY_IAC_CMD_MASK, 1)

drivers/net/ethernet/mediatek/mtk_eth_soc.h

420

#define PHY_IAC_CMD_C22_READ FIELD_PREP(PHY_IAC_CMD_MASK, 2)

drivers/net/ethernet/mediatek/mtk_eth_soc.h

421

#define PHY_IAC_CMD_C45_READ FIELD_PREP(PHY_IAC_CMD_MASK, 3)

drivers/net/ethernet/mediatek/mtk_eth_soc.h

423

#define PHY_IAC_START_C45 FIELD_PREP(PHY_IAC_START_MASK, 0)

drivers/net/ethernet/mediatek/mtk_eth_soc.h

424

#define PHY_IAC_START_C22 FIELD_PREP(PHY_IAC_START_MASK, 1)

drivers/net/ethernet/mediatek/mtk_eth_soc.h

426

#define PHY_IAC_DATA(x) FIELD_PREP(PHY_IAC_DATA_MASK, (x))

drivers/net/ethernet/mediatek/mtk_ppe.c

101

val = FIELD_PREP(MTK_PPE_MIB_SER_CR_ADDR, index) | MTK_PPE_MIB_SER_CR_ST;

drivers/net/ethernet/mediatek/mtk_ppe.c

1028

val = FIELD_PREP(MTK_PPE_UNBIND_AGE_MIN_PACKETS, 1000) |

drivers/net/ethernet/mediatek/mtk_ppe.c

1029

FIELD_PREP(MTK_PPE_UNBIND_AGE_DELTA, 3);

drivers/net/ethernet/mediatek/mtk_ppe.c

1032

val = FIELD_PREP(MTK_PPE_BIND_AGE0_DELTA_UDP, 12) |

drivers/net/ethernet/mediatek/mtk_ppe.c

1033

FIELD_PREP(MTK_PPE_BIND_AGE0_DELTA_NON_L4, 1);

drivers/net/ethernet/mediatek/mtk_ppe.c

1036

val = FIELD_PREP(MTK_PPE_BIND_AGE1_DELTA_TCP_FIN, 1) |

drivers/net/ethernet/mediatek/mtk_ppe.c

1037

FIELD_PREP(MTK_PPE_BIND_AGE1_DELTA_TCP, 7);

drivers/net/ethernet/mediatek/mtk_ppe.c

1044

FIELD_PREP(MTK_PPE_BIND_LIMIT1_NON_L4, 1);

drivers/net/ethernet/mediatek/mtk_ppe.c

1047

val = FIELD_PREP(MTK_PPE_BIND_RATE_BIND, 30) |

drivers/net/ethernet/mediatek/mtk_ppe.c

1048

FIELD_PREP(MTK_PPE_BIND_RATE_PREBIND, 1);

drivers/net/ethernet/mediatek/mtk_ppe.c

1087

hwe->ib1 = FIELD_PREP(MTK_FOE_IB1_STATE,

drivers/net/ethernet/mediatek/mtk_ppe.c

222

val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) |

drivers/net/ethernet/mediatek/mtk_ppe.c

223

FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE_V2, type) |

drivers/net/ethernet/mediatek/mtk_ppe.c

224

FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) |

drivers/net/ethernet/mediatek/mtk_ppe.c

228

val = FIELD_PREP(MTK_FOE_IB2_DEST_PORT_V2, pse_port) |

drivers/net/ethernet/mediatek/mtk_ppe.c

229

FIELD_PREP(MTK_FOE_IB2_PORT_AG_V2, 0xf);

drivers/net/ethernet/mediatek/mtk_ppe.c

233

val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) |

drivers/net/ethernet/mediatek/mtk_ppe.c

234

FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE, type) |

drivers/net/ethernet/mediatek/mtk_ppe.c

235

FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) |

drivers/net/ethernet/mediatek/mtk_ppe.c

239

val = FIELD_PREP(MTK_FOE_IB2_DEST_PORT, pse_port) |

drivers/net/ethernet/mediatek/mtk_ppe.c

240

FIELD_PREP(MTK_FOE_IB2_PORT_MG, port_mg) |

drivers/net/ethernet/mediatek/mtk_ppe.c

241

FIELD_PREP(MTK_FOE_IB2_PORT_AG, 0x1f);

drivers/net/ethernet/mediatek/mtk_ppe.c

287

val |= FIELD_PREP(MTK_FOE_IB2_DEST_PORT_V2, port);

drivers/net/ethernet/mediatek/mtk_ppe.c

290

val |= FIELD_PREP(MTK_FOE_IB2_DEST_PORT, port);

drivers/net/ethernet/mediatek/mtk_ppe.c

437

*ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) |

drivers/net/ethernet/mediatek/mtk_ppe.c

439

l2->w3info = FIELD_PREP(MTK_FOE_WINFO_WCID_V3, wcid) |

drivers/net/ethernet/mediatek/mtk_ppe.c

440

FIELD_PREP(MTK_FOE_WINFO_BSS_V3, bss);

drivers/net/ethernet/mediatek/mtk_ppe.c

441

l2->amsdu = FIELD_PREP(MTK_FOE_WINFO_AMSDU_EN, amsdu_en);

drivers/net/ethernet/mediatek/mtk_ppe.c

445

*ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) |

drivers/net/ethernet/mediatek/mtk_ppe.c

447

l2->winfo = FIELD_PREP(MTK_FOE_WINFO_WCID, wcid) |

drivers/net/ethernet/mediatek/mtk_ppe.c

448

FIELD_PREP(MTK_FOE_WINFO_BSS, bss);

drivers/net/ethernet/mediatek/mtk_ppe.c

455

l2->vlan2 = FIELD_PREP(MTK_FOE_VLAN2_WINFO_BSS, bss) |

drivers/net/ethernet/mediatek/mtk_ppe.c

456

FIELD_PREP(MTK_FOE_VLAN2_WINFO_WCID, wcid) |

drivers/net/ethernet/mediatek/mtk_ppe.c

457

FIELD_PREP(MTK_FOE_VLAN2_WINFO_RING, txq);

drivers/net/ethernet/mediatek/mtk_ppe.c

471

*ib2 |= FIELD_PREP(MTK_FOE_IB2_QID_V2, queue);

drivers/net/ethernet/mediatek/mtk_ppe.c

475

*ib2 |= FIELD_PREP(MTK_FOE_IB2_QID, queue);

drivers/net/ethernet/mediatek/mtk_ppe.c

521

hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_INVALID);

drivers/net/ethernet/mediatek/mtk_ppe.c

627

entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP_V2,

drivers/net/ethernet/mediatek/mtk_ppe.c

631

entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP,

drivers/net/ethernet/mediatek/mtk_ppe.c

991

FIELD_PREP(MTK_PPE_TB_CFG_SEARCH_MISS,

drivers/net/ethernet/mediatek/mtk_ppe.c

993

FIELD_PREP(MTK_PPE_TB_CFG_KEEPALIVE,

drivers/net/ethernet/mediatek/mtk_ppe.c

995

FIELD_PREP(MTK_PPE_TB_CFG_HASH_MODE, 1) |

drivers/net/ethernet/mediatek/mtk_ppe.c

996

FIELD_PREP(MTK_PPE_TB_CFG_SCAN_MODE,

drivers/net/ethernet/mediatek/mtk_ppe.c

998

FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,

drivers/net/ethernet/mediatek/mtk_star_emac.c

1512

delay_val |= FIELD_PREP(MTK_STAR_BIT_INV_RX_CLK, priv->rx_inv);

drivers/net/ethernet/mediatek/mtk_star_emac.c

1513

delay_val |= FIELD_PREP(MTK_STAR_BIT_INV_TX_CLK, priv->tx_inv);

drivers/net/ethernet/mediatek/mtk_wed.c

1006

FIELD_PREP(MTK_WED_WPDMA_WRITE_TXP, 0x0103));

drivers/net/ethernet/mediatek/mtk_wed.c

1009

FIELD_PREP(MTK_WED_WPDMA_WRITE_TXP, 0x0100));

drivers/net/ethernet/mediatek/mtk_wed.c

1208

FIELD_PREP(MTK_WED_PCIE_INT_CTRL_POLL_EN, 2));

drivers/net/ethernet/mediatek/mtk_wed.c

1214

FIELD_PREP(MTK_WED_PCIE_INT_CTRL_SRC_SEL,

drivers/net/ethernet/mediatek/mtk_wed.c

1221

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_SRC_SEL, 0));

drivers/net/ethernet/mediatek/mtk_wed.c

1268

u32 set = FIELD_PREP(MTK_WED_WDMA_GLO_CFG_BT_SIZE, 2);

drivers/net/ethernet/mediatek/mtk_wed.c

1299

FIELD_PREP(MTK_WED_WDMA_OFST0_GLO_INTS,

drivers/net/ethernet/mediatek/mtk_wed.c

1301

FIELD_PREP(MTK_WED_WDMA_OFST0_GLO_CFG,

drivers/net/ethernet/mediatek/mtk_wed.c

1305

FIELD_PREP(MTK_WED_WDMA_OFST1_TX_CTRL,

drivers/net/ethernet/mediatek/mtk_wed.c

1307

FIELD_PREP(MTK_WED_WDMA_OFST1_RX_CTRL,

drivers/net/ethernet/mediatek/mtk_wed.c

1381

FIELD_PREP(MTK_WED_RROQM_MIOD_MID_DW, 0x70 >> 2) |

drivers/net/ethernet/mediatek/mtk_wed.c

1382

FIELD_PREP(MTK_WED_RROQM_MIOD_MOD_DW, 0x10 >> 2) |

drivers/net/ethernet/mediatek/mtk_wed.c

1383

FIELD_PREP(MTK_WED_RROQM_MIOD_ENTRY_DW,

drivers/net/ethernet/mediatek/mtk_wed.c

1388

FIELD_PREP(MTK_WED_RROQM_MIOD_CNT, MTK_WED_MIOD_CNT));

drivers/net/ethernet/mediatek/mtk_wed.c

1391

FIELD_PREP(MTK_WED_RROQM_FDBK_CNT, MTK_WED_FB_CMD_CNT));

drivers/net/ethernet/mediatek/mtk_wed.c

1420

FIELD_PREP(MTK_WED_RTQM_TXDMAD_FPORT,

drivers/net/ethernet/mediatek/mtk_wed.c

1425

FIELD_PREP(MTK_WED_RTQM_ENQ_CFG_TXDMAD_FPORT,

drivers/net/ethernet/mediatek/mtk_wed.c

1447

FIELD_PREP(MTK_WED_TX_BM_CTRL_VLD_GRP_NUM,

drivers/net/ethernet/mediatek/mtk_wed.c

1449

FIELD_PREP(MTK_WED_TX_BM_CTRL_RSV_GRP_NUM,

drivers/net/ethernet/mediatek/mtk_wed.c

1452

FIELD_PREP(MTK_WED_TX_BM_DYN_THR_LO, 1) |

drivers/net/ethernet/mediatek/mtk_wed.c

1457

FIELD_PREP(MTK_WED_TX_BM_CTRL_VLD_GRP_NUM,

drivers/net/ethernet/mediatek/mtk_wed.c

1459

FIELD_PREP(MTK_WED_TX_BM_CTRL_RSV_GRP_NUM,

drivers/net/ethernet/mediatek/mtk_wed.c

1462

FIELD_PREP(MTK_WED_TX_TKID_DYN_THR_LO, 0) |

drivers/net/ethernet/mediatek/mtk_wed.c

1465

FIELD_PREP(MTK_WED_TX_BM_DYN_THR_LO_V2, 0) |

drivers/net/ethernet/mediatek/mtk_wed.c

1469

FIELD_PREP(MTK_WED_TX_TKID_CTRL_VLD_GRP_NUM,

drivers/net/ethernet/mediatek/mtk_wed.c

1471

FIELD_PREP(MTK_WED_TX_TKID_CTRL_RSV_GRP_NUM,

drivers/net/ethernet/mediatek/mtk_wed.c

1476

FIELD_PREP(MTK_WED_TX_BM_TKID_START, dev->wlan.token_start) |

drivers/net/ethernet/mediatek/mtk_wed.c

1477

FIELD_PREP(MTK_WED_TX_BM_TKID_END,

drivers/net/ethernet/mediatek/mtk_wed.c

1489

FIELD_PREP(MTK_WED_TX_TKID_CTRL_VLD_GRP_NUM_V3,

drivers/net/ethernet/mediatek/mtk_wed.c

1491

FIELD_PREP(MTK_WED_TX_TKID_CTRL_RSV_GRP_NUM_V3,

drivers/net/ethernet/mediatek/mtk_wed.c

1980

u32 wdma_mask = FIELD_PREP(MTK_WDMA_INT_MASK_RX_DONE, GENMASK(1, 0));

drivers/net/ethernet/mediatek/mtk_wed.c

2008

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_TX0_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2010

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_TX1_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2017

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_TX_FREE_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2026

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_RX0_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2028

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_RX1_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2031

wdma_mask |= FIELD_PREP(MTK_WDMA_INT_MASK_TX_DONE,

drivers/net/ethernet/mediatek/mtk_wed.c

2037

FIELD_PREP(MTK_WED_WDMA_INT_CTRL_POLL_SRC_SEL,

drivers/net/ethernet/mediatek/mtk_wed.c

2093

FIELD_PREP(MTK_WED_WDMA_RX_PREF_BURST_SIZE, 0x10) |

drivers/net/ethernet/mediatek/mtk_wed.c

2094

FIELD_PREP(MTK_WED_WDMA_RX_PREF_LOW_THRES, 0x8));

drivers/net/ethernet/mediatek/mtk_wed.c

2124

FIELD_PREP(MTK_WED_WPDMA_RX_D_RXD_READ_LEN, 0x18) |

drivers/net/ethernet/mediatek/mtk_wed.c

2125

FIELD_PREP(MTK_WED_WPDMA_RX_D_INIT_PHASE_RXEN_SEL, 0x2));

drivers/net/ethernet/mediatek/mtk_wed.c

2130

FIELD_PREP(MTK_WED_WPDMA_RX_D_PREF_BURST_SIZE, 0x10) |

drivers/net/ethernet/mediatek/mtk_wed.c

2131

FIELD_PREP(MTK_WED_WPDMA_RX_D_PREF_LOW_THRES, 0x8));

drivers/net/ethernet/mediatek/mtk_wed.c

2186

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_RRO_RX0_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2188

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_RRO_RX1_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2198

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_RRO_PG0_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2200

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_RRO_PG1_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2202

FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_RRO_PG2_DONE_TRIG,

drivers/net/ethernet/mediatek/mtk_wed.c

2279

FIELD_PREP(MTK_WED_RRO_CFG1_MAX_WIN_SZ,

drivers/net/ethernet/mediatek/mtk_wed.c

2281

FIELD_PREP(MTK_WED_RRO_CFG1_PARTICL_SE_ID,

drivers/net/ethernet/mediatek/mtk_wed.c

2308

FIELD_PREP(MTK_WED_PN_CHECK_SE_ID, i));

drivers/net/ethernet/mediatek/mtk_wed.c

2354

FIELD_PREP(MTK_PCIE_MIRROR_MAP_WED_ID,

drivers/net/ethernet/mediatek/mtk_wed.c

605

FIELD_PREP(MTK_WED_AMSDU_STA_MAX_AMSDU_LEN,

drivers/net/ethernet/mediatek/mtk_wed.c

607

FIELD_PREP(MTK_WED_AMSDU_STA_MAX_AMSDU_NUM,

drivers/net/ethernet/mediatek/mtk_wed.c

621

FIELD_PREP(MTK_WED_AMSDU_HIFTXD_SRC, dev->hw->index));

drivers/net/ethernet/mediatek/mtk_wed.c

710

ctrl = FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN0, txd_size);

drivers/net/ethernet/mediatek/mtk_wed.c

713

FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN1,

drivers/net/ethernet/mediatek/mtk_wed.c

717

FIELD_PREP(MTK_WDMA_DESC_CTRL_LEN1_V2,

drivers/net/ethernet/mediatek/mtk_wed.c

911

FIELD_PREP(MTK_WED_RRO_PG_BM_RX_SDL0, 128));

drivers/net/ethernet/mediatek/mtk_wed.c

917

FIELD_PREP(MTK_WED_RRO_PG_BM_SW_TAIL_IDX,

drivers/net/ethernet/mediatek/mtk_wed.c

928

FIELD_PREP(MTK_WED_RX_BM_RX_DMAD_SDL0, dev->wlan.rx_size));

drivers/net/ethernet/mediatek/mtk_wed.c

931

FIELD_PREP(MTK_WED_RX_BM_SW_TAIL, dev->wlan.rx_npkt));

drivers/net/ethernet/mediatek/mtk_wed.c

933

FIELD_PREP(MTK_WED_RX_BM_DYN_ALLOC_TH_H, 0xffff));

drivers/net/ethernet/mediatek/mtk_wed_wo.c

165

FIELD_PREP(MTK_WED_WO_CTL_SD_LEN0,

drivers/net/ethernet/mediatek/mtk_wed_wo.c

359

ctrl = FIELD_PREP(MTK_WED_WO_CTL_SD_LEN0, skb->len) |

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

327

val |= FIELD_PREP(MLXBF_GIGE_PLU_TX_IPG_SIZE_MASK, ipg_size);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

328

val |= FIELD_PREP(MLXBF_GIGE_PLU_TX_SGMII_MODE_MASK, sgmii_mode);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c

333

val |= FIELD_PREP(MLXBF_GIGE_PLU_RX_SGMII_MODE_MASK, sgmii_mode);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

274

val |= FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

277

val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) |

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

278

FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

280

val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

282

val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) |

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

283

FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13);

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h

47

#define MLXBF2_GIGE_MDIO_CFG_VAL (FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | \

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h

48

FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO3_3_MASK, 1) | \

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h

49

FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1) | \

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h

50

FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | \

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h

51

FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13))

drivers/net/ethernet/meta/fbnic/fbnic_csr.h

16

FIELD_PREP(FBNIC_FW_CAP_RESP_VERSION_MAJOR, _major) | \

drivers/net/ethernet/meta/fbnic/fbnic_csr.h

17

FIELD_PREP(FBNIC_FW_CAP_RESP_VERSION_MINOR, _minor) | \

drivers/net/ethernet/meta/fbnic/fbnic_csr.h

18

FIELD_PREP(FBNIC_FW_CAP_RESP_VERSION_PATCH, _patch) | \

drivers/net/ethernet/meta/fbnic/fbnic_csr.h

19

FIELD_PREP(FBNIC_FW_CAP_RESP_VERSION_BUILD, _build))

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

1039

FIELD_PREP(FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

1060

FIELD_PREP(FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

1079

FIELD_PREP(FBNIC_RPC_TCAM_ACT0_IPSRC_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

1098

FIELD_PREP(FBNIC_RPC_TCAM_ACT0_IPDST_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

1136

FIELD_PREP(FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

1148

dest |= FIELD_PREP(FBNIC_RPC_ACT_TBL0_DMA_HINT,

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

884

u32 dest = FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

917

FIELD_PREP(FBNIC_RPC_ACT_TBL0_Q_ID, ring_idx);

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

970

FIELD_PREP(FBNIC_RPC_TCAM_ACT0_IPSRC_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

989

FIELD_PREP(FBNIC_RPC_TCAM_ACT0_IPDST_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_fw.c

144

FIELD_PREP(FBNIC_IPC_MBX_DESC_LEN_MASK, length) |

drivers/net/ethernet/meta/fbnic/fbnic_fw.c

1647

FIELD_PREP(FBNIC_IPC_MBX_DESC_LEN_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

100

FIELD_PREP(FBNIC_QM_TQS_CTL0_PREFETCH_THRESH,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

113

FIELD_PREP(FBNIC_QM_TQS_MTU_CTL1_BULK,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

123

FIELD_PREP(FBNIC_QM_TCQ_CTL0_TICK_CYCLES,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

125

FIELD_PREP(FBNIC_QM_TCQ_CTL0_COAL_WAIT,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

132

FIELD_PREP(FBNIC_QM_RCQ_CTL0_TICK_CYCLES,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

134

FIELD_PREP(FBNIC_QM_RCQ_CTL0_COAL_WAIT,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

140

FIELD_PREP(FBNIC_FAB_AXI4_AR_SPACER_THREADSHOLD, 2));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

206

FIELD_PREP(FBNIC_RXB_CT_SIZE_HEADER, 4) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

207

FIELD_PREP(FBNIC_RXB_CT_SIZE_PAYLOAD, 2));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

21

val |= FIELD_PREP(FBNIC_QM_TNI_TDF_CTL_MRRS, readrq) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

214

FIELD_PREP(FBNIC_RXB_PBUF_BASE_ADDR,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

216

FIELD_PREP(FBNIC_RXB_PBUF_SIZE, size));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

22

FIELD_PREP(FBNIC_QM_TNI_TDF_CTL_CLS, cls);

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

222

FIELD_PREP(FBNIC_RXB_PBUF_CREDIT_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

232

FIELD_PREP(FBNIC_RXB_PAUSE_THLD_ON,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

234

FIELD_PREP(FBNIC_RXB_PAUSE_THLD_OFF, 0x380));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

239

FIELD_PREP(FBNIC_RXB_DROP_THLD_ON,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

242

FIELD_PREP(FBNIC_RXB_DROP_THLD_OFF,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

251

FIELD_PREP(FBNIC_RXB_ECN_THLD_ON,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

255

FIELD_PREP(FBNIC_RXB_ECN_THLD_OFF,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

265

FIELD_PREP(FBNIC_RXB_PAUSE_DROP_CTRL_DROP_ENABLE,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

267

FIELD_PREP(FBNIC_RXB_PAUSE_DROP_CTRL_ECN_ENABLE,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

275

FIELD_PREP(FBNIC_RXB_INTF_CREDIT_MASK3, 8));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

295

FIELD_PREP(FBNIC_RXB_DWRR_RDE_WEIGHT0_QUANTUM0, 0x40) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

296

FIELD_PREP(FBNIC_RXB_DWRR_RDE_WEIGHT0_QUANTUM2, 0x50));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

298

FIELD_PREP(FBNIC_RXB_DWRR_RDE_WEIGHT0_QUANTUM0, 0x1f));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

300

FIELD_PREP(FBNIC_RXB_DWRR_RDE_WEIGHT1_QUANTUM4, 0x40));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

302

FIELD_PREP(FBNIC_RXB_DWRR_RDE_WEIGHT1_QUANTUM4, 0x1f));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

316

FIELD_PREP(FBNIC_QM_TQS_CTL1_MC_MAX_CREDITS, 0x40) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

317

FIELD_PREP(FBNIC_QM_TQS_CTL1_BULK_MAX_CREDITS, 0x20));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

323

FIELD_PREP(FBNIC_TCE_TXB_Q_CTRL_SIZE, 0x400) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

324

FIELD_PREP(FBNIC_TCE_TXB_Q_CTRL_START, 0x000));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

327

FIELD_PREP(FBNIC_TCE_TXB_Q_CTRL_SIZE, 0x200) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

328

FIELD_PREP(FBNIC_TCE_TXB_Q_CTRL_START, 0x400));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

330

FIELD_PREP(FBNIC_TCE_TXB_Q_CTRL_SIZE, 0x200) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

331

FIELD_PREP(FBNIC_TCE_TXB_Q_CTRL_START, 0x600));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

335

FIELD_PREP(FBNIC_TCE_LSO_CTRL_TCPF_CLR_1ST, TCPHDR_PSH |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

337

FIELD_PREP(FBNIC_TCE_LSO_CTRL_TCPF_CLR_MID, TCPHDR_PSH |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

340

FIELD_PREP(FBNIC_TCE_LSO_CTRL_TCPF_CLR_END, TCPHDR_CWR));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

344

FIELD_PREP(FBNIC_TCE_BMC_MAX_PKTSZ_TX,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

346

FIELD_PREP(FBNIC_TCE_BMC_MAX_PKTSZ_RX,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

349

FIELD_PREP(FBNIC_TCE_MC_MAX_PKTSZ_TMI,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

35

val |= FIELD_PREP(FBNIC_QM_TNI_TCM_CTL_MPS, mps) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

36

FIELD_PREP(FBNIC_QM_TNI_TCM_CTL_CLS, cls);

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

364

FIELD_PREP(FBNIC_TCE_TXB_ENQ_WRR_CTRL_WEIGHT0, 0x64) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

365

FIELD_PREP(FBNIC_TCE_TXB_ENQ_WRR_CTRL_WEIGHT2, 0x04));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

369

FIELD_PREP(FBNIC_TCE_TXB_BMC_DWRR_CTRL_QUANTUM0, 0x50) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

370

FIELD_PREP(FBNIC_TCE_TXB_BMC_DWRR_CTRL_QUANTUM1, 0x82));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

373

FIELD_PREP(FBNIC_TCE_TXB_NTWRK_DWRR_CTRL_QUANTUM1, 0x50) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

374

FIELD_PREP(FBNIC_TCE_TXB_NTWRK_DWRR_CTRL_QUANTUM2, 0x20));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

376

FIELD_PREP(FBNIC_TCE_TXB_NTWRK_DWRR_CTRL_QUANTUM2, 0x03));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

380

FIELD_PREP(FBNIC_TCE_SOP_PROT_CTRL_TBI, 0x78) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

381

FIELD_PREP(FBNIC_TCE_SOP_PROT_CTRL_TTI_FRM, 0x40) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

382

FIELD_PREP(FBNIC_TCE_SOP_PROT_CTRL_TTI_CM, 0x0c));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

432

FIELD_PREP(FBNIC_RXB_PAUSE_DROP_CTRL_PAUSE_ENABLE,

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

73

FIELD_PREP(FBNIC_QM_TNI_TDE_CTL_MRRS_1K, override_1k ? 1 : 0) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

74

FIELD_PREP(FBNIC_QM_TNI_TDE_CTL_MAX_OB, 704) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

75

FIELD_PREP(FBNIC_QM_TNI_TDE_CTL_MAX_OT, 128) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

76

FIELD_PREP(FBNIC_QM_TNI_TDE_CTL_MRRS, readrq) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

77

FIELD_PREP(FBNIC_QM_TNI_TDE_CTL_CLS, cls));

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

86

u64 default_meta = FIELD_PREP(FBNIC_TWD_L2_HLEN_MASK, ETH_HLEN) |

drivers/net/ethernet/meta/fbnic/fbnic_mac.c

98

FIELD_PREP(FBNIC_QM_TQS_CTL0_LSO_TS_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

101

FIELD_PREP(FBNIC_RPC_RMI_CONFIG_MTU, FBNIC_MAX_JUMBO_FRAME_SIZE) |

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1013

FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_MASK, ntohs(*mask--)) |

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1014

FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_VALUE, ntohs(*value--)));

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

102

FIELD_PREP(FBNIC_RPC_RMI_CONFIG_OH_BYTES, 20) |

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1034

FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_MASK, ntohs(*mask--)) |

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1035

FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_VALUE, ntohs(*value--)));

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1053

FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_MASK, ntohs(*mask--)) |

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1054

FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_VALUE, ntohs(*value--)));

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1174

u32 dest = FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1211

FIELD_PREP(FBNIC_RPC_TCAM_ACT_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

1213

FIELD_PREP(FBNIC_RPC_TCAM_ACT_VALUE,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

158

act_tcam->dest = FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

164

FIELD_PREP(FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

222

act_tcam->dest = FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

232

~FIELD_PREP(FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX, 0x1c) &

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

328

dest = FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

333

dest |= FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

341

dest |= FIELD_PREP(FBNIC_RPC_ACT_TBL0_DMA_HINT,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

358

value = FIELD_PREP(FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX,

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

59

FIELD_PREP(FBNIC_RPC_RMI_CONFIG_OH_BYTES, 20));

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

624

FIELD_PREP(FBNIC_RPC_TCAM_MACDA_MASK, ntohs(*mask--)) |

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

625

FIELD_PREP(FBNIC_RPC_TCAM_MACDA_VALUE, ntohs(*value--)));

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

63

FIELD_PREP(FBNIC_RPC_ACT_TBL1_RSS_ENA_##_rssem, \

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

714

FIELD_PREP(FBNIC_TCE_RAM_TCAM_MASK, ntohs(*mask--)) |

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

715

FIELD_PREP(FBNIC_TCE_RAM_TCAM_VALUE, ntohs(*value--)));

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

993

FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_MASK, ntohs(*mask--)) |

drivers/net/ethernet/meta/fbnic/fbnic_rpc.c

994

FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_VALUE, ntohs(*value--)));

drivers/net/ethernet/meta/fbnic/fbnic_time.c

230

FIELD_PREP(FBNIC_PTP_CTRL_TICK_IVAL, 1));

drivers/net/ethernet/meta/fbnic/fbnic_time.c

245

FIELD_PREP(FBNIC_PTP_CTRL_MAC_OUT_IVAL, 3) |

drivers/net/ethernet/meta/fbnic/fbnic_time.c

246

FIELD_PREP(FBNIC_PTP_CTRL_TICK_IVAL, 1));

drivers/net/ethernet/meta/fbnic/fbnic_time.c

59

FIELD_PREP(FBNIC_PTP_ADD_VAL_NS_MASK, addend >> 32));

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

1109

*twd = cpu_to_le64(FIELD_PREP(FBNIC_TWD_ADDR_MASK, dma) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

1110

FIELD_PREP(FBNIC_TWD_LEN_MASK, size) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

1111

FIELD_PREP(FBNIC_TWD_TYPE_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

175

cpu_to_le64(FIELD_PREP(FBNIC_TWD_TYPE_MASK, FBNIC_TWD_TYPE_##_type))

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

219

*meta |= cpu_to_le64(FIELD_PREP(FBNIC_TWD_L3_OHLEN_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

242

*meta |= cpu_to_le64(FIELD_PREP(FBNIC_TWD_L3_TYPE_MASK, l3_type) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

243

FIELD_PREP(FBNIC_TWD_L4_TYPE_MASK, l4_type) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

244

FIELD_PREP(FBNIC_TWD_L4_HLEN_MASK, l4len / 4) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

245

FIELD_PREP(FBNIC_TWD_MSS_MASK, shinfo->gso_size) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2606

rcq_ctl = FIELD_PREP(FBNIC_QUEUE_RDE_CTL0_DROP_MODE_MASK, drop_mode) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2607

FIELD_PREP(FBNIC_QUEUE_RDE_CTL0_MIN_HROOM_MASK, FBNIC_RX_HROOM) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2608

FIELD_PREP(FBNIC_QUEUE_RDE_CTL0_MIN_TROOM_MASK, FBNIC_RX_TROOM) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2609

FIELD_PREP(FBNIC_QUEUE_RDE_CTL0_EN_HDR_SPLIT, hdr_split);

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2651

val |= FIELD_PREP(FBNIC_INTR_CQ_REARM_RCQ_TIMEOUT, fbn->rx_usecs) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2653

val |= FIELD_PREP(FBNIC_INTR_CQ_REARM_TCQ_TIMEOUT, fbn->tx_usecs) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2690

rcq_ctl |= FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_PADLEN_MASK, FBNIC_RX_PAD) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2691

FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_MAX_HDR_MASK, hds_thresh) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2692

FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_PAYLD_OFF_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

2694

FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_PAYLD_PG_CL_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

273

*meta |= cpu_to_le64(FIELD_PREP(FBNIC_TWD_CSUM_OFFSET_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

286

*meta |= cpu_to_le64(FIELD_PREP(FBNIC_TWD_L2_HLEN_MASK, l2len / 2) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

287

FIELD_PREP(FBNIC_TWD_L3_IHLEN_MASK, i3len / 2));

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

345

*twd = cpu_to_le64(FIELD_PREP(FBNIC_TWD_ADDR_MASK, dma) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

346

FIELD_PREP(FBNIC_TWD_LEN_MASK, size) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

347

FIELD_PREP(FBNIC_TWD_TYPE_MASK,

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

880

FIELD_PREP(FBNIC_BD_PAGE_ID_MASK, id);

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

889

bd += FIELD_PREP(FBNIC_BD_DESC_ADDR_MASK, 1) |

drivers/net/ethernet/meta/fbnic/fbnic_txrx.c

890

FIELD_PREP(FBNIC_BD_DESC_ID_MASK, 1);

drivers/net/ethernet/microchip/lan743x_main.c

3487

misc_ctl |= FIELD_PREP(MISC_CTL_0_RFE_READ_FIFO_MASK_,

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1002

FIELD_PREP(FDMA_CH_CFG_CH_DCB_DB_CNT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1008

FIELD_PREP(FDMA_CH_CFG_CH_MEM, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1017

FIELD_PREP(FDMA_PORT_CTRL_INJ_STOP, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1023

FIELD_PREP(FDMA_PORT_CTRL_XTR_STOP, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1035

FIELD_PREP(FDMA_INTR_DB_ENA_INTR_DB_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1050

FIELD_PREP(PTP_PIN_INTR_INTR_PTP, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1059

FIELD_PREP(PTP_PIN_INTR_ENA_INTR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1068

FIELD_PREP(PTP_DOM_CFG_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1074

FIELD_PREP(PTP_DOM_CFG_CLKCFG_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

108

FIELD_PREP(ANA_EMIRRORPORTS_EMIRRORPORTS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1086

FIELD_PREP(PTP_PIN_CFG_PIN_ACTION, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1092

FIELD_PREP(PTP_PIN_CFG_PIN_SYNC, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1098

FIELD_PREP(PTP_PIN_CFG_PIN_SELECT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1104

FIELD_PREP(PTP_PIN_CFG_PIN_DOM, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1113

FIELD_PREP(PTP_TOD_SEC_MSB_TOD_SEC_MSB, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1125

FIELD_PREP(PTP_TOD_NSEC_TOD_NSEC, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1150

FIELD_PREP(PTP_TWOSTEP_CTRL_NXT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1156

FIELD_PREP(PTP_TWOSTEP_CTRL_VLD, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1162

FIELD_PREP(PTP_TWOSTEP_CTRL_STAMP_TX, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1168

FIELD_PREP(PTP_TWOSTEP_CTRL_STAMP_PORT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

117

FIELD_PREP(ANA_FLOODING_FLD_UNICAST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1174

FIELD_PREP(PTP_TWOSTEP_CTRL_OVFL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1183

FIELD_PREP(PTP_TWOSTEP_STAMP_STAMP_NSEC, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1192

FIELD_PREP(QS_XTR_GRP_CFG_MODE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1198

FIELD_PREP(QS_XTR_GRP_CFG_BYTE_SWAP, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1216

FIELD_PREP(QS_INJ_GRP_CFG_MODE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1222

FIELD_PREP(QS_INJ_GRP_CFG_BYTE_SWAP, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

123

FIELD_PREP(ANA_FLOODING_FLD_BROADCAST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1234

FIELD_PREP(QS_INJ_CTRL_GAP_SIZE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1240

FIELD_PREP(QS_INJ_CTRL_EOF, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1246

FIELD_PREP(QS_INJ_CTRL_SOF, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1252

FIELD_PREP(QS_INJ_CTRL_VLD_BYTES, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1261

FIELD_PREP(QS_INJ_STATUS_WMARK_REACHED, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1267

FIELD_PREP(QS_INJ_STATUS_FIFO_RDY, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1276

FIELD_PREP(QSYS_PORT_MODE_DEQUEUE_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1285

FIELD_PREP(QSYS_SW_PORT_MODE_PORT_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

129

FIELD_PREP(ANA_FLOODING_FLD_MULTICAST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1291

FIELD_PREP(QSYS_SW_PORT_MODE_SCH_NEXT_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1297

FIELD_PREP(QSYS_SW_PORT_MODE_INGRESS_DROP_MODE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1303

FIELD_PREP(QSYS_SW_PORT_MODE_TX_PFC_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1309

FIELD_PREP(QSYS_SW_PORT_MODE_AGING_MODE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1318

FIELD_PREP(QSYS_SW_STATUS_EQ_AVAIL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1333

FIELD_PREP(QSYS_CIR_CFG_CIR_RATE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1339

FIELD_PREP(QSYS_CIR_CFG_CIR_BURST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1348

FIELD_PREP(QSYS_SE_CFG_SE_DWRR_CNT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1354

FIELD_PREP(QSYS_SE_CFG_SE_RR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1360

FIELD_PREP(QSYS_SE_CFG_SE_AVB_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1366

FIELD_PREP(QSYS_SE_CFG_SE_FRM_MODE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1374

FIELD_PREP(QSYS_SE_DWRR_CFG_DWRR_COST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

138

FIELD_PREP(ANA_FLOODING_IPMC_FLD_MC4_CTRL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1383

FIELD_PREP(QSYS_TAS_CFG_CTRL_LIST_NUM_MAX, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1389

FIELD_PREP(QSYS_TAS_CFG_CTRL_LIST_NUM, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1395

FIELD_PREP(QSYS_TAS_CFG_CTRL_ALWAYS_GB_SCH_Q, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1401

FIELD_PREP(QSYS_TAS_CFG_CTRL_GCL_ENTRY_NUM, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1410

FIELD_PREP(QSYS_TAS_GS_CTRL_HSCH_POS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1419

FIELD_PREP(QSYS_TAS_STM_CFG_REVISIT_DLY, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1428

FIELD_PREP(QSYS_TAS_PROFILE_CFG_PORT_NUM, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1434

FIELD_PREP(QSYS_TAS_PROFILE_CFG_LINK_SPEED, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

144

FIELD_PREP(ANA_FLOODING_IPMC_FLD_MC4_DATA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1443

FIELD_PREP(QSYS_TAS_BT_NSEC_NSEC, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1455

FIELD_PREP(QSYS_TAS_BT_SEC_MSB_SEC_MSB, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1467

FIELD_PREP(QSYS_TAS_STARTUP_CFG_OBSOLETE_IDX, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1476

FIELD_PREP(QSYS_TAS_LIST_CFG_LIST_BASE_ADDR, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1485

FIELD_PREP(QSYS_TAS_LST_LIST_STATE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1494

FIELD_PREP(QSYS_TAS_GCL_CT_CFG_HSCH_POS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

150

FIELD_PREP(ANA_FLOODING_IPMC_FLD_MC6_CTRL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1500

FIELD_PREP(QSYS_TAS_GCL_CT_CFG_GATE_STATE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1506

FIELD_PREP(QSYS_TAS_GCL_CT_CFG_OP_TYPE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1515

FIELD_PREP(QSYS_TAS_GCL_CT_CFG2_PORT_PROFILE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1521

FIELD_PREP(QSYS_TAS_GCL_CT_CFG2_NEXT_GCL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1533

FIELD_PREP(QSYS_TAS_GATE_STATE_TAS_GATE_STATE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1542

FIELD_PREP(REW_PORT_VLAN_CFG_PORT_TPID, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1548

FIELD_PREP(REW_PORT_VLAN_CFG_PORT_VID, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1557

FIELD_PREP(REW_TAG_CFG_TAG_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

156

FIELD_PREP(ANA_FLOODING_IPMC_FLD_MC6_DATA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1563

FIELD_PREP(REW_TAG_CFG_TAG_TPID_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1569

FIELD_PREP(REW_TAG_CFG_TAG_PCP_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1575

FIELD_PREP(REW_TAG_CFG_TAG_DEI_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1584

FIELD_PREP(REW_PORT_CFG_ES0_EN, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1590

FIELD_PREP(REW_PORT_CFG_NO_REWRITE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1599

FIELD_PREP(REW_DSCP_CFG_DSCP_REWR_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1608

FIELD_PREP(REW_PCP_DEI_CFG_DEI_QOS_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1614

FIELD_PREP(REW_PCP_DEI_CFG_PCP_QOS_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1623

FIELD_PREP(REW_STAT_CFG_STAT_MODE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1632

FIELD_PREP(SYS_RESET_CFG_CORE_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1641

FIELD_PREP(SYS_PORT_MODE_INCL_INJ_HDR, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1647

FIELD_PREP(SYS_PORT_MODE_INCL_XTR_HDR, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

165

FIELD_PREP(ANA_PGID_PGID, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1656

FIELD_PREP(SYS_FRONT_PORT_MODE_HDX_MODE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1665

FIELD_PREP(SYS_FRM_AGING_AGE_TX_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1674

FIELD_PREP(SYS_STAT_CFG_STAT_VIEW, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1683

FIELD_PREP(SYS_PAUSE_CFG_PAUSE_START, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1689

FIELD_PREP(SYS_PAUSE_CFG_PAUSE_STOP, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1695

FIELD_PREP(SYS_PAUSE_CFG_PAUSE_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1710

FIELD_PREP(SYS_MAC_FC_CFG_FC_LINK_SPEED, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1716

FIELD_PREP(SYS_MAC_FC_CFG_FC_LATENCY_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1722

FIELD_PREP(SYS_MAC_FC_CFG_ZERO_PAUSE_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1728

FIELD_PREP(SYS_MAC_FC_CFG_TX_FC_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1734

FIELD_PREP(SYS_MAC_FC_CFG_RX_FC_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

174

FIELD_PREP(ANA_PGID_CFG_OBEY_VLAN, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1740

FIELD_PREP(SYS_MAC_FC_CFG_PAUSE_VAL_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1752

FIELD_PREP(SYS_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1761

FIELD_PREP(VCAP_UPDATE_CTRL_UPDATE_CMD, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1767

FIELD_PREP(VCAP_UPDATE_CTRL_UPDATE_ENTRY_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1773

FIELD_PREP(VCAP_UPDATE_CTRL_UPDATE_ACTION_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1779

FIELD_PREP(VCAP_UPDATE_CTRL_UPDATE_CNT_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1785

FIELD_PREP(VCAP_UPDATE_CTRL_UPDATE_ADDR, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1791

FIELD_PREP(VCAP_UPDATE_CTRL_UPDATE_SHOT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1797

FIELD_PREP(VCAP_UPDATE_CTRL_CLEAR_CACHE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1803

FIELD_PREP(VCAP_UPDATE_CTRL_MV_TRAFFIC_IGN, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1812

FIELD_PREP(VCAP_MV_CFG_MV_NUM_POS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1818

FIELD_PREP(VCAP_MV_CFG_MV_SIZE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1845

FIELD_PREP(VCAP_CORE_IDX_CORE_IDX, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

1854

FIELD_PREP(VCAP_CORE_MAP_CORE_MAP, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

189

FIELD_PREP(ANA_MACACCESS_CHANGE2SW, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

195

FIELD_PREP(ANA_MACACCESS_MAC_CPU_COPY, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

201

FIELD_PREP(ANA_MACACCESS_VALID, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

207

FIELD_PREP(ANA_MACACCESS_ENTRYTYPE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

213

FIELD_PREP(ANA_MACACCESS_DEST_IDX, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

219

FIELD_PREP(ANA_MACACCESS_MAC_TABLE_CMD, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

228

FIELD_PREP(ANA_MACTINDX_BUCKET, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

234

FIELD_PREP(ANA_MACTINDX_M_INDEX, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

243

FIELD_PREP(ANA_VLAN_PORT_MASK_VLAN_PORT_MASK, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

252

FIELD_PREP(ANA_VLANACCESS_VLAN_TBL_CMD, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

261

FIELD_PREP(ANA_VLANTIDX_VLAN_PGID_CPU_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

267

FIELD_PREP(ANA_VLANTIDX_V_INDEX, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

276

FIELD_PREP(ANA_VLAN_CFG_VLAN_AWARE_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

282

FIELD_PREP(ANA_VLAN_CFG_VLAN_POP_CNT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

288

FIELD_PREP(ANA_VLAN_CFG_VLAN_PCP, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

294

FIELD_PREP(ANA_VLAN_CFG_VLAN_DEI, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

300

FIELD_PREP(ANA_VLAN_CFG_VLAN_VID, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

309

FIELD_PREP(ANA_DROP_CFG_DROP_UNTAGGED_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

315

FIELD_PREP(ANA_DROP_CFG_DROP_PRIO_S_TAGGED_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

321

FIELD_PREP(ANA_DROP_CFG_DROP_PRIO_C_TAGGED_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

327

FIELD_PREP(ANA_DROP_CFG_DROP_MC_SMAC_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

336

FIELD_PREP(ANA_QOS_CFG_DP_DEFAULT_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

342

FIELD_PREP(ANA_QOS_CFG_QOS_DEFAULT_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

348

FIELD_PREP(ANA_QOS_CFG_QOS_DSCP_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

354

FIELD_PREP(ANA_QOS_CFG_QOS_PCP_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

360

FIELD_PREP(ANA_QOS_CFG_DSCP_REWR_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

369

FIELD_PREP(ANA_VCAP_CFG_S1_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

378

FIELD_PREP(ANA_VCAP_S1_CFG_KEY_RT_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

384

FIELD_PREP(ANA_VCAP_S1_CFG_KEY_IP6_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

39

FIELD_PREP(AFI_PORT_FRM_OUT_FRM_OUT_CNT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

390

FIELD_PREP(ANA_VCAP_S1_CFG_KEY_IP4_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

396

FIELD_PREP(ANA_VCAP_S1_CFG_KEY_OTHER_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

405

FIELD_PREP(ANA_VCAP_S2_CFG_ISDX_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

411

FIELD_PREP(ANA_VCAP_S2_CFG_UDP_PAYLOAD_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

417

FIELD_PREP(ANA_VCAP_S2_CFG_ETYPE_PAYLOAD_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

423

FIELD_PREP(ANA_VCAP_S2_CFG_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

429

FIELD_PREP(ANA_VCAP_S2_CFG_SNAP_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

435

FIELD_PREP(ANA_VCAP_S2_CFG_ARP_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

441

FIELD_PREP(ANA_VCAP_S2_CFG_IP_TCPUDP_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

447

FIELD_PREP(ANA_VCAP_S2_CFG_IP_OTHER_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

453

FIELD_PREP(ANA_VCAP_S2_CFG_IP6_CFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

459

FIELD_PREP(ANA_VCAP_S2_CFG_OAM_DIS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

468

FIELD_PREP(ANA_PCP_DEI_CFG_DP_PCP_DEI_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

474

FIELD_PREP(ANA_PCP_DEI_CFG_QOS_PCP_DEI_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

48

FIELD_PREP(AFI_PORT_CFG_FC_SKIP_TTI_INJ, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

483

FIELD_PREP(ANA_CPU_FWD_CFG_MLD_REDIR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

489

FIELD_PREP(ANA_CPU_FWD_CFG_IGMP_REDIR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

495

FIELD_PREP(ANA_CPU_FWD_CFG_IPMC_CTRL_COPY_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

501

FIELD_PREP(ANA_CPU_FWD_CFG_SRC_COPY_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

513

FIELD_PREP(ANA_PORT_CFG_SRC_MIRROR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

519

FIELD_PREP(ANA_PORT_CFG_LEARNAUTO, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

525

FIELD_PREP(ANA_PORT_CFG_LEARN_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

531

FIELD_PREP(ANA_PORT_CFG_RECV_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

537

FIELD_PREP(ANA_PORT_CFG_PORTID_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

54

FIELD_PREP(AFI_PORT_CFG_FRM_OUT_MAX, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

546

FIELD_PREP(ANA_DSCP_REWR_CFG_DSCP_QOS_REWR_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

555

FIELD_PREP(ANA_POL_CFG_PORT_POL_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

561

FIELD_PREP(ANA_POL_CFG_POL_ORDER, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

570

FIELD_PREP(ANA_PFC_CFG_FC_LINK_SPEED, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

579

FIELD_PREP(ANA_AGGR_CFG_AC_RND_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

585

FIELD_PREP(ANA_AGGR_CFG_AC_DMAC_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

591

FIELD_PREP(ANA_AGGR_CFG_AC_SMAC_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

597

FIELD_PREP(ANA_AGGR_CFG_AC_IP6_FLOW_LBL_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

603

FIELD_PREP(ANA_AGGR_CFG_AC_IP6_TCPUDP_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

609

FIELD_PREP(ANA_AGGR_CFG_AC_IP4_SIPDIP_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

615

FIELD_PREP(ANA_AGGR_CFG_AC_IP4_TCPUDP_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

624

FIELD_PREP(ANA_DSCP_CFG_DP_DSCP_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

63

FIELD_PREP(ANA_ADVLEARN_VLAN_CHK, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

630

FIELD_PREP(ANA_DSCP_CFG_QOS_DSCP_VAL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

636

FIELD_PREP(ANA_DSCP_CFG_DSCP_TRUST_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

642

FIELD_PREP(ANA_DSCP_CFG_DSCP_REWR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

651

FIELD_PREP(ANA_POL_PIR_CFG_PIR_RATE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

657

FIELD_PREP(ANA_POL_PIR_CFG_PIR_BURST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

666

FIELD_PREP(ANA_POL_MODE_DROP_ON_YELLOW_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

672

FIELD_PREP(ANA_POL_MODE_MARK_ALL_FRMS_RED_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

678

FIELD_PREP(ANA_POL_MODE_IPG_SIZE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

684

FIELD_PREP(ANA_POL_MODE_FRM_MODE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

690

FIELD_PREP(ANA_POL_MODE_OVERSHOOT_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

699

FIELD_PREP(ANA_POL_PIR_STATE_PIR_LVL, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

708

FIELD_PREP(CHIP_TOP_CUPHY_PORT_CFG_GTX_CLK_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

717

FIELD_PREP(DEV_CLOCK_CFG_MAC_TX_RST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

723

FIELD_PREP(DEV_CLOCK_CFG_MAC_RX_RST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

729

FIELD_PREP(DEV_CLOCK_CFG_PCS_TX_RST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

735

FIELD_PREP(DEV_CLOCK_CFG_PCS_RX_RST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

741

FIELD_PREP(DEV_CLOCK_CFG_PORT_RST, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

747

FIELD_PREP(DEV_CLOCK_CFG_LINK_SPEED, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

75

FIELD_PREP(ANA_ANAINTR_INTR, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

756

FIELD_PREP(DEV_MAC_ENA_CFG_RX_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

762

FIELD_PREP(DEV_MAC_ENA_CFG_TX_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

771

FIELD_PREP(DEV_MAC_MODE_CFG_GIGA_MODE_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

780

FIELD_PREP(DEV_MAC_MAXLEN_CFG_MAX_LEN, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

789

FIELD_PREP(DEV_MAC_TAGS_CFG_VLAN_DBL_AWR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

795

FIELD_PREP(DEV_MAC_TAGS_CFG_VLAN_AWR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

804

FIELD_PREP(DEV_MAC_IFG_CFG_TX_IFG, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

81

FIELD_PREP(ANA_ANAINTR_INTR_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

810

FIELD_PREP(DEV_MAC_IFG_CFG_RX_IFG2, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

816

FIELD_PREP(DEV_MAC_IFG_CFG_RX_IFG1, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

825

FIELD_PREP(DEV_MAC_HDX_CFG_SEED, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

831

FIELD_PREP(DEV_MAC_HDX_CFG_SEED_LOAD, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

846

FIELD_PREP(DEV_PCS1G_CFG_PCS_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

855

FIELD_PREP(DEV_PCS1G_MODE_CFG_SGMII_MODE_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

861

FIELD_PREP(DEV_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

870

FIELD_PREP(DEV_PCS1G_SD_CFG_SD_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

879

FIELD_PREP(DEV_PCS1G_ANEG_CFG_ADV_ABILITY, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

885

FIELD_PREP(DEV_PCS1G_ANEG_CFG_SW_RESOLVE_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

891

FIELD_PREP(DEV_PCS1G_ANEG_CFG_RESTART_ONE_SHOT, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

897

FIELD_PREP(DEV_PCS1G_ANEG_CFG_ENA, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

90

FIELD_PREP(ANA_AUTOAGE_AGE_PERIOD, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

906

FIELD_PREP(DEV_PCS1G_ANEG_STATUS_LP_ADV, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

912

FIELD_PREP(DEV_PCS1G_ANEG_STATUS_ANEG_COMPLETE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

921

FIELD_PREP(DEV_PCS1G_LINK_STATUS_LINK_STATUS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

927

FIELD_PREP(DEV_PCS1G_LINK_STATUS_SYNC_STATUS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

936

FIELD_PREP(DEV_PCS1G_STICKY_LINK_DOWN_STICKY, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

945

FIELD_PREP(FDMA_CH_ACTIVATE_CH_ACTIVATE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

954

FIELD_PREP(FDMA_CH_RELOAD_CH_RELOAD, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

963

FIELD_PREP(FDMA_CH_DISABLE_CH_DISABLE, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

972

FIELD_PREP(FDMA_CH_DB_DISCARD_DB_DISCARD, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

99

FIELD_PREP(ANA_MIRRORPORTS_MIRRORPORTS, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

990

FIELD_PREP(FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY, x)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

996

FIELD_PREP(FDMA_CH_CFG_CH_INJ_PORT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

100

FIELD_PREP(ANA_AC_OWN_UPSID_OWN_UPSID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1000

FIELD_PREP(ANA_AC_POL_SLB_DLB_CTRL_LEAK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1006

FIELD_PREP(ANA_AC_POL_SLB_DLB_CTRL_DLB_ADD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1029

FIELD_PREP(ANA_AC_SDLB_PUP_INTERVAL_PUP_INTERVAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1040

FIELD_PREP(ANA_AC_SDLB_PUP_CTRL_PUP_LB_DT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1046

FIELD_PREP(ANA_AC_SDLB_PUP_CTRL_PUP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1069

FIELD_PREP(ANA_AC_SDLB_FRM_RATE_TOKENS_FRM_RATE_TOKENS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1080

FIELD_PREP(ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_ONGOING, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1086

FIELD_PREP(ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_WAIT_ACK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1104

FIELD_PREP(ANA_AC_SDLB_PUP_TOKENS_PUP_TOKENS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

111

FIELD_PREP(ANA_AC_PROBE_CFG_PROBE_RX_CPU_AND_VD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1115

FIELD_PREP(ANA_AC_SDLB_THRES_THRES, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1121

FIELD_PREP(ANA_AC_SDLB_THRES_THRES_HYS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1151

FIELD_PREP(ANA_AC_SDLB_INH_CTRL_PUP_TOKENS_MAX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1157

FIELD_PREP(ANA_AC_SDLB_INH_CTRL_INH_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1163

FIELD_PREP(ANA_AC_SDLB_INH_CTRL_INH_LB, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

117

FIELD_PREP(ANA_AC_PROBE_CFG_PROBE_CPU_SET, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1186

FIELD_PREP(ANA_AC_SDLB_DLB_MISC_DLB_FRM_RATE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1192

FIELD_PREP(ANA_AC_SDLB_DLB_MISC_MARK_ALL_FRMS_RED_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1198

FIELD_PREP(ANA_AC_SDLB_DLB_MISC_DLB_FRM_ADJ, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1209

FIELD_PREP(ANA_AC_SDLB_DLB_CFG_DROP_ON_YELLOW_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1215

FIELD_PREP(ANA_AC_SDLB_DLB_CFG_DP_BYPASS_LVL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1221

FIELD_PREP(ANA_AC_SDLB_DLB_CFG_HIER_DLB_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1227

FIELD_PREP(ANA_AC_SDLB_DLB_CFG_ENCAP_DATA_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

123

FIELD_PREP(ANA_AC_PROBE_CFG_PROBE_VID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1233

FIELD_PREP(ANA_AC_SDLB_DLB_CFG_COLOR_AWARE_LVL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1239

FIELD_PREP(ANA_AC_SDLB_DLB_CFG_CIR_INC_DP_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1245

FIELD_PREP(ANA_AC_SDLB_DLB_CFG_DLB_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1251

FIELD_PREP(ANA_AC_SDLB_DLB_CFG_TRAFFIC_TYPE_MASK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1262

FIELD_PREP(ANA_CL_FILTER_CTRL_FILTER_SMAC_MC_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1268

FIELD_PREP(ANA_CL_FILTER_CTRL_FILTER_NULL_MAC_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1274

FIELD_PREP(ANA_CL_FILTER_CTRL_FORCE_FCS_UPDATE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1285

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_TAG_REQUIRED_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

129

FIELD_PREP(ANA_AC_PROBE_CFG_PROBE_VLAN_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1291

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_CTAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1297

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_CTAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1303

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_STAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1309

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST1_STAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1315

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST2_STAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1321

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST3_STAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1327

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_STAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1333

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_CUST1_STAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1339

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_CUST2_STAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1345

FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_CUST3_STAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

135

FIELD_PREP(ANA_AC_PROBE_CFG_PROBE_MAC_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1356

FIELD_PREP(ANA_CL_ETAG_FILTER_CTRL_ETAG_REQUIRED_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1362

FIELD_PREP(ANA_CL_ETAG_FILTER_CTRL_ETAG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1373

FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_VOE_TPID_AWARE_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1379

FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_PCP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1385

FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_DEI, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1391

FIELD_PREP(ANA_CL_VLAN_CTRL_VLAN_PCP_DEI_TRANS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1397

FIELD_PREP(ANA_CL_VLAN_CTRL_VLAN_TAG_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1403

FIELD_PREP(ANA_CL_VLAN_CTRL_VLAN_AWARE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1409

FIELD_PREP(ANA_CL_VLAN_CTRL_VLAN_POP_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

141

FIELD_PREP(ANA_AC_PROBE_CFG_PROBE_DIRECTION, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1415

FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_TAG_TYPE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1421

FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_PCP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1427

FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_DEI, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1433

FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_VID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1444

FIELD_PREP(ANA_CL_VLAN_CTRL_2_VLAN_PUSH_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1455

FIELD_PREP(ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_DP_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1461

FIELD_PREP(ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_QOS_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1472

FIELD_PREP(ANA_CL_QOS_CFG_DEFAULT_COSID_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1478

FIELD_PREP(ANA_CL_QOS_CFG_DEFAULT_COSID_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1484

FIELD_PREP(ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1490

FIELD_PREP(ANA_CL_QOS_CFG_DSCP_TRANSLATE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1496

FIELD_PREP(ANA_CL_QOS_CFG_DSCP_KEEP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1502

FIELD_PREP(ANA_CL_QOS_CFG_KEEP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1508

FIELD_PREP(ANA_CL_QOS_CFG_PCP_DEI_DP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1514

FIELD_PREP(ANA_CL_QOS_CFG_PCP_DEI_QOS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1520

FIELD_PREP(ANA_CL_QOS_CFG_DSCP_DP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1526

FIELD_PREP(ANA_CL_QOS_CFG_DSCP_QOS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1532

FIELD_PREP(ANA_CL_QOS_CFG_DEFAULT_DP_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1538

FIELD_PREP(ANA_CL_QOS_CFG_DEFAULT_QOS_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1554

FIELD_PREP(ANA_CL_ADV_CL_CFG_2_USE_CL_TCI0_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1560

FIELD_PREP(ANA_CL_ADV_CL_CFG_2_USE_CL_DSCP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1571

FIELD_PREP(ANA_CL_ADV_CL_CFG_IP4_CLM_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1577

FIELD_PREP(ANA_CL_ADV_CL_CFG_IP6_CLM_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1583

FIELD_PREP(ANA_CL_ADV_CL_CFG_MPLS_UC_CLM_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1589

FIELD_PREP(ANA_CL_ADV_CL_CFG_MPLS_MC_CLM_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1595

FIELD_PREP(ANA_CL_ADV_CL_CFG_MLBS_CLM_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1601

FIELD_PREP(ANA_CL_ADV_CL_CFG_ETYPE_CLM_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1607

FIELD_PREP(ANA_CL_ADV_CL_CFG_LOOKUP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1618

FIELD_PREP(ANA_CL_OWN_UPSID_OWN_UPSID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1629

FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_TRANSLATE_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1635

FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_QOS_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

164

FIELD_PREP(ANA_AC_PROBE_PORT_CFG2_PROBE_PORT_MASK2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1641

FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_DP_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1647

FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_REWR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1653

FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_TRUST_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1664

FIELD_PREP(ANA_CL_QOS_MAP_CFG_DSCP_REWR_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1675

FIELD_PREP(ANA_L2_FWD_CFG_MAC_TBL_SPLIT_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1681

FIELD_PREP(ANA_L2_FWD_CFG_PORT_DEFAULT_BDLB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1687

FIELD_PREP(ANA_L2_FWD_CFG_QUEUE_DEFAULT_SDLB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1693

FIELD_PREP(ANA_L2_FWD_CFG_ISDX_LOOKUP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1699

FIELD_PREP(ANA_L2_FWD_CFG_CPU_DMAC_QU, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1705

FIELD_PREP(ANA_L2_FWD_CFG_LOOPBACK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1711

FIELD_PREP(ANA_L2_FWD_CFG_CPU_DMAC_COPY_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1717

FIELD_PREP(ANA_L2_FWD_CFG_FILTER_MODE_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1723

FIELD_PREP(ANA_L2_FWD_CFG_FLOOD_MIRROR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1729

FIELD_PREP(ANA_L2_FWD_CFG_FLOOD_IGNORE_VLAN_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1735

FIELD_PREP(ANA_L2_FWD_CFG_FLOOD_CPU_COPY_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1741

FIELD_PREP(ANA_L2_FWD_CFG_FWD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1764

FIELD_PREP(ANA_L2_AUTO_LRN_CFG2_AUTO_LRN_ENA2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1776

FIELD_PREP(ANA_L2_OWN_UPSID_OWN_UPSID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1811

FIELD_PREP(ANA_L3_VLAN_CTRL_VLAN_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1822

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_MSTP_PTR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1828

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_FID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1834

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_IGR_FILTER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1840

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_SEC_FWD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1846

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_FLOOD_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1852

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_LRN_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1858

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_RLEG_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1864

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_PRIVATE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

187

FIELD_PREP(ANA_AC_SRC_CFG2_PORT_MASK2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1870

FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_MIRROR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

1893

FIELD_PREP(ANA_L3_VLAN_MASK_CFG2_VLAN_PORT_MASK2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

210

FIELD_PREP(ANA_AC_PGID_CFG2_PORT_MASK2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

221

FIELD_PREP(ANA_AC_PGID_MISC_CFG_PGID_CPU_QU, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

227

FIELD_PREP(ANA_AC_PGID_MISC_CFG_STACK_TYPE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

233

FIELD_PREP(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2349

FIELD_PREP(ASM_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2360

FIELD_PREP(ASM_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2371

FIELD_PREP(ASM_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2382

FIELD_PREP(ASM_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2393

FIELD_PREP(ASM_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2404

FIELD_PREP(ASM_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2415

FIELD_PREP(ASM_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2426

FIELD_PREP(ASM_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

244

FIELD_PREP(ANA_AC_TSN_SF_TSN_STREAM_BLOCK_OVERSIZE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2442

FIELD_PREP(ASM_STAT_CFG_STAT_CNT_CLR_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2453

FIELD_PREP(ASM_PORT_CFG_CSC_STAT_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2459

FIELD_PREP(ASM_PORT_CFG_HIH_AFTER_PREAMBLE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2465

FIELD_PREP(ASM_PORT_CFG_IGN_TAXI_ABORT_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2471

FIELD_PREP(ASM_PORT_CFG_NO_PREAMBLE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2477

FIELD_PREP(ASM_PORT_CFG_SKIP_PREAMBLE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2483

FIELD_PREP(ASM_PORT_CFG_FRM_AGING_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2489

FIELD_PREP(ASM_PORT_CFG_PAD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2495

FIELD_PREP(ASM_PORT_CFG_INJ_DISCARD_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2501

FIELD_PREP(ASM_PORT_CFG_INJ_FORMAT_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2507

FIELD_PREP(ASM_PORT_CFG_VSTAX2_AWR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2513

FIELD_PREP(ASM_PORT_CFG_PFRM_FLUSH, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2524

FIELD_PREP(ASM_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2530

FIELD_PREP(ASM_RAM_INIT_RAM_CFG_HOOK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2541

FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2547

FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2553

FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2559

FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2565

FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2571

FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2639

FIELD_PREP(CPU_PROC_CTRL_ACP_CACHE_FORCE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2646

FIELD_PREP(CPU_PROC_CTRL_ACP_AWCACHE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2653

FIELD_PREP(CPU_PROC_CTRL_ACP_ARCACHE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2667

FIELD_PREP(CPU_PROC_CTRL_ACP_DISABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2686

FIELD_PREP(DEV2G5_PHAD_CTRL_DIV_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

269

FIELD_PREP(ANA_AC_TSN_SF_CFG_TSN_MAX_SDU, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2705

FIELD_PREP(DEV2G5_PHAD_CTRL_DIV_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2716

FIELD_PREP(DEV10G_MAC_ENA_CFG_RX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2722

FIELD_PREP(DEV10G_MAC_ENA_CFG_TX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2733

FIELD_PREP(DEV10G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2739

FIELD_PREP(DEV10G_MAC_MAXLEN_CFG_MAX_LEN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

275

FIELD_PREP(ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2750

FIELD_PREP(DEV10G_MAC_NUM_TAGS_CFG_NUM_TAGS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2761

FIELD_PREP(DEV10G_MAC_TAGS_CFG_TAG_ID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2767

FIELD_PREP(DEV10G_MAC_TAGS_CFG_TAG_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2778

FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2784

FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2790

FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2796

FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2802

FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2808

FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

281

FIELD_PREP(ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_STATE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2814

FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2825

FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_LOCAL_ERR_STATE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2831

FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_REMOTE_ERR_STATE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2837

FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_LINK_INTERRUPTION_STATE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2843

FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_IDLE_STATE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2849

FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_DIS_STATE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2860

FIELD_PREP(DEV10G_DEV_RST_CTRL_PARDET_MODE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2866

FIELD_PREP(DEV10G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2872

FIELD_PREP(DEV10G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2878

FIELD_PREP(DEV10G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2884

FIELD_PREP(DEV10G_DEV_RST_CTRL_SPEED_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2890

FIELD_PREP(DEV10G_DEV_RST_CTRL_PCS_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2896

FIELD_PREP(DEV10G_DEV_RST_CTRL_PCS_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2902

FIELD_PREP(DEV10G_DEV_RST_CTRL_MAC_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2908

FIELD_PREP(DEV10G_DEV_RST_CTRL_MAC_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

292

FIELD_PREP(ANA_AC_TSN_SF_STATUS_FRM_LEN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2924

FIELD_PREP(DEV10G_PCS25G_CFG_PCS25G_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2935

FIELD_PREP(DEV25G_MAC_ENA_CFG_RX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2941

FIELD_PREP(DEV25G_MAC_ENA_CFG_TX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2952

FIELD_PREP(DEV25G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2958

FIELD_PREP(DEV25G_MAC_MAXLEN_CFG_MAX_LEN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2969

FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2975

FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

298

FIELD_PREP(ANA_AC_TSN_SF_STATUS_DLB_DROP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2981

FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2987

FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2993

FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

2999

FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3005

FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3016

FIELD_PREP(DEV25G_DEV_RST_CTRL_PARDET_MODE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3022

FIELD_PREP(DEV25G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3028

FIELD_PREP(DEV25G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3034

FIELD_PREP(DEV25G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3040

FIELD_PREP(DEV25G_DEV_RST_CTRL_SPEED_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3046

FIELD_PREP(DEV25G_DEV_RST_CTRL_PCS_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3052

FIELD_PREP(DEV25G_DEV_RST_CTRL_PCS_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3058

FIELD_PREP(DEV25G_DEV_RST_CTRL_MAC_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3064

FIELD_PREP(DEV25G_DEV_RST_CTRL_MAC_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3075

FIELD_PREP(DEV25G_PCS25G_CFG_PCS25G_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3086

FIELD_PREP(DEV25G_PCS25G_SD_CFG_SD_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3092

FIELD_PREP(DEV25G_PCS25G_SD_CFG_SD_POL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3098

FIELD_PREP(DEV25G_PCS25G_SD_CFG_SD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3109

FIELD_PREP(DEV2G5_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

311

FIELD_PREP(ANA_AC_TSN_SF_STATUS_TSTAMP_VLD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3115

FIELD_PREP(DEV2G5_DEV_RST_CTRL_SPEED_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3121

FIELD_PREP(DEV2G5_DEV_RST_CTRL_USX_PCS_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3127

FIELD_PREP(DEV2G5_DEV_RST_CTRL_USX_PCS_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3133

FIELD_PREP(DEV2G5_DEV_RST_CTRL_PCS_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3139

FIELD_PREP(DEV2G5_DEV_RST_CTRL_PCS_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3145

FIELD_PREP(DEV2G5_DEV_RST_CTRL_MAC_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3151

FIELD_PREP(DEV2G5_DEV_RST_CTRL_MAC_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3162

FIELD_PREP(DEV2G5_MAC_ENA_CFG_RX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3168

FIELD_PREP(DEV2G5_MAC_ENA_CFG_TX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3179

FIELD_PREP(DEV2G5_MAC_MODE_CFG_FC_WORD_SYNC_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3185

FIELD_PREP(DEV2G5_MAC_MODE_CFG_GIGA_MODE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3191

FIELD_PREP(DEV2G5_MAC_MODE_CFG_FDX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3202

FIELD_PREP(DEV2G5_MAC_MAXLEN_CFG_MAX_LEN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3213

FIELD_PREP(DEV2G5_MAC_TAGS_CFG_TAG_ID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3219

FIELD_PREP(DEV2G5_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3225

FIELD_PREP(DEV2G5_MAC_TAGS_CFG_PB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3231

FIELD_PREP(DEV2G5_MAC_TAGS_CFG_VLAN_AWR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3242

FIELD_PREP(DEV2G5_MAC_TAGS_CFG2_TAG_ID3, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3248

FIELD_PREP(DEV2G5_MAC_TAGS_CFG2_TAG_ID2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3259

FIELD_PREP(DEV2G5_MAC_ADV_CHK_CFG_LEN_DROP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3270

FIELD_PREP(DEV2G5_MAC_IFG_CFG_RESTORE_OLD_IPG_CHECK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3276

FIELD_PREP(DEV2G5_MAC_IFG_CFG_TX_IFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3282

FIELD_PREP(DEV2G5_MAC_IFG_CFG_RX_IFG2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3288

FIELD_PREP(DEV2G5_MAC_IFG_CFG_RX_IFG1, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

329

FIELD_PREP(ANA_AC_SG_ACCESS_CTRL_CONFIG_CHANGE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3299

FIELD_PREP(DEV2G5_MAC_HDX_CFG_BYPASS_COL_SYNC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3305

FIELD_PREP(DEV2G5_MAC_HDX_CFG_SEED, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3311

FIELD_PREP(DEV2G5_MAC_HDX_CFG_SEED_LOAD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3317

FIELD_PREP(DEV2G5_MAC_HDX_CFG_RETRY_AFTER_EXC_COL_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3323

FIELD_PREP(DEV2G5_MAC_HDX_CFG_LATE_COL_POS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3334

FIELD_PREP(DEV2G5_PCS1G_CFG_LINK_STATUS_TYPE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3340

FIELD_PREP(DEV2G5_PCS1G_CFG_AN_LINK_CTRL_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3346

FIELD_PREP(DEV2G5_PCS1G_CFG_PCS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3357

FIELD_PREP(DEV2G5_PCS1G_MODE_CFG_UNIDIR_MODE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3363

FIELD_PREP(DEV2G5_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3369

FIELD_PREP(DEV2G5_PCS1G_MODE_CFG_SGMII_MODE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3380

FIELD_PREP(DEV2G5_PCS1G_SD_CFG_SD_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3386

FIELD_PREP(DEV2G5_PCS1G_SD_CFG_SD_POL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3392

FIELD_PREP(DEV2G5_PCS1G_SD_CFG_SD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

340

FIELD_PREP(ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_CLKS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3403

FIELD_PREP(DEV2G5_PCS1G_ANEG_CFG_ADV_ABILITY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3409

FIELD_PREP(DEV2G5_PCS1G_ANEG_CFG_SW_RESOLVE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3415

FIELD_PREP(DEV2G5_PCS1G_ANEG_CFG_ANEG_RESTART_ONE_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3421

FIELD_PREP(DEV2G5_PCS1G_ANEG_CFG_ANEG_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3432

FIELD_PREP(DEV2G5_PCS1G_LB_CFG_RA_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3438

FIELD_PREP(DEV2G5_PCS1G_LB_CFG_GMII_PHY_LB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3444

FIELD_PREP(DEV2G5_PCS1G_LB_CFG_TBI_HOST_LB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3455

FIELD_PREP(DEV2G5_PCS1G_ANEG_STATUS_LP_ADV_ABILITY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

346

FIELD_PREP(ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_UPDATE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3461

FIELD_PREP(DEV2G5_PCS1G_ANEG_STATUS_PR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3467

FIELD_PREP(DEV2G5_PCS1G_ANEG_STATUS_PAGE_RX_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3473

FIELD_PREP(DEV2G5_PCS1G_ANEG_STATUS_ANEG_COMPLETE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3484

FIELD_PREP(DEV2G5_PCS1G_LINK_STATUS_DELAY_VAR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3490

FIELD_PREP(DEV2G5_PCS1G_LINK_STATUS_SIGNAL_DETECT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3496

FIELD_PREP(DEV2G5_PCS1G_LINK_STATUS_LINK_STATUS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3502

FIELD_PREP(DEV2G5_PCS1G_LINK_STATUS_SYNC_STATUS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3513

FIELD_PREP(DEV2G5_PCS1G_STICKY_LINK_DOWN_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3519

FIELD_PREP(DEV2G5_PCS1G_STICKY_OUT_OF_SYNC_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3530

FIELD_PREP(DEV2G5_PCS_FX100_CFG_SD_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3536

FIELD_PREP(DEV2G5_PCS_FX100_CFG_SD_POL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3542

FIELD_PREP(DEV2G5_PCS_FX100_CFG_SD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3548

FIELD_PREP(DEV2G5_PCS_FX100_CFG_LOOPBACK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3554

FIELD_PREP(DEV2G5_PCS_FX100_CFG_SWAP_MII_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3560

FIELD_PREP(DEV2G5_PCS_FX100_CFG_RXBITSEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3566

FIELD_PREP(DEV2G5_PCS_FX100_CFG_SIGDET_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3572

FIELD_PREP(DEV2G5_PCS_FX100_CFG_LINKHYST_TM_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3578

FIELD_PREP(DEV2G5_PCS_FX100_CFG_LINKHYSTTIMER, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3584

FIELD_PREP(DEV2G5_PCS_FX100_CFG_UNIDIR_MODE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3590

FIELD_PREP(DEV2G5_PCS_FX100_CFG_FEFCHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3596

FIELD_PREP(DEV2G5_PCS_FX100_CFG_FEFGEN_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3602

FIELD_PREP(DEV2G5_PCS_FX100_CFG_PCS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3613

FIELD_PREP(DEV2G5_PCS_FX100_STATUS_EDGE_POS_PTP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3619

FIELD_PREP(DEV2G5_PCS_FX100_STATUS_PCS_ERROR_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3625

FIELD_PREP(DEV2G5_PCS_FX100_STATUS_FEF_FOUND_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3631

FIELD_PREP(DEV2G5_PCS_FX100_STATUS_SSD_ERROR_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3637

FIELD_PREP(DEV2G5_PCS_FX100_STATUS_SYNC_LOST_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3643

FIELD_PREP(DEV2G5_PCS_FX100_STATUS_FEF_STATUS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3649

FIELD_PREP(DEV2G5_PCS_FX100_STATUS_SIGNAL_DETECT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3655

FIELD_PREP(DEV2G5_PCS_FX100_STATUS_SYNC_STATUS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3665

FIELD_PREP(DEV5G_MAC_ENA_CFG_RX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

367

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_BASE_TIME_SEC_MSB, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3671

FIELD_PREP(DEV5G_MAC_ENA_CFG_TX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3681

FIELD_PREP(DEV5G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3687

FIELD_PREP(DEV5G_MAC_MAXLEN_CFG_MAX_LEN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3698

FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3704

FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3710

FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3716

FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3722

FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3728

FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

373

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_LIST_LENGTH, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

3734

FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

379

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_GATE_ENABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

385

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_INIT_IPS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

391

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_INIT_GATE_STATE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

397

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_INVALID_RX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

403

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_INVALID_RX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

409

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4140

FIELD_PREP(DEV5G_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

415

FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4156

FIELD_PREP(DEV5G_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4172

FIELD_PREP(DEV5G_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4188

FIELD_PREP(DEV5G_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4204

FIELD_PREP(DEV5G_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4220

FIELD_PREP(DEV5G_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4236

FIELD_PREP(DEV5G_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4252

FIELD_PREP(DEV5G_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4263

FIELD_PREP(DEV5G_DEV_RST_CTRL_PARDET_MODE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4269

FIELD_PREP(DEV5G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4275

FIELD_PREP(DEV5G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4281

FIELD_PREP(DEV5G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4287

FIELD_PREP(DEV5G_DEV_RST_CTRL_SPEED_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4293

FIELD_PREP(DEV5G_DEV_RST_CTRL_PCS_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4299

FIELD_PREP(DEV5G_DEV_RST_CTRL_PCS_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4305

FIELD_PREP(DEV5G_DEV_RST_CTRL_MAC_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4311

FIELD_PREP(DEV5G_DEV_RST_CTRL_MAC_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4326

FIELD_PREP(DSM_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4332

FIELD_PREP(DSM_RAM_INIT_RAM_CFG_HOOK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4343

FIELD_PREP(DSM_BUF_CFG_CSC_STAT_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4349

FIELD_PREP(DSM_BUF_CFG_AGING_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4355

FIELD_PREP(DSM_BUF_CFG_UNDERFLOW_WATCHDOG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

436

FIELD_PREP(ANA_AC_SG_GCL_GS_CONFIG_IPS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4361

FIELD_PREP(DSM_BUF_CFG_UNDERFLOW_WATCHDOG_TIMEOUT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4372

FIELD_PREP(DSM_DEV_TX_STOP_WM_CFG_FAST_STARTUP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4378

FIELD_PREP(DSM_DEV_TX_STOP_WM_CFG_DEV10G_SHADOW_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4384

FIELD_PREP(DSM_DEV_TX_STOP_WM_CFG_DEV_TX_STOP_WM, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4390

FIELD_PREP(DSM_DEV_TX_STOP_WM_CFG_DEV_TX_CNT_CLR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4401

FIELD_PREP(DSM_RX_PAUSE_CFG_RX_PAUSE_EN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4407

FIELD_PREP(DSM_RX_PAUSE_CFG_FC_OBEY_LOCAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4418

FIELD_PREP(DSM_MAC_CFG_TX_PAUSE_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

442

FIELD_PREP(ANA_AC_SG_GCL_GS_CONFIG_GATE_STATE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4424

FIELD_PREP(DSM_MAC_CFG_HDX_BACKPREASSURE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4430

FIELD_PREP(DSM_MAC_CFG_SEND_PAUSE_FRM_TWICE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4436

FIELD_PREP(DSM_MAC_CFG_TX_PAUSE_XON_XOFF, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4447

FIELD_PREP(DSM_MAC_ADDR_BASE_HIGH_CFG_MAC_ADDR_HIGH, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4458

FIELD_PREP(DSM_MAC_ADDR_BASE_LOW_CFG_MAC_ADDR_LOW, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4469

FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_IDX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4475

FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_CUR_LEN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4481

FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_CUR_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4487

FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_PGM_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4493

FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_PGM_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4500

FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_SEL_STAT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4507

FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_SWITCH, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4514

FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_PGM_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4525

FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4531

FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4537

FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4543

FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_KEY_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4559

FIELD_PREP(EACL_POL_EACL_CFG_EACL_CNT_MARKED_AS_DROPPED, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4565

FIELD_PREP(EACL_POL_EACL_CFG_EACL_ALLOW_FP_COPY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4571

FIELD_PREP(EACL_POL_EACL_CFG_EACL_ALLOW_CPU_COPY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4577

FIELD_PREP(EACL_POL_EACL_CFG_EACL_FORCE_CLOSE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4583

FIELD_PREP(EACL_POL_EACL_CFG_EACL_FORCE_OPEN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4589

FIELD_PREP(EACL_POL_EACL_CFG_EACL_FORCE_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4600

FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4606

FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4612

FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4618

FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4624

FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4630

FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4636

FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4642

FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4653

FIELD_PREP(EACL_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4659

FIELD_PREP(EACL_RAM_INIT_RAM_CFG_HOOK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4670

FIELD_PREP(FDMA_CH_ACTIVATE_CH_ACTIVATE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4681

FIELD_PREP(FDMA_CH_RELOAD_CH_RELOAD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4692

FIELD_PREP(FDMA_CH_DISABLE_CH_DISABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

473

FIELD_PREP(ANA_AC_SG_STATUS_REG_3_CFG_CHG_TIME_SEC_MSB, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4751

FIELD_PREP(FDMA_CH_CFG_CH_MEM, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4762

FIELD_PREP(FDMA_CH_TRANSLATE_OFFSET, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4773

FIELD_PREP(FDMA_XTR_CFG_XTR_FIFO_WM, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4779

FIELD_PREP(FDMA_XTR_CFG_XTR_ARB_SAT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

479

FIELD_PREP(ANA_AC_SG_STATUS_REG_3_GATE_STATE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4790

FIELD_PREP(FDMA_PORT_CTRL_INJ_STOP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4796

FIELD_PREP(FDMA_PORT_CTRL_INJ_STOP_FORCE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4802

FIELD_PREP(FDMA_PORT_CTRL_XTR_STOP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4808

FIELD_PREP(FDMA_PORT_CTRL_XTR_BUF_IS_EMPTY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4814

FIELD_PREP(FDMA_PORT_CTRL_XTR_BUF_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4825

FIELD_PREP(FDMA_INTR_DCB_INTR_DCB, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4836

FIELD_PREP(FDMA_INTR_DCB_ENA_INTR_DCB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4847

FIELD_PREP(FDMA_INTR_DB_INTR_DB, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

485

FIELD_PREP(ANA_AC_SG_STATUS_REG_3_IPS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4858

FIELD_PREP(FDMA_INTR_DB_ENA_INTR_DB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4869

FIELD_PREP(FDMA_INTR_ERR_INTR_PORT_ERR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4875

FIELD_PREP(FDMA_INTR_ERR_INTR_CH_ERR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4886

FIELD_PREP(FDMA_ERRORS_ERR_XTR_WR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4892

FIELD_PREP(FDMA_ERRORS_ERR_XTR_OVF, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4898

FIELD_PREP(FDMA_ERRORS_ERR_XTR_TAXI32_OVF, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4904

FIELD_PREP(FDMA_ERRORS_ERR_DCB_XTR_DATAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

491

FIELD_PREP(ANA_AC_SG_STATUS_REG_3_CONFIG_PENDING, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4910

FIELD_PREP(FDMA_ERRORS_ERR_DCB_RD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4916

FIELD_PREP(FDMA_ERRORS_ERR_INJ_RD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4922

FIELD_PREP(FDMA_ERRORS_ERR_INJ_OUT_OF_SYNC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4928

FIELD_PREP(FDMA_ERRORS_ERR_CH_WR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4939

FIELD_PREP(FDMA_ERRORS_2_ERR_XTR_FRAG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4950

FIELD_PREP(FDMA_CTRL_NRESET, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4961

FIELD_PREP(GCB_CHIP_ID_REV_ID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4967

FIELD_PREP(GCB_CHIP_ID_PART_ID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

497

FIELD_PREP(ANA_AC_SG_STATUS_REG_3_GCL_OCTET_INDEX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4973

FIELD_PREP(GCB_CHIP_ID_MFG_ID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4979

FIELD_PREP(GCB_CHIP_ID_ONE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4991

FIELD_PREP(GCB_SOFT_RST_SOFT_NON_CFG_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

4997

FIELD_PREP(GCB_SOFT_RST_SOFT_SWC_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5003

FIELD_PREP(GCB_SOFT_RST_SOFT_CHIP_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5015

FIELD_PREP(GCB_HW_SGPIO_SD_CFG_SD_HIGH_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5021

FIELD_PREP(GCB_HW_SGPIO_SD_CFG_SD_MAP_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5045

FIELD_PREP(GCB_SIO_CLOCK_SIO_CLK_FREQ, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5051

FIELD_PREP(GCB_SIO_CLOCK_SYS_CLK_PERIOD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5062

FIELD_PREP(HSCH_CIR_CFG_CIR_RATE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5068

FIELD_PREP(HSCH_CIR_CFG_CIR_BURST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5079

FIELD_PREP(HSCH_EIR_CFG_EIR_RATE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5085

FIELD_PREP(HSCH_EIR_CFG_EIR_BURST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5103

FIELD_PREP(HSCH_SE_CFG_SE_AVB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5109

FIELD_PREP(HSCH_SE_CFG_SE_FRM_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5115

FIELD_PREP(HSCH_SE_CFG_SE_DWRR_FRM_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5121

FIELD_PREP(HSCH_SE_CFG_SE_STOP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5144

FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_PRIO, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5157

FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_SE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5163

FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_PRIO_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5169

FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_DPORT_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5180

FIELD_PREP(HSCH_DWRR_ENTRY_DWRR_COST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5186

FIELD_PREP(HSCH_DWRR_ENTRY_DWRR_BALANCE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5204

FIELD_PREP(HSCH_HSCH_CFG_CFG_HSCH_LAYER, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5210

FIELD_PREP(HSCH_HSCH_CFG_CFG_CSR_GRANT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5222

FIELD_PREP(HSCH_SYS_CLK_PER_100PS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5233

FIELD_PREP(HSCH_HSCH_TIMER_CFG_LEAK_TIME, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

525

FIELD_PREP(ANA_AC_STAT_RESET_RESET, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5251

FIELD_PREP(HSCH_HSCH_LEAK_CFG_LEAK_ERR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5262

FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5268

FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_SRC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5274

FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_DST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5287

FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_QUEUE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5293

FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_SE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5311

FIELD_PREP(HSCH_PORT_MODE_DEQUEUE_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5317

FIELD_PREP(HSCH_PORT_MODE_AGE_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5323

FIELD_PREP(HSCH_PORT_MODE_TRUNC_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5329

FIELD_PREP(HSCH_PORT_MODE_EIR_REMARK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5335

FIELD_PREP(HSCH_PORT_MODE_CPU_PRIO_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5346

FIELD_PREP(HSCH_OUTB_SHARE_ENA_OUTB_SHARE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5357

FIELD_PREP(HSCH_RESET_CFG_CORE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

536

FIELD_PREP(ANA_AC_PORT_STAT_CFG_CFG_PRIO_MASK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5368

FIELD_PREP(HSCH_TAS_STATEMACHINE_CFG_REVISIT_DLY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5379

FIELD_PREP(HSIO_WRAP_XMII_CFG_GPIO_XMII_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5390

FIELD_PREP(HSIO_WRAP_RGMII_CFG_TX_CLK_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5396

FIELD_PREP(HSIO_WRAP_RGMII_CFG_RGMII_TX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5402

FIELD_PREP(HSIO_WRAP_RGMII_CFG_RGMII_RX_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5413

FIELD_PREP(HSIO_WRAP_DLL_CFG_DLL_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5419

FIELD_PREP(HSIO_WRAP_DLL_CFG_DLL_CLK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

542

FIELD_PREP(ANA_AC_PORT_STAT_CFG_CFG_CNT_FRM_TYPE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5425

FIELD_PREP(HSIO_WRAP_DLL_CFG_DLL_CLK_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5431

FIELD_PREP(HSIO_WRAP_DLL_CFG_DLL_RST, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5441

FIELD_PREP(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_COL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5447

FIELD_PREP(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_TYPE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5460

FIELD_PREP(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5466

FIELD_PREP(LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5476

FIELD_PREP(LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_FID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

548

FIELD_PREP(ANA_AC_PORT_STAT_CFG_CFG_CNT_BYTE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5482

FIELD_PREP(LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_MAC_MSB, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5496

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_SRC_KILL_FWD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5502

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_NXT_LRN_ALL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5508

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_QU, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5514

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_COPY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5520

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLAN_IGNORE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5526

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_MIRROR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5532

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_FLAG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5538

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_INTERVAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5544

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_LOCKED, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5550

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5556

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_TYPE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5562

FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5583

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_AGE_FLAG_UPDATE_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5589

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NXT_LRN_ALL_UPDATE_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5595

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_AGE_FILTER_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5601

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_MOVE_FOUND_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5607

FIELD_PREP(LRN_SCAN_NEXT_CFG_NXT_LRN_ALL_FILTER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5613

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_USE_PORT_FILTER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5619

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_REMOVE_FOUND_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5625

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_UNTIL_FOUND_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5631

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_INC_AGE_BITS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5637

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_AGED_ONLY_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

564

FIELD_PREP(ANA_AC_ACL_GLOBAL_CNT_FRM_TYPE_CFG_GLOBAL_CFG_CNT_FRM_TYPE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5643

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_IGNORE_LOCKED_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5649

FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_AGE_INTERVAL_MASK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5655

FIELD_PREP(LRN_SCAN_NEXT_CFG_ISDX_LIMIT_IDX_FILTER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5661

FIELD_PREP(LRN_SCAN_NEXT_CFG_FID_FILTER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5667

FIELD_PREP(LRN_SCAN_NEXT_CFG_ADDR_FILTER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5677

FIELD_PREP(LRN_SCAN_NEXT_CFG_1_PORT_MOVE_NEW_ADDR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5683

FIELD_PREP(LRN_SCAN_NEXT_CFG_1_SCAN_ENTRY_ADDR_MASK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5693

FIELD_PREP(LRN_AUTOAGE_CFG_UNIT_SIZE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5699

FIELD_PREP(LRN_AUTOAGE_CFG_PERIOD_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5709

FIELD_PREP(LRN_AUTOAGE_CFG_1_PAUSE_AUTO_AGE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5715

FIELD_PREP(LRN_AUTOAGE_CFG_1_CELLS_BETWEEN_ENTRY_SCAN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5721

FIELD_PREP(LRN_AUTOAGE_CFG_1_CLK_PERIOD_01NS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5727

FIELD_PREP(LRN_AUTOAGE_CFG_1_USE_PORT_FILTER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5733

FIELD_PREP(LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5739

FIELD_PREP(LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_STOP_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5745

FIELD_PREP(LRN_AUTOAGE_CFG_1_FORCE_IDLE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

575

FIELD_PREP(ANA_AC_ACL_STAT_GLOBAL_CFG_GLOBAL_CFG_CNT_BYTE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5762

FIELD_PREP(LRN_AUTOAGE_CFG_2_SCAN_ONGOING_STATUS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5773

FIELD_PREP(PCEP_RCTRL_2_OUT_0_MSG_CODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5779

FIELD_PREP(PCEP_RCTRL_2_OUT_0_TAG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5785

FIELD_PREP(PCEP_RCTRL_2_OUT_0_TAG_SUBSTITUTE_EN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5791

FIELD_PREP(PCEP_RCTRL_2_OUT_0_FUNC_BYPASS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5797

FIELD_PREP(PCEP_RCTRL_2_OUT_0_SNP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5803

FIELD_PREP(PCEP_RCTRL_2_OUT_0_INHIBIT_PAYLOAD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5809

FIELD_PREP(PCEP_RCTRL_2_OUT_0_HEADER_SUBSTITUTE_EN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5815

FIELD_PREP(PCEP_RCTRL_2_OUT_0_CFG_SHIFT_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5821

FIELD_PREP(PCEP_RCTRL_2_OUT_0_INVERT_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5827

FIELD_PREP(PCEP_RCTRL_2_OUT_0_REGION_EN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5838

FIELD_PREP(PCEP_ADDR_LWR_OUT_0_LWR_BASE_HW, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5844

FIELD_PREP(PCEP_ADDR_LWR_OUT_0_LWR_BASE_RW, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

586

FIELD_PREP(ANA_AC_ACL_STAT_GLOBAL_EVENT_MASK_GLOBAL_EVENT_MASK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5860

FIELD_PREP(PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_HW, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5866

FIELD_PREP(PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_RW, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5887

FIELD_PREP(PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_RW, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5893

FIELD_PREP(PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_HW, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5904

FIELD_PREP(PCS10G_BR_PCS_CFG_PCS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5910

FIELD_PREP(PCS10G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5916

FIELD_PREP(PCS10G_BR_PCS_CFG_SH_CNT_MAX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5922

FIELD_PREP(PCS10G_BR_PCS_CFG_RX_DATA_FLIP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5928

FIELD_PREP(PCS10G_BR_PCS_CFG_RESYNC_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5934

FIELD_PREP(PCS10G_BR_PCS_CFG_LF_GEN_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5940

FIELD_PREP(PCS10G_BR_PCS_CFG_RX_TEST_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5946

FIELD_PREP(PCS10G_BR_PCS_CFG_RX_SCR_DISABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5952

FIELD_PREP(PCS10G_BR_PCS_CFG_TX_DATA_FLIP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5958

FIELD_PREP(PCS10G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5964

FIELD_PREP(PCS10G_BR_PCS_CFG_TX_TEST_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

597

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_ROUTE_HANDLING_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5970

FIELD_PREP(PCS10G_BR_PCS_CFG_TX_SCR_DISABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5981

FIELD_PREP(PCS10G_BR_PCS_SD_CFG_SD_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5987

FIELD_PREP(PCS10G_BR_PCS_SD_CFG_SD_POL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

5993

FIELD_PREP(PCS10G_BR_PCS_SD_CFG_SD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6004

FIELD_PREP(PCS25G_BR_PCS_CFG_PCS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6010

FIELD_PREP(PCS25G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6016

FIELD_PREP(PCS25G_BR_PCS_CFG_SH_CNT_MAX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6022

FIELD_PREP(PCS25G_BR_PCS_CFG_RX_DATA_FLIP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6028

FIELD_PREP(PCS25G_BR_PCS_CFG_RESYNC_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

603

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_OAM_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6034

FIELD_PREP(PCS25G_BR_PCS_CFG_LF_GEN_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6040

FIELD_PREP(PCS25G_BR_PCS_CFG_RX_TEST_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6046

FIELD_PREP(PCS25G_BR_PCS_CFG_RX_SCR_DISABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6052

FIELD_PREP(PCS25G_BR_PCS_CFG_TX_DATA_FLIP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6058

FIELD_PREP(PCS25G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6064

FIELD_PREP(PCS25G_BR_PCS_CFG_TX_TEST_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6070

FIELD_PREP(PCS25G_BR_PCS_CFG_TX_SCR_DISABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6081

FIELD_PREP(PCS25G_BR_PCS_SD_CFG_SD_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6087

FIELD_PREP(PCS25G_BR_PCS_SD_CFG_SD_POL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

609

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_OTHER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6093

FIELD_PREP(PCS25G_BR_PCS_SD_CFG_SD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6104

FIELD_PREP(PCS5G_BR_PCS_CFG_PCS_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6110

FIELD_PREP(PCS5G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6116

FIELD_PREP(PCS5G_BR_PCS_CFG_SH_CNT_MAX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6122

FIELD_PREP(PCS5G_BR_PCS_CFG_RX_DATA_FLIP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6128

FIELD_PREP(PCS5G_BR_PCS_CFG_RESYNC_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6134

FIELD_PREP(PCS5G_BR_PCS_CFG_LF_GEN_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6140

FIELD_PREP(PCS5G_BR_PCS_CFG_RX_TEST_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6146

FIELD_PREP(PCS5G_BR_PCS_CFG_RX_SCR_DISABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

615

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_VID_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6152

FIELD_PREP(PCS5G_BR_PCS_CFG_TX_DATA_FLIP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6158

FIELD_PREP(PCS5G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6164

FIELD_PREP(PCS5G_BR_PCS_CFG_TX_TEST_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6170

FIELD_PREP(PCS5G_BR_PCS_CFG_TX_SCR_DISABLE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6181

FIELD_PREP(PCS5G_BR_PCS_SD_CFG_SD_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6187

FIELD_PREP(PCS5G_BR_PCS_SD_CFG_SD_POL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6193

FIELD_PREP(PCS5G_BR_PCS_SD_CFG_SD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6204

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D0_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

621

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_STD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6211

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D1_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6218

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D2_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6225

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D3_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6232

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D4_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6239

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D5_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6246

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D6_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6253

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D7_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6260

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D8_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6266

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D9_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

627

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6273

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D10_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6280

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D11_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6287

FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D64_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6297

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D12_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6304

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D13_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6311

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D14_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6318

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D15_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6325

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D48_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

633

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP_7TUPLE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6332

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D49_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6339

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D50_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6346

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D51_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6353

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D52_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6360

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D53_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6367

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D54_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6374

FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D55_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6385

FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D56_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

639

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_VID_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6391

FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D57_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6397

FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D58_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6403

FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D59_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6409

FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D60_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6415

FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D61_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6421

FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D62_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6427

FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D63_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6437

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_0, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6443

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_1, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6449

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

645

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_TCPUDP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6455

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_3, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6461

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_4, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6467

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_5, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6474

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_6, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6481

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_7, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6488

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_8, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6495

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_9, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6502

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_10, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6509

FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_11, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

651

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_OTHER_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6520

FIELD_PREP(PORT_CONF_USGMII_CFG_BYPASS_SCRAM, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6526

FIELD_PREP(PORT_CONF_USGMII_CFG_BYPASS_DESCRAM, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6532

FIELD_PREP(PORT_CONF_USGMII_CFG_FLIP_LANES, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6538

FIELD_PREP(PORT_CONF_USGMII_CFG_SHYST_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6544

FIELD_PREP(PORT_CONF_USGMII_CFG_E_DET_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6550

FIELD_PREP(PORT_CONF_USGMII_CFG_USE_I1_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6556

FIELD_PREP(PORT_CONF_USGMII_CFG_QUAD_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

657

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_ARP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6603

FIELD_PREP(PTP_PTP_DOM_CFG_PTP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6609

FIELD_PREP(PTP_PTP_DOM_CFG_PTP_HOLD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6615

FIELD_PREP(PTP_PTP_DOM_CFG_PTP_TOD_FREEZE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6621

FIELD_PREP(PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

663

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_SNAP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6637

FIELD_PREP(PTP_PTP_CUR_NSEC_PTP_CUR_NSEC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6648

FIELD_PREP(PTP_PTP_CUR_NSEC_FRAC_PTP_CUR_NSEC_FRAC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6664

FIELD_PREP(PTP_PTP_CUR_SEC_MSB_PTP_CUR_SEC_MSB, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

669

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_LLC_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6708

FIELD_PREP(PTP_PTP_PIN_CFG_PTP_CLK_SELECT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6714

FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_DOM, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6720

FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_OPT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6726

FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_EMBEDDED_CLK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6732

FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_OUTP_OFS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6743

FIELD_PREP(PTP_PTP_TOD_SEC_MSB_PTP_TOD_SEC_MSB, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

675

FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6759

FIELD_PREP(PTP_PTP_TOD_NSEC_PTP_TOD_NSEC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6770

FIELD_PREP(PTP_PTP_TOD_NSEC_FRAC_PTP_TOD_NSEC_FRAC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6786

FIELD_PREP(PTP_PIN_WF_HIGH_PERIOD_PIN_WFH, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6797

FIELD_PREP(PTP_PIN_WF_LOW_PERIOD_PIN_WFL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6808

FIELD_PREP(PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6814

FIELD_PREP(PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6841

FIELD_PREP(PTP_PHAD_CTRL_REDUCED_RES, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6847

FIELD_PREP(PTP_PHAD_CTRL_LOCK_ACC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

686

FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_DMAC_REPL_OFFSET_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6864

FIELD_PREP(PTP_TWOSTEP_CTRL_PTP_OVWR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6870

FIELD_PREP(PTP_TWOSTEP_CTRL_PTP_NXT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6876

FIELD_PREP(PTP_TWOSTEP_CTRL_PTP_VLD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6882

FIELD_PREP(PTP_TWOSTEP_CTRL_STAMP_TX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6888

FIELD_PREP(PTP_TWOSTEP_CTRL_STAMP_PORT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6894

FIELD_PREP(PTP_TWOSTEP_CTRL_PTP_OVFL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6905

FIELD_PREP(PTP_TWOSTEP_STAMP_NSEC_NS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6916

FIELD_PREP(PTP_TWOSTEP_STAMP_SUBNS_NS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

692

FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6927

FIELD_PREP(QFWD_SWITCH_PORT_MODE_PORT_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6933

FIELD_PREP(QFWD_SWITCH_PORT_MODE_FWD_URGENCY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6939

FIELD_PREP(QFWD_SWITCH_PORT_MODE_YEL_RSRVD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6945

FIELD_PREP(QFWD_SWITCH_PORT_MODE_INGRESS_DROP_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6951

FIELD_PREP(QFWD_SWITCH_PORT_MODE_IGR_NO_SHARING, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6957

FIELD_PREP(QFWD_SWITCH_PORT_MODE_EGR_NO_SHARING, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6963

FIELD_PREP(QFWD_SWITCH_PORT_MODE_EGRESS_DROP_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6969

FIELD_PREP(QFWD_SWITCH_PORT_MODE_EGRESS_RSRV_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

6975

FIELD_PREP(QFWD_SWITCH_PORT_MODE_LEARNALL_MORE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

698

FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_VAL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7029

FIELD_PREP(QS_XTR_GRP_CFG_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7035

FIELD_PREP(QS_XTR_GRP_CFG_STATUS_WORD_POS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

704

FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7041

FIELD_PREP(QS_XTR_GRP_CFG_BYTE_SWAP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7055

FIELD_PREP(QS_XTR_FLUSH_FLUSH, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7065

FIELD_PREP(QS_XTR_DATA_PRESENT_DATA_PRESENT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7075

FIELD_PREP(QS_INJ_GRP_CFG_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7081

FIELD_PREP(QS_INJ_GRP_CFG_BYTE_SWAP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7095

FIELD_PREP(QS_INJ_CTRL_GAP_SIZE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

710

FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7101

FIELD_PREP(QS_INJ_CTRL_ABORT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7107

FIELD_PREP(QS_INJ_CTRL_EOF, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7113

FIELD_PREP(QS_INJ_CTRL_SOF, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7119

FIELD_PREP(QS_INJ_CTRL_VLD_BYTES, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7129

FIELD_PREP(QS_INJ_STATUS_WMARK_REACHED, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7135

FIELD_PREP(QS_INJ_STATUS_FIFO_RDY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7141

FIELD_PREP(QS_INJ_STATUS_INJ_IN_PROGRESS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7166

FIELD_PREP(QSYS_PAUSE_CFG_PAUSE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7172

FIELD_PREP(QSYS_PAUSE_CFG_AGGRESSIVE_TAILDROP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7195

FIELD_PREP(QSYS_FWD_PRESSURE_FWD_PRESSURE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7201

FIELD_PREP(QSYS_FWD_PRESSURE_FWD_PRESSURE_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

721

FIELD_PREP(ANA_ACL_VCAP_S2_RLEG_STAT_IRLEG_STAT_MASK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7224

FIELD_PREP(QSYS_CAL_AUTO_CAL_AUTO, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7235

FIELD_PREP(QSYS_CAL_CTRL_CAL_MODE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7241

FIELD_PREP(QSYS_CAL_CTRL_CAL_AUTO_GRANT_RATE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7247

FIELD_PREP(QSYS_CAL_CTRL_CAL_AUTO_ERROR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7258

FIELD_PREP(QSYS_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7264

FIELD_PREP(QSYS_RAM_INIT_RAM_CFG_HOOK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

727

FIELD_PREP(ANA_ACL_VCAP_S2_RLEG_STAT_ERLEG_STAT_MASK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7275

FIELD_PREP(REW_OWN_UPSID_OWN_UPSID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7293

FIELD_PREP(REW_RTAG_ETAG_CTRL_ES0_ISDX_KEY_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7299

FIELD_PREP(REW_RTAG_ETAG_CTRL_KEEP_ETAG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7310

FIELD_PREP(REW_ES0_CTRL_ES0_BY_RT_FWD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7316

FIELD_PREP(REW_ES0_CTRL_ES0_BY_RLEG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7322

FIELD_PREP(REW_ES0_CTRL_ES0_DPORT_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7328

FIELD_PREP(REW_ES0_CTRL_ES0_FRM_LBK_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7334

FIELD_PREP(REW_ES0_CTRL_ES0_VD2_ENCAP_ID_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7340

FIELD_PREP(REW_ES0_CTRL_ES0_LU_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7351

FIELD_PREP(REW_PORT_VLAN_CFG_PORT_PCP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7357

FIELD_PREP(REW_PORT_VLAN_CFG_PORT_DEI, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7363

FIELD_PREP(REW_PORT_VLAN_CFG_PORT_VID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7374

FIELD_PREP(REW_PCP_MAP_DE0_PCP_DE0, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

738

FIELD_PREP(ANA_ACL_VCAP_S2_FRAGMENT_CFG_L4_MIN_LEN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7385

FIELD_PREP(REW_PCP_MAP_DE1_PCP_DE1, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7396

FIELD_PREP(REW_DEI_MAP_DE0_DEI_DE0, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7407

FIELD_PREP(REW_DEI_MAP_DE1_DEI_DE1, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7418

FIELD_PREP(REW_TAG_CTRL_TAG_CFG_OBEY_WAS_TAGGED, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7424

FIELD_PREP(REW_TAG_CTRL_TAG_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7430

FIELD_PREP(REW_TAG_CTRL_TAG_TPID_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7436

FIELD_PREP(REW_TAG_CTRL_TAG_VID_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

744

FIELD_PREP(ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7442

FIELD_PREP(REW_TAG_CTRL_TAG_PCP_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7448

FIELD_PREP(REW_TAG_CTRL_TAG_DEI_CFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7459

FIELD_PREP(REW_DSCP_MAP_DSCP_UPDATE_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7465

FIELD_PREP(REW_DSCP_MAP_DSCP_REMAP_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7476

FIELD_PREP(REW_PTP_TWOSTEP_CTRL_PTP_OVWR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7482

FIELD_PREP(REW_PTP_TWOSTEP_CTRL_PTP_NXT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7488

FIELD_PREP(REW_PTP_TWOSTEP_CTRL_PTP_VLD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7494

FIELD_PREP(REW_PTP_TWOSTEP_CTRL_STAMP_TX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

750

FIELD_PREP(ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7500

FIELD_PREP(REW_PTP_TWOSTEP_CTRL_STAMP_PORT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7506

FIELD_PREP(REW_PTP_TWOSTEP_CTRL_PTP_OVFL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7517

FIELD_PREP(REW_PTP_TWOSTEP_STAMP_STAMP_NSEC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7528

FIELD_PREP(REW_PTP_TWOSTEP_STAMP_SUBNS_STAMP_SUB_NSEC, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7549

FIELD_PREP(REW_PTP_RSRV_NOT_ZERO2_PTP_RSRV_NOT_ZERO2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7560

FIELD_PREP(REW_PTP_GEN_STAMP_FMT_RT_OFS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7566

FIELD_PREP(REW_PTP_GEN_STAMP_FMT_RT_FMT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7577

FIELD_PREP(REW_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7583

FIELD_PREP(REW_RAM_INIT_RAM_CFG_HOOK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7593

FIELD_PREP(VCAP_ES0_CTRL_UPDATE_CMD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7599

FIELD_PREP(VCAP_ES0_CTRL_UPDATE_ENTRY_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7605

FIELD_PREP(VCAP_ES0_CTRL_UPDATE_ACTION_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

761

FIELD_PREP(ANA_ACL_OWN_UPSID_OWN_UPSID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7611

FIELD_PREP(VCAP_ES0_CTRL_UPDATE_CNT_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7617

FIELD_PREP(VCAP_ES0_CTRL_UPDATE_ADDR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7623

FIELD_PREP(VCAP_ES0_CTRL_UPDATE_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7629

FIELD_PREP(VCAP_ES0_CTRL_CLEAR_CACHE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7635

FIELD_PREP(VCAP_ES0_CTRL_MV_TRAFFIC_IGN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7645

FIELD_PREP(VCAP_ES0_CFG_MV_NUM_POS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7651

FIELD_PREP(VCAP_ES0_CFG_MV_SIZE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7685

FIELD_PREP(VCAP_ES0_IDX_CORE_IDX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7695

FIELD_PREP(VCAP_ES0_MAP_CORE_MAP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7705

FIELD_PREP(VCAP_ES0_VCAP_STICKY_VCAP_ROW_DELETED_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

772

FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_KEY_SEL_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7755

FIELD_PREP(VCAP_ES2_CTRL_UPDATE_CMD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7761

FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ENTRY_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7767

FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ACTION_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7773

FIELD_PREP(VCAP_ES2_CTRL_UPDATE_CNT_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7779

FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ADDR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

778

FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IGR_PORT_MASK_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7785

FIELD_PREP(VCAP_ES2_CTRL_UPDATE_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7791

FIELD_PREP(VCAP_ES2_CTRL_CLEAR_CACHE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7797

FIELD_PREP(VCAP_ES2_CTRL_MV_TRAFFIC_IGN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7807

FIELD_PREP(VCAP_ES2_CFG_MV_NUM_POS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7813

FIELD_PREP(VCAP_ES2_CFG_MV_SIZE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

784

FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_NON_ETH_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7847

FIELD_PREP(VCAP_ES2_IDX_CORE_IDX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7857

FIELD_PREP(VCAP_ES2_MAP_CORE_MAP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7867

FIELD_PREP(VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

790

FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IP4_MC_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7917

FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_CMD, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7923

FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_ENTRY_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7929

FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_ACTION_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7935

FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_CNT_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7941

FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_ADDR, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7947

FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7953

FIELD_PREP(VCAP_SUPER_CTRL_CLEAR_CACHE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7959

FIELD_PREP(VCAP_SUPER_CTRL_MV_TRAFFIC_IGN, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

796

FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IP4_UC_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7969

FIELD_PREP(VCAP_SUPER_CFG_MV_NUM_POS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

7975

FIELD_PREP(VCAP_SUPER_CFG_MV_SIZE, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8009

FIELD_PREP(VCAP_SUPER_IDX_CORE_IDX, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8019

FIELD_PREP(VCAP_SUPER_MAP_CORE_MAP, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

802

FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IP6_MC_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8069

FIELD_PREP(VCAP_SUPER_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8075

FIELD_PREP(VCAP_SUPER_RAM_INIT_RAM_CFG_HOOK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

808

FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IP6_UC_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8086

FIELD_PREP(VOP_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8092

FIELD_PREP(VOP_RAM_INIT_RAM_CFG_HOOK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8103

FIELD_PREP(XQS_STAT_CFG_STAT_CLEAR_SHOT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8116

FIELD_PREP(XQS_STAT_CFG_STAT_SRV_PKT_ONLY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8122

FIELD_PREP(XQS_STAT_CFG_STAT_WRAP_DIS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

814

FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_ARP_KEY_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8185

FIELD_PREP(DEVRGMII_DEV_RST_CTRL_SPEED_SEL, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8196

FIELD_PREP(DEVRGMII_MAC_ENA_CFG_RX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8202

FIELD_PREP(DEVRGMII_MAC_ENA_CFG_TX_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8213

FIELD_PREP(DEVRGMII_MAC_TAGS_CFG_TAG_ID, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8219

FIELD_PREP(DEVRGMII_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8225

FIELD_PREP(DEVRGMII_MAC_TAGS_CFG_PB_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8231

FIELD_PREP(DEVRGMII_MAC_TAGS_CFG_VLAN_AWR_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8242

FIELD_PREP(DEVRGMII_MAC_IFG_CFG_TX_IFG, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8248

FIELD_PREP(DEVRGMII_MAC_IFG_CFG_RX_IFG2, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

8254

FIELD_PREP(DEVRGMII_MAC_IFG_CFG_RX_IFG1, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

83

FIELD_PREP(ANA_AC_RAM_INIT_RAM_INIT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

835

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_CLM_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

841

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_IRLEG_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

847

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_ERLEG_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

853

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_PORT_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

859

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM2_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

865

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM1_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

871

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_OAM_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

877

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

883

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

889

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_TCPUDP_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

89

FIELD_PREP(ANA_AC_RAM_INIT_RAM_CFG_HOOK, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

895

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

901

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

907

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

913

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

919

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

925

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_SNAP_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

931

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_LLC_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

937

FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

948

FIELD_PREP(ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

959

FIELD_PREP(ANA_AC_POL_BDLB_DLB_CTRL_CLK_PERIOD_01NS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

965

FIELD_PREP(ANA_AC_POL_BDLB_DLB_CTRL_BASE_TICK_CNT, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

971

FIELD_PREP(ANA_AC_POL_BDLB_DLB_CTRL_LEAK_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

977

FIELD_PREP(ANA_AC_POL_BDLB_DLB_CTRL_DLB_ADD_ENA, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

988

FIELD_PREP(ANA_AC_POL_SLB_DLB_CTRL_CLK_PERIOD_01NS, x)

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

994

FIELD_PREP(ANA_AC_POL_SLB_DLB_CTRL_BASE_TICK_CNT, x)

drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c

153

val |= FIELD_PREP(GENMASK_U32(31, 16), ack);

drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c

280

val |= FIELD_PREP(GENMASK_U32(15, 0), req);

drivers/net/ethernet/netronome/nfp/abm/main.c

25

return FIELD_PREP(NFP_ABM_PORTID_TYPE, rtype) |

drivers/net/ethernet/netronome/nfp/abm/main.c

26

FIELD_PREP(NFP_ABM_PORTID_ID, id);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

151

FIELD_PREP(OP_BR_MASK, mask) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

152

FIELD_PREP(OP_BR_EV_PIP, ev_pip) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

153

FIELD_PREP(OP_BR_CSS, css) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

154

FIELD_PREP(OP_BR_DEFBR, defer) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

155

FIELD_PREP(OP_BR_ADDR_LO, addr_lo) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

156

FIELD_PREP(OP_BR_ADDR_HI, addr_hi);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

176

FIELD_PREP(OP_RELO_TYPE, relo);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

196

FIELD_PREP(OP_BR_BIT_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

197

FIELD_PREP(OP_BR_BIT_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

198

FIELD_PREP(OP_BR_BIT_BV, set) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

199

FIELD_PREP(OP_BR_BIT_DEFBR, defer) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

200

FIELD_PREP(OP_BR_BIT_ADDR_LO, addr_lo) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

201

FIELD_PREP(OP_BR_BIT_ADDR_HI, addr_hi) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

202

FIELD_PREP(OP_BR_BIT_SRC_LMEXTN, src_lmextn);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

230

FIELD_PREP(OP_RELO_TYPE, relo);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

246

FIELD_PREP(OP_BR_ALU_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

247

FIELD_PREP(OP_BR_ALU_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

248

FIELD_PREP(OP_BR_ALU_DEFBR, defer) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

249

FIELD_PREP(OP_BR_ALU_IMM_HI, imm_hi) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

250

FIELD_PREP(OP_BR_ALU_SRC_LMEXTN, src_lmextn) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

251

FIELD_PREP(OP_BR_ALU_DST_LMEXTN, dst_lmextn);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

2748

CMD_OVE_LEN | FIELD_PREP(CMD_OV_LEN, xfer_num - 1));

drivers/net/ethernet/netronome/nfp/bpf/jit.c

280

FIELD_PREP(OP_IMMED_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

281

FIELD_PREP(OP_IMMED_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

282

FIELD_PREP(OP_IMMED_IMM, imm_hi) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

283

FIELD_PREP(OP_IMMED_WIDTH, width) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

284

FIELD_PREP(OP_IMMED_INV, invert) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

285

FIELD_PREP(OP_IMMED_SHIFT, shift) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

286

FIELD_PREP(OP_IMMED_WR_AB, wr_both) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

287

FIELD_PREP(OP_IMMED_SRC_LMEXTN, src_lmextn) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

288

FIELD_PREP(OP_IMMED_DST_LMEXTN, dst_lmextn);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

3081

FIELD_PREP(CMD_OVE_DATA, 2) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

3083

FIELD_PREP(CMD_OV_LEN, 0x8 | is64 << 2));

drivers/net/ethernet/netronome/nfp/bpf/jit.c

346

FIELD_PREP(OP_SHF_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

347

FIELD_PREP(OP_SHF_SC, sc) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

348

FIELD_PREP(OP_SHF_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

349

FIELD_PREP(OP_SHF_I8, i8) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

350

FIELD_PREP(OP_SHF_SW, sw) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

351

FIELD_PREP(OP_SHF_DST, dst) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

352

FIELD_PREP(OP_SHF_SHIFT, shift) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

353

FIELD_PREP(OP_SHF_OP, op) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

354

FIELD_PREP(OP_SHF_DST_AB, dst_ab) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

355

FIELD_PREP(OP_SHF_WR_AB, wr_both) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

356

FIELD_PREP(OP_SHF_SRC_LMEXTN, src_lmextn) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

357

FIELD_PREP(OP_SHF_DST_LMEXTN, dst_lmextn);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

401

FIELD_PREP(OP_ALU_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

402

FIELD_PREP(OP_ALU_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

403

FIELD_PREP(OP_ALU_DST, dst) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

404

FIELD_PREP(OP_ALU_SW, swap) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

405

FIELD_PREP(OP_ALU_OP, op) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

406

FIELD_PREP(OP_ALU_DST_AB, dst_ab) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

407

FIELD_PREP(OP_ALU_WR_AB, wr_both) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

408

FIELD_PREP(OP_ALU_SRC_LMEXTN, src_lmextn) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

409

FIELD_PREP(OP_ALU_DST_LMEXTN, dst_lmextn);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

440

FIELD_PREP(OP_MUL_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

441

FIELD_PREP(OP_MUL_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

442

FIELD_PREP(OP_MUL_STEP, step) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

443

FIELD_PREP(OP_MUL_DST_AB, dst_ab) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

444

FIELD_PREP(OP_MUL_SW, swap) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

445

FIELD_PREP(OP_MUL_TYPE, type) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

446

FIELD_PREP(OP_MUL_WR_AB, wr_both) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

447

FIELD_PREP(OP_MUL_SRC_LMEXTN, src_lmextn) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

448

FIELD_PREP(OP_MUL_DST_LMEXTN, dst_lmextn);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

495

FIELD_PREP(OP_LDF_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

496

FIELD_PREP(OP_LDF_SC, sc) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

497

FIELD_PREP(OP_LDF_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

498

FIELD_PREP(OP_LDF_I8, imm8) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

499

FIELD_PREP(OP_LDF_SW, swap) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

500

FIELD_PREP(OP_LDF_ZF, zero) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

501

FIELD_PREP(OP_LDF_BMASK, bmask) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

502

FIELD_PREP(OP_LDF_SHF, shift) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

503

FIELD_PREP(OP_LDF_WR_AB, wr_both) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

504

FIELD_PREP(OP_LDF_SRC_LMEXTN, src_lmextn) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

505

FIELD_PREP(OP_LDF_DST_LMEXTN, dst_lmextn);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

543

FIELD_PREP(OP_LCSR_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

544

FIELD_PREP(OP_LCSR_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

545

FIELD_PREP(OP_LCSR_WRITE, wr) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

546

FIELD_PREP(OP_LCSR_ADDR, addr / 4) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

547

FIELD_PREP(OP_LCSR_SRC_LMEXTN, src_lmextn) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

548

FIELD_PREP(OP_LCSR_DST_LMEXTN, dst_lmextn);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

644

FIELD_PREP(OP_RELO_TYPE, relo);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

754

CMD_OVE_LEN | FIELD_PREP(CMD_OV_LEN, xfer_num - 1));

drivers/net/ethernet/netronome/nfp/bpf/jit.c

780

CMD_OVE_LEN | FIELD_PREP(CMD_OV_LEN, len - 1));

drivers/net/ethernet/netronome/nfp/bpf/jit.c

787

CMD_OVE_LEN | FIELD_PREP(CMD_OV_LEN, xfer_num - 1));

drivers/net/ethernet/netronome/nfp/bpf/jit.c

811

CMD_OVE_LEN | FIELD_PREP(CMD_OV_LEN, xfer_num - 2));

drivers/net/ethernet/netronome/nfp/bpf/jit.c

85

insn = FIELD_PREP(OP_CMD_A_SRC, areg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

86

FIELD_PREP(OP_CMD_CTX, ctx) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

87

FIELD_PREP(OP_CMD_B_SRC, breg) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

88

FIELD_PREP(OP_CMD_TOKEN, cmd_tgt_act[op].token) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

89

FIELD_PREP(OP_CMD_XFER, xfer) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

90

FIELD_PREP(OP_CMD_CNT, size) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

91

FIELD_PREP(OP_CMD_SIG, ctx != CMD_CTX_NO_SWAP) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

92

FIELD_PREP(OP_CMD_TGT_CMD, cmd_tgt_act[op].tgt_cmd) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

93

FIELD_PREP(OP_CMD_INDIR, indir) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

94

FIELD_PREP(OP_CMD_MODE, mode);

drivers/net/ethernet/netronome/nfp/ccm_mbox.c

147

FIELD_PREP(NFP_NET_MBOX_TLV_TYPE, type) |

drivers/net/ethernet/netronome/nfp/ccm_mbox.c

148

FIELD_PREP(NFP_NET_MBOX_TLV_LEN, len));

drivers/net/ethernet/netronome/nfp/crypto/tls.c

155

front->ipver_vlan = cpu_to_be16(FIELD_PREP(NFP_NET_TLS_IPVER, ipver) |

drivers/net/ethernet/netronome/nfp/crypto/tls.c

156

FIELD_PREP(NFP_NET_TLS_VLAN,

drivers/net/ethernet/netronome/nfp/flower/action.c

127

FIELD_PREP(NFP_FL_PUSH_VLAN_PRIO, act->vlan.prio) |

drivers/net/ethernet/netronome/nfp/flower/action.c

128

FIELD_PREP(NFP_FL_PUSH_VLAN_VID, act->vlan.vid);

drivers/net/ethernet/netronome/nfp/flower/action.c

456

FIELD_PREP(NFP_FL_TUNNEL_TYPE, tun_type) |

drivers/net/ethernet/netronome/nfp/flower/action.c

457

FIELD_PREP(NFP_FL_PRE_TUN_INDEX, pretun_idx);

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

671

return FIELD_PREP(NFP_FLOWER_CMSG_PORT_PHYS_PORT_NUM, internal_port) |

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

672

FIELD_PREP(NFP_FLOWER_CMSG_PORT_TYPE,

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

678

return FIELD_PREP(NFP_FLOWER_CMSG_PORT_PHYS_PORT_NUM, phys_port) |

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

679

FIELD_PREP(NFP_FLOWER_CMSG_PORT_TYPE,

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

687

return FIELD_PREP(NFP_FLOWER_CMSG_PORT_PCI, nfp_pcie) |

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

688

FIELD_PREP(NFP_FLOWER_CMSG_PORT_VNIC_TYPE, type) |

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

689

FIELD_PREP(NFP_FLOWER_CMSG_PORT_VNIC, vnic) |

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

690

FIELD_PREP(NFP_FLOWER_CMSG_PORT_PCIE_Q, q) |

drivers/net/ethernet/netronome/nfp/flower/cmsg.h

691

FIELD_PREP(NFP_FLOWER_CMSG_PORT_TYPE,

drivers/net/ethernet/netronome/nfp/flower/conntrack.c

183

tmp = FIELD_PREP(NFP_IPV6_TCLASS_MASK, match.key->tos);

drivers/net/ethernet/netronome/nfp/flower/conntrack.c

185

tmp = FIELD_PREP(NFP_IPV6_HLIMIT_MASK, match.key->ttl);

drivers/net/ethernet/netronome/nfp/flower/conntrack.c

189

tmp = FIELD_PREP(NFP_IPV4_TOS_MASK, match.key->tos);

drivers/net/ethernet/netronome/nfp/flower/conntrack.c

191

tmp = FIELD_PREP(NFP_IPV4_TTL_MASK, match.key->ttl);

drivers/net/ethernet/netronome/nfp/flower/match.c

137

key_mpls = FIELD_PREP(NFP_FLOWER_MASK_MPLS_LB,

drivers/net/ethernet/netronome/nfp/flower/match.c

139

FIELD_PREP(NFP_FLOWER_MASK_MPLS_TC,

drivers/net/ethernet/netronome/nfp/flower/match.c

141

FIELD_PREP(NFP_FLOWER_MASK_MPLS_BOS,

drivers/net/ethernet/netronome/nfp/flower/match.c

145

msk_mpls = FIELD_PREP(NFP_FLOWER_MASK_MPLS_LB,

drivers/net/ethernet/netronome/nfp/flower/match.c

147

FIELD_PREP(NFP_FLOWER_MASK_MPLS_TC,

drivers/net/ethernet/netronome/nfp/flower/match.c

149

FIELD_PREP(NFP_FLOWER_MASK_MPLS_BOS,

drivers/net/ethernet/netronome/nfp/flower/match.c

294

key_tci |= FIELD_PREP(NFP_FLOWER_MASK_VLAN_PRIO,

drivers/net/ethernet/netronome/nfp/flower/match.c

296

FIELD_PREP(NFP_FLOWER_MASK_VLAN_VID,

drivers/net/ethernet/netronome/nfp/flower/match.c

299

msk_tci |= FIELD_PREP(NFP_FLOWER_MASK_VLAN_PRIO,

drivers/net/ethernet/netronome/nfp/flower/match.c

301

FIELD_PREP(NFP_FLOWER_MASK_VLAN_VID,

drivers/net/ethernet/netronome/nfp/flower/match.c

35

key_tci |= FIELD_PREP(NFP_FLOWER_MASK_VLAN_PRIO,

drivers/net/ethernet/netronome/nfp/flower/match.c

37

FIELD_PREP(NFP_FLOWER_MASK_VLAN_VID,

drivers/net/ethernet/netronome/nfp/flower/match.c

41

msk_tci |= FIELD_PREP(NFP_FLOWER_MASK_VLAN_PRIO,

drivers/net/ethernet/netronome/nfp/flower/match.c

43

FIELD_PREP(NFP_FLOWER_MASK_VLAN_VID,

drivers/net/ethernet/netronome/nfp/flower/metadata.c

574

stats_size = FIELD_PREP(NFP_FL_STAT_ID_STAT, host_ctx_count) |

drivers/net/ethernet/netronome/nfp/flower/metadata.c

575

FIELD_PREP(NFP_FL_STAT_ID_MU_NUM, host_num_mems - 1);

drivers/net/ethernet/netronome/nfp/flower/metadata.c

69

FIELD_PREP(NFP_FL_STAT_ID_STAT,

drivers/net/ethernet/netronome/nfp/flower/metadata.c

71

FIELD_PREP(NFP_FL_STAT_ID_MU_NUM,

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

1349

put_unaligned_be32(FIELD_PREP(NFDK_META_LEN, 8) |

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

1350

FIELD_PREP(NFDK_META_FIELDS,

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

1380

dlen_type = FIELD_PREP(NFDK_DESC_TX_DMA_LEN_HEAD,

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

1383

FIELD_PREP(NFDK_DESC_TX_TYPE_HEAD, type);

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

1395

dlen_type = FIELD_PREP(NFDK_DESC_TX_DMA_LEN, dma_len);

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

237

meta_id = FIELD_PREP(NFDK_META_LEN, md_bytes) |

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

238

FIELD_PREP(NFDK_META_FIELDS, meta_id);

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

332

dlen_type = FIELD_PREP(NFDK_DESC_TX_DMA_LEN_HEAD,

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

335

FIELD_PREP(NFDK_DESC_TX_TYPE_HEAD, type);

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

360

dlen_type = FIELD_PREP(NFDK_DESC_TX_DMA_LEN, dma_len);

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

974

dlen_type = FIELD_PREP(NFDK_DESC_TX_DMA_LEN_HEAD,

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

977

FIELD_PREP(NFDK_DESC_TX_TYPE_HEAD, type);

drivers/net/ethernet/netronome/nfp/nfdk/dp.c

989

dlen_type = FIELD_PREP(NFDK_DESC_TX_DMA_LEN, dma_len);

drivers/net/ethernet/netronome/nfp/nfp_asm.c

136

return UR_REG_LM | FIELD_PREP(UR_REG_LM_IDX, lm_id) |

drivers/net/ethernet/netronome/nfp/nfp_asm.c

147

FIELD_PREP(UR_REG_LM_IDX, lm_id) |

drivers/net/ethernet/netronome/nfp/nfp_asm.c

148

FIELD_PREP(UR_REG_LM_POST_MOD_DEC, lm_dec);

drivers/net/ethernet/netronome/nfp/nfp_asm.c

230

return RE_REG_LM | FIELD_PREP(RE_REG_LM_IDX, lm_id) | val;

drivers/net/ethernet/netronome/nfp/nfp_asm.c

48

*instr |= FIELD_PREP(OP_BR_ADDR_HI, addr_hi);

drivers/net/ethernet/netronome/nfp/nfp_asm.c

49

*instr |= FIELD_PREP(OP_BR_ADDR_LO, addr_lo);

drivers/net/ethernet/netronome/nfp/nfp_asm.c

91

*instr &= ~FIELD_PREP(OP_IMMED_A_SRC, 0xff);

drivers/net/ethernet/netronome/nfp/nfp_asm.c

92

*instr |= FIELD_PREP(OP_IMMED_A_SRC, immed & 0xff);

drivers/net/ethernet/netronome/nfp/nfp_asm.c

94

*instr &= ~FIELD_PREP(OP_IMMED_B_SRC, 0xff);

drivers/net/ethernet/netronome/nfp/nfp_asm.c

95

*instr |= FIELD_PREP(OP_IMMED_B_SRC, immed & 0xff);

drivers/net/ethernet/netronome/nfp/nfp_asm.c

99

*instr |= FIELD_PREP(OP_IMMED_IMM, immed >> 8);

drivers/net/ethernet/netronome/nfp/nfp_asm.h

326

return (__force swreg)(id | FIELD_PREP(NN_REG_TYPE, type));

drivers/net/ethernet/netronome/nfp/nfp_asm.h

333

return (__force swreg)(FIELD_PREP(NN_REG_TYPE, NN_REG_LMEM) |

drivers/net/ethernet/netronome/nfp/nfp_asm.h

334

FIELD_PREP(NN_REG_LM_IDX, id) |

drivers/net/ethernet/netronome/nfp/nfp_asm.h

335

FIELD_PREP(NN_REG_LM_MOD, mode) |

drivers/net/ethernet/netronome/nfp/nfp_net_common.c

1849

action = FIELD_PREP(NFP_FS_QUEUE_ID, entry->action) | NFP_FS_ACT_Q;

drivers/net/ethernet/netronome/nfp/nfp_net_common.c

2647

FIELD_PREP(NFP_NET_CFG_RSS_HFUNC, nn->rss_hfunc) |

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c

1501

new_rss_cfg |= FIELD_PREP(NFP_NET_CFG_RSS_HFUNC, nn->rss_hfunc);

drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c

131

vlan_tag = FIELD_PREP(NFP_NET_VF_CFG_VLAN_VID, vlan) |

drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c

132

FIELD_PREP(NFP_NET_VF_CFG_VLAN_QOS, qos);

drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c

139

vlan_tag |= FIELD_PREP(NFP_NET_VF_CFG_VLAN_PROT, ntohs(vlan_proto));

drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c

166

ratevalue = FIELD_PREP(NFP_NET_VF_CFG_MAX_RATE,

drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c

169

FIELD_PREP(NFP_NET_VF_CFG_MIN_RATE, min_tx_rate);

drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c

195

vf_ctrl |= FIELD_PREP(NFP_NET_VF_CFG_CTRL_SPOOF, enable);

drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c

219

vf_ctrl |= FIELD_PREP(NFP_NET_VF_CFG_CTRL_TRUST, enable);

drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c

253

vf_ctrl |= FIELD_PREP(NFP_NET_VF_CFG_CTRL_LINK_STATE, link_state);

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c

382

FIELD_PREP(NSP_COMMAND_OPTION, arg->option) |

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c

383

FIELD_PREP(NSP_COMMAND_CODE, arg->code) |

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c

384

FIELD_PREP(NSP_COMMAND_DMA_BUF, arg->dma) |

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c

385

FIELD_PREP(NSP_COMMAND_START, 1));

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c

477

arg->arg.buf = FIELD_PREP(NSP_BUFFER_CPP, cpp_id >> 8) |

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c

478

FIELD_PREP(NSP_BUFFER_ADDRESS, cpp_buf);

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c

454

reg |= FIELD_PREP(NSP_ETH_CTRL_ENABLED, enable);

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c

501

reg |= FIELD_PREP(NSP_ETH_CTRL_CONFIGURED, configed);

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c

566

reg |= FIELD_PREP(NSP_ETH_CTRL_SET_IDMODE, state);

drivers/net/ethernet/oa_tc6.c

198

header = FIELD_PREP(OA_TC6_CTRL_HEADER_DATA_NOT_CTRL,

drivers/net/ethernet/oa_tc6.c

200

FIELD_PREP(OA_TC6_CTRL_HEADER_WRITE_NOT_READ, reg_op) |

drivers/net/ethernet/oa_tc6.c

201

FIELD_PREP(OA_TC6_CTRL_HEADER_MEM_MAP_SELECTOR, addr >> 16) |

drivers/net/ethernet/oa_tc6.c

202

FIELD_PREP(OA_TC6_CTRL_HEADER_ADDR, addr) |

drivers/net/ethernet/oa_tc6.c

203

FIELD_PREP(OA_TC6_CTRL_HEADER_LENGTH, length - 1);

drivers/net/ethernet/oa_tc6.c

204

header |= FIELD_PREP(OA_TC6_CTRL_HEADER_PARITY,

drivers/net/ethernet/oa_tc6.c

935

u32 header = FIELD_PREP(OA_TC6_DATA_HEADER_DATA_NOT_CTRL,

drivers/net/ethernet/oa_tc6.c

937

FIELD_PREP(OA_TC6_DATA_HEADER_DATA_VALID, data_valid) |

drivers/net/ethernet/oa_tc6.c

938

FIELD_PREP(OA_TC6_DATA_HEADER_START_VALID, start_valid) |

drivers/net/ethernet/oa_tc6.c

939

FIELD_PREP(OA_TC6_DATA_HEADER_END_VALID, end_valid) |

drivers/net/ethernet/oa_tc6.c

940

FIELD_PREP(OA_TC6_DATA_HEADER_END_BYTE_OFFSET,

drivers/net/ethernet/oa_tc6.c

943

header |= FIELD_PREP(OA_TC6_DATA_HEADER_PARITY,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1000

val |= FIELD_PREP(PPE_UCAST_QUEUE_MAP_TBL_QUEUE_ID, queue_base);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1027

val = FIELD_PREP(PPE_UCAST_PRIORITY_MAP_TBL_CLASS, queue_offset);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1053

val = FIELD_PREP(PPE_UCAST_HASH_MAP_TBL_HASH, queue_offset);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1129

val = FIELD_PREP(PPE_IN_L2_SERVICE_TBL_DST_PORT_ID_VALID, cfg.dest_port_valid);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1130

val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_DST_PORT_ID, cfg.dest_port);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1131

val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_DST_DIRECTION, cfg.is_src);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1134

val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_DST_BYPASS_BITMAP, bitmap_value);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1135

val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_RX_CNT_EN,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1137

val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_TX_CNT_EN,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1175

val = FIELD_PREP(PPE_TL_SERVICE_TBL_BYPASS_BITMAP, bitmap_value);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1248

FIELD_PREP(PPE_RSS_HASH_MIX_IPV4_VAL, val));

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1280

FIELD_PREP(PPE_RSS_HASH_MIX_VAL, val));

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1300

val = FIELD_PREP(PPE_RSS_HASH_MASK_IPV4_HASH_MASK, cfg.hash_mask);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1301

val |= FIELD_PREP(PPE_RSS_HASH_MASK_IPV4_FRAGMENT, cfg.hash_fragment_mode);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1306

val = FIELD_PREP(PPE_RSS_HASH_SEED_IPV4_VAL, cfg.hash_seed);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1318

val = FIELD_PREP(PPE_RSS_HASH_FIN_IPV4_INNER, cfg.hash_fin_inner[i]);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1319

val |= FIELD_PREP(PPE_RSS_HASH_FIN_IPV4_OUTER, cfg.hash_fin_outer[i]);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1329

val = FIELD_PREP(PPE_RSS_HASH_MASK_HASH_MASK, cfg.hash_mask);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1330

val |= FIELD_PREP(PPE_RSS_HASH_MASK_FRAGMENT, cfg.hash_fragment_mode);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1335

val = FIELD_PREP(PPE_RSS_HASH_SEED_VAL, cfg.hash_seed);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1347

val = FIELD_PREP(PPE_RSS_HASH_FIN_INNER, cfg.hash_fin_inner[i]);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1348

val |= FIELD_PREP(PPE_RSS_HASH_FIN_OUTER, cfg.hash_fin_outer[i]);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1414

val = FIELD_PREP(PPE_BM_PORT_GROUP_ID_SHARED_GROUP_ID, 0);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1441

val = FIELD_PREP(PPE_BM_SHARED_GROUP_CFG_SHARED_LIMIT,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1639

val = FIELD_PREP(PPE_BM_SCH_CTRL_SCH_DEPTH, count);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1640

val |= FIELD_PREP(PPE_BM_SCH_CTRL_SCH_OFFSET, 0);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1641

val |= FIELD_PREP(PPE_BM_SCH_CTRL_SCH_EN, 1);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1652

val = FIELD_PREP(PPE_BM_SCH_CFG_TBL_VALID, bm_cfg[i].valid);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1653

val |= FIELD_PREP(PPE_BM_SCH_CFG_TBL_DIR, bm_cfg[i].dir);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1654

val |= FIELD_PREP(PPE_BM_SCH_CFG_TBL_PORT_NUM, bm_cfg[i].port);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1655

val |= FIELD_PREP(PPE_BM_SCH_CFG_TBL_SECOND_PORT_VALID,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1657

val |= FIELD_PREP(PPE_BM_SCH_CFG_TBL_SECOND_PORT,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1670

val = FIELD_PREP(PPE_PSCH_SCH_DEPTH_CFG_SCH_DEPTH, count);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1680

val = FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_ENS_PORT_BITMAP,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1682

val |= FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_ENS_PORT,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1684

val |= FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_DES_PORT,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1686

val |= FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_DES_SECOND_PORT_EN,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1688

val |= FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_DES_SECOND_PORT,

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

1841

val = FIELD_PREP(PPE_MC_MTU_CTRL_TBL_MTU_CMD, PPE_ACTION_DROP);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

847

val = FIELD_PREP(PPE_L0_FLOW_MAP_TBL_FLOW_ID, scheduler_cfg.flow_id);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

848

val |= FIELD_PREP(PPE_L0_FLOW_MAP_TBL_C_PRI, scheduler_cfg.pri);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

849

val |= FIELD_PREP(PPE_L0_FLOW_MAP_TBL_E_PRI, scheduler_cfg.pri);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

850

val |= FIELD_PREP(PPE_L0_FLOW_MAP_TBL_C_NODE_WT, scheduler_cfg.drr_node_wt);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

851

val |= FIELD_PREP(PPE_L0_FLOW_MAP_TBL_E_NODE_WT, scheduler_cfg.drr_node_wt);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

860

val = FIELD_PREP(PPE_L0_C_FLOW_CFG_TBL_NODE_ID, scheduler_cfg.drr_node_id);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

861

val |= FIELD_PREP(PPE_L0_C_FLOW_CFG_TBL_NODE_CREDIT_UNIT, scheduler_cfg.unit_is_packet);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

870

val = FIELD_PREP(PPE_L0_E_FLOW_CFG_TBL_NODE_ID, scheduler_cfg.drr_node_id);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

871

val |= FIELD_PREP(PPE_L0_E_FLOW_CFG_TBL_NODE_CREDIT_UNIT, scheduler_cfg.unit_is_packet);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

878

val = FIELD_PREP(PPE_L0_FLOW_PORT_MAP_TBL_PORT_NUM, port);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

885

val = FIELD_PREP(PPE_L0_COMP_CFG_TBL_NODE_METER_LEN, scheduler_cfg.frame_mode);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

900

val = FIELD_PREP(PPE_L1_FLOW_MAP_TBL_FLOW_ID, scheduler_cfg.flow_id);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

901

val |= FIELD_PREP(PPE_L1_FLOW_MAP_TBL_C_PRI, scheduler_cfg.pri);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

902

val |= FIELD_PREP(PPE_L1_FLOW_MAP_TBL_E_PRI, scheduler_cfg.pri);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

903

val |= FIELD_PREP(PPE_L1_FLOW_MAP_TBL_C_NODE_WT, scheduler_cfg.drr_node_wt);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

904

val |= FIELD_PREP(PPE_L1_FLOW_MAP_TBL_E_NODE_WT, scheduler_cfg.drr_node_wt);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

911

val = FIELD_PREP(PPE_L1_C_FLOW_CFG_TBL_NODE_ID, scheduler_cfg.drr_node_id);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

912

val |= FIELD_PREP(PPE_L1_C_FLOW_CFG_TBL_NODE_CREDIT_UNIT, scheduler_cfg.unit_is_packet);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

921

val = FIELD_PREP(PPE_L1_E_FLOW_CFG_TBL_NODE_ID, scheduler_cfg.drr_node_id);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

922

val |= FIELD_PREP(PPE_L1_E_FLOW_CFG_TBL_NODE_CREDIT_UNIT, scheduler_cfg.unit_is_packet);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

931

val = FIELD_PREP(PPE_L1_FLOW_PORT_MAP_TBL_PORT_NUM, port);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

939

val = FIELD_PREP(PPE_L1_COMP_CFG_TBL_NODE_METER_LEN, scheduler_cfg.frame_mode);

drivers/net/ethernet/qualcomm/ppe/ppe_config.c

999

val = FIELD_PREP(PPE_UCAST_QUEUE_MAP_TBL_PROFILE_ID, profile_id);

drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c

165

*drop_cnt = FIELD_PREP(GENMASK(23, 0), value);

drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c

169

*drop_cnt |= FIELD_PREP(GENMASK(31, 24), value);

drivers/net/ethernet/realtek/r8169_main.c

2187

w |= FIELD_PREP(RTL_COALESCE_TX_FRAMES, DIV_ROUND_UP(tx_fr, 4));

drivers/net/ethernet/realtek/r8169_main.c

2188

w |= FIELD_PREP(RTL_COALESCE_RX_FRAMES, DIV_ROUND_UP(rx_fr, 4));

drivers/net/ethernet/realtek/r8169_main.c

2191

w |= FIELD_PREP(RTL_COALESCE_TX_USECS, units);

drivers/net/ethernet/realtek/r8169_main.c

2193

w |= FIELD_PREP(RTL_COALESCE_RX_USECS, units);

drivers/net/ethernet/renesas/rswitch.h

783

#define GWDCC_DCP(prio) FIELD_PREP(GWDCC_DCP_MASK, (prio))

drivers/net/ethernet/renesas/rswitch_l2.c

206

reg_val = FIELD_PREP(FWMACAGC_MACAGT, time);

drivers/net/ethernet/renesas/rswitch_l2.c

85

iowrite32(FIELD_PREP(FWCP2_LTWFW_MASK, fwd_mask | BIT(rdev->port)),

drivers/net/ethernet/renesas/rswitch_main.c

1192

FIELD_PREP(MPIC_PIS, pis) | FIELD_PREP(MPIC_LSC, lsc));

drivers/net/ethernet/renesas/rswitch_main.c

1198

FIELD_PREP(MPIC_PSMCS, etha->psmcs) |

drivers/net/ethernet/renesas/rswitch_main.c

1199

FIELD_PREP(MPIC_PSMHT, 0x06));

drivers/net/ethernet/renesas/rswitch_main.c

1237

FIELD_PREP(MPSM_MFF, mmf) |

drivers/net/ethernet/renesas/rswitch_main.c

1238

FIELD_PREP(MPSM_PDA, pda) |

drivers/net/ethernet/renesas/rswitch_main.c

1239

FIELD_PREP(MPSM_PRA, pra) |

drivers/net/ethernet/renesas/rswitch_main.c

1240

FIELD_PREP(MPSM_POP, pop) |

drivers/net/ethernet/renesas/rswitch_main.c

1241

FIELD_PREP(MPSM_PRD, prd);

drivers/net/ethernet/renesas/rswitch_main.c

129

iowrite32(FIELD_PREP(FWCP1_LTHFW, all_ports_mask),

drivers/net/ethernet/renesas/rswitch_main.c

132

iowrite32(FIELD_PREP(FWCP2_LTWFW, all_ports_mask),

drivers/net/ethernet/renesas/rswitch_main.c

140

FIELD_PREP(FWMACAGUSPC_MACAGUSP, RSW_AGEING_CLK_PER_US));

drivers/net/ethernet/renesas/rswitch_main.c

142

reg_val = FIELD_PREP(FWMACAGC_MACAGT, RSW_AGEING_TIME);

drivers/net/ethernet/renesas/rswitch_main.c

150

FIELD_PREP(FWPBFC_PBDV, BIT(priv->gwca.index)));

drivers/net/ethernet/spacemit/k1_emac.c

1585

val |= FIELD_PREP(EMAC_RX_DLINE_STEP_MASK,

drivers/net/ethernet/spacemit/k1_emac.c

1587

val |= FIELD_PREP(EMAC_RX_DLINE_CODE_MASK, priv->rx_delay);

drivers/net/ethernet/spacemit/k1_emac.c

1590

val |= FIELD_PREP(EMAC_TX_DLINE_STEP_MASK,

drivers/net/ethernet/spacemit/k1_emac.c

1592

val |= FIELD_PREP(EMAC_TX_DLINE_CODE_MASK, priv->tx_delay);

drivers/net/ethernet/spacemit/k1_emac.c

232

rxirq = FIELD_PREP(MREGBIT_RECEIVE_IRQ_FRAME_COUNTER_MASK,

drivers/net/ethernet/spacemit/k1_emac.c

234

rxirq |= FIELD_PREP(MREGBIT_RECEIVE_IRQ_TIMEOUT_COUNTER_MASK,

drivers/net/ethernet/spacemit/k1_emac.c

578

rx_desc.desc1 = FIELD_PREP(RX_DESC_1_BUFFER_SIZE_1_MASK,

drivers/net/ethernet/spacemit/k1_emac.c

721

tx_desc->desc1 |= FIELD_PREP(TX_DESC_1_BUFFER_SIZE_1_MASK, len);

drivers/net/ethernet/spacemit/k1_emac.c

724

tx_desc->desc1 |= FIELD_PREP(TX_DESC_1_BUFFER_SIZE_2_MASK, len);

drivers/net/ethernet/spacemit/k1_emac.c

953

cmd |= FIELD_PREP(MREGBIT_PHY_ADDRESS, phy_addr);

drivers/net/ethernet/spacemit/k1_emac.c

954

cmd |= FIELD_PREP(MREGBIT_REGISTER_ADDRESS, regnum);

drivers/net/ethernet/spacemit/k1_emac.c

979

cmd |= FIELD_PREP(MREGBIT_PHY_ADDRESS, phy_addr);

drivers/net/ethernet/spacemit/k1_emac.c

980

cmd |= FIELD_PREP(MREGBIT_REGISTER_ADDRESS, regnum);

drivers/net/ethernet/stmicro/stmmac/descs_com.h

26

p->des1 |= cpu_to_le32(FIELD_PREP(ERDES1_BUFFER2_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/descs_com.h

47

p->des1 |= cpu_to_le32(FIELD_PREP(ETDES1_BUFFER2_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/descs_com.h

49

FIELD_PREP(ETDES1_BUFFER1_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/descs_com.h

52

p->des1 |= cpu_to_le32(FIELD_PREP(ETDES1_BUFFER1_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/descs_com.h

64

p->des1 |= cpu_to_le32(FIELD_PREP(RDES1_BUFFER2_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/descs_com.h

86

p->des1 |= cpu_to_le32(FIELD_PREP(TDES1_BUFFER2_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/descs_com.h

88

FIELD_PREP(TDES1_BUFFER1_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/descs_com.h

91

p->des1 |= cpu_to_le32(FIELD_PREP(TDES1_BUFFER1_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

84

plat_dat->axi->axi_blen_regval = FIELD_PREP(DMA_AXI_BLEN_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c

125

eth_dly_param |= FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);

drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c

137

eth_dly_param |= FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);

drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c

104

val = FIELD_PREP(MX93_GPR_ENET_QOS_INTF_SEL_MASK, phy_intf_sel) |

drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c

71

val = FIELD_PREP(GPR_ENET_QOS_INTF_SEL_MASK, phy_intf_sel) |

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

103

val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) |

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

104

FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

114

val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

117

val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) |

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

118

FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN);

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

121

val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN);

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

123

val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_DELAY) |

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

124

FIELD_PREP(MACPHYC_TX_DELAY_MASK, (mac->tx_delay + 9750) / 19500 - 1);

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

127

val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN);

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

129

val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_DELAY) |

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

130

FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1);

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

76

val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel) |

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

77

FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT);

drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c

93

val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

100

#define QSGMII_PHY_CDR_PI_SLEW(x) FIELD_PREP(QSGMII_PHY_CDR_PI_SLEW_MASK, (x))

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

102

#define QSGMII_PHY_TX_SLEW(x) FIELD_PREP(QSGMII_PHY_TX_SLEW_MASK, (x))

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

104

#define QSGMII_PHY_TX_DRV_AMP(x) FIELD_PREP(QSGMII_PHY_TX_DRV_AMP_MASK, (x))

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

92

#define QSGMII_PHY_DEEMPHASIS_LVL(x) FIELD_PREP(QSGMII_PHY_DEEMPHASIS_LVL_MASK, (x))

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

94

#define QSGMII_PHY_PHASE_LOOP_GAIN(x) FIELD_PREP(QSGMII_PHY_PHASE_LOOP_GAIN_MASK, (x))

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

96

#define QSGMII_PHY_RX_DC_BIAS(x) FIELD_PREP(QSGMII_PHY_RX_DC_BIAS_MASK, (x))

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c

98

#define QSGMII_PHY_RX_INPUT_EQU(x) FIELD_PREP(QSGMII_PHY_RX_INPUT_EQU_MASK, (x))

drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c

152

FIELD_PREP(PHY_INTF_SELI, phy_intf_sel));

drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c

36

FIELD_PREP(LPC18XX_CREG_CREG6_ETHMODE_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

186

delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

187

delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

188

delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->tx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

190

delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

191

delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

192

delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

201

delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

202

delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

203

delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->rx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

205

delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

206

delay_val |= FIELD_PREP(ETH_DLY_GTXC_STAGES, mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

207

delay_val |= FIELD_PREP(ETH_DLY_GTXC_INV, mac_delay->tx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

220

delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

221

delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

222

delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

228

delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

229

delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

230

delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->rx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

246

delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

247

delay_val |= FIELD_PREP(ETH_DLY_GTXC_STAGES, mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

248

delay_val |= FIELD_PREP(ETH_DLY_GTXC_INV, mac_delay->tx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

250

delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

251

delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

252

delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

279

u32 intf_val = FIELD_PREP(MT8195_ETH_INTF_SEL, phy_intf_sel);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

323

delay_val |= FIELD_PREP(MT8195_DLY_TXC_ENABLE, !!mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

324

delay_val |= FIELD_PREP(MT8195_DLY_TXC_STAGES, mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

325

delay_val |= FIELD_PREP(MT8195_DLY_TXC_INV, mac_delay->tx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

327

delay_val |= FIELD_PREP(MT8195_DLY_RXC_ENABLE, !!mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

328

delay_val |= FIELD_PREP(MT8195_DLY_RXC_STAGES, mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

329

delay_val |= FIELD_PREP(MT8195_DLY_RXC_INV, mac_delay->rx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

338

rmii_delay_val |= FIELD_PREP(MT8195_DLY_RMII_TXC_ENABLE,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

340

rmii_delay_val |= FIELD_PREP(MT8195_DLY_RMII_TXC_STAGES,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

342

rmii_delay_val |= FIELD_PREP(MT8195_DLY_RMII_TXC_INV,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

345

rmii_delay_val |= FIELD_PREP(MT8195_DLY_RMII_RXC_ENABLE,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

347

rmii_delay_val |= FIELD_PREP(MT8195_DLY_RMII_RXC_STAGES,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

349

rmii_delay_val |= FIELD_PREP(MT8195_DLY_RMII_RXC_INV,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

363

delay_val |= FIELD_PREP(MT8195_DLY_RXC_ENABLE,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

365

delay_val |= FIELD_PREP(MT8195_DLY_RXC_STAGES,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

367

delay_val |= FIELD_PREP(MT8195_DLY_RXC_INV,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

374

delay_val |= FIELD_PREP(MT8195_DLY_TXC_ENABLE,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

376

delay_val |= FIELD_PREP(MT8195_DLY_TXC_STAGES,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

378

delay_val |= FIELD_PREP(MT8195_DLY_TXC_INV,

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

387

gtxc_delay_val |= FIELD_PREP(MT8195_DLY_GTXC_ENABLE, !!mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

388

gtxc_delay_val |= FIELD_PREP(MT8195_DLY_GTXC_STAGES, mac_delay->tx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

389

gtxc_delay_val |= FIELD_PREP(MT8195_DLY_GTXC_INV, mac_delay->tx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

391

delay_val |= FIELD_PREP(MT8195_DLY_RXC_ENABLE, !!mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

392

delay_val |= FIELD_PREP(MT8195_DLY_RXC_STAGES, mac_delay->rx_delay);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c

393

delay_val |= FIELD_PREP(MT8195_DLY_RXC_INV, mac_delay->rx_inv);

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

250

FIELD_PREP(PRG_ETH0_EXT_PHY_MODE_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

281

tx_dly_config = FIELD_PREP(PRG_ETH0_TXDLY_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

285

cfg_rxclk_dly = FIELD_PREP(PRG_ETH1_CFG_RXCLK_DLY,

drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c

176

writel(FIELD_PREP(INT_MODERATION_RX, 200) |

drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c

177

FIELD_PREP(INT_MODERATION_TX, 200),

drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c

69

writel(FIELD_PREP(EFUSE_OP_MODE, EFUSE_OP_ROW_READ) |

drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c

70

FIELD_PREP(EFUSE_OP_ADDR, offset) |

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c

627

FIELD_PREP(RGMII_CONFIG_SGMII_CLK_DVDR,

drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c

168

FIELD_PREP(MII_PHY_SEL_MASK, phy_intf_sel));

drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

237

val = FIELD_PREP(SYSCFG_PMCR_PHY_INTF_SEL_MASK, phy_intf_sel);

drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

293

val = FIELD_PREP(SYSCFG_ETHCR_ETH_SEL_MASK, phy_intf_sel);

drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c

63

reg |= FIELD_PREP(SYSCON_ETXDC_MASK, val);

drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c

77

reg |= FIELD_PREP(SYSCON_ERXDC_MASK, val);

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

140

reg = FIELD_PREP(GMAC_PLLCLK_DIV_EN, 1) |

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

141

FIELD_PREP(GMAC_PLLCLK_DIV_NUM, div);

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

168

reg = FIELD_PREP(GMAC_PLLCLK_DIV_EN, 1) |

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

169

FIELD_PREP(GMAC_PLLCLK_DIV_NUM, div);

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

205

reg |= FIELD_PREP(GMAC_RXCLK_DELAY, 0);

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

210

reg |= FIELD_PREP(GMAC_TXCLK_DELAY, 0);

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

41

#define GMAC_INTF_RGMII FIELD_PREP(GMAC_INTF_MASK, 1)

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

42

#define GMAC_INTF_MII_GMII FIELD_PREP(GMAC_INTF_MASK, 0)

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

45

#define TXCLK_DIR_OUTPUT FIELD_PREP(TXCLK_DIR_MASK, 0)

drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c

46

#define TXCLK_DIR_INPUT FIELD_PREP(TXCLK_DIR_MASK, 1)

drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c

245

flow |= FIELD_PREP(GMAC_FLOW_CTRL_PT_MASK, pause_time);

drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c

135

flow |= FIELD_PREP(MAC_FLOW_CTRL_PT_MASK, pause_time);

drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c

26

FIELD_PREP(DMA_BUS_MODE_PBL_MASK, dma_cfg->pbl),

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

228

#define GMAC_CONFIG1_SPLM(v) FIELD_PREP(GENMASK(9, 8), v)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

310

#define MTL_OP_MODE_TTC_32 FIELD_PREP(MTL_OP_MODE_TTC_MASK, 0)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

311

#define MTL_OP_MODE_TTC_64 FIELD_PREP(MTL_OP_MODE_TTC_MASK, 1)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

312

#define MTL_OP_MODE_TTC_96 FIELD_PREP(MTL_OP_MODE_TTC_MASK, 2)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

313

#define MTL_OP_MODE_TTC_128 FIELD_PREP(MTL_OP_MODE_TTC_MASK, 3)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

314

#define MTL_OP_MODE_TTC_192 FIELD_PREP(MTL_OP_MODE_TTC_MASK, 4)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

315

#define MTL_OP_MODE_TTC_256 FIELD_PREP(MTL_OP_MODE_TTC_MASK, 5)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

316

#define MTL_OP_MODE_TTC_384 FIELD_PREP(MTL_OP_MODE_TTC_MASK, 6)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

317

#define MTL_OP_MODE_TTC_512 FIELD_PREP(MTL_OP_MODE_TTC_MASK, 7)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

330

#define MTL_OP_MODE_RTC_32 FIELD_PREP(MTL_OP_MODE_RTC_MASK, 1)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

331

#define MTL_OP_MODE_RTC_64 FIELD_PREP(MTL_OP_MODE_RTC_MASK, 0)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

332

#define MTL_OP_MODE_RTC_96 FIELD_PREP(MTL_OP_MODE_RTC_MASK, 2)

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

333

#define MTL_OP_MODE_RTC_128 FIELD_PREP(MTL_OP_MODE_RTC_MASK, 3)

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

575

flow |= FIELD_PREP(GMAC_TX_FLOW_CTRL_PT_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

879

value = FIELD_PREP(GMAC_L4SP0, match);

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

881

value = FIELD_PREP(GMAC_L4DP0, match);

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

365

p->des2 |= cpu_to_le32(FIELD_PREP(TDES2_BUFFER1_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

369

p->des2 |= cpu_to_le32(FIELD_PREP(TDES2_BUFFER2_SIZE_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

375

FIELD_PREP(TDES3_SLOT_NUMBER_MASK, tcphdrlen) |

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

376

FIELD_PREP(TDES3_TCP_PKT_PAYLOAD_MASK, tcppayloadlen);

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

487

p->des3 |= cpu_to_le32(FIELD_PREP(TDES3_SA_INSERT_CTRL_MASK,

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

510

p->des2 = cpu_to_le32(FIELD_PREP(TDES2_IVT_MASK, inner_tag));

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

511

p->des3 = cpu_to_le32(FIELD_PREP(TDES3_IVTIR_MASK, inner_type) |

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c

524

p->des2 |= cpu_to_le32(FIELD_PREP(TDES2_VLAN_TAG_MASK, type));

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

263

mtl_rx_op |= FIELD_PREP(MTL_OP_MODE_RQS_MASK, rqs);

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

55

value = value | FIELD_PREP(DMA_CHAN_RX_CTRL_RXPBL_MASK, rxpbl);

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

76

value = value | FIELD_PREP(DMA_CHAN_TX_CTRL_TXPBL_MASK, txpbl);

drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c

237

data |= FIELD_PREP(GMAC_HI_DCS, STMMAC_CHAN0);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h

35

#define XGMAC_CONFIG_HDSMS_256 FIELD_PREP(XGMAC_CONFIG_HDSMS, 0x2)

drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h

47

FIELD_PREP(XGMAC_CONFIG_GPSL, \

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1254

iddr = FIELD_PREP(XGMAC_IDDR_FNUM_MASK, filter_no) |

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1255

FIELD_PREP(XGMAC_IDDR_REG_MASK, reg);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1256

value = FIELD_PREP(XGMAC_IDDR, iddr);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1281

iddr = FIELD_PREP(XGMAC_IDDR_FNUM_MASK, filter_no) |

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1282

FIELD_PREP(XGMAC_IDDR_REG_MASK, reg);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1283

value = FIELD_PREP(XGMAC_IDDR, iddr);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1392

value = FIELD_PREP(XGMAC_L4SP0, match);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1398

value = FIELD_PREP(XGMAC_L4DP0, match);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

178

value |= FIELD_PREP(XGMAC_TACPQE, 1);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

180

value |= FIELD_PREP(XGMAC_MCBCQEN, 1);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

370

value |= FIELD_PREP(XGMAC_PT, pause_time);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

176

tdes3 |= FIELD_PREP(XGMAC_TDES3_CIC, 0x3);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

209

p->des2 |= cpu_to_le32(FIELD_PREP(XGMAC_TDES2_B2L, len2));

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

212

tdes3 |= FIELD_PREP(XGMAC_TDES3_THL, tcphdrlen);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

213

tdes3 |= FIELD_PREP(XGMAC_TDES3_TPL, tcppayloadlen);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

314

p->des3 |= cpu_to_le32(FIELD_PREP(XGMAC_TDES3_SAIC, sarc_type));

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

327

u32 des = FIELD_PREP(XGMAC_TDES2_IVT, inner_tag);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

331

des = FIELD_PREP(XGMAC_TDES3_IVTIR, inner_type);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

344

p->des2 |= cpu_to_le32(FIELD_PREP(XGMAC_TDES2_VTIR, type));

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c

208

value |= FIELD_PREP(XGMAC_Q2TCMAP, channel);

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

244

*regval = FIELD_PREP(DMA_AXI_BLEN_MASK, val);

drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h

44

#define VLAN_TAG_STRIP_NONE FIELD_PREP(VLAN_TAG_CTRL_EVLS_MASK, 0x0)

drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h

45

#define VLAN_TAG_STRIP_PASS FIELD_PREP(VLAN_TAG_CTRL_EVLS_MASK, 0x1)

drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h

46

#define VLAN_TAG_STRIP_FAIL FIELD_PREP(VLAN_TAG_CTRL_EVLS_MASK, 0x2)

drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h

47

#define VLAN_TAG_STRIP_ALL FIELD_PREP(VLAN_TAG_CTRL_EVLS_MASK, 0x3)

drivers/net/ethernet/sunplus/spl2sw_mac.c

104

reg = MAC_W_LAN_PORT_0 | FIELD_PREP(MAC_W_VID, mac->vlan_id) | MAC_W_MAC_CMD;

drivers/net/ethernet/sunplus/spl2sw_mac.c

188

reg |= FIELD_PREP(MAC_EXT_PHY1_ADDR, 31) | FIELD_PREP(MAC_EXT_PHY0_ADDR, 31);

drivers/net/ethernet/sunplus/spl2sw_mac.c

195

reg = FIELD_PREP(MAC_P1_PVID, 1) | FIELD_PREP(MAC_P0_PVID, 0);

drivers/net/ethernet/sunplus/spl2sw_mac.c

201

reg = FIELD_PREP(MAC_VLAN_MEMSET_1, 0xa) | FIELD_PREP(MAC_VLAN_MEMSET_0, 9);

drivers/net/ethernet/sunplus/spl2sw_mac.c

210

reg |= FIELD_PREP(MAC_RMC_TB_FAULT_RULE, 1) |

drivers/net/ethernet/sunplus/spl2sw_mac.c

211

FIELD_PREP(MAC_LED_FLASH_TIME, 1) |

drivers/net/ethernet/sunplus/spl2sw_mac.c

212

FIELD_PREP(MAC_BC_STORM_PREV, 1);

drivers/net/ethernet/sunplus/spl2sw_mac.c

225

mask = FIELD_PREP(MAC_DIS_MC2CPU, mac->lan_port) |

drivers/net/ethernet/sunplus/spl2sw_mac.c

226

FIELD_PREP(MAC_DIS_UN2CPU, mac->lan_port);

drivers/net/ethernet/sunplus/spl2sw_mac.c

231

rx_mode = FIELD_PREP(MAC_DIS_MC2CPU, mac->lan_port) |

drivers/net/ethernet/sunplus/spl2sw_mac.c

232

FIELD_PREP(MAC_DIS_UN2CPU, mac->lan_port);

drivers/net/ethernet/sunplus/spl2sw_mac.c

236

rx_mode = FIELD_PREP(MAC_DIS_MC2CPU, mac->lan_port);

drivers/net/ethernet/sunplus/spl2sw_mac.c

33

reg |= FIELD_PREP(MAC_DIS_PORT, ~comm->enable);

drivers/net/ethernet/sunplus/spl2sw_mac.c

49

reg &= FIELD_PREP(MAC_DIS_PORT, ~comm->enable) | ~MAC_DIS_PORT;

drivers/net/ethernet/sunplus/spl2sw_mac.c

67

reg = MAC_W_CPU_PORT_0 | FIELD_PREP(MAC_W_VID, mac->vlan_id) |

drivers/net/ethernet/sunplus/spl2sw_mac.c

68

FIELD_PREP(MAC_W_AGE, 1) | MAC_W_MAC_CMD;

drivers/net/ethernet/sunplus/spl2sw_mdio.c

29

reg |= FIELD_PREP(MAC_EXT_PHY0_ADDR, addr);

drivers/net/ethernet/sunplus/spl2sw_mdio.c

31

reg2 = FIELD_PREP(MAC_CPU_PHY_WT_DATA, wdata) | FIELD_PREP(MAC_CPU_PHY_CMD, cmd) |

drivers/net/ethernet/sunplus/spl2sw_mdio.c

32

FIELD_PREP(MAC_CPU_PHY_REG_ADDR, regnum) | FIELD_PREP(MAC_CPU_PHY_ADDR, addr);

drivers/net/ethernet/sunplus/spl2sw_mdio.c

51

reg |= FIELD_PREP(MAC_EXT_PHY0_ADDR, 31);

drivers/net/ethernet/sunplus/spl2sw_phy.c

24

reg |= FIELD_PREP(MAC_FORCE_RMII_LINK, mac->lan_port);

drivers/net/ethernet/sunplus/spl2sw_phy.c

27

reg |= FIELD_PREP(MAC_FORCE_RMII_SPD, mac->lan_port);

drivers/net/ethernet/sunplus/spl2sw_phy.c

29

reg &= FIELD_PREP(MAC_FORCE_RMII_SPD, ~mac->lan_port) |

drivers/net/ethernet/sunplus/spl2sw_phy.c

34

reg |= FIELD_PREP(MAC_FORCE_RMII_DPX, mac->lan_port);

drivers/net/ethernet/sunplus/spl2sw_phy.c

36

reg &= FIELD_PREP(MAC_FORCE_RMII_DPX, ~mac->lan_port) |

drivers/net/ethernet/sunplus/spl2sw_phy.c

41

reg |= FIELD_PREP(MAC_FORCE_RMII_FC, mac->lan_port);

drivers/net/ethernet/sunplus/spl2sw_phy.c

43

reg &= FIELD_PREP(MAC_FORCE_RMII_FC, ~mac->lan_port) |

drivers/net/ethernet/sunplus/spl2sw_phy.c

47

reg &= FIELD_PREP(MAC_FORCE_RMII_LINK, ~mac->lan_port) |

drivers/net/ethernet/tehuti/tn40.h

222

FIELD_PREP(GENMASK(4, 0), (bc)) | \

drivers/net/ethernet/tehuti/tn40.h

223

FIELD_PREP(GENMASK(7, 5), (checksum)) | \

drivers/net/ethernet/tehuti/tn40.h

224

FIELD_PREP(BIT(8), (vtag)) | \

drivers/net/ethernet/tehuti/tn40.h

225

FIELD_PREP(GENMASK(12, 9), (lgsnd)) | \

drivers/net/ethernet/tehuti/tn40.h

226

FIELD_PREP(GENMASK(15, 13), \

drivers/net/ethernet/tehuti/tn40.h

228

FIELD_PREP(GENMASK(31, 20), \

drivers/net/ethernet/tehuti/tn40.h

35

FIELD_PREP(GENMASK(14, 0), (coal)) | \

drivers/net/ethernet/tehuti/tn40.h

36

FIELD_PREP(BIT(15), (coal_rc)) | \

drivers/net/ethernet/tehuti/tn40.h

37

FIELD_PREP(GENMASK(19, 16), (rxf_th)) | \

drivers/net/ethernet/tehuti/tn40.h

38

FIELD_PREP(GENMASK(31, 20), (pck_th)) \

drivers/net/ethernet/tehuti/tn40_mdio.c

13

(FIELD_PREP(TN40_MDIO_DEVAD_MASK, (device)) | \

drivers/net/ethernet/tehuti/tn40_mdio.c

14

(FIELD_PREP(TN40_MDIO_PRTAD_MASK, (port))))

drivers/net/ethernet/ti/icssm/icssm_prueth.c

265

txcfg = FIELD_PREP(PRUSS_MII_RT_RX_FRMS_MIN_FRM_MASK,

drivers/net/ethernet/ti/icssm/icssm_prueth.c

273

txcfg |= FIELD_PREP(PRUSS_MII_RT_RX_FRMS_MAX_FRM_MASK,

drivers/net/ethernet/wangxun/libwx/wx_hw.c

1495

FIELD_PREP(WX_PSR_VM_CTL_POOL_MASK, VMDQ_P(0)) |

drivers/net/ethernet/wangxun/libwx/wx_hw.c

2132

rss_field |= FIELD_PREP(WX_RDB_PL_CFG_RSS_MASK, wx->rss_flags);

drivers/net/ethernet/wangxun/libwx/wx_hw.c

2144

rss_field |= FIELD_PREP(WX_RDB_RA_CTL_RSS_MASK, wx->rss_flags);

drivers/net/ethernet/wangxun/libwx/wx_hw.c

2168

#define WX_RDB_RSS_PL_2 FIELD_PREP(GENMASK(31, 29), 1)

drivers/net/ethernet/wangxun/libwx/wx_hw.c

2169

#define WX_RDB_RSS_PL_4 FIELD_PREP(GENMASK(31, 29), 2)

drivers/net/ethernet/wangxun/libwx/wx_mbx.c

59

FIELD_PREP(WX_MBVFICR_VFACK_MASK,

drivers/net/ethernet/wangxun/libwx/wx_mbx.c

76

FIELD_PREP(WX_MBVFICR_VFREQ_MASK,

drivers/net/ethernet/wangxun/libwx/wx_sriov.c

885

msgbuf[1] = FIELD_PREP(GENMASK(31, 1), wx->speed) | link_up;

drivers/net/ethernet/wangxun/libwx/wx_type.h

111

#define WX_CFG_PORT_CTL_NUM_VT_8 FIELD_PREP(GENMASK(13, 12), 1)

drivers/net/ethernet/wangxun/libwx/wx_type.h

112

#define WX_CFG_PORT_CTL_NUM_VT_32 FIELD_PREP(GENMASK(13, 12), 2)

drivers/net/ethernet/wangxun/libwx/wx_type.h

113

#define WX_CFG_PORT_CTL_NUM_VT_64 FIELD_PREP(GENMASK(13, 12), 3)

drivers/net/ethernet/wangxun/libwx/wx_type.h

226

#define WX_PSR_1588_MSG_V1_SYNC FIELD_PREP(GENMASK(7, 0), 0)

drivers/net/ethernet/wangxun/libwx/wx_type.h

227

#define WX_PSR_1588_MSG_V1_DELAY_REQ FIELD_PREP(GENMASK(7, 0), 1)

drivers/net/ethernet/wangxun/libwx/wx_type.h

233

#define WX_PSR_1588_CTL_TYPE_L4_V1 FIELD_PREP(GENMASK(3, 1), 1)

drivers/net/ethernet/wangxun/libwx/wx_type.h

234

#define WX_PSR_1588_CTL_TYPE_EVENT_V2 FIELD_PREP(GENMASK(3, 1), 5)

drivers/net/ethernet/wangxun/libwx/wx_type.h

275

#define WX_PSR_MAC_SWC_AD_H_AD(v) FIELD_PREP(U16_MAX, v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

276

#define WX_PSR_MAC_SWC_AD_H_ADTYPE(v) FIELD_PREP(BIT(30), v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

344

#define WX_TSC_1588_SDP_OUT_LEVEL_H FIELD_PREP(BIT(4), 0)

drivers/net/ethernet/wangxun/libwx/wx_type.h

345

#define WX_TSC_1588_SDP_OUT_LEVEL_L FIELD_PREP(BIT(4), 1)

drivers/net/ethernet/wangxun/libwx/wx_type.h

347

#define WX_TSC_1588_SDP_FUN_SEL_TT0 FIELD_PREP(WX_TSC_1588_SDP_FUN_SEL_MASK, 1)

drivers/net/ethernet/wangxun/libwx/wx_type.h

348

#define WX_TSC_1588_SDP_FUN_SEL_TS0 FIELD_PREP(WX_TSC_1588_SDP_FUN_SEL_MASK, 5)

drivers/net/ethernet/wangxun/libwx/wx_type.h

369

#define WX_MAC_TX_CFG_SPEED_10G FIELD_PREP(WX_MAC_TX_CFG_SPEED_MASK, 0)

drivers/net/ethernet/wangxun/libwx/wx_type.h

370

#define WX_MAC_TX_CFG_SPEED_1G FIELD_PREP(WX_MAC_TX_CFG_SPEED_MASK, 3)

drivers/net/ethernet/wangxun/libwx/wx_type.h

384

#define WX_MSCA_RA(v) FIELD_PREP(U16_MAX, v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

385

#define WX_MSCA_PA(v) FIELD_PREP(GENMASK(20, 16), v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

386

#define WX_MSCA_DA(v) FIELD_PREP(GENMASK(25, 21), v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

388

#define WX_MSCC_CMD(v) FIELD_PREP(GENMASK(17, 16), v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

399

#define WX_MDIO_CLK(v) FIELD_PREP(GENMASK(21, 19), v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

462

#define WX_PX_RR_CFG_MAX_RSCBUF_16 FIELD_PREP(GENMASK(24, 23), 3)

drivers/net/ethernet/wangxun/libwx/wx_type.h

48

#define WX_SPI_CMD_CMD(_v) FIELD_PREP(GENMASK(30, 28), _v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

49

#define WX_SPI_CMD_CLK(_v) FIELD_PREP(GENMASK(27, 25), _v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

50

#define WX_SPI_CMD_ADDR(_v) FIELD_PREP(GENMASK(23, 0), _v)

drivers/net/ethernet/wangxun/libwx/wx_type.h

688

#define WX_TXD_TUNNEL_UDP FIELD_PREP(BIT(WX_TXD_TUNNEL_TYPE_SHIFT), 0)

drivers/net/ethernet/wangxun/libwx/wx_type.h

689

#define WX_TXD_TUNNEL_GRE FIELD_PREP(BIT(WX_TXD_TUNNEL_TYPE_SHIFT), 1)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

22

#define WX_VXMRQC_PSR(f) FIELD_PREP(GENMASK(5, 1), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

23

#define WX_VXMRQC_RSS_HASH(f) FIELD_PREP(GENMASK(15, 13), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

25

#define WX_VXMRQC_RSS(f) FIELD_PREP(GENMASK(31, 16), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

72

#define WX_VXRXDCTL_BUFLEN(f) FIELD_PREP(GENMASK(6, 1), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

74

#define WX_VXRXDCTL_BUFSZ(f) FIELD_PREP(GENMASK(11, 8), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

76

#define WX_VXRXDCTL_HDRSZ(f) FIELD_PREP(GENMASK(15, 12), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

79

#define WX_VXRXDCTL_RSCMAX(f) FIELD_PREP(GENMASK(24, 23), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

91

#define WX_VXTXDCTL_BUFLEN(f) FIELD_PREP(GENMASK(6, 1), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

92

#define WX_VXTXDCTL_PTHRESH(f) FIELD_PREP(GENMASK(11, 8), f)

drivers/net/ethernet/wangxun/libwx/wx_vf.h

93

#define WX_VXTXDCTL_WTHRESH(f) FIELD_PREP(GENMASK(22, 16), f)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

120

#define TXGBE_RDB_FDIR_CTL_DROP_Q(v) FIELD_PREP(GENMASK(14, 8), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

121

#define TXGBE_RDB_FDIR_CTL_HASH_BITS(v) FIELD_PREP(GENMASK(23, 20), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

122

#define TXGBE_RDB_FDIR_CTL_MAX_LENGTH(v) FIELD_PREP(GENMASK(27, 24), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

123

#define TXGBE_RDB_FDIR_CTL_FULL_THRESH(v) FIELD_PREP(GENMASK(31, 28), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

132

#define TXGBE_RDB_FDIR_HASH_SIG_SW_INDEX(v) FIELD_PREP(GENMASK(31, 16), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

136

#define TXGBE_RDB_FDIR_CMD_CMD(v) FIELD_PREP(GENMASK(1, 0), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

142

#define TXGBE_RDB_FDIR_CMD_FLOW_TYPE(v) FIELD_PREP(GENMASK(6, 5), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

146

#define TXGBE_RDB_FDIR_CMD_RX_QUEUE(v) FIELD_PREP(GENMASK(22, 16), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

147

#define TXGBE_RDB_FDIR_CMD_VT_POOL(v) FIELD_PREP(GENMASK(29, 24), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

160

#define TXGBE_RDB_FDIR_FLEX_CFG_BASE_MAC FIELD_PREP(GENMASK(1, 0), 0)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

162

#define TXGBE_RDB_FDIR_FLEX_CFG_OFST(v) FIELD_PREP(GENMASK(7, 3), v)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

169

#define TXGBE_AML_MAC_TX_CFG_SPEED_40G FIELD_PREP(GENMASK(30, 27), 0)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

170

#define TXGBE_AML_MAC_TX_CFG_SPEED_25G FIELD_PREP(GENMASK(30, 27), 2)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

171

#define TXGBE_AML_MAC_TX_CFG_SPEED_10G FIELD_PREP(GENMASK(30, 27), 8)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

72

#define TXGBE_MAC_MISC_CTL_LINK_PCS FIELD_PREP(BIT(0), 0)

drivers/net/ethernet/wangxun/txgbe/txgbe_type.h

73

#define TXGBE_MAC_MISC_CTL_LINK_BOTH FIELD_PREP(BIT(0), 1)

drivers/net/ethernet/xilinx/xilinx_axienet_main.c

248

cr = FIELD_PREP(XAXIDMA_COALESCE_MASK, count) | XAXIDMA_IRQ_IOC_MASK |

drivers/net/ethernet/xilinx/xilinx_axienet_main.c

262

cr |= FIELD_PREP(XAXIDMA_DELAY_MASK, timer) |

drivers/net/mdio/mdio-airoha.c

111

val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);

drivers/net/mdio/mdio-airoha.c

112

val |= FIELD_PREP(AN7583_MII_CL22_REG_ADDR, regnum);

drivers/net/mdio/mdio-airoha.c

113

val |= FIELD_PREP(AN7583_MII_RWDATA, value);

drivers/net/mdio/mdio-airoha.c

135

val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);

drivers/net/mdio/mdio-airoha.c

136

val |= FIELD_PREP(AN7583_MII_CL45_DEV_ADDR, devnum);

drivers/net/mdio/mdio-airoha.c

137

val |= FIELD_PREP(AN7583_MII_CL45_REG_ADDR, regnum);

drivers/net/mdio/mdio-airoha.c

149

val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);

drivers/net/mdio/mdio-airoha.c

150

val |= FIELD_PREP(AN7583_MII_CL45_DEV_ADDR, devnum);

drivers/net/mdio/mdio-airoha.c

176

val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);

drivers/net/mdio/mdio-airoha.c

177

val |= FIELD_PREP(AN7583_MII_CL45_DEV_ADDR, devnum);

drivers/net/mdio/mdio-airoha.c

178

val |= FIELD_PREP(AN7583_MII_CL45_REG_ADDR, regnum);

drivers/net/mdio/mdio-airoha.c

190

val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);

drivers/net/mdio/mdio-airoha.c

191

val |= FIELD_PREP(AN7583_MII_CL45_DEV_ADDR, devnum);

drivers/net/mdio/mdio-airoha.c

192

val |= FIELD_PREP(AN7583_MII_RWDATA, value);

drivers/net/mdio/mdio-airoha.c

84

val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);

drivers/net/mdio/mdio-airoha.c

85

val |= FIELD_PREP(AN7583_MII_CL22_REG_ADDR, regnum);

drivers/net/mdio/mdio-aspeed.c

58

| FIELD_PREP(ASPEED_MDIO_CTRL_ST, st)

drivers/net/mdio/mdio-aspeed.c

59

| FIELD_PREP(ASPEED_MDIO_CTRL_OP, op)

drivers/net/mdio/mdio-aspeed.c

60

| FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, phyad)

drivers/net/mdio/mdio-aspeed.c

61

| FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regad)

drivers/net/mdio/mdio-aspeed.c

62

| FIELD_PREP(ASPEED_MDIO_DATA_MIIRDATA, data);

drivers/net/mdio/mdio-ipq4019.c

21

#define MDIO_MODE_DIV(x) FIELD_PREP(MDIO_MODE_DIV_MASK, (x) - 1)

drivers/net/mdio/mdio-mux-meson-g12a.c

166

value = FIELD_PREP(PHY_CNTL1_ST_MODE, 3) |

drivers/net/mdio/mdio-mux-meson-g12a.c

167

FIELD_PREP(PHY_CNTL1_ST_PHYADD, EPHY_DFLT_ADD) |

drivers/net/mdio/mdio-mux-meson-g12a.c

168

FIELD_PREP(PHY_CNTL1_MII_MODE, EPHY_MODE_RMII) |

drivers/net/mdio/mdio-mux-meson-gxl.c

52

FIELD_PREP(REG3_CFGMODE, 0x7) |

drivers/net/mdio/mdio-mux-meson-gxl.c

54

FIELD_PREP(REG3_PHYADDR, 8) |

drivers/net/mdio/mdio-mux-meson-gxl.c

69

writel(REG2_REVERSED | FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),

drivers/net/mdio/mdio-realtek-rtl9300.c

114

err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, FIELD_PREP(PHY_CTRL_INDATA, port));

drivers/net/mdio/mdio-realtek-rtl9300.c

118

val = FIELD_PREP(PHY_CTRL_REG_ADDR, regnum) |

drivers/net/mdio/mdio-realtek-rtl9300.c

119

FIELD_PREP(PHY_CTRL_PARK_PAGE, 0x1f) |

drivers/net/mdio/mdio-realtek-rtl9300.c

120

FIELD_PREP(PHY_CTRL_MAIN_PAGE, 0xfff) |

drivers/net/mdio/mdio-realtek-rtl9300.c

167

err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, FIELD_PREP(PHY_CTRL_INDATA, value));

drivers/net/mdio/mdio-realtek-rtl9300.c

171

val = FIELD_PREP(PHY_CTRL_REG_ADDR, regnum) |

drivers/net/mdio/mdio-realtek-rtl9300.c

172

FIELD_PREP(PHY_CTRL_PARK_PAGE, 0x1f) |

drivers/net/mdio/mdio-realtek-rtl9300.c

173

FIELD_PREP(PHY_CTRL_MAIN_PAGE, 0xfff) |

drivers/net/mdio/mdio-realtek-rtl9300.c

218

val = FIELD_PREP(PHY_CTRL_INDATA, port);

drivers/net/mdio/mdio-realtek-rtl9300.c

223

val = FIELD_PREP(PHY_CTRL_MMD_DEVAD, dev_addr) |

drivers/net/mdio/mdio-realtek-rtl9300.c

224

FIELD_PREP(PHY_CTRL_MMD_REG, regnum);

drivers/net/mdio/mdio-realtek-rtl9300.c

276

val = FIELD_PREP(PHY_CTRL_INDATA, value);

drivers/net/mdio/mdio-realtek-rtl9300.c

281

val = FIELD_PREP(PHY_CTRL_MMD_DEVAD, dev_addr) |

drivers/net/mdio/mdio-realtek-rtl9300.c

282

FIELD_PREP(PHY_CTRL_MMD_REG, regnum);

drivers/net/ovpn/proto.h

113

return FIELD_PREP(OVPN_OPCODE_PKTTYPE_MASK, opcode) |

drivers/net/ovpn/proto.h

114

FIELD_PREP(OVPN_OPCODE_KEYID_MASK, key_id) |

drivers/net/ovpn/proto.h

115

FIELD_PREP(OVPN_OPCODE_PEERID_MASK, peer_id);

drivers/net/pcs/pcs-mtk-lynxi.c

37

#define SGMII_LINK_TIMER_VAL(ns) FIELD_PREP(SGMII_LINK_TIMER_MASK, \

drivers/net/pcs/pcs-mtk-lynxi.c

45

#define SGMII_SPEED_10 FIELD_PREP(SGMII_SPEED_MASK, 0)

drivers/net/pcs/pcs-mtk-lynxi.c

46

#define SGMII_SPEED_100 FIELD_PREP(SGMII_SPEED_MASK, 1)

drivers/net/pcs/pcs-mtk-lynxi.c

47

#define SGMII_SPEED_1000 FIELD_PREP(SGMII_SPEED_MASK, 2)

drivers/net/pcs/pcs-mtk-lynxi.c

57

#define SGMII_PHY_SPEED_1_25G FIELD_PREP(SGMII_PHY_SPEED_MASK, 0)

drivers/net/pcs/pcs-mtk-lynxi.c

58

#define SGMII_PHY_SPEED_3_125G FIELD_PREP(SGMII_PHY_SPEED_MASK, 1)

drivers/net/pcs/pcs-rzn1-miic.c

364

val = FIELD_PREP(MIIC_CONVCTRL_CONV_MODE, conv_mode);

drivers/net/pcs/pcs-rzn1-miic.c

372

val |= FIELD_PREP(MIIC_CONVCTRL_CONV_SPEED, speed);

drivers/net/pcs/pcs-rzn1-miic.c

411

val |= FIELD_PREP(MIIC_CONVCTRL_CONV_SPEED, conv_speed);

drivers/net/pcs/pcs-rzn1-miic.c

432

val = FIELD_PREP(MIIC_CONVCTRL_CONV_MODE, CONV_MODE_RMII) |

drivers/net/pcs/pcs-rzn1-miic.c

433

FIELD_PREP(MIIC_CONVCTRL_CONV_SPEED, CONV_MODE_100MBPS);

drivers/net/pcs/pcs-xpcs-plat.c

38

return FIELD_PREP(0x1f0000, dev) | FIELD_PREP(0xffff, reg);

drivers/net/pcs/pcs-xpcs-wx.c

101

FIELD_PREP(TXGBE_RX_GEN_CTL3_LOS_TRSHLD0, 0x4));

drivers/net/pcs/pcs-xpcs-wx.c

14

#define TXGBE_TX_GEN_CTL2_TX0_WIDTH(v) FIELD_PREP(GENMASK(9, 8), v)

drivers/net/pcs/pcs-xpcs-wx.c

16

#define TXGBE_TX_RATE_CTL_TX0_RATE(v) FIELD_PREP(GENMASK(2, 0), v)

drivers/net/pcs/pcs-xpcs-wx.c

18

#define TXGBE_RX_GEN_CTL2_RX0_WIDTH(v) FIELD_PREP(GENMASK(9, 8), v)

drivers/net/pcs/pcs-xpcs-wx.c

22

#define TXGBE_RX_RATE_CTL_RX0_RATE(v) FIELD_PREP(GENMASK(1, 0), v)

drivers/net/pcs/pcs-xpcs-wx.c

26

#define TXGBE_RX_EQ_CTL0_VGA1_GAIN(v) FIELD_PREP(GENMASK(15, 12), v)

drivers/net/pcs/pcs-xpcs-wx.c

27

#define TXGBE_RX_EQ_CTL0_VGA2_GAIN(v) FIELD_PREP(GENMASK(11, 8), v)

drivers/net/pcs/pcs-xpcs-wx.c

28

#define TXGBE_RX_EQ_CTL0_CTLE_POLE(v) FIELD_PREP(GENMASK(7, 5), v)

drivers/net/pcs/pcs-xpcs-wx.c

29

#define TXGBE_RX_EQ_CTL0_CTLE_BOOST(v) FIELD_PREP(GENMASK(4, 0), v)

drivers/net/pcs/pcs-xpcs-wx.c

45

#define TXGBE_MISC_CTL0_RX_VREF(v) FIELD_PREP(GENMASK(12, 8), v)

drivers/net/pcs/pcs-xpcs-wx.c

65

FIELD_PREP(TXGBE_TX_GENCTL1_VBOOST_LVL, 0x5));

drivers/net/pcs/pcs-xpcs-wx.c

92

FIELD_PREP(TXGBE_TX_GENCTL1_VBOOST_LVL, 0x5));

drivers/net/pcs/pcs-xpcs.c

1297

FIELD_PREP(DW_VR_MII_EEE_MULT_FACT_100NS,

drivers/net/pcs/pcs-xpcs.c

786

val = FIELD_PREP(DW_VR_MII_PCS_MODE_MASK,

drivers/net/pcs/pcs-xpcs.c

798

val |= FIELD_PREP(DW_VR_MII_TX_CONFIG_MASK, tx_conf);

drivers/net/pcs/pcs-xpcs.c

854

val = FIELD_PREP(DW_VR_MII_PCS_MODE_MASK,

drivers/net/pcs/pcs-xpcs.h

25

#define DW_PSEQ_ST_GOOD FIELD_PREP(GENMASK(4, 2), 0x4)

drivers/net/phy/adin.c

135

FIELD_PREP(ADIN1300_GE_RGMII_RX_MSK, x)

drivers/net/phy/adin.c

138

FIELD_PREP(ADIN1300_GE_RGMII_GTX_MSK, x)

drivers/net/phy/adin.c

153

FIELD_PREP(ADIN1300_GE_RMII_FIFO_DEPTH_MSK, x)

drivers/net/phy/adin.c

380

val = FIELD_PREP(ADIN1300_DOWNSPEED_RETRIES_MSK, cnt);

drivers/net/phy/aquantia/aquantia.h

167

(FIELD_PREP(AQR_FW_FINGERPRINT_MAJOR, major) | \

drivers/net/phy/aquantia/aquantia.h

168

FIELD_PREP(AQR_FW_FINGERPRINT_MINOR, minor) | \

drivers/net/phy/aquantia/aquantia.h

169

FIELD_PREP(AQR_FW_FINGERPRINT_BUILD_ID, build_id) | \

drivers/net/phy/aquantia/aquantia.h

170

FIELD_PREP(AQR_FW_FINGERPRINT_PROV_ID, prov_id) | \

drivers/net/phy/aquantia/aquantia.h

171

FIELD_PREP(AQR_FW_FINGERPRINT_MISC_ID, misc_id) | \

drivers/net/phy/aquantia/aquantia.h

172

FIELD_PREP(AQR_FW_FINGERPRINT_MISC_VER, misc_ver))

drivers/net/phy/aquantia/aquantia.h

33

#define VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE3_MSW_ADDR_MASK, (u16)((x) >> 16))

drivers/net/phy/aquantia/aquantia.h

36

#define VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE4_LSW_ADDR_MASK, (u16)(x))

drivers/net/phy/aquantia/aquantia.h

40

#define VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE5_MSW_DATA_MASK, (u16)((x) >> 16))

drivers/net/phy/aquantia/aquantia.h

43

#define VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA(x) FIELD_PREP(VEND1_GLOBAL_MAILBOX_INTERFACE6_LSW_DATA_MASK, (u16)(x))

drivers/net/phy/aquantia/aquantia_main.c

651

val |= FIELD_PREP(MDIO_AN_VEND_PROV_DOWNSHIFT_MASK, cnt);

drivers/net/phy/as21xxx.c

20

#define VEND1_GLB_CPU_CTRL_LED_POLARITY(_n) FIELD_PREP(VEND1_GLB_CPU_CTRL_LED_POLARITY_MASK, \

drivers/net/phy/as21xxx.c

475

cmd = FIELD_PREP(AEON_IPC_CMD_SIZE, data_len) |

drivers/net/phy/as21xxx.c

476

FIELD_PREP(AEON_IPC_CMD_OPCODE, opcode);

drivers/net/phy/as21xxx.c

527

cmd = FIELD_PREP(AEON_IPC_CMD_SIZE, 0) |

drivers/net/phy/as21xxx.c

528

FIELD_PREP(AEON_IPC_CMD_OPCODE, IPC_CMD_NOOP);

drivers/net/phy/as21xxx.c

785

FIELD_PREP(VEND1_LED_REG_A_EVENT, val));

drivers/net/phy/as21xxx.c

844

FIELD_PREP(VEND1_LED_REG_A_EVENT, val));

drivers/net/phy/bcm-phy-lib.c

672

FIELD_PREP(BCM54XX_ECD_CTRL_UNIT_MASK,

drivers/net/phy/bcm54140.c

405

set |= FIELD_PREP(BCM54140_RDB_MON_CTRL_SEL_MASK,

drivers/net/phy/bcm54140.c

767

set = FIELD_PREP(BCM54140_RDB_SPARE2_WS_RTRY_LIMIT, cnt - 2);

drivers/net/phy/bcm54140.c

812

set = FIELD_PREP(BCM54140_RDB_C_APWR_APD_MODE_MASK,

drivers/net/phy/bcm54140.c

815

set = FIELD_PREP(BCM54140_RDB_C_APWR_APD_MODE_MASK,

drivers/net/phy/dp83822.c

1101

FIELD_PREP(DP83822_MLEDCR_CFG, mode));

drivers/net/phy/dp83822.c

1106

FIELD_PREP(DP83822_LEDCFG1_LED1_CTRL,

drivers/net/phy/dp83822.c

1112

FIELD_PREP(DP83822_LEDCFG1_LED3_CTRL,

drivers/net/phy/dp83822.c

483

FIELD_PREP(DP83822_MLEDCR_ROUTE,

drivers/net/phy/dp83822.c

490

FIELD_PREP(DP83822_IOCTRL2_GPIO2_CTRL,

drivers/net/phy/dp83822.c

499

FIELD_PREP(DP83822_IOCTRL1_GPIO1_CTRL,

drivers/net/phy/dp83822.c

508

FIELD_PREP(DP83822_IOCTRL1_GPIO3_CTRL,

drivers/net/phy/dp83822.c

530

FIELD_PREP(DP83822_IOCTRL2_GPIO2_CTRL,

drivers/net/phy/dp83822.c

532

FIELD_PREP(DP83822_IOCTRL2_GPIO2_CLK_SRC,

drivers/net/phy/dp83822.c

538

FIELD_PREP(DP83822_100BASE_TX_LINE_DRIVER_SWING,

drivers/net/phy/dp83822.c

544

FIELD_PREP(DP83822_IOCTRL_MAC_IMPEDANCE_CTRL,

drivers/net/phy/dp83822.c

689

val = FIELD_PREP(DP83826_VOD_CFG1_MINUS_MDI_MASK, dp83822->cfg_dac_minus) |

drivers/net/phy/dp83822.c

690

FIELD_PREP(DP83826_VOD_CFG1_MINUS_MDIX_MASK,

drivers/net/phy/dp83822.c

698

val = FIELD_PREP(DP83826_VOD_CFG2_MINUS_MDIX_MASK,

drivers/net/phy/dp83822.c

708

val = FIELD_PREP(DP83826_VOD_CFG2_PLUS_MDIX_MASK, dp83822->cfg_dac_plus) |

drivers/net/phy/dp83822.c

709

FIELD_PREP(DP83826_VOD_CFG2_PLUS_MDI_MASK, dp83822->cfg_dac_plus);

drivers/net/phy/dp83867.c

461

val |= FIELD_PREP(DP83867_DOWNSHIFT_ATTEMPT_MASK, count);

drivers/net/phy/dp83869.c

479

val |= FIELD_PREP(DP83869_DOWNSHIFT_ATTEMPT_MASK, count);

drivers/net/phy/dp83td510.c

740

FIELD_PREP(DP83TD510E_TDR_END_TAP_INDEX_1,

drivers/net/phy/dp83td510.c

742

FIELD_PREP(DP83TD510E_TDR_START_TAP_INDEX_1,

drivers/net/phy/dp83td510.c

748

FIELD_PREP(DP83TD510E_TDR_FLT_LOC_OFFSET_1,

drivers/net/phy/dp83td510.c

750

FIELD_PREP(DP83TD510E_TDR_FLT_INIT_1,

drivers/net/phy/intel-xway.c

216

val |= FIELD_PREP(XWAY_MDIO_MIICTRL_RXSKEW_MASK, int_delay);

drivers/net/phy/intel-xway.c

228

val |= FIELD_PREP(XWAY_MDIO_MIICTRL_TXSKEW_MASK, int_delay);

drivers/net/phy/marvell-88q2xxx.c

1053

FIELD_PREP(MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_0_MASK,

drivers/net/phy/marvell-88q2xxx.c

1059

FIELD_PREP(MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_1_MASK,

drivers/net/phy/marvell-88q2xxx.c

703

val = FIELD_PREP(MDIO_MMD_PCS_MV_TEMP_SENSOR3_INT_THRESH_MASK,

drivers/net/phy/marvell.c

1102

val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);

drivers/net/phy/marvell.c

1166

val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);

drivers/net/phy/marvell.c

1576

val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);

drivers/net/phy/marvell10g.c

396

val = FIELD_PREP(MV_PCS_DSC2_2P5G, ds);

drivers/net/phy/marvell10g.c

397

val |= FIELD_PREP(MV_PCS_DSC2_5G, ds);

drivers/net/phy/marvell10g.c

404

val |= FIELD_PREP(MV_PCS_DSC1_10GBT, ds);

drivers/net/phy/marvell10g.c

405

val |= FIELD_PREP(MV_PCS_DSC1_1GBR, ds);

drivers/net/phy/marvell10g.c

406

val |= FIELD_PREP(MV_PCS_DSC1_100BTX, ds);

drivers/net/phy/mediatek/mtk-2p5ge.c

129

FIELD_PREP(AUTO_NP_10XEN, 0x1));

drivers/net/phy/mediatek/mtk-ge-soc.c

1002

FIELD_PREP(MTK_PHY_MAX_GAIN_MASK, 0x8) |

drivers/net/phy/mediatek/mtk-ge-soc.c

1003

FIELD_PREP(MTK_PHY_MIN_GAIN_MASK, 0x13));

drivers/net/phy/mediatek/mtk-ge-soc.c

1007

FIELD_PREP(MTK_PHY_VCO_SLICER_THRESH_BITS_HIGH_EEE_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

1018

FIELD_PREP(MTK_PHY_SMI_DETCNT_MAX_MASK, 0x3f) |

drivers/net/phy/mediatek/mtk-ge-soc.c

1033

FIELD_PREP(EEE1000_STAGE2_TR_KF_MASK, 0x2));

drivers/net/phy/mediatek/mtk-ge-soc.c

1037

FIELD_PREP(SLAVE_WAKETR_TIMER_MASK, 0x6) |

drivers/net/phy/mediatek/mtk-ge-soc.c

1038

FIELD_PREP(SLAVE_REMTX_TIMER_MASK, 0x14));

drivers/net/phy/mediatek/mtk-ge-soc.c

1042

FIELD_PREP(SLAVE_WAKEINT_TIMER_MASK, 0x8));

drivers/net/phy/mediatek/mtk-ge-soc.c

1046

FIELD_PREP(TR_FREEZE_TIMER2_MASK, 0x24a));

drivers/net/phy/mediatek/mtk-ge-soc.c

1050

FIELD_PREP(EEE100_LPSYNC_STAGE1_UPDATE_TIMER_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

1058

FIELD_PREP(DFE_TAIL_EANBLE_VGA_TRHESH_1000, 0x1b));

drivers/net/phy/mediatek/mtk-ge-soc.c

1064

FIELD_PREP(MTK_PHY_LPI_WAKE_TIMER_1000_MASK, 0x19c));

drivers/net/phy/mediatek/mtk-ge-soc.c

1067

FIELD_PREP(MTK_PHY_SMI_DET_ON_THRESH_MASK, 0xc));

drivers/net/phy/mediatek/mtk-ge-soc.c

1073

FIELD_PREP(MTK_PHY_LPI_NORM_MSE_HI_THRESH1000_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

503

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_GBE_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

507

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_TBT_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

511

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_HBT_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

515

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_TST_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

520

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_GBE_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

524

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_TBT_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

528

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_HBT_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

532

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_TST_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

537

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_GBE_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

541

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_TBT_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

545

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_HBT_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

549

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_TST_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

554

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_GBE_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

558

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_TBT_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

562

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_HBT_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

566

FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_TST_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

812

FIELD_PREP(SLAVE_DSP_READY_TIME_MASK, 0x18) |

drivers/net/phy/mediatek/mtk-ge-soc.c

813

FIELD_PREP(MASTER_DSP_READY_TIME_MASK, 0x18));

drivers/net/phy/mediatek/mtk-ge-soc.c

820

FIELD_PREP(NORMAL_MSE_LO_THRESH_MASK, 0x55));

drivers/net/phy/mediatek/mtk-ge-soc.c

824

FIELD_PREP(FFE_UPDATE_GAIN_FORCE_VAL_MASK, 0x4) |

drivers/net/phy/mediatek/mtk-ge-soc.c

833

FIELD_PREP(SS_TR_KP100_MASK, 0x5) |

drivers/net/phy/mediatek/mtk-ge-soc.c

834

FIELD_PREP(SS_TR_KF100_MASK, 0x6) |

drivers/net/phy/mediatek/mtk-ge-soc.c

835

FIELD_PREP(SS_TR_KP1000_MASTER_MASK, 0x5) |

drivers/net/phy/mediatek/mtk-ge-soc.c

836

FIELD_PREP(SS_TR_KF1000_MASTER_MASK, 0x6) |

drivers/net/phy/mediatek/mtk-ge-soc.c

837

FIELD_PREP(SS_TR_KP1000_SLAVE_MASK, 0x5) |

drivers/net/phy/mediatek/mtk-ge-soc.c

838

FIELD_PREP(SS_TR_KF1000_SLAVE_MASK, 0x6));

drivers/net/phy/mediatek/mtk-ge-soc.c

864

FIELD_PREP(RESET_SYNC_OFFSET_MASK, 0x6));

drivers/net/phy/mediatek/mtk-ge-soc.c

868

FIELD_PREP(VGA_DECIMATION_RATE_MASK, 0x1));

drivers/net/phy/mediatek/mtk-ge-soc.c

876

FIELD_PREP(MRVL_TR_FIX_100KP_MASK, 0x3) |

drivers/net/phy/mediatek/mtk-ge-soc.c

877

FIELD_PREP(MRVL_TR_FIX_100KF_MASK, 0x2) |

drivers/net/phy/mediatek/mtk-ge-soc.c

878

FIELD_PREP(MRVL_TR_FIX_1000KP_MASK, 0x3) |

drivers/net/phy/mediatek/mtk-ge-soc.c

879

FIELD_PREP(MRVL_TR_FIX_1000KF_MASK, 0x2));

drivers/net/phy/mediatek/mtk-ge-soc.c

884

FIELD_PREP(VCO_SLICER_THRESH_HIGH_MASK, 0x555555));

drivers/net/phy/mediatek/mtk-ge-soc.c

891

BIT(0) | FIELD_PREP(MTK_PHY_LPF_X_AVERAGE_MASK, 0x9));

drivers/net/phy/mediatek/mtk-ge-soc.c

938

FIELD_PREP(RESET_SYNC_OFFSET_MASK, 0x5));

drivers/net/phy/mediatek/mtk-ge-soc.c

945

FIELD_PREP(MRVL_TR_FIX_100KP_MASK, 0x6) |

drivers/net/phy/mediatek/mtk-ge-soc.c

946

FIELD_PREP(MRVL_TR_FIX_100KF_MASK, 0x7) |

drivers/net/phy/mediatek/mtk-ge-soc.c

947

FIELD_PREP(MRVL_TR_FIX_1000KP_MASK, 0x6) |

drivers/net/phy/mediatek/mtk-ge-soc.c

948

FIELD_PREP(MRVL_TR_FIX_1000KF_MASK, 0x7));

drivers/net/phy/mediatek/mtk-ge-soc.c

952

FIELD_PREP(REMOTE_ACK_COUNT_LIMIT_CTRL_MASK, 0x1));

drivers/net/phy/mediatek/mtk-ge-soc.c

959

BIT(0) | FIELD_PREP(MTK_PHY_LPF_X_AVERAGE_MASK, 0xa));

drivers/net/phy/mediatek/mtk-ge-soc.c

971

FIELD_PREP(MTK_PHY_LPI_SIG_EN_LO_THRESH1000_MASK, 0x0) |

drivers/net/phy/mediatek/mtk-ge-soc.c

972

FIELD_PREP(MTK_PHY_LPI_SIG_EN_HI_THRESH1000_MASK, 0x14));

drivers/net/phy/mediatek/mtk-ge-soc.c

977

FIELD_PREP(MTK_PHY_LPI_NORM_MSE_HI_THRESH1000_MASK,

drivers/net/phy/mediatek/mtk-ge-soc.c

993

FIELD_PREP(MTK_PHY_LPI_SLV_SEND_TX_TIMER_MASK, 0x120));

drivers/net/phy/mediatek/mtk-ge.c

46

FIELD_PREP(SLAVE_DSP_READY_TIME_MASK, 0x5e));

drivers/net/phy/mediatek/mtk-ge.c

53

FIELD_PREP(MTK_PHY_LPI_NORM_MSE_LO_THRESH100_MASK,

drivers/net/phy/mediatek/mtk-ge.c

55

FIELD_PREP(MTK_PHY_LPI_NORM_MSE_HI_THRESH100_MASK,

drivers/net/phy/mediatek/mtk-ge.c

62

FIELD_PREP(MTK_MCC_NEARECHO_OFFSET_MASK, 0x3));

drivers/net/phy/mediatek/mtk-ge.c

84

FIELD_PREP(MTK_PHY_DA_AD_BUF_BIAS_LP_MASK, 0x3));

drivers/net/phy/mediatek/mtk-ge.c

89

FIELD_PREP(MTK_TX_DELAY_PAIR_B_MASK, 0x4) |

drivers/net/phy/mediatek/mtk-ge.c

90

FIELD_PREP(MTK_TX_DELAY_PAIR_D_MASK, 0x4));

drivers/net/phy/mediatek/mtk-ge.c

93

FIELD_PREP(MTK_TX_DELAY_PAIR_B_MASK, 0x4) |

drivers/net/phy/mediatek/mtk-ge.c

94

FIELD_PREP(MTK_TX_DELAY_PAIR_D_MASK, 0x4));

drivers/net/phy/meson-gxl.c

103

FIELD_PREP(TSTCNTL_REG_BANK_SEL, bank) |

drivers/net/phy/meson-gxl.c

105

FIELD_PREP(TSTCNTL_WRITE_ADDRESS, reg));

drivers/net/phy/meson-gxl.c

75

FIELD_PREP(TSTCNTL_REG_BANK_SEL, bank) |

drivers/net/phy/meson-gxl.c

77

FIELD_PREP(TSTCNTL_READ_ADDRESS, reg));

drivers/net/phy/micrel.c

1210

FIELD_PREP(MII_KSZ9031RN_RX_CTL_M, rx) |

drivers/net/phy/micrel.c

1211

FIELD_PREP(MII_KSZ9031RN_TX_CTL_M, tx));

drivers/net/phy/micrel.c

1216

FIELD_PREP(MII_KSZ9031RN_RXD3, rx) |

drivers/net/phy/micrel.c

1217

FIELD_PREP(MII_KSZ9031RN_RXD2, rx) |

drivers/net/phy/micrel.c

1218

FIELD_PREP(MII_KSZ9031RN_RXD1, rx) |

drivers/net/phy/micrel.c

1219

FIELD_PREP(MII_KSZ9031RN_RXD0, rx));

drivers/net/phy/micrel.c

1224

FIELD_PREP(MII_KSZ9031RN_TXD3, tx) |

drivers/net/phy/micrel.c

1225

FIELD_PREP(MII_KSZ9031RN_TXD2, tx) |

drivers/net/phy/micrel.c

1226

FIELD_PREP(MII_KSZ9031RN_TXD1, tx) |

drivers/net/phy/micrel.c

1227

FIELD_PREP(MII_KSZ9031RN_TXD0, tx));

drivers/net/phy/micrel.c

1232

FIELD_PREP(MII_KSZ9031RN_GTX_CLK, tx_clk) |

drivers/net/phy/micrel.c

1233

FIELD_PREP(MII_KSZ9031RN_RX_CLK, rx_clk));

drivers/net/phy/microchip_t1s.c

232

cfg_results[0] = FIELD_PREP(GENMASK(15, 10), 9 + offsets[0]) |

drivers/net/phy/microchip_t1s.c

233

FIELD_PREP(GENMASK(9, 4), 14 + offsets[0]) |

drivers/net/phy/microchip_t1s.c

235

cfg_results[1] = FIELD_PREP(GENMASK(15, 10), 40 + offsets[1]);

drivers/net/phy/microchip_t1s.c

252

cfg_results[0] = FIELD_PREP(GENMASK(13, 8), 5 + offsets[0]) |

drivers/net/phy/microchip_t1s.c

254

cfg_results[1] = FIELD_PREP(GENMASK(13, 8), 9 + offsets[0]) |

drivers/net/phy/microchip_t1s.c

256

cfg_results[2] = FIELD_PREP(GENMASK(13, 8), 17 + offsets[0]) |

drivers/net/phy/microchip_t1s.c

415

value = FIELD_PREP(LINK_STATUS_CONFIGURATION,

drivers/net/phy/microchip_t1s.c

423

value = FIELD_PREP(LINK_STATUS_CONFIGURATION,

drivers/net/phy/microchip_t1s.c

425

FIELD_PREP(LINK_STATUS_SEMAPHORE,

drivers/net/phy/motorcomm.c

1016

FIELD_PREP(YT8531_RGMII_RXC_DS_MASK, ds));

drivers/net/phy/motorcomm.c

1031

ds_field_hi = FIELD_PREP(YT8531_RGMII_RXD_DS_HI_MASK, ds_field_hi);

drivers/net/phy/motorcomm.c

1034

ds_field_low = FIELD_PREP(YT8531_RGMII_RXD_DS_LOW_MASK, ds_field_low);

drivers/net/phy/motorcomm.c

1118

FIELD_PREP(YT8521_SCR_CLK_SRC_MASK,

drivers/net/phy/motorcomm.c

1127

FIELD_PREP(YT8521_SCR_CLK_SRC_MASK,

drivers/net/phy/motorcomm.c

1145

FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,

drivers/net/phy/motorcomm.c

1154

FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,

drivers/net/phy/motorcomm.c

1188

FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,

drivers/net/phy/motorcomm.c

1195

FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,

drivers/net/phy/motorcomm.c

2583

set = FIELD_PREP(YT8821_UTP_EXT_TRACE_LNG_GAIN_THE_2500, 0x5a) |

drivers/net/phy/motorcomm.c

2584

FIELD_PREP(YT8821_UTP_EXT_TRACE_MED_GAIN_THE_2500, 0x3c);

drivers/net/phy/motorcomm.c

2591

set = FIELD_PREP(YT8821_UTP_EXT_IPR_LNG_2500, 0x6c);

drivers/net/phy/motorcomm.c

2599

set = FIELD_PREP(YT8821_UTP_EXT_TRACE_LNG_GAIN_THR_1000, 0x2a);

drivers/net/phy/motorcomm.c

2606

set = FIELD_PREP(YT8821_UTP_EXT_TRACE_MED_GAIN_THR_1000, 0x22);

drivers/net/phy/motorcomm.c

2613

set = FIELD_PREP(YT8821_UTP_EXT_TH_20DB_2500, 0x8000);

drivers/net/phy/motorcomm.c

2622

set = FIELD_PREP(YT8821_UTP_EXT_MU_COARSE_FR_F_FFE, 0x7) |

drivers/net/phy/motorcomm.c

2623

FIELD_PREP(YT8821_UTP_EXT_MU_COARSE_FR_F_FBE, 0x7);

drivers/net/phy/motorcomm.c

2632

set = FIELD_PREP(YT8821_UTP_EXT_MU_FINE_FR_F_FFE, 0x2) |

drivers/net/phy/motorcomm.c

2633

FIELD_PREP(YT8821_UTP_EXT_MU_FINE_FR_F_FBE, 0x2);

drivers/net/phy/motorcomm.c

2663

set = FIELD_PREP(YT8821_UTP_EXT_FECHO_AMP_TH_HUGE, 0x38);

drivers/net/phy/motorcomm.c

2678

set = FIELD_PREP(YT8821_UTP_EXT_PLL_SPARE_CFG, 0xe9);

drivers/net/phy/motorcomm.c

2686

set = FIELD_PREP(YT8821_UTP_EXT_DAC_IMID_CH_3_10_ORG, 0x64) |

drivers/net/phy/motorcomm.c

2687

FIELD_PREP(YT8821_UTP_EXT_DAC_IMID_CH_2_10_ORG, 0x64);

drivers/net/phy/motorcomm.c

2696

set = FIELD_PREP(YT8821_UTP_EXT_DAC_IMID_CH_1_10_ORG, 0x64) |

drivers/net/phy/motorcomm.c

2697

FIELD_PREP(YT8821_UTP_EXT_DAC_IMID_CH_0_10_ORG, 0x64);

drivers/net/phy/motorcomm.c

2706

set = FIELD_PREP(YT8821_UTP_EXT_DAC_IMSB_CH_3_10_ORG, 0x64) |

drivers/net/phy/motorcomm.c

2707

FIELD_PREP(YT8821_UTP_EXT_DAC_IMSB_CH_2_10_ORG, 0x64);

drivers/net/phy/motorcomm.c

2716

set = FIELD_PREP(YT8821_UTP_EXT_DAC_IMSB_CH_1_10_ORG, 0x64) |

drivers/net/phy/motorcomm.c

2717

FIELD_PREP(YT8821_UTP_EXT_DAC_IMSB_CH_0_10_ORG, 0x64);

drivers/net/phy/motorcomm.c

2782

set = FIELD_PREP(YT8521_CCR_MODE_SEL_MASK, mode);

drivers/net/phy/motorcomm.c

903

val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg);

drivers/net/phy/motorcomm.c

907

val |= FIELD_PREP(YT8521_RC1R_GE_TX_DELAY_MASK, tx_reg);

drivers/net/phy/motorcomm.c

910

val |= FIELD_PREP(YT8521_RC1R_RX_DELAY_MASK, rx_reg) |

drivers/net/phy/motorcomm.c

911

FIELD_PREP(YT8521_RC1R_GE_TX_DELAY_MASK, tx_reg);

drivers/net/phy/mxl-86110.c

581

FIELD_PREP(MXL86110_EXT_SYNCE_CFG_CLK_SRC_SEL_MASK,

drivers/net/phy/mxl-gpy.c

1001

val |= FIELD_PREP(VSPEC1_LED_PULSE, VSPEC1_LED_TXACT);

drivers/net/phy/mxl-gpy.c

1004

val |= FIELD_PREP(VSPEC1_LED_PULSE, VSPEC1_LED_RXACT);

drivers/net/phy/mxl-gpy.c

1009

val |= FIELD_PREP(VSPEC1_LED_PULSE, VSPEC1_LED_NO_CON) | VSPEC1_LED_CON;

drivers/net/phy/mxl-gpy.c

307

cmd |= FIELD_PREP(VSPEC1_MBOX_CMD_ADDRHI, addr >> 16);

drivers/net/phy/mxl-gpy.c

986

val |= FIELD_PREP(VSPEC1_LED_CON, VSPEC1_LED_LINK10);

drivers/net/phy/mxl-gpy.c

990

val |= FIELD_PREP(VSPEC1_LED_CON, VSPEC1_LED_LINK100);

drivers/net/phy/mxl-gpy.c

994

val |= FIELD_PREP(VSPEC1_LED_CON, VSPEC1_LED_LINK1000);

drivers/net/phy/mxl-gpy.c

998

val |= FIELD_PREP(VSPEC1_LED_CON, VSPEC1_LED_LINK2500);

drivers/net/phy/qcom/at803x.c

336

priv->clk_25m_reg |= FIELD_PREP(AT803X_CLK_OUT_MASK, sel);

drivers/net/phy/qcom/at803x.c

611

val = FIELD_PREP(AT803X_CDT_MDI_PAIR_MASK, pair) |

drivers/net/phy/qcom/qca807x.c

395

val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);

drivers/net/phy/qcom/qca807x.c

627

val |= FIELD_PREP(PQSGMII_TX_DRIVER_MASK, priv->tx_drive_strength);

drivers/net/phy/qcom/qca808x.c

145

FIELD_PREP(QCA808X_MASTER_SLAVE_SEED_CFG, seed_value) |

drivers/net/phy/qcom/qcom-phy-lib.c

314

FIELD_PREP(AT803X_SFC_MDI_CROSSOVER_MODE_M, val));

drivers/net/phy/qcom/qcom-phy-lib.c

404

FIELD_PREP(AT803X_SMART_SPEED_RETRY_LIMIT_MASK, cnt - 2);

drivers/net/phy/qcom/qcom.h

111

#define QCA808X_LED_BLINK_FREQ_2HZ FIELD_PREP(QCA808X_LED_BLINK_FREQ_MASK, 0x0)

drivers/net/phy/qcom/qcom.h

112

#define QCA808X_LED_BLINK_FREQ_4HZ FIELD_PREP(QCA808X_LED_BLINK_FREQ_MASK, 0x1)

drivers/net/phy/qcom/qcom.h

113

#define QCA808X_LED_BLINK_FREQ_8HZ FIELD_PREP(QCA808X_LED_BLINK_FREQ_MASK, 0x2)

drivers/net/phy/qcom/qcom.h

114

#define QCA808X_LED_BLINK_FREQ_16HZ FIELD_PREP(QCA808X_LED_BLINK_FREQ_MASK, 0x3)

drivers/net/phy/qcom/qcom.h

115

#define QCA808X_LED_BLINK_FREQ_32HZ FIELD_PREP(QCA808X_LED_BLINK_FREQ_MASK, 0x4)

drivers/net/phy/qcom/qcom.h

116

#define QCA808X_LED_BLINK_FREQ_64HZ FIELD_PREP(QCA808X_LED_BLINK_FREQ_MASK, 0x5)

drivers/net/phy/qcom/qcom.h

117

#define QCA808X_LED_BLINK_FREQ_128HZ FIELD_PREP(QCA808X_LED_BLINK_FREQ_MASK, 0x6)

drivers/net/phy/qcom/qcom.h

118

#define QCA808X_LED_BLINK_FREQ_256HZ FIELD_PREP(QCA808X_LED_BLINK_FREQ_MASK, 0x7)

drivers/net/phy/qcom/qcom.h

120

#define QCA808X_LED_BLINK_DUTY_50_50 FIELD_PREP(QCA808X_LED_BLINK_DUTY_MASK, 0x0)

drivers/net/phy/qcom/qcom.h

121

#define QCA808X_LED_BLINK_DUTY_75_25 FIELD_PREP(QCA808X_LED_BLINK_DUTY_MASK, 0x1)

drivers/net/phy/qcom/qcom.h

122

#define QCA808X_LED_BLINK_DUTY_25_75 FIELD_PREP(QCA808X_LED_BLINK_DUTY_MASK, 0x2)

drivers/net/phy/qcom/qcom.h

123

#define QCA808X_LED_BLINK_DUTY_33_67 FIELD_PREP(QCA808X_LED_BLINK_DUTY_MASK, 0x3)

drivers/net/phy/qcom/qcom.h

124

#define QCA808X_LED_BLINK_DUTY_67_33 FIELD_PREP(QCA808X_LED_BLINK_DUTY_MASK, 0x4)

drivers/net/phy/qcom/qcom.h

125

#define QCA808X_LED_BLINK_DUTY_17_83 FIELD_PREP(QCA808X_LED_BLINK_DUTY_MASK, 0x5)

drivers/net/phy/qcom/qcom.h

126

#define QCA808X_LED_BLINK_DUTY_83_17 FIELD_PREP(QCA808X_LED_BLINK_DUTY_MASK, 0x6)

drivers/net/phy/qcom/qcom.h

127

#define QCA808X_LED_BLINK_DUTY_8_92 FIELD_PREP(QCA808X_LED_BLINK_DUTY_MASK, 0x7)

drivers/net/phy/qcom/qcom.h

166

#define QCA808X_LED_FORCE_BLINK_1 FIELD_PREP(QCA808X_LED_FORCE_MODE_MASK, 0x3)

drivers/net/phy/qcom/qcom.h

167

#define QCA808X_LED_FORCE_BLINK_2 FIELD_PREP(QCA808X_LED_FORCE_MODE_MASK, 0x2)

drivers/net/phy/qcom/qcom.h

168

#define QCA808X_LED_FORCE_ON FIELD_PREP(QCA808X_LED_FORCE_MODE_MASK, 0x1)

drivers/net/phy/qcom/qcom.h

169

#define QCA808X_LED_FORCE_OFF FIELD_PREP(QCA808X_LED_FORCE_MODE_MASK, 0x0)

drivers/net/phy/vitesse.c

189

FIELD_PREP(MII_VSC73XX_PHY_CTRL_EXT3_DOWNSHIFT_CNT,

drivers/net/wan/framer/pef2256/pef2256-regs.h

162

#define PEF2256_SIC2_SICS(_v) FIELD_PREP(PEF2256_SIC2_SICS_MASK, _v)

drivers/net/wan/framer/pef2256/pef2256-regs.h

65

#define PEF2256_XSW_XY(_v) FIELD_PREP(PEF2256_XSW_XY_MASK, _v)

drivers/net/wireless/ath/ath10k/mac.c

2669

FIELD_PREP(WMI_PEER_NSS_MAP_ENABLE, 1) |

drivers/net/wireless/ath/ath10k/mac.c

2670

FIELD_PREP(WMI_PEER_NSS_160MHZ_MASK, (rx_nss - 1));

drivers/net/wireless/ath/ath10k/mac.c

2674

FIELD_PREP(WMI_PEER_NSS_80_80MHZ_MASK, (rx_nss - 1));

drivers/net/wireless/ath/ath10k/mac.c

5138

param = FIELD_PREP(WMI_TLV_RFKILL_CFG_RADIO_LEVEL,

drivers/net/wireless/ath/ath10k/mac.c

5140

FIELD_PREP(WMI_TLV_RFKILL_CFG_GPIO_PIN_NUM,

drivers/net/wireless/ath/ath10k/mac.c

5142

FIELD_PREP(WMI_TLV_RFKILL_CFG_PIN_AS_GPIO,

drivers/net/wireless/ath/ath10k/sdio.c

150

byte |= FIELD_PREP(ATH10K_SDIO_DRIVE_DTSX_MASK,

drivers/net/wireless/ath/ath10k/sdio.c

1690

regs->int_status_en = FIELD_PREP(MBOX_INT_STATUS_ENABLE_ERROR_MASK, 1) |

drivers/net/wireless/ath/ath10k/sdio.c

1691

FIELD_PREP(MBOX_INT_STATUS_ENABLE_CPU_MASK, 1) |

drivers/net/wireless/ath/ath10k/sdio.c

1692

FIELD_PREP(MBOX_INT_STATUS_ENABLE_COUNTER_MASK, 1);

drivers/net/wireless/ath/ath10k/sdio.c

1698

FIELD_PREP(MBOX_INT_STATUS_ENABLE_MBOX_DATA_MASK, 1);

drivers/net/wireless/ath/ath10k/sdio.c

1703

regs->cpu_int_status_en = FIELD_PREP(MBOX_CPU_STATUS_ENABLE_ASSERT_MASK, 1);

drivers/net/wireless/ath/ath10k/sdio.c

1707

FIELD_PREP(MBOX_ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK, 1) |

drivers/net/wireless/ath/ath10k/sdio.c

1708

FIELD_PREP(MBOX_ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK, 1);

drivers/net/wireless/ath/ath10k/sdio.c

1714

FIELD_PREP(MBOX_COUNTER_INT_STATUS_ENABLE_BIT_MASK,

drivers/net/wireless/ath/ath10k/sdio.c

197

byte |= FIELD_PREP(CCCR_SDIO_ASYNC_INT_DELAY_MASK, asyncintdelay);

drivers/net/wireless/ath/ath10k/sdio.c

92

*arg = FIELD_PREP(BIT(31), write) |

drivers/net/wireless/ath/ath10k/sdio.c

93

FIELD_PREP(BIT(27), raw) |

drivers/net/wireless/ath/ath10k/sdio.c

937

u8 htc_mbox = FIELD_PREP(ATH10K_HTC_MAILBOX_MASK, 1);

drivers/net/wireless/ath/ath10k/sdio.c

94

FIELD_PREP(BIT(26), 1) |

drivers/net/wireless/ath/ath10k/sdio.c

95

FIELD_PREP(GENMASK(25, 9), address) |

drivers/net/wireless/ath/ath10k/sdio.c

96

FIELD_PREP(BIT(8), 1) |

drivers/net/wireless/ath/ath10k/sdio.c

97

FIELD_PREP(GENMASK(7, 0), val);

drivers/net/wireless/ath/ath10k/testmode.c

584

hdr_info = FIELD_PREP(WMI_TLV_TAG, WMI_TLV_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath10k/testmode.c

585

FIELD_PREP(WMI_TLV_LEN, (chunk_len +

drivers/net/wireless/ath/ath10k/testmode.c

590

seginfo = FIELD_PREP(ATH10K_FTM_SEGHDR_TOTAL_SEGMENTS, num_segments) |

drivers/net/wireless/ath/ath10k/testmode.c

591

FIELD_PREP(ATH10K_FTM_SEGHDR_CURRENT_SEQ, segnumber);

drivers/net/wireless/ath/ath11k/dbring.c

87

cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, ar->pdev_idx) |

drivers/net/wireless/ath/ath11k/dbring.c

88

FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4671

cfg_params->cfg0 |= FIELD_PREP(GENMASK(15, 1),

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4674

cfg_params->cfg2 |= FIELD_PREP(GENMASK(7, 0), mac_addr[0]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4675

cfg_params->cfg2 |= FIELD_PREP(GENMASK(15, 8), mac_addr[1]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4676

cfg_params->cfg2 |= FIELD_PREP(GENMASK(23, 16), mac_addr[2]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4677

cfg_params->cfg2 |= FIELD_PREP(GENMASK(31, 24), mac_addr[3]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4678

cfg_params->cfg3 |= FIELD_PREP(GENMASK(7, 0), mac_addr[4]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4679

cfg_params->cfg3 |= FIELD_PREP(GENMASK(15, 8), mac_addr[5]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4696

cfg_params->cfg1 |= FIELD_PREP(GENMASK(7, 0), mac_addr[0]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4697

cfg_params->cfg1 |= FIELD_PREP(GENMASK(15, 8), mac_addr[1]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4698

cfg_params->cfg1 |= FIELD_PREP(GENMASK(23, 16), mac_addr[2]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4699

cfg_params->cfg1 |= FIELD_PREP(GENMASK(31, 24), mac_addr[3]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4700

cfg_params->cfg2 |= FIELD_PREP(GENMASK(7, 0), mac_addr[4]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4701

cfg_params->cfg2 |= FIELD_PREP(GENMASK(15, 8), mac_addr[5]);

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4723

cookie = FIELD_PREP(HTT_STATS_COOKIE_MSB, HTT_STATS_MAGIC_VALUE) |

drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c

4724

FIELD_PREP(HTT_STATS_COOKIE_LSB, pdev_id);

drivers/net/wireless/ath/ath11k/debugfs_sta.c

850

cfg_params.cfg0 |= FIELD_PREP(GENMASK(15, 1),

drivers/net/wireless/ath/ath11k/debugfs_sta.c

855

cfg_params.cfg2 |= FIELD_PREP(GENMASK(7, 0), sta->addr[0]);

drivers/net/wireless/ath/ath11k/debugfs_sta.c

856

cfg_params.cfg2 |= FIELD_PREP(GENMASK(15, 8), sta->addr[1]);

drivers/net/wireless/ath/ath11k/debugfs_sta.c

857

cfg_params.cfg2 |= FIELD_PREP(GENMASK(23, 16), sta->addr[2]);

drivers/net/wireless/ath/ath11k/debugfs_sta.c

858

cfg_params.cfg2 |= FIELD_PREP(GENMASK(31, 24), sta->addr[3]);

drivers/net/wireless/ath/ath11k/debugfs_sta.c

860

cfg_params.cfg3 |= FIELD_PREP(GENMASK(7, 0), sta->addr[4]);

drivers/net/wireless/ath/ath11k/debugfs_sta.c

861

cfg_params.cfg3 |= FIELD_PREP(GENMASK(15, 8), sta->addr[5]);

drivers/net/wireless/ath/ath11k/dp.c

1001

arvif->tcl_metadata |= FIELD_PREP(HTT_TCL_META_DATA_TYPE, 1) |

drivers/net/wireless/ath/ath11k/dp.c

1002

FIELD_PREP(HTT_TCL_META_DATA_VDEV_ID,

drivers/net/wireless/ath/ath11k/dp.c

1004

FIELD_PREP(HTT_TCL_META_DATA_PDEV_ID,

drivers/net/wireless/ath/ath11k/dp_rx.c

2916

cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |

drivers/net/wireless/ath/ath11k/dp_rx.c

2917

FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);

drivers/net/wireless/ath/ath11k/dp_rx.c

3152

cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3153

FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);

drivers/net/wireless/ath/ath11k/dp_rx.c

3447

msdu_info = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3448

FIELD_PREP(RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU, 1) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3449

FIELD_PREP(RX_MSDU_DESC_INFO0_MSDU_CONTINUATION, 0) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3450

FIELD_PREP(RX_MSDU_DESC_INFO0_MSDU_LENGTH,

drivers/net/wireless/ath/ath11k/dp_rx.c

3452

FIELD_PREP(RX_MSDU_DESC_INFO0_REO_DEST_IND, dst_idx) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3453

FIELD_PREP(RX_MSDU_DESC_INFO0_VALID_SA, 1) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3454

FIELD_PREP(RX_MSDU_DESC_INFO0_VALID_DA, 1);

drivers/net/wireless/ath/ath11k/dp_rx.c

3476

cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, dp->mac_id) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3477

FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);

drivers/net/wireless/ath/ath11k/dp_rx.c

3502

mpdu_info = FIELD_PREP(RX_MPDU_DESC_INFO0_MSDU_COUNT, 1) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3503

FIELD_PREP(RX_MPDU_DESC_INFO0_SEQ_NUM, rx_tid->cur_sn) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3504

FIELD_PREP(RX_MPDU_DESC_INFO0_FRAG_FLAG, 0) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3505

FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_SA, 1) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3506

FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_DA, 1) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3507

FIELD_PREP(RX_MPDU_DESC_INFO0_RAW_MPDU, 1) |

drivers/net/wireless/ath/ath11k/dp_rx.c

3508

FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_PN, 1);

drivers/net/wireless/ath/ath11k/dp_rx.c

3513

reo_ent_ring->info0 = FIELD_PREP(HAL_REO_ENTR_RING_INFO0_QUEUE_ADDR_HI,

drivers/net/wireless/ath/ath11k/dp_rx.c

3516

FIELD_PREP(HAL_REO_ENTR_RING_INFO0_DEST_IND, dst_idx);

drivers/net/wireless/ath/ath11k/dp_rx.c

405

cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |

drivers/net/wireless/ath/ath11k/dp_rx.c

406

FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);

drivers/net/wireless/ath/ath11k/dp_rx.c

4605

u32 last = FIELD_PREP(RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU, 1);

drivers/net/wireless/ath/ath11k/dp_rx.c

4606

u32 first = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1);

drivers/net/wireless/ath/ath11k/dp_rx.c

952

cmd.upd2 = FIELD_PREP(HAL_REO_CMD_UPD2_SSN, ssn);

drivers/net/wireless/ath/ath11k/dp_tx.c

1012

cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID,

drivers/net/wireless/ath/ath11k/dp_tx.c

1055

cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE,

drivers/net/wireless/ath/ath11k/dp_tx.c

1059

cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask);

drivers/net/wireless/ath/ath11k/dp_tx.c

1060

cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask);

drivers/net/wireless/ath/ath11k/dp_tx.c

1101

cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE,

drivers/net/wireless/ath/ath11k/dp_tx.c

1106

FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,

drivers/net/wireless/ath/ath11k/dp_tx.c

1110

FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,

drivers/net/wireless/ath/ath11k/dp_tx.c

1112

cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID,

drivers/net/wireless/ath/ath11k/dp_tx.c

1114

cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS,

drivers/net/wireless/ath/ath11k/dp_tx.c

1116

cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS,

drivers/net/wireless/ath/ath11k/dp_tx.c

1119

cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE,

drivers/net/wireless/ath/ath11k/dp_tx.c

1284

cmd->info0 = FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_MSG_TYPE,

drivers/net/wireless/ath/ath11k/dp_tx.c

1287

cmd->info0 |= FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_PDEV_ID, mac_id);

drivers/net/wireless/ath/ath11k/dp_tx.c

1290

FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_RELEASE_RING,

drivers/net/wireless/ath/ath11k/dp_tx.c

141

ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) |

drivers/net/wireless/ath/ath11k/dp_tx.c

142

FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) |

drivers/net/wireless/ath/ath11k/dp_tx.c

143

FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id);

drivers/net/wireless/ath/ath11k/dp_tx.c

150

ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TO_FW, 1);

drivers/net/wireless/ath/ath11k/dp_tx.c

178

ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) |

drivers/net/wireless/ath/ath11k/dp_tx.c

179

FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) |

drivers/net/wireless/ath/ath11k/dp_tx.c

180

FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) |

drivers/net/wireless/ath/ath11k/dp_tx.c

181

FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) |

drivers/net/wireless/ath/ath11k/dp_tx.c

182

FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1);

drivers/net/wireless/ath/ath11k/dp_tx.c

188

ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1);

drivers/net/wireless/ath/ath11k/dp_tx.c

910

cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE,

drivers/net/wireless/ath/ath11k/dp_tx.c

914

cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,

drivers/net/wireless/ath/ath11k/dp_tx.c

917

cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,

drivers/net/wireless/ath/ath11k/dp_tx.c

919

cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE,

drivers/net/wireless/ath/ath11k/dp_tx.c

921

cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id);

drivers/net/wireless/ath/ath11k/dp_tx.c

936

cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE,

drivers/net/wireless/ath/ath11k/dp_tx.c

938

cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE,

drivers/net/wireless/ath/ath11k/dp_tx.c

940

cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP,

drivers/net/wireless/ath/ath11k/dp_tx.c

942

cmd->info1 |= FIELD_PREP(

drivers/net/wireless/ath/ath11k/dp_tx.c

945

cmd->info1 |= FIELD_PREP(

drivers/net/wireless/ath/ath11k/dp_tx.c

963

cmd->intr_info = FIELD_PREP(

drivers/net/wireless/ath/ath11k/dp_tx.c

966

cmd->intr_info |= FIELD_PREP(

drivers/net/wireless/ath/ath11k/dp_tx.c

972

cmd->info2 = FIELD_PREP(

drivers/net/wireless/ath/ath11k/hal.c

263

val |= FIELD_PREP(HAL_CE_DST_R0_DEST_CTRL_MAX_LEN,

drivers/net/wireless/ath/ath11k/hal.c

283

val = FIELD_PREP(HAL_REO1_RING_MSI1_BASE_MSB_ADDR,

drivers/net/wireless/ath/ath11k/hal.c

297

val = FIELD_PREP(HAL_REO1_RING_BASE_MSB_RING_BASE_ADDR_MSB,

drivers/net/wireless/ath/ath11k/hal.c

300

FIELD_PREP(HAL_REO1_RING_BASE_MSB_RING_SIZE,

drivers/net/wireless/ath/ath11k/hal.c

304

val = FIELD_PREP(HAL_REO1_RING_ID_RING_ID, srng->ring_id) |

drivers/net/wireless/ath/ath11k/hal.c

305

FIELD_PREP(HAL_REO1_RING_ID_ENTRY_SIZE, srng->entry_size);

drivers/net/wireless/ath/ath11k/hal.c

309

val = FIELD_PREP(HAL_REO1_RING_PRDR_INT_SETUP_INTR_TMR_THOLD,

drivers/net/wireless/ath/ath11k/hal.c

312

val |= FIELD_PREP(HAL_REO1_RING_PRDR_INT_SETUP_BATCH_COUNTER_THOLD,

drivers/net/wireless/ath/ath11k/hal.c

362

val = FIELD_PREP(HAL_TCL1_RING_MSI1_BASE_MSB_ADDR,

drivers/net/wireless/ath/ath11k/hal.c

377

val = FIELD_PREP(HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB,

drivers/net/wireless/ath/ath11k/hal.c

380

FIELD_PREP(HAL_TCL1_RING_BASE_MSB_RING_SIZE,

drivers/net/wireless/ath/ath11k/hal.c

384

val = FIELD_PREP(HAL_REO1_RING_ID_ENTRY_SIZE, srng->entry_size);

drivers/net/wireless/ath/ath11k/hal.c

389

val = FIELD_PREP(HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB,

drivers/net/wireless/ath/ath11k/hal.c

392

FIELD_PREP(HAL_TCL1_RING_BASE_MSB_RING_SIZE,

drivers/net/wireless/ath/ath11k/hal.c

401

val = FIELD_PREP(HAL_TCL1_RING_CONSR_INT_SETUP_IX0_INTR_TMR_THOLD,

drivers/net/wireless/ath/ath11k/hal.c

404

val |= FIELD_PREP(HAL_TCL1_RING_CONSR_INT_SETUP_IX0_BATCH_COUNTER_THOLD,

drivers/net/wireless/ath/ath11k/hal.c

414

val |= FIELD_PREP(HAL_TCL1_RING_CONSR_INT_SETUP_IX1_LOW_THOLD,

drivers/net/wireless/ath/ath11k/hal.c

579

FIELD_PREP(HAL_CE_SRC_DESC_ADDR_INFO_ADDR_HI,

drivers/net/wireless/ath/ath11k/hal.c

581

FIELD_PREP(HAL_CE_SRC_DESC_ADDR_INFO_BYTE_SWAP,

drivers/net/wireless/ath/ath11k/hal.c

583

FIELD_PREP(HAL_CE_SRC_DESC_ADDR_INFO_GATHER, 0) |

drivers/net/wireless/ath/ath11k/hal.c

584

FIELD_PREP(HAL_CE_SRC_DESC_ADDR_INFO_LEN, len);

drivers/net/wireless/ath/ath11k/hal.c

585

desc->meta_info = FIELD_PREP(HAL_CE_SRC_DESC_META_INFO_DATA, id);

drivers/net/wireless/ath/ath11k/hal.c

594

FIELD_PREP(HAL_CE_DEST_DESC_ADDR_INFO_ADDR_HI,

drivers/net/wireless/ath/ath11k/hal.c

612

desc->buf_addr_info.info0 = FIELD_PREP(BUFFER_ADDR_INFO0_ADDR,

drivers/net/wireless/ath/ath11k/hal.c

614

desc->buf_addr_info.info1 = FIELD_PREP(BUFFER_ADDR_INFO1_ADDR,

drivers/net/wireless/ath/ath11k/hal.c

616

FIELD_PREP(BUFFER_ADDR_INFO1_RET_BUF_MGR, 1) |

drivers/net/wireless/ath/ath11k/hal.c

617

FIELD_PREP(BUFFER_ADDR_INFO1_SW_COOKIE, cookie);

drivers/net/wireless/ath/ath11k/hal.c

919

link_addr->info1 = FIELD_PREP(

drivers/net/wireless/ath/ath11k/hal.c

922

FIELD_PREP(

drivers/net/wireless/ath/ath11k/hal.c

932

FIELD_PREP(HAL_WBM_SCATTER_BUFFER_SIZE, reg_scatter_buf_sz) |

drivers/net/wireless/ath/ath11k/hal.c

933

FIELD_PREP(HAL_WBM_LINK_DESC_IDLE_LIST_MODE, 0x1));

drivers/net/wireless/ath/ath11k/hal.c

936

FIELD_PREP(HAL_WBM_SCATTER_RING_SIZE_OF_IDLE_LINK_DESC_LIST,

drivers/net/wireless/ath/ath11k/hal.c

941

FIELD_PREP(BUFFER_ADDR_INFO0_ADDR,

drivers/net/wireless/ath/ath11k/hal.c

946

FIELD_PREP(

drivers/net/wireless/ath/ath11k/hal.c

949

FIELD_PREP(

drivers/net/wireless/ath/ath11k/hal.c

957

FIELD_PREP(BUFFER_ADDR_INFO0_ADDR,

drivers/net/wireless/ath/ath11k/hal.c

962

FIELD_PREP(

drivers/net/wireless/ath/ath11k/hal.c

966

FIELD_PREP(HAL_WBM_SCATTERED_DESC_HEAD_P_OFFSET_IX1,

drivers/net/wireless/ath/ath11k/hal.c

971

FIELD_PREP(BUFFER_ADDR_INFO0_ADDR,

drivers/net/wireless/ath/ath11k/hal.c

977

FIELD_PREP(BUFFER_ADDR_INFO0_ADDR,

drivers/net/wireless/ath/ath11k/hal.c

982

FIELD_PREP(

drivers/net/wireless/ath/ath11k/hal.c

985

FIELD_PREP(HAL_WBM_SCATTERED_DESC_TAIL_P_OFFSET_IX1,

drivers/net/wireless/ath/ath11k/hal_rx.c

100

FIELD_PREP(HAL_TLV_HDR_LEN, sizeof(*desc));

drivers/net/wireless/ath/ath11k/hal_rx.c

111

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_QUEUE_ADDR_HI,

drivers/net/wireless/ath/ath11k/hal_rx.c

1110

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_BSS_COLOR, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1113

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_BEAM_CHANGE, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1116

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_UL_DL, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1120

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_MCS, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1125

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_DCM, he_dcm);

drivers/net/wireless/ath/ath11k/hal_rx.c

1129

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_CODING, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

113

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_RX_QUEUE_NUM,

drivers/net/wireless/ath/ath11k/hal_rx.c

1132

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_LDPC_XSYMSEG, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1136

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_STBC, he_stbc);

drivers/net/wireless/ath/ath11k/hal_rx.c

1141

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA4_SU_MU_SPTL_REUSE, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1147

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

115

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_VLD,

drivers/net/wireless/ath/ath11k/hal_rx.c

117

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_ASSOC_LNK_DESC_CNT,

drivers/net/wireless/ath/ath11k/hal_rx.c

1174

ppdu_info->he_data5 |= FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_GI, he_gi);

drivers/net/wireless/ath/ath11k/hal_rx.c

1177

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE,

drivers/net/wireless/ath/ath11k/hal_rx.c

1182

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_NUM_LTF_SYMS, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1186

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_PRE_FEC_PAD, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

119

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_DIS_DUP_DETECTION,

drivers/net/wireless/ath/ath11k/hal_rx.c

1191

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_TXBF, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1194

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_PE_DISAMBIG, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1201

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_NSTS, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1204

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_DOPPLER, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1207

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_TXOP, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

121

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_SOFT_REORDER_EN,

drivers/net/wireless/ath/ath11k/hal_rx.c

123

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_AC,

drivers/net/wireless/ath/ath11k/hal_rx.c

1241

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_BSS_COLOR, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1245

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_UL_DL, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1249

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_LDPC_XSYMSEG, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

125

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_BAR,

drivers/net/wireless/ath/ath11k/hal_rx.c

1254

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_STBC, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1259

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA4_SU_MU_SPTL_REUSE, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1265

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

127

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_RETRY,

drivers/net/wireless/ath/ath11k/hal_rx.c

1288

ppdu_info->he_data5 |= FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_GI, he_gi);

drivers/net/wireless/ath/ath11k/hal_rx.c

129

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_CHECK_2K_MODE,

drivers/net/wireless/ath/ath11k/hal_rx.c

1291

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE,

drivers/net/wireless/ath/ath11k/hal_rx.c

1296

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_NUM_LTF_SYMS, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1301

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_PRE_FEC_PAD, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1306

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_PE_DISAMBIG, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

131

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_OOR_MODE,

drivers/net/wireless/ath/ath11k/hal_rx.c

1312

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_DOPPLER, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1316

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_TXOP, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1329

FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_MCS_KNOWN,

drivers/net/wireless/ath/ath11k/hal_rx.c

133

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_BA_WINDOW_SIZE,

drivers/net/wireless/ath/ath11k/hal_rx.c

1333

FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_DCM_KNOWN,

drivers/net/wireless/ath/ath11k/hal_rx.c

1342

FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW,

drivers/net/wireless/ath/ath11k/hal_rx.c

1346

FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS2_SIG_B_COMP, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

135

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_PN_CHECK,

drivers/net/wireless/ath/ath11k/hal_rx.c

1350

FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS2_SIG_B_SYMS_USERS,

drivers/net/wireless/ath/ath11k/hal_rx.c

137

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_EVEN_PN,

drivers/net/wireless/ath/ath11k/hal_rx.c

1385

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_MCS, ppdu_info->mcs);

drivers/net/wireless/ath/ath11k/hal_rx.c

139

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_UNEVEN_PN,

drivers/net/wireless/ath/ath11k/hal_rx.c

1390

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_CODING, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1394

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA4_MU_STA_ID, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

141

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_PN_HANDLE_ENABLE,

drivers/net/wireless/ath/ath11k/hal_rx.c

1418

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_MCS, ppdu_info->mcs);

drivers/net/wireless/ath/ath11k/hal_rx.c

1423

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_DCM, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

1428

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_CODING, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

143

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_PN_SIZE,

drivers/net/wireless/ath/ath11k/hal_rx.c

1433

FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA4_MU_STA_ID, value);

drivers/net/wireless/ath/ath11k/hal_rx.c

145

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_IGNORE_AMPDU_FLG,

drivers/net/wireless/ath/ath11k/hal_rx.c

147

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_SVLD,

drivers/net/wireless/ath/ath11k/hal_rx.c

149

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_SSN,

drivers/net/wireless/ath/ath11k/hal_rx.c

151

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_SEQ_2K_ERR,

drivers/net/wireless/ath/ath11k/hal_rx.c

153

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_PN_VALID,

drivers/net/wireless/ath/ath11k/hal_rx.c

155

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO0_UPD_PN,

drivers/net/wireless/ath/ath11k/hal_rx.c

159

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_RX_QUEUE_NUMBER,

drivers/net/wireless/ath/ath11k/hal_rx.c

161

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_VLD,

drivers/net/wireless/ath/ath11k/hal_rx.c

163

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_ASSOC_LNK_DESC_COUNTER,

drivers/net/wireless/ath/ath11k/hal_rx.c

165

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_DIS_DUP_DETECTION,

drivers/net/wireless/ath/ath11k/hal_rx.c

167

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_SOFT_REORDER_EN,

drivers/net/wireless/ath/ath11k/hal_rx.c

169

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_AC,

drivers/net/wireless/ath/ath11k/hal_rx.c

17

hdr->info0 = FIELD_PREP(HAL_DESC_HDR_INFO0_OWNER, owner) |

drivers/net/wireless/ath/ath11k/hal_rx.c

171

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_BAR,

drivers/net/wireless/ath/ath11k/hal_rx.c

173

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_CHECK_2K_MODE,

drivers/net/wireless/ath/ath11k/hal_rx.c

175

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_RETRY,

drivers/net/wireless/ath/ath11k/hal_rx.c

177

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_OOR_MODE,

drivers/net/wireless/ath/ath11k/hal_rx.c

179

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_PN_CHECK,

drivers/net/wireless/ath/ath11k/hal_rx.c

18

FIELD_PREP(HAL_DESC_HDR_INFO0_BUF_TYPE, buffer_type);

drivers/net/wireless/ath/ath11k/hal_rx.c

181

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_EVEN_PN,

drivers/net/wireless/ath/ath11k/hal_rx.c

183

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_UNEVEN_PN,

drivers/net/wireless/ath/ath11k/hal_rx.c

185

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_PN_HANDLE_ENABLE,

drivers/net/wireless/ath/ath11k/hal_rx.c

187

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO1_IGNORE_AMPDU_FLG,

drivers/net/wireless/ath/ath11k/hal_rx.c

204

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO2_BA_WINDOW_SIZE,

drivers/net/wireless/ath/ath11k/hal_rx.c

206

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO2_PN_SIZE, cmd->pn_size) |

drivers/net/wireless/ath/ath11k/hal_rx.c

207

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO2_SVLD,

drivers/net/wireless/ath/ath11k/hal_rx.c

209

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO2_SSN,

drivers/net/wireless/ath/ath11k/hal_rx.c

21

hdr->info0 |= FIELD_PREP(HAL_DESC_HDR_INFO0_DBG_RESERVED, magic);

drivers/net/wireless/ath/ath11k/hal_rx.c

211

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO2_SEQ_2K_ERR,

drivers/net/wireless/ath/ath11k/hal_rx.c

213

FIELD_PREP(HAL_REO_UPD_RX_QUEUE_INFO2_PN_ERR,

drivers/net/wireless/ath/ath11k/hal_rx.c

274

binfo->info0 = FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, paddr_lo);

drivers/net/wireless/ath/ath11k/hal_rx.c

275

binfo->info1 = FIELD_PREP(BUFFER_ADDR_INFO1_ADDR, paddr_hi) |

drivers/net/wireless/ath/ath11k/hal_rx.c

276

FIELD_PREP(BUFFER_ADDR_INFO1_SW_COOKIE, cookie) |

drivers/net/wireless/ath/ath11k/hal_rx.c

277

FIELD_PREP(BUFFER_ADDR_INFO1_RET_BUF_MGR, manager);

drivers/net/wireless/ath/ath11k/hal_rx.c

29

tlv->tl = FIELD_PREP(HAL_TLV_HDR_TAG, HAL_REO_GET_QUEUE_STATS) |

drivers/net/wireless/ath/ath11k/hal_rx.c

30

FIELD_PREP(HAL_TLV_HDR_LEN, sizeof(*desc));

drivers/net/wireless/ath/ath11k/hal_rx.c

40

desc->info0 = FIELD_PREP(HAL_REO_GET_QUEUE_STATS_INFO0_QUEUE_ADDR_HI,

drivers/net/wireless/ath/ath11k/hal_rx.c

426

dst_desc->info0 |= FIELD_PREP(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE,

drivers/net/wireless/ath/ath11k/hal_rx.c

428

FIELD_PREP(HAL_WBM_RELEASE_INFO0_BM_ACTION, action) |

drivers/net/wireless/ath/ath11k/hal_rx.c

429

FIELD_PREP(HAL_WBM_RELEASE_INFO0_DESC_TYPE,

drivers/net/wireless/ath/ath11k/hal_rx.c

61

tlv->tl = FIELD_PREP(HAL_TLV_HDR_TAG, HAL_REO_FLUSH_CACHE) |

drivers/net/wireless/ath/ath11k/hal_rx.c

62

FIELD_PREP(HAL_TLV_HDR_LEN, sizeof(*desc));

drivers/net/wireless/ath/ath11k/hal_rx.c

713

qdesc->rx_queue_num = FIELD_PREP(HAL_RX_REO_QUEUE_RX_QUEUE_NUMBER, tid);

drivers/net/wireless/ath/ath11k/hal_rx.c

716

FIELD_PREP(HAL_RX_REO_QUEUE_INFO0_VLD, 1) |

drivers/net/wireless/ath/ath11k/hal_rx.c

717

FIELD_PREP(HAL_RX_REO_QUEUE_INFO0_ASSOC_LNK_DESC_COUNTER, 1) |

drivers/net/wireless/ath/ath11k/hal_rx.c

718

FIELD_PREP(HAL_RX_REO_QUEUE_INFO0_AC, ath11k_tid_to_ac(tid));

drivers/net/wireless/ath/ath11k/hal_rx.c

72

desc->info0 = FIELD_PREP(HAL_REO_FLUSH_CACHE_INFO0_CACHE_ADDR_HI,

drivers/net/wireless/ath/ath11k/hal_rx.c

727

qdesc->info0 |= FIELD_PREP(HAL_RX_REO_QUEUE_INFO0_RETRY, 1);

drivers/net/wireless/ath/ath11k/hal_rx.c

729

qdesc->info0 |= FIELD_PREP(HAL_RX_REO_QUEUE_INFO0_BA_WINDOW_SIZE,

drivers/net/wireless/ath/ath11k/hal_rx.c

738

FIELD_PREP(HAL_RX_REO_QUEUE_INFO0_PN_CHECK, 1) |

drivers/net/wireless/ath/ath11k/hal_rx.c

739

FIELD_PREP(HAL_RX_REO_QUEUE_INFO0_PN_SIZE,

drivers/net/wireless/ath/ath11k/hal_rx.c

747

qdesc->info0 |= FIELD_PREP(HAL_RX_REO_QUEUE_INFO0_IGNORE_AMPDU_FLG, 1);

drivers/net/wireless/ath/ath11k/hal_rx.c

749

qdesc->info1 |= FIELD_PREP(HAL_RX_REO_QUEUE_INFO1_SVLD, 0);

drivers/net/wireless/ath/ath11k/hal_rx.c

752

qdesc->info1 = FIELD_PREP(HAL_RX_REO_QUEUE_INFO1_SSN,

drivers/net/wireless/ath/ath11k/hal_rx.c

804

FIELD_PREP(HAL_REO_CMD_HDR_INFO0_CMD_NUMBER, cmd_num++);

drivers/net/wireless/ath/ath11k/hal_rx.c

81

FIELD_PREP(HAL_REO_FLUSH_CACHE_INFO0_BLOCK_RESRC_IDX,

drivers/net/wireless/ath/ath11k/hal_rx.c

99

tlv->tl = FIELD_PREP(HAL_TLV_HDR_TAG, HAL_REO_UPDATE_RX_REO_QUEUE) |

drivers/net/wireless/ath/ath11k/hal_tx.c

106

value = FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP0,

drivers/net/wireless/ath/ath11k/hal_tx.c

108

FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP1,

drivers/net/wireless/ath/ath11k/hal_tx.c

110

FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP2,

drivers/net/wireless/ath/ath11k/hal_tx.c

112

FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP3,

drivers/net/wireless/ath/ath11k/hal_tx.c

114

FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP4,

drivers/net/wireless/ath/ath11k/hal_tx.c

116

FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP5,

drivers/net/wireless/ath/ath11k/hal_tx.c

118

FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP6,

drivers/net/wireless/ath/ath11k/hal_tx.c

120

FIELD_PREP(HAL_TCL1_RING_FIELD_DSCP_TID_MAP7,

drivers/net/wireless/ath/ath11k/hal_tx.c

155

tlv->tl = FIELD_PREP(HAL_TLV_HDR_TAG, HAL_TCL_DATA_CMD) |

drivers/net/wireless/ath/ath11k/hal_tx.c

156

FIELD_PREP(HAL_TLV_HDR_LEN,

drivers/net/wireless/ath/ath11k/hal_tx.c

43

FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, ti->paddr);

drivers/net/wireless/ath/ath11k/hal_tx.c

45

FIELD_PREP(BUFFER_ADDR_INFO1_ADDR,

drivers/net/wireless/ath/ath11k/hal_tx.c

48

FIELD_PREP(BUFFER_ADDR_INFO1_RET_BUF_MGR, ti->rbm_id) |

drivers/net/wireless/ath/ath11k/hal_tx.c

49

FIELD_PREP(BUFFER_ADDR_INFO1_SW_COOKIE, ti->desc_id);

drivers/net/wireless/ath/ath11k/hal_tx.c

52

FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_DESC_TYPE, ti->type) |

drivers/net/wireless/ath/ath11k/hal_tx.c

53

FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_ENCAP_TYPE, ti->encap_type) |

drivers/net/wireless/ath/ath11k/hal_tx.c

54

FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_ENCRYPT_TYPE,

drivers/net/wireless/ath/ath11k/hal_tx.c

56

FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_SEARCH_TYPE,

drivers/net/wireless/ath/ath11k/hal_tx.c

58

FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_ADDR_EN,

drivers/net/wireless/ath/ath11k/hal_tx.c

60

FIELD_PREP(HAL_TCL_DATA_CMD_INFO0_CMD_NUM,

drivers/net/wireless/ath/ath11k/hal_tx.c

64

FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_DATA_LEN, ti->data_len) |

drivers/net/wireless/ath/ath11k/hal_tx.c

65

FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_PKT_OFFSET, ti->pkt_offset);

drivers/net/wireless/ath/ath11k/hal_tx.c

68

FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID, ti->tid) |

drivers/net/wireless/ath/ath11k/hal_tx.c

69

FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_LMAC_ID, ti->lmac_id);

drivers/net/wireless/ath/ath11k/hal_tx.c

71

tcl_cmd->info3 = FIELD_PREP(HAL_TCL_DATA_CMD_INFO3_DSCP_TID_TABLE_IDX,

drivers/net/wireless/ath/ath11k/hal_tx.c

73

FIELD_PREP(HAL_TCL_DATA_CMD_INFO3_SEARCH_INDEX,

drivers/net/wireless/ath/ath11k/hal_tx.c

75

FIELD_PREP(HAL_TCL_DATA_CMD_INFO3_CACHE_SET_NUM,

drivers/net/wireless/ath/ath11k/htc.c

61

hdr->htc_info = FIELD_PREP(HTC_HDR_ENDPOINTID, ep->eid) |

drivers/net/wireless/ath/ath11k/htc.c

62

FIELD_PREP(HTC_HDR_PAYLOADLEN,

drivers/net/wireless/ath/ath11k/htc.c

641

req_msg->msg_svc_id = FIELD_PREP(HTC_MSG_MESSAGEID,

drivers/net/wireless/ath/ath11k/htc.c

644

flags |= FIELD_PREP(ATH11K_HTC_CONN_FLAGS_RECV_ALLOC, tx_alloc);

drivers/net/wireless/ath/ath11k/htc.c

659

req_msg->flags_len = FIELD_PREP(HTC_SVC_MSG_CONNECTIONFLAGS, flags);

drivers/net/wireless/ath/ath11k/htc.c

66

hdr->htc_info |= FIELD_PREP(HTC_HDR_FLAGS,

drivers/net/wireless/ath/ath11k/htc.c

660

req_msg->msg_svc_id |= FIELD_PREP(HTC_SVC_MSG_SERVICE_ID,

drivers/net/wireless/ath/ath11k/htc.c

70

hdr->ctrl_info = FIELD_PREP(HTC_HDR_CONTROLBYTES1, ep->seq_no++);

drivers/net/wireless/ath/ath11k/htc.c

781

msg->msg_id = FIELD_PREP(HTC_MSG_MESSAGEID,

drivers/net/wireless/ath/ath11k/hw.c

122

val |= FIELD_PREP(HAL_REO1_GEN_ENABLE_FRAG_DST_RING,

drivers/net/wireless/ath/ath11k/hw.c

124

FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_LIST_ENABLE, 1) |

drivers/net/wireless/ath/ath11k/hw.c

125

FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_FLUSH_ENABLE, 1);

drivers/net/wireless/ath/ath11k/hw.c

138

FIELD_PREP(HAL_REO_DEST_RING_CTRL_HASH_RING_MAP,

drivers/net/wireless/ath/ath11k/hw.c

141

FIELD_PREP(HAL_REO_DEST_RING_CTRL_HASH_RING_MAP,

drivers/net/wireless/ath/ath11k/hw.c

144

FIELD_PREP(HAL_REO_DEST_RING_CTRL_HASH_RING_MAP,

drivers/net/wireless/ath/ath11k/hw.c

147

FIELD_PREP(HAL_REO_DEST_RING_CTRL_HASH_RING_MAP,

drivers/net/wireless/ath/ath11k/hw.c

384

info |= FIELD_PREP(RX_MSDU_START_INFO1_MSDU_LENGTH, len);

drivers/net/wireless/ath/ath11k/hw.c

40

tcl_cmd->info2 |= FIELD_PREP(HAL_IPQ8074_TCL_DATA_CMD_INFO2_MESH_ENABLE,

drivers/net/wireless/ath/ath11k/hw.c

47

tcl_cmd->info3 |= FIELD_PREP(HAL_QCN9074_TCL_DATA_CMD_INFO3_MESH_ENABLE,

drivers/net/wireless/ath/ath11k/hw.c

54

tcl_cmd->info3 |= FIELD_PREP(HAL_QCN9074_TCL_DATA_CMD_INFO3_MESH_ENABLE,

drivers/net/wireless/ath/ath11k/hw.c

561

info |= FIELD_PREP(RX_MSDU_START_INFO1_MSDU_LENGTH, len);

drivers/net/wireless/ath/ath11k/hw.c

732

info |= FIELD_PREP(RX_MSDU_START_INFO1_MSDU_LENGTH, len);

drivers/net/wireless/ath/ath11k/hw.c

774

val |= FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_LIST_ENABLE, 1) |

drivers/net/wireless/ath/ath11k/hw.c

775

FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_FLUSH_ENABLE, 1);

drivers/net/wireless/ath/ath11k/hw.c

780

val |= FIELD_PREP(HAL_REO1_MISC_CTL_FRAGMENT_DST_RING, HAL_SRNG_RING_ID_REO2SW1);

drivers/net/wireless/ath/ath11k/hw.c

816

val |= FIELD_PREP(HAL_REO1_GEN_ENABLE_FRAG_DST_RING,

drivers/net/wireless/ath/ath11k/hw.c

818

FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_LIST_ENABLE, 1) |

drivers/net/wireless/ath/ath11k/hw.c

819

FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_FLUSH_ENABLE, 1);

drivers/net/wireless/ath/ath11k/mac.c

2268

nss_160 = FIELD_PREP(ATH11K_PEER_RX_NSS_160MHZ, rx_nss - 1);

drivers/net/wireless/ath/ath11k/mac.c

2270

nss_160 = FIELD_PREP(ATH11K_PEER_RX_NSS_80_80MHZ, rx_nss - 1);

drivers/net/wireless/ath/ath11k/mac.c

2578

nss_160 = FIELD_PREP(ATH11K_PEER_RX_NSS_160MHZ, rx_nss - 1);

drivers/net/wireless/ath/ath11k/mac.c

2580

nss_160 = FIELD_PREP(ATH11K_PEER_RX_NSS_80_80MHZ, rx_nss - 1);

drivers/net/wireless/ath/ath11k/mac.c

2988

value |= FIELD_PREP(HE_MODE_SU_TX_BFER, HE_SU_BFER_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

2991

value |= FIELD_PREP(HE_MODE_MU_TX_BFER, HE_MU_BFER_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

2995

value |= FIELD_PREP(HE_MODE_DL_OFDMA, HE_DL_MUOFDMA_ENABLE) |

drivers/net/wireless/ath/ath11k/mac.c

2996

FIELD_PREP(HE_MODE_UL_OFDMA, HE_UL_MUOFDMA_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

2999

value |= FIELD_PREP(HE_MODE_UL_MUMIMO, HE_UL_MUMIMO_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

3002

value |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

3013

value = FIELD_PREP(HE_VHT_SOUNDING_MODE, HE_VHT_SOUNDING_MODE_ENABLE) |

drivers/net/wireless/ath/ath11k/mac.c

3014

FIELD_PREP(HE_TRIG_NONTRIG_SOUNDING_MODE,

drivers/net/wireless/ath/ath11k/mac.c

3056

hemode |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

3058

hemode |= FIELD_PREP(HE_MODE_MU_TX_BFEE, HE_MU_BFEE_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

3062

hemode |= FIELD_PREP(HE_MODE_DL_OFDMA, HE_DL_MUOFDMA_ENABLE) |

drivers/net/wireless/ath/ath11k/mac.c

3063

FIELD_PREP(HE_MODE_UL_OFDMA, HE_UL_MUOFDMA_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

3067

hemode |= FIELD_PREP(HE_MODE_UL_MUMIMO,

drivers/net/wireless/ath/ath11k/mac.c

3071

hemode |= FIELD_PREP(HE_MODE_SU_TX_BFEE, HE_SU_BFEE_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

3074

hemode |= FIELD_PREP(HE_MODE_SU_TX_BFER, HE_SU_BFER_ENABLE);

drivers/net/wireless/ath/ath11k/mac.c

3390

param_val |= FIELD_PREP(GENMASK(15, 8), srg_th);

drivers/net/wireless/ath/ath11k/mac.c

5905

FIELD_PREP(IEEE80211_HE_6GHZ_CAP_SM_PS,

drivers/net/wireless/ath/ath11k/mac.c

5909

FIELD_PREP(IEEE80211_HE_6GHZ_CAP_SM_PS,

drivers/net/wireless/ath/ath11k/mac.c

5914

FIELD_PREP(IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP, val);

drivers/net/wireless/ath/ath11k/mac.c

5917

FIELD_PREP(IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN, val);

drivers/net/wireless/ath/ath11k/peer.c

450

arsta->tcl_metadata |= FIELD_PREP(HTT_TCL_META_DATA_TYPE, 0) |

drivers/net/wireless/ath/ath11k/peer.c

451

FIELD_PREP(HTT_TCL_META_DATA_PEER_ID,

drivers/net/wireless/ath/ath11k/testmode.c

444

hdr_info = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/testmode.c

445

FIELD_PREP(WMI_TLV_LEN, (chunk_len +

drivers/net/wireless/ath/ath11k/testmode.c

450

seginfo = FIELD_PREP(ATH11K_FTM_SEGHDR_TOTAL_SEGMENTS, num_segments) |

drivers/net/wireless/ath/ath11k/testmode.c

451

FIELD_PREP(ATH11K_FTM_SEGHDR_CURRENT_SEQ, segnumber);

drivers/net/wireless/ath/ath11k/wmi.c

10019

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

10021

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

10028

arp->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

10030

FIELD_PREP(WMI_TLV_LEN, sizeof(*arp) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1043

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_UP_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1044

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1092

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PEER_CREATE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1093

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1125

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PEER_DELETE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1126

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1157

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

1159

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1197

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PEER_SET_PARAM_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1198

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1231

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PEER_FLUSH_TIDS_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1232

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1267

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

1269

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1309

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

1311

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1345

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_SET_PARAM_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1346

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1377

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_STA_POWERSAVE_MODE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1378

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1409

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_SUSPEND_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1410

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1440

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_RESUME_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1441

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1474

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

1476

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1507

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_AP_PS_PEER_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1508

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1542

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

1544

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1577

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_FORCE_FW_HANG_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1578

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1608

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_SET_PARAM_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1609

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1642

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_REQUEST_STATS_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1643

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1674

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_GET_TEMPERATURE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1675

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1703

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

1705

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1744

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_P2P_GO_SET_BEACON_IE) |

drivers/net/wireless/ath/ath11k/wmi.c

1745

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1750

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

1751

FIELD_PREP(WMI_TLV_LEN, aligned_len);

drivers/net/wireless/ath/ath11k/wmi.c

1792

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_BCN_TMPL_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1793

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1810

bcn_prb_info->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

1812

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1819

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

1820

FIELD_PREP(WMI_TLV_LEN, aligned_len);

drivers/net/wireless/ath/ath11k/wmi.c

1851

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_INSTALL_KEY_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

1852

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

1867

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

1868

FIELD_PREP(WMI_TLV_LEN, key_len_aligned);

drivers/net/wireless/ath/ath11k/wmi.c

2002

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

2004

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2041

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

2042

FIELD_PREP(WMI_TLV_LEN, peer_legacy_rates_align);

drivers/net/wireless/ath/ath11k/wmi.c

2054

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

2055

FIELD_PREP(WMI_TLV_LEN, peer_ht_rates_align);

drivers/net/wireless/ath/ath11k/wmi.c

2066

mcs->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VHT_RATE_SET) |

drivers/net/wireless/ath/ath11k/wmi.c

2067

FIELD_PREP(WMI_TLV_LEN, sizeof(*mcs) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2094

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

2095

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

2101

he_mcs->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

2103

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

2306

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_START_SCAN_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2307

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2343

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_UINT32) |

drivers/net/wireless/ath/ath11k/wmi.c

2344

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

2355

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_FIXED_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

2356

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

2373

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_FIXED_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

2374

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

2391

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

2392

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

2404

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_FIXED_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

2405

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

2419

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_FIXED_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

2420

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

2466

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_SET_TPC_POWER_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2467

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2479

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

2480

FIELD_PREP(WMI_TLV_LEN, array_len);

drivers/net/wireless/ath/ath11k/wmi.c

2486

ch->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

2488

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

2522

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_STOP_SCAN_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2523

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2591

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_SCAN_CHAN_LIST_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2592

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2606

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

2607

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2614

chan_info->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

2616

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

2642

chan_info->info |= FIELD_PREP(WMI_CHAN_INFO_MODE,

drivers/net/wireless/ath/ath11k/wmi.c

2644

*reg1 |= FIELD_PREP(WMI_CHAN_REG_INFO1_MIN_PWR,

drivers/net/wireless/ath/ath11k/wmi.c

2646

*reg1 |= FIELD_PREP(WMI_CHAN_REG_INFO1_MAX_PWR,

drivers/net/wireless/ath/ath11k/wmi.c

2648

*reg1 |= FIELD_PREP(WMI_CHAN_REG_INFO1_MAX_REG_PWR,

drivers/net/wireless/ath/ath11k/wmi.c

2650

*reg1 |= FIELD_PREP(WMI_CHAN_REG_INFO1_REG_CLS,

drivers/net/wireless/ath/ath11k/wmi.c

2652

*reg2 |= FIELD_PREP(WMI_CHAN_REG_INFO2_ANT_MAX,

drivers/net/wireless/ath/ath11k/wmi.c

2654

*reg2 |= FIELD_PREP(WMI_CHAN_REG_INFO2_MAX_TX_PWR,

drivers/net/wireless/ath/ath11k/wmi.c

2698

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

2700

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2723

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

2725

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

2768

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

277

cmd |= FIELD_PREP(WMI_CMD_HDR_CMD_ID, cmd_id);

drivers/net/wireless/ath/ath11k/wmi.c

2770

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2801

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_DELBA_SEND_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2802

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2838

FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ADDBA_SETRESPONSE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2839

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2873

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ADDBA_SEND_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2874

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2908

FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ADDBA_CLEAR_RESP_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2909

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2945

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

2946

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

2955

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

2956

FIELD_PREP(WMI_TLV_LEN, sizeof(*info));

drivers/net/wireless/ath/ath11k/wmi.c

2962

info->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO) |

drivers/net/wireless/ath/ath11k/wmi.c

2963

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

2993

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

2995

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3052

FIELD_PREP(WMI_TLV_TAG, WMI_TAG_SET_CURRENT_COUNTRY_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3053

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3094

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_THERM_THROT_CONFIG_REQUEST) |

drivers/net/wireless/ath/ath11k/wmi.c

3095

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3104

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

3105

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

3114

FIELD_PREP(WMI_TLV_TAG, WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO) |

drivers/net/wireless/ath/ath11k/wmi.c

3115

FIELD_PREP(WMI_TLV_LEN, sizeof(*lvl_conf) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3152

FIELD_PREP(WMI_TLV_TAG, WMI_TAG_11D_SCAN_START_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3153

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3188

FIELD_PREP(WMI_TLV_TAG, WMI_TAG_11D_SCAN_STOP_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3189

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3220

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_PKTLOG_ENABLE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3221

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3252

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_PKTLOG_DISABLE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3253

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3311

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_TWT_ENABLE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3312

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3361

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_TWT_DISABLE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3362

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3395

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_TWT_ADD_DIALOG_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3396

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3449

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_TWT_DEL_DIALOG_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

3450

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3488

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3490

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3528

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3530

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3572

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3574

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3610

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3612

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3649

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3651

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3688

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3690

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3727

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3729

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3766

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3768

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3805

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3807

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3845

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3847

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3889

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_BSS_COLOR_CHANGE_ENABLE) |

drivers/net/wireless/ath/ath11k/wmi.c

3890

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3930

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3932

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

3938

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

3939

FIELD_PREP(WMI_TLV_LEN, aligned_len);

drivers/net/wireless/ath/ath11k/wmi.c

3970

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

3972

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4018

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PRB_TMPL_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

4019

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4027

probe_info->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

4029

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4036

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

4037

FIELD_PREP(WMI_TLV_LEN, aligned_len);

drivers/net/wireless/ath/ath11k/wmi.c

4073

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ENABLE_FILS_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

4074

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4278

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_INIT_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

4279

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4286

cfg->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_RESOURCE_CONFIG) |

drivers/net/wireless/ath/ath11k/wmi.c

4287

FIELD_PREP(WMI_TLV_LEN, sizeof(*cfg) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4295

FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

4297

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

4314

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

4315

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

4320

hw_mode->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

4322

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

4332

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

4333

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

4341

band_to_mac->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

4343

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

4378

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_LRO_INFO_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

4379

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4442

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_SET_HW_MODE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

4443

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4503

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

4505

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4539

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

4541

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

4577

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_DMA_RING_CFG_REQ) |

drivers/net/wireless/ath/ath11k/wmi.c

4578

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

677

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_MGMT_TX_SEND_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

678

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

689

frame_tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

690

FIELD_PREP(WMI_TLV_LEN, buf_len);

drivers/net/wireless/ath/ath11k/wmi.c

699

params->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_TX_SEND_PARAMS) |

drivers/net/wireless/ath/ath11k/wmi.c

700

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

740

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_CREATE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

741

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

757

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

758

FIELD_PREP(WMI_TLV_LEN, len);

drivers/net/wireless/ath/ath11k/wmi.c

764

FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_TXRX_STREAMS) |

drivers/net/wireless/ath/ath11k/wmi.c

765

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

774

FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_TXRX_STREAMS) |

drivers/net/wireless/ath/ath11k/wmi.c

775

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

809

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_DELETE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

810

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

837

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_STOP_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

838

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

865

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_VDEV_DOWN_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

866

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

905

chan->info |= FIELD_PREP(WMI_CHAN_INFO_MODE, arg->channel.mode);

drivers/net/wireless/ath/ath11k/wmi.c

9095

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_UNIT_TEST_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9096

FIELD_PREP(WMI_TLV_LEN, sizeof(ut_cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9106

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_UINT32) |

drivers/net/wireless/ath/ath11k/wmi.c

9107

FIELD_PREP(WMI_TLV_LEN, arg_len);

drivers/net/wireless/ath/ath11k/wmi.c

9181

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_DEBUG_LOG_CONFIG_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9182

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9186

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_UINT32) |

drivers/net/wireless/ath/ath11k/wmi.c

9187

FIELD_PREP(WMI_TLV_LEN, MAX_MODULE_ID_BITMAP_WORDS * sizeof(u32));

drivers/net/wireless/ath/ath11k/wmi.c

923

chan->reg_info_1 = FIELD_PREP(WMI_CHAN_REG_INFO1_MAX_PWR,

drivers/net/wireless/ath/ath11k/wmi.c

925

FIELD_PREP(WMI_CHAN_REG_INFO1_MAX_REG_PWR,

drivers/net/wireless/ath/ath11k/wmi.c

928

chan->reg_info_2 = FIELD_PREP(WMI_CHAN_REG_INFO2_ANT_MAX,

drivers/net/wireless/ath/ath11k/wmi.c

930

FIELD_PREP(WMI_CHAN_REG_INFO2_MAX_TX_PWR,

drivers/net/wireless/ath/ath11k/wmi.c

9311

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_HW_DATA_FILTER_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9312

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9342

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9344

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9363

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_WOW_ENABLE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9364

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9390

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9392

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9415

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_WOW_ADD_DEL_EVT_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9416

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9455

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9457

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9467

tlv->header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9469

FIELD_PREP(WMI_TLV_LEN, sizeof(*bitmap));

drivers/net/wireless/ath/ath11k/wmi.c

9474

bitmap->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9476

FIELD_PREP(WMI_TLV_LEN, sizeof(*bitmap) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9491

tlv->header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9493

FIELD_PREP(WMI_TLV_LEN, 0);

drivers/net/wireless/ath/ath11k/wmi.c

9499

tlv->header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9501

FIELD_PREP(WMI_TLV_LEN, 0);

drivers/net/wireless/ath/ath11k/wmi.c

9507

tlv->header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9509

FIELD_PREP(WMI_TLV_LEN, 0);

drivers/net/wireless/ath/ath11k/wmi.c

9515

tlv->header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9517

FIELD_PREP(WMI_TLV_LEN, 0);

drivers/net/wireless/ath/ath11k/wmi.c

9523

tlv->header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9525

FIELD_PREP(WMI_TLV_LEN, sizeof(u32));

drivers/net/wireless/ath/ath11k/wmi.c

9545

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9547

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

955

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

957

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9593

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_NLO_CONFIG_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9594

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9625

tlv->header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9627

FIELD_PREP(WMI_TLV_LEN, nlo_list_len);

drivers/net/wireless/ath/ath11k/wmi.c

9633

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

9634

FIELD_PREP(WMI_TLV_LEN, sizeof(*nlo_list) - sizeof(*tlv));

drivers/net/wireless/ath/ath11k/wmi.c

9659

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_UINT32) |

drivers/net/wireless/ath/ath11k/wmi.c

9660

FIELD_PREP(WMI_TLV_LEN, channel_list_len);

drivers/net/wireless/ath/ath11k/wmi.c

9685

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_NLO_CONFIG_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9686

FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9730

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

9731

FIELD_PREP(WMI_TLV_LEN, ns_ext_tuples * sizeof(*ns));

drivers/net/wireless/ath/ath11k/wmi.c

9735

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

9736

FIELD_PREP(WMI_TLV_LEN, WMI_MAX_NS_OFFLOADS * sizeof(*ns));

drivers/net/wireless/ath/ath11k/wmi.c

9745

ns->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_NS_OFFLOAD_TUPLE) |

drivers/net/wireless/ath/ath11k/wmi.c

9746

FIELD_PREP(WMI_TLV_LEN, sizeof(*ns) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9792

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

9793

FIELD_PREP(WMI_TLV_LEN, WMI_MAX_ARP_OFFLOADS * sizeof(*arp));

drivers/net/wireless/ath/ath11k/wmi.c

9798

arp->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARP_OFFLOAD_TUPLE) |

drivers/net/wireless/ath/ath11k/wmi.c

9799

FIELD_PREP(WMI_TLV_LEN, sizeof(*arp) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9849

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG,

drivers/net/wireless/ath/ath11k/wmi.c

9851

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9883

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_GTK_OFFLOAD_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9884

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

991

chan->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_CHANNEL) |

drivers/net/wireless/ath/ath11k/wmi.c

992

FIELD_PREP(WMI_TLV_LEN,

drivers/net/wireless/ath/ath11k/wmi.c

9923

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_GTK_OFFLOAD_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9924

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9953

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9954

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9961

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

9962

FIELD_PREP(WMI_TLV_LEN, sar_len_aligned);

drivers/net/wireless/ath/ath11k/wmi.c

9968

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

9969

FIELD_PREP(WMI_TLV_LEN, rsvd_len_aligned);

drivers/net/wireless/ath/ath11k/wmi.c

997

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) |

drivers/net/wireless/ath/ath11k/wmi.c

998

FIELD_PREP(WMI_TLV_LEN, 0);

drivers/net/wireless/ath/ath11k/wmi.c

9991

cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD) |

drivers/net/wireless/ath/ath11k/wmi.c

9992

FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);

drivers/net/wireless/ath/ath11k/wmi.c

9998

tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_BYTE) |

drivers/net/wireless/ath/ath11k/wmi.c

9999

FIELD_PREP(WMI_TLV_LEN, rsvd_len_aligned);

drivers/net/wireless/intel/iwlwifi/iwl-fh.h

432

#define RFH_GEN_CFG_VAL(_n, _v) FIELD_PREP(RFH_GEN_CFG_ ## _n, _v)

drivers/net/wireless/intel/iwlwifi/iwl-prph.h

193

#define SCD_QUEUE_CTX_REG1_VAL(_n, _v) FIELD_PREP(SCD_QUEUE_CTX_REG1_ ## _n, _v)

drivers/net/wireless/intel/iwlwifi/iwl-prph.h

197

#define SCD_QUEUE_CTX_REG2_VAL(_n, _v) FIELD_PREP(SCD_QUEUE_CTX_REG2_ ## _n, _v)

drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c

1685

(FIELD_PREP(IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW, bw));

drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c

1750

(FIELD_PREP(IEEE80211_RADIOTAP_EHT_DATA0_LTF,

drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c

1752

FIELD_PREP(IEEE80211_RADIOTAP_EHT_DATA0_GI,

drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c

1784

(FIELD_PREP(IEEE80211_RADIOTAP_EHT_USER_INFO_MCS,

drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c

1787

FIELD_PREP(IEEE80211_RADIOTAP_EHT_USER_INFO_NSS_O,

drivers/net/wireless/mediatek/mt76/dma.c

166

u32 data1 = FIELD_PREP(RRO_IND_DATA1_MAGIC_CNT_MASK,

drivers/net/wireless/mediatek/mt76/dma.c

179

u32 data3 = FIELD_PREP(RRO_RXDMAD_DATA3_MAGIC_CNT_MASK,

drivers/net/wireless/mediatek/mt76/dma.c

254

ctrl = FIELD_PREP(MT_DMA_CTL_SD_LEN0, buf[0].len);

drivers/net/wireless/mediatek/mt76/dma.c

256

buf1 = FIELD_PREP(MT_DMA_CTL_SDP0_H, buf->addr >> 32);

drivers/net/wireless/mediatek/mt76/dma.c

270

buf1 |= FIELD_PREP(MT_DMA_CTL_TOKEN, rx_token);

drivers/net/wireless/mediatek/mt76/dma.c

283

info |= FIELD_PREP(MT_DMA_MAGIC_MASK, q->magic_cnt);

drivers/net/wireless/mediatek/mt76/dma.c

337

ctrl = FIELD_PREP(MT_DMA_CTL_SD_LEN0, buf[0].len);

drivers/net/wireless/mediatek/mt76/dma.c

339

info |= FIELD_PREP(MT_DMA_CTL_SDP0_H, buf[0].addr >> 32);

drivers/net/wireless/mediatek/mt76/dma.c

345

ctrl |= FIELD_PREP(MT_DMA_CTL_SD_LEN1, buf[1].len);

drivers/net/wireless/mediatek/mt76/dma.c

347

info |= FIELD_PREP(MT_DMA_CTL_SDP1_H,

drivers/net/wireless/mediatek/mt76/mt76.h

1197

mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))

drivers/net/wireless/mediatek/mt76/mt76.h

1200

__mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))

drivers/net/wireless/mediatek/mt76/mt76.h

41

FIELD_PREP(MT_QFLAG_WED_TYPE, _type) | \

drivers/net/wireless/mediatek/mt76/mt76.h

42

FIELD_PREP(MT_QFLAG_WED_RING, _n))

drivers/net/wireless/mediatek/mt76/mt76.h

54

FIELD_PREP(MT_QFLAG_WED_TYPE, _type) | \

drivers/net/wireless/mediatek/mt76/mt76.h

55

FIELD_PREP(MT_QFLAG_WED_RING, _n))

drivers/net/wireless/mediatek/mt76/mt7603/beacon.c

201

FIELD_PREP(MT_TBTT_PERIOD, intval) | MT_TBTT_CAL_ENABLE);

drivers/net/wireless/mediatek/mt76/mt7603/beacon.c

49

FIELD_PREP(MT_DMA_FQCR0_TARGET_BSS, om_idx) |

drivers/net/wireless/mediatek/mt76/mt7603/beacon.c

50

FIELD_PREP(MT_DMA_FQCR0_DEST_PORT_ID, 3) |

drivers/net/wireless/mediatek/mt76/mt7603/beacon.c

51

FIELD_PREP(MT_DMA_FQCR0_DEST_QUEUE_ID, 8);

drivers/net/wireless/mediatek/mt76/mt7603/beacon.c

56

FIELD_PREP(MT_DMA_FQCR0_TARGET_QID, MT_TX_HW_QUEUE_BCN));

drivers/net/wireless/mediatek/mt76/mt7603/beacon.c

63

FIELD_PREP(MT_DMA_FQCR0_TARGET_QID, MT_TX_HW_QUEUE_BMC));

drivers/net/wireless/mediatek/mt76/mt7603/dma.c

79

val |= FIELD_PREP(MT_TXD0_Q_IDX, hwq);

drivers/net/wireless/mediatek/mt76/mt7603/eeprom.c

16

val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf);

drivers/net/wireless/mediatek/mt76/mt7603/init.c

123

(FIELD_PREP(MT_WF_RMAC_RMCR_SMPS_MODE, 3) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

124

FIELD_PREP(MT_WF_RMAC_RMCR_RX_STREAMS, rx_chains)));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

153

FIELD_PREP(MT_AGG_LIMIT_AC(0), 24) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

154

FIELD_PREP(MT_AGG_LIMIT_AC(1), 24) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

155

FIELD_PREP(MT_AGG_LIMIT_AC(2), 24) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

156

FIELD_PREP(MT_AGG_LIMIT_AC(3), 24));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

159

FIELD_PREP(MT_AGG_LIMIT_AC(0), 24) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

160

FIELD_PREP(MT_AGG_LIMIT_AC(1), 24) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

161

FIELD_PREP(MT_AGG_LIMIT_AC(2), 24) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

162

FIELD_PREP(MT_AGG_LIMIT_AC(3), 24));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

165

FIELD_PREP(MT_AGG_CONTROL_BAR_RATE, 0x4b) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

166

FIELD_PREP(MT_AGG_CONTROL_CFEND_RATE, 0x69) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

170

FIELD_PREP(MT_AGG_RETRY_CONTROL_BAR_LIMIT, 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

171

FIELD_PREP(MT_AGG_RETRY_CONTROL_RTS_LIMIT, 15));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

174

FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 4096));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

217

FIELD_PREP(MT_DMA_TCFR_TXS_AGGR_TIMEOUT, 1) | /* 32 us */

drivers/net/wireless/mediatek/mt76/mt7603/init.c

222

FIELD_PREP(MT_DMA_TCFR_TXS_AGGR_TIMEOUT, 1) | /* 32 us */

drivers/net/wireless/mediatek/mt76/mt7603/init.c

241

FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

242

FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

243

FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

244

FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

245

FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

246

FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

247

FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

248

FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

251

FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7603_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

252

FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7603_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

253

FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7603_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

254

FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7603_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

255

FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7603_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

256

FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7603_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

257

FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7603_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

258

FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7603_RATE_RETRY - 1));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

261

(FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

263

FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

264

FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

28

[1] = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 0xf),

drivers/net/wireless/mediatek/mt76/mt7603/init.c

299

FIELD_PREP(MT_PSE_RTA_TAG_ID, i));

drivers/net/wireless/mediatek/mt76/mt7603/init.c

348

val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

349

FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

350

FIELD_PREP(MT_LED_STATUS_ON, delay_on);

drivers/net/wireless/mediatek/mt76/mt7603/init.c

61

FIELD_PREP(MT_PSE_FRP_P0, 7) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

62

FIELD_PREP(MT_PSE_FRP_P1, 6) |

drivers/net/wireless/mediatek/mt76/mt7603/init.c

63

FIELD_PREP(MT_PSE_FRP_P2_RQ2, 4));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1000

FIELD_PREP(MT_TXD6_BW, bw) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1001

FIELD_PREP(MT_TXD6_TX_RATE, rateval);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1017

val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1027

val |= FIELD_PREP(MT_TXD3_SEQ, seqno >> 4);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1036

txwi[5] |= cpu_to_le32(FIELD_PREP(MT_TXD5_PN_HIGH, pn >> 32));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

133

w0 = FIELD_PREP(MT_WTBL1_W0_ADDR_HI,

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1348

FIELD_PREP(MT_WPDMA_GLO_CFG_DMA_BURST_SIZE, 3) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

135

w1 = FIELD_PREP(MT_WTBL1_W1_ADDR_LO,

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

143

w0 |= FIELD_PREP(MT_WTBL1_W0_MUAR_IDX, vif);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1495

FIELD_PREP(MT_WPDMA_DEBUG_IDX, index) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1630

rxtd_6 |= FIELD_PREP(MT_RXTD_6_CCAED_TH, 0x34);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1632

rxtd_6 |= FIELD_PREP(MT_RXTD_6_CCAED_TH, 0x7d);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1635

rxtd_6 |= FIELD_PREP(MT_RXTD_6_ACI_TH, 0x0f);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

1637

rxtd_6 |= FIELD_PREP(MT_RXTD_6_ACI_TH, 0x10);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

197

FIELD_PREP(MT_TX_ABORT_WCID, idx));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

213

FIELD_PREP(MT_DMA_FQCR0_TARGET_WCID, idx) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

214

FIELD_PREP(MT_DMA_FQCR0_TARGET_QID, i) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

215

FIELD_PREP(MT_DMA_FQCR0_DEST_PORT_ID, port) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

216

FIELD_PREP(MT_DMA_FQCR0_DEST_QUEUE_ID, queue));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

250

FIELD_PREP(MT_PSE_RTA_TAG_ID, idx) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

251

FIELD_PREP(MT_PSE_RTA_PORT_ID, 0) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

252

FIELD_PREP(MT_PSE_RTA_QUEUE_ID, 1) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

253

FIELD_PREP(MT_PSE_RTA_REDIRECT_EN, enabled) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

303

FIELD_PREP(MT_WTBL1_W3_WTBL2_FRAME_ID, wtbl2_frame) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

304

FIELD_PREP(MT_WTBL1_W3_WTBL2_ENTRY_ID, wtbl2_entry) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

305

FIELD_PREP(MT_WTBL1_W3_WTBL4_FRAME_ID, wtbl4_frame) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

308

FIELD_PREP(MT_WTBL1_W4_WTBL3_FRAME_ID, wtbl3_frame) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

309

FIELD_PREP(MT_WTBL1_W4_WTBL3_ENTRY_ID, wtbl3_entry) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

310

FIELD_PREP(MT_WTBL1_W4_WTBL4_ENTRY_ID, wtbl4_entry));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

346

val |= FIELD_PREP(MT_WTBL1_W2_AMPDU_FACTOR,

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

348

FIELD_PREP(MT_WTBL1_W2_MPDU_DENSITY,

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

375

FIELD_PREP(MT_BA_CONTROL_1_TID, tid) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

383

u32 tid_mask = FIELD_PREP(MT_WTBL2_W15_BA_EN_TIDS, BIT(tid)) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

400

tid_val = FIELD_PREP(MT_WTBL2_W15_BA_EN_TIDS, BIT(tid)) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

47

u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

48

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

49

u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

50

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 24);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

52

u32 reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

53

FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

70

FIELD_PREP(MT_IFS_EIFS, 360) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

71

FIELD_PREP(MT_IFS_RIFS, 2) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

718

rateval = (FIELD_PREP(MT_TX_RATE_IDX, rate_idx) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

719

FIELD_PREP(MT_TX_RATE_MODE, phy));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

72

FIELD_PREP(MT_IFS_SIFS, sifs) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

73

FIELD_PREP(MT_IFS_SLOT, dev->slottime));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

802

w9 |= FIELD_PREP(MT_WTBL2_W9_CC_BW_SEL, bw);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

803

w9 |= FIELD_PREP(MT_WTBL2_W9_BW_CAP, bw);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

821

w9 |= FIELD_PREP(MT_WTBL2_W9_CHANGE_BW_RATE,

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

827

FIELD_PREP(MT_WTBL_RIUCR1_RATE0, probe_val) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

828

FIELD_PREP(MT_WTBL_RIUCR1_RATE1, val[0]) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

829

FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, val[1]));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

832

FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, val[1] >> 8) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

833

FIELD_PREP(MT_WTBL_RIUCR2_RATE3, val[1]) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

834

FIELD_PREP(MT_WTBL_RIUCR2_RATE4, val[2]) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

835

FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, val[2]));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

838

FIELD_PREP(MT_WTBL_RIUCR3_RATE5_HI, val[2] >> 4) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

839

FIELD_PREP(MT_WTBL_RIUCR3_RATE6, val[3]) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

840

FIELD_PREP(MT_WTBL_RIUCR3_RATE7, val[3]));

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

846

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, wcid) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

90

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

958

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + MT_TXD_SIZE) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

959

FIELD_PREP(MT_TXD0_Q_IDX, q->hw_idx);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

963

FIELD_PREP(MT_TXD1_OWN_MAC, vif_idx) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

964

FIELD_PREP(MT_TXD1_TID,

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

966

FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

967

FIELD_PREP(MT_TXD1_HDR_INFO, hdr_len / 2) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

968

FIELD_PREP(MT_TXD1_WLAN_IDX, wlan_idx) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

969

FIELD_PREP(MT_TXD1_PROTECTED, !!key);

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

975

val = FIELD_PREP(MT_TXD2_FRAME_TYPE, frame_type) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

976

FIELD_PREP(MT_TXD2_SUB_TYPE, frame_subtype) |

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

977

FIELD_PREP(MT_TXD2_MULTICAST,

drivers/net/wireless/mediatek/mt76/mt7603/mac.c

987

FIELD_PREP(MT_TXD5_PID, pid);

drivers/net/wireless/mediatek/mt76/mt7603/mcu.c

160

MT_SCH_4_BYPASS | FIELD_PREP(MT_SCH_4_FORCE_QID, 5));

drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c

459

FIELD_PREP(MT_WF_RMAC_MAR1_IDX, i * 2) |

drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c

517

FIELD_PREP(MT_WF_RMAC_MAR1_IDX, idx * 2) |

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

149

FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

150

FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8));

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

154

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x10) |

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

155

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x800));

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

172

FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

173

FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8));

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

183

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x40) |

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

184

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x800));

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

186

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x40) |

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

187

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x40));

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

189

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x20) |

drivers/net/wireless/mediatek/mt76/mt7615/dma.c

190

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x20));

drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c

20

val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf);

drivers/net/wireless/mediatek/mt76/mt7615/init.c

100

FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

101

FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

102

FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

103

FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

104

FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

105

FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

106

FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

107

FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));

drivers/net/wireless/mediatek/mt76/mt7615/init.c

110

FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

111

FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

112

FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

113

FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

114

FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

115

FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

116

FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

117

FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));

drivers/net/wireless/mediatek/mt76/mt7615/init.c

129

set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

130

FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);

drivers/net/wireless/mediatek/mt76/mt7615/init.c

159

FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

161

FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

162

FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));

drivers/net/wireless/mediatek/mt76/mt7615/init.c

172

FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

481

val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

482

FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

483

FIELD_PREP(MT_LED_STATUS_ON, delay_on);

drivers/net/wireless/mediatek/mt76/mt7615/init.c

91

FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

92

FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));

drivers/net/wireless/mediatek/mt76/mt7615/init.c

96

FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |

drivers/net/wireless/mediatek/mt76/mt7615/init.c

97

FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1118

w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, rd.bw);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1125

w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rd.bw) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1126

FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE,

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1132

FIELD_PREP(MT_WTBL_RIUCR1_RATE0, rd.probe_val) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1133

FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rd.val[0]) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1134

FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, rd.val[1]));

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1137

FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, rd.val[1] >> 8) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1138

FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rd.val[1]) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1139

FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rd.val[2]) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1140

FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, rd.val[2]));

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1143

FIELD_PREP(MT_WTBL_RIUCR3_RATE5_HI, rd.val[2] >> 4) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1144

FIELD_PREP(MT_WTBL_RIUCR3_RATE6, rd.val[3]) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1145

FIELD_PREP(MT_WTBL_RIUCR3_RATE7, rd.val[3]));

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1148

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, wcid) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1240

w0 |= FIELD_PREP(MT_WTBL_W0_KEY_IDX, keyidx);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

1264

FIELD_PREP(MT_WTBL_W2_KEY_TYPE, cipher));

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

140

u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

141

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

142

u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

143

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

172

reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

173

FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

178

FIELD_PREP(MT_IFS_EIFS, 360) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

179

FIELD_PREP(MT_IFS_RIFS, 2) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

180

FIELD_PREP(MT_IFS_SIFS, sifs) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

181

FIELD_PREP(MT_IFS_SLOT, phy->slottime));

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

702

rateval |= (FIELD_PREP(MT_TX_RATE_IDX, rate_idx) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

703

FIELD_PREP(MT_TX_RATE_MODE, phy) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

704

FIELD_PREP(MT_TX_RATE_NSS, nss - 1));

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

760

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

761

FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_LMAC) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

762

FIELD_PREP(MT_TXD0_Q_IDX, q_idx);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

766

FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

767

FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

768

FIELD_PREP(MT_TXD1_HDR_INFO,

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

770

FIELD_PREP(MT_TXD1_TID,

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

772

FIELD_PREP(MT_TXD1_PKT_FMT, p_fmt) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

773

FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

776

val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

777

FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

778

FIELD_PREP(MT_TXD2_MULTICAST, multicast);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

808

FIELD_PREP(MT_TXD6_BW, bw) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

809

FIELD_PREP(MT_TXD6_TX_RATE, rateval);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

828

val = MT_TXD5_TX_STATUS_HOST | FIELD_PREP(MT_TXD5_PID, pid);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

838

val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

850

FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

858

val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

859

FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

860

FIELD_PREP(MT_TXD7_SPE_IDX, 0x18);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

863

val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

864

FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt7615/mac.c

875

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

1454

FIELD_PREP(MT_TOP_MISC2_FW_STATE,

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

1485

FIELD_PREP(MT_TOP_OFF_RSV_FW_STATE,

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

712

info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mvif->mt76.band_idx);

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

92

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

93

FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_MCU) |

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

94

FIELD_PREP(MT_TXD0_Q_IDX, q_idx);

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

98

FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD) |

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

99

FIELD_PREP(MT_TXD1_PKT_FMT, pkt_fmt);

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

101

FIELD_PREP(MT_WTBL_RIUCR3_RATE5_HI, rate->val[2] >> 4) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

102

FIELD_PREP(MT_WTBL_RIUCR3_RATE6, rate->val[3]) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

103

FIELD_PREP(MT_WTBL_RIUCR3_RATE7, rate->val[3]));

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

106

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, sta->wcid.idx) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

232

FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

233

FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8));

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

243

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x3) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

244

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x1ff));

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

259

FIELD_PREP(MT_WL_TX_TMOUT_LMT, 80000) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

260

FIELD_PREP(MT_WL_RX_AGG_PKT_LMT, 1));

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

272

FIELD_PREP(MT_WL_RX_AGG_LMT, 32) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

273

FIELD_PREP(MT_WL_RX_AGG_TO, 100));

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

76

w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, rate->bw);

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

83

w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rate->bw) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

84

FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE,

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

90

FIELD_PREP(MT_WTBL_RIUCR1_RATE0, rate->probe_val) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

91

FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rate->val[0]) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

92

FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, rate->val[1]));

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

95

FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, rate->val[1] >> 8) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

96

FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rate->val[1]) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

97

FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rate->val[2]) |

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c

98

FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, rate->val[2]));

drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.c

229

cpu_to_le32(FIELD_PREP(IEEE80211_RADIOTAP_EHT_DATA0_GI, status->eht.gi) |

drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.c

230

FIELD_PREP(IEEE80211_RADIOTAP_EHT_DATA0_LTF, ltf_size)) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

20

he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

21

FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK,

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

354

return FIELD_PREP(MT_TX_RATE_NSS, nss) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

355

FIELD_PREP(MT_TX_RATE_IDX, rateidx) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

356

FIELD_PREP(MT_TX_RATE_MODE, mode);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

377

val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

378

FIELD_PREP(MT_TXD1_TID, tid);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

389

val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

390

FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

394

val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

395

FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

430

val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

431

FIELD_PREP(MT_TXD1_HDR_INFO,

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

433

FIELD_PREP(MT_TXD1_TID, tid);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

440

val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

441

FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

442

FIELD_PREP(MT_TXD2_MULTICAST, multicast);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

455

val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_FIRST);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

457

val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_MID);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

459

val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_LAST);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

479

FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

485

val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

486

FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

489

val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

490

FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

543

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

544

FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

545

FIELD_PREP(MT_TXD0_Q_IDX, q_idx);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

549

FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

550

FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

559

val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

570

val = FIELD_PREP(MT_TXD5_PID, pid);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

598

val |= FIELD_PREP(MT_TXD6_TX_RATE, rate);

drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c

607

txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, spe_idx));

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

3083

mode |= FIELD_PREP(DL_MODE_KEY_IDX,

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

3207

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

3208

FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

3209

FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

3213

FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

915

phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR,

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

917

FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY,

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

925

supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) |

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

926

FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf);

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c

928

supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates);

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h

1179

#define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h

1182

FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h

1186

FIELD_PREP(__MCU_CMD_FIELD_ID, \

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h

1190

FIELD_PREP(__MCU_CMD_FIELD_ID, \

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h

1194

FIELD_PREP(__MCU_CMD_FIELD_ID, \

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h

1201

FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h

1871

ret |= FIELD_PREP(DL_MODE_KEY_IDX,

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

418

val |= FIELD_PREP(MT_BBP_AGC_GAIN, gain);

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

43

FIELD_PREP(MT_RF_CSR_CFG_DATA, value) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

44

FIELD_PREP(MT_RF_CSR_CFG_REG_BANK, bank) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

45

FIELD_PREP(MT_RF_CSR_CFG_REG_ID, reg) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

80

FIELD_PREP(MT_RF_CSR_CFG_REG_BANK, bank) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

81

FIELD_PREP(MT_RF_CSR_CFG_REG_ID, reg) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

917

[0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

918

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

919

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

920

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

921

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)),

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

922

[1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

923

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

924

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

925

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

926

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)),

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

927

[2] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 2) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

928

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 3) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

929

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

930

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

931

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(2)),

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

932

[3] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 3) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

933

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 2) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

934

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

935

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

936

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(3)),

drivers/net/wireless/mediatek/mt76/mt76x0/usb.c

173

FIELD_PREP(MT_TXOP_TRUN_EN, 0x3f) |

drivers/net/wireless/mediatek/mt76/mt76x0/usb.c

174

FIELD_PREP(MT_TXOP_EXT_CCA_DLY, 0x58));

drivers/net/wireless/mediatek/mt76/mt76x0/usb_mcu.c

129

FIELD_PREP(MT_USB_DMA_CFG_RX_BULK_AGG_TOUT, 0x20));

drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.c

21

val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf);

drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.c

22

val |= FIELD_PREP(MT_EFUSE_CTRL_MODE, mode);

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

1224

FIELD_PREP(MT_CH_TIME_CFG_CH_TIMER_CLR, 1));

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

154

attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) |

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

155

FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8));

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

218

rateval = FIELD_PREP(MT_RXWI_RATE_INDEX, rate_idx);

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

219

rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy);

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

220

rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw);

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

237

tx_info = FIELD_PREP(MT_WCID_TX_INFO_RATE, rateval) |

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

238

FIELD_PREP(MT_WCID_TX_INFO_NSS, nss) |

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

239

FIELD_PREP(MT_WCID_TX_INFO_TXPWR_ADJ, max_txpwr_adj) |

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

344

u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

395

txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj);

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

421

txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size);

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

427

FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY, ampdu_density);

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

744

FIELD_PREP(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff));

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

750

FIELD_PREP(MT_MAC_BSSID_DW1_MBSS_MODE, 3) | /* 8 APs + 8 STAs */

drivers/net/wireless/mediatek/mt76/mt76x02_mac.c

932

data = FIELD_PREP(MT_PROT_CFG_CTRL, 1) |

drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c

58

FIELD_PREP(MT_MCU_MSG_CMD_TYPE, cmd) |

drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c

59

FIELD_PREP(MT_MCU_MSG_CMD_SEQ, seq) |

drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c

60

FIELD_PREP(MT_MCU_MSG_PORT, CPU_TX_PORT) |

drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c

61

FIELD_PREP(MT_MCU_MSG_LEN, skb->len);

drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c

316

val = FIELD_PREP(MT_WPDMA_GLO_CFG_DMA_BURST_SIZE, 3) |

drivers/net/wireless/mediatek/mt76/mt76x02_txrx.c

161

FIELD_PREP(MT_PKTID_AC,

drivers/net/wireless/mediatek/mt76/mt76x02_txrx.c

169

tx_info->info = FIELD_PREP(MT_TXD_INFO_QSEL, qsel) |

drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c

56

info = FIELD_PREP(MT_TXD_INFO_LEN, round_up(skb->len, 4)) |

drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c

57

FIELD_PREP(MT_TXD_INFO_DPORT, port) | flags;

drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c

89

FIELD_PREP(MT_PKTID_AC,

drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c

99

flags = FIELD_PREP(MT_TXD_INFO_QSEL, qsel) |

drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c

223

info = cpu_to_le32(FIELD_PREP(MT_MCU_MSG_PORT, CPU_TX_PORT) |

drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c

224

FIELD_PREP(MT_MCU_MSG_LEN, len) |

drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c

88

info = FIELD_PREP(MT_MCU_MSG_CMD_SEQ, seq) |

drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c

89

FIELD_PREP(MT_MCU_MSG_CMD_TYPE, cmd) |

drivers/net/wireless/mediatek/mt76/mt76x02_util.c

502

val = FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop) |

drivers/net/wireless/mediatek/mt76/mt76x02_util.c

503

FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |

drivers/net/wireless/mediatek/mt76/mt76x02_util.c

504

FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |

drivers/net/wireless/mediatek/mt76/mt76x02_util.c

505

FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);

drivers/net/wireless/mediatek/mt76/mt76x02_util.c

96

val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xff) |

drivers/net/wireless/mediatek/mt76/mt76x02_util.c

97

FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |

drivers/net/wireless/mediatek/mt76/mt76x02_util.c

98

FIELD_PREP(MT_LED_STATUS_ON, delay_on);

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

100

FIELD_PREP(MT_PROT_CFG_NAV, 1) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

101

FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x17))

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

104

(FIELD_PREP(MT_PROT_CFG_RATE, 0x2084) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

105

FIELD_PREP(MT_PROT_CFG_CTRL, 1) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

106

FIELD_PREP(MT_PROT_CFG_NAV, 1) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

107

FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f))

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

86

(FIELD_PREP(MT_PROT_CFG_RATE, 0x3) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

87

FIELD_PREP(MT_PROT_CFG_NAV, 1) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

88

FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

92

(FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

93

FIELD_PREP(MT_PROT_CFG_NAV, 1) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

94

FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

98

(FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \

drivers/net/wireless/mediatek/mt76/mt76x2/init.c

99

FIELD_PREP(MT_PROT_CFG_CTRL, 1) | \

drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c

86

val |= FIELD_PREP(MT_WPDMA_GLO_CFG_DMA_BURST_SIZE, 3);

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

126

[0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

127

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

128

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

129

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

130

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)),

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

131

[1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

132

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

133

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

134

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

135

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)),

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

136

[2] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 2) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

137

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 3) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

138

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

139

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

140

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(2)),

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

141

[3] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 3) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

142

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 2) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

143

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

144

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |

drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c

145

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(3)),

drivers/net/wireless/mediatek/mt76/mt76x2/phy.c

266

val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[0]));

drivers/net/wireless/mediatek/mt76/mt76x2/phy.c

268

val | FIELD_PREP(MT_BBP_AGC_GAIN, gain_val[1]));

drivers/net/wireless/mediatek/mt76/mt76x2/usb_mcu.c

101

FIELD_PREP(MT_USB_DMA_CFG_RX_BULK_AGG_TOUT, 0x20);

drivers/net/wireless/mediatek/mt76/mt76x2/usb_mcu.c

184

FIELD_PREP(MT_USB_DMA_CFG_RX_BULK_AGG_TOUT, 0x20);

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

64

[0] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 0) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

65

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 1) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

66

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

67

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

68

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(0)),

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

69

[1] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 1) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

70

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 0) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

71

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 2) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

72

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 3) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

73

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(1)),

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

74

[2] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 2) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

75

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 3) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

76

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

77

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

78

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(2)),

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

79

[3] = FIELD_PREP(MT_EXT_CCA_CFG_CCA0, 3) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

80

FIELD_PREP(MT_EXT_CCA_CFG_CCA1, 2) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

81

FIELD_PREP(MT_EXT_CCA_CFG_CCA2, 1) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

82

FIELD_PREP(MT_EXT_CCA_CFG_CCA3, 0) |

drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c

83

FIELD_PREP(MT_EXT_CCA_CFG_CCA_MASK, BIT(3)),

drivers/net/wireless/mediatek/mt76/mt7915/dma.c

431

FIELD_PREP(MT_WFDMA_WED_RING_CONTROL_TX0, 18) |

drivers/net/wireless/mediatek/mt76/mt7915/dma.c

432

FIELD_PREP(MT_WFDMA_WED_RING_CONTROL_TX1, 19) |

drivers/net/wireless/mediatek/mt76/mt7915/dma.c

433

FIELD_PREP(MT_WFDMA_WED_RING_CONTROL_RX1,

drivers/net/wireless/mediatek/mt76/mt7915/init.c

235

val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |

drivers/net/wireless/mediatek/mt76/mt7915/init.c

236

FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |

drivers/net/wireless/mediatek/mt76/mt7915/init.c

237

FIELD_PREP(MT_LED_STATUS_ON, delay_on);

drivers/net/wireless/mediatek/mt76/mt7915/init.c

449

FIELD_PREP(IEEE80211_VHT_CAP_EXT_NSS_BW_MASK, 1);

drivers/net/wireless/mediatek/mt76/mt7915/init.c

497

set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |

drivers/net/wireless/mediatek/mt76/mt7915/init.c

498

FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |

drivers/net/wireless/mediatek/mt76/mt7915/init.c

499

FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);

drivers/net/wireless/mediatek/mt76/mt7915/init.c

505

set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |

drivers/net/wireless/mediatek/mt76/mt7915/init.c

506

FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |

drivers/net/wireless/mediatek/mt76/mt7915/init.c

507

FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);

drivers/net/wireless/mediatek/mt76/mt7915/init.c

537

set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) |

drivers/net/wireless/mediatek/mt76/mt7915/init.c

538

FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4);

drivers/net/wireless/mediatek/mt76/mt7915/init.c

543

set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) |

drivers/net/wireless/mediatek/mt76/mt7915/init.c

544

FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3);

drivers/net/wireless/mediatek/mt76/mt7915/init.c

883

FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,

drivers/net/wireless/mediatek/mt76/mt7915/init.c

895

FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,

drivers/net/wireless/mediatek/mt76/mt7915/init.c

966

c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,

drivers/net/wireless/mediatek/mt76/mt7915/init.c

969

c |= FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1144

u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1145

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1146

u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1147

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1164

reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1165

FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1170

FIELD_PREP(MT_IFS_EIFS_CCK, 314));

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1182

FIELD_PREP(MT_IFS_EIFS_OFDM, eifs_ofdm) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1183

FIELD_PREP(MT_IFS_RIFS, 2) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1184

FIELD_PREP(MT_IFS_SIFS, sifs) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1185

FIELD_PREP(MT_IFS_SLOT, phy->slottime));

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

1209

mt76_set(dev, reg, FIELD_PREP(MT_WF_PHY_RX_CTRL1_IPI_EN, 0x5));

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

685

rateval |= FIELD_PREP(MT_TX_RATE_IDX, rate_idx) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

686

FIELD_PREP(MT_TX_RATE_MODE, mode) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

687

FIELD_PREP(MT_TX_RATE_NSS, nss - 1);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

696

FIELD_PREP(MT_TXD6_BW, bw) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

697

FIELD_PREP(MT_TXD6_TX_RATE, rateval) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

698

FIELD_PREP(MT_TXD6_SGI, td->tx_rate_sgi);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

711

val |= FIELD_PREP(MT_TXD6_HELTF, td->tx_ltf);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

718

txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX,

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

76

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

830

val = FIELD_PREP(MT_TXD0_TX_BYTES, MT_TXD_SIZE) |

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

831

FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CT);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

835

FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3);

drivers/net/wireless/mediatek/mt76/mt7915/mac.c

85

FIELD_PREP(MT_WTBLON_TOP_WDUCR_GROUP, (wcid >> 7)));

drivers/net/wireless/mediatek/mt76/mt7915/mcu.c

1995

info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);

drivers/net/wireless/mediatek/mt76/mt7915/mcu.c

2072

info->hw_queue = FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);

drivers/net/wireless/mediatek/mt76/mt7915/mcu.c

2103

u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,

drivers/net/wireless/mediatek/mt76/mt7915/mcu.c

2862

req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |

drivers/net/wireless/mediatek/mt76/mt7915/mcu.c

2863

FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

430

FIELD_PREP(MT_HIF_REMAP_L1_MASK, base));

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

447

FIELD_PREP(MT_HIF_REMAP_L2_MASK, base));

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c

459

FIELD_PREP(MT_HIF_REMAP_L2_MASK_MT7916, base));

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

476

FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

477

FIELD_PREP(MT_WTBL_LMAC_DW, _dw))

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

862

#define MT_AFE_PLL_STB_TIME_VAL (FIELD_PREP(GENMASK(30, 16), 0x4bc) | \

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

863

FIELD_PREP(GENMASK(14, 0), 0x7e4))

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

872

#define MT_AFE_PLL_CFG_VAL (FIELD_PREP(MT_AFE_BPLL_CFG_MASK, 0x1) | \

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

873

FIELD_PREP(MT_AFE_WPLL_CFG_MASK, 0x2) | \

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

874

FIELD_PREP(MT_AFE_MCU_WPLL_CFG_MASK, 0x1) | \

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

875

FIELD_PREP(MT_AFE_MCU_BPLL_CFG_MASK, 0x2))

drivers/net/wireless/mediatek/mt76/mt7915/regs.h

878

#define MT_AFE_DIG_TOP_01_VAL FIELD_PREP(MT_AFE_DIG_TOP_01_MASK, 0x9)

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

1002

u32 val = FIELD_PREP(MT_MCU_BUS_TIMEOUT_SET_MASK, 1) |

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

1003

FIELD_PREP(MT_MCU_BUS_TIMEOUT_CG_EN_MASK, 1) |

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

1004

FIELD_PREP(MT_MCU_BUS_TIMEOUT_EN_MASK, 1);

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

1013

val = FIELD_PREP(MT_MCU_BUS_DBG_TIMEOUT_SET_MASK, 0x3aa) |

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

1014

FIELD_PREP(MT_MCU_BUS_DBG_TIMEOUT_CK_EN_MASK, 1) |

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

1015

FIELD_PREP(MT_MCU_BUS_DBG_TIMEOUT_EN_MASK, 1);

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

1038

FIELD_PREP(MT_TOP_POS_SKU_MASK, val));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

123

val = FIELD_PREP(MT_ADIE_EFUSE_MODE_MASK, 0) |

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

124

FIELD_PREP(MT_ADIE_EFUSE_ADDR_MASK, addr) |

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

125

FIELD_PREP(MT_ADIE_EFUSE_KICK_MASK, 1);

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

191

FIELD_PREP(MT_TOP_POS_FAST_EN_MASK, 0x1));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

239

FIELD_PREP(MT_INFRACFG_RX_EN_MASK, enable));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

248

FIELD_PREP(MT_INFRACFG_TX_EN_MASK, enable));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

257

FIELD_PREP(MT_INFRACFG_RX_EN_MASK, enable));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

260

FIELD_PREP(MT_INFRACFG_TX_EN_MASK, enable));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

391

FIELD_PREP(MT_ADIE_VRPI_SEL_CR_MASK, val));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

398

FIELD_PREP(MT_ADIE_PGA_GAIN_MASK, val));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

410

FIELD_PREP(MT_ADIE_LDO_CTRL_MASK, val));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

472

mode = FIELD_PREP(GENMASK(6, 4), val);

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

476

FIELD_PREP(GENMASK(31, 24), trim_80m));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

482

FIELD_PREP(GENMASK(31, 24), trim_80m));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

486

FIELD_PREP(GENMASK(23, 16), trim_40m));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

492

FIELD_PREP(GENMASK(23, 16), trim_40m));

drivers/net/wireless/mediatek/mt76/mt7915/soc.c

956

MT_TOP_PWR_KEY | FIELD_PREP(MT_TOP_PWR_EN_MASK, enable));

drivers/net/wireless/mediatek/mt76/mt7915/testmode.c

244

FIELD_PREP(MT_TMAC_TRCR0_TR2T_CHK, tr2t_time) |

drivers/net/wireless/mediatek/mt76/mt7915/testmode.c

245

FIELD_PREP(MT_TMAC_TRCR0_I2T_CHK, i2t_time));

drivers/net/wireless/mediatek/mt76/mt7915/testmode.c

392

FIELD_PREP(MT_AGG_MRCR_RTS_FAIL_LIMIT, 1) |

drivers/net/wireless/mediatek/mt76/mt7915/testmode.c

393

FIELD_PREP(MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT, 1));

drivers/net/wireless/mediatek/mt76/mt7921/mac.c

21

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);

drivers/net/wireless/mediatek/mt76/mt7925/init.c

72

rate = FIELD_PREP(MT_TX_RATE_MODE, rate >> 8) |

drivers/net/wireless/mediatek/mt76/mt7925/init.c

73

FIELD_PREP(MT_TX_RATE_IDX, rate & GENMASK(7, 0));

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

16

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

638

val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) |

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

639

FIELD_PREP(MT_TXD1_TID, tid);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

650

val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

651

FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

678

val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

679

FIELD_PREP(MT_TXD1_HDR_INFO,

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

681

FIELD_PREP(MT_TXD1_TID, tid);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

698

val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

699

FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

703

txwi[3] |= cpu_to_le32(FIELD_PREP(MT_TXD3_BCM, multicast));

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

718

FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

771

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

772

FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) |

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

773

FIELD_PREP(MT_TXD0_Q_IDX, q_idx);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

776

val = FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

777

FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

780

val |= FIELD_PREP(MT_TXD1_TGID, band_idx);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

785

val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

797

val = FIELD_PREP(MT_TXD5_PID, pid);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

806

val = MT_TXD6_DAS | FIELD_PREP(MT_TXD6_MSDU_CNT, 1);

drivers/net/wireless/mediatek/mt76/mt7925/mac.c

833

txwi[6] |= cpu_to_le32(FIELD_PREP(MT_TXD6_TX_RATE, idx));

drivers/net/wireless/mediatek/mt76/mt7925/mac.h

18

FIELD_PREP(MT_WTBLON_TOP_WDUCR_GROUP, (wcid >> 7)));

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

1804

phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, af) |

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

1805

FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, mm);

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

1863

supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) |

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

1864

FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf);

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

1866

supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates);

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

3482

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

3483

FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

3484

FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

3487

val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);

drivers/net/wireless/mediatek/mt76/mt7925/pci.c

80

FIELD_PREP(MT_HIF_REMAP_L1_MASK, base));

drivers/net/wireless/mediatek/mt76/mt7925/pci.c

96

FIELD_PREP(MT_HIF_REMAP_L1_MASK, base));

drivers/net/wireless/mediatek/mt76/mt792x.h

499

hdr = FIELD_PREP(MT792x_SDIO_HDR_TX_BYTES, len) |

drivers/net/wireless/mediatek/mt76/mt792x.h

500

FIELD_PREP(MT792x_SDIO_HDR_PKT_TYPE, type);

drivers/net/wireless/mediatek/mt76/mt792x_dma.c

144

FIELD_PREP(MT_WFDMA0_GLO_CFG_DMA_SIZE, 3) |

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

308

set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) |

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

309

FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3);

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

40

u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

41

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

42

u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

43

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

55

reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

56

FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

61

FIELD_PREP(MT_IFS_EIFS, 360) |

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

62

FIELD_PREP(MT_IFS_RIFS, 2) |

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

63

FIELD_PREP(MT_IFS_SIFS, sifs) |

drivers/net/wireless/mediatek/mt76/mt792x_mac.c

64

FIELD_PREP(MT_IFS_SLOT, phy->slottime));

drivers/net/wireless/mediatek/mt76/mt792x_regs.h

173

FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \

drivers/net/wireless/mediatek/mt76/mt792x_regs.h

174

FIELD_PREP(MT_WTBL_LMAC_DW, _dw))

drivers/net/wireless/mediatek/mt76/mt792x_usb.c

127

FIELD_PREP(MT_WPDMA0_MAX_CNT_MASK, (_cnt_)) | \

drivers/net/wireless/mediatek/mt76/mt792x_usb.c

128

FIELD_PREP(MT_WPDMA0_BASE_PTR_MASK, (_base_)))

drivers/net/wireless/mediatek/mt76/mt792x_usb.c

157

FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |

drivers/net/wireless/mediatek/mt76/mt792x_usb.c

158

FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 0));

drivers/net/wireless/mediatek/mt76/mt792x_usb.c

161

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x3) |

drivers/net/wireless/mediatek/mt76/mt792x_usb.c

162

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0xfff));

drivers/net/wireless/mediatek/mt76/mt792x_usb.c

165

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x0) |

drivers/net/wireless/mediatek/mt76/mt792x_usb.c

166

FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x0));

drivers/net/wireless/mediatek/mt76/mt7996/dma.c

449

FIELD_PREP(WF_WFDMA0_GLO_CFG_EXT0_OUTSTAND_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/dma.c

453

FIELD_PREP(MT_WFDMA_AXI_R2A_CTRL2_OUTSTAND_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/dma.c

460

FIELD_PREP(WF_WFDMA0_GLO_CFG_EXT0_OUTSTAND_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/dma.c

464

FIELD_PREP(MT_WFDMA_AXI_R2A_CTRL2_OUTSTAND_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/init.c

1065

u32 val = FIELD_PREP(WED_RRO_ADDR_SIGNATURE_MASK, 0xff);

drivers/net/wireless/mediatek/mt76/mt7996/init.c

1256

*cap |= FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 4);

drivers/net/wireless/mediatek/mt76/mt7996/init.c

1258

*cap |= FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 3);

drivers/net/wireless/mediatek/mt76/mt7996/init.c

1269

FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, sts - 1);

drivers/net/wireless/mediatek/mt76/mt7996/init.c

1335

c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/init.c

1337

(FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/init.c

294

val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) |

drivers/net/wireless/mediatek/mt76/mt7996/init.c

295

FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off);

drivers/net/wireless/mediatek/mt76/mt7996/init.c

561

set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) |

drivers/net/wireless/mediatek/mt76/mt7996/init.c

562

FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4);

drivers/net/wireless/mediatek/mt76/mt7996/init.c

567

set = FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_MODE, 0) |

drivers/net/wireless/mediatek/mt76/mt7996/init.c

568

FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_PARAM, 0x3);

drivers/net/wireless/mediatek/mt76/mt7996/init.c

586

rate = FIELD_PREP(MT_TX_RATE_MODE, rate >> 8) |

drivers/net/wireless/mediatek/mt76/mt7996/init.c

587

FIELD_PREP(MT_TX_RATE_IDX, rate & GENMASK(7, 0));

drivers/net/wireless/mediatek/mt76/mt7996/init.c

810

FIELD_PREP(MT_RRO_PARTICULAR_SID, session_id));

drivers/net/wireless/mediatek/mt76/mt7996/init.c

897

u32 val = FIELD_PREP(WED_RRO_ADDR_SIGNATURE_MASK, 0xff);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

100

FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1010

val = FIELD_PREP(MT_TXD6_TX_RATE, idx) | MT_TXD6_FIXED_BW;

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

109

FIELD_PREP(MT_WTBLON_TOP_WDUCR_GROUP, (wcid >> 7)));

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1147

val = FIELD_PREP(MT_TXP0_TOKEN_ID0, id) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1151

val = FIELD_PREP(MT_TXP1_TID_ADDBA,

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1157

val = FIELD_PREP(MT_TXP_BUF_LEN, tx_info->buf[1].len) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1160

val |= FIELD_PREP(MT_TXP3_DMA_ADDR_H,

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1171

len = FIELD_PREP(MT_TXP_BUF_LEN, tx_info->buf[i + 1].len);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1173

len |= FIELD_PREP(MT_TXP_DMA_ADDR_H,

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1224

val = FIELD_PREP(MT_TXD0_TX_BYTES, MT_TXD_SIZE) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1225

FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CT);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1229

FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1854

pinfo->data |= cpu_to_le32(FIELD_PREP(MSDU_PAGE_INFO_OWNER_MASK, 1));

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

1928

u32 val = FIELD_PREP(WED_RRO_ADDR_SIGNATURE_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2046

FIELD_PREP(MT_RRO_ACK_SN_CTRL_SESSION_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2048

FIELD_PREP(MT_RRO_ACK_SN_CTRL_SN_MASK,

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2059

FIELD_PREP(MT_RRO_ACK_SN_CTRL_SESSION_MASK, seq_id) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2060

FIELD_PREP(MT_RRO_ACK_SN_CTRL_SN_MASK, seq_num));

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2099

u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2100

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2101

u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2102

FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2118

reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2119

FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

2132

FIELD_PREP(MT_WF_PHYRX_BAND_RX_CTRL1_IPI_EN, 0x5));

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

764

val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

765

FIELD_PREP(MT_TXD1_TID, tid);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

776

val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

777

FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

807

txwi[6] |= cpu_to_le32(FIELD_PREP(MT_TXD6_TID_ADDBA, tid));

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

816

val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

817

FIELD_PREP(MT_TXD1_HDR_INFO,

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

819

FIELD_PREP(MT_TXD1_TID, tid);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

839

val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

840

FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

843

val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_FIRST);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

845

val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_MID);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

847

val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_LAST);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

849

val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_NONE);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

853

txwi[3] |= cpu_to_le32(FIELD_PREP(MT_TXD3_BCM, multicast));

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

861

FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

874

FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

949

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + MT_TXD_SIZE) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

950

FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

951

FIELD_PREP(MT_TXD0_Q_IDX, q_idx);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

954

val = FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

955

FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

958

val |= FIELD_PREP(MT_TXD1_TGID, band_idx);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

964

FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

973

val = FIELD_PREP(MT_TXD5_PID, pid);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

984

val |= FIELD_PREP(MT_TXD6_MSDU_CNT, 1);

drivers/net/wireless/mediatek/mt76/mt7996/mac.c

986

val |= FIELD_PREP(MT_TXD6_MSDU_CNT_V2, 1);

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

2818

info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mlink->band_idx);

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

2888

info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->mt76->band_idx);

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

300

val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

301

FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

302

FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

305

val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

3146

u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, fw_state);

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

3794

req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

3795

FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

267

val = FIELD_PREP(MT_HIF_REMAP_L1_MASK_7996, base);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

270

val = FIELD_PREP(MT_HIF_REMAP_L1_MASK, base);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

288

val = FIELD_PREP(MT_HIF_REMAP_L2_MASK_7990, base);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

293

val = FIELD_PREP(MT_HIF_REMAP_L2_MASK, base);

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c

310

FIELD_PREP(MT_HIF_REMAP_CBTOP_MASK, base));

drivers/net/wireless/mediatek/mt76/mt7996/regs.h

340

FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \

drivers/net/wireless/mediatek/mt76/mt7996/regs.h

341

FIELD_PREP(MT_WTBL_LMAC_DW, _dw))

drivers/net/wireless/mediatek/mt76/npu.c

217

desc[q->head].ctrl = FIELD_PREP(NPU_TX_DMA_DESC_VEND_LEN_MASK, txwi_len) |

drivers/net/wireless/mediatek/mt76/npu.c

218

FIELD_PREP(NPU_TX_DMA_DESC_LEN_MASK, skb->len) |

drivers/net/wireless/mediatek/mt76/sdio.c

271

ctrl = FIELD_PREP(MAX_HIF_RX_LEN_NUM, 16);

drivers/net/wireless/mediatek/mt76/sdio.c

279

ctrl |= FIELD_PREP(MAX_HIF_RX_LEN_NUM_CONNAC2, 0);

drivers/net/wireless/mediatek/mt76/testmode.c

143

info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);

drivers/net/wireless/mediatek/mt76/tx.c

350

info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);

drivers/net/wireless/mediatek/mt76/tx.c

384

info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx);

drivers/net/wireless/mediatek/mt76/wed.c

62

token = FIELD_PREP(MT_DMA_CTL_TOKEN, token);

drivers/net/wireless/mediatek/mt76/wed.c

64

token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, addr >> 32);

drivers/net/wireless/mediatek/mt7601u/dma.h

72

FIELD_PREP(MT_TXD_INFO_LEN, round_up(skb->len, 4)) |

drivers/net/wireless/mediatek/mt7601u/dma.h

73

FIELD_PREP(MT_TXD_INFO_D_PORT, d_port) |

drivers/net/wireless/mediatek/mt7601u/dma.h

74

FIELD_PREP(MT_TXD_INFO_TYPE, type);

drivers/net/wireless/mediatek/mt7601u/dma.h

83

flags |= FIELD_PREP(MT_TXD_PKT_INFO_QSEL, qsel);

drivers/net/wireless/mediatek/mt7601u/eeprom.c

41

val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf) |

drivers/net/wireless/mediatek/mt7601u/eeprom.c

42

FIELD_PREP(MT_EFUSE_CTRL_MODE, mode) |

drivers/net/wireless/mediatek/mt7601u/init.c

103

val = FIELD_PREP(MT_USB_DMA_CFG_RX_BULK_AGG_TOUT, MT_USB_AGGR_TIMEOUT) |

drivers/net/wireless/mediatek/mt7601u/init.c

104

FIELD_PREP(MT_USB_DMA_CFG_RX_BULK_AGG_LMT,

drivers/net/wireless/mediatek/mt7601u/init.c

393

FIELD_PREP(MT_TXOP_TRUN_EN, 0x3f) |

drivers/net/wireless/mediatek/mt7601u/init.c

394

FIELD_PREP(MT_TXOP_EXT_CCA_DLY, 0x58));

drivers/net/wireless/mediatek/mt7601u/mac.c

136

rateval = FIELD_PREP(MT_RXWI_RATE_MCS, rate_idx);

drivers/net/wireless/mediatek/mt7601u/mac.c

137

rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy);

drivers/net/wireless/mediatek/mt7601u/mac.c

138

rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw);

drivers/net/wireless/mediatek/mt7601u/mac.c

24

FIELD_PREP(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff));

drivers/net/wireless/mediatek/mt7601u/mac.c

281

val |= FIELD_PREP(MT_BEACON_TIME_CFG_INTVAL, interval << 4) |

drivers/net/wireless/mediatek/mt7601u/mac.c

360

attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) |

drivers/net/wireless/mediatek/mt7601u/mac.c

361

FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8));

drivers/net/wireless/mediatek/mt7601u/mac.c

393

FIELD_PREP(MT_MAX_LEN_CFG_AMPDU, min_factor));

drivers/net/wireless/mediatek/mt7601u/mac.c

561

val |= FIELD_PREP(MT_WCID_ATTR_PKEY_MODE, cipher & 7) |

drivers/net/wireless/mediatek/mt7601u/mac.c

562

FIELD_PREP(MT_WCID_ATTR_PKEY_MODE_EXT, cipher >> 3);

drivers/net/wireless/mediatek/mt7601u/mcu.c

293

reg = cpu_to_le32(FIELD_PREP(MT_TXD_INFO_TYPE, DMA_PACKET) |

drivers/net/wireless/mediatek/mt7601u/mcu.c

294

FIELD_PREP(MT_TXD_INFO_D_PORT, CPU_TX_PORT) |

drivers/net/wireless/mediatek/mt7601u/mcu.c

295

FIELD_PREP(MT_TXD_INFO_LEN, len));

drivers/net/wireless/mediatek/mt7601u/mcu.c

38

FIELD_PREP(MT_TXD_CMD_INFO_SEQ, seq) |

drivers/net/wireless/mediatek/mt7601u/mcu.c

39

FIELD_PREP(MT_TXD_CMD_INFO_TYPE, cmd)));

drivers/net/wireless/mediatek/mt7601u/mt7601u.h

298

mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))

drivers/net/wireless/mediatek/mt7601u/phy.c

136

FIELD_PREP(MT_BBP_CSR_CFG_VAL, val) |

drivers/net/wireless/mediatek/mt7601u/phy.c

137

FIELD_PREP(MT_BBP_CSR_CFG_REG_NUM, offset) |

drivers/net/wireless/mediatek/mt7601u/phy.c

160

FIELD_PREP(MT_BBP_CSR_CFG_REG_NUM, offset) |

drivers/net/wireless/mediatek/mt7601u/phy.c

37

FIELD_PREP(MT_RF_CSR_CFG_DATA, value) |

drivers/net/wireless/mediatek/mt7601u/phy.c

38

FIELD_PREP(MT_RF_CSR_CFG_REG_BANK, bank) |

drivers/net/wireless/mediatek/mt7601u/phy.c

39

FIELD_PREP(MT_RF_CSR_CFG_REG_ID, offset) |

drivers/net/wireless/mediatek/mt7601u/phy.c

71

FIELD_PREP(MT_RF_CSR_CFG_REG_BANK, bank) |

drivers/net/wireless/mediatek/mt7601u/phy.c

72

FIELD_PREP(MT_RF_CSR_CFG_REG_ID, offset) |

drivers/net/wireless/mediatek/mt7601u/tx.c

170

txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size);

drivers/net/wireless/mediatek/mt7601u/tx.c

174

FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY,

drivers/net/wireless/mediatek/mt7601u/tx.c

184

pkt_len |= FIELD_PREP(MT_TXWI_LEN_PKTID, pkt_id);

drivers/net/wireless/mediatek/mt7601u/tx.c

282

val = FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |

drivers/net/wireless/mediatek/mt7601u/tx.c

283

FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |

drivers/net/wireless/mediatek/mt7601u/tx.c

284

FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);

drivers/net/wireless/mediatek/mt7601u/tx.c

292

val |= FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop);

drivers/net/wireless/microchip/wilc1000/sdio.c

831

tmp |= FIELD_PREP(IRG_FLAGS_MASK, cmd.data);

drivers/net/wireless/microchip/wilc1000/spi.c

1204

reg |= FIELD_PREP(PROTOCOL_REG_PKT_SZ_MASK,

drivers/net/wireless/microchip/wilc1000/wlan.c

1048

header = (FIELD_PREP(WILC_VMM_HDR_TYPE, tqe->type) |

drivers/net/wireless/microchip/wilc1000/wlan.c

1049

FIELD_PREP(WILC_VMM_HDR_MGMT_FIELD, mgmt_ptk) |

drivers/net/wireless/microchip/wilc1000/wlan.c

1050

FIELD_PREP(WILC_VMM_HDR_PKT_SIZE, tqe->buffer_size) |

drivers/net/wireless/microchip/wilc1000/wlan.c

1051

FIELD_PREP(WILC_VMM_HDR_BUFF_SIZE, vmm_sz));

drivers/net/wireless/realtek/rtl8xxxu/8188f.c

1669

val32 |= FIELD_PREP(XTAL1, crystal_cap) |

drivers/net/wireless/realtek/rtl8xxxu/8188f.c

1670

FIELD_PREP(XTAL0, crystal_cap);

drivers/net/wireless/realtek/rtl8xxxu/8723a.c

549

val32 |= FIELD_PREP(XTAL1, crystal_cap) |

drivers/net/wireless/realtek/rtl8xxxu/8723a.c

550

FIELD_PREP(XTAL0, crystal_cap);

drivers/net/wireless/realtek/rtw88/coex.c

333

para[1] = FIELD_PREP(PARA1_H2C69_TBTT_TIMES, times);

drivers/net/wireless/realtek/rtw88/coex.c

339

para[1] = FIELD_PREP(PARA1_H2C69_TBTT_TIMES, times) |

drivers/net/wireless/realtek/rtw88/coex.c

340

FIELD_PREP(PARA1_H2C69_TBTT_DIV100, 1);

drivers/net/wireless/realtek/rtw88/rtw8703b.c

1314

tmp_rx_iqi |= FIELD_PREP(BIT_MASK_RXIQ_S1_X, result[IQK_S1_RX_X]);

drivers/net/wireless/realtek/rtw88/rtw8703b.c

1315

tmp_rx_iqi |= FIELD_PREP(BIT_MASK_RXIQ_S1_Y1, result[IQK_S1_RX_Y]);

drivers/net/wireless/realtek/rtw88/rtw8703b.c

911

lna_idx = FIELD_PREP(BIT_LNA_H_MASK,

drivers/net/wireless/realtek/rtw88/rtw8703b.c

913

| FIELD_PREP(BIT_LNA_L_MASK, lna_idx);

drivers/net/wireless/realtek/rtw88/rtw8703b.c

915

lna_idx = FIELD_PREP(BIT_LNA_L_MASK, lna_idx);

drivers/net/wireless/realtek/rtw88/rtw8821c.c

622

lna_idx = FIELD_PREP(BIT_LNA_H_MASK, GET_PHY_STAT_P0_LNA_H(phy_status)) |

drivers/net/wireless/realtek/rtw88/rtw8821c.c

623

FIELD_PREP(BIT_LNA_L_MASK, GET_PHY_STAT_P0_LNA_L(phy_status));

drivers/net/wireless/realtek/rtw88/rtw8821c.c

841

u32 switch_status = FIELD_PREP(CTRL_TYPE_MASK, ctrl_type) | pos_type;

drivers/net/wireless/realtek/rtw88/rtw8822c.c

1106

thermal[path] |= FIELD_PREP(BIT(3), pg_therm & BIT(0));

drivers/net/wireless/realtek/rtw88/sdio.c

40

addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK,

drivers/net/wireless/realtek/rtw88/sdio.c

45

addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK,

drivers/net/wireless/realtek/rtw88/sdio.c

479

txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK,

drivers/net/wireless/realtek/rtw88/sdio.c

484

txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK,

drivers/net/wireless/realtek/rtw88/sdio.c

489

txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK,

drivers/net/wireless/realtek/rtw88/sdio.c

493

txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK,

drivers/net/wireless/realtek/rtw88/sdio.c

711

FIELD_PREP(BIT_RXDMA_AGG_PG_TH, size) |

drivers/net/wireless/realtek/rtw88/sdio.c

712

FIELD_PREP(BIT_DMA_AGG_TO_V1, timeout));

drivers/net/wireless/realtek/rtw89/cam.c

31

key32[i] = FIELD_PREP(GENMASK(7, 0), sec_cam->key[j + 0]) |

drivers/net/wireless/realtek/rtw89/cam.c

32

FIELD_PREP(GENMASK(15, 8), sec_cam->key[j + 1]) |

drivers/net/wireless/realtek/rtw89/cam.c

33

FIELD_PREP(GENMASK(23, 16), sec_cam->key[j + 2]) |

drivers/net/wireless/realtek/rtw89/cam.c

34

FIELD_PREP(GENMASK(31, 24), sec_cam->key[j + 3]);

drivers/net/wireless/realtek/rtw89/coex.c

3044

pwr_val = FIELD_PREP(WL_TX_POWER_INT_PART, level);

drivers/net/wireless/realtek/rtw89/coex.c

4428

null_role = FIELD_PREP(0x0f, dm->wl_scc.null_role1) |

drivers/net/wireless/realtek/rtw89/coex.c

4429

FIELD_PREP(0xf0, dm->wl_scc.null_role2);

drivers/net/wireless/realtek/rtw89/coex.h

311

phy_map = FIELD_PREP(BTC_RFK_PATH_MAP, paths) |

drivers/net/wireless/realtek/rtw89/coex.h

312

FIELD_PREP(BTC_RFK_PHY_MAP, BIT(phy_idx)) |

drivers/net/wireless/realtek/rtw89/coex.h

313

FIELD_PREP(BTC_RFK_BAND_MAP, chan->band_type);

drivers/net/wireless/realtek/rtw89/core.c

1422

u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) |

drivers/net/wireless/realtek/rtw89/core.c

1423

FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |

drivers/net/wireless/realtek/rtw89/core.c

1424

FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |

drivers/net/wireless/realtek/rtw89/core.c

1425

FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |

drivers/net/wireless/realtek/rtw89/core.c

1426

FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |

drivers/net/wireless/realtek/rtw89/core.c

1427

FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) |

drivers/net/wireless/realtek/rtw89/core.c

1428

FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) |

drivers/net/wireless/realtek/rtw89/core.c

1429

FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode);

drivers/net/wireless/realtek/rtw89/core.c

1436

u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |

drivers/net/wireless/realtek/rtw89/core.c

1437

FIELD_PREP(RTW89_TXWD_BODY0_WD_INFO_EN, desc_info->en_wd_info) |

drivers/net/wireless/realtek/rtw89/core.c

1438

FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) |

drivers/net/wireless/realtek/rtw89/core.c

1439

FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |

drivers/net/wireless/realtek/rtw89/core.c

1440

FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) |

drivers/net/wireless/realtek/rtw89/core.c

1441

FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl);

drivers/net/wireless/realtek/rtw89/core.c

1448

u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |

drivers/net/wireless/realtek/rtw89/core.c

1449

FIELD_PREP(RTW89_TXWD_BODY1_SEC_KEYID, desc_info->sec_keyid) |

drivers/net/wireless/realtek/rtw89/core.c

1450

FIELD_PREP(RTW89_TXWD_BODY1_SEC_TYPE, desc_info->sec_type);

drivers/net/wireless/realtek/rtw89/core.c

1457

u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) |

drivers/net/wireless/realtek/rtw89/core.c

1458

FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) |

drivers/net/wireless/realtek/rtw89/core.c

1459

FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) |

drivers/net/wireless/realtek/rtw89/core.c

1460

FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id);

drivers/net/wireless/realtek/rtw89/core.c

1467

u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) |

drivers/net/wireless/realtek/rtw89/core.c

1468

FIELD_PREP(RTW89_TXWD_BODY3_AGG_EN, desc_info->agg_en) |

drivers/net/wireless/realtek/rtw89/core.c

1469

FIELD_PREP(RTW89_TXWD_BODY3_BK, desc_info->bk);

drivers/net/wireless/realtek/rtw89/core.c

1476

u32 dword = FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |

drivers/net/wireless/realtek/rtw89/core.c

1477

FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);

drivers/net/wireless/realtek/rtw89/core.c

1484

u32 dword = FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |

drivers/net/wireless/realtek/rtw89/core.c

1485

FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |

drivers/net/wireless/realtek/rtw89/core.c

1486

FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |

drivers/net/wireless/realtek/rtw89/core.c

1487

FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);

drivers/net/wireless/realtek/rtw89/core.c

1494

u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) |

drivers/net/wireless/realtek/rtw89/core.c

1495

FIELD_PREP(RTW89_TXWD_BODY7_DATA_BW, desc_info->data_bw) |

drivers/net/wireless/realtek/rtw89/core.c

1496

FIELD_PREP(RTW89_TXWD_BODY7_GI_LTF, desc_info->gi_ltf) |

drivers/net/wireless/realtek/rtw89/core.c

1497

FIELD_PREP(RTW89_TXWD_BODY7_DATA_RATE, desc_info->data_rate);

drivers/net/wireless/realtek/rtw89/core.c

1504

u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) |

drivers/net/wireless/realtek/rtw89/core.c

1505

FIELD_PREP(RTW89_TXWD_INFO0_DATA_BW, desc_info->data_bw) |

drivers/net/wireless/realtek/rtw89/core.c

1506

FIELD_PREP(RTW89_TXWD_INFO0_GI_LTF, desc_info->gi_ltf) |

drivers/net/wireless/realtek/rtw89/core.c

1507

FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) |

drivers/net/wireless/realtek/rtw89/core.c

1508

FIELD_PREP(RTW89_TXWD_INFO0_DATA_STBC, desc_info->stbc) |

drivers/net/wireless/realtek/rtw89/core.c

1509

FIELD_PREP(RTW89_TXWD_INFO0_DATA_LDPC, desc_info->ldpc) |

drivers/net/wireless/realtek/rtw89/core.c

1510

FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |

drivers/net/wireless/realtek/rtw89/core.c

1511

FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port);

drivers/net/wireless/realtek/rtw89/core.c

1518

u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DATA_STBC, desc_info->stbc) |

drivers/net/wireless/realtek/rtw89/core.c

1519

FIELD_PREP(RTW89_TXWD_INFO0_DATA_LDPC, desc_info->ldpc) |

drivers/net/wireless/realtek/rtw89/core.c

1520

FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) |

drivers/net/wireless/realtek/rtw89/core.c

1521

FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port) |

drivers/net/wireless/realtek/rtw89/core.c

1522

FIELD_PREP(RTW89_TXWD_INFO0_DATA_ER, desc_info->er_cap) |

drivers/net/wireless/realtek/rtw89/core.c

1523

FIELD_PREP(RTW89_TXWD_INFO0_DATA_BW_ER, 0);

drivers/net/wireless/realtek/rtw89/core.c

1530

u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) |

drivers/net/wireless/realtek/rtw89/core.c

1531

FIELD_PREP(RTW89_TXWD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |

drivers/net/wireless/realtek/rtw89/core.c

1532

FIELD_PREP(RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE,

drivers/net/wireless/realtek/rtw89/core.c

1534

FIELD_PREP(RTW89_TXWD_INFO1_DATA_TXCNT_LMT_SEL,

drivers/net/wireless/realtek/rtw89/core.c

1536

FIELD_PREP(RTW89_TXWD_INFO1_DATA_TXCNT_LMT, desc_info->tx_cnt_lmt);

drivers/net/wireless/realtek/rtw89/core.c

1543

u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |

drivers/net/wireless/realtek/rtw89/core.c

1544

FIELD_PREP(RTW89_TXWD_INFO2_SEC_TYPE, desc_info->sec_type) |

drivers/net/wireless/realtek/rtw89/core.c

1545

FIELD_PREP(RTW89_TXWD_INFO2_SEC_HW_ENC, desc_info->sec_en) |

drivers/net/wireless/realtek/rtw89/core.c

1546

FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);

drivers/net/wireless/realtek/rtw89/core.c

1553

u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |

drivers/net/wireless/realtek/rtw89/core.c

1554

FIELD_PREP(RTW89_TXWD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |

drivers/net/wireless/realtek/rtw89/core.c

1555

FIELD_PREP(RTW89_TXWD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx);

drivers/net/wireless/realtek/rtw89/core.c

1562

u32 dword = FIELD_PREP(RTW89_TXWD_INFO3_SPE_RPT, desc_info->report);

drivers/net/wireless/realtek/rtw89/core.c

1570

u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, rts_en) |

drivers/net/wireless/realtek/rtw89/core.c

1571

FIELD_PREP(RTW89_TXWD_INFO4_HW_RTS_EN, 1) |

drivers/net/wireless/realtek/rtw89/core.c

1572

FIELD_PREP(RTW89_TXWD_INFO4_SW_DEFINE, desc_info->sn);

drivers/net/wireless/realtek/rtw89/core.c

1632

u32 dword = FIELD_PREP(BE_TXD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) |

drivers/net/wireless/realtek/rtw89/core.c

1633

FIELD_PREP(BE_TXD_BODY0_WDINFO_EN, desc_info->en_wd_info) |

drivers/net/wireless/realtek/rtw89/core.c

1634

FIELD_PREP(BE_TXD_BODY0_CH_DMA, desc_info->ch_dma) |

drivers/net/wireless/realtek/rtw89/core.c

1635

FIELD_PREP(BE_TXD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) |

drivers/net/wireless/realtek/rtw89/core.c

1636

FIELD_PREP(BE_TXD_BODY0_WD_PAGE, desc_info->wd_page);

drivers/net/wireless/realtek/rtw89/core.c

1643

u32 dword = FIELD_PREP(BE_TXD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) |

drivers/net/wireless/realtek/rtw89/core.c

1644

FIELD_PREP(BE_TXD_BODY1_SEC_KEYID, desc_info->sec_keyid) |

drivers/net/wireless/realtek/rtw89/core.c

1645

FIELD_PREP(BE_TXD_BODY1_SEC_TYPE, desc_info->sec_type);

drivers/net/wireless/realtek/rtw89/core.c

1652

u32 dword = FIELD_PREP(BE_TXD_BODY2_TID_IND, desc_info->tid_indicate) |

drivers/net/wireless/realtek/rtw89/core.c

1653

FIELD_PREP(BE_TXD_BODY2_QSEL, desc_info->qsel) |

drivers/net/wireless/realtek/rtw89/core.c

1654

FIELD_PREP(BE_TXD_BODY2_TXPKTSIZE, desc_info->pkt_size) |

drivers/net/wireless/realtek/rtw89/core.c

1655

FIELD_PREP(BE_TXD_BODY2_AGG_EN, desc_info->agg_en) |

drivers/net/wireless/realtek/rtw89/core.c

1656

FIELD_PREP(BE_TXD_BODY2_BK, desc_info->bk) |

drivers/net/wireless/realtek/rtw89/core.c

1657

FIELD_PREP(BE_TXD_BODY2_MACID, desc_info->mac_id);

drivers/net/wireless/realtek/rtw89/core.c

1664

u32 dword = FIELD_PREP(BE_TXD_BODY2_TID_IND_V1, desc_info->tid_indicate) |

drivers/net/wireless/realtek/rtw89/core.c

1665

FIELD_PREP(BE_TXD_BODY2_QSEL_V1, desc_info->qsel) |

drivers/net/wireless/realtek/rtw89/core.c

1666

FIELD_PREP(BE_TXD_BODY2_TXPKTSIZE, desc_info->pkt_size) |

drivers/net/wireless/realtek/rtw89/core.c

1667

FIELD_PREP(BE_TXD_BODY2_AGG_EN, desc_info->agg_en) |

drivers/net/wireless/realtek/rtw89/core.c

1668

FIELD_PREP(BE_TXD_BODY2_MACID_V1, desc_info->mac_id);

drivers/net/wireless/realtek/rtw89/core.c

1675

u32 dword = FIELD_PREP(BE_TXD_BODY3_WIFI_SEQ, desc_info->seq) |

drivers/net/wireless/realtek/rtw89/core.c

1676

FIELD_PREP(BE_TXD_BODY3_MLO_FLAG, desc_info->mlo) |

drivers/net/wireless/realtek/rtw89/core.c

1677

FIELD_PREP(BE_TXD_BODY3_IS_MLD_SW_EN, desc_info->sw_mld);

drivers/net/wireless/realtek/rtw89/core.c

1684

u32 dword = FIELD_PREP(BE_TXD_BODY3_WIFI_SEQ, desc_info->seq) |

drivers/net/wireless/realtek/rtw89/core.c

1685

FIELD_PREP(BE_TXD_BODY3_MLO_FLAG, desc_info->mlo) |

drivers/net/wireless/realtek/rtw89/core.c

1686

FIELD_PREP(BE_TXD_BODY3_IS_MLD_SW_EN, desc_info->sw_mld) |

drivers/net/wireless/realtek/rtw89/core.c

1687

FIELD_PREP(BE_TXD_BODY3_BK_V1, desc_info->bk);

drivers/net/wireless/realtek/rtw89/core.c

1694

u32 dword = FIELD_PREP(BE_TXD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) |

drivers/net/wireless/realtek/rtw89/core.c

1695

FIELD_PREP(BE_TXD_BODY4_SEC_IV_L1, desc_info->sec_seq[1]);

drivers/net/wireless/realtek/rtw89/core.c

1702

u32 dword = FIELD_PREP(BE_TXD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) |

drivers/net/wireless/realtek/rtw89/core.c

1703

FIELD_PREP(BE_TXD_BODY5_SEC_IV_H3, desc_info->sec_seq[3]) |

drivers/net/wireless/realtek/rtw89/core.c

1704

FIELD_PREP(BE_TXD_BODY5_SEC_IV_H4, desc_info->sec_seq[4]) |

drivers/net/wireless/realtek/rtw89/core.c

1705

FIELD_PREP(BE_TXD_BODY5_SEC_IV_H5, desc_info->sec_seq[5]);

drivers/net/wireless/realtek/rtw89/core.c

1712

u32 dword = FIELD_PREP(BE_TXD_BODY6_UPD_WLAN_HDR, desc_info->upd_wlan_hdr);

drivers/net/wireless/realtek/rtw89/core.c

1719

u32 dword = FIELD_PREP(BE_TXD_BODY7_USERATE_SEL, desc_info->use_rate) |

drivers/net/wireless/realtek/rtw89/core.c

1720

FIELD_PREP(BE_TXD_BODY7_DATA_BW, desc_info->data_bw) |

drivers/net/wireless/realtek/rtw89/core.c

1721

FIELD_PREP(BE_TXD_BODY7_GI_LTF, desc_info->gi_ltf) |

drivers/net/wireless/realtek/rtw89/core.c

1722

FIELD_PREP(BE_TXD_BODY7_DATA_ER, desc_info->er_cap) |

drivers/net/wireless/realtek/rtw89/core.c

1723

FIELD_PREP(BE_TXD_BODY7_DATA_BW_ER, 0) |

drivers/net/wireless/realtek/rtw89/core.c

1724

FIELD_PREP(BE_TXD_BODY7_DATARATE, desc_info->data_rate);

drivers/net/wireless/realtek/rtw89/core.c

1731

u32 dword = FIELD_PREP(BE_TXD_INFO0_DATA_STBC, desc_info->stbc) |

drivers/net/wireless/realtek/rtw89/core.c

1732

FIELD_PREP(BE_TXD_INFO0_DATA_LDPC, desc_info->ldpc) |

drivers/net/wireless/realtek/rtw89/core.c

1733

FIELD_PREP(BE_TXD_INFO0_DISDATAFB, desc_info->dis_data_fb) |

drivers/net/wireless/realtek/rtw89/core.c

1734

FIELD_PREP(BE_TXD_INFO0_MULTIPORT_ID, desc_info->port) |

drivers/net/wireless/realtek/rtw89/core.c

1735

FIELD_PREP(BE_TXD_INFO0_DATA_TXCNT_LMT_SEL,

drivers/net/wireless/realtek/rtw89/core.c

1737

FIELD_PREP(BE_TXD_INFO0_DATA_TXCNT_LMT, desc_info->tx_cnt_lmt);

drivers/net/wireless/realtek/rtw89/core.c

1744

u32 dword = FIELD_PREP(BE_TXD_INFO1_MAX_AGG_NUM, desc_info->ampdu_num) |

drivers/net/wireless/realtek/rtw89/core.c

1745

FIELD_PREP(BE_TXD_INFO1_A_CTRL_BSR, desc_info->a_ctrl_bsr) |

drivers/net/wireless/realtek/rtw89/core.c

1746

FIELD_PREP(BE_TXD_INFO1_DATA_RTY_LOWEST_RATE,

drivers/net/wireless/realtek/rtw89/core.c

1748

FIELD_PREP(BE_TXD_INFO1_SW_DEFINE, desc_info->sn);

drivers/net/wireless/realtek/rtw89/core.c

1755

u32 dword = FIELD_PREP(BE_TXD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |

drivers/net/wireless/realtek/rtw89/core.c

1756

FIELD_PREP(BE_TXD_INFO2_FORCE_KEY_EN, desc_info->sec_en) |

drivers/net/wireless/realtek/rtw89/core.c

1757

FIELD_PREP(BE_TXD_INFO2_SEC_CAM_IDX, desc_info->sec_cam_idx) |

drivers/net/wireless/realtek/rtw89/core.c

1758

FIELD_PREP(BE_TXD_INFO2_SPE_RPT_V1, desc_info->report);

drivers/net/wireless/realtek/rtw89/core.c

1765

u32 dword = FIELD_PREP(BE_TXD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) |

drivers/net/wireless/realtek/rtw89/core.c

1766

FIELD_PREP(BE_TXD_INFO2_FORCE_KEY_EN_V1, desc_info->sec_en) |

drivers/net/wireless/realtek/rtw89/core.c

1767

FIELD_PREP(BE_TXD_INFO2_SEC_CAM_IDX_V1, desc_info->sec_cam_idx);

drivers/net/wireless/realtek/rtw89/core.c

1775

u32 dword = FIELD_PREP(BE_TXD_INFO4_RTS_EN, rts_en) |

drivers/net/wireless/realtek/rtw89/core.c

1776

FIELD_PREP(BE_TXD_INFO4_HW_RTS_EN, 1);

drivers/net/wireless/realtek/rtw89/core.c

1841

u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |

drivers/net/wireless/realtek/rtw89/core.c

1842

FIELD_PREP(AX_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?

drivers/net/wireless/realtek/rtw89/core.c

1861

u32 dword = FIELD_PREP(BE_RXD_RPKT_LEN_MASK, desc_info->pkt_size) |

drivers/net/wireless/realtek/rtw89/core.c

1862

FIELD_PREP(BE_RXD_RPKT_TYPE_MASK, desc_info->fw_dl ?

drivers/net/wireless/realtek/rtw89/debug.c

1255

__ctrl = FIELD_PREP(B_AX_##__type##_DFI_TRGSEL_MASK, \

drivers/net/wireless/realtek/rtw89/debug.c

1257

FIELD_PREP(B_AX_##__type##_DFI_ADDR_MASK, __sel) | \

drivers/net/wireless/realtek/rtw89/fw.c

1575

hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) |

drivers/net/wireless/realtek/rtw89/fw.c

1576

FIELD_PREP(H2C_HDR_CAT, cat) |

drivers/net/wireless/realtek/rtw89/fw.c

1577

FIELD_PREP(H2C_HDR_CLASS, class) |

drivers/net/wireless/realtek/rtw89/fw.c

1578

FIELD_PREP(H2C_HDR_FUNC, func) |

drivers/net/wireless/realtek/rtw89/fw.c

1579

FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq));

drivers/net/wireless/realtek/rtw89/fw.c

1581

hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN,

drivers/net/wireless/realtek/rtw89/fw.c

1598

hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) |

drivers/net/wireless/realtek/rtw89/fw.c

1599

FIELD_PREP(H2C_HDR_CAT, cat) |

drivers/net/wireless/realtek/rtw89/fw.c

1600

FIELD_PREP(H2C_HDR_CLASS, class) |

drivers/net/wireless/realtek/rtw89/fw.c

1601

FIELD_PREP(H2C_HDR_FUNC, func) |

drivers/net/wireless/realtek/rtw89/fw.c

1602

FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq));

drivers/net/wireless/realtek/rtw89/fw.c

1604

hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN,

drivers/net/wireless/realtek/rtw89/fw.c

1863

FIELD_PREP(B_AX_DBG_SEL0, FW_PROG_CNTR_DBG_SEL) |

drivers/net/wireless/realtek/rtw89/fw.c

1864

FIELD_PREP(B_AX_DBG_SEL1, FW_PROG_CNTR_DBG_SEL));

drivers/net/wireless/realtek/rtw89/fw.h

3936

#define RTW89_MK_HT_RATE(nss, mcs) (FIELD_PREP(GENMASK(4, 3), nss) | \

drivers/net/wireless/realtek/rtw89/fw.h

3937

FIELD_PREP(GENMASK(2, 0), mcs))

drivers/net/wireless/realtek/rtw89/mac.c

128

ctrl_data = FIELD_PREP(B_AX_WDE_DFI_TRGSEL_MASK, ctrl->target) |

drivers/net/wireless/realtek/rtw89/mac.c

129

FIELD_PREP(B_AX_WDE_DFI_ADDR_MASK, ctrl->addr) |

drivers/net/wireless/realtek/rtw89/mac.c

135

ctrl_data = FIELD_PREP(B_AX_PLE_DFI_TRGSEL_MASK, ctrl->target) |

drivers/net/wireless/realtek/rtw89/mac.c

136

FIELD_PREP(B_AX_PLE_DFI_ADDR_MASK, ctrl->addr) |

drivers/net/wireless/realtek/rtw89/mac.c

1371

request |= FIELD_PREP(PS_RPWM_SEQ_NUM,

drivers/net/wireless/realtek/rtw89/mac.c

2773

val |= FIELD_PREP(B_AX_WMAC_SPEC_SIFS_CCK_MASK, WMAC_SPEC_SIFS_CCK);

drivers/net/wireless/realtek/rtw89/mac.c

2789

val |= FIELD_PREP(B_AX_WMAC_SPEC_SIFS_OFDM_MASK, sifs);

drivers/net/wireless/realtek/rtw89/mac.c

4132

val |= FIELD_PREP(B_AX_DMA_MODE_MASK, DMA_MOD_PCIE_1B);

drivers/net/wireless/realtek/rtw89/mac.c

4134

val |= FIELD_PREP(B_AX_DMA_MODE_MASK, DMA_MOD_USB);

drivers/net/wireless/realtek/rtw89/mac.c

4136

val |= FIELD_PREP(B_AX_DMA_MODE_MASK, DMA_MOD_SDIO);

drivers/net/wireless/realtek/rtw89/mac.c

4811

val &= ~FIELD_PREP(B_AX_PORT_DROP_4_0_MASK, BIT(port));

drivers/net/wireless/realtek/rtw89/mac.c

6270

val |= FIELD_PREP(B_AX_BTMODE_MASK, MAC_AX_BT_MODE_0_3);

drivers/net/wireless/realtek/rtw89/mac.c

6278

val |= FIELD_PREP(B_AX_BT_RPT_SAMPLE_RATE_MASK, MAC_AX_RTK_RATE);

drivers/net/wireless/realtek/rtw89/mac.c

6284

val |= FIELD_PREP(B_AX_BTMODE_MASK, MAC_AX_BT_MODE_2);

drivers/net/wireless/realtek/rtw89/mac.c

6289

val16 |= FIELD_PREP(B_AX_BT_PRI_DETECT_TO_MASK, MAC_AX_CSR_PRI_TO);

drivers/net/wireless/realtek/rtw89/mac.c

6291

val16 |= FIELD_PREP(B_AX_BT_TRX_INIT_DETECT_MASK, MAC_AX_CSR_TRX_TO);

drivers/net/wireless/realtek/rtw89/mac.c

6293

val16 |= FIELD_PREP(B_AX_BT_STAT_DELAY_MASK, MAC_AX_CSR_DELAY);

drivers/net/wireless/realtek/rtw89/mac.c

6483

FIELD_PREP(B_MAC_AX_SB_DRV_MASK, val) |

drivers/net/wireless/realtek/rtw89/mac.c

6484

FIELD_PREP(B_MAC_AX_SB_FW_MASK, fw_sb);

drivers/net/wireless/realtek/rtw89/mac.c

6612

val32 = FIELD_PREP(B_AX_BFMEE_NDP_RX_STANDBY_TIMER_MASK, NDP_RX_STANDBY_TIMER);

drivers/net/wireless/realtek/rtw89/mac.c

6682

val = FIELD_PREP(B_AX_BFMEE_CSIINFO0_NC_MASK, nc) |

drivers/net/wireless/realtek/rtw89/mac.c

6683

FIELD_PREP(B_AX_BFMEE_CSIINFO0_NR_MASK, nr) |

drivers/net/wireless/realtek/rtw89/mac.c

6684

FIELD_PREP(B_AX_BFMEE_CSIINFO0_NG_MASK, ng) |

drivers/net/wireless/realtek/rtw89/mac.c

6685

FIELD_PREP(B_AX_BFMEE_CSIINFO0_CB_MASK, cb) |

drivers/net/wireless/realtek/rtw89/mac.c

6686

FIELD_PREP(B_AX_BFMEE_CSIINFO0_CS_MASK, cs) |

drivers/net/wireless/realtek/rtw89/mac.c

6687

FIELD_PREP(B_AX_BFMEE_CSIINFO0_LDPC_EN, ldpc_en) |

drivers/net/wireless/realtek/rtw89/mac.c

6688

FIELD_PREP(B_AX_BFMEE_CSIINFO0_STBC_EN, stbc_en);

drivers/net/wireless/realtek/rtw89/mac.c

7046

val32 = FIELD_PREP(B_AX_WL_XTAL_SI_ADDR_MASK, offset) |

drivers/net/wireless/realtek/rtw89/mac.c

7047

FIELD_PREP(B_AX_WL_XTAL_SI_DATA_MASK, val) |

drivers/net/wireless/realtek/rtw89/mac.c

7048

FIELD_PREP(B_AX_WL_XTAL_SI_BITMASK_MASK, mask) |

drivers/net/wireless/realtek/rtw89/mac.c

7049

FIELD_PREP(B_AX_WL_XTAL_SI_MODE_MASK, XTAL_SI_NORMAL_WRITE) |

drivers/net/wireless/realtek/rtw89/mac.c

7050

FIELD_PREP(B_AX_WL_XTAL_SI_CMD_POLL, 1);

drivers/net/wireless/realtek/rtw89/mac.c

7076

val32 = FIELD_PREP(B_AX_WL_XTAL_SI_ADDR_MASK, offset) |

drivers/net/wireless/realtek/rtw89/mac.c

7077

FIELD_PREP(B_AX_WL_XTAL_SI_DATA_MASK, 0x00) |

drivers/net/wireless/realtek/rtw89/mac.c

7078

FIELD_PREP(B_AX_WL_XTAL_SI_BITMASK_MASK, 0x00) |

drivers/net/wireless/realtek/rtw89/mac.c

7079

FIELD_PREP(B_AX_WL_XTAL_SI_MODE_MASK, XTAL_SI_NORMAL_READ) |

drivers/net/wireless/realtek/rtw89/mac.c

7080

FIELD_PREP(B_AX_WL_XTAL_SI_CMD_POLL, 1);

drivers/net/wireless/realtek/rtw89/mac80211.c

418

val = FIELD_PREP(FW_EDCA_PARAM_TXOPLMT_MSK, params->txop) |

drivers/net/wireless/realtek/rtw89/mac80211.c

419

FIELD_PREP(FW_EDCA_PARAM_CWMAX_MSK, ecw_max) |

drivers/net/wireless/realtek/rtw89/mac80211.c

420

FIELD_PREP(FW_EDCA_PARAM_CWMIN_MSK, ecw_min) |

drivers/net/wireless/realtek/rtw89/mac80211.c

421

FIELD_PREP(FW_EDCA_PARAM_AIFS_MSK, aifs);

drivers/net/wireless/realtek/rtw89/mac80211.c

454

val = FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_TIMER_MASK, timer_32us) |

drivers/net/wireless/realtek/rtw89/mac80211.c

455

FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_CW_MASK, mu_edca->ecw_min_max) |

drivers/net/wireless/realtek/rtw89/mac80211.c

456

FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_AIFS_MASK, aifs);

drivers/net/wireless/realtek/rtw89/pci.c

1472

length_option = FIELD_PREP(B_PCIADDR_LEN_V1_MASK, len) |

drivers/net/wireless/realtek/rtw89/pci.c

1473

FIELD_PREP(B_PCIADDR_HIGH_SEL_V1_MASK, 0) |

drivers/net/wireless/realtek/rtw89/pci.c

1474

FIELD_PREP(B_PCIADDR_LS_V1_MASK, remain == 0);

drivers/net/wireless/realtek/rtw89/pci.c

1820

val32 = FIELD_PREP(BDRAM_SIDX_MASK, bd_ram->start_idx) |

drivers/net/wireless/realtek/rtw89/pci.c

1821

FIELD_PREP(BDRAM_MAX_MASK, bd_ram->max_num) |

drivers/net/wireless/realtek/rtw89/pci.c

1822

FIELD_PREP(BDRAM_MIN_MASK, bd_ram->min_num);

drivers/net/wireless/realtek/rtw89/pci.c

2823

val32 = FIELD_PREP(B_AX_PCIE_WDT_TIMER_M1_MASK,

drivers/net/wireless/realtek/rtw89/pci.c

3200

dec_ctrl |= FIELD_PREP(B_AX_LTR_IDX_DRV_MASK, PCIE_LTR_IDX_IDLE) |

drivers/net/wireless/realtek/rtw89/pci.c

3207

dec_ctrl |= FIELD_PREP(B_AX_LTR_SPACE_IDX_V1_MASK, PCI_LTR_SPC_500US);

drivers/net/wireless/realtek/rtw89/pci.c

4130

filter_out_val |= FIELD_PREP(REG_FILTER_OUT_MASK, val16);

drivers/net/wireless/realtek/rtw89/pci.c

4260

FIELD_PREP(B_AX_RXCOUNTER_MATCH_MASK, RTW89_PCI_RXBD_NUM_MAX / 2) |

drivers/net/wireless/realtek/rtw89/pci.c

4261

FIELD_PREP(B_AX_RXTIMER_UNIT_MASK, AX_RXTIMER_UNIT_64US) |

drivers/net/wireless/realtek/rtw89/pci.c

4262

FIELD_PREP(B_AX_RXTIMER_MATCH_MASK, 2048 / 64);

drivers/net/wireless/realtek/rtw89/phy.c

1153

val = FIELD_PREP(B_SWSI_DATA_BIT_MASK_EN_V1, b_msk_en) |

drivers/net/wireless/realtek/rtw89/phy.c

1154

FIELD_PREP(B_SWSI_DATA_PATH_V1, rf_path) |

drivers/net/wireless/realtek/rtw89/phy.c

1155

FIELD_PREP(B_SWSI_DATA_ADDR_V1, addr) |

drivers/net/wireless/realtek/rtw89/phy.c

1156

FIELD_PREP(B_SWSI_DATA_VAL_V1, data);

drivers/net/wireless/realtek/rtw89/phy.c

3070

val = FIELD_PREP(GENMASK(7, 0), v[0]) |

drivers/net/wireless/realtek/rtw89/phy.c

3071

FIELD_PREP(GENMASK(15, 8), v[1]) |

drivers/net/wireless/realtek/rtw89/phy.c

3072

FIELD_PREP(GENMASK(23, 16), v[2]) |

drivers/net/wireless/realtek/rtw89/phy.c

3073

FIELD_PREP(GENMASK(31, 24), v[3]);

drivers/net/wireless/realtek/rtw89/phy.c

3102

val = FIELD_PREP(GENMASK(3, 0), v[0]) |

drivers/net/wireless/realtek/rtw89/phy.c

3103

FIELD_PREP(GENMASK(7, 4), v[1]) |

drivers/net/wireless/realtek/rtw89/phy.c

3104

FIELD_PREP(GENMASK(11, 8), v[2]) |

drivers/net/wireless/realtek/rtw89/phy.c

3105

FIELD_PREP(GENMASK(15, 12), v[3]) |

drivers/net/wireless/realtek/rtw89/phy.c

3106

FIELD_PREP(GENMASK(19, 16), v[4]);

drivers/net/wireless/realtek/rtw89/phy.c

3137

val = FIELD_PREP(GENMASK(7, 0), ptr[0]) |

drivers/net/wireless/realtek/rtw89/phy.c

3138

FIELD_PREP(GENMASK(15, 8), ptr[1]) |

drivers/net/wireless/realtek/rtw89/phy.c

3139

FIELD_PREP(GENMASK(23, 16), ptr[2]) |

drivers/net/wireless/realtek/rtw89/phy.c

3140

FIELD_PREP(GENMASK(31, 24), ptr[3]);

drivers/net/wireless/realtek/rtw89/phy.c

3172

val = FIELD_PREP(GENMASK(7, 0), ptr[0]) |

drivers/net/wireless/realtek/rtw89/phy.c

3173

FIELD_PREP(GENMASK(15, 8), ptr[1]) |

drivers/net/wireless/realtek/rtw89/phy.c

3174

FIELD_PREP(GENMASK(23, 16), ptr[2]) |

drivers/net/wireless/realtek/rtw89/phy.c

3175

FIELD_PREP(GENMASK(31, 24), ptr[3]);

drivers/net/wireless/realtek/rtw89/phy.c

7991

chan_idx = FIELD_PREP(RTW89_CH_BASE_IDX_MASK, RTW89_CH_BASE_IDX_2G) |

drivers/net/wireless/realtek/rtw89/phy.c

7992

FIELD_PREP(RTW89_CH_OFFSET_MASK, central_ch);

drivers/net/wireless/realtek/rtw89/phy.c

8016

chan_idx = FIELD_PREP(RTW89_CH_BASE_IDX_MASK, idx) |

drivers/net/wireless/realtek/rtw89/phy.c

8017

FIELD_PREP(RTW89_CH_OFFSET_MASK,

drivers/net/wireless/realtek/rtw89/phy.c

940

val = FIELD_PREP(B_SWSI_READ_ADDR_PATH_V1, rf_path) |

drivers/net/wireless/realtek/rtw89/phy.c

941

FIELD_PREP(B_SWSI_READ_ADDR_ADDR_V1, addr);

drivers/net/wireless/realtek/rtw89/phy.h

16

#define get_phy_compare(rfe, cv) (FIELD_PREP(GENMASK(23, 16), rfe) | \

drivers/net/wireless/realtek/rtw89/phy.h

17

FIELD_PREP(GENMASK(7, 0), cv))

drivers/net/wireless/realtek/rtw89/rtw8851b.c

2294

u32 _wrt = FIELD_PREP(_msk, _val); \

drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c

3585

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_20M);

drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c

3588

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_40M);

drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c

3591

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_80M);

drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c

3703

rf_reg18 |= FIELD_PREP(RR_CFGCH_CH, central_ch);

drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c

3706

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_5G) |

drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c

3707

FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_5G);

drivers/net/wireless/realtek/rtw89/rtw8852a.c

1959

u32 iv = FIELD_PREP(B_AX_TXAGC_BT_MASK, val);

drivers/net/wireless/realtek/rtw89/rtw8852b.c

786

u32 _wrt = FIELD_PREP(_msk, _val); \

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3656

tmp = FIELD_PREP(B_P1_TSSI_ALIM11, tssi_alim_offset_1) |

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3657

FIELD_PREP(B_P1_TSSI_ALIM12, tssi_alim_offset_2) |

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3658

FIELD_PREP(B_P1_TSSI_ALIM13, tssi_alim_offset_3);

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3670

tmp = FIELD_PREP(B_P1_TSSI_ALIM11, tssi_alim_offset_1) |

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3671

FIELD_PREP(B_P1_TSSI_ALIM12, tssi_alim_offset_2) |

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3672

FIELD_PREP(B_P1_TSSI_ALIM13, tssi_alim_offset_3);

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3963

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_20M);

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3966

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_40M);

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

3969

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_80M);

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

4083

rf_reg18 |= FIELD_PREP(RR_CFGCH_CH, central_ch);

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

4086

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_5G) |

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c

4087

FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_5G);

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

3713

tmp = FIELD_PREP(B_P1_TSSI_ALIM11, tssi_alim_offset_1) |

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

3714

FIELD_PREP(B_P1_TSSI_ALIM12, tssi_alim_offset_2) |

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

3715

FIELD_PREP(B_P1_TSSI_ALIM13, tssi_alim_offset_3);

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

3727

tmp = FIELD_PREP(B_P1_TSSI_ALIM11, tssi_alim_offset_1) |

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

3728

FIELD_PREP(B_P1_TSSI_ALIM12, tssi_alim_offset_2) |

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

3729

FIELD_PREP(B_P1_TSSI_ALIM13, tssi_alim_offset_3);

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

4029

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_20M);

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

4032

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_40M);

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

4035

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_80M);

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

4150

rf_reg18 |= FIELD_PREP(RR_CFGCH_CH, central_ch);

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

4153

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_5G) |

drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c

4154

FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_5G);

drivers/net/wireless/realtek/rtw89/rtw8852c.c

1663

val = FIELD_PREP(B_P0_TRSW_A, trsw) | FIELD_PREP(B_P0_TRSW_B, trsw_b);

drivers/net/wireless/realtek/rtw89/rtw8852c.c

1691

val = FIELD_PREP(B_P0_RFM_DIS_WL, dis_tx_gnt_wl) |

drivers/net/wireless/realtek/rtw89/rtw8852c.c

1692

FIELD_PREP(B_P0_RFM_TX_OPT, active_tx_opt) |

drivers/net/wireless/realtek/rtw89/rtw8852c.c

1693

FIELD_PREP(B_P0_RFM_BT_EN, act_bt_en) |

drivers/net/wireless/realtek/rtw89/rtw8852c.c

1694

FIELD_PREP(B_P0_RFM_OUT, rfm_output_val);

drivers/net/wireless/realtek/rtw89/rtw8852c.c

2763

u32 _wrt = FIELD_PREP(_msk, _val); \

drivers/net/wireless/realtek/rtw89/rtw8852c.c

795

txsc = FIELD_PREP(B_AX_TXSC_20M_MASK, txsc20) |

drivers/net/wireless/realtek/rtw89/rtw8852c.c

796

FIELD_PREP(B_AX_TXSC_40M_MASK, txsc40) |

drivers/net/wireless/realtek/rtw89/rtw8852c.c

797

FIELD_PREP(B_AX_TXSC_80M_MASK, txsc80);

drivers/net/wireless/realtek/rtw89/rtw8852c.c

801

txsc = FIELD_PREP(B_AX_TXSC_20M_MASK, txsc20) |

drivers/net/wireless/realtek/rtw89/rtw8852c.c

802

FIELD_PREP(B_AX_TXSC_40M_MASK, txsc40);

drivers/net/wireless/realtek/rtw89/rtw8852c.c

806

txsc = FIELD_PREP(B_AX_TXSC_20M_MASK, txsc20);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3870

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_20M);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3875

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_40M);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3880

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_80M);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3885

rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_160M);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3942

rf_reg18 |= FIELD_PREP(RR_CFGCH_CH, central_ch);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3946

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_2G);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3947

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_2G);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3950

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_5G);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3951

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_5G);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3954

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_6G);

drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c

3955

rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_6G);

drivers/net/wwan/t7xx/t7xx_dpmaif.c

492

value = FIELD_PREP(DPMAIF_DLQ_LOW_TIMEOUT_THRES_MKS, DPMAIF_DLQ_TIMEOUT_THRES_DF);

drivers/net/wwan/t7xx/t7xx_dpmaif.c

493

value |= FIELD_PREP(DPMAIF_DLQ_HIGH_TIMEOUT_THRES_MSK,

drivers/net/wwan/t7xx/t7xx_dpmaif.c

582

value |= FIELD_PREP(DPMAIF_BAT_BID_MAXCNT_MSK, DPMAIF_HW_PKT_BIDCNT);

drivers/net/wwan/t7xx/t7xx_dpmaif.c

597

value |= FIELD_PREP(DPMAIF_PIT_CHK_NUM_MSK, DPMAIF_HW_CHK_PIT_NUM);

drivers/net/wwan/t7xx/t7xx_dpmaif.c

607

value |= FIELD_PREP(DPMAIF_BAT_REMAIN_MINSZ_MSK,

drivers/net/wwan/t7xx/t7xx_dpmaif.c

618

value |= FIELD_PREP(DPMAIF_BAT_BUF_SZ_MSK,

drivers/net/wwan/t7xx/t7xx_dpmaif.c

668

value |= FIELD_PREP(DPMAIF_FRG_BUF_SZ_MSK,

drivers/net/wwan/t7xx/t7xx_dpmaif.c

693

value |= FIELD_PREP(DPMAIF_BAT_CHECK_THRES_MSK, DPMAIF_HW_CHK_BAT_NUM);

drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c

198

drb->header = cpu_to_le32(FIELD_PREP(DRB_HDR_DTYP, DES_DTYP_MSG) |

drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c

199

FIELD_PREP(DRB_HDR_CONT, 1) |

drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c

200

FIELD_PREP(DRB_HDR_DATA_LEN, pkt_len));

drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c

202

drb->msg.msg_hdr = cpu_to_le32(FIELD_PREP(DRB_MSG_COUNT_L, count_l) |

drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c

203

FIELD_PREP(DRB_MSG_CHANNEL_ID, channel_id) |

drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c

204

FIELD_PREP(DRB_MSG_L4_CHK, 1));

drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c

215

header = FIELD_PREP(DRB_HDR_DTYP, DES_DTYP_PD) | FIELD_PREP(DRB_HDR_DATA_LEN, pkt_size);

drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c

217

header |= FIELD_PREP(DRB_HDR_CONT, 1);

drivers/net/wwan/t7xx/t7xx_modem_ops.c

190

value |= FIELD_PREP(HOST_EVENT_MASK, event_id);

drivers/net/wwan/t7xx/t7xx_modem_ops.c

698

FIELD_PREP(FEATURE_MSK, MTK_FEATURE_MUST_BE_SUPPORTED);

drivers/net/wwan/t7xx/t7xx_modem_ops.c

703

FIELD_PREP(FEATURE_MSK, MTK_FEATURE_MUST_BE_SUPPORTED);

drivers/net/wwan/t7xx/t7xx_port_proxy.c

290

status = FIELD_PREP(CCCI_H_CHN_FLD, port_conf->tx_ch) |

drivers/net/wwan/t7xx/t7xx_port_proxy.c

291

FIELD_PREP(CCCI_H_SEQ_FLD, port->seq_nums[MTK_TX]) | CCCI_H_AST_BIT;

drivers/net/wwan/t7xx/t7xx_state_monitor.c

594

cmd_flags |= FIELD_PREP(FSM_CMD_EX_REASON, EXCEPTION_EVENT);

drivers/nvmem/meson-mx-efuse.c

95

regval = FIELD_PREP(MESON_MX_EFUSE_CNTL1_BYTE_ADDR_MASK, addr);

drivers/nvmem/microchip-otpc.c

81

tmp |= FIELD_PREP(MCHP_OTPC_MR_ADDR, offset);

drivers/nvmem/sunplus-ocotp.c

40

#define CPU_CLOCK FIELD_PREP(OTP_RD_PERIOD, 30)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

110

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_DEVFN_MASK, devfn)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

113

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_PCI_ADDR0_BUS_MASK, bus)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

122

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x0)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

124

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x2)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

126

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x4)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

128

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x5)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

130

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC0_TYPE_MASK, 0x10)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

136

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC1_BUS_MASK, bus)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

139

FIELD_PREP(CDNS_PCIE_HPA_AT_OB_REGION_DESC1_DEVFN_MASK, devfn)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

172

FIELD_PREP(CDNS_PCIE_HPA_DETECT_QUIET_MIN_DELAY_MASK, delay)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

58

FIELD_PREP(CDNS_PCIE_HPA_LM_RC_BAR_CFG_BAR0_APERTURE_MASK, a)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

61

FIELD_PREP(CDNS_PCIE_HPA_LM_RC_BAR_CFG_BAR0_CTRL_MASK, c)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

64

FIELD_PREP(CDNS_PCIE_HPA_LM_RC_BAR_CFG_BAR1_APERTURE_MASK, a)

drivers/pci/controller/cadence/pcie-cadence-hpa-regs.h

67

FIELD_PREP(CDNS_PCIE_HPA_LM_RC_BAR_CFG_BAR1_CTRL_MASK, c)

drivers/pci/controller/dwc/pci-imx6.c

1097

data1 = FIELD_PREP(IMX95_PE0_LUT_DAC_ID, 0);

drivers/pci/controller/dwc/pci-imx6.c

1098

data1 |= FIELD_PREP(IMX95_PE0_LUT_STREAM_ID, sid);

drivers/pci/controller/dwc/pci-imx6.c

1106

data2 |= FIELD_PREP(IMX95_PE0_LUT_REQID, rid);

drivers/pci/controller/dwc/pci-imx6.c

193

#define PCIE_PHY_CTRL_DATA(x) FIELD_PREP(GENMASK(15, 0), (x))

drivers/pci/controller/dwc/pcie-al.c

209

reg = FIELD_PREP(CFG_TARGET_BUS_MASK_MASK, mask_target_bus) |

drivers/pci/controller/dwc/pcie-al.c

210

FIELD_PREP(CFG_TARGET_BUS_BUSNUM_MASK, target_bus);

drivers/pci/controller/dwc/pcie-al.c

292

reg |= FIELD_PREP(CFG_CONTROL_SUBBUS_MASK, subordinate_bus) |

drivers/pci/controller/dwc/pcie-al.c

293

FIELD_PREP(CFG_CONTROL_SEC_BUS_MASK, secondary_bus);

drivers/pci/controller/dwc/pcie-amd-mdb.c

104

val = FIELD_PREP(AMD_MDB_TLP_PCIE_INTX_MASK,

drivers/pci/controller/dwc/pcie-amd-mdb.c

84

val = FIELD_PREP(AMD_MDB_TLP_PCIE_INTX_MASK,

drivers/pci/controller/dwc/pcie-designware-debugfs.c

218

val |= FIELD_PREP(LANE_SELECT, lane);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

289

val |= FIELD_PREP(EINJ_COUNT, counter);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

293

val |= FIELD_PREP(EINJ_VAL_DIFF, val_diff);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

297

val |= FIELD_PREP(EINJ_VC_NUM, vc_num);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

315

val |= FIELD_PREP(EVENT_COUNTER_GROUP_SELECT, event_list[pdata->idx].group_no);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

316

val |= FIELD_PREP(EVENT_COUNTER_EVENT_SELECT, event_list[pdata->idx].event_no);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

359

val |= FIELD_PREP(EVENT_COUNTER_ENABLE, PER_EVENT_ON);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

361

val |= FIELD_PREP(EVENT_COUNTER_ENABLE, PER_EVENT_OFF);

drivers/pci/controller/dwc/pcie-designware-debugfs.c

420

val |= FIELD_PREP(EVENT_COUNTER_LANE_SELECT, lane);

drivers/pci/controller/dwc/pcie-designware-ep.c

711

val |= FIELD_PREP(PCI_MSI_FLAGS_QMASK, mmc);

drivers/pci/controller/dwc/pcie-designware.c

942

lnkcap |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, num_lanes);

drivers/pci/controller/dwc/pcie-designware.h

110

#define PORT_LOGIC_LINK_WIDTH(n) FIELD_PREP(PORT_LOGIC_LINK_WIDTH_MASK, n)

drivers/pci/controller/dwc/pcie-designware.h

188

#define PCIE_ATU_BUS(x) FIELD_PREP(GENMASK(31, 24), x)

drivers/pci/controller/dwc/pcie-designware.h

189

#define PCIE_ATU_DEV(x) FIELD_PREP(GENMASK(23, 19), x)

drivers/pci/controller/dwc/pcie-designware.h

190

#define PCIE_ATU_FUNC(x) FIELD_PREP(GENMASK(18, 16), x)

drivers/pci/controller/dwc/pcie-designware.h

76

#define PORT_AFR_N_FTS(n) FIELD_PREP(PORT_AFR_N_FTS_MASK, n)

drivers/pci/controller/dwc/pcie-designware.h

78

#define PORT_AFR_CC_N_FTS(n) FIELD_PREP(PORT_AFR_CC_N_FTS_MASK, n)

drivers/pci/controller/dwc/pcie-designware.h

89

#define PORT_LINK_MODE(n) FIELD_PREP(PORT_LINK_MODE_MASK, n)

drivers/pci/controller/dwc/pcie-keembay.c

215

val = FIELD_PREP(LJPLL_REF_DIV, 0) | FIELD_PREP(LJPLL_FB_DIV, 0x32);

drivers/pci/controller/dwc/pcie-keembay.c

218

val = FIELD_PREP(LJPLL_POST_DIV3A, 0x2) |

drivers/pci/controller/dwc/pcie-keembay.c

219

FIELD_PREP(LJPLL_POST_DIV2A, 0x2);

drivers/pci/controller/dwc/pcie-keembay.c

222

val = FIELD_PREP(LJPLL_EN, 0x1) | FIELD_PREP(LJPLL_FOUT_EN, 0xc);

drivers/pci/controller/dwc/pcie-nxp-s32g.c

143

val |= FIELD_PREP(DEVICE_TYPE_MASK, PCI_EXP_TYPE_ROOT_PORT);

drivers/pci/controller/dwc/pcie-qcom-common.c

34

reg |= FIELD_PREP(GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK,

drivers/pci/controller/dwc/pcie-qcom-common.c

43

reg |= FIELD_PREP(GEN3_EQ_FMDC_T_MIN_PHASE23, 0x1) |

drivers/pci/controller/dwc/pcie-qcom-common.c

44

FIELD_PREP(GEN3_EQ_FMDC_N_EVALS, 0xd) |

drivers/pci/controller/dwc/pcie-qcom-common.c

45

FIELD_PREP(GEN3_EQ_FMDC_MAX_PRE_CURSOR_DELTA, 0x5) |

drivers/pci/controller/dwc/pcie-qcom-common.c

46

FIELD_PREP(GEN3_EQ_FMDC_MAX_POST_CURSOR_DELTA, 0x5);

drivers/pci/controller/dwc/pcie-qcom-common.c

68

reg |= FIELD_PREP(MARGINING_MAX_VOLTAGE_OFFSET, 0x24) |

drivers/pci/controller/dwc/pcie-qcom-common.c

69

FIELD_PREP(MARGINING_NUM_VOLTAGE_STEPS, 0x78) |

drivers/pci/controller/dwc/pcie-qcom-common.c

70

FIELD_PREP(MARGINING_MAX_TIMING_OFFSET, 0x32) |

drivers/pci/controller/dwc/pcie-qcom-common.c

71

FIELD_PREP(MARGINING_NUM_TIMING_STEPS, 0x10);

drivers/pci/controller/dwc/pcie-qcom-common.c

83

reg |= FIELD_PREP(MARGINING_MAXLANES, pci->num_lanes) |

drivers/pci/controller/dwc/pcie-qcom-common.c

84

FIELD_PREP(MARGINING_SAMPLE_RATE_TIMING, 0x3f) |

drivers/pci/controller/dwc/pcie-qcom-common.c

85

FIELD_PREP(MARGINING_SAMPLE_RATE_VOLTAGE, 0x3f);

drivers/pci/controller/dwc/pcie-qcom-ep.c

498

val |= FIELD_PREP(PCI_EXP_LNKCAP_L0SEL, 0x6);

drivers/pci/controller/dwc/pcie-qcom-ep.c

505

val |= FIELD_PREP(PCI_EXP_LNKCAP_L1EL, 0x6);

drivers/pci/controller/dwc/pcie-qcom.c

101

#define PCS_DEEMPH_TX_DEEMPH_GEN1(x) FIELD_PREP(GENMASK(21, 16), x)

drivers/pci/controller/dwc/pcie-qcom.c

102

#define PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(x) FIELD_PREP(GENMASK(13, 8), x)

drivers/pci/controller/dwc/pcie-qcom.c

103

#define PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(x) FIELD_PREP(GENMASK(5, 0), x)

drivers/pci/controller/dwc/pcie-qcom.c

106

#define PCS_SWING_TX_SWING_FULL(x) FIELD_PREP(GENMASK(14, 8), x)

drivers/pci/controller/dwc/pcie-qcom.c

107

#define PCS_SWING_TX_SWING_LOW(x) FIELD_PREP(GENMASK(6, 0), x)

drivers/pci/controller/dwc/pcie-qcom.c

111

#define PHY_CTRL_PHY_TX0_TERM_OFFSET(x) FIELD_PREP(PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK, x)

drivers/pci/controller/dwc/pcie-qcom.c

119

#define PHY_RX0_EQ(x) FIELD_PREP(GENMASK(26, 24), x)

drivers/pci/controller/dwc/pcie-qcom.c

156

#define PCIE_CAP_SLOT_POWER_LIMIT_VAL FIELD_PREP(PCI_EXP_SLTCAP_SPLV, 250)

drivers/pci/controller/dwc/pcie-qcom.c

157

#define PCIE_CAP_SLOT_POWER_LIMIT_SCALE FIELD_PREP(PCI_EXP_SLTCAP_SPLS, 1)

drivers/pci/controller/dwc/pcie-sophgo.c

74

val &= ~FIELD_PREP(PCIE_INT_EN_INTX, BIT(d->hwirq));

drivers/pci/controller/dwc/pcie-sophgo.c

91

val |= FIELD_PREP(PCIE_INT_EN_INTX, BIT(d->hwirq));

drivers/pci/controller/dwc/pcie-tegra194.c

486

val = FIELD_PREP(PCI_LTR_VALUE_MASK, 110) |

drivers/pci/controller/dwc/pcie-tegra194.c

487

FIELD_PREP(PCI_LTR_SCALE_MASK, 2) |

drivers/pci/controller/dwc/pcie-tegra194.c

489

FIELD_PREP(PCI_LTR_NOSNOOP_VALUE, 110) |

drivers/pci/controller/dwc/pcie-tegra194.c

490

FIELD_PREP(PCI_LTR_NOSNOOP_SCALE, 2) |

drivers/pci/controller/dwc/pcie-tegra194.c

849

val |= FIELD_PREP(GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC, 0x3ff);

drivers/pci/controller/dwc/pcie-tegra194.c

860

val |= FIELD_PREP(GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC,

drivers/pci/controller/dwc/pcie-uniphier-ep.c

247

val = FIELD_PREP(PCL_APP_VEN_MSI_TC_MASK, func_no)

drivers/pci/controller/dwc/pcie-uniphier-ep.c

248

| FIELD_PREP(PCL_APP_VEN_MSI_VECTOR_MASK, interrupt_num - 1);

drivers/pci/controller/pci-aardvark.c

1073

bridge->pcie_conf.slotcap = cpu_to_le32(FIELD_PREP(PCI_EXP_SLTCAP_PSN,

drivers/pci/controller/pci-mvebu.c

267

lnkcap |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, port->is_x4 ? 4 : 1);

drivers/pci/controller/pci-mvebu.c

941

FIELD_PREP(PCI_EXP_SLTCAP_SPLV, port->slot_power_limit_value) |

drivers/pci/controller/pci-mvebu.c

942

FIELD_PREP(PCI_EXP_SLTCAP_SPLS, port->slot_power_limit_scale) |

drivers/pci/controller/pci-mvebu.c

943

FIELD_PREP(PCI_EXP_SLTCAP_PSN, port->port+1));

drivers/pci/controller/pci-thunder-pem.c

375

res_pem->start = PEM_RES_BASE | FIELD_PREP(PEM_NODE_MASK, node) |

drivers/pci/controller/pci-thunder-pem.c

376

FIELD_PREP(PEM_INDX_MASK, index);

drivers/pci/controller/pci-xgene-msi.c

103

FIELD_PREP(MSI_INTR_MASK, msi_grp));

drivers/pci/controller/pci-xgene-msi.c

124

return (FIELD_PREP(BIT(7), FIELD_GET(BIT(3), frame)) |

drivers/pci/controller/pci-xgene-msi.c

125

FIELD_PREP(MSInRx_HWIRQ_MASK, index) |

drivers/pci/controller/pci-xgene-msi.c

126

FIELD_PREP(DATA_HWIRQ_MASK, data));

drivers/pci/controller/pci-xgene-msi.c

138

frame = FIELD_PREP(BIT(3), FIELD_GET(BIT(7), data->hwirq)) | cpu;

drivers/pci/controller/pci-xgene-msi.c

141

target_addr += (FIELD_PREP(MSI_GROUP_MASK, frame) |

drivers/pci/controller/pci-xgene-msi.c

142

FIELD_PREP(MSI_INTR_MASK, msir));

drivers/pci/controller/pci-xgene-msi.c

95

(FIELD_PREP(MSI_GROUP_MASK, msi_grp) |

drivers/pci/controller/pci-xgene-msi.c

96

FIELD_PREP(MSI_INDEX_MASK, msir_idx)));

drivers/pci/controller/pcie-altera.c

542

where |= FIELD_PREP(AGLX_CFG_TARGET, AGLX_CFG_TARGET_TYPE1);

drivers/pci/controller/pcie-altera.c

564

where |= FIELD_PREP(AGLX_CFG_TARGET, AGLX_CFG_TARGET_TYPE1);

drivers/pci/controller/pcie-apple.c

435

writel_relaxed(FIELD_PREP(PORT_MSIMAP_TARGET, i) |

drivers/pci/controller/pcie-aspeed.c

113

#define ASPEED_RC0_DECODE_DMA_BASE(x) FIELD_PREP(GENMASK(7, 0), x)

drivers/pci/controller/pcie-aspeed.c

114

#define ASPEED_RC0_DECODE_DMA_LIMIT(x) FIELD_PREP(GENMASK(15, 8), x)

drivers/pci/controller/pcie-aspeed.c

115

#define ASPEED_RC1_DECODE_DMA_BASE(x) FIELD_PREP(GENMASK(23, 16), x)

drivers/pci/controller/pcie-aspeed.c

116

#define ASPEED_RC1_DECODE_DMA_LIMIT(x) FIELD_PREP(GENMASK(31, 24), x)

drivers/pci/controller/pcie-aspeed.c

128

FIELD_PREP(ASPEED_TLP_COMMON_FIELDS, \

drivers/pci/controller/pcie-aspeed.c

132

FIELD_PREP(ASPEED_TLP_COMMON_FIELDS, \

drivers/pci/controller/pcie-aspeed.c

136

FIELD_PREP(ASPEED_TLP_COMMON_FIELDS, \

drivers/pci/controller/pcie-aspeed.c

140

FIELD_PREP(ASPEED_TLP_COMMON_FIELDS, \

drivers/pci/controller/pcie-aspeed.c

346

FIELD_PREP(GENMASK(11, 8), pcie->tx_tag) |

drivers/pci/controller/pcie-aspeed.c

508

FIELD_PREP(GENMASK(11, 8), pcie->tx_tag) |

drivers/pci/controller/pcie-aspeed.c

56

#define ASPEED_AHB_MASK_LO_ADDR(x) FIELD_PREP(GENMASK(31, 20), x)

drivers/pci/controller/pcie-aspeed.c

87

FIELD_PREP(ASPEED_CFGI_BYTE_EN_MASK, (x))

drivers/pci/controller/pcie-brcmstb.c

394

pkt |= FIELD_PREP(MDIO_PORT_EXT_MASK, port >> 4);

drivers/pci/controller/pcie-brcmstb.c

395

pkt |= FIELD_PREP(MDIO_PORT_MASK, port);

drivers/pci/controller/pcie-brcmstb.c

396

pkt |= FIELD_PREP(MDIO_REGAD_MASK, regad);

drivers/pci/controller/pcie-brcmstb.c

397

pkt |= FIELD_PREP(MDIO_CMD_MASK, cmd);

drivers/pci/controller/pcie-mediatek-gen3.c

1004

val = FIELD_PREP(PCIE_VAL_LN0_DOWNSTREAM, 0x47) |

drivers/pci/controller/pcie-mediatek-gen3.c

1005

FIELD_PREP(PCIE_VAL_LN1_DOWNSTREAM, 0x47) |

drivers/pci/controller/pcie-mediatek-gen3.c

1006

FIELD_PREP(PCIE_VAL_LN0_UPSTREAM, 0x41) |

drivers/pci/controller/pcie-mediatek-gen3.c

1007

FIELD_PREP(PCIE_VAL_LN1_UPSTREAM, 0x41);

drivers/pci/controller/pcie-mediatek-gen3.c

1011

FIELD_PREP(PCIE_K_PRESET_TO_USE_16G, 0x80) |

drivers/pci/controller/pcie-mediatek-gen3.c

1012

FIELD_PREP(PCIE_K_PRESET_TO_USE, 0x2) |

drivers/pci/controller/pcie-mediatek-gen3.c

1013

FIELD_PREP(PCIE_K_FINETUNE_MAX, 0xf);

drivers/pci/controller/pcie-mediatek-gen3.c

422

val |= FIELD_PREP(PCIE_SETTING_GEN_SUPPORT,

drivers/pci/controller/pcie-mediatek-gen3.c

430

val |= FIELD_PREP(PCIE_SETTING_LINK_WIDTH,

drivers/pci/controller/pcie-mediatek-gen3.c

439

val |= FIELD_PREP(PCIE_CONF_LINK2_LCR2_LINK_SPEED, pcie->max_link_speed);

drivers/pci/controller/pcie-rockchip-host.c

274

status |= FIELD_PREP(PCI_EXP_DEVCAP_PWR_VAL, power);

drivers/pci/controller/pcie-rockchip-host.c

275

status |= FIELD_PREP(PCI_EXP_DEVCAP_PWR_SCL, scale);

drivers/pci/controller/pcie-rzg3s-host.c

1002

FIELD_PREP(RZG3S_PCI_PCCTRL2_LS_CHG,

drivers/pci/controller/pcie-rzg3s-host.c

1552

FIELD_PREP(RZG3S_SYS_PCIE_RST_RSM_B_MASK, 1));

drivers/pci/controller/pcie-rzg3s-host.c

1607

FIELD_PREP(RZG3S_SYS_PCIE_RST_RSM_B_MASK, 0));

drivers/pci/controller/pcie-rzg3s-host.c

1640

FIELD_PREP(RZG3S_SYS_PCIE_RST_RSM_B_MASK, 0));

drivers/pci/controller/pcie-rzg3s-host.c

1668

FIELD_PREP(RZG3S_SYS_PCIE_RST_RSM_B_MASK, 1));

drivers/pci/controller/pcie-rzg3s-host.c

1699

FIELD_PREP(RZG3S_SYS_PCIE_RST_RSM_B_MASK, 0));

drivers/pci/controller/pcie-rzg3s-host.c

303

writel_relaxed(FIELD_PREP(RZG3S_PCI_REQADR1_BUS, bus->number) |

drivers/pci/controller/pcie-rzg3s-host.c

304

FIELD_PREP(RZG3S_PCI_REQADR1_DEV, dev) |

drivers/pci/controller/pcie-rzg3s-host.c

305

FIELD_PREP(RZG3S_PCI_REQADR1_FUNC, func) |

drivers/pci/controller/pcie-rzg3s-host.c

306

FIELD_PREP(RZG3S_PCI_REQADR1_REG, reg),

drivers/pci/controller/pcie-rzg3s-host.c

56

#define RZG3S_PCI_REQISS_TR_TP0_RD FIELD_PREP(RZG3S_PCI_REQISS_TR_TYPE, 0x4)

drivers/pci/controller/pcie-rzg3s-host.c

57

#define RZG3S_PCI_REQISS_TR_TP0_WR FIELD_PREP(RZG3S_PCI_REQISS_TR_TYPE, 0x5)

drivers/pci/controller/pcie-rzg3s-host.c

58

#define RZG3S_PCI_REQISS_TR_TP1_RD FIELD_PREP(RZG3S_PCI_REQISS_TR_TYPE, 0x6)

drivers/pci/controller/pcie-rzg3s-host.c

59

#define RZG3S_PCI_REQISS_TR_TP1_WR FIELD_PREP(RZG3S_PCI_REQISS_TR_TYPE, 0x7)

drivers/pci/controller/pcie-rzg3s-host.c

657

writel_relaxed(FIELD_PREP(RZG3S_PCI_MSIRCVWMSKL_MASK,

drivers/pci/controller/pcie-rzg3s-host.c

995

FIELD_PREP(PCI_EXP_LNKCTL2_TLS, link_speed));

drivers/pci/controller/plda/pcie-microchip-host.c

312

reg |= FIELD_PREP(PCI_MSI_FLAGS_QSIZE, queue_size);

drivers/pci/controller/plda/pcie-microchip-host.c

629

val |= FIELD_PREP(ATR_SIZE_MASK, atr_sz);

drivers/pci/controller/plda/pcie-plda-host.c

507

val |= FIELD_PREP(ATR_SIZE_MASK, atr_sz);

drivers/pci/controller/plda/pcie-starfive.c

299

FIELD_PREP(STG_SYSCON_CKREF_SRC_MASK, 2));

drivers/pci/controller/plda/pcie-starfive.c

37

#define STG_SYSCON_AXI4_SLVL_PHY_AR(x) FIELD_PREP(GENMASK(20, 17), x)

drivers/pci/controller/plda/pcie-starfive.c

40

#define STG_SYSCON_AXI4_SLVL_PHY_AW(x) FIELD_PREP(GENMASK(12, 9), x)

drivers/pci/doe.c

337

val = FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_1_VID, task->feat.vid) |

drivers/pci/doe.c

338

FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_1_TYPE, task->feat.type);

drivers/pci/doe.c

341

FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_2_LENGTH,

drivers/pci/doe.c

552

u32 request_pl = FIELD_PREP(PCI_DOE_DATA_OBJECT_DISC_REQ_3_INDEX,

drivers/pci/doe.c

554

FIELD_PREP(PCI_DOE_DATA_OBJECT_DISC_REQ_3_VER,

drivers/pci/hotplug/pciehp_core.c

107

status = FIELD_PREP(PCI_EXP_SLTCTL_AIC, status);

drivers/pci/hotplug/pciehp_hpc.c

492

pcie_write_cmd_nowait(ctrl, FIELD_PREP(PCI_EXP_SLTCTL_AIC | PCI_EXP_SLTCTL_PIC, status),

drivers/pci/hotplug/pnv_php.c

478

new = FIELD_PREP(PCI_EXP_SLTCTL_AIC, state);

drivers/pci/ide.c

174

val |= FIELD_PREP(PCI_IDE_SEL_CTL_ID, PCI_IDE_RESERVED_STREAM_ID);

drivers/pci/ide.c

186

val |= FIELD_PREP(PCI_IDE_LINK_CTL_ID, PCI_IDE_RESERVED_STREAM_ID);

drivers/pci/ide.c

520

u32 val = FIELD_PREP(PCI_IDE_SEL_CTL_ID, ide->stream_id) |

drivers/pci/ide.c

521

FIELD_PREP(PCI_IDE_SEL_CTL_DEFAULT, settings->default_stream) |

drivers/pci/ide.c

522

FIELD_PREP(PCI_IDE_SEL_CTL_CFG_EN, pdev->ide_cfg) |

drivers/pci/ide.c

523

FIELD_PREP(PCI_IDE_SEL_CTL_TEE_LIMITED, pdev->ide_tee_limit) |

drivers/pci/ide.c

524

FIELD_PREP(PCI_IDE_SEL_CTL_EN, enable);

drivers/pci/ide.c

532

(FIELD_PREP(PCI_IDE_SEL_ADDR_1_VALID, 1) | \

drivers/pci/ide.c

533

FIELD_PREP(PCI_IDE_SEL_ADDR_1_BASE_LOW, \

drivers/pci/ide.c

535

FIELD_PREP(PCI_IDE_SEL_ADDR_1_LIMIT_LOW, \

drivers/pci/ide.c

566

regs->rid1 = FIELD_PREP(PCI_IDE_SEL_RID_1_LIMIT, settings->rid_end);

drivers/pci/ide.c

568

regs->rid2 = FIELD_PREP(PCI_IDE_SEL_RID_2_VALID, 1) |

drivers/pci/ide.c

569

FIELD_PREP(PCI_IDE_SEL_RID_2_BASE, settings->rid_start) |

drivers/pci/ide.c

570

FIELD_PREP(PCI_IDE_SEL_RID_2_SEG, pci_ide_domain(pdev));

drivers/pci/iov.c

950

ctrl |= FIELD_PREP(PCI_VF_REBAR_CTRL_BAR_SIZE, size);

drivers/pci/msi/msi.c

195

msgctl |= FIELD_PREP(PCI_MSI_FLAGS_QSIZE, desc->pci.msi_attrib.multiple);

drivers/pci/msi/msi.c

527

FIELD_PREP(PCI_MSI_FLAGS_QSIZE, entry->pci.msi_attrib.multiple);

drivers/pci/msi/msi.c

964

msi_desc->pci.msix_ctrl |= FIELD_PREP(PCI_MSIX_ENTRY_CTRL_ST, tag);

drivers/pci/of_property.c

58

prop[0] = FIELD_PREP(OF_PCI_ADDR_FIELD_BUS, pdev->bus->number) |

drivers/pci/of_property.c

59

FIELD_PREP(OF_PCI_ADDR_FIELD_DEV, PCI_SLOT(pdev->devfn)) |

drivers/pci/of_property.c

60

FIELD_PREP(OF_PCI_ADDR_FIELD_FUNC, PCI_FUNC(pdev->devfn));

drivers/pci/of_property.c

89

*flags |= FIELD_PREP(OF_PCI_ADDR_FIELD_SS, ss);

drivers/pci/pci.c

5770

cmd |= FIELD_PREP(PCI_X_CMD_MAX_READ, v);

drivers/pci/pci.c

5827

v = FIELD_PREP(PCI_EXP_DEVCTL_READRQ, firstbit - 8);

drivers/pci/pci.c

5880

v = FIELD_PREP(PCI_EXP_DEVCTL_PAYLOAD, v);

drivers/pci/pcie/aspm.c

660

ctl2 |= FIELD_PREP(PCI_L1SS_CTL2_T_PWR_ON_SCALE, scale1) |

drivers/pci/pcie/aspm.c

661

FIELD_PREP(PCI_L1SS_CTL2_T_PWR_ON_VALUE, val1);

drivers/pci/pcie/aspm.c

664

ctl2 |= FIELD_PREP(PCI_L1SS_CTL2_T_PWR_ON_SCALE, scale2) |

drivers/pci/pcie/aspm.c

665

FIELD_PREP(PCI_L1SS_CTL2_T_PWR_ON_VALUE, val2);

drivers/pci/pcie/aspm.c

681

ctl1 |= FIELD_PREP(PCI_L1SS_CTL1_CM_RESTORE_TIME, t_common_mode) |

drivers/pci/pcie/aspm.c

682

FIELD_PREP(PCI_L1SS_CTL1_LTR_L12_TH_VALUE, value) |

drivers/pci/pcie/aspm.c

683

FIELD_PREP(PCI_L1SS_CTL1_LTR_L12_TH_SCALE, scale);

drivers/pci/pcie/ptm.c

174

ctrl |= FIELD_PREP(PCI_PTM_GRANULARITY_MASK, dev->ptm_granularity);

drivers/pci/probe.c

1537

FIELD_PREP(PCI_PRIMARY_BUS_MASK, child->primary) |

drivers/pci/probe.c

1538

FIELD_PREP(PCI_SECONDARY_BUS_MASK, child->busn_res.start) |

drivers/pci/probe.c

1539

FIELD_PREP(PCI_SUBORDINATE_BUS_MASK, child->busn_res.end);

drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c

35

#define TC9563_ETH_L1_DELAY_VALUE(x) FIELD_PREP(TC9563_ETH_L1_DELAY_MASK, x)

drivers/pci/pwrctrl/pci-pwrctrl-tc9563.c

37

#define TC9563_ETH_L0S_DELAY_VALUE(x) FIELD_PREP(TC9563_ETH_L0S_DELAY_MASK, x)

drivers/pci/quirks.c

6261

dev->devcap |= FIELD_PREP(PCI_EXP_DEVCAP_L1, 7);

drivers/pci/rebar.c

215

ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size);

drivers/pci/rebar.c

245

ctrl |= FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size);

drivers/pci/setup-cardbus.c

248

FIELD_PREP(PCI_PRIMARY_BUS_MASK, child->primary) |

drivers/pci/setup-cardbus.c

249

FIELD_PREP(PCI_SECONDARY_BUS_MASK, child->busn_res.start) |

drivers/pci/setup-cardbus.c

250

FIELD_PREP(PCI_SUBORDINATE_BUS_MASK, child->busn_res.end);

drivers/pci/setup-cardbus.c

257

buses |= FIELD_PREP(PCI_SEC_LATENCY_TIMER_MASK, CARDBUS_LATENCY_TIMER);

drivers/pci/tph.c

143

reg |= FIELD_PREP(PCI_TPH_CTRL_REQ_EN_MASK, req_type);

drivers/pci/tph.c

190

loc = FIELD_PREP(PCI_TPH_CAP_LOC_MASK, loc);

drivers/pci/tph.c

314

loc = FIELD_PREP(PCI_TPH_CAP_LOC_MASK, loc);

drivers/pci/tph.c

422

reg |= FIELD_PREP(PCI_TPH_CTRL_MODE_SEL_MASK, pdev->tph_mode);

drivers/pci/tph.c

425

reg |= FIELD_PREP(PCI_TPH_CTRL_REQ_EN_MASK, pdev->tph_req_type);

drivers/peci/controller/peci-aspeed.c

160

val = FIELD_PREP(ASPEED_PECI_TIMING_NEGO_SEL_MASK, ASPEED_PECI_1ST_BIT_OF_ADDR_NEGO);

drivers/peci/controller/peci-aspeed.c

164

val = FIELD_PREP(ASPEED_PECI_CTRL_SAMPLING_MASK, ASPEED_PECI_RD_SAMPLING_POINT_DEFAULT);

drivers/peci/controller/peci-aspeed.c

230

peci_head = FIELD_PREP(ASPEED_PECI_TARGET_ADDR_MASK, addr) |

drivers/peci/controller/peci-aspeed.c

231

FIELD_PREP(ASPEED_PECI_WR_LEN_MASK, req->tx.len) |

drivers/peci/controller/peci-aspeed.c

232

FIELD_PREP(ASPEED_PECI_RD_LEN_MASK, req->rx.len);

drivers/peci/controller/peci-aspeed.c

355

val |= FIELD_PREP(ASPEED_PECI_CTRL_CLK_DIV_MASK, clk_div_exp);

drivers/peci/controller/peci-aspeed.c

358

val = FIELD_PREP(ASPEED_PECI_T_NEGO_MSG_MASK, msg_timing);

drivers/peci/controller/peci-aspeed.c

359

val |= FIELD_PREP(ASPEED_PECI_T_NEGO_ADDR_MASK, msg_timing);

drivers/perf/alibaba_uncore_drw_pmu.c

342

subval = FIELD_PREP(ALI_DRW_PMCOM_CNT_EN, 1) |

drivers/perf/alibaba_uncore_drw_pmu.c

343

FIELD_PREP(ALI_DRW_PMCOM_CNT_EVENT_MASK, drw_pmu->evtids[counter]);

drivers/perf/alibaba_uncore_drw_pmu.c

360

subval = FIELD_PREP(ALI_DRW_PMCOM_CNT_EN, 0) |

drivers/perf/alibaba_uncore_drw_pmu.c

361

FIELD_PREP(ALI_DRW_PMCOM_CNT_EVENT_MASK, 0);

drivers/perf/alibaba_uncore_drw_pmu.c

403

clr_status = FIELD_PREP(ALI_DRW_PMCOM_CNT_OV_INTR_MASK, status);

drivers/perf/apple_m1_cpu_pmu.c

531

val |= FIELD_PREP(PMCR0_IMODE, mode);

drivers/perf/arm-cmn.c

1407

config = FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_DEV_SEL, dev) |

drivers/perf/arm-cmn.c

1408

FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_CHN_SEL, chn) |

drivers/perf/arm-cmn.c

1409

FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_GRP, grp) |

drivers/perf/arm-cmn.c

1410

FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_DEV_SEL2, dev >> 1);

drivers/perf/arm-cmn.c

1536

reg = FIELD_PREP(CMN__PMU_CBUSY_SNTHROTTLE_SEL,

drivers/perf/arm-cmn.c

1538

FIELD_PREP(CMN__PMU_SN_HOME_SEL,

drivers/perf/arm-cmn.c

1540

FIELD_PREP(CMN__PMU_HBT_LBT_SEL,

drivers/perf/arm-cmn.c

1542

FIELD_PREP(CMN__PMU_CLASS_OCCUP_ID,

drivers/perf/arm-cmn.c

1544

FIELD_PREP(CMN__PMU_OCCUP1_ID,

drivers/perf/arm-cmn.c

1955

dtm->pmu_config_low |= FIELD_PREP(CMN__PMEVCNT0_GLOBAL_NUM, hw->dtc_idx[d]) << shift;

drivers/perf/arm-ni.c

453

reg = FIELD_PREP(NI_PMEVTYPER_NODE_TYPE, type) |

drivers/perf/arm-ni.c

454

FIELD_PREP(NI_PMEVTYPER_NODE_ID, NI_EVENT_NODEID(event));

drivers/perf/arm_brbe.c

26

#define BRBCR_ELx_DEFAULT_TS FIELD_PREP(BRBCR_ELx_TS_MASK, BRBCR_ELx_TS_VIRTUAL)

drivers/perf/arm_cspmu/arm_cspmu.c

366

pmiidr |= FIELD_PREP(PMIIDR_PRODUCTID_PART_0,

drivers/perf/arm_cspmu/arm_cspmu.c

370

pmiidr |= FIELD_PREP(PMIIDR_PRODUCTID_PART_1,

drivers/perf/arm_cspmu/arm_cspmu.c

372

pmiidr |= FIELD_PREP(PMIIDR_IMPLEMENTER_DES_0,

drivers/perf/arm_cspmu/arm_cspmu.c

376

pmiidr |= FIELD_PREP(PMIIDR_VARIANT,

drivers/perf/arm_cspmu/arm_cspmu.c

378

pmiidr |= FIELD_PREP(PMIIDR_IMPLEMENTER_DES_1,

drivers/perf/arm_cspmu/arm_cspmu.c

382

pmiidr |= FIELD_PREP(PMIIDR_REVISION,

drivers/perf/arm_cspmu/arm_cspmu.c

386

pmiidr |= FIELD_PREP(PMIIDR_IMPLEMENTER_DES_2,

drivers/perf/arm_dmc620_pmu.c

283

reg |= FIELD_PREP(DMC620_PMU_COUNTERn_CONTROL_INVERT,

drivers/perf/arm_dmc620_pmu.c

285

reg |= FIELD_PREP(DMC620_PMU_COUNTERn_CONTROL_EVENT_MUX,

drivers/perf/arm_dmc620_pmu.c

287

reg |= FIELD_PREP(DMC620_PMU_COUNTERn_CONTROL_INCR_MUX,

drivers/perf/arm_pmuv3.c

1149

config_base |= FIELD_PREP(ARMV8_PMU_EVTYPE_TH, th);

drivers/perf/arm_pmuv3.c

1150

config_base |= FIELD_PREP(ARMV8_PMU_EVTYPE_TC,

drivers/perf/arm_smmuv3_pmu.c

838

iidr = FIELD_PREP(SMMU_PMCG_IIDR_PRODUCTID, productid) |

drivers/perf/arm_smmuv3_pmu.c

839

FIELD_PREP(SMMU_PMCG_IIDR_VARIANT, variant) |

drivers/perf/arm_smmuv3_pmu.c

840

FIELD_PREP(SMMU_PMCG_IIDR_REVISION, revision) |

drivers/perf/arm_smmuv3_pmu.c

841

FIELD_PREP(SMMU_PMCG_IIDR_IMPLEMENTER, implementer);

drivers/perf/arm_spe_pmu.c

372

reg |= FIELD_PREP(PMSCR_EL1_TS, ATTR_CFG_GET_FLD(attr, ts_enable));

drivers/perf/arm_spe_pmu.c

373

reg |= FIELD_PREP(PMSCR_EL1_PA, ATTR_CFG_GET_FLD(attr, pa_enable));

drivers/perf/arm_spe_pmu.c

374

reg |= FIELD_PREP(PMSCR_EL1_PCT, ATTR_CFG_GET_FLD(attr, pct_enable));

drivers/perf/arm_spe_pmu.c

402

u64 min_period = FIELD_PREP(PMSIRR_EL1_INTERVAL_MASK, 1);

drivers/perf/arm_spe_pmu.c

415

reg |= FIELD_PREP(PMSIRR_EL1_RND, ATTR_CFG_GET_FLD(attr, jitter));

drivers/perf/arm_spe_pmu.c

426

reg |= FIELD_PREP(PMSFCR_EL1_LD, ATTR_CFG_GET_FLD(attr, load_filter));

drivers/perf/arm_spe_pmu.c

427

reg |= FIELD_PREP(PMSFCR_EL1_LDm, ATTR_CFG_GET_FLD(attr, load_filter_mask));

drivers/perf/arm_spe_pmu.c

428

reg |= FIELD_PREP(PMSFCR_EL1_ST, ATTR_CFG_GET_FLD(attr, store_filter));

drivers/perf/arm_spe_pmu.c

429

reg |= FIELD_PREP(PMSFCR_EL1_STm, ATTR_CFG_GET_FLD(attr, store_filter_mask));

drivers/perf/arm_spe_pmu.c

430

reg |= FIELD_PREP(PMSFCR_EL1_B, ATTR_CFG_GET_FLD(attr, branch_filter));

drivers/perf/arm_spe_pmu.c

431

reg |= FIELD_PREP(PMSFCR_EL1_Bm, ATTR_CFG_GET_FLD(attr, branch_filter_mask));

drivers/perf/arm_spe_pmu.c

432

reg |= FIELD_PREP(PMSFCR_EL1_SIMD, ATTR_CFG_GET_FLD(attr, simd_filter));

drivers/perf/arm_spe_pmu.c

433

reg |= FIELD_PREP(PMSFCR_EL1_SIMDm, ATTR_CFG_GET_FLD(attr, simd_filter_mask));

drivers/perf/arm_spe_pmu.c

434

reg |= FIELD_PREP(PMSFCR_EL1_FP, ATTR_CFG_GET_FLD(attr, float_filter));

drivers/perf/arm_spe_pmu.c

435

reg |= FIELD_PREP(PMSFCR_EL1_FPm, ATTR_CFG_GET_FLD(attr, float_filter_mask));

drivers/perf/arm_spe_pmu.c

470

return FIELD_PREP(PMSLATFR_EL1_MINLAT, ATTR_CFG_GET_FLD(attr, min_latency));

drivers/perf/arm_spe_pmu.c

619

limit = FIELD_PREP(PMBLIMITR_EL1_FM, PMBLIMITR_EL1_FM_DISCARD);

drivers/perf/cxl_pmu.c

642

cfg |= FIELD_PREP(CXL_PMU_COUNTER_CFG_INT_ON_OVRFLW, 1);

drivers/perf/cxl_pmu.c

643

cfg |= FIELD_PREP(CXL_PMU_COUNTER_CFG_FREEZE_ON_OVRFLW, 1);

drivers/perf/cxl_pmu.c

644

cfg |= FIELD_PREP(CXL_PMU_COUNTER_CFG_ENABLE, 1);

drivers/perf/cxl_pmu.c

645

cfg |= FIELD_PREP(CXL_PMU_COUNTER_CFG_EDGE,

drivers/perf/cxl_pmu.c

647

cfg |= FIELD_PREP(CXL_PMU_COUNTER_CFG_INVERT,

drivers/perf/cxl_pmu.c

652

cfg |= FIELD_PREP(CXL_PMU_COUNTER_CFG_EVENT_GRP_ID_IDX_MSK,

drivers/perf/cxl_pmu.c

654

cfg |= FIELD_PREP(CXL_PMU_COUNTER_CFG_EVENTS_MSK,

drivers/perf/cxl_pmu.c

666

cfg |= FIELD_PREP(CXL_PMU_COUNTER_CFG_THRESHOLD_MSK,

drivers/perf/cxl_pmu.c

723

cfg &= ~(FIELD_PREP(CXL_PMU_COUNTER_CFG_INT_ON_OVRFLW, 1) |

drivers/perf/cxl_pmu.c

724

FIELD_PREP(CXL_PMU_COUNTER_CFG_ENABLE, 1));

drivers/perf/dwc_pcie_pmu.c

269

ctrl = FIELD_PREP(DWC_PCIE_CNT_EVENT_SEL, event_id) |

drivers/perf/dwc_pcie_pmu.c

270

FIELD_PREP(DWC_PCIE_CNT_LANE_SEL, lane) |

drivers/perf/dwc_pcie_pmu.c

271

FIELD_PREP(DWC_PCIE_EVENT_CLEAR, DWC_PCIE_EVENT_PER_CLEAR);

drivers/perf/dwc_pcie_pmu.c

274

ctrl |= FIELD_PREP(DWC_PCIE_CNT_ENABLE, DWC_PCIE_PER_EVENT_ON);

drivers/perf/dwc_pcie_pmu.c

276

ctrl |= FIELD_PREP(DWC_PCIE_CNT_ENABLE, DWC_PCIE_PER_EVENT_OFF);

drivers/perf/dwc_pcie_pmu.c

302

ctrl = FIELD_PREP(DWC_PCIE_CNT_EVENT_SEL, event_id) |

drivers/perf/dwc_pcie_pmu.c

303

FIELD_PREP(DWC_PCIE_CNT_LANE_SEL, lane) |

drivers/perf/dwc_pcie_pmu.c

304

FIELD_PREP(DWC_PCIE_CNT_ENABLE, DWC_PCIE_PER_EVENT_ON);

drivers/perf/dwc_pcie_pmu.c

309

ctrl |= FIELD_PREP(DWC_PCIE_EVENT_CLEAR, DWC_PCIE_EVENT_PER_CLEAR);

drivers/perf/dwc_pcie_pmu.c

529

ctrl = FIELD_PREP(DWC_PCIE_CNT_EVENT_SEL, event_id) |

drivers/perf/dwc_pcie_pmu.c

530

FIELD_PREP(DWC_PCIE_CNT_LANE_SEL, lane) |

drivers/perf/dwc_pcie_pmu.c

531

FIELD_PREP(DWC_PCIE_CNT_ENABLE, DWC_PCIE_PER_EVENT_OFF) |

drivers/perf/dwc_pcie_pmu.c

532

FIELD_PREP(DWC_PCIE_EVENT_CLEAR, DWC_PCIE_EVENT_PER_CLEAR);

drivers/perf/dwc_pcie_pmu.c

546

ctrl = FIELD_PREP(DWC_PCIE_TIME_BASED_REPORT_SEL, event_id) |

drivers/perf/dwc_pcie_pmu.c

547

FIELD_PREP(DWC_PCIE_TIME_BASED_DURATION_SEL,

drivers/perf/fsl_imx8_ddr_perf.c

502

val |= FIELD_PREP(CNTL_CSV_MASK, config);

drivers/perf/fsl_imx8_ddr_perf.c

511

val |= FIELD_PREP(CNTL_CP_MASK, 0xf0);

drivers/perf/fsl_imx8_ddr_perf.c

635

cfg2 |= FIELD_PREP(READ_PORT_MASK, cfg2);

drivers/perf/fsl_imx8_ddr_perf.c

639

cfg2 |= FIELD_PREP(WRITE_PORT_MASK, cfg2);

drivers/perf/fsl_imx9_ddr_perf.c

456

ctrl_a &= ~FIELD_PREP(PMLCA_EVENT, 0x7F);

drivers/perf/fsl_imx9_ddr_perf.c

457

ctrl_a |= FIELD_PREP(PMLCA_EVENT, event);

drivers/perf/fsl_imx9_ddr_perf.c

482

pmcfg1 &= ~FIELD_PREP(MX93_PMCFG1_ID_MASK, 0x3FFFF);

drivers/perf/fsl_imx9_ddr_perf.c

483

pmcfg1 |= FIELD_PREP(MX93_PMCFG1_ID_MASK, axi_mask);

drivers/perf/fsl_imx9_ddr_perf.c

487

pmcfg2 &= ~FIELD_PREP(MX93_PMCFG2_ID, 0x3FFFF);

drivers/perf/fsl_imx9_ddr_perf.c

488

pmcfg2 |= FIELD_PREP(MX93_PMCFG2_ID, axi_id);

drivers/perf/fsl_imx9_ddr_perf.c

535

pmcfg &= ~(FIELD_PREP(MX95_PMCFG_ID_MASK, 0x3FF) |

drivers/perf/fsl_imx9_ddr_perf.c

536

FIELD_PREP(MX95_PMCFG_ID, 0x3FF));

drivers/perf/fsl_imx9_ddr_perf.c

537

pmcfg |= (FIELD_PREP(MX95_PMCFG_ID_MASK, axi_mask) |

drivers/perf/fsl_imx9_ddr_perf.c

538

FIELD_PREP(MX95_PMCFG_ID, axi_id));

drivers/perf/hisilicon/hisi_pcie_pmu.c

230

reg |= FIELD_PREP(HISI_PCIE_EVENT_M, hisi_pcie_get_real_event(event));

drivers/perf/hisilicon/hisi_pcie_pmu.c

235

reg |= FIELD_PREP(HISI_PCIE_TARGET_M, port);

drivers/perf/hisilicon/hisi_pcie_pmu.c

238

FIELD_PREP(HISI_PCIE_TARGET_M, hisi_pcie_get_bdf(event));

drivers/perf/hisilicon/hisi_pcie_pmu.c

243

reg |= FIELD_PREP(HISI_PCIE_TRIG_M, trig_len);

drivers/perf/hisilicon/hisi_pcie_pmu.c

244

reg |= FIELD_PREP(HISI_PCIE_TRIG_MODE_M, hisi_pcie_get_trig_mode(event));

drivers/perf/hisilicon/hisi_pcie_pmu.c

251

reg |= FIELD_PREP(HISI_PCIE_THR_M, thr_len);

drivers/perf/hisilicon/hisi_pcie_pmu.c

252

reg |= FIELD_PREP(HISI_PCIE_THR_MODE_M, hisi_pcie_get_thr_mode(event));

drivers/perf/hisilicon/hisi_pcie_pmu.c

258

reg |= FIELD_PREP(HISI_PCIE_LEN_M, len_mode);

drivers/perf/hisilicon/hisi_pcie_pmu.c

260

reg |= FIELD_PREP(HISI_PCIE_LEN_M, HISI_PCIE_LEN_M_DEFAULT);

drivers/perf/hisilicon/hisi_uncore_noc_pmu.c

192

reg |= FIELD_PREP(NOC_PMU_EVENT_CTRL_CHANNEL, ch);

drivers/perf/hisilicon/hisi_uncore_noc_pmu.c

74

reg |= FIELD_PREP(NOC_PMU_EVENT_CTRL_TYPE, type);

drivers/perf/hisilicon/hisi_uncore_uc_pmu.c

136

val |= FIELD_PREP(HISI_UC_SRCID_MSK, hisi_get_srcid(event));

drivers/perf/hisilicon/hisi_uncore_uc_pmu.c

185

val |= FIELD_PREP(HISI_UC_EVENT_URING_MSK, uring_channel);

drivers/perf/hisilicon/hisi_uncore_uc_pmu.c

91

val |= FIELD_PREP(HISI_UC_TRACETAG_REQ_MSK, HISI_UC_RD_REQ_TRACETAG);

drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c

112

FIELD_PREP(HHI_MIPI_CNTL2_CH_EN, reg));

drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c

121

FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL1, 0));

drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c

80

FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL1, 0x1b8));

drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c

85

FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL0, 0x8));

drivers/phy/amlogic/phy-meson-axg-pcie.c

22

#define MESON_PCIE_TWO_X1 FIELD_PREP(MESON_PCIE_PORT_SEL, 0x3)

drivers/phy/amlogic/phy-meson-axg-pcie.c

23

#define MESON_PCIE_COMMON_REF_CLK FIELD_PREP(MESON_PCIE_COMMON_CLK, 0x1)

drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c

66

FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL0, 0x8) |

drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c

67

FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL1, 0xa487));

drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c

70

FIELD_PREP(HHI_MIPI_CNTL2_DIF_REF_CTL2, 0x2e) |

drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c

74

FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL0, 0x45a) |

drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c

75

FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL1, 0x2680));

drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c

97

FIELD_PREP(HHI_MIPI_CNTL2_CH_EN, reg));

drivers/phy/amlogic/phy-meson-g12a-usb2.c

193

FIELD_PREP(PHY_CTRL_R16_MPLL_M, 20) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

194

FIELD_PREP(PHY_CTRL_R16_MPLL_N, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

196

FIELD_PREP(PHY_CTRL_R16_MPLL_LOCK_LONG, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

202

FIELD_PREP(PHY_CTRL_R17_MPLL_FRAC_IN, 0) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

203

FIELD_PREP(PHY_CTRL_R17_MPLL_LAMBDA1, 7) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

204

FIELD_PREP(PHY_CTRL_R17_MPLL_LAMBDA0, 7) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

205

FIELD_PREP(PHY_CTRL_R17_MPLL_FILTER_PVT2, 2) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

206

FIELD_PREP(PHY_CTRL_R17_MPLL_FILTER_PVT1, 9));

drivers/phy/amlogic/phy-meson-g12a-usb2.c

208

value = FIELD_PREP(PHY_CTRL_R18_MPLL_LKW_SEL, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

209

FIELD_PREP(PHY_CTRL_R18_MPLL_LK_W, 9) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

210

FIELD_PREP(PHY_CTRL_R18_MPLL_LK_S, 0x27) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

211

FIELD_PREP(PHY_CTRL_R18_MPLL_PFD_GAIN, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

212

FIELD_PREP(PHY_CTRL_R18_MPLL_ROU, 7) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

213

FIELD_PREP(PHY_CTRL_R18_MPLL_DATA_SEL, 3) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

214

FIELD_PREP(PHY_CTRL_R18_MPLL_BIAS_ADJ, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

215

FIELD_PREP(PHY_CTRL_R18_MPLL_BB_MODE, 0) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

216

FIELD_PREP(PHY_CTRL_R18_MPLL_ALPHA, 3) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

217

FIELD_PREP(PHY_CTRL_R18_MPLL_ADJ_LDO, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

229

FIELD_PREP(PHY_CTRL_R16_MPLL_M, 20) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

230

FIELD_PREP(PHY_CTRL_R16_MPLL_N, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

232

FIELD_PREP(PHY_CTRL_R16_MPLL_LOCK_LONG, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

238

FIELD_PREP(PHY_CTRL_R20_USB2_OTG_VBUS_TRIM_2_0, 4) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

240

FIELD_PREP(PHY_CTRL_R20_USB2_DMON_SEL_3_0, 15) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

242

FIELD_PREP(PHY_CTRL_R20_USB2_EDGE_DRV_TRIM_1_0, 3) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

243

FIELD_PREP(PHY_CTRL_R20_USB2_BGR_ADJ_4_0, 0) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

244

FIELD_PREP(PHY_CTRL_R20_USB2_BGR_VREF_4_0, 0) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

245

FIELD_PREP(PHY_CTRL_R20_USB2_BGR_DBG_1_0, 0));

drivers/phy/amlogic/phy-meson-g12a-usb2.c

249

FIELD_PREP(PHY_CTRL_R4_CALIB_CODE_7_0, 0xf) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

250

FIELD_PREP(PHY_CTRL_R4_CALIB_CODE_15_8, 0xf) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

251

FIELD_PREP(PHY_CTRL_R4_CALIB_CODE_23_16, 0xf) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

253

FIELD_PREP(PHY_CTRL_R4_I_C2L_BIAS_TRIM_1_0, 0) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

254

FIELD_PREP(PHY_CTRL_R4_I_C2L_BIAS_TRIM_3_2, 0));

drivers/phy/amlogic/phy-meson-g12a-usb2.c

259

FIELD_PREP(PHY_CTRL_R21_USB2_OTG_ACA_TRIM_1_0, 2));

drivers/phy/amlogic/phy-meson-g12a-usb2.c

263

FIELD_PREP(PHY_CTRL_R13_MIN_COUNT_FOR_SYNC_DET, 7));

drivers/phy/amlogic/phy-meson-g12a-usb2.c

268

FIELD_PREP(PHY_CTRL_R3_SQUELCH_REF, 0) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

269

FIELD_PREP(PHY_CTRL_R3_HSDIC_REF, 1) |

drivers/phy/amlogic/phy-meson-g12a-usb2.c

270

FIELD_PREP(PHY_CTRL_R3_DISC_THRESH, 3));

drivers/phy/amlogic/phy-meson-g12a-usb2.c

277

FIELD_PREP(PHY_CTRL_R13_MIN_COUNT_FOR_SYNC_DET, 7));

drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c

145

reg = FIELD_PREP(PHY_R4_PHY_CR_DATA_IN, data);

drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c

271

FIELD_PREP(PHY_R2_PHY_TX_VBOOST_LVL, 0x4));

drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c

275

FIELD_PREP(PHY_R1_PHY_LOS_BIAS, 4) |

drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c

276

FIELD_PREP(PHY_R1_PHY_LOS_LEVEL, 9));

drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c

290

FIELD_PREP(PHY_R0_PCIE_POWER_STATE, 0x1c));

drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c

304

FIELD_PREP(PHY_R0_PCIE_POWER_STATE, 0x1d));

drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c

77

reg = FIELD_PREP(PHY_R4_PHY_CR_DATA_IN, addr);

drivers/phy/amlogic/phy-meson8-hdmi-tx.c

68

FIELD_PREP(HHI_HDMI_PHY_CNTL0_HDMI_CTL1, 0x08c3) |

drivers/phy/amlogic/phy-meson8-hdmi-tx.c

69

FIELD_PREP(HHI_HDMI_PHY_CNTL0_HDMI_CTL0, hdmi_ctl0));

drivers/phy/amlogic/phy-meson8-hdmi-tx.c

93

FIELD_PREP(HHI_HDMI_PHY_CNTL0_HDMI_CTL1, 0x0841) |

drivers/phy/amlogic/phy-meson8-hdmi-tx.c

94

FIELD_PREP(HHI_HDMI_PHY_CNTL0_HDMI_CTL0, 0x8d00));

drivers/phy/amlogic/phy-meson8b-usb2.c

171

FIELD_PREP(REG_CTRL_REF_CLK_SEL_MASK, 0x2));

drivers/phy/amlogic/phy-meson8b-usb2.c

174

FIELD_PREP(REG_CTRL_FSEL_MASK, 0x5));

drivers/phy/apple/atc.c

1023

FIELD_PREP(ACIOPHY_TOP_BIST_PHY_CFG1_LN0_PWR_DOWN, 3));

drivers/phy/apple/atc.c

1047

PIPEHANDLER_NATIVE_POWER_DOWN, FIELD_PREP(PIPEHANDLER_NATIVE_POWER_DOWN, 3));

drivers/phy/apple/atc.c

1061

FIELD_PREP(PIPEHANDLER_MUX_CTRL_CLK, PIPEHANDLER_MUX_CTRL_CLK_OFF));

drivers/phy/apple/atc.c

1064

FIELD_PREP(PIPEHANDLER_MUX_CTRL_DATA, PIPEHANDLER_MUX_CTRL_DATA_USB3));

drivers/phy/apple/atc.c

1067

FIELD_PREP(PIPEHANDLER_MUX_CTRL_CLK, PIPEHANDLER_MUX_CTRL_CLK_USB3));

drivers/phy/apple/atc.c

1104

FIELD_PREP(PIPEHANDLER_MUX_CTRL_CLK, PIPEHANDLER_MUX_CTRL_CLK_OFF));

drivers/phy/apple/atc.c

1107

FIELD_PREP(PIPEHANDLER_MUX_CTRL_DATA, PIPEHANDLER_MUX_CTRL_DATA_DUMMY));

drivers/phy/apple/atc.c

1110

FIELD_PREP(PIPEHANDLER_MUX_CTRL_CLK, PIPEHANDLER_MUX_CTRL_CLK_DUMMY));

drivers/phy/apple/atc.c

1118

PIPEHANDLER_NATIVE_POWER_DOWN, FIELD_PREP(PIPEHANDLER_NATIVE_POWER_DOWN, 2));

drivers/phy/apple/atc.c

1154

FIELD_PREP(PIPEHANDLER_MUX_CTRL_CLK, PIPEHANDLER_MUX_CTRL_CLK_OFF));

drivers/phy/apple/atc.c

1157

FIELD_PREP(PIPEHANDLER_MUX_CTRL_DATA, PIPEHANDLER_MUX_CTRL_DATA_DUMMY));

drivers/phy/apple/atc.c

1160

FIELD_PREP(PIPEHANDLER_MUX_CTRL_CLK, PIPEHANDLER_MUX_CTRL_CLK_DUMMY));

drivers/phy/apple/atc.c

1169

FIELD_PREP(ACIOPHY_LANE_MODE_RX0, mode_cfg->lane_mode[0]));

drivers/phy/apple/atc.c

1171

FIELD_PREP(ACIOPHY_LANE_MODE_TX0, mode_cfg->lane_mode[0]));

drivers/phy/apple/atc.c

1173

FIELD_PREP(ACIOPHY_LANE_MODE_RX1, mode_cfg->lane_mode[1]));

drivers/phy/apple/atc.c

1175

FIELD_PREP(ACIOPHY_LANE_MODE_TX1, mode_cfg->lane_mode[1]));

drivers/phy/apple/atc.c

1177

FIELD_PREP(ACIOPHY_CROSSBAR_PROTOCOL, mode_cfg->crossbar));

drivers/phy/apple/atc.c

1185

FIELD_PREP(ACIOPHY_CROSSBAR_DP_SINGLE_PMA, mode_cfg->crossbar_dp_single_pma));

drivers/phy/apple/atc.c

1222

FIELD_PREP(DPRX_PCLK_SELECT, 1));

drivers/phy/apple/atc.c

1226

FIELD_PREP(DPTX_PCLK1_SELECT, 1));

drivers/phy/apple/atc.c

1230

FIELD_PREP(DPTX_PCLK2_SELECT, 1));

drivers/phy/apple/atc.c

1245

FIELD_PREP(LPDPTX_TXTERM_CODE, 0x16));

drivers/phy/apple/atc.c

1249

FIELD_PREP(LPDPTX_CFG_PMA_PHYS_ADJ, 5));

drivers/phy/apple/atc.c

1260

FIELD_PREP(LPDPTX_BLK_AUX_RXOFFSET, 3));

drivers/phy/apple/atc.c

1263

FIELD_PREP(LPDPTX_AUX_MARGIN_RCAL_TXSWING, 12));

drivers/phy/apple/atc.c

1350

FIELD_PREP(LN_TXA_CAL_CTRL_BASE, 0xf));

drivers/phy/apple/atc.c

1355

FIELD_PREP(LN_TXA_CAL_CTRL, (1 << tx_cal_code) - 1));

drivers/phy/apple/atc.c

1389

FIELD_PREP(LN_TX_CAL_CODE, tx_cal_code));

drivers/phy/apple/atc.c

1393

FIELD_PREP(LN_TX_CLK_DLY_CTRL_TAPGEN, 3));

drivers/phy/apple/atc.c

1407

FIELD_PREP(LN_VREF_LPBKIN_DATA, 3));

drivers/phy/apple/atc.c

1409

FIELD_PREP(LN_VREF_BIAS_SEL, 2));

drivers/phy/apple/atc.c

1412

FIELD_PREP(LN_VREF_ADJUST_GRAY, 0x18));

drivers/phy/apple/atc.c

1480

FIELD_PREP(LN_DTVREG_ADJUST, 0xa));

drivers/phy/apple/atc.c

1504

reg |= FIELD_PREP(AUSPLL_APB_CMD_OVERRIDE_CMD, command);

drivers/phy/apple/atc.c

1543

FIELD_PREP(AUSPLL_FD_FREQ_COUNT_TARGET, cfg->freqinit_count_target));

drivers/phy/apple/atc.c

1546

core_mask32(atcphy, AUSPLL_FREQ_DESC_A, AUSPLL_FD_KI_MAN, FIELD_PREP(AUSPLL_FD_KI_MAN, 8));

drivers/phy/apple/atc.c

1547

core_mask32(atcphy, AUSPLL_FREQ_DESC_A, AUSPLL_FD_KI_EXP, FIELD_PREP(AUSPLL_FD_KI_EXP, 3));

drivers/phy/apple/atc.c

1548

core_mask32(atcphy, AUSPLL_FREQ_DESC_A, AUSPLL_FD_KP_MAN, FIELD_PREP(AUSPLL_FD_KP_MAN, 8));

drivers/phy/apple/atc.c

1549

core_mask32(atcphy, AUSPLL_FREQ_DESC_A, AUSPLL_FD_KP_EXP, FIELD_PREP(AUSPLL_FD_KP_EXP, 7));

drivers/phy/apple/atc.c

1553

FIELD_PREP(AUSPLL_FD_FBDIVN_FRAC_DEN, cfg->fbdivn_frac_den));

drivers/phy/apple/atc.c

1555

FIELD_PREP(AUSPLL_FD_FBDIVN_FRAC_NUM, cfg->fbdivn_frac_num));

drivers/phy/apple/atc.c

1560

FIELD_PREP(AUSPLL_FD_PCLK_DIV_SEL, cfg->pclk_div_sel));

drivers/phy/apple/atc.c

1562

FIELD_PREP(AUSPLL_FD_LFSDM_DIV, 1));

drivers/phy/apple/atc.c

1564

FIELD_PREP(AUSPLL_FD_LFCLK_CTRL, cfg->lfclk_ctrl));

drivers/phy/apple/atc.c

1566

FIELD_PREP(AUSPLL_FD_VCLK_OP_DIVN, cfg->vclk_op_divn));

drivers/phy/apple/atc.c

1570

FIELD_PREP(AUSPLL_CLKOUT_PLLA_REFBUFCLK_DI, 7));

drivers/phy/apple/atc.c

1755

FIELD_PREP(ACIOPHY_SLEEP_CTRL_TX_SMALL_OV, 3));

drivers/phy/apple/atc.c

1758

FIELD_PREP(ACIOPHY_SLEEP_CTRL_TX_BIG_OV, 3));

drivers/phy/apple/atc.c

1761

FIELD_PREP(ACIOPHY_SLEEP_CTRL_TX_CLAMP_OV, 3));

drivers/phy/apple/atc.c

1765

FIELD_PREP(ACIOPHY_CFG0_RX_BIG_OV, 3));

drivers/phy/apple/atc.c

1768

FIELD_PREP(ACIOPHY_CFG0_RX_SMALL_OV, 3));

drivers/phy/apple/atc.c

1771

FIELD_PREP(ACIOPHY_CFG0_RX_CLAMP_OV, 3));

drivers/phy/cadence/cdns-dphy-rx.c

194

reg = FIELD_PREP(DPHY_BAND_CFG_LEFT_BAND, band_ctrl) |

drivers/phy/cadence/cdns-dphy-rx.c

195

FIELD_PREP(DPHY_BAND_CFG_RIGHT_BAND, band_ctrl);

drivers/phy/cadence/cdns-dphy-rx.c

86

FIELD_PREP(DPHY_CMN_RX_BANDGAP_TIMER_MASK,

drivers/phy/cadence/cdns-dphy.c

256

writel((FIELD_PREP(DPHY_TX_J721E_WIZ_IPDIV, cfg->pll_ipdiv) |

drivers/phy/cadence/cdns-dphy.c

257

FIELD_PREP(DPHY_TX_J721E_WIZ_OPDIV, cfg->pll_opdiv) |

drivers/phy/cadence/cdns-dphy.c

258

FIELD_PREP(DPHY_TX_J721E_WIZ_FBDIV, cfg->pll_fbdiv)),

drivers/phy/cadence/cdns-dphy.c

411

reg = FIELD_PREP(DPHY_BAND_CFG_LEFT_BAND, ret) |

drivers/phy/cadence/cdns-dphy.c

412

FIELD_PREP(DPHY_BAND_CFG_RIGHT_BAND, ret);

drivers/phy/cadence/phy-cadence-salvo.c

278

value = FIELD_PREP(RX_USB2_DISCONN_MASK, salvo_phy->usb2_disconn);

drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c

27

#define CCM(n) FIELD_PREP(CCM_MASK, (n))

drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c

31

#define CA(n) FIELD_PREP(CA_MASK, (n))

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

41

#define IMX8MM_GPR_PCIE_REF_CLK_PLL FIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 0x3)

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

42

#define IMX8MM_GPR_PCIE_REF_CLK_EXT FIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 0x2)

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

193

val = FIELD_PREP(TCA_GCFG_OP_MODE, TCA_GCFG_OP_MODE_SYNCMODE);

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

203

val = FIELD_PREP(TCA_GCFG_OP_MODE, TCA_GCFG_OP_MODE_SYSMODE);

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

491

value |= FIELD_PREP(PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK,

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

499

value |= FIELD_PREP(PHY_CTRL5_PCS_TX_SWING_FULL_MASK,

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

514

value |= FIELD_PREP(PHY_CTRL3_TXVREF_TUNE_MASK,

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

520

value |= FIELD_PREP(PHY_CTRL3_TXRISE_TUNE_MASK,

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

526

value |= FIELD_PREP(PHY_CTRL3_TXPREEMP_TUNE_MASK,

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

532

value |= FIELD_PREP(PHY_CTRL3_COMPDISTUNE_MASK,

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

538

value |= FIELD_PREP(PHY_CTRL3_TX_VBOOST_LEVEL_MASK,

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

579

value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, imx_phy->alt_clk ?

drivers/phy/freescale/phy-fsl-imx8mq-usb.c

596

value |= FIELD_PREP(PHY_CTRL0_SSC_RANGE_MASK,

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

460

val = FIELD_PREP(HSIO_MODE_MASK, val);

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

466

val = FIELD_PREP(HSIO_DEVICE_TYPE_MASK, PCI_EXP_TYPE_ROOT_PORT);

drivers/phy/freescale/phy-fsl-imx8qm-hsio.c

469

val = FIELD_PREP(HSIO_DEVICE_TYPE_MASK, PCI_EXP_TYPE_ENDPOINT);

drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c

23

#define M(n) FIELD_PREP(M_MASK, (n))

drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c

25

#define CCM(n) FIELD_PREP(CCM_MASK, (n))

drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c

27

#define CA(n) FIELD_PREP(CA_MASK, (n))

drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c

29

#define TST(n) FIELD_PREP(TST_MASK, (n))

drivers/phy/freescale/phy-fsl-lynx-28g.c

553

FIELD_PREP(LNaTGCR0_N_RATE, LNaTGCR0_N_RATE_QUARTER),

drivers/phy/freescale/phy-fsl-lynx-28g.c

556

FIELD_PREP(LNaRGCR0_N_RATE, LNaRGCR0_N_RATE_QUARTER),

drivers/phy/freescale/phy-fsl-lynx-28g.c

568

FIELD_PREP(LNaTGCR0_N_RATE, LNaTGCR0_N_RATE_FULL),

drivers/phy/freescale/phy-fsl-lynx-28g.c

571

FIELD_PREP(LNaRGCR0_N_RATE, LNaRGCR0_N_RATE_FULL),

drivers/phy/freescale/phy-fsl-lynx-28g.c

588

FIELD_PREP(LNaTGCR0_USE_PLL, LNaTGCR0_USE_PLLF),

drivers/phy/freescale/phy-fsl-lynx-28g.c

591

FIELD_PREP(LNaRGCR0_USE_PLL, LNaRGCR0_USE_PLLF),

drivers/phy/freescale/phy-fsl-lynx-28g.c

595

FIELD_PREP(LNaTGCR0_USE_PLL, LNaTGCR0_USE_PLLS),

drivers/phy/freescale/phy-fsl-lynx-28g.c

598

FIELD_PREP(LNaRGCR0_USE_PLL, LNaRGCR0_USE_PLLS),

drivers/phy/freescale/phy-fsl-lynx-28g.c

801

FIELD_PREP(LNaGCR0_PROTO_SEL, conf->proto_sel) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

802

FIELD_PREP(LNaGCR0_IF_WIDTH, conf->if_width),

drivers/phy/freescale/phy-fsl-lynx-28g.c

806

FIELD_PREP(LNaTECR0_EQ_TYPE, conf->teq_type) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

807

FIELD_PREP(LNaTECR0_EQ_SGN_PREQ, conf->sgn_preq) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

808

FIELD_PREP(LNaTECR0_EQ_PREQ, conf->ratio_preq) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

809

FIELD_PREP(LNaTECR0_EQ_SGN_POST1Q, conf->sgn_post1q) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

810

FIELD_PREP(LNaTECR0_EQ_POST1Q, conf->ratio_post1q) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

811

FIELD_PREP(LNaTECR0_EQ_AMP_RED, conf->amp_red),

drivers/phy/freescale/phy-fsl-lynx-28g.c

820

FIELD_PREP(LNaTECR1_EQ_ADPT_EQ, conf->adpt_eq),

drivers/phy/freescale/phy-fsl-lynx-28g.c

824

FIELD_PREP(LNaRGCR1_ENTER_IDLE_FLT_SEL, conf->enter_idle_flt_sel) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

825

FIELD_PREP(LNaRGCR1_EXIT_IDLE_FLT_SEL, conf->exit_idle_flt_sel) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

826

FIELD_PREP(LNaRGCR1_DATA_LOST_TH_SEL, conf->data_lost_th_sel),

drivers/phy/freescale/phy-fsl-lynx-28g.c

832

FIELD_PREP(LNaRECR0_EQ_GAINK2_HF_OV_EN, conf->gk2ovd_en) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

833

FIELD_PREP(LNaRECR0_EQ_GAINK3_MF_OV_EN, conf->gk3ovd_en) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

834

FIELD_PREP(LNaRECR0_EQ_GAINK4_LF_OV_EN, conf->gk4ovd_en) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

835

FIELD_PREP(LNaRECR0_EQ_GAINK2_HF_OV, conf->gk2ovd) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

836

FIELD_PREP(LNaRECR0_EQ_GAINK3_MF_OV, conf->gk3ovd) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

837

FIELD_PREP(LNaRECR0_EQ_GAINK4_LF_OV, conf->gk4ovd),

drivers/phy/freescale/phy-fsl-lynx-28g.c

846

FIELD_PREP(LNaRECR1_EQ_OFFSET_OV, conf->eq_offset_ovd) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

847

FIELD_PREP(LNaRECR1_EQ_OFFSET_OV_EN, conf->eq_offset_ovd_en),

drivers/phy/freescale/phy-fsl-lynx-28g.c

852

FIELD_PREP(LNaRECR2_EQ_OFFSET_RNG_DBL, conf->eq_offset_rng_dbl) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

853

FIELD_PREP(LNaRECR2_EQ_BLW_SEL, conf->eq_blw_sel) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

854

FIELD_PREP(LNaRECR2_EQ_BOOST, conf->eq_boost) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

855

FIELD_PREP(LNaRECR2_SPARE_IN, conf->spare_in),

drivers/phy/freescale/phy-fsl-lynx-28g.c

862

FIELD_PREP(LNaRSCCR0_SMP_AUTOZ_D1R, conf->smp_autoz_d1r) |

drivers/phy/freescale/phy-fsl-lynx-28g.c

863

FIELD_PREP(LNaRSCCR0_SMP_AUTOZ_EG1R, conf->smp_autoz_eg1r),

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

347

writeb(FIELD_PREP(REG12_CK_DIV_MASK, div), phy->regs + PHY_REG(12));

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

364

writeb(FIELD_PREP(REG13_TG_CODE_LOW_MASK, fld_tg_code),

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

366

writeb(FIELD_PREP(REG14_TOL_MASK, 2) |

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

367

FIELD_PREP(REG14_RP_CODE_MASK, 2) |

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

368

FIELD_PREP(REG14_TG_CODE_HIGH_MASK, fld_tg_code >> 8),

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

473

writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK,

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

527

cal_phy->pll_div_regs[0] = FIELD_PREP(REG01_PMS_P_MASK, p);

drivers/phy/freescale/phy-fsl-samsung-hdmi.c

529

cal_phy->pll_div_regs[2] = FIELD_PREP(REG03_PMS_S_MASK, s-1);

drivers/phy/hisilicon/phy-hi3670-pcie.c

246

val |= FIELD_PREP(EYE_PARM1_MASK, phy->eye_param[1]);

drivers/phy/hisilicon/phy-hi3670-pcie.c

255

val |= FIELD_PREP(EYE_PARM2_MASK, phy->eye_param[2]);

drivers/phy/hisilicon/phy-hi3670-pcie.c

260

val |= FIELD_PREP(EYE_PARM3_MASK, phy->eye_param[3]);

drivers/phy/hisilicon/phy-hi3670-pcie.c

269

val |= FIELD_PREP(EYE_PARM0_MASK, phy->eye_param[0]);

drivers/phy/hisilicon/phy-hi3670-pcie.c

277

val |= FIELD_PREP(EYE_PARM4_MASK, phy->eye_param[4]);

drivers/phy/hisilicon/phy-hi3670-pcie.c

317

FIELD_PREP(PCIE_FNPLL_FBDIV_MASK, PCIE_FNPLL_FBDIV),

drivers/phy/hisilicon/phy-hi3670-pcie.c

322

FIELD_PREP(PCIE_FNPLL_FRACDIV_MASK, PCIE_FNPLL_FRACDIV),

drivers/phy/hisilicon/phy-hi3670-pcie.c

327

FIELD_PREP(PCIE_FNPLL_POSTDIV1_MASK, PCIE_FNPLL_POSTDIV1) |

drivers/phy/hisilicon/phy-hi3670-pcie.c

328

FIELD_PREP(PCIE_FNPLL_POSTDIV2_MASK, PCIE_FNPLL_POSTDIV2) |

drivers/phy/hisilicon/phy-hi3670-pcie.c

329

FIELD_PREP(PCIE_FNPLL_PLL_MODE_MASK, PCIE_FNPLL_PLL_MODE),

drivers/phy/hisilicon/phy-hi3670-usb3.c

216

reg = FIELD_PREP(CFG54_USB31PHY_CR_ADDR_MASK, addr);

drivers/phy/hisilicon/phy-hi3670-usb3.c

277

FIELD_PREP(CFG58_USB31PHY_CR_DATA_MASK, val));

drivers/phy/ingenic/phy-ingenic-usb.c

211

FIELD_PREP(USBPCR_IDPULLUP_MASK, USBPCR_IDPULLUP_ALWAYS) |

drivers/phy/ingenic/phy-ingenic-usb.c

212

FIELD_PREP(USBPCR_COMPDISTUNE_MASK, USBPCR_COMPDISTUNE_DFT) |

drivers/phy/ingenic/phy-ingenic-usb.c

213

FIELD_PREP(USBPCR_OTGTUNE_MASK, USBPCR_OTGTUNE_DFT) |

drivers/phy/ingenic/phy-ingenic-usb.c

214

FIELD_PREP(USBPCR_SQRXTUNE_MASK, USBPCR_SQRXTUNE_DFT) |

drivers/phy/ingenic/phy-ingenic-usb.c

215

FIELD_PREP(USBPCR_TXFSLSTUNE_MASK, USBPCR_TXFSLSTUNE_DFT) |

drivers/phy/ingenic/phy-ingenic-usb.c

216

FIELD_PREP(USBPCR_TXRISETUNE_MASK, USBPCR_TXRISETUNE_DFT) |

drivers/phy/ingenic/phy-ingenic-usb.c

217

FIELD_PREP(USBPCR_TXVREFTUNE_MASK, USBPCR_TXVREFTUNE_DFT);

drivers/phy/ingenic/phy-ingenic-usb.c

231

FIELD_PREP(USBPCR_TXVREFTUNE_MASK, USBPCR_TXVREFTUNE_INC_75PPT);

drivers/phy/ingenic/phy-ingenic-usb.c

257

FIELD_PREP(USBPCR_SQRXTUNE_MASK, USBPCR_SQRXTUNE_DCR_20PCT) |

drivers/phy/ingenic/phy-ingenic-usb.c

258

FIELD_PREP(USBPCR_TXHSXVTUNE_MASK, USBPCR_TXHSXVTUNE_DCR_15MV) |

drivers/phy/ingenic/phy-ingenic-usb.c

259

FIELD_PREP(USBPCR_TXVREFTUNE_MASK, USBPCR_TXVREFTUNE_INC_25PPT);

drivers/phy/ingenic/phy-ingenic-usb.c

276

FIELD_PREP(USBPCR_IDPULLUP_MASK, USBPCR_IDPULLUP_OTG);

drivers/phy/ingenic/phy-ingenic-usb.c

288

reg = USBPCR_POR | FIELD_PREP(USBPCR_IDPULLUP_MASK, USBPCR_IDPULLUP_OTG);

drivers/phy/intel/phy-intel-keembay-emmc.c

110

FIELD_PREP(PWR_DOWN_MASK, 1));

drivers/phy/intel/phy-intel-keembay-emmc.c

133

FIELD_PREP(SEL_FREQ_MASK, freqsel));

drivers/phy/intel/phy-intel-keembay-emmc.c

141

FIELD_PREP(DLL_EN_MASK, 1));

drivers/phy/intel/phy-intel-keembay-emmc.c

219

FIELD_PREP(SEL_DLY_TXCLK_MASK, 1));

drivers/phy/intel/phy-intel-keembay-emmc.c

227

FIELD_PREP(OTAP_DLY_ENA_MASK, 1));

drivers/phy/intel/phy-intel-keembay-emmc.c

235

FIELD_PREP(OTAP_DLY_SEL_MASK, 2));

drivers/phy/intel/phy-intel-keembay-emmc.c

67

FIELD_PREP(PWR_DOWN_MASK, 0));

drivers/phy/intel/phy-intel-keembay-emmc.c

74

FIELD_PREP(DLL_EN_MASK, 0));

drivers/phy/intel/phy-intel-keembay-usb.c

104

FIELD_PREP(PHY_REF_USE_PAD_MASK, 1));

drivers/phy/intel/phy-intel-keembay-usb.c

117

FIELD_PREP(VCC_RESET_N_MASK, 0));

drivers/phy/intel/phy-intel-keembay-usb.c

130

FIELD_PREP(VCC_RESET_N_MASK, 1));

drivers/phy/intel/phy-intel-keembay-usb.c

143

FIELD_PREP(POR_MASK | PHY_RESET_MASK, 0));

drivers/phy/intel/phy-intel-keembay-usb.c

173

FIELD_PREP(USB_PHY_CR_PARA_CLK_EN_MASK, 0));

drivers/phy/intel/phy-intel-keembay-usb.c

188

FIELD_PREP(USB_PHY_CR_PARA_SEL_MASK, 1));

drivers/phy/intel/phy-intel-keembay-usb.c

197

FIELD_PREP(USB_PHY_CR_PARA_CLK_EN_MASK, 1));

drivers/phy/intel/phy-intel-keembay-usb.c

213

FIELD_PREP(PHY0_SRAM_EXT_LD_DONE_MASK, 1));

drivers/phy/intel/phy-intel-keembay-usb.c

93

FIELD_PREP(IDDQ_ENABLE_MASK, 0));

drivers/phy/intel/phy-intel-lgm-combo.c

172

PCIE_PHY_CLK_PAD, FIELD_PREP(PCIE_PHY_CLK_PAD, 0));

drivers/phy/intel/phy-intel-lgm-combo.c

195

PCIE_PHY_CLK_PAD, FIELD_PREP(PCIE_PHY_CLK_PAD, 1));

drivers/phy/intel/phy-intel-lgm-combo.c

390

ADAPT_REQ_MSK, FIELD_PREP(ADAPT_REQ_MSK, 3));

drivers/phy/intel/phy-intel-lgm-combo.c

401

ADAPT_REQ_MSK, FIELD_PREP(ADAPT_REQ_MSK, 0));

drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c

161

FIELD_PREP(PCIE_PHY_PLL_A_CTRL3_MMD_MASK, 0x1));

drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c

171

FIELD_PREP(PCIE_PHY_PLL_CTRL2_CONST_SDM_MASK,

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

100

#define GS2_VREG_RXTX_MAS_ISET_120U FIELD_PREP(GS2_VREG_RXTX_MAS_ISET_MASK,\

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

124

#define GS3_FFE_CAP_SEL_VALUE FIELD_PREP(GS3_FFE_CAP_SEL_MASK, 0xF)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

138

#define GEN2_TX_DATA_DLY_DEFT FIELD_PREP(GEN2_TX_DATA_DLY_MASK, 2)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

153

#define MODE_REFDIV_BY_4 FIELD_PREP(MODE_REFDIV_MASK, 0x2)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

169

#define CFG_PM_RXDEN_WAIT_1_UNIT FIELD_PREP(CFG_PM_RXDEN_WAIT_MASK, 0x1)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

171

#define CFG_PM_RXDLOZ_WAIT_7_UNIT FIELD_PREP(CFG_PM_RXDLOZ_WAIT_MASK, 0x7)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

172

#define CFG_PM_RXDLOZ_WAIT_12_UNIT FIELD_PREP(CFG_PM_RXDLOZ_WAIT_MASK, 0xC)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

200

#define GEN_RX_SEL_VALUE(val) FIELD_PREP(GEN_RX_SEL_MASK, (val))

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

202

#define GEN_TX_SEL_VALUE(val) FIELD_PREP(GEN_TX_SEL_MASK, (val))

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

56

#define REF_FREF_SEL_SERDES_25MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x1)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

57

#define REF_FREF_SEL_SERDES_40MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x3)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

58

#define REF_FREF_SEL_SERDES_50MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x4)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

59

#define REF_FREF_SEL_PCIE_USB3_25MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x2)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

60

#define REF_FREF_SEL_PCIE_USB3_40MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x3)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

62

#define COMPHY_MODE_SATA FIELD_PREP(COMPHY_MODE_MASK, 0x0)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

63

#define COMPHY_MODE_PCIE FIELD_PREP(COMPHY_MODE_MASK, 0x3)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

64

#define COMPHY_MODE_SERDES FIELD_PREP(COMPHY_MODE_MASK, 0x4)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

65

#define COMPHY_MODE_USB3 FIELD_PREP(COMPHY_MODE_MASK, 0x5)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

70

#define SPEED_PLL_VALUE_16 FIELD_PREP(SPEED_PLL_MASK, 0x10)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

74

#define DATA_WIDTH_10BIT FIELD_PREP(SEL_DATA_WIDTH_MASK, 0x0)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

75

#define DATA_WIDTH_20BIT FIELD_PREP(SEL_DATA_WIDTH_MASK, 0x1)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

76

#define DATA_WIDTH_40BIT FIELD_PREP(SEL_DATA_WIDTH_MASK, 0x2)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

85

#define PHY_GEN_MAX_USB3_5G FIELD_PREP(PHY_GEN_MAX_MASK, 0x1)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

92

#define GS2_TX_SSC_AMP_4128 FIELD_PREP(GS2_TX_SSC_AMP_MASK, 0x20)

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

94

#define GS2_VREG_RXTX_MAS_ISET_60U FIELD_PREP(GS2_VREG_RXTX_MAS_ISET_MASK,\

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

96

#define GS2_VREG_RXTX_MAS_ISET_80U FIELD_PREP(GS2_VREG_RXTX_MAS_ISET_MASK,\

drivers/phy/marvell/phy-mvebu-a3700-comphy.c

98

#define GS2_VREG_RXTX_MAS_ISET_100U FIELD_PREP(GS2_VREG_RXTX_MAS_ISET_MASK,\

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

164

FIELD_PREP(RG_HDMITX_PLL_IC, 0x1) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

165

FIELD_PREP(RG_HDMITX_PLL_IR, 0x1));

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

169

FIELD_PREP(RG_HDMITX_PLL_FBKSEL, 0x1) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

170

FIELD_PREP(RG_HDMITX_PLL_FBKDIV, 19));

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

175

FIELD_PREP(RG_HDMITX_PLL_BP, 0xc) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

176

FIELD_PREP(RG_HDMITX_PLL_BC, 0x2) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

177

FIELD_PREP(RG_HDMITX_PLL_BR, 0x1));

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

192

FIELD_PREP(RG_HDMITX_PRD_IBIAS_CLK, pre_ibias) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

193

FIELD_PREP(RG_HDMITX_PRD_IBIAS_D2, pre_ibias) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

194

FIELD_PREP(RG_HDMITX_PRD_IBIAS_D1, pre_ibias) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

195

FIELD_PREP(RG_HDMITX_PRD_IBIAS_D0, pre_ibias));

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

200

FIELD_PREP(RG_HDMITX_DRV_IMP_CLK, hdmi_phy->drv_imp_clk) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

201

FIELD_PREP(RG_HDMITX_DRV_IMP_D2, hdmi_phy->drv_imp_d2) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

202

FIELD_PREP(RG_HDMITX_DRV_IMP_D1, hdmi_phy->drv_imp_d1) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

203

FIELD_PREP(RG_HDMITX_DRV_IMP_D0, hdmi_phy->drv_imp_d0));

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

207

FIELD_PREP(RG_HDMITX_DRV_IBIAS_CLK, hdmi_ibias) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

208

FIELD_PREP(RG_HDMITX_DRV_IBIAS_D2, hdmi_ibias) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

209

FIELD_PREP(RG_HDMITX_DRV_IBIAS_D1, hdmi_ibias) |

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

210

FIELD_PREP(RG_HDMITX_DRV_IBIAS_D0, hdmi_ibias));

drivers/phy/mediatek/phy-mtk-io.h

43

mtk_phy_update_bits(reg, mask, FIELD_PREP(mask, val)); \

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

158

FIELD_PREP(RG_DSI_V02_SEL, 4) |

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

159

FIELD_PREP(RG_DSI_V032_SEL, 4) |

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

160

FIELD_PREP(RG_DSI_V04_SEL, 4) |

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

161

FIELD_PREP(RG_DSI_V072_SEL, 4) |

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

162

FIELD_PREP(RG_DSI_V10_SEL, 4) |

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

163

FIELD_PREP(RG_DSI_V12_SEL, 4) |

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

170

FIELD_PREP(RG_DSI_LNT_IMP_CAL_CODE, 8) |

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

185

FIELD_PREP(RG_DSI_MPPLL_TXDIV0, txdiv0) |

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

186

FIELD_PREP(RG_DSI_MPPLL_TXDIV1, txdiv1));

drivers/phy/mediatek/phy-mtk-tphy.c

1035

FIELD_PREP(RG_CDR_BIRLTR_GEN1_MSK, 0x6) |

drivers/phy/mediatek/phy-mtk-tphy.c

1036

FIELD_PREP(RG_CDR_BC_GEN1_MSK, 0x1a));

drivers/phy/mediatek/phy-mtk-tphy.c

1044

FIELD_PREP(RG_CDR_BICLTR_GEN1_MSK, 0x0c) |

drivers/phy/mediatek/phy-mtk-tphy.c

1045

FIELD_PREP(RG_CDR_BR_GEN2_MSK, 0x07));

drivers/phy/mediatek/phy-mtk-tphy.c

1049

FIELD_PREP(RG_CDR_BICLTD0_GEN1_MSK, 0x08) |

drivers/phy/mediatek/phy-mtk-tphy.c

1050

FIELD_PREP(RG_CDR_BICLTD1_GEN1_MSK, 0x02));

drivers/phy/mediatek/phy-mtk-tphy.c

1056

FIELD_PREP(RG_T2_MIN_MSK, 0x12) |

drivers/phy/mediatek/phy-mtk-tphy.c

1057

FIELD_PREP(RG_TG_MIN_MSK, 0x04));

drivers/phy/mediatek/phy-mtk-tphy.c

1061

FIELD_PREP(RG_T2_MAX_MSK, 0x31) |

drivers/phy/mediatek/phy-mtk-tphy.c

1062

FIELD_PREP(RG_TG_MAX_MSK, 0x0e));

drivers/phy/mediatek/phy-mtk-tphy.c

711

tmp |= FIELD_PREP(P2F_RG_CYCLECNT, U3P_FM_DET_CYCLE_CNT);

drivers/phy/mediatek/phy-mtk-tphy.c

713

tmp |= FIELD_PREP(P2F_RG_MONCLK_SEL, instance->index >> 1);

drivers/phy/mediatek/phy-mtk-tphy.c

790

FIELD_PREP(P3D_RG_CDR_BIR_LTD0, 0xc) |

drivers/phy/mediatek/phy-mtk-tphy.c

791

FIELD_PREP(P3D_RG_CDR_BIR_LTD1, 0x3));

drivers/phy/mediatek/phy-mtk-tphy.c

962

FIELD_PREP(P3A_RG_XTAL_EXT_PE1H, 0x2) |

drivers/phy/mediatek/phy-mtk-tphy.c

963

FIELD_PREP(P3A_RG_XTAL_EXT_PE2H, 0x2));

drivers/phy/mediatek/phy-mtk-tphy.c

978

FIELD_PREP(P3A_RG_PLL_BR_PE2H, 0x1) |

drivers/phy/mediatek/phy-mtk-tphy.c

979

FIELD_PREP(P3A_RG_PLL_IC_PE2H, 0x1));

drivers/phy/mediatek/phy-mtk-tphy.c

983

FIELD_PREP(P3A_RG_PLL_BC_PE2H, 0x3));

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

27

#define XTP_PCS_RX_EQ_IN_PROGRESS(x) FIELD_PREP(GENMASK(25, 24), (x))

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

29

#define XTP_PCS_MODE(x) FIELD_PREP(GENMASK(17, 16), (x))

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

33

#define XTP_PCS_PWD_SYNC(x) FIELD_PREP(XTP_PCS_PWD_SYNC_MASK, (x))

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

35

#define XTP_PCS_PWD_ASYNC(x) FIELD_PREP(XTP_PCS_PWD_ASYNC_MASK, (x))

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

42

#define XFI_DPHY_PCS_SEL_SGMII FIELD_PREP(XFI_DPHY_PCS_SEL, 1)

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

43

#define XFI_DPHY_PCS_SEL_USXGMII FIELD_PREP(XFI_DPHY_PCS_SEL, 0)

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

56

#define XTP_GLB_USXGMII_SEL(x) FIELD_PREP(GENMASK(3, 1), (x))

drivers/phy/microchip/lan966x_serdes_regs.h

100

FIELD_PREP(HSIO_SD_CFG_RX_DATA_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

106

FIELD_PREP(HSIO_SD_CFG_LANE_LOOPBK_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

115

FIELD_PREP(HSIO_MPLL_CFG_REF_SSP_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

121

FIELD_PREP(HSIO_MPLL_CFG_REF_CLKDIV2, x)

drivers/phy/microchip/lan966x_serdes_regs.h

127

FIELD_PREP(HSIO_MPLL_CFG_MPLL_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

133

FIELD_PREP(HSIO_MPLL_CFG_MPLL_MULTIPLIER, x)

drivers/phy/microchip/lan966x_serdes_regs.h

142

FIELD_PREP(HSIO_SD_STAT_MPLL_STATE, x)

drivers/phy/microchip/lan966x_serdes_regs.h

148

FIELD_PREP(HSIO_SD_STAT_TX_STATE, x)

drivers/phy/microchip/lan966x_serdes_regs.h

154

FIELD_PREP(HSIO_SD_STAT_TX_CM_STATE, x)

drivers/phy/microchip/lan966x_serdes_regs.h

160

FIELD_PREP(HSIO_SD_STAT_RX_PLL_STATE, x)

drivers/phy/microchip/lan966x_serdes_regs.h

214

FIELD_PREP(HSIO_RGMII_CFG_TX_CLK_CFG, x)

drivers/phy/microchip/lan966x_serdes_regs.h

22

FIELD_PREP(HSIO_SD_CFG_PHY_RESET, x)

drivers/phy/microchip/lan966x_serdes_regs.h

220

FIELD_PREP(HSIO_RGMII_CFG_RGMII_TX_RST, x)

drivers/phy/microchip/lan966x_serdes_regs.h

226

FIELD_PREP(HSIO_RGMII_CFG_RGMII_RX_RST, x)

drivers/phy/microchip/lan966x_serdes_regs.h

235

FIELD_PREP(HSIO_DLL_CFG_DELAY_ENA, x)

drivers/phy/microchip/lan966x_serdes_regs.h

241

FIELD_PREP(HSIO_DLL_CFG_DLL_ENA, x)

drivers/phy/microchip/lan966x_serdes_regs.h

247

FIELD_PREP(HSIO_DLL_CFG_DLL_RST, x)

drivers/phy/microchip/lan966x_serdes_regs.h

28

FIELD_PREP(HSIO_SD_CFG_TX_RESET, x)

drivers/phy/microchip/lan966x_serdes_regs.h

34

FIELD_PREP(HSIO_SD_CFG_TX_RATE, x)

drivers/phy/microchip/lan966x_serdes_regs.h

40

FIELD_PREP(HSIO_SD_CFG_TX_INVERT, x)

drivers/phy/microchip/lan966x_serdes_regs.h

46

FIELD_PREP(HSIO_SD_CFG_TX_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

52

FIELD_PREP(HSIO_SD_CFG_TX_DATA_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

58

FIELD_PREP(HSIO_SD_CFG_TX_CM_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

64

FIELD_PREP(HSIO_SD_CFG_LANE_10BIT_SEL, x)

drivers/phy/microchip/lan966x_serdes_regs.h

70

FIELD_PREP(HSIO_SD_CFG_RX_TERM_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

76

FIELD_PREP(HSIO_SD_CFG_RX_RESET, x)

drivers/phy/microchip/lan966x_serdes_regs.h

82

FIELD_PREP(HSIO_SD_CFG_RX_RATE, x)

drivers/phy/microchip/lan966x_serdes_regs.h

88

FIELD_PREP(HSIO_SD_CFG_RX_PLL_EN, x)

drivers/phy/microchip/lan966x_serdes_regs.h

94

FIELD_PREP(HSIO_SD_CFG_RX_INVERT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1001

FIELD_PREP(SD10G_LANE_LANE_A1_R_CDR_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1007

FIELD_PREP(SD10G_LANE_LANE_A1_R_PCLK_GATING_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1013

FIELD_PREP(SD10G_LANE_LANE_A1_R_PCLK_GATING, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1024

FIELD_PREP(SD10G_LANE_LANE_A2_R_PCS2PMA_PHYMODE_4_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1035

FIELD_PREP(SD10G_LANE_LANE_DF_LOL_UDL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1041

FIELD_PREP(SD10G_LANE_LANE_DF_LOL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1047

FIELD_PREP(SD10G_LANE_LANE_DF_PMA2PCS_RXEI_FILTERED, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1053

FIELD_PREP(SD10G_LANE_LANE_DF_SQUELCH, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1064

FIELD_PREP(SD25G_LANE_CMU_09_CFG_REFCK_TERM_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1070

FIELD_PREP(SD25G_LANE_CMU_09_CFG_EN_DUMMY, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1076

FIELD_PREP(SD25G_LANE_CMU_09_CFG_PLL_LOS_SET, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1082

FIELD_PREP(SD25G_LANE_CMU_09_CFG_CTRL_LOGIC_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1088

FIELD_PREP(SD25G_LANE_CMU_09_CFG_PLL_TP_SEL_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

109

FIELD_PREP(SD10G_LANE_LANE_03_CFG_TAP_MAIN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1099

FIELD_PREP(SD25G_LANE_CMU_0B_CFG_FORCE_RX_FILT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1105

FIELD_PREP(SD25G_LANE_CMU_0B_CFG_DISLOL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1111

FIELD_PREP(SD25G_LANE_CMU_0B_CFG_RST_TREE_PD_MAN_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1117

FIELD_PREP(SD25G_LANE_CMU_0B_CFG_VCO_CAL_RESETN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1123

FIELD_PREP(SD25G_LANE_CMU_0B_CFG_VFILT2PAD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1129

FIELD_PREP(SD25G_LANE_CMU_0B_CFG_DISLOS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1135

FIELD_PREP(SD25G_LANE_CMU_0B_CFG_DCLOL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1141

FIELD_PREP(SD25G_LANE_CMU_0B_CFG_RST_TREE_PD_MAN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1152

FIELD_PREP(SD25G_LANE_CMU_0C_CFG_PLL_LOL_SET, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1158

FIELD_PREP(SD25G_LANE_CMU_0C_CFG_EN_TX_CK_DN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1164

FIELD_PREP(SD25G_LANE_CMU_0C_CFG_VCO_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1170

FIELD_PREP(SD25G_LANE_CMU_0C_CFG_EN_TX_CK_UP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1176

FIELD_PREP(SD25G_LANE_CMU_0C_CFG_VCO_DIV_MODE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1187

FIELD_PREP(SD25G_LANE_CMU_0D_CFG_CK_TREE_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1193

FIELD_PREP(SD25G_LANE_CMU_0D_CFG_EN_RX_CK_DN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1199

FIELD_PREP(SD25G_LANE_CMU_0D_CFG_EN_RX_CK_UP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

120

FIELD_PREP(SD10G_LANE_LANE_04_CFG_TAP_DLY_4_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1205

FIELD_PREP(SD25G_LANE_CMU_0D_CFG_VCO_CAL_BYP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1211

FIELD_PREP(SD25G_LANE_CMU_0D_CFG_PRE_DIVSEL_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1222

FIELD_PREP(SD25G_LANE_CMU_0E_CFG_SEL_DIV_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1228

FIELD_PREP(SD25G_LANE_CMU_0E_CFG_PMAA_CENTR_CK_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1239

FIELD_PREP(SD25G_LANE_CMU_13_CFG_PLL_RESERVE_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1245

FIELD_PREP(SD25G_LANE_CMU_13_CFG_JT_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1256

FIELD_PREP(SD25G_LANE_CMU_18_R_PLL_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1262

FIELD_PREP(SD25G_LANE_CMU_18_R_PLL_LOL_SET, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1268

FIELD_PREP(SD25G_LANE_CMU_18_R_PLL_LOS_SET, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1274

FIELD_PREP(SD25G_LANE_CMU_18_R_PLL_TP_SEL_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1285

FIELD_PREP(SD25G_LANE_CMU_19_R_CK_RESETB, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1291

FIELD_PREP(SD25G_LANE_CMU_19_R_PLL_DLOL_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1302

FIELD_PREP(SD25G_LANE_CMU_1A_R_DWIDTHCTRL_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1308

FIELD_PREP(SD25G_LANE_CMU_1A_R_DWIDTHCTRL_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

131

FIELD_PREP(SD10G_LANE_LANE_06_CFG_PD_DRIVER, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1314

FIELD_PREP(SD25G_LANE_CMU_1A_R_MASK_EI_SOURCE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1320

FIELD_PREP(SD25G_LANE_CMU_1A_R_REG_MANUAL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1331

FIELD_PREP(SD25G_LANE_CMU_2A_R_DBG_SEL_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1337

FIELD_PREP(SD25G_LANE_CMU_2A_R_DBG_LINK_LANE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1343

FIELD_PREP(SD25G_LANE_CMU_2A_R_DBG_LOL_STATUS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1354

FIELD_PREP(SD25G_LANE_CMU_30_R_TXFIFO_CK_DIV_PMAD_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1360

FIELD_PREP(SD25G_LANE_CMU_30_R_RXFIFO_CK_DIV_PMAD_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

137

FIELD_PREP(SD10G_LANE_LANE_06_CFG_PD_CLK, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1371

FIELD_PREP(SD25G_LANE_CMU_31_CFG_COMMON_RESERVE_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1382

FIELD_PREP(SD25G_LANE_CMU_40_L0_CFG_CKSKEW_CTRL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1388

FIELD_PREP(SD25G_LANE_CMU_40_L0_CFG_ISCAN_HOLD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1394

FIELD_PREP(SD25G_LANE_CMU_40_L0_CFG_PD_CLK, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1400

FIELD_PREP(SD25G_LANE_CMU_40_L0_CFG_TXCAL_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1406

FIELD_PREP(SD25G_LANE_CMU_40_L0_CFG_TXCAL_MAN_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1412

FIELD_PREP(SD25G_LANE_CMU_40_L0_CFG_TXCAL_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1423

FIELD_PREP(SD25G_LANE_CMU_45_L0_CFG_TX_RESERVE_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

143

FIELD_PREP(SD10G_LANE_LANE_06_CFG_PD_CML, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1434

FIELD_PREP(SD25G_LANE_CMU_46_L0_CFG_TX_RESERVE_15_8, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1445

FIELD_PREP(SD25G_LANE_CMU_C0_READ_VCO_CTUNE_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1451

FIELD_PREP(SD25G_LANE_CMU_C0_PLL_LOL_UDL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1462

FIELD_PREP(SD25G_LANE_CMU_FF_REGISTER_TABLE_INDEX, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1473

FIELD_PREP(SD25G_LANE_LANE_00_LN_CFG_ITX_VC_DRIVER_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1479

FIELD_PREP(SD25G_LANE_LANE_00_LN_CFG_ITX_IPCML_BASE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

149

FIELD_PREP(SD10G_LANE_LANE_06_CFG_TX2RX_LP_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1490

FIELD_PREP(SD25G_LANE_LANE_01_LN_CFG_ITX_IPDRIVER_BASE_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1496

FIELD_PREP(SD25G_LANE_LANE_01_LN_CFG_TX_PREDIV_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1507

FIELD_PREP(SD25G_LANE_LANE_03_LN_CFG_TAP_DLY_4_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1518

FIELD_PREP(SD25G_LANE_LANE_04_LN_CFG_TX2RX_LP_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1524

FIELD_PREP(SD25G_LANE_LANE_04_LN_CFG_RX2TX_LP_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1530

FIELD_PREP(SD25G_LANE_LANE_04_LN_CFG_PD_CML, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1536

FIELD_PREP(SD25G_LANE_LANE_04_LN_CFG_PD_CLK, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1542

FIELD_PREP(SD25G_LANE_LANE_04_LN_CFG_PD_DRIVER, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1548

FIELD_PREP(SD25G_LANE_LANE_04_LN_CFG_TAP_MAIN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

155

FIELD_PREP(SD10G_LANE_LANE_06_CFG_RX2TX_LP_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1559

FIELD_PREP(SD25G_LANE_LANE_05_LN_CFG_TAP_DLY2_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1565

FIELD_PREP(SD25G_LANE_LANE_05_LN_CFG_BW_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1576

FIELD_PREP(SD25G_LANE_LANE_06_LN_CFG_EN_MAIN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1582

FIELD_PREP(SD25G_LANE_LANE_06_LN_CFG_TAP_ADV_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1593

FIELD_PREP(SD25G_LANE_LANE_07_LN_CFG_EN_ADV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1599

FIELD_PREP(SD25G_LANE_LANE_07_LN_CFG_EN_DLY2, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1605

FIELD_PREP(SD25G_LANE_LANE_07_LN_CFG_EN_DLY, x)

drivers/phy/microchip/sparx5_serdes_regs.h

161

FIELD_PREP(SD10G_LANE_LANE_06_CFG_EN_PREEMPH, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1616

FIELD_PREP(SD25G_LANE_LANE_09_LN_CFG_TXCAL_VALID_SEL_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1627

FIELD_PREP(SD25G_LANE_LANE_0A_LN_CFG_TXCAL_SHIFT_CODE_5_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1638

FIELD_PREP(SD25G_LANE_LANE_0B_LN_CFG_TXCAL_MAN_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1644

FIELD_PREP(SD25G_LANE_LANE_0B_LN_CFG_TXCAL_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1650

FIELD_PREP(SD25G_LANE_LANE_0B_LN_CFG_QUAD_MAN_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1661

FIELD_PREP(SD25G_LANE_LANE_0C_LN_CFG_PMA_TX_CK_BITWIDTH_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1667

FIELD_PREP(SD25G_LANE_LANE_0C_LN_CFG_TXCAL_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1673

FIELD_PREP(SD25G_LANE_LANE_0C_LN_CFG_RXTERM_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1684

FIELD_PREP(SD25G_LANE_LANE_0D_LN_CFG_RXTERM_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1690

FIELD_PREP(SD25G_LANE_LANE_0D_LN_CFG_RSTN_DIV5_8, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1696

FIELD_PREP(SD25G_LANE_LANE_0D_LN_CFG_SUMMER_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1702

FIELD_PREP(SD25G_LANE_LANE_0D_LN_CFG_DMUX_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1708

FIELD_PREP(SD25G_LANE_LANE_0D_LN_CFG_DFECK_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1719

FIELD_PREP(SD25G_LANE_LANE_0E_LN_CFG_ISCAN_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

172

FIELD_PREP(SD10G_LANE_LANE_0B_CFG_EQ_RES_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1725

FIELD_PREP(SD25G_LANE_LANE_0E_LN_CFG_DMUX_CLK_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1731

FIELD_PREP(SD25G_LANE_LANE_0E_LN_CFG_EN_DFEDIG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1737

FIELD_PREP(SD25G_LANE_LANE_0E_LN_CFG_DFEDIG_M_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1748

FIELD_PREP(SD25G_LANE_LANE_0F_LN_CFG_DFETAP_EN_5_1, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1759

FIELD_PREP(SD25G_LANE_LANE_18_LN_CFG_CDRCK_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1765

FIELD_PREP(SD25G_LANE_LANE_18_LN_CFG_ADD_VOLT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1771

FIELD_PREP(SD25G_LANE_LANE_18_LN_CFG_MAN_VOLT_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1777

FIELD_PREP(SD25G_LANE_LANE_18_LN_CFG_ERRAMP_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

178

FIELD_PREP(SD10G_LANE_LANE_0B_CFG_PD_CTLE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1783

FIELD_PREP(SD25G_LANE_LANE_18_LN_CFG_RXDIV_SEL_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1794

FIELD_PREP(SD25G_LANE_LANE_19_LN_CFG_DCDR_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1800

FIELD_PREP(SD25G_LANE_LANE_19_LN_CFG_ECDR_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1806

FIELD_PREP(SD25G_LANE_LANE_19_LN_CFG_ISCAN_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1812

FIELD_PREP(SD25G_LANE_LANE_19_LN_CFG_TXLB_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1818

FIELD_PREP(SD25G_LANE_LANE_19_LN_CFG_RX_REG_PU, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1824

FIELD_PREP(SD25G_LANE_LANE_19_LN_CFG_RX_REG_BYP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1830

FIELD_PREP(SD25G_LANE_LANE_19_LN_CFG_PD_RMS_DET, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1836

FIELD_PREP(SD25G_LANE_LANE_19_LN_CFG_PD_CTLE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

184

FIELD_PREP(SD10G_LANE_LANE_0B_CFG_CTLE_TP_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1847

FIELD_PREP(SD25G_LANE_LANE_1A_LN_CFG_CTLE_TP_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1853

FIELD_PREP(SD25G_LANE_LANE_1A_LN_CFG_CDR_KF_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1864

FIELD_PREP(SD25G_LANE_LANE_1B_LN_CFG_CDR_M_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1875

FIELD_PREP(SD25G_LANE_LANE_1C_LN_CFG_CDR_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1881

FIELD_PREP(SD25G_LANE_LANE_1C_LN_CFG_DFE_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1887

FIELD_PREP(SD25G_LANE_LANE_1C_LN_CFG_DFEDMX_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1893

FIELD_PREP(SD25G_LANE_LANE_1C_LN_CFG_EQC_FORCE_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

190

FIELD_PREP(SD10G_LANE_LANE_0B_CFG_RESETB_OSCAL_AFE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1904

FIELD_PREP(SD25G_LANE_LANE_1D_LN_CFG_ISCAN_EXT_OVR, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1910

FIELD_PREP(SD25G_LANE_LANE_1D_LN_CFG_ISCAN_HOLD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1916

FIELD_PREP(SD25G_LANE_LANE_1D_LN_CFG_ISCAN_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1922

FIELD_PREP(SD25G_LANE_LANE_1D_LN_CFG_AGC_ADPT_BYP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1928

FIELD_PREP(SD25G_LANE_LANE_1D_LN_CFG_PHID_1T, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1934

FIELD_PREP(SD25G_LANE_LANE_1D_LN_CFG_PI_DFE_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1940

FIELD_PREP(SD25G_LANE_LANE_1D_LN_CFG_PI_EXT_OVR, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1946

FIELD_PREP(SD25G_LANE_LANE_1D_LN_CFG_PI_HOLD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1957

FIELD_PREP(SD25G_LANE_LANE_1E_LN_CFG_PI_STEPS_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

196

FIELD_PREP(SD10G_LANE_LANE_0B_CFG_RESETB_OSCAL_SQ, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1963

FIELD_PREP(SD25G_LANE_LANE_1E_LN_CFG_RXLB_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1969

FIELD_PREP(SD25G_LANE_LANE_1E_LN_CFG_SUM_SETCM_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1975

FIELD_PREP(SD25G_LANE_LANE_1E_LN_CFG_R_OFFSET_DIR, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1981

FIELD_PREP(SD25G_LANE_LANE_1E_LN_CFG_PMAD_CK_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

1992

FIELD_PREP(SD25G_LANE_LANE_21_LN_CFG_VGA_CTRL_BYP_4_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2003

FIELD_PREP(SD25G_LANE_LANE_22_LN_CFG_EQR_FORCE_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2014

FIELD_PREP(SD25G_LANE_LANE_25_LN_CFG_INIT_POS_ISCAN_6_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2025

FIELD_PREP(SD25G_LANE_LANE_26_LN_CFG_INIT_POS_IPI_6_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2036

FIELD_PREP(SD25G_LANE_LANE_28_LN_CFG_ISCAN_MODE_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2042

FIELD_PREP(SD25G_LANE_LANE_28_LN_CFG_RX_SSC_LH, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2048

FIELD_PREP(SD25G_LANE_LANE_28_LN_CFG_FIGMERIT_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2054

FIELD_PREP(SD25G_LANE_LANE_28_LN_CFG_RX_SUBRATE_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2065

FIELD_PREP(SD25G_LANE_LANE_2B_LN_CFG_PI_BW_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

207

FIELD_PREP(SD10G_LANE_LANE_0C_CFG_OSCAL_AFE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2071

FIELD_PREP(SD25G_LANE_LANE_2B_LN_CFG_RSTN_DMUX_SUBR, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2077

FIELD_PREP(SD25G_LANE_LANE_2B_LN_CFG_RSTN_TXDUPU, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2088

FIELD_PREP(SD25G_LANE_LANE_2C_LN_CFG_TX_SUBRATE_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2094

FIELD_PREP(SD25G_LANE_LANE_2C_LN_CFG_DIS_2NDORDER, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2105

FIELD_PREP(SD25G_LANE_LANE_2D_LN_CFG_ALOS_THR_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2111

FIELD_PREP(SD25G_LANE_LANE_2D_LN_CFG_SAT_CNTSEL_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2122

FIELD_PREP(SD25G_LANE_LANE_2E_LN_CFG_EN_FAST_ISCAN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2128

FIELD_PREP(SD25G_LANE_LANE_2E_LN_CFG_DIS_SQ, x)

drivers/phy/microchip/sparx5_serdes_regs.h

213

FIELD_PREP(SD10G_LANE_LANE_0C_CFG_OSCAL_SQ, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2134

FIELD_PREP(SD25G_LANE_LANE_2E_LN_CFG_PD_SQ, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2140

FIELD_PREP(SD25G_LANE_LANE_2E_LN_CFG_DIS_ALOS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2146

FIELD_PREP(SD25G_LANE_LANE_2E_LN_CFG_RESETN_AGC, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2152

FIELD_PREP(SD25G_LANE_LANE_2E_LN_CFG_RSTN_DFEDIG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2158

FIELD_PREP(SD25G_LANE_LANE_2E_LN_CFG_PI_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2164

FIELD_PREP(SD25G_LANE_LANE_2E_LN_CFG_CTLE_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2175

FIELD_PREP(SD25G_LANE_LANE_40_LN_R_TX_BIT_REVERSE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2181

FIELD_PREP(SD25G_LANE_LANE_40_LN_R_TX_POL_INV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2187

FIELD_PREP(SD25G_LANE_LANE_40_LN_R_RX_BIT_REVERSE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

219

FIELD_PREP(SD10G_LANE_LANE_0C_CFG_OSDAC_2X_AFE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2193

FIELD_PREP(SD25G_LANE_LANE_40_LN_R_RX_POL_INV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2199

FIELD_PREP(SD25G_LANE_LANE_40_LN_R_CDR_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2205

FIELD_PREP(SD25G_LANE_LANE_40_LN_R_DFE_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2211

FIELD_PREP(SD25G_LANE_LANE_40_LN_R_CTLE_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2222

FIELD_PREP(SD25G_LANE_LANE_42_LN_CFG_TX_RESERVE_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2233

FIELD_PREP(SD25G_LANE_LANE_43_LN_CFG_TX_RESERVE_15_8, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2244

FIELD_PREP(SD25G_LANE_LANE_44_LN_CFG_RX_RESERVE_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

225

FIELD_PREP(SD10G_LANE_LANE_0C_CFG_OSDAC_2X_SQ, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2255

FIELD_PREP(SD25G_LANE_LANE_45_LN_CFG_RX_RESERVE_15_8, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2266

FIELD_PREP(SD25G_LANE_LANE_DE_LN_LOL_UDL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2272

FIELD_PREP(SD25G_LANE_LANE_DE_LN_LOL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2278

FIELD_PREP(SD25G_LANE_LANE_DE_LN_PMA2PCS_RXEI_FILTERED, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2284

FIELD_PREP(SD25G_LANE_LANE_DE_LN_PMA_RXEI, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2295

FIELD_PREP(SD6G_LANE_LANE_DF_LOL_UDL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2301

FIELD_PREP(SD6G_LANE_LANE_DF_LOL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2307

FIELD_PREP(SD6G_LANE_LANE_DF_PMA2PCS_RXEI_FILTERED, x)

drivers/phy/microchip/sparx5_serdes_regs.h

231

FIELD_PREP(SD10G_LANE_LANE_0C_CFG_PD_OSDAC_AFE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2313

FIELD_PREP(SD6G_LANE_LANE_DF_SQUELCH, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2323

FIELD_PREP(SD_CMU_CMU_00_R_HWT_SIMULATION_MODE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2329

FIELD_PREP(SD_CMU_CMU_00_CFG_PLL_LOL_SET, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2335

FIELD_PREP(SD_CMU_CMU_00_CFG_PLL_LOS_SET, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2341

FIELD_PREP(SD_CMU_CMU_00_CFG_PLL_TP_SEL_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2351

FIELD_PREP(SD_CMU_CMU_05_CFG_REFCK_TERM_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2357

FIELD_PREP(SD_CMU_CMU_05_CFG_BIAS_TP_SEL_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2367

FIELD_PREP(SD_CMU_CMU_06_CFG_DISLOS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

237

FIELD_PREP(SD10G_LANE_LANE_0C_CFG_PD_OSDAC_SQ, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2373

FIELD_PREP(SD_CMU_CMU_06_CFG_DISLOL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2379

FIELD_PREP(SD_CMU_CMU_06_CFG_DCLOL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2385

FIELD_PREP(SD_CMU_CMU_06_CFG_FORCE_RX_FILT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2391

FIELD_PREP(SD_CMU_CMU_06_CFG_CTRL_LOGIC_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2397

FIELD_PREP(SD_CMU_CMU_06_CFG_VCO_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2403

FIELD_PREP(SD_CMU_CMU_06_CFG_VCO_CAL_RESETN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2409

FIELD_PREP(SD_CMU_CMU_06_CFG_VCO_CAL_BYP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2419

FIELD_PREP(SD_CMU_CMU_08_CFG_VFILT2PAD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2425

FIELD_PREP(SD_CMU_CMU_08_CFG_EN_DUMMY, x)

drivers/phy/microchip/sparx5_serdes_regs.h

243

FIELD_PREP(SD10G_LANE_LANE_0C_CFG_PD_RX_LS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2431

FIELD_PREP(SD_CMU_CMU_08_CFG_CK_TREE_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2437

FIELD_PREP(SD_CMU_CMU_08_CFG_RST_TREE_PD_MAN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2443

FIELD_PREP(SD_CMU_CMU_08_CFG_RST_TREE_PD_MAN_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2453

FIELD_PREP(SD_CMU_CMU_09_CFG_EN_TX_CK_UP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2459

FIELD_PREP(SD_CMU_CMU_09_CFG_EN_TX_CK_DN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2465

FIELD_PREP(SD_CMU_CMU_09_CFG_SW_8G, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2471

FIELD_PREP(SD_CMU_CMU_09_CFG_SW_10G, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2481

FIELD_PREP(SD_CMU_CMU_0D_CFG_PD_DIV64, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2487

FIELD_PREP(SD_CMU_CMU_0D_CFG_PD_DIV66, x)

drivers/phy/microchip/sparx5_serdes_regs.h

249

FIELD_PREP(SD10G_LANE_LANE_0C_CFG_RX_PCIE_GEN12, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2493

FIELD_PREP(SD_CMU_CMU_0D_CFG_PMA_TX_CK_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2499

FIELD_PREP(SD_CMU_CMU_0D_CFG_JC_BYP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2505

FIELD_PREP(SD_CMU_CMU_0D_CFG_REFCK_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2515

FIELD_PREP(SD_CMU_CMU_1B_CFG_RESERVE_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2525

FIELD_PREP(SD_CMU_CMU_1F_CFG_BIAS_DN_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2531

FIELD_PREP(SD_CMU_CMU_1F_CFG_BIAS_UP_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2537

FIELD_PREP(SD_CMU_CMU_1F_CFG_IC2IP_N, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2543

FIELD_PREP(SD_CMU_CMU_1F_CFG_VTUNE_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2553

FIELD_PREP(SD_CMU_CMU_30_R_PLL_DLOL_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2563

FIELD_PREP(SD_CMU_CMU_44_R_PLL_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2569

FIELD_PREP(SD_CMU_CMU_44_R_CK_RESETB, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2579

FIELD_PREP(SD_CMU_CMU_45_R_EN_RATECHG_CTRL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2585

FIELD_PREP(SD_CMU_CMU_45_R_DWIDTHCTRL_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2591

FIELD_PREP(SD_CMU_CMU_45_RESERVED, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2597

FIELD_PREP(SD_CMU_CMU_45_R_REFCK_SSC_EN_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

260

FIELD_PREP(SD10G_LANE_LANE_0D_CFG_CTLE_M_THR_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2603

FIELD_PREP(SD_CMU_CMU_45_RESERVED_2, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2609

FIELD_PREP(SD_CMU_CMU_45_R_LINK_BUF_EN_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2615

FIELD_PREP(SD_CMU_CMU_45_R_BIAS_EN_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2621

FIELD_PREP(SD_CMU_CMU_45_R_AUTO_RST_TREE_PD_MAN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2631

FIELD_PREP(SD_CMU_CMU_47_R_PCS2PMA_PHYMODE_4_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2641

FIELD_PREP(SD_CMU_CMU_E0_READ_VCO_CTUNE_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2647

FIELD_PREP(SD_CMU_CMU_E0_PLL_LOL_UDL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2658

FIELD_PREP(SD_CMU_CFG_SD_CMU_CFG_CMU_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

266

FIELD_PREP(SD10G_LANE_LANE_0D_CFG_EQR_BYP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2664

FIELD_PREP(SD_CMU_CFG_SD_CMU_CFG_EXT_CFG_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2674

FIELD_PREP(SD_LANE_SD_SER_RST_SER_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2684

FIELD_PREP(SD_LANE_SD_DES_RST_DES_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2694

FIELD_PREP(SD_LANE_SD_LANE_CFG_MACRO_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2700

FIELD_PREP(SD_LANE_SD_LANE_CFG_EXT_CFG_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2706

FIELD_PREP(SD_LANE_SD_LANE_CFG_TX_REF_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2712

FIELD_PREP(SD_LANE_SD_LANE_CFG_RX_REF_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2718

FIELD_PREP(SD_LANE_SD_LANE_CFG_LANE_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2724

FIELD_PREP(SD_LANE_SD_LANE_CFG_LANE_TX_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2730

FIELD_PREP(SD_LANE_SD_LANE_CFG_LANE_RX_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2740

FIELD_PREP(SD_LANE_SD_LANE_STAT_PMA_RST_DONE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2746

FIELD_PREP(SD_LANE_SD_LANE_STAT_DFE_RST_DONE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2752

FIELD_PREP(SD_LANE_SD_LANE_STAT_DBG_OBS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2762

FIELD_PREP(SD_LANE_QUIET_MODE_6G_QUIET_MODE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

277

FIELD_PREP(SD10G_LANE_LANE_0E_CFG_EQC_FORCE_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2772

FIELD_PREP(SD_LANE_MISC_SD_125_RST_DIS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2778

FIELD_PREP(SD_LANE_MISC_RX_ENA, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2784

FIELD_PREP(SD_LANE_MISC_MUX_ENA, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2791

FIELD_PREP(SD_LANE_MISC_CORE_CLK_FREQ, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2801

FIELD_PREP(SD_LANE_M_STAT_MISC_M_RIS_EDGE_PTR_ADJ_SUM, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2807

FIELD_PREP(SD_LANE_M_STAT_MISC_M_LOCK_CNT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2818

FIELD_PREP(SD_LANE_25G_SD_SER_RST_SER_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2829

FIELD_PREP(SD_LANE_25G_SD_DES_RST_DES_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

283

FIELD_PREP(SD10G_LANE_LANE_0E_CFG_RXLB_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2840

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_MACRO_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2846

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_EXT_CFG_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2852

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_HWT_MULTI_LANE_MODE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2858

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS2PMA_PHYMODE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2864

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_LANE_RST, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2870

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS_EN_ADV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2876

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS_EN_MAIN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2882

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS_EN_DLY, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2888

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS_TAP_ADV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

289

FIELD_PREP(SD10G_LANE_LANE_0E_CFG_TXLB_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2894

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS_TAP_MAIN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2900

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS_TAP_DLY, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2906

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS_ISCAN_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2912

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS_EN_FAST_ISCAN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2918

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS2PMA_TXSWING, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2924

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS2PMA_TXEI, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2930

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG_PCS2PMA_TXMARGIN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2941

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_DATA_WIDTH_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2947

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_PMA_TXCK_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

295

FIELD_PREP(SD10G_LANE_LANE_0E_CFG_SUM_SETCM_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2953

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_PMA_RXDIV_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2959

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_PCS2PMA_TX_SPEED, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2965

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_TXFIFO_CK_DIV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2971

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_RXFIFO_CK_DIV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2977

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_HWT_VCO_DIV_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2983

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_HWT_CFG_SEL_DIV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2989

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_HWT_PRE_DIVSEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

2995

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_TXRATE_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

3001

FIELD_PREP(SD_LANE_25G_SD_LANE_CFG2_RXRATE_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

3012

FIELD_PREP(SD_LANE_25G_SD_LANE_STAT_PMA_RST_DONE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

3018

FIELD_PREP(SD_LANE_25G_SD_LANE_STAT_LANE_RST_DONE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

3024

FIELD_PREP(SD_LANE_25G_SD_LANE_STAT_DBG_OBS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

3035

FIELD_PREP(SD_LANE_25G_QUIET_MODE_6G_QUIET_MODE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

306

FIELD_PREP(SD10G_LANE_LANE_0F_R_CDR_M_GEN1_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

317

FIELD_PREP(SD10G_LANE_LANE_13_CFG_DCDR_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

323

FIELD_PREP(SD10G_LANE_LANE_13_CFG_PHID_1T, x)

drivers/phy/microchip/sparx5_serdes_regs.h

329

FIELD_PREP(SD10G_LANE_LANE_13_CFG_CDRCK_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

340

FIELD_PREP(SD10G_LANE_LANE_14_CFG_PI_EXT_DAC_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

351

FIELD_PREP(SD10G_LANE_LANE_15_CFG_PI_EXT_DAC_15_8, x)

drivers/phy/microchip/sparx5_serdes_regs.h

362

FIELD_PREP(SD10G_LANE_LANE_16_CFG_PI_EXT_DAC_23_16, x)

drivers/phy/microchip/sparx5_serdes_regs.h

373

FIELD_PREP(SD10G_LANE_LANE_1A_CFG_PI_R_SCAN_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

379

FIELD_PREP(SD10G_LANE_LANE_1A_CFG_PI_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

385

FIELD_PREP(SD10G_LANE_LANE_1A_CFG_PI_DFE_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

391

FIELD_PREP(SD10G_LANE_LANE_1A_CFG_PI_STEPS, x)

drivers/phy/microchip/sparx5_serdes_regs.h

397

FIELD_PREP(SD10G_LANE_LANE_1A_CFG_PI_FLOOP_STEPS_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

408

FIELD_PREP(SD10G_LANE_LANE_22_CFG_DFETAP_EN_5_1, x)

drivers/phy/microchip/sparx5_serdes_regs.h

419

FIELD_PREP(SD10G_LANE_LANE_23_CFG_DFE_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

425

FIELD_PREP(SD10G_LANE_LANE_23_CFG_EN_DFEDIG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

431

FIELD_PREP(SD10G_LANE_LANE_23_CFG_DFECK_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

437

FIELD_PREP(SD10G_LANE_LANE_23_CFG_ERRAMP_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

443

FIELD_PREP(SD10G_LANE_LANE_23_CFG_DFEDIG_M_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

454

FIELD_PREP(SD10G_LANE_LANE_24_CFG_PI_BW_GEN1_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

460

FIELD_PREP(SD10G_LANE_LANE_24_CFG_PI_BW_GEN2_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

471

FIELD_PREP(SD10G_LANE_LANE_26_CFG_ISCAN_EXT_DAC_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

482

FIELD_PREP(SD10G_LANE_LANE_2F_CFG_VGA_CP_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

488

FIELD_PREP(SD10G_LANE_LANE_2F_CFG_VGA_CTRL_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

499

FIELD_PREP(SD10G_LANE_LANE_30_CFG_SUMMER_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

505

FIELD_PREP(SD10G_LANE_LANE_30_CFG_RXDIV_SEL_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

51

FIELD_PREP(SD10G_LANE_LANE_01_CFG_PMA_TX_CK_BITWIDTH_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

516

FIELD_PREP(SD10G_LANE_LANE_31_CFG_PI_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

522

FIELD_PREP(SD10G_LANE_LANE_31_CFG_CDR_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

528

FIELD_PREP(SD10G_LANE_LANE_31_CFG_RSTN_DFEDIG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

534

FIELD_PREP(SD10G_LANE_LANE_31_CFG_CTLE_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

540

FIELD_PREP(SD10G_LANE_LANE_31_CFG_RSTN_DIV5_8, x)

drivers/phy/microchip/sparx5_serdes_regs.h

546

FIELD_PREP(SD10G_LANE_LANE_31_CFG_R50_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

557

FIELD_PREP(SD10G_LANE_LANE_32_CFG_ITX_IPCLK_BASE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

563

FIELD_PREP(SD10G_LANE_LANE_32_CFG_ITX_IPCML_BASE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

57

FIELD_PREP(SD10G_LANE_LANE_01_CFG_RXDET_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

574

FIELD_PREP(SD10G_LANE_LANE_33_CFG_ITX_IPDRIVER_BASE_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

580

FIELD_PREP(SD10G_LANE_LANE_33_CFG_ITX_IPPREEMP_BASE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

591

FIELD_PREP(SD10G_LANE_LANE_35_CFG_TXRATE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

597

FIELD_PREP(SD10G_LANE_LANE_35_CFG_RXRATE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

608

FIELD_PREP(SD10G_LANE_LANE_36_CFG_PREDRV_SLEWRATE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

614

FIELD_PREP(SD10G_LANE_LANE_36_CFG_EID_LP, x)

drivers/phy/microchip/sparx5_serdes_regs.h

620

FIELD_PREP(SD10G_LANE_LANE_36_CFG_EN_PREDRV_EMPH, x)

drivers/phy/microchip/sparx5_serdes_regs.h

626

FIELD_PREP(SD10G_LANE_LANE_36_CFG_PRBS_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

63

FIELD_PREP(SD10G_LANE_LANE_01_CFG_RXDET_STR, x)

drivers/phy/microchip/sparx5_serdes_regs.h

632

FIELD_PREP(SD10G_LANE_LANE_36_CFG_PRBS_SETB, x)

drivers/phy/microchip/sparx5_serdes_regs.h

643

FIELD_PREP(SD10G_LANE_LANE_37_CFG_RXDET_COMP_PD, x)

drivers/phy/microchip/sparx5_serdes_regs.h

649

FIELD_PREP(SD10G_LANE_LANE_37_CFG_PD_RX_CKTREE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

655

FIELD_PREP(SD10G_LANE_LANE_37_CFG_TXSWING_HALF, x)

drivers/phy/microchip/sparx5_serdes_regs.h

661

FIELD_PREP(SD10G_LANE_LANE_37_CFG_IP_PRE_BASE_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

672

FIELD_PREP(SD10G_LANE_LANE_39_CFG_RXFILT_Y_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

678

FIELD_PREP(SD10G_LANE_LANE_39_CFG_RX_SSC_LH, x)

drivers/phy/microchip/sparx5_serdes_regs.h

689

FIELD_PREP(SD10G_LANE_LANE_3A_CFG_MP_MIN_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

695

FIELD_PREP(SD10G_LANE_LANE_3A_CFG_MP_MAX_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

706

FIELD_PREP(SD10G_LANE_LANE_3C_CFG_DIS_ACC, x)

drivers/phy/microchip/sparx5_serdes_regs.h

712

FIELD_PREP(SD10G_LANE_LANE_3C_CFG_DIS_2NDORDER, x)

drivers/phy/microchip/sparx5_serdes_regs.h

723

FIELD_PREP(SD10G_LANE_LANE_40_CFG_LANE_RESERVE_7_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

734

FIELD_PREP(SD10G_LANE_LANE_41_CFG_LANE_RESERVE_15_8, x)

drivers/phy/microchip/sparx5_serdes_regs.h

74

FIELD_PREP(SD10G_LANE_LANE_02_CFG_EN_ADV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

745

FIELD_PREP(SD10G_LANE_LANE_42_CFG_CDR_KF_GEN1_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

751

FIELD_PREP(SD10G_LANE_LANE_42_CFG_CDR_KF_GEN2_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

762

FIELD_PREP(SD10G_LANE_LANE_48_CFG_ALOS_THR_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

768

FIELD_PREP(SD10G_LANE_LANE_48_CFG_AUX_RXCK_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

774

FIELD_PREP(SD10G_LANE_LANE_48_CFG_CLK_ENQ, x)

drivers/phy/microchip/sparx5_serdes_regs.h

785

FIELD_PREP(SD10G_LANE_LANE_50_CFG_SSC_PI_STEP_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

791

FIELD_PREP(SD10G_LANE_LANE_50_CFG_SSC_RESETB, x)

drivers/phy/microchip/sparx5_serdes_regs.h

797

FIELD_PREP(SD10G_LANE_LANE_50_CFG_SSC_RTL_CLK_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

80

FIELD_PREP(SD10G_LANE_LANE_02_CFG_EN_MAIN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

803

FIELD_PREP(SD10G_LANE_LANE_50_CFG_AUX_TXCK_SEL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

809

FIELD_PREP(SD10G_LANE_LANE_50_CFG_JT_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

820

FIELD_PREP(SD10G_LANE_LANE_52_CFG_IBIAS_TUNE_RESERVE_5_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

831

FIELD_PREP(SD10G_LANE_LANE_83_R_TX_BIT_REVERSE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

837

FIELD_PREP(SD10G_LANE_LANE_83_R_TX_POL_INV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

843

FIELD_PREP(SD10G_LANE_LANE_83_R_RX_BIT_REVERSE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

849

FIELD_PREP(SD10G_LANE_LANE_83_R_RX_POL_INV, x)

drivers/phy/microchip/sparx5_serdes_regs.h

855

FIELD_PREP(SD10G_LANE_LANE_83_R_DFE_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

86

FIELD_PREP(SD10G_LANE_LANE_02_CFG_EN_DLY, x)

drivers/phy/microchip/sparx5_serdes_regs.h

861

FIELD_PREP(SD10G_LANE_LANE_83_R_CDR_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

867

FIELD_PREP(SD10G_LANE_LANE_83_R_CTLE_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

878

FIELD_PREP(SD10G_LANE_LANE_93_R_RXEI_FIFO_RST_EN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

884

FIELD_PREP(SD10G_LANE_LANE_93_R_DWIDTHCTRL_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

890

FIELD_PREP(SD10G_LANE_LANE_93_R_DIS_RESTORE_DFE, x)

drivers/phy/microchip/sparx5_serdes_regs.h

896

FIELD_PREP(SD10G_LANE_LANE_93_R_EN_RATECHG_CTRL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

902

FIELD_PREP(SD10G_LANE_LANE_93_R_REG_MANUAL, x)

drivers/phy/microchip/sparx5_serdes_regs.h

908

FIELD_PREP(SD10G_LANE_LANE_93_R_AUXCKSEL_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

914

FIELD_PREP(SD10G_LANE_LANE_93_R_LANE_ID_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

92

FIELD_PREP(SD10G_LANE_LANE_02_CFG_EN_DLY2, x)

drivers/phy/microchip/sparx5_serdes_regs.h

920

FIELD_PREP(SD10G_LANE_LANE_93_R_RX_PCIE_GEN12_FROM_HWT, x)

drivers/phy/microchip/sparx5_serdes_regs.h

931

FIELD_PREP(SD10G_LANE_LANE_94_R_DWIDTHCTRL_2_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

937

FIELD_PREP(SD10G_LANE_LANE_94_R_ISCAN_REG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

943

FIELD_PREP(SD10G_LANE_LANE_94_R_TXEQ_REG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

949

FIELD_PREP(SD10G_LANE_LANE_94_R_MISC_REG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

955

FIELD_PREP(SD10G_LANE_LANE_94_R_SWING_REG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

966

FIELD_PREP(SD10G_LANE_LANE_9E_R_RXEQ_REG, x)

drivers/phy/microchip/sparx5_serdes_regs.h

972

FIELD_PREP(SD10G_LANE_LANE_9E_R_AUTO_RST_TREE_PD_MAN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

978

FIELD_PREP(SD10G_LANE_LANE_9E_R_EN_AUTO_CDR_RSTN, x)

drivers/phy/microchip/sparx5_serdes_regs.h

98

FIELD_PREP(SD10G_LANE_LANE_02_CFG_TAP_ADV_3_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

989

FIELD_PREP(SD10G_LANE_LANE_A1_R_PMA_TXCK_DIV_SEL_1_0, x)

drivers/phy/microchip/sparx5_serdes_regs.h

995

FIELD_PREP(SD10G_LANE_LANE_A1_R_SSC_FROM_HWT, x)

drivers/phy/phy-airoha-pcie.c

1116

val = FIELD_PREP(PCIE_XTP_RXDET_VCM_OFF_STB_T_SEL, 0x33) |

drivers/phy/phy-airoha-pcie.c

1117

FIELD_PREP(PCIE_XTP_RXDET_EN_STB_T_SEL, 0x1) |

drivers/phy/phy-airoha-pcie.c

1118

FIELD_PREP(PCIE_XTP_RXDET_FINISH_STB_T_SEL, 0x2) |

drivers/phy/phy-airoha-pcie.c

1119

FIELD_PREP(PCIE_XTP_TXPD_TX_DATA_EN_DLY, 0x3) |

drivers/phy/phy-airoha-pcie.c

1120

FIELD_PREP(PCIE_XTP_RXDET_LATCH_STB_T_SEL, 0x1);

drivers/phy/phy-airoha-pcie.c

1124

val = FIELD_PREP(PCIE_XTP_LN_RX_PDOWN_L1P2_EXIT_WAIT, 0x32) |

drivers/phy/phy-airoha-pcie.c

1125

FIELD_PREP(PCIE_XTP_LN_RX_PDOWN_E0_AEQEN_WAIT, 0x5050);

drivers/phy/phy-airoha-pcie.c

80

FIELD_PREP((mask), (val))); \

drivers/phy/phy-google-usb.c

112

reg |= FIELD_PREP(USBCS_USB2PHY_CFG21_REF_FREQ_SEL, 0);

drivers/phy/phy-google-usb.c

117

reg |= FIELD_PREP(USBCS_USB2PHY_CFG19_PHY_CFG_PLL_FB_DIV, 368);

drivers/phy/phy-lgm-usb.c

33

(TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_USB))

drivers/phy/phy-lgm-usb.c

35

(TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_NC) | TCPC_LOW_POWER_EN)

drivers/phy/phy-snps-eusb2.c

208

FIELD_PREP(PHY_CFG_TX_PREEMP_TUNE_MASK, 0));

drivers/phy/phy-snps-eusb2.c

213

FIELD_PREP(PHY_CFG_TX_RISE_TUNE_MASK, 0x2));

drivers/phy/phy-snps-eusb2.c

218

FIELD_PREP(PHY_CFG_TX_RES_TUNE_MASK, 0x1));

drivers/phy/phy-snps-eusb2.c

223

FIELD_PREP(PHY_CFG_TX_HS_VREF_TUNE_MASK, 0x3));

drivers/phy/phy-snps-eusb2.c

228

FIELD_PREP(PHY_CFG_TX_HS_XV_TUNE_MASK, 0x0));

drivers/phy/phy-snps-eusb2.c

265

FIELD_PREP(FSEL_MASK, config->fsel_val));

drivers/phy/phy-snps-eusb2.c

269

FIELD_PREP(PHY_CFG_PLL_FB_DIV_19_8_MASK,

drivers/phy/phy-snps-eusb2.c

302

FIELD_PREP(FSEL_MASK, config->fsel_val));

drivers/phy/phy-snps-eusb2.c

339

FIELD_PREP(EXYNOS_PHY_CFG_TX_FSLS_VREF_TUNE_MASK, 0x0));

drivers/phy/phy-snps-eusb2.c

395

FIELD_PREP(PHY_CFG_PLL_CPBIAS_CNTRL_MASK, 0x0));

drivers/phy/phy-snps-eusb2.c

399

FIELD_PREP(PHY_CFG_PLL_INT_CNTRL_MASK, 0x8));

drivers/phy/phy-snps-eusb2.c

403

FIELD_PREP(PHY_CFG_PLL_GMP_CNTRL_MASK, 0x1));

drivers/phy/phy-snps-eusb2.c

407

FIELD_PREP(PHY_CFG_PLL_PROP_CNTRL_MASK, 0x10));

drivers/phy/phy-snps-eusb2.c

411

FIELD_PREP(PHY_CFG_PLL_VCO_CNTRL_MASK, 0x0));

drivers/phy/phy-snps-eusb2.c

415

FIELD_PREP(PHY_CFG_PLL_VREF_TUNE_MASK, 0x1));

drivers/phy/phy-spacemit-k1-pcie.c

194

val |= FIELD_PREP(CFG_INTERNAL_TIMER_ADJ, TIMER_ADJ_USB);

drivers/phy/phy-spacemit-k1-pcie.c

199

val |= FIELD_PREP(SSC_DEP_SEL, SSC_DEP_5000PPM);

drivers/phy/phy-spacemit-k1-pcie.c

213

val |= FIELD_PREP(CFG_INTERNAL_TIMER_ADJ, TIMER_ADJ_PCIE);

drivers/phy/phy-spacemit-k1-pcie.c

226

val |= FIELD_PREP(SSC_DEP_SEL, SSC_DEP_NONE);

drivers/phy/phy-spacemit-k1-pcie.c

253

val |= FIELD_PREP(FREF_SEL, FREF_24M);

drivers/phy/phy-spacemit-k1-pcie.c

341

val |= FIELD_PREP(AFE_RTERM_REG, rx_rterm);

drivers/phy/phy-spacemit-k1-pcie.c

356

val |= FIELD_PREP(TX_RTERM_REG, tx_rterm);

drivers/phy/phy-spacemit-k1-pcie.c

365

val |= FIELD_PREP(CLKSEL, CLKSEL_24M);

drivers/phy/phy-spacemit-k1-pcie.c

377

val |= FIELD_PREP(CFG_REFCLK_MODE, RFCLK_MODE_DRIVER);

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

78

FIELD_PREP(PHY_PARAM_CTRL1_TX_FULL_SWING_MASK, (x))

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

80

FIELD_PREP(PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK, (x))

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

82

FIELD_PREP(PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK, x)

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

84

FIELD_PREP(PHY_PARAM_CTRL1_LOS_BIAS_MASK, (x))

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

91

#define RX_OVRD_IN_HI_RX_EQ(x) FIELD_PREP(RX_OVRD_IN_HI_RX_EQ_MASK, (x))

drivers/phy/qualcomm/phy-qcom-m31-eusb2.c

213

FIELD_PREP(FSEL, data->fsel));

drivers/phy/ralink/phy-mt7621-pci.c

131

FIELD_PREP(RG_PE1_H_XTAL_TYPE, 0x00));

drivers/phy/ralink/phy-mt7621-pci.c

145

FIELD_PREP(RG_PE1_H_PLL_PREDIV, 0x01));

drivers/phy/ralink/phy-mt7621-pci.c

150

FIELD_PREP(RG_PE1_H_PLL_PREDIV, 0x00));

drivers/phy/ralink/phy-mt7621-pci.c

155

FIELD_PREP(RG_PE1_H_PLL_FBKSEL, 0x01));

drivers/phy/ralink/phy-mt7621-pci.c

160

FIELD_PREP(RG_PE1_H_LCDDS_SSC_PRD, 0x00));

drivers/phy/ralink/phy-mt7621-pci.c

165

FIELD_PREP(RG_PE1_H_LCDDS_SSC_PRD, 0x18d));

drivers/phy/ralink/phy-mt7621-pci.c

171

FIELD_PREP(RG_PE1_H_LCDDS_SSC_DELTA, 0x4a) |

drivers/phy/ralink/phy-mt7621-pci.c

172

FIELD_PREP(RG_PE1_H_LCDDS_SSC_DELTA1, 0x4a));

drivers/phy/ralink/phy-mt7621-pci.c

177

FIELD_PREP(RG_PE1_H_PLL_PREDIV, 0x00));

drivers/phy/ralink/phy-mt7621-pci.c

190

FIELD_PREP(RG_PE1_H_PLL_BC, 0x02) |

drivers/phy/ralink/phy-mt7621-pci.c

191

FIELD_PREP(RG_PE1_H_PLL_BP, 0x06) |

drivers/phy/ralink/phy-mt7621-pci.c

192

FIELD_PREP(RG_PE1_H_PLL_IR, 0x02) |

drivers/phy/ralink/phy-mt7621-pci.c

193

FIELD_PREP(RG_PE1_H_PLL_IC, 0x01) |

drivers/phy/ralink/phy-mt7621-pci.c

194

FIELD_PREP(RG_PE1_PLL_DIVEN, 0x02));

drivers/phy/ralink/phy-mt7621-pci.c

197

FIELD_PREP(RG_PE1_H_PLL_BR, 0x00));

drivers/phy/ralink/phy-mt7621-pci.c

203

FIELD_PREP(RG_PE1_MSTCKDIV, 0x01) |

drivers/phy/renesas/phy-rzg3e-usb3.c

82

val |= FIELD_PREP(USB3_TEST_PRMCTRL5_R_TXPREEMPAMPTUNE0_MASK, 2);

drivers/phy/renesas/phy-rzg3e-usb3.c

87

val |= FIELD_PREP(USB3_TEST_PRMCTRL6_R_OTGTUNE0_MASK, 7);

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

270

val = FIELD_PREP(CSIDPHY_CTRL_LANE_ENABLE_MASK, GENMASK(priv->config.lanes - 1, 0)) |

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

271

FIELD_PREP(CSIDPHY_CTRL_LANE_ENABLE_CK, 1) |

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

272

FIELD_PREP(CSIDPHY_CTRL_LANE_ENABLE_UNDEFINED, 1);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

1003

val = FIELD_PREP(RK3568_PHYREG6_PLL_DIV_MASK, RK3568_PHYREG6_PLL_DIV_2);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

1051

val = FIELD_PREP(RK3568_PHYREG15_SSC_CNT_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

1059

val = FIELD_PREP(RK3568_PHYREG33_PLL_KVCO_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

1092

val = FIELD_PREP(RK3568_PHYREG33_PLL_KVCO_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

1114

val = FIELD_PREP(RK3568_PHYREG32_SSC_DIR_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

1116

val |= FIELD_PREP(RK3568_PHYREG32_SSC_OFFSET_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

1136

val = FIELD_PREP(RK3568_PHYREG33_PLL_KVCO_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

1187

val = FIELD_PREP(RK3568_PHYREG33_PLL_KVCO_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

456

val = FIELD_PREP(RK3528_PHYREG6_SSC_DIR, RK3528_PHYREG6_SSC_DOWNWARD);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

472

val = FIELD_PREP(RK3528_PHYREG81_SLEW_RATE_CTRL,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

482

val = FIELD_PREP(RK3528_PHYREG83_RX_SQUELCH, RK3528_PHYREG83_RX_SQUELCH_VALUE);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

502

val = FIELD_PREP(RK3528_PHYREG40_SSC_CNT, RK3528_PHYREG40_SSC_CNT_VALUE);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

519

val = FIELD_PREP(RK3528_PHYREG6_PLL_KVCO, RK3528_PHYREG6_PLL_KVCO_VALUE);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

536

val = FIELD_PREP(RK3528_PHYREG42_CKDRV_CLK_SEL,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

538

val |= FIELD_PREP(RK3528_PHYREG42_PLL_LPF_R1_ADJ,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

540

val |= FIELD_PREP(RK3528_PHYREG42_PLL_CHGPUMP_CUR_ADJ,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

542

val |= FIELD_PREP(RK3528_PHYREG42_PLL_KVCO_ADJ,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

551

val = FIELD_PREP(RK3528_PHYREG6_PLL_KVCO, RK3528_PHYREG6_PLL_KVCO_VALUE);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

630

val = FIELD_PREP(RK3568_PHYREG6_PLL_DIV_MASK, RK3568_PHYREG6_PLL_DIV_2);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

655

val = FIELD_PREP(RK3568_PHYREG15_SSC_CNT_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

674

val = FIELD_PREP(RK3568_PHYREG33_PLL_KVCO_MASK,

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

976

val = FIELD_PREP(RK3568_PHYREG32_SSC_MASK, RK3568_PHYREG32_SSC_DOWNWARD);

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

987

val = FIELD_PREP(RK3568_PHYREG32_SSC_MASK, RK3568_PHYREG32_SSC_DOWNWARD);

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

111

#define REG_645M(x) FIELD_PREP(REG_645M_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

123

#define I_MUX_SEL(x) FIELD_PREP(I_MUX_SEL_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

131

#define S(x) FIELD_PREP(S_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

133

#define P(x) FIELD_PREP(P_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

137

#define M(x) FIELD_PREP(M_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

140

#define MRR(x) FIELD_PREP(MRR_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

142

#define MFR(x) FIELD_PREP(MFR_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

150

#define PLL_LOCK_CNT(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

152

#define PLL_STB_CNT(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

160

#define T_PHY_READY(x) FIELD_PREP(GENMASK(15, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

162

#define EDGE_CON(x) FIELD_PREP(GENMASK(14, 12), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

163

#define EDGE_CON_DIR(x) FIELD_PREP(BIT(9), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

165

#define RES_UP(x) FIELD_PREP(GENMASK(7, 4), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

166

#define RES_DN(x) FIELD_PREP(GENMASK(3, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

169

#define HS_VREG_AMP_ICON(x) FIELD_PREP(GENMASK(1, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

172

#define T_LPX(x) FIELD_PREP(GENMASK(11, 4), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

174

#define T_CLK_ZERO(x) FIELD_PREP(GENMASK(15, 8), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

175

#define T_CLK_PREPARE(x) FIELD_PREP(GENMASK(7, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

177

#define T_HS_EXIT(x) FIELD_PREP(GENMASK(15, 8), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

178

#define T_CLK_TRAIL(x) FIELD_PREP(GENMASK(7, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

180

#define T_CLK_POST(x) FIELD_PREP(GENMASK(7, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

182

#define T_ULPS_EXIT(x) FIELD_PREP(GENMASK(9, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

184

#define SKEW_CAL_RUN_TIME(x) FIELD_PREP(GENMASK(15, 12), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

186

#define SKEW_CAL_INIT_RUN_TIME(x) FIELD_PREP(GENMASK(11, 8), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

187

#define SKEW_CAL_INIT_WAIT_TIME(x) FIELD_PREP(GENMASK(7, 4), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

239

#define T_LP_EXIT_SKEW(x) FIELD_PREP(GENMASK(3, 2), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

240

#define T_LP_ENTRY_SKEW(x) FIELD_PREP(GENMASK(1, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

241

#define T_HS_ZERO(x) FIELD_PREP(GENMASK(15, 8), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

242

#define T_HS_PREPARE(x) FIELD_PREP(GENMASK(7, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

243

#define T_HS_EXIT(x) FIELD_PREP(GENMASK(15, 8), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

244

#define T_HS_TRAIL(x) FIELD_PREP(GENMASK(7, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

245

#define T_TA_GET(x) FIELD_PREP(GENMASK(7, 4), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

246

#define T_TA_GO(x) FIELD_PREP(GENMASK(3, 0), x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

26

#define I_RES_CNTL(x) FIELD_PREP(I_RES_CNTL_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

36

#define I_DEV_SEL(x) FIELD_PREP(I_DEV_SEL_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

44

#define I_VBG_SEL(x) FIELD_PREP(I_VBG_SEL_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

50

#define I_BGR_VREF_SEL(x) FIELD_PREP(I_BGR_VREF_SEL_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

56

#define I_LADDER_SEL(x) FIELD_PREP(I_LADDER_SEL_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

73

#define REG_325M(x) FIELD_PREP(REG_325M_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

83

#define REG_LP_400M(x) FIELD_PREP(REG_LP_400M_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c

93

#define REG_400M(x) FIELD_PREP(REG_400M_MASK, x)

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1145

FIELD_PREP(LCPLL_EN_MASK, 1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1146

FIELD_PREP(LCPLL_LCVCO_MODE_EN_MASK, cfg->lcvco_mode_en));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1150

FIELD_PREP(LCPLL_PI_EN_MASK, cfg->pi_en) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1151

FIELD_PREP(LCPLL_100M_CLK_EN_MASK, cfg->clk_en_100m));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1164

FIELD_PREP(LCPLL_SDC_N_MASK, cfg->sdc_n));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1167

FIELD_PREP(PLL_PCG_POSTDIV_SEL_MASK, cfg->pms_sdiv));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1169

FIELD_PREP(PLL_PCG_CLK_SEL_MASK, (hdptx->hdmi_cfg.bpc - 8) >> 1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1233

FIELD_PREP(ROPLL_SDM_EN_MASK, cfg->sdm_en));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1238

FIELD_PREP(ROPLL_SDM_NUM_SIGN_RBR_MASK, cfg->sdm_num_sign));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1244

FIELD_PREP(ROPLL_SDC_N_RBR_MASK, cfg->sdc_n));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1250

FIELD_PREP(PLL_PCG_POSTDIV_SEL_MASK, cfg->pms_sdiv));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1253

FIELD_PREP(PLL_PCG_CLK_SEL_MASK, (hdptx->hdmi_cfg.bpc - 8) >> 1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1256

FIELD_PREP(PLL_PCG_CLK_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1317

FIELD_PREP(OVRD_LN_TX_DRV_EI_EN_MASK, 1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1318

FIELD_PREP(LN_TX_DRV_EI_EN_MASK, 0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1321

FIELD_PREP(OVRD_LN_TX_DRV_EI_EN_MASK, 1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1322

FIELD_PREP(LN_TX_DRV_EI_EN_MASK, 0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1325

FIELD_PREP(OVRD_LN_TX_DRV_EI_EN_MASK, 1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1326

FIELD_PREP(LN_TX_DRV_EI_EN_MASK, 0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1329

FIELD_PREP(OVRD_LN_TX_DRV_EI_EN_MASK, 1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1330

FIELD_PREP(LN_TX_DRV_EI_EN_MASK, 0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1333

HDPTX_I_PLL_EN << 16 | FIELD_PREP(HDPTX_I_PLL_EN, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1335

HDPTX_I_BIAS_EN << 16 | FIELD_PREP(HDPTX_I_BIAS_EN, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1337

HDPTX_I_BGR_EN << 16 | FIELD_PREP(HDPTX_I_BGR_EN, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1406

FIELD_PREP(ANA_LCPLL_RESERVED7_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1410

FIELD_PREP(ROPLL_ANA_CPP_CTRL_COARSE_MASK, 0xe) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1411

FIELD_PREP(ROPLL_ANA_CPP_CTRL_FINE_MASK, 0xe));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1415

FIELD_PREP(ROPLL_ANA_LPF_C_SEL_COARSE_MASK, 0x4) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1416

FIELD_PREP(ROPLL_ANA_LPF_C_SEL_FINE_MASK, 0x4));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1418

regmap_write(hdptx->regmap, CMN_REG(0051), FIELD_PREP(ROPLL_PMS_MDIV_MASK, 0x87));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1419

regmap_write(hdptx->regmap, CMN_REG(0052), FIELD_PREP(ROPLL_PMS_MDIV_MASK, 0x71));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1420

regmap_write(hdptx->regmap, CMN_REG(0053), FIELD_PREP(ROPLL_PMS_MDIV_MASK, 0x71));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1423

FIELD_PREP(ROPLL_PMS_MDIV_AFC_MASK, 0x87));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1425

FIELD_PREP(ROPLL_PMS_MDIV_AFC_MASK, 0x71));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1427

FIELD_PREP(ROPLL_PMS_MDIV_AFC_MASK, 0x71));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1430

FIELD_PREP(ANA_ROPLL_PMS_PDIV_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1431

FIELD_PREP(ANA_ROPLL_PMS_REFDIV_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1433

FIELD_PREP(ROPLL_PMS_SDIV_RBR_MASK, 0x3) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1434

FIELD_PREP(ROPLL_PMS_SDIV_HBR_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1436

FIELD_PREP(ROPLL_PMS_SDIV_HBR2_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1439

FIELD_PREP(ROPLL_SDM_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1442

FIELD_PREP(OVRD_ROPLL_SDM_RSTN_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1443

FIELD_PREP(ROPLL_SDM_RSTN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1445

FIELD_PREP(ROPLL_SDC_FRAC_EN_RBR_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1447

FIELD_PREP(ROPLL_SDC_FRAC_EN_HBR_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1449

FIELD_PREP(ROPLL_SDC_FRAC_EN_HBR2_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1453

FIELD_PREP(OVRD_ROPLL_SDC_RSTN_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1454

FIELD_PREP(ROPLL_SDC_RSTN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1456

FIELD_PREP(ROPLL_SDM_DENOMINATOR_MASK, 0x21));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1458

FIELD_PREP(ROPLL_SDM_DENOMINATOR_MASK, 0x27));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1460

FIELD_PREP(ROPLL_SDM_DENOMINATOR_MASK, 0x27));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1466

FIELD_PREP(ROPLL_SDM_NUM_SIGN_RBR_MASK, 0x0) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1467

FIELD_PREP(ROPLL_SDM_NUM_SIGN_HBR_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1468

FIELD_PREP(ROPLL_SDM_NUM_SIGN_HBR2_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1470

FIELD_PREP(ROPLL_SDM_NUM_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1472

FIELD_PREP(ROPLL_SDM_NUM_MASK, 0xd));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1474

FIELD_PREP(ROPLL_SDM_NUM_MASK, 0xd));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1477

FIELD_PREP(ROPLL_SDC_N_RBR_MASK, 0x2));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1481

FIELD_PREP(ROPLL_SDC_N_HBR_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1482

FIELD_PREP(ROPLL_SDC_N_HBR2_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1485

FIELD_PREP(ROPLL_SDC_NUM_MASK, 0x3));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1487

FIELD_PREP(ROPLL_SDC_NUM_MASK, 0x7));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1489

FIELD_PREP(ROPLL_SDC_NUM_MASK, 0x7));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1492

FIELD_PREP(ROPLL_SDC_DENO_MASK, 0x8));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1494

FIELD_PREP(ROPLL_SDC_DENO_MASK, 0x18));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1496

FIELD_PREP(ROPLL_SDC_DENO_MASK, 0x18));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1500

FIELD_PREP(OVRD_ROPLL_SDC_NDIV_RSTN_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1501

FIELD_PREP(ROPLL_SDC_NDIV_RSTN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1504

FIELD_PREP(ANA_ROPLL_SSC_CLK_DIV_SEL_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1507

FIELD_PREP(ANA_PLL_CD_TX_SER_RATE_SEL_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1510

FIELD_PREP(ANA_PLL_CD_HSCLK_EAST_EN_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1511

FIELD_PREP(ANA_PLL_CD_HSCLK_WEST_EN_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1514

FIELD_PREP(ANA_PLL_CD_VREG_GAIN_CTRL_MASK, 0x4));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1516

FIELD_PREP(ANA_PLL_CD_VREG_ICTRL_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1518

FIELD_PREP(PLL_LCRO_CLK_SEL_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1520

FIELD_PREP(ANA_PLL_SYNC_LOSS_DET_MODE_MASK, 0x3));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1523

FIELD_PREP(ANA_PLL_TX_HS_CLK_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1526

FIELD_PREP(DIG_CLK_SEL_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1529

FIELD_PREP(CMN_ROPLL_ALONE_MODE_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1531

FIELD_PREP(HS_SPEED_SEL_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1533

FIELD_PREP(LS_SPEED_SEL_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1542

FIELD_PREP(ANA_SB_RXTERM_OFFSP_MASK, 0x3));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1544

FIELD_PREP(ANA_SB_RXTERM_OFFSN_MASK, 0x3));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1546

FIELD_PREP(SB_AUX_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1548

FIELD_PREP(ANA_SB_TX_HLVL_PROG_MASK, 0x7));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1550

FIELD_PREP(ANA_SB_TX_LLVL_PROG_MASK, 0x7));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1553

FIELD_PREP(ANA_SB_DMRX_LPBK_DATA_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1556

FIELD_PREP(ANA_SB_VREG_GAIN_CTRL_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1559

FIELD_PREP(ANA_SB_VREG_OUT_SEL_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1560

FIELD_PREP(ANA_SB_VREG_REF_SEL_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1564

FIELD_PREP(SB_RX_RCAL_OPT_CODE_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1565

FIELD_PREP(SB_RX_RTERM_CTRL_MASK, 0x3));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1568

FIELD_PREP(SB_TG_SB_EN_DELAY_TIME_MASK, 0x2) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1569

FIELD_PREP(SB_TG_RXTERM_EN_DELAY_TIME_MASK, 0x2));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1572

FIELD_PREP(SB_READY_DELAY_TIME_MASK, 0x2) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1573

FIELD_PREP(SB_TG_OSC_EN_DELAY_TIME_MASK, 0x2));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1576

FIELD_PREP(AFC_RSTN_DELAY_TIME_MASK, 0x2));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1579

FIELD_PREP(FAST_PULSE_TIME_MASK, 0x4));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1582

FIELD_PREP(SB_TG_EARC_DMRX_RECVRD_CLK_CNT_MASK, 0xa));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1585

FIELD_PREP(SB_TG_CNT_RUN_NO_7_0_MASK, 0x3));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1588

FIELD_PREP(SB_EARC_SIG_DET_BYPASS_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1589

FIELD_PREP(SB_AFC_TOL_MASK, 0x3));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1591

FIELD_PREP(SB_AFC_STB_NUM_MASK, 0x4));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1593

FIELD_PREP(SB_TG_OSC_CNT_MIN_MASK, 0x67));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1595

FIELD_PREP(SB_TG_OSC_CNT_MAX_MASK, 0x6a));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1597

FIELD_PREP(SB_PWM_AFC_CTRL_MASK, 0x5));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1599

FIELD_PREP(SB_RCAL_RSTN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1601

FIELD_PREP(SB_AUX_EN_IN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1604

FIELD_PREP(OVRD_SB_RXTERM_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1606

FIELD_PREP(OVRD_SB_RX_RESCAL_DONE_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1608

FIELD_PREP(OVRD_SB_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1610

FIELD_PREP(OVRD_SB_AUX_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1613

FIELD_PREP(OVRD_SB_VREG_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1616

HDPTX_I_BGR_EN << 16 | FIELD_PREP(HDPTX_I_BGR_EN, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1618

HDPTX_I_BIAS_EN << 16 | FIELD_PREP(HDPTX_I_BIAS_EN, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1627

FIELD_PREP(OVRD_SB_RX_RESCAL_DONE_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1630

FIELD_PREP(SB_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1633

FIELD_PREP(SB_RXTERM_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1636

FIELD_PREP(SB_VREG_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1639

FIELD_PREP(SB_AUX_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1681

HDPTX_MODE_SEL << 16 | FIELD_PREP(HDPTX_MODE_SEL, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1686

FIELD_PREP(LN_POLARITY_INV_MASK, 0) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1687

FIELD_PREP(LN_LANE_MODE_MASK, 1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1691

FIELD_PREP(PROTOCOL_SEL_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1693

FIELD_PREP(DATA_BUS_WIDTH_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1695

FIELD_PREP(DATA_BUS_WIDTH_SEL_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1704

HDPTX_MODE_SEL << 16 | FIELD_PREP(HDPTX_MODE_SEL, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1839

HDPTX_I_PLL_EN << 16 | FIELD_PREP(HDPTX_I_PLL_EN, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1857

FIELD_PREP(OVRD_LCPLL_EN_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1858

FIELD_PREP(LCPLL_EN_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1861

FIELD_PREP(OVRD_ROPLL_EN_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1862

FIELD_PREP(ROPLL_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1867

FIELD_PREP(OVRD_ROPLL_SSC_EN_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1868

FIELD_PREP(ROPLL_SSC_EN_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1870

FIELD_PREP(ANA_ROPLL_SSC_FM_DEVIATION_MASK, 0xc));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1873

FIELD_PREP(ANA_ROPLL_SSC_FM_FREQ_MASK, 0x1f));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1876

FIELD_PREP(SSC_EN_MASK, 0x2));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1880

FIELD_PREP(OVRD_ROPLL_SSC_EN_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1881

FIELD_PREP(ROPLL_SSC_EN_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1883

FIELD_PREP(ANA_ROPLL_SSC_FM_DEVIATION_MASK, 0x20));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1886

FIELD_PREP(ANA_ROPLL_SSC_FM_FREQ_MASK, 0xc));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1889

FIELD_PREP(SSC_EN_MASK, 0x0));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1893

FIELD_PREP(DP_TX_LINK_BW_MASK, bw));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1896

HDPTX_I_PLL_EN << 16 | FIELD_PREP(HDPTX_I_PLL_EN, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1915

FIELD_PREP(LANE_EN_MASK, GENMASK(hdptx->lanes - 1, 0)));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1932

FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_RBR_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1936

FIELD_PREP(LN_TX_JEQ_ODD_CTRL_RBR_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1940

FIELD_PREP(LN_TX_SER_40BIT_EN_RBR_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1946

FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1950

FIELD_PREP(LN_TX_JEQ_ODD_CTRL_HBR_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1954

FIELD_PREP(LN_TX_SER_40BIT_EN_HBR_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1961

FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR2_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1965

FIELD_PREP(LN_TX_JEQ_ODD_CTRL_HBR2_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1969

FIELD_PREP(LN_TX_SER_40BIT_EN_HBR2_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1975

FIELD_PREP(OVRD_LN_TX_DRV_LVL_CTRL_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1976

FIELD_PREP(LN_TX_DRV_LVL_CTRL_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1981

FIELD_PREP(OVRD_LN_TX_DRV_POST_LVL_CTRL_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1982

FIELD_PREP(LN_TX_DRV_POST_LVL_CTRL_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1987

FIELD_PREP(OVRD_LN_TX_DRV_PRE_LVL_CTRL_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1988

FIELD_PREP(LN_TX_DRV_PRE_LVL_CTRL_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1994

FIELD_PREP(LN_ANA_TX_DRV_IDRV_IDN_CTRL_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1996

FIELD_PREP(LN_ANA_TX_DRV_IDRV_IUP_CTRL_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

1998

FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_EN_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

2003

FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_POL_SEL_MASK, 0x1) |

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

2004

FIELD_PREP(LN_ANA_TX_DRV_ACCDRV_CTRL_MASK,

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

2009

FIELD_PREP(LN_ANA_TX_JEQ_EN_MASK, ctrl->ana_tx_jeq_en));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

2013

FIELD_PREP(LN_ANA_TX_SYNC_LOSS_DET_MODE_MASK, 0x3));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

2017

FIELD_PREP(LN_ANA_TX_SER_VREG_GAIN_CTRL_MASK, 0x2));

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

2021

FIELD_PREP(LN_ANA_TX_RESERVED_MASK, 0x1));

drivers/phy/rockchip/phy-rockchip-usbdp.c

1224

CMN_DP_CMN_RSTN, FIELD_PREP(CMN_DP_CMN_RSTN, 0x0));

drivers/phy/rockchip/phy-rockchip-usbdp.c

1248

FIELD_PREP(CMN_DP_TX_LINK_BW, udphy->bw));

drivers/phy/rockchip/phy-rockchip-usbdp.c

1250

FIELD_PREP(CMN_ROPLL_SSC_EN, dp->ssc));

drivers/phy/rockchip/phy-rockchip-usbdp.c

1252

FIELD_PREP(CMN_DP_CMN_RSTN, 0x1));

drivers/phy/rockchip/phy-rockchip-usbdp.c

1273

FIELD_PREP(LN_ANA_TX_SER_TXCLK_INV,

drivers/phy/rockchip/phy-rockchip-usbdp.c

1282

FIELD_PREP(LN_ANA_TX_SER_TXCLK_INV, 0x0));

drivers/phy/rockchip/phy-rockchip-usbdp.c

566

FIELD_PREP(DP_AUX_DIN_SEL, udphy->dp_aux_din_sel) |

drivers/phy/rockchip/phy-rockchip-usbdp.c

567

FIELD_PREP(DP_AUX_DOUT_SEL, udphy->dp_aux_dout_sel) | value);

drivers/phy/rockchip/phy-rockchip-usbdp.c

601

FIELD_PREP(CMN_DP_LANE_EN_ALL, val));

drivers/phy/rockchip/phy-rockchip-usbdp.c

605

CMN_DP_CMN_RSTN, FIELD_PREP(CMN_DP_CMN_RSTN, 0x0));

drivers/phy/rockchip/phy-rockchip-usbdp.c

817

FIELD_PREP(CMN_DP_LANE_MUX_N(3), udphy->lane_mux_sel[3]) |

drivers/phy/rockchip/phy-rockchip-usbdp.c

818

FIELD_PREP(CMN_DP_LANE_MUX_N(2), udphy->lane_mux_sel[2]) |

drivers/phy/rockchip/phy-rockchip-usbdp.c

819

FIELD_PREP(CMN_DP_LANE_MUX_N(1), udphy->lane_mux_sel[1]) |

drivers/phy/rockchip/phy-rockchip-usbdp.c

820

FIELD_PREP(CMN_DP_LANE_MUX_N(0), udphy->lane_mux_sel[0]) |

drivers/phy/rockchip/phy-rockchip-usbdp.c

821

FIELD_PREP(CMN_DP_LANE_EN_ALL, 0));

drivers/phy/rockchip/phy-rockchip-usbdp.c

830

FIELD_PREP(CMN_DP_INIT_RSTN, 0x1));

drivers/phy/samsung/phy-exynos5-usbdrd.c

1069

val = FIELD_PREP(PHYREG0_CR_DATA_IN, addr);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1076

val = FIELD_PREP(PHYREG0_CR_DATA_IN, data);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1213

reg |= FIELD_PREP(PHYCLKRST_REFCLKSEL, PHYCLKRST_REFCLKSEL_PAD_REFCLK);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1217

reg |= FIELD_PREP(PHYCLKRST_FSEL_UTMI, phy_drd->extrefclk);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1236

reg |= FIELD_PREP(HSPHYPLLTUNE_PLL_P_TUNE, 14);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1254

reg |= FIELD_PREP(LINKSYSTEM_FLADJ, 0x20);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1410

reg |= FIELD_PREP(HSP_MISC_RES_TUNE, RES_TUNE_PHY1);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1414

reg |= FIELD_PREP(HSP_MISC_RES_TUNE, RES_TUNE_PHY1_PHY2);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1560

reg |= FIELD_PREP(LINKCTRL_BUS_FILTER_BYPASS, 0xf);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1577

reg |= FIELD_PREP(SSPPLLCTL_FSEL, 7);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1580

reg |= FIELD_PREP(SSPPLLCTL_FSEL, 6);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1583

reg |= FIELD_PREP(SSPPLLCTL_FSEL, 2);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1586

reg |= FIELD_PREP(SSPPLLCTL_FSEL, 1);

drivers/phy/samsung/phy-exynos5-usbdrd.c

1589

reg |= FIELD_PREP(SSPPLLCTL_FSEL, 0);

drivers/phy/samsung/phy-exynos5-usbdrd.c

2199

reg |= FIELD_PREP(PHY_CR_PARA_CON2_PHY0_CR_PARA_WR_DATA, data) |

drivers/phy/samsung/phy-exynos5-usbdrd.c

2206

reg |= FIELD_PREP(PHY_CR_PARA_CON0_PHY0_CR_PARA_ADDR, addr) |

drivers/phy/samsung/phy-exynos5-usbdrd.c

2412

reg |= FIELD_PREP(HSPPLLTUNE_FSEL, 7);

drivers/phy/samsung/phy-exynos5-usbdrd.c

2415

reg |= FIELD_PREP(HSPPLLTUNE_FSEL, 6);

drivers/phy/samsung/phy-exynos5-usbdrd.c

2418

reg |= FIELD_PREP(HSPPLLTUNE_FSEL, 2);

drivers/phy/samsung/phy-exynos5-usbdrd.c

2421

reg |= FIELD_PREP(HSPPLLTUNE_FSEL, 1);

drivers/phy/samsung/phy-exynos5-usbdrd.c

2424

reg |= FIELD_PREP(HSPPLLTUNE_FSEL, 0);

drivers/phy/samsung/phy-exynos5-usbdrd.c

613

reg |= FIELD_PREP(PHYCLKRST_REFCLKSEL, PHYCLKRST_REFCLKSEL_EXT_REFCLK);

drivers/phy/samsung/phy-exynos5-usbdrd.c

621

reg |= (FIELD_PREP(PHYCLKRST_SSC_REFCLKSEL, 0x00) |

drivers/phy/samsung/phy-exynos5-usbdrd.c

622

FIELD_PREP(PHYCLKRST_MPLL_MULTIPLIER,

drivers/phy/samsung/phy-exynos5-usbdrd.c

626

reg |= (FIELD_PREP(PHYCLKRST_SSC_REFCLKSEL, 0x88) |

drivers/phy/samsung/phy-exynos5-usbdrd.c

627

FIELD_PREP(PHYCLKRST_MPLL_MULTIPLIER,

drivers/phy/samsung/phy-exynos5-usbdrd.c

631

reg |= (FIELD_PREP(PHYCLKRST_SSC_REFCLKSEL, 0x00) |

drivers/phy/samsung/phy-exynos5-usbdrd.c

632

FIELD_PREP(PHYCLKRST_MPLL_MULTIPLIER,

drivers/phy/samsung/phy-exynos5-usbdrd.c

636

reg |= (FIELD_PREP(PHYCLKRST_SSC_REFCLKSEL, 0x88) |

drivers/phy/samsung/phy-exynos5-usbdrd.c

637

FIELD_PREP(PHYCLKRST_MPLL_MULTIPLIER,

drivers/phy/samsung/phy-exynos5-usbdrd.c

662

reg |= FIELD_PREP(PHYCLKRST_REFCLKSEL, PHYCLKRST_REFCLKSEL_EXT_REFCLK);

drivers/phy/samsung/phy-exynos5-usbdrd.c

667

reg |= FIELD_PREP(PHYCLKRST_FSEL_UTMI, phy_drd->extrefclk);

drivers/phy/samsung/phy-exynos5-usbdrd.c

718

reg |= FIELD_PREP(PHYPARAM1_PCS_TXDEEMPH, PHYPARAM1_PCS_TXDEEMPH_VAL);

drivers/phy/samsung/phy-exynos5-usbdrd.c

739

reg |= FIELD_PREP(SECPMACTL_PMA_REF_FREQ_SEL, 1);

drivers/phy/samsung/phy-exynos5-usbdrd.c

783

reg |= FIELD_PREP(CMN_REG00B8_LANE_MUX_SEL_DP,

drivers/phy/samsung/phy-exynos5-usbdrd.c

869

reg |= FIELD_PREP(PHYPARAM0_REF_LOSLEVEL, PHYPARAM0_REF_LOSLEVEL_VAL);

drivers/phy/samsung/phy-exynos5-usbdrd.c

875

reg |= FIELD_PREP(PHYPARAM1_PCS_TXDEEMPH, PHYPARAM1_PCS_TXDEEMPH_VAL);

drivers/phy/samsung/phy-exynos5-usbdrd.c

906

FIELD_PREP(LINKSYSTEM_FLADJ, 0x20);

drivers/phy/socionext/phy-uniphier-ahci.c

100

val |= FIELD_PREP(RXTXCTRL_RX_DPLL_MODE_MASK, 0x3);

drivers/phy/socionext/phy-uniphier-ahci.c

102

val |= FIELD_PREP(RXTXCTRL_TX_ATTEN_MASK, 0x3);

drivers/phy/socionext/phy-uniphier-ahci.c

104

val |= FIELD_PREP(RXTXCTRL_TX_BOOST_MASK, 0x5);

drivers/phy/socionext/phy-uniphier-ahci.c

106

val |= FIELD_PREP(RXTXCTRL_TX_EDGERATE_MASK, 0x0);

drivers/phy/socionext/phy-uniphier-ahci.c

253

val |= FIELD_PREP(TXCTRL0_AMP_G3_MASK, 0x73);

drivers/phy/socionext/phy-uniphier-ahci.c

255

val |= FIELD_PREP(TXCTRL0_AMP_G2_MASK, 0x46);

drivers/phy/socionext/phy-uniphier-ahci.c

257

val |= FIELD_PREP(TXCTRL0_AMP_G1_MASK, 0x42);

drivers/phy/socionext/phy-uniphier-ahci.c

262

val |= FIELD_PREP(TXCTRL1_DEEMPH_G3_MASK, 0x23);

drivers/phy/socionext/phy-uniphier-ahci.c

264

val |= FIELD_PREP(TXCTRL1_DEEMPH_G2_MASK, 0x05);

drivers/phy/socionext/phy-uniphier-ahci.c

266

val |= FIELD_PREP(TXCTRL1_DEEMPH_G1_MASK, 0x05);

drivers/phy/socionext/phy-uniphier-ahci.c

270

val |= FIELD_PREP(RXCTRL_LOS_LVL_MASK, 0x9);

drivers/phy/socionext/phy-uniphier-ahci.c

272

val |= FIELD_PREP(RXCTRL_LOS_BIAS_MASK, 0x2);

drivers/phy/socionext/phy-uniphier-ahci.c

274

val |= FIELD_PREP(RXCTRL_RX_EQ_MASK, 0x1);

drivers/phy/socionext/phy-uniphier-ahci.c

81

val |= FIELD_PREP(CKCTRL0_NCY_MASK, 0x6);

drivers/phy/socionext/phy-uniphier-ahci.c

83

val |= FIELD_PREP(CKCTRL0_NCY5_MASK, 0x2);

drivers/phy/socionext/phy-uniphier-ahci.c

85

val |= FIELD_PREP(CKCTRL0_PRESCALE_MASK, 0x1);

drivers/phy/socionext/phy-uniphier-ahci.c

91

val |= FIELD_PREP(CKCTRL1_LOS_LVL_MASK, 0x10);

drivers/phy/socionext/phy-uniphier-ahci.c

93

val |= FIELD_PREP(CKCTRL1_TX_LVL_MASK, 0x06);

drivers/phy/socionext/phy-uniphier-ahci.c

98

val |= FIELD_PREP(RXTXCTRL_RX_EQ_VALL_MASK, 0x6);

drivers/phy/socionext/phy-uniphier-pcie.c

101

val = FIELD_PREP(TESTI_DAT_MASK, 1);

drivers/phy/socionext/phy-uniphier-pcie.c

102

val |= FIELD_PREP(TESTI_ADR_MASK, reg);

drivers/phy/socionext/phy-uniphier-pcie.c

109

val = FIELD_PREP(TESTI_DAT_MASK, val);

drivers/phy/socionext/phy-uniphier-pcie.c

110

val |= FIELD_PREP(TESTI_ADR_MASK, reg);

drivers/phy/socionext/phy-uniphier-pcie.c

116

val = FIELD_PREP(TESTI_DAT_MASK, 1);

drivers/phy/socionext/phy-uniphier-pcie.c

117

val |= FIELD_PREP(TESTI_ADR_MASK, reg);

drivers/phy/socionext/phy-uniphier-pcie.c

177

FIELD_PREP(RX_EQ_ADJ, RX_EQ_ADJ_VAL));

drivers/phy/socionext/phy-uniphier-pcie.c

179

FIELD_PREP(VCO_CTRL, VCO_CTRL_INIT_VAL));

drivers/phy/socionext/phy-uniphier-pcie.c

181

FIELD_PREP(VCOPLL_CLMP, VCOPLL_CLMP_VAL));

drivers/phy/socionext/phy-uniphier-pcie.c

24

#define PORT_SEL_1 FIELD_PREP(PORT_SEL_MASK, 1)

drivers/phy/socionext/phy-uniphier-usb3hs.c

169

*pconfig |= FIELD_PREP(HSPHY_CFG0_HSDISC_MASK, 3);

drivers/phy/socionext/phy-uniphier-usb3hs.c

184

val |= FIELD_PREP(HSPHY_CFG1_ADR_MASK, p->field.reg_no)

drivers/phy/socionext/phy-uniphier-usb3hs.c

193

val &= ~FIELD_PREP(HSPHY_CFG1_DAT_MASK, field_mask);

drivers/phy/socionext/phy-uniphier-usb3hs.c

195

val |= FIELD_PREP(HSPHY_CFG1_DAT_MASK, data) | HSPHY_CFG1_DAT_EN;

drivers/phy/socionext/phy-uniphier-usb3hs.c

92

*pconfig |= FIELD_PREP(HSPHY_CFG0_RTERM_MASK, pt->rterm);

drivers/phy/socionext/phy-uniphier-usb3hs.c

95

*pconfig |= FIELD_PREP(HSPHY_CFG0_SEL_T_MASK, pt->sel_t);

drivers/phy/socionext/phy-uniphier-usb3hs.c

98

*pconfig |= FIELD_PREP(HSPHY_CFG0_HS_I_MASK, pt->hs_i);

drivers/phy/socionext/phy-uniphier-usb3ss.c

101

val = FIELD_PREP(TESTI_DAT_MASK, 1);

drivers/phy/socionext/phy-uniphier-usb3ss.c

102

val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no);

drivers/phy/socionext/phy-uniphier-usb3ss.c

86

val = FIELD_PREP(TESTI_DAT_MASK, 1);

drivers/phy/socionext/phy-uniphier-usb3ss.c

87

val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no);

drivers/phy/socionext/phy-uniphier-usb3ss.c

94

val = FIELD_PREP(TESTI_DAT_MASK, data | val);

drivers/phy/socionext/phy-uniphier-usb3ss.c

95

val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no);

drivers/phy/sophgo/phy-cv1800-usb2.c

25

#define PHY_ID_OVERWRITE_MODE_HOST FIELD_PREP(BIT(7), 0)

drivers/phy/sophgo/phy-cv1800-usb2.c

26

#define PHY_ID_OVERWRITE_MODE_DEVICE FIELD_PREP(BIT(7), 1)

drivers/phy/spacemit/phy-k1-usb2.c

111

val = FIELD_PREP(FDIV_REG_MASK, FDIV_REG_VAL) |

drivers/phy/spacemit/phy-k1-usb2.c

112

FIELD_PREP(PHY_FDIV_FRACT_0_1, PHY_SEL_FREQ_24MHZ) |

drivers/phy/st/phy-stm32-combophy.c

145

FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_OHM, imp_of));

drivers/phy/st/phy-stm32-combophy.c

169

FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_VSWING, vswing_of));

drivers/phy/st/phy-stm32-usbphyc.c

246

ndiv = FIELD_PREP(PLLNDIV, pll_params.ndiv);

drivers/phy/st/phy-stm32-usbphyc.c

247

frac = FIELD_PREP(PLLFRACIN, pll_params.frac);

drivers/phy/st/phy-stm32-usbphyc.c

340

u32 monsel = FIELD_PREP(STM32_USBPHYC_MON_SEL,

drivers/phy/st/phy-stm32-usbphyc.c

478

usbphyc_phy->tune |= INCURREN | FIELD_PREP(INCURRINT, val);

drivers/phy/st/phy-stm32-usbphyc.c

497

usbphyc_phy->tune |= HSDRVCURINCR | FIELD_PREP(HSDRVDCLEV, val);

drivers/phy/st/phy-stm32-usbphyc.c

513

usbphyc_phy->tune |= FIELD_PREP(HSDRVCHKITRM, val);

drivers/phy/st/phy-stm32-usbphyc.c

521

usbphyc_phy->tune |= FIELD_PREP(HSDRVCHKZTRM, val);

drivers/phy/st/phy-stm32-usbphyc.c

529

usbphyc_phy->tune |= FIELD_PREP(SQLCHCTL, val);

drivers/phy/st/phy-stm32-usbphyc.c

540

usbphyc_phy->tune |= FIELD_PREP(HSRXOFF, val);

drivers/phy/st/phy-stm32-usbphyc.c

555

usbphyc_phy->tune |= FIELD_PREP(OTPCOMP, otpcomp);

drivers/phy/starfive/phy-jh7110-dphy-rx.c

101

writel(FIELD_PREP(STF_DPHY_PRECOUNTER_IN_LAN3, 7),

drivers/phy/starfive/phy-jh7110-dphy-rx.c

78

writel(FIELD_PREP(STF_DPHY_ENABLE_CLK, 1) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

79

FIELD_PREP(STF_DPHY_ENABLE_CLK1, 1) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

80

FIELD_PREP(STF_DPHY_ENABLE_LAN0, 1) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

81

FIELD_PREP(STF_DPHY_ENABLE_LAN1, 1) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

82

FIELD_PREP(STF_DPHY_ENABLE_LAN2, 1) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

83

FIELD_PREP(STF_DPHY_ENABLE_LAN3, 1) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

84

FIELD_PREP(STF_DPHY_LANE_SWAP_CLK, info->maps[0]) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

85

FIELD_PREP(STF_DPHY_LANE_SWAP_CLK1, info->maps[5]) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

86

FIELD_PREP(STF_DPHY_LANE_SWAP_LAN0, info->maps[1]) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

87

FIELD_PREP(STF_DPHY_LANE_SWAP_LAN1, info->maps[2]),

drivers/phy/starfive/phy-jh7110-dphy-rx.c

90

writel(FIELD_PREP(STF_DPHY_LANE_SWAP_LAN2, info->maps[3]) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

91

FIELD_PREP(STF_DPHY_LANE_SWAP_LAN3, info->maps[4]) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

92

FIELD_PREP(STF_DPHY_PRECOUNTER_IN_CLK, 8),

drivers/phy/starfive/phy-jh7110-dphy-rx.c

95

writel(FIELD_PREP(STF_DPHY_PRECOUNTER_IN_CLK1, 8) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

96

FIELD_PREP(STF_DPHY_PRECOUNTER_IN_LAN0, 7) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

97

FIELD_PREP(STF_DPHY_PRECOUNTER_IN_LAN1, 7) |

drivers/phy/starfive/phy-jh7110-dphy-rx.c

98

FIELD_PREP(STF_DPHY_PRECOUNTER_IN_LAN2, 7),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

217

writel(FIELD_PREP(STF_DPHY_RESETB, assert),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

248

tmp |= FIELD_PREP(STF_DPHY_REFCLK_IN_SEL, STF_DPHY_REFCLK_12M);

drivers/phy/starfive/phy-jh7110-dphy-tx.c

251

writel(FIELD_PREP(STF_DPHY_RG_CDTX_L0N_HSTX_RES, 0x10) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

252

FIELD_PREP(STF_DPHY_RG_CDTX_L0P_HSTX_RES, 0x10),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

255

writel(FIELD_PREP(STF_DPHY_RG_CDTX_L0N_HSTX_RES, 0x10) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

256

FIELD_PREP(STF_DPHY_RG_CDTX_L2N_HSTX_RES, 0x10) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

257

FIELD_PREP(STF_DPHY_RG_CDTX_L3N_HSTX_RES, 0x10) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

258

FIELD_PREP(STF_DPHY_RG_CDTX_L1P_HSTX_RES, 0x10) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

259

FIELD_PREP(STF_DPHY_RG_CDTX_L2P_HSTX_RES, 0x10) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

260

FIELD_PREP(STF_DPHY_RG_CDTX_L3P_HSTX_RES, 0x10),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

263

writel(FIELD_PREP(STF_DPHY_RG_CDTX_L4N_HSTX_RES, 0x10) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

264

FIELD_PREP(STF_DPHY_RG_CDTX_L4P_HSTX_RES, 0x10),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

268

writel(FIELD_PREP(STF_DPHY_AON_POWER_READY_N,

drivers/phy/starfive/phy-jh7110-dphy-tx.c

270

FIELD_PREP(STF_DPHY_CFG_L0_SWAP_SEL, info->maps[0]) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

271

FIELD_PREP(STF_DPHY_CFG_L1_SWAP_SEL, info->maps[1]) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

272

FIELD_PREP(STF_DPHY_CFG_L2_SWAP_SEL, info->maps[2]) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

273

FIELD_PREP(STF_DPHY_CFG_L3_SWAP_SEL, info->maps[3]) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

274

FIELD_PREP(STF_DPHY_CFG_L4_SWAP_SEL, info->maps[4]),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

278

writel(FIELD_PREP(STF_DPHY_RG_CDTX_PLL_SSC_EN, 0x0),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

281

writel(FIELD_PREP(STF_DPHY_RG_CDTX_PLL_LDO_STB_X2_EN, 0x1) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

282

FIELD_PREP(STF_DPHY_RG_CDTX_PLL_FM_EN, 0x1) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

283

FIELD_PREP(STF_DPHY_RG_CDTX_PLL_PRE_DIV, 0x0) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

284

FIELD_PREP(STF_DPHY_RG_CDTX_PLL_FBK_INT, p[i].pll_fbk_int),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

287

writel(FIELD_PREP(STF_DPHY_RG_CDTX_PLL_FBK_FRA,

drivers/phy/starfive/phy-jh7110-dphy-tx.c

293

writel(FIELD_PREP(STF_DPHY_RG_EXTD_CYCLE_SEL, p[i].extd_cycle_sel),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

296

writel(FIELD_PREP(STF_DPHY_RG_DLANE_HS_PRE_TIME, p[i].dlane_hs_pre_time) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

297

FIELD_PREP(STF_DPHY_RG_DLANE_HS_ZERO_TIME, p[i].dlane_hs_zero_time) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

298

FIELD_PREP(STF_DPHY_RG_DLANE_HS_TRAIL_TIME, p[i].dlane_hs_trail_time) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

299

FIELD_PREP(STF_DPHY_RG_CLANE_HS_ZERO_TIME, p[i].clane_hs_zero_time),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

302

writel(FIELD_PREP(STF_DPHY_RG_CLANE_HS_PRE_TIME, p[i].clane_hs_pre_time) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

303

FIELD_PREP(STF_DPHY_RG_CLANE_HS_TRAIL_TIME, p[i].clane_hs_trail_time) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

304

FIELD_PREP(STF_DPHY_RG_CLANE_HS_CLK_PRE_TIME, p[i].clane_hs_clk_pre_time) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

305

FIELD_PREP(STF_DPHY_RG_CLANE_HS_CLK_POST_TIME, p[i].clane_hs_clk_post_time),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

318

writel(FIELD_PREP(STF_DPHY_SCFG_PPI_C_READY_SEL, 0) |

drivers/phy/starfive/phy-jh7110-dphy-tx.c

319

FIELD_PREP(STF_DPHY_SCFG_DSI_TXREADY_ESC_SEL, 0),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

322

writel(FIELD_PREP(STF_DPHY_SCFG_C_HS_PRE_ZERO_TIME, 0x30),

drivers/phy/starfive/phy-jh7110-dphy-tx.c

78

#define STF_DPHY_LSHIFT_16(x) (FIELD_PREP(GENMASK(23, 16), (x)))

drivers/phy/starfive/phy-jh7110-dphy-tx.c

79

#define STF_DPHY_LSHIFT_8(x) (FIELD_PREP(GENMASK(15, 8), (x)))

drivers/phy/sunplus/phy-sunplus-usb2.c

40

#define J_TBCWAIT_1P1_MS FIELD_PREP(J_TBCWAIT_MASK, 0)

drivers/phy/sunplus/phy-sunplus-usb2.c

42

#define J_TVDM_SRC_DIS_8P2_MS FIELD_PREP(J_TVDM_SRC_DIS_MASK, 3)

drivers/phy/sunplus/phy-sunplus-usb2.c

44

#define J_TVDM_SRC_EN_1P6_MS FIELD_PREP(J_TVDM_SRC_EN_MASK, 0)

drivers/phy/sunplus/phy-sunplus-usb2.c

48

#define IBG_TRIM0_SSLVHT FIELD_PREP(IBG_TRIM0_MASK, 4)

drivers/phy/sunplus/phy-sunplus-usb2.c

50

#define J_VDATREE_TRIM_DEFAULT FIELD_PREP(J_VDATREE_TRIM_MASK, 9)

drivers/phy/sunplus/phy-sunplus-usb2.c

53

#define PROB FIELD_PREP(PROB_MASK, 7)

drivers/pinctrl/microchip/pinctrl-mpfs-mssio.c

157

u32 val = FIELD_PREP(MPFS_PINCTRL_BANK_VOLTAGE_MASK, bank_voltage);

drivers/pinctrl/microchip/pinctrl-mpfs-mssio.c

500

val |= FIELD_PREP(MPFS_PINCTRL_DRV_MASK, tmp);

drivers/pinctrl/microchip/pinctrl-mpfs-mssio.c

525

val |= FIELD_PREP(MPFS_PINCTRL_IBUFMD_MASK, arg);

drivers/pinctrl/pinctrl-apple-gpio.c

187

FIELD_PREP(REG_GPIOx_PERIPH, func) | REG_GPIOx_INPUT_ENABLE);

drivers/pinctrl/pinctrl-apple-gpio.c

244

FIELD_PREP(REG_GPIOx_MODE, REG_GPIOx_IN_IRQ_OFF) |

drivers/pinctrl/pinctrl-apple-gpio.c

256

FIELD_PREP(REG_GPIOx_MODE, REG_GPIOx_OUT) |

drivers/pinctrl/pinctrl-apple-gpio.c

295

FIELD_PREP(REG_GPIOx_MODE, REG_GPIOx_IN_IRQ_OFF));

drivers/pinctrl/pinctrl-apple-gpio.c

307

FIELD_PREP(REG_GPIOx_MODE, irqtype));

drivers/pinctrl/pinctrl-apple-gpio.c

316

FIELD_PREP(REG_GPIOx_GRP, 0));

drivers/pinctrl/pinctrl-apple-gpio.c

333

FIELD_PREP(REG_GPIOx_MODE, irqtype));

drivers/pinctrl/pinctrl-eic7700.c

407

value |= FIELD_PREP(EIC7700_DS, (arg - 3000) / 3000);

drivers/pinctrl/pinctrl-eic7700.c

411

value |= FIELD_PREP(EIC7700_DS, (arg - 6000) / 3000);

drivers/pinctrl/pinctrl-eic7700.c

507

value |= FIELD_PREP(EIC7700_FUNC_SEL, fs);

drivers/pinctrl/pinctrl-eic7700.c

653

rgmii0_mode |= FIELD_PREP(EIC7700_MS, EIC7700_MS_1V8);

drivers/pinctrl/pinctrl-eic7700.c

654

rgmii1_mode |= FIELD_PREP(EIC7700_MS, EIC7700_MS_1V8);

drivers/pinctrl/pinctrl-eic7700.c

656

rgmii0_mode |= FIELD_PREP(EIC7700_MS, EIC7700_MS_3V3);

drivers/pinctrl/pinctrl-eic7700.c

657

rgmii1_mode |= FIELD_PREP(EIC7700_MS, EIC7700_MS_3V3);

drivers/pinctrl/pinctrl-k210.c

540

val |= FIELD_PREP(K210_PC_DRIVE_MASK, drive);

drivers/pinctrl/pinctrl-keembay.c

903

val |= FIELD_PREP(KEEMBAY_GPIO_MODE_INV_MASK, KEEMBAY_GPIO_MODE_INV_VAL);

drivers/pinctrl/pinctrl-keembay.c

911

val &= FIELD_PREP(KEEMBAY_GPIO_MODE_INV_MASK, 0);

drivers/pinctrl/pinctrl-microchip-sgpio.c

194

FIELD_PREP(SGPIO_LUTON_PORT_WIDTH, width);

drivers/pinctrl/pinctrl-microchip-sgpio.c

199

FIELD_PREP(SGPIO_OCELOT_PORT_WIDTH, width);

drivers/pinctrl/pinctrl-microchip-sgpio.c

204

FIELD_PREP(SGPIO_SPARX5_PORT_WIDTH, width);

drivers/pinctrl/pinctrl-microchip-sgpio.c

219

set = FIELD_PREP(SGPIO_LUTON_CLK_FREQ, clkfrq);

drivers/pinctrl/pinctrl-microchip-sgpio.c

223

set = FIELD_PREP(SGPIO_OCELOT_CLK_FREQ, clkfrq);

drivers/pinctrl/pinctrl-microchip-sgpio.c

227

set = FIELD_PREP(SGPIO_SPARX5_CLK_FREQ, clkfrq);

drivers/pinctrl/pinctrl-microchip-sgpio.c

294

clr = FIELD_PREP(SGPIO_LUTON_BIT_SOURCE, BIT(bit));

drivers/pinctrl/pinctrl-microchip-sgpio.c

295

set = FIELD_PREP(SGPIO_LUTON_BIT_SOURCE, value << bit);

drivers/pinctrl/pinctrl-microchip-sgpio.c

298

clr = FIELD_PREP(SGPIO_OCELOT_BIT_SOURCE, BIT(bit));

drivers/pinctrl/pinctrl-microchip-sgpio.c

299

set = FIELD_PREP(SGPIO_OCELOT_BIT_SOURCE, value << bit);

drivers/pinctrl/pinctrl-microchip-sgpio.c

302

clr = FIELD_PREP(SGPIO_SPARX5_BIT_SOURCE, BIT(bit));

drivers/pinctrl/pinctrl-microchip-sgpio.c

303

set = FIELD_PREP(SGPIO_SPARX5_BIT_SOURCE, value << bit);

drivers/pinctrl/sophgo/pinctrl-cv18xx.c

337

v |= FIELD_PREP(PIN_IO_PULLDOWN, arg);

drivers/pinctrl/sophgo/pinctrl-cv18xx.c

342

v |= FIELD_PREP(PIN_IO_PULLUP, arg);

drivers/pinctrl/sophgo/pinctrl-cv18xx.c

351

v |= FIELD_PREP(PIN_IO_DRIVE, ret);

drivers/pinctrl/sophgo/pinctrl-cv18xx.c

360

v |= FIELD_PREP(PIN_IO_SCHMITT, ret);

drivers/pinctrl/sophgo/pinctrl-cv18xx.c

368

v |= FIELD_PREP(PIN_IO_OUT_FAST_SLEW, arg);

drivers/pinctrl/sophgo/pinctrl-cv18xx.c

373

v |= FIELD_PREP(PIN_IO_BUS_HOLD, arg);

drivers/pinctrl/sophgo/pinctrl-sg2042-ops.c

245

v |= FIELD_PREP(PIN_IO_DRIVE, ret);

drivers/pinctrl/spacemit/pinctrl-k1.c

782

v |= FIELD_PREP(PAD_SLEW_RATE, slew_rate);

drivers/platform/arm64/lenovo-thinkpad-t14s.c

315

val = FIELD_PREP(T14S_EC_KBD_BL1_MASK, brightness);

drivers/platform/arm64/lenovo-thinkpad-t14s.c

321

val = FIELD_PREP(T14S_EC_KBD_BL2_MASK, brightness);

drivers/platform/mellanox/mlxbf-bootctl.c

428

data = FIELD_PREP(MLXBF_RSH_LOG_TYPE_MASK, MLXBF_RSH_LOG_TYPE_MSG);

drivers/platform/mellanox/mlxbf-bootctl.c

429

data |= FIELD_PREP(MLXBF_RSH_LOG_LEN_MASK, num);

drivers/platform/mellanox/mlxbf-bootctl.c

430

data |= FIELD_PREP(MLXBF_RSH_LOG_LEVEL_MASK, level);

drivers/platform/mellanox/mlxbf-pmc.c

1294

perfcnt_sel |= FIELD_PREP(MLXBF_PMC_L3C_PERF_CNT_SEL_CNT_0,

drivers/platform/mellanox/mlxbf-pmc.c

1299

perfcnt_sel |= FIELD_PREP(MLXBF_PMC_L3C_PERF_CNT_SEL_CNT_1,

drivers/platform/mellanox/mlxbf-pmc.c

1304

perfcnt_sel |= FIELD_PREP(MLXBF_PMC_L3C_PERF_CNT_SEL_CNT_2,

drivers/platform/mellanox/mlxbf-pmc.c

1309

perfcnt_sel |= FIELD_PREP(MLXBF_PMC_L3C_PERF_CNT_SEL_CNT_3,

drivers/platform/mellanox/mlxbf-pmc.c

1314

perfcnt_sel_1 |= FIELD_PREP(MLXBF_PMC_L3C_PERF_CNT_SEL_1_CNT_4,

drivers/platform/mellanox/mlxbf-pmc.c

1339

word |= FIELD_PREP(MLXBF_PMC_CRSPACE_PERFSEL1, evt);

drivers/platform/mellanox/mlxbf-pmc.c

1342

word |= FIELD_PREP(MLXBF_PMC_CRSPACE_PERFSEL0, evt);

drivers/platform/mellanox/mlxbf-pmc.c

1376

perfctl = FIELD_PREP(MLXBF_PMC_PERFCTL_EN0, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1377

perfctl |= FIELD_PREP(MLXBF_PMC_PERFCTL_EB0, 0);

drivers/platform/mellanox/mlxbf-pmc.c

1378

perfctl |= FIELD_PREP(MLXBF_PMC_PERFCTL_ETRIG0, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1379

perfctl |= FIELD_PREP(MLXBF_PMC_PERFCTL_AD0, 0);

drivers/platform/mellanox/mlxbf-pmc.c

1380

perfctl |= FIELD_PREP(MLXBF_PMC_PERFCTL_ACCM0, 0);

drivers/platform/mellanox/mlxbf-pmc.c

1381

perfctl |= FIELD_PREP(MLXBF_PMC_PERFCTL_MS0, 0);

drivers/platform/mellanox/mlxbf-pmc.c

1382

perfctl |= FIELD_PREP(MLXBF_PMC_PERFCTL_FM0, 0);

drivers/platform/mellanox/mlxbf-pmc.c

1384

perfmon_cfg = FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_WDATA, perfctl);

drivers/platform/mellanox/mlxbf-pmc.c

1385

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_ADDR,

drivers/platform/mellanox/mlxbf-pmc.c

1387

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_STROBE, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1388

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_WR_R_B, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1396

perfevt = FIELD_PREP(MLXBF_PMC_PERFEVT_EVTSEL, evt);

drivers/platform/mellanox/mlxbf-pmc.c

1398

perfmon_cfg = FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_WDATA, perfevt);

drivers/platform/mellanox/mlxbf-pmc.c

1399

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_ADDR,

drivers/platform/mellanox/mlxbf-pmc.c

1401

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_STROBE, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1402

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_WR_R_B, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1410

perfmon_cfg = FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_ADDR,

drivers/platform/mellanox/mlxbf-pmc.c

1412

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_STROBE, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1413

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_WR_R_B, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1492

perfmon_cfg = FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_ADDR,

drivers/platform/mellanox/mlxbf-pmc.c

1494

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_STROBE, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1495

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_WR_R_B, 0);

drivers/platform/mellanox/mlxbf-pmc.c

1603

perfmon_cfg = FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_ADDR,

drivers/platform/mellanox/mlxbf-pmc.c

1605

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_STROBE, 1);

drivers/platform/mellanox/mlxbf-pmc.c

1606

perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_WR_R_B, 0);

drivers/platform/mellanox/mlxbf-pmc.c

1912

word |= FIELD_PREP(MLXBF_PMC_CRSPACE_PERFMON_EN, en);

drivers/platform/mellanox/mlxbf-pmc.c

1914

word |= FIELD_PREP(MLXBF_PMC_CRSPACE_PERFMON_CLR, 1);

drivers/platform/mellanox/mlxbf-tmfifo.c

1301

FIELD_PREP(MLXBF_TMFIFO_TX_CTL__LWM_MASK,

drivers/platform/mellanox/mlxbf-tmfifo.c

1304

FIELD_PREP(MLXBF_TMFIFO_TX_CTL__HWM_MASK,

drivers/platform/mellanox/mlxbf-tmfifo.c

1313

FIELD_PREP(MLXBF_TMFIFO_RX_CTL__LWM_MASK, 0);

drivers/platform/mellanox/mlxbf-tmfifo.c

1315

FIELD_PREP(MLXBF_TMFIFO_RX_CTL__HWM_MASK, 1);

drivers/platform/x86/acer-wmi.c

1674

input |= FIELD_PREP(ACER_GAMING_FAN_BEHAVIOR_ID_MASK, fan_bitmap);

drivers/platform/x86/acer-wmi.c

1677

input |= FIELD_PREP(ACER_GAMING_FAN_BEHAVIOR_SET_CPU_MODE_MASK, mode);

drivers/platform/x86/acer-wmi.c

1680

input |= FIELD_PREP(ACER_GAMING_FAN_BEHAVIOR_SET_GPU_MODE_MASK, mode);

drivers/platform/x86/acer-wmi.c

1701

input |= FIELD_PREP(ACER_GAMING_FAN_BEHAVIOR_ID_MASK, fan_bitmap);

drivers/platform/x86/acer-wmi.c

1749

input |= FIELD_PREP(ACER_GAMING_FAN_SPEED_ID_MASK, fan);

drivers/platform/x86/acer-wmi.c

1750

input |= FIELD_PREP(ACER_GAMING_FAN_SPEED_VALUE_MASK, speed);

drivers/platform/x86/acer-wmi.c

1774

input |= FIELD_PREP(ACER_GAMING_FAN_SPEED_ID_MASK, fan);

drivers/platform/x86/acer-wmi.c

1795

input |= FIELD_PREP(ACER_GAMING_MISC_SETTING_INDEX_MASK, setting);

drivers/platform/x86/acer-wmi.c

1796

input |= FIELD_PREP(ACER_GAMING_MISC_SETTING_VALUE_MASK, value);

drivers/platform/x86/acer-wmi.c

1815

input |= FIELD_PREP(ACER_GAMING_MISC_SETTING_INDEX_MASK, setting);

drivers/platform/x86/acer-wmi.c

2975

command |= FIELD_PREP(ACER_PREDATOR_V4_SENSOR_INDEX_BIT_MASK,

drivers/platform/x86/acer-wmi.c

2986

command |= FIELD_PREP(ACER_PREDATOR_V4_SENSOR_INDEX_BIT_MASK,

drivers/platform/x86/dell/dell-pc.c

179

dell_fill_request(&buffer, 0x1, FIELD_PREP(DELL_ACC_SET_FIELD, acc_mode) | state, 0, 0);

drivers/platform/x86/intel/plr_tpmi.c

129

regval = FIELD_PREP(PLR_MODULE_ID_MASK, tpmi_get_punit_core_number(cpu));

drivers/platform/x86/intel/plr_tpmi.c

151

regval = FIELD_PREP(PLR_MODULE_ID_MASK, tpmi_get_punit_core_number(cpu));

drivers/platform/x86/intel/sdsi.c

144

u64 control = FIELD_PREP(CTRL_COMPLETE, 1);

drivers/platform/x86/intel/sdsi.c

251

control = FIELD_PREP(CTRL_EOM, 1) |

drivers/platform/x86/intel/sdsi.c

252

FIELD_PREP(CTRL_SOM, 1) |

drivers/platform/x86/intel/sdsi.c

253

FIELD_PREP(CTRL_RUN_BUSY, 1) |

drivers/platform/x86/intel/sdsi.c

254

FIELD_PREP(CTRL_PACKET_SIZE, info->size) |

drivers/platform/x86/intel/sdsi.c

273

control = FIELD_PREP(CTRL_EOM, 1) |

drivers/platform/x86/intel/sdsi.c

274

FIELD_PREP(CTRL_SOM, 1) |

drivers/platform/x86/intel/sdsi.c

275

FIELD_PREP(CTRL_RUN_BUSY, 1) |

drivers/platform/x86/intel/sdsi.c

276

FIELD_PREP(CTRL_READ_WRITE, 1) |

drivers/platform/x86/intel/sdsi.c

277

FIELD_PREP(CTRL_MSG_SIZE, info->size) |

drivers/platform/x86/intel/sdsi.c

278

FIELD_PREP(CTRL_PACKET_SIZE, info->size);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

243

control |= FIELD_PREP(UNCORE_EFF_LAT_CTRL_LOW_THRESHOLD_MASK, val);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

250

control |= FIELD_PREP(UNCORE_EFF_LAT_CTRL_HIGH_THRESHOLD_MASK, val);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

255

control |= FIELD_PREP(UNCORE_EFF_LAT_CTRL_HIGH_THRESHOLD_ENABLE, val);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

260

control |= FIELD_PREP(UNCORE_EFF_LAT_CTRL_RATIO_MASK, val);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

282

control |= FIELD_PREP(UNCORE_MAX_RATIO_MASK, input);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c

285

control |= FIELD_PREP(UNCORE_MIN_RATIO_MASK, input);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c

86

cap |= FIELD_PREP(UNCORE_MAX_RATIO_MASK, input);

drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c

89

cap |= FIELD_PREP(UNCORE_MIN_RATIO_MASK, input);

drivers/platform/x86/intel/vsec_tpmi.c

291

data = FIELD_PREP(TMPI_CONTROL_DATA_CMD, TPMI_CONTROL_GET_STATE_CMD);

drivers/platform/x86/intel/vsec_tpmi.c

294

data |= FIELD_PREP(TPMI_CONTROL_DATA_VAL_FEATURE, feature_id);

drivers/platform/x86/intel/vsec_tpmi.c

306

control |= FIELD_PREP(TPMI_CONTROL_STATUS_LEN, TPMI_CMD_PKT_LEN);

drivers/platform/x86/lenovo/ideapad-laptop.c

1602

FIELD_PREP(KBD_BL_COMMAND_TYPE, priv->kbd_bl.type) |

drivers/platform/x86/lenovo/ideapad-laptop.c

1650

value = FIELD_PREP(KBD_BL_SET_BRIGHTNESS, brightness) |

drivers/platform/x86/lenovo/ideapad-laptop.c

1651

FIELD_PREP(KBD_BL_COMMAND_TYPE, type) |

drivers/platform/x86/lenovo/wmi-capdata.c

62

(FIELD_PREP(LWMI_ATTR_DEV_ID_MASK, LWMI_DEVICE_ID_FAN) | \

drivers/platform/x86/lenovo/wmi-capdata.c

63

FIELD_PREP(LWMI_ATTR_FEAT_ID_MASK, LWMI_FEATURE_ID_FAN_TEST))

drivers/platform/x86/lenovo/wmi-other.c

720

FIELD_PREP(LWMI_ATTR_DEV_ID_MASK, tunable_attr->device_id) |

drivers/platform/x86/lenovo/wmi-other.c

721

FIELD_PREP(LWMI_ATTR_FEAT_ID_MASK, tunable_attr->feature_id) |

drivers/platform/x86/lenovo/wmi-other.c

722

FIELD_PREP(LWMI_ATTR_MODE_ID_MASK,

drivers/platform/x86/lenovo/wmi-other.c

724

FIELD_PREP(LWMI_ATTR_TYPE_ID_MASK, tunable_attr->type_id);

drivers/platform/x86/lenovo/wmi-other.c

75

(FIELD_PREP(LWMI_ATTR_DEV_ID_MASK, LWMI_DEVICE_ID_FAN) | \

drivers/platform/x86/lenovo/wmi-other.c

76

FIELD_PREP(LWMI_ATTR_FEAT_ID_MASK, LWMI_FEATURE_ID_FAN_RPM) | \

drivers/platform/x86/lenovo/wmi-other.c

77

FIELD_PREP(LWMI_ATTR_TYPE_ID_MASK, LWMI_FAN_ID(x)))

drivers/platform/x86/lenovo/wmi-other.c

791

FIELD_PREP(LWMI_ATTR_DEV_ID_MASK, tunable_attr->device_id) |

drivers/platform/x86/lenovo/wmi-other.c

792

FIELD_PREP(LWMI_ATTR_FEAT_ID_MASK, tunable_attr->feature_id) |

drivers/platform/x86/lenovo/wmi-other.c

793

FIELD_PREP(LWMI_ATTR_MODE_ID_MASK, mode) |

drivers/platform/x86/lenovo/wmi-other.c

794

FIELD_PREP(LWMI_ATTR_TYPE_ID_MASK, tunable_attr->type_id);

drivers/platform/x86/lenovo/wmi-other.c

850

FIELD_PREP(LWMI_ATTR_DEV_ID_MASK, tunable_attr->device_id) |

drivers/platform/x86/lenovo/wmi-other.c

851

FIELD_PREP(LWMI_ATTR_FEAT_ID_MASK, tunable_attr->feature_id) |

drivers/platform/x86/lenovo/wmi-other.c

852

FIELD_PREP(LWMI_ATTR_MODE_ID_MASK, mode) |

drivers/platform/x86/lenovo/wmi-other.c

853

FIELD_PREP(LWMI_ATTR_TYPE_ID_MASK, tunable_attr->type_id);

drivers/platform/x86/lg-laptop.c

294

FIELD_PREP(FAN_MODE_LOWER, value) |

drivers/platform/x86/lg-laptop.c

295

FIELD_PREP(FAN_MODE_UPPER, value));

drivers/pmdomain/apple/pmgr-pwrstate.c

235

FIELD_PREP(APPLE_PMGR_PS_MIN, ps->min_state));

drivers/pmdomain/apple/pmgr-pwrstate.c

68

reg |= FIELD_PREP(APPLE_PMGR_PS_TARGET, pstate);

drivers/pmdomain/imx/imx8m-blk-ctrl.c

700

FIELD_PREP(LCDIF_1_RD_HURRY, 7) |

drivers/pmdomain/imx/imx8m-blk-ctrl.c

701

FIELD_PREP(LCDIF_0_RD_HURRY, 7));

drivers/pmdomain/imx/imx8m-blk-ctrl.c

704

FIELD_PREP(ISI_V_WR_HURRY, 7) |

drivers/pmdomain/imx/imx8m-blk-ctrl.c

705

FIELD_PREP(ISI_U_WR_HURRY, 7) |

drivers/pmdomain/imx/imx8m-blk-ctrl.c

706

FIELD_PREP(ISI_Y_WR_HURRY, 7));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

108

FIELD_PREP(P_PLL_MASK, 12) |

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

109

FIELD_PREP(M_PLL_MASK, 800) |

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

110

FIELD_PREP(S_PLL_MASK, 4));

drivers/pmdomain/imx/imx8mp-blk-ctrl.c

325

FIELD_PREP(HDMI_LCDIF_NOC_HURRY_MASK, 7));

drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c

15

FIELD_PREP(AIROHA_AVS_OP_MASK, 0x1))

drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c

17

FIELD_PREP(AIROHA_AVS_OP_MASK, 0x2))

drivers/power/supply/bq257xx_charger.c

144

reg = FIELD_PREP(BQ25703_MINVSYS_MASK, reg);

drivers/power/supply/bq257xx_charger.c

220

reg = FIELD_PREP(BQ25703_ICHG_MASK, (ichg / BQ25703_ICHG_STEP_UA));

drivers/power/supply/bq257xx_charger.c

268

reg = FIELD_PREP(BQ25703_MAX_CHARGE_VOLT_MASK,

drivers/power/supply/bq257xx_charger.c

325

FIELD_PREP(BQ25703_IINDPM_MASK, reg));

drivers/power/supply/bq257xx_charger.c

372

FIELD_PREP(BQ25703_WDTMR_ADJ_MASK,

drivers/power/supply/intel_dc_ti_battery.c

56

#define CC_CNTL_SMPL_INTVL_15MS FIELD_PREP(CC_CNTL_SMPL_INTVL, 0)

drivers/power/supply/intel_dc_ti_battery.c

57

#define CC_CNTL_SMPL_INTVL_62MS FIELD_PREP(CC_CNTL_SMPL_INTVL, 1)

drivers/power/supply/intel_dc_ti_battery.c

58

#define CC_CNTL_SMPL_INTVL_125MS FIELD_PREP(CC_CNTL_SMPL_INTVL, 2)

drivers/power/supply/intel_dc_ti_battery.c

59

#define CC_CNTL_SMPL_INTVL_250MS FIELD_PREP(CC_CNTL_SMPL_INTVL, 3)

drivers/power/supply/rt9467-charger.c

431

reg_val = RT9467_MASK_ADC_START | FIELD_PREP(RT9467_MASK_ADC_IN_SEL, adc_sel);

drivers/pps/generators/pps_gen_tio.c

32

#define TIOCTL_EP_RISING_EDGE FIELD_PREP(TIOCTL_EP, 0)

drivers/pps/generators/pps_gen_tio.c

33

#define TIOCTL_EP_FALLING_EDGE FIELD_PREP(TIOCTL_EP, 1)

drivers/pps/generators/pps_gen_tio.c

34

#define TIOCTL_EP_TOGGLE_EDGE FIELD_PREP(TIOCTL_EP, 2)

drivers/ptp/ptp_fc3.c

167

u8 val = FIELD_PREP(LPF_BW_SHIFT, shift) | FIELD_PREP(LPF_BW_MULT, mult);

drivers/ptp/ptp_netc.c

768

tmr_ctrl = FIELD_PREP(TMR_CTRL_CK_SEL, priv->clk_select) |

drivers/ptp/ptp_netc.c

789

tmr_ctrl |= FIELD_PREP(TMR_CTRL_TCLK_PERIOD, integral_period) |

drivers/pwm/pwm-airoha.c

294

val = FIELD_PREP(AIROHA_PWM_WAVE_GEN_CYCLE, period_ticks) << shift;

drivers/pwm/pwm-airoha.c

306

val = FIELD_PREP(AIROHA_PWM_GPIO_FLASH_PRD_HIGH, duty_ticks) << shift;

drivers/pwm/pwm-airoha.c

313

val = FIELD_PREP(AIROHA_PWM_GPIO_FLASH_PRD_LOW,

drivers/pwm/pwm-airoha.c

442

FIELD_PREP(AIROHA_PWM_GPIO_FLASH_SET_ID, index) << shift);

drivers/pwm/pwm-imx-tpm.c

204

val |= FIELD_PREP(PWM_IMX_TPM_SC_PS, p->prescale);

drivers/pwm/pwm-imx-tpm.c

40

#define PWM_IMX_TPM_SC_CMOD_INC_EVERY_CLK FIELD_PREP(PWM_IMX_TPM_SC_CMOD, 1)

drivers/pwm/pwm-imx-tpm.c

53

#define PWM_IMX_TPM_CnSC_ELS_INVERSED FIELD_PREP(PWM_IMX_TPM_CnSC_ELS, 1)

drivers/pwm/pwm-imx-tpm.c

54

#define PWM_IMX_TPM_CnSC_ELS_NORMAL FIELD_PREP(PWM_IMX_TPM_CnSC_ELS, 2)

drivers/pwm/pwm-imx27.c

351

FIELD_PREP(MX3_PWMCR_CLKSRC, MX3_PWMCR_CLKSRC_IPG_HIGH) |

drivers/pwm/pwm-imx27.c

355

cr |= FIELD_PREP(MX3_PWMCR_POUTC,

drivers/pwm/pwm-imx27.c

74

#define MX3_PWMCR_PRESCALER_SET(x) FIELD_PREP(MX3_PWMCR_PRESCALER, (x) - 1)

drivers/pwm/pwm-intel-lgm.c

116

con0_val = FIELD_PREP(LGM_PWM_FAN_MODE_MSK, LGM_PWM_FAN_MODE_2WIRE);

drivers/pwm/pwm-intel-lgm.c

81

FIELD_PREP(LGM_PWM_FAN_DC_MSK, val));

drivers/pwm/pwm-keembay.c

168

pwm_count = FIELD_PREP(KMB_PWM_HIGH_MASK, high) |

drivers/pwm/pwm-keembay.c

169

FIELD_PREP(KMB_PWM_LOW_MASK, low);

drivers/pwm/pwm-mc33xs2410.c

103

tx[i] = FIELD_PREP(MC33XS2410_FRAME_IN_DATA, flag) |

drivers/pwm/pwm-mc33xs2410.c

104

FIELD_PREP(MC33XS2410_FRAME_IN_ADDR, reg[i]);

drivers/pwm/pwm-mc33xs2410.c

185

return FIELD_PREP(MC33XS2410_PWM_FREQ_STEP, step) |

drivers/pwm/pwm-mc33xs2410.c

186

FIELD_PREP(MC33XS2410_PWM_FREQ_COUNT, count - 1);

drivers/pwm/pwm-mc33xs2410.c

37

#define MC33XS2410_GLB_CTRL_MODE_NORMAL FIELD_PREP(MC33XS2410_GLB_CTRL_MODE, 1)

drivers/pwm/pwm-mc33xs2410.c

79

tx[i] = FIELD_PREP(MC33XS2410_FRAME_IN_DATA, val[i]) |

drivers/pwm/pwm-mc33xs2410.c

80

FIELD_PREP(MC33XS2410_FRAME_IN_ADDR,

drivers/pwm/pwm-meson.c

241

value = FIELD_PREP(PWM_HIGH_MASK, channel->hi) |

drivers/pwm/pwm-meson.c

242

FIELD_PREP(PWM_LOW_MASK, channel->lo);

drivers/pwm/pwm-rcar.c

118

cyc = FIELD_PREP(RCAR_PWMCNT_CYC0_MASK, tmp);

drivers/pwm/pwm-rcar.c

123

ph = FIELD_PREP(RCAR_PWMCNT_PH0_MASK, tmp);

drivers/pwm/pwm-rzg2l-gpt.c

322

FIELD_PREP(RZG2L_GTCR_TPCS, prescale));

drivers/pwm/pwm-rzg2l-gpt.c

51

#define RZG2L_GTCR_MD_SAW_WAVE_PWM_MODE FIELD_PREP(RZG2L_GTCR_MD, 0)

drivers/pwm/pwm-rzg2l-gpt.c

68

(FIELD_PREP(RZG2L_GTIOR_GTIOB, RZG2L_INIT_OUT_HI_OUT_HI_END_TOGGLE) | RZG2L_GTIOR_OBE)

drivers/pwm/pwm-sifive.c

116

FIELD_PREP(PWM_SIFIVE_PWMCFG_SCALE, scale);

drivers/pwm/pwm-sl28cpld.c

148

ctrl = FIELD_PREP(SL28CPLD_PWM_CTRL_PRESCALER_MASK, prescaler);

drivers/pwm/pwm-sl28cpld.c

165

ctrl |= FIELD_PREP(SL28CPLD_PWM_CTRL_PRESCALER_MASK, 1);

drivers/pwm/pwm-stm32-lp.c

215

val = FIELD_PREP(STM32_LPTIM_PRESC, presc);

drivers/pwm/pwm-stm32-lp.c

224

val |= FIELD_PREP(STM32_LPTIM_WAVPOL, state->polarity);

drivers/pwm/pwm-stm32-lp.c

84

val = FIELD_PREP(STM32_LPTIM_CC2P, polarity);

drivers/pwm/pwm-stm32-lp.c

85

val |= FIELD_PREP(STM32_LPTIM_CC2E, enable);

drivers/pwm/pwm-stm32-lp.c

91

val = FIELD_PREP(STM32_LPTIM_CC1P, polarity);

drivers/pwm/pwm-stm32-lp.c

92

val |= FIELD_PREP(STM32_LPTIM_CC1E, enable);

drivers/pwm/pwm-stm32.c

636

FIELD_PREP(TIM_CCMR_IC1PSC, icpsc) |

drivers/pwm/pwm-stm32.c

637

FIELD_PREP(TIM_CCMR_IC2PSC, icpsc));

drivers/pwm/pwm-sunplus.c

39

#define SP7021_PWM_DUTY_DD_SEL(ch) FIELD_PREP(GENMASK(9, 8), ch)

drivers/ras/amd/atl/access.c

100

ficaa |= FIELD_PREP(DF_FICAA_REG_NUM_LEGACY, reg);

drivers/ras/amd/atl/access.c

102

ficaa |= FIELD_PREP(DF_FICAA_REG_NUM, reg);

drivers/ras/amd/atl/access.c

105

ficaa |= FIELD_PREP(DF_FICAA_FUNC_NUM, func);

drivers/ras/amd/atl/access.c

86

ficaa |= FIELD_PREP(DF_FICAA_INST_EN, 1);

drivers/ras/amd/atl/access.c

87

ficaa |= FIELD_PREP(DF_FICAA_INST_ID, instance_id);

drivers/ras/amd/atl/umc.c

319

a_err->addr |= FIELD_PREP(MI300_UMC_MCA_COL, col);

drivers/regulator/adp5055-regulator.c

161

val = FIELD_PREP(ADP5055_MASK_DVS_LIM_UPPER,

drivers/regulator/adp5055-regulator.c

163

val |= FIELD_PREP(ADP5055_MASK_DVS_LIM_LOWER,

drivers/regulator/adp5055-regulator.c

170

val = FIELD_PREP(ADP5055_MASK_EN_MODE, adp5055->en_mode_software);

drivers/regulator/adp5055-regulator.c

175

val = FIELD_PREP(ADP5055_MASK_OCP_BLANKING, ocp_blanking);

drivers/regulator/adp5055-regulator.c

181

val = FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT2, adp5055->fast_transient[2]);

drivers/regulator/adp5055-regulator.c

182

val |= FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT1, adp5055->fast_transient[1]);

drivers/regulator/adp5055-regulator.c

183

val |= FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT0, adp5055->fast_transient[0]);

drivers/regulator/adp5055-regulator.c

188

val = FIELD_PREP(ADP5055_MASK_DLY_PWRGD, delay_power_good);

drivers/regulator/adp5055-regulator.c

189

val |= FIELD_PREP(ADP5055_MASK_PWRGD2, adp5055->mask_power_good[2]);

drivers/regulator/adp5055-regulator.c

190

val |= FIELD_PREP(ADP5055_MASK_PWRGD1, adp5055->mask_power_good[1]);

drivers/regulator/adp5055-regulator.c

191

val |= FIELD_PREP(ADP5055_MASK_PWRGD0, adp5055->mask_power_good[0]);

drivers/regulator/bq257xx-regulator.c

56

FIELD_PREP(BQ25703_OTG_CUR_MASK, reg));

drivers/regulator/lp873x-regulator.c

97

FIELD_PREP(LP873X_BUCK0_CTRL_2_BUCK0_SLEW_RATE, reg));

drivers/regulator/lp87565-regulator.c

103

FIELD_PREP(LP87565_BUCK_CTRL_2_SLEW_RATE, reg));

drivers/regulator/max77675-regulator.c

360

value = FIELD_PREP(MAX77675_SR_SBB0_BIT, slew_src_ctrl_bit);

drivers/regulator/max77675-regulator.c

365

value = FIELD_PREP(MAX77675_SR_SBB1_BIT, slew_src_ctrl_bit);

drivers/regulator/max77675-regulator.c

370

value = FIELD_PREP(MAX77675_SR_SBB2_BIT, slew_src_ctrl_bit);

drivers/regulator/max77675-regulator.c

375

value = FIELD_PREP(MAX77675_SR_SBB3_BIT, slew_src_ctrl_bit);

drivers/regulator/max77675-regulator.c

623

FIELD_PREP(MAX77675_EN_MODE_MASK, cfg->en_mode));

drivers/regulator/max77675-regulator.c

632

FIELD_PREP(MAX77675_LAT_MODE_BIT, cfg->voltage_change_latency));

drivers/regulator/max77675-regulator.c

641

FIELD_PREP(MAX77675_DRV_SBB_MASK, cfg->drv_sbb_strength));

drivers/regulator/max77675-regulator.c

650

FIELD_PREP(MAX77675_DVS_SLEW_BIT, cfg->dvs_slew_rate));

drivers/regulator/max77675-regulator.c

659

FIELD_PREP(MAX77675_DBEN_EN_BIT, cfg->debounce_time));

drivers/regulator/max77675-regulator.c

668

FIELD_PREP(MAX77675_MRT_MASK, cfg->manual_reset_time));

drivers/regulator/max77675-regulator.c

677

FIELD_PREP(MAX77675_PU_DIS_BIT, cfg->en_pullup_disable));

drivers/regulator/max77675-regulator.c

686

FIELD_PREP(MAX77675_BIAS_LPM_BIT, cfg->bias_low_power_request));

drivers/regulator/max77675-regulator.c

695

FIELD_PREP(MAX77675_SIMO_CH_DIS_BIT, cfg->simo_ldo_always_on));

drivers/regulator/mt6363-regulator.c

520

sel = FIELD_PREP(MT6363_RG_VEMC_VOSEL_1_MASK, sel);

drivers/regulator/pf0900-regulator.c

409

val = FIELD_PREP(GENMASK(15, 8), data[1]) | data[0];

drivers/regulator/qcom-refgen-regulator.c

31

FIELD_PREP(REFGEN_BG_CTRL_MASK, REFGEN_BG_CTRL_ENABLE));

drivers/regulator/qcom-refgen-regulator.c

34

FIELD_PREP(REFGEN_BIAS_EN_MASK, REFGEN_BIAS_EN_ENABLE));

drivers/regulator/qcom-refgen-regulator.c

42

FIELD_PREP(REFGEN_BIAS_EN_MASK, REFGEN_BIAS_EN_DISABLE));

drivers/regulator/qcom-refgen-regulator.c

45

FIELD_PREP(REFGEN_BG_CTRL_MASK, REFGEN_BG_CTRL_DISABLE));

drivers/regulator/rtq2208-regulator.c

171

val = FIELD_PREP(RTQ2208_BUCK_RSPUP_MASK, sel) | FIELD_PREP(RTQ2208_BUCK_RSPDN_MASK, sel);

drivers/regulator/stm32-vrefbuf.c

122

val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel);

drivers/remoteproc/meson_mx_ao_arc.c

102

tmp = FIELD_PREP(AO_CPU_CNTL_AHB_SRAM_BITS_31_20,

drivers/remoteproc/meson_mx_ao_arc.c

69

tmp = FIELD_PREP(AO_REMAP_REG0_REMAP_AHB_SRAM_BITS_17_14_FOR_ARM_CPU,

drivers/remoteproc/meson_mx_ao_arc.c

84

FIELD_PREP(AO_SECURE_REG0_AHB_SRAM_BITS_19_12,

drivers/resctrl/mpam_devices.c

1089

mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, ctx->mon) |

drivers/resctrl/mpam_devices.c

1090

FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx);

drivers/resctrl/mpam_devices.c

1417

pri_val |= FIELD_PREP(MPAMCFG_PRI_INTPRI, intpri);

drivers/resctrl/mpam_devices.c

1419

pri_val |= FIELD_PREP(MPAMCFG_PRI_DSPRI, dspri);

drivers/resctrl/mpam_devices.c

1468

mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, i) |

drivers/resctrl/mpam_devices.c

1469

FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx);

drivers/resctrl/mpam_devices.c

256

u32 partsel = FIELD_PREP(MPAMCFG_PART_SEL_RIS, ris_idx) |

drivers/resctrl/mpam_devices.c

257

FIELD_PREP(MPAMCFG_PART_SEL_PARTID_SEL, partid);

drivers/resctrl/mpam_devices.c

264

u32 partsel = FIELD_PREP(MPAMCFG_PART_SEL_RIS, ris_idx) |

drivers/resctrl/mpam_devices.c

265

FIELD_PREP(MPAMCFG_PART_SEL_PARTID_SEL, intpartid) |

drivers/resctrl/mpam_devices.c

645

mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, 0) |

drivers/resctrl/mpam_devices.c

646

FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx);

drivers/resctrl/mpam_devices.c

963

*flt_val = FIELD_PREP(MSMON_CFG_x_FLT_PARTID, ctx->partid);

drivers/resctrl/mpam_devices.c

967

*flt_val |= FIELD_PREP(MSMON_CFG_x_FLT_PMG, ctx->pmg);

drivers/resctrl/mpam_devices.c

975

*flt_val |= FIELD_PREP(MSMON_CFG_CSU_FLT_XCL, ctx->csu_exclude_clean);

drivers/resctrl/mpam_devices.c

984

*flt_val |= FIELD_PREP(MSMON_CFG_MBWU_FLT_RWBW, ctx->opts);

drivers/reset/reset-eyeq.c

398

return FIELD_PREP(ID_DOMAIN_MASK, domain) | FIELD_PREP(ID_OFFSET_MASK, offset);

drivers/reset/reset-intel-gw.c

143

id = FIELD_PREP(REG_OFFSET_MASK, spec->args[0]);

drivers/reset/reset-intel-gw.c

144

id |= FIELD_PREP(BIT_OFFSET_MASK, spec->args[1]);

drivers/reset/reset-intel-gw.c

150

id |= FIELD_PREP(STAT_BIT_OFFSET_MASK, spec->args[2]);

drivers/reset/reset-intel-gw.c

212

data->reboot_id = FIELD_PREP(REG_OFFSET_MASK, rb_id[0]);

drivers/reset/reset-intel-gw.c

213

data->reboot_id |= FIELD_PREP(BIT_OFFSET_MASK, rb_id[1]);

drivers/reset/reset-intel-gw.c

216

data->reboot_id |= FIELD_PREP(STAT_BIT_OFFSET_MASK, rb_id[2]);

drivers/rtc/rtc-ab-eoz9.c

246

FIELD_PREP(ABEOZ9_REG_CTRL_INT_AIE, enable));

drivers/rtc/rtc-ab-eoz9.c

260

regs[0] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_SEC,

drivers/rtc/rtc-ab-eoz9.c

262

regs[1] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_MIN,

drivers/rtc/rtc-ab-eoz9.c

264

regs[2] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_HOURS,

drivers/rtc/rtc-ab-eoz9.c

266

regs[3] = ABEOZ9_BIT_ALARM_AE | FIELD_PREP(ABEOZ9_BIT_ALARM_DAYS,

drivers/rtc/rtc-abx80x.c

698

extram = FIELD_PREP(ABX8XX_EXTRAM_XADS, upper);

drivers/rtc/rtc-amlogic-a4.c

230

reg_val = FIELD_PREP(RTC_ADJ_VALID, enable) |

drivers/rtc/rtc-amlogic-a4.c

231

FIELD_PREP(RTC_SEC_ADJUST_CTRL, sign) |

drivers/rtc/rtc-amlogic-a4.c

232

FIELD_PREP(RTC_MATCH_COUNTER, match_counter);

drivers/rtc/rtc-amlogic-a4.c

294

reg_val = FIELD_PREP(RTC_OSCIN_IN_EN, 1)

drivers/rtc/rtc-amlogic-a4.c

295

| FIELD_PREP(RTC_OSCIN_OUT_CFG, 1)

drivers/rtc/rtc-amlogic-a4.c

296

| FIELD_PREP(RTC_OSCIN_OUT_N0M0, RTC_OSCIN_OUT_32K_N0)

drivers/rtc/rtc-amlogic-a4.c

297

| FIELD_PREP(RTC_OSCIN_OUT_N1M1, RTC_OSCIN_OUT_32K_N1);

drivers/rtc/rtc-amlogic-a4.c

303

reg_val = FIELD_PREP(RTC_OSCIN_OUT_N0M0, RTC_OSCIN_OUT_32K_M0)

drivers/rtc/rtc-amlogic-a4.c

304

| FIELD_PREP(RTC_OSCIN_OUT_N1M1, RTC_OSCIN_OUT_32K_M1);

drivers/rtc/rtc-at91rm9200.c

222

FIELD_PREP(AT91_RTC_SEC, bin2bcd(tm->tm_sec))

drivers/rtc/rtc-at91rm9200.c

223

| FIELD_PREP(AT91_RTC_MIN, bin2bcd(tm->tm_min))

drivers/rtc/rtc-at91rm9200.c

224

| FIELD_PREP(AT91_RTC_HOUR, bin2bcd(tm->tm_hour)));

drivers/rtc/rtc-at91rm9200.c

227

FIELD_PREP(AT91_RTC_CENT,

drivers/rtc/rtc-at91rm9200.c

229

| FIELD_PREP(AT91_RTC_YEAR, bin2bcd(tm->tm_year % 100))

drivers/rtc/rtc-at91rm9200.c

230

| FIELD_PREP(AT91_RTC_MONTH, bin2bcd(tm->tm_mon + 1))

drivers/rtc/rtc-at91rm9200.c

231

| FIELD_PREP(AT91_RTC_DAY, bin2bcd(tm->tm_wday + 1))

drivers/rtc/rtc-at91rm9200.c

232

| FIELD_PREP(AT91_RTC_DATE, bin2bcd(tm->tm_mday)));

drivers/rtc/rtc-at91rm9200.c

271

FIELD_PREP(AT91_RTC_SEC, bin2bcd(alrm->time.tm_sec))

drivers/rtc/rtc-at91rm9200.c

272

| FIELD_PREP(AT91_RTC_MIN, bin2bcd(alrm->time.tm_min))

drivers/rtc/rtc-at91rm9200.c

273

| FIELD_PREP(AT91_RTC_HOUR, bin2bcd(alrm->time.tm_hour))

drivers/rtc/rtc-at91rm9200.c

276

FIELD_PREP(AT91_RTC_MONTH, bin2bcd(alrm->time.tm_mon + 1))

drivers/rtc/rtc-at91rm9200.c

277

| FIELD_PREP(AT91_RTC_DATE, bin2bcd(alrm->time.tm_mday))

drivers/rtc/rtc-at91rm9200.c

365

mr |= FIELD_PREP(AT91_RTC_CORRECTION, corr - 1);

drivers/rtc/rtc-atcrtc100.c

42

#define RTC_SEC_SET(x) FIELD_PREP(SEC_MSK, x)

drivers/rtc/rtc-atcrtc100.c

43

#define RTC_MIN_SET(x) FIELD_PREP(MIN_MSK, x)

drivers/rtc/rtc-atcrtc100.c

44

#define RTC_HOUR_SET(x) FIELD_PREP(HOUR_MSK, x)

drivers/rtc/rtc-atcrtc100.c

45

#define RTC_DAY_SET(x) FIELD_PREP(DAY_MSK, x)

drivers/rtc/rtc-cadence.c

114

return FIELD_PREP(CDNS_RTC_TIME_S, bin2bcd(tm->tm_sec))

drivers/rtc/rtc-cadence.c

115

| FIELD_PREP(CDNS_RTC_TIME_M, bin2bcd(tm->tm_min))

drivers/rtc/rtc-cadence.c

116

| FIELD_PREP(CDNS_RTC_TIME_HR, bin2bcd(tm->tm_hour));

drivers/rtc/rtc-cadence.c

163

calr = FIELD_PREP(CDNS_RTC_CAL_D, bin2bcd(tm->tm_mday))

drivers/rtc/rtc-cadence.c

164

| FIELD_PREP(CDNS_RTC_CAL_M, bin2bcd(tm->tm_mon + 1))

drivers/rtc/rtc-cadence.c

165

| FIELD_PREP(CDNS_RTC_CAL_Y, bin2bcd(year % 100))

drivers/rtc/rtc-cadence.c

166

| FIELD_PREP(CDNS_RTC_CAL_C, bin2bcd(year / 100))

drivers/rtc/rtc-cadence.c

167

| FIELD_PREP(CDNS_RTC_CAL_DAY, tm->tm_wday + 1);

drivers/rtc/rtc-cadence.c

227

calar = FIELD_PREP(CDNS_RTC_CAL_D, bin2bcd(alarm->time.tm_mday))

drivers/rtc/rtc-cadence.c

228

| FIELD_PREP(CDNS_RTC_CAL_M, bin2bcd(alarm->time.tm_mon + 1));

drivers/rtc/rtc-isl12022.c

531

val = FIELD_PREP(ISL12022_REG_VB85_MASK, x[0]) |

drivers/rtc/rtc-isl12022.c

532

FIELD_PREP(ISL12022_REG_VB75_MASK, x[1]);

drivers/rtc/rtc-loongson.c

218

rtc_data[0] = FIELD_PREP(TOY_SEC, tm->tm_sec)

drivers/rtc/rtc-loongson.c

219

| FIELD_PREP(TOY_MIN, tm->tm_min)

drivers/rtc/rtc-loongson.c

220

| FIELD_PREP(TOY_HOUR, tm->tm_hour)

drivers/rtc/rtc-loongson.c

221

| FIELD_PREP(TOY_DAY, tm->tm_mday)

drivers/rtc/rtc-loongson.c

222

| FIELD_PREP(TOY_MON, tm->tm_mon + 1);

drivers/rtc/rtc-loongson.c

286

alarm_data = FIELD_PREP(TOY_MATCH_SEC, alrm->time.tm_sec)

drivers/rtc/rtc-loongson.c

287

| FIELD_PREP(TOY_MATCH_MIN, alrm->time.tm_min)

drivers/rtc/rtc-loongson.c

288

| FIELD_PREP(TOY_MATCH_HOUR, alrm->time.tm_hour)

drivers/rtc/rtc-loongson.c

289

| FIELD_PREP(TOY_MATCH_DAY, alrm->time.tm_mday)

drivers/rtc/rtc-loongson.c

290

| FIELD_PREP(TOY_MATCH_MON, alrm->time.tm_mon + 1)

drivers/rtc/rtc-loongson.c

291

| FIELD_PREP(TOY_MATCH_YEAR, alrm->time.tm_year - priv->fix_year);

drivers/rtc/rtc-max31335.c

323

date[5] |= FIELD_PREP(MAX31335_MONTH_CENTURY, 1);

drivers/rtc/rtc-max31335.c

388

reg = FIELD_PREP(MAX31335_INT_EN1_A1IE, alrm->enabled);

drivers/rtc/rtc-max31335.c

476

FIELD_PREP(MAX31335_TRICKLE_REG_TRICKLE, i) |

drivers/rtc/rtc-max31335.c

477

FIELD_PREP(MAX31335_TRICKLE_REG_EN_TRICKLE,

drivers/rtc/rtc-meson.c

214

FIELD_PREP(RTC_REG4_STATIC_VALUE, (data >> 8)));

drivers/rtc/rtc-meson.c

217

tmp = FIELD_PREP(RTC_ADDR0_DATA, (data & 0xff)) | RTC_ADDR0_START_SER;

drivers/rtc/rtc-pcf2127.c

405

FIELD_PREP(PCF2127_CTRL3_PM, mode + value));

drivers/rtc/rtc-pcf8523.c

296

FIELD_PREP(PCF8523_CONTROL3_PM, mode));

drivers/rtc/rtc-renesas-rtca3.c

524

radj = FIELD_PREP(RTCA3_RADJ_ADJ, abs(cycles));

drivers/rtc/rtc-renesas-rtca3.c

526

radj |= FIELD_PREP(RTCA3_RADJ_PMADJ, RTCA3_RADJ_PMADJ_NONE);

drivers/rtc/rtc-renesas-rtca3.c

528

radj |= FIELD_PREP(RTCA3_RADJ_PMADJ, RTCA3_RADJ_PMADJ_ADD);

drivers/rtc/rtc-renesas-rtca3.c

530

radj |= FIELD_PREP(RTCA3_RADJ_PMADJ, RTCA3_RADJ_PMADJ_SUB);

drivers/rtc/rtc-renesas-rtca3.c

656

val = FIELD_PREP(RTCA3_RCR1_PES, RTCA3_RCR1_PES_1_64_SEC);

drivers/rtc/rtc-rv3028.c

577

FIELD_PREP(RV3028_BACKUP_BSM, mode));

drivers/rtc/rtc-rv3032.c

394

FIELD_PREP(RV3032_OFFSET_MSK, offset));

drivers/rtc/rtc-rv3032.c

457

FIELD_PREP(RV3032_PMU_BSM, mode));

drivers/rtc/rtc-rv3032.c

582

val = FIELD_PREP(RV3032_PMU_TCM, 1) | FIELD_PREP(RV3032_PMU_BSM, RV3032_PMU_BSM_DSM);

drivers/rtc/rtc-rv3032.c

588

val = FIELD_PREP(RV3032_PMU_TCM, i) |

drivers/rtc/rtc-rv3032.c

589

FIELD_PREP(RV3032_PMU_BSM, RV3032_PMU_BSM_LSM);

drivers/rtc/rtc-rv3032.c

609

val | FIELD_PREP(RV3032_PMU_TCR, i));

drivers/rtc/rtc-rv3032.c

679

FIELD_PREP(RV3032_CLKOUT2_FD_MSK, i));

drivers/rtc/rtc-rv3032.c

695

FIELD_PREP(RV3032_CLKOUT2_HFD_MSK, hfd >> 8));

drivers/rtc/rtc-rv8803.c

156

FIELD_PREP(RX8803_CTRL_CSEL, 1)); /* 2s */

drivers/rtc/rtc-s32g.c

202

rtcc = FIELD_PREP(RTCC_CLKSEL_MASK, priv->clk_src_idx);

drivers/rtc/rtc-stm32.c

50

#define STM32_RTC_CR_OSEL_ALARM_A FIELD_PREP(STM32_RTC_CR_OSEL, 0x01)

drivers/rtc/rtc-sunplus.c

44

#define BAT_CHARGE_RSEL_2K_OHM FIELD_PREP(BAT_CHARGE_RSEL_MASK, 0)

drivers/rtc/rtc-sunplus.c

45

#define BAT_CHARGE_RSEL_250_OHM FIELD_PREP(BAT_CHARGE_RSEL_MASK, 1)

drivers/rtc/rtc-sunplus.c

46

#define BAT_CHARGE_RSEL_50_OHM FIELD_PREP(BAT_CHARGE_RSEL_MASK, 2)

drivers/rtc/rtc-sunplus.c

47

#define BAT_CHARGE_RSEL_0_OHM FIELD_PREP(BAT_CHARGE_RSEL_MASK, 3)

drivers/rtc/rtc-sunplus.c

50

#define BAT_CHARGE_DSEL_ON FIELD_PREP(BAT_CHARGE_DSEL_MASK, 0)

drivers/rtc/rtc-sunplus.c

51

#define BAT_CHARGE_DSEL_OFF FIELD_PREP(BAT_CHARGE_DSEL_MASK, 1)

drivers/soc/amlogic/meson-clk-measure.c

806

FIELD_PREP(MSR_DURATION, duration - 1));

drivers/soc/amlogic/meson-clk-measure.c

810

FIELD_PREP(MSR_CLK_SRC, clk_msr_id->id));

drivers/soc/apple/mailbox.c

157

writeq_relaxed(FIELD_PREP(APPLE_MBOX_MSG1_MSG, msg.msg1),

drivers/soc/apple/rtkit.c

108

msg |= FIELD_PREP(APPLE_RTKIT_MGMT_TYPE, type);

drivers/soc/apple/rtkit.c

143

reply = FIELD_PREP(APPLE_RTKIT_MGMT_HELLO_MINVER, want_ver);

drivers/soc/apple/rtkit.c

144

reply |= FIELD_PREP(APPLE_RTKIT_MGMT_HELLO_MAXVER, want_ver);

drivers/soc/apple/rtkit.c

171

reply = FIELD_PREP(APPLE_RTKIT_MGMT_EPMAP_BASE, base);

drivers/soc/apple/rtkit.c

303

reply = FIELD_PREP(APPLE_RTKIT_OSLOG_TYPE,

drivers/soc/apple/rtkit.c

305

reply |= FIELD_PREP(APPLE_RTKIT_OSLOG_SIZE, buffer->size);

drivers/soc/apple/rtkit.c

306

reply |= FIELD_PREP(APPLE_RTKIT_OSLOG_IOVA,

drivers/soc/apple/rtkit.c

309

reply = FIELD_PREP(APPLE_RTKIT_SYSLOG_TYPE,

drivers/soc/apple/rtkit.c

311

reply |= FIELD_PREP(APPLE_RTKIT_BUFFER_REQUEST_SIZE,

drivers/soc/apple/rtkit.c

313

reply |= FIELD_PREP(APPLE_RTKIT_BUFFER_REQUEST_IOVA,

drivers/soc/apple/rtkit.c

652

msg = FIELD_PREP(APPLE_RTKIT_MGMT_STARTEP_EP, endpoint);

drivers/soc/apple/rtkit.c

773

msg = FIELD_PREP(APPLE_RTKIT_MGMT_PWR_STATE, state);

drivers/soc/apple/rtkit.c

796

msg = FIELD_PREP(APPLE_RTKIT_MGMT_PWR_STATE, state);

drivers/soc/apple/rtkit.c

928

msg = FIELD_PREP(APPLE_RTKIT_MGMT_PWR_STATE, APPLE_RTKIT_PWR_STATE_INIT);

drivers/soc/apple/sart.c

103

cfg = FIELD_PREP(APPLE_SART0_CONFIG_FLAGS, flags);

drivers/soc/apple/sart.c

104

cfg |= FIELD_PREP(APPLE_SART0_CONFIG_SIZE, size_shifted);

drivers/soc/apple/sart.c

136

cfg = FIELD_PREP(APPLE_SART2_CONFIG_FLAGS, flags);

drivers/soc/apple/sart.c

137

cfg |= FIELD_PREP(APPLE_SART2_CONFIG_SIZE, size_shifted);

drivers/soc/fsl/qe/qmc.c

106

#define QMC_TSA_CHANNEL(x) FIELD_PREP(QMC_TSA_CHANNEL_MASK, x)

drivers/soc/fsl/qe/qmc.c

121

#define QMC_SPE_CHAMR_HDLC_NOF(x) FIELD_PREP(QMC_SPE_CHAMR_HDLC_NOF_MASK, x)

drivers/soc/fsl/qe/qmc.c

151

#define QMC_SPE_TRNSYNC_RX(x) FIELD_PREP(QMC_SPE_TRNSYNC_RX_MASK, x)

drivers/soc/fsl/qe/qmc.c

153

#define QMC_SPE_TRNSYNC_TX(x) FIELD_PREP(QMC_SPE_TRNSYNC_TX_MASK, x)

drivers/soc/fsl/qe/qmc.c

190

#define QMC_BD_TX_PAD(x) FIELD_PREP(QMC_BD_TX_PAD_MASK, x)

drivers/soc/fsl/qe/tsa.c

105

#define TSA_CPM1_SICR_SCC2(x) FIELD_PREP(TSA_CPM1_SICR_SCC2_MASK, x)

drivers/soc/fsl/qe/tsa.c

107

#define TSA_CPM1_SICR_SCC3(x) FIELD_PREP(TSA_CPM1_SICR_SCC3_MASK, x)

drivers/soc/fsl/qe/tsa.c

109

#define TSA_CPM1_SICR_SCC4(x) FIELD_PREP(TSA_CPM1_SICR_SCC4_MASK, x)

drivers/soc/fsl/qe/tsa.c

27

#define TSA_CPM1_SIRAM_ENTRY_CNT(x) FIELD_PREP(TSA_CPM1_SIRAM_ENTRY_CNT_MASK, x)

drivers/soc/fsl/qe/tsa.c

40

#define TSA_QE_SIRAM_ENTRY_CNT(x) FIELD_PREP(TSA_QE_SIRAM_ENTRY_CNT_MASK, x)

drivers/soc/fsl/qe/tsa.c

62

#define TSA_CPM1_SIMODE_TDMA(x) FIELD_PREP(TSA_CPM1_SIMODE_TDMA_MASK, x)

drivers/soc/fsl/qe/tsa.c

64

#define TSA_CPM1_SIMODE_TDMB(x) FIELD_PREP(TSA_CPM1_SIMODE_TDMB_MASK, x)

drivers/soc/fsl/qe/tsa.c

66

#define TSA_QE_SIMODE_TDM_SAD(x) FIELD_PREP(TSA_QE_SIMODE_TDM_SAD_MASK, x)

drivers/soc/fsl/qe/tsa.c

74

#define TSA_SIMODE_TDM_RFSD(x) FIELD_PREP(TSA_SIMODE_TDM_RFSD_MASK, x)

drivers/soc/fsl/qe/tsa.c

83

#define TSA_SIMODE_TDM_TFSD(x) FIELD_PREP(TSA_SIMODE_TDM_TFSD_MASK, x)

drivers/soc/mediatek/mtk-dvfsrc.c

349

val |= FIELD_PREP(DVFSRC_V1_SW_REQ2_VCORE_LEVEL, level);

drivers/soc/mediatek/mtk-dvfsrc.c

366

val |= FIELD_PREP(DVFSRC_V2_SW_REQ_VCORE_LEVEL, level);

drivers/soc/mediatek/mtk-dvfsrc.c

383

val |= FIELD_PREP(DVFSRC_V2_VCORE_REQ_VSCP_LEVEL, level);

drivers/soc/mediatek/mtk-dvfsrc.c

459

val = FIELD_PREP(DVFSRC_V1_SW_REQ2_DRAM_LEVEL, opp->dram_opp);

drivers/soc/mediatek/mtk-dvfsrc.c

460

val |= FIELD_PREP(DVFSRC_V1_SW_REQ2_VCORE_LEVEL, opp->vcore_opp);

drivers/soc/mediatek/mtk-dvfsrc.c

553

val |= FIELD_PREP(DVFSRC_V4_SW_REQ_DRAM_LEVEL, level);

drivers/soc/mediatek/mtk-svs.c

1196

freqpct74_val = FIELD_PREP(SVSB_FREQPCTS_FLD_PCT0_4, svsb->freq_pct[8]) |

drivers/soc/mediatek/mtk-svs.c

1197

FIELD_PREP(SVSB_FREQPCTS_FLD_PCT1_5, svsb->freq_pct[10]) |

drivers/soc/mediatek/mtk-svs.c

1198

FIELD_PREP(SVSB_FREQPCTS_FLD_PCT2_6, svsb->freq_pct[12]) |

drivers/soc/mediatek/mtk-svs.c

1199

FIELD_PREP(SVSB_FREQPCTS_FLD_PCT3_7, svsb->freq_pct[14]);

drivers/soc/mediatek/mtk-svs.c

1201

freqpct30_val = FIELD_PREP(SVSB_FREQPCTS_FLD_PCT0_4, svsb->freq_pct[0]) |

drivers/soc/mediatek/mtk-svs.c

1202

FIELD_PREP(SVSB_FREQPCTS_FLD_PCT1_5, svsb->freq_pct[2]) |

drivers/soc/mediatek/mtk-svs.c

1203

FIELD_PREP(SVSB_FREQPCTS_FLD_PCT2_6, svsb->freq_pct[4]) |

drivers/soc/mediatek/mtk-svs.c

1204

FIELD_PREP(SVSB_FREQPCTS_FLD_PCT3_7, svsb->freq_pct[6]);

drivers/soc/mediatek/mtk-svs.c

1220

des_char = FIELD_PREP(SVSB_DESCHAR_FLD_BDES, svsb->bdes) |

drivers/soc/mediatek/mtk-svs.c

1221

FIELD_PREP(SVSB_DESCHAR_FLD_MDES, svsb->mdes);

drivers/soc/mediatek/mtk-svs.c

1224

temp_char = FIELD_PREP(SVSB_TEMPCHAR_FLD_VCO, bdata->vco) |

drivers/soc/mediatek/mtk-svs.c

1225

FIELD_PREP(SVSB_TEMPCHAR_FLD_MTDES, svsb->mtdes) |

drivers/soc/mediatek/mtk-svs.c

1226

FIELD_PREP(SVSB_TEMPCHAR_FLD_DVT_FIXED, svsb->dvt_fixed);

drivers/soc/mediatek/mtk-svs.c

1229

det_char = FIELD_PREP(SVSB_DETCHAR_FLD_DCBDET, svsb->dcbdet) |

drivers/soc/mediatek/mtk-svs.c

1230

FIELD_PREP(SVSB_DETCHAR_FLD_DCMDET, svsb->dcmdet);

drivers/soc/mediatek/mtk-svs.c

1239

limit_vals = FIELD_PREP(SVSB_LIMITVALS_FLD_DTLO, SVSB_VAL_DTLO) |

drivers/soc/mediatek/mtk-svs.c

1240

FIELD_PREP(SVSB_LIMITVALS_FLD_DTHI, SVSB_VAL_DTHI) |

drivers/soc/mediatek/mtk-svs.c

1241

FIELD_PREP(SVSB_LIMITVALS_FLD_VMIN, svsb->vmin) |

drivers/soc/mediatek/mtk-svs.c

1242

FIELD_PREP(SVSB_LIMITVALS_FLD_VMAX, svsb->vmax);

drivers/soc/mediatek/mtk-svs.c

1258

init2vals = FIELD_PREP(SVSB_INIT2VALS_FLD_AGEVOFFSETIN, svsb->age_voffset_in) |

drivers/soc/mediatek/mtk-svs.c

1259

FIELD_PREP(SVSB_INIT2VALS_FLD_DCVOFFSETIN, svsb->dc_voffset_in);

drivers/soc/mediatek/mtk-svs.c

1265

ts_calcs = FIELD_PREP(SVSB_TSCALCS_FLD_BTS, svsb->bts) |

drivers/soc/mediatek/mtk-svs.c

1266

FIELD_PREP(SVSB_TSCALCS_FLD_MTS, svsb->mts);

drivers/soc/mediatek/mtk-svs.c

53

#define SVSB_DET_MAX FIELD_PREP(SVSB_PTPCONFIG_DETMAX, 0xffff)

drivers/soc/qcom/llcc-qcom.c

4817

attr2_val |= FIELD_PREP(ATTR2_PROBE_TARGET_WAYS_MASK, config->probe_target_ways);

drivers/soc/qcom/llcc-qcom.c

4818

attr2_val |= FIELD_PREP(ATTR2_FIXED_SIZE_MASK, config->fixed_size);

drivers/soc/qcom/llcc-qcom.c

4819

attr2_val |= FIELD_PREP(ATTR2_PRIORITY_MASK, config->priority);

drivers/soc/qcom/llcc-qcom.c

4822

attr2_val |= FIELD_PREP(ATTR2_PARENT_SCID_MASK, config->parent_slice_id);

drivers/soc/qcom/ocmem.c

100

#define OCMEM_PSGSC_CTL_MACRO3_MODE(val) FIELD_PREP(0x00007000, (val))

drivers/soc/qcom/ocmem.c

97

#define OCMEM_PSGSC_CTL_MACRO0_MODE(val) FIELD_PREP(0x00000007, (val))

drivers/soc/qcom/ocmem.c

98

#define OCMEM_PSGSC_CTL_MACRO1_MODE(val) FIELD_PREP(0x00000070, (val))

drivers/soc/qcom/ocmem.c

99

#define OCMEM_PSGSC_CTL_MACRO2_MODE(val) FIELD_PREP(0x00000700, (val))

drivers/soc/qcom/pmic_glink_altmode.c

273

data.eudo = FIELD_PREP(EUDO_USB_MODE_MASK, EUDO_USB_MODE_USB4);

drivers/soc/qcom/pmic_glink_altmode.c

276

data.eudo |= FIELD_PREP(EUDO_CABLE_SPEED_MASK, EUDO_CABLE_SPEED_USB4_GEN2);

drivers/soc/qcom/pmic_glink_altmode.c

278

data.eudo |= FIELD_PREP(EUDO_CABLE_SPEED_MASK, EUDO_CABLE_SPEED_USB4_GEN3);

drivers/soc/qcom/pmic_glink_altmode.c

282

data.eudo |= FIELD_PREP(EUDO_CABLE_SPEED_MASK, EUDO_CABLE_SPEED_USB4_GEN2);

drivers/soc/qcom/pmic_glink_altmode.c

285

data.eudo |= FIELD_PREP(EUDO_CABLE_TYPE_MASK, tbt->cable_type);

drivers/soc/qcom/qcom-geni-se.c

1169

reg = FIELD_PREP(FW_REV_PROTOCOL_MSK, serial_protocol);

drivers/soc/qcom/qcom-geni-se.c

1170

reg |= FIELD_PREP(FW_REV_VERSION_MSK, fw_version);

drivers/soc/qcom/ramp_controller.c

105

ack = FIELD_PREP(RC_CFG_ACK, BIT(ce));

drivers/soc/qcom/spm.c

27

(((current) & ~(mask)) | FIELD_PREP((mask), (val)))

drivers/soundwire/amd_manager.c

213

upper_data = FIELD_PREP(AMD_SDW_MCP_CMD_DEV_ADDR, msg->dev_num);

drivers/soundwire/amd_manager.c

214

upper_data |= FIELD_PREP(AMD_SDW_MCP_CMD_COMMAND, msg->flags + 2);

drivers/soundwire/amd_manager.c

215

upper_data |= FIELD_PREP(AMD_SDW_MCP_CMD_REG_ADDR_HIGH, upper_addr);

drivers/soundwire/amd_manager.c

216

lower_data |= FIELD_PREP(AMD_SDW_MCP_CMD_REG_ADDR_LOW, lower_addr);

drivers/soundwire/amd_manager.c

217

lower_data |= FIELD_PREP(AMD_SDW_MCP_CMD_REG_DATA, data);

drivers/soundwire/amd_manager.c

576

dpn_hctrl = FIELD_PREP(AMD_DPN_HCTRL_HSTOP, params->hstop);

drivers/soundwire/amd_manager.c

577

dpn_hctrl |= FIELD_PREP(AMD_DPN_HCTRL_HSTART, params->hstart);

drivers/soundwire/amd_manager.c

580

dpn_offsetctrl = FIELD_PREP(AMD_DPN_OFFSET_CTRL_1, params->offset1);

drivers/soundwire/amd_manager.c

581

dpn_offsetctrl |= FIELD_PREP(AMD_DPN_OFFSET_CTRL_2, params->offset2);

drivers/soundwire/cadence_master.c

1340

val = FIELD_PREP(CDNS_MCP_FRAME_SHAPE_ROW_MASK, r);

drivers/soundwire/cadence_master.c

1341

val |= FIELD_PREP(CDNS_MCP_FRAME_SHAPE_COL_MASK, c);

drivers/soundwire/cadence_master.c

1937

val |= FIELD_PREP(CDNS_PDI_CONFIG_CHANNEL, (1 << ch) - 1);

drivers/soundwire/cadence_master.c

644

data = FIELD_PREP(CDNS_MCP_CMD_DEV_ADDR, msg->dev_num);

drivers/soundwire/cadence_master.c

645

data |= FIELD_PREP(CDNS_MCP_CMD_COMMAND, cmd);

drivers/soundwire/cadence_master.c

646

data |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, addr);

drivers/soundwire/cadence_master.c

652

data |= FIELD_PREP(CDNS_MCP_CMD_SSP_TAG, msg->ssp_sync);

drivers/soundwire/cadence_master.c

691

data[0] = FIELD_PREP(CDNS_MCP_CMD_DEV_ADDR, msg->dev_num);

drivers/soundwire/cadence_master.c

692

data[0] |= FIELD_PREP(CDNS_MCP_CMD_COMMAND, 0x3);

drivers/soundwire/cadence_master.c

695

data[0] |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, SDW_SCP_ADDRPAGE1);

drivers/soundwire/cadence_master.c

696

data[1] |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, SDW_SCP_ADDRPAGE2);

drivers/soundwire/intel.c

411

spa_mask = FIELD_PREP(SDW_SHIM_LCTL_SPA_MASK, sdw->link_res->link_mask);

drivers/soundwire/intel.c

412

cpa_mask = FIELD_PREP(SDW_SHIM_LCTL_CPA_MASK, sdw->link_res->link_mask);

drivers/soundwire/intel.c

479

spa_mask = FIELD_PREP(SDW_SHIM_LCTL_SPA_MASK, ~sdw->link_res->link_mask);

drivers/soundwire/intel.c

480

cpa_mask = FIELD_PREP(SDW_SHIM_LCTL_CPA_MASK, sdw->link_res->link_mask);

drivers/soundwire/qcom.c

885

val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);

drivers/soundwire/qcom.c

886

val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);

drivers/soundwire/stream.c

119

wbuf = FIELD_PREP(SDW_DPN_HCTRL_HSTART, t_params->hstart);

drivers/soundwire/stream.c

120

wbuf |= FIELD_PREP(SDW_DPN_HCTRL_HSTOP, t_params->hstop);

drivers/soundwire/stream.c

177

wbuf = FIELD_PREP(SDW_DPN_PORTCTRL_DATAMODE, p_params->data_mode);

drivers/soundwire/stream.c

178

wbuf |= FIELD_PREP(SDW_DPN_PORTCTRL_FLOWMODE, p_params->flow_mode);

drivers/spi/atmel-quadspi.c

1028

FIELD_PREP(QSPI_PCALCFG_CLKDIV, pclk_div) |

drivers/spi/atmel-quadspi.c

1029

FIELD_PREP(QSPI_PCALCFG_CALCNT,

drivers/spi/atmel-quadspi.c

1055

atmel_qspi_write(FIELD_PREP(QSPI_REFRESH_DELAY_COUNTER,

drivers/spi/atmel-quadspi.c

695

icr = FIELD_PREP(QSPI_ICR_INST_MASK_SAMA7G5, op->cmd.opcode);

drivers/spi/atmel-quadspi.c

713

ifr |= FIELD_PREP(QSPI_IFR_ADDRL_SAMA7G5, op->addr.nbytes - 1) |

drivers/spi/atmel-quadspi.c

715

iar = FIELD_PREP(QSPI_IAR_ADDR, op->addr.val);

drivers/spi/atmel-quadspi.c

728

ifr |= FIELD_PREP(QSPI_IFR_PROTTYP, QSPI_IFR_PROTTYP_OCTAFLASH);

drivers/spi/atmel-quadspi.c

757

atmel_qspi_write(FIELD_PREP(QSPI_WRACNT_NBWRA,

drivers/spi/spi-airoha-snfi.c

235

FIELD_PREP(SPI_CTRL_OPFIFO_LEN, op_len) |

drivers/spi/spi-airoha-snfi.c

236

FIELD_PREP(SPI_CTRL_OPFIFO_OP, op_cmd));

drivers/spi/spi-airoha-snfi.c

283

FIELD_PREP(SPI_CTRL_DFIFO_WDATA, data[i]));

drivers/spi/spi-airoha-snfi.c

624

FIELD_PREP(SPI_NFI_OPMODE, 6));

drivers/spi/spi-airoha-snfi.c

631

FIELD_PREP(SPI_NFI_SEC_NUM, 1));

drivers/spi/spi-airoha-snfi.c

639

FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, bytes) |

drivers/spi/spi-airoha-snfi.c

667

FIELD_PREP(SPI_NFI_READ_DATA_BYTE_NUM, bytes));

drivers/spi/spi-airoha-snfi.c

673

FIELD_PREP(SPI_NFI_DATA_READ_CMD, opcode));

drivers/spi/spi-airoha-snfi.c

679

FIELD_PREP(SPI_NFI_DATA_READ_WR_MODE, rd_mode));

drivers/spi/spi-airoha-snfi.c

813

FIELD_PREP(SPI_NFI_OPMODE, 3));

drivers/spi/spi-airoha-snfi.c

820

FIELD_PREP(SPI_NFI_SEC_NUM, 1));

drivers/spi/spi-airoha-snfi.c

828

FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, bytes) |

drivers/spi/spi-airoha-snfi.c

856

FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM, bytes));

drivers/spi/spi-airoha-snfi.c

862

FIELD_PREP(SPI_NFI_PG_LOAD_CMD, opcode));

drivers/spi/spi-airoha-snfi.c

868

FIELD_PREP(SPI_NFI_DATA_READ_WR_MODE, wr_mode));

drivers/spi/spi-amlogic-spifc-a1.c

100

#define SPIFC_A1_TWHSL_VAL FIELD_PREP(SPIFC_A1_TWHSL, 2)

drivers/spi/spi-amlogic-spifc-a1.c

211

val |= FIELD_PREP(SPIFC_A1_USER_DIN_MODE, mode);

drivers/spi/spi-amlogic-spifc-a1.c

212

val |= FIELD_PREP(SPIFC_A1_USER_DIN_BYTES, size);

drivers/spi/spi-amlogic-spifc-a1.c

231

val |= FIELD_PREP(SPIFC_A1_USER_DOUT_MODE, mode);

drivers/spi/spi-amlogic-spifc-a1.c

232

val |= FIELD_PREP(SPIFC_A1_USER_DOUT_BYTES, size);

drivers/spi/spi-amlogic-spifc-a1.c

82

FIELD_PREP(SPIFC_A1_USER_CMD_CODE, (op)->cmd.opcode) | \

drivers/spi/spi-amlogic-spifc-a1.c

83

FIELD_PREP(SPIFC_A1_USER_CMD_MODE, ilog2((op)->cmd.buswidth)))

drivers/spi/spi-amlogic-spifc-a1.c

87

FIELD_PREP(SPIFC_A1_USER_ADDR_MODE, ilog2((op)->addr.buswidth)) | \

drivers/spi/spi-amlogic-spifc-a1.c

88

FIELD_PREP(SPIFC_A1_USER_ADDR_BYTES, (op)->addr.nbytes - 1))

drivers/spi/spi-amlogic-spifc-a1.c

92

FIELD_PREP(SPIFC_A1_USER_DUMMY_MODE, ilog2((op)->dummy.buswidth)) | \

drivers/spi/spi-amlogic-spifc-a1.c

93

FIELD_PREP(SPIFC_A1_USER_DUMMY_CLK_SYCLES, (op)->dummy.nbytes << 3))

drivers/spi/spi-amlogic-spifc-a1.c

95

#define SPIFC_A1_TSLCH_VAL FIELD_PREP(SPIFC_A1_TSLCH, 1)

drivers/spi/spi-amlogic-spifc-a1.c

96

#define SPIFC_A1_TCLSH_VAL FIELD_PREP(SPIFC_A1_TCLSH, 1)

drivers/spi/spi-amlogic-spifc-a1.c

97

#define SPIFC_A1_TSHWL_VAL FIELD_PREP(SPIFC_A1_TSHWL, 7)

drivers/spi/spi-amlogic-spifc-a1.c

98

#define SPIFC_A1_TSHSL2_VAL FIELD_PREP(SPIFC_A1_TSHSL2, 7)

drivers/spi/spi-amlogic-spifc-a1.c

99

#define SPIFC_A1_TSHSL1_VAL FIELD_PREP(SPIFC_A1_TSHSL1, 7)

drivers/spi/spi-amlogic-spifc-a4.c

897

conf |= FIELD_PREP(RXADJ, sfc->rx_adj);

drivers/spi/spi-amlogic-spisg.c

231

ccsg->addr = FIELD_PREP(LINK_ADDR_VALID, 1) |

drivers/spi/spi-amlogic-spisg.c

232

FIELD_PREP(LINK_ADDR_RING, 0) |

drivers/spi/spi-amlogic-spisg.c

233

FIELD_PREP(LINK_ADDR_EOC, sg_is_last(sg)) |

drivers/spi/spi-amlogic-spisg.c

234

FIELD_PREP(LINK_ADDR_LEN, sg_dma_len(sg));

drivers/spi/spi-amlogic-spisg.c

272

desc->cfg_start |= FIELD_PREP(CFG_EOC, 0);

drivers/spi/spi-amlogic-spisg.c

273

desc->cfg_bus |= FIELD_PREP(CFG_KEEP_SS, !xfer->cs_change);

drivers/spi/spi-amlogic-spisg.c

274

desc->cfg_bus |= FIELD_PREP(CFG_NULL_CTL, 0);

drivers/spi/spi-amlogic-spisg.c

277

desc->cfg_bus |= FIELD_PREP(CFG_LANE, nbits_to_lane[xfer->tx_nbits]);

drivers/spi/spi-amlogic-spisg.c

278

desc->cfg_start |= FIELD_PREP(CFG_OP_MODE, SPISG_OP_MODE_WRITE);

drivers/spi/spi-amlogic-spisg.c

281

desc->cfg_bus |= FIELD_PREP(CFG_LANE, nbits_to_lane[xfer->rx_nbits]);

drivers/spi/spi-amlogic-spisg.c

282

desc->cfg_start |= FIELD_PREP(CFG_OP_MODE, SPISG_OP_MODE_READ);

drivers/spi/spi-amlogic-spisg.c

286

desc->cfg_start |= FIELD_PREP(CFG_BLOCK_SIZE, blocks) |

drivers/spi/spi-amlogic-spisg.c

287

FIELD_PREP(CFG_BLOCK_NUM, 1);

drivers/spi/spi-amlogic-spisg.c

290

desc->cfg_start |= FIELD_PREP(CFG_BLOCK_SIZE, block_size & 0x7) |

drivers/spi/spi-amlogic-spisg.c

291

FIELD_PREP(CFG_BLOCK_NUM, blocks);

drivers/spi/spi-amlogic-spisg.c

313

desc->cfg_start |= FIELD_PREP(CFG_TXD_MODE, SPISG_DATA_MODE_SG);

drivers/spi/spi-amlogic-spisg.c

330

desc->cfg_start |= FIELD_PREP(CFG_TXD_MODE, SPISG_DATA_MODE_MEM);

drivers/spi/spi-amlogic-spisg.c

352

desc->cfg_start |= FIELD_PREP(CFG_RXD_MODE, SPISG_DATA_MODE_SG);

drivers/spi/spi-amlogic-spisg.c

370

desc->cfg_start |= FIELD_PREP(CFG_RXD_MODE, SPISG_DATA_MODE_MEM);

drivers/spi/spi-amlogic-spisg.c

418

desc->cfg_start |= FIELD_PREP(CFG_OP_MODE, SPISG_OP_MODE_WRITE) |

drivers/spi/spi-amlogic-spisg.c

419

FIELD_PREP(CFG_BLOCK_SIZE, 1) |

drivers/spi/spi-amlogic-spisg.c

420

FIELD_PREP(CFG_BLOCK_NUM, DIV_ROUND_UP(n_sclk, 8));

drivers/spi/spi-amlogic-spisg.c

422

desc->cfg_bus |= FIELD_PREP(CFG_NULL_CTL, 1);

drivers/spi/spi-amlogic-spisg.c

529

desc->cfg_bus |= FIELD_PREP(CFG_CS_SETUP,

drivers/spi/spi-amlogic-spisg.c

549

desc->cfg_bus |= FIELD_PREP(CFG_KEEP_SS, 0);

drivers/spi/spi-amlogic-spisg.c

550

desc->cfg_start |= FIELD_PREP(CFG_EOC, 1);

drivers/spi/spi-amlogic-spisg.c

605

spisg->cfg_spi |= FIELD_PREP(CFG_SLAVE_SELECT, spi_get_chipselect(spi, 0));

drivers/spi/spi-amlogic-spisg.c

608

spisg->cfg_bus |= FIELD_PREP(CFG_CPOL, !!(spi->mode & SPI_CPOL)) |

drivers/spi/spi-amlogic-spisg.c

609

FIELD_PREP(CFG_CPHA, !!(spi->mode & SPI_CPHA)) |

drivers/spi/spi-amlogic-spisg.c

610

FIELD_PREP(CFG_B_L_ENDIAN, !!(spi->mode & SPI_LSB_FIRST)) |

drivers/spi/spi-amlogic-spisg.c

611

FIELD_PREP(CFG_HALF_DUPLEX, !!(spi->mode & SPI_3WIRE));

drivers/spi/spi-amlogic-spisg.c

687

FIELD_PREP(CFG_CLK_DIV, SPISG_CLK_DIV_MIN - 1));

drivers/spi/spi-amlogic-spisg.c

768

spisg->cfg_spi = FIELD_PREP(CFG_SFLASH_WP, 1) |

drivers/spi/spi-amlogic-spisg.c

769

FIELD_PREP(CFG_SFLASH_HD, 1);

drivers/spi/spi-amlogic-spisg.c

771

spisg->cfg_spi |= FIELD_PREP(CFG_SLAVE_EN, 1);

drivers/spi/spi-amlogic-spisg.c

772

spisg->cfg_bus = FIELD_PREP(CFG_TX_TUNING, 0xf);

drivers/spi/spi-amlogic-spisg.c

775

spisg->cfg_start = FIELD_PREP(CFG_PEND, 1);

drivers/spi/spi-apple.c

160

FIELD_PREP(APPLE_SPI_CFG_FIFO_THRESH, APPLE_SPI_CFG_FIFO_THRESH_8B) |

drivers/spi/spi-apple.c

161

FIELD_PREP(APPLE_SPI_CFG_MODE, APPLE_SPI_CFG_MODE_IRQ) |

drivers/spi/spi-apple.c

162

FIELD_PREP(APPLE_SPI_CFG_WORD_SIZE, APPLE_SPI_CFG_WORD_SIZE_8B));

drivers/spi/spi-apple.c

206

FIELD_PREP(APPLE_SPI_SHIFTCFG_BITS, t->bits_per_word));

drivers/spi/spi-atcspi200.c

42

#define TRANS_FMT_DATA_LEN(x) FIELD_PREP(TRANS_FMT_DATA_LEN_MASK, (x) - 1)

drivers/spi/spi-atcspi200.c

43

#define TRANS_FMT_ADDR_LEN(x) FIELD_PREP(TRANS_FMT_ADDR_LEN_MASK, (x) - 1)

drivers/spi/spi-atcspi200.c

47

#define TRANS_MODE_W_ONLY FIELD_PREP(TRANS_MODE_MASK, 1)

drivers/spi/spi-atcspi200.c

48

#define TRANS_MODE_R_ONLY FIELD_PREP(TRANS_MODE_MASK, 2)

drivers/spi/spi-atcspi200.c

49

#define TRANS_MODE_NONE_DATA FIELD_PREP(TRANS_MODE_MASK, 7)

drivers/spi/spi-atcspi200.c

50

#define TRANS_MODE_DMY_READ FIELD_PREP(TRANS_MODE_MASK, 9)

drivers/spi/spi-atcspi200.c

51

#define TRANS_FIELD_DECNZ(m, x) ((x) ? FIELD_PREP(m, (x) - 1) : 0)

drivers/spi/spi-atcspi200.c

55

#define TRANS_DUAL_QUAD(x) FIELD_PREP(GENMASK(23, 22), (x))

drivers/spi/spi-cadence-xspi.c

1052

FIELD_PREP(MRVL_XFER_CS_N_HOLD, (1 << cs)));

drivers/spi/spi-cadence-xspi.c

155

FIELD_PREP(CDNS_XSPI_CMD_INSTR_TYPE, (data_phase) ? \

drivers/spi/spi-cadence-xspi.c

157

FIELD_PREP(CDNS_XSPI_CMD_P1_R1_ADDR0, (op)->addr.val & 0xff))

drivers/spi/spi-cadence-xspi.c

160

FIELD_PREP(CDNS_XSPI_CMD_P1_R2_ADDR1, ((op)->addr.val >> 8) & 0xFF) | \

drivers/spi/spi-cadence-xspi.c

161

FIELD_PREP(CDNS_XSPI_CMD_P1_R2_ADDR2, ((op)->addr.val >> 16) & 0xFF) | \

drivers/spi/spi-cadence-xspi.c

162

FIELD_PREP(CDNS_XSPI_CMD_P1_R2_ADDR3, ((op)->addr.val >> 24) & 0xFF) | \

drivers/spi/spi-cadence-xspi.c

163

FIELD_PREP(CDNS_XSPI_CMD_P1_R2_ADDR4, ((op)->addr.val >> 32) & 0xFF))

drivers/spi/spi-cadence-xspi.c

166

FIELD_PREP(CDNS_XSPI_CMD_P1_R3_ADDR5, ((op)->addr.val >> 40) & 0xFF) | \

drivers/spi/spi-cadence-xspi.c

167

FIELD_PREP(CDNS_XSPI_CMD_P1_R3_CMD, (op)->cmd.opcode) | \

drivers/spi/spi-cadence-xspi.c

168

FIELD_PREP(MODE_NO_OF_BYTES, modebytes) | \

drivers/spi/spi-cadence-xspi.c

169

FIELD_PREP(CDNS_XSPI_CMD_P1_R3_NUM_ADDR_BYTES, (op)->addr.nbytes))

drivers/spi/spi-cadence-xspi.c

172

FIELD_PREP(CDNS_XSPI_CMD_P1_R4_ADDR_IOS, ilog2((op)->addr.buswidth)) | \

drivers/spi/spi-cadence-xspi.c

173

FIELD_PREP(CDNS_XSPI_CMD_P1_R4_CMD_IOS, ilog2((op)->cmd.buswidth)) | \

drivers/spi/spi-cadence-xspi.c

174

FIELD_PREP(CDNS_XSPI_CMD_P1_R4_BANK, chipsel))

drivers/spi/spi-cadence-xspi.c

177

FIELD_PREP(CDNS_XSPI_CMD_INSTR_TYPE, CDNS_XSPI_STIG_INSTR_TYPE_DATA_SEQ)

drivers/spi/spi-cadence-xspi.c

180

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R2_DCNT_L, (op)->data.nbytes & 0xFFFF)

drivers/spi/spi-cadence-xspi.c

183

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R3_DCNT_H, \

drivers/spi/spi-cadence-xspi.c

185

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R3_NUM_OF_DUMMY, \

drivers/spi/spi-cadence-xspi.c

191

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R4_BANK, chipsel) | \

drivers/spi/spi-cadence-xspi.c

192

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R4_DATA_IOS, \

drivers/spi/spi-cadence-xspi.c

194

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R4_DIR, \

drivers/spi/spi-cadence-xspi.c

202

FIELD_PREP(CDNS_XSPI_CMD_INSTR_TYPE, INSTRUCTION_TYPE_GENERIC))

drivers/spi/spi-cadence-xspi.c

206

FIELD_PREP(GENERIC_NUM_OF_BYTES, len))

drivers/spi/spi-cadence-xspi.c

211

FIELD_PREP(GENERIC_BANK_NUM, cs) | FIELD_PREP(GENERIC_GLUE_CMD, glue))

drivers/spi/spi-cadence-xspi.c

214

FIELD_PREP(CDNS_XSPI_CMD_INSTR_TYPE, CDNS_XSPI_STIG_INSTR_TYPE_DATA_SEQ))

drivers/spi/spi-cadence-xspi.c

217

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R2_DCNT_L, nbytes & 0xffff))

drivers/spi/spi-cadence-xspi.c

220

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R3_DCNT_H, (nbytes >> 16) & 0xffff))

drivers/spi/spi-cadence-xspi.c

223

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R4_BANK, chipsel) | \

drivers/spi/spi-cadence-xspi.c

224

FIELD_PREP(CDNS_XSPI_CMD_DSEQ_R4_DIR, dir))

drivers/spi/spi-cadence-xspi.c

455

clk_reg = FIELD_PREP(MRVL_XSPI_CLK_DIV, i);

drivers/spi/spi-cadence-xspi.c

457

clk_reg |= FIELD_PREP(MRVL_XSPI_CLK_DIV, i);

drivers/spi/spi-cadence-xspi.c

688

writel(FIELD_PREP(CDNS_XSPI_CTRL_WORK_MODE, CDNS_XSPI_WORK_MODE_STIG),

drivers/spi/spi-cs42l43.c

70

val |= FIELD_PREP(GENMASK(31, 24), *buf);

drivers/spi/spi-dw-core.c

274

cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_FRF_MASK, DW_SPI_CTRLR0_FRF_MOTO_SPI);

drivers/spi/spi-dw-core.c

291

cr0 |= FIELD_PREP(DW_HSSI_CTRLR0_FRF_MASK, DW_SPI_CTRLR0_FRF_MOTO_SPI);

drivers/spi/spi-dw-core.c

328

cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_TMOD_MASK, cfg->tmode);

drivers/spi/spi-dw-core.c

331

cr0 |= FIELD_PREP(DW_HSSI_CTRLR0_TMOD_MASK, cfg->tmode);

drivers/spi/spi-fsi.c

373

FIELD_PREP(SPI_FSI_CLOCK_CFG_SCK_DIV, 19);

drivers/spi/spi-fsl-lpspi.c

445

temp |= FIELD_PREP(CFGR1_PCSPOL_MASK,

drivers/spi/spi-hisi-kunpeng.c

312

u32 cr = FIELD_PREP(CR_SPD_MODE_MASK, 1);

drivers/spi/spi-hisi-kunpeng.c

314

cr |= FIELD_PREP(CR_CPHA_MASK, (spi->mode & SPI_CPHA) ? 1 : 0);

drivers/spi/spi-hisi-kunpeng.c

315

cr |= FIELD_PREP(CR_CPOL_MASK, (spi->mode & SPI_CPOL) ? 1 : 0);

drivers/spi/spi-hisi-kunpeng.c

316

cr |= FIELD_PREP(CR_LOOP_MASK, (spi->mode & SPI_LOOP) ? 1 : 0);

drivers/spi/spi-hisi-kunpeng.c

326

writel(FIELD_PREP(FIFOC_TX_MASK, HISI_SPI_TX_64_OR_LESS) |

drivers/spi/spi-hisi-kunpeng.c

327

FIELD_PREP(FIFOC_RX_MASK, HISI_SPI_RX_16),

drivers/spi/spi-hisi-kunpeng.c

382

cr |= FIELD_PREP(CR_DIV_PRE_MASK, chip->div_pre);

drivers/spi/spi-hisi-kunpeng.c

383

cr |= FIELD_PREP(CR_DIV_POST_MASK, chip->div_post);

drivers/spi/spi-hisi-kunpeng.c

384

cr |= FIELD_PREP(CR_BPW_MASK, transfer->bits_per_word - 1);

drivers/spi/spi-imx.c

801

writel(FIELD_PREP(MX51_ECSPI_PERIOD_MASK, word_delay_sck),

drivers/spi/spi-ljca.c

127

w_packet.mode = FIELD_PREP(LJCA_SPI_CLK_MODE_POLARITY,

drivers/spi/spi-ljca.c

130

FIELD_PREP(LJCA_SPI_CLK_MODE_PHASE,

drivers/spi/spi-ljca.c

90

w_packet->indicator = FIELD_PREP(LJCA_SPI_XFER_INDICATOR_ID, id) |

drivers/spi/spi-ljca.c

91

FIELD_PREP(LJCA_SPI_XFER_INDICATOR_CMPL, complete) |

drivers/spi/spi-ljca.c

92

FIELD_PREP(LJCA_SPI_XFER_INDICATOR_INDEX,

drivers/spi/spi-meson-spicc.c

335

ld_ctr1 |= FIELD_PREP(DMA_READ_COUNTER, dma_burst_count);

drivers/spi/spi-meson-spicc.c

343

ld_ctr1 |= FIELD_PREP(DMA_WRITE_COUNTER, dma_burst_count);

drivers/spi/spi-meson-spicc.c

350

| FIELD_PREP(SPICC_TXFIFO_THRESHOLD_MASK, txfifo_thres)

drivers/spi/spi-meson-spicc.c

351

| FIELD_PREP(SPICC_READ_BURST_MASK, read_req)

drivers/spi/spi-meson-spicc.c

352

| FIELD_PREP(SPICC_RXFIFO_THRESHOLD_MASK, rxfifo_thres)

drivers/spi/spi-meson-spicc.c

353

| FIELD_PREP(SPICC_WRITE_BURST_MASK, write_req),

drivers/spi/spi-meson-spicc.c

452

FIELD_PREP(SPICC_BURSTLENGTH_MASK,

drivers/spi/spi-meson-spicc.c

528

conf |= FIELD_PREP(SPICC_MI_DELAY_MASK, mi_delay);

drivers/spi/spi-meson-spicc.c

529

conf |= FIELD_PREP(SPICC_MI_CAP_DELAY_MASK, cap_delay);

drivers/spi/spi-meson-spicc.c

543

conf |= FIELD_PREP(SPICC_BITLENGTH_MASK,

drivers/spi/spi-meson-spicc.c

697

conf |= FIELD_PREP(SPICC_DRCTL_MASK, SPICC_DRCTL_LOWLEVEL);

drivers/spi/spi-meson-spicc.c

699

conf |= FIELD_PREP(SPICC_DRCTL_MASK, SPICC_DRCTL_IGNORE);

drivers/spi/spi-meson-spicc.c

702

conf |= FIELD_PREP(SPICC_CS_MASK, spi_get_chipselect(spi, 0));

drivers/spi/spi-meson-spicc.c

705

conf |= FIELD_PREP(SPICC_BITLENGTH_MASK, 8 - 1);

drivers/spi/spi-nxp-xspi.c

1064

reg = FIELD_PREP(XSPI_BUF3CR_MSTRID_MASK, 0x06) |

drivers/spi/spi-nxp-xspi.c

1068

reg |= FIELD_PREP(XSPI_BUF3CR_ADATSZ_MASK, ahb_data_trans_size);

drivers/spi/spi-nxp-xspi.c

1077

reg = FIELD_PREP(XSPI_BFGENCR_SEQID_MASK, XSPI_SEQID_LUT);

drivers/spi/spi-nxp-xspi.c

1080

reg |= FIELD_PREP(XSPI_BFGENCR_ALIGN_MASK, 0);

drivers/spi/spi-nxp-xspi.c

1100

reg |= FIELD_PREP(XSPI_FRAD0_WORD2_MD0ACP_MASK, 0x03);

drivers/spi/spi-nxp-xspi.c

1138

reg = FIELD_PREP(XSPI_FLSHCR_TCSH_MASK, 0x03) |

drivers/spi/spi-nxp-xspi.c

1139

FIELD_PREP(XSPI_FLSHCR_TCSS_MASK, 0x03);

drivers/spi/spi-nxp-xspi.c

498

reg |= FIELD_PREP(XSPI_MCR_DQS_FA_SEL_MASK, 0x01);

drivers/spi/spi-nxp-xspi.c

507

reg = FIELD_PREP(XSPI_SMPR_DLLFSMPFA_MASK, 0) | XSPI_SMPR_FSPHS;

drivers/spi/spi-nxp-xspi.c

529

reg |= FIELD_PREP(XSPI_MCR_DQS_FA_SEL_MASK, 0x03);

drivers/spi/spi-nxp-xspi.c

535

reg |= FIELD_PREP(XSPI_FLSHCR_TDH_MASK, 0x01);

drivers/spi/spi-nxp-xspi.c

538

reg = FIELD_PREP(XSPI_SMPR_DLLFSMPFA_MASK, 0x04);

drivers/spi/spi-nxp-xspi.c

628

FIELD_PREP(XSPI_DLLCRA_SLV_DLY_COARSE_MASK, 0x0) |

drivers/spi/spi-nxp-xspi.c

657

reg = FIELD_PREP(XSPI_DLLCRA_DLL_REFCNTR_MASK, 0x02) |

drivers/spi/spi-nxp-xspi.c

658

FIELD_PREP(XSPI_DLLCRA_DLLRES_MASK, 0x08) |

drivers/spi/spi-nxp-xspi.c

926

reg = FIELD_PREP(XSPI_TBCT_WMRK_MASK, watermark);

drivers/spi/spi-nxp-xspi.c

957

reg = FIELD_PREP(XSPI_RBCT_WMRK_MASK, 31);

drivers/spi/spi-nxp-xspi.c

967

reg = FIELD_PREP(XSPI_SFP_TG_IPCR_SEQID_MASK, XSPI_SEQID_LUT) |

drivers/spi/spi-nxp-xspi.c

968

FIELD_PREP(XSPI_SFP_TG_IPCR_IDATSZ_MASK, len);

drivers/spi/spi-pci1xxxx.c

462

regval |= FIELD_PREP(SPI_MST_CTL_CMD_LEN_MASK, len);

drivers/spi/spi-pci1xxxx.c

463

regval |= FIELD_PREP(SPI_MST_CTL_SPEED_MASK, clkdiv);

drivers/spi/spi-qpic-snand.c

1037

FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);

drivers/spi/spi-qpic-snand.c

1118

FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);

drivers/spi/spi-qpic-snand.c

1195

FIELD_PREP(CW_PER_PAGE_MASK, 0);

drivers/spi/spi-qpic-snand.c

124

u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) |

drivers/spi/spi-qpic-snand.c

125

FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) |

drivers/spi/spi-qpic-snand.c

126

FIELD_PREP(READ_LOCATION_LAST_MASK, is_last_read_loc);

drivers/spi/spi-qpic-snand.c

145

u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) |

drivers/spi/spi-qpic-snand.c

146

FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) |

drivers/spi/spi-qpic-snand.c

147

FIELD_PREP(READ_LOCATION_LAST_MASK, is_last_read_loc);

drivers/spi/spi-qpic-snand.c

174

snand_cfg_val = FIELD_PREP(CLK_CNTR_INIT_VAL_VEC_MASK, CLK_CNTR_INIT_VAL_VEC) |

drivers/spi/spi-qpic-snand.c

175

FIELD_PREP(LOAD_CLK_CNTR_INIT_EN, 0) |

drivers/spi/spi-qpic-snand.c

176

FIELD_PREP(FEA_STATUS_DEV_ADDR_MASK, FEA_STATUS_DEV_ADDR) |

drivers/spi/spi-qpic-snand.c

177

FIELD_PREP(SPI_CFG, 0);

drivers/spi/spi-qpic-snand.c

344

ecc_cfg->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, (cwperpage - 1)) |

drivers/spi/spi-qpic-snand.c

345

FIELD_PREP(UD_SIZE_BYTES_MASK, ecc_cfg->cw_data) |

drivers/spi/spi-qpic-snand.c

346

FIELD_PREP(DISABLE_STATUS_AFTER_WRITE, 1) |

drivers/spi/spi-qpic-snand.c

347

FIELD_PREP(NUM_ADDR_CYCLES_MASK, 3) |

drivers/spi/spi-qpic-snand.c

348

FIELD_PREP(ECC_PARITY_SIZE_BYTES_RS, ecc_cfg->ecc_bytes_hw) |

drivers/spi/spi-qpic-snand.c

349

FIELD_PREP(STATUS_BFR_READ, 0) |

drivers/spi/spi-qpic-snand.c

350

FIELD_PREP(SET_RD_MODE_AFTER_STATUS, 1) |

drivers/spi/spi-qpic-snand.c

351

FIELD_PREP(SPARE_SIZE_BYTES_MASK, ecc_cfg->spare_bytes);

drivers/spi/spi-qpic-snand.c

353

ecc_cfg->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 0) |

drivers/spi/spi-qpic-snand.c

354

FIELD_PREP(CS_ACTIVE_BSY, 0) |

drivers/spi/spi-qpic-snand.c

355

FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, bad_block_byte) |

drivers/spi/spi-qpic-snand.c

356

FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 0) |

drivers/spi/spi-qpic-snand.c

357

FIELD_PREP(WR_RD_BSY_GAP_MASK, 20) |

drivers/spi/spi-qpic-snand.c

358

FIELD_PREP(WIDE_FLASH, 0) |

drivers/spi/spi-qpic-snand.c

359

FIELD_PREP(ENABLE_BCH_ECC, ecc_cfg->bch_enabled);

drivers/spi/spi-qpic-snand.c

361

ecc_cfg->cfg0_raw = FIELD_PREP(CW_PER_PAGE_MASK, (cwperpage - 1)) |

drivers/spi/spi-qpic-snand.c

362

FIELD_PREP(NUM_ADDR_CYCLES_MASK, 3) |

drivers/spi/spi-qpic-snand.c

363

FIELD_PREP(UD_SIZE_BYTES_MASK, ecc_cfg->cw_size) |

drivers/spi/spi-qpic-snand.c

364

FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);

drivers/spi/spi-qpic-snand.c

366

ecc_cfg->cfg1_raw = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 0) |

drivers/spi/spi-qpic-snand.c

367

FIELD_PREP(CS_ACTIVE_BSY, 0) |

drivers/spi/spi-qpic-snand.c

368

FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |

drivers/spi/spi-qpic-snand.c

369

FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) |

drivers/spi/spi-qpic-snand.c

370

FIELD_PREP(WR_RD_BSY_GAP_MASK, 20) |

drivers/spi/spi-qpic-snand.c

371

FIELD_PREP(WIDE_FLASH, 0) |

drivers/spi/spi-qpic-snand.c

372

FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1);

drivers/spi/spi-qpic-snand.c

374

ecc_cfg->ecc_bch_cfg = FIELD_PREP(ECC_CFG_ECC_DISABLE, !ecc_cfg->bch_enabled) |

drivers/spi/spi-qpic-snand.c

375

FIELD_PREP(ECC_SW_RESET, 0) |

drivers/spi/spi-qpic-snand.c

376

FIELD_PREP(ECC_NUM_DATA_BYTES_MASK, ecc_cfg->cw_data) |

drivers/spi/spi-qpic-snand.c

377

FIELD_PREP(ECC_FORCE_CLK_OPEN, 1) |

drivers/spi/spi-qpic-snand.c

378

FIELD_PREP(ECC_MODE_MASK, ecc_cfg->ecc_mode) |

drivers/spi/spi-qpic-snand.c

379

FIELD_PREP(ECC_PARITY_SIZE_BYTES_BCH_MASK, ecc_cfg->ecc_bytes_hw);

drivers/spi/spi-qpic-snand.c

381

ecc_cfg->ecc_buf_cfg = FIELD_PREP(NUM_STEPS_MASK, 0x203);

drivers/spi/spi-qpic-snand.c

518

FIELD_PREP(CW_PER_PAGE_MASK, 0));

drivers/spi/spi-qpic-snand.c

596

FIELD_PREP(CW_PER_PAGE_MASK, 0);

drivers/spi/spi-qpic-snand.c

725

FIELD_PREP(CW_PER_PAGE_MASK, 0);

drivers/spi/spi-qpic-snand.c

841

FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);

drivers/spi/spi-qpic-snand.c

930

FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);

drivers/spi/spi-rzv2h-rspi.c

642

conf32 |= FIELD_PREP(RSPI_SPCR_BPEN, rspi->use_pclk);

drivers/spi/spi-rzv2h-rspi.c

650

conf8 = FIELD_PREP(RSPI_SPPCR_SPLP2, !!(spi->mode & SPI_LOOP));

drivers/spi/spi-rzv2h-rspi.c

654

conf32 = FIELD_PREP(RSPI_SPCMD_CPOL, !!(spi->mode & SPI_CPOL));

drivers/spi/spi-rzv2h-rspi.c

655

conf32 |= FIELD_PREP(RSPI_SPCMD_CPHA, !!(spi->mode & SPI_CPHA));

drivers/spi/spi-rzv2h-rspi.c

656

conf32 |= FIELD_PREP(RSPI_SPCMD_LSBF, !!(spi->mode & SPI_LSB_FIRST));

drivers/spi/spi-rzv2h-rspi.c

657

conf32 |= FIELD_PREP(RSPI_SPCMD_SPB, bits_per_word - 1);

drivers/spi/spi-rzv2h-rspi.c

658

conf32 |= FIELD_PREP(RSPI_SPCMD_BRDV, rspi->brdv);

drivers/spi/spi-rzv2h-rspi.c

659

conf32 |= FIELD_PREP(RSPI_SPCMD_SSLKP, 1);

drivers/spi/spi-rzv2h-rspi.c

660

conf32 |= FIELD_PREP(RSPI_SPCMD_SSLA, spi_get_chipselect(spi, 0));

drivers/spi/spi-rzv2h-rspi.c

668

conf16 = FIELD_PREP(RSPI_SPDCR2_TTRG, 0);

drivers/spi/spi-rzv2h-rspi.c

669

conf16 |= FIELD_PREP(RSPI_SPDCR2_RTRG, 0);

drivers/spi/spi-sh-msiof.c

169

scr = FIELD_PREP(SISCR_BRDV, div_pow - 1) |

drivers/spi/spi-sh-msiof.c

170

FIELD_PREP(SISCR_BRPS, brps - 1);

drivers/spi/spi-sh-msiof.c

212

val = FIELD_PREP(SIMDR1_DTDL, sh_msiof_get_delay_bit(p->info->dtdl)) |

drivers/spi/spi-sh-msiof.c

213

FIELD_PREP(SIMDR1_SYNCDL,

drivers/spi/spi-sh-msiof.c

233

tmp = FIELD_PREP(SIMDR1_SYNCMD, SIMDR1_SYNCMD_SPI) |

drivers/spi/spi-sh-msiof.c

234

FIELD_PREP(SIMDR1_FLD, 1) | SIMDR1_XXSTP |

drivers/spi/spi-sh-msiof.c

235

FIELD_PREP(SIMDR1_SYNCAC, !cs_high) |

drivers/spi/spi-sh-msiof.c

236

FIELD_PREP(SIMDR1_BITLSB, lsb_first);

drivers/spi/spi-sh-msiof.c

243

FIELD_PREP(SITMDR1_SYNCCH,

drivers/spi/spi-sh-msiof.c

253

tmp |= SICTR_TSCKIZ_SCK | FIELD_PREP(SICTR_TSCKIZ_POL, cpol);

drivers/spi/spi-sh-msiof.c

254

tmp |= SICTR_RSCKIZ_SCK | FIELD_PREP(SICTR_RSCKIZ_POL, cpol);

drivers/spi/spi-sh-msiof.c

258

tmp |= FIELD_PREP(SICTR_TEDG, edge);

drivers/spi/spi-sh-msiof.c

259

tmp |= FIELD_PREP(SICTR_REDG, edge);

drivers/spi/spi-sh-msiof.c

260

tmp |= FIELD_PREP(SICTR_TXDIZ,

drivers/spi/spi-sh-msiof.c

269

u32 dr2 = FIELD_PREP(SIMDR2_GRP, words2 ? 1 : 0) |

drivers/spi/spi-sh-msiof.c

270

FIELD_PREP(SIMDR2_BITLEN1, bits - 1) |

drivers/spi/spi-sh-msiof.c

271

FIELD_PREP(SIMDR2_WDLEN1, words1 - 1);

drivers/spi/spi-sh-msiof.c

282

u32 dr3 = FIELD_PREP(SIMDR3_BITLEN2, bits - 1) |

drivers/spi/spi-sh-msiof.c

283

FIELD_PREP(SIMDR3_WDLEN2, words2 - 1);

drivers/spi/spi-sh-msiof.c

466

set = FIELD_PREP(SIMDR1_SYNCMD, SIMDR1_SYNCMD_SPI);

drivers/spi/spi-sh-msiof.c

695

FIELD_PREP(SIFCTR_TFWM, SIFCTR_TFWM_1) |

drivers/spi/spi-sh-msiof.c

696

FIELD_PREP(SIFCTR_RFWM, SIFCTR_RFWM_1));

drivers/spi/spi-sn-f-ospi.c

226

val |= FIELD_PREP(OSPI_CLK_CTL_PHA, OSPI_CLK_CTL_PHA_180)

drivers/spi/spi-sn-f-ospi.c

227

| FIELD_PREP(OSPI_CLK_CTL_DIV, div_reg);

drivers/spi/spi-sn-f-ospi.c

276

prot |= FIELD_PREP(OSPI_PROT_MODE_CODE_MASK, mode);

drivers/spi/spi-sn-f-ospi.c

279

prot |= FIELD_PREP(OSPI_PROT_MODE_ADDR_MASK, mode);

drivers/spi/spi-sn-f-ospi.c

282

prot |= FIELD_PREP(OSPI_PROT_MODE_DATA_MASK, mode);

drivers/spi/spi-sn-f-ospi.c

284

prot |= FIELD_PREP(OSPI_PROT_DATA_RATE_DATA, OSPI_PROT_SDR);

drivers/spi/spi-sn-f-ospi.c

285

prot |= FIELD_PREP(OSPI_PROT_DATA_RATE_ALT, OSPI_PROT_SDR);

drivers/spi/spi-sn-f-ospi.c

286

prot |= FIELD_PREP(OSPI_PROT_DATA_RATE_ADDR, OSPI_PROT_SDR);

drivers/spi/spi-sn-f-ospi.c

287

prot |= FIELD_PREP(OSPI_PROT_DATA_RATE_CODE, OSPI_PROT_SDR);

drivers/spi/spi-sn-f-ospi.c

311

prot |= FIELD_PREP(OSPI_PROT_DATA_UNIT_MASK, unit);

drivers/spi/spi-sn-f-ospi.c

331

prot |= FIELD_PREP(OSPI_PROT_ADDR_SIZE_MASK, op->addr.nbytes);

drivers/spi/spi-sn-f-ospi.c

332

prot |= FIELD_PREP(OSPI_PROT_CODE_SIZE_MASK, 1); /* 1byte */

drivers/spi/spi-stm32-ospi.c

479

cr |= FIELD_PREP(CR_CSSEL, cs);

drivers/spi/spi-stm32-ospi.c

481

cr |= FIELD_PREP(CR_FMODE_MASK, ospi->fmode);

drivers/spi/spi-stm32-ospi.c

489

dcr2 |= FIELD_PREP(DCR2_PRESC_MASK, ospi->flash_presc[cs]);

drivers/spi/spi-stm32-ospi.c

492

ccr = FIELD_PREP(CCR_IMODE_MASK, stm32_ospi_get_mode(op->cmd.buswidth));

drivers/spi/spi-stm32-ospi.c

495

ccr |= FIELD_PREP(CCR_ADMODE_MASK,

drivers/spi/spi-stm32-ospi.c

497

ccr |= FIELD_PREP(CCR_ADSIZE_MASK, op->addr.nbytes - 1);

drivers/spi/spi-stm32-ospi.c

502

tcr |= FIELD_PREP(TCR_DCYC_MASK,

drivers/spi/spi-stm32-ospi.c

508

ccr |= FIELD_PREP(CCR_DMODE_MASK,

drivers/spi/spi-stm32-qspi.c

378

cr |= FIELD_PREP(CR_PRESC_MASK, flash->presc);

drivers/spi/spi-stm32-qspi.c

379

cr |= FIELD_PREP(CR_FSEL, flash->cs);

drivers/spi/spi-stm32-qspi.c

387

ccr |= FIELD_PREP(CCR_INST_MASK, op->cmd.opcode);

drivers/spi/spi-stm32-qspi.c

388

ccr |= FIELD_PREP(CCR_IMODE_MASK,

drivers/spi/spi-stm32-qspi.c

392

ccr |= FIELD_PREP(CCR_ADMODE_MASK,

drivers/spi/spi-stm32-qspi.c

394

ccr |= FIELD_PREP(CCR_ADSIZE_MASK, op->addr.nbytes - 1);

drivers/spi/spi-stm32-qspi.c

398

ccr |= FIELD_PREP(CCR_DCYC_MASK,

drivers/spi/spi-stm32-qspi.c

402

ccr |= FIELD_PREP(CCR_DMODE_MASK,

drivers/spi/spi-stm32.c

1789

cr2_setb |= FIELD_PREP(STM32F7_SPI_CR2_DS, bpw);

drivers/spi/spi-stm32.c

1814

cfg1_setb |= FIELD_PREP(STM32H7_SPI_CFG1_DSIZE, bpw);

drivers/spi/spi-stm32.c

1820

cfg1_setb |= FIELD_PREP(STM32H7_SPI_CFG1_FTHLV, fthlv);

drivers/spi/spi-stm32.c

1929

cfg2_setb |= FIELD_PREP(STM32H7_SPI_CFG2_COMM, mode);

drivers/spi/spi-stm32.c

1976

cfg2_setb |= FIELD_PREP(STM32H7_SPI_CFG2_MIDI, midi);

drivers/spi/spi-stm32.c

1992

writel_relaxed(FIELD_PREP(STM32H7_SPI_CR2_TSIZE, nb_words),

drivers/spi/spi-sun6i.c

453

reg = FIELD_PREP(SUN6I_BURST_CTL_CNT_STC_MASK, tx_len);

drivers/spi/spi-sunplus-sp7021.c

126

value = SP7021_SLAVE_DMA_EN | SP7021_SLAVE_DMA_RW | FIELD_PREP(SP7021_SLAVE_DMA_CMD, 3);

drivers/spi/spi-sunplus-sp7021.c

146

value = SP7021_SLAVE_DMA_EN | FIELD_PREP(SP7021_SLAVE_DMA_CMD, 3);

drivers/spi/spi-sunplus-sp7021.c

276

rs |= FIELD_PREP(SP7021_TX_UNIT, 0) | FIELD_PREP(SP7021_RX_UNIT, 0);

drivers/spi/spi-sunplus-sp7021.c

294

pspim->xfer_conf |= FIELD_PREP(SP7021_CLK_MASK, clk_sel);

drivers/spi/spi-sunplus-sp7021.c

333

FIELD_PREP(SP7021_TX_UNIT, 0) | FIELD_PREP(SP7021_RX_UNIT, 0);

drivers/spi/spi-sunplus-sp7021.c

336

reg_temp = FIELD_PREP(SP7021_SET_TX_LEN, xfer_len) |

drivers/spi/spi-sunplus-sp7021.c

337

FIELD_PREP(SP7021_SET_XFER_LEN, xfer_len) |

drivers/spi/spi-uniphier.c

176

val1 |= FIELD_PREP(SSI_TXWDS_TDTF_MASK, 1);

drivers/spi/spi-uniphier.c

188

val |= FIELD_PREP(SSI_TXWDS_WDLEN_MASK, size);

drivers/spi/spi-uniphier.c

189

val |= FIELD_PREP(SSI_TXWDS_DTLEN_MASK, size);

drivers/spi/spi-uniphier.c

194

val |= FIELD_PREP(SSI_RXWDS_DTLEN_MASK, size);

drivers/spi/spi-uniphier.c

312

val |= FIELD_PREP(SSI_FC_TXFTH_MASK, SSI_FIFO_DEPTH - threshold);

drivers/spi/spi-uniphier.c

313

val |= FIELD_PREP(SSI_FC_RXFTH_MASK, threshold);

drivers/spmi/spmi-pmic-arb.c

125

(FIELD_PREP(HWIRQ_SID_MASK, (slave_id)) | \

drivers/spmi/spmi-pmic-arb.c

126

FIELD_PREP(HWIRQ_PID_MASK, (periph_id)) | \

drivers/spmi/spmi-pmic-arb.c

127

FIELD_PREP(HWIRQ_IRQID_MASK, (irq_id)) | \

drivers/spmi/spmi-pmic-arb.c

128

FIELD_PREP(HWIRQ_APID_MASK, (apid)))

drivers/staging/iio/frequency/ad9832.c

141

st->freq_data[i] = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, freq_cmd) |

drivers/staging/iio/frequency/ad9832.c

142

FIELD_PREP(AD9832_ADD_MSK, addr - i) |

drivers/staging/iio/frequency/ad9832.c

143

FIELD_PREP(AD9832_DAT_MSK, regval_bytes[i]));

drivers/staging/iio/frequency/ad9832.c

163

st->phase_data[i] = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, phase_cmd) |

drivers/staging/iio/frequency/ad9832.c

164

FIELD_PREP(AD9832_ADD_MSK, addr - i) |

drivers/staging/iio/frequency/ad9832.c

165

FIELD_PREP(AD9832_DAT_MSK, phase_bytes[i]));

drivers/staging/iio/frequency/ad9832.c

198

st->ctrl_ss |= FIELD_PREP(AD9832_SELSRC, val ? 0 : 1);

drivers/staging/iio/frequency/ad9832.c

200

st->data = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, AD9832_CMD_SYNCSELSRC) |

drivers/staging/iio/frequency/ad9832.c

207

st->ctrl_fp |= FIELD_PREP(AD9832_FREQ, val ? 1 : 0);

drivers/staging/iio/frequency/ad9832.c

212

st->data = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, AD9832_CMD_FPSELECT) |

drivers/staging/iio/frequency/ad9832.c

223

st->ctrl_fp |= FIELD_PREP(AD9832_PHASE_MASK, val);

drivers/staging/iio/frequency/ad9832.c

225

st->data = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, AD9832_CMD_FPSELECT) |

drivers/staging/iio/frequency/ad9832.c

233

st->ctrl_src |= FIELD_PREP(AD9832_RESET, 1);

drivers/staging/iio/frequency/ad9832.c

235

st->data = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, AD9832_CMD_SLEEPRESCLR) |

drivers/staging/iio/frequency/ad9832.c

361

st->data = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, AD9832_CMD_SLEEPRESCLR) |

drivers/staging/media/ipu7/ipu7-buttress.c

1102

val |= FIELD_PREP(WRXREQOP_OVRD_VAL_MASK, 0xf) |

drivers/staging/media/ipu7/ipu7-buttress.c

512

val = FIELD_PREP(NDE_VAL_MASK, value) |

drivers/staging/media/ipu7/ipu7-buttress.c

513

FIELD_PREP(NDE_SCALE_MASK, scale) |

drivers/staging/media/ipu7/ipu7-buttress.c

514

FIELD_PREP(NDE_VALID_MASK, valid) |

drivers/staging/media/ipu7/ipu7-buttress.c

515

FIELD_PREP(NDE_RESVEC_MASK, resvec);

drivers/staging/media/tegra-video/tegra210.c

1011

FIELD_PREP(CLK_SETTLE_MASK, clk_settle_time) |

drivers/staging/media/tegra-video/tegra210.c

1012

FIELD_PREP(THS_SETTLE_MASK, ths_settle_time));

drivers/staging/media/tegra-video/tegra210.c

990

FIELD_PREP(CLK_SETTLE_MASK, clk_settle_time) |

drivers/staging/media/tegra-video/tegra210.c

991

FIELD_PREP(THS_SETTLE_MASK, ths_settle_time));

drivers/tee/tstee/tstee_private.h

38

(FIELD_PREP(IFACE_ID_MASK, (i)) | FIELD_PREP(OPCODE_MASK, (o)))

drivers/thermal/airoha_thermal.c

224

adc_mux = FIELD_PREP(EN7581_MUX_TADC, EN7581_SCU_THERMAL_MUX_DIODE1);

drivers/thermal/airoha_thermal.c

362

writel(FIELD_PREP(EN7581_MSRCTL0, EN7581_MSRCTL_6SAMPLE_MAX_MIX_AVG4),

drivers/thermal/airoha_thermal.c

385

writel(FIELD_PREP(EN7581_ADV_RD_VALID_POS, 16),

drivers/thermal/airoha_thermal.c

394

writel(FIELD_PREP(EN7581_ADC_VOLTAGE_SHIFT, 4),

drivers/thermal/airoha_thermal.c

398

writel(FIELD_PREP(EN7581_PERIOD_UNIT, 3),

drivers/thermal/airoha_thermal.c

405

writel(FIELD_PREP(EN7581_FILT_INTERVAL, 1) |

drivers/thermal/airoha_thermal.c

406

FIELD_PREP(EN7581_FILT_INTERVAL, 379),

drivers/thermal/airoha_thermal.c

410

writel(FIELD_PREP(EN7581_ADC_POLL_INTVL, 146),

drivers/thermal/imx8mm_thermal.c

184

writel(FIELD_PREP(TASR_BUF_VREF_MASK,

drivers/thermal/imx8mm_thermal.c

186

FIELD_PREP(TASR_BUF_SLOPE_MASK,

drivers/thermal/imx8mm_thermal.c

190

writel(FIELD_PREP(TCALIV_RT_MASK, FIELD_GET(ANA0_RT_MASK, ana0)) |

drivers/thermal/imx8mm_thermal.c

191

FIELD_PREP(TCALIV_HR_MASK, FIELD_GET(ANA0_HR_MASK, ana0)) |

drivers/thermal/imx8mm_thermal.c

229

writel(FIELD_PREP(TCALIV_SNSR25C_MASK, 0x63c),

drivers/thermal/imx8mm_thermal.c

231

writel(FIELD_PREP(TCALIV_SNSR25C_MASK, 0x63c),

drivers/thermal/imx8mm_thermal.c

236

writel(FIELD_PREP(TASR_BUF_VERF_SEL_MASK,

drivers/thermal/imx8mm_thermal.c

238

FIELD_PREP(TASR_BUF_SLOPE_MASK,

drivers/thermal/imx8mm_thermal.c

242

writel(FIELD_PREP(TRIM_BJT_CUR_MASK,

drivers/thermal/imx8mm_thermal.c

244

FIELD_PREP(TRIM_BGR_MASK, FIELD_GET(TRIM2_BGR_MASK, trim[0])) |

drivers/thermal/imx8mm_thermal.c

245

FIELD_PREP(TRIM_VLSB_MASK, FIELD_GET(TRIM2_VLSB_MASK, trim[0])) |

drivers/thermal/imx8mm_thermal.c

249

writel(FIELD_PREP(TCALIV_SNSR25C_MASK,

drivers/thermal/imx8mm_thermal.c

252

FIELD_PREP(TCALIV_SNSR105C_MASK,

drivers/thermal/imx8mm_thermal.c

256

writel(FIELD_PREP(TCALIV_SNSR25C_MASK,

drivers/thermal/imx8mm_thermal.c

258

FIELD_PREP(TCALIV_SNSR105C_MASK,

drivers/thermal/imx8mm_thermal.c

262

writel(FIELD_PREP(TCALIV_SNSR25C_MASK,

drivers/thermal/imx8mm_thermal.c

264

FIELD_PREP(TCALIV_SNSR105C_MASK,

drivers/thermal/imx91_thermal.c

131

val = FIELD_PREP(IMX91_TMU_THR_CTRL01_THR1_MASK, imx91_tmu_from_mcelsius(high));

drivers/thermal/imx91_thermal.c

214

writel_relaxed(FIELD_PREP(IMX91_TMU_CTRL0_THR1_MASK, IMX91_TMU_THR_MODE_GE),

drivers/thermal/imx91_thermal.c

275

writel_relaxed(IMX91_TMU_DIV_EN | FIELD_PREP(IMX91_TMU_DIV_MASK, div),

drivers/thermal/imx91_thermal.c

279

writel_relaxed(FIELD_PREP(IMX91_TMU_PUDL_MASK, 100U), tmu->base + IMX91_TMU_PUD_ST_CTRL);

drivers/thermal/imx91_thermal.c

288

writel_relaxed(FIELD_PREP(IMX91_TMU_CTRL1_RES_MASK, 0x3),

drivers/thermal/imx91_thermal.c

290

writel_relaxed(FIELD_PREP(IMX91_TMU_CTRL1_RES_MASK, 0x1),

drivers/thermal/imx91_thermal.c

294

writel_relaxed(FIELD_PREP(IMX91_TMU_CTRL1_MEAS_MODE_MASK,

drivers/thermal/imx91_thermal.c

302

writel_relaxed(FIELD_PREP(IMX91_TMU_PERIOD_CTRL_MEAS_MASK, 4 * HZ_PER_MHZ / 25),

drivers/thermal/intel/int340x_thermal/processor_thermal_soc_slider.c

184

val |= FIELD_PREP(SLIDER_MASK, slider) | BIT(SLIDER_ENABLE_BIT);

drivers/thermal/intel/int340x_thermal/processor_thermal_soc_slider.c

193

val |= FIELD_PREP(SLIDER_OFFSET_MASK, offset);

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

463

val |= FIELD_PREP(ADC_TM_GEN2_TM_CH_SEL, channel->channel);

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

551

buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK, channel->hw_settle_time);

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

553

buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_CAL_SEL_MASK, channel->cal_method);

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

588

buf[1] |= FIELD_PREP(ADC_TM_GEN2_TM_CH_SEL, channel->channel);

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

590

buf[1] |= FIELD_PREP(ADC_TM_GEN2_MEAS_INT_SEL, MEAS_INT_1S);

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

593

buf[2] |= FIELD_PREP(ADC_TM_GEN2_CTL_DEC_RATIO_MASK, channel->decimation);

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

595

buf[2] |= FIELD_PREP(ADC_TM_GEN2_CTL_CAL_SEL, channel->cal_method);

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

743

buf[3] = FIELD_PREP(ADC_TM5_MEAS_INTERVAL_CTL2_MASK, ADC_TM5_TIMER2) |

drivers/thermal/qcom/qcom-spmi-adc-tm5.c

744

FIELD_PREP(ADC_TM5_MEAS_INTERVAL_CTL3_MASK, ADC_TM5_TIMER3);

drivers/thermal/qcom/qcom-spmi-temp-alarm.c

486

reg |= FIELD_PREP(LITE_TEMP_CFG_THRESHOLD_MASK, thresh);

drivers/thermal/qcom/tsens-v2.c

178

val = FIELD_PREP(CONVERSION_SHIFT_MASK, shift) |

drivers/thermal/qcom/tsens-v2.c

179

FIELD_PREP(CONVERSION_SLOPE_MASK, slope) |

drivers/thermal/qcom/tsens-v2.c

180

FIELD_PREP(CONVERSION_CZERO_MASK, czero);

drivers/thermal/tegra/tegra30-tsensor.c

124

val = FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_M, 12500);

drivers/thermal/tegra/tegra30-tsensor.c

125

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_N, 255);

drivers/thermal/tegra/tegra30-tsensor.c

236

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG1_TH1, high);

drivers/thermal/tegra/tegra30-tsensor.c

300

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_SENSOR_STOP, 1);

drivers/thermal/tegra/tegra30-tsensor.c

376

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG1_TH2, temps.hot_trip);

drivers/thermal/tegra/tegra30-tsensor.c

382

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG2_TH3, temps.crit_trip);

drivers/thermal/tegra/tegra30-tsensor.c

401

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_DVFS_EN, 1);

drivers/thermal/tegra/tegra30-tsensor.c

402

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_HW_FREQ_DIV_EN, 0);

drivers/thermal/tegra/tegra30-tsensor.c

403

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_THERMAL_RST_EN, 1);

drivers/thermal/tegra/tegra30-tsensor.c

404

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_INTR_OVERFLOW_EN, 1);

drivers/thermal/tegra/tegra30-tsensor.c

405

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_INTR_HW_FREQ_DIV_EN, 1);

drivers/thermal/tegra/tegra30-tsensor.c

406

val |= FIELD_PREP(TSENSOR_SENSOR0_CONFIG0_INTR_THERMAL_RST_EN, 1);

drivers/thunderbolt/tmu.c

113

val |= FIELD_PREP(TMU_RTR_CS_18_DELTA_AVG_CONST_MASK, delta_avg);

drivers/thunderbolt/tmu.c

272

val |= FIELD_PREP(TMU_ADP_CS_8_REPL_TIMEOUT_MASK, repl_timeout);

drivers/thunderbolt/tmu.c

273

val |= FIELD_PREP(TMU_ADP_CS_8_REPL_THRESHOLD_MASK, repl_threshold);

drivers/thunderbolt/tmu.c

287

val |= FIELD_PREP(TMU_ADP_CS_9_REPL_N_MASK, repl_n);

drivers/thunderbolt/tmu.c

288

val |= FIELD_PREP(TMU_ADP_CS_9_DIRSWITCH_N_MASK, dirswitch_n);

drivers/thunderbolt/tmu.c

309

val |= FIELD_PREP(TMU_ADP_CS_9_ADP_TS_INTERVAL_MASK, rate);

drivers/thunderbolt/tmu.c

78

val |= FIELD_PREP(TMU_RTR_CS_0_FREQ_WIND_MASK, freq);

drivers/thunderbolt/tmu.c

94

val |= FIELD_PREP(TMU_RTR_CS_15_FREQ_AVG_MASK, avg) |

drivers/thunderbolt/tmu.c

95

FIELD_PREP(TMU_RTR_CS_15_DELAY_AVG_MASK, avg) |

drivers/thunderbolt/tmu.c

96

FIELD_PREP(TMU_RTR_CS_15_OFFSET_AVG_MASK, avg) |

drivers/thunderbolt/tmu.c

97

FIELD_PREP(TMU_RTR_CS_15_ERROR_AVG_MASK, avg);

drivers/thunderbolt/usb4.c

1629

val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK,

drivers/thunderbolt/usb4.c

1633

val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK,

drivers/thunderbolt/usb4.c

1637

val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK,

drivers/thunderbolt/usb4.c

1672

val |= FIELD_PREP(PORT_CS_19_START_ASYM, 1);

drivers/thunderbolt/usb4.c

1750

val |= FIELD_PREP(USB4_MARGIN_HW_BER_MASK, params->ber_level);

drivers/thunderbolt/usb4.c

1800

val |= FIELD_PREP(USB4_MARGIN_SW_COUNTER_MASK, params->error_counter);

drivers/thunderbolt/usb4.c

1801

val |= FIELD_PREP(USB4_MARGIN_SW_VT_MASK, params->voltage_time_offset);

drivers/tty/n_gsm.c

623

params->d_bits = FIELD_PREP(PN_D_FIELD_DLCI, dlci->addr);

drivers/tty/n_gsm.c

625

params->i_cl_bits = FIELD_PREP(PN_I_CL_FIELD_FTYPE, i) |

drivers/tty/n_gsm.c

626

FIELD_PREP(PN_I_CL_FIELD_ADAPTION, cl);

drivers/tty/n_gsm.c

627

params->p_bits = FIELD_PREP(PN_P_FIELD_PRIO, dlci->prio);

drivers/tty/n_gsm.c

628

params->t_bits = FIELD_PREP(PN_T_FIELD_T1, gsm->t1);

drivers/tty/n_gsm.c

629

params->n_bits = cpu_to_le16(FIELD_PREP(PN_N_FIELD_N1, dlci->mtu));

drivers/tty/n_gsm.c

630

params->na_bits = FIELD_PREP(PN_NA_FIELD_N2, gsm->n2);

drivers/tty/n_gsm.c

631

params->k_bits = FIELD_PREP(PN_K_FIELD_K, dlci->k);

drivers/tty/serial/8250/8250_dwlib.c

38

#define DW_UART_TCR_XFER_MODE_DE_DURING_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 0)

drivers/tty/serial/8250/8250_dwlib.c

39

#define DW_UART_TCR_XFER_MODE_SW_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 1)

drivers/tty/serial/8250/8250_dwlib.c

40

#define DW_UART_TCR_XFER_MODE_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 2)

drivers/tty/serial/8250/8250_ni.c

40

#define NI16550_PMR_NOT_IMPL FIELD_PREP(NI16550_PMR_CAP_MASK, 0) /* not implemented */

drivers/tty/serial/8250/8250_ni.c

41

#define NI16550_PMR_CAP_RS232 FIELD_PREP(NI16550_PMR_CAP_MASK, 1) /* RS-232 capable */

drivers/tty/serial/8250/8250_ni.c

42

#define NI16550_PMR_CAP_RS485 FIELD_PREP(NI16550_PMR_CAP_MASK, 2) /* RS-485 capable */

drivers/tty/serial/8250/8250_ni.c

43

#define NI16550_PMR_CAP_DUAL FIELD_PREP(NI16550_PMR_CAP_MASK, 3) /* dual-port */

drivers/tty/serial/8250/8250_ni.c

46

#define NI16550_PMR_MODE_RS232 FIELD_PREP(NI16550_PMR_MODE_MASK, 0) /* currently 232 */

drivers/tty/serial/8250/8250_ni.c

47

#define NI16550_PMR_MODE_RS485 FIELD_PREP(NI16550_PMR_MODE_MASK, 1) /* currently 485 */

drivers/tty/serial/8250/8250_ni.c

60

#define NI16550_PCR_RS422 FIELD_PREP(NI16550_PCR_WIRE_MODE_MASK, 0)

drivers/tty/serial/8250/8250_ni.c

61

#define NI16550_PCR_ECHO_RS485 FIELD_PREP(NI16550_PCR_WIRE_MODE_MASK, 1)

drivers/tty/serial/8250/8250_ni.c

62

#define NI16550_PCR_DTR_RS485 FIELD_PREP(NI16550_PCR_WIRE_MODE_MASK, 2)

drivers/tty/serial/8250/8250_ni.c

63

#define NI16550_PCR_AUTO_RS485 FIELD_PREP(NI16550_PCR_WIRE_MODE_MASK, 3)

drivers/tty/serial/8250/8250_pci.c

2073

val |= FIELD_PREP(MOXA_ODD_RS_MASK, mode);

drivers/tty/serial/8250/8250_pci.c

2076

val |= FIELD_PREP(MOXA_EVEN_RS_MASK, mode);

drivers/tty/serial/8250/8250_pci1xxxx.c

266

writel(FIELD_PREP(BAUD_CLOCK_DIV_INT_MSK, quot) | frac,

drivers/tty/serial/8250/8250_pci1xxxx.c

350

mode_cfg |= FIELD_PREP(ADCL_CFG_RTS_DELAY_MASK,

drivers/tty/serial/atmel_serial.h

139

#define ATMEL_US_TXRDYM(data) FIELD_PREP(GENMASK(1, 0), (data)) /* TX Ready Mode */

drivers/tty/serial/atmel_serial.h

140

#define ATMEL_US_RXRDYM(data) FIELD_PREP(GENMASK(5, 4), (data)) /* RX Ready Mode */

drivers/tty/serial/atmel_serial.h

145

#define ATMEL_US_TXFTHRES(thr) FIELD_PREP(GENMASK(13, 8), (thr)) /* TX FIFO Threshold */

drivers/tty/serial/atmel_serial.h

146

#define ATMEL_US_RXFTHRES(thr) FIELD_PREP(GENMASK(21, 16), (thr)) /* RX FIFO Threshold */

drivers/tty/serial/atmel_serial.h

147

#define ATMEL_US_RXFTHRES2(thr) FIELD_PREP(GENMASK(29, 24), (thr)) /* RX FIFO Threshold2 */

drivers/tty/serial/atmel_serial.h

44

#define ATMEL_US_USMODE_NORMAL FIELD_PREP(ATMEL_US_USMODE, 0)

drivers/tty/serial/atmel_serial.h

45

#define ATMEL_US_USMODE_RS485 FIELD_PREP(ATMEL_US_USMODE, 1)

drivers/tty/serial/atmel_serial.h

46

#define ATMEL_US_USMODE_HWHS FIELD_PREP(ATMEL_US_USMODE, 2)

drivers/tty/serial/atmel_serial.h

47

#define ATMEL_US_USMODE_MODEM FIELD_PREP(ATMEL_US_USMODE, 3)

drivers/tty/serial/atmel_serial.h

48

#define ATMEL_US_USMODE_ISO7816_T0 FIELD_PREP(ATMEL_US_USMODE, 4)

drivers/tty/serial/atmel_serial.h

49

#define ATMEL_US_USMODE_ISO7816_T1 FIELD_PREP(ATMEL_US_USMODE, 6)

drivers/tty/serial/atmel_serial.h

50

#define ATMEL_US_USMODE_IRDA FIELD_PREP(ATMEL_US_USMODE, 8)

drivers/tty/serial/atmel_serial.h

52

#define ATMEL_US_USCLKS_MCK FIELD_PREP(ATMEL_US_USCLKS, 0)

drivers/tty/serial/atmel_serial.h

53

#define ATMEL_US_USCLKS_MCK_DIV8 FIELD_PREP(ATMEL_US_USCLKS, 1)

drivers/tty/serial/atmel_serial.h

54

#define ATMEL_US_USCLKS_GCLK FIELD_PREP(ATMEL_US_USCLKS, 2)

drivers/tty/serial/atmel_serial.h

55

#define ATMEL_US_USCLKS_SCK FIELD_PREP(ATMEL_US_USCLKS, 3)

drivers/tty/serial/atmel_serial.h

58

#define ATMEL_US_CHRL_5 FIELD_PREP(ATMEL_US_CHRL, 0)

drivers/tty/serial/atmel_serial.h

59

#define ATMEL_US_CHRL_6 FIELD_PREP(ATMEL_US_CHRL, 1)

drivers/tty/serial/atmel_serial.h

60

#define ATMEL_US_CHRL_7 FIELD_PREP(ATMEL_US_CHRL, 2)

drivers/tty/serial/atmel_serial.h

61

#define ATMEL_US_CHRL_8 FIELD_PREP(ATMEL_US_CHRL, 3)

drivers/tty/serial/atmel_serial.h

64

#define ATMEL_US_PAR_EVEN FIELD_PREP(ATMEL_US_PAR, 0)

drivers/tty/serial/atmel_serial.h

65

#define ATMEL_US_PAR_ODD FIELD_PREP(ATMEL_US_PAR, 1)

drivers/tty/serial/atmel_serial.h

66

#define ATMEL_US_PAR_SPACE FIELD_PREP(ATMEL_US_PAR, 2)

drivers/tty/serial/atmel_serial.h

67

#define ATMEL_US_PAR_MARK FIELD_PREP(ATMEL_US_PAR, 3)

drivers/tty/serial/atmel_serial.h

68

#define ATMEL_US_PAR_NONE FIELD_PREP(ATMEL_US_PAR, 4)

drivers/tty/serial/atmel_serial.h

69

#define ATMEL_US_PAR_MULTI_DROP FIELD_PREP(ATMEL_US_PAR, 6)

drivers/tty/serial/atmel_serial.h

71

#define ATMEL_US_NBSTOP_1 FIELD_PREP(ATMEL_US_NBSTOP, 0)

drivers/tty/serial/atmel_serial.h

72

#define ATMEL_US_NBSTOP_1_5 FIELD_PREP(ATMEL_US_NBSTOP, 1)

drivers/tty/serial/atmel_serial.h

73

#define ATMEL_US_NBSTOP_2 FIELD_PREP(ATMEL_US_NBSTOP, 2)

drivers/tty/serial/atmel_serial.h

76

#define ATMEL_US_CHMODE_NORMAL FIELD_PREP(ATMEL_US_CHMODE, 0)

drivers/tty/serial/atmel_serial.h

77

#define ATMEL_US_CHMODE_ECHO FIELD_PREP(ATMEL_US_CHMODE, 1)

drivers/tty/serial/atmel_serial.h

78

#define ATMEL_US_CHMODE_LOC_LOOP FIELD_PREP(ATMEL_US_CHMODE, 2)

drivers/tty/serial/atmel_serial.h

79

#define ATMEL_US_CHMODE_REM_LOOP FIELD_PREP(ATMEL_US_CHMODE, 3)

drivers/tty/serial/atmel_serial.h

87

#define ATMEL_US_MAX_ITER(n) FIELD_PREP(ATMEL_US_MAX_ITER_MASK, (n))

drivers/tty/serial/esp32_uart.c

375

FIELD_PREP(ESP32S3_UART_SCLK_DIV_NUM, sclk_div) |

drivers/tty/serial/esp32_uart.c

383

div | FIELD_PREP(UART_CLKDIV_FRAG, frag));

drivers/tty/serial/esp32_uart.c

425

conf0 |= FIELD_PREP(UART_BIT_NUM, UART_BIT_NUM_5);

drivers/tty/serial/esp32_uart.c

428

conf0 |= FIELD_PREP(UART_BIT_NUM, UART_BIT_NUM_6);

drivers/tty/serial/esp32_uart.c

431

conf0 |= FIELD_PREP(UART_BIT_NUM, UART_BIT_NUM_7);

drivers/tty/serial/esp32_uart.c

434

conf0 |= FIELD_PREP(UART_BIT_NUM, UART_BIT_NUM_8);

drivers/tty/serial/esp32_uart.c

439

conf0 |= FIELD_PREP(UART_STOP_BIT_NUM, UART_STOP_BIT_NUM_2);

drivers/tty/serial/esp32_uart.c

441

conf0 |= FIELD_PREP(UART_STOP_BIT_NUM, UART_STOP_BIT_NUM_1);

drivers/tty/serial/esp32_uart.c

90

FIELD_PREP(ESP32S3_UART_SCLK_SEL, XTAL_CLK))

drivers/tty/serial/fsl_lpuart.c

1676

val |= FIELD_PREP(UARTFIFO_RXIDEN, 0x3);

drivers/tty/serial/fsl_lpuart.c

1689

val |= FIELD_PREP(UARTMODIR_RTSWATER, sport->rxfifo_size >> 1);

drivers/tty/serial/fsl_lpuart.c

1705

ctrl |= FIELD_PREP(UARTCTRL_IDLECFG, 0x7);

drivers/tty/serial/ma35d1_serial.c

112

#define MA35_BAUD_MODE0 FIELD_PREP(MA35_BAUD_MODE_MASK, 0)

drivers/tty/serial/ma35d1_serial.c

113

#define MA35_BAUD_MODE1 FIELD_PREP(MA35_BAUD_MODE_MASK, 2)

drivers/tty/serial/ma35d1_serial.c

114

#define MA35_BAUD_MODE2 FIELD_PREP(MA35_BAUD_MODE_MASK, 3)

drivers/tty/serial/ma35d1_serial.c

122

#define MA35_FUN_SEL_UART FIELD_PREP(MA35_FUN_SEL_MASK, 0)

drivers/tty/serial/ma35d1_serial.c

123

#define MA35_FUN_SEL_RS485 FIELD_PREP(MA35_FUN_SEL_MASK, 3)

drivers/tty/serial/ma35d1_serial.c

474

serial_out(up, MA35_BAUD_REG, MA35_BAUD_MODE2 | FIELD_PREP(MA35_BAUD_MASK, quot));

drivers/tty/serial/ma35d1_serial.c

50

#define MA35_FCR_RFITL_1BYTE FIELD_PREP(MA35_FCR_RFITL_MASK, 0)

drivers/tty/serial/ma35d1_serial.c

51

#define MA35_FCR_RFITL_4BYTES FIELD_PREP(MA35_FCR_RFITL_MASK, 1)

drivers/tty/serial/ma35d1_serial.c

52

#define MA35_FCR_RFITL_8BYTES FIELD_PREP(MA35_FCR_RFITL_MASK, 2)

drivers/tty/serial/ma35d1_serial.c

53

#define MA35_FCR_RFITL_14BYTES FIELD_PREP(MA35_FCR_RFITL_MASK, 3)

drivers/tty/serial/ma35d1_serial.c

54

#define MA35_FCR_RFITL_30BYTES FIELD_PREP(MA35_FCR_RFITL_MASK, 4)

drivers/tty/serial/ma35d1_serial.c

56

#define MA35_FCR_RTSTL_1BYTE FIELD_PREP(MA35_FCR_RTSTL_MASK, 0)

drivers/tty/serial/ma35d1_serial.c

57

#define MA35_FCR_RTSTL_4BYTES FIELD_PREP(MA35_FCR_RTSTL_MASK, 1)

drivers/tty/serial/ma35d1_serial.c

58

#define MA35_FCR_RTSTL_8BYTES FIELD_PREP(MA35_FCR_RTSTL_MASK, 2)

drivers/tty/serial/ma35d1_serial.c

59

#define MA35_FCR_RTSTL_14BYTES FIELD_PREP(MA35_FCR_RTSTL_MASK, 3)

drivers/tty/serial/ma35d1_serial.c

60

#define MA35_FCR_RTSTLL_30BYTES FIELD_PREP(MA35_FCR_RTSTL_MASK, 4)

drivers/tty/serial/ma35d1_serial.c

69

#define MA35_LCR_WLS_5BITS FIELD_PREP(MA35_LCR_WLS_MASK, 0)

drivers/tty/serial/ma35d1_serial.c

70

#define MA35_LCR_WLS_6BITS FIELD_PREP(MA35_LCR_WLS_MASK, 1)

drivers/tty/serial/ma35d1_serial.c

71

#define MA35_LCR_WLS_7BITS FIELD_PREP(MA35_LCR_WLS_MASK, 2)

drivers/tty/serial/ma35d1_serial.c

72

#define MA35_LCR_WLS_8BITS FIELD_PREP(MA35_LCR_WLS_MASK, 3)

drivers/tty/vt/consolemap.c

203

#define UNI(dir, row, glyph) (FIELD_PREP(UNI_DIR_BITS, (dir)) | \

drivers/tty/vt/consolemap.c

204

FIELD_PREP(UNI_ROW_BITS, (row)) | \

drivers/tty/vt/consolemap.c

205

FIELD_PREP(UNI_GLYPH_BITS, (glyph)))

drivers/ufs/core/ufs-mcq.c

101

val |= FIELD_PREP(MCQ_CFG_MAC_MASK, max_active_cmds - 1);

drivers/ufs/core/ufs-sysfs.c

245

return FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, timer) |

drivers/ufs/core/ufs-sysfs.c

246

FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, scale);

drivers/ufs/core/ufshcd.c

11011

hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |

drivers/ufs/core/ufshcd.c

11012

FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);

drivers/ufs/host/ufs-qcom.c

1643

core_clk_ctrl_reg |= FIELD_PREP(CLK_1US_CYCLES_MASK_V4, cycles_in_1us);

drivers/ufs/host/ufs-qcom.c

1648

core_clk_ctrl_reg |= FIELD_PREP(CLK_1US_CYCLES_MASK, cycles_in_1us);

drivers/ufs/host/ufs-qcom.c

2249

ufshcd_rmwl(hba, ESI_VEC_MASK, FIELD_PREP(ESI_VEC_MASK, MAX_ESI_VEC - 1),

drivers/usb/dwc3/core.c

429

reg |= FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, period);

drivers/usb/dwc3/core.c

462

reg |= FIELD_PREP(DWC3_GFLADJ_REFCLK_FLADJ_MASK, fladj)

drivers/usb/dwc3/core.c

463

| FIELD_PREP(DWC3_GFLADJ_240MHZDECR, decr >> 1)

drivers/usb/dwc3/core.c

464

| FIELD_PREP(DWC3_GFLADJ_240MHZDECR_PLS1, decr & 1);

drivers/usb/dwc3/dwc3-apple.c

156

FIELD_PREP(APPLE_DWC3_CIO_PENDING_HP_TIMER,

drivers/usb/dwc3/dwc3-apple.c

159

FIELD_PREP(APPLE_DWC3_CIO_PM_LC_TIMER, APPLE_DWC3_CIO_PM_LC_TIMER_VALUE));

drivers/usb/dwc3/dwc3-apple.c

161

FIELD_PREP(APPLE_DWC3_CIO_PM_ENTRY_TIMER,

drivers/usb/dwc3/dwc3-google.c

108

reg |= (FIELD_PREP(HOST_CFG1_PM_POWER_STATE_REQUEST, state) |

drivers/usb/dwc3/dwc3-meson-g12a.c

349

FIELD_PREP(USB_R3_P30_SSC_RANGE_MASK, 2) |

drivers/usb/dwc3/dwc3-meson-g12a.c

355

FIELD_PREP(USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK, 0x15));

drivers/usb/dwc3/dwc3-meson-g12a.c

359

FIELD_PREP(USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK, 0x20));

drivers/usb/dwc3/dwc3-meson-g12a.c

369

FIELD_PREP(USB_R1_P30_PCS_TX_SWING_FULL_MASK, 127));

drivers/usb/dwc3/dwc3-meson-g12a.c

381

FIELD_PREP(USB_R1_U3H_HOST_U2_PORT_DISABLE_MASK,

drivers/usb/dwc3/dwc3-meson-g12a.c

415

FIELD_PREP(USB_R1_U3H_FLADJ_30MHZ_REG_MASK, 0x20));

drivers/usb/dwc3/dwc3-meson-g12a.c

425

FIELD_PREP(USB_R5_ID_DIG_TH_MASK, 0xff));

drivers/usb/dwc3/dwc3-octeon.c

300

val |= FIELD_PREP(USBDRD_UCTL_CTL_H_CLKDIV_SEL, div);

drivers/usb/dwc3/dwc3-octeon.c

318

val |= FIELD_PREP(USBDRD_UCTL_CTL_REF_CLK_SEL, ref_clk_sel);

drivers/usb/dwc3/dwc3-octeon.c

321

val |= FIELD_PREP(USBDRD_UCTL_CTL_REF_CLK_FSEL, ref_clk_fsel);

drivers/usb/dwc3/dwc3-octeon.c

324

val |= FIELD_PREP(USBDRD_UCTL_CTL_MPLL_MULTIPLIER, mpll_mul);

drivers/usb/dwc3/dwc3-octeon.c

397

val |= FIELD_PREP(USBDRD_UCTL_SHIM_CFG_DMA_ENDIAN_MODE, 1);

drivers/usb/dwc3/dwc3-octeon.c

398

val |= FIELD_PREP(USBDRD_UCTL_SHIM_CFG_CSR_ENDIAN_MODE, 1);

drivers/usb/gadget/composite.c

826

cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_ATTRIBS, ssac) |

drivers/usb/gadget/composite.c

827

FIELD_PREP(USB_SSP_SUBLINK_SPEED_IDS, ssic));

drivers/usb/gadget/composite.c

830

cpu_to_le16(FIELD_PREP(USB_SSP_MIN_SUBLINK_SPEED_ATTRIBUTE_ID, 0) |

drivers/usb/gadget/composite.c

831

FIELD_PREP(USB_SSP_MIN_RX_LANE_COUNT, 1) |

drivers/usb/gadget/composite.c

832

FIELD_PREP(USB_SSP_MIN_TX_LANE_COUNT, 1));

drivers/usb/gadget/composite.c

865

cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, ssid) |

drivers/usb/gadget/composite.c

866

FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE,

drivers/usb/gadget/composite.c

868

FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST, type) |

drivers/usb/gadget/composite.c

869

FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP,

drivers/usb/gadget/composite.c

871

FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, mantissa));

drivers/usb/gadget/udc/max3420_udc.c

145

#define MAX3420_CMD(c) FIELD_PREP(GENMASK(7, 3), c)

drivers/usb/host/xhci-hub.c

136

cpu_to_le32(FIELD_PREP(USB_SSP_SUBLINK_SPEED_ATTRIBS, ssac) |

drivers/usb/host/xhci-hub.c

137

FIELD_PREP(USB_SSP_SUBLINK_SPEED_IDS, ssic));

drivers/usb/host/xhci-hub.c

218

attr = (FIELD_PREP(USB_SSP_SUBLINK_SPEED_SSID, ssid) |

drivers/usb/host/xhci-hub.c

219

FIELD_PREP(USB_SSP_SUBLINK_SPEED_LP, lp) |

drivers/usb/host/xhci-hub.c

220

FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSE, lse) |

drivers/usb/host/xhci-hub.c

221

FIELD_PREP(USB_SSP_SUBLINK_SPEED_LSM, lane_mantissa));

drivers/usb/host/xhci-hub.c

225

attr |= FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST,

drivers/usb/host/xhci-hub.c

230

attr |= FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST,

drivers/usb/host/xhci-hub.c

235

attr |= FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST,

drivers/usb/host/xhci-hub.c

240

attr |= FIELD_PREP(USB_SSP_SUBLINK_SPEED_ST,

drivers/usb/host/xhci-hub.c

248

cpu_to_le16(FIELD_PREP(USB_SSP_MIN_SUBLINK_SPEED_ATTRIBUTE_ID,

drivers/usb/host/xhci-hub.c

250

FIELD_PREP(USB_SSP_MIN_RX_LANE_COUNT, 1) |

drivers/usb/host/xhci-hub.c

251

FIELD_PREP(USB_SSP_MIN_TX_LANE_COUNT, 1));

drivers/usb/host/xhci-mtk.c

189

value |= FIELD_PREP(SCH3_RXFIFO_DEPTH_MASK,

drivers/usb/typec/anx7411.c

890

cc1 = FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RD);

drivers/usb/typec/anx7411.c

891

cc2 = FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RD);

drivers/usb/typec/mux/nb7vpq904m.c

100

OUTPUT_COMPRESSION_MASK, FIELD_PREP(OUTPUT_COMPRESSION_MASK, out_comp));

drivers/usb/typec/mux/nb7vpq904m.c

102

FLAT_GAIN_MASK, FIELD_PREP(FLAT_GAIN_MASK, flat_gain));

drivers/usb/typec/mux/nb7vpq904m.c

104

LOSS_MATCH_MASK, FIELD_PREP(LOSS_MATCH_MASK, loss_match));

drivers/usb/typec/mux/nb7vpq904m.c

119

FIELD_PREP(GEN_DEV_SET_OP_MODE_MASK,

drivers/usb/typec/mux/nb7vpq904m.c

149

FIELD_PREP(GEN_DEV_SET_OP_MODE_MASK,

drivers/usb/typec/mux/nb7vpq904m.c

158

FIELD_PREP(GEN_DEV_SET_OP_MODE_MASK,

drivers/usb/typec/mux/nb7vpq904m.c

199

FIELD_PREP(GEN_DEV_SET_OP_MODE_MASK,

drivers/usb/typec/mux/nb7vpq904m.c

215

FIELD_PREP(GEN_DEV_SET_OP_MODE_MASK,

drivers/usb/typec/mux/nb7vpq904m.c

98

EQ_SETTING_MASK, FIELD_PREP(EQ_SETTING_MASK, eq));

drivers/usb/typec/mux/ptn36502.c

109

ctrl1_val = FIELD_PREP(PTN36502_MODE_CTRL1_MODE_MASK,

drivers/usb/typec/mux/ptn36502.c

112

ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_PLUG_ORIENT_MASK,

drivers/usb/typec/mux/ptn36502.c

144

ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_MODE_MASK,

drivers/usb/typec/mux/ptn36502.c

146

link_ctrl_val |= FIELD_PREP(PTN36502_DP_LINK_CTRL_LANES_MASK,

drivers/usb/typec/mux/ptn36502.c

166

ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_MODE_MASK,

drivers/usb/typec/mux/ptn36502.c

168

link_ctrl_val |= FIELD_PREP(PTN36502_DP_LINK_CTRL_LANES_MASK,

drivers/usb/typec/mux/ptn36502.c

178

FIELD_PREP(PTN36502_DEVICE_CTRL_AUX_MONITORING_MASK,

drivers/usb/typec/mux/ptn36502.c

182

ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_AUX_CROSSBAR_MASK,

drivers/usb/typec/mux/ptn36502.c

185

ctrl1_val |= FIELD_PREP(PTN36502_MODE_CTRL1_PLUG_ORIENT_MASK,

drivers/usb/typec/mux/ptn36502.c

190

link_ctrl_val |= FIELD_PREP(PTN36502_DP_LINK_CTRL_LINK_RATE_MASK,

drivers/usb/typec/mux/ptn36502.c

200

lane_ctrl_val = FIELD_PREP(PTN36502_DP_LANE_CTRL_RX_GAIN_MASK,

drivers/usb/typec/mux/ptn36502.c

202

FIELD_PREP(PTN36502_DP_LANE_CTRL_TX_SWING_MASK,

drivers/usb/typec/mux/ptn36502.c

204

FIELD_PREP(PTN36502_DP_LANE_CTRL_PRE_EMPHASIS_MASK,

drivers/usb/typec/mux/ptn36502.c

90

FIELD_PREP(PTN36502_MODE_CTRL1_MODE_MASK,

drivers/usb/typec/mux/wcd939x-usbss.c

355

FIELD_PREP(WCD_USBSS_USB_SS_CNTL_USB_SS_MODE,

drivers/usb/typec/mux/wcd939x-usbss.c

364

FIELD_PREP(WCD_USBSS_SWITCH_SELECT0_DNL_SWITCHES,

drivers/usb/typec/mux/wcd939x-usbss.c

366

FIELD_PREP(WCD_USBSS_SWITCH_SELECT0_DPR_SWITCHES,

drivers/usb/typec/mux/wcd939x-usbss.c

458

FIELD_PREP(WCD_USBSS_USB_SS_CNTL_USB_SS_MODE,

drivers/usb/typec/mux/wcd939x-usbss.c

477

FIELD_PREP(WCD_USBSS_SWITCH_SELECT0_DNL_SWITCHES,

drivers/usb/typec/mux/wcd939x-usbss.c

479

FIELD_PREP(WCD_USBSS_SWITCH_SELECT0_DPR_SWITCHES,

drivers/usb/typec/mux/wcd939x-usbss.c

497

FIELD_PREP(WCD_USBSS_DISP_AUXP_CTL_LK_CANCEL_TRK_COEFF,

drivers/usb/typec/mux/wcd939x-usbss.c

652

FIELD_PREP(WCD_USBSS_FUNCTION_ENABLE_SOURCE_SELECT,

drivers/usb/typec/stusb160x.c

505

FIELD_PREP(STUSB160X_CC_CURRENT_ADVERTISED,

drivers/usb/typec/tcpm/maxim_contaminant.c

100

FIELD_PREP(ADCINSEL, 0));

drivers/usb/typec/tcpm/maxim_contaminant.c

121

FIELD_PREP(CCLPMODESEL, ULTRA_LOW_POWER_MODE));

drivers/usb/typec/tcpm/maxim_contaminant.c

127

FIELD_PREP(CCRPCTRL, UA_1_SRC));

drivers/usb/typec/tcpm/maxim_contaminant.c

182

FIELD_PREP(CCRPCTRL, UA_80_SRC));

drivers/usb/typec/tcpm/maxim_contaminant.c

193

FIELD_PREP(CCLPMODESEL,

drivers/usb/typec/tcpm/maxim_contaminant.c

221

FIELD_PREP(CCRPCTRL, 0));

drivers/usb/typec/tcpm/maxim_contaminant.c

294

FIELD_PREP(CCWTRDEB, CCWTRDEB_1MS)

drivers/usb/typec/tcpm/maxim_contaminant.c

295

| FIELD_PREP(CCWTRSEL, CCWTRSEL_1V)

drivers/usb/typec/tcpm/maxim_contaminant.c

296

| FIELD_PREP(WTRCYCLE, WTRCYCLE_4_8_S));

drivers/usb/typec/tcpm/maxim_contaminant.c

312

FIELD_PREP(CCLPMODESEL,

drivers/usb/typec/tcpm/maxim_contaminant.c

339

FIELD_PREP(CCLPMODESEL,

drivers/usb/typec/tcpm/maxim_contaminant.c

349

FIELD_PREP(TCPC_ROLE_CTRL_CC1,

drivers/usb/typec/tcpm/maxim_contaminant.c

351

FIELD_PREP(TCPC_ROLE_CTRL_CC2,

drivers/usb/typec/tcpm/maxim_contaminant.c

80

FIELD_PREP(ADCINSEL, channel));

drivers/usb/typec/tcpm/tcpci.c

109

reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RA)

drivers/usb/typec/tcpm/tcpci.c

110

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RA));

drivers/usb/typec/tcpm/tcpci.c

113

reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RD)

drivers/usb/typec/tcpm/tcpci.c

114

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RD));

drivers/usb/typec/tcpm/tcpci.c

117

reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP)

drivers/usb/typec/tcpm/tcpci.c

118

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP)

drivers/usb/typec/tcpm/tcpci.c

119

| FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci.c

123

reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP)

drivers/usb/typec/tcpm/tcpci.c

124

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP)

drivers/usb/typec/tcpm/tcpci.c

125

| FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci.c

129

reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP)

drivers/usb/typec/tcpm/tcpci.c

130

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP)

drivers/usb/typec/tcpm/tcpci.c

131

| FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci.c

136

reg = (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_OPEN)

drivers/usb/typec/tcpm/tcpci.c

137

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_OPEN));

drivers/usb/typec/tcpm/tcpci.c

144

reg |= FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_OPEN);

drivers/usb/typec/tcpm/tcpci.c

147

reg |= FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_OPEN);

drivers/usb/typec/tcpm/tcpci.c

202

reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci.c

206

reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci.c

210

reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci.c

216

reg |= (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RD)

drivers/usb/typec/tcpm/tcpci.c

217

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RD));

drivers/usb/typec/tcpm/tcpci.c

219

reg |= (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP)

drivers/usb/typec/tcpm/tcpci.c

220

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP));

drivers/usb/typec/tcpm/tcpci.c

286

reg |= FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP);

drivers/usb/typec/tcpm/tcpci.c

288

reg |= FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RD);

drivers/usb/typec/tcpm/tcpci.c

294

reg |= FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP);

drivers/usb/typec/tcpm/tcpci.c

296

reg |= FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RD);

drivers/usb/typec/tcpm/tcpci.c

301

reg |= FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_OPEN);

drivers/usb/typec/tcpm/tcpci.c

303

reg |= FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_OPEN);

drivers/usb/typec/tcpm/tcpci.c

465

reg = FIELD_PREP(TCPC_MSG_HDR_INFO_REV, PD_REV20);

drivers/usb/typec/tcpm/tcpci.c

616

reg = FIELD_PREP(TCPC_TRANSMIT_RETRY,

drivers/usb/typec/tcpm/tcpci.c

620

reg |= FIELD_PREP(TCPC_TRANSMIT_TYPE, type);

drivers/usb/typec/tcpm/tcpci_rt1711h.c

235

reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci_rt1711h.c

239

reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci_rt1711h.c

243

reg |= FIELD_PREP(TCPC_ROLE_CTRL_RP_VAL,

drivers/usb/typec/tcpm/tcpci_rt1711h.c

249

reg |= (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RD)

drivers/usb/typec/tcpm/tcpci_rt1711h.c

250

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RD));

drivers/usb/typec/tcpm/tcpci_rt1711h.c

252

reg |= (FIELD_PREP(TCPC_ROLE_CTRL_CC1, TCPC_ROLE_CTRL_CC_RP)

drivers/usb/typec/tcpm/tcpci_rt1711h.c

253

| FIELD_PREP(TCPC_ROLE_CTRL_CC2, TCPC_ROLE_CTRL_CC_RP));

drivers/video/backlight/apple_dwi_bl.c

49

cmd |= FIELD_PREP(DWI_BL_CMD_DATA, brightness);

drivers/video/backlight/apple_dwi_bl.c

50

cmd |= FIELD_PREP(DWI_BL_CMD_TYPE, DWI_BL_CMD_TYPE_SET_BRIGHTNESS);

drivers/video/backlight/aw99706.c

301

val = FIELD_PREP(AW99706_BACKLIGHT_EN_MASK, en);

drivers/video/backlight/cgbc_bl.c

86

FIELD_PREP(BLT_PWM_DUTY_MASK, brightness);

drivers/video/fbdev/imxfb.c

423

pcr |= FIELD_PREP(PCR_BPIX_MASK, PCR_BPIX_18);

drivers/video/fbdev/imxfb.c

429

pcr |= FIELD_PREP(PCR_BPIX_MASK, PCR_BPIX_12);

drivers/video/fbdev/imxfb.c

431

pcr |= FIELD_PREP(PCR_BPIX_MASK, PCR_BPIX_16);

drivers/video/fbdev/imxfb.c

439

pcr |= FIELD_PREP(PCR_BPIX_MASK, PCR_BPIX_8);

drivers/video/fbdev/imxfb.c

523

writel(FIELD_PREP(POS_POS_MASK, 0), fbi->regs + LCDC_POS);

drivers/video/fbdev/imxfb.c

657

writel(FIELD_PREP(VPW_VPW_MASK,

drivers/video/fbdev/imxfb.c

661

writel(FIELD_PREP(HCR_H_WIDTH_MASK, var->hsync_len - 1) |

drivers/video/fbdev/imxfb.c

662

FIELD_PREP(HCR_H_WAIT_1_MASK, var->right_margin - 1) |

drivers/video/fbdev/imxfb.c

663

FIELD_PREP(HCR_H_WAIT_2_MASK,

drivers/video/fbdev/imxfb.c

667

writel(FIELD_PREP(VCR_V_WIDTH_MASK, var->vsync_len) |

drivers/video/fbdev/imxfb.c

668

FIELD_PREP(VCR_V_WAIT_1_MASK, var->lower_margin) |

drivers/video/fbdev/imxfb.c

669

FIELD_PREP(VCR_V_WAIT_2_MASK, var->upper_margin),

drivers/video/fbdev/imxfb.c

672

writel(FIELD_PREP(SIZE_XMAX_MASK, var->xres >> 4) |

drivers/watchdog/bd96801_wdt.c

222

fastng = FIELD_PREP(BD96801_WD_TMO_SHORT_MASK, fastng);

drivers/watchdog/realtek_otto_wdt.c

154

v |= FIELD_PREP(OTTO_WDT_CTRL_PHASE1, phase1_ticks - 1);

drivers/watchdog/realtek_otto_wdt.c

155

v |= FIELD_PREP(OTTO_WDT_CTRL_PHASE2, phase2_ticks - 1);

drivers/watchdog/realtek_otto_wdt.c

156

v |= FIELD_PREP(OTTO_WDT_CTRL_PRESCALE, prescale);

drivers/watchdog/realtek_otto_wdt.c

201

v = FIELD_PREP(OTTO_WDT_CTRL_RST_MODE, reset_mode) | OTTO_WDT_CTRL_ENABLE;

drivers/watchdog/realtek_otto_wdt.c

283

v |= FIELD_PREP(OTTO_WDT_CTRL_RST_MODE, mode);

include/linux/arm_ffa.h

111

(FIELD_PREP(FFA_MAJOR_VERSION_MASK, (major)) | \

include/linux/arm_ffa.h

112

FIELD_PREP(FFA_MINOR_VERSION_MASK, (minor)))

include/linux/arm_ffa.h

390

(FIELD_PREP(HANDLE_LOW_MASK, (l)) | FIELD_PREP(HANDLE_HIGH_MASK, (h)))

include/linux/cdx/bitfield.h

48

(FIELD_PREP(GENMASK(CDX_HIGH_BIT(field), \

include/linux/hisi_acc_qm.h

26

FIELD_PREP(AXUSER_CMD_TYPE, \

include/linux/mfd/rz-mtu3.h

108

FIELD_PREP(RZ_MTU3_TIOR_IOA, RZ_MTU3_TIOR_OC_INIT_OUT_LO_HI_OUT)

include/linux/mfd/rz-mtu3.h

110

FIELD_PREP(RZ_MTU3_TIOR_IOB, RZ_MTU3_TIOR_OC_INIT_OUT_HI_TOGGLE_OUT)

include/linux/mfd/rz-mtu3.h

41

#define RZ_MTU3_TMDR1_MD_NORMAL FIELD_PREP(RZ_MTU3_TMDR1_MD, 0)

include/linux/mfd/rz-mtu3.h

42

#define RZ_MTU3_TMDR1_MD_PWMMODE1 FIELD_PREP(RZ_MTU3_TMDR1_MD, 2)

include/linux/mfd/rz-mtu3.h

98

#define RZ_MTU3_TCR_CCLR_TGRC FIELD_PREP(RZ_MTU3_TCR_CCLR, 5)

include/linux/mfd/rz-mtu3.h

99

#define RZ_MTU3_TCR_CKEG_RISING FIELD_PREP(RZ_MTU3_TCR_CKEG, 0)

include/linux/mfd/ti_am335x_tscadc.h

103

#define CNTRLREG_TSC_AFE_CTRL(val) FIELD_PREP(GENMASK(6, 5), (val))

include/linux/mfd/ti_am335x_tscadc.h

55

#define STEPCONFIG_MODE(val) FIELD_PREP(GENMASK(1, 0), (val))

include/linux/mfd/ti_am335x_tscadc.h

58

#define STEPCONFIG_AVG(val) FIELD_PREP(GENMASK(4, 2), (val))

include/linux/mfd/ti_am335x_tscadc.h

66

#define STEPCONFIG_RFP(val) FIELD_PREP(GENMASK(13, 12), (val))

include/linux/mfd/ti_am335x_tscadc.h

68

#define STEPCONFIG_INM(val) FIELD_PREP(GENMASK(18, 15), (val))

include/linux/mfd/ti_am335x_tscadc.h

70

#define STEPCONFIG_INP(val) FIELD_PREP(GENMASK(22, 19), (val))

include/linux/mfd/ti_am335x_tscadc.h

74

#define STEPCONFIG_RFM(val) FIELD_PREP(GENMASK(24, 23), (val))

include/linux/mfd/ti_am335x_tscadc.h

78

#define STEPDELAY_OPEN(val) FIELD_PREP(GENMASK(17, 0), (val))

include/linux/mfd/ti_am335x_tscadc.h

81

#define STEPDELAY_SAMPLE(val) FIELD_PREP(GENMASK(31, 24), (val))

include/linux/mfd/ti_am335x_tscadc.h

86

#define STEPCHARGE_RFP(val) FIELD_PREP(GENMASK(14, 12), (val))

include/linux/mfd/ti_am335x_tscadc.h

88

#define STEPCHARGE_INM(val) FIELD_PREP(GENMASK(18, 15), (val))

include/linux/mfd/ti_am335x_tscadc.h

90

#define STEPCHARGE_INP(val) FIELD_PREP(GENMASK(22, 19), (val))

include/linux/mfd/ti_am335x_tscadc.h

91

#define STEPCHARGE_RFM(val) FIELD_PREP(GENMASK(24, 23), (val))

include/linux/mfd/ti_am335x_tscadc.h

95

#define CHARGEDLY_OPEN(val) FIELD_PREP(GENMASK(17, 0), (val))

include/linux/turris-omnia-mcu-interface.h

247

#define OMNIA_CMD_LED_MODE_LED(_l) FIELD_PREP(OMNIA_CMD_LED_MODE_LED_MASK, _l)

include/linux/turris-omnia-mcu-interface.h

254

#define OMNIA_CMD_LED_STATE_LED(_l) FIELD_PREP(OMNIA_CMD_LED_STATE_LED_MASK, _l)

include/net/libeth/xdp.h

487

.opts = ((flen) | FIELD_PREP(GENMASK_ULL(63, 32), (__VA_ARGS__ + 0)))

include/net/tcp_ecn.h

367

return FIELD_PREP(TCPHDR_ACE, ecn_to_ace_flags[ect & 0x3]);

include/rdma/iba.h

60

FIELD_PREP(field_mask, value)); \

net/dsa/tag_ar9331.c

38

hdr = FIELD_PREP(AR9331_HDR_VERSION_MASK, AR9331_HDR_VERSION);

net/dsa/tag_gswip.c

71

gswip_tag[3] = FIELD_PREP(GSWIP_TX_PORT_MAP, dsa_xmit_port_mask(skb, dev));

net/dsa/tag_ksz.c

297

val |= FIELD_PREP(KSZ9477_TAIL_TAG_PRIO, prio);

net/dsa/tag_ksz.c

365

*tag |= FIELD_PREP(KSZ9893_TAIL_TAG_PRIO, prio);

net/dsa/tag_ksz.c

429

val |= FIELD_PREP(LAN937X_TAIL_TAG_PRIO, prio);

net/dsa/tag_mtk.c

57

mtk_tag[1] = FIELD_PREP(MTK_HDR_XMIT_DP_BIT_MASK,

net/dsa/tag_mxl-gsw1xx.c

59

tag = FIELD_PREP(GSW1XX_TX_PORT_MAP, dsa_xmit_port_mask(skb, dev)) |

net/dsa/tag_mxl862xx.c

53

mxl862_tag[2] = htons(FIELD_PREP(MXL862_SUBIF_ID, sub_interface));

net/dsa/tag_mxl862xx.c

54

mxl862_tag[3] = htons(FIELD_PREP(MXL862_IGP_EGP, cpu_port));

net/dsa/tag_qca.c

26

hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION);

net/dsa/tag_qca.c

28

hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, dsa_xmit_port_mask(skb, dev));

net/dsa/tag_rtl8_4.c

112

tag16[1] = htons(FIELD_PREP(RTL8_4_PROTOCOL, RTL8_4_PROTOCOL_RTL8365MB));

net/dsa/tag_rtl8_4.c

115

tag16[2] = htons(FIELD_PREP(RTL8_4_LEARN_DIS, 1));

net/dsa/tag_rtl8_4.c

118

tag16[3] = htons(FIELD_PREP(RTL8_4_RX, dsa_xmit_port_mask(skb, dev)));

net/dsa/tag_rzn1_a5psw.c

62

data2_val = FIELD_PREP(A5PSW_CTRL_DATA_PORT, dsa_xmit_port_mask(skb, dev));

net/dsa/tag_yt921x.c

40

#define YT921X_TAG_PRIO(x) FIELD_PREP(YT921X_TAG_PRIO_M, (x))

net/dsa/tag_yt921x.c

43

#define YT921X_TAG_CODE(x) FIELD_PREP(YT921X_TAG_CODE_M, (x))

net/dsa/tag_yt921x.c

45

#define YT921X_TAG_TX_PORTS(x) FIELD_PREP(YT921X_TAG_TX_PORTS_M, (x))

net/mac80211/rc80211_minstrel_ht.h

66

(FIELD_PREP(MI_RATE_GROUP_MASK, _group) | \

net/mac80211/rc80211_minstrel_ht.h

67

FIELD_PREP(MI_RATE_IDX_MASK, _idx))

net/mac80211/sta_info.h

1056

#define STA_STATS_FIELD(_n, _v) FIELD_PREP(STA_STATS_FIELD_ ## _n, _v)

net/mac80211/util.c

4406

listen_interval = FIELD_PREP(LISTEN_INT_USF, usf) |

net/mac80211/util.c

4407

FIELD_PREP(LISTEN_INT_UI, ui);

net/psp/psp_main.c

215

psph->verfl = FIELD_PREP(PSPHDR_VERFL_VERSION, ver) |

net/psp/psp_main.c

216

FIELD_PREP(PSPHDR_VERFL_ONE, 1);

net/sched/cls_flower.c

1834

key->cfm.mdl_ver = FIELD_PREP(FLOW_DIS_CFM_MDL_MASK, level);

net/shaper/shaper.c

249

return FIELD_PREP(NET_SHAPER_SCOPE_MASK, handle->scope) |

net/shaper/shaper.c

250

FIELD_PREP(NET_SHAPER_ID_MASK, handle->id);

sound/soc/amd/acp/acp-i2s.c

62

val |= FIELD_PREP(ACP63_LRCLK_DIV_FIELD, chip->lrclk_div);

sound/soc/amd/acp/acp-i2s.c

63

val |= FIELD_PREP(ACP63_BCLK_DIV_FIELD, chip->bclk_div);

sound/soc/amd/acp/acp-i2s.c

66

val |= FIELD_PREP(LRCLK_DIV_FIELD, chip->lrclk_div);

sound/soc/amd/acp/acp-i2s.c

67

val |= FIELD_PREP(BCLK_DIV_FIELD, chip->bclk_div);

sound/soc/amd/ps/ps-pdm-dma.c

64

pdm_ctrl |= FIELD_PREP(ACP_WOV_GAIN_CONTROL, clamp(pdm_gain, 0, 3));

sound/soc/amd/renoir/acp3x-pdm-dma.c

89

pdm_ctrl |= FIELD_PREP(ACP_WOV_GAIN_CONTROL, clamp(pdm_gain, 0, 3));

sound/soc/amd/yc/acp6x-pdm-dma.c

64

pdm_ctrl |= FIELD_PREP(ACP_WOV_GAIN_CONTROL, clamp(pdm_gain, 0, 3));

sound/soc/apple/mca.c

206

FIELD_PREP(SERDES_CONF_SYNC_SEL, 0));

sound/soc/apple/mca.c

208

FIELD_PREP(SERDES_CONF_SYNC_SEL, 7));

sound/soc/apple/mca.c

220

FIELD_PREP(SERDES_CONF_SYNC_SEL, 0));

sound/soc/apple/mca.c

222

FIELD_PREP(SERDES_CONF_SYNC_SEL, cl->no + 1));

sound/soc/apple/mca.c

401

serdes_conf = FIELD_PREP(SERDES_CONF_NCHANS, max(slots, 1) - 1);

sound/soc/apple/mca.c

420

serdes_conf |= FIELD_PREP(SERDES_CONF_SYNC_SEL, cl->no + 1);

sound/soc/apple/mca.c

665

regval = FIELD_PREP(DMA_ADAPTER_NCHANS, nchans_ceiled) |

sound/soc/apple/mca.c

666

FIELD_PREP(DMA_ADAPTER_TX_NCHANS, 0x2) |

sound/soc/apple/mca.c

667

FIELD_PREP(DMA_ADAPTER_RX_NCHANS, 0x2) |

sound/soc/apple/mca.c

668

FIELD_PREP(DMA_ADAPTER_TX_LSB_PAD, pad) |

sound/soc/apple/mca.c

669

FIELD_PREP(DMA_ADAPTER_RX_MSB_PAD, pad);

sound/soc/apple/mca.c

690

writel_relaxed(FIELD_PREP(MCLK_CONF_DIV, 0x1),

sound/soc/apple/mca.c

764

writel_relaxed(FIELD_PREP(PORT_CLOCK_SEL, fe_cl->no + 1),

sound/soc/atmel/mchp-pdmc.c

599

mr_val |= FIELD_PREP(MCHP_PDMC_MR_SINCORDER_MASK, dd->sinc_order);

sound/soc/atmel/mchp-pdmc.c

603

mr_val |= FIELD_PREP(MCHP_PDMC_MR_CHUNK_MASK, dd->addr.maxburst);

sound/soc/atmel/mchp-spdiftx.c

390

mr |= FIELD_PREP(SPDIFTX_MR_CHUNK_MASK, dev->playback.maxburst);

sound/soc/atmel/mchp-spdiftx.c

394

mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 8);

sound/soc/atmel/mchp-spdiftx.c

400

mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 16);

sound/soc/atmel/mchp-spdiftx.c

406

mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 18);

sound/soc/atmel/mchp-spdiftx.c

412

mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 20);

sound/soc/atmel/mchp-spdiftx.c

418

mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 24);

sound/soc/atmel/mchp-spdiftx.c

424

mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 24);

sound/soc/atmel/mchp-spdiftx.c

430

mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 32);

sound/soc/atmel/mchp-spdiftx.c

438

mr |= FIELD_PREP(SPDIFTX_MR_BPS_MASK, bps - 1);

sound/soc/codecs/adau7118.c

17

#define ADAU7118_DEC_RATIO(x) FIELD_PREP(ADAU7118_DEC_RATIO_MASK, x)

sound/soc/codecs/adau7118.c

20

#define ADAU7118_SLOT_WIDTH(x) FIELD_PREP(ADAU7118_SLOT_WIDTH_MASK, x)

sound/soc/codecs/adau7118.c

22

#define ADAU7118_TRISTATE(x) FIELD_PREP(ADAU7118_TRISTATE_MASK, x)

sound/soc/codecs/adau7118.c

24

#define ADAU7118_DATA_FMT(x) FIELD_PREP(ADAU7118_DATA_FMT_MASK, x)

sound/soc/codecs/adau7118.c

26

#define ADAU7118_SAI_MODE(x) FIELD_PREP(ADAU7118_SAI_MODE_MASK, x)

sound/soc/codecs/adau7118.c

29

FIELD_PREP(ADAU7118_LRCLK_BCLK_POL_MASK, x)

sound/soc/codecs/adau7118.c

31

#define ADAU7118_SPT_SLOT(x) FIELD_PREP(ADAU7118_SPT_SLOT_MASK, x)

sound/soc/codecs/adau7118.c

33

#define ADAU7118_FULL_SOFT_R(x) FIELD_PREP(ADAU7118_FULL_SOFT_R_MASK, x)

sound/soc/codecs/cs35l56-shared-test.c

273

FIELD_PREP(CS35L56_PAD_GPIO_PULL_MASK,

sound/soc/codecs/cs35l56-shared.c

1663

val = FIELD_PREP(CS35L56_PAD_GPIO_PULL_MASK,

sound/soc/codecs/cs35l56-shared.c

1666

val = FIELD_PREP(CS35L56_PAD_GPIO_PULL_MASK, CS35L56_PAD_PULL_NONE);

sound/soc/codecs/cs40l50-codec.c

193

codec->daifmt |= FIELD_PREP(CS40L50_ASP_FMT_MASK, CS40L50_ASP_FMT_I2S);

sound/soc/codecs/cs42l84.c

406

FIELD_PREP(CS42L84_ASP_FSYNC_CTL2_BCLK_PERIOD_LO, fsync & 0x7f));

sound/soc/codecs/cs42l84.c

409

FIELD_PREP(CS42L84_ASP_FSYNC_CTL3_BCLK_PERIOD_HI, fsync >> 7));

sound/soc/codecs/cs42l84.c

433

FIELD_PREP(CS42L84_CCM_CTL3_REFCLK_DIV, pll_ratio_table[i].bclk_prediv));

sound/soc/codecs/cs42l84.c

448

FIELD_PREP(CS42L84_PLL_CTL1_MODE, pll_ratio_table[i].pll_mode));

sound/soc/codecs/cs42l84.c

632

FIELD_PREP(CS42L84_CCM_CTL1_MCLK_SRC, CS42L84_CCM_CTL1_MCLK_SRC_PLL)

sound/soc/codecs/cs42l84.c

633

| FIELD_PREP(CS42L84_CCM_CTL1_MCLK_FREQ, cs42l84->pll_mclk_f));

sound/soc/codecs/cs42l84.c

639

FIELD_PREP(CS42L84_CCM_CTL1_MCLK_SRC, CS42L84_CCM_CTL1_MCLK_SRC_BCLK)

sound/soc/codecs/cs42l84.c

640

| FIELD_PREP(CS42L84_CCM_CTL1_MCLK_FREQ, cs42l84->pll_mclk_f));

sound/soc/codecs/cs42l84.c

707

FIELD_PREP(CS42L84_MISC_DET_CTL_HSBIAS_CTL, 3) | /* 2.7 V */

sound/soc/codecs/cs42l84.c

708

FIELD_PREP(CS42L84_MISC_DET_CTL_DETECT_MODE, 0));

sound/soc/codecs/cs42l84.c

729

FIELD_PREP(CS42L84_HS_DET_CTL2_SET, 0));

sound/soc/codecs/cs42l84.c

734

FIELD_PREP(CS42L84_MISC_DET_CTL_DETECT_MODE, 3));

sound/soc/codecs/cs42l84.c

752

FIELD_PREP(CS42L84_MISC_DET_CTL_HSBIAS_CTL, 1)); /* 0.0 V */

sound/soc/codecs/cs42l84.c

783

FIELD_PREP(CS42L84_MISC_DET_CTL_HSBIAS_CTL, 1) | /* 0.0 V */

sound/soc/codecs/cs42l84.c

784

FIELD_PREP(CS42L84_MISC_DET_CTL_DETECT_MODE, 0));

sound/soc/codecs/cs42l84.c

798

FIELD_PREP(CS42L84_HS_DET_CTL2_SET, 2));

sound/soc/codecs/cs42l84.c

923

FIELD_PREP(CS42L84_TIP_SENSE_CTL2_MODE, CS42L84_TIP_SENSE_CTL2_MODE_SHORT_DET));

sound/soc/codecs/cs42l84.c

928

FIELD_PREP(CS42L84_RING_SENSE_CTL_RISETIME, CS42L84_DEBOUNCE_TIME_125MS) |

sound/soc/codecs/cs42l84.c

929

FIELD_PREP(CS42L84_RING_SENSE_CTL_FALLTIME, CS42L84_DEBOUNCE_TIME_125MS));

sound/soc/codecs/cs42l84.c

934

FIELD_PREP(CS42L84_TIP_SENSE_CTL_RISETIME, CS42L84_DEBOUNCE_TIME_500MS) |

sound/soc/codecs/cs42l84.c

935

FIELD_PREP(CS42L84_TIP_SENSE_CTL_FALLTIME, CS42L84_DEBOUNCE_TIME_125MS));

sound/soc/codecs/cs42l84.c

949

FIELD_PREP(CS42L84_MIC_DET_CTL1_HS_DET_LEVEL, 0x2c)); /* ~1.9 V */

sound/soc/codecs/cs42l84.c

963

FIELD_PREP(CS42L84_HS_DET_CTL2_SET, 2) |

sound/soc/codecs/cs42l84.c

964

FIELD_PREP(CS42L84_HS_DET_CTL2_CTL, 0));

sound/soc/codecs/cs42l84.h

52

(FIELD_PREP(CS42L84_CCM_CTL1_MCLK_SRC, CS42L84_CCM_CTL1_MCLK_SRC_RCO) \

sound/soc/codecs/cs42l84.h

53

| FIELD_PREP(CS42L84_CCM_CTL1_MCLK_FREQ, CS42L84_CCM_CTL1_MCLK_F_12MHZ))

sound/soc/codecs/es8323.c

583

fs = FIELD_PREP(ES8323_DACCONTROL2_DACFSMODE, es8323_coeff_div[coeff].usb)

sound/soc/codecs/es8323.c

584

| FIELD_PREP(ES8323_DACCONTROL2_DACFSRATIO, es8323_coeff_div[coeff].sr);

sound/soc/codecs/jz4760.c

676

FIELD_PREP(REG_AICR_DAC_ADWL_MASK, bit_width));

sound/soc/codecs/jz4760.c

679

FIELD_PREP(REG_CCR2_DAC_FREQ_MASK, rate));

sound/soc/codecs/jz4760.c

683

FIELD_PREP(REG_AICR_ADC_ADWL_MASK, bit_width));

sound/soc/codecs/jz4760.c

686

FIELD_PREP(REG_CCR2_ADC_FREQ_MASK, rate));

sound/soc/codecs/jz4760.c

763

tmp |= FIELD_PREP(ICDC_RGADW_RGADDR_MASK, reg);

sound/soc/codecs/jz4760.c

784

writel(ICDC_RGADW_RGWR | FIELD_PREP(ICDC_RGADW_RGADDR_MASK, reg) | val,

sound/soc/codecs/pm4125.c

214

FIELD_PREP(PM4125_ANA_SURGE_PROTECTION_HPHL_MASK,

sound/soc/codecs/pm4125.c

217

FIELD_PREP(PM4125_ANA_SURGE_PROTECTION_HPHR_MASK,

sound/soc/codecs/pm4125.c

223

FIELD_PREP(PM4125_ANA_MICBIAS_MICB2_PULL_DN_MASK,

sound/soc/codecs/ssm3515.c

177

FIELD_PREP(SSM3515_DAC_MUTE, mute));

sound/soc/codecs/ssm3515.c

195

FIELD_PREP(SSM3515_SAI2_DATA_WIDTH,

sound/soc/codecs/ssm3515.c

230

FIELD_PREP(SSM3515_DAC_FS, rateval));

sound/soc/codecs/ssm3515.c

334

FIELD_PREP(SSM3515_SAI1_TDM_BCLKS, tdm_bclks_val));

sound/soc/codecs/ssm3515.c

340

FIELD_PREP(SSM3515_SAI2_TDM_SLOT, slot));

sound/soc/codecs/wsa883x.c

1470

FIELD_PREP(WSA883X_TADC_VALUE_CTL_TEMP_VALUE_RD_EN_MASK, 0x0));

sound/soc/codecs/wsa883x.c

1477

FIELD_PREP(WSA883X_TADC_VALUE_CTL_TEMP_VALUE_RD_EN_MASK, 0x1));

sound/soc/codecs/wsa884x.c

1489

FIELD_PREP(WSA884X_ISENSE2_ISENSE_GAIN_CTL_MASK, igain));

sound/soc/codecs/wsa884x.c

1492

FIELD_PREP(WSA884X_VSENSE1_GAIN_VSENSE_FE_MASK, vgain));

sound/soc/codecs/wsa884x.c

1495

FIELD_PREP(WSA884X_GAIN_RAMPING_MIN_MIN_GAIN_MASK, min_gain));

sound/soc/codecs/wsa884x.c

1500

FIELD_PREP(WSA884X_DRE_CTL_0_OFFSET_MASK, comp_offset));

sound/soc/codecs/wsa884x.c

1504

FIELD_PREP(WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK, 0x0));

sound/soc/codecs/wsa884x.c

1508

FIELD_PREP(WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK, 0x1));

sound/soc/codecs/wsa884x.c

1524

wo_ctl_0 |= FIELD_PREP(WSA884X_ANA_WO_CTL_0_DAC_CM_CLAMP_EN_MASK,

sound/soc/codecs/wsa884x.c

1528

wo_ctl_0 |= FIELD_PREP(WSA884X_ANA_WO_CTL_0_PA_AUX_GAIN_MASK,

sound/soc/codecs/wsa884x.c

1531

wo_ctl_0 |= FIELD_PREP(WSA884X_ANA_WO_CTL_0_PA_AUX_GAIN_MASK,

sound/soc/codecs/wsa884x.c

1903

FIELD_PREP(WSA884X_TADC_VALUE_CTL_TEMP_VALUE_RD_EN_MASK, 0x0));

sound/soc/codecs/wsa884x.c

1910

FIELD_PREP(WSA884X_TADC_VALUE_CTL_TEMP_VALUE_RD_EN_MASK, 0x1));

sound/soc/fsl/fsl_micfil.c

1004

FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1));

sound/soc/fsl/fsl_micfil.c

265

FIELD_PREP(MICFIL_CTRL2_QSEL, qsel));

sound/soc/fsl/fsl_micfil.c

798

FIELD_PREP(MICFIL_CTRL1_DISEL, MICFIL_CTRL1_DISEL_DMA));

sound/soc/fsl/fsl_micfil.c

826

FIELD_PREP(MICFIL_CTRL1_DISEL, MICFIL_CTRL1_DISEL_DISABLE));

sound/soc/fsl/fsl_micfil.c

932

FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |

sound/soc/fsl/fsl_micfil.c

933

FIELD_PREP(MICFIL_CTRL2_CICOSR, 32 - osr));

sound/soc/fsl/fsl_micfil.c

938

FIELD_PREP(MICFIL_VAD0_CTRL1_CICOSR, 16 - osr));

sound/soc/fsl/fsl_micfil.c

943

FIELD_PREP(MICFIL_VAD0_CTRL1_CHSEL, (channels - 1)));

sound/soc/fsl/lpc3xxx-i2s.h

43

#define LPC3XXX_I2S_WW8 FIELD_PREP(0x3, 0) /* Word width is 8bit */

sound/soc/fsl/lpc3xxx-i2s.h

44

#define LPC3XXX_I2S_WW16 FIELD_PREP(0x3, 1) /* Word width is 16bit */

sound/soc/fsl/lpc3xxx-i2s.h

45

#define LPC3XXX_I2S_WW32 FIELD_PREP(0x3, 3) /* Word width is 32bit */

sound/soc/fsl/lpc3xxx-i2s.h

50

#define LPC3XXX_I2S_WS_HP(s) FIELD_PREP(0x7FC0, s) /* Word select half period - 1 */

sound/soc/fsl/lpc3xxx-i2s.h

65

#define LPC3XXX_I2S_DMA0_RX_DEPTH(s) FIELD_PREP(0xF00, s) /* Set the DMA1 RX Request level */

sound/soc/fsl/lpc3xxx-i2s.h

66

#define LPC3XXX_I2S_DMA0_TX_DEPTH(s) FIELD_PREP(0xF0000, s) /* Set the DMA1 TX Request level */

sound/soc/fsl/lpc3xxx-i2s.h

71

#define LPC3XXX_I2S_DMA1_RX_DEPTH(s) FIELD_PREP(0x700, s) /* Set the DMA1 RX Request level */

sound/soc/fsl/lpc3xxx-i2s.h

72

#define LPC3XXX_I2S_DMA1_TX_DEPTH(s) FIELD_PREP(0x70000, s) /* Set the DMA1 TX Request level */

sound/soc/fsl/lpc3xxx-i2s.h

77

#define LPC3XXX_I2S_IRQ_RX_DEPTH(s) FIELD_PREP(0xFF00, s) /* valid values ar 0 to 7 */

sound/soc/fsl/lpc3xxx-i2s.h

78

#define LPC3XXX_I2S_IRQ_TX_DEPTH(s) FIELD_PREP(0xFF0000, s) /* valid values ar 0 to 7 */

sound/soc/jz4740/jz4740-i2s.c

283

ctrl |= FIELD_PREP(JZ_AIC_CTRL_OUTPUT_SAMPLE_SIZE, sample_size);

sound/soc/jz4740/jz4740-i2s.c

295

ctrl |= FIELD_PREP(JZ_AIC_CTRL_INPUT_SAMPLE_SIZE, sample_size);

sound/soc/loongson/loongson1_ac97.c

119

tmp = FIELD_PREP(CODEC_ADR, reg) | FIELD_PREP(CODEC_DAT, val);

sound/soc/loongson/loongson1_ac97.c

133

val = CODEC_WR | FIELD_PREP(CODEC_ADR, reg);

sound/soc/loongson/loongson1_ac97.c

37

#define M_FIFO_THRES_FULL FIELD_PREP(M_FIFO_THRES, 3)

sound/soc/loongson/loongson1_ac97.c

38

#define M_FIFO_THRES_HALF FIELD_PREP(M_FIFO_THRES, 1)

sound/soc/loongson/loongson1_ac97.c

39

#define M_FIFO_THRES_QUARTER FIELD_PREP(M_FIFO_THRES, 0)

sound/soc/loongson/loongson1_ac97.c

41

#define M_SW_16_BITS FIELD_PREP(M_SW, 2)

sound/soc/loongson/loongson1_ac97.c

42

#define M_SW_8_BITS FIELD_PREP(M_SW, 0)

sound/soc/loongson/loongson1_ac97.c

48

#define R_FIFO_THRES_EMPTY FIELD_PREP(R_FIFO_THRES, 3)

sound/soc/loongson/loongson1_ac97.c

49

#define R_FIFO_THRES_HALF FIELD_PREP(R_FIFO_THRES, 1)

sound/soc/loongson/loongson1_ac97.c

50

#define R_FIFO_THRES_QUARTER FIELD_PREP(R_FIFO_THRES, 0)

sound/soc/loongson/loongson1_ac97.c

52

#define R_SW_16_BITS FIELD_PREP(R_SW, 2)

sound/soc/loongson/loongson1_ac97.c

53

#define R_SW_8_BITS FIELD_PREP(R_SW, 0)

sound/soc/loongson/loongson1_ac97.c

59

#define L_FIFO_THRES_EMPTY FIELD_PREP(L_FIFO_THRES, 3)

sound/soc/loongson/loongson1_ac97.c

60

#define L_FIFO_THRES_HALF FIELD_PREP(L_FIFO_THRES, 1)

sound/soc/loongson/loongson1_ac97.c

61

#define L_FIFO_THRES_QUARTER FIELD_PREP(L_FIFO_THRES, 0)

sound/soc/loongson/loongson1_ac97.c

63

#define L_SW_16_BITS FIELD_PREP(L_SW, 2)

sound/soc/loongson/loongson1_ac97.c

64

#define L_SW_8_BITS FIELD_PREP(L_SW, 0)

sound/soc/loongson/loongson1_ac97.c

80

#define LS1X_AC97_DMA_TX_4_BYTES FIELD_PREP(LS1X_AC97_DMA_TX_BYTES, 2)

sound/soc/loongson/loongson1_ac97.c

81

#define LS1X_AC97_DMA_TX_2_BYTES FIELD_PREP(LS1X_AC97_DMA_TX_BYTES, 1)

sound/soc/loongson/loongson1_ac97.c

82

#define LS1X_AC97_DMA_TX_1_BYTE FIELD_PREP(LS1X_AC97_DMA_TX_BYTES, 0)

sound/soc/mediatek/mt7986/mt7986-dai-etdm.c

184

val |= FIELD_PREP(ETDM_BIT_LEN_MASK, bit_width - 1);

sound/soc/mediatek/mt7986/mt7986-dai-etdm.c

186

val |= FIELD_PREP(ETDM_WRD_LEN_MASK, wlen - 1);

sound/soc/mediatek/mt7986/mt7986-dai-etdm.c

188

val |= FIELD_PREP(ETDM_FMT_MASK, etdm_data->format);

sound/soc/mediatek/mt7986/mt7986-dai-etdm.c

190

val |= FIELD_PREP(ETDM_CH_NUM_MASK, get_etdm_ch_fixup(channels) - 1);

sound/soc/mediatek/mt7986/mt7986-dai-etdm.c

192

val |= FIELD_PREP(RELATCH_SRC_MASK, APLL_CLK);

sound/soc/mediatek/mt8188/mt8188-dai-adda.c

358

val |= FIELD_PREP(DL_2_INPUT_MODE_CTL_MASK,

sound/soc/mediatek/mt8188/mt8188-dai-adda.c

392

val = FIELD_PREP(UL_VOICE_MODE_CTL_MASK,

sound/soc/mediatek/mt8188/mt8188-dai-adda.c

67

val |= FIELD_PREP(MTKAIF_RXIF_DELAY_CYCLE_MASK, delay_cycle);

sound/soc/mediatek/mt8188/mt8188-dai-adda.c

68

val |= FIELD_PREP(MTKAIF_RXIF_DELAY_DATA, delay_data);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1030

val = FIELD_PREP(ETDM_OUT_CON4_CLOCK_MASK, source);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1034

val = FIELD_PREP(ETDM_OUT_CON4_CLOCK_MASK, source);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1038

val = FIELD_PREP(ETDM_OUT_CON4_CLOCK_MASK, source);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1042

val = FIELD_PREP(ETDM_IN_CON2_CLOCK_MASK, source);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1046

val = FIELD_PREP(ETDM_IN_CON2_CLOCK_MASK, source);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1751

val = FIELD_PREP(ETDM_IN1_SLAVE_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1756

val = FIELD_PREP(ETDM_IN2_SLAVE_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1761

val = FIELD_PREP(ETDM_OUT1_SLAVE_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1766

val = FIELD_PREP(ETDM_OUT2_SLAVE_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1771

val = FIELD_PREP(ETDM_OUT3_SLAVE_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1805

val = FIELD_PREP(ETDM_IN1_SYNC_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1810

val = FIELD_PREP(ETDM_IN2_SYNC_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1815

val = FIELD_PREP(ETDM_OUT1_SYNC_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1820

val = FIELD_PREP(ETDM_OUT2_SYNC_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1825

val = FIELD_PREP(ETDM_OUT3_SYNC_SEL_MASK, cowork_source_sel);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1935

val |= FIELD_PREP(ETDM_IN_CON1_LRCK_WIDTH_MASK, lrck_width - 1);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1946

val |= FIELD_PREP(ETDM_IN_CON2_UPDATE_GAP_MASK, 4);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1948

val |= FIELD_PREP(ETDM_IN_CON2_UPDATE_GAP_MASK, 3);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1954

FIELD_PREP(ETDM_IN_CON2_MULTI_IP_TOTAL_CH_MASK, channels - 1);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1970

val |= FIELD_PREP(ETDM_IN_CON3_FS_MASK, get_etdm_fs_timing(rate));

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

2043

val = FIELD_PREP(ETDM_OUT_CON0_RELATCH_DOMAIN_MASK,

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

2054

val |= FIELD_PREP(ETDM_OUT_CON1_LRCK_WIDTH_MASK, lrck_width - 1);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

2064

val |= FIELD_PREP(ETDM_OUT_CON4_FS_MASK, get_etdm_fs_timing(rate));

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

2073

val |= FIELD_PREP(ETDM_OUT_CON4_RELATCH_EN_MASK, fs);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

2145

val |= FIELD_PREP(ETDM_CON0_BIT_LEN_MASK, bit_width - 1);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

2147

val |= FIELD_PREP(ETDM_CON0_WORD_LEN_MASK, wlen - 1);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

2149

val |= FIELD_PREP(ETDM_CON0_FORMAT_MASK, etdm_data->format);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

2151

val |= FIELD_PREP(ETDM_CON0_CH_NUM_MASK, etdm_channels - 1);

sound/soc/mediatek/mt8188/mt8188-dai-pcm.c

151

val |= FIELD_PREP(PCM_INTF_CON2_SYNC_FREQ_MODE_MASK, fs);

sound/soc/mediatek/mt8188/mt8188-dai-pcm.c

156

val |= FIELD_PREP(PCM_INTF_CON2_CLK_DOMAIN_SEL_MASK,

sound/soc/mediatek/mt8188/mt8188-dai-pcm.c

159

val |= FIELD_PREP(PCM_INTF_CON2_CLK_DOMAIN_SEL_MASK,

sound/soc/mediatek/mt8188/mt8188-dai-pcm.c

173

val |= FIELD_PREP(PCM_INTF_CON1_PCM_MODE_MASK, mode);

sound/soc/mediatek/mt8188/mt8188-dai-pcm.c

177

val |= FIELD_PREP(PCM_INTF_CON1_PCM_FMT_MASK, fmt);

sound/soc/mediatek/mt8188/mt8188-dai-pcm.c

183

val |= FIELD_PREP(PCM_INTF_CON1_SYNC_LENGTH_MASK, 1);

sound/soc/mediatek/mt8188/mt8188-dai-pcm.c

185

val |= FIELD_PREP(PCM_INTF_CON1_SYNC_LENGTH_MASK, bit_width);

sound/soc/mediatek/mt8365/mt8365-afe-pcm.c

464

val = FIELD_PREP(CM_AFE_CM_CH_NUM_MASK, (channels - 1)) |

sound/soc/mediatek/mt8365/mt8365-afe-pcm.c

465

FIELD_PREP(CM_AFE_CM_START_DATA_MASK, 0);

sound/soc/mediatek/mt8365/mt8365-afe-pcm.c

471

val |= FIELD_PREP(CM_AFE_CM1_IN_MODE_MASK, fs);

sound/soc/mediatek/mt8365/mt8365-afe-pcm.c

477

val |= FIELD_PREP(CM_AFE_CM2_CLK_SEL, 0);

sound/soc/mediatek/mt8365/mt8365-afe-pcm.c

479

val |= FIELD_PREP(CM_AFE_CM2_CLK_SEL, 1);

sound/soc/mediatek/mt8365/mt8365-afe-pcm.c

481

val |= FIELD_PREP(CM_AFE_CM2_TDM_SEL, 1);

sound/soc/mediatek/mt8365/mt8365-dai-adda.c

30

val |= FIELD_PREP(AFE_ADDA_DL_SAMPLING_RATE,

sound/soc/mediatek/mt8365/mt8365-dai-adda.c

54

val = FIELD_PREP(AFE_ADDA_UL_SAMPLING_RATE,

sound/soc/mediatek/mt8365/mt8365-dai-dmic.c

134

val |= FIELD_PREP(DMIC_TOP_CON_CK_PHASE_SEL_CH1,

sound/soc/mediatek/mt8365/mt8365-dai-dmic.c

136

val |= FIELD_PREP(DMIC_TOP_CON_CK_PHASE_SEL_CH2,

sound/soc/mediatek/mt8365/mt8365-dai-i2s.c

294

val |= FIELD_PREP(AFE_I2S_CON_RATE_MASK, fs);

sound/soc/mediatek/mt8365/mt8365-dai-i2s.c

363

val = FIELD_PREP(O16BIT, o16bit) | FIELD_PREP(IS_MONO, mono);

sound/soc/mediatek/mt8365/mt8365-dai-i2s.c

392

FIELD_PREP(IIR_STAGE_MASK, iir_stage));

sound/soc/mediatek/mt8365/mt8365-dai-pcm.c

69

val |= FIELD_PREP(PCM_INTF_CON1_FORMAT_MASK, fmt);

sound/soc/mediatek/mt8365/mt8365-reg.h

794

#define CALI_64_CYCLE FIELD_PREP(CALI_CYCLE_MASK, 0x3F)

sound/soc/mediatek/mt8365/mt8365-reg.h

795

#define CALI_96_CYCLE FIELD_PREP(CALI_CYCLE_MASK, 0x5F)

sound/soc/mediatek/mt8365/mt8365-reg.h

796

#define CALI_441_CYCLE FIELD_PREP(CALI_CYCLE_MASK, 0x1B8)

sound/soc/mediatek/mt8365/mt8365-reg.h

803

#define CALI_SEL_00 FIELD_PREP(CALI_SEL_MASK, 0)

sound/soc/mediatek/mt8365/mt8365-reg.h

804

#define CALI_SEL_01 FIELD_PREP(CALI_SEL_MASK, 1)

sound/soc/mediatek/mt8365/mt8365-reg.h

873

#define PCM_INTF_CON1_FS_8K FIELD_PREP(PCM_INTF_CON1_FS_MASK, 0)

sound/soc/mediatek/mt8365/mt8365-reg.h

874

#define PCM_INTF_CON1_FS_16K FIELD_PREP(PCM_INTF_CON1_FS_MASK, 1)

sound/soc/mediatek/mt8365/mt8365-reg.h

875

#define PCM_INTF_CON1_FS_32K FIELD_PREP(PCM_INTF_CON1_FS_MASK, 2)

sound/soc/mediatek/mt8365/mt8365-reg.h

876

#define PCM_INTF_CON1_FS_48K FIELD_PREP(PCM_INTF_CON1_FS_MASK, 3)

sound/soc/mediatek/mt8365/mt8365-reg.h

878

#define PCM_INTF_CON1_SYNC_LEN(x) FIELD_PREP(PCM_INTF_CON1_SYNC_LEN_MASK, ((x) - 1))

sound/soc/mediatek/mt8365/mt8365-reg.h

899

#define DMIC_TOP_CON_VOICE_MODE_8K FIELD_PREP(DMIC_TOP_CON_VOICE_MODE_MASK, 0)

sound/soc/mediatek/mt8365/mt8365-reg.h

900

#define DMIC_TOP_CON_VOICE_MODE_16K FIELD_PREP(DMIC_TOP_CON_VOICE_MODE_MASK, 1)

sound/soc/mediatek/mt8365/mt8365-reg.h

901

#define DMIC_TOP_CON_VOICE_MODE_32K FIELD_PREP(DMIC_TOP_CON_VOICE_MODE_MASK, 2)

sound/soc/mediatek/mt8365/mt8365-reg.h

902

#define DMIC_TOP_CON_VOICE_MODE_48K FIELD_PREP(DMIC_TOP_CON_VOICE_MODE_MASK, 3)

sound/soc/mediatek/mt8365/mt8365-reg.h

904

#define DMIC_TOP_CON_LOW_POWER_MODE(x) FIELD_PREP(DMIC_TOP_CON_LOW_POWER_MODE_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

942

#define CM_AFE_CM_CH_NUM(x) FIELD_PREP(CM_AFE_CM_CH_NUM_MASK, ((x) - 1))

sound/soc/mediatek/mt8365/mt8365-reg.h

954

#define CM2_AFE_CM2_CONN_CFG1(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG1_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

956

#define CM2_AFE_CM2_CONN_CFG2(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG2_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

958

#define CM2_AFE_CM2_CONN_CFG3(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG3_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

960

#define CM2_AFE_CM2_CONN_CFG4(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG4_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

962

#define CM2_AFE_CM2_CONN_CFG5(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG5_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

964

#define CM2_AFE_CM2_CONN_CFG6(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG6_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

966

#define CM2_AFE_CM2_CONN_CFG7(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG7_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

968

#define CM2_AFE_CM2_CONN_CFG8(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG8_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

970

#define CM2_AFE_CM2_CONN_CFG9(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG9_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

972

#define CM2_AFE_CM2_CONN_CFG10(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG10_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

974

#define CM2_AFE_CM2_CONN_CFG11(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG11_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

976

#define CM2_AFE_CM2_CONN_CFG12(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG12_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

978

#define CM2_AFE_CM2_CONN_CFG13(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG13_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

980

#define CM2_AFE_CM2_CONN_CFG14(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG14_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

982

#define CM2_AFE_CM2_CONN_CFG15(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG15_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

984

#define CM2_AFE_CM2_CONN_CFG16(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG16_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

989

#define CM_AFE_CM_UPDATE_CNT1(x) FIELD_PREP(CM_AFE_CM_UPDATE_CNT1_MASK, (x))

sound/soc/mediatek/mt8365/mt8365-reg.h

991

#define CM_AFE_CM_UPDATE_CNT2(x) FIELD_PREP(CM_AFE_CM_UPDATE_CNT2_MASK, (x))

sound/soc/meson/aiu-acodec-ctrl.c

177

FIELD_PREP(CTRL_DIN_SKEW, 2));

sound/soc/meson/aiu-acodec-ctrl.c

42

FIELD_PREP(CTRL_DIN_LRCLK_SRC,

sound/soc/meson/aiu-acodec-ctrl.c

54

FIELD_PREP(CTRL_DIN_LRCLK_SRC, mux) |

sound/soc/meson/aiu-acodec-ctrl.c

55

FIELD_PREP(CTRL_BCLK_MCLK_SRC, mux));

sound/soc/meson/aiu-codec-ctrl.c

34

FIELD_PREP(CTRL_DATA_SEL, mux));

sound/soc/meson/aiu-codec-ctrl.c

46

FIELD_PREP(CTRL_CLK_SEL, 0) |

sound/soc/meson/aiu-codec-ctrl.c

47

FIELD_PREP(CTRL_DATA_SEL, 0));

sound/soc/meson/aiu-codec-ctrl.c

53

FIELD_PREP(CTRL_CLK_SEL, mux) |

sound/soc/meson/aiu-codec-ctrl.c

54

FIELD_PREP(CTRL_DATA_SEL, mux));

sound/soc/meson/aiu-encoder-i2s.c

100

FIELD_PREP(AIU_CLK_CTRL_I2S_DIV,

sound/soc/meson/aiu-encoder-i2s.c

105

FIELD_PREP(AIU_CLK_CTRL_MORE_I2S_DIV,

sound/soc/meson/aiu-encoder-i2s.c

134

FIELD_PREP(AIU_CLK_CTRL_I2S_DIV, 0));

sound/soc/meson/aiu-encoder-i2s.c

138

FIELD_PREP(AIU_CLK_CTRL_MORE_I2S_DIV,

sound/soc/meson/aiu-encoder-i2s.c

166

FIELD_PREP(AIU_CODEC_DAC_LRCLK_CTRL_DIV,

sound/soc/meson/aiu-encoder-i2s.c

261

val |= FIELD_PREP(AIU_CLK_CTRL_LRCLK_SKEW, skew);

sound/soc/meson/aiu-encoder-spdif.c

110

val |= FIELD_PREP(AIU_958_MISC_16BITS_ALIGN, 2);

sound/soc/meson/aiu-encoder-spdif.c

139

FIELD_PREP(AIU_CLK_CTRL_958_DIV,

sound/soc/meson/aiu-fifo-i2s.c

122

val = FIELD_PREP(AIU_MEM_I2S_MASKS_IRQ_BLOCK, val);

sound/soc/meson/aiu-fifo.c

117

FIELD_PREP(AIU_MEM_MASK_CH_RD, 0xff) |

sound/soc/meson/aiu-fifo.c

118

FIELD_PREP(AIU_MEM_MASK_CH_MEM, 0xff));

sound/soc/meson/axg-fifo.c

150

FIELD_PREP(CTRL0_INT_EN, irq_en));

sound/soc/meson/axg-fifo.c

192

FIELD_PREP(CTRL1_INT_CLR, mask));

sound/soc/meson/axg-fifo.c

197

FIELD_PREP(CTRL1_INT_CLR, 0));

sound/soc/meson/axg-fifo.c

262

FIELD_PREP(CTRL1_STATUS2_SEL, STATUS2_SEL_DDR_READ));

sound/soc/meson/axg-frddr.c

64

FIELD_PREP(CTRL1_FRDDR_DEPTH, val));

sound/soc/meson/axg-spdifin.c

180

FIELD_PREP(SPDIFIN_CTRL1_BASE_TIMER, rate / 1000));

sound/soc/meson/axg-spdifin.c

294

FIELD_PREP(SPDIFIN_CTRL0_STATUS_SEL, i));

sound/soc/meson/axg-toddr.c

80

FIELD_PREP(CTRL0_TODDR_TYPE, type) |

sound/soc/meson/axg-toddr.c

81

FIELD_PREP(CTRL0_TODDR_MSB_POS, TODDR_MSB_POS) |

sound/soc/meson/axg-toddr.c

82

FIELD_PREP(CTRL0_TODDR_LSB_POS, TODDR_MSB_POS - (width - 1)));

sound/soc/meson/g12a-toacodec.c

101

FIELD_PREP(CTRL0_MCLK_SEL, mux));

sound/soc/meson/g12a-tohdmitx.c

101

FIELD_PREP(CTRL0_SPDIF_SEL, mux));

sound/soc/meson/g12a-tohdmitx.c

112

FIELD_PREP(CTRL0_SPDIF_SEL, mux) |

sound/soc/meson/g12a-tohdmitx.c

113

FIELD_PREP(CTRL0_SPDIF_CLK_SEL, mux));

sound/soc/meson/g12a-tohdmitx.c

52

FIELD_PREP(CTRL0_I2S_DAT_SEL,

sound/soc/meson/g12a-tohdmitx.c

65

FIELD_PREP(CTRL0_I2S_DAT_SEL, mux) |

sound/soc/meson/g12a-tohdmitx.c

66

FIELD_PREP(CTRL0_I2S_LRCLK_SEL, mux) |

sound/soc/meson/g12a-tohdmitx.c

67

FIELD_PREP(CTRL0_I2S_BCLK_SEL, mux));

sound/soc/renesas/rcar/msiof.c

220

FIELD_PREP(SIMDR1_SYNCMD, SIMDR1_SYNCMD_LR);

sound/soc/renesas/rcar/msiof.c

222

val |= FIELD_PREP(SIMDR1_DTDL, 1);

sound/soc/renesas/rcar/msiof.c

226

val = FIELD_PREP(SIMDR2_BITLEN1, width - 1);

sound/soc/renesas/rcar/msiof.c

227

msiof_write(priv, SITMDR2, val | FIELD_PREP(SIMDR2_GRP, 1));

sound/soc/renesas/rcar/msiof.c

232

FIELD_PREP(SIMDR1_SYNCMD, SIMDR1_SYNCMD_LR);

sound/soc/renesas/rcar/msiof.c

234

val |= FIELD_PREP(SIMDR1_DTDL, 1);

sound/soc/renesas/rcar/msiof.c

238

val = FIELD_PREP(SIMDR2_BITLEN1, width - 1);

sound/soc/renesas/rcar/msiof.c

239

msiof_write(priv, SIRMDR2, val | FIELD_PREP(SIMDR2_GRP, 1));

sound/soc/renesas/rcar/msiof.c

244

FIELD_PREP(SIFCTR_TFWM, SIFCTR_TFWM_1) |

sound/soc/renesas/rcar/msiof.c

245

FIELD_PREP(SIFCTR_RFWM, SIFCTR_RFWM_1));

sound/soc/rockchip/rockchip_spdif.h

17

#define SPDIF_CFGR_CLK_DIV(x) FIELD_PREP(SPDIF_CFGR_CLK_DIV_MASK, x-1)

sound/soc/rockchip/rockchip_spdif.h

20

#define SPDIF_CFGR_CLR_EN FIELD_PREP(SPDIF_CFGR_CLR_MASK, 1)

sound/soc/rockchip/rockchip_spdif.h

21

#define SPDIF_CFGR_CLR_DIS FIELD_PREP(SPDIF_CFGR_CLR_MASK, 0)

sound/soc/rockchip/rockchip_spdif.h

24

#define SPDIF_CFGR_CSE_EN FIELD_PREP(SPDIF_CFGR_CSE_MASK, 1)

sound/soc/rockchip/rockchip_spdif.h

25

#define SPDIF_CFGR_CSE_DIS FIELD_PREP(SPDIF_CFGR_CSE_MASK, 0)

sound/soc/rockchip/rockchip_spdif.h

28

#define SPDIF_CFGR_ADJ_LEFT_J FIELD_PREP(SPDIF_CFGR_ADJ_MASK, 1)

sound/soc/rockchip/rockchip_spdif.h

29

#define SPDIF_CFGR_ADJ_RIGHT_J FIELD_PREP(SPDIF_CFGR_ADJ_MASK, 0)

sound/soc/rockchip/rockchip_spdif.h

32

#define SPDIF_CFGR_HALFWORD_DISABLE FIELD_PREP(SPDIF_CFGR_HALFWORD_MASK, 0)

sound/soc/rockchip/rockchip_spdif.h

33

#define SPDIF_CFGR_HALFWORD_ENABLE FIELD_PREP(SPDIF_CFGR_HALFWORD_MASK, 1)

sound/soc/rockchip/rockchip_spdif.h

36

#define SPDIF_CFGR_VDW(x) FIELD_PREP(SDPIF_CFGR_VDW_MASK, x)

sound/soc/rockchip/rockchip_spdif.h

47

#define SPDIF_DMACR_TDE_DISABLE FIELD_PREP(SPDIF_DMACR_TDE_MASK, 0)

sound/soc/rockchip/rockchip_spdif.h

48

#define SPDIF_DMACR_TDE_ENABLE FIELD_PREP(SPDIF_DMACR_TDE_MASK, 1)

sound/soc/rockchip/rockchip_spdif.h

51

#define SPDIF_DMACR_TDL(x) FIELD_PREP(SPDIF_DMACR_TDL_MASK, x)

sound/soc/rockchip/rockchip_spdif.h

58

#define SPDIF_XFER_TXS_STOP FIELD_PREP(SPDIF_XFER_TXS_MASK, 0)

sound/soc/rockchip/rockchip_spdif.h

59

#define SPDIF_XFER_TXS_START FIELD_PREP(SPDIF_XFER_TXS_MASK, 1)

sound/soc/spacemit/k1_i2s.c

20

#define SSCR_DW_8BYTE FIELD_PREP(SSCR_FIELD_DSS, 0x7)

sound/soc/spacemit/k1_i2s.c

21

#define SSCR_DW_16BYTE FIELD_PREP(SSCR_FIELD_DSS, 0xf)

sound/soc/spacemit/k1_i2s.c

22

#define SSCR_DW_18BYTE FIELD_PREP(SSCR_FIELD_DSS, 0x11)

sound/soc/spacemit/k1_i2s.c

224

sspsp_val |= FIELD_PREP(SSPSP_FIELD_SFRMWDTH, 0x10);

sound/soc/spacemit/k1_i2s.c

23

#define SSCR_DW_32BYTE FIELD_PREP(SSCR_FIELD_DSS, 0x1f)

sound/soc/spacemit/k1_i2s.c

231

sspsp_val |= FIELD_PREP(SSPSP_FIELD_SFRMWDTH, 0x1);

sound/soc/spacemit/k1_i2s.c

96

ssfcr_val = FIELD_PREP(SSFCR_FIELD_TFT, 5) |

sound/soc/spacemit/k1_i2s.c

97

FIELD_PREP(SSFCR_FIELD_RFT, 5) |

sound/soc/stm/stm32_sai.c

123

writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base);

sound/soc/stm/stm32_sai.c

93

writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base);

tools/arch/arm64/include/asm/sysreg.h

1193

FIELD_PREP(reg##_##field##_MASK, val)

tools/arch/arm64/include/asm/sysreg.h

1196

FIELD_PREP(reg##_##field##_MASK, \

tools/testing/selftests/kvm/arm64/set_id_regs.c

511

val |= FIELD_PREP(ID_AA64PFR0_EL1_MPAM_MASK, 0);

tools/testing/selftests/kvm/arm64/set_id_regs.c

520

val |= FIELD_PREP(ID_AA64PFR0_EL1_MPAM_MASK, 1);

tools/testing/selftests/kvm/arm64/set_id_regs.c

529

val |= FIELD_PREP(ID_AA64PFR0_EL1_MPAM_MASK, 2);

tools/testing/selftests/kvm/arm64/set_id_regs.c

548

val |= FIELD_PREP(ID_AA64PFR1_EL1_MPAM_frac_MASK, 0);

tools/testing/selftests/kvm/arm64/set_id_regs.c

557

val |= FIELD_PREP(ID_AA64PFR1_EL1_MPAM_frac_MASK, 1);

tools/testing/selftests/kvm/arm64/set_id_regs.c

566

val |= FIELD_PREP(ID_AA64PFR1_EL1_MPAM_frac_MASK, 2);

tools/testing/selftests/kvm/arm64/set_id_regs.c

622

val |= FIELD_PREP(ID_AA64PFR1_EL1_MTE_frac_MASK, 0);

tools/testing/selftests/kvm/arm64/vgic_init.c

373

(FIELD_PREP(KVM_DEV_ARM_VGIC_OFFSET_MASK, offset) | \

tools/testing/selftests/kvm/arm64/vgic_init.c

374

FIELD_PREP(KVM_DEV_ARM_VGIC_CPUID_MASK, cpu))