arch/alpha/include/uapi/asm/compiler.h

14

# define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift)

arch/alpha/include/uapi/asm/compiler.h

15

# define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift)

arch/alpha/include/uapi/asm/compiler.h

16

# define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift)

arch/alpha/include/uapi/asm/compiler.h

17

# define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift)

arch/alpha/include/uapi/asm/compiler.h

18

# define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift)

arch/alpha/include/uapi/asm/compiler.h

19

# define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift)

arch/alpha/include/uapi/asm/compiler.h

22

# define __kernel_insbl(val, shift) \

arch/alpha/include/uapi/asm/compiler.h

24

__asm__("insbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \

arch/alpha/include/uapi/asm/compiler.h

26

# define __kernel_inswl(val, shift) \

arch/alpha/include/uapi/asm/compiler.h

28

__asm__("inswl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \

arch/alpha/include/uapi/asm/compiler.h

30

# define __kernel_insql(val, shift) \

arch/alpha/include/uapi/asm/compiler.h

32

__asm__("insql %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \

arch/alpha/include/uapi/asm/compiler.h

34

# define __kernel_inslh(val, shift) \

arch/alpha/include/uapi/asm/compiler.h

36

__asm__("inslh %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \

arch/alpha/include/uapi/asm/compiler.h

38

# define __kernel_extbl(val, shift) \

arch/alpha/include/uapi/asm/compiler.h

40

__asm__("extbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \

arch/alpha/include/uapi/asm/compiler.h

42

# define __kernel_extwl(val, shift) \

arch/alpha/include/uapi/asm/compiler.h

44

__asm__("extwl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \

arch/alpha/kernel/core_cia.c

215

int shift;

arch/alpha/kernel/core_cia.c

221

shift = (where & 3) * 8;

arch/alpha/kernel/core_cia.c

223

*value = conf_read(addr, type1) >> (shift);

arch/alpha/kernel/core_t2.c

289

int shift;

arch/alpha/kernel/core_t2.c

296

shift = (where & 3) * 8;

arch/alpha/kernel/core_t2.c

298

*value = conf_read(addr, type1) >> (shift);

arch/alpha/kernel/osf_sys.c

1163

int shift; /* interval duration (s) (shift) (ro) */

arch/alpha/kernel/pci-sysfs.c

40

int shift = sparse ? 5 : 0;

arch/alpha/kernel/pci-sysfs.c

44

size = ((pci_resource_len(pdev, num) - 1) >> (PAGE_SHIFT - shift)) + 1;

arch/arc/kernel/unwind.c

453

unsigned int shift;

arch/arc/kernel/unwind.c

455

for (shift = 0, value = 0; cur < end; shift += 7) {

arch/arc/kernel/unwind.c

456

if (shift + 7 > 8 * sizeof(value)

arch/arc/kernel/unwind.c

457

&& (*cur & 0x7fU) >= (1U << (8 * sizeof(value) - shift))) {

arch/arc/kernel/unwind.c

461

value |= (uleb128_t) (*cur & 0x7f) << shift;

arch/arc/kernel/unwind.c

474

unsigned int shift;

arch/arc/kernel/unwind.c

476

for (shift = 0, value = 0; cur < end; shift += 7) {

arch/arc/kernel/unwind.c

477

if (shift + 7 > 8 * sizeof(value)

arch/arc/kernel/unwind.c

478

&& (*cur & 0x7fU) >= (1U << (8 * sizeof(value) - shift))) {

arch/arc/kernel/unwind.c

482

value |= (sleb128_t) (*cur & 0x7f) << shift;

arch/arc/kernel/unwind.c

484

value |= -(*cur++ & 0x40) << shift;

arch/arm/kernel/module.c

238

shift = get_group_rem(group, &offset);

arch/arm/kernel/module.c

239

if (shift < 24) {

arch/arm/kernel/module.c

240

offset >>= 24 - shift;

arch/arm/kernel/module.c

241

offset |= (shift + 8) << 7;

arch/arm/kernel/module.c

63

u32 shift;

arch/arm/kernel/module.c

65

shift = val ? (31 - __fls(val)) & ~1 : 32;

arch/arm/kernel/module.c

69

val &= 0xffffff >> shift;

arch/arm/kernel/module.c

71

return shift;

arch/arm/kernel/module.c

90

u32 shift, group = 1;

arch/arm/lib/delay.c

40

static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)

arch/arm/lib/delay.c

42

return (cyc * mult) >> shift;

arch/arm/mach-bcm/bcm63xx_pmb.c

62

u32 shift, u32 mask, u32 cond)

arch/arm/mach-bcm/bcm63xx_pmb.c

76

} while (((*val >> shift) & mask) != cond);

arch/arm/mach-omap1/omap-dma.c

80

int shift = ((req - 1) % 5) * 6;

arch/arm/mach-omap1/omap-dma.c

84

l &= ~(0x3f << shift);

arch/arm/mach-omap1/omap-dma.c

85

l |= (dev - 1) << shift;

arch/arm/mach-omap2/prm.h

140

int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);

arch/arm/mach-omap2/prm.h

141

int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,

arch/arm/mach-omap2/prm.h

143

int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,

arch/arm/mach-omap2/prm.h

154

int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);

arch/arm/mach-omap2/prm.h

155

int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,

arch/arm/mach-omap2/prm.h

157

int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);

arch/arm/mach-omap2/prm2xxx_3xxx.c

33

int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)

arch/arm/mach-omap2/prm2xxx_3xxx.c

36

(1 << shift));

arch/arm/mach-omap2/prm2xxx_3xxx.c

53

int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)

arch/arm/mach-omap2/prm2xxx_3xxx.c

57

mask = 1 << shift;

arch/arm/mach-omap2/prm2xxx_3xxx.h

100

int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);

arch/arm/mach-omap2/prm2xxx_3xxx.h

101

int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod,

arch/arm/mach-omap2/prm33xx.c

111

static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part,

arch/arm/mach-omap2/prm33xx.c

119

if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0)

arch/arm/mach-omap2/prm33xx.c

126

mask = 1 << shift;

arch/arm/mach-omap2/prm33xx.c

56

static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst,

arch/arm/mach-omap2/prm33xx.c

62

v &= 1 << shift;

arch/arm/mach-omap2/prm33xx.c

63

v >>= shift;

arch/arm/mach-omap2/prm33xx.c

82

static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst,

arch/arm/mach-omap2/prm33xx.c

85

u32 mask = 1 << shift;

arch/arm/mach-omap2/prm_common.c

407

int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)

arch/arm/mach-omap2/prm_common.c

415

return prm_ll_data->assert_hardreset(shift, part, prm_mod, offset);

arch/arm/mach-omap2/prm_common.c

429

int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,

arch/arm/mach-omap2/prm_common.c

438

return prm_ll_data->deassert_hardreset(shift, st_shift, part, prm_mod,

arch/arm/mach-omap2/prm_common.c

451

int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)

arch/arm/mach-omap2/prm_common.c

459

return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset);

arch/arm/mach-omap2/prminst44xx.c

105

v &= 1 << shift;

arch/arm/mach-omap2/prminst44xx.c

106

v >>= shift;

arch/arm/mach-omap2/prminst44xx.c

123

int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,

arch/arm/mach-omap2/prminst44xx.c

126

u32 mask = 1 << shift;

arch/arm/mach-omap2/prminst44xx.c

152

int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst,

arch/arm/mach-omap2/prminst44xx.c

156

u32 mask = 1 << shift;

arch/arm/mach-omap2/prminst44xx.c

160

if (omap4_prminst_is_hardreset_asserted(shift, part, inst,

arch/arm/mach-omap2/prminst44xx.c

99

int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,

arch/arm/mach-omap2/prminst44xx.h

27

extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,

arch/arm/mach-omap2/prminst44xx.h

29

extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,

arch/arm/mach-omap2/prminst44xx.h

31

int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part,

arch/arm/mach-omap2/vc.c

529

static u32 omap4_usec_to_val_scrm(u32 usec, int shift, u32 mask)

arch/arm/mach-omap2/vc.c

533

val = omap_usec_to_32k(usec) << shift;

arch/arm/mach-s3c/gpio-samsung.c

135

unsigned int shift = (off & 7) * 4;

arch/arm/mach-s3c/gpio-samsung.c

143

cfg <<= shift;

arch/arm/mach-s3c/gpio-samsung.c

147

con &= ~(0xf << shift);

arch/arm/mach-s3c/gpio-samsung.c

170

unsigned int shift = (off & 7) * 4;

arch/arm/mach-s3c/gpio-samsung.c

177

con >>= shift;

arch/arm/mach-s3c/gpio-samsung.c

44

int shift = off * 2;

arch/arm/mach-s3c/gpio-samsung.c

48

pup &= ~(3 << shift);

arch/arm/mach-s3c/gpio-samsung.c

49

pup |= pull << shift;

arch/arm/mach-s3c/gpio-samsung.c

59

int shift = off * 2;

arch/arm/mach-s3c/gpio-samsung.c

62

pup >>= shift;

arch/arm/mach-s3c/gpio-samsung.c

72

unsigned int shift = off * 2;

arch/arm/mach-s3c/gpio-samsung.c

80

cfg <<= shift;

arch/arm/mach-s3c/gpio-samsung.c

84

con &= ~(0x3 << shift);

arch/arm/mach-s3c/s3c64xx.c

273

int shift;

arch/arm/mach-s3c/s3c64xx.c

317

shift = (offs / 2) * 4;

arch/arm/mach-s3c/s3c64xx.c

319

shift = ((offs - 16) / 2) * 4;

arch/arm/mach-s3c/s3c64xx.c

320

mask = 0x7 << shift;

arch/arm/mach-s3c/s3c64xx.c

324

ctrl |= newvalue << shift;

arch/arm/mach-spear/time.c

151

.shift = 0, /* to be computed */

arch/arm/plat-orion/mpp.c

49

int shift, gpio_mode;

arch/arm/plat-orion/mpp.c

63

shift = (num & 7) << 2;

arch/arm/plat-orion/mpp.c

64

mpp_ctrl[num / 8] &= ~(0xf << shift);

arch/arm/plat-orion/mpp.c

65

mpp_ctrl[num / 8] |= sel << shift;

arch/arm/vfp/vfp.h

11

if (shift) {

arch/arm/vfp/vfp.h

12

if (shift < 32)

arch/arm/vfp/vfp.h

13

val = val >> shift | ((val << (32 - shift)) != 0);

arch/arm/vfp/vfp.h

20

static inline u64 vfp_shiftright64jamming(u64 val, unsigned int shift)

arch/arm/vfp/vfp.h

22

if (shift) {

arch/arm/vfp/vfp.h

23

if (shift < 64)

arch/arm/vfp/vfp.h

24

val = val >> shift | ((val << (64 - shift)) != 0);

arch/arm/vfp/vfp.h

9

static inline u32 vfp_shiftright32jamming(u32 val, unsigned int shift)

arch/arm/vfp/vfpdouble.c

100

significand <<= shift;

arch/arm/vfp/vfpdouble.c

529

int shift = 1023 + 63 - vdm.exponent;

arch/arm/vfp/vfpdouble.c

535

d = (vdm.significand << 1) >> shift;

arch/arm/vfp/vfpdouble.c

536

rem = vdm.significand << (65 - shift);

arch/arm/vfp/vfpdouble.c

611

int shift = 1023 + 63 - vdm.exponent; /* 58 */

arch/arm/vfp/vfpdouble.c

614

d = (vdm.significand << 1) >> shift;

arch/arm/vfp/vfpdouble.c

615

rem = vdm.significand << (65 - shift);

arch/arm/vfp/vfpdouble.c

73

int exponent, shift, underflow;

arch/arm/vfp/vfpdouble.c

95

shift = 32 - fls(significand >> 32);

arch/arm/vfp/vfpdouble.c

96

if (shift == 32)

arch/arm/vfp/vfpdouble.c

97

shift = 64 - fls(significand);

arch/arm/vfp/vfpdouble.c

98

if (shift) {

arch/arm/vfp/vfpdouble.c

99

exponent -= shift;

arch/arm/vfp/vfpsingle.c

102

shift = 32 - fls(significand);

arch/arm/vfp/vfpsingle.c

103

if (shift < 32 && shift) {

arch/arm/vfp/vfpsingle.c

104

exponent -= shift;

arch/arm/vfp/vfpsingle.c

105

significand <<= shift;

arch/arm/vfp/vfpsingle.c

571

int shift = 127 + 31 - vsm.exponent;

arch/arm/vfp/vfpsingle.c

577

d = (vsm.significand << 1) >> shift;

arch/arm/vfp/vfpsingle.c

578

rem = vsm.significand << (33 - shift);

arch/arm/vfp/vfpsingle.c

656

int shift = 127 + 31 - vsm.exponent;

arch/arm/vfp/vfpsingle.c

660

d = (vsm.significand << 1) >> shift;

arch/arm/vfp/vfpsingle.c

661

rem = vsm.significand << (33 - shift);

arch/arm/vfp/vfpsingle.c

76

int exponent, shift, underflow;

arch/arm/xen/enlighten.c

110

now.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);

arch/arm64/include/asm/cpufeature.h

553

return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);

arch/arm64/include/asm/cpufeature.h

579

return (s64)cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width, ftrp->sign);

arch/arm64/include/asm/cpufeature.h

67

u8 shift;

arch/arm64/include/asm/hugetlb.h

35

pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags);

arch/arm64/include/asm/insn.h

631

int imm, int shift,

arch/arm64/include/asm/insn.h

637

int shift,

arch/arm64/include/asm/insn.h

658

int shift,

arch/arm64/include/asm/kernel-pgtable.h

45

#define SPAN_NR_ENTRIES(vstart, vend, shift) \

arch/arm64/include/asm/kernel-pgtable.h

46

((((vend) - 1) >> (shift)) - ((vstart) >> (shift)) + 1)

arch/arm64/include/asm/kvm_nested.h

252

u8 shift = 0; \

arch/arm64/include/asm/kvm_nested.h

257

shift = 4; \

arch/arm64/include/asm/kvm_nested.h

260

shift = (l) == 2 ? 5 : 7; \

arch/arm64/include/asm/kvm_nested.h

263

shift = 5; \

arch/arm64/include/asm/kvm_nested.h

268

shift; \

arch/arm64/include/asm/kvm_nested.h

274

int shift;

arch/arm64/include/asm/kvm_nested.h

280

shift = 12;

arch/arm64/include/asm/kvm_nested.h

283

shift = 14;

arch/arm64/include/asm/kvm_nested.h

287

shift = 16;

arch/arm64/include/asm/kvm_nested.h

291

base = (val & GENMASK(36, 0)) << shift;

arch/arm64/include/asm/kvm_nested.h

298

*range = __TLBI_RANGE_PAGES(num, scale) << shift;

arch/arm64/include/asm/tlbflush.h

437

int shift = lpa2 ? 16 : PAGE_SHIFT; \

arch/arm64/include/asm/tlbflush.h

455

addr = __TLBI_VADDR_RANGE(__flush_start >> shift, asid, \

arch/arm64/kernel/cpufeature.c

1050

ftrp->shift + ftrp->width - 1,

arch/arm64/kernel/cpufeature.c

1051

ftrp->shift, str,

arch/arm64/kernel/cpufeature.c

1057

ftrp->shift + ftrp->width - 1,

arch/arm64/kernel/cpufeature.c

1058

ftrp->shift);

arch/arm64/kernel/cpufeature.c

1260

if (ftrp->shift == field) {

arch/arm64/kernel/cpufeature.c

198

.shift = SHIFT, \

arch/arm64/kernel/cpufeature.c

925

reg |= (ftr_val << ftrp->shift) & mask;

arch/arm64/kernel/cpufeature.c

970

unsigned int shift = ftr_reg->ftr_bits[j].shift;

arch/arm64/kernel/cpufeature.c

973

WARN((shift + width) > 64,

arch/arm64/kernel/cpufeature.c

975

ftr_reg->name, shift);

arch/arm64/kernel/cpufeature.c

984

prev_shift = ftr_reg->ftr_bits[j - 1].shift;

arch/arm64/kernel/cpufeature.c

985

WARN((shift + width) > prev_shift,

arch/arm64/kernel/cpufeature.c

987

ftr_reg->name, shift);

arch/arm64/kernel/pi/idreg-override.c

302

u64 shift = reg->fields[f].shift;

arch/arm64/kernel/pi/idreg-override.c

304

u64 mask = GENMASK_ULL(shift + width - 1, shift);

arch/arm64/kernel/pi/idreg-override.c

324

override->val |= (v << shift) & mask;

arch/arm64/kernel/pi/idreg-override.c

33

u8 shift;

arch/arm64/kernel/pi/idreg-override.c

39

#define FIELD(n, s, f) { .name = n, .shift = s, .width = 4, .filter = f }

arch/arm64/kvm/config.c

1336

u64 regfld = (regval >> map->shift) & GENMASK(map->width - 1, 0);

arch/arm64/kvm/config.c

37

u8 shift;

arch/arm64/kvm/config.c

69

.shift = id ##_## fld ## _SHIFT, \

arch/arm64/kvm/hyp/nvhe/sys_regs.c

198

int shift = restrictions[i].shift;

arch/arm64/kvm/hyp/nvhe/sys_regs.c

202

u64 mask = GENMASK_ULL(width + shift - 1, shift);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

203

u64 sys_val = (sys_reg_val & mask) >> shift;

arch/arm64/kvm/hyp/nvhe/sys_regs.c

207

val |= (sign ? min_signed : 0) << shift;

arch/arm64/kvm/hyp/nvhe/sys_regs.c

209

val |= max(sys_val, pvm_max) << shift;

arch/arm64/kvm/hyp/nvhe/sys_regs.c

211

val |= min(sys_val, pvm_max) << shift;

arch/arm64/kvm/hyp/nvhe/sys_regs.c

33

u8 shift;

arch/arm64/kvm/hyp/nvhe/sys_regs.c

42

.shift = id##_##fld##_SHIFT, \

arch/arm64/kvm/hyp/nvhe/timer-sr.c

25

u64 set, clr, shift = 0;

arch/arm64/kvm/hyp/nvhe/timer-sr.c

28

shift = 10;

arch/arm64/kvm/hyp/nvhe/timer-sr.c

31

set = (CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN) << shift;

arch/arm64/kvm/hyp/pgtable.c

50

u64 shift = kvm_granule_shift(level);

arch/arm64/kvm/hyp/pgtable.c

53

return (data->addr >> shift) & mask;

arch/arm64/kvm/hyp/pgtable.c

58

u64 shift = kvm_granule_shift(pgt->start_level - 1); /* May underflow */

arch/arm64/kvm/hyp/pgtable.c

61

return (addr & mask) >> shift;

arch/arm64/kvm/nested.c

484

static u8 pgshift_level_to_ttl(u16 shift, u8 level)

arch/arm64/kvm/nested.c

488

switch(shift) {

arch/arm64/kvm/pauth.c

129

int shift;

arch/arm64/kvm/pauth.c

133

shift = 53;

arch/arm64/kvm/pauth.c

136

shift = 61;

arch/arm64/kvm/pauth.c

140

error_code = 2 << shift;

arch/arm64/kvm/pauth.c

142

error_code = 1 << shift;

arch/arm64/kvm/sys_regs.c

1067

u64 pmceid, mask, shift;

arch/arm64/kvm/sys_regs.c

1074

get_access_mask(r, &mask, &shift);

arch/arm64/kvm/sys_regs.c

1078

pmceid >>= shift;

arch/arm64/kvm/sys_regs.c

1663

switch (kvm_ftr.shift) {

arch/arm64/kvm/sys_regs.c

1673

if (kvm_ftr.shift == ID_DFR0_EL1_PerfMon_SHIFT)

arch/arm64/kvm/sys_regs.c

533

static void get_access_mask(const struct sys_reg_desc *r, u64 *mask, u64 *shift)

arch/arm64/kvm/sys_regs.c

538

*shift = 0;

arch/arm64/kvm/sys_regs.c

542

*shift = 32;

arch/arm64/kvm/sys_regs.c

546

*shift = 0;

arch/arm64/kvm/sys_regs.c

561

u64 val, mask, shift;

arch/arm64/kvm/sys_regs.c

565

get_access_mask(r, &mask, &shift);

arch/arm64/kvm/sys_regs.c

574

val |= (p->regval & (mask >> shift)) << shift;

arch/arm64/kvm/sys_regs.c

585

u64 mask, shift;

arch/arm64/kvm/sys_regs.c

590

get_access_mask(r, &mask, &shift);

arch/arm64/kvm/sys_regs.c

591

p->regval = (vcpu_read_sys_reg(vcpu, r->reg) & mask) >> shift;

arch/arm64/kvm/sys_regs.c

784

u64 mask, shift, val;

arch/arm64/kvm/sys_regs.c

786

get_access_mask(rd, &mask, &shift);

arch/arm64/kvm/sys_regs.c

790

val |= (p->regval & (mask >> shift)) << shift;

arch/arm64/kvm/sys_regs.c

799

u64 mask, shift;

arch/arm64/kvm/sys_regs.c

801

get_access_mask(rd, &mask, &shift);

arch/arm64/kvm/sys_regs.c

802

p->regval = (*dbg_reg & mask) >> shift;

arch/arm64/kvm/vgic/vgic-its.c

769

static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size)

arch/arm64/kvm/vgic/vgic-its.c

771

return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1);

arch/arm64/lib/csum.c

114

shift = len * -8;

arch/arm64/lib/csum.c

116

data = (data << shift) >> shift;

arch/arm64/lib/csum.c

118

data = (data >> shift) << shift;

arch/arm64/lib/csum.c

23

unsigned int offset, shift, sum;

arch/arm64/lib/csum.c

48

shift = offset * 8;

arch/arm64/lib/csum.c

51

data = (data >> shift) << shift;

arch/arm64/lib/csum.c

53

data = (data << shift) >> shift;

arch/arm64/lib/insn.c

103

if (aarch64_get_imm_shift_mask(type, &mask, &shift) < 0) {

arch/arm64/lib/insn.c

110

return (insn >> shift) & mask;

arch/arm64/lib/insn.c

1126

int shift,

arch/arm64/lib/insn.c

1164

if (shift & ~(SZ_32 - 1)) {

arch/arm64/lib/insn.c

1166

shift);

arch/arm64/lib/insn.c

117

int shift;

arch/arm64/lib/insn.c

1172

if (shift & ~(SZ_64 - 1)) {

arch/arm64/lib/insn.c

1174

shift);

arch/arm64/lib/insn.c

1190

return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_6, insn, shift);

arch/arm64/lib/insn.c

124

shift = 0;

arch/arm64/lib/insn.c

133

if (aarch64_get_imm_shift_mask(type, &mask, &shift) < 0) {

arch/arm64/lib/insn.c

141

insn &= ~(mask << shift);

arch/arm64/lib/insn.c

142

insn |= (imm & mask) << shift;

arch/arm64/lib/insn.c

150

int shift;

arch/arm64/lib/insn.c

155

shift = 0;

arch/arm64/lib/insn.c

158

shift = 5;

arch/arm64/lib/insn.c

162

shift = 10;

arch/arm64/lib/insn.c

165

shift = 16;

arch/arm64/lib/insn.c

173

return (insn >> shift) & GENMASK(4, 0);

arch/arm64/lib/insn.c

180

int shift;

arch/arm64/lib/insn.c

193

shift = 0;

arch/arm64/lib/insn.c

196

shift = 5;

arch/arm64/lib/insn.c

200

shift = 10;

arch/arm64/lib/insn.c

204

shift = 16;

arch/arm64/lib/insn.c

212

insn &= ~(GENMASK(4, 0) << shift);

arch/arm64/lib/insn.c

213

insn |= reg << shift;

arch/arm64/lib/insn.c

28

int shift;

arch/arm64/lib/insn.c

33

shift = 0;

arch/arm64/lib/insn.c

37

shift = 5;

arch/arm64/lib/insn.c

41

shift = 5;

arch/arm64/lib/insn.c

418

u32 shift;

arch/arm64/lib/insn.c

425

shift = aarch64_insn_ldst_size[size];

arch/arm64/lib/insn.c

426

if (imm & ~(BIT(12 + shift) - BIT(shift))) {

arch/arm64/lib/insn.c

431

imm >>= shift;

arch/arm64/lib/insn.c

45

shift = 5;

arch/arm64/lib/insn.c

488

int shift;

arch/arm64/lib/insn.c

49

shift = 10;

arch/arm64/lib/insn.c

515

shift = 2;

arch/arm64/lib/insn.c

523

shift = 3;

arch/arm64/lib/insn.c

53

shift = 12;

arch/arm64/lib/insn.c

541

offset >> shift);

arch/arm64/lib/insn.c

57

shift = 15;

arch/arm64/lib/insn.c

62

shift = 10;

arch/arm64/lib/insn.c

66

shift = 16;

arch/arm64/lib/insn.c

70

shift = 22;

arch/arm64/lib/insn.c

77

*shiftp = shift;

arch/arm64/lib/insn.c

875

int imm, int shift,

arch/arm64/lib/insn.c

903

if (shift != 0 && shift != 16) {

arch/arm64/lib/insn.c

905

shift);

arch/arm64/lib/insn.c

911

if (shift != 0 && shift != 16 && shift != 32 && shift != 48) {

arch/arm64/lib/insn.c

913

shift);

arch/arm64/lib/insn.c

92

int shift;

arch/arm64/lib/insn.c

922

insn |= (shift >> 4) << 21;

arch/arm64/lib/insn.c

932

int shift,

arch/arm64/lib/insn.c

958

if (shift & ~(SZ_32 - 1)) {

arch/arm64/lib/insn.c

96

shift = 0;

arch/arm64/lib/insn.c

960

shift);

arch/arm64/lib/insn.c

966

if (shift & ~(SZ_64 - 1)) {

arch/arm64/lib/insn.c

968

shift);

arch/arm64/lib/insn.c

984

return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_6, insn, shift);

arch/arm64/mm/fixmap.c

29

#define __BM_TABLE_IDX(addr, shift) \

arch/arm64/mm/fixmap.c

30

(((addr) >> (shift)) - (FIXADDR_TOT_START >> (shift)))

arch/arm64/mm/hugetlbpage.c

344

pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags)

arch/arm64/mm/hugetlbpage.c

346

size_t pagesize = 1UL << shift;

arch/arm64/mm/kasan_init.c

193

int shift = (ARM64_HW_PGTABLE_LEVELS(vabits_actual) - 1) * PTDESC_TABLE_SHIFT;

arch/arm64/mm/kasan_init.c

195

return (addr % (PAGE_SIZE << shift)) == 0;

arch/arm64/mm/kasan_init.c

248

int shift = (ARM64_HW_PGTABLE_LEVELS(vabits) - 1) * PTDESC_TABLE_SHIFT;

arch/arm64/mm/kasan_init.c

250

return (addr & ~_PAGE_OFFSET(vabits)) >> (shift + PAGE_SHIFT);

arch/arm64/mm/kasan_init.c

272

int shift = (ARM64_HW_PGTABLE_LEVELS(vabits_actual) - 2) * PTDESC_TABLE_SHIFT;

arch/arm64/mm/kasan_init.c

274

return (addr >> (shift + PAGE_SHIFT)) % PTRS_PER_PTE;

arch/arm64/net/bpf_jit.h

202

#define A64_LSL(sf, Rd, Rn, shift) ({ \

arch/arm64/net/bpf_jit.h

204

A64_UBFM(sf, Rd, Rn, (unsigned)-(shift) % sz, sz - 1 - (shift)); \

arch/arm64/net/bpf_jit.h

207

#define A64_LSR(sf, Rd, Rn, shift) A64_UBFM(sf, Rd, Rn, shift, (sf) ? 63 : 31)

arch/arm64/net/bpf_jit.h

209

#define A64_ASR(sf, Rd, Rn, shift) A64_SBFM(sf, Rd, Rn, shift, (sf) ? 63 : 31)

arch/arm64/net/bpf_jit.h

221

#define A64_MOVEW(sf, Rd, imm16, shift, type) \

arch/arm64/net/bpf_jit.h

222

aarch64_insn_gen_movewide(Rd, imm16, shift, \

arch/arm64/net/bpf_jit.h

227

#define A64_MOVN(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, INVERSE)

arch/arm64/net/bpf_jit.h

228

#define A64_MOVZ(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, ZERO)

arch/arm64/net/bpf_jit.h

229

#define A64_MOVK(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, KEEP)

arch/arm64/net/bpf_jit_comp.c

160

int shift;

arch/arm64/net/bpf_jit_comp.c

166

shift = max(round_down((inverse ? (fls64(rev_tmp) - 1) :

arch/arm64/net/bpf_jit_comp.c

169

emit(A64_MOVN(1, reg, (rev_tmp >> shift) & 0xffff, shift), ctx);

arch/arm64/net/bpf_jit_comp.c

171

emit(A64_MOVZ(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx);

arch/arm64/net/bpf_jit_comp.c

172

shift -= 16;

arch/arm64/net/bpf_jit_comp.c

173

while (shift >= 0) {

arch/arm64/net/bpf_jit_comp.c

174

if (((nrm_tmp >> shift) & 0xffff) != (inverse ? 0xffff : 0x0000))

arch/arm64/net/bpf_jit_comp.c

175

emit(A64_MOVK(1, reg, (nrm_tmp >> shift) & 0xffff, shift), ctx);

arch/arm64/net/bpf_jit_comp.c

176

shift -= 16;

arch/arm64/net/bpf_jit_comp.c

201

int shift = 0;

arch/arm64/net/bpf_jit_comp.c

203

emit(A64_MOVN(1, reg, ~tmp & 0xffff, shift), ctx);

arch/arm64/net/bpf_jit_comp.c

204

while (shift < 32) {

arch/arm64/net/bpf_jit_comp.c

206

shift += 16;

arch/arm64/net/bpf_jit_comp.c

207

emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);

arch/loongarch/include/asm/cmpxchg.h

144

unsigned int shift;

arch/loongarch/include/asm/cmpxchg.h

158

shift = (unsigned long)ptr & 0x3;

arch/loongarch/include/asm/cmpxchg.h

159

shift *= BITS_PER_BYTE;

arch/loongarch/include/asm/cmpxchg.h

160

old <<= shift;

arch/loongarch/include/asm/cmpxchg.h

161

new <<= shift;

arch/loongarch/include/asm/cmpxchg.h

162

mask <<= shift;

arch/loongarch/include/asm/cmpxchg.h

186

return (old32 & mask) >> shift;

arch/loongarch/include/asm/cmpxchg.h

45

unsigned int shift;

arch/loongarch/include/asm/cmpxchg.h

58

shift = (unsigned long)ptr & 0x3;

arch/loongarch/include/asm/cmpxchg.h

59

shift *= BITS_PER_BYTE;

arch/loongarch/include/asm/cmpxchg.h

60

mask <<= shift;

arch/loongarch/include/asm/cmpxchg.h

75

: "ZC" (*ptr32), "Jr" (mask), "Jr" (val << shift)

arch/loongarch/include/asm/cmpxchg.h

78

return (old32 & mask) >> shift;

arch/loongarch/lib/csum.c

107

shift = len * -8;

arch/loongarch/lib/csum.c

108

data = (data << shift) >> shift;

arch/loongarch/lib/csum.c

25

unsigned int offset, shift, sum;

arch/loongarch/lib/csum.c

50

shift = offset * 8;

arch/loongarch/lib/csum.c

52

data = (data >> shift) << shift;

arch/m68k/coldfire/pit.c

90

.shift = 32,

arch/m68k/emu/nfblock.c

65

int dir, len, shift;

arch/m68k/emu/nfblock.c

69

shift = dev->bshift;

arch/m68k/emu/nfblock.c

73

nfhd_read_write(dev->id, 0, dir, sec >> shift, len >> shift,

arch/m68k/math-emu/multi_arith.h

246

int shift)

arch/m68k/math-emu/multi_arith.h

250

switch (shift) {

arch/m68k/math-emu/multi_arith.h

67

int shift;

arch/m68k/math-emu/multi_arith.h

70

asm ("bfffo %1{#0,#32},%0" : "=d" (shift) : "dm" (reg->mant.m32[0]));

arch/m68k/math-emu/multi_arith.h

71

reg->mant.m32[0] = (reg->mant.m32[0] << shift) | (reg->mant.m32[1] >> (32 - shift));

arch/m68k/math-emu/multi_arith.h

72

reg->mant.m32[1] = (reg->mant.m32[1] << shift);

arch/m68k/math-emu/multi_arith.h

74

asm ("bfffo %1{#0,#32},%0" : "=d" (shift) : "dm" (reg->mant.m32[1]));

arch/m68k/math-emu/multi_arith.h

75

reg->mant.m32[0] = (reg->mant.m32[1] << shift);

arch/m68k/math-emu/multi_arith.h

77

shift += 32;

arch/m68k/math-emu/multi_arith.h

80

return shift;

arch/microblaze/kernel/timer.c

144

.shift = 8,

arch/microblaze/kernel/timer.c

168

clockevent_xilinx_timer.shift);

arch/microblaze/kernel/timer.c

204

.shift = 8,

arch/microblaze/kernel/timer.c

210

xilinx_cc.shift);

arch/mips/alchemy/common/clock.c

1010

a->shift = i * 5;

arch/mips/alchemy/common/clock.c

1019

a->parent = ((v >> a->shift) >> 2) & 7;

arch/mips/alchemy/common/clock.c

373

int shift; /* offset in register */

arch/mips/alchemy/common/clock.c

502

v |= (1 << 1) << c->shift;

arch/mips/alchemy/common/clock.c

512

unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 1);

arch/mips/alchemy/common/clock.c

524

v &= ~((1 << 1) << c->shift);

arch/mips/alchemy/common/clock.c

537

v |= (1 << c->shift);

arch/mips/alchemy/common/clock.c

539

v &= ~(1 << c->shift);

arch/mips/alchemy/common/clock.c

550

return (alchemy_rdsys(c->reg) >> c->shift) & 1;

arch/mips/alchemy/common/clock.c

558

int sh = c->shift + 2;

arch/mips/alchemy/common/clock.c

577

unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 2);

arch/mips/alchemy/common/clock.c

605

v &= ~(3 << c->shift);

arch/mips/alchemy/common/clock.c

606

v |= (c->parent & 3) << c->shift;

arch/mips/alchemy/common/clock.c

628

return ((alchemy_rdsys(c->reg) >> c->shift) & 3) != 0;

arch/mips/alchemy/common/clock.c

638

v &= ~(3 << c->shift); /* set input mux to "disabled" state */

arch/mips/alchemy/common/clock.c

678

int sh = c->shift + 2;

arch/mips/alchemy/common/clock.c

702

int sh = c->shift + 2;

arch/mips/alchemy/common/clock.c

787

a->shift = 10 * (i < 3 ? i : i - 3);

arch/mips/alchemy/common/clock.c

801

a->parent = (v >> a->shift) & 3;

arch/mips/alchemy/common/clock.c

828

return (((v >> c->shift) >> 2) & 7) != 0;

arch/mips/alchemy/common/clock.c

835

v &= ~((7 << 2) << c->shift);

arch/mips/alchemy/common/clock.c

836

v |= ((c->parent & 7) << 2) << c->shift;

arch/mips/alchemy/common/clock.c

861

v &= ~((3 << 2) << c->shift); /* mux to "disabled" state */

arch/mips/alchemy/common/clock.c

892

unsigned long v = (alchemy_rdsys(c->reg) >> c->shift) & 3;

arch/mips/alchemy/common/clock.c

922

v &= ~(3 << c->shift);

arch/mips/alchemy/common/clock.c

923

v |= (i & 3) << c->shift;

arch/mips/alchemy/common/time.c

119

cd->shift = 32;

arch/mips/alchemy/common/time.c

120

cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift);

arch/mips/cavium-octeon/csrc-octeon.c

120

u64 shift = clocksource_mips.shift;

arch/mips/cavium-octeon/csrc-octeon.c

133

: [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)

arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c

91

jtgd.s.shift = 1;

arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c

99

} while (jtgd.s.shift);

arch/mips/cavium-octeon/executive/cvmx-l2c.c

317

int shift = CVMX_L2C_TAG_ADDR_ALIAS_SHIFT;

arch/mips/cavium-octeon/executive/cvmx-l2c.c

319

uint64_t tag = addr >> shift;

arch/mips/cavium-octeon/executive/cvmx-l2c.c

328

CVMX_CACHE_LTGL2I(index | (way << shift), 0);

arch/mips/include/asm/octeon/cvmx-ciu-defs.h

130

__BITFIELD_FIELD(uint64_t shift:1,

arch/mips/include/asm/txx9/tx4938.h

307

void tx4938_ata_init(unsigned int irq, unsigned int shift, int tune);

arch/mips/kernel/cevt-txx9.c

98

__raw_writel(((u64)(NSEC_PER_SEC / HZ) * evt->mult) >> evt->shift,

arch/mips/kernel/cmpxchg.c

14

unsigned int shift;

arch/mips/kernel/cmpxchg.c

28

shift = (unsigned long)ptr & 0x3;

arch/mips/kernel/cmpxchg.c

30

shift ^= sizeof(u32) - size;

arch/mips/kernel/cmpxchg.c

31

shift *= BITS_PER_BYTE;

arch/mips/kernel/cmpxchg.c

32

mask <<= shift;

arch/mips/kernel/cmpxchg.c

43

new32 = (load32 & ~mask) | (val << shift);

arch/mips/kernel/cmpxchg.c

47

return (load32 & mask) >> shift;

arch/mips/kernel/cmpxchg.c

55

unsigned int shift;

arch/mips/kernel/cmpxchg.c

70

shift = (unsigned long)ptr & 0x3;

arch/mips/kernel/cmpxchg.c

72

shift ^= sizeof(u32) - size;

arch/mips/kernel/cmpxchg.c

73

shift *= BITS_PER_BYTE;

arch/mips/kernel/cmpxchg.c

74

mask <<= shift;

arch/mips/kernel/cmpxchg.c

88

load = (load32 & mask) >> shift;

arch/mips/kernel/cmpxchg.c

98

old32 = (load32 & ~mask) | (old << shift);

arch/mips/kernel/cmpxchg.c

99

new32 = (load32 & ~mask) | (new << shift);

arch/mips/kernel/smp-bmips.c

491

int shift = info->cpu & 0x01 ? 16 : 0;

arch/mips/kernel/smp-bmips.c

492

u32 mask = ~(0xffff << shift), val = info->val >> 16;

arch/mips/kernel/smp-bmips.c

505

(val << shift));

arch/mips/kernel/smp-bmips.c

72

#define CPUNUM(cpu, shift) (((cpu) + bmips_cpu_offset) << (shift))

arch/mips/lantiq/xway/sysctrl.c

316

int shift = 14 - (2 * clk->module);

arch/mips/lantiq/xway/sysctrl.c

320

val &= ~(3 << shift);

arch/mips/lantiq/xway/sysctrl.c

321

val |= i << shift;

arch/mips/loongson64/hpet.c

276

.shift = 10,

arch/mips/loongson64/hpet.c

281

csrc_hpet.mult = clocksource_hz2mult(HPET_FREQ, csrc_hpet.shift);

arch/mips/mm/tlbex.c

957

unsigned int shift = 4 - (PTE_T_LOG2 + 1) + PAGE_SHIFT - 12;

arch/mips/mm/tlbex.c

960

if (shift)

arch/mips/mm/tlbex.c

961

UASM_i_SRL(p, ctx, ctx, shift);

arch/mips/net/bpf_jit_comp64.c

134

int shift = 0;

arch/mips/net/bpf_jit_comp64.c

141

shift += 16;

arch/mips/net/bpf_jit_comp64.c

144

if (shift)

arch/mips/net/bpf_jit_comp64.c

145

emit(ctx, dsll_safe, dst, dst, shift);

arch/mips/net/bpf_jit_comp64.c

148

shift = 0;

arch/mips/net/bpf_jit_comp64.c

151

if (shift)

arch/mips/net/bpf_jit_comp64.c

152

emit(ctx, dsll_safe, dst, dst, shift);

arch/mips/pci/pci-xtalk-bridge.c

48

u32 cf, shift, mask;

arch/mips/pci/pci-xtalk-bridge.c

67

shift = (where & 3) << 3;

arch/mips/pci/pci-xtalk-bridge.c

69

*value = (cf >> shift) & mask;

arch/mips/pci/pci-xtalk-bridge.c

76

u32 cf, shift, mask, smask;

arch/mips/pci/pci-xtalk-bridge.c

84

shift = ((where & 3) << 3);

arch/mips/pci/pci-xtalk-bridge.c

86

smask = mask << shift;

arch/mips/pci/pci-xtalk-bridge.c

88

cf = (cf & ~smask) | ((value & mask) << shift);

arch/mips/txx9/generic/setup_tx4938.c

333

void __init tx4938_ata_init(unsigned int irq, unsigned int shift, int tune)

arch/mips/txx9/generic/setup_tx4938.c

346

.ioport_shift = shift,

arch/mips/txx9/generic/setup_tx4938.c

382

.shift = 1,

arch/nios2/kernel/time.c

234

.shift = 32,

arch/parisc/kernel/unaligned.c

175

unsigned long shift, temp1;

arch/parisc/kernel/unaligned.c

198

: "+r" (val), "+r" (ret), "+r" (saddr), "=&r" (shift), "=&r" (temp1)

arch/parisc/kernel/unaligned.c

216

: "+r" (val), "+r" (ret), "+r" (saddr), "=&r" (shift), "=&r" (temp1)

arch/parisc/kernel/unaligned.c

429

int shift=0;

arch/parisc/kernel/unaligned.c

433

shift= 1; break;

arch/parisc/kernel/unaligned.c

435

shift= 2; break;

arch/parisc/kernel/unaligned.c

438

shift= 3; break;

arch/parisc/kernel/unaligned.c

440

newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0)<<shift;

arch/parisc/math-emu/dbl_float.h

335

#define Dbl_right_align(srcdstA,srcdstB,shift,extent) \

arch/parisc/math-emu/dbl_float.h

336

if( shift >= 32 ) \

arch/parisc/math-emu/dbl_float.h

340

if(shift < 64) \

arch/parisc/math-emu/dbl_float.h

342

if(shift > 32) \

arch/parisc/math-emu/dbl_float.h

345

shift-32, Extall(extent)); \

arch/parisc/math-emu/dbl_float.h

346

if(Dallp2(srcdstB) << 64 - (shift)) Ext_setone_low(extent); \

arch/parisc/math-emu/dbl_float.h

349

Dallp2(srcdstB) = Dallp1(srcdstA) >> (shift - 32); \

arch/parisc/math-emu/dbl_float.h

362

if (shift > 0) \

arch/parisc/math-emu/dbl_float.h

364

Extall(extent) = Dallp2(srcdstB) << 32 - (shift); \

arch/parisc/math-emu/dbl_float.h

365

Variable_shift_double(Dallp1(srcdstA),Dallp2(srcdstB),shift, \

arch/parisc/math-emu/dbl_float.h

367

Dallp1(srcdstA) >>= shift; \

arch/parisc/math-emu/dbl_float.h

376

#define Dbl_fix_overshift(srcdstA,srcdstB,shift,extent) \

arch/parisc/math-emu/dbl_float.h

377

Extall(extent) = Dallp2(srcdstB) << 32 - (shift); \

arch/parisc/math-emu/dbl_float.h

378

Dallp2(srcdstB) = (Dallp1(srcdstA) << 32 - (shift)) | \

arch/parisc/math-emu/dbl_float.h

379

(Dallp2(srcdstB) >> (shift)); \

arch/parisc/math-emu/dbl_float.h

380

Dallp1(srcdstA) = Dallp1(srcdstA) >> shift

arch/parisc/math-emu/dbl_float.h

559

#define Dblext_right_align(srcdstA,srcdstB,srcdstC,srcdstD,shift) \

arch/parisc/math-emu/dbl_float.h

561

shiftamt = shift % 32; \

arch/parisc/math-emu/dbl_float.h

563

switch (shift/32) { \

arch/parisc/math-emu/sgl_float.h

206

#define Sgl_right_align(srcdst,shift,extent) \

arch/parisc/math-emu/sgl_float.h

208

if (shift < 32) { \

arch/parisc/math-emu/sgl_float.h

209

Extall(extent) = Sall(srcdst) << (32-(shift)); \

arch/parisc/math-emu/sgl_float.h

210

Sall(srcdst) >>= shift; \

arch/parisc/math-emu/sgl_float.h

335

#define Sglext_right_align(srcdstA,srcdstB,shift) \

arch/parisc/math-emu/sgl_float.h

337

shiftamt = shift % 32; \

arch/parisc/math-emu/sgl_float.h

339

switch (shift/32) { \

arch/powerpc/boot/4xx.c

159

#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))

arch/powerpc/include/asm/book3s/32/pgalloc.h

57

void *table, int shift)

arch/powerpc/include/asm/book3s/32/pgalloc.h

60

BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);

arch/powerpc/include/asm/book3s/32/pgalloc.h

61

pgf |= shift;

arch/powerpc/include/asm/book3s/32/pgalloc.h

68

unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;

arch/powerpc/include/asm/book3s/32/pgalloc.h

70

pgtable_free(table, shift);

arch/powerpc/include/asm/book3s/64/hash-4k.h

92

#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \

arch/powerpc/include/asm/book3s/64/hash-4k.h

95

shift = mmu_psize_defs[psize].shift; \

arch/powerpc/include/asm/book3s/64/hash-64k.h

158

#define pte_iterate_hashed_subpages(rpte, psize, vpn, index, shift) \

arch/powerpc/include/asm/book3s/64/hash-64k.h

163

shift = mmu_psize_defs[psize].shift; \

arch/powerpc/include/asm/book3s/64/hash-64k.h

165

vpn += (1L << (shift - VPN_SHIFT))) { \

arch/powerpc/include/asm/book3s/64/hash.h

256

unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,

arch/powerpc/include/asm/book3s/64/hugetlb.h

21

unsigned long shift;

arch/powerpc/include/asm/book3s/64/hugetlb.h

23

shift = huge_page_shift(hstate);

arch/powerpc/include/asm/book3s/64/hugetlb.h

24

if (shift == mmu_psize_defs[MMU_PAGE_2M].shift)

arch/powerpc/include/asm/book3s/64/hugetlb.h

26

else if (shift == mmu_psize_defs[MMU_PAGE_1G].shift)

arch/powerpc/include/asm/book3s/64/hugetlb.h

28

else if (shift == mmu_psize_defs[MMU_PAGE_16M].shift)

arch/powerpc/include/asm/book3s/64/hugetlb.h

30

else if (shift == mmu_psize_defs[MMU_PAGE_16G].shift)

arch/powerpc/include/asm/book3s/64/hugetlb.h

70

static inline int check_and_get_huge_psize(int shift)

arch/powerpc/include/asm/book3s/64/hugetlb.h

74

if (shift > SLICE_HIGH_SHIFT)

arch/powerpc/include/asm/book3s/64/hugetlb.h

77

mmu_psize = shift_to_mmu_psize(shift);

arch/powerpc/include/asm/book3s/64/mmu-hash.h

163

int (*resize_hpt)(unsigned long shift);

arch/powerpc/include/asm/book3s/64/mmu-hash.h

185

static inline int shift_to_mmu_psize(unsigned int shift)

arch/powerpc/include/asm/book3s/64/mmu-hash.h

190

if (mmu_psize_defs[psize].shift == shift)

arch/powerpc/include/asm/book3s/64/mmu-hash.h

197

if (mmu_psize_defs[mmu_psize].shift)

arch/powerpc/include/asm/book3s/64/mmu-hash.h

198

return mmu_psize_defs[mmu_psize].shift;

arch/powerpc/include/asm/book3s/64/mmu-hash.h

208

return mmu_psize_defs[psize].shift;

arch/powerpc/include/asm/book3s/64/mmu-hash.h

291

return 1ul << mmu_psize_defs[i & 0xf].shift;

arch/powerpc/include/asm/book3s/64/mmu-hash.h

412

unsigned int shift = mmu_psize_defs[actual_psize].shift;

arch/powerpc/include/asm/book3s/64/mmu-hash.h

413

return (pa & ~((1ul << shift) - 1)) | (penc << LP_SHIFT);

arch/powerpc/include/asm/book3s/64/mmu-hash.h

434

unsigned int shift, int ssize)

arch/powerpc/include/asm/book3s/64/mmu-hash.h

443

((vpn & mask) >> (shift - VPN_SHIFT));

arch/powerpc/include/asm/book3s/64/mmu-hash.h

448

((vpn & mask) >> (shift - VPN_SHIFT)) ;

arch/powerpc/include/asm/book3s/64/mmu-hash.h

476

int ssize, unsigned int shift, unsigned int mmu_psize);

arch/powerpc/include/asm/book3s/64/mmu.h

18

unsigned int shift; /* number of bits */

arch/powerpc/include/asm/book3s/64/pgalloc.h

21

extern void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift);

arch/powerpc/include/asm/book3s/64/pgtable.h

1005

unsigned long page_size = 1 << mmu_psize_defs[mmu_io_psize].shift;

arch/powerpc/include/asm/book3s/64/radix.h

304

if (mmu_psize_defs[MMU_PAGE_2M].shift == PMD_SHIFT)

arch/powerpc/include/asm/book3s/64/radix.h

312

if (mmu_psize_defs[MMU_PAGE_1G].shift == PUD_SHIFT)

arch/powerpc/include/asm/cacheflush.h

100

for (i = 0; i < size >> shift; i++, addr += bytes)

arch/powerpc/include/asm/cacheflush.h

113

unsigned long shift = l1_dcache_shift();

arch/powerpc/include/asm/cacheflush.h

119

for (i = 0; i < size >> shift; i++, addr += bytes)

arch/powerpc/include/asm/cacheflush.h

72

unsigned long shift = l1_dcache_shift();

arch/powerpc/include/asm/cacheflush.h

81

for (i = 0; i < size >> shift; i++, addr += bytes)

arch/powerpc/include/asm/cacheflush.h

94

unsigned long shift = l1_dcache_shift();

arch/powerpc/include/asm/kvm_book3s.h

197

unsigned int shift,

arch/powerpc/include/asm/kvm_book3s_64.h

264

int shift = kvmppc_hpte_actual_page_shift(v, r);

arch/powerpc/include/asm/kvm_book3s_64.h

266

if (shift)

arch/powerpc/include/asm/kvm_book3s_64.h

267

return 1ul << shift;

arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h

13

static inline int check_and_get_huge_psize(int shift)

arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h

15

return shift_to_mmu_psize(shift);

arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h

48

static inline pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags)

arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h

50

size_t size = 1UL << shift;

arch/powerpc/include/asm/nohash/32/mmu-8xx.h

196

unsigned int shift; /* number of bits */

arch/powerpc/include/asm/nohash/32/mmu-8xx.h

201

static inline int shift_to_mmu_psize(unsigned int shift)

arch/powerpc/include/asm/nohash/32/mmu-8xx.h

206

if (mmu_psize_defs[psize].shift == shift)

arch/powerpc/include/asm/nohash/32/mmu-8xx.h

213

if (mmu_psize_defs[mmu_psize].shift)

arch/powerpc/include/asm/nohash/32/mmu-8xx.h

214

return mmu_psize_defs[mmu_psize].shift;

arch/powerpc/include/asm/nohash/hugetlb-e500.h

12

return shift_to_mmu_psize(shift);

arch/powerpc/include/asm/nohash/hugetlb-e500.h

15

static inline pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags)

arch/powerpc/include/asm/nohash/hugetlb-e500.h

17

unsigned int tsize = shift - _PAGE_PSIZE_SHIFT_OFFSET;

arch/powerpc/include/asm/nohash/hugetlb-e500.h

7

static inline int check_and_get_huge_psize(int shift)

arch/powerpc/include/asm/nohash/hugetlb-e500.h

9

if (shift & 1) /* Not a power of 4 */

arch/powerpc/include/asm/nohash/mmu-e500.h

251

unsigned int shift; /* number of bits */

arch/powerpc/include/asm/nohash/mmu-e500.h

258

static inline int shift_to_mmu_psize(unsigned int shift)

arch/powerpc/include/asm/nohash/mmu-e500.h

263

if (mmu_psize_defs[psize].shift == shift)

arch/powerpc/include/asm/nohash/mmu-e500.h

270

if (mmu_psize_defs[mmu_psize].shift)

arch/powerpc/include/asm/nohash/mmu-e500.h

271

return mmu_psize_defs[mmu_psize].shift;

arch/powerpc/include/asm/nohash/pgalloc.h

43

static inline void pgtable_free(void *table, int shift)

arch/powerpc/include/asm/nohash/pgalloc.h

45

if (!shift) {

arch/powerpc/include/asm/nohash/pgalloc.h

48

BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);

arch/powerpc/include/asm/nohash/pgalloc.h

49

kmem_cache_free(PGT_CACHE(shift), table);

arch/powerpc/include/asm/nohash/pgalloc.h

53

static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)

arch/powerpc/include/asm/nohash/pgalloc.h

57

BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);

arch/powerpc/include/asm/nohash/pgalloc.h

58

pgf |= shift;

arch/powerpc/include/asm/nohash/pgalloc.h

65

unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;

arch/powerpc/include/asm/nohash/pgalloc.h

67

pgtable_free(table, shift);

arch/powerpc/include/asm/pgalloc.h

69

#define PGT_CACHE(shift) pgtable_cache[shift]

arch/powerpc/include/asm/pgtable.h

97

void pgtable_cache_add(unsigned int shift);

arch/powerpc/include/asm/plpar_wrappers.h

215

unsigned long shift)

arch/powerpc/include/asm/plpar_wrappers.h

217

return plpar_hcall_norets(H_RESIZE_HPT_PREPARE, flags, shift);

arch/powerpc/include/asm/plpar_wrappers.h

221

unsigned long shift)

arch/powerpc/include/asm/plpar_wrappers.h

223

return plpar_hcall_norets(H_RESIZE_HPT_COMMIT, flags, shift);

arch/powerpc/include/asm/pmac_pfunc.h

101

int (*read_reg8_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,

arch/powerpc/include/asm/pmac_pfunc.h

104

int (*write_reg32_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);

arch/powerpc/include/asm/pmac_pfunc.h

105

int (*write_reg16_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);

arch/powerpc/include/asm/pmac_pfunc.h

106

int (*write_reg8_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);

arch/powerpc/include/asm/pmac_pfunc.h

97

int (*read_reg32_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,

arch/powerpc/include/asm/pmac_pfunc.h

99

int (*read_reg16_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,

arch/powerpc/include/asm/vdso/gettimeofday.h

109

static __always_inline u64 vdso_shift_ns(u64 ns, unsigned long shift)

arch/powerpc/include/asm/vdso/gettimeofday.h

114

lo >>= shift;

arch/powerpc/include/asm/vdso/gettimeofday.h

115

lo |= hi << (32 - shift);

arch/powerpc/include/asm/vdso/gettimeofday.h

116

hi >>= shift;

arch/powerpc/include/uapi/asm/kvm.h

765

__u32 shift;

arch/powerpc/kernel/legacy_serial.c

144

legacy_port->regshift = shift;

arch/powerpc/kernel/legacy_serial.c

85

u32 shift = 0;

arch/powerpc/kernel/legacy_serial.c

99

shift = be32_to_cpup(rs);

arch/powerpc/kernel/mce_power.c

32

unsigned int shift;

arch/powerpc/kernel/mce_power.c

42

ptep = __find_linux_pte(mm->pgd, addr, NULL, &shift);

arch/powerpc/kernel/mce_power.c

54

if (shift <= PAGE_SHIFT)

arch/powerpc/kernel/mce_power.c

57

unsigned long rpnmask = (1ul << shift) - PAGE_SIZE;

arch/powerpc/kernel/prom_init.c

755

int shift = 0;

arch/powerpc/kernel/prom_init.c

763

shift = 30;

arch/powerpc/kernel/prom_init.c

766

shift = 20;

arch/powerpc/kernel/prom_init.c

769

shift = 10;

arch/powerpc/kernel/prom_init.c

771

if (shift) {

arch/powerpc/kernel/prom_init.c

772

ret <<= shift;

arch/powerpc/kernel/syscalls.c

41

unsigned long fd, unsigned long off, int shift)

arch/powerpc/kernel/syscalls.c

46

if (!IS_ALIGNED(off, 1 << shift))

arch/powerpc/kernel/syscalls.c

49

return ksys_mmap_pgoff(addr, len, prot, flags, fd, off >> shift);

arch/powerpc/kernel/time.c

810

clock->name, clock->mult, clock->shift);

arch/powerpc/kernel/time.c

840

dec->name, dec->mult, dec->shift, cpu);

arch/powerpc/kernel/time.c

844

decrementer_clockevent.shift = dec->shift;

arch/powerpc/kernel/time.c

947

unsigned shift;

arch/powerpc/kernel/time.c

976

for (shift = 0; res.result_high != 0; ++shift) {

arch/powerpc/kernel/time.c

981

tb_to_ns_shift = shift;

arch/powerpc/kernel/traps.c

1252

u32 shift = 8 * (3 - (pos & 0x3));

arch/powerpc/kernel/traps.c

1267

regs->gpr[rT] |= val << shift;

arch/powerpc/kernel/traps.c

1271

val = regs->gpr[rT] >> shift;

arch/powerpc/kernel/traps.c

1374

int shift = (instword >> 21) & 0x1c;

arch/powerpc/kernel/traps.c

1375

unsigned long msk = 0xf0000000UL >> shift;

arch/powerpc/kernel/traps.c

1378

regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);

arch/powerpc/kexec/vmcore_info.c

25

VMCOREINFO_OFFSET(mmu_psize_def, shift);

arch/powerpc/kvm/book3s_64_mmu.c

623

mmu_psize_defs[MMU_PAGE_64K].shift &&

arch/powerpc/kvm/book3s_64_mmu_host.c

147

hash = hpt_hash(vpn, mmu_psize_defs[hpsize].shift, MMU_SEGSIZE_256M);

arch/powerpc/kvm/book3s_64_mmu_hv.c

1461

unsigned long shift = rhpt->shift;

arch/powerpc/kvm/book3s_64_mmu_hv.c

1468

if (shift && ((shift < 18) || (shift > 46)))

arch/powerpc/kvm/book3s_64_mmu_hv.c

1476

if (resize->order == shift) {

arch/powerpc/kvm/book3s_64_mmu_hv.c

1492

if (!shift)

arch/powerpc/kvm/book3s_64_mmu_hv.c

1504

resize->order = shift;

arch/powerpc/kvm/book3s_64_mmu_hv.c

1527

unsigned long shift = rhpt->shift;

arch/powerpc/kvm/book3s_64_mmu_hv.c

1534

if (shift && ((shift < 18) || (shift > 46)))

arch/powerpc/kvm/book3s_64_mmu_hv.c

1555

if (!resize || (resize->order != shift))

arch/powerpc/kvm/book3s_64_mmu_hv.c

523

unsigned int shift;

arch/powerpc/kvm/book3s_64_mmu_hv.c

616

ptep = find_kvm_host_pte(kvm, mmu_seq, hva, &shift);

arch/powerpc/kvm/book3s_64_mmu_hv.c

632

if (shift)

arch/powerpc/kvm/book3s_64_mmu_hv.c

633

pte_size = 1ul << shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1016

unsigned int shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1023

ptep = find_kvm_secondary_pte(kvm, gpa, &shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1025

kvmppc_unmap_pte(kvm, ptep, gpa, shift, memslot,

arch/powerpc/kvm/book3s_64_mmu_radix.c

1035

unsigned int shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1042

ptep = find_kvm_secondary_pte(kvm, gpa, &shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1045

gpa, shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1051

1UL << shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1064

unsigned int shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1070

ptep = find_kvm_secondary_pte(kvm, gpa, &shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1083

unsigned int shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1094

ptep = find_kvm_secondary_pte_unlocked(kvm, gpa, &shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1118

VM_BUG_ON(shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1120

gpa, shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1121

kvmppc_radix_tlbie_page(kvm, gpa, shift, kvm->arch.lpid);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1126

1UL << shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1163

unsigned int shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1174

ptep = find_kvm_secondary_pte(kvm, gpa, &shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1176

kvmppc_unmap_pte(kvm, ptep, gpa, shift, memslot,

arch/powerpc/kvm/book3s_64_mmu_radix.c

1191

if (!mmu_psize_defs[psize].shift)

arch/powerpc/kvm/book3s_64_mmu_radix.c

1193

info->ap_encodings[*indexp] = mmu_psize_defs[psize].shift |

arch/powerpc/kvm/book3s_64_mmu_radix.c

1295

int shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1379

shift = PUD_SHIFT;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1391

shift = PMD_SHIFT;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1401

shift = PAGE_SHIFT;

arch/powerpc/kvm/book3s_64_mmu_radix.c

1404

" %lx: %lx %d\n", gpa, pte, shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

1405

gpa += 1ul << shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

209

if (offset == mmu_psize_defs[ps].shift)

arch/powerpc/kvm/book3s_64_mmu_radix.c

376

unsigned long addr, unsigned int shift)

arch/powerpc/kvm/book3s_64_mmu_radix.c

424

unsigned int shift,

arch/powerpc/kvm/book3s_64_mmu_radix.c

434

old = kvmppc_radix_update_pte(kvm, pte, ~0UL, 0, gpa, shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

435

kvmppc_radix_tlbie_page(kvm, gpa, shift, lpid);

arch/powerpc/kvm/book3s_64_mmu_radix.c

446

if (shift) { /* 1GB or 2MB page */

arch/powerpc/kvm/book3s_64_mmu_radix.c

447

page_size = 1ul << shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

448

if (shift == PMD_SHIFT)

arch/powerpc/kvm/book3s_64_mmu_radix.c

450

else if (shift == PUD_SHIFT)

arch/powerpc/kvm/book3s_64_mmu_radix.c

797

unsigned int shift;

arch/powerpc/kvm/book3s_64_mmu_radix.c

810

ptep = find_kvm_nested_guest_pte(kvm, lpid, gpa, &shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

812

ptep = find_kvm_secondary_pte(kvm, gpa, &shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

815

kvmppc_radix_update_pte(kvm, ptep, 0, pgflags, gpa, shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

833

unsigned int shift, level;

arch/powerpc/kvm/book3s_64_mmu_radix.c

853

ptep = find_kvm_host_pte(kvm, mmu_seq, hva, &shift);

arch/powerpc/kvm/book3s_64_mmu_radix.c

872

if (large_enable && shift == PUD_SHIFT &&

arch/powerpc/kvm/book3s_64_mmu_radix.c

876

} else if (large_enable && shift == PMD_SHIFT &&

arch/powerpc/kvm/book3s_64_mmu_radix.c

882

if (shift > PAGE_SHIFT) {

arch/powerpc/kvm/book3s_64_mmu_radix.c

888

unsigned long rpnmask = (1ul << shift) - PAGE_SIZE;

arch/powerpc/kvm/book3s_64_vio.c

390

long shift = stit->tbl->it_page_shift;

arch/powerpc/kvm/book3s_64_vio.c

392

mem = mm_iommu_lookup(stt->kvm->mm, ua, 1ULL << shift);

arch/powerpc/kvm/book3s_64_vio.c

393

if (!mem || mm_iommu_ua_to_hpa(mem, ua, shift, &hpa)) {

arch/powerpc/kvm/book3s_hv.c

5210

int shift, int sllp)

arch/powerpc/kvm/book3s_hv.c

5212

(*sps)->page_shift = shift;

arch/powerpc/kvm/book3s_hv.c

5214

(*sps)->enc[0].page_shift = shift;

arch/powerpc/kvm/book3s_hv.c

5215

(*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift);

arch/powerpc/kvm/book3s_hv.c

5219

if (shift != 24) {

arch/powerpc/kvm/book3s_hv.c

5220

int penc = kvmppc_pgsize_lp_encoding(shift, 24);

arch/powerpc/kvm/book3s_hv_nested.c

1006

unsigned int shift, lpid;

arch/powerpc/kvm/book3s_hv_nested.c

1016

ptep = find_kvm_nested_guest_pte(kvm, lpid, gpa, &shift);

arch/powerpc/kvm/book3s_hv_nested.c

1019

kvmppc_unmap_pte(kvm, ptep, gpa, shift, NULL, gp->shadow_lpid);

arch/powerpc/kvm/book3s_hv_nested.c

1080

int shift;

arch/powerpc/kvm/book3s_hv_nested.c

1083

ptep = find_kvm_nested_guest_pte(kvm, gp->l1_lpid, gpa, &shift);

arch/powerpc/kvm/book3s_hv_nested.c

1084

if (!shift)

arch/powerpc/kvm/book3s_hv_nested.c

1085

shift = PAGE_SHIFT;

arch/powerpc/kvm/book3s_hv_nested.c

1087

kvmppc_unmap_pte(kvm, ptep, gpa, shift, NULL, gp->shadow_lpid);

arch/powerpc/kvm/book3s_hv_nested.c

1093

*shift_ret = shift;

arch/powerpc/kvm/book3s_hv_nested.c

1138

int shift, shadow_shift;

arch/powerpc/kvm/book3s_hv_nested.c

1141

shift = ap_to_shift(ap);

arch/powerpc/kvm/book3s_hv_nested.c

1143

if (shift < 0)

arch/powerpc/kvm/book3s_hv_nested.c

1147

addr &= ~((1UL << shift) - 1);

arch/powerpc/kvm/book3s_hv_nested.c

1148

npages = 1UL << (shift - PAGE_SHIFT);

arch/powerpc/kvm/book3s_hv_nested.c

1325

nr_pages = (end - start) >> def->shift;

arch/powerpc/kvm/book3s_hv_nested.c

1332

page_size = 1UL << def->shift;

arch/powerpc/kvm/book3s_hv_nested.c

1510

static inline int kvmppc_radix_shift_to_level(int shift)

arch/powerpc/kvm/book3s_hv_nested.c

1512

if (shift == PUD_SHIFT)

arch/powerpc/kvm/book3s_hv_nested.c

1514

if (shift == PMD_SHIFT)

arch/powerpc/kvm/book3s_hv_nested.c

1516

if (shift == PAGE_SHIFT)

arch/powerpc/kvm/book3s_hv_nested.c

1536

unsigned int shift, l1_shift, level;

arch/powerpc/kvm/book3s_hv_nested.c

1628

pte_p = find_kvm_secondary_pte(kvm, gpa, &shift);

arch/powerpc/kvm/book3s_hv_nested.c

1629

if (!shift)

arch/powerpc/kvm/book3s_hv_nested.c

1630

shift = PAGE_SHIFT;

arch/powerpc/kvm/book3s_hv_nested.c

1643

shift = kvmppc_radix_level_to_shift(level);

arch/powerpc/kvm/book3s_hv_nested.c

1646

gfn = (gpa & ~((1UL << shift) - 1)) >> PAGE_SHIFT;

arch/powerpc/kvm/book3s_hv_nested.c

1660

if (shift > l1_shift) {

arch/powerpc/kvm/book3s_hv_nested.c

1665

mask = (1UL << shift) - (1UL << actual_shift);

arch/powerpc/kvm/book3s_hv_nested.c

1667

shift = actual_shift;

arch/powerpc/kvm/book3s_hv_nested.c

1669

level = kvmppc_radix_shift_to_level(shift);

arch/powerpc/kvm/book3s_hv_nested.c

1670

n_gpa &= ~((1UL << shift) - 1);

arch/powerpc/kvm/book3s_hv_nested.c

959

unsigned int shift, lpid;

arch/powerpc/kvm/book3s_hv_nested.c

966

ptep = find_kvm_nested_guest_pte(kvm, lpid, gpa, &shift);

arch/powerpc/kvm/book3s_hv_nested.c

975

kvmppc_radix_tlbie_page(kvm, gpa, shift, lpid);

arch/powerpc/kvm/book3s_hv_rm_mmu.c

890

unsigned int shift;

arch/powerpc/kvm/book3s_hv_rm_mmu.c

903

ptep = find_kvm_host_pte(kvm, mmu_seq, hva, &shift);

arch/powerpc/kvm/book3s_hv_rm_mmu.c

911

if (shift)

arch/powerpc/kvm/book3s_hv_rm_mmu.c

912

psize = 1UL << shift;

arch/powerpc/lib/pmem.c

15

unsigned long shift = l1_dcache_shift();

arch/powerpc/lib/pmem.c

21

for (i = 0; i < size >> shift; i++, addr += bytes)

arch/powerpc/lib/pmem.c

27

unsigned long shift = l1_dcache_shift();

arch/powerpc/lib/pmem.c

33

for (i = 0; i < size >> shift; i++, addr += bytes)

arch/powerpc/lib/sstep.c

1191

unsigned int crval, shift;

arch/powerpc/lib/sstep.c

1201

shift = (7 - crfld) * 4;

arch/powerpc/lib/sstep.c

1202

op->ccval = (regs->ccr & ~(0xf << shift)) | (crval << shift);

arch/powerpc/lib/sstep.c

1210

unsigned int crval, shift;

arch/powerpc/lib/sstep.c

1220

shift = (7 - crfld) * 4;

arch/powerpc/lib/sstep.c

1221

op->ccval = (regs->ccr & ~(0xf << shift)) | (crval << shift);

arch/powerpc/mm/book3s64/hash_4k.c

30

unsigned long shift = mmu_psize_defs[MMU_PAGE_4K].shift;

arch/powerpc/mm/book3s64/hash_4k.c

71

unsigned long gslot = pte_get_hash_gslot(vpn, shift, ssize,

arch/powerpc/mm/book3s64/hash_4k.c

82

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_64k.c

118

gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte,

arch/powerpc/mm/book3s64/hash_64k.c

155

pa += (subpg_index << shift);

arch/powerpc/mm/book3s64/hash_64k.c

157

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_64k.c

237

unsigned long shift = mmu_psize_defs[MMU_PAGE_64K].shift;

arch/powerpc/mm/book3s64/hash_64k.c

282

gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0);

arch/powerpc/mm/book3s64/hash_64k.c

292

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_64k.c

48

unsigned long shift = mmu_psize_defs[MMU_PAGE_4K].shift;

arch/powerpc/mm/book3s64/hash_64k.c

89

subpg_index = (ea & (PAGE_SIZE - 1)) >> shift;

arch/powerpc/mm/book3s64/hash_hugepage.c

102

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_hugepage.c

128

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_hugepage.c

30

unsigned long vpn, hash, shift, slot;

arch/powerpc/mm/book3s64/hash_hugepage.c

72

shift = mmu_psize_defs[psize].shift;

arch/powerpc/mm/book3s64/hash_hugepage.c

73

index = (ea & ~HPAGE_PMD_MASK) >> shift;

arch/powerpc/mm/book3s64/hash_native.c

104

va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);

arch/powerpc/mm/book3s64/hash_native.c

194

va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1);

arch/powerpc/mm/book3s64/hash_native.c

454

hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize);

arch/powerpc/mm/book3s64/hash_native.c

601

unsigned long hpte_v, want_v, shift;

arch/powerpc/mm/book3s64/hash_native.c

604

shift = mmu_psize_defs[psize].shift;

arch/powerpc/mm/book3s64/hash_native.c

605

max_hpte_count = 1U << (PMD_SHIFT - shift);

arch/powerpc/mm/book3s64/hash_native.c

615

addr = s_addr + (i * (1ul << shift));

arch/powerpc/mm/book3s64/hash_native.c

617

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_native.c

667

int size, a_size, shift;

arch/powerpc/mm/book3s64/hash_native.c

684

shift = mmu_psize_defs[size].shift;

arch/powerpc/mm/book3s64/hash_native.c

697

if (shift < 23) {

arch/powerpc/mm/book3s64/hash_native.c

699

seg_off |= vpi << shift;

arch/powerpc/mm/book3s64/hash_native.c

707

if (shift < 23) {

arch/powerpc/mm/book3s64/hash_native.c

709

seg_off |= vpi << shift;

arch/powerpc/mm/book3s64/hash_native.c

778

unsigned long hash, index, hidx, shift, slot;

arch/powerpc/mm/book3s64/hash_native.c

795

pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {

arch/powerpc/mm/book3s64/hash_native.c

796

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_native.c

830

vpn, index, shift) {

arch/powerpc/mm/book3s64/hash_native.c

847

vpn, index, shift) {

arch/powerpc/mm/book3s64/hash_pgtable.c

381

if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT)

arch/powerpc/mm/book3s64/hash_pgtable.c

391

if (mmu_psize_defs[MMU_PAGE_64K].shift &&

arch/powerpc/mm/book3s64/hash_pgtable.c

506

unsigned int step, shift;

arch/powerpc/mm/book3s64/hash_pgtable.c

508

shift = mmu_psize_defs[mmu_linear_psize].shift;

arch/powerpc/mm/book3s64/hash_pgtable.c

509

step = 1 << shift;

arch/powerpc/mm/book3s64/hash_tlb.c

66

addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);

arch/powerpc/mm/book3s64/hash_utils.c

1053

long int shift, penc;

arch/powerpc/mm/book3s64/hash_utils.c

1056

if (!mmu_psize_defs[bp].shift)

arch/powerpc/mm/book3s64/hash_utils.c

1060

if (penc == -1 || !mmu_psize_defs[ap].shift)

arch/powerpc/mm/book3s64/hash_utils.c

1062

shift = mmu_psize_defs[ap].shift - LP_SHIFT;

arch/powerpc/mm/book3s64/hash_utils.c

1063

if (shift <= 0)

arch/powerpc/mm/book3s64/hash_utils.c

1072

penc += 1 << shift;

arch/powerpc/mm/book3s64/hash_utils.c

1090

if (mmu_psize_defs[MMU_PAGE_16M].shift)

arch/powerpc/mm/book3s64/hash_utils.c

1095

if (mmu_psize_defs[MMU_PAGE_16M].shift && aligned)

arch/powerpc/mm/book3s64/hash_utils.c

1097

else if (mmu_psize_defs[MMU_PAGE_1M].shift)

arch/powerpc/mm/book3s64/hash_utils.c

1111

if (mmu_psize_defs[MMU_PAGE_64K].shift) {

arch/powerpc/mm/book3s64/hash_utils.c

1134

if (mmu_psize_defs[MMU_PAGE_16M].shift &&

arch/powerpc/mm/book3s64/hash_utils.c

1147

mmu_psize_defs[mmu_linear_psize].shift,

arch/powerpc/mm/book3s64/hash_utils.c

1148

mmu_psize_defs[mmu_virtual_psize].shift,

arch/powerpc/mm/book3s64/hash_utils.c

1149

mmu_psize_defs[mmu_io_psize].shift

arch/powerpc/mm/book3s64/hash_utils.c

1151

,mmu_psize_defs[mmu_vmemmap_psize].shift

arch/powerpc/mm/book3s64/hash_utils.c

1179

unsigned pshift = mmu_psize_defs[mmu_virtual_psize].shift;

arch/powerpc/mm/book3s64/hash_utils.c

1240

unsigned int pshift = mmu_psize_defs[mmu_linear_psize].shift;

arch/powerpc/mm/book3s64/hash_utils.c

1264

unsigned int pshift = mmu_psize_defs[mmu_linear_psize].shift;

arch/powerpc/mm/book3s64/hash_utils.c

1316

unsigned int pshift = mmu_psize_defs[mmu_linear_psize].shift;

arch/powerpc/mm/book3s64/hash_utils.c

142

.shift = 12,

arch/powerpc/mm/book3s64/hash_utils.c

157

.shift = 12,

arch/powerpc/mm/book3s64/hash_utils.c

164

.shift = 24,

arch/powerpc/mm/book3s64/hash_utils.c

1799

ea &= ~((1ul << mmu_psize_defs[psize].shift) - 1);

arch/powerpc/mm/book3s64/hash_utils.c

1812

hugeshift = mmu_psize_defs[MMU_PAGE_16M].shift;

arch/powerpc/mm/book3s64/hash_utils.c

1814

hugeshift = mmu_psize_defs[MMU_PAGE_16G].shift;

arch/powerpc/mm/book3s64/hash_utils.c

2186

unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,

arch/powerpc/mm/book3s64/hash_utils.c

2191

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_utils.c

2203

unsigned long index, shift, gslot;

arch/powerpc/mm/book3s64/hash_utils.c

2207

pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {

arch/powerpc/mm/book3s64/hash_utils.c

2208

gslot = pte_get_hash_gslot(vpn, shift, ssize, pte, index);

arch/powerpc/mm/book3s64/hash_utils.c

2229

unsigned long hidx, shift, vpn, hash, slot;

arch/powerpc/mm/book3s64/hash_utils.c

2250

shift = mmu_psize_defs[psize].shift;

arch/powerpc/mm/book3s64/hash_utils.c

2251

max_hpte_count = HPAGE_PMD_SIZE >> shift;

arch/powerpc/mm/book3s64/hash_utils.c

2263

addr = s_addr + (i * (1ul << shift));

arch/powerpc/mm/book3s64/hash_utils.c

2265

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_utils.c

453

unsigned int pshift = mmu_psize_defs[mmu_linear_psize].shift;

arch/powerpc/mm/book3s64/hash_utils.c

626

unsigned int step, shift;

arch/powerpc/mm/book3s64/hash_utils.c

629

shift = mmu_psize_defs[psize].shift;

arch/powerpc/mm/book3s64/hash_utils.c

630

step = 1 << shift;

arch/powerpc/mm/book3s64/hash_utils.c

672

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hash_utils.c

711

unsigned int step, shift;

arch/powerpc/mm/book3s64/hash_utils.c

715

shift = mmu_psize_defs[psize].shift;

arch/powerpc/mm/book3s64/hash_utils.c

716

step = 1 << shift;

arch/powerpc/mm/book3s64/hash_utils.c

822

static int __init get_idx_from_shift(unsigned int shift)

arch/powerpc/mm/book3s64/hash_utils.c

826

switch (shift) {

arch/powerpc/mm/book3s64/hash_utils.c

883

def->shift = base_shift;

arch/powerpc/mm/book3s64/hash_utils.c

899

unsigned int shift = be32_to_cpu(prop[0]);

arch/powerpc/mm/book3s64/hash_utils.c

905

idx = get_idx_from_shift(shift);

arch/powerpc/mm/book3s64/hash_utils.c

911

"shift=%d\n", base_shift, shift);

arch/powerpc/mm/book3s64/hash_utils.c

916

base_shift, shift, def->sllp,

arch/powerpc/mm/book3s64/hugetlbpage.c

106

unsigned long hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/book3s64/hugetlbpage.c

171

if (mmu_psize_defs[MMU_PAGE_16M].shift)

arch/powerpc/mm/book3s64/hugetlbpage.c

172

hpage_shift = mmu_psize_defs[MMU_PAGE_16M].shift;

arch/powerpc/mm/book3s64/hugetlbpage.c

173

else if (mmu_psize_defs[MMU_PAGE_1M].shift)

arch/powerpc/mm/book3s64/hugetlbpage.c

174

hpage_shift = mmu_psize_defs[MMU_PAGE_1M].shift;

arch/powerpc/mm/book3s64/hugetlbpage.c

175

else if (mmu_psize_defs[MMU_PAGE_2M].shift)

arch/powerpc/mm/book3s64/hugetlbpage.c

176

hpage_shift = mmu_psize_defs[MMU_PAGE_2M].shift;

arch/powerpc/mm/book3s64/hugetlbpage.c

22

int ssize, unsigned int shift, unsigned int mmu_psize)

arch/powerpc/mm/book3s64/hugetlbpage.c

30

BUG_ON(shift != mmu_psize_defs[mmu_psize].shift);

arch/powerpc/mm/book3s64/hugetlbpage.c

99

gslot = pte_get_hash_gslot(vpn, shift, ssize, rpte, 0);

arch/powerpc/mm/book3s64/pgtable.c

644

unsigned int shift = mmu_psize_defs[mmu_linear_psize].shift;

arch/powerpc/mm/book3s64/pgtable.c

645

return max(SUBSECTION_SIZE, 1UL << shift);

arch/powerpc/mm/book3s64/radix_pgtable.c

327

mmu_psize_defs[MMU_PAGE_1G].shift) {

arch/powerpc/mm/book3s64/radix_pgtable.c

331

mmu_psize_defs[MMU_PAGE_2M].shift) {

arch/powerpc/mm/book3s64/radix_pgtable.c

504

static int __init get_idx_from_shift(unsigned int shift)

arch/powerpc/mm/book3s64/radix_pgtable.c

508

switch (shift) {

arch/powerpc/mm/book3s64/radix_pgtable.c

530

int shift, idx;

arch/powerpc/mm/book3s64/radix_pgtable.c

550

shift = be32_to_cpu(prop[0]) & ~(0xe << 28);

arch/powerpc/mm/book3s64/radix_pgtable.c

552

pr_info("Page size shift = %d AP=0x%x\n", shift, ap);

arch/powerpc/mm/book3s64/radix_pgtable.c

554

idx = get_idx_from_shift(shift);

arch/powerpc/mm/book3s64/radix_pgtable.c

559

def->shift = shift;

arch/powerpc/mm/book3s64/radix_pgtable.c

582

mmu_psize_defs[MMU_PAGE_4K].shift = 12;

arch/powerpc/mm/book3s64/radix_pgtable.c

587

mmu_psize_defs[MMU_PAGE_64K].shift = 16;

arch/powerpc/mm/book3s64/radix_tlb.c

1022

unsigned int page_shift = mmu_psize_defs[mmu_virtual_psize].shift;

arch/powerpc/mm/book3s64/radix_tlb.c

1134

if (page_size == (1UL << mmu_psize_defs[mmu_virtual_psize].shift))

arch/powerpc/mm/book3s64/radix_tlb.c

1136

else if (page_size == (1UL << mmu_psize_defs[MMU_PAGE_2M].shift))

arch/powerpc/mm/book3s64/radix_tlb.c

1138

else if (page_size == (1UL << mmu_psize_defs[MMU_PAGE_1G].shift))

arch/powerpc/mm/book3s64/radix_tlb.c

1240

unsigned int page_shift = mmu_psize_defs[psize].shift;

arch/powerpc/mm/book3s64/radix_tlb.c

1557

nr_pages = (end - start) >> def->shift;

arch/powerpc/mm/book3s64/radix_tlb.c

1571

(1UL << def->shift), psize, false);

arch/powerpc/mm/book3s64/slice.c

285

int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT);

arch/powerpc/mm/book3s64/slice.c

327

int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT);

arch/powerpc/mm/book3s64/slice.c

434

int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT);

arch/powerpc/mm/cacheflush.c

36

unsigned long shift = l1_icache_shift();

arch/powerpc/mm/cacheflush.c

42

for (i = 0; i < size >> shift; i++, addr += bytes)

arch/powerpc/mm/hugetlbpage.c

139

int shift = __ffs(size);

arch/powerpc/mm/hugetlbpage.c

147

mmu_psize = check_and_get_huge_psize(shift);

arch/powerpc/mm/hugetlbpage.c

151

BUG_ON(mmu_psize_defs[mmu_psize].shift != shift);

arch/powerpc/mm/hugetlbpage.c

158

int shift = __ffs(size);

arch/powerpc/mm/hugetlbpage.c

163

hugetlb_add_hstate(shift - PAGE_SHIFT);

arch/powerpc/mm/hugetlbpage.c

182

unsigned shift;

arch/powerpc/mm/hugetlbpage.c

184

if (!mmu_psize_defs[psize].shift)

arch/powerpc/mm/hugetlbpage.c

187

shift = mmu_psize_to_shift(psize);

arch/powerpc/mm/hugetlbpage.c

189

if (add_huge_page_size(1ULL << shift) < 0)

arch/powerpc/mm/hugetlbpage.c

207

else if (!firmware_has_feature(FW_FEATURE_LPAR) && mmu_psize_defs[MMU_PAGE_16G].shift)

arch/powerpc/mm/init-common.c

118

void pgtable_cache_add(unsigned int shift)

arch/powerpc/mm/init-common.c

121

unsigned long table_size = sizeof(pgd_t) << shift;

arch/powerpc/mm/init-common.c

135

BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);

arch/powerpc/mm/init-common.c

137

if (PGT_CACHE(shift))

arch/powerpc/mm/init-common.c

141

name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);

arch/powerpc/mm/init-common.c

143

new = kmem_cache_create(name, table_size, align, 0, ctor(shift));

arch/powerpc/mm/init-common.c

145

panic("Could not allocate pgtable cache for order %d", shift);

arch/powerpc/mm/init-common.c

148

pgtable_cache[shift] = new;

arch/powerpc/mm/init-common.c

150

pr_debug("Allocated pgtable cache for order %d\n", shift);

arch/powerpc/mm/init-common.c

75

#define CTOR(shift) static void ctor_##shift(void *addr) \

arch/powerpc/mm/init-common.c

77

memset(addr, 0, sizeof(pgd_t) << (shift)); \

arch/powerpc/mm/init-common.c

83

static inline void (*ctor(int shift))(void *)

arch/powerpc/mm/init-common.c

87

switch (shift) {

arch/powerpc/mm/init_64.c

207

unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;

arch/powerpc/mm/init_64.c

323

unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;

arch/powerpc/mm/nohash/8xx.c

57

unsigned int shift = mmu_psize_to_shift(psize);

arch/powerpc/mm/nohash/8xx.c

91

arch_make_huge_pte(pfn_pte(pa >> PAGE_SHIFT, prot), shift, 0),

arch/powerpc/mm/nohash/8xx.c

92

1UL << shift);

arch/powerpc/mm/nohash/book3e_pgtable.c

32

BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].shift - 10 > 0xf);

arch/powerpc/mm/nohash/book3e_pgtable.c

35

flags |= (mmu_psize_defs[mmu_vmemmap_psize].shift - 10) << 8;

arch/powerpc/mm/nohash/e500_hugetlbpage.c

123

unsigned long psize, tsize, shift;

arch/powerpc/mm/nohash/e500_hugetlbpage.c

134

shift = __ilog2(psize);

arch/powerpc/mm/nohash/e500_hugetlbpage.c

135

tsize = shift - 10;

arch/powerpc/mm/nohash/e500_hugetlbpage.c

155

mas2 = ea & ~((1UL << shift) - 1);

arch/powerpc/mm/nohash/tlb.c

101

.shift = 23,

arch/powerpc/mm/nohash/tlb.c

55

.shift = 12,

arch/powerpc/mm/nohash/tlb.c

58

.shift = 21,

arch/powerpc/mm/nohash/tlb.c

61

.shift = 22,

arch/powerpc/mm/nohash/tlb.c

64

.shift = 24,

arch/powerpc/mm/nohash/tlb.c

67

.shift = 26,

arch/powerpc/mm/nohash/tlb.c

70

.shift = 28,

arch/powerpc/mm/nohash/tlb.c

73

.shift = 30,

arch/powerpc/mm/nohash/tlb.c

79

return mmu_psize_defs[psize].shift - 10;

arch/powerpc/mm/nohash/tlb.c

92

.shift = 12,

arch/powerpc/mm/nohash/tlb.c

95

.shift = 14,

arch/powerpc/mm/nohash/tlb.c

98

.shift = 19,

arch/powerpc/mm/nohash/tlb_64e.c

102

shift = def->shift;

arch/powerpc/mm/nohash/tlb_64e.c

104

if (shift == 0 || shift & 1)

arch/powerpc/mm/nohash/tlb_64e.c

108

shift = (shift - 10) >> 1;

arch/powerpc/mm/nohash/tlb_64e.c

110

if ((shift >= min_pg) && (shift <= max_pg))

arch/powerpc/mm/nohash/tlb_64e.c

139

if (!def->shift)

arch/powerpc/mm/nohash/tlb_64e.c

142

if (tlb1ps & (1U << (def->shift - 10))) {

arch/powerpc/mm/nohash/tlb_64e.c

164

def->shift = 0;

arch/powerpc/mm/nohash/tlb_64e.c

167

pr_info(" %8ld KB as %s\n", 1ul << (def->shift - 10),

arch/powerpc/mm/nohash/tlb_64e.c

56

int tsize = mmu_psize_defs[mmu_pte_psize].shift - 10;

arch/powerpc/mm/nohash/tlb_64e.c

61

unsigned long size = 1UL << mmu_psize_defs[mmu_pte_psize].shift;

arch/powerpc/mm/nohash/tlb_64e.c

99

unsigned int shift;

arch/powerpc/mm/ptdump/book3s64.c

92

.shift = H_PAGE_F_GIX_SHIFT,

arch/powerpc/mm/ptdump/hashpagetable.c

169

if (flag->shift)

arch/powerpc/mm/ptdump/hashpagetable.c

170

val = val >> flag->shift;

arch/powerpc/mm/ptdump/hashpagetable.c

212

unsigned long shift = mmu_psize_defs[psize].shift;

arch/powerpc/mm/ptdump/hashpagetable.c

217

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/ptdump/hashpagetable.c

254

unsigned long shift = mmu_psize_defs[psize].shift;

arch/powerpc/mm/ptdump/hashpagetable.c

259

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/mm/ptdump/hashpagetable.c

290

int penc = -2, idx = 0, shift;

arch/powerpc/mm/ptdump/hashpagetable.c

308

if ((penc != -1) && (mmu_psize_defs[idx].shift)) {

arch/powerpc/mm/ptdump/hashpagetable.c

309

shift = mmu_psize_defs[idx].shift - HPTE_R_RPN_SHIFT;

arch/powerpc/mm/ptdump/hashpagetable.c

310

mask = (0x1 << (shift)) - 1;

arch/powerpc/mm/ptdump/hashpagetable.c

314

*rpn = arpn >> shift;

arch/powerpc/mm/ptdump/hashpagetable.c

483

unsigned long psize = 1 << mmu_psize_defs[mmu_linear_psize].shift;

arch/powerpc/mm/ptdump/hashpagetable.c

58

int shift;

arch/powerpc/mm/ptdump/ptdump.c

153

if (flag->shift)

arch/powerpc/mm/ptdump/ptdump.c

154

val = val >> flag->shift;

arch/powerpc/mm/ptdump/ptdump.h

11

int shift;

arch/powerpc/perf/ppc970-pmu.c

408

int shift;

arch/powerpc/perf/ppc970-pmu.c

414

shift = MMCR0_PMC1SEL_SH - 7 * pmc;

arch/powerpc/perf/ppc970-pmu.c

415

mmcr->mmcr0 = (mmcr->mmcr0 & ~(0x1fUL << shift)) | (0x08UL << shift);

arch/powerpc/perf/ppc970-pmu.c

417

shift = MMCR1_PMC3SEL_SH - 5 * (pmc - 2);

arch/powerpc/perf/ppc970-pmu.c

418

mmcr->mmcr1 = (mmcr->mmcr1 & ~(0x1fUL << shift)) | (0x08UL << shift);

arch/powerpc/platforms/8xx/cpm1.c

246

int shift;

arch/powerpc/platforms/8xx/cpm1.c

310

shift = 0;

arch/powerpc/platforms/8xx/cpm1.c

315

shift = 8;

arch/powerpc/platforms/8xx/cpm1.c

320

shift = 16;

arch/powerpc/platforms/8xx/cpm1.c

325

shift = 24;

arch/powerpc/platforms/8xx/cpm1.c

330

shift = 12;

arch/powerpc/platforms/8xx/cpm1.c

335

shift = 28;

arch/powerpc/platforms/8xx/cpm1.c

355

bits <<= shift;

arch/powerpc/platforms/8xx/cpm1.c

356

mask <<= shift;

arch/powerpc/platforms/cell/spu_base.c

117

return mmu_psize_defs[MMU_PAGE_64K].shift != 0;

arch/powerpc/platforms/powermac/pfunc_base.c

193

u32 shift, u32 xor)

arch/powerpc/platforms/powermac/pfunc_base.c

201

*args->u[0].p = ((MACIO_IN32(offset) & mask) >> shift) ^ xor;

arch/powerpc/platforms/powermac/pfunc_base.c

206

u32 shift, u32 xor)

arch/powerpc/platforms/powermac/pfunc_base.c

214

*((u8 *)(args->u[0].p)) = ((MACIO_IN8(offset) & mask) >> shift) ^ xor;

arch/powerpc/platforms/powermac/pfunc_base.c

218

static int macio_do_write_reg32_slm(PMF_STD_ARGS, u32 offset, u32 shift,

arch/powerpc/platforms/powermac/pfunc_base.c

231

val = args->u[0].v << shift;

arch/powerpc/platforms/powermac/pfunc_base.c

238

static int macio_do_write_reg8_slm(PMF_STD_ARGS, u32 offset, u32 shift,

arch/powerpc/platforms/powermac/pfunc_base.c

251

val = args->u[0].v << shift;

arch/powerpc/platforms/powermac/pfunc_core.c

409

u32 shift = pmf_next32(cmd);

arch/powerpc/platforms/powermac/pfunc_core.c

413

" xor: %x\n", offset, mask, shift, xor);

arch/powerpc/platforms/powermac/pfunc_core.c

415

PMF_PARSE_CALL(read_reg32_msrx, cmd, h, offset, mask, shift, xor);

arch/powerpc/platforms/powermac/pfunc_core.c

423

u32 shift = pmf_next32(cmd);

arch/powerpc/platforms/powermac/pfunc_core.c

427

" xor: %x\n", offset, mask, shift, xor);

arch/powerpc/platforms/powermac/pfunc_core.c

429

PMF_PARSE_CALL(read_reg16_msrx, cmd, h, offset, mask, shift, xor);

arch/powerpc/platforms/powermac/pfunc_core.c

436

u32 shift = pmf_next32(cmd);

arch/powerpc/platforms/powermac/pfunc_core.c

440

" xor: %x\n", offset, mask, shift, xor);

arch/powerpc/platforms/powermac/pfunc_core.c

442

PMF_PARSE_CALL(read_reg8_msrx, cmd, h, offset, mask, shift, xor);

arch/powerpc/platforms/powermac/pfunc_core.c

449

u32 shift = pmf_next32(cmd);

arch/powerpc/platforms/powermac/pfunc_core.c

453

offset, shift, mask);

arch/powerpc/platforms/powermac/pfunc_core.c

455

PMF_PARSE_CALL(write_reg32_slm, cmd, h, offset, shift, mask);

arch/powerpc/platforms/powermac/pfunc_core.c

462

u32 shift = pmf_next32(cmd);

arch/powerpc/platforms/powermac/pfunc_core.c

466

offset, shift, mask);

arch/powerpc/platforms/powermac/pfunc_core.c

468

PMF_PARSE_CALL(write_reg16_slm, cmd, h, offset, shift, mask);

arch/powerpc/platforms/powermac/pfunc_core.c

475

u32 shift = pmf_next32(cmd);

arch/powerpc/platforms/powermac/pfunc_core.c

479

offset, shift, mask);

arch/powerpc/platforms/powermac/pfunc_core.c

481

PMF_PARSE_CALL(write_reg8_slm, cmd, h, offset, shift, mask);

arch/powerpc/platforms/powernv/ocxl.c

315

int shift, idx;

arch/powerpc/platforms/powernv/ocxl.c

319

shift = 4 * (1 - ((PNV_OCXL_TL_MAX_TEMPLATE - templ) % 2));

arch/powerpc/platforms/powernv/ocxl.c

320

buf[idx] |= rate << shift;

arch/powerpc/platforms/powernv/pci-ioda-tce.c

117

mask >>= shift;

arch/powerpc/platforms/powernv/pci-ioda-tce.c

256

static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned int shift,

arch/powerpc/platforms/powernv/pci-ioda-tce.c

261

unsigned long allocated = 1UL << shift;

arch/powerpc/platforms/powernv/pci-ioda-tce.c

262

unsigned int entries = 1UL << (shift - 3);

arch/powerpc/platforms/powernv/pci-ioda-tce.c

265

addr = pnv_alloc_tce_level(nid, shift);

arch/powerpc/platforms/powernv/pci-ioda-tce.c

275

tmp = pnv_pci_ioda2_table_do_alloc_pages(nid, shift,

arch/powerpc/platforms/powernv/pci-ioda-tce.c

62

static __be64 *pnv_alloc_tce_level(int nid, unsigned int shift)

arch/powerpc/platforms/powernv/pci-ioda-tce.c

68

shift - PAGE_SHIFT);

arch/powerpc/platforms/powernv/pci-ioda-tce.c

71

shift);

arch/powerpc/platforms/powernv/pci-ioda-tce.c

75

memset(addr, 0, 1UL << shift);

arch/powerpc/platforms/powernv/pci-ioda-tce.c

87

const long shift = ilog2(tbl->it_level_size);

arch/powerpc/platforms/powernv/pci-ioda-tce.c

88

unsigned long mask = (tbl->it_level_size - 1) << (level * shift);

arch/powerpc/platforms/powernv/pci-ioda-tce.c

91

int n = (idx & mask) >> (level * shift);

arch/powerpc/platforms/powernv/pci-ioda.c

1185

unsigned shift, unsigned long index,

arch/powerpc/platforms/powernv/pci-ioda.c

1197

start |= (index << shift);

arch/powerpc/platforms/powernv/pci-ioda.c

1198

end |= ((index + npages - 1) << shift);

arch/powerpc/platforms/powernv/pci-ioda.c

1199

inc = (0x1ull << shift);

arch/powerpc/platforms/powernv/pci-ioda.c

1228

unsigned int shift = tbl->it_page_shift;

arch/powerpc/platforms/powernv/pci-ioda.c

1231

pnv_pci_phb3_tce_invalidate(pe, shift,

arch/powerpc/platforms/powernv/pci-ioda.c

1236

pe->pe_number, 1u << shift,

arch/powerpc/platforms/powernv/pci-ioda.c

1237

index << shift, npages);

arch/powerpc/platforms/powernv/vas-window.c

33

u64 base, shift;

arch/powerpc/platforms/powernv/vas-window.c

36

shift = window->vinst->paste_win_id_shift;

arch/powerpc/platforms/powernv/vas-window.c

39

*addr = base + (winid << shift);

arch/powerpc/platforms/pseries/iommu.c

1383

const int shift[] = {

arch/powerpc/platforms/pseries/iommu.c

1389

int i = ARRAY_SIZE(shift) - 1;

arch/powerpc/platforms/pseries/iommu.c

1400

ret = max(ret, shift[i]);

arch/powerpc/platforms/pseries/iommu.c

1785

const long shift[] = {

arch/powerpc/platforms/pseries/iommu.c

1792

for (i = 0; i < ARRAY_SIZE(shift); i++) {

arch/powerpc/platforms/pseries/iommu.c

1794

ret |= shift[i];

arch/powerpc/platforms/pseries/lpar.c

1152

unsigned long shift, current_vpgb, vpgb;

arch/powerpc/platforms/pseries/lpar.c

1155

shift = mmu_psize_defs[psize].shift;

arch/powerpc/platforms/pseries/lpar.c

1162

vpgb = (vpn[i] >> (shift - VPN_SHIFT + 3));

arch/powerpc/platforms/pseries/lpar.c

1259

unsigned long shift, hidx, vpn = 0, hash, slot;

arch/powerpc/platforms/pseries/lpar.c

1261

shift = mmu_psize_defs[psize].shift;

arch/powerpc/platforms/pseries/lpar.c

1262

max_hpte_count = 1U << (PMD_SHIFT - shift);

arch/powerpc/platforms/pseries/lpar.c

1271

addr = s_addr + (i * (1ul << shift));

arch/powerpc/platforms/pseries/lpar.c

1273

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/platforms/pseries/lpar.c

1332

unsigned long shift,

arch/powerpc/platforms/pseries/lpar.c

1337

hash = hpt_hash(vpn, shift, ssize);

arch/powerpc/platforms/pseries/lpar.c

1355

unsigned long index, shift, slot, current_vpgb, vpgb;

arch/powerpc/platforms/pseries/lpar.c

1365

pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {

arch/powerpc/platforms/pseries/lpar.c

1370

vpgb = (vpn >> (shift - VPN_SHIFT + 3));

arch/powerpc/platforms/pseries/lpar.c

1385

slot = compute_slot(pte, vpn, index, shift, ssize);

arch/powerpc/platforms/pseries/lpar.c

1534

unsigned long index, shift, slot;

arch/powerpc/platforms/pseries/lpar.c

1552

pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {

arch/powerpc/platforms/pseries/lpar.c

1553

slot = compute_slot(pte, vpn, index, shift, ssize);

arch/powerpc/platforms/pseries/lpar.c

1604

unsigned long shift;

arch/powerpc/platforms/pseries/lpar.c

1612

state->commit_rc = plpar_resize_hpt_commit(0, state->shift);

arch/powerpc/platforms/pseries/lpar.c

1617

ppc64_pft_size = state->shift;

arch/powerpc/platforms/pseries/lpar.c

1628

static int pseries_lpar_resize_hpt(unsigned long shift)

arch/powerpc/platforms/pseries/lpar.c

1631

.shift = shift,

arch/powerpc/platforms/pseries/lpar.c

1643

pr_info("Attempting to resize HPT to shift %lu\n", shift);

arch/powerpc/platforms/pseries/lpar.c

1647

rc = plpar_resize_hpt_prepare(0, shift);

arch/powerpc/platforms/pseries/lpar.c

1660

rc = plpar_resize_hpt_prepare(0, shift);

arch/powerpc/platforms/pseries/lpar.c

1699

shift, (long long) ktime_ms_delta(t1, t0),

arch/powerpc/platforms/pseries/lpar.c

994

hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize);

arch/powerpc/sysdev/cpm2.c

138

int shift;

arch/powerpc/sysdev/cpm2.c

205

shift = 24;

arch/powerpc/sysdev/cpm2.c

209

shift = 16;

arch/powerpc/sysdev/cpm2.c

213

shift = 8;

arch/powerpc/sysdev/cpm2.c

217

shift = 0;

arch/powerpc/sysdev/cpm2.c

221

shift = 24;

arch/powerpc/sysdev/cpm2.c

225

shift = 16;

arch/powerpc/sysdev/cpm2.c

229

shift = 8;

arch/powerpc/sysdev/cpm2.c

245

bits <<= shift;

arch/powerpc/sysdev/cpm2.c

246

mask <<= shift;

arch/powerpc/sysdev/cpm2.c

264

int shift;

arch/powerpc/sysdev/cpm2.c

284

shift = 4;

arch/powerpc/sysdev/cpm2.c

289

shift = 0;

arch/powerpc/sysdev/cpm2.c

305

bits <<= shift;

arch/powerpc/sysdev/cpm2.c

306

mask <<= shift;

arch/powerpc/xmon/ppc-dis.c

36

if (operand->shift >= 0)

arch/powerpc/xmon/ppc-dis.c

37

value = (insn >> operand->shift) & operand->bitm;

arch/powerpc/xmon/ppc-dis.c

39

value = (insn << -operand->shift) & operand->bitm;

arch/powerpc/xmon/ppc.h

242

int shift;

arch/powerpc/xmon/ppc.h

442

return (operand+1)->shift;

arch/riscv/include/asm/hugetlb.h

50

pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags);

arch/riscv/include/asm/kvm_vcpu_insn.h

17

int shift;

arch/riscv/kernel/traps_misaligned.c

226

int fp = 0, shift = 0, len = 0;

arch/riscv/kernel/traps_misaligned.c

245

shift = 8 * (sizeof(unsigned long) - len);

arch/riscv/kernel/traps_misaligned.c

249

shift = 8 * (sizeof(unsigned long) - len);

arch/riscv/kernel/traps_misaligned.c

261

shift = 8 * (sizeof(unsigned long) - len);

arch/riscv/kernel/traps_misaligned.c

267

shift = 8 * (sizeof(unsigned long) - len);

arch/riscv/kernel/traps_misaligned.c

272

shift = 8 * (sizeof(unsigned long) - len);

arch/riscv/kernel/traps_misaligned.c

276

shift = 8 * (sizeof(unsigned long) - len);

arch/riscv/kernel/traps_misaligned.c

281

shift = 8 * (sizeof(unsigned long) - len);

arch/riscv/kernel/traps_misaligned.c

303

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kernel/traps_misaligned.c

322

SET_RD(insn, regs, (long)(val.data_ulong << shift) >> shift);

arch/riscv/kvm/gstage.c

28

unsigned long shift = HGATP_PAGE_SHIFT + (kvm_riscv_gstage_index_bits * level);

arch/riscv/kvm/gstage.c

35

return (addr >> shift) & mask;

arch/riscv/kvm/vcpu_insn.c

379

int shift = 0, len = 0, insn_len = 0;

arch/riscv/kvm/vcpu_insn.c

412

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

415

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

418

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

422

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

428

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

434

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

439

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

443

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

448

shift = 8 * (sizeof(ulong) - len);

arch/riscv/kvm/vcpu_insn.c

460

vcpu->arch.mmio_decode.shift = shift;

arch/riscv/kvm/vcpu_insn.c

577

vcpu->arch.mmio_decode.shift = 0;

arch/riscv/kvm/vcpu_insn.c

634

int len, shift;

arch/riscv/kvm/vcpu_insn.c

646

shift = vcpu->arch.mmio_decode.shift;

arch/riscv/kvm/vcpu_insn.c

652

(ulong)data8 << shift >> shift);

arch/riscv/kvm/vcpu_insn.c

657

(ulong)data16 << shift >> shift);

arch/riscv/kvm/vcpu_insn.c

662

(ulong)data32 << shift >> shift);

arch/riscv/kvm/vcpu_insn.c

667

(ulong)data64 << shift >> shift);

arch/riscv/lib/csum.c

100

data = (data >> shift) << shift;

arch/riscv/lib/csum.c

118

unsigned int offset, shift;

arch/riscv/lib/csum.c

135

shift = offset * 8;

arch/riscv/lib/csum.c

138

data = (data >> shift) << shift;

arch/riscv/lib/csum.c

140

data = (data << shift) >> shift;

arch/riscv/lib/csum.c

78

unsigned int shift;

arch/riscv/lib/csum.c

96

shift = ((long)ptr - (long)end) * 8;

arch/riscv/lib/csum.c

98

data = (data << shift) >> shift;

arch/riscv/mm/hugetlbpage.c

187

pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags)

arch/riscv/mm/hugetlbpage.c

192

if (shift == napot_cont_shift(order)) {

arch/riscv/net/bpf_jit_comp64.c

205

int shift;

arch/riscv/net/bpf_jit_comp64.c

220

shift = __ffs(upper);

arch/riscv/net/bpf_jit_comp64.c

221

upper >>= shift;

arch/riscv/net/bpf_jit_comp64.c

222

shift += 12;

arch/riscv/net/bpf_jit_comp64.c

226

emit_slli(rd, rd, shift, ctx);

arch/s390/include/asm/cmpxchg.h

178

int shift = (3 ^ (ptr & 3)) << 3;

arch/s390/include/asm/cmpxchg.h

182

mask = ~(0xff << shift);

arch/s390/include/asm/cmpxchg.h

186

new |= x << shift;

arch/s390/include/asm/cmpxchg.h

188

return old >> shift;

arch/s390/include/asm/cmpxchg.h

193

int shift = (2 ^ (ptr & 2)) << 3;

arch/s390/include/asm/cmpxchg.h

197

mask = ~(0xffff << shift);

arch/s390/include/asm/cmpxchg.h

201

new |= x << shift;

arch/s390/include/asm/cmpxchg.h

203

return old >> shift;

arch/s390/include/asm/pgtable.h

1405

unsigned int shift;

arch/s390/include/asm/pgtable.h

1410

shift = ((rste & _REGION_ENTRY_TYPE_MASK) >> 2) * 11 + 20;

arch/s390/include/asm/pgtable.h

1411

return pgd + ((address >> shift) & (PTRS_PER_PGD - 1));

arch/s390/kernel/dis.c

356

cp = code + operand->shift / 8;

arch/s390/kernel/dis.c

357

bits = (operand->shift & 7) + operand->bits;

arch/s390/kernel/dis.c

368

if (operand->bits == 20 && operand->shift == 20)

arch/s390/kernel/dis.c

373

if (operand->shift == 8)

arch/s390/kernel/dis.c

375

else if (operand->shift == 12)

arch/s390/kernel/dis.c

377

else if (operand->shift == 16)

arch/s390/kernel/dis.c

379

else if (operand->shift == 32)

arch/s390/kernel/dis.c

48

unsigned char shift; /* The number of bits to shift. */

arch/s390/kernel/module.c

178

int sign, int bits, int shift,

arch/s390/kernel/module.c

185

if (val & ((1UL << shift) - 1))

arch/s390/kernel/module.c

188

val = (Elf_Addr)(((long) val) >> shift);

arch/s390/kernel/module.c

194

val >>= shift;

arch/s390/kernel/time.c

156

cd->shift = 12;

arch/s390/kernel/time.c

233

.shift = 24,

arch/s390/lib/uaccess.c

101

*uval = prev >> shift;

arch/s390/lib/uaccess.c

110

unsigned int prev, shift, mask, _old, _new;

arch/s390/lib/uaccess.c

113

shift = (2 ^ (address & 2)) << 3;

arch/s390/lib/uaccess.c

115

_old = (unsigned int)old << shift;

arch/s390/lib/uaccess.c

116

_new = (unsigned int)new << shift;

arch/s390/lib/uaccess.c

117

mask = ~(0xffff << shift);

arch/s390/lib/uaccess.c

119

*uval = prev >> shift;

arch/s390/lib/uaccess.c

92

unsigned int prev, shift, mask, _old, _new;

arch/s390/lib/uaccess.c

95

shift = (3 ^ (address & 3)) << 3;

arch/s390/lib/uaccess.c

97

_old = (unsigned int)old << shift;

arch/s390/lib/uaccess.c

98

_new = (unsigned int)new << shift;

arch/s390/lib/uaccess.c

99

mask = ~(0xff << shift);

arch/s390/pci/pci_mmio.c

215

int shift = ulen * 8;

arch/s390/pci/pci_mmio.c

247

[shift] "+a" (shift)

arch/sh/boards/mach-x3proto/ilsel.c

63

unsigned int tmp, shift;

arch/sh/boards/mach-x3proto/ilsel.c

69

shift = mk_ilsel_shift(bit);

arch/sh/boards/mach-x3proto/ilsel.c

72

__func__, bit, addr, shift, set);

arch/sh/boards/mach-x3proto/ilsel.c

75

tmp &= ~(0xf << shift);

arch/sh/boards/mach-x3proto/ilsel.c

76

tmp |= set << shift;

arch/sh/drivers/pci/ops-sh4.c

65

int shift;

arch/sh/drivers/pci/ops-sh4.c

75

shift = (where & 3) << 3;

arch/sh/drivers/pci/ops-sh4.c

76

data &= ~(0xff << shift);

arch/sh/drivers/pci/ops-sh4.c

77

data |= ((val & 0xff) << shift);

arch/sh/drivers/pci/ops-sh4.c

80

shift = (where & 2) << 3;

arch/sh/drivers/pci/ops-sh4.c

81

data &= ~(0xffff << shift);

arch/sh/drivers/pci/ops-sh4.c

82

data |= ((val & 0xffff) << shift);

arch/sh/drivers/pci/ops-sh7786.c

129

int shift, ret;

arch/sh/drivers/pci/ops-sh7786.c

148

shift = (where & 3) << 3;

arch/sh/drivers/pci/ops-sh7786.c

149

data &= ~(0xff << shift);

arch/sh/drivers/pci/ops-sh7786.c

150

data |= ((val & 0xff) << shift);

arch/sh/drivers/pci/ops-sh7786.c

152

shift = (where & 2) << 3;

arch/sh/drivers/pci/ops-sh7786.c

153

data &= ~(0xffff << shift);

arch/sh/drivers/pci/ops-sh7786.c

154

data |= ((val & 0xffff) << shift);

arch/sh/include/asm/hw_irq.h

14

unsigned char shift; /* Number of bits to shift the data */

arch/sh/kernel/cpu/irq/ipr.c

35

__raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);

arch/sh/kernel/cpu/irq/ipr.c

44

__raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);

arch/sh/kernel/dwarf.c

149

int shift, count;

arch/sh/kernel/dwarf.c

152

shift = 0;

arch/sh/kernel/dwarf.c

160

result |= (byte & 0x7f) << shift;

arch/sh/kernel/dwarf.c

161

shift += 7;

arch/sh/kernel/dwarf.c

183

int result, shift;

arch/sh/kernel/dwarf.c

188

shift = 0;

arch/sh/kernel/dwarf.c

194

result |= (byte & 0x7f) << shift;

arch/sh/kernel/dwarf.c

195

shift += 7;

arch/sh/kernel/dwarf.c

205

if ((shift < num_bits) && (byte & 0x40))

arch/sh/kernel/dwarf.c

206

result |= (-1 << shift);

arch/sh/kernel/perf_event.c

163

int shift = 0;

arch/sh/kernel/perf_event.c

193

delta = (new_raw_count << shift) - (prev_raw_count << shift);

arch/sh/kernel/perf_event.c

194

delta >>= shift;

arch/sparc/include/asm/pgtable_64.h

396

pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags);

arch/sparc/include/asm/vvar.h

22

int shift;

arch/sparc/kernel/iommu-common.c

113

unsigned long shift;

arch/sparc/kernel/iommu-common.c

152

shift = iommu->table_map_base >> iommu->table_shift;

arch/sparc/kernel/iommu-common.c

153

if (limit + shift > mask) {

arch/sparc/kernel/iommu-common.c

154

limit = mask - shift + 1;

arch/sparc/kernel/iommu-common.c

175

shift = 0;

arch/sparc/kernel/iommu-common.c

181

n = iommu_area_alloc(iommu->map, limit, start, npages, shift,

arch/sparc/kernel/iommu-common.c

251

unsigned long shift = iommu->table_shift;

arch/sparc/kernel/iommu-common.c

254

entry = (dma_addr - iommu->table_map_base) >> shift;

arch/sparc/kernel/iommu_common.h

39

unsigned long shift,

arch/sparc/kernel/iommu_common.h

48

return iommu_is_span_boundary(entry, nr, shift, boundary_size);

arch/sparc/kernel/ldc.c

1026

unsigned long i, shift;

arch/sparc/kernel/ldc.c

1028

shift = (cookie >> COOKIE_PGSZ_CODE_SHIFT) * 3;

arch/sparc/kernel/ldc.c

1032

sun4v_ldc_revoke(id, cookie + (i << shift),

arch/sparc/kernel/pci_sun4v.c

660

unsigned long shift = IO_PAGE_SHIFT;

arch/sparc/kernel/pci_sun4v.c

673

entry = ((dma_handle - tbl->table_map_base) >> shift);

arch/sparc/kernel/perf_event.c

193

u64 shift, mask, pic;

arch/sparc/kernel/perf_event.c

195

shift = 0;

arch/sparc/kernel/perf_event.c

197

shift = 32;

arch/sparc/kernel/perf_event.c

199

mask = ((u64) 0xffffffff) << shift;

arch/sparc/kernel/perf_event.c

200

val <<= shift;

arch/sparc/kernel/perf_event.c

866

int shift = 64 - 32;

arch/sparc/kernel/perf_event.c

878

delta = (new_raw_count << shift) - (prev_raw_count << shift);

arch/sparc/kernel/perf_event.c

879

delta >>= shift;

arch/sparc/kernel/time_32.c

131

ce->shift = 32;

arch/sparc/kernel/time_32.c

133

ce->shift);

arch/sparc/kernel/time_32.c

227

ce->shift = 32;

arch/sparc/kernel/time_32.c

229

ce->shift);

arch/sparc/kernel/time_64.c

713

.shift = 30,

arch/sparc/kernel/time_64.c

864

clocksource_tick.mult, clocksource_tick.shift);

arch/sparc/kernel/time_64.c

877

sparc64_clockevent.mult, sparc64_clockevent.shift);

arch/sparc/kernel/vdso.c

36

vdata->clock.shift = tk->tkr_mono.shift;

arch/sparc/kernel/vdso.c

45

tk->tkr_mono.shift);

arch/sparc/kernel/vdso.c

48

(((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {

arch/sparc/kernel/vdso.c

50

((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;

arch/sparc/kernel/vdso.c

56

(long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);

arch/sparc/mm/hugetlbpage.c

111

unsigned int shift;

arch/sparc/mm/hugetlbpage.c

115

shift = HPAGE_16GB_SHIFT;

arch/sparc/mm/hugetlbpage.c

118

shift = HPAGE_2GB_SHIFT;

arch/sparc/mm/hugetlbpage.c

121

shift = HPAGE_256MB_SHIFT;

arch/sparc/mm/hugetlbpage.c

124

shift = REAL_HPAGE_SHIFT;

arch/sparc/mm/hugetlbpage.c

127

shift = HPAGE_64K_SHIFT;

arch/sparc/mm/hugetlbpage.c

130

shift = PAGE_SHIFT;

arch/sparc/mm/hugetlbpage.c

133

return shift;

arch/sparc/mm/hugetlbpage.c

139

unsigned int shift;

arch/sparc/mm/hugetlbpage.c

143

shift = HPAGE_256MB_SHIFT;

arch/sparc/mm/hugetlbpage.c

146

shift = REAL_HPAGE_SHIFT;

arch/sparc/mm/hugetlbpage.c

149

shift = HPAGE_64K_SHIFT;

arch/sparc/mm/hugetlbpage.c

152

shift = PAGE_SHIFT;

arch/sparc/mm/hugetlbpage.c

155

return shift;

arch/sparc/mm/hugetlbpage.c

168

unsigned long shift = tte_to_shift(entry);

arch/sparc/mm/hugetlbpage.c

170

if (shift == PAGE_SHIFT)

arch/sparc/mm/hugetlbpage.c

174

return shift;

arch/sparc/mm/hugetlbpage.c

23

static pte_t sun4u_hugepage_shift_to_tte(pte_t entry, unsigned int shift)

arch/sparc/mm/hugetlbpage.c

243

unsigned int nptes, orig_shift, shift;

arch/sparc/mm/hugetlbpage.c

249

shift = PAGE_SHIFT;

arch/sparc/mm/hugetlbpage.c

251

shift = PUD_SHIFT;

arch/sparc/mm/hugetlbpage.c

253

shift = PMD_SHIFT;

arch/sparc/mm/hugetlbpage.c

255

shift = PAGE_SHIFT;

arch/sparc/mm/hugetlbpage.c

257

nptes = size >> shift;

arch/sparc/mm/hugetlbpage.c

267

ptep[i] = __pte(pte_val(entry) + (i << shift));

arch/sparc/mm/hugetlbpage.c

285

unsigned int i, nptes, orig_shift, shift;

arch/sparc/mm/hugetlbpage.c

29

switch (shift) {

arch/sparc/mm/hugetlbpage.c

292

shift = PAGE_SHIFT;

arch/sparc/mm/hugetlbpage.c

294

shift = PUD_SHIFT;

arch/sparc/mm/hugetlbpage.c

296

shift = PMD_SHIFT;

arch/sparc/mm/hugetlbpage.c

298

shift = PAGE_SHIFT;

arch/sparc/mm/hugetlbpage.c

300

nptes = size >> shift;

arch/sparc/mm/hugetlbpage.c

41

WARN_ONCE(1, "unsupported hugepage shift=%u\n", shift);

arch/sparc/mm/hugetlbpage.c

48

static pte_t sun4v_hugepage_shift_to_tte(pte_t entry, unsigned int shift)

arch/sparc/mm/hugetlbpage.c

54

switch (shift) {

arch/sparc/mm/hugetlbpage.c

74

WARN_ONCE(1, "unsupported hugepage shift=%u\n", shift);

arch/sparc/mm/hugetlbpage.c

81

static pte_t hugepage_shift_to_tte(pte_t entry, unsigned int shift)

arch/sparc/mm/hugetlbpage.c

84

return sun4v_hugepage_shift_to_tte(entry, shift);

arch/sparc/mm/hugetlbpage.c

86

return sun4u_hugepage_shift_to_tte(entry, shift);

arch/sparc/mm/hugetlbpage.c

89

pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags)

arch/sparc/mm/hugetlbpage.c

94

pte = hugepage_shift_to_tte(entry, shift);

arch/sparc/mm/init_64.c

2281

unsigned long end_pfn, shift, phys_base;

arch/sparc/mm/init_64.c

2386

shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);

arch/sparc/mm/init_64.c

2396

init_mm.pgd += ((shift) / (sizeof(pgd_t)));

arch/sparc/net/bpf_jit_comp_64.c

412

int lowest_bit_set, int shift)

arch/sparc/net/bpf_jit_comp_64.c

417

lo = (low_bits >> lowest_bit_set) << shift;

arch/sparc/net/bpf_jit_comp_64.c

418

hi = ((high_bits << (32 - lowest_bit_set)) << shift);

arch/sparc/net/bpf_jit_comp_64.c

421

hi = ((high_bits >> (lowest_bit_set - 32)) << shift);

arch/sparc/net/bpf_jit_comp_64.c

493

int shift = lowest_bit_set;

arch/sparc/net/bpf_jit_comp_64.c

502

shift = -(63 - highest_bit_set);

arch/sparc/net/bpf_jit_comp_64.c

505

if (shift > 0)

arch/sparc/net/bpf_jit_comp_64.c

506

emit_alu_K(SLLX, dest, shift, ctx);

arch/sparc/net/bpf_jit_comp_64.c

507

else if (shift < 0)

arch/sparc/net/bpf_jit_comp_64.c

508

emit_alu_K(SRLX, dest, -shift, ctx);

arch/sparc/vdso/vclock_gettime.c

177

ns = __shr64(ns, vvar->clock.shift);

arch/sparc/vdso/vclock_gettime.c

197

ns = __shr64(ns, vvar->clock.shift);

arch/sparc/vdso/vclock_gettime.c

217

ns = __shr64(ns, vvar->clock.shift);

arch/sparc/vdso/vclock_gettime.c

237

ns = __shr64(ns, vvar->clock.shift);

arch/um/kernel/time.c

853

.shift = 0,

arch/x86/events/amd/brs.c

288

u32 shift = 64 - boot_cpu_data.x86_virt_bits;

arch/x86/events/amd/brs.c

339

to = (u64)(((s64)to << shift) >> shift);

arch/x86/events/amd/ibs.c

148

int shift = 64 - width;

arch/x86/events/amd/ibs.c

172

delta = (new_raw_count << shift) - (prev_raw_count << shift);

arch/x86/events/amd/ibs.c

173

delta >>= shift;

arch/x86/events/amd/iommu.c

160

u32 shift, bank, cntr;

arch/x86/events/amd/iommu.c

168

shift = bank + (bank*3) + cntr;

arch/x86/events/amd/iommu.c

169

if (piommu->cntr_assign_mask & BIT_ULL(shift)) {

arch/x86/events/amd/iommu.c

172

piommu->cntr_assign_mask |= BIT_ULL(shift);

arch/x86/events/amd/iommu.c

191

int shift = 0;

arch/x86/events/amd/iommu.c

199

shift = bank + cntr + (bank*3);

arch/x86/events/amd/iommu.c

202

perf_iommu->cntr_assign_mask &= ~(1ULL<<shift);

arch/x86/events/amd/lbr.c

93

u32 shift = 64 - boot_cpu_data.x86_virt_bits;

arch/x86/events/amd/lbr.c

95

return (u64)(((s64)ip << shift) >> shift);

arch/x86/events/amd/uncore.c

959

u64 prev, new, shift;

arch/x86/events/amd/uncore.c

962

shift = COUNTER_SHIFT + 1;

arch/x86/events/amd/uncore.c

984

delta = (new << shift) - (prev << shift);

arch/x86/events/amd/uncore.c

985

delta >>= shift;

arch/x86/events/core.c

131

int shift = 64 - x86_pmu.cntval_bits;

arch/x86/events/core.c

159

delta = (new_raw_count << shift) - (prev_raw_count << shift);

arch/x86/events/core.c

160

delta >>= shift;

arch/x86/events/intel/ds.c

2339

int shift = 64 - x86_pmu.cntval_bits;

arch/x86/events/intel/ds.c

2372

delta = (pmc << shift) - (prev_pmc << shift);

arch/x86/events/intel/ds.c

2373

delta >>= shift;

arch/x86/events/intel/ds.c

2789

int shift = 64 - x86_pmu.cntval_bits;

arch/x86/events/intel/ds.c

2832

new = ((s64)(new_raw_count << shift) >> shift);

arch/x86/events/intel/ds.c

2833

old = ((s64)(prev_raw_count << shift) >> shift);

arch/x86/events/intel/pt.c

82

unsigned int shift = __ffs(cd->mask);

arch/x86/events/intel/pt.c

84

return (c & cd->mask) >> shift;

arch/x86/events/intel/uncore.c

278

int shift;

arch/x86/events/intel/uncore.c

281

shift = 64 - uncore_freerunning_bits(box, event);

arch/x86/events/intel/uncore.c

283

shift = 64 - uncore_fixed_ctr_bits(box);

arch/x86/events/intel/uncore.c

285

shift = 64 - uncore_perf_ctr_bits(box);

arch/x86/events/intel/uncore.c

294

delta = (new_count << shift) - (prev_count << shift);

arch/x86/events/intel/uncore.c

295

delta >>= shift;

arch/x86/events/rapl.c

221

int shift = RAPL_CNTR_WIDTH;

arch/x86/events/rapl.c

237

delta = (new_raw_count << shift) - (prev_raw_count << shift);

arch/x86/events/rapl.c

238

delta >>= shift;

arch/x86/include/asm/pvclock.h

44

static __always_inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift)

arch/x86/include/asm/pvclock.h

53

if (shift < 0)

arch/x86/include/asm/pvclock.h

54

delta >>= -shift;

arch/x86/include/asm/pvclock.h

56

delta <<= shift;

arch/x86/include/asm/vdso/gettimeofday.h

232

return base >> vc->shift;

arch/x86/include/asm/vdso/gettimeofday.h

235

return mul_u64_u32_add_u64_shr(delta & S64_MAX, vc->mult, base, vc->shift);

arch/x86/include/asm/vdso/gettimeofday.h

238

return ((delta * vc->mult) + base) >> vc->shift;

arch/x86/kernel/apic/apic.c

502

.shift = 32,

arch/x86/kernel/apic/apic.c

742

TICK_NSEC, lapic_clockevent.shift);

arch/x86/kernel/apic/x2apic_uv_x.c

1011

addr1 = (base << shift) + f * (1ULL << m_io);

arch/x86/kernel/apic/x2apic_uv_x.c

1012

addr2 = (base << shift) + (l + 1) * (1ULL << m_io);

arch/x86/kernel/apic/x2apic_uv_x.c

1024

id, base, shift, m_io, max_io, max_pnode);

arch/x86/kernel/apic/x2apic_uv_x.c

1027

map_high(id, base, shift, m_io, max_io, map_uc);

arch/x86/kernel/apic/x2apic_uv_x.c

849

int shift;

arch/x86/kernel/apic/x2apic_uv_x.c

853

shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;

arch/x86/kernel/apic/x2apic_uv_x.c

857

shift = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;

arch/x86/kernel/apic/x2apic_uv_x.c

869

base = (gru.v & mask) >> shift;

arch/x86/kernel/apic/x2apic_uv_x.c

870

map_high("GRU", base, shift, shift, max_pnode, map_wb);

arch/x86/kernel/apic/x2apic_uv_x.c

871

gru_start_paddr = ((u64)base << shift);

arch/x86/kernel/apic/x2apic_uv_x.c

872

gru_end_paddr = gru_start_paddr + (1UL << shift) * (max_pnode + 1);

arch/x86/kernel/apic/x2apic_uv_x.c

878

int shift;

arch/x86/kernel/apic/x2apic_uv_x.c

887

shift = UVH_RH10_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;

arch/x86/kernel/apic/x2apic_uv_x.c

894

shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT;

arch/x86/kernel/apic/x2apic_uv_x.c

902

map_high("MMR", base, shift, shift, max_pnode, map_uc);

arch/x86/kernel/apic/x2apic_uv_x.c

917

int shift, unsigned long base, int m_io, int n_io)

arch/x86/kernel/cpu/mce/core.c

700

u8 shift = MCI_MISC_ADDR_LSB(m->misc);

arch/x86/kernel/cpu/mce/core.c

701

m->addr >>= shift;

arch/x86/kernel/cpu/mce/core.c

702

m->addr <<= shift;

arch/x86/kernel/cpu/mce/threshold.c

118

unsigned int shift = 1;

arch/x86/kernel/cpu/mce/threshold.c

135

shift = (delta + HZ) / HZ;

arch/x86/kernel/cpu/mce/threshold.c

139

if (shift < NUM_HISTORY_BITS)

arch/x86/kernel/cpu/mce/threshold.c

140

history = storm->banks[mce->bank].history << shift;

arch/x86/kernel/cpu/mtrr/cyrix.c

17

unsigned char arr, ccr3, rcr, shift;

arch/x86/kernel/cpu/mtrr/cyrix.c

34

shift = ((unsigned char *) base)[1] & 0x0f;

arch/x86/kernel/cpu/mtrr/cyrix.c

41

if (shift)

arch/x86/kernel/cpu/mtrr/cyrix.c

42

*size = (reg < 7 ? 0x1UL : 0x40UL) << (shift - 1);

arch/x86/kernel/cpu/resctrl/monitor.c

214

u64 shift = 64 - width, chunks;

arch/x86/kernel/cpu/resctrl/monitor.c

216

chunks = (cur_msr << shift) - (prev_msr << shift);

arch/x86/kernel/cpu/resctrl/monitor.c

217

return chunks >> shift;

arch/x86/kernel/cpu/topology.h

21

unsigned int shift, unsigned int ncpus);

arch/x86/kernel/cpu/topology.h

50

unsigned int shift, unsigned int ncpus)

arch/x86/kernel/cpu/topology.h

52

tscan->dom_shifts[dom] = shift;

arch/x86/kernel/cpu/topology_common.c

23

unsigned int shift, unsigned int ncpus)

arch/x86/kernel/cpu/topology_common.c

25

topology_update_dom(tscan, dom, shift, ncpus);

arch/x86/kernel/hpet.c

1279

clc >>= evt->shift + DEFAULT_RTC_SHIFT;

arch/x86/kernel/hpet.c

1377

clc >>= evt->shift;

arch/x86/kernel/hpet.c

307

delta >>= evt->shift;

arch/x86/kvm/mmu/paging_tmpl.h

100

return (gpte & PT32_DIR_PSE36_MASK) << shift;

arch/x86/kvm/mmu/paging_tmpl.h

98

int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;

arch/x86/kvm/vmx/vmx.c

8397

static inline int u64_shl_div_u64(u64 a, unsigned int shift,

arch/x86/kvm/vmx/vmx.c

8400

u64 low = a << shift, high = a >> (64 - shift);

arch/x86/kvm/x86.c

2349

u32 shift;

arch/x86/kvm/x86.c

2377

vdata->clock.shift = tk->tkr_mono.shift;

arch/x86/kvm/x86.c

2385

vdata->raw_clock.shift = tk->tkr_raw.shift;

arch/x86/kvm/x86.c

2485

int32_t shift = 0;

arch/x86/kvm/x86.c

2493

shift--;

arch/x86/kvm/x86.c

2502

shift++;

arch/x86/kvm/x86.c

2505

*pshift = shift;

arch/x86/kvm/x86.c

2978

ns >>= gtod->raw_clock.shift;

arch/x86/kvm/x86.c

3001

ns >>= gtod->clock.shift;

arch/x86/kvm/x86.c

3021

ns >>= gtod->clock.shift;

arch/x86/lib/csum-partial_64.c

101

unsigned int shift = (-len << 3) & 63;

arch/x86/lib/csum-partial_64.c

104

trail = (load_unaligned_zeropad(buff) << shift) >> shift;

arch/x86/math-emu/poly_2xm1.c

102

if (shift) {

arch/x86/math-emu/poly_2xm1.c

108

mul_Xsig_Xsig(&accumulator, shiftterm[shift]);

arch/x86/math-emu/poly_2xm1.c

55

long int exponent, shift;

arch/x86/math-emu/poly_2xm1.c

74

shift = (argSignif.msw & 0x40000000) ? 3 : 2;

arch/x86/math-emu/poly_2xm1.c

80

shift = 1;

arch/x86/math-emu/poly_2xm1.c

86

shift = 0;

arch/x86/platform/uv/uv_time.c

36

.shift = 20,

arch/x86/platform/uv/uv_time.c

366

NSEC_PER_SEC, clock_event_device_uv.shift);

arch/x86/xen/time.c

112

now.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);

arch/x86/xen/time.c

243

.shift = 0,

arch/x86/xen/time.c

304

.shift = 0,

block/badblocks.c

1056

if (bb->shift < 0)

block/badblocks.c

1064

if (bb->shift) {

block/badblocks.c

1074

roundup(s, 1 << bb->shift);

block/badblocks.c

1075

rounddown(target, 1 << bb->shift);

block/badblocks.c

1304

WARN_ON(bb->shift < 0 || sectors == 0);

block/badblocks.c

1306

if (bb->shift > 0) {

block/badblocks.c

1310

rounddown(s, 1 << bb->shift);

block/badblocks.c

1311

roundup(target, 1 << bb->shift);

block/badblocks.c

1421

if (bb->shift < 0)

block/badblocks.c

1441

(unsigned long long)s << bb->shift,

block/badblocks.c

1442

length << bb->shift);

block/badblocks.c

1497

bb->shift = 0;

block/badblocks.c

1499

bb->shift = -1;

block/badblocks.c

1505

bb->shift = -1;

block/badblocks.c

848

if (bb->shift < 0)

block/badblocks.c

856

if (bb->shift) {

block/badblocks.c

860

rounddown(s, 1 << bb->shift);

block/badblocks.c

861

roundup(next, 1 << bb->shift);

block/blk-iocost.c

1357

u64 tdelta, delay, new_delay, shift;

block/blk-iocost.c

1372

shift = div64_u64(tdelta, USEC_PER_SEC);

block/blk-iocost.c

1373

if (iocg->delay && shift < BITS_PER_LONG)

block/blk-iocost.c

1374

delay = iocg->delay >> shift;

crypto/ecc.c

251

static u64 vli_lshift(u64 *result, const u64 *in, unsigned int shift,

crypto/ecc.c

260

result[i] = (temp << shift) | carry;

crypto/ecc.c

261

carry = temp >> (64 - shift);

crypto/ecc.c

637

int shift = (ndigits * 2 * 64) - vli_num_bits(mod, ndigits);

crypto/ecc.c

638

int word_shift = shift / 64;

crypto/ecc.c

639

int bit_shift = shift % 64;

crypto/ecc.c

650

for (i = 1; shift >= 0; --shift) {

drivers/accel/amdxdna/aie2_message.c

497

u32 shift = xdna->dev_info->dev_mem_buf_shift;

drivers/accel/amdxdna/aie2_message.c

535

abo->mem.dev_addr >> shift);

drivers/accel/habanalabs/common/mmu/mmu.c

739

u64 mask, shift;

drivers/accel/habanalabs/common/mmu/mmu.c

746

shift = mmu_prop->hop_shifts[hop_idx];

drivers/accel/habanalabs/common/mmu/mmu.c

749

return hop_addr + ctx->hdev->asic_prop.mmu_pte_size * ((virt_addr & mask) >> shift);

drivers/accel/habanalabs/common/mmu/mmu_v1.c

18

u64 mask, shift;

drivers/accel/habanalabs/common/mmu/mmu_v1.c

21

shift = mmu_prop->hop_shifts[hop_idx];

drivers/accel/habanalabs/common/mmu/mmu_v1.c

23

ctx->hdev->asic_prop.mmu_pte_size * ((virt_addr & mask) >> shift);

drivers/accessibility/speakup/genmap.c

105

if (this == NULL || this->shift != is_spk)

drivers/accessibility/speakup/genmap.c

18

int value, shift;

drivers/accessibility/speakup/genmap.c

70

add_key(p_init->name, p_init->value, p_init->shift);

drivers/accessibility/speakup/genmap.c

87

if (this->shift == is_shift) {

drivers/accessibility/speakup/genmap.c

91

} else if (this->shift == is_input)

drivers/accessibility/speakup/main.c

2264

if (speakup_key(vc, param->shift, keycode, param->value, up))

drivers/accessibility/speakup/makemapdata.c

120

printf("\t{ \"%s\", %d, %d, },\n", this->name, this->value, this->shift);

drivers/accessibility/speakup/utils.h

100

this->shift = shift;

drivers/accessibility/speakup/utils.h

21

int value, shift;

drivers/accessibility/speakup/utils.h

83

static inline struct st_key *add_key(char *name, int value, int shift)

drivers/ata/ahci_sunxi.c

81

static u32 sunxi_getbits(void __iomem *reg, u8 mask, u8 shift)

drivers/ata/ahci_sunxi.c

83

return (readl(reg) >> shift) & mask;

drivers/ata/libata-core.c

3352

for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)

drivers/ata/libata-core.c

3353

if (ent->shift == xfer_shift)

drivers/ata/libata-core.c

6489

#define force_xfer(mode, shift) \

drivers/ata/libata-core.c

6490

{ #mode, .xfer_mask = (1UL << (shift)) }

drivers/ata/libata-core.c

904

int shift, bits;

drivers/ata/libata-core.c

931

for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)

drivers/ata/libata-core.c

932

if (highbit >= ent->shift && highbit < ent->shift + ent->bits)

drivers/ata/libata-core.c

933

return ent->base + highbit - ent->shift;

drivers/ata/libata-core.c

954

for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)

drivers/ata/libata-core.c

956

return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)

drivers/ata/libata-core.c

957

& ~((1 << ent->shift) - 1);

drivers/ata/libata-core.c

978

for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)

drivers/ata/libata-core.c

980

return ent->shift;

drivers/ata/pata_ali.c

146

int shift = 4 * adev->devno;

drivers/ata/pata_ali.c

153

fifo &= ~(0x0F << shift);

drivers/ata/pata_ali.c

154

fifo |= (on << shift);

drivers/ata/pata_ali.c

177

int shift = 4 * adev->devno;

drivers/ata/pata_ali.c

194

udma &= ~(0x0F << shift);

drivers/ata/pata_ali.c

195

udma |= ultra << shift;

drivers/ata/pata_cmd64x.c

202

int shift = 2 * adev->devno;

drivers/ata/pata_cmd64x.c

210

regU &= ~(0x30 << shift);

drivers/ata/pata_cmd64x.c

216

regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift;

drivers/ata/pata_efar.c

125

int shift = 4 * ap->port_no;

drivers/ata/pata_efar.c

134

slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift;

drivers/ata/pata_platform.c

53

unsigned int shift)

drivers/ata/pata_platform.c

56

ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << shift);

drivers/ata/pata_platform.c

57

ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << shift);

drivers/ata/pata_platform.c

58

ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << shift);

drivers/ata/pata_platform.c

59

ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << shift);

drivers/ata/pata_platform.c

60

ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << shift);

drivers/ata/pata_platform.c

61

ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << shift);

drivers/ata/pata_platform.c

62

ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << shift);

drivers/ata/pata_platform.c

63

ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << shift);

drivers/ata/pata_platform.c

64

ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << shift);

drivers/ata/pata_platform.c

65

ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << shift);

drivers/ata/pata_via.c

278

int shift = 2 * offset;

drivers/ata/pata_via.c

281

setup &= ~(3 << shift);

drivers/ata/pata_via.c

282

setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;

drivers/ata/sata_highbank.c

89

u32 shift)

drivers/ata/sata_highbank.c

91

return 1 << (3 * pdata->port_to_sgpio[port] + shift);

drivers/ata/sata_mv.c

1026

unsigned int shift, hardport, port = ap->port_no;

drivers/ata/sata_mv.c

1029

MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport);

drivers/ata/sata_mv.c

1031

disable_bits = (DONE_IRQ | ERR_IRQ) << shift;

drivers/ata/sata_mv.c

1032

enable_bits = port_bits << shift;

drivers/ata/sata_mv.c

2861

unsigned int p, shift, hardport, port_cause;

drivers/ata/sata_mv.c

2863

MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport);

drivers/ata/sata_mv.c

2869

u32 hc_cause = (main_irq_cause >> shift) & HC0_IRQ_PEND;

drivers/ata/sata_mv.c

2907

port_cause = (main_irq_cause >> shift) & (DONE_IRQ | ERR_IRQ);

drivers/ata/sata_mv.c

856

#define MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport) \

drivers/ata/sata_mv.c

858

shift = mv_hc_from_port(port) * HC_SHIFT; \

drivers/ata/sata_mv.c

860

shift += hardport * 2; \

drivers/ata/sata_nv.c

1557

int shift = ap->port_no * NV_INT_PORT_SHIFT;

drivers/ata/sata_nv.c

1561

mask &= ~(NV_INT_ALL << shift);

drivers/ata/sata_nv.c

1568

int shift = ap->port_no * NV_INT_PORT_SHIFT;

drivers/ata/sata_nv.c

1571

iowrite8(NV_INT_ALL << shift, scr_addr + NV_INT_STATUS);

drivers/ata/sata_nv.c

1574

mask |= (NV_INT_MASK << shift);

drivers/ata/sata_nv.c

1581

int shift = ap->port_no * NV_INT_PORT_SHIFT;

drivers/ata/sata_nv.c

1585

mask &= ~(NV_INT_ALL << shift);

drivers/ata/sata_nv.c

1592

int shift = ap->port_no * NV_INT_PORT_SHIFT;

drivers/ata/sata_nv.c

1595

writeb(NV_INT_ALL << shift, mmio_base + NV_INT_STATUS_CK804);

drivers/ata/sata_nv.c

1598

mask |= (NV_INT_MASK << shift);

drivers/ata/sata_nv.c

1605

int shift = ap->port_no * NV_INT_PORT_SHIFT_MCP55;

drivers/ata/sata_nv.c

1608

writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55);

drivers/ata/sata_nv.c

1611

mask &= ~(NV_INT_ALL_MCP55 << shift);

drivers/ata/sata_nv.c

1618

int shift = ap->port_no * NV_INT_PORT_SHIFT_MCP55;

drivers/ata/sata_nv.c

1621

writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55);

drivers/ata/sata_nv.c

1624

mask |= (NV_INT_MASK_MCP55 << shift);

drivers/atm/suni.c

42

#define REG_CHANGE(mask,shift,value,reg) \

drivers/atm/suni.c

43

PUT((GET(reg) & ~(mask)) | ((value) << (shift)),reg)

drivers/auxdisplay/hd44780_common.c

314

int shift;

drivers/auxdisplay/hd44780_common.c

328

shift = 0;

drivers/auxdisplay/hd44780_common.c

333

shift ^= 4;

drivers/auxdisplay/hd44780_common.c

338

value |= half << shift;

drivers/auxdisplay/hd44780_common.c

339

if (shift == 0) {

drivers/auxdisplay/lcd2s.c

241

int shift, i;

drivers/auxdisplay/lcd2s.c

253

shift = 0;

drivers/auxdisplay/lcd2s.c

258

shift ^= 4;

drivers/auxdisplay/lcd2s.c

263

value |= half << shift;

drivers/auxdisplay/lcd2s.c

264

if (shift == 0) {

drivers/base/regmap/internal.h

233

unsigned int shift;

drivers/base/regmap/internal.h

38

void (*format_reg)(void *buf, unsigned int reg, unsigned int shift);

drivers/base/regmap/internal.h

39

void (*format_val)(void *buf, unsigned int val, unsigned int shift);

drivers/base/regmap/regmap-sdw-mbq.c

132

int shift = BITS_PER_BYTE;

drivers/base/regmap/regmap-sdw-mbq.c

150

*val |= read << shift;

drivers/base/regmap/regmap-sdw-mbq.c

151

shift += BITS_PER_BYTE;

drivers/base/regmap/regmap-sdw-mbq.c

79

int shift = mbq_size * BITS_PER_BYTE;

drivers/base/regmap/regmap-sdw-mbq.c

83

shift -= BITS_PER_BYTE;

drivers/base/regmap/regmap-sdw-mbq.c

86

(val >> shift) & 0xff);

drivers/base/regmap/regmap.c

1221

rm_field->shift = reg_field.lsb;

drivers/base/regmap/regmap.c

2272

mask = (mask << field->shift) & field->mask;

drivers/base/regmap/regmap.c

2275

mask, val << field->shift,

drivers/base/regmap/regmap.c

2326

mask = (mask << field->shift) & field->mask;

drivers/base/regmap/regmap.c

2330

mask, val << field->shift,

drivers/base/regmap/regmap.c

266

static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)

drivers/base/regmap/regmap.c

270

b[0] = val << shift;

drivers/base/regmap/regmap.c

273

static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)

drivers/base/regmap/regmap.c

275

put_unaligned_be16(val << shift, buf);

drivers/base/regmap/regmap.c

278

static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)

drivers/base/regmap/regmap.c

280

put_unaligned_le16(val << shift, buf);

drivers/base/regmap/regmap.c

284

unsigned int shift)

drivers/base/regmap/regmap.c

286

u16 v = val << shift;

drivers/base/regmap/regmap.c

291

static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)

drivers/base/regmap/regmap.c

293

put_unaligned_be24(val << shift, buf);

drivers/base/regmap/regmap.c

296

static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)

drivers/base/regmap/regmap.c

298

put_unaligned_be32(val << shift, buf);

drivers/base/regmap/regmap.c

301

static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)

drivers/base/regmap/regmap.c

303

put_unaligned_le32(val << shift, buf);

drivers/base/regmap/regmap.c

307

unsigned int shift)

drivers/base/regmap/regmap.c

309

u32 v = val << shift;

drivers/base/regmap/regmap.c

3107

reg_val >>= field->shift;

drivers/base/regmap/regmap.c

3140

reg_val >>= field->shift;

drivers/bcma/sprom.c

204

static s8 sprom_extract_antgain(const u16 *in, u16 offset, u16 mask, u16 shift)

drivers/bcma/sprom.c

210

gain = (v & mask) >> shift;

drivers/block/drbd/drbd_proc.c

75

unsigned int shift = *rs_total > UINT_MAX ? 16 : 10;

drivers/block/drbd/drbd_proc.c

76

unsigned long left = *bits_left >> shift;

drivers/block/drbd/drbd_proc.c

77

unsigned long total = 1UL + (*rs_total >> shift);

drivers/block/null_blk/main.c

1430

if (dev->badblocks.shift != -1)

drivers/block/null_blk/main.c

563

cmpxchg(&t_dev->badblocks.shift, -1, 0);

drivers/block/null_blk/zoned.c

416

if (dev->badblocks.shift != -1) {

drivers/block/rbd.c

1645

u64 *index, u8 *shift)

drivers/block/rbd.c

1651

*shift = (OBJS_PER_BYTE - off - 1) * BITS_PER_OBJ;

drivers/block/rbd.c

1657

u8 shift;

drivers/block/rbd.c

1660

__rbd_object_map_index(rbd_dev, objno, &index, &shift);

drivers/block/rbd.c

1661

return (rbd_dev->object_map[index] >> shift) & OBJ_MASK;

drivers/block/rbd.c

1667

u8 shift;

drivers/block/rbd.c

1673

__rbd_object_map_index(rbd_dev, objno, &index, &shift);

drivers/block/rbd.c

1675

*p = (*p & ~(OBJ_MASK << shift)) | (val << shift);

drivers/bus/da8xx-mstpri.c

102

.shift = 16,

drivers/bus/da8xx-mstpri.c

107

.shift = 24,

drivers/bus/da8xx-mstpri.c

112

.shift = 28,

drivers/bus/da8xx-mstpri.c

117

.shift = 0,

drivers/bus/da8xx-mstpri.c

122

.shift = 8,

drivers/bus/da8xx-mstpri.c

127

.shift = 12,

drivers/bus/da8xx-mstpri.c

132

.shift = 20,

drivers/bus/da8xx-mstpri.c

137

.shift = 24,

drivers/bus/da8xx-mstpri.c

142

.shift = 28,

drivers/bus/da8xx-mstpri.c

240

reg |= prio->val << prio_descr->shift;

drivers/bus/da8xx-mstpri.c

55

int shift;

drivers/bus/da8xx-mstpri.c

62

.shift = 0,

drivers/bus/da8xx-mstpri.c

67

.shift = 4,

drivers/bus/da8xx-mstpri.c

72

.shift = 16,

drivers/bus/da8xx-mstpri.c

77

.shift = 20,

drivers/bus/da8xx-mstpri.c

82

.shift = 0,

drivers/bus/da8xx-mstpri.c

87

.shift = 4,

drivers/bus/da8xx-mstpri.c

92

.shift = 8,

drivers/bus/da8xx-mstpri.c

97

.shift = 12,

drivers/bus/intel-ixp4xx-eb.c

102

.shift = IXP4XX_EXP_T2_SHIFT,

drivers/bus/intel-ixp4xx-eb.c

108

.shift = IXP4XX_EXP_T3_SHIFT,

drivers/bus/intel-ixp4xx-eb.c

114

.shift = IXP4XX_EXP_T4_SHIFT,

drivers/bus/intel-ixp4xx-eb.c

120

.shift = IXP4XX_EXP_T5_SHIFT,

drivers/bus/intel-ixp4xx-eb.c

238

cs_cfg |= (val << ip->shift);

drivers/bus/intel-ixp4xx-eb.c

88

u16 shift;

drivers/bus/intel-ixp4xx-eb.c

96

.shift = IXP4XX_EXP_T1_SHIFT,

drivers/bus/omap_l3_smx.h

29

static const u64 shift = 1;

drivers/bus/omap_l3_smx.h

31

#define L3_STATUS_0_MPUIA_BRST (shift << 0)

drivers/bus/omap_l3_smx.h

32

#define L3_STATUS_0_MPUIA_RSP (shift << 1)

drivers/bus/omap_l3_smx.h

33

#define L3_STATUS_0_MPUIA_INBAND (shift << 2)

drivers/bus/omap_l3_smx.h

34

#define L3_STATUS_0_IVAIA_BRST (shift << 6)

drivers/bus/omap_l3_smx.h

35

#define L3_STATUS_0_IVAIA_RSP (shift << 7)

drivers/bus/omap_l3_smx.h

36

#define L3_STATUS_0_IVAIA_INBAND (shift << 8)

drivers/bus/omap_l3_smx.h

37

#define L3_STATUS_0_SGXIA_BRST (shift << 9)

drivers/bus/omap_l3_smx.h

38

#define L3_STATUS_0_SGXIA_RSP (shift << 10)

drivers/bus/omap_l3_smx.h

39

#define L3_STATUS_0_SGXIA_MERROR (shift << 11)

drivers/bus/omap_l3_smx.h

40

#define L3_STATUS_0_CAMIA_BRST (shift << 12)

drivers/bus/omap_l3_smx.h

41

#define L3_STATUS_0_CAMIA_RSP (shift << 13)

drivers/bus/omap_l3_smx.h

42

#define L3_STATUS_0_CAMIA_INBAND (shift << 14)

drivers/bus/omap_l3_smx.h

43

#define L3_STATUS_0_DISPIA_BRST (shift << 15)

drivers/bus/omap_l3_smx.h

44

#define L3_STATUS_0_DISPIA_RSP (shift << 16)

drivers/bus/omap_l3_smx.h

45

#define L3_STATUS_0_DMARDIA_BRST (shift << 18)

drivers/bus/omap_l3_smx.h

46

#define L3_STATUS_0_DMARDIA_RSP (shift << 19)

drivers/bus/omap_l3_smx.h

47

#define L3_STATUS_0_DMAWRIA_BRST (shift << 21)

drivers/bus/omap_l3_smx.h

48

#define L3_STATUS_0_DMAWRIA_RSP (shift << 22)

drivers/bus/omap_l3_smx.h

49

#define L3_STATUS_0_USBOTGIA_BRST (shift << 24)

drivers/bus/omap_l3_smx.h

50

#define L3_STATUS_0_USBOTGIA_RSP (shift << 25)

drivers/bus/omap_l3_smx.h

51

#define L3_STATUS_0_USBOTGIA_INBAND (shift << 26)

drivers/bus/omap_l3_smx.h

52

#define L3_STATUS_0_USBHOSTIA_BRST (shift << 27)

drivers/bus/omap_l3_smx.h

53

#define L3_STATUS_0_USBHOSTIA_INBAND (shift << 28)

drivers/bus/omap_l3_smx.h

54

#define L3_STATUS_0_SMSTA_REQ (shift << 48)

drivers/bus/omap_l3_smx.h

55

#define L3_STATUS_0_GPMCTA_REQ (shift << 49)

drivers/bus/omap_l3_smx.h

56

#define L3_STATUS_0_OCMRAMTA_REQ (shift << 50)

drivers/bus/omap_l3_smx.h

57

#define L3_STATUS_0_OCMROMTA_REQ (shift << 51)

drivers/bus/omap_l3_smx.h

58

#define L3_STATUS_0_IVATA_REQ (shift << 54)

drivers/bus/omap_l3_smx.h

59

#define L3_STATUS_0_SGXTA_REQ (shift << 55)

drivers/bus/omap_l3_smx.h

60

#define L3_STATUS_0_SGXTA_SERROR (shift << 56)

drivers/bus/omap_l3_smx.h

61

#define L3_STATUS_0_GPMCTA_SERROR (shift << 57)

drivers/bus/omap_l3_smx.h

62

#define L3_STATUS_0_L4CORETA_REQ (shift << 58)

drivers/bus/omap_l3_smx.h

63

#define L3_STATUS_0_L4PERTA_REQ (shift << 59)

drivers/bus/omap_l3_smx.h

64

#define L3_STATUS_0_L4EMUTA_REQ (shift << 60)

drivers/bus/omap_l3_smx.h

65

#define L3_STATUS_0_MAD2DTA_REQ (shift << 61)

drivers/bus/qcom-ebi2.c

166

u16 shift;

drivers/bus/qcom-ebi2.c

174

.shift = EBI2_XMEM_RECOVERY_SHIFT,

drivers/bus/qcom-ebi2.c

180

.shift = EBI2_XMEM_WR_HOLD_SHIFT,

drivers/bus/qcom-ebi2.c

186

.shift = EBI2_XMEM_WR_DELTA_SHIFT,

drivers/bus/qcom-ebi2.c

192

.shift = EBI2_XMEM_RD_DELTA_SHIFT,

drivers/bus/qcom-ebi2.c

198

.shift = EBI2_XMEM_WR_WAIT_SHIFT,

drivers/bus/qcom-ebi2.c

204

.shift = EBI2_XMEM_RD_WAIT_SHIFT,

drivers/bus/qcom-ebi2.c

210

.shift = EBI2_XMEM_ADDR_HOLD_ENA_SHIFT,

drivers/bus/qcom-ebi2.c

216

.shift = EBI2_XMEM_ADV_OE_RECOVERY_SHIFT,

drivers/bus/qcom-ebi2.c

222

.shift = EBI2_XMEM_RD_HOLD_SHIFT,

drivers/bus/qcom-ebi2.c

262

slowcfg |= BIT(xp->shift);

drivers/bus/qcom-ebi2.c

264

fastcfg |= BIT(xp->shift);

drivers/bus/qcom-ebi2.c

277

slowcfg |= (val << xp->shift);

drivers/bus/qcom-ebi2.c

279

fastcfg |= (val << xp->shift);

drivers/char/hw_random/n2-drv.c

624

u64 base, shift;

drivers/char/hw_random/n2-drv.c

630

shift = RNG_v1_CTL_VCO_SHIFT;

drivers/char/hw_random/n2-drv.c

635

shift = RNG_v2_CTL_VCO_SHIFT;

drivers/char/hw_random/n2-drv.c

645

(esrc << shift) |

drivers/clk/actions/owl-divider.c

33

val = reg >> div_hw->shift;

drivers/clk/actions/owl-divider.c

63

reg &= ~GENMASK(div_hw->width + div_hw->shift - 1, div_hw->shift);

drivers/clk/actions/owl-divider.c

66

reg | (val << div_hw->shift));

drivers/clk/actions/owl-divider.h

18

u8 shift;

drivers/clk/actions/owl-divider.h

32

.shift = _shift, \

drivers/clk/actions/owl-factor.c

158

val = reg >> factor_hw->shift;

drivers/clk/actions/owl-factor.c

199

reg &= ~(div_mask(factor_hw) << factor_hw->shift);

drivers/clk/actions/owl-factor.c

200

reg |= val << factor_hw->shift;

drivers/clk/actions/owl-factor.h

24

u8 shift;

drivers/clk/actions/owl-factor.h

38

.shift = _shift, \

drivers/clk/actions/owl-mux.c

23

parent = reg >> mux_hw->shift;

drivers/clk/actions/owl-mux.c

42

reg &= ~GENMASK(mux_hw->width + mux_hw->shift - 1, mux_hw->shift);

drivers/clk/actions/owl-mux.c

44

reg | (index << mux_hw->shift));

drivers/clk/actions/owl-mux.h

18

u8 shift;

drivers/clk/actions/owl-mux.h

30

.shift = _shift, \

drivers/clk/actions/owl-pll.c

111

val = val >> pll_hw->shift;

drivers/clk/actions/owl-pll.c

185

reg |= val << pll_hw->shift;

drivers/clk/actions/owl-pll.c

99

val = val >> pll_hw->shift;

drivers/clk/actions/owl-pll.h

28

u8 shift;

drivers/clk/actions/owl-pll.h

47

.shift = _shift, \

drivers/clk/at91/clk-peripheral.c

143

int shift = 0;

drivers/clk/at91/clk-peripheral.c

154

for (; shift < PERIPHERAL_MAX_SHIFT; shift++) {

drivers/clk/at91/clk-peripheral.c

155

if (parent_rate >> shift <= periph->range.max)

drivers/clk/at91/clk-peripheral.c

161

periph->div = shift;

drivers/clk/at91/clk-peripheral.c

258

u32 shift, long *best_diff,

drivers/clk/at91/clk-peripheral.c

261

unsigned long tmp_rate = parent_rate >> shift;

drivers/clk/at91/clk-peripheral.c

281

u32 shift;

drivers/clk/at91/clk-peripheral.c

290

for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {

drivers/clk/at91/clk-peripheral.c

291

tmp_rate = parent_rate >> shift;

drivers/clk/at91/clk-peripheral.c

297

shift, &best_diff, &best_rate);

drivers/clk/at91/clk-peripheral.c

311

for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {

drivers/clk/at91/clk-peripheral.c

314

clk_hw_forward_rate_request(hw, req, parent, &req_parent, req->rate << shift);

drivers/clk/at91/clk-peripheral.c

319

shift, &best_diff, &best_rate);

drivers/clk/at91/clk-peripheral.c

342

int shift = 0;

drivers/clk/at91/clk-peripheral.c

356

for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) {

drivers/clk/at91/clk-peripheral.c

357

cur_rate = req->best_parent_rate >> shift;

drivers/clk/at91/clk-peripheral.c

371

for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) {

drivers/clk/at91/clk-peripheral.c

372

cur_rate = req->best_parent_rate >> shift;

drivers/clk/at91/clk-peripheral.c

396

int shift;

drivers/clk/at91/clk-peripheral.c

408

for (shift = 0; shift <= PERIPHERAL_MAX_SHIFT; shift++) {

drivers/clk/at91/clk-peripheral.c

409

if (parent_rate >> shift == rate) {

drivers/clk/at91/clk-peripheral.c

411

periph->div = shift;

drivers/clk/at91/clk-programmable.c

154

int shift = 0;

drivers/clk/at91/clk-programmable.c

160

shift = div - 1;

drivers/clk/at91/clk-programmable.c

162

if (shift > layout->pres_mask)

drivers/clk/at91/clk-programmable.c

165

shift = fls(div) - 1;

drivers/clk/at91/clk-programmable.c

167

if (div != (1 << shift))

drivers/clk/at91/clk-programmable.c

170

if (shift >= layout->pres_mask)

drivers/clk/at91/clk-programmable.c

176

shift << layout->pres_shift);

drivers/clk/at91/clk-programmable.c

59

int shift;

drivers/clk/at91/clk-programmable.c

69

for (shift = 0; shift <= layout->pres_mask; shift++) {

drivers/clk/at91/clk-programmable.c

70

tmp_rate = parent_rate / (shift + 1);

drivers/clk/at91/clk-programmable.c

75

for (shift = 0; shift < layout->pres_mask; shift++) {

drivers/clk/at91/clk-programmable.c

76

tmp_rate = parent_rate >> shift;

drivers/clk/bcm/clk-bcm2835.c

1408

divider->div.shift = A2W_PLL_DIV_SHIFT;

drivers/clk/bcm/clk-cygnus.c

16

#define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, }

drivers/clk/bcm/clk-cygnus.c

21

#define SW_CTRL_VAL(o, s) { .offset = o, .shift = s, }

drivers/clk/bcm/clk-iproc-pll.c

155

if (val & (1 << ctrl->status.shift))

drivers/clk/bcm/clk-iproc-pll.c

286

if ((val & (1 << ctrl->status.shift)) == 0)

drivers/clk/bcm/clk-iproc-pll.c

290

ndiv_int = (val >> ctrl->ndiv_int.shift) &

drivers/clk/bcm/clk-iproc-pll.c

297

pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width);

drivers/clk/bcm/clk-iproc-pll.c

359

ctrl->ndiv_frac.shift);

drivers/clk/bcm/clk-iproc-pll.c

360

val |= vco->ndiv_frac << ctrl->ndiv_frac.shift;

drivers/clk/bcm/clk-iproc-pll.c

374

ctrl->macro_mode.shift);

drivers/clk/bcm/clk-iproc-pll.c

375

val |= PLL_USER_MODE << ctrl->macro_mode.shift;

drivers/clk/bcm/clk-iproc-pll.c

396

val &= ~(bit_mask(ctrl->ndiv_int.width) << ctrl->ndiv_int.shift);

drivers/clk/bcm/clk-iproc-pll.c

397

val |= vco->ndiv_int << ctrl->ndiv_int.shift;

drivers/clk/bcm/clk-iproc-pll.c

404

ctrl->ndiv_frac.shift);

drivers/clk/bcm/clk-iproc-pll.c

405

val |= vco->ndiv_frac << ctrl->ndiv_frac.shift;

drivers/clk/bcm/clk-iproc-pll.c

412

val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift);

drivers/clk/bcm/clk-iproc-pll.c

413

val |= vco->pdiv << ctrl->pdiv.shift;

drivers/clk/bcm/clk-iproc-pll.c

463

if ((val & (1 << ctrl->status.shift)) == 0)

drivers/clk/bcm/clk-iproc-pll.c

472

ndiv_int = (val >> ctrl->ndiv_int.shift) &

drivers/clk/bcm/clk-iproc-pll.c

478

ndiv_frac = (val >> ctrl->ndiv_frac.shift) &

drivers/clk/bcm/clk-iproc-pll.c

484

pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width);

drivers/clk/bcm/clk-iproc-pll.c

624

mdiv = (val >> ctrl->mdiv.shift) & bit_mask(ctrl->mdiv.width);

drivers/clk/bcm/clk-iproc-pll.c

679

val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift);

drivers/clk/bcm/clk-iproc-pll.c

681

val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift);

drivers/clk/bcm/clk-iproc-pll.c

682

val |= div << ctrl->mdiv.shift;

drivers/clk/bcm/clk-iproc-pll.c

709

val |= BIT(ctrl->sw_ctrl.shift);

drivers/clk/bcm/clk-iproc.h

144

unsigned int shift;

drivers/clk/bcm/clk-iproc.h

93

unsigned int shift;

drivers/clk/bcm/clk-kona-setup.c

191

static bool bitfield_valid(u32 shift, u32 width, const char *field_name,

drivers/clk/bcm/clk-kona-setup.c

201

if (shift + width > limit) {

drivers/clk/bcm/clk-kona-setup.c

203

field_name, clock_name, shift, width, limit);

drivers/clk/bcm/clk-kona-setup.c

286

if (!bitfield_valid(sel->shift, sel->width, field_name, clock_name))

drivers/clk/bcm/clk-kona-setup.c

339

if (!bitfield_valid(div->u.s.shift, div->u.s.width,

drivers/clk/bcm/clk-kona.c

29

static inline u32 bitfield_mask(u32 shift, u32 width)

drivers/clk/bcm/clk-kona.c

31

return ((1 << width) - 1) << shift;

drivers/clk/bcm/clk-kona.c

35

static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width)

drivers/clk/bcm/clk-kona.c

37

return (reg_val & bitfield_mask(shift, width)) >> shift;

drivers/clk/bcm/clk-kona.c

41

static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32 val)

drivers/clk/bcm/clk-kona.c

43

u32 mask = bitfield_mask(shift, width);

drivers/clk/bcm/clk-kona.c

45

return (reg_val & ~mask) | (val << shift);

drivers/clk/bcm/clk-kona.c

553

reg_div = bitfield_extract(reg_val, div->u.s.shift, div->u.s.width);

drivers/clk/bcm/clk-kona.c

583

reg_div = bitfield_extract(reg_val, div->u.s.shift,

drivers/clk/bcm/clk-kona.c

602

reg_val = bitfield_replace(reg_val, div->u.s.shift, div->u.s.width,

drivers/clk/bcm/clk-kona.c

831

parent_sel = bitfield_extract(reg_val, sel->shift, sel->width);

drivers/clk/bcm/clk-kona.c

868

parent_sel = bitfield_extract(reg_val, sel->shift, sel->width);

drivers/clk/bcm/clk-kona.c

887

reg_val = bitfield_replace(reg_val, sel->shift, sel->width, parent_sel);

drivers/clk/bcm/clk-kona.h

262

u32 shift; /* field shift */

drivers/clk/bcm/clk-kona.h

294

.u.s.shift = (_shift), \

drivers/clk/bcm/clk-kona.h

304

.u.s.shift = (_shift), \

drivers/clk/bcm/clk-kona.h

333

u32 shift; /* field shift */

drivers/clk/bcm/clk-kona.h

345

.shift = (_shift), \

drivers/clk/bcm/clk-ns2.c

14

#define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, }

drivers/clk/bcm/clk-nsp.c

14

#define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, }

drivers/clk/bcm/clk-sr.c

14

#define REG_VAL(o, s, w) { .offset = o, .shift = s, .width = w, }

drivers/clk/bcm/clk-sr.c

19

#define SW_CTRL_VAL(o, s) { .offset = o, .shift = s, }

drivers/clk/clk-axm5516.c

113

u32 shift;

drivers/clk/clk-axm5516.c

128

parent = (ctrl >> mux->shift) & ((1 << mux->width) - 1);

drivers/clk/clk-axm5516.c

216

.shift = 0,

drivers/clk/clk-axm5516.c

230

.shift = 4,

drivers/clk/clk-axm5516.c

244

.shift = 8,

drivers/clk/clk-axm5516.c

258

.shift = 12,

drivers/clk/clk-axm5516.c

272

.shift = 0,

drivers/clk/clk-axm5516.c

286

.shift = 4,

drivers/clk/clk-axm5516.c

300

.shift = 8,

drivers/clk/clk-axm5516.c

314

.shift = 12,

drivers/clk/clk-axm5516.c

328

.shift = 16,

drivers/clk/clk-axm5516.c

349

.shift = 0,

drivers/clk/clk-axm5516.c

366

.shift = 2,

drivers/clk/clk-axm5516.c

383

.shift = 4,

drivers/clk/clk-axm5516.c

400

.shift = 6,

drivers/clk/clk-axm5516.c

417

.shift = 0,

drivers/clk/clk-axm5516.c

434

.shift = 2,

drivers/clk/clk-axm5516.c

451

.shift = 4,

drivers/clk/clk-axm5516.c

466

.shift = 6,

drivers/clk/clk-axm5516.c

481

.shift = 9,

drivers/clk/clk-axm5516.c

78

u32 shift;

drivers/clk/clk-axm5516.c

94

div = 1 + ((ctrl >> divclk->shift) & ((1 << divclk->width)-1));

drivers/clk/clk-bm1880.c

188

.div.shift = _shift, \

drivers/clk/clk-bm1880.c

569

clks[i].shift, 1, 0,

drivers/clk/clk-bm1880.c

601

val = readl(reg_addr) >> div->shift;

drivers/clk/clk-bm1880.c

621

val = readl(reg_addr) >> div->shift;

drivers/clk/clk-bm1880.c

652

val &= ~(clk_div_mask(div->width) << div_hw->div.shift);

drivers/clk/clk-bm1880.c

653

val |= (u32)value << div->shift;

drivers/clk/clk-bm1880.c

773

mux->shift = clks->mux_shift;

drivers/clk/clk-bm1880.c

810

div_hws->div.shift = clks->div_shift;

drivers/clk/clk-bm1880.c

83

s8 shift;

drivers/clk/clk-bm1880.c

91

u8 shift;

drivers/clk/clk-divider.c

161

val = clk_div_readl(divider) >> divider->shift;

drivers/clk/clk-divider.c

443

val = clk_div_readl(divider) >> divider->shift;

drivers/clk/clk-divider.c

491

val = clk_div_mask(divider->width) << (divider->shift + 16);

drivers/clk/clk-divider.c

494

val &= ~(clk_div_mask(divider->width) << divider->shift);

drivers/clk/clk-divider.c

496

val |= (u32)value << divider->shift;

drivers/clk/clk-divider.c

524

void __iomem *reg, u8 shift, u8 width,

drivers/clk/clk-divider.c

534

if (width + shift > 16) {

drivers/clk/clk-divider.c

561

div->shift = shift;

drivers/clk/clk-divider.c

596

void __iomem *reg, u8 shift, u8 width,

drivers/clk/clk-divider.c

603

NULL, flags, reg, shift, width, clk_divider_flags,

drivers/clk/clk-divider.c

651

void __iomem *reg, u8 shift, u8 width,

drivers/clk/clk-divider.c

662

parent_data, flags, reg, shift, width,

drivers/clk/clk-ep93xx.c

385

index = (val & clk->mask) >> clk->shift;

drivers/clk/clk-ep93xx.c

430

val |= i << clk->shift;

drivers/clk/clk-ep93xx.c

451

u8 shift,

drivers/clk/clk-ep93xx.c

467

clk->mask = GENMASK(shift + width - 1, shift);

drivers/clk/clk-ep93xx.c

468

clk->shift = shift;

drivers/clk/clk-ep93xx.c

82

u8 shift;

drivers/clk/clk-eyeq.c

141

unsigned int shift;

drivers/clk/clk-eyeq.c

157

shift = __fls(biggest) - (BITS_PER_BYTE * sizeof(unsigned int)) + 1;

drivers/clk/clk-eyeq.c

159

*mult >>= shift;

drivers/clk/clk-eyeq.c

160

*div >>= shift;

drivers/clk/clk-eyeq.c

287

&parent_data, 0, reg, div->shift, div->width,

drivers/clk/clk-eyeq.c

529

.shift = 0,

drivers/clk/clk-eyeq.c

604

.shift = 4,

drivers/clk/clk-eyeq.c

612

.shift = 4,

drivers/clk/clk-eyeq.c

620

.shift = 8,

drivers/clk/clk-eyeq.c

628

.shift = 4,

drivers/clk/clk-eyeq.c

88

u8 shift;

drivers/clk/clk-fsl-sai.c

52

sai_clk->div.shift = CR2_DIV_SHIFT;

drivers/clk/clk-k210.c

627

unsigned int shift;

drivers/clk/clk-k210.c

632

shift = FIELD_GET(K210_ACLK_DIV, reg);

drivers/clk/clk-k210.c

634

return parent_rate / (2UL << shift);

drivers/clk/clk-loongson1.c

129

val &= ~(clk_div_mask(d->width) << d->shift);

drivers/clk/clk-loongson1.c

130

val |= (u32)div_val << d->shift;

drivers/clk/clk-loongson1.c

158

.shift = (_shift), \

drivers/clk/clk-loongson1.c

181

.shift = (_shift), \

drivers/clk/clk-loongson1.c

27

u8 shift;

drivers/clk/clk-loongson1.c

35

u8 shift;

drivers/clk/clk-loongson1.c

54

unsigned int shift,

drivers/clk/clk-loongson1.c

57

return (val & GENMASK(shift + width, shift)) >> shift;

drivers/clk/clk-loongson1.c

73

rate >>= d->shift;

drivers/clk/clk-loongson1.c

89

val = readl(ls1x_clk->reg) >> d->shift;

drivers/clk/clk-loongson2.c

276

static inline unsigned long loongson2_rate_part(u64 val, u8 shift, u8 width)

drivers/clk/clk-loongson2.c

278

return (val & GENMASK(shift + width - 1, shift)) >> shift;

drivers/clk/clk-milbeaut.c

285

val = readl(mux->reg) >> mux->shift;

drivers/clk/clk-milbeaut.c

305

reg &= ~(mux->mask << mux->shift);

drivers/clk/clk-milbeaut.c

307

val = (val | write_en) << mux->shift;

drivers/clk/clk-milbeaut.c

328

u8 shift, u32 mask, u8 clk_mux_flags, u32 *table,

drivers/clk/clk-milbeaut.c

347

mux->shift = shift;

drivers/clk/clk-milbeaut.c

368

u8 shift;

drivers/clk/clk-milbeaut.c

382

val = readl(divider->reg) >> divider->shift;

drivers/clk/clk-milbeaut.c

398

val = readl(divider->reg) >> divider->shift;

drivers/clk/clk-milbeaut.c

429

val &= ~(clk_div_mask(divider->width) << divider->shift);

drivers/clk/clk-milbeaut.c

431

val |= ((u32)value | write_en) << divider->shift;

drivers/clk/clk-milbeaut.c

458

void __iomem *reg, u8 shift, u8 width,

drivers/clk/clk-milbeaut.c

478

div->shift = shift;

drivers/clk/clk-milbeaut.c

517

factors->shift,

drivers/clk/clk-milbeaut.c

551

base + factors->offset, factors->shift,

drivers/clk/clk-milbeaut.c

73

u8 shift;

drivers/clk/clk-milbeaut.c

93

u8 shift;

drivers/clk/clk-multiplier.c

141

val &= ~GENMASK(mult->width + mult->shift - 1, mult->shift);

drivers/clk/clk-multiplier.c

142

val |= factor << mult->shift;

drivers/clk/clk-multiplier.c

47

val = clk_mult_readl(mult) >> mult->shift;

drivers/clk/clk-mux.c

112

reg = mux->mask << (mux->shift + 16);

drivers/clk/clk-mux.c

115

reg &= ~(mux->mask << mux->shift);

drivers/clk/clk-mux.c

117

val = val << mux->shift;

drivers/clk/clk-mux.c

154

unsigned long flags, void __iomem *reg, u8 shift, u32 mask,

drivers/clk/clk-mux.c

165

if (width + shift > 16) {

drivers/clk/clk-mux.c

189

mux->shift = shift;

drivers/clk/clk-mux.c

220

unsigned long flags, void __iomem *reg, u8 shift, u32 mask,

drivers/clk/clk-mux.c

230

parent_data, flags, reg, shift, mask,

drivers/clk/clk-mux.c

246

unsigned long flags, void __iomem *reg, u8 shift, u32 mask,

drivers/clk/clk-mux.c

252

num_parents, flags, reg, shift, mask,

drivers/clk/clk-mux.c

93

val = clk_mux_readl(mux) >> mux->shift;

drivers/clk/clk-npcm7xx.c

133

u8 shift;

drivers/clk/clk-npcm7xx.c

151

u8 shift;

drivers/clk/clk-npcm7xx.c

472

mux_data->shift, mux_data->mask, 0,

drivers/clk/clk-npcm7xx.c

492

div_data->shift, div_data->width,

drivers/clk/clk-npcm8xx.c

345

mux_data->shift,

drivers/clk/clk-npcm8xx.c

378

div_data->shift,

drivers/clk/clk-npcm8xx.c

398

div_data->shift,

drivers/clk/clk-npcm8xx.c

68

u8 shift;

drivers/clk/clk-npcm8xx.c

79

u8 shift;

drivers/clk/clk-rp1.c

1254

desc->div.shift = __ffs(PLL_SEC_DIV_MASK);

drivers/clk/clk-rp1.c

1255

desc->div.width = __ffs(~(PLL_SEC_DIV_MASK >> desc->div.shift));

drivers/clk/clk-si5341.c

413

unsigned int shift;

drivers/clk/clk-si5341.c

430

shift = 0;

drivers/clk/clk-si5341.c

433

++shift;

drivers/clk/clk-si5341.c

437

do_div(res, (m_den >> shift));

drivers/clk/clk-si5351.c

881

u8 shift = (num < 4) ? (2 * num) : (2 * (num-4));

drivers/clk/clk-si5351.c

882

u8 mask = SI5351_CLK_DISABLE_STATE_MASK << shift;

drivers/clk/clk-si5351.c

905

si5351_set_bits(drvdata, reg, mask, val << shift);

drivers/clk/clk-sp7021.c

549

unsigned long brate, int shift, int width,

drivers/clk/clk-sp7021.c

572

pll->div_shift = shift;

drivers/clk/clk-stm32f4.c

1198

void __iomem *reg, u8 bit_idx, u8 shift, unsigned long flags,

drivers/clk/clk-stm32f4.c

1224

mux->shift = shift;

drivers/clk/clk-stm32f4.c

1300

u8 shift;

drivers/clk/clk-stm32f4.c

1768

int offset_mux, u8 shift, u8 mask,

drivers/clk/clk-stm32f4.c

1801

mux->shift = shift;

drivers/clk/clk-stm32f4.c

1913

post_div->shift,

drivers/clk/clk-stm32f4.c

2016

aux_clk->offset_mux, aux_clk->shift,

drivers/clk/clk-stm32f4.c

560

u8 shift;

drivers/clk/clk-stm32f4.c

598

u8 shift;

drivers/clk/clk-stm32f4.c

808

void __iomem *reg, u8 shift, u8 width,

drivers/clk/clk-stm32f4.c

830

pll_div->div.shift = shift;

drivers/clk/clk-stm32f4.c

977

div_data[i].shift,

drivers/clk/clk-stm32h7.c

1266

stm32_mclk[n].shift,

drivers/clk/clk-stm32h7.c

258

u8 shift;

drivers/clk/clk-stm32h7.c

295

static struct clk_mux *_get_cmux(void __iomem *reg, u8 shift, u8 width,

drivers/clk/clk-stm32h7.c

305

mux->shift = shift;

drivers/clk/clk-stm32h7.c

313

static struct clk_divider *_get_cdiv(void __iomem *reg, u8 shift, u8 width,

drivers/clk/clk-stm32h7.c

324

div->shift = shift;

drivers/clk/clk-stm32h7.c

376

cfg->mux->shift,

drivers/clk/clk-stm32h7.c

389

cfg->div->shift,

drivers/clk/clk-stm32h7.c

562

u8 shift;

drivers/clk/clk-stm32h7.c

573

.shift = _mux_shift,\

drivers/clk/clk-versaclock3.c

162

u8 shift;

drivers/clk/clk-versaclock3.c

501

val >>= div_data->shift;

drivers/clk/clk-versaclock3.c

518

bestdiv >>= div_data->shift;

drivers/clk/clk-versaclock3.c

540

VC3_DIV_MASK(div_data->width) << div_data->shift,

drivers/clk/clk-versaclock3.c

541

value << div_data->shift);

drivers/clk/clk-versaclock3.c

813

.shift = 4,

drivers/clk/clk-versaclock3.c

831

.shift = 0,

drivers/clk/clk-versaclock3.c

849

.shift = 4,

drivers/clk/clk-versaclock3.c

867

.shift = 0,

drivers/clk/clk-versaclock3.c

885

.shift = 0,

drivers/clk/clk-versaclock7.c

282

int shift;

drivers/clk/clk-versaclock7.c

322

shift = __builtin_clzll(den);

drivers/clk/clk-versaclock7.c

323

den <<= shift;

drivers/clk/clk-versaclock7.c

324

numhi <<= shift;

drivers/clk/clk-versaclock7.c

325

numhi |= (numlo >> (-shift & 63)) & (-(s64)shift >> 63);

drivers/clk/clk-versaclock7.c

326

numlo <<= shift;

drivers/clk/clk-versaclock7.c

365

*r = (rem * b + num0 - q0 * den) >> shift;

drivers/clk/clk-xgene.c

224

u8 shift;

drivers/clk/clk-xgene.c

259

scale = (val & fd->mask) >> fd->shift;

drivers/clk/clk-xgene.c

328

val |= (scale << fd->shift);

drivers/clk/clk-xgene.c

348

unsigned long flags, void __iomem *reg, u8 shift,

drivers/clk/clk-xgene.c

366

fd->shift = shift;

drivers/clk/clk-xgene.c

367

fd->mask = (BIT(width) - 1) << shift;

drivers/clk/davinci/pll.c

260

divider->shift = DIV_RATIO_SHIFT;

drivers/clk/davinci/pll.c

606

divider->shift = DIV_RATIO_SHIFT;

drivers/clk/davinci/pll.c

707

divider->shift = DIV_RATIO_SHIFT;

drivers/clk/hisilicon/clk-hisi-phase.c

111

phase->shift = clks->shift;

drivers/clk/hisilicon/clk-hisi-phase.c

112

phase->mask = (BIT(clks->width) - 1) << clks->shift;

drivers/clk/hisilicon/clk-hisi-phase.c

23

u8 shift;

drivers/clk/hisilicon/clk-hisi-phase.c

48

regval = (regval & phase->mask) >> phase->shift;

drivers/clk/hisilicon/clk-hisi-phase.c

80

val |= regval << phase->shift;

drivers/clk/hisilicon/clk.c

163

base + clks[i].offset, clks[i].shift,

drivers/clk/hisilicon/clk.c

224

clks[i].shift, clks[i].width,

drivers/clk/hisilicon/clk.c

328

clks[i].shift,

drivers/clk/hisilicon/clk.h

112

u8 shift, u8 width, u32 mask_bit, spinlock_t *lock);

drivers/clk/hisilicon/clk.h

50

u8 shift;

drivers/clk/hisilicon/clk.h

63

u8 shift;

drivers/clk/hisilicon/clk.h

76

u8 shift;

drivers/clk/hisilicon/clk.h

89

u8 shift;

drivers/clk/hisilicon/clkdivider-hi6220.c

102

u8 shift, u8 width, u32 mask_bit, spinlock_t *lock)

drivers/clk/hisilicon/clkdivider-hi6220.c

139

div->shift = shift;

drivers/clk/hisilicon/clkdivider-hi6220.c

35

u8 shift;

drivers/clk/hisilicon/clkdivider-hi6220.c

51

val = readl_relaxed(dclk->reg) >> dclk->shift;

drivers/clk/hisilicon/clkdivider-hi6220.c

82

data &= ~(div_mask(dclk->width) << dclk->shift);

drivers/clk/hisilicon/clkdivider-hi6220.c

83

data |= value << dclk->shift;

drivers/clk/imx/clk-busy.c

121

u8 shift;

drivers/clk/imx/clk-busy.c

145

ret = clk_busy_wait(busy->reg, busy->shift);

drivers/clk/imx/clk-busy.c

156

struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift,

drivers/clk/imx/clk-busy.c

16

static int clk_busy_wait(void __iomem *reg, u8 shift)

drivers/clk/imx/clk-busy.c

170

busy->shift = busy_shift;

drivers/clk/imx/clk-busy.c

173

busy->mux.shift = shift;

drivers/clk/imx/clk-busy.c

20

while (readl_relaxed(reg) & (1 << shift))

drivers/clk/imx/clk-busy.c

31

u8 shift;

drivers/clk/imx/clk-busy.c

65

ret = clk_busy_wait(busy->reg, busy->shift);

drivers/clk/imx/clk-busy.c

77

void __iomem *reg, u8 shift, u8 width,

drivers/clk/imx/clk-busy.c

90

busy->shift = busy_shift;

drivers/clk/imx/clk-busy.c

93

busy->div.shift = shift;

drivers/clk/imx/clk-composite-7ulp.c

107

mux->shift = PCG_PCS_SHIFT;

drivers/clk/imx/clk-composite-8m.c

121

prediv_value = val >> divider->shift;

drivers/clk/imx/clk-composite-8m.c

161

reg &= ~(mux->mask << mux->shift);

drivers/clk/imx/clk-composite-8m.c

162

val = val << mux->shift;

drivers/clk/imx/clk-composite-8m.c

240

mux->shift = PCG_PCS_SHIFT;

drivers/clk/imx/clk-composite-8m.c

251

div->shift = PCG_DIV_SHIFT;

drivers/clk/imx/clk-composite-8m.c

256

div->shift = PCG_PREDIV_SHIFT;

drivers/clk/imx/clk-composite-8m.c

261

div->shift = PCG_PREDIV_SHIFT;

drivers/clk/imx/clk-composite-8m.c

36

prediv_value = readl(divider->reg) >> divider->shift;

drivers/clk/imx/clk-composite-8m.c

95

val = orig & ~((clk_div_mask(divider->width) << divider->shift) |

drivers/clk/imx/clk-composite-8m.c

98

val |= (u32)(prediv_value - 1) << divider->shift;

drivers/clk/imx/clk-composite-93.c

124

val &= ~(clk_div_mask(divider->width) << divider->shift);

drivers/clk/imx/clk-composite-93.c

125

val |= (u32)value << divider->shift;

drivers/clk/imx/clk-composite-93.c

159

reg &= ~(mux->mask << mux->shift);

drivers/clk/imx/clk-composite-93.c

160

val = val << mux->shift;

drivers/clk/imx/clk-composite-93.c

202

mux->shift = CCM_MUX_SHIFT;

drivers/clk/imx/clk-composite-93.c

212

div->shift = CCM_DIV_SHIFT;

drivers/clk/imx/clk-divider-gate.c

118

val |= div_gate->cached_val << div->shift;

drivers/clk/imx/clk-divider-gate.c

136

val = readl(div->reg) >> div->shift;

drivers/clk/imx/clk-divider-gate.c

149

val = readl(div->reg) >> div->shift;

drivers/clk/imx/clk-divider-gate.c

178

u8 shift, u8 width, u8 clk_divider_flags,

drivers/clk/imx/clk-divider-gate.c

202

div_gate->divider.shift = shift;

drivers/clk/imx/clk-divider-gate.c

209

val = readl(reg) >> shift;

drivers/clk/imx/clk-divider-gate.c

32

val = readl(div->reg) >> div->shift;

drivers/clk/imx/clk-divider-gate.c

54

val = readl(div->reg) >> div->shift;

drivers/clk/imx/clk-divider-gate.c

91

val &= ~(clk_div_mask(div->width) << div->shift);

drivers/clk/imx/clk-divider-gate.c

92

val |= (u32)value << div->shift;

drivers/clk/imx/clk-fixup-div.c

111

fixup_div->divider.shift = shift;

drivers/clk/imx/clk-fixup-div.c

72

val &= ~(div_mask(div) << div->shift);

drivers/clk/imx/clk-fixup-div.c

73

val |= value << div->shift;

drivers/clk/imx/clk-fixup-div.c

89

void __iomem *reg, u8 shift, u8 width,

drivers/clk/imx/clk-fixup-mux.c

52

val &= ~(mux->mask << mux->shift);

drivers/clk/imx/clk-fixup-mux.c

53

val |= index << mux->shift;

drivers/clk/imx/clk-fixup-mux.c

69

u8 shift, u8 width, const char * const *parents,

drivers/clk/imx/clk-fixup-mux.c

91

fixup_mux->mux.shift = shift;

drivers/clk/imx/clk-gate-exclusive.c

59

void __iomem *reg, u8 shift, u32 exclusive_mask)

drivers/clk/imx/clk-gate-exclusive.c

82

gate->bit_idx = shift;

drivers/clk/imx/clk-imx8-acm.c

376

sels[i].shift, sels[i].width,

drivers/clk/imx/clk-imx8-acm.c

49

u8 shift;

drivers/clk/imx/clk-imx8mp-audiomix.c

176

u8 shift;

drivers/clk/imx/clk-imx8mp-audiomix.c

311

base + sels[i].reg, sels[i].shift, 0, NULL);

drivers/clk/imx/clk-imx8mp-audiomix.c

317

sels[i].shift, sels[i].width,

drivers/clk/imx/clk.h

118

#define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \

drivers/clk/imx/clk.h

119

to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask))

drivers/clk/imx/clk.h

127

#define imx_clk_divider(name, parent, reg, shift, width) \

drivers/clk/imx/clk.h

128

to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))

drivers/clk/imx/clk.h

130

#define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \

drivers/clk/imx/clk.h

131

to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))

drivers/clk/imx/clk.h

133

#define imx_clk_gate(name, parent, reg, shift) \

drivers/clk/imx/clk.h

134

to_clk(imx_clk_hw_gate(name, parent, reg, shift))

drivers/clk/imx/clk.h

136

#define imx_clk_gate_dis(name, parent, reg, shift) \

drivers/clk/imx/clk.h

137

to_clk(imx_clk_hw_gate_dis(name, parent, reg, shift))

drivers/clk/imx/clk.h

139

#define imx_clk_gate2(name, parent, reg, shift) \

drivers/clk/imx/clk.h

140

to_clk(imx_clk_hw_gate2(name, parent, reg, shift))

drivers/clk/imx/clk.h

142

#define imx_clk_gate2_cgr(name, parent, reg, shift, cgr_val) \

drivers/clk/imx/clk.h

143

to_clk(__imx_clk_hw_gate2(name, parent, reg, shift, cgr_val, 0, NULL))

drivers/clk/imx/clk.h

145

#define imx_clk_gate2_flags(name, parent, reg, shift, flags) \

drivers/clk/imx/clk.h

146

to_clk(imx_clk_hw_gate2_flags(name, parent, reg, shift, flags))

drivers/clk/imx/clk.h

148

#define imx_clk_mux(name, reg, shift, width, parents, num_parents) \

drivers/clk/imx/clk.h

149

to_clk(imx_clk_hw_mux(name, reg, shift, width, parents, num_parents))

drivers/clk/imx/clk.h

151

#define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \

drivers/clk/imx/clk.h

152

to_clk(imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags))

drivers/clk/imx/clk.h

154

#define imx_clk_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \

drivers/clk/imx/clk.h

155

to_clk(imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags))

drivers/clk/imx/clk.h

163

#define imx_clk_hw_gate(name, parent, reg, shift) \

drivers/clk/imx/clk.h

164

imx_clk_hw_gate_flags(name, parent, reg, shift, 0)

drivers/clk/imx/clk.h

166

#define imx_clk_hw_gate2(name, parent, reg, shift) \

drivers/clk/imx/clk.h

167

imx_clk_hw_gate2_flags(name, parent, reg, shift, 0)

drivers/clk/imx/clk.h

169

#define imx_clk_hw_gate_dis(name, parent, reg, shift) \

drivers/clk/imx/clk.h

170

imx_clk_hw_gate_dis_flags(name, parent, reg, shift, 0)

drivers/clk/imx/clk.h

172

#define imx_clk_hw_gate_dis_flags(name, parent, reg, shift, flags) \

drivers/clk/imx/clk.h

173

__imx_clk_hw_gate(name, parent, reg, shift, flags, CLK_GATE_SET_TO_DISABLE)

drivers/clk/imx/clk.h

175

#define imx_clk_hw_gate_flags(name, parent, reg, shift, flags) \

drivers/clk/imx/clk.h

176

__imx_clk_hw_gate(name, parent, reg, shift, flags, 0)

drivers/clk/imx/clk.h

178

#define imx_clk_hw_gate2_flags(name, parent, reg, shift, flags) \

drivers/clk/imx/clk.h

179

__imx_clk_hw_gate2(name, parent, reg, shift, 0x3, flags, NULL)

drivers/clk/imx/clk.h

181

#define imx_clk_hw_gate2_shared(name, parent, reg, shift, shared_count) \

drivers/clk/imx/clk.h

182

__imx_clk_hw_gate2(name, parent, reg, shift, 0x3, 0, shared_count)

drivers/clk/imx/clk.h

184

#define imx_clk_hw_gate2_shared2(name, parent, reg, shift, shared_count) \

drivers/clk/imx/clk.h

185

__imx_clk_hw_gate2(name, parent, reg, shift, 0x3, CLK_OPS_PARENT_ENABLE, shared_count)

drivers/clk/imx/clk.h

187

#define imx_clk_hw_gate3(name, parent, reg, shift) \

drivers/clk/imx/clk.h

188

imx_clk_hw_gate3_flags(name, parent, reg, shift, 0)

drivers/clk/imx/clk.h

190

#define imx_clk_hw_gate3_flags(name, parent, reg, shift, flags) \

drivers/clk/imx/clk.h

191

__imx_clk_hw_gate(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE, 0)

drivers/clk/imx/clk.h

193

#define imx_clk_hw_gate4(name, parent, reg, shift) \

drivers/clk/imx/clk.h

194

imx_clk_hw_gate4_flags(name, parent, reg, shift, 0)

drivers/clk/imx/clk.h

196

#define imx_clk_hw_gate4_flags(name, parent, reg, shift, flags) \

drivers/clk/imx/clk.h

197

imx_clk_hw_gate2_flags(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE)

drivers/clk/imx/clk.h

199

#define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \

drivers/clk/imx/clk.h

200

imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, 0)

drivers/clk/imx/clk.h

202

#define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \

drivers/clk/imx/clk.h

203

__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, 0, 0)

drivers/clk/imx/clk.h

205

#define imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags) \

drivers/clk/imx/clk.h

206

__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags, 0)

drivers/clk/imx/clk.h

208

#define imx_clk_hw_mux_ldb(name, reg, shift, width, parents, num_parents) \

drivers/clk/imx/clk.h

209

__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, CLK_SET_RATE_PARENT, CLK_MUX_READ_ONLY)

drivers/clk/imx/clk.h

211

#define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \

drivers/clk/imx/clk.h

212

__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags | CLK_OPS_PARENT_ENABLE, 0)

drivers/clk/imx/clk.h

214

#define imx_clk_hw_divider(name, parent, reg, shift, width) \

drivers/clk/imx/clk.h

215

__imx_clk_hw_divider(name, parent, reg, shift, width, CLK_SET_RATE_PARENT)

drivers/clk/imx/clk.h

217

#define imx_clk_hw_divider2(name, parent, reg, shift, width) \

drivers/clk/imx/clk.h

218

__imx_clk_hw_divider(name, parent, reg, shift, width, \

drivers/clk/imx/clk.h

221

#define imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags) \

drivers/clk/imx/clk.h

222

__imx_clk_hw_divider(name, parent, reg, shift, width, flags)

drivers/clk/imx/clk.h

301

void __iomem *reg, u8 shift, u32 exclusive_mask);

drivers/clk/imx/clk.h

310

void __iomem *reg, u8 shift, u8 width,

drivers/clk/imx/clk.h

313

struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift,

drivers/clk/imx/clk.h

330

void __iomem *reg, u8 shift, u8 width,

drivers/clk/imx/clk.h

334

u8 shift, u8 width, const char * const *parents,

drivers/clk/imx/clk.h

358

void __iomem *reg, u8 shift,

drivers/clk/imx/clk.h

362

reg, shift, width, CLK_DIVIDER_ROUND_CLOSEST, &imx_ccm_lock);

drivers/clk/imx/clk.h

367

void __iomem *reg, u8 shift,

drivers/clk/imx/clk.h

371

reg, shift, width, 0, &imx_ccm_lock);

drivers/clk/imx/clk.h

375

void __iomem *reg, u8 shift,

drivers/clk/imx/clk.h

380

shift, clk_gate_flags, &imx_ccm_lock);

drivers/clk/imx/clk.h

384

void __iomem *reg, u8 shift, u8 cgr_val,

drivers/clk/imx/clk.h

389

shift, cgr_val, 0x3, 0, &imx_ccm_lock, share_count);

drivers/clk/imx/clk.h

393

u8 shift, u8 width, const char * const *parents,

drivers/clk/imx/clk.h

397

flags | CLK_SET_RATE_NO_REPARENT, reg, shift,

drivers/clk/imx/clk.h

482

unsigned long flags, void __iomem *reg, u8 shift, u8 width,

drivers/clk/ingenic/cgu.c

344

hw_idx = (reg >> clk_info->mux.shift) &

drivers/clk/ingenic/cgu.c

390

mask <<= clk_info->mux.shift;

drivers/clk/ingenic/cgu.c

397

reg |= hw_idx << clk_info->mux.shift;

drivers/clk/ingenic/cgu.c

422

div = (div_reg >> clk_info->div.shift) &

drivers/clk/ingenic/cgu.c

554

reg &= ~(mask << clk_info->div.shift);

drivers/clk/ingenic/cgu.c

555

reg |= hw_div << clk_info->div.shift;

drivers/clk/ingenic/cgu.h

102

u8 shift;

drivers/clk/ingenic/cgu.h

79

u8 shift;

drivers/clk/keystone/pll.c

252

u32 shift, mask;

drivers/clk/keystone/pll.c

270

if (of_property_read_u32(node, "bit-shift", &shift)) {

drivers/clk/keystone/pll.c

282

clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift,

drivers/clk/keystone/pll.c

301

u32 shift, mask;

drivers/clk/keystone/pll.c

319

if (of_property_read_u32(node, "bit-shift", &shift)) {

drivers/clk/keystone/pll.c

330

ARRAY_SIZE(parents) , 0, reg, shift, mask,

drivers/clk/mediatek/clk-cpumux.c

23

u8 shift;

drivers/clk/mediatek/clk-cpumux.c

38

val >>= mux->shift;

drivers/clk/mediatek/clk-cpumux.c

49

val = index << mux->shift;

drivers/clk/mediatek/clk-cpumux.c

50

mask = mux->mask << mux->shift;

drivers/clk/mediatek/clk-cpumux.c

80

cpumux->shift = mux->mux_shift;

drivers/clk/mediatek/clk-gate.c

113

BIT(cg->gate->shift));

drivers/clk/mediatek/clk-gate.c

117

val & BIT(cg->gate->shift), 0,

drivers/clk/mediatek/clk-gate.c

38

return val & BIT(cg->gate->shift);

drivers/clk/mediatek/clk-gate.c

55

regmap_write(cg->regmap, cg->gate->regs->set_ofs, BIT(cg->gate->shift));

drivers/clk/mediatek/clk-gate.c

62

regmap_write(cg->regmap, cg->gate->regs->clr_ofs, BIT(cg->gate->shift));

drivers/clk/mediatek/clk-gate.c

70

BIT(cg->gate->shift));

drivers/clk/mediatek/clk-gate.c

78

BIT(cg->gate->shift));

drivers/clk/mediatek/clk-gate.h

37

int shift;

drivers/clk/mediatek/clk-gate.h

48

.shift = _shift, \

drivers/clk/mediatek/clk-mt7981-eth.c

30

.shift = _shift, \

drivers/clk/mediatek/clk-mt7981-eth.c

52

.shift = _shift, \

drivers/clk/mediatek/clk-mt7981-eth.c

74

.shift = _shift, \

drivers/clk/mediatek/clk-mt7981-infracfg.c

104

.regs = &infra0_cg_regs, .shift = _shift, \

drivers/clk/mediatek/clk-mt7981-infracfg.c

111

.regs = &infra1_cg_regs, .shift = _shift, \

drivers/clk/mediatek/clk-mt7981-infracfg.c

118

.regs = &infra2_cg_regs, .shift = _shift, \

drivers/clk/mediatek/clk-mt7988-eth.c

100

.shift = _shift, \

drivers/clk/mediatek/clk-mt7988-eth.c

31

.shift = _shift, \

drivers/clk/mediatek/clk-mt7988-eth.c

64

.shift = _shift, \

drivers/clk/mediatek/clk-mt7988-xfipll.c

31

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-disp0.c

47

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-disp0.c

58

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-disp0.c

68

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-disp0.c

79

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-disp1.c

47

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-disp1.c

58

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-disp1.c

68

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-disp1.c

79

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-imp_iic_wrap.c

29

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-imp_iic_wrap.c

67

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-mdpsys.c

41

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-mdpsys.c

51

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-mdpsys.c

60

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-ovl0.c

48

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-ovl0.c

59

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-ovl1.c

48

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-ovl1.c

59

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-peri_ao.c

47

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-peri_ao.c

56

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-peri_ao.c

66

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-peri_ao.c

75

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-pextp.c

33

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-ufs_ao.c

39

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-ufs_ao.c

48

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdec.c

161

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdec.c

172

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdec.c

183

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdec.c

194

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdec.c

205

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdec.c

60

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdec.c

71

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdec.c

82

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdisp_ao.c

35

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-vdisp_ao.c

47

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-venc.c

119

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-venc.c

130

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-venc.c

141

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-venc.c

183

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-venc.c

194

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-venc.c

47

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-venc.c

58

.shift = _shift, \

drivers/clk/mediatek/clk-mt8196-venc.c

73

.shift = _shift, \

drivers/clk/mediatek/clk-mtk.c

239

mux->shift = mc->mux_shift;

drivers/clk/mediatek/clk-mtk.c

277

div->shift = mc->divider_shift;

drivers/clk/meson/a1-peripherals.c

1003

.shift = 9,

drivers/clk/meson/a1-peripherals.c

1016

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1050

.shift = 25,

drivers/clk/meson/a1-peripherals.c

1063

.shift = 16,

drivers/clk/meson/a1-peripherals.c

1104

.shift = 9,

drivers/clk/meson/a1-peripherals.c

1117

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1151

.shift = 25,

drivers/clk/meson/a1-peripherals.c

1164

.shift = 16,

drivers/clk/meson/a1-peripherals.c

1214

.shift = 9,

drivers/clk/meson/a1-peripherals.c

1227

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1245

.shift = 15,

drivers/clk/meson/a1-peripherals.c

1278

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1311

.shift = 9,

drivers/clk/meson/a1-peripherals.c

1324

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1342

.shift = 15,

drivers/clk/meson/a1-peripherals.c

1383

.shift = 9,

drivers/clk/meson/a1-peripherals.c

1397

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1438

.shift = 9,

drivers/clk/meson/a1-peripherals.c

1451

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1469

.shift = 15,

drivers/clk/meson/a1-peripherals.c

1503

.shift = 9,

drivers/clk/meson/a1-peripherals.c

1516

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1534

.shift = 15,

drivers/clk/meson/a1-peripherals.c

1568

.shift = 9,

drivers/clk/meson/a1-peripherals.c

1581

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1599

.shift = 15,

drivers/clk/meson/a1-peripherals.c

1648

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1653

.shift = 12,

drivers/clk/meson/a1-peripherals.c

1658

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1663

.shift = 12,

drivers/clk/meson/a1-peripherals.c

1668

.shift = 28,

drivers/clk/meson/a1-peripherals.c

1687

.shift = 24,

drivers/clk/meson/a1-peripherals.c

1706

.shift = 31,

drivers/clk/meson/a1-peripherals.c

1755

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1760

.shift = 12,

drivers/clk/meson/a1-peripherals.c

1765

.shift = 0,

drivers/clk/meson/a1-peripherals.c

1770

.shift = 12,

drivers/clk/meson/a1-peripherals.c

1775

.shift = 28,

drivers/clk/meson/a1-peripherals.c

1794

.shift = 24,

drivers/clk/meson/a1-peripherals.c

1813

.shift = 31,

drivers/clk/meson/a1-peripherals.c

184

.shift = 0,

drivers/clk/meson/a1-peripherals.c

189

.shift = 12,

drivers/clk/meson/a1-peripherals.c

194

.shift = 0,

drivers/clk/meson/a1-peripherals.c

199

.shift = 12,

drivers/clk/meson/a1-peripherals.c

204

.shift = 28,

drivers/clk/meson/a1-peripherals.c

238

.shift = 0,

drivers/clk/meson/a1-peripherals.c

282

.shift = 26,

drivers/clk/meson/a1-peripherals.c

296

.shift = 16,

drivers/clk/meson/a1-peripherals.c

330

.shift = 10,

drivers/clk/meson/a1-peripherals.c

344

.shift = 0,

drivers/clk/meson/a1-peripherals.c

378

.shift = 31,

drivers/clk/meson/a1-peripherals.c

415

.shift = 10,

drivers/clk/meson/a1-peripherals.c

429

.shift = 0,

drivers/clk/meson/a1-peripherals.c

463

.shift = 26,

drivers/clk/meson/a1-peripherals.c

477

.shift = 16,

drivers/clk/meson/a1-peripherals.c

511

.shift = 15,

drivers/clk/meson/a1-peripherals.c

561

.shift = 10,

drivers/clk/meson/a1-peripherals.c

575

.shift = 0,

drivers/clk/meson/a1-peripherals.c

609

.shift = 26,

drivers/clk/meson/a1-peripherals.c

623

.shift = 16,

drivers/clk/meson/a1-peripherals.c

657

.shift = 15,

drivers/clk/meson/a1-peripherals.c

749

.shift = 0,

drivers/clk/meson/a1-peripherals.c

797

.shift = 12,

drivers/clk/meson/a1-peripherals.c

819

.shift = 0,

drivers/clk/meson/a1-peripherals.c

853

.shift = 9,

drivers/clk/meson/a1-peripherals.c

869

.shift = 0,

drivers/clk/meson/a1-peripherals.c

909

.shift = 9,

drivers/clk/meson/a1-peripherals.c

922

.shift = 0,

drivers/clk/meson/a1-peripherals.c

956

.shift = 25,

drivers/clk/meson/a1-peripherals.c

969

.shift = 16,

drivers/clk/meson/a1-pll.c

104

.shift = 28,

drivers/clk/meson/a1-pll.c

109

.shift = 0,

drivers/clk/meson/a1-pll.c

114

.shift = 10,

drivers/clk/meson/a1-pll.c

119

.shift = 0,

drivers/clk/meson/a1-pll.c

124

.shift = 31,

drivers/clk/meson/a1-pll.c

129

.shift = 26,

drivers/clk/meson/a1-pll.c

134

.shift = 6,

drivers/clk/meson/a1-pll.c

33

.shift = 28,

drivers/clk/meson/a1-pll.c

38

.shift = 0,

drivers/clk/meson/a1-pll.c

43

.shift = 10,

drivers/clk/meson/a1-pll.c

48

.shift = 0,

drivers/clk/meson/a1-pll.c

53

.shift = 31,

drivers/clk/meson/a1-pll.c

58

.shift = 29,

drivers/clk/meson/axg-aoclk.c

100

.shift = 12,

drivers/clk/meson/axg-aoclk.c

105

.shift = 0,

drivers/clk/meson/axg-aoclk.c

110

.shift = 12,

drivers/clk/meson/axg-aoclk.c

115

.shift = 28,

drivers/clk/meson/axg-aoclk.c

134

.shift = 24,

drivers/clk/meson/axg-aoclk.c

169

.shift = 10,

drivers/clk/meson/axg-aoclk.c

188

.shift = 8,

drivers/clk/meson/axg-aoclk.c

213

.shift = 9,

drivers/clk/meson/axg-aoclk.c

229

.shift = 0,

drivers/clk/meson/axg-aoclk.c

95

.shift = 0,

drivers/clk/meson/axg-audio.c

113

.shift = (_shift), \

drivers/clk/meson/axg-audio.c

144

.shift = (_div_shift), \

drivers/clk/meson/axg-audio.c

149

.shift = (_hi_shift), \

drivers/clk/meson/axg-audio.c

167

.shift = (_shift0), \

drivers/clk/meson/axg-audio.c

172

.shift = (_shift1), \

drivers/clk/meson/axg-audio.c

177

.shift = (_shift2), \

drivers/clk/meson/axg-audio.c

194

.shift = (_shift), \

drivers/clk/meson/axg-audio.c

212

.shift = (_shift_ph), \

drivers/clk/meson/axg-audio.c

217

.shift = (_shift_ws), \

drivers/clk/meson/axg-audio.c

713

.shift = 0,

drivers/clk/meson/axg-audio.c

746

.shift = 16,

drivers/clk/meson/axg-audio.c

785

.shift = 31,

drivers/clk/meson/axg-audio.c

98

.shift = (_shift), \

drivers/clk/meson/axg.c

1017

.shift = 25,

drivers/clk/meson/axg.c

1031

.shift = 16,

drivers/clk/meson/axg.c

1067

.shift = 9,

drivers/clk/meson/axg.c

1081

.shift = 0,

drivers/clk/meson/axg.c

1125

.shift = 9,

drivers/clk/meson/axg.c

1140

.shift = 0,

drivers/clk/meson/axg.c

115

.shift = 30,

drivers/clk/meson/axg.c

1174

.shift = 25,

drivers/clk/meson/axg.c

1189

.shift = 16,

drivers/clk/meson/axg.c

120

.shift = 0,

drivers/clk/meson/axg.c

1223

.shift = 31,

drivers/clk/meson/axg.c

1243

.shift = 9,

drivers/clk/meson/axg.c

125

.shift = 9,

drivers/clk/meson/axg.c

1257

.shift = 0,

drivers/clk/meson/axg.c

1291

.shift = 25,

drivers/clk/meson/axg.c

130

.shift = 0,

drivers/clk/meson/axg.c

1305

.shift = 16,

drivers/clk/meson/axg.c

1339

.shift = 31,

drivers/clk/meson/axg.c

135

.shift = 31,

drivers/clk/meson/axg.c

1383

.shift = 16,

drivers/clk/meson/axg.c

1398

.shift = 16,

drivers/clk/meson/axg.c

140

.shift = 29,

drivers/clk/meson/axg.c

1440

.shift = 0,

drivers/clk/meson/axg.c

1457

.shift = 0,

drivers/clk/meson/axg.c

157

.shift = 16,

drivers/clk/meson/axg.c

1761

.shift = 12,

drivers/clk/meson/axg.c

179

.shift = 30,

drivers/clk/meson/axg.c

1805

.shift = 21,

drivers/clk/meson/axg.c

1821

.shift = 12,

drivers/clk/meson/axg.c

184

.shift = 0,

drivers/clk/meson/axg.c

1868

.shift = 12,

drivers/clk/meson/axg.c

1888

.shift = 0,

drivers/clk/meson/axg.c

189

.shift = 9,

drivers/clk/meson/axg.c

194

.shift = 31,

drivers/clk/meson/axg.c

199

.shift = 29,

drivers/clk/meson/axg.c

216

.shift = 16,

drivers/clk/meson/axg.c

276

.shift = 30,

drivers/clk/meson/axg.c

281

.shift = 0,

drivers/clk/meson/axg.c

286

.shift = 9,

drivers/clk/meson/axg.c

291

.shift = 0,

drivers/clk/meson/axg.c

296

.shift = 31,

drivers/clk/meson/axg.c

301

.shift = 29,

drivers/clk/meson/axg.c

321

.shift = 16,

drivers/clk/meson/axg.c

348

.shift = 30,

drivers/clk/meson/axg.c

353

.shift = 0,

drivers/clk/meson/axg.c

358

.shift = 9,

drivers/clk/meson/axg.c

363

.shift = 0,

drivers/clk/meson/axg.c

368

.shift = 31,

drivers/clk/meson/axg.c

373

.shift = 29,

drivers/clk/meson/axg.c

394

.shift = 16,

drivers/clk/meson/axg.c

557

.shift = 12,

drivers/clk/meson/axg.c

574

.shift = 0,

drivers/clk/meson/axg.c

579

.shift = 15,

drivers/clk/meson/axg.c

584

.shift = 16,

drivers/clk/meson/axg.c

589

.shift = 0,

drivers/clk/meson/axg.c

624

.shift = 0,

drivers/clk/meson/axg.c

629

.shift = 15,

drivers/clk/meson/axg.c

634

.shift = 16,

drivers/clk/meson/axg.c

639

.shift = 1,

drivers/clk/meson/axg.c

674

.shift = 0,

drivers/clk/meson/axg.c

679

.shift = 15,

drivers/clk/meson/axg.c

684

.shift = 16,

drivers/clk/meson/axg.c

689

.shift = 25,

drivers/clk/meson/axg.c

694

.shift = 2,

drivers/clk/meson/axg.c

729

.shift = 12,

drivers/clk/meson/axg.c

734

.shift = 11,

drivers/clk/meson/axg.c

739

.shift = 2,

drivers/clk/meson/axg.c

744

.shift = 3,

drivers/clk/meson/axg.c

797

.shift = 30,

drivers/clk/meson/axg.c

802

.shift = 0,

drivers/clk/meson/axg.c

807

.shift = 9,

drivers/clk/meson/axg.c

812

.shift = 0,

drivers/clk/meson/axg.c

817

.shift = 31,

drivers/clk/meson/axg.c

822

.shift = 29,

drivers/clk/meson/axg.c

842

.shift = 16,

drivers/clk/meson/axg.c

860

.shift = 6,

drivers/clk/meson/axg.c

879

.shift = 2,

drivers/clk/meson/axg.c

896

.shift = 1,

drivers/clk/meson/axg.c

954

.shift = 12,

drivers/clk/meson/axg.c

968

.shift = 0,

drivers/clk/meson/c3-peripherals.c

104

.shift = 28,

drivers/clk/meson/c3-peripherals.c

128

.shift = 24,

drivers/clk/meson/c3-peripherals.c

165

.shift = 0,

drivers/clk/meson/c3-peripherals.c

349

.shift = 10,

drivers/clk/meson/c3-peripherals.c

366

.shift = 0,

drivers/clk/meson/c3-peripherals.c

421

.shift = 12,

drivers/clk/meson/c3-peripherals.c

435

.shift = 0,

drivers/clk/meson/c3-peripherals.c

597

.shift = 0,

drivers/clk/meson/c3-peripherals.c

660

.shift = 0,

drivers/clk/meson/c3-peripherals.c

775

.shift = 15,

drivers/clk/meson/c3-peripherals.c

84

.shift = 0,

drivers/clk/meson/c3-peripherals.c

89

.shift = 12,

drivers/clk/meson/c3-peripherals.c

94

.shift = 0,

drivers/clk/meson/c3-peripherals.c

99

.shift = 12,

drivers/clk/meson/c3-pll.c

250

.shift = 28,

drivers/clk/meson/c3-pll.c

255

.shift = 0,

drivers/clk/meson/c3-pll.c

260

.shift = 0,

drivers/clk/meson/c3-pll.c

265

.shift = 10,

drivers/clk/meson/c3-pll.c

270

.shift = 31,

drivers/clk/meson/c3-pll.c

275

.shift = 29,

drivers/clk/meson/c3-pll.c

306

.shift = 16,

drivers/clk/meson/c3-pll.c

333

.shift = 28,

drivers/clk/meson/c3-pll.c

338

.shift = 0,

drivers/clk/meson/c3-pll.c

343

.shift = 0,

drivers/clk/meson/c3-pll.c

348

.shift = 10,

drivers/clk/meson/c3-pll.c

353

.shift = 31,

drivers/clk/meson/c3-pll.c

358

.shift = 29,

drivers/clk/meson/c3-pll.c

379

.shift = 16,

drivers/clk/meson/c3-pll.c

410

.shift = 28,

drivers/clk/meson/c3-pll.c

415

.shift = 0,

drivers/clk/meson/c3-pll.c

420

.shift = 16,

drivers/clk/meson/c3-pll.c

425

.shift = 31,

drivers/clk/meson/c3-pll.c

430

.shift = 29,

drivers/clk/meson/c3-pll.c

459

.shift = 12,

drivers/clk/meson/c3-pll.c

477

.shift = 16,

drivers/clk/meson/c3-pll.c

502

.shift = 4,

drivers/clk/meson/c3-pll.c

531

.shift = 2,

drivers/clk/meson/c3-pll.c

565

.shift = 12,

drivers/clk/meson/c3-pll.c

594

.shift = 10,

drivers/clk/meson/clk-cpu-dyndiv.c

51

val = (unsigned int)ret << data->div.shift;

drivers/clk/meson/clk-cpu-dyndiv.c

58

SETPMASK(data->div.width, data->div.shift) |

drivers/clk/meson/clk-cpu-dyndiv.c

59

SETPMASK(data->dyn.width, data->dyn.shift),

drivers/clk/meson/clk-regmap.c

117

val >>= div->shift;

drivers/clk/meson/clk-regmap.c

137

val >>= div->shift;

drivers/clk/meson/clk-regmap.c

161

val = (unsigned int)ret << div->shift;

drivers/clk/meson/clk-regmap.c

163

clk_div_mask(div->width) << div->shift, val);

drivers/clk/meson/clk-regmap.c

194

val >>= mux->shift;

drivers/clk/meson/clk-regmap.c

206

mux->mask << mux->shift,

drivers/clk/meson/clk-regmap.c

207

val << mux->shift);

drivers/clk/meson/clk-regmap.h

108

u8 shift;

drivers/clk/meson/clk-regmap.h

76

u8 shift;

drivers/clk/meson/g12a-aoclk.c

117

.shift = 0,

drivers/clk/meson/g12a-aoclk.c

122

.shift = 12,

drivers/clk/meson/g12a-aoclk.c

127

.shift = 0,

drivers/clk/meson/g12a-aoclk.c

132

.shift = 12,

drivers/clk/meson/g12a-aoclk.c

137

.shift = 28,

drivers/clk/meson/g12a-aoclk.c

156

.shift = 24,

drivers/clk/meson/g12a-aoclk.c

208

.shift = 0,

drivers/clk/meson/g12a-aoclk.c

213

.shift = 12,

drivers/clk/meson/g12a-aoclk.c

218

.shift = 0,

drivers/clk/meson/g12a-aoclk.c

223

.shift = 12,

drivers/clk/meson/g12a-aoclk.c

228

.shift = 28,

drivers/clk/meson/g12a-aoclk.c

247

.shift = 24,

drivers/clk/meson/g12a-aoclk.c

282

.shift = 10,

drivers/clk/meson/g12a-aoclk.c

301

.shift = 8,

drivers/clk/meson/g12a-aoclk.c

326

.shift = 9,

drivers/clk/meson/g12a-aoclk.c

342

.shift = 0,

drivers/clk/meson/g12a.c

1042

.shift = 5,

drivers/clk/meson/g12a.c

1073

.shift = 0,

drivers/clk/meson/g12a.c

1094

.shift = 4,

drivers/clk/meson/g12a.c

1099

.shift = 26,

drivers/clk/meson/g12a.c

1119

.shift = 2,

drivers/clk/meson/g12a.c

1139

.shift = 16,

drivers/clk/meson/g12a.c

1159

.shift = 20,

drivers/clk/meson/g12a.c

1177

.shift = 18,

drivers/clk/meson/g12a.c

1197

.shift = 10,

drivers/clk/meson/g12a.c

1217

.shift = 11,

drivers/clk/meson/g12a.c

1237

.shift = 11,

drivers/clk/meson/g12a.c

1257

.shift = 0,

drivers/clk/meson/g12a.c

1278

.shift = 4,

drivers/clk/meson/g12a.c

1283

.shift = 26,

drivers/clk/meson/g12a.c

1303

.shift = 2,

drivers/clk/meson/g12a.c

1323

.shift = 16,

drivers/clk/meson/g12a.c

1343

.shift = 20,

drivers/clk/meson/g12a.c

1361

.shift = 18,

drivers/clk/meson/g12a.c

1381

.shift = 10,

drivers/clk/meson/g12a.c

1401

.shift = 11,

drivers/clk/meson/g12a.c

1421

.shift = 0,

drivers/clk/meson/g12a.c

144

.shift = 28,

drivers/clk/meson/g12a.c

1440

.shift = 4,

drivers/clk/meson/g12a.c

1458

.shift = 2,

drivers/clk/meson/g12a.c

1476

.shift = 16,

drivers/clk/meson/g12a.c

149

.shift = 0,

drivers/clk/meson/g12a.c

1495

.shift = 20,

drivers/clk/meson/g12a.c

1513

.shift = 18,

drivers/clk/meson/g12a.c

1531

.shift = 10,

drivers/clk/meson/g12a.c

154

.shift = 10,

drivers/clk/meson/g12a.c

1549

.shift = 11,

drivers/clk/meson/g12a.c

1567

.shift = 24,

drivers/clk/meson/g12a.c

1585

.shift = 25,

drivers/clk/meson/g12a.c

159

.shift = 0,

drivers/clk/meson/g12a.c

1603

.shift = 26,

drivers/clk/meson/g12a.c

1621

.shift = 27,

drivers/clk/meson/g12a.c

164

.shift = 31,

drivers/clk/meson/g12a.c

169

.shift = 29,

drivers/clk/meson/g12a.c

186

.shift = 16,

drivers/clk/meson/g12a.c

1922

.shift = 3,

drivers/clk/meson/g12a.c

1959

.shift = 6,

drivers/clk/meson/g12a.c

1996

.shift = 9,

drivers/clk/meson/g12a.c

2033

.shift = 20,

drivers/clk/meson/g12a.c

213

.shift = 28,

drivers/clk/meson/g12a.c

2173

.shift = 3,

drivers/clk/meson/g12a.c

218

.shift = 0,

drivers/clk/meson/g12a.c

2208

.shift = 6,

drivers/clk/meson/g12a.c

223

.shift = 10,

drivers/clk/meson/g12a.c

2243

.shift = 9,

drivers/clk/meson/g12a.c

2278

.shift = 20,

drivers/clk/meson/g12a.c

228

.shift = 31,

drivers/clk/meson/g12a.c

2317

.shift = 0,

drivers/clk/meson/g12a.c

2322

.shift = 30,

drivers/clk/meson/g12a.c

2327

.shift = 20,

drivers/clk/meson/g12a.c

233

.shift = 29,

drivers/clk/meson/g12a.c

2332

.shift = 29,

drivers/clk/meson/g12a.c

2370

.shift = 0,

drivers/clk/meson/g12a.c

2375

.shift = 30,

drivers/clk/meson/g12a.c

2380

.shift = 20,

drivers/clk/meson/g12a.c

2385

.shift = 29,

drivers/clk/meson/g12a.c

2423

.shift = 0,

drivers/clk/meson/g12a.c

2428

.shift = 30,

drivers/clk/meson/g12a.c

2433

.shift = 20,

drivers/clk/meson/g12a.c

2438

.shift = 29,

drivers/clk/meson/g12a.c

2476

.shift = 0,

drivers/clk/meson/g12a.c

2481

.shift = 30,

drivers/clk/meson/g12a.c

2486

.shift = 20,

drivers/clk/meson/g12a.c

2491

.shift = 29,

drivers/clk/meson/g12a.c

253

.shift = 16,

drivers/clk/meson/g12a.c

2537

.shift = 12,

drivers/clk/meson/g12a.c

2551

.shift = 0,

drivers/clk/meson/g12a.c

2600

.shift = 9,

drivers/clk/meson/g12a.c

2614

.shift = 0,

drivers/clk/meson/g12a.c

2649

.shift = 25,

drivers/clk/meson/g12a.c

2663

.shift = 16,

drivers/clk/meson/g12a.c

2698

.shift = 9,

drivers/clk/meson/g12a.c

2712

.shift = 0,

drivers/clk/meson/g12a.c

272

.shift = 28,

drivers/clk/meson/g12a.c

2748

.shift = 0,

drivers/clk/meson/g12a.c

2753

.shift = 16,

drivers/clk/meson/g12a.c

277

.shift = 0,

drivers/clk/meson/g12a.c

2775

.shift = 18,

drivers/clk/meson/g12a.c

282

.shift = 10,

drivers/clk/meson/g12a.c

2823

.shift = 9,

drivers/clk/meson/g12a.c

2837

.shift = 0,

drivers/clk/meson/g12a.c

2867

.shift = 25,

drivers/clk/meson/g12a.c

287

.shift = 31,

drivers/clk/meson/g12a.c

2881

.shift = 16,

drivers/clk/meson/g12a.c

2911

.shift = 31,

drivers/clk/meson/g12a.c

292

.shift = 29,

drivers/clk/meson/g12a.c

2945

.shift = 9,

drivers/clk/meson/g12a.c

2960

.shift = 0,

drivers/clk/meson/g12a.c

2995

.shift = 9,

drivers/clk/meson/g12a.c

3010

.shift = 0,

drivers/clk/meson/g12a.c

3045

.shift = 25,

drivers/clk/meson/g12a.c

3060

.shift = 16,

drivers/clk/meson/g12a.c

3108

.shift = 9,

drivers/clk/meson/g12a.c

312

.shift = 16,

drivers/clk/meson/g12a.c

3122

.shift = 0,

drivers/clk/meson/g12a.c

3156

.shift = 25,

drivers/clk/meson/g12a.c

3170

.shift = 16,

drivers/clk/meson/g12a.c

3204

.shift = 31,

drivers/clk/meson/g12a.c

3251

.shift = 16,

drivers/clk/meson/g12a.c

3266

.shift = 16,

drivers/clk/meson/g12a.c

3307

.shift = 0,

drivers/clk/meson/g12a.c

3325

.shift = 0,

drivers/clk/meson/g12a.c

3330

.shift = 16,

drivers/clk/meson/g12a.c

3335

.shift = 17,

drivers/clk/meson/g12a.c

3369

.shift = 19,

drivers/clk/meson/g12a.c

3374

.shift = 15,

drivers/clk/meson/g12a.c

3653

.shift = 28,

drivers/clk/meson/g12a.c

3669

.shift = 20,

drivers/clk/meson/g12a.c

3685

.shift = 12,

drivers/clk/meson/g12a.c

3701

.shift = 28,

drivers/clk/meson/g12a.c

3732

.shift = 16,

drivers/clk/meson/g12a.c

3841

.shift = 12,

drivers/clk/meson/g12a.c

3866

.shift = 0,

drivers/clk/meson/g12a.c

3914

.shift = 9,

drivers/clk/meson/g12a.c

3927

.shift = 0,

drivers/clk/meson/g12a.c

3970

.shift = 9,

drivers/clk/meson/g12a.c

3985

.shift = 0,

drivers/clk/meson/g12a.c

4032

.shift = 9,

drivers/clk/meson/g12a.c

4052

.shift = 0,

drivers/clk/meson/g12a.c

4086

.shift = 25,

drivers/clk/meson/g12a.c

410

.shift = 28,

drivers/clk/meson/g12a.c

4106

.shift = 16,

drivers/clk/meson/g12a.c

4140

.shift = 31,

drivers/clk/meson/g12a.c

415

.shift = 0,

drivers/clk/meson/g12a.c

4157

.shift = 0,

drivers/clk/meson/g12a.c

420

.shift = 10,

drivers/clk/meson/g12a.c

4201

.shift = 7,

drivers/clk/meson/g12a.c

4214

.shift = 0,

drivers/clk/meson/g12a.c

4248

.shift = 23,

drivers/clk/meson/g12a.c

425

.shift = 0,

drivers/clk/meson/g12a.c

4261

.shift = 16,

drivers/clk/meson/g12a.c

430

.shift = 31,

drivers/clk/meson/g12a.c

4308

.shift = 9,

drivers/clk/meson/g12a.c

4321

.shift = 0,

drivers/clk/meson/g12a.c

435

.shift = 29,

drivers/clk/meson/g12a.c

4355

.shift = 25,

drivers/clk/meson/g12a.c

4368

.shift = 16,

drivers/clk/meson/g12a.c

455

.shift = 16,

drivers/clk/meson/g12a.c

475

.shift = 28,

drivers/clk/meson/g12a.c

480

.shift = 0,

drivers/clk/meson/g12a.c

485

.shift = 10,

drivers/clk/meson/g12a.c

490

.shift = 0,

drivers/clk/meson/g12a.c

495

.shift = 31,

drivers/clk/meson/g12a.c

500

.shift = 29,

drivers/clk/meson/g12a.c

519

.shift = 16,

drivers/clk/meson/g12a.c

550

.shift = 28,

drivers/clk/meson/g12a.c

555

.shift = 0,

drivers/clk/meson/g12a.c

560

.shift = 10,

drivers/clk/meson/g12a.c

565

.shift = 0,

drivers/clk/meson/g12a.c

570

.shift = 31,

drivers/clk/meson/g12a.c

575

.shift = 29,

drivers/clk/meson/g12a.c

596

.shift = 16,

drivers/clk/meson/g12a.c

642

.shift = 28,

drivers/clk/meson/g12a.c

647

.shift = 0,

drivers/clk/meson/g12a.c

652

.shift = 10,

drivers/clk/meson/g12a.c

657

.shift = 0,

drivers/clk/meson/g12a.c

662

.shift = 31,

drivers/clk/meson/g12a.c

667

.shift = 29,

drivers/clk/meson/g12a.c

701

.shift = 16,

drivers/clk/meson/g12a.c

736

.shift = 28,

drivers/clk/meson/g12a.c

741

.shift = 0,

drivers/clk/meson/g12a.c

746

.shift = 10,

drivers/clk/meson/g12a.c

751

.shift = 0,

drivers/clk/meson/g12a.c

756

.shift = 30,

drivers/clk/meson/g12a.c

761

.shift = 29,

drivers/clk/meson/g12a.c

794

.shift = 16,

drivers/clk/meson/g12a.c

812

.shift = 18,

drivers/clk/meson/g12a.c

830

.shift = 20,

drivers/clk/meson/gxbb-aoclk.c

101

.shift = 28,

drivers/clk/meson/gxbb-aoclk.c

118

.shift = 24,

drivers/clk/meson/gxbb-aoclk.c

151

.shift = 10,

drivers/clk/meson/gxbb-aoclk.c

173

.shift = 0,

drivers/clk/meson/gxbb-aoclk.c

192

.shift = 27,

drivers/clk/meson/gxbb-aoclk.c

81

.shift = 0,

drivers/clk/meson/gxbb-aoclk.c

86

.shift = 12,

drivers/clk/meson/gxbb-aoclk.c

91

.shift = 0,

drivers/clk/meson/gxbb-aoclk.c

96

.shift = 12,

drivers/clk/meson/gxbb.c

1002

.shift = 12,

drivers/clk/meson/gxbb.c

1021

.shift = 0,

drivers/clk/meson/gxbb.c

1055

.shift = 9,

drivers/clk/meson/gxbb.c

1072

.shift = 0,

drivers/clk/meson/gxbb.c

1124

.shift = 9,

drivers/clk/meson/gxbb.c

1144

.shift = 0,

drivers/clk/meson/gxbb.c

1178

.shift = 25,

drivers/clk/meson/gxbb.c

1198

.shift = 16,

drivers/clk/meson/gxbb.c

123

.shift = 30,

drivers/clk/meson/gxbb.c

1232

.shift = 31,

drivers/clk/meson/gxbb.c

1257

.shift = 9,

drivers/clk/meson/gxbb.c

1272

.shift = 0,

drivers/clk/meson/gxbb.c

128

.shift = 0,

drivers/clk/meson/gxbb.c

1307

.shift = 25,

drivers/clk/meson/gxbb.c

1322

.shift = 16,

drivers/clk/meson/gxbb.c

133

.shift = 9,

drivers/clk/meson/gxbb.c

1357

.shift = 27,

drivers/clk/meson/gxbb.c

138

.shift = 0,

drivers/clk/meson/gxbb.c

1390

.shift = 16,

drivers/clk/meson/gxbb.c

1405

.shift = 0,

drivers/clk/meson/gxbb.c

143

.shift = 31,

drivers/clk/meson/gxbb.c

1454

.shift = 9,

drivers/clk/meson/gxbb.c

1468

.shift = 0,

drivers/clk/meson/gxbb.c

148

.shift = 29,

drivers/clk/meson/gxbb.c

1504

.shift = 25,

drivers/clk/meson/gxbb.c

1518

.shift = 16,

drivers/clk/meson/gxbb.c

1554

.shift = 9,

drivers/clk/meson/gxbb.c

1568

.shift = 0,

drivers/clk/meson/gxbb.c

1612

.shift = 9,

drivers/clk/meson/gxbb.c

1630

.shift = 0,

drivers/clk/meson/gxbb.c

165

.shift = 16,

drivers/clk/meson/gxbb.c

1660

.shift = 25,

drivers/clk/meson/gxbb.c

1678

.shift = 16,

drivers/clk/meson/gxbb.c

1708

.shift = 31,

drivers/clk/meson/gxbb.c

1739

.shift = 9,

drivers/clk/meson/gxbb.c

1757

.shift = 0,

drivers/clk/meson/gxbb.c

1791

.shift = 25,

drivers/clk/meson/gxbb.c

1809

.shift = 16,

drivers/clk/meson/gxbb.c

1843

.shift = 31,

drivers/clk/meson/gxbb.c

1881

.shift = 0,

drivers/clk/meson/gxbb.c

1886

.shift = 16,

drivers/clk/meson/gxbb.c

1925

.shift = 18,

drivers/clk/meson/gxbb.c

1970

.shift = 16,

drivers/clk/meson/gxbb.c

1990

.shift = 16,

drivers/clk/meson/gxbb.c

200

.shift = 30,

drivers/clk/meson/gxbb.c

2037

.shift = 0,

drivers/clk/meson/gxbb.c

205

.shift = 0,

drivers/clk/meson/gxbb.c

2054

.shift = 0,

drivers/clk/meson/gxbb.c

210

.shift = 9,

drivers/clk/meson/gxbb.c

215

.shift = 0,

drivers/clk/meson/gxbb.c

220

.shift = 31,

drivers/clk/meson/gxbb.c

225

.shift = 28,

drivers/clk/meson/gxbb.c

2358

.shift = 28,

drivers/clk/meson/gxbb.c

2374

.shift = 20,

drivers/clk/meson/gxbb.c

2390

.shift = 28,

drivers/clk/meson/gxbb.c

2469

.shift = 16,

drivers/clk/meson/gxbb.c

248

.shift = 30,

drivers/clk/meson/gxbb.c

2516

.shift = 9,

drivers/clk/meson/gxbb.c

253

.shift = 0,

drivers/clk/meson/gxbb.c

2531

.shift = 0,

drivers/clk/meson/gxbb.c

2570

.shift = 9,

drivers/clk/meson/gxbb.c

258

.shift = 9,

drivers/clk/meson/gxbb.c

2585

.shift = 0,

drivers/clk/meson/gxbb.c

2620

.shift = 25,

drivers/clk/meson/gxbb.c

2635

.shift = 16,

drivers/clk/meson/gxbb.c

2685

.shift = 12,

drivers/clk/meson/gxbb.c

269

.shift = 0,

drivers/clk/meson/gxbb.c

2705

.shift = 0,

drivers/clk/meson/gxbb.c

274

.shift = 31,

drivers/clk/meson/gxbb.c

279

.shift = 28,

drivers/clk/meson/gxbb.c

301

.shift = 16,

drivers/clk/meson/gxbb.c

319

.shift = 22,

drivers/clk/meson/gxbb.c

337

.shift = 18,

drivers/clk/meson/gxbb.c

366

.shift = 21,

drivers/clk/meson/gxbb.c

384

.shift = 23,

drivers/clk/meson/gxbb.c

402

.shift = 19,

drivers/clk/meson/gxbb.c

421

.shift = 30,

drivers/clk/meson/gxbb.c

426

.shift = 0,

drivers/clk/meson/gxbb.c

431

.shift = 9,

drivers/clk/meson/gxbb.c

436

.shift = 31,

drivers/clk/meson/gxbb.c

441

.shift = 29,

drivers/clk/meson/gxbb.c

458

.shift = 10,

drivers/clk/meson/gxbb.c

518

.shift = 30,

drivers/clk/meson/gxbb.c

523

.shift = 0,

drivers/clk/meson/gxbb.c

528

.shift = 9,

drivers/clk/meson/gxbb.c

533

.shift = 31,

drivers/clk/meson/gxbb.c

538

.shift = 29,

drivers/clk/meson/gxbb.c

596

.shift = 30,

drivers/clk/meson/gxbb.c

601

.shift = 0,

drivers/clk/meson/gxbb.c

606

.shift = 9,

drivers/clk/meson/gxbb.c

611

.shift = 0,

drivers/clk/meson/gxbb.c

616

.shift = 31,

drivers/clk/meson/gxbb.c

621

.shift = 29,

drivers/clk/meson/gxbb.c

641

.shift = 16,

drivers/clk/meson/gxbb.c

812

.shift = 12,

drivers/clk/meson/gxbb.c

827

.shift = 0,

drivers/clk/meson/gxbb.c

832

.shift = 25,

drivers/clk/meson/gxbb.c

837

.shift = 16,

drivers/clk/meson/gxbb.c

855

.shift = 0,

drivers/clk/meson/gxbb.c

860

.shift = 15,

drivers/clk/meson/gxbb.c

865

.shift = 16,

drivers/clk/meson/gxbb.c

906

.shift = 0,

drivers/clk/meson/gxbb.c

911

.shift = 15,

drivers/clk/meson/gxbb.c

916

.shift = 16,

drivers/clk/meson/gxbb.c

948

.shift = 0,

drivers/clk/meson/gxbb.c

953

.shift = 15,

drivers/clk/meson/gxbb.c

958

.shift = 16,

drivers/clk/meson/meson-clkc-utils.h

58

.shift = (_shift), \

drivers/clk/meson/meson-clkc-utils.h

76

.shift = (_shift), \

drivers/clk/meson/meson8-ddr.c

30

.shift = 30,

drivers/clk/meson/meson8-ddr.c

35

.shift = 0,

drivers/clk/meson/meson8-ddr.c

40

.shift = 9,

drivers/clk/meson/meson8-ddr.c

45

.shift = 31,

drivers/clk/meson/meson8-ddr.c

50

.shift = 29,

drivers/clk/meson/meson8-ddr.c

67

.shift = 16,

drivers/clk/meson/meson8b.c

1019

.shift = 3,

drivers/clk/meson/meson8b.c

1051

.shift = 6,

drivers/clk/meson/meson8b.c

1082

.shift = 9,

drivers/clk/meson/meson8b.c

1114

.shift = 12,

drivers/clk/meson/meson8b.c

1162

.shift = 15,

drivers/clk/meson/meson8b.c

1200

.shift = 4,

drivers/clk/meson/meson8b.c

1217

.shift = 12,

drivers/clk/meson/meson8b.c

1235

.shift = 8,

drivers/clk/meson/meson8b.c

1253

.shift = 0,

drivers/clk/meson/meson8b.c

126

.shift = 30,

drivers/clk/meson/meson8b.c

1281

.shift = 16,

drivers/clk/meson/meson8b.c

131

.shift = 0,

drivers/clk/meson/meson8b.c

136

.shift = 9,

drivers/clk/meson/meson8b.c

141

.shift = 0,

drivers/clk/meson/meson8b.c

146

.shift = 31,

drivers/clk/meson/meson8b.c

1464

.shift = 16,

drivers/clk/meson/meson8b.c

151

.shift = 29,

drivers/clk/meson/meson8b.c

1655

.shift = 20,

drivers/clk/meson/meson8b.c

1686

.shift = 24,

drivers/clk/meson/meson8b.c

170

.shift = 16,

drivers/clk/meson/meson8b.c

1717

.shift = 28,

drivers/clk/meson/meson8b.c

1748

.shift = 16,

drivers/clk/meson/meson8b.c

1779

.shift = 12,

drivers/clk/meson/meson8b.c

1810

.shift = 28,

drivers/clk/meson/meson8b.c

1841

.shift = 9,

drivers/clk/meson/meson8b.c

1861

.shift = 0,

drivers/clk/meson/meson8b.c

1914

.shift = 9,

drivers/clk/meson/meson8b.c

1935

.shift = 0,

drivers/clk/meson/meson8b.c

1969

.shift = 25,

drivers/clk/meson/meson8b.c

1990

.shift = 16,

drivers/clk/meson/meson8b.c

2024

.shift = 31,

drivers/clk/meson/meson8b.c

2054

.shift = 30,

drivers/clk/meson/meson8b.c

2059

.shift = 0,

drivers/clk/meson/meson8b.c

2064

.shift = 9,

drivers/clk/meson/meson8b.c

2069

.shift = 31,

drivers/clk/meson/meson8b.c

2074

.shift = 29,

drivers/clk/meson/meson8b.c

2096

.shift = 16,

drivers/clk/meson/meson8b.c

2122

.shift = 9,

drivers/clk/meson/meson8b.c

2144

.shift = 9,

drivers/clk/meson/meson8b.c

2158

.shift = 0,

drivers/clk/meson/meson8b.c

2200

.shift = 25,

drivers/clk/meson/meson8b.c

2215

.shift = 25,

drivers/clk/meson/meson8b.c

2229

.shift = 16,

drivers/clk/meson/meson8b.c

2279

.shift = 31,

drivers/clk/meson/meson8b.c

2306

.shift = 9,

drivers/clk/meson/meson8b.c

2321

.shift = 0,

drivers/clk/meson/meson8b.c

2355

.shift = 0,

drivers/clk/meson/meson8b.c

2390

.shift = 15,

drivers/clk/meson/meson8b.c

2409

.shift = 25,

drivers/clk/meson/meson8b.c

242

.shift = 30,

drivers/clk/meson/meson8b.c

2424

.shift = 16,

drivers/clk/meson/meson8b.c

2459

.shift = 9,

drivers/clk/meson/meson8b.c

247

.shift = 0,

drivers/clk/meson/meson8b.c

2474

.shift = 0,

drivers/clk/meson/meson8b.c

2509

.shift = 25,

drivers/clk/meson/meson8b.c

252

.shift = 10,

drivers/clk/meson/meson8b.c

2524

.shift = 16,

drivers/clk/meson/meson8b.c

2559

.shift = 31,

drivers/clk/meson/meson8b.c

257

.shift = 0,

drivers/clk/meson/meson8b.c

2586

.shift = 9,

drivers/clk/meson/meson8b.c

2601

.shift = 0,

drivers/clk/meson/meson8b.c

262

.shift = 31,

drivers/clk/meson/meson8b.c

2636

.shift = 25,

drivers/clk/meson/meson8b.c

2651

.shift = 16,

drivers/clk/meson/meson8b.c

267

.shift = 29,

drivers/clk/meson/meson8b.c

2686

.shift = 27,

drivers/clk/meson/meson8b.c

288

.shift = 16,

drivers/clk/meson/meson8b.c

306

.shift = 18,

drivers/clk/meson/meson8b.c

325

.shift = 30,

drivers/clk/meson/meson8b.c

330

.shift = 0,

drivers/clk/meson/meson8b.c

335

.shift = 9,

drivers/clk/meson/meson8b.c

340

.shift = 31,

drivers/clk/meson/meson8b.c

345

.shift = 29,

drivers/clk/meson/meson8b.c

365

.shift = 16,

drivers/clk/meson/meson8b.c

523

.shift = 12,

drivers/clk/meson/meson8b.c

540

.shift = 0,

drivers/clk/meson/meson8b.c

545

.shift = 15,

drivers/clk/meson/meson8b.c

550

.shift = 16,

drivers/clk/meson/meson8b.c

555

.shift = 25,

drivers/clk/meson/meson8b.c

589

.shift = 0,

drivers/clk/meson/meson8b.c

594

.shift = 15,

drivers/clk/meson/meson8b.c

599

.shift = 16,

drivers/clk/meson/meson8b.c

633

.shift = 0,

drivers/clk/meson/meson8b.c

638

.shift = 15,

drivers/clk/meson/meson8b.c

643

.shift = 16,

drivers/clk/meson/meson8b.c

679

.shift = 12,

drivers/clk/meson/meson8b.c

702

.shift = 0,

drivers/clk/meson/meson8b.c

735

.shift = 0,

drivers/clk/meson/meson8b.c

793

.shift = 20,

drivers/clk/meson/meson8b.c

814

.shift = 2,

drivers/clk/meson/meson8b.c

840

.shift = 7,

drivers/clk/meson/meson8b.c

860

.shift = 9,

drivers/clk/meson/meson8b.c

882

.shift = 0,

drivers/clk/meson/parm.h

14

#define SETPMASK(width, shift) GENMASK(shift + width - 1, shift)

drivers/clk/meson/parm.h

15

#define CLRPMASK(width, shift) (~SETPMASK(width, shift))

drivers/clk/meson/parm.h

17

#define PARM_GET(width, shift, reg) \

drivers/clk/meson/parm.h

18

(((reg) & SETPMASK(width, shift)) >> (shift))

drivers/clk/meson/parm.h

19

#define PARM_SET(width, shift, reg, val) \

drivers/clk/meson/parm.h

20

(((reg) & CLRPMASK(width, shift)) | ((val) << (shift)))

drivers/clk/meson/parm.h

26

u8 shift;

drivers/clk/meson/parm.h

35

return PARM_GET(p->width, p->shift, val);

drivers/clk/meson/parm.h

41

regmap_update_bits(map, p->reg_off, SETPMASK(p->width, p->shift),

drivers/clk/meson/parm.h

42

val << p->shift);

drivers/clk/meson/s4-peripherals.c

105

.shift = 0,

drivers/clk/meson/s4-peripherals.c

110

.shift = 12,

drivers/clk/meson/s4-peripherals.c

1102

.shift = 28,

drivers/clk/meson/s4-peripherals.c

1117

.shift = 20,

drivers/clk/meson/s4-peripherals.c

1132

.shift = 12,

drivers/clk/meson/s4-peripherals.c

1147

.shift = 28,

drivers/clk/meson/s4-peripherals.c

115

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1177

.shift = 16,

drivers/clk/meson/s4-peripherals.c

120

.shift = 12,

drivers/clk/meson/s4-peripherals.c

125

.shift = 28,

drivers/clk/meson/s4-peripherals.c

1280

.shift = 9,

drivers/clk/meson/s4-peripherals.c

1295

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1324

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1375

.shift = 9,

drivers/clk/meson/s4-peripherals.c

1395

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1429

.shift = 25,

drivers/clk/meson/s4-peripherals.c

144

.shift = 24,

drivers/clk/meson/s4-peripherals.c

1443

.shift = 16,

drivers/clk/meson/s4-peripherals.c

1477

.shift = 31,

drivers/clk/meson/s4-peripherals.c

1507

.shift = 9,

drivers/clk/meson/s4-peripherals.c

1522

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1557

.shift = 9,

drivers/clk/meson/s4-peripherals.c

1572

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1607

.shift = 15,

drivers/clk/meson/s4-peripherals.c

1625

.shift = 9,

drivers/clk/meson/s4-peripherals.c

1640

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1675

.shift = 9,

drivers/clk/meson/s4-peripherals.c

1690

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1725

.shift = 15,

drivers/clk/meson/s4-peripherals.c

1755

.shift = 9,

drivers/clk/meson/s4-peripherals.c

1769

.shift = 0,

drivers/clk/meson/s4-peripherals.c

179

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1799

.shift = 25,

drivers/clk/meson/s4-peripherals.c

1813

.shift = 16,

drivers/clk/meson/s4-peripherals.c

1843

.shift = 31,

drivers/clk/meson/s4-peripherals.c

1868

.shift = 20,

drivers/clk/meson/s4-peripherals.c

1882

.shift = 16,

drivers/clk/meson/s4-peripherals.c

1915

.shift = 0,

drivers/clk/meson/s4-peripherals.c

1960

.shift = 9,

drivers/clk/meson/s4-peripherals.c

1974

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2008

.shift = 25,

drivers/clk/meson/s4-peripherals.c

2022

.shift = 16,

drivers/clk/meson/s4-peripherals.c

2056

.shift = 31,

drivers/clk/meson/s4-peripherals.c

2086

.shift = 9,

drivers/clk/meson/s4-peripherals.c

2100

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2134

.shift = 25,

drivers/clk/meson/s4-peripherals.c

2148

.shift = 16,

drivers/clk/meson/s4-peripherals.c

217

.shift = 26,

drivers/clk/meson/s4-peripherals.c

2182

.shift = 31,

drivers/clk/meson/s4-peripherals.c

2221

.shift = 9,

drivers/clk/meson/s4-peripherals.c

2235

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2276

.shift = 25,

drivers/clk/meson/s4-peripherals.c

2290

.shift = 16,

drivers/clk/meson/s4-peripherals.c

231

.shift = 16,

drivers/clk/meson/s4-peripherals.c

2332

.shift = 9,

drivers/clk/meson/s4-peripherals.c

2346

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2392

.shift = 9,

drivers/clk/meson/s4-peripherals.c

2406

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2440

.shift = 9,

drivers/clk/meson/s4-peripherals.c

2454

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2488

.shift = 25,

drivers/clk/meson/s4-peripherals.c

2502

.shift = 16,

drivers/clk/meson/s4-peripherals.c

2547

.shift = 7,

drivers/clk/meson/s4-peripherals.c

2561

.shift = 0,

drivers/clk/meson/s4-peripherals.c

263

.shift = 10,

drivers/clk/meson/s4-peripherals.c

2643

.shift = 9,

drivers/clk/meson/s4-peripherals.c

2660

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2716

.shift = 12,

drivers/clk/meson/s4-peripherals.c

2736

.shift = 0,

drivers/clk/meson/s4-peripherals.c

277

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2771

.shift = 16,

drivers/clk/meson/s4-peripherals.c

2787

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2821

.shift = 9,

drivers/clk/meson/s4-peripherals.c

2838

.shift = 0,

drivers/clk/meson/s4-peripherals.c

2873

.shift = 25,

drivers/clk/meson/s4-peripherals.c

2895

.shift = 16,

drivers/clk/meson/s4-peripherals.c

309

.shift = 31,

drivers/clk/meson/s4-peripherals.c

341

.shift = 0,

drivers/clk/meson/s4-peripherals.c

346

.shift = 12,

drivers/clk/meson/s4-peripherals.c

351

.shift = 0,

drivers/clk/meson/s4-peripherals.c

356

.shift = 12,

drivers/clk/meson/s4-peripherals.c

361

.shift = 28,

drivers/clk/meson/s4-peripherals.c

380

.shift = 24,

drivers/clk/meson/s4-peripherals.c

399

.shift = 31,

drivers/clk/meson/s4-peripherals.c

448

.shift = 0,

drivers/clk/meson/s4-peripherals.c

453

.shift = 12,

drivers/clk/meson/s4-peripherals.c

458

.shift = 0,

drivers/clk/meson/s4-peripherals.c

463

.shift = 12,

drivers/clk/meson/s4-peripherals.c

468

.shift = 28,

drivers/clk/meson/s4-peripherals.c

487

.shift = 24,

drivers/clk/meson/s4-peripherals.c

506

.shift = 31,

drivers/clk/meson/s4-peripherals.c

547

.shift = 9,

drivers/clk/meson/s4-peripherals.c

561

.shift = 0,

drivers/clk/meson/s4-peripherals.c

624

.shift = 10,

drivers/clk/meson/s4-peripherals.c

643

.shift = 0,

drivers/clk/meson/s4-peripherals.c

648

.shift = 16,

drivers/clk/meson/s4-peripherals.c

670

.shift = 18,

drivers/clk/meson/s4-peripherals.c

715

.shift = 16,

drivers/clk/meson/s4-peripherals.c

730

.shift = 16,

drivers/clk/meson/s4-peripherals.c

772

.shift = 0,

drivers/clk/meson/s4-peripherals.c

789

.shift = 0,

drivers/clk/meson/s4-pll.c

100

.shift = 16,

drivers/clk/meson/s4-pll.c

297

.shift = 28,

drivers/clk/meson/s4-pll.c

302

.shift = 0,

drivers/clk/meson/s4-pll.c

307

.shift = 10,

drivers/clk/meson/s4-pll.c

312

.shift = 31,

drivers/clk/meson/s4-pll.c

317

.shift = 29,

drivers/clk/meson/s4-pll.c

337

.shift = 16,

drivers/clk/meson/s4-pll.c

368

.shift = 28,

drivers/clk/meson/s4-pll.c

373

.shift = 0,

drivers/clk/meson/s4-pll.c

378

.shift = 10,

drivers/clk/meson/s4-pll.c

383

.shift = 0,

drivers/clk/meson/s4-pll.c

388

.shift = 31,

drivers/clk/meson/s4-pll.c

393

.shift = 29,

drivers/clk/meson/s4-pll.c

415

.shift = 16,

drivers/clk/meson/s4-pll.c

435

.shift = 28,

drivers/clk/meson/s4-pll.c

440

.shift = 0,

drivers/clk/meson/s4-pll.c

445

.shift = 10,

drivers/clk/meson/s4-pll.c

450

.shift = 31,

drivers/clk/meson/s4-pll.c

455

.shift = 29,

drivers/clk/meson/s4-pll.c

473

.shift = 16,

drivers/clk/meson/s4-pll.c

491

.shift = 20,

drivers/clk/meson/s4-pll.c

523

.shift = 5,

drivers/clk/meson/s4-pll.c

557

.shift = 0,

drivers/clk/meson/s4-pll.c

562

.shift = 30,

drivers/clk/meson/s4-pll.c

567

.shift = 20,

drivers/clk/meson/s4-pll.c

572

.shift = 29,

drivers/clk/meson/s4-pll.c

58

.shift = 28,

drivers/clk/meson/s4-pll.c

610

.shift = 0,

drivers/clk/meson/s4-pll.c

615

.shift = 30,

drivers/clk/meson/s4-pll.c

620

.shift = 20,

drivers/clk/meson/s4-pll.c

625

.shift = 29,

drivers/clk/meson/s4-pll.c

63

.shift = 0,

drivers/clk/meson/s4-pll.c

663

.shift = 0,

drivers/clk/meson/s4-pll.c

668

.shift = 30,

drivers/clk/meson/s4-pll.c

673

.shift = 20,

drivers/clk/meson/s4-pll.c

678

.shift = 29,

drivers/clk/meson/s4-pll.c

68

.shift = 0,

drivers/clk/meson/s4-pll.c

716

.shift = 0,

drivers/clk/meson/s4-pll.c

721

.shift = 30,

drivers/clk/meson/s4-pll.c

726

.shift = 20,

drivers/clk/meson/s4-pll.c

73

.shift = 10,

drivers/clk/meson/s4-pll.c

731

.shift = 29,

drivers/clk/meson/s4-pll.c

78

.shift = 31,

drivers/clk/meson/s4-pll.c

83

.shift = 29,

drivers/clk/meson/t7-peripherals.c

102

.shift = 12,

drivers/clk/meson/t7-peripherals.c

107

.shift = 28,

drivers/clk/meson/t7-peripherals.c

126

.shift = 24,

drivers/clk/meson/t7-peripherals.c

160

.shift = 0,

drivers/clk/meson/t7-peripherals.c

198

.shift = 0,

drivers/clk/meson/t7-peripherals.c

203

.shift = 12,

drivers/clk/meson/t7-peripherals.c

208

.shift = 0,

drivers/clk/meson/t7-peripherals.c

213

.shift = 12,

drivers/clk/meson/t7-peripherals.c

218

.shift = 28,

drivers/clk/meson/t7-peripherals.c

237

.shift = 24,

drivers/clk/meson/t7-peripherals.c

271

.shift = 31,

drivers/clk/meson/t7-peripherals.c

304

.shift = 0,

drivers/clk/meson/t7-peripherals.c

309

.shift = 12,

drivers/clk/meson/t7-peripherals.c

314

.shift = 0,

drivers/clk/meson/t7-peripherals.c

319

.shift = 12,

drivers/clk/meson/t7-peripherals.c

324

.shift = 28,

drivers/clk/meson/t7-peripherals.c

343

.shift = 24,

drivers/clk/meson/t7-peripherals.c

377

.shift = 31,

drivers/clk/meson/t7-peripherals.c

425

.shift = 15,

drivers/clk/meson/t7-peripherals.c

451

.shift = 15,

drivers/clk/meson/t7-peripherals.c

511

.shift = 0,

drivers/clk/meson/t7-peripherals.c

563

.shift = 31,

drivers/clk/meson/t7-peripherals.c

616

.shift = 31,

drivers/clk/meson/t7-peripherals.c

648

.shift = 0,

drivers/clk/meson/t7-peripherals.c

700

.shift = 31,

drivers/clk/meson/t7-peripherals.c

729

.shift = 9,

drivers/clk/meson/t7-peripherals.c

744

.shift = 0,

drivers/clk/meson/t7-peripherals.c

87

.shift = 0,

drivers/clk/meson/t7-peripherals.c

92

.shift = 12,

drivers/clk/meson/t7-peripherals.c

97

.shift = 0,

drivers/clk/meson/t7-pll.c

102

.shift = 10,

drivers/clk/meson/t7-pll.c

107

.shift = 31,

drivers/clk/meson/t7-pll.c

112

.shift = 29,

drivers/clk/meson/t7-pll.c

132

.shift = 16,

drivers/clk/meson/t7-pll.c

166

.shift = 28,

drivers/clk/meson/t7-pll.c

171

.shift = 0,

drivers/clk/meson/t7-pll.c

176

.shift = 16,

drivers/clk/meson/t7-pll.c

181

.shift = 31,

drivers/clk/meson/t7-pll.c

186

.shift = 29,

drivers/clk/meson/t7-pll.c

206

.shift = 12,

drivers/clk/meson/t7-pll.c

234

.shift = 28,

drivers/clk/meson/t7-pll.c

239

.shift = 0,

drivers/clk/meson/t7-pll.c

244

.shift = 10,

drivers/clk/meson/t7-pll.c

249

.shift = 0,

drivers/clk/meson/t7-pll.c

254

.shift = 31,

drivers/clk/meson/t7-pll.c

259

.shift = 29,

drivers/clk/meson/t7-pll.c

280

.shift = 16,

drivers/clk/meson/t7-pll.c

319

.shift = 28,

drivers/clk/meson/t7-pll.c

324

.shift = 0,

drivers/clk/meson/t7-pll.c

329

.shift = 10,

drivers/clk/meson/t7-pll.c

334

.shift = 31,

drivers/clk/meson/t7-pll.c

339

.shift = 29,

drivers/clk/meson/t7-pll.c

372

.shift = 16,

drivers/clk/meson/t7-pll.c

423

.shift = 0,

drivers/clk/meson/t7-pll.c

428

.shift = 30,

drivers/clk/meson/t7-pll.c

433

.shift = 20,

drivers/clk/meson/t7-pll.c

438

.shift = 29,

drivers/clk/meson/t7-pll.c

476

.shift = 0,

drivers/clk/meson/t7-pll.c

481

.shift = 30,

drivers/clk/meson/t7-pll.c

486

.shift = 20,

drivers/clk/meson/t7-pll.c

491

.shift = 29,

drivers/clk/meson/t7-pll.c

529

.shift = 0,

drivers/clk/meson/t7-pll.c

534

.shift = 30,

drivers/clk/meson/t7-pll.c

539

.shift = 20,

drivers/clk/meson/t7-pll.c

544

.shift = 29,

drivers/clk/meson/t7-pll.c

582

.shift = 0,

drivers/clk/meson/t7-pll.c

587

.shift = 30,

drivers/clk/meson/t7-pll.c

592

.shift = 20,

drivers/clk/meson/t7-pll.c

597

.shift = 29,

drivers/clk/meson/t7-pll.c

640

.shift = 28,

drivers/clk/meson/t7-pll.c

645

.shift = 0,

drivers/clk/meson/t7-pll.c

650

.shift = 10,

drivers/clk/meson/t7-pll.c

655

.shift = 31,

drivers/clk/meson/t7-pll.c

660

.shift = 29,

drivers/clk/meson/t7-pll.c

680

.shift = 16,

drivers/clk/meson/t7-pll.c

698

.shift = 20,

drivers/clk/meson/t7-pll.c

729

.shift = 28,

drivers/clk/meson/t7-pll.c

734

.shift = 0,

drivers/clk/meson/t7-pll.c

739

.shift = 16,

drivers/clk/meson/t7-pll.c

744

.shift = 31,

drivers/clk/meson/t7-pll.c

749

.shift = 29,

drivers/clk/meson/t7-pll.c

754

.shift = 6,

drivers/clk/meson/t7-pll.c

784

.shift = 12,

drivers/clk/meson/t7-pll.c

802

.shift = 16,

drivers/clk/meson/t7-pll.c

821

.shift = 4,

drivers/clk/meson/t7-pll.c

883

.shift = 12,

drivers/clk/meson/t7-pll.c

92

.shift = 28,

drivers/clk/meson/t7-pll.c

97

.shift = 0,

drivers/clk/microchip/clk-mpfs-ccc.c

103

.shift = _shift, \

drivers/clk/microchip/clk-mpfs-ccc.c

126

.divider.shift = _shift, \

drivers/clk/microchip/clk-mpfs-ccc.c

48

u32 shift;

drivers/clk/microchip/clk-mpfs.c

102

u8 shift;

drivers/clk/microchip/clk-mpfs.c

169

.shift = _shift, \

drivers/clk/microchip/clk-mpfs.c

207

.output.shift = _shift, \

drivers/clk/microchip/clk-mpfs.c

259

val >>= cfg->shift;

drivers/clk/microchip/clk-mpfs.c

286

mask = clk_div_mask(cfg->width) << cfg->shift;

drivers/clk/microchip/clk-mpfs.c

287

val = divider_setting << cfg->shift;

drivers/clk/microchip/clk-mpfs.c

301

.cfg.shift = _shift, \

drivers/clk/microchip/clk-mpfs.c

323

.cfg.shift = 0,

drivers/clk/microchip/clk-mpfs.c

365

BIT(periph->shift), BIT(periph->shift));

drivers/clk/microchip/clk-mpfs.c

375

regmap_update_bits(periph->map, periph->map_offset, BIT(periph->shift), 0);

drivers/clk/microchip/clk-mpfs.c

386

return !!(val & BIT(periph->shift));

drivers/clk/microchip/clk-mpfs.c

398

.periph.shift = _shift, \

drivers/clk/microchip/clk-mpfs.c

65

u32 shift;

drivers/clk/microchip/clk-mpfs.c

86

u8 shift;

drivers/clk/mmp/clk-audio.c

261

priv->sspa_mux.shift = SSPA_AUD_CTRL_SSPA0_MUX_SHIFT;

drivers/clk/mmp/clk-audio.c

270

priv->sysclk_div.shift = SSPA_AUD_CTRL_SYSCLK_DIV_SHIFT;

drivers/clk/mmp/clk-audio.c

291

priv->sspa0_div.shift = SSPA_AUD_CTRL_SSPA0_DIV_SHIFT;

drivers/clk/mmp/clk-audio.c

314

priv->sspa1_mux.shift = SSPA_AUD_CTRL_SSPA1_MUX_SHIFT;

drivers/clk/mmp/clk-audio.c

322

priv->sspa1_div.shift = SSPA_AUD_CTRL_SSPA1_DIV_SHIFT;

drivers/clk/mmp/clk-mix.c

135

u8 width, shift;

drivers/clk/mmp/clk-mix.c

154

shift = ri->shift_div;

drivers/clk/mmp/clk-mix.c

155

mux_div &= ~MMP_CLK_BITS_MASK(width, shift);

drivers/clk/mmp/clk-mix.c

156

mux_div |= MMP_CLK_BITS_SET_VAL(div_val, width, shift);

drivers/clk/mmp/clk-mix.c

161

shift = ri->shift_mux;

drivers/clk/mmp/clk-mix.c

162

mux_div &= ~MMP_CLK_BITS_MASK(width, shift);

drivers/clk/mmp/clk-mix.c

163

mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift);

drivers/clk/mmp/clk-mix.c

292

u8 width, shift;

drivers/clk/mmp/clk-mix.c

308

shift = mix->reg_info.shift_mux;

drivers/clk/mmp/clk-mix.c

310

mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift);

drivers/clk/mmp/clk-mix.c

322

u8 width, shift;

drivers/clk/mmp/clk-mix.c

338

shift = mix->reg_info.shift_div;

drivers/clk/mmp/clk-mix.c

340

div = _get_div(mix, MMP_CLK_BITS_GET_VAL(mux_div, width, shift));

drivers/clk/mmp/clk-pll.c

103

void __iomem *reg, u8 shift,

drivers/clk/mmp/clk-pll.c

125

pll->shift = shift;

drivers/clk/mmp/clk-pll.c

158

reg, clks[i].shift,

drivers/clk/mmp/clk-pll.c

22

u8 shift;

drivers/clk/mmp/clk-pll.c

59

fbdiv = (val >> pll->shift) & 0x1ff;

drivers/clk/mmp/clk-pll.c

60

refdiv = (val >> (pll->shift + 9)) & 0x1f;

drivers/clk/mmp/clk.c

137

clks[i].shift,

drivers/clk/mmp/clk.c

164

clks[i].shift,

drivers/clk/mmp/clk.h

198

u8 shift;

drivers/clk/mmp/clk.h

213

u8 shift;

drivers/clk/mmp/clk.h

229

u8 shift;

drivers/clk/mmp/clk.h

40

#define MMP_CLK_BITS_MASK(width, shift) \

drivers/clk/mmp/clk.h

41

(((1 << (width)) - 1) << (shift))

drivers/clk/mmp/clk.h

42

#define MMP_CLK_BITS_GET_VAL(data, width, shift) \

drivers/clk/mmp/clk.h

43

((data & MMP_CLK_BITS_MASK(width, shift)) >> (shift))

drivers/clk/mmp/clk.h

44

#define MMP_CLK_BITS_SET_VAL(val, width, shift) \

drivers/clk/mmp/clk.h

45

(((val) << (shift)) & MMP_CLK_BITS_MASK(width, shift))

drivers/clk/mvebu/armada-37xx-periph.c

141

.shift = _shift, \

drivers/clk/mvebu/armada-37xx-periph.c

163

.shift = _shift, \

drivers/clk/mvebu/armada-37xx-periph.c

327

static unsigned int get_div(void __iomem *reg, int shift)

drivers/clk/mvebu/armada-37xx-periph.c

331

val = (readl(reg) >> shift) & 0x7;

drivers/clk/mvebu/kirkwood.c

249

int shift;

drivers/clk/mvebu/kirkwood.c

283

if (clkspec->args[0] == mux->shift)

drivers/clk/mvebu/kirkwood.c

319

desc[n].flags, base, desc[n].shift,

drivers/clk/mxs/clk-div.c

71

void __iomem *reg, u8 shift, u8 width, u8 busy)

drivers/clk/mxs/clk-div.c

91

div->divider.shift = shift;

drivers/clk/mxs/clk-frac.c

113

void __iomem *reg, u8 shift, u8 width, u8 busy)

drivers/clk/mxs/clk-frac.c

130

frac->shift = shift;

drivers/clk/mxs/clk-frac.c

26

u8 shift;

drivers/clk/mxs/clk-frac.c

40

div = readl_relaxed(frac->reg) >> frac->shift;

drivers/clk/mxs/clk-frac.c

97

val &= ~(((1 << frac->width) - 1) << frac->shift);

drivers/clk/mxs/clk-frac.c

98

val |= div << frac->shift;

drivers/clk/mxs/clk-ref.c

87

u8 frac, shift = ref->idx * 8;

drivers/clk/mxs/clk-ref.c

96

val &= ~(0x3f << shift);

drivers/clk/mxs/clk-ref.c

97

val |= frac << shift;

drivers/clk/mxs/clk.c

14

int mxs_clk_wait(void __iomem *reg, u8 shift)

drivers/clk/mxs/clk.c

18

while (readl_relaxed(reg) & (1 << shift))

drivers/clk/mxs/clk.h

19

int mxs_clk_wait(void __iomem *reg, u8 shift);

drivers/clk/mxs/clk.h

28

void __iomem *reg, u8 shift, u8 width, u8 busy);

drivers/clk/mxs/clk.h

31

void __iomem *reg, u8 shift, u8 width, u8 busy);

drivers/clk/mxs/clk.h

39

const char *parent_name, void __iomem *reg, u8 shift)

drivers/clk/mxs/clk.h

42

reg, shift, CLK_GATE_SET_TO_DISABLE,

drivers/clk/mxs/clk.h

47

u8 shift, u8 width, const char *const *parent_names, int num_parents)

drivers/clk/mxs/clk.h

51

reg, shift, width, 0, &mxs_lock);

drivers/clk/nuvoton/clk-ma35d1-divider.c

120

div->shift = shift;

drivers/clk/nuvoton/clk-ma35d1-divider.c

17

u8 shift;

drivers/clk/nuvoton/clk-ma35d1-divider.c

35

val = readl_relaxed(dclk->reg) >> dclk->shift;

drivers/clk/nuvoton/clk-ma35d1-divider.c

64

data &= ~(clk_div_mask(dclk->width) << dclk->shift);

drivers/clk/nuvoton/clk-ma35d1-divider.c

65

data |= (value - 1) << dclk->shift;

drivers/clk/nuvoton/clk-ma35d1-divider.c

82

u8 shift, u8 width, u32 mask_bit)

drivers/clk/nuvoton/clk-ma35d1.c

378

void __iomem *reg, u8 shift, u8 width,

drivers/clk/nuvoton/clk-ma35d1.c

383

CLK_SET_RATE_NO_REPARENT, reg, shift,

drivers/clk/nuvoton/clk-ma35d1.c

388

void __iomem *reg, u8 shift, u8 width,

drivers/clk/nuvoton/clk-ma35d1.c

393

CLK_SET_RATE_NO_REPARENT, reg, shift,

drivers/clk/nuvoton/clk-ma35d1.c

399

u8 shift, u8 width)

drivers/clk/nuvoton/clk-ma35d1.c

402

reg, shift, width, 0, &ma35d1_lock);

drivers/clk/nuvoton/clk-ma35d1.c

407

u8 shift, u8 width)

drivers/clk/nuvoton/clk-ma35d1.c

410

CLK_DIVIDER_POWER_OF_TWO, reg, shift,

drivers/clk/nuvoton/clk-ma35d1.c

416

u8 shift, u8 width,

drivers/clk/nuvoton/clk-ma35d1.c

420

reg, shift, width, 0,

drivers/clk/nuvoton/clk-ma35d1.c

433

void __iomem *reg, u8 shift)

drivers/clk/nuvoton/clk-ma35d1.c

436

reg, shift, 0, &ma35d1_lock);

drivers/clk/nuvoton/clk-ma35d1.h

16

u8 shift, u8 width, u32 mask_bit);

drivers/clk/nxp/clk-lpc18xx-ccu.c

217

div->shift = 27;

drivers/clk/nxp/clk-lpc18xx-cgu.c

174

.shift = 2, \

drivers/clk/nxp/clk-lpc18xx-cgu.c

179

.shift = 24, \

drivers/clk/nxp/clk-lpc18xx-cgu.c

209

.shift = 24, \

drivers/clk/nxp/clk-lpc18xx-cgu.c

275

.shift = 24, \

drivers/clk/nxp/clk-lpc32xx.c

1009

val >>= mux->shift;

drivers/clk/nxp/clk-lpc32xx.c

1035

mux->mask << mux->shift, index << mux->shift);

drivers/clk/nxp/clk-lpc32xx.c

1125

.shift = (_shift), \

drivers/clk/nxp/clk-lpc32xx.c

1143

.shift = (_shift), \

drivers/clk/nxp/clk-lpc32xx.c

344

u8 shift;

drivers/clk/nxp/clk-lpc32xx.c

352

u8 shift;

drivers/clk/nxp/clk-lpc32xx.c

953

val >>= divider->shift;

drivers/clk/nxp/clk-lpc32xx.c

969

bestdiv >>= divider->shift;

drivers/clk/nxp/clk-lpc32xx.c

992

div_mask(divider->width) << divider->shift,

drivers/clk/nxp/clk-lpc32xx.c

993

value << divider->shift);

drivers/clk/pistachio/clk.c

67

p->base + gate[i].reg, gate[i].shift,

drivers/clk/pistachio/clk.c

84

p->base + mux[i].reg, mux[i].shift,

drivers/clk/pistachio/clk.h

14

unsigned int shift;

drivers/clk/pistachio/clk.h

23

.shift = _shift, \

drivers/clk/pistachio/clk.h

31

unsigned int shift;

drivers/clk/pistachio/clk.h

43

.shift = _shift, \

drivers/clk/qcom/camcc-sm8250.c

682

.shift = 0,

drivers/clk/qcom/clk-cpu-8996.c

343

.shift = 2,

drivers/clk/qcom/clk-cpu-8996.c

357

.shift = 2,

drivers/clk/qcom/clk-krait.c

116

mask = mask << (d->shift + LPL_SHIFT) | mask << d->shift;

drivers/clk/qcom/clk-krait.c

118

mask <<= d->shift;

drivers/clk/qcom/clk-krait.c

137

div >>= d->shift;

drivers/clk/qcom/clk-krait.c

38

regval &= ~(mux->mask << mux->shift);

drivers/clk/qcom/clk-krait.c

39

regval |= (sel & mux->mask) << mux->shift;

drivers/clk/qcom/clk-krait.c

41

regval &= ~(mux->mask << (mux->shift + LPL_SHIFT));

drivers/clk/qcom/clk-krait.c

42

regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT);

drivers/clk/qcom/clk-krait.c

85

sel >>= mux->shift;

drivers/clk/qcom/clk-krait.h

12

u32 shift;

drivers/clk/qcom/clk-krait.h

31

u32 shift;

drivers/clk/qcom/clk-regmap-divider.c

26

val >>= divider->shift;

drivers/clk/qcom/clk-regmap-divider.c

52

(BIT(divider->width) - 1) << divider->shift,

drivers/clk/qcom/clk-regmap-divider.c

53

div << divider->shift);

drivers/clk/qcom/clk-regmap-divider.c

64

div >>= divider->shift;

drivers/clk/qcom/clk-regmap-divider.h

14

u32 shift;

drivers/clk/qcom/clk-regmap-mux.c

27

val >>= mux->shift;

drivers/clk/qcom/clk-regmap-mux.c

40

unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift);

drivers/clk/qcom/clk-regmap-mux.c

47

val <<= mux->shift;

drivers/clk/qcom/clk-regmap-mux.h

15

u32 shift;

drivers/clk/qcom/dispcc-glymur.c

742

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

757

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

772

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

787

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

802

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

817

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

832

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

847

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

862

.shift = 0,

drivers/clk/qcom/dispcc-glymur.c

877

.shift = 0,

drivers/clk/qcom/dispcc-kaanapali.c

780

.shift = 0,

drivers/clk/qcom/dispcc-kaanapali.c

795

.shift = 0,

drivers/clk/qcom/dispcc-kaanapali.c

810

.shift = 0,

drivers/clk/qcom/dispcc-kaanapali.c

825

.shift = 0,

drivers/clk/qcom/dispcc-kaanapali.c

840

.shift = 0,

drivers/clk/qcom/dispcc-kaanapali.c

855

.shift = 0,

drivers/clk/qcom/dispcc-kaanapali.c

870

.shift = 0,

drivers/clk/qcom/dispcc-milos.c

389

.shift = 0,

drivers/clk/qcom/dispcc-milos.c

404

.shift = 0,

drivers/clk/qcom/dispcc-qcm2290.c

142

.shift = 0,

drivers/clk/qcom/dispcc-qcs615.c

335

.shift = 0,

drivers/clk/qcom/dispcc-qcs615.c

349

.shift = 0,

drivers/clk/qcom/dispcc-sc7180.c

351

.shift = 0,

drivers/clk/qcom/dispcc-sc7180.c

365

.shift = 0,

drivers/clk/qcom/dispcc-sc7280.c

359

.shift = 0,

drivers/clk/qcom/dispcc-sc7280.c

373

.shift = 0,

drivers/clk/qcom/dispcc-sc7280.c

387

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1155

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1170

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1185

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1200

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1215

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1230

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1245

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1260

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1275

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1290

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1305

.shift = 0,

drivers/clk/qcom/dispcc-sc8280xp.c

1320

.shift = 0,

drivers/clk/qcom/dispcc-sdm845.c

388

.shift = 0,

drivers/clk/qcom/dispcc-sdm845.c

443

.shift = 0,

drivers/clk/qcom/dispcc-sm4450.c

330

.shift = 0,

drivers/clk/qcom/dispcc-sm6115.c

168

.shift = 0,

drivers/clk/qcom/dispcc-sm6350.c

169

.shift = 0,

drivers/clk/qcom/dispcc-sm6350.c

336

.shift = 0,

drivers/clk/qcom/dispcc-sm6375.c

252

.shift = 0,

drivers/clk/qcom/dispcc-sm7150.c

488

.shift = 0,

drivers/clk/qcom/dispcc-sm7150.c

539

.shift = 0,

drivers/clk/qcom/dispcc-sm8250.c

467

.shift = 0,

drivers/clk/qcom/dispcc-sm8250.c

641

.shift = 0,

drivers/clk/qcom/dispcc-sm8250.c

656

.shift = 0,

drivers/clk/qcom/dispcc-sm8250.c

670

.shift = 0,

drivers/clk/qcom/dispcc-sm8250.c

684

.shift = 0,

drivers/clk/qcom/dispcc-sm8450.c

726

.shift = 0,

drivers/clk/qcom/dispcc-sm8450.c

740

.shift = 0,

drivers/clk/qcom/dispcc-sm8450.c

754

.shift = 0,

drivers/clk/qcom/dispcc-sm8450.c

769

.shift = 0,

drivers/clk/qcom/dispcc-sm8450.c

784

.shift = 0,

drivers/clk/qcom/dispcc-sm8450.c

799

.shift = 0,

drivers/clk/qcom/dispcc-sm8550.c

712

.shift = 0,

drivers/clk/qcom/dispcc-sm8550.c

726

.shift = 0,

drivers/clk/qcom/dispcc-sm8550.c

740

.shift = 0,

drivers/clk/qcom/dispcc-sm8550.c

755

.shift = 0,

drivers/clk/qcom/dispcc-sm8550.c

770

.shift = 0,

drivers/clk/qcom/dispcc-sm8550.c

785

.shift = 0,

drivers/clk/qcom/dispcc-sm8750.c

822

.shift = 0,

drivers/clk/qcom/dispcc-sm8750.c

836

.shift = 0,

drivers/clk/qcom/dispcc-sm8750.c

850

.shift = 0,

drivers/clk/qcom/dispcc-sm8750.c

865

.shift = 0,

drivers/clk/qcom/dispcc-sm8750.c

880

.shift = 0,

drivers/clk/qcom/dispcc-sm8750.c

895

.shift = 0,

drivers/clk/qcom/dispcc-x1e80100.c

669

.shift = 0,

drivers/clk/qcom/dispcc-x1e80100.c

684

.shift = 0,

drivers/clk/qcom/dispcc-x1e80100.c

699

.shift = 0,

drivers/clk/qcom/dispcc-x1e80100.c

714

.shift = 0,

drivers/clk/qcom/dispcc-x1e80100.c

729

.shift = 0,

drivers/clk/qcom/dispcc-x1e80100.c

744

.shift = 0,

drivers/clk/qcom/dispcc0-sa8775p.c

586

.shift = 0,

drivers/clk/qcom/dispcc0-sa8775p.c

601

.shift = 0,

drivers/clk/qcom/dispcc0-sa8775p.c

616

.shift = 0,

drivers/clk/qcom/dispcc0-sa8775p.c

631

.shift = 0,

drivers/clk/qcom/dispcc1-sa8775p.c

586

.shift = 0,

drivers/clk/qcom/dispcc1-sa8775p.c

601

.shift = 0,

drivers/clk/qcom/dispcc1-sa8775p.c

616

.shift = 0,

drivers/clk/qcom/dispcc1-sa8775p.c

631

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

487

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

502

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

517

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

532

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

547

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

562

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

577

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

592

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

607

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

622

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

637

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

652

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

667

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

682

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

697

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

712

.shift = 0,

drivers/clk/qcom/ecpricc-qdu1000.c

727

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1004

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1019

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1034

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1049

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1064

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1079

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1094

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1109

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1124

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1139

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1154

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1169

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1184

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1199

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1214

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1229

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1244

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1259

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1274

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1289

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1304

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1319

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1334

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1349

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1364

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

1379

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2868

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2883

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2898

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2913

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2928

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2943

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2958

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2973

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

2988

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3003

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3018

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3033

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3048

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3063

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3078

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3093

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3108

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3123

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3138

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

3153

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

914

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

929

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

944

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

959

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

974

.shift = 0,

drivers/clk/qcom/gcc-glymur.c

989

.shift = 0,

drivers/clk/qcom/gcc-ipq4019.c

163

mask = (BIT(pll->cdiv.width) - 1) << pll->cdiv.shift;

drivers/clk/qcom/gcc-ipq4019.c

166

f->pre_div << pll->cdiv.shift);

drivers/clk/qcom/gcc-ipq4019.c

191

cdiv = (cdiv >> pll->cdiv.shift) & (BIT(pll->cdiv.width) - 1);

drivers/clk/qcom/gcc-ipq4019.c

235

.cdiv.shift = 4,

drivers/clk/qcom/gcc-ipq4019.c

272

cdiv = (cdiv >> pll->cdiv.shift) & (BIT(pll->cdiv.width) - 1);

drivers/clk/qcom/gcc-ipq4019.c

380

.cdiv.shift = 8,

drivers/clk/qcom/gcc-ipq4019.c

399

.cdiv.shift = 12,

drivers/clk/qcom/gcc-ipq5018.c

1284

.shift = 8,

drivers/clk/qcom/gcc-ipq5018.c

632

.shift = 0,

drivers/clk/qcom/gcc-ipq5018.c

662

.shift = 0,

drivers/clk/qcom/gcc-ipq5018.c

702

.shift = 0,

drivers/clk/qcom/gcc-ipq5018.c

742

.shift = 0,

drivers/clk/qcom/gcc-ipq5018.c

924

.shift = 8,

drivers/clk/qcom/gcc-ipq5018.c

940

.shift = 8,

drivers/clk/qcom/gcc-ipq5332.c

1117

.shift = 0,

drivers/clk/qcom/gcc-ipq5332.c

1131

.shift = 0,

drivers/clk/qcom/gcc-ipq5332.c

2904

.shift = 0,

drivers/clk/qcom/gcc-ipq5424.c

1064

.shift = 0,

drivers/clk/qcom/gcc-ipq5424.c

1079

.shift = 0,

drivers/clk/qcom/gcc-ipq5424.c

1094

.shift = 0,

drivers/clk/qcom/gcc-ipq5424.c

1109

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

1012

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

1028

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

1044

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

1060

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

1076

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

1092

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

1557

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

1614

.shift = 8,

drivers/clk/qcom/gcc-ipq6018.c

1735

.shift = 8,

drivers/clk/qcom/gcc-ipq6018.c

698

.shift = 4,

drivers/clk/qcom/gcc-ipq6018.c

876

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

892

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

980

.shift = 0,

drivers/clk/qcom/gcc-ipq6018.c

996

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1011

.shift = 8,

drivers/clk/qcom/gcc-ipq8074.c

1248

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1278

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1440

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1492

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1521

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1550

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1579

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1608

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1637

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1666

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1736

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1806

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1871

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

1936

.shift = 0,

drivers/clk/qcom/gcc-ipq8074.c

688

.shift = 8,

drivers/clk/qcom/gcc-ipq8074.c

741

.shift = 8,

drivers/clk/qcom/gcc-ipq8074.c

943

.shift = 8,

drivers/clk/qcom/gcc-ipq9574.c

2046

.shift = 0,

drivers/clk/qcom/gcc-ipq9574.c

2078

.shift = 8,

drivers/clk/qcom/gcc-kaanapali.c

1248

.shift = 0,

drivers/clk/qcom/gcc-kaanapali.c

1263

.shift = 0,

drivers/clk/qcom/gcc-kaanapali.c

333

.shift = 0,

drivers/clk/qcom/gcc-milos.c

1106

.shift = 0,

drivers/clk/qcom/gcc-milos.c

1121

.shift = 0,

drivers/clk/qcom/gcc-milos.c

1136

.shift = 0,

drivers/clk/qcom/gcc-milos.c

1151

.shift = 0,

drivers/clk/qcom/gcc-milos.c

1166

.shift = 0,

drivers/clk/qcom/gcc-milos.c

378

.shift = 0,

drivers/clk/qcom/gcc-milos.c

393

.shift = 0,

drivers/clk/qcom/gcc-milos.c

408

.shift = 0,

drivers/clk/qcom/gcc-milos.c

423

.shift = 0,

drivers/clk/qcom/gcc-milos.c

438

.shift = 0,

drivers/clk/qcom/gcc-milos.c

453

.shift = 0,

drivers/clk/qcom/gcc-qcm2290.c

1846

.shift = 0,

drivers/clk/qcom/gcc-qcm2290.c

659

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

1269

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

1284

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

1299

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

1314

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

1329

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

370

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

399

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

428

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

443

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

458

.shift = 0,

drivers/clk/qcom/gcc-qcs8300.c

473

.shift = 0,

drivers/clk/qcom/gcc-qdu1000.c

1013

.shift = 0,

drivers/clk/qcom/gcc-qdu1000.c

421

.shift = 0,

drivers/clk/qcom/gcc-qdu1000.c

450

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

1595

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

1610

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

1625

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

1640

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

1655

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

1670

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

445

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

474

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

503

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

518

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

533

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

548

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

563

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

578

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

593

.shift = 0,

drivers/clk/qcom/gcc-sa8775p.c

608

.shift = 0,

drivers/clk/qcom/gcc-sar2130p.c

322

.shift = 0,

drivers/clk/qcom/gcc-sar2130p.c

815

.shift = 0,

drivers/clk/qcom/gcc-sc7280.c

1202

.shift = 0,

drivers/clk/qcom/gcc-sc7280.c

1217

.shift = 0,

drivers/clk/qcom/gcc-sc7280.c

2958

.shift = 0,

drivers/clk/qcom/gcc-sc7280.c

386

.shift = 0,

drivers/clk/qcom/gcc-sc7280.c

401

.shift = 0,

drivers/clk/qcom/gcc-sc7280.c

416

.shift = 0,

drivers/clk/qcom/gcc-sc7280.c

431

.shift = 0,

drivers/clk/qcom/gcc-sc7280.c

446

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

1003

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

1018

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

1033

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

1048

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

1063

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

1078

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2359

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2374

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2389

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2404

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2419

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2434

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2449

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2464

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2479

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2494

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

2509

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

449

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

464

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

553

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

638

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

763

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

778

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

793

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

808

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

823

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

838

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

853

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

868

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

883

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

898

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

913

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

928

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

943

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

958

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

973

.shift = 0,

drivers/clk/qcom/gcc-sc8280xp.c

988

.shift = 0,

drivers/clk/qcom/gcc-sdx65.c

140

.shift = 0,

drivers/clk/qcom/gcc-sdx65.c

157

.shift = 0,

drivers/clk/qcom/gcc-sdx65.c

172

.shift = 0,

drivers/clk/qcom/gcc-sdx65.c

633

.shift = 0,

drivers/clk/qcom/gcc-sdx65.c

648

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

1119

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

1134

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

1149

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

367

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

382

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

397

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

412

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

427

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

442

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

457

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

472

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

515

.shift = 0,

drivers/clk/qcom/gcc-sdx75.c

544

.shift = 0,

drivers/clk/qcom/gcc-sm4450.c

1002

.shift = 0,

drivers/clk/qcom/gcc-sm4450.c

373

.shift = 0,

drivers/clk/qcom/gcc-sm4450.c

388

.shift = 0,

drivers/clk/qcom/gcc-sm4450.c

403

.shift = 0,

drivers/clk/qcom/gcc-sm4450.c

418

.shift = 0,

drivers/clk/qcom/gcc-sm4450.c

987

.shift = 0,

drivers/clk/qcom/gcc-sm6115.c

1451

.shift = 0,

drivers/clk/qcom/gcc-sm6115.c

2161

.shift = 0,

drivers/clk/qcom/gcc-sm6350.c

255

.shift = 0,

drivers/clk/qcom/gcc-sm6350.c

269

.shift = 0,

drivers/clk/qcom/gcc-sm6375.c

1628

.shift = 0,

drivers/clk/qcom/gcc-sm6375.c

1643

.shift = 0,

drivers/clk/qcom/gcc-sm6375.c

2330

.shift = 0,

drivers/clk/qcom/gcc-sm8250.c

1015

.shift = 0,

drivers/clk/qcom/gcc-sm8250.c

1030

.shift = 0,

drivers/clk/qcom/gcc-sm8250.c

1045

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

1210

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

1225

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

288

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

303

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

318

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

333

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

348

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

363

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

378

.shift = 0,

drivers/clk/qcom/gcc-sm8350.c

393

.shift = 0,

drivers/clk/qcom/gcc-sm8450.c

1252

.shift = 0,

drivers/clk/qcom/gcc-sm8450.c

326

.shift = 0,

drivers/clk/qcom/gcc-sm8450.c

355

.shift = 0,

drivers/clk/qcom/gcc-sm8450.c

370

.shift = 0,

drivers/clk/qcom/gcc-sm8450.c

385

.shift = 0,

drivers/clk/qcom/gcc-sm8450.c

400

.shift = 0,

drivers/clk/qcom/gcc-sm8550.c

1198

.shift = 0,

drivers/clk/qcom/gcc-sm8550.c

299

.shift = 0,

drivers/clk/qcom/gcc-sm8550.c

328

.shift = 0,

drivers/clk/qcom/gcc-sm8550.c

343

.shift = 0,

drivers/clk/qcom/gcc-sm8550.c

358

.shift = 0,

drivers/clk/qcom/gcc-sm8550.c

373

.shift = 0,

drivers/clk/qcom/gcc-sm8650.c

1422

.shift = 0,

drivers/clk/qcom/gcc-sm8650.c

1437

.shift = 0,

drivers/clk/qcom/gcc-sm8650.c

1452

.shift = 0,

drivers/clk/qcom/gcc-sm8650.c

476

.shift = 0,

drivers/clk/qcom/gcc-sm8650.c

505

.shift = 0,

drivers/clk/qcom/gcc-sm8650.c

520

.shift = 0,

drivers/clk/qcom/gcc-sm8650.c

535

.shift = 0,

drivers/clk/qcom/gcc-sm8650.c

550

.shift = 0,

drivers/clk/qcom/gcc-sm8750.c

1195

.shift = 0,

drivers/clk/qcom/gcc-sm8750.c

1210

.shift = 0,

drivers/clk/qcom/gcc-sm8750.c

320

.shift = 0,

drivers/clk/qcom/gcc-sm8750.c

335

.shift = 0,

drivers/clk/qcom/gcc-sm8750.c

350

.shift = 0,

drivers/clk/qcom/gcc-sm8750.c

365

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2114

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2142

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2170

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2198

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2226

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2240

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2255

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2270

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2285

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2300

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2315

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2330

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2345

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2360

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2375

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

2390

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

5616

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

5643

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

5714

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

5741

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

5812

.shift = 0,

drivers/clk/qcom/gcc-x1e80100.c

5839

.shift = 0,

drivers/clk/qcom/gpucc-kaanapali.c

168

.shift = 0,

drivers/clk/qcom/gpucc-milos.c

199

.shift = 0,

drivers/clk/qcom/gpucc-sa8775p.c

228

.shift = 0,

drivers/clk/qcom/gpucc-sa8775p.c

243

.shift = 0,

drivers/clk/qcom/gpucc-sa8775p.c

258

.shift = 0,

drivers/clk/qcom/gpucc-sc7280.c

155

.shift = 0,

drivers/clk/qcom/gpucc-sc7280.c

170

.shift = 0,

drivers/clk/qcom/gpucc-sc8280xp.c

177

.shift = 0,

drivers/clk/qcom/gpucc-sc8280xp.c

192

.shift = 0,

drivers/clk/qcom/gpucc-sm4450.c

273

.shift = 0,

drivers/clk/qcom/gpucc-sm4450.c

288

.shift = 0,

drivers/clk/qcom/gpucc-sm4450.c

303

.shift = 0,

drivers/clk/qcom/gpucc-sm4450.c

318

.shift = 0,

drivers/clk/qcom/gpucc-sm8350.c

179

.shift = 0,

drivers/clk/qcom/gpucc-sm8350.c

194

.shift = 0,

drivers/clk/qcom/gpucc-sm8450.c

265

.shift = 0,

drivers/clk/qcom/gpucc-sm8450.c

280

.shift = 0,

drivers/clk/qcom/gpucc-sm8450.c

295

.shift = 0,

drivers/clk/qcom/gpucc-sm8450.c

310

.shift = 0,

drivers/clk/qcom/gpucc-sm8550.c

239

.shift = 0,

drivers/clk/qcom/gpucc-sm8550.c

254

.shift = 0,

drivers/clk/qcom/gpucc-sm8650.c

216

.shift = 0,

drivers/clk/qcom/gpucc-x1e80100.c

229

.shift = 0,

drivers/clk/qcom/gpucc-x1e80100.c

244

.shift = 0,

drivers/clk/qcom/krait-cc.c

100

div->shift = 6;

drivers/clk/qcom/krait-cc.c

168

mux->shift = 2;

drivers/clk/qcom/krait-cc.c

247

mux->shift = 0;

drivers/clk/qcom/lcc-ipq806x.c

164

.shift = 10,

drivers/clk/qcom/lcc-ipq806x.c

204

.shift = 14,

drivers/clk/qcom/lcc-ipq806x.c

286

.shift = 10,

drivers/clk/qcom/lcc-msm8960.c

149

.shift = 10, \

drivers/clk/qcom/lcc-msm8960.c

186

.shift = _shift, \

drivers/clk/qcom/lcc-msm8960.c

309

.shift = 10,

drivers/clk/qcom/lpassaudiocc-sc7280.c

280

.shift = 0,

drivers/clk/qcom/lpassaudiocc-sc7280.c

295

.shift = 0,

drivers/clk/qcom/lpassaudiocc-sc7280.c

310

.shift = 0,

drivers/clk/qcom/lpassaudiocc-sc7280.c

325

.shift = 0,

drivers/clk/qcom/lpassaudiocc-sc7280.c

407

.shift = 0,

drivers/clk/qcom/lpasscorecc-sc7280.c

89

.shift = 0,

drivers/clk/qcom/mmcc-sdm660.c

2106

.shift = 0,

drivers/clk/qcom/mmcc-sdm660.c

2157

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

408

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

423

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

438

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

453

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

468

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

483

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

498

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

513

.shift = 0,

drivers/clk/qcom/nsscc-ipq5424.c

528

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

1012

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

1027

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

1042

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

1057

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

1072

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

757

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

772

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

787

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

802

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

817

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

832

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

847

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

862

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

877

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

892

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

907

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

922

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

937

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

952

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

967

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

982

.shift = 0,

drivers/clk/qcom/nsscc-ipq9574.c

997

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

1096

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

1113

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

1252

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

1269

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

1381

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

143

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

1441

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

1481

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

1523

.shift = 1,

drivers/clk/qcom/nsscc-qca8k.c

221

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

322

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

339

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

459

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

476

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

578

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

595

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

697

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

714

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

816

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

833

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

935

.shift = 0,

drivers/clk/qcom/nsscc-qca8k.c

952

.shift = 0,

drivers/clk/qcom/videocc-milos.c

187

.shift = 0,

drivers/clk/qcom/videocc-milos.c

202

.shift = 0,

drivers/clk/qcom/videocc-sa8775p.c

239

.shift = 0,

drivers/clk/qcom/videocc-sa8775p.c

254

.shift = 0,

drivers/clk/qcom/videocc-sa8775p.c

269

.shift = 0,

drivers/clk/qcom/videocc-sa8775p.c

284

.shift = 0,

drivers/clk/qcom/videocc-sa8775p.c

299

.shift = 0,

drivers/clk/qcom/videocc-sm8250.c

158

.shift = 0,

drivers/clk/qcom/videocc-sm8250.c

173

.shift = 0,

drivers/clk/qcom/videocc-sm8250.c

188

.shift = 0,

drivers/clk/qcom/videocc-sm8350.c

260

.shift = 0,

drivers/clk/qcom/videocc-sm8350.c

275

.shift = 0,

drivers/clk/qcom/videocc-sm8350.c

290

.shift = 0,

drivers/clk/qcom/videocc-sm8350.c

305

.shift = 0,

drivers/clk/qcom/videocc-sm8450.c

195

.shift = 0,

drivers/clk/qcom/videocc-sm8450.c

210

.shift = 0,

drivers/clk/qcom/videocc-sm8450.c

225

.shift = 0,

drivers/clk/qcom/videocc-sm8450.c

240

.shift = 0,

drivers/clk/qcom/videocc-sm8550.c

236

.shift = 0,

drivers/clk/qcom/videocc-sm8550.c

251

.shift = 0,

drivers/clk/qcom/videocc-sm8550.c

266

.shift = 0,

drivers/clk/qcom/videocc-sm8550.c

281

.shift = 0,

drivers/clk/qcom/videocc-sm8750.c

179

.shift = 0,

drivers/clk/qcom/videocc-sm8750.c

194

.shift = 0,

drivers/clk/renesas/clk-r8a73a4.c

150

u32 shift = 8;

drivers/clk/renesas/clk-r8a73a4.c

155

shift = 0;

drivers/clk/renesas/clk-r8a73a4.c

158

mult = 0x20 - ((readl(base + CPG_FRQCRC) >> shift) & 0x1f);

drivers/clk/renesas/clk-r8a73a4.c

172

shift = c->shift;

drivers/clk/renesas/clk-r8a73a4.c

180

base + reg, shift, 4, 0,

drivers/clk/renesas/clk-r8a73a4.c

36

unsigned int shift;

drivers/clk/renesas/clk-r8a73a4.c

63

unsigned int shift, reg;

drivers/clk/renesas/clk-r8a7740.c

123

shift = c->shift;

drivers/clk/renesas/clk-r8a7740.c

136

base + reg, shift, 4, 0,

drivers/clk/renesas/clk-r8a7740.c

32

unsigned int shift;

drivers/clk/renesas/clk-r8a7740.c

64

unsigned int shift, reg;

drivers/clk/renesas/clk-sh73a0.c

130

shift = 24;

drivers/clk/renesas/clk-sh73a0.c

140

shift = c->shift;

drivers/clk/renesas/clk-sh73a0.c

154

base + reg, shift, width, 0,

drivers/clk/renesas/clk-sh73a0.c

41

unsigned int shift;

drivers/clk/renesas/clk-sh73a0.c

76

unsigned int shift, reg, width;

drivers/clk/renesas/r8a77970-cpg-mssr.c

228

unsigned int shift;

drivers/clk/renesas/r8a77970-cpg-mssr.c

233

shift = 8;

drivers/clk/renesas/r8a77970-cpg-mssr.c

237

shift = 4;

drivers/clk/renesas/r8a77970-cpg-mssr.c

250

shift, 4, 0, table, &cpg_lock);

drivers/clk/renesas/r9a09g077-cpg.c

37

#define CONF_PACK(offset, shift, width) \

drivers/clk/renesas/r9a09g077-cpg.c

39

FIELD_PREP_CONST(SHIFT_MASK, (shift)) | \

drivers/clk/renesas/r9a09g077-cpg.c

468

div->shift = GET_SHIFT(core->conf);

drivers/clk/renesas/rcar-gen2-cpg.c

286

unsigned int shift;

drivers/clk/renesas/rcar-gen2-cpg.c

337

shift = 8;

drivers/clk/renesas/rcar-gen2-cpg.c

345

shift = 4;

drivers/clk/renesas/rcar-gen2-cpg.c

353

shift = 0;

drivers/clk/renesas/rcar-gen2-cpg.c

374

base + CPG_SDCKCR, shift, 4,

drivers/clk/renesas/rzg2l-cpg.c

219

u32 shift = GET_SHIFT(clk_hw_data->conf);

drivers/clk/renesas/rzg2l-cpg.c

241

writel((CPG_WEN_BIT | clk_src_266) << shift, priv->base + off);

drivers/clk/renesas/rzg2l-cpg.c

263

u32 shift = GET_SHIFT(clk_hw_data->conf);

drivers/clk/renesas/rzg2l-cpg.c

275

val >>= shift;

drivers/clk/renesas/rzg2l-cpg.c

288

writel((CPG_WEN_BIT | 1) << shift, priv->base + off);

drivers/clk/renesas/rzg2l-cpg.c

353

u32 shift = GET_SHIFT(clk_hw_data->conf);

drivers/clk/renesas/rzg2l-cpg.c

362

writel((CPG_WEN_BIT | val) << shift, priv->base + off);

drivers/clk/renesas/rzg2l-cpg.c

499

u32 shift = GET_SHIFT(clk_hw_data->conf);

drivers/clk/renesas/rzg2l-cpg.c

508

writel((CPG_WEN_BIT | val) << shift, priv->base + off);

drivers/clk/renesas/rzv2h-cpg.c

1159

val = readl(mux->reg) >> mux->shift;

drivers/clk/renesas/rzv2h-cpg.c

430

div >>= ddiv.shift;

drivers/clk/renesas/rzv2h-cpg.c

490

u32 val, shift;

drivers/clk/renesas/rzv2h-cpg.c

505

shift = ddiv.shift;

drivers/clk/renesas/rzv2h-cpg.c

506

val = readl(priv->base + ddiv.offset) | DDIV_DIVCTL_WEN(shift);

drivers/clk/renesas/rzv2h-cpg.c

507

val &= ~(clk_div_mask(ddiv.width) << shift);

drivers/clk/renesas/rzv2h-cpg.c

508

val |= clkt->val << shift;

drivers/clk/renesas/rzv2h-cpg.c

69

#define DDIV_DIVCTL_WEN(shift) BIT((shift) + 16)

drivers/clk/renesas/rzv2h-cpg.c

782

val = readl(divider->reg) >> divider->shift;

drivers/clk/renesas/rzv2h-cpg.c

831

val = readl(divider->reg) | DDIV_DIVCTL_WEN(divider->shift);

drivers/clk/renesas/rzv2h-cpg.c

832

val &= ~(clk_div_mask(divider->width) << divider->shift);

drivers/clk/renesas/rzv2h-cpg.c

833

val |= (u32)value << divider->shift;

drivers/clk/renesas/rzv2h-cpg.c

856

u8 shift = cfg_ddiv.shift;

drivers/clk/renesas/rzv2h-cpg.c

870

if ((shift + width) > 16)

drivers/clk/renesas/rzv2h-cpg.c

890

div->shift = shift;

drivers/clk/renesas/rzv2h-cpg.c

914

mux.shift, mux.width,

drivers/clk/renesas/rzv2h-cpg.h

101

.shift = (_shift), \

drivers/clk/renesas/rzv2h-cpg.h

54

unsigned int shift:4;

drivers/clk/renesas/rzv2h-cpg.h

71

.shift = _shift, \

drivers/clk/renesas/rzv2h-cpg.h

79

.shift = (_shift), \

drivers/clk/renesas/rzv2h-cpg.h

94

unsigned int shift:4;

drivers/clk/rockchip/clk-cpu.c

487

mux->shift = mux_shift;

drivers/clk/rockchip/clk-cpu.c

507

div->shift = div_shift;

drivers/clk/rockchip/clk-gate-grf.c

21

unsigned int shift;

drivers/clk/rockchip/clk-gate-grf.c

30

u32 val = !(gate->flags & CLK_GATE_SET_TO_DISABLE) ? BIT(gate->shift) : 0;

drivers/clk/rockchip/clk-gate-grf.c

31

u32 hiword = ((gate->flags & CLK_GATE_HIWORD_MASK) ? 1 : 0) << (gate->shift + 16);

drivers/clk/rockchip/clk-gate-grf.c

35

hiword | BIT(gate->shift), hiword | val);

drivers/clk/rockchip/clk-gate-grf.c

43

u32 val = !(gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : BIT(gate->shift);

drivers/clk/rockchip/clk-gate-grf.c

44

u32 hiword = ((gate->flags & CLK_GATE_HIWORD_MASK) ? 1 : 0) << (gate->shift + 16);

drivers/clk/rockchip/clk-gate-grf.c

47

hiword | BIT(gate->shift), hiword | val);

drivers/clk/rockchip/clk-gate-grf.c

56

ret = regmap_test_bits(gate->regmap, gate->reg, BIT(gate->shift));

drivers/clk/rockchip/clk-gate-grf.c

72

struct regmap *regmap, unsigned int reg, unsigned int shift,

drivers/clk/rockchip/clk-gate-grf.c

97

gate->shift = shift;

drivers/clk/rockchip/clk-half-divider.c

128

val = div_mask(divider->width) << (divider->shift + 16);

drivers/clk/rockchip/clk-half-divider.c

131

val &= ~(div_mask(divider->width) << divider->shift);

drivers/clk/rockchip/clk-half-divider.c

133

val |= value << divider->shift;

drivers/clk/rockchip/clk-half-divider.c

184

mux->shift = mux_shift;

drivers/clk/rockchip/clk-half-divider.c

211

div->shift = div_shift;

drivers/clk/rockchip/clk-half-divider.c

28

val = readl(divider->reg) >> divider->shift;

drivers/clk/rockchip/clk-inverter.c

16

int shift;

drivers/clk/rockchip/clk-inverter.c

30

val = readl(inv_clock->reg) >> inv_clock->shift;

drivers/clk/rockchip/clk-inverter.c

49

writel(HIWORD_UPDATE(val, INVERTER_MASK, inv_clock->shift),

drivers/clk/rockchip/clk-inverter.c

58

reg &= ~BIT(inv_clock->shift);

drivers/clk/rockchip/clk-inverter.c

75

void __iomem *reg, int shift, int flags,

drivers/clk/rockchip/clk-inverter.c

94

inv_clock->shift = shift;

drivers/clk/rockchip/clk-mmc-phase.c

145

raw_value = HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift);

drivers/clk/rockchip/clk-mmc-phase.c

154

mmc_clock->reg, raw_value>>(mmc_clock->shift),

drivers/clk/rockchip/clk-mmc-phase.c

20

int shift;

drivers/clk/rockchip/clk-mmc-phase.c

206

int shift)

drivers/clk/rockchip/clk-mmc-phase.c

227

mmc_clock->shift = shift;

drivers/clk/rockchip/clk-mmc-phase.c

65

raw_value >>= mmc_clock->shift;

drivers/clk/rockchip/clk-muxgrf.c

14

u32 shift;

drivers/clk/rockchip/clk-muxgrf.c

29

val >>= mux->shift;

drivers/clk/rockchip/clk-muxgrf.c

38

unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift);

drivers/clk/rockchip/clk-muxgrf.c

42

val <<= mux->shift;

drivers/clk/rockchip/clk-muxgrf.c

59

int shift, int width, int mux_flags)

drivers/clk/rockchip/clk-muxgrf.c

83

muxgrf_clock->shift = shift;

drivers/clk/rockchip/clk-pll.c

1087

pll_mux->shift = mode_shift;

drivers/clk/rockchip/clk.c

270

frac_mux->shift = child->mux_shift;

drivers/clk/rockchip/clk.c

63

mux->shift = mux_shift;

drivers/clk/rockchip/clk.c

98

div->shift = div_shift;

drivers/clk/rockchip/clk.h

1120

#define MMC(_id, cname, pname, offset, shift) \

drivers/clk/rockchip/clk.h

1128

.div_shift = shift, \

drivers/clk/rockchip/clk.h

1131

#define MMC_GRF(_id, cname, pname, offset, shift, grftype) \

drivers/clk/rockchip/clk.h

1139

.div_shift = shift, \

drivers/clk/rockchip/clk.h

26

#define HIWORD_UPDATE(val, mask, shift) \

drivers/clk/rockchip/clk.h

27

((val) << (shift) | (mask) << ((shift) + 16))

drivers/clk/rockchip/clk.h

719

int shift);

drivers/clk/rockchip/clk.h

739

void __iomem *reg, int shift, int flags,

drivers/clk/rockchip/clk.h

745

int shift, int width, int mux_flags);

drivers/clk/rockchip/clk.h

750

unsigned int shift, u8 gate_flags);

drivers/clk/samsung/clk-exynos-clkout.c

175

clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT;

drivers/clk/samsung/clk-pll.c

763

u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift;

drivers/clk/samsung/clk-pll.c

775

shift = ((pll->type == pll_4600) || (pll->type == pll_1460x)) ? 16 : 10;

drivers/clk/samsung/clk-pll.c

777

fvco *= (mdiv << shift) + kdiv;

drivers/clk/samsung/clk-pll.c

779

fvco >>= shift;

drivers/clk/samsung/clk.c

201

list->shift, list->width, list->mux_flags, &ctx->lock);

drivers/clk/samsung/clk.c

225

list->shift, list->width, list->div_flags,

drivers/clk/samsung/clk.c

230

ctx->reg_base + list->offset, list->shift,

drivers/clk/samsung/clk.h

139

u8 shift;

drivers/clk/samsung/clk.h

152

.shift = s, \

drivers/clk/samsung/clk.h

188

u8 shift;

drivers/clk/samsung/clk.h

201

.shift = s, \

drivers/clk/socfpga/clk-gate-a10.c

30

val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;

drivers/clk/socfpga/clk-gate-a10.c

80

socfpga_clk->shift = div_reg[1];

drivers/clk/socfpga/clk-gate-s10.c

153

socfpga_clk->shift = clks->div_offset;

drivers/clk/socfpga/clk-gate-s10.c

211

socfpga_clk->shift = clks->div_offset;

drivers/clk/socfpga/clk-gate-s10.c

268

socfpga_clk->shift = clks->div_offset;

drivers/clk/socfpga/clk-gate-s10.c

30

val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;

drivers/clk/socfpga/clk-gate-s10.c

43

val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;

drivers/clk/socfpga/clk-gate.c

179

socfpga_clk->shift = div_reg[1];

drivers/clk/socfpga/clk-gate.c

97

val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;

drivers/clk/socfpga/clk-periph-a10.c

29

div = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;

drivers/clk/socfpga/clk-periph-a10.c

84

periph_clk->shift = div_reg[1];

drivers/clk/socfpga/clk-periph-s10.c

152

periph_clk->shift = clks->shift;

drivers/clk/socfpga/clk-periph-s10.c

23

unsigned long shift = socfpgaclk->shift;

drivers/clk/socfpga/clk-periph-s10.c

27

val &= (0x1f << shift);

drivers/clk/socfpga/clk-periph-s10.c

28

div = (val >> shift) + 1;

drivers/clk/socfpga/clk-periph.c

27

val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;

drivers/clk/socfpga/clk-periph.c

74

periph_clk->shift = div_reg[1];

drivers/clk/socfpga/clk.h

51

u32 shift; /* only valid if div_reg != 0 */

drivers/clk/socfpga/clk.h

62

u32 shift; /* only valid if div_reg != 0 */

drivers/clk/socfpga/stratix10-clk.h

43

unsigned long shift;

drivers/clk/sophgo/clk-cv18xx-common.c

16

u32 mask = BIT(field->shift);

drivers/clk/sophgo/clk-cv18xx-common.c

33

u32 mask = BIT(field->shift);

drivers/clk/sophgo/clk-cv18xx-common.c

50

return readl(common->base + field->reg) & BIT(field->shift);

drivers/clk/sophgo/clk-cv18xx-common.h

34

s8 shift;

drivers/clk/sophgo/clk-cv18xx-common.h

39

u8 shift;

drivers/clk/sophgo/clk-cv18xx-common.h

48

.shift = _shift, \

drivers/clk/sophgo/clk-cv18xx-common.h

54

.shift = _shift, \

drivers/clk/sophgo/clk-cv18xx-common.h

61

GENMASK((_reg)->shift + (_reg)->width - 1, (_reg)->shift)

drivers/clk/sophgo/clk-cv18xx-common.h

63

(((_val) >> (_reg)->shift) & GENMASK((_reg)->width - 1, 0))

drivers/clk/sophgo/clk-cv18xx-common.h

66

(((_new) & GENMASK((_reg)->width - 1, 0)) << (_reg)->shift))

drivers/clk/sophgo/clk-cv18xx-pll.c

152

BIT(pll->pll_status.shift));

drivers/clk/sophgo/clk-cv18xx-pll.c

381

BIT(pll->pll_status.shift));

drivers/clk/sophgo/clk-sg2042-clkgen.c

1002

mux->shift,

drivers/clk/sophgo/clk-sg2042-clkgen.c

106

u8 shift;

drivers/clk/sophgo/clk-sg2042-clkgen.c

148

u8 shift;

drivers/clk/sophgo/clk-sg2042-clkgen.c

167

val = readl(divider->reg) >> divider->shift;

drivers/clk/sophgo/clk-sg2042-clkgen.c

190

bestdiv = readl(divider->reg) >> divider->shift;

drivers/clk/sophgo/clk-sg2042-clkgen.c

231

val = clk_div_mask(divider->width) << (divider->shift + 16);

drivers/clk/sophgo/clk-sg2042-clkgen.c

234

val &= ~(clk_div_mask(divider->width) << divider->shift);

drivers/clk/sophgo/clk-sg2042-clkgen.c

236

val |= value << divider->shift;

drivers/clk/sophgo/clk-sg2042-clkgen.c

283

.shift = _shift, \

drivers/clk/sophgo/clk-sg2042-clkgen.c

299

.shift = _shift, \

drivers/clk/sophgo/clk-sg2042-clkgen.c

315

.shift = _shift, \

drivers/clk/sophgo/clk-sg2042-clkgen.c

331

.shift = _shift, \

drivers/clk/sophgo/clk-sg2042-clkgen.c

347

.shift = _shift, \

drivers/clk/sophgo/clk-sg2042-clkgen.c

363

.shift = _shift, \

drivers/clk/sophgo/clk-sg2042-clkgen.c

413

.shift = _shift, \

drivers/clk/sophgo/clk-sg2042-clkgen.c

820

if (div->width + div->shift > 16) {

drivers/clk/sophgo/clk-sg2044.c

103

return (reg >> div->shift) & clk_div_mask(div->width);

drivers/clk/sophgo/clk-sg2044.c

168

reg &= ~(clk_div_mask(div->width) << div->shift);

drivers/clk/sophgo/clk-sg2044.c

169

reg |= (value << div->shift) | DIV_FACTOR_REG_SOURCE;

drivers/clk/sophgo/clk-sg2044.c

1711

mux->mux.shift,

drivers/clk/sophgo/clk-sg2044.c

1746

gate->gate.shift,

drivers/clk/sophgo/clk-sg2044.c

312

.shift = (_div_shift), \

drivers/clk/sophgo/clk-sg2044.c

328

.shift = (_div_shift), \

drivers/clk/sophgo/clk-sg2044.c

33

u8 shift;

drivers/clk/sophgo/clk-sg2044.c

344

.shift = (_div_shift), \

drivers/clk/sophgo/clk-sg2044.c

360

.shift = (_div_shift), \

drivers/clk/sophgo/clk-sg2044.c

375

.shift = (_mux_shift), \

drivers/clk/sophgo/clk-sg2044.c

387

.shift = (_gate_shift), \

drivers/clk/sophgo/clk-sg2044.c

41

u16 shift;

drivers/clk/sophgo/clk-sg2044.c

47

u16 shift;

drivers/clk/spacemit/ccu_mix.c

162

current_div = ccu_read(common, ctrl) >> div->shift;

drivers/clk/spacemit/ccu_mix.c

168

mask = GENMASK(div->width + div->shift - 1, div->shift);

drivers/clk/spacemit/ccu_mix.c

170

ccu_update(common, ctrl, mask, target_div << div->shift);

drivers/clk/spacemit/ccu_mix.c

181

parent = ccu_read(&mix->common, ctrl) >> mux->shift;

drivers/clk/spacemit/ccu_mix.c

193

mask = GENMASK(mux->width + mux->shift - 1, mux->shift);

drivers/clk/spacemit/ccu_mix.c

195

ccu_update(&mix->common, ctrl, mask, index << mux->shift);

drivers/clk/spacemit/ccu_mix.c

60

val = ccu_read(&mix->common, ctrl) >> div->shift;

drivers/clk/spacemit/ccu_mix.h

32

u8 shift;

drivers/clk/spacemit/ccu_mix.h

37

u8 shift;

drivers/clk/spacemit/ccu_mix.h

51

#define CCU_MUX_INIT(_shift, _width) { .shift = _shift, .width = _width }

drivers/clk/spacemit/ccu_mix.h

52

#define CCU_DIV_INIT(_shift, _width) { .shift = _shift, .width = _width }

drivers/clk/sprd/div.c

28

val = reg >> div->shift;

drivers/clk/sprd/div.c

56

reg &= ~GENMASK(div->width + div->shift - 1, div->shift);

drivers/clk/sprd/div.c

59

reg | (val << div->shift));

drivers/clk/sprd/div.h

24

u8 shift;

drivers/clk/sprd/div.h

31

.shift = _shift, \

drivers/clk/sprd/mux.c

23

parent = reg >> mux->shift;

drivers/clk/sprd/mux.c

56

reg &= ~GENMASK(mux->width + mux->shift - 1, mux->shift);

drivers/clk/sprd/mux.c

58

reg | (index << mux->shift));

drivers/clk/sprd/mux.h

22

u8 shift;

drivers/clk/sprd/mux.h

34

.shift = _shift, \

drivers/clk/sprd/pll.c

153

u32 mask, shift, width, ibias_val, index;

drivers/clk/sprd/pll.c

19

(pll->factors[member].shift / (8 * sizeof(pll->regs_num)))

drivers/clk/sprd/pll.c

194

shift = pshift(pll, PLL_NINT);

drivers/clk/sprd/pll.c

195

cfg[index].val |= (nint << shift) & mask;

drivers/clk/sprd/pll.c

201

shift = pshift(pll, PLL_KINT);

drivers/clk/sprd/pll.c

203

tmp = do_div(tmp, 10000) * ((mask >> shift) + 1);

drivers/clk/sprd/pll.c

205

cfg[index].val |= (kint << shift) & mask;

drivers/clk/sprd/pll.c

212

shift = pshift(pll, PLL_IBIAS);

drivers/clk/sprd/pll.c

213

cfg[index].val |= ibias_val << shift & mask;

drivers/clk/sprd/pll.c

22

(pll->factors[member].shift % (8 * sizeof(pll->regs_num)))

drivers/clk/sprd/pll.c

71

u32 shift, mask, index, refin_id = 3;

drivers/clk/sprd/pll.c

76

shift = pshift(pll, PLL_REFIN);

drivers/clk/sprd/pll.c

78

refin_id = (sprd_pll_read(pll, index) & mask) >> shift;

drivers/clk/sprd/pll.h

19

u8 shift;

drivers/clk/sprd/sc9860-clk.c

127

{ .shift = 20, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9860-clk.c

128

{ .shift = 19, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9860-clk.c

129

{ .shift = 18, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9860-clk.c

130

{ .shift = 17, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9860-clk.c

131

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9860-clk.c

132

{ .shift = 11, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9860-clk.c

133

{ .shift = 0, .width = 7 }, /* n */

drivers/clk/sprd/sc9860-clk.c

134

{ .shift = 57, .width = 7 }, /* nint */

drivers/clk/sprd/sc9860-clk.c

135

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9860-clk.c

136

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9860-clk.c

137

{ .shift = 56, .width = 1 }, /* postdiv */

drivers/clk/sprd/sc9860-clk.c

144

{ .shift = 20, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9860-clk.c

145

{ .shift = 19, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9860-clk.c

146

{ .shift = 18, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9860-clk.c

147

{ .shift = 17, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9860-clk.c

148

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9860-clk.c

149

{ .shift = 11, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9860-clk.c

150

{ .shift = 0, .width = 7 }, /* n */

drivers/clk/sprd/sc9860-clk.c

151

{ .shift = 57, .width = 7 }, /* nint */

drivers/clk/sprd/sc9860-clk.c

152

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9860-clk.c

153

{ .shift = 56, .width = 1 }, /* prediv */

drivers/clk/sprd/sc9860-clk.c

154

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/sc9860-clk.c

160

{ .shift = 16, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9860-clk.c

161

{ .shift = 15, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9860-clk.c

162

{ .shift = 14, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9860-clk.c

163

{ .shift = 13, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9860-clk.c

164

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9860-clk.c

165

{ .shift = 8, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9860-clk.c

166

{ .shift = 0, .width = 7 }, /* n */

drivers/clk/sprd/sc9860-clk.c

167

{ .shift = 57, .width = 7 }, /* nint */

drivers/clk/sprd/sc9860-clk.c

168

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9860-clk.c

169

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9860-clk.c

170

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/sc9860-clk.c

179

{ .shift = 0, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9860-clk.c

180

{ .shift = 3, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9860-clk.c

181

{ .shift = 80, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9860-clk.c

182

{ .shift = 81, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9860-clk.c

183

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9860-clk.c

184

{ .shift = 14, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9860-clk.c

185

{ .shift = 16, .width = 7 }, /* n */

drivers/clk/sprd/sc9860-clk.c

186

{ .shift = 4, .width = 7 }, /* nint */

drivers/clk/sprd/sc9860-clk.c

187

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9860-clk.c

188

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9860-clk.c

189

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/sc9860-clk.c

198

{ .shift = 21, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9860-clk.c

199

{ .shift = 20, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9860-clk.c

200

{ .shift = 19, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9860-clk.c

201

{ .shift = 18, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9860-clk.c

202

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9860-clk.c

203

{ .shift = 13, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9860-clk.c

204

{ .shift = 0, .width = 7 }, /* n */

drivers/clk/sprd/sc9860-clk.c

205

{ .shift = 57, .width = 7 }, /* nint */

drivers/clk/sprd/sc9860-clk.c

206

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9860-clk.c

207

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9860-clk.c

208

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/sc9860-clk.c

214

{ .shift = 31, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9860-clk.c

215

{ .shift = 27, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9860-clk.c

216

{ .shift = 26, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9860-clk.c

217

{ .shift = 25, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9860-clk.c

218

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9860-clk.c

219

{ .shift = 20, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9860-clk.c

220

{ .shift = 0, .width = 7 }, /* n */

drivers/clk/sprd/sc9860-clk.c

221

{ .shift = 57, .width = 7 }, /* nint */

drivers/clk/sprd/sc9860-clk.c

222

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9860-clk.c

223

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9860-clk.c

224

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/sc9860-clk.c

234

{ .shift = 18, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9860-clk.c

235

{ .shift = 15, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9860-clk.c

236

{ .shift = 14, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9860-clk.c

237

{ .shift = 13, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9860-clk.c

238

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9860-clk.c

239

{ .shift = 8, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9860-clk.c

240

{ .shift = 0, .width = 7 }, /* n */

drivers/clk/sprd/sc9860-clk.c

241

{ .shift = 57, .width = 7 }, /* nint */

drivers/clk/sprd/sc9860-clk.c

242

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9860-clk.c

243

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9860-clk.c

244

{ .shift = 17, .width = 1 }, /* postdiv */

drivers/clk/sprd/sc9860-clk.c

251

{ .shift = 17, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9860-clk.c

252

{ .shift = 15, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9860-clk.c

253

{ .shift = 14, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9860-clk.c

254

{ .shift = 13, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9860-clk.c

255

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9860-clk.c

256

{ .shift = 8, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9860-clk.c

257

{ .shift = 0, .width = 7 }, /* n */

drivers/clk/sprd/sc9860-clk.c

258

{ .shift = 57, .width = 7 }, /* nint */

drivers/clk/sprd/sc9860-clk.c

259

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9860-clk.c

260

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9860-clk.c

261

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/sc9863a-clk.c

114

{ .shift = 95, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9863a-clk.c

115

{ .shift = 0, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9863a-clk.c

116

{ .shift = 1, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9863a-clk.c

117

{ .shift = 2, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9863a-clk.c

118

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9863a-clk.c

119

{ .shift = 6, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9863a-clk.c

120

{ .shift = 8, .width = 11 }, /* n */

drivers/clk/sprd/sc9863a-clk.c

121

{ .shift = 55, .width = 7 }, /* nint */

drivers/clk/sprd/sc9863a-clk.c

122

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9863a-clk.c

123

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9863a-clk.c

124

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/sc9863a-clk.c

132

{ .shift = 95, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9863a-clk.c

133

{ .shift = 0, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9863a-clk.c

134

{ .shift = 1, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9863a-clk.c

135

{ .shift = 2, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9863a-clk.c

136

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9863a-clk.c

137

{ .shift = 6, .width = 2 }, /* ibias */

drivers/clk/sprd/sc9863a-clk.c

138

{ .shift = 8, .width = 11 }, /* n */

drivers/clk/sprd/sc9863a-clk.c

139

{ .shift = 55, .width = 7 }, /* nint */

drivers/clk/sprd/sc9863a-clk.c

140

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9863a-clk.c

141

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9863a-clk.c

142

{ .shift = 80, .width = 1 }, /* postdiv */

drivers/clk/sprd/sc9863a-clk.c

79

{ .shift = 95, .width = 1 }, /* lock_done */

drivers/clk/sprd/sc9863a-clk.c

80

{ .shift = 0, .width = 1 }, /* div_s */

drivers/clk/sprd/sc9863a-clk.c

81

{ .shift = 1, .width = 1 }, /* mod_en */

drivers/clk/sprd/sc9863a-clk.c

82

{ .shift = 2, .width = 1 }, /* sdm_en */

drivers/clk/sprd/sc9863a-clk.c

83

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/sc9863a-clk.c

84

{ .shift = 3, .width = 3 }, /* ibias */

drivers/clk/sprd/sc9863a-clk.c

85

{ .shift = 8, .width = 11 }, /* n */

drivers/clk/sprd/sc9863a-clk.c

86

{ .shift = 55, .width = 7 }, /* nint */

drivers/clk/sprd/sc9863a-clk.c

87

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/sc9863a-clk.c

88

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/sc9863a-clk.c

89

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/ums512-clk.c

120

{ .shift = 18, .width = 1 }, /* lock_done */

drivers/clk/sprd/ums512-clk.c

121

{ .shift = 0, .width = 1 }, /* div_s */

drivers/clk/sprd/ums512-clk.c

122

{ .shift = 67, .width = 1 }, /* mod_en */

drivers/clk/sprd/ums512-clk.c

123

{ .shift = 1, .width = 1 }, /* sdm_en */

drivers/clk/sprd/ums512-clk.c

124

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/ums512-clk.c

125

{ .shift = 4, .width = 3 }, /* icp */

drivers/clk/sprd/ums512-clk.c

126

{ .shift = 7, .width = 11 }, /* n */

drivers/clk/sprd/ums512-clk.c

127

{ .shift = 55, .width = 7 }, /* nint */

drivers/clk/sprd/ums512-clk.c

128

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/ums512-clk.c

129

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/ums512-clk.c

130

{ .shift = 0, .width = 0 }, /* postdiv */

drivers/clk/sprd/ums512-clk.c

163

{ .shift = 17, .width = 1 }, /* lock_done */

drivers/clk/sprd/ums512-clk.c

164

{ .shift = 0, .width = 1 }, /* div_s */

drivers/clk/sprd/ums512-clk.c

165

{ .shift = 67, .width = 1 }, /* mod_en */

drivers/clk/sprd/ums512-clk.c

166

{ .shift = 1, .width = 1 }, /* sdm_en */

drivers/clk/sprd/ums512-clk.c

167

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/ums512-clk.c

168

{ .shift = 2, .width = 3 }, /* icp */

drivers/clk/sprd/ums512-clk.c

169

{ .shift = 5, .width = 11 }, /* n */

drivers/clk/sprd/ums512-clk.c

170

{ .shift = 55, .width = 7 }, /* nint */

drivers/clk/sprd/ums512-clk.c

171

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/ums512-clk.c

172

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/ums512-clk.c

173

{ .shift = 77, .width = 1 }, /* postdiv */

drivers/clk/sprd/ums512-clk.c

206

{ .shift = 18, .width = 1 }, /* lock_done */

drivers/clk/sprd/ums512-clk.c

207

{ .shift = 0, .width = 1 }, /* div_s */

drivers/clk/sprd/ums512-clk.c

208

{ .shift = 67, .width = 1 }, /* mod_en */

drivers/clk/sprd/ums512-clk.c

209

{ .shift = 1, .width = 1 }, /* sdm_en */

drivers/clk/sprd/ums512-clk.c

210

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/ums512-clk.c

211

{ .shift = 2, .width = 3 }, /* icp */

drivers/clk/sprd/ums512-clk.c

212

{ .shift = 5, .width = 11 }, /* n */

drivers/clk/sprd/ums512-clk.c

213

{ .shift = 55, .width = 7 }, /* nint */

drivers/clk/sprd/ums512-clk.c

214

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/ums512-clk.c

215

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/ums512-clk.c

216

{ .shift = 77, .width = 1 }, /* postdiv */

drivers/clk/sprd/ums512-clk.c

226

{ .shift = 16, .width = 1 }, /* lock_done */

drivers/clk/sprd/ums512-clk.c

227

{ .shift = 0, .width = 1 }, /* div_s */

drivers/clk/sprd/ums512-clk.c

228

{ .shift = 67, .width = 1 }, /* mod_en */

drivers/clk/sprd/ums512-clk.c

229

{ .shift = 1, .width = 1 }, /* sdm_en */

drivers/clk/sprd/ums512-clk.c

230

{ .shift = 0, .width = 0 }, /* refin */

drivers/clk/sprd/ums512-clk.c

231

{ .shift = 2, .width = 3 }, /* icp */

drivers/clk/sprd/ums512-clk.c

232

{ .shift = 5, .width = 11 }, /* n */

drivers/clk/sprd/ums512-clk.c

233

{ .shift = 55, .width = 7 }, /* nint */

drivers/clk/sprd/ums512-clk.c

234

{ .shift = 32, .width = 23}, /* kint */

drivers/clk/sprd/ums512-clk.c

235

{ .shift = 0, .width = 0 }, /* prediv */

drivers/clk/sprd/ums512-clk.c

236

{ .shift = 77, .width = 1 }, /* postdiv */

drivers/clk/st/clk-flexgen.c

234

fgxbar->mux.shift = xbar_shift;

drivers/clk/st/clkgen-mux.c

38

u8 shift;

drivers/clk/st/clkgen-mux.c

47

.shift = 0,

drivers/clk/st/clkgen-mux.c

86

data->shift, data->width, data->mux_flags,

drivers/clk/st/clkgen-pll.c

257

!!((reg >> field->shift) & field->mask), 0, 10000);

drivers/clk/st/clkgen-pll.c

725

gate->bit_idx = pll_data->odf_gate[odf].shift;

drivers/clk/st/clkgen-pll.c

736

div->shift = pll_data->odf[odf].shift;

drivers/clk/st/clkgen.h

18

unsigned int shift;

drivers/clk/st/clkgen.h

24

return (readl(base + field->offset) >> field->shift) & field->mask;

drivers/clk/st/clkgen.h

32

~(field->mask << field->shift)) | (val << field->shift),

drivers/clk/st/clkgen.h

41

.shift = _shift, \

drivers/clk/stm32/clk-stm32-core.c

109

val = readl(base + mux->offset) >> mux->shift;

drivers/clk/stm32/clk-stm32-core.c

123

u32 val = index << mux->shift;

drivers/clk/stm32/clk-stm32-core.c

125

reg &= ~(mask << mux->shift);

drivers/clk/stm32/clk-stm32-core.c

216

val = readl(base + divider->offset) >> divider->shift;

drivers/clk/stm32/clk-stm32-core.c

245

val = clk_div_mask(divider->width) << (divider->shift + 16);

drivers/clk/stm32/clk-stm32-core.c

248

val &= ~(clk_div_mask(divider->width) << divider->shift);

drivers/clk/stm32/clk-stm32-core.c

251

val |= (u32)value << divider->shift;

drivers/clk/stm32/clk-stm32-core.c

369

val = readl(div->base + divider->offset) >> divider->shift;

drivers/clk/stm32/clk-stm32-core.c

446

val = readl(composite->base + divider->offset) >> divider->shift;

drivers/clk/stm32/clk-stm32-core.h

13

u8 shift;

drivers/clk/stm32/clk-stm32-core.h

28

u8 shift;

drivers/clk/stm32/clk-stm32mp1.c

1209

.shift = _shift,\

drivers/clk/stm32/clk-stm32mp1.c

1230

.shift = _shift,\

drivers/clk/stm32/clk-stm32mp1.c

1331

.shift = _div_shift,\

drivers/clk/stm32/clk-stm32mp1.c

1351

.shift = _shift,\

drivers/clk/stm32/clk-stm32mp1.c

1705

.shift = _shift,\

drivers/clk/stm32/clk-stm32mp1.c

353

u8 shift;

drivers/clk/stm32/clk-stm32mp1.c

361

u8 shift;

drivers/clk/stm32/clk-stm32mp1.c

435

div_cfg->shift,

drivers/clk/stm32/clk-stm32mp1.c

452

mux_cfg->reg_off + base, mux_cfg->shift,

drivers/clk/stm32/clk-stm32mp1.c

498

mmux->mux.shift = cfg->mux->shift;

drivers/clk/stm32/clk-stm32mp1.c

513

mux->shift = cfg->mux->shift;

drivers/clk/stm32/clk-stm32mp1.c

536

div->shift = cfg->div->shift;

drivers/clk/stm32/clk-stm32mp1.c

922

element->mux.shift = PLL_MUX_SHIFT;

drivers/clk/stm32/clk-stm32mp13.c

293

.shift = (_shift),\

drivers/clk/stm32/clk-stm32mp13.c

355

.shift = (_shift),\

drivers/clk/stm32/clk-stm32mp21.c

168

.shift = (_shift), \

drivers/clk/stm32/clk-stm32mp25.c

202

.shift = (_shift), \

drivers/clk/sunxi-ng/ccu-sun20i-d1.c

655

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun20i-d1.c

673

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun4i-a10.c

225

.shift = 16,

drivers/clk/sunxi-ng/ccu-sun4i-a10.c

259

.shift = 6,

drivers/clk/sunxi-ng/ccu-sun4i-a10.c

828

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun4i-a10.c

847

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c

23

{ .index = 3, .shift = 0, .width = 5 },

drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c

30

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c

65

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun50i-a64.c

234

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun50i-a64.c

240

.shift = 12,

drivers/clk/sunxi-ng/ccu-sun50i-a64.c

282

.shift = 0,

drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c

29

{ .index = 3, .shift = 0, .width = 5 },

drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c

36

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c

61

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun50i-h6.c

676

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun50i-h616.c

628

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun55i-a523.c

836

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun55i-a523.c

854

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun5i.c

182

.shift = 16,

drivers/clk/sunxi-ng/ccu-sun5i.c

206

.shift = 6,

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

205

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

212

.shift = 12,

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

667

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

686

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

705

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

748

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

769

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

790

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun8i-a23.c

179

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun8i-a23.c

185

.shift = 12,

drivers/clk/sunxi-ng/ccu-sun8i-a33.c

189

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun8i-a33.c

195

.shift = 12,

drivers/clk/sunxi-ng/ccu-sun8i-a83t.c

243

{ .index = 2, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun8i-a83t.c

244

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun8i-a83t.c

249

.shift = 12,

drivers/clk/sunxi-ng/ccu-sun8i-a83t.c

281

.shift = 0,

drivers/clk/sunxi-ng/ccu-sun8i-h3.c

154

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun8i-h3.c

160

.shift = 12,

drivers/clk/sunxi-ng/ccu-sun8i-h3.c

201

.shift = 0,

drivers/clk/sunxi-ng/ccu-sun8i-r.c

101

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun8i-r.c

29

{ .index = 2, .shift = 8, .width = 5 },

drivers/clk/sunxi-ng/ccu-sun8i-r.c

36

.shift = 16,

drivers/clk/sunxi-ng/ccu-sun8i-r40.c

272

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun8i-r40.c

278

.shift = 12,

drivers/clk/sunxi-ng/ccu-sun8i-r40.c

767

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun8i-r40.c

786

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

150

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

156

.shift = 12,

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

197

.shift = 0,

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

764

val &= ~GENMASK(de_clk.mux.shift + de_clk.mux.width - 1,

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

765

de_clk.mux.shift);

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

769

val &= ~GENMASK(tcon_clk.mux.shift + tcon_clk.mux.width - 1,

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

770

tcon_clk.mux.shift);

drivers/clk/sunxi-ng/ccu-sun9i-a80.c

355

.shift = 24,

drivers/clk/sunxi-ng/ccu-sun9i-a80.c

375

.shift = 24,

drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c

116

{ .index = 3, .shift = 6, .width = 2 },

drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c

122

.shift = 12,

drivers/clk/sunxi-ng/ccu_div.c

107

reg &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift);

drivers/clk/sunxi-ng/ccu_div.c

111

writel(reg | (val << cd->div.shift),

drivers/clk/sunxi-ng/ccu_div.c

63

val = reg >> cd->div.shift;

drivers/clk/sunxi-ng/ccu_div.h

32

u8 shift;

drivers/clk/sunxi-ng/ccu_div.h

45

.shift = _shift, \

drivers/clk/sunxi-ng/ccu_div.h

56

.shift = _shift, \

drivers/clk/sunxi-ng/ccu_mp.c

113

bool shift = true;

drivers/clk/sunxi-ng/ccu_mp.c

119

shift = false;

drivers/clk/sunxi-ng/ccu_mp.c

122

if (shift)

drivers/clk/sunxi-ng/ccu_mp.c

129

max_m, max_p, shift, &m, &p);

drivers/clk/sunxi-ng/ccu_mp.c

13

static unsigned int next_div(unsigned int div, bool shift)

drivers/clk/sunxi-ng/ccu_mp.c

134

shift);

drivers/clk/sunxi-ng/ccu_mp.c

15

if (shift)

drivers/clk/sunxi-ng/ccu_mp.c

178

m = reg >> cmp->m.shift;

drivers/clk/sunxi-ng/ccu_mp.c

184

p = reg >> cmp->p.shift;

drivers/clk/sunxi-ng/ccu_mp.c

214

bool shift = true;

drivers/clk/sunxi-ng/ccu_mp.c

218

shift = false;

drivers/clk/sunxi-ng/ccu_mp.c

22

bool shift,

drivers/clk/sunxi-ng/ccu_mp.c

225

if (shift)

drivers/clk/sunxi-ng/ccu_mp.c

234

ccu_mp_find_best(parent_rate, rate, max_m, max_p, shift, &m, &p);

drivers/clk/sunxi-ng/ccu_mp.c

239

reg &= ~GENMASK(cmp->m.width + cmp->m.shift - 1, cmp->m.shift);

drivers/clk/sunxi-ng/ccu_mp.c

240

reg &= ~GENMASK(cmp->p.width + cmp->p.shift - 1, cmp->p.shift);

drivers/clk/sunxi-ng/ccu_mp.c

241

reg |= (m - cmp->m.offset) << cmp->m.shift;

drivers/clk/sunxi-ng/ccu_mp.c

242

if (shift)

drivers/clk/sunxi-ng/ccu_mp.c

243

reg |= ilog2(p) << cmp->p.shift;

drivers/clk/sunxi-ng/ccu_mp.c

245

reg |= (p - cmp->p.offset) << cmp->p.shift;

drivers/clk/sunxi-ng/ccu_mp.c

29

for (_p = 1; _p <= max_p; _p = next_div(_p, shift)) {

drivers/clk/sunxi-ng/ccu_mp.c

55

bool shift)

drivers/clk/sunxi-ng/ccu_mp.c

72

for (_p = 1; _p <= max_p; _p = next_div(_p, shift)) {

drivers/clk/sunxi-ng/ccu_mult.c

135

reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift);

drivers/clk/sunxi-ng/ccu_mult.c

136

reg |= ((_cm.mult - cm->mult.offset) << cm->mult.shift);

drivers/clk/sunxi-ng/ccu_mult.c

85

val = reg >> cm->mult.shift;

drivers/clk/sunxi-ng/ccu_mult.h

11

u8 shift;

drivers/clk/sunxi-ng/ccu_mult.h

22

.shift = _shift, \

drivers/clk/sunxi-ng/ccu_mux.c

178

parent = reg >> cm->shift;

drivers/clk/sunxi-ng/ccu_mux.c

214

reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift);

drivers/clk/sunxi-ng/ccu_mux.c

215

writel(reg | (index << cm->shift), common->base + common->reg);

drivers/clk/sunxi-ng/ccu_mux.c

34

parent_index = reg >> cm->shift;

drivers/clk/sunxi-ng/ccu_mux.c

53

div = reg >> cm->var_predivs[i].shift;

drivers/clk/sunxi-ng/ccu_mux.h

16

u8 shift;

drivers/clk/sunxi-ng/ccu_mux.h

21

u8 shift;

drivers/clk/sunxi-ng/ccu_mux.h

34

.shift = _shift, \

drivers/clk/sunxi-ng/ccu_nk.c

138

reg &= ~GENMASK(nk->n.width + nk->n.shift - 1, nk->n.shift);

drivers/clk/sunxi-ng/ccu_nk.c

139

reg &= ~GENMASK(nk->k.width + nk->k.shift - 1, nk->k.shift);

drivers/clk/sunxi-ng/ccu_nk.c

141

reg |= (_nk.k - nk->k.offset) << nk->k.shift;

drivers/clk/sunxi-ng/ccu_nk.c

142

reg |= (_nk.n - nk->n.offset) << nk->n.shift;

drivers/clk/sunxi-ng/ccu_nk.c

76

n = reg >> nk->n.shift;

drivers/clk/sunxi-ng/ccu_nk.c

82

k = reg >> nk->k.shift;

drivers/clk/sunxi-ng/ccu_nkm.c

139

n = reg >> nkm->n.shift;

drivers/clk/sunxi-ng/ccu_nkm.c

145

k = reg >> nkm->k.shift;

drivers/clk/sunxi-ng/ccu_nkm.c

151

m = reg >> nkm->m.shift;

drivers/clk/sunxi-ng/ccu_nkm.c

229

reg &= ~GENMASK(nkm->n.width + nkm->n.shift - 1, nkm->n.shift);

drivers/clk/sunxi-ng/ccu_nkm.c

230

reg &= ~GENMASK(nkm->k.width + nkm->k.shift - 1, nkm->k.shift);

drivers/clk/sunxi-ng/ccu_nkm.c

231

reg &= ~GENMASK(nkm->m.width + nkm->m.shift - 1, nkm->m.shift);

drivers/clk/sunxi-ng/ccu_nkm.c

233

reg |= (_nkm.n - nkm->n.offset) << nkm->n.shift;

drivers/clk/sunxi-ng/ccu_nkm.c

234

reg |= (_nkm.k - nkm->k.offset) << nkm->k.shift;

drivers/clk/sunxi-ng/ccu_nkm.c

235

reg |= (_nkm.m - nkm->m.offset) << nkm->m.shift;

drivers/clk/sunxi-ng/ccu_nkmp.c

102

n = reg >> nkmp->n.shift;

drivers/clk/sunxi-ng/ccu_nkmp.c

108

k = reg >> nkmp->k.shift;

drivers/clk/sunxi-ng/ccu_nkmp.c

114

m = reg >> nkmp->m.shift;

drivers/clk/sunxi-ng/ccu_nkmp.c

120

p = reg >> nkmp->p.shift;

drivers/clk/sunxi-ng/ccu_nkmp.c

194

n_mask = GENMASK(nkmp->n.width + nkmp->n.shift - 1,

drivers/clk/sunxi-ng/ccu_nkmp.c

195

nkmp->n.shift);

drivers/clk/sunxi-ng/ccu_nkmp.c

197

k_mask = GENMASK(nkmp->k.width + nkmp->k.shift - 1,

drivers/clk/sunxi-ng/ccu_nkmp.c

198

nkmp->k.shift);

drivers/clk/sunxi-ng/ccu_nkmp.c

200

m_mask = GENMASK(nkmp->m.width + nkmp->m.shift - 1,

drivers/clk/sunxi-ng/ccu_nkmp.c

201

nkmp->m.shift);

drivers/clk/sunxi-ng/ccu_nkmp.c

203

p_mask = GENMASK(nkmp->p.width + nkmp->p.shift - 1,

drivers/clk/sunxi-ng/ccu_nkmp.c

204

nkmp->p.shift);

drivers/clk/sunxi-ng/ccu_nkmp.c

211

reg |= ((_nkmp.n - nkmp->n.offset) << nkmp->n.shift) & n_mask;

drivers/clk/sunxi-ng/ccu_nkmp.c

212

reg |= ((_nkmp.k - nkmp->k.offset) << nkmp->k.shift) & k_mask;

drivers/clk/sunxi-ng/ccu_nkmp.c

213

reg |= ((_nkmp.m - nkmp->m.offset) << nkmp->m.shift) & m_mask;

drivers/clk/sunxi-ng/ccu_nkmp.c

214

reg |= (ilog2(_nkmp.p) << nkmp->p.shift) & p_mask;

drivers/clk/sunxi-ng/ccu_nm.c

102

m = reg >> nm->m.shift;

drivers/clk/sunxi-ng/ccu_nm.c

185

reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);

drivers/clk/sunxi-ng/ccu_nm.c

217

reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);

drivers/clk/sunxi-ng/ccu_nm.c

218

reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);

drivers/clk/sunxi-ng/ccu_nm.c

220

reg |= (_nm.n - nm->n.offset) << nm->n.shift;

drivers/clk/sunxi-ng/ccu_nm.c

221

reg |= (_nm.m - nm->m.offset) << nm->m.shift;

drivers/clk/sunxi-ng/ccu_nm.c

96

n = reg >> nm->n.shift;

drivers/clk/sunxi-ng/ccu_phase.c

112

reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift);

drivers/clk/sunxi-ng/ccu_phase.c

113

writel(reg | (delay << phase->shift),

drivers/clk/sunxi-ng/ccu_phase.c

23

delay = (reg >> phase->shift);

drivers/clk/sunxi-ng/ccu_phase.h

14

u8 shift;

drivers/clk/sunxi-ng/ccu_phase.h

22

.shift = _shift, \

drivers/clk/sunxi/clk-a10-mod1.c

50

mux->shift = SUN4I_MOD1_MUX;

drivers/clk/sunxi/clk-a10-pll2.c

88

mult->shift = SUN4I_PLL2_N_SHIFT;

drivers/clk/sunxi/clk-a10-ve.c

116

div->shift = SUN4I_VE_DIVIDER_SHIFT;

drivers/clk/sunxi/clk-factors.c

239

mux->shift = data->mux;

drivers/clk/sunxi/clk-factors.c

74

(reg >> factors->mux->shift) &

drivers/clk/sunxi/clk-sun4i-display.c

134

mux->shift = data->offset_mux;

drivers/clk/sunxi/clk-sun4i-display.c

152

div->shift = data->offset_div;

drivers/clk/sunxi/clk-sun4i-pll3.c

53

mult->shift = SUN4I_A10_PLL3_DIV_SHIFT;

drivers/clk/sunxi/clk-sun6i-ar100.c

28

int shift;

drivers/clk/sunxi/clk-sun6i-ar100.c

37

shift = 0;

drivers/clk/sunxi/clk-sun6i-ar100.c

39

shift = 1;

drivers/clk/sunxi/clk-sun6i-ar100.c

41

shift = 2;

drivers/clk/sunxi/clk-sun6i-ar100.c

43

shift = 3;

drivers/clk/sunxi/clk-sun6i-ar100.c

45

div >>= shift;

drivers/clk/sunxi/clk-sun6i-ar100.c

50

req->rate = (req->parent_rate >> shift) / div;

drivers/clk/sunxi/clk-sun6i-ar100.c

52

req->p = shift;

drivers/clk/sunxi/clk-sun8i-mbus.c

67

div->shift = SUN8I_MBUS_DIV_SHIFT;

drivers/clk/sunxi/clk-sun8i-mbus.c

72

mux->shift = SUN8I_MBUS_MUX_SHIFT;

drivers/clk/sunxi/clk-sun9i-cpus.c

213

mux->shift = SUN9I_CPUS_MUX_SHIFT;

drivers/clk/sunxi/clk-sunxi.c

1055

divider->shift = data->div[i].shift;

drivers/clk/sunxi/clk-sunxi.c

635

u8 shift;

drivers/clk/sunxi/clk-sunxi.c

639

.shift = 16,

drivers/clk/sunxi/clk-sunxi.c

643

.shift = 12,

drivers/clk/sunxi/clk-sunxi.c

647

.shift = 0,

drivers/clk/sunxi/clk-sunxi.c

675

data->shift, SUNXI_MUX_GATE_WIDTH,

drivers/clk/sunxi/clk-sunxi.c

725

u8 shift;

drivers/clk/sunxi/clk-sunxi.c

732

.shift = 0,

drivers/clk/sunxi/clk-sunxi.c

755

.shift = 4,

drivers/clk/sunxi/clk-sunxi.c

769

.shift = 8,

drivers/clk/sunxi/clk-sunxi.c

798

reg, data->shift, data->width,

drivers/clk/sunxi/clk-sunxi.c

875

u8 shift; /* otherwise it's a normal divisor with this shift */

drivers/clk/sunxi/clk-sunxi.c

895

{ .shift = 0, .pow = 0, .critical = true }, /* M, DDR */

drivers/clk/sunxi/clk-sunxi.c

896

{ .shift = 16, .pow = 1, }, /* P, other */

drivers/clk/sunxi/clk-sunxi.c

905

{ .shift = 0, .table = pll6_sata_tbl, .gate = 14 }, /* M, SATA */

drivers/clk/tegra/clk-divider.c

104

val &= ~(div_mask(divider) << divider->shift);

drivers/clk/tegra/clk-divider.c

105

val |= div << divider->shift;

drivers/clk/tegra/clk-divider.c

14

#define pll_out_override(p) (BIT((p->shift - 6)))

drivers/clk/tegra/clk-divider.c

144

unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,

drivers/clk/tegra/clk-divider.c

165

divider->shift = shift;

drivers/clk/tegra/clk-divider.c

49

div = (reg >> divider->shift) & div_mask(divider);

drivers/clk/tegra/clk-super.c

109

val &= ~((super_state_to_src_mask(mux)) << shift);

drivers/clk/tegra/clk-super.c

110

val |= (index & (super_state_to_src_mask(mux))) << shift;

drivers/clk/tegra/clk-super.c

261

super->frac_div.shift = 16;

drivers/clk/tegra/clk-super.c

38

u8 source, shift;

drivers/clk/tegra/clk-super.c

46

shift = (state == super_state(SUPER_STATE_IDLE)) ?

drivers/clk/tegra/clk-super.c

50

source = (val >> shift) & super_state_to_src_mask(mux);

drivers/clk/tegra/clk-super.c

68

u8 parent_index, shift;

drivers/clk/tegra/clk-super.c

78

shift = (state == super_state(SUPER_STATE_IDLE)) ?

drivers/clk/tegra/clk-tegra-periph.c

931

data->periph.divider.shift,

drivers/clk/tegra/clk-tegra-super-cclk.c

166

super->frac_div.shift = 16;

drivers/clk/tegra/clk.h

120

u8 shift;

drivers/clk/tegra/clk.h

136

unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,

drivers/clk/tegra/clk.h

648

.shift = _mux_shift, \

drivers/clk/tegra/clk.h

655

.shift = _div_shift, \

drivers/clk/thead/clk-th1520-ap.c

104

.shift = _shift, \

drivers/clk/thead/clk-th1520-ap.c

113

.shift = _shift, \

drivers/clk/thead/clk-th1520-ap.c

165

parent = val >> mux->shift;

drivers/clk/thead/clk-th1520-ap.c

176

GENMASK(mux->width - 1, 0) << mux->shift,

drivers/clk/thead/clk-th1520-ap.c

177

index << mux->shift);

drivers/clk/thead/clk-th1520-ap.c

220

val = val >> cd->div.shift;

drivers/clk/thead/clk-th1520-ap.c

239

val = val >> cd->div.shift;

drivers/clk/thead/clk-th1520-ap.c

257

curr_val = reg_val >> cd->div.shift;

drivers/clk/thead/clk-th1520-ap.c

267

reg_val &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift);

drivers/clk/thead/clk-th1520-ap.c

268

reg_val |= val << cd->div.shift;

drivers/clk/thead/clk-th1520-ap.c

43

u8 shift;

drivers/clk/thead/clk-th1520-ap.c

48

u8 shift;

drivers/clk/thead/clk-th1520-ap.c

760

.shift = 0,

drivers/clk/thead/clk-th1520-ap.c

98

.shift = _shift, \

drivers/clk/ti/adpll.c

239

u8 shift, u8 width,

drivers/clk/ti/adpll.c

252

reg, shift, width, clk_divider_flags,

drivers/clk/ti/adpll.c

269

u8 shift)

drivers/clk/ti/adpll.c

281

reg, shift, 1, 0, &d->lock);

drivers/clk/ti/autoidle.c

124

val &= ~(1 << clk->shift);

drivers/clk/ti/autoidle.c

126

val |= (1 << clk->shift);

drivers/clk/ti/autoidle.c

138

val |= (1 << clk->shift);

drivers/clk/ti/autoidle.c

140

val &= ~(1 << clk->shift);

drivers/clk/ti/autoidle.c

186

u32 shift;

drivers/clk/ti/autoidle.c

191

if (of_property_read_u32(node, "ti,autoidle-shift", &shift))

drivers/clk/ti/autoidle.c

199

clk->shift = shift;

drivers/clk/ti/autoidle.c

21

u8 shift;

drivers/clk/ti/clk.c

370

void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)

drivers/clk/ti/clk.c

374

if (shift < 0)

drivers/clk/ti/clk.c

377

latch = 1 << shift;

drivers/clk/ti/clkctrl.c

379

mux->shift = data->bit;

drivers/clk/ti/clkctrl.c

403

div->shift = data->bit;

drivers/clk/ti/clock.h

14

u8 shift;

drivers/clk/ti/clock.h

210

void ti_clk_latch(struct clk_omap_reg *reg, s8 shift);

drivers/clk/ti/clock.h

31

u8 shift;

drivers/clk/ti/divider.c

259

val &= ~(divider->mask << divider->shift);

drivers/clk/ti/divider.c

260

val |= value << divider->shift;

drivers/clk/ti/divider.c

279

val = ti_clk_ll_ops->clk_readl(&divider->reg) >> divider->shift;

drivers/clk/ti/divider.c

297

val &= ~(divider->mask << divider->shift);

drivers/clk/ti/divider.c

298

val |= divider->context << divider->shift;

drivers/clk/ti/divider.c

482

div->shift = div->reg.bit;

drivers/clk/ti/divider.c

99

val = ti_clk_ll_ops->clk_readl(&divider->reg) >> divider->shift;

drivers/clk/ti/gate.c

78

dummy_v ^= (1 << parent->shift);

drivers/clk/ti/mux.c

124

struct clk_omap_reg *reg, u8 shift, u32 mask,

drivers/clk/ti/mux.c

144

mux->shift = shift;

drivers/clk/ti/mux.c

174

u32 shift = 0;

drivers/clk/ti/mux.c

192

shift = reg.bit;

drivers/clk/ti/mux.c

211

flags, &reg, shift, mask, latch, clk_mux_flags,

drivers/clk/ti/mux.c

234

mux->shift = setup->bit_shift;

drivers/clk/ti/mux.c

263

mux->shift = mux->reg.bit;

drivers/clk/ti/mux.c

34

val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift;

drivers/clk/ti/mux.c

74

val = mux->mask << (mux->shift + 16);

drivers/clk/ti/mux.c

77

val &= ~(mux->mask << mux->shift);

drivers/clk/ti/mux.c

79

val |= index << mux->shift;

drivers/clk/versatile/clk-sp810.c

47

u32 val, shift = SCCTRL_TIMERENnSEL_SHIFT(timerclken->channel);

drivers/clk/versatile/clk-sp810.c

56

val &= ~(1 << shift);

drivers/clk/versatile/clk-sp810.c

57

val |= index << shift;

drivers/clk/x86/clk-cgu.c

106

mux->shift = shift;

drivers/clk/x86/clk-cgu.c

117

lgm_set_clk_val(mux->membase, reg, shift, width, list->mux_val);

drivers/clk/x86/clk-cgu.c

129

divider->shift, divider->width);

drivers/clk/x86/clk-cgu.c

157

divider->shift, divider->width, value);

drivers/clk/x86/clk-cgu.c

198

u8 shift = list->div_shift;

drivers/clk/x86/clk-cgu.c

218

div->shift = shift;

drivers/clk/x86/clk-cgu.c

232

lgm_set_clk_val(div->membase, reg, shift, width, list->div_val);

drivers/clk/x86/clk-cgu.c

262

lgm_set_clk_val(gate->membase, reg, gate->shift, 1, 1);

drivers/clk/x86/clk-cgu.c

273

lgm_set_clk_val(gate->membase, reg, gate->shift, 1, 1);

drivers/clk/x86/clk-cgu.c

282

ret = lgm_get_clk_val(gate->membase, reg, gate->shift, 1);

drivers/clk/x86/clk-cgu.c

300

u8 shift = list->gate_shift;

drivers/clk/x86/clk-cgu.c

319

gate->shift = shift;

drivers/clk/x86/clk-cgu.c

329

lgm_set_clk_val(gate->membase, reg, shift, 1, list->gate_val);

drivers/clk/x86/clk-cgu.c

46

val = lgm_get_clk_val(mux->membase, mux->reg, mux->shift,

drivers/clk/x86/clk-cgu.c

60

lgm_set_clk_val(mux->membase, mux->reg, mux->shift,

drivers/clk/x86/clk-cgu.c

86

u8 shift = list->mux_shift;

drivers/clk/x86/clk-cgu.h

18

u8 shift;

drivers/clk/x86/clk-cgu.h

27

u8 shift;

drivers/clk/x86/clk-cgu.h

301

u8 shift, u8 width, u32 set_val)

drivers/clk/x86/clk-cgu.h

303

u32 mask = (GENMASK(width - 1, 0) << shift);

drivers/clk/x86/clk-cgu.h

305

regmap_update_bits(membase, reg, mask, set_val << shift);

drivers/clk/x86/clk-cgu.h

309

u8 shift, u8 width)

drivers/clk/x86/clk-cgu.h

311

u32 mask = (GENMASK(width - 1, 0) << shift);

drivers/clk/x86/clk-cgu.h

319

val = (val & mask) >> shift;

drivers/clk/x86/clk-cgu.h

56

u8 shift;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

168

u8 shift;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

228

val = readl(div_addr) >> divider->shift;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

798

u8 shift, u8 width,

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

822

div->shift = shift;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

842

u8 shift, u8 width,

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

869

div->shift = shift;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

888

u8 shift, u8 width,

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

915

div->shift = shift;

drivers/clocksource/arm_arch_timer.c

945

cyclecounter.shift = clocksource_counter.shift;

drivers/clocksource/exynos_mct.c

315

>> evt->shift);

drivers/clocksource/exynos_mct.c

429

>> evt->shift);

drivers/clocksource/numachip.c

27

.shift = 0,

drivers/clocksource/numachip.c

43

.shift = 0,

drivers/clocksource/renesas-ostm.c

153

ced->shift = 32;

drivers/clocksource/samsung_pwm_timer.c

102

u8 shift = TCFG1_SHIFT(channel);

drivers/clocksource/samsung_pwm_timer.c

112

reg &= ~(TCFG1_MUX_MASK << shift);

drivers/clocksource/samsung_pwm_timer.c

113

reg |= bits << shift;

drivers/clocksource/samsung_pwm_timer.c

84

u8 shift = 0;

drivers/clocksource/samsung_pwm_timer.c

88

shift = TCFG0_PRESCALER1_SHIFT;

drivers/clocksource/samsung_pwm_timer.c

93

reg &= ~(TCFG0_PRESCALER_MASK << shift);

drivers/clocksource/samsung_pwm_timer.c

94

reg |= (prescale - 1) << shift;

drivers/clocksource/sh_cmt.c

861

ced->shift = 32;

drivers/clocksource/sh_cmt.c

862

ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift);

drivers/clocksource/timer-armada-370-xp.c

184

evt->shift = 32;

drivers/clocksource/timer-atmel-pit.c

246

data->clkevt.shift = 32;

drivers/clocksource/timer-atmel-pit.c

247

data->clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, data->clkevt.shift);

drivers/clocksource/timer-orion.c

99

.shift = 32,

drivers/clocksource/timer-ralink.c

146

np, systick.dev.mult, systick.dev.shift);

drivers/clocksource/timer-rda.c

94

evt->mult) >> evt->shift;

drivers/clocksource/timer-riscv.c

140

void riscv_cs_get_mult_shift(u32 *mult, u32 *shift)

drivers/clocksource/timer-riscv.c

143

*shift = riscv_clocksource.shift;

drivers/comedi/comedi_fops.c

1603

unsigned int shift = 0;

drivers/comedi/comedi_fops.c

1606

shift = CR_CHAN(insn->chanspec);

drivers/comedi/comedi_fops.c

1607

if (shift > 0) {

drivers/comedi/comedi_fops.c

1609

data[0] <<= shift;

drivers/comedi/comedi_fops.c

1610

data[1] <<= shift;

drivers/comedi/comedi_fops.c

1615

if (shift > 0)

drivers/comedi/comedi_fops.c

1616

data[1] >>= shift;

drivers/comedi/drivers/addi_apci_1032.c

109

unsigned int shift, oldmask, himask, lomask;

drivers/comedi/drivers/addi_apci_1032.c

115

shift = data[3];

drivers/comedi/drivers/addi_apci_1032.c

116

if (shift < 32) {

drivers/comedi/drivers/addi_apci_1032.c

117

oldmask = (1U << shift) - 1;

drivers/comedi/drivers/addi_apci_1032.c

118

himask = data[4] << shift;

drivers/comedi/drivers/addi_apci_1032.c

119

lomask = data[5] << shift;

drivers/comedi/drivers/addi_apci_1500.c

454

unsigned int shift = data[3];

drivers/comedi/drivers/addi_apci_1500.c

470

if (shift <= 16) {

drivers/comedi/drivers/addi_apci_1500.c

471

hi_mask = data[4] << shift;

drivers/comedi/drivers/addi_apci_1500.c

472

lo_mask = data[5] << shift;

drivers/comedi/drivers/addi_apci_1500.c

473

old_mask = (1U << shift) - 1;

drivers/comedi/drivers/addi_apci_1500.c

474

invalid_chan = (data[4] | data[5]) >> (16 - shift);

drivers/comedi/drivers/addi_apci_1564.c

334

unsigned int shift, oldmask, himask, lomask;

drivers/comedi/drivers/addi_apci_1564.c

340

shift = data[3];

drivers/comedi/drivers/addi_apci_1564.c

341

if (shift < 32) {

drivers/comedi/drivers/addi_apci_1564.c

342

oldmask = (1U << shift) - 1;

drivers/comedi/drivers/addi_apci_1564.c

343

himask = data[4] << shift;

drivers/comedi/drivers/addi_apci_1564.c

344

lomask = data[5] << shift;

drivers/comedi/drivers/adl_pci9111.c

397

unsigned int shift = (maxdata == 0xffff) ? 0 : 4;

drivers/comedi/drivers/adl_pci9111.c

402

array[i] = ((array[i] >> shift) & maxdata) ^ invert;

drivers/comedi/drivers/adl_pci9111.c

536

unsigned int shift = (maxdata == 0xffff) ? 0 : 4;

drivers/comedi/drivers/adl_pci9111.c

562

data[i] = ((data[i] >> shift) & maxdata) ^ invert;

drivers/comedi/drivers/amplc_pci224.c

921

unsigned int shift;

drivers/comedi/drivers/amplc_pci224.c

925

shift = 16 - board->ao_bits;

drivers/comedi/drivers/amplc_pci224.c

937

array[i] = (array[i] << shift) - offset;

drivers/comedi/drivers/ni_6527.c

312

unsigned int rising, falling, shift;

drivers/comedi/drivers/ni_6527.c

335

shift = data[3];

drivers/comedi/drivers/ni_6527.c

336

if (shift >= 32) {

drivers/comedi/drivers/ni_6527.c

341

mask <<= shift;

drivers/comedi/drivers/ni_6527.c

342

rising = data[4] << shift;

drivers/comedi/drivers/ni_6527.c

343

falling = data[5] << shift;

drivers/comedi/drivers/ni_660x.c

535

unsigned int shift = CR_CHAN(insn->chanspec);

drivers/comedi/drivers/ni_660x.c

536

unsigned int mask = data[0] << shift;

drivers/comedi/drivers/ni_660x.c

537

unsigned int bits = data[1] << shift;

drivers/comedi/drivers/ni_660x.c

555

data[1] = ni_660x_read(dev, 0, NI660X_DIO32_INPUT) >> shift;

drivers/comedi/drivers/ni_tio.c

1125

unsigned int abz_reg, shift, mask;

drivers/comedi/drivers/ni_tio.c

1135

shift = 10;

drivers/comedi/drivers/ni_tio.c

1138

shift = 5;

drivers/comedi/drivers/ni_tio.c

1141

shift = 0;

drivers/comedi/drivers/ni_tio.c

1146

mask = 0x1f << shift;

drivers/comedi/drivers/ni_tio.c

1151

counter_dev->regs[chip][abz_reg] |= (source << shift) & mask;

drivers/comedi/drivers/ni_tio.c

1161

unsigned int abz_reg, shift, mask;

drivers/comedi/drivers/ni_tio.c

1172

shift = 10;

drivers/comedi/drivers/ni_tio.c

1175

shift = 5;

drivers/comedi/drivers/ni_tio.c

1178

shift = 0;

drivers/comedi/drivers/ni_tio.c

1185

*source = (ni_tio_get_soft_copy(counter, abz_reg) >> shift) & mask;

drivers/comedi/kcomedilib/kcomedilib_main.c

282

unsigned int shift;

drivers/comedi/kcomedilib/kcomedilib_main.c

304

shift = base_channel;

drivers/comedi/kcomedilib/kcomedilib_main.c

305

if (shift) {

drivers/comedi/kcomedilib/kcomedilib_main.c

307

data[0] <<= shift;

drivers/comedi/kcomedilib/kcomedilib_main.c

308

data[1] <<= shift;

drivers/comedi/kcomedilib/kcomedilib_main.c

311

shift = 0;

drivers/comedi/kcomedilib/kcomedilib_main.c

315

*bits = data[1] >> shift;

drivers/cpufreq/powernv-cpufreq.c

167

static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift)

drivers/cpufreq/powernv-cpufreq.c

169

return ((pmsr_val >> shift) & 0xFF);

drivers/cpufreq/sa1110-cpufreq.c

132

u_int shift;

drivers/cpufreq/sa1110-cpufreq.c

135

shift = delayed + 1 + rcd;

drivers/cpufreq/sa1110-cpufreq.c

138

mdcas[0] |= 0x55555555 << shift;

drivers/cpufreq/sa1110-cpufreq.c

139

mdcas[1] = mdcas[2] = 0x55555555 << (shift & 1);

drivers/crypto/cavium/cpt/cptpf_main.c

124

int ret = 0, core = 0, shift = 0;

drivers/crypto/cavium/cpt/cptpf_main.c

150

for (; core < total_cores ; core++, shift++) {

drivers/crypto/cavium/cpt/cptpf_main.c

151

if (mcode->core_mask & (1 << shift)) {

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1176

unsigned int shift = sz << 1;

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1180

memzero_explicit(ctx->ecdh.p + shift, sz);

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1279

unsigned int sz, shift, curve_sz;

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1299

shift = sz << 2;

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1300

ctx->ecdh.g = ctx->ecdh.p + shift;

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1301

ctx->ecdh.dma_g = ctx->ecdh.dma_p + shift;

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1494

int shift;

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1497

shift = ctx->key_sz - (len >> 1);

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1498

if (unlikely(shift < 0))

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1507

memcpy(ptr + shift, ptr + tmpshift, len >> 1);

drivers/crypto/hisilicon/hpre/hpre_crypto.c

1508

memcpy(ptr + ctx->key_sz + shift, ptr + tmpshift + (len >> 1), len >> 1);

drivers/crypto/hisilicon/hpre/hpre_crypto.c

192

int shift;

drivers/crypto/hisilicon/hpre/hpre_crypto.c

194

shift = ctx->key_sz - len;

drivers/crypto/hisilicon/hpre/hpre_crypto.c

195

if (unlikely(shift < 0))

drivers/crypto/hisilicon/hpre/hpre_crypto.c

203

scatterwalk_map_and_copy(ptr + shift, data, 0, len, 0);

drivers/crypto/hisilicon/hpre/hpre_main.c

1074

clusters_num = (hpre_core_info >> hpre_basic_info[HPRE_CLUSTER_NUM_CAP].shift) &

drivers/crypto/hisilicon/hpre/hpre_main.c

1223

clusters_num = (hpre_core_info >> hpre_basic_info[HPRE_CLUSTER_NUM_CAP].shift) &

drivers/crypto/hisilicon/hpre/hpre_main.c

1299

clusters_num = (hpre_core_info >> hpre_basic_info[HPRE_CLUSTER_NUM_CAP].shift) &

drivers/crypto/hisilicon/hpre/hpre_main.c

1357

clusters_num = (hpre_core_info >> hpre_basic_info[HPRE_CLUSTER_NUM_CAP].shift) &

drivers/crypto/hisilicon/hpre/hpre_main.c

558

clusters_num = (hpre_core_info >> hpre_basic_info[HPRE_CLUSTER_NUM_CAP].shift) &

drivers/crypto/hisilicon/hpre/hpre_main.c

668

clusters_num = (hpre_core_info >> hpre_basic_info[HPRE_CLUSTER_NUM_CAP].shift) &

drivers/crypto/hisilicon/hpre/hpre_main.c

701

clusters_num = (hpre_core_info >> hpre_basic_info[HPRE_CLUSTER_NUM_CAP].shift) &

drivers/crypto/hisilicon/hpre/hpre_main.c

782

clusters_num = (hpre_core_info >> hpre_basic_info[HPRE_CLUSTER_NUM_CAP].shift) &

drivers/crypto/hisilicon/qm.c

882

return (val >> info_table[index].shift) & info_table[index].mask;

drivers/crypto/hisilicon/zip/zip_main.c

1027

zip_core_num = (zip_core_info >> zip_basic_cap_info[ZIP_CORE_NUM_CAP].shift) &

drivers/crypto/hisilicon/zip/zip_main.c

1066

zip_core_num = (zip_core_info >> zip_basic_cap_info[ZIP_CORE_NUM_CAP].shift) &

drivers/crypto/hisilicon/zip/zip_main.c

1125

zip_core_num = (zip_core_info >> zip_basic_cap_info[ZIP_CORE_NUM_CAP].shift) &

drivers/crypto/hisilicon/zip/zip_main.c

1127

zip_comp_core_num = (zip_core_info >> zip_basic_cap_info[ZIP_CLUSTER_COMP_NUM_CAP].shift) &

drivers/crypto/hisilicon/zip/zip_main.c

633

dcomp_bm = (zip_core_en >> zip_basic_cap_info[ZIP_DECOMP_ENABLE_BITMAP].shift) &

drivers/crypto/hisilicon/zip/zip_main.c

635

comp_bm = (zip_core_en >> zip_basic_cap_info[ZIP_COMP_ENABLE_BITMAP].shift) &

drivers/crypto/hisilicon/zip/zip_main.c

870

zip_comp_core_num = (zip_core_info >> zip_basic_cap_info[ZIP_CLUSTER_COMP_NUM_CAP].shift) &

drivers/crypto/hisilicon/zip/zip_main.c

892

zip_core_num = (zip_core_info >> zip_basic_cap_info[ZIP_CORE_NUM_CAP].shift) &

drivers/crypto/hisilicon/zip/zip_main.c

894

zip_comp_core_num = (zip_core_info >> zip_basic_cap_info[ZIP_CLUSTER_COMP_NUM_CAP].shift) &

drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c

54

u32 shift = hw_data->tx_rx_gap;

drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c

64

rx_ring_mask = tx_ring_mask << shift;

drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c

66

arben_rx = (ring->bank->ring_mask & rx_ring_mask) >> shift;

drivers/crypto/intel/qat/qat_common/adf_transport.c

14

static inline u32 adf_modulo(u32 data, u32 shift)

drivers/crypto/intel/qat/qat_common/adf_transport.c

16

u32 div = data >> shift;

drivers/crypto/intel/qat/qat_common/adf_transport.c

17

u32 mult = div << shift;

drivers/crypto/intel/qat/qat_common/qat_asym_algs.c

294

int shift = ctx->p_size - req->src_len;

drivers/crypto/intel/qat/qat_common/qat_asym_algs.c

300

scatterwalk_map_and_copy(qat_req->src_align + shift,

drivers/crypto/intel/qat/qat_common/qat_asym_algs.c

752

int shift = ctx->key_sz - req->src_len;

drivers/crypto/intel/qat/qat_common/qat_asym_algs.c

758

scatterwalk_map_and_copy(qat_req->src_align + shift, req->src,

drivers/crypto/intel/qat/qat_common/qat_asym_algs.c

896

int shift = ctx->key_sz - req->src_len;

drivers/crypto/intel/qat/qat_common/qat_asym_algs.c

902

scatterwalk_map_and_copy(qat_req->src_align + shift, req->src,

drivers/crypto/starfive/jh7110-rsa.c

253

int ret = 0, shift = 0;

drivers/crypto/starfive/jh7110-rsa.c

258

shift = sizeof(u32) - (rctx->total & 0x3);

drivers/crypto/starfive/jh7110-rsa.c

259

memset(rctx->rsa_data, 0, shift);

drivers/crypto/starfive/jh7110-rsa.c

263

rctx->rsa_data + shift, rctx->total);

drivers/dma/bcm-sba-raid.c

163

static inline u64 __pure sba_cmd_enc(u64 cmd, u32 val, u32 shift, u32 mask)

drivers/dma/bcm-sba-raid.c

165

cmd &= ~((u64)mask << shift);

drivers/dma/bcm-sba-raid.c

166

cmd |= ((u64)(val & mask) << shift);

drivers/dma/dma-jz4780.c

272

unsigned long val, u32 *shift)

drivers/dma/dma-jz4780.c

289

*shift = ord;

drivers/dma/idxd/perfmon.c

214

int shift = 64 - idxd->idxd_pmu->counter_width;

drivers/dma/idxd/perfmon.c

222

n = (new_raw_count << shift);

drivers/dma/idxd/perfmon.c

223

p = (prev_raw_count << shift);

drivers/dma/idxd/perfmon.c

225

delta = ((n - p) >> shift);

drivers/dma/imx-sdma.c

2047

u32 reg, val, shift, num_map, i;

drivers/dma/imx-sdma.c

2080

ret = of_property_read_u32_index(np, propname, i + 1, &shift);

drivers/dma/imx-sdma.c

2094

regmap_update_bits(gpr, reg, BIT(shift), val << shift);

drivers/dma/owl-dma.c

121

#define BIT_FIELD(val, width, shift, newshift) \

drivers/dma/owl-dma.c

122

((((val) >> (shift)) & ((BIT(width)) - 1)) << (newshift))

drivers/dma/sh/rz-dmac.c

309

u32 shift = (nr % 2) * 16;

drivers/dma/sh/rz-dmac.c

313

dmars32 &= ~(0xffff << shift);

drivers/dma/sh/rz-dmac.c

314

dmars32 |= dmars << shift;

drivers/dma/sh/shdmac.c

262

unsigned int shift = chan_pdata->dmars_bit;

drivers/dma/sh/shdmac.c

275

__raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift),

drivers/dma/tegra210-adma.c

30

#define ADMA_CH_CTRL_DIR(val, mask, shift) (((val) & (mask)) << (shift))

drivers/dma/tegra210-adma.c

33

#define ADMA_CH_CTRL_MODE_CONTINUOUS(shift) (2 << (shift))

drivers/dma/tegra210-adma.c

79

#define ADMA_CH_REG_FIELD_VAL(val, mask, shift) (((val) & mask) << shift)

drivers/dma/ti/edma.c

2095

u32 shift, offset, mux;

drivers/dma/ti/edma.c

2121

shift = (xbar_chans[i][1] & 0x03) << 3;

drivers/dma/ti/edma.c

2124

mux &= ~(0xff << shift);

drivers/dma/ti/edma.c

2125

mux |= xbar_chans[i][0] << shift;

drivers/dma/xilinx/xdma.c

1002

shift = XDMA_IRQ_VEC_SHIFT * i;

drivers/dma/xilinx/xdma.c

1003

val |= irq_start << shift;

drivers/dma/xilinx/xdma.c

996

u32 shift, i, val = 0;

drivers/edac/amd64_edac.c

1843

unsigned shift = 0;

drivers/edac/amd64_edac.c

1846

shift = i;

drivers/edac/amd64_edac.c

1848

shift = i >> 1;

drivers/edac/amd64_edac.c

1850

shift = (i + 1) >> 1;

drivers/edac/amd64_edac.c

1852

return 128 << (shift + !!dct_width);

drivers/edac/amd64_edac.c

1904

unsigned shift = 0;

drivers/edac/amd64_edac.c

1910

shift = i;

drivers/edac/amd64_edac.c

1912

shift = 7;

drivers/edac/amd64_edac.c

1914

shift = i >> 1;

drivers/edac/amd64_edac.c

1916

shift = (i + 1) >> 1;

drivers/edac/amd64_edac.c

1919

cs_size = (128 * (1 << !!dct_width)) << shift;

drivers/edac/amd64_edac.c

1926

unsigned shift = 0;

drivers/edac/amd64_edac.c

1932

shift = 7;

drivers/edac/amd64_edac.c

1934

shift = i >> 1;

drivers/edac/amd64_edac.c

1936

shift = (i + 1) >> 1;

drivers/edac/amd64_edac.c

1939

cs_size = rank_multiply * (128 << shift);

drivers/edac/amd64_edac.c

2116

u8 shift = intlv_addr & 0x1 ? 9 : 6;

drivers/edac/amd64_edac.c

2119

return ((sys_addr >> shift) & 1) ^ temp;

drivers/edac/amd64_edac.c

2123

u8 shift = intlv_addr & 0x1 ? 9 : 8;

drivers/edac/amd64_edac.c

2125

return (sys_addr >> shift) & 1;

drivers/edac/skx_base.c

273

int i, idx, tgt, lchan, shift;

drivers/edac/skx_base.c

338

shift = 6;

drivers/edac/skx_base.c

341

shift = 8;

drivers/edac/skx_base.c

344

shift = 12;

drivers/edac/skx_base.c

352

lchan = (addr >> shift) % 3;

drivers/edac/skx_base.c

355

lchan = (addr >> shift) % 2;

drivers/edac/skx_base.c

358

lchan = (addr >> shift) % 2;

drivers/edac/skx_base.c

362

lchan = ((addr >> shift) % 2) << 1;

drivers/edac/skx_base.c

398

static u64 skx_do_interleave(u64 addr, int shift, int ways, u64 lowbits)

drivers/edac/skx_base.c

400

addr >>= shift;

drivers/edac/skx_base.c

402

addr <<= shift;

drivers/edac/skx_base.c

404

return addr | (lowbits & ((1ull << shift) - 1));

drivers/edac/skx_base.c

471

int shift;

drivers/edac/skx_base.c

476

shift = 6;

drivers/edac/skx_base.c

478

shift = 13;

drivers/edac/skx_base.c

494

rank_addr = res->chan_addr >> shift;

drivers/edac/skx_base.c

496

rank_addr <<= shift;

drivers/edac/skx_base.c

497

rank_addr |= res->chan_addr & GENMASK_ULL(shift - 1, 0);

drivers/edac/skx_base.c

500

idx = (res->chan_addr >> shift) % SKX_RIR_WAYS(rirway);

drivers/firewire/phy-packet-definitions.h

276

unsigned int index, shift;

drivers/firewire/phy-packet-definitions.h

279

shift = 16 - ((port_index + 5) % 8) * 2;

drivers/firewire/phy-packet-definitions.h

282

return (self_id_sequence[index] >> shift) & SELF_ID_PORT_STATUS_MASK;

drivers/firewire/phy-packet-definitions.h

291

unsigned int index, shift;

drivers/firewire/phy-packet-definitions.h

294

shift = 16 - ((port_index + 5) % 8) * 2;

drivers/firewire/phy-packet-definitions.h

297

self_id_sequence[index] &= ~(SELF_ID_PORT_STATUS_MASK << shift);

drivers/firewire/phy-packet-definitions.h

298

self_id_sequence[index] |= status << shift;

drivers/gpio/gpio-bd72720.c

74

int ret, val, shift;

drivers/gpio/gpio-bd72720.c

80

shift = BD72720_INT_GPIO1_IN_SRC + reg_offset;

drivers/gpio/gpio-bd72720.c

82

return (val >> shift) & 1;

drivers/gpio/gpio-creg-snps.c

111

.shift = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },

drivers/gpio/gpio-creg-snps.c

119

.shift = { 0 },

drivers/gpio/gpio-creg-snps.c

17

u8 shift[MAX_GPIO];

drivers/gpio/gpio-creg-snps.c

40

reg_shift = layout->shift[offset];

drivers/gpio/gpio-creg-snps.c

42

reg_shift += layout->bit_per_gpio[i] + layout->shift[i];

drivers/gpio/gpio-creg-snps.c

99

reg_len += hcg->layout->shift[i] + hcg->layout->bit_per_gpio[i];

drivers/gpio/gpio-cs5535.c

168

uint32_t shift = (offset % 8) * 4;

drivers/gpio/gpio-cs5535.c

185

val &= ~(0xF << shift);

drivers/gpio/gpio-cs5535.c

188

val |= ((pair & 7) << shift);

drivers/gpio/gpio-cs5535.c

192

val |= (1 << (shift + 3));

drivers/gpio/gpio-em.c

126

unsigned int reg, offset, shift;

drivers/gpio/gpio-em.c

139

shift = (offset & 0x07) << 4;

drivers/gpio/gpio-em.c

150

tmp &= ~(0xf << shift);

drivers/gpio/gpio-em.c

151

tmp |= value << shift;

drivers/gpio/gpio-em.c

200

unsigned shift, int value)

drivers/gpio/gpio-em.c

204

(BIT(shift + 16)) | (value << shift));

drivers/gpio/gpio-htc-egpio.c

180

int shift;

drivers/gpio/gpio-htc-egpio.c

189

shift = pos << ei->reg_shift;

drivers/gpio/gpio-htc-egpio.c

192

reg, (egpio->cached_values >> shift) & ei->reg_mask);

drivers/gpio/gpio-htc-egpio.c

199

egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);

drivers/gpio/gpio-htc-egpio.c

233

int shift;

drivers/gpio/gpio-htc-egpio.c

240

for (shift = 0; shift < egpio->chip.ngpio;

drivers/gpio/gpio-htc-egpio.c

241

shift += (1<<ei->reg_shift)) {

drivers/gpio/gpio-htc-egpio.c

243

int reg = egpio->reg_start + egpio_pos(ei, shift);

drivers/gpio/gpio-htc-egpio.c

245

if (!((egpio->is_out >> shift) & ei->reg_mask))

drivers/gpio/gpio-htc-egpio.c

249

(egpio->cached_values >> shift) & ei->reg_mask,

drivers/gpio/gpio-htc-egpio.c

252

egpio_writew((egpio->cached_values >> shift)

drivers/gpio/gpio-lp3943.c

121

read = (read & mux[offset].mask) >> mux[offset].shift;

drivers/gpio/gpio-lp3943.c

72

val << mux[offset].shift);

drivers/gpio/gpio-mpc8xxx.c

213

unsigned int shift;

drivers/gpio/gpio-mpc8xxx.c

218

shift = (15 - gpio) * 2;

drivers/gpio/gpio-mpc8xxx.c

221

shift = (15 - (gpio % 16)) * 2;

drivers/gpio/gpio-mpc8xxx.c

230

reg) & ~(3 << shift))

drivers/gpio/gpio-mpc8xxx.c

231

| (2 << shift));

drivers/gpio/gpio-mpc8xxx.c

240

reg) & ~(3 << shift))

drivers/gpio/gpio-mpc8xxx.c

241

| (1 << shift));

drivers/gpio/gpio-mpc8xxx.c

249

reg) & ~(3 << shift)));

drivers/gpio/gpio-pmic-eic-sprd.c

69

u32 shift = SPRD_PMIC_EIC_BIT(offset);

drivers/gpio/gpio-pmic-eic-sprd.c

72

BIT(shift), val << shift);

drivers/gpio/gpio-realtek-otto.c

172

unsigned int shift = line_shift % 32;

drivers/gpio/gpio-realtek-otto.c

179

reg_val &= ~(REALTEK_GPIO_IMR_LINE_MASK << shift);

drivers/gpio/gpio-realtek-otto.c

180

reg_val |= (irq_type & irq_mask & REALTEK_GPIO_IMR_LINE_MASK) << shift;

drivers/gpio/gpio-rtd.c

220

u8 deb_val, deb_index, reg_offset, shift;

drivers/gpio/gpio-rtd.c

250

deb_val = data->info->get_deb_setval(data->info, offset, deb_index, &reg_offset, &shift);

drivers/gpio/gpio-rtd.c

251

write_en = BIT(shift + 3);

drivers/gpio/gpio-rtd.c

252

val = (deb_val << shift) | write_en;

drivers/gpio/gpio-rtd.c

60

u8 *reg_offset, u8 *shift);

drivers/gpio/gpio-rtd.c

73

u8 deb_index, u8 *reg_offset, u8 *shift)

drivers/gpio/gpio-rtd.c

76

*shift = (offset % 8) * 4;

drivers/gpio/gpio-rtd.c

81

u8 deb_index, u8 *reg_offset, u8 *shift)

drivers/gpio/gpio-rtd.c

84

*shift = (offset % 8) * 4;

drivers/gpio/gpio-rtd.c

89

u8 deb_index, u8 *reg_offset, u8 *shift)

drivers/gpio/gpio-rtd.c

92

*shift = 0;

drivers/gpio/gpio-tangier.c

103

writel(BIT(shift), reg);

drivers/gpio/gpio-tangier.c

113

u8 shift;

drivers/gpio/gpio-tangier.c

115

gpdr = gpio_reg_and_bit(chip, offset, GPDR, &shift);

drivers/gpio/gpio-tangier.c

120

value &= ~BIT(shift);

drivers/gpio/gpio-tangier.c

131

u8 shift;

drivers/gpio/gpio-tangier.c

133

gpdr = gpio_reg_and_bit(chip, offset, GPDR, &shift);

drivers/gpio/gpio-tangier.c

139

value |= BIT(shift);

drivers/gpio/gpio-tangier.c

148

u8 shift;

drivers/gpio/gpio-tangier.c

150

gpdr = gpio_reg_and_bit(chip, offset, GPDR, &shift);

drivers/gpio/gpio-tangier.c

152

if (readl(gpdr) & BIT(shift))

drivers/gpio/gpio-tangier.c

164

u8 shift;

drivers/gpio/gpio-tangier.c

166

gfbr = gpio_reg_and_bit(chip, offset, GFBR, &shift);

drivers/gpio/gpio-tangier.c

172

value &= ~BIT(shift);

drivers/gpio/gpio-tangier.c

174

value |= BIT(shift);

drivers/gpio/gpio-tangier.c

204

u8 shift;

drivers/gpio/gpio-tangier.c

206

gisr = gpio_reg_and_bit(&priv->chip, gpio, GISR, &shift);

drivers/gpio/gpio-tangier.c

210

writel(BIT(shift), gisr);

drivers/gpio/gpio-tangier.c

217

u8 shift;

drivers/gpio/gpio-tangier.c

219

gimr = gpio_reg_and_bit(&priv->chip, gpio, GIMR, &shift);

drivers/gpio/gpio-tangier.c

225

value |= BIT(shift);

drivers/gpio/gpio-tangier.c

227

value &= ~BIT(shift);

drivers/gpio/gpio-tangier.c

260

u8 shift = gpio % 32;

drivers/gpio/gpio-tangier.c

267

value |= BIT(shift);

drivers/gpio/gpio-tangier.c

269

value &= ~BIT(shift);

drivers/gpio/gpio-tangier.c

274

value |= BIT(shift);

drivers/gpio/gpio-tangier.c

276

value &= ~BIT(shift);

drivers/gpio/gpio-tangier.c

285

value |= BIT(shift);

drivers/gpio/gpio-tangier.c

287

value &= ~BIT(shift);

drivers/gpio/gpio-tangier.c

292

value |= BIT(shift);

drivers/gpio/gpio-tangier.c

298

value &= ~BIT(shift);

drivers/gpio/gpio-tangier.c

314

u8 shift = gpio % 32;

drivers/gpio/gpio-tangier.c

322

writel(BIT(shift), gwsr);

drivers/gpio/gpio-tangier.c

326

value |= BIT(shift);

drivers/gpio/gpio-tangier.c

328

value &= ~BIT(shift);

drivers/gpio/gpio-tangier.c

77

u8 shift = offset % 32;

drivers/gpio/gpio-tangier.c

79

*bit = shift;

drivers/gpio/gpio-tangier.c

86

u8 shift;

drivers/gpio/gpio-tangier.c

88

gplr = gpio_reg_and_bit(chip, offset, GPLR, &shift);

drivers/gpio/gpio-tangier.c

90

return !!(readl(gplr) & BIT(shift));

drivers/gpio/gpio-tangier.c

97

u8 shift;

drivers/gpio/gpio-tangier.c

99

reg = gpio_reg_and_bit(chip, offset, value ? GPSR : GPCR, &shift);

drivers/gpio/gpiolib-acpi-core.c

1107

u16 word, shift;

drivers/gpio/gpiolib-acpi-core.c

1168

shift = i % 64;

drivers/gpio/gpiolib-acpi-core.c

1171

gpiod_set_raw_value_cansleep(desc, value[word] & BIT_ULL(shift));

drivers/gpio/gpiolib-acpi-core.c

1174

value[word] |= BIT_ULL(shift);

drivers/gpio/gpiolib-acpi-core.c

1176

value[word] &= ~BIT_ULL(shift);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

205

gpio.shift = pin->ucGpioPinBitShift;

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

567

u32 shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

1510

uint32_t shift = (pos & 0x3) * 8;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

1511

uint32_t mask = 0xffffffff << shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

1523

value |= (*(uint32_t *)buf << shift) & mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

1526

value = (value & mask) >> shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

181

unsigned int mask, shift, idx;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

188

shift = amdgpu_vm_pt_level_shift(adev, cursor->level);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

191

idx = (cursor->pfn >> shift) & mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

211

unsigned int shift, num_entries;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

219

shift = amdgpu_vm_pt_level_shift(adev, cursor->level - 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

226

cursor->pfn += 1ULL << shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

227

cursor->pfn &= ~((1ULL << shift) - 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

79

unsigned int shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

81

shift = amdgpu_vm_pt_level_shift(adev, adev->vm_manager.root_level);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

815

unsigned int shift, parent_shift, mask;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

829

shift = amdgpu_vm_pt_level_shift(adev, cursor.level);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

84

return round_up(adev->vm_manager.max_pfn, 1ULL << shift)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

843

} else if (frag < shift) {

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

85

>> shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

872

shift = parent_shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

874

1ULL << shift));

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

878

incr = (uint64_t)AMDGPU_GPU_PAGE_SIZE << shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

880

pe_start = ((cursor.pfn >> shift) & mask) * 8;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

887

entry_end = 1ULL << shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

889

entry_end = ((uint64_t)mask + 1) << shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

896

unsigned int nptes = (upd_end - frag_start) >> shift;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

921

if (frag < shift)

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

942

} else if (frag >= shift) {

drivers/gpu/drm/amd/amdgpu/atom.c

1000

dst >>= shift;

drivers/gpu/drm/amd/amdgpu/atom.c

250

val = gctx->shift;

drivers/gpu/drm/amd/amdgpu/atom.c

253

val = 1 << gctx->shift;

drivers/gpu/drm/amd/amdgpu/atom.c

256

val = ~(1 << gctx->shift);

drivers/gpu/drm/amd/amdgpu/atom.c

526

gctx->shift = val;

drivers/gpu/drm/amd/amdgpu/atom.c

939

uint8_t attr = U8((*ptr)++), shift;

drivers/gpu/drm/amd/amdgpu/atom.c

946

shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);

drivers/gpu/drm/amd/amdgpu/atom.c

947

SDEBUG(" shift: %d\n", shift);

drivers/gpu/drm/amd/amdgpu/atom.c

948

dst <<= shift;

drivers/gpu/drm/amd/amdgpu/atom.c

955

uint8_t attr = U8((*ptr)++), shift;

drivers/gpu/drm/amd/amdgpu/atom.c

962

shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);

drivers/gpu/drm/amd/amdgpu/atom.c

963

SDEBUG(" shift: %d\n", shift);

drivers/gpu/drm/amd/amdgpu/atom.c

964

dst >>= shift;

drivers/gpu/drm/amd/amdgpu/atom.c

971

uint8_t attr = U8((*ptr)++), shift;

drivers/gpu/drm/amd/amdgpu/atom.c

979

shift = atom_get_src(ctx, attr, ptr);

drivers/gpu/drm/amd/amdgpu/atom.c

980

SDEBUG(" shift: %d\n", shift);

drivers/gpu/drm/amd/amdgpu/atom.c

981

dst <<= shift;

drivers/gpu/drm/amd/amdgpu/atom.c

990

uint8_t attr = U8((*ptr)++), shift;

drivers/gpu/drm/amd/amdgpu/atom.c

998

shift = atom_get_src(ctx, attr, ptr);

drivers/gpu/drm/amd/amdgpu/atom.c

999

SDEBUG(" shift: %d\n", shift);

drivers/gpu/drm/amd/amdgpu/atom.h

144

uint8_t shift;

drivers/gpu/drm/amd/amdgpu/soc15.h

105

#define SOC15_REG_FIELD_VAL(val, mask, shift) (((val) & mask) >> shift)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

169

int shift = (k % 2) ? 0 : 4;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

170

int port_num = (rad[k / 2] >> shift) & 0xf;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

171

int next_port_num = (next_rad[k / 2] >> shift) & 0xf;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

265

int shift = (idx_2 % 2) ? 0 : 4;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

266

int port_num = (aconnector->mst_output_port->parent->rad[idx_2 / 2] >> shift) & 0xf;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

267

int port_num2 = (dm->secure_display_ctx.phy_id_mapping[idx].rad[idx_2 / 2] >> shift) & 0xf;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3314

u8 shift = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3322

res = (val & mask) >> shift;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3345

shift += 16;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3356

u8 shift = 0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3374

res |= (raw << shift);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3375

shift += 16;

drivers/gpu/drm/amd/display/dc/dc_helper.c

102

field_value_mask->value = (field_value_mask->value & ~mask) | (mask & (value << shift));

drivers/gpu/drm/amd/display/dc/dc_helper.c

111

uint32_t shift, mask, field_value;

drivers/gpu/drm/amd/display/dc/dc_helper.c

119

shift = va_arg(ap, uint32_t);

drivers/gpu/drm/amd/display/dc/dc_helper.c

124

field_value, mask, shift);

drivers/gpu/drm/amd/display/dc/dc_helper.c

208

uint32_t mask, uint32_t shift, uint32_t condition_value, uint32_t time_out_us)

drivers/gpu/drm/amd/display/dc/dc_helper.c

216

cmd_buf->reg_wait.condition_field_value = mask & (condition_value << shift);

drivers/gpu/drm/amd/display/dc/dc_helper.c

278

uint8_t shift, uint32_t mask, uint32_t *field_value)

drivers/gpu/drm/amd/display/dc/dc_helper.c

281

*field_value = get_reg_field_value_ex(reg_val, mask, shift);

drivers/gpu/drm/amd/display/dc/dc_helper.c

428

uint32_t addr, uint32_t shift, uint32_t mask, uint32_t condition_value,

drivers/gpu/drm/amd/display/dc/dc_helper.c

438

dmub_reg_wait_done_pack(ctx, addr, mask, shift, condition_value,

drivers/gpu/drm/amd/display/dc/dc_helper.c

461

field_value = get_reg_field_value_ex(reg_val, mask, shift);

drivers/gpu/drm/amd/display/dc/dc_helper.c

511

uint32_t shift, mask, *field_value;

drivers/gpu/drm/amd/display/dc/dc_helper.c

523

shift = va_arg(ap, uint32_t);

drivers/gpu/drm/amd/display/dc/dc_helper.c

527

*field_value = get_reg_field_value_ex(value, mask, shift);

drivers/gpu/drm/amd/display/dc/dc_helper.c

542

uint32_t shift, mask, field_value;

drivers/gpu/drm/amd/display/dc/dc_helper.c

552

shift = va_arg(ap, uint32_t);

drivers/gpu/drm/amd/display/dc/dc_helper.c

556

reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift);

drivers/gpu/drm/amd/display/dc/dc_helper.c

572

uint32_t shift, mask, field_value;

drivers/gpu/drm/amd/display/dc/dc_helper.c

582

shift = va_arg(ap, uint32_t);

drivers/gpu/drm/amd/display/dc/dc_helper.c

586

reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift);

drivers/gpu/drm/amd/display/dc/dc_helper.c

601

uint32_t shift, mask, *field_value;

drivers/gpu/drm/amd/display/dc/dc_helper.c

613

shift = va_arg(ap, uint32_t);

drivers/gpu/drm/amd/display/dc/dc_helper.c

617

*field_value = get_reg_field_value_ex(value, mask, shift);

drivers/gpu/drm/amd/display/dc/dc_helper.c

98

uint8_t shift)

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

51

aux110->shift->field_name, aux110->mask->field_name

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

513

const struct dce110_aux_registers_shift *shift,

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

525

aux_engine110->shift = shift;

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

266

const struct dce110_aux_registers_shift *shift;

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

294

const struct dce110_aux_registers_shift *shift,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

101

int32_t shift = 7;

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

109

write_bit_to_ddc(ddc_handle, SDA, (byte >> shift) & 1);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

120

--shift;

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

121

} while (shift >= 0);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

159

int32_t shift = 7;

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

174

data |= (1 << shift);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

180

--shift;

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c

181

} while (shift >= 0);

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c

276

const struct dce_panel_cntl_shift *shift,

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c

287

dce_panel_cntl->shift = shift;

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c

47

dce_panel_cntl->shift->field_name, dce_panel_cntl->mask->field_name

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

118

const struct dce_panel_cntl_shift *shift;

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

126

const struct dce_panel_cntl_shift *shift,

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c

208

const struct dcn301_panel_cntl_shift *shift,

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c

212

dcn301_panel_cntl->shift = shift;

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.c

46

dcn301_panel_cntl->shift->field_name, dcn301_panel_cntl->mask->field_name

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.h

86

const struct dcn301_panel_cntl_shift *shift;

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.h

94

const struct dcn301_panel_cntl_shift *shift,

drivers/gpu/drm/amd/display/dc/dm_services.h

106

uint8_t shift)

drivers/gpu/drm/amd/display/dc/dm_services.h

109

return (reg_value & ~mask) | (mask & (value << shift));

drivers/gpu/drm/amd/display/dc/dm_services.h

142

uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value,

drivers/gpu/drm/amd/display/dc/dm_services.h

91

uint8_t shift)

drivers/gpu/drm/amd/display/dc/dm_services.h

93

return (mask & reg_value) >> shift;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

331

static bool calculate_first_second_splitting(const int *mcache_boundaries, int num_boundaries, int shift,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

351

range_end = mcache_boundaries[left_cache_id] - shift - 1;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

362

range_start = mcache_boundaries[right_cache_id] - shift;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

396

int *pipe_vp_startx, int *pipe_vp_endx, unsigned int pipe_count, int shift_granularity, int *shift)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

414

for (*shift = 0; *shift <= max_shift; *shift += shift_granularity) {

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

417

if (!calculate_first_second_splitting(mcache_boundaries, num_boundaries, *shift,

drivers/gpu/drm/amd/display/dc/inc/reg_helper.h

392

uint8_t shift, uint32_t mask, uint32_t *field_value);

drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.h

193

static inline struct spl_fixed31_32 spl_fixpt_shl(struct spl_fixed31_32 arg, unsigned int shift)

drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.h

195

SPL_ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) ||

drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.h

196

((arg.value < 0) && (arg.value >= ~(LLONG_MAX >> shift))));

drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.h

198

arg.value = arg.value << shift;

drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.h

207

static inline struct spl_fixed31_32 spl_fixpt_shr(struct spl_fixed31_32 arg, unsigned int shift)

drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.h

213

arg.value = arg.value >> shift;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

178

const struct dmub_srv_common_reg_shift shift;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

179

const struct dmub_srv_dcn31_reg_shift shift;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

55

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

195

struct dmub_srv_dcn32_reg_shift shift;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

53

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

197

struct dmub_srv_dcn35_reg_shift shift;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c

30

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c

30

#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

197

const struct dmub_srv_dcn401_reg_shift shift;

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

104

void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

108

*field_value = get_reg_field_value_ex(reg_val, mask, shift);

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

36

uint32_t value, uint32_t mask, uint8_t shift)

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

39

(field_value_mask->value & ~mask) | (mask & (value << shift));

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

48

uint32_t shift, mask, field_value;

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

56

shift = va_arg(ap, uint32_t);

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

61

shift);

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

67

uint8_t shift)

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.c

69

return (mask & reg_value) >> shift;

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

120

void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,

drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

45

#define FD(reg_field) (REGS)->shift.reg_field, (REGS)->mask.reg_field

drivers/gpu/drm/amd/display/include/fixed31_32.h

210

static inline struct fixed31_32 dc_fixpt_shl(struct fixed31_32 arg, unsigned char shift)

drivers/gpu/drm/amd/display/include/fixed31_32.h

212

ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) ||

drivers/gpu/drm/amd/display/include/fixed31_32.h

213

((arg.value < 0) && (arg.value >= ~(LLONG_MAX >> shift))));

drivers/gpu/drm/amd/display/include/fixed31_32.h

215

arg.value = arg.value << shift;

drivers/gpu/drm/amd/display/include/fixed31_32.h

224

static inline struct fixed31_32 dc_fixpt_shr(struct fixed31_32 arg, unsigned char shift)

drivers/gpu/drm/amd/display/include/fixed31_32.h

230

arg.value = arg.value >> shift;

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

412

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

427

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.h

73

u32 shift;

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2864

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.h

307

u32 shift;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c

115

entry[i].shift, entry[i].val, entry[i].timeout))

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c

45

u32 shift, u32 value, u32 timeout)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c

53

WREG32(reg, value << shift);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c

57

data = (data & (~mask)) | (value << shift);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c

94

entry[i].shift, entry[i].val, entry[i].timeout))

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.h

40

uint32_t shift;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.h

52

uint32_t shift;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.h

49

uint32_t shift;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

908

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

929

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

102

original_data |= (field << shift);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

93

u32 shift = 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

95

shift = (offset % 4) << 3;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

97

mask = 0xFF << shift;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

99

mask = 0xFFFF << shift;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

760

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

766

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

772

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

792

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.h

48

uint32_t shift;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.h

56

uint32_t shift;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

298

int shift = (lane & 1) * 4;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

301

return (link_value >> shift) & 0xf;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

339

int shift = (lane & 1) * 4;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

342

return (link_value >> shift) & 0x3;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

349

int shift = (lane & 1) * 4;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

352

return ((link_value >> shift) & 0xc) >> 2;

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

257

u8 shift, u8 mask)

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

259

hdmi_modb(hdmi, data << shift, mask, reg);

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1856

int shift = offset * 2;

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1863

SN_GPIO_MUX_MASK << shift,

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1864

SN_GPIO_MUX_INPUT << shift);

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1884

int shift = offset * 2;

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1897

SN_GPIO_MUX_MASK << shift,

drivers/gpu/drm/bridge/ti-sn65dsi86.c

1898

SN_GPIO_MUX_OUTPUT << shift);

drivers/gpu/drm/display/drm_dp_mst_topology.c

179

int shift = (lct % 2) ? 0 : 4;

drivers/gpu/drm/display/drm_dp_mst_topology.c

186

ufp_num = (rad[idx] >> shift) & 0xf;

drivers/gpu/drm/display/drm_dp_mst_topology.c

2039

int shift = 4;

drivers/gpu/drm/display/drm_dp_mst_topology.c

2044

shift = (parent_lct % 2) ? 4 : 0;

drivers/gpu/drm/display/drm_dp_mst_topology.c

2048

rad[idx] |= port->port_num << shift;

drivers/gpu/drm/display/drm_dp_mst_topology.c

2222

int shift = (i % 2) ? 0 : 4;

drivers/gpu/drm/display/drm_dp_mst_topology.c

2223

int port_num = (mstb->rad[i / 2] >> shift) & 0xf;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

121

unsigned int shift = ctx->data->shadowcon_win_protect_shift;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

123

bits = SHADOWCON_WINx_PROTECT(shift, win);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

309

unsigned int shift = ctx->data->wincon_burstlen_shift;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

317

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

321

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

325

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

329

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

333

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

338

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

343

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

348

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

354

val |= WINCONx_BURSTLEN_16WORD(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

370

val &= ~WINCONx_BURSTLEN_MASK(shift);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

371

val |= WINCONx_BURSTLEN_8WORD(shift);

drivers/gpu/drm/i915/gt/gen8_ppgtt.c

150

const int shift = gen8_pd_shift(lvl);

drivers/gpu/drm/i915/gt/gen8_ppgtt.c

156

*idx = i915_pde_index(start, shift);

drivers/gpu/drm/i915/gt/gen8_ppgtt.c

160

return i915_pde_index(end, shift) - *idx;

drivers/gpu/drm/i915/gt/gen8_ppgtt.c

182

unsigned int shift = __gen8_pte_shift(vm->top);

drivers/gpu/drm/i915/gt/gen8_ppgtt.c

184

return (vm->total + (1ull << shift) - 1) >> shift;

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3495

unsigned int shift = 0;

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3506

shift = irq_shifts[engine->id];

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3509

engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT << shift;

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3510

engine->irq_keep_mask = GT_CONTEXT_SWITCH_INTERRUPT << shift;

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3511

engine->irq_keep_mask |= GT_CS_MASTER_ERROR_INTERRUPT << shift;

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

3512

engine->irq_keep_mask |= GT_WAIT_SEMAPHORE_INTERRUPT << shift;

drivers/gpu/drm/i915/gt/intel_gtt.h

559

static inline u32 i915_pde_index(u64 addr, u32 shift)

drivers/gpu/drm/i915/gt/intel_gtt.h

561

return (addr >> shift) & I915_PDE_MASK;

drivers/gpu/drm/i915/gt/intel_ppgtt.c

217

static unsigned long pd_count(u64 size, int shift)

drivers/gpu/drm/i915/gt/intel_ppgtt.c

220

return (size + 2 * (BIT_ULL(shift) - 1)) >> shift;

drivers/gpu/drm/i915/gt/intel_ppgtt.c

228

int shift, n, pt_sz;

drivers/gpu/drm/i915/gt/intel_ppgtt.c

230

shift = vm->pd_shift;

drivers/gpu/drm/i915/gt/intel_ppgtt.c

231

if (!shift)

drivers/gpu/drm/i915/gt/intel_ppgtt.c

242

count = pd_count(size, shift);

drivers/gpu/drm/i915/gt/intel_ppgtt.c

257

shift += ilog2(I915_PDES); /* Each PD holds 512 entries */

drivers/gpu/drm/i915/gt/intel_ppgtt.c

258

count = pd_count(size, shift);

drivers/gpu/drm/i915/gt/uc/intel_guc.h

278

u32 shift;

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

1306

MISC_STATUS1) >> guc->timestamp.shift;

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

2175

guc->timestamp.shift = gpm_timestamp_shift(gt);

drivers/gpu/drm/i915/i915_perf.c

3200

u32 reg, shift;

drivers/gpu/drm/i915/i915_perf.c

3205

shift = REG_FIELD_GET(GEN10_RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK,

drivers/gpu/drm/i915/i915_perf.c

3208

return to_gt(i915)->clock_frequency << (3 - shift);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

194

mux << lvds_mux->shift);

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

296

mux >>= lvds_mux->shift;

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

453

.shift = 6,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

457

.shift = 8,

drivers/gpu/drm/imx/ipuv3/imx-ldb.c

78

int shift;

drivers/gpu/drm/mediatek/mtk_dp.c

1202

cal_data[i] = (buf[fmt->idx] >> fmt->shift) & fmt->mask;

drivers/gpu/drm/mediatek/mtk_dp.c

151

.shift = 10,

drivers/gpu/drm/mediatek/mtk_dp.c

1546

int shift = lane % 2 ? DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT : 0;

drivers/gpu/drm/mediatek/mtk_dp.c

1548

swing = (dpcd_adjust_req[index] >> shift) &

drivers/gpu/drm/mediatek/mtk_dp.c

1550

preemphasis = ((dpcd_adjust_req[index] >> shift) &

drivers/gpu/drm/mediatek/mtk_dp.c

159

.shift = 15,

drivers/gpu/drm/mediatek/mtk_dp.c

167

.shift = 0,

drivers/gpu/drm/mediatek/mtk_dp.c

175

.shift = 8,

drivers/gpu/drm/mediatek/mtk_dp.c

183

.shift = 16,

drivers/gpu/drm/mediatek/mtk_dp.c

191

.shift = 24,

drivers/gpu/drm/mediatek/mtk_dp.c

199

.shift = 4,

drivers/gpu/drm/mediatek/mtk_dp.c

207

.shift = 12,

drivers/gpu/drm/mediatek/mtk_dp.c

215

.shift = 20,

drivers/gpu/drm/mediatek/mtk_dp.c

223

.shift = 28,

drivers/gpu/drm/mediatek/mtk_dp.c

234

.shift = 27,

drivers/gpu/drm/mediatek/mtk_dp.c

242

.shift = 9,

drivers/gpu/drm/mediatek/mtk_dp.c

250

.shift = 28,

drivers/gpu/drm/mediatek/mtk_dp.c

258

.shift = 20,

drivers/gpu/drm/mediatek/mtk_dp.c

266

.shift = 12,

drivers/gpu/drm/mediatek/mtk_dp.c

274

.shift = 4,

drivers/gpu/drm/mediatek/mtk_dp.c

282

.shift = 24,

drivers/gpu/drm/mediatek/mtk_dp.c

290

.shift = 16,

drivers/gpu/drm/mediatek/mtk_dp.c

298

.shift = 8,

drivers/gpu/drm/mediatek/mtk_dp.c

306

.shift = 0,

drivers/gpu/drm/mediatek/mtk_dp.c

317

.shift = 27,

drivers/gpu/drm/mediatek/mtk_dp.c

325

.shift = 13,

drivers/gpu/drm/mediatek/mtk_dp.c

333

.shift = 28,

drivers/gpu/drm/mediatek/mtk_dp.c

341

.shift = 20,

drivers/gpu/drm/mediatek/mtk_dp.c

349

.shift = 12,

drivers/gpu/drm/mediatek/mtk_dp.c

357

.shift = 4,

drivers/gpu/drm/mediatek/mtk_dp.c

365

.shift = 24,

drivers/gpu/drm/mediatek/mtk_dp.c

373

.shift = 16,

drivers/gpu/drm/mediatek/mtk_dp.c

381

.shift = 8,

drivers/gpu/drm/mediatek/mtk_dp.c

389

.shift = 0,

drivers/gpu/drm/mediatek/mtk_dp.c

776

u32 shift;

drivers/gpu/drm/mediatek/mtk_dp.c

782

shift = (MTK_DP_ENC0_P0_30A8 & 3) * 8;

drivers/gpu/drm/mediatek/mtk_dp.c

787

0x05 << shift, 0xff << shift);

drivers/gpu/drm/mediatek/mtk_dp.c

94

unsigned short shift;

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

164

int shift;

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

169

shift = (i - 5) * 8;

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

172

shift = (i - 1) * 8;

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

176

0xff << shift,

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

177

shift);

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

83

unsigned int mask, unsigned int shift,

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

90

tmp |= (val << shift) & mask;

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

96

unsigned int shift)

drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c

98

return (readl(ddc->regs + offset) & mask) >> shift;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

483

int idx, shift, ext_shift;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

552

mixercfg[0] |= mix << cfg->shift;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

555

mixercfg[cfg->idx] |= mix_ext << cfg->shift;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

610

u8 shift = postdiv->shift;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

616

val = readl(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0) >> shift;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

641

u8 shift = postdiv->shift;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

656

val &= ~(div_mask(width) << shift);

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

658

val |= value << shift;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

771

u8 shift)

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

789

pll_postdiv->shift = shift;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

96

u8 shift;

drivers/gpu/drm/msm/msm_gem_submit.c

501

if (submit_reloc.shift < 0)

drivers/gpu/drm/msm/msm_gem_submit.c

502

iova >>= -submit_reloc.shift;

drivers/gpu/drm/msm/msm_gem_submit.c

504

iova <<= submit_reloc.shift;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

238

int shift = (nv04_display(dev)->saved_reg.sel_clk & 0x50) ? 0 : 1;

drivers/gpu/drm/nouveau/dispnv04/dfp.c

241

state->sel_clk |= (head ? 0x40 : 0x10) << shift;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

130

unsigned shift = drm->client.device.info.chipset >= 0x30 ? 1 : 3;

drivers/gpu/drm/nouveau/dispnv04/overlay.c

140

ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h);

drivers/gpu/drm/nouveau/dispnv04/overlay.c

93

verify_scaling(const struct drm_framebuffer *fb, uint8_t shift,

drivers/gpu/drm/nouveau/dispnv04/overlay.c

97

if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) {

drivers/gpu/drm/nouveau/include/nvif/if000c.h

29

__u8 shift;

drivers/gpu/drm/nouveau/include/nvif/if000c.h

83

__u8 shift;

drivers/gpu/drm/nouveau/include/nvif/vmm.h

30

u8 shift;

drivers/gpu/drm/nouveau/include/nvif/vmm.h

50

int nvif_vmm_raw_get(struct nvif_vmm *vmm, u64 addr, u64 size, u8 shift);

drivers/gpu/drm/nouveau/include/nvif/vmm.h

51

int nvif_vmm_raw_put(struct nvif_vmm *vmm, u64 addr, u64 size, u8 shift);

drivers/gpu/drm/nouveau/include/nvif/vmm.h

52

int nvif_vmm_raw_map(struct nvif_vmm *vmm, u64 addr, u64 size, u8 shift,

drivers/gpu/drm/nouveau/include/nvif/vmm.h

55

u8 shift, bool sparse);

drivers/gpu/drm/nouveau/nouveau_bo.c

282

(!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))

drivers/gpu/drm/nouveau/nouveau_bo.c

293

if (*size >= 1ULL << vmm->page[i].shift)

drivers/gpu/drm/nouveau/nouveau_bo.c

308

nvbo->page = vmm->page[pi].shift;

drivers/gpu/drm/nouveau/nouveau_bo.c

322

(!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))

drivers/gpu/drm/nouveau/nouveau_bo.c

329

if (*size >= 1ULL << vmm->page[i].shift)

drivers/gpu/drm/nouveau/nouveau_bo.c

336

nvbo->page = vmm->page[pi].shift;

drivers/gpu/drm/nouveau/nouveau_uvmm.c

490

if (vmm->page[i].shift >= nvbo->page)

drivers/gpu/drm/nouveau/nouveau_uvmm.c

497

(!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))

drivers/gpu/drm/nouveau/nouveau_uvmm.c

501

if (op_map_aligned_to_page_shift(op, vmm->page[i].shift))

drivers/gpu/drm/nouveau/nouveau_uvmm.c

502

return vmm->page[i].shift;

drivers/gpu/drm/nouveau/nvif/vmm.c

109

u8 shift)

drivers/gpu/drm/nouveau/nvif/vmm.c

116

.shift = shift,

drivers/gpu/drm/nouveau/nvif/vmm.c

124

nvif_vmm_raw_put(struct nvif_vmm *vmm, u64 addr, u64 size, u8 shift)

drivers/gpu/drm/nouveau/nvif/vmm.c

131

.shift = shift,

drivers/gpu/drm/nouveau/nvif/vmm.c

139

nvif_vmm_raw_map(struct nvif_vmm *vmm, u64 addr, u64 size, u8 shift,

drivers/gpu/drm/nouveau/nvif/vmm.c

147

.shift = shift,

drivers/gpu/drm/nouveau/nvif/vmm.c

161

u8 shift, bool sparse)

drivers/gpu/drm/nouveau/nvif/vmm.c

168

.shift = shift,

drivers/gpu/drm/nouveau/nvif/vmm.c

251

vmm->page[i].shift = args.shift;

drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c

68

const u32 shift = sor->func->dp->lanes[ln] * 8;

drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c

71

data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c

72

data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c

77

nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift));

drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c

78

nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift));

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

133

const u32 shift = sor->func->dp->lanes[ln] * 8;

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

136

data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

137

data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

142

nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift));

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

143

nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift));

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

146

data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

147

nvkm_wr32(device, 0x61c13c + loff, data[3] | (pc << shift));

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

38

const u32 shift = sor->func->dp->lanes[ln] * 8;

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

43

data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

44

data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

49

nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift));

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

50

nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift));

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

53

data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c

54

nvkm_wr32(device, 0x61c13c + loff, data[3] | (pc << shift));

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

216

const u32 shift = normal ? 0 : 16;

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

217

const u32 state = 0x80000000 | (0x00000001 * !!pu) << shift;

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

218

const u32 field = 0x80000000 | (0x00000001 << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

317

const u32 shift = normal ? 0 : 16;

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

321

0x00000001 * ! hsync) << shift;

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

322

const u32 field = 0xc0000000 | (0x00000055 << shift);

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

84

const u32 shift = normal ? 0 : 16;

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

85

const u32 state = 0x80000000 | (0x00000001 * !!pu) << shift;

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

86

const u32 field = 0x80000000 | (0x00000101 << shift);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

1097

u8 shift, ntpcv;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

1105

shift = 0;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

1109

shift++;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

1113

data2[0] |= (shift << 21);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

202

u8 shift, ntpcv;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

210

shift = 0;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

214

shift++;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

218

data2[0] |= (shift << 21);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1419

u8 shift = nvbios_rd08(bios, init->offset + 5);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1428

dreg, dmask, sreg, (shift & 0x80) ? "<<" : ">>",

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1429

(shift & 0x80) ? (0x100 - shift) : shift, smask, sxor);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

1432

data = init_shift(init_rd32(init, sreg), shift);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

2066

u8 shift = nvbios_rd08(bios, init->offset + 16);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

2072

(sshift & 0x80) ? (0x100 - sshift) : sshift, smask, shift);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

2076

data = init_xlat_(init, index, data) << shift;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

520

u8 shift = nvbios_rd08(bios, table + (cond * 9) + 4);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

524

u8 ioval = (init_rdvgai(init, port, index) & mask) >> shift;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

531

init_shift(u32 data, u8 shift)

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

533

if (shift < 0x80)

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

534

return data >> shift;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

535

return data << (0x100 - shift);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

627

u8 shift = nvbios_rd08(bios, init->offset + 5);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

634

reg, port, index, mask, shift);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

637

conf = (init_rdvgai(init, port, index) & mask) >> shift;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

690

u8 shift = nvbios_rd08(bios, init->offset + 5);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

698

reg, port, index, mask, shift, iofc);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

701

conf = (init_rdvgai(init, port, index) & mask) >> shift;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

744

u8 shift = nvbios_rd08(bios, init->offset + 5);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

753

port, index, mask, reg, (shift & 0x80) ? "<<" : ">>",

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

754

(shift & 0x80) ? (0x100 - shift) : shift, smask);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

758

data |= init_shift(init_rd32(init, reg), shift) & smask;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

956

u8 shift = nvbios_rd08(bios, init->offset + 5);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

963

reg, port, index, mask, shift);

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c

966

conf = (init_rdvgai(init, port, index) & mask) >> shift;

drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c

169

u8 shift = 0, usec = nsec / 1000;

drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c

172

shift++;

drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c

176

hwsq_cmd(hwsq, 1, (u8[]){ 0x00 | (shift << 2) | usec });

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

115

int shift = -4;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

118

return shift;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

122

shift += 4; fallthrough;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

124

shift += 4; fallthrough;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

126

shift += 4; fallthrough;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

128

shift += 4;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

135

if (shift > 4 && (chip_version < 0x32 || chip_version == 0x35 ||

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

137

shift = -4;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

139

return shift;

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

58

nv50_gpio_location(int line, u32 *reg, u32 *shift)

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

66

*shift = (line & 7) << 2;

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

74

u32 reg, shift;

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

76

if (nv50_gpio_location(line, &reg, &shift))

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

79

nvkm_mask(device, reg, 3 << shift, (((dir ^ 1) << 1) | out) << shift);

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

87

u32 reg, shift;

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

89

if (nv50_gpio_location(line, &reg, &shift))

drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c

92

return !!(nvkm_rd32(device, reg) & (4 << shift));

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c

77

WARN_ON(r535_bar_bar2_update_pde(gsp, vmm->func->page[0].shift, 0));

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c

97

WARN_ON(r535_bar_bar2_update_pde(gsp, vmm->func->page[0].shift, pdbe));

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c

84

for (page = vmm->func->page; page->shift; page++) {

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c

85

if (page->shift == page_shift)

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c

89

if (WARN_ON(!page->shift))

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c

107

pt->base = slot << ptp->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c

36

u8 shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c

44

const int slot = pt->base >> pt->ptp->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c

89

ptp->shift = order_base_2(size);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c

90

slot = nvkm_memory_size(ptp->pt->memory) >> ptp->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

312

for (nr = 0; page[nr].shift; nr++);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

318

args->v0.shift = page[index].shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

330

nvkm_uvmm_page_index(struct nvkm_uvmm *uvmm, u64 size, u8 shift, u8 *refd)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

335

if (likely(shift)) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

336

for (page = vmm->func->page; page->shift; page++) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

337

if (shift == page->shift)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

341

if (!page->shift || !IS_ALIGNED(size, 1ULL << page->shift)) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

342

VMM_DEBUG(vmm, "page %d %016llx", shift, size);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

363

ret = nvkm_uvmm_page_index(uvmm, args->size, args->shift, &refd);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

380

ret = nvkm_uvmm_page_index(uvmm, args->size, args->shift, &refd);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

411

ret = nvkm_uvmm_page_index(uvmm, args->size, args->shift, &refd);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

440

ret = nvkm_uvmm_page_index(uvmm, args->size, args->shift, &refd);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.c

583

while (page && (page++)->shift)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1072

while (page[1].shift)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1134

while (page[1].shift)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1143

bits += page->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1294

nvkm_vmm_pfn_map(struct nvkm_vmm *vmm, u8 shift, u64 addr, u64 size, u64 *pfn)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1300

int pm = size >> shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1306

while (page->shift && (page->shift != shift ||

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1310

if (!page->shift || !IS_ALIGNED(addr, 1ULL << shift) ||

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1311

!IS_ALIGNED(size, 1ULL << shift) ||

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1314

shift, page->shift, addr, size);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1335

size = min_t(u64, size, pn << page->shift);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1406

size -= 1 << page->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1409

pi += size >> page->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1465

VMM_DEBUG(vmm, "%d !VRAM", map->page->shift);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1472

VMM_DEBUG(vmm, "%d !HOST", map->page->shift);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1481

if (!IS_ALIGNED( vma->addr, 1ULL << map->page->shift) ||

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1482

!IS_ALIGNED((u64)vma->size, 1ULL << map->page->shift) ||

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1483

!IS_ALIGNED( map->offset, 1ULL << map->page->shift) ||

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1484

nvkm_memory_page(map->memory) < map->page->shift) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1486

vma->addr, (u64)vma->size, map->offset, map->page->shift,

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1498

for (map->page = vmm->func->page; map->page->shift; map->page++) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1499

VMM_DEBUG(vmm, "trying %d", map->page->shift);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1726

u8 shift, u8 align, u64 size, struct nvkm_vma **pvma)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1736

getref, mapref, sparse, shift, align, size);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1751

if (unlikely((getref || vmm->func->page_block) && !shift)) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1760

if (shift) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1761

for (page = vmm->func->page; page->shift; page++) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1762

if (shift == page->shift)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1766

if (!page->shift || !IS_ALIGNED(size, 1ULL << page->shift)) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1767

VMM_DEBUG(vmm, "page %d %016llx", shift, size);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1770

align = max_t(u8, align, shift);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

1950

while (page[1].shift)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

533

u64 bits = addr >> page->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

538

it.cnt = size >> page->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

551

addr, size, page->shift, it.cnt);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

58

pgt->page = page ? page->shift : 0;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

622

return addr << page->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

663

while (size < (1ULL << page[m].shift))

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

668

while (!IS_ALIGNED(addr, 1ULL << page[i].shift))

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

674

u64 next = 1ULL << page[i - 1].shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

677

block = (part >> page[i].shift) << page[i].shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

679

block = (size >> page[i].shift) << page[i].shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c

681

block = (size >> page[i].shift) << page[i].shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h

127

u8 shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h

329

u64 _ptes = ((SIZE) - MAP->off) >> MAP->page->shift; \

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h

333

MAP->off += PTEN << MAP->page->shift; \

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c

253

map->next = (1 << page->shift) >> 8;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c

283

u32 comp = (page->shift == 16 && !gm20x) ? 16 : 17;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c

302

if (page->shift == 17 || !gm20x) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c

68

if (map->page->shift == PAGE_SHIFT) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgh100.c

233

map->next = 1ULL << page->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgh100.c

35

if (map->page->shift == PAGE_SHIFT) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.c

98

if (vmm->func->page[1].shift == 16)

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c

157

if (map->page->shift == PAGE_SHIFT) {

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c

436

map->next = (1ULL << page->shift) >> 4;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c

481

map->ctag = gp100_vmm_pte_comptagline_incr(1 << map->page->shift);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c

242

map->next = 1 << page->shift;

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c

68

if (map->page->shift == PAGE_SHIFT) {

drivers/gpu/drm/omapdrm/dss/dispc.c

1008

int shift;

drivers/gpu/drm/omapdrm/dss/dispc.c

1013

shift = shifts[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

1014

REG_FLD_MOD(dispc, DISPC_GLOBAL_ALPHA, global_alpha, shift + 7, shift);

drivers/gpu/drm/omapdrm/dss/dispc.c

1119

int shift;

drivers/gpu/drm/omapdrm/dss/dispc.c

1125

shift = 8;

drivers/gpu/drm/omapdrm/dss/dispc.c

1130

shift = 16;

drivers/gpu/drm/omapdrm/dss/dispc.c

1170

val = FLD_MOD(val, chan, shift, shift);

drivers/gpu/drm/omapdrm/dss/dispc.c

1173

val = FLD_MOD(val, channel, shift, shift);

drivers/gpu/drm/omapdrm/dss/dispc.c

1181

int shift;

drivers/gpu/drm/omapdrm/dss/dispc.c

1186

shift = 8;

drivers/gpu/drm/omapdrm/dss/dispc.c

1191

shift = 16;

drivers/gpu/drm/omapdrm/dss/dispc.c

1200

if (FLD_GET(val, shift, shift) == 1)

drivers/gpu/drm/omapdrm/dss/dispc.c

1224

int shift;

drivers/gpu/drm/omapdrm/dss/dispc.c

1226

shift = shifts[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

1228

shift + 1, shift);

drivers/gpu/drm/omapdrm/dss/dispc.c

1320

int shift;

drivers/gpu/drm/omapdrm/dss/dispc.c

1325

shift = shifts[plane];

drivers/gpu/drm/omapdrm/dss/dispc.c

1326

REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift);

drivers/gpu/drm/omapdrm/dss/dss.c

149

unsigned int shift;

drivers/gpu/drm/omapdrm/dss/dss.c

159

shift = 0;

drivers/gpu/drm/omapdrm/dss/dss.c

162

shift = 1;

drivers/gpu/drm/omapdrm/dss/dss.c

165

shift = 2;

drivers/gpu/drm/omapdrm/dss/dss.c

174

1 << shift, val << shift);

drivers/gpu/drm/omapdrm/dss/dss.c

181

unsigned int shift, val;

drivers/gpu/drm/omapdrm/dss/dss.c

188

shift = 3;

drivers/gpu/drm/omapdrm/dss/dss.c

202

shift = 5;

drivers/gpu/drm/omapdrm/dss/dss.c

218

shift = 7;

drivers/gpu/drm/omapdrm/dss/dss.c

239

0x3 << shift, val << shift);

drivers/gpu/drm/omapdrm/dss/hdmi.h

206

u8 shift;

drivers/gpu/drm/omapdrm/dss/hdmi4_core.c

551

r = FLD_MOD(r, cfg->i2s_cfg.shift, 0, 0);

drivers/gpu/drm/omapdrm/dss/hdmi4_core.c

671

acore.i2s_cfg.shift = HDMI_AUDIO_I2S_FIRST_BIT_SHIFT;

drivers/gpu/drm/radeon/atom.c

248

val = gctx->shift;

drivers/gpu/drm/radeon/atom.c

251

val = 1 << gctx->shift;

drivers/gpu/drm/radeon/atom.c

254

val = ~(1 << gctx->shift);

drivers/gpu/drm/radeon/atom.c

525

gctx->shift = val;

drivers/gpu/drm/radeon/atom.c

902

uint8_t attr = U8((*ptr)++), shift;

drivers/gpu/drm/radeon/atom.c

909

shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);

drivers/gpu/drm/radeon/atom.c

910

SDEBUG(" shift: %d\n", shift);

drivers/gpu/drm/radeon/atom.c

911

dst <<= shift;

drivers/gpu/drm/radeon/atom.c

918

uint8_t attr = U8((*ptr)++), shift;

drivers/gpu/drm/radeon/atom.c

925

shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);

drivers/gpu/drm/radeon/atom.c

926

SDEBUG(" shift: %d\n", shift);

drivers/gpu/drm/radeon/atom.c

927

dst >>= shift;

drivers/gpu/drm/radeon/atom.c

934

uint8_t attr = U8((*ptr)++), shift;

drivers/gpu/drm/radeon/atom.c

942

shift = atom_get_src(ctx, attr, ptr);

drivers/gpu/drm/radeon/atom.c

943

SDEBUG(" shift: %d\n", shift);

drivers/gpu/drm/radeon/atom.c

944

dst <<= shift;

drivers/gpu/drm/radeon/atom.c

953

uint8_t attr = U8((*ptr)++), shift;

drivers/gpu/drm/radeon/atom.c

961

shift = atom_get_src(ctx, attr, ptr);

drivers/gpu/drm/radeon/atom.c

962

SDEBUG(" shift: %d\n", shift);

drivers/gpu/drm/radeon/atom.c

963

dst >>= shift;

drivers/gpu/drm/radeon/atom.h

138

uint8_t shift;

drivers/gpu/drm/radeon/ci_dpm.c

550

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/radeon/ci_dpm.c

565

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/radeon/ci_dpm.c

5783

dpm_table->VRHotGpio = gpio.shift;

drivers/gpu/drm/radeon/ci_dpm.c

5792

dpm_table->AcDcGpio = gpio.shift;

drivers/gpu/drm/radeon/ci_dpm.c

5803

switch (gpio.shift) {

drivers/gpu/drm/radeon/ci_dpm.c

5822

DRM_DEBUG("Invalid PCC GPIO: %u!\n", gpio.shift);

drivers/gpu/drm/radeon/ci_dpm.h

169

u32 shift;

drivers/gpu/drm/radeon/kv_dpm.c

169

cache |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/radeon/kv_dpm.c

184

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/radeon/kv_dpm.h

47

u32 shift;

drivers/gpu/drm/radeon/radeon_atombios.c

223

gpio.shift = pin->ucGpioPinBitShift;

drivers/gpu/drm/radeon/radeon_combios.c

3082

uint32_t val, shift, tmp;

drivers/gpu/drm/radeon/radeon_combios.c

3093

shift = RBIOS8(offset) * 8;

drivers/gpu/drm/radeon/radeon_combios.c

3095

and_mask = RBIOS8(offset) << shift;

drivers/gpu/drm/radeon/radeon_combios.c

3096

and_mask |= ~(0xff << shift);

drivers/gpu/drm/radeon/radeon_combios.c

3098

or_mask = RBIOS8(offset) << shift;

drivers/gpu/drm/radeon/radeon_mode.h

482

u32 shift;

drivers/gpu/drm/radeon/si_dpm.c

2694

data |= ((config_regs->value << config_regs->shift) & config_regs->mask);

drivers/gpu/drm/radeon/si_dpm.h

38

u32 shift;

drivers/gpu/drm/radeon/sumo_smc.c

166

u32 shift = 0;

drivers/gpu/drm/radeon/sumo_smc.c

173

shift = 16;

drivers/gpu/drm/radeon/sumo_smc.c

177

shift = 0;

drivers/gpu/drm/radeon/sumo_smc.c

181

shift = 16;

drivers/gpu/drm/radeon/sumo_smc.c

185

shift = 0;

drivers/gpu/drm/radeon/sumo_smc.c

189

shift = 16;

drivers/gpu/drm/radeon/sumo_smc.c

193

shift = 0;

drivers/gpu/drm/radeon/sumo_smc.c

200

sclk_dpm_tdp_limit &= ~(mask << shift);

drivers/gpu/drm/radeon/sumo_smc.c

201

sclk_dpm_tdp_limit |= (tdp_limit << shift);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

199

return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

206

int offset, mask, shift;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

215

shift = reg->shift;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

218

v = ((v << shift) & 0xffff) | (mask << (shift + 16));

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

222

v = (cached_val & ~(mask << shift)) | ((v & mask) << shift);

drivers/gpu/drm/rockchip/rockchip_drm_vop.h

356

static inline uint16_t scl_cal_scale(int src, int dst, int shift)

drivers/gpu/drm/rockchip/rockchip_drm_vop.h

358

return ((src * 2 - 3) << (shift - 1)) / (dst - 1);

drivers/gpu/drm/rockchip/rockchip_drm_vop.h

53

uint8_t shift;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

522

int shift;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

534

shift = 12;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

536

shift = 16;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

541

fac = DIV_ROUND_UP(src << shift, dst) - 1;

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

25

.shift = _shift, \

drivers/gpu/drm/sprd/sprd_dsi.c

137

u32 shift)

drivers/gpu/drm/sprd/sprd_dsi.c

139

return (readl(ctx->base + offset) & mask) >> shift;

drivers/gpu/drm/sprd/sprd_dsi.c

144

u32 shift, u32 val)

drivers/gpu/drm/sprd/sprd_dsi.c

150

ret |= (val << shift) & mask;

drivers/gpu/drm/sun4i/sun4i_tcon.c

1344

u32 shift;

drivers/gpu/drm/sun4i/sun4i_tcon.c

1352

shift = 8;

drivers/gpu/drm/sun4i/sun4i_tcon.c

1359

0x3 << shift, tcon->id << shift);

drivers/gpu/drm/sun4i/sun4i_tcon.c

1384

u32 shift;

drivers/gpu/drm/sun4i/sun4i_tcon.c

1392

shift = 8;

drivers/gpu/drm/sun4i/sun4i_tcon.c

1400

0x3 << shift, tcon->id << shift);

drivers/gpu/drm/tegra/drm.c

1049

size >> tegra->carveout.shift,

drivers/gpu/drm/tegra/drm.c

1219

tegra->carveout.shift = iova_shift(&tegra->carveout.domain);

drivers/gpu/drm/tegra/drm.c

1220

tegra->carveout.limit = carveout_end >> tegra->carveout.shift;

drivers/gpu/drm/tegra/drm.c

151

err = get_user(dest->shift, &src->shift);

drivers/gpu/drm/tegra/drm.h

44

unsigned long shift;

drivers/gpu/drm/tegra/sor.c

817

u8 shift = sor->soc->lane_map[i] << 3;

drivers/gpu/drm/tegra/sor.c

819

voltage_swing |= soc->voltage_swing[pc][vs][pe] << shift;

drivers/gpu/drm/tegra/sor.c

820

pre_emphasis |= soc->pre_emphasis[pc][vs][pe] << shift;

drivers/gpu/drm/tegra/sor.c

821

post_cursor |= soc->post_cursor[pc][vs][pe] << shift;

drivers/gpu/drm/tegra/submit.c

240

written_ptr = iova >> buf->reloc.shift;

drivers/gpu/drm/xe/xe_ggtt.c

629

void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift)

drivers/gpu/drm/xe/xe_ggtt.c

639

xe_ggtt_assert_fit(ggtt, node->start + shift, node->size);

drivers/gpu/drm/xe/xe_ggtt.c

648

node->start += shift;

drivers/gpu/drm/xe/xe_ggtt.h

25

void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

494

s64 shift;

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

522

shift = start - (s64)xe_tile_sriov_vf_ggtt_base(tile);

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

526

if (shift && shift != start) {

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

528

shift, start);

drivers/gpu/drm/xe/xe_gt_sriov_vf.c

529

xe_tile_sriov_vf_fixup_ggtt_nodes_locked(gt_to_tile(gt), shift);

drivers/gpu/drm/xe/xe_oa.c

1917

u32 reg, shift;

drivers/gpu/drm/xe/xe_oa.c

1924

shift = REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, reg);

drivers/gpu/drm/xe/xe_oa.c

1925

return gt->info.reference_clock << (3 - shift);

drivers/gpu/drm/xe/xe_pt.c

1558

unsigned int shift = walk->shifts[level];

drivers/gpu/drm/xe/xe_pt.c

1559

u64 size = 1ull << shift;

drivers/gpu/drm/xe/xe_pt.c

1562

((next - addr) >> shift) == child->num_live) {

drivers/gpu/drm/xe/xe_pt.c

1934

int shift = xe_device_get_root_tile(xe)->media_gt ? 1 : 0;

drivers/gpu/drm/xe/xe_pt.c

1938

xe->info.tile_count << shift);

drivers/gpu/drm/xe/xe_pt.c

2287

int shift = tile->media_gt ? 1 : 0;

drivers/gpu/drm/xe/xe_pt.c

2296

tile_to_xe(tile)->info.tile_count << shift);

drivers/gpu/drm/xe/xe_pt_walk.c

43

unsigned int shift = walk->shifts[level];

drivers/gpu/drm/xe/xe_pt_walk.c

44

u64 skip_to = round_down(end, 1ull << shift);

drivers/gpu/drm/xe/xe_pt_walk.c

47

step += (skip_to - next) >> shift;

drivers/gpu/drm/xe/xe_tile_sriov_vf.c

242

void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift)

drivers/gpu/drm/xe/xe_tile_sriov_vf.c

249

xe_ggtt_shift_nodes_locked(ggtt, shift);

drivers/gpu/drm/xe/xe_tile_sriov_vf.h

15

void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift);

drivers/gpu/host1x/cdma.c

100

host1x->iova_end >> shift, true);

drivers/gpu/host1x/cdma.c

89

unsigned long shift;

drivers/gpu/host1x/cdma.c

98

shift = iova_shift(&host1x->iova);

drivers/gpu/host1x/cdma.c

99

alloc = alloc_iova(&host1x->iova, size >> shift,

drivers/gpu/host1x/job.c

216

unsigned long shift;

drivers/gpu/host1x/job.c

243

shift = iova_shift(&host->iova);

drivers/gpu/host1x/job.c

244

alloc = alloc_iova(&host->iova, gather_size >> shift,

drivers/gpu/host1x/job.c

245

host->iova_end >> shift, true);

drivers/gpu/host1x/job.c

289

reloc->target.offset) >> reloc->shift;

drivers/gpu/host1x/job.c

332

if (reloc->shift)

drivers/gpu/ipu-v3/ipu-common.c

264

int shift;

drivers/gpu/ipu-v3/ipu-common.c

266

{ .chnum = 5, .reg = IDMAC_CH_LOCK_EN_1, .shift = 0, },

drivers/gpu/ipu-v3/ipu-common.c

267

{ .chnum = 11, .reg = IDMAC_CH_LOCK_EN_1, .shift = 2, },

drivers/gpu/ipu-v3/ipu-common.c

268

{ .chnum = 12, .reg = IDMAC_CH_LOCK_EN_1, .shift = 4, },

drivers/gpu/ipu-v3/ipu-common.c

269

{ .chnum = 14, .reg = IDMAC_CH_LOCK_EN_1, .shift = 6, },

drivers/gpu/ipu-v3/ipu-common.c

270

{ .chnum = 15, .reg = IDMAC_CH_LOCK_EN_1, .shift = 8, },

drivers/gpu/ipu-v3/ipu-common.c

271

{ .chnum = 20, .reg = IDMAC_CH_LOCK_EN_1, .shift = 10, },

drivers/gpu/ipu-v3/ipu-common.c

272

{ .chnum = 21, .reg = IDMAC_CH_LOCK_EN_1, .shift = 12, },

drivers/gpu/ipu-v3/ipu-common.c

273

{ .chnum = 22, .reg = IDMAC_CH_LOCK_EN_1, .shift = 14, },

drivers/gpu/ipu-v3/ipu-common.c

274

{ .chnum = 23, .reg = IDMAC_CH_LOCK_EN_1, .shift = 16, },

drivers/gpu/ipu-v3/ipu-common.c

275

{ .chnum = 27, .reg = IDMAC_CH_LOCK_EN_1, .shift = 18, },

drivers/gpu/ipu-v3/ipu-common.c

276

{ .chnum = 28, .reg = IDMAC_CH_LOCK_EN_1, .shift = 20, },

drivers/gpu/ipu-v3/ipu-common.c

277

{ .chnum = 45, .reg = IDMAC_CH_LOCK_EN_2, .shift = 0, },

drivers/gpu/ipu-v3/ipu-common.c

278

{ .chnum = 46, .reg = IDMAC_CH_LOCK_EN_2, .shift = 2, },

drivers/gpu/ipu-v3/ipu-common.c

279

{ .chnum = 47, .reg = IDMAC_CH_LOCK_EN_2, .shift = 4, },

drivers/gpu/ipu-v3/ipu-common.c

280

{ .chnum = 48, .reg = IDMAC_CH_LOCK_EN_2, .shift = 6, },

drivers/gpu/ipu-v3/ipu-common.c

281

{ .chnum = 49, .reg = IDMAC_CH_LOCK_EN_2, .shift = 8, },

drivers/gpu/ipu-v3/ipu-common.c

282

{ .chnum = 50, .reg = IDMAC_CH_LOCK_EN_2, .shift = 10, },

drivers/gpu/ipu-v3/ipu-common.c

328

regval &= ~(0x03 << idmac_lock_en_info[i].shift);

drivers/gpu/ipu-v3/ipu-common.c

329

regval |= (bursts << idmac_lock_en_info[i].shift);

drivers/gpu/ipu-v3/ipu-dmfc.c

42

unsigned long shift;

drivers/gpu/ipu-v3/ipu-dmfc.c

51

.shift = DMFC_DP_CHAN_5B_23,

drivers/gpu/ipu-v3/ipu-dmfc.c

57

.shift = DMFC_DP_CHAN_6B_24,

drivers/gpu/ipu-v3/ipu-dmfc.c

63

.shift = DMFC_DP_CHAN_5F_27,

drivers/gpu/ipu-v3/ipu-dmfc.c

69

.shift = DMFC_WR_CHAN_1_28,

drivers/gpu/ipu-v3/ipu-dmfc.c

75

.shift = DMFC_DP_CHAN_6F_29,

drivers/gpu/ipu-v3/ipu-prg.c

206

int shift;

drivers/gpu/ipu-v3/ipu-prg.c

211

shift = (i == 1) ? 12 : 14;

drivers/gpu/ipu-v3/ipu-prg.c

214

0x3 << shift, mux << shift);

drivers/gpu/ipu-v3/ipu-prg.c

217

shift = (i == 1) ? 14 : 12;

drivers/gpu/ipu-v3/ipu-prg.c

219

if (((val >> shift) & 0x3) == mux) {

drivers/gpu/ipu-v3/ipu-prg.c

221

0x3 << shift,

drivers/gpu/ipu-v3/ipu-prg.c

222

(mux ^ 0x1) << shift);

drivers/gpu/ipu-v3/ipu-smfc.c

40

u32 val, shift;

drivers/gpu/ipu-v3/ipu-smfc.c

44

shift = smfc->chno * 4;

drivers/gpu/ipu-v3/ipu-smfc.c

46

val &= ~(0xf << shift);

drivers/gpu/ipu-v3/ipu-smfc.c

47

val |= burstsize << shift;

drivers/gpu/ipu-v3/ipu-smfc.c

60

u32 val, shift;

drivers/gpu/ipu-v3/ipu-smfc.c

64

shift = smfc->chno * 3;

drivers/gpu/ipu-v3/ipu-smfc.c

66

val &= ~(0x7 << shift);

drivers/gpu/ipu-v3/ipu-smfc.c

67

val |= ((csi_id << 2) | mipi_id) << shift;

drivers/gpu/ipu-v3/ipu-smfc.c

80

u32 val, shift;

drivers/gpu/ipu-v3/ipu-smfc.c

84

shift = smfc->chno * 6 + (smfc->chno > 1 ? 4 : 0);

drivers/gpu/ipu-v3/ipu-smfc.c

86

val &= ~(0x3f << shift);

drivers/gpu/ipu-v3/ipu-smfc.c

87

val |= ((clr_level << 3) | set_level) << shift;

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

137

int fraction, shift, mantissa, sign, exp, zeropre;

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

159

shift = 23 - exp;

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

160

if (abs(shift) >= BITS_PER_TYPE(u32))

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

163

if (shift < 0) {

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

164

shift = -shift;

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

165

flt32_val = BIT(exp) + (mantissa << shift);

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

166

shift = 0;

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

168

flt32_val = BIT(exp) + (mantissa >> shift);

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

171

fraction = (shift == 0) ? 0 : mantissa & GENMASK(shift - 1, 0);

drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c

173

return (((fraction * 100) >> shift) >= 50) ? sign * (flt32_val + 1) : sign * flt32_val;

drivers/hwmon/adm9240.c

135

unsigned int reg, old, shift = (channel + 2) * 2;

drivers/hwmon/adm9240.c

141

old = (reg >> shift) & 3;

drivers/hwmon/adm9240.c

142

reg &= ~(3 << shift);

drivers/hwmon/adm9240.c

143

reg |= (fan_div << shift);

drivers/hwmon/adt7475.c

592

int shift, idx;

drivers/hwmon/adt7475.c

601

shift = 0;

drivers/hwmon/adt7475.c

606

shift = 0;

drivers/hwmon/adt7475.c

612

shift = 4;

drivers/hwmon/adt7475.c

625

data->enh_acoustics[idx] &= ~(0xf << shift);

drivers/hwmon/adt7475.c

626

data->enh_acoustics[idx] |= (val << shift);

drivers/hwmon/asc7621.c

110

u8 shift[3];

drivers/hwmon/asc7621.c

200

shift[0]) & param->mask[0]);

drivers/hwmon/asc7621.c

216

reqval = (reqval & param->mask[0]) << param->shift[0];

drivers/hwmon/asc7621.c

220

reqval |= (currval & ~(param->mask[0] << param->shift[0]));

drivers/hwmon/asc7621.c

457

((data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]);

drivers/hwmon/asc7621.c

488

newval = (newval & param->mask[0]) << param->shift[0];

drivers/hwmon/asc7621.c

490

newval |= (currval & ~(param->mask[0] << param->shift[0]));

drivers/hwmon/asc7621.c

508

config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];

drivers/hwmon/asc7621.c

509

altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1];

drivers/hwmon/asc7621.c

543

config = (config & param->mask[0]) << param->shift[0];

drivers/hwmon/asc7621.c

544

altbit = (altbit & param->mask[1]) << param->shift[1];

drivers/hwmon/asc7621.c

548

newval = config | (currval & ~(param->mask[0] << param->shift[0]));

drivers/hwmon/asc7621.c

549

newval = altbit | (newval & ~(param->mask[1] << param->shift[1]));

drivers/hwmon/asc7621.c

563

config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];

drivers/hwmon/asc7621.c

564

altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1];

drivers/hwmon/asc7621.c

565

minoff = (data->reg[param->msb[2]] >> param->shift[2]) & param->mask[2];

drivers/hwmon/asc7621.c

621

config = (config & param->mask[0]) << param->shift[0];

drivers/hwmon/asc7621.c

622

altbit = (altbit & param->mask[1]) << param->shift[1];

drivers/hwmon/asc7621.c

624

newval = config | (currval & ~(param->mask[0] << param->shift[0]));

drivers/hwmon/asc7621.c

625

newval = altbit | (newval & ~(param->mask[1] << param->shift[1]));

drivers/hwmon/asc7621.c

629

minoff = (minoff & param->mask[2]) << param->shift[2];

drivers/hwmon/asc7621.c

632

minoff | (currval & ~(param->mask[2] << param->shift[2]));

drivers/hwmon/asc7621.c

650

(data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];

drivers/hwmon/asc7621.c

678

newval = (newval & param->mask[0]) << param->shift[0];

drivers/hwmon/asc7621.c

682

newval |= (currval & ~(param->mask[0] << param->shift[0]));

drivers/hwmon/asc7621.c

698

(data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];

drivers/hwmon/asc7621.c

727

newval = (newval & param->mask[0]) << param->shift[0];

drivers/hwmon/asc7621.c

731

newval |= (currval & ~(param->mask[0] << param->shift[0]));

drivers/hwmon/asc7621.c

747

(data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0];

drivers/hwmon/asc7621.c

775

newval = (newval & param->mask[0]) << param->shift[0];

drivers/hwmon/asc7621.c

779

newval |= (currval & ~(param->mask[0] << param->shift[0]));

drivers/hwmon/asc7621.c

802

.shift[0] = s,}

drivers/hwmon/asc7621.c

807

.shift[0] = s,}

drivers/hwmon/asc7621.c

815

.priority = pri, .msb = rm, .lsb = rl, .mask = m, .shift = s,}

drivers/hwmon/gl518sm.c

299

#define set_bits(type, suffix, value, reg, mask, shift) \

drivers/hwmon/gl518sm.c

315

regvalue = (regvalue & ~mask) | (data->value << shift); \

drivers/hwmon/mlxreg-fan.c

150

if (BIT(rol32(channel, tacho->shift) / fan->tachos_per_drwr) &

drivers/hwmon/mlxreg-fan.c

73

u32 shift;

drivers/hwmon/nct7802.c

307

int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr];

drivers/hwmon/nct7802.c

314

ret = (v[0] | ((v[1] << shift) & 0x300)) * nct7802_vmul[nr];

drivers/hwmon/nct7802.c

322

int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr];

drivers/hwmon/nct7802.c

336

0x0300 >> shift, (voltage & 0x0300) >> shift);

drivers/hwmon/pmbus/adm1275.c

183

int shift, ret;

drivers/hwmon/pmbus/adm1275.c

194

shift = is_power ? ADM1278_PWR_AVG_SHIFT : ADM1278_VI_AVG_SHIFT;

drivers/hwmon/pmbus/adm1275.c

198

shift = ADM1275_VI_AVG_SHIFT;

drivers/hwmon/pmbus/adm1275.c

203

return (ret & mask) >> shift;

drivers/hwmon/pmbus/adm1275.c

238

int shift, ret;

drivers/hwmon/pmbus/adm1275.c

244

shift = is_power ? ADM1278_PWR_AVG_SHIFT : ADM1278_VI_AVG_SHIFT;

drivers/hwmon/pmbus/adm1275.c

248

shift = ADM1275_VI_AVG_SHIFT;

drivers/hwmon/pmbus/adm1275.c

253

word = (ret & ~mask) | ((word << shift) & mask);

drivers/hwmon/w83793.c

379

int shift = sensor_attr->index & 0x07;

drivers/hwmon/w83793.c

380

u8 beep_bit = 1 << shift;

drivers/hwmon/w83793.c

394

data->beeps[index] |= val << shift;

drivers/hwmon/w83793.c

628

u8 shift = (index < 4) ? (2 * index) : (index - 4);

drivers/hwmon/w83793.c

632

tmp = (data->temp_mode[index] >> shift) & mask;

drivers/hwmon/w83793.c

653

u8 shift = (index < 4) ? (2 * index) : (index - 4);

drivers/hwmon/w83793.c

676

data->temp_mode[index] &= ~(mask << shift);

drivers/hwmon/w83793.c

677

data->temp_mode[index] |= val << shift;

drivers/hwmon/w83793.c

856

u8 shift = (index & 0x01) ? 4 : 0;

drivers/hwmon/w83793.c

860

data->tolerance[i] &= ~(0x0f << shift);

drivers/hwmon/w83793.c

861

data->tolerance[i] |= TEMP_TO_REG(val, 0, 0x0f) << shift;

drivers/hwmon/w83795.c

728

int shift = sensor_attr->index & 0x07;

drivers/hwmon/w83795.c

729

u8 beep_bit = 1 << shift;

drivers/hwmon/w83795.c

740

data->beeps[index] |= val << shift;

drivers/hwtracing/coresight/coresight-etm4x-core.c

1636

int shift;

drivers/hwtracing/coresight/coresight-etm4x-core.c

1649

shift = (type == ETM_ADDR_TYPE_START ? 0 : 16);

drivers/hwtracing/coresight/coresight-etm4x-core.c

1650

config->vissctlr |= BIT(shift + comparator);

drivers/hwtracing/intel_th/gth.c

103

int shift = (port & 1) * 16;

drivers/hwtracing/intel_th/gth.c

107

val &= 0xffff << shift;

drivers/hwtracing/intel_th/gth.c

108

val >>= shift;

drivers/hwtracing/intel_th/gth.c

127

unsigned int shift = (master & 0x7) * 4;

drivers/hwtracing/intel_th/gth.c

132

shift = 0;

drivers/hwtracing/intel_th/gth.c

136

val &= ~(0xf << shift);

drivers/hwtracing/intel_th/gth.c

138

val |= (0x8 | port) << shift;

drivers/hwtracing/intel_th/gth.c

256

unsigned int shift = __ffs(mask);

drivers/hwtracing/intel_th/gth.c

259

config |= (val << shift) & mask;

drivers/hwtracing/intel_th/gth.c

268

unsigned int shift = __ffs(mask);

drivers/hwtracing/intel_th/gth.c

271

config >>= shift;

drivers/hwtracing/intel_th/gth.c

66

int shift = (port & 3) * 8;

drivers/hwtracing/intel_th/gth.c

69

val &= ~(0xff << shift);

drivers/hwtracing/intel_th/gth.c

70

val |= config << shift;

drivers/hwtracing/intel_th/gth.c

78

int shift = (port & 3) * 8;

drivers/hwtracing/intel_th/gth.c

81

val &= 0xff << shift;

drivers/hwtracing/intel_th/gth.c

82

val >>= shift;

drivers/hwtracing/intel_th/gth.c

91

int shift = (port & 1) * 16;

drivers/hwtracing/intel_th/gth.c

95

val &= ~(0xffff << shift);

drivers/hwtracing/intel_th/gth.c

96

val |= freq << shift;

drivers/i2c/busses/i2c-mlxbf.c

1091

u32 mask, u8 shift)

drivers/i2c/busses/i2c-mlxbf.c

1093

u32 val = (mlxbf_i2c_get_ticks(priv, nsec, opt) & mask) << shift;

drivers/i2c/busses/i2c-rtl9300.c

189

unsigned int shift = (i % 4) * 8;

drivers/i2c/busses/i2c-rtl9300.c

192

vals[reg] |= buf[i] << shift;

drivers/iio/accel/adxl355_core.c

540

*val = sign_extend32(ret >> chan->scan_type.shift,

drivers/iio/accel/adxl355_core.c

731

.shift = 4, \

drivers/iio/accel/adxl372.c

268

.shift = 4, \

drivers/iio/accel/adxl372.c

772

*val = sign_extend32(ret >> chan->scan_type.shift,

drivers/iio/accel/adxl380.c

1200

*val = sign_extend32(ret >> chan->scan_type.shift,

drivers/iio/accel/adxl380.c

1816

.shift = 4,

drivers/iio/accel/bma180.c

545

*val = sign_extend32(ret >> chan->scan_type.shift,

drivers/iio/accel/bma180.c

669

.shift = 16 - _bits, \

drivers/iio/accel/bma180.c

698

.shift = 16 - _bits, \

drivers/iio/accel/bma220_core.c

113

.shift = 2, \

drivers/iio/accel/bma220_core.c

264

*val = sign_extend32(reg >> chan->scan_type.shift,

drivers/iio/accel/bmc150-accel-core.c

1065

.shift = 16 - (bits), \

drivers/iio/accel/bmc150-accel-core.c

642

*val = sign_extend32(le16_to_cpu(raw_val) >> chan->scan_type.shift,

drivers/iio/accel/kxcjk-1013.c

1153

.shift = 4, \

drivers/iio/accel/kxcjk-1013.c

910

*val = sign_extend32(ret >> chan->scan_type.shift,

drivers/iio/accel/kxsd9.c

290

.shift = 4, \

drivers/iio/accel/kxsd9.c

309

.shift = 4,

drivers/iio/accel/mma8452.c

1239

.shift = 16 - (bits), \

drivers/iio/accel/mma8452.c

1261

.shift = 16 - (bits), \

drivers/iio/accel/mma8452.c

508

buffer[chan->scan_index]) >> chan->scan_type.shift,

drivers/iio/accel/msa311.c

388

.shift = 4, \

drivers/iio/accel/msa311.c

624

*val = sign_extend32(le16_to_cpu(axis) >> chan->scan_type.shift,

drivers/iio/accel/mxc4005.c

239

*val = sign_extend32(ret >> chan->scan_type.shift,

drivers/iio/accel/mxc4005.c

312

.shift = 4, \

drivers/iio/accel/sca3000.c

491

.shift = 3, \

drivers/iio/accel/sca3000.c

534

.shift = 5,

drivers/iio/accel/sca3000.c

734

chan->scan_type.shift,

drivers/iio/accel/sca3000.c

746

chan->scan_type.shift) &

drivers/iio/accel/stk8ba50.c

114

.shift = STK8BA50_DATA_SHIFT, \

drivers/iio/accel/stk8ba50.c

230

*val = sign_extend32(ret >> chan->scan_type.shift,

drivers/iio/adc/ad4000.c

57

.shift = (_offl ? 0 : _storage_bits - _real_bits), \

drivers/iio/adc/ad4000.c

658

sample >>= chan->scan_type.shift;

drivers/iio/adc/ad4000.c

95

.shift = (_offl ? 0 : _storage_bits - _real_bits), \

drivers/iio/adc/ad4030.c

1089

.shift = 8,

drivers/iio/adc/ad4030.c

1096

.shift = 2,

drivers/iio/adc/ad4030.c

1106

.shift = 16,

drivers/iio/adc/ad4030.c

1113

.shift = 2,

drivers/iio/adc/ad4170-4.c

940

.shift = 8,

drivers/iio/adc/ad4170-4.c

961

.shift = 8,

drivers/iio/adc/ad4695.c

1761

chan->scan_type.shift = 3;

drivers/iio/adc/ad4695.c

319

.shift = 3,

drivers/iio/adc/ad4695.c

325

.shift = 2,

drivers/iio/adc/ad4695.c

331

.shift = 1,

drivers/iio/adc/ad4695.c

345

.shift = 3,

drivers/iio/adc/ad4695.c

351

.shift = 2,

drivers/iio/adc/ad4695.c

357

.shift = 1,

drivers/iio/adc/ad7266.c

202

.shift = 2, \

drivers/iio/adc/ad7266.c

250

.shift = 2, \

drivers/iio/adc/ad7292.c

106

unsigned int shift = 16 - (8 * len);

drivers/iio/adc/ad7292.c

116

return (be16_to_cpu(st->d16) >> shift);

drivers/iio/adc/ad7380.c

1656

int ret, tmp, shift;

drivers/iio/adc/ad7380.c

1667

shift = scan_type->realbits - 12;

drivers/iio/adc/ad7380.c

1677

*val = FIELD_GET(AD7380_ALERT_HIGH_TH, tmp) << shift;

drivers/iio/adc/ad7380.c

1686

*val = FIELD_GET(AD7380_ALERT_LOW_TH, tmp) << shift;

drivers/iio/adc/ad7476.c

145

*val = (ret >> chan->scan_type.shift) &

drivers/iio/adc/ad7476.c

166

.shift = (_shift), \

drivers/iio/adc/ad7768-1.c

1035

unsigned int shift;

drivers/iio/adc/ad7768-1.c

1050

shift = st->filter_type == AD7768_FILTER_SINC5 ? 0 : 2;

drivers/iio/adc/ad7768-1.c

1051

*vals = (int *)&ad7768_dec_rate_values[shift];

drivers/iio/adc/ad7768-1.c

1052

*length = ARRAY_SIZE(ad7768_dec_rate_values) - shift;

drivers/iio/adc/ad7768-1.c

260

.shift = 8,

drivers/iio/adc/ad7780.c

223

.shift = (_wordsize) - (_bits), \

drivers/iio/adc/ad7791.c

86

.shift = (_shift), \

drivers/iio/adc/ad7793.c

449

unsigned int shift;

drivers/iio/adc/ad7793.c

451

shift = chan->scan_type.realbits - (unipolar ? 0 : 1);

drivers/iio/adc/ad7793.c

452

offset = 273ULL << shift;

drivers/iio/adc/ad7793.c

574

.shift = (_shift), \

drivers/iio/adc/ad7887.c

162

*val = ret >> chan->scan_type.shift;

drivers/iio/adc/ad7887.c

194

.shift = 0, \

drivers/iio/adc/ad7923.c

272

*val = EXTRACT(ret, chan->scan_type.shift,

drivers/iio/adc/ad7923.c

97

.shift = 12 - (bits), \

drivers/iio/adc/ad799x.c

305

*val = (ret >> chan->scan_type.shift) &

drivers/iio/adc/ad799x.c

470

val << chan->scan_type.shift);

drivers/iio/adc/ad799x.c

489

*val = (ret >> chan->scan_type.shift) &

drivers/iio/adc/ad799x.c

592

.shift = 12 - (_realbits), \

drivers/iio/adc/ad_sigma_delta.c

436

BITS_TO_BYTES(chan->scan_type.realbits + chan->scan_type.shift),

drivers/iio/adc/ad_sigma_delta.c

455

sample = raw_sample >> chan->scan_type.shift;

drivers/iio/adc/ad_sigma_delta.c

524

scan_size = BITS_TO_BYTES(scan_type->realbits + scan_type->shift);

drivers/iio/adc/ad_sigma_delta.c

626

reg_size = BITS_TO_BYTES(scan_type->realbits + scan_type->shift);

drivers/iio/adc/ep93xx_adc.c

143

*shift = 32;

drivers/iio/adc/ep93xx_adc.c

81

int *shift, long mask)

drivers/iio/adc/ina2xx-adc.c

670

.shift = _shift, \

drivers/iio/adc/max1027.c

109

.shift = (depth == 10) ? 2 : 0, \

drivers/iio/adc/meson_saradc.c

756

priv->clk_div.shift = MESON_SAR_ADC_REG3_ADC_CLK_DIV_SHIFT;

drivers/iio/adc/pac1934.c

426

.shift = 4, \

drivers/iio/adc/sd_adc_modulator.c

26

.shift = 0,

drivers/iio/adc/stm32-adc.c

1352

val |= chan->channel << sqr[i].shift;

drivers/iio/adc/stm32-adc.c

1362

val |= ((i - 1) << sqr[0].shift);

drivers/iio/adc/stm32-adc.c

141

int shift;

drivers/iio/adc/stm32-adc.c

1427

val |= exten << adc->cfg->regs->exten.shift;

drivers/iio/adc/stm32-adc.c

1428

val |= extsel << adc->cfg->regs->extsel.shift;

drivers/iio/adc/stm32-adc.c

1503

val |= chan->channel << regs->sqr[1].shift;

drivers/iio/adc/stm32-adc.c

2060

u32 period_ns, shift = smpr->shift, mask = smpr->mask;

drivers/iio/adc/stm32-adc.c

2080

adc->smpr_val[r] = (adc->smpr_val[r] & ~mask) | (smp << shift);

drivers/iio/adc/stm32-adc.c

694

val = (val & ~res->mask) | (adc->res << res->shift);

drivers/iio/adc/stm32-dfsdm-adc.c

1347

u32 max = flo->max << (flo->lshift - chan->scan_type.shift);

drivers/iio/adc/stm32-dfsdm-adc.c

1351

if (flo->lshift < chan->scan_type.shift)

drivers/iio/adc/stm32-dfsdm-adc.c

1352

max = flo->max >> (chan->scan_type.shift - flo->lshift);

drivers/iio/adc/stm32-dfsdm-adc.c

1560

ch->scan_type.shift = 8;

drivers/iio/adc/stm32-dfsdm-adc.c

200

int bits, shift;

drivers/iio/adc/stm32-dfsdm-adc.c

273

shift = DFSDM_DATA_RES - bits;

drivers/iio/adc/stm32-dfsdm-adc.c

280

if (shift > 0) {

drivers/iio/adc/stm32-dfsdm-adc.c

283

flo->lshift = shift;

drivers/iio/adc/stm32-dfsdm-adc.c

295

flo->rshift = 1 - shift;

drivers/iio/adc/ti-adc081c.c

48

int *shift, long mask)

drivers/iio/adc/ti-adc081c.c

68

*shift = adc->bits;

drivers/iio/adc/ti-adc081c.c

87

.shift = 12 - (_bits), \

drivers/iio/adc/ti-adc0832.c

171

int *shift, long mask)

drivers/iio/adc/ti-adc0832.c

192

*shift = 8;

drivers/iio/adc/ti-adc084s021.c

116

*val = (*val >> channel->scan_type.shift) & 0xff;

drivers/iio/adc/ti-adc084s021.c

52

.shift = 4, \

drivers/iio/adc/ti-adc12138.c

227

int *shift, long mask)

drivers/iio/adc/ti-adc12138.c

241

*value = sign_extend32(be16_to_cpu(data) >> channel->scan_type.shift,

drivers/iio/adc/ti-adc12138.c

260

*shift = channel->scan_type.realbits - 1;

drivers/iio/adc/ti-adc12138.c

73

.shift = 3, \

drivers/iio/adc/ti-adc12138.c

93

.shift = 3, \

drivers/iio/adc/ti-adc161s626.c

101

*val = sign_extend32(*val >> data->shift, chan->scan_type.realbits - 1);

drivers/iio/adc/ti-adc161s626.c

193

data->shift = 0;

drivers/iio/adc/ti-adc161s626.c

199

data->shift = 6;

drivers/iio/adc/ti-adc161s626.c

73

u8 shift;

drivers/iio/adc/ti-ads1015.c

199

.shift = (_shift), \

drivers/iio/adc/ti-ads1015.c

225

.shift = (_shift), \

drivers/iio/adc/ti-ads1015.c

552

*val = sign_extend32(*val >> chan->scan_type.shift,

drivers/iio/adc/ti-ads1015.c

721

low_thresh << chan->scan_type.shift);

drivers/iio/adc/ti-ads1015.c

726

high_thresh << chan->scan_type.shift);

drivers/iio/adc/ti-ads1018.c

111

.shift = 16 - _realbits, \

drivers/iio/adc/ti-ads1018.c

131

.shift = 16 - _realbits, \

drivers/iio/adc/ti-ads1018.c

149

.shift = 16 - _realbits, \

drivers/iio/adc/ti-ads1018.c

309

cnv >>= chan->scan_type.shift;

drivers/iio/adc/ti-ads131e08.c

774

channels[i].scan_type.shift = 8;

drivers/iio/adc/ti-ads7950.c

150

.shift = 12 - (bits), \

drivers/iio/adc/ti-ads7950.c

383

*val = TI_ADS7950_EXTRACT(ret, chan->scan_type.shift,

drivers/iio/adc/ti-ads8344.c

103

int *shift, long mask)

drivers/iio/adc/ti-ads8344.c

124

*shift = 16;

drivers/iio/adc/ti-tlc4541.c

141

*val = *val >> chan->scan_type.shift;

drivers/iio/adc/ti-tlc4541.c

66

.shift = (bitshift), \

drivers/iio/adc/xilinx-xadc-core.c

1072

.shift = 16 - (_bits), \

drivers/iio/adc/xilinx-xadc-core.c

1092

.shift = 16 - (_bits), \

drivers/iio/adc/xilinx-xadc-core.c

930

val16 >>= chan->scan_type.shift;

drivers/iio/addac/ad74115.c

1286

.shift = 8, \

drivers/iio/addac/ad74413r.c

1126

.shift = 8, \

drivers/iio/chemical/scd30_core.c

109

shift = 23 - exp;

drivers/iio/chemical/scd30_core.c

110

float32 = BIT(exp) + (mantissa >> shift);

drivers/iio/chemical/scd30_core.c

111

fraction = mantissa & GENMASK(shift - 1, 0);

drivers/iio/chemical/scd30_core.c

113

return sign * (float32 * 100 + ((fraction * 100) >> shift));

drivers/iio/chemical/scd30_core.c

92

int fraction, shift,

drivers/iio/chemical/sps30.c

45

int fraction, shift;

drivers/iio/chemical/sps30.c

58

shift = 23 - exp;

drivers/iio/chemical/sps30.c

59

val = (1 << exp) + (mantissa >> shift);

drivers/iio/chemical/sps30.c

63

fraction = mantissa & GENMASK(shift - 1, 0);

drivers/iio/chemical/sps30.c

65

return val * 100 + ((fraction * 100) >> shift);

drivers/iio/common/ssp_sensors/ssp_iio_sensor.h

16

.shift = 0,\

drivers/iio/common/st_sensors/st_sensors_buffer.c

32

channel->scan_type.shift, 8);

drivers/iio/common/st_sensors/st_sensors_core.c

503

ch->scan_type.shift, 8);

drivers/iio/common/st_sensors/st_sensors_core.c

546

*val = *val >> ch->scan_type.shift;

drivers/iio/dac/ad5064.c

193

unsigned int addr, unsigned int val, unsigned int shift)

drivers/iio/dac/ad5064.c

195

val <<= shift;

drivers/iio/dac/ad5064.c

204

unsigned int shift;

drivers/iio/dac/ad5064.c

212

shift = 4;

drivers/iio/dac/ad5064.c

214

shift = 8;

drivers/iio/dac/ad5064.c

220

val |= st->pwr_down_mode[chan->channel] << shift;

drivers/iio/dac/ad5064.c

355

chan->address, val, chan->scan_type.shift);

drivers/iio/dac/ad5064.c

408

.shift = (_shift), \

drivers/iio/dac/ad5064.c

413

#define DECLARE_AD5064_CHANNELS(name, bits, shift, ext_info) \

drivers/iio/dac/ad5064.c

415

AD5064_CHANNEL(0, 0, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

416

AD5064_CHANNEL(1, 1, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

417

AD5064_CHANNEL(2, 2, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

418

AD5064_CHANNEL(3, 3, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

419

AD5064_CHANNEL(4, 4, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

420

AD5064_CHANNEL(5, 5, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

421

AD5064_CHANNEL(6, 6, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

422

AD5064_CHANNEL(7, 7, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

425

#define DECLARE_AD5065_CHANNELS(name, bits, shift, ext_info) \

drivers/iio/dac/ad5064.c

427

AD5064_CHANNEL(0, 0, bits, shift, ext_info), \

drivers/iio/dac/ad5064.c

428

AD5064_CHANNEL(1, 3, bits, shift, ext_info), \

drivers/iio/dac/ad5360.c

115

.shift = 16 - (bits), \

drivers/iio/dac/ad5360.c

195

unsigned int shift)

drivers/iio/dac/ad5360.c

199

val <<= shift;

drivers/iio/dac/ad5360.c

207

unsigned int addr, unsigned int val, unsigned int shift)

drivers/iio/dac/ad5360.c

213

ret = ad5360_write_unlocked(indio_dev, cmd, addr, val, shift);

drivers/iio/dac/ad5360.c

329

chan->address, val, chan->scan_type.shift);

drivers/iio/dac/ad5360.c

336

chan->address, val, chan->scan_type.shift);

drivers/iio/dac/ad5360.c

343

chan->address, val, chan->scan_type.shift);

drivers/iio/dac/ad5360.c

386

*val = ret >> chan->scan_type.shift;

drivers/iio/dac/ad5380.c

185

val << chan->scan_type.shift);

drivers/iio/dac/ad5380.c

193

val << chan->scan_type.shift);

drivers/iio/dac/ad5380.c

213

*val >>= chan->scan_type.shift;

drivers/iio/dac/ad5380.c

220

*val >>= chan->scan_type.shift;

drivers/iio/dac/ad5380.c

264

.shift = 14 - (_bits), \

drivers/iio/dac/ad5446.c

121

*val = st->cached_val >> chan->scan_type.shift;

drivers/iio/dac/ad5446.c

140

val <<= chan->scan_type.shift;

drivers/iio/dac/ad5446.c

72

unsigned int shift;

drivers/iio/dac/ad5446.c

85

shift = chan->scan_type.realbits + chan->scan_type.shift;

drivers/iio/dac/ad5446.c

86

val = st->pwr_down_mode << shift;

drivers/iio/dac/ad5446.h

26

.shift = (_shift), \

drivers/iio/dac/ad5446.h

31

#define AD5446_CHANNEL(bits, storage, shift) \

drivers/iio/dac/ad5446.h

32

_AD5446_CHANNEL(bits, storage, shift, NULL)

drivers/iio/dac/ad5446.h

34

#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \

drivers/iio/dac/ad5446.h

35

_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)

drivers/iio/dac/ad5449.c

181

val << chan->scan_type.shift);

drivers/iio/dac/ad5449.c

209

.shift = 12 - (bits), \

drivers/iio/dac/ad5624r_spi.c

178

.shift = 16 - (_bits), \

drivers/iio/dac/ad5624r_spi.c

26

u8 cmd, u8 addr, u16 val, u8 shift)

drivers/iio/dac/ad5624r_spi.c

39

data = (0 << 22) | (cmd << 19) | (addr << 16) | (val << shift);

drivers/iio/dac/ad5624r_spi.c

78

chan->scan_type.shift);

drivers/iio/dac/ad5686.c

102

shift = 13;

drivers/iio/dac/ad5686.c

109

val = ((st->pwr_down_mask & st->pwr_down_mode) << shift);

drivers/iio/dac/ad5686.c

135

*val = (ret >> chan->scan_type.shift) &

drivers/iio/dac/ad5686.c

164

val << chan->scan_type.shift);

drivers/iio/dac/ad5686.c

203

.shift = (_shift), \

drivers/iio/dac/ad5686.c

74

u8 shift, address = 0;

drivers/iio/dac/ad5686.c

87

shift = 9;

drivers/iio/dac/ad5686.c

91

shift = 13;

drivers/iio/dac/ad5686.c

95

shift = 0;

drivers/iio/dac/ad5755.c

400

unsigned int *reg, unsigned int *shift, unsigned int *offset)

drivers/iio/dac/ad5755.c

408

*shift = chan->scan_type.shift;

drivers/iio/dac/ad5755.c

416

*shift = st->chip_info->calib_shift;

drivers/iio/dac/ad5755.c

424

*shift = st->chip_info->calib_shift;

drivers/iio/dac/ad5755.c

438

unsigned int reg, shift, offset;

drivers/iio/dac/ad5755.c

453

&reg, &shift, &offset);

drivers/iio/dac/ad5755.c

461

*val = (ret - offset) >> shift;

drivers/iio/dac/ad5755.c

473

unsigned int shift, reg, offset;

drivers/iio/dac/ad5755.c

477

&reg, &shift, &offset);

drivers/iio/dac/ad5755.c

481

val <<= shift;

drivers/iio/dac/ad5755.c

540

.shift = 16 - (_bits), \

drivers/iio/dac/ad5761.c

210

*val = aux >> chan->scan_type.shift;

drivers/iio/dac/ad5761.c

240

if (val2 || (val << chan->scan_type.shift) > 0xffff || val < 0)

drivers/iio/dac/ad5761.c

243

aux = val << chan->scan_type.shift;

drivers/iio/dac/ad5761.c

263

.shift = 16 - (_bits), \

drivers/iio/dac/ad5764.c

194

val <<= chan->scan_type.shift;

drivers/iio/dac/ad5764.c

235

*val >>= chan->scan_type.shift;

drivers/iio/dac/ad5764.c

90

.shift = 16 - (_bits), \

drivers/iio/dac/ad5766.c

272

val <<= chan->scan_type.shift;

drivers/iio/dac/ad5766.c

455

.shift = 16 - (_bits), \

drivers/iio/dac/ad5791.c

279

*val >>= chan->scan_type.shift;

drivers/iio/dac/ad5791.c

329

.shift = (_shift), \

drivers/iio/dac/ad5791.c

347

.shift = (_shift), \

drivers/iio/dac/ad5791.c

370

val <<= chan->scan_type.shift;

drivers/iio/dac/ad7303.c

191

.shift = 0, \

drivers/iio/dac/ltc1660.c

115

.shift = 12 - (bits), \

drivers/iio/dac/ltc1660.c

94

(val << chan->scan_type.shift));

drivers/iio/dac/ltc2632.c

124

chan->scan_type.shift);

drivers/iio/dac/ltc2632.c

192

.shift = 16 - (_bits), \

drivers/iio/dac/ltc2632.c

73

u8 cmd, u8 addr, u16 val, u8 shift)

drivers/iio/dac/ltc2632.c

85

data = (cmd << 20) | (addr << 16) | (val << shift);

drivers/iio/dac/max5522.c

113

val << chan->scan_type.shift);

drivers/iio/dac/max5522.c

51

.shift = 2, \

drivers/iio/dac/mcp4821.c

152

write_val = MCP4821_ACTIVE_MODE | val << chan->scan_type.shift;

drivers/iio/dac/mcp4821.c

62

.shift = 12 - (resolution), \

drivers/iio/dac/mcp4922.c

47

.shift = 12 - (bits), \

drivers/iio/dac/mcp4922.c

97

val <<= chan->scan_type.shift;

drivers/iio/dac/ti-dac082s085.c

68

u8 shift = 12 - ti_dac->resolution;

drivers/iio/dac/ti-dac082s085.c

70

ti_dac->buf[0] = cmd | (val >> (8 - shift));

drivers/iio/dac/ti-dac082s085.c

71

ti_dac->buf[1] = (val << shift) & 0xff;

drivers/iio/dac/ti-dac5571.c

69

unsigned int shift;

drivers/iio/dac/ti-dac5571.c

71

shift = 12 - data->spec->resolution;

drivers/iio/dac/ti-dac5571.c

72

data->buf[1] = val << shift;

drivers/iio/dac/ti-dac5571.c

73

data->buf[0] = val >> (8 - shift);

drivers/iio/dac/ti-dac5571.c

83

unsigned int shift;

drivers/iio/dac/ti-dac5571.c

85

shift = 16 - data->spec->resolution;

drivers/iio/dac/ti-dac5571.c

86

data->buf[2] = val << shift;

drivers/iio/dac/ti-dac5571.c

87

data->buf[1] = (val >> (8 - shift));

drivers/iio/dac/ti-dac7311.c

68

u8 shift = 14 - ti_dac->resolution;

drivers/iio/dac/ti-dac7311.c

70

ti_dac->buf[0] = (val << shift) & 0xFF;

drivers/iio/dac/ti-dac7311.c

71

ti_dac->buf[1] = (power << 6) | (val >> (8 - shift));

drivers/iio/dummy/iio_simple_dummy.c

134

.shift = 0, /* zero shift */

drivers/iio/dummy/iio_simple_dummy.c

173

.shift = 0, /* zero shift */

drivers/iio/dummy/iio_simple_dummy.c

191

.shift = 0,

drivers/iio/dummy/iio_simple_dummy.c

218

.shift = 0, /* zero shift */

drivers/iio/health/max30102.c

139

.shift = 8, \

drivers/iio/humidity/hdc100x.c

150

int shift = hdc100x_resolution_shift[chan].shift;

drivers/iio/humidity/hdc100x.c

157

hdc100x_resolution_shift[chan].mask << shift,

drivers/iio/humidity/hdc100x.c

158

i << shift);

drivers/iio/humidity/hdc100x.c

60

int shift;

drivers/iio/humidity/hdc100x.c

64

.shift = 10,

drivers/iio/humidity/hdc100x.c

68

.shift = 8,

drivers/iio/imu/adis16400.c

659

.shift = 0, \

drivers/iio/imu/adis16400.c

685

.shift = 0, \

drivers/iio/imu/adis16400.c

705

.shift = 0, \

drivers/iio/imu/adis16400.c

724

.shift = 0, \

drivers/iio/imu/adis16400.c

750

.shift = 0, \

drivers/iio/imu/adis16400.c

769

.shift = 0, \

drivers/iio/imu/adis16400.c

787

.shift = 0, \

drivers/iio/imu/bno055/bno055.c

559

const int shift = __ffs(mask);

drivers/iio/imu/bno055/bno055.c

568

idx = (hwval & mask) >> shift;

drivers/iio/imu/bno055/bno055.c

589

const int shift = __ffs(mask);

drivers/iio/imu/bno055/bno055.c

656

ret = regmap_update_bits(priv->regmap, reg, mask, hwval << shift);

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

1475

.shift = 0, \

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

1492

.shift = 0, \

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

1584

.shift = 0, \

drivers/iio/imu/kmx61.c

240

.shift = 4, \

drivers/iio/imu/kmx61.c

260

.shift = 2, \

drivers/iio/imu/kmx61.c

811

*val = sign_extend32(ret >> chan->scan_type.shift,

drivers/iio/industrialio-buffer.c

2096

if (scan_type->storagebits < scan_type->realbits + scan_type->shift) {

drivers/iio/industrialio-buffer.c

2101

scan_type->shift);

drivers/iio/industrialio-buffer.c

430

scan_type->shift);

drivers/iio/industrialio-buffer.c

437

scan_type->shift);

drivers/iio/light/cros_ec_light_prox.c

200

channel->scan_type.shift = 0;

drivers/iio/light/gp2ap020a00f.c

1332

.shift = 0,

drivers/iio/light/gp2ap020a00f.c

1349

.shift = 0,

drivers/iio/light/gp2ap020a00f.c

1363

.shift = 0,

drivers/iio/light/rpr0521.c

125

u8 shift;

drivers/iio/light/rpr0521.c

132

.shift = RPR0521_PXS_GAIN_SHIFT,

drivers/iio/light/rpr0521.c

139

.shift = RPR0521_ALS_DATA0_GAIN_SHIFT,

drivers/iio/light/rpr0521.c

146

.shift = RPR0521_ALS_DATA1_GAIN_SHIFT,

drivers/iio/light/rpr0521.c

576

idx = (rpr0521_gain[chan].mask & reg) >> rpr0521_gain[chan].shift;

drivers/iio/light/rpr0521.c

601

idx << rpr0521_gain[chan].shift);

drivers/iio/light/si1133.c

241

s8 shift)

drivers/iio/light/si1133.c

243

return ((input << fraction) / mag) << shift;

drivers/iio/light/si1133.c

250

s8 shift;

drivers/iio/light/si1133.c

256

shift = ((u16)coeffs->info & 0xFF00) >> 8;

drivers/iio/light/si1133.c

257

shift ^= 0xFF;

drivers/iio/light/si1133.c

258

shift += 1;

drivers/iio/light/si1133.c

259

shift = -shift;

drivers/iio/light/si1133.c

263

coeffs->mag, shift);

drivers/iio/light/si1133.c

270

coeffs->mag, shift);

drivers/iio/light/si1133.c

573

u8 mask, u8 shift, u8 value)

drivers/iio/light/si1133.c

584

adc_config |= (value << shift);

drivers/iio/light/si1133.c

690

u8 shift, u8 value)

drivers/iio/light/si1133.c

701

adc_sens |= (value << shift);

drivers/iio/light/si1145.c

724

u8 reg1, reg2, shift;

drivers/iio/light/si1145.c

773

shift = SI1145_PS_LED_SHIFT(chan->channel);

drivers/iio/light/si1145.c

784

(ret & ~(0x0f << shift)) |

drivers/iio/light/si1145.c

785

((val & 0x0f) << shift));

drivers/iio/light/tsl2563.c

238

int shift = 0;

drivers/iio/light/tsl2563.c

242

shift += 5;

drivers/iio/light/tsl2563.c

245

shift += 2;

drivers/iio/light/tsl2563.c

253

shift += 4;

drivers/iio/light/tsl2563.c

255

return shift;

drivers/iio/magnetometer/rm3100-core.c

243

.shift = 8, \

drivers/iio/potentiometer/ad5110.c

164

val = val >> data->cfg->shift;

drivers/iio/potentiometer/ad5110.c

212

*val = *val >> data->cfg->shift;

drivers/iio/potentiometer/ad5110.c

242

return ad5110_write(data, AD5110_RDAC_WR, val << data->cfg->shift);

drivers/iio/potentiometer/ad5110.c

36

int shift;

drivers/iio/potentiometer/ad5110.c

52

[AD5112_05] = { .max_pos = 64, .kohms = 5, .shift = 1 },

drivers/iio/potentiometer/ad5110.c

53

[AD5112_10] = { .max_pos = 64, .kohms = 10, .shift = 1 },

drivers/iio/potentiometer/ad5110.c

54

[AD5112_80] = { .max_pos = 64, .kohms = 80, .shift = 1 },

drivers/iio/potentiometer/ad5110.c

55

[AD5114_10] = { .max_pos = 32, .kohms = 10, .shift = 2 },

drivers/iio/potentiometer/ad5110.c

56

[AD5114_80] = { .max_pos = 32, .kohms = 80, .shift = 2 },

drivers/iio/potentiometer/ad5272.c

109

*val = *val >> data->cfg->shift;

drivers/iio/potentiometer/ad5272.c

133

return ad5272_write(data, AD5272_RDAC_WR, val << data->cfg->shift);

drivers/iio/potentiometer/ad5272.c

30

int shift;

drivers/iio/potentiometer/ad5272.c

45

[AD5274_020] = { .max_pos = 256, .kohms = 20, .shift = 2 },

drivers/iio/potentiometer/ad5272.c

46

[AD5274_100] = { .max_pos = 256, .kohms = 100, .shift = 2 },

drivers/iio/pressure/cros_ec_baro.c

158

channel->scan_type.shift = 0;

drivers/iio/pressure/dlhl60d.c

220

.shift = 8,

drivers/iio/pressure/dlhl60d.c

235

.shift = 8,

drivers/iio/pressure/hsc030pa.c

429

.shift = 5,

drivers/iio/pressure/mpl3115.c

174

*val = sign_extend32(be16_to_cpu(tmp) >> chan->scan_type.shift,

drivers/iio/pressure/mpl3115.c

347

.shift = 12,

drivers/iio/pressure/mpl3115.c

365

.shift = 4,

drivers/iio/proximity/sx9500.c

120

.shift = 0, \

drivers/iio/temperature/maxim_thermocouple.c

140

unsigned int shift = chan->scan_type.shift + (chan->address * 8);

drivers/iio/temperature/maxim_thermocouple.c

163

*val = sign_extend32(*val >> shift, chan->scan_type.realbits - 1);

drivers/iio/temperature/maxim_thermocouple.c

51

.shift = 3,

drivers/iio/temperature/maxim_thermocouple.c

70

.shift = 2,

drivers/iio/temperature/maxim_thermocouple.c

86

.shift = 4,

drivers/iio/temperature/tmp006.c

202

.shift = TMP006_TAMBIENT_SHIFT,

drivers/iio/trigger/stm32-timer-trigger.c

314

u32 mask, shift, master_mode_max;

drivers/iio/trigger/stm32-timer-trigger.c

319

shift = TIM_CR2_MMS2_SHIFT;

drivers/iio/trigger/stm32-timer-trigger.c

323

shift = TIM_CR2_MMS_SHIFT;

drivers/iio/trigger/stm32-timer-trigger.c

339

i << shift);

drivers/infiniband/core/packer.c

101

mask = cpu_to_be64((~0ull >> (64 - desc[i].size_bits)) << shift);

drivers/infiniband/core/packer.c

160

int shift;

drivers/infiniband/core/packer.c

165

shift = 32 - desc[i].offset_bits - desc[i].size_bits;

drivers/infiniband/core/packer.c

166

mask = ((1ull << desc[i].size_bits) - 1) << shift;

drivers/infiniband/core/packer.c

168

val = (be32_to_cpup(addr) & mask) >> shift;

drivers/infiniband/core/packer.c

174

int shift;

drivers/infiniband/core/packer.c

179

shift = 64 - desc[i].offset_bits - desc[i].size_bits;

drivers/infiniband/core/packer.c

180

mask = (~0ull >> (64 - desc[i].size_bits)) << shift;

drivers/infiniband/core/packer.c

182

val = (be64_to_cpup(addr) & mask) >> shift;

drivers/infiniband/core/packer.c

71

int shift;

drivers/infiniband/core/packer.c

76

shift = 32 - desc[i].offset_bits - desc[i].size_bits;

drivers/infiniband/core/packer.c

80

structure) << shift;

drivers/infiniband/core/packer.c

84

mask = cpu_to_be32(((1ull << desc[i].size_bits) - 1) << shift);

drivers/infiniband/core/packer.c

88

int shift;

drivers/infiniband/core/packer.c

93

shift = 64 - desc[i].offset_bits - desc[i].size_bits;

drivers/infiniband/core/packer.c

97

structure) << shift;

drivers/infiniband/hw/cxgb4/cm.c

3831

u32 shift = 32;

drivers/infiniband/hw/cxgb4/cm.c

3833

t = (thi << shift) | (tlo >> shift);

drivers/infiniband/hw/cxgb4/cm.c

3838

static inline u32 t4_tcb_get_field32(__be64 *tcb, u16 word, u32 mask, u32 shift)

drivers/infiniband/hw/cxgb4/cm.c

3844

shift += 32;

drivers/infiniband/hw/cxgb4/cm.c

3845

v = (t >> shift) & mask;

drivers/infiniband/hw/cxgb4/mem.c

392

struct c4iw_mr *mhp, int shift)

drivers/infiniband/hw/cxgb4/mem.c

402

mhp->attr.len : -1, shift - 12,

drivers/infiniband/hw/cxgb4/mem.c

496

int shift, n, i;

drivers/infiniband/hw/cxgb4/mem.c

537

shift = PAGE_SHIFT;

drivers/infiniband/hw/cxgb4/mem.c

539

n = ib_umem_num_dma_blocks(mhp->umem, 1 << shift);

drivers/infiniband/hw/cxgb4/mem.c

552

rdma_umem_for_each_dma_block(mhp->umem, &biter, 1 << shift) {

drivers/infiniband/hw/cxgb4/mem.c

579

mhp->attr.page_size = shift - 12;

drivers/infiniband/hw/cxgb4/mem.c

582

err = register_mem(rhp, php, mhp, shift);

drivers/infiniband/hw/erdma/erdma.h

220

static inline void *get_queue_entry(void *qbuf, u32 idx, u32 depth, u32 shift)

drivers/infiniband/hw/erdma/erdma.h

224

return qbuf + (idx << shift);

drivers/infiniband/hw/hfi1/chip.c

5823

int shift = posn - 1;

drivers/infiniband/hw/hfi1/chip.c

5824

u64 mask = 1ULL << shift;

drivers/infiniband/hw/hfi1/chip.c

5826

if (port_inactive_err(shift)) {

drivers/infiniband/hw/hfi1/chip.c

5829

} else if (disallowed_pkt_err(shift)) {

drivers/infiniband/hw/hfi1/chip.c

5830

int vl = engine_to_vl(dd, disallowed_pkt_engine(shift));

drivers/infiniband/hw/hfi1/init.c

489

u16 shift, mult;

drivers/infiniband/hw/hfi1/init.c

520

shift = (cce & 0xc000) >> 14;

drivers/infiniband/hw/hfi1/init.c

527

src = (max_pkt_time >> shift) * mult;

drivers/infiniband/hw/hfi1/ipoib.h

82

u32 shift;

drivers/infiniband/hw/hfi1/ipoib_tx.c

39

return (struct ipoib_txreq *)(r->items + (idx << r->shift));

drivers/infiniband/hw/hfi1/ipoib_tx.c

738

txq->tx_ring.shift = ilog2(tx_item_size);

drivers/infiniband/hw/hfi1/sdma.c

3178

u32 i, shift = 0, desc = 0;

drivers/infiniband/hw/hfi1/sdma.c

3214

if (!shift && !(i & 2))

drivers/infiniband/hw/hfi1/sdma.c

3218

<< shift);

drivers/infiniband/hw/hfi1/sdma.c

3219

shift = (shift + 32) & 63;

drivers/infiniband/hw/hfi1/trace_tx.h

252

u16 comp_idx, u32 tidoffset, u32 units, u8 shift),

drivers/infiniband/hw/hfi1/trace_tx.h

253

TP_ARGS(dd, ctxt, subctxt, comp_idx, tidoffset, units, shift),

drivers/infiniband/hw/hfi1/trace_tx.h

260

__field(u8, shift)

drivers/infiniband/hw/hfi1/trace_tx.h

268

__entry->shift = shift;

drivers/infiniband/hw/hfi1/trace_tx.h

277

__entry->shift

drivers/infiniband/hw/hns/hns_roce_common.h

42

#define roce_get_field(origin, mask, shift) \

drivers/infiniband/hw/hns/hns_roce_common.h

43

((le32_to_cpu(origin) & (mask)) >> (u32)(shift))

drivers/infiniband/hw/hns/hns_roce_common.h

45

#define roce_get_bit(origin, shift) \

drivers/infiniband/hw/hns/hns_roce_common.h

46

roce_get_field((origin), (1ul << (shift)), (shift))

drivers/infiniband/hw/hns/hns_roce_common.h

48

#define roce_set_field(origin, mask, shift, val) \

drivers/infiniband/hw/hns/hns_roce_common.h

52

cpu_to_le32(((u32)(val) << (u32)(shift)) & (mask)); \

drivers/infiniband/hw/hns/hns_roce_common.h

55

#define roce_set_bit(origin, shift, val) \

drivers/infiniband/hw/hns/hns_roce_common.h

56

roce_set_field((origin), (1ul << (shift)), (shift), (val))

drivers/infiniband/hw/hns/hns_roce_device.h

719

int shift;

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

6832

eq->shift = ilog2((unsigned int)eq->entries);

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

6885

hr_reg_write(eqc, EQC_SHIFT, eq->shift);

drivers/infiniband/hw/irdma/uk.c

1466

u32 inline_data, u8 *shift)

drivers/infiniband/hw/irdma/uk.c

1468

*shift = 0;

drivers/infiniband/hw/irdma/uk.c

1472

*shift = 1;

drivers/infiniband/hw/irdma/uk.c

1474

*shift = 2;

drivers/infiniband/hw/irdma/uk.c

1476

*shift = 3;

drivers/infiniband/hw/irdma/uk.c

1479

*shift = (sge < 4 && inline_data <= 48) ? 1 : 2;

drivers/infiniband/hw/irdma/uk.c

1491

int irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, u32 sq_size, u8 shift,

drivers/infiniband/hw/irdma/uk.c

1494

u32 min_hw_quanta = (u32)uk_attrs->min_hw_wq_size << shift;

drivers/infiniband/hw/irdma/uk.c

1496

irdma_round_up_wq(((u64)sq_size << shift) + IRDMA_SQ_RSVD);

drivers/infiniband/hw/irdma/uk.c

1514

int irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs, u32 rq_size, u8 shift,

drivers/infiniband/hw/irdma/uk.c

1517

u32 min_hw_quanta = (u32)uk_attrs->min_hw_wq_size << shift;

drivers/infiniband/hw/irdma/uk.c

1519

irdma_round_up_wq(((u64)rq_size << shift) + IRDMA_RQ_RSVD);

drivers/infiniband/hw/irdma/uk.c

1537

int irdma_get_srqdepth(struct irdma_uk_attrs *uk_attrs, u32 srq_size, u8 shift,

drivers/infiniband/hw/irdma/uk.c

1540

u32 min_hw_quanta = (u32)uk_attrs->min_hw_wq_size << shift;

drivers/infiniband/hw/irdma/uk.c

1542

irdma_round_up_wq(((u64)srq_size << shift) + IRDMA_RQ_RSVD);

drivers/infiniband/hw/irdma/user.h

590

u32 inline_data, u8 *shift);

drivers/infiniband/hw/irdma/user.h

591

int irdma_get_sqdepth(struct irdma_uk_attrs *uk_attrs, u32 sq_size, u8 shift,

drivers/infiniband/hw/irdma/user.h

593

int irdma_get_rqdepth(struct irdma_uk_attrs *uk_attrs, u32 rq_size, u8 shift,

drivers/infiniband/hw/irdma/user.h

595

int irdma_get_srqdepth(struct irdma_uk_attrs *uk_attrs, u32 srq_size, u8 shift,

drivers/infiniband/hw/irdma/verbs.c

2296

u8 shift)

drivers/infiniband/hw/irdma/verbs.c

2312

ukinfo->srq_size = depth >> shift;

drivers/infiniband/hw/irdma/verbs.c

2343

u8 shift;

drivers/infiniband/hw/irdma/verbs.c

2367

&shift);

drivers/infiniband/hw/irdma/verbs.c

2370

shift, &depth);

drivers/infiniband/hw/irdma/verbs.c

2375

ukinfo->srq_size = depth >> shift;

drivers/infiniband/hw/irdma/verbs.c

2378

iwsrq->max_wr = (depth - IRDMA_RQ_RSVD) >> shift;

drivers/infiniband/hw/irdma/verbs.c

2385

shift);

drivers/infiniband/hw/mlx4/cq.c

144

int shift;

drivers/infiniband/hw/mlx4/cq.c

152

shift = mlx4_ib_umem_calc_optimal_mtt_size(*umem, 0, &n);

drivers/infiniband/hw/mlx4/cq.c

153

if (shift < 0) {

drivers/infiniband/hw/mlx4/cq.c

154

err = shift;

drivers/infiniband/hw/mlx4/cq.c

158

err = mlx4_mtt_init(dev->dev, n, shift, &buf->mtt);

drivers/infiniband/hw/mlx4/mlx4_ib.h

68

#define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)

drivers/infiniband/hw/mlx4/mr.c

147

int shift;

drivers/infiniband/hw/mlx4/mr.c

164

shift = mlx4_ib_umem_calc_optimal_mtt_size(mr->umem, start, &n);

drivers/infiniband/hw/mlx4/mr.c

165

if (shift < 0) {

drivers/infiniband/hw/mlx4/mr.c

166

err = shift;

drivers/infiniband/hw/mlx4/mr.c

171

convert_access(access_flags), n, shift, &mr->mmr);

drivers/infiniband/hw/mlx4/mr.c

184

mr->ibmr.page_size = 1U << shift;

drivers/infiniband/hw/mlx4/mr.c

242

int shift;

drivers/infiniband/hw/mlx4/mr.c

256

shift = PAGE_SHIFT;

drivers/infiniband/hw/mlx4/mr.c

259

virt_addr, length, n, shift,

drivers/infiniband/hw/mlx4/qp.c

1071

int shift;

drivers/infiniband/hw/mlx4/qp.c

1112

shift = mlx4_ib_umem_calc_optimal_mtt_size(qp->umem, 0, &n);

drivers/infiniband/hw/mlx4/qp.c

1113

if (shift < 0) {

drivers/infiniband/hw/mlx4/qp.c

1114

err = shift;

drivers/infiniband/hw/mlx4/qp.c

1118

err = mlx4_mtt_init(dev->dev, n, shift, &qp->mtt);

drivers/infiniband/hw/mlx4/qp.c

872

int shift;

drivers/infiniband/hw/mlx4/qp.c

925

shift = mlx4_ib_umem_calc_optimal_mtt_size(qp->umem, 0, &n);

drivers/infiniband/hw/mlx4/qp.c

926

if (shift < 0) {

drivers/infiniband/hw/mlx4/qp.c

927

err = shift;

drivers/infiniband/hw/mlx4/qp.c

931

err = mlx4_mtt_init(dev->dev, n, shift, &qp->mtt);

drivers/infiniband/hw/mthca/mthca_allocator.c

194

int npages, shift;

drivers/infiniband/hw/mthca/mthca_allocator.c

202

shift = get_order(size) + PAGE_SHIFT;

drivers/infiniband/hw/mthca/mthca_allocator.c

211

while (t & ((1 << shift) - 1)) {

drivers/infiniband/hw/mthca/mthca_allocator.c

212

--shift;

drivers/infiniband/hw/mthca/mthca_allocator.c

222

dma_list[i] = t + i * (1 << shift);

drivers/infiniband/hw/mthca/mthca_allocator.c

226

shift = PAGE_SHIFT;

drivers/infiniband/hw/mthca/mthca_allocator.c

255

dma_list, shift, npages,

drivers/infiniband/sw/rdmavt/mr.c

46

rdi->lkey_table.shift = 32 - lkey_table_size;

drivers/infiniband/sw/rdmavt/mr.c

758

mr = rcu_dereference(rkt->table[sge->lkey >> rkt->shift]);

drivers/infiniband/sw/rdmavt/mr.c

866

mr = rcu_dereference(rkt->table[rkey >> rkt->shift]);

drivers/infiniband/sw/rdmavt/qp.c

2505

void rvt_add_retry_timer_ext(struct rvt_qp *qp, u8 shift)

drivers/infiniband/sw/rdmavt/qp.c

2514

(qp->timeout_jiffies << shift);

drivers/input/joystick/adc-joystick.c

92

val >>= joy->chans[i].channel->scan_type.shift;

drivers/input/joystick/gf2k.c

141

static int gf2k_get_bits(unsigned char *buf, int pos, int num, int shift)

drivers/input/joystick/gf2k.c

150

data <<= shift;

drivers/input/joystick/grip.c

105

static int grip_xt_read_packet(struct gameport *gameport, int shift, unsigned int *data)

drivers/input/joystick/grip.c

121

v = w = (gameport_read(gameport) >> shift) & 3;

drivers/input/joystick/grip.c

125

u = (gameport_read(gameport) >> shift) & 3;

drivers/input/joystick/grip.c

65

static int grip_gpp_read_packet(struct gameport *gameport, int shift, unsigned int *data)

drivers/input/joystick/grip.c

80

v = gameport_read(gameport) >> shift;

drivers/input/joystick/grip.c

84

u = v; v = (gameport_read(gameport) >> shift) & 3;

drivers/input/misc/bma150.c

167

int val, int shift, u8 mask, u8 reg)

drivers/input/misc/bma150.c

175

data = (data & ~mask) | ((val << shift) & mask);

drivers/input/misc/kxtj9.c

114

x >>= tj9->shift;

drivers/input/misc/kxtj9.c

115

y >>= tj9->shift;

drivers/input/misc/kxtj9.c

116

z >>= tj9->shift;

drivers/input/misc/kxtj9.c

144

tj9->shift = 4;

drivers/input/misc/kxtj9.c

147

tj9->shift = 3;

drivers/input/misc/kxtj9.c

150

tj9->shift = 2;

drivers/input/misc/kxtj9.c

74

u8 shift;

drivers/input/touchscreen/egalax_ts_serial.c

53

u8 shift;

drivers/input/touchscreen/egalax_ts_serial.c

56

shift = 3 - ((data[0] & EGALAX_FORMAT_RESOLUTION_MASK) >> 1);

drivers/input/touchscreen/egalax_ts_serial.c

57

mask = 0xff >> (shift + 1);

drivers/input/touchscreen/egalax_ts_serial.c

59

x = (((u16)(data[1] & mask) << 7) | (data[2] & 0x7f)) << shift;

drivers/input/touchscreen/egalax_ts_serial.c

60

y = (((u16)(data[3] & mask) << 7) | (data[4] & 0x7f)) << shift;

drivers/input/touchscreen/usbtouchscreen.c

539

unsigned int shift;

drivers/input/touchscreen/usbtouchscreen.c

545

shift = (6 - (pkt[0] & 0x03));

drivers/input/touchscreen/usbtouchscreen.c

546

dev->x = ((pkt[3] << 7) | pkt[4]) >> shift;

drivers/input/touchscreen/usbtouchscreen.c

547

dev->y = ((pkt[1] << 7) | pkt[2]) >> shift;

drivers/iommu/amd/init.c

418

static void iommu_feature_set(struct amd_iommu *iommu, u64 val, u64 mask, u8 shift)

drivers/iommu/amd/init.c

423

mask <<= shift;

drivers/iommu/amd/init.c

425

ctrl |= (val << shift) & mask;

drivers/iommu/dma-iommu.c

754

unsigned long shift, iova_len, iova;

drivers/iommu/dma-iommu.c

761

shift = iova_shift(iovad);

drivers/iommu/dma-iommu.c

762

iova_len = size >> shift;

drivers/iommu/dma-iommu.c

782

DMA_BIT_MASK(32) >> shift, false);

drivers/iommu/dma-iommu.c

790

iova = alloc_iova_fast(iovad, iova_len, dma_limit >> shift, true);

drivers/iommu/dma-iommu.c

792

return (dma_addr_t)iova << shift;

drivers/iommu/intel/debugfs.c

496

int index, shift = qi_shift(iommu);

drivers/iommu/intel/debugfs.c

506

offset = index << shift;

drivers/iommu/intel/debugfs.c

526

int shift;

drivers/iommu/intel/debugfs.c

531

shift = qi_shift(iommu);

drivers/iommu/intel/debugfs.c

541

dmar_readq(iommu->reg + DMAR_IQH_REG) >> shift,

drivers/iommu/intel/debugfs.c

542

dmar_readq(iommu->reg + DMAR_IQT_REG) >> shift);

drivers/iommu/intel/dmar.c

1278

int shift = qi_shift(iommu);

drivers/iommu/intel/dmar.c

1294

if ((head >> shift) == index) {

drivers/iommu/intel/dmar.c

1302

memcpy(desc, qi->desc + (wait_index << shift),

drivers/iommu/intel/dmar.c

1303

1 << shift);

drivers/iommu/intel/dmar.c

1316

head = ((head >> shift) - 1 + QI_LENGTH) % QI_LENGTH;

drivers/iommu/intel/dmar.c

1318

tail = ((tail >> shift) - 1 + QI_LENGTH) % QI_LENGTH;

drivers/iommu/intel/dmar.c

1378

int offset, shift;

drivers/iommu/intel/dmar.c

1416

shift = qi_shift(iommu);

drivers/iommu/intel/dmar.c

1419

offset = ((index + i) % QI_LENGTH) << shift;

drivers/iommu/intel/dmar.c

1420

memcpy(qi->desc + offset, &desc[i], 1 << shift);

drivers/iommu/intel/dmar.c

1435

offset = wait_index << shift;

drivers/iommu/intel/dmar.c

1436

memcpy(qi->desc + offset, &wait_desc, 1 << shift);

drivers/iommu/intel/dmar.c

1445

writel(qi->free_head << shift, iommu->reg + DMAR_IQT_REG);

drivers/iommu/intel/perfmon.c

306

int shift = 64 - iommu_pmu->cntr_width;

drivers/iommu/intel/perfmon.c

318

delta = (new_count << shift) - (prev_count << shift);

drivers/iommu/intel/perfmon.c

319

delta >>= shift;

drivers/iommu/intel/prq.c

131

int shift = 64 - (__VIRTUAL_MASK_SHIFT + 1);

drivers/iommu/intel/prq.c

134

return (((saddr << shift) >> shift) == saddr);

drivers/iommu/msm_iommu_hw-8xxx.h

33

#define GET_FIELD(addr, mask, shift) ((readl(addr) >> (shift)) & (mask))

drivers/iommu/msm_iommu_hw-8xxx.h

35

#define SET_FIELD(addr, mask, shift, v) \

drivers/iommu/msm_iommu_hw-8xxx.h

38

writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\

drivers/iommu/riscv/iommu.c

1125

const int shift = PAGE_SHIFT + PT_SHIFT * level;

drivers/iommu/riscv/iommu.c

1127

ptr += ((iova >> shift) & (PTRS_PER_PTE - 1));

drivers/iommu/riscv/iommu.c

1133

if (((size_t)1 << shift) == pgsize)

drivers/iommu/riscv/iommu.c

1174

const int shift = PAGE_SHIFT + PT_SHIFT * level;

drivers/iommu/riscv/iommu.c

1176

ptr += ((iova >> shift) & (PTRS_PER_PTE - 1));

drivers/iommu/riscv/iommu.c

1179

*pte_pgsize = (size_t)1 << shift;

drivers/iommu/sprd-iommu.c

105

u32 mask, u32 shift, u32 val)

drivers/iommu/sprd-iommu.c

109

t = (t & (~(mask << shift))) | ((val & mask) << shift);

drivers/irqchip/irq-gic.c

778

unsigned long shift = offset * 8;

drivers/irqchip/irq-gic.c

786

val &= ~GENMASK(shift + 7, shift);

drivers/irqchip/irq-gic.c

787

val |= bval << shift;

drivers/irqchip/irq-hip04.c

151

unsigned int cpu, shift = (hip04_irq(d) % 2) * 16;

drivers/irqchip/irq-hip04.c

164

mask = 0xffff << shift;

drivers/irqchip/irq-hip04.c

165

bit = hip04_cpu_map[cpu] << shift;

drivers/irqchip/irq-pic32-evic.c

107

u32 reg, shift;

drivers/irqchip/irq-pic32-evic.c

110

shift = (irq % 4) * 8;

drivers/irqchip/irq-pic32-evic.c

112

writel(PRIORITY_MASK << shift,

drivers/irqchip/irq-pic32-evic.c

114

writel(priority << shift,

drivers/irqchip/irq-qcom-mpm.c

114

unsigned int shift = pin % 32;

drivers/irqchip/irq-qcom-mpm.c

120

__assign_bit(shift, &val, en);

drivers/irqchip/irq-qcom-mpm.c

143

unsigned int index, unsigned int shift)

drivers/irqchip/irq-qcom-mpm.c

150

__assign_bit(shift, &val, set);

drivers/irqchip/irq-qcom-mpm.c

161

unsigned int shift = pin % 32;

drivers/irqchip/irq-qcom-mpm.c

164

mpm_set_type(priv, true, MPM_REG_RISING_EDGE, index, shift);

drivers/irqchip/irq-qcom-mpm.c

166

mpm_set_type(priv, false, MPM_REG_RISING_EDGE, index, shift);

drivers/irqchip/irq-qcom-mpm.c

169

mpm_set_type(priv, true, MPM_REG_FALLING_EDGE, index, shift);

drivers/irqchip/irq-qcom-mpm.c

171

mpm_set_type(priv, false, MPM_REG_FALLING_EDGE, index, shift);

drivers/irqchip/irq-qcom-mpm.c

174

mpm_set_type(priv, true, MPM_REG_POLARITY, index, shift);

drivers/irqchip/irq-qcom-mpm.c

176

mpm_set_type(priv, false, MPM_REG_POLARITY, index, shift);

drivers/irqchip/irq-realtek-rtl.c

43

unsigned int shift = IRR_SHIFT(idx);

drivers/irqchip/irq-realtek-rtl.c

46

irr = readl(irr0 + offset) & ~(0xf << shift);

drivers/irqchip/irq-realtek-rtl.c

47

irr |= (value & 0xf) << shift;

drivers/irqchip/irq-renesas-intc-irqpin.c

127

int reg, int shift,

drivers/irqchip/irq-renesas-intc-irqpin.c

136

tmp &= ~(((1 << width) - 1) << shift);

drivers/irqchip/irq-renesas-intc-irqpin.c

137

tmp |= value << shift;

drivers/irqchip/irq-renesas-intc-irqpin.c

148

int shift = 32 - (irq + 1) * bitfield_width;

drivers/irqchip/irq-renesas-intc-irqpin.c

151

shift, bitfield_width,

drivers/irqchip/irq-renesas-intc-irqpin.c

159

int shift = 32 - (irq + 1) * bitfield_width;

drivers/irqchip/irq-renesas-intc-irqpin.c

166

intc_irqpin_read_modify_write(p, INTC_IRQPIN_REG_SENSE, shift,

drivers/irqchip/irq-sp7021-intc.c

148

u32 shift = ext_num ? GROUP_SHIFT_EXT1 : GROUP_SHIFT_EXT0;

drivers/irqchip/irq-sp7021-intc.c

155

pending_group = (groups >> shift) & GROUP_MASK;

drivers/irqchip/spear-shirq.c

61

u32 val, shift = d->irq - shirq->virq_base + shirq->offset;

drivers/irqchip/spear-shirq.c

65

val = readl(reg) & ~(0x1 << shift);

drivers/irqchip/spear-shirq.c

73

u32 val, shift = d->irq - shirq->virq_base + shirq->offset;

drivers/irqchip/spear-shirq.c

77

val = readl(reg) | (0x1 << shift);

drivers/isdn/mISDN/dsp_audio.c

396

int shift;

drivers/isdn/mISDN/dsp_audio.c

403

shift = volume + 8;

drivers/isdn/mISDN/dsp_audio.c

404

if (shift < 0)

drivers/isdn/mISDN/dsp_audio.c

405

shift = 0;

drivers/isdn/mISDN/dsp_audio.c

407

shift = volume + 7;

drivers/isdn/mISDN/dsp_audio.c

408

if (shift > 15)

drivers/isdn/mISDN/dsp_audio.c

409

shift = 15;

drivers/isdn/mISDN/dsp_audio.c

411

volume_change = dsp_audio_volume_change[shift];

drivers/leds/blink/leds-bcm63138.c

101

BCM63138_LED_MASK << shift, value << shift);

drivers/leds/blink/leds-bcm63138.c

109

int shift = (led->pin & (BCM63138_LEDS_PER_REG - 1)) * BCM63138_LED_BITS;

drivers/leds/blink/leds-bcm63138.c

112

BCM63138_LED_MASK << shift, value << shift);

drivers/leds/blink/leds-bcm63138.c

98

int shift = (led->pin & (BCM63138_LEDS_PER_REG - 1)) * BCM63138_LED_BITS;

drivers/leds/flash/leds-qcom-flash.c

344

u8 shift, ires_mask = 0, ires_val = 0, chan_id;

drivers/leds/flash/leds-qcom-flash.c

367

shift = chan_id * 2;

drivers/leds/flash/leds-qcom-flash.c

368

ires_mask |= FLASH_IRES_MASK_3CH << shift;

drivers/leds/flash/leds-qcom-flash.c

370

(FLASH_IRES_12P5MA_VAL << shift) :

drivers/leds/flash/leds-qcom-flash.c

371

(FLASH_IRES_5MA_VAL_3CH << shift));

drivers/leds/flash/leds-qcom-flash.c

373

shift = chan_id;

drivers/leds/flash/leds-qcom-flash.c

374

ires_mask |= FLASH_IRES_MASK_4CH << shift;

drivers/leds/flash/leds-qcom-flash.c

376

(FLASH_IRES_12P5MA_VAL << shift) :

drivers/leds/flash/leds-qcom-flash.c

377

(FLASH_IRES_5MA_VAL_4CH << shift));

drivers/leds/flash/leds-qcom-flash.c

512

u8 shift, chan_id, chan_mask = 0;

drivers/leds/flash/leds-qcom-flash.c

523

shift = chan_id * 2;

drivers/leds/flash/leds-qcom-flash.c

525

if (val & BIT(shift))

drivers/leds/flash/leds-qcom-flash.c

573

shift = chan_id * 2;

drivers/leds/flash/leds-qcom-flash.c

575

if (val & BIT(shift))

drivers/leds/leds-bcm6328.c

113

unsigned long val, shift;

drivers/leds/leds-bcm6328.c

115

shift = bcm6328_pin2shift(led->pin);

drivers/leds/leds-bcm6328.c

116

if (shift >= 16)

drivers/leds/leds-bcm6328.c

122

val &= ~(BCM6328_LED_MODE_MASK << BCM6328_LED_SHIFT(shift % 16));

drivers/leds/leds-bcm6328.c

123

val |= (value << BCM6328_LED_SHIFT(shift % 16));

drivers/leds/leds-bcm6328.c

334

unsigned long val, shift;

drivers/leds/leds-bcm6328.c

359

shift = bcm6328_pin2shift(led->pin);

drivers/leds/leds-bcm6328.c

360

if (shift >= 16)

drivers/leds/leds-bcm6328.c

365

val = bcm6328_led_read(mode) >> BCM6328_LED_SHIFT(shift % 16);

drivers/leds/leds-lm355x.c

220

<< preg[REG_TORCH_CTRL].shift);

drivers/leds/leds-lm355x.c

230

preg[REG_TORCH_CFG].shift);

drivers/leds/leds-lm355x.c

245

<< preg[REG_FLASH_CTRL].shift);

drivers/leds/leds-lm355x.c

259

preg[REG_STROBE_CFG].shift);

drivers/leds/leds-lm355x.c

273

<< preg[REG_INDI_CTRL].shift);

drivers/leds/leds-lm355x.c

283

preg[REG_INDI_CFG].shift);

drivers/leds/leds-lm355x.c

297

opmode << preg[REG_OPMODE].shift);

drivers/leds/leds-lm355x.c

46

u8 shift;

drivers/leds/leds-lp5569.c

476

.shift = LP5569_MODE_ENG_SHIFT,

drivers/leds/leds-lp5569.c

480

.shift = LP5569_EXEC_ENG_SHIFT,

drivers/leds/leds-lp55xx-common.c

125

mask = LP55xx_MODE_ENGn_MASK(idx, cfg->reg_op_mode.shift);

drivers/leds/leds-lp55xx-common.c

126

val = LP55xx_MODE_LOAD_ENG << LP55xx_MODE_ENGn_SHIFT(idx, cfg->reg_op_mode.shift);

drivers/leds/leds-lp55xx-common.c

155

if (LP55xx_MODE_ENGn_GET(i, mode, cfg->reg_op_mode.shift) != LP55xx_MODE_LOAD_ENG)

drivers/leds/leds-lp55xx-common.c

158

mode &= ~LP55xx_MODE_ENGn_MASK(i, cfg->reg_op_mode.shift);

drivers/leds/leds-lp55xx-common.c

159

mode |= LP55xx_MODE_RUN_ENG << LP55xx_MODE_ENGn_SHIFT(i, cfg->reg_op_mode.shift);

drivers/leds/leds-lp55xx-common.c

160

exec &= ~LP55xx_EXEC_ENGn_MASK(i, cfg->reg_exec.shift);

drivers/leds/leds-lp55xx-common.c

161

exec |= LP55xx_EXEC_RUN_ENG << LP55xx_EXEC_ENGn_SHIFT(i, cfg->reg_exec.shift);

drivers/leds/leds-lp55xx-common.c

333

mask = LP55xx_MODE_ENGn_MASK(idx, cfg->reg_op_mode.shift);

drivers/leds/leds-lp55xx-common.c

48

#define LP55xx_MODE_ENGn_SHIFT(n, shift) ((shift) + (2 * (3 - (n))))

drivers/leds/leds-lp55xx-common.c

49

#define LP55xx_MODE_ENGn_MASK(n, shift) (LP55xx_MODE_ENG_MASK << LP55xx_MODE_ENGn_SHIFT(n, shift))

drivers/leds/leds-lp55xx-common.c

50

#define LP55xx_MODE_ENGn_GET(n, mode, shift) \

drivers/leds/leds-lp55xx-common.c

51

(((mode) >> LP55xx_MODE_ENGn_SHIFT(n, shift)) & LP55xx_MODE_ENG_MASK)

drivers/leds/leds-lp55xx-common.c

59

#define LP55xx_EXEC_ENGn_SHIFT(n, shift) ((shift) + (2 * (3 - (n))))

drivers/leds/leds-lp55xx-common.c

60

#define LP55xx_EXEC_ENGn_MASK(n, shift) (LP55xx_EXEC_ENG_MASK << LP55xx_EXEC_ENGn_SHIFT(n, shift))

drivers/leds/leds-lp55xx-common.h

110

u8 shift;

drivers/leds/leds-mc13783.c

100

shift = 3 + (led->id - MC34708_LED_R) * 12;

drivers/leds/leds-mc13783.c

107

mc13xxx_max_brightness(led->id) << shift,

drivers/leds/leds-mc13783.c

108

value << shift);

drivers/leds/leds-mc13783.c

59

unsigned int reg, bank, off, shift;

drivers/leds/leds-mc13783.c

66

shift = 9 + (led->id - MC13783_LED_MD) * 4;

drivers/leds/leds-mc13783.c

80

shift = (off - bank * 3) * 5 + 6;

drivers/leds/leds-mc13783.c

87

shift = 3 + (off - reg * 2) * 12;

drivers/leds/leds-mc13783.c

95

shift = (off - bank * 2) * 12 + 3;

drivers/leds/leds-pca963x.c

124

int shift;

drivers/leds/leds-pca963x.c

128

shift = 2 * (led->led_num % 4);

drivers/leds/leds-pca963x.c

129

mask = 0x3 << shift;

drivers/leds/leds-pca963x.c

135

val = (ledout & ~mask) | (PCA963X_LED_GRP_PWM << shift);

drivers/leds/leds-pca963x.c

141

val = (ledout & ~mask) | (PCA963X_LED_ON << shift);

drivers/leds/leds-pca963x.c

159

val = (ledout & ~mask) | (PCA963X_LED_GRP_PWM << shift);

drivers/leds/leds-pca963x.c

161

val = (ledout & ~mask) | (PCA963X_LED_PWM << shift);

drivers/leds/leds-pca963x.c

175

int shift;

drivers/leds/leds-pca963x.c

178

shift = 2 * (led->led_num % 4);

drivers/leds/leds-pca963x.c

179

mask = 0x3 << shift;

drivers/leds/leds-pca963x.c

193

if ((ledout & mask) != (PCA963X_LED_GRP_PWM << shift)) {

drivers/leds/leds-pca963x.c

194

val = (ledout & ~mask) | (PCA963X_LED_GRP_PWM << shift);

drivers/leds/leds-pca995x.c

109

PCA995X_LDRX_MASK << shift,

drivers/leds/leds-pca995x.c

110

PCA995X_LED_PWM_MODE << shift);

drivers/leds/leds-pca995x.c

84

int shift, ret;

drivers/leds/leds-pca995x.c

88

shift = PCA995X_LDRX_BITS * (led->led_no % PCA995X_OUTPUTS_PER_REG);

drivers/leds/leds-pca995x.c

93

PCA995X_LDRX_MASK << shift,

drivers/leds/leds-pca995x.c

94

PCA995X_LED_ON << shift);

drivers/leds/leds-pca995x.c

97

PCA995X_LDRX_MASK << shift, 0);

drivers/leds/rgb/leds-lp5812.h

129

u8 shift;

drivers/macintosh/windfarm_fcu_controls.c

148

int rc, shift = pv->rpm_shift;

drivers/macintosh/windfarm_fcu_controls.c

158

buf[0] = value >> (8 - shift);

drivers/macintosh/windfarm_fcu_controls.c

159

buf[1] = value << shift;

drivers/macintosh/windfarm_fcu_controls.c

170

int rc, reg_base, shift = pv->rpm_shift;

drivers/macintosh/windfarm_fcu_controls.c

196

*value = (buf[0] << (8 - shift)) | buf[1] >> shift;

drivers/macintosh/windfarm_smu_sat.c

153

val = ((sat->cache[i] << 8) + sat->cache[i+1]) << sens->shift;

drivers/macintosh/windfarm_smu_sat.c

202

int shift, cpu, index;

drivers/macintosh/windfarm_smu_sat.c

251

shift = 4;

drivers/macintosh/windfarm_smu_sat.c

255

shift = 8;

drivers/macintosh/windfarm_smu_sat.c

259

shift = 10;

drivers/macintosh/windfarm_smu_sat.c

272

sens->shift = shift;

drivers/macintosh/windfarm_smu_sat.c

299

sens->shift = 0;

drivers/macintosh/windfarm_smu_sat.c

44

int shift;

drivers/mailbox/mtk-cmdq-mailbox.c

108

return (addr + pdata->mminfra_offset) >> pdata->shift;

drivers/mailbox/mtk-cmdq-mailbox.c

114

return ((dma_addr_t)addr << pdata->shift) - pdata->mminfra_offset;

drivers/mailbox/mtk-cmdq-mailbox.c

121

priv->shift_pa = cmdq->pdata->shift;

drivers/mailbox/mtk-cmdq-mailbox.c

130

return cmdq->pdata->shift;

drivers/mailbox/mtk-cmdq-mailbox.c

301

writel(next_task->pa_base >> cmdq->pdata->shift,

drivers/mailbox/mtk-cmdq-mailbox.c

496

writel(task->pa_base >> cmdq->pdata->shift,

drivers/mailbox/mtk-cmdq-mailbox.c

502

writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->pdata->shift,

drivers/mailbox/mtk-cmdq-mailbox.c

719

DMA_BIT_MASK(sizeof(u32) * BITS_PER_BYTE + cmdq->pdata->shift));

drivers/mailbox/mtk-cmdq-mailbox.c

792

.shift = 3,

drivers/mailbox/mtk-cmdq-mailbox.c

799

.shift = 0,

drivers/mailbox/mtk-cmdq-mailbox.c

806

.shift = 0,

drivers/mailbox/mtk-cmdq-mailbox.c

813

.shift = 3,

drivers/mailbox/mtk-cmdq-mailbox.c

821

.shift = 3,

drivers/mailbox/mtk-cmdq-mailbox.c

828

.shift = 3,

drivers/mailbox/mtk-cmdq-mailbox.c

835

.shift = 3,

drivers/mailbox/mtk-cmdq-mailbox.c

842

.shift = 3,

drivers/mailbox/mtk-cmdq-mailbox.c

97

u8 shift;

drivers/md/bcache/bset.c

420

unsigned int shift = fls(size - 1) - b;

drivers/md/bcache/bset.c

425

j <<= shift;

drivers/md/bcache/bset.c

446

unsigned int shift;

drivers/md/bcache/bset.c

451

shift = ffs(j);

drivers/md/bcache/bset.c

453

j >>= shift;

drivers/md/bcache/bset.c

454

j |= roundup_pow_of_two(size) >> shift;

drivers/md/bcache/bset.c

563

static inline uint64_t shrd128(uint64_t high, uint64_t low, uint8_t shift)

drivers/md/bcache/bset.c

565

low >>= shift;

drivers/md/bcache/bset.c

566

low |= (high << 1) << (63U - shift);

drivers/md/bcache/bset.c

787

unsigned int shift = bkey_u64s(k);

drivers/md/bcache/bset.c

808

t->prev[j] += shift;

drivers/md/dm-crypt.c

120

int shift;

drivers/md/dm-crypt.c

428

cc->iv_gen_private.benbi.shift = 9 - log;

drivers/md/dm-crypt.c

444

val = cpu_to_be64(((u64)dmreq->iv_sector << cc->iv_gen_private.benbi.shift) + 1);

drivers/md/dm-kcopyd.c

153

int shift = fls(t->total_period >> ACCOUNT_INTERVAL_SHIFT);

drivers/md/dm-kcopyd.c

155

t->total_period >>= shift;

drivers/md/dm-kcopyd.c

156

t->io_period >>= shift;

drivers/md/dm-region-hash.c

206

rh->shift = RH_HASH_SHIFT;

drivers/md/dm-region-hash.c

271

return (unsigned int) ((region * rh->prime) >> rh->shift) & rh->mask;

drivers/md/dm-region-hash.c

72

unsigned int shift;

drivers/md/dm-vdo/indexer/delta-index.c

1418

int shift = offset % BITS_PER_BYTE;

drivers/md/dm-vdo/indexer/delta-index.c

1421

*name++ = get_unaligned_le16(addr++) >> shift;

drivers/md/dm-vdo/indexer/delta-index.c

1429

int shift = offset % BITS_PER_BYTE;

drivers/md/dm-vdo/indexer/delta-index.c

1430

u16 mask = ~((u16) 0xFF << shift);

drivers/md/dm-vdo/indexer/delta-index.c

1434

data = (get_unaligned_le16(addr) & mask) | (*name++ << shift);

drivers/md/dm-vdo/indexer/delta-index.c

415

int shift = offset % BITS_PER_BYTE;

drivers/md/dm-vdo/indexer/delta-index.c

418

data &= ~(((1 << size) - 1) << shift);

drivers/md/dm-vdo/indexer/delta-index.c

419

data |= value << shift;

drivers/md/dm-vdo/indexer/delta-index.c

573

u8 shift = offset % BITS_PER_BYTE;

drivers/md/dm-vdo/indexer/delta-index.c

576

data &= ~(((1UL << size) - 1) << shift);

drivers/md/dm-vdo/indexer/delta-index.c

577

data |= value << shift;

drivers/md/dm-vdo/indexer/delta-index.c

586

u8 shift = offset % BITS_PER_BYTE;

drivers/md/dm-vdo/indexer/delta-index.c

587

u32 count = size + shift > BITS_PER_BYTE ? (u32) BITS_PER_BYTE - shift : size;

drivers/md/dm-vdo/indexer/delta-index.c

589

*addr++ &= ~(((1 << count) - 1) << shift);

drivers/md/md.c

1401

rdev->badblocks.shift = -1;

drivers/md/md.c

1911

rdev->badblocks.shift = sb->bblog_shift;

drivers/md/md.c

1924

rdev->badblocks.shift = 0;

drivers/md/md.c

3222

rdev->badblocks.shift = 0;

drivers/md/md.c

6292

int shift;

drivers/md/md.c

6310

shift = partitioned ? MdpMinorShift : 0;

drivers/md/md.c

6311

unit = MINOR(mddev->unit) >> shift;

drivers/md/md.c

6341

disk->first_minor = unit << shift;

drivers/md/md.c

6342

disk->minors = 1 << shift;

drivers/md/persistent-data/dm-btree-remove.c

106

shift * sizeof(__le64));

drivers/md/persistent-data/dm-btree-remove.c

109

shift * value_size);

drivers/md/persistent-data/dm-btree-remove.c

111

if (shift > le32_to_cpu(right->header.max_entries)) {

drivers/md/persistent-data/dm-btree-remove.c

117

key_ptr(left, nr_left - shift),

drivers/md/persistent-data/dm-btree-remove.c

118

shift * sizeof(__le64));

drivers/md/persistent-data/dm-btree-remove.c

120

value_ptr(left, nr_left - shift),

drivers/md/persistent-data/dm-btree-remove.c

121

shift * value_size);

drivers/md/persistent-data/dm-btree-remove.c

271

ret = shift(left, right, nr_left - target_left);

drivers/md/persistent-data/dm-btree-remove.c

317

unsigned int shift = min(max_entries - nr_left, nr_center);

drivers/md/persistent-data/dm-btree-remove.c

319

if (nr_left + shift > max_entries) {

drivers/md/persistent-data/dm-btree-remove.c

324

node_copy(left, center, -shift);

drivers/md/persistent-data/dm-btree-remove.c

325

left->header.nr_entries = cpu_to_le32(nr_left + shift);

drivers/md/persistent-data/dm-btree-remove.c

327

if (shift != nr_center) {

drivers/md/persistent-data/dm-btree-remove.c

328

shift = nr_center - shift;

drivers/md/persistent-data/dm-btree-remove.c

330

if ((nr_right + shift) > max_entries) {

drivers/md/persistent-data/dm-btree-remove.c

335

node_shift(right, shift);

drivers/md/persistent-data/dm-btree-remove.c

336

node_copy(center, right, shift);

drivers/md/persistent-data/dm-btree-remove.c

337

right->header.nr_entries = cpu_to_le32(nr_right + shift);

drivers/md/persistent-data/dm-btree-remove.c

371

ret = shift(left, center, -nr_center);

drivers/md/persistent-data/dm-btree-remove.c

376

ret = shift(left, right, s);

drivers/md/persistent-data/dm-btree-remove.c

382

ret = shift(left, center, s);

drivers/md/persistent-data/dm-btree-remove.c

387

ret = shift(center, right, target_right - nr_right);

drivers/md/persistent-data/dm-btree-remove.c

394

ret = shift(center, right, nr_center);

drivers/md/persistent-data/dm-btree-remove.c

398

ret = shift(left, right, s);

drivers/md/persistent-data/dm-btree-remove.c

403

ret = shift(center, right, s);

drivers/md/persistent-data/dm-btree-remove.c

408

ret = shift(left, center, nr_left - target_left);

drivers/md/persistent-data/dm-btree-remove.c

60

static void node_shift(struct btree_node *n, int shift)

drivers/md/persistent-data/dm-btree-remove.c

65

if (shift < 0) {

drivers/md/persistent-data/dm-btree-remove.c

66

shift = -shift;

drivers/md/persistent-data/dm-btree-remove.c

67

BUG_ON(shift > nr_entries);

drivers/md/persistent-data/dm-btree-remove.c

68

BUG_ON((void *) key_ptr(n, shift) >= value_ptr(n, shift));

drivers/md/persistent-data/dm-btree-remove.c

70

key_ptr(n, shift),

drivers/md/persistent-data/dm-btree-remove.c

71

(nr_entries - shift) * sizeof(__le64));

drivers/md/persistent-data/dm-btree-remove.c

73

value_ptr(n, shift),

drivers/md/persistent-data/dm-btree-remove.c

74

(nr_entries - shift) * value_size);

drivers/md/persistent-data/dm-btree-remove.c

76

BUG_ON(nr_entries + shift > le32_to_cpu(n->header.max_entries));

drivers/md/persistent-data/dm-btree-remove.c

77

memmove(key_ptr(n, shift),

drivers/md/persistent-data/dm-btree-remove.c

80

memmove(value_ptr(n, shift),

drivers/md/persistent-data/dm-btree-remove.c

86

static int node_copy(struct btree_node *left, struct btree_node *right, int shift)

drivers/md/persistent-data/dm-btree-remove.c

96

if (shift < 0) {

drivers/md/persistent-data/dm-btree-remove.c

97

shift = -shift;

drivers/md/persistent-data/dm-btree-remove.c

99

if (nr_left + shift > le32_to_cpu(left->header.max_entries)) {

drivers/md/raid1.c

2502

if (rdev->badblocks.shift < 0)

drivers/md/raid1.c

2505

block_sectors = roundup(1 << rdev->badblocks.shift, lbs);

drivers/md/raid10.c

2790

if (rdev->badblocks.shift < 0)

drivers/md/raid10.c

2793

block_sectors = roundup(1 << rdev->badblocks.shift, lbs);

drivers/media/dvb-frontends/drx39xyj/drx_driver.h

1578

s32 shift; /* DC level of incoming signal (A) */

drivers/media/dvb-frontends/stv0900_reg.h

15

extern s32 shiftx(s32 x, int demod, s32 shift);

drivers/media/dvb-frontends/stv0900_sw.c

16

s32 shiftx(s32 x, int demod, s32 shift)

drivers/media/dvb-frontends/stv0900_sw.c

19

return x - shift;

drivers/media/dvb-frontends/stv0910.c

187

u8 shift, mask, old, new;

drivers/media/dvb-frontends/stv0910.c

193

shift = (field >> 12) & 0xf;

drivers/media/dvb-frontends/stv0910.c

194

new = ((val << shift) & mask) | (old & ~mask);

drivers/media/firewire/firedtv-avc.c

1359

static inline u32 get_opcr(__be32 opcr, u32 mask, u32 shift)

drivers/media/firewire/firedtv-avc.c

1361

return (be32_to_cpu(opcr) >> shift) & mask;

drivers/media/firewire/firedtv-avc.c

1364

static inline void set_opcr(__be32 *opcr, u32 value, u32 mask, u32 shift)

drivers/media/firewire/firedtv-avc.c

1366

*opcr &= ~cpu_to_be32(mask << shift);

drivers/media/firewire/firedtv-avc.c

1367

*opcr |= cpu_to_be32((value & mask) << shift);

drivers/media/i2c/adv748x/adv748x-hdmi.c

152

static void adv748x_hdmi_set_de_timings(struct adv748x_state *state, int shift)

drivers/media/i2c/adv748x/adv748x-hdmi.c

158

high |= (shift & 0x300) >> 8;

drivers/media/i2c/adv748x/adv748x-hdmi.c

159

low = shift & 0xff;

drivers/media/i2c/adv748x/adv748x-hdmi.c

165

high |= (shift & 0x300) >> 6;

drivers/media/pci/cx18/cx18-av-core.c

19

int shift = (addr & 3) * 8;

drivers/media/pci/cx18/cx18-av-core.c

22

x = (x & ~(mask << shift)) | ((u32)value << shift);

drivers/media/pci/cx18/cx18-av-core.c

30

int shift = (addr & 3) * 8;

drivers/media/pci/cx18/cx18-av-core.c

33

x = (x & ~((u32)0xff << shift)) | ((u32)value << shift);

drivers/media/pci/cx18/cx18-av-core.c

35

((u32)eval << shift), ((u32)mask << shift));

drivers/media/pci/cx18/cx18-av-core.c

61

int shift = (addr & 3) * 8;

drivers/media/pci/cx18/cx18-av-core.c

63

return (x >> shift) & 0xff;

drivers/media/pci/cx88/cx88-video.c

150

u32 shift;

drivers/media/pci/cx88/cx88-video.c

164

.shift = 0,

drivers/media/pci/cx88/cx88-video.c

174

.shift = 8,

drivers/media/pci/cx88/cx88-video.c

184

.shift = 0,

drivers/media/pci/cx88/cx88-video.c

197

.shift = 0,

drivers/media/pci/cx88/cx88-video.c

211

.shift = 7,

drivers/media/pci/cx88/cx88-video.c

219

.shift = 10,

drivers/media/pci/cx88/cx88-video.c

227

.shift = 9,

drivers/media/pci/cx88/cx88-video.c

237

.shift = 11,

drivers/media/pci/cx88/cx88-video.c

251

.shift = 6,

drivers/media/pci/cx88/cx88-video.c

261

.shift = 0,

drivers/media/pci/cx88/cx88-video.c

271

.shift = 0,

drivers/media/pci/cx88/cx88-video.c

617

value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;

drivers/media/pci/cx88/cx88-video.c

635

value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;

drivers/media/pci/cx88/cx88-video.c

638

value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;

drivers/media/pci/cx88/cx88-video.c

687

value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;

drivers/media/pci/ddbridge/ddbridge-core.c

2587

u32 data, shift;

drivers/media/pci/ddbridge/ddbridge-core.c

2611

shift = ((4 - wlen) * 8);

drivers/media/pci/ddbridge/ddbridge-core.c

2618

if (shift)

drivers/media/pci/ddbridge/ddbridge-core.c

2619

data <<= shift;

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

103

u32 addr, u8 shift, u8 width)

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

107

val = dwc_dphy_read(isys, phy_id, addr) >> shift;

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

162

u32 addr, u32 data, u8 shift, u8 width)

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

172

temp &= ~(mask << shift);

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

173

temp |= (data & mask) << shift;

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

178

u8 shift, u8 width)

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

187

return ((val >> shift) & ((1 << width) - 1));

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

90

u32 data, u8 shift, u8 width)

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

97

temp &= ~(mask << shift);

drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c

98

temp |= (data & mask) << shift;

drivers/media/pci/intel/ipu6/ipu6-isys-video.c

805

u16 shift, size;

drivers/media/pci/intel/ipu6/ipu6-isys-video.c

807

shift = watermark->sram_gran_shift;

drivers/media/pci/intel/ipu6/ipu6-isys-video.c

815

pb_bytes_per_line = pages_per_line << shift;

drivers/media/pci/intel/ipu6/ipu6-isys.c

545

u32 shift;

drivers/media/pci/intel/ipu6/ipu6-isys.c

547

shift = isys->pdata->ipdata->sram_gran_shift;

drivers/media/pci/intel/ipu6/ipu6-isys.c

608

iwake_threshold = max_t(u32, 1, threshold_bytes >> shift);

drivers/media/pci/mgb4/mgb4_trigger.c

77

.shift = 0, \

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

100

if (ci_stat & (BIT_CAM_READY << shift))

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

104

if (!(ci_stat & (BIT_CAM_READY << shift)) && reset_counter > 0) {

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

119

u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0;

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

125

if (ci_stat & (BIT_CAM_READY << shift)) {

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

128

} else if (ci_stat & (BIT_CAM_PRESENT << shift)) {

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

57

u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0;

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

64

writew(BIT_CAM_BYPASS << shift, dev->bmmio0 + CAM_CTRLSTAT_CLR);

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

86

u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0;

drivers/media/pci/netup_unidvb/netup_unidvb_ci.c

95

writew(BIT_CAM_RESET << shift, dev->bmmio0 + CAM_CTRLSTAT_READ_SET);

drivers/media/pci/tw5864/tw5864-video.c

694

int shift = 0;

drivers/media/pci/tw5864/tw5864-video.c

697

for (shift = 0; shift < std_max_fps; shift += input->frame_interval)

drivers/media/pci/tw5864/tw5864-video.c

698

unary_framerate |= 0x00000001 << shift;

drivers/media/pci/tw5864/tw5864.h

170

#define tw_mask_shift_readl(reg, mask, shift) \

drivers/media/pci/tw5864/tw5864.h

171

(tw_mask_readl((reg), ((mask) << (shift))) >> (shift))

drivers/media/pci/tw5864/tw5864.h

176

#define tw_mask_shift_writel(reg, mask, shift, value) \

drivers/media/pci/tw5864/tw5864.h

177

tw_mask_writel((reg), ((mask) << (shift)), ((value) << (shift)))

drivers/media/platform/allegro-dvt/nal-rbsp.c

101

int shift;

drivers/media/platform/allegro-dvt/nal-rbsp.c

107

shift = 7 - (rbsp->pos % 8);

drivers/media/platform/allegro-dvt/nal-rbsp.c

112

rbsp->data[ofs] &= ~(1 << shift);

drivers/media/platform/allegro-dvt/nal-rbsp.c

113

rbsp->data[ofs] |= value << shift;

drivers/media/platform/allegro-dvt/nal-rbsp.c

70

int shift;

drivers/media/platform/allegro-dvt/nal-rbsp.c

81

shift = 7 - (rbsp->pos % 8);

drivers/media/platform/allegro-dvt/nal-rbsp.c

86

bit = (rbsp->data[ofs] >> shift) & 1;

drivers/media/platform/chips-media/coda/coda-h264.c

123

int shift = 7 - (rbsp->pos % 8);

drivers/media/platform/chips-media/coda/coda-h264.c

129

return (rbsp->buf[ofs] >> shift) & 1;

drivers/media/platform/chips-media/coda/coda-h264.c

134

int shift = 7 - (rbsp->pos % 8);

drivers/media/platform/chips-media/coda/coda-h264.c

140

rbsp->buf[ofs] &= ~(1 << shift);

drivers/media/platform/chips-media/coda/coda-h264.c

141

rbsp->buf[ofs] |= bit << shift;

drivers/media/platform/imagination/e5010-jpeg-enc-hw.c

17

unsigned int shift, u32 value)

drivers/media/platform/imagination/e5010-jpeg-enc-hw.c

21

value <<= shift;

drivers/media/platform/imagination/e5010-jpeg-enc-hw.c

30

unsigned int offset, u32 mask, unsigned int shift,

drivers/media/platform/imagination/e5010-jpeg-enc-hw.c

42

write_reg_field(wr_base, offset, mask, shift, value);

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1082

static short vdec_av1_slice_resolve_divisor_32(u32 D, short *shift)

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1087

*shift = vdec_av1_slice_get_msb(D);

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1089

e = D - ((u32)1 << *shift);

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1091

if (*shift > DIV_LUT_BITS)

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1092

f = AV1_DIV_ROUND_UP_POW2(e, *shift - DIV_LUT_BITS);

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1094

f = e << (DIV_LUT_BITS - *shift);

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1097

*shift += DIV_LUT_PREC_BITS;

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1105

short shift;

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1115

y = vdec_av1_slice_resolve_divisor_32(abs(mat[2]), &shift) * (mat[2] < 0 ? -1 : 1);

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1118

gm_params->gamma = clamp_val((int)AV1_DIV_ROUND_UP_POW2_SIGNED(gv, shift),

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1122

gm_params->delta = clamp_val(mat[5] - (int)AV1_DIV_ROUND_UP_POW2_SIGNED(dv, shift) -

drivers/media/platform/nvidia/tegra-vde/iommu.c

103

shift = iova_shift(&vde->iova);

drivers/media/platform/nvidia/tegra-vde/iommu.c

104

iova = reserve_iova(&vde->iova, 0x60000000 >> shift,

drivers/media/platform/nvidia/tegra-vde/iommu.c

105

0x70000000 >> shift);

drivers/media/platform/nvidia/tegra-vde/iommu.c

119

iova = reserve_iova(&vde->iova, 0xffffffff >> shift,

drivers/media/platform/nvidia/tegra-vde/iommu.c

120

(0xffffffff >> shift) + 1);

drivers/media/platform/nvidia/tegra-vde/iommu.c

25

unsigned long shift;

drivers/media/platform/nvidia/tegra-vde/iommu.c

31

shift = iova_shift(&vde->iova);

drivers/media/platform/nvidia/tegra-vde/iommu.c

33

iova = alloc_iova(&vde->iova, size >> shift, end >> shift, true);

drivers/media/platform/nvidia/tegra-vde/iommu.c

53

unsigned long shift = iova_shift(&vde->iova);

drivers/media/platform/nvidia/tegra-vde/iommu.c

54

unsigned long size = iova_size(iova) << shift;

drivers/media/platform/nvidia/tegra-vde/iommu.c

66

unsigned long shift;

drivers/media/platform/raspberrypi/rp1-cfe/csi2.c

302

enum csi2_compression_mode mode, unsigned int shift,

drivers/media/platform/raspberrypi/rp1-cfe/csi2.c

308

set_field(&compression, CSI2_CH_COMP_CTRL_SHIFT_MASK, shift);

drivers/media/platform/raspberrypi/rp1-cfe/csi2.h

77

enum csi2_compression_mode mode, unsigned int shift,

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

735

u8 shift = rkisp1_has_feature(cap->rkisp1, DMA_34BIT) ? 2 : 0;

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

749

buff_addr[RKISP1_PLANE_Y] >> shift);

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

758

cap->buf.dummy.dma_addr >> shift);

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

761

cap->buf.dummy.dma_addr >> shift);

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

765

buff_addr[RKISP1_PLANE_CB] >> shift);

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

768

buff_addr[RKISP1_PLANE_CR] >> shift);

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

776

cap->buf.dummy.dma_addr >> shift);

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

778

cap->buf.dummy.dma_addr >> shift);

drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c

780

cap->buf.dummy.dma_addr >> shift);

drivers/media/platform/samsung/exynos-gsc/gsc-core.h

504

void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);

drivers/media/platform/samsung/exynos-gsc/gsc-core.h

505

void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);

drivers/media/platform/samsung/exynos-gsc/gsc-regs.c

58

void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift,

drivers/media/platform/samsung/exynos-gsc/gsc-regs.c

62

u32 mask = 1 << shift;

drivers/media/platform/samsung/exynos-gsc/gsc-regs.c

65

cfg |= enable << shift;

drivers/media/platform/samsung/exynos-gsc/gsc-regs.c

72

void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift,

drivers/media/platform/samsung/exynos-gsc/gsc-regs.c

76

u32 mask = 1 << shift;

drivers/media/platform/samsung/exynos-gsc/gsc-regs.c

79

cfg |= enable << shift;

drivers/media/platform/samsung/exynos4-is/fimc-core.c

206

static int fimc_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift)

drivers/media/platform/samsung/exynos4-is/fimc-core.c

216

*shift = sh;

drivers/media/platform/samsung/exynos4-is/fimc-core.c

221

*shift = 0;

drivers/media/platform/samsung/s3c-camif/camif-core.c

123

static int camif_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift)

drivers/media/platform/samsung/s3c-camif/camif-core.c

133

*shift = sh;

drivers/media/platform/samsung/s3c-camif/camif-core.c

138

*shift = 0;

drivers/media/platform/ti/omap3isp/isp.c

429

unsigned int shift, unsigned int bridge)

drivers/media/platform/ti/omap3isp/isp.c

444

shift += parcfg->data_lane_shift;

drivers/media/platform/ti/omap3isp/isp.c

463

ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;

drivers/media/platform/ti/omap3isp/isp.h

258

unsigned int shift, unsigned int bridge);

drivers/media/platform/ti/omap3isp/ispccdc.c

1129

unsigned int shift;

drivers/media/platform/ti/omap3isp/ispccdc.c

1167

shift = depth_in - depth_out;

drivers/media/platform/ti/omap3isp/ispccdc.c

1178

omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge);

drivers/media/platform/ti/omap3isp/ispccp2.c

55

#define BIT_SET(var, shift, mask, val) \

drivers/media/platform/ti/omap3isp/ispccp2.c

57

var = ((var) & ~((mask) << (shift))) \

drivers/media/platform/ti/omap3isp/ispccp2.c

58

| ((val) << (shift)); \

drivers/media/platform/ti/omap3isp/ispcsiphy.c

28

u32 shift, mode;

drivers/media/platform/ti/omap3isp/ispcsiphy.c

38

shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY1_SHIFT;

drivers/media/platform/ti/omap3isp/ispcsiphy.c

41

shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY1_SHIFT;

drivers/media/platform/ti/omap3isp/ispcsiphy.c

46

shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY2_SHIFT;

drivers/media/platform/ti/omap3isp/ispcsiphy.c

49

shift = OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_PHY2_SHIFT;

drivers/media/platform/ti/omap3isp/ispcsiphy.c

63

reg &= ~(OMAP3630_CONTROL_CAMERA_PHY_CTRL_CAMMODE_MASK << shift);

drivers/media/platform/ti/omap3isp/ispcsiphy.c

64

reg |= mode << shift;

drivers/media/platform/ti/vpe/vip.c

3241

static int get_field(u32 value, u32 mask, int shift)

drivers/media/platform/ti/vpe/vip.c

3243

return (value & (mask << shift)) >> shift;

drivers/media/platform/ti/vpe/vip.c

402

static void insert_field(u32 *valp, u32 field, u32 mask, int shift)

drivers/media/platform/ti/vpe/vip.c

406

val &= ~(mask << shift);

drivers/media/platform/ti/vpe/vip.c

407

val |= (field & mask) << shift;

drivers/media/platform/ti/vpe/vpdma.c

291

u32 mask, int shift)

drivers/media/platform/ti/vpe/vpdma.c

293

return (read_reg(vpdma, offset) & (mask << shift)) >> shift;

drivers/media/platform/ti/vpe/vpdma.c

297

u32 mask, int shift)

drivers/media/platform/ti/vpe/vpdma.c

301

val &= ~(mask << shift);

drivers/media/platform/ti/vpe/vpdma.c

302

val |= (field & mask) << shift;

drivers/media/platform/ti/vpe/vpe.c

461

static int get_field(u32 value, u32 mask, int shift)

drivers/media/platform/ti/vpe/vpe.c

463

return (value & (mask << shift)) >> shift;

drivers/media/platform/ti/vpe/vpe.c

466

static int read_field_reg(struct vpe_dev *dev, int offset, u32 mask, int shift)

drivers/media/platform/ti/vpe/vpe.c

468

return get_field(read_reg(dev, offset), mask, shift);

drivers/media/platform/ti/vpe/vpe.c

471

static void write_field(u32 *valp, u32 field, u32 mask, int shift)

drivers/media/platform/ti/vpe/vpe.c

475

val &= ~(mask << shift);

drivers/media/platform/ti/vpe/vpe.c

476

val |= (field & mask) << shift;

drivers/media/platform/ti/vpe/vpe.c

481

u32 mask, int shift)

drivers/media/platform/ti/vpe/vpe.c

485

write_field(&val, field, mask, shift);

drivers/media/platform/verisilicon/hantro.h

309

u32 shift;

drivers/media/platform/verisilicon/hantro.h

449

v &= ~(reg->mask << reg->shift);

drivers/media/platform/verisilicon/hantro.h

450

v |= ((val & reg->mask) << reg->shift);

drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c

275

reg.shift = 18;

drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c

281

reg.shift = 0;

drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c

302

reg.shift = 24;

drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c

353

reg.shift = 8;

drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c

356

reg.shift = 4;

drivers/media/platform/verisilicon/hantro_g1_vp8_dec.c

359

reg.shift = 0;

drivers/media/platform/verisilicon/hantro_g2_regs.h

18

.shift = s, \

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

199

.shift = 18,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

205

.shift = 0,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

211

.shift = 24,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

217

.shift = 0,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

223

.shift = 23,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

229

.shift = 11,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

235

.shift = 3,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

241

.shift = 0,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

247

.shift = 0,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

253

.shift = 8,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

259

.shift = 8,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

265

.shift = 9,

drivers/media/platform/verisilicon/rockchip_vpu2_hw_vp8_dec.c

271

.shift = 0,

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

461

static short rockchip_vpu981_av1_dec_resolve_divisor_32(u32 d, short *shift)

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

466

*shift = rockchip_vpu981_av1_dec_get_msb(d);

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

468

e = d - ((u32)1 << *shift);

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

470

if (*shift > DIV_LUT_BITS)

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

471

f = AV1_DIV_ROUND_UP_POW2(e, *shift - DIV_LUT_BITS);

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

473

f = e << (DIV_LUT_BITS - *shift);

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

476

*shift += DIV_LUT_PREC_BITS;

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

486

short shift;

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

496

y = rockchip_vpu981_av1_dec_resolve_divisor_32(abs(mat[2]), &shift) * (mat[2] < 0 ? -1 : 1);

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

500

*gamma = clamp_val((int)AV1_DIV_ROUND_UP_POW2_SIGNED(gv, shift), S16_MIN, S16_MAX);

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

504

(int)AV1_DIV_ROUND_UP_POW2_SIGNED(dv, shift) - (1 << WARPEDMODEL_PREC_BITS),

drivers/media/platform/verisilicon/rockchip_vpu981_regs.h

18

.shift = s, \

drivers/media/rc/img-ir/img-ir-hw.c

178

unsigned int shift)

drivers/media/rc/img-ir/img-ir-hw.c

189

out->min = min >> shift;

drivers/media/rc/img-ir/img-ir-hw.c

190

out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */

drivers/media/test-drivers/vidtv/vidtv_tuner.c

132

u32 shift;

drivers/media/test-drivers/vidtv/vidtv_tuner.c

162

shift = abs(c->frequency - valid_freqs[i]);

drivers/media/test-drivers/vidtv/vidtv_tuner.c

164

if (!shift)

drivers/media/test-drivers/vidtv/vidtv_tuner.c

172

if (shift < config.max_frequency_shift_hz)

drivers/media/test-drivers/vidtv/vidtv_tuner.c

173

return shift * 100 / config.max_frequency_shift_hz;

drivers/media/test-drivers/vidtv/vidtv_tuner.c

187

s32 shift;

drivers/media/test-drivers/vidtv/vidtv_tuner.c

190

shift = vidtv_tuner_check_frequency_shift(fe);

drivers/media/test-drivers/vidtv/vidtv_tuner.c

191

if (shift < 0) {

drivers/media/test-drivers/vidtv/vidtv_tuner.c

232

if (!shift) {

drivers/media/test-drivers/vidtv/vidtv_tuner.c

250

*strength = 34000 - 24000 * shift / 100;

drivers/media/test-drivers/vidtv/vidtv_tuner.c

296

s32 shift;

drivers/media/test-drivers/vidtv/vidtv_tuner.c

315

shift = vidtv_tuner_check_frequency_shift(fe);

drivers/media/test-drivers/vidtv/vidtv_tuner.c

316

if (shift < 0) {

drivers/media/test-drivers/vidtv/vidtv_tuner.c

318

return shift;

drivers/media/usb/pwc/pwc-dec23.c

287

int flags, version, shift, i;

drivers/media/usb/pwc/pwc-dec23.c

324

shift = 8 - pdec->nbits;

drivers/media/usb/pwc/pwc-dec23.c

325

pdec->scalebits = SCALEBITS - shift;

drivers/media/usb/pwc/pwc-dec23.c

326

pdec->nbitsmask = 0xFF >> shift;

drivers/media/usb/pwc/pwc-dec23.c

541

unsigned int mask, shift;

drivers/media/usb/pwc/pwc-dec23.c

557

shift = ptable8004[offset1 * 2 + 1];

drivers/media/usb/pwc/pwc-dec23.c

558

rows = ((mask << shift) + 0x80) & 0xFF;

drivers/media/usb/pwc/pwc-dec23.c

568

unsigned int shift;

drivers/media/usb/pwc/pwc-dec23.c

578

shift = hash_table_ops[htable_idx * 4 + 1];

drivers/media/usb/pwc/pwc-dec23.c

579

skip_nbits(pdec, shift);

drivers/memory/atmel-ebi.c

159

ret = xlate->converter(smcconf, xlate->shift, ncycles);

drivers/memory/atmel-ebi.c

70

unsigned int shift, unsigned int nycles);

drivers/memory/atmel-ebi.c

71

unsigned int shift;

drivers/memory/atmel-ebi.c

75

{ .name = nm, .converter = atmel_smc_cs_conf_set_setup, .shift = pos}

drivers/memory/atmel-ebi.c

78

{ .name = nm, .converter = atmel_smc_cs_conf_set_pulse, .shift = pos}

drivers/memory/atmel-ebi.c

81

{ .name = nm, .converter = atmel_smc_cs_conf_set_cycle, .shift = pos}

drivers/memory/da8xx-ddrctl.c

140

reg |= setting->val << knob->shift;

drivers/memory/da8xx-ddrctl.c

32

u32 shift;

drivers/memory/da8xx-ddrctl.c

40

.shift = 0,

drivers/memory/dfl-emif.c

110

.shift = (_shift), .index = (_index) }

drivers/memory/dfl-emif.c

53

u32 shift;

drivers/memory/dfl-emif.c

70

!!(val & BIT_ULL(eattr->shift + eattr->index)));

drivers/memory/emif.c

370

u8 shift;

drivers/memory/emif.c

399

shift = CS_TIM_SHIFT;

drivers/memory/emif.c

407

shift = SR_TIM_SHIFT;

drivers/memory/emif.c

411

shift = PD_TIM_SHIFT;

drivers/memory/emif.c

417

shift = 0;

drivers/memory/emif.c

421

if (lpmode != EMIF_LP_MODE_DISABLE && timeout > mask >> shift) {

drivers/memory/emif.c

428

timeout, mask >> shift);

drivers/memory/emif.c

429

timeout = mask >> shift;

drivers/memory/emif.c

433

pwr_mgmt_ctrl = (timeout << shift) & mask;

drivers/memory/omap-gpmc.c

439

int shift,

drivers/memory/omap-gpmc.c

455

if (shift)

drivers/memory/omap-gpmc.c

456

l = (shift << l);

drivers/memory/omap-gpmc.c

488

#define GPMC_GET_RAW_SHIFT_MAX(reg, st, end, shift, max, field) \

drivers/memory/omap-gpmc.c

489

get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, (shift), 1, 1)

drivers/memory/tegra/mc.c

410

value &= ~(client->regs.la.mask << client->regs.la.shift);

drivers/memory/tegra/mc.c

411

value |= (client->regs.la.def & client->regs.la.mask) << client->regs.la.shift;

drivers/memory/tegra/tegra114.c

1005

.shift = 0,

drivers/memory/tegra/tegra114.c

101

.shift = 0,

drivers/memory/tegra/tegra114.c

1021

.shift = 16,

drivers/memory/tegra/tegra114.c

117

.shift = 0,

drivers/memory/tegra/tegra114.c

133

.shift = 0,

drivers/memory/tegra/tegra114.c

149

.shift = 0,

drivers/memory/tegra/tegra114.c

165

.shift = 16,

drivers/memory/tegra/tegra114.c

181

.shift = 0,

drivers/memory/tegra/tegra114.c

197

.shift = 0,

drivers/memory/tegra/tegra114.c

21

.shift = 0,

drivers/memory/tegra/tegra114.c

213

.shift = 0,

drivers/memory/tegra/tegra114.c

229

.shift = 0,

drivers/memory/tegra/tegra114.c

245

.shift = 0,

drivers/memory/tegra/tegra114.c

261

.shift = 0,

drivers/memory/tegra/tegra114.c

277

.shift = 0,

drivers/memory/tegra/tegra114.c

293

.shift = 0,

drivers/memory/tegra/tegra114.c

309

.shift = 16,

drivers/memory/tegra/tegra114.c

325

.shift = 16,

drivers/memory/tegra/tegra114.c

341

.shift = 0,

drivers/memory/tegra/tegra114.c

357

.shift = 0,

drivers/memory/tegra/tegra114.c

37

.shift = 0,

drivers/memory/tegra/tegra114.c

373

.shift = 16,

drivers/memory/tegra/tegra114.c

389

.shift = 0,

drivers/memory/tegra/tegra114.c

405

.shift = 0,

drivers/memory/tegra/tegra114.c

421

.shift = 16,

drivers/memory/tegra/tegra114.c

437

.shift = 0,

drivers/memory/tegra/tegra114.c

453

.shift = 16,

drivers/memory/tegra/tegra114.c

465

.shift = 0,

drivers/memory/tegra/tegra114.c

477

.shift = 0,

drivers/memory/tegra/tegra114.c

493

.shift = 16,

drivers/memory/tegra/tegra114.c

509

.shift = 0,

drivers/memory/tegra/tegra114.c

525

.shift = 16,

drivers/memory/tegra/tegra114.c

53

.shift = 0,

drivers/memory/tegra/tegra114.c

541

.shift = 16,

drivers/memory/tegra/tegra114.c

557

.shift = 0,

drivers/memory/tegra/tegra114.c

573

.shift = 0,

drivers/memory/tegra/tegra114.c

589

.shift = 16,

drivers/memory/tegra/tegra114.c

605

.shift = 0,

drivers/memory/tegra/tegra114.c

621

.shift = 16,

drivers/memory/tegra/tegra114.c

637

.shift = 16,

drivers/memory/tegra/tegra114.c

653

.shift = 16,

drivers/memory/tegra/tegra114.c

669

.shift = 0,

drivers/memory/tegra/tegra114.c

685

.shift = 16,

drivers/memory/tegra/tegra114.c

69

.shift = 16,

drivers/memory/tegra/tegra114.c

701

.shift = 0,

drivers/memory/tegra/tegra114.c

717

.shift = 0,

drivers/memory/tegra/tegra114.c

729

.shift = 16,

drivers/memory/tegra/tegra114.c

741

.shift = 16,

drivers/memory/tegra/tegra114.c

757

.shift = 0,

drivers/memory/tegra/tegra114.c

773

.shift = 16,

drivers/memory/tegra/tegra114.c

789

.shift = 0,

drivers/memory/tegra/tegra114.c

805

.shift = 16,

drivers/memory/tegra/tegra114.c

821

.shift = 0,

drivers/memory/tegra/tegra114.c

837

.shift = 16,

drivers/memory/tegra/tegra114.c

85

.shift = 16,

drivers/memory/tegra/tegra114.c

853

.shift = 0,

drivers/memory/tegra/tegra114.c

869

.shift = 16,

drivers/memory/tegra/tegra114.c

885

.shift = 0,

drivers/memory/tegra/tegra114.c

901

.shift = 16,

drivers/memory/tegra/tegra114.c

917

.shift = 0,

drivers/memory/tegra/tegra114.c

933

.shift = 0,

drivers/memory/tegra/tegra114.c

949

.shift = 16,

drivers/memory/tegra/tegra114.c

965

.shift = 16,

drivers/memory/tegra/tegra114.c

977

.shift = 0,

drivers/memory/tegra/tegra114.c

989

.shift = 16,

drivers/memory/tegra/tegra124.c

1000

.shift = 16,

drivers/memory/tegra/tegra124.c

1016

.shift = 0,

drivers/memory/tegra/tegra124.c

102

.shift = 0,

drivers/memory/tegra/tegra124.c

1032

.shift = 16,

drivers/memory/tegra/tegra124.c

1048

.shift = 0,

drivers/memory/tegra/tegra124.c

1064

.shift = 0,

drivers/memory/tegra/tegra124.c

118

.shift = 0,

drivers/memory/tegra/tegra124.c

134

.shift = 0,

drivers/memory/tegra/tegra124.c

150

.shift = 0,

drivers/memory/tegra/tegra124.c

166

.shift = 0,

drivers/memory/tegra/tegra124.c

182

.shift = 0,

drivers/memory/tegra/tegra124.c

198

.shift = 0,

drivers/memory/tegra/tegra124.c

214

.shift = 0,

drivers/memory/tegra/tegra124.c

22

.shift = 0,

drivers/memory/tegra/tegra124.c

230

.shift = 16,

drivers/memory/tegra/tegra124.c

246

.shift = 0,

drivers/memory/tegra/tegra124.c

262

.shift = 0,

drivers/memory/tegra/tegra124.c

278

.shift = 16,

drivers/memory/tegra/tegra124.c

294

.shift = 0,

drivers/memory/tegra/tegra124.c

310

.shift = 0,

drivers/memory/tegra/tegra124.c

326

.shift = 16,

drivers/memory/tegra/tegra124.c

342

.shift = 0,

drivers/memory/tegra/tegra124.c

358

.shift = 16,

drivers/memory/tegra/tegra124.c

370

.shift = 0,

drivers/memory/tegra/tegra124.c

38

.shift = 0,

drivers/memory/tegra/tegra124.c

382

.shift = 0,

drivers/memory/tegra/tegra124.c

398

.shift = 16,

drivers/memory/tegra/tegra124.c

414

.shift = 16,

drivers/memory/tegra/tegra124.c

430

.shift = 16,

drivers/memory/tegra/tegra124.c

446

.shift = 16,

drivers/memory/tegra/tegra124.c

462

.shift = 0,

drivers/memory/tegra/tegra124.c

474

.shift = 16,

drivers/memory/tegra/tegra124.c

486

.shift = 16,

drivers/memory/tegra/tegra124.c

502

.shift = 0,

drivers/memory/tegra/tegra124.c

518

.shift = 16,

drivers/memory/tegra/tegra124.c

534

.shift = 16,

drivers/memory/tegra/tegra124.c

54

.shift = 0,

drivers/memory/tegra/tegra124.c

550

.shift = 0,

drivers/memory/tegra/tegra124.c

566

.shift = 16,

drivers/memory/tegra/tegra124.c

582

.shift = 0,

drivers/memory/tegra/tegra124.c

598

.shift = 16,

drivers/memory/tegra/tegra124.c

614

.shift = 0,

drivers/memory/tegra/tegra124.c

630

.shift = 0,

drivers/memory/tegra/tegra124.c

646

.shift = 16,

drivers/memory/tegra/tegra124.c

662

.shift = 0,

drivers/memory/tegra/tegra124.c

678

.shift = 16,

drivers/memory/tegra/tegra124.c

694

.shift = 0,

drivers/memory/tegra/tegra124.c

70

.shift = 16,

drivers/memory/tegra/tegra124.c

710

.shift = 16,

drivers/memory/tegra/tegra124.c

726

.shift = 0,

drivers/memory/tegra/tegra124.c

742

.shift = 0,

drivers/memory/tegra/tegra124.c

758

.shift = 16,

drivers/memory/tegra/tegra124.c

774

.shift = 0,

drivers/memory/tegra/tegra124.c

790

.shift = 16,

drivers/memory/tegra/tegra124.c

806

.shift = 0,

drivers/memory/tegra/tegra124.c

822

.shift = 16,

drivers/memory/tegra/tegra124.c

839

.shift = 0,

drivers/memory/tegra/tegra124.c

856

.shift = 16,

drivers/memory/tegra/tegra124.c

86

.shift = 16,

drivers/memory/tegra/tegra124.c

872

.shift = 16,

drivers/memory/tegra/tegra124.c

888

.shift = 0,

drivers/memory/tegra/tegra124.c

904

.shift = 0,

drivers/memory/tegra/tegra124.c

920

.shift = 0,

drivers/memory/tegra/tegra124.c

936

.shift = 0,

drivers/memory/tegra/tegra124.c

952

.shift = 16,

drivers/memory/tegra/tegra124.c

968

.shift = 16,

drivers/memory/tegra/tegra124.c

984

.shift = 16,

drivers/memory/tegra/tegra210.c

1012

.shift = 0,

drivers/memory/tegra/tegra210.c

1028

.shift = 16,

drivers/memory/tegra/tegra210.c

1044

.shift = 0,

drivers/memory/tegra/tegra210.c

106

.shift = 0,

drivers/memory/tegra/tegra210.c

1060

.shift = 16,

drivers/memory/tegra/tegra210.c

1076

.shift = 0,

drivers/memory/tegra/tegra210.c

1092

.shift = 16,

drivers/memory/tegra/tegra210.c

1108

.shift = 0,

drivers/memory/tegra/tegra210.c

1124

.shift = 16,

drivers/memory/tegra/tegra210.c

1141

.shift = 0,

drivers/memory/tegra/tegra210.c

1158

.shift = 16,

drivers/memory/tegra/tegra210.c

122

.shift = 0,

drivers/memory/tegra/tegra210.c

138

.shift = 0,

drivers/memory/tegra/tegra210.c

154

.shift = 0,

drivers/memory/tegra/tegra210.c

170

.shift = 0,

drivers/memory/tegra/tegra210.c

186

.shift = 0,

drivers/memory/tegra/tegra210.c

202

.shift = 0,

drivers/memory/tegra/tegra210.c

218

.shift = 16,

drivers/memory/tegra/tegra210.c

234

.shift = 0,

drivers/memory/tegra/tegra210.c

250

.shift = 0,

drivers/memory/tegra/tegra210.c

26

.shift = 0,

drivers/memory/tegra/tegra210.c

266

.shift = 16,

drivers/memory/tegra/tegra210.c

282

.shift = 0,

drivers/memory/tegra/tegra210.c

294

.shift = 0,

drivers/memory/tegra/tegra210.c

310

.shift = 16,

drivers/memory/tegra/tegra210.c

326

.shift = 16,

drivers/memory/tegra/tegra210.c

342

.shift = 16,

drivers/memory/tegra/tegra210.c

358

.shift = 16,

drivers/memory/tegra/tegra210.c

374

.shift = 0,

drivers/memory/tegra/tegra210.c

386

.shift = 16,

drivers/memory/tegra/tegra210.c

402

.shift = 0,

drivers/memory/tegra/tegra210.c

418

.shift = 16,

drivers/memory/tegra/tegra210.c

42

.shift = 0,

drivers/memory/tegra/tegra210.c

434

.shift = 16,

drivers/memory/tegra/tegra210.c

450

.shift = 0,

drivers/memory/tegra/tegra210.c

466

.shift = 0,

drivers/memory/tegra/tegra210.c

482

.shift = 16,

drivers/memory/tegra/tegra210.c

498

.shift = 0,

drivers/memory/tegra/tegra210.c

514

.shift = 16,

drivers/memory/tegra/tegra210.c

530

.shift = 0,

drivers/memory/tegra/tegra210.c

546

.shift = 16,

drivers/memory/tegra/tegra210.c

562

.shift = 0,

drivers/memory/tegra/tegra210.c

578

.shift = 0,

drivers/memory/tegra/tegra210.c

58

.shift = 16,

drivers/memory/tegra/tegra210.c

594

.shift = 16,

drivers/memory/tegra/tegra210.c

610

.shift = 0,

drivers/memory/tegra/tegra210.c

626

.shift = 16,

drivers/memory/tegra/tegra210.c

642

.shift = 0,

drivers/memory/tegra/tegra210.c

658

.shift = 16,

drivers/memory/tegra/tegra210.c

675

.shift = 0,

drivers/memory/tegra/tegra210.c

692

.shift = 16,

drivers/memory/tegra/tegra210.c

708

.shift = 16,

drivers/memory/tegra/tegra210.c

724

.shift = 0,

drivers/memory/tegra/tegra210.c

74

.shift = 16,

drivers/memory/tegra/tegra210.c

740

.shift = 0,

drivers/memory/tegra/tegra210.c

756

.shift = 0,

drivers/memory/tegra/tegra210.c

772

.shift = 0,

drivers/memory/tegra/tegra210.c

788

.shift = 16,

drivers/memory/tegra/tegra210.c

804

.shift = 16,

drivers/memory/tegra/tegra210.c

820

.shift = 16,

drivers/memory/tegra/tegra210.c

836

.shift = 16,

drivers/memory/tegra/tegra210.c

852

.shift = 0,

drivers/memory/tegra/tegra210.c

868

.shift = 16,

drivers/memory/tegra/tegra210.c

884

.shift = 0,

drivers/memory/tegra/tegra210.c

90

.shift = 0,

drivers/memory/tegra/tegra210.c

900

.shift = 0,

drivers/memory/tegra/tegra210.c

916

.shift = 0,

drivers/memory/tegra/tegra210.c

932

.shift = 16,

drivers/memory/tegra/tegra210.c

948

.shift = 0,

drivers/memory/tegra/tegra210.c

964

.shift = 16,

drivers/memory/tegra/tegra210.c

980

.shift = 0,

drivers/memory/tegra/tegra210.c

996

.shift = 16,

drivers/memory/tegra/tegra30.c

1013

.shift = 16,

drivers/memory/tegra/tegra30.c

1030

.shift = 0,

drivers/memory/tegra/tegra30.c

1047

.shift = 16,

drivers/memory/tegra/tegra30.c

1064

.shift = 16,

drivers/memory/tegra/tegra30.c

1081

.shift = 0,

drivers/memory/tegra/tegra30.c

1098

.shift = 16,

drivers/memory/tegra/tegra30.c

111

.shift = 16,

drivers/memory/tegra/tegra30.c

1115

.shift = 0,

drivers/memory/tegra/tegra30.c

1132

.shift = 16,

drivers/memory/tegra/tegra30.c

128

.shift = 0,

drivers/memory/tegra/tegra30.c

1286

value &= ~(client->regs.la.mask << client->regs.la.shift);

drivers/memory/tegra/tegra30.c

1287

value |= la_ticks << client->regs.la.shift;

drivers/memory/tegra/tegra30.c

145

.shift = 0,

drivers/memory/tegra/tegra30.c

162

.shift = 16,

drivers/memory/tegra/tegra30.c

179

.shift = 16,

drivers/memory/tegra/tegra30.c

196

.shift = 0,

drivers/memory/tegra/tegra30.c

213

.shift = 0,

drivers/memory/tegra/tegra30.c

230

.shift = 16,

drivers/memory/tegra/tegra30.c

247

.shift = 0,

drivers/memory/tegra/tegra30.c

264

.shift = 0,

drivers/memory/tegra/tegra30.c

281

.shift = 0,

drivers/memory/tegra/tegra30.c

298

.shift = 0,

drivers/memory/tegra/tegra30.c

315

.shift = 0,

drivers/memory/tegra/tegra30.c

332

.shift = 0,

drivers/memory/tegra/tegra30.c

349

.shift = 0,

drivers/memory/tegra/tegra30.c

366

.shift = 0,

drivers/memory/tegra/tegra30.c

383

.shift = 0,

drivers/memory/tegra/tegra30.c

400

.shift = 0,

drivers/memory/tegra/tegra30.c

417

.shift = 0,

drivers/memory/tegra/tegra30.c

43

.shift = 0,

drivers/memory/tegra/tegra30.c

434

.shift = 16,

drivers/memory/tegra/tegra30.c

451

.shift = 16,

drivers/memory/tegra/tegra30.c

468

.shift = 16,

drivers/memory/tegra/tegra30.c

485

.shift = 16,

drivers/memory/tegra/tegra30.c

502

.shift = 0,

drivers/memory/tegra/tegra30.c

519

.shift = 16,

drivers/memory/tegra/tegra30.c

536

.shift = 0,

drivers/memory/tegra/tegra30.c

553

.shift = 16,

drivers/memory/tegra/tegra30.c

570

.shift = 0,

drivers/memory/tegra/tegra30.c

587

.shift = 0,

drivers/memory/tegra/tegra30.c

60

.shift = 0,

drivers/memory/tegra/tegra30.c

604

.shift = 0,

drivers/memory/tegra/tegra30.c

621

.shift = 0,

drivers/memory/tegra/tegra30.c

638

.shift = 16,

drivers/memory/tegra/tegra30.c

655

.shift = 0,

drivers/memory/tegra/tegra30.c

672

.shift = 16,

drivers/memory/tegra/tegra30.c

685

.shift = 0,

drivers/memory/tegra/tegra30.c

698

.shift = 0,

drivers/memory/tegra/tegra30.c

715

.shift = 16,

drivers/memory/tegra/tegra30.c

732

.shift = 0,

drivers/memory/tegra/tegra30.c

749

.shift = 16,

drivers/memory/tegra/tegra30.c

766

.shift = 0,

drivers/memory/tegra/tegra30.c

77

.shift = 0,

drivers/memory/tegra/tegra30.c

783

.shift = 16,

drivers/memory/tegra/tegra30.c

800

.shift = 0,

drivers/memory/tegra/tegra30.c

817

.shift = 16,

drivers/memory/tegra/tegra30.c

834

.shift = 0,

drivers/memory/tegra/tegra30.c

851

.shift = 16,

drivers/memory/tegra/tegra30.c

868

.shift = 16,

drivers/memory/tegra/tegra30.c

885

.shift = 16,

drivers/memory/tegra/tegra30.c

902

.shift = 16,

drivers/memory/tegra/tegra30.c

919

.shift = 16,

drivers/memory/tegra/tegra30.c

936

.shift = 16,

drivers/memory/tegra/tegra30.c

94

.shift = 16,

drivers/memory/tegra/tegra30.c

953

.shift = 0,

drivers/memory/tegra/tegra30.c

970

.shift = 0,

drivers/memory/tegra/tegra30.c

983

.shift = 16,

drivers/memory/tegra/tegra30.c

996

.shift = 16,

drivers/mfd/atmel-smc.c

101

unsigned int shift, unsigned int ncycles)

drivers/mfd/atmel-smc.c

106

if (shift != ATMEL_HSMC_TIMINGS_TCLR_SHIFT &&

drivers/mfd/atmel-smc.c

107

shift != ATMEL_HSMC_TIMINGS_TADL_SHIFT &&

drivers/mfd/atmel-smc.c

108

shift != ATMEL_HSMC_TIMINGS_TAR_SHIFT &&

drivers/mfd/atmel-smc.c

109

shift != ATMEL_HSMC_TIMINGS_TRR_SHIFT &&

drivers/mfd/atmel-smc.c

110

shift != ATMEL_HSMC_TIMINGS_TWB_SHIFT)

drivers/mfd/atmel-smc.c

120

conf->timings &= ~GENMASK(shift + 3, shift);

drivers/mfd/atmel-smc.c

121

conf->timings |= val << shift;

drivers/mfd/atmel-smc.c

143

unsigned int shift, unsigned int ncycles)

drivers/mfd/atmel-smc.c

148

if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT &&

drivers/mfd/atmel-smc.c

149

shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT)

drivers/mfd/atmel-smc.c

159

conf->setup &= ~GENMASK(shift + 7, shift);

drivers/mfd/atmel-smc.c

160

conf->setup |= val << shift;

drivers/mfd/atmel-smc.c

182

unsigned int shift, unsigned int ncycles)

drivers/mfd/atmel-smc.c

187

if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT &&

drivers/mfd/atmel-smc.c

188

shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT)

drivers/mfd/atmel-smc.c

198

conf->pulse &= ~GENMASK(shift + 7, shift);

drivers/mfd/atmel-smc.c

199

conf->pulse |= val << shift;

drivers/mfd/atmel-smc.c

221

unsigned int shift, unsigned int ncycles)

drivers/mfd/atmel-smc.c

226

if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NRD_SHIFT)

drivers/mfd/atmel-smc.c

236

conf->cycle &= ~GENMASK(shift + 15, shift);

drivers/mfd/atmel-smc.c

237

conf->cycle |= val << shift;

drivers/mfd/lm3533-core.c

171

int shift;

drivers/mfd/lm3533-core.c

180

shift = hvled - 1;

drivers/mfd/lm3533-core.c

181

mask = LM3533_BL_ID_MASK << shift;

drivers/mfd/lm3533-core.c

182

val = bl << shift;

drivers/mfd/lm3533-core.c

199

int shift;

drivers/mfd/lm3533-core.c

210

shift = 2 * lvled;

drivers/mfd/lm3533-core.c

213

shift = 2 * (lvled - 4);

drivers/mfd/lm3533-core.c

216

mask = LM3533_LED_ID_MASK << shift;

drivers/mfd/lm3533-core.c

217

val = led << shift;

drivers/mfd/lm3533-core.c

263

int shift;

drivers/mfd/lm3533-core.c

268

shift = id - 1;

drivers/mfd/lm3533-core.c

269

mask = LM3533_BL_ID_MASK << shift;

drivers/mfd/lm3533-core.c

273

shift = 2 * id;

drivers/mfd/lm3533-core.c

276

shift = 2 * (id - 4);

drivers/mfd/lm3533-core.c

278

mask = LM3533_LED_ID_MASK << shift;

drivers/mfd/lm3533-core.c

285

val = (val & mask) >> shift;

drivers/mfd/mt6358-irq.c

102

unsigned int i, top_gp, gp_offset, en_reg, int_regs, shift;

drivers/mfd/mt6358-irq.c

119

shift = gp_offset % MTK_PMIC_REG_WIDTH;

drivers/mfd/mt6358-irq.c

123

regmap_update_bits(chip->regmap, en_reg, BIT(shift),

drivers/mfd/mt6358-irq.c

124

irqd->enable_hwirq[i] << shift);

drivers/mfd/mt6397-irq.c

46

int shift = data->hwirq & 0xf;

drivers/mfd/mt6397-irq.c

49

mt6397->irq_masks_cur[reg] &= ~BIT(shift);

drivers/mfd/mt6397-irq.c

55

int shift = data->hwirq & 0xf;

drivers/mfd/mt6397-irq.c

58

mt6397->irq_masks_cur[reg] |= BIT(shift);

drivers/mfd/mt6397-irq.c

64

int shift = irq_data->hwirq & 0xf;

drivers/mfd/mt6397-irq.c

68

mt6397->wake_mask[reg] |= BIT(shift);

drivers/mfd/mt6397-irq.c

70

mt6397->wake_mask[reg] &= ~BIT(shift);

drivers/mfd/sm501.c

393

int shift;

drivers/mfd/sm501.c

412

int shift;

drivers/mfd/sm501.c

420

for (shift = 0; shift < 8; shift++) {

drivers/mfd/sm501.c

422

diff = DIV_ROUND_CLOSEST(mclk, divider << shift) - freq;

drivers/mfd/sm501.c

432

clock->shift = shift;

drivers/mfd/sm501.c

476

return clock->mclk / (clock->divider << clock->shift);

drivers/mfd/sm501.c

499

return clock->mclk / (clock->divider << clock->shift);

drivers/mfd/sm501.c

536

reg = to.shift & 0x07;/* bottom 3 bits are shift */

drivers/mfd/sm501.c

546

reg = to.shift & 0x07;/* bottom 3 bits are shift */

drivers/mfd/sm501.c

561

reg=to.shift & 0x07; /* bottom 3 bits are shift */

drivers/mfd/sm501.c

573

reg=to.shift & 0x07; /* bottom 3 bits are shift */

drivers/misc/altera-stapl/altera-comp.c

43

u32 shift = 0;

drivers/misc/altera-stapl/altera-comp.c

49

& (0xff >> (CHAR_BITS - *bits_avail))) << shift);

drivers/misc/altera-stapl/altera-comp.c

52

result &= (0xffff >> (SHORT_BITS - (bits + shift)));

drivers/misc/altera-stapl/altera-comp.c

57

shift += *bits_avail;

drivers/misc/cs5535-mfgpt.c

101

int shift;

drivers/misc/cs5535-mfgpt.c

117

shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer->nr % 4) * 4;

drivers/misc/cs5535-mfgpt.c

118

if (((zsel >> shift) & 0xF) == 2)

drivers/misc/cs5535-mfgpt.c

123

*irq = (zsel >> shift) & 0xF;

drivers/misc/cs5535-mfgpt.c

138

zsel = (zsel & ~(0xF << shift)) | (*irq << shift);

drivers/misc/cs5535-mfgpt.c

49

int shift = (cmp == MFGPT_CMP1) ? 0 : 8;

drivers/misc/cs5535-mfgpt.c

73

mask = 1 << (timer->nr + shift);

drivers/misc/cs5535-mfgpt.c

78

mask = 1 << (timer->nr + shift);

drivers/misc/isl29003.c

65

u32 reg, u8 mask, u8 shift)

drivers/misc/isl29003.c

69

return (data->reg_cache[reg] & mask) >> shift;

drivers/misc/isl29003.c

73

u32 reg, u8 mask, u8 shift, u8 val)

drivers/misc/isl29003.c

86

tmp |= val << shift;

drivers/misc/lis3lv02d/lis3lv02d.c

214

int shift;

drivers/misc/lis3lv02d/lis3lv02d.c

218

shift = ffs(lis3->odr_mask) - 1;

drivers/misc/lis3lv02d/lis3lv02d.c

219

return (ctrl >> shift);

drivers/misc/lis3lv02d/lis3lv02d.c

245

int i, len, shift;

drivers/misc/lis3lv02d/lis3lv02d.c

253

shift = ffs(lis3->odr_mask) - 1;

drivers/misc/lis3lv02d/lis3lv02d.c

258

ctrl | (i << shift));

drivers/misc/sgi-gru/grutlbpurge.c

295

int cpus, shift = 0, n;

drivers/misc/sgi-gru/grutlbpurge.c

309

shift = max(0, fls(n - 1) - fls(MAX_LOCAL_TGH - 1));

drivers/misc/sgi-gru/grutlbpurge.c

311

gru->gs_tgh_local_shift = shift;

drivers/misc/sgi-gru/grutlbpurge.c

314

gru->gs_tgh_first_remote = (cpus + (1 << shift) - 1) >> shift;

drivers/mmc/host/atmel-mci.c

769

unsigned shift = dtomul_to_shift[dtomul];

drivers/mmc/host/atmel-mci.c

770

dtocyc = (timeout + (1 << shift) - 1) >> shift;

drivers/mmc/host/cavium.c

303

int bytes_xfered, shift = -1;

drivers/mmc/host/cavium.c

316

if (shift < 0) {

drivers/mmc/host/cavium.c

318

shift = 56;

drivers/mmc/host/cavium.c

321

while (smi->consumed < smi->length && shift >= 0) {

drivers/mmc/host/cavium.c

322

((u8 *)smi->addr)[smi->consumed] = (dat >> shift) & 0xff;

drivers/mmc/host/cavium.c

325

shift -= 8;

drivers/mmc/host/cavium.c

718

int shift = 56;

drivers/mmc/host/cavium.c

734

while (smi->consumed < smi->length && shift >= 0) {

drivers/mmc/host/cavium.c

735

dat |= (u64)((u8 *)smi->addr)[smi->consumed] << shift;

drivers/mmc/host/cavium.c

738

shift -= 8;

drivers/mmc/host/cavium.c

741

if (shift < 0) {

drivers/mmc/host/cavium.c

743

shift = 56;

drivers/mmc/host/dw_mmc.c

2687

int shift = host->data_shift;

drivers/mmc/host/dw_mmc.c

2703

<< shift) + host->part_buf_count;

drivers/mmc/host/dw_mmc.c

2741

int shift = host->data_shift;

drivers/mmc/host/dw_mmc.c

2759

<< shift) - host->part_buf_count;

drivers/mmc/host/meson-gx-mmc.c

467

mux->shift = __ffs(CLK_SRC_MASK);

drivers/mmc/host/meson-gx-mmc.c

468

mux->mask = CLK_SRC_MASK >> mux->shift;

drivers/mmc/host/meson-gx-mmc.c

489

div->shift = __ffs(CLK_DIV_MASK);

drivers/mmc/host/meson-mx-sdhc-clkc.c

104

clkc_data->src_sel.shift = 16;

drivers/mmc/host/meson-mx-sdhc-clkc.c

113

clkc_data->div.shift = 0;

drivers/mmc/host/meson-mx-sdio.c

609

host_clkc->cfg_div.shift = MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT;

drivers/mmc/host/sdhci-cadence.c

416

u32 shift = reg & GENMASK(1, 0);

drivers/mmc/host/sdhci-cadence.c

420

byte_enables = GENMASK(1, 0) << shift;

drivers/mmc/host/sdhci-cadence.c

430

u32 shift = reg & GENMASK(1, 0);

drivers/mmc/host/sdhci-cadence.c

434

byte_enables = BIT(0) << shift;

drivers/mmc/host/sdhci-esdhc-imx.c

433

u32 shift = (reg & 0x3) * 8;

drivers/mmc/host/sdhci-esdhc-imx.c

435

writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);

drivers/mmc/host/sdhci-esdhc-mcf.c

118

writel((readl(base) & mask) | (val << shift), base);

drivers/mmc/host/sdhci-esdhc-mcf.c

50

u8 shift = (reg & 3) << 3;

drivers/mmc/host/sdhci-esdhc-mcf.c

52

mask <<= shift;

drivers/mmc/host/sdhci-esdhc-mcf.c

53

val <<= shift;

drivers/mmc/host/sdhci-esdhc-mcf.c

68

u8 shift = (reg & 3) << 3;

drivers/mmc/host/sdhci-esdhc-mcf.c

69

u32 mask = ~(0xff << shift);

drivers/mmc/host/sdhci-esdhc-mcf.c

90

writel((readl(base) & mask) | (val << shift), base);

drivers/mmc/host/sdhci-esdhc-mcf.c

98

u8 shift = (reg & 3) << 3;

drivers/mmc/host/sdhci-esdhc-mcf.c

99

u32 mask = ~(0xffff << shift);

drivers/mmc/host/sdhci-of-arasan.c

100

((val) << (shift) | (mask) << ((shift) + 16))

drivers/mmc/host/sdhci-of-arasan.c

115

s16 shift;

drivers/mmc/host/sdhci-of-arasan.c

224

.baseclkfreq = { .reg = 0xf000, .width = 8, .shift = 8 },

drivers/mmc/host/sdhci-of-arasan.c

225

.clockmultiplier = { .reg = 0xf02c, .width = 8, .shift = 0},

drivers/mmc/host/sdhci-of-arasan.c

230

.baseclkfreq = { .reg = 0xa0, .width = 8, .shift = 2 },

drivers/mmc/host/sdhci-of-arasan.c

231

.clockmultiplier = { .reg = 0, .width = -1, .shift = -1 },

drivers/mmc/host/sdhci-of-arasan.c

236

.baseclkfreq = { .reg = 0x80, .width = 8, .shift = 2 },

drivers/mmc/host/sdhci-of-arasan.c

237

.clockmultiplier = { .reg = 0, .width = -1, .shift = -1 },

drivers/mmc/host/sdhci-of-arasan.c

242

.baseclkfreq = { .reg = 0x0, .width = 8, .shift = 14 },

drivers/mmc/host/sdhci-of-arasan.c

243

.clockmultiplier = { .reg = 0x4, .width = 8, .shift = 14 },

drivers/mmc/host/sdhci-of-arasan.c

244

.support64b = { .reg = 0x4, .width = 1, .shift = 24 },

drivers/mmc/host/sdhci-of-arasan.c

326

s16 shift = fld->shift;

drivers/mmc/host/sdhci-of-arasan.c

335

if (shift < 0)

drivers/mmc/host/sdhci-of-arasan.c

341

shift));

drivers/mmc/host/sdhci-of-arasan.c

344

GENMASK(shift + width, shift),

drivers/mmc/host/sdhci-of-arasan.c

345

val << shift);

drivers/mmc/host/sdhci-of-arasan.c

99

#define HIWORD_UPDATE(val, mask, shift) \

drivers/mmc/host/sdhci-of-esdhc.c

182

int shift = (spec_reg & 0x2) * 8;

drivers/mmc/host/sdhci-of-esdhc.c

190

ret = (value >> shift) & 0xffff;

drivers/mmc/host/sdhci-of-esdhc.c

205

int shift = (spec_reg & 0x3) * 8;

drivers/mmc/host/sdhci-of-esdhc.c

207

ret = (value >> shift) & 0xff;

drivers/mmc/host/sdhci-of-esdhc.c

261

int shift = (spec_reg & 0x2) * 8;

drivers/mmc/host/sdhci-of-esdhc.c

277

ret = old_value & (~(0xffff << shift));

drivers/mmc/host/sdhci-of-esdhc.c

278

ret |= (value << shift);

drivers/mmc/host/sdhci-of-esdhc.c

297

int shift = (spec_reg & 0x3) * 8;

drivers/mmc/host/sdhci-of-esdhc.c

329

ret = (old_value & (~(0xff << shift))) | (value << shift);

drivers/mmc/host/sdhci-pltfm.h

62

int shift = (reg & 0x2) * 8;

drivers/mmc/host/sdhci-pltfm.h

78

clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);

drivers/mmc/host/sdhci-pltfm.h

84

int shift = (reg & 0x3) * 8;

drivers/mmc/host/sdhci-pltfm.h

86

clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);

drivers/mmc/host/sdhci-s3c.c

183

int shift;

drivers/mmc/host/sdhci-s3c.c

199

for (shift = 0; shift <= 8; ++shift) {

drivers/mmc/host/sdhci-s3c.c

200

if ((rate >> shift) <= wanted)

drivers/mmc/host/sdhci-s3c.c

204

if (shift > 8) {

drivers/mmc/host/sdhci-s3c.c

212

src, rate, wanted, rate >> shift);

drivers/mmc/host/sdhci-s3c.c

214

return wanted - (rate >> shift);

drivers/mtd/devices/phram.c

185

int shift = 0;

drivers/mtd/devices/phram.c

194

shift += 10;

drivers/mtd/devices/phram.c

197

shift += 10;

drivers/mtd/devices/phram.c

200

shift += 10;

drivers/mtd/devices/phram.c

210

*num64 <<= shift;

drivers/mtd/maps/physmap-bt1-rom.c

33

unsigned int shift;

drivers/mtd/maps/physmap-bt1-rom.c

38

shift = (uintptr_t)src & 0x3;

drivers/mtd/maps/physmap-bt1-rom.c

39

data = readl_relaxed(src - shift);

drivers/mtd/maps/physmap-bt1-rom.c

40

if (!shift) {

drivers/mtd/maps/physmap-bt1-rom.c

44

ret.x[0] = data >> (shift * BITS_PER_BYTE);

drivers/mtd/maps/physmap-bt1-rom.c

47

shift = 4 - shift;

drivers/mtd/maps/physmap-bt1-rom.c

48

if (ofs + shift >= map->size)

drivers/mtd/maps/physmap-bt1-rom.c

51

data = readl_relaxed(src + shift);

drivers/mtd/maps/physmap-bt1-rom.c

52

ret.x[0] |= data << (shift * BITS_PER_BYTE);

drivers/mtd/maps/physmap-bt1-rom.c

62

unsigned int shift, chunk;

drivers/mtd/maps/physmap-bt1-rom.c

77

shift = (uintptr_t)src & 0x3;

drivers/mtd/maps/physmap-bt1-rom.c

78

if (shift) {

drivers/mtd/maps/physmap-bt1-rom.c

79

chunk = min_t(ssize_t, 4 - shift, len);

drivers/mtd/maps/physmap-bt1-rom.c

80

data = readl_relaxed(src - shift);

drivers/mtd/maps/physmap-bt1-rom.c

81

memcpy(to, (char *)&data + shift, chunk);

drivers/mtd/nand/raw/brcmnand/brcmnand.c

1003

shift = (cs % 5) * bits;

drivers/mtd/nand/raw/brcmnand/brcmnand.c

1005

brcmnand_rmw_reg(ctrl, reg, (bits - 1) << shift, shift, val);

drivers/mtd/nand/raw/brcmnand/brcmnand.c

1096

int shift = brcmnand_sector_1k_shift(ctrl);

drivers/mtd/nand/raw/brcmnand/brcmnand.c

1101

if (shift < 0)

drivers/mtd/nand/raw/brcmnand/brcmnand.c

1105

tmp &= ~(1 << shift);

drivers/mtd/nand/raw/brcmnand/brcmnand.c

1106

tmp |= (!!val) << shift;

drivers/mtd/nand/raw/brcmnand/brcmnand.c

849

int shift, u32 val)

drivers/mtd/nand/raw/brcmnand/brcmnand.c

854

tmp |= val << shift;

drivers/mtd/nand/raw/brcmnand/brcmnand.c

980

unsigned int shift = 0, bits;

drivers/mtd/nand/raw/brcmnand/brcmnand.c

999

shift = (cs % 4) * bits;

drivers/mtd/nand/raw/loongson-nand-controller.c

275

int shift, mask, val;

drivers/mtd/nand/raw/loongson-nand-controller.c

278

shift = i * BITS_PER_BYTE;

drivers/mtd/nand/raw/loongson-nand-controller.c

279

mask = (u32)0xff << shift;

drivers/mtd/nand/raw/loongson-nand-controller.c

281

val = (u32)op->addrs[i] << shift;

drivers/mtd/nand/raw/loongson-nand-controller.c

284

shift = op->row_start + (i - LOONGSON_NAND_COL_ADDR_CYC) * BITS_PER_BYTE;

drivers/mtd/nand/raw/loongson-nand-controller.c

285

mask = (u32)0xff << shift;

drivers/mtd/nand/raw/loongson-nand-controller.c

286

val = (u32)op->addrs[i] << shift;

drivers/mtd/nand/raw/loongson-nand-controller.c

290

mask = (u32)0xff >> (BITS_PER_WORD - shift);

drivers/mtd/nand/raw/loongson-nand-controller.c

291

val = (u32)op->addrs[i] >> (BITS_PER_WORD - shift);

drivers/mtd/nand/raw/loongson-nand-controller.c

303

int shift, mask, val;

drivers/mtd/nand/raw/loongson-nand-controller.c

306

shift = i * BITS_PER_BYTE;

drivers/mtd/nand/raw/loongson-nand-controller.c

307

mask = (u32)0xff << shift;

drivers/mtd/nand/raw/loongson-nand-controller.c

308

val = (u32)op->addrs[i] << shift;

drivers/mtd/nand/raw/loongson-nand-controller.c

311

shift = (i - LOONGSON_NAND_COL_ADDR_CYC) * BITS_PER_BYTE;

drivers/mtd/nand/raw/loongson-nand-controller.c

312

mask = (u32)0xff << shift;

drivers/mtd/nand/raw/loongson-nand-controller.c

313

val = (u32)op->addrs[i] << shift;

drivers/mtd/nand/raw/meson_nand.c

1159

nfc->nand_divider.shift = CLK_DIV_SHIFT;

drivers/mtd/nand/raw/mxc_nand.c

105

#define NFC_V3_CONFIG2_PPB(x, shift) (((x) & 0x3) << shift)

drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c

160

int i, shift;

drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c

163

shift = (swap ? 3 - i : i) * 8;

drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c

164

ptr[i] = (value >> shift) & 0xff;

drivers/mtd/nand/raw/txx9ndfmc.c

87

return drvdata->base + (reg << plat->shift);

drivers/mtd/nand/raw/vf610_nfc.c

195

u32 mask, u32 shift, u32 val)

drivers/mtd/nand/raw/vf610_nfc.c

198

(vf610_nfc_read(nfc, reg) & (~mask)) | val << shift);

drivers/mtd/spi-nor/sfdp.c

527

half = bfpt.dwords[er->dword] >> er->shift;

drivers/mtd/spi-nor/sfdp.c

78

u32 shift;

drivers/net/can/grcan.c

1165

u32 i, rtr, eff, j, shift;

drivers/net/can/grcan.c

1203

shift = GRCAN_MSG_DATA_SHIFT(i);

drivers/net/can/grcan.c

1204

cf->data[i] = (u8)(slot[j] >> shift);

drivers/net/can/grcan.c

1345

int j, shift;

drivers/net/can/grcan.c

1400

shift = GRCAN_MSG_DATA_SHIFT(i);

drivers/net/can/grcan.c

1401

slot[j] |= cf->data[i] << shift;

drivers/net/can/grcan.c

940

size_t shift;

drivers/net/can/grcan.c

966

shift = large->handle - dma->base_handle;

drivers/net/can/grcan.c

968

large->buf = dma->base_buf + shift;

drivers/net/can/rcar/rcar_canfd.c

775

unsigned int shift = 32 - (ch % rnc_stride + 1) * gpriv->info->rnc_field_width;

drivers/net/can/rcar/rcar_canfd.c

777

u32 rnc = num_rules << shift;

drivers/net/can/rockchip/rockchip_canfd-timestamp.c

69

clocks_calc_mult_shift(&cc->mult, &cc->shift, rate, NSEC_PER_SEC,

drivers/net/can/rockchip/rockchip_canfd-timestamp.c

74

work_delay_ns = clocksource_cyc2ns(max_cycles, cc->mult, cc->shift);

drivers/net/can/rockchip/rockchip_canfd-timestamp.c

86

cc->mult, cc->shift,

drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c

113

len = (chip_head << shift) - (tail << shift);

drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c

114

*len_p = len >> shift;

drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c

78

const u8 shift = ring->obj_num_shift_to_u8;

drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c

120

const u8 shift = tx_ring->obj_num_shift_to_u8;

drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c

154

len = (chip_tx_tail << shift) - (tail << shift);

drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c

155

len >>= shift;

drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c

48

cc->shift = 1;

drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c

49

cc->mult = clocksource_hz2mult(priv->can.clock.freq, cc->shift);

drivers/net/can/usb/gs_usb.c

480

cc->shift = 32 - bits_per(NSEC_PER_SEC / GS_USB_TIMESTAMP_TIMER_HZ);

drivers/net/can/usb/gs_usb.c

481

cc->mult = clocksource_hz2mult(GS_USB_TIMESTAMP_TIMER_HZ, cc->shift);

drivers/net/dsa/bcm_sf2.c

511

int shift;

drivers/net/dsa/bcm_sf2.c

521

shift = CROSSBAR_BCM4908_INT_P7 * priv->num_crossbar_ext_bits;

drivers/net/dsa/bcm_sf2.c

522

reg &= ~(mask << shift);

drivers/net/dsa/bcm_sf2.c

524

reg |= CROSSBAR_BCM4908_EXT_SERDES << shift;

drivers/net/dsa/bcm_sf2.c

526

reg |= CROSSBAR_BCM4908_EXT_GPHY4 << shift;

drivers/net/dsa/bcm_sf2.c

528

reg |= CROSSBAR_BCM4908_EXT_RGMII << shift;

drivers/net/dsa/bcm_sf2.c

539

shift = i * priv->num_crossbar_ext_bits;

drivers/net/dsa/bcm_sf2.c

542

(reg >> shift) & mask);

drivers/net/dsa/hirschmann/hellcreek.c

377

int *shift, int *mask)

drivers/net/dsa/hirschmann/hellcreek.c

381

*shift = HR_VIDMBRCFG_P0MBR_SHIFT;

drivers/net/dsa/hirschmann/hellcreek.c

385

*shift = HR_VIDMBRCFG_P1MBR_SHIFT;

drivers/net/dsa/hirschmann/hellcreek.c

389

*shift = HR_VIDMBRCFG_P2MBR_SHIFT;

drivers/net/dsa/hirschmann/hellcreek.c

393

*shift = HR_VIDMBRCFG_P3MBR_SHIFT;

drivers/net/dsa/hirschmann/hellcreek.c

397

*shift = *mask = 0;

drivers/net/dsa/hirschmann/hellcreek.c

405

int shift, mask;

drivers/net/dsa/hirschmann/hellcreek.c

417

hellcreek_select_vlan_params(hellcreek, port, &shift, &mask);

drivers/net/dsa/hirschmann/hellcreek.c

421

val |= HELLCREEK_VLAN_UNTAGGED_MEMBER << shift;

drivers/net/dsa/hirschmann/hellcreek.c

423

val |= HELLCREEK_VLAN_TAGGED_MEMBER << shift;

drivers/net/dsa/hirschmann/hellcreek.c

434

int shift, mask;

drivers/net/dsa/hirschmann/hellcreek.c

444

hellcreek_select_vlan_params(hellcreek, port, &shift, &mask);

drivers/net/dsa/hirschmann/hellcreek.c

447

val |= HELLCREEK_VLAN_NO_MEMBER << shift;

drivers/net/dsa/microchip/ksz9477_acl.c

339

int shift;

drivers/net/dsa/microchip/ksz9477_acl.c

364

shift = new_idx - old_idx;

drivers/net/dsa/microchip/ksz9477_acl.c

367

if (shift > 0)

drivers/net/dsa/microchip/ksz9477_acl.c

368

rule_linkage <<= shift;

drivers/net/dsa/microchip/ksz9477_acl.c

370

rule_linkage >>= -shift;

drivers/net/dsa/microchip/ksz_dcb.c

102

*shift = __bf_shf(KSZ8_PORT_BASED_PRIO_M);

drivers/net/dsa/microchip/ksz_dcb.c

108

*shift = __bf_shf(KSZ9477_PORT_BASED_PRIO_M);

drivers/net/dsa/microchip/ksz_dcb.c

185

int ret, reg, shift;

drivers/net/dsa/microchip/ksz_dcb.c

188

ksz_get_default_port_prio_reg(dev, &reg, &mask, &shift);

drivers/net/dsa/microchip/ksz_dcb.c

194

return (data & mask) >> shift;

drivers/net/dsa/microchip/ksz_dcb.c

212

int reg, shift;

drivers/net/dsa/microchip/ksz_dcb.c

218

ksz_get_default_port_prio_reg(dev, &reg, &mask, &shift);

drivers/net/dsa/microchip/ksz_dcb.c

220

return ksz_prmw8(dev, port, reg, mask, (prio << shift) & mask);

drivers/net/dsa/microchip/ksz_dcb.c

239

int reg, per_reg, ret, shift;

drivers/net/dsa/microchip/ksz_dcb.c

268

shift = (dscp % per_reg) * (8 / per_reg);

drivers/net/dsa/microchip/ksz_dcb.c

270

return (data >> shift) & mask;

drivers/net/dsa/microchip/ksz_dcb.c

286

int reg, per_reg, shift;

drivers/net/dsa/microchip/ksz_dcb.c

291

shift = (dscp % per_reg) * (8 / per_reg);

drivers/net/dsa/microchip/ksz_dcb.c

293

return ksz_rmw8(dev, reg + (dscp / per_reg), mask << shift,

drivers/net/dsa/microchip/ksz_dcb.c

294

ipm << shift);

drivers/net/dsa/microchip/ksz_dcb.c

97

u8 *mask, int *shift)

drivers/net/dsa/mv88e6xxx/global1_atu.c

378

int shift;

drivers/net/dsa/mv88e6xxx/global1_atu.c

384

shift = bitmap_weight(&mask, 16);

drivers/net/dsa/mv88e6xxx/global1_atu.c

388

entry.portvec |= (to_port & mask) << shift;

drivers/net/dsa/mv88e6xxx/port.c

1613

u16 *mask, u16 *val, int *shift)

drivers/net/dsa/mv88e6xxx/port.c

1617

*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_DA_MASK);

drivers/net/dsa/mv88e6xxx/port.c

1621

*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_SA_MASK);

drivers/net/dsa/mv88e6xxx/port.c

1625

*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_VTU_MASK);

drivers/net/dsa/mv88e6xxx/port.c

1629

*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_ETYPE_MASK);

drivers/net/dsa/mv88e6xxx/port.c

1633

*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_PPPOE_MASK);

drivers/net/dsa/mv88e6xxx/port.c

1637

*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_VBAS_MASK);

drivers/net/dsa/mv88e6xxx/port.c

1641

*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_OPT82_MASK);

drivers/net/dsa/mv88e6xxx/port.c

1645

*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_UDP_MASK);

drivers/net/dsa/mv88e6xxx/port.c

1677

int shift;

drivers/net/dsa/mv88e6xxx/port.c

1681

&val, &shift);

drivers/net/dsa/mv88e6xxx/port.c

1690

reg |= (val << shift) & mask;

drivers/net/dsa/mv88e6xxx/port.c

1700

int shift;

drivers/net/dsa/mv88e6xxx/port.c

1706

&val, &shift);

drivers/net/dsa/mv88e6xxx/port.c

1715

ptr = shift / 8;

drivers/net/dsa/mv88e6xxx/port.c

1716

shift %= 8;

drivers/net/dsa/mv88e6xxx/port.c

1725

reg |= (val << shift) & mask;

drivers/net/dsa/mv88e6xxx/ptp.c

487

chip->tstamp_cc.shift = chip->cc_coeffs->cc_shift;

drivers/net/dsa/qca/qca8k-leds.c

150

mask << reg_info.shift,

drivers/net/dsa/qca/qca8k-leds.c

151

val << reg_info.shift);

drivers/net/dsa/qca/qca8k-leds.c

177

val >>= reg_info.shift;

drivers/net/dsa/qca/qca8k-leds.c

221

regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift,

drivers/net/dsa/qca/qca8k-leds.c

222

val << reg_info.shift);

drivers/net/dsa/qca/qca8k-leds.c

248

return regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift,

drivers/net/dsa/qca/qca8k-leds.c

249

val << reg_info.shift);

drivers/net/dsa/qca/qca8k-leds.c

265

val >>= reg_info.shift;

drivers/net/dsa/qca/qca8k-leds.c

27

reg_info->shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT;

drivers/net/dsa/qca/qca8k-leds.c

305

QCA8K_LED_RULE_MASK << reg_info.shift,

drivers/net/dsa/qca/qca8k-leds.c

306

offload_trigger << reg_info.shift);

drivers/net/dsa/qca/qca8k-leds.c

328

val >>= reg_info.shift;

drivers/net/dsa/qca/qca8k-leds.c

34

reg_info->shift = QCA8K_LED_PHY123_PATTERN_EN_SHIFT(port_num, led_num);

drivers/net/dsa/qca/qca8k-leds.c

38

reg_info->shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT;

drivers/net/dsa/qca/qca8k-leds.c

57

reg_info->shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT;

drivers/net/dsa/qca/qca8k-leds.c

59

reg_info->shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT;

drivers/net/dsa/qca/qca8k.h

433

u8 shift;

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c

21

u32 shift, u32 val)

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c

27

reg_new = (reg_old & (~msk)) | (val << shift);

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c

36

u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift)

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c

38

return ((aq_hw_read_reg(aq_hw, addr) & msk) >> shift);

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h

32

u32 shift, u32 val);

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h

33

u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift);

drivers/net/ethernet/atheros/alx/main.c

810

int i, vector, idx, shift;

drivers/net/ethernet/atheros/alx/main.c

816

shift = txq_vec_mapping_shift[i * 2 + 1];

drivers/net/ethernet/atheros/alx/main.c

817

tbl[idx] |= vector << shift;

drivers/net/ethernet/broadcom/asp2/bcmasp.c

273

u32 shift, mask_val = 0, match_val = 0;

drivers/net/ethernet/broadcom/asp2/bcmasp.c

294

shift = (3 - (offset % 4)) * 8;

drivers/net/ethernet/broadcom/asp2/bcmasp.c

295

match_val &= ~GENMASK(shift + 7, shift);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

296

mask_val &= ~GENMASK(shift + 7, shift);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

297

match_val |= (u32)(*((u8 *)match) << shift);

drivers/net/ethernet/broadcom/asp2/bcmasp.c

298

mask_val |= (u32)(*((u8 *)mask) << shift);

drivers/net/ethernet/broadcom/bnx2.c

5329

int shift = (i % 8) << 2;

drivers/net/ethernet/broadcom/bnx2.c

5331

tbl_32 |= (i % (bp->num_rx_rings - 1)) << shift;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c

2094

static u32 bnx2x_linkmode_to_eee(const unsigned long *mode, u32 shift)

drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c

2105

return eee_adv << shift;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

15198

bp->cyclecounter.shift = 0;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

4509

u32 shift = BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_SHIFT :

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

4518

val1 = (val & mask) >> shift;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

4527

val |= ((val1 << shift) & mask);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

4547

u32 shift = BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_SHIFT :

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

4555

val1 = (val & mask) >> shift;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

4564

val |= ((val1 << shift) & mask);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

4580

u32 shift = (engine ? BNX2X_PATH1_LOAD_CNT_SHIFT :

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

4586

val = (val & mask) >> shift;

drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c

1039

ptp->cc.shift = BNXT_CYCLES_SHIFT;

drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c

1040

ptp->cc.mult = clocksource_khz2mult(BNXT_DEVCLK_FREQ, ptp->cc.shift);

drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c

1043

ptp->cc.shift = 0;

drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c

436

*cycles_delta = div64_u64(nsec_delta << ptp->cc.shift, ptp->cc.mult);

drivers/net/ethernet/broadcom/tg3.c

2788

u32 status, shift;

drivers/net/ethernet/broadcom/tg3.c

2796

shift = TG3_APE_GPIO_MSG_SHIFT + 4 * tp->pci_fn;

drivers/net/ethernet/broadcom/tg3.c

2797

status &= ~(TG3_GPIO_MSG_MASK << shift);

drivers/net/ethernet/broadcom/tg3.c

2798

status |= (newstat << shift);

drivers/net/ethernet/cadence/macb_main.c

678

unsigned int i, cycles, shift, curr, next;

drivers/net/ethernet/cadence/macb_main.c

703

shift = tail % ring_size;

drivers/net/ethernet/cadence/macb_main.c

704

cycles = gcd(ring_size, shift);

drivers/net/ethernet/cadence/macb_main.c

712

next = (curr + shift) % ring_size;

drivers/net/ethernet/cadence/macb_main.c

730

next = (curr + shift) % ring_size;

drivers/net/ethernet/cavium/common/cavium_ptp.c

253

cc->shift = 0;

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

149

static const int shift[] = { 0, 0, 16, 24 };

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

184

val >>= shift[mc7->width];

drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h

223

unsigned int shift = tformat->idx_bits + tformat->color_bits;

drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h

225

u32 upper = (sw_tag >> shift) << (shift + 1);

drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h

236

unsigned int shift = tformat->idx_bits + tformat->color_bits;

drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h

238

u32 upper = (tag >> tformat->rsvd_bits) << shift;

drivers/net/ethernet/freescale/fec_ptp.c

328

fep->cc.shift = 31;

drivers/net/ethernet/hisilicon/hns/hnae.h

693

#define hnae_set_field(origin, mask, shift, val) \

drivers/net/ethernet/hisilicon/hns/hnae.h

696

(origin) |= ((val) << (shift)) & (mask); \

drivers/net/ethernet/hisilicon/hns/hnae.h

699

#define hnae_set_bit(origin, shift, val) \

drivers/net/ethernet/hisilicon/hns/hnae.h

700

hnae_set_field((origin), (0x1 << (shift)), (shift), (val))

drivers/net/ethernet/hisilicon/hns/hnae.h

702

#define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))

drivers/net/ethernet/hisilicon/hns/hnae.h

704

#define hnae_get_bit(origin, shift) \

drivers/net/ethernet/hisilicon/hns/hnae.h

705

hnae_get_field((origin), (0x1 << (shift)), (shift))

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1043

#define dsaf_set_field(origin, mask, shift, val) \

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1046

(origin) |= (((val) << (shift)) & (mask)); \

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1049

#define dsaf_set_bit(origin, shift, val) \

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1050

dsaf_set_field((origin), (1ull << (shift)), (shift), (val))

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1053

u32 shift, u32 val)

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1057

dsaf_set_field(origin, mask, shift, val);

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1061

#define dsaf_set_dev_field(dev, reg, mask, shift, val) \

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1062

dsaf_set_reg_field((dev)->io_base, (reg), (mask), (shift), (val))

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1067

#define dsaf_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1069

#define dsaf_get_bit(origin, shift) \

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1070

dsaf_get_field((origin), (1ull << (shift)), (shift))

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1073

u32 shift)

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1078

return dsaf_get_field(origin, mask, shift);

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1081

#define dsaf_get_dev_field(dev, reg, mask, shift) \

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

1082

dsaf_get_reg_field((dev)->io_base, (reg), (mask), (shift))

drivers/net/ethernet/hisilicon/hns3/hnae3.h

940

#define hnae3_set_field(origin, mask, shift, val) \

drivers/net/ethernet/hisilicon/hns3/hnae3.h

943

(origin) |= ((val) << (shift)) & (mask); \

drivers/net/ethernet/hisilicon/hns3/hnae3.h

945

#define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))

drivers/net/ethernet/hisilicon/hns3/hnae3.h

947

#define hnae3_set_bit(origin, shift, val) \

drivers/net/ethernet/hisilicon/hns3/hnae3.h

948

hnae3_set_field(origin, 0x1 << (shift), shift, val)

drivers/net/ethernet/hisilicon/hns3/hnae3.h

949

#define hnae3_get_bit(origin, shift) \

drivers/net/ethernet/hisilicon/hns3/hnae3.h

950

hnae3_get_field(origin, 0x1 << (shift), shift)

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

39

#define hns3_set_field(origin, shift, val) ((origin) |= (val) << (shift))

drivers/net/ethernet/hisilicon/hns_mdio.c

108

#define mdio_set_field(origin, mask, shift, val) \

drivers/net/ethernet/hisilicon/hns_mdio.c

110

(origin) &= (~((mask) << (shift))); \

drivers/net/ethernet/hisilicon/hns_mdio.c

111

(origin) |= (((val) & (mask)) << (shift)); \

drivers/net/ethernet/hisilicon/hns_mdio.c

114

#define mdio_get_field(origin, mask, shift) (((origin) >> (shift)) & (mask))

drivers/net/ethernet/hisilicon/hns_mdio.c

116

static void mdio_set_reg_field(u8 __iomem *base, u32 reg, u32 mask, u32 shift,

drivers/net/ethernet/hisilicon/hns_mdio.c

121

mdio_set_field(origin, mask, shift, val);

drivers/net/ethernet/hisilicon/hns_mdio.c

125

#define MDIO_SET_REG_FIELD(dev, reg, mask, shift, val) \

drivers/net/ethernet/hisilicon/hns_mdio.c

126

mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val))

drivers/net/ethernet/hisilicon/hns_mdio.c

128

static u32 mdio_get_reg_field(u8 __iomem *base, u32 reg, u32 mask, u32 shift)

drivers/net/ethernet/hisilicon/hns_mdio.c

133

return mdio_get_field(origin, mask, shift);

drivers/net/ethernet/hisilicon/hns_mdio.c

136

#define MDIO_GET_REG_FIELD(dev, reg, mask, shift) \

drivers/net/ethernet/hisilicon/hns_mdio.c

137

mdio_get_reg_field((dev)->vbase, (reg), (mask), (shift))

drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h

41

u8 shift;

drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h

43

shift = qpages->elem_per_pg_shift;

drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h

44

page_idx = (idx >> shift) & (qpages->num_pages - 1);

drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h

45

elem_per_pg = 1 << shift;

drivers/net/ethernet/ibm/ibmvnic.c

786

int shift = 0;

drivers/net/ethernet/ibm/ibmvnic.c

852

shift = 8;

drivers/net/ethernet/ibm/ibmvnic.c

854

sub_crq->rx_add.len = cpu_to_be32(pool->buff_size << shift);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4746

u16 data, i, temp, shift;

drivers/net/ethernet/intel/e1000e/ich8lan.c

4759

shift = (i * 5);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4764

mac->ledctl_mode1 &= ~(E1000_PHY_LED0_MASK << shift);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4765

mac->ledctl_mode1 |= (ledctl_on << shift);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4770

mac->ledctl_mode1 &= ~(E1000_PHY_LED0_MASK << shift);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4771

mac->ledctl_mode1 |= (ledctl_off << shift);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4781

mac->ledctl_mode2 &= ~(E1000_PHY_LED0_MASK << shift);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4782

mac->ledctl_mode2 |= (ledctl_on << shift);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4787

mac->ledctl_mode2 &= ~(E1000_PHY_LED0_MASK << shift);

drivers/net/ethernet/intel/e1000e/ich8lan.c

4788

mac->ledctl_mode2 |= (ledctl_off << shift);

drivers/net/ethernet/intel/e1000e/netdev.c

3486

u32 incvalue, incperiod, shift;

drivers/net/ethernet/intel/e1000e/netdev.c

3507

shift = INCVALUE_SHIFT_96MHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3508

adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3515

shift = INCVALUE_SHIFT_96MHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3516

adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3521

shift = INCVALUE_SHIFT_25MHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3522

adapter->cc.shift = shift;

drivers/net/ethernet/intel/e1000e/netdev.c

3529

shift = INCVALUE_SHIFT_24MHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3530

adapter->cc.shift = shift;

drivers/net/ethernet/intel/e1000e/netdev.c

3540

shift = INCVALUE_SHIFT_24MHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3541

adapter->cc.shift = shift;

drivers/net/ethernet/intel/e1000e/netdev.c

3546

shift = INCVALUE_SHIFT_38400KHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3547

adapter->cc.shift = shift;

drivers/net/ethernet/intel/e1000e/netdev.c

3558

shift = INCVALUE_SHIFT_38400KHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3559

adapter->cc.shift = shift;

drivers/net/ethernet/intel/e1000e/netdev.c

3566

shift = INCVALUE_SHIFT_25MHZ;

drivers/net/ethernet/intel/e1000e/netdev.c

3567

adapter->cc.shift = shift;

drivers/net/ethernet/intel/e1000e/netdev.c

3574

((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));

drivers/net/ethernet/intel/i40e/i40e_register.h

8

#define I40E_MASK(mask, shift) ((u32)(mask) << (shift))

drivers/net/ethernet/intel/iavf/iavf_type.h

14

#define IAVF_MASK(mask, shift) ((u32)(mask) << (shift))

drivers/net/ethernet/intel/ice/ice_parser_rt.c

487

u16 dst, src, shift, imm;

drivers/net/ethernet/intel/ice/ice_parser_rt.c

500

shift = alu->shift_xlate_key;

drivers/net/ethernet/intel/ice/ice_parser_rt.c

507

dst = (src << shift) + imm;

drivers/net/ethernet/intel/ice/ice_parser_rt.c

511

dst += (src << shift) + imm;

drivers/net/ethernet/intel/ice/ice_parser_rt.c

529

dst = (src << shift) ^ imm;

drivers/net/ethernet/intel/igb/igb_ethtool.c

3291

u32 shift = 0;

drivers/net/ethernet/intel/igb/igb_ethtool.c

3296

shift = 6;

drivers/net/ethernet/intel/igb/igb_ethtool.c

3301

shift = 3;

drivers/net/ethernet/intel/igb/igb_ethtool.c

3316

wr32(reg, val << shift);

drivers/net/ethernet/intel/igb/igb_ptp.c

1325

adapter->cc.shift = IGB_82576_TSYNC_SHIFT;

drivers/net/ethernet/intel/igb/igb_ptp.c

1352

adapter->cc.shift = 0;

drivers/net/ethernet/intel/igc/igc_ethtool.c

1467

u32 shift = 0;

drivers/net/ethernet/intel/igc/igc_ethtool.c

1479

wr32(reg, val << shift);

drivers/net/ethernet/intel/igc/igc_leds.c

103

u32 shift, mask, blink_bit, ledctl;

drivers/net/ethernet/intel/igc/igc_leds.c

106

igc_led_select(adapter, led, &mask, &shift, &blink_bit);

drivers/net/ethernet/intel/igc/igc_leds.c

114

return (ledctl & mask) >> shift;

drivers/net/ethernet/intel/igc/igc_leds.c

50

u32 *mask, u32 *shift, u32 *blink)

drivers/net/ethernet/intel/igc/igc_leds.c

55

*shift = IGC_LEDCTL_LED0_MODE_SHIFT;

drivers/net/ethernet/intel/igc/igc_leds.c

60

*shift = IGC_LEDCTL_LED1_MODE_SHIFT;

drivers/net/ethernet/intel/igc/igc_leds.c

65

*shift = IGC_LEDCTL_LED2_MODE_SHIFT;

drivers/net/ethernet/intel/igc/igc_leds.c

69

*mask = *shift = *blink = 0;

drivers/net/ethernet/intel/igc/igc_leds.c

77

u32 shift, mask, blink_bit, ledctl;

drivers/net/ethernet/intel/igc/igc_leds.c

80

igc_led_select(adapter, led, &mask, &shift, &blink_bit);

drivers/net/ethernet/intel/igc/igc_leds.c

88

ledctl |= mode << shift;

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1160

u32 *shift, u32 *incval)

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1178

*shift = IXGBE_INCVAL_SHIFT_100;

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1182

*shift = IXGBE_INCVAL_SHIFT_1GB;

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1187

*shift = IXGBE_INCVAL_SHIFT_10GB;

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1224

cc.shift = 0;

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1237

cc.shift = 2;

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1248

ixgbe_ptp_link_speed_adjust(adapter, &cc.shift, &incval);

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1254

ixgbe_ptp_link_speed_adjust(adapter, &cc.shift, &incval);

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

1256

cc.shift -= IXGBE_INCVAL_SHIFT_82599;

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

194

clock_period = div_u64((NS_PER_HALF_SEC << cc->shift), cc->mult);

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

213

clock_edge += div_u64(((u64)rem << cc->shift), cc->mult);

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

279

freqout = div_u64(NS_PER_HALF_SEC << cc->shift, cc->mult);

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c

296

clock_edge += div_u64(((u64)rem << cc->shift), cc->mult);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

1987

unsigned int mask = 0xfff, reg_val, shift;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2001

shift = MVPP2_VLAN_TAG_EDSA_LEN;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2003

shift = MVPP2_VLAN_TAG_LEN;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2035

mvpp2_prs_sram_shift_set(&pe, shift, MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2109

unsigned int reg_val, shift;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2123

shift = MVPP2_VLAN_TAG_EDSA_LEN;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2125

shift = MVPP2_VLAN_TAG_LEN;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2139

mvpp2_prs_sram_shift_set(&pe, shift, MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

319

static void mvpp2_prs_sram_shift_set(struct mvpp2_prs_entry *pe, int shift,

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

323

if (shift < 0) {

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

325

shift = 0 - shift;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

332

shift & MVPP2_PRS_SRAM_SHIFT_MASK;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

557

int tid, shift;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

561

shift = 8;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

564

shift = 4;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

600

mvpp2_prs_sram_shift_set(&pe, shift,

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

624

int tid, shift, port_mask;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

630

shift = 8;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

635

shift = 4;

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

654

mvpp2_prs_sram_shift_set(&pe, 2 + MVPP2_ETH_TYPE_LEN + shift,

drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c

151

aura->shift, aura->avg_level);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c

197

pool->stack_offset, pool->shift, pool->avg_level);

drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h

258

u64 shift : 6;

drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h

335

u64 shift : 6;

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

1128

#define TXSCHQ_IDX(reg, shift) (((reg) >> (shift)) & TXSCHQ_IDX_MASK)

drivers/net/ethernet/marvell/octeontx2/af/npc.h

285

u8 shift;

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

218

int i, shift;

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

268

shift = (i % 2) ? 1 : 0;

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

271

cfg |= ((u64)RPM_DEFAULT_PAUSE_TIME << shift * 16);

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

273

if (!shift)

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

282

cfg |= ((u64)(RPM_DEFAULT_PAUSE_TIME / 2) << shift * 16);

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

284

if (!shift)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1122

aura->shift, aura->avg_level);

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c

1179

pool->stack_offset, pool->shift, pool->avg_level);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

1447

action0.var_len_shift = kpuaction->shift;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

761

u8 shift;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

775

shift = __ffs64(field->kw_mask[i]);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

777

kw1 = (val_lo << shift) & field->kw_mask[i];

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

780

kw1 = (mask_lo << shift) & field->kw_mask[i];

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

788

kw2 = shift ? val_lo >> (64 - shift) : 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

789

kw2 |= (val_hi << shift);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

793

kw2 = shift ? mask_lo >> (64 - shift) : 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

794

kw2 |= (mask_hi << shift);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

802

kw2 = shift ? val_lo >> (64 - shift) : 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

803

kw2 |= (val_hi << shift);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

805

kw3 = shift ? val_hi >> (64 - shift) : 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

810

kw2 = shift ? mask_lo >> (64 - shift) : 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

811

kw2 |= (mask_hi << shift);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c

813

kw3 = shift ? mask_hi >> (64 - shift) : 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h

193

u64 shift : 6;

drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h

250

u64 shift : 6;

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

290

aq->aura.shift = ilog2(numptrs) - 8;

drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c

371

aq->pool.shift = ilog2(numptrs) - 8;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c

1410

aq->aura.shift = ilog2(numptrs) - 8;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c

1500

aq->pool.shift = ilog2(numptrs) - 8;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c

453

cc->shift = 0;

drivers/net/ethernet/mellanox/mlx4/en_clock.c

278

mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock);

drivers/net/ethernet/mellanox/mlx4/en_clock.c

280

clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1218

timer->cycles.shift = mlx5_ptp_shift_constant(dev_freq);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1220

timer->cycles.shift);

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

1281

info->shift = timer->cycles.shift;

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

789

cycles_delta = div64_u64(nsec_delta << timer->cycles.shift,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h

74

u32 shift;

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

193

gw_reg |= ((data << mdio_gw->write_data.shift) &

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

195

gw_reg |= ((phy_reg << mdio_gw->devad.shift) &

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

197

gw_reg |= ((phy_add << mdio_gw->partad.shift) &

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

199

gw_reg |= ((opcode << mdio_gw->opcode.shift) &

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

201

gw_reg |= ((MLXBF_GIGE_MDIO_CL22_ST1 << mdio_gw->st1.shift) &

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

203

gw_reg |= ((MLXBF_GIGE_MDIO_SET_BUSY << mdio_gw->busy.shift) &

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

35

.shift = MLXBF2_GIGE_MDIO_GW_BUSY_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

39

.shift = MLXBF2_GIGE_MDIO_GW_AD_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

43

.shift = MLXBF2_GIGE_MDIO_GW_AD_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

47

.shift = MLXBF2_GIGE_MDIO_GW_DEVAD_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

51

.shift = MLXBF2_GIGE_MDIO_GW_PARTAD_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

55

.shift = MLXBF2_GIGE_MDIO_GW_OPCODE_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

59

.shift = MLXBF2_GIGE_MDIO_GW_ST1_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

67

.shift = MLXBF3_GIGE_MDIO_GW_BUSY_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

71

.shift = MLXBF3_GIGE_MDIO_GW_DATA_READ_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

75

.shift = MLXBF3_GIGE_MDIO_GW_DATA_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

79

.shift = MLXBF3_GIGE_MDIO_GW_DEVAD_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

83

.shift = MLXBF3_GIGE_MDIO_GW_PARTAD_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

87

.shift = MLXBF3_GIGE_MDIO_GW_OPCODE_SHIFT,

drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c

91

.shift = MLXBF3_GIGE_MDIO_GW_ST1_SHIFT,

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h

62

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h

95

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

103

val <<= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

120

tmp >>= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

123

tmp <<= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

133

u32 mask = GENMASK(item->size.bits - 1, 0) << item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

137

val <<= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

15

unsigned char shift; /* shift in bits */

drivers/net/ethernet/mellanox/mlxsw/item.h

154

tmp >>= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

157

tmp <<= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

166

u64 mask = GENMASK_ULL(item->size.bits - 1, 0) << item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

170

val <<= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

206

u16 index, u8 *shift)

drivers/net/ethernet/mellanox/mlxsw/item.h

228

*shift = in_byte_index * item->element_size;

drivers/net/ethernet/mellanox/mlxsw/item.h

237

u8 shift, tmp;

drivers/net/ethernet/mellanox/mlxsw/item.h

238

u16 offset = __mlxsw_item_bit_array_offset(item, index, &shift);

drivers/net/ethernet/mellanox/mlxsw/item.h

241

tmp >>= shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

250

u8 shift, tmp;

drivers/net/ethernet/mellanox/mlxsw/item.h

251

u16 offset = __mlxsw_item_bit_array_offset(item, index, &shift);

drivers/net/ethernet/mellanox/mlxsw/item.h

252

u8 mask = GENMASK(item->element_size - 1, 0) << shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

254

val <<= shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

273

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

294

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

316

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

337

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

359

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

380

.shift = _shift1, \

drivers/net/ethernet/mellanox/mlxsw/item.h

386

.shift = _shift2, \

drivers/net/ethernet/mellanox/mlxsw/item.h

416

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

438

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

459

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/item.h

52

tmp >>= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

55

tmp <<= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

65

u8 mask = GENMASK(item->size.bits - 1, 0) << item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

69

val <<= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

86

tmp >>= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

89

tmp <<= item->shift;

drivers/net/ethernet/mellanox/mlxsw/item.h

99

u16 mask = GENMASK(item->size.bits - 1, 0) << item->shift;

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c

528

u32 shift;

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c

537

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c

729

val >>= mact->shift;

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c

267

.shift = _shift, \

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

157

cycles <<= tc->cc->shift;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

286

clock->cycles.shift = MLXSW_SP1_PTP_CLOCK_CYCLES_SHIFT;

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c

288

clock->cycles.shift);

drivers/net/ethernet/meta/fbnic/fbnic_tlv.c

226

int shift;

drivers/net/ethernet/meta/fbnic/fbnic_tlv.c

232

shift = (8 + sizeof(*attr) - le16_to_cpu(attr->hdr.len)) * 8;

drivers/net/ethernet/meta/fbnic/fbnic_tlv.c

240

return (value << shift) >> shift;

drivers/net/ethernet/micrel/ksz884x.c

3435

int shift;

drivers/net/ethernet/micrel/ksz884x.c

3437

shift = 0;

drivers/net/ethernet/micrel/ksz884x.c

3439

shift++;

drivers/net/ethernet/micrel/ksz884x.c

3442

if (alloc != 1 || shift < MIN_DESC_SHIFT) {

drivers/net/ethernet/micrel/ksz884x.c

3445

shift++;

drivers/net/ethernet/micrel/ksz884x.c

3448

if (shift < MIN_DESC_SHIFT)

drivers/net/ethernet/micrel/ksz884x.c

3449

shift = MIN_DESC_SHIFT;

drivers/net/ethernet/micrel/ksz884x.c

3450

alloc = 1 << shift;

drivers/net/ethernet/netronome/nfp/bpf/jit.c

274

enum immed_shift shift, bool wr_both,

drivers/net/ethernet/netronome/nfp/bpf/jit.c

285

FIELD_PREP(OP_IMMED_SHIFT, shift) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

295

enum immed_width width, bool invert, enum immed_shift shift)

drivers/net/ethernet/netronome/nfp/bpf/jit.c

314

reg.breg, imm >> 8, width, invert, shift,

drivers/net/ethernet/netronome/nfp/bpf/jit.c

320

enum shf_sc sc, u8 shift,

drivers/net/ethernet/netronome/nfp/bpf/jit.c

326

if (!FIELD_FIT(OP_SHF_SHIFT, shift)) {

drivers/net/ethernet/netronome/nfp/bpf/jit.c

342

if (sc == SHF_SC_L_SHF && shift)

drivers/net/ethernet/netronome/nfp/bpf/jit.c

343

shift = 32 - shift;

drivers/net/ethernet/netronome/nfp/bpf/jit.c

352

FIELD_PREP(OP_SHF_SHIFT, shift) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

364

swreg lreg, enum shf_op op, swreg rreg, enum shf_sc sc, u8 shift)

drivers/net/ethernet/netronome/nfp/bpf/jit.c

375

__emit_shf(nfp_prog, reg.dst, reg.dst_ab, sc, shift,

drivers/net/ethernet/netronome/nfp/bpf/jit.c

488

u8 areg, u8 bmask, u8 breg, u8 shift, bool imm8,

drivers/net/ethernet/netronome/nfp/bpf/jit.c

502

FIELD_PREP(OP_LDF_SHF, shift) |

drivers/net/ethernet/netronome/nfp/bpf/jit.c

512

enum shf_sc sc, u8 shift, bool zero)

drivers/net/ethernet/netronome/nfp/bpf/jit.c

524

__emit_ld_field(nfp_prog, sc, reg.areg, bmask, reg.breg, shift,

drivers/net/ethernet/netronome/nfp/bpf/jit.c

531

enum shf_sc sc, u8 shift)

drivers/net/ethernet/netronome/nfp/bpf/jit.c

533

emit_ld_field_any(nfp_prog, dst, bmask, src, sc, shift, false);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

590

static bool pack_immed(u32 imm, u16 *val, enum immed_shift *shift)

drivers/net/ethernet/netronome/nfp/bpf/jit.c

594

*shift = IMMED_SHIFT_0B;

drivers/net/ethernet/netronome/nfp/bpf/jit.c

597

*shift = IMMED_SHIFT_1B;

drivers/net/ethernet/netronome/nfp/bpf/jit.c

600

*shift = IMMED_SHIFT_2B;

drivers/net/ethernet/netronome/nfp/bpf/jit.c

610

enum immed_shift shift;

drivers/net/ethernet/netronome/nfp/bpf/jit.c

613

if (pack_immed(imm, &val, &shift)) {

drivers/net/ethernet/netronome/nfp/bpf/jit.c

614

emit_immed(nfp_prog, dst, val, IMMED_WIDTH_ALL, false, shift);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

615

} else if (pack_immed(~imm, &val, &shift)) {

drivers/net/ethernet/netronome/nfp/bpf/jit.c

616

emit_immed(nfp_prog, dst, val, IMMED_WIDTH_ALL, true, shift);

drivers/net/ethernet/netronome/nfp/bpf/jit.c

872

u16 shift, sz;

drivers/net/ethernet/netronome/nfp/bpf/jit.c

878

shift = size < 4 ? 4 - size : 0;

drivers/net/ethernet/netronome/nfp/bpf/jit.c

884

if (shift)

drivers/net/ethernet/netronome/nfp/bpf/jit.c

886

reg_xfer(0), SHF_SC_R_SHF, shift * 8);

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c

512

const u64 mask, const unsigned int shift,

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c

530

if (val == (reg & mask) >> shift)

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c

534

reg |= (val << shift) & mask;

drivers/net/ethernet/pensando/ionic/ionic_if.h

1983

__le32 shift;

drivers/net/ethernet/pensando/ionic/ionic_phc.c

327

ctx->cmd.lif_setphc.shift = cpu_to_le32(phc->cc.shift);

drivers/net/ethernet/pensando/ionic/ionic_phc.c

542

u32 shift;

drivers/net/ethernet/pensando/ionic/ionic_phc.c

560

phc->cc.shift = le32_to_cpu(ionic->ident.dev.hwstamp_shift);

drivers/net/ethernet/pensando/ionic/ionic_phc.c

572

phc->cc.mask, phc->cc.mult, phc->cc.shift);

drivers/net/ethernet/pensando/ionic/ionic_phc.c

578

if (phc->cc.shift + 2 + ilog2(IONIC_PHC_UPDATE_NS) >= 64) {

drivers/net/ethernet/pensando/ionic/ionic_phc.c

585

diff = (u64)IONIC_PHC_UPDATE_NS << (phc->cc.shift + 2);

drivers/net/ethernet/pensando/ionic/ionic_phc.c

618

shift = mult / phc->cc.mult;

drivers/net/ethernet/pensando/ionic/ionic_phc.c

619

if (shift >= 2) {

drivers/net/ethernet/pensando/ionic/ionic_phc.c

621

shift = fls(shift);

drivers/net/ethernet/pensando/ionic/ionic_phc.c

623

phc->cc.mult <<= shift;

drivers/net/ethernet/pensando/ionic/ionic_phc.c

624

phc->cc.shift += shift;

drivers/net/ethernet/pensando/ionic/ionic_phc.c

628

phc->cc.mask, phc->cc.mult, phc->cc.shift);

drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c

255

int change, shift, err;

drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c

261

shift = NXRD32(adapter, CRB_DMA_SHIFT);

drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c

262

if (shift > 32)

drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c

265

if (NX_IS_REVISION_P3(adapter->ahw.revision_id) && (shift > 9))

drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c

267

else if ((adapter->ahw.revision_id == NX_P2_C1) && (shift <= 4))

drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c

274

mask = DMA_BIT_MASK(32+shift);

drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c

286

dev_info(&pdev->dev, "using %d-bit dma mask\n", 32+shift);

drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c

1254

u8 shift;

drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c

1273

shift = NIG_REG_ENC_TYPE_ENABLE_VXLAN_ENABLE_SHIFT;

drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c

1274

SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, vxlan_enable);

drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c

1287

u8 shift;

drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c

1310

shift = NIG_REG_ENC_TYPE_ENABLE_ETH_OVER_GRE_ENABLE_SHIFT;

drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c

1311

SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, eth_gre_enable);

drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c

1312

shift = NIG_REG_ENC_TYPE_ENABLE_IP_OVER_GRE_ENABLE_SHIFT;

drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c

1313

SET_TUNNEL_TYPE_ENABLE_BIT(reg_val, shift, ip_gre_enable);

drivers/net/ethernet/qlogic/qede/qede_ptp.c

436

ptp->cc.shift = 0;

drivers/net/ethernet/realtek/r8169_leds.c

106

mode = (mode >> shift) & 0x000f;

drivers/net/ethernet/realtek/r8169_leds.c

58

int shift = ldev->index * 4;

drivers/net/ethernet/realtek/r8169_leds.c

62

rtl8168_led_mod_ctrl(tp, 0x000f << shift, 0);

drivers/net/ethernet/realtek/r8169_leds.c

74

int shift = ldev->index * 4;

drivers/net/ethernet/realtek/r8169_leds.c

86

return rtl8168_led_mod_ctrl(tp, 0x000f << shift, mode << shift);

drivers/net/ethernet/realtek/r8169_leds.c

94

int shift = ldev->index * 4;

drivers/net/ethernet/smsc/smsc911x.c

145

#define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))

drivers/net/ethernet/smsc/smsc911x.c

2401

device_property_read_u32(dev, "reg-shift", &config->shift);

drivers/net/ethernet/smsc/smsc911x.c

2506

if (pdata->config.shift)

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

166

clk_configs->m250_mux.shift = __ffs(PRG_ETH0_CLK_M250_SEL_MASK);

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

168

clk_configs->m250_mux.shift;

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

177

clk_configs->m250_div.shift = PRG_ETH0_CLK_M250_DIV_SHIFT;

drivers/net/ethernet/sun/sunbmac.c

340

int shift = 4;

drivers/net/ethernet/sun/sunbmac.c

343

write_tcvr_bit(bp, tregs, ((byte >> shift) & 1));

drivers/net/ethernet/sun/sunbmac.c

344

shift -= 1;

drivers/net/ethernet/sun/sunbmac.c

345

} while (shift >= 0);

drivers/net/ethernet/sun/sunbmac.c

351

int shift;

drivers/net/ethernet/sun/sunbmac.c

380

shift = 15;

drivers/net/ethernet/sun/sunbmac.c

382

write_tcvr_bit(bp, tregs, (val >> shift) & 1);

drivers/net/ethernet/sun/sunbmac.c

383

shift -= 1;

drivers/net/ethernet/sun/sunbmac.c

384

} while (shift >= 0);

drivers/net/ethernet/sun/sunbmac.c

417

int shift = 15;

drivers/net/ethernet/sun/sunbmac.c

426

retval |= ((tmp & 1) << shift);

drivers/net/ethernet/sun/sunbmac.c

427

shift -= 1;

drivers/net/ethernet/sun/sunbmac.c

428

} while (shift >= 0);

drivers/net/ethernet/sun/sunbmac.c

434

int shift = 15;

drivers/net/ethernet/sun/sunbmac.c

443

retval |= ((tmp & 1) << shift);

drivers/net/ethernet/sun/sunbmac.c

444

shift -= 1;

drivers/net/ethernet/sun/sunbmac.c

445

} while (shift >= 0);

drivers/net/ethernet/ti/cpsw_ale.c

1002

.shift = 0,

drivers/net/ethernet/ti/cpsw_ale.c

1010

.shift = 0,

drivers/net/ethernet/ti/cpsw_ale.c

1018

.shift = 2,

drivers/net/ethernet/ti/cpsw_ale.c

1026

.shift = 3,

drivers/net/ethernet/ti/cpsw_ale.c

1034

.shift = 4,

drivers/net/ethernet/ti/cpsw_ale.c

1042

.shift = 5,

drivers/net/ethernet/ti/cpsw_ale.c

1050

.shift = 11,

drivers/net/ethernet/ti/cpsw_ale.c

1058

.shift = 13,

drivers/net/ethernet/ti/cpsw_ale.c

1066

.shift = 16,

drivers/net/ethernet/ti/cpsw_ale.c

1074

.shift = 24,

drivers/net/ethernet/ti/cpsw_ale.c

1082

.shift = 0,

drivers/net/ethernet/ti/cpsw_ale.c

1090

.shift = 8,

drivers/net/ethernet/ti/cpsw_ale.c

1098

.shift = 16,

drivers/net/ethernet/ti/cpsw_ale.c

1106

.shift = 24,

drivers/net/ethernet/ti/cpsw_ale.c

1114

.shift = 0,

drivers/net/ethernet/ti/cpsw_ale.c

1122

.shift = 15,

drivers/net/ethernet/ti/cpsw_ale.c

1132

int offset, shift;

drivers/net/ethernet/ti/cpsw_ale.c

1150

shift = info->shift + (port * info->port_shift);

drivers/net/ethernet/ti/cpsw_ale.c

1153

tmp = (tmp & ~(mask << shift)) | (value << shift);

drivers/net/ethernet/ti/cpsw_ale.c

1162

int offset, shift;

drivers/net/ethernet/ti/cpsw_ale.c

1176

shift = info->shift + (port * info->port_shift);

drivers/net/ethernet/ti/cpsw_ale.c

1178

tmp = readl_relaxed(ale->params.ale_regs + offset) >> shift;

drivers/net/ethernet/ti/cpsw_ale.c

1603

ale_controls[ALE_PORT_UNKNOWN_MCAST_FLOOD].shift = 0;

drivers/net/ethernet/ti/cpsw_ale.c

1608

ale_controls[ALE_PORT_UNKNOWN_REG_MCAST_FLOOD].shift = 0;

drivers/net/ethernet/ti/cpsw_ale.c

1613

ale_controls[ALE_PORT_UNTAGGED_EGRESS].shift = 0;

drivers/net/ethernet/ti/cpsw_ale.c

905

int shift, port_shift;

drivers/net/ethernet/ti/cpsw_ale.c

914

.shift = 31,

drivers/net/ethernet/ti/cpsw_ale.c

922

.shift = 30,

drivers/net/ethernet/ti/cpsw_ale.c

930

.shift = 29,

drivers/net/ethernet/ti/cpsw_ale.c

938

.shift = 8,

drivers/net/ethernet/ti/cpsw_ale.c

946

.shift = 7,

drivers/net/ethernet/ti/cpsw_ale.c

954

.shift = 6,

drivers/net/ethernet/ti/cpsw_ale.c

962

.shift = 5,

drivers/net/ethernet/ti/cpsw_ale.c

970

.shift = 4,

drivers/net/ethernet/ti/cpsw_ale.c

978

.shift = 3,

drivers/net/ethernet/ti/cpsw_ale.c

986

.shift = 2,

drivers/net/ethernet/ti/cpsw_ale.c

994

.shift = 1,

drivers/net/ethernet/ti/cpsw_priv.c

774

u32 shift, mask, val;

drivers/net/ethernet/ti/cpsw_priv.c

779

shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num;

drivers/net/ethernet/ti/cpsw_priv.c

780

mask = 7 << shift;

drivers/net/ethernet/ti/cpsw_priv.c

790

u32 shift, mask, val;

drivers/net/ethernet/ti/cpsw_priv.c

795

shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num;

drivers/net/ethernet/ti/cpsw_priv.c

796

mask = (1 << --fifo) << shift;

drivers/net/ethernet/ti/cpsw_priv.c

805

u32 val = 0, send_pct, shift;

drivers/net/ethernet/ti/cpsw_priv.c

831

shift = (i - 1) * 8;

drivers/net/ethernet/ti/cpsw_priv.c

833

send_pct &= ~(CPSW_PCT_MASK << shift);

drivers/net/ethernet/ti/cpsw_priv.c

838

send_pct |= val << shift;

drivers/net/ethernet/ti/cpsw_priv.c

844

pct += (send_pct >> shift) & CPSW_PCT_MASK;

drivers/net/ethernet/ti/cpts.c

627

if (cpts->cc.mult || cpts->cc.shift)

drivers/net/ethernet/ti/cpts.c

630

clocks_calc_mult_shift(&cpts->cc.mult, &cpts->cc.shift,

drivers/net/ethernet/ti/cpts.c

638

freq, cpts->cc.mult, cpts->cc.shift, (ns - NSEC_PER_SEC));

drivers/net/ethernet/ti/cpts.c

733

cpts->cc.shift = prop;

drivers/net/ethernet/ti/cpts.c

735

if ((cpts->cc.mult && !cpts->cc.shift) ||

drivers/net/ethernet/ti/cpts.c

736

(!cpts->cc.mult && cpts->cc.shift))

drivers/net/ethernet/ti/davinci_cpdma.c

130

u32 shift, mask;

drivers/net/ethernet/ti/davinci_cpdma.c

324

val &= ~(info->mask << info->shift);

drivers/net/ethernet/ti/davinci_cpdma.c

325

val |= (value & info->mask) << info->shift;

drivers/net/ethernet/ti/davinci_cpdma.c

348

ret = (dma_reg_read(ctlr, info->reg) >> info->shift) & info->mask;

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

101

u32 shift = RGMII_CFG_SPEED_MII0_SHIFT, mask = RGMII_CFG_SPEED_MII0;

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

104

shift = RGMII_CFG_SPEED_MII1_SHIFT;

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

108

return icssg_rgmii_cfg_get_bitfield(miig_rt, mask, shift);

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

114

u32 shift = RGMII_CFG_FULLDUPLEX_MII0_SHIFT;

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

118

shift = RGMII_CFG_FULLDUPLEX_MII1_SHIFT;

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

122

return icssg_rgmii_cfg_get_bitfield(miig_rt, mask, shift);

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

74

u32 val, mask, shift;

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

77

shift = mii == ICSS_MII0 ? ICSSG_CFG_MII0_MODE_SHIFT : ICSSG_CFG_MII1_MODE_SHIFT;

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

83

val <<= shift;

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

88

u32 icssg_rgmii_cfg_get_bitfield(struct regmap *miig_rt, u32 mask, u32 shift)

drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c

94

val >>= shift;

drivers/net/ethernet/ti/icssg/icssg_mii_rt.h

146

u32 icssg_rgmii_cfg_get_bitfield(struct regmap *miig_rt, u32 mask, u32 shift);

drivers/net/ethernet/via/via-velocity.c

3500

u8 shift = 0;

drivers/net/ethernet/via/via-velocity.c

3504

shift = 2;

drivers/net/ethernet/via/via-velocity.c

3508

shift = 4;

drivers/net/ethernet/via/via-velocity.c

3512

shift = 6;

drivers/net/ethernet/via/via-velocity.c

3515

*val = (mult << 6) | ((us >> shift) & 0x3f);

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

358

wx->pps_edge_start += div_u64(((u64)rem << cc->shift), cc->mult);

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

360

cc->shift), cc->mult);

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

406

wx->sec_to_cc = div_u64(((u64)WX_NS_PER_SEC << cc->shift), cc->mult);

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

662

static void wx_ptp_link_speed_adjust(struct wx *wx, u32 *shift, u32 *incval)

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

667

*shift = WX_INCVAL_SHIFT_AML;

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

671

*shift = WX_INCVAL_SHIFT_EM;

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

680

*shift = WX_INCVAL_SHIFT_10;

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

684

*shift = WX_INCVAL_SHIFT_100;

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

688

*shift = WX_INCVAL_SHIFT_1GB;

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

693

*shift = WX_INCVAL_SHIFT_10GB;

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

728

cc.shift = 0;

drivers/net/ethernet/wangxun/libwx/wx_ptp.c

731

wx_ptp_link_speed_adjust(wx, &cc.shift, &incval);

drivers/net/ieee802154/at86rf230.c

171

unsigned int shift, unsigned int *data)

drivers/net/ieee802154/at86rf230.c

177

*data = (*data & mask) >> shift;

drivers/net/ieee802154/at86rf230.c

185

unsigned int shift, unsigned int data)

drivers/net/ieee802154/at86rf230.c

194

ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);

drivers/net/ieee802154/atusb.c

106

unsigned int shift)

drivers/net/ieee802154/atusb.c

115

reg = (reg & mask) >> shift;

drivers/net/ieee802154/atusb.c

78

u8 shift, u8 value)

drivers/net/ieee802154/atusb.c

95

tmp |= (value << shift) & mask;

drivers/net/mdio/mdio-mux-meson-g12a.c

262

mux->shift = __ffs(PLL_CTL0_SEL);

drivers/net/mdio/mdio-mux-meson-g12a.c

263

mux->mask = PLL_CTL0_SEL >> mux->shift;

drivers/net/pcs/pcs-rzn1-miic.c

609

u32 mask, shift;

drivers/net/pcs/pcs-rzn1-miic.c

619

shift = 0;

drivers/net/pcs/pcs-rzn1-miic.c

627

shift = 4;

drivers/net/pcs/pcs-rzn1-miic.c

634

shift = 8;

drivers/net/pcs/pcs-rzn1-miic.c

647

shift = 0;

drivers/net/pcs/pcs-rzn1-miic.c

655

shift = 4;

drivers/net/pcs/pcs-rzn1-miic.c

664

mask = BIT(port + shift);

drivers/net/phy/bcm-phy-lib.c

501

u8 shift;

drivers/net/phy/bcm-phy-lib.c

547

val >>= stat.shift;

drivers/net/phy/micrel.c

644

int rc, temp, shift;

drivers/net/phy/micrel.c

648

shift = 14;

drivers/net/phy/micrel.c

651

shift = 4;

drivers/net/phy/micrel.c

663

temp &= ~(3 << shift);

drivers/net/phy/micrel.c

664

temp |= val << shift;

drivers/net/phy/phy-c45.c

1803

u8 shift;

drivers/net/phy/phy-c45.c

1822

shift = 8 - phydev->oatc14_sqi_capability.sqiplus_bits;

drivers/net/phy/phy-c45.c

1824

return (ret & OATC14_DCQ_SQIPLUS_VALUE) >> shift;

drivers/net/usb/r8152.c

1502

u8 shift = index & 2;

drivers/net/usb/r8152.c

1505

byen <<= shift;

drivers/net/usb/r8152.c

1510

data >>= (shift * 8);

drivers/net/usb/r8152.c

1521

u8 shift = index & 2;

drivers/net/usb/r8152.c

1526

byen <<= shift;

drivers/net/usb/r8152.c

1527

mask <<= (shift * 8);

drivers/net/usb/r8152.c

1528

data <<= (shift * 8);

drivers/net/usb/r8152.c

1541

u8 shift = index & 3;

drivers/net/usb/r8152.c

1548

data >>= (shift * 8);

drivers/net/usb/r8152.c

1559

u8 shift = index & 3;

drivers/net/usb/r8152.c

1564

byen <<= shift;

drivers/net/usb/r8152.c

1565

mask <<= (shift * 8);

drivers/net/usb/r8152.c

1566

data <<= (shift * 8);

drivers/net/usb/r8153_ecm.c

15

u8 shift = index & 2;

drivers/net/usb/r8153_ecm.c

19

if (shift)

drivers/net/usb/r8153_ecm.c

20

byen <<= shift;

drivers/net/usb/r8153_ecm.c

30

ret >>= (shift * 8);

drivers/net/usb/r8153_ecm.c

41

u8 shift = index & 2;

drivers/net/usb/r8153_ecm.c

47

if (shift) {

drivers/net/usb/r8153_ecm.c

48

byen <<= shift;

drivers/net/usb/r8153_ecm.c

49

mask <<= (shift * 8);

drivers/net/usb/r8153_ecm.c

50

data <<= (shift * 8);

drivers/net/wireless/ath/ath10k/hw.c

309

.shift = 19,

drivers/net/wireless/ath/ath10k/hw.h

339

u32 shift;

drivers/net/wireless/ath/ath10k/pci.c

1664

u32 count, shift;

drivers/net/wireless/ath/ath10k/pci.c

1701

shift = current_region->start >> 20;

drivers/net/wireless/ath/ath10k/pci.c

1703

ret = ath10k_pci_set_ram_config(ar, shift);

drivers/net/wireless/ath/ath9k/eeprom.c

28

u32 shift, u32 val)

drivers/net/wireless/ath/ath9k/eeprom.c

30

REG_RMW(ah, reg, ((val << shift) & mask), mask);

drivers/net/wireless/ath/ath9k/eeprom.h

673

u32 shift, u32 val);

drivers/net/wireless/broadcom/b43/phy_n.c

305

(value << rf_ctrl->shift));

drivers/net/wireless/broadcom/b43/tables_nphy.h

27

u8 shift;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

4319

s16 temp, temp1, temp2, qQ, qQ1, qQ2, shift;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

4348

shift = qQ - 4;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

4350

shift = 4 - qQ;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

4352

val = (((index << shift) + (5 * temp) +

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

4353

(1 << (scale_factor + shift - 3))) >> (scale_factor +

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

4354

shift - 2));

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17168

u8 shift = 0, val_shift = 0;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17334

shift = 3;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17338

shift = 2;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17342

shift = 8;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17346

shift = 9;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17350

shift = 12;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17354

shift = 0;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17358

shift = 1;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17362

shift = 2;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17366

shift = 4;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17370

shift = 6;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17374

shift = 8;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17378

shift = 9;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17382

shift = 0x0;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17386

shift = 0x0;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17390

shift = 0x0;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c

17395

mod_phy_reg(pi, addr, mask, (value << shift));

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

103

if (shift > 31)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

104

shift = 31;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

105

else if (shift < -31)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

106

shift = -31;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

107

if (shift >= 0) {

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

108

for (i = 0; i < shift; i++)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

111

result = result >> (-shift);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

123

s16 qm_shl16(s16 op, int shift)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

128

if (shift > 15)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

129

shift = 15;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

130

else if (shift < -15)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

131

shift = -15;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

132

if (shift > 0) {

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

133

for (i = 0; i < shift; i++)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

136

result = result >> (-shift);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

147

s16 qm_shr16(s16 op, int shift)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

149

return qm_shl16(op, -shift);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c

98

s32 qm_shl32(s32 op, int shift)

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h

21

s32 qm_shl32(s32 op, int shift);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h

23

s16 qm_shl16(s16 op, int shift);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h

25

s16 qm_shr16(s16 op, int shift);

drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h

172

static inline void brcmu_maskset32(u32 *var, u32 mask, u8 shift, u32 value)

drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h

174

value = (value << shift) & mask;

drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h

177

static inline u32 brcmu_maskget32(u32 var, u32 mask, u8 shift)

drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h

179

return (var & mask) >> shift;

drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h

181

static inline void brcmu_maskset16(u16 *var, u16 mask, u8 shift, u16 value)

drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h

183

value = (value << shift) & mask;

drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h

186

static inline u16 brcmu_maskget16(u16 var, u16 mask, u8 shift)

drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h

188

return (var & mask) >> shift;

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

1548

u32 shift = (hdr->n_region - i) * FW_V3_REGION_TAILER_SIZE;

drivers/net/wireless/mediatek/mt76/mt7615/mcu.c

1553

buf = (const struct mt7663_fw_buf *)(base_addr - shift);

drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c

703

u8 i, shift;

drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c

708

shift = MT_DFS_NUM_ENGINES;

drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c

711

shift = 2 * MT_DFS_NUM_ENGINES;

drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c

714

shift = 0;

drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c

720

radar_specs = &fcc_radar_specs[shift];

drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c

723

radar_specs = &etsi_radar_specs[shift];

drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c

728

radar_specs = &jp_w53_radar_specs[shift];

drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c

730

radar_specs = &jp_w56_radar_specs[shift];

drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c

165

int shift = unit ? 8 : 0;

drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c

168

mt76_set(dev, 0x10130, BIT(0) << shift);

drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c

172

mt76_set(dev, 0x10130, (BIT(1) | BIT(3) | BIT(4) | BIT(5)) << shift);

drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c

176

mt76_clear(dev, 0x10130, BIT(2) << shift);

drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c

50

int shift = unit ? 8 : 0;

drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c

51

u32 val = (BIT(1) | BIT(3) | BIT(4) | BIT(5)) << shift;

drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c

54

mt76_set(dev, MT_VEND_ADDR(CFG, 0x130), BIT(0) << shift);

drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c

62

mt76_clear(dev, MT_VEND_ADDR(CFG, 0x130), BIT(2) << shift);

drivers/net/wireless/mediatek/mt76/mt7996/main.c

1639

u8 shift = dev->chainshift[band_idx];

drivers/net/wireless/mediatek/mt76/mt7996/main.c

1642

phy->mt76->antenna_mask = (phy->mt76->chainmask >> shift) &

drivers/net/wireless/realtek/rtl8xxxu/core.c

6311

desc_shift = rx_desc->shift;

drivers/net/wireless/realtek/rtl8xxxu/core.c

6422

desc_shift = rx_desc->shift;

drivers/net/wireless/realtek/rtl8xxxu/core.c

804

u32 orig, new, shift;

drivers/net/wireless/realtek/rtl8xxxu/core.c

806

shift = __ffs(mask);

drivers/net/wireless/realtek/rtl8xxxu/core.c

809

new = (orig & ~mask) | ((val << shift) & mask);

drivers/net/wireless/realtek/rtl8xxxu/core.c

817

u32 orig, new, shift;

drivers/net/wireless/realtek/rtl8xxxu/core.c

819

shift = __ffs(mask);

drivers/net/wireless/realtek/rtl8xxxu/core.c

822

new = (orig & ~mask) | ((val << shift) & mask);

drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h

143

u32 shift:2;

drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h

208

u32 shift:2;

drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h

283

u32 shift:2;

drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h

345

u32 shift:2;

drivers/net/wireless/realtek/rtlwifi/rtl8188ee/trx.h

731

u32 shift:2;

drivers/net/wireless/realtek/rtlwifi/rtl8192ce/trx.h

461

u32 shift:2;

drivers/net/wireless/realtek/rtlwifi/rtl8192cu/mac.h

75

u32 shift:2;

drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c

1154

u8 shift = 0, sec, tx_num;

drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c

1175

shift = 0;

drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c

1184

shift = 8;

drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c

1193

shift = 16;

drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c

1202

shift = 24;

drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c

1210

shift) & 0xff;

drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h

667

u32 shift:2;

drivers/net/wireless/realtek/rtlwifi/rtl8723ae/trx.h

463

u32 shift:2;

drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c

881

u8 shift = 0, rate_section, tx_num;

drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c

902

shift = 0;

drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c

912

shift = 8;

drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c

921

shift = 16;

drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c

930

shift = 24;

drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c

937

[rate_section] >> shift) & 0xff;

drivers/net/wireless/realtek/rtlwifi/rtl8723be/trx.h

576

u32 shift:2;

drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c

2481

u8 shift = 0, rate_section, tx_num;

drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c

2509

shift = 0;

drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c

2523

shift = 8;

drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c

2537

shift = 16;

drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c

2551

shift = 24;

drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c

2559

[tx_num][rate_section] >> shift) & 0xff;

drivers/net/wireless/realtek/rtlwifi/rtl8821ae/trx.h

582

u32 shift:2;

drivers/net/wireless/realtek/rtlwifi/wifi.h

2050

bool shift;

drivers/net/wireless/realtek/rtw88/coex.c

940

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw88/coex.c

944

tmp = (tmp & (~mask)) | ((val << shift) & mask);

drivers/net/wireless/realtek/rtw88/hci.h

205

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw88/hci.h

210

ret = (orig & mask) >> shift;

drivers/net/wireless/realtek/rtw88/hci.h

218

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw88/hci.h

223

ret = (orig & mask) >> shift;

drivers/net/wireless/realtek/rtw88/hci.h

231

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw88/hci.h

236

ret = (orig & mask) >> shift;

drivers/net/wireless/realtek/rtw88/hci.h

244

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw88/hci.h

251

set = (orig & ~mask) | ((data << shift) & mask);

drivers/net/wireless/realtek/rtw88/hci.h

258

u32 shift;

drivers/net/wireless/realtek/rtw88/hci.h

262

shift = __ffs(mask);

drivers/net/wireless/realtek/rtw88/hci.h

265

set = (orig & ~mask) | ((data << shift) & mask);

drivers/net/wireless/realtek/rtw88/main.h

647

u8 shift;

drivers/net/wireless/realtek/rtw88/pci.c

1073

pkt_stat.shift;

drivers/net/wireless/realtek/rtw88/phy.c

1023

shift = __ffs(mask);

drivers/net/wireless/realtek/rtw88/phy.c

1025

return (val32 & mask) >> shift;

drivers/net/wireless/realtek/rtw88/phy.c

1037

u32 shift;

drivers/net/wireless/realtek/rtw88/phy.c

1055

shift = __ffs(mask);

drivers/net/wireless/realtek/rtw88/phy.c

1056

data = ((old_data) & (~mask)) | (data << shift);

drivers/net/wireless/realtek/rtw88/phy.c

990

u32 shift;

drivers/net/wireless/realtek/rtw88/rtw8821c.c

688

u8 rate, rate_idx, pwr_index, shift;

drivers/net/wireless/realtek/rtw88/rtw8821c.c

694

shift = rate & 0x3;

drivers/net/wireless/realtek/rtw88/rtw8821c.c

695

*phy_pwr_idx |= ((u32)pwr_index << (shift * 8));

drivers/net/wireless/realtek/rtw88/rtw8821c.c

696

if (shift == 0x3 || rate == DESC_RATEVHT1SS_MCS9) {

drivers/net/wireless/realtek/rtw88/rtw8822b.c

943

u8 rate, rate_idx, pwr_index, shift;

drivers/net/wireless/realtek/rtw88/rtw8822b.c

949

shift = rate & 0x3;

drivers/net/wireless/realtek/rtw88/rtw8822b.c

950

*phy_pwr_idx |= ((u32)pwr_index << (shift * 8));

drivers/net/wireless/realtek/rtw88/rtw8822b.c

951

if (shift == 0x3) {

drivers/net/wireless/realtek/rtw88/rtw88xxa.c

1572

u8 rate, rate_idx, pwr_index, shift;

drivers/net/wireless/realtek/rtw88/rtw88xxa.c

1583

shift = rate & 0x3;

drivers/net/wireless/realtek/rtw88/rtw88xxa.c

1584

*phy_pwr_idx |= ((u32)pwr_index << (shift * 8));

drivers/net/wireless/realtek/rtw88/rtw88xxa.c

1594

if (shift == 0x3 || write_1ss_mcs9) {

drivers/net/wireless/realtek/rtw88/rx.c

282

pkt_stat->shift = le32_get_bits(rx_desc->w0, RTW_RX_DESC_W0_SHIFT);

drivers/net/wireless/realtek/rtw88/rx.c

305

phy_status = rx_desc8 + desc_sz + pkt_stat->shift;

drivers/net/wireless/realtek/rtw88/sdio.c

1000

pkt_stat.shift;

drivers/net/wireless/realtek/rtw88/usb.c

633

pkt_stat.shift;

drivers/net/wireless/realtek/rtw89/core.c

3405

shift_len = desc_info->shift << 1; /* 2-byte unit */

drivers/net/wireless/realtek/rtw89/core.c

3442

desc_info->shift = le32_get_bits(rxd_s->dword0, BE_RXD_SHIFT_MASK);

drivers/net/wireless/realtek/rtw89/core.c

3467

shift_len = desc_info->shift << 1; /* 2-byte unit */

drivers/net/wireless/realtek/rtw89/core.c

3515

desc_info->shift = le32_get_bits(rxd_s->dword0, BE_RXD_SHIFT_MASK);

drivers/net/wireless/realtek/rtw89/core.c

3540

shift_len = desc_info->shift << 1; /* 2-byte unit */

drivers/net/wireless/realtek/rtw89/core.h

1104

u8 shift;

drivers/net/wireless/realtek/rtw89/core.h

6705

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw89/core.h

6710

ret = (orig & mask) >> shift;

drivers/net/wireless/realtek/rtw89/core.h

6718

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw89/core.h

6723

ret = (orig & mask) >> shift;

drivers/net/wireless/realtek/rtw89/core.h

6731

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw89/core.h

6736

ret = (orig & mask) >> shift;

drivers/net/wireless/realtek/rtw89/core.h

6744

u32 shift = __ffs(mask);

drivers/net/wireless/realtek/rtw89/core.h

6751

set = (orig & ~mask) | ((data << shift) & mask);

drivers/net/wireless/realtek/rtw89/core.h

6758

u32 shift;

drivers/net/wireless/realtek/rtw89/core.h

6762

shift = __ffs(mask);

drivers/net/wireless/realtek/rtw89/core.h

6765

set = (orig & ~mask) | ((data << shift) & mask);

drivers/net/wireless/realtek/rtw89/core.h

6772

u32 shift;

drivers/net/wireless/realtek/rtw89/core.h

6776

shift = __ffs(mask);

drivers/net/wireless/realtek/rtw89/core.h

6779

set = (orig & ~mask) | ((data << shift) & mask);

drivers/net/wireless/realtek/rtw89/fw.c

657

fw_suit->data = mfw + le32_to_cpu(mfw_info->shift);

drivers/net/wireless/realtek/rtw89/fw.c

688

size = le32_to_cpu(mfw_info->shift) + le32_to_cpu(mfw_info->size);

drivers/net/wireless/realtek/rtw89/fw.h

4208

__le32 shift;

drivers/net/wireless/realtek/rtw89/pci.c

2021

u32 addr32, val32, shift;

drivers/net/wireless/realtek/rtw89/pci.c

2027

shift = (addr & 0x3) * 8;

drivers/net/wireless/realtek/rtw89/pci.c

2029

return val32 >> shift;

drivers/net/wireless/realtek/rtw89/pci.c

2035

u32 addr32, val32, shift;

drivers/net/wireless/realtek/rtw89/pci.c

2041

shift = (addr & 0x3) * 8;

drivers/net/wireless/realtek/rtw89/pci.c

2043

return val32 >> shift;

drivers/net/wireless/realtek/rtw89/pci.c

2184

u32 shift;

drivers/net/wireless/realtek/rtw89/pci.c

2192

shift = __ffs(mask);

drivers/net/wireless/realtek/rtw89/pci.c

2194

val |= ((data << shift) & mask);

drivers/net/wireless/realtek/rtw89/usb.c

74

u32 addr32, val32, shift;

drivers/net/wireless/realtek/rtw89/usb.c

79

shift = (addr & 0x3) * 8;

drivers/net/wireless/realtek/rtw89/usb.c

99

return val32 >> shift;

drivers/net/wireless/st/cw1200/txrx.c

173

register unsigned rateid, off, shift, retries;

drivers/net/wireless/st/cw1200/txrx.c

177

shift = (rateid & 0x07) << 2; /* eq. (rateid % 8) * 4 */

drivers/net/wireless/st/cw1200/txrx.c

184

policy->tbl[off] |= __cpu_to_le32(retries << shift);

drivers/ntb/hw/intel/ntb_hw_gen1.c

269

u64 shift, mask;

drivers/ntb/hw/intel/ntb_hw_gen1.c

271

shift = ndev->db_vec_shift;

drivers/ntb/hw/intel/ntb_hw_gen1.c

272

mask = BIT_ULL(shift) - 1;

drivers/ntb/hw/intel/ntb_hw_gen1.c

274

return mask << (shift * db_vector);

drivers/parisc/sba_iommu.c

348

unsigned long shift;

drivers/parisc/sba_iommu.c

355

shift = ioc->ibase >> IOVP_SHIFT;

drivers/parisc/sba_iommu.c

357

shift = 0;

drivers/parisc/sba_iommu.c

365

shift,

drivers/parisc/sba_iommu.c

400

shift,

drivers/pci/controller/pci-thunder-ecam.c

20

int shift = (where & 3) * 8;

drivers/pci/controller/pci-thunder-ecam.c

23

v >>= shift;

drivers/pci/controller/pcie-altera.c

634

u32 shift = 8 * (where & 3);

drivers/pci/controller/pcie-altera.c

647

data32 = (value & 0xff) << shift;

drivers/pci/controller/pcie-altera.c

651

data32 = (value & 0xffff) << shift;

drivers/pci/controller/pcie-brcmstb.c

819

u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT;

drivers/pci/controller/pcie-brcmstb.c

836

tmp = (tmp & ~mask) | ((val << shift) & mask);

drivers/pci/controller/pcie-brcmstb.c

845

u32 shift = RGR1_SW_INIT_1_INIT_7278_SHIFT;

drivers/pci/controller/pcie-brcmstb.c

848

tmp = (tmp & ~mask) | ((val << shift) & mask);

drivers/pci/controller/pcie-rcar-host.c

256

unsigned int shift;

drivers/pci/controller/pcie-rcar-host.c

269

shift = BITS_PER_BYTE * (where & 3);

drivers/pci/controller/pcie-rcar-host.c

270

data &= ~(0xff << shift);

drivers/pci/controller/pcie-rcar-host.c

271

data |= ((val & 0xff) << shift);

drivers/pci/controller/pcie-rcar-host.c

273

shift = BITS_PER_BYTE * (where & 2);

drivers/pci/controller/pcie-rcar-host.c

274

data &= ~(0xffff << shift);

drivers/pci/controller/pcie-rcar-host.c

275

data |= ((val & 0xffff) << shift);

drivers/pci/controller/pcie-rcar-host.c

94

unsigned int shift = BITS_PER_BYTE * (where & 3);

drivers/pci/controller/pcie-rcar-host.c

97

return val >> shift;

drivers/pci/controller/pcie-rcar.c

26

unsigned int shift = BITS_PER_BYTE * (where & 3);

drivers/pci/controller/pcie-rcar.c

29

val &= ~(mask << shift);

drivers/pci/controller/pcie-rcar.c

30

val |= data << shift;

drivers/pci/controller/pcie-rzg3s-host.c

387

u32 data, shift;

drivers/pci/controller/pcie-rzg3s-host.c

415

shift = BITS_PER_BYTE * (where & 3);

drivers/pci/controller/pcie-rzg3s-host.c

416

data &= ~(0xff << shift);

drivers/pci/controller/pcie-rzg3s-host.c

417

data |= ((val & 0xff) << shift);

drivers/pci/controller/pcie-rzg3s-host.c

419

shift = BITS_PER_BYTE * (where & 2);

drivers/pci/controller/pcie-rzg3s-host.c

420

data &= ~(0xffff << shift);

drivers/pci/controller/pcie-rzg3s-host.c

421

data |= ((val & 0xffff) << shift);

drivers/pci/controller/plda/pcie-microchip-host.c

260

u32 shift;

drivers/pci/pci-bridge-emul.c

539

int mask, ret, old, new, shift;

drivers/pci/pci-bridge-emul.c

572

shift = (where & 0x3) * 8;

drivers/pci/pci-bridge-emul.c

577

mask = 0xffff << shift;

drivers/pci/pci-bridge-emul.c

579

mask = 0xff << shift;

drivers/pci/pci-bridge-emul.c

588

new |= (value << shift) & (behavior[reg / 4].rw & mask);

drivers/pci/pci-bridge-emul.c

591

new &= ~((value << shift) & (behavior[reg / 4].w1c & mask));

drivers/pci/pci-bridge-emul.c

594

new |= (value << shift) & mask;

drivers/pci/pci-bridge-emul.c

613

new |= (value << shift) & (behavior[reg / 4].w1c & mask);

drivers/pci/pci.c

913

u32 shift = 0;

drivers/pci/pci.c

921

mask |= 1 << shift;

drivers/pci/pci.c

922

shift++;

drivers/pci/pci.c

925

mask |= 1 << shift;

drivers/pci/pci.c

926

flags |= 1 << shift;

drivers/pci/pci.c

927

shift++;

drivers/pci/pci.c

930

shift++;

drivers/pcmcia/sa11xx_base.h

69

#define MECR_SET(mecr, sock, shift, mask, bs) \

drivers/pcmcia/sa11xx_base.h

70

((mecr)=((mecr)&~(((mask)<<(shift))<<\

drivers/pcmcia/sa11xx_base.h

72

(((bs)<<(shift))<<((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))

drivers/pcmcia/sa11xx_base.h

74

#define MECR_GET(mecr, sock, shift, mask) \

drivers/pcmcia/sa11xx_base.h

76

(shift))&(mask))

drivers/pcmcia/ti113x.h

232

int shift = 0;

drivers/pcmcia/ti113x.h

241

shift = 1;

drivers/pcmcia/ti113x.h

246

reg |= shift<<6; /* Favour our socket */

drivers/pcmcia/ti113x.h

247

reg |= 1<<shift; /* Socket zoom video on */

drivers/pcmcia/ti113x.h

252

reg |= (1^shift)<<6; /* Favour other socket */

drivers/pcmcia/ti113x.h

253

reg &= ~(1<<shift); /* Socket zoon video off */

drivers/perf/alibaba_uncore_drw_pmu.c

336

u32 val, subval, reg, shift;

drivers/perf/alibaba_uncore_drw_pmu.c

345

shift = ALI_DRW_PMCOM_CNT_EVENT_OFFSET(counter);

drivers/perf/alibaba_uncore_drw_pmu.c

346

val &= ~(GENMASK(7, 0) << shift);

drivers/perf/alibaba_uncore_drw_pmu.c

347

val |= subval << shift;

drivers/perf/alibaba_uncore_drw_pmu.c

354

u32 val, reg, subval, shift;

drivers/perf/alibaba_uncore_drw_pmu.c

363

shift = ALI_DRW_PMCOM_CNT_EVENT_OFFSET(counter);

drivers/perf/alibaba_uncore_drw_pmu.c

364

val &= ~(GENMASK(7, 0) << shift);

drivers/perf/alibaba_uncore_drw_pmu.c

365

val |= subval << shift;

drivers/perf/apple_m1_cpu_pmu.c

382

int shift;

drivers/perf/apple_m1_cpu_pmu.c

394

shift = (index - 2) * 8;

drivers/perf/apple_m1_cpu_pmu.c

395

clear |= (u64)0xff << shift;

drivers/perf/apple_m1_cpu_pmu.c

396

set |= (u64)event << shift;

drivers/perf/apple_m1_cpu_pmu.c

400

shift = (index - 6) * 8;

drivers/perf/apple_m1_cpu_pmu.c

401

clear |= (u64)0xff << shift;

drivers/perf/apple_m1_cpu_pmu.c

402

set |= (u64)event << shift;

drivers/perf/arm-cmn.c

1908

unsigned int dtm_idx, shift, d = max_t(int, dn->dtc, 0);

drivers/perf/arm-cmn.c

1953

shift = CMN__PMEVCNTn_GLOBAL_NUM_SHIFT(dtm_idx);

drivers/perf/arm-cmn.c

1954

dtm->pmu_config_low &= ~(CMN__PMEVCNT0_GLOBAL_NUM << shift);

drivers/perf/arm-cmn.c

1955

dtm->pmu_config_low |= FIELD_PREP(CMN__PMEVCNT0_GLOBAL_NUM, hw->dtc_idx[d]) << shift;

drivers/perf/arm_pmuv3.c

1631

userpg->time_shift = rd->shift;

drivers/perf/arm_pmuv3.c

1641

ns = mul_u64_u32_shr(rd->epoch_cyc, rd->mult, rd->shift);

drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c

64

u32 reg, reg_idx, shift, val;

drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c

75

shift = CPA_REG_OFFSET * reg_idx;

drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c

79

val &= ~(CPA_EVTYPE_MASK << shift);

drivers/perf/hisilicon/hisi_uncore_cpa_pmu.c

80

val |= type << shift;

drivers/perf/hisilicon/hisi_uncore_hha_pmu.c

185

u32 reg, reg_idx, shift, val;

drivers/perf/hisilicon/hisi_uncore_hha_pmu.c

196

shift = 8 * reg_idx;

drivers/perf/hisilicon/hisi_uncore_hha_pmu.c

200

val &= ~(HHA_EVTYPE_MASK << shift);

drivers/perf/hisilicon/hisi_uncore_hha_pmu.c

201

val |= (type << shift);

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

223

u32 reg, reg_idx, shift, val;

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

235

shift = 8 * reg_idx;

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

238

val &= ~(L3C_DATSRC_MASK << shift);

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

239

val |= ds_cfg << shift;

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

384

u32 reg, reg_idx, shift, val;

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

397

shift = 8 * reg_idx;

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

401

val &= ~(L3C_EVTYPE_NONE << shift);

drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

402

val |= type << shift;

drivers/perf/hisilicon/hisi_uncore_pa_pmu.c

171

u32 reg, reg_idx, shift, val;

drivers/perf/hisilicon/hisi_uncore_pa_pmu.c

182

shift = 8 * reg_idx;

drivers/perf/hisilicon/hisi_uncore_pa_pmu.c

186

val &= ~(PA_EVTYPE_MASK << shift);

drivers/perf/hisilicon/hisi_uncore_pa_pmu.c

187

val |= (type << shift);

drivers/perf/qcom_l2_pmu.c

248

u32 shift;

drivers/perf/qcom_l2_pmu.c

251

shift = L2PMRESR_GROUP_BITS * event_group;

drivers/perf/qcom_l2_pmu.c

252

field = ((u64)(event_cc & L2PMRESR_GROUP_MASK) << shift);

drivers/perf/qcom_l2_pmu.c

257

resr_val &= ~(L2PMRESR_GROUP_MASK << shift);

drivers/perf/riscv_pmu.c

54

userpg->time_shift = rd->shift;

drivers/perf/riscv_pmu.c

64

ns = mul_u64_u32_shr(rd->epoch_cyc, rd->mult, rd->shift);

drivers/phy/broadcom/phy-bcm-cygnus-pcie.c

52

unsigned shift;

drivers/phy/broadcom/phy-bcm-cygnus-pcie.c

59

shift = PCIE0_PHY_IDDQ_SHIFT;

drivers/phy/broadcom/phy-bcm-cygnus-pcie.c

63

shift = PCIE1_PHY_IDDQ_SHIFT;

drivers/phy/broadcom/phy-bcm-cygnus-pcie.c

74

val &= ~BIT(shift);

drivers/phy/broadcom/phy-bcm-cygnus-pcie.c

83

val |= BIT(shift);

drivers/phy/freescale/phy-fsl-lynx-28g.c

415

int shift;

drivers/phy/freescale/phy-fsl-lynx-28g.c

662

pccr->shift = SGMII_CFG(lane);

drivers/phy/freescale/phy-fsl-lynx-28g.c

668

pccr->shift = SXGMII_CFG(lane);

drivers/phy/freescale/phy-fsl-lynx-28g.c

703

*val = (tmp >> pccr.shift) & GENMASK(pccr.width - 1, 0);

drivers/phy/freescale/phy-fsl-lynx-28g.c

721

mask = GENMASK(pccr.width - 1, 0) << pccr.shift;

drivers/phy/freescale/phy-fsl-lynx-28g.c

722

tmp = (old & ~mask) | (val << pccr.shift);

drivers/phy/hisilicon/phy-histb-combphy.c

103

hw_sel << mode->shift);

drivers/phy/hisilicon/phy-histb-combphy.c

234

mode->shift = vals[1];

drivers/phy/hisilicon/phy-histb-combphy.c

40

u32 shift;

drivers/phy/rockchip/phy-rockchip-dphy-rx0.c

106

u8 shift;

drivers/phy/rockchip/phy-rockchip-dphy-rx0.c

110

{ .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }

drivers/phy/rockchip/phy-rockchip-dphy-rx0.c

164

unsigned int val = (value << reg->shift) |

drivers/phy/rockchip/phy-rockchip-dphy-rx0.c

165

(reg->mask << (reg->shift + 16));

drivers/phy/rockchip/phy-rockchip-emmc.c

24

#define HIWORD_UPDATE(val, mask, shift) \

drivers/phy/rockchip/phy-rockchip-emmc.c

25

(FIELD_PREP_WM16((mask) << (shift), (val)))

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

164

HIWORD_UPDATE(value, reg->mask, reg->shift));

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

78

#define HIWORD_UPDATE(val, mask, shift) \

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

79

((val) << (shift) | (mask) << ((shift) + 16))

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

93

u32 shift;

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

98

{ .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, .valid = 1, }

drivers/phy/tegra/xusb-tegra124.c

408

.shift = _shift, \

drivers/phy/tegra/xusb-tegra186.c

247

.shift = _shift, \

drivers/phy/tegra/xusb-tegra210.c

1736

.shift = _shift, \

drivers/phy/tegra/xusb-tegra210.c

2538

.shift = _shift, \

drivers/phy/tegra/xusb.c

335

value &= ~(soc->mask << soc->shift);

drivers/phy/tegra/xusb.c

336

value |= lane->function << soc->shift;

drivers/phy/tegra/xusb.h

35

unsigned int shift;

drivers/pinctrl/actions/pinctrl-owl.c

236

*bit = info->pullctl->shift;

drivers/pinctrl/actions/pinctrl-owl.c

243

*bit = info->st->shift;

drivers/pinctrl/actions/pinctrl-owl.h

175

unsigned int shift;

drivers/pinctrl/actions/pinctrl-owl.h

18

#define MUX_PG(group_name, reg, shift, width) \

drivers/pinctrl/actions/pinctrl-owl.h

187

unsigned int shift;

drivers/pinctrl/actions/pinctrl-owl.h

26

.mfpctl_shift = shift, \

drivers/pinctrl/actions/pinctrl-owl.h

36

#define DRV_PG(group_name, reg, shift, width) \

drivers/pinctrl/actions/pinctrl-owl.h

45

.drv_shift = shift, \

drivers/pinctrl/actions/pinctrl-owl.h

52

#define SR_PG(group_name, reg, shift, width) \

drivers/pinctrl/actions/pinctrl-owl.h

64

.sr_shift = shift, \

drivers/pinctrl/actions/pinctrl-owl.h

79

.shift = pull_sft, \

drivers/pinctrl/actions/pinctrl-owl.h

90

.shift = st_sft, \

drivers/pinctrl/bcm/pinctrl-bcm2835.c

1117

u32 offset, shift, val;

drivers/pinctrl/bcm/pinctrl-bcm2835.c

1120

shift = PUD_2711_REG_SHIFT(pin);

drivers/pinctrl/bcm/pinctrl-bcm2835.c

1125

if (((val >> shift) & PUD_2711_MASK) != BCM2711_PULL_NONE)

drivers/pinctrl/bcm/pinctrl-bcm2835.c

1131

if (((val >> shift) & PUD_2711_MASK) != BCM2711_PULL_UP)

drivers/pinctrl/bcm/pinctrl-bcm2835.c

1138

if (((val >> shift) & PUD_2711_MASK) != BCM2711_PULL_DOWN)

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

127

unsigned int shift;

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

150

.shift = s, \

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

42

unsigned int shift;

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

484

.shift = sh, \

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

780

mux->shift != mux_log[i].mux.shift)

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

814

val &= ~(mask << grp->mux.shift);

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

815

val |= grp->mux.alt << grp->mux.shift;

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

835

grp->mux.offset, grp->mux.shift, grp->mux.alt);

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

856

val |= 0x3 << mux->shift;

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

863

pin, mux->offset, mux->shift);

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

883

val &= ~(0x3 << mux->shift);

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

890

pin, mux->offset, mux->shift);

drivers/pinctrl/bcm/pinctrl-cygnus-mux.c

925

log->mux.shift = j * 4;

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

145

unsigned int shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

150

val |= BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

152

val &= ~BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

160

unsigned int shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

162

return !!(readl(chip->base + offset) & BIT(shift));

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

204

unsigned int shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

205

u32 val = BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

385

unsigned int shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

387

if (readl(chip->base + offset) & BIT(shift))

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

412

unsigned int shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

414

return !!(readl(chip->base + offset) & BIT(shift));

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

503

unsigned int shift;

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

509

shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

515

val_1 &= ~BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

516

val_2 &= ~BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

518

val_1 |= BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

519

val_2 &= ~BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

521

val_1 &= ~BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

522

val_2 |= BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

549

unsigned int shift;

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

555

shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

557

val_1 = readl(base + IPROC_GPIO_PULL_UP_OFFSET) & BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

558

val_2 = readl(base + IPROC_GPIO_PULL_DN_OFFSET) & BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

580

unsigned int i, offset, shift;

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

594

shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

604

val &= ~BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

605

val |= ((strength >> i) & 0x1) << shift;

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

617

unsigned int i, offset, shift;

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

627

shift = IPROC_GPIO_SHIFT(gpio);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

633

val = readl(base + offset) & BIT(shift);

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c

634

val >>= shift;

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

1006

log->mux.shift = 32 - (i * 2);

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

1018

log->mux.shift = i;

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

374

.shift = sh, \

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

53

unsigned int shift;

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

577

if ((mux->shift != mux_log[i].mux.shift) ||

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

622

val &= ~(mask << grp->mux.shift);

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

623

val |= grp->mux.alt << grp->mux.shift;

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

648

grp->mux.offset, grp->mux.shift, grp->mux.alt);

drivers/pinctrl/bcm/pinctrl-ns2-mux.c

994

log->mux.shift = 31;

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

395

u32 offset, shift, i;

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

403

shift = gpio;

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

411

val &= ~BIT(shift);

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

412

val |= ((strength >> (i-1)) & 0x1) << shift;

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

424

unsigned int offset, shift;

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

430

shift = gpio;

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

435

val = readl(chip->io_ctrl + offset) & BIT(shift);

drivers/pinctrl/bcm/pinctrl-nsp-gpio.c

436

val >>= shift;

drivers/pinctrl/bcm/pinctrl-nsp-mux.c

228

.shift = sh, \

drivers/pinctrl/bcm/pinctrl-nsp-mux.c

394

if ((mux->shift != mux_log[i].mux.shift) ||

drivers/pinctrl/bcm/pinctrl-nsp-mux.c

442

val &= ~(mask << grp->mux.shift);

drivers/pinctrl/bcm/pinctrl-nsp-mux.c

443

val |= grp->mux.alt << grp->mux.shift;

drivers/pinctrl/bcm/pinctrl-nsp-mux.c

467

dev_dbg(pctrl_dev->dev, "shift:%u alt:%u\n", grp->mux.shift,

drivers/pinctrl/bcm/pinctrl-nsp-mux.c

48

unsigned int shift;

drivers/pinctrl/bcm/pinctrl-nsp-mux.c

546

log->mux.shift = nsp_pin_groups[i].mux.shift;

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

226

unsigned int shift = offset + CS42L43_GPIO1_DIR_SHIFT;

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

239

BIT(shift), !!input << shift);

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

289

return cs42l43_pin_drv_str_ma[(val & pdat->mask) >> pdat->shift];

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

300

if ((i << pdat->shift) > pdat->mask)

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

307

pdat->mask, i << pdat->shift);

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

42

unsigned int shift;

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

490

unsigned int shift = offset + CS42L43_GPIO1_LVL_SHIFT;

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

50

.shift = CS42L43_##_field##_DRV_SHIFT, \

drivers/pinctrl/cirrus/pinctrl-cs42l43.c

501

BIT(shift), value << shift);

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1084

BIT(pin->shift),

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

1085

value << pin->shift);

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

199

int shift;

drivers/pinctrl/cirrus/pinctrl-lochnagar.c

56

.shift = LOCHNAGAR##REV##_##SHIFT##_SHIFT, .invert = INVERT, \

drivers/pinctrl/freescale/pinctrl-imx.c

213

u8 shift = (val >> 16) & 0xff;

drivers/pinctrl/freescale/pinctrl-imx.c

214

u32 mask = ((1 << width) - 1) << shift;

drivers/pinctrl/freescale/pinctrl-imx.c

221

val |= select << shift;

drivers/pinctrl/freescale/pinctrl-mxs.c

193

static void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, void __iomem *reg)

drivers/pinctrl/freescale/pinctrl-mxs.c

198

tmp &= ~(mask << shift);

drivers/pinctrl/freescale/pinctrl-mxs.c

199

tmp |= value << shift;

drivers/pinctrl/freescale/pinctrl-mxs.c

209

u8 bank, shift;

drivers/pinctrl/freescale/pinctrl-mxs.c

218

shift = pin % 16 * 2;

drivers/pinctrl/freescale/pinctrl-mxs.c

220

mxs_pinctrl_rmwl(g->muxsel[i], 0x3, shift, reg);

drivers/pinctrl/freescale/pinctrl-mxs.c

263

u8 ma, vol, pull, bank, shift;

drivers/pinctrl/freescale/pinctrl-mxs.c

286

shift = pin % 8 * 4;

drivers/pinctrl/freescale/pinctrl-mxs.c

287

mxs_pinctrl_rmwl(ma, 0x3, shift, reg);

drivers/pinctrl/freescale/pinctrl-mxs.c

292

shift = pin % 8 * 4 + 2;

drivers/pinctrl/freescale/pinctrl-mxs.c

294

writel(1 << shift, reg + SET);

drivers/pinctrl/freescale/pinctrl-mxs.c

296

writel(1 << shift, reg + CLR);

drivers/pinctrl/freescale/pinctrl-mxs.c

303

shift = pin;

drivers/pinctrl/freescale/pinctrl-mxs.c

305

writel(1 << shift, reg + SET);

drivers/pinctrl/freescale/pinctrl-mxs.c

307

writel(1 << shift, reg + CLR);

drivers/pinctrl/mediatek/mtk-eint.c

237

unsigned int shift = idx & 0x1f;

drivers/pinctrl/mediatek/mtk-eint.c

241

eint->wake_mask[inst][port] |= BIT(shift);

drivers/pinctrl/mediatek/mtk-eint.c

243

eint->wake_mask[inst][port] &= ~BIT(shift);

drivers/pinctrl/mediatek/mtk-eint.c

359

unsigned int i, j, port, status, shift, mask, eint_num;

drivers/pinctrl/mediatek/mtk-eint.c

369

shift = __ffs(status);

drivers/pinctrl/mediatek/mtk-eint.c

370

status &= ~BIT(shift);

drivers/pinctrl/mediatek/mtk-eint.c

371

mask = BIT(shift);

drivers/pinctrl/mediatek/mtk-eint.c

372

eint_num = eint->pin_list[i][shift + j];

drivers/pinctrl/mediatek/pinctrl-mtk-common.c

213

unsigned int bits, mask, shift;

drivers/pinctrl/mediatek/pinctrl-mtk-common.c

229

shift = pin_drv->bit + drv_grp->low_bit;

drivers/pinctrl/mediatek/pinctrl-mtk-common.c

230

mask <<= shift;

drivers/pinctrl/mediatek/pinctrl-mtk-common.c

231

val <<= shift;

drivers/pinctrl/mediatek/pinctrl-mtmips.c

124

int shift;

drivers/pinctrl/mediatek/pinctrl-mtmips.c

136

shift = p->groups[group].shift;

drivers/pinctrl/mediatek/pinctrl-mtmips.c

137

if (shift >= 32) {

drivers/pinctrl/mediatek/pinctrl-mtmips.c

138

shift -= 32;

drivers/pinctrl/mediatek/pinctrl-mtmips.c

142

mode &= ~(p->groups[group].mask << shift);

drivers/pinctrl/mediatek/pinctrl-mtmips.c

150

mode |= p->groups[group].gpio << shift;

drivers/pinctrl/mediatek/pinctrl-mtmips.c

154

mode |= p->func[func]->value << shift;

drivers/pinctrl/mediatek/pinctrl-mtmips.h

13

{ .name = _name, .mask = _mask, .shift = _shift, \

drivers/pinctrl/mediatek/pinctrl-mtmips.h

18

{ .name = _name, .mask = _mask, .shift = _shift, \

drivers/pinctrl/mediatek/pinctrl-mtmips.h

42

const u32 shift;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

164

unsigned int shift;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

166

shift = ((pin - range->pin_base) << 2) + *offset;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

167

*reg = (shift / 32) * 4;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

168

*offset = shift % 32;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

178

unsigned int shift;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

199

shift = (pin_id - p_mux->sid) << 2;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

200

reg = (shift / 32) * 4;

drivers/pinctrl/meson/pinctrl-amlogic-a4.c

201

offset = shift % 32;

drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c

49

int shift;

drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c

51

shift = pin - bank->first;

drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c

53

*reg = bank->reg + (bank->offset + (shift << 2)) / 32;

drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c

54

*offset = (bank->offset + (shift << 2)) % 32;

drivers/pinctrl/mvebu/pinctrl-dove.c

67

unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;

drivers/pinctrl/mvebu/pinctrl-dove.c

75

*config = (func >> shift) & MVEBU_MPP_MASK;

drivers/pinctrl/mvebu/pinctrl-dove.c

85

unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;

drivers/pinctrl/mvebu/pinctrl-dove.c

96

func &= ~(MVEBU_MPP_MASK << shift);

drivers/pinctrl/mvebu/pinctrl-dove.c

97

func |= (config & MVEBU_MPP_MASK) << shift;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

62

unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

64

*config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

73

unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

76

reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift);

drivers/pinctrl/mvebu/pinctrl-mvebu.c

77

writel(reg | (config << shift), data->base + off);

drivers/pinctrl/mvebu/pinctrl-mvebu.c

796

unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

804

*config = (val >> shift) & MVEBU_MPP_MASK;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

813

unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;

drivers/pinctrl/mvebu/pinctrl-mvebu.c

816

MVEBU_MPP_MASK << shift, config << shift);

drivers/pinctrl/mvebu/pinctrl-orion.c

33

unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;

drivers/pinctrl/mvebu/pinctrl-orion.c

37

*config = (readl(mpp_base + off) >> shift) & MVEBU_MPP_MASK;

drivers/pinctrl/mvebu/pinctrl-orion.c

40

*config = (readl(high_mpp_base) >> shift) & MVEBU_MPP_MASK;

drivers/pinctrl/mvebu/pinctrl-orion.c

49

unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;

drivers/pinctrl/mvebu/pinctrl-orion.c

53

u32 reg = readl(mpp_base + off) & ~(MVEBU_MPP_MASK << shift);

drivers/pinctrl/mvebu/pinctrl-orion.c

54

writel(reg | (config << shift), mpp_base + off);

drivers/pinctrl/mvebu/pinctrl-orion.c

57

u32 reg = readl(high_mpp_base) & ~(MVEBU_MPP_MASK << shift);

drivers/pinctrl/mvebu/pinctrl-orion.c

58

writel(reg | (config << shift), high_mpp_base);

drivers/pinctrl/nuvoton/pinctrl-ma35.c

1018

pin->shift = (elems[i + 1] * MA35_MFP_BITS_PER_PORT) % 32;

drivers/pinctrl/nuvoton/pinctrl-ma35.c

1022

pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift);

drivers/pinctrl/nuvoton/pinctrl-ma35.c

285

regval &= ~GENMASK(setting->shift + MA35_MFP_BITS_PER_PORT - 1,

drivers/pinctrl/nuvoton/pinctrl-ma35.c

286

setting->shift);

drivers/pinctrl/nuvoton/pinctrl-ma35.c

287

regval |= setting->muxval << setting->shift;

drivers/pinctrl/nuvoton/pinctrl-ma35.c

99

u32 shift;

drivers/pinctrl/nuvoton/pinctrl-ma35.h

22

u32 shift;

drivers/pinctrl/nuvoton/pinctrl-ma35.h

29

int (*get_pin_num)(int offset, int shift);

drivers/pinctrl/nuvoton/pinctrl-ma35.h

37

.shift = s, \

drivers/pinctrl/nuvoton/pinctrl-ma35d1.c

1758

static int ma35d1_get_pin_num(int offset, int shift)

drivers/pinctrl/nuvoton/pinctrl-ma35d1.c

1760

return (offset - 0x80) * 2 + shift / 4;

drivers/pinctrl/pinctrl-at91.c

635

unsigned shift = two_bit_pin_value_shift_amount(pin);

drivers/pinctrl/pinctrl-at91.c

637

tmp &= ~(DRIVE_STRENGTH_MASK << shift);

drivers/pinctrl/pinctrl-at91.c

638

tmp |= strength << shift;

drivers/pinctrl/pinctrl-lpc18xx.c

680

u8 shift;

drivers/pinctrl/pinctrl-lpc18xx.c

683

shift = LPC18XX_SCU_I2C0_SCL_SHIFT;

drivers/pinctrl/pinctrl-lpc18xx.c

685

shift = LPC18XX_SCU_I2C0_SDA_SHIFT;

drivers/pinctrl/pinctrl-lpc18xx.c

689

if (reg & (LPC18XX_SCU_I2C0_EZI << shift))

drivers/pinctrl/pinctrl-lpc18xx.c

696

if (reg & (LPC18XX_SCU_I2C0_EHD << shift))

drivers/pinctrl/pinctrl-lpc18xx.c

703

if (reg & (LPC18XX_SCU_I2C0_EFP << shift))

drivers/pinctrl/pinctrl-lpc18xx.c

710

if (reg & (LPC18XX_SCU_I2C0_ZIF << shift))

drivers/pinctrl/pinctrl-lpc18xx.c

937

u8 shift;

drivers/pinctrl/pinctrl-lpc18xx.c

940

shift = LPC18XX_SCU_I2C0_SCL_SHIFT;

drivers/pinctrl/pinctrl-lpc18xx.c

942

shift = LPC18XX_SCU_I2C0_SDA_SHIFT;

drivers/pinctrl/pinctrl-lpc18xx.c

947

*reg |= (LPC18XX_SCU_I2C0_EZI << shift);

drivers/pinctrl/pinctrl-lpc18xx.c

949

*reg &= ~(LPC18XX_SCU_I2C0_EZI << shift);

drivers/pinctrl/pinctrl-lpc18xx.c

954

*reg |= (LPC18XX_SCU_I2C0_EHD << shift);

drivers/pinctrl/pinctrl-lpc18xx.c

956

*reg &= ~(LPC18XX_SCU_I2C0_EHD << shift);

drivers/pinctrl/pinctrl-lpc18xx.c

961

*reg |= (LPC18XX_SCU_I2C0_EFP << shift);

drivers/pinctrl/pinctrl-lpc18xx.c

963

*reg &= ~(LPC18XX_SCU_I2C0_EFP << shift);

drivers/pinctrl/pinctrl-lpc18xx.c

970

*reg &= ~(LPC18XX_SCU_I2C0_ZIF << shift);

drivers/pinctrl/pinctrl-lpc18xx.c

972

*reg |= (LPC18XX_SCU_I2C0_ZIF << shift);

drivers/pinctrl/pinctrl-max77620.c

342

int mask, shift;

drivers/pinctrl/pinctrl-max77620.c

352

shift = MAX77620_FPS_SRC_SHIFT;

drivers/pinctrl/pinctrl-max77620.c

361

shift = MAX77620_FPS_PU_PERIOD_SHIFT;

drivers/pinctrl/pinctrl-max77620.c

370

shift = MAX77620_FPS_PD_PERIOD_SHIFT;

drivers/pinctrl/pinctrl-max77620.c

385

ret = regmap_update_bits(mpci->rmap, addr, mask, param_val << shift);

drivers/pinctrl/pinctrl-single.c

553

unsigned offset = 0, shift = 0, i, data;

drivers/pinctrl/pinctrl-single.c

586

shift = ffs(func->conf[i].mask) - 1;

drivers/pinctrl/pinctrl-single.c

588

data |= (arg << shift) & func->conf[i].mask;

drivers/pinctrl/pinctrl-single.c

879

unsigned value[2], shift;

drivers/pinctrl/pinctrl-single.c

887

shift = ffs(value[1]) - 1;

drivers/pinctrl/pinctrl-single.c

890

add_setting(settings, param, value[0] >> shift);

drivers/pinctrl/pinctrl-th1520.c

579

unsigned int shift = th1520_padcfg_shift(pin);

drivers/pinctrl/pinctrl-th1520.c

582

mask <<= shift;

drivers/pinctrl/pinctrl-th1520.c

583

value <<= shift;

drivers/pinctrl/pinctrl-th1520.c

777

unsigned int shift = th1520_muxcfg_shift(pin);

drivers/pinctrl/pinctrl-th1520.c

790

mask = GENMASK(3, 0) << shift;

drivers/pinctrl/pinctrl-th1520.c

791

value = value << shift;

drivers/pinctrl/pinctrl-zynq.c

764

#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, offset, mask, shift)\

drivers/pinctrl/pinctrl-zynq.c

772

.mux_shift = shift, \

drivers/pinctrl/pxa/pinctrl-pxa2xx.c

147

int shift;

drivers/pinctrl/pxa/pinctrl-pxa2xx.c

156

shift = (pin % 16) << 1;

drivers/pinctrl/pxa/pinctrl-pxa2xx.c

163

val = (val & ~(0x3 << shift)) | ((df->muxval >> 1) << shift);

drivers/pinctrl/renesas/pinctrl-rzv2m.c

137

static void rzv2m_writel_we(void __iomem *addr, u8 shift, u8 value)

drivers/pinctrl/renesas/pinctrl-rzv2m.c

139

writel((BIT(16) | value) << shift, addr);

drivers/pinctrl/renesas/pinctrl-rzv2m.c

441

u8 shift, u32 mask, u32 val)

drivers/pinctrl/renesas/pinctrl-rzv2m.c

448

reg = readl(addr) & ~(mask << shift);

drivers/pinctrl/renesas/pinctrl-rzv2m.c

449

writel(reg | (val << shift), addr);

drivers/pinctrl/samsung/pinctrl-exynos.c

159

unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;

drivers/pinctrl/samsung/pinctrl-exynos.c

203

con &= ~(EXYNOS_EINT_CON_MASK << shift);

drivers/pinctrl/samsung/pinctrl-exynos.c

204

con |= trig_type << shift;

drivers/pinctrl/samsung/pinctrl-exynos.c

230

unsigned int shift, mask, con;

drivers/pinctrl/samsung/pinctrl-exynos.c

242

shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC];

drivers/pinctrl/samsung/pinctrl-exynos.c

256

con &= ~(mask << shift);

drivers/pinctrl/samsung/pinctrl-exynos.c

257

con |= EXYNOS_PIN_CON_FUNC_EINT << shift;

drivers/pinctrl/samsung/pinctrl-exynos.c

272

unsigned int shift, mask, con;

drivers/pinctrl/samsung/pinctrl-exynos.c

275

shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC];

drivers/pinctrl/samsung/pinctrl-exynos.c

288

con &= ~(mask << shift);

drivers/pinctrl/samsung/pinctrl-exynos.c

289

con |= PIN_CON_FUNC_INPUT << shift;

drivers/pinctrl/samsung/pinctrl-exynos.c

381

unsigned int val, shift;

drivers/pinctrl/samsung/pinctrl-exynos.c

386

shift = i * EXYNOS_FLTCON_LEN;

drivers/pinctrl/samsung/pinctrl-exynos.c

387

val &= ~(EXYNOS_FLTCON_DIGITAL << shift);

drivers/pinctrl/samsung/pinctrl-exynos.c

388

val |= con << shift;

drivers/pinctrl/samsung/pinctrl-exynos.c

481

u32 bit, wakeup_reg, shift;

drivers/pinctrl/samsung/pinctrl-exynos.c

485

shift = bit - (wakeup_reg * BITS_PER_U32);

drivers/pinctrl/samsung/pinctrl-exynos.c

488

eint_wake_mask_values[wakeup_reg] |= BIT_U32(shift);

drivers/pinctrl/samsung/pinctrl-exynos.c

490

eint_wake_mask_values[wakeup_reg] &= ~BIT_U32(shift);

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

286

u8 shift;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

292

shift = pin;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

293

if (bank_type->fld_width[PINCFG_TYPE_FUNC] * shift >= 32) {

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

296

shift -= 8;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

299

shift = shift * bank_type->fld_width[PINCFG_TYPE_FUNC];

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

305

val &= ~(mask << shift);

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

306

val |= bank->eint_func << shift;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

358

u8 shift;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

371

shift = EINT_OFFS(bank->eint_offset) + irqd->hwirq;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

372

shift = 4 * (shift / 4); /* 4 EINTs per trigger selector */

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

375

val &= ~(EINT_CON_MASK << shift);

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

376

val |= trigger << shift;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

564

u8 shift;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

577

shift = ddata->eints[irqd->hwirq];

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

578

if (shift >= EINT_MAX_PER_REG) {

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

580

shift -= EINT_MAX_PER_REG;

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

582

shift = EINT_CON_LEN * (shift / 2);

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

585

val &= ~(EINT_CON_MASK << shift);

drivers/pinctrl/samsung/pinctrl-s3c64xx.c

586

val |= trigger << shift;

drivers/pinctrl/samsung/pinctrl-samsung.c

380

u32 mask, shift, data, pin_offset;

drivers/pinctrl/samsung/pinctrl-samsung.c

393

shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];

drivers/pinctrl/samsung/pinctrl-samsung.c

394

if (shift >= 32) {

drivers/pinctrl/samsung/pinctrl-samsung.c

396

shift -= 32;

drivers/pinctrl/samsung/pinctrl-samsung.c

409

data &= ~(mask << shift);

drivers/pinctrl/samsung/pinctrl-samsung.c

410

data |= func->val << shift;

drivers/pinctrl/samsung/pinctrl-samsung.c

445

u32 data, width, pin_offset, mask, shift;

drivers/pinctrl/samsung/pinctrl-samsung.c

469

shift = pin_offset * width;

drivers/pinctrl/samsung/pinctrl-samsung.c

474

data &= ~(mask << shift);

drivers/pinctrl/samsung/pinctrl-samsung.c

475

data |= (cfg_value << shift);

drivers/pinctrl/samsung/pinctrl-samsung.c

478

data >>= shift;

drivers/pinctrl/samsung/pinctrl-samsung.c

635

u32 data, mask, shift;

drivers/pinctrl/samsung/pinctrl-samsung.c

644

shift = offset * type->fld_width[PINCFG_TYPE_FUNC];

drivers/pinctrl/samsung/pinctrl-samsung.c

645

if (shift >= 32) {

drivers/pinctrl/samsung/pinctrl-samsung.c

647

shift -= 32;

drivers/pinctrl/samsung/pinctrl-samsung.c

652

data &= ~(mask << shift);

drivers/pinctrl/samsung/pinctrl-samsung.c

654

data |= PIN_CON_FUNC_OUTPUT << shift;

drivers/pinctrl/sprd/pinctrl-sprd.c

604

unsigned int param, arg, shift, mask, val;

drivers/pinctrl/sprd/pinctrl-sprd.c

610

shift = 0;

drivers/pinctrl/sprd/pinctrl-sprd.c

630

shift = SLEEP_MODE_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

640

shift = SLEEP_INPUT_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

651

shift = SLEEP_OUTPUT_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

656

val = shift = 0;

drivers/pinctrl/sprd/pinctrl-sprd.c

666

shift = DRIVE_STRENGTH_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

672

shift = SLEEP_PULL_DOWN_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

676

shift = PULL_DOWN_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

686

shift = INPUT_SCHMITT_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

692

shift = SLEEP_PULL_UP_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

700

shift = PULL_UP_SHIFT;

drivers/pinctrl/sprd/pinctrl-sprd.c

705

val = shift = 0;

drivers/pinctrl/sprd/pinctrl-sprd.c

708

val = shift = 0;

drivers/pinctrl/sprd/pinctrl-sprd.c

731

reg &= ~(mask << shift);

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

696

int shift = 16 * (pin % 2);

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

698

return readl_relaxed(reg) >> shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

706

int shift = 16 * (pin % 2);

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

707

u32 mask = (u32)_mask << shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c

708

u32 value = (u32)_value << shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c

157

u8 shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c

231

u8 shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c

301

func = func << fs->shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c

302

mask = 0x3U << fs->shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c

323

grp = gs->group << gs->shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110-sys.c

324

mask = 0x3U << gs->shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

106

unsigned int shift = 8 * (pin % 4);

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

111

dout = (dout >> shift) & info->dout_mask;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

112

doen = (doen >> shift) & info->doen_mask;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

113

gpi = ((gpi >> shift) - 2) & info->gpi_mask;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

257

unsigned int shift = 8 * (pin % 4);

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

258

u32 dout_mask = info->dout_mask << shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

259

u32 done_mask = info->doen_mask << shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

268

dout <<= shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

269

doen <<= shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

553

unsigned int shift = 8 * (gpio % 4);

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

556

doen = (doen >> shift) & info->doen_mask;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

617

unsigned int shift = 8 * (gpio % 4);

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

619

u32 dout = (value ? GPOUT_HIGH : GPOUT_LOW) << shift;

drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c

620

u32 mask = info->dout_mask << shift;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1001

u32 reg, shift, mask, val;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1003

sunxi_data_reg(pctl, offset, &reg, &shift, &mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1008

val = (readl(pctl->membase + reg) & mask) >> shift;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

101

u32 pin, u32 *reg, u32 *shift, u32 *mask)

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1020

u32 reg, shift, mask, val;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1023

sunxi_data_reg(pctl, offset, &reg, &shift, &mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

107

*shift = offset % BITS_PER_TYPE(u32);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

108

*mask = (BIT(pctl->dlevel_field_width) - 1) << *shift;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1096

u32 reg, shift, mask;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1106

sunxi_mux_reg(pctl, offset, &reg, &shift, &mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

1107

muxval = (readl(pctl->membase + reg) & mask) >> shift;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

112

u32 pin, u32 *reg, u32 *shift, u32 *mask)

drivers/pinctrl/sunxi/pinctrl-sunxi.c

118

*shift = offset % BITS_PER_TYPE(u32);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

119

*mask = (BIT(PULL_FIELD_WIDTH) - 1) << *shift;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

563

u32 *reg, u32 *shift, u32 *mask)

drivers/pinctrl/sunxi/pinctrl-sunxi.c

567

sunxi_dlevel_reg(pctl, pin, reg, shift, mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

573

sunxi_pull_reg(pctl, pin, reg, shift, mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

588

u32 reg, shift, mask, val;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

594

ret = sunxi_pconf_reg(pctl, pin, param, &reg, &shift, &mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

598

val = (readl(pctl->membase + reg) & mask) >> shift;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

654

u32 arg, reg, shift, mask, val;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

662

ret = sunxi_pconf_reg(pctl, pin, param, &reg, &shift, &mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

699

writel((readl(pctl->membase + reg) & ~mask) | val << shift,

drivers/pinctrl/sunxi/pinctrl-sunxi.c

79

u32 pin, u32 *reg, u32 *shift, u32 *mask)

drivers/pinctrl/sunxi/pinctrl-sunxi.c

829

u32 reg, shift, mask;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

833

sunxi_mux_reg(pctl, pin, &reg, &shift, &mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

837

writel((readl(pctl->membase + reg) & ~mask) | config << shift,

drivers/pinctrl/sunxi/pinctrl-sunxi.c

85

*shift = offset % BITS_PER_TYPE(u32);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

86

*mask = (BIT(MUX_FIELD_WIDTH) - 1) << *shift;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

90

u32 pin, u32 *reg, u32 *shift, u32 *mask)

drivers/pinctrl/sunxi/pinctrl-sunxi.c

96

*shift = offset % BITS_PER_TYPE(u32);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

968

u32 reg, shift, mask;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

97

*mask = (BIT(DATA_FIELD_WIDTH) - 1) << *shift;

drivers/pinctrl/sunxi/pinctrl-sunxi.c

971

sunxi_mux_reg(pctl, offset, &reg, &shift, &mask);

drivers/pinctrl/sunxi/pinctrl-sunxi.c

973

muxval = (readl(pctl->membase + reg) & mask) >> shift;

drivers/pinctrl/tegra/pinctrl-tegra-xusb.c

313

value &= ~(lane->mask << lane->shift);

drivers/pinctrl/tegra/pinctrl-tegra-xusb.c

314

value |= i << lane->shift;

drivers/pinctrl/tegra/pinctrl-tegra-xusb.c

72

unsigned int shift;

drivers/pinctrl/tegra/pinctrl-tegra-xusb.c

827

.shift = _shift, \

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

151

unsigned int *shift,

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

200

*shift = drvctrl % 32;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

214

unsigned int pupdctrl, reg, shift, val;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

246

shift = pupdctrl % 32;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

252

val = (val >> shift) & 1;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

261

unsigned int reg, shift, mask, val;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

265

ret = uniphier_conf_get_drvctrl_data(pctldev, pin, &reg, &shift,

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

278

*strength = strengths[(val >> shift) & mask];

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

351

unsigned int pupdctrl, reg, shift;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

413

shift = pupdctrl % 32;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

415

return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift);

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

423

unsigned int reg, shift, mask, val;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

427

ret = uniphier_conf_get_drvctrl_data(pctldev, pin, &reg, &shift,

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

453

mask << shift, val << shift);

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

584

unsigned int mux_bits, reg_stride, reg, reg_end, shift, mask;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

618

shift = pin * mux_bits % 32;

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

627

mask << shift, muxval << shift);

drivers/platform/mellanox/mlx-platform.c

8080

int i, shift = 0;

drivers/platform/mellanox/mlx-platform.c

8105

shift = *nr - mlxplat_mux_data[i].parent;

drivers/platform/mellanox/mlx-platform.c

8107

mlxplat_mux_data[i].base_nr += shift;

drivers/platform/mellanox/mlx-platform.c

8110

if (shift > 0)

drivers/platform/mellanox/mlx-platform.c

8111

mlxplat_hotplug->shift_nr = shift;

drivers/platform/x86/asus-wmi.c

3624

int ret, i, shift = 0;

drivers/platform/x86/asus-wmi.c

3630

arg1 += (temps[i]) << shift;

drivers/platform/x86/asus-wmi.c

3631

arg2 += (temps[i + 4]) << shift;

drivers/platform/x86/asus-wmi.c

3633

arg3 += (100 * percents[i] / 255) << shift;

drivers/platform/x86/asus-wmi.c

3634

arg4 += (100 * percents[i + 4] / 255) << shift;

drivers/platform/x86/asus-wmi.c

3635

shift += 8;

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

725

int offset, shift, cpu;

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

763

shift = punit_cpu_no % SST_CLOS_ASSOC_CPUS_PER_REG;

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

764

shift *= SST_CLOS_ASSOC_BITS_PER_CPU;

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

769

mask = GENMASK_ULL((shift + SST_CLOS_ASSOC_BITS_PER_CPU - 1), shift);

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

771

val |= (clos << shift);

drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c

775

val >>= shift;

drivers/power/supply/bq2415x_charger.c

219

u8 mask, u8 shift)

drivers/power/supply/bq2415x_charger.c

223

if (shift > 8)

drivers/power/supply/bq2415x_charger.c

229

return (ret & mask) >> shift;

drivers/power/supply/bq2415x_charger.c

273

u8 mask, u8 shift)

drivers/power/supply/bq2415x_charger.c

277

if (shift > 8)

drivers/power/supply/bq2415x_charger.c

285

ret |= val << shift;

drivers/power/supply/bq24190_charger.c

307

u8 mask, u8 shift, u8 *data)

drivers/power/supply/bq24190_charger.c

317

v >>= shift;

drivers/power/supply/bq24190_charger.c

324

u8 mask, u8 shift, u8 data)

drivers/power/supply/bq24190_charger.c

334

v |= ((data << shift) & mask);

drivers/power/supply/bq24190_charger.c

340

u8 reg, u8 mask, u8 shift,

drivers/power/supply/bq24190_charger.c

347

ret = bq24190_read_mask(bdi, reg, mask, shift, &v);

drivers/power/supply/bq24190_charger.c

358

u8 reg, u8 mask, u8 shift,

drivers/power/supply/bq24190_charger.c

366

return bq24190_write_mask(bdi, reg, mask, shift, idx);

drivers/power/supply/bq24190_charger.c

383

.shift = BQ24190_REG_##r##_##f##_SHIFT, \

drivers/power/supply/bq24190_charger.c

402

u8 shift;

drivers/power/supply/bq24190_charger.c

501

ret = bq24190_read_mask(bdi, info->reg, info->mask, info->shift, &v);

drivers/power/supply/bq24190_charger.c

533

ret = bq24190_write_mask(bdi, info->reg, info->mask, info->shift, v);

drivers/power/supply/mp2629_charger.c

94

int shift;

drivers/power/supply/rt9756.c

255

unsigned int shift = 0, adc_cntl;

drivers/power/supply/rt9756.c

281

shift = 8;

drivers/power/supply/rt9756.c

288

*val = ((be16_to_cpu(raws) >> shift) + offset) * scale;

drivers/powercap/intel_rapl_common.c

2067

val = (rpi->mask >> rpi->shift) + 1;

drivers/powercap/intel_rapl_common.c

238

int shift;

drivers/powercap/intel_rapl_common.c

247

.shift = s, \

drivers/powercap/intel_rapl_common.c

862

value = ra.value >> rpi->shift;

drivers/powercap/intel_rapl_common.c

887

bits <<= rpi->shift;

drivers/ptp/ptp_fc3.c

165

static int idtfc3_lpf_bw(struct idtfc3 *idtfc3, u8 shift, u8 mult)

drivers/ptp/ptp_fc3.c

167

u8 val = FIELD_PREP(LPF_BW_SHIFT, shift) | FIELD_PREP(LPF_BW_MULT, mult);

drivers/ptp/ptp_mock.c

144

.shift = MOCK_PHC_CC_SHIFT,

drivers/ptp/ptp_ocp.c

2458

u32 shift;

drivers/ptp/ptp_ocp.c

2467

shift = sma_nr & 1 ? 0 : 16;

drivers/ptp/ptp_ocp.c

2469

return (ioread32(gpio) >> shift) & 0xffff;

drivers/ptp/ptp_ocp.c

2475

u32 reg, mask, shift;

drivers/ptp/ptp_ocp.c

2480

shift = sma_nr & 1 ? 0 : 16;

drivers/ptp/ptp_ocp.c

2482

mask = 0xffff << (16 - shift);

drivers/ptp/ptp_ocp.c

2487

reg = (reg & mask) | (val << shift);

drivers/ptp/ptp_ocp.c

2501

u32 reg, mask, shift;

drivers/ptp/ptp_ocp.c

2506

shift = sma_nr & 1 ? 0 : 16;

drivers/ptp/ptp_ocp.c

2508

mask = 0xffff << (16 - shift);

drivers/ptp/ptp_ocp.c

2513

reg = (reg & mask) | (val << shift);

drivers/ptp/ptp_ocp.c

2589

u32 reg, mask, shift;

drivers/ptp/ptp_ocp.c

2594

shift = sma_nr & 1 ? 0 : 16;

drivers/ptp/ptp_ocp.c

2596

mask = 0xffff << (16 - shift);

drivers/ptp/ptp_ocp.c

2601

reg = (reg & mask) | (val << shift);

drivers/ptp/ptp_ocp.c

2613

u32 reg, mask, shift;

drivers/ptp/ptp_ocp.c

2618

shift = sma_nr & 1 ? 0 : 16;

drivers/ptp/ptp_ocp.c

2620

mask = 0xffff << (16 - shift);

drivers/ptp/ptp_ocp.c

2625

reg = (reg & mask) | (val << shift);

drivers/ptp/ptp_vclock.c

187

.shift = PTP_VCLOCK_CC_SHIFT,

drivers/ptp/ptp_vmclock.c

73

uint64_t period, uint8_t shift,

drivers/ptp/ptp_vmclock.c

78

res >>= shift;

drivers/pwm/pwm-airoha.c

111

u32 *addr, u32 *shift)

drivers/pwm/pwm-airoha.c

122

*shift = AIROHA_PWM_REG_GPIO_FLASH_MAP_SHIFT(hwpwm_bit);

drivers/pwm/pwm-airoha.c

129

*shift = AIROHA_PWM_REG_GPIO_FLASH_MAP_SHIFT(hwpwm_bit);

drivers/pwm/pwm-airoha.c

167

u32 shift, val;

drivers/pwm/pwm-airoha.c

171

shift = bucket % AIROHA_PWM_BUCKET_PER_CYCLE_CFG;

drivers/pwm/pwm-airoha.c

172

shift = AIROHA_PWM_REG_CYCLE_CFG_SHIFT(shift);

drivers/pwm/pwm-airoha.c

178

period_tick = FIELD_GET(AIROHA_PWM_WAVE_GEN_CYCLE, val >> shift);

drivers/pwm/pwm-airoha.c

182

shift = bucket % AIROHA_PWM_BUCKET_PER_FLASH_PROD;

drivers/pwm/pwm-airoha.c

183

shift = AIROHA_PWM_REG_GPIO_FLASH_PRD_SHIFT(shift);

drivers/pwm/pwm-airoha.c

190

duty_tick = FIELD_GET(AIROHA_PWM_GPIO_FLASH_PRD_HIGH, val >> shift);

drivers/pwm/pwm-airoha.c

284

u32 mask, shift, val;

drivers/pwm/pwm-airoha.c

289

shift = bucket % AIROHA_PWM_BUCKET_PER_CYCLE_CFG;

drivers/pwm/pwm-airoha.c

290

shift = AIROHA_PWM_REG_CYCLE_CFG_SHIFT(shift);

drivers/pwm/pwm-airoha.c

293

mask = AIROHA_PWM_WAVE_GEN_CYCLE << shift;

drivers/pwm/pwm-airoha.c

294

val = FIELD_PREP(AIROHA_PWM_WAVE_GEN_CYCLE, period_ticks) << shift;

drivers/pwm/pwm-airoha.c

301

shift = bucket % AIROHA_PWM_BUCKET_PER_FLASH_PROD;

drivers/pwm/pwm-airoha.c

302

shift = AIROHA_PWM_REG_GPIO_FLASH_PRD_SHIFT(shift);

drivers/pwm/pwm-airoha.c

305

mask = AIROHA_PWM_GPIO_FLASH_PRD_HIGH << shift;

drivers/pwm/pwm-airoha.c

306

val = FIELD_PREP(AIROHA_PWM_GPIO_FLASH_PRD_HIGH, duty_ticks) << shift;

drivers/pwm/pwm-airoha.c

312

mask = AIROHA_PWM_GPIO_FLASH_PRD_LOW << shift;

drivers/pwm/pwm-airoha.c

314

AIROHA_PWM_DUTY_FULL - duty_ticks) << shift;

drivers/pwm/pwm-airoha.c

425

u32 shift;

drivers/pwm/pwm-airoha.c

428

airoha_pwm_get_flash_map_addr_and_shift(hwpwm, &addr, &shift);

drivers/pwm/pwm-airoha.c

437

AIROHA_PWM_GPIO_FLASH_EN << shift);

drivers/pwm/pwm-airoha.c

441

AIROHA_PWM_GPIO_FLASH_SET_ID << shift,

drivers/pwm/pwm-airoha.c

442

FIELD_PREP(AIROHA_PWM_GPIO_FLASH_SET_ID, index) << shift);

drivers/pwm/pwm-airoha.c

446

return regmap_set_bits(pc->regmap, addr, AIROHA_PWM_GPIO_FLASH_EN << shift);

drivers/pwm/pwm-airoha.c

551

u32 addr, shift, val;

drivers/pwm/pwm-airoha.c

554

airoha_pwm_get_flash_map_addr_and_shift(hwpwm, &addr, &shift);

drivers/pwm/pwm-airoha.c

560

state->enabled = FIELD_GET(AIROHA_PWM_GPIO_FLASH_EN, val >> shift);

drivers/pwm/pwm-airoha.c

566

bucket = FIELD_GET(AIROHA_PWM_GPIO_FLASH_SET_ID, val >> shift);

drivers/pwm/pwm-atmel.c

187

int shift;

drivers/pwm/pwm-atmel.c

198

shift = fls(cycles) - atmel_pwm->data->cfg.period_bits;

drivers/pwm/pwm-atmel.c

200

if (shift > PWM_MAX_PRES) {

drivers/pwm/pwm-atmel.c

203

} else if (shift > 0) {

drivers/pwm/pwm-atmel.c

204

*pres = shift;

drivers/pwm/pwm-brcmstb.c

178

unsigned int shift = channel * CTRL_CHAN_OFFS;

drivers/pwm/pwm-brcmstb.c

184

value &= ~(CTRL_OEB << shift);

drivers/pwm/pwm-brcmstb.c

185

value |= (CTRL_START | CTRL_OPENDRAIN) << shift;

drivers/pwm/pwm-brcmstb.c

187

value &= ~((CTRL_START | CTRL_OPENDRAIN) << shift);

drivers/pwm/pwm-brcmstb.c

188

value |= CTRL_OEB << shift;

drivers/pwm/pwm-clps711x.c

43

u32 shift = (pwm->hwpwm + 1) * 4;

drivers/pwm/pwm-clps711x.c

58

pmpcon &= ~(0xf << shift);

drivers/pwm/pwm-clps711x.c

59

pmpcon |= val << shift;

drivers/pwm/pwm-lp3943.c

143

val << mux[index].shift);

drivers/pwm/pwm-meson.c

399

channel->mux.shift =

drivers/pwm/pwm-meson.c

423

channel->div.shift = meson_pwm_per_channel_data[i].clk_div_shift;

drivers/pwm/pwm-microchip-core.c

72

u8 channel_enable, reg_offset, shift;

drivers/pwm/pwm-microchip-core.c

80

shift = pwm->hwpwm & 7;

drivers/pwm/pwm-microchip-core.c

83

channel_enable &= ~(1 << shift);

drivers/pwm/pwm-microchip-core.c

84

channel_enable |= (enable << shift);

drivers/pwm/pwm-samsung.c

137

u8 shift = TCFG1_SHIFT(channel);

drivers/pwm/pwm-samsung.c

147

reg &= ~(TCFG1_MUX_MASK << shift);

drivers/pwm/pwm-samsung.c

148

reg |= bits << shift;

drivers/pwm/pwm-stm32.c

311

unsigned int shift;

drivers/pwm/pwm-stm32.c

365

shift = (ch & 0x1) * CCMR_CHANNEL_SHIFT;

drivers/pwm/pwm-stm32.c

366

ccmr = (TIM_CCMR_PE | TIM_CCMR_M1) << shift;

drivers/pwm/pwm-stm32.c

367

mask = CCMR_CHANNEL_MASK << shift;

drivers/pwm/pwm-stm32.c

703

u32 shift = TIM_BDTR_BKF_SHIFT(bi->index);

drivers/pwm/pwm-stm32.c

710

bdtr = (bi->filter & TIM_BDTR_BKF_MASK) << shift | bke;

drivers/ras/amd/atl/map.c

112

u8 shift = DF_DRAM_BASE_LIMIT_LSB;

drivers/ras/amd/atl/map.c

133

shift = MI300_DRAM_LIMIT_LSB;

drivers/ras/amd/atl/map.c

135

return hi_addr_offset << shift;

drivers/ras/amd/atl/map.c

185

u8 i, j, shift = 4, mask = 0xF;

drivers/ras/amd/atl/map.c

199

ctx->map.remap_array[i] = (reg >> (j * shift)) & mask;

drivers/ras/amd/atl/map.c

242

u8 remap_sel, i, j, shift = 4, mask = 0xF;

drivers/ras/amd/atl/map.c

282

ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask;

drivers/ras/amd/atl/map.c

291

ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask;

drivers/ras/amd/atl/map.c

298

u8 remap_sel, i, j, shift = 5, mask = 0x1F;

drivers/ras/amd/atl/map.c

338

ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask;

drivers/ras/amd/atl/map.c

347

ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask;

drivers/ras/amd/atl/map.c

356

ctx->map.remap_array[i] = (remap_reg >> (j * shift)) & mask;

drivers/regulator/88pm8607.c

270

#define PM8607_LDO(_id, vreg, shift, ereg, ebit) \

drivers/regulator/88pm8607.c

283

.vsel_mask = (ARRAY_SIZE(LDO##_id##_table) - 1) << (shift), \

drivers/regulator/da903x-regulator.c

309

#define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \

drivers/regulator/da903x-regulator.c

323

.vol_shift = (shift), \

drivers/regulator/da903x-regulator.c

351

#define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \

drivers/regulator/da903x-regulator.c

352

DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit)

drivers/regulator/da903x-regulator.c

354

#define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \

drivers/regulator/da903x-regulator.c

355

DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit)

drivers/regulator/da9055-regulator.c

115

val = DA9055_BUCK_MODE_SYNC << info->mode.shift;

drivers/regulator/da9055-regulator.c

118

val = DA9055_BUCK_MODE_AUTO << info->mode.shift;

drivers/regulator/da9055-regulator.c

121

val = DA9055_BUCK_MODE_SLEEP << info->mode.shift;

drivers/regulator/da9055-regulator.c

395

.shift = (sbits),\

drivers/regulator/da9055-regulator.c

64

int shift;

drivers/regulator/da9055-regulator.c

91

switch ((ret & info->mode.mask) >> info->mode.shift) {

drivers/regulator/lochnagar-regulator.c

116

int shift = (desc->id - LOCHNAGAR_MIC1VDD) *

drivers/regulator/lochnagar-regulator.c

118

int mask = LOCHNAGAR2_P1_MICBIAS_SRC_MASK << shift;

drivers/regulator/lochnagar-regulator.c

127

mask, val << shift);

drivers/regulator/lp3972.c

270

int shift, ret;

drivers/regulator/lp3972.c

272

shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);

drivers/regulator/lp3972.c

274

LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);

drivers/regulator/lp3972.c

289

shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);

drivers/regulator/lp3972.c

291

LP3972_VOL_CHANGE_FLAG_MASK << shift,

drivers/regulator/lp3972.c

292

LP3972_VOL_CHANGE_FLAG_GO << shift);

drivers/regulator/lp3972.c

297

LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);

drivers/regulator/lp872x.c

184

u8 val, mask, shift;

drivers/regulator/lp872x.c

192

shift = LP8720_TIMESTEP_S;

drivers/regulator/lp872x.c

198

shift = LP8725_TIMESTEP_S;

drivers/regulator/lp872x.c

210

val = (val & mask) >> shift;

drivers/regulator/lp872x.c

355

u8 addr, mask, shift, val;

drivers/regulator/lp872x.c

361

shift = LP8720_BUCK_FPWM_S;

drivers/regulator/lp872x.c

366

shift = LP8725_BUCK1_FPWM_S;

drivers/regulator/lp872x.c

371

shift = LP8725_BUCK2_FPWM_S;

drivers/regulator/lp872x.c

378

val = LP872X_FORCE_PWM << shift;

drivers/regulator/lp872x.c

380

val = LP872X_AUTO_PWM << shift;

drivers/regulator/max77620-regulator.c

212

u8 shift = rinfo->power_mode_shift;

drivers/regulator/max77620-regulator.c

225

ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift);

drivers/regulator/max77620-regulator.c

242

u8 shift = rinfo->power_mode_shift;

drivers/regulator/max77620-regulator.c

261

return (val & mask) >> shift;

drivers/regulator/max77686-regulator.c

115

unsigned int val, shift;

drivers/regulator/max77686-regulator.c

119

shift = max77686_get_opmode_shift(id);

drivers/regulator/max77686-regulator.c

123

rdev->desc->enable_mask, val << shift);

drivers/regulator/max77686-regulator.c

203

unsigned int shift;

drivers/regulator/max77686-regulator.c

206

shift = max77686_get_opmode_shift(id);

drivers/regulator/max77686-regulator.c

213

max77686->opmode[id] << shift);

drivers/regulator/max77802-regulator.c

104

rdev->desc->enable_mask, val << shift);

drivers/regulator/max77802-regulator.c

117

int shift = max77802_get_opmode_shift(id);

drivers/regulator/max77802-regulator.c

137

rdev->desc->enable_mask, val << shift);

drivers/regulator/max77802-regulator.c

172

int shift = max77802_get_opmode_shift(id);

drivers/regulator/max77802-regulator.c

216

rdev->desc->enable_mask, val << shift);

drivers/regulator/max77802-regulator.c

223

int shift = max77802_get_opmode_shift(id);

drivers/regulator/max77802-regulator.c

232

max77802->opmode[id] << shift);

drivers/regulator/max77802-regulator.c

511

int shift = max77802_get_opmode_shift(id);

drivers/regulator/max77802-regulator.c

520

val = val >> shift & MAX77802_OPMODE_MASK;

drivers/regulator/max77802-regulator.c

98

int shift = max77802_get_opmode_shift(id);

drivers/regulator/max8660.c

224

u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4;

drivers/regulator/max8660.c

225

u8 selector = (max8660->shadow_regs[MAX8660_L12VCR] >> shift) & 0xf;

drivers/regulator/max8997-regulator.c

291

int reg, shift = 0, mask = 0x3f;

drivers/regulator/max8997-regulator.c

323

shift = (rid == MAX8997_ESAFEOUT2) ? 2 : 0;

drivers/regulator/max8997-regulator.c

328

shift = 0;

drivers/regulator/max8997-regulator.c

333

shift = 0;

drivers/regulator/max8997-regulator.c

338

shift = 0;

drivers/regulator/max8997-regulator.c

346

*_shift = shift;

drivers/regulator/max8997-regulator.c

356

int reg, shift, mask, ret;

drivers/regulator/max8997-regulator.c

359

ret = max8997_get_voltage_register(rdev, &reg, &shift, &mask);

drivers/regulator/max8997-regulator.c

367

val >>= shift;

drivers/regulator/max8997-regulator.c

403

int reg, shift = 0, mask, ret = 0;

drivers/regulator/max8997-regulator.c

409

ret = max8997_get_voltage_register(rdev, &reg, &shift, &mask);

drivers/regulator/max8997-regulator.c

439

ret = max8997_update_reg(i2c, reg, val << shift, mask);

drivers/regulator/max8997-regulator.c

455

int i, reg, shift, mask, ret;

drivers/regulator/max8997-regulator.c

480

ret = max8997_get_voltage_register(rdev, &reg, &shift, &mask);

drivers/regulator/max8997-regulator.c

484

ret = max8997_update_reg(i2c, reg, i << shift, mask << shift);

drivers/regulator/max8997-regulator.c

696

int reg, shift = 0, mask, ret;

drivers/regulator/max8997-regulator.c

701

ret = max8997_get_voltage_register(rdev, &reg, &shift, &mask);

drivers/regulator/max8997-regulator.c

705

return max8997_update_reg(i2c, reg, selector << shift, mask << shift);

drivers/regulator/max8998.c

111

int reg, shift = 8, ret;

drivers/regulator/max8998.c

113

ret = max8998_get_enable_register(rdev, &reg, &shift);

drivers/regulator/max8998.c

117

return max8998_update_reg(i2c, reg, 1<<shift, 1<<shift);

drivers/regulator/max8998.c

124

int reg, shift = 8, ret;

drivers/regulator/max8998.c

126

ret = max8998_get_enable_register(rdev, &reg, &shift);

drivers/regulator/max8998.c

130

return max8998_update_reg(i2c, reg, 0, 1<<shift);

drivers/regulator/max8998.c

138

int reg, shift = 0, mask = 0xff;

drivers/regulator/max8998.c

145

shift = 4;

drivers/regulator/max8998.c

147

shift = 0;

drivers/regulator/max8998.c

156

shift = 4;

drivers/regulator/max8998.c

158

shift = 0;

drivers/regulator/max8998.c

163

shift = 5;

drivers/regulator/max8998.c

166

shift = 0;

drivers/regulator/max8998.c

190

*_shift = shift;

drivers/regulator/max8998.c

200

int reg, shift = 0, mask, ret;

drivers/regulator/max8998.c

203

ret = max8998_get_voltage_register(rdev, &reg, &shift, &mask);

drivers/regulator/max8998.c

211

val >>= shift;

drivers/regulator/max8998.c

222

int reg, shift = 0, mask, ret;

drivers/regulator/max8998.c

224

ret = max8998_get_voltage_register(rdev, &reg, &shift, &mask);

drivers/regulator/max8998.c

228

ret = max8998_update_reg(i2c, reg, selector<<shift, mask<<shift);

drivers/regulator/max8998.c

251

int reg, shift = 0, mask, ret, j;

drivers/regulator/max8998.c

254

ret = max8998_get_voltage_register(rdev, &reg, &shift, &mask);

drivers/regulator/max8998.c

288

&shift,

drivers/regulator/max8998.c

323

&reg, &shift, &mask);

drivers/regulator/max8998.c

337

ret = max8998_update_reg(i2c, reg, selector<<shift,

drivers/regulator/max8998.c

338

mask<<shift);

drivers/regulator/max8998.c

44

int *reg, int *shift)

drivers/regulator/max8998.c

51

*shift = 3 - (ldo - MAX8998_LDO2);

drivers/regulator/max8998.c

55

*shift = 7 - (ldo - MAX8998_LDO6);

drivers/regulator/max8998.c

59

*shift = 7 - (ldo - MAX8998_LDO14);

drivers/regulator/max8998.c

63

*shift = 7 - (ldo - MAX8998_BUCK1);

drivers/regulator/max8998.c

67

*shift = 7 - (ldo - MAX8998_EN32KHZ_AP);

drivers/regulator/max8998.c

71

*shift = 7 - (ldo - MAX8998_ESAFEOUT1);

drivers/regulator/max8998.c

75

*shift = 0;

drivers/regulator/max8998.c

88

int ret, reg, shift = 8;

drivers/regulator/max8998.c

91

ret = max8998_get_enable_register(rdev, &reg, &shift);

drivers/regulator/max8998.c

99

return val & (1 << shift);

drivers/regulator/mt6360-regulator.c

225

int shift = ffs(rdesc->mode_mask) - 1;

drivers/regulator/mt6360-regulator.c

243

ret = regmap_update_bits(regmap, rdesc->mode_reg, rdesc->mode_mask, val << shift);

drivers/regulator/mt6360-regulator.c

256

int shift = ffs(rdesc->mode_mask) - 1;

drivers/regulator/mt6360-regulator.c

265

val >>= shift;

drivers/regulator/qcom_rpm-regulator.c

193

if (WARN_ON((value << req->shift) & ~req->mask))

drivers/regulator/qcom_rpm-regulator.c

197

vreg->val[req->word] |= value << req->shift;

drivers/regulator/qcom_rpm-regulator.c

23

int shift;

drivers/regulator/qcom_rpm-regulator.c

394

int max_mA = req->mask >> req->shift;

drivers/regulator/qcom_rpm-regulator.c

45

(((reg)->parts->fm.mask >> (reg)->parts->fm.shift) == 3)

drivers/regulator/qcom_rpm-regulator.c

634

if (req->mask == 0 || (value << req->shift) & ~req->mask)

drivers/regulator/qcom_rpm-regulator.c

638

vreg->val[req->word] |= value << req->shift;

drivers/regulator/rtmv20-regulator.c

242

int shift = ffs(props[i].mask) - 1;

drivers/regulator/rtmv20-regulator.c

261

val16 |= (temp << shift);

drivers/regulator/rtmv20-regulator.c

268

temp << shift);

drivers/regulator/rtq2208-regulator.c

111

unsigned int val, shift;

drivers/regulator/rtq2208-regulator.c

124

shift = ffs(rdesc->mode_mask) - 1;

drivers/regulator/rtq2208-regulator.c

126

rdesc->mode_mask, val << shift);

drivers/regulator/rtq2208-regulator.c

197

unsigned int val, shift;

drivers/regulator/rtq2208-regulator.c

210

shift = ffs(rdesc->suspend_mode_mask) - 1;

drivers/regulator/rtq2208-regulator.c

213

rdesc->suspend_mode_mask, val << shift);

drivers/regulator/tps6507x-regulator.c

209

u8 shift;

drivers/regulator/tps6507x-regulator.c

214

shift = TPS6507X_MAX_REG_ID - rid;

drivers/regulator/tps6507x-regulator.c

220

return (data & 1<<shift) ? 1 : 0;

drivers/regulator/tps6507x-regulator.c

227

u8 shift;

drivers/regulator/tps6507x-regulator.c

232

shift = TPS6507X_MAX_REG_ID - rid;

drivers/regulator/tps6507x-regulator.c

233

return tps6507x_pmic_set_bits(tps, TPS6507X_REG_CON_CTRL1, 1 << shift);

drivers/regulator/tps6507x-regulator.c

240

u8 shift;

drivers/regulator/tps6507x-regulator.c

245

shift = TPS6507X_MAX_REG_ID - rid;

drivers/regulator/tps6507x-regulator.c

247

1 << shift);

drivers/regulator/tps6524x-regulator.c

122

int shift;

drivers/regulator/tps6524x-regulator.c

289

return (tmp >> field->shift) & field->mask;

drivers/regulator/tps6524x-regulator.c

299

field->mask << field->shift,

drivers/regulator/tps6524x-regulator.c

300

val << field->shift);

drivers/regulator/tps6524x-regulator.c

372

{ .reg = (_reg), .mask = (_mask), .shift = (_shift), }

drivers/regulator/tps6586x-regulator.c

109

#define TPS6586X_REGULATOR(_id, _ops, _pin_name, vdata, vreg, shift, nbits, \

drivers/regulator/tps6586x-regulator.c

123

.vsel_mask = ((1 << (nbits)) - 1) << (shift), \

drivers/regulator/tps6586x-regulator.c

133

uv_step, vreg, shift, nbits, ereg0, \

drivers/regulator/tps6586x-regulator.c

148

.vsel_mask = ((1 << (nbits)) - 1) << (shift), \

drivers/regulator/tps6586x-regulator.c

157

#define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \

drivers/regulator/tps6586x-regulator.c

160

TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \

drivers/regulator/tps6586x-regulator.c

165

shift, nbits, ereg0, ebit0, ereg1, ebit1) \

drivers/regulator/tps6586x-regulator.c

168

min_uv, uv_step, vreg, shift, nbits, \

drivers/regulator/tps6586x-regulator.c

172

#define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \

drivers/regulator/tps6586x-regulator.c

175

TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \

drivers/regulator/tps6586x-regulator.c

179

#define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \

drivers/regulator/tps6586x-regulator.c

183

min_uv, uv_step, vreg, shift, nbits, \

drivers/reset/reset-pistachio.c

68

int shift;

drivers/reset/reset-pistachio.c

71

shift = pistachio_reset_shift(id);

drivers/reset/reset-pistachio.c

72

if (shift < 0)

drivers/reset/reset-pistachio.c

73

return shift;

drivers/reset/reset-pistachio.c

74

mask = BIT(shift);

drivers/reset/reset-pistachio.c

85

int shift;

drivers/reset/reset-pistachio.c

88

shift = pistachio_reset_shift(id);

drivers/reset/reset-pistachio.c

89

if (shift < 0)

drivers/reset/reset-pistachio.c

90

return shift;

drivers/reset/reset-pistachio.c

91

mask = BIT(shift);

drivers/reset/reset-sunplus.c

117

int shift = sp_resets[id] % BITS_PER_HWM_REG;

drivers/reset/reset-sunplus.c

120

val = (1 << (16 + shift)) | (assert << shift);

drivers/reset/reset-sunplus.c

143

int shift = sp_resets[id] % BITS_PER_HWM_REG;

drivers/reset/reset-sunplus.c

148

return !!(reg & BIT(shift));

drivers/rtc/rtc-lp8788.c

228

u8 mask, shift;

drivers/rtc/rtc-lp8788.c

234

shift = shift_alarm_en[rtc->alarm];

drivers/rtc/rtc-lp8788.c

236

return lp8788_update_bits(lp, LP8788_INTEN_3, mask, enable << shift);

drivers/rtc/rtc-sunxi.c

47

#define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \

drivers/rtc/rtc-sunxi.c

48

>> (shift))

drivers/rtc/rtc-sunxi.c

50

#define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift))

drivers/rtc/rtc-sunxi.c

79

#define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift)

drivers/scsi/elx/libefc_sli/sli4.c

3628

struct sli4_queue *q, int num_q, u32 shift,

drivers/scsi/elx/libefc_sli/sli4.c

3646

req->eq_delay_record[i].phase = cpu_to_le32(shift);

drivers/scsi/elx/libefc_sli/sli4.c

4823

u32 num_eq, u32 shift, u32 delay_mult)

drivers/scsi/elx/libefc_sli/sli4.c

4826

shift, delay_mult);

drivers/scsi/elx/libefc_sli/sli4.h

3987

u32 shift, u32 delay_mult);

drivers/scsi/hisi_sas/hisi_sas.h

132

int shift;

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

2955

val >>= ecc_error->shift;

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

2975

val >>= ecc_error->shift;

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

3078

1 << axi_error->shift);

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

424

.shift = HGC_DQE_ECC_1B_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

431

.shift = HGC_IOST_ECC_1B_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

438

.shift = HGC_ITCT_ECC_1B_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

445

.shift = HGC_LM_DFX_STATUS2_IOSTLIST_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

452

.shift = HGC_LM_DFX_STATUS2_ITCTLIST_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

459

.shift = HGC_CQE_ECC_1B_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

466

.shift = HGC_RXM_DFX_STATUS14_MEM0_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

473

.shift = HGC_RXM_DFX_STATUS14_MEM1_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

480

.shift = HGC_RXM_DFX_STATUS14_MEM2_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

487

.shift = HGC_RXM_DFX_STATUS15_MEM3_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

497

.shift = HGC_DQE_ECC_MB_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

504

.shift = HGC_IOST_ECC_MB_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

511

.shift = HGC_ITCT_ECC_MB_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

518

.shift = HGC_LM_DFX_STATUS2_IOSTLIST_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

525

.shift = HGC_LM_DFX_STATUS2_ITCTLIST_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

532

.shift = HGC_CQE_ECC_MB_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

539

.shift = HGC_RXM_DFX_STATUS14_MEM0_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

546

.shift = HGC_RXM_DFX_STATUS14_MEM1_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

553

.shift = HGC_RXM_DFX_STATUS14_MEM2_OFF,

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

560

.shift = HGC_RXM_DFX_STATUS15_MEM3_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

1997

.shift = HGC_DQE_ECC_MB_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2004

.shift = HGC_IOST_ECC_MB_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2011

.shift = HGC_ITCT_ECC_MB_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2018

.shift = HGC_LM_DFX_STATUS2_IOSTLIST_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2025

.shift = HGC_LM_DFX_STATUS2_ITCTLIST_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2032

.shift = HGC_CQE_ECC_MB_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2039

.shift = HGC_RXM_DFX_STATUS14_MEM0_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2046

.shift = HGC_RXM_DFX_STATUS14_MEM1_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2053

.shift = HGC_RXM_DFX_STATUS14_MEM2_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2060

.shift = HGC_RXM_DFX_STATUS15_MEM3_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2067

.shift = AM_ROB_ECC_ERR_ADDR_OFF,

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

2086

val >>= ecc_error->shift;

drivers/scsi/scsi_scan.c

234

if (!need_alloc && new_shift != sdev->budget_map.shift)

drivers/sh/intc/access.c

59

unsigned int shift = _INTC_SHIFT(handle);

drivers/sh/intc/access.c

61

value &= ~(((1 << width) - 1) << shift);

drivers/sh/intc/access.c

62

value |= field_value << shift;

drivers/sh/intc/access.c

69

unsigned int shift = _INTC_SHIFT(handle);

drivers/sh/intc/access.c

70

unsigned int mask = ((1 << width) - 1) << shift;

drivers/sh/intc/access.c

72

return (value & mask) >> shift;

drivers/sh/intc/internals.h

11

#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \

drivers/sh/intc/internals.h

12

((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \

drivers/soc/aspeed/aspeed-uart-routing.c

109

.shift = 25,

drivers/soc/aspeed/aspeed-uart-routing.c

127

.shift = 22,

drivers/soc/aspeed/aspeed-uart-routing.c

145

.shift = 19,

drivers/soc/aspeed/aspeed-uart-routing.c

163

.shift = 16,

drivers/soc/aspeed/aspeed-uart-routing.c

181

.shift = 12,

drivers/soc/aspeed/aspeed-uart-routing.c

199

.shift = 9,

drivers/soc/aspeed/aspeed-uart-routing.c

217

.shift = 6,

drivers/soc/aspeed/aspeed-uart-routing.c

235

.shift = 3,

drivers/soc/aspeed/aspeed-uart-routing.c

253

.shift = 0,

drivers/soc/aspeed/aspeed-uart-routing.c

291

.shift = 12,

drivers/soc/aspeed/aspeed-uart-routing.c

311

.shift = 8,

drivers/soc/aspeed/aspeed-uart-routing.c

332

.shift = 25,

drivers/soc/aspeed/aspeed-uart-routing.c

350

.shift = 22,

drivers/soc/aspeed/aspeed-uart-routing.c

368

.shift = 19,

drivers/soc/aspeed/aspeed-uart-routing.c

386

.shift = 16,

drivers/soc/aspeed/aspeed-uart-routing.c

404

.shift = 9,

drivers/soc/aspeed/aspeed-uart-routing.c

422

.shift = 6,

drivers/soc/aspeed/aspeed-uart-routing.c

43

uint8_t shift;

drivers/soc/aspeed/aspeed-uart-routing.c

440

.shift = 3,

drivers/soc/aspeed/aspeed-uart-routing.c

458

.shift = 0,

drivers/soc/aspeed/aspeed-uart-routing.c

500

val = (val >> sel->shift) & sel->mask;

drivers/soc/aspeed/aspeed-uart-routing.c

533

(sel->mask << sel->shift),

drivers/soc/aspeed/aspeed-uart-routing.c

534

(val & sel->mask) << sel->shift);

drivers/soc/aspeed/aspeed-uart-routing.c

69

.shift = 8,

drivers/soc/aspeed/aspeed-uart-routing.c

89

.shift = 28,

drivers/soc/bcm/brcmstb/biuctrl.c

179

u32 enable = 0, pref_dist, shift;

drivers/soc/bcm/brcmstb/biuctrl.c

189

shift = cpu * RAC_CPU_SHIFT + RACPREFDATA_SHIFT;

drivers/soc/bcm/brcmstb/biuctrl.c

192

enable &= ~(RACENPREF_MASK << shift);

drivers/soc/bcm/brcmstb/biuctrl.c

193

enable |= 3 << shift;

drivers/soc/fsl/qe/ucc.c

102

unsigned int shift;

drivers/soc/fsl/qe/ucc.c

108

get_cmxucr_reg(ucc_num, &cmxucr, &reg_num, &shift);

drivers/soc/fsl/qe/ucc.c

111

qe_setbits_be32(cmxucr, mask << shift);

drivers/soc/fsl/qe/ucc.c

113

qe_clrbits_be32(cmxucr, mask << shift);

drivers/soc/fsl/qe/ucc.c

124

unsigned int shift;

drivers/soc/fsl/qe/ucc.c

135

get_cmxucr_reg(ucc_num, &cmxucr, &reg_num, &shift);

drivers/soc/fsl/qe/ucc.c

208

shift += 4;

drivers/soc/fsl/qe/ucc.c

210

qe_clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift,

drivers/soc/fsl/qe/ucc.c

211

clock_bits << shift);

drivers/soc/fsl/qe/ucc.c

506

u32 shift;

drivers/soc/fsl/qe/ucc.c

508

shift = (mode == COMM_DIR_RX) ? RX_CLK_SHIFT_BASE : TX_CLK_SHIFT_BASE;

drivers/soc/fsl/qe/ucc.c

510

shift -= tdm_num * 4;

drivers/soc/fsl/qe/ucc.c

512

shift -= (tdm_num - 4) * 4;

drivers/soc/fsl/qe/ucc.c

514

return shift;

drivers/soc/fsl/qe/ucc.c

521

u32 shift;

drivers/soc/fsl/qe/ucc.c

538

shift = ucc_get_tdm_clk_shift(mode, tdm_num);

drivers/soc/fsl/qe/ucc.c

543

qe_clrsetbits_be32(cmxs1cr, QE_CMXUCR_TX_CLK_SRC_MASK << shift,

drivers/soc/fsl/qe/ucc.c

544

clock_bits << shift);

drivers/soc/fsl/qe/ucc.c

623

u32 shift;

drivers/soc/fsl/qe/ucc.c

625

shift = (mode == COMM_DIR_RX) ? RX_SYNC_SHIFT_BASE : TX_SYNC_SHIFT_BASE;

drivers/soc/fsl/qe/ucc.c

626

shift -= tdm_num * 2;

drivers/soc/fsl/qe/ucc.c

628

return shift;

drivers/soc/fsl/qe/ucc.c

635

u32 shift;

drivers/soc/fsl/qe/ucc.c

651

shift = ucc_get_tdm_sync_shift(mode, tdm_num);

drivers/soc/fsl/qe/ucc.c

654

QE_CMXUCR_TX_CLK_SRC_MASK << shift,

drivers/soc/fsl/qe/ucc.c

655

source << shift);

drivers/soc/fsl/qe/ucc.c

89

unsigned int *reg_num, unsigned int *shift)

drivers/soc/fsl/qe/ucc.c

95

*shift = 16 - 8 * (ucc_num & 2);

drivers/soc/tegra/pmc.c

218

u32 shift;

drivers/soc/tegra/pmc.c

2817

u32 shift, int state)

drivers/soc/tegra/pmc.c

2822

val = state ? (val | BIT(shift)) : (val & ~BIT(shift));

drivers/soc/tegra/pmc.c

2885

return value & BIT(gate->shift) ? 1 : 0;

drivers/soc/tegra/pmc.c

2892

pmc_clk_set_state(gate->pmc, gate->offs, gate->shift, 1);

drivers/soc/tegra/pmc.c

2901

pmc_clk_set_state(gate->pmc, gate->offs, gate->shift, 0);

drivers/soc/tegra/pmc.c

2913

u32 shift)

drivers/soc/tegra/pmc.c

2931

gate->shift = shift;

drivers/spi/spi-amlogic-spisg.c

681

div->shift = __bf_shf(CFG_CLK_DIV);

drivers/spi/spi-aspeed-smc.c

1172

u32 shift = (hdiv - 1) << 2;

drivers/spi/spi-aspeed-smc.c

1173

u32 mask = ~(0xfu << shift);

drivers/spi/spi-aspeed-smc.c

1184

fread_timing_val |= FREAD_TPASS(i) << shift;

drivers/spi/spi-aspeed-smc.c

1210

fread_timing_val |= FREAD_TPASS(good_pass) << shift;

drivers/spi/spi-aspeed-smc.c

1500

u32 shift = (hdiv - 2) << 3;

drivers/spi/spi-aspeed-smc.c

1501

u32 mask = ~(0xffu << shift);

drivers/spi/spi-aspeed-smc.c

1510

fread_timing_val |= hcycle << shift;

drivers/spi/spi-aspeed-smc.c

1523

fread_timing_val |= (TIMING_DELAY_DI | hcycle) << shift;

drivers/spi/spi-aspeed-smc.c

1526

fread_timing_val &= ~(0xfu << (4 + shift));

drivers/spi/spi-aspeed-smc.c

1527

fread_timing_val |= delay_ns << (4 + shift);

drivers/spi/spi-aspeed-smc.c

1549

fread_timing_val = (TIMING_DELAY_DI | hcycle | (delay_ns << 4)) << shift;

drivers/spi/spi-cadence-quadspi.c

482

unsigned int shift)

drivers/spi/spi-cadence-quadspi.c

496

reg &= ~(0xff << shift);

drivers/spi/spi-cadence-quadspi.c

497

reg |= ext << shift;

drivers/spi/spi-cadence-quadspi.c

504

const struct spi_mem_op *op, unsigned int shift)

drivers/spi/spi-cadence-quadspi.c

522

ret = cqspi_setup_opcode_ext(f_pdata, op, shift);

drivers/spi/spi-fsi.c

470

u8 shift;

drivers/spi/spi-fsi.c

480

shift = SPI_FSI_SEQUENCE_SHIFT_IN(next->len);

drivers/spi/spi-fsi.c

481

fsi_spi_sequence_add(&seq, shift);

drivers/spi/spi-lantiq-ssc.c

569

unsigned int rxbv, shift;

drivers/spi/spi-lantiq-ssc.c

585

shift = (rxbv - 1) * 8;

drivers/spi/spi-lantiq-ssc.c

589

*rx8++ = (data >> shift) & 0xFF;

drivers/spi/spi-lantiq-ssc.c

591

shift -= 8;

drivers/spi/spi-lp8841-rtc.c

72

u32 shift = 32 - bits;

drivers/spi/spi-lp8841-rtc.c

93

word >>= shift;

drivers/spi/spi-meson-spicc.c

880

spicc->pow2_div.shift = 16;

drivers/spi/spi-meson-spicc.c

946

enh_div->shift = 16;

drivers/spi/spi-meson-spicc.c

968

mux->shift = 24;

drivers/spi/spi-omap-uwire.c

118

int shift, reg;

drivers/spi/spi-omap-uwire.c

124

shift = 6;

drivers/spi/spi-omap-uwire.c

126

shift = 0;

drivers/spi/spi-omap-uwire.c

133

w &= ~(0x3f << shift);

drivers/spi/spi-omap-uwire.c

134

w |= val << shift;

drivers/spi/spi-qup.c

256

int i, shift, num_bytes;

drivers/spi/spi-qup.c

279

shift = BITS_PER_BYTE;

drivers/spi/spi-qup.c

280

shift *= (controller->w_size - i - 1);

drivers/spi/spi-qup.c

281

rx_buf[controller->rx_bytes] = word >> shift;

drivers/spi/spi-stm32.c

1838

setb |= (mbrdiv << spi->cfg->regs->br.shift) & spi->cfg->regs->br.mask;

drivers/spi/spi-stm32.c

218

int shift;

drivers/spmi/spmi-mtk-pmif.c

521

unsigned int reg, shift;

drivers/spmi/spmi-mtk-pmif.c

525

shift = (irq % 4) * 8;

drivers/spmi/spmi-mtk-pmif.c

527

mtk_spmi_writel(arb, pbus, PMIF_RCS_IRQ_MASK << shift, reg);

drivers/ssb/driver_chipcommon_pmu.c

544

u32 addr, shift, mask;

drivers/ssb/driver_chipcommon_pmu.c

552

shift = 25;

drivers/ssb/driver_chipcommon_pmu.c

557

shift = 1;

drivers/ssb/driver_chipcommon_pmu.c

562

shift = 9;

drivers/ssb/driver_chipcommon_pmu.c

567

shift = 17;

drivers/ssb/driver_chipcommon_pmu.c

579

shift = 21;

drivers/ssb/driver_chipcommon_pmu.c

586

ssb_chipco_regctl_maskset(cc, addr, ~(mask << shift),

drivers/ssb/driver_chipcommon_pmu.c

587

(voltage & mask) << shift);

drivers/ssb/pci.c

328

u16 mask, u16 shift)

drivers/ssb/pci.c

334

gain = (v & mask) >> shift;

drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c

657

int ctrl_reg, int shift, bool on)

drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c

666

val = on ? 1 << shift : 0;

drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c

668

ret = gmin_i2c_write(dev, gs->pwm_i2c_addr, ctrl_reg, val, 1 << shift);

drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c

16

int *dydx, int *shift,

drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c

41

assert(shift);

drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc1_5/ia_css_ctc1_5.host.c

54

*shift = sft;

drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c

30

to->shift = from->shift;

drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn.host.c

43

"fpn_shift", fpn->shift);

drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn_param.h

18

s32 shift;

drivers/staging/media/atomisp/pci/isp/kernels/fpn/fpn_1.0/ia_css_fpn_types.h

34

u32 shift; /** Common exponent of table content.

drivers/staging/media/atomisp/pci/sh_css_params.c

851

params->fpn_config.shift = 0;

drivers/staging/media/atomisp/pci/sh_css_params.c

855

params->fpn_config.shift++;

drivers/staging/media/atomisp/pci/sh_css_params.c

859

((unsigned short *)params->fpn_config.data)[i] >>= params->fpn_config.shift;

drivers/staging/media/atomisp/pci/sh_css_params.c

963

params->fpn_config.shift = 0;

drivers/staging/media/ipu3/ipu3-dmamap.c

107

iova = alloc_iova(&imgu->iova_domain, size >> shift,

drivers/staging/media/ipu3/ipu3-dmamap.c

108

imgu->mmu->aperture_end >> shift, 0);

drivers/staging/media/ipu3/ipu3-dmamap.c

187

unsigned long shift = iova_shift(&imgu->iova_domain);

drivers/staging/media/ipu3/ipu3-dmamap.c

205

nents, size >> shift);

drivers/staging/media/ipu3/ipu3-dmamap.c

207

iova = alloc_iova(&imgu->iova_domain, size >> shift,

drivers/staging/media/ipu3/ipu3-dmamap.c

208

imgu->mmu->aperture_end >> shift, 0);

drivers/staging/media/ipu3/ipu3-dmamap.c

96

unsigned long shift = iova_shift(&imgu->iova_domain);

drivers/staging/media/sunxi/cedrus/cedrus_h265.c

184

unsigned int shift = (i % 4) * 8;

drivers/staging/media/sunxi/cedrus/cedrus_h265.c

192

word |= value << shift;

drivers/staging/most/dim2/hal.c

229

u8 const shift = (ch_addr % 2) * 16;

drivers/staging/most/dim2/hal.c

233

mask[idx] = (u32)0xFFFF << shift;

drivers/staging/most/dim2/hal.c

234

value[idx] = cat << shift;

drivers/staging/most/dim2/hal.c

242

u8 const shift = (ch_addr % 2) * 16;

drivers/staging/most/dim2/hal.c

246

mask[idx] = (u32)0xFFFF << shift;

drivers/staging/most/dim2/hal.c

300

u8 const shift = idx * 16;

drivers/staging/most/dim2/hal.c

306

bit_mask(ADT1_PS_BIT + shift) |

drivers/staging/most/dim2/hal.c

307

bit_mask(ADT1_RDY_BIT + shift) |

drivers/staging/most/dim2/hal.c

308

(ADT1_CTRL_ASYNC_BD_MASK << (ADT1_BD_SHIFT + shift));

drivers/staging/most/dim2/hal.c

310

(true << (ADT1_PS_BIT + shift)) |

drivers/staging/most/dim2/hal.c

311

(true << (ADT1_RDY_BIT + shift)) |

drivers/staging/most/dim2/hal.c

312

((buffer_size - 1) << (ADT1_BD_SHIFT + shift));

drivers/staging/most/dim2/hal.c

323

u8 const shift = idx * 16;

drivers/staging/most/dim2/hal.c

329

bit_mask(ADT1_RDY_BIT + shift) |

drivers/staging/most/dim2/hal.c

330

(ADT1_ISOC_SYNC_BD_MASK << (ADT1_BD_SHIFT + shift));

drivers/staging/most/dim2/hal.c

332

(true << (ADT1_RDY_BIT + shift)) |

drivers/staging/most/dim2/hal.c

333

((buffer_size - 1) << (ADT1_BD_SHIFT + shift));

drivers/staging/most/dim2/hal.c

575

u8 const shift = idx * 16;

drivers/staging/most/dim2/hal.c

580

if (((adt1 >> (ADT1_DNE_BIT + shift)) & 1) == 0)

drivers/staging/most/dim2/hal.c

584

bit_mask(ADT1_DNE_BIT + shift) |

drivers/staging/most/dim2/hal.c

585

bit_mask(ADT1_ERR_BIT + shift) |

drivers/staging/most/dim2/hal.c

586

bit_mask(ADT1_RDY_BIT + shift);

drivers/staging/rtl8723bs/hal/sdio_ops.c

159

u8 shift;

drivers/staging/rtl8723bs/hal/sdio_ops.c

178

shift = ftaddr & 0x3;

drivers/staging/rtl8723bs/hal/sdio_ops.c

179

if (shift == 0) {

drivers/staging/rtl8723bs/hal/sdio_ops.c

190

memcpy(&le_tmp, tmpbuf + shift, 4);

drivers/staging/rtl8723bs/hal/sdio_ops.c

205

u8 shift;

drivers/staging/rtl8723bs/hal/sdio_ops.c

222

shift = ftaddr & 0x3;

drivers/staging/rtl8723bs/hal/sdio_ops.c

223

if (shift == 0) {

drivers/staging/rtl8723bs/hal/sdio_ops.c

230

n = cnt + shift;

drivers/staging/rtl8723bs/hal/sdio_ops.c

237

memcpy(buf, tmpbuf + shift, cnt);

drivers/staging/rtl8723bs/hal/sdio_ops.c

271

u8 shift;

drivers/staging/rtl8723bs/hal/sdio_ops.c

292

shift = ftaddr & 0x3;

drivers/staging/rtl8723bs/hal/sdio_ops.c

293

if (shift == 0) {

drivers/staging/rtl8723bs/hal/sdio_ops.c

309

u8 shift;

drivers/staging/rtl8723bs/hal/sdio_ops.c

325

shift = ftaddr & 0x3;

drivers/staging/rtl8723bs/hal/sdio_ops.c

326

if (shift == 0) {

drivers/staging/rtl8723bs/hal/sdio_ops.c

333

n = cnt + shift;

drivers/staging/rtl8723bs/hal/sdio_ops.c

342

memcpy(tmpbuf + shift, buf, cnt);

drivers/staging/rtl8723bs/include/rtl8723b_recv.h

20

u32 shift:2;

drivers/target/target_core_stat.c

279

#define per_cpu_stat_snprintf(stats_struct, prefix, field, shift) \

drivers/target/target_core_stat.c

293

return snprintf(page, PAGE_SIZE, "%llu\n", sum >> shift); \

drivers/target/target_core_stat.c

296

#define lu_show_per_cpu_stat(prefix, field, shift) \

drivers/target/target_core_stat.c

297

per_cpu_stat_snprintf(se_dev_io_stats, prefix, field, shift); \

drivers/target/target_core_stat.c

609

#define tgt_port_show_per_cpu_stat(prefix, field, shift) \

drivers/target/target_core_stat.c

610

per_cpu_stat_snprintf(scsi_port_stats, prefix, field, shift); \

drivers/target/target_core_stat.c

998

#define auth_show_per_cpu_stat(prefix, field, shift) \

drivers/target/target_core_stat.c

999

per_cpu_stat_snprintf(se_dev_entry_io_stats, prefix, field, shift); \

drivers/thermal/intel/int340x_thermal/platform_temperature_control.c

111

ret = (reg_val >> mmio_regs[ret].shift) & mmio_regs[ret].mask;

drivers/thermal/intel/int340x_thermal/platform_temperature_control.c

134

mask = GENMASK_ULL(ptc_mmio_regs[index].shift + ptc_mmio_regs[index].bits - 1,

drivers/thermal/intel/int340x_thermal/platform_temperature_control.c

135

ptc_mmio_regs[index].shift);

drivers/thermal/intel/int340x_thermal/platform_temperature_control.c

141

reg_val |= (value << ptc_mmio_regs[index].shift);

drivers/thermal/intel/int340x_thermal/platform_temperature_control.c

48

u16 shift;

drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c

100

mask = proc_thermal_mmio_info[type].mask << proc_thermal_mmio_info[type].shift;

drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c

104

value <<= proc_thermal_mmio_info[type].shift;

drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c

49

u64 shift;

drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c

87

*value >>= proc_thermal_mmio_info[type].shift;

drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c

20

u16 shift;

drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c

212

ret = (reg_val >> mmio_regs[ret].shift) & mmio_regs[ret].mask;\

drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c

260

mask = GENMASK(mmio_regs[ret].shift + mmio_regs[ret].bits - 1, mmio_regs[ret].shift);\

drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c

263

reg_val |= (input << mmio_regs[ret].shift);\

drivers/thermal/intel/x86_pkg_temp_thermal.c

128

u32 l, h, mask, shift, intr;

drivers/thermal/intel/x86_pkg_temp_thermal.c

151

shift = THERM_SHIFT_THRESHOLD1;

drivers/thermal/intel/x86_pkg_temp_thermal.c

155

shift = THERM_SHIFT_THRESHOLD0;

drivers/thermal/intel/x86_pkg_temp_thermal.c

166

l |= val << shift;

drivers/thermal/intel/x86_pkg_temp_thermal.c

280

u32 mask, shift, eax, edx;

drivers/thermal/intel/x86_pkg_temp_thermal.c

287

shift = THERM_SHIFT_THRESHOLD1;

drivers/thermal/intel/x86_pkg_temp_thermal.c

290

shift = THERM_SHIFT_THRESHOLD0;

drivers/thermal/intel/x86_pkg_temp_thermal.c

298

thres_reg_value = (eax & mask) >> shift;

drivers/thermal/qcom/tsens-v2.c

144

u32 shift = V2_SHIFT_DEFAULT;

drivers/thermal/qcom/tsens-v2.c

178

val = FIELD_PREP(CONVERSION_SHIFT_MASK, shift) |

drivers/thermal/qcom/tsens.c

135

p1[i] = p1[i] + (base1 << shift);

drivers/thermal/qcom/tsens.c

140

p2[i] = (p2[i] + base2) << shift;

drivers/thermal/qcom/tsens.c

145

p1[i] = (p1[i] + base1) << shift;

drivers/thermal/qcom/tsens.c

170

int tsens_calibrate_nvmem(struct tsens_priv *priv, int shift)

drivers/thermal/qcom/tsens.c

175

mode = tsens_read_calibration(priv, shift, p1, p2, false);

drivers/thermal/qcom/tsens.c

194

if (cell->shift + len <= 32) {

drivers/thermal/qcom/tsens.c

195

val = data[cell->idx] >> cell->shift;

drivers/thermal/qcom/tsens.c

197

u8 part = 32 - cell->shift;

drivers/thermal/qcom/tsens.c

199

val = data[cell->idx] >> cell->shift;

drivers/thermal/qcom/tsens.c

74

int tsens_read_calibration(struct tsens_priv *priv, int shift, u32 *p1, u32 *p2, bool backup)

drivers/thermal/qcom/tsens.h

602

u8 shift;

drivers/thermal/qcom/tsens.h

633

int tsens_read_calibration(struct tsens_priv *priv, int shift, u32 *p1, u32 *p2, bool backup);

drivers/thermal/qcom/tsens.h

634

int tsens_calibrate_nvmem(struct tsens_priv *priv, int shift);

drivers/thunderbolt/nhi.c

128

shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;

drivers/thunderbolt/nhi.c

130

ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift);

drivers/thunderbolt/nhi.c

132

ivr |= ring->vector << shift;

drivers/thunderbolt/nhi.c

96

u32 step, shift, ivr, misc;

drivers/tty/serial/sh-sci.c

2846

int shift = clamp(deviation / 2, -8, 7);

drivers/tty/serial/sh-sci.c

2848

hssrr |= (shift << HSCIF_SRHP_SHIFT) &

drivers/tty/sysrq.c

666

unsigned int shift;

drivers/tty/sysrq.c

854

sysrq->shift = KEY_RESERVED;

drivers/tty/sysrq.c

856

sysrq->shift = code;

drivers/tty/sysrq.c

858

sysrq->shift_use = sysrq->shift;

drivers/tty/sysrq.c

866

sysrq->shift_use = sysrq->shift;

drivers/tty/vt/keyboard.c

1444

param.shift = shift_final = (shift_state | kbd->slockstate) ^ kbd->lockstate;

drivers/usb/gadget/udc/omap_udc.c

808

int shift = 4 * (ep->dma_channel - 1);

drivers/usb/gadget/udc/omap_udc.c

809

u16 mask = 0x0f << shift;

drivers/usb/gadget/udc/tegra-xudc.c

243

#define BUILD_EP_CONTEXT_RW(name, member, shift, mask) \

drivers/usb/gadget/udc/tegra-xudc.c

246

return (le32_to_cpu(ctx->member) >> (shift)) & (mask); \

drivers/usb/gadget/udc/tegra-xudc.c

253

tmp = le32_to_cpu(ctx->member) & ~((mask) << (shift)); \

drivers/usb/gadget/udc/tegra-xudc.c

254

tmp |= (val & (mask)) << (shift); \

drivers/usb/gadget/udc/tegra-xudc.c

335

#define BUILD_TRB_RW(name, member, shift, mask) \

drivers/usb/gadget/udc/tegra-xudc.c

338

return (le32_to_cpu(trb->member) >> (shift)) & (mask); \

drivers/usb/gadget/udc/tegra-xudc.c

345

tmp = le32_to_cpu(trb->member) & ~((mask) << (shift)); \

drivers/usb/gadget/udc/tegra-xudc.c

346

tmp |= (val & (mask)) << (shift); \

drivers/usb/musb/musb_cppi41.c

331

unsigned shift;

drivers/usb/musb/musb_cppi41.c

333

shift = (ep - 1) * 2;

drivers/usb/musb/musb_cppi41.c

334

old &= ~(3 << shift);

drivers/usb/musb/musb_cppi41.c

335

old |= mode << shift;

drivers/usb/musb/musb_cppi41.c

371

unsigned int shift;

drivers/usb/musb/musb_cppi41.c

379

shift = (port - 1) * 4;

drivers/usb/musb/musb_cppi41.c

381

shift += 16;

drivers/usb/musb/musb_cppi41.c

382

new_mode = old_mode & ~(3 << shift);

drivers/usb/musb/musb_cppi41.c

383

new_mode |= mode << shift;

drivers/usb/phy/phy-tegra-usb.c

876

u32 shift = phy->soc_config->uhsic_registers_offset;

drivers/usb/phy/phy-tegra-usb.c

878

return readl_relaxed(base + shift + reg);

drivers/usb/phy/phy-tegra-usb.c

884

u32 shift = phy->soc_config->uhsic_registers_offset;

drivers/usb/phy/phy-tegra-usb.c

886

writel_relaxed(value, base + shift + reg);

drivers/usb/storage/alauda.c

288

unsigned int shift = media_info->zoneshift

drivers/usb/storage/alauda.c

290

unsigned int num_zones = media_info->capacity >> shift;

drivers/vdpa/vdpa_user/iova_domain.c

409

unsigned long shift = iova_shift(iovad);

drivers/vdpa/vdpa_user/iova_domain.c

410

unsigned long iova_len = iova_align(iovad, size) >> shift;

drivers/vdpa/vdpa_user/iova_domain.c

413

iova_pfn = alloc_iova_fast(iovad, iova_len, limit >> shift, true);

drivers/vdpa/vdpa_user/iova_domain.c

415

return (dma_addr_t)iova_pfn << shift;

drivers/vdpa/vdpa_user/iova_domain.c

421

unsigned long shift = iova_shift(iovad);

drivers/vdpa/vdpa_user/iova_domain.c

422

unsigned long iova_len = iova_align(iovad, size) >> shift;

drivers/vdpa/vdpa_user/iova_domain.c

424

free_iova_fast(iovad, iova >> shift, iova_len);

drivers/vfio/vfio_iommu_spapr_tce.c

390

unsigned long tce, unsigned long shift,

drivers/vfio/vfio_iommu_spapr_tce.c

396

mem = mm_iommu_lookup(container->mm, tce, 1ULL << shift);

drivers/vfio/vfio_iommu_spapr_tce.c

400

ret = mm_iommu_ua_to_hpa(mem, tce, shift, phpa);

drivers/vfio/vfio_iommu_type1.c

1279

unsigned long shift = bit_offset % BITS_PER_LONG;

drivers/vfio/vfio_iommu_type1.c

1289

if (shift) {

drivers/vfio/vfio_iommu_type1.c

1290

bitmap_shift_left(dma->bitmap, dma->bitmap, shift,

drivers/vfio/vfio_iommu_type1.c

1291

nbits + shift);

drivers/vfio/vfio_iommu_type1.c

1298

bitmap_or(dma->bitmap, dma->bitmap, &leftover, shift);

drivers/vfio/vfio_iommu_type1.c

1302

DIRTY_BITMAP_BYTES(nbits + shift)))

drivers/video/fbdev/amifb.c

1602

short clk_shift, vshift, fstrt, fsize, fstop, fconst, shift, move, mod;

drivers/video/fbdev/amifb.c

1613

shift = modx(fconst, fstrt);

drivers/video/fbdev/amifb.c

1633

par->bplcon1 = hscroll2hw(shift);

drivers/video/fbdev/amifb.c

2595

int shift = dst_idx - src_idx, left, right;

drivers/video/fbdev/amifb.c

2602

shift = dst_idx - src_idx;

drivers/video/fbdev/amifb.c

2606

if (!shift) {

drivers/video/fbdev/amifb.c

2647

right = shift & (BITS_PER_LONG - 1);

drivers/video/fbdev/amifb.c

2648

left = -shift & (BITS_PER_LONG - 1);

drivers/video/fbdev/amifb.c

2654

if (shift > 0) {

drivers/video/fbdev/amifb.c

2671

if (shift > 0) {

drivers/video/fbdev/amifb.c

2735

int shift = dst_idx - src_idx, left, right;

drivers/video/fbdev/amifb.c

2753

shift = dst_idx - src_idx;

drivers/video/fbdev/amifb.c

2757

if (!shift) {

drivers/video/fbdev/amifb.c

2798

right = shift & (BITS_PER_LONG - 1);

drivers/video/fbdev/amifb.c

2799

left = -shift & (BITS_PER_LONG - 1);

drivers/video/fbdev/amifb.c

2805

if (shift < 0) {

drivers/video/fbdev/amifb.c

2822

if (shift < 0) {

drivers/video/fbdev/amifb.c

2887

int shift = dst_idx - src_idx, left, right;

drivers/video/fbdev/amifb.c

2894

shift = dst_idx - src_idx;

drivers/video/fbdev/amifb.c

2898

if (!shift) {

drivers/video/fbdev/amifb.c

2939

right = shift & (BITS_PER_LONG - 1);

drivers/video/fbdev/amifb.c

2940

left = -shift & (BITS_PER_LONG - 1);

drivers/video/fbdev/amifb.c

2946

if (shift > 0) {

drivers/video/fbdev/amifb.c

2963

if (shift > 0) {

drivers/video/fbdev/c2p_core.h

23

unsigned int shift, u32 mask)

drivers/video/fbdev/c2p_core.h

25

u32 t = (d[i1] ^ (d[i2] >> shift)) & mask;

drivers/video/fbdev/c2p_core.h

28

d[i2] ^= t << shift;

drivers/video/fbdev/clps711x-fb.c

48

u32 level, mask, shift;

drivers/video/fbdev/clps711x-fb.c

53

shift = 4 * (regno & 7);

drivers/video/fbdev/clps711x-fb.c

54

mask = 0xf << shift;

drivers/video/fbdev/clps711x-fb.c

56

level = (((red * 77 + green * 151 + blue * 28) >> 20) << shift) & mask;

drivers/video/fbdev/core/fb_copyarea.h

167

int shift, left, right;

drivers/video/fbdev/core/fb_copyarea.h

172

shift = dst->bits - src->bits;

drivers/video/fbdev/core/fb_copyarea.h

173

right = shift & (BITS_PER_LONG - 1);

drivers/video/fbdev/core/fb_copyarea.h

174

left = -shift & (BITS_PER_LONG - 1);

drivers/video/fbdev/core/fb_copyarea.h

179

if (shift < 0) {

drivers/video/fbdev/core/fb_copyarea.h

197

if (shift < 0)

drivers/video/fbdev/core/fb_copyarea.h

245

> offset * BITS_PER_LONG + ((shift < 0) ? BITS_PER_LONG : 0))

drivers/video/fbdev/core/fb_copyarea.h

261

int shift, left, right;

drivers/video/fbdev/core/fb_copyarea.h

266

shift = dst->bits - src->bits;

drivers/video/fbdev/core/fb_copyarea.h

267

right = shift & (BITS_PER_LONG-1);

drivers/video/fbdev/core/fb_copyarea.h

268

left = -shift & (BITS_PER_LONG-1);

drivers/video/fbdev/core/fb_copyarea.h

275

if (shift > 0) {

drivers/video/fbdev/core/fb_fillrect.h

225

static inline unsigned long fb_rotate(unsigned long pattern, int shift, int bpp)

drivers/video/fbdev/core/fb_fillrect.h

227

shift %= bpp;

drivers/video/fbdev/core/fb_fillrect.h

228

return fb_right(pattern, shift) | fb_left(pattern, bpp - shift);

drivers/video/fbdev/core/fb_imageblit.h

134

int shift = dst->bits;

drivers/video/fbdev/core/fb_imageblit.h

136

if (shift) {

drivers/video/fbdev/core/fb_imageblit.h

139

val &= ~fb_right(~0UL, shift);

drivers/video/fbdev/core/fb_imageblit.h

146

val |= fb_right(pixels, shift);

drivers/video/fbdev/core/fb_imageblit.h

147

shift += bits;

drivers/video/fbdev/core/fb_imageblit.h

149

if (shift < BITS_PER_LONG)

drivers/video/fbdev/core/fb_imageblit.h

154

shift &= BITS_PER_LONG - 1;

drivers/video/fbdev/core/fb_imageblit.h

155

val = !shift ? 0 : fb_left(pixels, bits - shift);

drivers/video/fbdev/core/fb_imageblit.h

158

if (shift) {

drivers/video/fbdev/core/fb_imageblit.h

159

mask = ~fb_pixel_mask(shift, reverse);

drivers/video/fbdev/core/fb_imageblit.h

180

iter.shift = BITS_PER_BYTE - bpp;

drivers/video/fbdev/core/fb_imageblit.h

182

iter.shift = 0;

drivers/video/fbdev/core/fb_imageblit.h

185

iter.shift = BITS_PER_LONG - BITS_PER_BYTE;

drivers/video/fbdev/core/fb_imageblit.h

187

iter.shift = BITS_PER_LONG - bpp;

drivers/video/fbdev/core/fb_imageblit.h

58

int shift;

drivers/video/fbdev/core/fb_imageblit.h

71

*pixels = color << iter->shift;

drivers/video/fbdev/core/fbcon_rotate.h

43

int shift = (8 - (width % 8)) & 7;

drivers/video/fbdev/core/fbcon_rotate.h

48

for (j = 0; j < width - shift; j++) {

drivers/video/fbdev/core/fbcon_rotate.h

50

pattern_set_bit(width - (1 + j + shift),

drivers/video/fbdev/core/fbcon_rotate.h

61

int shift = (8 - (height % 8)) & 7;

drivers/video/fbdev/core/fbcon_rotate.h

69

pattern_set_bit(height - 1 - i - shift, j,

drivers/video/fbdev/core/fbcon_rotate.h

79

int shift = (8 - (width % 8)) & 7;

drivers/video/fbdev/core/fbcon_rotate.h

87

pattern_set_bit(i, width - 1 - j - shift,

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1007

int shift;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1009

shift = shifts[plane];

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1010

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), burst_size, shift + 1, shift);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1089

int shift;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1094

shift = shifts[plane];

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

1095

REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

789

int shift;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

794

shift = shifts[plane];

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

795

REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, shift + 7, shift);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

903

int shift;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

909

shift = 8;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

914

shift = 16;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

954

val = FLD_MOD(val, chan, shift, shift);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

957

val = FLD_MOD(val, channel, shift, shift);

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

965

int shift;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

970

shift = 8;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

975

shift = 16;

drivers/video/fbdev/omap2/omapfb/dss/dispc.c

984

if (FLD_GET(val, shift, shift) == 1)

drivers/video/fbdev/omap2/omapfb/dss/dss.c

169

unsigned shift;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

179

shift = 0;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

182

shift = 1;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

185

shift = 2;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

193

1 << shift, val << shift);

drivers/video/fbdev/omap2/omapfb/dss/dss.c

199

unsigned shift, val;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

206

shift = 3;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

220

shift = 5;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

236

shift = 7;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

257

0x3 << shift, val << shift);

drivers/video/fbdev/omap2/omapfb/dss/hdmi.h

202

u8 shift;

drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c

595

r = FLD_MOD(r, cfg->i2s_cfg.shift, 0, 0);

drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c

715

acore.i2s_cfg.shift = HDMI_AUDIO_I2S_FIRST_BIT_SHIFT;

drivers/video/fbdev/sis/init301.c

7569

SiS_ShiftXPos(struct SiS_Private *SiS_Pr, int shift)

drivers/video/fbdev/sis/init301.c

7575

temp = (unsigned short)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift);

drivers/video/fbdev/sis/init301.c

7579

temp = (unsigned short)((int)(temp) + shift);

drivers/video/fbdev/sis/init301.c

7583

temp = (unsigned short)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift);

drivers/video/fbdev/tgafb.c

430

int delta = f - (TGA_PLL_BASE_FREQ * (X)) / (r << shift); \

drivers/video/fbdev/tgafb.c

441

int n, shift, base, min_diff, target;

drivers/video/fbdev/tgafb.c

451

shift = 0;

drivers/video/fbdev/tgafb.c

453

shift = 1;

drivers/video/fbdev/tgafb.c

455

shift = 2;

drivers/video/fbdev/tgafb.c

457

TGA_WRITE_REG(par, shift & 1, TGA_CLOCK_REG);

drivers/video/fbdev/tgafb.c

458

TGA_WRITE_REG(par, shift >> 1, TGA_CLOCK_REG);

drivers/video/fbdev/tgafb.c

483

target = (f << shift) / TGA_PLL_BASE_FREQ;

drivers/video/fbdev/tgafb.c

636

unsigned long rincr, line_length, shift, pos, is8bpp;

drivers/video/fbdev/tgafb.c

691

shift = pos & 3;

drivers/video/fbdev/tgafb.c

695

shift = (pos & 7) >> 2;

drivers/video/fbdev/tgafb.c

707

if (width + shift <= 32) {

drivers/video/fbdev/tgafb.c

715

pixelmask <<= shift;

drivers/video/fbdev/tgafb.c

729

__raw_writel(mask << shift, fb_base + pos);

drivers/video/fbdev/tgafb.c

736

} else if (shift == 0) {

drivers/video/fbdev/tgafb.c

796

pixelmask = 0xffff << shift;

drivers/video/fbdev/tgafb.c

806

mask <<= shift;

drivers/video/fbdev/tgafb.c

814

pixelmask = ((1ul << (width & 15)) - 1) << shift;

drivers/video/fbdev/tgafb.c

827

mask <<= shift;

drivers/video/fbdev/tridentfb.c

842

unsigned char shift = !is_oldclock(par->chip_id) ? 2 : 1;

drivers/video/fbdev/tridentfb.c

845

for (k = shift; k >= 0; k--)

drivers/video/fbdev/tridentfb.c

847

n = ((m + 2) << shift) - 8;

drivers/video/fbdev/uvesafb.c

1000

entry.green = green >> shift;

drivers/video/fbdev/uvesafb.c

1001

entry.blue = blue >> shift;

drivers/video/fbdev/uvesafb.c

1041

int shift = 16 - dac_width;

drivers/video/fbdev/uvesafb.c

1054

entries[i].red = cmap->red[i] >> shift;

drivers/video/fbdev/uvesafb.c

1055

entries[i].green = cmap->green[i] >> shift;

drivers/video/fbdev/uvesafb.c

1056

entries[i].blue = cmap->blue[i] >> shift;

drivers/video/fbdev/uvesafb.c

992

int shift = 16 - dac_width;

drivers/video/fbdev/uvesafb.c

999

entry.red = red >> shift;

drivers/video/fbdev/vesafb.c

101

outb_p(red >> shift, dac_val);

drivers/video/fbdev/vesafb.c

102

outb_p(green >> shift, dac_val);

drivers/video/fbdev/vesafb.c

103

outb_p(blue >> shift, dac_val);

drivers/video/fbdev/vesafb.c

114

entry.red = red >> shift;

drivers/video/fbdev/vesafb.c

115

entry.green = green >> shift;

drivers/video/fbdev/vesafb.c

116

entry.blue = blue >> shift;

drivers/video/fbdev/vesafb.c

93

int shift = 16 - depth;

drivers/video/fbdev/vga16fb.c

337

int shift;

drivers/video/fbdev/vga16fb.c

347

shift = 3;

drivers/video/fbdev/vga16fb.c

352

shift = 3;

drivers/video/fbdev/vga16fb.c

359

shift = 2;

drivers/video/fbdev/vga16fb.c

389

xres >>= shift;

drivers/video/fbdev/vga16fb.c

390

right >>= shift;

drivers/video/fbdev/vga16fb.c

391

hslen >>= shift;

drivers/video/fbdev/vga16fb.c

392

left >>= shift;

drivers/video/fbdev/vga16fb.c

393

vxres >>= shift;

drivers/video/fbdev/vga16fb.c

468

pos = yoffset * vxres + (xoffset >> shift);

fs/adfs/adfs.h

191

static inline __u32 signed_asl(__u32 val, signed int shift)

fs/adfs/adfs.h

193

if (shift >= 0)

fs/adfs/adfs.h

194

val <<= shift;

fs/adfs/adfs.h

196

val >>= -shift;

fs/btrfs/compression.c

1321

static u8 get4bits(u64 num, int shift) {

fs/btrfs/compression.c

1324

num >>= shift;

fs/btrfs/compression.c

1348

int shift;

fs/btrfs/compression.c

1365

shift = 0;

fs/btrfs/compression.c

1366

while (shift < bitlen) {

fs/btrfs/compression.c

1371

addr = get4bits(buf_num, shift);

fs/btrfs/compression.c

1380

addr = get4bits(buf_num, shift);

fs/btrfs/compression.c

1386

shift += RADIX_BASE;

fs/btrfs/compression.c

1398

addr = get4bits(buf_num, shift);

fs/btrfs/compression.c

1407

addr = get4bits(buf_num, shift);

fs/btrfs/compression.c

1413

shift += RADIX_BASE;

fs/btrfs/zoned.c

1056

const u8 shift = zinfo->zone_size_shift;

fs/btrfs/zoned.c

1057

u64 nzones = num_bytes >> shift;

fs/btrfs/zoned.c

1069

begin = pos >> shift;

fs/btrfs/zoned.c

1087

sb_zone = sb_zone_number(shift, i);

fs/btrfs/zoned.c

1176

const u8 shift = zinfo->zone_size_shift;

fs/btrfs/zoned.c

1177

unsigned long begin = start >> shift;

fs/btrfs/zoned.c

1178

unsigned long nbits = size >> shift;

fs/btrfs/zoned.c

1210

rcu_dereference(device->name), device->devid, pos >> shift);

fs/btrfs/zoned.c

166

static inline u32 sb_zone_number(int shift, int mirror)

fs/btrfs/zoned.c

173

case 1: zone = 1ULL << (BTRFS_SB_LOG_FIRST_SHIFT - shift); break;

fs/btrfs/zoned.c

174

case 2: zone = 1ULL << (BTRFS_SB_LOG_SECOND_SHIFT - shift); break;

fs/dcache.c

3264

runtime_const_init(shift, d_hash_shift);

fs/dcache.c

3296

runtime_const_init(shift, d_hash_shift);

fs/ext4/extents.c

5275

ext4_ext_shift_path_extents(struct ext4_ext_path *path, ext4_lblk_t shift,

fs/ext4/extents.c

5316

-shift);

fs/ext4/extents.c

5327

le32_add_cpu(&ex_last->ee_block, shift);

fs/ext4/extents.c

5347

le32_add_cpu(&path[depth].p_idx->ei_block, -shift);

fs/ext4/extents.c

5349

le32_add_cpu(&path[depth].p_idx->ei_block, shift);

fs/ext4/extents.c

5374

ext4_lblk_t start, ext4_lblk_t shift,

fs/ext4/extents.c

5417

if ((start == ex_start && shift > ex_start) ||

fs/ext4/extents.c

5418

(shift > start - ex_end)) {

fs/ext4/extents.c

5423

if (shift > EXT_MAX_BLOCKS -

fs/ext4/extents.c

5498

ret = ext4_ext_shift_path_extents(path, shift, inode,

fs/ext4/xattr.c

2794

goto shift;

fs/ext4/xattr.c

2844

shift:

fs/f2fs/segment.c

38

int shift = 24, idx = 0;

fs/f2fs/segment.c

41

shift = 56;

fs/f2fs/segment.c

43

while (shift >= 0) {

fs/f2fs/segment.c

44

tmp |= (unsigned long)str[idx++] << shift;

fs/f2fs/segment.c

45

shift -= BITS_PER_BYTE;

fs/gfs2/bmap.c

2265

unsigned int shift = sdp->sd_sb.sb_bsize_shift;

fs/gfs2/bmap.c

2271

lblock_stop = i_size_read(jd->jd_inode) >> shift;

fs/gfs2/bmap.c

2272

size = (lblock_stop - lblock) << shift;

fs/gfs2/bmap.c

2283

rc = gfs2_add_jextent(jd, lblock, bh.b_blocknr, bh.b_size >> shift);

fs/gfs2/bmap.c

2321

unsigned int shift;

fs/gfs2/bmap.c

2334

shift = sdp->sd_sb.sb_bsize_shift;

fs/gfs2/bmap.c

2336

end_of_file = (i_size_read(&ip->i_inode) + sdp->sd_sb.sb_bsize - 1) >> shift;

fs/gfs2/bmap.c

2337

lblock = offset >> shift;

fs/gfs2/bmap.c

2338

lblock_stop = (offset + len + sdp->sd_sb.sb_bsize - 1) >> shift;

fs/gfs2/bmap.c

2342

size = (lblock_stop - lblock) << shift;

fs/gfs2/lops.c

511

unsigned int shift = PAGE_SHIFT - bsize_shift;

fs/gfs2/lops.c

531

block >> shift);

fs/gfs2/lops.c

575

gfs2_jhead_process_page(jd, blocks_read >> shift, head, &done);

fs/gfs2/lops.c

586

gfs2_jhead_process_page(jd, blocks_read >> shift, head, &done);

fs/gfs2/meta_io.c

132

unsigned int shift;

fs/gfs2/meta_io.c

139

shift = PAGE_SHIFT - sdp->sd_sb.sb_bsize_shift;

fs/gfs2/meta_io.c

140

index = blkno >> shift; /* convert block to page */

fs/gfs2/meta_io.c

141

bufnum = blkno - (index << shift); /* block buf index within page */

fs/gfs2/meta_io.c

416

unsigned int shift = PAGE_SHIFT - sdp->sd_sb.sb_bsize_shift;

fs/gfs2/meta_io.c

417

unsigned long index = blkno >> shift; /* convert block to page */

fs/gfs2/meta_io.c

418

unsigned int bufnum = blkno - (index << shift);

fs/jbd2/revoke.c

220

int shift = 0;

fs/jbd2/revoke.c

229

shift++;

fs/jbd2/revoke.c

232

table->hash_shift = shift;

fs/nls/nls_base.c

106

c = t->shift;

fs/nls/nls_base.c

31

int shift;

fs/ntfs3/attrib.c

216

u8 shift = sbi->cluster_bits - SECTOR_SHIFT;

fs/ntfs3/attrib.c

219

(sector_t)lcn << shift,

fs/ntfs3/attrib.c

220

(sector_t)flen << shift,

fs/ntfs3/attrib.c

285

u8 shift = sbi->cluster_bits + NTFS_LZNT_CUNIT;

fs/ntfs3/attrib.c

286

len = ((rsize + (1u << shift) - 1) >> shift) << NTFS_LZNT_CUNIT;

fs/ocfs2/alloc.c

1533

int ret, shift;

fs/ocfs2/alloc.c

1540

shift = ocfs2_find_branch_target(et, &bh);

fs/ocfs2/alloc.c

1541

if (shift < 0) {

fs/ocfs2/alloc.c

1542

ret = shift;

fs/ocfs2/alloc.c

1550

if (shift) {

fs/squashfs/file.c

579

unsigned short shift = msblk->block_log - PAGE_SHIFT;

fs/squashfs/file.c

587

unsigned int max_pages = 1UL << shift;

fs/ufs/inode.c

131

int shift = uspi->s_apbshift-uspi->s_fpbshift;

fs/ufs/inode.c

160

fs32_to_cpu(sb, q->key32) + (n>>shift));

fs/ufs/inode.c

184

fs64_to_cpu(sb, q->key64) + (n>>shift));

fs/ufs/inode.c

319

int shift = uspi->s_apbshift - uspi->s_fpbshift;

fs/ufs/inode.c

327

bh = sb_bread(sb, ind_block + (index >> shift));

fs/xfs/libxfs/xfs_bmap.c

5495

xfs_fileoff_t shift) /* shift fsb */

fs/xfs/libxfs/xfs_bmap.c

5499

startoff = got->br_startoff - shift;

fs/xfs/libxfs/xfs_bmap.c

5529

xfs_fileoff_t shift, /* shift fsb */

fs/xfs/libxfs/xfs_bmap.c

5545

ASSERT(xfs_bmse_can_merge(ip, whichfork, left, got, shift));

fs/xfs/libxfs/xfs_bmap.c

5748

xfs_fileoff_t shift)

fs/xfs/libxfs/xfs_bmap.c

5762

((got.br_startoff + shift) & BMBT_STARTOFF_MASK) < got.br_startoff)

fs/xfs/libxfs/xfs_bmap.h

220

xfs_fileoff_t shift);

fs/xfs/xfs_iomap.c

406

int shift = 0;

fs/xfs/xfs_iomap.c

428

shift = 2;

fs/xfs/xfs_iomap.c

430

shift += 2;

fs/xfs/xfs_iomap.c

432

shift += 2;

fs/xfs/xfs_iomap.c

439

if ((freesp >> shift) < (*qblocks >> *qshift)) {

fs/xfs/xfs_iomap.c

441

*qshift = shift;

fs/xfs/xfs_iomap.c

450

int *shift)

fs/xfs/xfs_iomap.c

456

*shift = 2;

fs/xfs/xfs_iomap.c

458

(*shift)++;

fs/xfs/xfs_iomap.c

460

(*shift)++;

fs/xfs/xfs_iomap.c

462

(*shift)++;

fs/xfs/xfs_iomap.c

464

(*shift)++;

fs/xfs/xfs_iomap.c

492

int shift = 0;

fs/xfs/xfs_iomap.c

554

mp->m_low_rtexts, &shift));

fs/xfs/xfs_iomap.c

557

&shift);

fs/xfs/xfs_iomap.c

581

shift = max(shift, qshift);

fs/xfs/xfs_iomap.c

583

if (shift)

fs/xfs/xfs_iomap.c

584

alloc_blocks >>= shift;

fs/xfs/xfs_iomap.c

604

trace_xfs_iomap_prealloc_size(ip, alloc_blocks, shift,

fs/xfs/xfs_trace.h

1174

TP_PROTO(struct xfs_inode *ip, xfs_fsblock_t blocks, int shift,

fs/xfs/xfs_trace.h

1176

TP_ARGS(ip, blocks, shift, writeio_blocks),

fs/xfs/xfs_trace.h

1181

__field(int, shift)

fs/xfs/xfs_trace.h

1188

__entry->shift = shift;

fs/xfs/xfs_trace.h

1194

__entry->blocks, __entry->shift, __entry->writeio_blocks)

fs/zonefs/super.c

594

long fno = 0, shift = 1;

fs/zonefs/super.c

616

fno += (c - '0') * shift;

fs/zonefs/super.c

617

shift *= 10;

include/asm-generic/vmlinux.lds.h

975

RUNTIME_CONST(shift, d_hash_shift) \

include/clocksource/timer-riscv.h

14

extern void riscv_cs_get_mult_shift(u32 *mult, u32 *shift);

include/drm/drm_fixed.h

123

unsigned shift, sign = (a >> 63) & 1;

include/drm/drm_fixed.h

125

for (shift = 62; shift > 0; --shift)

include/drm/drm_fixed.h

126

if (((a >> shift) & 1) != sign)

include/drm/drm_fixed.h

127

return shift;

include/drm/drm_fixed.h

134

unsigned shift = drm_fixp_msbset(a) + drm_fixp_msbset(b);

include/drm/drm_fixed.h

137

if (shift > 61) {

include/drm/drm_fixed.h

138

shift = shift - 61;

include/drm/drm_fixed.h

139

a >>= (shift >> 1) + (shift & 1);

include/drm/drm_fixed.h

140

b >>= shift >> 1;

include/drm/drm_fixed.h

142

shift = 0;

include/drm/drm_fixed.h

146

if (shift > DRM_FIXED_POINT)

include/drm/drm_fixed.h

147

return result << (shift - DRM_FIXED_POINT);

include/drm/drm_fixed.h

149

if (shift < DRM_FIXED_POINT)

include/drm/drm_fixed.h

150

return result >> (DRM_FIXED_POINT - shift);

include/drm/drm_fixed.h

157

unsigned shift = 62 - drm_fixp_msbset(a);

include/drm/drm_fixed.h

160

a <<= shift;

include/drm/drm_fixed.h

162

if (shift < DRM_FIXED_POINT)

include/drm/drm_fixed.h

163

b >>= (DRM_FIXED_POINT - shift);

include/drm/drm_fixed.h

167

if (shift > DRM_FIXED_POINT)

include/drm/drm_fixed.h

168

return result >> (shift - DRM_FIXED_POINT);

include/linux/badblocks.h

35

int shift; /* shift from sectors to block size

include/linux/bitmap.h

160

unsigned int shift, unsigned int nbits);

include/linux/bitmap.h

162

unsigned int shift, unsigned int nbits);

include/linux/bitmap.h

516

unsigned int shift, unsigned int nbits)

include/linux/bitmap.h

519

*dst = (*src & BITMAP_LAST_WORD_MASK(nbits)) >> shift;

include/linux/bitmap.h

521

__bitmap_shift_right(dst, src, shift, nbits);

include/linux/bitmap.h

526

unsigned int shift, unsigned int nbits)

include/linux/bitmap.h

529

*dst = (*src << shift) & BITMAP_LAST_WORD_MASK(nbits);

include/linux/bitmap.h

531

__bitmap_shift_left(dst, src, shift, nbits);

include/linux/bitops.h

104

static inline __u64 rol64(__u64 word, unsigned int shift)

include/linux/bitops.h

106

return (word << (shift & 63)) | (word >> ((-shift) & 63));

include/linux/bitops.h

114

static inline __u64 ror64(__u64 word, unsigned int shift)

include/linux/bitops.h

116

return (word >> (shift & 63)) | (word << ((-shift) & 63));

include/linux/bitops.h

124

static inline __u32 rol32(__u32 word, unsigned int shift)

include/linux/bitops.h

126

return (word << (shift & 31)) | (word >> ((-shift) & 31));

include/linux/bitops.h

134

static inline __u32 ror32(__u32 word, unsigned int shift)

include/linux/bitops.h

136

return (word >> (shift & 31)) | (word << ((-shift) & 31));

include/linux/bitops.h

144

static inline __u16 rol16(__u16 word, unsigned int shift)

include/linux/bitops.h

146

return (word << (shift & 15)) | (word >> ((-shift) & 15));

include/linux/bitops.h

154

static inline __u16 ror16(__u16 word, unsigned int shift)

include/linux/bitops.h

156

return (word >> (shift & 15)) | (word << ((-shift) & 15));

include/linux/bitops.h

164

static inline __u8 rol8(__u8 word, unsigned int shift)

include/linux/bitops.h

166

return (word << (shift & 7)) | (word >> ((-shift) & 7));

include/linux/bitops.h

174

static inline __u8 ror8(__u8 word, unsigned int shift)

include/linux/bitops.h

176

return (word >> (shift & 7)) | (word << ((-shift) & 7));

include/linux/bitops.h

188

__u8 shift = 31 - index;

include/linux/bitops.h

189

return (__s32)(value << shift) >> shift;

include/linux/bitops.h

199

__u8 shift = 63 - index;

include/linux/bitops.h

200

return (__s64)(value << shift) >> shift;

include/linux/clk-provider.h

1009

u8 shift;

include/linux/clk-provider.h

1031

unsigned long flags, void __iomem *reg, u8 shift, u32 mask,

include/linux/clk-provider.h

1038

unsigned long flags, void __iomem *reg, u8 shift, u32 mask,

include/linux/clk-provider.h

1042

unsigned long flags, void __iomem *reg, u8 shift, u32 mask,

include/linux/clk-provider.h

1046

shift, width, clk_mux_flags, lock) \

include/linux/clk-provider.h

1048

(flags), (reg), (shift), BIT((width)) - 1, \

include/linux/clk-provider.h

1051

flags, reg, shift, mask, clk_mux_flags, \

include/linux/clk-provider.h

1055

(shift), (mask), (clk_mux_flags), (table), \

include/linux/clk-provider.h

1058

num_parents, flags, reg, shift, mask, \

include/linux/clk-provider.h

1062

(shift), (mask), (clk_mux_flags), (table), \

include/linux/clk-provider.h

1065

shift, width, clk_mux_flags, lock) \

include/linux/clk-provider.h

1068

(shift), BIT((width)) - 1, (clk_mux_flags), \

include/linux/clk-provider.h

1071

reg, shift, width, clk_mux_flags, lock) \

include/linux/clk-provider.h

1073

(parent_hws), NULL, (flags), (reg), (shift), \

include/linux/clk-provider.h

1076

flags, reg, shift, width, \

include/linux/clk-provider.h

1079

(parent_data), (flags), (reg), (shift), \

include/linux/clk-provider.h

1082

num_parents, flags, reg, shift, \

include/linux/clk-provider.h

1086

(parent_data), (flags), (reg), (shift), \

include/linux/clk-provider.h

1089

shift, width, clk_mux_flags, lock) \

include/linux/clk-provider.h

1092

(shift), BIT((width)) - 1, (clk_mux_flags), \

include/linux/clk-provider.h

1095

num_parents, flags, reg, shift, \

include/linux/clk-provider.h

1099

(shift), BIT((width)) - 1, \

include/linux/clk-provider.h

1102

num_parents, flags, reg, shift, \

include/linux/clk-provider.h

1106

NULL, (parent_data), (flags), (reg), (shift), \

include/linux/clk-provider.h

1274

u8 shift;

include/linux/clk-provider.h

716

u8 shift;

include/linux/clk-provider.h

764

void __iomem *reg, u8 shift, u8 width,

include/linux/clk-provider.h

771

void __iomem *reg, u8 shift, u8 width,

include/linux/clk-provider.h

776

void __iomem *reg, u8 shift, u8 width,

include/linux/clk-provider.h

791

#define clk_register_divider(dev, name, parent_name, flags, reg, shift, width, \

include/linux/clk-provider.h

794

(reg), (shift), (width), \

include/linux/clk-provider.h

808

#define clk_hw_register_divider(dev, name, parent_name, flags, reg, shift, \

include/linux/clk-provider.h

811

NULL, (flags), (reg), (shift), (width), \

include/linux/clk-provider.h

827

shift, width, clk_divider_flags, \

include/linux/clk-provider.h

830

NULL, (flags), (reg), (shift), (width), \

include/linux/clk-provider.h

846

reg, shift, width, \

include/linux/clk-provider.h

849

(parent_data), (flags), (reg), (shift), \

include/linux/clk-provider.h

866

shift, width, clk_divider_flags, table, \

include/linux/clk-provider.h

869

NULL, (flags), (reg), (shift), (width), \

include/linux/clk-provider.h

886

reg, shift, width, \

include/linux/clk-provider.h

890

NULL, (flags), (reg), (shift), (width), \

include/linux/clk-provider.h

907

flags, reg, shift, width, \

include/linux/clk-provider.h

911

(parent_data), (flags), (reg), (shift), \

include/linux/clk-provider.h

926

#define devm_clk_hw_register_divider(dev, name, parent_name, flags, reg, shift, \

include/linux/clk-provider.h

929

NULL, (flags), (reg), (shift), (width), \

include/linux/clk-provider.h

944

reg, shift, width, \

include/linux/clk-provider.h

948

(shift), (width), (clk_divider_flags), \

include/linux/clk-provider.h

965

reg, shift, width, \

include/linux/clk-provider.h

968

NULL, NULL, (flags), (reg), (shift), \

include/linux/clockchips.h

108

u32 shift;

include/linux/clockchips.h

172

div_sc(unsigned long ticks, unsigned long nsec, int shift)

include/linux/clockchips.h

174

u64 tmp = ((u64)ticks) << shift;

include/linux/clockchips.h

195

return clocks_calc_mult_shift(&ce->mult, &ce->shift, NSEC_PER_SEC, freq, maxsec);

include/linux/clocksource.h

105

u32 shift;

include/linux/clocksource.h

212

static inline s64 clocksource_cyc2ns(u64 cycles, u32 mult, u32 shift)

include/linux/clocksource.h

214

return ((u64) cycles * mult) >> shift;

include/linux/clocksource.h

229

clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cycles);

include/linux/clocksource.h

231

clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);

include/linux/fsl/guts.h

158

unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));

include/linux/fsl/guts.h

160

clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift);

include/linux/fsl/guts.h

195

unsigned int shift = 2 * (co + 1) - (ch & 1) - 1;

include/linux/fsl/guts.h

197

clrsetbits_be32(&guts->pmuxcr, 1 << shift, value << shift);

include/linux/generic-radix-tree.h

190

unsigned shift = genradix_depth_shift(level);

include/linux/generic-radix-tree.h

195

while (n && shift > GENRADIX_NODE_SHIFT) {

include/linux/generic-radix-tree.h

196

shift -= GENRADIX_ARY_SHIFT;

include/linux/generic-radix-tree.h

197

n = n->children[offset >> shift];

include/linux/generic-radix-tree.h

198

offset &= (1UL << shift) - 1;

include/linux/hisi_acc_qm.h

293

u32 shift;

include/linux/host1x.h

263

unsigned long shift;

include/linux/hugetlb.h

842

static inline pte_t arch_make_huge_pte(pte_t entry, unsigned int shift,

include/linux/iio/common/st_sensors.h

66

.shift = sbits - rbits, \

include/linux/iio/iio.h

195

u8 shift;

include/linux/iommu-helper.h

21

unsigned long shift, unsigned long boundary_size)

include/linux/iommu-helper.h

25

shift = (shift + index) & (boundary_size - 1);

include/linux/iommu-helper.h

26

return shift + nr > boundary_size;

include/linux/iommu-helper.h

31

unsigned long shift,

include/linux/keyboard.h

14

int shift; /* Current shift mask */

include/linux/math64.h

175

static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift)

include/linux/math64.h

177

return (u64)(((unsigned __int128)a * mul) >> shift);

include/linux/math64.h

182

static __always_inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift)

include/linux/math64.h

184

return (u64)(((unsigned __int128)a * mul) >> shift);

include/linux/math64.h

191

static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift)

include/linux/math64.h

196

ret = mul_u32_u32(al, mul) >> shift;

include/linux/math64.h

198

ret += mul_u32_u32(ah, mul) << (32 - shift);

include/linux/math64.h

204

static inline u64 mul_u64_u64_shr(u64 a, u64 b, unsigned int shift)

include/linux/math64.h

239

if (shift == 0)

include/linux/math64.h

241

if (shift < 64)

include/linux/math64.h

242

return (rl.ll >> shift) | (rh.ll << (64 - shift));

include/linux/math64.h

243

return rh.ll >> (shift & 63);

include/linux/math64.h

250

static inline u64 mul_s64_u64_shr(s64 a, u64 b, unsigned int shift)

include/linux/math64.h

258

ret = mul_u64_u64_shr(abs(a), b, shift);

include/linux/mfd/lp3943.h

83

u8 shift;

include/linux/mfd/syscon/atmel-smc.h

100

unsigned int shift,

include/linux/mfd/syscon/atmel-smc.h

103

unsigned int shift, unsigned int ncycles);

include/linux/mfd/syscon/atmel-smc.h

105

unsigned int shift, unsigned int ncycles);

include/linux/mfd/syscon/atmel-smc.h

107

unsigned int shift, unsigned int ncycles);

include/linux/netfilter/nf_conntrack_sip.h

70

int *shift);

include/linux/pagemap.h

726

unsigned int shift = ilog2(size);

include/linux/pagemap.h

728

if (shift <= PAGE_SHIFT)

include/linux/pagemap.h

731

return shift - PAGE_SHIFT;

include/linux/platform_data/txx9/ndfmc.h

15

unsigned int shift;

include/linux/sbitmap.h

170

int sbitmap_init_node(struct sbitmap *sb, unsigned int depth, int shift,

include/linux/sbitmap.h

177

return sb->depth - (index << sb->shift);

include/linux/sbitmap.h

178

return 1U << sb->shift;

include/linux/sbitmap.h

220

#define SB_NR_TO_INDEX(sb, bitnr) ((bitnr) >> (sb)->shift)

include/linux/sbitmap.h

221

#define SB_NR_TO_BIT(sb, bitnr) ((bitnr) & ((1U << (sb)->shift) - 1U))

include/linux/sbitmap.h

269

if (!fn(sb, (index << sb->shift) + nr, data))

include/linux/sbitmap.h

343

int shift = ilog2(BITS_PER_LONG);

include/linux/sbitmap.h

352

while ((4U << shift) > depth)

include/linux/sbitmap.h

353

shift--;

include/linux/sbitmap.h

356

return shift;

include/linux/sbitmap.h

402

int shift, bool round_robin, gfp_t flags, int node);

include/linux/sbitmap.h

61

unsigned int shift;

include/linux/sched/loadavg.h

16

extern void get_avenrun(unsigned long *loads, unsigned long offset, int shift);

include/linux/sched_clock.h

33

u32 shift;

include/linux/smsc911x.h

20

unsigned int shift;

include/linux/t10-pi.h

42

unsigned int shift = ilog2(queue_logical_block_size(rq->q));

include/linux/t10-pi.h

46

shift = rq->q->limits.integrity.interval_exp;

include/linux/t10-pi.h

47

return blk_rq_pos(rq) >> (shift - SECTOR_SHIFT) & 0xffffffff;

include/linux/t10-pi.h

67

unsigned int shift = ilog2(queue_logical_block_size(rq->q));

include/linux/t10-pi.h

71

shift = rq->q->limits.integrity.interval_exp;

include/linux/t10-pi.h

72

return lower_48_bits(blk_rq_pos(rq) >> (shift - SECTOR_SHIFT));

include/linux/time32.h

41

s32 shift;

include/linux/timecounter.h

124

return ((cycles * cc->mult) - frac) >> cc->shift;

include/linux/timecounter.h

34

u32 shift;

include/linux/timecounter.h

79

return ns >> cc->shift;

include/linux/timekeeper_internal.h

55

u32 shift;

include/linux/tnum.h

34

struct tnum tnum_lshift(struct tnum a, u8 shift);

include/linux/tnum.h

36

struct tnum tnum_rshift(struct tnum a, u8 shift);

include/linux/xarray.h

1169

unsigned char shift; /* Bits remaining in each slot */

include/linux/xarray.h

1375

#define __XA_STATE(array, index, shift, sibs) { \

include/linux/xarray.h

1378

.xa_shift = shift, \

include/linux/xarray.h

1623

offset = (xas->xa_index >> node->shift) & XA_CHUNK_MASK;

include/linux/xarray.h

1661

unsigned char shift = xas_is_node(xas) ? xas->xa_node->shift : 0;

include/linux/xarray.h

1664

xas->xa_offset = (index >> shift) & XA_CHUNK_MASK;

include/linux/xarray.h

1722

if (unlikely(xas_not_node(node) || node->shift ||

include/linux/xarray.h

1781

if (unlikely(xas_not_node(node) || node->shift))

include/linux/xarray.h

1877

if (unlikely(xas_not_node(node) || node->shift ||

include/linux/xarray.h

1906

if (unlikely(xas_not_node(node) || node->shift ||

include/net/red.h

294

int shift;

include/net/red.h

316

shift = p->Stab[(us_idle >> p->Scell_log) & RED_STAB_MASK];

include/net/red.h

318

if (shift)

include/net/red.h

319

return v->qavg >> shift;

include/net/sch_generic.h

1374

u8 shift;

include/net/sch_generic.h

1386

return ((u64)(DIV_ROUND_UP(len,48)*53) * r->mult) >> r->shift;

include/net/sch_generic.h

1388

return ((u64)len * r->mult) >> r->shift;

include/net/sch_generic.h

1414

u8 shift;

include/net/sch_generic.h

1420

return ((u64)pkt_num * r->mult) >> r->shift;

include/net/tcp.h

341

bool tcp_check_oom(const struct sock *sk, int shift);

include/rdma/rdmavt_mr.h

54

u32 shift; /* lkey/rkey shift */

include/rdma/rdmavt_qp.h

726

static inline void rvt_mod_retry_timer_ext(struct rvt_qp *qp, u8 shift)

include/rdma/rdmavt_qp.h

735

(qp->timeout_jiffies << shift));

include/rdma/rdmavt_qp.h

881

void rvt_add_retry_timer_ext(struct rvt_qp *qp, u8 shift);

include/scsi/scsi_cmnd.h

230

unsigned int shift = ilog2(scmd->device->sector_size) - SECTOR_SHIFT;

include/scsi/scsi_cmnd.h

232

return blk_rq_pos(scsi_cmd_to_rq(scmd)) >> shift;

include/scsi/scsi_cmnd.h

237

unsigned int shift = ilog2(scmd->device->sector_size);

include/scsi/scsi_cmnd.h

239

return blk_rq_bytes(scsi_cmd_to_rq(scmd)) >> shift;

include/soc/tegra/mc.h

55

unsigned int shift;

include/sound/cs35l41.h

823

u8 shift;

include/sound/sb.h

329

#define SB_MIXVAL_SINGLE(reg, shift, mask) \

include/sound/sb.h

330

((reg) | ((shift) << 16) | ((mask) << 24))

include/sound/sb.h

343

#define SB_SINGLE(xname, reg, shift, mask) \

include/sound/sb.h

346

.private_value = SB_MIXVAL_SINGLE(reg, shift, mask) }

include/sound/soc-dapm.h

306

.reg = wreg, .shift = wshift, .mask = wmask, \

include/sound/soc-dapm.h

316

.reg = SND_SOC_NOPM, .shift = wdelay, .event = snd_soc_dapm_regulator_event, \

include/sound/soc-dapm.h

333

#define SOC_DAPM_DOUBLE_R(xname, lreg, rreg, shift, max, invert) \

include/sound/soc-dapm.h

334

SOC_DOUBLE_R_EXT(xname, lreg, rreg, shift, max, invert, \

include/sound/soc-dapm.h

336

#define SOC_DAPM_SINGLE(xname, reg, shift, max, invert) \

include/sound/soc-dapm.h

337

SOC_SINGLE_EXT(xname, reg, shift, max, invert, \

include/sound/soc-dapm.h

341

#define SOC_DAPM_DOUBLE_R_TLV(xname, lreg, rreg, shift, max, invert, tlv_array) \

include/sound/soc-dapm.h

342

SOC_DOUBLE_R_EXT_TLV(xname, lreg, rreg, shift, max, invert, \

include/sound/soc-dapm.h

345

#define SOC_DAPM_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \

include/sound/soc-dapm.h

346

SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \

include/sound/soc-dapm.h

357

#define SOC_DAPM_SINGLE_AUTODISABLE(xname, reg, shift, max, invert) \

include/sound/soc-dapm.h

361

.private_value = SOC_SINGLE_VALUE(reg, shift, 0, max, invert, 1) }

include/sound/soc-dapm.h

362

#define SOC_DAPM_SINGLE_TLV_AUTODISABLE(xname, reg, shift, max, invert, tlv_array) \

include/sound/soc-dapm.h

368

.private_value = SOC_SINGLE_VALUE(reg, shift, 0, max, invert, 1) }

include/sound/soc-dapm.h

529

unsigned char shift; /* bits to shift */

include/sound/soc-dapm.h

90

.reg = wreg, .mask = 1, .shift = wshift, \

include/sound/soc.h

1237

unsigned int shift, rshift;

include/sound/soc.h

1289

if (mc->reg == mc->rreg && mc->shift == mc->rshift)

include/sound/soc.h

45

{.reg = xreg, .rreg = xreg, .shift = shift_left, \

include/sound/soc.h

55

{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \

include/sound/soc.h

61

#define SOC_SINGLE(xname, reg, shift, max, invert) \

include/sound/soc.h

65

.private_value = SOC_SINGLE_VALUE(reg, shift, 0, max, invert, 0) }

include/sound/soc.h

71

#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \

include/sound/soc.h

78

.private_value = SOC_SINGLE_VALUE(reg, shift, 0, max, invert, 0) }

include/sound/wss.h

162

#define WSS_SINGLE(xname, xindex, reg, shift, mask, invert) \

include/sound/wss.h

169

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

include/sound/wss.h

188

#define WSS_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \

include/sound/wss.h

196

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \

include/uapi/drm/msm_drm.h

252

__s32 shift; /* in, amount of left shift (can be negative) */

include/uapi/drm/tegra_drm.h

346

__u32 shift;

include/uapi/drm/tegra_drm.h

828

__u32 shift;

include/uapi/linux/media/raspberrypi/pisp_fe_config.h

127

__u8 shift;

include/uapi/linux/media/raspberrypi/pisp_fe_config.h

164

__u8 shift;

include/uapi/linux/tc_act/tc_pedit.h

58

__u32 shift;

include/uapi/linux/tc_ematch/tc_em_meta.h

19

__u8 shift;

include/uapi/linux/timex.h

121

int shift; /* interval duration (s) (shift) (ro) */

include/uapi/linux/timex.h

82

int shift; /* interval duration (s) (shift) (ro) */

include/uapi/rdma/mlx5-abi.h

482

__u32 shift;

include/uapi/sound/asoc.h

268

__le32 shift;

include/uapi/sound/asoc.h

487

__le32 shift; /* bits to shift */

include/vdso/datapage.h

110

u32 shift;

include/vdso/math64.h

27

static __always_inline u64 mul_u64_u32_add_u64_shr(u64 a, u32 mul, u64 b, unsigned int shift)

include/vdso/math64.h

29

return (u64)((((unsigned __int128)a * mul) + b) >> shift);

include/vdso/math64.h

43

static __always_inline u64 mul_u64_u32_add_u64_shr(u64 a, u32 mul, u64 b, unsigned int shift)

include/vdso/math64.h

50

ret >>= shift;

include/vdso/math64.h

51

if (ovf && shift)

include/vdso/math64.h

52

ret += 1ULL << (64 - shift);

include/vdso/math64.h

54

ret += mul_u32_u32(ah, mul) << (32 - shift);

io_uring/rsrc.c

1383

unsigned shift = imu->folio_shift;

io_uring/rsrc.c

1388

max_segs += (iov[i].iov_len >> shift) + 2;

io_uring/zcrx.c

62

unsigned shift = -1U;

io_uring/zcrx.c

66

shift = min(shift, __ffs(sg->length));

io_uring/zcrx.c

67

return shift;

kernel/bpf/tnum.c

38

struct tnum tnum_lshift(struct tnum a, u8 shift)

kernel/bpf/tnum.c

40

return TNUM(a.value << shift, a.mask << shift);

kernel/bpf/tnum.c

43

struct tnum tnum_rshift(struct tnum a, u8 shift)

kernel/bpf/tnum.c

45

return TNUM(a.value >> shift, a.mask >> shift);

kernel/bpf/verifier.c

22780

u8 shift = bpf_ctx_narrow_access_offset(

kernel/bpf/verifier.c

22782

if (shift && cnt + 1 >= INSN_BUF_SIZE) {

kernel/bpf/verifier.c

22787

if (shift)

kernel/bpf/verifier.c

22790

shift);

kernel/bpf/verifier.c

22794

if (shift)

kernel/bpf/verifier.c

22797

shift);

kernel/liveupdate/kexec_handover.c

1080

unsigned int align, order, shift, vm_flags;

kernel/liveupdate/kexec_handover.c

1098

shift = PAGE_SHIFT + order;

kernel/liveupdate/kexec_handover.c

1099

align = 1 << shift;

kernel/liveupdate/kexec_handover.c

1130

area = __get_vm_area_node(total_pages * PAGE_SIZE, align, shift,

kernel/liveupdate/kexec_handover.c

1139

err = vmap_pages_range(addr, addr + size, PAGE_KERNEL, pages, shift);

kernel/rcu/tasks.h

250

int shift;

kernel/rcu/tasks.h

291

shift = ilog2(rcu_task_cpu_ids / lim);

kernel/rcu/tasks.h

292

if (((rcu_task_cpu_ids - 1) >> shift) >= lim)

kernel/rcu/tasks.h

293

shift++;

kernel/rcu/tasks.h

294

WRITE_ONCE(rtp->percpu_enqueue_shift, shift);

kernel/sched/fair.c

264

int shift = WMULT_SHIFT;

kernel/sched/fair.c

271

shift -= fs;

kernel/sched/fair.c

280

shift -= fs;

kernel/sched/fair.c

284

return mul_u64_u32_shr(delta_exec, fact, shift);

kernel/sched/loadavg.c

73

void get_avenrun(unsigned long *loads, unsigned long offset, int shift)

kernel/sched/loadavg.c

75

loads[0] = (avenrun[0] + offset) << shift;

kernel/sched/loadavg.c

76

loads[1] = (avenrun[1] + offset) << shift;

kernel/sched/loadavg.c

77

loads[2] = (avenrun[2] + offset) << shift;

kernel/sched/sched.h

252

#define shr_bound(val, shift) \

kernel/sched/sched.h

253

(val >> min_t(typeof(shift), shift, BITS_PER_TYPE(typeof(val)) - 1))

kernel/sched/wait_bit.c

17

const int shift = BITS_PER_LONG == 32 ? 5 : 6;

kernel/sched/wait_bit.c

18

unsigned long val = (unsigned long)word << shift | bit;

kernel/time/clockevents.c

247

clc = ((unsigned long long) delta * dev->mult) >> dev->shift;

kernel/time/clockevents.c

286

clc = ((unsigned long long) delta * dev->mult) >> dev->shift;

kernel/time/clockevents.c

333

clc = ((unsigned long long) delta * dev->mult) >> dev->shift;

kernel/time/clockevents.c

35

u64 clc = (u64) latch << evt->shift;

kernel/time/clockevents.c

46

if ((clc >> evt->shift) != (u64)latch)

kernel/time/clockevents.c

69

(!ismax || evt->mult <= (1ULL << evt->shift)))

kernel/time/clocksource-wdtest.c

48

.shift = JIFFIES_SHIFT,

kernel/time/clocksource.c

1170

clocks_calc_mult_shift(&cs->mult, &cs->shift, freq,

kernel/time/clocksource.c

1206

cs->shift--;

kernel/time/clocksource.c

30

return clocksource_cyc2ns(delta, cs->mult, cs->shift);

kernel/time/clocksource.c

32

return mul_u64_u32_shr(delta, cs->mult, cs->shift);

kernel/time/clocksource.c

59

clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 maxsec)

kernel/time/clocksource.c

86

*shift = sft;

kernel/time/clocksource.c

951

u64 clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cyc)

kernel/time/clocksource.c

969

max_nsecs = clocksource_cyc2ns(max_cycles, mult - maxadj, shift);

kernel/time/clocksource.c

988

cs->max_idle_ns = clocks_calc_max_nsecs(cs->mult, cs->shift,

kernel/time/jiffies.c

39

.shift = JIFFIES_SHIFT,

kernel/time/ntp.c

207

txc->shift = ntpdata->pps_shift;

kernel/time/ntp.c

237

txc->shift = 0;

kernel/time/posix-timers.c

1544

unsigned int shift;

kernel/time/posix-timers.c

1557

size, 0, 0, &shift, NULL, size, size);

kernel/time/posix-timers.c

1558

size = 1UL << shift;

kernel/time/sched_clock.c

161

ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift);

kernel/time/sched_clock.c

206

ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift);

kernel/time/sched_clock.c

212

rd.shift = new_shift;

kernel/time/sched_clock.c

67

static __always_inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)

kernel/time/sched_clock.c

69

return (cyc * mult) >> shift;

kernel/time/sched_clock.c

95

res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift);

kernel/time/tick-broadcast-hrtimer.c

90

.shift = 0,

kernel/time/time.c

308

txc->shift = tx32.shift;

kernel/time/time.c

337

tx32.shift = txc->shift;

kernel/time/timecounter.c

15

tc->mask = (1ULL << cc->shift) - 1;

kernel/time/timekeeping.c

1254

if (BITS_TO_BYTES(fls64(*delta) + tkr->shift) >= sizeof(*delta))

kernel/time/timekeeping.c

1257

*delta = div_u64((*delta << tkr->shift) - tkr->xtime_nsec, tkr->mult);

kernel/time/timekeeping.c

135

.shift = 0, \

kernel/time/timekeeping.c

192

while (tk->tkr_mono.xtime_nsec >= ((u64)NSEC_PER_SEC << tk->tkr_mono.shift)) {

kernel/time/timekeeping.c

193

tk->tkr_mono.xtime_nsec -= (u64)NSEC_PER_SEC << tk->tkr_mono.shift;

kernel/time/timekeeping.c

196

while (tk->tkr_raw.xtime_nsec >= ((u64)NSEC_PER_SEC << tk->tkr_raw.shift)) {

kernel/time/timekeeping.c

197

tk->tkr_raw.xtime_nsec -= (u64)NSEC_PER_SEC << tk->tkr_raw.shift;

kernel/time/timekeeping.c

207

ts.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);

kernel/time/timekeeping.c

2221

tk->tkr_mono.shift;

kernel/time/timekeeping.c

2236

u64 nsecps = (u64)NSEC_PER_SEC << tk->tkr_mono.shift;

kernel/time/timekeeping.c

2284

u32 shift, unsigned int *clock_set)

kernel/time/timekeeping.c

2286

u64 interval = tk->cycle_interval << shift;

kernel/time/timekeeping.c

2298

tk->tkr_mono.xtime_nsec += tk->xtime_interval << shift;

kernel/time/timekeeping.c

2302

tk->tkr_raw.xtime_nsec += tk->raw_interval << shift;

kernel/time/timekeeping.c

2303

snsec_per_sec = (u64)NSEC_PER_SEC << tk->tkr_raw.shift;

kernel/time/timekeeping.c

231

tk->coarse_nsec = tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift;

kernel/time/timekeeping.c

2310

tk->ntp_error += tk->ntp_tick << shift;

kernel/time/timekeeping.c

2312

(tk->ntp_error_shift + shift);

kernel/time/timekeeping.c

2326

int shift = 0, maxshift;

kernel/time/timekeeping.c

2349

shift = ilog2(offset) - ilog2(tk->cycle_interval);

kernel/time/timekeeping.c

2350

shift = max(0, shift);

kernel/time/timekeeping.c

2353

shift = min(shift, maxshift);

kernel/time/timekeeping.c

2355

offset = logarithmic_accumulation(tk, offset, shift, &clock_set);

kernel/time/timekeeping.c

2356

if (offset < tk->cycle_interval<<shift)

kernel/time/timekeeping.c

2357

shift--;

kernel/time/timekeeping.c

237

tk->tkr_mono.xtime_nsec = (u64)ts->tv_nsec << tk->tkr_mono.shift;

kernel/time/timekeeping.c

244

tk->tkr_mono.xtime_nsec += (u64)ts->tv_nsec << tk->tkr_mono.shift;

kernel/time/timekeeping.c

327

tmp <<= clock->shift;

kernel/time/timekeeping.c

344

int shift_change = clock->shift - old_clock->shift;

kernel/time/timekeeping.c

354

tk->tkr_mono.shift = clock->shift;

kernel/time/timekeeping.c

355

tk->tkr_raw.shift = clock->shift;

kernel/time/timekeeping.c

358

tk->ntp_error_shift = NTP_SCALE_SHIFT - clock->shift;

kernel/time/timekeeping.c

375

return mul_u64_u32_add_u64_shr(delta, tkr->mult, tkr->xtime_nsec, tkr->shift);

kernel/time/timekeeping.c

394

return tkr->xtime_nsec >> tkr->shift;

kernel/time/timekeeping.c

399

return ((delta * tkr->mult) + tkr->xtime_nsec) >> tkr->shift;

kernel/time/timekeeping.c

690

nsec += (u32)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);

kernel/time/timekeeping.c

844

nsecs = tk->tkr_mono.mult >> tk->tkr_mono.shift;

kernel/time/timer_list.c

203

SEQ_printf(m, " shift: %u\n", dev->shift);

kernel/time/vsyscall.c

164

nsec = tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift;

kernel/time/vsyscall.c

167

nsec = nsec << tk->tkr_mono.shift;

kernel/time/vsyscall.c

26

vc->shift = base->shift;

kernel/time/vsyscall.c

43

nsec += ((u64)tk->wall_to_monotonic.tv_nsec << tk->tkr_mono.shift);

kernel/time/vsyscall.c

44

while (nsec >= (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {

kernel/time/vsyscall.c

45

nsec -= (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift);

kernel/time/vsyscall.c

54

nsec += (u64)tk->monotonic_to_boot.tv_nsec << tk->tkr_mono.shift;

kernel/time/vsyscall.c

60

while (nsec >= (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {

kernel/time/vsyscall.c

61

nsec -= (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift);

kernel/workqueue.c

899

static unsigned long shift_and_mask(unsigned long v, u32 shift, u32 bits)

kernel/workqueue.c

901

return (v >> shift) & ((1U << bits) - 1);

lib/assoc_array.c

260

int shift = shortcut->skip_to_level & ASSOC_ARRAY_KEY_CHUNK_MASK;

lib/assoc_array.c

261

dissimilarity &= ~(ULONG_MAX << shift);

lib/bitmap.c

138

unsigned int shift, unsigned int nbits)

lib/bitmap.c

142

unsigned int off = shift/BITS_PER_LONG, rem = shift % BITS_PER_LONG;

lib/bitmap.c

93

unsigned shift, unsigned nbits)

lib/bitmap.c

96

unsigned off = shift/BITS_PER_LONG, rem = shift % BITS_PER_LONG;

lib/idr.c

627

extern void xa_dump_index(unsigned long index, unsigned int shift);

lib/idr.c

639

unsigned int shift = node->shift + IDA_CHUNK_SHIFT +

lib/idr.c

642

xa_dump_index(index * IDA_BITMAP_BITS, shift);

lib/idr.c

646

index | (i << node->shift));

lib/iommu-helper.c

11

unsigned long shift, unsigned long boundary_size,

lib/iommu-helper.c

21

if (iommu_is_span_boundary(index, nr, shift, boundary_size)) {

lib/iommu-helper.c

22

start = ALIGN(shift + index, boundary_size) - shift;

lib/maple_tree.c

1626

unsigned char shift)

lib/maple_tree.c

1630

memmove(b_node->pivot + shift, b_node->pivot, size);

lib/maple_tree.c

1631

memmove(b_node->slot + shift, b_node->slot, size);

lib/maple_tree.c

1633

memmove(b_node->gap + shift, b_node->gap, size);

lib/maple_tree.c

2756

unsigned char shift, b_end = ++b_node->b_end;

lib/maple_tree.c

2785

shift = mas_data_end(&l_mas) + 1;

lib/maple_tree.c

2786

mab_shift_right(b_node, shift);

lib/maple_tree.c

2787

mas->offset += shift;

lib/maple_tree.c

2788

mas_mab_cp(&l_mas, 0, shift - 1, b_node, 0);

lib/maple_tree.c

2789

b_node->b_end = shift + b_end;

lib/maple_tree.c

501

unsigned long shift;

lib/maple_tree.c

511

shift = MAPLE_PARENT_SLOT_SHIFT;

lib/maple_tree.c

517

shift = type = 0;

lib/maple_tree.c

522

val |= (slot << shift) | type;

lib/radix-tree.c

1214

index += offset << node->shift;

lib/radix-tree.c

1227

} while (node->shift && radix_tree_is_internal_node(child));

lib/radix-tree.c

1483

unsigned int shift, offset = 0;

lib/radix-tree.c

1486

shift = radix_tree_load_root(root, &child, &maxindex);

lib/radix-tree.c

1493

int error = radix_tree_extend(root, gfp, start, shift);

lib/radix-tree.c

1496

shift = error;

lib/radix-tree.c

1499

if (start == 0 && shift == 0)

lib/radix-tree.c

1500

shift = RADIX_TREE_MAP_SHIFT;

lib/radix-tree.c

1502

while (shift) {

lib/radix-tree.c

1503

shift -= RADIX_TREE_MAP_SHIFT;

lib/radix-tree.c

1506

child = radix_tree_node_alloc(gfp, node, root, shift,

lib/radix-tree.c

1530

shift = node->shift;

lib/radix-tree.c

211

static inline unsigned long shift_maxindex(unsigned int shift)

lib/radix-tree.c

213

return (RADIX_TREE_MAP_SIZE << shift) - 1;

lib/radix-tree.c

218

return shift_maxindex(node->shift);

lib/radix-tree.c

225

return (index & ~node_maxindex(node)) + (offset << node->shift);

lib/radix-tree.c

235

unsigned int shift, unsigned int offset,

lib/radix-tree.c

280

ret->shift = shift;

lib/radix-tree.c

398

return node->shift + RADIX_TREE_MAP_SHIFT;

lib/radix-tree.c

409

unsigned long index, unsigned int shift)

lib/radix-tree.c

416

maxshift = shift;

lib/radix-tree.c

426

root, shift, 0, 1, 0);

lib/radix-tree.c

444

BUG_ON(shift > BITS_PER_LONG);

lib/radix-tree.c

458

shift += RADIX_TREE_MAP_SHIFT;

lib/radix-tree.c

459

} while (shift <= maxshift);

lib/radix-tree.c

495

if (!node->shift && is_idr(root))

lib/radix-tree.c

605

unsigned int shift, offset = 0;

lib/radix-tree.c

609

shift = radix_tree_load_root(root, &child, &maxindex);

lib/radix-tree.c

613

int error = radix_tree_extend(root, gfp, max, shift);

lib/radix-tree.c

616

shift = error;

lib/radix-tree.c

620

while (shift > 0) {

lib/radix-tree.c

621

shift -= RADIX_TREE_MAP_SHIFT;

lib/radix-tree.c

624

child = radix_tree_node_alloc(gfp, node, root, shift,

lib/radix-tree.c

663

if (xa_is_node(entry) && child->shift) {

lib/radix-tree.c

770

if (parent->shift == 0)

lib/radix-tree.c

88

unsigned int offset = (index >> parent->shift) & RADIX_TREE_MAP_MASK;

lib/reed_solomon/test_rslib.c

463

int pad = (pad_coef[i].mult * max_pad) >> pad_coef[i].shift;

lib/reed_solomon/test_rslib.c

87

int shift;

lib/rhashtable.c

1192

const unsigned int shift = PAGE_SHIFT - ilog2(sizeof(void *));

lib/rhashtable.c

1202

while (ntbl && size > (1 << shift)) {

lib/rhashtable.c

1203

index = subhash & ((1 << shift) - 1);

lib/rhashtable.c

1206

size >>= shift;

lib/rhashtable.c

1207

subhash >>= shift;

lib/rhashtable.c

1232

const unsigned int shift = PAGE_SHIFT - ilog2(sizeof(void *));

lib/rhashtable.c

1240

size <= (1 << shift));

lib/rhashtable.c

1242

while (ntbl && size > (1 << shift)) {

lib/rhashtable.c

1243

index = hash & ((1 << shift) - 1);

lib/rhashtable.c

1244

size >>= shift;

lib/rhashtable.c

1245

hash >>= shift;

lib/rhashtable.c

1247

size <= (1 << shift));

lib/rhashtable.c

152

const unsigned int shift = PAGE_SHIFT - ilog2(sizeof(void *));

lib/rhashtable.c

156

if (nbuckets < (1 << (shift + 1)))

lib/rhashtable.c

172

tbl->nest = (ilog2(nbuckets) - 1) % shift + 1;

lib/rhashtable.c

77

const unsigned int shift = PAGE_SHIFT - ilog2(sizeof(void *));

lib/rhashtable.c

78

const unsigned int len = 1 << shift;

lib/rhashtable.c

86

size >>= shift;

lib/sbitmap.c

101

int sbitmap_init_node(struct sbitmap *sb, unsigned int depth, int shift,

lib/sbitmap.c

108

if (shift < 0)

lib/sbitmap.c

109

shift = sbitmap_calculate_shift(depth);

lib/sbitmap.c

111

bits_per_word = 1U << shift;

lib/sbitmap.c

115

sb->shift = shift;

lib/sbitmap.c

147

unsigned int bits_per_word = 1U << sb->shift;

lib/sbitmap.c

248

nr += index << sb->shift;

lib/sbitmap.c

385

seq_printf(m, "bits_per_word=%u\n", 1U << sb->shift);

lib/sbitmap.c

449

int shift, bool round_robin, gfp_t flags, int node)

lib/sbitmap.c

454

ret = sbitmap_init_node(&sbq->sb, depth, shift, flags, node,

lib/sbitmap.c

552

*offset = nr + (index << sb->shift);

lib/sort.c

200

size_t shift = 0;

lib/sort.c

229

a -= size << shift;

lib/sort.c

233

shift = do_cmp(base + size, base + 2 * size, cmp_func, priv) <= 0;

lib/sort.c

234

a = size << shift;

lib/test_maple_tree.c

2857

int loop, shift;

lib/test_maple_tree.c

2861

for (shift = 12; shift <= 16; shift++) {

lib/test_maple_tree.c

2863

size = 1 << shift;

lib/tests/printf_kunit.c

582

int shift;

lib/tests/printf_kunit.c

612

flags |= (values[i] & pft[i].mask) << pft[i].shift;

lib/ts_bm.c

101

return consumed + (shift-(bm->patlen-1));

lib/ts_bm.c

104

bs = bm->bad_shift[text[shift-i]];

lib/ts_bm.c

107

shift = max_t(int, shift-i+bs, shift+bm->good_shift[i]);

lib/ts_bm.c

85

int shift = bm->patlen - 1;

lib/ts_bm.c

92

while (shift < text_len) {

lib/ts_bm.c

94

shift, text[shift]);

lib/ts_bm.c

97

&text[shift], icase);

lib/vdso/gettimeofday.c

33

static __always_inline u64 vdso_shift_ns(u64 ns, u32 shift)

lib/vdso/gettimeofday.c

35

return ns >> shift;

lib/vdso/gettimeofday.c

48

return vdso_shift_ns((delta * vc->mult) + base, vc->shift);

lib/vdso/gettimeofday.c

50

return mul_u64_u32_add_u64_shr(delta, vc->mult, base, vc->shift);

lib/vsprintf.c

2074

int shift;

lib/vsprintf.c

2128

buf = number(buf, end, (flags >> pff[i].shift) & pff[i].mask,

lib/vsprintf.c

2828

unsigned int shift = 32 - size*8;

lib/vsprintf.c

2830

val <<= shift;

lib/vsprintf.c

2832

return val >> shift;

lib/vsprintf.c

2833

return (int)val >> shift;

lib/vsprintf.c

511

int shift = 3;

lib/vsprintf.c

514

shift = 4;

lib/vsprintf.c

517

num >>= shift;

lib/xarray.c

1102

if (xas->xa_shift < node->shift) {

lib/xarray.c

1106

child->shift = node->shift - XA_CHUNK_SHIFT;

lib/xarray.c

1195

if (xas->xa_shift < node->shift) {

lib/xarray.c

1226

child->shift = node->shift - XA_CHUNK_SHIFT;

lib/xarray.c

1289

xas->xa_index &= ~0UL << node->shift;

lib/xarray.c

1290

xas->xa_index += (offset - xas->xa_offset) << node->shift;

lib/xarray.c

1409

} else if (!xas->xa_node->shift &&

lib/xarray.c

147

return (index >> node->shift) & XA_CHUNK_MASK;

lib/xarray.c

1489

xas->xa_offset = xas->xa_index >> xas->xa_node->shift;

lib/xarray.c

1574

if (xas->xa_node->shift > xas->xa_shift)

lib/xarray.c

1578

if (xas->xa_node->shift == xas->xa_shift) {

lib/xarray.c

158

unsigned int shift = xas->xa_node->shift;

lib/xarray.c

159

xas->xa_index &= ~XA_CHUNK_MASK << shift;

lib/xarray.c

160

xas->xa_index += offset << shift;

lib/xarray.c

1826

unsigned int shift = 0;

lib/xarray.c

1837

shift += XA_CHUNK_SHIFT;

lib/xarray.c

1847

if ((((first + sibs + 1) << shift) - 1) > last)

lib/xarray.c

1850

xas->xa_shift = shift;

lib/xarray.c

1936

order += xas->xa_node->shift;

lib/xarray.c

196

if ((xas->xa_index >> xa_to_node(entry)->shift) > XA_CHUNK_MASK)

lib/xarray.c

214

if (node->shift && xa_is_node(entry))

lib/xarray.c

2217

mask = (XA_CHUNK_SIZE << node->shift) - 1;

lib/xarray.c

2219

((unsigned long)xas->xa_offset << node->shift);

lib/xarray.c

2362

(node->shift + XA_CHUNK_SHIFT),

lib/xarray.c

2363

.xa_shift = node->shift + XA_CHUNK_SHIFT,

lib/xarray.c

2418

node->parent, node->shift, node->count, node->nr_values,

lib/xarray.c

2426

void xa_dump_index(unsigned long index, unsigned int shift)

lib/xarray.c

2428

if (!shift)

lib/xarray.c

2430

else if (shift >= BITS_PER_LONG)

lib/xarray.c

2433

pr_info("%lu-%lu: ", index, index | ((1UL << shift) - 1));

lib/xarray.c

2436

void xa_dump_entry(const void *entry, unsigned long index, unsigned long shift)

lib/xarray.c

244

if (xas->xa_shift > node->shift)

lib/xarray.c

2441

xa_dump_index(index, shift);

lib/xarray.c

2444

if (shift == 0) {

lib/xarray.c

2452

index + (i << node->shift), node->shift);

lib/xarray.c

247

if (node->shift == 0)

lib/xarray.c

2472

unsigned int shift = 0;

lib/xarray.c

2478

shift = xa_to_node(entry)->shift + XA_CHUNK_SHIFT;

lib/xarray.c

2479

xa_dump_entry(entry, 0, shift);

lib/xarray.c

362

static void *xas_alloc(struct xa_state *xas, unsigned int shift)

lib/xarray.c

391

XA_NODE_BUG_ON(node, shift > BITS_PER_LONG);

lib/xarray.c

393

node->shift = shift;

lib/xarray.c

437

return (XA_CHUNK_SIZE << xa_to_node(entry)->shift) - 1;

lib/xarray.c

459

if (!xa_is_node(entry) && node->shift)

lib/xarray.c

539

if (node->shift && xa_is_node(entry)) {

lib/xarray.c

571

unsigned int shift = 0;

lib/xarray.c

577

while ((max >> shift) >= XA_CHUNK_SIZE)

lib/xarray.c

578

shift += XA_CHUNK_SHIFT;

lib/xarray.c

579

return shift + XA_CHUNK_SHIFT;

lib/xarray.c

582

shift = node->shift + XA_CHUNK_SHIFT;

lib/xarray.c

589

XA_NODE_BUG_ON(node, shift > BITS_PER_LONG);

lib/xarray.c

590

node = xas_alloc(xas, shift);

lib/xarray.c

627

shift += XA_CHUNK_SHIFT;

lib/xarray.c

631

return shift;

lib/xarray.c

653

int shift;

lib/xarray.c

661

shift = xas_expand(xas, entry);

lib/xarray.c

662

if (shift < 0)

lib/xarray.c

664

if (!shift && !allow_root)

lib/xarray.c

665

shift = XA_CHUNK_SHIFT;

lib/xarray.c

673

shift = node->shift;

lib/xarray.c

677

shift = 0;

lib/xarray.c

682

while (shift > order) {

lib/xarray.c

683

shift -= XA_CHUNK_SHIFT;

lib/xarray.c

685

node = xas_alloc(xas, shift);

lib/xarray.c

715

unsigned char shift = xas->xa_shift;

lib/xarray.c

718

xas->xa_index |= ((sibs + 1UL) << shift) - 1;

lib/xarray.c

719

if (xas_is_node(xas) && xas->xa_node->shift == xas->xa_shift)

lib/xarray.c

734

if (node->shift >= shift)

lib/xarray.c

744

xas->xa_shift = shift;

lib/xarray.c

803

if (node && (xas->xa_shift < node->shift))

lib/xarray.c

828

if (xa_is_node(next) && (!node || node->shift))

lib/zstd/compress/zstd_compress_literals.c

123

{ int const shift = MIN(9-(int)strategy, 3);

lib/zstd/compress/zstd_compress_literals.c

124

size_t const mintc = (huf_repeat == HUF_repeat_valid) ? 6 : (size_t)8 << shift;

lib/zstd/compress/zstd_compress_sequences.c

143

unsigned const shift = 8 - accuracyLog;

lib/zstd/compress/zstd_compress_sequences.c

149

unsigned const norm256 = normAcc << shift;

lib/zstd/compress/zstd_opt.c

106

ZSTD_downscaleStats(unsigned* table, U32 lastEltIndex, U32 shift, base_directive_e base1)

lib/zstd/compress/zstd_opt.c

110

(unsigned)lastEltIndex+1, (unsigned)shift );

lib/zstd/compress/zstd_opt.c

111

assert(shift < 30);

lib/zstd/compress/zstd_opt.c

114

unsigned const newStat = base + (table[s] >> shift);

mm/compaction.c

1409

unsigned short shift = BITS_PER_LONG - 1;

mm/compaction.c

1411

return (COMPACT_CLUSTER_MAX >> min(shift, cc->fast_search_fail)) + 1;

mm/filemap.c

2738

unsigned int shift = folio_shift(folio);

mm/filemap.c

2740

return (pos1 >> shift == pos2 >> shift);

mm/hugetlb.c

4840

unsigned int shift = huge_page_shift(hstate_vma(vma));

mm/hugetlb.c

4848

entry = arch_make_huge_pte(entry, shift, vma->vm_flags);

mm/hugetlb.c

6526

unsigned int shift = huge_page_shift(hstate_vma(vma));

mm/hugetlb.c

6530

pte = arch_make_huge_pte(pte, shift, vma->vm_flags);

mm/internal.h

1489

unsigned long align, unsigned long shift,

mm/memory-failure.c

685

static void set_to_kill(struct to_kill *tk, unsigned long addr, short shift)

mm/memory-failure.c

688

tk->size_shift = shift;

mm/memory-failure.c

691

static int check_hwpoisoned_entry(pte_t pte, unsigned long addr, short shift,

mm/memory-failure.c

707

mask = ~((1UL << (shift - PAGE_SHIFT)) - 1);

mm/memory-failure.c

712

set_to_kill(tk, hwpoison_vaddr, shift);

mm/migrate.c

417

unsigned int shift = huge_page_shift(h);

mm/migrate.c

420

pte = arch_make_huge_pte(pte, shift, vma->vm_flags);

mm/mm_init.c

102

shift = BITS_PER_LONG;

mm/mm_init.c

103

width = shift - NR_NON_PAGEFLAG_BITS;

mm/mm_init.c

134

shift, width, width, NR_PAGEFLAGS, NR_PAGEFLAGS, 0);

mm/mm_init.c

145

shift -= SECTIONS_WIDTH;

mm/mm_init.c

146

BUG_ON(shift != SECTIONS_PGSHIFT);

mm/mm_init.c

149

shift -= NODES_WIDTH;

mm/mm_init.c

150

BUG_ON(shift != NODES_PGSHIFT);

mm/mm_init.c

153

shift -= ZONES_WIDTH;

mm/mm_init.c

154

BUG_ON(shift != ZONES_PGSHIFT);

mm/mm_init.c

99

int shift, width;

mm/page-writeback.c

1346

unsigned long shift;

mm/page-writeback.c

1464

shift = dirty_ratelimit / (2 * step + 1);

mm/page-writeback.c

1465

if (shift < BITS_PER_LONG)

mm/page-writeback.c

1466

step = DIV_ROUND_UP(step >> shift, 8);

mm/swap_cgroup.c

27

unsigned int shift = (offset % ID_PER_SC) * ID_SHIFT;

mm/swap_cgroup.c

33

return (old_ids >> shift) & ID_MASK;

mm/swap_cgroup.c

42

unsigned int shift = (offset % ID_PER_SC) * ID_SHIFT;

mm/swap_cgroup.c

46

old_id = (old_ids >> shift) & ID_MASK;

mm/swap_cgroup.c

47

new_ids = (old_ids & ~(ID_MASK << shift));

mm/swap_cgroup.c

48

new_ids |= ((unsigned int)new_id) << shift;

mm/vma.h

693

int relocate_vma_down(struct vm_area_struct *vma, unsigned long shift);

mm/vma_exec.c

19

int relocate_vma_down(struct vm_area_struct *vma, unsigned long shift)

mm/vma_exec.c

36

unsigned long new_start = old_start - shift;

mm/vma_exec.c

37

unsigned long new_end = old_end - shift;

mm/vmalloc.c

3204

unsigned long align, unsigned long shift, unsigned long flags,

mm/vmalloc.c

3213

size = ALIGN(size, 1ul << shift);

mm/vmalloc.c

3995

unsigned int shift = PAGE_SHIFT;

mm/vmalloc.c

4016

shift = PMD_SHIFT;

mm/vmalloc.c

4018

shift = arch_vmap_pte_supported_shift(size);

mm/vmalloc.c

4020

align = max(original_align, 1UL << shift);

mm/vmalloc.c

4024

area = __get_vm_area_node(size, align, shift, VM_ALLOC |

mm/vmalloc.c

4064

ret = __vmalloc_area_node(area, gfp_mask, prot, shift, node);

mm/vmalloc.c

4096

if (shift > PAGE_SHIFT) {

mm/vmalloc.c

4097

shift = PAGE_SHIFT;

mm/vmscan.c

444

int shift = 0;

mm/vmscan.c

455

} while ((freed >> shift++) > 1);

net/core/filter.c

12376

int i, delta, shift, headroom, tailroom, n_frags_free = 0;

net/core/filter.c

12396

shift = delta - tailroom;

net/core/filter.c

12397

if (shift > 0) {

net/core/filter.c

12398

memmove(start - shift, start, xdp->data_end - start);

net/core/filter.c

12400

xdp->data_meta -= shift;

net/core/filter.c

12401

xdp->data -= shift;

net/core/filter.c

12402

xdp->data_end -= shift;

net/core/filter.c

2665

u32 first_sge, last_sge, i, shift, bytes_sg_total;

net/core/filter.c

2743

shift = last_sge > first_sge ?

net/core/filter.c

2746

if (!shift)

net/core/filter.c

2754

if (i + shift >= NR_MSG_FRAG_IDS)

net/core/filter.c

2755

move_from = i + shift - NR_MSG_FRAG_IDS;

net/core/filter.c

2757

move_from = i + shift;

net/core/filter.c

2768

msg->sg.end = msg->sg.end - shift > msg->sg.end ?

net/core/filter.c

2769

msg->sg.end - shift + NR_MSG_FRAG_IDS :

net/core/filter.c

2770

msg->sg.end - shift;

net/core/neighbour.c

558

static struct neigh_hash_table *neigh_hash_alloc(unsigned int shift)

net/core/neighbour.c

560

size_t size = (1 << shift) * sizeof(struct hlist_head);

net/core/neighbour.c

575

ret->hash_shift = shift;

net/ipv4/fib_trie.c

373

unsigned int shift = pos + bits;

net/ipv4/fib_trie.c

378

BUG_ON(!bits || (shift > KEYLENGTH));

net/ipv4/fib_trie.c

393

tn->key = (shift < KEYLENGTH) ? (key >> shift) << shift : 0;

net/ipv4/tcp.c

3147

static bool tcp_too_many_orphans(int shift)

net/ipv4/tcp.c

3149

return READ_ONCE(tcp_orphan_cache) << shift >

net/ipv4/tcp.c

3161

bool tcp_check_oom(const struct sock *sk, int shift)

net/ipv4/tcp.c

3165

too_many_orphans = tcp_too_many_orphans(shift);

net/ipv4/tcp_cubic.c

169

u32 x, b, shift;

net/ipv4/tcp_cubic.c

196

shift = (a >> (b * 3));

net/ipv4/tcp_cubic.c

198

x = ((u32)(((u32)v[shift] + 10) << b)) >> 6;

net/ipv4/tcp_timer.c

109

int shift = 0;

net/ipv4/tcp_timer.c

114

shift++;

net/ipv4/tcp_timer.c

118

shift++;

net/ipv4/tcp_timer.c

120

if (tcp_check_oom(sk, shift)) {

net/mac80211/airtime.c

117

.shift = _s, \

net/mac80211/airtime.c

148

.shift = _s, \

net/mac80211/airtime.c

190

.shift = _s, \

net/mac80211/airtime.c

238

.shift = _s, \

net/mac80211/airtime.c

290

u8 shift;

net/mac80211/airtime.c

34

#define MCS_DURATION_S(shift, streams, sgi, bps) \

net/mac80211/airtime.c

35

((u16)((MCS_DURATION(streams, sgi, bps) >> shift)))

net/mac80211/airtime.c

55

#define HE_DURATION_S(shift, streams, gi, bps) \

net/mac80211/airtime.c

56

(HE_DURATION(streams, gi, bps) >> shift)

net/mac80211/airtime.c

578

duration <<= airtime_mcs_groups[group].shift;

net/mac80211/airtime.c

65

#define EHT_DURATION_S(shift, streams, gi, bps) \

net/mac80211/airtime.c

66

HE_DURATION_S(shift, streams, gi, bps)

net/mac80211/rc80211_minstrel_ht.c

1513

duration <<= g->shift;

net/mac80211/rc80211_minstrel_ht.c

152

.shift = _s, \

net/mac80211/rc80211_minstrel_ht.c

185

.shift = _s, \

net/mac80211/rc80211_minstrel_ht.c

467

return duration << group->shift;

net/mac80211/rc80211_minstrel_ht.c

517

minstrel_mcs_groups[group].shift;

net/mac80211/rc80211_minstrel_ht.c

61

.shift = _s, \

net/mac80211/rc80211_minstrel_ht.c

98

.shift = _s, \

net/mac80211/rc80211_minstrel_ht.h

101

u8 shift;

net/mac80211/rc80211_minstrel_ht_debugfs.c

120

duration <<= mg->shift;

net/mac80211/rc80211_minstrel_ht_debugfs.c

263

duration <<= mg->shift;

net/mac80211/rx.c

433

int shift = 0;

net/mac80211/rx.c

436

shift = 1;

net/mac80211/rx.c

438

shift = 2;

net/mac80211/rx.c

439

*pos = DIV_ROUND_UP(rate->bitrate, 5 * (1 << shift));

net/mac80211/sta_info.c

2536

unsigned int shift;

net/mac80211/sta_info.c

2547

shift = 2;

net/mac80211/sta_info.c

2549

shift = 1;

net/mac80211/sta_info.c

2551

shift = 0;

net/mac80211/sta_info.c

2552

rinfo->legacy = DIV_ROUND_UP(brate, 1 << shift);

net/netfilter/ipvs/ip_vs_mh.c

345

int mw, shift;

net/netfilter/ipvs/ip_vs_mh.c

366

shift = fls(mw) - IP_VS_MH_TAB_BITS;

net/netfilter/ipvs/ip_vs_mh.c

367

return (shift >= 0) ? shift : 0;

net/netfilter/nf_conntrack_h323_asn1.c

215

unsigned int v, l, shift, bytes;

net/netfilter/nf_conntrack_h323_asn1.c

229

for (bytes = l >> 3, shift = 24, v = 0; bytes;

net/netfilter/nf_conntrack_h323_asn1.c

230

bytes--, shift -= 8)

net/netfilter/nf_conntrack_h323_asn1.c

231

v |= (unsigned int)(*bs->cur++) << shift;

net/netfilter/nf_conntrack_h323_asn1.c

234

v |= (unsigned int)(*bs->cur) << shift;

net/netfilter/nf_conntrack_sip.c

111

const char *limit, int *shift)

net/netfilter/nf_conntrack_sip.c

130

const char *limit, int *shift)

net/netfilter/nf_conntrack_sip.c

132

int len = string_len(ct, dptr, limit, shift);

net/netfilter/nf_conntrack_sip.c

140

return len + digits_len(ct, dptr, limit, shift);

net/netfilter/nf_conntrack_sip.c

186

const char *limit, int *shift)

net/netfilter/nf_conntrack_sip.c

199

dptr += digits_len(ct, dptr, limit, shift);

net/netfilter/nf_conntrack_sip.c

206

const char *limit, int *shift)

net/netfilter/nf_conntrack_sip.c

209

int s = *shift;

net/netfilter/nf_conntrack_sip.c

216

(*shift)++;

net/netfilter/nf_conntrack_sip.c

222

(*shift)++;

net/netfilter/nf_conntrack_sip.c

225

*shift = s;

net/netfilter/nf_conntrack_sip.c

228

return epaddr_len(ct, dptr, limit, shift);

net/netfilter/nf_conntrack_sip.c

245

int shift = 0;

net/netfilter/nf_conntrack_sip.c

264

if (!skp_epaddr_len(ct, dptr, limit, &shift))

net/netfilter/nf_conntrack_sip.c

266

dptr += shift;

net/netfilter/nf_conntrack_sip.c

374

int shift = 0;

net/netfilter/nf_conntrack_sip.c

424

*matchlen = hdr->match_len(ct, dptr, limit, &shift);

net/netfilter/nf_conntrack_sip.c

427

*matchoff = dptr - start + shift;

net/netfilter/nf_conntrack_sip.c

442

int shift = 0;

net/netfilter/nf_conntrack_sip.c

456

*matchlen = hdr->match_len(ct, dptr, limit, &shift);

net/netfilter/nf_conntrack_sip.c

459

*matchoff += shift;

net/netfilter/nf_conntrack_sip.c

67

const char *limit, int *shift)

net/netfilter/nf_conntrack_sip.c

674

const char *limit, int *shift)

net/netfilter/nf_conntrack_sip.c

735

int shift = 0;

net/netfilter/nf_conntrack_sip.c

771

*matchlen = hdr->match_len(ct, dptr, limit, &shift);

net/netfilter/nf_conntrack_sip.c

774

*matchoff = dptr - start + shift;

net/netfilter/nf_conntrack_sip.c

79

const char *limit, int *shift)

net/netfilter/nft_bitwise.c

41

u32 shift = priv->data.data[0];

net/netfilter/nft_bitwise.c

46

dst[i - 1] = (src[i - 1] << shift) | carry;

net/netfilter/nft_bitwise.c

47

carry = src[i - 1] >> (BITS_PER_TYPE(u32) - shift);

net/netfilter/nft_bitwise.c

54

u32 shift = priv->data.data[0];

net/netfilter/nft_bitwise.c

59

dst[i] = carry | (src[i] >> shift);

net/netfilter/nft_bitwise.c

60

carry = src[i] << (BITS_PER_TYPE(u32) - shift);

net/netlink/af_netlink.c

1745

int pos, idx, shift, err = 0;

net/netlink/af_netlink.c

1753

shift = (pos % sizeof(unsigned long)) * 8;

net/netlink/af_netlink.c

1754

if (put_user((u32)(nlk->groups[idx] >> shift),

net/rxrpc/conn_client.c

342

unsigned int shift = slot * RXRPC_MAXCALLS;

net/rxrpc/conn_client.c

360

conn->bundle_shift = shift;

net/rxrpc/conn_client.c

364

set_bit(shift + i, &bundle->avail_chans);

net/rxrpc/proc.c

321

unsigned int shift = 32 - HASH_BITS(rxnet->peer_hash);

net/rxrpc/proc.c

329

n = *_pos & ((1U << shift) - 1);

net/rxrpc/proc.c

330

bucket = *_pos >> shift;

net/rxrpc/proc.c

348

*_pos = (bucket << shift) | n;

net/rxrpc/proc.c

356

unsigned int shift = 32 - HASH_BITS(rxnet->peer_hash);

net/rxrpc/proc.c

362

bucket = *_pos >> shift;

net/rxrpc/proc.c

371

*_pos = (bucket << shift) | n;

net/sched/act_pedit.c

267

nparms->tcfp_keys[i].shift = min_t(size_t,

net/sched/act_pedit.c

269

nparms->tcfp_keys[i].shift);

net/sched/act_pedit.c

274

cur += (0xff & offmask) >> nparms->tcfp_keys[i].shift;

net/sched/act_pedit.c

447

offset += (*d & tkey->offmask) >> tkey->shift;

net/sched/em_meta.c

714

int shift = v->hdr.shift;

net/sched/em_meta.c

716

if (shift && shift < dst->len)

net/sched/em_meta.c

717

dst->len -= shift;

net/sched/em_meta.c

765

if (v->hdr.shift)

net/sched/em_meta.c

766

dst->value >>= v->hdr.shift;

net/sched/sch_cake.c

1367

static u64 cake_ewma(u64 avg, u64 sample, u32 shift)

net/sched/sch_cake.c

1369

avg -= avg >> shift;

net/sched/sch_cake.c

1370

avg += sample >> shift;

net/sched/sch_generic.c

1493

static void psched_ratecfg_precompute__(u64 rate, u32 *mult, u8 *shift)

net/sched/sch_generic.c

1498

*shift = 0;

net/sched/sch_generic.c

1508

(*shift)++;

net/sched/sch_generic.c

1521

psched_ratecfg_precompute__(r->rate_bytes_ps, &r->mult, &r->shift);

net/sched/sch_generic.c

1528

psched_ratecfg_precompute__(r->rate_pkts_ps, &r->mult, &r->shift);

net/sched/sch_qfq.c

741

static inline u64 qfq_round_down(u64 ts, unsigned int shift)

net/sched/sch_qfq.c

743

return ts & ~((1ULL << shift) - 1);

net/sunrpc/auth_gss/gss_krb5_wrap.c

55

static void rotate_buf_a_little(struct xdr_buf *buf, unsigned int shift)

net/sunrpc/auth_gss/gss_krb5_wrap.c

61

BUG_ON(shift > LOCAL_BUF_LEN);

net/sunrpc/auth_gss/gss_krb5_wrap.c

63

read_bytes_from_xdr_buf(buf, 0, head, shift);

net/sunrpc/auth_gss/gss_krb5_wrap.c

64

for (i = 0; i + shift < buf->len; i += LOCAL_BUF_LEN) {

net/sunrpc/auth_gss/gss_krb5_wrap.c

65

this_len = min(LOCAL_BUF_LEN, buf->len - (i + shift));

net/sunrpc/auth_gss/gss_krb5_wrap.c

66

read_bytes_from_xdr_buf(buf, i+shift, tmp, this_len);

net/sunrpc/auth_gss/gss_krb5_wrap.c

69

write_bytes_to_xdr_buf(buf, buf->len - shift, head, shift);

net/sunrpc/auth_gss/gss_krb5_wrap.c

72

static void _rotate_left(struct xdr_buf *buf, unsigned int shift)

net/sunrpc/auth_gss/gss_krb5_wrap.c

77

shift %= buf->len;

net/sunrpc/auth_gss/gss_krb5_wrap.c

78

while (shifted < shift) {

net/sunrpc/auth_gss/gss_krb5_wrap.c

79

this_shift = min(shift - shifted, LOCAL_BUF_LEN);

net/sunrpc/auth_gss/gss_krb5_wrap.c

85

static void rotate_left(u32 base, struct xdr_buf *buf, unsigned int shift)

net/sunrpc/auth_gss/gss_krb5_wrap.c

90

_rotate_left(&subbuf, shift);

net/sunrpc/xdr.c

1002

memcpy(xdr->scratch.iov_base, page, shift);

net/sunrpc/xdr.c

1003

memmove(page, page + shift, (void *)xdr->p - page);

net/sunrpc/xdr.c

1771

unsigned int shift;

net/sunrpc/xdr.c

1774

shift = target - offset;

net/sunrpc/xdr.c

1775

if (xdr_buf_subsegment(xdr->buf, &buf, offset, shift + length) < 0)

net/sunrpc/xdr.c

1777

xdr_buf_head_shift_right(&buf, 0, length, shift);

net/sunrpc/xdr.c

1779

shift = offset - target;

net/sunrpc/xdr.c

1780

if (xdr_buf_subsegment(xdr->buf, &buf, target, shift + length) < 0)

net/sunrpc/xdr.c

1782

xdr_buf_head_shift_left(&buf, shift, length, shift);

net/sunrpc/xdr.c

559

unsigned int shift)

net/sunrpc/xdr.c

562

unsigned int to = base + shift;

net/sunrpc/xdr.c

573

unsigned int shift)

net/sunrpc/xdr.c

576

unsigned int to = base + shift;

net/sunrpc/xdr.c

606

unsigned int shift)

net/sunrpc/xdr.c

610

unsigned int to = base + shift;

net/sunrpc/xdr.c

653

unsigned int shift)

net/sunrpc/xdr.c

657

if (base >= tail->iov_len || !shift || !len)

net/sunrpc/xdr.c

659

xdr_buf_tail_copy_right(buf, base, len, shift);

net/sunrpc/xdr.c

664

unsigned int shift)

net/sunrpc/xdr.c

666

if (!shift || !len)

net/sunrpc/xdr.c

669

xdr_buf_tail_shift_right(buf, base - buf->page_len, len, shift);

net/sunrpc/xdr.c

674

shift);

net/sunrpc/xdr.c

675

xdr_buf_pages_copy_right(buf, base, len, shift);

net/sunrpc/xdr.c

680

unsigned int shift)

net/sunrpc/xdr.c

684

if (!shift)

net/sunrpc/xdr.c

688

shift);

net/sunrpc/xdr.c

693

shift);

net/sunrpc/xdr.c

694

xdr_buf_head_copy_right(buf, base, len, shift);

net/sunrpc/xdr.c

698

unsigned int len, unsigned int shift)

net/sunrpc/xdr.c

707

if (shift > buf->page_len + base) {

net/sunrpc/xdr.c

710

head->iov_len + buf->page_len + base - shift;

net/sunrpc/xdr.c

713

if (WARN_ONCE(shift > head->iov_len + buf->page_len + base,

net/sunrpc/xdr.c

725

if (shift > base) {

net/sunrpc/xdr.c

726

unsigned int pgto = buf->page_len + base - shift;

net/sunrpc/xdr.c

738

memmove(tail->iov_base + base - shift, tail->iov_base + base, len);

net/sunrpc/xdr.c

743

unsigned int shift)

net/sunrpc/xdr.c

752

if (shift > base) {

net/sunrpc/xdr.c

754

unsigned int hdto = head->iov_len + base - shift;

net/sunrpc/xdr.c

757

if (WARN_ONCE(shift > head->iov_len + base,

net/sunrpc/xdr.c

769

pgto = base - shift;

net/sunrpc/xdr.c

776

unsigned int shift)

net/sunrpc/xdr.c

778

if (!shift || !len)

net/sunrpc/xdr.c

780

xdr_buf_tail_copy_left(buf, base, len, shift);

net/sunrpc/xdr.c

785

unsigned int shift)

net/sunrpc/xdr.c

787

if (!shift || !len)

net/sunrpc/xdr.c

790

xdr_buf_tail_shift_left(buf, base - buf->page_len, len, shift);

net/sunrpc/xdr.c

793

xdr_buf_pages_copy_left(buf, base, len, shift);

net/sunrpc/xdr.c

797

xdr_buf_tail_copy_left(buf, 0, len - buf->page_len, shift);

net/sunrpc/xdr.c

802

unsigned int shift)

net/sunrpc/xdr.c

807

if (!shift || !len)

net/sunrpc/xdr.c

810

if (shift > base) {

net/sunrpc/xdr.c

811

bytes = (shift - base);

net/sunrpc/xdr.c

820

memmove(head->iov_base + (base - shift),

net/sunrpc/xdr.c

825

xdr_buf_pages_shift_left(buf, base - head->iov_len, len, shift);

net/sunrpc/xdr.c

840

unsigned int shift, buflen = max(buf->len, len);

net/sunrpc/xdr.c

849

shift = head->iov_len - len;

net/sunrpc/xdr.c

850

xdr_buf_try_expand(buf, shift);

net/sunrpc/xdr.c

851

xdr_buf_head_shift_right(buf, len, buflen - len, shift);

net/sunrpc/xdr.c

853

buf->buflen -= shift;

net/sunrpc/xdr.c

854

buf->len -= shift;

net/sunrpc/xdr.c

855

return shift;

net/sunrpc/xdr.c

868

unsigned int shift, buflen = buf->len - buf->head->iov_len;

net/sunrpc/xdr.c

879

shift = buf->page_len - len;

net/sunrpc/xdr.c

880

xdr_buf_try_expand(buf, shift);

net/sunrpc/xdr.c

881

xdr_buf_pages_shift_right(buf, len, buflen - len, shift);

net/sunrpc/xdr.c

883

buf->len -= shift;

net/sunrpc/xdr.c

884

buf->buflen -= shift;

net/sunrpc/xdr.c

885

return shift;

net/sunrpc/xdr.c

998

size_t shift = xdr->scratch.iov_len;

net/xfrm/xfrm_iptfs.c

1298

static void __vec_shift(struct xfrm_iptfs_data *xtfs, u32 shift)

net/xfrm/xfrm_iptfs.c

1302

if (shift > savedlen)

net/xfrm/xfrm_iptfs.c

1303

shift = savedlen;

net/xfrm/xfrm_iptfs.c

1304

if (shift != savedlen)

net/xfrm/xfrm_iptfs.c

1305

memcpy(xtfs->w_saved, xtfs->w_saved + shift,

net/xfrm/xfrm_iptfs.c

1306

(savedlen - shift) * sizeof(*xtfs->w_saved));

net/xfrm/xfrm_iptfs.c

1307

memset(xtfs->w_saved + savedlen - shift, 0,

net/xfrm/xfrm_iptfs.c

1308

shift * sizeof(*xtfs->w_saved));

net/xfrm/xfrm_iptfs.c

1309

xtfs->w_savedlen -= shift;

samples/bpf/lathist_kern.c

43

unsigned int shift;

samples/bpf/lathist_kern.c

46

shift = (v > 0xFF) << 3; v >>= shift; r |= shift;

samples/bpf/lathist_kern.c

47

shift = (v > 0xF) << 2; v >>= shift; r |= shift;

samples/bpf/lathist_kern.c

48

shift = (v > 0x3) << 1; v >>= shift; r |= shift;

samples/bpf/lwt_len_hist.bpf.c

27

unsigned int shift;

samples/bpf/lwt_len_hist.bpf.c

30

shift = (v > 0xFF) << 3; v >>= shift; r |= shift;

samples/bpf/lwt_len_hist.bpf.c

31

shift = (v > 0xF) << 2; v >>= shift; r |= shift;

samples/bpf/lwt_len_hist.bpf.c

32

shift = (v > 0x3) << 1; v >>= shift; r |= shift;

scripts/mod/modpost.c

1181

uint8_t shift = 31 - index;

scripts/mod/modpost.c

1183

return (int32_t)(value << shift) >> shift;

sound/hda/codecs/side-codecs/tas2781_hda.h

34

.shift = xshift, .rshift = xshift,\

sound/hda/codecs/side-codecs/tas2781_hda_spi.c

248

mask <<= mc->shift;

sound/hda/codecs/side-codecs/tas2781_hda_spi.c

253

mc->reg, mask, (unsigned int)(val << mc->shift));

sound/hda/codecs/side-codecs/tas2781_hda_spi.c

276

mask <<= mc->shift;

sound/hda/codecs/side-codecs/tas2781_hda_spi.c

277

val = (val & mask) >> mc->shift;

sound/hda/core/bus.c

242

unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;

sound/hda/core/bus.c

246

return (v >> shift) & mask;

sound/hda/core/bus.c

255

unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;

sound/hda/core/bus.c

259

v &= ~(mask << shift);

sound/hda/core/bus.c

260

v |= val << shift;

sound/hda/core/device.c

467

unsigned int shift, num_elems, mask;

sound/hda/core/device.c

477

shift = 16;

sound/hda/core/device.c

481

shift = 8;

sound/hda/core/device.c

485

mask = (1 << (shift-1)) - 1;

sound/hda/core/device.c

515

range_val = !!(parm & (1 << (shift-1))); /* ranges */

sound/hda/core/device.c

523

parm >>= shift;

sound/hda/core/stream.c

656

clocks_calc_mult_shift(&cc->mult, &cc->shift, 24000000,

sound/i2c/other/ak4xxx-adda.c

349

#define AK_COMPOSE(chip,addr,shift,mask) \

sound/i2c/other/ak4xxx-adda.c

350

(((chip) << 8) | (addr) | ((shift) << 16) | ((mask) << 24))

sound/i2c/other/ak4xxx-adda.c

464

int shift = AK_GET_SHIFT(kcontrol->private_value);

sound/i2c/other/ak4xxx-adda.c

466

(snd_akm4xxx_get(ak, chip, addr) >> shift) & 3;

sound/i2c/other/ak4xxx-adda.c

476

int shift = AK_GET_SHIFT(kcontrol->private_value);

sound/i2c/other/ak4xxx-adda.c

480

nval = (nval << shift) |

sound/i2c/other/ak4xxx-adda.c

481

(snd_akm4xxx_get(ak, chip, addr) & ~(3 << shift));

sound/i2c/other/ak4xxx-adda.c

496

int shift = AK_GET_SHIFT(kcontrol->private_value);

sound/i2c/other/ak4xxx-adda.c

499

unsigned char val = snd_akm4xxx_get(ak, chip, addr) & (1<<shift);

sound/i2c/other/ak4xxx-adda.c

502

ucontrol->value.integer.value[0] = (val & (1<<shift)) != 0;

sound/i2c/other/ak4xxx-adda.c

512

int shift = AK_GET_SHIFT(kcontrol->private_value);

sound/i2c/other/ak4xxx-adda.c

522

val = oval | (1<<shift);

sound/i2c/other/ak4xxx-adda.c

524

val = oval & ~(1<<shift);

sound/i2c/other/ak4xxx-adda.c

825

int shift = idx == 3 ? 6 : (2 - idx) * 2;

sound/i2c/other/ak4xxx-adda.c

827

knew.private_value = AK_COMPOSE(0, 8, shift, 0);

sound/isa/ad1816a/ad1816a_lib.c

677

#define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \

sound/isa/ad1816a/ad1816a_lib.c

682

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \

sound/isa/ad1816a/ad1816a_lib.c

684

#define AD1816A_SINGLE(xname, reg, shift, mask, invert) \

sound/isa/ad1816a/ad1816a_lib.c

687

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

sound/isa/ad1816a/ad1816a_lib.c

704

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/ad1816a/ad1816a_lib.c

709

ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;

sound/isa/ad1816a/ad1816a_lib.c

719

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/ad1816a/ad1816a_lib.c

728

val <<= shift;

sound/isa/ad1816a/ad1816a_lib.c

731

val = (old_val & ~(mask << shift)) | val;

sound/isa/cs423x/cs4236_lib.c

371

#define CS4236_SINGLE(xname, xindex, reg, shift, mask, invert) \

sound/isa/cs423x/cs4236_lib.c

375

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

sound/isa/cs423x/cs4236_lib.c

377

#define CS4236_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \

sound/isa/cs423x/cs4236_lib.c

382

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \

sound/isa/cs423x/cs4236_lib.c

400

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/cs423x/cs4236_lib.c

405

ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(reg)] >> shift) & mask;

sound/isa/cs423x/cs4236_lib.c

415

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/cs423x/cs4236_lib.c

424

val <<= shift;

sound/isa/cs423x/cs4236_lib.c

426

val = (chip->eimage[CS4236_REG(reg)] & ~(mask << shift)) | val;

sound/isa/cs423x/cs4236_lib.c

432

#define CS4236_SINGLEC(xname, xindex, reg, shift, mask, invert) \

sound/isa/cs423x/cs4236_lib.c

436

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

sound/isa/cs423x/cs4236_lib.c

442

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/cs423x/cs4236_lib.c

447

ucontrol->value.integer.value[0] = (chip->cimage[reg] >> shift) & mask;

sound/isa/cs423x/cs4236_lib.c

457

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/cs423x/cs4236_lib.c

466

val <<= shift;

sound/isa/cs423x/cs4236_lib.c

468

val = (chip->cimage[reg] & ~(mask << shift)) | val;

sound/isa/es1688/es1688_lib.c

745

#define ES1688_SINGLE(xname, xindex, reg, shift, mask, invert) \

sound/isa/es1688/es1688_lib.c

749

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

sound/isa/es1688/es1688_lib.c

766

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/es1688/es1688_lib.c

771

ucontrol->value.integer.value[0] = (snd_es1688_mixer_read(chip, reg) >> shift) & mask;

sound/isa/es1688/es1688_lib.c

781

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/es1688/es1688_lib.c

790

nval <<= shift;

sound/isa/es1688/es1688_lib.c

793

nval = (oval & ~(mask << shift)) | nval;

sound/isa/es18xx.c

1081

#define ES18XX_SINGLE(xname, xindex, reg, shift, mask, flags) \

sound/isa/es18xx.c

1085

.private_value = reg | (shift << 8) | (mask << 16) | (flags << 24) }

sound/isa/es18xx.c

1105

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/es18xx.c

1115

ucontrol->value.integer.value[0] = (val >> shift) & mask;

sound/isa/es18xx.c

1125

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/es18xx.c

1134

mask <<= shift;

sound/isa/es18xx.c

1135

val <<= shift;

sound/isa/es18xx.c

419

int shift;

sound/isa/es18xx.c

421

shift = 0;

sound/isa/es18xx.c

423

shift++;

sound/isa/es18xx.c

425

shift++;

sound/isa/es18xx.c

434

chip->dma2_shift = shift;

sound/isa/es18xx.c

436

chip->dma1_shift = shift;

sound/isa/es18xx.c

521

int shift;

sound/isa/es18xx.c

523

shift = 0;

sound/isa/es18xx.c

531

shift++;

sound/isa/es18xx.c

533

shift++;

sound/isa/es18xx.c

534

chip->dma1_shift = shift;

sound/isa/gus/gus_mixer.c

17

#define GF1_SINGLE(xname, xindex, shift, invert) \

sound/isa/gus/gus_mixer.c

21

.private_value = shift | (invert << 8) }

sound/isa/gus/gus_mixer.c

28

int shift = kcontrol->private_value & 0xff;

sound/isa/gus/gus_mixer.c

31

ucontrol->value.integer.value[0] = (gus->mix_cntrl_reg >> shift) & 1;

sound/isa/gus/gus_mixer.c

40

int shift = kcontrol->private_value & 0xff;

sound/isa/gus/gus_mixer.c

48

nval <<= shift;

sound/isa/gus/gus_mixer.c

51

nval = (oval & ~(1 << shift)) | nval;

sound/isa/opl3sa2.c

315

#define OPL3SA2_SINGLE(xname, xindex, reg, shift, mask, invert) \

sound/isa/opl3sa2.c

319

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

sound/isa/opl3sa2.c

320

#define OPL3SA2_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \

sound/isa/opl3sa2.c

326

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \

sound/isa/opl3sa2.c

333

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/opl3sa2.c

338

ucontrol->value.integer.value[0] = (chip->ctlregs[reg] >> shift) & mask;

sound/isa/opl3sa2.c

348

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/opl3sa2.c

357

val <<= shift;

sound/isa/opl3sa2.c

360

val = (oval & ~(mask << shift)) | val;

sound/isa/sb/sb_mixer.c

61

int shift = (kcontrol->private_value >> 16) & 0xff;

sound/isa/sb/sb_mixer.c

66

val = (snd_sbmixer_read(sb, reg) >> shift) & mask;

sound/isa/sb/sb_mixer.c

75

int shift = (kcontrol->private_value >> 16) & 0x07;

sound/isa/sb/sb_mixer.c

80

val = (ucontrol->value.integer.value[0] & mask) << shift;

sound/isa/sb/sb_mixer.c

83

val = (oval & ~(mask << shift)) | val;

sound/isa/wss/wss_lib.c

1947

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/wss/wss_lib.c

1952

ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;

sound/isa/wss/wss_lib.c

1964

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/isa/wss/wss_lib.c

1973

val <<= shift;

sound/isa/wss/wss_lib.c

1975

val = (chip->image[reg] & ~(mask << shift)) | val;

sound/pci/ac97/ac97_codec.c

1116

static void snd_ac97_change_volume_params2(struct snd_ac97 * ac97, int reg, int shift, unsigned char *max)

sound/pci/ac97/ac97_codec.c

1121

val = AC97_MUTE_MASK_STEREO | (0x20 << shift);

sound/pci/ac97/ac97_codec.c

2831

int shift = (kcontrol->private_value >> 8) & 0x0f;

sound/pci/ac97/ac97_codec.c

2834

if (shift != rshift)

sound/pci/ac97/ac97_codec.c

2867

int shift = (kcontrol->private_value >> 8) & 0x0f;

sound/pci/ac97/ac97_codec.c

2870

if (shift != rshift)

sound/pci/ac97/ac97_codec.c

515

int shift = (kcontrol->private_value >> 8) & 0x0f;

sound/pci/ac97/ac97_codec.c

519

uinfo->count = shift == rshift ? 1 : 2;

sound/pci/ac97/ac97_codec.c

530

int shift = (kcontrol->private_value >> 8) & 0x0f;

sound/pci/ac97/ac97_codec.c

537

ucontrol->value.integer.value[0] = (snd_ac97_read_cache(ac97, reg) >> shift) & mask;

sound/pci/ac97/ac97_codec.c

538

if (shift != rshift)

sound/pci/ac97/ac97_codec.c

542

if (shift != rshift)

sound/pci/ac97/ac97_codec.c

554

int shift = (kcontrol->private_value >> 8) & 0x0f;

sound/pci/ac97/ac97_codec.c

565

val_mask = mask << shift;

sound/pci/ac97/ac97_codec.c

566

val = val << shift;

sound/pci/ac97/ac97_codec.c

567

if (shift != rshift) {

sound/pci/ac97/ac97_codec.c

796

int shift = (kcontrol->private_value >> 8) & 0x0f;

sound/pci/ac97/ac97_codec.c

805

mask <<= shift;

sound/pci/ac97/ac97_codec.c

806

value <<= shift;

sound/pci/ac97/ac97_patch.c

1090

int shift = kcontrol->private_value;

sound/pci/ac97/ac97_patch.c

1093

val = ac97->regs[AC97_SIGMATEL_OUTSEL] >> shift;

sound/pci/ac97/ac97_patch.c

1104

int shift = kcontrol->private_value;

sound/pci/ac97/ac97_patch.c

1114

7 << shift, val << shift, 0);

sound/pci/ac97/ac97_patch.c

1129

int shift = kcontrol->private_value;

sound/pci/ac97/ac97_patch.c

1133

ucontrol->value.enumerated.item[0] = (val >> shift) & 7;

sound/pci/ac97/ac97_patch.c

1140

int shift = kcontrol->private_value;

sound/pci/ac97/ac97_patch.c

1142

return ac97_update_bits_page(ac97, AC97_SIGMATEL_INSEL, 7 << shift,

sound/pci/ac97/ac97_patch.c

1143

ucontrol->value.enumerated.item[0] << shift, 0);

sound/pci/ac97/ac97_patch.c

1171

#define STAC9758_OUTPUT_JACK(xname, shift) \

sound/pci/ac97/ac97_patch.c

1176

.private_value = shift }

sound/pci/ac97/ac97_patch.c

1177

#define STAC9758_INPUT_JACK(xname, shift) \

sound/pci/ac97/ac97_patch.c

1182

.private_value = shift }

sound/pci/ac97/ac97_patch.c

3650

unsigned short shift;

sound/pci/ac97/ac97_patch.c

3660

.shift = 0,

sound/pci/ac97/ac97_patch.c

3668

.shift = 2,

sound/pci/ac97/ac97_patch.c

3676

.shift = 4,

sound/pci/ac97/ac97_patch.c

3711

vt1618_uaj[kcontrol->private_value].shift;

sound/pci/ac97/ac97_patch.c

3722

vt1618_uaj[kcontrol->private_value].shift,

sound/pci/ac97/ac97_patch.h

10

#define AC97_SINGLE_VALUE(reg,shift,mask,invert) \

sound/pci/ac97/ac97_patch.h

11

((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | \

sound/pci/ac97/ac97_patch.h

13

#define AC97_PAGE_SINGLE_VALUE(reg,shift,mask,invert,page) \

sound/pci/ac97/ac97_patch.h

14

(AC97_SINGLE_VALUE(reg,shift,mask,invert) | (1<<25) | ((page) << 26))

sound/pci/ac97/ac97_patch.h

15

#define AC97_SINGLE(xname, reg, shift, mask, invert) \

sound/pci/ac97/ac97_patch.h

19

.private_value = AC97_SINGLE_VALUE(reg, shift, mask, invert) }

sound/pci/ac97/ac97_patch.h

20

#define AC97_PAGE_SINGLE(xname, reg, shift, mask, invert, page) \

sound/pci/ac97/ac97_patch.h

24

.private_value = AC97_PAGE_SINGLE_VALUE(reg, shift, mask, invert, page) }

sound/pci/ak4531_codec.c

103

val <<= shift;

sound/pci/ak4531_codec.c

105

val = (ak4531->regs[reg] & ~(mask << shift)) | val;

sound/pci/ak4531_codec.c

46

#define AK4531_SINGLE(xname, xindex, reg, shift, mask, invert) \

sound/pci/ak4531_codec.c

50

.private_value = reg | (shift << 16) | (mask << 24) | (invert << 22) }

sound/pci/ak4531_codec.c

51

#define AK4531_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \

sound/pci/ak4531_codec.c

57

.private_value = reg | (shift << 16) | (mask << 24) | (invert << 22), \

sound/pci/ak4531_codec.c

75

int shift = (kcontrol->private_value >> 16) & 0x07;

sound/pci/ak4531_codec.c

81

val = (ak4531->regs[reg] >> shift) & mask;

sound/pci/ak4531_codec.c

93

int shift = (kcontrol->private_value >> 16) & 0x07;

sound/pci/azt3328.c

872

#define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \

sound/pci/azt3328.c

876

.private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \

sound/pci/azt3328.c

893

#define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \

sound/pci/azt3328.c

897

.private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \

sound/pci/azt3328.c

900

#define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \

sound/pci/azt3328.c

904

.private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \

sound/pci/cmipci.c

1954

#define CMIPCI_SB_VOL_STEREO(xname,reg,shift,mask) CMIPCI_DOUBLE(xname, reg, reg+1, shift, shift, mask, 0, 1)

sound/pci/cmipci.c

1955

#define CMIPCI_SB_VOL_MONO(xname,reg,shift,mask) CMIPCI_DOUBLE(xname, reg, reg, shift, shift, mask, 0, 0)

sound/pci/cmipci.c

1957

#define CMIPCI_SB_SW_MONO(xname,shift) CMIPCI_DOUBLE(xname, SB_DSP4_OUTPUT_SW, SB_DSP4_OUTPUT_SW, shift, shift, 1, 0, 0)

sound/pci/cmipci.c

2116

#define CMIPCI_MIXER_SW_MONO(xname, reg, shift, invert) \

sound/pci/cmipci.c

2120

.private_value = COMPOSE_SB_REG(reg, reg, shift, shift, 1, invert, 0), \

sound/pci/cmipci.c

2130

#define CMIPCI_MIXER_VOL_MONO(xname, reg, shift, mask) \

sound/pci/cmipci.c

2134

.private_value = COMPOSE_SB_REG(reg, reg, shift, shift, mask, 0, 0), \

sound/pci/cmipci.c

421

unsigned int shift;

sound/pci/cmipci.c

755

rec->shift = 0;

sound/pci/cmipci.c

759

rec->shift++; /* 24/32bit */

sound/pci/cmipci.c

770

rec->dma_size = runtime->buffer_size << rec->shift;

sound/pci/cmipci.c

771

period_size = runtime->period_size << rec->shift;

sound/pci/cmipci.c

919

ptr = (rec->dma_size - (rem + 1)) >> rec->shift;

sound/pci/cs46xx/cs46xx.h

1624

unsigned int shift; /* Shift count to trasform frames in bytes */

sound/pci/cs46xx/cs46xx.h

1661

unsigned int shift; /* Shift count to trasform frames in bytes */

sound/pci/cs46xx/cs46xx_lib.c

1196

cpcm->shift = 2;

sound/pci/cs46xx/cs46xx_lib.c

1199

cpcm->shift--;

sound/pci/cs46xx/cs46xx_lib.c

1204

cpcm->shift--;

sound/pci/cs46xx/cs46xx_lib.c

1220

cpcm->pcm_rec.hw_buffer_size = runtime->period_size * CS46XX_FRAGS << cpcm->shift;

sound/pci/cs46xx/cs46xx_lib.c

1226

tmp |= (4 << cpcm->shift) - 1;

sound/pci/cs46xx/cs46xx_lib.c

1236

tmp |= (4 << cpcm->shift) - 1;

sound/pci/cs46xx/cs46xx_lib.c

1290

chip->capt.shift = 2;

sound/pci/cs46xx/cs46xx_lib.c

907

return ptr >> cpcm->shift;

sound/pci/cs46xx/cs46xx_lib.c

931

return ptr >> chip->capt.shift;

sound/pci/emu10k1/emu10k1_callback.c

373

unsigned int shift = (vp->apitch - 0xe000) >> 10;

sound/pci/emu10k1/emu10k1_callback.c

374

ccca |= shift << 25;

sound/pci/emu10k1/emu10k1_patch.c

112

size = BLANK_HEAD_SIZE << shift;

sound/pci/emu10k1/emu10k1_patch.c

118

size = loop_end << shift;

sound/pci/emu10k1/emu10k1_patch.c

123

data += loop_start << shift;

sound/pci/emu10k1/emu10k1_patch.c

125

size = loop_size << shift;

sound/pci/emu10k1/emu10k1_patch.c

131

size = (data_end - loop_start) << shift;

sound/pci/emu10k1/emu10k1_patch.c

133

size = data_end << shift;

sound/pci/emu10k1/emu10k1_patch.c

31

int shift;

sound/pci/emu10k1/emu10k1_patch.c

49

shift = 0;

sound/pci/emu10k1/emu10k1_patch.c

53

shift = 1;

sound/pci/emu10k1/emu10k1_patch.c

99

blocksize = truesize << shift;

sound/pci/es1938.c

1104

#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \

sound/pci/es1938.c

1110

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \

sound/pci/es1938.c

1112

#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \

sound/pci/es1938.c

1116

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

sound/pci/es1938.c

1135

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/pci/es1938.c

1141

ucontrol->value.integer.value[0] = (val >> shift) & mask;

sound/pci/es1938.c

1152

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/pci/es1938.c

1160

mask <<= shift;

sound/pci/es1938.c

1161

val <<= shift;

sound/pci/fm801.c

833

#define FM801_SINGLE(xname, reg, shift, mask, invert) \

sound/pci/fm801.c

836

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

sound/pci/fm801.c

855

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/pci/fm801.c

860

value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;

sound/pci/fm801.c

871

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/pci/fm801.c

879

return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);

sound/pci/ice1712/ews.c

735

int shift = kcontrol->private_value & 0xff;

sound/pci/ice1712/ews.c

745

data[0] = (data[shift >> 3] >> (shift & 7)) & 0x01;

sound/pci/ice1712/ews.c

756

int shift = kcontrol->private_value & 0xff;

sound/pci/ice1712/ews.c

766

ndata[shift >> 3] = data[shift >> 3] & ~(1 << (shift & 7));

sound/pci/ice1712/ews.c

769

ndata[shift >> 3] |= (1 << (shift & 7));

sound/pci/ice1712/ews.c

772

ndata[shift >> 3] |= (1 << (shift & 7));

sound/pci/ice1712/ews.c

774

change = (data[shift >> 3] != ndata[shift >> 3]);

sound/pci/ice1712/ews.c

851

int shift = kcontrol->private_value & 0xff;

sound/pci/ice1712/ews.c

858

data = (data >> shift) & 1;

sound/pci/ice1712/ews.c

868

int shift = kcontrol->private_value & 0xff;

sound/pci/ice1712/ews.c

875

ndata = data & ~(1 << shift);

sound/pci/ice1712/ews.c

877

ndata |= (1 << shift);

sound/pci/ice1712/ews.c

879

ndata ^= (1 << shift);

sound/pci/ice1712/ice1712.c

1989

int change, shift;

sound/pci/ice1712/ice1712.c

2002

shift = ((idx % 2) * 8) + ((idx / 2) * 2);

sound/pci/ice1712/ice1712.c

2005

val &= ~(0x03 << shift);

sound/pci/ice1712/ice1712.c

2006

val |= nval << shift;

sound/pci/ice1712/ice1712.c

2017

shift = ((idx / 2) * 8) + ((idx % 2) * 4);

sound/pci/ice1712/ice1712.c

2020

val &= ~(0x07 << shift);

sound/pci/ice1712/ice1712.c

2021

val |= nval << shift;

sound/pci/ice1712/ice1712.c

2024

val &= ~(0x08 << shift);

sound/pci/ice1712/ice1712.c

2025

val |= nval << shift;

sound/pci/ice1712/ice1712.c

2059

int change, shift;

sound/pci/ice1712/ice1712.c

2074

shift = idx * 2;

sound/pci/ice1712/ice1712.c

2075

val &= ~(0x03 << shift);

sound/pci/ice1712/ice1712.c

2076

val |= nval << shift;

sound/pci/ice1712/ice1712.c

2077

shift = idx * 4 + 8;

sound/pci/ice1712/ice1712.c

2080

val &= ~(0x07 << shift);

sound/pci/ice1712/ice1712.c

2081

val |= nval << shift;

sound/pci/ice1712/ice1712.c

2084

val &= ~(0x08 << shift);

sound/pci/ice1712/ice1712.c

2085

val |= nval << shift;

sound/pci/ice1712/ice1712.h

475

int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift);

sound/pci/ice1712/ice1712.h

477

int shift);

sound/pci/ice1712/ice1724.c

1760

int shift = kcontrol->private_value & 0xff;

sound/pci/ice1712/ice1724.c

1765

(snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;

sound/pci/ice1712/ice1724.c

1774

int shift = kcontrol->private_value & 0xff;

sound/pci/ice1712/ice1724.c

1780

nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;

sound/pci/ice1712/ice1724.c

1783

nval |= val & ~(1 << shift);

sound/pci/ice1712/ice1724.c

2007

int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)

sound/pci/ice1712/ice1724.c

2016

val >>= shift;

sound/pci/ice1712/ice1724.c

2027

int shift)

sound/pci/ice1712/ice1724.c

2041

val &= ~(0x07 << shift);

sound/pci/ice1712/ice1724.c

2042

val |= nval << shift;

sound/pci/ice1712/maya44.c

276

#define COMPOSE_GPIO_VAL(shift, inv) ((shift) | ((inv) << 8))

sound/pci/ice1712/maya44.c

297

unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value);

sound/pci/ice1712/maya44.c

300

val = (snd_ice1712_gpio_read(chip->ice) >> shift) & 1;

sound/pci/ice1712/maya44.c

311

unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value);

sound/pci/ice1712/maya44.c

316

mask = 1 << shift;

sound/pci/ice1712/maya44.c

392

static const unsigned char shift[10] =

sound/pci/ice1712/maya44.c

394

return shift[idx % 10];

sound/pci/ice1712/revo.c

42

int reg, shift;

sound/pci/ice1712/revo.c

57

shift = 4;

sound/pci/ice1712/revo.c

60

shift = 3;

sound/pci/ice1712/revo.c

63

old = (tmp >> shift) & 0x03;

sound/pci/ice1712/revo.c

70

tmp &= ~(0x03 << shift);

sound/pci/ice1712/revo.c

71

tmp |= dfs << shift;

sound/pci/nm256/nm256.c

186

int shift; /* bit shifts */

sound/pci/nm256/nm256.c

418

s->shift = 0;

sound/pci/nm256/nm256.c

421

s->shift++;

sound/pci/nm256/nm256.c

425

s->shift++;

sound/pci/nm256/nm256.c

498

snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));

sound/pci/oxygen/oxygen_pcm.c

325

unsigned int mclks, shift;

sound/pci/oxygen/oxygen_pcm.c

333

shift = 0;

sound/pci/oxygen/oxygen_pcm.c

335

shift = 2;

sound/pci/oxygen/oxygen_pcm.c

337

shift = 4;

sound/pci/oxygen/oxygen_pcm.c

339

return OXYGEN_I2S_MCLK(mclks >> shift);

sound/pci/oxygen/xonar_wm87x6.c

610

u8 min, max, shift;

sound/pci/oxygen/xonar_wm87x6.c

626

shift = (ctl->private_value >> 20) & 0xf;

sound/pci/oxygen/xonar_wm87x6.c

633

reg_value &= ~(mask << shift);

sound/pci/oxygen/xonar_wm87x6.c

634

reg_value |= value << shift;

sound/pci/oxygen/xonar_wm87x6.c

967

#define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \

sound/pci/oxygen/xonar_wm87x6.c

971

((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags)

sound/pci/oxygen/xonar_wm87x6.c

972

#define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\

sound/pci/oxygen/xonar_wm87x6.c

974

reg, shift, init, min, max, mask, flags), \

sound/pci/sonicvibes.c

906

#define SONICVIBES_SINGLE(xname, xindex, reg, shift, mask, invert) \

sound/pci/sonicvibes.c

910

.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }

sound/pci/sonicvibes.c

927

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/pci/sonicvibes.c

932

ucontrol->value.integer.value[0] = (snd_sonicvibes_in1(sonic, reg)>> shift) & mask;

sound/pci/sonicvibes.c

942

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/pci/sonicvibes.c

951

val <<= shift;

sound/pci/sonicvibes.c

954

val = (oval & ~(mask << shift)) | val;

sound/pci/ymfpci/ymfpci.h

268

u32 shift;

sound/pci/ymfpci/ymfpci_main.c

1398

#define YMFPCI_SINGLE(xname, xindex, reg, shift) \

sound/pci/ymfpci/ymfpci_main.c

1402

.private_value = ((reg) | ((shift) << 16)) }

sound/pci/ymfpci/ymfpci_main.c

1411

unsigned int shift = (kcontrol->private_value >> 16) & 0xff;

sound/pci/ymfpci/ymfpci_main.c

1420

(snd_ymfpci_readl(chip, reg) >> shift) & mask;

sound/pci/ymfpci/ymfpci_main.c

1429

unsigned int shift = (kcontrol->private_value >> 16) & 0xff;

sound/pci/ymfpci/ymfpci_main.c

1440

val <<= shift;

sound/pci/ymfpci/ymfpci_main.c

1443

val = (oval & ~(mask << shift)) | val;

sound/pci/ymfpci/ymfpci_main.c

336

pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;

sound/pci/ymfpci/ymfpci_main.c

680

ypcm->shift = 0;

sound/pci/ymfpci/ymfpci_main.c

685

ypcm->shift++;

sound/pci/ymfpci/ymfpci_main.c

690

ypcm->shift++;

sound/pci/ymfpci/ymfpci_main.c

704

bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);

sound/pci/ymfpci/ymfpci_main.c

731

return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;

sound/ppc/awacs.c

200

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/ppc/awacs.c

205

val = (chip->awacs_reg[reg] >> shift) & 1;

sound/ppc/awacs.c

217

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/ppc/awacs.c

219

int mask = 1 << shift;

sound/ppc/burgundy.c

119

long *volume, int shift)

sound/ppc/burgundy.c

129

hardvolume = lvolume + (rvolume << shift);

sound/ppc/burgundy.c

130

if (shift == 8)

sound/ppc/burgundy.c

138

long *volume, int shift)

sound/ppc/burgundy.c

149

volume[1] = (wvolume >> shift) & 0xff;

sound/ppc/burgundy.c

171

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/ppc/burgundy.c

173

ucontrol->value.integer.value, shift);

sound/ppc/burgundy.c

182

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/ppc/burgundy.c

186

ucontrol->value.integer.value, shift);

sound/ppc/burgundy.c

187

snd_pmac_burgundy_read_volume(chip, addr, nvoices, shift);

sound/ppc/burgundy.c

192

#define BURGUNDY_VOLUME_W(xname, xindex, addr, shift) \

sound/ppc/burgundy.c

197

.private_value = ((ADDR2BASE(addr) & 0xff) | ((shift) << 8)) }

sound/soc/codecs/88pm860x-codec.c

332

unsigned int shift = mc->shift;

sound/soc/codecs/88pm860x-codec.c

336

val = snd_soc_component_read(component, reg) >> shift;

sound/soc/codecs/88pm860x-codec.c

337

val2 = snd_soc_component_read(component, reg2) >> shift;

sound/soc/codecs/88pm860x-codec.c

352

unsigned int shift = mc->shift;

sound/soc/codecs/88pm860x-codec.c

358

val_mask = mask << shift;

sound/soc/codecs/88pm860x-codec.c

362

val = val << shift;

sound/soc/codecs/88pm860x-codec.c

363

val2 = val2 << shift;

sound/soc/codecs/adav80x.c

164

#define ADAV80X_MUX_ENUM_DECL(name, reg, shift) \

sound/soc/codecs/adav80x.c

165

SOC_VALUE_ENUM_DOUBLE_DECL(name, reg, shift, 7, \

sound/soc/codecs/arizona.c

100

1 << w->shift, 1 << w->shift);

sound/soc/codecs/arizona.c

1010

switch (w->shift) {

sound/soc/codecs/arizona.c

1041

switch (w->shift) {

sound/soc/codecs/arizona.c

105

1 << w->shift, 0);

sound/soc/codecs/arizona.c

1076

unsigned int mask = 1 << w->shift;

sound/soc/codecs/arizona.c

1245

val = 1 << w->shift;

sound/soc/codecs/arizona.c

1248

val = 1 << (w->shift + 1);

sound/soc/codecs/arizona.c

895

bool arizona_input_analog(struct snd_soc_component *component, int shift)

sound/soc/codecs/arizona.c

897

unsigned int reg = ARIZONA_IN1L_CONTROL + ((shift / 2) * 8);

sound/soc/codecs/arizona.c

911

if (w->shift % 2)

sound/soc/codecs/arizona.c

912

reg = ARIZONA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8);

sound/soc/codecs/arizona.c

914

reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);

sound/soc/codecs/arizona.c

960

switch (w->shift) {

sound/soc/codecs/arizona.c

987

switch (w->shift) {

sound/soc/codecs/arizona.h

363

bool arizona_input_analog(struct snd_soc_component *component, int shift);

sound/soc/codecs/aw88166.h

440

#define AW88166_DSP_RE_TO_SHOW_RE(re, shift) (((re) * (1000)) >> (shift))

sound/soc/codecs/aw88166.h

441

#define AW88166_SHOW_RE_TO_DSP_RE(re, shift) (((re) << shift) / (1000))

sound/soc/codecs/aw88395/aw88395_device.h

29

#define AW88395_DSP_RE_TO_SHOW_RE(re, shift) (((re) * (1000)) >> (shift))

sound/soc/codecs/aw88395/aw88395_device.h

30

#define AW88395_SHOW_RE_TO_DSP_RE(re, shift) (((re) << shift) / (1000))

sound/soc/codecs/aw88399.h

504

#define AW88399_DSP_RE_TO_SHOW_RE(re, shift) (((re) * (1000)) >> (shift))

sound/soc/codecs/aw88399.h

505

#define AW88399_SHOW_RE_TO_DSP_RE(re, shift) (((re) << shift) / (1000))

sound/soc/codecs/cpcap.c

386

unsigned int shift = e->shift_l;

sound/soc/codecs/cpcap.c

400

reg_voice = (reg_voice >> shift) & 1;

sound/soc/codecs/cpcap.c

401

reg_hifi = (reg_hifi >> shift) & 1;

sound/soc/codecs/cpcap.c

402

reg_ext = (reg_ext >> shift) & 1;

sound/soc/codecs/cs35l41-lib.c

880

GENMASK(otp_map[i].shift + otp_map[i].size - 1,

sound/soc/codecs/cs35l41-lib.c

881

otp_map[i].shift),

sound/soc/codecs/cs35l41-lib.c

882

otp_val << otp_map[i].shift);

sound/soc/codecs/cs42l43.c

1046

static int cs42l43_shutter_get(struct cs42l43_codec *priv, unsigned int shift)

sound/soc/codecs/cs42l43.c

1076

ret = !(val & BIT(shift));

sound/soc/codecs/cs42l43.c

1079

BIT(shift) == CS42L43_STATUS_MIC_SHUTTER_MUTE_MASK ? "Mic" : "Speaker",

sound/soc/codecs/cs42l43.c

1554

unsigned int mask = 1 << w->shift;

sound/soc/codecs/cs42l43.c

1604

switch (w->shift) {

sound/soc/codecs/cs42l43.c

1632

dev_err(priv->dev, "Invalid microphone shift: %d\n", w->shift);

sound/soc/codecs/cs42l43.c

1664

unsigned int mask = 1 << w->shift;

sound/soc/codecs/cs47l15.c

88

ret = madera_set_adsp_clk(&cs47l15->core, w->shift, freq);

sound/soc/codecs/cs47l35.c

109

ret = madera_set_adsp_clk(&cs47l35->core, w->shift, freq);

sound/soc/codecs/cs47l35.c

133

switch (w->shift) {

sound/soc/codecs/cs47l35.c

156

switch (w->shift) {

sound/soc/codecs/cs47l85.c

133

ret = madera_set_adsp_clk(&cs47l85->core, w->shift, freq);

sound/soc/codecs/cs47l85.c

195

switch (w->shift) {

sound/soc/codecs/cs47l85.c

218

switch (w->shift) {

sound/soc/codecs/cs47l90.c

130

ret = madera_set_adsp_clk(&cs47l90->core, w->shift, freq);

sound/soc/codecs/cs47l92.c

159

ret = madera_set_adsp_clk(&cs47l92->core, w->shift, freq);

sound/soc/codecs/cs48l32.c

1017

if (params->shift == 0)

sound/soc/codecs/cs48l32.c

1043

if (params->shift == 0)

sound/soc/codecs/cs48l32.c

2313

int slot, i, j = 0, shift;

sound/soc/codecs/cs48l32.c

2327

shift = (8 * (i - j * 4));

sound/soc/codecs/cs48l32.c

2329

frame_ctls[j] |= slot << shift;

sound/soc/codecs/cs48l32.c

2396

if (w->shift % 2)

sound/soc/codecs/cs48l32.c

2401

reg += (w->shift / 2) * (CS48L32_IN2L_CONTROL2 - CS48L32_IN1L_CONTROL2);

sound/soc/codecs/cs48l32.c

2405

switch (w->shift) {

sound/soc/codecs/cs48l32.c

2426

switch (w->shift) {

sound/soc/codecs/cs48l32.c

2508

unsigned int mode = cs48l32_codec->eq_mode[w->shift];

sound/soc/codecs/cs48l32.c

2510

__be16 *data = &cs48l32_codec->eq_coefficients[w->shift][0];

sound/soc/codecs/cs48l32.c

2514

reg += w->shift * (CS48L32_EQ2_BAND1_COEFF1 - CS48L32_EQ1_BAND1_COEFF1);

sound/soc/codecs/cs48l32.c

2536

mode << w->shift);

sound/soc/codecs/cs48l32.h

182

.shift = xshift, .block_base = xbase, .max = 65535 } }

sound/soc/codecs/cs48l32.h

306

unsigned int shift;

sound/soc/codecs/cs530x.c

282

(w->shift * 2), CS530X_INOUT_MUTE);

sound/soc/codecs/cs530x.c

284

((w->shift + 1) * 2), CS530X_INOUT_MUTE);

sound/soc/codecs/cs530x.c

295

(w->shift * 2), CS530X_INOUT_MUTE);

sound/soc/codecs/cs530x.c

297

((w->shift + 1) * 2), CS530X_INOUT_MUTE);

sound/soc/codecs/cs530x.c

368

(w->shift * 2), CS530X_INOUT_MUTE);

sound/soc/codecs/cs530x.c

370

((w->shift + 1) * 2), CS530X_INOUT_MUTE);

sound/soc/codecs/cs530x.c

381

(w->shift * 2), CS530X_INOUT_MUTE);

sound/soc/codecs/cs530x.c

383

((w->shift + 1) * 2), CS530X_INOUT_MUTE);

sound/soc/codecs/cx2072x.c

1150

.num_kcontrols = 0, .reg = wreg, .shift = wshift, .mask = wmask, \

sound/soc/codecs/cx2072x.c

1157

.num_kcontrols = 0, .reg = wreg, .shift = wshift, .mask = wmask, \

sound/soc/codecs/cx2072x.c

1164

.num_kcontrols = 0, .reg = wreg, .shift = wshift, .mask = wmask, \

sound/soc/codecs/cx2072x.c

1171

.reg = wreg, .shift = wshift, .mask = wmask, \

sound/soc/codecs/da7218.c

453

unsigned int lshift = mc->shift;

sound/soc/codecs/da7218.c

522

unsigned int lshift = mixer_ctrl->shift;

sound/soc/codecs/da7218.c

547

unsigned int lshift = mixer_ctrl->shift;

sound/soc/codecs/da732x.c

663

(1 << w->shift) | DA732X_OUT_HIZ_EN,

sound/soc/codecs/da732x.c

664

(1 << w->shift) | DA732X_OUT_HIZ_EN);

sound/soc/codecs/da732x.c

668

(1 << w->shift) | DA732X_OUT_HIZ_EN,

sound/soc/codecs/da732x.c

669

(1 << w->shift) | DA732X_OUT_HIZ_DIS);

sound/soc/codecs/hdac_hdmi.c

697

w->shift = 0;

sound/soc/codecs/idt821034.c

624

unsigned int id = w->shift;

sound/soc/codecs/lpass-rx-macro.c

2141

reg = CDC_RX_RXn_RX_PATH_CTL(rx, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2142

gain_reg = CDC_RX_RXn_RX_VOL_CTL(rx, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2146

rx_macro_enable_interp_clk(component, event, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2147

if (rx_macro_adie_lb(component, w->shift))

sound/soc/codecs/lpass-rx-macro.c

2157

rx_macro_enable_interp_clk(component, event, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2434

int comp = ((struct soc_mixer_control *) kcontrol->private_value)->shift;

sound/soc/codecs/lpass-rx-macro.c

2445

int comp = ((struct soc_mixer_control *) kcontrol->private_value)->shift;

sound/soc/codecs/lpass-rx-macro.c

2462

rx->rx_port_value[widget->shift];

sound/soc/codecs/lpass-rx-macro.c

2478

aif_rst = rx->rx_port_value[widget->shift];

sound/soc/codecs/lpass-rx-macro.c

2487

rx->rx_port_value[widget->shift] = rx_port_value;

sound/soc/codecs/lpass-rx-macro.c

2497

clear_bit(widget->shift, &rx->active_ch_mask[dai_id]);

sound/soc/codecs/lpass-rx-macro.c

2507

set_bit(widget->shift, &rx->active_ch_mask[dai_id]);

sound/soc/codecs/lpass-rx-macro.c

2777

gain_reg = CDC_RX_RXn_RX_VOL_MIX_CTL(rx, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2778

mix_reg = CDC_RX_RXn_RX_PATH_MIX_CTL(rx, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2782

rx_macro_enable_interp_clk(component, event, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2792

rx_macro_enable_interp_clk(component, event, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2813

rx_macro_enable_interp_clk(component, event, w->shift);

sound/soc/codecs/lpass-rx-macro.c

2814

snd_soc_component_write_field(component, CDC_RX_RXn_RX_PATH_CFG1(rx, w->shift),

sound/soc/codecs/lpass-rx-macro.c

2816

snd_soc_component_write_field(component, CDC_RX_RXn_RX_PATH_CTL(rx, w->shift),

sound/soc/codecs/lpass-rx-macro.c

2820

snd_soc_component_write_field(component, CDC_RX_RXn_RX_PATH_CFG1(rx, w->shift),

sound/soc/codecs/lpass-rx-macro.c

2822

rx_macro_enable_interp_clk(component, event, w->shift);

sound/soc/codecs/lpass-tx-macro.c

784

if (widget->shift) {

sound/soc/codecs/lpass-tx-macro.c

845

if (widget->shift) /* MSM DMIC */

sound/soc/codecs/lpass-tx-macro.c

865

u32 dai_id = widget->shift;

sound/soc/codecs/lpass-tx-macro.c

866

u32 dec_id = mc->shift;

sound/soc/codecs/lpass-tx-macro.c

884

u32 dai_id = widget->shift;

sound/soc/codecs/lpass-tx-macro.c

885

u32 dec_id = mc->shift;

sound/soc/codecs/lpass-tx-macro.c

922

decimator = w->shift;

sound/soc/codecs/lpass-va-macro.c

571

u32 dai_id = widget->shift;

sound/soc/codecs/lpass-va-macro.c

572

u32 dec_id = mc->shift;

sound/soc/codecs/lpass-va-macro.c

592

u32 dai_id = widget->shift;

sound/soc/codecs/lpass-va-macro.c

593

u32 dec_id = mc->shift;

sound/soc/codecs/lpass-va-macro.c

725

unsigned int dmic = w->shift;

sound/soc/codecs/lpass-va-macro.c

750

decimator = w->shift;

sound/soc/codecs/lpass-wsa-macro.c

1847

if (w->shift == WSA_MACRO_COMP1) {

sound/soc/codecs/lpass-wsa-macro.c

1850

} else if (w->shift == WSA_MACRO_COMP2) {

sound/soc/codecs/lpass-wsa-macro.c

1861

wsa_macro_config_compander(component, w->shift, event);

sound/soc/codecs/lpass-wsa-macro.c

1862

wsa_macro_config_softclip(component, w->shift, event);

sound/soc/codecs/lpass-wsa-macro.c

1888

wsa_macro_config_compander(component, w->shift, event);

sound/soc/codecs/lpass-wsa-macro.c

1889

wsa_macro_config_softclip(component, w->shift, event);

sound/soc/codecs/lpass-wsa-macro.c

1980

switch (w->shift) {

sound/soc/codecs/lpass-wsa-macro.c

1991

__func__, w->shift);

sound/soc/codecs/lpass-wsa-macro.c

2015

int ec_tx = ((struct soc_mixer_control *) kcontrol->private_value)->shift;

sound/soc/codecs/lpass-wsa-macro.c

2027

int ec_tx = ((struct soc_mixer_control *) kcontrol->private_value)->shift;

sound/soc/codecs/lpass-wsa-macro.c

2041

int comp = ((struct soc_mixer_control *) kcontrol->private_value)->shift;

sound/soc/codecs/lpass-wsa-macro.c

2052

int comp = ((struct soc_mixer_control *) kcontrol->private_value)->shift;

sound/soc/codecs/lpass-wsa-macro.c

2092

wsa->rx_port_value[widget->shift];

sound/soc/codecs/lpass-wsa-macro.c

2110

aif_rst = wsa->rx_port_value[widget->shift];

sound/soc/codecs/lpass-wsa-macro.c

2119

wsa->rx_port_value[widget->shift] = rx_port_value;

sound/soc/codecs/lpass-wsa-macro.c

2121

bit_input = widget->shift;

sound/soc/codecs/lpass-wsa-macro.c

2159

int path = ((struct soc_mixer_control *)kcontrol->private_value)->shift;

sound/soc/codecs/lpass-wsa-macro.c

2171

int path = ((struct soc_mixer_control *) kcontrol->private_value)->shift;

sound/soc/codecs/lpass-wsa-macro.c

2237

u32 spk_tx_id = mixer->shift;

sound/soc/codecs/lpass-wsa-macro.c

2238

u32 dai_id = widget->shift;

sound/soc/codecs/lpass-wsa-macro.c

2256

u32 spk_tx_id = mixer->shift;

sound/soc/codecs/lpass-wsa-macro.c

2257

u32 dai_id = widget->shift;

sound/soc/codecs/madera.c

2260

if (w->shift % 2)

sound/soc/codecs/madera.c

2261

reg = MADERA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8);

sound/soc/codecs/madera.c

2263

reg = MADERA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);

sound/soc/codecs/madera.c

2322

switch (w->shift) {

sound/soc/codecs/madera.c

2338

switch (w->shift) {

sound/soc/codecs/madera.c

2358

switch (w->shift) {

sound/soc/codecs/madera.c

2374

switch (w->shift) {

sound/soc/codecs/madera.c

2405

unsigned int mask = 1 << w->shift;

sound/soc/codecs/madera.c

2406

unsigned int out_num = w->shift / 2;

sound/soc/codecs/madera.c

2459

val = 1 << w->shift;

sound/soc/codecs/madera.c

2462

val = 1 << (w->shift + 1);

sound/soc/codecs/madera.c

293

1 << w->shift, 1 << w->shift);

sound/soc/codecs/madera.c

297

1 << w->shift, 0);

sound/soc/codecs/madera.c

3831

unsigned int shift)

sound/soc/codecs/madera.c

3845

src = (src & mask) >> shift;

sound/soc/codecs/madera.c

505

int dom_grp = w->shift;

sound/soc/codecs/max98088.c

669

(1 << w->shift), (1 << w->shift));

sound/soc/codecs/max98088.c

675

(1 << w->shift), 0);

sound/soc/codecs/max98090.c

372

val = (val >> mc->shift) & mask;

sound/soc/codecs/max98090.c

415

val = (val >> mc->shift) & mask;

sound/soc/codecs/max98090.c

433

mask << mc->shift,

sound/soc/codecs/max98090.c

434

sel << mc->shift);

sound/soc/codecs/max98095.c

641

(1 << w->shift), (1 << w->shift));

sound/soc/codecs/max98095.c

647

(1 << w->shift), 0);

sound/soc/codecs/max98095.c

681

(1 << (w->shift+2)), (1 << (w->shift+2)));

sound/soc/codecs/max98095.c

685

(1 << (w->shift+2)), 0);

sound/soc/codecs/msm8916-wcd-digital.c

365

if (w->shift == 0)

sound/soc/codecs/msm8916-wcd-digital.c

367

else if (w->shift == 1)

sound/soc/codecs/msm8916-wcd-digital.c

584

snd_soc_component_write(component, rx_gain_reg[w->shift],

sound/soc/codecs/msm8916-wcd-digital.c

585

snd_soc_component_read(component, rx_gain_reg[w->shift]));

sound/soc/codecs/msm8916-wcd-digital.c

589

1 << w->shift, 1 << w->shift);

sound/soc/codecs/msm8916-wcd-digital.c

591

1 << w->shift, 0x0);

sound/soc/codecs/msm8916-wcd-digital.c

602

unsigned int decimator = w->shift + 1;

sound/soc/codecs/msm8916-wcd-digital.c

632

snd_soc_component_write(component, tx_gain_reg[w->shift],

sound/soc/codecs/msm8916-wcd-digital.c

633

snd_soc_component_read(component, tx_gain_reg[w->shift]));

sound/soc/codecs/msm8916-wcd-digital.c

646

snd_soc_component_update_bits(component, dec_reset_reg, 1 << w->shift,

sound/soc/codecs/msm8916-wcd-digital.c

647

1 << w->shift);

sound/soc/codecs/msm8916-wcd-digital.c

648

snd_soc_component_update_bits(component, dec_reset_reg, 1 << w->shift, 0x0);

sound/soc/codecs/mt6351.c

587

0x1 << w->shift,

sound/soc/codecs/mt6351.c

588

0x1 << w->shift);

sound/soc/codecs/mt6351.c

593

0x1 << w->shift,

sound/soc/codecs/mt6351.c

594

0x1 << w->shift);

sound/soc/codecs/mt6351.c

602

0x1 << w->shift,

sound/soc/codecs/mt6351.c

603

0x1 << w->shift);

sound/soc/codecs/mt6351.c

608

0x1 << w->shift,

sound/soc/codecs/mt6351.c

609

0x1 << w->shift);

sound/soc/codecs/pcm6240.c

105

.shift = 0,

sound/soc/codecs/pcm6240.c

111

.shift = 0,

sound/soc/codecs/pcm6240.c

117

.shift = 0,

sound/soc/codecs/pcm6240.c

123

.shift = 0,

sound/soc/codecs/pcm6240.c

129

.shift = 0,

sound/soc/codecs/pcm6240.c

135

.shift = 0,

sound/soc/codecs/pcm6240.c

144

.shift = 2,

sound/soc/codecs/pcm6240.c

150

.shift = 2,

sound/soc/codecs/pcm6240.c

156

.shift = 2,

sound/soc/codecs/pcm6240.c

162

.shift = 2,

sound/soc/codecs/pcm6240.c

171

.shift = 0,

sound/soc/codecs/pcm6240.c

177

.shift = 0,

sound/soc/codecs/pcm6240.c

183

.shift = 0,

sound/soc/codecs/pcm6240.c

189

.shift = 0,

sound/soc/codecs/pcm6240.c

198

.shift = 2,

sound/soc/codecs/pcm6240.c

204

.shift = 2,

sound/soc/codecs/pcm6240.c

210

.shift = 2,

sound/soc/codecs/pcm6240.c

216

.shift = 2,

sound/soc/codecs/pcm6240.c

222

.shift = 2,

sound/soc/codecs/pcm6240.c

228

.shift = 2,

sound/soc/codecs/pcm6240.c

237

.shift = 0,

sound/soc/codecs/pcm6240.c

243

.shift = 0,

sound/soc/codecs/pcm6240.c

249

.shift = 0,

sound/soc/codecs/pcm6240.c

255

.shift = 0,

sound/soc/codecs/pcm6240.c

261

.shift = 0,

sound/soc/codecs/pcm6240.c

267

.shift = 0,

sound/soc/codecs/pcm6240.c

276

.shift = 0,

sound/soc/codecs/pcm6240.c

282

.shift = 0,

sound/soc/codecs/pcm6240.c

291

.shift = 0,

sound/soc/codecs/pcm6240.c

297

.shift = 0,

sound/soc/codecs/pcm6240.c

303

.shift = 0,

sound/soc/codecs/pcm6240.c

309

.shift = 0,

sound/soc/codecs/pcm6240.c

318

.shift = 4,

sound/soc/codecs/pcm6240.c

324

.shift = 4,

sound/soc/codecs/pcm6240.c

330

.shift = 4,

sound/soc/codecs/pcm6240.c

336

.shift = 4,

sound/soc/codecs/pcm6240.c

345

.shift = 0,

sound/soc/codecs/pcm6240.c

351

.shift = 0,

sound/soc/codecs/pcm6240.c

357

.shift = 0,

sound/soc/codecs/pcm6240.c

363

.shift = 0,

sound/soc/codecs/pcm6240.c

369

.shift = 0,

sound/soc/codecs/pcm6240.c

375

.shift = 0,

sound/soc/codecs/pcm6240.c

381

.shift = 0,

sound/soc/codecs/pcm6240.c

387

.shift = 0,

sound/soc/codecs/pcm6240.c

396

.shift = 4,

sound/soc/codecs/pcm6240.c

402

.shift = 4,

sound/soc/codecs/pcm6240.c

408

.shift = 4,

sound/soc/codecs/pcm6240.c

414

.shift = 4,

sound/soc/codecs/pcm6240.c

420

.shift = 4,

sound/soc/codecs/pcm6240.c

426

.shift = 4,

sound/soc/codecs/pcm6240.c

432

.shift = 4,

sound/soc/codecs/pcm6240.c

438

.shift = 4,

sound/soc/codecs/pcm6240.c

447

.shift = 0,

sound/soc/codecs/pcm6240.c

453

.shift = 0,

sound/soc/codecs/pcm6240.c

459

.shift = 0,

sound/soc/codecs/pcm6240.c

465

.shift = 0,

sound/soc/codecs/pcm6240.c

474

.shift = 4,

sound/soc/codecs/pcm6240.c

480

.shift = 4,

sound/soc/codecs/pcm6240.c

486

.shift = 4,

sound/soc/codecs/pcm6240.c

492

.shift = 0,

sound/soc/codecs/pcm6240.c

604

unsigned int shift = mc->shift;

sound/soc/codecs/pcm6240.c

63

.shift = 1,

sound/soc/codecs/pcm6240.c

638

val = (val >> shift) & mask;

sound/soc/codecs/pcm6240.c

677

unsigned int shift = mc->shift;

sound/soc/codecs/pcm6240.c

685

val_mask = mask << shift;

sound/soc/codecs/pcm6240.c

686

val = val << shift;

sound/soc/codecs/pcm6240.c

69

.shift = 1,

sound/soc/codecs/pcm6240.c

78

.shift = 0,

sound/soc/codecs/pcm6240.c

84

.shift = 0,

sound/soc/codecs/pcm6240.c

93

.shift = 0,

sound/soc/codecs/pcm6240.c

99

.shift = 0,

sound/soc/codecs/pcm6240.h

236

unsigned int shift;

sound/soc/codecs/pm4125.c

654

if (w->shift == 1 &&

sound/soc/codecs/pm4125.c

659

if (w->shift)

sound/soc/codecs/pm4125.c

669

if (w->shift == 1 && test_bit(AMIC2_BCS_ENABLE, &pm4125->status_mask))

sound/soc/codecs/pm4125.c

672

if (w->shift)

sound/soc/codecs/pm4125.c

799

int micb_num = w->shift;

sound/soc/codecs/pm4125.c

826

int micb_num = w->shift;

sound/soc/codecs/pm4125.c

876

hphr = mc->shift;

sound/soc/codecs/pm4125.c

893

hphr = mc->shift;

sound/soc/codecs/pm4125.c

920

int dai_id = mixer->shift;

sound/soc/codecs/pm4125.c

938

int dai_id = mixer->shift;

sound/soc/codecs/rk3308_codec.c

190

mask << w->shift, val << w->shift);

sound/soc/codecs/rt5645.c

914

unsigned int reg, shift, val;

sound/soc/codecs/rt5645.c

916

switch (source->shift) {

sound/soc/codecs/rt5645.c

919

shift = 0;

sound/soc/codecs/rt5645.c

923

shift = 4;

sound/soc/codecs/rt5645.c

927

shift = 0;

sound/soc/codecs/rt5645.c

931

shift = 4;

sound/soc/codecs/rt5645.c

935

shift = 8;

sound/soc/codecs/rt5645.c

939

shift = 12;

sound/soc/codecs/rt5645.c

945

val = (snd_soc_component_read(component, reg) >> shift) & 0xf;

sound/soc/codecs/rt5659.c

1672

unsigned int reg, shift, val;

sound/soc/codecs/rt5659.c

1675

switch (w->shift) {

sound/soc/codecs/rt5659.c

1678

shift = RT5659_AD_MONO_R_T_SFT;

sound/soc/codecs/rt5659.c

1682

shift = RT5659_AD_MONO_L_T_SFT;

sound/soc/codecs/rt5659.c

1686

shift = RT5659_AD_STO1_T_SFT;

sound/soc/codecs/rt5659.c

1690

shift = RT5659_DA_MONO_R_T_SFT;

sound/soc/codecs/rt5659.c

1694

shift = RT5659_DA_MONO_L_T_SFT;

sound/soc/codecs/rt5659.c

1698

shift = RT5659_DA_STO_T_SFT;

sound/soc/codecs/rt5659.c

1704

val = (snd_soc_component_read(component, reg) >> shift) & 0xf;

sound/soc/codecs/rt5663.c

2087

unsigned int reg, shift, val;

sound/soc/codecs/rt5663.c

2092

switch (w->shift) {

sound/soc/codecs/rt5663.c

2095

shift = RT5663_V2_AD_STO1_TRACK_SHIFT;

sound/soc/codecs/rt5663.c

2099

shift = RT5663_DA_STO1_TRACK_SHIFT;

sound/soc/codecs/rt5663.c

2105

switch (w->shift) {

sound/soc/codecs/rt5663.c

2108

shift = RT5663_AD_STO1_TRACK_SHIFT;

sound/soc/codecs/rt5663.c

2112

shift = RT5663_DA_STO1_TRACK_SHIFT;

sound/soc/codecs/rt5663.c

2119

val = (snd_soc_component_read(component, reg) >> shift) & 0x7;

sound/soc/codecs/rt5663.c

2900

int mask, shift, val;

sound/soc/codecs/rt5663.c

2919

shift = RT5663_V2_PLL1_SRC_SHIFT;

sound/soc/codecs/rt5663.c

2923

shift = RT5663_PLL1_SRC_SHIFT;

sound/soc/codecs/rt5663.c

2941

snd_soc_component_update_bits(component, RT5663_GLB_CLK, mask, (val << shift));

sound/soc/codecs/rt5665.c

1436

unsigned int reg, shift, val;

sound/soc/codecs/rt5665.c

1439

switch (w->shift) {

sound/soc/codecs/rt5665.c

1442

shift = RT5665_AD_MONOR_CLK_SEL_SFT;

sound/soc/codecs/rt5665.c

1446

shift = RT5665_AD_MONOL_CLK_SEL_SFT;

sound/soc/codecs/rt5665.c

1450

shift = RT5665_AD_STO1_CLK_SEL_SFT;

sound/soc/codecs/rt5665.c

1454

shift = RT5665_AD_STO2_CLK_SEL_SFT;

sound/soc/codecs/rt5665.c

1458

shift = RT5665_DA_MONOR_CLK_SEL_SFT;

sound/soc/codecs/rt5665.c

1462

shift = RT5665_DA_MONOL_CLK_SEL_SFT;

sound/soc/codecs/rt5665.c

1466

shift = RT5665_DA_STO1_CLK_SEL_SFT;

sound/soc/codecs/rt5665.c

1470

shift = RT5665_DA_STO2_CLK_SEL_SFT;

sound/soc/codecs/rt5665.c

1476

val = (snd_soc_component_read(component, reg) >> shift) & 0xf;

sound/soc/codecs/rt5665.c

2476

switch (w->shift) {

sound/soc/codecs/rt5665.c

2499

switch (w->shift) {

sound/soc/codecs/rt5665.c

2533

switch (w->shift) {

sound/soc/codecs/rt5668.c

1154

if (w->shift == RT5668_PWR_ADC_S1F_BIT &&

sound/soc/codecs/rt5668.c

1162

if (w->shift == RT5668_PWR_ADC_S1F_BIT)

sound/soc/codecs/rt5668.c

1191

unsigned int reg, shift, val;

sound/soc/codecs/rt5668.c

1195

switch (w->shift) {

sound/soc/codecs/rt5668.c

1198

shift = RT5668_FILTER_CLK_SEL_SFT;

sound/soc/codecs/rt5668.c

1202

shift = RT5668_FILTER_CLK_SEL_SFT;

sound/soc/codecs/rt5668.c

1208

val = (snd_soc_component_read(component, reg) >> shift) & 0xf;

sound/soc/codecs/rt5668.c

1432

switch (w->shift) {

sound/soc/codecs/rt5668.c

1450

switch (w->shift) {

sound/soc/codecs/rt5670.c

778

unsigned int reg, shift, val;

sound/soc/codecs/rt5670.c

780

switch (source->shift) {

sound/soc/codecs/rt5670.c

783

shift = 0;

sound/soc/codecs/rt5670.c

787

shift = 4;

sound/soc/codecs/rt5670.c

791

shift = 12;

sound/soc/codecs/rt5670.c

795

shift = 0;

sound/soc/codecs/rt5670.c

799

shift = 4;

sound/soc/codecs/rt5670.c

803

shift = 8;

sound/soc/codecs/rt5670.c

807

shift = 12;

sound/soc/codecs/rt5670.c

813

val = (snd_soc_component_read(component, reg) >> shift) & 0xf;

sound/soc/codecs/rt5670.c

973

if (mc->shift == 0)

sound/soc/codecs/rt5670.c

988

#define SOC_DAPM_SINGLE_RT5670_DAC1_SW(name, shift) \

sound/soc/codecs/rt5670.c

989

SOC_SINGLE_EXT(name, SND_SOC_NOPM, shift, 1, 0, \

sound/soc/codecs/rt5677.c

1122

unsigned int reg, shift, val;

sound/soc/codecs/rt5677.c

1125

switch (source->shift) {

sound/soc/codecs/rt5677.c

1128

shift = 0;

sound/soc/codecs/rt5677.c

1132

shift = 4;

sound/soc/codecs/rt5677.c

1136

shift = 8;

sound/soc/codecs/rt5677.c

1140

shift = 12;

sound/soc/codecs/rt5677.c

1146

switch (source->shift) {

sound/soc/codecs/rt5677.c

1149

shift = 8;

sound/soc/codecs/rt5677.c

1153

shift = 12;

sound/soc/codecs/rt5677.c

1157

shift = 0;

sound/soc/codecs/rt5677.c

1161

shift = 4;

sound/soc/codecs/rt5677.c

1165

shift = 8;

sound/soc/codecs/rt5677.c

1169

shift = 12;

sound/soc/codecs/rt5677.c

1173

shift = 0;

sound/soc/codecs/rt5677.c

1177

shift = 4;

sound/soc/codecs/rt5677.c

1181

shift = 12;

sound/soc/codecs/rt5677.c

1189

val = (val >> shift) & 0xf;

sound/soc/codecs/rt5677.c

1412

switch (source->shift) {

sound/soc/codecs/rt5677.c

4721

unsigned int shift = (offset % 5) * 3;

sound/soc/codecs/rt5677.c

4724

return regmap_update_bits(rt5677->regmap, reg, m << shift, v << shift);

sound/soc/codecs/rt5677.c

4779

int shift;

sound/soc/codecs/rt5677.c

4783

shift = 2 * (1 - offset);

sound/soc/codecs/rt5677.c

4786

0x3 << shift,

sound/soc/codecs/rt5677.c

4787

(value & 0x3) << shift);

sound/soc/codecs/rt5677.c

4791

shift = 2 * (9 - offset);

sound/soc/codecs/rt5677.c

4794

0x3 << shift,

sound/soc/codecs/rt5677.c

4795

(value & 0x3) << shift);

sound/soc/codecs/rt5682.c

1294

if (w->shift == RT5682_PWR_ADC_S1F_BIT &&

sound/soc/codecs/rt5682.c

1302

if (w->shift == RT5682_PWR_ADC_S1F_BIT)

sound/soc/codecs/rt5682.c

1356

unsigned int reg, shift, val;

sound/soc/codecs/rt5682.c

1360

switch (w->shift) {

sound/soc/codecs/rt5682.c

1363

shift = RT5682_FILTER_CLK_SEL_SFT;

sound/soc/codecs/rt5682.c

1367

shift = RT5682_FILTER_CLK_SEL_SFT;

sound/soc/codecs/rt5682.c

1373

val = (snd_soc_component_read(component, reg) >> shift) & 0xf;

sound/soc/codecs/rt5682.c

1626

switch (w->shift) {

sound/soc/codecs/rt5682.c

1641

switch (w->shift) {

sound/soc/codecs/rt5682s.c

1230

if (w->shift == RT5682S_PWR_ADC_S1F_BIT && val == RT5682S_GP4_PIN_ADCDAT2)

sound/soc/codecs/rt5682s.c

1235

if (w->shift == RT5682S_PWR_ADC_S1F_BIT)

sound/soc/codecs/rt5682s.c

1366

switch (w->shift) {

sound/soc/codecs/rt700.c

375

if (mc->shift == RT700_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt700.c

423

val_h = (1 << mc->shift) | (3 << 4);

sound/soc/codecs/rt700.c

430

val_h = (1 << mc->shift) | (1 << 5);

sound/soc/codecs/rt700.c

435

val_h = (1 << mc->shift) | (1 << 4);

sound/soc/codecs/rt700.c

440

if (mc->shift == RT700_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt700.c

469

if (mc->shift == RT700_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt711-sdca.c

579

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt711-sdca.c

580

gain_l_val = (gain_l_val * 10) << mc->shift;

sound/soc/codecs/rt711-sdca.c

582

if (adc_vol_flag && gain_l_val > mc->shift)

sound/soc/codecs/rt711-sdca.c

583

gain_l_val = (gain_l_val - mc->shift) * 75;

sound/soc/codecs/rt711-sdca.c

585

gain_l_val = (mc->shift - gain_l_val) * 75;

sound/soc/codecs/rt711-sdca.c

588

if (!(adc_vol_flag && read_l > mc->shift)) {

sound/soc/codecs/rt711-sdca.c

601

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt711-sdca.c

602

gain_r_val = (gain_r_val * 10) << mc->shift;

sound/soc/codecs/rt711-sdca.c

604

if (adc_vol_flag && gain_r_val > mc->shift)

sound/soc/codecs/rt711-sdca.c

605

gain_r_val = (gain_r_val - mc->shift) * 75;

sound/soc/codecs/rt711-sdca.c

607

gain_r_val = (mc->shift - gain_r_val) * 75;

sound/soc/codecs/rt711-sdca.c

610

if (!(adc_vol_flag && read_r > mc->shift)) {

sound/soc/codecs/rt711-sdca.c

656

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt711-sdca.c

657

ctl_l = (read_l >> mc->shift) / 10;

sound/soc/codecs/rt711-sdca.c

668

ctl_l = mc->shift - (ctl_l / 75);

sound/soc/codecs/rt711-sdca.c

670

ctl_l = mc->shift + (ctl_l / 75);

sound/soc/codecs/rt711-sdca.c

677

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt711-sdca.c

678

ctl_r = (read_r >> mc->shift) / 10;

sound/soc/codecs/rt711-sdca.c

689

ctl_r = mc->shift - (ctl_r / 75);

sound/soc/codecs/rt711-sdca.c

691

ctl_r = mc->shift + (ctl_r / 75);

sound/soc/codecs/rt711.c

519

if (mc->shift == RT711_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt711.c

570

val_h = (1 << mc->shift) | (3 << 4);

sound/soc/codecs/rt711.c

577

val_h = (1 << mc->shift) | (1 << 5);

sound/soc/codecs/rt711.c

582

val_h = (1 << mc->shift) | (1 << 4);

sound/soc/codecs/rt711.c

587

if (mc->shift == RT711_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt711.c

619

if (mc->shift == RT711_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt712-sdca.c

512

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt712-sdca.c

528

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt712-sdca.c

573

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt712-sdca.c

583

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt715-sdca.c

152

mc->shift);

sound/soc/codecs/rt715-sdca.c

253

ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, mc->shift);

sound/soc/codecs/rt715-sdca.c

357

unsigned int shift = p->shift;

sound/soc/codecs/rt715-sdca.c

375

val_mask = mask << shift;

sound/soc/codecs/rt715-sdca.c

376

val[i * 2] <<= shift;

sound/soc/codecs/rt715-sdca.c

385

val[i * 2 + 1] <<= shift;

sound/soc/codecs/rt715-sdca.c

420

.shift = xshift, .invert = xinvert})

sound/soc/codecs/rt715-sdca.h

43

unsigned int shift;

sound/soc/codecs/rt715.c

147

if (mc->shift == RT715_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt715.c

180

val_h = (1 << mc->shift) | (3 << 4);

sound/soc/codecs/rt715.c

187

val_h = (1 << mc->shift) | (1 << 5);

sound/soc/codecs/rt715.c

191

val_h = (1 << mc->shift) | (1 << 4);

sound/soc/codecs/rt715.c

196

if (mc->shift == RT715_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt715.c

226

if (mc->shift == RT715_DIR_OUT_SFT) /* output */

sound/soc/codecs/rt721-sdca.c

368

if (mc->shift == 8) {

sound/soc/codecs/rt721-sdca.c

371

} else if (mc->shift == 1) {

sound/soc/codecs/rt721-sdca.c

391

if (mc->shift == 8) {

sound/soc/codecs/rt721-sdca.c

394

} else if (mc->shift == 1) {

sound/soc/codecs/rt721-sdca.c

448

if (mc->shift == 8) {

sound/soc/codecs/rt721-sdca.c

451

} else if (mc->shift == 1) {

sound/soc/codecs/rt721-sdca.c

465

if (mc->shift == 8) {

sound/soc/codecs/rt721-sdca.c

468

} else if (mc->shift == 1) {

sound/soc/codecs/rt722-sdca.c

373

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt722-sdca.c

389

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt722-sdca.c

438

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rt722-sdca.c

448

if (mc->shift == 8) /* boost gain */

sound/soc/codecs/rtq9128.c

352

unsigned int shift, mask;

sound/soc/codecs/rtq9128.c

358

shift = 6;

sound/soc/codecs/rtq9128.c

360

shift = 4;

sound/soc/codecs/rtq9128.c

362

shift = 2;

sound/soc/codecs/rtq9128.c

364

shift = 0;

sound/soc/codecs/rtq9128.c

368

shift = 6 - shift;

sound/soc/codecs/rtq9128.c

370

mask = RTQ9128_CHSTAT_VAL_MASK << shift;

sound/soc/codecs/tas2781-comlib-i2c.c

216

mask <<= mc->shift;

sound/soc/codecs/tas2781-comlib-i2c.c

220

mc->reg, mask, (unsigned int)(val << mc->shift));

sound/soc/codecs/tas2781-comlib-i2c.c

249

mask <<= mc->shift;

sound/soc/codecs/tas2781-comlib-i2c.c

250

val = (val & mask) >> mc->shift;

sound/soc/codecs/tlv320aic31xx.c

407

#define WIDGET_BIT(reg, shift) (((shift) << 8) | (reg))

sound/soc/codecs/tlv320aic31xx.c

418

switch (WIDGET_BIT(w->reg, w->shift)) {

sound/soc/codecs/tlv320aic3x.c

155

#define SOC_DAPM_SINGLE_AIC3X(xname, reg, shift, mask, invert) \

sound/soc/codecs/tlv320aic3x.c

156

SOC_SINGLE_EXT(xname, reg, shift, mask, invert, \

sound/soc/codecs/tlv320aic3x.c

171

unsigned int shift = mc->shift;

sound/soc/codecs/tlv320aic3x.c

190

mask <<= shift;

sound/soc/codecs/tlv320aic3x.c

191

val <<= shift;

sound/soc/codecs/tscs454.c

2657

int shift;

sound/soc/codecs/tscs454.c

2665

shift = FB_I2SCMC_BCMP1;

sound/soc/codecs/tscs454.c

2669

shift = FB_I2SCMC_BCMP2;

sound/soc/codecs/tscs454.c

2673

shift = FB_I2SCMC_BCMP3;

sound/soc/codecs/tscs454.c

2698

R_I2SCMC, mask, val << shift);

sound/soc/codecs/twl4030.c

835

unsigned int shift = mc->shift;

sound/soc/codecs/twl4030.c

841

(twl4030_read(component, reg) >> shift) & mask;

sound/soc/codecs/twl4030.c

846

if (shift != rshift) {

sound/soc/codecs/twl4030.c

864

unsigned int shift = mc->shift;

sound/soc/codecs/twl4030.c

872

val_mask = mask << shift;

sound/soc/codecs/twl4030.c

875

val = val << shift;

sound/soc/codecs/twl4030.c

876

if (shift != rshift) {

sound/soc/codecs/twl4030.c

894

unsigned int shift = mc->shift;

sound/soc/codecs/twl4030.c

899

(twl4030_read(component, reg) >> shift) & mask;

sound/soc/codecs/twl4030.c

901

(twl4030_read(component, reg2) >> shift) & mask;

sound/soc/codecs/twl4030.c

921

unsigned int shift = mc->shift;

sound/soc/codecs/twl4030.c

927

val_mask = mask << shift;

sound/soc/codecs/twl4030.c

936

val = val << shift;

sound/soc/codecs/twl4030.c

937

val2 = val2 << shift;

sound/soc/codecs/wcd9335.c

1266

u32 port_id = w->shift;

sound/soc/codecs/wcd9335.c

1281

u32 port_id = w->shift;

sound/soc/codecs/wcd9335.c

1334

int dai_id = widget->shift;

sound/soc/codecs/wcd9335.c

1335

int port_id = mixer->shift;

sound/soc/codecs/wcd9335.c

1353

int dai_id = widget->shift;

sound/soc/codecs/wcd9335.c

1354

int port_id = mixer->shift;

sound/soc/codecs/wcd9335.c

1631

if (val == (ch->shift + INTn_2_INP_SEL_RX0))

sound/soc/codecs/wcd9335.c

1653

inp = ch->shift + INTn_1_MIX_INP_SEL_RX0;

sound/soc/codecs/wcd9335.c

1732

payload |= 1 << ch->shift;

sound/soc/codecs/wcd9335.c

1799

u8 shift = 0, shift_val = 0, tx_mux_sel;

sound/soc/codecs/wcd9335.c

1814

shift = (tx_port << 1);

sound/soc/codecs/wcd9335.c

1818

shift = ((tx_port - 4) << 1);

sound/soc/codecs/wcd9335.c

1822

shift = ((tx_port - 8) << 1);

sound/soc/codecs/wcd9335.c

1826

shift = 0;

sound/soc/codecs/wcd9335.c

1830

shift = 4;

sound/soc/codecs/wcd9335.c

1835

(shift_val << shift);

sound/soc/codecs/wcd9335.c

1837

tx_mux_sel = tx_mux_sel >> shift;

sound/soc/codecs/wcd9335.c

2185

int comp = ((struct soc_mixer_control *)kc->private_value)->shift;

sound/soc/codecs/wcd9335.c

2197

int comp = ((struct soc_mixer_control *) kc->private_value)->shift;

sound/soc/codecs/wcd9335.c

288

u16 shift;

sound/soc/codecs/wcd9335.c

2969

struct wcd_slim_codec_dai_data *dai = &wcd->dai[w->shift];

sound/soc/codecs/wcd9335.c

3288

wcd9335_config_compander(comp, w->shift, event);

sound/soc/codecs/wcd9335.c

3293

wcd9335_config_compander(comp, w->shift, event);

sound/soc/codecs/wcd9335.c

3730

if (w->shift == 7) {

sound/soc/codecs/wcd9335.c

3733

} else if (w->shift == 6) {

sound/soc/codecs/wcd9335.c

3738

if (w->shift == 7) {

sound/soc/codecs/wcd9335.c

3741

} else if (w->shift == 6) {

sound/soc/codecs/wcd9335.c

93

{.port = p + WCD9335_RX_START, .shift = p,}

sound/soc/codecs/wcd9335.c

96

{.port = p, .shift = p,}

sound/soc/codecs/wcd934x.c

1496

inp = ch->shift + INTn_1_INP_SEL_RX0;

sound/soc/codecs/wcd934x.c

1560

if (val == (ch->shift + INTn_2_INP_SEL_RX0)) {

sound/soc/codecs/wcd934x.c

1617

u8 shift = 0, shift_val = 0, tx_mux_sel;

sound/soc/codecs/wcd934x.c

1628

shift = (tx_port << 1);

sound/soc/codecs/wcd934x.c

1633

shift = ((tx_port - 4) << 1);

sound/soc/codecs/wcd934x.c

1638

shift = ((tx_port - 8) << 1);

sound/soc/codecs/wcd934x.c

1643

shift = 0;

sound/soc/codecs/wcd934x.c

1648

shift = 4;

sound/soc/codecs/wcd934x.c

1658

(shift_val << shift);

sound/soc/codecs/wcd934x.c

1660

tx_mux_sel = tx_mux_sel >> shift;

sound/soc/codecs/wcd934x.c

1710

payload |= 1 << ch->shift;

sound/soc/codecs/wcd934x.c

2930

hphr = mc->shift;

sound/soc/codecs/wcd934x.c

3169

int comp = ((struct soc_mixer_control *)kc->private_value)->shift;

sound/soc/codecs/wcd934x.c

3182

int comp = ((struct soc_mixer_control *)kc->private_value)->shift;

sound/soc/codecs/wcd934x.c

3258

ucontrol->value.enumerated.item[0] = wcd->rx_port_value[w->shift];

sound/soc/codecs/wcd934x.c

3297

u32 port_id = w->shift;

sound/soc/codecs/wcd934x.c

370

u16 shift;

sound/soc/codecs/wcd934x.c

3777

int port_id = mixer->shift;

sound/soc/codecs/wcd934x.c

3795

int dai_id = widget->shift;

sound/soc/codecs/wcd934x.c

3796

int port_id = mixer->shift;

sound/soc/codecs/wcd934x.c

4116

struct wcd_slim_codec_dai_data *dai = &wcd->dai[w->shift];

sound/soc/codecs/wcd934x.c

4262

int interp_idx = w->shift;

sound/soc/codecs/wcd934x.c

4308

(w->shift * WCD934X_RX_PATH_CTL_OFFSET);

sound/soc/codecs/wcd934x.c

4310

(w->shift * WCD934X_RX_PATH_CTL_OFFSET);

sound/soc/codecs/wcd934x.c

4371

gain_reg = WCD934X_CDC_RX0_RX_VOL_CTL + (w->shift *

sound/soc/codecs/wcd934x.c

4836

u16 mask, shift, adc_mux_in_reg;

sound/soc/codecs/wcd934x.c

4848

shift = 0;

sound/soc/codecs/wcd934x.c

4854

shift = 0;

sound/soc/codecs/wcd934x.c

4861

shift = 2;

sound/soc/codecs/wcd934x.c

4867

shift = 2;

sound/soc/codecs/wcd934x.c

4875

shift = 4;

sound/soc/codecs/wcd934x.c

4881

shift = 4;

sound/soc/codecs/wcd934x.c

4887

shift = 6;

sound/soc/codecs/wcd934x.c

4893

& mask) >> shift) == 1);

sound/soc/codecs/wcd934x.c

5105

int micb_num = w->shift;

sound/soc/codecs/wcd934x.c

88

{.port = p + WCD934X_RX_START, .shift = p,}

sound/soc/codecs/wcd934x.c

91

{.port = p, .shift = p,}

sound/soc/codecs/wcd937x.c

1129

int micb_num = w->shift;

sound/soc/codecs/wcd937x.c

1159

int micb_num = w->shift;

sound/soc/codecs/wcd937x.c

1259

hphr = mc->shift;

sound/soc/codecs/wcd937x.c

1278

hphr = mc->shift;

sound/soc/codecs/wcd937x.c

1309

int dai_id = mixer->shift;

sound/soc/codecs/wcd937x.c

1328

int dai_id = mixer->shift;

sound/soc/codecs/wcd937x.c

1971

hphr = mc->shift;

sound/soc/codecs/wcd937x.c

884

if (w->shift == 1 && !use_amic3)

sound/soc/codecs/wcd937x.c

907

if (w->shift == 1 && test_bit(AMIC2_BCS_ENABLE, &wcd937x->status_mask))

sound/soc/codecs/wcd937x.c

979

switch (w->shift) {

sound/soc/codecs/wcd938x.c

1023

switch (w->shift) {

sound/soc/codecs/wcd938x.c

1184

set_bit(w->shift, &wcd938x->status_mask);

sound/soc/codecs/wcd938x.c

1189

clear_bit(w->shift, &wcd938x->status_mask);

sound/soc/codecs/wcd938x.c

1240

wcd938x_tx_channel_config(component, w->shift, 1);

sound/soc/codecs/wcd938x.c

1241

mode = wcd938x_get_adc_mode(wcd938x->tx_mode[w->shift]);

sound/soc/codecs/wcd938x.c

1246

switch (w->shift) {

sound/soc/codecs/wcd938x.c

1283

wcd938x_tx_channel_config(component, w->shift, 0);

sound/soc/codecs/wcd938x.c

1286

switch (w->shift) {

sound/soc/codecs/wcd938x.c

1436

int micb_num = w->shift;

sound/soc/codecs/wcd938x.c

1459

int micb_num = w->shift;

sound/soc/codecs/wcd938x.c

1561

hphr = mc->shift;

sound/soc/codecs/wcd938x.c

1583

hphr = mc->shift;

sound/soc/codecs/wcd938x.c

1850

int dai_id = mixer->shift;

sound/soc/codecs/wcd938x.c

1872

int dai_id = mixer->shift;

sound/soc/codecs/wcd938x.c

2527

hphr = mc->shift;

sound/soc/codecs/wcd938x.c

75

#define WCD938X_EAR_PA_GAIN_TLV(xname, reg, shift, max, invert, tlv_array) \

sound/soc/codecs/wcd938x.c

76

SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, snd_soc_get_volsw, \

sound/soc/codecs/wcd939x.c

1100

set_bit(w->shift, &wcd939x->status_mask);

sound/soc/codecs/wcd939x.c

1109

clear_bit(w->shift, &wcd939x->status_mask);

sound/soc/codecs/wcd939x.c

1159

wcd939x_tx_channel_config(component, w->shift, true);

sound/soc/codecs/wcd939x.c

1160

mode = wcd939x_get_adc_mode(wcd939x->tx_mode[w->shift]);

sound/soc/codecs/wcd939x.c

1166

switch (w->shift) {

sound/soc/codecs/wcd939x.c

1211

wcd939x_tx_channel_config(component, w->shift, false);

sound/soc/codecs/wcd939x.c

1214

switch (w->shift) {

sound/soc/codecs/wcd939x.c

1390

int micb_num = w->shift;

sound/soc/codecs/wcd939x.c

1413

int micb_num = w->shift;

sound/soc/codecs/wcd939x.c

1526

if (mc->shift)

sound/soc/codecs/wcd939x.c

1544

if (mc->shift)

sound/soc/codecs/wcd939x.c

1794

struct wcd939x_sdw_priv *wcd = wcd939x->sdw_priv[mixer->shift];

sound/soc/codecs/wcd939x.c

1821

struct wcd939x_sdw_priv *wcd = wcd939x->sdw_priv[mixer->shift];

sound/soc/codecs/wcd939x.c

2449

bool hphr = mc->shift;

sound/soc/codecs/wcd939x.c

935

switch (w->shift) {

sound/soc/codecs/wcd939x.c

979

if (w->shift == 2)

sound/soc/codecs/wcd939x.c

998

if (w->shift == 2)

sound/soc/codecs/wm5110.c

297

switch (w->shift) {

sound/soc/codecs/wm5110.c

331

switch (w->shift) {

sound/soc/codecs/wm5110.c

411

unsigned int mask = (0x1 << mc->shift) | (0x1 << mc->rshift);

sound/soc/codecs/wm5110.c

412

unsigned int lnew = (!!ucontrol->value.integer.value[0]) << mc->shift;

sound/soc/codecs/wm5110.c

432

lold = dre & (1 << mc->shift);

sound/soc/codecs/wm5110.c

436

rena = ena & (1 << mc->shift);

sound/soc/codecs/wm5110.c

453

wm5110_clear_pga_volume(arizona, mc->shift);

sound/soc/codecs/wm5110.c

521

reg = ARIZONA_IN1L_CONTROL + ((w->shift ^ 0x1) * 4);

sound/soc/codecs/wm5110.c

526

wm5110->in_value |= 0x3 << ((w->shift ^ 0x1) * 2);

sound/soc/codecs/wm5110.c

531

wm5110->in_pga_cache[w->shift] = snd_soc_component_read(component, reg);

sound/soc/codecs/wm5110.c

551

wm5110->in_pga_cache[w->shift]);

sound/soc/codecs/wm5110.c

575

if (arizona_input_analog(component, w->shift))

sound/soc/codecs/wm8350.c

261

switch (w->shift) {

sound/soc/codecs/wm8350.c

272

WARN(1, "Invalid shift %d\n", w->shift);

sound/soc/codecs/wm8400.c

101

#define WM8400_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert, tlv_array) \

sound/soc/codecs/wm8400.c

102

SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \

sound/soc/codecs/wm8400.c

322

u32 reg_shift = mc->shift;

sound/soc/codecs/wm8770.c

415

int shift;

sound/soc/codecs/wm8770.c

439

shift = 4;

sound/soc/codecs/wm8770.c

443

shift = 0;

sound/soc/codecs/wm8770.c

466

snd_soc_component_update_bits(component, WM8770_MSTRCTRL, 0x7 << shift,

sound/soc/codecs/wm8770.c

467

i << shift);

sound/soc/codecs/wm8903.c

274

wm8903->dcs_pending |= 1 << w->shift;

sound/soc/codecs/wm8903.c

278

1 << w->shift, 0);

sound/soc/codecs/wm8903.c

408

#define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \

sound/soc/codecs/wm8903.c

409

SOC_SINGLE_EXT(xname, reg, shift, max, invert, \

sound/soc/codecs/wm8904.c

708

reg = w->shift;

sound/soc/codecs/wm8962.c

1551

int shift = kcontrol->private_value;

sound/soc/codecs/wm8962.c

1555

ucontrol->value.integer.value[0] = !!(wm8962->dsp2_ena & 1 << shift);

sound/soc/codecs/wm8962.c

1563

int shift = kcontrol->private_value;

sound/soc/codecs/wm8962.c

1574

wm8962->dsp2_ena |= 1 << shift;

sound/soc/codecs/wm8962.c

1576

wm8962->dsp2_ena &= ~(1 << shift);

sound/soc/codecs/wm8962.c

2007

switch (w->shift) {

sound/soc/codecs/wm8962.c

2021

WARN(1, "Invalid shift %d\n", w->shift);

sound/soc/codecs/wm8990.c

68

#define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\

sound/soc/codecs/wm8990.c

70

SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \

sound/soc/codecs/wm8991.h

810

#define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\

sound/soc/codecs/wm8991.h

812

SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \

sound/soc/codecs/wm8994.c

1410

unsigned int mask = 1 << w->shift;

sound/soc/codecs/wm8994.c

1511

#define WM8994_CLASS_W_SWITCH(xname, reg, shift, max, invert) \

sound/soc/codecs/wm8994.c

1512

SOC_SINGLE_EXT(xname, reg, shift, max, invert, \

sound/soc/codecs/wm8994.c

295

#define WM8994_DRC_SWITCH(xname, reg, shift) \

sound/soc/codecs/wm8994.c

296

SOC_SINGLE_EXT(xname, reg, shift, 1, 0, \

sound/soc/codecs/wm8994.c

308

if (mc->shift == WM8994_AIF1DAC1_DRC_ENA_SHIFT)

sound/soc/codecs/wm8995.h

4236

#define WM8995_CLASS_W_SWITCH(xname, reg, shift, max, invert) \

sound/soc/codecs/wm8995.h

4237

SOC_SINGLE_EXT(xname, reg, shift, max, invert, \

sound/soc/codecs/wm8996.c

640

wm8996->hpout_pending &= ~w->shift;

sound/soc/codecs/wm8996.c

643

wm8996->hpout_pending |= w->shift;

sound/soc/codecs/wm8996.c

763

wm8996->dcs_pending |= 1 << w->shift;

sound/soc/codecs/wm9712.c

224

unsigned int mixer, mask, shift, old;

sound/soc/codecs/wm9712.c

228

mixer = mc->shift >> 8;

sound/soc/codecs/wm9712.c

229

shift = mc->shift & 0xff;

sound/soc/codecs/wm9712.c

230

mask = 1 << shift;

sound/soc/codecs/wm9712.c

242

update.reg = wm9712_mixer_mute_regs[shift];

sound/soc/codecs/wm9712.c

267

unsigned int shift, mixer;

sound/soc/codecs/wm9712.c

269

mixer = mc->shift >> 8;

sound/soc/codecs/wm9712.c

270

shift = mc->shift & 0xff;

sound/soc/codecs/wm9712.c

273

(wm9712->hp_mixer[mixer] >> shift) & 1;

sound/soc/codecs/wm9713.c

233

unsigned int mixer, mask, shift, old;

sound/soc/codecs/wm9713.c

237

mixer = mc->shift >> 8;

sound/soc/codecs/wm9713.c

238

shift = mc->shift & 0xff;

sound/soc/codecs/wm9713.c

239

mask = (1 << shift);

sound/soc/codecs/wm9713.c

251

update.reg = wm9713_mixer_mute_regs[shift];

sound/soc/codecs/wm9713.c

276

unsigned int mixer, shift;

sound/soc/codecs/wm9713.c

278

mixer = mc->shift >> 8;

sound/soc/codecs/wm9713.c

279

shift = mc->shift & 0xff;

sound/soc/codecs/wm9713.c

282

(wm9713->hp_mixer[mixer] >> shift) & 1;

sound/soc/codecs/wm_adsp.c

1042

struct wm_adsp *dsp = &dsps[w->shift];

sound/soc/codecs/wm_adsp.c

1108

struct wm_adsp *dsp = &dsps[w->shift];

sound/soc/codecs/wm_adsp.c

889

struct wm_adsp *dsp = &dsps[w->shift];

sound/soc/codecs/wm_adsp.c

930

struct wm_adsp *dsp = &dsps[w->shift];

sound/soc/codecs/wm_adsp.c

943

struct wm_adsp *dsp = &dsps[mc->shift - 1];

sound/soc/codecs/wm_adsp.c

959

struct wm_adsp *dsp = &dsps[mc->shift - 1];

sound/soc/codecs/wm_adsp.h

71

.reg = SND_SOC_NOPM, .shift = num, .event = event_fn, \

sound/soc/codecs/wm_adsp.h

75

.reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp_event, \

sound/soc/codecs/wm_hubs.c

622

switch (w->shift) {

sound/soc/codecs/wm_hubs.c

651

switch (w->shift) {

sound/soc/codecs/wm_hubs.c

690

#define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \

sound/soc/codecs/wm_hubs.c

691

SOC_SINGLE_EXT(xname, reg, shift, max, invert, \

sound/soc/codecs/wsa881x.c

201

#define WSA881X_PA_GAIN_TLV(xname, reg, shift, max, invert, tlv_array) \

sound/soc/codecs/wsa881x.c

202

SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \

sound/soc/fsl/fsl_easrc.c

404

int shift)

sound/soc/fsl/fsl_easrc.c

421

exp += shift;

sound/soc/fsl/fsl_easrc.c

423

if ((shift > 0 && exp >= 0x7ff) || (shift < 0 && exp <= 0)) {

sound/soc/fsl/fsl_easrc.c

435

u64 *coef, int n_taps, int shift)

sound/soc/fsl/fsl_easrc.c

461

ret = fsl_easrc_normalize_filter(easrc, &coef[i], &tmp, shift);

sound/soc/fsl/fsl_micfil.c

211

unsigned int shift = mc->shift;

sound/soc/fsl/fsl_micfil.c

217

dev_warn(&micfil->pdev->dev, "range makes channel %d data unreliable\n", shift / 4);

sound/soc/fsl/fsl_micfil.c

219

regmap_update_bits(micfil->regmap, REG_MICFIL_OUT_CTRL, 0xF << shift, new_range << shift);

sound/soc/fsl/p1022_ds.c

49

unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));

sound/soc/fsl/p1022_ds.c

51

clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift);

sound/soc/fsl/p1022_rdk.c

56

unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));

sound/soc/fsl/p1022_rdk.c

58

clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift);

sound/soc/intel/atom/sst-atom-controls.c

642

val |= 1 << mc->shift;

sound/soc/intel/atom/sst-atom-controls.h

590

.reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/intel/atom/sst-atom-controls.h

598

.reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/intel/atom/sst-atom-controls.h

606

.reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/intel/atom/sst-atom-controls.h

614

.reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/intel/atom/sst-atom-controls.h

622

.reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/intel/atom/sst-atom-controls.h

630

{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/intel/atom/sst-atom-controls.h

638

{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/intel/atom/sst-atom-controls.h

647

{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/intel/atom/sst-atom-controls.h

674

{ .id = snd_soc_dapm_mixer, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \

sound/soc/mediatek/common/mtk-afe-fe-dai.c

23

unsigned int val, int shift)

sound/soc/mediatek/common/mtk-afe-fe-dai.c

25

if (reg < 0 || WARN_ON_ONCE(shift < 0))

sound/soc/mediatek/common/mtk-afe-fe-dai.c

27

return regmap_update_bits(map, reg, mask << shift, val << shift);

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1069

unsigned int shift;

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1074

shift = ETDM_OUT_CON4_CLOCK_SHIFT;

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1078

shift = ETDM_OUT_CON4_CLOCK_SHIFT;

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1082

shift = ETDM_OUT_CON4_CLOCK_SHIFT;

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1086

shift = ETDM_IN_CON2_CLOCK_SHIFT;

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1090

shift = ETDM_IN_CON2_CLOCK_SHIFT;

sound/soc/mediatek/mt8188/mt8188-dai-etdm.c

1098

value >>= shift;

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

746

unsigned int shift = 0;

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

751

shift = ETDM_OUT_CON4_CLOCK_SHIFT;

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

755

shift = ETDM_OUT_CON4_CLOCK_SHIFT;

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

759

shift = ETDM_OUT_CON4_CLOCK_SHIFT;

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

763

shift = ETDM_IN_CON2_CLOCK_SHIFT;

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

767

shift = ETDM_IN_CON2_CLOCK_SHIFT;

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c

774

value >>= shift;

sound/soc/meson/axg-pdm.c

305

val |= PDM_HCIC_CTRL1_GAIN_SFT(hcic->shift);

sound/soc/meson/axg-pdm.c

542

.shift = 0x15,

sound/soc/meson/axg-pdm.c

69

unsigned int shift;

sound/soc/meson/axg-spdifin.c

122

unsigned int reg, shift, rem;

sound/soc/meson/axg-spdifin.c

127

shift = width * (num_per_reg - 1 - rem);

sound/soc/meson/axg-spdifin.c

129

regmap_update_bits(map, reg, GENMASK(width - 1, 0) << shift,

sound/soc/meson/axg-spdifin.c

130

val << shift);

sound/soc/qcom/qdsp6/q6routing.c

474

int session_id = mc->shift;

sound/soc/qcom/qdsp6/q6routing.c

497

int session_id = mc->shift;

sound/soc/renesas/fsi.c

112

#define AB_IO(param, shift) (param << shift)

sound/soc/renesas/fsi.c

1438

u32 shift, i;

sound/soc/renesas/fsi.c

1442

shift = fsi_master_read(master, FIFO_SZ);

sound/soc/renesas/fsi.c

1443

shift >>= fsi_get_port_shift(fsi, io);

sound/soc/renesas/fsi.c

1444

shift &= FIFO_SZ_MASK;

sound/soc/renesas/fsi.c

1445

frame_capa = 256 << shift;

sound/soc/renesas/fsi.c

425

u32 shift;

sound/soc/renesas/fsi.c

428

shift = is_play ? AO_SHIFT : AI_SHIFT;

sound/soc/renesas/fsi.c

430

shift = is_play ? BO_SHIFT : BI_SHIFT;

sound/soc/renesas/fsi.c

432

return shift;

sound/soc/renesas/rcar/adg.c

238

int shift = (id % 2) ? 16 : 0;

sound/soc/renesas/rcar/adg.c

246

val = val << shift;

sound/soc/renesas/rcar/adg.c

247

mask = 0x0f1f << shift;

sound/soc/renesas/rcar/adg.c

265

int shift = (id % 2) ? 16 : 0;

sound/soc/renesas/rcar/adg.c

273

in = in << shift;

sound/soc/renesas/rcar/adg.c

274

out = out << shift;

sound/soc/renesas/rcar/adg.c

275

mask = 0x0f1f << shift;

sound/soc/renesas/rcar/adg.c

293

int shift = (id % 4) * 8;

sound/soc/renesas/rcar/adg.c

294

u32 mask = 0xFF << shift;

sound/soc/renesas/rcar/adg.c

298

val = val << shift;

sound/soc/renesas/rcar/core.c

533

int shift, int add, int timing)

sound/soc/renesas/rcar/core.c

536

u32 mask = 0xF << shift;

sound/soc/renesas/rcar/core.c

537

u8 val = (*status >> shift) & 0xF;

sound/soc/renesas/rcar/core.c

542

if (add == 0 || shift == 28)

sound/soc/renesas/rcar/core.c

548

*status = (*status & ~mask) + (next_val << shift);

sound/soc/renesas/rcar/ssi.c

880

int shift = 0;

sound/soc/renesas/rcar/ssi.c

885

shift = 8;

sound/soc/renesas/rcar/ssi.c

893

rsnd_mod_write(mod, SSITDR, (*buf) << shift);

sound/soc/renesas/rcar/ssi.c

895

*buf = (rsnd_mod_read(mod, SSIRDR) >> shift);

sound/soc/renesas/rcar/ssiu.c

101

shift = id;

sound/soc/renesas/rcar/ssiu.c

105

shift = 1;

sound/soc/renesas/rcar/ssiu.c

115

u32 val = 0xf << (shift * 4);

sound/soc/renesas/rcar/ssiu.c

318

int shift = (i * 4) + 20;

sound/soc/renesas/rcar/ssiu.c

320

val = (val & ~(0xF << shift)) |

sound/soc/renesas/rcar/ssiu.c

321

rsnd_mod_id(pos) << shift;

sound/soc/renesas/rcar/ssiu.c

55

int shift, offset;

sound/soc/renesas/rcar/ssiu.c

64

shift = id;

sound/soc/renesas/rcar/ssiu.c

68

shift = 1;

sound/soc/renesas/rcar/ssiu.c

77

u32 val = 0xf << (shift * 4);

sound/soc/renesas/rcar/ssiu.c

92

int shift, offset;

sound/soc/rockchip/rockchip_i2s.c

28

u32 shift;

sound/soc/rockchip/rockchip_i2s.c

444

val <<= i2s->pins->shift;

sound/soc/rockchip/rockchip_i2s.c

445

val |= (I2S_IO_DIRECTION_MASK << i2s->pins->shift) << 16;

sound/soc/rockchip/rockchip_i2s.c

644

.shift = 11,

sound/soc/sdca/sdca_asoc.c

821

mc->shift = step;

sound/soc/soc-card-test.c

53

KUNIT_EXPECT_EQ_MSG(test, mc->shift, i, "For '%s'\n", test_card_controls[i].name);

sound/soc/soc-dapm.c

1669

return regulator_disable_deferred(w->regulator, w->shift);

sound/soc/soc-dapm.c

1898

mask |= w->mask << w->shift;

sound/soc/soc-dapm.c

1900

value |= w->on_val << w->shift;

sound/soc/soc-dapm.c

1902

value |= w->off_val << w->shift;

sound/soc/soc-dapm.c

2475

w->reg, w->reg, w->mask << w->shift);

sound/soc/soc-dapm.c

3368

val = val >> w->shift;

sound/soc/soc-dapm.c

3402

unsigned int shift = mc->shift;

sound/soc/soc-dapm.c

3412

val = (reg_val >> shift) & mask;

sound/soc/soc-dapm.c

3462

unsigned int shift = mc->shift;

sound/soc/soc-dapm.c

3496

val = val << shift;

sound/soc/soc-dapm.c

3499

reg_change = dapm_test_bits(dapm, reg, mask << shift, val);

sound/soc/soc-dapm.c

3517

update.mask = mask << shift;

sound/soc/soc-dapm.c

407

unsigned int shift = mc->shift;

sound/soc/soc-dapm.c

429

val = (val >> shift) & mask;

sound/soc/soc-dapm.c

746

template.shift = mc->shift;

sound/soc/soc-dapm.c

784

template.shift = e->shift_l;

sound/soc/soc-dapm.c

918

data->widget->on_val = value >> data->widget->shift;

sound/soc/soc-ops-test.c

24

.reg = 0, .shift = 0, .sign_bit = xsign, .invert = xinvert, \

sound/soc/soc-ops.c

114

unsigned int mask, unsigned int shift, int max,

sound/soc/soc-ops.c

119

if (WARN_ON(!mc->shift))

sound/soc/soc-ops.c

123

val = (((val * 100) >> 8) / (int)mc->shift);

sound/soc/soc-ops.c

130

unsigned int mask, unsigned int shift, int max)

sound/soc/soc-ops.c

135

if (WARN_ON(!mc->shift))

sound/soc/soc-ops.c

139

ret_val = (int)((reg_val * mc->shift) << 8) / 100;

sound/soc/soc-ops.c

145

unsigned int mask, unsigned int shift, int max,

sound/soc/soc-ops.c

148

int val = (reg_val >> shift) & mask;

sound/soc/soc-ops.c

168

unsigned int mask, unsigned int shift,

sound/soc/soc-ops.c

178

return (reg_val & mask) << shift;

sound/soc/soc-ops.c

249

val_mask = mask << mc->shift;

sound/soc/soc-ops.c

257

mask, mc->shift, max);

sound/soc/soc-ops.c

268

val2 = ctl_to_reg(mc, ucontrol->value.integer.value[1], mask, mc->shift, max);

sound/soc/soc-ops.c

304

val = reg_to_ctl(mc, reg_val, mask, mc->shift, max, sx);

sound/soc/soc-ops.c

313

val = reg_to_ctl(mc, reg_val, mask, mc->shift, max, sx);

sound/soc/soc-ops.c

807

unsigned int mask = BIT(mc->shift);

sound/soc/soc-ops.c

813

if (mc->shift != 0 && val != 0)

sound/soc/soc-ops.c

814

val = val >> mc->shift;

sound/soc/soc-ops.c

840

unsigned int mask = BIT(mc->shift);

sound/soc/soc-topology.c

1139

template.shift = le32_to_cpu(w->shift);

sound/soc/soc-topology.c

205

return le32_to_cpu(chan[i].shift);

sound/soc/soc-topology.c

668

sm->shift = tplg_chan_get_shift(tplg, mc->channel, SNDRV_CHMAP_FL);

sound/soc/sprd/sprd-mcdt.c

155

u32 shift = MCDT_DAC_DMA_SHIFT + channel;

sound/soc/sprd/sprd-mcdt.c

158

sprd_mcdt_update(mcdt, MCDT_DMA_EN, BIT(shift), BIT(shift));

sound/soc/sprd/sprd-mcdt.c

160

sprd_mcdt_update(mcdt, MCDT_DMA_EN, 0, BIT(shift));

sound/soc/sprd/sprd-mcdt.c

298

u32 reg, shift = sprd_mcdt_dma_ack_shift(channel), ack = dma_chan;

sound/soc/sprd/sprd-mcdt.c

313

sprd_mcdt_update(mcdt, reg, ack << shift,

sound/soc/sprd/sprd-mcdt.c

314

MCDT_DMA_ACK_SEL_MASK << shift);

sound/soc/sprd/sprd-mcdt.c

320

u32 reg, shift = sprd_mcdt_dma_ack_shift(channel), ack = dma_chan;

sound/soc/sprd/sprd-mcdt.c

335

sprd_mcdt_update(mcdt, reg, ack << shift,

sound/soc/sprd/sprd-mcdt.c

336

MCDT_DMA_ACK_SEL_MASK << shift);

sound/soc/sprd/sprd-mcdt.c

342

u32 reg, shift;

sound/soc/sprd/sprd-mcdt.c

362

shift = fifo_sts;

sound/soc/sprd/sprd-mcdt.c

368

shift = 8 + fifo_sts;

sound/soc/sprd/sprd-mcdt.c

373

shift = 16 + fifo_sts;

sound/soc/sprd/sprd-mcdt.c

378

shift = 24 + fifo_sts;

sound/soc/sprd/sprd-mcdt.c

385

return !!(readl_relaxed(mcdt->base + reg) & BIT(shift));

sound/soc/sprd/sprd-mcdt.c

395

u32 shift = MCDT_ADC_FIFO_SHIFT + channel;

sound/soc/sprd/sprd-mcdt.c

397

sprd_mcdt_update(mcdt, MCDT_FIFO_CLR, BIT(shift), BIT(shift));

sound/soc/sprd/sprd-mcdt.c

456

u32 reg, shift = sprd_mcdt_int_type_shift(channel, int_type);

sound/soc/sprd/sprd-mcdt.c

473

sprd_mcdt_update(mcdt, reg, BIT(shift), BIT(shift));

sound/soc/sprd/sprd-mcdt.c

475

sprd_mcdt_update(mcdt, reg, 0, BIT(shift));

sound/soc/sprd/sprd-mcdt.c

481

u32 reg, shift = sprd_mcdt_int_type_shift(channel, int_type);

sound/soc/sprd/sprd-mcdt.c

497

sprd_mcdt_update(mcdt, reg, BIT(shift), BIT(shift));

sound/soc/sprd/sprd-mcdt.c

503

u32 reg, shift = sprd_mcdt_int_type_shift(channel, int_type);

sound/soc/sprd/sprd-mcdt.c

519

return !!(readl_relaxed(mcdt->base + reg) & BIT(shift));

sound/soc/starfive/jh7110_pwmdac.c

129

if (dev->cfg.shift == PWMDAC_SHIFT_8)

sound/soc/starfive/jh7110_pwmdac.c

131

else if (dev->cfg.shift == PWMDAC_SHIFT_10)

sound/soc/starfive/jh7110_pwmdac.c

430

dev->cfg.shift = PWMDAC_SHIFT_8;

sound/soc/starfive/jh7110_pwmdac.c

81

enum JH7110_PWMDAC_SHIFT_VAL shift;

sound/soc/sti/uniperif.h

19

#define GET_UNIPERIF_REG(ip, offset, shift, mask) \

sound/soc/sti/uniperif.h

20

((readl_relaxed(ip->base + offset) >> shift) & mask)

sound/soc/sti/uniperif.h

21

#define SET_UNIPERIF_REG(ip, offset, shift, mask, value) \

sound/soc/sti/uniperif.h

23

~(mask << shift)) | (((value) & mask) << shift)), ip->base + offset)

sound/soc/sti/uniperif.h

24

#define SET_UNIPERIF_BIT_REG(ip, offset, shift, mask, value) \

sound/soc/sti/uniperif.h

25

writel_relaxed((((value) & mask) << shift), ip->base + offset)

sound/soc/tegra/tegra210_ahub.h

105

#define SOC_VALUE_ENUM_WIDE(xreg, shift, xmax, xtexts, xvalues) \

sound/soc/tegra/tegra210_ahub.h

108

.shift_l = shift, \

sound/soc/tegra/tegra210_ahub.h

109

.shift_r = shift, \

sound/soc/tegra/tegra210_ahub.h

116

#define SOC_VALUE_ENUM_WIDE_DECL(name, xreg, shift, xtexts, xvalues) \

sound/soc/tegra/tegra210_ahub.h

118

SOC_VALUE_ENUM_WIDE(xreg, shift, ARRAY_SIZE(xtexts), \

sound/soc/tegra/tegra210_mbdrc.c

244

ucontrol->value.integer.value[0] = (val >> mc->shift) & mc->max;

sound/soc/tegra/tegra210_mbdrc.c

259

val = val << mc->shift;

sound/soc/tegra/tegra210_mbdrc.c

262

(mc->max << mc->shift), val, &change);

sound/soc/tegra/tegra210_mbdrc.c

313

u32 shift = params->shift;

sound/soc/tegra/tegra210_mbdrc.c

319

data[i] = ((data[i] & mask) >> shift);

sound/soc/tegra/tegra210_mbdrc.c

334

u32 shift = params->shift;

sound/soc/tegra/tegra210_mbdrc.c

342

data[i] << shift, &update);

sound/soc/tegra/tegra210_mbdrc.c

434

params->shift, data, params->soc.num_regs);

sound/soc/tegra/tegra210_mbdrc.c

462

((val >> mc->shift) - TEGRA210_MBDRC_MASTER_VOL_MIN);

sound/soc/tegra/tegra210_mbdrc.c

480

mc->max << mc->shift, val << mc->shift,

sound/soc/tegra/tegra210_ope.h

69

u32 shift; /* Used as offset for AHUB RAM related programing */

sound/soc/tegra/tegra210_ope.h

86

.shift = xshift \

sound/soc/tegra/tegra210_peq.c

110

ucontrol->value.integer.value[0] = (val >> mc->shift) & mask;

sound/soc/tegra/tegra210_peq.c

137

val = val << mc->shift;

sound/soc/tegra/tegra210_peq.c

139

regmap_update_bits_check(ope->peq_regmap, mc->reg, (mask << mc->shift),

sound/soc/tegra/tegra210_peq.c

158

params->shift, data, params->soc.num_regs);

sound/soc/tegra/tegra210_peq.c

184

params->shift, data, params->soc.num_regs);

sound/soc/uniphier/aio-core.c

110

int shift;

sound/soc/uniphier/aio-core.c

119

shift = 0;

sound/soc/uniphier/aio-core.c

122

shift = 1;

sound/soc/uniphier/aio-core.c

125

shift = 2;

sound/soc/uniphier/aio-core.c

128

shift = 3;

sound/soc/uniphier/aio-core.c

148

regmap_update_bits(r, A2APLLCTR1, A2APLLCTR1_APLLX_MASK << shift,

sound/soc/uniphier/aio-core.c

149

v << shift);

sound/soc/uniphier/aio-reg.h

392

#define SBF_(frame, shift) (((frame) * 2 - 1) << shift)

sound/sparc/cs4231.c

1293

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/sparc/cs4231.c

1299

ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;

sound/sparc/cs4231.c

1313

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/sparc/cs4231.c

1322

val <<= shift;

sound/sparc/cs4231.c

1326

val = (chip->image[reg] & ~(mask << shift)) | val;

sound/sparc/cs4231.c

1409

#define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \

sound/sparc/cs4231.c

1413

.private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }

sound/sparc/cs4231.c

1640

u32 csr, shift;

sound/sparc/cs4231.c

1655

shift = 0;

sound/sparc/cs4231.c

1657

shift = 1;

sound/sparc/cs4231.c

1659

csr &= ~(APC_CPAUSE << shift);

sound/sparc/cs4231.c

1661

csr |= (APC_CPAUSE << shift);

sound/sparc/cs4231.c

1664

csr |= (APC_CDMA_READY << shift);

sound/sparc/cs4231.c

1666

csr &= ~(APC_CDMA_READY << shift);

sound/sparc/dbri.c

2324

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/sparc/dbri.c

2333

(dbri->mm.data[elem] >> shift) & mask;

sound/sparc/dbri.c

2336

(dbri->mm.ctrl[elem - 4] >> shift) & mask;

sound/sparc/dbri.c

2349

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/sparc/dbri.c

2361

val <<= shift;

sound/sparc/dbri.c

2365

~(mask << shift)) | val;

sound/sparc/dbri.c

2369

~(mask << shift)) | val;

sound/sparc/dbri.c

2393

#define CS4215_SINGLE(xname, entry, shift, mask, invert) \

sound/sparc/dbri.c

2397

.private_value = (entry) | ((shift) << 8) | ((mask) << 16) | \

sound/spi/at73c213.c

396

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/spi/at73c213.c

403

(chip->reg_image[reg] >> shift) & mask;

sound/spi/at73c213.c

417

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/spi/at73c213.c

426

val <<= shift;

sound/spi/at73c213.c

430

val = (chip->reg_image[reg] & ~(mask << shift)) | val;

sound/spi/at73c213.c

530

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/spi/at73c213.c

536

(chip->reg_image[reg] >> shift) & 0x01;

sound/spi/at73c213.c

550

int shift = (kcontrol->private_value >> 8) & 0xff;

sound/spi/at73c213.c

563

val <<= shift;

sound/spi/at73c213.c

567

val |= (chip->reg_image[reg] & ~(mask << shift));

sound/spi/at73c213.c

615

#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert) \

sound/spi/at73c213.c

623

.private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \

sound/usb/endpoint.c

1753

int shift;

sound/usb/endpoint.c

1870

shift = 0;

sound/usb/endpoint.c

1873

shift++;

sound/usb/endpoint.c

1877

shift--;

sound/usb/endpoint.c

1879

ep->freqshift = shift;

tools/arch/powerpc/include/uapi/asm/kvm.h

765

__u32 shift;

tools/arch/x86/include/asm/pvclock.h

39

static inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift)

tools/arch/x86/include/asm/pvclock.h

48

if (shift < 0)

tools/arch/x86/include/asm/pvclock.h

49

delta >>= -shift;

tools/arch/x86/include/asm/pvclock.h

51

delta <<= shift;

tools/firewire/nosy-dump.c

647

uint32_t index, shift, mask;

tools/firewire/nosy-dump.c

650

shift = 32 - (offset & 31) - width;

tools/firewire/nosy-dump.c

653

return (data[index] >> shift) & mask;

tools/iio/iio_generic_buffer.c

113

input >>= info->shift;

tools/iio/iio_generic_buffer.c

136

input >>= info->shift;

tools/iio/iio_generic_buffer.c

159

input >>= info->shift;

tools/iio/iio_generic_buffer.c

90

input >>= info->shift;

tools/iio/iio_utils.c

145

&padint, shift);

tools/iio/iio_utils.c

493

&current->shift,

tools/iio/iio_utils.c

87

unsigned int *bits_used, unsigned int *shift,

tools/iio/iio_utils.h

46

unsigned shift;

tools/include/linux/bitops.h

100

return (__s64)(value << shift) >> shift;

tools/include/linux/bitops.h

87

static inline __u32 rol32(__u32 word, unsigned int shift)

tools/include/linux/bitops.h

89

return (word << shift) | (word >> ((-shift) & 31));

tools/include/linux/bitops.h

99

__u8 shift = 63 - index;

tools/include/linux/math64.h

22

static inline u64 mul_u64_u32_shr(u64 a, u32 b, unsigned int shift)

tools/include/linux/math64.h

24

return (u64)(((unsigned __int128)a * b) >> shift);

tools/include/linux/math64.h

46

static inline u64 mul_u64_u32_shr(u64 a, u32 b, unsigned int shift)

tools/include/linux/math64.h

54

ret = mul_u32_u32(al, b) >> shift;

tools/include/linux/math64.h

56

ret += mul_u32_u32(ah, b) << (32 - shift);

tools/perf/arch/x86/util/intel-pt.c

496

unsigned int shift;

tools/perf/arch/x86/util/intel-pt.c

514

for (shift = 0; bits && !(bits & 1); shift++)

tools/perf/arch/x86/util/intel-pt.c

517

config >>= shift;

tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c

424

unsigned int offs = 1, shift;

tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c

429

for (shift = 5; byte & 1; shift += 7) {

tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c

435

payload |= ((uint64_t)byte >> 1) << shift;

tools/perf/util/intel-pt.c

1095

unsigned int shift;

tools/perf/util/intel-pt.c

1101

for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)

tools/perf/util/intel-pt.c

1106

return (config & pt->mtc_freq_bits) >> shift;

tools/power/x86/turbostat/turbostat.c

5541

int shift;

tools/power/x86/turbostat/turbostat.c

5553

for (shift = 56; shift >= 0; shift -= 8) {

tools/power/x86/turbostat/turbostat.c

5556

ratio = (msr >> shift) & 0xFF;

tools/power/x86/turbostat/turbostat.c

5557

group_size = (core_counts >> shift) & 0xFF;

tools/power/x86/turbostat/turbostat.c

6169

int so, shift, sib_core;

tools/power/x86/turbostat/turbostat.c

6195

for (shift = 0; shift < BITMASK_SIZE; shift++) {

tools/power/x86/turbostat/turbostat.c

6196

if ((map >> shift) & 0x1) {

tools/power/x86/turbostat/turbostat.c

6197

so = shift + offset;

tools/sched_ext/include/scx/common.bpf.h

702

u32 shift;

tools/sched_ext/include/scx/common.bpf.h

705

shift = (v > 0xFF) << 3; v >>= shift; r |= shift;

tools/sched_ext/include/scx/common.bpf.h

706

shift = (v > 0xF) << 2; v >>= shift; r |= shift;

tools/sched_ext/include/scx/common.bpf.h

707

shift = (v > 0x3) << 1; v >>= shift; r |= shift;

tools/sched_ext/scx_sdt.bpf.c

272

__u64 level, shift, pos;

tools/sched_ext/scx_sdt.bpf.c

292

shift = (SDT_TASK_LEVELS - 1 - level) * SDT_TASK_ENTS_PER_PAGE_SHIFT;

tools/sched_ext/scx_sdt.bpf.c

293

pos = (idx >> shift) & mask;

tools/testing/radix-tree/multiorder.c

59

int shift = height * XA_CHUNK_SHIFT;

tools/testing/radix-tree/multiorder.c

63

assert(xas.xa_node->shift == shift);

tools/testing/radix-tree/test.c

217

tag, slot->shift, tagged, anyset);

tools/testing/radix-tree/test.c

229

if (slot->shift > 0) {

tools/testing/radix-tree/test.c

272

unsigned shift;

tools/testing/radix-tree/test.c

282

shift = node->shift;

tools/testing/radix-tree/test.c

283

if (shift > 0)

tools/testing/radix-tree/test.c

284

assert(maxindex > shift_maxindex(shift - RADIX_TREE_MAP_SHIFT));

tools/testing/radix-tree/test.h

57

unsigned long shift_maxindex(unsigned int shift);

tools/testing/selftests/bpf/bpf_rand.h

16

static inline uint64_t bpf_rand_u##x(int shift) \

tools/testing/selftests/bpf/bpf_rand.h

18

return bpf_rand_mask((m)) << shift; \

tools/testing/selftests/bpf/prog_tests/bpf_iter.c

1659

int pgsz, shift;

tools/testing/selftests/bpf/prog_tests/bpf_iter.c

1667

for (pgsz = getpagesize(), shift = 0; pgsz > 1; pgsz >>= 1, shift++)

tools/testing/selftests/bpf/prog_tests/bpf_iter.c

1669

skel->bss->page_shift = shift;

tools/testing/selftests/bpf/progs/bpf_cubic.c

234

__u32 x, b, shift;

tools/testing/selftests/bpf/progs/bpf_cubic.c

243

shift = (a >> (b * 3));

tools/testing/selftests/bpf/progs/bpf_cubic.c

246

if (shift >= 64)

tools/testing/selftests/bpf/progs/bpf_cubic.c

249

x = ((__u32)(((__u32)v[shift] + 10) << b)) >> 6;

tools/testing/selftests/bpf/progs/test_jhash.h

7

static __always_inline u32 rol32(u32 word, unsigned int shift)

tools/testing/selftests/bpf/progs/test_jhash.h

9

return (word << shift) | (word >> ((-shift) & 31));

tools/testing/selftests/bpf/progs/test_l4lb.c

24

static inline __u32 rol32(__u32 word, unsigned int shift)

tools/testing/selftests/bpf/progs/test_l4lb.c

26

return (word << shift) | (word >> ((-shift) & 31));

tools/testing/selftests/bpf/progs/test_l4lb_noinline.c

20

static __always_inline __u32 rol32(__u32 word, unsigned int shift)

tools/testing/selftests/bpf/progs/test_l4lb_noinline.c

22

return (word << shift) | (word >> ((-shift) & 31));

tools/testing/selftests/bpf/progs/test_l4lb_noinline_dynptr.c

22

static __always_inline __u32 rol32(__u32 word, unsigned int shift)

tools/testing/selftests/bpf/progs/test_l4lb_noinline_dynptr.c

24

return (word << shift) | (word >> ((-shift) & 31));

tools/testing/selftests/bpf/progs/test_siphash.h

10

return (word << (shift & 63)) | (word >> ((-shift) & 63));

tools/testing/selftests/bpf/progs/test_siphash.h

8

static inline u64 rol64(u64 word, unsigned int shift)

tools/testing/selftests/bpf/progs/test_xdp_noinline.c

20

static __always_inline __u32 rol32(__u32 word, unsigned int shift)

tools/testing/selftests/bpf/progs/test_xdp_noinline.c

22

return (word << shift) | (word >> ((-shift) & 31));

tools/testing/selftests/drivers/net/gro.c

509

uint8_t shift;

tools/testing/selftests/drivers/net/gro.c

520

opt_window->shift = 0;

tools/testing/selftests/kvm/arm64/set_id_regs.c

270

uint64_t ftr_max = ftr_bits->mask >> ftr_bits->shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

324

uint64_t ftr_max = ftr_bits->mask >> ftr_bits->shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

33

uint8_t shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

378

uint8_t shift = ftr_bits->shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

383

ftr = (val & mask) >> shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

387

ftr <<= shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

401

uint8_t shift = ftr_bits->shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

407

ftr = (val & mask) >> shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

412

ftr <<= shift;

tools/testing/selftests/kvm/arm64/set_id_regs.c

52

.shift = SHIFT, \

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

174

uint32_t fields_per_reg, index, mask, shift;

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

187

shift = index * bits_per_field;

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

188

mask = ((1U << bits_per_field) - 1) << shift;

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

196

gicv3_setl_fields(cpu_or_dist, offset, mask, *val << shift);

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

197

*val = gicv3_getl_fields(cpu_or_dist, offset, mask) >> shift;

tools/testing/selftests/kvm/lib/arm64/processor.c

102

unsigned int shift = (vm->mmu.pgtable_levels - 1) * (vm->page_shift - 3) + vm->page_shift;

tools/testing/selftests/kvm/lib/arm64/processor.c

103

return 1 << (vm->va_bits - shift);

tools/testing/selftests/kvm/lib/arm64/processor.c

26

unsigned int shift = (vm->mmu.pgtable_levels - 1) * (vm->page_shift - 3) + vm->page_shift;

tools/testing/selftests/kvm/lib/arm64/processor.c

27

uint64_t mask = (1UL << (vm->va_bits - shift)) - 1;

tools/testing/selftests/kvm/lib/arm64/processor.c

29

return (gva >> shift) & mask;

tools/testing/selftests/kvm/lib/arm64/processor.c

34

unsigned int shift = 2 * (vm->page_shift - 3) + vm->page_shift;

tools/testing/selftests/kvm/lib/arm64/processor.c

40

return (gva >> shift) & mask;

tools/testing/selftests/kvm/lib/arm64/processor.c

45

unsigned int shift = (vm->page_shift - 3) + vm->page_shift;

tools/testing/selftests/kvm/lib/arm64/processor.c

51

return (gva >> shift) & mask;

tools/testing/selftests/kvm/lib/loongarch/processor.c

19

unsigned int shift;

tools/testing/selftests/kvm/lib/loongarch/processor.c

22

shift = level * (vm->page_shift - 3) + vm->page_shift;

tools/testing/selftests/kvm/lib/loongarch/processor.c

24

return (gva >> shift) & mask;

tools/testing/selftests/kvm/lib/test_util.c

52

int shift = 0;

tools/testing/selftests/kvm/lib/test_util.c

62

shift = 40;

tools/testing/selftests/kvm/lib/test_util.c

65

shift = 30;

tools/testing/selftests/kvm/lib/test_util.c

68

shift = 20;

tools/testing/selftests/kvm/lib/test_util.c

71

shift = 10;

tools/testing/selftests/kvm/lib/test_util.c

75

shift = 0;

tools/testing/selftests/kvm/lib/test_util.c

81

TEST_ASSERT((base << shift) >> shift == base, "Overflow scaling size!");

tools/testing/selftests/kvm/lib/test_util.c

83

return base << shift;

tools/testing/selftests/kvm/x86/fastops_test.c

80

uint8_t shift = __val1; \

tools/testing/selftests/kvm/x86/fastops_test.c

83

guest_execute_fastop_cl("", insn, shift, ex_output, ex_flags); \

tools/testing/selftests/kvm/x86/fastops_test.c

84

guest_execute_fastop_cl(KVM_FEP, insn, shift, output, flags); \

tools/testing/selftests/kvm/x86/fastops_test.c

88

(uint64_t)ex_output, insn, shift, (uint64_t)input, \

tools/testing/selftests/kvm/x86/fastops_test.c

92

ex_flags, insn, shift, (uint64_t)input, flags); \

tools/testing/selftests/mm/map_hugetlb.c

50

int shift = 0;

tools/testing/selftests/mm/map_hugetlb.c

63

shift = atoi(argv[2]);

tools/testing/selftests/mm/map_hugetlb.c

64

if (shift)

tools/testing/selftests/mm/map_hugetlb.c

65

flags |= (shift & MAP_HUGE_MASK) << MAP_HUGE_SHIFT;

tools/testing/selftests/mm/map_hugetlb.c

68

if (shift)

tools/testing/selftests/mm/map_hugetlb.c

69

ksft_print_msg("%u kB hugepages\n", 1 << (shift - 10));

tools/testing/selftests/mm/mremap_test.c

1080

unsigned long shift = i * chunk_size;

tools/testing/selftests/mm/mremap_test.c

1082

if (!memcmp(dest_addr + shift, rand_addr + shift, chunk_size))

tools/testing/selftests/mm/mremap_test.c

1086

for (t = shift; t < shift + chunk_size; ++t) {

tools/testing/selftests/mm/mremap_test.c

1121

unsigned long shift = i * chunk_size;

tools/testing/selftests/mm/mremap_test.c

1123

if (!memcmp(dest_preamble_addr + shift, rand_addr + shift,

tools/testing/selftests/mm/mremap_test.c

1128

for (d = shift; d < shift + chunk_size; ++d) {

tools/testing/selftests/mm/mseal_test.c

153

unsigned long shift = pkey_bit_position(pkey);

tools/testing/selftests/mm/mseal_test.c

156

reg &= ~((u64)PKEY_MASK << shift);

tools/testing/selftests/mm/mseal_test.c

158

reg |= (flags & PKEY_MASK) << shift;

tools/testing/selftests/mm/pkey-arm64.h

100

reg &= ~((u64)PKEY_MASK << shift);

tools/testing/selftests/mm/pkey-arm64.h

108

reg |= new_val << shift;

tools/testing/selftests/mm/pkey-arm64.h

116

u32 shift = pkey_bit_position(pkey);

tools/testing/selftests/mm/pkey-arm64.h

121

u32 perm = (reg >> shift) & PKEY_MASK;

tools/testing/selftests/mm/pkey-arm64.h

96

u32 shift = pkey_bit_position(pkey);

tools/testing/selftests/mm/pkey-helpers.h

124

u32 shift = pkey_bit_position(pkey);

tools/testing/selftests/mm/pkey-helpers.h

126

reg &= ~((u64)PKEY_MASK << shift);

tools/testing/selftests/mm/pkey-helpers.h

128

reg |= (flags & PKEY_MASK) << shift;

tools/testing/selftests/mm/pkey-helpers.h

136

u32 shift = pkey_bit_position(pkey);

tools/testing/selftests/mm/pkey-helpers.h

141

return ((reg >> shift) & PKEY_MASK);

tools/testing/selftests/net/tcp_ao/key-management.c

445

static unsigned int make_mask(unsigned int shift, unsigned int prev_shift)

tools/testing/selftests/net/tcp_ao/key-management.c

447

unsigned int ret = BIT(shift) - 1;

tools/testing/selftests/net/tcp_ao/key-management.c

472

unsigned int shift = MACLEN_SHIFT;

tools/testing/selftests/net/tcp_ao/key-management.c

474

key->maclen = test_maclens[index & make_mask(shift, 0)];

tools/testing/selftests/net/tcp_ao/key-management.c

475

algos_index = index & make_mask(ALGOS_SHIFT, shift);

tools/testing/selftests/powerpc/include/pkeys.h

65

unsigned long amr, shift;

tools/testing/selftests/powerpc/include/pkeys.h

67

shift = (NR_PKEYS - pkey - 1) * PKEY_BITS_PER_PKEY;

tools/testing/selftests/powerpc/include/pkeys.h

69

amr &= ~(PKEY_BITS_MASK << shift);

tools/testing/selftests/powerpc/include/pkeys.h

70

amr |= (rights & PKEY_BITS_MASK) << shift;

tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c

153

int shift = (tebc & 0x7);

tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c

161

flush = ((0x1ULL & final) << shift) | *buf;

tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c

162

shift = shift + 3; /* BFINAL and BTYPE written */

tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c

163

shift = (shift <= 8) ? 8 : 16;

tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c

164

flush |= (0xFFFF0000ULL) << shift; /* Zero length block */

tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c

165

shift = shift + 32;

tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c

166

while (shift > 0) {

tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c

169

shift = shift - 8;

tools/testing/selftests/ublk/stripe.c

340

conf->shift = chunk_shift;

tools/testing/selftests/ublk/stripe.c

353

printf("%s: shift %u files %u\n", __func__, conf->shift, conf->nr_files);

tools/testing/selftests/ublk/stripe.c

36

const unsigned shift = conf->shift - 9;

tools/testing/selftests/ublk/stripe.c

37

const unsigned unit_sects = conf->nr_files << shift;

tools/testing/selftests/ublk/stripe.c

75

const unsigned shift = conf->shift - 9;

tools/testing/selftests/ublk/stripe.c

76

const unsigned chunk_sects = 1 << shift;

tools/testing/selftests/ublk/stripe.c

77

const unsigned unit_sects = conf->nr_files << shift;

tools/testing/selftests/ublk/stripe.c

86

unsigned seq = (start - unit_off) >> shift;

tools/testing/selftests/ublk/stripe.c

9

unsigned shift;

tools/testing/selftests/vDSO/vdso_test_chacha.c

32

static uint32_t rol32(uint32_t word, unsigned int shift)

tools/testing/selftests/vDSO/vdso_test_chacha.c

34

return (word << (shift & 31)) | (word >> ((-shift) & 31));