Symbol: IPL_VM
sys/arch/aarch64/aarch64/cpu_machdep.c
59
#if IPL_VM != IPL_SOFTSERIAL + 1
sys/arch/aarch64/aarch64/fpu.c
223
KASSERTMSG(ci->ci_cpl <= IPL_VM || cold, "cpl=%d", ci->ci_cpl);
sys/arch/aarch64/aarch64/fpu.c
258
KASSERT(ci->ci_cpl == IPL_VM || cold);
sys/arch/aarch64/aarch64/trap.c
1043
if (ci->ci_cpl < IPL_VM)
sys/arch/acorn32/acorn32/autoconf.c
175
irqmasks[IPL_VM]);
sys/arch/acorn32/acorn32/rpc_machdep.c
210
irqmasks[IPL_VM]);
sys/arch/acorn32/eb7500atx/eb7500atx_machdep.c
216
irqmasks[IPL_VM]);
sys/arch/algor/algor/algor_intr.c
77
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/alpha/alpha/pmap.c
1095
alpha_pal_swpipl(IPL_VM);
sys/arch/alpha/alpha/pmap.c
1422
mutex_init(&tlb_lock, MUTEX_SPIN, IPL_VM);
sys/arch/alpha/common/sgmap_common.c
127
IPL_VM);
sys/arch/amd64/amd64/machdep.c
1848
mutex_init(&pte_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/amiga/amiga/machdep.c
854
[IPL_VM] = PSL_IPL4|PSL_S,
sys/arch/arc/arc/c_magnum.c
94
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/arc/arc/c_nec_eisa.c
116
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/arc/arc/c_nec_pci.c
121
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/arc/arc/p_dti_arcstation.c
111
[IPL_VM] = MIPS_INT_MASK, /* XXX */
sys/arch/arc/arc/p_dti_tyne.c
114
[IPL_VM] = MIPS_INT_MASK, /* XXX */
sys/arch/arc/arc/p_sni_rm200pci.c
95
[IPL_VM] = MIPS_INT_MASK, /* XXX */
sys/arch/arc/isa/isabus.c
286
imask[IPL_VM] |= imask[IPL_SOFTNET];
sys/arch/arc/isa/isabus.c
292
imask[IPL_SCHED] |= imask[IPL_VM];
sys/arch/arc/jazz/jazzdmatlb.c
89
IPL_VM);
sys/arch/arm/acpi/acpi_pci_machdep.c
562
pi->pi_ih = intr_establish_xname(irq, IPL_VM, IST_LEVEL | IST_MPSAFE,
sys/arch/arm/amlogic/meson_i2c.c
499
mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/amlogic/meson_i2c.c
507
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
sys/arch/arm/amlogic/meson_pinctrl.c
590
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/apple/apple_mbox.c
273
IPL_VM, FDT_INTR_MPSAFE, mi->mi_handler, sc,
sys/arch/arm/arm/arm_machdep.c
301
if (cpl < IPL_VM)
sys/arch/arm/arm32/intr.c
65
spl_masks[IPL_VM] = irqmasks[IPL_VM];
sys/arch/arm/arm32/pmap.c
6328
mutex_init(&pm->pm_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/arm32/pmap.c
6356
mutex_init(&pmap_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/arm32/pmap.c
6521
mutex_init(&l1_lru_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/at91/at91aic.c
166
aic_imask[IPL_SCHED] |= aic_imask[IPL_VM];
sys/arch/arm/broadcom/bcm2835_bsc.c
94
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm2835_bsc_acpi.c
147
IPL_VM, true, bsciic_intr, sc, device_xname(self));
sys/arch/arm/broadcom/bcm2835_bsc_fdt.c
121
sc->sc_inth = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/broadcom/bcm2835_dwctwo.c
152
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
sys/arch/arm/broadcom/bcm2835_gpio.c
285
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm2835_gpio.c
346
bank, IPL_VM, FDT_INTR_MPSAFE, bcmgpio_intr,
sys/arch/arm/broadcom/bcm2835_gpio.c
579
if (ipl != IPL_VM) {
sys/arch/arm/broadcom/bcm2835_gpio.c
581
__func__, ipl, IPL_VM);
sys/arch/arm/broadcom/bcm2835_gpio.c
636
if (ipl != IPL_VM) {
sys/arch/arm/broadcom/bcm2835_gpio.c
638
__func__, ipl, IPL_VM);
sys/arch/arm/broadcom/bcm2835_mbox.c
95
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm2835_mbox_acpi.c
108
IPL_VM, false, bcmmbox_intr, sc, device_xname(self));
sys/arch/arm/broadcom/bcm2835_mbox_fdt.c
102
sc->sc_intrh = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
sys/arch/arm/broadcom/bcm2835_spi.c
126
sc->sc_intrh = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
sys/arch/arm/broadcom/bcm2835_spi.c
135
mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm53xx_board.c
591
mutex_init(&srab_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm53xx_eth.c
303
sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm53xx_eth.c
351
sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
sys/arch/arm/broadcom/bcm53xx_mdio.c
89
sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm53xx_pax.c
236
sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm53xx_pax.c
237
sc->sc_cfg_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/broadcom/bcm53xx_pax.c
266
sc->sc_ih[i] = intr_establish(loc->loc_intrs[0] + i, IPL_VM,
sys/arch/arm/broadcom/bcm53xx_pax.c
575
KASSERT(ipl == IPL_VM);
sys/arch/arm/broadcom/bcm53xx_rng.c
149
sc->sc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
sys/arch/arm/broadcom/bcm53xx_sdhc.c
109
ccbsc->ccbsc_ih = intr_establish(loc->loc_intrs[0], IPL_VM, IST_LEVEL,
sys/arch/arm/cortex/gic.c
718
intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_AST, IPL_VM,
sys/arch/arm/cortex/gic.c
724
intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_NOP, IPL_VM,
sys/arch/arm/cortex/gic.c
733
intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_KPREEMPT, IPL_VM,
sys/arch/arm/cortex/gicv3.c
62
#define IPL_TO_HWPL(ipl) ((ipl) >= IPL_VM ? (ipl) : IPL_NONE)
sys/arch/arm/cortex/gicv3.c
765
KASSERT(ipl >= IPL_VM);
sys/arch/arm/cortex/gicv3.c
940
intr_establish_xname(IPI_AST, IPL_VM, IST_MPSAFE | IST_EDGE, pic_ipi_ast, (void *)-1, "IPI ast");
sys/arch/arm/cortex/gicv3.c
943
intr_establish_xname(IPI_NOP, IPL_VM, IST_MPSAFE | IST_EDGE, pic_ipi_nop, (void *)-1, "IPI nop");
sys/arch/arm/cortex/gicv3.c
949
intr_establish_xname(IPI_KPREEMPT, IPL_VM, IST_MPSAFE | IST_EDGE, pic_ipi_kpreempt, (void *)-1, "IPI kpreempt");
sys/arch/arm/ep93xx/ep93xx_intr.c
161
vic1_imask[IPL_SCHED] |= vic1_imask[IPL_VM];
sys/arch/arm/ep93xx/ep93xx_intr.c
162
vic2_imask[IPL_SCHED] |= vic2_imask[IPL_VM];
sys/arch/arm/footbridge/footbridge_irqhandler.c
148
footbridge_imask[IPL_SCHED] |= footbridge_imask[IPL_VM];
sys/arch/arm/footbridge/isa/isa_machdep.c
206
imask[IPL_SCHED] |= imask[IPL_VM];
sys/arch/arm/imx/imxgpio.c
344
mutex_init(&gpio->gpio_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/include/arm32/psl.h
61
#define splvm() raisespl(IPL_VM)
sys/arch/arm/ixp12x0/ixp12x0_intr.c
212
KASSERT(imask[IPL_VM] != 0);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
213
KASSERT(pci_imask[IPL_VM] != 0);
sys/arch/arm/ixp12x0/ixp12x0_intr.c
218
imask[IPL_SCHED] |= imask[IPL_VM];
sys/arch/arm/ixp12x0/ixp12x0_intr.c
219
pci_imask[IPL_SCHED] |= pci_imask[IPL_VM];
sys/arch/arm/marvell/mvsoc_sdhc.c
95
intr_establish(mva->mva_irq, IPL_VM, IST_LEVEL, sdhc_intr, sc);
sys/arch/arm/nvidia/tegra_apbdma.c
221
ch->ch_ih = fdtbus_intr_establish_xname(sc->sc_phandle, n, IPL_VM,
sys/arch/arm/nvidia/tegra_cec.c
161
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/nvidia/tegra_cec.c
173
sc->sc_ih = fdtbus_intr_establish_xname(faa->faa_phandle, 0, IPL_VM,
sys/arch/arm/nvidia/tegra_drm_mode.c
317
crtc->ih = intr_establish_xname(intr, IPL_VM, IST_LEVEL | IST_MPSAFE,
sys/arch/arm/nvidia/tegra_i2c.c
136
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/nvidia/tegra_i2c.c
147
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/nvidia/tegra_mc.c
118
sc->sc_ih = fdtbus_intr_establish_xname(faa->faa_phandle, 0, IPL_VM,
sys/arch/arm/nvidia/tegra_nouveau.c
293
sc->sc_ih = fdtbus_intr_establish_xname(sc->sc_phandle, 0, IPL_VM,
sys/arch/arm/nvidia/tegra_pcie.c
214
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/nvidia/tegra_pcie.c
229
sc->sc_ih = fdtbus_intr_establish_xname(faa->faa_phandle, 0, IPL_VM,
sys/arch/arm/nvidia/tegra_xusb.c
289
IPL_VM, FDT_INTR_MPSAFE, tegra_xusb_intr_mbox, psc,
sys/arch/arm/nxp/imx6_pcie.c
213
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/nxp/imx6_pwm.c
123
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/nxp/imx6_spi.c
165
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/nxp/imxpcie.c
496
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/nxp/imxwdog.c
179
ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
sys/arch/arm/pic/pic.c
764
is->is_mpsafe = (type & IST_MPSAFE) || ipl != IPL_VM;
sys/arch/arm/pic/pic_splfuncs.c
92
if (ci->ci_cpl >= IPL_VM) {
sys/arch/arm/rockchip/rk_gpio.c
661
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/rockchip/rk_gpio.c
676
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/rockchip/rk_spi.c
238
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
sys/arch/arm/rockchip/rk_tsadc.c
563
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
sys/arch/arm/rockchip/rk_vop.c
834
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/rockchip/rk_vop.c
835
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
115
s3c2xx0_imask[IPL_VM] &= s3c2xx0_imask[IPL_SOFTSERIAL];
sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
116
s3c2xx0_imask[IPL_CLOCK] &= s3c2xx0_imask[IPL_VM];
sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
144
dispatch_table[i].level = IPL_VM;
sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
153
_splraise(IPL_VM);
sys/arch/arm/samsung/exynos_i2c.c
153
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/samsung/exynos_i2c.c
162
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/sociox/sni_gpio.c
211
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/sunxi/sun4i_spi.c
139
sc->sc_intrh = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
sys/arch/arm/sunxi/sun6i_spi.c
152
sc->sc_intrh = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
sys/arch/arm/sunxi/sun8i_codec.c
415
sc, PRI_NONE, IPL_VM, 0) != 0) {
sys/arch/arm/sunxi/sun8i_codec.c
479
ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
sys/arch/arm/sunxi/sun8i_crypto.c
397
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/sunxi/sun8i_crypto.c
401
&sun8i_crypto_worker, sc, PRI_NONE, IPL_VM, WQ_MPSAFE) != 0) {
sys/arch/arm/sunxi/sun8i_crypto.c
470
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/sunxi/sunxi_gpio.c
1031
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/sunxi/sunxi_gpio.c
1067
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/sunxi/sunxi_gpio.c
556
if (ipl != IPL_VM) {
sys/arch/arm/sunxi/sunxi_gpio.c
558
__func__, ipl, IPL_VM);
sys/arch/arm/sunxi/sunxi_lcdc.c
541
ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
sys/arch/arm/sunxi/sunxi_lradc.c
110
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/sunxi/sunxi_lradc.c
187
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/sunxi/sunxi_nand.c
664
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/sunxi/sunxi_nand.c
670
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/sunxi/sunxi_rsb.c
172
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
sys/arch/arm/sunxi/sunxi_sramc.c
222
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/sunxi/sunxi_thermal.c
591
mutex_init(&sc->lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/sunxi/sunxi_thermal.c
608
ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
sys/arch/arm/sunxi/sunxi_ts.c
391
ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0, sunxi_ts_intr,
sys/arch/arm/sunxi/sunxi_twi.c
176
ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0, gttwsi_intr,
sys/arch/arm/ti/if_cpsw.c
477
IPL_VM, FDT_INTR_FLAGS, cpsw_rxthintr, sc, xname);
sys/arch/arm/ti/if_cpsw.c
481
IPL_VM, FDT_INTR_FLAGS, cpsw_rxintr, sc, xname);
sys/arch/arm/ti/if_cpsw.c
485
IPL_VM, FDT_INTR_FLAGS, cpsw_txintr, sc, xname);
sys/arch/arm/ti/if_cpsw.c
489
IPL_VM, FDT_INTR_FLAGS, cpsw_miscintr, sc, xname);
sys/arch/arm/ti/ti_edma.c
135
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/ti/ti_edma.c
162
IPL_VM, FDT_INTR_MPSAFE, edma_intr, sc, device_xname(self));
sys/arch/arm/ti/ti_gpio.c
296
if (ipl != IPL_VM || pin >= __arraycount(sc->sc_pins))
sys/arch/arm/ti/ti_gpio.c
441
if (ipl != IPL_VM || pin < 0 || pin >= __arraycount(sc->sc_pins))
sys/arch/arm/ti/ti_gpio.c
632
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/ti/ti_gpio.c
647
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/arm/ti/ti_sdhc.c
319
sc->sc_ih = fdtbus_intr_establish_xname(sc->sc_phandle, 0, IPL_VM,
sys/arch/arm/vfp/vfp_init.c
707
KASSERTMSG(ci->ci_cpl <= IPL_VM || cold, "cpl=%d", ci->ci_cpl);
sys/arch/arm/vfp/vfp_init.c
740
KASSERT(ci->ci_cpl == IPL_VM || cold);
sys/arch/arm/xilinx/zynq_gpio.c
292
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/xilinx/zynq_xadc.c
325
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/xscale/becc_icu.c
199
becc_imask[IPL_VM] |= becc_imask[IPL_SOFTSERIAL];
sys/arch/arm/xscale/becc_icu.c
200
becc_imask[IPL_SCHED] |= becc_imask[IPL_VM];
sys/arch/arm/xscale/iopaau.c
654
NULL, IPL_VM, iopaau_desc_ctor, NULL, NULL);
sys/arch/arm/xscale/iopaau.c
657
NULL, IPL_VM, iopaau_desc_ctor, NULL, NULL);
sys/arch/arm/xscale/ixp425_intr.c
239
ixp425_imask[IPL_SCHED] |= ixp425_imask[IPL_VM];
sys/arch/arm/xscale/ixp425_npe.c
262
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/arm/xscale/pxa2x0_intr.c
242
pxa2x0_imask[IPL_SCHED] &= pxa2x0_imask[IPL_VM];
sys/arch/atari/atari/intr.c
322
[IPL_VM] = PSL_S | PSL_IPL4,
sys/arch/cats/cats/autoconf.c
154
footbridge_imask[IPL_TTY], footbridge_imask[IPL_VM]);
sys/arch/cobalt/cobalt/interrupt.c
149
[IPL_VM] = MIPS_INT_MASK ^ MIPS_INT_MASK_5,
sys/arch/dreamcast/dev/g2/gapspci_dma.c
119
IPL_VM);
sys/arch/emips/emips/xilinx_ml40x.c
82
[IPL_VM] = NOINTS,
sys/arch/emips/emips/xs_bee3.c
80
[IPL_VM] = NOINTS,
sys/arch/evbarm/ifpga/ifpga_intr.c
175
ifpga_imask[IPL_VM] |= 0;
sys/arch/evbarm/ifpga/ifpga_intr.c
176
ifpga_imask[IPL_SCHED] |= ifpga_imask[IPL_VM];
sys/arch/evbarm/iq80310/iq80310_intr.c
198
iq80310_imask[IPL_VM] |= iq80310_imask[IPL_TTY];
sys/arch/evbarm/iq80310/iq80310_intr.c
205
iq80310_imask[IPL_AUDIO] |= iq80310_imask[IPL_VM];
sys/arch/evbarm/netwalker/netwalker_btn.c
160
IPL_VM, IST_EDGE_BOTH, mousebtn_intr, sc);
sys/arch/evbarm/netwalker/netwalker_btn.c
166
IPL_VM, IST_EDGE_BOTH, mousebtn_intr, sc);
sys/arch/evbarm/netwalker/netwalker_lid.c
118
IPL_VM, IST_EDGE_BOTH, netwalker_lid_intr, sc);
sys/arch/evbarm/netwalker/netwalker_pwr.c
119
IPL_VM, IST_EDGE_BOTH, netwalker_pwr_intr, sc);
sys/arch/evbmips/gdium/gdium_intr.c
147
[IPL_VM] =
sys/arch/evbmips/ingenic/intr.c
272
if (intrs[idx].ih_ipl == IPL_VM)
sys/arch/evbmips/ingenic/intr.c
275
if (intrs[idx].ih_ipl == IPL_VM)
sys/arch/evbmips/ingenic/intr.c
300
if (intrs[idx].ih_ipl == IPL_VM)
sys/arch/evbmips/ingenic/intr.c
303
if (intrs[idx].ih_ipl == IPL_VM)
sys/arch/evbmips/ingenic/intr.c
329
intrs[irq].ih_ipl = IPL_VM;
sys/arch/evbmips/ingenic/intr.c
70
[IPL_VM] =
sys/arch/evbmips/loongson/loongson_intr.c
77
[IPL_VM] =
sys/arch/evbmips/malta/malta_intr.c
73
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,
sys/arch/evbmips/mipssim/mipssim_intr.c
52
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/evbmips/sbmips/sb1250_icu.c
350
ipl = IPL_VM; /* XXX */
sys/arch/evbmips/sbmips/sb1250_icu.c
354
if (ipl >= _IPL_N || ipl < IPL_VM)
sys/arch/evbmips/sbmips/sb1250_icu.c
368
else if (ipl > IPL_VM)
sys/arch/evbmips/sbmips/sb1250_icu.c
66
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
sys/arch/evbppc/nintendo/dev/exi.c
122
mutex_init(&sc->sc_chan[chan].ch_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/evbppc/nintendo/dev/si.c
187
mutex_init(&ch->ch_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/evbppc/nintendo/dev/si.c
209
ih = intr_establish_xname(maa->maa_irq, IST_LEVEL, IPL_VM, si_intr, sc,
sys/arch/evbsh3/ap_ms104_sh4/ap_ms104_sh4_intr.c
115
case IPL_VM:
sys/arch/ews4800mips/ews4800mips/tr2_intr.c
58
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/ews4800mips/ews4800mips/tr2a_intr.c
56
[IPL_VM] = MIPS_INT_MASK & ~MIPS_INT_MASK_5,
sys/arch/hpcmips/tx/tx39icu.c
90
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/hpcmips/vr/vr.c
138
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/hppa/dev/astro.c
340
IPL_VM);
sys/arch/hppa/dev/uturn.c
369
IPL_VM);
sys/arch/hppa/hppa/intr.c
456
if (ib->ib_ipl == IPL_VM) {
sys/arch/hppa/hppa/pmap.c
1165
mutex_init(&pmap_pv_locks[i].lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/i386/i386/machdep.c
1362
mutex_init(&pte_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/ia64/ia64/pmap.c
1261
"pmap_pool_cache", NULL, IPL_VM,
sys/arch/ia64/ia64/pmap.c
1267
"pte_pool_cache", NULL, IPL_VM,
sys/arch/ia64/ia64/pmap.c
382
mutex_init(&pmap_ptc_mutex, MUTEX_DEFAULT, IPL_VM);
sys/arch/ia64/ia64/pmap.c
425
mutex_init(&pmap_ridmutex, MUTEX_DEFAULT, IPL_VM);
sys/arch/ia64/ia64/pmap.c
484
mutex_init(&pmap_vhpt_bucket[i].mutex, MUTEX_DEFAULT, IPL_VM);
sys/arch/ia64/include/intr.h
16
#define splvm() splraise(IPL_VM)
sys/arch/landisk/landisk/intr.c
156
case IPL_VM:
sys/arch/m68k/m68k/m68k_intr.c
108
[IPL_VM] = PSL_S | MACHINE_PSL_IPL_VM,
sys/arch/m68k/m68k/pmap_68k.c
758
IPL_VM); /* ipl */
sys/arch/mac68k/mac68k/intr.c
118
ipl2psl_table[IPL_VM] = (PSL_S | PSL_IPL6);
sys/arch/mac68k/mac68k/intr.c
124
ipl2psl_table[IPL_VM] = (PSL_S | PSL_IPL2);
sys/arch/mac68k/mac68k/intr.c
129
ipl2psl_table[IPL_VM] = (PSL_S | PSL_IPL4);
sys/arch/mac68k/mac68k/intr.c
159
if (ipl2psl_table[IPL_VM] > ipl2psl_table[IPL_SCHED])
sys/arch/mac68k/mac68k/intr.c
160
ipl2psl_table[IPL_SCHED] = ipl2psl_table[IPL_VM];
sys/arch/mips/adm5120/adm5120_intr.c
97
[IPL_VM] = MIPS_SOFT_INT_MASK|MIPS_INT_MASK_0,
sys/arch/mips/alchemy/au_icu.c
102
[IPL_VM] = MIPS_SOFT_INT_MASK |
sys/arch/mips/atheros/ar5312.c
373
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
sys/arch/mips/atheros/ar5315.c
358
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
sys/arch/mips/atheros/ar9344.c
372
[IPL_VM] = MIPS_SOFT_INT_MASK |
sys/arch/mips/cavium/dev/octeon_dwctwo.c
311
sc->sc_ih = octeon_intr_establish(CIU_INT_USB, IPL_VM, dwc2_intr, sc);
sys/arch/mips/cavium/octeon_intr.c
345
if (ipl < IPL_VM)
sys/arch/mips/cavium/octeon_intr.c
374
case IPL_VM:
sys/arch/mips/cavium/octeon_intr.c
437
case IPL_VM:
sys/arch/mips/cavium/octeon_intr.c
517
if (ipl == IPL_VM) {
sys/arch/mips/cavium/octeon_intr.c
83
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,
sys/arch/mips/include/intr.h
49
#define IPL_SCHED (IPL_VM+1)
sys/arch/mips/mips/mips_machdep.c
2413
KASSERT((status ^ sr_map[IPL_VM]) == MIPS_INT_MASK);
sys/arch/mips/mips/mips_machdep.c
2414
KASSERT(ci->ci_cpl == IPL_VM);
sys/arch/mips/mips/mips_machdep.c
2421
KASSERT(s == IPL_VM);
sys/arch/mips/ralink/ralink_intr.c
61
[IPL_VM] = MIPS_INT_MASK ^ MIPS_INT_MASK_5,
sys/arch/mips/rmi/rmixl_com.c
281
IPL_VM, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
sys/arch/mips/rmi/rmixl_intr.c
1051
IPL_VM, ipl_eimr_map[IPL_VM]);
sys/arch/mips/rmi/rmixl_intr.c
928
KASSERTMSG(ipl == IPL_VM,
sys/arch/mips/rmi/rmixl_pcix.c
525
IPL_VM, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
sys/arch/mips/rmi/rmixl_pcix.c
905
KASSERT(ipl == IPL_VM);
sys/arch/mipsco/mipsco/mips_3x30.c
76
[IPL_VM] = MIPS_INT_MASK_SPL2,
sys/arch/netwinder/netwinder/autoconf.c
101
footbridge_imask[IPL_TTY], footbridge_imask[IPL_VM]);
sys/arch/newsmips/newsmips/news3400.c
70
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/newsmips/newsmips/news4000.c
61
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/newsmips/newsmips/news5000.c
66
[IPL_VM] = MIPS_SOFT_INT_MASK
sys/arch/or1k/include/intr.h
109
return _splraise(IPL_VM);
sys/arch/pmax/pmax/dec_3100.c
115
[IPL_VM] = MIPS_SPL_0_1_2,
sys/arch/pmax/pmax/dec_3max.c
120
[IPL_VM] = MIPS_SPL0,
sys/arch/pmax/pmax/dec_3maxplus.c
130
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0,
sys/arch/pmax/pmax/dec_3min.c
128
[IPL_VM] = MIPS_SPLHIGH,
sys/arch/pmax/pmax/dec_5100.c
75
[IPL_VM] = MIPS_SPL_0_1,
sys/arch/pmax/pmax/dec_maxine.c
126
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_3,
sys/arch/powerpc/booke/dev/pq3ddrc.c
145
sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM,
sys/arch/powerpc/booke/dev/pq3diic.c
116
sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP,
sys/arch/powerpc/booke/dev/pq3etsec.c
636
sc->sc_hwlock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
sys/arch/powerpc/booke/dev/pq3etsec.c
670
sc->sc_tx_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP,
sys/arch/powerpc/booke/dev/pq3etsec.c
678
sc->sc_rx_ih = intr_establish(cnl->cnl_intrs[1], IPL_VM, IST_ONCHIP,
sys/arch/powerpc/booke/dev/pq3etsec.c
686
sc->sc_error_ih = intr_establish(cnl->cnl_intrs[2], IPL_VM, IST_ONCHIP,
sys/arch/powerpc/booke/dev/pq3sdhc.c
118
sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP,
sys/arch/powerpc/booke/e500_intr.c
1071
KASSERT(old_ipl < IPL_VM);
sys/arch/powerpc/booke/e500_intr.c
1397
if (e500_intr_cpu_establish(ci, 0, IPL_VM, IST_IPI, e500_ipi_intr,
sys/arch/powerpc/booke/e500_intr.c
582
if (ipl < IPL_VM && old_ipl >= IPL_VM)
sys/arch/powerpc/booke/e500_intr.c
602
if (old_ipl < IPL_VM && ipl >= IPL_VM)
sys/arch/powerpc/booke/e500_intr.c
637
if (ipl < IPL_VM || ipl > IPL_HIGH) {
sys/arch/powerpc/booke/e500_intr.c
686
&& ipl == IPL_VM;
sys/arch/powerpc/booke/e500_intr.c
718
if (!e500_intr_irq_info_get(ci, irq, IPL_VM, ist, &ii))
sys/arch/powerpc/booke/e500_intr.c
743
KASSERT(ipl >= IPL_VM && ipl <= IPL_HIGH);
sys/arch/powerpc/booke/e500_intr.c
969
if (old_ipl >= IPL_VM)
sys/arch/powerpc/booke/e500_intr.c
971
__func__, tf, old_ipl, IPL_VM, openpic_read(cpu, OPENPIC_CTPR));
sys/arch/powerpc/booke/pci/pq3pci.c
1157
KASSERT(ipl == IPL_VM);
sys/arch/powerpc/booke/pci/pq3pci.c
1293
pci_intr_handle_t handle = pq3pci_msi_alloc_one(IPL_VM);
sys/arch/powerpc/booke/pci/pq3pci.c
1364
pci_intr_handle_t handle = pq3pci_msi_alloc_one(IPL_VM);
sys/arch/powerpc/booke/pci/pq3pci.c
684
pis->pis_ih = intr_establish(PIH_IRQ(handle), IPL_VM, PIH_IST(handle),
sys/arch/powerpc/booke/pci/pq3pci.c
686
mutex_init(&pis->pis_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/powerpc/booke/pci/pq3pci.c
717
sc->sc_ih = intr_establish_xname(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP,
sys/arch/powerpc/booke/pci/pq3pci.c
853
sc->sc_conf_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_VM);
sys/arch/powerpc/ibm4xx/dev/dwctwo_plb.c
115
intr_establish_xname(paa->plb_irq, IST_LEVEL, IPL_VM, dwc2_intr, sc,
sys/arch/powerpc/ibm4xx/pmap.c
515
NULL, IPL_VM);
sys/arch/powerpc/include/booke/intr.h
172
return splraise(IPL_VM);
sys/arch/powerpc/mpc5200/sram.c
107
sizeof(uint32_t), NULL, NULL, NULL, 0, VM_SLEEP, IPL_VM);
sys/arch/powerpc/oea/pmap.c
3466
&pmap_pool_allocator, IPL_VM);
sys/arch/powerpc/pic/intr.c
490
if (ih->ih_ipl == IPL_VM) {
sys/arch/powerpc/pic/intr.c
711
(u_int)imask[IPL_VM] & 0x7fffffff,
sys/arch/powerpc/powerpc/softint_machdep.c
51
__CTASSERT(IPL_SOFTSERIAL < IPL_VM);
sys/arch/riscv/dev/plic_fdt.c
135
context, IPL_VM, FDT_INTR_MPSAFE,
sys/arch/riscv/include/intr.h
49
#define IPL_SCHED (IPL_VM + 1)
sys/arch/riscv/starfive/jh7100_pinctrl.c
463
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/riscv/starfive/jh7110_pcie.c
688
void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/riscv/starfive/jh7110_pinctrl.c
735
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/riscv/starfive/jh7110_trng.c
368
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/riscv/starfive/jh7110_trng.c
390
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/arch/sbmips/sbmips/sb1250_icu.c
344
if (ipl >= _IPL_N || ipl < IPL_VM)
sys/arch/sbmips/sbmips/sb1250_icu.c
358
else if (ipl > IPL_VM)
sys/arch/sbmips/sbmips/sb1250_icu.c
66
[IPL_VM] = MIPS_SOFT_INT_MASK | MIPS_INT_MASK_0
sys/arch/sgimips/sgimips/machdep.c
135
[IPL_VM] = MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,
sys/arch/sgimips/sgimips/machdep.c
143
[IPL_VM] = MIPS_INT_MASK_2|MIPS_INT_MASK_1|MIPS_INT_MASK_0|
sys/arch/sgimips/sgimips/machdep.c
155
[IPL_VM] = MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,
sys/arch/sgimips/sgimips/machdep.c
162
[IPL_VM] = MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK,
sys/arch/shark/isa/isa_irqhandler.c
303
irqmasks[IPL_VM] &= irqmasks[IPL_SOFTSERIAL];
sys/arch/shark/isa/isa_irqhandler.c
304
irqmasks[IPL_CLOCK] &= irqmasks[IPL_VM];
sys/arch/shark/ofw/ofw.c
330
irqmasks[IPL_VM]);
sys/arch/sparc/dev/vme_machdep.c
326
IPL_VM);
sys/arch/sparc/sparc/intr.c
677
mpsafe = (classipl != IPL_VM) || maybe_mpsafe;
sys/arch/sparc/sparc/intr.c
772
bool mpsafe = (level != IPL_VM);
sys/arch/sparc/sparc/iommu.c
286
IPL_VM);
sys/arch/sparc/sparc/machdep.c
322
IPL_VM);
sys/arch/sparc/sparc/pmap.c
3068
mutex_init(&demap_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/sparc64/dev/ebus_mainbus.c
366
intr_establish(ih->ih_pil, level != IPL_VM, ih);
sys/arch/sparc64/dev/fhc.c
264
intr_establish(ih->ih_pil, level != IPL_VM, ih);
sys/arch/sparc64/dev/fire_i2c.c
171
mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
sys/arch/sparc64/dev/iommu.c
223
IPL_VM);
sys/arch/sparc64/dev/psycho.c
1346
intr_establish(ih->ih_pil, level != IPL_VM, ih);
sys/arch/sparc64/dev/psycho.c
714
intr_establish(ipl, ipl != IPL_VM, ih);
sys/arch/sparc64/dev/pyro.c
595
intr_establish(ih->ih_pil, level != IPL_VM, ih);
sys/arch/sparc64/dev/sbus.c
582
intr_establish(ipl, level != IPL_VM, ih);
sys/arch/sparc64/dev/schizo.c
602
intr_establish(ipl, ipl != IPL_VM, ih);
sys/arch/sparc64/dev/schizo.c
862
intr_establish(ih->ih_pil, level != IPL_VM, ih);
sys/arch/sparc64/dev/vbus.c
228
intr_establish(ih->ih_pil, level != IPL_VM, ih);
sys/arch/sparc64/dev/vpci.c
597
intr_establish(ih->ih_pil, level != IPL_VM, ih);
sys/arch/sparc64/sparc64/cpu.c
524
mutex_init(&ci->ci_ctx_lock, MUTEX_SPIN, IPL_VM);
sys/arch/sparc64/sparc64/machdep.c
2386
intr_establish(pil, level != IPL_VM, ih);
sys/arch/sparc64/sparc64/pmap.c
1386
mutex_init(&pseg_lock, MUTEX_SPIN, IPL_VM);
sys/arch/sun2/sun2/machdep.c
305
IPL_VM);
sys/arch/sun3/sun3/dvma.c
109
IPL_VM);
sys/arch/sun3/sun3x/dvma.c
120
IPL_VM);
sys/arch/vax/include/intr.h
56
#define IPL_UBA IPL_VM /* unibus adapters */
sys/arch/vax/include/intr.h
57
#define IPL_CONSMEDIA IPL_VM /* console media */
sys/arch/vax/vax/pmap.c
418
mutex_init(&pmap_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/vax/vax/sgmap.c
101
IPL_VM);
sys/arch/virt68k/dev/virtio_mainbus.c
156
sc->sc_irq, IPL_VM/*XXX*/, 0);
sys/arch/virt68k/virt68k/machdep.c
292
[IPL_VM] = PSL_S | PSL_IPL5,
sys/arch/x68k/dev/vs.c
219
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/x68k/x68k/machdep.c
390
[IPL_VM] = PSL_S | PSL_IPL5,
sys/arch/x86/include/intrdefs.h
47
#define XEN_IPL2SIR(ipl) ((ipl) + (SIR_XENIPL_VM - IPL_VM))
sys/arch/x86/include/pmap_pv.h
100
mutex_init(&(pp)->pp_lock, MUTEX_NODEBUG, IPL_VM); \
sys/arch/x86/pci/dwiic_pci.c
258
IPL_VM, dwiic_intr, sc);
sys/arch/x86/x86/efi_machdep.c
790
mutex_init(&efi_runtime_lock, MUTEX_DEFAULT, IPL_VM);
sys/arch/x86/x86/fpu.c
511
KASSERTMSG(ci->ci_ilevel <= IPL_VM || cold, "ilevel=%d",
sys/arch/x86/x86/fpu.c
556
KASSERT(ci->ci_ilevel == IPL_VM || cold);
sys/arch/x86/x86/intr.c
841
bool mpsafe = (known_mpsafe || level != IPL_VM);
sys/arch/x86/x86/pmap.c
365
KASSERTMSG((pp)->pp_lock.mtx_ipl._ipl == IPL_VM, "bad pmap_page %p", pp)
sys/arch/x86/x86/svs.c
547
mutex_init(&ci->ci_svs_mtx, MUTEX_DEFAULT, IPL_VM);
sys/arch/xen/x86/cpu.c
431
mutex_init(&ci->ci_kpm_mtx, MUTEX_DEFAULT, IPL_VM);
sys/arch/xen/x86/x86_xpmap.c
198
KASSERT(curcpu()->ci_ilevel >= IPL_VM || cold);
sys/arch/xen/x86/x86_xpmap.c
226
KASSERT(curcpu()->ci_ilevel >= IPL_VM || cold);
sys/arch/xen/x86/xen_intr.c
178
bool mpsafe = (known_mpsafe || level != IPL_VM);
sys/arch/xen/xen/evtchn.c
375
KASSERT(ci->ci_ilevel >= IPL_VM);
sys/arch/xen/xen/evtchn.c
923
ipls->is_recurse = xenev_stubs[level - IPL_VM].ist_recurse;
sys/arch/xen/xen/evtchn.c
924
ipls->is_resume = xenev_stubs[level - IPL_VM].ist_resume;
sys/arch/xen/xen/xengnt.c
150
mutex_init(&grant_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/acpi/acpi_ged.c
84
ih = acpi_intr_establish_irq(dev, irq, IPL_VM, true,
sys/dev/acpi/acpica/OsdSynch.c
267
mutex_init(&al->al_slock, MUTEX_DEFAULT, IPL_VM);
sys/dev/acpi/amdccp_acpi.c
97
IPL_VM, true, amdccp_intr, sc, device_xname(self));
sys/dev/acpi/amdgpio.c
165
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/acpi/amdgpio.c
228
IPL_VM, false, amdgpio_intr, sc, device_xname(self));
sys/dev/acpi/amdgpio.c
315
ih = amdgpio_intr_establish(sc, pin, IPL_VM, irqmode,
sys/dev/acpi/amdgpio.c
385
if (ipl != IPL_VM) {
sys/dev/acpi/dwiic_acpi.c
118
IPL_VM, true, dwiic_intr, sc, device_xname(self));
sys/dev/acpi/igpio_acpi.c
177
IPL_VM, false, igpio_acpi_intr, asc, device_xname(self));
sys/dev/acpi/plgpio_acpi.c
133
IPL_VM, false, plgpio_acpi_intr, asc, device_xname(self));
sys/dev/acpi/qcomgpio.c
197
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/acpi/qcomgpio.c
272
IPL_VM, false, qcomgpio_intr, sc, device_xname(self));
sys/dev/acpi/qcomgpio.c
446
ih = qcomgpio_intr_establish(sc, pin, IPL_VM, irqmode,
sys/dev/acpi/qcomgpio.c
532
if (ipl != IPL_VM) {
sys/dev/acpi/qcomipcc.c
135
IPL_VM, false, qcipcc_intr, sc, device_xname(self));
sys/dev/acpi/qcompas.c
236
mutex_init(&sc->sc_ready_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/acpi/qcompas.c
264
IPL_VM, false, qcpas_intr_wdog, sc, device_xname(self));
sys/dev/acpi/qcompas.c
838
IPCC_MPROC_SIGNAL_GLINK_QMP, IPL_VM, qcpas_glink_intr, sc);
sys/dev/acpi/qcomsmptp.c
142
IPCC_MPROC_SIGNAL_SMP2P, IPL_VM, qcsmptp_intr, sc);
sys/dev/acpi/virtio_acpi.c
179
IPL_VM, false, virtio_mmio_intr, msc, device_xname(vsc->sc_dev));
sys/dev/bio.c
94
mutex_init(&bio_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/dksubr.c
98
mutex_init(&dksc->sc_iolock, MUTEX_DEFAULT, IPL_VM);
sys/dev/dmover/dmover_backend.c
63
mutex_init(&dmover_backend_list_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/ebus/cs4231_ebus.c
184
ebsc->sc_pint = sparc_softintr_establish(IPL_VM,
sys/dev/ebus/cs4231_ebus.c
186
ebsc->sc_rint = sparc_softintr_establish(IPL_VM,
sys/dev/fdt/dwc2_fdt.c
174
sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
sys/dev/fdt/dwiic_fdt.c
124
sc->sc_dwiic.sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0,
sys/dev/fdt/syscon.c
129
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/gpio/gpio.c
265
mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/gpio/gpio.c
555
if (ipl != IPL_VM)
sys/dev/gpio/gpioirq.c
188
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/gpio/gpioirq.c
189
mutex_init(&sc->sc_dying_mutex, MUTEX_DEFAULT, IPL_VM);
sys/dev/gpio/gpioirq.c
190
mutex_init(&sc->sc_read_mutex, MUTEX_DEFAULT, IPL_VM);
sys/dev/gpio/gpioirq.c
194
sc->sc_readpool = pool_cache_init(sizeof(struct gpioirq_read_q),0,0,0,sc->sc_readpoolname,NULL,IPL_VM,NULL,NULL,NULL);
sys/dev/gpio/gpioirq.c
231
sc->sc_intrs[apin].sc_ih = gpio_intr_establish(sc->sc_gpio, &sc->sc_map, apin, IPL_VM,
sys/dev/gpio/gpiopps.c
405
&sc->sc_map, 0, IPL_VM,
sys/dev/gpio/gpiopps.c
416
&sc->sc_map, 1, IPL_VM,
sys/dev/gpio/gpiopps.c
431
&sc->sc_map, 0, IPL_VM,
sys/dev/gpio/gpiosim.c
159
mutex_init(&sc->sc_intr_mutex, MUTEX_DEFAULT, IPL_VM);
sys/dev/gpio/gpiosim.c
209
IPL_VM,
sys/dev/i2c/axppmic.c
1218
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/i2c/axppmic.c
1229
sc->sc_ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM,
sys/dev/i2c/axppmic.c
1239
PRI_SOFTSERIAL, IPL_VM,
sys/dev/i2c/ihidev.c
747
&sc->sc_ih_gpiomap, 0, IPL_VM, irqmode, ihidev_intr, sc);
sys/dev/i2c/sht3x.c
1133
sc->sc_readpoolname, NULL, IPL_VM, NULL, NULL, NULL);
sys/dev/i2c/tcakp.c
390
sc->sc_ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, 0,
sys/dev/i2o/iop.c
295
mutex_init(&sc->sc_intrlock, MUTEX_DEFAULT, IPL_VM);
sys/dev/ic/cac.c
115
mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
sys/dev/ic/ciss.c
309
mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
sys/dev/ic/ciss.c
310
mutex_init(&sc->sc_mutex_scratch, MUTEX_DEFAULT, IPL_VM);
sys/dev/ic/dwiic.c
187
mutex_init(&sc->sc_int_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/ic/igpio.c
246
mutex_init(&ib->ib_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/ic/sc16is7xx.c
545
sc->sc_ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_VM, 0,
sys/dev/ic/tpm.c
842
tpm_rng_work, sc, PRI_NONE, IPL_VM, WQ_MPSAFE)) != 0)
sys/dev/ieee1394/firewire.c
220
mutex_init(&fc->tlabel_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/ieee1394/firewire.c
221
mutex_init(&fc->fc_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/ieee1394/firewire.c
222
mutex_init(&fc->wait_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/ieee1394/firewire.c
598
mutex_init(&fc->arq->q_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/ieee1394/firewire.c
599
mutex_init(&fc->ars->q_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/ieee1394/firewire.c
600
mutex_init(&fc->atq->q_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/ieee1394/firewire.c
601
mutex_init(&fc->ats->q_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/ieee1394/sbp.c
483
mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/ieee1394/sbp.c
497
mutex_init(&sc->sc_fwb.fwb_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/isa/nct.c
331
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/isa/wbsio.c
561
mutex_init(&sc->sc_gpio_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/ld.c
132
mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
sys/dev/marvell/gt.c
560
(void)marvell_intr_establish(IRQ_DEV, IPL_VM, gt_devbus_intr, gt);
sys/dev/marvell/gt.c
617
(void)marvell_intr_establish(IRQ_ECC, IPL_VM, gt_ecc_intr, gt);
sys/dev/marvell/gt.c
707
(void)marvell_intr_establish(IRQ_COMM, IPL_VM, gt_comm_intr, gt);
sys/dev/marvell/mvpex.c
181
marvell_intr_establish(mva->mva_irq, IPL_VM, mvpex_intr, sc);
sys/dev/mca/ed_mca.c
165
mutex_init(&ed->sc_q_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/mscp/mscp_subr.c
200
mutex_init(&mi->mi_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/mscp/mscp_subr.c
204
PRI_NONE, IPL_VM, 0);
sys/dev/pci/btvmei.c
334
IPL_VM);
sys/dev/pci/coram.c
192
sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_VM, coram_intr,
sys/dev/pci/cxdtv.c
217
sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_VM, cxdtv_intr,
sys/dev/pci/hifn7751.c
406
0, 0, 0, "hifncmd", NULL, IPL_VM,
sys/dev/pci/hifn7751.c
443
mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/pci/ubsec.c
412
mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/pci/veritefb.c
698
IPL_VM, veritefb_intr, sc,
sys/dev/pci/vio9p.c
504
virtio_child_attach_start(vsc, self, IPL_VM,
sys/dev/pci/viogpu.c
227
virtio_child_attach_start(vsc, self, IPL_VM,
sys/dev/pci/viomb.c
151
virtio_child_attach_start(vsc, self, IPL_VM,
sys/dev/pci/viomb.c
163
mutex_init(&sc->sc_waitlock, MUTEX_DEFAULT, IPL_VM); /* spin */
sys/dev/pci/viornd.c
142
mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
sys/dev/pci/voyager.c
204
sc->sc_ih = pci_intr_establish_xname(sc->sc_pc, ih, IPL_VM,
sys/dev/pcmcia/if_malo_pcmcia.c
337
mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/raidframe/rf_acctrace.c
67
rf_init_mutex2(rf_tracing_mutex, IPL_VM);
sys/dev/raidframe/rf_debugMem.c
139
rf_init_mutex2(rf_debug_mem_mutex, IPL_VM);
sys/dev/raidframe/rf_diskqueue.c
185
rf_init_mutex2(diskqueue->mutex, IPL_VM);
sys/dev/raidframe/rf_driver.c
308
rf_init_mutex2(rf_printf_mutex, IPL_VM);
sys/dev/raidframe/rf_driver.c
941
rf_init_mutex2(raidPtr->mutex, IPL_VM);
sys/dev/raidframe/rf_driver.c
945
rf_init_mutex2(raidPtr->rad_lock, IPL_VM);
sys/dev/raidframe/rf_driver.c
947
rf_init_mutex2(raidPtr->access_suspend_mutex, IPL_VM);
sys/dev/raidframe/rf_engine.c
137
rf_init_mutex2(raidPtr->iodone_lock, IPL_VM);
sys/dev/raidframe/rf_engine.c
140
rf_init_mutex2(raidPtr->node_queue_mutex, IPL_VM);
sys/dev/raidframe/rf_mcpair.c
84
rf_init_mutex2(t->mutex, IPL_VM);
sys/dev/raidframe/rf_netbsdkintf.c
4070
rf_init_mutex2(rf_sparet_wait_mutex, IPL_VM);
sys/dev/raidframe/rf_paritylog.c
79
rf_init_mutex2(common->mutex, IPL_VM);
sys/dev/raidframe/rf_paritylogging.c
233
rf_init_mutex2(raidPtr->parityLogPool.mutex, IPL_VM);
sys/dev/raidframe/rf_paritylogging.c
291
rf_init_mutex2(raidPtr->regionBufferPool.mutex, IPL_VM);
sys/dev/raidframe/rf_paritylogging.c
339
rf_init_mutex2(raidPtr->parityBufferPool.mutex, IPL_VM);
sys/dev/raidframe/rf_paritylogging.c
387
rf_init_mutex2(raidPtr->parityLogDiskQueue.mutex, IPL_VM);
sys/dev/raidframe/rf_paritylogging.c
406
rf_init_mutex2(raidPtr->regionInfo[i].mutex, IPL_VM);
sys/dev/raidframe/rf_paritylogging.c
407
rf_init_mutex2(raidPtr->regionInfo[i].reintMutex, IPL_VM);
sys/dev/raidframe/rf_psstatus.c
111
rf_init_mutex2(pssTable[i].mutex, IPL_VM);
sys/dev/raidframe/rf_reconmap.c
109
rf_init_mutex2(p->mutex, IPL_VM);
sys/dev/raidframe/rf_reconutil.c
128
rf_init_mutex2(reconCtrlPtr->eq_mutex, IPL_VM);
sys/dev/raidframe/rf_reconutil.c
135
rf_init_mutex2(reconCtrlPtr->rb_mutex, IPL_VM);
sys/dev/raidframe/rf_stripelocks.c
211
rf_init_mutex2(lockTable[i].mutex, IPL_VM);
sys/dev/sbus/stp4020.c
352
hw_ipl = IPL_VM;
sys/dev/sbus/stp4020.c
364
if (ipl <= IPL_VM) {
sys/dev/sbus/stp4020.c
367
hw_ipl = IPL_VM;
sys/dev/scsipi/st.c
401
mutex_init(&st->sc_iolock, MUTEX_DEFAULT, IPL_VM);
sys/dev/spi/spi.c
312
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/spi/spi.c
588
mutex_init(&st->st_lock, MUTEX_DEFAULT, IPL_VM);
sys/dev/sysmon/sysmon_taskq.c
103
mutex_init(&sysmon_task_queue_mtx, MUTEX_DEFAULT, IPL_VM);
sys/dev/usb/emdtv_ir.c
78
mutex_init(&sc->sc_ir_mutex, MUTEX_DEFAULT, IPL_VM);
sys/dev/usb/emdtv_ir.c
85
emdtv_ir_worker, sc, PRI_NONE, IPL_VM, 0);
sys/dev/usb/usbdi.h
312
#define IPL_USB IPL_VM
sys/dev/video.c
82
#define IPL_VIDEO IPL_VM
sys/kern/kern_crashme.c
335
mutex_init(&crashme_spinlock, MUTEX_DEFAULT, IPL_VM);
sys/kern/kern_pmf.c
1158
pmf_event_worker, NULL, PRI_NONE, IPL_VM, 0);
sys/kern/kern_pmf.c
1164
pmf_suspend_worker, NULL, PRI_NONE, IPL_VM, 0);
sys/kern/kern_sig.c
221
"ksiginfo", NULL, IPL_VM, NULL, NULL, NULL);
sys/kern/kern_threadpool.c
392
mutex_init(&pool->tp_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/subr_autoconf.c
377
mutex_init(&alldevs_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/subr_extent.c
122
"extent", NULL, IPL_VM);
sys/kern/subr_extent.c
303
mutex_init(&ex->ex_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/subr_kmem.c
530
kmem_cache, KMEM_MAXSIZE, KMEM_SHIFT, IPL_VM);
sys/kern/subr_kmem.c
533
kmem_cache_big, PAGE_SIZE, KMEM_BIG_SHIFT, IPL_VM);
sys/kern/subr_log.c
140
mutex_init(&log_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/subr_pool.c
722
phpool_names[idx], &pool_allocator_meta, IPL_VM);
sys/kern/subr_pool.c
728
"pcgnormal", &pool_allocator_meta, IPL_VM);
sys/kern/subr_pool.c
733
"pcglarge", &pool_allocator_meta, IPL_VM);
sys/kern/subr_pool.c
857
mutex_init(&palloc->pa_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/subr_vmem.c
713
mutex_init(&vmem_btag_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/subr_vmem.c
714
mutex_init(&vmem_btag_refill_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/subr_vmem.c
732
IPL_VM);
sys/kern/subr_vmem.c
737
0, VM_NOSLEEP | VM_BOOTSTRAP, IPL_VM);
sys/kern/subr_vmem.c
740
PR_PHINPAGE, "vmembt", &pool_allocator_vmem_meta, IPL_VM);
sys/kern/tty.c
3064
mutex_init(&tty_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/uipc_mbuf.c
187
NULL, IPL_VM, mb_ctor, NULL, NULL);
sys/kern/uipc_mbuf.c
191
NULL, IPL_VM, NULL, NULL, NULL);
sys/kern/uipc_socket.c
462
mutex_init(&so_pendfree_lock, MUTEX_DEFAULT, IPL_VM);
sys/kern/vfs_wapbl.c
384
"wapblentrypl", &pool_allocator_kmem, IPL_VM);
sys/modules/lua/lua.c
140
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
sys/modules/lua/lua.c
143
mutex_init(&sc->sc_state_lock, MUTEX_DEFAULT, IPL_VM);
sys/netinet/ip_reass.c
156
mutex_init(&ipfr_lock, MUTEX_DEFAULT, IPL_VM);
sys/netinet/tcp_input.c
423
NULL, IPL_VM);
sys/nfs/nfs_vnops.c
1252
mutex_init(&ctx.nwc_lock, MUTEX_DRIVER, IPL_VM);
sys/rump/librump/rumpkern/rump.c
449
mutex_init(&tty_lock, MUTEX_DEFAULT, IPL_VM);
sys/rump/librump/rumpkern/vm.c
399
0, VM_NOSLEEP | VM_BOOTSTRAP, IPL_VM);
sys/rump/librump/rumpkern/vm.c
405
8 * PAGE_SIZE, VM_NOSLEEP | VM_BOOTSTRAP, IPL_VM);
sys/sys/intr.h
82
#define IPL_BIO IPL_VM
sys/sys/intr.h
83
#define IPL_NET IPL_VM
sys/sys/intr.h
84
#define IPL_TTY IPL_VM
sys/uvm/uvm_aobj.c
565
0, 0, 0, "uaoeltpl", NULL, IPL_VM);
sys/uvm/uvm_km.c
349
0, VM_NOSLEEP | VM_BOOTSTRAP, IPL_VM);
sys/uvm/uvm_km.c
371
VM_NOSLEEP, IPL_VM);
sys/uvm/uvm_map.c
924
mutex_init(&uvm_kentry_lock, MUTEX_DRIVER, IPL_VM);
sys/uvm/uvm_page.c
350
mutex_init(&uvm_freelist_locks[b].lock, MUTEX_DEFAULT, IPL_VM);
sys/uvm/uvm_pdaemon.c
265
mutex_init(&uvmpd_lock, MUTEX_DEFAULT, IPL_VM);